final fixes for UIQ3
[picodrive.git] / Pico / cd / Memory.s
CommitLineData
4ff2d527 1@ vim:filetype=armasm
2
6cadc2da 3@ Memory I/O handlers for Sega/Mega CD emulation
4ff2d527 4@ (c) Copyright 2007, Grazvydas "notaz" Ignotas
4ff2d527 5
6
7
8.equiv PCM_STEP_SHIFT, 11
7a1f6e45 9.equiv POLL_LIMIT, 16
4ff2d527 10
11@ jump tables
12.data
13.align 4
14
15.altmacro
16.macro mk_m68k_jump_table on sz @ operation name, size
17 .long m_m68k_&\on&\sz&_bios @ 0x000000 - 0x01ffff
18 .long m_m68k_&\on&\sz&_prgbank @ 0x020000 - 0x03ffff
19 .long m_&\on&_null, m_&\on&_null @ 0x040000 - 0x07ffff
20 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x080000 - 0x0fffff
21 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x100000 - 0x17ffff
22 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x180000 - 0x1fffff
23 .long m_m68k_&\on&\sz&_wordram0_2M @ 0x200000 - 0x21ffff
24 .long m_m68k_&\on&\sz&_wordram1_2M @ 0x220000 - 0x23ffff
25 .long m_&\on&_null, m_&\on&_null @ 0x240000 - 0x27ffff
26 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x280000 - 0x2fffff
27 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x300000
28 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x3fffff
6cadc2da 29 .long m_m68k_&\on&\sz&_bcram_size @ 0x400000
30 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x420000
4ff2d527 31 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x4fffff
32 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x500000
33 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x5fffff
6cadc2da 34 .long m_m68k_&\on&\sz&_bcram @ 0x600000
35 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x620000
4ff2d527 36 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x6fffff
37 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x700000
6cadc2da 38 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x7dffff
39 .long m_m68k_&\on&\sz&_bcram_reg @ 0x7e0000
4ff2d527 40 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x800000
41 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x8fffff
42 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0x900000
43 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0x9fffff
44 .long m_m68k_&\on&\sz&_system_io @ 0xa00000 - 0xa1ffff
45 .long m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa20000 - 0xa7ffff
46 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xa80000 - 0xafffff
47 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xb00000
48 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xbfffff
49 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ 0xc00000
50 .long m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp, m_m68k_&\on&\sz&_vdp @ - 0xcfffff
51 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ 0xd00000
52 .long m_&\on&_null, m_&\on&_null, m_&\on&_null, m_&\on&_null @ - 0xdfffff
53 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xe00000
54 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xefffff
55 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ 0xf00000
56 .long m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram, m_m68k_&\on&\sz&_ram @ - 0xffffff
57.endm
58
5c69a605 59.macro mk_s68k_jump_table on sz @ operation name, size
4ff2d527 60 .long m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg, m_s68k_&\on&\sz&_prg @ 0x000000 - 0x07ffff
61 .long m_s68k_&\on&\sz&_wordram_2M @ 0x080000 - 0x09ffff
62 .long m_s68k_&\on&\sz&_wordram_2M @ 0x0a0000 - 0x0bffff
63 .long m_&\on&_null @ 0x0c0000 - 0x0dffff, 1M area
64 .long m_&\on&_null @ 0x0e0000 - 0x0fffff
65.endm
66
4ff2d527 67
48e8482f 68@ the jumptables themselves.
4ff2d527 69m_m68k_read8_table: mk_m68k_jump_table read 8
70m_m68k_read16_table: mk_m68k_jump_table read 16
71m_m68k_read32_table: mk_m68k_jump_table read 32
72m_m68k_write8_table: mk_m68k_jump_table write 8
73m_m68k_write16_table: mk_m68k_jump_table write 16
74m_m68k_write32_table: mk_m68k_jump_table write 32
75
5c69a605 76m_s68k_read8_table: mk_s68k_jump_table read 8
77m_s68k_read16_table: mk_s68k_jump_table read 16
78m_s68k_read32_table: mk_s68k_jump_table read 32
79m_s68k_write8_table: mk_s68k_jump_table write 8
80m_s68k_write16_table: mk_s68k_jump_table write 16
81m_s68k_write32_table: mk_s68k_jump_table write 32
4ff2d527 82
48e8482f 83m_s68k_decode_write_table:
84 .long m_s68k_write8_2M_decode_b0_m0
85 .long m_s68k_write16_2M_decode_b0_m0
86 .long m_s68k_write32_2M_decode_b0_m0
87 .long m_s68k_write8_2M_decode_b0_m1
88 .long m_s68k_write16_2M_decode_b0_m1
89 .long m_s68k_write32_2M_decode_b0_m1
90 .long m_s68k_write8_2M_decode_b0_m2
91 .long m_s68k_write16_2M_decode_b0_m2
92 .long m_s68k_write32_2M_decode_b0_m2
93 .long m_s68k_write8_2M_decode_b1_m0
94 .long m_s68k_write16_2M_decode_b1_m0
95 .long m_s68k_write32_2M_decode_b1_m0
96 .long m_s68k_write8_2M_decode_b1_m1
97 .long m_s68k_write16_2M_decode_b1_m1
98 .long m_s68k_write32_2M_decode_b1_m1
99 .long m_s68k_write8_2M_decode_b1_m2
100 .long m_s68k_write16_2M_decode_b1_m2
101 .long m_s68k_write32_2M_decode_b1_m2
102
4ff2d527 103
104@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
105
106.text
107.align 4
108
109.global PicoMemResetCD
48e8482f 110.global PicoMemResetCDdecode
4ff2d527 111.global PicoReadM68k8
112.global PicoReadM68k16
113.global PicoReadM68k32
114.global PicoWriteM68k8
115.global PicoWriteM68k16
116.global PicoWriteM68k32
117.global PicoReadS68k8
118.global PicoReadS68k16
119.global PicoReadS68k32
120.global PicoWriteS68k8
121.global PicoWriteS68k16
122.global PicoWriteS68k32
123
124@ externs, just for reference
125.extern Pico
126.extern z80Read8
127.extern OtherRead16
128.extern PicoVideoRead
9761a7d0 129.extern PicoVideoRead8
4ff2d527 130.extern Read_CDC_Host
131.extern m68k_reg_write8
4ff2d527 132.extern OtherWrite16
133.extern gfx_cd_read
134.extern s68k_reg_read16
135.extern SRam
5c69a605 136.extern gfx_cd_write16
4ff2d527 137.extern s68k_reg_write8
7a1f6e45 138.extern s68k_poll_adclk
3aa1e148 139.extern PicoCpuMS68k
2433f409 140.extern s68k_poll_detect
141.extern SN76496Write
e5503e2f 142.extern m_m68k_read8_misc
143.extern m_m68k_write8_misc
4ff2d527 144
145
146@ r0=reg3, r1-r3=temp
147.macro mk_update_table on sz @ operation name, size
148 @ we only set word-ram handlers
149 ldr r1, =m_m68k_&\on&\sz&_table
150 ldr r12,=m_s68k_&\on&\sz&_table
151 tst r0, #4
152 bne 0f @ pmr_8_1M
153
154@ pmr_8_2M:
155 ldr r2, =m_m68k_&\on&\sz&_wordram0_2M
156 ldr r3, =m_s68k_&\on&\sz&_wordram_2M
157 str r2, [r1, #16*4]
158 str r2, [r1, #17*4]
159 ldr r2, =m_&\on&_null
160 str r3, [r12,#4*4]
161 str r3, [r12,#5*4]
162 str r2, [r12,#6*4]
163 b 9f @ pmr_8_done
164
1650: @ pmr_8_1M:
166 tst r0, #1
167 bne 1f @ pmr_8_1M1
168
169@ pmr_8_1M0:
170 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b0
171 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b0
172 str r2, [r1, #16*4]
173 str r3, [r1, #17*4]
4ff2d527 174 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b1
48e8482f 175.ifeqs "\on", "read"
176 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b1
4ff2d527 177 str r2, [r12,#4*4]
178 str r2, [r12,#5*4]
48e8482f 179.endif
4ff2d527 180 str r3, [r12,#6*4]
181 b 9f @ pmr_8_done
182
1831: @ pmr_8_1M1:
184 ldr r2, =m_m68k_&\on&\sz&_wordram0_1M_b1
185 ldr r3, =m_m68k_&\on&\sz&_wordram1_1M_b1
186 str r2, [r1, #16*4]
187 str r3, [r1, #17*4]
4ff2d527 188 ldr r3, =m_s68k_&\on&\sz&_wordram_1M_b0
48e8482f 189.ifeqs "\on", "read"
190 ldr r2, =m_s68k_&\on&\sz&_wordram_2M_decode_b0
4ff2d527 191 str r2, [r12,#4*4]
192 str r2, [r12,#5*4]
48e8482f 193.endif
4ff2d527 194 str r3, [r12,#6*4]
195
1969: @ pmr_8_done:
197.endm
198
199
200PicoMemResetCD: @ r3
201 mk_update_table read 8
202 mk_update_table read 16
203 mk_update_table read 32
204 mk_update_table write 8
205 mk_update_table write 16
206 mk_update_table write 32
207 bx lr
208
209
89fa852d 210PicoMemResetCDdecode: @reg3
211 tst r0, #4
00bd648e 212 bxeq lr @ we should not be called in 2M mode
48e8482f 213 ldr r1, =m_s68k_write8_table
214 ldr r3, =m_s68k_decode_write_table
215 and r2, r0, #0x18
216 mov r2, r2, lsr #3
217 cmp r2, #3
218 moveq r2, #2 @ mode3 is same as mode2?
219 tst r0, #1
220 addeq r2, r2, #3 @ bank1 (r2=0..5)
221 add r2, r2, r2, lsl #1 @ *= 3
222 add r2, r3, r2, lsl #2
223 ldmia r2, {r0,r3,r12}
224 str r0, [r1, #4*4]
225 str r0, [r1, #5*4]
226 str r3, [r1, #4*4+8*4]
227 str r3, [r1, #5*4+8*4]
228 str r12,[r1, #4*4+8*4*2]
229 str r12,[r1, #5*4+8*4*2]
230 bx lr
231
232
4ff2d527 233.pool
234
235@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
236
237.macro mk_entry_m68k table
238 ldr r2, =\table
239 bic r0, r0, #0xff000000
240 and r3, r0, #0x00fe0000
241 ldr pc, [r2, r3, lsr #15]
242.endm
243
244PicoReadM68k8: @ u32 a
245 mk_entry_m68k m_m68k_read8_table
246
247PicoReadM68k16: @ u32 a
248 mk_entry_m68k m_m68k_read16_table
249
250PicoReadM68k32: @ u32 a
251 mk_entry_m68k m_m68k_read32_table
252
253PicoWriteM68k8: @ u32 a, u8 d
254 mk_entry_m68k m_m68k_write8_table
255
256PicoWriteM68k16: @ u32 a, u16 d
257 mk_entry_m68k m_m68k_write16_table
258
259PicoWriteM68k32: @ u32 a, u32 d
260 mk_entry_m68k m_m68k_write32_table
261
262
5c69a605 263.macro mk_entry_s68k on sz
4ff2d527 264 bic r0, r0, #0xff000000
5c69a605 265 cmp r0, #0x00080000
266 blt m_s68k_&\on&\sz&_prg
267 cmp r0, #0x000e0000
268 ldrlt r2, =m_s68k_&\on&\sz&_table
269 andlt r3, r0, #0x000e0000
4ff2d527 270 ldrlt pc, [r2, r3, lsr #15]
5c69a605 271 mov r3, #0x00ff0000
272 orr r3, r3, #0x00008000
273 cmp r0, r3
274 bge m_s68k_&\on&\sz&_regs
275 cmp r0, #0x00ff0000
276 bge m_s68k_&\on&\sz&_pcm
277 cmp r0, #0x00fe0000
278 bge m_s68k_&\on&\sz&_backup
4ff2d527 279 mov r0, #0
280 bx lr
281.endm
282
283PicoReadS68k8: @ u32 a
5c69a605 284 mk_entry_s68k read 8
4ff2d527 285
286PicoReadS68k16: @ u32 a
5c69a605 287 mk_entry_s68k read 16
4ff2d527 288
289PicoReadS68k32: @ u32 a
5c69a605 290 mk_entry_s68k read 32
4ff2d527 291
292PicoWriteS68k8: @ u32 a, u8 d
5c69a605 293 mk_entry_s68k write 8
4ff2d527 294
295PicoWriteS68k16: @ u32 a, u16 d
5c69a605 296 mk_entry_s68k write 16
4ff2d527 297
298PicoWriteS68k32: @ u32 a, u32 d
5c69a605 299 mk_entry_s68k write 32
4ff2d527 300
301
302.pool
303
304@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
305
306@ utilities
307
308@ r0=addr[in,out], r1,r2=tmp
309.macro cell_map
310 ands r1, r0, #0x01c000
311 ldrne pc, [pc, r1, lsr #12]
312 beq 0f @ most common?
313 .long 0f
314 .long 0f
315 .long 0f
316 .long 0f
317 .long 1f
318 .long 1f
319 .long 2f
320 .long 3f
3211: @ x16 cells
322 and r1, r0, #0x7e00 @ col
323 and r2, r0, #0x01fc @ row
324 orr r2, r2, #0x0400
325 orr r1, r2, r1, ror #13
326 b 9f
3272: @ x8 cells
328 and r1, r0, #0x3f00 @ col
329 and r2, r0, #0x00fc @ row
330 orr r2, r2, #0x0600
331 orr r1, r2, r1, ror #12
332 b 9f
3333: @ x4 cells
334 and r1, r0, #0x1f80 @ col
335 and r2, r0, #0x007c @ row
336 orr r1, r2, r1, ror #11
337 and r2, r0,#0x1e000
338 orr r1, r1, r2, lsr #6
339 b 9f
3400: @ x32 cells
341 and r1, r0, #0xfc00 @ col
342 and r2, r0, #0x03fc @ row
343 orr r1, r2, r1, ror #14
3449:
345 and r0, r0, #3
346 orr r0, r0, r1, ror #26 @ rol 4+2
347.endm
348
349
00bd648e 350@ r0=prt1, r1=ptr2; unaligned ptr MUST be r0
4ff2d527 351.macro m_read32_gen
352 tst r0, #2
353 ldrneh r0, [r1, r0]!
354 ldrneh r1, [r1, #2]
355 ldreq r0, [r1, r0]
356 moveq r0, r0, ror #16
357 orrne r0, r1, r0, lsl #16
358.endm
359
360
00bd648e 361@ r0=prt1, r1=data, r2=ptr2; unaligned ptr MUST be r0
4ff2d527 362.macro m_write32_gen
363 tst r0, #2
364 mov r1, r1, ror #16
365 strneh r1, [r2, r0]!
366 movne r1, r1, lsr #16
367 strneh r1, [r2, #2]
368 streq r1, [r2, r0]
369.endm
370
6cadc2da 371@
372.macro bcram_reg_rw is_read addr_check
373 rsb r0, r0, #0x800000
374 ldr r2, =(Pico+0x22200)
375 cmp r0, #(0x800000-\addr_check)
376 ldreq r2, [r2]
377.if \is_read
378 movne r0, #0
379.endif
380 bxne lr
381 add r2, r2, #0x110000
382 add r2, r2, #0x002200
383.if \is_read
8022f53d 384 ldrb r0, [r2, #0x18] @ Pico_mcd->m.bcram_reg
6cadc2da 385.else
386 strb r1, [r2, #0x18]
387.endif
388 bx lr
389.endm
4ff2d527 390
391@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
392
393
394m_read_null:
395 mov r0, #0
396 bx lr
397
398
399m_m68k_read8_bios:
400 ldr r1, =(Pico+0x22200)
401 bic r0, r0, #0xfe0000
402 ldr r1, [r1]
403 eor r0, r0, #1
404 ldrb r0, [r1, r0]
405 bx lr
406
407
408m_m68k_read8_prgbank:
409 ldr r1, =(Pico+0x22200)
410 eor r0, r0, #1
411 ldr r1, [r1]
412 mov r2, #0x110000
413 orr r3, r2, #0x002200
414 ldr r3, [r1, r3]
415 ldr r2, [r1, r2]
721cd396 416 and r3, r3, #0x00030000
417 cmp r3, #0x00010000 @ have bus or in reset state?
4ff2d527 418 moveq r0, #0
419 bxeq lr
420 and r2, r2, #0xc0000000 @ r3 & 0xC0
421 add r1, r1, r2, lsr #12
422 ldrb r0, [r1, r0]
423 bx lr
424
425
426m_m68k_read8_wordram0_2M: @ 0x200000 - 0x21ffff
427m_m68k_read8_wordram1_2M: @ 0x220000 - 0x23ffff
428 ldr r1, =(Pico+0x22200)
429 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
430 ldr r1, [r1]
431 eor r0, r0, #1
432 ldrb r0, [r1, r0]
433 bx lr
434
435
436m_m68k_read8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
437 ldr r1, =(Pico+0x22200)
438 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
439 ldr r1, [r1]
440 eor r0, r0, #1
441 ldrb r0, [r1, r0]
442 bx lr
443
444
445m_m68k_read8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
446 ldr r1, =(Pico+0x22200)
447 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
448 ldr r1, [r1]
449 eor r0, r0, #1
450 ldrb r0, [r1, r0]
451 bx lr
452
453
454m_m68k_read8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
455 cell_map
456 ldr r1, =(Pico+0x22200)
457 add r0, r0, #0x0c0000
458 ldr r1, [r1]
459 eor r0, r0, #1
460 ldrb r0, [r1, r0]
461 bx lr
462
463
464m_m68k_read8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
465 cell_map
466 ldr r1, =(Pico+0x22200)
467 add r0, r0, #0x0e0000
468 ldr r1, [r1]
469 eor r0, r0, #1
470 ldrb r0, [r1, r0]
471 bx lr
472
473
6cadc2da 474m_m68k_read8_bcram_size: @ 0x400000
475 sub r0, r0, #1
476 cmp r0, #0x400000
477 ldreq r1, =SRam
478 mov r0, #0
479 ldreq r1, [r1]
480 bxne lr
481 tst r1, r1
482 movne r0, #3 @ pretend to be a 64k cart (8<<3)
483 bx lr
484
485
486m_m68k_read8_bcram: @ 0x600000 - 0x61ffff
487 ldr r1, =SRam
488 bic r0, r0, #0xfe0000
489 ldr r1, [r1]
490 mov r0, r0, lsr #1
491 tst r1, r1
492 moveq r0, #0
493 bxeq lr
494 add r1, r1, #0x2000
495 ldrb r0, [r1, r0]
496 bx lr
497
498
499m_m68k_read8_bcram_reg: @ 0x7fffff
500 bcram_reg_rw 1, 0x7fffff
501
502
4ff2d527 503m_m68k_read8_system_io:
504 bic r2, r0, #0xfe0000
505 bic r2, r2, #0x3f
506 cmp r2, #0x012000
e5503e2f 507 bne m_m68k_read8_misc @ now from Pico/Memory.s
4ff2d527 508
509 ldr r1, =(Pico+0x22200)
510 and r0, r0, #0x3f
511 ldr r1, [r1] @ Pico.mcd (used everywhere)
512 cmp r0, #0x0e
513 ldrlt pc, [pc, r0, lsl #2]
514 b m_m68k_read8_hi
515 .long m_m68k_read8_r00
516 .long m_m68k_read8_r01
517 .long m_m68k_read8_r02
518 .long m_m68k_read8_r03
519 .long m_m68k_read8_r04
520 .long m_read_null @ unused bits
521 .long m_m68k_read8_r06
522 .long m_m68k_read8_r07
523 .long m_m68k_read8_r08
524 .long m_m68k_read8_r09
525 .long m_read_null @ reserved
526 .long m_read_null
527 .long m_m68k_read8_r0c
528 .long m_m68k_read8_r0d
529m_m68k_read8_r00:
530 add r1, r1, #0x110000
00bd648e 531 ldr r0, [r1, #0x30]
4ff2d527 532 and r0, r0, #0x04000000 @ we need irq2 mask state
533 mov r0, r0, lsr #19
534 bx lr
535m_m68k_read8_r01:
536 add r1, r1, #0x110000
537 add r1, r1, #0x002200
538 ldrb r0, [r1, #2] @ Pico_mcd->m.busreq
539 bx lr
540m_m68k_read8_r02:
541 add r1, r1, #0x110000
542 ldrb r0, [r1, #2]
543 bx lr
544m_m68k_read8_r03:
545 add r1, r1, #0x110000
546 ldrb r0, [r1, #3]
c008977e 547 add r1, r1, #0x002200
548 ldr r1, [r1, #4]
4ff2d527 549 and r0, r0, #0xc7
c008977e 550 tst r1, #2 @ DMNA pending?
551 bxeq lr
552 bic r0, r0, #1
553 orr r0, r0, #2
4ff2d527 554 bx lr
555m_m68k_read8_r04:
556 add r1, r1, #0x110000
557 ldrb r0, [r1, #4]
558 bx lr
559m_m68k_read8_r06:
560 ldrb r0, [r1, #0x73] @ IRQ vector
561 bx lr
562m_m68k_read8_r07:
563 ldrb r0, [r1, #0x72]
564 bx lr
565m_m68k_read8_r08:
566 mov r0, #0
567 bl Read_CDC_Host @ TODO: make it local
568 mov r0, r0, lsr #8
569 bx lr
570m_m68k_read8_r09:
571 mov r0, #0
572 b Read_CDC_Host
573m_m68k_read8_r0c:
574 add r1, r1, #0x110000
575 add r1, r1, #0x002200
576 ldr r0, [r1, #0x14] @ Pico_mcd->m.timer_stopwatch
577 mov r0, r0, lsr #24
578 bx lr
579m_m68k_read8_r0d:
580 add r1, r1, #0x110000
581 add r1, r1, #0x002200
582 ldr r0, [r1, #0x14]
583 mov r0, r0, lsr #16
584 bx lr
585m_m68k_read8_hi:
586 cmp r0, #0x30
587 movge r0, #0
588 bxeq lr
589 add r1, r1, #0x110000
590 ldrb r0, [r1, r0]
591 bx lr
592
e5503e2f 593/*
4ff2d527 594m_m68k_read8_misc:
595 bic r2, r0, #0x00ff
596 bic r2, r2, #0xbf00
597 cmp r2, #0xa00000 @ Z80 RAM?
598 beq z80Read8
599@ ldreq r2, =z80Read8
600@ bxeq r2
601 stmfd sp!,{r0,lr}
602 bic r0, r0, #1
603 mov r1, #8
604 bl OtherRead16 @ non-MCD version should be ok too
605 ldmfd sp!,{r1,lr}
606 tst r1, #1
607 moveq r0, r0, lsr #8
608 bx lr
e5503e2f 609*/
4ff2d527 610
611m_m68k_read8_vdp:
612 tst r0, #0x70000
613 tsteq r0, #0x000e0
614 bxne lr @ invalid read
9761a7d0 615 b PicoVideoRead8
4ff2d527 616
617
618m_m68k_read8_ram:
619 ldr r1, =Pico
620 bic r0, r0, #0xff0000
621 eor r0, r0, #1
622 ldrb r0, [r1, r0]
623 bx lr
624
625
626@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
627
628
629m_m68k_read16_bios:
630 ldr r1, =(Pico+0x22200)
631 bic r0, r0, #0xfe0000
632 ldr r1, [r1]
633 bic r0, r0, #1
634 ldrh r0, [r1, r0]
635 bx lr
636
637
638m_m68k_read16_prgbank:
639 ldr r1, =(Pico+0x22200)
640 bic r0, r0, #1
641 ldr r1, [r1]
642 mov r2, #0x110000
643 orr r3, r2, #0x002200
644 ldr r3, [r1, r3]
645 ldr r2, [r1, r2]
721cd396 646 and r3, r3, #0x00030000
647 cmp r3, #0x00010000 @ have bus or in reset state?
4ff2d527 648 moveq r0, #0
649 bxeq lr
650 and r2, r2, #0xc0000000 @ r3 & 0xC0
651 add r1, r1, r2, lsr #12
652 ldrh r0, [r1, r0]
653 bx lr
654
655
656m_m68k_read16_wordram0_2M: @ 0x200000 - 0x21ffff
657m_m68k_read16_wordram1_2M: @ 0x220000 - 0x23ffff
658 ldr r1, =(Pico+0x22200)
659 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
660 ldr r1, [r1]
661 bic r0, r0, #1
662 ldrh r0, [r1, r0]
663 bx lr
664
665
666m_m68k_read16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
667 ldr r1, =(Pico+0x22200)
668 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
669 ldr r1, [r1]
670 bic r0, r0, #1
671 ldrh r0, [r1, r0]
672 bx lr
673
674
675m_m68k_read16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
676 ldr r1, =(Pico+0x22200)
677 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
678 ldr r1, [r1]
679 bic r0, r0, #1
680 ldrh r0, [r1, r0]
681 bx lr
682
683
684m_m68k_read16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
685 @ Warning: read32 relies on NOT using r3 and r12 here
686 cell_map
687 ldr r1, =(Pico+0x22200)
688 add r0, r0, #0x0c0000
689 ldr r1, [r1]
690 bic r0, r0, #1
691 ldrh r0, [r1, r0]
692 bx lr
693
694
695m_m68k_read16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
696 cell_map
697 ldr r1, =(Pico+0x22200)
698 add r0, r0, #0x0e0000
699 ldr r1, [r1]
700 bic r0, r0, #1
701 ldrh r0, [r1, r0]
702 bx lr
703
704
6cadc2da 705m_m68k_read16_bcram_size: @ 0x400000
706 cmp r0, #0x400000
707 ldreq r1, =SRam
708 mov r0, #0
709 ldreq r1, [r1]
710 bxne lr
711 tst r1, r1
712 movne r0, #3 @ pretend to be a 64k cart
713 bx lr
714
715
716@ m_m68k_read16_bcram: @ 0x600000 - 0x61ffff
717.equiv m_m68k_read16_bcram, m_m68k_read8_bcram
718
719
720m_m68k_read16_bcram_reg: @ 0x7fffff
721 bcram_reg_rw 1, 0x7ffffe
722
723
4ff2d527 724m_m68k_read16_system_io:
725 bic r1, r0, #0xfe0000
726 bic r1, r1, #0x3f
727 cmp r1, #0x012000
728 bne m_m68k_read16_misc
729
730m_m68k_read16_m68k_regs:
731 ldr r1, =(Pico+0x22200)
732 and r0, r0, #0x3e
733 ldr r1, [r1] @ Pico.mcd (used everywhere)
734 cmp r0, #0x0e
735 ldrlt pc, [pc, r0, lsl #1]
736 b m_m68k_read16_hi
737 .long m_m68k_read16_r00
738 .long m_m68k_read16_r02
739 .long m_m68k_read16_r04
740 .long m_m68k_read16_r06
741 .long m_m68k_read16_r08
742 .long m_read_null @ reserved
743 .long m_m68k_read16_r0c
744m_m68k_read16_r00:
745 add r1, r1, #0x110000
7a1f6e45 746 ldr r0, [r1, #0x30]
4ff2d527 747 add r1, r1, #0x002200
748 ldrb r1, [r1, #2] @ Pico_mcd->m.busreq
749 and r0, r0, #0x04000000 @ we need irq2 mask state
750 orr r0, r1, r0, lsr #11
751 bx lr
752m_m68k_read16_r02:
753 add r1, r1, #0x110000
754 ldrb r0, [r1, #2]
c008977e 755 ldrb r2, [r1, #3]
756 add r1, r1, #0x002200
757 ldr r1, [r1, #4]
758 and r2, r2, #0xc7
759 orr r0, r2, r0, lsl #8
760 tst r1, #2 @ DMNA pending?
761 bxeq lr
762 bic r0, r0, #1
763 orr r0, r0, #2
4ff2d527 764 bx lr
765m_m68k_read16_r04:
766 add r1, r1, #0x110000
767 ldrb r0, [r1, #4]
768 mov r0, r0, lsl #8
769 bx lr
770m_m68k_read16_r06:
771 ldrh r0, [r1, #0x72] @ IRQ vector
772 bx lr
773m_m68k_read16_r08:
774 mov r0, #0
775 b Read_CDC_Host
776m_m68k_read16_r0c:
777 add r1, r1, #0x110000
778 add r1, r1, #0x002200
779 ldr r0, [r1, #0x14]
780 mov r0, r0, lsr #16
781 bx lr
782m_m68k_read16_hi:
783 cmp r0, #0x30
784 addlt r1, r1, #0x110000
785 ldrlth r1, [r1, r0]
786 movge r0, #0
787 bxge lr
788 mov r0, r1, lsr #8
789 and r1, r1, #0xff
790 orr r0, r0, r1, lsl #8
791 bx lr
792
793
794m_m68k_read16_misc:
795 bic r0, r0, #1
796 mov r1, #16
797 b OtherRead16
798
799
800m_m68k_read16_vdp:
801 tst r0, #0x70000
802 tsteq r0, #0x000e0
803 bxne lr @ invalid read
804 bic r0, r0, #1
805 b PicoVideoRead
806
807
808m_m68k_read16_ram:
809 ldr r1, =Pico
810 bic r0, r0, #0xff0000
811 bic r0, r0, #1
812 ldrh r0, [r1, r0]
813 bx lr
814
815
816@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
817
818
819m_m68k_read32_bios:
820 ldr r1, =(Pico+0x22200)
821 bic r0, r0, #0xfe0000
822 ldr r1, [r1]
823 bic r0, r0, #1
824 m_read32_gen
825 bx lr
826
827
828m_m68k_read32_prgbank:
829 ldr r1, =(Pico+0x22200)
830 bic r0, r0, #1
831 ldr r1, [r1]
832 mov r2, #0x110000
833 orr r3, r2, #0x002200
834 ldr r3, [r1, r3]
835 ldr r2, [r1, r2]
721cd396 836 and r3, r3, #0x00030000
837 cmp r3, #0x00010000 @ have bus or in reset state?
4ff2d527 838 moveq r0, #0
839 bxeq lr
840 and r2, r2, #0xc0000000 @ r3 & 0xC0
841 add r1, r1, r2, lsr #12
842 m_read32_gen
843 bx lr
844
845
846m_m68k_read32_wordram0_2M: @ 0x200000 - 0x21ffff
847m_m68k_read32_wordram1_2M: @ 0x220000 - 0x23ffff
848 ldr r1, =(Pico+0x22200)
849 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
850 ldr r1, [r1]
851 bic r0, r0, #1
852 m_read32_gen
853 bx lr
854
855
856m_m68k_read32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
857 ldr r1, =(Pico+0x22200)
858 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
859 ldr r1, [r1]
860 bic r0, r0, #1
861 m_read32_gen
862 bx lr
863
864
865m_m68k_read32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
866 ldr r1, =(Pico+0x22200)
867 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
868 ldr r1, [r1]
869 bic r0, r0, #1
870 m_read32_gen
871 bx lr
872
873
874m_m68k_read32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
875 tst r0, #2
876 bne m_m68k_read32_wordram1_1M_b0_unal
877 cell_map
878 ldr r1, =(Pico+0x22200)
879 add r0, r0, #0x0c0000
880 ldr r1, [r1]
881 bic r0, r0, #1
882 m_read32_gen
883 bx lr
884m_m68k_read32_wordram1_1M_b0_unal:
885 @ hopefully this doesn't happen too often
886 mov r12,lr
887 mov r3, r0
888 bl m_m68k_read16_wordram1_1M_b0 @ must not trash r12 and r3
889 add r1, r3, #2
890 mov r3, r0
891 mov r0, r1
892 bl m_m68k_read16_wordram1_1M_b0
893 orr r0, r0, r3, lsl #16
894 bx r12
895
896
897m_m68k_read32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
898 tst r0, #2
899 bne m_m68k_read32_wordram1_1M_b1_unal
900 cell_map
901 ldr r1, =(Pico+0x22200)
902 add r0, r0, #0x0e0000
903 ldr r1, [r1]
904 bic r0, r0, #1
905 m_read32_gen
906 bx lr
907m_m68k_read32_wordram1_1M_b1_unal:
908 mov r12,lr
909 mov r3, r0
910 bl m_m68k_read16_wordram1_1M_b1 @ must not trash r12 and r3
911 add r1, r3, #2
912 mov r3, r0
913 mov r0, r1
914 bl m_m68k_read16_wordram1_1M_b1
915 orr r0, r0, r3, lsl #16
916 bx r12
917
918
6cadc2da 919m_m68k_read32_bcram_size: @ 0x400000
920 cmp r0, #0x400000
921 ldreq r1, =SRam
922 mov r0, #0
923 ldreq r1, [r1]
924 bxne lr
925 tst r1, r1
926 movne r0, #0x30000 @ pretend to be a 64k cart
927 bx lr
928
929
930m_m68k_read32_bcram: @ 0x600000 - 0x61ffff, not likely to be called
931 mov r12,lr
932 add r3, r0, #2
933 bl m_m68k_read8_bcram
934 mov r1, r0
935 mov r0, r3
936 mov r3, r1
937 bl m_m68k_read8_bcram
938 orr r0, r0, r3, lsl #16
939 bx r12
940
941
942m_m68k_read32_bcram_reg: @ 0x7fffff
943 bcram_reg_rw 1, 0x7ffffc
944
945
4ff2d527 946@ it is not very practical to use long access on hw registers, so I assume it is not used too much.
947m_m68k_read32_system_io:
948 bic r1, r0, #0xfe0000
949 bic r1, r1, #0x3f
950 cmp r1, #0x012000
951 bne m_m68k_read32_misc
952 and r1, r0, #0x3e
953 cmp r1, #0x0e
954 blt m_m68k_read32_misc
955 cmp r1, #0x30
956 movge r0, #0
957 bxge lr
958 @ I have seen the range 0x0e-0x2f accessed quite frequently with long i/o, so here is some code for that
00bd648e 959 mov r0, r1
960 ldr r1, =(Pico+0x22200)
4ff2d527 961 mov r2, #0xff
00bd648e 962 ldr r1, [r1]
4ff2d527 963 orr r2, r2, r2, lsl #16
00bd648e 964 add r1, r1, #0x110000
4ff2d527 965 m_read32_gen
966 and r1, r2, r0 @ data is big-endian read as little, have to byteswap
967 and r0, r2, r0, lsr #8
968 orr r0, r0, r1, lsl #8
969 bx lr
970
971m_m68k_read32_misc:
972 add r1, r0, #2
973 stmfd sp!,{r1,lr}
974 bl m_m68k_read16_system_io
975 swp r0, r0, [sp]
976 bl m_m68k_read16_system_io
977 ldmfd sp!,{r1,lr}
978 orr r0, r0, r1, lsl #16
979 bx lr
980
981
982m_m68k_read32_vdp:
983 tst r0, #0x70000
984 tsteq r0, #0x000e0
985 bxne lr @ invalid read
986 bic r0, r0, #1
987 add r1, r0, #2
988 stmfd sp!,{r1,lr}
989 bl PicoVideoRead
990 swp r0, r0, [sp]
991 bl PicoVideoRead
992 ldmfd sp!,{r1,lr}
993 orr r0, r0, r1, lsl #16
994 bx lr
995
996
997m_m68k_read32_ram:
998 ldr r1, =Pico
999 bic r0, r0, #0xff0000
1000 bic r0, r0, #1
1001 m_read32_gen
1002 bx lr
1003
1004.pool
1005
1006@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1007
1008
1009m_write_null:
1010m_m68k_write8_bios:
6cadc2da 1011m_m68k_write8_bcram_size: @ 0x400000
4ff2d527 1012 bx lr
1013
1014
1015m_m68k_write8_prgbank:
1016 ldr r2, =(Pico+0x22200)
1017 eor r0, r0, #1
1018 ldr r2, [r2]
1019 mov r12,#0x110000
1020 orr r3, r12, #0x002200
1021 ldr r3, [r2, r3]
1022 ldr r12,[r2, r12]
721cd396 1023 and r3, r3, #0x00030000
1024 cmp r3, #0x00010000 @ have bus or in reset state?
4ff2d527 1025 bxeq lr
1026 and r12,r12,#0xc0000000 @ r3 & 0xC0
1027 add r2, r2, r12, lsr #12
1028 strb r1, [r2, r0]
1029 bx lr
1030
1031
1032m_m68k_write8_wordram0_2M: @ 0x200000 - 0x21ffff
1033m_m68k_write8_wordram1_2M: @ 0x220000 - 0x23ffff
1034 ldr r2, =(Pico+0x22200)
1035 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1036 ldr r2, [r2]
1037 eor r0, r0, #1
1038 strb r1, [r2, r0]
1039 bx lr
1040
1041
1042m_m68k_write8_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1043 ldr r2, =(Pico+0x22200)
1044 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1045 ldr r2, [r2]
1046 eor r0, r0, #1
1047 strb r1, [r2, r0]
1048 bx lr
1049
1050
1051m_m68k_write8_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1052 ldr r2, =(Pico+0x22200)
1053 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1054 ldr r2, [r2]
1055 eor r0, r0, #1
1056 strb r1, [r2, r0]
1057 bx lr
1058
1059
1060m_m68k_write8_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1061 mov r3, r1
1062 cell_map
1063 ldr r2, =(Pico+0x22200)
1064 add r0, r0, #0x0c0000
1065 ldr r2, [r2]
1066 eor r0, r0, #1
1067 strb r3, [r2, r0]
1068 bx lr
1069
1070
1071m_m68k_write8_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1072 mov r3, r1
1073 cell_map
1074 ldr r2, =(Pico+0x22200)
1075 add r0, r0, #0x0e0000
1076 ldr r2, [r2]
1077 eor r0, r0, #1
1078 strb r3, [r2, r0]
1079 bx lr
1080
1081
6cadc2da 1082m_m68k_write8_bcram: @ 0x600000 - 0x61ffff
1083 @ can't use r3 or r12, because of write32
1084 ldr r2, =SRam
1085 bic r0, r0, #0xfe0000
1086 ldr r2, [r2]
1087 tst r2, r2
1088 bxeq lr
1089 add r0, r2, r0, lsr #1
1090 ldr r2, =(Pico+0x22200)
1091 ldr r2, [r2]
1092 add r0, r0, #0x2000
1093 add r2, r2, #0x110000
1094 add r2, r2, #0x002200
1095 ldr r2, [r2, #0x18]
1096 tst r2, #1 @ check bcram reg
1097 bxeq lr
1098 strb r1, [r0]
1099 ldr r2, =SRam
1100 mov r0, #1
1101 strb r0, [r2, #0x0e] @ SRam.changed = 1
1102 bx lr
1103
1104
1105m_m68k_write8_bcram_reg: @ 0x7fffff
1106 bcram_reg_rw 0, 0x7fffff
1107
1108
4ff2d527 1109m_m68k_write8_system_io:
1110 bic r2, r0, #0xfe0000
1111 bic r2, r2, #0x3f
1112 cmp r2, #0x012000
1113 beq m68k_reg_write8
1114 mov r2, #8
e5503e2f 1115@ b OtherWrite8
1116 b m_m68k_write8_misc
4ff2d527 1117
1118
1119m_m68k_write8_vdp:
1120 tst r0, #0x70000
1121 tsteq r0, #0x000e0
1122 bxne lr @ invalid
2433f409 1123 and r2, r0, #0x19
1124 cmp r2, #0x11
1125 andeq r0, r1, #0xff
1126 beq SN76496Write
4ff2d527 1127 and r1, r1, #0xff
1128 orr r1, r1, r1, lsl #8 @ byte access gets mirrored
1129 b PicoVideoWrite
1130
1131
1132m_m68k_write8_ram:
1133 ldr r2, =Pico
1134 bic r0, r0, #0xff0000
1135 eor r0, r0, #1
1136 strb r1, [r2, r0]
1137 bx lr
1138
1139
1140@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1141
1142
1143m_m68k_write16_bios:
6cadc2da 1144m_m68k_write16_bcram_size: @ 0x400000
4ff2d527 1145 bx lr
1146
1147
1148m_m68k_write16_prgbank:
1149 ldr r2, =(Pico+0x22200)
1150 bic r0, r0, #1
1151 ldr r2, [r2]
1152 mov r12,#0x110000
1153 orr r3, r12, #0x002200
1154 ldr r3, [r2, r3]
1155 ldr r12,[r2, r12]
721cd396 1156 and r3, r3, #0x00030000
1157 cmp r3, #0x00010000 @ have bus or in reset state?
4ff2d527 1158 bxeq lr
1159 and r12,r12,#0xc0000000 @ r3 & 0xC0
1160 add r2, r2, r12, lsr #12
1161 strh r1, [r2, r0]
1162 bx lr
1163
1164
1165m_m68k_write16_wordram0_2M: @ 0x200000 - 0x21ffff
1166m_m68k_write16_wordram1_2M: @ 0x220000 - 0x23ffff
1167 ldr r2, =(Pico+0x22200)
1168 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1169 ldr r2, [r2]
1170 bic r0, r0, #1
1171 strh r1, [r2, r0]
1172 bx lr
1173
1174
1175m_m68k_write16_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1176 ldr r2, =(Pico+0x22200)
1177 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1178 ldr r2, [r2]
1179 bic r0, r0, #1
1180 strh r1, [r2, r0]
1181 bx lr
1182
1183
1184m_m68k_write16_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1185 ldr r2, =(Pico+0x22200)
1186 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1187 ldr r2, [r2]
1188 bic r0, r0, #1
1189 strh r1, [r2, r0]
1190 bx lr
1191
1192
1193m_m68k_write16_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1194 @ Warning: write32 relies on NOT using r12 and and keeping data in r3
1195 mov r3, r1
1196 cell_map
1197 ldr r1, =(Pico+0x22200)
1198 add r0, r0, #0x0c0000
1199 ldr r1, [r1]
1200 bic r0, r0, #1
1201 strh r3, [r1, r0]
1202 bx lr
1203
1204
1205m_m68k_write16_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1206 mov r3, r1
1207 cell_map
1208 ldr r1, =(Pico+0x22200)
1209 add r0, r0, #0x0e0000
1210 ldr r1, [r1]
1211 bic r0, r0, #1
1212 strh r3, [r1, r0]
1213 bx lr
1214
1215
6cadc2da 1216@ m_m68k_write16_bcram: @ 0x600000 - 0x61ffff
1217.equiv m_m68k_write16_bcram, m_m68k_write8_bcram
1218
1219
1220m_m68k_write16_bcram_reg: @ 0x7fffff
1221 bcram_reg_rw 0, 0x7ffffe
1222
1223
4ff2d527 1224m_m68k_write16_system_io:
1225 bic r0, r0, #1
1226 bic r2, r0, #0xfe0000
1227 bic r2, r2, #0x3f
1228 cmp r2, #0x012000
1229 bne OtherWrite16
1230
6cadc2da 1231m_m68k_write16_regs:
7a1f6e45 1232 and r0, r0, #0x3e
1233 cmp r0, #0x0e
1234 beq m_m68k_write16_regs_spec
4ff2d527 1235 and r3, r1, #0xff
1236 add r2, r0, #1
1237 stmfd sp!,{r2,r3,lr}
1238 mov r1, r1, lsr #8
1239 bl m68k_reg_write8
1240 ldmfd sp!,{r0,r1,lr}
1241 b m68k_reg_write8
1242
7a1f6e45 1243m_m68k_write16_regs_spec: @ special case
1244 ldr r2, =(Pico+0x22200)
1245 ldr r3, =s68k_poll_adclk
1246 mov r0, #0x110000
1247 ldr r2, [r2]
1248 add r0, r0, #0x00000e
1249 mov r1, r1, lsr #8
1250 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0x0e] = d >> 8;
1251 ldr r2, [r3]
1252 mov r1, #0
1253 and r2, r2, #0xfe
1254 cmp r2, #0x0e
1255 bxne lr
3aa1e148 1256 ldr r0, =PicoCpuCS68k
7a1f6e45 1257 str r1, [r0, #0x58] @ push s68k out of stopped state
1258 str r1, [r3]
1259 bx lr
1260
4ff2d527 1261
1262m_m68k_write16_vdp:
1263 tst r0, #0x70000
1264 tsteq r0, #0x000e0
1265 bxne lr @ invalid
1266 bic r0, r0, #1
2433f409 1267 and r2, r0, #0x18
1268 cmp r2, #0x10
1269 bne PicoVideoWrite
1270 and r0, r1, #0xff
1271 b SN76496Write @ lsb goes to 0x11
4ff2d527 1272
1273
1274m_m68k_write16_ram:
1275 ldr r2, =Pico
1276 bic r0, r0, #0xff0000
1277 bic r0, r0, #1
1278 strh r1, [r2, r0]
1279 bx lr
1280
1281
1282@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1283
1284
1285m_m68k_write32_bios:
6cadc2da 1286m_m68k_write32_bcram_size: @ 0x400000
4ff2d527 1287 bx lr
1288
1289
1290m_m68k_write32_prgbank:
1291 ldr r2, =(Pico+0x22200)
1292 bic r0, r0, #1
1293 ldr r2, [r2]
1294 mov r12,#0x110000
1295 orr r3, r12, #0x002200
1296 ldr r3, [r2, r3]
1297 ldr r12,[r2, r12]
721cd396 1298 and r3, r3, #0x00030000
1299 cmp r3, #0x00010000 @ have bus or in reset state?
4ff2d527 1300 bxeq lr
1301 and r12,r12,#0xc0000000 @ r3 & 0xC0
1302 add r2, r2, r12, lsr #12
1303 m_write32_gen
1304 bx lr
1305
1306
1307m_m68k_write32_wordram0_2M: @ 0x200000 - 0x21ffff
1308m_m68k_write32_wordram1_2M: @ 0x220000 - 0x23ffff
1309 ldr r2, =(Pico+0x22200)
1310 sub r0, r0, #0x160000 @ map to our offset, which is 0x0a0000
1311 ldr r2, [r2]
1312 bic r0, r0, #1
1313 m_write32_gen
1314 bx lr
1315
1316
1317m_m68k_write32_wordram0_1M_b0: @ 0x200000 - 0x21ffff
1318 ldr r2, =(Pico+0x22200)
1319 sub r0, r0, #0x140000 @ map to our offset, which is 0x0c0000
1320 ldr r2, [r2]
1321 bic r0, r0, #1
1322 m_write32_gen
1323 bx lr
1324
1325
1326m_m68k_write32_wordram0_1M_b1: @ 0x200000 - 0x21ffff
1327 ldr r2, =(Pico+0x22200)
1328 sub r0, r0, #0x120000 @ map to our offset, which is 0x0e0000
1329 ldr r2, [r2]
1330 bic r0, r0, #1
1331 m_write32_gen
1332 bx lr
1333
1334
1335m_m68k_write32_wordram1_1M_b0: @ 0x220000 - 0x23ffff, cell arranged
1336 tst r0, #2
1337 bne m_m68k_write32_wordram1_1M_b0_unal
1338 mov r3, r1
1339 cell_map
1340 ldr r2, =(Pico+0x22200)
1341 add r0, r0, #0x0c0000
1342 ldr r2, [r2]
1343 bic r0, r0, #1
1344 mov r1, r3
1345 m_write32_gen
1346 bx lr
1347m_m68k_write32_wordram1_1M_b0_unal:
1348 @ hopefully this doesn't happen too often
1349 add r12,r0, #2
1350 mov r1, r1, ror #16
1351 stmfd sp!,{lr}
1352 bl m_m68k_write16_wordram1_1M_b0 @ must not trash r12 and keep data in r3
1353 ldmfd sp!,{lr}
1354 mov r0, r12
1355 mov r1, r3, lsr #16
1356 b m_m68k_write16_wordram1_1M_b0
1357
1358
1359m_m68k_write32_wordram1_1M_b1: @ 0x220000 - 0x23ffff, cell arranged
1360 tst r0, #2
1361 bne m_m68k_write32_wordram1_1M_b1_unal
1362 mov r3, r1
1363 cell_map
1364 ldr r2, =(Pico+0x22200)
1365 add r0, r0, #0x0e0000
1366 ldr r2, [r2]
1367 bic r0, r0, #1
1368 mov r1, r3
1369 m_write32_gen
1370 bx lr
1371m_m68k_write32_wordram1_1M_b1_unal:
1372 add r12,r0, #2
1373 mov r1, r1, ror #16
1374 stmfd sp!,{lr}
1375 bl m_m68k_write16_wordram1_1M_b1 @ same as above
1376 ldmfd sp!,{lr}
1377 mov r0, r12
1378 mov r1, r3, lsr #16
1379 b m_m68k_write16_wordram1_1M_b1
1380
1381
6cadc2da 1382m_m68k_write32_bcram: @ 0x600000 - 0x61ffff, not likely to be called
1383 mov r12,lr
1384 add r3, r0, #2
1385 mov r1, r1, ror #16
1386 bl m_m68k_write8_bcram
1387 mov r0, r3
1388 mov r1, r1, ror #16
1389 bl m_m68k_write8_bcram
1390 bx r12
1391
1392
1393m_m68k_write32_bcram_reg: @ 0x7fffff
1394 bcram_reg_rw 0, 0x7ffffc
1395
1396
1397
4ff2d527 1398@ it is not very practical to use long access on hw registers, so I assume it is not used too much.
1399m_m68k_write32_system_io:
1400 bic r2, r0, #0xfe0000
1401 bic r2, r2, #0x3f
1402 cmp r2, #0x012000
1403 bne m_m68k_write32_misc
1404 and r2, r0, #0x3e
4ff2d527 1405 cmp r2, #0x20
1406 bxge lr
6cadc2da 1407 cmp r2, #0x10
1408 bge m_m68k_write32_regs_comm
1409 cmp r2, #0x0c
1410 bge m_m68k_write32_regs_spec @ hits the nasty comm reg qiurk
4ff2d527 1411
5c69a605 1412 bic r0, r0, #1
4ff2d527 1413 stmfd sp!,{r0,r1,lr}
1414 mov r1, r1, lsr #24
1415 bl m68k_reg_write8
1416 ldr r0, [sp]
1417 ldr r1, [sp, #4]
1418 add r0, r0, #1
1419 mov r1, r1, lsr #16
1420 bl m68k_reg_write8
1421 ldr r0, [sp]
1422 ldr r1, [sp, #4]
1423 add r0, r0, #2
1424 mov r1, r1, lsr #8
1425 bl m68k_reg_write8
1426 ldmfd sp!,{r0,r1,lr}
1427 add r0, r0, #3
1428 b m68k_reg_write8
1429
6cadc2da 1430m_m68k_write32_regs_comm: @ Handle the 0x10-0x1f range
1431 ldr r0, =(Pico+0x22200)
1432 mov r3, #0xff
1433 ldr r0, [r0]
1434 orr r3, r3, r3, lsl #16
1435 add r0, r0, #0x110000
1436 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
1437 and r1, r3, r1, ror #24
1438 orr r1, r1, r12,lsl #8 @ end of byteswap
1439 cmp r2, #0x1e
1440 strh r1, [r2, r0]!
1441 ldr r3, =s68k_poll_adclk
1442 ldr r0, [r3]
1443 movne r1, r1, lsr #16
1444 strneh r1, [r2, #2]
1445 cmp r0, #0x10
1446 bxlt lr
3aa1e148 1447 ldr r0, =PicoCpuCS68k @ remove poll detected state for s68k
6cadc2da 1448 mov r1, #0
1449 str r1, [r0, #0x58]
1450 str r1, [r3]
1451 bx lr
1452
4ff2d527 1453m_m68k_write32_misc:
5c69a605 1454 bic r0, r0, #1
4ff2d527 1455 stmfd sp!,{r0,r1,lr}
1456 mov r1, r1, lsr #16
1457 bl OtherWrite16
1458 ldmfd sp!,{r0,r1,lr}
1459 add r0, r0, #2
1460 b OtherWrite16
1461
6cadc2da 1462m_m68k_write32_regs_spec:
1463 bic r0, r0, #1
1464 stmfd sp!,{r0,r1,lr}
1465 mov r1, r1, lsr #16
1466 bl m_m68k_write16_regs
1467 ldmfd sp!,{r0,r1,lr}
1468 add r0, r0, #2
1469 b m_m68k_write16_regs
1470
4ff2d527 1471
1472m_m68k_write32_vdp:
1473 tst r0, #0x70000
1474 tsteq r0, #0x000e0
1475 bxne lr @ invalid
2433f409 1476 and r2, r0, #0x18
1477 cmp r2, #0x10
1478 moveq r0, r1, lsr #16
1479 beq SN76496Write @ which game is crazy enough to do that?
4ff2d527 1480 stmfd sp!,{r0,r1,lr}
1481 mov r1, r1, lsr #16
1482 bl PicoVideoWrite
1483 ldmfd sp!,{r0,r1,lr}
1484 add r0, r0, #2
1485 b PicoVideoWrite
1486
1487
1488m_m68k_write32_ram:
1489 ldr r2, =Pico
1490 bic r0, r0, #0xff0000
1491 bic r0, r0, #1
1492 m_write32_gen
1493 bx lr
1494
1495.pool
1496
1497
1498@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1499
5c69a605 1500@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
4ff2d527 1501
5c69a605 1502
1503.macro m_s68k_read8_ram map_addr
4ff2d527 1504 ldr r1, =(Pico+0x22200)
1505 eor r0, r0, #1
1506 ldr r1, [r1]
5c69a605 1507.if \map_addr
1508 add r0, r0, #\map_addr @ map to our address
1509.endif
4ff2d527 1510 ldrb r0, [r1, r0]
1511 bx lr
5c69a605 1512.endm
4ff2d527 1513
5c69a605 1514.macro m_s68k_read8_wordram_2M_decode map_addr
1515 ldr r2, =(Pico+0x22200)
1516 eor r0, r0, #2
1517 ldr r2, [r2]
1518 movs r0, r0, lsr #1 @ +4-6 <<16
1519 add r2, r2, #\map_addr @ map to our address
1520 ldrb r0, [r2, r0]
1521 movcc r0, r0, lsr #4
1522 andcs r0, r0, #0xf
1523 bx lr
1524.endm
4ff2d527 1525
5c69a605 1526
1527m_s68k_read8_prg: @ 0x000000 - 0x07ffff
4ff2d527 1528m_s68k_read8_wordram_2M: @ 0x080000 - 0x0bffff
5c69a605 1529m_s68k_read8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1530 m_s68k_read8_ram 0x020000
4ff2d527 1531
1532
1533m_s68k_read8_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
5c69a605 1534 m_s68k_read8_wordram_2M_decode 0x080000 @ + ^ / 2
4ff2d527 1535
1536
5c69a605 1537m_s68k_read8_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1538 m_s68k_read8_wordram_2M_decode 0x0a0000 @ + ^ / 2
4ff2d527 1539
1540
5c69a605 1541m_s68k_read8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1542 m_s68k_read8_ram 0
4ff2d527 1543
1544
1545m_s68k_read8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1546 @ must not trash r3 and r12
1547 ldr r1, =(Pico+0x22200)
1548 mov r0, r0, lsr #1
1549 ldr r1, [r1]
1550 bic r0, r0, #0xff0000
5c69a605 1551 bic r0, r0, #0x00e000
4ff2d527 1552 add r1, r1, #0x110000
1553 add r1, r1, #0x000200
1554 ldrb r0, [r1, r0]
1555 bx lr
1556
1557
1558m_s68k_read8_pcm:
1559 @ must not trash r3 and r12
1560 ldr r1, =(Pico+0x22200)
1561 bic r0, r0, #0xff0000
1562@ bic r0, r0, #0x008000
1563 ldr r1, [r1]
1564 mov r2, #0x110000
1565 orr r2, r2, #0x002200
1566 cmp r0, #0x2000
1567 bge m_s68k_read8_pcm_ram
1568 cmp r0, #0x20
1569 movlt r0, #0
1570 bxlt lr
1571 orr r2, r2, #(0x48+8) @ pcm.ch + addr_offset
1572 add r1, r1, r2
1573 and r2, r0, #0x1c
1574 ldr r1, [r1, r2, lsl #2]
1575 tst r0, #2
1576 moveq r0, r1, lsr #PCM_STEP_SHIFT
1577 movne r0, r1, lsr #(PCM_STEP_SHIFT+8)
1578 and r0, r0, #0xff
1579 bx lr
1580
1581m_s68k_read8_pcm_ram:
1582 orr r2, r2, #0x40
1583 ldr r2, [r1, r2]
1584 add r1, r1, #0x100000 @ pcm_ram
1585 and r2, r2, #0x0f000000 @ bank
1586 add r1, r1, r2, lsr #12
1587 bic r0, r0, #0x00e000
1588 mov r0, r0, lsr #1
1589 ldrb r0, [r1, r0]
1590 bx lr
1591
1592
1593m_s68k_read8_regs:
1594 bic r0, r0, #0xff0000
1595 bic r0, r0, #0x008000
1596 tst r0, #0x7e00
1597 movne r0, #0
1598 bxne lr
2433f409 1599 sub r2, r0, #0x0e
1600 cmp r2, #(0x30-0x0e)
1601 blo m_s68k_read8_comm
4ff2d527 1602 sub r2, r0, #0x58
1603 cmp r2, #0x10
1604 ldrlo r2, =gfx_cd_read
1605 ldrhs r2, =s68k_reg_read16
1606 stmfd sp!,{r0,lr}
1607 bic r0, r0, #1
1608 mov lr, pc
1609 bx r2
1610 ldmfd sp!,{r1,lr}
1611 tst r1, #1
1612 moveq r0, r0, lsr #8
1613 and r0, r0, #0xff
1614 bx lr
1615
2433f409 1616m_s68k_read8_comm:
1617 ldr r1, =(Pico+0x22200)
1618 ldr r1, [r1]
1619 add r1, r1, #0x110000
1620 ldrb r1, [r1, r0]
1621 b s68k_poll_detect
1622
4ff2d527 1623
1624@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1625
1626
5c69a605 1627.macro m_s68k_read16_ram map_addr
4ff2d527 1628 ldr r1, =(Pico+0x22200)
1629 bic r0, r0, #1
1630 ldr r1, [r1]
5c69a605 1631.if \map_addr
1632 add r0, r0, #\map_addr @ map to our address
1633.endif
4ff2d527 1634 ldrh r0, [r1, r0]
1635 bx lr
5c69a605 1636.endm
1637
1638.macro m_s68k_read16_wordram_2M_decode map_addr
1639 ldr r2, =(Pico+0x22200)
1640 eor r0, r0, #2
1641 ldr r2, [r2]
1642 mov r0, r0, lsr #1 @ +4-6 <<16
1643 add r2, r2, #\map_addr @ map to our address
1644 ldrb r0, [r2, r0]
1645 orr r0, r0, r0, lsl #4
1646 bic r0, r0, #0xf0
1647 bx lr
1648.endm
4ff2d527 1649
1650
5c69a605 1651m_s68k_read16_prg: @ 0x000000 - 0x07ffff
4ff2d527 1652m_s68k_read16_wordram_2M: @ 0x080000 - 0x0bffff
5c69a605 1653m_s68k_read16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1654 m_s68k_read16_ram 0x020000
4ff2d527 1655
1656
1657m_s68k_read16_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
5c69a605 1658 m_s68k_read16_wordram_2M_decode 0x080000
4ff2d527 1659
1660
5c69a605 1661m_s68k_read16_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1662 m_s68k_read16_wordram_2M_decode 0x0a0000
4ff2d527 1663
1664
5c69a605 1665m_s68k_read16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1666 m_s68k_read16_ram 0
4ff2d527 1667
1668
1669@ m_s68k_read16_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1670@ bram is not meant to be accessed by words, does any game do this?
1671.equiv m_s68k_read16_backup, m_s68k_read8_backup
1672
1673
1674@ m_s68k_read16_pcm:
1675@ pcm is on 8-bit bus, would this be same as byte access?
1676.equiv m_s68k_read16_pcm, m_s68k_read8_pcm
1677
1678
1679m_s68k_read16_regs:
1680 bic r0, r0, #0xff0000
1681 bic r0, r0, #0x008000
1682 bic r0, r0, #0x000001
1683 tst r0, #0x7e00
1684 movne r0, #0
1685 bxne lr
1686 sub r2, r0, #0x58
1687 cmp r2, #0x10
1688 blo gfx_cd_read
7a1f6e45 1689 cmp r0, #8
1690 bne s68k_reg_read16
1691 mov r0, #1
1692 b Read_CDC_Host
4ff2d527 1693
1694
1695@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1696
1697
5c69a605 1698.macro m_s68k_read32_ram map_addr
4ff2d527 1699 ldr r1, =(Pico+0x22200)
1700 bic r0, r0, #1
1701 ldr r1, [r1]
5c69a605 1702.if \map_addr
1703 add r0, r0, #\map_addr @ map to our address
1704.endif
4ff2d527 1705 m_read32_gen
1706 bx lr
5c69a605 1707.endm
1708
1709.macro m_s68k_read32_wordram_2M_decode map_addr
1710 ldr r2, =(Pico+0x22200)
1711 eor r0, r0, #2
1712 ldr r2, [r2]
1713 mov r0, r0, lsr #1 @ +4-6 <<16
1714 add r2, r2, #\map_addr @ map to our address
1715 ldrb r1, [r2, r0]!
1716 tst r0, #1
1717 ldrneb r0, [r2, #-1]
1718 ldreqb r0, [r2, #2]
1719 orr r1, r1, r1, lsl #4
1720 bic r1, r1, #0xf0
1721 orr r0, r0, r0, lsl #4
1722 bic r0, r0, #0xf0
1723 orr r0, r0, r1, lsl #16
1724 bx lr
1725.endm
4ff2d527 1726
1727
5c69a605 1728m_s68k_read32_prg: @ 0x000000 - 0x07ffff
4ff2d527 1729m_s68k_read32_wordram_2M: @ 0x080000 - 0x0bffff
5c69a605 1730m_s68k_read32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1731 m_s68k_read32_ram 0x020000
4ff2d527 1732
1733
1734m_s68k_read32_wordram_2M_decode_b0: @ 0x080000 - 0x0bffff
5c69a605 1735 m_s68k_read32_wordram_2M_decode 0x080000
4ff2d527 1736
1737
5c69a605 1738m_s68k_read32_wordram_2M_decode_b1: @ 0x080000 - 0x0bffff
1739 m_s68k_read32_wordram_2M_decode 0x0a0000
4ff2d527 1740
1741
5c69a605 1742m_s68k_read32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
1743 m_s68k_read32_ram 0
4ff2d527 1744
1745
1746m_s68k_read32_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1747 @ bram is not meant to be accessed by words, does any game do this?
1748 mov r12,lr
1749 mov r3, r0
1750 bl m_s68k_read8_backup @ must preserve r3 and r12
1751 mov r1, r0
1752 add r0, r3, #2
1753 mov r3, r1
1754 bl m_s68k_read8_backup
1755 orr r0, r0, r3, lsl #16
1756 bx r12
1757
1758
1759m_s68k_read32_pcm:
1760 mov r12,lr
1761 mov r3, r0
1762 bl m_s68k_read8_pcm @ must preserve r3 and r12
1763 mov r1, r0
1764 add r0, r3, #2
1765 mov r3, r1
1766 bl m_s68k_read8_pcm
1767 orr r0, r0, r3, lsl #16
1768 bx r12
1769
1770
1771m_s68k_read32_regs:
1772 bic r0, r0, #0xff0000
1773 bic r0, r0, #0x008000
1774 bic r0, r0, #0x000001
1775 tst r0, #0x7e00
1776 movne r0, #0
1777 bxne lr
1778 sub r2, r0, #0x58
1779 cmp r2, #0x10
1780 add r1, r0, #2
1781 blo m_s68k_read32_regs_gfx
1782 stmfd sp!,{r1,lr}
1783 bl s68k_reg_read16
1784 swp r0, r0, [sp]
1785 bl s68k_reg_read16
1786 ldmfd sp!,{r1,lr}
1787 orr r0, r0, r1, lsl #16
1788 bx lr
1789
1790
1791m_s68k_read32_regs_gfx:
1792 stmfd sp!,{r1,lr}
1793 bl gfx_cd_read
1794 swp r0, r0, [sp]
1795 bl gfx_cd_read
1796 ldmfd sp!,{r1,lr}
1797 orr r0, r0, r1, lsl #16
1798 bx lr
1799
1800.pool
1801
1802@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1803
1804
5c69a605 1805.macro m_s68k_write8_ram map_addr
4ff2d527 1806 ldr r2, =(Pico+0x22200)
1807 eor r0, r0, #1
1808 ldr r2, [r2]
5c69a605 1809.if \map_addr
1810 add r0, r0, #\map_addr @ map to our address
1811.endif
4ff2d527 1812 strb r1, [r2, r0]
1813 bx lr
5c69a605 1814.endm
4ff2d527 1815
48e8482f 1816.macro m_s68k_write8_2M_decode map_addr
1817 ldr r2, =(Pico+0x22200)
1818 eor r0, r0, #2
1819 ldr r2, [r2]
1820 movs r0, r0, lsr #1 @ +4-6 <<16
1821 add r2, r2, #\map_addr @ map to our address
1822.endm
1823
1824.macro m_s68k_write8_2M_decode_m0 map_addr @ mode off
1825 m_s68k_write8_2M_decode \map_addr
1826 ldrb r0, [r2, r0]!
1827 and r1, r1, #0x0f
1828 movcc r1, r1, lsl #4
1829 andcc r3, r0, #0x0f
1830 andcs r3, r0, #0xf0
1831 orr r3, r3, r1
1832 cmp r0, r3 @ avoid writing if result is same
1833 strneb r3, [r2]
1834 bx lr
1835.endm
1836
1837.macro m_s68k_write8_2M_decode_m1 map_addr @ mode underwrite
1838 ands r1, r1, #0x0f
1839 bxeq lr
1840 m_s68k_write8_2M_decode \map_addr
1841 ldrb r0, [r2, r0]!
1842 movcc r1, r1, lsl #4
1843 andcc r3, r0, #0x0f
1844 andcs r3, r0, #0xf0
1845 tst r3, r3
1846 bxeq lr
1847 orr r3, r3, r1
1848 cmp r0, r3
1849 strneb r3, [r2]
1850 bx lr
1851.endm
1852
1853.macro m_s68k_write8_2M_decode_m2 map_addr @ mode overwrite
1854 ands r1, r1, #0x0f
1855 bxeq lr
1856 m_s68k_write8_2M_decode_m0 \map_addr @ same as in off mode
1857.endm
1858
1859
4ff2d527 1860
5c69a605 1861m_s68k_write8_prg: @ 0x000000 - 0x07ffff
721cd396 1862 ldr r2, =(Pico+0x22200)
1863 eor r0, r0, #1
1864 ldr r2, [r2]
1865 add r3, r0, #0x020000 @ map to our address
1866 add r12,r2, #0x110000
1867 ldr r12,[r12]
1868 and r12,r12,#0x00ff0000 @ wp
1869 cmp r0, r12, lsr #8
1870 strgeb r1, [r2, r3]
1871 bx lr
1872
1873
4ff2d527 1874m_s68k_write8_wordram_2M: @ 0x080000 - 0x0bffff
5c69a605 1875m_s68k_write8_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
1876 m_s68k_write8_ram 0x020000
4ff2d527 1877
1878
48e8482f 1879m_s68k_write8_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
1880 m_s68k_write8_2M_decode_m0 0x080000
1881
1882m_s68k_write8_2M_decode_b0_m1:
1883 m_s68k_write8_2M_decode_m1 0x080000
1884
1885m_s68k_write8_2M_decode_b0_m2:
1886 m_s68k_write8_2M_decode_m2 0x080000
1887
1888m_s68k_write8_2M_decode_b1_m0:
1889 m_s68k_write8_2M_decode_m0 0x0a0000
1890
1891m_s68k_write8_2M_decode_b1_m1:
1892 m_s68k_write8_2M_decode_m1 0x0a0000
1893
1894m_s68k_write8_2M_decode_b1_m2:
1895 m_s68k_write8_2M_decode_m2 0x0a0000
4ff2d527 1896
1897
1898m_s68k_write8_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
5c69a605 1899 m_s68k_write8_ram 0
4ff2d527 1900
1901
1902m_s68k_write8_backup: @ 0xfe0000 - 0xfe3fff (repeated?)
1903 @ must not trash r3 and r12
1904 ldr r2, =(Pico+0x22200)
1905 mov r0, r0, lsr #1
1906 ldr r2, [r2]
1907 bic r0, r0, #0xff0000
5c69a605 1908 bic r0, r0, #0x00e000
4ff2d527 1909 add r2, r2, #0x110000
1910 add r2, r2, #0x000200
1911 strb r1, [r2, r0]
1912 ldr r1, =SRam
1913 mov r0, #1
7a1f6e45 1914 strb r0, [r1, #0x0e] @ SRam.changed = 1
4ff2d527 1915 bx lr
1916
1917
1918m_s68k_write8_pcm:
1919 bic r0, r0, #0xff0000
1920 cmp r0, #0x12
1921 movlt r0, r0, lsr #1
1922 blt pcm_write
1923
1924 cmp r0, #0x2000
1925 bxlt lr
1926
1927m_s68k_write8_pcm_ram:
1928 ldr r3, =(Pico+0x22200)
1929 bic r0, r0, #0x00e000
1930 ldr r3, [r3]
1931 mov r0, r0, lsr #1
1932 add r2, r3, #0x110000
1933 add r2, r2, #0x002200
1934 add r2, r2, #0x000040
1935 ldr r2, [r2]
1936 add r3, r3, #0x100000 @ pcm_ram
1937 and r2, r2, #0x0f000000 @ bank
1938 add r3, r3, r2, lsr #12
1939 strb r1, [r3, r0]
1940 bx lr
1941
1942
1943m_s68k_write8_regs:
1944 bic r0, r0, #0xff0000
1945 bic r0, r0, #0x008000
1946 tst r0, #0x7e00
1947 movne r0, #0
1948 bxne lr
1949 sub r2, r0, #0x58
1950 cmp r2, #0x10
5c69a605 1951 bhs s68k_reg_write8
1952 bic r0, r0, #1
1953 orr r1, r1, r1, lsl #8
1954 b gfx_cd_write16
4ff2d527 1955
1956
1957@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
1958
1959
5c69a605 1960.macro m_s68k_write16_ram map_addr
4ff2d527 1961 ldr r2, =(Pico+0x22200)
1962 bic r0, r0, #1
1963 ldr r2, [r2]
5c69a605 1964.if \map_addr
1965 add r0, r0, #\map_addr @ map to our address
1966.endif
4ff2d527 1967 strh r1, [r2, r0]
1968 bx lr
5c69a605 1969.endm
4ff2d527 1970
48e8482f 1971.macro m_s68k_write16_2M_decode map_addr
1972 ldr r2, =(Pico+0x22200)
1973 eor r0, r0, #2
1974 ldr r2, [r2]
1975 mov r0, r0, lsr #1 @ +4-6 <<16
1976 add r2, r2, #\map_addr @ map to our address
1977.endm
1978
1979.macro m_s68k_write16_2M_decode_m0 map_addr @ mode off
1980 m_s68k_write16_2M_decode \map_addr
1981 bic r1, r1, #0xf0
1982 orr r1, r1, r1, lsr #4
1983 strb r1, [r2, r0]
1984 bx lr
1985.endm
1986
1987.macro m_s68k_write16_2M_decode_m1 map_addr @ mode underwrite
1988 bics r1, r1, #0xf000
1989 bicnes r1, r1, #0x00f0
1990 bxeq lr
1991 orr r1, r1, r1, lsr #4
1992 m_s68k_write16_2M_decode \map_addr
1993 ldrb r0, [r2, r0]!
1994 and r3, r1, #0x0f
1995 and r1, r1, #0xf0
1996 tst r0, #0x0f
1997 orreq r0, r0, r3
1998 tst r0, #0xf0
1999 orreq r0, r0, r1
2000 strb r0, [r2]
2001 bx lr
2002.endm
2003
2004.macro m_s68k_write16_2M_decode_m2 map_addr @ mode overwrite
2005 bics r1, r1, #0xf000
2006 bicnes r1, r1, #0x00f0
2007 bxeq lr
2008 orr r1, r1, r1, lsr #4
2009 m_s68k_write16_2M_decode \map_addr
2010 ldrb r0, [r2, r0]!
2011 ands r3, r1, #0x0f
2012 andne r0, r0, #0xf0
2013 orrne r0, r0, r3
2014 ands r1, r1, #0xf0
2015 andne r0, r0, #0x0f
2016 orrne r0, r0, r1
2017 strb r0, [r2]
2018 bx lr
2019.endm
2020
2021
4ff2d527 2022
5c69a605 2023m_s68k_write16_prg: @ 0x000000 - 0x07ffff
721cd396 2024 ldr r2, =(Pico+0x22200)
2025 bic r0, r0, #1
2026 ldr r2, [r2]
2027 add r3, r0, #0x020000 @ map to our address
2028 add r12,r2, #0x110000
2029 ldr r12,[r12]
2030 and r12,r12,#0x00ff0000 @ wp
2031 cmp r0, r12, lsr #8
2032 strgeh r1, [r2, r3]
2033 bx lr
2034
2035
4ff2d527 2036m_s68k_write16_wordram_2M: @ 0x080000 - 0x0bffff
5c69a605 2037m_s68k_write16_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
2038 m_s68k_write16_ram 0x020000
4ff2d527 2039
2040
48e8482f 2041m_s68k_write16_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
2042 m_s68k_write16_2M_decode_m0 0x080000
2043
2044m_s68k_write16_2M_decode_b0_m1:
2045 m_s68k_write16_2M_decode_m1 0x080000
2046
2047m_s68k_write16_2M_decode_b0_m2:
2048 m_s68k_write16_2M_decode_m2 0x080000
2049
2050m_s68k_write16_2M_decode_b1_m0:
2051 m_s68k_write16_2M_decode_m0 0x0a0000
2052
2053m_s68k_write16_2M_decode_b1_m1:
2054 m_s68k_write16_2M_decode_m1 0x0a0000
2055
2056m_s68k_write16_2M_decode_b1_m2:
2057 m_s68k_write16_2M_decode_m2 0x0a0000
4ff2d527 2058
2059
2060m_s68k_write16_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
5c69a605 2061 m_s68k_write16_ram 0
4ff2d527 2062
2063
2064@ m_s68k_write16_backup:
2065.equiv m_s68k_write16_backup, m_s68k_write8_backup
2066
2067
2068@ m_s68k_write16_pcm:
2069.equiv m_s68k_write16_pcm, m_s68k_write8_pcm
2070
2071
2072m_s68k_write16_regs:
2073 bic r0, r0, #0xff0000
2074 bic r0, r0, #0x008000
5c69a605 2075 bic r0, r0, #1
4ff2d527 2076 tst r0, #0x7e00
2077 movne r0, #0
2078 bxne lr
5c69a605 2079 cmp r0, #0x0e
2080 beq m_s68k_write16_regs_spec
4ff2d527 2081 sub r2, r0, #0x58
2082 cmp r2, #0x10
5c69a605 2083 blo gfx_cd_write16
4ff2d527 2084 and r3, r1, #0xff
2085 add r2, r0, #1
4ff2d527 2086 stmfd sp!,{r2,r3,lr}
2087 mov r1, r1, lsr #8
2088 bl s68k_reg_write8
2089 ldmfd sp!,{r0,r1,lr}
2090 b s68k_reg_write8
2091
5c69a605 2092m_s68k_write16_regs_spec: @ special case
2093 ldr r2, =(Pico+0x22200)
2094 mov r0, #0x110000
2095 ldr r2, [r2]
2096 add r0, r0, #0x00000f
2097 strb r1, [r2, r0] @ if (a == 0xe) s68k_regs[0xf] = d;
48e8482f 2098 bx lr
4ff2d527 2099
2100
2101@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
2102
2103
5c69a605 2104.macro m_s68k_write32_ram map_addr
4ff2d527 2105 ldr r2, =(Pico+0x22200)
2106 bic r0, r0, #1
2107 ldr r2, [r2]
5c69a605 2108.if \map_addr
2109 add r0, r0, #\map_addr @ map to our address
2110.endif
4ff2d527 2111 m_write32_gen
2112 bx lr
5c69a605 2113.endm
4ff2d527 2114
48e8482f 2115.macro m_s68k_write32_2M_decode map_addr
2116 ldr r2, =(Pico+0x22200)
2117 eor r0, r0, #2
2118 ldr r2, [r2]
2119 mov r0, r0, lsr #1 @ +4-6 <<16
2120 add r2, r2, #\map_addr @ map to our address
2121.endm
2122
2123.macro m_s68k_write32_2M_decode_m0 map_addr @ mode off
2124 m_s68k_write32_2M_decode \map_addr
2125 bic r1, r1, #0x000000f0
2126 bic r1, r1, #0x00f00000
2127 orr r1, r1, r1, lsr #4
2128 mov r3, r1, lsr #16
2129 strb r3, [r2, r0]!
2130 tst r0, #1
2131 strneb r1, [r2, #-1]
2132 streqb r1, [r2, #3]
2133 bx lr
2134.endm
2135
2136.macro m_s68k_write32_2M_decode_m1 map_addr @ mode underwrite
2137 bics r1, r1, #0x000000f0
2138 bicnes r1, r1, #0x0000f000
2139 bicnes r1, r1, #0x00f00000
2140 bicnes r1, r1, #0xf0000000
2141 bxeq lr
2142 orr r1, r1, r1, lsr #4
2143 m_s68k_write32_2M_decode \map_addr
2144 ldrb r3, [r2, r0]!
2145 tst r0, #1
2146 ldrneb r0, [r2, #-1]
2147 ldreqb r0, [r2, #3]
2148 and r12,r1, #0x0000000f
2149 orr r0, r0, r3, lsl #16
2150 orrne r0, r0, #0x80000000 @ remember addr lsb bit
2151 tst r0, #0x0000000f
2152 orreq r0, r0, r12
2153 tst r0, #0x000000f0
2154 andeq r12,r1, #0x000000f0
2155 orreq r0, r0, r12
2156 tst r0, #0x000f0000
2157 andeq r12,r1, #0x000f0000
2158 orreq r0, r0, r12
2159 tst r0, #0x00f00000
2160 andeq r12,r1, #0x00f00000
2161 orreq r0, r0, r12
2162 tst r0, #0x80000000
2163 strneb r0, [r2, #-1]
2164 streqb r0, [r2, #3]
2165 mov r0, r0, lsr #16
2166 strb r0, [r2]
2167 bx lr
2168.endm
2169
2170.macro m_s68k_write32_2M_decode_m2 map_addr @ mode overwrite
2171 bics r1, r1, #0x000000f0
2172 bicnes r1, r1, #0x0000f000
2173 bicnes r1, r1, #0x00f00000
2174 bicnes r1, r1, #0xf0000000
2175 bxeq lr
2176 orr r1, r1, r1, lsr #4
2177 m_s68k_write32_2M_decode \map_addr
2178 ldrb r3, [r2, r0]!
2179 tst r0, #1
2180 ldrneb r0, [r2, #-1]
2181 ldreqb r0, [r2, #3]
2182 orrne r1, r1, #0x80000000 @ remember addr lsb bit
2183 orr r0, r0, r3, lsl #16
2184 tst r1, #0x0000000f
2185 andeq r12,r0, #0x0000000f
2186 orreq r1, r1, r12
2187 tst r1, #0x000000f0
2188 andeq r12,r0, #0x000000f0
2189 orreq r1, r1, r12
2190 tst r1, #0x000f0000
2191 andeq r12,r0, #0x000f0000
2192 orreq r1, r1, r12
2193 tst r1, #0x00f00000
2194 andeq r12,r0, #0x00f00000
2195 orreq r1, r1, r12
2196 cmp r0, r1
2197 bxeq lr
2198 tst r1, #0x80000000
2199 strneb r1, [r2, #-1]
2200 streqb r1, [r2, #3]
2201 mov r1, r1, lsr #16
2202 strb r1, [r2]
2203 bx lr
2204.endm
2205
2206
4ff2d527 2207
5c69a605 2208m_s68k_write32_prg: @ 0x000000 - 0x07ffff
721cd396 2209 ldr r2, =(Pico+0x22200)
2210 bic r0, r0, #1
2211 ldr r2, [r2]
2212 add r3, r0, #0x020000 @ map to our address
2213 add r12,r2, #0x110000
2214 ldr r12,[r12]
2215 and r12,r12,#0x00ff0000 @ wp
2216 cmp r0, r12, lsr #8
2217 bxlt lr
2218 mov r0, r1, lsr #16
2219 strh r0, [r2, r3]!
2220 strh r1, [r2, #2]
2221 bx lr
2222
2223
4ff2d527 2224m_s68k_write32_wordram_2M: @ 0x080000 - 0x0bffff
5c69a605 2225m_s68k_write32_wordram_1M_b1: @ 0x0c0000 - 0x0dffff, maps to 0x0e0000
2226 m_s68k_write32_ram 0x020000
4ff2d527 2227
2228
48e8482f 2229m_s68k_write32_2M_decode_b0_m0: @ 0x080000 - 0x0bffff
2230 m_s68k_write32_2M_decode_m0 0x080000
2231
2232m_s68k_write32_2M_decode_b0_m1:
2233 m_s68k_write32_2M_decode_m1 0x080000
2234
2235m_s68k_write32_2M_decode_b0_m2:
2236 m_s68k_write32_2M_decode_m2 0x080000
2237
2238m_s68k_write32_2M_decode_b1_m0:
2239 m_s68k_write32_2M_decode_m0 0x0a0000
2240
2241m_s68k_write32_2M_decode_b1_m1:
2242 m_s68k_write32_2M_decode_m1 0x0a0000
2243
2244m_s68k_write32_2M_decode_b1_m2:
2245 m_s68k_write32_2M_decode_m2 0x0a0000
4ff2d527 2246
2247
2248m_s68k_write32_wordram_1M_b0: @ 0x0c0000 - 0x0dffff (same as our offset :)
5c69a605 2249 m_s68k_write32_ram 0
4ff2d527 2250
2251
2252m_s68k_write32_backup:
2253 add r12,r0, #2
2254 mov r3, r1
2255 mov r1, r1, lsr #16
2256 stmfd sp!,{lr}
2257 bl m_s68k_write8_backup @ must preserve r3 and r12
2258 ldmfd sp!,{lr}
2259 mov r0, r12
2260 mov r1, r3
2261 b m_s68k_write8_backup
2262
2263
2264m_s68k_write32_pcm:
2265 bic r0, r0, #0xff0000
2266 cmp r0, #0x12
2267 blt m_s68k_write32_pcm_reg
2268
2269 cmp r0, #0x2000
2270 bxlt lr
2271
2272m_s68k_write32_pcm_ram:
2273 ldr r3, =(Pico+0x22200)
2274 bic r0, r0, #0x00e000
2275 ldr r3, [r3]
2276 mov r0, r0, lsr #1
2277 add r2, r3, #0x110000
2278 add r2, r2, #0x002200
2279 add r2, r2, #0x000040
2280 ldr r2, [r2]
2281 add r3, r3, #0x100000 @ pcm_ram
2282 and r2, r2, #0x0f000000 @ bank
2283 add r3, r3, r2, lsr #12
2284 mov r1, r1, ror #16
2285 strb r1, [r3, r0]!
2286 mov r1, r1, ror #16
2287 strb r1, [r3]
2288 bx lr
2289
2290m_s68k_write32_pcm_reg:
2291 mov r0, r0, lsr #1
6cadc2da 2292 stmfd sp!,{r0,r1,lr}
4ff2d527 2293 mov r1, r1, lsr #16
2294 bl pcm_write
2295 ldmfd sp!,{r0,r1,lr}
6cadc2da 2296 add r0, r0, #1
4ff2d527 2297 b pcm_write
2298
2299
2300m_s68k_write32_regs:
2301 bic r0, r0, #0xff0000
2302 bic r0, r0, #0x008000
5c69a605 2303 bic r0, r0, #1
4ff2d527 2304 tst r0, #0x7e00
4ff2d527 2305 bxne lr
2306 sub r2, r0, #0x58
2307 cmp r2, #0x10
2308 blo m_s68k_write32_regs_gfx
6cadc2da 2309 and r2, r0, #0x1fc
2310 cmp r2, #0x0c
2311 beq m_s68k_write32_regs_spec @ hits 0x0f
2312 and r2, r0, #0x1f0
2313 cmp r2, #0x20
2314 beq m_s68k_write32_regs_comm
4ff2d527 2315
2316 stmfd sp!,{r0,r1,lr}
2317 mov r1, r1, lsr #24
2318 bl s68k_reg_write8
2319 ldr r0, [sp]
2320 ldr r1, [sp, #4]
2321 add r0, r0, #1
2322 mov r1, r1, lsr #16
2323 bl s68k_reg_write8
2324 ldr r0, [sp]
2325 ldr r1, [sp, #4]
2326 add r0, r0, #2
2327 mov r1, r1, lsr #8
2328 bl s68k_reg_write8
2329 ldmfd sp!,{r0,r1,lr}
2330 add r0, r0, #3
2331 b s68k_reg_write8
2332
2333m_s68k_write32_regs_gfx:
6cadc2da 2334 stmfd sp!,{r0,r1,lr}
4ff2d527 2335 mov r1, r1, lsr #16
5c69a605 2336 bl gfx_cd_write16
4ff2d527 2337 ldmfd sp!,{r0,r1,lr}
6cadc2da 2338 add r0, r0, #2
5c69a605 2339 b gfx_cd_write16
4ff2d527 2340
6cadc2da 2341m_s68k_write32_regs_comm: @ Handle the 0x20-0x2f range
2342 ldr r2, =(Pico+0x22200)
2343 mov r3, #0xff
2344 ldr r2, [r2]
2345 orr r3, r3, r3, lsl #16
2346 add r2, r2, #0x110000
2347 and r12,r3, r1, ror #16 @ data is big-endian to be written as little, have to byteswap
2348 and r1, r3, r1, ror #24
2349 orr r1, r1, r12,lsl #8 @ end of byteswap
2350 cmp r0, #0x2e
2351 strh r1, [r0, r2]!
2352 movne r1, r1, lsr #16
2353 strneh r1, [r0, #2]
2354 bx lr
2355
2356m_s68k_write32_regs_spec:
2357 stmfd sp!,{r0,r1,lr}
2358 mov r1, r1, lsr #16
2359 bl m_s68k_write16_regs
2360 ldmfd sp!,{r0,r1,lr}
2361 add r0, r0, #2
2362 b m_s68k_write16_regs
2363
2364