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1 | // (c) Copyright 2006 notaz, All rights reserved. |
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2 | |
3 | |
4 | #include "../PicoInt.h" |
5 | |
6 | |
7 | int SekCycleCntS68k=0; // cycles done in this frame |
8 | int SekCycleAimS68k=0; // cycle aim |
9 | |
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10 | #ifdef EMU_C68K |
11 | // ---------------------- Cyclone 68000 ---------------------- |
12 | struct Cyclone PicoCpuS68k; |
13 | #endif |
14 | |
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15 | #ifdef EMU_M68K |
16 | // ---------------------- MUSASHI 68000 ---------------------- |
17 | m68ki_cpu_core PicoS68kCPU; // Mega CD's CPU |
18 | #endif |
19 | |
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20 | static int new_irq_level(int level) |
21 | { |
22 | int level_new = 0, irqs; |
23 | Pico_mcd->m.s68k_pend_ints &= ~(1 << level); |
24 | irqs = Pico_mcd->m.s68k_pend_ints; |
25 | irqs &= Pico_mcd->s68k_regs[0x33]; |
26 | while ((irqs >>= 1)) level_new++; |
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27 | |
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28 | return level_new; |
29 | } |
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30 | |
31 | #ifdef EMU_M68K |
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32 | static int SekIntAckS68kM(int level) |
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33 | { |
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34 | int level_new = new_irq_level(level); |
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35 | dprintf("s68kACK %i -> %i", level, level_new); |
36 | CPU_INT_LEVEL = level_new << 8; |
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37 | return M68K_INT_ACK_AUTOVECTOR; |
38 | } |
39 | #endif |
40 | |
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41 | #ifdef EMU_C68K |
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42 | // interrupt acknowledgement |
43 | static int SekIntAckS68k(int level) |
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44 | { |
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45 | int level_new = new_irq_level(level); |
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46 | |
47 | dprintf("s68kACK %i -> %i", level, level_new); |
48 | PicoCpuS68k.irq = level_new; |
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49 | return CYCLONE_INT_ACK_AUTOVECTOR; |
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50 | } |
51 | |
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52 | static void SekResetAckS68k(void) |
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53 | { |
54 | dprintf("s68k: Reset encountered @ %06x", SekPcS68k); |
55 | } |
56 | |
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57 | static int SekUnrecognizedOpcodeS68k(void) |
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58 | { |
59 | unsigned int pc, op; |
60 | pc = SekPcS68k; |
61 | op = PicoCpuS68k.read16(pc); |
62 | dprintf("Unrecognized Opcode %04x @ %06x", op, pc); |
63 | //exit(1); |
64 | return 0; |
65 | } |
66 | #endif |
67 | |
68 | |
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69 | |
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70 | PICO_INTERNAL int SekInitS68k() |
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71 | { |
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72 | #ifdef EMU_C68K |
73 | // CycloneInit(); |
74 | memset(&PicoCpuS68k,0,sizeof(PicoCpuS68k)); |
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75 | PicoCpuS68k.IrqCallback=SekIntAckS68k; |
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76 | PicoCpuS68k.ResetCallback=SekResetAckS68k; |
77 | PicoCpuS68k.UnrecognizedCallback=SekUnrecognizedOpcodeS68k; |
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78 | #endif |
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79 | #ifdef EMU_M68K |
80 | { |
81 | // Musashi is not very context friendly.. |
82 | void *oldcontext = m68ki_cpu_p; |
83 | m68k_set_context(&PicoS68kCPU); |
84 | m68k_set_cpu_type(M68K_CPU_TYPE_68000); |
85 | m68k_init(); |
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86 | m68k_set_int_ack_callback(SekIntAckS68kM); |
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87 | // m68k_pulse_reset(); // not yet, memmap is not set up |
88 | m68k_set_context(oldcontext); |
89 | } |
90 | #endif |
91 | |
92 | return 0; |
93 | } |
94 | |
95 | // Reset the 68000: |
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96 | PICO_INTERNAL int SekResetS68k() |
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97 | { |
98 | if (Pico.rom==NULL) return 1; |
99 | |
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100 | #ifdef EMU_C68K |
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101 | PicoCpuS68k.state_flags=0; |
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102 | PicoCpuS68k.osp=0; |
103 | PicoCpuS68k.srh =0x27; // Supervisor mode |
104 | PicoCpuS68k.flags=4; // Z set |
105 | PicoCpuS68k.irq=0; |
106 | PicoCpuS68k.a[7]=PicoCpuS68k.read32(0); // Stack Pointer |
107 | PicoCpuS68k.membase=0; |
108 | PicoCpuS68k.pc=PicoCpuS68k.checkpc(PicoCpuS68k.read32(4)); // Program Counter |
109 | #endif |
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110 | #ifdef EMU_M68K |
111 | { |
112 | void *oldcontext = m68ki_cpu_p; |
113 | |
114 | m68k_set_context(&PicoS68kCPU); |
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115 | m68ki_cpu.sp[0]=0; |
116 | m68k_set_irq(0); |
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117 | m68k_pulse_reset(); |
118 | m68k_set_context(oldcontext); |
119 | } |
120 | #endif |
121 | |
122 | return 0; |
123 | } |
124 | |
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125 | PICO_INTERNAL int SekInterruptS68k(int irq) |
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126 | { |
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127 | int irqs, real_irq = 1; |
128 | Pico_mcd->m.s68k_pend_ints |= 1 << irq; |
129 | irqs = Pico_mcd->m.s68k_pend_ints >> 1; |
130 | while ((irqs >>= 1)) real_irq++; // this is probably only needed for Cyclone |
131 | |
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132 | #ifdef EMU_C68K |
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133 | PicoCpuS68k.irq=real_irq; |
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134 | #endif |
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135 | #ifdef EMU_M68K |
136 | void *oldcontext = m68ki_cpu_p; |
137 | m68k_set_context(&PicoS68kCPU); |
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138 | m68k_set_irq(real_irq); // raise irq (gets lowered after taken or must be done in ack) |
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139 | m68k_set_context(oldcontext); |
140 | #endif |
141 | return 0; |
142 | } |
143 | |