code review and optimizations
[picodrive.git] / cpu / Cyclone / Main.cpp
CommitLineData
cc68a136 1\r
2#include "app.h"\r
3\r
4static FILE *AsmFile=NULL;\r
5\r
cfb3dfa0 6static int CycloneVer=0x0087; // Version number of library\r
cc68a136 7int *CyJump=NULL; // Jump table\r
8int ms=USE_MS_SYNTAX; // If non-zero, output in Microsoft ARMASM format\r
9char *Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2\r
10char *Sarm[4]={"sb","sh","",""}; // Sign-extend ARM Extensions for operand sizes 0,1,2\r
11int Cycles; // Current cycles for opcode\r
cfb3dfa0 12int pc_dirty; // something changed PC during processing\r
b637c56a 13static int arm_op_count;\r
cc68a136 14\r
15\r
16void ot(const char *format, ...)\r
17{\r
18 va_list valist=NULL;\r
19 int i, len;\r
20\r
21 // notaz: stop me from leaving newlines in the middle of format string\r
22 // and generating bad code\r
23 for(i=0, len=strlen(format); i < len && format[i] != '\n'; i++);\r
24 if(i < len-1 && format[len-1] != '\n') printf("\nWARNING: possible improper newline placement:\n%s\n", format);\r
25\r
b637c56a 26 if (format[0] == ' ' && format[1] == ' ' && format[2] != ' ' && format[2] != '.')\r
27 arm_op_count++;\r
28\r
cc68a136 29 va_start(valist,format);\r
30 if (AsmFile) vfprintf(AsmFile,format,valist);\r
31 va_end(valist);\r
32}\r
33\r
34void ltorg()\r
35{\r
36 if (ms) ot(" LTORG\n");\r
37 else ot(" .ltorg\n");\r
38}\r
39\r
a9a5a6e0 40#if (CYCLONE_FOR_GENESIS == 2)\r
c008977e 41// r12=ptr to tas in table, trashes r0,r1\r
42static void ChangeTAS(int norm)\r
43{\r
44 ot(" ldr r0,=Op4ad0%s\n",norm?"_":"");\r
45 ot(" mov r1,#8\n");\r
46 ot("setrtas_loop%i0%s ;@ 4ad0-4ad7\n",norm,ms?"":":");\r
47 ot(" subs r1,r1,#1\n");\r
48 ot(" str r0,[r12],#4\n");\r
49 ot(" bne setrtas_loop%i0\n",norm);\r
50 ot(" ldr r0,=Op4ad8%s\n",norm?"_":"");\r
51 ot(" mov r1,#7\n");\r
52 ot("setrtas_loop%i1%s ;@ 4ad8-4ade\n",norm,ms?"":":");\r
53 ot(" subs r1,r1,#1\n");\r
54 ot(" str r0,[r12],#4\n");\r
55 ot(" bne setrtas_loop%i1\n",norm);\r
56 ot(" ldr r0,=Op4adf%s\n",norm?"_":"");\r
57 ot(" str r0,[r12],#4\n");\r
58 ot(" ldr r0,=Op4ae0%s\n",norm?"_":"");\r
59 ot(" mov r1,#7\n");\r
60 ot("setrtas_loop%i2%s ;@ 4ae0-4ae6\n",norm,ms?"":":");\r
61 ot(" subs r1,r1,#1\n");\r
62 ot(" str r0,[r12],#4\n");\r
63 ot(" bne setrtas_loop%i2\n",norm);\r
64 ot(" ldr r0,=Op4ae7%s\n",norm?"_":"");\r
65 ot(" str r0,[r12],#4\n");\r
66 ot(" ldr r0,=Op4ae8%s\n",norm?"_":"");\r
67 ot(" mov r1,#8\n");\r
68 ot("setrtas_loop%i3%s ;@ 4ae8-4aef\n",norm,ms?"":":");\r
69 ot(" subs r1,r1,#1\n");\r
70 ot(" str r0,[r12],#4\n");\r
71 ot(" bne setrtas_loop%i3\n",norm);\r
72 ot(" ldr r0,=Op4af0%s\n",norm?"_":"");\r
73 ot(" mov r1,#8\n");\r
74 ot("setrtas_loop%i4%s ;@ 4af0-4af7\n",norm,ms?"":":");\r
75 ot(" subs r1,r1,#1\n");\r
76 ot(" str r0,[r12],#4\n");\r
77 ot(" bne setrtas_loop%i4\n",norm);\r
78 ot(" ldr r0,=Op4af8%s\n",norm?"_":"");\r
79 ot(" str r0,[r12],#4\n");\r
80 ot(" ldr r0,=Op4af9%s\n",norm?"_":"");\r
81 ot(" str r0,[r12],#4\n");\r
82}\r
83#endif\r
84\r
cc68a136 85// trashes all temp regs\r
86static void PrintException(int ints)\r
87{\r
88 if(!ints) {\r
89 ot(" ;@ Cause an Exception - Vector address in r0\n");\r
90 ot(" mov r11,r0\n");\r
91 }\r
92\r
93 ot(";@ swap OSP <-> A7?\n");\r
94 ot(" ldr r0,[r7,#0x44] ;@ Get SR high\n");\r
95 ot(" tst r0,#0x20\n");\r
96 ot(" bne no_sp_swap%i\n",ints);\r
97 ot(";@ swap OSP and A7:\n");\r
98 ot(" ldr r0,[r7,#0x3C] ;@ Get A7\n");\r
99 ot(" ldr r1,[r7,#0x48] ;@ Get OSP\n");\r
100 ot(" str r0,[r7,#0x48]\n");\r
101 ot(" str r1,[r7,#0x3C]\n");\r
102 ot("no_sp_swap%i%s\n",ints,ms?"":":");\r
103\r
104 ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
105 ot(" mov r1,r4,lsl #8\n");\r
106 ot(" sub r1,r1,r10,lsl #8 ;@ r1 = Old PC\n");\r
107 ot(" mov r1,r1,asr #8 ;@ push sign extended\n");\r
108 OpPush32();\r
109 OpPushSr(1);\r
110 ot(" mov r0,r11\n");\r
111 ot(";@ Read IRQ Vector:\n");\r
112 MemHandler(0,2);\r
113 if(ints) {\r
114 ot(" tst r0,r0 ;@ uninitialized int vector?\n");\r
115 ot(" moveq r0,#0x3c\n");\r
116 ot(" moveq lr,pc\n");\r
117 ot(" ldreq pc,[r7,#0x70] ;@ Call read32(r0) handler\n");\r
118 }\r
119#if USE_CHECKPC_CALLBACK\r
120 ot(" add r0,r0,r10 ;@ r0 = Memory Base + New PC\n");\r
121 ot(" mov lr,pc\n");\r
122 ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
123 ot(" mov r4,r0\n");\r
124#endif\r
125 ot("\n");\r
126\r
127 if(!ints) {\r
128 ot(" ldr r0,[r7,#0x44] ;@ Get SR high\n");\r
129 ot(" bic r0,r0,#0xd8 ;@ clear trace and unused flags\n");\r
130 ot(" orr r0,r0,#0x20 ;@ set supervisor mode\n");\r
131 ot(" strb r0,[r7,#0x44]\n");\r
132 }\r
133}\r
134\r
135// Trashes r0,r1\r
136void CheckInterrupt(int op)\r
137{\r
138 ot(";@ CheckInterrupt:\n");\r
66fdc0f0 139 ot(" ldr r1,[r7,#0x44] ;@ Get SR high T_S__III and irq level\n");\r
140 ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]\r
cc68a136 141 ot(" beq NoInts%x\n",op);\r
142 ot(" cmp r0,#6 ;@ irq>6 ?\n");\r
cc68a136 143 ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");\r
144 ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
7336a99a 145 ot(" blgt CycloneDoInterrupt\n");\r
cc68a136 146 ot("NoInts%x%s\n", op,ms?"":":");\r
147 ot("\n");\r
148}\r
149\r
cfb3dfa0 150void FlushPC(void)\r
151{\r
152#if MEMHANDLERS_NEED_PC\r
153 if (pc_dirty)\r
154 ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
155#endif\r
156 pc_dirty = 0;\r
157}\r
158\r
cc68a136 159static void PrintFramework()\r
160{\r
161 ot(";@ --------------------------- Framework --------------------------\n");\r
162 if (ms) ot("CycloneRun\n");\r
163 else ot("CycloneRun:\n");\r
164\r
165 ot(" stmdb sp!,{r4-r11,lr}\n");\r
166\r
167 ot(" mov r7,r0 ;@ r7 = Pointer to Cpu Context\n");\r
168 ot(" ;@ r0-3 = Temporary registers\n");\r
169 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)\n");\r
7336a99a 170 ot(" ldr r6,=CycloneJumpTab ;@ r6 = Opcode Jump table\n");\r
cc68a136 171 ot(" ldr r5,[r7,#0x5c] ;@ r5 = Cycles\n");\r
172 ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");\r
173 ot(" ;@ r8 = Current Opcode\n");\r
66fdc0f0 174 ot(" ldr r1,[r7,#0x44] ;@ Get SR high T_S__III and irq level\n");\r
cc68a136 175 ot(" mov r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format\n");\r
176 ot(" ;@ r10 = Source value / Memory Base\n");\r
177 ot("\n");\r
178 ot(";@ CheckInterrupt:\n");\r
66fdc0f0 179 ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]\r
cc68a136 180 ot(" beq NoInts0\n");\r
181 ot(" cmp r0,#6 ;@ irq>6 ?\n");\r
cc68a136 182 ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");\r
183 ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
7336a99a 184 ot(" blgt CycloneDoInterrupt\n");\r
cc68a136 185 ot(";@ Check if interrupt used up all the cycles:\n");\r
186 ot(" subs r5,r5,#0\n");\r
187 ot(" blt CycloneEndNoBack\n");\r
188 ot("NoInts0%s\n", ms?"":":");\r
189 ot("\n");\r
190 ot(";@ Check if our processor is in stopped state and jump to opcode handler if not\n");\r
191 ot(" ldr r0,[r7,#0x58]\n");\r
192 ot(" ldrh r8,[r4],#2 ;@ Fetch first opcode\n");\r
193 ot(" tst r0,r0 ;@ stopped?\n");\r
194 ot(" bne CycloneStopped\n");\r
195 ot(" ldr pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
196 ot("\n");\r
197 ot("\n");\r
198\r
199 ot(";@ We come back here after execution\n");\r
200 ot("CycloneEnd%s\n", ms?"":":");\r
201 ot(" sub r4,r4,#2\n");\r
202 ot("CycloneEndNoBack%s\n", ms?"":":");\r
a9a5a6e0 203#if (CYCLONE_FOR_GENESIS == 2)\r
7336a99a 204 ot(" ldr r1,[r7,#0x54]\n");\r
cc68a136 205 ot(" mov r9,r9,lsr #28\n");\r
7336a99a 206 ot(" tst r1,r1\n");\r
207 ot(" bxne r1 ;@ jump to alternative CycloneEnd\n");\r
208#else\r
209 ot(" mov r9,r9,lsr #28\n");\r
210#endif\r
cc68a136 211 ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");\r
212 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
213 ot(" strb r9,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
214 ot(" ldmia sp!,{r4-r11,pc}\n");\r
215 ot("\n");\r
216 ot("CycloneStopped%s\n", ms?"":":");\r
217 ot(" mov r5,#0\n");\r
218 ot(" str r5,[r7,#0x5C] ;@ eat all cycles\n");\r
219 ot(" ldmia sp!,{r4-r11,pc} ;@ we are stopped, do nothing!\n");\r
220 ot("\n");\r
221\r
222 ltorg();\r
223\r
224#if COMPRESS_JUMPTABLE\r
225 ot(";@ uncompress jump table\n");\r
226 if (ms) ot("CycloneInit\n");\r
227 else ot("CycloneInit:\n");\r
7336a99a 228 ot(" ldr r12,=CycloneJumpTab\n");\r
cc68a136 229 ot(" add r0,r12,#0xe000*4 ;@ ctrl code pointer\n");\r
230 ot(" ldr r1,[r0,#-4]\n");\r
231 ot(" tst r1,r1\n");\r
232 ot(" movne pc,lr ;@ already uncompressed\n");\r
a6785576 233 ot(" add r3,r12,#0xa000*4 ;@ handler table pointer, r12=dest\n");\r
cc68a136 234 ot("unc_loop%s\n", ms?"":":");\r
235 ot(" ldrh r1,[r0],#2\n");\r
236 ot(" and r2,r1,#0xf\n");\r
237 ot(" bic r1,r1,#0xf\n");\r
238 ot(" ldr r1,[r3,r1,lsr #2] ;@ r1=handler\n");\r
239 ot(" cmp r2,#0xf\n");\r
240 ot(" addeq r2,r2,#1 ;@ 0xf is really 0x10\n");\r
241 ot(" tst r2,r2\n");\r
242 ot(" ldreqh r2,[r0],#2 ;@ counter is in next word\n");\r
243 ot(" tst r2,r2\n");\r
244 ot(" beq unc_finish ;@ done decompressing\n");\r
245 ot(" tst r1,r1\n");\r
246 ot(" addeq r12,r12,r2,lsl #2 ;@ 0 handler means we should skip those bytes\n");\r
247 ot(" beq unc_loop\n");\r
248 ot("unc_loop_in%s\n", ms?"":":");\r
249 ot(" subs r2,r2,#1\n");\r
250 ot(" str r1,[r12],#4\n");\r
251 ot(" bgt unc_loop_in\n");\r
252 ot(" b unc_loop\n");\r
253 ot("unc_finish%s\n", ms?"":":");\r
7336a99a 254 ot(" ldr r12,=CycloneJumpTab\n");\r
cc68a136 255 ot(" ;@ set a-line and f-line handlers\n");\r
256 ot(" add r0,r12,#0xa000*4\n");\r
257 ot(" ldr r1,[r0,#4] ;@ a-line handler\n");\r
258 ot(" ldr r3,[r0,#8] ;@ f-line handler\n");\r
259 ot(" mov r2,#0x1000\n");\r
260 ot("unc_fill3%s\n", ms?"":":");\r
261 ot(" subs r2,r2,#1\n");\r
262 ot(" str r1,[r0],#4\n");\r
263 ot(" bgt unc_fill3\n");\r
264 ot(" add r0,r12,#0xf000*4\n");\r
265 ot(" mov r2,#0x1000\n");\r
266 ot("unc_fill4%s\n", ms?"":":");\r
267 ot(" subs r2,r2,#1\n");\r
268 ot(" str r3,[r0],#4\n");\r
269 ot(" bgt unc_fill4\n");\r
270 ot(" bx lr\n");\r
271 ltorg();\r
272 ot("\n");\r
273#else\r
274 ot(";@ do nothing\n");\r
275 if (ms) ot("CycloneInit\n");\r
276 else ot("CycloneInit:\n");\r
277 ot(" bx lr\n");\r
278 ot("\n");\r
279#endif\r
85a36a57 280 // 68k: XNZVC, ARM: NZCV\r
cc68a136 281 if (ms) ot("CycloneSetSr\n");\r
282 else ot("CycloneSetSr:\n");\r
283 ot(" mov r2,r1,lsr #8\n");\r
284 ot(" ldrb r3,[r0,#0x44] ;@ get SR high\n");\r
285 ot(" eor r3,r3,r2\n");\r
286 ot(" tst r3,#0x20\n");\r
287 ot(" and r2,r2,#0xa7 ;@ only nonzero bits\n");\r
288 ot(" strb r2,[r0,#0x44] ;@ set SR high\n");\r
289 ot(" bne setsr_noswap\n");\r
290 ot(" ldr r2,[r0,#0x3C] ;@ Get A7\n");\r
291 ot(" ldr r3,[r0,#0x48] ;@ Get OSP\n");\r
292 ot(" str r3,[r0,#0x3C]\n");\r
293 ot(" str r2,[r0,#0x48]\n");\r
294 ot("setsr_noswap%s\n",ms?"":":");\r
85a36a57 295 ot(" mov r2,r1,lsl #25\n");\r
296 ot(" str r2,[r0,#0x4c] ;@ the X flag\n");\r
cc68a136 297 ot(" bic r2,r1,#0xf3\n");\r
298 ot(" tst r1,#1\n");\r
299 ot(" orrne r2,r2,#2\n");\r
300 ot(" tst r1,#2\n");\r
301 ot(" orrne r2,r2,#1\n");\r
302 ot(" strb r2,[r0,#0x46] ;@ flags\n");\r
303 ot(" bx lr\n");\r
304 ot("\n");\r
305\r
306 if (ms) ot("CycloneGetSr\n");\r
307 else ot("CycloneGetSr:\n");\r
308 ot(" ldrb r1,[r0,#0x46] ;@ flags\n");\r
309 ot(" bic r2,r1,#0xf3\n");\r
310 ot(" tst r1,#1\n");\r
311 ot(" orrne r2,r2,#2\n");\r
312 ot(" tst r1,#2\n");\r
313 ot(" orrne r2,r2,#1\n");\r
85a36a57 314 ot(" ldr r1,[r0,#0x4c] ;@ the X flag\n");\r
315 ot(" tst r1,#0x20000000\n");\r
cc68a136 316 ot(" orrne r2,r2,#0x10\n");\r
317 ot(" ldrb r1,[r0,#0x44] ;@ the SR high\n");\r
318 ot(" orr r0,r2,r1,lsl #8\n");\r
319 ot(" bx lr\n");\r
320 ot("\n");\r
321\r
c008977e 322 if (ms) ot("CycloneSetRealTAS\n");\r
323 else ot("CycloneSetRealTAS:\n");\r
a9a5a6e0 324#if (CYCLONE_FOR_GENESIS == 2)\r
c008977e 325 ot(" ldr r12,=CycloneJumpTab\n");\r
326 ot(" tst r0,r0\n");\r
327 ot(" add r12,r12,#0x4a00*4\n");\r
328 ot(" add r12,r12,#0x00d0*4\n");\r
329 ot(" beq setrtas_off\n");\r
330 ChangeTAS(1);\r
331 ot(" bx lr\n");\r
332 ot("setrtas_off%s\n",ms?"":":");\r
333 ChangeTAS(0);\r
334 ot(" bx lr\n");\r
335 ltorg();\r
336 ot("\n");\r
337#else\r
338 ot(" bx lr\n");\r
339 ot("\n");\r
340#endif\r
341\r
cc68a136 342 ot(";@ DoInterrupt - r0=IRQ number\n");\r
7336a99a 343 ot("CycloneDoInterrupt%s\n", ms?"":":");\r
cc68a136 344 ot(" stmdb sp!,{lr} ;@ Push ARM return address\n");\r
345\r
346 ot(";@ Get IRQ Vector address:\n");\r
347 ot(" mov r0,r0,asl #2\n");\r
348 ot(" add r11,r0,#0x60\n");\r
349 PrintException(1);\r
350 \r
351 ot(" ldrb r0,[r7,#0x47] ;@ IRQ\n");\r
352 ot(" mov r2,#0\n");\r
353 ot(" orr r1,r0,#0x20 ;@ Supervisor mode + IRQ number\n");\r
354 ot(" strb r1,[r7,#0x44] ;@ Put SR high\n");\r
355\r
356 ot(";@ Clear stopped states:\n");\r
357 ot(" str r2,[r7,#0x58]\n");\r
358 ot(" sub r5,r5,#%d ;@ Subtract cycles\n",44);\r
359 ot("\n");\r
360#if USE_INT_ACK_CALLBACK\r
361#if INT_ACK_NEEDS_STUFF\r
362 ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
363 ot(" mov r1,r9,lsr #28\n");\r
364 ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
365 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
366#endif\r
367 ot(" ldr r11,[r7,#0x8c] ;@ IrqCallback\n");\r
368 ot(" tst r11,r11\n");\r
369 ot(" movne lr,pc\n");\r
370 ot(" movne pc,r11 ;@ call IrqCallback if it is defined\n");\r
371#if INT_ACK_CHANGES_STUFF\r
372 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
373 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
374 ot(" mov r9,r9,lsl #28\n");\r
375 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
376#endif\r
377#else // not USE_INT_ACK_CALLBACK\r
378 ot(";@ Clear irq:\n");\r
379 ot(" strb r1,[r7,#0x47]\n");\r
380#endif\r
381 ot(" ldmia sp!,{pc} ;@ Return\n");\r
382 ot("\n");\r
383 \r
384 ot("Exception%s\n", ms?"":":");\r
cc68a136 385 ot(" stmdb sp!,{lr} ;@ Preserve ARM return address\n");\r
386 PrintException(0);\r
387 ot(" ldmia sp!,{pc} ;@ Return\n");\r
388 ot("\n");\r
389}\r
390\r
391// ---------------------------------------------------------------------------\r
392// Call Read(r0), Write(r0,r1) or Fetch(r0)\r
393// Trashes r0-r3,r12,lr\r
cfb3dfa0 394int MemHandler(int type,int size,int addrreg)\r
cc68a136 395{\r
396 int func=0;\r
397 func=0x68+type*0xc+(size<<2); // Find correct offset\r
398\r
cc68a136 399#if MEMHANDLERS_NEED_FLAGS\r
400 ot(" mov r3,r9,lsr #28\n");\r
401 ot(" strb r3,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
402#endif\r
cfb3dfa0 403 FlushPC();\r
cc68a136 404\r
a6785576 405#if (MEMHANDLERS_ADDR_MASK & 0xff000000)\r
cfb3dfa0 406 ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0xff000000);\r
407 addrreg=0;\r
a6785576 408#endif\r
409#if (MEMHANDLERS_ADDR_MASK & 0x00ff0000)\r
cfb3dfa0 410 ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x00ff0000);\r
411 addrreg=0;\r
a6785576 412#endif\r
413#if (MEMHANDLERS_ADDR_MASK & 0x0000ff00)\r
cfb3dfa0 414 ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x0000ff00);\r
415 addrreg=0;\r
a6785576 416#endif\r
417#if (MEMHANDLERS_ADDR_MASK & 0x000000ff)\r
cfb3dfa0 418 ot(" bic r0,r%i,#0x%08x\n", addrreg, MEMHANDLERS_ADDR_MASK & 0x000000ff);\r
419 addrreg=0;\r
a6785576 420#endif\r
cfb3dfa0 421 if (addrreg != 0)\r
85a36a57 422 {\r
423 ot(" add lr,pc,#4\n"); // helps to prevent interlocks\r
cfb3dfa0 424 ot(" mov r0,r%i\n", addrreg);\r
85a36a57 425 }\r
426 else\r
427 ot(" mov lr,pc\n");\r
cc68a136 428 ot(" ldr pc,[r7,#0x%x] ;@ Call ",func);\r
429\r
430 // Document what we are calling:\r
431 if (type==0) ot("read");\r
432 if (type==1) ot("write");\r
433 if (type==2) ot("fetch");\r
434\r
435 if (type==1) ot("%d(r0,r1)",8<<size);\r
436 else ot("%d(r0)", 8<<size);\r
437 ot(" handler\n");\r
438\r
cc68a136 439#if MEMHANDLERS_CHANGE_FLAGS\r
440 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
441 ot(" mov r9,r9,lsl #28\n");\r
442#endif\r
443#if MEMHANDLERS_CHANGE_PC\r
444 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
445#endif\r
446\r
447 return 0;\r
448}\r
449\r
450static void PrintOpcodes()\r
451{\r
452 int op=0;\r
b637c56a 453\r
cc68a136 454 printf("Creating Opcodes: [");\r
455\r
456 ot(";@ ---------------------------- Opcodes ---------------------------\n");\r
457\r
458 // Emit null opcode:\r
459 ot("Op____%s ;@ Called if an opcode is not recognised\n", ms?"":":");\r
460 ot(" sub r4,r4,#2\n");\r
461#if USE_UNRECOGNIZED_CALLBACK\r
462 ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
463 ot(" mov r1,r9,lsr #28\n");\r
464 ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
465 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
466 ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");\r
467 ot(" tst r11,r11\n");\r
468 ot(" movne lr,pc\n");\r
469 ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");\r
470 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
471 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
472 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
473 ot(" mov r9,r9,lsl #28\n");\r
474 ot(" tst r0,r0\n");\r
475 ot(" moveq r0,#0x10\n");\r
476 ot(" bleq Exception\n");\r
477#else\r
478 ot(" mov r0,#0x10\n");\r
479 ot(" bl Exception\n");\r
480#endif\r
85a36a57 481 ot("\n");\r
cc68a136 482 Cycles=34;\r
483 OpEnd();\r
484\r
485 // Unrecognised a-line and f-line opcodes throw an exception:\r
486 ot("Op__al%s ;@ Unrecognised a-line opcode\n", ms?"":":");\r
487 ot(" sub r4,r4,#2\n");\r
488#if USE_AFLINE_CALLBACK\r
489 ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
490 ot(" mov r1,r9,lsr #28\n");\r
491 ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
492 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
493 ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");\r
494 ot(" tst r11,r11\n");\r
495 ot(" movne lr,pc\n");\r
496 ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");\r
497 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
498 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
499 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
500 ot(" mov r9,r9,lsl #28\n");\r
501 ot(" tst r0,r0\n");\r
502 ot(" moveq r0,#0x28\n");\r
503 ot(" bleq Exception\n");\r
504#else\r
505 ot(" mov r0,#0x28\n");\r
506 ot(" bl Exception\n");\r
507#endif\r
85a36a57 508 ot("\n");\r
cc68a136 509 Cycles=4;\r
510 OpEnd();\r
511\r
512 ot("Op__fl%s ;@ Unrecognised f-line opcode\n", ms?"":":");\r
513 ot(" sub r4,r4,#2\n");\r
514#if USE_AFLINE_CALLBACK\r
515 ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
516 ot(" mov r1,r9,lsr #28\n");\r
517 ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
518 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
519 ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");\r
520 ot(" tst r11,r11\n");\r
521 ot(" movne lr,pc\n");\r
522 ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");\r
523 ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
524 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
525 ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
526 ot(" mov r9,r9,lsl #28\n");\r
527 ot(" tst r0,r0\n");\r
528 ot(" moveq r0,#0x2c\n");\r
529 ot(" bleq Exception\n");\r
530#else\r
531 ot(" mov r0,#0x2c\n");\r
532 ot(" bl Exception\n");\r
533#endif\r
85a36a57 534 ot("\n");\r
cc68a136 535 Cycles=4;\r
536 OpEnd();\r
537\r
538\r
539 for (op=0;op<0x10000;op++)\r
540 {\r
541 if ((op&0xfff)==0) { printf("%x",op>>12); fflush(stdout); } // Update progress\r
542\r
543 OpAny(op);\r
544 }\r
545\r
546 ot("\n");\r
547\r
548 printf("]\n");\r
549}\r
550\r
551// helper\r
552static void ott(const char *str, int par, const char *nl, int nlp, int counter, int size)\r
553{\r
554 switch(size) {\r
555 case 0: if((counter&7)==0) ot(ms?" dcb ":" .byte "); break;\r
556 case 1: if((counter&7)==0) ot(ms?" dcw ":" .hword "); break;\r
557 case 2: if((counter&7)==0) ot(ms?" dcd ":" .long "); break;\r
558 }\r
559 ot(str, par);\r
560 if((counter&7)==7) ot(nl,nlp); else ot(",");\r
561}\r
562\r
563static void PrintJumpTable()\r
564{\r
565 int i=0,op=0,len=0;\r
566\r
567 ot(";@ -------------------------- Jump Table --------------------------\n");\r
568\r
c008977e 569 // space for decompressed table\r
570 ot(ms?" area |.data|, data\n":" .data\n .align 4\n\n");\r
571\r
cc68a136 572#if COMPRESS_JUMPTABLE\r
573 int handlers=0,reps=0,*indexes,ip,u,out;\r
574 // use some weird compression on the jump table\r
a6785576 575 indexes=(int *)malloc(0x10000*4);\r
576 if(!indexes) { printf("ERROR: out of memory\n"); exit(1); }\r
577 len=0x10000;\r
cc68a136 578\r
a6785576 579 ot("CycloneJumpTab%s\n", ms?"":":");\r
580 if(ms) {\r
581 for(i = 0; i < 0xa000/8; i++)\r
582 ot(" dcd 0,0,0,0,0,0,0,0\n");\r
583 } else\r
584 ot(" .rept 0x%x\n .long 0,0,0,0,0,0,0,0\n .endr\n", 0xa000/8);\r
cc68a136 585\r
586 // hanlers live in "a-line" part of the table\r
a6785576 587 // first output nop,a-line,f-line handlers\r
588 ot(ms?" dcd Op____,Op__al,Op__fl,":" .long Op____,Op__al,Op__fl,");\r
589 handlers=3;\r
cc68a136 590\r
a6785576 591 for(i=0;i<len;i++)\r
cc68a136 592 {\r
593 op=CyJump[i];\r
594\r
a6785576 595 for(u=i-1; u>=0; u--) if(op == CyJump[u]) break; // already done with this op?\r
596 if(u==-1 && op >= 0) {\r
597 ott("Op%.4x",op," ;@ %.4x\n",i,handlers,2);\r
598 indexes[op] = handlers;\r
599 handlers++;\r
cc68a136 600 }\r
a6785576 601 }\r
602 if(handlers&7) {\r
603 fseek(AsmFile, -1, SEEK_CUR); // remove last comma\r
604 for(i = 8-(handlers&7); i > 0; i--)\r
605 ot(",000000");\r
606 ot("\n");\r
607 }\r
608 if(ms) {\r
609 for(i = (0x4000-handlers)/8; i > 0; i--)\r
610 ot(" dcd 0,0,0,0,0,0,0,0\n");\r
611 } else {\r
612 ot(ms?"":" .rept 0x%x\n .long 0,0,0,0,0,0,0,0\n .endr\n", (0x4000-handlers)/8);\r
613 }\r
cc68a136 614 printf("total distinct hanlers: %i\n",handlers);\r
a6785576 615 // output data\r
616 for(i=0,ip=0; i < 0xf000; i++, ip++) {\r
cc68a136 617 op=CyJump[i];\r
a6785576 618 if(op == -2) {\r
619 // it must skip a-line area, because we keep our data there\r
620 ott("0x%.4x", handlers<<4, "\n",0,ip++,1);\r
621 ott("0x%.4x", 0x1000, "\n",0,ip,1);\r
622 i+=0xfff;\r
623 continue;\r
624 }\r
625 for(reps=1; i < 0xf000; i++, reps++) if(op != CyJump[i+1]) break;\r
626 if(op>=0) out=indexes[op]<<4; else out=0; // unrecognised\r
627 if(reps <= 0xe || reps==0x10) {\r
628 if(reps!=0x10) out|=reps; else out|=0xf; // 0xf means 0x10 (0xf appeared to be unused anyway)\r
629 ott("0x%.4x", out, "\n",0,ip,1);\r
cc68a136 630 } else {\r
a6785576 631 ott("0x%.4x", out, "\n",0,ip++,1);\r
632 ott("0x%.4x", reps,"\n",0,ip,1);\r
633 }\r
cc68a136 634 }\r
a6785576 635 if(ip&1) ott("0x%.4x", 0, "\n",0,ip++,1);\r
636 if(ip&7) fseek(AsmFile, -1, SEEK_CUR); // remove last comma\r
637 ot("\n");\r
638 if(ip&7) {\r
639 for(i = 8-(ip&7); i > 0; i--)\r
640 ot(",0x0000");\r
641 ot("\n");\r
642 }\r
643 if(ms) {\r
644 for(i = (0x2000-ip/2)/8+1; i > 0; i--)\r
645 ot(" dcd 0,0,0,0,0,0,0,0\n");\r
646 } else {\r
647 ot(" .rept 0x%x\n .long 0,0,0,0,0,0,0,0\n .endr\n", (0x2000-ip/2)/8+1);\r
648 }\r
649 ot("\n");\r
650 free(indexes);\r
cc68a136 651#else\r
a6785576 652 ot("CycloneJumpTab%s\n", ms?"":":");\r
cc68a136 653 len=0xfffe; // Hmmm, armasm 2.50.8684 messes up with a 0x10000 long jump table\r
654 // notaz: same thing with GNU as 2.9-psion-98r2 (reloc overflow)\r
655 // this is due to COFF objects using only 2 bytes for reloc count\r
656\r
657 for (i=0;i<len;i++)\r
658 {\r
659 op=CyJump[i];\r
660 \r
661 if(op>=0) ott("Op%.4x",op," ;@ %.4x\n",i-7,i,2);\r
662 else if(op==-2) ott("Op__al",0, " ;@ %.4x\n",i-7,i,2);\r
663 else if(op==-3) ott("Op__fl",0, " ;@ %.4x\n",i-7,i,2);\r
664 else ott("Op____",0, " ;@ %.4x\n",i-7,i,2);\r
665 }\r
a6785576 666 if(i&7) fseek(AsmFile, -1, SEEK_CUR); // remove last comma\r
cc68a136 667\r
668 ot("\n");\r
669 ot(";@ notaz: we don't want to crash if we run into those 2 missing opcodes\n");\r
670 ot(";@ so we leave this pattern to patch it later\n");\r
671 ot("%s 0x78563412\n", ms?" dcd":" .long");\r
672 ot("%s 0x56341290\n", ms?" dcd":" .long");\r
673#endif\r
674}\r
675\r
676static int CycloneMake()\r
677{\r
678 int i;\r
679 char *name="Cyclone.s";\r
680 \r
681 // Open the assembly file\r
682 if (ms) name="Cyclone.asm";\r
683 AsmFile=fopen(name,"wt"); if (AsmFile==NULL) return 1;\r
684 \r
685 printf("Making %s...\n",name);\r
686\r
687 ot("\n;@ Dave's Cyclone 68000 Emulator v%x.%.3x - Assembler Output\n\n",CycloneVer>>12,CycloneVer&0xfff);\r
688\r
689 ot(";@ (c) Copyright 2003 Dave, All rights reserved.\n");\r
690 ot(";@ some code (c) Copyright 2005-2006 notaz, All rights reserved.\n");\r
691 ot(";@ Cyclone 68000 is free for non-commercial use.\n\n");\r
692 ot(";@ For commercial use, separate licencing terms must be obtained.\n\n");\r
693\r
694 CyJump=(int *)malloc(0x40000); if (CyJump==NULL) return 1;\r
695 memset(CyJump,0xff,0x40000); // Init to -1\r
696 for(i=0xa000; i<0xb000; i++) CyJump[i] = -2; // a-line emulation\r
697 for(i=0xf000; i<0x10000; i++) CyJump[i] = -3; // f-line emulation\r
698\r
699 if (ms)\r
700 {\r
701 ot(" area |.text|, code\n");\r
702 ot(" export CycloneInit\n");\r
703 ot(" export CycloneRun\n");\r
704 ot(" export CycloneSetSr\n");\r
705 ot(" export CycloneGetSr\n");\r
c008977e 706 ot(" export CycloneSetRealTAS\n");\r
cc68a136 707 ot(" export CycloneVer\n");\r
708 ot("\n");\r
709 ot("CycloneVer dcd 0x%.4x\n",CycloneVer);\r
710 }\r
711 else\r
712 {\r
713 ot(" .global CycloneInit\n");\r
714 ot(" .global CycloneRun\n");\r
715 ot(" .global CycloneSetSr\n");\r
716 ot(" .global CycloneGetSr\n");\r
717 ot(" .global CycloneVer\n");\r
a9a5a6e0 718#if (CYCLONE_FOR_GENESIS == 2)\r
2c559c66 719 ot(" .global CycloneSetRealTAS\n");\r
7336a99a 720 ot(" .global CycloneDoInterrupt\n");\r
721 ot(" .global CycloneJumpTab\n");\r
722#endif\r
cc68a136 723 ot("CycloneVer: .long 0x%.4x\n",CycloneVer);\r
724 }\r
725 ot("\n");\r
726\r
727 PrintFramework();\r
b637c56a 728 arm_op_count = 0;\r
cc68a136 729 PrintOpcodes();\r
b637c56a 730 printf("~%i ARM instructions used for opcode handlers\n", arm_op_count);\r
cc68a136 731 PrintJumpTable();\r
732\r
733 if (ms) ot(" END\n");\r
734\r
7336a99a 735 ot("\n\n;@ vim:filetype=armasm\n");\r
736\r
cc68a136 737 fclose(AsmFile); AsmFile=NULL;\r
738\r
739#if 0\r
740 printf("Assembling...\n");\r
741 // Assemble the file\r
742 if (ms) system("armasm Cyclone.asm");\r
743 else system("as -o Cyclone.o Cyclone.s");\r
744 printf("Done!\n\n");\r
745#endif\r
746\r
747 free(CyJump);\r
748 return 0;\r
749}\r
750\r
751int main()\r
752{\r
753 printf("\n Dave's Cyclone 68000 Emulator v%x.%.3x - Core Creator\n\n",CycloneVer>>12,CycloneVer&0xfff);\r
754\r
755 // Make GAS or ARMASM version\r
756 CycloneMake();\r
757 return 0;\r
758}\r
759\r