0.0088 release
[picodrive.git] / cpu / Cyclone / OpAny.cpp
CommitLineData
cc68a136 1\r
2#include "app.h"\r
3\r
0e11c502 4int opend_op_changes_cycles, opend_check_interrupt, opend_check_trace;\r
5\r
cc68a136 6static unsigned char OpData[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};\r
7\r
8static unsigned short CPU_CALL OpRead16(unsigned int a)\r
9{\r
10 return (unsigned short)( (OpData[a&15]<<8) | OpData[(a+1)&15] );\r
11}\r
12\r
13// For opcode 'op' use handler 'use'\r
14void OpUse(int op,int use)\r
15{\r
16 char text[64]="";\r
17 CyJump[op]=use;\r
18\r
19 if (op!=use) return;\r
20\r
21 // Disassemble opcode\r
22 DisaPc=0;\r
23 DisaText=text;\r
24 DisaWord=OpRead16;\r
25\r
26 DisaGet();\r
27 ot(";@ ---------- [%.4x] %s uses Op%.4x ----------\n",op,text,use);\r
28}\r
29\r
ee5e024c 30void OpStart(int op, int sea, int tea, int op_changes_cycles, int supervisor_check)\r
cc68a136 31{\r
ee5e024c 32 int last_op_count=arm_op_count;\r
33\r
cc68a136 34 Cycles=0;\r
35 OpUse(op,op); // This opcode obviously uses this handler\r
36 ot("Op%.4x%s\n", op, ms?"":":");\r
ee5e024c 37\r
38 if (supervisor_check)\r
39 {\r
40 // checks for supervisor bit, if not set, jumps to SuperEnd()\r
41 // also sets r11 to SR high value, SuperChange() uses this\r
42 ot(" ldr r11,[r7,#0x44] ;@ Get SR high\n");\r
43 }\r
44 if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
45 {\r
cfb3dfa0 46#if MEMHANDLERS_NEED_PREV_PC\r
b637c56a 47 ot(" str r4,[r7,#0x50] ;@ Save prev PC + 2\n");\r
a6785576 48#endif\r
49#if MEMHANDLERS_NEED_CYCLES\r
50 ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
51#endif\r
a6785576 52 }\r
ee5e024c 53 if (supervisor_check)\r
54 {\r
55 ot(" tst r11,#0x20 ;@ Check we are in supervisor mode\n");\r
56 ot(" beq WrongPrivilegeMode ;@ No\n");\r
57 }\r
58 if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c)) {\r
59#if MEMHANDLERS_CHANGE_CYCLES\r
60 if (op_changes_cycles)\r
61 ot(" mov r5,#0\n");\r
a6785576 62#endif\r
ee5e024c 63 }\r
64 if (last_op_count!=arm_op_count)\r
65 ot("\n");\r
cfb3dfa0 66 pc_dirty = 1;\r
0e11c502 67 opend_op_changes_cycles = opend_check_interrupt = opend_check_trace = 0;\r
cc68a136 68}\r
69\r
0e11c502 70void OpEnd(int sea, int tea)\r
cc68a136 71{\r
ee5e024c 72 int did_fetch=0;\r
0e11c502 73 opend_check_trace = opend_check_trace && EMULATE_TRACE;\r
cfb3dfa0 74#if MEMHANDLERS_CHANGE_CYCLES\r
75 if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
ee5e024c 76 {\r
0e11c502 77 if (opend_op_changes_cycles)\r
ee5e024c 78 {\r
79 ot(" ldr r0,[r7,#0x5c] ;@ Load Cycles\n");\r
80 ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
81 ot(" add r5,r0,r5\n");\r
82 did_fetch=1;\r
83 }\r
84 else\r
85 {\r
86 ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
87 }\r
88 }\r
cfb3dfa0 89#endif\r
ee5e024c 90 if (!did_fetch)\r
91 ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
0e11c502 92 if (opend_check_trace)\r
93 ot(" ldr r1,[r7,#0x44]\n");\r
cc68a136 94 ot(" subs r5,r5,#%d ;@ Subtract cycles\n",Cycles);\r
0e11c502 95 if (opend_check_trace)\r
96 {\r
97 ot(";@ CheckTrace:\n");\r
98 ot(" tst r1,#0x80\n");\r
99 ot(" bne CycloneDoTraceWithChecks\n");\r
100 ot(" cmp r5,#0\n");\r
101 }\r
102 if (opend_check_interrupt)\r
ee5e024c 103 {\r
104 ot(" blt CycloneEnd\n");\r
105 ot(";@ CheckInterrupt:\n");\r
0e11c502 106 if (!opend_check_trace)\r
107 ot(" ldr r1,[r7,#0x44]\n");\r
ee5e024c 108 ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]\r
109 ot(" ldreq pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
110 ot(" cmp r0,#6 ;@ irq>6 ?\n");\r
111 ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");\r
112 ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
113 ot(" ldrle pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
114 ot(" b CycloneDoInterruptGoBack\n");\r
115 }\r
116 else\r
117 {\r
118 ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
119 ot(" b CycloneEnd\n");\r
120 }\r
cc68a136 121 ot("\n");\r
122}\r
123\r
85a36a57 124int OpBase(int op,int size,int sepa)\r
cc68a136 125{\r
126 int ea=op&0x3f; // Get Effective Address\r
127 if (ea<0x10) return sepa?(op&~0x7):(op&~0xf); // Use 1 handler for d0-d7 and a0-a7\r
85a36a57 128 if (size==0&&(ea==0x1f || ea==0x27)) return op; // Specific handler for (a7)+ and -(a7)\r
cc68a136 129 if (ea<0x38) return op&~7; // Use 1 handler for (a0)-(a7), etc...\r
130 return op;\r
131}\r
132\r
133// Get flags, trashes r2\r
134int OpGetFlags(int subtract,int xbit,int specialz)\r
135{\r
136 if (specialz) ot(" orr r2,r9,#0xb0000000 ;@ for old Z\n");\r
137\r
138 ot(" mrs r9,cpsr ;@ r9=flags\n");\r
139\r
140 if (specialz) ot(" andeq r9,r9,r2 ;@ fix Z\n");\r
141\r
142 if (subtract) ot(" eor r9,r9,#0x20000000 ;@ Invert carry\n");\r
143\r
144 if (xbit)\r
145 {\r
85a36a57 146 ot(" str r9,[r7,#0x4c] ;@ Save X bit\n");\r
cc68a136 147 }\r
148 return 0;\r
149}\r
150\r
151// -----------------------------------------------------------------\r
152\r
85a36a57 153int g_op;\r
154\r
cc68a136 155void OpAny(int op)\r
156{\r
157 memset(OpData,0x33,sizeof(OpData));\r
158 OpData[0]=(unsigned char)(op>>8);\r
159 OpData[1]=(unsigned char)op;\r
85a36a57 160 g_op=op;\r
161\r
162 if ((op&0xf100)==0x0000) OpArith(op); // +\r
163 if ((op&0xc000)==0x0000) OpMove(op); // +\r
164 if ((op&0xf5bf)==0x003c) OpArithSr(op); // + Ori/Andi/Eori $nnnn,sr\r
165 if ((op&0xf100)==0x0100) OpBtstReg(op); // +\r
166 if ((op&0xf138)==0x0108) OpMovep(op); // +\r
167 if ((op&0xff00)==0x0800) OpBtstImm(op); // +\r
168 if ((op&0xf900)==0x4000) OpNeg(op); // +\r
169 if ((op&0xf140)==0x4100) OpChk(op); // +\r
170 if ((op&0xf1c0)==0x41c0) OpLea(op); // +\r
171 if ((op&0xf9c0)==0x40c0) OpMoveSr(op); // +\r
172 if ((op&0xffc0)==0x4800) OpNbcd(op); // +\r
173 if ((op&0xfff8)==0x4840) OpSwap(op); // +\r
174 if ((op&0xffc0)==0x4840) OpPea(op); // +\r
175 if ((op&0xffb8)==0x4880) OpExt(op); // +\r
176 if ((op&0xfb80)==0x4880) OpMovem(op); // +\r
177 if ((op&0xff00)==0x4a00) OpTst(op); // +\r
178 if ((op&0xffc0)==0x4ac0) OpTas(op); // +\r
179 if ((op&0xfff0)==0x4e40) OpTrap(op); // +\r
180 if ((op&0xfff8)==0x4e50) OpLink(op); // +\r
181 if ((op&0xfff8)==0x4e58) OpUnlk(op); // +\r
182 if ((op&0xfff0)==0x4e60) OpMoveUsp(op); // +\r
183 if ((op&0xfff8)==0x4e70) Op4E70(op); // + Reset/Rts etc\r
184 if ((op&0xfffd)==0x4e70) OpStopReset(op);// +\r
185 if ((op&0xff80)==0x4e80) OpJsr(op); // +\r
186 if ((op&0xf000)==0x5000) OpAddq(op); // +\r
187 if ((op&0xf0c0)==0x50c0) OpSet(op); // +\r
188 if ((op&0xf0f8)==0x50c8) OpDbra(op); // +\r
189 if ((op&0xf000)==0x6000) OpBranch(op); // +\r
190 if ((op&0xf100)==0x7000) OpMoveq(op); // +\r
191 if ((op&0xa000)==0x8000) OpArithReg(op); // + Or/Sub/And/Add\r
192 if ((op&0xb1f0)==0x8100) OpAbcd(op); // +\r
193 if ((op&0xb0c0)==0x80c0) OpMul(op); // +\r
194 if ((op&0x90c0)==0x90c0) OpAritha(op); // +\r
195 if ((op&0xb130)==0x9100) OpAddx(op); // +\r
196 if ((op&0xf000)==0xb000) OpCmpEor(op); // +\r
197 if ((op&0xf138)==0xb108) OpCmpm(op); // +\r
198 if ((op&0xf130)==0xc100) OpExg(op); // +\r
199 if ((op&0xf000)==0xe000) OpAsr(op); // + Asr/l/Ror/l etc\r
200 if ((op&0xf8c0)==0xe0c0) OpAsrEa(op); // +\r
201\r
202 if (op==0xffff)\r
203 {\r
204 SuperEnd();\r
205 }\r
cc68a136 206}\r
85a36a57 207\r