FAMEC idle loops, PSP port sync, minor adjustments
[picodrive.git] / cpu / Cyclone / tools / idle.s
CommitLineData
053fd9b4 1@ vim:filetype=armasm
2
3@ ranges/opcodes (idle, normal):
4@ 71xx, 73xx - bne.s (8bit offset)
5@ 75xx, 77xx - beq.s (8bit offset)
6@ 7dxx, 7fxx - bra.s (8bit offset)
7
8.data
9.align 2
10
11have_patches:
12 .word 0
13
14.equ patch_desc_table_size, 10
15
16patch_desc_table:
17 .word (0x71fa<<16) | 0x66fa, idle_detector_bcc8, idle_bne, Op6601 @ bne.s
18 .word (0x71f8<<16) | 0x66f8, idle_detector_bcc8, idle_bne, Op6601 @ bne.s
19 .word (0x71f6<<16) | 0x66f6, idle_detector_bcc8, idle_bne, Op6601 @ bne.s
20 .word (0x71f2<<16) | 0x66f2, idle_detector_bcc8, idle_bne, Op6601 @ bne.s
21 .word (0x75fa<<16) | 0x67fa, idle_detector_bcc8, idle_beq, Op6701 @ beq.s
22 .word (0x75f8<<16) | 0x67f8, idle_detector_bcc8, idle_beq, Op6701 @ beq.s
c060a9ab 23 .word (0x75f6<<16) | 0x67f6, idle_detector_bcc8, idle_beq, Op6701 @ beq.s
24 .word (0x75f2<<16) | 0x67f2, idle_detector_bcc8, idle_beq, Op6701 @ beq.s
053fd9b4 25 .word (0x7dfe<<16) | 0x60fe, idle_detector_dead, idle_bra, Op6001 @ bra.s
26 .word (0x7dfc<<16) | 0x60fc, idle_detector_dead, idle_bra, Op6001 @ bra.s
27
28
29.text
30.align 2
31
32
33.global CycloneInitIdle
34
35CycloneInitIdle:
36 ldr r3, =CycloneJumpTab
37 ldr r2, =patch_desc_table
38 mov r12,#patch_desc_table_size
39
40cii_loop:
41 ldrh r0, [r2]
42 ldr r1, [r2, #4] @ detector
43 str r1, [r3, r0, lsl #2]
44 ldrh r0, [r2, #2]
45 ldr r1, [r2, #8] @ idle
46 add r0, r3, r0, lsl #2
47 str r1, [r0]
48 ldr r1, [r2, #12] @ normal
49 str r1, [r0, #0x800]
50 add r2, r2, #16
51 subs r12,r12,#1
52 bgt cii_loop
53
54 ldr r0, =have_patches
55 mov r1, #1
56 str r1, [r0]
57 bx lr
58
59
60.global CycloneFinishIdle
61
62CycloneFinishIdle:
63 ldr r0, =have_patches
64 ldr r0, [r0]
65 tst r0, r0
66 bxeq lr
67
68 ldr r3, =CycloneJumpTab
69 ldr r2, =patch_desc_table
70 mov r12,#patch_desc_table_size
71
72cfi_loop:
73 ldrh r0, [r2]
74 ldr r1, [r2, #12] @ normal
75 str r1, [r3, r0, lsl #2]
76 ldrh r0, [r2, #2]
77 ldr r1, =Op____
78 add r0, r3, r0, lsl #2
79 str r1, [r0]
80 str r1, [r0, #0x800]
81 add r2, r2, #16
82 subs r12,r12,#1
83 bgt cfi_loop
84
85 ldr r0, =have_patches
86 mov r1, #0
87 str r1, [r0]
88 bx lr
89
90
91
92.macro inc_counter cond
93 ldr r0, =idle_hit_counter
94 ldr r1, [r0]
95 add r1, r1, #1
96 str\cond r1, [r0]
97.endm
98
99idle_bra:
100 mov r5, #4
101 inc_counter
102 b Op6001
103
104idle_bne:
105 msr cpsr_flg, r10 ;@ ARM flags = 68000 flags
106 movne r5, #4
107 inc_counter ne
108 b Op6601
109
110idle_beq:
111 msr cpsr_flg, r10 ;@ ARM flags = 68000 flags
112 moveq r5, #4
113 inc_counter eq
114 b Op6701
115
116
117@ @@@ @
118
119idle_detector_bcc8:
120 ldr r0, =(Pico+0x22208) @ Pico.m
121 ldr r1, =idledet_start_frame
122 ldr r0, [r0, #0x1c] @ ..frame_count
123 ldr r1, [r1]
124 cmp r0, r1
125 blt exit_detector @ not yet
126
127 mov r0, r8, asl #24 @ Shift 8-bit signed offset up...
128 add r0, r4, r0, asr #24 @ jump dest
129 bic r0, r0, #1
130
131 mov r1, #0
132 sub r1, r1, r8, lsl #24
133 mov r1, r1, lsr #24
134 sub r1, r1, #2
c060a9ab 135 bic r1, r1, #1
053fd9b4 136
137 bl SekIsIdleCode
138 tst r0, r0
139 and r2, r8, #0x00ff
140 orr r2, r2, #0x7100
141 orreq r2, r2, #0x0200
142 tst r8, #0x0100 @ 67xx (beq)?
143 orrne r2, r2, #0x0400
144
145 @ r2 = patch_opcode
146 sub r0, r4, #2
147 ldrh r1, [r0]
148 mov r11,r2
149 bl SekRegisterIdlePatch
150 cmp r0, #1 @ 0 - ok to patch, 1 - no patch, 2 - remove detector
151 strlth r11,[r4, #-2]
152 ble exit_detector
153
154 @ remove detector from Cyclone
155 tst r8, #0x0100 @ 67xx (beq)?
156 ldreq r1, =Op6601
157 ldrne r1, =Op6701
158
159 ldr r3, =CycloneJumpTab
160 str r1, [r3, r8, lsl #2]
161 bx r1
162
163exit_detector:
164 tst r8, #0x0100 @ 67xx (beq)?
165 beq Op6601
166 b Op6701
167
168
169idle_detector_dead:
170 @ patch without further questions
171 and r2, r8, #0x00ff
172 orr r2, r2, #0x7d00
173 sub r0, r4, #2
174 ldrh r1, [r0]
175 mov r11,r2
176 bl SekRegisterIdlePatch
177 strh r11,[r4, #-2]
178 b Op6001
179
180.pool
181