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timers implemented for new z80 mode
[picodrive.git] / cpu / DrZ80 / drz80.s
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cc68a136 1;@ Reesy's Z80 Emulator Version 0.001\r
2\r
3;@ (c) Copyright 2004 Reesy, All rights reserved\r
4;@ DrZ80 is free for non-commercial use.\r
5\r
6;@ For commercial use, separate licencing terms must be obtained.\r
7\r
8 .data\r
9 .align 4\r
10\r
11 .global DrZ80Run\r
12 .global DrZ80Ver\r
13\r
e5f426aa 14 .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
15 .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
16 .equiv UPDATE_CONTEXT, 0\r
17 .equiv DRZ80_FOR_PICODRIVE, 1\r
cc68a136 18\r
19.if INTERRUPT_MODE\r
e5f426aa 20 .extern Interrupt\r
cc68a136 21.endif\r
22\r
23.if DRZ80_FOR_PICODRIVE\r
cc68a136 24 .extern PicoRead8\r
25 .extern Pico\r
26 .extern z80_write\r
43e6eaad 27 .extern ym2612_read_local_z80\r
cc68a136 28.endif\r
29\r
30DrZ80Ver: .long 0x0001\r
31\r
32;@ --------------------------- Defines ----------------------------\r
33;@ Make sure that regs/pointers for z80pc to z80sp match up!\r
34\r
35 opcodes .req r3\r
36 z80_icount .req r4\r
37 cpucontext .req r5\r
38 z80pc .req r6\r
39 z80a .req r7\r
40 z80f .req r8\r
41 z80bc .req r9\r
42 z80de .req r10\r
43 z80hl .req r11\r
44 z80sp .req r12 \r
45 z80xx .req lr\r
46\r
47 .equ z80pc_pointer, 0 ;@ 0\r
48 .equ z80a_pointer, z80pc_pointer+4 ;@ 4\r
49 .equ z80f_pointer, z80a_pointer+4 ;@ 8\r
50 .equ z80bc_pointer, z80f_pointer+4 ;@ \r
51 .equ z80de_pointer, z80bc_pointer+4\r
52 .equ z80hl_pointer, z80de_pointer+4\r
53 .equ z80sp_pointer, z80hl_pointer+4\r
54 .equ z80pc_base, z80sp_pointer+4\r
55 .equ z80sp_base, z80pc_base+4\r
56 .equ z80ix, z80sp_base+4\r
57 .equ z80iy, z80ix+4\r
58 .equ z80i, z80iy+4\r
59 .equ z80a2, z80i+4\r
60 .equ z80f2, z80a2+4\r
61 .equ z80bc2, z80f2+4\r
62 .equ z80de2, z80bc2+4\r
63 .equ z80hl2, z80de2+4\r
64 .equ cycles_pointer, z80hl2+4 \r
65 .equ previouspc, cycles_pointer+4 \r
66 .equ z80irq, previouspc+4\r
67 .equ z80if, z80irq+1\r
68 .equ z80im, z80if+1\r
69 .equ z80r, z80im+1\r
70 .equ z80irqvector, z80r+1\r
71 .equ z80irqcallback, z80irqvector+4\r
72 .equ z80_write8, z80irqcallback+4\r
73 .equ z80_write16, z80_write8+4\r
74 .equ z80_in, z80_write16+4\r
75 .equ z80_out, z80_in+4\r
76 .equ z80_read8, z80_out+4\r
77 .equ z80_read16, z80_read8+4\r
78 .equ z80_rebaseSP, z80_read16+4\r
79 .equ z80_rebasePC, z80_rebaseSP+4\r
80\r
81 .equ VFlag, 0\r
82 .equ CFlag, 1\r
83 .equ ZFlag, 2\r
84 .equ SFlag, 3\r
85 .equ HFlag, 4\r
86 .equ NFlag, 5\r
87 .equ Flag3, 6\r
88 .equ Flag5, 7\r
89\r
90 .equ Z80_CFlag, 0\r
91 .equ Z80_NFlag, 1\r
92 .equ Z80_VFlag, 2\r
93 .equ Z80_Flag3, 3\r
94 .equ Z80_HFlag, 4\r
95 .equ Z80_Flag5, 5\r
96 .equ Z80_ZFlag, 6\r
97 .equ Z80_SFlag, 7\r
98\r
99 .equ Z80_IF1, 1<<0\r
100 .equ Z80_IF2, 1<<1\r
101 .equ Z80_HALT, 1<<2\r
102\r
103;@---------------------------------------\r
104\r
105.text\r
106\r
107.if DRZ80_FOR_PICODRIVE\r
cc68a136 108\r
cc68a136 109pico_z80_read8: @ addr\r
110 cmp r0,#0x2000 @ Z80 RAM\r
111 ldrlt r1,[cpucontext,#z80sp_base]\r
112 ldrltb r0,[r1,r0]\r
113 bxlt lr\r
114\r
115 cmp r0,#0x8000 @ 68k bank\r
116 blt 1f\r
117 ldr r2,=(Pico+0x22212)\r
118 ldrh r1,[r2]\r
119 bic r0,r0,#0x3f8000\r
120 orr r0,r0,r1,lsl #15\r
121 ldr r1,[r2,#-0xe] @ ROM size\r
122 cmp r0,r1\r
123 ldrlt r1,[r2,#-0x12] @ ROM\r
124 eorlt r0,r0,#1 @ our ROM is byteswapped\r
125 ldrltb r0,[r1,r0]\r
126 bxlt lr\r
17043584 127 stmfd sp!,{r3,r12,lr}\r
cc68a136 128 bl PicoRead8\r
17043584 129 ldmfd sp!,{r3,r12,pc}\r
cc68a136 1301:\r
131 mov r1,r0,lsr #13\r
132 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
133 bne 0f\r
134 and r0,r0,#3\r
17043584 135 stmfd sp!,{r3,r12,lr}\r
136 str z80_icount,[cpucontext,#cycles_pointer]\r
137 bl ym2612_read_local_z80\r
138 ldmfd sp!,{r3,r12,pc}\r
cc68a136 1390:\r
140 cmp r0,#0x4000\r
141 movge r0,#0xff\r
142 bxge lr\r
143 ldr r1,[cpucontext,#z80sp_base]\r
144 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
145 ldrb r0,[r1,r0]\r
146 bx lr\r
147\r
148pico_z80_read16: @ addr\r
149 cmp r0,#0x2000 @ Z80 RAM\r
150 bge 2f\r
151 ldr r1,[cpucontext,#z80sp_base]\r
152 ldrb r0,[r1,r0]!\r
153 ldrb r1,[r1,#1]\r
154 orr r0,r0,r1,lsl #8\r
155 bx lr\r
156\r
1572:\r
158 cmp r0,#0x8000 @ 68k bank\r
159 blt 1f\r
160 ldr r2,=(Pico+0x22212)\r
161 ldrh r1,[r2]\r
162 bic r0,r0,#0x1f8000\r
163 orr r0,r0,r1,lsl #15\r
164 ldr r1,[r2,#-0xe] @ ROM size\r
165 cmp r0,r1\r
166 ldr r1,[r2,#-0x12] @ ROM\r
167 tst r0,#1\r
168 eor r0,r0,#1\r
169 ldrb r0,[r1,r0]!\r
170 ldreqb r1,[r1,#-1]\r
171 ldrneb r1,[r1,#3] @ this is due to byteswapped ROM\r
172 orr r0,r0,r1,lsl #8\r
173 bx lr\r
1743:\r
175 stmfd sp!,{r3-r5,r12,lr}\r
176 mov r4,r0\r
177 bl PicoRead8\r
178 mov r5,r0\r
179 add r0,r4,#1\r
180 bl PicoRead8\r
181 orr r0,r5,r0,lsl #8\r
b542be46 182 ldmfd sp!,{r3-r5,r12,pc}\r
cc68a136 1831:\r
184 mov r1,r0,lsr #13\r
185 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
186 bne 0f\r
187 and r0,r0,#3\r
17043584 188 stmfd sp!,{r3,r12,lr}\r
189 str z80_icount,[cpucontext,#cycles_pointer]\r
190 bl ym2612_read_local_z80\r
191 orr r0,r0,r0,lsl #8\r
192 ldmfd sp!,{r3,r12,pc}\r
cc68a136 1930:\r
194 cmp r0,#0x4000\r
195 movge r0,#0xff\r
196 bxge lr\r
197 ldr r1,[cpucontext,#z80sp_base]\r
198 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
199 ldrb r0,[r1,r0]!\r
200 ldrb r1,[r1,#1]\r
201 orr r0,r0,r1,lsl #8\r
202 bx lr\r
203\r
204pico_z80_write8: @ data, addr\r
205 cmp r1,#0x4000\r
206 bge 1f\r
207 ldr r2,[cpucontext,#z80sp_base]\r
208 bic r1,r1,#0x0fe000 @ Z80 RAM\r
209 strb r0,[r2,r1]\r
210 bx lr\r
2111:\r
212 stmfd sp!,{r3,r12,lr}\r
17043584 213 str z80_icount,[cpucontext,#cycles_pointer]\r
cc68a136 214 bl z80_write\r
215 ldmfd sp!,{r3,r12,pc}\r
216\r
217pico_z80_write16: @ data, addr\r
218 cmp r1,#0x4000\r
219 bge 1f\r
220 ldr r2,[cpucontext,#z80sp_base]\r
221 bic r1,r1,#0x0fe000 @ Z80 RAM\r
222 strb r0,[r2,r1]!\r
223 mov r0,r0,lsr #8\r
224 strb r0,[r2,#1]\r
225 bx lr\r
2261:\r
17043584 227 stmfd sp!,{r3-r5,r12,lr}\r
228 str z80_icount,[cpucontext,#cycles_pointer]\r
cc68a136 229 mov r4,r0\r
230 mov r5,r1\r
17043584 231 bl z80_write\r
cc68a136 232 mov r0,r4,lsr #8\r
233 add r1,r5,#1\r
17043584 234 bl z80_write\r
235 ldmfd sp!,{r3-r5,r12,pc}\r
cc68a136 236\r
237 .pool\r
238.endif\r
239\r
240.macro fetch cycs\r
241 subs z80_icount,z80_icount,#\cycs\r
242.if UPDATE_CONTEXT\r
243 str z80pc,[cpucontext,#z80pc_pointer]\r
244 str z80_icount,[cpucontext,#cycles_pointer]\r
245 ldr r1,[cpucontext,#z80pc_base]\r
246 sub r2,z80pc,r1\r
247 str r2,[cpucontext,#previouspc]\r
248.endif\r
249 ldrplb r0,[z80pc],#1\r
250 ldrpl pc,[opcodes,r0, lsl #2]\r
251 bmi z80_execute_end\r
252.endm\r
253\r
254.macro eatcycles cycs\r
255 sub z80_icount,z80_icount,#\cycs\r
256.if UPDATE_CONTEXT\r
257 str z80_icount,[cpucontext,#cycles_pointer]\r
258.endif\r
259.endm\r
260\r
261.macro readmem8\r
262.if UPDATE_CONTEXT\r
263 str z80pc,[cpucontext,#z80pc_pointer]\r
264.endif\r
265.if DRZ80_FOR_PICODRIVE\r
266 bl pico_z80_read8\r
267.else\r
268 stmfd sp!,{r3,r12}\r
269 mov lr,pc\r
270 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
271 ldmfd sp!,{r3,r12}\r
272.endif\r
273.endm\r
274\r
275.macro readmem8HL\r
276 mov r0,z80hl, lsr #16\r
277 readmem8\r
278.endm\r
279\r
280.macro readmem16\r
281.if UPDATE_CONTEXT\r
282 str z80pc,[cpucontext,#z80pc_pointer]\r
283.endif\r
284.if DRZ80_FOR_PICODRIVE\r
285 bl pico_z80_read16\r
286.else\r
287 stmfd sp!,{r3,r12}\r
288 mov lr,pc\r
289 ldr pc,[cpucontext,#z80_read16]\r
290 ldmfd sp!,{r3,r12}\r
291.endif\r
292.endm\r
293\r
294.macro writemem8\r
295.if UPDATE_CONTEXT\r
296 str z80pc,[cpucontext,#z80pc_pointer]\r
297.endif\r
298.if DRZ80_FOR_PICODRIVE\r
299 bl pico_z80_write8\r
300.else\r
301 stmfd sp!,{r3,r12}\r
302 mov lr,pc\r
303 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
304 ldmfd sp!,{r3,r12}\r
305.endif\r
306.endm\r
307\r
308.macro writemem8DE\r
309 mov r1,z80de, lsr #16\r
310 writemem8\r
311.endm\r
312\r
313.macro writemem8HL\r
314 mov r1,z80hl, lsr #16\r
315 writemem8\r
316.endm\r
317\r
318.macro writemem16\r
319.if UPDATE_CONTEXT\r
320 str z80pc,[cpucontext,#z80pc_pointer]\r
321.endif\r
322.if DRZ80_FOR_PICODRIVE\r
323 bl pico_z80_write16\r
324.else\r
325 stmfd sp!,{r3,r12}\r
326 mov lr,pc\r
327 ldr pc,[cpucontext,#z80_write16] ;@ r0=data r1=addr\r
328 ldmfd sp!,{r3,r12}\r
329.endif\r
330.endm\r
331\r
332.macro copymem8HL_DE\r
333.if UPDATE_CONTEXT\r
334 str z80pc,[cpucontext,#z80pc_pointer]\r
335.endif\r
336 mov r0,z80hl, lsr #16\r
337.if DRZ80_FOR_PICODRIVE\r
338 bl pico_z80_read8\r
339.else\r
340 stmfd sp!,{r3,r12}\r
341 mov lr,pc\r
342 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
343.endif\r
344.if UPDATE_CONTEXT\r
345 str z80pc,[cpucontext,#z80pc_pointer]\r
346.endif\r
347 mov r1,z80de, lsr #16\r
348.if DRZ80_FOR_PICODRIVE\r
349 bl pico_z80_write8\r
350.else\r
351 mov lr,pc\r
352 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
353 ldmfd sp!,{r3,r12}\r
354.endif\r
355.endm\r
356;@---------------------------------------\r
357\r
358.macro rebasepc\r
359.if UPDATE_CONTEXT\r
360 str z80pc,[cpucontext,#z80pc_pointer]\r
361.endif\r
362.if DRZ80_FOR_PICODRIVE\r
363 bic r0,r0,#0xfe000\r
364 ldr r1,[cpucontext,#z80pc_base]\r
365 add z80pc,r1,r0\r
366.else\r
367 stmfd sp!,{r3,r12}\r
368 mov lr,pc\r
369 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
370 ldmfd sp!,{r3,r12}\r
371 mov z80pc,r0\r
372.endif\r
373.endm\r
374\r
375.macro rebasesp\r
376.if UPDATE_CONTEXT\r
377 str z80pc,[cpucontext,#z80pc_pointer]\r
378.endif\r
379.if DRZ80_FOR_PICODRIVE\r
380 bic r0,r0,#0xfe000\r
381 ldr r1,[cpucontext,#z80sp_base]\r
382 add r0,r1,r0\r
383.else\r
384 stmfd sp!,{r3,r12}\r
385 mov lr,pc\r
386 ldr pc,[cpucontext,#z80_rebaseSP] ;@ external function must rebase sp\r
387 ldmfd sp!,{r3,r12}\r
388.endif\r
389.endm\r
390;@----------------------------------------------------------------------------\r
391\r
392.macro opADC\r
393 movs z80f,z80f,lsr#2 ;@ get C\r
394 subcs r0,r0,#0x100\r
395 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of half carry\r
396 adcs z80a,z80a,r0,ror#8\r
397 mrs r0,cpsr ;@ S,Z,V&C\r
398 eor z80f,z80f,z80a,lsr#24\r
399 and z80f,z80f,#1<<HFlag ;@ H, correct\r
400 orr z80f,z80f,r0,lsr#28\r
401.endm\r
402\r
403.macro opADCA\r
404 movs z80f,z80f,lsr#2 ;@ get C\r
405 orrcs z80a,z80a,#0x00800000\r
406 adds z80a,z80a,z80a\r
407 mrs z80f,cpsr ;@ S,Z,V&C\r
408 mov z80f,z80f,lsr#28\r
409 tst z80a,#0x10000000 ;@ H, correct\r
410 orrne z80f,z80f,#1<<HFlag\r
411 fetch 4\r
412.endm\r
413\r
414.macro opADCH reg\r
415 mov r0,\reg,lsr#24\r
416 opADC\r
417 fetch 4\r
418.endm\r
419\r
420.macro opADCL reg\r
421 movs z80f,z80f,lsr#2 ;@ get C\r
422 adc r0,\reg,\reg,lsr#15\r
423 orrcs z80a,z80a,#0x00800000\r
424 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
425 adds z80a,z80a,r0,lsl#23\r
426 mrs z80f,cpsr ;@ S,Z,V&C\r
427 mov z80f,z80f,lsr#28\r
428 cmn r1,r0,lsl#27\r
429 orrcs z80f,z80f,#1<<HFlag ;@ H, correct\r
430 fetch 4\r
431.endm\r
432\r
433.macro opADCb\r
434 opADC\r
435.endm\r
436;@---------------------------------------\r
437\r
438.macro opADD reg shift\r
439 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
440 adds z80a,z80a,\reg,lsl#\shift\r
441 mrs z80f,cpsr ;@ S,Z,V&C\r
442 mov z80f,z80f,lsr#28\r
443 cmn r1,\reg,lsl#\shift+4\r
444 orrcs z80f,z80f,#1<<HFlag\r
445.endm\r
446\r
447.macro opADDA\r
448 adds z80a,z80a,z80a\r
449 mrs z80f,cpsr ;@ S,Z,V&C\r
450 mov z80f,z80f,lsr#28\r
451 tst z80a,#0x10000000 ;@ H, correct\r
452 orrne z80f,z80f,#1<<HFlag\r
453 fetch 4\r
454.endm\r
455\r
456.macro opADDH reg\r
457 and r0,\reg,#0xFF000000\r
458 opADD r0 0\r
459 fetch 4\r
460.endm\r
461\r
462.macro opADDL reg\r
463 opADD \reg 8\r
464 fetch 4\r
465.endm\r
466\r
467.macro opADDb \r
468 opADD r0 24\r
469.endm\r
470;@---------------------------------------\r
471\r
472.macro opADC16 reg\r
473 movs z80f,z80f,lsr#2 ;@ get C\r
474 adc r0,z80a,\reg,lsr#15\r
475 orrcs z80hl,z80hl,#0x00008000\r
476 mov r1,z80hl,lsl#4\r
477 adds z80hl,z80hl,r0,lsl#15\r
478 mrs z80f,cpsr ;@ S, Z, V & C\r
479 mov z80f,z80f,lsr#28\r
480 cmn r1,r0,lsl#19\r
481 orrcs z80f,z80f,#1<<HFlag\r
482 fetch 15\r
483.endm\r
484\r
485.macro opADC16HL\r
486 movs z80f,z80f,lsr#2 ;@ get C\r
487 orrcs z80hl,z80hl,#0x00008000\r
488 adds z80hl,z80hl,z80hl\r
489 mrs z80f,cpsr ;@ S, Z, V & C\r
490 mov z80f,z80f,lsr#28\r
491 tst z80hl,#0x10000000 ;@ H, correct.\r
492 orrne z80f,z80f,#1<<HFlag\r
493 fetch 15\r
494.endm\r
495\r
496.macro opADD16 reg1 reg2\r
497 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
498 adds \reg1,\reg1,\reg2\r
499 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
500 orrcs z80f,z80f,#1<<CFlag\r
501 cmn r1,\reg2,lsl#4\r
502 orrcs z80f,z80f,#1<<HFlag\r
503.endm\r
504\r
505.macro opADD16s reg1 reg2 shift\r
506 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
507 adds \reg1,\reg1,\reg2,lsl#\shift\r
508 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
509 orrcs z80f,z80f,#1<<CFlag\r
510 cmn r1,\reg2,lsl#4+\shift\r
511 orrcs z80f,z80f,#1<<HFlag\r
512.endm\r
513\r
514.macro opADD16_2 reg\r
515 adds \reg,\reg,\reg\r
516 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
517 orrcs z80f,z80f,#1<<CFlag\r
518 tst \reg,#0x10000000 ;@ H, correct.\r
519 orrne z80f,z80f,#1<<HFlag\r
520.endm\r
521;@---------------------------------------\r
522\r
523.macro opAND reg shift\r
524 and z80a,z80a,\reg,lsl#\shift\r
525 sub r0,opcodes,#0x100\r
526 ldrb z80f,[r0,z80a, lsr #24]\r
527 orr z80f,z80f,#1<<HFlag\r
528.endm\r
529\r
530.macro opANDA\r
531 sub r0,opcodes,#0x100\r
532 ldrb z80f,[r0,z80a, lsr #24]\r
533 orr z80f,z80f,#1<<HFlag\r
534 fetch 4\r
535.endm\r
536\r
537.macro opANDH reg\r
538 opAND \reg 0\r
539 fetch 4\r
540.endm\r
541\r
542.macro opANDL reg\r
543 opAND \reg 8\r
544 fetch 4\r
545.endm\r
546\r
547.macro opANDb\r
548 opAND r0 24\r
549.endm\r
550;@---------------------------------------\r
551\r
552.macro opBITH reg bit\r
553 and z80f,z80f,#1<<CFlag\r
554 tst \reg,#1<<(24+\bit)\r
555 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
556 orrne z80f,z80f,#(1<<HFlag)\r
557 fetch 8\r
558.endm\r
559\r
560.macro opBIT7H reg\r
561 and z80f,z80f,#1<<CFlag\r
562 tst \reg,#1<<(24+7)\r
563 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
564 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
565 fetch 8\r
566.endm\r
567\r
568.macro opBITL reg bit\r
569 and z80f,z80f,#1<<CFlag\r
570 tst \reg,#1<<(16+\bit)\r
571 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
572 orrne z80f,z80f,#(1<<HFlag)\r
573 fetch 8\r
574.endm\r
575\r
576.macro opBIT7L reg\r
577 and z80f,z80f,#1<<CFlag\r
578 tst \reg,#1<<(16+7)\r
579 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
580 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
581 fetch 8\r
582.endm\r
583\r
584.macro opBITb bit\r
585 and z80f,z80f,#1<<CFlag\r
586 tst r0,#1<<\bit\r
587 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
588 orrne z80f,z80f,#(1<<HFlag)\r
589.endm\r
590\r
591.macro opBIT7b\r
592 and z80f,z80f,#1<<CFlag\r
593 tst r0,#1<<7\r
594 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
595 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
596.endm\r
597;@---------------------------------------\r
598\r
599.macro opCP reg shift\r
600 mov r1,z80a,lsl#4 ;@ prepare for check of half carry\r
601 cmp z80a,\reg,lsl#\shift\r
602 mrs z80f,cpsr\r
603 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
604 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
605 cmp r1,\reg,lsl#\shift+4\r
606 orrcc z80f,z80f,#1<<HFlag\r
607.endm\r
608\r
609.macro opCPA\r
610 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
611 fetch 4\r
612.endm\r
613\r
614.macro opCPH reg\r
615 and r0,\reg,#0xFF000000\r
616 opCP r0 0\r
617 fetch 4\r
618.endm\r
619\r
620.macro opCPL reg\r
621 opCP \reg 8\r
622 fetch 4\r
623.endm\r
624\r
625.macro opCPb\r
626 opCP r0 24\r
627.endm\r
628;@---------------------------------------\r
629\r
630.macro opDEC8 reg ;@for A and memory\r
631 and z80f,z80f,#1<<CFlag ;@save carry\r
632 orr z80f,z80f,#1<<NFlag ;@set n\r
633 tst \reg,#0x0f000000\r
634 orreq z80f,z80f,#1<<HFlag\r
635 subs \reg,\reg,#0x01000000\r
636 orrmi z80f,z80f,#1<<SFlag\r
637 orrvs z80f,z80f,#1<<VFlag\r
638 orreq z80f,z80f,#1<<ZFlag\r
639.endm\r
640\r
641.macro opDEC8H reg ;@for B, D & H\r
642 and z80f,z80f,#1<<CFlag ;@save carry\r
643 orr z80f,z80f,#1<<NFlag ;@set n\r
644 tst \reg,#0x0f000000\r
645 orreq z80f,z80f,#1<<HFlag\r
646 subs \reg,\reg,#0x01000000\r
647 orrmi z80f,z80f,#1<<SFlag\r
648 orrvs z80f,z80f,#1<<VFlag\r
649 tst \reg,#0xff000000 ;@Z\r
650 orreq z80f,z80f,#1<<ZFlag\r
651.endm\r
652\r
653.macro opDEC8L reg ;@for C, E & L\r
654 mov \reg,\reg,ror#24\r
655 opDEC8H \reg\r
656 mov \reg,\reg,ror#8\r
657.endm\r
658\r
659.macro opDEC8b ;@for memory\r
660 mov r0,r0,lsl#24\r
661 opDEC8 r0\r
662 mov r0,r0,lsr#24\r
663.endm\r
664;@---------------------------------------\r
665\r
666.macro opIN\r
667 stmfd sp!,{r3,r12}\r
668 mov lr,pc\r
669 ldr pc,[cpucontext,#z80_in] ;@ r0=port - data returned in r0\r
670 ldmfd sp!,{r3,r12}\r
671.endm\r
672\r
673.macro opIN_C\r
674 mov r0,z80bc, lsr #16\r
675 opIN\r
676.endm\r
677;@---------------------------------------\r
678\r
679.macro opINC8 reg ;@for A and memory\r
680 and z80f,z80f,#1<<CFlag ;@save carry, clear n\r
681 adds \reg,\reg,#0x01000000\r
682 orrmi z80f,z80f,#1<<SFlag\r
683 orrvs z80f,z80f,#1<<VFlag\r
684 orrcs z80f,z80f,#1<<ZFlag ;@cs when going from 0xFF to 0x00\r
685 tst \reg,#0x0f000000\r
686 orreq z80f,z80f,#1<<HFlag\r
687.endm\r
688\r
689.macro opINC8H reg ;@for B, D & H\r
690 opINC8 \reg\r
691.endm\r
692\r
693.macro opINC8L reg ;@for C, E & L\r
694 mov \reg,\reg,ror#24\r
695 opINC8 \reg\r
696 mov \reg,\reg,ror#8\r
697.endm\r
698\r
699.macro opINC8b ;@for memory\r
700 mov r0,r0,lsl#24\r
701 opINC8 r0\r
702 mov r0,r0,lsr#24\r
703.endm\r
704;@---------------------------------------\r
705\r
706.macro opOR reg shift\r
707 orr z80a,z80a,\reg,lsl#\shift\r
708 sub r0,opcodes,#0x100\r
709 ldrb z80f,[r0,z80a, lsr #24]\r
710.endm\r
711\r
712.macro opORA\r
713 sub r0,opcodes,#0x100\r
714 ldrb z80f,[r0,z80a, lsr #24]\r
715 fetch 4\r
716.endm\r
717\r
718.macro opORH reg\r
719 and r0,\reg,#0xFF000000\r
720 opOR r0 0\r
721 fetch 4\r
722.endm\r
723\r
724.macro opORL reg\r
725 opOR \reg 8\r
726 fetch 4\r
727.endm\r
728\r
729.macro opORb\r
730 opOR r0 24\r
731.endm\r
732;@---------------------------------------\r
733\r
734.macro opOUT\r
735 stmfd sp!,{r3,r12}\r
736 mov lr,pc\r
737 ldr pc,[cpucontext,#z80_out] ;@ r0=port r1=data\r
738 ldmfd sp!,{r3,r12}\r
739.endm\r
740\r
741.macro opOUT_C\r
742 mov r0,z80bc, lsr #16\r
743 opOUT\r
744.endm\r
745;@---------------------------------------\r
746\r
747.macro opPOP\r
748.if FAST_Z80SP\r
749.if DRZ80_FOR_PICODRIVE\r
750 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
751 ldr r2,[cpucontext,#z80sp_base]\r
752 ldrb r0,[z80sp],#1\r
753 add r2,r2,#0x2000\r
754 cmp z80sp,r2\r
755@ subge z80sp,z80sp,#0x2000 @ unstable?\r
756 ldrb r1,[z80sp],#1\r
757 cmp z80sp,r2\r
758@ subge z80sp,z80sp,#0x2000\r
759 orr r0,r0,r1, lsl #8\r
760.else\r
761 ldrb r0,[z80sp],#1\r
762 ldrb r1,[z80sp],#1\r
763 orr r0,r0,r1, lsl #8\r
764.endif\r
765.else\r
766 mov r0,z80sp\r
767 readmem16\r
768 add z80sp,z80sp,#2\r
769.endif\r
770.endm\r
771\r
772.macro opPOPreg reg\r
773 opPOP\r
774 mov \reg,r0, lsl #16\r
775 fetch 10\r
776.endm\r
777;@---------------------------------------\r
778\r
779.macro opPUSHareg reg @ reg > r1\r
780.if FAST_Z80SP\r
781.if DRZ80_FOR_PICODRIVE\r
782 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
783 ldr r0,[cpucontext,#z80sp_base]\r
784 cmp z80sp,r0\r
785 addle z80sp,z80sp,#0x2000\r
786 mov r1,\reg, lsr #8\r
787 strb r1,[z80sp,#-1]!\r
788 cmp z80sp,r0\r
789 addle z80sp,z80sp,#0x2000\r
790 strb \reg,[z80sp,#-1]!\r
791.else\r
792 mov r1,\reg, lsr #8\r
793 strb r1,[z80sp,#-1]!\r
794 strb \reg,[z80sp,#-1]!\r
795.endif\r
796.else\r
797 mov r0,\reg\r
798 sub z80sp,z80sp,#2\r
799 mov r1,z80sp\r
800 writemem16\r
801.endif\r
802.endm\r
803\r
804.macro opPUSHreg reg\r
805.if FAST_Z80SP\r
806.if DRZ80_FOR_PICODRIVE\r
807 ldr r0,[cpucontext,#z80sp_base]\r
808 cmp z80sp,r0\r
809 addle z80sp,z80sp,#0x2000\r
810 mov r1,\reg, lsr #24\r
811 strb r1,[z80sp,#-1]!\r
812 cmp z80sp,r0\r
813 addle z80sp,z80sp,#0x2000\r
814 mov r1,\reg, lsr #16\r
815 strb r1,[z80sp,#-1]!\r
816.else\r
817 mov r1,\reg, lsr #24\r
818 strb r1,[z80sp,#-1]!\r
819 mov r1,\reg, lsr #16\r
820 strb r1,[z80sp,#-1]!\r
821.endif\r
822.else\r
823 mov r0,\reg,lsr #16\r
824 sub z80sp,z80sp,#2\r
825 mov r1,z80sp\r
826 writemem16\r
827.endif\r
828.endm\r
829;@---------------------------------------\r
830\r
831.macro opRESmemHL bit\r
832.if DRZ80_FOR_PICODRIVE\r
833 mov r0,z80hl, lsr #16\r
834 bl pico_z80_read8\r
835 bic r0,r0,#1<<\bit\r
836 mov r1,z80hl, lsr #16\r
837 bl pico_z80_write8\r
838.else\r
839 mov r0,z80hl, lsr #16\r
840 stmfd sp!,{r3,r12}\r
841 mov lr,pc\r
842 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
843 bic r0,r0,#1<<\bit\r
844 mov r1,z80hl, lsr #16\r
845 mov lr,pc\r
846 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
847 ldmfd sp!,{r3,r12}\r
848.endif\r
849 fetch 15\r
850.endm\r
851;@---------------------------------------\r
852\r
853.macro opRESmem bit\r
854.if DRZ80_FOR_PICODRIVE\r
855 stmfd sp!,{r0} ;@ save addr as well\r
856 bl pico_z80_read8\r
857 bic r0,r0,#1<<\bit\r
858 ldmfd sp!,{r1} ;@ restore addr into r1\r
859 bl pico_z80_write8\r
860.else\r
861 stmfd sp!,{r3,r12}\r
862 stmfd sp!,{r0} ;@ save addr as well\r
863 mov lr,pc\r
864 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
865 bic r0,r0,#1<<\bit\r
866 ldmfd sp!,{r1} ;@ restore addr into r1\r
867 mov lr,pc\r
868 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
869 ldmfd sp!,{r3,r12}\r
870.endif\r
871 fetch 23\r
872.endm\r
873;@---------------------------------------\r
874\r
875.macro opRL reg1 reg2 shift\r
876 movs \reg1,\reg2,lsl \shift\r
877 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
878 orrne \reg1,\reg1,#0x01000000\r
879;@ and r2,z80f,#1<<CFlag\r
880;@ orr $x,$x,r2,lsl#23\r
881 sub r1,opcodes,#0x100\r
882 ldrb z80f,[r1,\reg1,lsr#24] ;@get PZS\r
883 orrcs z80f,z80f,#1<<CFlag\r
884.endm\r
885\r
886.macro opRLA\r
887 opRL z80a, z80a, #1\r
888 fetch 8\r
889.endm\r
890\r
891.macro opRLH reg\r
892 and r0,\reg,#0xFF000000 ;@mask high to r0\r
893 adds \reg,\reg,r0\r
894 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
895 orrne \reg,\reg,#0x01000000\r
896 sub r1,opcodes,#0x100\r
897 ldrb z80f,[r1,\reg,lsr#24] ;@get PZS\r
898 orrcs z80f,z80f,#1<<CFlag\r
899 fetch 8\r
900.endm\r
901\r
902.macro opRLL reg\r
903 opRL r0, \reg, #9\r
904 and \reg,\reg,#0xFF000000 ;@mask out high\r
905 orr \reg,\reg,r0,lsr#8\r
906 fetch 8\r
907.endm\r
908\r
909.macro opRLb\r
910 opRL r0, r0, #25\r
911 mov r0,r0,lsr#24\r
912.endm\r
913;@---------------------------------------\r
914\r
915.macro opRLC reg1 reg2 shift\r
916 movs \reg1,\reg2,lsl#\shift\r
917 orrcs \reg1,\reg1,#0x01000000\r
918 sub r1,opcodes,#0x100\r
919 ldrb z80f,[r1,\reg1,lsr#24]\r
920 orrcs z80f,z80f,#1<<CFlag\r
921.endm\r
922\r
923.macro opRLCA\r
924 opRLC z80a, z80a, 1\r
925 fetch 8\r
926.endm\r
927\r
928.macro opRLCH reg\r
929 and r0,\reg,#0xFF000000 ;@mask high to r0\r
930 adds \reg,\reg,r0\r
931 orrcs \reg,\reg,#0x01000000\r
932 sub r1,opcodes,#0x100\r
933 ldrb z80f,[r1,\reg,lsr#24]\r
934 orrcs z80f,z80f,#1<<CFlag\r
935 fetch 8\r
936.endm\r
937\r
938.macro opRLCL reg\r
939 opRLC r0, \reg, 9\r
940 and \reg,\reg,#0xFF000000 ;@mask out high\r
941 orr \reg,\reg,r0,lsr#8\r
942 fetch 8\r
943.endm\r
944\r
945.macro opRLCb\r
946 opRLC r0, r0, 25\r
947 mov r0,r0,lsr#24\r
948.endm\r
949;@---------------------------------------\r
950\r
951.macro opRR reg1 reg2 shift\r
952 movs \reg1,\reg2,lsr#\shift\r
953 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
954 orrne \reg1,\reg1,#0x00000080\r
955;@ and r2,z80_f,#PSR_C\r
956;@ orr \reg1,\reg1,r2,lsl#6\r
957 sub r1,opcodes,#0x100\r
958 ldrb z80f,[r1,\reg1]\r
959 orrcs z80f,z80f,#1<<CFlag\r
960.endm\r
961\r
962.macro opRRA\r
963 orr z80a,z80a,z80f,lsr#1 ;@get C\r
964 movs z80a,z80a,ror#25\r
965 mov z80a,z80a,lsl#24\r
966 sub r1,opcodes,#0x100\r
967 ldrb z80f,[r1,z80a,lsr#24]\r
968 orrcs z80f,z80f,#1<<CFlag\r
969 fetch 8\r
970.endm\r
971\r
972.macro opRRH reg\r
973 orr r0,\reg,z80f,lsr#1 ;@get C\r
974 movs r0,r0,ror#25\r
975 and \reg,\reg,#0x00FF0000 ;@mask out low\r
976 orr \reg,\reg,r0,lsl#24\r
977 sub r1,opcodes,#0x100\r
978 ldrb z80f,[r1,\reg,lsr#24]\r
979 orrcs z80f,z80f,#1<<CFlag\r
980 fetch 8\r
981.endm\r
982\r
983.macro opRRL reg\r
984 and r0,\reg,#0x00FF0000 ;@mask out low to r0\r
985 opRR r0 r0 17\r
986 and \reg,\reg,#0xFF000000 ;@mask out high\r
987 orr \reg,\reg,r0,lsl#16\r
988 fetch 8\r
989.endm\r
990\r
991.macro opRRb\r
992 opRR r0 r0 1\r
993.endm\r
994;@---------------------------------------\r
995\r
996.macro opRRC reg1 reg2 shift\r
997 movs \reg1,\reg2,lsr#\shift\r
998 orrcs \reg1,\reg1,#0x00000080\r
999 sub r1,opcodes,#0x100\r
1000 ldrb z80f,[r1,\reg1]\r
1001 orrcs z80f,z80f,#1<<CFlag\r
1002.endm\r
1003\r
1004.macro opRRCA\r
1005 opRRC z80a, z80a, 25\r
1006 mov z80a,z80a,lsl#24\r
1007 fetch 8\r
1008.endm\r
1009\r
1010.macro opRRCH reg\r
1011 opRRC r0, \reg, 25\r
1012 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1013 orr \reg,\reg,r0,lsl#24\r
1014 fetch 8\r
1015.endm\r
1016\r
1017.macro opRRCL reg\r
1018 and r0,\reg,#0x00FF0000 ;@mask low to r0\r
1019 opRRC r0, r0, 17\r
1020 and \reg,\reg,#0xFF000000 ;@mask out high\r
1021 orr \reg,\reg,r0,lsl#16\r
1022 fetch 8\r
1023.endm\r
1024\r
1025.macro opRRCb\r
1026 opRRC r0, r0, 1\r
1027.endm\r
1028;@---------------------------------------\r
1029\r
1030.macro opRST addr\r
1031 ldr r0,[cpucontext,#z80pc_base]\r
1032 sub r2,z80pc,r0\r
1033 opPUSHareg r2\r
1034 mov r0,#\addr\r
1035 rebasepc\r
1036 fetch 11\r
1037.endm\r
1038;@---------------------------------------\r
1039\r
1040.macro opSBC\r
1041 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1042 movs z80f,z80f,lsr#2 ;@ get C\r
1043 subcc r0,r0,#0x100\r
1044 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of H\r
1045 sbcs z80a,z80a,r0,ror#8\r
1046 mrs r0,cpsr\r
1047 eor z80f,z80f,z80a,lsr#24\r
1048 and z80f,z80f,#1<<HFlag ;@ H, correct\r
1049 orr z80f,z80f,r0,lsr#28 ;@ S,Z,V&C\r
1050 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1051.endm\r
1052\r
1053.macro opSBCA\r
1054 movs z80f,z80f,lsr#2 ;@ get C\r
1055 movcc z80a,#0x00000000\r
1056 movcs z80a,#0xFF000000\r
1057 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1058 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1059 fetch 4\r
1060.endm\r
1061\r
1062.macro opSBCH reg\r
1063 mov r0,\reg,lsr#24\r
1064 opSBC\r
1065 fetch 4\r
1066.endm\r
1067\r
1068.macro opSBCL reg\r
1069 mov r0,\reg,lsl#8\r
1070 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1071 movs z80f,z80f,lsr#2 ;@ get C\r
1072 sbccc r0,r0,#0xFF000000\r
1073 mov r1,z80a,lsl#4 ;@ prepare for check of H\r
1074 sbcs z80a,z80a,r0\r
1075 mrs z80f,cpsr\r
1076 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1077 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1078 cmp r1,r0,lsl#4\r
1079 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1080 fetch 4\r
1081.endm\r
1082\r
1083.macro opSBCb\r
1084 opSBC\r
1085.endm\r
1086;@---------------------------------------\r
1087\r
1088.macro opSBC16 reg\r
1089 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1090 movs z80f,z80f,lsr#2 ;@ get C\r
1091 sbc r1,r1,r1 ;@ set r1 to -1 or 0.\r
1092 orr r0,\reg,r1,lsr#16\r
1093 mov r1,z80hl,lsl#4 ;@ prepare for check of H\r
1094 sbcs z80hl,z80hl,r0\r
1095 mrs z80f,cpsr\r
1096 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1097 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1098 cmp r1,r0,lsl#4\r
1099 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1100 fetch 15\r
1101.endm\r
1102\r
1103.macro opSBC16HL\r
1104 movs z80f,z80f,lsr#2 ;@ get C\r
1105 mov z80hl,#0x00000000\r
1106 subcs z80hl,z80hl,#0x00010000\r
1107 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1108 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1109 fetch 15\r
1110.endm\r
1111;@---------------------------------------\r
1112\r
1113.macro opSETmemHL bit\r
1114.if DRZ80_FOR_PICODRIVE\r
1115 mov r0,z80hl, lsr #16\r
1116 bl pico_z80_read8\r
1117 orr r0,r0,#1<<\bit\r
1118 mov r1,z80hl, lsr #16\r
1119 bl pico_z80_write8\r
1120.else\r
1121 mov r0,z80hl, lsr #16\r
1122 stmfd sp!,{r3,r12}\r
1123 mov lr,pc\r
1124 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
1125 orr r0,r0,#1<<\bit\r
1126 mov r1,z80hl, lsr #16\r
1127 mov lr,pc\r
1128 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1129 ldmfd sp!,{r3,r12}\r
1130.endif\r
1131 fetch 15\r
1132.endm\r
1133;@---------------------------------------\r
1134\r
1135.macro opSETmem bit\r
1136.if DRZ80_FOR_PICODRIVE\r
1137 stmfd sp!,{r0} ;@ save addr as well\r
1138 bl pico_z80_read8\r
1139 orr r0,r0,#1<<\bit\r
1140 ldmfd sp!,{r1} ;@ restore addr into r1\r
1141 bl pico_z80_write8\r
1142.else\r
1143 stmfd sp!,{r3,r12}\r
1144 stmfd sp!,{r0} ;@ save addr as well\r
1145 mov lr,pc\r
1146 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
1147 orr r0,r0,#1<<\bit\r
1148 ldmfd sp!,{r1} ;@ restore addr into r1\r
1149 mov lr,pc\r
1150 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1151 ldmfd sp!,{r3,r12}\r
1152.endif\r
1153 fetch 23\r
1154.endm\r
1155;@---------------------------------------\r
1156\r
1157.macro opSLA reg1 reg2 shift\r
1158 movs \reg1,\reg2,lsl#\shift\r
1159 sub r1,opcodes,#0x100\r
1160 ldrb z80f,[r1,\reg1,lsr#24]\r
1161 orrcs z80f,z80f,#1<<CFlag\r
1162.endm\r
1163\r
1164.macro opSLAA\r
1165 opSLA z80a, z80a, 1\r
1166 fetch 8\r
1167.endm\r
1168\r
1169.macro opSLAH reg\r
1170 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1171 adds \reg,\reg,r0\r
1172 sub r1,opcodes,#0x100\r
1173 ldrb z80f,[r1,\reg,lsr#24]\r
1174 orrcs z80f,z80f,#1<<CFlag\r
1175 fetch 8\r
1176.endm\r
1177\r
1178.macro opSLAL reg\r
1179 opSLA r0, \reg, 9\r
1180 and \reg,\reg,#0xFF000000 ;@mask out high\r
1181 orr \reg,\reg,r0,lsr#8\r
1182 fetch 8\r
1183.endm\r
1184\r
1185.macro opSLAb\r
1186 opSLA r0, r0, 25\r
1187 mov r0,r0,lsr#24\r
1188.endm\r
1189;@---------------------------------------\r
1190\r
1191.macro opSLL reg1 reg2 shift\r
1192 movs \reg1,\reg2,lsl#\shift\r
1193 orr \reg1,\reg1,#0x01000000\r
1194 sub r1,opcodes,#0x100\r
1195 ldrb z80f,[r1,\reg1,lsr#24]\r
1196 orrcs z80f,z80f,#1<<CFlag\r
1197.endm\r
1198\r
1199.macro opSLLA\r
1200 opSLL z80a, z80a, 1\r
1201 fetch 8\r
1202.endm\r
1203\r
1204.macro opSLLH reg\r
1205 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1206 adds \reg,\reg,r0\r
1207 orr \reg,\reg,#0x01000000\r
1208 sub r1,opcodes,#0x100\r
1209 ldrb z80f,[r1,\reg,lsr#24]\r
1210 orrcs z80f,z80f,#1<<CFlag\r
1211 fetch 8\r
1212.endm\r
1213\r
1214.macro opSLLL reg\r
1215 opSLL r0, \reg, 9\r
1216 and \reg,\reg,#0xFF000000 ;@mask out high\r
1217 orr \reg,\reg,r0,lsr#8\r
1218 fetch 8\r
1219.endm\r
1220\r
1221.macro opSLLb\r
1222 opSLL r0, r0, 25\r
1223 mov r0,r0,lsr#24\r
1224.endm\r
1225;@---------------------------------------\r
1226\r
1227.macro opSRA reg1 reg2\r
1228 movs \reg1,\reg2,asr#25\r
1229 and \reg1,\reg1,#0xFF\r
1230 sub r1,opcodes,#0x100\r
1231 ldrb z80f,[r1,\reg1]\r
1232 orrcs z80f,z80f,#1<<CFlag\r
1233.endm\r
1234\r
1235.macro opSRAA\r
1236 movs r0,z80a,asr#25\r
1237 mov z80a,r0,lsl#24\r
1238 sub r1,opcodes,#0x100\r
1239 ldrb z80f,[r1,z80a,lsr#24]\r
1240 orrcs z80f,z80f,#1<<CFlag\r
1241 fetch 8\r
1242.endm\r
1243\r
1244.macro opSRAH reg\r
1245 movs r0,\reg,asr#25\r
1246 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1247 orr \reg,\reg,r0,lsl#24\r
1248 sub r1,opcodes,#0x100\r
1249 ldrb z80f,[r1,\reg,lsr#24]\r
1250 orrcs z80f,z80f,#1<<CFlag\r
1251 fetch 8\r
1252.endm\r
1253\r
1254.macro opSRAL reg\r
1255 mov r0,\reg,lsl#8\r
1256 opSRA r0, r0\r
1257 and \reg,\reg,#0xFF000000 ;@mask out high\r
1258 orr \reg,\reg,r0,lsl#16\r
1259 fetch 8\r
1260.endm\r
1261\r
1262.macro opSRAb\r
1263 mov r0,r0,lsl#24\r
1264 opSRA r0, r0\r
1265.endm\r
1266;@---------------------------------------\r
1267\r
1268.macro opSRL reg1 reg2 shift\r
1269 movs \reg1,\reg2,lsr#\shift\r
1270 sub r1,opcodes,#0x100\r
1271 ldrb z80f,[r1,\reg1]\r
1272 orrcs z80f,z80f,#1<<CFlag\r
1273.endm\r
1274\r
1275.macro opSRLA\r
1276 opSRL z80a, z80a, 25\r
1277 mov z80a,z80a,lsl#24\r
1278 fetch 8\r
1279.endm\r
1280\r
1281.macro opSRLH reg\r
1282 opSRL r0, \reg, 25\r
1283 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1284 orr \reg,\reg,r0,lsl#24\r
1285 fetch 8\r
1286.endm\r
1287\r
1288.macro opSRLL reg\r
1289 mov r0,\reg,lsl#8\r
1290 opSRL r0, r0, 25\r
1291 and \reg,\reg,#0xFF000000 ;@mask out high\r
1292 orr \reg,\reg,r0,lsl#16\r
1293 fetch 8\r
1294.endm\r
1295\r
1296.macro opSRLb\r
1297 opSRL r0, r0, 1\r
1298.endm\r
1299;@---------------------------------------\r
1300\r
1301.macro opSUB reg shift\r
1302 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
1303 subs z80a,z80a,\reg,lsl#\shift\r
1304 mrs z80f,cpsr\r
1305 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1306 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
1307 cmp r1,\reg,lsl#\shift+4\r
1308 orrcc z80f,z80f,#1<<HFlag\r
1309.endm\r
1310\r
1311.macro opSUBA\r
1312 mov z80a,#0\r
1313 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
1314 fetch 4\r
1315.endm\r
1316\r
1317.macro opSUBH reg\r
1318 and r0,\reg,#0xFF000000\r
1319 opSUB r0, 0\r
1320 fetch 4\r
1321.endm\r
1322\r
1323.macro opSUBL reg\r
1324 opSUB \reg, 8\r
1325 fetch 4\r
1326.endm\r
1327\r
1328.macro opSUBb\r
1329 opSUB r0, 24\r
1330.endm\r
1331;@---------------------------------------\r
1332\r
1333.macro opXOR reg shift\r
1334 eor z80a,z80a,\reg,lsl#\shift\r
1335 sub r0,opcodes,#0x100\r
1336 ldrb z80f,[r0,z80a, lsr #24]\r
1337.endm\r
1338\r
1339.macro opXORA\r
1340 mov z80a,#0\r
1341 mov z80f,#(1<<ZFlag)|(1<<VFlag)\r
1342 fetch 4\r
1343.endm\r
1344\r
1345.macro opXORH reg\r
1346 and r0,\reg,#0xFF000000\r
1347 opXOR r0, 0\r
1348 fetch 4\r
1349.endm\r
1350\r
1351.macro opXORL reg\r
1352 opXOR \reg, 8\r
1353 fetch 4\r
1354.endm\r
1355\r
1356.macro opXORb\r
1357 opXOR r0, 24\r
1358.endm\r
1359;@---------------------------------------\r
1360\r
1361\r
1362;@ --------------------------- Framework --------------------------\r
1363 \r
1364.text\r
1365\r
1366DrZ80Run:\r
1367 ;@ r0 = pointer to cpu context\r
1368 ;@ r1 = ISTATES to execute \r
1369 ;@######################################### \r
1370 stmdb sp!,{r4-r12,lr} ;@ save registers on stack\r
1371 mov cpucontext,r0 ;@ setup main memory pointer\r
1372 mov z80_icount,r1 ;@ setup number of Tstates to execute\r
1373\r
1374.if INTERRUPT_MODE == 0\r
1375 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
1376.endif\r
1377 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1378\r
1379.if INTERRUPT_MODE == 0\r
1380 ;@ check ints\r
1381 tst r0,#1\r
1382 movnes r0,r0,lsr #8\r
1383 blne DoInterrupt\r
1384.endif\r
1385\r
1386 ldrb r0,[z80pc],#1 ;@ get first op code\r
1387 ldr opcodes,MAIN_opcodes_POINTER2\r
1388 ldr pc,[opcodes,r0, lsl #2] ;@ execute op code\r
1389\r
1390MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
1391\r
1392\r
1393z80_execute_end:\r
1394 ;@ save registers in CPU context\r
1395 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1396 mov r0,z80_icount\r
1397 ldmia sp!,{r4-r12,pc} ;@ restore registers from stack and return to C code\r
1398\r
1399.if INTERRUPT_MODE\r
1400Interrupt_local: .word Interrupt\r
1401.endif\r
1402\r
1403DoInterrupt:\r
1404.if INTERRUPT_MODE\r
1405 ;@ Don't do own int handler, call mames instead\r
1406\r
1407 ;@ save everything back into DrZ80 context\r
1408 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1409 stmfd sp!,{r3,r4,r5,lr} ;@ save rest of regs on stack\r
1410 mov lr,pc\r
1411 ldr pc,Interrupt_local\r
1412 ldmfd sp!,{r3,r4,r5,lr} ;@ load regs from stack\r
1413 ;@ reload regs from DrZ80 context\r
1414 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1415 mov pc,lr ;@ return\r
1416.else\r
1417 stmfd sp!,{lr}\r
1418\r
1419 tst r0,#4 ;@ check halt\r
1420 addne z80pc,z80pc,#1\r
1421\r
1422 ldrb r1,[cpucontext,#z80im]\r
1423\r
1424 ;@ clear halt and int flags\r
1425 eor r0,r0,r0\r
1426 strb r0,[cpucontext,#z80if]\r
1427\r
1428 ;@ now check int mode\r
1429 tst r1,#1\r
1430 bne DoInterrupt_mode1\r
1431 tst r1,#2\r
1432 bne DoInterrupt_mode2\r
cc68a136 1433\r
1434DoInterrupt_mode0:\r
1435 ;@ get 3 byte vector\r
1436 ldr r2,[cpucontext, #z80irqvector]\r
1437 and r1,r2,#0xFF0000\r
1438 cmp r1,#0xCD0000 ;@ call\r
1439 bne 1f\r
1440 ;@ ########\r
1441 ;@ # call\r
1442 ;@ ########\r
1443 ;@ save current pc on stack\r
1444 ldr r0,[cpucontext,#z80pc_base]\r
1445 sub r0,z80pc,r0\r
1446.if FAST_Z80SP\r
1447 mov r1,r0, lsr #8\r
1448 strb r1,[z80sp,#-1]!\r
1449 strb r0,[z80sp,#-1]!\r
1450.else\r
1451 sub z80sp,z80sp,#2\r
1452 mov r1,z80sp\r
1453 writemem16\r
1454 ldr r2,[cpucontext, #z80irqvector]\r
1455.endif\r
1456 ;@ jump to vector\r
1457 mov r2,r2,lsl#16\r
1458 mov r0,r2,lsr#16\r
1459 ;@ rebase new pc\r
1460 rebasepc\r
1461\r
1462 b DoInterrupt_end\r
1463\r
14641:\r
1465 cmp r1,#0xC30000 ;@ jump\r
1466 bne DoInterrupt_mode1 ;@ rst\r
1467 ;@ #######\r
1468 ;@ # jump\r
1469 ;@ #######\r
1470 ;@ jump to vector\r
1471 mov r2,r2,lsl#16\r
1472 mov r0,r2,lsr#16\r
1473 ;@ rebase new pc\r
1474 rebasepc\r
1475\r
1476 b DoInterrupt_end\r
1477\r
1478DoInterrupt_mode1:\r
1479 ldr r0,[cpucontext,#z80pc_base]\r
1480 sub r2,z80pc,r0\r
1481 opPUSHareg r2\r
1482 mov r0,#0x38\r
1483 rebasepc\r
1484\r
1485 b DoInterrupt_end\r
1486\r
1487DoInterrupt_mode2:\r
1488 ;@ push pc on stack\r
1489 ldr r0,[cpucontext,#z80pc_base]\r
1490 sub r2,z80pc,r0\r
1491 opPUSHareg r2\r
1492\r
1493 ;@ get 1 byte vector address\r
1494 ldrb r0,[cpucontext, #z80irqvector]\r
1495 ldr r1,[cpucontext, #z80i]\r
1496 orr r0,r0,r1,lsr#16\r
1497\r
1498 ;@ read new pc from vector address\r
1499.if DRZ80_FOR_PICODRIVE\r
1500 bl pico_z80_read16\r
1501 bic r0,r0,#0xfe000\r
1502 ldr r1,[cpucontext,#z80pc_base]\r
1503 add z80pc,r1,r0\r
1504.if UPDATE_CONTEXT\r
1505 str z80pc,[cpucontext,#z80pc_pointer]\r
1506.endif\r
1507.else\r
1508 stmfd sp!,{r3,r12}\r
1509 mov lr,pc\r
1510 ldr pc,[cpucontext,#z80_read16]\r
1511\r
1512 ;@ rebase new pc\r
1513.if UPDATE_CONTEXT\r
1514 str z80pc,[cpucontext,#z80pc_pointer]\r
1515.endif\r
1516 mov lr,pc\r
1517 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
1518 ldmfd sp!,{r3,r12}\r
1519 mov z80pc,r0 \r
1520.endif\r
1521\r
1522DoInterrupt_end:\r
1523 ;@ interupt accepted so callback irq interface\r
1524 ldr r0,[cpucontext, #z80irqcallback]\r
1525 tst r0,r0\r
1526 ldmeqfd sp!,{pc}\r
1527 stmfd sp!,{r3,r12}\r
1528 mov lr,pc\r
1529 mov pc,r0 ;@ call callback function\r
1530 ldmfd sp!,{r3,r12}\r
1531 ldmfd sp!,{pc} ;@ return\r
1532\r
1533.endif\r
1534\r
1535.data\r
1536.align 4\r
1537\r
1538DAATable: .hword (0x00<<8)|(1<<ZFlag)|(1<<VFlag)\r
1539 .hword (0x01<<8) \r
1540 .hword (0x02<<8) \r
1541 .hword (0x03<<8) |(1<<VFlag)\r
1542 .hword (0x04<<8) \r
1543 .hword (0x05<<8) |(1<<VFlag)\r
1544 .hword (0x06<<8) |(1<<VFlag)\r
1545 .hword (0x07<<8) \r
1546 .hword (0x08<<8) \r
1547 .hword (0x09<<8) |(1<<VFlag)\r
1548 .hword (0x10<<8) |(1<<HFlag) \r
1549 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
1550 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
1551 .hword (0x13<<8) |(1<<HFlag) \r
1552 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
1553 .hword (0x15<<8) |(1<<HFlag) \r
1554 .hword (0x10<<8) \r
1555 .hword (0x11<<8) |(1<<VFlag)\r
1556 .hword (0x12<<8) |(1<<VFlag)\r
1557 .hword (0x13<<8) \r
1558 .hword (0x14<<8) |(1<<VFlag)\r
1559 .hword (0x15<<8) \r
1560 .hword (0x16<<8) \r
1561 .hword (0x17<<8) |(1<<VFlag)\r
1562 .hword (0x18<<8) |(1<<VFlag)\r
1563 .hword (0x19<<8) \r
1564 .hword (0x20<<8) |(1<<HFlag) \r
1565 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
1566 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
1567 .hword (0x23<<8) |(1<<HFlag) \r
1568 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
1569 .hword (0x25<<8) |(1<<HFlag) \r
1570 .hword (0x20<<8) \r
1571 .hword (0x21<<8) |(1<<VFlag)\r
1572 .hword (0x22<<8) |(1<<VFlag)\r
1573 .hword (0x23<<8) \r
1574 .hword (0x24<<8) |(1<<VFlag)\r
1575 .hword (0x25<<8) \r
1576 .hword (0x26<<8) \r
1577 .hword (0x27<<8) |(1<<VFlag)\r
1578 .hword (0x28<<8) |(1<<VFlag)\r
1579 .hword (0x29<<8) \r
1580 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
1581 .hword (0x31<<8) |(1<<HFlag) \r
1582 .hword (0x32<<8) |(1<<HFlag) \r
1583 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
1584 .hword (0x34<<8) |(1<<HFlag) \r
1585 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
1586 .hword (0x30<<8) |(1<<VFlag)\r
1587 .hword (0x31<<8) \r
1588 .hword (0x32<<8) \r
1589 .hword (0x33<<8) |(1<<VFlag)\r
1590 .hword (0x34<<8) \r
1591 .hword (0x35<<8) |(1<<VFlag)\r
1592 .hword (0x36<<8) |(1<<VFlag)\r
1593 .hword (0x37<<8) \r
1594 .hword (0x38<<8) \r
1595 .hword (0x39<<8) |(1<<VFlag)\r
1596 .hword (0x40<<8) |(1<<HFlag) \r
1597 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
1598 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
1599 .hword (0x43<<8) |(1<<HFlag) \r
1600 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
1601 .hword (0x45<<8) |(1<<HFlag) \r
1602 .hword (0x40<<8) \r
1603 .hword (0x41<<8) |(1<<VFlag)\r
1604 .hword (0x42<<8) |(1<<VFlag)\r
1605 .hword (0x43<<8) \r
1606 .hword (0x44<<8) |(1<<VFlag)\r
1607 .hword (0x45<<8) \r
1608 .hword (0x46<<8) \r
1609 .hword (0x47<<8) |(1<<VFlag)\r
1610 .hword (0x48<<8) |(1<<VFlag)\r
1611 .hword (0x49<<8) \r
1612 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
1613 .hword (0x51<<8) |(1<<HFlag) \r
1614 .hword (0x52<<8) |(1<<HFlag) \r
1615 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
1616 .hword (0x54<<8) |(1<<HFlag) \r
1617 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
1618 .hword (0x50<<8) |(1<<VFlag)\r
1619 .hword (0x51<<8) \r
1620 .hword (0x52<<8) \r
1621 .hword (0x53<<8) |(1<<VFlag)\r
1622 .hword (0x54<<8) \r
1623 .hword (0x55<<8) |(1<<VFlag)\r
1624 .hword (0x56<<8) |(1<<VFlag)\r
1625 .hword (0x57<<8) \r
1626 .hword (0x58<<8) \r
1627 .hword (0x59<<8) |(1<<VFlag)\r
1628 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
1629 .hword (0x61<<8) |(1<<HFlag) \r
1630 .hword (0x62<<8) |(1<<HFlag) \r
1631 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
1632 .hword (0x64<<8) |(1<<HFlag) \r
1633 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
1634 .hword (0x60<<8) |(1<<VFlag)\r
1635 .hword (0x61<<8) \r
1636 .hword (0x62<<8) \r
1637 .hword (0x63<<8) |(1<<VFlag)\r
1638 .hword (0x64<<8) \r
1639 .hword (0x65<<8) |(1<<VFlag)\r
1640 .hword (0x66<<8) |(1<<VFlag)\r
1641 .hword (0x67<<8) \r
1642 .hword (0x68<<8) \r
1643 .hword (0x69<<8) |(1<<VFlag)\r
1644 .hword (0x70<<8) |(1<<HFlag) \r
1645 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
1646 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
1647 .hword (0x73<<8) |(1<<HFlag) \r
1648 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
1649 .hword (0x75<<8) |(1<<HFlag) \r
1650 .hword (0x70<<8) \r
1651 .hword (0x71<<8) |(1<<VFlag)\r
1652 .hword (0x72<<8) |(1<<VFlag)\r
1653 .hword (0x73<<8) \r
1654 .hword (0x74<<8) |(1<<VFlag)\r
1655 .hword (0x75<<8) \r
1656 .hword (0x76<<8) \r
1657 .hword (0x77<<8) |(1<<VFlag)\r
1658 .hword (0x78<<8) |(1<<VFlag)\r
1659 .hword (0x79<<8) \r
1660 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
1661 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1662 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1663 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
1664 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1665 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
1666 .hword (0x80<<8)|(1<<SFlag) \r
1667 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)\r
1668 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)\r
1669 .hword (0x83<<8)|(1<<SFlag) \r
1670 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)\r
1671 .hword (0x85<<8)|(1<<SFlag) \r
1672 .hword (0x86<<8)|(1<<SFlag) \r
1673 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
1674 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
1675 .hword (0x89<<8)|(1<<SFlag) \r
1676 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1677 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
1678 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
1679 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1680 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
1681 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1682 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)\r
1683 .hword (0x91<<8)|(1<<SFlag) \r
1684 .hword (0x92<<8)|(1<<SFlag) \r
1685 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)\r
1686 .hword (0x94<<8)|(1<<SFlag) \r
1687 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)\r
1688 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
1689 .hword (0x97<<8)|(1<<SFlag) \r
1690 .hword (0x98<<8)|(1<<SFlag) \r
1691 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
1692 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1693 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1694 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1695 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1696 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1697 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1698 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1699 .hword (0x01<<8) |(1<<CFlag)\r
1700 .hword (0x02<<8) |(1<<CFlag)\r
1701 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1702 .hword (0x04<<8) |(1<<CFlag)\r
1703 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1704 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1705 .hword (0x07<<8) |(1<<CFlag)\r
1706 .hword (0x08<<8) |(1<<CFlag)\r
1707 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1708 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1709 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1710 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1711 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1712 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1713 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1714 .hword (0x10<<8) |(1<<CFlag)\r
1715 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1716 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1717 .hword (0x13<<8) |(1<<CFlag)\r
1718 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1719 .hword (0x15<<8) |(1<<CFlag)\r
1720 .hword (0x16<<8) |(1<<CFlag)\r
1721 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1722 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1723 .hword (0x19<<8) |(1<<CFlag)\r
1724 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1725 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1726 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1727 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1728 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1729 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1730 .hword (0x20<<8) |(1<<CFlag)\r
1731 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1732 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1733 .hword (0x23<<8) |(1<<CFlag)\r
1734 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1735 .hword (0x25<<8) |(1<<CFlag)\r
1736 .hword (0x26<<8) |(1<<CFlag)\r
1737 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1738 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1739 .hword (0x29<<8) |(1<<CFlag)\r
1740 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1741 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1742 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1743 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1744 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
1745 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1746 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
1747 .hword (0x31<<8) |(1<<CFlag)\r
1748 .hword (0x32<<8) |(1<<CFlag)\r
1749 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
1750 .hword (0x34<<8) |(1<<CFlag)\r
1751 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
1752 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
1753 .hword (0x37<<8) |(1<<CFlag)\r
1754 .hword (0x38<<8) |(1<<CFlag)\r
1755 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
1756 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
1757 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1758 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1759 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
1760 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1761 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
1762 .hword (0x40<<8) |(1<<CFlag)\r
1763 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
1764 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
1765 .hword (0x43<<8) |(1<<CFlag)\r
1766 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
1767 .hword (0x45<<8) |(1<<CFlag)\r
1768 .hword (0x46<<8) |(1<<CFlag)\r
1769 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
1770 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
1771 .hword (0x49<<8) |(1<<CFlag)\r
1772 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1773 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
1774 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
1775 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1776 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
1777 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1778 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
1779 .hword (0x51<<8) |(1<<CFlag)\r
1780 .hword (0x52<<8) |(1<<CFlag)\r
1781 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
1782 .hword (0x54<<8) |(1<<CFlag)\r
1783 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
1784 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
1785 .hword (0x57<<8) |(1<<CFlag)\r
1786 .hword (0x58<<8) |(1<<CFlag)\r
1787 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
1788 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1789 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
1790 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
1791 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1792 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
1793 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1794 .hword (0x60<<8) |(1<<VFlag) |(1<<CFlag)\r
1795 .hword (0x61<<8) |(1<<CFlag)\r
1796 .hword (0x62<<8) |(1<<CFlag)\r
1797 .hword (0x63<<8) |(1<<VFlag) |(1<<CFlag)\r
1798 .hword (0x64<<8) |(1<<CFlag)\r
1799 .hword (0x65<<8) |(1<<VFlag) |(1<<CFlag)\r
1800 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
1801 .hword (0x67<<8) |(1<<CFlag)\r
1802 .hword (0x68<<8) |(1<<CFlag)\r
1803 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
1804 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
1805 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1806 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1807 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
1808 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1809 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
1810 .hword (0x70<<8) |(1<<CFlag)\r
1811 .hword (0x71<<8) |(1<<VFlag) |(1<<CFlag)\r
1812 .hword (0x72<<8) |(1<<VFlag) |(1<<CFlag)\r
1813 .hword (0x73<<8) |(1<<CFlag)\r
1814 .hword (0x74<<8) |(1<<VFlag) |(1<<CFlag)\r
1815 .hword (0x75<<8) |(1<<CFlag)\r
1816 .hword (0x76<<8) |(1<<CFlag)\r
1817 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
1818 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
1819 .hword (0x79<<8) |(1<<CFlag)\r
1820 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1821 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1822 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1823 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1824 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1825 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1826 .hword (0x80<<8)|(1<<SFlag) |(1<<CFlag)\r
1827 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1828 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1829 .hword (0x83<<8)|(1<<SFlag) |(1<<CFlag)\r
1830 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1831 .hword (0x85<<8)|(1<<SFlag) |(1<<CFlag)\r
1832 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
1833 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1834 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1835 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
1836 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1837 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1838 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1839 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1840 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1841 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1842 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1843 .hword (0x91<<8)|(1<<SFlag) |(1<<CFlag)\r
1844 .hword (0x92<<8)|(1<<SFlag) |(1<<CFlag)\r
1845 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1846 .hword (0x94<<8)|(1<<SFlag) |(1<<CFlag)\r
1847 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1848 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1849 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
1850 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
1851 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1852 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1853 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1854 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1855 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1856 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1857 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1858 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1859 .hword (0xA1<<8)|(1<<SFlag) |(1<<CFlag)\r
1860 .hword (0xA2<<8)|(1<<SFlag) |(1<<CFlag)\r
1861 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1862 .hword (0xA4<<8)|(1<<SFlag) |(1<<CFlag)\r
1863 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1864 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1865 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
1866 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
1867 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1868 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1869 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1870 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1871 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1872 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1873 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1874 .hword (0xB0<<8)|(1<<SFlag) |(1<<CFlag)\r
1875 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1876 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1877 .hword (0xB3<<8)|(1<<SFlag) |(1<<CFlag)\r
1878 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1879 .hword (0xB5<<8)|(1<<SFlag) |(1<<CFlag)\r
1880 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
1881 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1882 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1883 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
1884 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1885 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1886 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1887 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1888 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1889 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1890 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1891 .hword (0xC1<<8)|(1<<SFlag) |(1<<CFlag)\r
1892 .hword (0xC2<<8)|(1<<SFlag) |(1<<CFlag)\r
1893 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1894 .hword (0xC4<<8)|(1<<SFlag) |(1<<CFlag)\r
1895 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1896 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1897 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
1898 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
1899 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1900 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1901 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1902 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1903 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1904 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1905 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1906 .hword (0xD0<<8)|(1<<SFlag) |(1<<CFlag)\r
1907 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1908 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1909 .hword (0xD3<<8)|(1<<SFlag) |(1<<CFlag)\r
1910 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1911 .hword (0xD5<<8)|(1<<SFlag) |(1<<CFlag)\r
1912 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
1913 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1914 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1915 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
1916 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1917 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1918 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1919 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1920 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1921 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1922 .hword (0xE0<<8)|(1<<SFlag) |(1<<CFlag)\r
1923 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1924 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1925 .hword (0xE3<<8)|(1<<SFlag) |(1<<CFlag)\r
1926 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1927 .hword (0xE5<<8)|(1<<SFlag) |(1<<CFlag)\r
1928 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
1929 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1930 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1931 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
1932 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1933 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1934 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1935 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1936 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1937 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1938 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1939 .hword (0xF1<<8)|(1<<SFlag) |(1<<CFlag)\r
1940 .hword (0xF2<<8)|(1<<SFlag) |(1<<CFlag)\r
1941 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1942 .hword (0xF4<<8)|(1<<SFlag) |(1<<CFlag)\r
1943 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1944 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1945 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
1946 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
1947 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1948 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1949 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1950 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1951 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1952 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1953 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1954 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1955 .hword (0x01<<8) |(1<<CFlag)\r
1956 .hword (0x02<<8) |(1<<CFlag)\r
1957 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1958 .hword (0x04<<8) |(1<<CFlag)\r
1959 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1960 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1961 .hword (0x07<<8) |(1<<CFlag)\r
1962 .hword (0x08<<8) |(1<<CFlag)\r
1963 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1964 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1965 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1966 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1967 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1968 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1969 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1970 .hword (0x10<<8) |(1<<CFlag)\r
1971 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1972 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1973 .hword (0x13<<8) |(1<<CFlag)\r
1974 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1975 .hword (0x15<<8) |(1<<CFlag)\r
1976 .hword (0x16<<8) |(1<<CFlag)\r
1977 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1978 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1979 .hword (0x19<<8) |(1<<CFlag)\r
1980 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1981 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1982 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1983 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1984 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1985 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1986 .hword (0x20<<8) |(1<<CFlag)\r
1987 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1988 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1989 .hword (0x23<<8) |(1<<CFlag)\r
1990 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1991 .hword (0x25<<8) |(1<<CFlag)\r
1992 .hword (0x26<<8) |(1<<CFlag)\r
1993 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1994 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1995 .hword (0x29<<8) |(1<<CFlag)\r
1996 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1997 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1998 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1999 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2000 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2001 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2002 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
2003 .hword (0x31<<8) |(1<<CFlag)\r
2004 .hword (0x32<<8) |(1<<CFlag)\r
2005 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
2006 .hword (0x34<<8) |(1<<CFlag)\r
2007 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
2008 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2009 .hword (0x37<<8) |(1<<CFlag)\r
2010 .hword (0x38<<8) |(1<<CFlag)\r
2011 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2012 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2013 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2014 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2015 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2016 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2017 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2018 .hword (0x40<<8) |(1<<CFlag)\r
2019 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
2020 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
2021 .hword (0x43<<8) |(1<<CFlag)\r
2022 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
2023 .hword (0x45<<8) |(1<<CFlag)\r
2024 .hword (0x46<<8) |(1<<CFlag)\r
2025 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2026 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2027 .hword (0x49<<8) |(1<<CFlag)\r
2028 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2029 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2030 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2031 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2032 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2033 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2034 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
2035 .hword (0x51<<8) |(1<<CFlag)\r
2036 .hword (0x52<<8) |(1<<CFlag)\r
2037 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
2038 .hword (0x54<<8) |(1<<CFlag)\r
2039 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
2040 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2041 .hword (0x57<<8) |(1<<CFlag)\r
2042 .hword (0x58<<8) |(1<<CFlag)\r
2043 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2044 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2045 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2046 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2047 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2048 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2049 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2050 .hword (0x06<<8) |(1<<VFlag)\r
2051 .hword (0x07<<8) \r
2052 .hword (0x08<<8) \r
2053 .hword (0x09<<8) |(1<<VFlag)\r
2054 .hword (0x0A<<8) |(1<<VFlag)\r
2055 .hword (0x0B<<8) \r
2056 .hword (0x0C<<8) |(1<<VFlag)\r
2057 .hword (0x0D<<8) \r
2058 .hword (0x0E<<8) \r
2059 .hword (0x0F<<8) |(1<<VFlag)\r
2060 .hword (0x10<<8) |(1<<HFlag) \r
2061 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
2062 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
2063 .hword (0x13<<8) |(1<<HFlag) \r
2064 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
2065 .hword (0x15<<8) |(1<<HFlag) \r
2066 .hword (0x16<<8) \r
2067 .hword (0x17<<8) |(1<<VFlag)\r
2068 .hword (0x18<<8) |(1<<VFlag)\r
2069 .hword (0x19<<8) \r
2070 .hword (0x1A<<8) \r
2071 .hword (0x1B<<8) |(1<<VFlag)\r
2072 .hword (0x1C<<8) \r
2073 .hword (0x1D<<8) |(1<<VFlag)\r
2074 .hword (0x1E<<8) |(1<<VFlag)\r
2075 .hword (0x1F<<8) \r
2076 .hword (0x20<<8) |(1<<HFlag) \r
2077 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
2078 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
2079 .hword (0x23<<8) |(1<<HFlag) \r
2080 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
2081 .hword (0x25<<8) |(1<<HFlag) \r
2082 .hword (0x26<<8) \r
2083 .hword (0x27<<8) |(1<<VFlag)\r
2084 .hword (0x28<<8) |(1<<VFlag)\r
2085 .hword (0x29<<8) \r
2086 .hword (0x2A<<8) \r
2087 .hword (0x2B<<8) |(1<<VFlag)\r
2088 .hword (0x2C<<8) \r
2089 .hword (0x2D<<8) |(1<<VFlag)\r
2090 .hword (0x2E<<8) |(1<<VFlag)\r
2091 .hword (0x2F<<8) \r
2092 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
2093 .hword (0x31<<8) |(1<<HFlag) \r
2094 .hword (0x32<<8) |(1<<HFlag) \r
2095 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
2096 .hword (0x34<<8) |(1<<HFlag) \r
2097 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
2098 .hword (0x36<<8) |(1<<VFlag)\r
2099 .hword (0x37<<8) \r
2100 .hword (0x38<<8) \r
2101 .hword (0x39<<8) |(1<<VFlag)\r
2102 .hword (0x3A<<8) |(1<<VFlag)\r
2103 .hword (0x3B<<8) \r
2104 .hword (0x3C<<8) |(1<<VFlag)\r
2105 .hword (0x3D<<8) \r
2106 .hword (0x3E<<8) \r
2107 .hword (0x3F<<8) |(1<<VFlag)\r
2108 .hword (0x40<<8) |(1<<HFlag) \r
2109 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
2110 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
2111 .hword (0x43<<8) |(1<<HFlag) \r
2112 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
2113 .hword (0x45<<8) |(1<<HFlag) \r
2114 .hword (0x46<<8) \r
2115 .hword (0x47<<8) |(1<<VFlag)\r
2116 .hword (0x48<<8) |(1<<VFlag)\r
2117 .hword (0x49<<8) \r
2118 .hword (0x4A<<8) \r
2119 .hword (0x4B<<8) |(1<<VFlag)\r
2120 .hword (0x4C<<8) \r
2121 .hword (0x4D<<8) |(1<<VFlag)\r
2122 .hword (0x4E<<8) |(1<<VFlag)\r
2123 .hword (0x4F<<8) \r
2124 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
2125 .hword (0x51<<8) |(1<<HFlag) \r
2126 .hword (0x52<<8) |(1<<HFlag) \r
2127 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
2128 .hword (0x54<<8) |(1<<HFlag) \r
2129 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
2130 .hword (0x56<<8) |(1<<VFlag)\r
2131 .hword (0x57<<8) \r
2132 .hword (0x58<<8) \r
2133 .hword (0x59<<8) |(1<<VFlag)\r
2134 .hword (0x5A<<8) |(1<<VFlag)\r
2135 .hword (0x5B<<8) \r
2136 .hword (0x5C<<8) |(1<<VFlag)\r
2137 .hword (0x5D<<8) \r
2138 .hword (0x5E<<8) \r
2139 .hword (0x5F<<8) |(1<<VFlag)\r
2140 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
2141 .hword (0x61<<8) |(1<<HFlag) \r
2142 .hword (0x62<<8) |(1<<HFlag) \r
2143 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
2144 .hword (0x64<<8) |(1<<HFlag) \r
2145 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
2146 .hword (0x66<<8) |(1<<VFlag)\r
2147 .hword (0x67<<8) \r
2148 .hword (0x68<<8) \r
2149 .hword (0x69<<8) |(1<<VFlag)\r
2150 .hword (0x6A<<8) |(1<<VFlag)\r
2151 .hword (0x6B<<8) \r
2152 .hword (0x6C<<8) |(1<<VFlag)\r
2153 .hword (0x6D<<8) \r
2154 .hword (0x6E<<8) \r
2155 .hword (0x6F<<8) |(1<<VFlag)\r
2156 .hword (0x70<<8) |(1<<HFlag) \r
2157 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
2158 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
2159 .hword (0x73<<8) |(1<<HFlag) \r
2160 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
2161 .hword (0x75<<8) |(1<<HFlag) \r
2162 .hword (0x76<<8) \r
2163 .hword (0x77<<8) |(1<<VFlag)\r
2164 .hword (0x78<<8) |(1<<VFlag)\r
2165 .hword (0x79<<8) \r
2166 .hword (0x7A<<8) \r
2167 .hword (0x7B<<8) |(1<<VFlag)\r
2168 .hword (0x7C<<8) \r
2169 .hword (0x7D<<8) |(1<<VFlag)\r
2170 .hword (0x7E<<8) |(1<<VFlag)\r
2171 .hword (0x7F<<8) \r
2172 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
2173 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2174 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2175 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
2176 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2177 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
2178 .hword (0x86<<8)|(1<<SFlag) \r
2179 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
2180 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
2181 .hword (0x89<<8)|(1<<SFlag) \r
2182 .hword (0x8A<<8)|(1<<SFlag) \r
2183 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag)\r
2184 .hword (0x8C<<8)|(1<<SFlag) \r
2185 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag)\r
2186 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag)\r
2187 .hword (0x8F<<8)|(1<<SFlag) \r
2188 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2189 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
2190 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
2191 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2192 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
2193 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2194 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
2195 .hword (0x97<<8)|(1<<SFlag) \r
2196 .hword (0x98<<8)|(1<<SFlag) \r
2197 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
2198 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag)\r
2199 .hword (0x9B<<8)|(1<<SFlag) \r
2200 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag)\r
2201 .hword (0x9D<<8)|(1<<SFlag) \r
2202 .hword (0x9E<<8)|(1<<SFlag) \r
2203 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag)\r
2204 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2205 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2206 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2207 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2208 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2209 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2210 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2211 .hword (0x07<<8) |(1<<CFlag)\r
2212 .hword (0x08<<8) |(1<<CFlag)\r
2213 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2214 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2215 .hword (0x0B<<8) |(1<<CFlag)\r
2216 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2217 .hword (0x0D<<8) |(1<<CFlag)\r
2218 .hword (0x0E<<8) |(1<<CFlag)\r
2219 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2220 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2221 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2222 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2223 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2224 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2225 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2226 .hword (0x16<<8) |(1<<CFlag)\r
2227 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2228 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2229 .hword (0x19<<8) |(1<<CFlag)\r
2230 .hword (0x1A<<8) |(1<<CFlag)\r
2231 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2232 .hword (0x1C<<8) |(1<<CFlag)\r
2233 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2234 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2235 .hword (0x1F<<8) |(1<<CFlag)\r
2236 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2237 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2238 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2239 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2240 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2241 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2242 .hword (0x26<<8) |(1<<CFlag)\r
2243 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2244 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2245 .hword (0x29<<8) |(1<<CFlag)\r
2246 .hword (0x2A<<8) |(1<<CFlag)\r
2247 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2248 .hword (0x2C<<8) |(1<<CFlag)\r
2249 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2250 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2251 .hword (0x2F<<8) |(1<<CFlag)\r
2252 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2253 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2254 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2255 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2256 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2257 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2258 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2259 .hword (0x37<<8) |(1<<CFlag)\r
2260 .hword (0x38<<8) |(1<<CFlag)\r
2261 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2262 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2263 .hword (0x3B<<8) |(1<<CFlag)\r
2264 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2265 .hword (0x3D<<8) |(1<<CFlag)\r
2266 .hword (0x3E<<8) |(1<<CFlag)\r
2267 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2268 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2269 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2270 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2271 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2272 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2273 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2274 .hword (0x46<<8) |(1<<CFlag)\r
2275 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2276 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2277 .hword (0x49<<8) |(1<<CFlag)\r
2278 .hword (0x4A<<8) |(1<<CFlag)\r
2279 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2280 .hword (0x4C<<8) |(1<<CFlag)\r
2281 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2282 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2283 .hword (0x4F<<8) |(1<<CFlag)\r
2284 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2285 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2286 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2287 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2288 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2289 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2290 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2291 .hword (0x57<<8) |(1<<CFlag)\r
2292 .hword (0x58<<8) |(1<<CFlag)\r
2293 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2294 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2295 .hword (0x5B<<8) |(1<<CFlag)\r
2296 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2297 .hword (0x5D<<8) |(1<<CFlag)\r
2298 .hword (0x5E<<8) |(1<<CFlag)\r
2299 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2300 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2301 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2302 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2303 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2304 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2305 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2306 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
2307 .hword (0x67<<8) |(1<<CFlag)\r
2308 .hword (0x68<<8) |(1<<CFlag)\r
2309 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
2310 .hword (0x6A<<8) |(1<<VFlag) |(1<<CFlag)\r
2311 .hword (0x6B<<8) |(1<<CFlag)\r
2312 .hword (0x6C<<8) |(1<<VFlag) |(1<<CFlag)\r
2313 .hword (0x6D<<8) |(1<<CFlag)\r
2314 .hword (0x6E<<8) |(1<<CFlag)\r
2315 .hword (0x6F<<8) |(1<<VFlag) |(1<<CFlag)\r
2316 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
2317 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2318 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2319 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
2320 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2321 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
2322 .hword (0x76<<8) |(1<<CFlag)\r
2323 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
2324 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
2325 .hword (0x79<<8) |(1<<CFlag)\r
2326 .hword (0x7A<<8) |(1<<CFlag)\r
2327 .hword (0x7B<<8) |(1<<VFlag) |(1<<CFlag)\r
2328 .hword (0x7C<<8) |(1<<CFlag)\r
2329 .hword (0x7D<<8) |(1<<VFlag) |(1<<CFlag)\r
2330 .hword (0x7E<<8) |(1<<VFlag) |(1<<CFlag)\r
2331 .hword (0x7F<<8) |(1<<CFlag)\r
2332 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2333 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2334 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2335 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2336 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2337 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2338 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
2339 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2340 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2341 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
2342 .hword (0x8A<<8)|(1<<SFlag) |(1<<CFlag)\r
2343 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2344 .hword (0x8C<<8)|(1<<SFlag) |(1<<CFlag)\r
2345 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2346 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2347 .hword (0x8F<<8)|(1<<SFlag) |(1<<CFlag)\r
2348 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2349 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2350 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2351 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2352 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2353 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2354 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2355 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
2356 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
2357 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2358 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2359 .hword (0x9B<<8)|(1<<SFlag) |(1<<CFlag)\r
2360 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2361 .hword (0x9D<<8)|(1<<SFlag) |(1<<CFlag)\r
2362 .hword (0x9E<<8)|(1<<SFlag) |(1<<CFlag)\r
2363 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2364 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2365 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2366 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2367 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2368 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2369 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2370 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2371 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
2372 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
2373 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2374 .hword (0xAA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2375 .hword (0xAB<<8)|(1<<SFlag) |(1<<CFlag)\r
2376 .hword (0xAC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2377 .hword (0xAD<<8)|(1<<SFlag) |(1<<CFlag)\r
2378 .hword (0xAE<<8)|(1<<SFlag) |(1<<CFlag)\r
2379 .hword (0xAF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2380 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2381 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2382 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2383 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2384 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2385 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2386 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
2387 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2388 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2389 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
2390 .hword (0xBA<<8)|(1<<SFlag) |(1<<CFlag)\r
2391 .hword (0xBB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2392 .hword (0xBC<<8)|(1<<SFlag) |(1<<CFlag)\r
2393 .hword (0xBD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2394 .hword (0xBE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2395 .hword (0xBF<<8)|(1<<SFlag) |(1<<CFlag)\r
2396 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2397 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2398 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2399 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2400 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2401 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2402 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2403 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
2404 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
2405 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2406 .hword (0xCA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2407 .hword (0xCB<<8)|(1<<SFlag) |(1<<CFlag)\r
2408 .hword (0xCC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2409 .hword (0xCD<<8)|(1<<SFlag) |(1<<CFlag)\r
2410 .hword (0xCE<<8)|(1<<SFlag) |(1<<CFlag)\r
2411 .hword (0xCF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2412 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2413 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2414 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2415 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2416 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2417 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2418 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
2419 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2420 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2421 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
2422 .hword (0xDA<<8)|(1<<SFlag) |(1<<CFlag)\r
2423 .hword (0xDB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2424 .hword (0xDC<<8)|(1<<SFlag) |(1<<CFlag)\r
2425 .hword (0xDD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2426 .hword (0xDE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2427 .hword (0xDF<<8)|(1<<SFlag) |(1<<CFlag)\r
2428 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2429 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2430 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2431 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2432 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2433 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2434 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
2435 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2436 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2437 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
2438 .hword (0xEA<<8)|(1<<SFlag) |(1<<CFlag)\r
2439 .hword (0xEB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2440 .hword (0xEC<<8)|(1<<SFlag) |(1<<CFlag)\r
2441 .hword (0xED<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2442 .hword (0xEE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2443 .hword (0xEF<<8)|(1<<SFlag) |(1<<CFlag)\r
2444 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2445 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2446 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2447 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2448 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2449 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2450 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2451 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
2452 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
2453 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2454 .hword (0xFA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2455 .hword (0xFB<<8)|(1<<SFlag) |(1<<CFlag)\r
2456 .hword (0xFC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2457 .hword (0xFD<<8)|(1<<SFlag) |(1<<CFlag)\r
2458 .hword (0xFE<<8)|(1<<SFlag) |(1<<CFlag)\r
2459 .hword (0xFF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2460 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2461 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2462 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2463 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2464 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2465 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2466 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2467 .hword (0x07<<8) |(1<<CFlag)\r
2468 .hword (0x08<<8) |(1<<CFlag)\r
2469 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2470 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2471 .hword (0x0B<<8) |(1<<CFlag)\r
2472 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2473 .hword (0x0D<<8) |(1<<CFlag)\r
2474 .hword (0x0E<<8) |(1<<CFlag)\r
2475 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2476 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2477 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2478 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2479 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2480 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2481 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2482 .hword (0x16<<8) |(1<<CFlag)\r
2483 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2484 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2485 .hword (0x19<<8) |(1<<CFlag)\r
2486 .hword (0x1A<<8) |(1<<CFlag)\r
2487 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2488 .hword (0x1C<<8) |(1<<CFlag)\r
2489 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2490 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2491 .hword (0x1F<<8) |(1<<CFlag)\r
2492 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2493 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2494 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2495 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2496 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2497 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2498 .hword (0x26<<8) |(1<<CFlag)\r
2499 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2500 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2501 .hword (0x29<<8) |(1<<CFlag)\r
2502 .hword (0x2A<<8) |(1<<CFlag)\r
2503 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2504 .hword (0x2C<<8) |(1<<CFlag)\r
2505 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2506 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2507 .hword (0x2F<<8) |(1<<CFlag)\r
2508 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2509 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2510 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2511 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2512 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2513 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2514 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2515 .hword (0x37<<8) |(1<<CFlag)\r
2516 .hword (0x38<<8) |(1<<CFlag)\r
2517 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2518 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2519 .hword (0x3B<<8) |(1<<CFlag)\r
2520 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2521 .hword (0x3D<<8) |(1<<CFlag)\r
2522 .hword (0x3E<<8) |(1<<CFlag)\r
2523 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2524 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2525 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2526 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2527 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2528 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2529 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2530 .hword (0x46<<8) |(1<<CFlag)\r
2531 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2532 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2533 .hword (0x49<<8) |(1<<CFlag)\r
2534 .hword (0x4A<<8) |(1<<CFlag)\r
2535 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2536 .hword (0x4C<<8) |(1<<CFlag)\r
2537 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2538 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2539 .hword (0x4F<<8) |(1<<CFlag)\r
2540 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2541 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2542 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2543 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2544 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2545 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2546 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2547 .hword (0x57<<8) |(1<<CFlag)\r
2548 .hword (0x58<<8) |(1<<CFlag)\r
2549 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2550 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2551 .hword (0x5B<<8) |(1<<CFlag)\r
2552 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2553 .hword (0x5D<<8) |(1<<CFlag)\r
2554 .hword (0x5E<<8) |(1<<CFlag)\r
2555 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2556 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2557 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2558 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2559 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2560 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2561 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2562 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
2563 .hword (0x01<<8) |(1<<NFlag) \r
2564 .hword (0x02<<8) |(1<<NFlag) \r
2565 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
2566 .hword (0x04<<8) |(1<<NFlag) \r
2567 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2568 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2569 .hword (0x07<<8) |(1<<NFlag) \r
2570 .hword (0x08<<8) |(1<<NFlag) \r
2571 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2572 .hword (0x04<<8) |(1<<NFlag) \r
2573 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2574 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2575 .hword (0x07<<8) |(1<<NFlag) \r
2576 .hword (0x08<<8) |(1<<NFlag) \r
2577 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2578 .hword (0x10<<8) |(1<<NFlag) \r
2579 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
2580 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
2581 .hword (0x13<<8) |(1<<NFlag) \r
2582 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2583 .hword (0x15<<8) |(1<<NFlag) \r
2584 .hword (0x16<<8) |(1<<NFlag) \r
2585 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2586 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2587 .hword (0x19<<8) |(1<<NFlag) \r
2588 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2589 .hword (0x15<<8) |(1<<NFlag) \r
2590 .hword (0x16<<8) |(1<<NFlag) \r
2591 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2592 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2593 .hword (0x19<<8) |(1<<NFlag) \r
2594 .hword (0x20<<8) |(1<<NFlag) \r
2595 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
2596 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
2597 .hword (0x23<<8) |(1<<NFlag) \r
2598 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2599 .hword (0x25<<8) |(1<<NFlag) \r
2600 .hword (0x26<<8) |(1<<NFlag) \r
2601 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2602 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2603 .hword (0x29<<8) |(1<<NFlag) \r
2604 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2605 .hword (0x25<<8) |(1<<NFlag) \r
2606 .hword (0x26<<8) |(1<<NFlag) \r
2607 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2608 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2609 .hword (0x29<<8) |(1<<NFlag) \r
2610 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
2611 .hword (0x31<<8) |(1<<NFlag) \r
2612 .hword (0x32<<8) |(1<<NFlag) \r
2613 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
2614 .hword (0x34<<8) |(1<<NFlag) \r
2615 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2616 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2617 .hword (0x37<<8) |(1<<NFlag) \r
2618 .hword (0x38<<8) |(1<<NFlag) \r
2619 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2620 .hword (0x34<<8) |(1<<NFlag) \r
2621 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2622 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2623 .hword (0x37<<8) |(1<<NFlag) \r
2624 .hword (0x38<<8) |(1<<NFlag) \r
2625 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2626 .hword (0x40<<8) |(1<<NFlag) \r
2627 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
2628 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
2629 .hword (0x43<<8) |(1<<NFlag) \r
2630 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2631 .hword (0x45<<8) |(1<<NFlag) \r
2632 .hword (0x46<<8) |(1<<NFlag) \r
2633 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2634 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2635 .hword (0x49<<8) |(1<<NFlag) \r
2636 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2637 .hword (0x45<<8) |(1<<NFlag) \r
2638 .hword (0x46<<8) |(1<<NFlag) \r
2639 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2640 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2641 .hword (0x49<<8) |(1<<NFlag) \r
2642 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
2643 .hword (0x51<<8) |(1<<NFlag) \r
2644 .hword (0x52<<8) |(1<<NFlag) \r
2645 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
2646 .hword (0x54<<8) |(1<<NFlag) \r
2647 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2648 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2649 .hword (0x57<<8) |(1<<NFlag) \r
2650 .hword (0x58<<8) |(1<<NFlag) \r
2651 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2652 .hword (0x54<<8) |(1<<NFlag) \r
2653 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2654 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2655 .hword (0x57<<8) |(1<<NFlag) \r
2656 .hword (0x58<<8) |(1<<NFlag) \r
2657 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2658 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
2659 .hword (0x61<<8) |(1<<NFlag) \r
2660 .hword (0x62<<8) |(1<<NFlag) \r
2661 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
2662 .hword (0x64<<8) |(1<<NFlag) \r
2663 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2664 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2665 .hword (0x67<<8) |(1<<NFlag) \r
2666 .hword (0x68<<8) |(1<<NFlag) \r
2667 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2668 .hword (0x64<<8) |(1<<NFlag) \r
2669 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2670 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2671 .hword (0x67<<8) |(1<<NFlag) \r
2672 .hword (0x68<<8) |(1<<NFlag) \r
2673 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2674 .hword (0x70<<8) |(1<<NFlag) \r
2675 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
2676 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
2677 .hword (0x73<<8) |(1<<NFlag) \r
2678 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2679 .hword (0x75<<8) |(1<<NFlag) \r
2680 .hword (0x76<<8) |(1<<NFlag) \r
2681 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2682 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2683 .hword (0x79<<8) |(1<<NFlag) \r
2684 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2685 .hword (0x75<<8) |(1<<NFlag) \r
2686 .hword (0x76<<8) |(1<<NFlag) \r
2687 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2688 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2689 .hword (0x79<<8) |(1<<NFlag) \r
2690 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
2691 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2692 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2693 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
2694 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2695 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2696 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2697 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2698 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2699 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2700 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2701 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2702 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2703 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2704 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2705 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2706 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2707 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
2708 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
2709 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2710 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag) \r
2711 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2712 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2713 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag) \r
2714 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag) \r
2715 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2716 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2717 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2718 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2719 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2720 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2721 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2722 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2723 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2724 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2725 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2726 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2727 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2728 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2729 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2730 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2731 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2732 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2733 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2734 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2735 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2736 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2737 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2738 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2739 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2740 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2741 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2742 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2743 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2744 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2745 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2746 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2747 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2748 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2749 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2750 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2751 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2752 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2753 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2754 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2755 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
2756 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
2757 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2758 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2759 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2760 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2761 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2762 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2763 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2764 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2765 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2766 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2767 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2768 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2769 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2770 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
2771 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2772 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2773 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
2774 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2775 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2776 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2777 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2778 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2779 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2780 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2781 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2782 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2783 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2784 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2785 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2786 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2787 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2788 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2789 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2790 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2791 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2792 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2793 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2794 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2795 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2796 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2797 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2798 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2799 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2800 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2801 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2802 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2803 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2804 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2805 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2806 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2807 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2808 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2809 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2810 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2811 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2812 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2813 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2814 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2815 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2816 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2817 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2818 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2819 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2820 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2821 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2822 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2823 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2824 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2825 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2826 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2827 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2828 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2829 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2830 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2831 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2832 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2833 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2834 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2835 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2836 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2837 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2838 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2839 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2840 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2841 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2842 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2843 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2844 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2845 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2846 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2847 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2848 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2849 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2850 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2851 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2852 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2853 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2854 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2855 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2856 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2857 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2858 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2859 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2860 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2861 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2862 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2863 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2864 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2865 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2866 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2867 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2868 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2869 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2870 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2871 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2872 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2873 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2874 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2875 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2876 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2877 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2878 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2879 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2880 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2881 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2882 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2883 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2884 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2885 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2886 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2887 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2888 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2889 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2890 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2891 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2892 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2893 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2894 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2895 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2896 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2897 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2898 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2899 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2900 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2901 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2902 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2903 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2904 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2905 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2906 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2907 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2908 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2909 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2910 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2911 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2912 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2913 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2914 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2915 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
2916 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
2917 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2918 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2919 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2920 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2921 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2922 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2923 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2924 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2925 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2926 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2927 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2928 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2929 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2930 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
2931 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2932 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2933 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
2934 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2935 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2936 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2937 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2938 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2939 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2940 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2941 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2942 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2943 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2944 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2945 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2946 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
2947 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2948 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2949 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
2950 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2951 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2952 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2953 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2954 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2955 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2956 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2957 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2958 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2959 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2960 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2961 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2962 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2963 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
2964 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
2965 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2966 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2967 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2968 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2969 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2970 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2971 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2972 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2973 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2974 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2975 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2976 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2977 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2978 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2979 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2980 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2981 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2982 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2983 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2984 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2985 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2986 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2987 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2988 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2989 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2990 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2991 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2992 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2993 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2994 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2995 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2996 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2997 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2998 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2999 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3000 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3001 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3002 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3003 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3004 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3005 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3006 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3007 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3008 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3009 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3010 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3011 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3012 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3013 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3014 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3015 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3016 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3017 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3018 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3019 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3020 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3021 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3022 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3023 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3024 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3025 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3026 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3027 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3028 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3029 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3030 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3031 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3032 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3033 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3034 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3035 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3036 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3037 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3038 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3039 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3040 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3041 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3042 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3043 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3044 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3045 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3046 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3047 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3048 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3049 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3050 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3051 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3052 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3053 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3054 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3055 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3056 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3057 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3058 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3059 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3060 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3061 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3062 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3063 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3064 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3065 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3066 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3067 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3068 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3069 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3070 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3071 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3072 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3073 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3074 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3075 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3076 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3077 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3078 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3079 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3080 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
3081 .hword (0x01<<8) |(1<<NFlag) \r
3082 .hword (0x02<<8) |(1<<NFlag) \r
3083 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
3084 .hword (0x04<<8) |(1<<NFlag) \r
3085 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
3086 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
3087 .hword (0x07<<8) |(1<<NFlag) \r
3088 .hword (0x08<<8) |(1<<NFlag) \r
3089 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
3090 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3091 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag) \r
3092 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3093 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag) \r
3094 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag) \r
3095 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3096 .hword (0x10<<8) |(1<<NFlag) \r
3097 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
3098 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
3099 .hword (0x13<<8) |(1<<NFlag) \r
3100 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
3101 .hword (0x15<<8) |(1<<NFlag) \r
3102 .hword (0x16<<8) |(1<<NFlag) \r
3103 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
3104 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
3105 .hword (0x19<<8) |(1<<NFlag) \r
3106 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag) \r
3107 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3108 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag) \r
3109 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3110 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3111 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag) \r
3112 .hword (0x20<<8) |(1<<NFlag) \r
3113 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
3114 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
3115 .hword (0x23<<8) |(1<<NFlag) \r
3116 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
3117 .hword (0x25<<8) |(1<<NFlag) \r
3118 .hword (0x26<<8) |(1<<NFlag) \r
3119 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
3120 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
3121 .hword (0x29<<8) |(1<<NFlag) \r
3122 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag) \r
3123 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3124 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag) \r
3125 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3126 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3127 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag) \r
3128 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
3129 .hword (0x31<<8) |(1<<NFlag) \r
3130 .hword (0x32<<8) |(1<<NFlag) \r
3131 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
3132 .hword (0x34<<8) |(1<<NFlag) \r
3133 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
3134 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
3135 .hword (0x37<<8) |(1<<NFlag) \r
3136 .hword (0x38<<8) |(1<<NFlag) \r
3137 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
3138 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3139 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag) \r
3140 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3141 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag) \r
3142 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag) \r
3143 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3144 .hword (0x40<<8) |(1<<NFlag) \r
3145 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
3146 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
3147 .hword (0x43<<8) |(1<<NFlag) \r
3148 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
3149 .hword (0x45<<8) |(1<<NFlag) \r
3150 .hword (0x46<<8) |(1<<NFlag) \r
3151 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
3152 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
3153 .hword (0x49<<8) |(1<<NFlag) \r
3154 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag) \r
3155 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3156 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag) \r
3157 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3158 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3159 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag) \r
3160 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
3161 .hword (0x51<<8) |(1<<NFlag) \r
3162 .hword (0x52<<8) |(1<<NFlag) \r
3163 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
3164 .hword (0x54<<8) |(1<<NFlag) \r
3165 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
3166 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
3167 .hword (0x57<<8) |(1<<NFlag) \r
3168 .hword (0x58<<8) |(1<<NFlag) \r
3169 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
3170 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3171 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag) \r
3172 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3173 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag) \r
3174 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag) \r
3175 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3176 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
3177 .hword (0x61<<8) |(1<<NFlag) \r
3178 .hword (0x62<<8) |(1<<NFlag) \r
3179 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
3180 .hword (0x64<<8) |(1<<NFlag) \r
3181 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
3182 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
3183 .hword (0x67<<8) |(1<<NFlag) \r
3184 .hword (0x68<<8) |(1<<NFlag) \r
3185 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
3186 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3187 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag) \r
3188 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3189 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag) \r
3190 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag) \r
3191 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3192 .hword (0x70<<8) |(1<<NFlag) \r
3193 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
3194 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
3195 .hword (0x73<<8) |(1<<NFlag) \r
3196 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
3197 .hword (0x75<<8) |(1<<NFlag) \r
3198 .hword (0x76<<8) |(1<<NFlag) \r
3199 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
3200 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
3201 .hword (0x79<<8) |(1<<NFlag) \r
3202 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag) \r
3203 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3204 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag) \r
3205 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3206 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3207 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag) \r
3208 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
3209 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3210 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3211 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
3212 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3213 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
3214 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
3215 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3216 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3217 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
3218 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3219 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3220 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3221 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3222 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3223 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3224 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3225 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
3226 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
3227 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3228 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3229 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3230 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3231 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3232 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3233 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3234 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3235 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3236 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3237 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3238 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3239 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3240 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3241 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3242 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3243 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3244 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3245 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3246 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3247 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3248 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3249 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3250 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3251 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3252 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3253 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3254 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3255 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3256 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3257 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3258 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3259 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3260 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3261 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3262 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3263 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3264 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3265 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3266 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3267 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3268 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3269 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3270 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3271 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3272 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3273 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3274 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3275 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3276 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3277 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3278 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3279 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3280 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3281 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3282 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3283 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3284 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3285 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3286 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3287 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3288 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3289 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3290 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3291 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3292 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3293 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3294 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3295 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3296 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3297 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3298 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3299 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3300 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3301 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3302 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3303 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3304 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3305 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3306 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3307 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3308 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3309 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3310 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3311 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3312 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3313 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3314 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3315 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3316 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3317 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3318 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3319 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3320 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3321 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3322 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3323 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3324 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3325 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3326 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3327 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3328 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3329 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3330 .hword (0x9A<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3331 .hword (0x9B<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3332 .hword (0x9C<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3333 .hword (0x9D<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3334 .hword (0x9E<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3335 .hword (0x9F<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3336 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3337 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3338 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3339 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3340 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3341 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3342 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3343 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3344 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3345 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3346 .hword (0xAA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3347 .hword (0xAB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3348 .hword (0xAC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3349 .hword (0xAD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3350 .hword (0xAE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3351 .hword (0xAF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3352 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3353 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3354 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3355 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3356 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3357 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3358 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3359 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3360 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3361 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3362 .hword (0xBA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3363 .hword (0xBB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3364 .hword (0xBC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3365 .hword (0xBD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3366 .hword (0xBE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3367 .hword (0xBF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3368 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3369 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3370 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3371 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3372 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3373 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3374 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3375 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3376 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3377 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3378 .hword (0xCA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3379 .hword (0xCB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3380 .hword (0xCC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3381 .hword (0xCD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3382 .hword (0xCE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3383 .hword (0xCF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3384 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3385 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3386 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3387 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3388 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3389 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3390 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3391 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3392 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3393 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3394 .hword (0xDA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3395 .hword (0xDB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3396 .hword (0xDC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3397 .hword (0xDD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3398 .hword (0xDE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3399 .hword (0xDF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3400 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3401 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3402 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3403 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3404 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3405 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3406 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3407 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3408 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3409 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3410 .hword (0xEA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3411 .hword (0xEB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3412 .hword (0xEC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3413 .hword (0xED<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3414 .hword (0xEE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3415 .hword (0xEF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3416 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3417 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3418 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3419 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3420 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3421 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3422 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3423 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3424 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3425 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3426 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3427 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3428 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3429 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3430 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3431 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3432 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3433 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
3434 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
3435 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3436 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
3437 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3438 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3439 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
3440 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
3441 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3442 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3443 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3444 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3445 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3446 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3447 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3448 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
3449 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3450 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3451 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
3452 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3453 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
3454 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
3455 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3456 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3457 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
3458 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3459 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3460 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3461 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3462 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3463 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3464 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
3465 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3466 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3467 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
3468 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3469 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
3470 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
3471 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3472 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3473 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
3474 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3475 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3476 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3477 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3478 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3479 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3480 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3481 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
3482 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
3483 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3484 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3485 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3486 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3487 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3488 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3489 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3490 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3491 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3492 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3493 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3494 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3495 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3496 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3497 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3498 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3499 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3500 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3501 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3502 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3503 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3504 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3505 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3506 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3507 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3508 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3509 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3510 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3511 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3512 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3513 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3514 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3515 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3516 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3517 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3518 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3519 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3520 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3521 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3522 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3523 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3524 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3525 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3526 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3527 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3528 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3529 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3530 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3531 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3532 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3533 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3534 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3535 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3536 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3537 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3538 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3539 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3540 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3541 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3542 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3543 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3544 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3545 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3546 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3547 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3548 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3549 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3550 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3551 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3552 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3553 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3554 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3555 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3556 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3557 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3558 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3559 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3560 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3561 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3562 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3563 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3564 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3565 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3566 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3567 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3568 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3569 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3570 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3571 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3572 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3573 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3574 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3575 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3576 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3577 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3578 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3579 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3580 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3581 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3582 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3583 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3584 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3585 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3586 \r
3587.align 4\r
3588\r
3589AF_Z80: .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 0\r
3590 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 1\r
3591 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 2\r
3592 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 3\r
3593 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 4\r
3594 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 5\r
3595 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 6\r
3596 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 7\r
3597 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 8\r
3598 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 9\r
3599 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 10\r
3600 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 11\r
3601 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 12\r
3602 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 13\r
3603 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 14\r
3604 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 15\r
3605 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 16\r
3606 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 17\r
3607 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 18\r
3608 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 19\r
3609 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 20\r
3610 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 21\r
3611 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 22\r
3612 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 23\r
3613 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 24\r
3614 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 25\r
3615 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 26\r
3616 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 27\r
3617 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 28\r
3618 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 29\r
3619 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 30\r
3620 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 31\r
3621 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 32\r
3622 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 33\r
3623 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 34\r
3624 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 35\r
3625 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 36\r
3626 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 37\r
3627 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 38\r
3628 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 39\r
3629 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 40\r
3630 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 41\r
3631 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 42\r
3632 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 43\r
3633 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 44\r
3634 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 45\r
3635 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 46\r
3636 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 47\r
3637 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 48\r
3638 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 49\r
3639 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 50\r
3640 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 51\r
3641 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 52\r
3642 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 53\r
3643 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 54\r
3644 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 55\r
3645 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 56\r
3646 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 57\r
3647 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 58\r
3648 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 59\r
3649 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 60\r
3650 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 61\r
3651 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 62\r
3652 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 63\r
3653 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 64\r
3654 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 65\r
3655 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 66\r
3656 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 67\r
3657 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 68\r
3658 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 69\r
3659 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 70\r
3660 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 71\r
3661 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 72\r
3662 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 73\r
3663 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 74\r
3664 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 75\r
3665 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 76\r
3666 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 77\r
3667 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 78\r
3668 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 79\r
3669 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 80\r
3670 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 81\r
3671 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 82\r
3672 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 83\r
3673 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 84\r
3674 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 85\r
3675 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 86\r
3676 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 87\r
3677 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 88\r
3678 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 89\r
3679 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 90\r
3680 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 91\r
3681 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 92\r
3682 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 93\r
3683 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 94\r
3684 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 95\r
3685 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 96\r
3686 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 97\r
3687 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 98\r
3688 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 99\r
3689 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 100\r
3690 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 101\r
3691 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 102\r
3692 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 103\r
3693 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 104\r
3694 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 105\r
3695 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 106\r
3696 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 107\r
3697 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 108\r
3698 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 109\r
3699 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 110\r
3700 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 111\r
3701 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 112\r
3702 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 113\r
3703 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 114\r
3704 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 115\r
3705 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 116\r
3706 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 117\r
3707 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 118\r
3708 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 119\r
3709 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 120\r
3710 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 121\r
3711 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 122\r
3712 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 123\r
3713 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 124\r
3714 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 125\r
3715 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 126\r
3716 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 127\r
3717 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 128\r
3718 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 129\r
3719 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 130\r
3720 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 131\r
3721 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 132\r
3722 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 133\r
3723 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 134\r
3724 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 135\r
3725 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 136\r
3726 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 137\r
3727 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 138\r
3728 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 139\r
3729 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 140\r
3730 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 141\r
3731 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 142\r
3732 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 143\r
3733 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 144\r
3734 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 145\r
3735 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 146\r
3736 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 147\r
3737 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 148\r
3738 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 149\r
3739 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 150\r
3740 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 151\r
3741 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 152\r
3742 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 153\r
3743 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 154\r
3744 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 155\r
3745 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 156\r
3746 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 157\r
3747 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 158\r
3748 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 159\r
3749 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 160\r
3750 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 161\r
3751 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 162\r
3752 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 163\r
3753 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 164\r
3754 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 165\r
3755 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 166\r
3756 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 167\r
3757 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 168\r
3758 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 169\r
3759 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 170\r
3760 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 171\r
3761 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 172\r
3762 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 173\r
3763 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 174\r
3764 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 175\r
3765 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 176\r
3766 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 177\r
3767 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 178\r
3768 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 179\r
3769 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 180\r
3770 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 181\r
3771 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 182\r
3772 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 183\r
3773 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 184\r
3774 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 185\r
3775 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 186\r
3776 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 187\r
3777 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 188\r
3778 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 189\r
3779 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 190\r
3780 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 191\r
3781 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 192\r
3782 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 193\r
3783 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 194\r
3784 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 195\r
3785 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 196\r
3786 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 197\r
3787 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 198\r
3788 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 199\r
3789 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 200\r
3790 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 201\r
3791 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 202\r
3792 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 203\r
3793 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 204\r
3794 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 205\r
3795 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 206\r
3796 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 207\r
3797 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 208\r
3798 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 209\r
3799 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 210\r
3800 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 211\r
3801 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 212\r
3802 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 213\r
3803 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 214\r
3804 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 215\r
3805 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 216\r
3806 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 217\r
3807 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 218\r
3808 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 219\r
3809 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 220\r
3810 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 221\r
3811 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 222\r
3812 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 223\r
3813 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 224\r
3814 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 225\r
3815 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 226\r
3816 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 227\r
3817 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 228\r
3818 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 229\r
3819 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 230\r
3820 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 231\r
3821 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 232\r
3822 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 233\r
3823 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 234\r
3824 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 235\r
3825 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 236\r
3826 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 237\r
3827 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 238\r
3828 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 239\r
3829 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 240\r
3830 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 241\r
3831 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 242\r
3832 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 243\r
3833 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 244\r
3834 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 245\r
3835 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 246\r
3836 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 247\r
3837 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 248\r
3838 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 249\r
3839 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 250\r
3840 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 251\r
3841 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 252\r
3842 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 253\r
3843 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 254\r
3844 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 255\r
3845\r
3846.align 4\r
3847\r
3848AF_ARM: .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 0\r
3849 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 1\r
3850 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 2\r
3851 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 3\r
3852 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 4\r
3853 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 5\r
3854 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 6\r
3855 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 7\r
3856 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 8\r
3857 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 9\r
3858 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 10\r
3859 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 11\r
3860 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 12\r
3861 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 13\r
3862 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 14\r
3863 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 15\r
3864 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 16\r
3865 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 17\r
3866 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 18\r
3867 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 19\r
3868 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 20\r
3869 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 21\r
3870 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 22\r
3871 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 23\r
3872 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 24\r
3873 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 25\r
3874 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 26\r
3875 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 27\r
3876 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 28\r
3877 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 29\r
3878 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 30\r
3879 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 31\r
3880 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 32\r
3881 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 33\r
3882 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 34\r
3883 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 35\r
3884 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 36\r
3885 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 37\r
3886 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 38\r
3887 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 39\r
3888 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 40\r
3889 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 41\r
3890 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 42\r
3891 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 43\r
3892 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 44\r
3893 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 45\r
3894 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 46\r
3895 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 47\r
3896 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 48\r
3897 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 49\r
3898 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 50\r
3899 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 51\r
3900 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 52\r
3901 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 53\r
3902 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 54\r
3903 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 55\r
3904 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 56\r
3905 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 57\r
3906 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 58\r
3907 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 59\r
3908 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 60\r
3909 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 61\r
3910 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 62\r
3911 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 63\r
3912 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 64\r
3913 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 65\r
3914 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 66\r
3915 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 67\r
3916 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 68\r
3917 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 69\r
3918 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 70\r
3919 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 71\r
3920 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 72\r
3921 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 73\r
3922 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 74\r
3923 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 75\r
3924 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 76\r
3925 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 77\r
3926 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 78\r
3927 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 79\r
3928 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 80\r
3929 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 81\r
3930 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 82\r
3931 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 83\r
3932 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 84\r
3933 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 85\r
3934 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 86\r
3935 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 87\r
3936 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 88\r
3937 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 89\r
3938 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 90\r
3939 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 91\r
3940 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 92\r
3941 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 93\r
3942 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 94\r
3943 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 95\r
3944 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 96\r
3945 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 97\r
3946 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 98\r
3947 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 99\r
3948 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 100\r
3949 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 101\r
3950 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 102\r
3951 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 103\r
3952 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 104\r
3953 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 105\r
3954 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 106\r
3955 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 107\r
3956 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 108\r
3957 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 109\r
3958 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 110\r
3959 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 111\r
3960 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 112\r
3961 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 113\r
3962 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 114\r
3963 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 115\r
3964 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 116\r
3965 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 117\r
3966 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 118\r
3967 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 119\r
3968 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 120\r
3969 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 121\r
3970 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 122\r
3971 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 123\r
3972 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 124\r
3973 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 125\r
3974 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 126\r
3975 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 127\r
3976 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 128\r
3977 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 129\r
3978 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 130\r
3979 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 131\r
3980 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 132\r
3981 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 133\r
3982 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 134\r
3983 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 135\r
3984 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 136\r
3985 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 137\r
3986 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 138\r
3987 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 139\r
3988 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 140\r
3989 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 141\r
3990 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 142\r
3991 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 143\r
3992 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 144\r
3993 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 145\r
3994 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 146\r
3995 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 147\r
3996 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 148\r
3997 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 149\r
3998 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 150\r
3999 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 151\r
4000 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 152\r
4001 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 153\r
4002 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 154\r
4003 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 155\r
4004 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 156\r
4005 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 157\r
4006 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 158\r
4007 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 159\r
4008 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 160\r
4009 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 161\r
4010 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 162\r
4011 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 163\r
4012 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 164\r
4013 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 165\r
4014 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 166\r
4015 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 167\r
4016 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 168\r
4017 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 169\r
4018 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 170\r
4019 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 171\r
4020 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 172\r
4021 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 173\r
4022 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 174\r
4023 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 175\r
4024 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 176\r
4025 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 177\r
4026 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 178\r
4027 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 179\r
4028 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 180\r
4029 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 181\r
4030 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 182\r
4031 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 183\r
4032 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 184\r
4033 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 185\r
4034 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 186\r
4035 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 187\r
4036 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 188\r
4037 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 189\r
4038 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 190\r
4039 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 191\r
4040 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 192\r
4041 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 193\r
4042 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 194\r
4043 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 195\r
4044 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 196\r
4045 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 197\r
4046 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 198\r
4047 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 199\r
4048 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 200\r
4049 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 201\r
4050 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 202\r
4051 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 203\r
4052 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 204\r
4053 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 205\r
4054 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 206\r
4055 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 207\r
4056 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 208\r
4057 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 209\r
4058 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 210\r
4059 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 211\r
4060 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 212\r
4061 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 213\r
4062 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 214\r
4063 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 215\r
4064 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 216\r
4065 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 217\r
4066 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 218\r
4067 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 219\r
4068 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 220\r
4069 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 221\r
4070 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 222\r
4071 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 223\r
4072 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 224\r
4073 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 225\r
4074 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 226\r
4075 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 227\r
4076 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 228\r
4077 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 229\r
4078 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 230\r
4079 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 231\r
4080 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 232\r
4081 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 233\r
4082 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 234\r
4083 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 235\r
4084 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 236\r
4085 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 237\r
4086 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 238\r
4087 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 239\r
4088 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 240\r
4089 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 241\r
4090 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 242\r
4091 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 243\r
4092 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 244\r
4093 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 245\r
4094 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 246\r
4095 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 247\r
4096 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 248\r
4097 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 249\r
4098 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 250\r
4099 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 251\r
4100 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 252\r
4101 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 253\r
4102 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 254\r
4103 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 255\r
4104\r
4105.align 4\r
4106\r
4107PZSTable_data: .byte (1<<ZFlag)|(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4108 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4109 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4110 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4111 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4112 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4113 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4114 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4115 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4116 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4117 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4118 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4119 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4120 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4121 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4122 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4123 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4124 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4125 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4126 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4127 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4128 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4129 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4130 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4131 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4132 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4133 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4134 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4135 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4136 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4137 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4138 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4139 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4140 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4141 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4142 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4143 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4144 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4145 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4146 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4147 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag) \r
4148\r
4149.align 4\r
4150\r
4151MAIN_opcodes: \r
4152 .word opcode_0_0,opcode_0_1,opcode_0_2,opcode_0_3,opcode_0_4,opcode_0_5,opcode_0_6,opcode_0_7\r
4153 .word opcode_0_8,opcode_0_9,opcode_0_A,opcode_0_B,opcode_0_C,opcode_0_D,opcode_0_E,opcode_0_F\r
4154 .word opcode_1_0,opcode_1_1,opcode_1_2,opcode_1_3,opcode_1_4,opcode_1_5,opcode_1_6,opcode_1_7\r
4155 .word opcode_1_8,opcode_1_9,opcode_1_A,opcode_1_B,opcode_1_C,opcode_1_D,opcode_1_E,opcode_1_F\r
4156 .word opcode_2_0,opcode_2_1,opcode_2_2,opcode_2_3,opcode_2_4,opcode_2_5,opcode_2_6,opcode_2_7\r
4157 .word opcode_2_8,opcode_2_9,opcode_2_A,opcode_2_B,opcode_2_C,opcode_2_D,opcode_2_E,opcode_2_F\r
4158 .word opcode_3_0,opcode_3_1,opcode_3_2,opcode_3_3,opcode_3_4,opcode_3_5,opcode_3_6,opcode_3_7\r
4159 .word opcode_3_8,opcode_3_9,opcode_3_A,opcode_3_B,opcode_3_C,opcode_3_D,opcode_3_E,opcode_3_F\r
4160 .word opcode_4_0,opcode_4_1,opcode_4_2,opcode_4_3,opcode_4_4,opcode_4_5,opcode_4_6,opcode_4_7\r
4161 .word opcode_4_8,opcode_4_9,opcode_4_A,opcode_4_B,opcode_4_C,opcode_4_D,opcode_4_E,opcode_4_F\r
4162 .word opcode_5_0,opcode_5_1,opcode_5_2,opcode_5_3,opcode_5_4,opcode_5_5,opcode_5_6,opcode_5_7\r
4163 .word opcode_5_8,opcode_5_9,opcode_5_A,opcode_5_B,opcode_5_C,opcode_5_D,opcode_5_E,opcode_5_F\r
4164 .word opcode_6_0,opcode_6_1,opcode_6_2,opcode_6_3,opcode_6_4,opcode_6_5,opcode_6_6,opcode_6_7\r
4165 .word opcode_6_8,opcode_6_9,opcode_6_A,opcode_6_B,opcode_6_C,opcode_6_D,opcode_6_E,opcode_6_F\r
4166 .word opcode_7_0,opcode_7_1,opcode_7_2,opcode_7_3,opcode_7_4,opcode_7_5,opcode_7_6,opcode_7_7\r
4167 .word opcode_7_8,opcode_7_9,opcode_7_A,opcode_7_B,opcode_7_C,opcode_7_D,opcode_7_E,opcode_7_F\r
4168 .word opcode_8_0,opcode_8_1,opcode_8_2,opcode_8_3,opcode_8_4,opcode_8_5,opcode_8_6,opcode_8_7\r
4169 .word opcode_8_8,opcode_8_9,opcode_8_A,opcode_8_B,opcode_8_C,opcode_8_D,opcode_8_E,opcode_8_F\r
4170 .word opcode_9_0,opcode_9_1,opcode_9_2,opcode_9_3,opcode_9_4,opcode_9_5,opcode_9_6,opcode_9_7\r
4171 .word opcode_9_8,opcode_9_9,opcode_9_A,opcode_9_B,opcode_9_C,opcode_9_D,opcode_9_E,opcode_9_F\r
4172 .word opcode_A_0,opcode_A_1,opcode_A_2,opcode_A_3,opcode_A_4,opcode_A_5,opcode_A_6,opcode_A_7\r
4173 .word opcode_A_8,opcode_A_9,opcode_A_A,opcode_A_B,opcode_A_C,opcode_A_D,opcode_A_E,opcode_A_F\r
4174 .word opcode_B_0,opcode_B_1,opcode_B_2,opcode_B_3,opcode_B_4,opcode_B_5,opcode_B_6,opcode_B_7\r
4175 .word opcode_B_8,opcode_B_9,opcode_B_A,opcode_B_B,opcode_B_C,opcode_B_D,opcode_B_E,opcode_B_F\r
4176 .word opcode_C_0,opcode_C_1,opcode_C_2,opcode_C_3,opcode_C_4,opcode_C_5,opcode_C_6,opcode_C_7\r
4177 .word opcode_C_8,opcode_C_9,opcode_C_A,opcode_C_B,opcode_C_C,opcode_C_D,opcode_C_E,opcode_C_F\r
4178 .word opcode_D_0,opcode_D_1,opcode_D_2,opcode_D_3,opcode_D_4,opcode_D_5,opcode_D_6,opcode_D_7\r
4179 .word opcode_D_8,opcode_D_9,opcode_D_A,opcode_D_B,opcode_D_C,opcode_D_D,opcode_D_E,opcode_D_F\r
4180 .word opcode_E_0,opcode_E_1,opcode_E_2,opcode_E_3,opcode_E_4,opcode_E_5,opcode_E_6,opcode_E_7\r
4181 .word opcode_E_8,opcode_E_9,opcode_E_A,opcode_E_B,opcode_E_C,opcode_E_D,opcode_E_E,opcode_E_F\r
4182 .word opcode_F_0,opcode_F_1,opcode_F_2,opcode_F_3,opcode_F_4,opcode_F_5,opcode_F_6,opcode_F_7\r
4183 .word opcode_F_8,opcode_F_9,opcode_F_A,opcode_F_B,opcode_F_C,opcode_F_D,opcode_F_E,opcode_F_F\r
4184\r
4185.align 4\r
4186\r
4187EI_DUMMY_opcodes:\r
4188 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4189 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4190 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4191 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4192 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4193 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4194 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4195 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4196 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4197 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4198 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4199 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4200 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4201 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4202 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4203 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4204 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4205 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4206 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4207 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4208 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4209 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4210 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4211 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4212 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4213 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4214 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4215 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4216 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4217 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4218 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4219 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4220\r
4221.text\r
4222.align 4\r
4223\r
4224;@NOP\r
4225opcode_0_0:\r
4226;@LD B,B\r
4227opcode_4_0:\r
4228;@LD C,C\r
4229opcode_4_9:\r
4230;@LD D,D\r
4231opcode_5_2:\r
4232;@LD E,E\r
4233opcode_5_B:\r
4234;@LD H,H\r
4235opcode_6_4:\r
4236;@LD L,L\r
4237opcode_6_D:\r
4238;@LD A,A\r
4239opcode_7_F:\r
4240 fetch 4\r
4241;@LD BC,NN\r
4242opcode_0_1:\r
4243 ldrb r0,[z80pc],#1\r
4244 ldrb r1,[z80pc],#1\r
4245 orr r0,r0,r1, lsl #8\r
4246 mov z80bc,r0, lsl #16\r
4247 fetch 10\r
4248;@LD (BC),A\r
4249opcode_0_2:\r
4250 mov r0,z80a, lsr #24\r
4251 mov r1,z80bc, lsr #16\r
4252 writemem8\r
4253 fetch 7\r
4254;@INC BC\r
4255opcode_0_3:\r
4256 add z80bc,z80bc,#1<<16\r
4257 fetch 6\r
4258;@INC B\r
4259opcode_0_4:\r
4260 opINC8H z80bc\r
4261 fetch 4\r
4262;@DEC B\r
4263opcode_0_5:\r
4264 opDEC8H z80bc\r
4265 fetch 4\r
4266;@LD B,N\r
4267opcode_0_6:\r
4268 ldrb r1,[z80pc],#1\r
4269 and z80bc,z80bc,#0xFF<<16\r
4270 orr z80bc,z80bc,r1, lsl #24\r
4271 fetch 7\r
4272;@RLCA\r
4273opcode_0_7:\r
4274 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4275 movs z80a,z80a, lsl #1\r
4276 orrcs z80a,z80a,#1<<24\r
4277 orrcs z80f,z80f,#1<<CFlag\r
4278 fetch 4\r
4279;@EX AF,AF'\r
4280opcode_0_8:\r
4281 add r1,cpucontext,#z80a2\r
4282 swp z80a,z80a,[r1]\r
4283 add r1,cpucontext,#z80f2\r
4284 swp z80f,z80f,[r1]\r
4285 fetch 4\r
4286;@ADD HL,BC\r
4287opcode_0_9:\r
4288 opADD16 z80hl z80bc\r
4289 fetch 11\r
4290;@LD A,(BC)\r
4291opcode_0_A:\r
4292 mov r0,z80bc, lsr #16\r
4293 readmem8\r
4294 mov z80a,r0, lsl #24\r
4295 fetch 7\r
4296;@DEC BC\r
4297opcode_0_B:\r
4298 sub z80bc,z80bc,#1<<16\r
4299 fetch 6\r
4300;@INC C\r
4301opcode_0_C:\r
4302 opINC8L z80bc\r
4303 fetch 4\r
4304;@DEC C\r
4305opcode_0_D:\r
4306 opDEC8L z80bc\r
4307 fetch 4\r
4308;@LD C,N\r
4309opcode_0_E:\r
4310 ldrb r1,[z80pc],#1\r
4311 and z80bc,z80bc,#0xFF<<24\r
4312 orr z80bc,z80bc,r1, lsl #16\r
4313 fetch 7\r
4314;@RRCA\r
4315opcode_0_F:\r
4316 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4317 movs z80a,z80a, lsr #25\r
4318 orrcs z80a,z80a,#1<<7\r
4319 orrcs z80f,z80f,#1<<CFlag\r
4320 mov z80a,z80a, lsl #24\r
4321 fetch 4\r
4322;@DJNZ $+2\r
4323opcode_1_0:\r
4324 sub z80bc,z80bc,#1<<24\r
4325 tst z80bc,#0xFF<<24\r
4326 ldrsb r1,[z80pc],#1\r
4327 addne z80pc,z80pc,r1\r
4328 subne z80_icount,z80_icount,#5\r
4329 fetch 8\r
4330\r
4331;@LD DE,NN\r
4332opcode_1_1:\r
4333 ldrb r0,[z80pc],#1\r
4334 ldrb r1,[z80pc],#1\r
4335 orr r0,r0,r1, lsl #8\r
4336 mov z80de,r0, lsl #16\r
4337 fetch 10\r
4338;@LD (DE),A\r
4339opcode_1_2:\r
4340 mov r0,z80a, lsr #24\r
4341 writemem8DE\r
4342 fetch 7\r
4343;@INC DE\r
4344opcode_1_3:\r
4345 add z80de,z80de,#1<<16\r
4346 fetch 6\r
4347;@INC D\r
4348opcode_1_4:\r
4349 opINC8H z80de\r
4350 fetch 4\r
4351;@DEC D\r
4352opcode_1_5:\r
4353 opDEC8H z80de\r
4354 fetch 4\r
4355;@LD D,N\r
4356opcode_1_6:\r
4357 ldrb r1,[z80pc],#1\r
4358 and z80de,z80de,#0xFF<<16\r
4359 orr z80de,z80de,r1, lsl #24\r
4360 fetch 7\r
4361;@RLA\r
4362opcode_1_7:\r
4363 tst z80f,#1<<CFlag\r
4364 orrne z80a,z80a,#1<<23\r
4365 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4366 movs z80a,z80a, lsl #1\r
4367 orrcs z80f,z80f,#1<<CFlag\r
4368 fetch 4\r
4369;@JR $+2\r
4370opcode_1_8:\r
4371 ldrsb r1,[z80pc],#1\r
4372 add z80pc,z80pc,r1\r
4373 fetch 12\r
4374;@ADD HL,DE\r
4375opcode_1_9:\r
4376 opADD16 z80hl z80de\r
4377 fetch 11\r
4378;@LD A,(DE)\r
4379opcode_1_A:\r
4380 mov r0,z80de, lsr #16\r
4381 readmem8\r
4382 mov z80a,r0, lsl #24\r
4383 fetch 7\r
4384;@DEC DE\r
4385opcode_1_B:\r
4386 sub z80de,z80de,#1<<16\r
4387 fetch 6\r
4388;@INC E\r
4389opcode_1_C:\r
4390 opINC8L z80de\r
4391 fetch 4\r
4392;@DEC E\r
4393opcode_1_D:\r
4394 opDEC8L z80de\r
4395 fetch 4\r
4396;@LD E,N\r
4397opcode_1_E:\r
4398 ldrb r0,[z80pc],#1\r
4399 and z80de,z80de,#0xFF<<24\r
4400 orr z80de,z80de,r0, lsl #16\r
4401 fetch 7\r
4402;@RRA\r
4403opcode_1_F:\r
4404 orr z80a,z80a,z80f,lsr#1 ;@get C\r
4405 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4406 movs z80a,z80a,ror#25\r
4407 orrcs z80f,z80f,#1<<CFlag\r
4408 mov z80a,z80a,lsl#24\r
4409 fetch 4\r
4410;@JR NZ,$+2\r
4411opcode_2_0:\r
4412 tst z80f,#1<<ZFlag\r
4413 beq opcode_1_8\r
4414 add z80pc,z80pc,#1\r
4415 fetch 7\r
4416;@LD HL,NN\r
4417opcode_2_1:\r
4418 ldrb r0,[z80pc],#1\r
4419 ldrb r1,[z80pc],#1\r
4420 orr r0,r0,r1, lsl #8\r
4421 mov z80hl,r0, lsl #16\r
4422 fetch 10\r
4423;@LD (NN),HL\r
4424opcode_ED_63:\r
4425 eatcycles 4\r
4426;@LD (NN),HL\r
4427opcode_2_2:\r
4428 ldrb r0,[z80pc],#1\r
4429 ldrb r1,[z80pc],#1\r
4430 orr r1,r0,r1, lsl #8\r
4431 mov r0,z80hl, lsr #16\r
4432 writemem16\r
4433 fetch 16\r
4434;@INC HL\r
4435opcode_2_3:\r
4436 add z80hl,z80hl,#1<<16\r
4437 fetch 6\r
4438;@INC H\r
4439opcode_2_4:\r
4440 opINC8H z80hl\r
4441 fetch 4\r
4442;@DEC H\r
4443opcode_2_5:\r
4444 opDEC8H z80hl\r
4445 fetch 4\r
4446;@LD H,N\r
4447opcode_2_6:\r
4448 ldrb r1,[z80pc],#1\r
4449 and z80hl,z80hl,#0xFF<<16\r
4450 orr z80hl,z80hl,r1, lsl #24\r
4451 fetch 7\r
4452DAATABLE_LOCAL: .word DAATable\r
4453;@DAA\r
4454opcode_2_7:\r
4455 mov r1,z80a, lsr #24\r
4456 tst z80f,#1<<CFlag\r
4457 orrne r1,r1,#256\r
4458 tst z80f,#1<<HFlag\r
4459 orrne r1,r1,#512\r
4460 tst z80f,#1<<NFlag\r
4461 orrne r1,r1,#1024\r
4462 ldr r2,DAATABLE_LOCAL\r
4463 add r2,r2,r1, lsl #1\r
4464 ldrh r1,[r2]\r
4465 and z80f,r1,#0xFF\r
4466 and r2,r1,#0xFF<<8\r
4467 mov z80a,r2, lsl #16\r
4468 fetch 4\r
4469;@JR Z,$+2\r
4470opcode_2_8:\r
4471 tst z80f,#1<<ZFlag\r
4472 bne opcode_1_8\r
4473 add z80pc,z80pc,#1\r
4474 fetch 7\r
4475;@ADD HL,HL\r
4476opcode_2_9:\r
4477 opADD16_2 z80hl\r
4478 fetch 11\r
4479;@LD HL,(NN)\r
4480opcode_ED_6B:\r
4481 eatcycles 4\r
4482;@LD HL,(NN)\r
4483opcode_2_A:\r
4484 ldrb r0,[z80pc],#1\r
4485 ldrb r1,[z80pc],#1\r
4486 orr r0,r0,r1, lsl #8\r
4487 readmem16\r
4488 mov z80hl,r0, lsl #16\r
4489 fetch 16\r
4490;@DEC HL\r
4491opcode_2_B:\r
4492 sub z80hl,z80hl,#1<<16\r
4493 fetch 6\r
4494;@INC L\r
4495opcode_2_C:\r
4496 opINC8L z80hl\r
4497 fetch 4\r
4498;@DEC L\r
4499opcode_2_D:\r
4500 opDEC8L z80hl\r
4501 fetch 4\r
4502;@LD L,N\r
4503opcode_2_E:\r
4504 ldrb r0,[z80pc],#1\r
4505 and z80hl,z80hl,#0xFF<<24\r
4506 orr z80hl,z80hl,r0, lsl #16\r
4507 fetch 7\r
4508;@CPL\r
4509opcode_2_F:\r
4510 eor z80a,z80a,#0xFF<<24\r
4511 orr z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4512 fetch 4\r
4513;@JR NC,$+2\r
4514opcode_3_0:\r
4515 tst z80f,#1<<CFlag\r
4516 beq opcode_1_8\r
4517 add z80pc,z80pc,#1\r
4518 fetch 7\r
4519;@LD SP,NN\r
4520opcode_3_1:\r
4521 ldrb r0,[z80pc],#1\r
4522 ldrb r1,[z80pc],#1\r
4523\r
4524.if FAST_Z80SP\r
4525 orr r0,r0,r1, lsl #8\r
4526 rebasesp\r
4527 mov z80sp,r0\r
4528.else\r
4529 orr z80sp,r0,r1, lsl #8\r
4530.endif\r
4531 fetch 10\r
4532;@LD (NN),A\r
4533opcode_3_2:\r
4534 ldrb r0,[z80pc],#1\r
4535 ldrb r1,[z80pc],#1\r
4536 orr r1,r0,r1, lsl #8\r
4537 mov r0,z80a, lsr #24\r
4538 writemem8\r
4539 fetch 13\r
4540;@INC SP\r
4541opcode_3_3:\r
4542 add z80sp,z80sp,#1\r
4543 fetch 6\r
4544;@INC (HL)\r
4545opcode_3_4:\r
4546 readmem8HL\r
4547 opINC8b\r
4548 writemem8HL\r
4549 fetch 11\r
4550;@DEC (HL)\r
4551opcode_3_5:\r
4552 readmem8HL\r
4553 opDEC8b\r
4554 writemem8HL\r
4555 fetch 11\r
4556;@LD (HL),N\r
4557opcode_3_6:\r
4558 ldrb r0,[z80pc],#1\r
4559 writemem8HL\r
4560 fetch 10\r
4561;@SCF\r
4562opcode_3_7:\r
4563 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4564 orr z80f,z80f,#1<<CFlag\r
4565 fetch 4\r
4566;@JR C,$+2\r
4567opcode_3_8:\r
4568 tst z80f,#1<<CFlag\r
4569 bne opcode_1_8\r
4570 add z80pc,z80pc,#1\r
4571 fetch 8\r
4572;@ADD HL,SP\r
4573opcode_3_9:\r
4574.if FAST_Z80SP\r
4575 ldr r0,[cpucontext,#z80sp_base]\r
4576 sub r0,z80sp,r0\r
4577 opADD16s z80hl r0 16\r
4578.else\r
4579 opADD16s z80hl z80sp 16\r
4580.endif\r
4581 fetch 11\r
4582;@LD A,(NN)\r
4583opcode_3_A:\r
4584 ldrb r0,[z80pc],#1\r
4585 ldrb r1,[z80pc],#1\r
4586 orr r0,r0,r1, lsl #8\r
4587 readmem8\r
4588 mov z80a,r0, lsl #24\r
4589 fetch 11\r
4590;@DEC SP\r
4591opcode_3_B:\r
4592 sub z80sp,z80sp,#1\r
4593 fetch 6\r
4594;@INC A\r
4595opcode_3_C:\r
4596 opINC8 z80a\r
4597 fetch 4\r
4598;@DEC A\r
4599opcode_3_D:\r
4600 opDEC8 z80a\r
4601 fetch 4\r
4602;@LD A,N\r
4603opcode_3_E:\r
4604 ldrb r0,[z80pc],#1\r
4605 mov z80a,r0, lsl #24\r
4606 fetch 7\r
4607;@CCF\r
4608opcode_3_F:\r
4609 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4610 tst z80f,#1<<CFlag\r
4611 orrne z80f,z80f,#1<<HFlag\r
4612 eor z80f,z80f,#1<<CFlag\r
4613 fetch 4\r
4614\r
4615;@LD B,C\r
4616opcode_4_1:\r
4617 and z80bc,z80bc,#0xFF<<16\r
4618 orr z80bc,z80bc,z80bc, lsl #8\r
4619 fetch 4\r
4620;@LD B,D\r
4621opcode_4_2:\r
4622 and z80bc,z80bc,#0xFF<<16\r
4623 and r1,z80de,#0xFF<<24\r
4624 orr z80bc,z80bc,r1\r
4625 fetch 4\r
4626;@LD B,E\r
4627opcode_4_3:\r
4628 and z80bc,z80bc,#0xFF<<16\r
4629 and r1,z80de,#0xFF<<16\r
4630 orr z80bc,z80bc,r1, lsl #8\r
4631 fetch 4\r
4632;@LD B,H\r
4633opcode_4_4:\r
4634 and z80bc,z80bc,#0xFF<<16\r
4635 and r1,z80hl,#0xFF<<24\r
4636 orr z80bc,z80bc,r1\r
4637 fetch 4\r
4638;@LD B,L\r
4639opcode_4_5:\r
4640 and z80bc,z80bc,#0xFF<<16\r
4641 and r1,z80hl,#0xFF<<16\r
4642 orr z80bc,z80bc,r1, lsl #8\r
4643 fetch 4\r
4644;@LD B,(HL)\r
4645opcode_4_6:\r
4646 readmem8HL\r
4647 and z80bc,z80bc,#0xFF<<16\r
4648 orr z80bc,z80bc,r0, lsl #24\r
4649 fetch 7\r
4650;@LD B,A\r
4651opcode_4_7:\r
4652 and z80bc,z80bc,#0xFF<<16\r
4653 orr z80bc,z80bc,z80a\r
4654 fetch 4\r
4655;@LD C,B\r
4656opcode_4_8:\r
4657 and z80bc,z80bc,#0xFF<<24\r
4658 orr z80bc,z80bc,z80bc, lsr #8\r
4659 fetch 4\r
4660;@LD C,D\r
4661opcode_4_A:\r
4662 and z80bc,z80bc,#0xFF<<24\r
4663 and r1,z80de,#0xFF<<24\r
4664 orr z80bc,z80bc,r1, lsr #8\r
4665 fetch 4\r
4666;@LD C,E\r
4667opcode_4_B:\r
4668 and z80bc,z80bc,#0xFF<<24\r
4669 and r1,z80de,#0xFF<<16\r
4670 orr z80bc,z80bc,r1 \r
4671 fetch 4\r
4672;@LD C,H\r
4673opcode_4_C:\r
4674 and z80bc,z80bc,#0xFF<<24\r
4675 and r1,z80hl,#0xFF<<24\r
4676 orr z80bc,z80bc,r1, lsr #8\r
4677 fetch 4\r
4678;@LD C,L\r
4679opcode_4_D:\r
4680 and z80bc,z80bc,#0xFF<<24\r
4681 and r1,z80hl,#0xFF<<16\r
4682 orr z80bc,z80bc,r1 \r
4683 fetch 4\r
4684;@LD C,(HL)\r
4685opcode_4_E:\r
4686 readmem8HL\r
4687 and z80bc,z80bc,#0xFF<<24\r
4688 orr z80bc,z80bc,r0, lsl #16\r
4689 fetch 7\r
4690;@LD C,A\r
4691opcode_4_F:\r
4692 and z80bc,z80bc,#0xFF<<24\r
4693 orr z80bc,z80bc,z80a, lsr #8\r
4694 fetch 4\r
4695;@LD D,B\r
4696opcode_5_0:\r
4697 and z80de,z80de,#0xFF<<16\r
4698 and r1,z80bc,#0xFF<<24\r
4699 orr z80de,z80de,r1\r
4700 fetch 4\r
4701;@LD D,C\r
4702opcode_5_1:\r
4703 and z80de,z80de,#0xFF<<16\r
4704 orr z80de,z80de,z80bc, lsl #8\r
4705 fetch 4\r
4706;@LD D,E\r
4707opcode_5_3:\r
4708 and z80de,z80de,#0xFF<<16\r
4709 orr z80de,z80de,z80de, lsl #8\r
4710 fetch 4\r
4711;@LD D,H\r
4712opcode_5_4:\r
4713 and z80de,z80de,#0xFF<<16\r
4714 and r1,z80hl,#0xFF<<24\r
4715 orr z80de,z80de,r1\r
4716 fetch 4\r
4717;@LD D,L\r
4718opcode_5_5:\r
4719 and z80de,z80de,#0xFF<<16\r
4720 orr z80de,z80de,z80hl, lsl #8\r
4721 fetch 4\r
4722;@LD D,(HL)\r
4723opcode_5_6:\r
4724 readmem8HL\r
4725 and z80de,z80de,#0xFF<<16\r
4726 orr z80de,z80de,r0, lsl #24\r
4727 fetch 7\r
4728;@LD D,A\r
4729opcode_5_7:\r
4730 and z80de,z80de,#0xFF<<16\r
4731 orr z80de,z80de,z80a\r
4732 fetch 4\r
4733;@LD E,B\r
4734opcode_5_8:\r
4735 and z80de,z80de,#0xFF<<24\r
4736 and r1,z80bc,#0xFF<<24\r
4737 orr z80de,z80de,r1, lsr #8\r
4738 fetch 4\r
4739;@LD E,C\r
4740opcode_5_9:\r
4741 and z80de,z80de,#0xFF<<24\r
4742 and r1,z80bc,#0xFF<<16\r
4743 orr z80de,z80de,r1 \r
4744 fetch 4\r
4745;@LD E,D\r
4746opcode_5_A:\r
4747 and z80de,z80de,#0xFF<<24\r
4748 orr z80de,z80de,z80de, lsr #8\r
4749 fetch 4\r
4750;@LD E,H\r
4751opcode_5_C:\r
4752 and z80de,z80de,#0xFF<<24\r
4753 and r1,z80hl,#0xFF<<24\r
4754 orr z80de,z80de,r1, lsr #8\r
4755 fetch 4\r
4756;@LD E,L\r
4757opcode_5_D:\r
4758 and z80de,z80de,#0xFF<<24\r
4759 and r1,z80hl,#0xFF<<16\r
4760 orr z80de,z80de,r1 \r
4761 fetch 4\r
4762;@LD E,(HL)\r
4763opcode_5_E:\r
4764 readmem8HL\r
4765 and z80de,z80de,#0xFF<<24\r
4766 orr z80de,z80de,r0, lsl #16\r
4767 fetch 7\r
4768;@LD E,A\r
4769opcode_5_F:\r
4770 and z80de,z80de,#0xFF<<24\r
4771 orr z80de,z80de,z80a, lsr #8\r
4772 fetch 4\r
4773\r
4774;@LD H,B\r
4775opcode_6_0:\r
4776 and z80hl,z80hl,#0xFF<<16\r
4777 and r1,z80bc,#0xFF<<24\r
4778 orr z80hl,z80hl,r1\r
4779 fetch 4\r
4780;@LD H,C\r
4781opcode_6_1:\r
4782 and z80hl,z80hl,#0xFF<<16\r
4783 orr z80hl,z80hl,z80bc, lsl #8\r
4784 fetch 4\r
4785;@LD H,D\r
4786opcode_6_2:\r
4787 and z80hl,z80hl,#0xFF<<16\r
4788 and r1,z80de,#0xFF<<24\r
4789 orr z80hl,z80hl,r1\r
4790 fetch 4\r
4791;@LD H,E\r
4792opcode_6_3:\r
4793 and z80hl,z80hl,#0xFF<<16\r
4794 orr z80hl,z80hl,z80de, lsl #8\r
4795 fetch 4\r
4796;@LD H,L\r
4797opcode_6_5:\r
4798 and z80hl,z80hl,#0xFF<<16\r
4799 orr z80hl,z80hl,z80hl, lsl #8\r
4800 fetch 4\r
4801;@LD H,(HL)\r
4802opcode_6_6:\r
4803 readmem8HL\r
4804 and z80hl,z80hl,#0xFF<<16\r
4805 orr z80hl,z80hl,r0, lsl #24\r
4806 fetch 7\r
4807;@LD H,A\r
4808opcode_6_7:\r
4809 and z80hl,z80hl,#0xFF<<16\r
4810 orr z80hl,z80hl,z80a\r
4811 fetch 4\r
4812\r
4813;@LD L,B\r
4814opcode_6_8:\r
4815 and z80hl,z80hl,#0xFF<<24\r
4816 and r1,z80bc,#0xFF<<24\r
4817 orr z80hl,z80hl,r1, lsr #8\r
4818 fetch 4\r
4819;@LD L,C\r
4820opcode_6_9:\r
4821 and z80hl,z80hl,#0xFF<<24\r
4822 and r1,z80bc,#0xFF<<16\r
4823 orr z80hl,z80hl,r1\r
4824 fetch 4\r
4825;@LD L,D\r
4826opcode_6_A:\r
4827 and z80hl,z80hl,#0xFF<<24\r
4828 and r1,z80de,#0xFF<<24\r
4829 orr z80hl,z80hl,r1, lsr #8\r
4830 fetch 4\r
4831;@LD L,E\r
4832opcode_6_B:\r
4833 and z80hl,z80hl,#0xFF<<24\r
4834 and r1,z80de,#0xFF<<16\r
4835 orr z80hl,z80hl,r1\r
4836 fetch 4\r
4837;@LD L,H\r
4838opcode_6_C:\r
4839 and z80hl,z80hl,#0xFF<<24\r
4840 orr z80hl,z80hl,z80hl, lsr #8\r
4841 fetch 4\r
4842;@LD L,(HL)\r
4843opcode_6_E:\r
4844 readmem8HL\r
4845 and z80hl,z80hl,#0xFF<<24\r
4846 orr z80hl,z80hl,r0, lsl #16\r
4847 fetch 7\r
4848;@LD L,A\r
4849opcode_6_F:\r
4850 and z80hl,z80hl,#0xFF<<24\r
4851 orr z80hl,z80hl,z80a, lsr #8\r
4852 fetch 4\r
4853\r
4854;@LD (HL),B\r
4855opcode_7_0:\r
4856 mov r0,z80bc, lsr #24\r
4857 writemem8HL\r
4858 fetch 7\r
4859;@LD (HL),C\r
4860opcode_7_1:\r
4861 mov r0,z80bc, lsr #16\r
4862 and r0,r0,#0xFF\r
4863 writemem8HL\r
4864 fetch 7\r
4865;@LD (HL),D\r
4866opcode_7_2:\r
4867 mov r0,z80de, lsr #24\r
4868 writemem8HL\r
4869 fetch 7\r
4870;@LD (HL),E\r
4871opcode_7_3:\r
4872 mov r0,z80de, lsr #16\r
4873 and r0,r0,#0xFF\r
4874 writemem8HL\r
4875 fetch 7\r
4876;@LD (HL),H\r
4877opcode_7_4:\r
4878 mov r0,z80hl, lsr #24\r
4879 writemem8HL\r
4880 fetch 7\r
4881;@LD (HL),L\r
4882opcode_7_5:\r
4883 mov r1,z80hl, lsr #16\r
4884 and r0,r1,#0xFF\r
4885 writemem8\r
4886 fetch 7\r
4887;@HALT\r
4888opcode_7_6:\r
4889 sub z80pc,z80pc,#1\r
4890 ldrb r0,[cpucontext,#z80if]\r
4891 orr r0,r0,#Z80_HALT\r
4892 strb r0,[cpucontext,#z80if]\r
4893 b z80_execute_end\r
4894;@LD (HL),A\r
4895opcode_7_7:\r
4896 mov r0,z80a, lsr #24\r
4897 writemem8HL\r
4898 fetch 7\r
4899\r
4900;@LD A,B\r
4901opcode_7_8:\r
4902 and z80a,z80bc,#0xFF<<24\r
4903 fetch 4\r
4904;@LD A,C\r
4905opcode_7_9:\r
4906 mov z80a,z80bc, lsl #8\r
4907 fetch 4\r
4908;@LD A,D\r
4909opcode_7_A:\r
4910 and z80a,z80de,#0xFF<<24\r
4911 fetch 4\r
4912;@LD A,E\r
4913opcode_7_B:\r
4914 mov z80a,z80de, lsl #8\r
4915 fetch 4\r
4916;@LD A,H\r
4917opcode_7_C:\r
4918 and z80a,z80hl,#0xFF<<24\r
4919 fetch 4\r
4920;@LD A,L\r
4921opcode_7_D:\r
4922 mov z80a,z80hl, lsl #8\r
4923 fetch 4\r
4924;@LD A,(HL)\r
4925opcode_7_E:\r
4926 readmem8HL\r
4927 mov z80a,r0, lsl #24\r
4928 fetch 7\r
4929\r
4930;@ADD A,B\r
4931opcode_8_0:\r
4932 opADDH z80bc\r
4933;@ADD A,C\r
4934opcode_8_1:\r
4935 opADDL z80bc\r
4936;@ADD A,D\r
4937opcode_8_2:\r
4938 opADDH z80de\r
4939;@ADD A,E\r
4940opcode_8_3:\r
4941 opADDL z80de\r
4942;@ADD A,H\r
4943opcode_8_4:\r
4944 opADDH z80hl\r
4945;@ADD A,L\r
4946opcode_8_5:\r
4947 opADDL z80hl\r
4948;@ADD A,(HL)\r
4949opcode_8_6:\r
4950 readmem8HL\r
4951 opADDb\r
4952 fetch 7\r
4953;@ADD A,A\r
4954opcode_8_7:\r
4955 opADDA\r
4956\r
4957;@ADC A,B\r
4958opcode_8_8:\r
4959 opADCH z80bc\r
4960;@ADC A,C\r
4961opcode_8_9:\r
4962 opADCL z80bc\r
4963;@ADC A,D\r
4964opcode_8_A:\r
4965 opADCH z80de\r
4966;@ADC A,E\r
4967opcode_8_B:\r
4968 opADCL z80de\r
4969;@ADC A,H\r
4970opcode_8_C:\r
4971 opADCH z80hl\r
4972;@ADC A,L\r
4973opcode_8_D:\r
4974 opADCL z80hl\r
4975;@ADC A,(HL)\r
4976opcode_8_E:\r
4977 readmem8HL\r
4978 opADCb\r
4979 fetch 7\r
4980;@ADC A,A\r
4981opcode_8_F:\r
4982 opADCA\r
4983\r
4984;@SUB B\r
4985opcode_9_0:\r
4986 opSUBH z80bc\r
4987;@SUB C\r
4988opcode_9_1:\r
4989 opSUBL z80bc\r
4990;@SUB D\r
4991opcode_9_2:\r
4992 opSUBH z80de\r
4993;@SUB E\r
4994opcode_9_3:\r
4995 opSUBL z80de\r
4996;@SUB H\r
4997opcode_9_4:\r
4998 opSUBH z80hl\r
4999;@SUB L\r
5000opcode_9_5:\r
5001 opSUBL z80hl\r
5002;@SUB (HL)\r
5003opcode_9_6:\r
5004 readmem8HL\r
5005 opSUBb\r
5006 fetch 7\r
5007;@SUB A\r
5008opcode_9_7:\r
5009 opSUBA\r
5010\r
5011;@SBC B \r
5012opcode_9_8:\r
5013 opSBCH z80bc\r
5014;@SBC C\r
5015opcode_9_9:\r
5016 opSBCL z80bc\r
5017;@SBC D\r
5018opcode_9_A:\r
5019 opSBCH z80de\r
5020;@SBC E\r
5021opcode_9_B:\r
5022 opSBCL z80de\r
5023;@SBC H\r
5024opcode_9_C:\r
5025 opSBCH z80hl\r
5026;@SBC L\r
5027opcode_9_D:\r
5028 opSBCL z80hl\r
5029;@SBC (HL)\r
5030opcode_9_E:\r
5031 readmem8HL\r
5032 opSBCb\r
5033 fetch 7\r
5034;@SBC A\r
5035opcode_9_F:\r
5036 opSBCA\r
5037\r
5038;@AND B\r
5039opcode_A_0:\r
5040 opANDH z80bc\r
5041;@AND C\r
5042opcode_A_1:\r
5043 opANDL z80bc\r
5044;@AND D\r
5045opcode_A_2:\r
5046 opANDH z80de\r
5047;@AND E\r
5048opcode_A_3:\r
5049 opANDL z80de\r
5050;@AND H\r
5051opcode_A_4:\r
5052 opANDH z80hl\r
5053;@AND L\r
5054opcode_A_5:\r
5055 opANDL z80hl\r
5056;@AND (HL)\r
5057opcode_A_6:\r
5058 readmem8HL\r
5059 opANDb\r
5060 fetch 7\r
5061;@AND A\r
5062opcode_A_7:\r
5063 opANDA\r
5064\r
5065;@XOR B\r
5066opcode_A_8:\r
5067 opXORH z80bc\r
5068;@XOR C\r
5069opcode_A_9:\r
5070 opXORL z80bc\r
5071;@XOR D\r
5072opcode_A_A:\r
5073 opXORH z80de\r
5074;@XOR E\r
5075opcode_A_B:\r
5076 opXORL z80de\r
5077;@XOR H\r
5078opcode_A_C:\r
5079 opXORH z80hl\r
5080;@XOR L\r
5081opcode_A_D:\r
5082 opXORL z80hl\r
5083;@XOR (HL)\r
5084opcode_A_E:\r
5085 readmem8HL\r
5086 opXORb\r
5087 fetch 7\r
5088;@XOR A\r
5089opcode_A_F:\r
5090 opXORA\r
5091\r
5092;@OR B\r
5093opcode_B_0:\r
5094 opORH z80bc\r
5095;@OR C\r
5096opcode_B_1:\r
5097 opORL z80bc\r
5098;@OR D\r
5099opcode_B_2:\r
5100 opORH z80de\r
5101;@OR E\r
5102opcode_B_3:\r
5103 opORL z80de\r
5104;@OR H\r
5105opcode_B_4:\r
5106 opORH z80hl\r
5107;@OR L\r
5108opcode_B_5:\r
5109 opORL z80hl\r
5110;@OR (HL)\r
5111opcode_B_6:\r
5112 readmem8HL\r
5113 opORb\r
5114 fetch 7\r
5115;@OR A\r
5116opcode_B_7:\r
5117 opORA\r
5118\r
5119;@CP B\r
5120opcode_B_8:\r
5121 opCPH z80bc\r
5122;@CP C\r
5123opcode_B_9:\r
5124 opCPL z80bc\r
5125;@CP D\r
5126opcode_B_A:\r
5127 opCPH z80de\r
5128;@CP E\r
5129opcode_B_B:\r
5130 opCPL z80de\r
5131;@CP H\r
5132opcode_B_C:\r
5133 opCPH z80hl\r
5134;@CP L\r
5135opcode_B_D:\r
5136 opCPL z80hl\r
5137;@CP (HL)\r
5138opcode_B_E:\r
5139 readmem8HL\r
5140 opCPb\r
5141 fetch 7\r
5142;@CP A\r
5143opcode_B_F:\r
5144 opCPA\r
5145\r
5146;@RET NZ\r
5147opcode_C_0:\r
5148 tst z80f,#1<<ZFlag\r
5149 beq opcode_C_9 ;@unconditional RET\r
5150 fetch 5\r
5151\r
5152;@POP BC\r
5153opcode_C_1:\r
5154 opPOPreg z80bc\r
5155\r
5156;@JP NZ,$+3\r
5157opcode_C_2:\r
5158 tst z80f,#1<<ZFlag\r
5159 beq opcode_C_3 ;@unconditional JP\r
5160 add z80pc,z80pc,#2\r
5161 fetch 10\r
5162;@JP $+3\r
5163opcode_C_3:\r
5164 ldrb r0,[z80pc],#1\r
5165 ldrb r1,[z80pc],#1\r
5166 orr r0,r0,r1, lsl #8\r
5167 rebasepc\r
5168 fetch 10\r
5169;@CALL NZ,NN\r
5170opcode_C_4:\r
5171 tst z80f,#1<<ZFlag\r
5172 beq opcode_C_D ;@unconditional CALL\r
5173 add z80pc,z80pc,#2\r
5174 fetch 10\r
5175\r
5176;@PUSH BC\r
5177opcode_C_5:\r
5178 opPUSHreg z80bc\r
5179 fetch 11\r
5180;@ADD A,N\r
5181opcode_C_6:\r
5182 ldrb r0,[z80pc],#1\r
5183 opADDb\r
5184 fetch 7\r
5185;@RST 0\r
5186opcode_C_7:\r
5187 opRST 0x00\r
5188\r
5189;@RET Z\r
5190opcode_C_8:\r
5191 tst z80f,#1<<ZFlag\r
5192 bne opcode_C_9 ;@unconditional RET\r
5193 fetch 5\r
5194;@RET\r
5195opcode_C_9:\r
5196 opPOP\r
5197 rebasepc\r
5198 fetch 10\r
5199;@JP Z,$+3\r
5200opcode_C_A:\r
5201 tst z80f,#1<<ZFlag\r
5202 bne opcode_C_3 ;@unconditional JP\r
5203 add z80pc,z80pc,#2\r
5204 fetch 10\r
5205\r
5206;@This reads this opcodes_CB lookup table to find the location of\r
5207;@the CB sub for the intruction and then branches to that location\r
5208opcode_C_B:\r
5209 ldrb r0,[z80pc],#1\r
5210 ldr pc,[pc,r0, lsl #2]\r
5211opcodes_CB: .word 0x00000000\r
5212 .word opcode_CB_00,opcode_CB_01,opcode_CB_02,opcode_CB_03,opcode_CB_04,opcode_CB_05,opcode_CB_06,opcode_CB_07\r
5213 .word opcode_CB_08,opcode_CB_09,opcode_CB_0A,opcode_CB_0B,opcode_CB_0C,opcode_CB_0D,opcode_CB_0E,opcode_CB_0F\r
5214 .word opcode_CB_10,opcode_CB_11,opcode_CB_12,opcode_CB_13,opcode_CB_14,opcode_CB_15,opcode_CB_16,opcode_CB_17\r
5215 .word opcode_CB_18,opcode_CB_19,opcode_CB_1A,opcode_CB_1B,opcode_CB_1C,opcode_CB_1D,opcode_CB_1E,opcode_CB_1F\r
5216 .word opcode_CB_20,opcode_CB_21,opcode_CB_22,opcode_CB_23,opcode_CB_24,opcode_CB_25,opcode_CB_26,opcode_CB_27\r
5217 .word opcode_CB_28,opcode_CB_29,opcode_CB_2A,opcode_CB_2B,opcode_CB_2C,opcode_CB_2D,opcode_CB_2E,opcode_CB_2F\r
5218 .word opcode_CB_30,opcode_CB_31,opcode_CB_32,opcode_CB_33,opcode_CB_34,opcode_CB_35,opcode_CB_36,opcode_CB_37\r
5219 .word opcode_CB_38,opcode_CB_39,opcode_CB_3A,opcode_CB_3B,opcode_CB_3C,opcode_CB_3D,opcode_CB_3E,opcode_CB_3F\r
5220 .word opcode_CB_40,opcode_CB_41,opcode_CB_42,opcode_CB_43,opcode_CB_44,opcode_CB_45,opcode_CB_46,opcode_CB_47\r
5221 .word opcode_CB_48,opcode_CB_49,opcode_CB_4A,opcode_CB_4B,opcode_CB_4C,opcode_CB_4D,opcode_CB_4E,opcode_CB_4F\r
5222 .word opcode_CB_50,opcode_CB_51,opcode_CB_52,opcode_CB_53,opcode_CB_54,opcode_CB_55,opcode_CB_56,opcode_CB_57\r
5223 .word opcode_CB_58,opcode_CB_59,opcode_CB_5A,opcode_CB_5B,opcode_CB_5C,opcode_CB_5D,opcode_CB_5E,opcode_CB_5F\r
5224 .word opcode_CB_60,opcode_CB_61,opcode_CB_62,opcode_CB_63,opcode_CB_64,opcode_CB_65,opcode_CB_66,opcode_CB_67\r
5225 .word opcode_CB_68,opcode_CB_69,opcode_CB_6A,opcode_CB_6B,opcode_CB_6C,opcode_CB_6D,opcode_CB_6E,opcode_CB_6F\r
5226 .word opcode_CB_70,opcode_CB_71,opcode_CB_72,opcode_CB_73,opcode_CB_74,opcode_CB_75,opcode_CB_76,opcode_CB_77\r
5227 .word opcode_CB_78,opcode_CB_79,opcode_CB_7A,opcode_CB_7B,opcode_CB_7C,opcode_CB_7D,opcode_CB_7E,opcode_CB_7F\r
5228 .word opcode_CB_80,opcode_CB_81,opcode_CB_82,opcode_CB_83,opcode_CB_84,opcode_CB_85,opcode_CB_86,opcode_CB_87\r
5229 .word opcode_CB_88,opcode_CB_89,opcode_CB_8A,opcode_CB_8B,opcode_CB_8C,opcode_CB_8D,opcode_CB_8E,opcode_CB_8F\r
5230 .word opcode_CB_90,opcode_CB_91,opcode_CB_92,opcode_CB_93,opcode_CB_94,opcode_CB_95,opcode_CB_96,opcode_CB_97\r
5231 .word opcode_CB_98,opcode_CB_99,opcode_CB_9A,opcode_CB_9B,opcode_CB_9C,opcode_CB_9D,opcode_CB_9E,opcode_CB_9F\r
5232 .word opcode_CB_A0,opcode_CB_A1,opcode_CB_A2,opcode_CB_A3,opcode_CB_A4,opcode_CB_A5,opcode_CB_A6,opcode_CB_A7\r
5233 .word opcode_CB_A8,opcode_CB_A9,opcode_CB_AA,opcode_CB_AB,opcode_CB_AC,opcode_CB_AD,opcode_CB_AE,opcode_CB_AF\r
5234 .word opcode_CB_B0,opcode_CB_B1,opcode_CB_B2,opcode_CB_B3,opcode_CB_B4,opcode_CB_B5,opcode_CB_B6,opcode_CB_B7\r
5235 .word opcode_CB_B8,opcode_CB_B9,opcode_CB_BA,opcode_CB_BB,opcode_CB_BC,opcode_CB_BD,opcode_CB_BE,opcode_CB_BF\r
5236 .word opcode_CB_C0,opcode_CB_C1,opcode_CB_C2,opcode_CB_C3,opcode_CB_C4,opcode_CB_C5,opcode_CB_C6,opcode_CB_C7\r
5237 .word opcode_CB_C8,opcode_CB_C9,opcode_CB_CA,opcode_CB_CB,opcode_CB_CC,opcode_CB_CD,opcode_CB_CE,opcode_CB_CF\r
5238 .word opcode_CB_D0,opcode_CB_D1,opcode_CB_D2,opcode_CB_D3,opcode_CB_D4,opcode_CB_D5,opcode_CB_D6,opcode_CB_D7\r
5239 .word opcode_CB_D8,opcode_CB_D9,opcode_CB_DA,opcode_CB_DB,opcode_CB_DC,opcode_CB_DD,opcode_CB_DE,opcode_CB_DF\r
5240 .word opcode_CB_E0,opcode_CB_E1,opcode_CB_E2,opcode_CB_E3,opcode_CB_E4,opcode_CB_E5,opcode_CB_E6,opcode_CB_E7\r
5241 .word opcode_CB_E8,opcode_CB_E9,opcode_CB_EA,opcode_CB_EB,opcode_CB_EC,opcode_CB_ED,opcode_CB_EE,opcode_CB_EF\r
5242 .word opcode_CB_F0,opcode_CB_F1,opcode_CB_F2,opcode_CB_F3,opcode_CB_F4,opcode_CB_F5,opcode_CB_F6,opcode_CB_F7\r
5243 .word opcode_CB_F8,opcode_CB_F9,opcode_CB_FA,opcode_CB_FB,opcode_CB_FC,opcode_CB_FD,opcode_CB_FE,opcode_CB_FF\r
5244\r
5245;@CALL Z,NN\r
5246opcode_C_C:\r
5247 tst z80f,#1<<ZFlag\r
5248 bne opcode_C_D ;@unconditional CALL\r
5249 add z80pc,z80pc,#2\r
5250 fetch 10\r
5251;@CALL NN\r
5252opcode_C_D:\r
5253 ldrb r0,[z80pc],#1\r
5254 ldrb r1,[z80pc],#1\r
5255 ldr r2,[cpucontext,#z80pc_base]\r
5256 sub r2,z80pc,r2\r
5257 orr z80pc,r0,r1, lsl #8\r
5258 opPUSHareg r2\r
5259 mov r0,z80pc\r
5260 rebasepc\r
5261 fetch 17\r
5262;@ADC A,N\r
5263opcode_C_E:\r
5264 ldrb r0,[z80pc],#1\r
5265 opADCb\r
5266 fetch 7\r
5267;@RST 8H\r
5268opcode_C_F:\r
5269 opRST 0x08\r
5270\r
5271;@RET NC\r
5272opcode_D_0:\r
5273 tst z80f,#1<<CFlag\r
5274 beq opcode_C_9 ;@unconditional RET\r
5275 fetch 5\r
5276;@POP DE\r
5277opcode_D_1:\r
5278 opPOPreg z80de\r
5279\r
5280;@JP NC, $+3\r
5281opcode_D_2 :\r
5282 tst z80f,#1<<CFlag\r
5283 beq opcode_C_3 ;@unconditional JP\r
5284 add z80pc,z80pc,#2\r
5285 fetch 10\r
5286;@OUT (N),A\r
5287opcode_D_3:\r
5288 ldrb r0,[z80pc],#1\r
5289 orr r0,r0,z80a,lsr#16\r
5290 mov r1,z80a, lsr #24\r
5291 opOUT\r
5292 fetch 11\r
5293;@CALL NC,NN\r
5294opcode_D_4:\r
5295 tst z80f,#1<<CFlag\r
5296 beq opcode_C_D ;@unconditional CALL\r
5297 add z80pc,z80pc,#2\r
5298 fetch 10\r
5299;@PUSH DE\r
5300opcode_D_5:\r
5301 opPUSHreg z80de\r
5302 fetch 11\r
5303;@SUB N\r
5304opcode_D_6:\r
5305 ldrb r0,[z80pc],#1\r
5306 opSUBb\r
5307 fetch 7\r
5308\r
5309;@RST 10H\r
5310opcode_D_7:\r
5311 opRST 0x10\r
5312\r
5313;@RET C\r
5314opcode_D_8:\r
5315 tst z80f,#1<<CFlag\r
5316 bne opcode_C_9 ;@unconditional RET\r
5317 fetch 5\r
5318;@EXX\r
5319opcode_D_9:\r
5320 add r1,cpucontext,#z80bc2\r
5321 swp z80bc,z80bc,[r1]\r
5322 add r1,cpucontext,#z80de2\r
5323 swp z80de,z80de,[r1]\r
5324 add r1,cpucontext,#z80hl2\r
5325 swp z80hl,z80hl,[r1]\r
5326 fetch 4\r
5327;@JP C,$+3\r
5328opcode_D_A:\r
5329 tst z80f,#1<<CFlag\r
5330 bne opcode_C_3 ;@unconditional JP\r
5331 add z80pc,z80pc,#2\r
5332 fetch 10\r
5333;@IN A,(N)\r
5334opcode_D_B:\r
5335 ldrb r0,[z80pc],#1\r
5336 orr r0,r0,z80a,lsr#16\r
5337 opIN\r
5338 mov z80a,r0, lsl #24 ;@ r0 = data read\r
5339 fetch 11\r
5340;@CALL C,NN\r
5341opcode_D_C:\r
5342 tst z80f,#1<<CFlag\r
5343 bne opcode_C_D ;@unconditional CALL\r
5344 add z80pc,z80pc,#2\r
5345 fetch 10\r
5346\r
5347;@opcodes_DD\r
5348opcode_D_D:\r
5349 add z80xx,cpucontext,#z80ix\r
5350 b opcode_D_D_F_D\r
5351opcode_F_D:\r
5352 add z80xx,cpucontext,#z80iy\r
5353opcode_D_D_F_D:\r
5354 ldrb r0,[z80pc],#1\r
5355 ldr pc,[pc,r0, lsl #2]\r
5356opcodes_DD: .word 0x00000000\r
5357 .word opcode_0_0, opcode_0_1, opcode_0_2, opcode_0_3, opcode_0_4, opcode_0_5, opcode_0_6, opcode_0_7\r
5358 .word opcode_0_8, opcode_DD_09,opcode_0_A, opcode_0_B, opcode_0_C, opcode_0_D, opcode_0_E, opcode_0_F\r
5359 .word opcode_1_0, opcode_1_1, opcode_1_2, opcode_1_3, opcode_1_4, opcode_1_5, opcode_1_6, opcode_1_7\r
5360 .word opcode_1_8, opcode_DD_19,opcode_1_A, opcode_1_B, opcode_1_C, opcode_1_D, opcode_1_E, opcode_1_F\r
5361 .word opcode_2_0, opcode_DD_21,opcode_DD_22,opcode_DD_23,opcode_DD_24,opcode_DD_25,opcode_DD_26,opcode_2_7\r
5362 .word opcode_2_8, opcode_DD_29,opcode_DD_2A,opcode_DD_2B,opcode_DD_2C,opcode_DD_2D,opcode_DD_2E,opcode_2_F\r
5363 .word opcode_3_0, opcode_3_1, opcode_3_2, opcode_3_3, opcode_DD_34,opcode_DD_35,opcode_DD_36,opcode_3_7\r
5364 .word opcode_3_8, opcode_DD_39,opcode_3_A, opcode_3_B, opcode_3_C, opcode_3_D, opcode_3_E, opcode_3_F\r
5365 .word opcode_4_0, opcode_4_1, opcode_4_2, opcode_4_3, opcode_DD_44,opcode_DD_45,opcode_DD_46,opcode_4_7\r
5366 .word opcode_4_8, opcode_4_9, opcode_4_A, opcode_4_B, opcode_DD_4C,opcode_DD_4D,opcode_DD_4E,opcode_4_F\r
5367 .word opcode_5_0, opcode_5_1, opcode_5_2, opcode_5_3, opcode_DD_54,opcode_DD_55,opcode_DD_56,opcode_5_7\r
5368 .word opcode_5_8, opcode_5_9, opcode_5_A, opcode_5_B, opcode_DD_5C,opcode_DD_5D,opcode_DD_5E,opcode_5_F\r
5369 .word opcode_DD_60,opcode_DD_61,opcode_DD_62,opcode_DD_63,opcode_DD_64,opcode_DD_65,opcode_DD_66,opcode_DD_67\r
5370 .word opcode_DD_68,opcode_DD_69,opcode_DD_6A,opcode_DD_6B,opcode_DD_6C,opcode_DD_6D,opcode_DD_6E,opcode_DD_6F\r
5371 .word opcode_DD_70,opcode_DD_71,opcode_DD_72,opcode_DD_73,opcode_DD_74,opcode_DD_75,opcode_7_6, opcode_DD_77\r
5372 .word opcode_7_8, opcode_7_9, opcode_7_A, opcode_7_B, opcode_DD_7C,opcode_DD_7D,opcode_DD_7E,opcode_7_F\r
5373 .word opcode_8_0, opcode_8_1, opcode_8_2, opcode_8_3, opcode_DD_84,opcode_DD_85,opcode_DD_86,opcode_8_7\r
5374 .word opcode_8_8, opcode_8_9, opcode_8_A, opcode_8_B, opcode_DD_8C,opcode_DD_8D,opcode_DD_8E,opcode_8_F\r
5375 .word opcode_9_0, opcode_9_1, opcode_9_2, opcode_9_3, opcode_DD_94,opcode_DD_95,opcode_DD_96,opcode_9_7\r
5376 .word opcode_9_8, opcode_9_9, opcode_9_A, opcode_9_B, opcode_DD_9C,opcode_DD_9D,opcode_DD_9E,opcode_9_F\r
5377 .word opcode_A_0, opcode_A_1, opcode_A_2, opcode_A_3, opcode_DD_A4,opcode_DD_A5,opcode_DD_A6,opcode_A_7\r
5378 .word opcode_A_8, opcode_A_9, opcode_A_A, opcode_A_B, opcode_DD_AC,opcode_DD_AD,opcode_DD_AE,opcode_A_F\r
5379 .word opcode_B_0, opcode_B_1, opcode_B_2, opcode_B_3, opcode_DD_B4,opcode_DD_B5,opcode_DD_B6,opcode_B_7\r
5380 .word opcode_B_8, opcode_B_9, opcode_B_A, opcode_B_B, opcode_DD_BC,opcode_DD_BD,opcode_DD_BE,opcode_B_F\r
5381 .word opcode_C_0, opcode_C_1, opcode_C_2, opcode_C_3, opcode_C_4, opcode_C_5, opcode_C_6, opcode_C_7\r
5382 .word opcode_C_8, opcode_C_9, opcode_C_A, opcode_DD_CB,opcode_C_C, opcode_C_D, opcode_C_E, opcode_C_F\r
5383 .word opcode_D_0, opcode_D_1, opcode_D_2, opcode_D_3, opcode_D_4, opcode_D_5, opcode_D_6, opcode_D_7\r
5384 .word opcode_D_8, opcode_D_9, opcode_D_A, opcode_D_B, opcode_D_C, opcode_D_D, opcode_D_E, opcode_D_F\r
5385 .word opcode_E_0, opcode_DD_E1,opcode_E_2, opcode_DD_E3,opcode_E_4, opcode_DD_E5,opcode_E_6, opcode_E_7\r
5386 .word opcode_E_8, opcode_DD_E9,opcode_E_A, opcode_E_B, opcode_E_C, opcode_E_D, opcode_E_E, opcode_E_F\r
5387 .word opcode_F_0, opcode_F_1, opcode_F_2, opcode_F_3, opcode_F_4, opcode_F_5, opcode_F_6, opcode_F_7\r
5388 .word opcode_F_8, opcode_DD_F9,opcode_F_A, opcode_F_B, opcode_F_C, opcode_F_D, opcode_F_E, opcode_F_F\r
5389\r
5390;@SBC A,N\r
5391opcode_D_E:\r
5392 ldrb r0,[z80pc],#1\r
5393 opSBCb\r
5394 fetch 7\r
5395;@RST 18H\r
5396opcode_D_F:\r
5397 opRST 0x18\r
5398\r
5399;@RET PO\r
5400opcode_E_0:\r
5401 tst z80f,#1<<VFlag\r
5402 beq opcode_C_9 ;@unconditional RET\r
5403 fetch 5\r
5404;@POP HL\r
5405opcode_E_1:\r
5406 opPOPreg z80hl\r
5407\r
5408;@JP PO,$+3\r
5409opcode_E_2:\r
5410 tst z80f,#1<<VFlag\r
5411 beq opcode_C_3 ;@unconditional JP\r
5412 add z80pc,z80pc,#2\r
5413 fetch 10\r
5414;@EX (SP),HL\r
5415opcode_E_3:\r
5416.if FAST_Z80SP\r
5417 ldrb r0,[z80sp]\r
5418 ldrb r1,[z80sp,#1]\r
5419 orr r0,r0,r1, lsl #8\r
5420 mov r1,z80hl, lsr #24\r
5421 strb r1,[z80sp,#1]\r
5422 mov r1,z80hl, lsr #16\r
5423 strb r1,[z80sp]\r
5424 mov z80hl,r0, lsl #16\r
5425.else\r
5426 mov r0,z80sp\r
5427 readmem16\r
5428 mov r1,r0\r
5429 mov r0,z80hl,lsr#16\r
5430 mov z80hl,r1,lsl#16\r
5431 mov r1,z80sp\r
5432 writemem16\r
5433.endif\r
5434 fetch 19\r
5435;@CALL PO,NN\r
5436opcode_E_4:\r
5437 tst z80f,#1<<VFlag\r
5438 beq opcode_C_D ;@unconditional CALL\r
5439 add z80pc,z80pc,#2\r
5440 fetch 10\r
5441;@PUSH HL\r
5442opcode_E_5:\r
5443 opPUSHreg z80hl\r
5444 fetch 11\r
5445;@AND N\r
5446opcode_E_6:\r
5447 ldrb r0,[z80pc],#1\r
5448 opANDb\r
5449 fetch 7\r
5450;@RST 20H\r
5451opcode_E_7:\r
5452 opRST 0x20\r
5453\r
5454;@RET PE\r
5455opcode_E_8:\r
5456 tst z80f,#1<<VFlag\r
5457 bne opcode_C_9 ;@unconditional RET\r
5458 fetch 5\r
5459;@JP (HL)\r
5460opcode_E_9:\r
5461 mov r0,z80hl, lsr #16\r
5462 rebasepc\r
5463 fetch 4\r
5464;@JP PE,$+3\r
5465opcode_E_A:\r
5466 tst z80f,#1<<VFlag\r
5467 bne opcode_C_3 ;@unconditional JP\r
5468 add z80pc,z80pc,#2\r
5469 fetch 10\r
5470;@EX DE,HL\r
5471opcode_E_B:\r
5472 mov r1,z80de\r
5473 mov z80de,z80hl\r
5474 mov z80hl,r1\r
5475 fetch 4\r
5476;@CALL PE,NN\r
5477opcode_E_C:\r
5478 tst z80f,#1<<VFlag\r
5479 bne opcode_C_D ;@unconditional CALL\r
5480 add z80pc,z80pc,#2\r
5481 fetch 10\r
5482\r
5483;@This should be caught at start\r
5484opcode_E_D:\r
5485 ldrb r1,[z80pc],#1\r
5486 ldr pc,[pc,r1, lsl #2]\r
5487opcodes_ED: .word 0x00000000\r
5488 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5489 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5490 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5491 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5492 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5493 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5494 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5495 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5496 .word opcode_ED_40,opcode_ED_41,opcode_ED_42,opcode_ED_43,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_47\r
5497 .word opcode_ED_48,opcode_ED_49,opcode_ED_4A,opcode_ED_4B,opcode_ED_44,opcode_ED_4D,opcode_ED_46,opcode_ED_4F\r
5498 .word opcode_ED_50,opcode_ED_51,opcode_ED_52,opcode_ED_53,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_57\r
5499 .word opcode_ED_58,opcode_ED_59,opcode_ED_5A,opcode_ED_5B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_5F\r
5500 .word opcode_ED_60,opcode_ED_61,opcode_ED_62,opcode_ED_63,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_67\r
5501 .word opcode_ED_68,opcode_ED_69,opcode_ED_6A,opcode_ED_6B,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_6F\r
5502 .word opcode_ED_70,opcode_ED_71,opcode_ED_72,opcode_ED_73,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_NF\r
5503 .word opcode_ED_78,opcode_ED_79,opcode_ED_7A,opcode_ED_7B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_NF\r
5504 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5505 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5506 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5507 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5508 .word opcode_ED_A0,opcode_ED_A1,opcode_ED_A2,opcode_ED_A3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5509 .word opcode_ED_A8,opcode_ED_A9,opcode_ED_AA,opcode_ED_AB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5510 .word opcode_ED_B0,opcode_ED_B1,opcode_ED_B2,opcode_ED_B3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5511 .word opcode_ED_B8,opcode_ED_B9,opcode_ED_BA,opcode_ED_BB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5512 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5513 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5514 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5515 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5516 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5517 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5518 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5519 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5520\r
5521;@XOR N\r
5522opcode_E_E:\r
5523 ldrb r0,[z80pc],#1\r
5524 opXORb\r
5525 fetch 7\r
5526;@RST 28H\r
5527opcode_E_F:\r
5528 opRST 0x28\r
5529\r
5530;@RET P\r
5531opcode_F_0:\r
5532 tst z80f,#1<<SFlag\r
5533 beq opcode_C_9 ;@unconditional RET\r
5534 fetch 5\r
5535;@POP AF\r
5536opcode_F_1:\r
5537.if FAST_Z80SP\r
5538 ldrb z80f,[z80sp],#1\r
5539 sub r0,opcodes,#0x200\r
5540 ldrb z80f,[r0,z80f]\r
5541 ldrb z80a,[z80sp],#1\r
5542 mov z80a,z80a, lsl #24\r
5543.else\r
5544 mov r0,z80sp\r
5545 readmem16\r
5546 add z80sp,z80sp,#2\r
5547 and z80a,r0,#0xFF00\r
5548 mov z80a,z80a,lsl#16\r
5549 and z80f,r0,#0xFF\r
5550 sub r0,opcodes,#0x200\r
5551 ldrb z80f,[r0,z80f]\r
5552.endif\r
5553 fetch 10\r
5554;@JP P,$+3\r
5555opcode_F_2:\r
5556 tst z80f,#1<<SFlag\r
5557 beq opcode_C_3 ;@unconditional JP\r
5558 add z80pc,z80pc,#2\r
5559 fetch 10\r
5560;@DI\r
5561opcode_F_3:\r
5562 ldrb r1,[cpucontext,#z80if]\r
5563 bic r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5564 strb r1,[cpucontext,#z80if]\r
5565 fetch 4\r
5566;@CALL P,NN\r
5567opcode_F_4:\r
5568 tst z80f,#1<<SFlag\r
5569 beq opcode_C_D ;@unconditional CALL\r
5570 add z80pc,z80pc,#2\r
5571 fetch 10\r
5572;@PUSH AF\r
5573opcode_F_5:\r
5574 sub r0,opcodes,#0x300\r
5575 ldrb r0,[r0,z80f]\r
5576 orr r2,r0,z80a,lsr#16\r
5577 opPUSHareg r2\r
5578 fetch 11\r
5579;@OR N\r
5580opcode_F_6:\r
5581 ldrb r0,[z80pc],#1\r
5582 opORb\r
5583 fetch 7\r
5584;@RST 30H\r
5585opcode_F_7:\r
5586 opRST 0x30\r
5587\r
5588;@RET M\r
5589opcode_F_8:\r
5590 tst z80f,#1<<SFlag\r
5591 bne opcode_C_9 ;@unconditional RET\r
5592 fetch 5\r
5593;@LD SP,HL\r
5594opcode_F_9:\r
5595.if FAST_Z80SP\r
5596 mov r0,z80hl, lsr #16\r
5597 rebasesp\r
5598 mov z80sp,r0\r
5599.else\r
5600 mov z80sp,z80hl, lsr #16\r
5601.endif\r
5602 fetch 4\r
5603;@JP M,$+3\r
5604opcode_F_A:\r
5605 tst z80f,#1<<SFlag\r
5606 bne opcode_C_3 ;@unconditional JP\r
5607 add z80pc,z80pc,#2\r
5608 fetch 10\r
5609MAIN_opcodes_POINTER: .word MAIN_opcodes\r
5610EI_DUMMY_opcodes_POINTER: .word EI_DUMMY_opcodes\r
5611;@EI\r
5612opcode_F_B:\r
5613 ldrb r1,[cpucontext,#z80if]\r
5614 tst r1,#Z80_IF1\r
5615 bne ei_return_exit\r
5616\r
5617 orr r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5618 strb r1,[cpucontext,#z80if]\r
5619\r
5620 mov r2,opcodes\r
5621 ldr opcodes,EI_DUMMY_opcodes_POINTER\r
5622 ldr pc,[r2,r0, lsl #2]\r
5623\r
5624ei_return:\r
5625 ;@point that program returns from EI to check interupts\r
5626 ;@an interupt can not be taken directly after a EI opcode\r
5627 ;@ reset z80pc and opcode pointer\r
5628 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
5629 sub z80pc,z80pc,#1\r
5630 ldr opcodes,MAIN_opcodes_POINTER\r
5631 ;@ check ints\r
5632 tst r0,#1\r
5633 movnes r0,r0,lsr #8\r
5634 blne DoInterrupt\r
5635 ;@ continue\r
5636ei_return_exit:\r
5637 fetch 4\r
5638\r
5639;@CALL M,NN\r
5640opcode_F_C:\r
5641 tst z80f,#1<<SFlag\r
5642 bne opcode_C_D ;@unconditional CALL\r
5643 add z80pc,z80pc,#2\r
5644 fetch 10\r
5645\r
5646;@SHOULD BE CAUGHT AT START - FD SECTION\r
5647\r
5648;@CP N\r
5649opcode_F_E:\r
5650 ldrb r0,[z80pc],#1\r
5651 opCPb\r
5652 fetch 7\r
5653;@RST 38H\r
5654opcode_F_F:\r
5655 opRST 0x38\r
5656\r
5657\r
5658;@##################################\r
5659;@##################################\r
5660;@### opcodes CB #########################\r
5661;@##################################\r
5662;@##################################\r
5663\r
5664\r
5665;@RLC B\r
5666opcode_CB_00:\r
5667 opRLCH z80bc\r
5668;@RLC C\r
5669opcode_CB_01:\r
5670 opRLCL z80bc\r
5671;@RLC D\r
5672opcode_CB_02:\r
5673 opRLCH z80de\r
5674;@RLC E\r
5675opcode_CB_03:\r
5676 opRLCL z80de\r
5677;@RLC H\r
5678opcode_CB_04:\r
5679 opRLCH z80hl\r
5680;@RLC L\r
5681opcode_CB_05:\r
5682 opRLCL z80hl\r
5683;@RLC (HL)\r
5684opcode_CB_06:\r
5685 readmem8HL\r
5686 opRLCb\r
5687 writemem8HL\r
5688 fetch 15\r
5689;@RLC A\r
5690opcode_CB_07:\r
5691 opRLCA\r
5692\r
5693;@RRC B\r
5694opcode_CB_08:\r
5695 opRRCH z80bc\r
5696;@RRC C\r
5697opcode_CB_09:\r
5698 opRRCL z80bc\r
5699;@RRC D\r
5700opcode_CB_0A:\r
5701 opRRCH z80de\r
5702;@RRC E\r
5703opcode_CB_0B:\r
5704 opRRCL z80de\r
5705;@RRC H\r
5706opcode_CB_0C:\r
5707 opRRCH z80hl\r
5708;@RRC L\r
5709opcode_CB_0D:\r
5710 opRRCL z80hl\r
5711;@RRC (HL)\r
5712opcode_CB_0E :\r
5713 readmem8HL\r
5714 opRRCb\r
5715 writemem8HL\r
5716 fetch 15\r
5717;@RRC A\r
5718opcode_CB_0F:\r
5719 opRRCA\r
5720\r
5721;@RL B\r
5722opcode_CB_10:\r
5723 opRLH z80bc\r
5724;@RL C\r
5725opcode_CB_11:\r
5726 opRLL z80bc\r
5727;@RL D\r
5728opcode_CB_12:\r
5729 opRLH z80de\r
5730;@RL E\r
5731opcode_CB_13:\r
5732 opRLL z80de\r
5733;@RL H\r
5734opcode_CB_14:\r
5735 opRLH z80hl\r
5736;@RL L\r
5737opcode_CB_15:\r
5738 opRLL z80hl\r
5739;@RL (HL)\r
5740opcode_CB_16:\r
5741 readmem8HL\r
5742 opRLb\r
5743 writemem8HL\r
5744 fetch 15\r
5745;@RL A\r
5746opcode_CB_17:\r
5747 opRLA\r
5748\r
5749;@RR B \r
5750opcode_CB_18:\r
5751 opRRH z80bc\r
5752;@RR C\r
5753opcode_CB_19:\r
5754 opRRL z80bc\r
5755;@RR D\r
5756opcode_CB_1A:\r
5757 opRRH z80de\r
5758;@RR E\r
5759opcode_CB_1B:\r
5760 opRRL z80de\r
5761;@RR H\r
5762opcode_CB_1C:\r
5763 opRRH z80hl\r
5764;@RR L\r
5765opcode_CB_1D:\r
5766 opRRL z80hl\r
5767;@RR (HL)\r
5768opcode_CB_1E:\r
5769 readmem8HL\r
5770 opRRb\r
5771 writemem8HL\r
5772 fetch 15\r
5773;@RR A\r
5774opcode_CB_1F:\r
5775 opRRA\r
5776\r
5777;@SLA B\r
5778opcode_CB_20:\r
5779 opSLAH z80bc\r
5780;@SLA C\r
5781opcode_CB_21:\r
5782 opSLAL z80bc\r
5783;@SLA D\r
5784opcode_CB_22:\r
5785 opSLAH z80de\r
5786;@SLA E\r
5787opcode_CB_23:\r
5788 opSLAL z80de\r
5789;@SLA H\r
5790opcode_CB_24:\r
5791 opSLAH z80hl\r
5792;@SLA L\r
5793opcode_CB_25:\r
5794 opSLAL z80hl\r
5795;@SLA (HL)\r
5796opcode_CB_26:\r
5797 readmem8HL\r
5798 opSLAb\r
5799 writemem8HL\r
5800 fetch 15\r
5801;@SLA A\r
5802opcode_CB_27:\r
5803 opSLAA\r
5804\r
5805;@SRA B\r
5806opcode_CB_28:\r
5807 opSRAH z80bc\r
5808;@SRA C\r
5809opcode_CB_29:\r
5810 opSRAL z80bc\r
5811;@SRA D\r
5812opcode_CB_2A:\r
5813 opSRAH z80de\r
5814;@SRA E\r
5815opcode_CB_2B:\r
5816 opSRAL z80de\r
5817;@SRA H\r
5818opcode_CB_2C:\r
5819 opSRAH z80hl\r
5820;@SRA L\r
5821opcode_CB_2D:\r
5822 opSRAL z80hl\r
5823;@SRA (HL)\r
5824opcode_CB_2E:\r
5825 readmem8HL\r
5826 opSRAb\r
5827 writemem8HL\r
5828 fetch 15\r
5829;@SRA A\r
5830opcode_CB_2F:\r
5831 opSRAA\r
5832\r
5833;@SLL B\r
5834opcode_CB_30:\r
5835 opSLLH z80bc\r
5836;@SLL C\r
5837opcode_CB_31:\r
5838 opSLLL z80bc\r
5839;@SLL D\r
5840opcode_CB_32:\r
5841 opSLLH z80de\r
5842;@SLL E\r
5843opcode_CB_33:\r
5844 opSLLL z80de\r
5845;@SLL H\r
5846opcode_CB_34:\r
5847 opSLLH z80hl\r
5848;@SLL L\r
5849opcode_CB_35:\r
5850 opSLLL z80hl\r
5851;@SLL (HL)\r
5852opcode_CB_36:\r
5853 readmem8HL\r
5854 opSLLb\r
5855 writemem8HL\r
5856 fetch 15\r
5857;@SLL A\r
5858opcode_CB_37:\r
5859 opSLLA\r
5860\r
5861;@SRL B\r
5862opcode_CB_38:\r
5863 opSRLH z80bc\r
5864;@SRL C\r
5865opcode_CB_39:\r
5866 opSRLL z80bc\r
5867;@SRL D\r
5868opcode_CB_3A:\r
5869 opSRLH z80de\r
5870;@SRL E\r
5871opcode_CB_3B:\r
5872 opSRLL z80de\r
5873;@SRL H\r
5874opcode_CB_3C:\r
5875 opSRLH z80hl\r
5876;@SRL L\r
5877opcode_CB_3D:\r
5878 opSRLL z80hl\r
5879;@SRL (HL)\r
5880opcode_CB_3E:\r
5881 readmem8HL\r
5882 opSRLb\r
5883 writemem8HL\r
5884 fetch 15\r
5885;@SRL A\r
5886opcode_CB_3F:\r
5887 opSRLA\r
5888\r
5889\r
5890;@BIT 0,B\r
5891opcode_CB_40:\r
5892 opBITH z80bc 0\r
5893;@BIT 0,C\r
5894opcode_CB_41:\r
5895 opBITL z80bc 0\r
5896;@BIT 0,D\r
5897opcode_CB_42:\r
5898 opBITH z80de 0\r
5899;@BIT 0,E\r
5900opcode_CB_43:\r
5901 opBITL z80de 0\r
5902;@BIT 0,H\r
5903opcode_CB_44:\r
5904 opBITH z80hl 0\r
5905;@BIT 0,L\r
5906opcode_CB_45:\r
5907 opBITL z80hl 0\r
5908;@BIT 0,(HL)\r
5909opcode_CB_46:\r
5910 readmem8HL\r
5911 opBITb 0\r
5912 fetch 12\r
5913;@BIT 0,A\r
5914opcode_CB_47:\r
5915 opBITH z80a 0\r
5916\r
5917;@BIT 1,B\r
5918opcode_CB_48:\r
5919 opBITH z80bc 1\r
5920;@BIT 1,C\r
5921opcode_CB_49:\r
5922 opBITL z80bc 1\r
5923;@BIT 1,D\r
5924opcode_CB_4A:\r
5925 opBITH z80de 1\r
5926;@BIT 1,E\r
5927opcode_CB_4B:\r
5928 opBITL z80de 1\r
5929;@BIT 1,H\r
5930opcode_CB_4C:\r
5931 opBITH z80hl 1\r
5932;@BIT 1,L\r
5933opcode_CB_4D:\r
5934 opBITL z80hl 1\r
5935;@BIT 1,(HL)\r
5936opcode_CB_4E:\r
5937 readmem8HL\r
5938 opBITb 1\r
5939 fetch 12\r
5940;@BIT 1,A\r
5941opcode_CB_4F:\r
5942 opBITH z80a 1\r
5943\r
5944;@BIT 2,B\r
5945opcode_CB_50:\r
5946 opBITH z80bc 2\r
5947;@BIT 2,C\r
5948opcode_CB_51:\r
5949 opBITL z80bc 2\r
5950;@BIT 2,D\r
5951opcode_CB_52:\r
5952 opBITH z80de 2\r
5953;@BIT 2,E\r
5954opcode_CB_53:\r
5955 opBITL z80de 2\r
5956;@BIT 2,H\r
5957opcode_CB_54:\r
5958 opBITH z80hl 2\r
5959;@BIT 2,L\r
5960opcode_CB_55:\r
5961 opBITL z80hl 2\r
5962;@BIT 2,(HL)\r
5963opcode_CB_56:\r
5964 readmem8HL\r
5965 opBITb 2\r
5966 fetch 12\r
5967;@BIT 2,A\r
5968opcode_CB_57:\r
5969 opBITH z80a 2\r
5970\r
5971;@BIT 3,B\r
5972opcode_CB_58:\r
5973 opBITH z80bc 3\r
5974;@BIT 3,C\r
5975opcode_CB_59:\r
5976 opBITL z80bc 3\r
5977;@BIT 3,D\r
5978opcode_CB_5A:\r
5979 opBITH z80de 3\r
5980;@BIT 3,E\r
5981opcode_CB_5B:\r
5982 opBITL z80de 3\r
5983;@BIT 3,H\r
5984opcode_CB_5C:\r
5985 opBITH z80hl 3\r
5986;@BIT 3,L\r
5987opcode_CB_5D:\r
5988 opBITL z80hl 3\r
5989;@BIT 3,(HL)\r
5990opcode_CB_5E:\r
5991 readmem8HL\r
5992 opBITb 3\r
5993 fetch 12\r
5994;@BIT 3,A\r
5995opcode_CB_5F:\r
5996 opBITH z80a 3\r
5997\r
5998;@BIT 4,B\r
5999opcode_CB_60:\r
6000 opBITH z80bc 4\r
6001;@BIT 4,C\r
6002opcode_CB_61:\r
6003 opBITL z80bc 4\r
6004;@BIT 4,D\r
6005opcode_CB_62:\r
6006 opBITH z80de 4\r
6007;@BIT 4,E\r
6008opcode_CB_63:\r
6009 opBITL z80de 4\r
6010;@BIT 4,H\r
6011opcode_CB_64:\r
6012 opBITH z80hl 4\r
6013;@BIT 4,L\r
6014opcode_CB_65:\r
6015 opBITL z80hl 4\r
6016;@BIT 4,(HL)\r
6017opcode_CB_66:\r
6018 readmem8HL\r
6019 opBITb 4\r
6020 fetch 12\r
6021;@BIT 4,A\r
6022opcode_CB_67:\r
6023 opBITH z80a 4\r
6024\r
6025;@BIT 5,B\r
6026opcode_CB_68:\r
6027 opBITH z80bc 5\r
6028;@BIT 5,C\r
6029opcode_CB_69:\r
6030 opBITL z80bc 5\r
6031;@BIT 5,D\r
6032opcode_CB_6A:\r
6033 opBITH z80de 5\r
6034;@BIT 5,E\r
6035opcode_CB_6B:\r
6036 opBITL z80de 5\r
6037;@BIT 5,H\r
6038opcode_CB_6C:\r
6039 opBITH z80hl 5\r
6040;@BIT 5,L\r
6041opcode_CB_6D:\r
6042 opBITL z80hl 5\r
6043;@BIT 5,(HL)\r
6044opcode_CB_6E:\r
6045 readmem8HL\r
6046 opBITb 5\r
6047 fetch 12\r
6048;@BIT 5,A\r
6049opcode_CB_6F:\r
6050 opBITH z80a 5\r
6051\r
6052;@BIT 6,B\r
6053opcode_CB_70:\r
6054 opBITH z80bc 6\r
6055;@BIT 6,C\r
6056opcode_CB_71:\r
6057 opBITL z80bc 6\r
6058;@BIT 6,D\r
6059opcode_CB_72:\r
6060 opBITH z80de 6\r
6061;@BIT 6,E\r
6062opcode_CB_73:\r
6063 opBITL z80de 6\r
6064;@BIT 6,H\r
6065opcode_CB_74:\r
6066 opBITH z80hl 6\r
6067;@BIT 6,L\r
6068opcode_CB_75:\r
6069 opBITL z80hl 6\r
6070;@BIT 6,(HL)\r
6071opcode_CB_76:\r
6072 readmem8HL\r
6073 opBITb 6\r
6074 fetch 12\r
6075;@BIT 6,A\r
6076opcode_CB_77:\r
6077 opBITH z80a 6\r
6078\r
6079;@BIT 7,B\r
6080opcode_CB_78:\r
6081 opBIT7H z80bc\r
6082;@BIT 7,C\r
6083opcode_CB_79:\r
6084 opBIT7L z80bc\r
6085;@BIT 7,D\r
6086opcode_CB_7A:\r
6087 opBIT7H z80de\r
6088;@BIT 7,E\r
6089opcode_CB_7B:\r
6090 opBIT7L z80de\r
6091;@BIT 7,H\r
6092opcode_CB_7C:\r
6093 opBIT7H z80hl\r
6094;@BIT 7,L\r
6095opcode_CB_7D:\r
6096 opBIT7L z80hl\r
6097;@BIT 7,(HL)\r
6098opcode_CB_7E:\r
6099 readmem8HL\r
6100 opBIT7b\r
6101 fetch 12\r
6102;@BIT 7,A\r
6103opcode_CB_7F:\r
6104 opBIT7H z80a\r
6105\r
6106;@RES 0,B\r
6107opcode_CB_80:\r
6108 bic z80bc,z80bc,#1<<24\r
6109 fetch 8\r
6110;@RES 0,C\r
6111opcode_CB_81:\r
6112 bic z80bc,z80bc,#1<<16\r
6113 fetch 8\r
6114;@RES 0,D\r
6115opcode_CB_82:\r
6116 bic z80de,z80de,#1<<24\r
6117 fetch 8\r
6118;@RES 0,E\r
6119opcode_CB_83:\r
6120 bic z80de,z80de,#1<<16\r
6121 fetch 8\r
6122;@RES 0,H\r
6123opcode_CB_84:\r
6124 bic z80hl,z80hl,#1<<24\r
6125 fetch 8\r
6126;@RES 0,L\r
6127opcode_CB_85:\r
6128 bic z80hl,z80hl,#1<<16\r
6129 fetch 8\r
6130;@RES 0,(HL)\r
6131opcode_CB_86:\r
6132 opRESmemHL 0\r
6133;@RES 0,A\r
6134opcode_CB_87:\r
6135 bic z80a,z80a,#1<<24\r
6136 fetch 8\r
6137\r
6138;@RES 1,B\r
6139opcode_CB_88:\r
6140 bic z80bc,z80bc,#1<<25\r
6141 fetch 8\r
6142;@RES 1,C\r
6143opcode_CB_89:\r
6144 bic z80bc,z80bc,#1<<17\r
6145 fetch 8\r
6146;@RES 1,D\r
6147opcode_CB_8A:\r
6148 bic z80de,z80de,#1<<25\r
6149 fetch 8\r
6150;@RES 1,E\r
6151opcode_CB_8B:\r
6152 bic z80de,z80de,#1<<17\r
6153 fetch 8\r
6154;@RES 1,H\r
6155opcode_CB_8C:\r
6156 bic z80hl,z80hl,#1<<25\r
6157 fetch 8\r
6158;@RES 1,L\r
6159opcode_CB_8D:\r
6160 bic z80hl,z80hl,#1<<17\r
6161 fetch 8\r
6162;@RES 1,(HL)\r
6163opcode_CB_8E:\r
6164 opRESmemHL 1\r
6165;@RES 1,A\r
6166opcode_CB_8F:\r
6167 bic z80a,z80a,#1<<25\r
6168 fetch 8\r
6169\r
6170;@RES 2,B\r
6171opcode_CB_90:\r
6172 bic z80bc,z80bc,#1<<26\r
6173 fetch 8\r
6174;@RES 2,C\r
6175opcode_CB_91:\r
6176 bic z80bc,z80bc,#1<<18\r
6177 fetch 8\r
6178;@RES 2,D\r
6179opcode_CB_92:\r
6180 bic z80de,z80de,#1<<26\r
6181 fetch 8\r
6182;@RES 2,E\r
6183opcode_CB_93:\r
6184 bic z80de,z80de,#1<<18\r
6185 fetch 8\r
6186;@RES 2,H\r
6187opcode_CB_94:\r
6188 bic z80hl,z80hl,#1<<26\r
6189 fetch 8\r
6190;@RES 2,L\r
6191opcode_CB_95:\r
6192 bic z80hl,z80hl,#1<<18\r
6193 fetch 8\r
6194;@RES 2,(HL)\r
6195opcode_CB_96:\r
6196 opRESmemHL 2\r
6197;@RES 2,A\r
6198opcode_CB_97:\r
6199 bic z80a,z80a,#1<<26\r
6200 fetch 8\r
6201\r
6202;@RES 3,B\r
6203opcode_CB_98:\r
6204 bic z80bc,z80bc,#1<<27\r
6205 fetch 8\r
6206;@RES 3,C\r
6207opcode_CB_99:\r
6208 bic z80bc,z80bc,#1<<19\r
6209 fetch 8\r
6210;@RES 3,D\r
6211opcode_CB_9A:\r
6212 bic z80de,z80de,#1<<27\r
6213 fetch 8\r
6214;@RES 3,E\r
6215opcode_CB_9B:\r
6216 bic z80de,z80de,#1<<19\r
6217 fetch 8\r
6218;@RES 3,H\r
6219opcode_CB_9C:\r
6220 bic z80hl,z80hl,#1<<27\r
6221 fetch 8\r
6222;@RES 3,L\r
6223opcode_CB_9D:\r
6224 bic z80hl,z80hl,#1<<19\r
6225 fetch 8\r
6226;@RES 3,(HL)\r
6227opcode_CB_9E:\r
6228 opRESmemHL 3\r
6229;@RES 3,A\r
6230opcode_CB_9F:\r
6231 bic z80a,z80a,#1<<27\r
6232 fetch 8\r
6233\r
6234;@RES 4,B\r
6235opcode_CB_A0:\r
6236 bic z80bc,z80bc,#1<<28\r
6237 fetch 8\r
6238;@RES 4,C\r
6239opcode_CB_A1:\r
6240 bic z80bc,z80bc,#1<<20\r
6241 fetch 8\r
6242;@RES 4,D\r
6243opcode_CB_A2:\r
6244 bic z80de,z80de,#1<<28\r
6245 fetch 8\r
6246;@RES 4,E\r
6247opcode_CB_A3:\r
6248 bic z80de,z80de,#1<<20\r
6249 fetch 8\r
6250;@RES 4,H\r
6251opcode_CB_A4:\r
6252 bic z80hl,z80hl,#1<<28\r
6253 fetch 8\r
6254;@RES 4,L\r
6255opcode_CB_A5:\r
6256 bic z80hl,z80hl,#1<<20\r
6257 fetch 8\r
6258;@RES 4,(HL)\r
6259opcode_CB_A6:\r
6260 opRESmemHL 4\r
6261;@RES 4,A\r
6262opcode_CB_A7:\r
6263 bic z80a,z80a,#1<<28\r
6264 fetch 8\r
6265\r
6266;@RES 5,B\r
6267opcode_CB_A8:\r
6268 bic z80bc,z80bc,#1<<29\r
6269 fetch 8\r
6270;@RES 5,C\r
6271opcode_CB_A9:\r
6272 bic z80bc,z80bc,#1<<21\r
6273 fetch 8\r
6274;@RES 5,D\r
6275opcode_CB_AA:\r
6276 bic z80de,z80de,#1<<29\r
6277 fetch 8\r
6278;@RES 5,E\r
6279opcode_CB_AB:\r
6280 bic z80de,z80de,#1<<21\r
6281 fetch 8\r
6282;@RES 5,H\r
6283opcode_CB_AC:\r
6284 bic z80hl,z80hl,#1<<29\r
6285 fetch 8\r
6286;@RES 5,L\r
6287opcode_CB_AD:\r
6288 bic z80hl,z80hl,#1<<21\r
6289 fetch 8\r
6290;@RES 5,(HL)\r
6291opcode_CB_AE:\r
6292 opRESmemHL 5\r
6293;@RES 5,A\r
6294opcode_CB_AF:\r
6295 bic z80a,z80a,#1<<29\r
6296 fetch 8\r
6297\r
6298;@RES 6,B\r
6299opcode_CB_B0:\r
6300 bic z80bc,z80bc,#1<<30\r
6301 fetch 8\r
6302;@RES 6,C\r
6303opcode_CB_B1:\r
6304 bic z80bc,z80bc,#1<<22\r
6305 fetch 8\r
6306;@RES 6,D\r
6307opcode_CB_B2:\r
6308 bic z80de,z80de,#1<<30\r
6309 fetch 8\r
6310;@RES 6,E\r
6311opcode_CB_B3:\r
6312 bic z80de,z80de,#1<<22\r
6313 fetch 8\r
6314;@RES 6,H\r
6315opcode_CB_B4:\r
6316 bic z80hl,z80hl,#1<<30\r
6317 fetch 8\r
6318;@RES 6,L\r
6319opcode_CB_B5:\r
6320 bic z80hl,z80hl,#1<<22\r
6321 fetch 8\r
6322;@RES 6,(HL)\r
6323opcode_CB_B6:\r
6324 opRESmemHL 6\r
6325;@RES 6,A\r
6326opcode_CB_B7:\r
6327 bic z80a,z80a,#1<<30\r
6328 fetch 8\r
6329\r
6330;@RES 7,B\r
6331opcode_CB_B8:\r
6332 bic z80bc,z80bc,#1<<31\r
6333 fetch 8\r
6334;@RES 7,C\r
6335opcode_CB_B9:\r
6336 bic z80bc,z80bc,#1<<23\r
6337 fetch 8\r
6338;@RES 7,D\r
6339opcode_CB_BA:\r
6340 bic z80de,z80de,#1<<31\r
6341 fetch 8\r
6342;@RES 7,E\r
6343opcode_CB_BB:\r
6344 bic z80de,z80de,#1<<23\r
6345 fetch 8\r
6346;@RES 7,H\r
6347opcode_CB_BC:\r
6348 bic z80hl,z80hl,#1<<31\r
6349 fetch 8\r
6350;@RES 7,L\r
6351opcode_CB_BD:\r
6352 bic z80hl,z80hl,#1<<23\r
6353 fetch 8\r
6354;@RES 7,(HL)\r
6355opcode_CB_BE:\r
6356 opRESmemHL 7\r
6357;@RES 7,A\r
6358opcode_CB_BF:\r
6359 bic z80a,z80a,#1<<31\r
6360 fetch 8\r
6361\r
6362;@SET 0,B\r
6363opcode_CB_C0:\r
6364 orr z80bc,z80bc,#1<<24\r
6365 fetch 8\r
6366;@SET 0,C\r
6367opcode_CB_C1:\r
6368 orr z80bc,z80bc,#1<<16\r
6369 fetch 8\r
6370;@SET 0,D\r
6371opcode_CB_C2:\r
6372 orr z80de,z80de,#1<<24\r
6373 fetch 8\r
6374;@SET 0,E\r
6375opcode_CB_C3:\r
6376 orr z80de,z80de,#1<<16\r
6377 fetch 8\r
6378;@SET 0,H\r
6379opcode_CB_C4:\r
6380 orr z80hl,z80hl,#1<<24\r
6381 fetch 8\r
6382;@SET 0,L\r
6383opcode_CB_C5:\r
6384 orr z80hl,z80hl,#1<<16\r
6385 fetch 8\r
6386;@SET 0,(HL)\r
6387opcode_CB_C6:\r
6388 opSETmemHL 0\r
6389;@SET 0,A\r
6390opcode_CB_C7:\r
6391 orr z80a,z80a,#1<<24\r
6392 fetch 8\r
6393\r
6394;@SET 1,B\r
6395opcode_CB_C8:\r
6396 orr z80bc,z80bc,#1<<25\r
6397 fetch 8\r
6398;@SET 1,C\r
6399opcode_CB_C9:\r
6400 orr z80bc,z80bc,#1<<17\r
6401 fetch 8\r
6402;@SET 1,D\r
6403opcode_CB_CA:\r
6404 orr z80de,z80de,#1<<25\r
6405 fetch 8\r
6406;@SET 1,E\r
6407opcode_CB_CB:\r
6408 orr z80de,z80de,#1<<17\r
6409 fetch 8\r
6410;@SET 1,H\r
6411opcode_CB_CC:\r
6412 orr z80hl,z80hl,#1<<25\r
6413 fetch 8\r
6414;@SET 1,L\r
6415opcode_CB_CD:\r
6416 orr z80hl,z80hl,#1<<17\r
6417 fetch 8\r
6418;@SET 1,(HL)\r
6419opcode_CB_CE:\r
6420 opSETmemHL 1\r
6421;@SET 1,A\r
6422opcode_CB_CF:\r
6423 orr z80a,z80a,#1<<25\r
6424 fetch 8\r
6425\r
6426;@SET 2,B\r
6427opcode_CB_D0:\r
6428 orr z80bc,z80bc,#1<<26\r
6429 fetch 8\r
6430;@SET 2,C\r
6431opcode_CB_D1:\r
6432 orr z80bc,z80bc,#1<<18\r
6433 fetch 8\r
6434;@SET 2,D\r
6435opcode_CB_D2:\r
6436 orr z80de,z80de,#1<<26\r
6437 fetch 8\r
6438;@SET 2,E\r
6439opcode_CB_D3:\r
6440 orr z80de,z80de,#1<<18\r
6441 fetch 8\r
6442;@SET 2,H\r
6443opcode_CB_D4:\r
6444 orr z80hl,z80hl,#1<<26\r
6445 fetch 8\r
6446;@SET 2,L\r
6447opcode_CB_D5:\r
6448 orr z80hl,z80hl,#1<<18\r
6449 fetch 8\r
6450;@SET 2,(HL)\r
6451opcode_CB_D6:\r
6452 opSETmemHL 2\r
6453;@SET 2,A\r
6454opcode_CB_D7:\r
6455 orr z80a,z80a,#1<<26\r
6456 fetch 8\r
6457\r
6458;@SET 3,B\r
6459opcode_CB_D8:\r
6460 orr z80bc,z80bc,#1<<27\r
6461 fetch 8\r
6462;@SET 3,C\r
6463opcode_CB_D9:\r
6464 orr z80bc,z80bc,#1<<19\r
6465 fetch 8\r
6466;@SET 3,D\r
6467opcode_CB_DA:\r
6468 orr z80de,z80de,#1<<27\r
6469 fetch 8\r
6470;@SET 3,E\r
6471opcode_CB_DB:\r
6472 orr z80de,z80de,#1<<19\r
6473 fetch 8\r
6474;@SET 3,H\r
6475opcode_CB_DC:\r
6476 orr z80hl,z80hl,#1<<27\r
6477 fetch 8\r
6478;@SET 3,L\r
6479opcode_CB_DD:\r
6480 orr z80hl,z80hl,#1<<19\r
6481 fetch 8\r
6482;@SET 3,(HL)\r
6483opcode_CB_DE:\r
6484 opSETmemHL 3\r
6485;@SET 3,A\r
6486opcode_CB_DF:\r
6487 orr z80a,z80a,#1<<27\r
6488 fetch 8\r
6489\r
6490;@SET 4,B\r
6491opcode_CB_E0:\r
6492 orr z80bc,z80bc,#1<<28\r
6493 fetch 8\r
6494;@SET 4,C\r
6495opcode_CB_E1:\r
6496 orr z80bc,z80bc,#1<<20\r
6497 fetch 8\r
6498;@SET 4,D\r
6499opcode_CB_E2:\r
6500 orr z80de,z80de,#1<<28\r
6501 fetch 8\r
6502;@SET 4,E\r
6503opcode_CB_E3:\r
6504 orr z80de,z80de,#1<<20\r
6505 fetch 8\r
6506;@SET 4,H\r
6507opcode_CB_E4:\r
6508 orr z80hl,z80hl,#1<<28\r
6509 fetch 8\r
6510;@SET 4,L\r
6511opcode_CB_E5:\r
6512 orr z80hl,z80hl,#1<<20\r
6513 fetch 8\r
6514;@SET 4,(HL)\r
6515opcode_CB_E6:\r
6516 opSETmemHL 4\r
6517;@SET 4,A\r
6518opcode_CB_E7:\r
6519 orr z80a,z80a,#1<<28\r
6520 fetch 8\r
6521\r
6522;@SET 5,B\r
6523opcode_CB_E8:\r
6524 orr z80bc,z80bc,#1<<29\r
6525 fetch 8\r
6526;@SET 5,C\r
6527opcode_CB_E9:\r
6528 orr z80bc,z80bc,#1<<21\r
6529 fetch 8\r
6530;@SET 5,D\r
6531opcode_CB_EA:\r
6532 orr z80de,z80de,#1<<29\r
6533 fetch 8\r
6534;@SET 5,E\r
6535opcode_CB_EB:\r
6536 orr z80de,z80de,#1<<21\r
6537 fetch 8\r
6538;@SET 5,H\r
6539opcode_CB_EC:\r
6540 orr z80hl,z80hl,#1<<29\r
6541 fetch 8\r
6542;@SET 5,L\r
6543opcode_CB_ED:\r
6544 orr z80hl,z80hl,#1<<21\r
6545 fetch 8\r
6546;@SET 5,(HL)\r
6547opcode_CB_EE:\r
6548 opSETmemHL 5\r
6549;@SET 5,A\r
6550opcode_CB_EF:\r
6551 orr z80a,z80a,#1<<29\r
6552 fetch 8\r
6553\r
6554;@SET 6,B\r
6555opcode_CB_F0:\r
6556 orr z80bc,z80bc,#1<<30\r
6557 fetch 8\r
6558;@SET 6,C\r
6559opcode_CB_F1:\r
6560 orr z80bc,z80bc,#1<<22\r
6561 fetch 8\r
6562;@SET 6,D\r
6563opcode_CB_F2:\r
6564 orr z80de,z80de,#1<<30\r
6565 fetch 8\r
6566;@SET 6,E\r
6567opcode_CB_F3:\r
6568 orr z80de,z80de,#1<<22\r
6569 fetch 8\r
6570;@SET 6,H\r
6571opcode_CB_F4:\r
6572 orr z80hl,z80hl,#1<<30\r
6573 fetch 8\r
6574;@SET 6,L\r
6575opcode_CB_F5:\r
6576 orr z80hl,z80hl,#1<<22\r
6577 fetch 8\r
6578;@SET 6,(HL)\r
6579opcode_CB_F6:\r
6580 opSETmemHL 6\r
6581;@SET 6,A\r
6582opcode_CB_F7:\r
6583 orr z80a,z80a,#1<<30\r
6584 fetch 8\r
6585\r
6586;@SET 7,B\r
6587opcode_CB_F8:\r
6588 orr z80bc,z80bc,#1<<31\r
6589 fetch 8\r
6590;@SET 7,C\r
6591opcode_CB_F9:\r
6592 orr z80bc,z80bc,#1<<23\r
6593 fetch 8\r
6594;@SET 7,D\r
6595opcode_CB_FA:\r
6596 orr z80de,z80de,#1<<31\r
6597 fetch 8\r
6598;@SET 7,E\r
6599opcode_CB_FB:\r
6600 orr z80de,z80de,#1<<23\r
6601 fetch 8\r
6602;@SET 7,H\r
6603opcode_CB_FC:\r
6604 orr z80hl,z80hl,#1<<31\r
6605 fetch 8\r
6606;@SET 7,L\r
6607opcode_CB_FD:\r
6608 orr z80hl,z80hl,#1<<23\r
6609 fetch 8\r
6610;@SET 7,(HL)\r
6611opcode_CB_FE:\r
6612 opSETmemHL 7\r
6613;@SET 7,A\r
6614opcode_CB_FF:\r
6615 orr z80a,z80a,#1<<31\r
6616 fetch 8\r
6617\r
6618\r
6619\r
6620;@##################################\r
6621;@##################################\r
6622;@### opcodes DD #########################\r
6623;@##################################\r
6624;@##################################\r
6625;@Because the DD opcodes are not a complete range from 00-FF I have\r
6626;@created this sub routine that will catch any undocumented ops\r
6627;@halt the emulator and mov the current instruction to r0\r
6628;@at a later stage I may change to display a text message on the screen\r
6629opcode_DD_NF:\r
6630 eatcycles 4\r
6631 ldr pc,[opcodes,r0, lsl #2]\r
6632;@ mov r2,#0x10*4\r
6633;@ cmp r2,z80xx\r
6634;@ bne opcode_FD_NF\r
6635;@ mov r0,#0xDD00\r
6636;@ orr r0,r0,r1\r
6637;@ b end_loop\r
6638;@opcode_FD_NF:\r
6639;@ mov r0,#0xFD00\r
6640;@ orr r0,r0,r1\r
6641;@ b end_loop\r
f0243975 6642\r
cc68a136 6643opcode_DD_NF2:\r
f0243975 6644 fetch 15\r
6645;@ notaz: we don't want to deadlock here\r
6646;@ mov r0,#0xDD0000\r
6647;@ orr r0,r0,#0xCB00\r
6648;@ orr r0,r0,r1\r
6649;@ b end_loop\r
cc68a136 6650\r
6651;@ADD IX,BC\r
6652opcode_DD_09:\r
6653 ldr r0,[z80xx]\r
6654 opADD16 r0 z80bc\r
6655 str r0,[z80xx]\r
6656 fetch 15\r
6657;@ADD IX,DE\r
6658opcode_DD_19:\r
6659 ldr r0,[z80xx]\r
6660 opADD16 r0 z80de\r
6661 str r0,[z80xx]\r
6662 fetch 15\r
6663;@LD IX,NN\r
6664opcode_DD_21:\r
6665 ldrb r0,[z80pc],#1\r
6666 ldrb r1,[z80pc],#1\r
6667 orr r0,r0,r1, lsl #8\r
6668 strh r0,[z80xx,#2]\r
6669 fetch 14\r
6670;@LD (NN),IX\r
6671opcode_DD_22:\r
6672 ldrb r0,[z80pc],#1\r
6673 ldrb r1,[z80pc],#1\r
6674 orr r1,r0,r1, lsl #8\r
6675 ldrh r0,[z80xx,#2]\r
6676 writemem16\r
6677 fetch 20\r
6678;@INC IX\r
6679opcode_DD_23:\r
6680 ldr r0,[z80xx]\r
6681 add r0,r0,#1<<16\r
6682 str r0,[z80xx]\r
6683 fetch 10\r
6684;@INC I (IX)\r
6685opcode_DD_24:\r
6686 ldr r0,[z80xx]\r
6687 opINC8H r0\r
6688 str r0,[z80xx]\r
6689 fetch 8\r
6690;@DEC I (IX)\r
6691opcode_DD_25:\r
6692 ldr r0,[z80xx]\r
6693 opDEC8H r0\r
6694 str r0,[z80xx]\r
6695 fetch 8\r
6696;@LD I,N (IX)\r
6697opcode_DD_26:\r
6698 ldrb r0,[z80pc],#1\r
6699 strb r0,[z80xx,#3]\r
6700 fetch 11\r
6701;@ADD IX,IX\r
6702opcode_DD_29:\r
6703 ldr r0,[z80xx]\r
6704 opADD16_2 r0\r
6705 str r0,[z80xx]\r
6706 fetch 15\r
6707;@LD IX,(NN)\r
6708opcode_DD_2A:\r
6709 ldrb r0,[z80pc],#1\r
6710 ldrb r1,[z80pc],#1\r
6711 orr r0,r0,r1, lsl #8\r
6712 stmfd sp!,{z80xx}\r
6713 readmem16\r
6714 ldmfd sp!,{z80xx}\r
6715 strh r0,[z80xx,#2]\r
6716 fetch 20\r
6717;@DEC IX\r
6718opcode_DD_2B:\r
6719 ldr r0,[z80xx]\r
6720 sub r0,r0,#1<<16\r
6721 str r0,[z80xx]\r
6722 fetch 10\r
6723;@INC X (IX)\r
6724opcode_DD_2C:\r
6725 ldr r0,[z80xx]\r
6726 opINC8L r0\r
6727 str r0,[z80xx]\r
6728 fetch 8\r
6729;@DEC X (IX)\r
6730opcode_DD_2D:\r
6731 ldr r0,[z80xx]\r
6732 opDEC8L r0\r
6733 str r0,[z80xx]\r
6734 fetch 8\r
6735;@LD X,N (IX)\r
6736opcode_DD_2E:\r
6737 ldrb r0,[z80pc],#1\r
6738 strb r0,[z80xx,#2]\r
6739 fetch 11\r
6740;@INC (IX+N)\r
6741opcode_DD_34:\r
6742 ldrsb r0,[z80pc],#1\r
6743 ldr r1,[z80xx]\r
6744 add r0,r0,r1, lsr #16\r
6745 stmfd sp!,{r0} ;@ save addr\r
6746 readmem8\r
6747 opINC8b\r
6748 ldmfd sp!,{r1} ;@ restore addr into r1\r
6749 writemem8\r
6750 fetch 23\r
6751;@DEC (IX+N)\r
6752opcode_DD_35:\r
6753 ldrsb r0,[z80pc],#1\r
6754 ldr r1,[z80xx]\r
6755 add r0,r0,r1, lsr #16\r
6756 stmfd sp!,{r0} ;@ save addr\r
6757 readmem8\r
6758 opDEC8b\r
6759 ldmfd sp!,{r1} ;@ restore addr into r1\r
6760 writemem8\r
6761 fetch 23\r
6762;@LD (IX+N),N\r
6763opcode_DD_36:\r
6764 ldrsb r2,[z80pc],#1\r
6765 ldrb r0,[z80pc],#1\r
6766 ldr r1,[z80xx]\r
6767 add r1,r2,r1, lsr #16\r
6768 writemem8\r
6769 fetch 19\r
6770;@ADD IX,SP\r
6771opcode_DD_39:\r
6772 ldr r0,[z80xx]\r
6773.if FAST_Z80SP\r
6774 ldr r2,[cpucontext,#z80sp_base]\r
6775 sub r2,z80sp,r2\r
6776 opADD16s r0 r2 16\r
6777.else\r
6778 opADD16s r0 z80sp 16\r
6779.endif\r
6780 str r0,[z80xx]\r
6781 fetch 15\r
6782;@LD B,I ( IX )\r
6783opcode_DD_44:\r
6784 ldrb r0,[z80xx,#3]\r
6785 and z80bc,z80bc,#0xFF<<16\r
6786 orr z80bc,z80bc,r0, lsl #24\r
6787 fetch 8\r
6788;@LD B,X ( IX )\r
6789opcode_DD_45:\r
6790 ldrb r0,[z80xx,#2]\r
6791 and z80bc,z80bc,#0xFF<<16\r
6792 orr z80bc,z80bc,r0, lsl #24\r
6793 fetch 8\r
6794;@LD B,(IX,N)\r
6795opcode_DD_46:\r
6796 ldrsb r0,[z80pc],#1\r
6797 ldr r1,[z80xx]\r
6798 add r0,r0,r1, lsr #16\r
6799 readmem8\r
6800 and z80bc,z80bc,#0xFF<<16\r
6801 orr z80bc,z80bc,r0, lsl #24\r
6802 fetch 19\r
6803;@LD C,I (IX)\r
6804opcode_DD_4C:\r
6805 ldrb r0,[z80xx,#3]\r
6806 and z80bc,z80bc,#0xFF<<24\r
6807 orr z80bc,z80bc,r0, lsl #16\r
6808 fetch 8\r
6809;@LD C,X (IX)\r
6810opcode_DD_4D:\r
6811 ldrb r0,[z80xx,#2]\r
6812 and z80bc,z80bc,#0xFF<<24\r
6813 orr z80bc,z80bc,r0, lsl #16\r
6814 fetch 8\r
6815;@LD C,(IX,N)\r
6816opcode_DD_4E:\r
6817 ldrsb r0,[z80pc],#1\r
6818 ldr r1,[z80xx]\r
6819 add r0,r0,r1, lsr #16\r
6820 readmem8\r
6821 and z80bc,z80bc,#0xFF<<24\r
6822 orr z80bc,z80bc,r0, lsl #16\r
6823 fetch 19\r
6824\r
6825;@LD D,I (IX)\r
6826opcode_DD_54:\r
6827 ldrb r0,[z80xx,#3]\r
6828 and z80de,z80de,#0xFF<<16\r
6829 orr z80de,z80de,r0, lsl #24\r
6830 fetch 8\r
6831;@LD D,X (IX)\r
6832opcode_DD_55:\r
6833 ldrb r0,[z80xx,#2]\r
6834 and z80de,z80de,#0xFF<<16\r
6835 orr z80de,z80de,r0, lsl #24\r
6836 fetch 8\r
6837;@LD D,(IX,N)\r
6838opcode_DD_56:\r
6839 ldrsb r0,[z80pc],#1\r
6840 ldr r1,[z80xx]\r
6841 add r0,r0,r1, lsr #16\r
6842 readmem8\r
6843 and z80de,z80de,#0xFF<<16\r
6844 orr z80de,z80de,r0, lsl #24\r
6845 fetch 19\r
6846;@LD E,I (IX)\r
6847opcode_DD_5C:\r
6848 ldrb r0,[z80xx,#3]\r
6849 and z80de,z80de,#0xFF<<24\r
6850 orr z80de,z80de,r0, lsl #16\r
6851 fetch 8\r
6852;@LD E,X (IX)\r
6853opcode_DD_5D:\r
6854 ldrb r0,[z80xx,#2]\r
6855 and z80de,z80de,#0xFF<<24\r
6856 orr z80de,z80de,r0, lsl #16\r
6857 fetch 8\r
6858;@LD E,(IX,N)\r
6859opcode_DD_5E:\r
6860 ldrsb r0,[z80pc],#1\r
6861 ldr r1,[z80xx]\r
6862 add r0,r0,r1, lsr #16\r
6863 readmem8\r
6864 and z80de,z80de,#0xFF<<24\r
6865 orr z80de,z80de,r0, lsl #16\r
6866 fetch 19\r
6867;@LD I,B (IX)\r
6868opcode_DD_60:\r
6869 mov r0,z80bc,lsr#24\r
6870 strb r0,[z80xx,#3]\r
6871 fetch 8\r
6872;@LD I,C (IX)\r
6873opcode_DD_61:\r
6874 mov r0,z80bc,lsr#16\r
6875 strb r0,[z80xx,#3]\r
6876 fetch 8\r
6877;@LD I,D (IX)\r
6878opcode_DD_62:\r
6879 mov r0,z80de,lsr#24\r
6880 strb r0,[z80xx,#3]\r
6881 fetch 8\r
6882;@LD I,E (IX)\r
6883opcode_DD_63:\r
6884 mov r0,z80de,lsr#16\r
6885 strb r0,[z80xx,#3]\r
6886 fetch 8\r
6887;@LD I,I (IX)\r
6888opcode_DD_64:\r
6889 fetch 8\r
6890;@LD I,X (IX)\r
6891opcode_DD_65:\r
6892 ldrb r0,[z80xx,#2]\r
6893 strb r0,[z80xx,#3]\r
6894 fetch 8\r
6895;@LD H,(IX,N)\r
6896opcode_DD_66:\r
6897 ldrsb r0,[z80pc],#1\r
6898 ldr r1,[z80xx]\r
6899 add r0,r0,r1, lsr #16\r
6900 readmem8\r
6901 and z80hl,z80hl,#0xFF<<16\r
6902 orr z80hl,z80hl,r0, lsl #24\r
6903 fetch 19\r
6904;@LD I,A (IX)\r
6905opcode_DD_67:\r
6906 mov r0,z80a,lsr#24\r
6907 strb r0,[z80xx,#3]\r
6908 fetch 8\r
6909;@LD X,B (IX)\r
6910opcode_DD_68:\r
6911 mov r0,z80bc,lsr#24\r
6912 strb r0,[z80xx,#2]\r
6913 fetch 8\r
6914;@LD X,C (IX)\r
6915opcode_DD_69:\r
6916 mov r0,z80bc,lsr#16\r
6917 strb r0,[z80xx,#2]\r
6918 fetch 8\r
6919;@LD X,D (IX)\r
6920opcode_DD_6A:\r
6921 mov r0,z80de,lsr#24\r
6922 strb r0,[z80xx,#2]\r
6923 fetch 8\r
6924;@LD X,E (IX)\r
6925opcode_DD_6B:\r
6926 mov r0,z80de,lsr#16\r
6927 strb r0,[z80xx,#2]\r
6928 fetch 8\r
6929;@LD X,I (IX)\r
6930opcode_DD_6C:\r
6931 ldrb r0,[z80xx,#3]\r
6932 strb r0,[z80xx,#2]\r
6933 fetch 8\r
6934;@LD X,X (IX)\r
6935opcode_DD_6D:\r
6936 fetch 8\r
6937;@LD L,(IX,N)\r
6938opcode_DD_6E:\r
6939 ldrsb r0,[z80pc],#1\r
6940 ldr r1,[z80xx]\r
6941 add r0,r0,r1, lsr #16\r
6942 readmem8\r
6943 and z80hl,z80hl,#0xFF<<24\r
6944 orr z80hl,z80hl,r0, lsl #16\r
6945 fetch 19\r
6946;@LD X,A (IX)\r
6947opcode_DD_6F:\r
6948 mov r0,z80a,lsr#24\r
6949 strb r0,[z80xx,#2]\r
6950 fetch 8\r
6951\r
6952;@LD (IX,N),B\r
6953opcode_DD_70:\r
6954 ldrsb r0,[z80pc],#1\r
6955 ldr r1,[z80xx]\r
6956 add r1,r0,r1, lsr #16\r
6957 mov r0,z80bc, lsr #24\r
6958 writemem8\r
6959 fetch 19\r
6960;@LD (IX,N),C\r
6961opcode_DD_71:\r
6962 ldrsb r0,[z80pc],#1\r
6963 ldr r1,[z80xx]\r
6964 add r1,r0,r1, lsr #16\r
6965 mov r0,z80bc, lsr #16\r
6966 and r0,r0,#0xFF\r
6967 writemem8\r
6968 fetch 19\r
6969;@LD (IX,N),D\r
6970opcode_DD_72:\r
6971 ldrsb r0,[z80pc],#1\r
6972 ldr r1,[z80xx]\r
6973 add r1,r0,r1, lsr #16\r
6974 mov r0,z80de, lsr #24\r
6975 writemem8\r
6976 fetch 19\r
6977;@LD (IX,N),E\r
6978opcode_DD_73:\r
6979 ldrsb r0,[z80pc],#1\r
6980 ldr r1,[z80xx]\r
6981 add r1,r0,r1, lsr #16\r
6982 mov r0,z80de, lsr #16\r
6983 and r0,r0,#0xFF\r
6984 writemem8\r
6985 fetch 19\r
6986;@LD (IX,N),H\r
6987opcode_DD_74:\r
6988 ldrsb r0,[z80pc],#1\r
6989 ldr r1,[z80xx]\r
6990 add r1,r0,r1, lsr #16\r
6991 mov r0,z80hl, lsr #24\r
6992 writemem8\r
6993 fetch 19\r
6994;@LD (IX,N),L\r
6995opcode_DD_75:\r
6996 ldrsb r0,[z80pc],#1\r
6997 ldr r1,[z80xx]\r
6998 add r1,r0,r1, lsr #16\r
6999 mov r0,z80hl, lsr #16\r
7000 and r0,r0,#0xFF\r
7001 writemem8\r
7002 fetch 19\r
7003;@LD (IX,N),A\r
7004opcode_DD_77:\r
7005 ldrsb r0,[z80pc],#1\r
7006 ldr r1,[z80xx]\r
7007 add r1,r0,r1, lsr #16\r
7008 mov r0,z80a, lsr #24\r
7009 writemem8\r
7010 fetch 19\r
7011\r
7012;@LD A,I from (IX)\r
7013opcode_DD_7C:\r
7014 ldrb r0,[z80xx,#3]\r
7015 mov z80a,r0, lsl #24\r
7016 fetch 8\r
7017;@LD A,X from (IX)\r
7018opcode_DD_7D:\r
7019 ldrb r0,[z80xx,#2]\r
7020 mov z80a,r0, lsl #24\r
7021 fetch 8\r
7022;@LD A,(IX,N)\r
7023opcode_DD_7E:\r
7024 ldrsb r0,[z80pc],#1\r
7025 ldr r1,[z80xx]\r
7026 add r0,r0,r1, lsr #16\r
7027 readmem8\r
7028 mov z80a,r0, lsl #24\r
7029 fetch 19\r
7030\r
7031;@ADD A,I ( IX)\r
7032opcode_DD_84:\r
7033 ldrb r0,[z80xx,#3]\r
7034 opADDb\r
7035 fetch 8\r
7036;@ADD A,X ( IX)\r
7037opcode_DD_85:\r
7038 ldrb r0,[z80xx,#2]\r
7039 opADDb\r
7040 fetch 8\r
7041;@ADD A,(IX+N)\r
7042opcode_DD_86:\r
7043 ldrsb r0,[z80pc],#1\r
7044 ldr r1,[z80xx]\r
7045 add r0,r0,r1, lsr #16\r
7046 readmem8\r
7047 opADDb\r
7048 fetch 19\r
7049\r
7050;@ADC A,I (IX)\r
7051opcode_DD_8C:\r
7052 ldrb r0,[z80xx,#3]\r
7053 opADCb\r
7054 fetch 8\r
7055;@ADC A,X (IX)\r
7056opcode_DD_8D:\r
7057 ldrb r0,[z80xx,#2]\r
7058 opADCb\r
7059 fetch 8\r
7060;@ADC A,(IX+N)\r
7061opcode_DD_8E:\r
7062 ldrsb r0,[z80pc],#1\r
7063 ldr r1,[z80xx]\r
7064 add r0,r0,r1, lsr #16\r
7065 readmem8\r
7066 opADCb\r
7067 fetch 19\r
7068\r
7069;@SUB A,I (IX)\r
7070opcode_DD_94:\r
7071 ldrb r0,[z80xx,#3]\r
7072 opSUBb\r
7073 fetch 8\r
7074;@SUB A,X (IX)\r
7075opcode_DD_95:\r
7076 ldrb r0,[z80xx,#2]\r
7077 opSUBb\r
7078 fetch 8\r
7079;@SUB A,(IX+N)\r
7080opcode_DD_96:\r
7081 ldrsb r0,[z80pc],#1\r
7082 ldr r1,[z80xx]\r
7083 add r0,r0,r1, lsr #16\r
7084 readmem8\r
7085 opSUBb\r
7086 fetch 19\r
7087\r
7088;@SBC A,I (IX)\r
7089opcode_DD_9C:\r
7090 ldrb r0,[z80xx,#3]\r
7091 opSBCb\r
7092 fetch 8\r
7093;@SBC A,X (IX)\r
7094opcode_DD_9D:\r
7095 ldrb r0,[z80xx,#2]\r
7096 opSBCb\r
7097 fetch 8\r
7098;@SBC A,(IX+N)\r
7099opcode_DD_9E:\r
7100 ldrsb r0,[z80pc],#1\r
7101 ldr r1,[z80xx]\r
7102 add r0,r0,r1, lsr #16\r
7103 readmem8\r
7104 opSBCb\r
7105 fetch 19\r
7106\r
7107;@AND I (IX)\r
7108opcode_DD_A4:\r
7109 ldrb r0,[z80xx,#3]\r
7110 opANDb\r
7111 fetch 8\r
7112;@AND X (IX)\r
7113opcode_DD_A5:\r
7114 ldrb r0,[z80xx,#2]\r
7115 opANDb\r
7116 fetch 8\r
7117;@AND (IX+N)\r
7118opcode_DD_A6:\r
7119 ldrsb r0,[z80pc],#1\r
7120 ldr r1,[z80xx]\r
7121 add r0,r0,r1, lsr #16\r
7122 readmem8\r
7123 opANDb\r
7124 fetch 19\r
7125\r
7126;@XOR I (IX)\r
7127opcode_DD_AC:\r
7128 ldrb r0,[z80xx,#3]\r
7129 opXORb\r
7130 fetch 8\r
7131;@XOR X (IX)\r
7132opcode_DD_AD:\r
7133 ldrb r0,[z80xx,#2]\r
7134 opXORb\r
7135 fetch 8\r
7136;@XOR (IX+N)\r
7137opcode_DD_AE:\r
7138 ldrsb r0,[z80pc],#1\r
7139 ldr r1,[z80xx]\r
7140 add r0,r0,r1, lsr #16\r
7141 readmem8\r
7142 opXORb\r
7143 fetch 19\r
7144\r
7145;@OR I (IX)\r
7146opcode_DD_B4:\r
7147 ldrb r0,[z80xx,#3]\r
7148 opORb\r
7149 fetch 8\r
7150;@OR X (IX)\r
7151opcode_DD_B5:\r
7152 ldrb r0,[z80xx,#2]\r
7153 opORb\r
7154 fetch 8\r
7155;@OR (IX+N)\r
7156opcode_DD_B6:\r
7157 ldrsb r0,[z80pc],#1\r
7158 ldr r1,[z80xx]\r
7159 add r0,r0,r1, lsr #16\r
7160 readmem8\r
7161 opORb\r
7162 fetch 19\r
7163\r
7164;@CP I (IX)\r
7165opcode_DD_BC:\r
7166 ldrb r0,[z80xx,#3]\r
7167 opCPb\r
7168 fetch 8\r
7169;@CP X (IX)\r
7170opcode_DD_BD:\r
7171 ldrb r0,[z80xx,#2]\r
7172 opCPb\r
7173 fetch 8\r
7174;@CP (IX+N)\r
7175opcode_DD_BE:\r
7176 ldrsb r0,[z80pc],#1\r
7177 ldr r1,[z80xx]\r
7178 add r0,r0,r1, lsr #16\r
7179 readmem8\r
7180 opCPb\r
7181 fetch 19\r
7182\r
7183\r
7184opcodes_DD_CB_LOCAL: .word opcodes_DD_CB\r
7185opcode_DD_CB:\r
7186;@Looks up the opcode on the opcodes_DD_CB table and then \r
7187;@moves the PC to the location of the subroutine\r
7188 ldrsb r0,[z80pc],#1\r
7189 ldr r1,[z80xx]\r
7190 add r0,r0,r1, lsr #16\r
7191\r
7192 ldrb r1,[z80pc],#1\r
7193 ldr pc,[pc,r1, lsl #2]\r
7194 .word 0x00\r
7195opcodes_DD_CB:\r
7196 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_06,opcode_DD_NF2\r
7197 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_0E,opcode_DD_NF2\r
7198 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_16,opcode_DD_NF2\r
7199 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_1E,opcode_DD_NF2\r
7200 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_26,opcode_DD_NF2\r
7201 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_2E,opcode_DD_NF2\r
7202 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_36,opcode_DD_NF2\r
7203 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_3E,opcode_DD_NF2\r
7204 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_46,opcode_DD_NF2\r
7205 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_4E,opcode_DD_NF2\r
7206 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_56,opcode_DD_NF2\r
7207 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_5E,opcode_DD_NF2\r
7208 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_66,opcode_DD_NF2\r
7209 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_6E,opcode_DD_NF2\r
7210 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_76,opcode_DD_NF2\r
7211 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_7E,opcode_DD_NF2\r
7212 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_86,opcode_DD_NF2\r
7213 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_8E,opcode_DD_NF2\r
7214 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_96,opcode_DD_NF2\r
7215 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_9E,opcode_DD_NF2\r
7216 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_A6,opcode_DD_NF2\r
7217 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_AE,opcode_DD_NF2\r
7218 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_B6,opcode_DD_NF2\r
7219 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_BE,opcode_DD_NF2\r
7220 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_C6,opcode_DD_NF2\r
7221 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_CE,opcode_DD_NF2\r
7222 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_D6,opcode_DD_NF2\r
7223 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_DE,opcode_DD_NF2\r
7224 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_E6,opcode_DD_NF2\r
7225 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_EE,opcode_DD_NF2\r
7226 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_F6,opcode_DD_NF2\r
7227 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_FE,opcode_DD_NF2\r
7228\r
7229;@RLC (IX+N) \r
7230opcode_DD_CB_06:\r
7231 stmfd sp!,{r0} ;@ save addr\r
7232 readmem8\r
7233 opRLCb\r
7234 ldmfd sp!,{r1} ;@ restore addr into r1\r
7235 writemem8\r
7236 fetch 23\r
7237;@RRC (IX+N) \r
7238opcode_DD_CB_0E:\r
7239 stmfd sp!,{r0} ;@ save addr\r
7240 readmem8\r
7241 opRRCb\r
7242 ldmfd sp!,{r1} ;@ restore addr into r1\r
7243 writemem8\r
7244 fetch 23\r
7245;@RL (IX+N) \r
7246opcode_DD_CB_16:\r
7247 stmfd sp!,{r0} ;@ save addr\r
7248 readmem8\r
7249 opRLb\r
7250 ldmfd sp!,{r1} ;@ restore addr into r1\r
7251 writemem8\r
7252 fetch 23\r
7253;@RR (IX+N) \r
7254opcode_DD_CB_1E:\r
7255 stmfd sp!,{r0} ;@ save addr \r
7256 readmem8\r
7257 opRRb\r
7258 ldmfd sp!,{r1} ;@ restore addr into r1\r
7259 writemem8\r
7260 fetch 23\r
7261\r
7262;@SLA (IX+N) \r
7263opcode_DD_CB_26:\r
7264 stmfd sp!,{r0} ;@ save addr \r
7265 readmem8\r
7266 opSLAb\r
7267 ldmfd sp!,{r1} ;@ restore addr into r1\r
7268 writemem8\r
7269 fetch 23\r
7270;@SRA (IX+N) \r
7271opcode_DD_CB_2E:\r
7272 stmfd sp!,{r0} ;@ save addr \r
7273 readmem8\r
7274 opSRAb\r
7275 ldmfd sp!,{r1} ;@ restore addr into r1\r
7276 writemem8\r
7277 fetch 23\r
7278;@SLL (IX+N) \r
7279opcode_DD_CB_36:\r
7280 stmfd sp!,{r0} ;@ save addr \r
7281 readmem8\r
7282 opSLLb\r
7283 ldmfd sp!,{r1} ;@ restore addr into r1\r
7284 writemem8\r
7285 fetch 23\r
7286;@SRL (IX+N)\r
7287opcode_DD_CB_3E:\r
7288 stmfd sp!,{r0} ;@ save addr \r
7289 readmem8\r
7290 opSRLb\r
7291 ldmfd sp!,{r1} ;@ restore addr into r1\r
7292 writemem8\r
7293 fetch 23\r
7294\r
7295;@BIT 0,(IX+N) \r
7296opcode_DD_CB_46:\r
7297 readmem8\r
7298 opBITb 0\r
7299 fetch 20\r
7300;@BIT 1,(IX+N) \r
7301opcode_DD_CB_4E:\r
7302 readmem8\r
7303 opBITb 1\r
7304 fetch 20\r
7305;@BIT 2,(IX+N) \r
7306opcode_DD_CB_56:\r
7307 readmem8\r
7308 opBITb 2\r
7309 fetch 20\r
7310;@BIT 3,(IX+N) \r
7311opcode_DD_CB_5E:\r
7312 readmem8\r
7313 opBITb 3\r
7314 fetch 20\r
7315;@BIT 4,(IX+N) \r
7316opcode_DD_CB_66:\r
7317 readmem8\r
7318 opBITb 4\r
7319 fetch 20\r
7320;@BIT 5,(IX+N) \r
7321opcode_DD_CB_6E:\r
7322 readmem8\r
7323 opBITb 5\r
7324 fetch 20\r
7325;@BIT 6,(IX+N) \r
7326opcode_DD_CB_76:\r
7327 readmem8\r
7328 opBITb 6\r
7329 fetch 20\r
7330;@BIT 7,(IX+N) \r
7331opcode_DD_CB_7E:\r
7332 readmem8\r
7333 opBIT7b\r
7334 fetch 20\r
7335;@RES 0,(IX+N) \r
7336opcode_DD_CB_86:\r
7337 opRESmem 0\r
7338;@RES 1,(IX+N) \r
7339opcode_DD_CB_8E:\r
7340 opRESmem 1\r
7341;@RES 2,(IX+N) \r
7342opcode_DD_CB_96:\r
7343 opRESmem 2\r
7344;@RES 3,(IX+N) \r
7345opcode_DD_CB_9E:\r
7346 opRESmem 3\r
7347;@RES 4,(IX+N) \r
7348opcode_DD_CB_A6:\r
7349 opRESmem 4\r
7350;@RES 5,(IX+N) \r
7351opcode_DD_CB_AE:\r
7352 opRESmem 5\r
7353;@RES 6,(IX+N) \r
7354opcode_DD_CB_B6:\r
7355 opRESmem 6\r
7356;@RES 7,(IX+N) \r
7357opcode_DD_CB_BE:\r
7358 opRESmem 7\r
7359\r
7360;@SET 0,(IX+N) \r
7361opcode_DD_CB_C6:\r
7362 opSETmem 0\r
7363;@SET 1,(IX+N) \r
7364opcode_DD_CB_CE:\r
7365 opSETmem 1\r
7366;@SET 2,(IX+N) \r
7367opcode_DD_CB_D6:\r
7368 opSETmem 2\r
7369;@SET 3,(IX+N) \r
7370opcode_DD_CB_DE:\r
7371 opSETmem 3\r
7372;@SET 4,(IX+N) \r
7373opcode_DD_CB_E6:\r
7374 opSETmem 4\r
7375;@SET 5,(IX+N) \r
7376opcode_DD_CB_EE:\r
7377 opSETmem 5\r
7378;@SET 6,(IX+N) \r
7379opcode_DD_CB_F6:\r
7380 opSETmem 6\r
7381;@SET 7,(IX+N) \r
7382opcode_DD_CB_FE:\r
7383 opSETmem 7\r
7384\r
7385\r
7386\r
7387;@POP IX\r
7388opcode_DD_E1:\r
7389.if FAST_Z80SP\r
7390 opPOP\r
7391.else\r
7392 mov r0,z80sp\r
7393 stmfd sp!,{z80xx}\r
7394 readmem16\r
7395 ldmfd sp!,{z80xx}\r
7396 add z80sp,z80sp,#2\r
7397.endif\r
7398 strh r0,[z80xx,#2]\r
7399 fetch 14\r
7400;@EX (SP),IX\r
7401opcode_DD_E3:\r
7402.if FAST_Z80SP\r
7403 ldrb r0,[z80sp]\r
7404 ldrb r1,[z80sp,#1]\r
7405 orr r2,r0,r1, lsl #8\r
7406 ldrh r1,[z80xx,#2]\r
7407 mov r0,r1, lsr #8\r
7408 strb r0,[z80sp,#1]\r
7409 strb r1,[z80sp]\r
7410 strh r2,[z80xx,#2]\r
7411.else\r
7412 mov r0,z80sp\r
7413 stmfd sp!,{z80xx}\r
7414 readmem16\r
7415 ldmfd sp!,{z80xx}\r
7416 mov r2,r0\r
7417 ldrh r0,[z80xx,#2]\r
7418 strh r2,[z80xx,#2]\r
7419 mov r1,z80sp\r
7420 writemem16\r
7421.endif\r
7422 fetch 23\r
7423;@PUSH IX\r
7424opcode_DD_E5:\r
7425 ldr r2,[z80xx]\r
7426 opPUSHreg r2\r
7427 fetch 15\r
7428;@JP (IX)\r
7429opcode_DD_E9:\r
7430 ldrh r0,[z80xx,#2]\r
7431 rebasepc\r
7432 fetch 8\r
7433;@LD SP,IX\r
7434opcode_DD_F9:\r
7435.if FAST_Z80SP\r
7436 ldrh r0,[z80xx,#2]\r
7437 rebasesp\r
7438 mov z80sp,r0\r
7439.else\r
7440 ldrh z80sp,[z80xx,#2]\r
7441.endif\r
7442 fetch 10\r
7443\r
7444;@##################################\r
7445;@##################################\r
7446;@### opcodes ED #########################\r
7447;@##################################\r
7448;@##################################\r
7449\r
7450opcode_ED_NF:\r
7451 fetch 8\r
7452;@ ldrb r0,[z80pc],#1\r
7453;@ ldr pc,[opcodes,r0, lsl #2]\r
7454;@ mov r0,#0xED00\r
7455;@ orr r0,r0,r1\r
7456;@ b end_loop\r
7457\r
7458;@IN B,(C)\r
7459opcode_ED_40:\r
7460 opIN_C\r
7461 and z80bc,z80bc,#0xFF<<16\r
7462 orr z80bc,z80bc,r0, lsl #24\r
7463 sub r1,opcodes,#0x100\r
7464 ldrb r0,[r1,r0]\r
7465 and z80f,z80f,#1<<CFlag\r
7466 orr z80f,z80f,r0\r
7467 fetch 12\r
7468;@OUT (C),B\r
7469opcode_ED_41:\r
7470 mov r1,z80bc, lsr #24\r
7471 opOUT_C\r
7472 fetch 12\r
7473\r
7474;@SBC HL,BC\r
7475opcode_ED_42:\r
7476 opSBC16 z80bc\r
7477\r
7478;@LD (NN),BC\r
7479opcode_ED_43:\r
7480 ldrb r0,[z80pc],#1\r
7481 ldrb r1,[z80pc],#1\r
7482 orr r1,r0,r1, lsl #8\r
7483 mov r0,z80bc, lsr #16\r
7484 writemem16\r
7485 fetch 20\r
7486;@NEG\r
7487opcode_ED_44:\r
7488 rsbs z80a,z80a,#0\r
7489 mrs z80f,cpsr\r
7490 mov z80f,z80f,lsr#28 ;@S,Z,V&C\r
7491 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@invert C and set n.\r
7492 tst z80a,#0x0F000000 ;@H, correct\r
7493 orrne z80f,z80f,#1<<HFlag\r
7494 fetch 8\r
7495 \r
7496;@RETN, moved to ED_4D\r
7497;@opcode_ED_45:\r
7498\r
7499;@IM 0\r
7500opcode_ED_46:\r
7501 strb z80a,[cpucontext,#z80im]\r
7502 fetch 8\r
7503;@LD I,A\r
7504opcode_ED_47:\r
7505 str z80a,[cpucontext,#z80i]\r
7506 fetch 9\r
7507;@IN C,(C)\r
7508opcode_ED_48:\r
7509 opIN_C\r
7510 and z80bc,z80bc,#0xFF<<24\r
7511 orr z80bc,z80bc,r0, lsl #16\r
7512 sub r1,opcodes,#0x100\r
7513 ldrb r0,[r1,r0]\r
7514 and z80f,z80f,#1<<CFlag\r
7515 orr z80f,z80f,r0\r
7516 fetch 12\r
7517;@OUT (C),C\r
7518opcode_ED_49:\r
7519 mov r0,z80bc, lsr #16\r
7520 and r1,r0,#0xFF\r
7521 opOUT\r
7522 fetch 12\r
7523;@ADC HL,BC\r
7524opcode_ED_4A:\r
7525 opADC16 z80bc\r
7526;@LD BC,(NN)\r
7527opcode_ED_4B:\r
7528 ldrb r0,[z80pc],#1\r
7529 ldrb r1,[z80pc],#1\r
7530 orr r0,r0,r1, lsl #8\r
7531 readmem16\r
7532 mov z80bc,r0, lsl #16\r
7533 fetch 20\r
7534\r
7535;@RETN\r
7536opcode_ED_45:\r
7537;@RETI\r
7538opcode_ED_4D:\r
7539 ldrb r0,[cpucontext,#z80if]\r
7540 tst r0,#Z80_IF2\r
7541 orrne r0,r0,#Z80_IF1\r
7542 biceq r0,r0,#Z80_IF1\r
7543 strb r0,[cpucontext,#z80if]\r
7544 opPOP\r
7545 rebasepc\r
7546 fetch 14\r
7547\r
7548;@LD R,A\r
7549opcode_ED_4F:\r
7550 mov r0,z80a,lsr#24\r
7551 strb r0,[cpucontext,#z80r]\r
7552 fetch 9\r
7553\r
7554;@IN D,(C)\r
7555opcode_ED_50:\r
7556 opIN_C\r
7557 and z80de,z80de,#0xFF<<16\r
7558 orr z80de,z80de,r0, lsl #24\r
7559 sub r1,opcodes,#0x100\r
7560 ldrb r0,[r1,r0]\r
7561 and z80f,z80f,#1<<CFlag\r
7562 orr z80f,z80f,r0\r
7563 fetch 12\r
7564;@OUT (C),D\r
7565opcode_ED_51:\r
7566 mov r1,z80de, lsr #24\r
7567 opOUT_C\r
7568 fetch 12\r
7569;@SBC HL,DE\r
7570opcode_ED_52:\r
7571 opSBC16 z80de\r
7572;@LD (NN),DE\r
7573opcode_ED_53:\r
7574 ldrb r0,[z80pc],#1\r
7575 ldrb r1,[z80pc],#1\r
7576 orr r1,r0,r1, lsl #8\r
7577 mov r0,z80de, lsr #16\r
7578 writemem16\r
7579 fetch 20\r
7580;@IM 1\r
7581opcode_ED_56:\r
7582 mov r0,#1\r
7583 strb r0,[cpucontext,#z80im]\r
7584 fetch 8\r
7585;@LD A,I\r
7586opcode_ED_57:\r
7587 ldr z80a,[cpucontext,#z80i]\r
7588 tst z80a,#0xFF000000\r
7589 and z80f,z80f,#(1<<CFlag)\r
7590 orreq z80f,z80f,#(1<<ZFlag)\r
7591 orrmi z80f,z80f,#(1<<SFlag)\r
7592 ldrb r0,[cpucontext,#z80if]\r
7593 tst r0,#Z80_IF2\r
7594 orrne z80f,z80f,#(1<<VFlag)\r
7595 fetch 9\r
7596;@IN E,(C)\r
7597opcode_ED_58:\r
7598 opIN_C\r
7599 and z80de,z80de,#0xFF<<24\r
7600 orr z80de,z80de,r0, lsl #16\r
7601 sub r1,opcodes,#0x100\r
7602 ldrb r0,[r1,r0]\r
7603 and z80f,z80f,#1<<CFlag\r
7604 orr z80f,z80f,r0\r
7605 fetch 12\r
7606;@OUT (C),E\r
7607opcode_ED_59:\r
7608 mov r1,z80de, lsr #16\r
7609 and r1,r1,#0xFF\r
7610 opOUT_C\r
7611 fetch 12\r
7612;@ADC HL,DE\r
7613opcode_ED_5A:\r
7614 opADC16 z80de\r
7615;@LD DE,(NN)\r
7616opcode_ED_5B:\r
7617 ldrb r0,[z80pc],#1\r
7618 ldrb r1,[z80pc],#1\r
7619 orr r0,r0,r1, lsl #8\r
7620 readmem16\r
7621 mov z80de,r0, lsl #16\r
7622 fetch 20\r
7623;@IM 2\r
7624opcode_ED_5E:\r
7625 mov r0,#2\r
7626 strb r0,[cpucontext,#z80im]\r
7627 fetch 8\r
7628;@LD A,R\r
7629opcode_ED_5F:\r
7630 ldrb r0,[cpucontext,#z80r]\r
7631 and r0,r0,#0x80\r
7632 rsb r1,z80_icount,#0\r
7633 and r1,r1,#0x7F\r
7634 orr r0,r0,r1\r
7635 movs z80a,r0, lsl #24\r
7636 and z80f,z80f,#1<<CFlag\r
7637 orrmi z80f,z80f,#(1<<SFlag)\r
7638 orreq z80f,z80f,#(1<<ZFlag)\r
7639 ldrb r0,[cpucontext,#z80if]\r
7640 tst r0,#Z80_IF2\r
7641 orrne z80f,z80f,#(1<<VFlag)\r
7642 fetch 9\r
7643;@IN H,(C)\r
7644opcode_ED_60:\r
7645 opIN_C\r
7646 and z80hl,z80hl,#0xFF<<16\r
7647 orr z80hl,z80hl,r0, lsl #24\r
7648 sub r1,opcodes,#0x100\r
7649 ldrb r0,[r1,r0]\r
7650 and z80f,z80f,#1<<CFlag\r
7651 orr z80f,z80f,r0\r
7652 fetch 12\r
7653;@OUT (C),H\r
7654opcode_ED_61:\r
7655 mov r1,z80hl, lsr #24\r
7656 opOUT_C\r
7657 fetch 12\r
7658;@SBC HL,HL\r
7659opcode_ED_62:\r
7660 opSBC16HL\r
7661;@RRD\r
7662opcode_ED_67:\r
7663 readmem8HL\r
7664 mov r1,r0,ror#4\r
7665 orr r0,r1,z80a,lsr#20\r
7666 bic z80a,z80a,#0x0F000000\r
7667 orr z80a,z80a,r1,lsr#4\r
7668 writemem8HL\r
7669 sub r1,opcodes,#0x100\r
7670 ldrb r0,[r1,z80a, lsr #24]\r
7671 and z80f,z80f,#1<<CFlag\r
7672 orr z80f,z80f,r0\r
7673 fetch 18\r
7674;@IN L,(C)\r
7675opcode_ED_68:\r
7676 opIN_C\r
7677 and z80hl,z80hl,#0xFF<<24\r
7678 orr z80hl,z80hl,r0, lsl #16\r
7679 and z80f,z80f,#1<<CFlag\r
7680 sub r1,opcodes,#0x100\r
7681 ldrb r0,[r1,r0]\r
7682 orr z80f,z80f,r0\r
7683 fetch 12\r
7684;@OUT (C),L\r
7685opcode_ED_69:\r
7686 mov r1,z80hl, lsr #16\r
7687 and r1,r1,#0xFF\r
7688 opOUT_C\r
7689 fetch 12\r
7690;@ADC HL,HL\r
7691opcode_ED_6A:\r
7692 opADC16HL\r
7693;@RLD\r
7694opcode_ED_6F:\r
7695 readmem8HL\r
7696 orr r0,r0,z80a,lsl#4\r
7697 mov r0,r0,ror#28\r
7698 and z80a,z80a,#0xF0000000\r
7699 orr z80a,z80a,r0,lsl#16\r
7700 and z80a,z80a,#0xFF000000\r
7701 writemem8HL\r
7702 sub r1,opcodes,#0x100\r
7703 ldrb r0,[r1,z80a, lsr #24]\r
7704 and z80f,z80f,#1<<CFlag\r
7705 orr z80f,z80f,r0\r
7706 fetch 18\r
7707;@IN F,(C)\r
7708opcode_ED_70:\r
7709 opIN_C\r
7710 and z80f,z80f,#1<<CFlag\r
7711 sub r1,opcodes,#0x100\r
7712 ldrb r0,[r1,r0]\r
7713 orr z80f,z80f,r0\r
7714 fetch 12\r
7715;@OUT (C),0\r
7716opcode_ED_71:\r
7717 mov r1,#0\r
7718 opOUT_C\r
7719 fetch 12\r
7720\r
7721;@SBC HL,SP\r
7722opcode_ED_72:\r
7723.if FAST_Z80SP\r
7724 ldr r0,[cpucontext,#z80sp_base]\r
7725 sub r0,z80sp,r0\r
7726 mov r0, r0, lsl #16\r
7727.else\r
7728 mov r0,z80sp,lsl#16\r
7729.endif\r
7730 opSBC16 r0\r
7731;@LD (NN),SP\r
7732opcode_ED_73:\r
7733 ldrb r0,[z80pc],#1\r
7734 ldrb r1,[z80pc],#1\r
7735 orr r1,r0,r1, lsl #8\r
7736.if FAST_Z80SP\r
7737 ldr r0,[cpucontext,#z80sp_base]\r
7738 sub r0,z80sp,r0\r
7739.else\r
7740 mov r0,z80sp\r
7741.endif\r
7742 writemem16\r
7743 fetch 16\r
7744;@IN A,(C)\r
7745opcode_ED_78:\r
7746 opIN_C\r
7747 mov z80a,r0, lsl #24\r
7748 and z80f,z80f,#1<<CFlag\r
7749 sub r1,opcodes,#0x100\r
7750 ldrb r0,[r1,r0]\r
7751 orr z80f,z80f,r0\r
7752 fetch 12\r
7753;@OUT (C),A\r
7754opcode_ED_79:\r
7755 mov r1,z80a, lsr #24\r
7756 opOUT_C\r
7757 fetch 12\r
7758;@ADC HL,SP\r
7759opcode_ED_7A:\r
7760.if FAST_Z80SP\r
7761 ldr r0,[cpucontext,#z80sp_base]\r
7762 sub r0,z80sp,r0\r
7763 mov r0, r0, lsl #16\r
7764.else\r
7765 mov r0,z80sp,lsl#16\r
7766.endif\r
7767 opADC16 r0\r
7768;@LD SP,(NN)\r
7769opcode_ED_7B:\r
7770 ldrb r0,[z80pc],#1\r
7771 ldrb r1,[z80pc],#1\r
7772 orr r0,r0,r1, lsl #8\r
7773 readmem16\r
7774.if FAST_Z80SP\r
7775 rebasesp\r
7776.endif\r
7777 mov z80sp,r0\r
7778 fetch 20\r
7779;@LDI\r
7780opcode_ED_A0:\r
7781 copymem8HL_DE\r
7782 add z80hl,z80hl,#1<<16\r
7783 add z80de,z80de,#1<<16\r
7784 subs z80bc,z80bc,#1<<16\r
7785 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7786 orrne z80f,z80f,#1<<VFlag\r
7787 fetch 16\r
7788;@CPI\r
7789opcode_ED_A1:\r
7790 readmem8HL\r
7791 add z80hl,z80hl,#0x00010000\r
7792 mov r1,z80a,lsl#4\r
7793 cmp z80a,r0,lsl#24\r
7794 and z80f,z80f,#1<<CFlag\r
7795 orr z80f,z80f,#1<<NFlag\r
7796 orrmi z80f,z80f,#1<<SFlag\r
7797 orreq z80f,z80f,#1<<ZFlag\r
7798 cmp r1,r0,lsl#28\r
7799 orrcc z80f,z80f,#1<<HFlag\r
7800 subs z80bc,z80bc,#0x00010000\r
7801 orrne z80f,z80f,#1<<VFlag\r
7802 fetch 16\r
7803;@INI\r
7804opcode_ED_A2:\r
7805 opIN_C\r
7806 and z80f,r0,#0x80\r
7807 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7808;@ mov r1,z80bc,lsl#8\r
7809;@ add r1,r1,#0x01000000\r
7810;@ adds r1,r1,r0,lsl#24\r
7811;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7812 writemem8HL\r
7813 add z80hl,z80hl,#1<<16\r
7814 sub z80bc,z80bc,#1<<24\r
7815 tst z80bc,#0xFF<<24\r
7816 orrmi z80f,z80f,#1<<SFlag\r
7817 orreq z80f,z80f,#1<<ZFlag\r
7818 fetch 16\r
7819\r
7820;@OUTI\r
7821opcode_ED_A3:\r
7822 readmem8HL\r
7823 add z80hl,z80hl,#1<<16\r
7824 and z80f,r0,#0x80\r
7825 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7826 mov r1,z80hl,lsl#8\r
7827 adds r1,r1,r0,lsl#24\r
7828 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL)+L > 0xFF\r
7829 sub z80bc,z80bc,#1<<24\r
7830 tst z80bc,#0xFF<<24\r
7831 orrmi z80f,z80f,#1<<SFlag\r
7832 orreq z80f,z80f,#1<<ZFlag\r
7833 mov r1,r0\r
7834 opOUT_C\r
7835 fetch 16\r
7836\r
7837;@LDD\r
7838opcode_ED_A8:\r
7839 copymem8HL_DE\r
7840 sub z80hl,z80hl,#1<<16\r
7841 sub z80de,z80de,#1<<16\r
7842 subs z80bc,z80bc,#1<<16\r
7843 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7844 orrne z80f,z80f,#1<<VFlag\r
7845 fetch 16\r
7846\r
7847;@CPD\r
7848opcode_ED_A9:\r
7849 readmem8HL\r
7850 sub z80hl,z80hl,#1<<16\r
7851 mov r1,z80a,lsl#4\r
7852 cmp z80a,r0,lsl#24\r
7853 and z80f,z80f,#1<<CFlag\r
7854 orr z80f,z80f,#1<<NFlag\r
7855 orrmi z80f,z80f,#1<<SFlag\r
7856 orreq z80f,z80f,#1<<ZFlag\r
7857 cmp r1,r0,lsl#28\r
7858 orrcc z80f,z80f,#1<<HFlag\r
7859 subs z80bc,z80bc,#0x00010000\r
7860 orrne z80f,z80f,#1<<VFlag\r
7861 fetch 16\r
7862\r
7863;@IND\r
7864opcode_ED_AA:\r
7865 opIN_C\r
7866 and z80f,r0,#0x80\r
7867 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7868;@ mov r1,z80bc,lsl#8\r
7869;@ sub r1,r1,#0x01000000\r
7870;@ adds r1,r1,r0,lsl#24\r
7871;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
7872 writemem8HL\r
7873 sub z80hl,z80hl,#1<<16\r
7874 sub z80bc,z80bc,#1<<24\r
7875 tst z80bc,#0xFF<<24\r
7876 orrmi z80f,z80f,#1<<SFlag\r
7877 orreq z80f,z80f,#1<<ZFlag\r
7878 fetch 16\r
7879\r
7880;@OUTD\r
7881opcode_ED_AB:\r
7882 readmem8HL\r
7883 sub z80hl,z80hl,#1<<16\r
7884 and z80f,r0,#0x80\r
7885 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7886 mov r1,z80hl,lsl#8\r
7887 adds r1,r1,r0,lsl#24\r
7888 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7889 sub z80bc,z80bc,#1<<24\r
7890 tst z80bc,#0xFF<<24\r
7891 orrmi z80f,z80f,#1<<SFlag\r
7892 orreq z80f,z80f,#1<<ZFlag\r
7893 mov r1,r0\r
7894 opOUT_C\r
7895 fetch 16\r
7896;@LDIR\r
7897opcode_ED_B0:\r
7898 copymem8HL_DE\r
7899 add z80hl,z80hl,#1<<16\r
7900 add z80de,z80de,#1<<16\r
7901 subs z80bc,z80bc,#1<<16\r
7902 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7903 orrne z80f,z80f,#1<<VFlag\r
7904 subne z80pc,z80pc,#2\r
7905 subne z80_icount,z80_icount,#5\r
7906 fetch 16\r
7907\r
7908;@CPIR\r
7909opcode_ED_B1:\r
7910 readmem8HL\r
7911 add z80hl,z80hl,#1<<16 \r
7912 mov r1,z80a,lsl#4\r
7913 cmp z80a,r0,lsl#24\r
7914 and z80f,z80f,#1<<CFlag\r
7915 orr z80f,z80f,#1<<NFlag\r
7916 orrmi z80f,z80f,#1<<SFlag\r
7917 orreq z80f,z80f,#1<<ZFlag\r
7918 cmp r1,r0,lsl#28\r
7919 orrcc z80f,z80f,#1<<HFlag\r
7920 subs z80bc,z80bc,#1<<16\r
7921 bne opcode_ED_B1_decpc\r
7922 fetch 16\r
7923opcode_ED_B1_decpc:\r
7924 orr z80f,z80f,#1<<VFlag\r
7925 tst z80f,#1<<ZFlag\r
7926 subeq z80pc,z80pc,#2\r
7927 subeq z80_icount,z80_icount,#5\r
7928 fetch 16\r
7929;@INIR\r
7930opcode_ED_B2:\r
7931 opIN_C\r
7932 and z80f,r0,#0x80\r
7933 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7934;@ mov r1,z80bc,lsl#8\r
7935;@ add r1,r1,#0x01000000\r
7936;@ adds r1,r1,r0,lsl#24\r
7937;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7938 writemem8HL\r
7939 add z80hl,z80hl,#1<<16\r
7940 sub z80bc,z80bc,#1<<24\r
7941 tst z80bc,#0xFF<<24\r
7942 orrmi z80f,z80f,#1<<SFlag\r
7943 orreq z80f,z80f,#1<<ZFlag\r
7944 subne z80pc,z80pc,#2\r
7945 subne z80_icount,z80_icount,#5\r
7946 fetch 16\r
7947;@OTIR\r
7948opcode_ED_B3:\r
7949 readmem8HL\r
7950 add z80hl,z80hl,#1<<16\r
7951 and z80f,r0,#0x80\r
7952 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7953 mov r1,z80hl,lsl#8\r
7954 adds r1,r1,r0,lsl#24\r
7955 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7956 sub z80bc,z80bc,#1<<24\r
7957 tst z80bc,#0xFF<<24\r
7958 orrmi z80f,z80f,#1<<SFlag\r
7959 orreq z80f,z80f,#1<<ZFlag\r
7960 subne z80pc,z80pc,#2\r
7961 subne z80_icount,z80_icount,#5\r
7962 mov r1,r0\r
7963 opOUT_C\r
7964 fetch 16\r
7965;@LDDR\r
7966opcode_ED_B8:\r
7967 copymem8HL_DE\r
7968 sub z80hl,z80hl,#1<<16\r
7969 sub z80de,z80de,#1<<16\r
7970 subs z80bc,z80bc,#1<<16\r
7971 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7972 orrne z80f,z80f,#1<<VFlag\r
7973 subne z80pc,z80pc,#2\r
7974 subne z80_icount,z80_icount,#5\r
7975 fetch 16\r
7976\r
7977;@CPDR\r
7978opcode_ED_B9:\r
7979 readmem8HL\r
7980 sub z80hl,z80hl,#1<<16\r
7981 mov r1,z80a,lsl#4\r
7982 cmp z80a,r0,lsl#24\r
7983 and z80f,z80f,#1<<CFlag\r
7984 orr z80f,z80f,#1<<NFlag\r
7985 orrmi z80f,z80f,#1<<SFlag\r
7986 orreq z80f,z80f,#1<<ZFlag\r
7987 cmp r1,r0,lsl#28\r
7988 orrcc z80f,z80f,#1<<HFlag\r
7989 subs z80bc,z80bc,#1<<16\r
7990 bne opcode_ED_B9_decpc\r
7991 fetch 16\r
7992opcode_ED_B9_decpc:\r
7993 orr z80f,z80f,#1<<VFlag\r
7994 tst z80f,#1<<ZFlag\r
7995 subeq z80pc,z80pc,#2\r
7996 subeq z80_icount,z80_icount,#5\r
7997 fetch 16\r
7998;@INDR\r
7999opcode_ED_BA:\r
8000 opIN_C\r
8001 and z80f,r0,#0x80\r
8002 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8003;@ mov r1,z80bc,lsl#8\r
8004;@ sub r1,r1,#0x01000000\r
8005;@ adds r1,r1,r0,lsl#24\r
8006;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
8007 writemem8HL\r
8008 sub z80hl,z80hl,#1<<16\r
8009 sub z80bc,z80bc,#1<<24\r
8010 tst z80bc,#0xFF<<24\r
8011 orrmi z80f,z80f,#1<<SFlag\r
8012 orreq z80f,z80f,#1<<ZFlag\r
8013 subne z80pc,z80pc,#2\r
8014 subne z80_icount,z80_icount,#5\r
8015 fetch 16\r
8016;@OTDR\r
8017opcode_ED_BB:\r
8018 readmem8HL\r
8019 sub z80hl,z80hl,#1<<16\r
8020 and z80f,r0,#0x80\r
8021 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8022 mov r1,z80hl,lsl#8\r
8023 adds r1,r1,r0,lsl#24\r
8024 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
8025 sub z80bc,z80bc,#1<<24\r
8026 tst z80bc,#0xFF<<24\r
8027 orrmi z80f,z80f,#1<<SFlag\r
8028 orreq z80f,z80f,#1<<ZFlag\r
8029 subne z80pc,z80pc,#2\r
8030 subne z80_icount,z80_icount,#5\r
8031 mov r1,r0\r
8032 opOUT_C\r
8033 fetch 16\r
8034;@##################################\r
8035;@##################################\r
8036;@### opcodes FD #########################\r
8037;@##################################\r
8038;@##################################\r
8039;@Since DD and FD opcodes are all the same apart from the address\r
8040;@register they use. When a FD intruction the program runs the code\r
8041;@from the DD location but the address of the IY reg is passed instead\r
8042;@of IX\r
8043\r
f0243975 8044;@end_loop:\r
8045;@ b end_loop\r
cc68a136 8046\r
8047\r
8048\r
fast MegaDrive/MegaCD/32X emulator