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1.45a Pico win32, code move
[picodrive.git] / cpu / DrZ80 / drz80.s
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cc68a136 1;@ Reesy's Z80 Emulator Version 0.001\r
2\r
3;@ (c) Copyright 2004 Reesy, All rights reserved\r
4;@ DrZ80 is free for non-commercial use.\r
5\r
6;@ For commercial use, separate licencing terms must be obtained.\r
7\r
8 .data\r
9 .align 4\r
10\r
11 .global DrZ80Run\r
12 .global DrZ80Ver\r
13\r
e5f426aa 14 .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
15 .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
16 .equiv UPDATE_CONTEXT, 0\r
17 .equiv DRZ80_FOR_PICODRIVE, 1\r
cc68a136 18\r
19.if INTERRUPT_MODE\r
e5f426aa 20 .extern Interrupt\r
cc68a136 21.endif\r
22\r
23.if DRZ80_FOR_PICODRIVE\r
cc68a136 24 .extern PicoRead8\r
25 .extern Pico\r
26 .extern z80_write\r
b542be46 27 .extern ym2612_st\r
cc68a136 28.endif\r
29\r
30DrZ80Ver: .long 0x0001\r
31\r
32;@ --------------------------- Defines ----------------------------\r
33;@ Make sure that regs/pointers for z80pc to z80sp match up!\r
34\r
35 opcodes .req r3\r
36 z80_icount .req r4\r
37 cpucontext .req r5\r
38 z80pc .req r6\r
39 z80a .req r7\r
40 z80f .req r8\r
41 z80bc .req r9\r
42 z80de .req r10\r
43 z80hl .req r11\r
44 z80sp .req r12 \r
45 z80xx .req lr\r
46\r
47 .equ z80pc_pointer, 0 ;@ 0\r
48 .equ z80a_pointer, z80pc_pointer+4 ;@ 4\r
49 .equ z80f_pointer, z80a_pointer+4 ;@ 8\r
50 .equ z80bc_pointer, z80f_pointer+4 ;@ \r
51 .equ z80de_pointer, z80bc_pointer+4\r
52 .equ z80hl_pointer, z80de_pointer+4\r
53 .equ z80sp_pointer, z80hl_pointer+4\r
54 .equ z80pc_base, z80sp_pointer+4\r
55 .equ z80sp_base, z80pc_base+4\r
56 .equ z80ix, z80sp_base+4\r
57 .equ z80iy, z80ix+4\r
58 .equ z80i, z80iy+4\r
59 .equ z80a2, z80i+4\r
60 .equ z80f2, z80a2+4\r
61 .equ z80bc2, z80f2+4\r
62 .equ z80de2, z80bc2+4\r
63 .equ z80hl2, z80de2+4\r
64 .equ cycles_pointer, z80hl2+4 \r
65 .equ previouspc, cycles_pointer+4 \r
66 .equ z80irq, previouspc+4\r
67 .equ z80if, z80irq+1\r
68 .equ z80im, z80if+1\r
69 .equ z80r, z80im+1\r
70 .equ z80irqvector, z80r+1\r
71 .equ z80irqcallback, z80irqvector+4\r
72 .equ z80_write8, z80irqcallback+4\r
73 .equ z80_write16, z80_write8+4\r
74 .equ z80_in, z80_write16+4\r
75 .equ z80_out, z80_in+4\r
76 .equ z80_read8, z80_out+4\r
77 .equ z80_read16, z80_read8+4\r
78 .equ z80_rebaseSP, z80_read16+4\r
79 .equ z80_rebasePC, z80_rebaseSP+4\r
80\r
81 .equ VFlag, 0\r
82 .equ CFlag, 1\r
83 .equ ZFlag, 2\r
84 .equ SFlag, 3\r
85 .equ HFlag, 4\r
86 .equ NFlag, 5\r
87 .equ Flag3, 6\r
88 .equ Flag5, 7\r
89\r
90 .equ Z80_CFlag, 0\r
91 .equ Z80_NFlag, 1\r
92 .equ Z80_VFlag, 2\r
93 .equ Z80_Flag3, 3\r
94 .equ Z80_HFlag, 4\r
95 .equ Z80_Flag5, 5\r
96 .equ Z80_ZFlag, 6\r
97 .equ Z80_SFlag, 7\r
98\r
99 .equ Z80_IF1, 1<<0\r
100 .equ Z80_IF2, 1<<1\r
101 .equ Z80_HALT, 1<<2\r
102\r
103;@---------------------------------------\r
104\r
105.text\r
106\r
107.if DRZ80_FOR_PICODRIVE\r
cc68a136 108\r
109.macro YM2612Read_and_ret8\r
b542be46 110 ldr r0, =ym2612_st\r
111 ldr r0, [r0]\r
112 ldrb r0, [r0, #0x11] ;@ ym2612_st->status\r
113 bx lr\r
cc68a136 114.endm\r
115\r
116.macro YM2612Read_and_ret16\r
b542be46 117 ldr r0, =ym2612_st\r
118 ldr r0, [r0]\r
119 ldrb r0, [r0, #0x11] ;@ ym2612_st->status\r
cc68a136 120 orr r0,r0,r0,lsl #8\r
b542be46 121 bx lr\r
cc68a136 122.endm\r
123\r
124pico_z80_read8: @ addr\r
125 cmp r0,#0x2000 @ Z80 RAM\r
126 ldrlt r1,[cpucontext,#z80sp_base]\r
127 ldrltb r0,[r1,r0]\r
128 bxlt lr\r
129\r
130 cmp r0,#0x8000 @ 68k bank\r
131 blt 1f\r
132 ldr r2,=(Pico+0x22212)\r
133 ldrh r1,[r2]\r
134 bic r0,r0,#0x3f8000\r
135 orr r0,r0,r1,lsl #15\r
136 ldr r1,[r2,#-0xe] @ ROM size\r
137 cmp r0,r1\r
138 ldrlt r1,[r2,#-0x12] @ ROM\r
139 eorlt r0,r0,#1 @ our ROM is byteswapped\r
140 ldrltb r0,[r1,r0]\r
141 bxlt lr\r
142 stmfd sp!,{r3,r12,lr}\r
143 bl PicoRead8\r
144 ldmfd sp!,{r3,r12,pc}\r
1451:\r
146 mov r1,r0,lsr #13\r
147 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
148 bne 0f\r
149 and r0,r0,#3\r
e5503e2f 150 YM2612Read_and_ret8\r
cc68a136 1510:\r
152 cmp r0,#0x4000\r
153 movge r0,#0xff\r
154 bxge lr\r
155 ldr r1,[cpucontext,#z80sp_base]\r
156 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
157 ldrb r0,[r1,r0]\r
158 bx lr\r
159\r
160pico_z80_read16: @ addr\r
161 cmp r0,#0x2000 @ Z80 RAM\r
162 bge 2f\r
163 ldr r1,[cpucontext,#z80sp_base]\r
164 ldrb r0,[r1,r0]!\r
165 ldrb r1,[r1,#1]\r
166 orr r0,r0,r1,lsl #8\r
167 bx lr\r
168\r
1692:\r
170 cmp r0,#0x8000 @ 68k bank\r
171 blt 1f\r
172 ldr r2,=(Pico+0x22212)\r
173 ldrh r1,[r2]\r
174 bic r0,r0,#0x1f8000\r
175 orr r0,r0,r1,lsl #15\r
176 ldr r1,[r2,#-0xe] @ ROM size\r
177 cmp r0,r1\r
178 ldr r1,[r2,#-0x12] @ ROM\r
179 tst r0,#1\r
180 eor r0,r0,#1\r
181 ldrb r0,[r1,r0]!\r
182 ldreqb r1,[r1,#-1]\r
183 ldrneb r1,[r1,#3] @ this is due to byteswapped ROM\r
184 orr r0,r0,r1,lsl #8\r
185 bx lr\r
1863:\r
187 stmfd sp!,{r3-r5,r12,lr}\r
188 mov r4,r0\r
189 bl PicoRead8\r
190 mov r5,r0\r
191 add r0,r4,#1\r
192 bl PicoRead8\r
193 orr r0,r5,r0,lsl #8\r
b542be46 194 ldmfd sp!,{r3-r5,r12,pc}\r
cc68a136 1951:\r
196 mov r1,r0,lsr #13\r
197 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
198 bne 0f\r
199 and r0,r0,#3\r
b542be46 200 YM2612Read_and_ret16\r
cc68a136 2010:\r
202 cmp r0,#0x4000\r
203 movge r0,#0xff\r
204 bxge lr\r
205 ldr r1,[cpucontext,#z80sp_base]\r
206 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
207 ldrb r0,[r1,r0]!\r
208 ldrb r1,[r1,#1]\r
209 orr r0,r0,r1,lsl #8\r
210 bx lr\r
211\r
212pico_z80_write8: @ data, addr\r
213 cmp r1,#0x4000\r
214 bge 1f\r
215 ldr r2,[cpucontext,#z80sp_base]\r
216 bic r1,r1,#0x0fe000 @ Z80 RAM\r
217 strb r0,[r2,r1]\r
218 bx lr\r
2191:\r
220 stmfd sp!,{r3,r12,lr}\r
221 bl z80_write\r
222 ldmfd sp!,{r3,r12,pc}\r
223\r
224pico_z80_write16: @ data, addr\r
225 cmp r1,#0x4000\r
226 bge 1f\r
227 ldr r2,[cpucontext,#z80sp_base]\r
228 bic r1,r1,#0x0fe000 @ Z80 RAM\r
229 strb r0,[r2,r1]!\r
230 mov r0,r0,lsr #8\r
231 strb r0,[r2,#1]\r
232 bx lr\r
2331:\r
234 stmfd sp!,{r3-r5,r12,lr}\r
235 mov r4,r0\r
236 mov r5,r1\r
237 bl z80_write\r
238 mov r0,r4,lsr #8\r
239 add r1,r5,#1\r
240 bl z80_write\r
241 ldmfd sp!,{r3-r5,r12,pc}\r
242\r
243 .pool\r
244.endif\r
245\r
246.macro fetch cycs\r
247 subs z80_icount,z80_icount,#\cycs\r
248.if UPDATE_CONTEXT\r
249 str z80pc,[cpucontext,#z80pc_pointer]\r
250 str z80_icount,[cpucontext,#cycles_pointer]\r
251 ldr r1,[cpucontext,#z80pc_base]\r
252 sub r2,z80pc,r1\r
253 str r2,[cpucontext,#previouspc]\r
254.endif\r
255 ldrplb r0,[z80pc],#1\r
256 ldrpl pc,[opcodes,r0, lsl #2]\r
257 bmi z80_execute_end\r
258.endm\r
259\r
260.macro eatcycles cycs\r
261 sub z80_icount,z80_icount,#\cycs\r
262.if UPDATE_CONTEXT\r
263 str z80_icount,[cpucontext,#cycles_pointer]\r
264.endif\r
265.endm\r
266\r
267.macro readmem8\r
268.if UPDATE_CONTEXT\r
269 str z80pc,[cpucontext,#z80pc_pointer]\r
270.endif\r
271.if DRZ80_FOR_PICODRIVE\r
272 bl pico_z80_read8\r
273.else\r
274 stmfd sp!,{r3,r12}\r
275 mov lr,pc\r
276 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
277 ldmfd sp!,{r3,r12}\r
278.endif\r
279.endm\r
280\r
281.macro readmem8HL\r
282 mov r0,z80hl, lsr #16\r
283 readmem8\r
284.endm\r
285\r
286.macro readmem16\r
287.if UPDATE_CONTEXT\r
288 str z80pc,[cpucontext,#z80pc_pointer]\r
289.endif\r
290.if DRZ80_FOR_PICODRIVE\r
291 bl pico_z80_read16\r
292.else\r
293 stmfd sp!,{r3,r12}\r
294 mov lr,pc\r
295 ldr pc,[cpucontext,#z80_read16]\r
296 ldmfd sp!,{r3,r12}\r
297.endif\r
298.endm\r
299\r
300.macro writemem8\r
301.if UPDATE_CONTEXT\r
302 str z80pc,[cpucontext,#z80pc_pointer]\r
303.endif\r
304.if DRZ80_FOR_PICODRIVE\r
305 bl pico_z80_write8\r
306.else\r
307 stmfd sp!,{r3,r12}\r
308 mov lr,pc\r
309 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
310 ldmfd sp!,{r3,r12}\r
311.endif\r
312.endm\r
313\r
314.macro writemem8DE\r
315 mov r1,z80de, lsr #16\r
316 writemem8\r
317.endm\r
318\r
319.macro writemem8HL\r
320 mov r1,z80hl, lsr #16\r
321 writemem8\r
322.endm\r
323\r
324.macro writemem16\r
325.if UPDATE_CONTEXT\r
326 str z80pc,[cpucontext,#z80pc_pointer]\r
327.endif\r
328.if DRZ80_FOR_PICODRIVE\r
329 bl pico_z80_write16\r
330.else\r
331 stmfd sp!,{r3,r12}\r
332 mov lr,pc\r
333 ldr pc,[cpucontext,#z80_write16] ;@ r0=data r1=addr\r
334 ldmfd sp!,{r3,r12}\r
335.endif\r
336.endm\r
337\r
338.macro copymem8HL_DE\r
339.if UPDATE_CONTEXT\r
340 str z80pc,[cpucontext,#z80pc_pointer]\r
341.endif\r
342 mov r0,z80hl, lsr #16\r
343.if DRZ80_FOR_PICODRIVE\r
344 bl pico_z80_read8\r
345.else\r
346 stmfd sp!,{r3,r12}\r
347 mov lr,pc\r
348 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
349.endif\r
350.if UPDATE_CONTEXT\r
351 str z80pc,[cpucontext,#z80pc_pointer]\r
352.endif\r
353 mov r1,z80de, lsr #16\r
354.if DRZ80_FOR_PICODRIVE\r
355 bl pico_z80_write8\r
356.else\r
357 mov lr,pc\r
358 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
359 ldmfd sp!,{r3,r12}\r
360.endif\r
361.endm\r
362;@---------------------------------------\r
363\r
364.macro rebasepc\r
365.if UPDATE_CONTEXT\r
366 str z80pc,[cpucontext,#z80pc_pointer]\r
367.endif\r
368.if DRZ80_FOR_PICODRIVE\r
369 bic r0,r0,#0xfe000\r
370 ldr r1,[cpucontext,#z80pc_base]\r
371 add z80pc,r1,r0\r
372.else\r
373 stmfd sp!,{r3,r12}\r
374 mov lr,pc\r
375 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
376 ldmfd sp!,{r3,r12}\r
377 mov z80pc,r0\r
378.endif\r
379.endm\r
380\r
381.macro rebasesp\r
382.if UPDATE_CONTEXT\r
383 str z80pc,[cpucontext,#z80pc_pointer]\r
384.endif\r
385.if DRZ80_FOR_PICODRIVE\r
386 bic r0,r0,#0xfe000\r
387 ldr r1,[cpucontext,#z80sp_base]\r
388 add r0,r1,r0\r
389.else\r
390 stmfd sp!,{r3,r12}\r
391 mov lr,pc\r
392 ldr pc,[cpucontext,#z80_rebaseSP] ;@ external function must rebase sp\r
393 ldmfd sp!,{r3,r12}\r
394.endif\r
395.endm\r
396;@----------------------------------------------------------------------------\r
397\r
398.macro opADC\r
399 movs z80f,z80f,lsr#2 ;@ get C\r
400 subcs r0,r0,#0x100\r
401 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of half carry\r
402 adcs z80a,z80a,r0,ror#8\r
403 mrs r0,cpsr ;@ S,Z,V&C\r
404 eor z80f,z80f,z80a,lsr#24\r
405 and z80f,z80f,#1<<HFlag ;@ H, correct\r
406 orr z80f,z80f,r0,lsr#28\r
407.endm\r
408\r
409.macro opADCA\r
410 movs z80f,z80f,lsr#2 ;@ get C\r
411 orrcs z80a,z80a,#0x00800000\r
412 adds z80a,z80a,z80a\r
413 mrs z80f,cpsr ;@ S,Z,V&C\r
414 mov z80f,z80f,lsr#28\r
415 tst z80a,#0x10000000 ;@ H, correct\r
416 orrne z80f,z80f,#1<<HFlag\r
417 fetch 4\r
418.endm\r
419\r
420.macro opADCH reg\r
421 mov r0,\reg,lsr#24\r
422 opADC\r
423 fetch 4\r
424.endm\r
425\r
426.macro opADCL reg\r
427 movs z80f,z80f,lsr#2 ;@ get C\r
428 adc r0,\reg,\reg,lsr#15\r
429 orrcs z80a,z80a,#0x00800000\r
430 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
431 adds z80a,z80a,r0,lsl#23\r
432 mrs z80f,cpsr ;@ S,Z,V&C\r
433 mov z80f,z80f,lsr#28\r
434 cmn r1,r0,lsl#27\r
435 orrcs z80f,z80f,#1<<HFlag ;@ H, correct\r
436 fetch 4\r
437.endm\r
438\r
439.macro opADCb\r
440 opADC\r
441.endm\r
442;@---------------------------------------\r
443\r
444.macro opADD reg shift\r
445 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
446 adds z80a,z80a,\reg,lsl#\shift\r
447 mrs z80f,cpsr ;@ S,Z,V&C\r
448 mov z80f,z80f,lsr#28\r
449 cmn r1,\reg,lsl#\shift+4\r
450 orrcs z80f,z80f,#1<<HFlag\r
451.endm\r
452\r
453.macro opADDA\r
454 adds z80a,z80a,z80a\r
455 mrs z80f,cpsr ;@ S,Z,V&C\r
456 mov z80f,z80f,lsr#28\r
457 tst z80a,#0x10000000 ;@ H, correct\r
458 orrne z80f,z80f,#1<<HFlag\r
459 fetch 4\r
460.endm\r
461\r
462.macro opADDH reg\r
463 and r0,\reg,#0xFF000000\r
464 opADD r0 0\r
465 fetch 4\r
466.endm\r
467\r
468.macro opADDL reg\r
469 opADD \reg 8\r
470 fetch 4\r
471.endm\r
472\r
473.macro opADDb \r
474 opADD r0 24\r
475.endm\r
476;@---------------------------------------\r
477\r
478.macro opADC16 reg\r
479 movs z80f,z80f,lsr#2 ;@ get C\r
480 adc r0,z80a,\reg,lsr#15\r
481 orrcs z80hl,z80hl,#0x00008000\r
482 mov r1,z80hl,lsl#4\r
483 adds z80hl,z80hl,r0,lsl#15\r
484 mrs z80f,cpsr ;@ S, Z, V & C\r
485 mov z80f,z80f,lsr#28\r
486 cmn r1,r0,lsl#19\r
487 orrcs z80f,z80f,#1<<HFlag\r
488 fetch 15\r
489.endm\r
490\r
491.macro opADC16HL\r
492 movs z80f,z80f,lsr#2 ;@ get C\r
493 orrcs z80hl,z80hl,#0x00008000\r
494 adds z80hl,z80hl,z80hl\r
495 mrs z80f,cpsr ;@ S, Z, V & C\r
496 mov z80f,z80f,lsr#28\r
497 tst z80hl,#0x10000000 ;@ H, correct.\r
498 orrne z80f,z80f,#1<<HFlag\r
499 fetch 15\r
500.endm\r
501\r
502.macro opADD16 reg1 reg2\r
503 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
504 adds \reg1,\reg1,\reg2\r
505 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
506 orrcs z80f,z80f,#1<<CFlag\r
507 cmn r1,\reg2,lsl#4\r
508 orrcs z80f,z80f,#1<<HFlag\r
509.endm\r
510\r
511.macro opADD16s reg1 reg2 shift\r
512 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
513 adds \reg1,\reg1,\reg2,lsl#\shift\r
514 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
515 orrcs z80f,z80f,#1<<CFlag\r
516 cmn r1,\reg2,lsl#4+\shift\r
517 orrcs z80f,z80f,#1<<HFlag\r
518.endm\r
519\r
520.macro opADD16_2 reg\r
521 adds \reg,\reg,\reg\r
522 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
523 orrcs z80f,z80f,#1<<CFlag\r
524 tst \reg,#0x10000000 ;@ H, correct.\r
525 orrne z80f,z80f,#1<<HFlag\r
526.endm\r
527;@---------------------------------------\r
528\r
529.macro opAND reg shift\r
530 and z80a,z80a,\reg,lsl#\shift\r
531 sub r0,opcodes,#0x100\r
532 ldrb z80f,[r0,z80a, lsr #24]\r
533 orr z80f,z80f,#1<<HFlag\r
534.endm\r
535\r
536.macro opANDA\r
537 sub r0,opcodes,#0x100\r
538 ldrb z80f,[r0,z80a, lsr #24]\r
539 orr z80f,z80f,#1<<HFlag\r
540 fetch 4\r
541.endm\r
542\r
543.macro opANDH reg\r
544 opAND \reg 0\r
545 fetch 4\r
546.endm\r
547\r
548.macro opANDL reg\r
549 opAND \reg 8\r
550 fetch 4\r
551.endm\r
552\r
553.macro opANDb\r
554 opAND r0 24\r
555.endm\r
556;@---------------------------------------\r
557\r
558.macro opBITH reg bit\r
559 and z80f,z80f,#1<<CFlag\r
560 tst \reg,#1<<(24+\bit)\r
561 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
562 orrne z80f,z80f,#(1<<HFlag)\r
563 fetch 8\r
564.endm\r
565\r
566.macro opBIT7H reg\r
567 and z80f,z80f,#1<<CFlag\r
568 tst \reg,#1<<(24+7)\r
569 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
570 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
571 fetch 8\r
572.endm\r
573\r
574.macro opBITL reg bit\r
575 and z80f,z80f,#1<<CFlag\r
576 tst \reg,#1<<(16+\bit)\r
577 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
578 orrne z80f,z80f,#(1<<HFlag)\r
579 fetch 8\r
580.endm\r
581\r
582.macro opBIT7L reg\r
583 and z80f,z80f,#1<<CFlag\r
584 tst \reg,#1<<(16+7)\r
585 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
586 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
587 fetch 8\r
588.endm\r
589\r
590.macro opBITb bit\r
591 and z80f,z80f,#1<<CFlag\r
592 tst r0,#1<<\bit\r
593 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
594 orrne z80f,z80f,#(1<<HFlag)\r
595.endm\r
596\r
597.macro opBIT7b\r
598 and z80f,z80f,#1<<CFlag\r
599 tst r0,#1<<7\r
600 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
601 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
602.endm\r
603;@---------------------------------------\r
604\r
605.macro opCP reg shift\r
606 mov r1,z80a,lsl#4 ;@ prepare for check of half carry\r
607 cmp z80a,\reg,lsl#\shift\r
608 mrs z80f,cpsr\r
609 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
610 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
611 cmp r1,\reg,lsl#\shift+4\r
612 orrcc z80f,z80f,#1<<HFlag\r
613.endm\r
614\r
615.macro opCPA\r
616 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
617 fetch 4\r
618.endm\r
619\r
620.macro opCPH reg\r
621 and r0,\reg,#0xFF000000\r
622 opCP r0 0\r
623 fetch 4\r
624.endm\r
625\r
626.macro opCPL reg\r
627 opCP \reg 8\r
628 fetch 4\r
629.endm\r
630\r
631.macro opCPb\r
632 opCP r0 24\r
633.endm\r
634;@---------------------------------------\r
635\r
636.macro opDEC8 reg ;@for A and memory\r
637 and z80f,z80f,#1<<CFlag ;@save carry\r
638 orr z80f,z80f,#1<<NFlag ;@set n\r
639 tst \reg,#0x0f000000\r
640 orreq z80f,z80f,#1<<HFlag\r
641 subs \reg,\reg,#0x01000000\r
642 orrmi z80f,z80f,#1<<SFlag\r
643 orrvs z80f,z80f,#1<<VFlag\r
644 orreq z80f,z80f,#1<<ZFlag\r
645.endm\r
646\r
647.macro opDEC8H reg ;@for B, D & H\r
648 and z80f,z80f,#1<<CFlag ;@save carry\r
649 orr z80f,z80f,#1<<NFlag ;@set n\r
650 tst \reg,#0x0f000000\r
651 orreq z80f,z80f,#1<<HFlag\r
652 subs \reg,\reg,#0x01000000\r
653 orrmi z80f,z80f,#1<<SFlag\r
654 orrvs z80f,z80f,#1<<VFlag\r
655 tst \reg,#0xff000000 ;@Z\r
656 orreq z80f,z80f,#1<<ZFlag\r
657.endm\r
658\r
659.macro opDEC8L reg ;@for C, E & L\r
660 mov \reg,\reg,ror#24\r
661 opDEC8H \reg\r
662 mov \reg,\reg,ror#8\r
663.endm\r
664\r
665.macro opDEC8b ;@for memory\r
666 mov r0,r0,lsl#24\r
667 opDEC8 r0\r
668 mov r0,r0,lsr#24\r
669.endm\r
670;@---------------------------------------\r
671\r
672.macro opIN\r
673 stmfd sp!,{r3,r12}\r
674 mov lr,pc\r
675 ldr pc,[cpucontext,#z80_in] ;@ r0=port - data returned in r0\r
676 ldmfd sp!,{r3,r12}\r
677.endm\r
678\r
679.macro opIN_C\r
680 mov r0,z80bc, lsr #16\r
681 opIN\r
682.endm\r
683;@---------------------------------------\r
684\r
685.macro opINC8 reg ;@for A and memory\r
686 and z80f,z80f,#1<<CFlag ;@save carry, clear n\r
687 adds \reg,\reg,#0x01000000\r
688 orrmi z80f,z80f,#1<<SFlag\r
689 orrvs z80f,z80f,#1<<VFlag\r
690 orrcs z80f,z80f,#1<<ZFlag ;@cs when going from 0xFF to 0x00\r
691 tst \reg,#0x0f000000\r
692 orreq z80f,z80f,#1<<HFlag\r
693.endm\r
694\r
695.macro opINC8H reg ;@for B, D & H\r
696 opINC8 \reg\r
697.endm\r
698\r
699.macro opINC8L reg ;@for C, E & L\r
700 mov \reg,\reg,ror#24\r
701 opINC8 \reg\r
702 mov \reg,\reg,ror#8\r
703.endm\r
704\r
705.macro opINC8b ;@for memory\r
706 mov r0,r0,lsl#24\r
707 opINC8 r0\r
708 mov r0,r0,lsr#24\r
709.endm\r
710;@---------------------------------------\r
711\r
712.macro opOR reg shift\r
713 orr z80a,z80a,\reg,lsl#\shift\r
714 sub r0,opcodes,#0x100\r
715 ldrb z80f,[r0,z80a, lsr #24]\r
716.endm\r
717\r
718.macro opORA\r
719 sub r0,opcodes,#0x100\r
720 ldrb z80f,[r0,z80a, lsr #24]\r
721 fetch 4\r
722.endm\r
723\r
724.macro opORH reg\r
725 and r0,\reg,#0xFF000000\r
726 opOR r0 0\r
727 fetch 4\r
728.endm\r
729\r
730.macro opORL reg\r
731 opOR \reg 8\r
732 fetch 4\r
733.endm\r
734\r
735.macro opORb\r
736 opOR r0 24\r
737.endm\r
738;@---------------------------------------\r
739\r
740.macro opOUT\r
741 stmfd sp!,{r3,r12}\r
742 mov lr,pc\r
743 ldr pc,[cpucontext,#z80_out] ;@ r0=port r1=data\r
744 ldmfd sp!,{r3,r12}\r
745.endm\r
746\r
747.macro opOUT_C\r
748 mov r0,z80bc, lsr #16\r
749 opOUT\r
750.endm\r
751;@---------------------------------------\r
752\r
753.macro opPOP\r
754.if FAST_Z80SP\r
755.if DRZ80_FOR_PICODRIVE\r
756 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
757 ldr r2,[cpucontext,#z80sp_base]\r
758 ldrb r0,[z80sp],#1\r
759 add r2,r2,#0x2000\r
760 cmp z80sp,r2\r
761@ subge z80sp,z80sp,#0x2000 @ unstable?\r
762 ldrb r1,[z80sp],#1\r
763 cmp z80sp,r2\r
764@ subge z80sp,z80sp,#0x2000\r
765 orr r0,r0,r1, lsl #8\r
766.else\r
767 ldrb r0,[z80sp],#1\r
768 ldrb r1,[z80sp],#1\r
769 orr r0,r0,r1, lsl #8\r
770.endif\r
771.else\r
772 mov r0,z80sp\r
773 readmem16\r
774 add z80sp,z80sp,#2\r
775.endif\r
776.endm\r
777\r
778.macro opPOPreg reg\r
779 opPOP\r
780 mov \reg,r0, lsl #16\r
781 fetch 10\r
782.endm\r
783;@---------------------------------------\r
784\r
785.macro opPUSHareg reg @ reg > r1\r
786.if FAST_Z80SP\r
787.if DRZ80_FOR_PICODRIVE\r
788 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
789 ldr r0,[cpucontext,#z80sp_base]\r
790 cmp z80sp,r0\r
791 addle z80sp,z80sp,#0x2000\r
792 mov r1,\reg, lsr #8\r
793 strb r1,[z80sp,#-1]!\r
794 cmp z80sp,r0\r
795 addle z80sp,z80sp,#0x2000\r
796 strb \reg,[z80sp,#-1]!\r
797.else\r
798 mov r1,\reg, lsr #8\r
799 strb r1,[z80sp,#-1]!\r
800 strb \reg,[z80sp,#-1]!\r
801.endif\r
802.else\r
803 mov r0,\reg\r
804 sub z80sp,z80sp,#2\r
805 mov r1,z80sp\r
806 writemem16\r
807.endif\r
808.endm\r
809\r
810.macro opPUSHreg reg\r
811.if FAST_Z80SP\r
812.if DRZ80_FOR_PICODRIVE\r
813 ldr r0,[cpucontext,#z80sp_base]\r
814 cmp z80sp,r0\r
815 addle z80sp,z80sp,#0x2000\r
816 mov r1,\reg, lsr #24\r
817 strb r1,[z80sp,#-1]!\r
818 cmp z80sp,r0\r
819 addle z80sp,z80sp,#0x2000\r
820 mov r1,\reg, lsr #16\r
821 strb r1,[z80sp,#-1]!\r
822.else\r
823 mov r1,\reg, lsr #24\r
824 strb r1,[z80sp,#-1]!\r
825 mov r1,\reg, lsr #16\r
826 strb r1,[z80sp,#-1]!\r
827.endif\r
828.else\r
829 mov r0,\reg,lsr #16\r
830 sub z80sp,z80sp,#2\r
831 mov r1,z80sp\r
832 writemem16\r
833.endif\r
834.endm\r
835;@---------------------------------------\r
836\r
837.macro opRESmemHL bit\r
838.if DRZ80_FOR_PICODRIVE\r
839 mov r0,z80hl, lsr #16\r
840 bl pico_z80_read8\r
841 bic r0,r0,#1<<\bit\r
842 mov r1,z80hl, lsr #16\r
843 bl pico_z80_write8\r
844.else\r
845 mov r0,z80hl, lsr #16\r
846 stmfd sp!,{r3,r12}\r
847 mov lr,pc\r
848 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
849 bic r0,r0,#1<<\bit\r
850 mov r1,z80hl, lsr #16\r
851 mov lr,pc\r
852 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
853 ldmfd sp!,{r3,r12}\r
854.endif\r
855 fetch 15\r
856.endm\r
857;@---------------------------------------\r
858\r
859.macro opRESmem bit\r
860.if DRZ80_FOR_PICODRIVE\r
861 stmfd sp!,{r0} ;@ save addr as well\r
862 bl pico_z80_read8\r
863 bic r0,r0,#1<<\bit\r
864 ldmfd sp!,{r1} ;@ restore addr into r1\r
865 bl pico_z80_write8\r
866.else\r
867 stmfd sp!,{r3,r12}\r
868 stmfd sp!,{r0} ;@ save addr as well\r
869 mov lr,pc\r
870 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
871 bic r0,r0,#1<<\bit\r
872 ldmfd sp!,{r1} ;@ restore addr into r1\r
873 mov lr,pc\r
874 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
875 ldmfd sp!,{r3,r12}\r
876.endif\r
877 fetch 23\r
878.endm\r
879;@---------------------------------------\r
880\r
881.macro opRL reg1 reg2 shift\r
882 movs \reg1,\reg2,lsl \shift\r
883 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
884 orrne \reg1,\reg1,#0x01000000\r
885;@ and r2,z80f,#1<<CFlag\r
886;@ orr $x,$x,r2,lsl#23\r
887 sub r1,opcodes,#0x100\r
888 ldrb z80f,[r1,\reg1,lsr#24] ;@get PZS\r
889 orrcs z80f,z80f,#1<<CFlag\r
890.endm\r
891\r
892.macro opRLA\r
893 opRL z80a, z80a, #1\r
894 fetch 8\r
895.endm\r
896\r
897.macro opRLH reg\r
898 and r0,\reg,#0xFF000000 ;@mask high to r0\r
899 adds \reg,\reg,r0\r
900 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
901 orrne \reg,\reg,#0x01000000\r
902 sub r1,opcodes,#0x100\r
903 ldrb z80f,[r1,\reg,lsr#24] ;@get PZS\r
904 orrcs z80f,z80f,#1<<CFlag\r
905 fetch 8\r
906.endm\r
907\r
908.macro opRLL reg\r
909 opRL r0, \reg, #9\r
910 and \reg,\reg,#0xFF000000 ;@mask out high\r
911 orr \reg,\reg,r0,lsr#8\r
912 fetch 8\r
913.endm\r
914\r
915.macro opRLb\r
916 opRL r0, r0, #25\r
917 mov r0,r0,lsr#24\r
918.endm\r
919;@---------------------------------------\r
920\r
921.macro opRLC reg1 reg2 shift\r
922 movs \reg1,\reg2,lsl#\shift\r
923 orrcs \reg1,\reg1,#0x01000000\r
924 sub r1,opcodes,#0x100\r
925 ldrb z80f,[r1,\reg1,lsr#24]\r
926 orrcs z80f,z80f,#1<<CFlag\r
927.endm\r
928\r
929.macro opRLCA\r
930 opRLC z80a, z80a, 1\r
931 fetch 8\r
932.endm\r
933\r
934.macro opRLCH reg\r
935 and r0,\reg,#0xFF000000 ;@mask high to r0\r
936 adds \reg,\reg,r0\r
937 orrcs \reg,\reg,#0x01000000\r
938 sub r1,opcodes,#0x100\r
939 ldrb z80f,[r1,\reg,lsr#24]\r
940 orrcs z80f,z80f,#1<<CFlag\r
941 fetch 8\r
942.endm\r
943\r
944.macro opRLCL reg\r
945 opRLC r0, \reg, 9\r
946 and \reg,\reg,#0xFF000000 ;@mask out high\r
947 orr \reg,\reg,r0,lsr#8\r
948 fetch 8\r
949.endm\r
950\r
951.macro opRLCb\r
952 opRLC r0, r0, 25\r
953 mov r0,r0,lsr#24\r
954.endm\r
955;@---------------------------------------\r
956\r
957.macro opRR reg1 reg2 shift\r
958 movs \reg1,\reg2,lsr#\shift\r
959 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
960 orrne \reg1,\reg1,#0x00000080\r
961;@ and r2,z80_f,#PSR_C\r
962;@ orr \reg1,\reg1,r2,lsl#6\r
963 sub r1,opcodes,#0x100\r
964 ldrb z80f,[r1,\reg1]\r
965 orrcs z80f,z80f,#1<<CFlag\r
966.endm\r
967\r
968.macro opRRA\r
969 orr z80a,z80a,z80f,lsr#1 ;@get C\r
970 movs z80a,z80a,ror#25\r
971 mov z80a,z80a,lsl#24\r
972 sub r1,opcodes,#0x100\r
973 ldrb z80f,[r1,z80a,lsr#24]\r
974 orrcs z80f,z80f,#1<<CFlag\r
975 fetch 8\r
976.endm\r
977\r
978.macro opRRH reg\r
979 orr r0,\reg,z80f,lsr#1 ;@get C\r
980 movs r0,r0,ror#25\r
981 and \reg,\reg,#0x00FF0000 ;@mask out low\r
982 orr \reg,\reg,r0,lsl#24\r
983 sub r1,opcodes,#0x100\r
984 ldrb z80f,[r1,\reg,lsr#24]\r
985 orrcs z80f,z80f,#1<<CFlag\r
986 fetch 8\r
987.endm\r
988\r
989.macro opRRL reg\r
990 and r0,\reg,#0x00FF0000 ;@mask out low to r0\r
991 opRR r0 r0 17\r
992 and \reg,\reg,#0xFF000000 ;@mask out high\r
993 orr \reg,\reg,r0,lsl#16\r
994 fetch 8\r
995.endm\r
996\r
997.macro opRRb\r
998 opRR r0 r0 1\r
999.endm\r
1000;@---------------------------------------\r
1001\r
1002.macro opRRC reg1 reg2 shift\r
1003 movs \reg1,\reg2,lsr#\shift\r
1004 orrcs \reg1,\reg1,#0x00000080\r
1005 sub r1,opcodes,#0x100\r
1006 ldrb z80f,[r1,\reg1]\r
1007 orrcs z80f,z80f,#1<<CFlag\r
1008.endm\r
1009\r
1010.macro opRRCA\r
1011 opRRC z80a, z80a, 25\r
1012 mov z80a,z80a,lsl#24\r
1013 fetch 8\r
1014.endm\r
1015\r
1016.macro opRRCH reg\r
1017 opRRC r0, \reg, 25\r
1018 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1019 orr \reg,\reg,r0,lsl#24\r
1020 fetch 8\r
1021.endm\r
1022\r
1023.macro opRRCL reg\r
1024 and r0,\reg,#0x00FF0000 ;@mask low to r0\r
1025 opRRC r0, r0, 17\r
1026 and \reg,\reg,#0xFF000000 ;@mask out high\r
1027 orr \reg,\reg,r0,lsl#16\r
1028 fetch 8\r
1029.endm\r
1030\r
1031.macro opRRCb\r
1032 opRRC r0, r0, 1\r
1033.endm\r
1034;@---------------------------------------\r
1035\r
1036.macro opRST addr\r
1037 ldr r0,[cpucontext,#z80pc_base]\r
1038 sub r2,z80pc,r0\r
1039 opPUSHareg r2\r
1040 mov r0,#\addr\r
1041 rebasepc\r
1042 fetch 11\r
1043.endm\r
1044;@---------------------------------------\r
1045\r
1046.macro opSBC\r
1047 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1048 movs z80f,z80f,lsr#2 ;@ get C\r
1049 subcc r0,r0,#0x100\r
1050 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of H\r
1051 sbcs z80a,z80a,r0,ror#8\r
1052 mrs r0,cpsr\r
1053 eor z80f,z80f,z80a,lsr#24\r
1054 and z80f,z80f,#1<<HFlag ;@ H, correct\r
1055 orr z80f,z80f,r0,lsr#28 ;@ S,Z,V&C\r
1056 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1057.endm\r
1058\r
1059.macro opSBCA\r
1060 movs z80f,z80f,lsr#2 ;@ get C\r
1061 movcc z80a,#0x00000000\r
1062 movcs z80a,#0xFF000000\r
1063 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1064 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1065 fetch 4\r
1066.endm\r
1067\r
1068.macro opSBCH reg\r
1069 mov r0,\reg,lsr#24\r
1070 opSBC\r
1071 fetch 4\r
1072.endm\r
1073\r
1074.macro opSBCL reg\r
1075 mov r0,\reg,lsl#8\r
1076 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1077 movs z80f,z80f,lsr#2 ;@ get C\r
1078 sbccc r0,r0,#0xFF000000\r
1079 mov r1,z80a,lsl#4 ;@ prepare for check of H\r
1080 sbcs z80a,z80a,r0\r
1081 mrs z80f,cpsr\r
1082 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1083 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1084 cmp r1,r0,lsl#4\r
1085 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1086 fetch 4\r
1087.endm\r
1088\r
1089.macro opSBCb\r
1090 opSBC\r
1091.endm\r
1092;@---------------------------------------\r
1093\r
1094.macro opSBC16 reg\r
1095 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1096 movs z80f,z80f,lsr#2 ;@ get C\r
1097 sbc r1,r1,r1 ;@ set r1 to -1 or 0.\r
1098 orr r0,\reg,r1,lsr#16\r
1099 mov r1,z80hl,lsl#4 ;@ prepare for check of H\r
1100 sbcs z80hl,z80hl,r0\r
1101 mrs z80f,cpsr\r
1102 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1103 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1104 cmp r1,r0,lsl#4\r
1105 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1106 fetch 15\r
1107.endm\r
1108\r
1109.macro opSBC16HL\r
1110 movs z80f,z80f,lsr#2 ;@ get C\r
1111 mov z80hl,#0x00000000\r
1112 subcs z80hl,z80hl,#0x00010000\r
1113 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1114 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1115 fetch 15\r
1116.endm\r
1117;@---------------------------------------\r
1118\r
1119.macro opSETmemHL bit\r
1120.if DRZ80_FOR_PICODRIVE\r
1121 mov r0,z80hl, lsr #16\r
1122 bl pico_z80_read8\r
1123 orr r0,r0,#1<<\bit\r
1124 mov r1,z80hl, lsr #16\r
1125 bl pico_z80_write8\r
1126.else\r
1127 mov r0,z80hl, lsr #16\r
1128 stmfd sp!,{r3,r12}\r
1129 mov lr,pc\r
1130 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
1131 orr r0,r0,#1<<\bit\r
1132 mov r1,z80hl, lsr #16\r
1133 mov lr,pc\r
1134 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1135 ldmfd sp!,{r3,r12}\r
1136.endif\r
1137 fetch 15\r
1138.endm\r
1139;@---------------------------------------\r
1140\r
1141.macro opSETmem bit\r
1142.if DRZ80_FOR_PICODRIVE\r
1143 stmfd sp!,{r0} ;@ save addr as well\r
1144 bl pico_z80_read8\r
1145 orr r0,r0,#1<<\bit\r
1146 ldmfd sp!,{r1} ;@ restore addr into r1\r
1147 bl pico_z80_write8\r
1148.else\r
1149 stmfd sp!,{r3,r12}\r
1150 stmfd sp!,{r0} ;@ save addr as well\r
1151 mov lr,pc\r
1152 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
1153 orr r0,r0,#1<<\bit\r
1154 ldmfd sp!,{r1} ;@ restore addr into r1\r
1155 mov lr,pc\r
1156 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1157 ldmfd sp!,{r3,r12}\r
1158.endif\r
1159 fetch 23\r
1160.endm\r
1161;@---------------------------------------\r
1162\r
1163.macro opSLA reg1 reg2 shift\r
1164 movs \reg1,\reg2,lsl#\shift\r
1165 sub r1,opcodes,#0x100\r
1166 ldrb z80f,[r1,\reg1,lsr#24]\r
1167 orrcs z80f,z80f,#1<<CFlag\r
1168.endm\r
1169\r
1170.macro opSLAA\r
1171 opSLA z80a, z80a, 1\r
1172 fetch 8\r
1173.endm\r
1174\r
1175.macro opSLAH reg\r
1176 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1177 adds \reg,\reg,r0\r
1178 sub r1,opcodes,#0x100\r
1179 ldrb z80f,[r1,\reg,lsr#24]\r
1180 orrcs z80f,z80f,#1<<CFlag\r
1181 fetch 8\r
1182.endm\r
1183\r
1184.macro opSLAL reg\r
1185 opSLA r0, \reg, 9\r
1186 and \reg,\reg,#0xFF000000 ;@mask out high\r
1187 orr \reg,\reg,r0,lsr#8\r
1188 fetch 8\r
1189.endm\r
1190\r
1191.macro opSLAb\r
1192 opSLA r0, r0, 25\r
1193 mov r0,r0,lsr#24\r
1194.endm\r
1195;@---------------------------------------\r
1196\r
1197.macro opSLL reg1 reg2 shift\r
1198 movs \reg1,\reg2,lsl#\shift\r
1199 orr \reg1,\reg1,#0x01000000\r
1200 sub r1,opcodes,#0x100\r
1201 ldrb z80f,[r1,\reg1,lsr#24]\r
1202 orrcs z80f,z80f,#1<<CFlag\r
1203.endm\r
1204\r
1205.macro opSLLA\r
1206 opSLL z80a, z80a, 1\r
1207 fetch 8\r
1208.endm\r
1209\r
1210.macro opSLLH reg\r
1211 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1212 adds \reg,\reg,r0\r
1213 orr \reg,\reg,#0x01000000\r
1214 sub r1,opcodes,#0x100\r
1215 ldrb z80f,[r1,\reg,lsr#24]\r
1216 orrcs z80f,z80f,#1<<CFlag\r
1217 fetch 8\r
1218.endm\r
1219\r
1220.macro opSLLL reg\r
1221 opSLL r0, \reg, 9\r
1222 and \reg,\reg,#0xFF000000 ;@mask out high\r
1223 orr \reg,\reg,r0,lsr#8\r
1224 fetch 8\r
1225.endm\r
1226\r
1227.macro opSLLb\r
1228 opSLL r0, r0, 25\r
1229 mov r0,r0,lsr#24\r
1230.endm\r
1231;@---------------------------------------\r
1232\r
1233.macro opSRA reg1 reg2\r
1234 movs \reg1,\reg2,asr#25\r
1235 and \reg1,\reg1,#0xFF\r
1236 sub r1,opcodes,#0x100\r
1237 ldrb z80f,[r1,\reg1]\r
1238 orrcs z80f,z80f,#1<<CFlag\r
1239.endm\r
1240\r
1241.macro opSRAA\r
1242 movs r0,z80a,asr#25\r
1243 mov z80a,r0,lsl#24\r
1244 sub r1,opcodes,#0x100\r
1245 ldrb z80f,[r1,z80a,lsr#24]\r
1246 orrcs z80f,z80f,#1<<CFlag\r
1247 fetch 8\r
1248.endm\r
1249\r
1250.macro opSRAH reg\r
1251 movs r0,\reg,asr#25\r
1252 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1253 orr \reg,\reg,r0,lsl#24\r
1254 sub r1,opcodes,#0x100\r
1255 ldrb z80f,[r1,\reg,lsr#24]\r
1256 orrcs z80f,z80f,#1<<CFlag\r
1257 fetch 8\r
1258.endm\r
1259\r
1260.macro opSRAL reg\r
1261 mov r0,\reg,lsl#8\r
1262 opSRA r0, r0\r
1263 and \reg,\reg,#0xFF000000 ;@mask out high\r
1264 orr \reg,\reg,r0,lsl#16\r
1265 fetch 8\r
1266.endm\r
1267\r
1268.macro opSRAb\r
1269 mov r0,r0,lsl#24\r
1270 opSRA r0, r0\r
1271.endm\r
1272;@---------------------------------------\r
1273\r
1274.macro opSRL reg1 reg2 shift\r
1275 movs \reg1,\reg2,lsr#\shift\r
1276 sub r1,opcodes,#0x100\r
1277 ldrb z80f,[r1,\reg1]\r
1278 orrcs z80f,z80f,#1<<CFlag\r
1279.endm\r
1280\r
1281.macro opSRLA\r
1282 opSRL z80a, z80a, 25\r
1283 mov z80a,z80a,lsl#24\r
1284 fetch 8\r
1285.endm\r
1286\r
1287.macro opSRLH reg\r
1288 opSRL r0, \reg, 25\r
1289 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1290 orr \reg,\reg,r0,lsl#24\r
1291 fetch 8\r
1292.endm\r
1293\r
1294.macro opSRLL reg\r
1295 mov r0,\reg,lsl#8\r
1296 opSRL r0, r0, 25\r
1297 and \reg,\reg,#0xFF000000 ;@mask out high\r
1298 orr \reg,\reg,r0,lsl#16\r
1299 fetch 8\r
1300.endm\r
1301\r
1302.macro opSRLb\r
1303 opSRL r0, r0, 1\r
1304.endm\r
1305;@---------------------------------------\r
1306\r
1307.macro opSUB reg shift\r
1308 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
1309 subs z80a,z80a,\reg,lsl#\shift\r
1310 mrs z80f,cpsr\r
1311 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1312 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
1313 cmp r1,\reg,lsl#\shift+4\r
1314 orrcc z80f,z80f,#1<<HFlag\r
1315.endm\r
1316\r
1317.macro opSUBA\r
1318 mov z80a,#0\r
1319 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
1320 fetch 4\r
1321.endm\r
1322\r
1323.macro opSUBH reg\r
1324 and r0,\reg,#0xFF000000\r
1325 opSUB r0, 0\r
1326 fetch 4\r
1327.endm\r
1328\r
1329.macro opSUBL reg\r
1330 opSUB \reg, 8\r
1331 fetch 4\r
1332.endm\r
1333\r
1334.macro opSUBb\r
1335 opSUB r0, 24\r
1336.endm\r
1337;@---------------------------------------\r
1338\r
1339.macro opXOR reg shift\r
1340 eor z80a,z80a,\reg,lsl#\shift\r
1341 sub r0,opcodes,#0x100\r
1342 ldrb z80f,[r0,z80a, lsr #24]\r
1343.endm\r
1344\r
1345.macro opXORA\r
1346 mov z80a,#0\r
1347 mov z80f,#(1<<ZFlag)|(1<<VFlag)\r
1348 fetch 4\r
1349.endm\r
1350\r
1351.macro opXORH reg\r
1352 and r0,\reg,#0xFF000000\r
1353 opXOR r0, 0\r
1354 fetch 4\r
1355.endm\r
1356\r
1357.macro opXORL reg\r
1358 opXOR \reg, 8\r
1359 fetch 4\r
1360.endm\r
1361\r
1362.macro opXORb\r
1363 opXOR r0, 24\r
1364.endm\r
1365;@---------------------------------------\r
1366\r
1367\r
1368;@ --------------------------- Framework --------------------------\r
1369 \r
1370.text\r
1371\r
1372DrZ80Run:\r
1373 ;@ r0 = pointer to cpu context\r
1374 ;@ r1 = ISTATES to execute \r
1375 ;@######################################### \r
1376 stmdb sp!,{r4-r12,lr} ;@ save registers on stack\r
1377 mov cpucontext,r0 ;@ setup main memory pointer\r
1378 mov z80_icount,r1 ;@ setup number of Tstates to execute\r
1379\r
1380.if INTERRUPT_MODE == 0\r
1381 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
1382.endif\r
1383 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1384\r
1385.if INTERRUPT_MODE == 0\r
1386 ;@ check ints\r
1387 tst r0,#1\r
1388 movnes r0,r0,lsr #8\r
1389 blne DoInterrupt\r
1390.endif\r
1391\r
1392 ldrb r0,[z80pc],#1 ;@ get first op code\r
1393 ldr opcodes,MAIN_opcodes_POINTER2\r
1394 ldr pc,[opcodes,r0, lsl #2] ;@ execute op code\r
1395\r
1396MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
1397\r
1398\r
1399z80_execute_end:\r
1400 ;@ save registers in CPU context\r
1401 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1402 mov r0,z80_icount\r
1403 ldmia sp!,{r4-r12,pc} ;@ restore registers from stack and return to C code\r
1404\r
1405.if INTERRUPT_MODE\r
1406Interrupt_local: .word Interrupt\r
1407.endif\r
1408\r
1409DoInterrupt:\r
1410.if INTERRUPT_MODE\r
1411 ;@ Don't do own int handler, call mames instead\r
1412\r
1413 ;@ save everything back into DrZ80 context\r
1414 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1415 stmfd sp!,{r3,r4,r5,lr} ;@ save rest of regs on stack\r
1416 mov lr,pc\r
1417 ldr pc,Interrupt_local\r
1418 ldmfd sp!,{r3,r4,r5,lr} ;@ load regs from stack\r
1419 ;@ reload regs from DrZ80 context\r
1420 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1421 mov pc,lr ;@ return\r
1422.else\r
1423 stmfd sp!,{lr}\r
1424\r
1425 tst r0,#4 ;@ check halt\r
1426 addne z80pc,z80pc,#1\r
1427\r
1428 ldrb r1,[cpucontext,#z80im]\r
1429\r
1430 ;@ clear halt and int flags\r
1431 eor r0,r0,r0\r
1432 strb r0,[cpucontext,#z80if]\r
1433\r
1434 ;@ now check int mode\r
1435 tst r1,#1\r
1436 bne DoInterrupt_mode1\r
1437 tst r1,#2\r
1438 bne DoInterrupt_mode2\r
cc68a136 1439\r
1440DoInterrupt_mode0:\r
1441 ;@ get 3 byte vector\r
1442 ldr r2,[cpucontext, #z80irqvector]\r
1443 and r1,r2,#0xFF0000\r
1444 cmp r1,#0xCD0000 ;@ call\r
1445 bne 1f\r
1446 ;@ ########\r
1447 ;@ # call\r
1448 ;@ ########\r
1449 ;@ save current pc on stack\r
1450 ldr r0,[cpucontext,#z80pc_base]\r
1451 sub r0,z80pc,r0\r
1452.if FAST_Z80SP\r
1453 mov r1,r0, lsr #8\r
1454 strb r1,[z80sp,#-1]!\r
1455 strb r0,[z80sp,#-1]!\r
1456.else\r
1457 sub z80sp,z80sp,#2\r
1458 mov r1,z80sp\r
1459 writemem16\r
1460 ldr r2,[cpucontext, #z80irqvector]\r
1461.endif\r
1462 ;@ jump to vector\r
1463 mov r2,r2,lsl#16\r
1464 mov r0,r2,lsr#16\r
1465 ;@ rebase new pc\r
1466 rebasepc\r
1467\r
1468 b DoInterrupt_end\r
1469\r
14701:\r
1471 cmp r1,#0xC30000 ;@ jump\r
1472 bne DoInterrupt_mode1 ;@ rst\r
1473 ;@ #######\r
1474 ;@ # jump\r
1475 ;@ #######\r
1476 ;@ jump to vector\r
1477 mov r2,r2,lsl#16\r
1478 mov r0,r2,lsr#16\r
1479 ;@ rebase new pc\r
1480 rebasepc\r
1481\r
1482 b DoInterrupt_end\r
1483\r
1484DoInterrupt_mode1:\r
1485 ldr r0,[cpucontext,#z80pc_base]\r
1486 sub r2,z80pc,r0\r
1487 opPUSHareg r2\r
1488 mov r0,#0x38\r
1489 rebasepc\r
1490\r
1491 b DoInterrupt_end\r
1492\r
1493DoInterrupt_mode2:\r
1494 ;@ push pc on stack\r
1495 ldr r0,[cpucontext,#z80pc_base]\r
1496 sub r2,z80pc,r0\r
1497 opPUSHareg r2\r
1498\r
1499 ;@ get 1 byte vector address\r
1500 ldrb r0,[cpucontext, #z80irqvector]\r
1501 ldr r1,[cpucontext, #z80i]\r
1502 orr r0,r0,r1,lsr#16\r
1503\r
1504 ;@ read new pc from vector address\r
1505.if DRZ80_FOR_PICODRIVE\r
1506 bl pico_z80_read16\r
1507 bic r0,r0,#0xfe000\r
1508 ldr r1,[cpucontext,#z80pc_base]\r
1509 add z80pc,r1,r0\r
1510.if UPDATE_CONTEXT\r
1511 str z80pc,[cpucontext,#z80pc_pointer]\r
1512.endif\r
1513.else\r
1514 stmfd sp!,{r3,r12}\r
1515 mov lr,pc\r
1516 ldr pc,[cpucontext,#z80_read16]\r
1517\r
1518 ;@ rebase new pc\r
1519.if UPDATE_CONTEXT\r
1520 str z80pc,[cpucontext,#z80pc_pointer]\r
1521.endif\r
1522 mov lr,pc\r
1523 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
1524 ldmfd sp!,{r3,r12}\r
1525 mov z80pc,r0 \r
1526.endif\r
1527\r
1528DoInterrupt_end:\r
1529 ;@ interupt accepted so callback irq interface\r
1530 ldr r0,[cpucontext, #z80irqcallback]\r
1531 tst r0,r0\r
1532 ldmeqfd sp!,{pc}\r
1533 stmfd sp!,{r3,r12}\r
1534 mov lr,pc\r
1535 mov pc,r0 ;@ call callback function\r
1536 ldmfd sp!,{r3,r12}\r
1537 ldmfd sp!,{pc} ;@ return\r
1538\r
1539.endif\r
1540\r
1541.data\r
1542.align 4\r
1543\r
1544DAATable: .hword (0x00<<8)|(1<<ZFlag)|(1<<VFlag)\r
1545 .hword (0x01<<8) \r
1546 .hword (0x02<<8) \r
1547 .hword (0x03<<8) |(1<<VFlag)\r
1548 .hword (0x04<<8) \r
1549 .hword (0x05<<8) |(1<<VFlag)\r
1550 .hword (0x06<<8) |(1<<VFlag)\r
1551 .hword (0x07<<8) \r
1552 .hword (0x08<<8) \r
1553 .hword (0x09<<8) |(1<<VFlag)\r
1554 .hword (0x10<<8) |(1<<HFlag) \r
1555 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
1556 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
1557 .hword (0x13<<8) |(1<<HFlag) \r
1558 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
1559 .hword (0x15<<8) |(1<<HFlag) \r
1560 .hword (0x10<<8) \r
1561 .hword (0x11<<8) |(1<<VFlag)\r
1562 .hword (0x12<<8) |(1<<VFlag)\r
1563 .hword (0x13<<8) \r
1564 .hword (0x14<<8) |(1<<VFlag)\r
1565 .hword (0x15<<8) \r
1566 .hword (0x16<<8) \r
1567 .hword (0x17<<8) |(1<<VFlag)\r
1568 .hword (0x18<<8) |(1<<VFlag)\r
1569 .hword (0x19<<8) \r
1570 .hword (0x20<<8) |(1<<HFlag) \r
1571 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
1572 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
1573 .hword (0x23<<8) |(1<<HFlag) \r
1574 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
1575 .hword (0x25<<8) |(1<<HFlag) \r
1576 .hword (0x20<<8) \r
1577 .hword (0x21<<8) |(1<<VFlag)\r
1578 .hword (0x22<<8) |(1<<VFlag)\r
1579 .hword (0x23<<8) \r
1580 .hword (0x24<<8) |(1<<VFlag)\r
1581 .hword (0x25<<8) \r
1582 .hword (0x26<<8) \r
1583 .hword (0x27<<8) |(1<<VFlag)\r
1584 .hword (0x28<<8) |(1<<VFlag)\r
1585 .hword (0x29<<8) \r
1586 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
1587 .hword (0x31<<8) |(1<<HFlag) \r
1588 .hword (0x32<<8) |(1<<HFlag) \r
1589 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
1590 .hword (0x34<<8) |(1<<HFlag) \r
1591 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
1592 .hword (0x30<<8) |(1<<VFlag)\r
1593 .hword (0x31<<8) \r
1594 .hword (0x32<<8) \r
1595 .hword (0x33<<8) |(1<<VFlag)\r
1596 .hword (0x34<<8) \r
1597 .hword (0x35<<8) |(1<<VFlag)\r
1598 .hword (0x36<<8) |(1<<VFlag)\r
1599 .hword (0x37<<8) \r
1600 .hword (0x38<<8) \r
1601 .hword (0x39<<8) |(1<<VFlag)\r
1602 .hword (0x40<<8) |(1<<HFlag) \r
1603 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
1604 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
1605 .hword (0x43<<8) |(1<<HFlag) \r
1606 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
1607 .hword (0x45<<8) |(1<<HFlag) \r
1608 .hword (0x40<<8) \r
1609 .hword (0x41<<8) |(1<<VFlag)\r
1610 .hword (0x42<<8) |(1<<VFlag)\r
1611 .hword (0x43<<8) \r
1612 .hword (0x44<<8) |(1<<VFlag)\r
1613 .hword (0x45<<8) \r
1614 .hword (0x46<<8) \r
1615 .hword (0x47<<8) |(1<<VFlag)\r
1616 .hword (0x48<<8) |(1<<VFlag)\r
1617 .hword (0x49<<8) \r
1618 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
1619 .hword (0x51<<8) |(1<<HFlag) \r
1620 .hword (0x52<<8) |(1<<HFlag) \r
1621 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
1622 .hword (0x54<<8) |(1<<HFlag) \r
1623 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
1624 .hword (0x50<<8) |(1<<VFlag)\r
1625 .hword (0x51<<8) \r
1626 .hword (0x52<<8) \r
1627 .hword (0x53<<8) |(1<<VFlag)\r
1628 .hword (0x54<<8) \r
1629 .hword (0x55<<8) |(1<<VFlag)\r
1630 .hword (0x56<<8) |(1<<VFlag)\r
1631 .hword (0x57<<8) \r
1632 .hword (0x58<<8) \r
1633 .hword (0x59<<8) |(1<<VFlag)\r
1634 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
1635 .hword (0x61<<8) |(1<<HFlag) \r
1636 .hword (0x62<<8) |(1<<HFlag) \r
1637 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
1638 .hword (0x64<<8) |(1<<HFlag) \r
1639 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
1640 .hword (0x60<<8) |(1<<VFlag)\r
1641 .hword (0x61<<8) \r
1642 .hword (0x62<<8) \r
1643 .hword (0x63<<8) |(1<<VFlag)\r
1644 .hword (0x64<<8) \r
1645 .hword (0x65<<8) |(1<<VFlag)\r
1646 .hword (0x66<<8) |(1<<VFlag)\r
1647 .hword (0x67<<8) \r
1648 .hword (0x68<<8) \r
1649 .hword (0x69<<8) |(1<<VFlag)\r
1650 .hword (0x70<<8) |(1<<HFlag) \r
1651 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
1652 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
1653 .hword (0x73<<8) |(1<<HFlag) \r
1654 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
1655 .hword (0x75<<8) |(1<<HFlag) \r
1656 .hword (0x70<<8) \r
1657 .hword (0x71<<8) |(1<<VFlag)\r
1658 .hword (0x72<<8) |(1<<VFlag)\r
1659 .hword (0x73<<8) \r
1660 .hword (0x74<<8) |(1<<VFlag)\r
1661 .hword (0x75<<8) \r
1662 .hword (0x76<<8) \r
1663 .hword (0x77<<8) |(1<<VFlag)\r
1664 .hword (0x78<<8) |(1<<VFlag)\r
1665 .hword (0x79<<8) \r
1666 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
1667 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1668 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1669 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
1670 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1671 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
1672 .hword (0x80<<8)|(1<<SFlag) \r
1673 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)\r
1674 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)\r
1675 .hword (0x83<<8)|(1<<SFlag) \r
1676 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)\r
1677 .hword (0x85<<8)|(1<<SFlag) \r
1678 .hword (0x86<<8)|(1<<SFlag) \r
1679 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
1680 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
1681 .hword (0x89<<8)|(1<<SFlag) \r
1682 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1683 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
1684 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
1685 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1686 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
1687 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1688 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)\r
1689 .hword (0x91<<8)|(1<<SFlag) \r
1690 .hword (0x92<<8)|(1<<SFlag) \r
1691 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)\r
1692 .hword (0x94<<8)|(1<<SFlag) \r
1693 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)\r
1694 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
1695 .hword (0x97<<8)|(1<<SFlag) \r
1696 .hword (0x98<<8)|(1<<SFlag) \r
1697 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
1698 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1699 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1700 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1701 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1702 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1703 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1704 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1705 .hword (0x01<<8) |(1<<CFlag)\r
1706 .hword (0x02<<8) |(1<<CFlag)\r
1707 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1708 .hword (0x04<<8) |(1<<CFlag)\r
1709 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1710 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1711 .hword (0x07<<8) |(1<<CFlag)\r
1712 .hword (0x08<<8) |(1<<CFlag)\r
1713 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1714 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1715 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1716 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1717 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1718 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1719 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1720 .hword (0x10<<8) |(1<<CFlag)\r
1721 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1722 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1723 .hword (0x13<<8) |(1<<CFlag)\r
1724 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1725 .hword (0x15<<8) |(1<<CFlag)\r
1726 .hword (0x16<<8) |(1<<CFlag)\r
1727 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1728 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1729 .hword (0x19<<8) |(1<<CFlag)\r
1730 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1731 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1732 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1733 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1734 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1735 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1736 .hword (0x20<<8) |(1<<CFlag)\r
1737 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1738 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1739 .hword (0x23<<8) |(1<<CFlag)\r
1740 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1741 .hword (0x25<<8) |(1<<CFlag)\r
1742 .hword (0x26<<8) |(1<<CFlag)\r
1743 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1744 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1745 .hword (0x29<<8) |(1<<CFlag)\r
1746 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1747 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1748 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1749 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1750 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
1751 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1752 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
1753 .hword (0x31<<8) |(1<<CFlag)\r
1754 .hword (0x32<<8) |(1<<CFlag)\r
1755 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
1756 .hword (0x34<<8) |(1<<CFlag)\r
1757 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
1758 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
1759 .hword (0x37<<8) |(1<<CFlag)\r
1760 .hword (0x38<<8) |(1<<CFlag)\r
1761 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
1762 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
1763 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1764 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1765 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
1766 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1767 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
1768 .hword (0x40<<8) |(1<<CFlag)\r
1769 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
1770 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
1771 .hword (0x43<<8) |(1<<CFlag)\r
1772 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
1773 .hword (0x45<<8) |(1<<CFlag)\r
1774 .hword (0x46<<8) |(1<<CFlag)\r
1775 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
1776 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
1777 .hword (0x49<<8) |(1<<CFlag)\r
1778 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1779 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
1780 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
1781 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1782 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
1783 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1784 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
1785 .hword (0x51<<8) |(1<<CFlag)\r
1786 .hword (0x52<<8) |(1<<CFlag)\r
1787 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
1788 .hword (0x54<<8) |(1<<CFlag)\r
1789 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
1790 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
1791 .hword (0x57<<8) |(1<<CFlag)\r
1792 .hword (0x58<<8) |(1<<CFlag)\r
1793 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
1794 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1795 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
1796 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
1797 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1798 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
1799 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1800 .hword (0x60<<8) |(1<<VFlag) |(1<<CFlag)\r
1801 .hword (0x61<<8) |(1<<CFlag)\r
1802 .hword (0x62<<8) |(1<<CFlag)\r
1803 .hword (0x63<<8) |(1<<VFlag) |(1<<CFlag)\r
1804 .hword (0x64<<8) |(1<<CFlag)\r
1805 .hword (0x65<<8) |(1<<VFlag) |(1<<CFlag)\r
1806 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
1807 .hword (0x67<<8) |(1<<CFlag)\r
1808 .hword (0x68<<8) |(1<<CFlag)\r
1809 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
1810 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
1811 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1812 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1813 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
1814 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1815 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
1816 .hword (0x70<<8) |(1<<CFlag)\r
1817 .hword (0x71<<8) |(1<<VFlag) |(1<<CFlag)\r
1818 .hword (0x72<<8) |(1<<VFlag) |(1<<CFlag)\r
1819 .hword (0x73<<8) |(1<<CFlag)\r
1820 .hword (0x74<<8) |(1<<VFlag) |(1<<CFlag)\r
1821 .hword (0x75<<8) |(1<<CFlag)\r
1822 .hword (0x76<<8) |(1<<CFlag)\r
1823 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
1824 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
1825 .hword (0x79<<8) |(1<<CFlag)\r
1826 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1827 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1828 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1829 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1830 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1831 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1832 .hword (0x80<<8)|(1<<SFlag) |(1<<CFlag)\r
1833 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1834 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1835 .hword (0x83<<8)|(1<<SFlag) |(1<<CFlag)\r
1836 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1837 .hword (0x85<<8)|(1<<SFlag) |(1<<CFlag)\r
1838 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
1839 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1840 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1841 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
1842 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1843 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1844 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1845 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1846 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1847 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1848 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1849 .hword (0x91<<8)|(1<<SFlag) |(1<<CFlag)\r
1850 .hword (0x92<<8)|(1<<SFlag) |(1<<CFlag)\r
1851 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1852 .hword (0x94<<8)|(1<<SFlag) |(1<<CFlag)\r
1853 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1854 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1855 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
1856 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
1857 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1858 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1859 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1860 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1861 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1862 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1863 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1864 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1865 .hword (0xA1<<8)|(1<<SFlag) |(1<<CFlag)\r
1866 .hword (0xA2<<8)|(1<<SFlag) |(1<<CFlag)\r
1867 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1868 .hword (0xA4<<8)|(1<<SFlag) |(1<<CFlag)\r
1869 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1870 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1871 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
1872 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
1873 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1874 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1875 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1876 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1877 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1878 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1879 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1880 .hword (0xB0<<8)|(1<<SFlag) |(1<<CFlag)\r
1881 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1882 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1883 .hword (0xB3<<8)|(1<<SFlag) |(1<<CFlag)\r
1884 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1885 .hword (0xB5<<8)|(1<<SFlag) |(1<<CFlag)\r
1886 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
1887 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1888 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1889 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
1890 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1891 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1892 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1893 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1894 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1895 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1896 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1897 .hword (0xC1<<8)|(1<<SFlag) |(1<<CFlag)\r
1898 .hword (0xC2<<8)|(1<<SFlag) |(1<<CFlag)\r
1899 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1900 .hword (0xC4<<8)|(1<<SFlag) |(1<<CFlag)\r
1901 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1902 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1903 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
1904 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
1905 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1906 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1907 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1908 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1909 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1910 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1911 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1912 .hword (0xD0<<8)|(1<<SFlag) |(1<<CFlag)\r
1913 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1914 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1915 .hword (0xD3<<8)|(1<<SFlag) |(1<<CFlag)\r
1916 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1917 .hword (0xD5<<8)|(1<<SFlag) |(1<<CFlag)\r
1918 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
1919 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1920 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1921 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
1922 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1923 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1924 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1925 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1926 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1927 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1928 .hword (0xE0<<8)|(1<<SFlag) |(1<<CFlag)\r
1929 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1930 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1931 .hword (0xE3<<8)|(1<<SFlag) |(1<<CFlag)\r
1932 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1933 .hword (0xE5<<8)|(1<<SFlag) |(1<<CFlag)\r
1934 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
1935 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1936 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1937 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
1938 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1939 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1940 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1941 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1942 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1943 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1944 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1945 .hword (0xF1<<8)|(1<<SFlag) |(1<<CFlag)\r
1946 .hword (0xF2<<8)|(1<<SFlag) |(1<<CFlag)\r
1947 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1948 .hword (0xF4<<8)|(1<<SFlag) |(1<<CFlag)\r
1949 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1950 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1951 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
1952 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
1953 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1954 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1955 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1956 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1957 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1958 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1959 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1960 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1961 .hword (0x01<<8) |(1<<CFlag)\r
1962 .hword (0x02<<8) |(1<<CFlag)\r
1963 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1964 .hword (0x04<<8) |(1<<CFlag)\r
1965 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1966 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1967 .hword (0x07<<8) |(1<<CFlag)\r
1968 .hword (0x08<<8) |(1<<CFlag)\r
1969 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1970 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1971 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1972 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1973 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1974 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1975 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1976 .hword (0x10<<8) |(1<<CFlag)\r
1977 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1978 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1979 .hword (0x13<<8) |(1<<CFlag)\r
1980 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1981 .hword (0x15<<8) |(1<<CFlag)\r
1982 .hword (0x16<<8) |(1<<CFlag)\r
1983 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1984 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1985 .hword (0x19<<8) |(1<<CFlag)\r
1986 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1987 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1988 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1989 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1990 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1991 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1992 .hword (0x20<<8) |(1<<CFlag)\r
1993 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1994 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1995 .hword (0x23<<8) |(1<<CFlag)\r
1996 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1997 .hword (0x25<<8) |(1<<CFlag)\r
1998 .hword (0x26<<8) |(1<<CFlag)\r
1999 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2000 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2001 .hword (0x29<<8) |(1<<CFlag)\r
2002 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2003 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2004 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2005 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2006 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2007 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2008 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
2009 .hword (0x31<<8) |(1<<CFlag)\r
2010 .hword (0x32<<8) |(1<<CFlag)\r
2011 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
2012 .hword (0x34<<8) |(1<<CFlag)\r
2013 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
2014 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2015 .hword (0x37<<8) |(1<<CFlag)\r
2016 .hword (0x38<<8) |(1<<CFlag)\r
2017 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2018 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2019 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2020 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2021 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2022 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2023 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2024 .hword (0x40<<8) |(1<<CFlag)\r
2025 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
2026 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
2027 .hword (0x43<<8) |(1<<CFlag)\r
2028 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
2029 .hword (0x45<<8) |(1<<CFlag)\r
2030 .hword (0x46<<8) |(1<<CFlag)\r
2031 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2032 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2033 .hword (0x49<<8) |(1<<CFlag)\r
2034 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2035 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2036 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2037 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2038 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2039 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2040 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
2041 .hword (0x51<<8) |(1<<CFlag)\r
2042 .hword (0x52<<8) |(1<<CFlag)\r
2043 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
2044 .hword (0x54<<8) |(1<<CFlag)\r
2045 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
2046 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2047 .hword (0x57<<8) |(1<<CFlag)\r
2048 .hword (0x58<<8) |(1<<CFlag)\r
2049 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2050 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2051 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2052 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2053 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2054 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2055 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2056 .hword (0x06<<8) |(1<<VFlag)\r
2057 .hword (0x07<<8) \r
2058 .hword (0x08<<8) \r
2059 .hword (0x09<<8) |(1<<VFlag)\r
2060 .hword (0x0A<<8) |(1<<VFlag)\r
2061 .hword (0x0B<<8) \r
2062 .hword (0x0C<<8) |(1<<VFlag)\r
2063 .hword (0x0D<<8) \r
2064 .hword (0x0E<<8) \r
2065 .hword (0x0F<<8) |(1<<VFlag)\r
2066 .hword (0x10<<8) |(1<<HFlag) \r
2067 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
2068 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
2069 .hword (0x13<<8) |(1<<HFlag) \r
2070 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
2071 .hword (0x15<<8) |(1<<HFlag) \r
2072 .hword (0x16<<8) \r
2073 .hword (0x17<<8) |(1<<VFlag)\r
2074 .hword (0x18<<8) |(1<<VFlag)\r
2075 .hword (0x19<<8) \r
2076 .hword (0x1A<<8) \r
2077 .hword (0x1B<<8) |(1<<VFlag)\r
2078 .hword (0x1C<<8) \r
2079 .hword (0x1D<<8) |(1<<VFlag)\r
2080 .hword (0x1E<<8) |(1<<VFlag)\r
2081 .hword (0x1F<<8) \r
2082 .hword (0x20<<8) |(1<<HFlag) \r
2083 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
2084 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
2085 .hword (0x23<<8) |(1<<HFlag) \r
2086 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
2087 .hword (0x25<<8) |(1<<HFlag) \r
2088 .hword (0x26<<8) \r
2089 .hword (0x27<<8) |(1<<VFlag)\r
2090 .hword (0x28<<8) |(1<<VFlag)\r
2091 .hword (0x29<<8) \r
2092 .hword (0x2A<<8) \r
2093 .hword (0x2B<<8) |(1<<VFlag)\r
2094 .hword (0x2C<<8) \r
2095 .hword (0x2D<<8) |(1<<VFlag)\r
2096 .hword (0x2E<<8) |(1<<VFlag)\r
2097 .hword (0x2F<<8) \r
2098 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
2099 .hword (0x31<<8) |(1<<HFlag) \r
2100 .hword (0x32<<8) |(1<<HFlag) \r
2101 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
2102 .hword (0x34<<8) |(1<<HFlag) \r
2103 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
2104 .hword (0x36<<8) |(1<<VFlag)\r
2105 .hword (0x37<<8) \r
2106 .hword (0x38<<8) \r
2107 .hword (0x39<<8) |(1<<VFlag)\r
2108 .hword (0x3A<<8) |(1<<VFlag)\r
2109 .hword (0x3B<<8) \r
2110 .hword (0x3C<<8) |(1<<VFlag)\r
2111 .hword (0x3D<<8) \r
2112 .hword (0x3E<<8) \r
2113 .hword (0x3F<<8) |(1<<VFlag)\r
2114 .hword (0x40<<8) |(1<<HFlag) \r
2115 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
2116 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
2117 .hword (0x43<<8) |(1<<HFlag) \r
2118 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
2119 .hword (0x45<<8) |(1<<HFlag) \r
2120 .hword (0x46<<8) \r
2121 .hword (0x47<<8) |(1<<VFlag)\r
2122 .hword (0x48<<8) |(1<<VFlag)\r
2123 .hword (0x49<<8) \r
2124 .hword (0x4A<<8) \r
2125 .hword (0x4B<<8) |(1<<VFlag)\r
2126 .hword (0x4C<<8) \r
2127 .hword (0x4D<<8) |(1<<VFlag)\r
2128 .hword (0x4E<<8) |(1<<VFlag)\r
2129 .hword (0x4F<<8) \r
2130 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
2131 .hword (0x51<<8) |(1<<HFlag) \r
2132 .hword (0x52<<8) |(1<<HFlag) \r
2133 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
2134 .hword (0x54<<8) |(1<<HFlag) \r
2135 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
2136 .hword (0x56<<8) |(1<<VFlag)\r
2137 .hword (0x57<<8) \r
2138 .hword (0x58<<8) \r
2139 .hword (0x59<<8) |(1<<VFlag)\r
2140 .hword (0x5A<<8) |(1<<VFlag)\r
2141 .hword (0x5B<<8) \r
2142 .hword (0x5C<<8) |(1<<VFlag)\r
2143 .hword (0x5D<<8) \r
2144 .hword (0x5E<<8) \r
2145 .hword (0x5F<<8) |(1<<VFlag)\r
2146 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
2147 .hword (0x61<<8) |(1<<HFlag) \r
2148 .hword (0x62<<8) |(1<<HFlag) \r
2149 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
2150 .hword (0x64<<8) |(1<<HFlag) \r
2151 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
2152 .hword (0x66<<8) |(1<<VFlag)\r
2153 .hword (0x67<<8) \r
2154 .hword (0x68<<8) \r
2155 .hword (0x69<<8) |(1<<VFlag)\r
2156 .hword (0x6A<<8) |(1<<VFlag)\r
2157 .hword (0x6B<<8) \r
2158 .hword (0x6C<<8) |(1<<VFlag)\r
2159 .hword (0x6D<<8) \r
2160 .hword (0x6E<<8) \r
2161 .hword (0x6F<<8) |(1<<VFlag)\r
2162 .hword (0x70<<8) |(1<<HFlag) \r
2163 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
2164 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
2165 .hword (0x73<<8) |(1<<HFlag) \r
2166 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
2167 .hword (0x75<<8) |(1<<HFlag) \r
2168 .hword (0x76<<8) \r
2169 .hword (0x77<<8) |(1<<VFlag)\r
2170 .hword (0x78<<8) |(1<<VFlag)\r
2171 .hword (0x79<<8) \r
2172 .hword (0x7A<<8) \r
2173 .hword (0x7B<<8) |(1<<VFlag)\r
2174 .hword (0x7C<<8) \r
2175 .hword (0x7D<<8) |(1<<VFlag)\r
2176 .hword (0x7E<<8) |(1<<VFlag)\r
2177 .hword (0x7F<<8) \r
2178 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
2179 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2180 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2181 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
2182 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2183 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
2184 .hword (0x86<<8)|(1<<SFlag) \r
2185 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
2186 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
2187 .hword (0x89<<8)|(1<<SFlag) \r
2188 .hword (0x8A<<8)|(1<<SFlag) \r
2189 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag)\r
2190 .hword (0x8C<<8)|(1<<SFlag) \r
2191 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag)\r
2192 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag)\r
2193 .hword (0x8F<<8)|(1<<SFlag) \r
2194 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2195 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
2196 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
2197 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2198 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
2199 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2200 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
2201 .hword (0x97<<8)|(1<<SFlag) \r
2202 .hword (0x98<<8)|(1<<SFlag) \r
2203 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
2204 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag)\r
2205 .hword (0x9B<<8)|(1<<SFlag) \r
2206 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag)\r
2207 .hword (0x9D<<8)|(1<<SFlag) \r
2208 .hword (0x9E<<8)|(1<<SFlag) \r
2209 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag)\r
2210 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2211 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2212 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2213 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2214 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2215 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2216 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2217 .hword (0x07<<8) |(1<<CFlag)\r
2218 .hword (0x08<<8) |(1<<CFlag)\r
2219 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2220 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2221 .hword (0x0B<<8) |(1<<CFlag)\r
2222 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2223 .hword (0x0D<<8) |(1<<CFlag)\r
2224 .hword (0x0E<<8) |(1<<CFlag)\r
2225 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2226 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2227 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2228 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2229 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2230 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2231 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2232 .hword (0x16<<8) |(1<<CFlag)\r
2233 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2234 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2235 .hword (0x19<<8) |(1<<CFlag)\r
2236 .hword (0x1A<<8) |(1<<CFlag)\r
2237 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2238 .hword (0x1C<<8) |(1<<CFlag)\r
2239 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2240 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2241 .hword (0x1F<<8) |(1<<CFlag)\r
2242 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2243 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2244 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2245 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2246 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2247 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2248 .hword (0x26<<8) |(1<<CFlag)\r
2249 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2250 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2251 .hword (0x29<<8) |(1<<CFlag)\r
2252 .hword (0x2A<<8) |(1<<CFlag)\r
2253 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2254 .hword (0x2C<<8) |(1<<CFlag)\r
2255 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2256 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2257 .hword (0x2F<<8) |(1<<CFlag)\r
2258 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2259 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2260 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2261 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2262 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2263 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2264 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2265 .hword (0x37<<8) |(1<<CFlag)\r
2266 .hword (0x38<<8) |(1<<CFlag)\r
2267 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2268 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2269 .hword (0x3B<<8) |(1<<CFlag)\r
2270 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2271 .hword (0x3D<<8) |(1<<CFlag)\r
2272 .hword (0x3E<<8) |(1<<CFlag)\r
2273 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2274 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2275 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2276 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2277 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2278 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2279 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2280 .hword (0x46<<8) |(1<<CFlag)\r
2281 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2282 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2283 .hword (0x49<<8) |(1<<CFlag)\r
2284 .hword (0x4A<<8) |(1<<CFlag)\r
2285 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2286 .hword (0x4C<<8) |(1<<CFlag)\r
2287 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2288 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2289 .hword (0x4F<<8) |(1<<CFlag)\r
2290 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2291 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2292 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2293 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2294 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2295 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2296 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2297 .hword (0x57<<8) |(1<<CFlag)\r
2298 .hword (0x58<<8) |(1<<CFlag)\r
2299 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2300 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2301 .hword (0x5B<<8) |(1<<CFlag)\r
2302 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2303 .hword (0x5D<<8) |(1<<CFlag)\r
2304 .hword (0x5E<<8) |(1<<CFlag)\r
2305 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2306 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2307 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2308 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2309 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2310 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2311 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2312 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
2313 .hword (0x67<<8) |(1<<CFlag)\r
2314 .hword (0x68<<8) |(1<<CFlag)\r
2315 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
2316 .hword (0x6A<<8) |(1<<VFlag) |(1<<CFlag)\r
2317 .hword (0x6B<<8) |(1<<CFlag)\r
2318 .hword (0x6C<<8) |(1<<VFlag) |(1<<CFlag)\r
2319 .hword (0x6D<<8) |(1<<CFlag)\r
2320 .hword (0x6E<<8) |(1<<CFlag)\r
2321 .hword (0x6F<<8) |(1<<VFlag) |(1<<CFlag)\r
2322 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
2323 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2324 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2325 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
2326 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2327 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
2328 .hword (0x76<<8) |(1<<CFlag)\r
2329 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
2330 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
2331 .hword (0x79<<8) |(1<<CFlag)\r
2332 .hword (0x7A<<8) |(1<<CFlag)\r
2333 .hword (0x7B<<8) |(1<<VFlag) |(1<<CFlag)\r
2334 .hword (0x7C<<8) |(1<<CFlag)\r
2335 .hword (0x7D<<8) |(1<<VFlag) |(1<<CFlag)\r
2336 .hword (0x7E<<8) |(1<<VFlag) |(1<<CFlag)\r
2337 .hword (0x7F<<8) |(1<<CFlag)\r
2338 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2339 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2340 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2341 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2342 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2343 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2344 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
2345 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2346 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2347 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
2348 .hword (0x8A<<8)|(1<<SFlag) |(1<<CFlag)\r
2349 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2350 .hword (0x8C<<8)|(1<<SFlag) |(1<<CFlag)\r
2351 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2352 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2353 .hword (0x8F<<8)|(1<<SFlag) |(1<<CFlag)\r
2354 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2355 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2356 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2357 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2358 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2359 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2360 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2361 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
2362 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
2363 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2364 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2365 .hword (0x9B<<8)|(1<<SFlag) |(1<<CFlag)\r
2366 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2367 .hword (0x9D<<8)|(1<<SFlag) |(1<<CFlag)\r
2368 .hword (0x9E<<8)|(1<<SFlag) |(1<<CFlag)\r
2369 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2370 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2371 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2372 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2373 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2374 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2375 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2376 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2377 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
2378 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
2379 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2380 .hword (0xAA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2381 .hword (0xAB<<8)|(1<<SFlag) |(1<<CFlag)\r
2382 .hword (0xAC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2383 .hword (0xAD<<8)|(1<<SFlag) |(1<<CFlag)\r
2384 .hword (0xAE<<8)|(1<<SFlag) |(1<<CFlag)\r
2385 .hword (0xAF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2386 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2387 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2388 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2389 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2390 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2391 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2392 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
2393 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2394 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2395 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
2396 .hword (0xBA<<8)|(1<<SFlag) |(1<<CFlag)\r
2397 .hword (0xBB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2398 .hword (0xBC<<8)|(1<<SFlag) |(1<<CFlag)\r
2399 .hword (0xBD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2400 .hword (0xBE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2401 .hword (0xBF<<8)|(1<<SFlag) |(1<<CFlag)\r
2402 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2403 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2404 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2405 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2406 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2407 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2408 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2409 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
2410 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
2411 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2412 .hword (0xCA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2413 .hword (0xCB<<8)|(1<<SFlag) |(1<<CFlag)\r
2414 .hword (0xCC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2415 .hword (0xCD<<8)|(1<<SFlag) |(1<<CFlag)\r
2416 .hword (0xCE<<8)|(1<<SFlag) |(1<<CFlag)\r
2417 .hword (0xCF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2418 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2419 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2420 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2421 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2422 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2423 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2424 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
2425 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2426 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2427 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
2428 .hword (0xDA<<8)|(1<<SFlag) |(1<<CFlag)\r
2429 .hword (0xDB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2430 .hword (0xDC<<8)|(1<<SFlag) |(1<<CFlag)\r
2431 .hword (0xDD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2432 .hword (0xDE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2433 .hword (0xDF<<8)|(1<<SFlag) |(1<<CFlag)\r
2434 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2435 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2436 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2437 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2438 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2439 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2440 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
2441 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2442 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2443 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
2444 .hword (0xEA<<8)|(1<<SFlag) |(1<<CFlag)\r
2445 .hword (0xEB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2446 .hword (0xEC<<8)|(1<<SFlag) |(1<<CFlag)\r
2447 .hword (0xED<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2448 .hword (0xEE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2449 .hword (0xEF<<8)|(1<<SFlag) |(1<<CFlag)\r
2450 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2451 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2452 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2453 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2454 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2455 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2456 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2457 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
2458 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
2459 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2460 .hword (0xFA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2461 .hword (0xFB<<8)|(1<<SFlag) |(1<<CFlag)\r
2462 .hword (0xFC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2463 .hword (0xFD<<8)|(1<<SFlag) |(1<<CFlag)\r
2464 .hword (0xFE<<8)|(1<<SFlag) |(1<<CFlag)\r
2465 .hword (0xFF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2466 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2467 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2468 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2469 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2470 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2471 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2472 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2473 .hword (0x07<<8) |(1<<CFlag)\r
2474 .hword (0x08<<8) |(1<<CFlag)\r
2475 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2476 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2477 .hword (0x0B<<8) |(1<<CFlag)\r
2478 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2479 .hword (0x0D<<8) |(1<<CFlag)\r
2480 .hword (0x0E<<8) |(1<<CFlag)\r
2481 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2482 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2483 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2484 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2485 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2486 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2487 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2488 .hword (0x16<<8) |(1<<CFlag)\r
2489 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2490 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2491 .hword (0x19<<8) |(1<<CFlag)\r
2492 .hword (0x1A<<8) |(1<<CFlag)\r
2493 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2494 .hword (0x1C<<8) |(1<<CFlag)\r
2495 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2496 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2497 .hword (0x1F<<8) |(1<<CFlag)\r
2498 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2499 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2500 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2501 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2502 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2503 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2504 .hword (0x26<<8) |(1<<CFlag)\r
2505 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2506 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2507 .hword (0x29<<8) |(1<<CFlag)\r
2508 .hword (0x2A<<8) |(1<<CFlag)\r
2509 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2510 .hword (0x2C<<8) |(1<<CFlag)\r
2511 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2512 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2513 .hword (0x2F<<8) |(1<<CFlag)\r
2514 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2515 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2516 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2517 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2518 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2519 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2520 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2521 .hword (0x37<<8) |(1<<CFlag)\r
2522 .hword (0x38<<8) |(1<<CFlag)\r
2523 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2524 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2525 .hword (0x3B<<8) |(1<<CFlag)\r
2526 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2527 .hword (0x3D<<8) |(1<<CFlag)\r
2528 .hword (0x3E<<8) |(1<<CFlag)\r
2529 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2530 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2531 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2532 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2533 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2534 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2535 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2536 .hword (0x46<<8) |(1<<CFlag)\r
2537 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2538 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2539 .hword (0x49<<8) |(1<<CFlag)\r
2540 .hword (0x4A<<8) |(1<<CFlag)\r
2541 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2542 .hword (0x4C<<8) |(1<<CFlag)\r
2543 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2544 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2545 .hword (0x4F<<8) |(1<<CFlag)\r
2546 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2547 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2548 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2549 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2550 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2551 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2552 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2553 .hword (0x57<<8) |(1<<CFlag)\r
2554 .hword (0x58<<8) |(1<<CFlag)\r
2555 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2556 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2557 .hword (0x5B<<8) |(1<<CFlag)\r
2558 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2559 .hword (0x5D<<8) |(1<<CFlag)\r
2560 .hword (0x5E<<8) |(1<<CFlag)\r
2561 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2562 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2563 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2564 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2565 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2566 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2567 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2568 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
2569 .hword (0x01<<8) |(1<<NFlag) \r
2570 .hword (0x02<<8) |(1<<NFlag) \r
2571 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
2572 .hword (0x04<<8) |(1<<NFlag) \r
2573 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2574 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2575 .hword (0x07<<8) |(1<<NFlag) \r
2576 .hword (0x08<<8) |(1<<NFlag) \r
2577 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2578 .hword (0x04<<8) |(1<<NFlag) \r
2579 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2580 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2581 .hword (0x07<<8) |(1<<NFlag) \r
2582 .hword (0x08<<8) |(1<<NFlag) \r
2583 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2584 .hword (0x10<<8) |(1<<NFlag) \r
2585 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
2586 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
2587 .hword (0x13<<8) |(1<<NFlag) \r
2588 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2589 .hword (0x15<<8) |(1<<NFlag) \r
2590 .hword (0x16<<8) |(1<<NFlag) \r
2591 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2592 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2593 .hword (0x19<<8) |(1<<NFlag) \r
2594 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2595 .hword (0x15<<8) |(1<<NFlag) \r
2596 .hword (0x16<<8) |(1<<NFlag) \r
2597 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2598 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2599 .hword (0x19<<8) |(1<<NFlag) \r
2600 .hword (0x20<<8) |(1<<NFlag) \r
2601 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
2602 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
2603 .hword (0x23<<8) |(1<<NFlag) \r
2604 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2605 .hword (0x25<<8) |(1<<NFlag) \r
2606 .hword (0x26<<8) |(1<<NFlag) \r
2607 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2608 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2609 .hword (0x29<<8) |(1<<NFlag) \r
2610 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2611 .hword (0x25<<8) |(1<<NFlag) \r
2612 .hword (0x26<<8) |(1<<NFlag) \r
2613 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2614 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2615 .hword (0x29<<8) |(1<<NFlag) \r
2616 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
2617 .hword (0x31<<8) |(1<<NFlag) \r
2618 .hword (0x32<<8) |(1<<NFlag) \r
2619 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
2620 .hword (0x34<<8) |(1<<NFlag) \r
2621 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2622 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2623 .hword (0x37<<8) |(1<<NFlag) \r
2624 .hword (0x38<<8) |(1<<NFlag) \r
2625 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2626 .hword (0x34<<8) |(1<<NFlag) \r
2627 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2628 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2629 .hword (0x37<<8) |(1<<NFlag) \r
2630 .hword (0x38<<8) |(1<<NFlag) \r
2631 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2632 .hword (0x40<<8) |(1<<NFlag) \r
2633 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
2634 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
2635 .hword (0x43<<8) |(1<<NFlag) \r
2636 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2637 .hword (0x45<<8) |(1<<NFlag) \r
2638 .hword (0x46<<8) |(1<<NFlag) \r
2639 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2640 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2641 .hword (0x49<<8) |(1<<NFlag) \r
2642 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2643 .hword (0x45<<8) |(1<<NFlag) \r
2644 .hword (0x46<<8) |(1<<NFlag) \r
2645 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2646 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2647 .hword (0x49<<8) |(1<<NFlag) \r
2648 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
2649 .hword (0x51<<8) |(1<<NFlag) \r
2650 .hword (0x52<<8) |(1<<NFlag) \r
2651 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
2652 .hword (0x54<<8) |(1<<NFlag) \r
2653 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2654 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2655 .hword (0x57<<8) |(1<<NFlag) \r
2656 .hword (0x58<<8) |(1<<NFlag) \r
2657 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2658 .hword (0x54<<8) |(1<<NFlag) \r
2659 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2660 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2661 .hword (0x57<<8) |(1<<NFlag) \r
2662 .hword (0x58<<8) |(1<<NFlag) \r
2663 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2664 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
2665 .hword (0x61<<8) |(1<<NFlag) \r
2666 .hword (0x62<<8) |(1<<NFlag) \r
2667 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
2668 .hword (0x64<<8) |(1<<NFlag) \r
2669 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2670 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2671 .hword (0x67<<8) |(1<<NFlag) \r
2672 .hword (0x68<<8) |(1<<NFlag) \r
2673 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2674 .hword (0x64<<8) |(1<<NFlag) \r
2675 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2676 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2677 .hword (0x67<<8) |(1<<NFlag) \r
2678 .hword (0x68<<8) |(1<<NFlag) \r
2679 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2680 .hword (0x70<<8) |(1<<NFlag) \r
2681 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
2682 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
2683 .hword (0x73<<8) |(1<<NFlag) \r
2684 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2685 .hword (0x75<<8) |(1<<NFlag) \r
2686 .hword (0x76<<8) |(1<<NFlag) \r
2687 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2688 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2689 .hword (0x79<<8) |(1<<NFlag) \r
2690 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2691 .hword (0x75<<8) |(1<<NFlag) \r
2692 .hword (0x76<<8) |(1<<NFlag) \r
2693 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2694 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2695 .hword (0x79<<8) |(1<<NFlag) \r
2696 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
2697 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2698 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2699 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
2700 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2701 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2702 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2703 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2704 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2705 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2706 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2707 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2708 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2709 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2710 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2711 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2712 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2713 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
2714 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
2715 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2716 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag) \r
2717 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2718 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2719 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag) \r
2720 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag) \r
2721 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2722 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2723 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2724 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2725 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2726 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2727 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2728 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2729 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2730 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2731 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2732 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2733 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2734 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2735 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2736 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2737 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2738 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2739 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2740 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2741 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2742 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2743 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2744 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2745 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2746 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2747 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2748 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2749 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2750 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2751 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2752 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2753 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2754 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2755 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2756 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2757 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2758 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2759 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2760 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2761 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
2762 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
2763 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2764 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2765 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2766 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2767 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2768 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2769 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2770 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2771 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2772 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2773 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2774 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2775 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2776 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
2777 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2778 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2779 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
2780 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2781 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2782 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2783 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2784 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2785 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2786 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2787 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2788 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2789 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2790 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2791 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2792 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2793 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2794 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2795 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2796 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2797 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2798 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2799 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2800 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2801 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2802 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2803 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2804 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2805 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2806 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2807 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2808 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2809 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2810 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2811 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2812 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2813 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2814 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2815 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2816 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2817 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2818 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2819 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2820 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2821 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2822 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2823 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2824 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2825 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2826 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2827 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2828 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2829 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2830 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2831 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2832 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2833 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2834 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2835 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2836 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2837 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2838 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2839 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2840 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2841 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2842 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2843 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2844 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2845 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2846 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2847 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2848 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2849 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2850 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2851 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2852 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2853 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2854 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2855 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2856 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2857 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2858 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2859 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2860 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2861 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2862 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2863 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2864 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2865 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2866 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2867 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2868 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2869 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2870 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2871 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2872 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2873 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2874 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2875 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2876 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2877 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2878 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2879 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2880 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2881 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2882 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2883 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2884 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2885 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2886 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2887 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2888 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2889 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2890 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2891 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2892 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2893 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2894 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2895 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2896 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2897 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2898 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2899 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2900 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2901 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2902 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2903 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2904 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2905 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2906 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2907 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2908 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2909 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2910 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2911 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2912 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2913 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2914 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2915 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2916 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2917 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2918 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2919 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2920 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2921 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
2922 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
2923 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2924 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2925 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2926 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2927 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2928 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2929 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2930 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2931 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2932 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2933 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2934 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2935 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2936 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
2937 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2938 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2939 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
2940 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2941 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2942 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2943 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2944 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2945 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2946 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2947 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2948 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2949 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2950 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2951 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2952 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
2953 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2954 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2955 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
2956 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2957 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2958 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2959 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2960 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2961 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2962 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2963 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2964 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2965 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2966 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2967 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2968 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2969 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
2970 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
2971 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2972 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2973 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2974 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2975 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2976 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2977 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2978 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2979 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2980 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2981 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2982 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2983 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2984 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2985 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2986 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2987 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2988 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2989 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2990 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2991 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2992 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2993 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2994 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2995 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2996 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2997 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2998 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2999 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3000 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3001 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3002 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3003 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3004 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3005 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3006 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3007 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3008 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3009 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3010 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3011 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3012 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3013 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3014 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3015 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3016 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3017 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3018 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3019 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3020 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3021 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3022 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3023 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3024 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3025 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3026 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3027 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3028 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3029 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3030 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3031 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3032 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3033 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3034 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3035 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3036 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3037 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3038 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3039 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3040 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3041 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3042 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3043 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3044 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3045 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3046 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3047 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3048 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3049 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3050 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3051 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3052 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3053 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3054 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3055 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3056 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3057 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3058 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3059 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3060 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3061 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3062 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3063 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3064 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3065 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3066 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3067 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3068 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3069 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3070 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3071 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3072 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3073 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3074 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3075 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3076 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3077 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3078 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3079 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3080 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3081 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3082 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3083 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3084 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3085 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3086 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
3087 .hword (0x01<<8) |(1<<NFlag) \r
3088 .hword (0x02<<8) |(1<<NFlag) \r
3089 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
3090 .hword (0x04<<8) |(1<<NFlag) \r
3091 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
3092 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
3093 .hword (0x07<<8) |(1<<NFlag) \r
3094 .hword (0x08<<8) |(1<<NFlag) \r
3095 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
3096 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3097 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag) \r
3098 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3099 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag) \r
3100 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag) \r
3101 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3102 .hword (0x10<<8) |(1<<NFlag) \r
3103 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
3104 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
3105 .hword (0x13<<8) |(1<<NFlag) \r
3106 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
3107 .hword (0x15<<8) |(1<<NFlag) \r
3108 .hword (0x16<<8) |(1<<NFlag) \r
3109 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
3110 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
3111 .hword (0x19<<8) |(1<<NFlag) \r
3112 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag) \r
3113 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3114 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag) \r
3115 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3116 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3117 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag) \r
3118 .hword (0x20<<8) |(1<<NFlag) \r
3119 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
3120 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
3121 .hword (0x23<<8) |(1<<NFlag) \r
3122 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
3123 .hword (0x25<<8) |(1<<NFlag) \r
3124 .hword (0x26<<8) |(1<<NFlag) \r
3125 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
3126 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
3127 .hword (0x29<<8) |(1<<NFlag) \r
3128 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag) \r
3129 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3130 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag) \r
3131 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3132 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3133 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag) \r
3134 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
3135 .hword (0x31<<8) |(1<<NFlag) \r
3136 .hword (0x32<<8) |(1<<NFlag) \r
3137 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
3138 .hword (0x34<<8) |(1<<NFlag) \r
3139 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
3140 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
3141 .hword (0x37<<8) |(1<<NFlag) \r
3142 .hword (0x38<<8) |(1<<NFlag) \r
3143 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
3144 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3145 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag) \r
3146 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3147 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag) \r
3148 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag) \r
3149 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3150 .hword (0x40<<8) |(1<<NFlag) \r
3151 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
3152 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
3153 .hword (0x43<<8) |(1<<NFlag) \r
3154 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
3155 .hword (0x45<<8) |(1<<NFlag) \r
3156 .hword (0x46<<8) |(1<<NFlag) \r
3157 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
3158 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
3159 .hword (0x49<<8) |(1<<NFlag) \r
3160 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag) \r
3161 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3162 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag) \r
3163 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3164 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3165 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag) \r
3166 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
3167 .hword (0x51<<8) |(1<<NFlag) \r
3168 .hword (0x52<<8) |(1<<NFlag) \r
3169 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
3170 .hword (0x54<<8) |(1<<NFlag) \r
3171 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
3172 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
3173 .hword (0x57<<8) |(1<<NFlag) \r
3174 .hword (0x58<<8) |(1<<NFlag) \r
3175 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
3176 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3177 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag) \r
3178 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3179 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag) \r
3180 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag) \r
3181 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3182 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
3183 .hword (0x61<<8) |(1<<NFlag) \r
3184 .hword (0x62<<8) |(1<<NFlag) \r
3185 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
3186 .hword (0x64<<8) |(1<<NFlag) \r
3187 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
3188 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
3189 .hword (0x67<<8) |(1<<NFlag) \r
3190 .hword (0x68<<8) |(1<<NFlag) \r
3191 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
3192 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3193 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag) \r
3194 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3195 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag) \r
3196 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag) \r
3197 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3198 .hword (0x70<<8) |(1<<NFlag) \r
3199 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
3200 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
3201 .hword (0x73<<8) |(1<<NFlag) \r
3202 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
3203 .hword (0x75<<8) |(1<<NFlag) \r
3204 .hword (0x76<<8) |(1<<NFlag) \r
3205 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
3206 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
3207 .hword (0x79<<8) |(1<<NFlag) \r
3208 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag) \r
3209 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3210 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag) \r
3211 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3212 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3213 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag) \r
3214 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
3215 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3216 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3217 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
3218 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3219 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
3220 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
3221 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3222 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3223 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
3224 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3225 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3226 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3227 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3228 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3229 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3230 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3231 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
3232 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
3233 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3234 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3235 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3236 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3237 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3238 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3239 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3240 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3241 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3242 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3243 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3244 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3245 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3246 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3247 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3248 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3249 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3250 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3251 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3252 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3253 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3254 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3255 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3256 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3257 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3258 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3259 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3260 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3261 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3262 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3263 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3264 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3265 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3266 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3267 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3268 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3269 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3270 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3271 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3272 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3273 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3274 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3275 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3276 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3277 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3278 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3279 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3280 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3281 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3282 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3283 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3284 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3285 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3286 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3287 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3288 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3289 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3290 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3291 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3292 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3293 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3294 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3295 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3296 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3297 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3298 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3299 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3300 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3301 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3302 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3303 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3304 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3305 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3306 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3307 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3308 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3309 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3310 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3311 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3312 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3313 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3314 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3315 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3316 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3317 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3318 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3319 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3320 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3321 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3322 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3323 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3324 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3325 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3326 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3327 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3328 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3329 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3330 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3331 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3332 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3333 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3334 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3335 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3336 .hword (0x9A<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3337 .hword (0x9B<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3338 .hword (0x9C<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3339 .hword (0x9D<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3340 .hword (0x9E<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3341 .hword (0x9F<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3342 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3343 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3344 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3345 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3346 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3347 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3348 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3349 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3350 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3351 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3352 .hword (0xAA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3353 .hword (0xAB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3354 .hword (0xAC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3355 .hword (0xAD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3356 .hword (0xAE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3357 .hword (0xAF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3358 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3359 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3360 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3361 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3362 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3363 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3364 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3365 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3366 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3367 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3368 .hword (0xBA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3369 .hword (0xBB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3370 .hword (0xBC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3371 .hword (0xBD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3372 .hword (0xBE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3373 .hword (0xBF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3374 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3375 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3376 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3377 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3378 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3379 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3380 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3381 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3382 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3383 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3384 .hword (0xCA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3385 .hword (0xCB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3386 .hword (0xCC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3387 .hword (0xCD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3388 .hword (0xCE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3389 .hword (0xCF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3390 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3391 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3392 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3393 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3394 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3395 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3396 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3397 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3398 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3399 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3400 .hword (0xDA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3401 .hword (0xDB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3402 .hword (0xDC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3403 .hword (0xDD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3404 .hword (0xDE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3405 .hword (0xDF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3406 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3407 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3408 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3409 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3410 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3411 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3412 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3413 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3414 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3415 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3416 .hword (0xEA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3417 .hword (0xEB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3418 .hword (0xEC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3419 .hword (0xED<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3420 .hword (0xEE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3421 .hword (0xEF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3422 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3423 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3424 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3425 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3426 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3427 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3428 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3429 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3430 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3431 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3432 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3433 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3434 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3435 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3436 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3437 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3438 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3439 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
3440 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
3441 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3442 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
3443 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3444 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3445 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
3446 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
3447 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3448 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3449 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3450 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3451 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3452 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3453 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3454 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
3455 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3456 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3457 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
3458 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3459 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
3460 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
3461 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3462 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3463 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
3464 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3465 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3466 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3467 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3468 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3469 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3470 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
3471 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3472 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3473 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
3474 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3475 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
3476 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
3477 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3478 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3479 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
3480 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3481 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3482 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3483 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3484 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3485 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3486 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3487 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
3488 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
3489 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3490 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3491 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3492 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3493 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3494 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3495 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3496 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3497 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3498 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3499 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3500 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3501 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3502 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3503 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3504 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3505 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3506 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3507 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3508 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3509 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3510 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3511 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3512 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3513 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3514 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3515 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3516 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3517 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3518 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3519 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3520 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3521 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3522 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3523 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3524 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3525 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3526 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3527 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3528 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3529 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3530 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3531 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3532 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3533 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3534 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3535 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3536 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3537 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3538 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3539 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3540 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3541 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3542 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3543 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3544 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3545 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3546 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3547 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3548 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3549 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3550 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3551 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3552 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3553 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3554 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3555 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3556 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3557 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3558 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3559 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3560 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3561 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3562 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3563 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3564 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3565 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3566 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3567 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3568 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3569 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3570 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3571 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3572 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3573 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3574 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3575 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3576 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3577 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3578 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3579 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3580 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3581 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3582 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3583 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3584 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3585 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3586 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3587 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3588 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3589 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3590 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3591 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3592 \r
3593.align 4\r
3594\r
3595AF_Z80: .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 0\r
3596 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 1\r
3597 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 2\r
3598 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 3\r
3599 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 4\r
3600 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 5\r
3601 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 6\r
3602 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 7\r
3603 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 8\r
3604 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 9\r
3605 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 10\r
3606 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 11\r
3607 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 12\r
3608 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 13\r
3609 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 14\r
3610 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 15\r
3611 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 16\r
3612 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 17\r
3613 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 18\r
3614 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 19\r
3615 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 20\r
3616 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 21\r
3617 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 22\r
3618 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 23\r
3619 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 24\r
3620 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 25\r
3621 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 26\r
3622 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 27\r
3623 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 28\r
3624 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 29\r
3625 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 30\r
3626 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 31\r
3627 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 32\r
3628 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 33\r
3629 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 34\r
3630 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 35\r
3631 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 36\r
3632 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 37\r
3633 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 38\r
3634 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 39\r
3635 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 40\r
3636 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 41\r
3637 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 42\r
3638 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 43\r
3639 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 44\r
3640 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 45\r
3641 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 46\r
3642 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 47\r
3643 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 48\r
3644 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 49\r
3645 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 50\r
3646 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 51\r
3647 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 52\r
3648 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 53\r
3649 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 54\r
3650 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 55\r
3651 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 56\r
3652 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 57\r
3653 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 58\r
3654 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 59\r
3655 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 60\r
3656 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 61\r
3657 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 62\r
3658 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 63\r
3659 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 64\r
3660 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 65\r
3661 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 66\r
3662 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 67\r
3663 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 68\r
3664 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 69\r
3665 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 70\r
3666 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 71\r
3667 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 72\r
3668 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 73\r
3669 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 74\r
3670 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 75\r
3671 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 76\r
3672 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 77\r
3673 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 78\r
3674 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 79\r
3675 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 80\r
3676 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 81\r
3677 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 82\r
3678 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 83\r
3679 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 84\r
3680 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 85\r
3681 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 86\r
3682 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 87\r
3683 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 88\r
3684 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 89\r
3685 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 90\r
3686 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 91\r
3687 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 92\r
3688 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 93\r
3689 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 94\r
3690 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 95\r
3691 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 96\r
3692 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 97\r
3693 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 98\r
3694 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 99\r
3695 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 100\r
3696 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 101\r
3697 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 102\r
3698 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 103\r
3699 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 104\r
3700 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 105\r
3701 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 106\r
3702 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 107\r
3703 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 108\r
3704 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 109\r
3705 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 110\r
3706 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 111\r
3707 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 112\r
3708 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 113\r
3709 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 114\r
3710 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 115\r
3711 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 116\r
3712 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 117\r
3713 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 118\r
3714 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 119\r
3715 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 120\r
3716 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 121\r
3717 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 122\r
3718 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 123\r
3719 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 124\r
3720 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 125\r
3721 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 126\r
3722 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 127\r
3723 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 128\r
3724 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 129\r
3725 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 130\r
3726 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 131\r
3727 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 132\r
3728 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 133\r
3729 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 134\r
3730 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 135\r
3731 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 136\r
3732 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 137\r
3733 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 138\r
3734 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 139\r
3735 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 140\r
3736 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 141\r
3737 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 142\r
3738 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 143\r
3739 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 144\r
3740 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 145\r
3741 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 146\r
3742 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 147\r
3743 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 148\r
3744 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 149\r
3745 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 150\r
3746 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 151\r
3747 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 152\r
3748 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 153\r
3749 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 154\r
3750 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 155\r
3751 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 156\r
3752 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 157\r
3753 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 158\r
3754 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 159\r
3755 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 160\r
3756 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 161\r
3757 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 162\r
3758 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 163\r
3759 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 164\r
3760 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 165\r
3761 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 166\r
3762 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 167\r
3763 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 168\r
3764 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 169\r
3765 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 170\r
3766 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 171\r
3767 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 172\r
3768 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 173\r
3769 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 174\r
3770 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 175\r
3771 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 176\r
3772 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 177\r
3773 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 178\r
3774 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 179\r
3775 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 180\r
3776 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 181\r
3777 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 182\r
3778 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 183\r
3779 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 184\r
3780 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 185\r
3781 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 186\r
3782 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 187\r
3783 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 188\r
3784 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 189\r
3785 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 190\r
3786 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 191\r
3787 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 192\r
3788 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 193\r
3789 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 194\r
3790 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 195\r
3791 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 196\r
3792 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 197\r
3793 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 198\r
3794 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 199\r
3795 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 200\r
3796 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 201\r
3797 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 202\r
3798 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 203\r
3799 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 204\r
3800 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 205\r
3801 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 206\r
3802 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 207\r
3803 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 208\r
3804 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 209\r
3805 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 210\r
3806 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 211\r
3807 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 212\r
3808 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 213\r
3809 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 214\r
3810 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 215\r
3811 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 216\r
3812 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 217\r
3813 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 218\r
3814 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 219\r
3815 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 220\r
3816 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 221\r
3817 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 222\r
3818 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 223\r
3819 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 224\r
3820 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 225\r
3821 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 226\r
3822 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 227\r
3823 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 228\r
3824 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 229\r
3825 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 230\r
3826 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 231\r
3827 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 232\r
3828 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 233\r
3829 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 234\r
3830 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 235\r
3831 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 236\r
3832 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 237\r
3833 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 238\r
3834 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 239\r
3835 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 240\r
3836 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 241\r
3837 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 242\r
3838 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 243\r
3839 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 244\r
3840 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 245\r
3841 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 246\r
3842 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 247\r
3843 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 248\r
3844 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 249\r
3845 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 250\r
3846 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 251\r
3847 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 252\r
3848 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 253\r
3849 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 254\r
3850 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 255\r
3851\r
3852.align 4\r
3853\r
3854AF_ARM: .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 0\r
3855 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 1\r
3856 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 2\r
3857 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 3\r
3858 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 4\r
3859 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 5\r
3860 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 6\r
3861 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 7\r
3862 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 8\r
3863 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 9\r
3864 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 10\r
3865 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 11\r
3866 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 12\r
3867 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 13\r
3868 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 14\r
3869 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 15\r
3870 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 16\r
3871 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 17\r
3872 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 18\r
3873 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 19\r
3874 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 20\r
3875 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 21\r
3876 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 22\r
3877 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 23\r
3878 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 24\r
3879 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 25\r
3880 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 26\r
3881 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 27\r
3882 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 28\r
3883 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 29\r
3884 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 30\r
3885 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 31\r
3886 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 32\r
3887 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 33\r
3888 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 34\r
3889 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 35\r
3890 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 36\r
3891 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 37\r
3892 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 38\r
3893 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 39\r
3894 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 40\r
3895 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 41\r
3896 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 42\r
3897 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 43\r
3898 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 44\r
3899 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 45\r
3900 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 46\r
3901 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 47\r
3902 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 48\r
3903 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 49\r
3904 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 50\r
3905 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 51\r
3906 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 52\r
3907 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 53\r
3908 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 54\r
3909 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 55\r
3910 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 56\r
3911 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 57\r
3912 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 58\r
3913 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 59\r
3914 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 60\r
3915 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 61\r
3916 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 62\r
3917 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 63\r
3918 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 64\r
3919 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 65\r
3920 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 66\r
3921 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 67\r
3922 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 68\r
3923 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 69\r
3924 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 70\r
3925 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 71\r
3926 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 72\r
3927 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 73\r
3928 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 74\r
3929 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 75\r
3930 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 76\r
3931 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 77\r
3932 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 78\r
3933 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 79\r
3934 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 80\r
3935 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 81\r
3936 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 82\r
3937 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 83\r
3938 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 84\r
3939 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 85\r
3940 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 86\r
3941 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 87\r
3942 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 88\r
3943 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 89\r
3944 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 90\r
3945 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 91\r
3946 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 92\r
3947 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 93\r
3948 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 94\r
3949 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 95\r
3950 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 96\r
3951 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 97\r
3952 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 98\r
3953 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 99\r
3954 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 100\r
3955 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 101\r
3956 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 102\r
3957 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 103\r
3958 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 104\r
3959 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 105\r
3960 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 106\r
3961 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 107\r
3962 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 108\r
3963 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 109\r
3964 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 110\r
3965 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 111\r
3966 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 112\r
3967 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 113\r
3968 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 114\r
3969 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 115\r
3970 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 116\r
3971 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 117\r
3972 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 118\r
3973 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 119\r
3974 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 120\r
3975 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 121\r
3976 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 122\r
3977 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 123\r
3978 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 124\r
3979 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 125\r
3980 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 126\r
3981 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 127\r
3982 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 128\r
3983 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 129\r
3984 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 130\r
3985 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 131\r
3986 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 132\r
3987 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 133\r
3988 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 134\r
3989 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 135\r
3990 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 136\r
3991 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 137\r
3992 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 138\r
3993 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 139\r
3994 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 140\r
3995 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 141\r
3996 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 142\r
3997 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 143\r
3998 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 144\r
3999 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 145\r
4000 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 146\r
4001 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 147\r
4002 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 148\r
4003 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 149\r
4004 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 150\r
4005 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 151\r
4006 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 152\r
4007 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 153\r
4008 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 154\r
4009 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 155\r
4010 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 156\r
4011 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 157\r
4012 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 158\r
4013 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 159\r
4014 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 160\r
4015 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 161\r
4016 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 162\r
4017 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 163\r
4018 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 164\r
4019 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 165\r
4020 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 166\r
4021 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 167\r
4022 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 168\r
4023 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 169\r
4024 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 170\r
4025 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 171\r
4026 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 172\r
4027 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 173\r
4028 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 174\r
4029 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 175\r
4030 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 176\r
4031 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 177\r
4032 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 178\r
4033 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 179\r
4034 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 180\r
4035 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 181\r
4036 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 182\r
4037 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 183\r
4038 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 184\r
4039 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 185\r
4040 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 186\r
4041 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 187\r
4042 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 188\r
4043 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 189\r
4044 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 190\r
4045 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 191\r
4046 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 192\r
4047 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 193\r
4048 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 194\r
4049 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 195\r
4050 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 196\r
4051 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 197\r
4052 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 198\r
4053 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 199\r
4054 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 200\r
4055 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 201\r
4056 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 202\r
4057 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 203\r
4058 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 204\r
4059 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 205\r
4060 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 206\r
4061 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 207\r
4062 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 208\r
4063 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 209\r
4064 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 210\r
4065 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 211\r
4066 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 212\r
4067 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 213\r
4068 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 214\r
4069 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 215\r
4070 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 216\r
4071 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 217\r
4072 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 218\r
4073 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 219\r
4074 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 220\r
4075 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 221\r
4076 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 222\r
4077 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 223\r
4078 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 224\r
4079 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 225\r
4080 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 226\r
4081 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 227\r
4082 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 228\r
4083 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 229\r
4084 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 230\r
4085 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 231\r
4086 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 232\r
4087 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 233\r
4088 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 234\r
4089 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 235\r
4090 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 236\r
4091 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 237\r
4092 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 238\r
4093 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 239\r
4094 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 240\r
4095 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 241\r
4096 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 242\r
4097 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 243\r
4098 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 244\r
4099 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 245\r
4100 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 246\r
4101 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 247\r
4102 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 248\r
4103 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 249\r
4104 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 250\r
4105 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 251\r
4106 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 252\r
4107 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 253\r
4108 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 254\r
4109 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 255\r
4110\r
4111.align 4\r
4112\r
4113PZSTable_data: .byte (1<<ZFlag)|(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4114 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4115 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4116 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4117 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4118 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4119 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4120 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4121 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4122 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4123 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4124 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4125 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4126 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4127 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4128 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4129 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4130 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4131 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4132 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4133 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4134 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4135 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4136 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4137 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4138 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4139 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4140 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4141 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4142 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4143 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4144 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4145 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4146 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4147 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4148 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4149 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4150 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4151 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4152 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4153 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag) \r
4154\r
4155.align 4\r
4156\r
4157MAIN_opcodes: \r
4158 .word opcode_0_0,opcode_0_1,opcode_0_2,opcode_0_3,opcode_0_4,opcode_0_5,opcode_0_6,opcode_0_7\r
4159 .word opcode_0_8,opcode_0_9,opcode_0_A,opcode_0_B,opcode_0_C,opcode_0_D,opcode_0_E,opcode_0_F\r
4160 .word opcode_1_0,opcode_1_1,opcode_1_2,opcode_1_3,opcode_1_4,opcode_1_5,opcode_1_6,opcode_1_7\r
4161 .word opcode_1_8,opcode_1_9,opcode_1_A,opcode_1_B,opcode_1_C,opcode_1_D,opcode_1_E,opcode_1_F\r
4162 .word opcode_2_0,opcode_2_1,opcode_2_2,opcode_2_3,opcode_2_4,opcode_2_5,opcode_2_6,opcode_2_7\r
4163 .word opcode_2_8,opcode_2_9,opcode_2_A,opcode_2_B,opcode_2_C,opcode_2_D,opcode_2_E,opcode_2_F\r
4164 .word opcode_3_0,opcode_3_1,opcode_3_2,opcode_3_3,opcode_3_4,opcode_3_5,opcode_3_6,opcode_3_7\r
4165 .word opcode_3_8,opcode_3_9,opcode_3_A,opcode_3_B,opcode_3_C,opcode_3_D,opcode_3_E,opcode_3_F\r
4166 .word opcode_4_0,opcode_4_1,opcode_4_2,opcode_4_3,opcode_4_4,opcode_4_5,opcode_4_6,opcode_4_7\r
4167 .word opcode_4_8,opcode_4_9,opcode_4_A,opcode_4_B,opcode_4_C,opcode_4_D,opcode_4_E,opcode_4_F\r
4168 .word opcode_5_0,opcode_5_1,opcode_5_2,opcode_5_3,opcode_5_4,opcode_5_5,opcode_5_6,opcode_5_7\r
4169 .word opcode_5_8,opcode_5_9,opcode_5_A,opcode_5_B,opcode_5_C,opcode_5_D,opcode_5_E,opcode_5_F\r
4170 .word opcode_6_0,opcode_6_1,opcode_6_2,opcode_6_3,opcode_6_4,opcode_6_5,opcode_6_6,opcode_6_7\r
4171 .word opcode_6_8,opcode_6_9,opcode_6_A,opcode_6_B,opcode_6_C,opcode_6_D,opcode_6_E,opcode_6_F\r
4172 .word opcode_7_0,opcode_7_1,opcode_7_2,opcode_7_3,opcode_7_4,opcode_7_5,opcode_7_6,opcode_7_7\r
4173 .word opcode_7_8,opcode_7_9,opcode_7_A,opcode_7_B,opcode_7_C,opcode_7_D,opcode_7_E,opcode_7_F\r
4174 .word opcode_8_0,opcode_8_1,opcode_8_2,opcode_8_3,opcode_8_4,opcode_8_5,opcode_8_6,opcode_8_7\r
4175 .word opcode_8_8,opcode_8_9,opcode_8_A,opcode_8_B,opcode_8_C,opcode_8_D,opcode_8_E,opcode_8_F\r
4176 .word opcode_9_0,opcode_9_1,opcode_9_2,opcode_9_3,opcode_9_4,opcode_9_5,opcode_9_6,opcode_9_7\r
4177 .word opcode_9_8,opcode_9_9,opcode_9_A,opcode_9_B,opcode_9_C,opcode_9_D,opcode_9_E,opcode_9_F\r
4178 .word opcode_A_0,opcode_A_1,opcode_A_2,opcode_A_3,opcode_A_4,opcode_A_5,opcode_A_6,opcode_A_7\r
4179 .word opcode_A_8,opcode_A_9,opcode_A_A,opcode_A_B,opcode_A_C,opcode_A_D,opcode_A_E,opcode_A_F\r
4180 .word opcode_B_0,opcode_B_1,opcode_B_2,opcode_B_3,opcode_B_4,opcode_B_5,opcode_B_6,opcode_B_7\r
4181 .word opcode_B_8,opcode_B_9,opcode_B_A,opcode_B_B,opcode_B_C,opcode_B_D,opcode_B_E,opcode_B_F\r
4182 .word opcode_C_0,opcode_C_1,opcode_C_2,opcode_C_3,opcode_C_4,opcode_C_5,opcode_C_6,opcode_C_7\r
4183 .word opcode_C_8,opcode_C_9,opcode_C_A,opcode_C_B,opcode_C_C,opcode_C_D,opcode_C_E,opcode_C_F\r
4184 .word opcode_D_0,opcode_D_1,opcode_D_2,opcode_D_3,opcode_D_4,opcode_D_5,opcode_D_6,opcode_D_7\r
4185 .word opcode_D_8,opcode_D_9,opcode_D_A,opcode_D_B,opcode_D_C,opcode_D_D,opcode_D_E,opcode_D_F\r
4186 .word opcode_E_0,opcode_E_1,opcode_E_2,opcode_E_3,opcode_E_4,opcode_E_5,opcode_E_6,opcode_E_7\r
4187 .word opcode_E_8,opcode_E_9,opcode_E_A,opcode_E_B,opcode_E_C,opcode_E_D,opcode_E_E,opcode_E_F\r
4188 .word opcode_F_0,opcode_F_1,opcode_F_2,opcode_F_3,opcode_F_4,opcode_F_5,opcode_F_6,opcode_F_7\r
4189 .word opcode_F_8,opcode_F_9,opcode_F_A,opcode_F_B,opcode_F_C,opcode_F_D,opcode_F_E,opcode_F_F\r
4190\r
4191.align 4\r
4192\r
4193EI_DUMMY_opcodes:\r
4194 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4195 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4196 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4197 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4198 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4199 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4200 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4201 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4202 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4203 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4204 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4205 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4206 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4207 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4208 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4209 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4210 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4211 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4212 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4213 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4214 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4215 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4216 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4217 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4218 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4219 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4220 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4221 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4222 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4223 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4224 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4225 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4226\r
4227.text\r
4228.align 4\r
4229\r
4230;@NOP\r
4231opcode_0_0:\r
4232;@LD B,B\r
4233opcode_4_0:\r
4234;@LD C,C\r
4235opcode_4_9:\r
4236;@LD D,D\r
4237opcode_5_2:\r
4238;@LD E,E\r
4239opcode_5_B:\r
4240;@LD H,H\r
4241opcode_6_4:\r
4242;@LD L,L\r
4243opcode_6_D:\r
4244;@LD A,A\r
4245opcode_7_F:\r
4246 fetch 4\r
4247;@LD BC,NN\r
4248opcode_0_1:\r
4249 ldrb r0,[z80pc],#1\r
4250 ldrb r1,[z80pc],#1\r
4251 orr r0,r0,r1, lsl #8\r
4252 mov z80bc,r0, lsl #16\r
4253 fetch 10\r
4254;@LD (BC),A\r
4255opcode_0_2:\r
4256 mov r0,z80a, lsr #24\r
4257 mov r1,z80bc, lsr #16\r
4258 writemem8\r
4259 fetch 7\r
4260;@INC BC\r
4261opcode_0_3:\r
4262 add z80bc,z80bc,#1<<16\r
4263 fetch 6\r
4264;@INC B\r
4265opcode_0_4:\r
4266 opINC8H z80bc\r
4267 fetch 4\r
4268;@DEC B\r
4269opcode_0_5:\r
4270 opDEC8H z80bc\r
4271 fetch 4\r
4272;@LD B,N\r
4273opcode_0_6:\r
4274 ldrb r1,[z80pc],#1\r
4275 and z80bc,z80bc,#0xFF<<16\r
4276 orr z80bc,z80bc,r1, lsl #24\r
4277 fetch 7\r
4278;@RLCA\r
4279opcode_0_7:\r
4280 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4281 movs z80a,z80a, lsl #1\r
4282 orrcs z80a,z80a,#1<<24\r
4283 orrcs z80f,z80f,#1<<CFlag\r
4284 fetch 4\r
4285;@EX AF,AF'\r
4286opcode_0_8:\r
4287 add r1,cpucontext,#z80a2\r
4288 swp z80a,z80a,[r1]\r
4289 add r1,cpucontext,#z80f2\r
4290 swp z80f,z80f,[r1]\r
4291 fetch 4\r
4292;@ADD HL,BC\r
4293opcode_0_9:\r
4294 opADD16 z80hl z80bc\r
4295 fetch 11\r
4296;@LD A,(BC)\r
4297opcode_0_A:\r
4298 mov r0,z80bc, lsr #16\r
4299 readmem8\r
4300 mov z80a,r0, lsl #24\r
4301 fetch 7\r
4302;@DEC BC\r
4303opcode_0_B:\r
4304 sub z80bc,z80bc,#1<<16\r
4305 fetch 6\r
4306;@INC C\r
4307opcode_0_C:\r
4308 opINC8L z80bc\r
4309 fetch 4\r
4310;@DEC C\r
4311opcode_0_D:\r
4312 opDEC8L z80bc\r
4313 fetch 4\r
4314;@LD C,N\r
4315opcode_0_E:\r
4316 ldrb r1,[z80pc],#1\r
4317 and z80bc,z80bc,#0xFF<<24\r
4318 orr z80bc,z80bc,r1, lsl #16\r
4319 fetch 7\r
4320;@RRCA\r
4321opcode_0_F:\r
4322 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4323 movs z80a,z80a, lsr #25\r
4324 orrcs z80a,z80a,#1<<7\r
4325 orrcs z80f,z80f,#1<<CFlag\r
4326 mov z80a,z80a, lsl #24\r
4327 fetch 4\r
4328;@DJNZ $+2\r
4329opcode_1_0:\r
4330 sub z80bc,z80bc,#1<<24\r
4331 tst z80bc,#0xFF<<24\r
4332 ldrsb r1,[z80pc],#1\r
4333 addne z80pc,z80pc,r1\r
4334 subne z80_icount,z80_icount,#5\r
4335 fetch 8\r
4336\r
4337;@LD DE,NN\r
4338opcode_1_1:\r
4339 ldrb r0,[z80pc],#1\r
4340 ldrb r1,[z80pc],#1\r
4341 orr r0,r0,r1, lsl #8\r
4342 mov z80de,r0, lsl #16\r
4343 fetch 10\r
4344;@LD (DE),A\r
4345opcode_1_2:\r
4346 mov r0,z80a, lsr #24\r
4347 writemem8DE\r
4348 fetch 7\r
4349;@INC DE\r
4350opcode_1_3:\r
4351 add z80de,z80de,#1<<16\r
4352 fetch 6\r
4353;@INC D\r
4354opcode_1_4:\r
4355 opINC8H z80de\r
4356 fetch 4\r
4357;@DEC D\r
4358opcode_1_5:\r
4359 opDEC8H z80de\r
4360 fetch 4\r
4361;@LD D,N\r
4362opcode_1_6:\r
4363 ldrb r1,[z80pc],#1\r
4364 and z80de,z80de,#0xFF<<16\r
4365 orr z80de,z80de,r1, lsl #24\r
4366 fetch 7\r
4367;@RLA\r
4368opcode_1_7:\r
4369 tst z80f,#1<<CFlag\r
4370 orrne z80a,z80a,#1<<23\r
4371 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4372 movs z80a,z80a, lsl #1\r
4373 orrcs z80f,z80f,#1<<CFlag\r
4374 fetch 4\r
4375;@JR $+2\r
4376opcode_1_8:\r
4377 ldrsb r1,[z80pc],#1\r
4378 add z80pc,z80pc,r1\r
4379 fetch 12\r
4380;@ADD HL,DE\r
4381opcode_1_9:\r
4382 opADD16 z80hl z80de\r
4383 fetch 11\r
4384;@LD A,(DE)\r
4385opcode_1_A:\r
4386 mov r0,z80de, lsr #16\r
4387 readmem8\r
4388 mov z80a,r0, lsl #24\r
4389 fetch 7\r
4390;@DEC DE\r
4391opcode_1_B:\r
4392 sub z80de,z80de,#1<<16\r
4393 fetch 6\r
4394;@INC E\r
4395opcode_1_C:\r
4396 opINC8L z80de\r
4397 fetch 4\r
4398;@DEC E\r
4399opcode_1_D:\r
4400 opDEC8L z80de\r
4401 fetch 4\r
4402;@LD E,N\r
4403opcode_1_E:\r
4404 ldrb r0,[z80pc],#1\r
4405 and z80de,z80de,#0xFF<<24\r
4406 orr z80de,z80de,r0, lsl #16\r
4407 fetch 7\r
4408;@RRA\r
4409opcode_1_F:\r
4410 orr z80a,z80a,z80f,lsr#1 ;@get C\r
4411 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4412 movs z80a,z80a,ror#25\r
4413 orrcs z80f,z80f,#1<<CFlag\r
4414 mov z80a,z80a,lsl#24\r
4415 fetch 4\r
4416;@JR NZ,$+2\r
4417opcode_2_0:\r
4418 tst z80f,#1<<ZFlag\r
4419 beq opcode_1_8\r
4420 add z80pc,z80pc,#1\r
4421 fetch 7\r
4422;@LD HL,NN\r
4423opcode_2_1:\r
4424 ldrb r0,[z80pc],#1\r
4425 ldrb r1,[z80pc],#1\r
4426 orr r0,r0,r1, lsl #8\r
4427 mov z80hl,r0, lsl #16\r
4428 fetch 10\r
4429;@LD (NN),HL\r
4430opcode_ED_63:\r
4431 eatcycles 4\r
4432;@LD (NN),HL\r
4433opcode_2_2:\r
4434 ldrb r0,[z80pc],#1\r
4435 ldrb r1,[z80pc],#1\r
4436 orr r1,r0,r1, lsl #8\r
4437 mov r0,z80hl, lsr #16\r
4438 writemem16\r
4439 fetch 16\r
4440;@INC HL\r
4441opcode_2_3:\r
4442 add z80hl,z80hl,#1<<16\r
4443 fetch 6\r
4444;@INC H\r
4445opcode_2_4:\r
4446 opINC8H z80hl\r
4447 fetch 4\r
4448;@DEC H\r
4449opcode_2_5:\r
4450 opDEC8H z80hl\r
4451 fetch 4\r
4452;@LD H,N\r
4453opcode_2_6:\r
4454 ldrb r1,[z80pc],#1\r
4455 and z80hl,z80hl,#0xFF<<16\r
4456 orr z80hl,z80hl,r1, lsl #24\r
4457 fetch 7\r
4458DAATABLE_LOCAL: .word DAATable\r
4459;@DAA\r
4460opcode_2_7:\r
4461 mov r1,z80a, lsr #24\r
4462 tst z80f,#1<<CFlag\r
4463 orrne r1,r1,#256\r
4464 tst z80f,#1<<HFlag\r
4465 orrne r1,r1,#512\r
4466 tst z80f,#1<<NFlag\r
4467 orrne r1,r1,#1024\r
4468 ldr r2,DAATABLE_LOCAL\r
4469 add r2,r2,r1, lsl #1\r
4470 ldrh r1,[r2]\r
4471 and z80f,r1,#0xFF\r
4472 and r2,r1,#0xFF<<8\r
4473 mov z80a,r2, lsl #16\r
4474 fetch 4\r
4475;@JR Z,$+2\r
4476opcode_2_8:\r
4477 tst z80f,#1<<ZFlag\r
4478 bne opcode_1_8\r
4479 add z80pc,z80pc,#1\r
4480 fetch 7\r
4481;@ADD HL,HL\r
4482opcode_2_9:\r
4483 opADD16_2 z80hl\r
4484 fetch 11\r
4485;@LD HL,(NN)\r
4486opcode_ED_6B:\r
4487 eatcycles 4\r
4488;@LD HL,(NN)\r
4489opcode_2_A:\r
4490 ldrb r0,[z80pc],#1\r
4491 ldrb r1,[z80pc],#1\r
4492 orr r0,r0,r1, lsl #8\r
4493 readmem16\r
4494 mov z80hl,r0, lsl #16\r
4495 fetch 16\r
4496;@DEC HL\r
4497opcode_2_B:\r
4498 sub z80hl,z80hl,#1<<16\r
4499 fetch 6\r
4500;@INC L\r
4501opcode_2_C:\r
4502 opINC8L z80hl\r
4503 fetch 4\r
4504;@DEC L\r
4505opcode_2_D:\r
4506 opDEC8L z80hl\r
4507 fetch 4\r
4508;@LD L,N\r
4509opcode_2_E:\r
4510 ldrb r0,[z80pc],#1\r
4511 and z80hl,z80hl,#0xFF<<24\r
4512 orr z80hl,z80hl,r0, lsl #16\r
4513 fetch 7\r
4514;@CPL\r
4515opcode_2_F:\r
4516 eor z80a,z80a,#0xFF<<24\r
4517 orr z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4518 fetch 4\r
4519;@JR NC,$+2\r
4520opcode_3_0:\r
4521 tst z80f,#1<<CFlag\r
4522 beq opcode_1_8\r
4523 add z80pc,z80pc,#1\r
4524 fetch 7\r
4525;@LD SP,NN\r
4526opcode_3_1:\r
4527 ldrb r0,[z80pc],#1\r
4528 ldrb r1,[z80pc],#1\r
4529\r
4530.if FAST_Z80SP\r
4531 orr r0,r0,r1, lsl #8\r
4532 rebasesp\r
4533 mov z80sp,r0\r
4534.else\r
4535 orr z80sp,r0,r1, lsl #8\r
4536.endif\r
4537 fetch 10\r
4538;@LD (NN),A\r
4539opcode_3_2:\r
4540 ldrb r0,[z80pc],#1\r
4541 ldrb r1,[z80pc],#1\r
4542 orr r1,r0,r1, lsl #8\r
4543 mov r0,z80a, lsr #24\r
4544 writemem8\r
4545 fetch 13\r
4546;@INC SP\r
4547opcode_3_3:\r
4548 add z80sp,z80sp,#1\r
4549 fetch 6\r
4550;@INC (HL)\r
4551opcode_3_4:\r
4552 readmem8HL\r
4553 opINC8b\r
4554 writemem8HL\r
4555 fetch 11\r
4556;@DEC (HL)\r
4557opcode_3_5:\r
4558 readmem8HL\r
4559 opDEC8b\r
4560 writemem8HL\r
4561 fetch 11\r
4562;@LD (HL),N\r
4563opcode_3_6:\r
4564 ldrb r0,[z80pc],#1\r
4565 writemem8HL\r
4566 fetch 10\r
4567;@SCF\r
4568opcode_3_7:\r
4569 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4570 orr z80f,z80f,#1<<CFlag\r
4571 fetch 4\r
4572;@JR C,$+2\r
4573opcode_3_8:\r
4574 tst z80f,#1<<CFlag\r
4575 bne opcode_1_8\r
4576 add z80pc,z80pc,#1\r
4577 fetch 8\r
4578;@ADD HL,SP\r
4579opcode_3_9:\r
4580.if FAST_Z80SP\r
4581 ldr r0,[cpucontext,#z80sp_base]\r
4582 sub r0,z80sp,r0\r
4583 opADD16s z80hl r0 16\r
4584.else\r
4585 opADD16s z80hl z80sp 16\r
4586.endif\r
4587 fetch 11\r
4588;@LD A,(NN)\r
4589opcode_3_A:\r
4590 ldrb r0,[z80pc],#1\r
4591 ldrb r1,[z80pc],#1\r
4592 orr r0,r0,r1, lsl #8\r
4593 readmem8\r
4594 mov z80a,r0, lsl #24\r
4595 fetch 11\r
4596;@DEC SP\r
4597opcode_3_B:\r
4598 sub z80sp,z80sp,#1\r
4599 fetch 6\r
4600;@INC A\r
4601opcode_3_C:\r
4602 opINC8 z80a\r
4603 fetch 4\r
4604;@DEC A\r
4605opcode_3_D:\r
4606 opDEC8 z80a\r
4607 fetch 4\r
4608;@LD A,N\r
4609opcode_3_E:\r
4610 ldrb r0,[z80pc],#1\r
4611 mov z80a,r0, lsl #24\r
4612 fetch 7\r
4613;@CCF\r
4614opcode_3_F:\r
4615 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4616 tst z80f,#1<<CFlag\r
4617 orrne z80f,z80f,#1<<HFlag\r
4618 eor z80f,z80f,#1<<CFlag\r
4619 fetch 4\r
4620\r
4621;@LD B,C\r
4622opcode_4_1:\r
4623 and z80bc,z80bc,#0xFF<<16\r
4624 orr z80bc,z80bc,z80bc, lsl #8\r
4625 fetch 4\r
4626;@LD B,D\r
4627opcode_4_2:\r
4628 and z80bc,z80bc,#0xFF<<16\r
4629 and r1,z80de,#0xFF<<24\r
4630 orr z80bc,z80bc,r1\r
4631 fetch 4\r
4632;@LD B,E\r
4633opcode_4_3:\r
4634 and z80bc,z80bc,#0xFF<<16\r
4635 and r1,z80de,#0xFF<<16\r
4636 orr z80bc,z80bc,r1, lsl #8\r
4637 fetch 4\r
4638;@LD B,H\r
4639opcode_4_4:\r
4640 and z80bc,z80bc,#0xFF<<16\r
4641 and r1,z80hl,#0xFF<<24\r
4642 orr z80bc,z80bc,r1\r
4643 fetch 4\r
4644;@LD B,L\r
4645opcode_4_5:\r
4646 and z80bc,z80bc,#0xFF<<16\r
4647 and r1,z80hl,#0xFF<<16\r
4648 orr z80bc,z80bc,r1, lsl #8\r
4649 fetch 4\r
4650;@LD B,(HL)\r
4651opcode_4_6:\r
4652 readmem8HL\r
4653 and z80bc,z80bc,#0xFF<<16\r
4654 orr z80bc,z80bc,r0, lsl #24\r
4655 fetch 7\r
4656;@LD B,A\r
4657opcode_4_7:\r
4658 and z80bc,z80bc,#0xFF<<16\r
4659 orr z80bc,z80bc,z80a\r
4660 fetch 4\r
4661;@LD C,B\r
4662opcode_4_8:\r
4663 and z80bc,z80bc,#0xFF<<24\r
4664 orr z80bc,z80bc,z80bc, lsr #8\r
4665 fetch 4\r
4666;@LD C,D\r
4667opcode_4_A:\r
4668 and z80bc,z80bc,#0xFF<<24\r
4669 and r1,z80de,#0xFF<<24\r
4670 orr z80bc,z80bc,r1, lsr #8\r
4671 fetch 4\r
4672;@LD C,E\r
4673opcode_4_B:\r
4674 and z80bc,z80bc,#0xFF<<24\r
4675 and r1,z80de,#0xFF<<16\r
4676 orr z80bc,z80bc,r1 \r
4677 fetch 4\r
4678;@LD C,H\r
4679opcode_4_C:\r
4680 and z80bc,z80bc,#0xFF<<24\r
4681 and r1,z80hl,#0xFF<<24\r
4682 orr z80bc,z80bc,r1, lsr #8\r
4683 fetch 4\r
4684;@LD C,L\r
4685opcode_4_D:\r
4686 and z80bc,z80bc,#0xFF<<24\r
4687 and r1,z80hl,#0xFF<<16\r
4688 orr z80bc,z80bc,r1 \r
4689 fetch 4\r
4690;@LD C,(HL)\r
4691opcode_4_E:\r
4692 readmem8HL\r
4693 and z80bc,z80bc,#0xFF<<24\r
4694 orr z80bc,z80bc,r0, lsl #16\r
4695 fetch 7\r
4696;@LD C,A\r
4697opcode_4_F:\r
4698 and z80bc,z80bc,#0xFF<<24\r
4699 orr z80bc,z80bc,z80a, lsr #8\r
4700 fetch 4\r
4701;@LD D,B\r
4702opcode_5_0:\r
4703 and z80de,z80de,#0xFF<<16\r
4704 and r1,z80bc,#0xFF<<24\r
4705 orr z80de,z80de,r1\r
4706 fetch 4\r
4707;@LD D,C\r
4708opcode_5_1:\r
4709 and z80de,z80de,#0xFF<<16\r
4710 orr z80de,z80de,z80bc, lsl #8\r
4711 fetch 4\r
4712;@LD D,E\r
4713opcode_5_3:\r
4714 and z80de,z80de,#0xFF<<16\r
4715 orr z80de,z80de,z80de, lsl #8\r
4716 fetch 4\r
4717;@LD D,H\r
4718opcode_5_4:\r
4719 and z80de,z80de,#0xFF<<16\r
4720 and r1,z80hl,#0xFF<<24\r
4721 orr z80de,z80de,r1\r
4722 fetch 4\r
4723;@LD D,L\r
4724opcode_5_5:\r
4725 and z80de,z80de,#0xFF<<16\r
4726 orr z80de,z80de,z80hl, lsl #8\r
4727 fetch 4\r
4728;@LD D,(HL)\r
4729opcode_5_6:\r
4730 readmem8HL\r
4731 and z80de,z80de,#0xFF<<16\r
4732 orr z80de,z80de,r0, lsl #24\r
4733 fetch 7\r
4734;@LD D,A\r
4735opcode_5_7:\r
4736 and z80de,z80de,#0xFF<<16\r
4737 orr z80de,z80de,z80a\r
4738 fetch 4\r
4739;@LD E,B\r
4740opcode_5_8:\r
4741 and z80de,z80de,#0xFF<<24\r
4742 and r1,z80bc,#0xFF<<24\r
4743 orr z80de,z80de,r1, lsr #8\r
4744 fetch 4\r
4745;@LD E,C\r
4746opcode_5_9:\r
4747 and z80de,z80de,#0xFF<<24\r
4748 and r1,z80bc,#0xFF<<16\r
4749 orr z80de,z80de,r1 \r
4750 fetch 4\r
4751;@LD E,D\r
4752opcode_5_A:\r
4753 and z80de,z80de,#0xFF<<24\r
4754 orr z80de,z80de,z80de, lsr #8\r
4755 fetch 4\r
4756;@LD E,H\r
4757opcode_5_C:\r
4758 and z80de,z80de,#0xFF<<24\r
4759 and r1,z80hl,#0xFF<<24\r
4760 orr z80de,z80de,r1, lsr #8\r
4761 fetch 4\r
4762;@LD E,L\r
4763opcode_5_D:\r
4764 and z80de,z80de,#0xFF<<24\r
4765 and r1,z80hl,#0xFF<<16\r
4766 orr z80de,z80de,r1 \r
4767 fetch 4\r
4768;@LD E,(HL)\r
4769opcode_5_E:\r
4770 readmem8HL\r
4771 and z80de,z80de,#0xFF<<24\r
4772 orr z80de,z80de,r0, lsl #16\r
4773 fetch 7\r
4774;@LD E,A\r
4775opcode_5_F:\r
4776 and z80de,z80de,#0xFF<<24\r
4777 orr z80de,z80de,z80a, lsr #8\r
4778 fetch 4\r
4779\r
4780;@LD H,B\r
4781opcode_6_0:\r
4782 and z80hl,z80hl,#0xFF<<16\r
4783 and r1,z80bc,#0xFF<<24\r
4784 orr z80hl,z80hl,r1\r
4785 fetch 4\r
4786;@LD H,C\r
4787opcode_6_1:\r
4788 and z80hl,z80hl,#0xFF<<16\r
4789 orr z80hl,z80hl,z80bc, lsl #8\r
4790 fetch 4\r
4791;@LD H,D\r
4792opcode_6_2:\r
4793 and z80hl,z80hl,#0xFF<<16\r
4794 and r1,z80de,#0xFF<<24\r
4795 orr z80hl,z80hl,r1\r
4796 fetch 4\r
4797;@LD H,E\r
4798opcode_6_3:\r
4799 and z80hl,z80hl,#0xFF<<16\r
4800 orr z80hl,z80hl,z80de, lsl #8\r
4801 fetch 4\r
4802;@LD H,L\r
4803opcode_6_5:\r
4804 and z80hl,z80hl,#0xFF<<16\r
4805 orr z80hl,z80hl,z80hl, lsl #8\r
4806 fetch 4\r
4807;@LD H,(HL)\r
4808opcode_6_6:\r
4809 readmem8HL\r
4810 and z80hl,z80hl,#0xFF<<16\r
4811 orr z80hl,z80hl,r0, lsl #24\r
4812 fetch 7\r
4813;@LD H,A\r
4814opcode_6_7:\r
4815 and z80hl,z80hl,#0xFF<<16\r
4816 orr z80hl,z80hl,z80a\r
4817 fetch 4\r
4818\r
4819;@LD L,B\r
4820opcode_6_8:\r
4821 and z80hl,z80hl,#0xFF<<24\r
4822 and r1,z80bc,#0xFF<<24\r
4823 orr z80hl,z80hl,r1, lsr #8\r
4824 fetch 4\r
4825;@LD L,C\r
4826opcode_6_9:\r
4827 and z80hl,z80hl,#0xFF<<24\r
4828 and r1,z80bc,#0xFF<<16\r
4829 orr z80hl,z80hl,r1\r
4830 fetch 4\r
4831;@LD L,D\r
4832opcode_6_A:\r
4833 and z80hl,z80hl,#0xFF<<24\r
4834 and r1,z80de,#0xFF<<24\r
4835 orr z80hl,z80hl,r1, lsr #8\r
4836 fetch 4\r
4837;@LD L,E\r
4838opcode_6_B:\r
4839 and z80hl,z80hl,#0xFF<<24\r
4840 and r1,z80de,#0xFF<<16\r
4841 orr z80hl,z80hl,r1\r
4842 fetch 4\r
4843;@LD L,H\r
4844opcode_6_C:\r
4845 and z80hl,z80hl,#0xFF<<24\r
4846 orr z80hl,z80hl,z80hl, lsr #8\r
4847 fetch 4\r
4848;@LD L,(HL)\r
4849opcode_6_E:\r
4850 readmem8HL\r
4851 and z80hl,z80hl,#0xFF<<24\r
4852 orr z80hl,z80hl,r0, lsl #16\r
4853 fetch 7\r
4854;@LD L,A\r
4855opcode_6_F:\r
4856 and z80hl,z80hl,#0xFF<<24\r
4857 orr z80hl,z80hl,z80a, lsr #8\r
4858 fetch 4\r
4859\r
4860;@LD (HL),B\r
4861opcode_7_0:\r
4862 mov r0,z80bc, lsr #24\r
4863 writemem8HL\r
4864 fetch 7\r
4865;@LD (HL),C\r
4866opcode_7_1:\r
4867 mov r0,z80bc, lsr #16\r
4868 and r0,r0,#0xFF\r
4869 writemem8HL\r
4870 fetch 7\r
4871;@LD (HL),D\r
4872opcode_7_2:\r
4873 mov r0,z80de, lsr #24\r
4874 writemem8HL\r
4875 fetch 7\r
4876;@LD (HL),E\r
4877opcode_7_3:\r
4878 mov r0,z80de, lsr #16\r
4879 and r0,r0,#0xFF\r
4880 writemem8HL\r
4881 fetch 7\r
4882;@LD (HL),H\r
4883opcode_7_4:\r
4884 mov r0,z80hl, lsr #24\r
4885 writemem8HL\r
4886 fetch 7\r
4887;@LD (HL),L\r
4888opcode_7_5:\r
4889 mov r1,z80hl, lsr #16\r
4890 and r0,r1,#0xFF\r
4891 writemem8\r
4892 fetch 7\r
4893;@HALT\r
4894opcode_7_6:\r
4895 sub z80pc,z80pc,#1\r
4896 ldrb r0,[cpucontext,#z80if]\r
4897 orr r0,r0,#Z80_HALT\r
4898 strb r0,[cpucontext,#z80if]\r
4899 b z80_execute_end\r
4900;@LD (HL),A\r
4901opcode_7_7:\r
4902 mov r0,z80a, lsr #24\r
4903 writemem8HL\r
4904 fetch 7\r
4905\r
4906;@LD A,B\r
4907opcode_7_8:\r
4908 and z80a,z80bc,#0xFF<<24\r
4909 fetch 4\r
4910;@LD A,C\r
4911opcode_7_9:\r
4912 mov z80a,z80bc, lsl #8\r
4913 fetch 4\r
4914;@LD A,D\r
4915opcode_7_A:\r
4916 and z80a,z80de,#0xFF<<24\r
4917 fetch 4\r
4918;@LD A,E\r
4919opcode_7_B:\r
4920 mov z80a,z80de, lsl #8\r
4921 fetch 4\r
4922;@LD A,H\r
4923opcode_7_C:\r
4924 and z80a,z80hl,#0xFF<<24\r
4925 fetch 4\r
4926;@LD A,L\r
4927opcode_7_D:\r
4928 mov z80a,z80hl, lsl #8\r
4929 fetch 4\r
4930;@LD A,(HL)\r
4931opcode_7_E:\r
4932 readmem8HL\r
4933 mov z80a,r0, lsl #24\r
4934 fetch 7\r
4935\r
4936;@ADD A,B\r
4937opcode_8_0:\r
4938 opADDH z80bc\r
4939;@ADD A,C\r
4940opcode_8_1:\r
4941 opADDL z80bc\r
4942;@ADD A,D\r
4943opcode_8_2:\r
4944 opADDH z80de\r
4945;@ADD A,E\r
4946opcode_8_3:\r
4947 opADDL z80de\r
4948;@ADD A,H\r
4949opcode_8_4:\r
4950 opADDH z80hl\r
4951;@ADD A,L\r
4952opcode_8_5:\r
4953 opADDL z80hl\r
4954;@ADD A,(HL)\r
4955opcode_8_6:\r
4956 readmem8HL\r
4957 opADDb\r
4958 fetch 7\r
4959;@ADD A,A\r
4960opcode_8_7:\r
4961 opADDA\r
4962\r
4963;@ADC A,B\r
4964opcode_8_8:\r
4965 opADCH z80bc\r
4966;@ADC A,C\r
4967opcode_8_9:\r
4968 opADCL z80bc\r
4969;@ADC A,D\r
4970opcode_8_A:\r
4971 opADCH z80de\r
4972;@ADC A,E\r
4973opcode_8_B:\r
4974 opADCL z80de\r
4975;@ADC A,H\r
4976opcode_8_C:\r
4977 opADCH z80hl\r
4978;@ADC A,L\r
4979opcode_8_D:\r
4980 opADCL z80hl\r
4981;@ADC A,(HL)\r
4982opcode_8_E:\r
4983 readmem8HL\r
4984 opADCb\r
4985 fetch 7\r
4986;@ADC A,A\r
4987opcode_8_F:\r
4988 opADCA\r
4989\r
4990;@SUB B\r
4991opcode_9_0:\r
4992 opSUBH z80bc\r
4993;@SUB C\r
4994opcode_9_1:\r
4995 opSUBL z80bc\r
4996;@SUB D\r
4997opcode_9_2:\r
4998 opSUBH z80de\r
4999;@SUB E\r
5000opcode_9_3:\r
5001 opSUBL z80de\r
5002;@SUB H\r
5003opcode_9_4:\r
5004 opSUBH z80hl\r
5005;@SUB L\r
5006opcode_9_5:\r
5007 opSUBL z80hl\r
5008;@SUB (HL)\r
5009opcode_9_6:\r
5010 readmem8HL\r
5011 opSUBb\r
5012 fetch 7\r
5013;@SUB A\r
5014opcode_9_7:\r
5015 opSUBA\r
5016\r
5017;@SBC B \r
5018opcode_9_8:\r
5019 opSBCH z80bc\r
5020;@SBC C\r
5021opcode_9_9:\r
5022 opSBCL z80bc\r
5023;@SBC D\r
5024opcode_9_A:\r
5025 opSBCH z80de\r
5026;@SBC E\r
5027opcode_9_B:\r
5028 opSBCL z80de\r
5029;@SBC H\r
5030opcode_9_C:\r
5031 opSBCH z80hl\r
5032;@SBC L\r
5033opcode_9_D:\r
5034 opSBCL z80hl\r
5035;@SBC (HL)\r
5036opcode_9_E:\r
5037 readmem8HL\r
5038 opSBCb\r
5039 fetch 7\r
5040;@SBC A\r
5041opcode_9_F:\r
5042 opSBCA\r
5043\r
5044;@AND B\r
5045opcode_A_0:\r
5046 opANDH z80bc\r
5047;@AND C\r
5048opcode_A_1:\r
5049 opANDL z80bc\r
5050;@AND D\r
5051opcode_A_2:\r
5052 opANDH z80de\r
5053;@AND E\r
5054opcode_A_3:\r
5055 opANDL z80de\r
5056;@AND H\r
5057opcode_A_4:\r
5058 opANDH z80hl\r
5059;@AND L\r
5060opcode_A_5:\r
5061 opANDL z80hl\r
5062;@AND (HL)\r
5063opcode_A_6:\r
5064 readmem8HL\r
5065 opANDb\r
5066 fetch 7\r
5067;@AND A\r
5068opcode_A_7:\r
5069 opANDA\r
5070\r
5071;@XOR B\r
5072opcode_A_8:\r
5073 opXORH z80bc\r
5074;@XOR C\r
5075opcode_A_9:\r
5076 opXORL z80bc\r
5077;@XOR D\r
5078opcode_A_A:\r
5079 opXORH z80de\r
5080;@XOR E\r
5081opcode_A_B:\r
5082 opXORL z80de\r
5083;@XOR H\r
5084opcode_A_C:\r
5085 opXORH z80hl\r
5086;@XOR L\r
5087opcode_A_D:\r
5088 opXORL z80hl\r
5089;@XOR (HL)\r
5090opcode_A_E:\r
5091 readmem8HL\r
5092 opXORb\r
5093 fetch 7\r
5094;@XOR A\r
5095opcode_A_F:\r
5096 opXORA\r
5097\r
5098;@OR B\r
5099opcode_B_0:\r
5100 opORH z80bc\r
5101;@OR C\r
5102opcode_B_1:\r
5103 opORL z80bc\r
5104;@OR D\r
5105opcode_B_2:\r
5106 opORH z80de\r
5107;@OR E\r
5108opcode_B_3:\r
5109 opORL z80de\r
5110;@OR H\r
5111opcode_B_4:\r
5112 opORH z80hl\r
5113;@OR L\r
5114opcode_B_5:\r
5115 opORL z80hl\r
5116;@OR (HL)\r
5117opcode_B_6:\r
5118 readmem8HL\r
5119 opORb\r
5120 fetch 7\r
5121;@OR A\r
5122opcode_B_7:\r
5123 opORA\r
5124\r
5125;@CP B\r
5126opcode_B_8:\r
5127 opCPH z80bc\r
5128;@CP C\r
5129opcode_B_9:\r
5130 opCPL z80bc\r
5131;@CP D\r
5132opcode_B_A:\r
5133 opCPH z80de\r
5134;@CP E\r
5135opcode_B_B:\r
5136 opCPL z80de\r
5137;@CP H\r
5138opcode_B_C:\r
5139 opCPH z80hl\r
5140;@CP L\r
5141opcode_B_D:\r
5142 opCPL z80hl\r
5143;@CP (HL)\r
5144opcode_B_E:\r
5145 readmem8HL\r
5146 opCPb\r
5147 fetch 7\r
5148;@CP A\r
5149opcode_B_F:\r
5150 opCPA\r
5151\r
5152;@RET NZ\r
5153opcode_C_0:\r
5154 tst z80f,#1<<ZFlag\r
5155 beq opcode_C_9 ;@unconditional RET\r
5156 fetch 5\r
5157\r
5158;@POP BC\r
5159opcode_C_1:\r
5160 opPOPreg z80bc\r
5161\r
5162;@JP NZ,$+3\r
5163opcode_C_2:\r
5164 tst z80f,#1<<ZFlag\r
5165 beq opcode_C_3 ;@unconditional JP\r
5166 add z80pc,z80pc,#2\r
5167 fetch 10\r
5168;@JP $+3\r
5169opcode_C_3:\r
5170 ldrb r0,[z80pc],#1\r
5171 ldrb r1,[z80pc],#1\r
5172 orr r0,r0,r1, lsl #8\r
5173 rebasepc\r
5174 fetch 10\r
5175;@CALL NZ,NN\r
5176opcode_C_4:\r
5177 tst z80f,#1<<ZFlag\r
5178 beq opcode_C_D ;@unconditional CALL\r
5179 add z80pc,z80pc,#2\r
5180 fetch 10\r
5181\r
5182;@PUSH BC\r
5183opcode_C_5:\r
5184 opPUSHreg z80bc\r
5185 fetch 11\r
5186;@ADD A,N\r
5187opcode_C_6:\r
5188 ldrb r0,[z80pc],#1\r
5189 opADDb\r
5190 fetch 7\r
5191;@RST 0\r
5192opcode_C_7:\r
5193 opRST 0x00\r
5194\r
5195;@RET Z\r
5196opcode_C_8:\r
5197 tst z80f,#1<<ZFlag\r
5198 bne opcode_C_9 ;@unconditional RET\r
5199 fetch 5\r
5200;@RET\r
5201opcode_C_9:\r
5202 opPOP\r
5203 rebasepc\r
5204 fetch 10\r
5205;@JP Z,$+3\r
5206opcode_C_A:\r
5207 tst z80f,#1<<ZFlag\r
5208 bne opcode_C_3 ;@unconditional JP\r
5209 add z80pc,z80pc,#2\r
5210 fetch 10\r
5211\r
5212;@This reads this opcodes_CB lookup table to find the location of\r
5213;@the CB sub for the intruction and then branches to that location\r
5214opcode_C_B:\r
5215 ldrb r0,[z80pc],#1\r
5216 ldr pc,[pc,r0, lsl #2]\r
5217opcodes_CB: .word 0x00000000\r
5218 .word opcode_CB_00,opcode_CB_01,opcode_CB_02,opcode_CB_03,opcode_CB_04,opcode_CB_05,opcode_CB_06,opcode_CB_07\r
5219 .word opcode_CB_08,opcode_CB_09,opcode_CB_0A,opcode_CB_0B,opcode_CB_0C,opcode_CB_0D,opcode_CB_0E,opcode_CB_0F\r
5220 .word opcode_CB_10,opcode_CB_11,opcode_CB_12,opcode_CB_13,opcode_CB_14,opcode_CB_15,opcode_CB_16,opcode_CB_17\r
5221 .word opcode_CB_18,opcode_CB_19,opcode_CB_1A,opcode_CB_1B,opcode_CB_1C,opcode_CB_1D,opcode_CB_1E,opcode_CB_1F\r
5222 .word opcode_CB_20,opcode_CB_21,opcode_CB_22,opcode_CB_23,opcode_CB_24,opcode_CB_25,opcode_CB_26,opcode_CB_27\r
5223 .word opcode_CB_28,opcode_CB_29,opcode_CB_2A,opcode_CB_2B,opcode_CB_2C,opcode_CB_2D,opcode_CB_2E,opcode_CB_2F\r
5224 .word opcode_CB_30,opcode_CB_31,opcode_CB_32,opcode_CB_33,opcode_CB_34,opcode_CB_35,opcode_CB_36,opcode_CB_37\r
5225 .word opcode_CB_38,opcode_CB_39,opcode_CB_3A,opcode_CB_3B,opcode_CB_3C,opcode_CB_3D,opcode_CB_3E,opcode_CB_3F\r
5226 .word opcode_CB_40,opcode_CB_41,opcode_CB_42,opcode_CB_43,opcode_CB_44,opcode_CB_45,opcode_CB_46,opcode_CB_47\r
5227 .word opcode_CB_48,opcode_CB_49,opcode_CB_4A,opcode_CB_4B,opcode_CB_4C,opcode_CB_4D,opcode_CB_4E,opcode_CB_4F\r
5228 .word opcode_CB_50,opcode_CB_51,opcode_CB_52,opcode_CB_53,opcode_CB_54,opcode_CB_55,opcode_CB_56,opcode_CB_57\r
5229 .word opcode_CB_58,opcode_CB_59,opcode_CB_5A,opcode_CB_5B,opcode_CB_5C,opcode_CB_5D,opcode_CB_5E,opcode_CB_5F\r
5230 .word opcode_CB_60,opcode_CB_61,opcode_CB_62,opcode_CB_63,opcode_CB_64,opcode_CB_65,opcode_CB_66,opcode_CB_67\r
5231 .word opcode_CB_68,opcode_CB_69,opcode_CB_6A,opcode_CB_6B,opcode_CB_6C,opcode_CB_6D,opcode_CB_6E,opcode_CB_6F\r
5232 .word opcode_CB_70,opcode_CB_71,opcode_CB_72,opcode_CB_73,opcode_CB_74,opcode_CB_75,opcode_CB_76,opcode_CB_77\r
5233 .word opcode_CB_78,opcode_CB_79,opcode_CB_7A,opcode_CB_7B,opcode_CB_7C,opcode_CB_7D,opcode_CB_7E,opcode_CB_7F\r
5234 .word opcode_CB_80,opcode_CB_81,opcode_CB_82,opcode_CB_83,opcode_CB_84,opcode_CB_85,opcode_CB_86,opcode_CB_87\r
5235 .word opcode_CB_88,opcode_CB_89,opcode_CB_8A,opcode_CB_8B,opcode_CB_8C,opcode_CB_8D,opcode_CB_8E,opcode_CB_8F\r
5236 .word opcode_CB_90,opcode_CB_91,opcode_CB_92,opcode_CB_93,opcode_CB_94,opcode_CB_95,opcode_CB_96,opcode_CB_97\r
5237 .word opcode_CB_98,opcode_CB_99,opcode_CB_9A,opcode_CB_9B,opcode_CB_9C,opcode_CB_9D,opcode_CB_9E,opcode_CB_9F\r
5238 .word opcode_CB_A0,opcode_CB_A1,opcode_CB_A2,opcode_CB_A3,opcode_CB_A4,opcode_CB_A5,opcode_CB_A6,opcode_CB_A7\r
5239 .word opcode_CB_A8,opcode_CB_A9,opcode_CB_AA,opcode_CB_AB,opcode_CB_AC,opcode_CB_AD,opcode_CB_AE,opcode_CB_AF\r
5240 .word opcode_CB_B0,opcode_CB_B1,opcode_CB_B2,opcode_CB_B3,opcode_CB_B4,opcode_CB_B5,opcode_CB_B6,opcode_CB_B7\r
5241 .word opcode_CB_B8,opcode_CB_B9,opcode_CB_BA,opcode_CB_BB,opcode_CB_BC,opcode_CB_BD,opcode_CB_BE,opcode_CB_BF\r
5242 .word opcode_CB_C0,opcode_CB_C1,opcode_CB_C2,opcode_CB_C3,opcode_CB_C4,opcode_CB_C5,opcode_CB_C6,opcode_CB_C7\r
5243 .word opcode_CB_C8,opcode_CB_C9,opcode_CB_CA,opcode_CB_CB,opcode_CB_CC,opcode_CB_CD,opcode_CB_CE,opcode_CB_CF\r
5244 .word opcode_CB_D0,opcode_CB_D1,opcode_CB_D2,opcode_CB_D3,opcode_CB_D4,opcode_CB_D5,opcode_CB_D6,opcode_CB_D7\r
5245 .word opcode_CB_D8,opcode_CB_D9,opcode_CB_DA,opcode_CB_DB,opcode_CB_DC,opcode_CB_DD,opcode_CB_DE,opcode_CB_DF\r
5246 .word opcode_CB_E0,opcode_CB_E1,opcode_CB_E2,opcode_CB_E3,opcode_CB_E4,opcode_CB_E5,opcode_CB_E6,opcode_CB_E7\r
5247 .word opcode_CB_E8,opcode_CB_E9,opcode_CB_EA,opcode_CB_EB,opcode_CB_EC,opcode_CB_ED,opcode_CB_EE,opcode_CB_EF\r
5248 .word opcode_CB_F0,opcode_CB_F1,opcode_CB_F2,opcode_CB_F3,opcode_CB_F4,opcode_CB_F5,opcode_CB_F6,opcode_CB_F7\r
5249 .word opcode_CB_F8,opcode_CB_F9,opcode_CB_FA,opcode_CB_FB,opcode_CB_FC,opcode_CB_FD,opcode_CB_FE,opcode_CB_FF\r
5250\r
5251;@CALL Z,NN\r
5252opcode_C_C:\r
5253 tst z80f,#1<<ZFlag\r
5254 bne opcode_C_D ;@unconditional CALL\r
5255 add z80pc,z80pc,#2\r
5256 fetch 10\r
5257;@CALL NN\r
5258opcode_C_D:\r
5259 ldrb r0,[z80pc],#1\r
5260 ldrb r1,[z80pc],#1\r
5261 ldr r2,[cpucontext,#z80pc_base]\r
5262 sub r2,z80pc,r2\r
5263 orr z80pc,r0,r1, lsl #8\r
5264 opPUSHareg r2\r
5265 mov r0,z80pc\r
5266 rebasepc\r
5267 fetch 17\r
5268;@ADC A,N\r
5269opcode_C_E:\r
5270 ldrb r0,[z80pc],#1\r
5271 opADCb\r
5272 fetch 7\r
5273;@RST 8H\r
5274opcode_C_F:\r
5275 opRST 0x08\r
5276\r
5277;@RET NC\r
5278opcode_D_0:\r
5279 tst z80f,#1<<CFlag\r
5280 beq opcode_C_9 ;@unconditional RET\r
5281 fetch 5\r
5282;@POP DE\r
5283opcode_D_1:\r
5284 opPOPreg z80de\r
5285\r
5286;@JP NC, $+3\r
5287opcode_D_2 :\r
5288 tst z80f,#1<<CFlag\r
5289 beq opcode_C_3 ;@unconditional JP\r
5290 add z80pc,z80pc,#2\r
5291 fetch 10\r
5292;@OUT (N),A\r
5293opcode_D_3:\r
5294 ldrb r0,[z80pc],#1\r
5295 orr r0,r0,z80a,lsr#16\r
5296 mov r1,z80a, lsr #24\r
5297 opOUT\r
5298 fetch 11\r
5299;@CALL NC,NN\r
5300opcode_D_4:\r
5301 tst z80f,#1<<CFlag\r
5302 beq opcode_C_D ;@unconditional CALL\r
5303 add z80pc,z80pc,#2\r
5304 fetch 10\r
5305;@PUSH DE\r
5306opcode_D_5:\r
5307 opPUSHreg z80de\r
5308 fetch 11\r
5309;@SUB N\r
5310opcode_D_6:\r
5311 ldrb r0,[z80pc],#1\r
5312 opSUBb\r
5313 fetch 7\r
5314\r
5315;@RST 10H\r
5316opcode_D_7:\r
5317 opRST 0x10\r
5318\r
5319;@RET C\r
5320opcode_D_8:\r
5321 tst z80f,#1<<CFlag\r
5322 bne opcode_C_9 ;@unconditional RET\r
5323 fetch 5\r
5324;@EXX\r
5325opcode_D_9:\r
5326 add r1,cpucontext,#z80bc2\r
5327 swp z80bc,z80bc,[r1]\r
5328 add r1,cpucontext,#z80de2\r
5329 swp z80de,z80de,[r1]\r
5330 add r1,cpucontext,#z80hl2\r
5331 swp z80hl,z80hl,[r1]\r
5332 fetch 4\r
5333;@JP C,$+3\r
5334opcode_D_A:\r
5335 tst z80f,#1<<CFlag\r
5336 bne opcode_C_3 ;@unconditional JP\r
5337 add z80pc,z80pc,#2\r
5338 fetch 10\r
5339;@IN A,(N)\r
5340opcode_D_B:\r
5341 ldrb r0,[z80pc],#1\r
5342 orr r0,r0,z80a,lsr#16\r
5343 opIN\r
5344 mov z80a,r0, lsl #24 ;@ r0 = data read\r
5345 fetch 11\r
5346;@CALL C,NN\r
5347opcode_D_C:\r
5348 tst z80f,#1<<CFlag\r
5349 bne opcode_C_D ;@unconditional CALL\r
5350 add z80pc,z80pc,#2\r
5351 fetch 10\r
5352\r
5353;@opcodes_DD\r
5354opcode_D_D:\r
5355 add z80xx,cpucontext,#z80ix\r
5356 b opcode_D_D_F_D\r
5357opcode_F_D:\r
5358 add z80xx,cpucontext,#z80iy\r
5359opcode_D_D_F_D:\r
5360 ldrb r0,[z80pc],#1\r
5361 ldr pc,[pc,r0, lsl #2]\r
5362opcodes_DD: .word 0x00000000\r
5363 .word opcode_0_0, opcode_0_1, opcode_0_2, opcode_0_3, opcode_0_4, opcode_0_5, opcode_0_6, opcode_0_7\r
5364 .word opcode_0_8, opcode_DD_09,opcode_0_A, opcode_0_B, opcode_0_C, opcode_0_D, opcode_0_E, opcode_0_F\r
5365 .word opcode_1_0, opcode_1_1, opcode_1_2, opcode_1_3, opcode_1_4, opcode_1_5, opcode_1_6, opcode_1_7\r
5366 .word opcode_1_8, opcode_DD_19,opcode_1_A, opcode_1_B, opcode_1_C, opcode_1_D, opcode_1_E, opcode_1_F\r
5367 .word opcode_2_0, opcode_DD_21,opcode_DD_22,opcode_DD_23,opcode_DD_24,opcode_DD_25,opcode_DD_26,opcode_2_7\r
5368 .word opcode_2_8, opcode_DD_29,opcode_DD_2A,opcode_DD_2B,opcode_DD_2C,opcode_DD_2D,opcode_DD_2E,opcode_2_F\r
5369 .word opcode_3_0, opcode_3_1, opcode_3_2, opcode_3_3, opcode_DD_34,opcode_DD_35,opcode_DD_36,opcode_3_7\r
5370 .word opcode_3_8, opcode_DD_39,opcode_3_A, opcode_3_B, opcode_3_C, opcode_3_D, opcode_3_E, opcode_3_F\r
5371 .word opcode_4_0, opcode_4_1, opcode_4_2, opcode_4_3, opcode_DD_44,opcode_DD_45,opcode_DD_46,opcode_4_7\r
5372 .word opcode_4_8, opcode_4_9, opcode_4_A, opcode_4_B, opcode_DD_4C,opcode_DD_4D,opcode_DD_4E,opcode_4_F\r
5373 .word opcode_5_0, opcode_5_1, opcode_5_2, opcode_5_3, opcode_DD_54,opcode_DD_55,opcode_DD_56,opcode_5_7\r
5374 .word opcode_5_8, opcode_5_9, opcode_5_A, opcode_5_B, opcode_DD_5C,opcode_DD_5D,opcode_DD_5E,opcode_5_F\r
5375 .word opcode_DD_60,opcode_DD_61,opcode_DD_62,opcode_DD_63,opcode_DD_64,opcode_DD_65,opcode_DD_66,opcode_DD_67\r
5376 .word opcode_DD_68,opcode_DD_69,opcode_DD_6A,opcode_DD_6B,opcode_DD_6C,opcode_DD_6D,opcode_DD_6E,opcode_DD_6F\r
5377 .word opcode_DD_70,opcode_DD_71,opcode_DD_72,opcode_DD_73,opcode_DD_74,opcode_DD_75,opcode_7_6, opcode_DD_77\r
5378 .word opcode_7_8, opcode_7_9, opcode_7_A, opcode_7_B, opcode_DD_7C,opcode_DD_7D,opcode_DD_7E,opcode_7_F\r
5379 .word opcode_8_0, opcode_8_1, opcode_8_2, opcode_8_3, opcode_DD_84,opcode_DD_85,opcode_DD_86,opcode_8_7\r
5380 .word opcode_8_8, opcode_8_9, opcode_8_A, opcode_8_B, opcode_DD_8C,opcode_DD_8D,opcode_DD_8E,opcode_8_F\r
5381 .word opcode_9_0, opcode_9_1, opcode_9_2, opcode_9_3, opcode_DD_94,opcode_DD_95,opcode_DD_96,opcode_9_7\r
5382 .word opcode_9_8, opcode_9_9, opcode_9_A, opcode_9_B, opcode_DD_9C,opcode_DD_9D,opcode_DD_9E,opcode_9_F\r
5383 .word opcode_A_0, opcode_A_1, opcode_A_2, opcode_A_3, opcode_DD_A4,opcode_DD_A5,opcode_DD_A6,opcode_A_7\r
5384 .word opcode_A_8, opcode_A_9, opcode_A_A, opcode_A_B, opcode_DD_AC,opcode_DD_AD,opcode_DD_AE,opcode_A_F\r
5385 .word opcode_B_0, opcode_B_1, opcode_B_2, opcode_B_3, opcode_DD_B4,opcode_DD_B5,opcode_DD_B6,opcode_B_7\r
5386 .word opcode_B_8, opcode_B_9, opcode_B_A, opcode_B_B, opcode_DD_BC,opcode_DD_BD,opcode_DD_BE,opcode_B_F\r
5387 .word opcode_C_0, opcode_C_1, opcode_C_2, opcode_C_3, opcode_C_4, opcode_C_5, opcode_C_6, opcode_C_7\r
5388 .word opcode_C_8, opcode_C_9, opcode_C_A, opcode_DD_CB,opcode_C_C, opcode_C_D, opcode_C_E, opcode_C_F\r
5389 .word opcode_D_0, opcode_D_1, opcode_D_2, opcode_D_3, opcode_D_4, opcode_D_5, opcode_D_6, opcode_D_7\r
5390 .word opcode_D_8, opcode_D_9, opcode_D_A, opcode_D_B, opcode_D_C, opcode_D_D, opcode_D_E, opcode_D_F\r
5391 .word opcode_E_0, opcode_DD_E1,opcode_E_2, opcode_DD_E3,opcode_E_4, opcode_DD_E5,opcode_E_6, opcode_E_7\r
5392 .word opcode_E_8, opcode_DD_E9,opcode_E_A, opcode_E_B, opcode_E_C, opcode_E_D, opcode_E_E, opcode_E_F\r
5393 .word opcode_F_0, opcode_F_1, opcode_F_2, opcode_F_3, opcode_F_4, opcode_F_5, opcode_F_6, opcode_F_7\r
5394 .word opcode_F_8, opcode_DD_F9,opcode_F_A, opcode_F_B, opcode_F_C, opcode_F_D, opcode_F_E, opcode_F_F\r
5395\r
5396;@SBC A,N\r
5397opcode_D_E:\r
5398 ldrb r0,[z80pc],#1\r
5399 opSBCb\r
5400 fetch 7\r
5401;@RST 18H\r
5402opcode_D_F:\r
5403 opRST 0x18\r
5404\r
5405;@RET PO\r
5406opcode_E_0:\r
5407 tst z80f,#1<<VFlag\r
5408 beq opcode_C_9 ;@unconditional RET\r
5409 fetch 5\r
5410;@POP HL\r
5411opcode_E_1:\r
5412 opPOPreg z80hl\r
5413\r
5414;@JP PO,$+3\r
5415opcode_E_2:\r
5416 tst z80f,#1<<VFlag\r
5417 beq opcode_C_3 ;@unconditional JP\r
5418 add z80pc,z80pc,#2\r
5419 fetch 10\r
5420;@EX (SP),HL\r
5421opcode_E_3:\r
5422.if FAST_Z80SP\r
5423 ldrb r0,[z80sp]\r
5424 ldrb r1,[z80sp,#1]\r
5425 orr r0,r0,r1, lsl #8\r
5426 mov r1,z80hl, lsr #24\r
5427 strb r1,[z80sp,#1]\r
5428 mov r1,z80hl, lsr #16\r
5429 strb r1,[z80sp]\r
5430 mov z80hl,r0, lsl #16\r
5431.else\r
5432 mov r0,z80sp\r
5433 readmem16\r
5434 mov r1,r0\r
5435 mov r0,z80hl,lsr#16\r
5436 mov z80hl,r1,lsl#16\r
5437 mov r1,z80sp\r
5438 writemem16\r
5439.endif\r
5440 fetch 19\r
5441;@CALL PO,NN\r
5442opcode_E_4:\r
5443 tst z80f,#1<<VFlag\r
5444 beq opcode_C_D ;@unconditional CALL\r
5445 add z80pc,z80pc,#2\r
5446 fetch 10\r
5447;@PUSH HL\r
5448opcode_E_5:\r
5449 opPUSHreg z80hl\r
5450 fetch 11\r
5451;@AND N\r
5452opcode_E_6:\r
5453 ldrb r0,[z80pc],#1\r
5454 opANDb\r
5455 fetch 7\r
5456;@RST 20H\r
5457opcode_E_7:\r
5458 opRST 0x20\r
5459\r
5460;@RET PE\r
5461opcode_E_8:\r
5462 tst z80f,#1<<VFlag\r
5463 bne opcode_C_9 ;@unconditional RET\r
5464 fetch 5\r
5465;@JP (HL)\r
5466opcode_E_9:\r
5467 mov r0,z80hl, lsr #16\r
5468 rebasepc\r
5469 fetch 4\r
5470;@JP PE,$+3\r
5471opcode_E_A:\r
5472 tst z80f,#1<<VFlag\r
5473 bne opcode_C_3 ;@unconditional JP\r
5474 add z80pc,z80pc,#2\r
5475 fetch 10\r
5476;@EX DE,HL\r
5477opcode_E_B:\r
5478 mov r1,z80de\r
5479 mov z80de,z80hl\r
5480 mov z80hl,r1\r
5481 fetch 4\r
5482;@CALL PE,NN\r
5483opcode_E_C:\r
5484 tst z80f,#1<<VFlag\r
5485 bne opcode_C_D ;@unconditional CALL\r
5486 add z80pc,z80pc,#2\r
5487 fetch 10\r
5488\r
5489;@This should be caught at start\r
5490opcode_E_D:\r
5491 ldrb r1,[z80pc],#1\r
5492 ldr pc,[pc,r1, lsl #2]\r
5493opcodes_ED: .word 0x00000000\r
5494 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5495 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5496 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5497 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5498 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5499 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5500 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5501 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5502 .word opcode_ED_40,opcode_ED_41,opcode_ED_42,opcode_ED_43,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_47\r
5503 .word opcode_ED_48,opcode_ED_49,opcode_ED_4A,opcode_ED_4B,opcode_ED_44,opcode_ED_4D,opcode_ED_46,opcode_ED_4F\r
5504 .word opcode_ED_50,opcode_ED_51,opcode_ED_52,opcode_ED_53,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_57\r
5505 .word opcode_ED_58,opcode_ED_59,opcode_ED_5A,opcode_ED_5B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_5F\r
5506 .word opcode_ED_60,opcode_ED_61,opcode_ED_62,opcode_ED_63,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_67\r
5507 .word opcode_ED_68,opcode_ED_69,opcode_ED_6A,opcode_ED_6B,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_6F\r
5508 .word opcode_ED_70,opcode_ED_71,opcode_ED_72,opcode_ED_73,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_NF\r
5509 .word opcode_ED_78,opcode_ED_79,opcode_ED_7A,opcode_ED_7B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_NF\r
5510 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5511 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5512 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5513 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5514 .word opcode_ED_A0,opcode_ED_A1,opcode_ED_A2,opcode_ED_A3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5515 .word opcode_ED_A8,opcode_ED_A9,opcode_ED_AA,opcode_ED_AB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5516 .word opcode_ED_B0,opcode_ED_B1,opcode_ED_B2,opcode_ED_B3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5517 .word opcode_ED_B8,opcode_ED_B9,opcode_ED_BA,opcode_ED_BB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5518 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5519 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5520 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5521 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5522 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5523 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5524 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5525 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5526\r
5527;@XOR N\r
5528opcode_E_E:\r
5529 ldrb r0,[z80pc],#1\r
5530 opXORb\r
5531 fetch 7\r
5532;@RST 28H\r
5533opcode_E_F:\r
5534 opRST 0x28\r
5535\r
5536;@RET P\r
5537opcode_F_0:\r
5538 tst z80f,#1<<SFlag\r
5539 beq opcode_C_9 ;@unconditional RET\r
5540 fetch 5\r
5541;@POP AF\r
5542opcode_F_1:\r
5543.if FAST_Z80SP\r
5544 ldrb z80f,[z80sp],#1\r
5545 sub r0,opcodes,#0x200\r
5546 ldrb z80f,[r0,z80f]\r
5547 ldrb z80a,[z80sp],#1\r
5548 mov z80a,z80a, lsl #24\r
5549.else\r
5550 mov r0,z80sp\r
5551 readmem16\r
5552 add z80sp,z80sp,#2\r
5553 and z80a,r0,#0xFF00\r
5554 mov z80a,z80a,lsl#16\r
5555 and z80f,r0,#0xFF\r
5556 sub r0,opcodes,#0x200\r
5557 ldrb z80f,[r0,z80f]\r
5558.endif\r
5559 fetch 10\r
5560;@JP P,$+3\r
5561opcode_F_2:\r
5562 tst z80f,#1<<SFlag\r
5563 beq opcode_C_3 ;@unconditional JP\r
5564 add z80pc,z80pc,#2\r
5565 fetch 10\r
5566;@DI\r
5567opcode_F_3:\r
5568 ldrb r1,[cpucontext,#z80if]\r
5569 bic r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5570 strb r1,[cpucontext,#z80if]\r
5571 fetch 4\r
5572;@CALL P,NN\r
5573opcode_F_4:\r
5574 tst z80f,#1<<SFlag\r
5575 beq opcode_C_D ;@unconditional CALL\r
5576 add z80pc,z80pc,#2\r
5577 fetch 10\r
5578;@PUSH AF\r
5579opcode_F_5:\r
5580 sub r0,opcodes,#0x300\r
5581 ldrb r0,[r0,z80f]\r
5582 orr r2,r0,z80a,lsr#16\r
5583 opPUSHareg r2\r
5584 fetch 11\r
5585;@OR N\r
5586opcode_F_6:\r
5587 ldrb r0,[z80pc],#1\r
5588 opORb\r
5589 fetch 7\r
5590;@RST 30H\r
5591opcode_F_7:\r
5592 opRST 0x30\r
5593\r
5594;@RET M\r
5595opcode_F_8:\r
5596 tst z80f,#1<<SFlag\r
5597 bne opcode_C_9 ;@unconditional RET\r
5598 fetch 5\r
5599;@LD SP,HL\r
5600opcode_F_9:\r
5601.if FAST_Z80SP\r
5602 mov r0,z80hl, lsr #16\r
5603 rebasesp\r
5604 mov z80sp,r0\r
5605.else\r
5606 mov z80sp,z80hl, lsr #16\r
5607.endif\r
5608 fetch 4\r
5609;@JP M,$+3\r
5610opcode_F_A:\r
5611 tst z80f,#1<<SFlag\r
5612 bne opcode_C_3 ;@unconditional JP\r
5613 add z80pc,z80pc,#2\r
5614 fetch 10\r
5615MAIN_opcodes_POINTER: .word MAIN_opcodes\r
5616EI_DUMMY_opcodes_POINTER: .word EI_DUMMY_opcodes\r
5617;@EI\r
5618opcode_F_B:\r
5619 ldrb r1,[cpucontext,#z80if]\r
5620 tst r1,#Z80_IF1\r
5621 bne ei_return_exit\r
5622\r
5623 orr r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5624 strb r1,[cpucontext,#z80if]\r
5625\r
5626 mov r2,opcodes\r
5627 ldr opcodes,EI_DUMMY_opcodes_POINTER\r
5628 ldr pc,[r2,r0, lsl #2]\r
5629\r
5630ei_return:\r
5631 ;@point that program returns from EI to check interupts\r
5632 ;@an interupt can not be taken directly after a EI opcode\r
5633 ;@ reset z80pc and opcode pointer\r
5634 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
5635 sub z80pc,z80pc,#1\r
5636 ldr opcodes,MAIN_opcodes_POINTER\r
5637 ;@ check ints\r
5638 tst r0,#1\r
5639 movnes r0,r0,lsr #8\r
5640 blne DoInterrupt\r
5641 ;@ continue\r
5642ei_return_exit:\r
5643 fetch 4\r
5644\r
5645;@CALL M,NN\r
5646opcode_F_C:\r
5647 tst z80f,#1<<SFlag\r
5648 bne opcode_C_D ;@unconditional CALL\r
5649 add z80pc,z80pc,#2\r
5650 fetch 10\r
5651\r
5652;@SHOULD BE CAUGHT AT START - FD SECTION\r
5653\r
5654;@CP N\r
5655opcode_F_E:\r
5656 ldrb r0,[z80pc],#1\r
5657 opCPb\r
5658 fetch 7\r
5659;@RST 38H\r
5660opcode_F_F:\r
5661 opRST 0x38\r
5662\r
5663\r
5664;@##################################\r
5665;@##################################\r
5666;@### opcodes CB #########################\r
5667;@##################################\r
5668;@##################################\r
5669\r
5670\r
5671;@RLC B\r
5672opcode_CB_00:\r
5673 opRLCH z80bc\r
5674;@RLC C\r
5675opcode_CB_01:\r
5676 opRLCL z80bc\r
5677;@RLC D\r
5678opcode_CB_02:\r
5679 opRLCH z80de\r
5680;@RLC E\r
5681opcode_CB_03:\r
5682 opRLCL z80de\r
5683;@RLC H\r
5684opcode_CB_04:\r
5685 opRLCH z80hl\r
5686;@RLC L\r
5687opcode_CB_05:\r
5688 opRLCL z80hl\r
5689;@RLC (HL)\r
5690opcode_CB_06:\r
5691 readmem8HL\r
5692 opRLCb\r
5693 writemem8HL\r
5694 fetch 15\r
5695;@RLC A\r
5696opcode_CB_07:\r
5697 opRLCA\r
5698\r
5699;@RRC B\r
5700opcode_CB_08:\r
5701 opRRCH z80bc\r
5702;@RRC C\r
5703opcode_CB_09:\r
5704 opRRCL z80bc\r
5705;@RRC D\r
5706opcode_CB_0A:\r
5707 opRRCH z80de\r
5708;@RRC E\r
5709opcode_CB_0B:\r
5710 opRRCL z80de\r
5711;@RRC H\r
5712opcode_CB_0C:\r
5713 opRRCH z80hl\r
5714;@RRC L\r
5715opcode_CB_0D:\r
5716 opRRCL z80hl\r
5717;@RRC (HL)\r
5718opcode_CB_0E :\r
5719 readmem8HL\r
5720 opRRCb\r
5721 writemem8HL\r
5722 fetch 15\r
5723;@RRC A\r
5724opcode_CB_0F:\r
5725 opRRCA\r
5726\r
5727;@RL B\r
5728opcode_CB_10:\r
5729 opRLH z80bc\r
5730;@RL C\r
5731opcode_CB_11:\r
5732 opRLL z80bc\r
5733;@RL D\r
5734opcode_CB_12:\r
5735 opRLH z80de\r
5736;@RL E\r
5737opcode_CB_13:\r
5738 opRLL z80de\r
5739;@RL H\r
5740opcode_CB_14:\r
5741 opRLH z80hl\r
5742;@RL L\r
5743opcode_CB_15:\r
5744 opRLL z80hl\r
5745;@RL (HL)\r
5746opcode_CB_16:\r
5747 readmem8HL\r
5748 opRLb\r
5749 writemem8HL\r
5750 fetch 15\r
5751;@RL A\r
5752opcode_CB_17:\r
5753 opRLA\r
5754\r
5755;@RR B \r
5756opcode_CB_18:\r
5757 opRRH z80bc\r
5758;@RR C\r
5759opcode_CB_19:\r
5760 opRRL z80bc\r
5761;@RR D\r
5762opcode_CB_1A:\r
5763 opRRH z80de\r
5764;@RR E\r
5765opcode_CB_1B:\r
5766 opRRL z80de\r
5767;@RR H\r
5768opcode_CB_1C:\r
5769 opRRH z80hl\r
5770;@RR L\r
5771opcode_CB_1D:\r
5772 opRRL z80hl\r
5773;@RR (HL)\r
5774opcode_CB_1E:\r
5775 readmem8HL\r
5776 opRRb\r
5777 writemem8HL\r
5778 fetch 15\r
5779;@RR A\r
5780opcode_CB_1F:\r
5781 opRRA\r
5782\r
5783;@SLA B\r
5784opcode_CB_20:\r
5785 opSLAH z80bc\r
5786;@SLA C\r
5787opcode_CB_21:\r
5788 opSLAL z80bc\r
5789;@SLA D\r
5790opcode_CB_22:\r
5791 opSLAH z80de\r
5792;@SLA E\r
5793opcode_CB_23:\r
5794 opSLAL z80de\r
5795;@SLA H\r
5796opcode_CB_24:\r
5797 opSLAH z80hl\r
5798;@SLA L\r
5799opcode_CB_25:\r
5800 opSLAL z80hl\r
5801;@SLA (HL)\r
5802opcode_CB_26:\r
5803 readmem8HL\r
5804 opSLAb\r
5805 writemem8HL\r
5806 fetch 15\r
5807;@SLA A\r
5808opcode_CB_27:\r
5809 opSLAA\r
5810\r
5811;@SRA B\r
5812opcode_CB_28:\r
5813 opSRAH z80bc\r
5814;@SRA C\r
5815opcode_CB_29:\r
5816 opSRAL z80bc\r
5817;@SRA D\r
5818opcode_CB_2A:\r
5819 opSRAH z80de\r
5820;@SRA E\r
5821opcode_CB_2B:\r
5822 opSRAL z80de\r
5823;@SRA H\r
5824opcode_CB_2C:\r
5825 opSRAH z80hl\r
5826;@SRA L\r
5827opcode_CB_2D:\r
5828 opSRAL z80hl\r
5829;@SRA (HL)\r
5830opcode_CB_2E:\r
5831 readmem8HL\r
5832 opSRAb\r
5833 writemem8HL\r
5834 fetch 15\r
5835;@SRA A\r
5836opcode_CB_2F:\r
5837 opSRAA\r
5838\r
5839;@SLL B\r
5840opcode_CB_30:\r
5841 opSLLH z80bc\r
5842;@SLL C\r
5843opcode_CB_31:\r
5844 opSLLL z80bc\r
5845;@SLL D\r
5846opcode_CB_32:\r
5847 opSLLH z80de\r
5848;@SLL E\r
5849opcode_CB_33:\r
5850 opSLLL z80de\r
5851;@SLL H\r
5852opcode_CB_34:\r
5853 opSLLH z80hl\r
5854;@SLL L\r
5855opcode_CB_35:\r
5856 opSLLL z80hl\r
5857;@SLL (HL)\r
5858opcode_CB_36:\r
5859 readmem8HL\r
5860 opSLLb\r
5861 writemem8HL\r
5862 fetch 15\r
5863;@SLL A\r
5864opcode_CB_37:\r
5865 opSLLA\r
5866\r
5867;@SRL B\r
5868opcode_CB_38:\r
5869 opSRLH z80bc\r
5870;@SRL C\r
5871opcode_CB_39:\r
5872 opSRLL z80bc\r
5873;@SRL D\r
5874opcode_CB_3A:\r
5875 opSRLH z80de\r
5876;@SRL E\r
5877opcode_CB_3B:\r
5878 opSRLL z80de\r
5879;@SRL H\r
5880opcode_CB_3C:\r
5881 opSRLH z80hl\r
5882;@SRL L\r
5883opcode_CB_3D:\r
5884 opSRLL z80hl\r
5885;@SRL (HL)\r
5886opcode_CB_3E:\r
5887 readmem8HL\r
5888 opSRLb\r
5889 writemem8HL\r
5890 fetch 15\r
5891;@SRL A\r
5892opcode_CB_3F:\r
5893 opSRLA\r
5894\r
5895\r
5896;@BIT 0,B\r
5897opcode_CB_40:\r
5898 opBITH z80bc 0\r
5899;@BIT 0,C\r
5900opcode_CB_41:\r
5901 opBITL z80bc 0\r
5902;@BIT 0,D\r
5903opcode_CB_42:\r
5904 opBITH z80de 0\r
5905;@BIT 0,E\r
5906opcode_CB_43:\r
5907 opBITL z80de 0\r
5908;@BIT 0,H\r
5909opcode_CB_44:\r
5910 opBITH z80hl 0\r
5911;@BIT 0,L\r
5912opcode_CB_45:\r
5913 opBITL z80hl 0\r
5914;@BIT 0,(HL)\r
5915opcode_CB_46:\r
5916 readmem8HL\r
5917 opBITb 0\r
5918 fetch 12\r
5919;@BIT 0,A\r
5920opcode_CB_47:\r
5921 opBITH z80a 0\r
5922\r
5923;@BIT 1,B\r
5924opcode_CB_48:\r
5925 opBITH z80bc 1\r
5926;@BIT 1,C\r
5927opcode_CB_49:\r
5928 opBITL z80bc 1\r
5929;@BIT 1,D\r
5930opcode_CB_4A:\r
5931 opBITH z80de 1\r
5932;@BIT 1,E\r
5933opcode_CB_4B:\r
5934 opBITL z80de 1\r
5935;@BIT 1,H\r
5936opcode_CB_4C:\r
5937 opBITH z80hl 1\r
5938;@BIT 1,L\r
5939opcode_CB_4D:\r
5940 opBITL z80hl 1\r
5941;@BIT 1,(HL)\r
5942opcode_CB_4E:\r
5943 readmem8HL\r
5944 opBITb 1\r
5945 fetch 12\r
5946;@BIT 1,A\r
5947opcode_CB_4F:\r
5948 opBITH z80a 1\r
5949\r
5950;@BIT 2,B\r
5951opcode_CB_50:\r
5952 opBITH z80bc 2\r
5953;@BIT 2,C\r
5954opcode_CB_51:\r
5955 opBITL z80bc 2\r
5956;@BIT 2,D\r
5957opcode_CB_52:\r
5958 opBITH z80de 2\r
5959;@BIT 2,E\r
5960opcode_CB_53:\r
5961 opBITL z80de 2\r
5962;@BIT 2,H\r
5963opcode_CB_54:\r
5964 opBITH z80hl 2\r
5965;@BIT 2,L\r
5966opcode_CB_55:\r
5967 opBITL z80hl 2\r
5968;@BIT 2,(HL)\r
5969opcode_CB_56:\r
5970 readmem8HL\r
5971 opBITb 2\r
5972 fetch 12\r
5973;@BIT 2,A\r
5974opcode_CB_57:\r
5975 opBITH z80a 2\r
5976\r
5977;@BIT 3,B\r
5978opcode_CB_58:\r
5979 opBITH z80bc 3\r
5980;@BIT 3,C\r
5981opcode_CB_59:\r
5982 opBITL z80bc 3\r
5983;@BIT 3,D\r
5984opcode_CB_5A:\r
5985 opBITH z80de 3\r
5986;@BIT 3,E\r
5987opcode_CB_5B:\r
5988 opBITL z80de 3\r
5989;@BIT 3,H\r
5990opcode_CB_5C:\r
5991 opBITH z80hl 3\r
5992;@BIT 3,L\r
5993opcode_CB_5D:\r
5994 opBITL z80hl 3\r
5995;@BIT 3,(HL)\r
5996opcode_CB_5E:\r
5997 readmem8HL\r
5998 opBITb 3\r
5999 fetch 12\r
6000;@BIT 3,A\r
6001opcode_CB_5F:\r
6002 opBITH z80a 3\r
6003\r
6004;@BIT 4,B\r
6005opcode_CB_60:\r
6006 opBITH z80bc 4\r
6007;@BIT 4,C\r
6008opcode_CB_61:\r
6009 opBITL z80bc 4\r
6010;@BIT 4,D\r
6011opcode_CB_62:\r
6012 opBITH z80de 4\r
6013;@BIT 4,E\r
6014opcode_CB_63:\r
6015 opBITL z80de 4\r
6016;@BIT 4,H\r
6017opcode_CB_64:\r
6018 opBITH z80hl 4\r
6019;@BIT 4,L\r
6020opcode_CB_65:\r
6021 opBITL z80hl 4\r
6022;@BIT 4,(HL)\r
6023opcode_CB_66:\r
6024 readmem8HL\r
6025 opBITb 4\r
6026 fetch 12\r
6027;@BIT 4,A\r
6028opcode_CB_67:\r
6029 opBITH z80a 4\r
6030\r
6031;@BIT 5,B\r
6032opcode_CB_68:\r
6033 opBITH z80bc 5\r
6034;@BIT 5,C\r
6035opcode_CB_69:\r
6036 opBITL z80bc 5\r
6037;@BIT 5,D\r
6038opcode_CB_6A:\r
6039 opBITH z80de 5\r
6040;@BIT 5,E\r
6041opcode_CB_6B:\r
6042 opBITL z80de 5\r
6043;@BIT 5,H\r
6044opcode_CB_6C:\r
6045 opBITH z80hl 5\r
6046;@BIT 5,L\r
6047opcode_CB_6D:\r
6048 opBITL z80hl 5\r
6049;@BIT 5,(HL)\r
6050opcode_CB_6E:\r
6051 readmem8HL\r
6052 opBITb 5\r
6053 fetch 12\r
6054;@BIT 5,A\r
6055opcode_CB_6F:\r
6056 opBITH z80a 5\r
6057\r
6058;@BIT 6,B\r
6059opcode_CB_70:\r
6060 opBITH z80bc 6\r
6061;@BIT 6,C\r
6062opcode_CB_71:\r
6063 opBITL z80bc 6\r
6064;@BIT 6,D\r
6065opcode_CB_72:\r
6066 opBITH z80de 6\r
6067;@BIT 6,E\r
6068opcode_CB_73:\r
6069 opBITL z80de 6\r
6070;@BIT 6,H\r
6071opcode_CB_74:\r
6072 opBITH z80hl 6\r
6073;@BIT 6,L\r
6074opcode_CB_75:\r
6075 opBITL z80hl 6\r
6076;@BIT 6,(HL)\r
6077opcode_CB_76:\r
6078 readmem8HL\r
6079 opBITb 6\r
6080 fetch 12\r
6081;@BIT 6,A\r
6082opcode_CB_77:\r
6083 opBITH z80a 6\r
6084\r
6085;@BIT 7,B\r
6086opcode_CB_78:\r
6087 opBIT7H z80bc\r
6088;@BIT 7,C\r
6089opcode_CB_79:\r
6090 opBIT7L z80bc\r
6091;@BIT 7,D\r
6092opcode_CB_7A:\r
6093 opBIT7H z80de\r
6094;@BIT 7,E\r
6095opcode_CB_7B:\r
6096 opBIT7L z80de\r
6097;@BIT 7,H\r
6098opcode_CB_7C:\r
6099 opBIT7H z80hl\r
6100;@BIT 7,L\r
6101opcode_CB_7D:\r
6102 opBIT7L z80hl\r
6103;@BIT 7,(HL)\r
6104opcode_CB_7E:\r
6105 readmem8HL\r
6106 opBIT7b\r
6107 fetch 12\r
6108;@BIT 7,A\r
6109opcode_CB_7F:\r
6110 opBIT7H z80a\r
6111\r
6112;@RES 0,B\r
6113opcode_CB_80:\r
6114 bic z80bc,z80bc,#1<<24\r
6115 fetch 8\r
6116;@RES 0,C\r
6117opcode_CB_81:\r
6118 bic z80bc,z80bc,#1<<16\r
6119 fetch 8\r
6120;@RES 0,D\r
6121opcode_CB_82:\r
6122 bic z80de,z80de,#1<<24\r
6123 fetch 8\r
6124;@RES 0,E\r
6125opcode_CB_83:\r
6126 bic z80de,z80de,#1<<16\r
6127 fetch 8\r
6128;@RES 0,H\r
6129opcode_CB_84:\r
6130 bic z80hl,z80hl,#1<<24\r
6131 fetch 8\r
6132;@RES 0,L\r
6133opcode_CB_85:\r
6134 bic z80hl,z80hl,#1<<16\r
6135 fetch 8\r
6136;@RES 0,(HL)\r
6137opcode_CB_86:\r
6138 opRESmemHL 0\r
6139;@RES 0,A\r
6140opcode_CB_87:\r
6141 bic z80a,z80a,#1<<24\r
6142 fetch 8\r
6143\r
6144;@RES 1,B\r
6145opcode_CB_88:\r
6146 bic z80bc,z80bc,#1<<25\r
6147 fetch 8\r
6148;@RES 1,C\r
6149opcode_CB_89:\r
6150 bic z80bc,z80bc,#1<<17\r
6151 fetch 8\r
6152;@RES 1,D\r
6153opcode_CB_8A:\r
6154 bic z80de,z80de,#1<<25\r
6155 fetch 8\r
6156;@RES 1,E\r
6157opcode_CB_8B:\r
6158 bic z80de,z80de,#1<<17\r
6159 fetch 8\r
6160;@RES 1,H\r
6161opcode_CB_8C:\r
6162 bic z80hl,z80hl,#1<<25\r
6163 fetch 8\r
6164;@RES 1,L\r
6165opcode_CB_8D:\r
6166 bic z80hl,z80hl,#1<<17\r
6167 fetch 8\r
6168;@RES 1,(HL)\r
6169opcode_CB_8E:\r
6170 opRESmemHL 1\r
6171;@RES 1,A\r
6172opcode_CB_8F:\r
6173 bic z80a,z80a,#1<<25\r
6174 fetch 8\r
6175\r
6176;@RES 2,B\r
6177opcode_CB_90:\r
6178 bic z80bc,z80bc,#1<<26\r
6179 fetch 8\r
6180;@RES 2,C\r
6181opcode_CB_91:\r
6182 bic z80bc,z80bc,#1<<18\r
6183 fetch 8\r
6184;@RES 2,D\r
6185opcode_CB_92:\r
6186 bic z80de,z80de,#1<<26\r
6187 fetch 8\r
6188;@RES 2,E\r
6189opcode_CB_93:\r
6190 bic z80de,z80de,#1<<18\r
6191 fetch 8\r
6192;@RES 2,H\r
6193opcode_CB_94:\r
6194 bic z80hl,z80hl,#1<<26\r
6195 fetch 8\r
6196;@RES 2,L\r
6197opcode_CB_95:\r
6198 bic z80hl,z80hl,#1<<18\r
6199 fetch 8\r
6200;@RES 2,(HL)\r
6201opcode_CB_96:\r
6202 opRESmemHL 2\r
6203;@RES 2,A\r
6204opcode_CB_97:\r
6205 bic z80a,z80a,#1<<26\r
6206 fetch 8\r
6207\r
6208;@RES 3,B\r
6209opcode_CB_98:\r
6210 bic z80bc,z80bc,#1<<27\r
6211 fetch 8\r
6212;@RES 3,C\r
6213opcode_CB_99:\r
6214 bic z80bc,z80bc,#1<<19\r
6215 fetch 8\r
6216;@RES 3,D\r
6217opcode_CB_9A:\r
6218 bic z80de,z80de,#1<<27\r
6219 fetch 8\r
6220;@RES 3,E\r
6221opcode_CB_9B:\r
6222 bic z80de,z80de,#1<<19\r
6223 fetch 8\r
6224;@RES 3,H\r
6225opcode_CB_9C:\r
6226 bic z80hl,z80hl,#1<<27\r
6227 fetch 8\r
6228;@RES 3,L\r
6229opcode_CB_9D:\r
6230 bic z80hl,z80hl,#1<<19\r
6231 fetch 8\r
6232;@RES 3,(HL)\r
6233opcode_CB_9E:\r
6234 opRESmemHL 3\r
6235;@RES 3,A\r
6236opcode_CB_9F:\r
6237 bic z80a,z80a,#1<<27\r
6238 fetch 8\r
6239\r
6240;@RES 4,B\r
6241opcode_CB_A0:\r
6242 bic z80bc,z80bc,#1<<28\r
6243 fetch 8\r
6244;@RES 4,C\r
6245opcode_CB_A1:\r
6246 bic z80bc,z80bc,#1<<20\r
6247 fetch 8\r
6248;@RES 4,D\r
6249opcode_CB_A2:\r
6250 bic z80de,z80de,#1<<28\r
6251 fetch 8\r
6252;@RES 4,E\r
6253opcode_CB_A3:\r
6254 bic z80de,z80de,#1<<20\r
6255 fetch 8\r
6256;@RES 4,H\r
6257opcode_CB_A4:\r
6258 bic z80hl,z80hl,#1<<28\r
6259 fetch 8\r
6260;@RES 4,L\r
6261opcode_CB_A5:\r
6262 bic z80hl,z80hl,#1<<20\r
6263 fetch 8\r
6264;@RES 4,(HL)\r
6265opcode_CB_A6:\r
6266 opRESmemHL 4\r
6267;@RES 4,A\r
6268opcode_CB_A7:\r
6269 bic z80a,z80a,#1<<28\r
6270 fetch 8\r
6271\r
6272;@RES 5,B\r
6273opcode_CB_A8:\r
6274 bic z80bc,z80bc,#1<<29\r
6275 fetch 8\r
6276;@RES 5,C\r
6277opcode_CB_A9:\r
6278 bic z80bc,z80bc,#1<<21\r
6279 fetch 8\r
6280;@RES 5,D\r
6281opcode_CB_AA:\r
6282 bic z80de,z80de,#1<<29\r
6283 fetch 8\r
6284;@RES 5,E\r
6285opcode_CB_AB:\r
6286 bic z80de,z80de,#1<<21\r
6287 fetch 8\r
6288;@RES 5,H\r
6289opcode_CB_AC:\r
6290 bic z80hl,z80hl,#1<<29\r
6291 fetch 8\r
6292;@RES 5,L\r
6293opcode_CB_AD:\r
6294 bic z80hl,z80hl,#1<<21\r
6295 fetch 8\r
6296;@RES 5,(HL)\r
6297opcode_CB_AE:\r
6298 opRESmemHL 5\r
6299;@RES 5,A\r
6300opcode_CB_AF:\r
6301 bic z80a,z80a,#1<<29\r
6302 fetch 8\r
6303\r
6304;@RES 6,B\r
6305opcode_CB_B0:\r
6306 bic z80bc,z80bc,#1<<30\r
6307 fetch 8\r
6308;@RES 6,C\r
6309opcode_CB_B1:\r
6310 bic z80bc,z80bc,#1<<22\r
6311 fetch 8\r
6312;@RES 6,D\r
6313opcode_CB_B2:\r
6314 bic z80de,z80de,#1<<30\r
6315 fetch 8\r
6316;@RES 6,E\r
6317opcode_CB_B3:\r
6318 bic z80de,z80de,#1<<22\r
6319 fetch 8\r
6320;@RES 6,H\r
6321opcode_CB_B4:\r
6322 bic z80hl,z80hl,#1<<30\r
6323 fetch 8\r
6324;@RES 6,L\r
6325opcode_CB_B5:\r
6326 bic z80hl,z80hl,#1<<22\r
6327 fetch 8\r
6328;@RES 6,(HL)\r
6329opcode_CB_B6:\r
6330 opRESmemHL 6\r
6331;@RES 6,A\r
6332opcode_CB_B7:\r
6333 bic z80a,z80a,#1<<30\r
6334 fetch 8\r
6335\r
6336;@RES 7,B\r
6337opcode_CB_B8:\r
6338 bic z80bc,z80bc,#1<<31\r
6339 fetch 8\r
6340;@RES 7,C\r
6341opcode_CB_B9:\r
6342 bic z80bc,z80bc,#1<<23\r
6343 fetch 8\r
6344;@RES 7,D\r
6345opcode_CB_BA:\r
6346 bic z80de,z80de,#1<<31\r
6347 fetch 8\r
6348;@RES 7,E\r
6349opcode_CB_BB:\r
6350 bic z80de,z80de,#1<<23\r
6351 fetch 8\r
6352;@RES 7,H\r
6353opcode_CB_BC:\r
6354 bic z80hl,z80hl,#1<<31\r
6355 fetch 8\r
6356;@RES 7,L\r
6357opcode_CB_BD:\r
6358 bic z80hl,z80hl,#1<<23\r
6359 fetch 8\r
6360;@RES 7,(HL)\r
6361opcode_CB_BE:\r
6362 opRESmemHL 7\r
6363;@RES 7,A\r
6364opcode_CB_BF:\r
6365 bic z80a,z80a,#1<<31\r
6366 fetch 8\r
6367\r
6368;@SET 0,B\r
6369opcode_CB_C0:\r
6370 orr z80bc,z80bc,#1<<24\r
6371 fetch 8\r
6372;@SET 0,C\r
6373opcode_CB_C1:\r
6374 orr z80bc,z80bc,#1<<16\r
6375 fetch 8\r
6376;@SET 0,D\r
6377opcode_CB_C2:\r
6378 orr z80de,z80de,#1<<24\r
6379 fetch 8\r
6380;@SET 0,E\r
6381opcode_CB_C3:\r
6382 orr z80de,z80de,#1<<16\r
6383 fetch 8\r
6384;@SET 0,H\r
6385opcode_CB_C4:\r
6386 orr z80hl,z80hl,#1<<24\r
6387 fetch 8\r
6388;@SET 0,L\r
6389opcode_CB_C5:\r
6390 orr z80hl,z80hl,#1<<16\r
6391 fetch 8\r
6392;@SET 0,(HL)\r
6393opcode_CB_C6:\r
6394 opSETmemHL 0\r
6395;@SET 0,A\r
6396opcode_CB_C7:\r
6397 orr z80a,z80a,#1<<24\r
6398 fetch 8\r
6399\r
6400;@SET 1,B\r
6401opcode_CB_C8:\r
6402 orr z80bc,z80bc,#1<<25\r
6403 fetch 8\r
6404;@SET 1,C\r
6405opcode_CB_C9:\r
6406 orr z80bc,z80bc,#1<<17\r
6407 fetch 8\r
6408;@SET 1,D\r
6409opcode_CB_CA:\r
6410 orr z80de,z80de,#1<<25\r
6411 fetch 8\r
6412;@SET 1,E\r
6413opcode_CB_CB:\r
6414 orr z80de,z80de,#1<<17\r
6415 fetch 8\r
6416;@SET 1,H\r
6417opcode_CB_CC:\r
6418 orr z80hl,z80hl,#1<<25\r
6419 fetch 8\r
6420;@SET 1,L\r
6421opcode_CB_CD:\r
6422 orr z80hl,z80hl,#1<<17\r
6423 fetch 8\r
6424;@SET 1,(HL)\r
6425opcode_CB_CE:\r
6426 opSETmemHL 1\r
6427;@SET 1,A\r
6428opcode_CB_CF:\r
6429 orr z80a,z80a,#1<<25\r
6430 fetch 8\r
6431\r
6432;@SET 2,B\r
6433opcode_CB_D0:\r
6434 orr z80bc,z80bc,#1<<26\r
6435 fetch 8\r
6436;@SET 2,C\r
6437opcode_CB_D1:\r
6438 orr z80bc,z80bc,#1<<18\r
6439 fetch 8\r
6440;@SET 2,D\r
6441opcode_CB_D2:\r
6442 orr z80de,z80de,#1<<26\r
6443 fetch 8\r
6444;@SET 2,E\r
6445opcode_CB_D3:\r
6446 orr z80de,z80de,#1<<18\r
6447 fetch 8\r
6448;@SET 2,H\r
6449opcode_CB_D4:\r
6450 orr z80hl,z80hl,#1<<26\r
6451 fetch 8\r
6452;@SET 2,L\r
6453opcode_CB_D5:\r
6454 orr z80hl,z80hl,#1<<18\r
6455 fetch 8\r
6456;@SET 2,(HL)\r
6457opcode_CB_D6:\r
6458 opSETmemHL 2\r
6459;@SET 2,A\r
6460opcode_CB_D7:\r
6461 orr z80a,z80a,#1<<26\r
6462 fetch 8\r
6463\r
6464;@SET 3,B\r
6465opcode_CB_D8:\r
6466 orr z80bc,z80bc,#1<<27\r
6467 fetch 8\r
6468;@SET 3,C\r
6469opcode_CB_D9:\r
6470 orr z80bc,z80bc,#1<<19\r
6471 fetch 8\r
6472;@SET 3,D\r
6473opcode_CB_DA:\r
6474 orr z80de,z80de,#1<<27\r
6475 fetch 8\r
6476;@SET 3,E\r
6477opcode_CB_DB:\r
6478 orr z80de,z80de,#1<<19\r
6479 fetch 8\r
6480;@SET 3,H\r
6481opcode_CB_DC:\r
6482 orr z80hl,z80hl,#1<<27\r
6483 fetch 8\r
6484;@SET 3,L\r
6485opcode_CB_DD:\r
6486 orr z80hl,z80hl,#1<<19\r
6487 fetch 8\r
6488;@SET 3,(HL)\r
6489opcode_CB_DE:\r
6490 opSETmemHL 3\r
6491;@SET 3,A\r
6492opcode_CB_DF:\r
6493 orr z80a,z80a,#1<<27\r
6494 fetch 8\r
6495\r
6496;@SET 4,B\r
6497opcode_CB_E0:\r
6498 orr z80bc,z80bc,#1<<28\r
6499 fetch 8\r
6500;@SET 4,C\r
6501opcode_CB_E1:\r
6502 orr z80bc,z80bc,#1<<20\r
6503 fetch 8\r
6504;@SET 4,D\r
6505opcode_CB_E2:\r
6506 orr z80de,z80de,#1<<28\r
6507 fetch 8\r
6508;@SET 4,E\r
6509opcode_CB_E3:\r
6510 orr z80de,z80de,#1<<20\r
6511 fetch 8\r
6512;@SET 4,H\r
6513opcode_CB_E4:\r
6514 orr z80hl,z80hl,#1<<28\r
6515 fetch 8\r
6516;@SET 4,L\r
6517opcode_CB_E5:\r
6518 orr z80hl,z80hl,#1<<20\r
6519 fetch 8\r
6520;@SET 4,(HL)\r
6521opcode_CB_E6:\r
6522 opSETmemHL 4\r
6523;@SET 4,A\r
6524opcode_CB_E7:\r
6525 orr z80a,z80a,#1<<28\r
6526 fetch 8\r
6527\r
6528;@SET 5,B\r
6529opcode_CB_E8:\r
6530 orr z80bc,z80bc,#1<<29\r
6531 fetch 8\r
6532;@SET 5,C\r
6533opcode_CB_E9:\r
6534 orr z80bc,z80bc,#1<<21\r
6535 fetch 8\r
6536;@SET 5,D\r
6537opcode_CB_EA:\r
6538 orr z80de,z80de,#1<<29\r
6539 fetch 8\r
6540;@SET 5,E\r
6541opcode_CB_EB:\r
6542 orr z80de,z80de,#1<<21\r
6543 fetch 8\r
6544;@SET 5,H\r
6545opcode_CB_EC:\r
6546 orr z80hl,z80hl,#1<<29\r
6547 fetch 8\r
6548;@SET 5,L\r
6549opcode_CB_ED:\r
6550 orr z80hl,z80hl,#1<<21\r
6551 fetch 8\r
6552;@SET 5,(HL)\r
6553opcode_CB_EE:\r
6554 opSETmemHL 5\r
6555;@SET 5,A\r
6556opcode_CB_EF:\r
6557 orr z80a,z80a,#1<<29\r
6558 fetch 8\r
6559\r
6560;@SET 6,B\r
6561opcode_CB_F0:\r
6562 orr z80bc,z80bc,#1<<30\r
6563 fetch 8\r
6564;@SET 6,C\r
6565opcode_CB_F1:\r
6566 orr z80bc,z80bc,#1<<22\r
6567 fetch 8\r
6568;@SET 6,D\r
6569opcode_CB_F2:\r
6570 orr z80de,z80de,#1<<30\r
6571 fetch 8\r
6572;@SET 6,E\r
6573opcode_CB_F3:\r
6574 orr z80de,z80de,#1<<22\r
6575 fetch 8\r
6576;@SET 6,H\r
6577opcode_CB_F4:\r
6578 orr z80hl,z80hl,#1<<30\r
6579 fetch 8\r
6580;@SET 6,L\r
6581opcode_CB_F5:\r
6582 orr z80hl,z80hl,#1<<22\r
6583 fetch 8\r
6584;@SET 6,(HL)\r
6585opcode_CB_F6:\r
6586 opSETmemHL 6\r
6587;@SET 6,A\r
6588opcode_CB_F7:\r
6589 orr z80a,z80a,#1<<30\r
6590 fetch 8\r
6591\r
6592;@SET 7,B\r
6593opcode_CB_F8:\r
6594 orr z80bc,z80bc,#1<<31\r
6595 fetch 8\r
6596;@SET 7,C\r
6597opcode_CB_F9:\r
6598 orr z80bc,z80bc,#1<<23\r
6599 fetch 8\r
6600;@SET 7,D\r
6601opcode_CB_FA:\r
6602 orr z80de,z80de,#1<<31\r
6603 fetch 8\r
6604;@SET 7,E\r
6605opcode_CB_FB:\r
6606 orr z80de,z80de,#1<<23\r
6607 fetch 8\r
6608;@SET 7,H\r
6609opcode_CB_FC:\r
6610 orr z80hl,z80hl,#1<<31\r
6611 fetch 8\r
6612;@SET 7,L\r
6613opcode_CB_FD:\r
6614 orr z80hl,z80hl,#1<<23\r
6615 fetch 8\r
6616;@SET 7,(HL)\r
6617opcode_CB_FE:\r
6618 opSETmemHL 7\r
6619;@SET 7,A\r
6620opcode_CB_FF:\r
6621 orr z80a,z80a,#1<<31\r
6622 fetch 8\r
6623\r
6624\r
6625\r
6626;@##################################\r
6627;@##################################\r
6628;@### opcodes DD #########################\r
6629;@##################################\r
6630;@##################################\r
6631;@Because the DD opcodes are not a complete range from 00-FF I have\r
6632;@created this sub routine that will catch any undocumented ops\r
6633;@halt the emulator and mov the current instruction to r0\r
6634;@at a later stage I may change to display a text message on the screen\r
6635opcode_DD_NF:\r
6636 eatcycles 4\r
6637 ldr pc,[opcodes,r0, lsl #2]\r
6638;@ mov r2,#0x10*4\r
6639;@ cmp r2,z80xx\r
6640;@ bne opcode_FD_NF\r
6641;@ mov r0,#0xDD00\r
6642;@ orr r0,r0,r1\r
6643;@ b end_loop\r
6644;@opcode_FD_NF:\r
6645;@ mov r0,#0xFD00\r
6646;@ orr r0,r0,r1\r
6647;@ b end_loop\r
f0243975 6648\r
cc68a136 6649opcode_DD_NF2:\r
f0243975 6650 fetch 15\r
6651;@ notaz: we don't want to deadlock here\r
6652;@ mov r0,#0xDD0000\r
6653;@ orr r0,r0,#0xCB00\r
6654;@ orr r0,r0,r1\r
6655;@ b end_loop\r
cc68a136 6656\r
6657;@ADD IX,BC\r
6658opcode_DD_09:\r
6659 ldr r0,[z80xx]\r
6660 opADD16 r0 z80bc\r
6661 str r0,[z80xx]\r
6662 fetch 15\r
6663;@ADD IX,DE\r
6664opcode_DD_19:\r
6665 ldr r0,[z80xx]\r
6666 opADD16 r0 z80de\r
6667 str r0,[z80xx]\r
6668 fetch 15\r
6669;@LD IX,NN\r
6670opcode_DD_21:\r
6671 ldrb r0,[z80pc],#1\r
6672 ldrb r1,[z80pc],#1\r
6673 orr r0,r0,r1, lsl #8\r
6674 strh r0,[z80xx,#2]\r
6675 fetch 14\r
6676;@LD (NN),IX\r
6677opcode_DD_22:\r
6678 ldrb r0,[z80pc],#1\r
6679 ldrb r1,[z80pc],#1\r
6680 orr r1,r0,r1, lsl #8\r
6681 ldrh r0,[z80xx,#2]\r
6682 writemem16\r
6683 fetch 20\r
6684;@INC IX\r
6685opcode_DD_23:\r
6686 ldr r0,[z80xx]\r
6687 add r0,r0,#1<<16\r
6688 str r0,[z80xx]\r
6689 fetch 10\r
6690;@INC I (IX)\r
6691opcode_DD_24:\r
6692 ldr r0,[z80xx]\r
6693 opINC8H r0\r
6694 str r0,[z80xx]\r
6695 fetch 8\r
6696;@DEC I (IX)\r
6697opcode_DD_25:\r
6698 ldr r0,[z80xx]\r
6699 opDEC8H r0\r
6700 str r0,[z80xx]\r
6701 fetch 8\r
6702;@LD I,N (IX)\r
6703opcode_DD_26:\r
6704 ldrb r0,[z80pc],#1\r
6705 strb r0,[z80xx,#3]\r
6706 fetch 11\r
6707;@ADD IX,IX\r
6708opcode_DD_29:\r
6709 ldr r0,[z80xx]\r
6710 opADD16_2 r0\r
6711 str r0,[z80xx]\r
6712 fetch 15\r
6713;@LD IX,(NN)\r
6714opcode_DD_2A:\r
6715 ldrb r0,[z80pc],#1\r
6716 ldrb r1,[z80pc],#1\r
6717 orr r0,r0,r1, lsl #8\r
6718 stmfd sp!,{z80xx}\r
6719 readmem16\r
6720 ldmfd sp!,{z80xx}\r
6721 strh r0,[z80xx,#2]\r
6722 fetch 20\r
6723;@DEC IX\r
6724opcode_DD_2B:\r
6725 ldr r0,[z80xx]\r
6726 sub r0,r0,#1<<16\r
6727 str r0,[z80xx]\r
6728 fetch 10\r
6729;@INC X (IX)\r
6730opcode_DD_2C:\r
6731 ldr r0,[z80xx]\r
6732 opINC8L r0\r
6733 str r0,[z80xx]\r
6734 fetch 8\r
6735;@DEC X (IX)\r
6736opcode_DD_2D:\r
6737 ldr r0,[z80xx]\r
6738 opDEC8L r0\r
6739 str r0,[z80xx]\r
6740 fetch 8\r
6741;@LD X,N (IX)\r
6742opcode_DD_2E:\r
6743 ldrb r0,[z80pc],#1\r
6744 strb r0,[z80xx,#2]\r
6745 fetch 11\r
6746;@INC (IX+N)\r
6747opcode_DD_34:\r
6748 ldrsb r0,[z80pc],#1\r
6749 ldr r1,[z80xx]\r
6750 add r0,r0,r1, lsr #16\r
6751 stmfd sp!,{r0} ;@ save addr\r
6752 readmem8\r
6753 opINC8b\r
6754 ldmfd sp!,{r1} ;@ restore addr into r1\r
6755 writemem8\r
6756 fetch 23\r
6757;@DEC (IX+N)\r
6758opcode_DD_35:\r
6759 ldrsb r0,[z80pc],#1\r
6760 ldr r1,[z80xx]\r
6761 add r0,r0,r1, lsr #16\r
6762 stmfd sp!,{r0} ;@ save addr\r
6763 readmem8\r
6764 opDEC8b\r
6765 ldmfd sp!,{r1} ;@ restore addr into r1\r
6766 writemem8\r
6767 fetch 23\r
6768;@LD (IX+N),N\r
6769opcode_DD_36:\r
6770 ldrsb r2,[z80pc],#1\r
6771 ldrb r0,[z80pc],#1\r
6772 ldr r1,[z80xx]\r
6773 add r1,r2,r1, lsr #16\r
6774 writemem8\r
6775 fetch 19\r
6776;@ADD IX,SP\r
6777opcode_DD_39:\r
6778 ldr r0,[z80xx]\r
6779.if FAST_Z80SP\r
6780 ldr r2,[cpucontext,#z80sp_base]\r
6781 sub r2,z80sp,r2\r
6782 opADD16s r0 r2 16\r
6783.else\r
6784 opADD16s r0 z80sp 16\r
6785.endif\r
6786 str r0,[z80xx]\r
6787 fetch 15\r
6788;@LD B,I ( IX )\r
6789opcode_DD_44:\r
6790 ldrb r0,[z80xx,#3]\r
6791 and z80bc,z80bc,#0xFF<<16\r
6792 orr z80bc,z80bc,r0, lsl #24\r
6793 fetch 8\r
6794;@LD B,X ( IX )\r
6795opcode_DD_45:\r
6796 ldrb r0,[z80xx,#2]\r
6797 and z80bc,z80bc,#0xFF<<16\r
6798 orr z80bc,z80bc,r0, lsl #24\r
6799 fetch 8\r
6800;@LD B,(IX,N)\r
6801opcode_DD_46:\r
6802 ldrsb r0,[z80pc],#1\r
6803 ldr r1,[z80xx]\r
6804 add r0,r0,r1, lsr #16\r
6805 readmem8\r
6806 and z80bc,z80bc,#0xFF<<16\r
6807 orr z80bc,z80bc,r0, lsl #24\r
6808 fetch 19\r
6809;@LD C,I (IX)\r
6810opcode_DD_4C:\r
6811 ldrb r0,[z80xx,#3]\r
6812 and z80bc,z80bc,#0xFF<<24\r
6813 orr z80bc,z80bc,r0, lsl #16\r
6814 fetch 8\r
6815;@LD C,X (IX)\r
6816opcode_DD_4D:\r
6817 ldrb r0,[z80xx,#2]\r
6818 and z80bc,z80bc,#0xFF<<24\r
6819 orr z80bc,z80bc,r0, lsl #16\r
6820 fetch 8\r
6821;@LD C,(IX,N)\r
6822opcode_DD_4E:\r
6823 ldrsb r0,[z80pc],#1\r
6824 ldr r1,[z80xx]\r
6825 add r0,r0,r1, lsr #16\r
6826 readmem8\r
6827 and z80bc,z80bc,#0xFF<<24\r
6828 orr z80bc,z80bc,r0, lsl #16\r
6829 fetch 19\r
6830\r
6831;@LD D,I (IX)\r
6832opcode_DD_54:\r
6833 ldrb r0,[z80xx,#3]\r
6834 and z80de,z80de,#0xFF<<16\r
6835 orr z80de,z80de,r0, lsl #24\r
6836 fetch 8\r
6837;@LD D,X (IX)\r
6838opcode_DD_55:\r
6839 ldrb r0,[z80xx,#2]\r
6840 and z80de,z80de,#0xFF<<16\r
6841 orr z80de,z80de,r0, lsl #24\r
6842 fetch 8\r
6843;@LD D,(IX,N)\r
6844opcode_DD_56:\r
6845 ldrsb r0,[z80pc],#1\r
6846 ldr r1,[z80xx]\r
6847 add r0,r0,r1, lsr #16\r
6848 readmem8\r
6849 and z80de,z80de,#0xFF<<16\r
6850 orr z80de,z80de,r0, lsl #24\r
6851 fetch 19\r
6852;@LD E,I (IX)\r
6853opcode_DD_5C:\r
6854 ldrb r0,[z80xx,#3]\r
6855 and z80de,z80de,#0xFF<<24\r
6856 orr z80de,z80de,r0, lsl #16\r
6857 fetch 8\r
6858;@LD E,X (IX)\r
6859opcode_DD_5D:\r
6860 ldrb r0,[z80xx,#2]\r
6861 and z80de,z80de,#0xFF<<24\r
6862 orr z80de,z80de,r0, lsl #16\r
6863 fetch 8\r
6864;@LD E,(IX,N)\r
6865opcode_DD_5E:\r
6866 ldrsb r0,[z80pc],#1\r
6867 ldr r1,[z80xx]\r
6868 add r0,r0,r1, lsr #16\r
6869 readmem8\r
6870 and z80de,z80de,#0xFF<<24\r
6871 orr z80de,z80de,r0, lsl #16\r
6872 fetch 19\r
6873;@LD I,B (IX)\r
6874opcode_DD_60:\r
6875 mov r0,z80bc,lsr#24\r
6876 strb r0,[z80xx,#3]\r
6877 fetch 8\r
6878;@LD I,C (IX)\r
6879opcode_DD_61:\r
6880 mov r0,z80bc,lsr#16\r
6881 strb r0,[z80xx,#3]\r
6882 fetch 8\r
6883;@LD I,D (IX)\r
6884opcode_DD_62:\r
6885 mov r0,z80de,lsr#24\r
6886 strb r0,[z80xx,#3]\r
6887 fetch 8\r
6888;@LD I,E (IX)\r
6889opcode_DD_63:\r
6890 mov r0,z80de,lsr#16\r
6891 strb r0,[z80xx,#3]\r
6892 fetch 8\r
6893;@LD I,I (IX)\r
6894opcode_DD_64:\r
6895 fetch 8\r
6896;@LD I,X (IX)\r
6897opcode_DD_65:\r
6898 ldrb r0,[z80xx,#2]\r
6899 strb r0,[z80xx,#3]\r
6900 fetch 8\r
6901;@LD H,(IX,N)\r
6902opcode_DD_66:\r
6903 ldrsb r0,[z80pc],#1\r
6904 ldr r1,[z80xx]\r
6905 add r0,r0,r1, lsr #16\r
6906 readmem8\r
6907 and z80hl,z80hl,#0xFF<<16\r
6908 orr z80hl,z80hl,r0, lsl #24\r
6909 fetch 19\r
6910;@LD I,A (IX)\r
6911opcode_DD_67:\r
6912 mov r0,z80a,lsr#24\r
6913 strb r0,[z80xx,#3]\r
6914 fetch 8\r
6915;@LD X,B (IX)\r
6916opcode_DD_68:\r
6917 mov r0,z80bc,lsr#24\r
6918 strb r0,[z80xx,#2]\r
6919 fetch 8\r
6920;@LD X,C (IX)\r
6921opcode_DD_69:\r
6922 mov r0,z80bc,lsr#16\r
6923 strb r0,[z80xx,#2]\r
6924 fetch 8\r
6925;@LD X,D (IX)\r
6926opcode_DD_6A:\r
6927 mov r0,z80de,lsr#24\r
6928 strb r0,[z80xx,#2]\r
6929 fetch 8\r
6930;@LD X,E (IX)\r
6931opcode_DD_6B:\r
6932 mov r0,z80de,lsr#16\r
6933 strb r0,[z80xx,#2]\r
6934 fetch 8\r
6935;@LD X,I (IX)\r
6936opcode_DD_6C:\r
6937 ldrb r0,[z80xx,#3]\r
6938 strb r0,[z80xx,#2]\r
6939 fetch 8\r
6940;@LD X,X (IX)\r
6941opcode_DD_6D:\r
6942 fetch 8\r
6943;@LD L,(IX,N)\r
6944opcode_DD_6E:\r
6945 ldrsb r0,[z80pc],#1\r
6946 ldr r1,[z80xx]\r
6947 add r0,r0,r1, lsr #16\r
6948 readmem8\r
6949 and z80hl,z80hl,#0xFF<<24\r
6950 orr z80hl,z80hl,r0, lsl #16\r
6951 fetch 19\r
6952;@LD X,A (IX)\r
6953opcode_DD_6F:\r
6954 mov r0,z80a,lsr#24\r
6955 strb r0,[z80xx,#2]\r
6956 fetch 8\r
6957\r
6958;@LD (IX,N),B\r
6959opcode_DD_70:\r
6960 ldrsb r0,[z80pc],#1\r
6961 ldr r1,[z80xx]\r
6962 add r1,r0,r1, lsr #16\r
6963 mov r0,z80bc, lsr #24\r
6964 writemem8\r
6965 fetch 19\r
6966;@LD (IX,N),C\r
6967opcode_DD_71:\r
6968 ldrsb r0,[z80pc],#1\r
6969 ldr r1,[z80xx]\r
6970 add r1,r0,r1, lsr #16\r
6971 mov r0,z80bc, lsr #16\r
6972 and r0,r0,#0xFF\r
6973 writemem8\r
6974 fetch 19\r
6975;@LD (IX,N),D\r
6976opcode_DD_72:\r
6977 ldrsb r0,[z80pc],#1\r
6978 ldr r1,[z80xx]\r
6979 add r1,r0,r1, lsr #16\r
6980 mov r0,z80de, lsr #24\r
6981 writemem8\r
6982 fetch 19\r
6983;@LD (IX,N),E\r
6984opcode_DD_73:\r
6985 ldrsb r0,[z80pc],#1\r
6986 ldr r1,[z80xx]\r
6987 add r1,r0,r1, lsr #16\r
6988 mov r0,z80de, lsr #16\r
6989 and r0,r0,#0xFF\r
6990 writemem8\r
6991 fetch 19\r
6992;@LD (IX,N),H\r
6993opcode_DD_74:\r
6994 ldrsb r0,[z80pc],#1\r
6995 ldr r1,[z80xx]\r
6996 add r1,r0,r1, lsr #16\r
6997 mov r0,z80hl, lsr #24\r
6998 writemem8\r
6999 fetch 19\r
7000;@LD (IX,N),L\r
7001opcode_DD_75:\r
7002 ldrsb r0,[z80pc],#1\r
7003 ldr r1,[z80xx]\r
7004 add r1,r0,r1, lsr #16\r
7005 mov r0,z80hl, lsr #16\r
7006 and r0,r0,#0xFF\r
7007 writemem8\r
7008 fetch 19\r
7009;@LD (IX,N),A\r
7010opcode_DD_77:\r
7011 ldrsb r0,[z80pc],#1\r
7012 ldr r1,[z80xx]\r
7013 add r1,r0,r1, lsr #16\r
7014 mov r0,z80a, lsr #24\r
7015 writemem8\r
7016 fetch 19\r
7017\r
7018;@LD A,I from (IX)\r
7019opcode_DD_7C:\r
7020 ldrb r0,[z80xx,#3]\r
7021 mov z80a,r0, lsl #24\r
7022 fetch 8\r
7023;@LD A,X from (IX)\r
7024opcode_DD_7D:\r
7025 ldrb r0,[z80xx,#2]\r
7026 mov z80a,r0, lsl #24\r
7027 fetch 8\r
7028;@LD A,(IX,N)\r
7029opcode_DD_7E:\r
7030 ldrsb r0,[z80pc],#1\r
7031 ldr r1,[z80xx]\r
7032 add r0,r0,r1, lsr #16\r
7033 readmem8\r
7034 mov z80a,r0, lsl #24\r
7035 fetch 19\r
7036\r
7037;@ADD A,I ( IX)\r
7038opcode_DD_84:\r
7039 ldrb r0,[z80xx,#3]\r
7040 opADDb\r
7041 fetch 8\r
7042;@ADD A,X ( IX)\r
7043opcode_DD_85:\r
7044 ldrb r0,[z80xx,#2]\r
7045 opADDb\r
7046 fetch 8\r
7047;@ADD A,(IX+N)\r
7048opcode_DD_86:\r
7049 ldrsb r0,[z80pc],#1\r
7050 ldr r1,[z80xx]\r
7051 add r0,r0,r1, lsr #16\r
7052 readmem8\r
7053 opADDb\r
7054 fetch 19\r
7055\r
7056;@ADC A,I (IX)\r
7057opcode_DD_8C:\r
7058 ldrb r0,[z80xx,#3]\r
7059 opADCb\r
7060 fetch 8\r
7061;@ADC A,X (IX)\r
7062opcode_DD_8D:\r
7063 ldrb r0,[z80xx,#2]\r
7064 opADCb\r
7065 fetch 8\r
7066;@ADC A,(IX+N)\r
7067opcode_DD_8E:\r
7068 ldrsb r0,[z80pc],#1\r
7069 ldr r1,[z80xx]\r
7070 add r0,r0,r1, lsr #16\r
7071 readmem8\r
7072 opADCb\r
7073 fetch 19\r
7074\r
7075;@SUB A,I (IX)\r
7076opcode_DD_94:\r
7077 ldrb r0,[z80xx,#3]\r
7078 opSUBb\r
7079 fetch 8\r
7080;@SUB A,X (IX)\r
7081opcode_DD_95:\r
7082 ldrb r0,[z80xx,#2]\r
7083 opSUBb\r
7084 fetch 8\r
7085;@SUB A,(IX+N)\r
7086opcode_DD_96:\r
7087 ldrsb r0,[z80pc],#1\r
7088 ldr r1,[z80xx]\r
7089 add r0,r0,r1, lsr #16\r
7090 readmem8\r
7091 opSUBb\r
7092 fetch 19\r
7093\r
7094;@SBC A,I (IX)\r
7095opcode_DD_9C:\r
7096 ldrb r0,[z80xx,#3]\r
7097 opSBCb\r
7098 fetch 8\r
7099;@SBC A,X (IX)\r
7100opcode_DD_9D:\r
7101 ldrb r0,[z80xx,#2]\r
7102 opSBCb\r
7103 fetch 8\r
7104;@SBC A,(IX+N)\r
7105opcode_DD_9E:\r
7106 ldrsb r0,[z80pc],#1\r
7107 ldr r1,[z80xx]\r
7108 add r0,r0,r1, lsr #16\r
7109 readmem8\r
7110 opSBCb\r
7111 fetch 19\r
7112\r
7113;@AND I (IX)\r
7114opcode_DD_A4:\r
7115 ldrb r0,[z80xx,#3]\r
7116 opANDb\r
7117 fetch 8\r
7118;@AND X (IX)\r
7119opcode_DD_A5:\r
7120 ldrb r0,[z80xx,#2]\r
7121 opANDb\r
7122 fetch 8\r
7123;@AND (IX+N)\r
7124opcode_DD_A6:\r
7125 ldrsb r0,[z80pc],#1\r
7126 ldr r1,[z80xx]\r
7127 add r0,r0,r1, lsr #16\r
7128 readmem8\r
7129 opANDb\r
7130 fetch 19\r
7131\r
7132;@XOR I (IX)\r
7133opcode_DD_AC:\r
7134 ldrb r0,[z80xx,#3]\r
7135 opXORb\r
7136 fetch 8\r
7137;@XOR X (IX)\r
7138opcode_DD_AD:\r
7139 ldrb r0,[z80xx,#2]\r
7140 opXORb\r
7141 fetch 8\r
7142;@XOR (IX+N)\r
7143opcode_DD_AE:\r
7144 ldrsb r0,[z80pc],#1\r
7145 ldr r1,[z80xx]\r
7146 add r0,r0,r1, lsr #16\r
7147 readmem8\r
7148 opXORb\r
7149 fetch 19\r
7150\r
7151;@OR I (IX)\r
7152opcode_DD_B4:\r
7153 ldrb r0,[z80xx,#3]\r
7154 opORb\r
7155 fetch 8\r
7156;@OR X (IX)\r
7157opcode_DD_B5:\r
7158 ldrb r0,[z80xx,#2]\r
7159 opORb\r
7160 fetch 8\r
7161;@OR (IX+N)\r
7162opcode_DD_B6:\r
7163 ldrsb r0,[z80pc],#1\r
7164 ldr r1,[z80xx]\r
7165 add r0,r0,r1, lsr #16\r
7166 readmem8\r
7167 opORb\r
7168 fetch 19\r
7169\r
7170;@CP I (IX)\r
7171opcode_DD_BC:\r
7172 ldrb r0,[z80xx,#3]\r
7173 opCPb\r
7174 fetch 8\r
7175;@CP X (IX)\r
7176opcode_DD_BD:\r
7177 ldrb r0,[z80xx,#2]\r
7178 opCPb\r
7179 fetch 8\r
7180;@CP (IX+N)\r
7181opcode_DD_BE:\r
7182 ldrsb r0,[z80pc],#1\r
7183 ldr r1,[z80xx]\r
7184 add r0,r0,r1, lsr #16\r
7185 readmem8\r
7186 opCPb\r
7187 fetch 19\r
7188\r
7189\r
7190opcodes_DD_CB_LOCAL: .word opcodes_DD_CB\r
7191opcode_DD_CB:\r
7192;@Looks up the opcode on the opcodes_DD_CB table and then \r
7193;@moves the PC to the location of the subroutine\r
7194 ldrsb r0,[z80pc],#1\r
7195 ldr r1,[z80xx]\r
7196 add r0,r0,r1, lsr #16\r
7197\r
7198 ldrb r1,[z80pc],#1\r
7199 ldr pc,[pc,r1, lsl #2]\r
7200 .word 0x00\r
7201opcodes_DD_CB:\r
7202 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_06,opcode_DD_NF2\r
7203 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_0E,opcode_DD_NF2\r
7204 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_16,opcode_DD_NF2\r
7205 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_1E,opcode_DD_NF2\r
7206 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_26,opcode_DD_NF2\r
7207 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_2E,opcode_DD_NF2\r
7208 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_36,opcode_DD_NF2\r
7209 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_3E,opcode_DD_NF2\r
7210 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_46,opcode_DD_NF2\r
7211 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_4E,opcode_DD_NF2\r
7212 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_56,opcode_DD_NF2\r
7213 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_5E,opcode_DD_NF2\r
7214 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_66,opcode_DD_NF2\r
7215 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_6E,opcode_DD_NF2\r
7216 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_76,opcode_DD_NF2\r
7217 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_7E,opcode_DD_NF2\r
7218 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_86,opcode_DD_NF2\r
7219 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_8E,opcode_DD_NF2\r
7220 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_96,opcode_DD_NF2\r
7221 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_9E,opcode_DD_NF2\r
7222 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_A6,opcode_DD_NF2\r
7223 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_AE,opcode_DD_NF2\r
7224 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_B6,opcode_DD_NF2\r
7225 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_BE,opcode_DD_NF2\r
7226 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_C6,opcode_DD_NF2\r
7227 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_CE,opcode_DD_NF2\r
7228 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_D6,opcode_DD_NF2\r
7229 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_DE,opcode_DD_NF2\r
7230 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_E6,opcode_DD_NF2\r
7231 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_EE,opcode_DD_NF2\r
7232 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_F6,opcode_DD_NF2\r
7233 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_FE,opcode_DD_NF2\r
7234\r
7235;@RLC (IX+N) \r
7236opcode_DD_CB_06:\r
7237 stmfd sp!,{r0} ;@ save addr\r
7238 readmem8\r
7239 opRLCb\r
7240 ldmfd sp!,{r1} ;@ restore addr into r1\r
7241 writemem8\r
7242 fetch 23\r
7243;@RRC (IX+N) \r
7244opcode_DD_CB_0E:\r
7245 stmfd sp!,{r0} ;@ save addr\r
7246 readmem8\r
7247 opRRCb\r
7248 ldmfd sp!,{r1} ;@ restore addr into r1\r
7249 writemem8\r
7250 fetch 23\r
7251;@RL (IX+N) \r
7252opcode_DD_CB_16:\r
7253 stmfd sp!,{r0} ;@ save addr\r
7254 readmem8\r
7255 opRLb\r
7256 ldmfd sp!,{r1} ;@ restore addr into r1\r
7257 writemem8\r
7258 fetch 23\r
7259;@RR (IX+N) \r
7260opcode_DD_CB_1E:\r
7261 stmfd sp!,{r0} ;@ save addr \r
7262 readmem8\r
7263 opRRb\r
7264 ldmfd sp!,{r1} ;@ restore addr into r1\r
7265 writemem8\r
7266 fetch 23\r
7267\r
7268;@SLA (IX+N) \r
7269opcode_DD_CB_26:\r
7270 stmfd sp!,{r0} ;@ save addr \r
7271 readmem8\r
7272 opSLAb\r
7273 ldmfd sp!,{r1} ;@ restore addr into r1\r
7274 writemem8\r
7275 fetch 23\r
7276;@SRA (IX+N) \r
7277opcode_DD_CB_2E:\r
7278 stmfd sp!,{r0} ;@ save addr \r
7279 readmem8\r
7280 opSRAb\r
7281 ldmfd sp!,{r1} ;@ restore addr into r1\r
7282 writemem8\r
7283 fetch 23\r
7284;@SLL (IX+N) \r
7285opcode_DD_CB_36:\r
7286 stmfd sp!,{r0} ;@ save addr \r
7287 readmem8\r
7288 opSLLb\r
7289 ldmfd sp!,{r1} ;@ restore addr into r1\r
7290 writemem8\r
7291 fetch 23\r
7292;@SRL (IX+N)\r
7293opcode_DD_CB_3E:\r
7294 stmfd sp!,{r0} ;@ save addr \r
7295 readmem8\r
7296 opSRLb\r
7297 ldmfd sp!,{r1} ;@ restore addr into r1\r
7298 writemem8\r
7299 fetch 23\r
7300\r
7301;@BIT 0,(IX+N) \r
7302opcode_DD_CB_46:\r
7303 readmem8\r
7304 opBITb 0\r
7305 fetch 20\r
7306;@BIT 1,(IX+N) \r
7307opcode_DD_CB_4E:\r
7308 readmem8\r
7309 opBITb 1\r
7310 fetch 20\r
7311;@BIT 2,(IX+N) \r
7312opcode_DD_CB_56:\r
7313 readmem8\r
7314 opBITb 2\r
7315 fetch 20\r
7316;@BIT 3,(IX+N) \r
7317opcode_DD_CB_5E:\r
7318 readmem8\r
7319 opBITb 3\r
7320 fetch 20\r
7321;@BIT 4,(IX+N) \r
7322opcode_DD_CB_66:\r
7323 readmem8\r
7324 opBITb 4\r
7325 fetch 20\r
7326;@BIT 5,(IX+N) \r
7327opcode_DD_CB_6E:\r
7328 readmem8\r
7329 opBITb 5\r
7330 fetch 20\r
7331;@BIT 6,(IX+N) \r
7332opcode_DD_CB_76:\r
7333 readmem8\r
7334 opBITb 6\r
7335 fetch 20\r
7336;@BIT 7,(IX+N) \r
7337opcode_DD_CB_7E:\r
7338 readmem8\r
7339 opBIT7b\r
7340 fetch 20\r
7341;@RES 0,(IX+N) \r
7342opcode_DD_CB_86:\r
7343 opRESmem 0\r
7344;@RES 1,(IX+N) \r
7345opcode_DD_CB_8E:\r
7346 opRESmem 1\r
7347;@RES 2,(IX+N) \r
7348opcode_DD_CB_96:\r
7349 opRESmem 2\r
7350;@RES 3,(IX+N) \r
7351opcode_DD_CB_9E:\r
7352 opRESmem 3\r
7353;@RES 4,(IX+N) \r
7354opcode_DD_CB_A6:\r
7355 opRESmem 4\r
7356;@RES 5,(IX+N) \r
7357opcode_DD_CB_AE:\r
7358 opRESmem 5\r
7359;@RES 6,(IX+N) \r
7360opcode_DD_CB_B6:\r
7361 opRESmem 6\r
7362;@RES 7,(IX+N) \r
7363opcode_DD_CB_BE:\r
7364 opRESmem 7\r
7365\r
7366;@SET 0,(IX+N) \r
7367opcode_DD_CB_C6:\r
7368 opSETmem 0\r
7369;@SET 1,(IX+N) \r
7370opcode_DD_CB_CE:\r
7371 opSETmem 1\r
7372;@SET 2,(IX+N) \r
7373opcode_DD_CB_D6:\r
7374 opSETmem 2\r
7375;@SET 3,(IX+N) \r
7376opcode_DD_CB_DE:\r
7377 opSETmem 3\r
7378;@SET 4,(IX+N) \r
7379opcode_DD_CB_E6:\r
7380 opSETmem 4\r
7381;@SET 5,(IX+N) \r
7382opcode_DD_CB_EE:\r
7383 opSETmem 5\r
7384;@SET 6,(IX+N) \r
7385opcode_DD_CB_F6:\r
7386 opSETmem 6\r
7387;@SET 7,(IX+N) \r
7388opcode_DD_CB_FE:\r
7389 opSETmem 7\r
7390\r
7391\r
7392\r
7393;@POP IX\r
7394opcode_DD_E1:\r
7395.if FAST_Z80SP\r
7396 opPOP\r
7397.else\r
7398 mov r0,z80sp\r
7399 stmfd sp!,{z80xx}\r
7400 readmem16\r
7401 ldmfd sp!,{z80xx}\r
7402 add z80sp,z80sp,#2\r
7403.endif\r
7404 strh r0,[z80xx,#2]\r
7405 fetch 14\r
7406;@EX (SP),IX\r
7407opcode_DD_E3:\r
7408.if FAST_Z80SP\r
7409 ldrb r0,[z80sp]\r
7410 ldrb r1,[z80sp,#1]\r
7411 orr r2,r0,r1, lsl #8\r
7412 ldrh r1,[z80xx,#2]\r
7413 mov r0,r1, lsr #8\r
7414 strb r0,[z80sp,#1]\r
7415 strb r1,[z80sp]\r
7416 strh r2,[z80xx,#2]\r
7417.else\r
7418 mov r0,z80sp\r
7419 stmfd sp!,{z80xx}\r
7420 readmem16\r
7421 ldmfd sp!,{z80xx}\r
7422 mov r2,r0\r
7423 ldrh r0,[z80xx,#2]\r
7424 strh r2,[z80xx,#2]\r
7425 mov r1,z80sp\r
7426 writemem16\r
7427.endif\r
7428 fetch 23\r
7429;@PUSH IX\r
7430opcode_DD_E5:\r
7431 ldr r2,[z80xx]\r
7432 opPUSHreg r2\r
7433 fetch 15\r
7434;@JP (IX)\r
7435opcode_DD_E9:\r
7436 ldrh r0,[z80xx,#2]\r
7437 rebasepc\r
7438 fetch 8\r
7439;@LD SP,IX\r
7440opcode_DD_F9:\r
7441.if FAST_Z80SP\r
7442 ldrh r0,[z80xx,#2]\r
7443 rebasesp\r
7444 mov z80sp,r0\r
7445.else\r
7446 ldrh z80sp,[z80xx,#2]\r
7447.endif\r
7448 fetch 10\r
7449\r
7450;@##################################\r
7451;@##################################\r
7452;@### opcodes ED #########################\r
7453;@##################################\r
7454;@##################################\r
7455\r
7456opcode_ED_NF:\r
7457 fetch 8\r
7458;@ ldrb r0,[z80pc],#1\r
7459;@ ldr pc,[opcodes,r0, lsl #2]\r
7460;@ mov r0,#0xED00\r
7461;@ orr r0,r0,r1\r
7462;@ b end_loop\r
7463\r
7464;@IN B,(C)\r
7465opcode_ED_40:\r
7466 opIN_C\r
7467 and z80bc,z80bc,#0xFF<<16\r
7468 orr z80bc,z80bc,r0, lsl #24\r
7469 sub r1,opcodes,#0x100\r
7470 ldrb r0,[r1,r0]\r
7471 and z80f,z80f,#1<<CFlag\r
7472 orr z80f,z80f,r0\r
7473 fetch 12\r
7474;@OUT (C),B\r
7475opcode_ED_41:\r
7476 mov r1,z80bc, lsr #24\r
7477 opOUT_C\r
7478 fetch 12\r
7479\r
7480;@SBC HL,BC\r
7481opcode_ED_42:\r
7482 opSBC16 z80bc\r
7483\r
7484;@LD (NN),BC\r
7485opcode_ED_43:\r
7486 ldrb r0,[z80pc],#1\r
7487 ldrb r1,[z80pc],#1\r
7488 orr r1,r0,r1, lsl #8\r
7489 mov r0,z80bc, lsr #16\r
7490 writemem16\r
7491 fetch 20\r
7492;@NEG\r
7493opcode_ED_44:\r
7494 rsbs z80a,z80a,#0\r
7495 mrs z80f,cpsr\r
7496 mov z80f,z80f,lsr#28 ;@S,Z,V&C\r
7497 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@invert C and set n.\r
7498 tst z80a,#0x0F000000 ;@H, correct\r
7499 orrne z80f,z80f,#1<<HFlag\r
7500 fetch 8\r
7501 \r
7502;@RETN, moved to ED_4D\r
7503;@opcode_ED_45:\r
7504\r
7505;@IM 0\r
7506opcode_ED_46:\r
7507 strb z80a,[cpucontext,#z80im]\r
7508 fetch 8\r
7509;@LD I,A\r
7510opcode_ED_47:\r
7511 str z80a,[cpucontext,#z80i]\r
7512 fetch 9\r
7513;@IN C,(C)\r
7514opcode_ED_48:\r
7515 opIN_C\r
7516 and z80bc,z80bc,#0xFF<<24\r
7517 orr z80bc,z80bc,r0, lsl #16\r
7518 sub r1,opcodes,#0x100\r
7519 ldrb r0,[r1,r0]\r
7520 and z80f,z80f,#1<<CFlag\r
7521 orr z80f,z80f,r0\r
7522 fetch 12\r
7523;@OUT (C),C\r
7524opcode_ED_49:\r
7525 mov r0,z80bc, lsr #16\r
7526 and r1,r0,#0xFF\r
7527 opOUT\r
7528 fetch 12\r
7529;@ADC HL,BC\r
7530opcode_ED_4A:\r
7531 opADC16 z80bc\r
7532;@LD BC,(NN)\r
7533opcode_ED_4B:\r
7534 ldrb r0,[z80pc],#1\r
7535 ldrb r1,[z80pc],#1\r
7536 orr r0,r0,r1, lsl #8\r
7537 readmem16\r
7538 mov z80bc,r0, lsl #16\r
7539 fetch 20\r
7540\r
7541;@RETN\r
7542opcode_ED_45:\r
7543;@RETI\r
7544opcode_ED_4D:\r
7545 ldrb r0,[cpucontext,#z80if]\r
7546 tst r0,#Z80_IF2\r
7547 orrne r0,r0,#Z80_IF1\r
7548 biceq r0,r0,#Z80_IF1\r
7549 strb r0,[cpucontext,#z80if]\r
7550 opPOP\r
7551 rebasepc\r
7552 fetch 14\r
7553\r
7554;@LD R,A\r
7555opcode_ED_4F:\r
7556 mov r0,z80a,lsr#24\r
7557 strb r0,[cpucontext,#z80r]\r
7558 fetch 9\r
7559\r
7560;@IN D,(C)\r
7561opcode_ED_50:\r
7562 opIN_C\r
7563 and z80de,z80de,#0xFF<<16\r
7564 orr z80de,z80de,r0, lsl #24\r
7565 sub r1,opcodes,#0x100\r
7566 ldrb r0,[r1,r0]\r
7567 and z80f,z80f,#1<<CFlag\r
7568 orr z80f,z80f,r0\r
7569 fetch 12\r
7570;@OUT (C),D\r
7571opcode_ED_51:\r
7572 mov r1,z80de, lsr #24\r
7573 opOUT_C\r
7574 fetch 12\r
7575;@SBC HL,DE\r
7576opcode_ED_52:\r
7577 opSBC16 z80de\r
7578;@LD (NN),DE\r
7579opcode_ED_53:\r
7580 ldrb r0,[z80pc],#1\r
7581 ldrb r1,[z80pc],#1\r
7582 orr r1,r0,r1, lsl #8\r
7583 mov r0,z80de, lsr #16\r
7584 writemem16\r
7585 fetch 20\r
7586;@IM 1\r
7587opcode_ED_56:\r
7588 mov r0,#1\r
7589 strb r0,[cpucontext,#z80im]\r
7590 fetch 8\r
7591;@LD A,I\r
7592opcode_ED_57:\r
7593 ldr z80a,[cpucontext,#z80i]\r
7594 tst z80a,#0xFF000000\r
7595 and z80f,z80f,#(1<<CFlag)\r
7596 orreq z80f,z80f,#(1<<ZFlag)\r
7597 orrmi z80f,z80f,#(1<<SFlag)\r
7598 ldrb r0,[cpucontext,#z80if]\r
7599 tst r0,#Z80_IF2\r
7600 orrne z80f,z80f,#(1<<VFlag)\r
7601 fetch 9\r
7602;@IN E,(C)\r
7603opcode_ED_58:\r
7604 opIN_C\r
7605 and z80de,z80de,#0xFF<<24\r
7606 orr z80de,z80de,r0, lsl #16\r
7607 sub r1,opcodes,#0x100\r
7608 ldrb r0,[r1,r0]\r
7609 and z80f,z80f,#1<<CFlag\r
7610 orr z80f,z80f,r0\r
7611 fetch 12\r
7612;@OUT (C),E\r
7613opcode_ED_59:\r
7614 mov r1,z80de, lsr #16\r
7615 and r1,r1,#0xFF\r
7616 opOUT_C\r
7617 fetch 12\r
7618;@ADC HL,DE\r
7619opcode_ED_5A:\r
7620 opADC16 z80de\r
7621;@LD DE,(NN)\r
7622opcode_ED_5B:\r
7623 ldrb r0,[z80pc],#1\r
7624 ldrb r1,[z80pc],#1\r
7625 orr r0,r0,r1, lsl #8\r
7626 readmem16\r
7627 mov z80de,r0, lsl #16\r
7628 fetch 20\r
7629;@IM 2\r
7630opcode_ED_5E:\r
7631 mov r0,#2\r
7632 strb r0,[cpucontext,#z80im]\r
7633 fetch 8\r
7634;@LD A,R\r
7635opcode_ED_5F:\r
7636 ldrb r0,[cpucontext,#z80r]\r
7637 and r0,r0,#0x80\r
7638 rsb r1,z80_icount,#0\r
7639 and r1,r1,#0x7F\r
7640 orr r0,r0,r1\r
7641 movs z80a,r0, lsl #24\r
7642 and z80f,z80f,#1<<CFlag\r
7643 orrmi z80f,z80f,#(1<<SFlag)\r
7644 orreq z80f,z80f,#(1<<ZFlag)\r
7645 ldrb r0,[cpucontext,#z80if]\r
7646 tst r0,#Z80_IF2\r
7647 orrne z80f,z80f,#(1<<VFlag)\r
7648 fetch 9\r
7649;@IN H,(C)\r
7650opcode_ED_60:\r
7651 opIN_C\r
7652 and z80hl,z80hl,#0xFF<<16\r
7653 orr z80hl,z80hl,r0, lsl #24\r
7654 sub r1,opcodes,#0x100\r
7655 ldrb r0,[r1,r0]\r
7656 and z80f,z80f,#1<<CFlag\r
7657 orr z80f,z80f,r0\r
7658 fetch 12\r
7659;@OUT (C),H\r
7660opcode_ED_61:\r
7661 mov r1,z80hl, lsr #24\r
7662 opOUT_C\r
7663 fetch 12\r
7664;@SBC HL,HL\r
7665opcode_ED_62:\r
7666 opSBC16HL\r
7667;@RRD\r
7668opcode_ED_67:\r
7669 readmem8HL\r
7670 mov r1,r0,ror#4\r
7671 orr r0,r1,z80a,lsr#20\r
7672 bic z80a,z80a,#0x0F000000\r
7673 orr z80a,z80a,r1,lsr#4\r
7674 writemem8HL\r
7675 sub r1,opcodes,#0x100\r
7676 ldrb r0,[r1,z80a, lsr #24]\r
7677 and z80f,z80f,#1<<CFlag\r
7678 orr z80f,z80f,r0\r
7679 fetch 18\r
7680;@IN L,(C)\r
7681opcode_ED_68:\r
7682 opIN_C\r
7683 and z80hl,z80hl,#0xFF<<24\r
7684 orr z80hl,z80hl,r0, lsl #16\r
7685 and z80f,z80f,#1<<CFlag\r
7686 sub r1,opcodes,#0x100\r
7687 ldrb r0,[r1,r0]\r
7688 orr z80f,z80f,r0\r
7689 fetch 12\r
7690;@OUT (C),L\r
7691opcode_ED_69:\r
7692 mov r1,z80hl, lsr #16\r
7693 and r1,r1,#0xFF\r
7694 opOUT_C\r
7695 fetch 12\r
7696;@ADC HL,HL\r
7697opcode_ED_6A:\r
7698 opADC16HL\r
7699;@RLD\r
7700opcode_ED_6F:\r
7701 readmem8HL\r
7702 orr r0,r0,z80a,lsl#4\r
7703 mov r0,r0,ror#28\r
7704 and z80a,z80a,#0xF0000000\r
7705 orr z80a,z80a,r0,lsl#16\r
7706 and z80a,z80a,#0xFF000000\r
7707 writemem8HL\r
7708 sub r1,opcodes,#0x100\r
7709 ldrb r0,[r1,z80a, lsr #24]\r
7710 and z80f,z80f,#1<<CFlag\r
7711 orr z80f,z80f,r0\r
7712 fetch 18\r
7713;@IN F,(C)\r
7714opcode_ED_70:\r
7715 opIN_C\r
7716 and z80f,z80f,#1<<CFlag\r
7717 sub r1,opcodes,#0x100\r
7718 ldrb r0,[r1,r0]\r
7719 orr z80f,z80f,r0\r
7720 fetch 12\r
7721;@OUT (C),0\r
7722opcode_ED_71:\r
7723 mov r1,#0\r
7724 opOUT_C\r
7725 fetch 12\r
7726\r
7727;@SBC HL,SP\r
7728opcode_ED_72:\r
7729.if FAST_Z80SP\r
7730 ldr r0,[cpucontext,#z80sp_base]\r
7731 sub r0,z80sp,r0\r
7732 mov r0, r0, lsl #16\r
7733.else\r
7734 mov r0,z80sp,lsl#16\r
7735.endif\r
7736 opSBC16 r0\r
7737;@LD (NN),SP\r
7738opcode_ED_73:\r
7739 ldrb r0,[z80pc],#1\r
7740 ldrb r1,[z80pc],#1\r
7741 orr r1,r0,r1, lsl #8\r
7742.if FAST_Z80SP\r
7743 ldr r0,[cpucontext,#z80sp_base]\r
7744 sub r0,z80sp,r0\r
7745.else\r
7746 mov r0,z80sp\r
7747.endif\r
7748 writemem16\r
7749 fetch 16\r
7750;@IN A,(C)\r
7751opcode_ED_78:\r
7752 opIN_C\r
7753 mov z80a,r0, lsl #24\r
7754 and z80f,z80f,#1<<CFlag\r
7755 sub r1,opcodes,#0x100\r
7756 ldrb r0,[r1,r0]\r
7757 orr z80f,z80f,r0\r
7758 fetch 12\r
7759;@OUT (C),A\r
7760opcode_ED_79:\r
7761 mov r1,z80a, lsr #24\r
7762 opOUT_C\r
7763 fetch 12\r
7764;@ADC HL,SP\r
7765opcode_ED_7A:\r
7766.if FAST_Z80SP\r
7767 ldr r0,[cpucontext,#z80sp_base]\r
7768 sub r0,z80sp,r0\r
7769 mov r0, r0, lsl #16\r
7770.else\r
7771 mov r0,z80sp,lsl#16\r
7772.endif\r
7773 opADC16 r0\r
7774;@LD SP,(NN)\r
7775opcode_ED_7B:\r
7776 ldrb r0,[z80pc],#1\r
7777 ldrb r1,[z80pc],#1\r
7778 orr r0,r0,r1, lsl #8\r
7779 readmem16\r
7780.if FAST_Z80SP\r
7781 rebasesp\r
7782.endif\r
7783 mov z80sp,r0\r
7784 fetch 20\r
7785;@LDI\r
7786opcode_ED_A0:\r
7787 copymem8HL_DE\r
7788 add z80hl,z80hl,#1<<16\r
7789 add z80de,z80de,#1<<16\r
7790 subs z80bc,z80bc,#1<<16\r
7791 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7792 orrne z80f,z80f,#1<<VFlag\r
7793 fetch 16\r
7794;@CPI\r
7795opcode_ED_A1:\r
7796 readmem8HL\r
7797 add z80hl,z80hl,#0x00010000\r
7798 mov r1,z80a,lsl#4\r
7799 cmp z80a,r0,lsl#24\r
7800 and z80f,z80f,#1<<CFlag\r
7801 orr z80f,z80f,#1<<NFlag\r
7802 orrmi z80f,z80f,#1<<SFlag\r
7803 orreq z80f,z80f,#1<<ZFlag\r
7804 cmp r1,r0,lsl#28\r
7805 orrcc z80f,z80f,#1<<HFlag\r
7806 subs z80bc,z80bc,#0x00010000\r
7807 orrne z80f,z80f,#1<<VFlag\r
7808 fetch 16\r
7809;@INI\r
7810opcode_ED_A2:\r
7811 opIN_C\r
7812 and z80f,r0,#0x80\r
7813 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7814;@ mov r1,z80bc,lsl#8\r
7815;@ add r1,r1,#0x01000000\r
7816;@ adds r1,r1,r0,lsl#24\r
7817;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7818 writemem8HL\r
7819 add z80hl,z80hl,#1<<16\r
7820 sub z80bc,z80bc,#1<<24\r
7821 tst z80bc,#0xFF<<24\r
7822 orrmi z80f,z80f,#1<<SFlag\r
7823 orreq z80f,z80f,#1<<ZFlag\r
7824 fetch 16\r
7825\r
7826;@OUTI\r
7827opcode_ED_A3:\r
7828 readmem8HL\r
7829 add z80hl,z80hl,#1<<16\r
7830 and z80f,r0,#0x80\r
7831 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7832 mov r1,z80hl,lsl#8\r
7833 adds r1,r1,r0,lsl#24\r
7834 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL)+L > 0xFF\r
7835 sub z80bc,z80bc,#1<<24\r
7836 tst z80bc,#0xFF<<24\r
7837 orrmi z80f,z80f,#1<<SFlag\r
7838 orreq z80f,z80f,#1<<ZFlag\r
7839 mov r1,r0\r
7840 opOUT_C\r
7841 fetch 16\r
7842\r
7843;@LDD\r
7844opcode_ED_A8:\r
7845 copymem8HL_DE\r
7846 sub z80hl,z80hl,#1<<16\r
7847 sub z80de,z80de,#1<<16\r
7848 subs z80bc,z80bc,#1<<16\r
7849 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7850 orrne z80f,z80f,#1<<VFlag\r
7851 fetch 16\r
7852\r
7853;@CPD\r
7854opcode_ED_A9:\r
7855 readmem8HL\r
7856 sub z80hl,z80hl,#1<<16\r
7857 mov r1,z80a,lsl#4\r
7858 cmp z80a,r0,lsl#24\r
7859 and z80f,z80f,#1<<CFlag\r
7860 orr z80f,z80f,#1<<NFlag\r
7861 orrmi z80f,z80f,#1<<SFlag\r
7862 orreq z80f,z80f,#1<<ZFlag\r
7863 cmp r1,r0,lsl#28\r
7864 orrcc z80f,z80f,#1<<HFlag\r
7865 subs z80bc,z80bc,#0x00010000\r
7866 orrne z80f,z80f,#1<<VFlag\r
7867 fetch 16\r
7868\r
7869;@IND\r
7870opcode_ED_AA:\r
7871 opIN_C\r
7872 and z80f,r0,#0x80\r
7873 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7874;@ mov r1,z80bc,lsl#8\r
7875;@ sub r1,r1,#0x01000000\r
7876;@ adds r1,r1,r0,lsl#24\r
7877;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
7878 writemem8HL\r
7879 sub z80hl,z80hl,#1<<16\r
7880 sub z80bc,z80bc,#1<<24\r
7881 tst z80bc,#0xFF<<24\r
7882 orrmi z80f,z80f,#1<<SFlag\r
7883 orreq z80f,z80f,#1<<ZFlag\r
7884 fetch 16\r
7885\r
7886;@OUTD\r
7887opcode_ED_AB:\r
7888 readmem8HL\r
7889 sub z80hl,z80hl,#1<<16\r
7890 and z80f,r0,#0x80\r
7891 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7892 mov r1,z80hl,lsl#8\r
7893 adds r1,r1,r0,lsl#24\r
7894 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7895 sub z80bc,z80bc,#1<<24\r
7896 tst z80bc,#0xFF<<24\r
7897 orrmi z80f,z80f,#1<<SFlag\r
7898 orreq z80f,z80f,#1<<ZFlag\r
7899 mov r1,r0\r
7900 opOUT_C\r
7901 fetch 16\r
7902;@LDIR\r
7903opcode_ED_B0:\r
7904 copymem8HL_DE\r
7905 add z80hl,z80hl,#1<<16\r
7906 add z80de,z80de,#1<<16\r
7907 subs z80bc,z80bc,#1<<16\r
7908 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7909 orrne z80f,z80f,#1<<VFlag\r
7910 subne z80pc,z80pc,#2\r
7911 subne z80_icount,z80_icount,#5\r
7912 fetch 16\r
7913\r
7914;@CPIR\r
7915opcode_ED_B1:\r
7916 readmem8HL\r
7917 add z80hl,z80hl,#1<<16 \r
7918 mov r1,z80a,lsl#4\r
7919 cmp z80a,r0,lsl#24\r
7920 and z80f,z80f,#1<<CFlag\r
7921 orr z80f,z80f,#1<<NFlag\r
7922 orrmi z80f,z80f,#1<<SFlag\r
7923 orreq z80f,z80f,#1<<ZFlag\r
7924 cmp r1,r0,lsl#28\r
7925 orrcc z80f,z80f,#1<<HFlag\r
7926 subs z80bc,z80bc,#1<<16\r
7927 bne opcode_ED_B1_decpc\r
7928 fetch 16\r
7929opcode_ED_B1_decpc:\r
7930 orr z80f,z80f,#1<<VFlag\r
7931 tst z80f,#1<<ZFlag\r
7932 subeq z80pc,z80pc,#2\r
7933 subeq z80_icount,z80_icount,#5\r
7934 fetch 16\r
7935;@INIR\r
7936opcode_ED_B2:\r
7937 opIN_C\r
7938 and z80f,r0,#0x80\r
7939 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7940;@ mov r1,z80bc,lsl#8\r
7941;@ add r1,r1,#0x01000000\r
7942;@ adds r1,r1,r0,lsl#24\r
7943;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7944 writemem8HL\r
7945 add z80hl,z80hl,#1<<16\r
7946 sub z80bc,z80bc,#1<<24\r
7947 tst z80bc,#0xFF<<24\r
7948 orrmi z80f,z80f,#1<<SFlag\r
7949 orreq z80f,z80f,#1<<ZFlag\r
7950 subne z80pc,z80pc,#2\r
7951 subne z80_icount,z80_icount,#5\r
7952 fetch 16\r
7953;@OTIR\r
7954opcode_ED_B3:\r
7955 readmem8HL\r
7956 add z80hl,z80hl,#1<<16\r
7957 and z80f,r0,#0x80\r
7958 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7959 mov r1,z80hl,lsl#8\r
7960 adds r1,r1,r0,lsl#24\r
7961 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7962 sub z80bc,z80bc,#1<<24\r
7963 tst z80bc,#0xFF<<24\r
7964 orrmi z80f,z80f,#1<<SFlag\r
7965 orreq z80f,z80f,#1<<ZFlag\r
7966 subne z80pc,z80pc,#2\r
7967 subne z80_icount,z80_icount,#5\r
7968 mov r1,r0\r
7969 opOUT_C\r
7970 fetch 16\r
7971;@LDDR\r
7972opcode_ED_B8:\r
7973 copymem8HL_DE\r
7974 sub z80hl,z80hl,#1<<16\r
7975 sub z80de,z80de,#1<<16\r
7976 subs z80bc,z80bc,#1<<16\r
7977 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7978 orrne z80f,z80f,#1<<VFlag\r
7979 subne z80pc,z80pc,#2\r
7980 subne z80_icount,z80_icount,#5\r
7981 fetch 16\r
7982\r
7983;@CPDR\r
7984opcode_ED_B9:\r
7985 readmem8HL\r
7986 sub z80hl,z80hl,#1<<16\r
7987 mov r1,z80a,lsl#4\r
7988 cmp z80a,r0,lsl#24\r
7989 and z80f,z80f,#1<<CFlag\r
7990 orr z80f,z80f,#1<<NFlag\r
7991 orrmi z80f,z80f,#1<<SFlag\r
7992 orreq z80f,z80f,#1<<ZFlag\r
7993 cmp r1,r0,lsl#28\r
7994 orrcc z80f,z80f,#1<<HFlag\r
7995 subs z80bc,z80bc,#1<<16\r
7996 bne opcode_ED_B9_decpc\r
7997 fetch 16\r
7998opcode_ED_B9_decpc:\r
7999 orr z80f,z80f,#1<<VFlag\r
8000 tst z80f,#1<<ZFlag\r
8001 subeq z80pc,z80pc,#2\r
8002 subeq z80_icount,z80_icount,#5\r
8003 fetch 16\r
8004;@INDR\r
8005opcode_ED_BA:\r
8006 opIN_C\r
8007 and z80f,r0,#0x80\r
8008 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8009;@ mov r1,z80bc,lsl#8\r
8010;@ sub r1,r1,#0x01000000\r
8011;@ adds r1,r1,r0,lsl#24\r
8012;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
8013 writemem8HL\r
8014 sub z80hl,z80hl,#1<<16\r
8015 sub z80bc,z80bc,#1<<24\r
8016 tst z80bc,#0xFF<<24\r
8017 orrmi z80f,z80f,#1<<SFlag\r
8018 orreq z80f,z80f,#1<<ZFlag\r
8019 subne z80pc,z80pc,#2\r
8020 subne z80_icount,z80_icount,#5\r
8021 fetch 16\r
8022;@OTDR\r
8023opcode_ED_BB:\r
8024 readmem8HL\r
8025 sub z80hl,z80hl,#1<<16\r
8026 and z80f,r0,#0x80\r
8027 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8028 mov r1,z80hl,lsl#8\r
8029 adds r1,r1,r0,lsl#24\r
8030 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
8031 sub z80bc,z80bc,#1<<24\r
8032 tst z80bc,#0xFF<<24\r
8033 orrmi z80f,z80f,#1<<SFlag\r
8034 orreq z80f,z80f,#1<<ZFlag\r
8035 subne z80pc,z80pc,#2\r
8036 subne z80_icount,z80_icount,#5\r
8037 mov r1,r0\r
8038 opOUT_C\r
8039 fetch 16\r
8040;@##################################\r
8041;@##################################\r
8042;@### opcodes FD #########################\r
8043;@##################################\r
8044;@##################################\r
8045;@Since DD and FD opcodes are all the same apart from the address\r
8046;@register they use. When a FD intruction the program runs the code\r
8047;@from the DD location but the address of the IY reg is passed instead\r
8048;@of IX\r
8049\r
f0243975 8050;@end_loop:\r
8051;@ b end_loop\r
cc68a136 8052\r
8053\r
8054\r
fast MegaDrive/MegaCD/32X emulator