notaz.gp2x.de / picodrive.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
various bugfixes
[picodrive.git] / cpu / DrZ80 / drz80.s
CommitLineData
cc68a136 1;@ Reesy's Z80 Emulator Version 0.001\r
2\r
3;@ (c) Copyright 2004 Reesy, All rights reserved\r
4;@ DrZ80 is free for non-commercial use.\r
5\r
6;@ For commercial use, separate licencing terms must be obtained.\r
7\r
8 .data\r
9 .align 4\r
10\r
11 .global DrZ80Run\r
12 .global DrZ80Ver\r
13\r
e5f426aa 14 .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
15 .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
16 .equiv UPDATE_CONTEXT, 0\r
17 .equiv DRZ80_FOR_PICODRIVE, 1\r
cc68a136 18\r
19.if INTERRUPT_MODE\r
e5f426aa 20 .extern Interrupt\r
cc68a136 21.endif\r
22\r
23.if DRZ80_FOR_PICODRIVE\r
e5f426aa 24.include "port_config.s"\r
25 .extern YM2612Read_\r
26.if EXTERNAL_YM2612\r
27 .extern YM2612Read_940\r
28.endif\r
cc68a136 29 .extern PicoRead8\r
30 .extern Pico\r
31 .extern z80_write\r
32.endif\r
33\r
34DrZ80Ver: .long 0x0001\r
35\r
36;@ --------------------------- Defines ----------------------------\r
37;@ Make sure that regs/pointers for z80pc to z80sp match up!\r
38\r
39 opcodes .req r3\r
40 z80_icount .req r4\r
41 cpucontext .req r5\r
42 z80pc .req r6\r
43 z80a .req r7\r
44 z80f .req r8\r
45 z80bc .req r9\r
46 z80de .req r10\r
47 z80hl .req r11\r
48 z80sp .req r12 \r
49 z80xx .req lr\r
50\r
51 .equ z80pc_pointer, 0 ;@ 0\r
52 .equ z80a_pointer, z80pc_pointer+4 ;@ 4\r
53 .equ z80f_pointer, z80a_pointer+4 ;@ 8\r
54 .equ z80bc_pointer, z80f_pointer+4 ;@ \r
55 .equ z80de_pointer, z80bc_pointer+4\r
56 .equ z80hl_pointer, z80de_pointer+4\r
57 .equ z80sp_pointer, z80hl_pointer+4\r
58 .equ z80pc_base, z80sp_pointer+4\r
59 .equ z80sp_base, z80pc_base+4\r
60 .equ z80ix, z80sp_base+4\r
61 .equ z80iy, z80ix+4\r
62 .equ z80i, z80iy+4\r
63 .equ z80a2, z80i+4\r
64 .equ z80f2, z80a2+4\r
65 .equ z80bc2, z80f2+4\r
66 .equ z80de2, z80bc2+4\r
67 .equ z80hl2, z80de2+4\r
68 .equ cycles_pointer, z80hl2+4 \r
69 .equ previouspc, cycles_pointer+4 \r
70 .equ z80irq, previouspc+4\r
71 .equ z80if, z80irq+1\r
72 .equ z80im, z80if+1\r
73 .equ z80r, z80im+1\r
74 .equ z80irqvector, z80r+1\r
75 .equ z80irqcallback, z80irqvector+4\r
76 .equ z80_write8, z80irqcallback+4\r
77 .equ z80_write16, z80_write8+4\r
78 .equ z80_in, z80_write16+4\r
79 .equ z80_out, z80_in+4\r
80 .equ z80_read8, z80_out+4\r
81 .equ z80_read16, z80_read8+4\r
82 .equ z80_rebaseSP, z80_read16+4\r
83 .equ z80_rebasePC, z80_rebaseSP+4\r
84\r
85 .equ VFlag, 0\r
86 .equ CFlag, 1\r
87 .equ ZFlag, 2\r
88 .equ SFlag, 3\r
89 .equ HFlag, 4\r
90 .equ NFlag, 5\r
91 .equ Flag3, 6\r
92 .equ Flag5, 7\r
93\r
94 .equ Z80_CFlag, 0\r
95 .equ Z80_NFlag, 1\r
96 .equ Z80_VFlag, 2\r
97 .equ Z80_Flag3, 3\r
98 .equ Z80_HFlag, 4\r
99 .equ Z80_Flag5, 5\r
100 .equ Z80_ZFlag, 6\r
101 .equ Z80_SFlag, 7\r
102\r
103 .equ Z80_IF1, 1<<0\r
104 .equ Z80_IF2, 1<<1\r
105 .equ Z80_HALT, 1<<2\r
106\r
107;@---------------------------------------\r
108\r
109.text\r
110\r
111.if DRZ80_FOR_PICODRIVE\r
cc68a136 112\r
113.macro YM2612Read_and_ret8\r
e5503e2f 114 stmfd sp!,{r3,r12,lr}\r
cc68a136 115.if EXTERNAL_YM2612\r
116 ldr r1,=PicoOpt\r
117 ldr r1,[r1]\r
118 tst r1,#0x200\r
e5503e2f 119 ldrne r2, =YM2612Read_940\r
120 ldreq r2, =YM2612Read_\r
121 mov lr,pc\r
122 bx r2\r
cc68a136 123.else\r
124 bl YM2612Read_\r
125.endif\r
e5503e2f 126 ldmfd sp!,{r3,r12,pc}\r
cc68a136 127.endm\r
128\r
129.macro YM2612Read_and_ret16\r
e5503e2f 130 stmfd sp!,{r3,r12,lr}\r
cc68a136 131.if EXTERNAL_YM2612\r
132 ldr r0,=PicoOpt\r
133 ldr r0,[r0]\r
134 tst r0,#0x200\r
e5503e2f 135 ldrne r2, =YM2612Read_940\r
136 ldreq r2, =YM2612Read_\r
137 mov lr,pc\r
138 bx r2\r
cc68a136 139 orr r0,r0,r0,lsl #8\r
140.else\r
141 bl YM2612Read_\r
142 orr r0,r0,r0,lsl #8\r
143.endif\r
e5503e2f 144 ldmfd sp!,{r3,r12,pc}\r
cc68a136 145.endm\r
146\r
147pico_z80_read8: @ addr\r
148 cmp r0,#0x2000 @ Z80 RAM\r
149 ldrlt r1,[cpucontext,#z80sp_base]\r
150 ldrltb r0,[r1,r0]\r
151 bxlt lr\r
152\r
153 cmp r0,#0x8000 @ 68k bank\r
154 blt 1f\r
155 ldr r2,=(Pico+0x22212)\r
156 ldrh r1,[r2]\r
157 bic r0,r0,#0x3f8000\r
158 orr r0,r0,r1,lsl #15\r
159 ldr r1,[r2,#-0xe] @ ROM size\r
160 cmp r0,r1\r
161 ldrlt r1,[r2,#-0x12] @ ROM\r
162 eorlt r0,r0,#1 @ our ROM is byteswapped\r
163 ldrltb r0,[r1,r0]\r
164 bxlt lr\r
165 stmfd sp!,{r3,r12,lr}\r
166 bl PicoRead8\r
167 ldmfd sp!,{r3,r12,pc}\r
1681:\r
169 mov r1,r0,lsr #13\r
170 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
171 bne 0f\r
172 and r0,r0,#3\r
e5503e2f 173 YM2612Read_and_ret8\r
cc68a136 1740:\r
175 cmp r0,#0x4000\r
176 movge r0,#0xff\r
177 bxge lr\r
178 ldr r1,[cpucontext,#z80sp_base]\r
179 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
180 ldrb r0,[r1,r0]\r
181 bx lr\r
182\r
183pico_z80_read16: @ addr\r
184 cmp r0,#0x2000 @ Z80 RAM\r
185 bge 2f\r
186 ldr r1,[cpucontext,#z80sp_base]\r
187 ldrb r0,[r1,r0]!\r
188 ldrb r1,[r1,#1]\r
189 orr r0,r0,r1,lsl #8\r
190 bx lr\r
191\r
1922:\r
193 cmp r0,#0x8000 @ 68k bank\r
194 blt 1f\r
195 ldr r2,=(Pico+0x22212)\r
196 ldrh r1,[r2]\r
197 bic r0,r0,#0x1f8000\r
198 orr r0,r0,r1,lsl #15\r
199 ldr r1,[r2,#-0xe] @ ROM size\r
200 cmp r0,r1\r
201 ldr r1,[r2,#-0x12] @ ROM\r
202 tst r0,#1\r
203 eor r0,r0,#1\r
204 ldrb r0,[r1,r0]!\r
205 ldreqb r1,[r1,#-1]\r
206 ldrneb r1,[r1,#3] @ this is due to byteswapped ROM\r
207 orr r0,r0,r1,lsl #8\r
208 bx lr\r
2093:\r
210 stmfd sp!,{r3-r5,r12,lr}\r
211 mov r4,r0\r
212 bl PicoRead8\r
213 mov r5,r0\r
214 add r0,r4,#1\r
215 bl PicoRead8\r
216 orr r0,r5,r0,lsl #8\r
217 ldmfd sp!,{r3-r5,r12,pc}\r
2181:\r
219 mov r1,r0,lsr #13\r
220 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
221 bne 0f\r
222 and r0,r0,#3\r
223 YM2612Read_and_ret16\r
2240:\r
225 cmp r0,#0x4000\r
226 movge r0,#0xff\r
227 bxge lr\r
228 ldr r1,[cpucontext,#z80sp_base]\r
229 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
230 ldrb r0,[r1,r0]!\r
231 ldrb r1,[r1,#1]\r
232 orr r0,r0,r1,lsl #8\r
233 bx lr\r
234\r
235pico_z80_write8: @ data, addr\r
236 cmp r1,#0x4000\r
237 bge 1f\r
238 ldr r2,[cpucontext,#z80sp_base]\r
239 bic r1,r1,#0x0fe000 @ Z80 RAM\r
240 strb r0,[r2,r1]\r
241 bx lr\r
2421:\r
243 stmfd sp!,{r3,r12,lr}\r
244 bl z80_write\r
245 ldmfd sp!,{r3,r12,pc}\r
246\r
247pico_z80_write16: @ data, addr\r
248 cmp r1,#0x4000\r
249 bge 1f\r
250 ldr r2,[cpucontext,#z80sp_base]\r
251 bic r1,r1,#0x0fe000 @ Z80 RAM\r
252 strb r0,[r2,r1]!\r
253 mov r0,r0,lsr #8\r
254 strb r0,[r2,#1]\r
255 bx lr\r
2561:\r
257 stmfd sp!,{r3-r5,r12,lr}\r
258 mov r4,r0\r
259 mov r5,r1\r
260 bl z80_write\r
261 mov r0,r4,lsr #8\r
262 add r1,r5,#1\r
263 bl z80_write\r
264 ldmfd sp!,{r3-r5,r12,pc}\r
265\r
266 .pool\r
267.endif\r
268\r
269.macro fetch cycs\r
270 subs z80_icount,z80_icount,#\cycs\r
271.if UPDATE_CONTEXT\r
272 str z80pc,[cpucontext,#z80pc_pointer]\r
273 str z80_icount,[cpucontext,#cycles_pointer]\r
274 ldr r1,[cpucontext,#z80pc_base]\r
275 sub r2,z80pc,r1\r
276 str r2,[cpucontext,#previouspc]\r
277.endif\r
278 ldrplb r0,[z80pc],#1\r
279 ldrpl pc,[opcodes,r0, lsl #2]\r
280 bmi z80_execute_end\r
281.endm\r
282\r
283.macro eatcycles cycs\r
284 sub z80_icount,z80_icount,#\cycs\r
285.if UPDATE_CONTEXT\r
286 str z80_icount,[cpucontext,#cycles_pointer]\r
287.endif\r
288.endm\r
289\r
290.macro readmem8\r
291.if UPDATE_CONTEXT\r
292 str z80pc,[cpucontext,#z80pc_pointer]\r
293.endif\r
294.if DRZ80_FOR_PICODRIVE\r
295 bl pico_z80_read8\r
296.else\r
297 stmfd sp!,{r3,r12}\r
298 mov lr,pc\r
299 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
300 ldmfd sp!,{r3,r12}\r
301.endif\r
302.endm\r
303\r
304.macro readmem8HL\r
305 mov r0,z80hl, lsr #16\r
306 readmem8\r
307.endm\r
308\r
309.macro readmem16\r
310.if UPDATE_CONTEXT\r
311 str z80pc,[cpucontext,#z80pc_pointer]\r
312.endif\r
313.if DRZ80_FOR_PICODRIVE\r
314 bl pico_z80_read16\r
315.else\r
316 stmfd sp!,{r3,r12}\r
317 mov lr,pc\r
318 ldr pc,[cpucontext,#z80_read16]\r
319 ldmfd sp!,{r3,r12}\r
320.endif\r
321.endm\r
322\r
323.macro writemem8\r
324.if UPDATE_CONTEXT\r
325 str z80pc,[cpucontext,#z80pc_pointer]\r
326.endif\r
327.if DRZ80_FOR_PICODRIVE\r
328 bl pico_z80_write8\r
329.else\r
330 stmfd sp!,{r3,r12}\r
331 mov lr,pc\r
332 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
333 ldmfd sp!,{r3,r12}\r
334.endif\r
335.endm\r
336\r
337.macro writemem8DE\r
338 mov r1,z80de, lsr #16\r
339 writemem8\r
340.endm\r
341\r
342.macro writemem8HL\r
343 mov r1,z80hl, lsr #16\r
344 writemem8\r
345.endm\r
346\r
347.macro writemem16\r
348.if UPDATE_CONTEXT\r
349 str z80pc,[cpucontext,#z80pc_pointer]\r
350.endif\r
351.if DRZ80_FOR_PICODRIVE\r
352 bl pico_z80_write16\r
353.else\r
354 stmfd sp!,{r3,r12}\r
355 mov lr,pc\r
356 ldr pc,[cpucontext,#z80_write16] ;@ r0=data r1=addr\r
357 ldmfd sp!,{r3,r12}\r
358.endif\r
359.endm\r
360\r
361.macro copymem8HL_DE\r
362.if UPDATE_CONTEXT\r
363 str z80pc,[cpucontext,#z80pc_pointer]\r
364.endif\r
365 mov r0,z80hl, lsr #16\r
366.if DRZ80_FOR_PICODRIVE\r
367 bl pico_z80_read8\r
368.else\r
369 stmfd sp!,{r3,r12}\r
370 mov lr,pc\r
371 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
372.endif\r
373.if UPDATE_CONTEXT\r
374 str z80pc,[cpucontext,#z80pc_pointer]\r
375.endif\r
376 mov r1,z80de, lsr #16\r
377.if DRZ80_FOR_PICODRIVE\r
378 bl pico_z80_write8\r
379.else\r
380 mov lr,pc\r
381 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
382 ldmfd sp!,{r3,r12}\r
383.endif\r
384.endm\r
385;@---------------------------------------\r
386\r
387.macro rebasepc\r
388.if UPDATE_CONTEXT\r
389 str z80pc,[cpucontext,#z80pc_pointer]\r
390.endif\r
391.if DRZ80_FOR_PICODRIVE\r
392 bic r0,r0,#0xfe000\r
393 ldr r1,[cpucontext,#z80pc_base]\r
394 add z80pc,r1,r0\r
395.else\r
396 stmfd sp!,{r3,r12}\r
397 mov lr,pc\r
398 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
399 ldmfd sp!,{r3,r12}\r
400 mov z80pc,r0\r
401.endif\r
402.endm\r
403\r
404.macro rebasesp\r
405.if UPDATE_CONTEXT\r
406 str z80pc,[cpucontext,#z80pc_pointer]\r
407.endif\r
408.if DRZ80_FOR_PICODRIVE\r
409 bic r0,r0,#0xfe000\r
410 ldr r1,[cpucontext,#z80sp_base]\r
411 add r0,r1,r0\r
412.else\r
413 stmfd sp!,{r3,r12}\r
414 mov lr,pc\r
415 ldr pc,[cpucontext,#z80_rebaseSP] ;@ external function must rebase sp\r
416 ldmfd sp!,{r3,r12}\r
417.endif\r
418.endm\r
419;@----------------------------------------------------------------------------\r
420\r
421.macro opADC\r
422 movs z80f,z80f,lsr#2 ;@ get C\r
423 subcs r0,r0,#0x100\r
424 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of half carry\r
425 adcs z80a,z80a,r0,ror#8\r
426 mrs r0,cpsr ;@ S,Z,V&C\r
427 eor z80f,z80f,z80a,lsr#24\r
428 and z80f,z80f,#1<<HFlag ;@ H, correct\r
429 orr z80f,z80f,r0,lsr#28\r
430.endm\r
431\r
432.macro opADCA\r
433 movs z80f,z80f,lsr#2 ;@ get C\r
434 orrcs z80a,z80a,#0x00800000\r
435 adds z80a,z80a,z80a\r
436 mrs z80f,cpsr ;@ S,Z,V&C\r
437 mov z80f,z80f,lsr#28\r
438 tst z80a,#0x10000000 ;@ H, correct\r
439 orrne z80f,z80f,#1<<HFlag\r
440 fetch 4\r
441.endm\r
442\r
443.macro opADCH reg\r
444 mov r0,\reg,lsr#24\r
445 opADC\r
446 fetch 4\r
447.endm\r
448\r
449.macro opADCL reg\r
450 movs z80f,z80f,lsr#2 ;@ get C\r
451 adc r0,\reg,\reg,lsr#15\r
452 orrcs z80a,z80a,#0x00800000\r
453 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
454 adds z80a,z80a,r0,lsl#23\r
455 mrs z80f,cpsr ;@ S,Z,V&C\r
456 mov z80f,z80f,lsr#28\r
457 cmn r1,r0,lsl#27\r
458 orrcs z80f,z80f,#1<<HFlag ;@ H, correct\r
459 fetch 4\r
460.endm\r
461\r
462.macro opADCb\r
463 opADC\r
464.endm\r
465;@---------------------------------------\r
466\r
467.macro opADD reg shift\r
468 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
469 adds z80a,z80a,\reg,lsl#\shift\r
470 mrs z80f,cpsr ;@ S,Z,V&C\r
471 mov z80f,z80f,lsr#28\r
472 cmn r1,\reg,lsl#\shift+4\r
473 orrcs z80f,z80f,#1<<HFlag\r
474.endm\r
475\r
476.macro opADDA\r
477 adds z80a,z80a,z80a\r
478 mrs z80f,cpsr ;@ S,Z,V&C\r
479 mov z80f,z80f,lsr#28\r
480 tst z80a,#0x10000000 ;@ H, correct\r
481 orrne z80f,z80f,#1<<HFlag\r
482 fetch 4\r
483.endm\r
484\r
485.macro opADDH reg\r
486 and r0,\reg,#0xFF000000\r
487 opADD r0 0\r
488 fetch 4\r
489.endm\r
490\r
491.macro opADDL reg\r
492 opADD \reg 8\r
493 fetch 4\r
494.endm\r
495\r
496.macro opADDb \r
497 opADD r0 24\r
498.endm\r
499;@---------------------------------------\r
500\r
501.macro opADC16 reg\r
502 movs z80f,z80f,lsr#2 ;@ get C\r
503 adc r0,z80a,\reg,lsr#15\r
504 orrcs z80hl,z80hl,#0x00008000\r
505 mov r1,z80hl,lsl#4\r
506 adds z80hl,z80hl,r0,lsl#15\r
507 mrs z80f,cpsr ;@ S, Z, V & C\r
508 mov z80f,z80f,lsr#28\r
509 cmn r1,r0,lsl#19\r
510 orrcs z80f,z80f,#1<<HFlag\r
511 fetch 15\r
512.endm\r
513\r
514.macro opADC16HL\r
515 movs z80f,z80f,lsr#2 ;@ get C\r
516 orrcs z80hl,z80hl,#0x00008000\r
517 adds z80hl,z80hl,z80hl\r
518 mrs z80f,cpsr ;@ S, Z, V & C\r
519 mov z80f,z80f,lsr#28\r
520 tst z80hl,#0x10000000 ;@ H, correct.\r
521 orrne z80f,z80f,#1<<HFlag\r
522 fetch 15\r
523.endm\r
524\r
525.macro opADD16 reg1 reg2\r
526 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
527 adds \reg1,\reg1,\reg2\r
528 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
529 orrcs z80f,z80f,#1<<CFlag\r
530 cmn r1,\reg2,lsl#4\r
531 orrcs z80f,z80f,#1<<HFlag\r
532.endm\r
533\r
534.macro opADD16s reg1 reg2 shift\r
535 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
536 adds \reg1,\reg1,\reg2,lsl#\shift\r
537 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
538 orrcs z80f,z80f,#1<<CFlag\r
539 cmn r1,\reg2,lsl#4+\shift\r
540 orrcs z80f,z80f,#1<<HFlag\r
541.endm\r
542\r
543.macro opADD16_2 reg\r
544 adds \reg,\reg,\reg\r
545 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
546 orrcs z80f,z80f,#1<<CFlag\r
547 tst \reg,#0x10000000 ;@ H, correct.\r
548 orrne z80f,z80f,#1<<HFlag\r
549.endm\r
550;@---------------------------------------\r
551\r
552.macro opAND reg shift\r
553 and z80a,z80a,\reg,lsl#\shift\r
554 sub r0,opcodes,#0x100\r
555 ldrb z80f,[r0,z80a, lsr #24]\r
556 orr z80f,z80f,#1<<HFlag\r
557.endm\r
558\r
559.macro opANDA\r
560 sub r0,opcodes,#0x100\r
561 ldrb z80f,[r0,z80a, lsr #24]\r
562 orr z80f,z80f,#1<<HFlag\r
563 fetch 4\r
564.endm\r
565\r
566.macro opANDH reg\r
567 opAND \reg 0\r
568 fetch 4\r
569.endm\r
570\r
571.macro opANDL reg\r
572 opAND \reg 8\r
573 fetch 4\r
574.endm\r
575\r
576.macro opANDb\r
577 opAND r0 24\r
578.endm\r
579;@---------------------------------------\r
580\r
581.macro opBITH reg bit\r
582 and z80f,z80f,#1<<CFlag\r
583 tst \reg,#1<<(24+\bit)\r
584 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
585 orrne z80f,z80f,#(1<<HFlag)\r
586 fetch 8\r
587.endm\r
588\r
589.macro opBIT7H reg\r
590 and z80f,z80f,#1<<CFlag\r
591 tst \reg,#1<<(24+7)\r
592 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
593 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
594 fetch 8\r
595.endm\r
596\r
597.macro opBITL reg bit\r
598 and z80f,z80f,#1<<CFlag\r
599 tst \reg,#1<<(16+\bit)\r
600 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
601 orrne z80f,z80f,#(1<<HFlag)\r
602 fetch 8\r
603.endm\r
604\r
605.macro opBIT7L reg\r
606 and z80f,z80f,#1<<CFlag\r
607 tst \reg,#1<<(16+7)\r
608 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
609 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
610 fetch 8\r
611.endm\r
612\r
613.macro opBITb bit\r
614 and z80f,z80f,#1<<CFlag\r
615 tst r0,#1<<\bit\r
616 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
617 orrne z80f,z80f,#(1<<HFlag)\r
618.endm\r
619\r
620.macro opBIT7b\r
621 and z80f,z80f,#1<<CFlag\r
622 tst r0,#1<<7\r
623 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
624 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
625.endm\r
626;@---------------------------------------\r
627\r
628.macro opCP reg shift\r
629 mov r1,z80a,lsl#4 ;@ prepare for check of half carry\r
630 cmp z80a,\reg,lsl#\shift\r
631 mrs z80f,cpsr\r
632 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
633 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
634 cmp r1,\reg,lsl#\shift+4\r
635 orrcc z80f,z80f,#1<<HFlag\r
636.endm\r
637\r
638.macro opCPA\r
639 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
640 fetch 4\r
641.endm\r
642\r
643.macro opCPH reg\r
644 and r0,\reg,#0xFF000000\r
645 opCP r0 0\r
646 fetch 4\r
647.endm\r
648\r
649.macro opCPL reg\r
650 opCP \reg 8\r
651 fetch 4\r
652.endm\r
653\r
654.macro opCPb\r
655 opCP r0 24\r
656.endm\r
657;@---------------------------------------\r
658\r
659.macro opDEC8 reg ;@for A and memory\r
660 and z80f,z80f,#1<<CFlag ;@save carry\r
661 orr z80f,z80f,#1<<NFlag ;@set n\r
662 tst \reg,#0x0f000000\r
663 orreq z80f,z80f,#1<<HFlag\r
664 subs \reg,\reg,#0x01000000\r
665 orrmi z80f,z80f,#1<<SFlag\r
666 orrvs z80f,z80f,#1<<VFlag\r
667 orreq z80f,z80f,#1<<ZFlag\r
668.endm\r
669\r
670.macro opDEC8H reg ;@for B, D & H\r
671 and z80f,z80f,#1<<CFlag ;@save carry\r
672 orr z80f,z80f,#1<<NFlag ;@set n\r
673 tst \reg,#0x0f000000\r
674 orreq z80f,z80f,#1<<HFlag\r
675 subs \reg,\reg,#0x01000000\r
676 orrmi z80f,z80f,#1<<SFlag\r
677 orrvs z80f,z80f,#1<<VFlag\r
678 tst \reg,#0xff000000 ;@Z\r
679 orreq z80f,z80f,#1<<ZFlag\r
680.endm\r
681\r
682.macro opDEC8L reg ;@for C, E & L\r
683 mov \reg,\reg,ror#24\r
684 opDEC8H \reg\r
685 mov \reg,\reg,ror#8\r
686.endm\r
687\r
688.macro opDEC8b ;@for memory\r
689 mov r0,r0,lsl#24\r
690 opDEC8 r0\r
691 mov r0,r0,lsr#24\r
692.endm\r
693;@---------------------------------------\r
694\r
695.macro opIN\r
696 stmfd sp!,{r3,r12}\r
697 mov lr,pc\r
698 ldr pc,[cpucontext,#z80_in] ;@ r0=port - data returned in r0\r
699 ldmfd sp!,{r3,r12}\r
700.endm\r
701\r
702.macro opIN_C\r
703 mov r0,z80bc, lsr #16\r
704 opIN\r
705.endm\r
706;@---------------------------------------\r
707\r
708.macro opINC8 reg ;@for A and memory\r
709 and z80f,z80f,#1<<CFlag ;@save carry, clear n\r
710 adds \reg,\reg,#0x01000000\r
711 orrmi z80f,z80f,#1<<SFlag\r
712 orrvs z80f,z80f,#1<<VFlag\r
713 orrcs z80f,z80f,#1<<ZFlag ;@cs when going from 0xFF to 0x00\r
714 tst \reg,#0x0f000000\r
715 orreq z80f,z80f,#1<<HFlag\r
716.endm\r
717\r
718.macro opINC8H reg ;@for B, D & H\r
719 opINC8 \reg\r
720.endm\r
721\r
722.macro opINC8L reg ;@for C, E & L\r
723 mov \reg,\reg,ror#24\r
724 opINC8 \reg\r
725 mov \reg,\reg,ror#8\r
726.endm\r
727\r
728.macro opINC8b ;@for memory\r
729 mov r0,r0,lsl#24\r
730 opINC8 r0\r
731 mov r0,r0,lsr#24\r
732.endm\r
733;@---------------------------------------\r
734\r
735.macro opOR reg shift\r
736 orr z80a,z80a,\reg,lsl#\shift\r
737 sub r0,opcodes,#0x100\r
738 ldrb z80f,[r0,z80a, lsr #24]\r
739.endm\r
740\r
741.macro opORA\r
742 sub r0,opcodes,#0x100\r
743 ldrb z80f,[r0,z80a, lsr #24]\r
744 fetch 4\r
745.endm\r
746\r
747.macro opORH reg\r
748 and r0,\reg,#0xFF000000\r
749 opOR r0 0\r
750 fetch 4\r
751.endm\r
752\r
753.macro opORL reg\r
754 opOR \reg 8\r
755 fetch 4\r
756.endm\r
757\r
758.macro opORb\r
759 opOR r0 24\r
760.endm\r
761;@---------------------------------------\r
762\r
763.macro opOUT\r
764 stmfd sp!,{r3,r12}\r
765 mov lr,pc\r
766 ldr pc,[cpucontext,#z80_out] ;@ r0=port r1=data\r
767 ldmfd sp!,{r3,r12}\r
768.endm\r
769\r
770.macro opOUT_C\r
771 mov r0,z80bc, lsr #16\r
772 opOUT\r
773.endm\r
774;@---------------------------------------\r
775\r
776.macro opPOP\r
777.if FAST_Z80SP\r
778.if DRZ80_FOR_PICODRIVE\r
779 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
780 ldr r2,[cpucontext,#z80sp_base]\r
781 ldrb r0,[z80sp],#1\r
782 add r2,r2,#0x2000\r
783 cmp z80sp,r2\r
784@ subge z80sp,z80sp,#0x2000 @ unstable?\r
785 ldrb r1,[z80sp],#1\r
786 cmp z80sp,r2\r
787@ subge z80sp,z80sp,#0x2000\r
788 orr r0,r0,r1, lsl #8\r
789.else\r
790 ldrb r0,[z80sp],#1\r
791 ldrb r1,[z80sp],#1\r
792 orr r0,r0,r1, lsl #8\r
793.endif\r
794.else\r
795 mov r0,z80sp\r
796 readmem16\r
797 add z80sp,z80sp,#2\r
798.endif\r
799.endm\r
800\r
801.macro opPOPreg reg\r
802 opPOP\r
803 mov \reg,r0, lsl #16\r
804 fetch 10\r
805.endm\r
806;@---------------------------------------\r
807\r
808.macro opPUSHareg reg @ reg > r1\r
809.if FAST_Z80SP\r
810.if DRZ80_FOR_PICODRIVE\r
811 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
812 ldr r0,[cpucontext,#z80sp_base]\r
813 cmp z80sp,r0\r
814 addle z80sp,z80sp,#0x2000\r
815 mov r1,\reg, lsr #8\r
816 strb r1,[z80sp,#-1]!\r
817 cmp z80sp,r0\r
818 addle z80sp,z80sp,#0x2000\r
819 strb \reg,[z80sp,#-1]!\r
820.else\r
821 mov r1,\reg, lsr #8\r
822 strb r1,[z80sp,#-1]!\r
823 strb \reg,[z80sp,#-1]!\r
824.endif\r
825.else\r
826 mov r0,\reg\r
827 sub z80sp,z80sp,#2\r
828 mov r1,z80sp\r
829 writemem16\r
830.endif\r
831.endm\r
832\r
833.macro opPUSHreg reg\r
834.if FAST_Z80SP\r
835.if DRZ80_FOR_PICODRIVE\r
836 ldr r0,[cpucontext,#z80sp_base]\r
837 cmp z80sp,r0\r
838 addle z80sp,z80sp,#0x2000\r
839 mov r1,\reg, lsr #24\r
840 strb r1,[z80sp,#-1]!\r
841 cmp z80sp,r0\r
842 addle z80sp,z80sp,#0x2000\r
843 mov r1,\reg, lsr #16\r
844 strb r1,[z80sp,#-1]!\r
845.else\r
846 mov r1,\reg, lsr #24\r
847 strb r1,[z80sp,#-1]!\r
848 mov r1,\reg, lsr #16\r
849 strb r1,[z80sp,#-1]!\r
850.endif\r
851.else\r
852 mov r0,\reg,lsr #16\r
853 sub z80sp,z80sp,#2\r
854 mov r1,z80sp\r
855 writemem16\r
856.endif\r
857.endm\r
858;@---------------------------------------\r
859\r
860.macro opRESmemHL bit\r
861.if DRZ80_FOR_PICODRIVE\r
862 mov r0,z80hl, lsr #16\r
863 bl pico_z80_read8\r
864 bic r0,r0,#1<<\bit\r
865 mov r1,z80hl, lsr #16\r
866 bl pico_z80_write8\r
867.else\r
868 mov r0,z80hl, lsr #16\r
869 stmfd sp!,{r3,r12}\r
870 mov lr,pc\r
871 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
872 bic r0,r0,#1<<\bit\r
873 mov r1,z80hl, lsr #16\r
874 mov lr,pc\r
875 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
876 ldmfd sp!,{r3,r12}\r
877.endif\r
878 fetch 15\r
879.endm\r
880;@---------------------------------------\r
881\r
882.macro opRESmem bit\r
883.if DRZ80_FOR_PICODRIVE\r
884 stmfd sp!,{r0} ;@ save addr as well\r
885 bl pico_z80_read8\r
886 bic r0,r0,#1<<\bit\r
887 ldmfd sp!,{r1} ;@ restore addr into r1\r
888 bl pico_z80_write8\r
889.else\r
890 stmfd sp!,{r3,r12}\r
891 stmfd sp!,{r0} ;@ save addr as well\r
892 mov lr,pc\r
893 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
894 bic r0,r0,#1<<\bit\r
895 ldmfd sp!,{r1} ;@ restore addr into r1\r
896 mov lr,pc\r
897 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
898 ldmfd sp!,{r3,r12}\r
899.endif\r
900 fetch 23\r
901.endm\r
902;@---------------------------------------\r
903\r
904.macro opRL reg1 reg2 shift\r
905 movs \reg1,\reg2,lsl \shift\r
906 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
907 orrne \reg1,\reg1,#0x01000000\r
908;@ and r2,z80f,#1<<CFlag\r
909;@ orr $x,$x,r2,lsl#23\r
910 sub r1,opcodes,#0x100\r
911 ldrb z80f,[r1,\reg1,lsr#24] ;@get PZS\r
912 orrcs z80f,z80f,#1<<CFlag\r
913.endm\r
914\r
915.macro opRLA\r
916 opRL z80a, z80a, #1\r
917 fetch 8\r
918.endm\r
919\r
920.macro opRLH reg\r
921 and r0,\reg,#0xFF000000 ;@mask high to r0\r
922 adds \reg,\reg,r0\r
923 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
924 orrne \reg,\reg,#0x01000000\r
925 sub r1,opcodes,#0x100\r
926 ldrb z80f,[r1,\reg,lsr#24] ;@get PZS\r
927 orrcs z80f,z80f,#1<<CFlag\r
928 fetch 8\r
929.endm\r
930\r
931.macro opRLL reg\r
932 opRL r0, \reg, #9\r
933 and \reg,\reg,#0xFF000000 ;@mask out high\r
934 orr \reg,\reg,r0,lsr#8\r
935 fetch 8\r
936.endm\r
937\r
938.macro opRLb\r
939 opRL r0, r0, #25\r
940 mov r0,r0,lsr#24\r
941.endm\r
942;@---------------------------------------\r
943\r
944.macro opRLC reg1 reg2 shift\r
945 movs \reg1,\reg2,lsl#\shift\r
946 orrcs \reg1,\reg1,#0x01000000\r
947 sub r1,opcodes,#0x100\r
948 ldrb z80f,[r1,\reg1,lsr#24]\r
949 orrcs z80f,z80f,#1<<CFlag\r
950.endm\r
951\r
952.macro opRLCA\r
953 opRLC z80a, z80a, 1\r
954 fetch 8\r
955.endm\r
956\r
957.macro opRLCH reg\r
958 and r0,\reg,#0xFF000000 ;@mask high to r0\r
959 adds \reg,\reg,r0\r
960 orrcs \reg,\reg,#0x01000000\r
961 sub r1,opcodes,#0x100\r
962 ldrb z80f,[r1,\reg,lsr#24]\r
963 orrcs z80f,z80f,#1<<CFlag\r
964 fetch 8\r
965.endm\r
966\r
967.macro opRLCL reg\r
968 opRLC r0, \reg, 9\r
969 and \reg,\reg,#0xFF000000 ;@mask out high\r
970 orr \reg,\reg,r0,lsr#8\r
971 fetch 8\r
972.endm\r
973\r
974.macro opRLCb\r
975 opRLC r0, r0, 25\r
976 mov r0,r0,lsr#24\r
977.endm\r
978;@---------------------------------------\r
979\r
980.macro opRR reg1 reg2 shift\r
981 movs \reg1,\reg2,lsr#\shift\r
982 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
983 orrne \reg1,\reg1,#0x00000080\r
984;@ and r2,z80_f,#PSR_C\r
985;@ orr \reg1,\reg1,r2,lsl#6\r
986 sub r1,opcodes,#0x100\r
987 ldrb z80f,[r1,\reg1]\r
988 orrcs z80f,z80f,#1<<CFlag\r
989.endm\r
990\r
991.macro opRRA\r
992 orr z80a,z80a,z80f,lsr#1 ;@get C\r
993 movs z80a,z80a,ror#25\r
994 mov z80a,z80a,lsl#24\r
995 sub r1,opcodes,#0x100\r
996 ldrb z80f,[r1,z80a,lsr#24]\r
997 orrcs z80f,z80f,#1<<CFlag\r
998 fetch 8\r
999.endm\r
1000\r
1001.macro opRRH reg\r
1002 orr r0,\reg,z80f,lsr#1 ;@get C\r
1003 movs r0,r0,ror#25\r
1004 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1005 orr \reg,\reg,r0,lsl#24\r
1006 sub r1,opcodes,#0x100\r
1007 ldrb z80f,[r1,\reg,lsr#24]\r
1008 orrcs z80f,z80f,#1<<CFlag\r
1009 fetch 8\r
1010.endm\r
1011\r
1012.macro opRRL reg\r
1013 and r0,\reg,#0x00FF0000 ;@mask out low to r0\r
1014 opRR r0 r0 17\r
1015 and \reg,\reg,#0xFF000000 ;@mask out high\r
1016 orr \reg,\reg,r0,lsl#16\r
1017 fetch 8\r
1018.endm\r
1019\r
1020.macro opRRb\r
1021 opRR r0 r0 1\r
1022.endm\r
1023;@---------------------------------------\r
1024\r
1025.macro opRRC reg1 reg2 shift\r
1026 movs \reg1,\reg2,lsr#\shift\r
1027 orrcs \reg1,\reg1,#0x00000080\r
1028 sub r1,opcodes,#0x100\r
1029 ldrb z80f,[r1,\reg1]\r
1030 orrcs z80f,z80f,#1<<CFlag\r
1031.endm\r
1032\r
1033.macro opRRCA\r
1034 opRRC z80a, z80a, 25\r
1035 mov z80a,z80a,lsl#24\r
1036 fetch 8\r
1037.endm\r
1038\r
1039.macro opRRCH reg\r
1040 opRRC r0, \reg, 25\r
1041 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1042 orr \reg,\reg,r0,lsl#24\r
1043 fetch 8\r
1044.endm\r
1045\r
1046.macro opRRCL reg\r
1047 and r0,\reg,#0x00FF0000 ;@mask low to r0\r
1048 opRRC r0, r0, 17\r
1049 and \reg,\reg,#0xFF000000 ;@mask out high\r
1050 orr \reg,\reg,r0,lsl#16\r
1051 fetch 8\r
1052.endm\r
1053\r
1054.macro opRRCb\r
1055 opRRC r0, r0, 1\r
1056.endm\r
1057;@---------------------------------------\r
1058\r
1059.macro opRST addr\r
1060 ldr r0,[cpucontext,#z80pc_base]\r
1061 sub r2,z80pc,r0\r
1062 opPUSHareg r2\r
1063 mov r0,#\addr\r
1064 rebasepc\r
1065 fetch 11\r
1066.endm\r
1067;@---------------------------------------\r
1068\r
1069.macro opSBC\r
1070 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1071 movs z80f,z80f,lsr#2 ;@ get C\r
1072 subcc r0,r0,#0x100\r
1073 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of H\r
1074 sbcs z80a,z80a,r0,ror#8\r
1075 mrs r0,cpsr\r
1076 eor z80f,z80f,z80a,lsr#24\r
1077 and z80f,z80f,#1<<HFlag ;@ H, correct\r
1078 orr z80f,z80f,r0,lsr#28 ;@ S,Z,V&C\r
1079 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1080.endm\r
1081\r
1082.macro opSBCA\r
1083 movs z80f,z80f,lsr#2 ;@ get C\r
1084 movcc z80a,#0x00000000\r
1085 movcs z80a,#0xFF000000\r
1086 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1087 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1088 fetch 4\r
1089.endm\r
1090\r
1091.macro opSBCH reg\r
1092 mov r0,\reg,lsr#24\r
1093 opSBC\r
1094 fetch 4\r
1095.endm\r
1096\r
1097.macro opSBCL reg\r
1098 mov r0,\reg,lsl#8\r
1099 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1100 movs z80f,z80f,lsr#2 ;@ get C\r
1101 sbccc r0,r0,#0xFF000000\r
1102 mov r1,z80a,lsl#4 ;@ prepare for check of H\r
1103 sbcs z80a,z80a,r0\r
1104 mrs z80f,cpsr\r
1105 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1106 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1107 cmp r1,r0,lsl#4\r
1108 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1109 fetch 4\r
1110.endm\r
1111\r
1112.macro opSBCb\r
1113 opSBC\r
1114.endm\r
1115;@---------------------------------------\r
1116\r
1117.macro opSBC16 reg\r
1118 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1119 movs z80f,z80f,lsr#2 ;@ get C\r
1120 sbc r1,r1,r1 ;@ set r1 to -1 or 0.\r
1121 orr r0,\reg,r1,lsr#16\r
1122 mov r1,z80hl,lsl#4 ;@ prepare for check of H\r
1123 sbcs z80hl,z80hl,r0\r
1124 mrs z80f,cpsr\r
1125 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1126 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1127 cmp r1,r0,lsl#4\r
1128 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1129 fetch 15\r
1130.endm\r
1131\r
1132.macro opSBC16HL\r
1133 movs z80f,z80f,lsr#2 ;@ get C\r
1134 mov z80hl,#0x00000000\r
1135 subcs z80hl,z80hl,#0x00010000\r
1136 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1137 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1138 fetch 15\r
1139.endm\r
1140;@---------------------------------------\r
1141\r
1142.macro opSETmemHL bit\r
1143.if DRZ80_FOR_PICODRIVE\r
1144 mov r0,z80hl, lsr #16\r
1145 bl pico_z80_read8\r
1146 orr r0,r0,#1<<\bit\r
1147 mov r1,z80hl, lsr #16\r
1148 bl pico_z80_write8\r
1149.else\r
1150 mov r0,z80hl, lsr #16\r
1151 stmfd sp!,{r3,r12}\r
1152 mov lr,pc\r
1153 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
1154 orr r0,r0,#1<<\bit\r
1155 mov r1,z80hl, lsr #16\r
1156 mov lr,pc\r
1157 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1158 ldmfd sp!,{r3,r12}\r
1159.endif\r
1160 fetch 15\r
1161.endm\r
1162;@---------------------------------------\r
1163\r
1164.macro opSETmem bit\r
1165.if DRZ80_FOR_PICODRIVE\r
1166 stmfd sp!,{r0} ;@ save addr as well\r
1167 bl pico_z80_read8\r
1168 orr r0,r0,#1<<\bit\r
1169 ldmfd sp!,{r1} ;@ restore addr into r1\r
1170 bl pico_z80_write8\r
1171.else\r
1172 stmfd sp!,{r3,r12}\r
1173 stmfd sp!,{r0} ;@ save addr as well\r
1174 mov lr,pc\r
1175 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
1176 orr r0,r0,#1<<\bit\r
1177 ldmfd sp!,{r1} ;@ restore addr into r1\r
1178 mov lr,pc\r
1179 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1180 ldmfd sp!,{r3,r12}\r
1181.endif\r
1182 fetch 23\r
1183.endm\r
1184;@---------------------------------------\r
1185\r
1186.macro opSLA reg1 reg2 shift\r
1187 movs \reg1,\reg2,lsl#\shift\r
1188 sub r1,opcodes,#0x100\r
1189 ldrb z80f,[r1,\reg1,lsr#24]\r
1190 orrcs z80f,z80f,#1<<CFlag\r
1191.endm\r
1192\r
1193.macro opSLAA\r
1194 opSLA z80a, z80a, 1\r
1195 fetch 8\r
1196.endm\r
1197\r
1198.macro opSLAH reg\r
1199 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1200 adds \reg,\reg,r0\r
1201 sub r1,opcodes,#0x100\r
1202 ldrb z80f,[r1,\reg,lsr#24]\r
1203 orrcs z80f,z80f,#1<<CFlag\r
1204 fetch 8\r
1205.endm\r
1206\r
1207.macro opSLAL reg\r
1208 opSLA r0, \reg, 9\r
1209 and \reg,\reg,#0xFF000000 ;@mask out high\r
1210 orr \reg,\reg,r0,lsr#8\r
1211 fetch 8\r
1212.endm\r
1213\r
1214.macro opSLAb\r
1215 opSLA r0, r0, 25\r
1216 mov r0,r0,lsr#24\r
1217.endm\r
1218;@---------------------------------------\r
1219\r
1220.macro opSLL reg1 reg2 shift\r
1221 movs \reg1,\reg2,lsl#\shift\r
1222 orr \reg1,\reg1,#0x01000000\r
1223 sub r1,opcodes,#0x100\r
1224 ldrb z80f,[r1,\reg1,lsr#24]\r
1225 orrcs z80f,z80f,#1<<CFlag\r
1226.endm\r
1227\r
1228.macro opSLLA\r
1229 opSLL z80a, z80a, 1\r
1230 fetch 8\r
1231.endm\r
1232\r
1233.macro opSLLH reg\r
1234 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1235 adds \reg,\reg,r0\r
1236 orr \reg,\reg,#0x01000000\r
1237 sub r1,opcodes,#0x100\r
1238 ldrb z80f,[r1,\reg,lsr#24]\r
1239 orrcs z80f,z80f,#1<<CFlag\r
1240 fetch 8\r
1241.endm\r
1242\r
1243.macro opSLLL reg\r
1244 opSLL r0, \reg, 9\r
1245 and \reg,\reg,#0xFF000000 ;@mask out high\r
1246 orr \reg,\reg,r0,lsr#8\r
1247 fetch 8\r
1248.endm\r
1249\r
1250.macro opSLLb\r
1251 opSLL r0, r0, 25\r
1252 mov r0,r0,lsr#24\r
1253.endm\r
1254;@---------------------------------------\r
1255\r
1256.macro opSRA reg1 reg2\r
1257 movs \reg1,\reg2,asr#25\r
1258 and \reg1,\reg1,#0xFF\r
1259 sub r1,opcodes,#0x100\r
1260 ldrb z80f,[r1,\reg1]\r
1261 orrcs z80f,z80f,#1<<CFlag\r
1262.endm\r
1263\r
1264.macro opSRAA\r
1265 movs r0,z80a,asr#25\r
1266 mov z80a,r0,lsl#24\r
1267 sub r1,opcodes,#0x100\r
1268 ldrb z80f,[r1,z80a,lsr#24]\r
1269 orrcs z80f,z80f,#1<<CFlag\r
1270 fetch 8\r
1271.endm\r
1272\r
1273.macro opSRAH reg\r
1274 movs r0,\reg,asr#25\r
1275 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1276 orr \reg,\reg,r0,lsl#24\r
1277 sub r1,opcodes,#0x100\r
1278 ldrb z80f,[r1,\reg,lsr#24]\r
1279 orrcs z80f,z80f,#1<<CFlag\r
1280 fetch 8\r
1281.endm\r
1282\r
1283.macro opSRAL reg\r
1284 mov r0,\reg,lsl#8\r
1285 opSRA r0, r0\r
1286 and \reg,\reg,#0xFF000000 ;@mask out high\r
1287 orr \reg,\reg,r0,lsl#16\r
1288 fetch 8\r
1289.endm\r
1290\r
1291.macro opSRAb\r
1292 mov r0,r0,lsl#24\r
1293 opSRA r0, r0\r
1294.endm\r
1295;@---------------------------------------\r
1296\r
1297.macro opSRL reg1 reg2 shift\r
1298 movs \reg1,\reg2,lsr#\shift\r
1299 sub r1,opcodes,#0x100\r
1300 ldrb z80f,[r1,\reg1]\r
1301 orrcs z80f,z80f,#1<<CFlag\r
1302.endm\r
1303\r
1304.macro opSRLA\r
1305 opSRL z80a, z80a, 25\r
1306 mov z80a,z80a,lsl#24\r
1307 fetch 8\r
1308.endm\r
1309\r
1310.macro opSRLH reg\r
1311 opSRL r0, \reg, 25\r
1312 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1313 orr \reg,\reg,r0,lsl#24\r
1314 fetch 8\r
1315.endm\r
1316\r
1317.macro opSRLL reg\r
1318 mov r0,\reg,lsl#8\r
1319 opSRL r0, r0, 25\r
1320 and \reg,\reg,#0xFF000000 ;@mask out high\r
1321 orr \reg,\reg,r0,lsl#16\r
1322 fetch 8\r
1323.endm\r
1324\r
1325.macro opSRLb\r
1326 opSRL r0, r0, 1\r
1327.endm\r
1328;@---------------------------------------\r
1329\r
1330.macro opSUB reg shift\r
1331 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
1332 subs z80a,z80a,\reg,lsl#\shift\r
1333 mrs z80f,cpsr\r
1334 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1335 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
1336 cmp r1,\reg,lsl#\shift+4\r
1337 orrcc z80f,z80f,#1<<HFlag\r
1338.endm\r
1339\r
1340.macro opSUBA\r
1341 mov z80a,#0\r
1342 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
1343 fetch 4\r
1344.endm\r
1345\r
1346.macro opSUBH reg\r
1347 and r0,\reg,#0xFF000000\r
1348 opSUB r0, 0\r
1349 fetch 4\r
1350.endm\r
1351\r
1352.macro opSUBL reg\r
1353 opSUB \reg, 8\r
1354 fetch 4\r
1355.endm\r
1356\r
1357.macro opSUBb\r
1358 opSUB r0, 24\r
1359.endm\r
1360;@---------------------------------------\r
1361\r
1362.macro opXOR reg shift\r
1363 eor z80a,z80a,\reg,lsl#\shift\r
1364 sub r0,opcodes,#0x100\r
1365 ldrb z80f,[r0,z80a, lsr #24]\r
1366.endm\r
1367\r
1368.macro opXORA\r
1369 mov z80a,#0\r
1370 mov z80f,#(1<<ZFlag)|(1<<VFlag)\r
1371 fetch 4\r
1372.endm\r
1373\r
1374.macro opXORH reg\r
1375 and r0,\reg,#0xFF000000\r
1376 opXOR r0, 0\r
1377 fetch 4\r
1378.endm\r
1379\r
1380.macro opXORL reg\r
1381 opXOR \reg, 8\r
1382 fetch 4\r
1383.endm\r
1384\r
1385.macro opXORb\r
1386 opXOR r0, 24\r
1387.endm\r
1388;@---------------------------------------\r
1389\r
1390\r
1391;@ --------------------------- Framework --------------------------\r
1392 \r
1393.text\r
1394\r
1395DrZ80Run:\r
1396 ;@ r0 = pointer to cpu context\r
1397 ;@ r1 = ISTATES to execute \r
1398 ;@######################################### \r
1399 stmdb sp!,{r4-r12,lr} ;@ save registers on stack\r
1400 mov cpucontext,r0 ;@ setup main memory pointer\r
1401 mov z80_icount,r1 ;@ setup number of Tstates to execute\r
1402\r
1403.if INTERRUPT_MODE == 0\r
1404 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
1405.endif\r
1406 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1407\r
1408.if INTERRUPT_MODE == 0\r
1409 ;@ check ints\r
1410 tst r0,#1\r
1411 movnes r0,r0,lsr #8\r
1412 blne DoInterrupt\r
1413.endif\r
1414\r
1415 ldrb r0,[z80pc],#1 ;@ get first op code\r
1416 ldr opcodes,MAIN_opcodes_POINTER2\r
1417 ldr pc,[opcodes,r0, lsl #2] ;@ execute op code\r
1418\r
1419MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
1420\r
1421\r
1422z80_execute_end:\r
1423 ;@ save registers in CPU context\r
1424 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1425 mov r0,z80_icount\r
1426 ldmia sp!,{r4-r12,pc} ;@ restore registers from stack and return to C code\r
1427\r
1428.if INTERRUPT_MODE\r
1429Interrupt_local: .word Interrupt\r
1430.endif\r
1431\r
1432DoInterrupt:\r
1433.if INTERRUPT_MODE\r
1434 ;@ Don't do own int handler, call mames instead\r
1435\r
1436 ;@ save everything back into DrZ80 context\r
1437 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1438 stmfd sp!,{r3,r4,r5,lr} ;@ save rest of regs on stack\r
1439 mov lr,pc\r
1440 ldr pc,Interrupt_local\r
1441 ldmfd sp!,{r3,r4,r5,lr} ;@ load regs from stack\r
1442 ;@ reload regs from DrZ80 context\r
1443 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1444 mov pc,lr ;@ return\r
1445.else\r
1446 stmfd sp!,{lr}\r
1447\r
1448 tst r0,#4 ;@ check halt\r
1449 addne z80pc,z80pc,#1\r
1450\r
1451 ldrb r1,[cpucontext,#z80im]\r
1452\r
1453 ;@ clear halt and int flags\r
1454 eor r0,r0,r0\r
1455 strb r0,[cpucontext,#z80if]\r
1456\r
1457 ;@ now check int mode\r
1458 tst r1,#1\r
1459 bne DoInterrupt_mode1\r
1460 tst r1,#2\r
1461 bne DoInterrupt_mode2\r
cc68a136 1462\r
1463DoInterrupt_mode0:\r
1464 ;@ get 3 byte vector\r
1465 ldr r2,[cpucontext, #z80irqvector]\r
1466 and r1,r2,#0xFF0000\r
1467 cmp r1,#0xCD0000 ;@ call\r
1468 bne 1f\r
1469 ;@ ########\r
1470 ;@ # call\r
1471 ;@ ########\r
1472 ;@ save current pc on stack\r
1473 ldr r0,[cpucontext,#z80pc_base]\r
1474 sub r0,z80pc,r0\r
1475.if FAST_Z80SP\r
1476 mov r1,r0, lsr #8\r
1477 strb r1,[z80sp,#-1]!\r
1478 strb r0,[z80sp,#-1]!\r
1479.else\r
1480 sub z80sp,z80sp,#2\r
1481 mov r1,z80sp\r
1482 writemem16\r
1483 ldr r2,[cpucontext, #z80irqvector]\r
1484.endif\r
1485 ;@ jump to vector\r
1486 mov r2,r2,lsl#16\r
1487 mov r0,r2,lsr#16\r
1488 ;@ rebase new pc\r
1489 rebasepc\r
1490\r
1491 b DoInterrupt_end\r
1492\r
14931:\r
1494 cmp r1,#0xC30000 ;@ jump\r
1495 bne DoInterrupt_mode1 ;@ rst\r
1496 ;@ #######\r
1497 ;@ # jump\r
1498 ;@ #######\r
1499 ;@ jump to vector\r
1500 mov r2,r2,lsl#16\r
1501 mov r0,r2,lsr#16\r
1502 ;@ rebase new pc\r
1503 rebasepc\r
1504\r
1505 b DoInterrupt_end\r
1506\r
1507DoInterrupt_mode1:\r
1508 ldr r0,[cpucontext,#z80pc_base]\r
1509 sub r2,z80pc,r0\r
1510 opPUSHareg r2\r
1511 mov r0,#0x38\r
1512 rebasepc\r
1513\r
1514 b DoInterrupt_end\r
1515\r
1516DoInterrupt_mode2:\r
1517 ;@ push pc on stack\r
1518 ldr r0,[cpucontext,#z80pc_base]\r
1519 sub r2,z80pc,r0\r
1520 opPUSHareg r2\r
1521\r
1522 ;@ get 1 byte vector address\r
1523 ldrb r0,[cpucontext, #z80irqvector]\r
1524 ldr r1,[cpucontext, #z80i]\r
1525 orr r0,r0,r1,lsr#16\r
1526\r
1527 ;@ read new pc from vector address\r
1528.if DRZ80_FOR_PICODRIVE\r
1529 bl pico_z80_read16\r
1530 bic r0,r0,#0xfe000\r
1531 ldr r1,[cpucontext,#z80pc_base]\r
1532 add z80pc,r1,r0\r
1533.if UPDATE_CONTEXT\r
1534 str z80pc,[cpucontext,#z80pc_pointer]\r
1535.endif\r
1536.else\r
1537 stmfd sp!,{r3,r12}\r
1538 mov lr,pc\r
1539 ldr pc,[cpucontext,#z80_read16]\r
1540\r
1541 ;@ rebase new pc\r
1542.if UPDATE_CONTEXT\r
1543 str z80pc,[cpucontext,#z80pc_pointer]\r
1544.endif\r
1545 mov lr,pc\r
1546 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
1547 ldmfd sp!,{r3,r12}\r
1548 mov z80pc,r0 \r
1549.endif\r
1550\r
1551DoInterrupt_end:\r
1552 ;@ interupt accepted so callback irq interface\r
1553 ldr r0,[cpucontext, #z80irqcallback]\r
1554 tst r0,r0\r
1555 ldmeqfd sp!,{pc}\r
1556 stmfd sp!,{r3,r12}\r
1557 mov lr,pc\r
1558 mov pc,r0 ;@ call callback function\r
1559 ldmfd sp!,{r3,r12}\r
1560 ldmfd sp!,{pc} ;@ return\r
1561\r
1562.endif\r
1563\r
1564.data\r
1565.align 4\r
1566\r
1567DAATable: .hword (0x00<<8)|(1<<ZFlag)|(1<<VFlag)\r
1568 .hword (0x01<<8) \r
1569 .hword (0x02<<8) \r
1570 .hword (0x03<<8) |(1<<VFlag)\r
1571 .hword (0x04<<8) \r
1572 .hword (0x05<<8) |(1<<VFlag)\r
1573 .hword (0x06<<8) |(1<<VFlag)\r
1574 .hword (0x07<<8) \r
1575 .hword (0x08<<8) \r
1576 .hword (0x09<<8) |(1<<VFlag)\r
1577 .hword (0x10<<8) |(1<<HFlag) \r
1578 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
1579 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
1580 .hword (0x13<<8) |(1<<HFlag) \r
1581 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
1582 .hword (0x15<<8) |(1<<HFlag) \r
1583 .hword (0x10<<8) \r
1584 .hword (0x11<<8) |(1<<VFlag)\r
1585 .hword (0x12<<8) |(1<<VFlag)\r
1586 .hword (0x13<<8) \r
1587 .hword (0x14<<8) |(1<<VFlag)\r
1588 .hword (0x15<<8) \r
1589 .hword (0x16<<8) \r
1590 .hword (0x17<<8) |(1<<VFlag)\r
1591 .hword (0x18<<8) |(1<<VFlag)\r
1592 .hword (0x19<<8) \r
1593 .hword (0x20<<8) |(1<<HFlag) \r
1594 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
1595 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
1596 .hword (0x23<<8) |(1<<HFlag) \r
1597 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
1598 .hword (0x25<<8) |(1<<HFlag) \r
1599 .hword (0x20<<8) \r
1600 .hword (0x21<<8) |(1<<VFlag)\r
1601 .hword (0x22<<8) |(1<<VFlag)\r
1602 .hword (0x23<<8) \r
1603 .hword (0x24<<8) |(1<<VFlag)\r
1604 .hword (0x25<<8) \r
1605 .hword (0x26<<8) \r
1606 .hword (0x27<<8) |(1<<VFlag)\r
1607 .hword (0x28<<8) |(1<<VFlag)\r
1608 .hword (0x29<<8) \r
1609 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
1610 .hword (0x31<<8) |(1<<HFlag) \r
1611 .hword (0x32<<8) |(1<<HFlag) \r
1612 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
1613 .hword (0x34<<8) |(1<<HFlag) \r
1614 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
1615 .hword (0x30<<8) |(1<<VFlag)\r
1616 .hword (0x31<<8) \r
1617 .hword (0x32<<8) \r
1618 .hword (0x33<<8) |(1<<VFlag)\r
1619 .hword (0x34<<8) \r
1620 .hword (0x35<<8) |(1<<VFlag)\r
1621 .hword (0x36<<8) |(1<<VFlag)\r
1622 .hword (0x37<<8) \r
1623 .hword (0x38<<8) \r
1624 .hword (0x39<<8) |(1<<VFlag)\r
1625 .hword (0x40<<8) |(1<<HFlag) \r
1626 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
1627 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
1628 .hword (0x43<<8) |(1<<HFlag) \r
1629 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
1630 .hword (0x45<<8) |(1<<HFlag) \r
1631 .hword (0x40<<8) \r
1632 .hword (0x41<<8) |(1<<VFlag)\r
1633 .hword (0x42<<8) |(1<<VFlag)\r
1634 .hword (0x43<<8) \r
1635 .hword (0x44<<8) |(1<<VFlag)\r
1636 .hword (0x45<<8) \r
1637 .hword (0x46<<8) \r
1638 .hword (0x47<<8) |(1<<VFlag)\r
1639 .hword (0x48<<8) |(1<<VFlag)\r
1640 .hword (0x49<<8) \r
1641 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
1642 .hword (0x51<<8) |(1<<HFlag) \r
1643 .hword (0x52<<8) |(1<<HFlag) \r
1644 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
1645 .hword (0x54<<8) |(1<<HFlag) \r
1646 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
1647 .hword (0x50<<8) |(1<<VFlag)\r
1648 .hword (0x51<<8) \r
1649 .hword (0x52<<8) \r
1650 .hword (0x53<<8) |(1<<VFlag)\r
1651 .hword (0x54<<8) \r
1652 .hword (0x55<<8) |(1<<VFlag)\r
1653 .hword (0x56<<8) |(1<<VFlag)\r
1654 .hword (0x57<<8) \r
1655 .hword (0x58<<8) \r
1656 .hword (0x59<<8) |(1<<VFlag)\r
1657 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
1658 .hword (0x61<<8) |(1<<HFlag) \r
1659 .hword (0x62<<8) |(1<<HFlag) \r
1660 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
1661 .hword (0x64<<8) |(1<<HFlag) \r
1662 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
1663 .hword (0x60<<8) |(1<<VFlag)\r
1664 .hword (0x61<<8) \r
1665 .hword (0x62<<8) \r
1666 .hword (0x63<<8) |(1<<VFlag)\r
1667 .hword (0x64<<8) \r
1668 .hword (0x65<<8) |(1<<VFlag)\r
1669 .hword (0x66<<8) |(1<<VFlag)\r
1670 .hword (0x67<<8) \r
1671 .hword (0x68<<8) \r
1672 .hword (0x69<<8) |(1<<VFlag)\r
1673 .hword (0x70<<8) |(1<<HFlag) \r
1674 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
1675 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
1676 .hword (0x73<<8) |(1<<HFlag) \r
1677 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
1678 .hword (0x75<<8) |(1<<HFlag) \r
1679 .hword (0x70<<8) \r
1680 .hword (0x71<<8) |(1<<VFlag)\r
1681 .hword (0x72<<8) |(1<<VFlag)\r
1682 .hword (0x73<<8) \r
1683 .hword (0x74<<8) |(1<<VFlag)\r
1684 .hword (0x75<<8) \r
1685 .hword (0x76<<8) \r
1686 .hword (0x77<<8) |(1<<VFlag)\r
1687 .hword (0x78<<8) |(1<<VFlag)\r
1688 .hword (0x79<<8) \r
1689 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
1690 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1691 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1692 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
1693 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1694 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
1695 .hword (0x80<<8)|(1<<SFlag) \r
1696 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)\r
1697 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)\r
1698 .hword (0x83<<8)|(1<<SFlag) \r
1699 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)\r
1700 .hword (0x85<<8)|(1<<SFlag) \r
1701 .hword (0x86<<8)|(1<<SFlag) \r
1702 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
1703 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
1704 .hword (0x89<<8)|(1<<SFlag) \r
1705 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1706 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
1707 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
1708 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1709 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
1710 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1711 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)\r
1712 .hword (0x91<<8)|(1<<SFlag) \r
1713 .hword (0x92<<8)|(1<<SFlag) \r
1714 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)\r
1715 .hword (0x94<<8)|(1<<SFlag) \r
1716 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)\r
1717 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
1718 .hword (0x97<<8)|(1<<SFlag) \r
1719 .hword (0x98<<8)|(1<<SFlag) \r
1720 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
1721 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1722 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1723 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1724 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1725 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1726 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1727 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1728 .hword (0x01<<8) |(1<<CFlag)\r
1729 .hword (0x02<<8) |(1<<CFlag)\r
1730 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1731 .hword (0x04<<8) |(1<<CFlag)\r
1732 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1733 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1734 .hword (0x07<<8) |(1<<CFlag)\r
1735 .hword (0x08<<8) |(1<<CFlag)\r
1736 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1737 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1738 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1739 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1740 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1741 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1742 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1743 .hword (0x10<<8) |(1<<CFlag)\r
1744 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1745 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1746 .hword (0x13<<8) |(1<<CFlag)\r
1747 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1748 .hword (0x15<<8) |(1<<CFlag)\r
1749 .hword (0x16<<8) |(1<<CFlag)\r
1750 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1751 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1752 .hword (0x19<<8) |(1<<CFlag)\r
1753 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1754 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1755 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1756 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1757 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1758 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1759 .hword (0x20<<8) |(1<<CFlag)\r
1760 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1761 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1762 .hword (0x23<<8) |(1<<CFlag)\r
1763 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1764 .hword (0x25<<8) |(1<<CFlag)\r
1765 .hword (0x26<<8) |(1<<CFlag)\r
1766 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1767 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1768 .hword (0x29<<8) |(1<<CFlag)\r
1769 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1770 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1771 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1772 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1773 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
1774 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1775 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
1776 .hword (0x31<<8) |(1<<CFlag)\r
1777 .hword (0x32<<8) |(1<<CFlag)\r
1778 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
1779 .hword (0x34<<8) |(1<<CFlag)\r
1780 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
1781 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
1782 .hword (0x37<<8) |(1<<CFlag)\r
1783 .hword (0x38<<8) |(1<<CFlag)\r
1784 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
1785 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
1786 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1787 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1788 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
1789 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1790 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
1791 .hword (0x40<<8) |(1<<CFlag)\r
1792 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
1793 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
1794 .hword (0x43<<8) |(1<<CFlag)\r
1795 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
1796 .hword (0x45<<8) |(1<<CFlag)\r
1797 .hword (0x46<<8) |(1<<CFlag)\r
1798 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
1799 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
1800 .hword (0x49<<8) |(1<<CFlag)\r
1801 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1802 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
1803 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
1804 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1805 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
1806 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1807 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
1808 .hword (0x51<<8) |(1<<CFlag)\r
1809 .hword (0x52<<8) |(1<<CFlag)\r
1810 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
1811 .hword (0x54<<8) |(1<<CFlag)\r
1812 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
1813 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
1814 .hword (0x57<<8) |(1<<CFlag)\r
1815 .hword (0x58<<8) |(1<<CFlag)\r
1816 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
1817 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1818 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
1819 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
1820 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1821 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
1822 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1823 .hword (0x60<<8) |(1<<VFlag) |(1<<CFlag)\r
1824 .hword (0x61<<8) |(1<<CFlag)\r
1825 .hword (0x62<<8) |(1<<CFlag)\r
1826 .hword (0x63<<8) |(1<<VFlag) |(1<<CFlag)\r
1827 .hword (0x64<<8) |(1<<CFlag)\r
1828 .hword (0x65<<8) |(1<<VFlag) |(1<<CFlag)\r
1829 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
1830 .hword (0x67<<8) |(1<<CFlag)\r
1831 .hword (0x68<<8) |(1<<CFlag)\r
1832 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
1833 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
1834 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1835 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1836 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
1837 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1838 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
1839 .hword (0x70<<8) |(1<<CFlag)\r
1840 .hword (0x71<<8) |(1<<VFlag) |(1<<CFlag)\r
1841 .hword (0x72<<8) |(1<<VFlag) |(1<<CFlag)\r
1842 .hword (0x73<<8) |(1<<CFlag)\r
1843 .hword (0x74<<8) |(1<<VFlag) |(1<<CFlag)\r
1844 .hword (0x75<<8) |(1<<CFlag)\r
1845 .hword (0x76<<8) |(1<<CFlag)\r
1846 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
1847 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
1848 .hword (0x79<<8) |(1<<CFlag)\r
1849 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1850 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1851 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1852 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1853 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1854 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1855 .hword (0x80<<8)|(1<<SFlag) |(1<<CFlag)\r
1856 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1857 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1858 .hword (0x83<<8)|(1<<SFlag) |(1<<CFlag)\r
1859 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1860 .hword (0x85<<8)|(1<<SFlag) |(1<<CFlag)\r
1861 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
1862 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1863 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1864 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
1865 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1866 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1867 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1868 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1869 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1870 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1871 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1872 .hword (0x91<<8)|(1<<SFlag) |(1<<CFlag)\r
1873 .hword (0x92<<8)|(1<<SFlag) |(1<<CFlag)\r
1874 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1875 .hword (0x94<<8)|(1<<SFlag) |(1<<CFlag)\r
1876 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1877 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1878 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
1879 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
1880 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1881 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1882 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1883 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1884 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1885 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1886 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1887 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1888 .hword (0xA1<<8)|(1<<SFlag) |(1<<CFlag)\r
1889 .hword (0xA2<<8)|(1<<SFlag) |(1<<CFlag)\r
1890 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1891 .hword (0xA4<<8)|(1<<SFlag) |(1<<CFlag)\r
1892 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1893 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1894 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
1895 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
1896 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1897 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1898 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1899 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1900 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1901 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1902 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1903 .hword (0xB0<<8)|(1<<SFlag) |(1<<CFlag)\r
1904 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1905 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1906 .hword (0xB3<<8)|(1<<SFlag) |(1<<CFlag)\r
1907 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1908 .hword (0xB5<<8)|(1<<SFlag) |(1<<CFlag)\r
1909 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
1910 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1911 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1912 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
1913 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1914 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1915 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1916 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1917 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1918 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1919 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1920 .hword (0xC1<<8)|(1<<SFlag) |(1<<CFlag)\r
1921 .hword (0xC2<<8)|(1<<SFlag) |(1<<CFlag)\r
1922 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1923 .hword (0xC4<<8)|(1<<SFlag) |(1<<CFlag)\r
1924 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1925 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1926 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
1927 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
1928 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1929 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1930 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1931 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1932 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1933 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1934 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1935 .hword (0xD0<<8)|(1<<SFlag) |(1<<CFlag)\r
1936 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1937 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1938 .hword (0xD3<<8)|(1<<SFlag) |(1<<CFlag)\r
1939 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1940 .hword (0xD5<<8)|(1<<SFlag) |(1<<CFlag)\r
1941 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
1942 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1943 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1944 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
1945 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1946 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1947 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1948 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1949 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1950 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1951 .hword (0xE0<<8)|(1<<SFlag) |(1<<CFlag)\r
1952 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1953 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1954 .hword (0xE3<<8)|(1<<SFlag) |(1<<CFlag)\r
1955 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1956 .hword (0xE5<<8)|(1<<SFlag) |(1<<CFlag)\r
1957 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
1958 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1959 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1960 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
1961 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1962 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1963 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1964 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1965 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1966 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1967 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1968 .hword (0xF1<<8)|(1<<SFlag) |(1<<CFlag)\r
1969 .hword (0xF2<<8)|(1<<SFlag) |(1<<CFlag)\r
1970 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1971 .hword (0xF4<<8)|(1<<SFlag) |(1<<CFlag)\r
1972 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1973 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1974 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
1975 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
1976 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1977 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1978 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1979 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1980 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1981 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1982 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1983 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1984 .hword (0x01<<8) |(1<<CFlag)\r
1985 .hword (0x02<<8) |(1<<CFlag)\r
1986 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1987 .hword (0x04<<8) |(1<<CFlag)\r
1988 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1989 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1990 .hword (0x07<<8) |(1<<CFlag)\r
1991 .hword (0x08<<8) |(1<<CFlag)\r
1992 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1993 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1994 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1995 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1996 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1997 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1998 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1999 .hword (0x10<<8) |(1<<CFlag)\r
2000 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
2001 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
2002 .hword (0x13<<8) |(1<<CFlag)\r
2003 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
2004 .hword (0x15<<8) |(1<<CFlag)\r
2005 .hword (0x16<<8) |(1<<CFlag)\r
2006 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2007 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2008 .hword (0x19<<8) |(1<<CFlag)\r
2009 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2010 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2011 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2012 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2013 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2014 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2015 .hword (0x20<<8) |(1<<CFlag)\r
2016 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
2017 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
2018 .hword (0x23<<8) |(1<<CFlag)\r
2019 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
2020 .hword (0x25<<8) |(1<<CFlag)\r
2021 .hword (0x26<<8) |(1<<CFlag)\r
2022 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2023 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2024 .hword (0x29<<8) |(1<<CFlag)\r
2025 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2026 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2027 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2028 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2029 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2030 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2031 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
2032 .hword (0x31<<8) |(1<<CFlag)\r
2033 .hword (0x32<<8) |(1<<CFlag)\r
2034 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
2035 .hword (0x34<<8) |(1<<CFlag)\r
2036 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
2037 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2038 .hword (0x37<<8) |(1<<CFlag)\r
2039 .hword (0x38<<8) |(1<<CFlag)\r
2040 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2041 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2042 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2043 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2044 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2045 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2046 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2047 .hword (0x40<<8) |(1<<CFlag)\r
2048 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
2049 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
2050 .hword (0x43<<8) |(1<<CFlag)\r
2051 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
2052 .hword (0x45<<8) |(1<<CFlag)\r
2053 .hword (0x46<<8) |(1<<CFlag)\r
2054 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2055 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2056 .hword (0x49<<8) |(1<<CFlag)\r
2057 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2058 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2059 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2060 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2061 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2062 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2063 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
2064 .hword (0x51<<8) |(1<<CFlag)\r
2065 .hword (0x52<<8) |(1<<CFlag)\r
2066 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
2067 .hword (0x54<<8) |(1<<CFlag)\r
2068 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
2069 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2070 .hword (0x57<<8) |(1<<CFlag)\r
2071 .hword (0x58<<8) |(1<<CFlag)\r
2072 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2073 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2074 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2075 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2076 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2077 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2078 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2079 .hword (0x06<<8) |(1<<VFlag)\r
2080 .hword (0x07<<8) \r
2081 .hword (0x08<<8) \r
2082 .hword (0x09<<8) |(1<<VFlag)\r
2083 .hword (0x0A<<8) |(1<<VFlag)\r
2084 .hword (0x0B<<8) \r
2085 .hword (0x0C<<8) |(1<<VFlag)\r
2086 .hword (0x0D<<8) \r
2087 .hword (0x0E<<8) \r
2088 .hword (0x0F<<8) |(1<<VFlag)\r
2089 .hword (0x10<<8) |(1<<HFlag) \r
2090 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
2091 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
2092 .hword (0x13<<8) |(1<<HFlag) \r
2093 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
2094 .hword (0x15<<8) |(1<<HFlag) \r
2095 .hword (0x16<<8) \r
2096 .hword (0x17<<8) |(1<<VFlag)\r
2097 .hword (0x18<<8) |(1<<VFlag)\r
2098 .hword (0x19<<8) \r
2099 .hword (0x1A<<8) \r
2100 .hword (0x1B<<8) |(1<<VFlag)\r
2101 .hword (0x1C<<8) \r
2102 .hword (0x1D<<8) |(1<<VFlag)\r
2103 .hword (0x1E<<8) |(1<<VFlag)\r
2104 .hword (0x1F<<8) \r
2105 .hword (0x20<<8) |(1<<HFlag) \r
2106 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
2107 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
2108 .hword (0x23<<8) |(1<<HFlag) \r
2109 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
2110 .hword (0x25<<8) |(1<<HFlag) \r
2111 .hword (0x26<<8) \r
2112 .hword (0x27<<8) |(1<<VFlag)\r
2113 .hword (0x28<<8) |(1<<VFlag)\r
2114 .hword (0x29<<8) \r
2115 .hword (0x2A<<8) \r
2116 .hword (0x2B<<8) |(1<<VFlag)\r
2117 .hword (0x2C<<8) \r
2118 .hword (0x2D<<8) |(1<<VFlag)\r
2119 .hword (0x2E<<8) |(1<<VFlag)\r
2120 .hword (0x2F<<8) \r
2121 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
2122 .hword (0x31<<8) |(1<<HFlag) \r
2123 .hword (0x32<<8) |(1<<HFlag) \r
2124 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
2125 .hword (0x34<<8) |(1<<HFlag) \r
2126 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
2127 .hword (0x36<<8) |(1<<VFlag)\r
2128 .hword (0x37<<8) \r
2129 .hword (0x38<<8) \r
2130 .hword (0x39<<8) |(1<<VFlag)\r
2131 .hword (0x3A<<8) |(1<<VFlag)\r
2132 .hword (0x3B<<8) \r
2133 .hword (0x3C<<8) |(1<<VFlag)\r
2134 .hword (0x3D<<8) \r
2135 .hword (0x3E<<8) \r
2136 .hword (0x3F<<8) |(1<<VFlag)\r
2137 .hword (0x40<<8) |(1<<HFlag) \r
2138 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
2139 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
2140 .hword (0x43<<8) |(1<<HFlag) \r
2141 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
2142 .hword (0x45<<8) |(1<<HFlag) \r
2143 .hword (0x46<<8) \r
2144 .hword (0x47<<8) |(1<<VFlag)\r
2145 .hword (0x48<<8) |(1<<VFlag)\r
2146 .hword (0x49<<8) \r
2147 .hword (0x4A<<8) \r
2148 .hword (0x4B<<8) |(1<<VFlag)\r
2149 .hword (0x4C<<8) \r
2150 .hword (0x4D<<8) |(1<<VFlag)\r
2151 .hword (0x4E<<8) |(1<<VFlag)\r
2152 .hword (0x4F<<8) \r
2153 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
2154 .hword (0x51<<8) |(1<<HFlag) \r
2155 .hword (0x52<<8) |(1<<HFlag) \r
2156 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
2157 .hword (0x54<<8) |(1<<HFlag) \r
2158 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
2159 .hword (0x56<<8) |(1<<VFlag)\r
2160 .hword (0x57<<8) \r
2161 .hword (0x58<<8) \r
2162 .hword (0x59<<8) |(1<<VFlag)\r
2163 .hword (0x5A<<8) |(1<<VFlag)\r
2164 .hword (0x5B<<8) \r
2165 .hword (0x5C<<8) |(1<<VFlag)\r
2166 .hword (0x5D<<8) \r
2167 .hword (0x5E<<8) \r
2168 .hword (0x5F<<8) |(1<<VFlag)\r
2169 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
2170 .hword (0x61<<8) |(1<<HFlag) \r
2171 .hword (0x62<<8) |(1<<HFlag) \r
2172 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
2173 .hword (0x64<<8) |(1<<HFlag) \r
2174 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
2175 .hword (0x66<<8) |(1<<VFlag)\r
2176 .hword (0x67<<8) \r
2177 .hword (0x68<<8) \r
2178 .hword (0x69<<8) |(1<<VFlag)\r
2179 .hword (0x6A<<8) |(1<<VFlag)\r
2180 .hword (0x6B<<8) \r
2181 .hword (0x6C<<8) |(1<<VFlag)\r
2182 .hword (0x6D<<8) \r
2183 .hword (0x6E<<8) \r
2184 .hword (0x6F<<8) |(1<<VFlag)\r
2185 .hword (0x70<<8) |(1<<HFlag) \r
2186 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
2187 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
2188 .hword (0x73<<8) |(1<<HFlag) \r
2189 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
2190 .hword (0x75<<8) |(1<<HFlag) \r
2191 .hword (0x76<<8) \r
2192 .hword (0x77<<8) |(1<<VFlag)\r
2193 .hword (0x78<<8) |(1<<VFlag)\r
2194 .hword (0x79<<8) \r
2195 .hword (0x7A<<8) \r
2196 .hword (0x7B<<8) |(1<<VFlag)\r
2197 .hword (0x7C<<8) \r
2198 .hword (0x7D<<8) |(1<<VFlag)\r
2199 .hword (0x7E<<8) |(1<<VFlag)\r
2200 .hword (0x7F<<8) \r
2201 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
2202 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2203 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2204 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
2205 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2206 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
2207 .hword (0x86<<8)|(1<<SFlag) \r
2208 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
2209 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
2210 .hword (0x89<<8)|(1<<SFlag) \r
2211 .hword (0x8A<<8)|(1<<SFlag) \r
2212 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag)\r
2213 .hword (0x8C<<8)|(1<<SFlag) \r
2214 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag)\r
2215 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag)\r
2216 .hword (0x8F<<8)|(1<<SFlag) \r
2217 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2218 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
2219 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
2220 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2221 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
2222 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2223 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
2224 .hword (0x97<<8)|(1<<SFlag) \r
2225 .hword (0x98<<8)|(1<<SFlag) \r
2226 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
2227 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag)\r
2228 .hword (0x9B<<8)|(1<<SFlag) \r
2229 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag)\r
2230 .hword (0x9D<<8)|(1<<SFlag) \r
2231 .hword (0x9E<<8)|(1<<SFlag) \r
2232 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag)\r
2233 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2234 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2235 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2236 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2237 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2238 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2239 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2240 .hword (0x07<<8) |(1<<CFlag)\r
2241 .hword (0x08<<8) |(1<<CFlag)\r
2242 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2243 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2244 .hword (0x0B<<8) |(1<<CFlag)\r
2245 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2246 .hword (0x0D<<8) |(1<<CFlag)\r
2247 .hword (0x0E<<8) |(1<<CFlag)\r
2248 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2249 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2250 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2251 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2252 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2253 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2254 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2255 .hword (0x16<<8) |(1<<CFlag)\r
2256 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2257 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2258 .hword (0x19<<8) |(1<<CFlag)\r
2259 .hword (0x1A<<8) |(1<<CFlag)\r
2260 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2261 .hword (0x1C<<8) |(1<<CFlag)\r
2262 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2263 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2264 .hword (0x1F<<8) |(1<<CFlag)\r
2265 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2266 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2267 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2268 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2269 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2270 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2271 .hword (0x26<<8) |(1<<CFlag)\r
2272 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2273 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2274 .hword (0x29<<8) |(1<<CFlag)\r
2275 .hword (0x2A<<8) |(1<<CFlag)\r
2276 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2277 .hword (0x2C<<8) |(1<<CFlag)\r
2278 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2279 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2280 .hword (0x2F<<8) |(1<<CFlag)\r
2281 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2282 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2283 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2284 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2285 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2286 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2287 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2288 .hword (0x37<<8) |(1<<CFlag)\r
2289 .hword (0x38<<8) |(1<<CFlag)\r
2290 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2291 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2292 .hword (0x3B<<8) |(1<<CFlag)\r
2293 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2294 .hword (0x3D<<8) |(1<<CFlag)\r
2295 .hword (0x3E<<8) |(1<<CFlag)\r
2296 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2297 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2298 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2299 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2300 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2301 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2302 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2303 .hword (0x46<<8) |(1<<CFlag)\r
2304 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2305 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2306 .hword (0x49<<8) |(1<<CFlag)\r
2307 .hword (0x4A<<8) |(1<<CFlag)\r
2308 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2309 .hword (0x4C<<8) |(1<<CFlag)\r
2310 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2311 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2312 .hword (0x4F<<8) |(1<<CFlag)\r
2313 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2314 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2315 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2316 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2317 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2318 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2319 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2320 .hword (0x57<<8) |(1<<CFlag)\r
2321 .hword (0x58<<8) |(1<<CFlag)\r
2322 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2323 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2324 .hword (0x5B<<8) |(1<<CFlag)\r
2325 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2326 .hword (0x5D<<8) |(1<<CFlag)\r
2327 .hword (0x5E<<8) |(1<<CFlag)\r
2328 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2329 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2330 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2331 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2332 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2333 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2334 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2335 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
2336 .hword (0x67<<8) |(1<<CFlag)\r
2337 .hword (0x68<<8) |(1<<CFlag)\r
2338 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
2339 .hword (0x6A<<8) |(1<<VFlag) |(1<<CFlag)\r
2340 .hword (0x6B<<8) |(1<<CFlag)\r
2341 .hword (0x6C<<8) |(1<<VFlag) |(1<<CFlag)\r
2342 .hword (0x6D<<8) |(1<<CFlag)\r
2343 .hword (0x6E<<8) |(1<<CFlag)\r
2344 .hword (0x6F<<8) |(1<<VFlag) |(1<<CFlag)\r
2345 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
2346 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2347 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2348 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
2349 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2350 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
2351 .hword (0x76<<8) |(1<<CFlag)\r
2352 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
2353 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
2354 .hword (0x79<<8) |(1<<CFlag)\r
2355 .hword (0x7A<<8) |(1<<CFlag)\r
2356 .hword (0x7B<<8) |(1<<VFlag) |(1<<CFlag)\r
2357 .hword (0x7C<<8) |(1<<CFlag)\r
2358 .hword (0x7D<<8) |(1<<VFlag) |(1<<CFlag)\r
2359 .hword (0x7E<<8) |(1<<VFlag) |(1<<CFlag)\r
2360 .hword (0x7F<<8) |(1<<CFlag)\r
2361 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2362 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2363 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2364 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2365 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2366 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2367 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
2368 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2369 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2370 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
2371 .hword (0x8A<<8)|(1<<SFlag) |(1<<CFlag)\r
2372 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2373 .hword (0x8C<<8)|(1<<SFlag) |(1<<CFlag)\r
2374 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2375 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2376 .hword (0x8F<<8)|(1<<SFlag) |(1<<CFlag)\r
2377 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2378 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2379 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2380 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2381 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2382 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2383 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2384 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
2385 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
2386 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2387 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2388 .hword (0x9B<<8)|(1<<SFlag) |(1<<CFlag)\r
2389 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2390 .hword (0x9D<<8)|(1<<SFlag) |(1<<CFlag)\r
2391 .hword (0x9E<<8)|(1<<SFlag) |(1<<CFlag)\r
2392 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2393 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2394 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2395 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2396 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2397 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2398 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2399 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2400 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
2401 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
2402 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2403 .hword (0xAA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2404 .hword (0xAB<<8)|(1<<SFlag) |(1<<CFlag)\r
2405 .hword (0xAC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2406 .hword (0xAD<<8)|(1<<SFlag) |(1<<CFlag)\r
2407 .hword (0xAE<<8)|(1<<SFlag) |(1<<CFlag)\r
2408 .hword (0xAF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2409 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2410 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2411 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2412 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2413 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2414 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2415 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
2416 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2417 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2418 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
2419 .hword (0xBA<<8)|(1<<SFlag) |(1<<CFlag)\r
2420 .hword (0xBB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2421 .hword (0xBC<<8)|(1<<SFlag) |(1<<CFlag)\r
2422 .hword (0xBD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2423 .hword (0xBE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2424 .hword (0xBF<<8)|(1<<SFlag) |(1<<CFlag)\r
2425 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2426 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2427 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2428 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2429 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2430 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2431 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2432 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
2433 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
2434 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2435 .hword (0xCA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2436 .hword (0xCB<<8)|(1<<SFlag) |(1<<CFlag)\r
2437 .hword (0xCC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2438 .hword (0xCD<<8)|(1<<SFlag) |(1<<CFlag)\r
2439 .hword (0xCE<<8)|(1<<SFlag) |(1<<CFlag)\r
2440 .hword (0xCF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2441 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2442 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2443 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2444 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2445 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2446 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2447 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
2448 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2449 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2450 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
2451 .hword (0xDA<<8)|(1<<SFlag) |(1<<CFlag)\r
2452 .hword (0xDB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2453 .hword (0xDC<<8)|(1<<SFlag) |(1<<CFlag)\r
2454 .hword (0xDD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2455 .hword (0xDE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2456 .hword (0xDF<<8)|(1<<SFlag) |(1<<CFlag)\r
2457 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2458 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2459 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2460 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2461 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2462 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2463 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
2464 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2465 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2466 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
2467 .hword (0xEA<<8)|(1<<SFlag) |(1<<CFlag)\r
2468 .hword (0xEB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2469 .hword (0xEC<<8)|(1<<SFlag) |(1<<CFlag)\r
2470 .hword (0xED<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2471 .hword (0xEE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2472 .hword (0xEF<<8)|(1<<SFlag) |(1<<CFlag)\r
2473 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2474 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2475 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2476 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2477 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2478 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2479 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2480 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
2481 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
2482 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2483 .hword (0xFA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2484 .hword (0xFB<<8)|(1<<SFlag) |(1<<CFlag)\r
2485 .hword (0xFC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2486 .hword (0xFD<<8)|(1<<SFlag) |(1<<CFlag)\r
2487 .hword (0xFE<<8)|(1<<SFlag) |(1<<CFlag)\r
2488 .hword (0xFF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2489 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2490 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2491 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2492 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2493 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2494 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2495 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2496 .hword (0x07<<8) |(1<<CFlag)\r
2497 .hword (0x08<<8) |(1<<CFlag)\r
2498 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2499 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2500 .hword (0x0B<<8) |(1<<CFlag)\r
2501 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2502 .hword (0x0D<<8) |(1<<CFlag)\r
2503 .hword (0x0E<<8) |(1<<CFlag)\r
2504 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2505 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2506 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2507 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2508 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2509 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2510 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2511 .hword (0x16<<8) |(1<<CFlag)\r
2512 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2513 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2514 .hword (0x19<<8) |(1<<CFlag)\r
2515 .hword (0x1A<<8) |(1<<CFlag)\r
2516 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2517 .hword (0x1C<<8) |(1<<CFlag)\r
2518 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2519 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2520 .hword (0x1F<<8) |(1<<CFlag)\r
2521 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2522 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2523 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2524 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2525 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2526 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2527 .hword (0x26<<8) |(1<<CFlag)\r
2528 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2529 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2530 .hword (0x29<<8) |(1<<CFlag)\r
2531 .hword (0x2A<<8) |(1<<CFlag)\r
2532 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2533 .hword (0x2C<<8) |(1<<CFlag)\r
2534 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2535 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2536 .hword (0x2F<<8) |(1<<CFlag)\r
2537 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2538 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2539 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2540 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2541 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2542 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2543 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2544 .hword (0x37<<8) |(1<<CFlag)\r
2545 .hword (0x38<<8) |(1<<CFlag)\r
2546 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2547 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2548 .hword (0x3B<<8) |(1<<CFlag)\r
2549 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2550 .hword (0x3D<<8) |(1<<CFlag)\r
2551 .hword (0x3E<<8) |(1<<CFlag)\r
2552 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2553 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2554 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2555 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2556 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2557 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2558 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2559 .hword (0x46<<8) |(1<<CFlag)\r
2560 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2561 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2562 .hword (0x49<<8) |(1<<CFlag)\r
2563 .hword (0x4A<<8) |(1<<CFlag)\r
2564 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2565 .hword (0x4C<<8) |(1<<CFlag)\r
2566 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2567 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2568 .hword (0x4F<<8) |(1<<CFlag)\r
2569 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2570 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2571 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2572 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2573 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2574 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2575 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2576 .hword (0x57<<8) |(1<<CFlag)\r
2577 .hword (0x58<<8) |(1<<CFlag)\r
2578 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2579 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2580 .hword (0x5B<<8) |(1<<CFlag)\r
2581 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2582 .hword (0x5D<<8) |(1<<CFlag)\r
2583 .hword (0x5E<<8) |(1<<CFlag)\r
2584 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2585 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2586 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2587 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2588 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2589 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2590 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2591 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
2592 .hword (0x01<<8) |(1<<NFlag) \r
2593 .hword (0x02<<8) |(1<<NFlag) \r
2594 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
2595 .hword (0x04<<8) |(1<<NFlag) \r
2596 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2597 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2598 .hword (0x07<<8) |(1<<NFlag) \r
2599 .hword (0x08<<8) |(1<<NFlag) \r
2600 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2601 .hword (0x04<<8) |(1<<NFlag) \r
2602 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2603 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2604 .hword (0x07<<8) |(1<<NFlag) \r
2605 .hword (0x08<<8) |(1<<NFlag) \r
2606 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2607 .hword (0x10<<8) |(1<<NFlag) \r
2608 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
2609 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
2610 .hword (0x13<<8) |(1<<NFlag) \r
2611 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2612 .hword (0x15<<8) |(1<<NFlag) \r
2613 .hword (0x16<<8) |(1<<NFlag) \r
2614 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2615 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2616 .hword (0x19<<8) |(1<<NFlag) \r
2617 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2618 .hword (0x15<<8) |(1<<NFlag) \r
2619 .hword (0x16<<8) |(1<<NFlag) \r
2620 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2621 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2622 .hword (0x19<<8) |(1<<NFlag) \r
2623 .hword (0x20<<8) |(1<<NFlag) \r
2624 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
2625 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
2626 .hword (0x23<<8) |(1<<NFlag) \r
2627 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2628 .hword (0x25<<8) |(1<<NFlag) \r
2629 .hword (0x26<<8) |(1<<NFlag) \r
2630 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2631 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2632 .hword (0x29<<8) |(1<<NFlag) \r
2633 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2634 .hword (0x25<<8) |(1<<NFlag) \r
2635 .hword (0x26<<8) |(1<<NFlag) \r
2636 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2637 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2638 .hword (0x29<<8) |(1<<NFlag) \r
2639 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
2640 .hword (0x31<<8) |(1<<NFlag) \r
2641 .hword (0x32<<8) |(1<<NFlag) \r
2642 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
2643 .hword (0x34<<8) |(1<<NFlag) \r
2644 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2645 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2646 .hword (0x37<<8) |(1<<NFlag) \r
2647 .hword (0x38<<8) |(1<<NFlag) \r
2648 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2649 .hword (0x34<<8) |(1<<NFlag) \r
2650 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2651 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2652 .hword (0x37<<8) |(1<<NFlag) \r
2653 .hword (0x38<<8) |(1<<NFlag) \r
2654 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2655 .hword (0x40<<8) |(1<<NFlag) \r
2656 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
2657 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
2658 .hword (0x43<<8) |(1<<NFlag) \r
2659 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2660 .hword (0x45<<8) |(1<<NFlag) \r
2661 .hword (0x46<<8) |(1<<NFlag) \r
2662 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2663 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2664 .hword (0x49<<8) |(1<<NFlag) \r
2665 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2666 .hword (0x45<<8) |(1<<NFlag) \r
2667 .hword (0x46<<8) |(1<<NFlag) \r
2668 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2669 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2670 .hword (0x49<<8) |(1<<NFlag) \r
2671 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
2672 .hword (0x51<<8) |(1<<NFlag) \r
2673 .hword (0x52<<8) |(1<<NFlag) \r
2674 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
2675 .hword (0x54<<8) |(1<<NFlag) \r
2676 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2677 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2678 .hword (0x57<<8) |(1<<NFlag) \r
2679 .hword (0x58<<8) |(1<<NFlag) \r
2680 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2681 .hword (0x54<<8) |(1<<NFlag) \r
2682 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2683 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2684 .hword (0x57<<8) |(1<<NFlag) \r
2685 .hword (0x58<<8) |(1<<NFlag) \r
2686 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2687 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
2688 .hword (0x61<<8) |(1<<NFlag) \r
2689 .hword (0x62<<8) |(1<<NFlag) \r
2690 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
2691 .hword (0x64<<8) |(1<<NFlag) \r
2692 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2693 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2694 .hword (0x67<<8) |(1<<NFlag) \r
2695 .hword (0x68<<8) |(1<<NFlag) \r
2696 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2697 .hword (0x64<<8) |(1<<NFlag) \r
2698 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2699 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2700 .hword (0x67<<8) |(1<<NFlag) \r
2701 .hword (0x68<<8) |(1<<NFlag) \r
2702 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2703 .hword (0x70<<8) |(1<<NFlag) \r
2704 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
2705 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
2706 .hword (0x73<<8) |(1<<NFlag) \r
2707 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2708 .hword (0x75<<8) |(1<<NFlag) \r
2709 .hword (0x76<<8) |(1<<NFlag) \r
2710 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2711 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2712 .hword (0x79<<8) |(1<<NFlag) \r
2713 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2714 .hword (0x75<<8) |(1<<NFlag) \r
2715 .hword (0x76<<8) |(1<<NFlag) \r
2716 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2717 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2718 .hword (0x79<<8) |(1<<NFlag) \r
2719 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
2720 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2721 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2722 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
2723 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2724 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2725 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2726 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2727 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2728 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2729 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2730 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2731 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2732 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2733 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2734 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2735 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2736 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
2737 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
2738 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2739 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag) \r
2740 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2741 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2742 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag) \r
2743 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag) \r
2744 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2745 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2746 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2747 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2748 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2749 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2750 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2751 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2752 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2753 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2754 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2755 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2756 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2757 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2758 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2759 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2760 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2761 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2762 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2763 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2764 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2765 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2766 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2767 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2768 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2769 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2770 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2771 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2772 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2773 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2774 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2775 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2776 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2777 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2778 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2779 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2780 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2781 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2782 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2783 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2784 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
2785 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
2786 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2787 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2788 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2789 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2790 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2791 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2792 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2793 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2794 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2795 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2796 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2797 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2798 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2799 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
2800 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2801 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2802 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
2803 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2804 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2805 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2806 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2807 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2808 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2809 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2810 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2811 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2812 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2813 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2814 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2815 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2816 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2817 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2818 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2819 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2820 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2821 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2822 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2823 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2824 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2825 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2826 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2827 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2828 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2829 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2830 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2831 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2832 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2833 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2834 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2835 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2836 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2837 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2838 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2839 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2840 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2841 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2842 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2843 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2844 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2845 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2846 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2847 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2848 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2849 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2850 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2851 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2852 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2853 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2854 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2855 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2856 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2857 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2858 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2859 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2860 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2861 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2862 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2863 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2864 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2865 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2866 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2867 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2868 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2869 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2870 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2871 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2872 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2873 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2874 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2875 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2876 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2877 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2878 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2879 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2880 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2881 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2882 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2883 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2884 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2885 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2886 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2887 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2888 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2889 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2890 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2891 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2892 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2893 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2894 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2895 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2896 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2897 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2898 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2899 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2900 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2901 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2902 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2903 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2904 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2905 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2906 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2907 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2908 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2909 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2910 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2911 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2912 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2913 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2914 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2915 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2916 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2917 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2918 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2919 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2920 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2921 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2922 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2923 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2924 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2925 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2926 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2927 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2928 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2929 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2930 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2931 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2932 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2933 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2934 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2935 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2936 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2937 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2938 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2939 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2940 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2941 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2942 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2943 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2944 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
2945 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
2946 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2947 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2948 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2949 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2950 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2951 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2952 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2953 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2954 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2955 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2956 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2957 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2958 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2959 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
2960 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2961 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2962 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
2963 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2964 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2965 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2966 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2967 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2968 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2969 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2970 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2971 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2972 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2973 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2974 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2975 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
2976 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2977 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2978 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
2979 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2980 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2981 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2982 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2983 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2984 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2985 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2986 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2987 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2988 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2989 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2990 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2991 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2992 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
2993 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
2994 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2995 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2996 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2997 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2998 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2999 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3000 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3001 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3002 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3003 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3004 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3005 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3006 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3007 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3008 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3009 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3010 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3011 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3012 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3013 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3014 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3015 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3016 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3017 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3018 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3019 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3020 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3021 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3022 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3023 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3024 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3025 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3026 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3027 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3028 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3029 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3030 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3031 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3032 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3033 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3034 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3035 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3036 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3037 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3038 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3039 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3040 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3041 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3042 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3043 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3044 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3045 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3046 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3047 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3048 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3049 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3050 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3051 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3052 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3053 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3054 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3055 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3056 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3057 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3058 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3059 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3060 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3061 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3062 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3063 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3064 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3065 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3066 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3067 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3068 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3069 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3070 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3071 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3072 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3073 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3074 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3075 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3076 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3077 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3078 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3079 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3080 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3081 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3082 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3083 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3084 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3085 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3086 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3087 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3088 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3089 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3090 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3091 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3092 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3093 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3094 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3095 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3096 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3097 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3098 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3099 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3100 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3101 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3102 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3103 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3104 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3105 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3106 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3107 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3108 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3109 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
3110 .hword (0x01<<8) |(1<<NFlag) \r
3111 .hword (0x02<<8) |(1<<NFlag) \r
3112 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
3113 .hword (0x04<<8) |(1<<NFlag) \r
3114 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
3115 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
3116 .hword (0x07<<8) |(1<<NFlag) \r
3117 .hword (0x08<<8) |(1<<NFlag) \r
3118 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
3119 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3120 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag) \r
3121 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3122 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag) \r
3123 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag) \r
3124 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3125 .hword (0x10<<8) |(1<<NFlag) \r
3126 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
3127 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
3128 .hword (0x13<<8) |(1<<NFlag) \r
3129 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
3130 .hword (0x15<<8) |(1<<NFlag) \r
3131 .hword (0x16<<8) |(1<<NFlag) \r
3132 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
3133 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
3134 .hword (0x19<<8) |(1<<NFlag) \r
3135 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag) \r
3136 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3137 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag) \r
3138 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3139 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3140 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag) \r
3141 .hword (0x20<<8) |(1<<NFlag) \r
3142 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
3143 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
3144 .hword (0x23<<8) |(1<<NFlag) \r
3145 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
3146 .hword (0x25<<8) |(1<<NFlag) \r
3147 .hword (0x26<<8) |(1<<NFlag) \r
3148 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
3149 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
3150 .hword (0x29<<8) |(1<<NFlag) \r
3151 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag) \r
3152 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3153 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag) \r
3154 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3155 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3156 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag) \r
3157 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
3158 .hword (0x31<<8) |(1<<NFlag) \r
3159 .hword (0x32<<8) |(1<<NFlag) \r
3160 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
3161 .hword (0x34<<8) |(1<<NFlag) \r
3162 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
3163 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
3164 .hword (0x37<<8) |(1<<NFlag) \r
3165 .hword (0x38<<8) |(1<<NFlag) \r
3166 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
3167 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3168 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag) \r
3169 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3170 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag) \r
3171 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag) \r
3172 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3173 .hword (0x40<<8) |(1<<NFlag) \r
3174 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
3175 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
3176 .hword (0x43<<8) |(1<<NFlag) \r
3177 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
3178 .hword (0x45<<8) |(1<<NFlag) \r
3179 .hword (0x46<<8) |(1<<NFlag) \r
3180 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
3181 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
3182 .hword (0x49<<8) |(1<<NFlag) \r
3183 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag) \r
3184 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3185 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag) \r
3186 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3187 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3188 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag) \r
3189 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
3190 .hword (0x51<<8) |(1<<NFlag) \r
3191 .hword (0x52<<8) |(1<<NFlag) \r
3192 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
3193 .hword (0x54<<8) |(1<<NFlag) \r
3194 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
3195 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
3196 .hword (0x57<<8) |(1<<NFlag) \r
3197 .hword (0x58<<8) |(1<<NFlag) \r
3198 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
3199 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3200 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag) \r
3201 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3202 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag) \r
3203 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag) \r
3204 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3205 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
3206 .hword (0x61<<8) |(1<<NFlag) \r
3207 .hword (0x62<<8) |(1<<NFlag) \r
3208 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
3209 .hword (0x64<<8) |(1<<NFlag) \r
3210 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
3211 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
3212 .hword (0x67<<8) |(1<<NFlag) \r
3213 .hword (0x68<<8) |(1<<NFlag) \r
3214 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
3215 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3216 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag) \r
3217 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3218 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag) \r
3219 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag) \r
3220 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3221 .hword (0x70<<8) |(1<<NFlag) \r
3222 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
3223 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
3224 .hword (0x73<<8) |(1<<NFlag) \r
3225 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
3226 .hword (0x75<<8) |(1<<NFlag) \r
3227 .hword (0x76<<8) |(1<<NFlag) \r
3228 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
3229 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
3230 .hword (0x79<<8) |(1<<NFlag) \r
3231 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag) \r
3232 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3233 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag) \r
3234 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3235 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3236 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag) \r
3237 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
3238 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3239 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3240 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
3241 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3242 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
3243 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
3244 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3245 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3246 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
3247 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3248 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3249 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3250 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3251 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3252 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3253 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3254 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
3255 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
3256 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3257 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3258 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3259 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3260 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3261 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3262 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3263 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3264 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3265 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3266 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3267 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3268 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3269 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3270 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3271 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3272 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3273 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3274 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3275 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3276 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3277 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3278 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3279 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3280 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3281 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3282 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3283 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3284 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3285 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3286 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3287 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3288 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3289 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3290 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3291 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3292 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3293 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3294 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3295 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3296 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3297 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3298 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3299 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3300 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3301 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3302 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3303 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3304 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3305 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3306 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3307 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3308 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3309 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3310 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3311 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3312 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3313 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3314 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3315 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3316 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3317 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3318 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3319 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3320 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3321 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3322 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3323 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3324 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3325 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3326 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3327 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3328 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3329 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3330 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3331 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3332 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3333 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3334 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3335 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3336 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3337 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3338 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3339 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3340 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3341 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3342 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3343 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3344 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3345 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3346 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3347 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3348 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3349 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3350 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3351 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3352 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3353 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3354 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3355 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3356 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3357 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3358 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3359 .hword (0x9A<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3360 .hword (0x9B<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3361 .hword (0x9C<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3362 .hword (0x9D<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3363 .hword (0x9E<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3364 .hword (0x9F<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3365 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3366 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3367 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3368 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3369 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3370 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3371 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3372 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3373 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3374 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3375 .hword (0xAA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3376 .hword (0xAB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3377 .hword (0xAC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3378 .hword (0xAD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3379 .hword (0xAE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3380 .hword (0xAF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3381 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3382 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3383 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3384 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3385 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3386 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3387 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3388 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3389 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3390 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3391 .hword (0xBA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3392 .hword (0xBB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3393 .hword (0xBC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3394 .hword (0xBD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3395 .hword (0xBE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3396 .hword (0xBF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3397 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3398 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3399 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3400 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3401 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3402 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3403 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3404 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3405 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3406 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3407 .hword (0xCA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3408 .hword (0xCB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3409 .hword (0xCC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3410 .hword (0xCD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3411 .hword (0xCE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3412 .hword (0xCF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3413 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3414 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3415 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3416 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3417 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3418 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3419 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3420 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3421 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3422 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3423 .hword (0xDA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3424 .hword (0xDB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3425 .hword (0xDC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3426 .hword (0xDD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3427 .hword (0xDE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3428 .hword (0xDF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3429 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3430 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3431 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3432 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3433 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3434 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3435 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3436 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3437 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3438 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3439 .hword (0xEA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3440 .hword (0xEB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3441 .hword (0xEC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3442 .hword (0xED<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3443 .hword (0xEE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3444 .hword (0xEF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3445 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3446 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3447 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3448 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3449 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3450 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3451 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3452 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3453 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3454 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3455 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3456 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3457 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3458 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3459 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3460 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3461 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3462 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
3463 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
3464 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3465 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
3466 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3467 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3468 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
3469 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
3470 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3471 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3472 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3473 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3474 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3475 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3476 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3477 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
3478 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3479 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3480 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
3481 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3482 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
3483 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
3484 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3485 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3486 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
3487 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3488 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3489 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3490 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3491 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3492 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3493 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
3494 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3495 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3496 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
3497 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3498 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
3499 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
3500 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3501 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3502 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
3503 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3504 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3505 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3506 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3507 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3508 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3509 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3510 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
3511 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
3512 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3513 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3514 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3515 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3516 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3517 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3518 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3519 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3520 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3521 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3522 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3523 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3524 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3525 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3526 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3527 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3528 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3529 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3530 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3531 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3532 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3533 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3534 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3535 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3536 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3537 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3538 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3539 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3540 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3541 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3542 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3543 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3544 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3545 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3546 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3547 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3548 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3549 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3550 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3551 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3552 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3553 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3554 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3555 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3556 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3557 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3558 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3559 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3560 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3561 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3562 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3563 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3564 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3565 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3566 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3567 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3568 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3569 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3570 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3571 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3572 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3573 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3574 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3575 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3576 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3577 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3578 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3579 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3580 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3581 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3582 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3583 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3584 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3585 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3586 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3587 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3588 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3589 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3590 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3591 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3592 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3593 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3594 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3595 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3596 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3597 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3598 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3599 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3600 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3601 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3602 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3603 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3604 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3605 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3606 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3607 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3608 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3609 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3610 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3611 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3612 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3613 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3614 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3615 \r
3616.align 4\r
3617\r
3618AF_Z80: .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 0\r
3619 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 1\r
3620 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 2\r
3621 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 3\r
3622 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 4\r
3623 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 5\r
3624 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 6\r
3625 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 7\r
3626 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 8\r
3627 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 9\r
3628 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 10\r
3629 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 11\r
3630 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 12\r
3631 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 13\r
3632 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 14\r
3633 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 15\r
3634 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 16\r
3635 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 17\r
3636 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 18\r
3637 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 19\r
3638 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 20\r
3639 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 21\r
3640 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 22\r
3641 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 23\r
3642 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 24\r
3643 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 25\r
3644 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 26\r
3645 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 27\r
3646 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 28\r
3647 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 29\r
3648 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 30\r
3649 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 31\r
3650 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 32\r
3651 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 33\r
3652 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 34\r
3653 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 35\r
3654 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 36\r
3655 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 37\r
3656 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 38\r
3657 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 39\r
3658 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 40\r
3659 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 41\r
3660 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 42\r
3661 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 43\r
3662 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 44\r
3663 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 45\r
3664 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 46\r
3665 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 47\r
3666 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 48\r
3667 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 49\r
3668 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 50\r
3669 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 51\r
3670 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 52\r
3671 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 53\r
3672 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 54\r
3673 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 55\r
3674 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 56\r
3675 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 57\r
3676 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 58\r
3677 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 59\r
3678 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 60\r
3679 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 61\r
3680 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 62\r
3681 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 63\r
3682 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 64\r
3683 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 65\r
3684 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 66\r
3685 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 67\r
3686 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 68\r
3687 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 69\r
3688 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 70\r
3689 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 71\r
3690 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 72\r
3691 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 73\r
3692 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 74\r
3693 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 75\r
3694 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 76\r
3695 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 77\r
3696 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 78\r
3697 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 79\r
3698 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 80\r
3699 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 81\r
3700 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 82\r
3701 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 83\r
3702 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 84\r
3703 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 85\r
3704 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 86\r
3705 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 87\r
3706 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 88\r
3707 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 89\r
3708 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 90\r
3709 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 91\r
3710 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 92\r
3711 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 93\r
3712 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 94\r
3713 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 95\r
3714 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 96\r
3715 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 97\r
3716 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 98\r
3717 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 99\r
3718 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 100\r
3719 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 101\r
3720 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 102\r
3721 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 103\r
3722 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 104\r
3723 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 105\r
3724 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 106\r
3725 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 107\r
3726 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 108\r
3727 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 109\r
3728 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 110\r
3729 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 111\r
3730 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 112\r
3731 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 113\r
3732 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 114\r
3733 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 115\r
3734 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 116\r
3735 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 117\r
3736 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 118\r
3737 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 119\r
3738 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 120\r
3739 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 121\r
3740 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 122\r
3741 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 123\r
3742 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 124\r
3743 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 125\r
3744 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 126\r
3745 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 127\r
3746 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 128\r
3747 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 129\r
3748 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 130\r
3749 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 131\r
3750 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 132\r
3751 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 133\r
3752 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 134\r
3753 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 135\r
3754 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 136\r
3755 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 137\r
3756 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 138\r
3757 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 139\r
3758 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 140\r
3759 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 141\r
3760 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 142\r
3761 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 143\r
3762 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 144\r
3763 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 145\r
3764 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 146\r
3765 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 147\r
3766 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 148\r
3767 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 149\r
3768 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 150\r
3769 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 151\r
3770 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 152\r
3771 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 153\r
3772 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 154\r
3773 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 155\r
3774 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 156\r
3775 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 157\r
3776 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 158\r
3777 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 159\r
3778 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 160\r
3779 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 161\r
3780 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 162\r
3781 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 163\r
3782 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 164\r
3783 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 165\r
3784 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 166\r
3785 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 167\r
3786 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 168\r
3787 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 169\r
3788 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 170\r
3789 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 171\r
3790 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 172\r
3791 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 173\r
3792 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 174\r
3793 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 175\r
3794 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 176\r
3795 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 177\r
3796 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 178\r
3797 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 179\r
3798 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 180\r
3799 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 181\r
3800 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 182\r
3801 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 183\r
3802 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 184\r
3803 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 185\r
3804 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 186\r
3805 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 187\r
3806 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 188\r
3807 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 189\r
3808 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 190\r
3809 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 191\r
3810 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 192\r
3811 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 193\r
3812 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 194\r
3813 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 195\r
3814 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 196\r
3815 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 197\r
3816 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 198\r
3817 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 199\r
3818 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 200\r
3819 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 201\r
3820 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 202\r
3821 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 203\r
3822 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 204\r
3823 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 205\r
3824 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 206\r
3825 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 207\r
3826 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 208\r
3827 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 209\r
3828 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 210\r
3829 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 211\r
3830 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 212\r
3831 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 213\r
3832 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 214\r
3833 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 215\r
3834 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 216\r
3835 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 217\r
3836 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 218\r
3837 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 219\r
3838 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 220\r
3839 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 221\r
3840 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 222\r
3841 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 223\r
3842 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 224\r
3843 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 225\r
3844 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 226\r
3845 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 227\r
3846 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 228\r
3847 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 229\r
3848 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 230\r
3849 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 231\r
3850 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 232\r
3851 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 233\r
3852 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 234\r
3853 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 235\r
3854 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 236\r
3855 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 237\r
3856 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 238\r
3857 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 239\r
3858 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 240\r
3859 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 241\r
3860 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 242\r
3861 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 243\r
3862 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 244\r
3863 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 245\r
3864 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 246\r
3865 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 247\r
3866 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 248\r
3867 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 249\r
3868 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 250\r
3869 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 251\r
3870 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 252\r
3871 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 253\r
3872 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 254\r
3873 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 255\r
3874\r
3875.align 4\r
3876\r
3877AF_ARM: .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 0\r
3878 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 1\r
3879 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 2\r
3880 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 3\r
3881 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 4\r
3882 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 5\r
3883 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 6\r
3884 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 7\r
3885 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 8\r
3886 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 9\r
3887 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 10\r
3888 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 11\r
3889 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 12\r
3890 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 13\r
3891 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 14\r
3892 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 15\r
3893 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 16\r
3894 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 17\r
3895 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 18\r
3896 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 19\r
3897 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 20\r
3898 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 21\r
3899 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 22\r
3900 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 23\r
3901 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 24\r
3902 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 25\r
3903 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 26\r
3904 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 27\r
3905 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 28\r
3906 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 29\r
3907 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 30\r
3908 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 31\r
3909 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 32\r
3910 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 33\r
3911 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 34\r
3912 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 35\r
3913 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 36\r
3914 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 37\r
3915 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 38\r
3916 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 39\r
3917 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 40\r
3918 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 41\r
3919 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 42\r
3920 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 43\r
3921 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 44\r
3922 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 45\r
3923 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 46\r
3924 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 47\r
3925 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 48\r
3926 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 49\r
3927 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 50\r
3928 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 51\r
3929 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 52\r
3930 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 53\r
3931 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 54\r
3932 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 55\r
3933 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 56\r
3934 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 57\r
3935 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 58\r
3936 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 59\r
3937 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 60\r
3938 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 61\r
3939 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 62\r
3940 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 63\r
3941 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 64\r
3942 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 65\r
3943 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 66\r
3944 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 67\r
3945 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 68\r
3946 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 69\r
3947 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 70\r
3948 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 71\r
3949 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 72\r
3950 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 73\r
3951 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 74\r
3952 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 75\r
3953 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 76\r
3954 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 77\r
3955 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 78\r
3956 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 79\r
3957 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 80\r
3958 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 81\r
3959 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 82\r
3960 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 83\r
3961 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 84\r
3962 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 85\r
3963 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 86\r
3964 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 87\r
3965 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 88\r
3966 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 89\r
3967 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 90\r
3968 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 91\r
3969 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 92\r
3970 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 93\r
3971 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 94\r
3972 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 95\r
3973 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 96\r
3974 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 97\r
3975 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 98\r
3976 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 99\r
3977 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 100\r
3978 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 101\r
3979 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 102\r
3980 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 103\r
3981 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 104\r
3982 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 105\r
3983 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 106\r
3984 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 107\r
3985 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 108\r
3986 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 109\r
3987 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 110\r
3988 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 111\r
3989 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 112\r
3990 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 113\r
3991 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 114\r
3992 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 115\r
3993 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 116\r
3994 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 117\r
3995 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 118\r
3996 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 119\r
3997 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 120\r
3998 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 121\r
3999 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 122\r
4000 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 123\r
4001 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 124\r
4002 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 125\r
4003 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 126\r
4004 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 127\r
4005 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 128\r
4006 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 129\r
4007 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 130\r
4008 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 131\r
4009 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 132\r
4010 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 133\r
4011 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 134\r
4012 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 135\r
4013 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 136\r
4014 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 137\r
4015 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 138\r
4016 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 139\r
4017 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 140\r
4018 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 141\r
4019 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 142\r
4020 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 143\r
4021 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 144\r
4022 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 145\r
4023 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 146\r
4024 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 147\r
4025 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 148\r
4026 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 149\r
4027 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 150\r
4028 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 151\r
4029 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 152\r
4030 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 153\r
4031 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 154\r
4032 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 155\r
4033 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 156\r
4034 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 157\r
4035 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 158\r
4036 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 159\r
4037 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 160\r
4038 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 161\r
4039 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 162\r
4040 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 163\r
4041 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 164\r
4042 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 165\r
4043 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 166\r
4044 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 167\r
4045 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 168\r
4046 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 169\r
4047 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 170\r
4048 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 171\r
4049 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 172\r
4050 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 173\r
4051 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 174\r
4052 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 175\r
4053 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 176\r
4054 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 177\r
4055 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 178\r
4056 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 179\r
4057 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 180\r
4058 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 181\r
4059 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 182\r
4060 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 183\r
4061 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 184\r
4062 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 185\r
4063 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 186\r
4064 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 187\r
4065 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 188\r
4066 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 189\r
4067 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 190\r
4068 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 191\r
4069 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 192\r
4070 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 193\r
4071 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 194\r
4072 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 195\r
4073 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 196\r
4074 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 197\r
4075 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 198\r
4076 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 199\r
4077 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 200\r
4078 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 201\r
4079 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 202\r
4080 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 203\r
4081 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 204\r
4082 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 205\r
4083 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 206\r
4084 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 207\r
4085 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 208\r
4086 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 209\r
4087 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 210\r
4088 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 211\r
4089 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 212\r
4090 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 213\r
4091 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 214\r
4092 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 215\r
4093 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 216\r
4094 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 217\r
4095 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 218\r
4096 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 219\r
4097 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 220\r
4098 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 221\r
4099 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 222\r
4100 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 223\r
4101 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 224\r
4102 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 225\r
4103 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 226\r
4104 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 227\r
4105 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 228\r
4106 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 229\r
4107 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 230\r
4108 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 231\r
4109 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 232\r
4110 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 233\r
4111 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 234\r
4112 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 235\r
4113 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 236\r
4114 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 237\r
4115 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 238\r
4116 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 239\r
4117 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 240\r
4118 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 241\r
4119 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 242\r
4120 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 243\r
4121 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 244\r
4122 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 245\r
4123 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 246\r
4124 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 247\r
4125 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 248\r
4126 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 249\r
4127 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 250\r
4128 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 251\r
4129 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 252\r
4130 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 253\r
4131 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 254\r
4132 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 255\r
4133\r
4134.align 4\r
4135\r
4136PZSTable_data: .byte (1<<ZFlag)|(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4137 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4138 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4139 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4140 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4141 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4142 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4143 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4144 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4145 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4146 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4147 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4148 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4149 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4150 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4151 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4152 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4153 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4154 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4155 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4156 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4157 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4158 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4159 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4160 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4161 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4162 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4163 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4164 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4165 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4166 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4167 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4168 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4169 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4170 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4171 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4172 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4173 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4174 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4175 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4176 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag) \r
4177\r
4178.align 4\r
4179\r
4180MAIN_opcodes: \r
4181 .word opcode_0_0,opcode_0_1,opcode_0_2,opcode_0_3,opcode_0_4,opcode_0_5,opcode_0_6,opcode_0_7\r
4182 .word opcode_0_8,opcode_0_9,opcode_0_A,opcode_0_B,opcode_0_C,opcode_0_D,opcode_0_E,opcode_0_F\r
4183 .word opcode_1_0,opcode_1_1,opcode_1_2,opcode_1_3,opcode_1_4,opcode_1_5,opcode_1_6,opcode_1_7\r
4184 .word opcode_1_8,opcode_1_9,opcode_1_A,opcode_1_B,opcode_1_C,opcode_1_D,opcode_1_E,opcode_1_F\r
4185 .word opcode_2_0,opcode_2_1,opcode_2_2,opcode_2_3,opcode_2_4,opcode_2_5,opcode_2_6,opcode_2_7\r
4186 .word opcode_2_8,opcode_2_9,opcode_2_A,opcode_2_B,opcode_2_C,opcode_2_D,opcode_2_E,opcode_2_F\r
4187 .word opcode_3_0,opcode_3_1,opcode_3_2,opcode_3_3,opcode_3_4,opcode_3_5,opcode_3_6,opcode_3_7\r
4188 .word opcode_3_8,opcode_3_9,opcode_3_A,opcode_3_B,opcode_3_C,opcode_3_D,opcode_3_E,opcode_3_F\r
4189 .word opcode_4_0,opcode_4_1,opcode_4_2,opcode_4_3,opcode_4_4,opcode_4_5,opcode_4_6,opcode_4_7\r
4190 .word opcode_4_8,opcode_4_9,opcode_4_A,opcode_4_B,opcode_4_C,opcode_4_D,opcode_4_E,opcode_4_F\r
4191 .word opcode_5_0,opcode_5_1,opcode_5_2,opcode_5_3,opcode_5_4,opcode_5_5,opcode_5_6,opcode_5_7\r
4192 .word opcode_5_8,opcode_5_9,opcode_5_A,opcode_5_B,opcode_5_C,opcode_5_D,opcode_5_E,opcode_5_F\r
4193 .word opcode_6_0,opcode_6_1,opcode_6_2,opcode_6_3,opcode_6_4,opcode_6_5,opcode_6_6,opcode_6_7\r
4194 .word opcode_6_8,opcode_6_9,opcode_6_A,opcode_6_B,opcode_6_C,opcode_6_D,opcode_6_E,opcode_6_F\r
4195 .word opcode_7_0,opcode_7_1,opcode_7_2,opcode_7_3,opcode_7_4,opcode_7_5,opcode_7_6,opcode_7_7\r
4196 .word opcode_7_8,opcode_7_9,opcode_7_A,opcode_7_B,opcode_7_C,opcode_7_D,opcode_7_E,opcode_7_F\r
4197 .word opcode_8_0,opcode_8_1,opcode_8_2,opcode_8_3,opcode_8_4,opcode_8_5,opcode_8_6,opcode_8_7\r
4198 .word opcode_8_8,opcode_8_9,opcode_8_A,opcode_8_B,opcode_8_C,opcode_8_D,opcode_8_E,opcode_8_F\r
4199 .word opcode_9_0,opcode_9_1,opcode_9_2,opcode_9_3,opcode_9_4,opcode_9_5,opcode_9_6,opcode_9_7\r
4200 .word opcode_9_8,opcode_9_9,opcode_9_A,opcode_9_B,opcode_9_C,opcode_9_D,opcode_9_E,opcode_9_F\r
4201 .word opcode_A_0,opcode_A_1,opcode_A_2,opcode_A_3,opcode_A_4,opcode_A_5,opcode_A_6,opcode_A_7\r
4202 .word opcode_A_8,opcode_A_9,opcode_A_A,opcode_A_B,opcode_A_C,opcode_A_D,opcode_A_E,opcode_A_F\r
4203 .word opcode_B_0,opcode_B_1,opcode_B_2,opcode_B_3,opcode_B_4,opcode_B_5,opcode_B_6,opcode_B_7\r
4204 .word opcode_B_8,opcode_B_9,opcode_B_A,opcode_B_B,opcode_B_C,opcode_B_D,opcode_B_E,opcode_B_F\r
4205 .word opcode_C_0,opcode_C_1,opcode_C_2,opcode_C_3,opcode_C_4,opcode_C_5,opcode_C_6,opcode_C_7\r
4206 .word opcode_C_8,opcode_C_9,opcode_C_A,opcode_C_B,opcode_C_C,opcode_C_D,opcode_C_E,opcode_C_F\r
4207 .word opcode_D_0,opcode_D_1,opcode_D_2,opcode_D_3,opcode_D_4,opcode_D_5,opcode_D_6,opcode_D_7\r
4208 .word opcode_D_8,opcode_D_9,opcode_D_A,opcode_D_B,opcode_D_C,opcode_D_D,opcode_D_E,opcode_D_F\r
4209 .word opcode_E_0,opcode_E_1,opcode_E_2,opcode_E_3,opcode_E_4,opcode_E_5,opcode_E_6,opcode_E_7\r
4210 .word opcode_E_8,opcode_E_9,opcode_E_A,opcode_E_B,opcode_E_C,opcode_E_D,opcode_E_E,opcode_E_F\r
4211 .word opcode_F_0,opcode_F_1,opcode_F_2,opcode_F_3,opcode_F_4,opcode_F_5,opcode_F_6,opcode_F_7\r
4212 .word opcode_F_8,opcode_F_9,opcode_F_A,opcode_F_B,opcode_F_C,opcode_F_D,opcode_F_E,opcode_F_F\r
4213\r
4214.align 4\r
4215\r
4216EI_DUMMY_opcodes:\r
4217 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4218 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4219 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4220 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4221 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4222 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4223 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4224 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4225 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4226 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4227 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4228 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4229 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4230 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4231 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4232 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4233 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4234 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4235 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4236 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4237 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4238 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4239 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4240 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4241 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4242 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4243 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4244 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4245 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4246 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4247 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4248 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4249\r
4250.text\r
4251.align 4\r
4252\r
4253;@NOP\r
4254opcode_0_0:\r
4255;@LD B,B\r
4256opcode_4_0:\r
4257;@LD C,C\r
4258opcode_4_9:\r
4259;@LD D,D\r
4260opcode_5_2:\r
4261;@LD E,E\r
4262opcode_5_B:\r
4263;@LD H,H\r
4264opcode_6_4:\r
4265;@LD L,L\r
4266opcode_6_D:\r
4267;@LD A,A\r
4268opcode_7_F:\r
4269 fetch 4\r
4270;@LD BC,NN\r
4271opcode_0_1:\r
4272 ldrb r0,[z80pc],#1\r
4273 ldrb r1,[z80pc],#1\r
4274 orr r0,r0,r1, lsl #8\r
4275 mov z80bc,r0, lsl #16\r
4276 fetch 10\r
4277;@LD (BC),A\r
4278opcode_0_2:\r
4279 mov r0,z80a, lsr #24\r
4280 mov r1,z80bc, lsr #16\r
4281 writemem8\r
4282 fetch 7\r
4283;@INC BC\r
4284opcode_0_3:\r
4285 add z80bc,z80bc,#1<<16\r
4286 fetch 6\r
4287;@INC B\r
4288opcode_0_4:\r
4289 opINC8H z80bc\r
4290 fetch 4\r
4291;@DEC B\r
4292opcode_0_5:\r
4293 opDEC8H z80bc\r
4294 fetch 4\r
4295;@LD B,N\r
4296opcode_0_6:\r
4297 ldrb r1,[z80pc],#1\r
4298 and z80bc,z80bc,#0xFF<<16\r
4299 orr z80bc,z80bc,r1, lsl #24\r
4300 fetch 7\r
4301;@RLCA\r
4302opcode_0_7:\r
4303 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4304 movs z80a,z80a, lsl #1\r
4305 orrcs z80a,z80a,#1<<24\r
4306 orrcs z80f,z80f,#1<<CFlag\r
4307 fetch 4\r
4308;@EX AF,AF'\r
4309opcode_0_8:\r
4310 add r1,cpucontext,#z80a2\r
4311 swp z80a,z80a,[r1]\r
4312 add r1,cpucontext,#z80f2\r
4313 swp z80f,z80f,[r1]\r
4314 fetch 4\r
4315;@ADD HL,BC\r
4316opcode_0_9:\r
4317 opADD16 z80hl z80bc\r
4318 fetch 11\r
4319;@LD A,(BC)\r
4320opcode_0_A:\r
4321 mov r0,z80bc, lsr #16\r
4322 readmem8\r
4323 mov z80a,r0, lsl #24\r
4324 fetch 7\r
4325;@DEC BC\r
4326opcode_0_B:\r
4327 sub z80bc,z80bc,#1<<16\r
4328 fetch 6\r
4329;@INC C\r
4330opcode_0_C:\r
4331 opINC8L z80bc\r
4332 fetch 4\r
4333;@DEC C\r
4334opcode_0_D:\r
4335 opDEC8L z80bc\r
4336 fetch 4\r
4337;@LD C,N\r
4338opcode_0_E:\r
4339 ldrb r1,[z80pc],#1\r
4340 and z80bc,z80bc,#0xFF<<24\r
4341 orr z80bc,z80bc,r1, lsl #16\r
4342 fetch 7\r
4343;@RRCA\r
4344opcode_0_F:\r
4345 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4346 movs z80a,z80a, lsr #25\r
4347 orrcs z80a,z80a,#1<<7\r
4348 orrcs z80f,z80f,#1<<CFlag\r
4349 mov z80a,z80a, lsl #24\r
4350 fetch 4\r
4351;@DJNZ $+2\r
4352opcode_1_0:\r
4353 sub z80bc,z80bc,#1<<24\r
4354 tst z80bc,#0xFF<<24\r
4355 ldrsb r1,[z80pc],#1\r
4356 addne z80pc,z80pc,r1\r
4357 subne z80_icount,z80_icount,#5\r
4358 fetch 8\r
4359\r
4360;@LD DE,NN\r
4361opcode_1_1:\r
4362 ldrb r0,[z80pc],#1\r
4363 ldrb r1,[z80pc],#1\r
4364 orr r0,r0,r1, lsl #8\r
4365 mov z80de,r0, lsl #16\r
4366 fetch 10\r
4367;@LD (DE),A\r
4368opcode_1_2:\r
4369 mov r0,z80a, lsr #24\r
4370 writemem8DE\r
4371 fetch 7\r
4372;@INC DE\r
4373opcode_1_3:\r
4374 add z80de,z80de,#1<<16\r
4375 fetch 6\r
4376;@INC D\r
4377opcode_1_4:\r
4378 opINC8H z80de\r
4379 fetch 4\r
4380;@DEC D\r
4381opcode_1_5:\r
4382 opDEC8H z80de\r
4383 fetch 4\r
4384;@LD D,N\r
4385opcode_1_6:\r
4386 ldrb r1,[z80pc],#1\r
4387 and z80de,z80de,#0xFF<<16\r
4388 orr z80de,z80de,r1, lsl #24\r
4389 fetch 7\r
4390;@RLA\r
4391opcode_1_7:\r
4392 tst z80f,#1<<CFlag\r
4393 orrne z80a,z80a,#1<<23\r
4394 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4395 movs z80a,z80a, lsl #1\r
4396 orrcs z80f,z80f,#1<<CFlag\r
4397 fetch 4\r
4398;@JR $+2\r
4399opcode_1_8:\r
4400 ldrsb r1,[z80pc],#1\r
4401 add z80pc,z80pc,r1\r
4402 fetch 12\r
4403;@ADD HL,DE\r
4404opcode_1_9:\r
4405 opADD16 z80hl z80de\r
4406 fetch 11\r
4407;@LD A,(DE)\r
4408opcode_1_A:\r
4409 mov r0,z80de, lsr #16\r
4410 readmem8\r
4411 mov z80a,r0, lsl #24\r
4412 fetch 7\r
4413;@DEC DE\r
4414opcode_1_B:\r
4415 sub z80de,z80de,#1<<16\r
4416 fetch 6\r
4417;@INC E\r
4418opcode_1_C:\r
4419 opINC8L z80de\r
4420 fetch 4\r
4421;@DEC E\r
4422opcode_1_D:\r
4423 opDEC8L z80de\r
4424 fetch 4\r
4425;@LD E,N\r
4426opcode_1_E:\r
4427 ldrb r0,[z80pc],#1\r
4428 and z80de,z80de,#0xFF<<24\r
4429 orr z80de,z80de,r0, lsl #16\r
4430 fetch 7\r
4431;@RRA\r
4432opcode_1_F:\r
4433 orr z80a,z80a,z80f,lsr#1 ;@get C\r
4434 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4435 movs z80a,z80a,ror#25\r
4436 orrcs z80f,z80f,#1<<CFlag\r
4437 mov z80a,z80a,lsl#24\r
4438 fetch 4\r
4439;@JR NZ,$+2\r
4440opcode_2_0:\r
4441 tst z80f,#1<<ZFlag\r
4442 beq opcode_1_8\r
4443 add z80pc,z80pc,#1\r
4444 fetch 7\r
4445;@LD HL,NN\r
4446opcode_2_1:\r
4447 ldrb r0,[z80pc],#1\r
4448 ldrb r1,[z80pc],#1\r
4449 orr r0,r0,r1, lsl #8\r
4450 mov z80hl,r0, lsl #16\r
4451 fetch 10\r
4452;@LD (NN),HL\r
4453opcode_ED_63:\r
4454 eatcycles 4\r
4455;@LD (NN),HL\r
4456opcode_2_2:\r
4457 ldrb r0,[z80pc],#1\r
4458 ldrb r1,[z80pc],#1\r
4459 orr r1,r0,r1, lsl #8\r
4460 mov r0,z80hl, lsr #16\r
4461 writemem16\r
4462 fetch 16\r
4463;@INC HL\r
4464opcode_2_3:\r
4465 add z80hl,z80hl,#1<<16\r
4466 fetch 6\r
4467;@INC H\r
4468opcode_2_4:\r
4469 opINC8H z80hl\r
4470 fetch 4\r
4471;@DEC H\r
4472opcode_2_5:\r
4473 opDEC8H z80hl\r
4474 fetch 4\r
4475;@LD H,N\r
4476opcode_2_6:\r
4477 ldrb r1,[z80pc],#1\r
4478 and z80hl,z80hl,#0xFF<<16\r
4479 orr z80hl,z80hl,r1, lsl #24\r
4480 fetch 7\r
4481DAATABLE_LOCAL: .word DAATable\r
4482;@DAA\r
4483opcode_2_7:\r
4484 mov r1,z80a, lsr #24\r
4485 tst z80f,#1<<CFlag\r
4486 orrne r1,r1,#256\r
4487 tst z80f,#1<<HFlag\r
4488 orrne r1,r1,#512\r
4489 tst z80f,#1<<NFlag\r
4490 orrne r1,r1,#1024\r
4491 ldr r2,DAATABLE_LOCAL\r
4492 add r2,r2,r1, lsl #1\r
4493 ldrh r1,[r2]\r
4494 and z80f,r1,#0xFF\r
4495 and r2,r1,#0xFF<<8\r
4496 mov z80a,r2, lsl #16\r
4497 fetch 4\r
4498;@JR Z,$+2\r
4499opcode_2_8:\r
4500 tst z80f,#1<<ZFlag\r
4501 bne opcode_1_8\r
4502 add z80pc,z80pc,#1\r
4503 fetch 7\r
4504;@ADD HL,HL\r
4505opcode_2_9:\r
4506 opADD16_2 z80hl\r
4507 fetch 11\r
4508;@LD HL,(NN)\r
4509opcode_ED_6B:\r
4510 eatcycles 4\r
4511;@LD HL,(NN)\r
4512opcode_2_A:\r
4513 ldrb r0,[z80pc],#1\r
4514 ldrb r1,[z80pc],#1\r
4515 orr r0,r0,r1, lsl #8\r
4516 readmem16\r
4517 mov z80hl,r0, lsl #16\r
4518 fetch 16\r
4519;@DEC HL\r
4520opcode_2_B:\r
4521 sub z80hl,z80hl,#1<<16\r
4522 fetch 6\r
4523;@INC L\r
4524opcode_2_C:\r
4525 opINC8L z80hl\r
4526 fetch 4\r
4527;@DEC L\r
4528opcode_2_D:\r
4529 opDEC8L z80hl\r
4530 fetch 4\r
4531;@LD L,N\r
4532opcode_2_E:\r
4533 ldrb r0,[z80pc],#1\r
4534 and z80hl,z80hl,#0xFF<<24\r
4535 orr z80hl,z80hl,r0, lsl #16\r
4536 fetch 7\r
4537;@CPL\r
4538opcode_2_F:\r
4539 eor z80a,z80a,#0xFF<<24\r
4540 orr z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4541 fetch 4\r
4542;@JR NC,$+2\r
4543opcode_3_0:\r
4544 tst z80f,#1<<CFlag\r
4545 beq opcode_1_8\r
4546 add z80pc,z80pc,#1\r
4547 fetch 7\r
4548;@LD SP,NN\r
4549opcode_3_1:\r
4550 ldrb r0,[z80pc],#1\r
4551 ldrb r1,[z80pc],#1\r
4552\r
4553.if FAST_Z80SP\r
4554 orr r0,r0,r1, lsl #8\r
4555 rebasesp\r
4556 mov z80sp,r0\r
4557.else\r
4558 orr z80sp,r0,r1, lsl #8\r
4559.endif\r
4560 fetch 10\r
4561;@LD (NN),A\r
4562opcode_3_2:\r
4563 ldrb r0,[z80pc],#1\r
4564 ldrb r1,[z80pc],#1\r
4565 orr r1,r0,r1, lsl #8\r
4566 mov r0,z80a, lsr #24\r
4567 writemem8\r
4568 fetch 13\r
4569;@INC SP\r
4570opcode_3_3:\r
4571 add z80sp,z80sp,#1\r
4572 fetch 6\r
4573;@INC (HL)\r
4574opcode_3_4:\r
4575 readmem8HL\r
4576 opINC8b\r
4577 writemem8HL\r
4578 fetch 11\r
4579;@DEC (HL)\r
4580opcode_3_5:\r
4581 readmem8HL\r
4582 opDEC8b\r
4583 writemem8HL\r
4584 fetch 11\r
4585;@LD (HL),N\r
4586opcode_3_6:\r
4587 ldrb r0,[z80pc],#1\r
4588 writemem8HL\r
4589 fetch 10\r
4590;@SCF\r
4591opcode_3_7:\r
4592 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4593 orr z80f,z80f,#1<<CFlag\r
4594 fetch 4\r
4595;@JR C,$+2\r
4596opcode_3_8:\r
4597 tst z80f,#1<<CFlag\r
4598 bne opcode_1_8\r
4599 add z80pc,z80pc,#1\r
4600 fetch 8\r
4601;@ADD HL,SP\r
4602opcode_3_9:\r
4603.if FAST_Z80SP\r
4604 ldr r0,[cpucontext,#z80sp_base]\r
4605 sub r0,z80sp,r0\r
4606 opADD16s z80hl r0 16\r
4607.else\r
4608 opADD16s z80hl z80sp 16\r
4609.endif\r
4610 fetch 11\r
4611;@LD A,(NN)\r
4612opcode_3_A:\r
4613 ldrb r0,[z80pc],#1\r
4614 ldrb r1,[z80pc],#1\r
4615 orr r0,r0,r1, lsl #8\r
4616 readmem8\r
4617 mov z80a,r0, lsl #24\r
4618 fetch 11\r
4619;@DEC SP\r
4620opcode_3_B:\r
4621 sub z80sp,z80sp,#1\r
4622 fetch 6\r
4623;@INC A\r
4624opcode_3_C:\r
4625 opINC8 z80a\r
4626 fetch 4\r
4627;@DEC A\r
4628opcode_3_D:\r
4629 opDEC8 z80a\r
4630 fetch 4\r
4631;@LD A,N\r
4632opcode_3_E:\r
4633 ldrb r0,[z80pc],#1\r
4634 mov z80a,r0, lsl #24\r
4635 fetch 7\r
4636;@CCF\r
4637opcode_3_F:\r
4638 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4639 tst z80f,#1<<CFlag\r
4640 orrne z80f,z80f,#1<<HFlag\r
4641 eor z80f,z80f,#1<<CFlag\r
4642 fetch 4\r
4643\r
4644;@LD B,C\r
4645opcode_4_1:\r
4646 and z80bc,z80bc,#0xFF<<16\r
4647 orr z80bc,z80bc,z80bc, lsl #8\r
4648 fetch 4\r
4649;@LD B,D\r
4650opcode_4_2:\r
4651 and z80bc,z80bc,#0xFF<<16\r
4652 and r1,z80de,#0xFF<<24\r
4653 orr z80bc,z80bc,r1\r
4654 fetch 4\r
4655;@LD B,E\r
4656opcode_4_3:\r
4657 and z80bc,z80bc,#0xFF<<16\r
4658 and r1,z80de,#0xFF<<16\r
4659 orr z80bc,z80bc,r1, lsl #8\r
4660 fetch 4\r
4661;@LD B,H\r
4662opcode_4_4:\r
4663 and z80bc,z80bc,#0xFF<<16\r
4664 and r1,z80hl,#0xFF<<24\r
4665 orr z80bc,z80bc,r1\r
4666 fetch 4\r
4667;@LD B,L\r
4668opcode_4_5:\r
4669 and z80bc,z80bc,#0xFF<<16\r
4670 and r1,z80hl,#0xFF<<16\r
4671 orr z80bc,z80bc,r1, lsl #8\r
4672 fetch 4\r
4673;@LD B,(HL)\r
4674opcode_4_6:\r
4675 readmem8HL\r
4676 and z80bc,z80bc,#0xFF<<16\r
4677 orr z80bc,z80bc,r0, lsl #24\r
4678 fetch 7\r
4679;@LD B,A\r
4680opcode_4_7:\r
4681 and z80bc,z80bc,#0xFF<<16\r
4682 orr z80bc,z80bc,z80a\r
4683 fetch 4\r
4684;@LD C,B\r
4685opcode_4_8:\r
4686 and z80bc,z80bc,#0xFF<<24\r
4687 orr z80bc,z80bc,z80bc, lsr #8\r
4688 fetch 4\r
4689;@LD C,D\r
4690opcode_4_A:\r
4691 and z80bc,z80bc,#0xFF<<24\r
4692 and r1,z80de,#0xFF<<24\r
4693 orr z80bc,z80bc,r1, lsr #8\r
4694 fetch 4\r
4695;@LD C,E\r
4696opcode_4_B:\r
4697 and z80bc,z80bc,#0xFF<<24\r
4698 and r1,z80de,#0xFF<<16\r
4699 orr z80bc,z80bc,r1 \r
4700 fetch 4\r
4701;@LD C,H\r
4702opcode_4_C:\r
4703 and z80bc,z80bc,#0xFF<<24\r
4704 and r1,z80hl,#0xFF<<24\r
4705 orr z80bc,z80bc,r1, lsr #8\r
4706 fetch 4\r
4707;@LD C,L\r
4708opcode_4_D:\r
4709 and z80bc,z80bc,#0xFF<<24\r
4710 and r1,z80hl,#0xFF<<16\r
4711 orr z80bc,z80bc,r1 \r
4712 fetch 4\r
4713;@LD C,(HL)\r
4714opcode_4_E:\r
4715 readmem8HL\r
4716 and z80bc,z80bc,#0xFF<<24\r
4717 orr z80bc,z80bc,r0, lsl #16\r
4718 fetch 7\r
4719;@LD C,A\r
4720opcode_4_F:\r
4721 and z80bc,z80bc,#0xFF<<24\r
4722 orr z80bc,z80bc,z80a, lsr #8\r
4723 fetch 4\r
4724;@LD D,B\r
4725opcode_5_0:\r
4726 and z80de,z80de,#0xFF<<16\r
4727 and r1,z80bc,#0xFF<<24\r
4728 orr z80de,z80de,r1\r
4729 fetch 4\r
4730;@LD D,C\r
4731opcode_5_1:\r
4732 and z80de,z80de,#0xFF<<16\r
4733 orr z80de,z80de,z80bc, lsl #8\r
4734 fetch 4\r
4735;@LD D,E\r
4736opcode_5_3:\r
4737 and z80de,z80de,#0xFF<<16\r
4738 orr z80de,z80de,z80de, lsl #8\r
4739 fetch 4\r
4740;@LD D,H\r
4741opcode_5_4:\r
4742 and z80de,z80de,#0xFF<<16\r
4743 and r1,z80hl,#0xFF<<24\r
4744 orr z80de,z80de,r1\r
4745 fetch 4\r
4746;@LD D,L\r
4747opcode_5_5:\r
4748 and z80de,z80de,#0xFF<<16\r
4749 orr z80de,z80de,z80hl, lsl #8\r
4750 fetch 4\r
4751;@LD D,(HL)\r
4752opcode_5_6:\r
4753 readmem8HL\r
4754 and z80de,z80de,#0xFF<<16\r
4755 orr z80de,z80de,r0, lsl #24\r
4756 fetch 7\r
4757;@LD D,A\r
4758opcode_5_7:\r
4759 and z80de,z80de,#0xFF<<16\r
4760 orr z80de,z80de,z80a\r
4761 fetch 4\r
4762;@LD E,B\r
4763opcode_5_8:\r
4764 and z80de,z80de,#0xFF<<24\r
4765 and r1,z80bc,#0xFF<<24\r
4766 orr z80de,z80de,r1, lsr #8\r
4767 fetch 4\r
4768;@LD E,C\r
4769opcode_5_9:\r
4770 and z80de,z80de,#0xFF<<24\r
4771 and r1,z80bc,#0xFF<<16\r
4772 orr z80de,z80de,r1 \r
4773 fetch 4\r
4774;@LD E,D\r
4775opcode_5_A:\r
4776 and z80de,z80de,#0xFF<<24\r
4777 orr z80de,z80de,z80de, lsr #8\r
4778 fetch 4\r
4779;@LD E,H\r
4780opcode_5_C:\r
4781 and z80de,z80de,#0xFF<<24\r
4782 and r1,z80hl,#0xFF<<24\r
4783 orr z80de,z80de,r1, lsr #8\r
4784 fetch 4\r
4785;@LD E,L\r
4786opcode_5_D:\r
4787 and z80de,z80de,#0xFF<<24\r
4788 and r1,z80hl,#0xFF<<16\r
4789 orr z80de,z80de,r1 \r
4790 fetch 4\r
4791;@LD E,(HL)\r
4792opcode_5_E:\r
4793 readmem8HL\r
4794 and z80de,z80de,#0xFF<<24\r
4795 orr z80de,z80de,r0, lsl #16\r
4796 fetch 7\r
4797;@LD E,A\r
4798opcode_5_F:\r
4799 and z80de,z80de,#0xFF<<24\r
4800 orr z80de,z80de,z80a, lsr #8\r
4801 fetch 4\r
4802\r
4803;@LD H,B\r
4804opcode_6_0:\r
4805 and z80hl,z80hl,#0xFF<<16\r
4806 and r1,z80bc,#0xFF<<24\r
4807 orr z80hl,z80hl,r1\r
4808 fetch 4\r
4809;@LD H,C\r
4810opcode_6_1:\r
4811 and z80hl,z80hl,#0xFF<<16\r
4812 orr z80hl,z80hl,z80bc, lsl #8\r
4813 fetch 4\r
4814;@LD H,D\r
4815opcode_6_2:\r
4816 and z80hl,z80hl,#0xFF<<16\r
4817 and r1,z80de,#0xFF<<24\r
4818 orr z80hl,z80hl,r1\r
4819 fetch 4\r
4820;@LD H,E\r
4821opcode_6_3:\r
4822 and z80hl,z80hl,#0xFF<<16\r
4823 orr z80hl,z80hl,z80de, lsl #8\r
4824 fetch 4\r
4825;@LD H,L\r
4826opcode_6_5:\r
4827 and z80hl,z80hl,#0xFF<<16\r
4828 orr z80hl,z80hl,z80hl, lsl #8\r
4829 fetch 4\r
4830;@LD H,(HL)\r
4831opcode_6_6:\r
4832 readmem8HL\r
4833 and z80hl,z80hl,#0xFF<<16\r
4834 orr z80hl,z80hl,r0, lsl #24\r
4835 fetch 7\r
4836;@LD H,A\r
4837opcode_6_7:\r
4838 and z80hl,z80hl,#0xFF<<16\r
4839 orr z80hl,z80hl,z80a\r
4840 fetch 4\r
4841\r
4842;@LD L,B\r
4843opcode_6_8:\r
4844 and z80hl,z80hl,#0xFF<<24\r
4845 and r1,z80bc,#0xFF<<24\r
4846 orr z80hl,z80hl,r1, lsr #8\r
4847 fetch 4\r
4848;@LD L,C\r
4849opcode_6_9:\r
4850 and z80hl,z80hl,#0xFF<<24\r
4851 and r1,z80bc,#0xFF<<16\r
4852 orr z80hl,z80hl,r1\r
4853 fetch 4\r
4854;@LD L,D\r
4855opcode_6_A:\r
4856 and z80hl,z80hl,#0xFF<<24\r
4857 and r1,z80de,#0xFF<<24\r
4858 orr z80hl,z80hl,r1, lsr #8\r
4859 fetch 4\r
4860;@LD L,E\r
4861opcode_6_B:\r
4862 and z80hl,z80hl,#0xFF<<24\r
4863 and r1,z80de,#0xFF<<16\r
4864 orr z80hl,z80hl,r1\r
4865 fetch 4\r
4866;@LD L,H\r
4867opcode_6_C:\r
4868 and z80hl,z80hl,#0xFF<<24\r
4869 orr z80hl,z80hl,z80hl, lsr #8\r
4870 fetch 4\r
4871;@LD L,(HL)\r
4872opcode_6_E:\r
4873 readmem8HL\r
4874 and z80hl,z80hl,#0xFF<<24\r
4875 orr z80hl,z80hl,r0, lsl #16\r
4876 fetch 7\r
4877;@LD L,A\r
4878opcode_6_F:\r
4879 and z80hl,z80hl,#0xFF<<24\r
4880 orr z80hl,z80hl,z80a, lsr #8\r
4881 fetch 4\r
4882\r
4883;@LD (HL),B\r
4884opcode_7_0:\r
4885 mov r0,z80bc, lsr #24\r
4886 writemem8HL\r
4887 fetch 7\r
4888;@LD (HL),C\r
4889opcode_7_1:\r
4890 mov r0,z80bc, lsr #16\r
4891 and r0,r0,#0xFF\r
4892 writemem8HL\r
4893 fetch 7\r
4894;@LD (HL),D\r
4895opcode_7_2:\r
4896 mov r0,z80de, lsr #24\r
4897 writemem8HL\r
4898 fetch 7\r
4899;@LD (HL),E\r
4900opcode_7_3:\r
4901 mov r0,z80de, lsr #16\r
4902 and r0,r0,#0xFF\r
4903 writemem8HL\r
4904 fetch 7\r
4905;@LD (HL),H\r
4906opcode_7_4:\r
4907 mov r0,z80hl, lsr #24\r
4908 writemem8HL\r
4909 fetch 7\r
4910;@LD (HL),L\r
4911opcode_7_5:\r
4912 mov r1,z80hl, lsr #16\r
4913 and r0,r1,#0xFF\r
4914 writemem8\r
4915 fetch 7\r
4916;@HALT\r
4917opcode_7_6:\r
4918 sub z80pc,z80pc,#1\r
4919 ldrb r0,[cpucontext,#z80if]\r
4920 orr r0,r0,#Z80_HALT\r
4921 strb r0,[cpucontext,#z80if]\r
4922 b z80_execute_end\r
4923;@LD (HL),A\r
4924opcode_7_7:\r
4925 mov r0,z80a, lsr #24\r
4926 writemem8HL\r
4927 fetch 7\r
4928\r
4929;@LD A,B\r
4930opcode_7_8:\r
4931 and z80a,z80bc,#0xFF<<24\r
4932 fetch 4\r
4933;@LD A,C\r
4934opcode_7_9:\r
4935 mov z80a,z80bc, lsl #8\r
4936 fetch 4\r
4937;@LD A,D\r
4938opcode_7_A:\r
4939 and z80a,z80de,#0xFF<<24\r
4940 fetch 4\r
4941;@LD A,E\r
4942opcode_7_B:\r
4943 mov z80a,z80de, lsl #8\r
4944 fetch 4\r
4945;@LD A,H\r
4946opcode_7_C:\r
4947 and z80a,z80hl,#0xFF<<24\r
4948 fetch 4\r
4949;@LD A,L\r
4950opcode_7_D:\r
4951 mov z80a,z80hl, lsl #8\r
4952 fetch 4\r
4953;@LD A,(HL)\r
4954opcode_7_E:\r
4955 readmem8HL\r
4956 mov z80a,r0, lsl #24\r
4957 fetch 7\r
4958\r
4959;@ADD A,B\r
4960opcode_8_0:\r
4961 opADDH z80bc\r
4962;@ADD A,C\r
4963opcode_8_1:\r
4964 opADDL z80bc\r
4965;@ADD A,D\r
4966opcode_8_2:\r
4967 opADDH z80de\r
4968;@ADD A,E\r
4969opcode_8_3:\r
4970 opADDL z80de\r
4971;@ADD A,H\r
4972opcode_8_4:\r
4973 opADDH z80hl\r
4974;@ADD A,L\r
4975opcode_8_5:\r
4976 opADDL z80hl\r
4977;@ADD A,(HL)\r
4978opcode_8_6:\r
4979 readmem8HL\r
4980 opADDb\r
4981 fetch 7\r
4982;@ADD A,A\r
4983opcode_8_7:\r
4984 opADDA\r
4985\r
4986;@ADC A,B\r
4987opcode_8_8:\r
4988 opADCH z80bc\r
4989;@ADC A,C\r
4990opcode_8_9:\r
4991 opADCL z80bc\r
4992;@ADC A,D\r
4993opcode_8_A:\r
4994 opADCH z80de\r
4995;@ADC A,E\r
4996opcode_8_B:\r
4997 opADCL z80de\r
4998;@ADC A,H\r
4999opcode_8_C:\r
5000 opADCH z80hl\r
5001;@ADC A,L\r
5002opcode_8_D:\r
5003 opADCL z80hl\r
5004;@ADC A,(HL)\r
5005opcode_8_E:\r
5006 readmem8HL\r
5007 opADCb\r
5008 fetch 7\r
5009;@ADC A,A\r
5010opcode_8_F:\r
5011 opADCA\r
5012\r
5013;@SUB B\r
5014opcode_9_0:\r
5015 opSUBH z80bc\r
5016;@SUB C\r
5017opcode_9_1:\r
5018 opSUBL z80bc\r
5019;@SUB D\r
5020opcode_9_2:\r
5021 opSUBH z80de\r
5022;@SUB E\r
5023opcode_9_3:\r
5024 opSUBL z80de\r
5025;@SUB H\r
5026opcode_9_4:\r
5027 opSUBH z80hl\r
5028;@SUB L\r
5029opcode_9_5:\r
5030 opSUBL z80hl\r
5031;@SUB (HL)\r
5032opcode_9_6:\r
5033 readmem8HL\r
5034 opSUBb\r
5035 fetch 7\r
5036;@SUB A\r
5037opcode_9_7:\r
5038 opSUBA\r
5039\r
5040;@SBC B \r
5041opcode_9_8:\r
5042 opSBCH z80bc\r
5043;@SBC C\r
5044opcode_9_9:\r
5045 opSBCL z80bc\r
5046;@SBC D\r
5047opcode_9_A:\r
5048 opSBCH z80de\r
5049;@SBC E\r
5050opcode_9_B:\r
5051 opSBCL z80de\r
5052;@SBC H\r
5053opcode_9_C:\r
5054 opSBCH z80hl\r
5055;@SBC L\r
5056opcode_9_D:\r
5057 opSBCL z80hl\r
5058;@SBC (HL)\r
5059opcode_9_E:\r
5060 readmem8HL\r
5061 opSBCb\r
5062 fetch 7\r
5063;@SBC A\r
5064opcode_9_F:\r
5065 opSBCA\r
5066\r
5067;@AND B\r
5068opcode_A_0:\r
5069 opANDH z80bc\r
5070;@AND C\r
5071opcode_A_1:\r
5072 opANDL z80bc\r
5073;@AND D\r
5074opcode_A_2:\r
5075 opANDH z80de\r
5076;@AND E\r
5077opcode_A_3:\r
5078 opANDL z80de\r
5079;@AND H\r
5080opcode_A_4:\r
5081 opANDH z80hl\r
5082;@AND L\r
5083opcode_A_5:\r
5084 opANDL z80hl\r
5085;@AND (HL)\r
5086opcode_A_6:\r
5087 readmem8HL\r
5088 opANDb\r
5089 fetch 7\r
5090;@AND A\r
5091opcode_A_7:\r
5092 opANDA\r
5093\r
5094;@XOR B\r
5095opcode_A_8:\r
5096 opXORH z80bc\r
5097;@XOR C\r
5098opcode_A_9:\r
5099 opXORL z80bc\r
5100;@XOR D\r
5101opcode_A_A:\r
5102 opXORH z80de\r
5103;@XOR E\r
5104opcode_A_B:\r
5105 opXORL z80de\r
5106;@XOR H\r
5107opcode_A_C:\r
5108 opXORH z80hl\r
5109;@XOR L\r
5110opcode_A_D:\r
5111 opXORL z80hl\r
5112;@XOR (HL)\r
5113opcode_A_E:\r
5114 readmem8HL\r
5115 opXORb\r
5116 fetch 7\r
5117;@XOR A\r
5118opcode_A_F:\r
5119 opXORA\r
5120\r
5121;@OR B\r
5122opcode_B_0:\r
5123 opORH z80bc\r
5124;@OR C\r
5125opcode_B_1:\r
5126 opORL z80bc\r
5127;@OR D\r
5128opcode_B_2:\r
5129 opORH z80de\r
5130;@OR E\r
5131opcode_B_3:\r
5132 opORL z80de\r
5133;@OR H\r
5134opcode_B_4:\r
5135 opORH z80hl\r
5136;@OR L\r
5137opcode_B_5:\r
5138 opORL z80hl\r
5139;@OR (HL)\r
5140opcode_B_6:\r
5141 readmem8HL\r
5142 opORb\r
5143 fetch 7\r
5144;@OR A\r
5145opcode_B_7:\r
5146 opORA\r
5147\r
5148;@CP B\r
5149opcode_B_8:\r
5150 opCPH z80bc\r
5151;@CP C\r
5152opcode_B_9:\r
5153 opCPL z80bc\r
5154;@CP D\r
5155opcode_B_A:\r
5156 opCPH z80de\r
5157;@CP E\r
5158opcode_B_B:\r
5159 opCPL z80de\r
5160;@CP H\r
5161opcode_B_C:\r
5162 opCPH z80hl\r
5163;@CP L\r
5164opcode_B_D:\r
5165 opCPL z80hl\r
5166;@CP (HL)\r
5167opcode_B_E:\r
5168 readmem8HL\r
5169 opCPb\r
5170 fetch 7\r
5171;@CP A\r
5172opcode_B_F:\r
5173 opCPA\r
5174\r
5175;@RET NZ\r
5176opcode_C_0:\r
5177 tst z80f,#1<<ZFlag\r
5178 beq opcode_C_9 ;@unconditional RET\r
5179 fetch 5\r
5180\r
5181;@POP BC\r
5182opcode_C_1:\r
5183 opPOPreg z80bc\r
5184\r
5185;@JP NZ,$+3\r
5186opcode_C_2:\r
5187 tst z80f,#1<<ZFlag\r
5188 beq opcode_C_3 ;@unconditional JP\r
5189 add z80pc,z80pc,#2\r
5190 fetch 10\r
5191;@JP $+3\r
5192opcode_C_3:\r
5193 ldrb r0,[z80pc],#1\r
5194 ldrb r1,[z80pc],#1\r
5195 orr r0,r0,r1, lsl #8\r
5196 rebasepc\r
5197 fetch 10\r
5198;@CALL NZ,NN\r
5199opcode_C_4:\r
5200 tst z80f,#1<<ZFlag\r
5201 beq opcode_C_D ;@unconditional CALL\r
5202 add z80pc,z80pc,#2\r
5203 fetch 10\r
5204\r
5205;@PUSH BC\r
5206opcode_C_5:\r
5207 opPUSHreg z80bc\r
5208 fetch 11\r
5209;@ADD A,N\r
5210opcode_C_6:\r
5211 ldrb r0,[z80pc],#1\r
5212 opADDb\r
5213 fetch 7\r
5214;@RST 0\r
5215opcode_C_7:\r
5216 opRST 0x00\r
5217\r
5218;@RET Z\r
5219opcode_C_8:\r
5220 tst z80f,#1<<ZFlag\r
5221 bne opcode_C_9 ;@unconditional RET\r
5222 fetch 5\r
5223;@RET\r
5224opcode_C_9:\r
5225 opPOP\r
5226 rebasepc\r
5227 fetch 10\r
5228;@JP Z,$+3\r
5229opcode_C_A:\r
5230 tst z80f,#1<<ZFlag\r
5231 bne opcode_C_3 ;@unconditional JP\r
5232 add z80pc,z80pc,#2\r
5233 fetch 10\r
5234\r
5235;@This reads this opcodes_CB lookup table to find the location of\r
5236;@the CB sub for the intruction and then branches to that location\r
5237opcode_C_B:\r
5238 ldrb r0,[z80pc],#1\r
5239 ldr pc,[pc,r0, lsl #2]\r
5240opcodes_CB: .word 0x00000000\r
5241 .word opcode_CB_00,opcode_CB_01,opcode_CB_02,opcode_CB_03,opcode_CB_04,opcode_CB_05,opcode_CB_06,opcode_CB_07\r
5242 .word opcode_CB_08,opcode_CB_09,opcode_CB_0A,opcode_CB_0B,opcode_CB_0C,opcode_CB_0D,opcode_CB_0E,opcode_CB_0F\r
5243 .word opcode_CB_10,opcode_CB_11,opcode_CB_12,opcode_CB_13,opcode_CB_14,opcode_CB_15,opcode_CB_16,opcode_CB_17\r
5244 .word opcode_CB_18,opcode_CB_19,opcode_CB_1A,opcode_CB_1B,opcode_CB_1C,opcode_CB_1D,opcode_CB_1E,opcode_CB_1F\r
5245 .word opcode_CB_20,opcode_CB_21,opcode_CB_22,opcode_CB_23,opcode_CB_24,opcode_CB_25,opcode_CB_26,opcode_CB_27\r
5246 .word opcode_CB_28,opcode_CB_29,opcode_CB_2A,opcode_CB_2B,opcode_CB_2C,opcode_CB_2D,opcode_CB_2E,opcode_CB_2F\r
5247 .word opcode_CB_30,opcode_CB_31,opcode_CB_32,opcode_CB_33,opcode_CB_34,opcode_CB_35,opcode_CB_36,opcode_CB_37\r
5248 .word opcode_CB_38,opcode_CB_39,opcode_CB_3A,opcode_CB_3B,opcode_CB_3C,opcode_CB_3D,opcode_CB_3E,opcode_CB_3F\r
5249 .word opcode_CB_40,opcode_CB_41,opcode_CB_42,opcode_CB_43,opcode_CB_44,opcode_CB_45,opcode_CB_46,opcode_CB_47\r
5250 .word opcode_CB_48,opcode_CB_49,opcode_CB_4A,opcode_CB_4B,opcode_CB_4C,opcode_CB_4D,opcode_CB_4E,opcode_CB_4F\r
5251 .word opcode_CB_50,opcode_CB_51,opcode_CB_52,opcode_CB_53,opcode_CB_54,opcode_CB_55,opcode_CB_56,opcode_CB_57\r
5252 .word opcode_CB_58,opcode_CB_59,opcode_CB_5A,opcode_CB_5B,opcode_CB_5C,opcode_CB_5D,opcode_CB_5E,opcode_CB_5F\r
5253 .word opcode_CB_60,opcode_CB_61,opcode_CB_62,opcode_CB_63,opcode_CB_64,opcode_CB_65,opcode_CB_66,opcode_CB_67\r
5254 .word opcode_CB_68,opcode_CB_69,opcode_CB_6A,opcode_CB_6B,opcode_CB_6C,opcode_CB_6D,opcode_CB_6E,opcode_CB_6F\r
5255 .word opcode_CB_70,opcode_CB_71,opcode_CB_72,opcode_CB_73,opcode_CB_74,opcode_CB_75,opcode_CB_76,opcode_CB_77\r
5256 .word opcode_CB_78,opcode_CB_79,opcode_CB_7A,opcode_CB_7B,opcode_CB_7C,opcode_CB_7D,opcode_CB_7E,opcode_CB_7F\r
5257 .word opcode_CB_80,opcode_CB_81,opcode_CB_82,opcode_CB_83,opcode_CB_84,opcode_CB_85,opcode_CB_86,opcode_CB_87\r
5258 .word opcode_CB_88,opcode_CB_89,opcode_CB_8A,opcode_CB_8B,opcode_CB_8C,opcode_CB_8D,opcode_CB_8E,opcode_CB_8F\r
5259 .word opcode_CB_90,opcode_CB_91,opcode_CB_92,opcode_CB_93,opcode_CB_94,opcode_CB_95,opcode_CB_96,opcode_CB_97\r
5260 .word opcode_CB_98,opcode_CB_99,opcode_CB_9A,opcode_CB_9B,opcode_CB_9C,opcode_CB_9D,opcode_CB_9E,opcode_CB_9F\r
5261 .word opcode_CB_A0,opcode_CB_A1,opcode_CB_A2,opcode_CB_A3,opcode_CB_A4,opcode_CB_A5,opcode_CB_A6,opcode_CB_A7\r
5262 .word opcode_CB_A8,opcode_CB_A9,opcode_CB_AA,opcode_CB_AB,opcode_CB_AC,opcode_CB_AD,opcode_CB_AE,opcode_CB_AF\r
5263 .word opcode_CB_B0,opcode_CB_B1,opcode_CB_B2,opcode_CB_B3,opcode_CB_B4,opcode_CB_B5,opcode_CB_B6,opcode_CB_B7\r
5264 .word opcode_CB_B8,opcode_CB_B9,opcode_CB_BA,opcode_CB_BB,opcode_CB_BC,opcode_CB_BD,opcode_CB_BE,opcode_CB_BF\r
5265 .word opcode_CB_C0,opcode_CB_C1,opcode_CB_C2,opcode_CB_C3,opcode_CB_C4,opcode_CB_C5,opcode_CB_C6,opcode_CB_C7\r
5266 .word opcode_CB_C8,opcode_CB_C9,opcode_CB_CA,opcode_CB_CB,opcode_CB_CC,opcode_CB_CD,opcode_CB_CE,opcode_CB_CF\r
5267 .word opcode_CB_D0,opcode_CB_D1,opcode_CB_D2,opcode_CB_D3,opcode_CB_D4,opcode_CB_D5,opcode_CB_D6,opcode_CB_D7\r
5268 .word opcode_CB_D8,opcode_CB_D9,opcode_CB_DA,opcode_CB_DB,opcode_CB_DC,opcode_CB_DD,opcode_CB_DE,opcode_CB_DF\r
5269 .word opcode_CB_E0,opcode_CB_E1,opcode_CB_E2,opcode_CB_E3,opcode_CB_E4,opcode_CB_E5,opcode_CB_E6,opcode_CB_E7\r
5270 .word opcode_CB_E8,opcode_CB_E9,opcode_CB_EA,opcode_CB_EB,opcode_CB_EC,opcode_CB_ED,opcode_CB_EE,opcode_CB_EF\r
5271 .word opcode_CB_F0,opcode_CB_F1,opcode_CB_F2,opcode_CB_F3,opcode_CB_F4,opcode_CB_F5,opcode_CB_F6,opcode_CB_F7\r
5272 .word opcode_CB_F8,opcode_CB_F9,opcode_CB_FA,opcode_CB_FB,opcode_CB_FC,opcode_CB_FD,opcode_CB_FE,opcode_CB_FF\r
5273\r
5274;@CALL Z,NN\r
5275opcode_C_C:\r
5276 tst z80f,#1<<ZFlag\r
5277 bne opcode_C_D ;@unconditional CALL\r
5278 add z80pc,z80pc,#2\r
5279 fetch 10\r
5280;@CALL NN\r
5281opcode_C_D:\r
5282 ldrb r0,[z80pc],#1\r
5283 ldrb r1,[z80pc],#1\r
5284 ldr r2,[cpucontext,#z80pc_base]\r
5285 sub r2,z80pc,r2\r
5286 orr z80pc,r0,r1, lsl #8\r
5287 opPUSHareg r2\r
5288 mov r0,z80pc\r
5289 rebasepc\r
5290 fetch 17\r
5291;@ADC A,N\r
5292opcode_C_E:\r
5293 ldrb r0,[z80pc],#1\r
5294 opADCb\r
5295 fetch 7\r
5296;@RST 8H\r
5297opcode_C_F:\r
5298 opRST 0x08\r
5299\r
5300;@RET NC\r
5301opcode_D_0:\r
5302 tst z80f,#1<<CFlag\r
5303 beq opcode_C_9 ;@unconditional RET\r
5304 fetch 5\r
5305;@POP DE\r
5306opcode_D_1:\r
5307 opPOPreg z80de\r
5308\r
5309;@JP NC, $+3\r
5310opcode_D_2 :\r
5311 tst z80f,#1<<CFlag\r
5312 beq opcode_C_3 ;@unconditional JP\r
5313 add z80pc,z80pc,#2\r
5314 fetch 10\r
5315;@OUT (N),A\r
5316opcode_D_3:\r
5317 ldrb r0,[z80pc],#1\r
5318 orr r0,r0,z80a,lsr#16\r
5319 mov r1,z80a, lsr #24\r
5320 opOUT\r
5321 fetch 11\r
5322;@CALL NC,NN\r
5323opcode_D_4:\r
5324 tst z80f,#1<<CFlag\r
5325 beq opcode_C_D ;@unconditional CALL\r
5326 add z80pc,z80pc,#2\r
5327 fetch 10\r
5328;@PUSH DE\r
5329opcode_D_5:\r
5330 opPUSHreg z80de\r
5331 fetch 11\r
5332;@SUB N\r
5333opcode_D_6:\r
5334 ldrb r0,[z80pc],#1\r
5335 opSUBb\r
5336 fetch 7\r
5337\r
5338;@RST 10H\r
5339opcode_D_7:\r
5340 opRST 0x10\r
5341\r
5342;@RET C\r
5343opcode_D_8:\r
5344 tst z80f,#1<<CFlag\r
5345 bne opcode_C_9 ;@unconditional RET\r
5346 fetch 5\r
5347;@EXX\r
5348opcode_D_9:\r
5349 add r1,cpucontext,#z80bc2\r
5350 swp z80bc,z80bc,[r1]\r
5351 add r1,cpucontext,#z80de2\r
5352 swp z80de,z80de,[r1]\r
5353 add r1,cpucontext,#z80hl2\r
5354 swp z80hl,z80hl,[r1]\r
5355 fetch 4\r
5356;@JP C,$+3\r
5357opcode_D_A:\r
5358 tst z80f,#1<<CFlag\r
5359 bne opcode_C_3 ;@unconditional JP\r
5360 add z80pc,z80pc,#2\r
5361 fetch 10\r
5362;@IN A,(N)\r
5363opcode_D_B:\r
5364 ldrb r0,[z80pc],#1\r
5365 orr r0,r0,z80a,lsr#16\r
5366 opIN\r
5367 mov z80a,r0, lsl #24 ;@ r0 = data read\r
5368 fetch 11\r
5369;@CALL C,NN\r
5370opcode_D_C:\r
5371 tst z80f,#1<<CFlag\r
5372 bne opcode_C_D ;@unconditional CALL\r
5373 add z80pc,z80pc,#2\r
5374 fetch 10\r
5375\r
5376;@opcodes_DD\r
5377opcode_D_D:\r
5378 add z80xx,cpucontext,#z80ix\r
5379 b opcode_D_D_F_D\r
5380opcode_F_D:\r
5381 add z80xx,cpucontext,#z80iy\r
5382opcode_D_D_F_D:\r
5383 ldrb r0,[z80pc],#1\r
5384 ldr pc,[pc,r0, lsl #2]\r
5385opcodes_DD: .word 0x00000000\r
5386 .word opcode_0_0, opcode_0_1, opcode_0_2, opcode_0_3, opcode_0_4, opcode_0_5, opcode_0_6, opcode_0_7\r
5387 .word opcode_0_8, opcode_DD_09,opcode_0_A, opcode_0_B, opcode_0_C, opcode_0_D, opcode_0_E, opcode_0_F\r
5388 .word opcode_1_0, opcode_1_1, opcode_1_2, opcode_1_3, opcode_1_4, opcode_1_5, opcode_1_6, opcode_1_7\r
5389 .word opcode_1_8, opcode_DD_19,opcode_1_A, opcode_1_B, opcode_1_C, opcode_1_D, opcode_1_E, opcode_1_F\r
5390 .word opcode_2_0, opcode_DD_21,opcode_DD_22,opcode_DD_23,opcode_DD_24,opcode_DD_25,opcode_DD_26,opcode_2_7\r
5391 .word opcode_2_8, opcode_DD_29,opcode_DD_2A,opcode_DD_2B,opcode_DD_2C,opcode_DD_2D,opcode_DD_2E,opcode_2_F\r
5392 .word opcode_3_0, opcode_3_1, opcode_3_2, opcode_3_3, opcode_DD_34,opcode_DD_35,opcode_DD_36,opcode_3_7\r
5393 .word opcode_3_8, opcode_DD_39,opcode_3_A, opcode_3_B, opcode_3_C, opcode_3_D, opcode_3_E, opcode_3_F\r
5394 .word opcode_4_0, opcode_4_1, opcode_4_2, opcode_4_3, opcode_DD_44,opcode_DD_45,opcode_DD_46,opcode_4_7\r
5395 .word opcode_4_8, opcode_4_9, opcode_4_A, opcode_4_B, opcode_DD_4C,opcode_DD_4D,opcode_DD_4E,opcode_4_F\r
5396 .word opcode_5_0, opcode_5_1, opcode_5_2, opcode_5_3, opcode_DD_54,opcode_DD_55,opcode_DD_56,opcode_5_7\r
5397 .word opcode_5_8, opcode_5_9, opcode_5_A, opcode_5_B, opcode_DD_5C,opcode_DD_5D,opcode_DD_5E,opcode_5_F\r
5398 .word opcode_DD_60,opcode_DD_61,opcode_DD_62,opcode_DD_63,opcode_DD_64,opcode_DD_65,opcode_DD_66,opcode_DD_67\r
5399 .word opcode_DD_68,opcode_DD_69,opcode_DD_6A,opcode_DD_6B,opcode_DD_6C,opcode_DD_6D,opcode_DD_6E,opcode_DD_6F\r
5400 .word opcode_DD_70,opcode_DD_71,opcode_DD_72,opcode_DD_73,opcode_DD_74,opcode_DD_75,opcode_7_6, opcode_DD_77\r
5401 .word opcode_7_8, opcode_7_9, opcode_7_A, opcode_7_B, opcode_DD_7C,opcode_DD_7D,opcode_DD_7E,opcode_7_F\r
5402 .word opcode_8_0, opcode_8_1, opcode_8_2, opcode_8_3, opcode_DD_84,opcode_DD_85,opcode_DD_86,opcode_8_7\r
5403 .word opcode_8_8, opcode_8_9, opcode_8_A, opcode_8_B, opcode_DD_8C,opcode_DD_8D,opcode_DD_8E,opcode_8_F\r
5404 .word opcode_9_0, opcode_9_1, opcode_9_2, opcode_9_3, opcode_DD_94,opcode_DD_95,opcode_DD_96,opcode_9_7\r
5405 .word opcode_9_8, opcode_9_9, opcode_9_A, opcode_9_B, opcode_DD_9C,opcode_DD_9D,opcode_DD_9E,opcode_9_F\r
5406 .word opcode_A_0, opcode_A_1, opcode_A_2, opcode_A_3, opcode_DD_A4,opcode_DD_A5,opcode_DD_A6,opcode_A_7\r
5407 .word opcode_A_8, opcode_A_9, opcode_A_A, opcode_A_B, opcode_DD_AC,opcode_DD_AD,opcode_DD_AE,opcode_A_F\r
5408 .word opcode_B_0, opcode_B_1, opcode_B_2, opcode_B_3, opcode_DD_B4,opcode_DD_B5,opcode_DD_B6,opcode_B_7\r
5409 .word opcode_B_8, opcode_B_9, opcode_B_A, opcode_B_B, opcode_DD_BC,opcode_DD_BD,opcode_DD_BE,opcode_B_F\r
5410 .word opcode_C_0, opcode_C_1, opcode_C_2, opcode_C_3, opcode_C_4, opcode_C_5, opcode_C_6, opcode_C_7\r
5411 .word opcode_C_8, opcode_C_9, opcode_C_A, opcode_DD_CB,opcode_C_C, opcode_C_D, opcode_C_E, opcode_C_F\r
5412 .word opcode_D_0, opcode_D_1, opcode_D_2, opcode_D_3, opcode_D_4, opcode_D_5, opcode_D_6, opcode_D_7\r
5413 .word opcode_D_8, opcode_D_9, opcode_D_A, opcode_D_B, opcode_D_C, opcode_D_D, opcode_D_E, opcode_D_F\r
5414 .word opcode_E_0, opcode_DD_E1,opcode_E_2, opcode_DD_E3,opcode_E_4, opcode_DD_E5,opcode_E_6, opcode_E_7\r
5415 .word opcode_E_8, opcode_DD_E9,opcode_E_A, opcode_E_B, opcode_E_C, opcode_E_D, opcode_E_E, opcode_E_F\r
5416 .word opcode_F_0, opcode_F_1, opcode_F_2, opcode_F_3, opcode_F_4, opcode_F_5, opcode_F_6, opcode_F_7\r
5417 .word opcode_F_8, opcode_DD_F9,opcode_F_A, opcode_F_B, opcode_F_C, opcode_F_D, opcode_F_E, opcode_F_F\r
5418\r
5419;@SBC A,N\r
5420opcode_D_E:\r
5421 ldrb r0,[z80pc],#1\r
5422 opSBCb\r
5423 fetch 7\r
5424;@RST 18H\r
5425opcode_D_F:\r
5426 opRST 0x18\r
5427\r
5428;@RET PO\r
5429opcode_E_0:\r
5430 tst z80f,#1<<VFlag\r
5431 beq opcode_C_9 ;@unconditional RET\r
5432 fetch 5\r
5433;@POP HL\r
5434opcode_E_1:\r
5435 opPOPreg z80hl\r
5436\r
5437;@JP PO,$+3\r
5438opcode_E_2:\r
5439 tst z80f,#1<<VFlag\r
5440 beq opcode_C_3 ;@unconditional JP\r
5441 add z80pc,z80pc,#2\r
5442 fetch 10\r
5443;@EX (SP),HL\r
5444opcode_E_3:\r
5445.if FAST_Z80SP\r
5446 ldrb r0,[z80sp]\r
5447 ldrb r1,[z80sp,#1]\r
5448 orr r0,r0,r1, lsl #8\r
5449 mov r1,z80hl, lsr #24\r
5450 strb r1,[z80sp,#1]\r
5451 mov r1,z80hl, lsr #16\r
5452 strb r1,[z80sp]\r
5453 mov z80hl,r0, lsl #16\r
5454.else\r
5455 mov r0,z80sp\r
5456 readmem16\r
5457 mov r1,r0\r
5458 mov r0,z80hl,lsr#16\r
5459 mov z80hl,r1,lsl#16\r
5460 mov r1,z80sp\r
5461 writemem16\r
5462.endif\r
5463 fetch 19\r
5464;@CALL PO,NN\r
5465opcode_E_4:\r
5466 tst z80f,#1<<VFlag\r
5467 beq opcode_C_D ;@unconditional CALL\r
5468 add z80pc,z80pc,#2\r
5469 fetch 10\r
5470;@PUSH HL\r
5471opcode_E_5:\r
5472 opPUSHreg z80hl\r
5473 fetch 11\r
5474;@AND N\r
5475opcode_E_6:\r
5476 ldrb r0,[z80pc],#1\r
5477 opANDb\r
5478 fetch 7\r
5479;@RST 20H\r
5480opcode_E_7:\r
5481 opRST 0x20\r
5482\r
5483;@RET PE\r
5484opcode_E_8:\r
5485 tst z80f,#1<<VFlag\r
5486 bne opcode_C_9 ;@unconditional RET\r
5487 fetch 5\r
5488;@JP (HL)\r
5489opcode_E_9:\r
5490 mov r0,z80hl, lsr #16\r
5491 rebasepc\r
5492 fetch 4\r
5493;@JP PE,$+3\r
5494opcode_E_A:\r
5495 tst z80f,#1<<VFlag\r
5496 bne opcode_C_3 ;@unconditional JP\r
5497 add z80pc,z80pc,#2\r
5498 fetch 10\r
5499;@EX DE,HL\r
5500opcode_E_B:\r
5501 mov r1,z80de\r
5502 mov z80de,z80hl\r
5503 mov z80hl,r1\r
5504 fetch 4\r
5505;@CALL PE,NN\r
5506opcode_E_C:\r
5507 tst z80f,#1<<VFlag\r
5508 bne opcode_C_D ;@unconditional CALL\r
5509 add z80pc,z80pc,#2\r
5510 fetch 10\r
5511\r
5512;@This should be caught at start\r
5513opcode_E_D:\r
5514 ldrb r1,[z80pc],#1\r
5515 ldr pc,[pc,r1, lsl #2]\r
5516opcodes_ED: .word 0x00000000\r
5517 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5518 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5519 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5520 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5521 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5522 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5523 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5524 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5525 .word opcode_ED_40,opcode_ED_41,opcode_ED_42,opcode_ED_43,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_47\r
5526 .word opcode_ED_48,opcode_ED_49,opcode_ED_4A,opcode_ED_4B,opcode_ED_44,opcode_ED_4D,opcode_ED_46,opcode_ED_4F\r
5527 .word opcode_ED_50,opcode_ED_51,opcode_ED_52,opcode_ED_53,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_57\r
5528 .word opcode_ED_58,opcode_ED_59,opcode_ED_5A,opcode_ED_5B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_5F\r
5529 .word opcode_ED_60,opcode_ED_61,opcode_ED_62,opcode_ED_63,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_67\r
5530 .word opcode_ED_68,opcode_ED_69,opcode_ED_6A,opcode_ED_6B,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_6F\r
5531 .word opcode_ED_70,opcode_ED_71,opcode_ED_72,opcode_ED_73,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_NF\r
5532 .word opcode_ED_78,opcode_ED_79,opcode_ED_7A,opcode_ED_7B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_NF\r
5533 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5534 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5535 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5536 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5537 .word opcode_ED_A0,opcode_ED_A1,opcode_ED_A2,opcode_ED_A3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5538 .word opcode_ED_A8,opcode_ED_A9,opcode_ED_AA,opcode_ED_AB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5539 .word opcode_ED_B0,opcode_ED_B1,opcode_ED_B2,opcode_ED_B3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5540 .word opcode_ED_B8,opcode_ED_B9,opcode_ED_BA,opcode_ED_BB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5541 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5542 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5543 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5544 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5545 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5546 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5547 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5548 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5549\r
5550;@XOR N\r
5551opcode_E_E:\r
5552 ldrb r0,[z80pc],#1\r
5553 opXORb\r
5554 fetch 7\r
5555;@RST 28H\r
5556opcode_E_F:\r
5557 opRST 0x28\r
5558\r
5559;@RET P\r
5560opcode_F_0:\r
5561 tst z80f,#1<<SFlag\r
5562 beq opcode_C_9 ;@unconditional RET\r
5563 fetch 5\r
5564;@POP AF\r
5565opcode_F_1:\r
5566.if FAST_Z80SP\r
5567 ldrb z80f,[z80sp],#1\r
5568 sub r0,opcodes,#0x200\r
5569 ldrb z80f,[r0,z80f]\r
5570 ldrb z80a,[z80sp],#1\r
5571 mov z80a,z80a, lsl #24\r
5572.else\r
5573 mov r0,z80sp\r
5574 readmem16\r
5575 add z80sp,z80sp,#2\r
5576 and z80a,r0,#0xFF00\r
5577 mov z80a,z80a,lsl#16\r
5578 and z80f,r0,#0xFF\r
5579 sub r0,opcodes,#0x200\r
5580 ldrb z80f,[r0,z80f]\r
5581.endif\r
5582 fetch 10\r
5583;@JP P,$+3\r
5584opcode_F_2:\r
5585 tst z80f,#1<<SFlag\r
5586 beq opcode_C_3 ;@unconditional JP\r
5587 add z80pc,z80pc,#2\r
5588 fetch 10\r
5589;@DI\r
5590opcode_F_3:\r
5591 ldrb r1,[cpucontext,#z80if]\r
5592 bic r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5593 strb r1,[cpucontext,#z80if]\r
5594 fetch 4\r
5595;@CALL P,NN\r
5596opcode_F_4:\r
5597 tst z80f,#1<<SFlag\r
5598 beq opcode_C_D ;@unconditional CALL\r
5599 add z80pc,z80pc,#2\r
5600 fetch 10\r
5601;@PUSH AF\r
5602opcode_F_5:\r
5603 sub r0,opcodes,#0x300\r
5604 ldrb r0,[r0,z80f]\r
5605 orr r2,r0,z80a,lsr#16\r
5606 opPUSHareg r2\r
5607 fetch 11\r
5608;@OR N\r
5609opcode_F_6:\r
5610 ldrb r0,[z80pc],#1\r
5611 opORb\r
5612 fetch 7\r
5613;@RST 30H\r
5614opcode_F_7:\r
5615 opRST 0x30\r
5616\r
5617;@RET M\r
5618opcode_F_8:\r
5619 tst z80f,#1<<SFlag\r
5620 bne opcode_C_9 ;@unconditional RET\r
5621 fetch 5\r
5622;@LD SP,HL\r
5623opcode_F_9:\r
5624.if FAST_Z80SP\r
5625 mov r0,z80hl, lsr #16\r
5626 rebasesp\r
5627 mov z80sp,r0\r
5628.else\r
5629 mov z80sp,z80hl, lsr #16\r
5630.endif\r
5631 fetch 4\r
5632;@JP M,$+3\r
5633opcode_F_A:\r
5634 tst z80f,#1<<SFlag\r
5635 bne opcode_C_3 ;@unconditional JP\r
5636 add z80pc,z80pc,#2\r
5637 fetch 10\r
5638MAIN_opcodes_POINTER: .word MAIN_opcodes\r
5639EI_DUMMY_opcodes_POINTER: .word EI_DUMMY_opcodes\r
5640;@EI\r
5641opcode_F_B:\r
5642 ldrb r1,[cpucontext,#z80if]\r
5643 tst r1,#Z80_IF1\r
5644 bne ei_return_exit\r
5645\r
5646 orr r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5647 strb r1,[cpucontext,#z80if]\r
5648\r
5649 mov r2,opcodes\r
5650 ldr opcodes,EI_DUMMY_opcodes_POINTER\r
5651 ldr pc,[r2,r0, lsl #2]\r
5652\r
5653ei_return:\r
5654 ;@point that program returns from EI to check interupts\r
5655 ;@an interupt can not be taken directly after a EI opcode\r
5656 ;@ reset z80pc and opcode pointer\r
5657 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
5658 sub z80pc,z80pc,#1\r
5659 ldr opcodes,MAIN_opcodes_POINTER\r
5660 ;@ check ints\r
5661 tst r0,#1\r
5662 movnes r0,r0,lsr #8\r
5663 blne DoInterrupt\r
5664 ;@ continue\r
5665ei_return_exit:\r
5666 fetch 4\r
5667\r
5668;@CALL M,NN\r
5669opcode_F_C:\r
5670 tst z80f,#1<<SFlag\r
5671 bne opcode_C_D ;@unconditional CALL\r
5672 add z80pc,z80pc,#2\r
5673 fetch 10\r
5674\r
5675;@SHOULD BE CAUGHT AT START - FD SECTION\r
5676\r
5677;@CP N\r
5678opcode_F_E:\r
5679 ldrb r0,[z80pc],#1\r
5680 opCPb\r
5681 fetch 7\r
5682;@RST 38H\r
5683opcode_F_F:\r
5684 opRST 0x38\r
5685\r
5686\r
5687;@##################################\r
5688;@##################################\r
5689;@### opcodes CB #########################\r
5690;@##################################\r
5691;@##################################\r
5692\r
5693\r
5694;@RLC B\r
5695opcode_CB_00:\r
5696 opRLCH z80bc\r
5697;@RLC C\r
5698opcode_CB_01:\r
5699 opRLCL z80bc\r
5700;@RLC D\r
5701opcode_CB_02:\r
5702 opRLCH z80de\r
5703;@RLC E\r
5704opcode_CB_03:\r
5705 opRLCL z80de\r
5706;@RLC H\r
5707opcode_CB_04:\r
5708 opRLCH z80hl\r
5709;@RLC L\r
5710opcode_CB_05:\r
5711 opRLCL z80hl\r
5712;@RLC (HL)\r
5713opcode_CB_06:\r
5714 readmem8HL\r
5715 opRLCb\r
5716 writemem8HL\r
5717 fetch 15\r
5718;@RLC A\r
5719opcode_CB_07:\r
5720 opRLCA\r
5721\r
5722;@RRC B\r
5723opcode_CB_08:\r
5724 opRRCH z80bc\r
5725;@RRC C\r
5726opcode_CB_09:\r
5727 opRRCL z80bc\r
5728;@RRC D\r
5729opcode_CB_0A:\r
5730 opRRCH z80de\r
5731;@RRC E\r
5732opcode_CB_0B:\r
5733 opRRCL z80de\r
5734;@RRC H\r
5735opcode_CB_0C:\r
5736 opRRCH z80hl\r
5737;@RRC L\r
5738opcode_CB_0D:\r
5739 opRRCL z80hl\r
5740;@RRC (HL)\r
5741opcode_CB_0E :\r
5742 readmem8HL\r
5743 opRRCb\r
5744 writemem8HL\r
5745 fetch 15\r
5746;@RRC A\r
5747opcode_CB_0F:\r
5748 opRRCA\r
5749\r
5750;@RL B\r
5751opcode_CB_10:\r
5752 opRLH z80bc\r
5753;@RL C\r
5754opcode_CB_11:\r
5755 opRLL z80bc\r
5756;@RL D\r
5757opcode_CB_12:\r
5758 opRLH z80de\r
5759;@RL E\r
5760opcode_CB_13:\r
5761 opRLL z80de\r
5762;@RL H\r
5763opcode_CB_14:\r
5764 opRLH z80hl\r
5765;@RL L\r
5766opcode_CB_15:\r
5767 opRLL z80hl\r
5768;@RL (HL)\r
5769opcode_CB_16:\r
5770 readmem8HL\r
5771 opRLb\r
5772 writemem8HL\r
5773 fetch 15\r
5774;@RL A\r
5775opcode_CB_17:\r
5776 opRLA\r
5777\r
5778;@RR B \r
5779opcode_CB_18:\r
5780 opRRH z80bc\r
5781;@RR C\r
5782opcode_CB_19:\r
5783 opRRL z80bc\r
5784;@RR D\r
5785opcode_CB_1A:\r
5786 opRRH z80de\r
5787;@RR E\r
5788opcode_CB_1B:\r
5789 opRRL z80de\r
5790;@RR H\r
5791opcode_CB_1C:\r
5792 opRRH z80hl\r
5793;@RR L\r
5794opcode_CB_1D:\r
5795 opRRL z80hl\r
5796;@RR (HL)\r
5797opcode_CB_1E:\r
5798 readmem8HL\r
5799 opRRb\r
5800 writemem8HL\r
5801 fetch 15\r
5802;@RR A\r
5803opcode_CB_1F:\r
5804 opRRA\r
5805\r
5806;@SLA B\r
5807opcode_CB_20:\r
5808 opSLAH z80bc\r
5809;@SLA C\r
5810opcode_CB_21:\r
5811 opSLAL z80bc\r
5812;@SLA D\r
5813opcode_CB_22:\r
5814 opSLAH z80de\r
5815;@SLA E\r
5816opcode_CB_23:\r
5817 opSLAL z80de\r
5818;@SLA H\r
5819opcode_CB_24:\r
5820 opSLAH z80hl\r
5821;@SLA L\r
5822opcode_CB_25:\r
5823 opSLAL z80hl\r
5824;@SLA (HL)\r
5825opcode_CB_26:\r
5826 readmem8HL\r
5827 opSLAb\r
5828 writemem8HL\r
5829 fetch 15\r
5830;@SLA A\r
5831opcode_CB_27:\r
5832 opSLAA\r
5833\r
5834;@SRA B\r
5835opcode_CB_28:\r
5836 opSRAH z80bc\r
5837;@SRA C\r
5838opcode_CB_29:\r
5839 opSRAL z80bc\r
5840;@SRA D\r
5841opcode_CB_2A:\r
5842 opSRAH z80de\r
5843;@SRA E\r
5844opcode_CB_2B:\r
5845 opSRAL z80de\r
5846;@SRA H\r
5847opcode_CB_2C:\r
5848 opSRAH z80hl\r
5849;@SRA L\r
5850opcode_CB_2D:\r
5851 opSRAL z80hl\r
5852;@SRA (HL)\r
5853opcode_CB_2E:\r
5854 readmem8HL\r
5855 opSRAb\r
5856 writemem8HL\r
5857 fetch 15\r
5858;@SRA A\r
5859opcode_CB_2F:\r
5860 opSRAA\r
5861\r
5862;@SLL B\r
5863opcode_CB_30:\r
5864 opSLLH z80bc\r
5865;@SLL C\r
5866opcode_CB_31:\r
5867 opSLLL z80bc\r
5868;@SLL D\r
5869opcode_CB_32:\r
5870 opSLLH z80de\r
5871;@SLL E\r
5872opcode_CB_33:\r
5873 opSLLL z80de\r
5874;@SLL H\r
5875opcode_CB_34:\r
5876 opSLLH z80hl\r
5877;@SLL L\r
5878opcode_CB_35:\r
5879 opSLLL z80hl\r
5880;@SLL (HL)\r
5881opcode_CB_36:\r
5882 readmem8HL\r
5883 opSLLb\r
5884 writemem8HL\r
5885 fetch 15\r
5886;@SLL A\r
5887opcode_CB_37:\r
5888 opSLLA\r
5889\r
5890;@SRL B\r
5891opcode_CB_38:\r
5892 opSRLH z80bc\r
5893;@SRL C\r
5894opcode_CB_39:\r
5895 opSRLL z80bc\r
5896;@SRL D\r
5897opcode_CB_3A:\r
5898 opSRLH z80de\r
5899;@SRL E\r
5900opcode_CB_3B:\r
5901 opSRLL z80de\r
5902;@SRL H\r
5903opcode_CB_3C:\r
5904 opSRLH z80hl\r
5905;@SRL L\r
5906opcode_CB_3D:\r
5907 opSRLL z80hl\r
5908;@SRL (HL)\r
5909opcode_CB_3E:\r
5910 readmem8HL\r
5911 opSRLb\r
5912 writemem8HL\r
5913 fetch 15\r
5914;@SRL A\r
5915opcode_CB_3F:\r
5916 opSRLA\r
5917\r
5918\r
5919;@BIT 0,B\r
5920opcode_CB_40:\r
5921 opBITH z80bc 0\r
5922;@BIT 0,C\r
5923opcode_CB_41:\r
5924 opBITL z80bc 0\r
5925;@BIT 0,D\r
5926opcode_CB_42:\r
5927 opBITH z80de 0\r
5928;@BIT 0,E\r
5929opcode_CB_43:\r
5930 opBITL z80de 0\r
5931;@BIT 0,H\r
5932opcode_CB_44:\r
5933 opBITH z80hl 0\r
5934;@BIT 0,L\r
5935opcode_CB_45:\r
5936 opBITL z80hl 0\r
5937;@BIT 0,(HL)\r
5938opcode_CB_46:\r
5939 readmem8HL\r
5940 opBITb 0\r
5941 fetch 12\r
5942;@BIT 0,A\r
5943opcode_CB_47:\r
5944 opBITH z80a 0\r
5945\r
5946;@BIT 1,B\r
5947opcode_CB_48:\r
5948 opBITH z80bc 1\r
5949;@BIT 1,C\r
5950opcode_CB_49:\r
5951 opBITL z80bc 1\r
5952;@BIT 1,D\r
5953opcode_CB_4A:\r
5954 opBITH z80de 1\r
5955;@BIT 1,E\r
5956opcode_CB_4B:\r
5957 opBITL z80de 1\r
5958;@BIT 1,H\r
5959opcode_CB_4C:\r
5960 opBITH z80hl 1\r
5961;@BIT 1,L\r
5962opcode_CB_4D:\r
5963 opBITL z80hl 1\r
5964;@BIT 1,(HL)\r
5965opcode_CB_4E:\r
5966 readmem8HL\r
5967 opBITb 1\r
5968 fetch 12\r
5969;@BIT 1,A\r
5970opcode_CB_4F:\r
5971 opBITH z80a 1\r
5972\r
5973;@BIT 2,B\r
5974opcode_CB_50:\r
5975 opBITH z80bc 2\r
5976;@BIT 2,C\r
5977opcode_CB_51:\r
5978 opBITL z80bc 2\r
5979;@BIT 2,D\r
5980opcode_CB_52:\r
5981 opBITH z80de 2\r
5982;@BIT 2,E\r
5983opcode_CB_53:\r
5984 opBITL z80de 2\r
5985;@BIT 2,H\r
5986opcode_CB_54:\r
5987 opBITH z80hl 2\r
5988;@BIT 2,L\r
5989opcode_CB_55:\r
5990 opBITL z80hl 2\r
5991;@BIT 2,(HL)\r
5992opcode_CB_56:\r
5993 readmem8HL\r
5994 opBITb 2\r
5995 fetch 12\r
5996;@BIT 2,A\r
5997opcode_CB_57:\r
5998 opBITH z80a 2\r
5999\r
6000;@BIT 3,B\r
6001opcode_CB_58:\r
6002 opBITH z80bc 3\r
6003;@BIT 3,C\r
6004opcode_CB_59:\r
6005 opBITL z80bc 3\r
6006;@BIT 3,D\r
6007opcode_CB_5A:\r
6008 opBITH z80de 3\r
6009;@BIT 3,E\r
6010opcode_CB_5B:\r
6011 opBITL z80de 3\r
6012;@BIT 3,H\r
6013opcode_CB_5C:\r
6014 opBITH z80hl 3\r
6015;@BIT 3,L\r
6016opcode_CB_5D:\r
6017 opBITL z80hl 3\r
6018;@BIT 3,(HL)\r
6019opcode_CB_5E:\r
6020 readmem8HL\r
6021 opBITb 3\r
6022 fetch 12\r
6023;@BIT 3,A\r
6024opcode_CB_5F:\r
6025 opBITH z80a 3\r
6026\r
6027;@BIT 4,B\r
6028opcode_CB_60:\r
6029 opBITH z80bc 4\r
6030;@BIT 4,C\r
6031opcode_CB_61:\r
6032 opBITL z80bc 4\r
6033;@BIT 4,D\r
6034opcode_CB_62:\r
6035 opBITH z80de 4\r
6036;@BIT 4,E\r
6037opcode_CB_63:\r
6038 opBITL z80de 4\r
6039;@BIT 4,H\r
6040opcode_CB_64:\r
6041 opBITH z80hl 4\r
6042;@BIT 4,L\r
6043opcode_CB_65:\r
6044 opBITL z80hl 4\r
6045;@BIT 4,(HL)\r
6046opcode_CB_66:\r
6047 readmem8HL\r
6048 opBITb 4\r
6049 fetch 12\r
6050;@BIT 4,A\r
6051opcode_CB_67:\r
6052 opBITH z80a 4\r
6053\r
6054;@BIT 5,B\r
6055opcode_CB_68:\r
6056 opBITH z80bc 5\r
6057;@BIT 5,C\r
6058opcode_CB_69:\r
6059 opBITL z80bc 5\r
6060;@BIT 5,D\r
6061opcode_CB_6A:\r
6062 opBITH z80de 5\r
6063;@BIT 5,E\r
6064opcode_CB_6B:\r
6065 opBITL z80de 5\r
6066;@BIT 5,H\r
6067opcode_CB_6C:\r
6068 opBITH z80hl 5\r
6069;@BIT 5,L\r
6070opcode_CB_6D:\r
6071 opBITL z80hl 5\r
6072;@BIT 5,(HL)\r
6073opcode_CB_6E:\r
6074 readmem8HL\r
6075 opBITb 5\r
6076 fetch 12\r
6077;@BIT 5,A\r
6078opcode_CB_6F:\r
6079 opBITH z80a 5\r
6080\r
6081;@BIT 6,B\r
6082opcode_CB_70:\r
6083 opBITH z80bc 6\r
6084;@BIT 6,C\r
6085opcode_CB_71:\r
6086 opBITL z80bc 6\r
6087;@BIT 6,D\r
6088opcode_CB_72:\r
6089 opBITH z80de 6\r
6090;@BIT 6,E\r
6091opcode_CB_73:\r
6092 opBITL z80de 6\r
6093;@BIT 6,H\r
6094opcode_CB_74:\r
6095 opBITH z80hl 6\r
6096;@BIT 6,L\r
6097opcode_CB_75:\r
6098 opBITL z80hl 6\r
6099;@BIT 6,(HL)\r
6100opcode_CB_76:\r
6101 readmem8HL\r
6102 opBITb 6\r
6103 fetch 12\r
6104;@BIT 6,A\r
6105opcode_CB_77:\r
6106 opBITH z80a 6\r
6107\r
6108;@BIT 7,B\r
6109opcode_CB_78:\r
6110 opBIT7H z80bc\r
6111;@BIT 7,C\r
6112opcode_CB_79:\r
6113 opBIT7L z80bc\r
6114;@BIT 7,D\r
6115opcode_CB_7A:\r
6116 opBIT7H z80de\r
6117;@BIT 7,E\r
6118opcode_CB_7B:\r
6119 opBIT7L z80de\r
6120;@BIT 7,H\r
6121opcode_CB_7C:\r
6122 opBIT7H z80hl\r
6123;@BIT 7,L\r
6124opcode_CB_7D:\r
6125 opBIT7L z80hl\r
6126;@BIT 7,(HL)\r
6127opcode_CB_7E:\r
6128 readmem8HL\r
6129 opBIT7b\r
6130 fetch 12\r
6131;@BIT 7,A\r
6132opcode_CB_7F:\r
6133 opBIT7H z80a\r
6134\r
6135;@RES 0,B\r
6136opcode_CB_80:\r
6137 bic z80bc,z80bc,#1<<24\r
6138 fetch 8\r
6139;@RES 0,C\r
6140opcode_CB_81:\r
6141 bic z80bc,z80bc,#1<<16\r
6142 fetch 8\r
6143;@RES 0,D\r
6144opcode_CB_82:\r
6145 bic z80de,z80de,#1<<24\r
6146 fetch 8\r
6147;@RES 0,E\r
6148opcode_CB_83:\r
6149 bic z80de,z80de,#1<<16\r
6150 fetch 8\r
6151;@RES 0,H\r
6152opcode_CB_84:\r
6153 bic z80hl,z80hl,#1<<24\r
6154 fetch 8\r
6155;@RES 0,L\r
6156opcode_CB_85:\r
6157 bic z80hl,z80hl,#1<<16\r
6158 fetch 8\r
6159;@RES 0,(HL)\r
6160opcode_CB_86:\r
6161 opRESmemHL 0\r
6162;@RES 0,A\r
6163opcode_CB_87:\r
6164 bic z80a,z80a,#1<<24\r
6165 fetch 8\r
6166\r
6167;@RES 1,B\r
6168opcode_CB_88:\r
6169 bic z80bc,z80bc,#1<<25\r
6170 fetch 8\r
6171;@RES 1,C\r
6172opcode_CB_89:\r
6173 bic z80bc,z80bc,#1<<17\r
6174 fetch 8\r
6175;@RES 1,D\r
6176opcode_CB_8A:\r
6177 bic z80de,z80de,#1<<25\r
6178 fetch 8\r
6179;@RES 1,E\r
6180opcode_CB_8B:\r
6181 bic z80de,z80de,#1<<17\r
6182 fetch 8\r
6183;@RES 1,H\r
6184opcode_CB_8C:\r
6185 bic z80hl,z80hl,#1<<25\r
6186 fetch 8\r
6187;@RES 1,L\r
6188opcode_CB_8D:\r
6189 bic z80hl,z80hl,#1<<17\r
6190 fetch 8\r
6191;@RES 1,(HL)\r
6192opcode_CB_8E:\r
6193 opRESmemHL 1\r
6194;@RES 1,A\r
6195opcode_CB_8F:\r
6196 bic z80a,z80a,#1<<25\r
6197 fetch 8\r
6198\r
6199;@RES 2,B\r
6200opcode_CB_90:\r
6201 bic z80bc,z80bc,#1<<26\r
6202 fetch 8\r
6203;@RES 2,C\r
6204opcode_CB_91:\r
6205 bic z80bc,z80bc,#1<<18\r
6206 fetch 8\r
6207;@RES 2,D\r
6208opcode_CB_92:\r
6209 bic z80de,z80de,#1<<26\r
6210 fetch 8\r
6211;@RES 2,E\r
6212opcode_CB_93:\r
6213 bic z80de,z80de,#1<<18\r
6214 fetch 8\r
6215;@RES 2,H\r
6216opcode_CB_94:\r
6217 bic z80hl,z80hl,#1<<26\r
6218 fetch 8\r
6219;@RES 2,L\r
6220opcode_CB_95:\r
6221 bic z80hl,z80hl,#1<<18\r
6222 fetch 8\r
6223;@RES 2,(HL)\r
6224opcode_CB_96:\r
6225 opRESmemHL 2\r
6226;@RES 2,A\r
6227opcode_CB_97:\r
6228 bic z80a,z80a,#1<<26\r
6229 fetch 8\r
6230\r
6231;@RES 3,B\r
6232opcode_CB_98:\r
6233 bic z80bc,z80bc,#1<<27\r
6234 fetch 8\r
6235;@RES 3,C\r
6236opcode_CB_99:\r
6237 bic z80bc,z80bc,#1<<19\r
6238 fetch 8\r
6239;@RES 3,D\r
6240opcode_CB_9A:\r
6241 bic z80de,z80de,#1<<27\r
6242 fetch 8\r
6243;@RES 3,E\r
6244opcode_CB_9B:\r
6245 bic z80de,z80de,#1<<19\r
6246 fetch 8\r
6247;@RES 3,H\r
6248opcode_CB_9C:\r
6249 bic z80hl,z80hl,#1<<27\r
6250 fetch 8\r
6251;@RES 3,L\r
6252opcode_CB_9D:\r
6253 bic z80hl,z80hl,#1<<19\r
6254 fetch 8\r
6255;@RES 3,(HL)\r
6256opcode_CB_9E:\r
6257 opRESmemHL 3\r
6258;@RES 3,A\r
6259opcode_CB_9F:\r
6260 bic z80a,z80a,#1<<27\r
6261 fetch 8\r
6262\r
6263;@RES 4,B\r
6264opcode_CB_A0:\r
6265 bic z80bc,z80bc,#1<<28\r
6266 fetch 8\r
6267;@RES 4,C\r
6268opcode_CB_A1:\r
6269 bic z80bc,z80bc,#1<<20\r
6270 fetch 8\r
6271;@RES 4,D\r
6272opcode_CB_A2:\r
6273 bic z80de,z80de,#1<<28\r
6274 fetch 8\r
6275;@RES 4,E\r
6276opcode_CB_A3:\r
6277 bic z80de,z80de,#1<<20\r
6278 fetch 8\r
6279;@RES 4,H\r
6280opcode_CB_A4:\r
6281 bic z80hl,z80hl,#1<<28\r
6282 fetch 8\r
6283;@RES 4,L\r
6284opcode_CB_A5:\r
6285 bic z80hl,z80hl,#1<<20\r
6286 fetch 8\r
6287;@RES 4,(HL)\r
6288opcode_CB_A6:\r
6289 opRESmemHL 4\r
6290;@RES 4,A\r
6291opcode_CB_A7:\r
6292 bic z80a,z80a,#1<<28\r
6293 fetch 8\r
6294\r
6295;@RES 5,B\r
6296opcode_CB_A8:\r
6297 bic z80bc,z80bc,#1<<29\r
6298 fetch 8\r
6299;@RES 5,C\r
6300opcode_CB_A9:\r
6301 bic z80bc,z80bc,#1<<21\r
6302 fetch 8\r
6303;@RES 5,D\r
6304opcode_CB_AA:\r
6305 bic z80de,z80de,#1<<29\r
6306 fetch 8\r
6307;@RES 5,E\r
6308opcode_CB_AB:\r
6309 bic z80de,z80de,#1<<21\r
6310 fetch 8\r
6311;@RES 5,H\r
6312opcode_CB_AC:\r
6313 bic z80hl,z80hl,#1<<29\r
6314 fetch 8\r
6315;@RES 5,L\r
6316opcode_CB_AD:\r
6317 bic z80hl,z80hl,#1<<21\r
6318 fetch 8\r
6319;@RES 5,(HL)\r
6320opcode_CB_AE:\r
6321 opRESmemHL 5\r
6322;@RES 5,A\r
6323opcode_CB_AF:\r
6324 bic z80a,z80a,#1<<29\r
6325 fetch 8\r
6326\r
6327;@RES 6,B\r
6328opcode_CB_B0:\r
6329 bic z80bc,z80bc,#1<<30\r
6330 fetch 8\r
6331;@RES 6,C\r
6332opcode_CB_B1:\r
6333 bic z80bc,z80bc,#1<<22\r
6334 fetch 8\r
6335;@RES 6,D\r
6336opcode_CB_B2:\r
6337 bic z80de,z80de,#1<<30\r
6338 fetch 8\r
6339;@RES 6,E\r
6340opcode_CB_B3:\r
6341 bic z80de,z80de,#1<<22\r
6342 fetch 8\r
6343;@RES 6,H\r
6344opcode_CB_B4:\r
6345 bic z80hl,z80hl,#1<<30\r
6346 fetch 8\r
6347;@RES 6,L\r
6348opcode_CB_B5:\r
6349 bic z80hl,z80hl,#1<<22\r
6350 fetch 8\r
6351;@RES 6,(HL)\r
6352opcode_CB_B6:\r
6353 opRESmemHL 6\r
6354;@RES 6,A\r
6355opcode_CB_B7:\r
6356 bic z80a,z80a,#1<<30\r
6357 fetch 8\r
6358\r
6359;@RES 7,B\r
6360opcode_CB_B8:\r
6361 bic z80bc,z80bc,#1<<31\r
6362 fetch 8\r
6363;@RES 7,C\r
6364opcode_CB_B9:\r
6365 bic z80bc,z80bc,#1<<23\r
6366 fetch 8\r
6367;@RES 7,D\r
6368opcode_CB_BA:\r
6369 bic z80de,z80de,#1<<31\r
6370 fetch 8\r
6371;@RES 7,E\r
6372opcode_CB_BB:\r
6373 bic z80de,z80de,#1<<23\r
6374 fetch 8\r
6375;@RES 7,H\r
6376opcode_CB_BC:\r
6377 bic z80hl,z80hl,#1<<31\r
6378 fetch 8\r
6379;@RES 7,L\r
6380opcode_CB_BD:\r
6381 bic z80hl,z80hl,#1<<23\r
6382 fetch 8\r
6383;@RES 7,(HL)\r
6384opcode_CB_BE:\r
6385 opRESmemHL 7\r
6386;@RES 7,A\r
6387opcode_CB_BF:\r
6388 bic z80a,z80a,#1<<31\r
6389 fetch 8\r
6390\r
6391;@SET 0,B\r
6392opcode_CB_C0:\r
6393 orr z80bc,z80bc,#1<<24\r
6394 fetch 8\r
6395;@SET 0,C\r
6396opcode_CB_C1:\r
6397 orr z80bc,z80bc,#1<<16\r
6398 fetch 8\r
6399;@SET 0,D\r
6400opcode_CB_C2:\r
6401 orr z80de,z80de,#1<<24\r
6402 fetch 8\r
6403;@SET 0,E\r
6404opcode_CB_C3:\r
6405 orr z80de,z80de,#1<<16\r
6406 fetch 8\r
6407;@SET 0,H\r
6408opcode_CB_C4:\r
6409 orr z80hl,z80hl,#1<<24\r
6410 fetch 8\r
6411;@SET 0,L\r
6412opcode_CB_C5:\r
6413 orr z80hl,z80hl,#1<<16\r
6414 fetch 8\r
6415;@SET 0,(HL)\r
6416opcode_CB_C6:\r
6417 opSETmemHL 0\r
6418;@SET 0,A\r
6419opcode_CB_C7:\r
6420 orr z80a,z80a,#1<<24\r
6421 fetch 8\r
6422\r
6423;@SET 1,B\r
6424opcode_CB_C8:\r
6425 orr z80bc,z80bc,#1<<25\r
6426 fetch 8\r
6427;@SET 1,C\r
6428opcode_CB_C9:\r
6429 orr z80bc,z80bc,#1<<17\r
6430 fetch 8\r
6431;@SET 1,D\r
6432opcode_CB_CA:\r
6433 orr z80de,z80de,#1<<25\r
6434 fetch 8\r
6435;@SET 1,E\r
6436opcode_CB_CB:\r
6437 orr z80de,z80de,#1<<17\r
6438 fetch 8\r
6439;@SET 1,H\r
6440opcode_CB_CC:\r
6441 orr z80hl,z80hl,#1<<25\r
6442 fetch 8\r
6443;@SET 1,L\r
6444opcode_CB_CD:\r
6445 orr z80hl,z80hl,#1<<17\r
6446 fetch 8\r
6447;@SET 1,(HL)\r
6448opcode_CB_CE:\r
6449 opSETmemHL 1\r
6450;@SET 1,A\r
6451opcode_CB_CF:\r
6452 orr z80a,z80a,#1<<25\r
6453 fetch 8\r
6454\r
6455;@SET 2,B\r
6456opcode_CB_D0:\r
6457 orr z80bc,z80bc,#1<<26\r
6458 fetch 8\r
6459;@SET 2,C\r
6460opcode_CB_D1:\r
6461 orr z80bc,z80bc,#1<<18\r
6462 fetch 8\r
6463;@SET 2,D\r
6464opcode_CB_D2:\r
6465 orr z80de,z80de,#1<<26\r
6466 fetch 8\r
6467;@SET 2,E\r
6468opcode_CB_D3:\r
6469 orr z80de,z80de,#1<<18\r
6470 fetch 8\r
6471;@SET 2,H\r
6472opcode_CB_D4:\r
6473 orr z80hl,z80hl,#1<<26\r
6474 fetch 8\r
6475;@SET 2,L\r
6476opcode_CB_D5:\r
6477 orr z80hl,z80hl,#1<<18\r
6478 fetch 8\r
6479;@SET 2,(HL)\r
6480opcode_CB_D6:\r
6481 opSETmemHL 2\r
6482;@SET 2,A\r
6483opcode_CB_D7:\r
6484 orr z80a,z80a,#1<<26\r
6485 fetch 8\r
6486\r
6487;@SET 3,B\r
6488opcode_CB_D8:\r
6489 orr z80bc,z80bc,#1<<27\r
6490 fetch 8\r
6491;@SET 3,C\r
6492opcode_CB_D9:\r
6493 orr z80bc,z80bc,#1<<19\r
6494 fetch 8\r
6495;@SET 3,D\r
6496opcode_CB_DA:\r
6497 orr z80de,z80de,#1<<27\r
6498 fetch 8\r
6499;@SET 3,E\r
6500opcode_CB_DB:\r
6501 orr z80de,z80de,#1<<19\r
6502 fetch 8\r
6503;@SET 3,H\r
6504opcode_CB_DC:\r
6505 orr z80hl,z80hl,#1<<27\r
6506 fetch 8\r
6507;@SET 3,L\r
6508opcode_CB_DD:\r
6509 orr z80hl,z80hl,#1<<19\r
6510 fetch 8\r
6511;@SET 3,(HL)\r
6512opcode_CB_DE:\r
6513 opSETmemHL 3\r
6514;@SET 3,A\r
6515opcode_CB_DF:\r
6516 orr z80a,z80a,#1<<27\r
6517 fetch 8\r
6518\r
6519;@SET 4,B\r
6520opcode_CB_E0:\r
6521 orr z80bc,z80bc,#1<<28\r
6522 fetch 8\r
6523;@SET 4,C\r
6524opcode_CB_E1:\r
6525 orr z80bc,z80bc,#1<<20\r
6526 fetch 8\r
6527;@SET 4,D\r
6528opcode_CB_E2:\r
6529 orr z80de,z80de,#1<<28\r
6530 fetch 8\r
6531;@SET 4,E\r
6532opcode_CB_E3:\r
6533 orr z80de,z80de,#1<<20\r
6534 fetch 8\r
6535;@SET 4,H\r
6536opcode_CB_E4:\r
6537 orr z80hl,z80hl,#1<<28\r
6538 fetch 8\r
6539;@SET 4,L\r
6540opcode_CB_E5:\r
6541 orr z80hl,z80hl,#1<<20\r
6542 fetch 8\r
6543;@SET 4,(HL)\r
6544opcode_CB_E6:\r
6545 opSETmemHL 4\r
6546;@SET 4,A\r
6547opcode_CB_E7:\r
6548 orr z80a,z80a,#1<<28\r
6549 fetch 8\r
6550\r
6551;@SET 5,B\r
6552opcode_CB_E8:\r
6553 orr z80bc,z80bc,#1<<29\r
6554 fetch 8\r
6555;@SET 5,C\r
6556opcode_CB_E9:\r
6557 orr z80bc,z80bc,#1<<21\r
6558 fetch 8\r
6559;@SET 5,D\r
6560opcode_CB_EA:\r
6561 orr z80de,z80de,#1<<29\r
6562 fetch 8\r
6563;@SET 5,E\r
6564opcode_CB_EB:\r
6565 orr z80de,z80de,#1<<21\r
6566 fetch 8\r
6567;@SET 5,H\r
6568opcode_CB_EC:\r
6569 orr z80hl,z80hl,#1<<29\r
6570 fetch 8\r
6571;@SET 5,L\r
6572opcode_CB_ED:\r
6573 orr z80hl,z80hl,#1<<21\r
6574 fetch 8\r
6575;@SET 5,(HL)\r
6576opcode_CB_EE:\r
6577 opSETmemHL 5\r
6578;@SET 5,A\r
6579opcode_CB_EF:\r
6580 orr z80a,z80a,#1<<29\r
6581 fetch 8\r
6582\r
6583;@SET 6,B\r
6584opcode_CB_F0:\r
6585 orr z80bc,z80bc,#1<<30\r
6586 fetch 8\r
6587;@SET 6,C\r
6588opcode_CB_F1:\r
6589 orr z80bc,z80bc,#1<<22\r
6590 fetch 8\r
6591;@SET 6,D\r
6592opcode_CB_F2:\r
6593 orr z80de,z80de,#1<<30\r
6594 fetch 8\r
6595;@SET 6,E\r
6596opcode_CB_F3:\r
6597 orr z80de,z80de,#1<<22\r
6598 fetch 8\r
6599;@SET 6,H\r
6600opcode_CB_F4:\r
6601 orr z80hl,z80hl,#1<<30\r
6602 fetch 8\r
6603;@SET 6,L\r
6604opcode_CB_F5:\r
6605 orr z80hl,z80hl,#1<<22\r
6606 fetch 8\r
6607;@SET 6,(HL)\r
6608opcode_CB_F6:\r
6609 opSETmemHL 6\r
6610;@SET 6,A\r
6611opcode_CB_F7:\r
6612 orr z80a,z80a,#1<<30\r
6613 fetch 8\r
6614\r
6615;@SET 7,B\r
6616opcode_CB_F8:\r
6617 orr z80bc,z80bc,#1<<31\r
6618 fetch 8\r
6619;@SET 7,C\r
6620opcode_CB_F9:\r
6621 orr z80bc,z80bc,#1<<23\r
6622 fetch 8\r
6623;@SET 7,D\r
6624opcode_CB_FA:\r
6625 orr z80de,z80de,#1<<31\r
6626 fetch 8\r
6627;@SET 7,E\r
6628opcode_CB_FB:\r
6629 orr z80de,z80de,#1<<23\r
6630 fetch 8\r
6631;@SET 7,H\r
6632opcode_CB_FC:\r
6633 orr z80hl,z80hl,#1<<31\r
6634 fetch 8\r
6635;@SET 7,L\r
6636opcode_CB_FD:\r
6637 orr z80hl,z80hl,#1<<23\r
6638 fetch 8\r
6639;@SET 7,(HL)\r
6640opcode_CB_FE:\r
6641 opSETmemHL 7\r
6642;@SET 7,A\r
6643opcode_CB_FF:\r
6644 orr z80a,z80a,#1<<31\r
6645 fetch 8\r
6646\r
6647\r
6648\r
6649;@##################################\r
6650;@##################################\r
6651;@### opcodes DD #########################\r
6652;@##################################\r
6653;@##################################\r
6654;@Because the DD opcodes are not a complete range from 00-FF I have\r
6655;@created this sub routine that will catch any undocumented ops\r
6656;@halt the emulator and mov the current instruction to r0\r
6657;@at a later stage I may change to display a text message on the screen\r
6658opcode_DD_NF:\r
6659 eatcycles 4\r
6660 ldr pc,[opcodes,r0, lsl #2]\r
6661;@ mov r2,#0x10*4\r
6662;@ cmp r2,z80xx\r
6663;@ bne opcode_FD_NF\r
6664;@ mov r0,#0xDD00\r
6665;@ orr r0,r0,r1\r
6666;@ b end_loop\r
6667;@opcode_FD_NF:\r
6668;@ mov r0,#0xFD00\r
6669;@ orr r0,r0,r1\r
6670;@ b end_loop\r
f0243975 6671\r
cc68a136 6672opcode_DD_NF2:\r
f0243975 6673 fetch 15\r
6674;@ notaz: we don't want to deadlock here\r
6675;@ mov r0,#0xDD0000\r
6676;@ orr r0,r0,#0xCB00\r
6677;@ orr r0,r0,r1\r
6678;@ b end_loop\r
cc68a136 6679\r
6680;@ADD IX,BC\r
6681opcode_DD_09:\r
6682 ldr r0,[z80xx]\r
6683 opADD16 r0 z80bc\r
6684 str r0,[z80xx]\r
6685 fetch 15\r
6686;@ADD IX,DE\r
6687opcode_DD_19:\r
6688 ldr r0,[z80xx]\r
6689 opADD16 r0 z80de\r
6690 str r0,[z80xx]\r
6691 fetch 15\r
6692;@LD IX,NN\r
6693opcode_DD_21:\r
6694 ldrb r0,[z80pc],#1\r
6695 ldrb r1,[z80pc],#1\r
6696 orr r0,r0,r1, lsl #8\r
6697 strh r0,[z80xx,#2]\r
6698 fetch 14\r
6699;@LD (NN),IX\r
6700opcode_DD_22:\r
6701 ldrb r0,[z80pc],#1\r
6702 ldrb r1,[z80pc],#1\r
6703 orr r1,r0,r1, lsl #8\r
6704 ldrh r0,[z80xx,#2]\r
6705 writemem16\r
6706 fetch 20\r
6707;@INC IX\r
6708opcode_DD_23:\r
6709 ldr r0,[z80xx]\r
6710 add r0,r0,#1<<16\r
6711 str r0,[z80xx]\r
6712 fetch 10\r
6713;@INC I (IX)\r
6714opcode_DD_24:\r
6715 ldr r0,[z80xx]\r
6716 opINC8H r0\r
6717 str r0,[z80xx]\r
6718 fetch 8\r
6719;@DEC I (IX)\r
6720opcode_DD_25:\r
6721 ldr r0,[z80xx]\r
6722 opDEC8H r0\r
6723 str r0,[z80xx]\r
6724 fetch 8\r
6725;@LD I,N (IX)\r
6726opcode_DD_26:\r
6727 ldrb r0,[z80pc],#1\r
6728 strb r0,[z80xx,#3]\r
6729 fetch 11\r
6730;@ADD IX,IX\r
6731opcode_DD_29:\r
6732 ldr r0,[z80xx]\r
6733 opADD16_2 r0\r
6734 str r0,[z80xx]\r
6735 fetch 15\r
6736;@LD IX,(NN)\r
6737opcode_DD_2A:\r
6738 ldrb r0,[z80pc],#1\r
6739 ldrb r1,[z80pc],#1\r
6740 orr r0,r0,r1, lsl #8\r
6741 stmfd sp!,{z80xx}\r
6742 readmem16\r
6743 ldmfd sp!,{z80xx}\r
6744 strh r0,[z80xx,#2]\r
6745 fetch 20\r
6746;@DEC IX\r
6747opcode_DD_2B:\r
6748 ldr r0,[z80xx]\r
6749 sub r0,r0,#1<<16\r
6750 str r0,[z80xx]\r
6751 fetch 10\r
6752;@INC X (IX)\r
6753opcode_DD_2C:\r
6754 ldr r0,[z80xx]\r
6755 opINC8L r0\r
6756 str r0,[z80xx]\r
6757 fetch 8\r
6758;@DEC X (IX)\r
6759opcode_DD_2D:\r
6760 ldr r0,[z80xx]\r
6761 opDEC8L r0\r
6762 str r0,[z80xx]\r
6763 fetch 8\r
6764;@LD X,N (IX)\r
6765opcode_DD_2E:\r
6766 ldrb r0,[z80pc],#1\r
6767 strb r0,[z80xx,#2]\r
6768 fetch 11\r
6769;@INC (IX+N)\r
6770opcode_DD_34:\r
6771 ldrsb r0,[z80pc],#1\r
6772 ldr r1,[z80xx]\r
6773 add r0,r0,r1, lsr #16\r
6774 stmfd sp!,{r0} ;@ save addr\r
6775 readmem8\r
6776 opINC8b\r
6777 ldmfd sp!,{r1} ;@ restore addr into r1\r
6778 writemem8\r
6779 fetch 23\r
6780;@DEC (IX+N)\r
6781opcode_DD_35:\r
6782 ldrsb r0,[z80pc],#1\r
6783 ldr r1,[z80xx]\r
6784 add r0,r0,r1, lsr #16\r
6785 stmfd sp!,{r0} ;@ save addr\r
6786 readmem8\r
6787 opDEC8b\r
6788 ldmfd sp!,{r1} ;@ restore addr into r1\r
6789 writemem8\r
6790 fetch 23\r
6791;@LD (IX+N),N\r
6792opcode_DD_36:\r
6793 ldrsb r2,[z80pc],#1\r
6794 ldrb r0,[z80pc],#1\r
6795 ldr r1,[z80xx]\r
6796 add r1,r2,r1, lsr #16\r
6797 writemem8\r
6798 fetch 19\r
6799;@ADD IX,SP\r
6800opcode_DD_39:\r
6801 ldr r0,[z80xx]\r
6802.if FAST_Z80SP\r
6803 ldr r2,[cpucontext,#z80sp_base]\r
6804 sub r2,z80sp,r2\r
6805 opADD16s r0 r2 16\r
6806.else\r
6807 opADD16s r0 z80sp 16\r
6808.endif\r
6809 str r0,[z80xx]\r
6810 fetch 15\r
6811;@LD B,I ( IX )\r
6812opcode_DD_44:\r
6813 ldrb r0,[z80xx,#3]\r
6814 and z80bc,z80bc,#0xFF<<16\r
6815 orr z80bc,z80bc,r0, lsl #24\r
6816 fetch 8\r
6817;@LD B,X ( IX )\r
6818opcode_DD_45:\r
6819 ldrb r0,[z80xx,#2]\r
6820 and z80bc,z80bc,#0xFF<<16\r
6821 orr z80bc,z80bc,r0, lsl #24\r
6822 fetch 8\r
6823;@LD B,(IX,N)\r
6824opcode_DD_46:\r
6825 ldrsb r0,[z80pc],#1\r
6826 ldr r1,[z80xx]\r
6827 add r0,r0,r1, lsr #16\r
6828 readmem8\r
6829 and z80bc,z80bc,#0xFF<<16\r
6830 orr z80bc,z80bc,r0, lsl #24\r
6831 fetch 19\r
6832;@LD C,I (IX)\r
6833opcode_DD_4C:\r
6834 ldrb r0,[z80xx,#3]\r
6835 and z80bc,z80bc,#0xFF<<24\r
6836 orr z80bc,z80bc,r0, lsl #16\r
6837 fetch 8\r
6838;@LD C,X (IX)\r
6839opcode_DD_4D:\r
6840 ldrb r0,[z80xx,#2]\r
6841 and z80bc,z80bc,#0xFF<<24\r
6842 orr z80bc,z80bc,r0, lsl #16\r
6843 fetch 8\r
6844;@LD C,(IX,N)\r
6845opcode_DD_4E:\r
6846 ldrsb r0,[z80pc],#1\r
6847 ldr r1,[z80xx]\r
6848 add r0,r0,r1, lsr #16\r
6849 readmem8\r
6850 and z80bc,z80bc,#0xFF<<24\r
6851 orr z80bc,z80bc,r0, lsl #16\r
6852 fetch 19\r
6853\r
6854;@LD D,I (IX)\r
6855opcode_DD_54:\r
6856 ldrb r0,[z80xx,#3]\r
6857 and z80de,z80de,#0xFF<<16\r
6858 orr z80de,z80de,r0, lsl #24\r
6859 fetch 8\r
6860;@LD D,X (IX)\r
6861opcode_DD_55:\r
6862 ldrb r0,[z80xx,#2]\r
6863 and z80de,z80de,#0xFF<<16\r
6864 orr z80de,z80de,r0, lsl #24\r
6865 fetch 8\r
6866;@LD D,(IX,N)\r
6867opcode_DD_56:\r
6868 ldrsb r0,[z80pc],#1\r
6869 ldr r1,[z80xx]\r
6870 add r0,r0,r1, lsr #16\r
6871 readmem8\r
6872 and z80de,z80de,#0xFF<<16\r
6873 orr z80de,z80de,r0, lsl #24\r
6874 fetch 19\r
6875;@LD E,I (IX)\r
6876opcode_DD_5C:\r
6877 ldrb r0,[z80xx,#3]\r
6878 and z80de,z80de,#0xFF<<24\r
6879 orr z80de,z80de,r0, lsl #16\r
6880 fetch 8\r
6881;@LD E,X (IX)\r
6882opcode_DD_5D:\r
6883 ldrb r0,[z80xx,#2]\r
6884 and z80de,z80de,#0xFF<<24\r
6885 orr z80de,z80de,r0, lsl #16\r
6886 fetch 8\r
6887;@LD E,(IX,N)\r
6888opcode_DD_5E:\r
6889 ldrsb r0,[z80pc],#1\r
6890 ldr r1,[z80xx]\r
6891 add r0,r0,r1, lsr #16\r
6892 readmem8\r
6893 and z80de,z80de,#0xFF<<24\r
6894 orr z80de,z80de,r0, lsl #16\r
6895 fetch 19\r
6896;@LD I,B (IX)\r
6897opcode_DD_60:\r
6898 mov r0,z80bc,lsr#24\r
6899 strb r0,[z80xx,#3]\r
6900 fetch 8\r
6901;@LD I,C (IX)\r
6902opcode_DD_61:\r
6903 mov r0,z80bc,lsr#16\r
6904 strb r0,[z80xx,#3]\r
6905 fetch 8\r
6906;@LD I,D (IX)\r
6907opcode_DD_62:\r
6908 mov r0,z80de,lsr#24\r
6909 strb r0,[z80xx,#3]\r
6910 fetch 8\r
6911;@LD I,E (IX)\r
6912opcode_DD_63:\r
6913 mov r0,z80de,lsr#16\r
6914 strb r0,[z80xx,#3]\r
6915 fetch 8\r
6916;@LD I,I (IX)\r
6917opcode_DD_64:\r
6918 fetch 8\r
6919;@LD I,X (IX)\r
6920opcode_DD_65:\r
6921 ldrb r0,[z80xx,#2]\r
6922 strb r0,[z80xx,#3]\r
6923 fetch 8\r
6924;@LD H,(IX,N)\r
6925opcode_DD_66:\r
6926 ldrsb r0,[z80pc],#1\r
6927 ldr r1,[z80xx]\r
6928 add r0,r0,r1, lsr #16\r
6929 readmem8\r
6930 and z80hl,z80hl,#0xFF<<16\r
6931 orr z80hl,z80hl,r0, lsl #24\r
6932 fetch 19\r
6933;@LD I,A (IX)\r
6934opcode_DD_67:\r
6935 mov r0,z80a,lsr#24\r
6936 strb r0,[z80xx,#3]\r
6937 fetch 8\r
6938;@LD X,B (IX)\r
6939opcode_DD_68:\r
6940 mov r0,z80bc,lsr#24\r
6941 strb r0,[z80xx,#2]\r
6942 fetch 8\r
6943;@LD X,C (IX)\r
6944opcode_DD_69:\r
6945 mov r0,z80bc,lsr#16\r
6946 strb r0,[z80xx,#2]\r
6947 fetch 8\r
6948;@LD X,D (IX)\r
6949opcode_DD_6A:\r
6950 mov r0,z80de,lsr#24\r
6951 strb r0,[z80xx,#2]\r
6952 fetch 8\r
6953;@LD X,E (IX)\r
6954opcode_DD_6B:\r
6955 mov r0,z80de,lsr#16\r
6956 strb r0,[z80xx,#2]\r
6957 fetch 8\r
6958;@LD X,I (IX)\r
6959opcode_DD_6C:\r
6960 ldrb r0,[z80xx,#3]\r
6961 strb r0,[z80xx,#2]\r
6962 fetch 8\r
6963;@LD X,X (IX)\r
6964opcode_DD_6D:\r
6965 fetch 8\r
6966;@LD L,(IX,N)\r
6967opcode_DD_6E:\r
6968 ldrsb r0,[z80pc],#1\r
6969 ldr r1,[z80xx]\r
6970 add r0,r0,r1, lsr #16\r
6971 readmem8\r
6972 and z80hl,z80hl,#0xFF<<24\r
6973 orr z80hl,z80hl,r0, lsl #16\r
6974 fetch 19\r
6975;@LD X,A (IX)\r
6976opcode_DD_6F:\r
6977 mov r0,z80a,lsr#24\r
6978 strb r0,[z80xx,#2]\r
6979 fetch 8\r
6980\r
6981;@LD (IX,N),B\r
6982opcode_DD_70:\r
6983 ldrsb r0,[z80pc],#1\r
6984 ldr r1,[z80xx]\r
6985 add r1,r0,r1, lsr #16\r
6986 mov r0,z80bc, lsr #24\r
6987 writemem8\r
6988 fetch 19\r
6989;@LD (IX,N),C\r
6990opcode_DD_71:\r
6991 ldrsb r0,[z80pc],#1\r
6992 ldr r1,[z80xx]\r
6993 add r1,r0,r1, lsr #16\r
6994 mov r0,z80bc, lsr #16\r
6995 and r0,r0,#0xFF\r
6996 writemem8\r
6997 fetch 19\r
6998;@LD (IX,N),D\r
6999opcode_DD_72:\r
7000 ldrsb r0,[z80pc],#1\r
7001 ldr r1,[z80xx]\r
7002 add r1,r0,r1, lsr #16\r
7003 mov r0,z80de, lsr #24\r
7004 writemem8\r
7005 fetch 19\r
7006;@LD (IX,N),E\r
7007opcode_DD_73:\r
7008 ldrsb r0,[z80pc],#1\r
7009 ldr r1,[z80xx]\r
7010 add r1,r0,r1, lsr #16\r
7011 mov r0,z80de, lsr #16\r
7012 and r0,r0,#0xFF\r
7013 writemem8\r
7014 fetch 19\r
7015;@LD (IX,N),H\r
7016opcode_DD_74:\r
7017 ldrsb r0,[z80pc],#1\r
7018 ldr r1,[z80xx]\r
7019 add r1,r0,r1, lsr #16\r
7020 mov r0,z80hl, lsr #24\r
7021 writemem8\r
7022 fetch 19\r
7023;@LD (IX,N),L\r
7024opcode_DD_75:\r
7025 ldrsb r0,[z80pc],#1\r
7026 ldr r1,[z80xx]\r
7027 add r1,r0,r1, lsr #16\r
7028 mov r0,z80hl, lsr #16\r
7029 and r0,r0,#0xFF\r
7030 writemem8\r
7031 fetch 19\r
7032;@LD (IX,N),A\r
7033opcode_DD_77:\r
7034 ldrsb r0,[z80pc],#1\r
7035 ldr r1,[z80xx]\r
7036 add r1,r0,r1, lsr #16\r
7037 mov r0,z80a, lsr #24\r
7038 writemem8\r
7039 fetch 19\r
7040\r
7041;@LD A,I from (IX)\r
7042opcode_DD_7C:\r
7043 ldrb r0,[z80xx,#3]\r
7044 mov z80a,r0, lsl #24\r
7045 fetch 8\r
7046;@LD A,X from (IX)\r
7047opcode_DD_7D:\r
7048 ldrb r0,[z80xx,#2]\r
7049 mov z80a,r0, lsl #24\r
7050 fetch 8\r
7051;@LD A,(IX,N)\r
7052opcode_DD_7E:\r
7053 ldrsb r0,[z80pc],#1\r
7054 ldr r1,[z80xx]\r
7055 add r0,r0,r1, lsr #16\r
7056 readmem8\r
7057 mov z80a,r0, lsl #24\r
7058 fetch 19\r
7059\r
7060;@ADD A,I ( IX)\r
7061opcode_DD_84:\r
7062 ldrb r0,[z80xx,#3]\r
7063 opADDb\r
7064 fetch 8\r
7065;@ADD A,X ( IX)\r
7066opcode_DD_85:\r
7067 ldrb r0,[z80xx,#2]\r
7068 opADDb\r
7069 fetch 8\r
7070;@ADD A,(IX+N)\r
7071opcode_DD_86:\r
7072 ldrsb r0,[z80pc],#1\r
7073 ldr r1,[z80xx]\r
7074 add r0,r0,r1, lsr #16\r
7075 readmem8\r
7076 opADDb\r
7077 fetch 19\r
7078\r
7079;@ADC A,I (IX)\r
7080opcode_DD_8C:\r
7081 ldrb r0,[z80xx,#3]\r
7082 opADCb\r
7083 fetch 8\r
7084;@ADC A,X (IX)\r
7085opcode_DD_8D:\r
7086 ldrb r0,[z80xx,#2]\r
7087 opADCb\r
7088 fetch 8\r
7089;@ADC A,(IX+N)\r
7090opcode_DD_8E:\r
7091 ldrsb r0,[z80pc],#1\r
7092 ldr r1,[z80xx]\r
7093 add r0,r0,r1, lsr #16\r
7094 readmem8\r
7095 opADCb\r
7096 fetch 19\r
7097\r
7098;@SUB A,I (IX)\r
7099opcode_DD_94:\r
7100 ldrb r0,[z80xx,#3]\r
7101 opSUBb\r
7102 fetch 8\r
7103;@SUB A,X (IX)\r
7104opcode_DD_95:\r
7105 ldrb r0,[z80xx,#2]\r
7106 opSUBb\r
7107 fetch 8\r
7108;@SUB A,(IX+N)\r
7109opcode_DD_96:\r
7110 ldrsb r0,[z80pc],#1\r
7111 ldr r1,[z80xx]\r
7112 add r0,r0,r1, lsr #16\r
7113 readmem8\r
7114 opSUBb\r
7115 fetch 19\r
7116\r
7117;@SBC A,I (IX)\r
7118opcode_DD_9C:\r
7119 ldrb r0,[z80xx,#3]\r
7120 opSBCb\r
7121 fetch 8\r
7122;@SBC A,X (IX)\r
7123opcode_DD_9D:\r
7124 ldrb r0,[z80xx,#2]\r
7125 opSBCb\r
7126 fetch 8\r
7127;@SBC A,(IX+N)\r
7128opcode_DD_9E:\r
7129 ldrsb r0,[z80pc],#1\r
7130 ldr r1,[z80xx]\r
7131 add r0,r0,r1, lsr #16\r
7132 readmem8\r
7133 opSBCb\r
7134 fetch 19\r
7135\r
7136;@AND I (IX)\r
7137opcode_DD_A4:\r
7138 ldrb r0,[z80xx,#3]\r
7139 opANDb\r
7140 fetch 8\r
7141;@AND X (IX)\r
7142opcode_DD_A5:\r
7143 ldrb r0,[z80xx,#2]\r
7144 opANDb\r
7145 fetch 8\r
7146;@AND (IX+N)\r
7147opcode_DD_A6:\r
7148 ldrsb r0,[z80pc],#1\r
7149 ldr r1,[z80xx]\r
7150 add r0,r0,r1, lsr #16\r
7151 readmem8\r
7152 opANDb\r
7153 fetch 19\r
7154\r
7155;@XOR I (IX)\r
7156opcode_DD_AC:\r
7157 ldrb r0,[z80xx,#3]\r
7158 opXORb\r
7159 fetch 8\r
7160;@XOR X (IX)\r
7161opcode_DD_AD:\r
7162 ldrb r0,[z80xx,#2]\r
7163 opXORb\r
7164 fetch 8\r
7165;@XOR (IX+N)\r
7166opcode_DD_AE:\r
7167 ldrsb r0,[z80pc],#1\r
7168 ldr r1,[z80xx]\r
7169 add r0,r0,r1, lsr #16\r
7170 readmem8\r
7171 opXORb\r
7172 fetch 19\r
7173\r
7174;@OR I (IX)\r
7175opcode_DD_B4:\r
7176 ldrb r0,[z80xx,#3]\r
7177 opORb\r
7178 fetch 8\r
7179;@OR X (IX)\r
7180opcode_DD_B5:\r
7181 ldrb r0,[z80xx,#2]\r
7182 opORb\r
7183 fetch 8\r
7184;@OR (IX+N)\r
7185opcode_DD_B6:\r
7186 ldrsb r0,[z80pc],#1\r
7187 ldr r1,[z80xx]\r
7188 add r0,r0,r1, lsr #16\r
7189 readmem8\r
7190 opORb\r
7191 fetch 19\r
7192\r
7193;@CP I (IX)\r
7194opcode_DD_BC:\r
7195 ldrb r0,[z80xx,#3]\r
7196 opCPb\r
7197 fetch 8\r
7198;@CP X (IX)\r
7199opcode_DD_BD:\r
7200 ldrb r0,[z80xx,#2]\r
7201 opCPb\r
7202 fetch 8\r
7203;@CP (IX+N)\r
7204opcode_DD_BE:\r
7205 ldrsb r0,[z80pc],#1\r
7206 ldr r1,[z80xx]\r
7207 add r0,r0,r1, lsr #16\r
7208 readmem8\r
7209 opCPb\r
7210 fetch 19\r
7211\r
7212\r
7213opcodes_DD_CB_LOCAL: .word opcodes_DD_CB\r
7214opcode_DD_CB:\r
7215;@Looks up the opcode on the opcodes_DD_CB table and then \r
7216;@moves the PC to the location of the subroutine\r
7217 ldrsb r0,[z80pc],#1\r
7218 ldr r1,[z80xx]\r
7219 add r0,r0,r1, lsr #16\r
7220\r
7221 ldrb r1,[z80pc],#1\r
7222 ldr pc,[pc,r1, lsl #2]\r
7223 .word 0x00\r
7224opcodes_DD_CB:\r
7225 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_06,opcode_DD_NF2\r
7226 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_0E,opcode_DD_NF2\r
7227 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_16,opcode_DD_NF2\r
7228 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_1E,opcode_DD_NF2\r
7229 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_26,opcode_DD_NF2\r
7230 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_2E,opcode_DD_NF2\r
7231 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_36,opcode_DD_NF2\r
7232 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_3E,opcode_DD_NF2\r
7233 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_46,opcode_DD_NF2\r
7234 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_4E,opcode_DD_NF2\r
7235 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_56,opcode_DD_NF2\r
7236 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_5E,opcode_DD_NF2\r
7237 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_66,opcode_DD_NF2\r
7238 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_6E,opcode_DD_NF2\r
7239 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_76,opcode_DD_NF2\r
7240 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_7E,opcode_DD_NF2\r
7241 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_86,opcode_DD_NF2\r
7242 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_8E,opcode_DD_NF2\r
7243 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_96,opcode_DD_NF2\r
7244 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_9E,opcode_DD_NF2\r
7245 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_A6,opcode_DD_NF2\r
7246 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_AE,opcode_DD_NF2\r
7247 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_B6,opcode_DD_NF2\r
7248 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_BE,opcode_DD_NF2\r
7249 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_C6,opcode_DD_NF2\r
7250 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_CE,opcode_DD_NF2\r
7251 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_D6,opcode_DD_NF2\r
7252 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_DE,opcode_DD_NF2\r
7253 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_E6,opcode_DD_NF2\r
7254 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_EE,opcode_DD_NF2\r
7255 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_F6,opcode_DD_NF2\r
7256 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_FE,opcode_DD_NF2\r
7257\r
7258;@RLC (IX+N) \r
7259opcode_DD_CB_06:\r
7260 stmfd sp!,{r0} ;@ save addr\r
7261 readmem8\r
7262 opRLCb\r
7263 ldmfd sp!,{r1} ;@ restore addr into r1\r
7264 writemem8\r
7265 fetch 23\r
7266;@RRC (IX+N) \r
7267opcode_DD_CB_0E:\r
7268 stmfd sp!,{r0} ;@ save addr\r
7269 readmem8\r
7270 opRRCb\r
7271 ldmfd sp!,{r1} ;@ restore addr into r1\r
7272 writemem8\r
7273 fetch 23\r
7274;@RL (IX+N) \r
7275opcode_DD_CB_16:\r
7276 stmfd sp!,{r0} ;@ save addr\r
7277 readmem8\r
7278 opRLb\r
7279 ldmfd sp!,{r1} ;@ restore addr into r1\r
7280 writemem8\r
7281 fetch 23\r
7282;@RR (IX+N) \r
7283opcode_DD_CB_1E:\r
7284 stmfd sp!,{r0} ;@ save addr \r
7285 readmem8\r
7286 opRRb\r
7287 ldmfd sp!,{r1} ;@ restore addr into r1\r
7288 writemem8\r
7289 fetch 23\r
7290\r
7291;@SLA (IX+N) \r
7292opcode_DD_CB_26:\r
7293 stmfd sp!,{r0} ;@ save addr \r
7294 readmem8\r
7295 opSLAb\r
7296 ldmfd sp!,{r1} ;@ restore addr into r1\r
7297 writemem8\r
7298 fetch 23\r
7299;@SRA (IX+N) \r
7300opcode_DD_CB_2E:\r
7301 stmfd sp!,{r0} ;@ save addr \r
7302 readmem8\r
7303 opSRAb\r
7304 ldmfd sp!,{r1} ;@ restore addr into r1\r
7305 writemem8\r
7306 fetch 23\r
7307;@SLL (IX+N) \r
7308opcode_DD_CB_36:\r
7309 stmfd sp!,{r0} ;@ save addr \r
7310 readmem8\r
7311 opSLLb\r
7312 ldmfd sp!,{r1} ;@ restore addr into r1\r
7313 writemem8\r
7314 fetch 23\r
7315;@SRL (IX+N)\r
7316opcode_DD_CB_3E:\r
7317 stmfd sp!,{r0} ;@ save addr \r
7318 readmem8\r
7319 opSRLb\r
7320 ldmfd sp!,{r1} ;@ restore addr into r1\r
7321 writemem8\r
7322 fetch 23\r
7323\r
7324;@BIT 0,(IX+N) \r
7325opcode_DD_CB_46:\r
7326 readmem8\r
7327 opBITb 0\r
7328 fetch 20\r
7329;@BIT 1,(IX+N) \r
7330opcode_DD_CB_4E:\r
7331 readmem8\r
7332 opBITb 1\r
7333 fetch 20\r
7334;@BIT 2,(IX+N) \r
7335opcode_DD_CB_56:\r
7336 readmem8\r
7337 opBITb 2\r
7338 fetch 20\r
7339;@BIT 3,(IX+N) \r
7340opcode_DD_CB_5E:\r
7341 readmem8\r
7342 opBITb 3\r
7343 fetch 20\r
7344;@BIT 4,(IX+N) \r
7345opcode_DD_CB_66:\r
7346 readmem8\r
7347 opBITb 4\r
7348 fetch 20\r
7349;@BIT 5,(IX+N) \r
7350opcode_DD_CB_6E:\r
7351 readmem8\r
7352 opBITb 5\r
7353 fetch 20\r
7354;@BIT 6,(IX+N) \r
7355opcode_DD_CB_76:\r
7356 readmem8\r
7357 opBITb 6\r
7358 fetch 20\r
7359;@BIT 7,(IX+N) \r
7360opcode_DD_CB_7E:\r
7361 readmem8\r
7362 opBIT7b\r
7363 fetch 20\r
7364;@RES 0,(IX+N) \r
7365opcode_DD_CB_86:\r
7366 opRESmem 0\r
7367;@RES 1,(IX+N) \r
7368opcode_DD_CB_8E:\r
7369 opRESmem 1\r
7370;@RES 2,(IX+N) \r
7371opcode_DD_CB_96:\r
7372 opRESmem 2\r
7373;@RES 3,(IX+N) \r
7374opcode_DD_CB_9E:\r
7375 opRESmem 3\r
7376;@RES 4,(IX+N) \r
7377opcode_DD_CB_A6:\r
7378 opRESmem 4\r
7379;@RES 5,(IX+N) \r
7380opcode_DD_CB_AE:\r
7381 opRESmem 5\r
7382;@RES 6,(IX+N) \r
7383opcode_DD_CB_B6:\r
7384 opRESmem 6\r
7385;@RES 7,(IX+N) \r
7386opcode_DD_CB_BE:\r
7387 opRESmem 7\r
7388\r
7389;@SET 0,(IX+N) \r
7390opcode_DD_CB_C6:\r
7391 opSETmem 0\r
7392;@SET 1,(IX+N) \r
7393opcode_DD_CB_CE:\r
7394 opSETmem 1\r
7395;@SET 2,(IX+N) \r
7396opcode_DD_CB_D6:\r
7397 opSETmem 2\r
7398;@SET 3,(IX+N) \r
7399opcode_DD_CB_DE:\r
7400 opSETmem 3\r
7401;@SET 4,(IX+N) \r
7402opcode_DD_CB_E6:\r
7403 opSETmem 4\r
7404;@SET 5,(IX+N) \r
7405opcode_DD_CB_EE:\r
7406 opSETmem 5\r
7407;@SET 6,(IX+N) \r
7408opcode_DD_CB_F6:\r
7409 opSETmem 6\r
7410;@SET 7,(IX+N) \r
7411opcode_DD_CB_FE:\r
7412 opSETmem 7\r
7413\r
7414\r
7415\r
7416;@POP IX\r
7417opcode_DD_E1:\r
7418.if FAST_Z80SP\r
7419 opPOP\r
7420.else\r
7421 mov r0,z80sp\r
7422 stmfd sp!,{z80xx}\r
7423 readmem16\r
7424 ldmfd sp!,{z80xx}\r
7425 add z80sp,z80sp,#2\r
7426.endif\r
7427 strh r0,[z80xx,#2]\r
7428 fetch 14\r
7429;@EX (SP),IX\r
7430opcode_DD_E3:\r
7431.if FAST_Z80SP\r
7432 ldrb r0,[z80sp]\r
7433 ldrb r1,[z80sp,#1]\r
7434 orr r2,r0,r1, lsl #8\r
7435 ldrh r1,[z80xx,#2]\r
7436 mov r0,r1, lsr #8\r
7437 strb r0,[z80sp,#1]\r
7438 strb r1,[z80sp]\r
7439 strh r2,[z80xx,#2]\r
7440.else\r
7441 mov r0,z80sp\r
7442 stmfd sp!,{z80xx}\r
7443 readmem16\r
7444 ldmfd sp!,{z80xx}\r
7445 mov r2,r0\r
7446 ldrh r0,[z80xx,#2]\r
7447 strh r2,[z80xx,#2]\r
7448 mov r1,z80sp\r
7449 writemem16\r
7450.endif\r
7451 fetch 23\r
7452;@PUSH IX\r
7453opcode_DD_E5:\r
7454 ldr r2,[z80xx]\r
7455 opPUSHreg r2\r
7456 fetch 15\r
7457;@JP (IX)\r
7458opcode_DD_E9:\r
7459 ldrh r0,[z80xx,#2]\r
7460 rebasepc\r
7461 fetch 8\r
7462;@LD SP,IX\r
7463opcode_DD_F9:\r
7464.if FAST_Z80SP\r
7465 ldrh r0,[z80xx,#2]\r
7466 rebasesp\r
7467 mov z80sp,r0\r
7468.else\r
7469 ldrh z80sp,[z80xx,#2]\r
7470.endif\r
7471 fetch 10\r
7472\r
7473;@##################################\r
7474;@##################################\r
7475;@### opcodes ED #########################\r
7476;@##################################\r
7477;@##################################\r
7478\r
7479opcode_ED_NF:\r
7480 fetch 8\r
7481;@ ldrb r0,[z80pc],#1\r
7482;@ ldr pc,[opcodes,r0, lsl #2]\r
7483;@ mov r0,#0xED00\r
7484;@ orr r0,r0,r1\r
7485;@ b end_loop\r
7486\r
7487;@IN B,(C)\r
7488opcode_ED_40:\r
7489 opIN_C\r
7490 and z80bc,z80bc,#0xFF<<16\r
7491 orr z80bc,z80bc,r0, lsl #24\r
7492 sub r1,opcodes,#0x100\r
7493 ldrb r0,[r1,r0]\r
7494 and z80f,z80f,#1<<CFlag\r
7495 orr z80f,z80f,r0\r
7496 fetch 12\r
7497;@OUT (C),B\r
7498opcode_ED_41:\r
7499 mov r1,z80bc, lsr #24\r
7500 opOUT_C\r
7501 fetch 12\r
7502\r
7503;@SBC HL,BC\r
7504opcode_ED_42:\r
7505 opSBC16 z80bc\r
7506\r
7507;@LD (NN),BC\r
7508opcode_ED_43:\r
7509 ldrb r0,[z80pc],#1\r
7510 ldrb r1,[z80pc],#1\r
7511 orr r1,r0,r1, lsl #8\r
7512 mov r0,z80bc, lsr #16\r
7513 writemem16\r
7514 fetch 20\r
7515;@NEG\r
7516opcode_ED_44:\r
7517 rsbs z80a,z80a,#0\r
7518 mrs z80f,cpsr\r
7519 mov z80f,z80f,lsr#28 ;@S,Z,V&C\r
7520 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@invert C and set n.\r
7521 tst z80a,#0x0F000000 ;@H, correct\r
7522 orrne z80f,z80f,#1<<HFlag\r
7523 fetch 8\r
7524 \r
7525;@RETN, moved to ED_4D\r
7526;@opcode_ED_45:\r
7527\r
7528;@IM 0\r
7529opcode_ED_46:\r
7530 strb z80a,[cpucontext,#z80im]\r
7531 fetch 8\r
7532;@LD I,A\r
7533opcode_ED_47:\r
7534 str z80a,[cpucontext,#z80i]\r
7535 fetch 9\r
7536;@IN C,(C)\r
7537opcode_ED_48:\r
7538 opIN_C\r
7539 and z80bc,z80bc,#0xFF<<24\r
7540 orr z80bc,z80bc,r0, lsl #16\r
7541 sub r1,opcodes,#0x100\r
7542 ldrb r0,[r1,r0]\r
7543 and z80f,z80f,#1<<CFlag\r
7544 orr z80f,z80f,r0\r
7545 fetch 12\r
7546;@OUT (C),C\r
7547opcode_ED_49:\r
7548 mov r0,z80bc, lsr #16\r
7549 and r1,r0,#0xFF\r
7550 opOUT\r
7551 fetch 12\r
7552;@ADC HL,BC\r
7553opcode_ED_4A:\r
7554 opADC16 z80bc\r
7555;@LD BC,(NN)\r
7556opcode_ED_4B:\r
7557 ldrb r0,[z80pc],#1\r
7558 ldrb r1,[z80pc],#1\r
7559 orr r0,r0,r1, lsl #8\r
7560 readmem16\r
7561 mov z80bc,r0, lsl #16\r
7562 fetch 20\r
7563\r
7564;@RETN\r
7565opcode_ED_45:\r
7566;@RETI\r
7567opcode_ED_4D:\r
7568 ldrb r0,[cpucontext,#z80if]\r
7569 tst r0,#Z80_IF2\r
7570 orrne r0,r0,#Z80_IF1\r
7571 biceq r0,r0,#Z80_IF1\r
7572 strb r0,[cpucontext,#z80if]\r
7573 opPOP\r
7574 rebasepc\r
7575 fetch 14\r
7576\r
7577;@LD R,A\r
7578opcode_ED_4F:\r
7579 mov r0,z80a,lsr#24\r
7580 strb r0,[cpucontext,#z80r]\r
7581 fetch 9\r
7582\r
7583;@IN D,(C)\r
7584opcode_ED_50:\r
7585 opIN_C\r
7586 and z80de,z80de,#0xFF<<16\r
7587 orr z80de,z80de,r0, lsl #24\r
7588 sub r1,opcodes,#0x100\r
7589 ldrb r0,[r1,r0]\r
7590 and z80f,z80f,#1<<CFlag\r
7591 orr z80f,z80f,r0\r
7592 fetch 12\r
7593;@OUT (C),D\r
7594opcode_ED_51:\r
7595 mov r1,z80de, lsr #24\r
7596 opOUT_C\r
7597 fetch 12\r
7598;@SBC HL,DE\r
7599opcode_ED_52:\r
7600 opSBC16 z80de\r
7601;@LD (NN),DE\r
7602opcode_ED_53:\r
7603 ldrb r0,[z80pc],#1\r
7604 ldrb r1,[z80pc],#1\r
7605 orr r1,r0,r1, lsl #8\r
7606 mov r0,z80de, lsr #16\r
7607 writemem16\r
7608 fetch 20\r
7609;@IM 1\r
7610opcode_ED_56:\r
7611 mov r0,#1\r
7612 strb r0,[cpucontext,#z80im]\r
7613 fetch 8\r
7614;@LD A,I\r
7615opcode_ED_57:\r
7616 ldr z80a,[cpucontext,#z80i]\r
7617 tst z80a,#0xFF000000\r
7618 and z80f,z80f,#(1<<CFlag)\r
7619 orreq z80f,z80f,#(1<<ZFlag)\r
7620 orrmi z80f,z80f,#(1<<SFlag)\r
7621 ldrb r0,[cpucontext,#z80if]\r
7622 tst r0,#Z80_IF2\r
7623 orrne z80f,z80f,#(1<<VFlag)\r
7624 fetch 9\r
7625;@IN E,(C)\r
7626opcode_ED_58:\r
7627 opIN_C\r
7628 and z80de,z80de,#0xFF<<24\r
7629 orr z80de,z80de,r0, lsl #16\r
7630 sub r1,opcodes,#0x100\r
7631 ldrb r0,[r1,r0]\r
7632 and z80f,z80f,#1<<CFlag\r
7633 orr z80f,z80f,r0\r
7634 fetch 12\r
7635;@OUT (C),E\r
7636opcode_ED_59:\r
7637 mov r1,z80de, lsr #16\r
7638 and r1,r1,#0xFF\r
7639 opOUT_C\r
7640 fetch 12\r
7641;@ADC HL,DE\r
7642opcode_ED_5A:\r
7643 opADC16 z80de\r
7644;@LD DE,(NN)\r
7645opcode_ED_5B:\r
7646 ldrb r0,[z80pc],#1\r
7647 ldrb r1,[z80pc],#1\r
7648 orr r0,r0,r1, lsl #8\r
7649 readmem16\r
7650 mov z80de,r0, lsl #16\r
7651 fetch 20\r
7652;@IM 2\r
7653opcode_ED_5E:\r
7654 mov r0,#2\r
7655 strb r0,[cpucontext,#z80im]\r
7656 fetch 8\r
7657;@LD A,R\r
7658opcode_ED_5F:\r
7659 ldrb r0,[cpucontext,#z80r]\r
7660 and r0,r0,#0x80\r
7661 rsb r1,z80_icount,#0\r
7662 and r1,r1,#0x7F\r
7663 orr r0,r0,r1\r
7664 movs z80a,r0, lsl #24\r
7665 and z80f,z80f,#1<<CFlag\r
7666 orrmi z80f,z80f,#(1<<SFlag)\r
7667 orreq z80f,z80f,#(1<<ZFlag)\r
7668 ldrb r0,[cpucontext,#z80if]\r
7669 tst r0,#Z80_IF2\r
7670 orrne z80f,z80f,#(1<<VFlag)\r
7671 fetch 9\r
7672;@IN H,(C)\r
7673opcode_ED_60:\r
7674 opIN_C\r
7675 and z80hl,z80hl,#0xFF<<16\r
7676 orr z80hl,z80hl,r0, lsl #24\r
7677 sub r1,opcodes,#0x100\r
7678 ldrb r0,[r1,r0]\r
7679 and z80f,z80f,#1<<CFlag\r
7680 orr z80f,z80f,r0\r
7681 fetch 12\r
7682;@OUT (C),H\r
7683opcode_ED_61:\r
7684 mov r1,z80hl, lsr #24\r
7685 opOUT_C\r
7686 fetch 12\r
7687;@SBC HL,HL\r
7688opcode_ED_62:\r
7689 opSBC16HL\r
7690;@RRD\r
7691opcode_ED_67:\r
7692 readmem8HL\r
7693 mov r1,r0,ror#4\r
7694 orr r0,r1,z80a,lsr#20\r
7695 bic z80a,z80a,#0x0F000000\r
7696 orr z80a,z80a,r1,lsr#4\r
7697 writemem8HL\r
7698 sub r1,opcodes,#0x100\r
7699 ldrb r0,[r1,z80a, lsr #24]\r
7700 and z80f,z80f,#1<<CFlag\r
7701 orr z80f,z80f,r0\r
7702 fetch 18\r
7703;@IN L,(C)\r
7704opcode_ED_68:\r
7705 opIN_C\r
7706 and z80hl,z80hl,#0xFF<<24\r
7707 orr z80hl,z80hl,r0, lsl #16\r
7708 and z80f,z80f,#1<<CFlag\r
7709 sub r1,opcodes,#0x100\r
7710 ldrb r0,[r1,r0]\r
7711 orr z80f,z80f,r0\r
7712 fetch 12\r
7713;@OUT (C),L\r
7714opcode_ED_69:\r
7715 mov r1,z80hl, lsr #16\r
7716 and r1,r1,#0xFF\r
7717 opOUT_C\r
7718 fetch 12\r
7719;@ADC HL,HL\r
7720opcode_ED_6A:\r
7721 opADC16HL\r
7722;@RLD\r
7723opcode_ED_6F:\r
7724 readmem8HL\r
7725 orr r0,r0,z80a,lsl#4\r
7726 mov r0,r0,ror#28\r
7727 and z80a,z80a,#0xF0000000\r
7728 orr z80a,z80a,r0,lsl#16\r
7729 and z80a,z80a,#0xFF000000\r
7730 writemem8HL\r
7731 sub r1,opcodes,#0x100\r
7732 ldrb r0,[r1,z80a, lsr #24]\r
7733 and z80f,z80f,#1<<CFlag\r
7734 orr z80f,z80f,r0\r
7735 fetch 18\r
7736;@IN F,(C)\r
7737opcode_ED_70:\r
7738 opIN_C\r
7739 and z80f,z80f,#1<<CFlag\r
7740 sub r1,opcodes,#0x100\r
7741 ldrb r0,[r1,r0]\r
7742 orr z80f,z80f,r0\r
7743 fetch 12\r
7744;@OUT (C),0\r
7745opcode_ED_71:\r
7746 mov r1,#0\r
7747 opOUT_C\r
7748 fetch 12\r
7749\r
7750;@SBC HL,SP\r
7751opcode_ED_72:\r
7752.if FAST_Z80SP\r
7753 ldr r0,[cpucontext,#z80sp_base]\r
7754 sub r0,z80sp,r0\r
7755 mov r0, r0, lsl #16\r
7756.else\r
7757 mov r0,z80sp,lsl#16\r
7758.endif\r
7759 opSBC16 r0\r
7760;@LD (NN),SP\r
7761opcode_ED_73:\r
7762 ldrb r0,[z80pc],#1\r
7763 ldrb r1,[z80pc],#1\r
7764 orr r1,r0,r1, lsl #8\r
7765.if FAST_Z80SP\r
7766 ldr r0,[cpucontext,#z80sp_base]\r
7767 sub r0,z80sp,r0\r
7768.else\r
7769 mov r0,z80sp\r
7770.endif\r
7771 writemem16\r
7772 fetch 16\r
7773;@IN A,(C)\r
7774opcode_ED_78:\r
7775 opIN_C\r
7776 mov z80a,r0, lsl #24\r
7777 and z80f,z80f,#1<<CFlag\r
7778 sub r1,opcodes,#0x100\r
7779 ldrb r0,[r1,r0]\r
7780 orr z80f,z80f,r0\r
7781 fetch 12\r
7782;@OUT (C),A\r
7783opcode_ED_79:\r
7784 mov r1,z80a, lsr #24\r
7785 opOUT_C\r
7786 fetch 12\r
7787;@ADC HL,SP\r
7788opcode_ED_7A:\r
7789.if FAST_Z80SP\r
7790 ldr r0,[cpucontext,#z80sp_base]\r
7791 sub r0,z80sp,r0\r
7792 mov r0, r0, lsl #16\r
7793.else\r
7794 mov r0,z80sp,lsl#16\r
7795.endif\r
7796 opADC16 r0\r
7797;@LD SP,(NN)\r
7798opcode_ED_7B:\r
7799 ldrb r0,[z80pc],#1\r
7800 ldrb r1,[z80pc],#1\r
7801 orr r0,r0,r1, lsl #8\r
7802 readmem16\r
7803.if FAST_Z80SP\r
7804 rebasesp\r
7805.endif\r
7806 mov z80sp,r0\r
7807 fetch 20\r
7808;@LDI\r
7809opcode_ED_A0:\r
7810 copymem8HL_DE\r
7811 add z80hl,z80hl,#1<<16\r
7812 add z80de,z80de,#1<<16\r
7813 subs z80bc,z80bc,#1<<16\r
7814 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7815 orrne z80f,z80f,#1<<VFlag\r
7816 fetch 16\r
7817;@CPI\r
7818opcode_ED_A1:\r
7819 readmem8HL\r
7820 add z80hl,z80hl,#0x00010000\r
7821 mov r1,z80a,lsl#4\r
7822 cmp z80a,r0,lsl#24\r
7823 and z80f,z80f,#1<<CFlag\r
7824 orr z80f,z80f,#1<<NFlag\r
7825 orrmi z80f,z80f,#1<<SFlag\r
7826 orreq z80f,z80f,#1<<ZFlag\r
7827 cmp r1,r0,lsl#28\r
7828 orrcc z80f,z80f,#1<<HFlag\r
7829 subs z80bc,z80bc,#0x00010000\r
7830 orrne z80f,z80f,#1<<VFlag\r
7831 fetch 16\r
7832;@INI\r
7833opcode_ED_A2:\r
7834 opIN_C\r
7835 and z80f,r0,#0x80\r
7836 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7837;@ mov r1,z80bc,lsl#8\r
7838;@ add r1,r1,#0x01000000\r
7839;@ adds r1,r1,r0,lsl#24\r
7840;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7841 writemem8HL\r
7842 add z80hl,z80hl,#1<<16\r
7843 sub z80bc,z80bc,#1<<24\r
7844 tst z80bc,#0xFF<<24\r
7845 orrmi z80f,z80f,#1<<SFlag\r
7846 orreq z80f,z80f,#1<<ZFlag\r
7847 fetch 16\r
7848\r
7849;@OUTI\r
7850opcode_ED_A3:\r
7851 readmem8HL\r
7852 add z80hl,z80hl,#1<<16\r
7853 and z80f,r0,#0x80\r
7854 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7855 mov r1,z80hl,lsl#8\r
7856 adds r1,r1,r0,lsl#24\r
7857 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL)+L > 0xFF\r
7858 sub z80bc,z80bc,#1<<24\r
7859 tst z80bc,#0xFF<<24\r
7860 orrmi z80f,z80f,#1<<SFlag\r
7861 orreq z80f,z80f,#1<<ZFlag\r
7862 mov r1,r0\r
7863 opOUT_C\r
7864 fetch 16\r
7865\r
7866;@LDD\r
7867opcode_ED_A8:\r
7868 copymem8HL_DE\r
7869 sub z80hl,z80hl,#1<<16\r
7870 sub z80de,z80de,#1<<16\r
7871 subs z80bc,z80bc,#1<<16\r
7872 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7873 orrne z80f,z80f,#1<<VFlag\r
7874 fetch 16\r
7875\r
7876;@CPD\r
7877opcode_ED_A9:\r
7878 readmem8HL\r
7879 sub z80hl,z80hl,#1<<16\r
7880 mov r1,z80a,lsl#4\r
7881 cmp z80a,r0,lsl#24\r
7882 and z80f,z80f,#1<<CFlag\r
7883 orr z80f,z80f,#1<<NFlag\r
7884 orrmi z80f,z80f,#1<<SFlag\r
7885 orreq z80f,z80f,#1<<ZFlag\r
7886 cmp r1,r0,lsl#28\r
7887 orrcc z80f,z80f,#1<<HFlag\r
7888 subs z80bc,z80bc,#0x00010000\r
7889 orrne z80f,z80f,#1<<VFlag\r
7890 fetch 16\r
7891\r
7892;@IND\r
7893opcode_ED_AA:\r
7894 opIN_C\r
7895 and z80f,r0,#0x80\r
7896 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7897;@ mov r1,z80bc,lsl#8\r
7898;@ sub r1,r1,#0x01000000\r
7899;@ adds r1,r1,r0,lsl#24\r
7900;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
7901 writemem8HL\r
7902 sub z80hl,z80hl,#1<<16\r
7903 sub z80bc,z80bc,#1<<24\r
7904 tst z80bc,#0xFF<<24\r
7905 orrmi z80f,z80f,#1<<SFlag\r
7906 orreq z80f,z80f,#1<<ZFlag\r
7907 fetch 16\r
7908\r
7909;@OUTD\r
7910opcode_ED_AB:\r
7911 readmem8HL\r
7912 sub z80hl,z80hl,#1<<16\r
7913 and z80f,r0,#0x80\r
7914 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7915 mov r1,z80hl,lsl#8\r
7916 adds r1,r1,r0,lsl#24\r
7917 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7918 sub z80bc,z80bc,#1<<24\r
7919 tst z80bc,#0xFF<<24\r
7920 orrmi z80f,z80f,#1<<SFlag\r
7921 orreq z80f,z80f,#1<<ZFlag\r
7922 mov r1,r0\r
7923 opOUT_C\r
7924 fetch 16\r
7925;@LDIR\r
7926opcode_ED_B0:\r
7927 copymem8HL_DE\r
7928 add z80hl,z80hl,#1<<16\r
7929 add z80de,z80de,#1<<16\r
7930 subs z80bc,z80bc,#1<<16\r
7931 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7932 orrne z80f,z80f,#1<<VFlag\r
7933 subne z80pc,z80pc,#2\r
7934 subne z80_icount,z80_icount,#5\r
7935 fetch 16\r
7936\r
7937;@CPIR\r
7938opcode_ED_B1:\r
7939 readmem8HL\r
7940 add z80hl,z80hl,#1<<16 \r
7941 mov r1,z80a,lsl#4\r
7942 cmp z80a,r0,lsl#24\r
7943 and z80f,z80f,#1<<CFlag\r
7944 orr z80f,z80f,#1<<NFlag\r
7945 orrmi z80f,z80f,#1<<SFlag\r
7946 orreq z80f,z80f,#1<<ZFlag\r
7947 cmp r1,r0,lsl#28\r
7948 orrcc z80f,z80f,#1<<HFlag\r
7949 subs z80bc,z80bc,#1<<16\r
7950 bne opcode_ED_B1_decpc\r
7951 fetch 16\r
7952opcode_ED_B1_decpc:\r
7953 orr z80f,z80f,#1<<VFlag\r
7954 tst z80f,#1<<ZFlag\r
7955 subeq z80pc,z80pc,#2\r
7956 subeq z80_icount,z80_icount,#5\r
7957 fetch 16\r
7958;@INIR\r
7959opcode_ED_B2:\r
7960 opIN_C\r
7961 and z80f,r0,#0x80\r
7962 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7963;@ mov r1,z80bc,lsl#8\r
7964;@ add r1,r1,#0x01000000\r
7965;@ adds r1,r1,r0,lsl#24\r
7966;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7967 writemem8HL\r
7968 add z80hl,z80hl,#1<<16\r
7969 sub z80bc,z80bc,#1<<24\r
7970 tst z80bc,#0xFF<<24\r
7971 orrmi z80f,z80f,#1<<SFlag\r
7972 orreq z80f,z80f,#1<<ZFlag\r
7973 subne z80pc,z80pc,#2\r
7974 subne z80_icount,z80_icount,#5\r
7975 fetch 16\r
7976;@OTIR\r
7977opcode_ED_B3:\r
7978 readmem8HL\r
7979 add z80hl,z80hl,#1<<16\r
7980 and z80f,r0,#0x80\r
7981 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7982 mov r1,z80hl,lsl#8\r
7983 adds r1,r1,r0,lsl#24\r
7984 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7985 sub z80bc,z80bc,#1<<24\r
7986 tst z80bc,#0xFF<<24\r
7987 orrmi z80f,z80f,#1<<SFlag\r
7988 orreq z80f,z80f,#1<<ZFlag\r
7989 subne z80pc,z80pc,#2\r
7990 subne z80_icount,z80_icount,#5\r
7991 mov r1,r0\r
7992 opOUT_C\r
7993 fetch 16\r
7994;@LDDR\r
7995opcode_ED_B8:\r
7996 copymem8HL_DE\r
7997 sub z80hl,z80hl,#1<<16\r
7998 sub z80de,z80de,#1<<16\r
7999 subs z80bc,z80bc,#1<<16\r
8000 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
8001 orrne z80f,z80f,#1<<VFlag\r
8002 subne z80pc,z80pc,#2\r
8003 subne z80_icount,z80_icount,#5\r
8004 fetch 16\r
8005\r
8006;@CPDR\r
8007opcode_ED_B9:\r
8008 readmem8HL\r
8009 sub z80hl,z80hl,#1<<16\r
8010 mov r1,z80a,lsl#4\r
8011 cmp z80a,r0,lsl#24\r
8012 and z80f,z80f,#1<<CFlag\r
8013 orr z80f,z80f,#1<<NFlag\r
8014 orrmi z80f,z80f,#1<<SFlag\r
8015 orreq z80f,z80f,#1<<ZFlag\r
8016 cmp r1,r0,lsl#28\r
8017 orrcc z80f,z80f,#1<<HFlag\r
8018 subs z80bc,z80bc,#1<<16\r
8019 bne opcode_ED_B9_decpc\r
8020 fetch 16\r
8021opcode_ED_B9_decpc:\r
8022 orr z80f,z80f,#1<<VFlag\r
8023 tst z80f,#1<<ZFlag\r
8024 subeq z80pc,z80pc,#2\r
8025 subeq z80_icount,z80_icount,#5\r
8026 fetch 16\r
8027;@INDR\r
8028opcode_ED_BA:\r
8029 opIN_C\r
8030 and z80f,r0,#0x80\r
8031 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8032;@ mov r1,z80bc,lsl#8\r
8033;@ sub r1,r1,#0x01000000\r
8034;@ adds r1,r1,r0,lsl#24\r
8035;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
8036 writemem8HL\r
8037 sub z80hl,z80hl,#1<<16\r
8038 sub z80bc,z80bc,#1<<24\r
8039 tst z80bc,#0xFF<<24\r
8040 orrmi z80f,z80f,#1<<SFlag\r
8041 orreq z80f,z80f,#1<<ZFlag\r
8042 subne z80pc,z80pc,#2\r
8043 subne z80_icount,z80_icount,#5\r
8044 fetch 16\r
8045;@OTDR\r
8046opcode_ED_BB:\r
8047 readmem8HL\r
8048 sub z80hl,z80hl,#1<<16\r
8049 and z80f,r0,#0x80\r
8050 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8051 mov r1,z80hl,lsl#8\r
8052 adds r1,r1,r0,lsl#24\r
8053 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
8054 sub z80bc,z80bc,#1<<24\r
8055 tst z80bc,#0xFF<<24\r
8056 orrmi z80f,z80f,#1<<SFlag\r
8057 orreq z80f,z80f,#1<<ZFlag\r
8058 subne z80pc,z80pc,#2\r
8059 subne z80_icount,z80_icount,#5\r
8060 mov r1,r0\r
8061 opOUT_C\r
8062 fetch 16\r
8063;@##################################\r
8064;@##################################\r
8065;@### opcodes FD #########################\r
8066;@##################################\r
8067;@##################################\r
8068;@Since DD and FD opcodes are all the same apart from the address\r
8069;@register they use. When a FD intruction the program runs the code\r
8070;@from the DD location but the address of the IY reg is passed instead\r
8071;@of IX\r
8072\r
f0243975 8073;@end_loop:\r
8074;@ b end_loop\r
cc68a136 8075\r
8076\r
8077\r
fast MegaDrive/MegaCD/32X emulator