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fix CD load filename display
[picodrive.git] / cpu / DrZ80 / drz80.s
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cc68a136 1;@ Reesy's Z80 Emulator Version 0.001\r
2\r
3;@ (c) Copyright 2004 Reesy, All rights reserved\r
4;@ DrZ80 is free for non-commercial use.\r
5\r
6;@ For commercial use, separate licencing terms must be obtained.\r
7\r
8 .data\r
9 .align 4\r
10\r
11 .global DrZ80Run\r
12 .global DrZ80Ver\r
13\r
e5f426aa 14 .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
15 .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
16 .equiv UPDATE_CONTEXT, 0\r
17 .equiv DRZ80_FOR_PICODRIVE, 1\r
cc68a136 18\r
19.if INTERRUPT_MODE\r
e5f426aa 20 .extern Interrupt\r
cc68a136 21.endif\r
22\r
23.if DRZ80_FOR_PICODRIVE\r
cc68a136 24 .extern PicoRead8\r
25 .extern Pico\r
26 .extern z80_write\r
43e6eaad 27 .extern ym2612_read_local_z80\r
cc68a136 28.endif\r
29\r
30DrZ80Ver: .long 0x0001\r
31\r
32;@ --------------------------- Defines ----------------------------\r
33;@ Make sure that regs/pointers for z80pc to z80sp match up!\r
34\r
35 opcodes .req r3\r
36 z80_icount .req r4\r
37 cpucontext .req r5\r
38 z80pc .req r6\r
39 z80a .req r7\r
40 z80f .req r8\r
41 z80bc .req r9\r
42 z80de .req r10\r
43 z80hl .req r11\r
44 z80sp .req r12 \r
45 z80xx .req lr\r
46\r
47 .equ z80pc_pointer, 0 ;@ 0\r
48 .equ z80a_pointer, z80pc_pointer+4 ;@ 4\r
49 .equ z80f_pointer, z80a_pointer+4 ;@ 8\r
50 .equ z80bc_pointer, z80f_pointer+4 ;@ \r
51 .equ z80de_pointer, z80bc_pointer+4\r
52 .equ z80hl_pointer, z80de_pointer+4\r
53 .equ z80sp_pointer, z80hl_pointer+4\r
54 .equ z80pc_base, z80sp_pointer+4\r
55 .equ z80sp_base, z80pc_base+4\r
56 .equ z80ix, z80sp_base+4\r
57 .equ z80iy, z80ix+4\r
58 .equ z80i, z80iy+4\r
59 .equ z80a2, z80i+4\r
60 .equ z80f2, z80a2+4\r
61 .equ z80bc2, z80f2+4\r
62 .equ z80de2, z80bc2+4\r
63 .equ z80hl2, z80de2+4\r
64 .equ cycles_pointer, z80hl2+4 \r
65 .equ previouspc, cycles_pointer+4 \r
66 .equ z80irq, previouspc+4\r
67 .equ z80if, z80irq+1\r
68 .equ z80im, z80if+1\r
69 .equ z80r, z80im+1\r
70 .equ z80irqvector, z80r+1\r
71 .equ z80irqcallback, z80irqvector+4\r
72 .equ z80_write8, z80irqcallback+4\r
73 .equ z80_write16, z80_write8+4\r
74 .equ z80_in, z80_write16+4\r
75 .equ z80_out, z80_in+4\r
76 .equ z80_read8, z80_out+4\r
77 .equ z80_read16, z80_read8+4\r
78 .equ z80_rebaseSP, z80_read16+4\r
79 .equ z80_rebasePC, z80_rebaseSP+4\r
80\r
81 .equ VFlag, 0\r
82 .equ CFlag, 1\r
83 .equ ZFlag, 2\r
84 .equ SFlag, 3\r
85 .equ HFlag, 4\r
86 .equ NFlag, 5\r
87 .equ Flag3, 6\r
88 .equ Flag5, 7\r
89\r
90 .equ Z80_CFlag, 0\r
91 .equ Z80_NFlag, 1\r
92 .equ Z80_VFlag, 2\r
93 .equ Z80_Flag3, 3\r
94 .equ Z80_HFlag, 4\r
95 .equ Z80_Flag5, 5\r
96 .equ Z80_ZFlag, 6\r
97 .equ Z80_SFlag, 7\r
98\r
99 .equ Z80_IF1, 1<<0\r
100 .equ Z80_IF2, 1<<1\r
101 .equ Z80_HALT, 1<<2\r
102\r
103;@---------------------------------------\r
104\r
105.text\r
106\r
107.if DRZ80_FOR_PICODRIVE\r
cc68a136 108\r
cc68a136 109pico_z80_read8: @ addr\r
110 cmp r0,#0x2000 @ Z80 RAM\r
111 ldrlt r1,[cpucontext,#z80sp_base]\r
112 ldrltb r0,[r1,r0]\r
113 bxlt lr\r
114\r
115 cmp r0,#0x8000 @ 68k bank\r
116 blt 1f\r
117 ldr r2,=(Pico+0x22212)\r
118 ldrh r1,[r2]\r
119 bic r0,r0,#0x3f8000\r
120 orr r0,r0,r1,lsl #15\r
121 ldr r1,[r2,#-0xe] @ ROM size\r
122 cmp r0,r1\r
123 ldrlt r1,[r2,#-0x12] @ ROM\r
124 eorlt r0,r0,#1 @ our ROM is byteswapped\r
125 ldrltb r0,[r1,r0]\r
126 bxlt lr\r
17043584 127 stmfd sp!,{r3,r12,lr}\r
cc68a136 128 bl PicoRead8\r
17043584 129 ldmfd sp!,{r3,r12,pc}\r
cc68a136 1301:\r
131 mov r1,r0,lsr #13\r
132 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
133 bne 0f\r
134 and r0,r0,#3\r
17043584 135 stmfd sp!,{r3,r12,lr}\r
136 str z80_icount,[cpucontext,#cycles_pointer]\r
137 bl ym2612_read_local_z80\r
138 ldmfd sp!,{r3,r12,pc}\r
cc68a136 1390:\r
140 cmp r0,#0x4000\r
141 movge r0,#0xff\r
142 bxge lr\r
143 ldr r1,[cpucontext,#z80sp_base]\r
144 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
145 ldrb r0,[r1,r0]\r
146 bx lr\r
147\r
148pico_z80_read16: @ addr\r
149 cmp r0,#0x2000 @ Z80 RAM\r
150 bge 2f\r
151 ldr r1,[cpucontext,#z80sp_base]\r
152 ldrb r0,[r1,r0]!\r
153 ldrb r1,[r1,#1]\r
154 orr r0,r0,r1,lsl #8\r
155 bx lr\r
156\r
1572:\r
158 cmp r0,#0x8000 @ 68k bank\r
159 blt 1f\r
160 ldr r2,=(Pico+0x22212)\r
161 ldrh r1,[r2]\r
162 bic r0,r0,#0x1f8000\r
163 orr r0,r0,r1,lsl #15\r
164 ldr r1,[r2,#-0xe] @ ROM size\r
165 cmp r0,r1\r
166 ldr r1,[r2,#-0x12] @ ROM\r
167 tst r0,#1\r
168 eor r0,r0,#1\r
169 ldrb r0,[r1,r0]!\r
170 ldreqb r1,[r1,#-1]\r
171 ldrneb r1,[r1,#3] @ this is due to byteswapped ROM\r
172 orr r0,r0,r1,lsl #8\r
173 bx lr\r
1743:\r
175 stmfd sp!,{r3-r5,r12,lr}\r
176 mov r4,r0\r
177 bl PicoRead8\r
178 mov r5,r0\r
179 add r0,r4,#1\r
180 bl PicoRead8\r
181 orr r0,r5,r0,lsl #8\r
b542be46 182 ldmfd sp!,{r3-r5,r12,pc}\r
cc68a136 1831:\r
184 mov r1,r0,lsr #13\r
185 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
186 bne 0f\r
187 and r0,r0,#3\r
17043584 188 stmfd sp!,{r3,r12,lr}\r
189 str z80_icount,[cpucontext,#cycles_pointer]\r
190 bl ym2612_read_local_z80\r
191 orr r0,r0,r0,lsl #8\r
192 ldmfd sp!,{r3,r12,pc}\r
cc68a136 1930:\r
194 cmp r0,#0x4000\r
195 movge r0,#0xff\r
196 bxge lr\r
197 ldr r1,[cpucontext,#z80sp_base]\r
198 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
199 ldrb r0,[r1,r0]!\r
200 ldrb r1,[r1,#1]\r
201 orr r0,r0,r1,lsl #8\r
202 bx lr\r
203\r
204pico_z80_write8: @ data, addr\r
205 cmp r1,#0x4000\r
206 bge 1f\r
207 ldr r2,[cpucontext,#z80sp_base]\r
208 bic r1,r1,#0x0fe000 @ Z80 RAM\r
209 strb r0,[r2,r1]\r
210 bx lr\r
2111:\r
212 stmfd sp!,{r3,r12,lr}\r
17043584 213 str z80_icount,[cpucontext,#cycles_pointer]\r
cc68a136 214 bl z80_write\r
215 ldmfd sp!,{r3,r12,pc}\r
216\r
217pico_z80_write16: @ data, addr\r
218 cmp r1,#0x4000\r
219 bge 1f\r
220 ldr r2,[cpucontext,#z80sp_base]\r
221 bic r1,r1,#0x0fe000 @ Z80 RAM\r
222 strb r0,[r2,r1]!\r
223 mov r0,r0,lsr #8\r
224 strb r0,[r2,#1]\r
225 bx lr\r
2261:\r
17043584 227 stmfd sp!,{r3-r5,r12,lr}\r
228 str z80_icount,[cpucontext,#cycles_pointer]\r
cc68a136 229 mov r4,r0\r
230 mov r5,r1\r
17043584 231 bl z80_write\r
cc68a136 232 mov r0,r4,lsr #8\r
233 add r1,r5,#1\r
17043584 234 bl z80_write\r
235 ldmfd sp!,{r3-r5,r12,pc}\r
cc68a136 236\r
237 .pool\r
238.endif\r
239\r
240.macro fetch cycs\r
241 subs z80_icount,z80_icount,#\cycs\r
242.if UPDATE_CONTEXT\r
243 str z80pc,[cpucontext,#z80pc_pointer]\r
244 str z80_icount,[cpucontext,#cycles_pointer]\r
245 ldr r1,[cpucontext,#z80pc_base]\r
246 sub r2,z80pc,r1\r
247 str r2,[cpucontext,#previouspc]\r
248.endif\r
249 ldrplb r0,[z80pc],#1\r
250 ldrpl pc,[opcodes,r0, lsl #2]\r
251 bmi z80_execute_end\r
252.endm\r
253\r
254.macro eatcycles cycs\r
255 sub z80_icount,z80_icount,#\cycs\r
256.if UPDATE_CONTEXT\r
257 str z80_icount,[cpucontext,#cycles_pointer]\r
258.endif\r
259.endm\r
260\r
261.macro readmem8\r
262.if UPDATE_CONTEXT\r
263 str z80pc,[cpucontext,#z80pc_pointer]\r
264.endif\r
265.if DRZ80_FOR_PICODRIVE\r
266 bl pico_z80_read8\r
267.else\r
268 stmfd sp!,{r3,r12}\r
269 mov lr,pc\r
270 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
271 ldmfd sp!,{r3,r12}\r
272.endif\r
273.endm\r
274\r
275.macro readmem8HL\r
276 mov r0,z80hl, lsr #16\r
277 readmem8\r
278.endm\r
279\r
280.macro readmem16\r
281.if UPDATE_CONTEXT\r
282 str z80pc,[cpucontext,#z80pc_pointer]\r
283.endif\r
284.if DRZ80_FOR_PICODRIVE\r
285 bl pico_z80_read16\r
286.else\r
287 stmfd sp!,{r3,r12}\r
288 mov lr,pc\r
289 ldr pc,[cpucontext,#z80_read16]\r
290 ldmfd sp!,{r3,r12}\r
291.endif\r
292.endm\r
293\r
294.macro writemem8\r
295.if UPDATE_CONTEXT\r
296 str z80pc,[cpucontext,#z80pc_pointer]\r
297.endif\r
298.if DRZ80_FOR_PICODRIVE\r
299 bl pico_z80_write8\r
300.else\r
301 stmfd sp!,{r3,r12}\r
302 mov lr,pc\r
303 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
304 ldmfd sp!,{r3,r12}\r
305.endif\r
306.endm\r
307\r
308.macro writemem8DE\r
309 mov r1,z80de, lsr #16\r
310 writemem8\r
311.endm\r
312\r
313.macro writemem8HL\r
314 mov r1,z80hl, lsr #16\r
315 writemem8\r
316.endm\r
317\r
318.macro writemem16\r
319.if UPDATE_CONTEXT\r
320 str z80pc,[cpucontext,#z80pc_pointer]\r
321.endif\r
322.if DRZ80_FOR_PICODRIVE\r
323 bl pico_z80_write16\r
324.else\r
325 stmfd sp!,{r3,r12}\r
326 mov lr,pc\r
327 ldr pc,[cpucontext,#z80_write16] ;@ r0=data r1=addr\r
328 ldmfd sp!,{r3,r12}\r
329.endif\r
330.endm\r
331\r
332.macro copymem8HL_DE\r
333.if UPDATE_CONTEXT\r
334 str z80pc,[cpucontext,#z80pc_pointer]\r
335.endif\r
336 mov r0,z80hl, lsr #16\r
337.if DRZ80_FOR_PICODRIVE\r
338 bl pico_z80_read8\r
339.else\r
340 stmfd sp!,{r3,r12}\r
341 mov lr,pc\r
342 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
343.endif\r
344.if UPDATE_CONTEXT\r
345 str z80pc,[cpucontext,#z80pc_pointer]\r
346.endif\r
347 mov r1,z80de, lsr #16\r
348.if DRZ80_FOR_PICODRIVE\r
349 bl pico_z80_write8\r
350.else\r
351 mov lr,pc\r
352 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
353 ldmfd sp!,{r3,r12}\r
354.endif\r
355.endm\r
356;@---------------------------------------\r
357\r
358.macro rebasepc\r
359.if UPDATE_CONTEXT\r
360 str z80pc,[cpucontext,#z80pc_pointer]\r
361.endif\r
362.if DRZ80_FOR_PICODRIVE\r
cc68a136 363 ldr r1,[cpucontext,#z80pc_base]\r
de89bf45 364 bic r0,r0,#0xfe000\r
cc68a136 365 add z80pc,r1,r0\r
366.else\r
367 stmfd sp!,{r3,r12}\r
368 mov lr,pc\r
369 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
370 ldmfd sp!,{r3,r12}\r
371 mov z80pc,r0\r
372.endif\r
373.endm\r
374\r
375.macro rebasesp\r
376.if UPDATE_CONTEXT\r
377 str z80pc,[cpucontext,#z80pc_pointer]\r
378.endif\r
379.if DRZ80_FOR_PICODRIVE\r
380 bic r0,r0,#0xfe000\r
381 ldr r1,[cpucontext,#z80sp_base]\r
382 add r0,r1,r0\r
383.else\r
384 stmfd sp!,{r3,r12}\r
385 mov lr,pc\r
386 ldr pc,[cpucontext,#z80_rebaseSP] ;@ external function must rebase sp\r
387 ldmfd sp!,{r3,r12}\r
388.endif\r
389.endm\r
390;@----------------------------------------------------------------------------\r
391\r
392.macro opADC\r
393 movs z80f,z80f,lsr#2 ;@ get C\r
394 subcs r0,r0,#0x100\r
395 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of half carry\r
396 adcs z80a,z80a,r0,ror#8\r
397 mrs r0,cpsr ;@ S,Z,V&C\r
398 eor z80f,z80f,z80a,lsr#24\r
399 and z80f,z80f,#1<<HFlag ;@ H, correct\r
400 orr z80f,z80f,r0,lsr#28\r
401.endm\r
402\r
403.macro opADCA\r
404 movs z80f,z80f,lsr#2 ;@ get C\r
405 orrcs z80a,z80a,#0x00800000\r
406 adds z80a,z80a,z80a\r
407 mrs z80f,cpsr ;@ S,Z,V&C\r
408 mov z80f,z80f,lsr#28\r
409 tst z80a,#0x10000000 ;@ H, correct\r
410 orrne z80f,z80f,#1<<HFlag\r
411 fetch 4\r
412.endm\r
413\r
414.macro opADCH reg\r
415 mov r0,\reg,lsr#24\r
416 opADC\r
417 fetch 4\r
418.endm\r
419\r
420.macro opADCL reg\r
421 movs z80f,z80f,lsr#2 ;@ get C\r
422 adc r0,\reg,\reg,lsr#15\r
423 orrcs z80a,z80a,#0x00800000\r
424 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
425 adds z80a,z80a,r0,lsl#23\r
426 mrs z80f,cpsr ;@ S,Z,V&C\r
427 mov z80f,z80f,lsr#28\r
428 cmn r1,r0,lsl#27\r
429 orrcs z80f,z80f,#1<<HFlag ;@ H, correct\r
430 fetch 4\r
431.endm\r
432\r
433.macro opADCb\r
434 opADC\r
435.endm\r
436;@---------------------------------------\r
437\r
438.macro opADD reg shift\r
439 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
440 adds z80a,z80a,\reg,lsl#\shift\r
441 mrs z80f,cpsr ;@ S,Z,V&C\r
442 mov z80f,z80f,lsr#28\r
443 cmn r1,\reg,lsl#\shift+4\r
444 orrcs z80f,z80f,#1<<HFlag\r
445.endm\r
446\r
447.macro opADDA\r
448 adds z80a,z80a,z80a\r
449 mrs z80f,cpsr ;@ S,Z,V&C\r
450 mov z80f,z80f,lsr#28\r
451 tst z80a,#0x10000000 ;@ H, correct\r
452 orrne z80f,z80f,#1<<HFlag\r
453 fetch 4\r
454.endm\r
455\r
456.macro opADDH reg\r
457 and r0,\reg,#0xFF000000\r
458 opADD r0 0\r
459 fetch 4\r
460.endm\r
461\r
462.macro opADDL reg\r
463 opADD \reg 8\r
464 fetch 4\r
465.endm\r
466\r
467.macro opADDb \r
468 opADD r0 24\r
469.endm\r
470;@---------------------------------------\r
471\r
472.macro opADC16 reg\r
473 movs z80f,z80f,lsr#2 ;@ get C\r
474 adc r0,z80a,\reg,lsr#15\r
475 orrcs z80hl,z80hl,#0x00008000\r
476 mov r1,z80hl,lsl#4\r
477 adds z80hl,z80hl,r0,lsl#15\r
478 mrs z80f,cpsr ;@ S, Z, V & C\r
479 mov z80f,z80f,lsr#28\r
480 cmn r1,r0,lsl#19\r
481 orrcs z80f,z80f,#1<<HFlag\r
482 fetch 15\r
483.endm\r
484\r
485.macro opADC16HL\r
486 movs z80f,z80f,lsr#2 ;@ get C\r
487 orrcs z80hl,z80hl,#0x00008000\r
488 adds z80hl,z80hl,z80hl\r
489 mrs z80f,cpsr ;@ S, Z, V & C\r
490 mov z80f,z80f,lsr#28\r
491 tst z80hl,#0x10000000 ;@ H, correct.\r
492 orrne z80f,z80f,#1<<HFlag\r
493 fetch 15\r
494.endm\r
495\r
496.macro opADD16 reg1 reg2\r
497 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
498 adds \reg1,\reg1,\reg2\r
499 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
500 orrcs z80f,z80f,#1<<CFlag\r
501 cmn r1,\reg2,lsl#4\r
502 orrcs z80f,z80f,#1<<HFlag\r
503.endm\r
504\r
505.macro opADD16s reg1 reg2 shift\r
506 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
507 adds \reg1,\reg1,\reg2,lsl#\shift\r
508 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
509 orrcs z80f,z80f,#1<<CFlag\r
510 cmn r1,\reg2,lsl#4+\shift\r
511 orrcs z80f,z80f,#1<<HFlag\r
512.endm\r
513\r
514.macro opADD16_2 reg\r
515 adds \reg,\reg,\reg\r
516 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
517 orrcs z80f,z80f,#1<<CFlag\r
518 tst \reg,#0x10000000 ;@ H, correct.\r
519 orrne z80f,z80f,#1<<HFlag\r
520.endm\r
521;@---------------------------------------\r
522\r
523.macro opAND reg shift\r
524 and z80a,z80a,\reg,lsl#\shift\r
525 sub r0,opcodes,#0x100\r
526 ldrb z80f,[r0,z80a, lsr #24]\r
527 orr z80f,z80f,#1<<HFlag\r
528.endm\r
529\r
530.macro opANDA\r
531 sub r0,opcodes,#0x100\r
532 ldrb z80f,[r0,z80a, lsr #24]\r
533 orr z80f,z80f,#1<<HFlag\r
534 fetch 4\r
535.endm\r
536\r
537.macro opANDH reg\r
538 opAND \reg 0\r
539 fetch 4\r
540.endm\r
541\r
542.macro opANDL reg\r
543 opAND \reg 8\r
544 fetch 4\r
545.endm\r
546\r
547.macro opANDb\r
548 opAND r0 24\r
549.endm\r
550;@---------------------------------------\r
551\r
552.macro opBITH reg bit\r
553 and z80f,z80f,#1<<CFlag\r
554 tst \reg,#1<<(24+\bit)\r
555 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
556 orrne z80f,z80f,#(1<<HFlag)\r
557 fetch 8\r
558.endm\r
559\r
560.macro opBIT7H reg\r
561 and z80f,z80f,#1<<CFlag\r
562 tst \reg,#1<<(24+7)\r
563 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
564 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
565 fetch 8\r
566.endm\r
567\r
568.macro opBITL reg bit\r
569 and z80f,z80f,#1<<CFlag\r
570 tst \reg,#1<<(16+\bit)\r
571 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
572 orrne z80f,z80f,#(1<<HFlag)\r
573 fetch 8\r
574.endm\r
575\r
576.macro opBIT7L reg\r
577 and z80f,z80f,#1<<CFlag\r
578 tst \reg,#1<<(16+7)\r
579 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
580 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
581 fetch 8\r
582.endm\r
583\r
584.macro opBITb bit\r
585 and z80f,z80f,#1<<CFlag\r
586 tst r0,#1<<\bit\r
587 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
588 orrne z80f,z80f,#(1<<HFlag)\r
589.endm\r
590\r
591.macro opBIT7b\r
592 and z80f,z80f,#1<<CFlag\r
593 tst r0,#1<<7\r
594 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
595 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
596.endm\r
597;@---------------------------------------\r
598\r
599.macro opCP reg shift\r
600 mov r1,z80a,lsl#4 ;@ prepare for check of half carry\r
601 cmp z80a,\reg,lsl#\shift\r
602 mrs z80f,cpsr\r
603 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
604 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
605 cmp r1,\reg,lsl#\shift+4\r
606 orrcc z80f,z80f,#1<<HFlag\r
607.endm\r
608\r
609.macro opCPA\r
610 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
611 fetch 4\r
612.endm\r
613\r
614.macro opCPH reg\r
615 and r0,\reg,#0xFF000000\r
616 opCP r0 0\r
617 fetch 4\r
618.endm\r
619\r
620.macro opCPL reg\r
621 opCP \reg 8\r
622 fetch 4\r
623.endm\r
624\r
625.macro opCPb\r
626 opCP r0 24\r
627.endm\r
628;@---------------------------------------\r
629\r
630.macro opDEC8 reg ;@for A and memory\r
631 and z80f,z80f,#1<<CFlag ;@save carry\r
632 orr z80f,z80f,#1<<NFlag ;@set n\r
633 tst \reg,#0x0f000000\r
634 orreq z80f,z80f,#1<<HFlag\r
635 subs \reg,\reg,#0x01000000\r
636 orrmi z80f,z80f,#1<<SFlag\r
637 orrvs z80f,z80f,#1<<VFlag\r
638 orreq z80f,z80f,#1<<ZFlag\r
639.endm\r
640\r
641.macro opDEC8H reg ;@for B, D & H\r
642 and z80f,z80f,#1<<CFlag ;@save carry\r
643 orr z80f,z80f,#1<<NFlag ;@set n\r
644 tst \reg,#0x0f000000\r
645 orreq z80f,z80f,#1<<HFlag\r
646 subs \reg,\reg,#0x01000000\r
647 orrmi z80f,z80f,#1<<SFlag\r
648 orrvs z80f,z80f,#1<<VFlag\r
649 tst \reg,#0xff000000 ;@Z\r
650 orreq z80f,z80f,#1<<ZFlag\r
651.endm\r
652\r
653.macro opDEC8L reg ;@for C, E & L\r
654 mov \reg,\reg,ror#24\r
655 opDEC8H \reg\r
656 mov \reg,\reg,ror#8\r
657.endm\r
658\r
659.macro opDEC8b ;@for memory\r
660 mov r0,r0,lsl#24\r
661 opDEC8 r0\r
662 mov r0,r0,lsr#24\r
663.endm\r
664;@---------------------------------------\r
665\r
666.macro opIN\r
667 stmfd sp!,{r3,r12}\r
668 mov lr,pc\r
669 ldr pc,[cpucontext,#z80_in] ;@ r0=port - data returned in r0\r
670 ldmfd sp!,{r3,r12}\r
671.endm\r
672\r
673.macro opIN_C\r
674 mov r0,z80bc, lsr #16\r
675 opIN\r
676.endm\r
677;@---------------------------------------\r
678\r
679.macro opINC8 reg ;@for A and memory\r
680 and z80f,z80f,#1<<CFlag ;@save carry, clear n\r
681 adds \reg,\reg,#0x01000000\r
682 orrmi z80f,z80f,#1<<SFlag\r
683 orrvs z80f,z80f,#1<<VFlag\r
684 orrcs z80f,z80f,#1<<ZFlag ;@cs when going from 0xFF to 0x00\r
685 tst \reg,#0x0f000000\r
686 orreq z80f,z80f,#1<<HFlag\r
687.endm\r
688\r
689.macro opINC8H reg ;@for B, D & H\r
690 opINC8 \reg\r
691.endm\r
692\r
693.macro opINC8L reg ;@for C, E & L\r
694 mov \reg,\reg,ror#24\r
695 opINC8 \reg\r
696 mov \reg,\reg,ror#8\r
697.endm\r
698\r
699.macro opINC8b ;@for memory\r
700 mov r0,r0,lsl#24\r
701 opINC8 r0\r
702 mov r0,r0,lsr#24\r
703.endm\r
704;@---------------------------------------\r
705\r
706.macro opOR reg shift\r
707 orr z80a,z80a,\reg,lsl#\shift\r
708 sub r0,opcodes,#0x100\r
709 ldrb z80f,[r0,z80a, lsr #24]\r
710.endm\r
711\r
712.macro opORA\r
713 sub r0,opcodes,#0x100\r
714 ldrb z80f,[r0,z80a, lsr #24]\r
715 fetch 4\r
716.endm\r
717\r
718.macro opORH reg\r
719 and r0,\reg,#0xFF000000\r
720 opOR r0 0\r
721 fetch 4\r
722.endm\r
723\r
724.macro opORL reg\r
725 opOR \reg 8\r
726 fetch 4\r
727.endm\r
728\r
729.macro opORb\r
730 opOR r0 24\r
731.endm\r
732;@---------------------------------------\r
733\r
734.macro opOUT\r
735 stmfd sp!,{r3,r12}\r
736 mov lr,pc\r
737 ldr pc,[cpucontext,#z80_out] ;@ r0=port r1=data\r
738 ldmfd sp!,{r3,r12}\r
739.endm\r
740\r
741.macro opOUT_C\r
742 mov r0,z80bc, lsr #16\r
743 opOUT\r
744.endm\r
745;@---------------------------------------\r
746\r
747.macro opPOP\r
748.if FAST_Z80SP\r
749.if DRZ80_FOR_PICODRIVE\r
750 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
751 ldr r2,[cpucontext,#z80sp_base]\r
752 ldrb r0,[z80sp],#1\r
753 add r2,r2,#0x2000\r
754 cmp z80sp,r2\r
755@ subge z80sp,z80sp,#0x2000 @ unstable?\r
756 ldrb r1,[z80sp],#1\r
757 cmp z80sp,r2\r
758@ subge z80sp,z80sp,#0x2000\r
759 orr r0,r0,r1, lsl #8\r
760.else\r
761 ldrb r0,[z80sp],#1\r
762 ldrb r1,[z80sp],#1\r
763 orr r0,r0,r1, lsl #8\r
764.endif\r
765.else\r
766 mov r0,z80sp\r
767 readmem16\r
768 add z80sp,z80sp,#2\r
769.endif\r
770.endm\r
771\r
772.macro opPOPreg reg\r
773 opPOP\r
774 mov \reg,r0, lsl #16\r
775 fetch 10\r
776.endm\r
777;@---------------------------------------\r
778\r
779.macro opPUSHareg reg @ reg > r1\r
780.if FAST_Z80SP\r
781.if DRZ80_FOR_PICODRIVE\r
782 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
783 ldr r0,[cpucontext,#z80sp_base]\r
784 cmp z80sp,r0\r
785 addle z80sp,z80sp,#0x2000\r
786 mov r1,\reg, lsr #8\r
787 strb r1,[z80sp,#-1]!\r
788 cmp z80sp,r0\r
789 addle z80sp,z80sp,#0x2000\r
790 strb \reg,[z80sp,#-1]!\r
791.else\r
792 mov r1,\reg, lsr #8\r
793 strb r1,[z80sp,#-1]!\r
794 strb \reg,[z80sp,#-1]!\r
795.endif\r
796.else\r
797 mov r0,\reg\r
798 sub z80sp,z80sp,#2\r
799 mov r1,z80sp\r
800 writemem16\r
801.endif\r
802.endm\r
803\r
804.macro opPUSHreg reg\r
805.if FAST_Z80SP\r
806.if DRZ80_FOR_PICODRIVE\r
807 ldr r0,[cpucontext,#z80sp_base]\r
808 cmp z80sp,r0\r
809 addle z80sp,z80sp,#0x2000\r
810 mov r1,\reg, lsr #24\r
811 strb r1,[z80sp,#-1]!\r
812 cmp z80sp,r0\r
813 addle z80sp,z80sp,#0x2000\r
814 mov r1,\reg, lsr #16\r
815 strb r1,[z80sp,#-1]!\r
816.else\r
817 mov r1,\reg, lsr #24\r
818 strb r1,[z80sp,#-1]!\r
819 mov r1,\reg, lsr #16\r
820 strb r1,[z80sp,#-1]!\r
821.endif\r
822.else\r
823 mov r0,\reg,lsr #16\r
824 sub z80sp,z80sp,#2\r
825 mov r1,z80sp\r
826 writemem16\r
827.endif\r
828.endm\r
829;@---------------------------------------\r
830\r
831.macro opRESmemHL bit\r
832.if DRZ80_FOR_PICODRIVE\r
833 mov r0,z80hl, lsr #16\r
834 bl pico_z80_read8\r
835 bic r0,r0,#1<<\bit\r
836 mov r1,z80hl, lsr #16\r
837 bl pico_z80_write8\r
838.else\r
839 mov r0,z80hl, lsr #16\r
840 stmfd sp!,{r3,r12}\r
841 mov lr,pc\r
842 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
843 bic r0,r0,#1<<\bit\r
844 mov r1,z80hl, lsr #16\r
845 mov lr,pc\r
846 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
847 ldmfd sp!,{r3,r12}\r
848.endif\r
849 fetch 15\r
850.endm\r
851;@---------------------------------------\r
852\r
853.macro opRESmem bit\r
854.if DRZ80_FOR_PICODRIVE\r
855 stmfd sp!,{r0} ;@ save addr as well\r
856 bl pico_z80_read8\r
857 bic r0,r0,#1<<\bit\r
858 ldmfd sp!,{r1} ;@ restore addr into r1\r
859 bl pico_z80_write8\r
860.else\r
861 stmfd sp!,{r3,r12}\r
862 stmfd sp!,{r0} ;@ save addr as well\r
863 mov lr,pc\r
864 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
865 bic r0,r0,#1<<\bit\r
866 ldmfd sp!,{r1} ;@ restore addr into r1\r
867 mov lr,pc\r
868 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
869 ldmfd sp!,{r3,r12}\r
870.endif\r
871 fetch 23\r
872.endm\r
873;@---------------------------------------\r
874\r
875.macro opRL reg1 reg2 shift\r
876 movs \reg1,\reg2,lsl \shift\r
877 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
878 orrne \reg1,\reg1,#0x01000000\r
879;@ and r2,z80f,#1<<CFlag\r
880;@ orr $x,$x,r2,lsl#23\r
881 sub r1,opcodes,#0x100\r
882 ldrb z80f,[r1,\reg1,lsr#24] ;@get PZS\r
883 orrcs z80f,z80f,#1<<CFlag\r
884.endm\r
885\r
886.macro opRLA\r
887 opRL z80a, z80a, #1\r
888 fetch 8\r
889.endm\r
890\r
891.macro opRLH reg\r
892 and r0,\reg,#0xFF000000 ;@mask high to r0\r
893 adds \reg,\reg,r0\r
894 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
895 orrne \reg,\reg,#0x01000000\r
896 sub r1,opcodes,#0x100\r
897 ldrb z80f,[r1,\reg,lsr#24] ;@get PZS\r
898 orrcs z80f,z80f,#1<<CFlag\r
899 fetch 8\r
900.endm\r
901\r
902.macro opRLL reg\r
903 opRL r0, \reg, #9\r
904 and \reg,\reg,#0xFF000000 ;@mask out high\r
905 orr \reg,\reg,r0,lsr#8\r
906 fetch 8\r
907.endm\r
908\r
909.macro opRLb\r
910 opRL r0, r0, #25\r
911 mov r0,r0,lsr#24\r
912.endm\r
913;@---------------------------------------\r
914\r
915.macro opRLC reg1 reg2 shift\r
916 movs \reg1,\reg2,lsl#\shift\r
917 orrcs \reg1,\reg1,#0x01000000\r
918 sub r1,opcodes,#0x100\r
919 ldrb z80f,[r1,\reg1,lsr#24]\r
920 orrcs z80f,z80f,#1<<CFlag\r
921.endm\r
922\r
923.macro opRLCA\r
924 opRLC z80a, z80a, 1\r
925 fetch 8\r
926.endm\r
927\r
928.macro opRLCH reg\r
929 and r0,\reg,#0xFF000000 ;@mask high to r0\r
930 adds \reg,\reg,r0\r
931 orrcs \reg,\reg,#0x01000000\r
932 sub r1,opcodes,#0x100\r
933 ldrb z80f,[r1,\reg,lsr#24]\r
934 orrcs z80f,z80f,#1<<CFlag\r
935 fetch 8\r
936.endm\r
937\r
938.macro opRLCL reg\r
939 opRLC r0, \reg, 9\r
940 and \reg,\reg,#0xFF000000 ;@mask out high\r
941 orr \reg,\reg,r0,lsr#8\r
942 fetch 8\r
943.endm\r
944\r
945.macro opRLCb\r
946 opRLC r0, r0, 25\r
947 mov r0,r0,lsr#24\r
948.endm\r
949;@---------------------------------------\r
950\r
951.macro opRR reg1 reg2 shift\r
952 movs \reg1,\reg2,lsr#\shift\r
953 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
954 orrne \reg1,\reg1,#0x00000080\r
955;@ and r2,z80_f,#PSR_C\r
956;@ orr \reg1,\reg1,r2,lsl#6\r
957 sub r1,opcodes,#0x100\r
958 ldrb z80f,[r1,\reg1]\r
959 orrcs z80f,z80f,#1<<CFlag\r
960.endm\r
961\r
962.macro opRRA\r
963 orr z80a,z80a,z80f,lsr#1 ;@get C\r
964 movs z80a,z80a,ror#25\r
965 mov z80a,z80a,lsl#24\r
966 sub r1,opcodes,#0x100\r
967 ldrb z80f,[r1,z80a,lsr#24]\r
968 orrcs z80f,z80f,#1<<CFlag\r
969 fetch 8\r
970.endm\r
971\r
972.macro opRRH reg\r
973 orr r0,\reg,z80f,lsr#1 ;@get C\r
974 movs r0,r0,ror#25\r
975 and \reg,\reg,#0x00FF0000 ;@mask out low\r
976 orr \reg,\reg,r0,lsl#24\r
977 sub r1,opcodes,#0x100\r
978 ldrb z80f,[r1,\reg,lsr#24]\r
979 orrcs z80f,z80f,#1<<CFlag\r
980 fetch 8\r
981.endm\r
982\r
983.macro opRRL reg\r
984 and r0,\reg,#0x00FF0000 ;@mask out low to r0\r
985 opRR r0 r0 17\r
986 and \reg,\reg,#0xFF000000 ;@mask out high\r
987 orr \reg,\reg,r0,lsl#16\r
988 fetch 8\r
989.endm\r
990\r
991.macro opRRb\r
992 opRR r0 r0 1\r
993.endm\r
994;@---------------------------------------\r
995\r
996.macro opRRC reg1 reg2 shift\r
997 movs \reg1,\reg2,lsr#\shift\r
998 orrcs \reg1,\reg1,#0x00000080\r
999 sub r1,opcodes,#0x100\r
1000 ldrb z80f,[r1,\reg1]\r
1001 orrcs z80f,z80f,#1<<CFlag\r
1002.endm\r
1003\r
1004.macro opRRCA\r
1005 opRRC z80a, z80a, 25\r
1006 mov z80a,z80a,lsl#24\r
1007 fetch 8\r
1008.endm\r
1009\r
1010.macro opRRCH reg\r
1011 opRRC r0, \reg, 25\r
1012 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1013 orr \reg,\reg,r0,lsl#24\r
1014 fetch 8\r
1015.endm\r
1016\r
1017.macro opRRCL reg\r
1018 and r0,\reg,#0x00FF0000 ;@mask low to r0\r
1019 opRRC r0, r0, 17\r
1020 and \reg,\reg,#0xFF000000 ;@mask out high\r
1021 orr \reg,\reg,r0,lsl#16\r
1022 fetch 8\r
1023.endm\r
1024\r
1025.macro opRRCb\r
1026 opRRC r0, r0, 1\r
1027.endm\r
1028;@---------------------------------------\r
1029\r
1030.macro opRST addr\r
1031 ldr r0,[cpucontext,#z80pc_base]\r
1032 sub r2,z80pc,r0\r
1033 opPUSHareg r2\r
1034 mov r0,#\addr\r
1035 rebasepc\r
1036 fetch 11\r
1037.endm\r
1038;@---------------------------------------\r
1039\r
1040.macro opSBC\r
1041 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1042 movs z80f,z80f,lsr#2 ;@ get C\r
1043 subcc r0,r0,#0x100\r
1044 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of H\r
1045 sbcs z80a,z80a,r0,ror#8\r
1046 mrs r0,cpsr\r
1047 eor z80f,z80f,z80a,lsr#24\r
1048 and z80f,z80f,#1<<HFlag ;@ H, correct\r
1049 orr z80f,z80f,r0,lsr#28 ;@ S,Z,V&C\r
1050 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1051.endm\r
1052\r
1053.macro opSBCA\r
1054 movs z80f,z80f,lsr#2 ;@ get C\r
1055 movcc z80a,#0x00000000\r
1056 movcs z80a,#0xFF000000\r
1057 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1058 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1059 fetch 4\r
1060.endm\r
1061\r
1062.macro opSBCH reg\r
1063 mov r0,\reg,lsr#24\r
1064 opSBC\r
1065 fetch 4\r
1066.endm\r
1067\r
1068.macro opSBCL reg\r
1069 mov r0,\reg,lsl#8\r
1070 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1071 movs z80f,z80f,lsr#2 ;@ get C\r
1072 sbccc r0,r0,#0xFF000000\r
1073 mov r1,z80a,lsl#4 ;@ prepare for check of H\r
1074 sbcs z80a,z80a,r0\r
1075 mrs z80f,cpsr\r
1076 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1077 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1078 cmp r1,r0,lsl#4\r
1079 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1080 fetch 4\r
1081.endm\r
1082\r
1083.macro opSBCb\r
1084 opSBC\r
1085.endm\r
1086;@---------------------------------------\r
1087\r
1088.macro opSBC16 reg\r
1089 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1090 movs z80f,z80f,lsr#2 ;@ get C\r
1091 sbc r1,r1,r1 ;@ set r1 to -1 or 0.\r
1092 orr r0,\reg,r1,lsr#16\r
1093 mov r1,z80hl,lsl#4 ;@ prepare for check of H\r
1094 sbcs z80hl,z80hl,r0\r
1095 mrs z80f,cpsr\r
1096 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1097 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1098 cmp r1,r0,lsl#4\r
1099 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1100 fetch 15\r
1101.endm\r
1102\r
1103.macro opSBC16HL\r
1104 movs z80f,z80f,lsr#2 ;@ get C\r
1105 mov z80hl,#0x00000000\r
1106 subcs z80hl,z80hl,#0x00010000\r
1107 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1108 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1109 fetch 15\r
1110.endm\r
1111;@---------------------------------------\r
1112\r
1113.macro opSETmemHL bit\r
1114.if DRZ80_FOR_PICODRIVE\r
1115 mov r0,z80hl, lsr #16\r
1116 bl pico_z80_read8\r
1117 orr r0,r0,#1<<\bit\r
1118 mov r1,z80hl, lsr #16\r
1119 bl pico_z80_write8\r
1120.else\r
1121 mov r0,z80hl, lsr #16\r
1122 stmfd sp!,{r3,r12}\r
1123 mov lr,pc\r
1124 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
1125 orr r0,r0,#1<<\bit\r
1126 mov r1,z80hl, lsr #16\r
1127 mov lr,pc\r
1128 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1129 ldmfd sp!,{r3,r12}\r
1130.endif\r
1131 fetch 15\r
1132.endm\r
1133;@---------------------------------------\r
1134\r
1135.macro opSETmem bit\r
1136.if DRZ80_FOR_PICODRIVE\r
1137 stmfd sp!,{r0} ;@ save addr as well\r
1138 bl pico_z80_read8\r
1139 orr r0,r0,#1<<\bit\r
1140 ldmfd sp!,{r1} ;@ restore addr into r1\r
1141 bl pico_z80_write8\r
1142.else\r
1143 stmfd sp!,{r3,r12}\r
1144 stmfd sp!,{r0} ;@ save addr as well\r
1145 mov lr,pc\r
1146 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
1147 orr r0,r0,#1<<\bit\r
1148 ldmfd sp!,{r1} ;@ restore addr into r1\r
1149 mov lr,pc\r
1150 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1151 ldmfd sp!,{r3,r12}\r
1152.endif\r
1153 fetch 23\r
1154.endm\r
1155;@---------------------------------------\r
1156\r
1157.macro opSLA reg1 reg2 shift\r
1158 movs \reg1,\reg2,lsl#\shift\r
1159 sub r1,opcodes,#0x100\r
1160 ldrb z80f,[r1,\reg1,lsr#24]\r
1161 orrcs z80f,z80f,#1<<CFlag\r
1162.endm\r
1163\r
1164.macro opSLAA\r
1165 opSLA z80a, z80a, 1\r
1166 fetch 8\r
1167.endm\r
1168\r
1169.macro opSLAH reg\r
1170 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1171 adds \reg,\reg,r0\r
1172 sub r1,opcodes,#0x100\r
1173 ldrb z80f,[r1,\reg,lsr#24]\r
1174 orrcs z80f,z80f,#1<<CFlag\r
1175 fetch 8\r
1176.endm\r
1177\r
1178.macro opSLAL reg\r
1179 opSLA r0, \reg, 9\r
1180 and \reg,\reg,#0xFF000000 ;@mask out high\r
1181 orr \reg,\reg,r0,lsr#8\r
1182 fetch 8\r
1183.endm\r
1184\r
1185.macro opSLAb\r
1186 opSLA r0, r0, 25\r
1187 mov r0,r0,lsr#24\r
1188.endm\r
1189;@---------------------------------------\r
1190\r
1191.macro opSLL reg1 reg2 shift\r
1192 movs \reg1,\reg2,lsl#\shift\r
1193 orr \reg1,\reg1,#0x01000000\r
1194 sub r1,opcodes,#0x100\r
1195 ldrb z80f,[r1,\reg1,lsr#24]\r
1196 orrcs z80f,z80f,#1<<CFlag\r
1197.endm\r
1198\r
1199.macro opSLLA\r
1200 opSLL z80a, z80a, 1\r
1201 fetch 8\r
1202.endm\r
1203\r
1204.macro opSLLH reg\r
1205 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1206 adds \reg,\reg,r0\r
1207 orr \reg,\reg,#0x01000000\r
1208 sub r1,opcodes,#0x100\r
1209 ldrb z80f,[r1,\reg,lsr#24]\r
1210 orrcs z80f,z80f,#1<<CFlag\r
1211 fetch 8\r
1212.endm\r
1213\r
1214.macro opSLLL reg\r
1215 opSLL r0, \reg, 9\r
1216 and \reg,\reg,#0xFF000000 ;@mask out high\r
1217 orr \reg,\reg,r0,lsr#8\r
1218 fetch 8\r
1219.endm\r
1220\r
1221.macro opSLLb\r
1222 opSLL r0, r0, 25\r
1223 mov r0,r0,lsr#24\r
1224.endm\r
1225;@---------------------------------------\r
1226\r
1227.macro opSRA reg1 reg2\r
1228 movs \reg1,\reg2,asr#25\r
1229 and \reg1,\reg1,#0xFF\r
1230 sub r1,opcodes,#0x100\r
1231 ldrb z80f,[r1,\reg1]\r
1232 orrcs z80f,z80f,#1<<CFlag\r
1233.endm\r
1234\r
1235.macro opSRAA\r
1236 movs r0,z80a,asr#25\r
1237 mov z80a,r0,lsl#24\r
1238 sub r1,opcodes,#0x100\r
1239 ldrb z80f,[r1,z80a,lsr#24]\r
1240 orrcs z80f,z80f,#1<<CFlag\r
1241 fetch 8\r
1242.endm\r
1243\r
1244.macro opSRAH reg\r
1245 movs r0,\reg,asr#25\r
1246 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1247 orr \reg,\reg,r0,lsl#24\r
1248 sub r1,opcodes,#0x100\r
1249 ldrb z80f,[r1,\reg,lsr#24]\r
1250 orrcs z80f,z80f,#1<<CFlag\r
1251 fetch 8\r
1252.endm\r
1253\r
1254.macro opSRAL reg\r
1255 mov r0,\reg,lsl#8\r
1256 opSRA r0, r0\r
1257 and \reg,\reg,#0xFF000000 ;@mask out high\r
1258 orr \reg,\reg,r0,lsl#16\r
1259 fetch 8\r
1260.endm\r
1261\r
1262.macro opSRAb\r
1263 mov r0,r0,lsl#24\r
1264 opSRA r0, r0\r
1265.endm\r
1266;@---------------------------------------\r
1267\r
1268.macro opSRL reg1 reg2 shift\r
1269 movs \reg1,\reg2,lsr#\shift\r
1270 sub r1,opcodes,#0x100\r
1271 ldrb z80f,[r1,\reg1]\r
1272 orrcs z80f,z80f,#1<<CFlag\r
1273.endm\r
1274\r
1275.macro opSRLA\r
1276 opSRL z80a, z80a, 25\r
1277 mov z80a,z80a,lsl#24\r
1278 fetch 8\r
1279.endm\r
1280\r
1281.macro opSRLH reg\r
1282 opSRL r0, \reg, 25\r
1283 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1284 orr \reg,\reg,r0,lsl#24\r
1285 fetch 8\r
1286.endm\r
1287\r
1288.macro opSRLL reg\r
1289 mov r0,\reg,lsl#8\r
1290 opSRL r0, r0, 25\r
1291 and \reg,\reg,#0xFF000000 ;@mask out high\r
1292 orr \reg,\reg,r0,lsl#16\r
1293 fetch 8\r
1294.endm\r
1295\r
1296.macro opSRLb\r
1297 opSRL r0, r0, 1\r
1298.endm\r
1299;@---------------------------------------\r
1300\r
1301.macro opSUB reg shift\r
1302 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
1303 subs z80a,z80a,\reg,lsl#\shift\r
1304 mrs z80f,cpsr\r
1305 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1306 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
1307 cmp r1,\reg,lsl#\shift+4\r
1308 orrcc z80f,z80f,#1<<HFlag\r
1309.endm\r
1310\r
1311.macro opSUBA\r
1312 mov z80a,#0\r
1313 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
1314 fetch 4\r
1315.endm\r
1316\r
1317.macro opSUBH reg\r
1318 and r0,\reg,#0xFF000000\r
1319 opSUB r0, 0\r
1320 fetch 4\r
1321.endm\r
1322\r
1323.macro opSUBL reg\r
1324 opSUB \reg, 8\r
1325 fetch 4\r
1326.endm\r
1327\r
1328.macro opSUBb\r
1329 opSUB r0, 24\r
1330.endm\r
1331;@---------------------------------------\r
1332\r
1333.macro opXOR reg shift\r
1334 eor z80a,z80a,\reg,lsl#\shift\r
1335 sub r0,opcodes,#0x100\r
1336 ldrb z80f,[r0,z80a, lsr #24]\r
1337.endm\r
1338\r
1339.macro opXORA\r
1340 mov z80a,#0\r
1341 mov z80f,#(1<<ZFlag)|(1<<VFlag)\r
1342 fetch 4\r
1343.endm\r
1344\r
1345.macro opXORH reg\r
1346 and r0,\reg,#0xFF000000\r
1347 opXOR r0, 0\r
1348 fetch 4\r
1349.endm\r
1350\r
1351.macro opXORL reg\r
1352 opXOR \reg, 8\r
1353 fetch 4\r
1354.endm\r
1355\r
1356.macro opXORb\r
1357 opXOR r0, 24\r
1358.endm\r
1359;@---------------------------------------\r
1360\r
1361\r
1362;@ --------------------------- Framework --------------------------\r
1363 \r
1364.text\r
1365\r
1366DrZ80Run:\r
1367 ;@ r0 = pointer to cpu context\r
1368 ;@ r1 = ISTATES to execute \r
1369 ;@######################################### \r
1370 stmdb sp!,{r4-r12,lr} ;@ save registers on stack\r
1371 mov cpucontext,r0 ;@ setup main memory pointer\r
1372 mov z80_icount,r1 ;@ setup number of Tstates to execute\r
1373\r
1374.if INTERRUPT_MODE == 0\r
de89bf45 1375 ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
cc68a136 1376.endif\r
1377 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1378\r
1379.if INTERRUPT_MODE == 0\r
1380 ;@ check ints\r
de89bf45 1381 tst r0,#0xff\r
1382 movne r0,r0,lsr #8\r
1383 tstne r0,#1\r
1384 blne DoInterrupt\r
cc68a136 1385.endif\r
1386\r
cc68a136 1387 ldr opcodes,MAIN_opcodes_POINTER2\r
cc68a136 1388\r
de89bf45 1389 cmp z80_icount,#0 ;@ irq might have used all cycles\r
1390 ldrplb r0,[z80pc],#1\r
1391 ldrpl pc,[opcodes,r0, lsl #2]\r
cc68a136 1392\r
1393\r
1394z80_execute_end:\r
1395 ;@ save registers in CPU context\r
1396 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
de89bf45 1397 mov r0,z80_icount\r
cc68a136 1398 ldmia sp!,{r4-r12,pc} ;@ restore registers from stack and return to C code\r
1399\r
de89bf45 1400MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
cc68a136 1401.if INTERRUPT_MODE\r
1402Interrupt_local: .word Interrupt\r
1403.endif\r
1404\r
1405DoInterrupt:\r
1406.if INTERRUPT_MODE\r
1407 ;@ Don't do own int handler, call mames instead\r
1408\r
1409 ;@ save everything back into DrZ80 context\r
1410 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1411 stmfd sp!,{r3,r4,r5,lr} ;@ save rest of regs on stack\r
1412 mov lr,pc\r
1413 ldr pc,Interrupt_local\r
1414 ldmfd sp!,{r3,r4,r5,lr} ;@ load regs from stack\r
1415 ;@ reload regs from DrZ80 context\r
1416 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1417 mov pc,lr ;@ return\r
1418.else\r
de89bf45 1419\r
1420 ;@ r0 == z80if\r
cc68a136 1421 stmfd sp!,{lr}\r
1422\r
1423 tst r0,#4 ;@ check halt\r
1424 addne z80pc,z80pc,#1\r
1425\r
1426 ldrb r1,[cpucontext,#z80im]\r
1427\r
1428 ;@ clear halt and int flags\r
1429 eor r0,r0,r0\r
1430 strb r0,[cpucontext,#z80if]\r
1431\r
1432 ;@ now check int mode\r
de89bf45 1433 cmp r1,#1\r
1434 beq DoInterrupt_mode1\r
1435 bgt DoInterrupt_mode2\r
cc68a136 1436\r
1437DoInterrupt_mode0:\r
1438 ;@ get 3 byte vector\r
1439 ldr r2,[cpucontext, #z80irqvector]\r
1440 and r1,r2,#0xFF0000\r
1441 cmp r1,#0xCD0000 ;@ call\r
1442 bne 1f\r
1443 ;@ ########\r
1444 ;@ # call\r
1445 ;@ ########\r
1446 ;@ save current pc on stack\r
1447 ldr r0,[cpucontext,#z80pc_base]\r
1448 sub r0,z80pc,r0\r
1449.if FAST_Z80SP\r
1450 mov r1,r0, lsr #8\r
1451 strb r1,[z80sp,#-1]!\r
1452 strb r0,[z80sp,#-1]!\r
1453.else\r
1454 sub z80sp,z80sp,#2\r
1455 mov r1,z80sp\r
1456 writemem16\r
1457 ldr r2,[cpucontext, #z80irqvector]\r
1458.endif\r
1459 ;@ jump to vector\r
1460 mov r2,r2,lsl#16\r
1461 mov r0,r2,lsr#16\r
1462 ;@ rebase new pc\r
1463 rebasepc\r
1464\r
de89bf45 1465 eatcycles 13\r
cc68a136 1466 b DoInterrupt_end\r
1467\r
14681:\r
1469 cmp r1,#0xC30000 ;@ jump\r
1470 bne DoInterrupt_mode1 ;@ rst\r
1471 ;@ #######\r
1472 ;@ # jump\r
1473 ;@ #######\r
1474 ;@ jump to vector\r
1475 mov r2,r2,lsl#16\r
1476 mov r0,r2,lsr#16\r
1477 ;@ rebase new pc\r
1478 rebasepc\r
1479\r
de89bf45 1480 eatcycles 13\r
cc68a136 1481 b DoInterrupt_end\r
1482\r
1483DoInterrupt_mode1:\r
1484 ldr r0,[cpucontext,#z80pc_base]\r
1485 sub r2,z80pc,r0\r
1486 opPUSHareg r2\r
1487 mov r0,#0x38\r
1488 rebasepc\r
1489\r
de89bf45 1490 eatcycles 13\r
cc68a136 1491 b DoInterrupt_end\r
1492\r
1493DoInterrupt_mode2:\r
1494 ;@ push pc on stack\r
1495 ldr r0,[cpucontext,#z80pc_base]\r
1496 sub r2,z80pc,r0\r
1497 opPUSHareg r2\r
1498\r
1499 ;@ get 1 byte vector address\r
1500 ldrb r0,[cpucontext, #z80irqvector]\r
1501 ldr r1,[cpucontext, #z80i]\r
1502 orr r0,r0,r1,lsr#16\r
1503\r
1504 ;@ read new pc from vector address\r
1505.if DRZ80_FOR_PICODRIVE\r
1506 bl pico_z80_read16\r
1507 bic r0,r0,#0xfe000\r
1508 ldr r1,[cpucontext,#z80pc_base]\r
1509 add z80pc,r1,r0\r
1510.if UPDATE_CONTEXT\r
1511 str z80pc,[cpucontext,#z80pc_pointer]\r
1512.endif\r
1513.else\r
1514 stmfd sp!,{r3,r12}\r
1515 mov lr,pc\r
1516 ldr pc,[cpucontext,#z80_read16]\r
1517\r
1518 ;@ rebase new pc\r
1519.if UPDATE_CONTEXT\r
1520 str z80pc,[cpucontext,#z80pc_pointer]\r
1521.endif\r
1522 mov lr,pc\r
1523 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
1524 ldmfd sp!,{r3,r12}\r
1525 mov z80pc,r0 \r
1526.endif\r
de89bf45 1527 eatcycles 17\r
cc68a136 1528\r
1529DoInterrupt_end:\r
1530 ;@ interupt accepted so callback irq interface\r
1531 ldr r0,[cpucontext, #z80irqcallback]\r
1532 tst r0,r0\r
de89bf45 1533 streqb r0,[cpucontext,#z80irq] ;@ default handling\r
cc68a136 1534 ldmeqfd sp!,{pc}\r
1535 stmfd sp!,{r3,r12}\r
1536 mov lr,pc\r
1537 mov pc,r0 ;@ call callback function\r
1538 ldmfd sp!,{r3,r12}\r
1539 ldmfd sp!,{pc} ;@ return\r
cc68a136 1540.endif\r
1541\r
1542.data\r
1543.align 4\r
1544\r
1545DAATable: .hword (0x00<<8)|(1<<ZFlag)|(1<<VFlag)\r
1546 .hword (0x01<<8) \r
1547 .hword (0x02<<8) \r
1548 .hword (0x03<<8) |(1<<VFlag)\r
1549 .hword (0x04<<8) \r
1550 .hword (0x05<<8) |(1<<VFlag)\r
1551 .hword (0x06<<8) |(1<<VFlag)\r
1552 .hword (0x07<<8) \r
1553 .hword (0x08<<8) \r
1554 .hword (0x09<<8) |(1<<VFlag)\r
1555 .hword (0x10<<8) |(1<<HFlag) \r
1556 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
1557 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
1558 .hword (0x13<<8) |(1<<HFlag) \r
1559 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
1560 .hword (0x15<<8) |(1<<HFlag) \r
1561 .hword (0x10<<8) \r
1562 .hword (0x11<<8) |(1<<VFlag)\r
1563 .hword (0x12<<8) |(1<<VFlag)\r
1564 .hword (0x13<<8) \r
1565 .hword (0x14<<8) |(1<<VFlag)\r
1566 .hword (0x15<<8) \r
1567 .hword (0x16<<8) \r
1568 .hword (0x17<<8) |(1<<VFlag)\r
1569 .hword (0x18<<8) |(1<<VFlag)\r
1570 .hword (0x19<<8) \r
1571 .hword (0x20<<8) |(1<<HFlag) \r
1572 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
1573 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
1574 .hword (0x23<<8) |(1<<HFlag) \r
1575 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
1576 .hword (0x25<<8) |(1<<HFlag) \r
1577 .hword (0x20<<8) \r
1578 .hword (0x21<<8) |(1<<VFlag)\r
1579 .hword (0x22<<8) |(1<<VFlag)\r
1580 .hword (0x23<<8) \r
1581 .hword (0x24<<8) |(1<<VFlag)\r
1582 .hword (0x25<<8) \r
1583 .hword (0x26<<8) \r
1584 .hword (0x27<<8) |(1<<VFlag)\r
1585 .hword (0x28<<8) |(1<<VFlag)\r
1586 .hword (0x29<<8) \r
1587 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
1588 .hword (0x31<<8) |(1<<HFlag) \r
1589 .hword (0x32<<8) |(1<<HFlag) \r
1590 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
1591 .hword (0x34<<8) |(1<<HFlag) \r
1592 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
1593 .hword (0x30<<8) |(1<<VFlag)\r
1594 .hword (0x31<<8) \r
1595 .hword (0x32<<8) \r
1596 .hword (0x33<<8) |(1<<VFlag)\r
1597 .hword (0x34<<8) \r
1598 .hword (0x35<<8) |(1<<VFlag)\r
1599 .hword (0x36<<8) |(1<<VFlag)\r
1600 .hword (0x37<<8) \r
1601 .hword (0x38<<8) \r
1602 .hword (0x39<<8) |(1<<VFlag)\r
1603 .hword (0x40<<8) |(1<<HFlag) \r
1604 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
1605 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
1606 .hword (0x43<<8) |(1<<HFlag) \r
1607 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
1608 .hword (0x45<<8) |(1<<HFlag) \r
1609 .hword (0x40<<8) \r
1610 .hword (0x41<<8) |(1<<VFlag)\r
1611 .hword (0x42<<8) |(1<<VFlag)\r
1612 .hword (0x43<<8) \r
1613 .hword (0x44<<8) |(1<<VFlag)\r
1614 .hword (0x45<<8) \r
1615 .hword (0x46<<8) \r
1616 .hword (0x47<<8) |(1<<VFlag)\r
1617 .hword (0x48<<8) |(1<<VFlag)\r
1618 .hword (0x49<<8) \r
1619 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
1620 .hword (0x51<<8) |(1<<HFlag) \r
1621 .hword (0x52<<8) |(1<<HFlag) \r
1622 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
1623 .hword (0x54<<8) |(1<<HFlag) \r
1624 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
1625 .hword (0x50<<8) |(1<<VFlag)\r
1626 .hword (0x51<<8) \r
1627 .hword (0x52<<8) \r
1628 .hword (0x53<<8) |(1<<VFlag)\r
1629 .hword (0x54<<8) \r
1630 .hword (0x55<<8) |(1<<VFlag)\r
1631 .hword (0x56<<8) |(1<<VFlag)\r
1632 .hword (0x57<<8) \r
1633 .hword (0x58<<8) \r
1634 .hword (0x59<<8) |(1<<VFlag)\r
1635 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
1636 .hword (0x61<<8) |(1<<HFlag) \r
1637 .hword (0x62<<8) |(1<<HFlag) \r
1638 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
1639 .hword (0x64<<8) |(1<<HFlag) \r
1640 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
1641 .hword (0x60<<8) |(1<<VFlag)\r
1642 .hword (0x61<<8) \r
1643 .hword (0x62<<8) \r
1644 .hword (0x63<<8) |(1<<VFlag)\r
1645 .hword (0x64<<8) \r
1646 .hword (0x65<<8) |(1<<VFlag)\r
1647 .hword (0x66<<8) |(1<<VFlag)\r
1648 .hword (0x67<<8) \r
1649 .hword (0x68<<8) \r
1650 .hword (0x69<<8) |(1<<VFlag)\r
1651 .hword (0x70<<8) |(1<<HFlag) \r
1652 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
1653 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
1654 .hword (0x73<<8) |(1<<HFlag) \r
1655 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
1656 .hword (0x75<<8) |(1<<HFlag) \r
1657 .hword (0x70<<8) \r
1658 .hword (0x71<<8) |(1<<VFlag)\r
1659 .hword (0x72<<8) |(1<<VFlag)\r
1660 .hword (0x73<<8) \r
1661 .hword (0x74<<8) |(1<<VFlag)\r
1662 .hword (0x75<<8) \r
1663 .hword (0x76<<8) \r
1664 .hword (0x77<<8) |(1<<VFlag)\r
1665 .hword (0x78<<8) |(1<<VFlag)\r
1666 .hword (0x79<<8) \r
1667 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
1668 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1669 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1670 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
1671 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1672 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
1673 .hword (0x80<<8)|(1<<SFlag) \r
1674 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)\r
1675 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)\r
1676 .hword (0x83<<8)|(1<<SFlag) \r
1677 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)\r
1678 .hword (0x85<<8)|(1<<SFlag) \r
1679 .hword (0x86<<8)|(1<<SFlag) \r
1680 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
1681 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
1682 .hword (0x89<<8)|(1<<SFlag) \r
1683 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1684 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
1685 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
1686 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1687 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
1688 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1689 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)\r
1690 .hword (0x91<<8)|(1<<SFlag) \r
1691 .hword (0x92<<8)|(1<<SFlag) \r
1692 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)\r
1693 .hword (0x94<<8)|(1<<SFlag) \r
1694 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)\r
1695 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
1696 .hword (0x97<<8)|(1<<SFlag) \r
1697 .hword (0x98<<8)|(1<<SFlag) \r
1698 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
1699 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1700 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1701 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1702 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1703 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1704 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1705 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1706 .hword (0x01<<8) |(1<<CFlag)\r
1707 .hword (0x02<<8) |(1<<CFlag)\r
1708 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1709 .hword (0x04<<8) |(1<<CFlag)\r
1710 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1711 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1712 .hword (0x07<<8) |(1<<CFlag)\r
1713 .hword (0x08<<8) |(1<<CFlag)\r
1714 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1715 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1716 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1717 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1718 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1719 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1720 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1721 .hword (0x10<<8) |(1<<CFlag)\r
1722 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1723 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1724 .hword (0x13<<8) |(1<<CFlag)\r
1725 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1726 .hword (0x15<<8) |(1<<CFlag)\r
1727 .hword (0x16<<8) |(1<<CFlag)\r
1728 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1729 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1730 .hword (0x19<<8) |(1<<CFlag)\r
1731 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1732 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1733 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1734 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1735 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1736 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1737 .hword (0x20<<8) |(1<<CFlag)\r
1738 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1739 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1740 .hword (0x23<<8) |(1<<CFlag)\r
1741 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1742 .hword (0x25<<8) |(1<<CFlag)\r
1743 .hword (0x26<<8) |(1<<CFlag)\r
1744 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1745 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1746 .hword (0x29<<8) |(1<<CFlag)\r
1747 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1748 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1749 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1750 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1751 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
1752 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1753 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
1754 .hword (0x31<<8) |(1<<CFlag)\r
1755 .hword (0x32<<8) |(1<<CFlag)\r
1756 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
1757 .hword (0x34<<8) |(1<<CFlag)\r
1758 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
1759 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
1760 .hword (0x37<<8) |(1<<CFlag)\r
1761 .hword (0x38<<8) |(1<<CFlag)\r
1762 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
1763 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
1764 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1765 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1766 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
1767 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1768 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
1769 .hword (0x40<<8) |(1<<CFlag)\r
1770 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
1771 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
1772 .hword (0x43<<8) |(1<<CFlag)\r
1773 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
1774 .hword (0x45<<8) |(1<<CFlag)\r
1775 .hword (0x46<<8) |(1<<CFlag)\r
1776 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
1777 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
1778 .hword (0x49<<8) |(1<<CFlag)\r
1779 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1780 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
1781 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
1782 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1783 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
1784 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1785 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
1786 .hword (0x51<<8) |(1<<CFlag)\r
1787 .hword (0x52<<8) |(1<<CFlag)\r
1788 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
1789 .hword (0x54<<8) |(1<<CFlag)\r
1790 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
1791 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
1792 .hword (0x57<<8) |(1<<CFlag)\r
1793 .hword (0x58<<8) |(1<<CFlag)\r
1794 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
1795 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1796 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
1797 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
1798 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1799 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
1800 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1801 .hword (0x60<<8) |(1<<VFlag) |(1<<CFlag)\r
1802 .hword (0x61<<8) |(1<<CFlag)\r
1803 .hword (0x62<<8) |(1<<CFlag)\r
1804 .hword (0x63<<8) |(1<<VFlag) |(1<<CFlag)\r
1805 .hword (0x64<<8) |(1<<CFlag)\r
1806 .hword (0x65<<8) |(1<<VFlag) |(1<<CFlag)\r
1807 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
1808 .hword (0x67<<8) |(1<<CFlag)\r
1809 .hword (0x68<<8) |(1<<CFlag)\r
1810 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
1811 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
1812 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1813 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1814 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
1815 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1816 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
1817 .hword (0x70<<8) |(1<<CFlag)\r
1818 .hword (0x71<<8) |(1<<VFlag) |(1<<CFlag)\r
1819 .hword (0x72<<8) |(1<<VFlag) |(1<<CFlag)\r
1820 .hword (0x73<<8) |(1<<CFlag)\r
1821 .hword (0x74<<8) |(1<<VFlag) |(1<<CFlag)\r
1822 .hword (0x75<<8) |(1<<CFlag)\r
1823 .hword (0x76<<8) |(1<<CFlag)\r
1824 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
1825 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
1826 .hword (0x79<<8) |(1<<CFlag)\r
1827 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1828 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1829 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1830 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1831 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1832 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1833 .hword (0x80<<8)|(1<<SFlag) |(1<<CFlag)\r
1834 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1835 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1836 .hword (0x83<<8)|(1<<SFlag) |(1<<CFlag)\r
1837 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1838 .hword (0x85<<8)|(1<<SFlag) |(1<<CFlag)\r
1839 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
1840 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1841 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1842 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
1843 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1844 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1845 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1846 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1847 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1848 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1849 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1850 .hword (0x91<<8)|(1<<SFlag) |(1<<CFlag)\r
1851 .hword (0x92<<8)|(1<<SFlag) |(1<<CFlag)\r
1852 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1853 .hword (0x94<<8)|(1<<SFlag) |(1<<CFlag)\r
1854 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1855 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1856 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
1857 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
1858 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1859 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1860 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1861 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1862 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1863 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1864 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1865 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1866 .hword (0xA1<<8)|(1<<SFlag) |(1<<CFlag)\r
1867 .hword (0xA2<<8)|(1<<SFlag) |(1<<CFlag)\r
1868 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1869 .hword (0xA4<<8)|(1<<SFlag) |(1<<CFlag)\r
1870 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1871 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1872 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
1873 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
1874 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1875 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1876 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1877 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1878 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1879 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1880 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1881 .hword (0xB0<<8)|(1<<SFlag) |(1<<CFlag)\r
1882 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1883 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1884 .hword (0xB3<<8)|(1<<SFlag) |(1<<CFlag)\r
1885 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1886 .hword (0xB5<<8)|(1<<SFlag) |(1<<CFlag)\r
1887 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
1888 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1889 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1890 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
1891 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1892 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1893 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1894 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1895 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1896 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1897 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1898 .hword (0xC1<<8)|(1<<SFlag) |(1<<CFlag)\r
1899 .hword (0xC2<<8)|(1<<SFlag) |(1<<CFlag)\r
1900 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1901 .hword (0xC4<<8)|(1<<SFlag) |(1<<CFlag)\r
1902 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1903 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1904 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
1905 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
1906 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1907 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1908 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1909 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1910 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1911 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1912 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1913 .hword (0xD0<<8)|(1<<SFlag) |(1<<CFlag)\r
1914 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1915 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1916 .hword (0xD3<<8)|(1<<SFlag) |(1<<CFlag)\r
1917 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1918 .hword (0xD5<<8)|(1<<SFlag) |(1<<CFlag)\r
1919 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
1920 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1921 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1922 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
1923 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1924 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1925 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1926 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1927 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1928 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1929 .hword (0xE0<<8)|(1<<SFlag) |(1<<CFlag)\r
1930 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1931 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1932 .hword (0xE3<<8)|(1<<SFlag) |(1<<CFlag)\r
1933 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1934 .hword (0xE5<<8)|(1<<SFlag) |(1<<CFlag)\r
1935 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
1936 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1937 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1938 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
1939 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1940 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1941 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1942 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1943 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1944 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1945 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1946 .hword (0xF1<<8)|(1<<SFlag) |(1<<CFlag)\r
1947 .hword (0xF2<<8)|(1<<SFlag) |(1<<CFlag)\r
1948 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1949 .hword (0xF4<<8)|(1<<SFlag) |(1<<CFlag)\r
1950 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1951 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1952 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
1953 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
1954 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1955 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1956 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1957 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1958 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1959 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1960 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1961 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1962 .hword (0x01<<8) |(1<<CFlag)\r
1963 .hword (0x02<<8) |(1<<CFlag)\r
1964 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1965 .hword (0x04<<8) |(1<<CFlag)\r
1966 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1967 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1968 .hword (0x07<<8) |(1<<CFlag)\r
1969 .hword (0x08<<8) |(1<<CFlag)\r
1970 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1971 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1972 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1973 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1974 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1975 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1976 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1977 .hword (0x10<<8) |(1<<CFlag)\r
1978 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1979 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1980 .hword (0x13<<8) |(1<<CFlag)\r
1981 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1982 .hword (0x15<<8) |(1<<CFlag)\r
1983 .hword (0x16<<8) |(1<<CFlag)\r
1984 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1985 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1986 .hword (0x19<<8) |(1<<CFlag)\r
1987 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1988 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1989 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1990 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1991 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1992 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1993 .hword (0x20<<8) |(1<<CFlag)\r
1994 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1995 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1996 .hword (0x23<<8) |(1<<CFlag)\r
1997 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1998 .hword (0x25<<8) |(1<<CFlag)\r
1999 .hword (0x26<<8) |(1<<CFlag)\r
2000 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2001 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2002 .hword (0x29<<8) |(1<<CFlag)\r
2003 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2004 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2005 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2006 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2007 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2008 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2009 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
2010 .hword (0x31<<8) |(1<<CFlag)\r
2011 .hword (0x32<<8) |(1<<CFlag)\r
2012 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
2013 .hword (0x34<<8) |(1<<CFlag)\r
2014 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
2015 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2016 .hword (0x37<<8) |(1<<CFlag)\r
2017 .hword (0x38<<8) |(1<<CFlag)\r
2018 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2019 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2020 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2021 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2022 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2023 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2024 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2025 .hword (0x40<<8) |(1<<CFlag)\r
2026 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
2027 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
2028 .hword (0x43<<8) |(1<<CFlag)\r
2029 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
2030 .hword (0x45<<8) |(1<<CFlag)\r
2031 .hword (0x46<<8) |(1<<CFlag)\r
2032 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2033 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2034 .hword (0x49<<8) |(1<<CFlag)\r
2035 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2036 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2037 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2038 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2039 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2040 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2041 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
2042 .hword (0x51<<8) |(1<<CFlag)\r
2043 .hword (0x52<<8) |(1<<CFlag)\r
2044 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
2045 .hword (0x54<<8) |(1<<CFlag)\r
2046 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
2047 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2048 .hword (0x57<<8) |(1<<CFlag)\r
2049 .hword (0x58<<8) |(1<<CFlag)\r
2050 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2051 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2052 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2053 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2054 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2055 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2056 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2057 .hword (0x06<<8) |(1<<VFlag)\r
2058 .hword (0x07<<8) \r
2059 .hword (0x08<<8) \r
2060 .hword (0x09<<8) |(1<<VFlag)\r
2061 .hword (0x0A<<8) |(1<<VFlag)\r
2062 .hword (0x0B<<8) \r
2063 .hword (0x0C<<8) |(1<<VFlag)\r
2064 .hword (0x0D<<8) \r
2065 .hword (0x0E<<8) \r
2066 .hword (0x0F<<8) |(1<<VFlag)\r
2067 .hword (0x10<<8) |(1<<HFlag) \r
2068 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
2069 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
2070 .hword (0x13<<8) |(1<<HFlag) \r
2071 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
2072 .hword (0x15<<8) |(1<<HFlag) \r
2073 .hword (0x16<<8) \r
2074 .hword (0x17<<8) |(1<<VFlag)\r
2075 .hword (0x18<<8) |(1<<VFlag)\r
2076 .hword (0x19<<8) \r
2077 .hword (0x1A<<8) \r
2078 .hword (0x1B<<8) |(1<<VFlag)\r
2079 .hword (0x1C<<8) \r
2080 .hword (0x1D<<8) |(1<<VFlag)\r
2081 .hword (0x1E<<8) |(1<<VFlag)\r
2082 .hword (0x1F<<8) \r
2083 .hword (0x20<<8) |(1<<HFlag) \r
2084 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
2085 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
2086 .hword (0x23<<8) |(1<<HFlag) \r
2087 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
2088 .hword (0x25<<8) |(1<<HFlag) \r
2089 .hword (0x26<<8) \r
2090 .hword (0x27<<8) |(1<<VFlag)\r
2091 .hword (0x28<<8) |(1<<VFlag)\r
2092 .hword (0x29<<8) \r
2093 .hword (0x2A<<8) \r
2094 .hword (0x2B<<8) |(1<<VFlag)\r
2095 .hword (0x2C<<8) \r
2096 .hword (0x2D<<8) |(1<<VFlag)\r
2097 .hword (0x2E<<8) |(1<<VFlag)\r
2098 .hword (0x2F<<8) \r
2099 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
2100 .hword (0x31<<8) |(1<<HFlag) \r
2101 .hword (0x32<<8) |(1<<HFlag) \r
2102 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
2103 .hword (0x34<<8) |(1<<HFlag) \r
2104 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
2105 .hword (0x36<<8) |(1<<VFlag)\r
2106 .hword (0x37<<8) \r
2107 .hword (0x38<<8) \r
2108 .hword (0x39<<8) |(1<<VFlag)\r
2109 .hword (0x3A<<8) |(1<<VFlag)\r
2110 .hword (0x3B<<8) \r
2111 .hword (0x3C<<8) |(1<<VFlag)\r
2112 .hword (0x3D<<8) \r
2113 .hword (0x3E<<8) \r
2114 .hword (0x3F<<8) |(1<<VFlag)\r
2115 .hword (0x40<<8) |(1<<HFlag) \r
2116 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
2117 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
2118 .hword (0x43<<8) |(1<<HFlag) \r
2119 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
2120 .hword (0x45<<8) |(1<<HFlag) \r
2121 .hword (0x46<<8) \r
2122 .hword (0x47<<8) |(1<<VFlag)\r
2123 .hword (0x48<<8) |(1<<VFlag)\r
2124 .hword (0x49<<8) \r
2125 .hword (0x4A<<8) \r
2126 .hword (0x4B<<8) |(1<<VFlag)\r
2127 .hword (0x4C<<8) \r
2128 .hword (0x4D<<8) |(1<<VFlag)\r
2129 .hword (0x4E<<8) |(1<<VFlag)\r
2130 .hword (0x4F<<8) \r
2131 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
2132 .hword (0x51<<8) |(1<<HFlag) \r
2133 .hword (0x52<<8) |(1<<HFlag) \r
2134 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
2135 .hword (0x54<<8) |(1<<HFlag) \r
2136 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
2137 .hword (0x56<<8) |(1<<VFlag)\r
2138 .hword (0x57<<8) \r
2139 .hword (0x58<<8) \r
2140 .hword (0x59<<8) |(1<<VFlag)\r
2141 .hword (0x5A<<8) |(1<<VFlag)\r
2142 .hword (0x5B<<8) \r
2143 .hword (0x5C<<8) |(1<<VFlag)\r
2144 .hword (0x5D<<8) \r
2145 .hword (0x5E<<8) \r
2146 .hword (0x5F<<8) |(1<<VFlag)\r
2147 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
2148 .hword (0x61<<8) |(1<<HFlag) \r
2149 .hword (0x62<<8) |(1<<HFlag) \r
2150 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
2151 .hword (0x64<<8) |(1<<HFlag) \r
2152 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
2153 .hword (0x66<<8) |(1<<VFlag)\r
2154 .hword (0x67<<8) \r
2155 .hword (0x68<<8) \r
2156 .hword (0x69<<8) |(1<<VFlag)\r
2157 .hword (0x6A<<8) |(1<<VFlag)\r
2158 .hword (0x6B<<8) \r
2159 .hword (0x6C<<8) |(1<<VFlag)\r
2160 .hword (0x6D<<8) \r
2161 .hword (0x6E<<8) \r
2162 .hword (0x6F<<8) |(1<<VFlag)\r
2163 .hword (0x70<<8) |(1<<HFlag) \r
2164 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
2165 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
2166 .hword (0x73<<8) |(1<<HFlag) \r
2167 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
2168 .hword (0x75<<8) |(1<<HFlag) \r
2169 .hword (0x76<<8) \r
2170 .hword (0x77<<8) |(1<<VFlag)\r
2171 .hword (0x78<<8) |(1<<VFlag)\r
2172 .hword (0x79<<8) \r
2173 .hword (0x7A<<8) \r
2174 .hword (0x7B<<8) |(1<<VFlag)\r
2175 .hword (0x7C<<8) \r
2176 .hword (0x7D<<8) |(1<<VFlag)\r
2177 .hword (0x7E<<8) |(1<<VFlag)\r
2178 .hword (0x7F<<8) \r
2179 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
2180 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2181 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2182 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
2183 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2184 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
2185 .hword (0x86<<8)|(1<<SFlag) \r
2186 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
2187 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
2188 .hword (0x89<<8)|(1<<SFlag) \r
2189 .hword (0x8A<<8)|(1<<SFlag) \r
2190 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag)\r
2191 .hword (0x8C<<8)|(1<<SFlag) \r
2192 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag)\r
2193 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag)\r
2194 .hword (0x8F<<8)|(1<<SFlag) \r
2195 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2196 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
2197 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
2198 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2199 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
2200 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2201 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
2202 .hword (0x97<<8)|(1<<SFlag) \r
2203 .hword (0x98<<8)|(1<<SFlag) \r
2204 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
2205 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag)\r
2206 .hword (0x9B<<8)|(1<<SFlag) \r
2207 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag)\r
2208 .hword (0x9D<<8)|(1<<SFlag) \r
2209 .hword (0x9E<<8)|(1<<SFlag) \r
2210 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag)\r
2211 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2212 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2213 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2214 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2215 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2216 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2217 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2218 .hword (0x07<<8) |(1<<CFlag)\r
2219 .hword (0x08<<8) |(1<<CFlag)\r
2220 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2221 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2222 .hword (0x0B<<8) |(1<<CFlag)\r
2223 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2224 .hword (0x0D<<8) |(1<<CFlag)\r
2225 .hword (0x0E<<8) |(1<<CFlag)\r
2226 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2227 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2228 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2229 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2230 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2231 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2232 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2233 .hword (0x16<<8) |(1<<CFlag)\r
2234 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2235 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2236 .hword (0x19<<8) |(1<<CFlag)\r
2237 .hword (0x1A<<8) |(1<<CFlag)\r
2238 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2239 .hword (0x1C<<8) |(1<<CFlag)\r
2240 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2241 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2242 .hword (0x1F<<8) |(1<<CFlag)\r
2243 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2244 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2245 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2246 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2247 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2248 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2249 .hword (0x26<<8) |(1<<CFlag)\r
2250 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2251 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2252 .hword (0x29<<8) |(1<<CFlag)\r
2253 .hword (0x2A<<8) |(1<<CFlag)\r
2254 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2255 .hword (0x2C<<8) |(1<<CFlag)\r
2256 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2257 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2258 .hword (0x2F<<8) |(1<<CFlag)\r
2259 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2260 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2261 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2262 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2263 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2264 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2265 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2266 .hword (0x37<<8) |(1<<CFlag)\r
2267 .hword (0x38<<8) |(1<<CFlag)\r
2268 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2269 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2270 .hword (0x3B<<8) |(1<<CFlag)\r
2271 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2272 .hword (0x3D<<8) |(1<<CFlag)\r
2273 .hword (0x3E<<8) |(1<<CFlag)\r
2274 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2275 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2276 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2277 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2278 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2279 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2280 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2281 .hword (0x46<<8) |(1<<CFlag)\r
2282 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2283 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2284 .hword (0x49<<8) |(1<<CFlag)\r
2285 .hword (0x4A<<8) |(1<<CFlag)\r
2286 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2287 .hword (0x4C<<8) |(1<<CFlag)\r
2288 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2289 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2290 .hword (0x4F<<8) |(1<<CFlag)\r
2291 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2292 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2293 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2294 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2295 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2296 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2297 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2298 .hword (0x57<<8) |(1<<CFlag)\r
2299 .hword (0x58<<8) |(1<<CFlag)\r
2300 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2301 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2302 .hword (0x5B<<8) |(1<<CFlag)\r
2303 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2304 .hword (0x5D<<8) |(1<<CFlag)\r
2305 .hword (0x5E<<8) |(1<<CFlag)\r
2306 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2307 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2308 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2309 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2310 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2311 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2312 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2313 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
2314 .hword (0x67<<8) |(1<<CFlag)\r
2315 .hword (0x68<<8) |(1<<CFlag)\r
2316 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
2317 .hword (0x6A<<8) |(1<<VFlag) |(1<<CFlag)\r
2318 .hword (0x6B<<8) |(1<<CFlag)\r
2319 .hword (0x6C<<8) |(1<<VFlag) |(1<<CFlag)\r
2320 .hword (0x6D<<8) |(1<<CFlag)\r
2321 .hword (0x6E<<8) |(1<<CFlag)\r
2322 .hword (0x6F<<8) |(1<<VFlag) |(1<<CFlag)\r
2323 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
2324 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2325 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2326 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
2327 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2328 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
2329 .hword (0x76<<8) |(1<<CFlag)\r
2330 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
2331 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
2332 .hword (0x79<<8) |(1<<CFlag)\r
2333 .hword (0x7A<<8) |(1<<CFlag)\r
2334 .hword (0x7B<<8) |(1<<VFlag) |(1<<CFlag)\r
2335 .hword (0x7C<<8) |(1<<CFlag)\r
2336 .hword (0x7D<<8) |(1<<VFlag) |(1<<CFlag)\r
2337 .hword (0x7E<<8) |(1<<VFlag) |(1<<CFlag)\r
2338 .hword (0x7F<<8) |(1<<CFlag)\r
2339 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2340 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2341 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2342 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2343 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2344 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2345 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
2346 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2347 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2348 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
2349 .hword (0x8A<<8)|(1<<SFlag) |(1<<CFlag)\r
2350 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2351 .hword (0x8C<<8)|(1<<SFlag) |(1<<CFlag)\r
2352 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2353 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2354 .hword (0x8F<<8)|(1<<SFlag) |(1<<CFlag)\r
2355 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2356 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2357 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2358 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2359 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2360 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2361 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2362 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
2363 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
2364 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2365 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2366 .hword (0x9B<<8)|(1<<SFlag) |(1<<CFlag)\r
2367 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2368 .hword (0x9D<<8)|(1<<SFlag) |(1<<CFlag)\r
2369 .hword (0x9E<<8)|(1<<SFlag) |(1<<CFlag)\r
2370 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2371 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2372 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2373 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2374 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2375 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2376 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2377 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2378 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
2379 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
2380 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2381 .hword (0xAA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2382 .hword (0xAB<<8)|(1<<SFlag) |(1<<CFlag)\r
2383 .hword (0xAC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2384 .hword (0xAD<<8)|(1<<SFlag) |(1<<CFlag)\r
2385 .hword (0xAE<<8)|(1<<SFlag) |(1<<CFlag)\r
2386 .hword (0xAF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2387 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2388 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2389 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2390 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2391 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2392 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2393 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
2394 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2395 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2396 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
2397 .hword (0xBA<<8)|(1<<SFlag) |(1<<CFlag)\r
2398 .hword (0xBB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2399 .hword (0xBC<<8)|(1<<SFlag) |(1<<CFlag)\r
2400 .hword (0xBD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2401 .hword (0xBE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2402 .hword (0xBF<<8)|(1<<SFlag) |(1<<CFlag)\r
2403 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2404 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2405 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2406 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2407 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2408 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2409 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2410 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
2411 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
2412 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2413 .hword (0xCA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2414 .hword (0xCB<<8)|(1<<SFlag) |(1<<CFlag)\r
2415 .hword (0xCC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2416 .hword (0xCD<<8)|(1<<SFlag) |(1<<CFlag)\r
2417 .hword (0xCE<<8)|(1<<SFlag) |(1<<CFlag)\r
2418 .hword (0xCF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2419 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2420 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2421 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2422 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2423 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2424 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2425 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
2426 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2427 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2428 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
2429 .hword (0xDA<<8)|(1<<SFlag) |(1<<CFlag)\r
2430 .hword (0xDB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2431 .hword (0xDC<<8)|(1<<SFlag) |(1<<CFlag)\r
2432 .hword (0xDD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2433 .hword (0xDE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2434 .hword (0xDF<<8)|(1<<SFlag) |(1<<CFlag)\r
2435 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2436 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2437 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2438 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2439 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2440 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2441 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
2442 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2443 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2444 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
2445 .hword (0xEA<<8)|(1<<SFlag) |(1<<CFlag)\r
2446 .hword (0xEB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2447 .hword (0xEC<<8)|(1<<SFlag) |(1<<CFlag)\r
2448 .hword (0xED<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2449 .hword (0xEE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2450 .hword (0xEF<<8)|(1<<SFlag) |(1<<CFlag)\r
2451 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2452 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2453 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2454 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2455 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2456 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2457 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2458 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
2459 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
2460 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2461 .hword (0xFA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2462 .hword (0xFB<<8)|(1<<SFlag) |(1<<CFlag)\r
2463 .hword (0xFC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2464 .hword (0xFD<<8)|(1<<SFlag) |(1<<CFlag)\r
2465 .hword (0xFE<<8)|(1<<SFlag) |(1<<CFlag)\r
2466 .hword (0xFF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2467 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2468 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2469 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2470 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2471 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2472 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2473 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2474 .hword (0x07<<8) |(1<<CFlag)\r
2475 .hword (0x08<<8) |(1<<CFlag)\r
2476 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2477 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2478 .hword (0x0B<<8) |(1<<CFlag)\r
2479 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2480 .hword (0x0D<<8) |(1<<CFlag)\r
2481 .hword (0x0E<<8) |(1<<CFlag)\r
2482 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2483 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2484 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2485 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2486 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2487 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2488 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2489 .hword (0x16<<8) |(1<<CFlag)\r
2490 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2491 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2492 .hword (0x19<<8) |(1<<CFlag)\r
2493 .hword (0x1A<<8) |(1<<CFlag)\r
2494 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2495 .hword (0x1C<<8) |(1<<CFlag)\r
2496 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2497 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2498 .hword (0x1F<<8) |(1<<CFlag)\r
2499 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2500 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2501 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2502 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2503 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2504 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2505 .hword (0x26<<8) |(1<<CFlag)\r
2506 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2507 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2508 .hword (0x29<<8) |(1<<CFlag)\r
2509 .hword (0x2A<<8) |(1<<CFlag)\r
2510 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2511 .hword (0x2C<<8) |(1<<CFlag)\r
2512 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2513 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2514 .hword (0x2F<<8) |(1<<CFlag)\r
2515 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2516 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2517 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2518 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2519 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2520 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2521 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2522 .hword (0x37<<8) |(1<<CFlag)\r
2523 .hword (0x38<<8) |(1<<CFlag)\r
2524 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2525 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2526 .hword (0x3B<<8) |(1<<CFlag)\r
2527 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2528 .hword (0x3D<<8) |(1<<CFlag)\r
2529 .hword (0x3E<<8) |(1<<CFlag)\r
2530 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2531 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2532 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2533 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2534 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2535 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2536 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2537 .hword (0x46<<8) |(1<<CFlag)\r
2538 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2539 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2540 .hword (0x49<<8) |(1<<CFlag)\r
2541 .hword (0x4A<<8) |(1<<CFlag)\r
2542 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2543 .hword (0x4C<<8) |(1<<CFlag)\r
2544 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2545 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2546 .hword (0x4F<<8) |(1<<CFlag)\r
2547 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2548 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2549 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2550 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2551 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2552 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2553 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2554 .hword (0x57<<8) |(1<<CFlag)\r
2555 .hword (0x58<<8) |(1<<CFlag)\r
2556 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2557 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2558 .hword (0x5B<<8) |(1<<CFlag)\r
2559 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2560 .hword (0x5D<<8) |(1<<CFlag)\r
2561 .hword (0x5E<<8) |(1<<CFlag)\r
2562 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2563 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2564 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2565 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2566 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2567 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2568 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2569 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
2570 .hword (0x01<<8) |(1<<NFlag) \r
2571 .hword (0x02<<8) |(1<<NFlag) \r
2572 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
2573 .hword (0x04<<8) |(1<<NFlag) \r
2574 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2575 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2576 .hword (0x07<<8) |(1<<NFlag) \r
2577 .hword (0x08<<8) |(1<<NFlag) \r
2578 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2579 .hword (0x04<<8) |(1<<NFlag) \r
2580 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2581 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2582 .hword (0x07<<8) |(1<<NFlag) \r
2583 .hword (0x08<<8) |(1<<NFlag) \r
2584 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2585 .hword (0x10<<8) |(1<<NFlag) \r
2586 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
2587 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
2588 .hword (0x13<<8) |(1<<NFlag) \r
2589 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2590 .hword (0x15<<8) |(1<<NFlag) \r
2591 .hword (0x16<<8) |(1<<NFlag) \r
2592 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2593 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2594 .hword (0x19<<8) |(1<<NFlag) \r
2595 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2596 .hword (0x15<<8) |(1<<NFlag) \r
2597 .hword (0x16<<8) |(1<<NFlag) \r
2598 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2599 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2600 .hword (0x19<<8) |(1<<NFlag) \r
2601 .hword (0x20<<8) |(1<<NFlag) \r
2602 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
2603 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
2604 .hword (0x23<<8) |(1<<NFlag) \r
2605 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2606 .hword (0x25<<8) |(1<<NFlag) \r
2607 .hword (0x26<<8) |(1<<NFlag) \r
2608 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2609 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2610 .hword (0x29<<8) |(1<<NFlag) \r
2611 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2612 .hword (0x25<<8) |(1<<NFlag) \r
2613 .hword (0x26<<8) |(1<<NFlag) \r
2614 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2615 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2616 .hword (0x29<<8) |(1<<NFlag) \r
2617 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
2618 .hword (0x31<<8) |(1<<NFlag) \r
2619 .hword (0x32<<8) |(1<<NFlag) \r
2620 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
2621 .hword (0x34<<8) |(1<<NFlag) \r
2622 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2623 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2624 .hword (0x37<<8) |(1<<NFlag) \r
2625 .hword (0x38<<8) |(1<<NFlag) \r
2626 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2627 .hword (0x34<<8) |(1<<NFlag) \r
2628 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2629 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2630 .hword (0x37<<8) |(1<<NFlag) \r
2631 .hword (0x38<<8) |(1<<NFlag) \r
2632 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2633 .hword (0x40<<8) |(1<<NFlag) \r
2634 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
2635 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
2636 .hword (0x43<<8) |(1<<NFlag) \r
2637 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2638 .hword (0x45<<8) |(1<<NFlag) \r
2639 .hword (0x46<<8) |(1<<NFlag) \r
2640 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2641 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2642 .hword (0x49<<8) |(1<<NFlag) \r
2643 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2644 .hword (0x45<<8) |(1<<NFlag) \r
2645 .hword (0x46<<8) |(1<<NFlag) \r
2646 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2647 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2648 .hword (0x49<<8) |(1<<NFlag) \r
2649 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
2650 .hword (0x51<<8) |(1<<NFlag) \r
2651 .hword (0x52<<8) |(1<<NFlag) \r
2652 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
2653 .hword (0x54<<8) |(1<<NFlag) \r
2654 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2655 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2656 .hword (0x57<<8) |(1<<NFlag) \r
2657 .hword (0x58<<8) |(1<<NFlag) \r
2658 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2659 .hword (0x54<<8) |(1<<NFlag) \r
2660 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2661 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2662 .hword (0x57<<8) |(1<<NFlag) \r
2663 .hword (0x58<<8) |(1<<NFlag) \r
2664 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2665 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
2666 .hword (0x61<<8) |(1<<NFlag) \r
2667 .hword (0x62<<8) |(1<<NFlag) \r
2668 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
2669 .hword (0x64<<8) |(1<<NFlag) \r
2670 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2671 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2672 .hword (0x67<<8) |(1<<NFlag) \r
2673 .hword (0x68<<8) |(1<<NFlag) \r
2674 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2675 .hword (0x64<<8) |(1<<NFlag) \r
2676 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2677 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2678 .hword (0x67<<8) |(1<<NFlag) \r
2679 .hword (0x68<<8) |(1<<NFlag) \r
2680 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2681 .hword (0x70<<8) |(1<<NFlag) \r
2682 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
2683 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
2684 .hword (0x73<<8) |(1<<NFlag) \r
2685 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2686 .hword (0x75<<8) |(1<<NFlag) \r
2687 .hword (0x76<<8) |(1<<NFlag) \r
2688 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2689 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2690 .hword (0x79<<8) |(1<<NFlag) \r
2691 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2692 .hword (0x75<<8) |(1<<NFlag) \r
2693 .hword (0x76<<8) |(1<<NFlag) \r
2694 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2695 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2696 .hword (0x79<<8) |(1<<NFlag) \r
2697 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
2698 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2699 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2700 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
2701 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2702 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2703 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2704 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2705 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2706 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2707 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2708 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2709 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2710 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2711 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2712 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2713 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2714 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
2715 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
2716 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2717 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag) \r
2718 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2719 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2720 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag) \r
2721 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag) \r
2722 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2723 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2724 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2725 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2726 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2727 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2728 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2729 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2730 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2731 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2732 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2733 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2734 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2735 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2736 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2737 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2738 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2739 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2740 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2741 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2742 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2743 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2744 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2745 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2746 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2747 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2748 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2749 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2750 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2751 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2752 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2753 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2754 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2755 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2756 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2757 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2758 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2759 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2760 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2761 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2762 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
2763 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
2764 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2765 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2766 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2767 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2768 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2769 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2770 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2771 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2772 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2773 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2774 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2775 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2776 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2777 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
2778 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2779 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2780 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
2781 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2782 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2783 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2784 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2785 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2786 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2787 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2788 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2789 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2790 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2791 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2792 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2793 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2794 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2795 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2796 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2797 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2798 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2799 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2800 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2801 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2802 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2803 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2804 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2805 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2806 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2807 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2808 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2809 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2810 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2811 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2812 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2813 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2814 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2815 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2816 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2817 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2818 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2819 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2820 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2821 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2822 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2823 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2824 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2825 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2826 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2827 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2828 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2829 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2830 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2831 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2832 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2833 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2834 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2835 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2836 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2837 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2838 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2839 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2840 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2841 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2842 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2843 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2844 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2845 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2846 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2847 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2848 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2849 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2850 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2851 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2852 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2853 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2854 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2855 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2856 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2857 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2858 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2859 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2860 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2861 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2862 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2863 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2864 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2865 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2866 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2867 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2868 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2869 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2870 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2871 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2872 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2873 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2874 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2875 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2876 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2877 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2878 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2879 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2880 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2881 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2882 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2883 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2884 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2885 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2886 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2887 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2888 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2889 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2890 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2891 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2892 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2893 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2894 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2895 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2896 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2897 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2898 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2899 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2900 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2901 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2902 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2903 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2904 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2905 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2906 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2907 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2908 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2909 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2910 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2911 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2912 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2913 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2914 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2915 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2916 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2917 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2918 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2919 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2920 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2921 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2922 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
2923 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
2924 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2925 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2926 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2927 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2928 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2929 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2930 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2931 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2932 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2933 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2934 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2935 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2936 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2937 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
2938 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2939 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2940 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
2941 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2942 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2943 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2944 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2945 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2946 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2947 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2948 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2949 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2950 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2951 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2952 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2953 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
2954 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2955 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2956 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
2957 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2958 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2959 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2960 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2961 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2962 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2963 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2964 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2965 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2966 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2967 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2968 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2969 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2970 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
2971 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
2972 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2973 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2974 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2975 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2976 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2977 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2978 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2979 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2980 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2981 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2982 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2983 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2984 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2985 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2986 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2987 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2988 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2989 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2990 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2991 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2992 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2993 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2994 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2995 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2996 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2997 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2998 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2999 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3000 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3001 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3002 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3003 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3004 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3005 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3006 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3007 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3008 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3009 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3010 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3011 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3012 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3013 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3014 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3015 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3016 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3017 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3018 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3019 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3020 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3021 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3022 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3023 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3024 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3025 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3026 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3027 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3028 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3029 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3030 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3031 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3032 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3033 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3034 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3035 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3036 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3037 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3038 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3039 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3040 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3041 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3042 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3043 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3044 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3045 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3046 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3047 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3048 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3049 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3050 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3051 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3052 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3053 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3054 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3055 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3056 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3057 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3058 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3059 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3060 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3061 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3062 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3063 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3064 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3065 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3066 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3067 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3068 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3069 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3070 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3071 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3072 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3073 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3074 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3075 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3076 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3077 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3078 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3079 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3080 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3081 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3082 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3083 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3084 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3085 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3086 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3087 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
3088 .hword (0x01<<8) |(1<<NFlag) \r
3089 .hword (0x02<<8) |(1<<NFlag) \r
3090 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
3091 .hword (0x04<<8) |(1<<NFlag) \r
3092 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
3093 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
3094 .hword (0x07<<8) |(1<<NFlag) \r
3095 .hword (0x08<<8) |(1<<NFlag) \r
3096 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
3097 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3098 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag) \r
3099 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3100 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag) \r
3101 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag) \r
3102 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3103 .hword (0x10<<8) |(1<<NFlag) \r
3104 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
3105 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
3106 .hword (0x13<<8) |(1<<NFlag) \r
3107 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
3108 .hword (0x15<<8) |(1<<NFlag) \r
3109 .hword (0x16<<8) |(1<<NFlag) \r
3110 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
3111 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
3112 .hword (0x19<<8) |(1<<NFlag) \r
3113 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag) \r
3114 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3115 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag) \r
3116 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3117 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3118 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag) \r
3119 .hword (0x20<<8) |(1<<NFlag) \r
3120 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
3121 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
3122 .hword (0x23<<8) |(1<<NFlag) \r
3123 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
3124 .hword (0x25<<8) |(1<<NFlag) \r
3125 .hword (0x26<<8) |(1<<NFlag) \r
3126 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
3127 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
3128 .hword (0x29<<8) |(1<<NFlag) \r
3129 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag) \r
3130 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3131 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag) \r
3132 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3133 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3134 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag) \r
3135 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
3136 .hword (0x31<<8) |(1<<NFlag) \r
3137 .hword (0x32<<8) |(1<<NFlag) \r
3138 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
3139 .hword (0x34<<8) |(1<<NFlag) \r
3140 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
3141 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
3142 .hword (0x37<<8) |(1<<NFlag) \r
3143 .hword (0x38<<8) |(1<<NFlag) \r
3144 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
3145 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3146 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag) \r
3147 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3148 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag) \r
3149 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag) \r
3150 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3151 .hword (0x40<<8) |(1<<NFlag) \r
3152 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
3153 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
3154 .hword (0x43<<8) |(1<<NFlag) \r
3155 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
3156 .hword (0x45<<8) |(1<<NFlag) \r
3157 .hword (0x46<<8) |(1<<NFlag) \r
3158 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
3159 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
3160 .hword (0x49<<8) |(1<<NFlag) \r
3161 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag) \r
3162 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3163 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag) \r
3164 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3165 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3166 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag) \r
3167 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
3168 .hword (0x51<<8) |(1<<NFlag) \r
3169 .hword (0x52<<8) |(1<<NFlag) \r
3170 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
3171 .hword (0x54<<8) |(1<<NFlag) \r
3172 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
3173 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
3174 .hword (0x57<<8) |(1<<NFlag) \r
3175 .hword (0x58<<8) |(1<<NFlag) \r
3176 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
3177 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3178 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag) \r
3179 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3180 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag) \r
3181 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag) \r
3182 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3183 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
3184 .hword (0x61<<8) |(1<<NFlag) \r
3185 .hword (0x62<<8) |(1<<NFlag) \r
3186 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
3187 .hword (0x64<<8) |(1<<NFlag) \r
3188 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
3189 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
3190 .hword (0x67<<8) |(1<<NFlag) \r
3191 .hword (0x68<<8) |(1<<NFlag) \r
3192 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
3193 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3194 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag) \r
3195 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3196 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag) \r
3197 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag) \r
3198 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3199 .hword (0x70<<8) |(1<<NFlag) \r
3200 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
3201 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
3202 .hword (0x73<<8) |(1<<NFlag) \r
3203 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
3204 .hword (0x75<<8) |(1<<NFlag) \r
3205 .hword (0x76<<8) |(1<<NFlag) \r
3206 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
3207 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
3208 .hword (0x79<<8) |(1<<NFlag) \r
3209 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag) \r
3210 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3211 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag) \r
3212 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3213 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3214 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag) \r
3215 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
3216 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3217 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3218 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
3219 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3220 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
3221 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
3222 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3223 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3224 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
3225 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3226 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3227 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3228 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3229 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3230 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3231 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3232 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
3233 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
3234 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3235 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3236 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3237 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3238 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3239 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3240 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3241 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3242 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3243 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3244 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3245 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3246 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3247 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3248 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3249 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3250 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3251 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3252 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3253 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3254 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3255 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3256 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3257 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3258 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3259 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3260 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3261 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3262 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3263 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3264 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3265 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3266 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3267 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3268 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3269 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3270 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3271 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3272 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3273 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3274 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3275 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3276 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3277 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3278 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3279 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3280 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3281 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3282 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3283 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3284 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3285 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3286 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3287 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3288 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3289 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3290 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3291 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3292 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3293 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3294 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3295 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3296 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3297 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3298 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3299 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3300 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3301 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3302 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3303 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3304 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3305 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3306 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3307 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3308 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3309 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3310 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3311 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3312 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3313 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3314 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3315 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3316 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3317 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3318 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3319 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3320 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3321 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3322 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3323 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3324 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3325 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3326 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3327 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3328 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3329 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3330 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3331 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3332 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3333 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3334 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3335 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3336 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3337 .hword (0x9A<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3338 .hword (0x9B<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3339 .hword (0x9C<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3340 .hword (0x9D<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3341 .hword (0x9E<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3342 .hword (0x9F<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3343 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3344 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3345 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3346 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3347 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3348 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3349 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3350 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3351 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3352 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3353 .hword (0xAA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3354 .hword (0xAB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3355 .hword (0xAC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3356 .hword (0xAD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3357 .hword (0xAE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3358 .hword (0xAF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3359 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3360 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3361 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3362 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3363 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3364 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3365 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3366 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3367 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3368 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3369 .hword (0xBA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3370 .hword (0xBB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3371 .hword (0xBC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3372 .hword (0xBD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3373 .hword (0xBE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3374 .hword (0xBF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3375 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3376 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3377 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3378 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3379 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3380 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3381 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3382 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3383 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3384 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3385 .hword (0xCA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3386 .hword (0xCB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3387 .hword (0xCC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3388 .hword (0xCD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3389 .hword (0xCE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3390 .hword (0xCF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3391 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3392 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3393 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3394 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3395 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3396 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3397 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3398 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3399 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3400 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3401 .hword (0xDA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3402 .hword (0xDB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3403 .hword (0xDC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3404 .hword (0xDD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3405 .hword (0xDE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3406 .hword (0xDF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3407 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3408 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3409 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3410 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3411 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3412 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3413 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3414 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3415 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3416 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3417 .hword (0xEA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3418 .hword (0xEB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3419 .hword (0xEC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3420 .hword (0xED<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3421 .hword (0xEE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3422 .hword (0xEF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3423 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3424 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3425 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3426 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3427 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3428 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3429 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3430 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3431 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3432 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3433 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3434 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3435 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3436 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3437 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3438 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3439 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3440 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
3441 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
3442 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3443 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
3444 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3445 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3446 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
3447 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
3448 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3449 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3450 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3451 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3452 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3453 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3454 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3455 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
3456 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3457 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3458 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
3459 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3460 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
3461 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
3462 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3463 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3464 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
3465 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3466 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3467 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3468 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3469 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3470 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3471 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
3472 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3473 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3474 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
3475 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3476 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
3477 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
3478 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3479 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3480 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
3481 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3482 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3483 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3484 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3485 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3486 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3487 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3488 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
3489 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
3490 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3491 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3492 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3493 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3494 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3495 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3496 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3497 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3498 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3499 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3500 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3501 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3502 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3503 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3504 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3505 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3506 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3507 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3508 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3509 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3510 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3511 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3512 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3513 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3514 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3515 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3516 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3517 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3518 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3519 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3520 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3521 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3522 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3523 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3524 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3525 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3526 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3527 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3528 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3529 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3530 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3531 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3532 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3533 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3534 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3535 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3536 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3537 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3538 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3539 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3540 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3541 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3542 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3543 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3544 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3545 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3546 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3547 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3548 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3549 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3550 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3551 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3552 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3553 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3554 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3555 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3556 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3557 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3558 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3559 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3560 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3561 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3562 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3563 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3564 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3565 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3566 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3567 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3568 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3569 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3570 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3571 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3572 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3573 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3574 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3575 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3576 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3577 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3578 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3579 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3580 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3581 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3582 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3583 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3584 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3585 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3586 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3587 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3588 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3589 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3590 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3591 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3592 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3593 \r
3594.align 4\r
3595\r
3596AF_Z80: .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 0\r
3597 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 1\r
3598 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 2\r
3599 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 3\r
3600 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 4\r
3601 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 5\r
3602 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 6\r
3603 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 7\r
3604 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 8\r
3605 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 9\r
3606 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 10\r
3607 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 11\r
3608 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 12\r
3609 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 13\r
3610 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 14\r
3611 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 15\r
3612 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 16\r
3613 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 17\r
3614 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 18\r
3615 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 19\r
3616 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 20\r
3617 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 21\r
3618 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 22\r
3619 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 23\r
3620 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 24\r
3621 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 25\r
3622 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 26\r
3623 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 27\r
3624 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 28\r
3625 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 29\r
3626 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 30\r
3627 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 31\r
3628 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 32\r
3629 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 33\r
3630 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 34\r
3631 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 35\r
3632 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 36\r
3633 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 37\r
3634 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 38\r
3635 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 39\r
3636 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 40\r
3637 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 41\r
3638 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 42\r
3639 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 43\r
3640 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 44\r
3641 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 45\r
3642 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 46\r
3643 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 47\r
3644 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 48\r
3645 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 49\r
3646 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 50\r
3647 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 51\r
3648 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 52\r
3649 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 53\r
3650 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 54\r
3651 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 55\r
3652 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 56\r
3653 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 57\r
3654 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 58\r
3655 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 59\r
3656 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 60\r
3657 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 61\r
3658 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 62\r
3659 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 63\r
3660 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 64\r
3661 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 65\r
3662 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 66\r
3663 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 67\r
3664 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 68\r
3665 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 69\r
3666 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 70\r
3667 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 71\r
3668 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 72\r
3669 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 73\r
3670 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 74\r
3671 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 75\r
3672 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 76\r
3673 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 77\r
3674 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 78\r
3675 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 79\r
3676 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 80\r
3677 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 81\r
3678 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 82\r
3679 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 83\r
3680 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 84\r
3681 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 85\r
3682 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 86\r
3683 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 87\r
3684 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 88\r
3685 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 89\r
3686 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 90\r
3687 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 91\r
3688 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 92\r
3689 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 93\r
3690 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 94\r
3691 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 95\r
3692 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 96\r
3693 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 97\r
3694 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 98\r
3695 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 99\r
3696 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 100\r
3697 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 101\r
3698 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 102\r
3699 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 103\r
3700 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 104\r
3701 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 105\r
3702 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 106\r
3703 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 107\r
3704 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 108\r
3705 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 109\r
3706 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 110\r
3707 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 111\r
3708 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 112\r
3709 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 113\r
3710 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 114\r
3711 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 115\r
3712 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 116\r
3713 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 117\r
3714 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 118\r
3715 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 119\r
3716 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 120\r
3717 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 121\r
3718 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 122\r
3719 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 123\r
3720 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 124\r
3721 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 125\r
3722 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 126\r
3723 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 127\r
3724 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 128\r
3725 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 129\r
3726 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 130\r
3727 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 131\r
3728 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 132\r
3729 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 133\r
3730 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 134\r
3731 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 135\r
3732 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 136\r
3733 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 137\r
3734 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 138\r
3735 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 139\r
3736 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 140\r
3737 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 141\r
3738 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 142\r
3739 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 143\r
3740 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 144\r
3741 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 145\r
3742 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 146\r
3743 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 147\r
3744 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 148\r
3745 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 149\r
3746 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 150\r
3747 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 151\r
3748 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 152\r
3749 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 153\r
3750 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 154\r
3751 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 155\r
3752 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 156\r
3753 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 157\r
3754 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 158\r
3755 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 159\r
3756 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 160\r
3757 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 161\r
3758 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 162\r
3759 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 163\r
3760 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 164\r
3761 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 165\r
3762 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 166\r
3763 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 167\r
3764 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 168\r
3765 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 169\r
3766 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 170\r
3767 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 171\r
3768 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 172\r
3769 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 173\r
3770 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 174\r
3771 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 175\r
3772 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 176\r
3773 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 177\r
3774 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 178\r
3775 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 179\r
3776 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 180\r
3777 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 181\r
3778 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 182\r
3779 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 183\r
3780 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 184\r
3781 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 185\r
3782 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 186\r
3783 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 187\r
3784 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 188\r
3785 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 189\r
3786 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 190\r
3787 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 191\r
3788 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 192\r
3789 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 193\r
3790 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 194\r
3791 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 195\r
3792 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 196\r
3793 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 197\r
3794 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 198\r
3795 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 199\r
3796 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 200\r
3797 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 201\r
3798 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 202\r
3799 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 203\r
3800 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 204\r
3801 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 205\r
3802 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 206\r
3803 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 207\r
3804 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 208\r
3805 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 209\r
3806 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 210\r
3807 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 211\r
3808 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 212\r
3809 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 213\r
3810 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 214\r
3811 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 215\r
3812 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 216\r
3813 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 217\r
3814 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 218\r
3815 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 219\r
3816 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 220\r
3817 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 221\r
3818 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 222\r
3819 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 223\r
3820 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 224\r
3821 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 225\r
3822 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 226\r
3823 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 227\r
3824 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 228\r
3825 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 229\r
3826 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 230\r
3827 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 231\r
3828 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 232\r
3829 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 233\r
3830 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 234\r
3831 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 235\r
3832 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 236\r
3833 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 237\r
3834 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 238\r
3835 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 239\r
3836 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 240\r
3837 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 241\r
3838 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 242\r
3839 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 243\r
3840 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 244\r
3841 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 245\r
3842 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 246\r
3843 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 247\r
3844 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 248\r
3845 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 249\r
3846 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 250\r
3847 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 251\r
3848 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 252\r
3849 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 253\r
3850 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 254\r
3851 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 255\r
3852\r
3853.align 4\r
3854\r
3855AF_ARM: .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 0\r
3856 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 1\r
3857 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 2\r
3858 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 3\r
3859 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 4\r
3860 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 5\r
3861 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 6\r
3862 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 7\r
3863 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 8\r
3864 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 9\r
3865 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 10\r
3866 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 11\r
3867 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 12\r
3868 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 13\r
3869 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 14\r
3870 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 15\r
3871 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 16\r
3872 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 17\r
3873 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 18\r
3874 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 19\r
3875 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 20\r
3876 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 21\r
3877 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 22\r
3878 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 23\r
3879 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 24\r
3880 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 25\r
3881 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 26\r
3882 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 27\r
3883 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 28\r
3884 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 29\r
3885 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 30\r
3886 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 31\r
3887 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 32\r
3888 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 33\r
3889 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 34\r
3890 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 35\r
3891 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 36\r
3892 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 37\r
3893 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 38\r
3894 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 39\r
3895 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 40\r
3896 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 41\r
3897 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 42\r
3898 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 43\r
3899 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 44\r
3900 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 45\r
3901 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 46\r
3902 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 47\r
3903 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 48\r
3904 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 49\r
3905 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 50\r
3906 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 51\r
3907 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 52\r
3908 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 53\r
3909 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 54\r
3910 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 55\r
3911 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 56\r
3912 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 57\r
3913 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 58\r
3914 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 59\r
3915 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 60\r
3916 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 61\r
3917 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 62\r
3918 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 63\r
3919 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 64\r
3920 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 65\r
3921 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 66\r
3922 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 67\r
3923 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 68\r
3924 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 69\r
3925 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 70\r
3926 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 71\r
3927 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 72\r
3928 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 73\r
3929 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 74\r
3930 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 75\r
3931 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 76\r
3932 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 77\r
3933 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 78\r
3934 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 79\r
3935 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 80\r
3936 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 81\r
3937 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 82\r
3938 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 83\r
3939 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 84\r
3940 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 85\r
3941 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 86\r
3942 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 87\r
3943 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 88\r
3944 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 89\r
3945 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 90\r
3946 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 91\r
3947 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 92\r
3948 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 93\r
3949 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 94\r
3950 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 95\r
3951 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 96\r
3952 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 97\r
3953 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 98\r
3954 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 99\r
3955 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 100\r
3956 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 101\r
3957 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 102\r
3958 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 103\r
3959 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 104\r
3960 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 105\r
3961 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 106\r
3962 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 107\r
3963 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 108\r
3964 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 109\r
3965 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 110\r
3966 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 111\r
3967 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 112\r
3968 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 113\r
3969 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 114\r
3970 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 115\r
3971 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 116\r
3972 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 117\r
3973 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 118\r
3974 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 119\r
3975 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 120\r
3976 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 121\r
3977 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 122\r
3978 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 123\r
3979 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 124\r
3980 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 125\r
3981 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 126\r
3982 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 127\r
3983 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 128\r
3984 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 129\r
3985 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 130\r
3986 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 131\r
3987 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 132\r
3988 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 133\r
3989 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 134\r
3990 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 135\r
3991 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 136\r
3992 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 137\r
3993 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 138\r
3994 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 139\r
3995 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 140\r
3996 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 141\r
3997 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 142\r
3998 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 143\r
3999 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 144\r
4000 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 145\r
4001 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 146\r
4002 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 147\r
4003 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 148\r
4004 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 149\r
4005 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 150\r
4006 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 151\r
4007 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 152\r
4008 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 153\r
4009 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 154\r
4010 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 155\r
4011 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 156\r
4012 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 157\r
4013 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 158\r
4014 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 159\r
4015 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 160\r
4016 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 161\r
4017 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 162\r
4018 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 163\r
4019 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 164\r
4020 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 165\r
4021 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 166\r
4022 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 167\r
4023 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 168\r
4024 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 169\r
4025 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 170\r
4026 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 171\r
4027 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 172\r
4028 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 173\r
4029 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 174\r
4030 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 175\r
4031 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 176\r
4032 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 177\r
4033 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 178\r
4034 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 179\r
4035 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 180\r
4036 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 181\r
4037 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 182\r
4038 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 183\r
4039 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 184\r
4040 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 185\r
4041 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 186\r
4042 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 187\r
4043 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 188\r
4044 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 189\r
4045 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 190\r
4046 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 191\r
4047 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 192\r
4048 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 193\r
4049 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 194\r
4050 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 195\r
4051 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 196\r
4052 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 197\r
4053 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 198\r
4054 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 199\r
4055 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 200\r
4056 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 201\r
4057 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 202\r
4058 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 203\r
4059 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 204\r
4060 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 205\r
4061 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 206\r
4062 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 207\r
4063 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 208\r
4064 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 209\r
4065 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 210\r
4066 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 211\r
4067 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 212\r
4068 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 213\r
4069 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 214\r
4070 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 215\r
4071 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 216\r
4072 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 217\r
4073 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 218\r
4074 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 219\r
4075 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 220\r
4076 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 221\r
4077 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 222\r
4078 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 223\r
4079 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 224\r
4080 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 225\r
4081 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 226\r
4082 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 227\r
4083 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 228\r
4084 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 229\r
4085 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 230\r
4086 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 231\r
4087 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 232\r
4088 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 233\r
4089 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 234\r
4090 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 235\r
4091 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 236\r
4092 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 237\r
4093 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 238\r
4094 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 239\r
4095 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 240\r
4096 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 241\r
4097 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 242\r
4098 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 243\r
4099 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 244\r
4100 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 245\r
4101 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 246\r
4102 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 247\r
4103 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 248\r
4104 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 249\r
4105 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 250\r
4106 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 251\r
4107 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 252\r
4108 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 253\r
4109 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 254\r
4110 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 255\r
4111\r
4112.align 4\r
4113\r
4114PZSTable_data: .byte (1<<ZFlag)|(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4115 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4116 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4117 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4118 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4119 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4120 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4121 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4122 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4123 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4124 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4125 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4126 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4127 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4128 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4129 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4130 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4131 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4132 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4133 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4134 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4135 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4136 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4137 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4138 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4139 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4140 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4141 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4142 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4143 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4144 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4145 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4146 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4147 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4148 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4149 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4150 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4151 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4152 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4153 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4154 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag) \r
4155\r
4156.align 4\r
4157\r
4158MAIN_opcodes: \r
4159 .word opcode_0_0,opcode_0_1,opcode_0_2,opcode_0_3,opcode_0_4,opcode_0_5,opcode_0_6,opcode_0_7\r
4160 .word opcode_0_8,opcode_0_9,opcode_0_A,opcode_0_B,opcode_0_C,opcode_0_D,opcode_0_E,opcode_0_F\r
4161 .word opcode_1_0,opcode_1_1,opcode_1_2,opcode_1_3,opcode_1_4,opcode_1_5,opcode_1_6,opcode_1_7\r
4162 .word opcode_1_8,opcode_1_9,opcode_1_A,opcode_1_B,opcode_1_C,opcode_1_D,opcode_1_E,opcode_1_F\r
4163 .word opcode_2_0,opcode_2_1,opcode_2_2,opcode_2_3,opcode_2_4,opcode_2_5,opcode_2_6,opcode_2_7\r
4164 .word opcode_2_8,opcode_2_9,opcode_2_A,opcode_2_B,opcode_2_C,opcode_2_D,opcode_2_E,opcode_2_F\r
4165 .word opcode_3_0,opcode_3_1,opcode_3_2,opcode_3_3,opcode_3_4,opcode_3_5,opcode_3_6,opcode_3_7\r
4166 .word opcode_3_8,opcode_3_9,opcode_3_A,opcode_3_B,opcode_3_C,opcode_3_D,opcode_3_E,opcode_3_F\r
4167 .word opcode_4_0,opcode_4_1,opcode_4_2,opcode_4_3,opcode_4_4,opcode_4_5,opcode_4_6,opcode_4_7\r
4168 .word opcode_4_8,opcode_4_9,opcode_4_A,opcode_4_B,opcode_4_C,opcode_4_D,opcode_4_E,opcode_4_F\r
4169 .word opcode_5_0,opcode_5_1,opcode_5_2,opcode_5_3,opcode_5_4,opcode_5_5,opcode_5_6,opcode_5_7\r
4170 .word opcode_5_8,opcode_5_9,opcode_5_A,opcode_5_B,opcode_5_C,opcode_5_D,opcode_5_E,opcode_5_F\r
4171 .word opcode_6_0,opcode_6_1,opcode_6_2,opcode_6_3,opcode_6_4,opcode_6_5,opcode_6_6,opcode_6_7\r
4172 .word opcode_6_8,opcode_6_9,opcode_6_A,opcode_6_B,opcode_6_C,opcode_6_D,opcode_6_E,opcode_6_F\r
4173 .word opcode_7_0,opcode_7_1,opcode_7_2,opcode_7_3,opcode_7_4,opcode_7_5,opcode_7_6,opcode_7_7\r
4174 .word opcode_7_8,opcode_7_9,opcode_7_A,opcode_7_B,opcode_7_C,opcode_7_D,opcode_7_E,opcode_7_F\r
4175 .word opcode_8_0,opcode_8_1,opcode_8_2,opcode_8_3,opcode_8_4,opcode_8_5,opcode_8_6,opcode_8_7\r
4176 .word opcode_8_8,opcode_8_9,opcode_8_A,opcode_8_B,opcode_8_C,opcode_8_D,opcode_8_E,opcode_8_F\r
4177 .word opcode_9_0,opcode_9_1,opcode_9_2,opcode_9_3,opcode_9_4,opcode_9_5,opcode_9_6,opcode_9_7\r
4178 .word opcode_9_8,opcode_9_9,opcode_9_A,opcode_9_B,opcode_9_C,opcode_9_D,opcode_9_E,opcode_9_F\r
4179 .word opcode_A_0,opcode_A_1,opcode_A_2,opcode_A_3,opcode_A_4,opcode_A_5,opcode_A_6,opcode_A_7\r
4180 .word opcode_A_8,opcode_A_9,opcode_A_A,opcode_A_B,opcode_A_C,opcode_A_D,opcode_A_E,opcode_A_F\r
4181 .word opcode_B_0,opcode_B_1,opcode_B_2,opcode_B_3,opcode_B_4,opcode_B_5,opcode_B_6,opcode_B_7\r
4182 .word opcode_B_8,opcode_B_9,opcode_B_A,opcode_B_B,opcode_B_C,opcode_B_D,opcode_B_E,opcode_B_F\r
4183 .word opcode_C_0,opcode_C_1,opcode_C_2,opcode_C_3,opcode_C_4,opcode_C_5,opcode_C_6,opcode_C_7\r
4184 .word opcode_C_8,opcode_C_9,opcode_C_A,opcode_C_B,opcode_C_C,opcode_C_D,opcode_C_E,opcode_C_F\r
4185 .word opcode_D_0,opcode_D_1,opcode_D_2,opcode_D_3,opcode_D_4,opcode_D_5,opcode_D_6,opcode_D_7\r
4186 .word opcode_D_8,opcode_D_9,opcode_D_A,opcode_D_B,opcode_D_C,opcode_D_D,opcode_D_E,opcode_D_F\r
4187 .word opcode_E_0,opcode_E_1,opcode_E_2,opcode_E_3,opcode_E_4,opcode_E_5,opcode_E_6,opcode_E_7\r
4188 .word opcode_E_8,opcode_E_9,opcode_E_A,opcode_E_B,opcode_E_C,opcode_E_D,opcode_E_E,opcode_E_F\r
4189 .word opcode_F_0,opcode_F_1,opcode_F_2,opcode_F_3,opcode_F_4,opcode_F_5,opcode_F_6,opcode_F_7\r
4190 .word opcode_F_8,opcode_F_9,opcode_F_A,opcode_F_B,opcode_F_C,opcode_F_D,opcode_F_E,opcode_F_F\r
4191\r
4192.align 4\r
4193\r
4194EI_DUMMY_opcodes:\r
4195 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4196 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4197 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4198 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4199 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4200 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4201 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4202 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4203 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4204 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4205 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4206 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4207 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4208 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4209 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4210 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4211 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4212 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4213 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4214 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4215 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4216 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4217 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4218 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4219 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4220 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4221 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4222 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4223 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4224 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4225 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4226 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4227\r
4228.text\r
4229.align 4\r
4230\r
4231;@NOP\r
4232opcode_0_0:\r
4233;@LD B,B\r
4234opcode_4_0:\r
4235;@LD C,C\r
4236opcode_4_9:\r
4237;@LD D,D\r
4238opcode_5_2:\r
4239;@LD E,E\r
4240opcode_5_B:\r
4241;@LD H,H\r
4242opcode_6_4:\r
4243;@LD L,L\r
4244opcode_6_D:\r
4245;@LD A,A\r
4246opcode_7_F:\r
4247 fetch 4\r
4248;@LD BC,NN\r
4249opcode_0_1:\r
4250 ldrb r0,[z80pc],#1\r
4251 ldrb r1,[z80pc],#1\r
4252 orr r0,r0,r1, lsl #8\r
4253 mov z80bc,r0, lsl #16\r
4254 fetch 10\r
4255;@LD (BC),A\r
4256opcode_0_2:\r
4257 mov r0,z80a, lsr #24\r
4258 mov r1,z80bc, lsr #16\r
4259 writemem8\r
4260 fetch 7\r
4261;@INC BC\r
4262opcode_0_3:\r
4263 add z80bc,z80bc,#1<<16\r
4264 fetch 6\r
4265;@INC B\r
4266opcode_0_4:\r
4267 opINC8H z80bc\r
4268 fetch 4\r
4269;@DEC B\r
4270opcode_0_5:\r
4271 opDEC8H z80bc\r
4272 fetch 4\r
4273;@LD B,N\r
4274opcode_0_6:\r
4275 ldrb r1,[z80pc],#1\r
4276 and z80bc,z80bc,#0xFF<<16\r
4277 orr z80bc,z80bc,r1, lsl #24\r
4278 fetch 7\r
4279;@RLCA\r
4280opcode_0_7:\r
4281 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4282 movs z80a,z80a, lsl #1\r
4283 orrcs z80a,z80a,#1<<24\r
4284 orrcs z80f,z80f,#1<<CFlag\r
4285 fetch 4\r
4286;@EX AF,AF'\r
4287opcode_0_8:\r
4288 add r1,cpucontext,#z80a2\r
4289 swp z80a,z80a,[r1]\r
4290 add r1,cpucontext,#z80f2\r
4291 swp z80f,z80f,[r1]\r
4292 fetch 4\r
4293;@ADD HL,BC\r
4294opcode_0_9:\r
4295 opADD16 z80hl z80bc\r
4296 fetch 11\r
4297;@LD A,(BC)\r
4298opcode_0_A:\r
4299 mov r0,z80bc, lsr #16\r
4300 readmem8\r
4301 mov z80a,r0, lsl #24\r
4302 fetch 7\r
4303;@DEC BC\r
4304opcode_0_B:\r
4305 sub z80bc,z80bc,#1<<16\r
4306 fetch 6\r
4307;@INC C\r
4308opcode_0_C:\r
4309 opINC8L z80bc\r
4310 fetch 4\r
4311;@DEC C\r
4312opcode_0_D:\r
4313 opDEC8L z80bc\r
4314 fetch 4\r
4315;@LD C,N\r
4316opcode_0_E:\r
4317 ldrb r1,[z80pc],#1\r
4318 and z80bc,z80bc,#0xFF<<24\r
4319 orr z80bc,z80bc,r1, lsl #16\r
4320 fetch 7\r
4321;@RRCA\r
4322opcode_0_F:\r
4323 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4324 movs z80a,z80a, lsr #25\r
4325 orrcs z80a,z80a,#1<<7\r
4326 orrcs z80f,z80f,#1<<CFlag\r
4327 mov z80a,z80a, lsl #24\r
4328 fetch 4\r
4329;@DJNZ $+2\r
4330opcode_1_0:\r
4331 sub z80bc,z80bc,#1<<24\r
4332 tst z80bc,#0xFF<<24\r
4333 ldrsb r1,[z80pc],#1\r
4334 addne z80pc,z80pc,r1\r
4335 subne z80_icount,z80_icount,#5\r
4336 fetch 8\r
4337\r
4338;@LD DE,NN\r
4339opcode_1_1:\r
4340 ldrb r0,[z80pc],#1\r
4341 ldrb r1,[z80pc],#1\r
4342 orr r0,r0,r1, lsl #8\r
4343 mov z80de,r0, lsl #16\r
4344 fetch 10\r
4345;@LD (DE),A\r
4346opcode_1_2:\r
4347 mov r0,z80a, lsr #24\r
4348 writemem8DE\r
4349 fetch 7\r
4350;@INC DE\r
4351opcode_1_3:\r
4352 add z80de,z80de,#1<<16\r
4353 fetch 6\r
4354;@INC D\r
4355opcode_1_4:\r
4356 opINC8H z80de\r
4357 fetch 4\r
4358;@DEC D\r
4359opcode_1_5:\r
4360 opDEC8H z80de\r
4361 fetch 4\r
4362;@LD D,N\r
4363opcode_1_6:\r
4364 ldrb r1,[z80pc],#1\r
4365 and z80de,z80de,#0xFF<<16\r
4366 orr z80de,z80de,r1, lsl #24\r
4367 fetch 7\r
4368;@RLA\r
4369opcode_1_7:\r
4370 tst z80f,#1<<CFlag\r
4371 orrne z80a,z80a,#1<<23\r
4372 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4373 movs z80a,z80a, lsl #1\r
4374 orrcs z80f,z80f,#1<<CFlag\r
4375 fetch 4\r
4376;@JR $+2\r
4377opcode_1_8:\r
4378 ldrsb r1,[z80pc],#1\r
4379 add z80pc,z80pc,r1\r
4380 fetch 12\r
4381;@ADD HL,DE\r
4382opcode_1_9:\r
4383 opADD16 z80hl z80de\r
4384 fetch 11\r
4385;@LD A,(DE)\r
4386opcode_1_A:\r
4387 mov r0,z80de, lsr #16\r
4388 readmem8\r
4389 mov z80a,r0, lsl #24\r
4390 fetch 7\r
4391;@DEC DE\r
4392opcode_1_B:\r
4393 sub z80de,z80de,#1<<16\r
4394 fetch 6\r
4395;@INC E\r
4396opcode_1_C:\r
4397 opINC8L z80de\r
4398 fetch 4\r
4399;@DEC E\r
4400opcode_1_D:\r
4401 opDEC8L z80de\r
4402 fetch 4\r
4403;@LD E,N\r
4404opcode_1_E:\r
4405 ldrb r0,[z80pc],#1\r
4406 and z80de,z80de,#0xFF<<24\r
4407 orr z80de,z80de,r0, lsl #16\r
4408 fetch 7\r
4409;@RRA\r
4410opcode_1_F:\r
4411 orr z80a,z80a,z80f,lsr#1 ;@get C\r
4412 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4413 movs z80a,z80a,ror#25\r
4414 orrcs z80f,z80f,#1<<CFlag\r
4415 mov z80a,z80a,lsl#24\r
4416 fetch 4\r
4417;@JR NZ,$+2\r
4418opcode_2_0:\r
4419 tst z80f,#1<<ZFlag\r
4420 beq opcode_1_8\r
4421 add z80pc,z80pc,#1\r
4422 fetch 7\r
4423;@LD HL,NN\r
4424opcode_2_1:\r
4425 ldrb r0,[z80pc],#1\r
4426 ldrb r1,[z80pc],#1\r
4427 orr r0,r0,r1, lsl #8\r
4428 mov z80hl,r0, lsl #16\r
4429 fetch 10\r
4430;@LD (NN),HL\r
4431opcode_ED_63:\r
4432 eatcycles 4\r
4433;@LD (NN),HL\r
4434opcode_2_2:\r
4435 ldrb r0,[z80pc],#1\r
4436 ldrb r1,[z80pc],#1\r
4437 orr r1,r0,r1, lsl #8\r
4438 mov r0,z80hl, lsr #16\r
4439 writemem16\r
4440 fetch 16\r
4441;@INC HL\r
4442opcode_2_3:\r
4443 add z80hl,z80hl,#1<<16\r
4444 fetch 6\r
4445;@INC H\r
4446opcode_2_4:\r
4447 opINC8H z80hl\r
4448 fetch 4\r
4449;@DEC H\r
4450opcode_2_5:\r
4451 opDEC8H z80hl\r
4452 fetch 4\r
4453;@LD H,N\r
4454opcode_2_6:\r
4455 ldrb r1,[z80pc],#1\r
4456 and z80hl,z80hl,#0xFF<<16\r
4457 orr z80hl,z80hl,r1, lsl #24\r
4458 fetch 7\r
4459DAATABLE_LOCAL: .word DAATable\r
4460;@DAA\r
4461opcode_2_7:\r
4462 mov r1,z80a, lsr #24\r
4463 tst z80f,#1<<CFlag\r
4464 orrne r1,r1,#256\r
4465 tst z80f,#1<<HFlag\r
4466 orrne r1,r1,#512\r
4467 tst z80f,#1<<NFlag\r
4468 orrne r1,r1,#1024\r
4469 ldr r2,DAATABLE_LOCAL\r
4470 add r2,r2,r1, lsl #1\r
4471 ldrh r1,[r2]\r
4472 and z80f,r1,#0xFF\r
4473 and r2,r1,#0xFF<<8\r
4474 mov z80a,r2, lsl #16\r
4475 fetch 4\r
4476;@JR Z,$+2\r
4477opcode_2_8:\r
4478 tst z80f,#1<<ZFlag\r
4479 bne opcode_1_8\r
4480 add z80pc,z80pc,#1\r
4481 fetch 7\r
4482;@ADD HL,HL\r
4483opcode_2_9:\r
4484 opADD16_2 z80hl\r
4485 fetch 11\r
4486;@LD HL,(NN)\r
4487opcode_ED_6B:\r
4488 eatcycles 4\r
4489;@LD HL,(NN)\r
4490opcode_2_A:\r
4491 ldrb r0,[z80pc],#1\r
4492 ldrb r1,[z80pc],#1\r
4493 orr r0,r0,r1, lsl #8\r
4494 readmem16\r
4495 mov z80hl,r0, lsl #16\r
4496 fetch 16\r
4497;@DEC HL\r
4498opcode_2_B:\r
4499 sub z80hl,z80hl,#1<<16\r
4500 fetch 6\r
4501;@INC L\r
4502opcode_2_C:\r
4503 opINC8L z80hl\r
4504 fetch 4\r
4505;@DEC L\r
4506opcode_2_D:\r
4507 opDEC8L z80hl\r
4508 fetch 4\r
4509;@LD L,N\r
4510opcode_2_E:\r
4511 ldrb r0,[z80pc],#1\r
4512 and z80hl,z80hl,#0xFF<<24\r
4513 orr z80hl,z80hl,r0, lsl #16\r
4514 fetch 7\r
4515;@CPL\r
4516opcode_2_F:\r
4517 eor z80a,z80a,#0xFF<<24\r
4518 orr z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4519 fetch 4\r
4520;@JR NC,$+2\r
4521opcode_3_0:\r
4522 tst z80f,#1<<CFlag\r
4523 beq opcode_1_8\r
4524 add z80pc,z80pc,#1\r
4525 fetch 7\r
4526;@LD SP,NN\r
4527opcode_3_1:\r
4528 ldrb r0,[z80pc],#1\r
4529 ldrb r1,[z80pc],#1\r
4530\r
4531.if FAST_Z80SP\r
4532 orr r0,r0,r1, lsl #8\r
4533 rebasesp\r
4534 mov z80sp,r0\r
4535.else\r
4536 orr z80sp,r0,r1, lsl #8\r
4537.endif\r
4538 fetch 10\r
4539;@LD (NN),A\r
4540opcode_3_2:\r
4541 ldrb r0,[z80pc],#1\r
4542 ldrb r1,[z80pc],#1\r
4543 orr r1,r0,r1, lsl #8\r
4544 mov r0,z80a, lsr #24\r
4545 writemem8\r
4546 fetch 13\r
4547;@INC SP\r
4548opcode_3_3:\r
4549 add z80sp,z80sp,#1\r
4550 fetch 6\r
4551;@INC (HL)\r
4552opcode_3_4:\r
4553 readmem8HL\r
4554 opINC8b\r
4555 writemem8HL\r
4556 fetch 11\r
4557;@DEC (HL)\r
4558opcode_3_5:\r
4559 readmem8HL\r
4560 opDEC8b\r
4561 writemem8HL\r
4562 fetch 11\r
4563;@LD (HL),N\r
4564opcode_3_6:\r
4565 ldrb r0,[z80pc],#1\r
4566 writemem8HL\r
4567 fetch 10\r
4568;@SCF\r
4569opcode_3_7:\r
4570 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4571 orr z80f,z80f,#1<<CFlag\r
4572 fetch 4\r
4573;@JR C,$+2\r
4574opcode_3_8:\r
4575 tst z80f,#1<<CFlag\r
4576 bne opcode_1_8\r
4577 add z80pc,z80pc,#1\r
28d596af 4578 fetch 7\r
cc68a136 4579;@ADD HL,SP\r
4580opcode_3_9:\r
4581.if FAST_Z80SP\r
4582 ldr r0,[cpucontext,#z80sp_base]\r
4583 sub r0,z80sp,r0\r
4584 opADD16s z80hl r0 16\r
4585.else\r
4586 opADD16s z80hl z80sp 16\r
4587.endif\r
4588 fetch 11\r
4589;@LD A,(NN)\r
4590opcode_3_A:\r
4591 ldrb r0,[z80pc],#1\r
4592 ldrb r1,[z80pc],#1\r
4593 orr r0,r0,r1, lsl #8\r
4594 readmem8\r
4595 mov z80a,r0, lsl #24\r
28d596af 4596 fetch 13\r
cc68a136 4597;@DEC SP\r
4598opcode_3_B:\r
4599 sub z80sp,z80sp,#1\r
4600 fetch 6\r
4601;@INC A\r
4602opcode_3_C:\r
4603 opINC8 z80a\r
4604 fetch 4\r
4605;@DEC A\r
4606opcode_3_D:\r
4607 opDEC8 z80a\r
4608 fetch 4\r
4609;@LD A,N\r
4610opcode_3_E:\r
4611 ldrb r0,[z80pc],#1\r
4612 mov z80a,r0, lsl #24\r
4613 fetch 7\r
4614;@CCF\r
4615opcode_3_F:\r
4616 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4617 tst z80f,#1<<CFlag\r
4618 orrne z80f,z80f,#1<<HFlag\r
4619 eor z80f,z80f,#1<<CFlag\r
4620 fetch 4\r
4621\r
4622;@LD B,C\r
4623opcode_4_1:\r
4624 and z80bc,z80bc,#0xFF<<16\r
4625 orr z80bc,z80bc,z80bc, lsl #8\r
4626 fetch 4\r
4627;@LD B,D\r
4628opcode_4_2:\r
4629 and z80bc,z80bc,#0xFF<<16\r
4630 and r1,z80de,#0xFF<<24\r
4631 orr z80bc,z80bc,r1\r
4632 fetch 4\r
4633;@LD B,E\r
4634opcode_4_3:\r
4635 and z80bc,z80bc,#0xFF<<16\r
4636 and r1,z80de,#0xFF<<16\r
4637 orr z80bc,z80bc,r1, lsl #8\r
4638 fetch 4\r
4639;@LD B,H\r
4640opcode_4_4:\r
4641 and z80bc,z80bc,#0xFF<<16\r
4642 and r1,z80hl,#0xFF<<24\r
4643 orr z80bc,z80bc,r1\r
4644 fetch 4\r
4645;@LD B,L\r
4646opcode_4_5:\r
4647 and z80bc,z80bc,#0xFF<<16\r
4648 and r1,z80hl,#0xFF<<16\r
4649 orr z80bc,z80bc,r1, lsl #8\r
4650 fetch 4\r
4651;@LD B,(HL)\r
4652opcode_4_6:\r
4653 readmem8HL\r
4654 and z80bc,z80bc,#0xFF<<16\r
4655 orr z80bc,z80bc,r0, lsl #24\r
4656 fetch 7\r
4657;@LD B,A\r
4658opcode_4_7:\r
4659 and z80bc,z80bc,#0xFF<<16\r
4660 orr z80bc,z80bc,z80a\r
4661 fetch 4\r
4662;@LD C,B\r
4663opcode_4_8:\r
4664 and z80bc,z80bc,#0xFF<<24\r
4665 orr z80bc,z80bc,z80bc, lsr #8\r
4666 fetch 4\r
4667;@LD C,D\r
4668opcode_4_A:\r
4669 and z80bc,z80bc,#0xFF<<24\r
4670 and r1,z80de,#0xFF<<24\r
4671 orr z80bc,z80bc,r1, lsr #8\r
4672 fetch 4\r
4673;@LD C,E\r
4674opcode_4_B:\r
4675 and z80bc,z80bc,#0xFF<<24\r
4676 and r1,z80de,#0xFF<<16\r
4677 orr z80bc,z80bc,r1 \r
4678 fetch 4\r
4679;@LD C,H\r
4680opcode_4_C:\r
4681 and z80bc,z80bc,#0xFF<<24\r
4682 and r1,z80hl,#0xFF<<24\r
4683 orr z80bc,z80bc,r1, lsr #8\r
4684 fetch 4\r
4685;@LD C,L\r
4686opcode_4_D:\r
4687 and z80bc,z80bc,#0xFF<<24\r
4688 and r1,z80hl,#0xFF<<16\r
4689 orr z80bc,z80bc,r1 \r
4690 fetch 4\r
4691;@LD C,(HL)\r
4692opcode_4_E:\r
4693 readmem8HL\r
4694 and z80bc,z80bc,#0xFF<<24\r
4695 orr z80bc,z80bc,r0, lsl #16\r
4696 fetch 7\r
4697;@LD C,A\r
4698opcode_4_F:\r
4699 and z80bc,z80bc,#0xFF<<24\r
4700 orr z80bc,z80bc,z80a, lsr #8\r
4701 fetch 4\r
4702;@LD D,B\r
4703opcode_5_0:\r
4704 and z80de,z80de,#0xFF<<16\r
4705 and r1,z80bc,#0xFF<<24\r
4706 orr z80de,z80de,r1\r
4707 fetch 4\r
4708;@LD D,C\r
4709opcode_5_1:\r
4710 and z80de,z80de,#0xFF<<16\r
4711 orr z80de,z80de,z80bc, lsl #8\r
4712 fetch 4\r
4713;@LD D,E\r
4714opcode_5_3:\r
4715 and z80de,z80de,#0xFF<<16\r
4716 orr z80de,z80de,z80de, lsl #8\r
4717 fetch 4\r
4718;@LD D,H\r
4719opcode_5_4:\r
4720 and z80de,z80de,#0xFF<<16\r
4721 and r1,z80hl,#0xFF<<24\r
4722 orr z80de,z80de,r1\r
4723 fetch 4\r
4724;@LD D,L\r
4725opcode_5_5:\r
4726 and z80de,z80de,#0xFF<<16\r
4727 orr z80de,z80de,z80hl, lsl #8\r
4728 fetch 4\r
4729;@LD D,(HL)\r
4730opcode_5_6:\r
4731 readmem8HL\r
4732 and z80de,z80de,#0xFF<<16\r
4733 orr z80de,z80de,r0, lsl #24\r
4734 fetch 7\r
4735;@LD D,A\r
4736opcode_5_7:\r
4737 and z80de,z80de,#0xFF<<16\r
4738 orr z80de,z80de,z80a\r
4739 fetch 4\r
4740;@LD E,B\r
4741opcode_5_8:\r
4742 and z80de,z80de,#0xFF<<24\r
4743 and r1,z80bc,#0xFF<<24\r
4744 orr z80de,z80de,r1, lsr #8\r
4745 fetch 4\r
4746;@LD E,C\r
4747opcode_5_9:\r
4748 and z80de,z80de,#0xFF<<24\r
4749 and r1,z80bc,#0xFF<<16\r
4750 orr z80de,z80de,r1 \r
4751 fetch 4\r
4752;@LD E,D\r
4753opcode_5_A:\r
4754 and z80de,z80de,#0xFF<<24\r
4755 orr z80de,z80de,z80de, lsr #8\r
4756 fetch 4\r
4757;@LD E,H\r
4758opcode_5_C:\r
4759 and z80de,z80de,#0xFF<<24\r
4760 and r1,z80hl,#0xFF<<24\r
4761 orr z80de,z80de,r1, lsr #8\r
4762 fetch 4\r
4763;@LD E,L\r
4764opcode_5_D:\r
4765 and z80de,z80de,#0xFF<<24\r
4766 and r1,z80hl,#0xFF<<16\r
4767 orr z80de,z80de,r1 \r
4768 fetch 4\r
4769;@LD E,(HL)\r
4770opcode_5_E:\r
4771 readmem8HL\r
4772 and z80de,z80de,#0xFF<<24\r
4773 orr z80de,z80de,r0, lsl #16\r
4774 fetch 7\r
4775;@LD E,A\r
4776opcode_5_F:\r
4777 and z80de,z80de,#0xFF<<24\r
4778 orr z80de,z80de,z80a, lsr #8\r
4779 fetch 4\r
4780\r
4781;@LD H,B\r
4782opcode_6_0:\r
4783 and z80hl,z80hl,#0xFF<<16\r
4784 and r1,z80bc,#0xFF<<24\r
4785 orr z80hl,z80hl,r1\r
4786 fetch 4\r
4787;@LD H,C\r
4788opcode_6_1:\r
4789 and z80hl,z80hl,#0xFF<<16\r
4790 orr z80hl,z80hl,z80bc, lsl #8\r
4791 fetch 4\r
4792;@LD H,D\r
4793opcode_6_2:\r
4794 and z80hl,z80hl,#0xFF<<16\r
4795 and r1,z80de,#0xFF<<24\r
4796 orr z80hl,z80hl,r1\r
4797 fetch 4\r
4798;@LD H,E\r
4799opcode_6_3:\r
4800 and z80hl,z80hl,#0xFF<<16\r
4801 orr z80hl,z80hl,z80de, lsl #8\r
4802 fetch 4\r
4803;@LD H,L\r
4804opcode_6_5:\r
4805 and z80hl,z80hl,#0xFF<<16\r
4806 orr z80hl,z80hl,z80hl, lsl #8\r
4807 fetch 4\r
4808;@LD H,(HL)\r
4809opcode_6_6:\r
4810 readmem8HL\r
4811 and z80hl,z80hl,#0xFF<<16\r
4812 orr z80hl,z80hl,r0, lsl #24\r
4813 fetch 7\r
4814;@LD H,A\r
4815opcode_6_7:\r
4816 and z80hl,z80hl,#0xFF<<16\r
4817 orr z80hl,z80hl,z80a\r
4818 fetch 4\r
4819\r
4820;@LD L,B\r
4821opcode_6_8:\r
4822 and z80hl,z80hl,#0xFF<<24\r
4823 and r1,z80bc,#0xFF<<24\r
4824 orr z80hl,z80hl,r1, lsr #8\r
4825 fetch 4\r
4826;@LD L,C\r
4827opcode_6_9:\r
4828 and z80hl,z80hl,#0xFF<<24\r
4829 and r1,z80bc,#0xFF<<16\r
4830 orr z80hl,z80hl,r1\r
4831 fetch 4\r
4832;@LD L,D\r
4833opcode_6_A:\r
4834 and z80hl,z80hl,#0xFF<<24\r
4835 and r1,z80de,#0xFF<<24\r
4836 orr z80hl,z80hl,r1, lsr #8\r
4837 fetch 4\r
4838;@LD L,E\r
4839opcode_6_B:\r
4840 and z80hl,z80hl,#0xFF<<24\r
4841 and r1,z80de,#0xFF<<16\r
4842 orr z80hl,z80hl,r1\r
4843 fetch 4\r
4844;@LD L,H\r
4845opcode_6_C:\r
4846 and z80hl,z80hl,#0xFF<<24\r
4847 orr z80hl,z80hl,z80hl, lsr #8\r
4848 fetch 4\r
4849;@LD L,(HL)\r
4850opcode_6_E:\r
4851 readmem8HL\r
4852 and z80hl,z80hl,#0xFF<<24\r
4853 orr z80hl,z80hl,r0, lsl #16\r
4854 fetch 7\r
4855;@LD L,A\r
4856opcode_6_F:\r
4857 and z80hl,z80hl,#0xFF<<24\r
4858 orr z80hl,z80hl,z80a, lsr #8\r
4859 fetch 4\r
4860\r
4861;@LD (HL),B\r
4862opcode_7_0:\r
4863 mov r0,z80bc, lsr #24\r
4864 writemem8HL\r
4865 fetch 7\r
4866;@LD (HL),C\r
4867opcode_7_1:\r
4868 mov r0,z80bc, lsr #16\r
4869 and r0,r0,#0xFF\r
4870 writemem8HL\r
4871 fetch 7\r
4872;@LD (HL),D\r
4873opcode_7_2:\r
4874 mov r0,z80de, lsr #24\r
4875 writemem8HL\r
4876 fetch 7\r
4877;@LD (HL),E\r
4878opcode_7_3:\r
4879 mov r0,z80de, lsr #16\r
4880 and r0,r0,#0xFF\r
4881 writemem8HL\r
4882 fetch 7\r
4883;@LD (HL),H\r
4884opcode_7_4:\r
4885 mov r0,z80hl, lsr #24\r
4886 writemem8HL\r
4887 fetch 7\r
4888;@LD (HL),L\r
4889opcode_7_5:\r
4890 mov r1,z80hl, lsr #16\r
4891 and r0,r1,#0xFF\r
4892 writemem8\r
4893 fetch 7\r
4894;@HALT\r
4895opcode_7_6:\r
4896 sub z80pc,z80pc,#1\r
4897 ldrb r0,[cpucontext,#z80if]\r
4898 orr r0,r0,#Z80_HALT\r
4899 strb r0,[cpucontext,#z80if]\r
28d596af 4900 mov z80_icount,#0\r
cc68a136 4901 b z80_execute_end\r
4902;@LD (HL),A\r
4903opcode_7_7:\r
4904 mov r0,z80a, lsr #24\r
4905 writemem8HL\r
4906 fetch 7\r
4907\r
4908;@LD A,B\r
4909opcode_7_8:\r
4910 and z80a,z80bc,#0xFF<<24\r
4911 fetch 4\r
4912;@LD A,C\r
4913opcode_7_9:\r
4914 mov z80a,z80bc, lsl #8\r
4915 fetch 4\r
4916;@LD A,D\r
4917opcode_7_A:\r
4918 and z80a,z80de,#0xFF<<24\r
4919 fetch 4\r
4920;@LD A,E\r
4921opcode_7_B:\r
4922 mov z80a,z80de, lsl #8\r
4923 fetch 4\r
4924;@LD A,H\r
4925opcode_7_C:\r
4926 and z80a,z80hl,#0xFF<<24\r
4927 fetch 4\r
4928;@LD A,L\r
4929opcode_7_D:\r
4930 mov z80a,z80hl, lsl #8\r
4931 fetch 4\r
4932;@LD A,(HL)\r
4933opcode_7_E:\r
4934 readmem8HL\r
4935 mov z80a,r0, lsl #24\r
4936 fetch 7\r
4937\r
4938;@ADD A,B\r
4939opcode_8_0:\r
4940 opADDH z80bc\r
4941;@ADD A,C\r
4942opcode_8_1:\r
4943 opADDL z80bc\r
4944;@ADD A,D\r
4945opcode_8_2:\r
4946 opADDH z80de\r
4947;@ADD A,E\r
4948opcode_8_3:\r
4949 opADDL z80de\r
4950;@ADD A,H\r
4951opcode_8_4:\r
4952 opADDH z80hl\r
4953;@ADD A,L\r
4954opcode_8_5:\r
4955 opADDL z80hl\r
4956;@ADD A,(HL)\r
4957opcode_8_6:\r
4958 readmem8HL\r
4959 opADDb\r
4960 fetch 7\r
4961;@ADD A,A\r
4962opcode_8_7:\r
4963 opADDA\r
4964\r
4965;@ADC A,B\r
4966opcode_8_8:\r
4967 opADCH z80bc\r
4968;@ADC A,C\r
4969opcode_8_9:\r
4970 opADCL z80bc\r
4971;@ADC A,D\r
4972opcode_8_A:\r
4973 opADCH z80de\r
4974;@ADC A,E\r
4975opcode_8_B:\r
4976 opADCL z80de\r
4977;@ADC A,H\r
4978opcode_8_C:\r
4979 opADCH z80hl\r
4980;@ADC A,L\r
4981opcode_8_D:\r
4982 opADCL z80hl\r
4983;@ADC A,(HL)\r
4984opcode_8_E:\r
4985 readmem8HL\r
4986 opADCb\r
4987 fetch 7\r
4988;@ADC A,A\r
4989opcode_8_F:\r
4990 opADCA\r
4991\r
4992;@SUB B\r
4993opcode_9_0:\r
4994 opSUBH z80bc\r
4995;@SUB C\r
4996opcode_9_1:\r
4997 opSUBL z80bc\r
4998;@SUB D\r
4999opcode_9_2:\r
5000 opSUBH z80de\r
5001;@SUB E\r
5002opcode_9_3:\r
5003 opSUBL z80de\r
5004;@SUB H\r
5005opcode_9_4:\r
5006 opSUBH z80hl\r
5007;@SUB L\r
5008opcode_9_5:\r
5009 opSUBL z80hl\r
5010;@SUB (HL)\r
5011opcode_9_6:\r
5012 readmem8HL\r
5013 opSUBb\r
5014 fetch 7\r
5015;@SUB A\r
5016opcode_9_7:\r
5017 opSUBA\r
5018\r
5019;@SBC B \r
5020opcode_9_8:\r
5021 opSBCH z80bc\r
5022;@SBC C\r
5023opcode_9_9:\r
5024 opSBCL z80bc\r
5025;@SBC D\r
5026opcode_9_A:\r
5027 opSBCH z80de\r
5028;@SBC E\r
5029opcode_9_B:\r
5030 opSBCL z80de\r
5031;@SBC H\r
5032opcode_9_C:\r
5033 opSBCH z80hl\r
5034;@SBC L\r
5035opcode_9_D:\r
5036 opSBCL z80hl\r
5037;@SBC (HL)\r
5038opcode_9_E:\r
5039 readmem8HL\r
5040 opSBCb\r
5041 fetch 7\r
5042;@SBC A\r
5043opcode_9_F:\r
5044 opSBCA\r
5045\r
5046;@AND B\r
5047opcode_A_0:\r
5048 opANDH z80bc\r
5049;@AND C\r
5050opcode_A_1:\r
5051 opANDL z80bc\r
5052;@AND D\r
5053opcode_A_2:\r
5054 opANDH z80de\r
5055;@AND E\r
5056opcode_A_3:\r
5057 opANDL z80de\r
5058;@AND H\r
5059opcode_A_4:\r
5060 opANDH z80hl\r
5061;@AND L\r
5062opcode_A_5:\r
5063 opANDL z80hl\r
5064;@AND (HL)\r
5065opcode_A_6:\r
5066 readmem8HL\r
5067 opANDb\r
5068 fetch 7\r
5069;@AND A\r
5070opcode_A_7:\r
5071 opANDA\r
5072\r
5073;@XOR B\r
5074opcode_A_8:\r
5075 opXORH z80bc\r
5076;@XOR C\r
5077opcode_A_9:\r
5078 opXORL z80bc\r
5079;@XOR D\r
5080opcode_A_A:\r
5081 opXORH z80de\r
5082;@XOR E\r
5083opcode_A_B:\r
5084 opXORL z80de\r
5085;@XOR H\r
5086opcode_A_C:\r
5087 opXORH z80hl\r
5088;@XOR L\r
5089opcode_A_D:\r
5090 opXORL z80hl\r
5091;@XOR (HL)\r
5092opcode_A_E:\r
5093 readmem8HL\r
5094 opXORb\r
5095 fetch 7\r
5096;@XOR A\r
5097opcode_A_F:\r
5098 opXORA\r
5099\r
5100;@OR B\r
5101opcode_B_0:\r
5102 opORH z80bc\r
5103;@OR C\r
5104opcode_B_1:\r
5105 opORL z80bc\r
5106;@OR D\r
5107opcode_B_2:\r
5108 opORH z80de\r
5109;@OR E\r
5110opcode_B_3:\r
5111 opORL z80de\r
5112;@OR H\r
5113opcode_B_4:\r
5114 opORH z80hl\r
5115;@OR L\r
5116opcode_B_5:\r
5117 opORL z80hl\r
5118;@OR (HL)\r
5119opcode_B_6:\r
5120 readmem8HL\r
5121 opORb\r
5122 fetch 7\r
5123;@OR A\r
5124opcode_B_7:\r
5125 opORA\r
5126\r
5127;@CP B\r
5128opcode_B_8:\r
5129 opCPH z80bc\r
5130;@CP C\r
5131opcode_B_9:\r
5132 opCPL z80bc\r
5133;@CP D\r
5134opcode_B_A:\r
5135 opCPH z80de\r
5136;@CP E\r
5137opcode_B_B:\r
5138 opCPL z80de\r
5139;@CP H\r
5140opcode_B_C:\r
5141 opCPH z80hl\r
5142;@CP L\r
5143opcode_B_D:\r
5144 opCPL z80hl\r
5145;@CP (HL)\r
5146opcode_B_E:\r
5147 readmem8HL\r
5148 opCPb\r
5149 fetch 7\r
5150;@CP A\r
5151opcode_B_F:\r
5152 opCPA\r
5153\r
5154;@RET NZ\r
5155opcode_C_0:\r
5156 tst z80f,#1<<ZFlag\r
28d596af 5157 beq opcode_C_9_cond ;@unconditional RET\r
cc68a136 5158 fetch 5\r
5159\r
5160;@POP BC\r
5161opcode_C_1:\r
5162 opPOPreg z80bc\r
5163\r
5164;@JP NZ,$+3\r
5165opcode_C_2:\r
5166 tst z80f,#1<<ZFlag\r
5167 beq opcode_C_3 ;@unconditional JP\r
5168 add z80pc,z80pc,#2\r
5169 fetch 10\r
5170;@JP $+3\r
5171opcode_C_3:\r
5172 ldrb r0,[z80pc],#1\r
5173 ldrb r1,[z80pc],#1\r
5174 orr r0,r0,r1, lsl #8\r
5175 rebasepc\r
5176 fetch 10\r
5177;@CALL NZ,NN\r
5178opcode_C_4:\r
5179 tst z80f,#1<<ZFlag\r
5180 beq opcode_C_D ;@unconditional CALL\r
5181 add z80pc,z80pc,#2\r
5182 fetch 10\r
5183\r
5184;@PUSH BC\r
5185opcode_C_5:\r
5186 opPUSHreg z80bc\r
5187 fetch 11\r
5188;@ADD A,N\r
5189opcode_C_6:\r
5190 ldrb r0,[z80pc],#1\r
5191 opADDb\r
5192 fetch 7\r
5193;@RST 0\r
5194opcode_C_7:\r
5195 opRST 0x00\r
5196\r
5197;@RET Z\r
5198opcode_C_8:\r
5199 tst z80f,#1<<ZFlag\r
28d596af 5200 bne opcode_C_9_cond ;@unconditional RET\r
cc68a136 5201 fetch 5\r
28d596af 5202\r
5203opcode_C_9_cond:\r
de89bf45 5204 eatcycles 1\r
cc68a136 5205;@RET\r
5206opcode_C_9:\r
5207 opPOP\r
5208 rebasepc\r
5209 fetch 10\r
5210;@JP Z,$+3\r
5211opcode_C_A:\r
5212 tst z80f,#1<<ZFlag\r
5213 bne opcode_C_3 ;@unconditional JP\r
5214 add z80pc,z80pc,#2\r
5215 fetch 10\r
5216\r
5217;@This reads this opcodes_CB lookup table to find the location of\r
5218;@the CB sub for the intruction and then branches to that location\r
5219opcode_C_B:\r
5220 ldrb r0,[z80pc],#1\r
5221 ldr pc,[pc,r0, lsl #2]\r
5222opcodes_CB: .word 0x00000000\r
5223 .word opcode_CB_00,opcode_CB_01,opcode_CB_02,opcode_CB_03,opcode_CB_04,opcode_CB_05,opcode_CB_06,opcode_CB_07\r
5224 .word opcode_CB_08,opcode_CB_09,opcode_CB_0A,opcode_CB_0B,opcode_CB_0C,opcode_CB_0D,opcode_CB_0E,opcode_CB_0F\r
5225 .word opcode_CB_10,opcode_CB_11,opcode_CB_12,opcode_CB_13,opcode_CB_14,opcode_CB_15,opcode_CB_16,opcode_CB_17\r
5226 .word opcode_CB_18,opcode_CB_19,opcode_CB_1A,opcode_CB_1B,opcode_CB_1C,opcode_CB_1D,opcode_CB_1E,opcode_CB_1F\r
5227 .word opcode_CB_20,opcode_CB_21,opcode_CB_22,opcode_CB_23,opcode_CB_24,opcode_CB_25,opcode_CB_26,opcode_CB_27\r
5228 .word opcode_CB_28,opcode_CB_29,opcode_CB_2A,opcode_CB_2B,opcode_CB_2C,opcode_CB_2D,opcode_CB_2E,opcode_CB_2F\r
5229 .word opcode_CB_30,opcode_CB_31,opcode_CB_32,opcode_CB_33,opcode_CB_34,opcode_CB_35,opcode_CB_36,opcode_CB_37\r
5230 .word opcode_CB_38,opcode_CB_39,opcode_CB_3A,opcode_CB_3B,opcode_CB_3C,opcode_CB_3D,opcode_CB_3E,opcode_CB_3F\r
5231 .word opcode_CB_40,opcode_CB_41,opcode_CB_42,opcode_CB_43,opcode_CB_44,opcode_CB_45,opcode_CB_46,opcode_CB_47\r
5232 .word opcode_CB_48,opcode_CB_49,opcode_CB_4A,opcode_CB_4B,opcode_CB_4C,opcode_CB_4D,opcode_CB_4E,opcode_CB_4F\r
5233 .word opcode_CB_50,opcode_CB_51,opcode_CB_52,opcode_CB_53,opcode_CB_54,opcode_CB_55,opcode_CB_56,opcode_CB_57\r
5234 .word opcode_CB_58,opcode_CB_59,opcode_CB_5A,opcode_CB_5B,opcode_CB_5C,opcode_CB_5D,opcode_CB_5E,opcode_CB_5F\r
5235 .word opcode_CB_60,opcode_CB_61,opcode_CB_62,opcode_CB_63,opcode_CB_64,opcode_CB_65,opcode_CB_66,opcode_CB_67\r
5236 .word opcode_CB_68,opcode_CB_69,opcode_CB_6A,opcode_CB_6B,opcode_CB_6C,opcode_CB_6D,opcode_CB_6E,opcode_CB_6F\r
5237 .word opcode_CB_70,opcode_CB_71,opcode_CB_72,opcode_CB_73,opcode_CB_74,opcode_CB_75,opcode_CB_76,opcode_CB_77\r
5238 .word opcode_CB_78,opcode_CB_79,opcode_CB_7A,opcode_CB_7B,opcode_CB_7C,opcode_CB_7D,opcode_CB_7E,opcode_CB_7F\r
5239 .word opcode_CB_80,opcode_CB_81,opcode_CB_82,opcode_CB_83,opcode_CB_84,opcode_CB_85,opcode_CB_86,opcode_CB_87\r
5240 .word opcode_CB_88,opcode_CB_89,opcode_CB_8A,opcode_CB_8B,opcode_CB_8C,opcode_CB_8D,opcode_CB_8E,opcode_CB_8F\r
5241 .word opcode_CB_90,opcode_CB_91,opcode_CB_92,opcode_CB_93,opcode_CB_94,opcode_CB_95,opcode_CB_96,opcode_CB_97\r
5242 .word opcode_CB_98,opcode_CB_99,opcode_CB_9A,opcode_CB_9B,opcode_CB_9C,opcode_CB_9D,opcode_CB_9E,opcode_CB_9F\r
5243 .word opcode_CB_A0,opcode_CB_A1,opcode_CB_A2,opcode_CB_A3,opcode_CB_A4,opcode_CB_A5,opcode_CB_A6,opcode_CB_A7\r
5244 .word opcode_CB_A8,opcode_CB_A9,opcode_CB_AA,opcode_CB_AB,opcode_CB_AC,opcode_CB_AD,opcode_CB_AE,opcode_CB_AF\r
5245 .word opcode_CB_B0,opcode_CB_B1,opcode_CB_B2,opcode_CB_B3,opcode_CB_B4,opcode_CB_B5,opcode_CB_B6,opcode_CB_B7\r
5246 .word opcode_CB_B8,opcode_CB_B9,opcode_CB_BA,opcode_CB_BB,opcode_CB_BC,opcode_CB_BD,opcode_CB_BE,opcode_CB_BF\r
5247 .word opcode_CB_C0,opcode_CB_C1,opcode_CB_C2,opcode_CB_C3,opcode_CB_C4,opcode_CB_C5,opcode_CB_C6,opcode_CB_C7\r
5248 .word opcode_CB_C8,opcode_CB_C9,opcode_CB_CA,opcode_CB_CB,opcode_CB_CC,opcode_CB_CD,opcode_CB_CE,opcode_CB_CF\r
5249 .word opcode_CB_D0,opcode_CB_D1,opcode_CB_D2,opcode_CB_D3,opcode_CB_D4,opcode_CB_D5,opcode_CB_D6,opcode_CB_D7\r
5250 .word opcode_CB_D8,opcode_CB_D9,opcode_CB_DA,opcode_CB_DB,opcode_CB_DC,opcode_CB_DD,opcode_CB_DE,opcode_CB_DF\r
5251 .word opcode_CB_E0,opcode_CB_E1,opcode_CB_E2,opcode_CB_E3,opcode_CB_E4,opcode_CB_E5,opcode_CB_E6,opcode_CB_E7\r
5252 .word opcode_CB_E8,opcode_CB_E9,opcode_CB_EA,opcode_CB_EB,opcode_CB_EC,opcode_CB_ED,opcode_CB_EE,opcode_CB_EF\r
5253 .word opcode_CB_F0,opcode_CB_F1,opcode_CB_F2,opcode_CB_F3,opcode_CB_F4,opcode_CB_F5,opcode_CB_F6,opcode_CB_F7\r
5254 .word opcode_CB_F8,opcode_CB_F9,opcode_CB_FA,opcode_CB_FB,opcode_CB_FC,opcode_CB_FD,opcode_CB_FE,opcode_CB_FF\r
5255\r
5256;@CALL Z,NN\r
5257opcode_C_C:\r
5258 tst z80f,#1<<ZFlag\r
5259 bne opcode_C_D ;@unconditional CALL\r
5260 add z80pc,z80pc,#2\r
5261 fetch 10\r
5262;@CALL NN\r
5263opcode_C_D:\r
5264 ldrb r0,[z80pc],#1\r
5265 ldrb r1,[z80pc],#1\r
5266 ldr r2,[cpucontext,#z80pc_base]\r
5267 sub r2,z80pc,r2\r
5268 orr z80pc,r0,r1, lsl #8\r
5269 opPUSHareg r2\r
5270 mov r0,z80pc\r
5271 rebasepc\r
5272 fetch 17\r
5273;@ADC A,N\r
5274opcode_C_E:\r
5275 ldrb r0,[z80pc],#1\r
5276 opADCb\r
5277 fetch 7\r
5278;@RST 8H\r
5279opcode_C_F:\r
5280 opRST 0x08\r
5281\r
5282;@RET NC\r
5283opcode_D_0:\r
5284 tst z80f,#1<<CFlag\r
28d596af 5285 beq opcode_C_9_cond ;@unconditional RET\r
cc68a136 5286 fetch 5\r
5287;@POP DE\r
5288opcode_D_1:\r
5289 opPOPreg z80de\r
5290\r
5291;@JP NC, $+3\r
5292opcode_D_2 :\r
5293 tst z80f,#1<<CFlag\r
5294 beq opcode_C_3 ;@unconditional JP\r
5295 add z80pc,z80pc,#2\r
5296 fetch 10\r
5297;@OUT (N),A\r
5298opcode_D_3:\r
5299 ldrb r0,[z80pc],#1\r
5300 orr r0,r0,z80a,lsr#16\r
5301 mov r1,z80a, lsr #24\r
5302 opOUT\r
5303 fetch 11\r
5304;@CALL NC,NN\r
5305opcode_D_4:\r
5306 tst z80f,#1<<CFlag\r
5307 beq opcode_C_D ;@unconditional CALL\r
5308 add z80pc,z80pc,#2\r
5309 fetch 10\r
5310;@PUSH DE\r
5311opcode_D_5:\r
5312 opPUSHreg z80de\r
5313 fetch 11\r
5314;@SUB N\r
5315opcode_D_6:\r
5316 ldrb r0,[z80pc],#1\r
5317 opSUBb\r
5318 fetch 7\r
5319\r
5320;@RST 10H\r
5321opcode_D_7:\r
5322 opRST 0x10\r
5323\r
5324;@RET C\r
5325opcode_D_8:\r
5326 tst z80f,#1<<CFlag\r
28d596af 5327 bne opcode_C_9_cond ;@unconditional RET\r
cc68a136 5328 fetch 5\r
5329;@EXX\r
5330opcode_D_9:\r
5331 add r1,cpucontext,#z80bc2\r
5332 swp z80bc,z80bc,[r1]\r
5333 add r1,cpucontext,#z80de2\r
5334 swp z80de,z80de,[r1]\r
5335 add r1,cpucontext,#z80hl2\r
5336 swp z80hl,z80hl,[r1]\r
5337 fetch 4\r
5338;@JP C,$+3\r
5339opcode_D_A:\r
5340 tst z80f,#1<<CFlag\r
5341 bne opcode_C_3 ;@unconditional JP\r
5342 add z80pc,z80pc,#2\r
5343 fetch 10\r
5344;@IN A,(N)\r
5345opcode_D_B:\r
5346 ldrb r0,[z80pc],#1\r
5347 orr r0,r0,z80a,lsr#16\r
5348 opIN\r
5349 mov z80a,r0, lsl #24 ;@ r0 = data read\r
5350 fetch 11\r
5351;@CALL C,NN\r
5352opcode_D_C:\r
5353 tst z80f,#1<<CFlag\r
5354 bne opcode_C_D ;@unconditional CALL\r
5355 add z80pc,z80pc,#2\r
5356 fetch 10\r
5357\r
5358;@opcodes_DD\r
5359opcode_D_D:\r
5360 add z80xx,cpucontext,#z80ix\r
5361 b opcode_D_D_F_D\r
5362opcode_F_D:\r
5363 add z80xx,cpucontext,#z80iy\r
5364opcode_D_D_F_D:\r
5365 ldrb r0,[z80pc],#1\r
5366 ldr pc,[pc,r0, lsl #2]\r
5367opcodes_DD: .word 0x00000000\r
5368 .word opcode_0_0, opcode_0_1, opcode_0_2, opcode_0_3, opcode_0_4, opcode_0_5, opcode_0_6, opcode_0_7\r
5369 .word opcode_0_8, opcode_DD_09,opcode_0_A, opcode_0_B, opcode_0_C, opcode_0_D, opcode_0_E, opcode_0_F\r
5370 .word opcode_1_0, opcode_1_1, opcode_1_2, opcode_1_3, opcode_1_4, opcode_1_5, opcode_1_6, opcode_1_7\r
5371 .word opcode_1_8, opcode_DD_19,opcode_1_A, opcode_1_B, opcode_1_C, opcode_1_D, opcode_1_E, opcode_1_F\r
5372 .word opcode_2_0, opcode_DD_21,opcode_DD_22,opcode_DD_23,opcode_DD_24,opcode_DD_25,opcode_DD_26,opcode_2_7\r
5373 .word opcode_2_8, opcode_DD_29,opcode_DD_2A,opcode_DD_2B,opcode_DD_2C,opcode_DD_2D,opcode_DD_2E,opcode_2_F\r
5374 .word opcode_3_0, opcode_3_1, opcode_3_2, opcode_3_3, opcode_DD_34,opcode_DD_35,opcode_DD_36,opcode_3_7\r
5375 .word opcode_3_8, opcode_DD_39,opcode_3_A, opcode_3_B, opcode_3_C, opcode_3_D, opcode_3_E, opcode_3_F\r
5376 .word opcode_4_0, opcode_4_1, opcode_4_2, opcode_4_3, opcode_DD_44,opcode_DD_45,opcode_DD_46,opcode_4_7\r
5377 .word opcode_4_8, opcode_4_9, opcode_4_A, opcode_4_B, opcode_DD_4C,opcode_DD_4D,opcode_DD_4E,opcode_4_F\r
5378 .word opcode_5_0, opcode_5_1, opcode_5_2, opcode_5_3, opcode_DD_54,opcode_DD_55,opcode_DD_56,opcode_5_7\r
5379 .word opcode_5_8, opcode_5_9, opcode_5_A, opcode_5_B, opcode_DD_5C,opcode_DD_5D,opcode_DD_5E,opcode_5_F\r
5380 .word opcode_DD_60,opcode_DD_61,opcode_DD_62,opcode_DD_63,opcode_DD_64,opcode_DD_65,opcode_DD_66,opcode_DD_67\r
5381 .word opcode_DD_68,opcode_DD_69,opcode_DD_6A,opcode_DD_6B,opcode_DD_6C,opcode_DD_6D,opcode_DD_6E,opcode_DD_6F\r
5382 .word opcode_DD_70,opcode_DD_71,opcode_DD_72,opcode_DD_73,opcode_DD_74,opcode_DD_75,opcode_7_6, opcode_DD_77\r
5383 .word opcode_7_8, opcode_7_9, opcode_7_A, opcode_7_B, opcode_DD_7C,opcode_DD_7D,opcode_DD_7E,opcode_7_F\r
5384 .word opcode_8_0, opcode_8_1, opcode_8_2, opcode_8_3, opcode_DD_84,opcode_DD_85,opcode_DD_86,opcode_8_7\r
5385 .word opcode_8_8, opcode_8_9, opcode_8_A, opcode_8_B, opcode_DD_8C,opcode_DD_8D,opcode_DD_8E,opcode_8_F\r
5386 .word opcode_9_0, opcode_9_1, opcode_9_2, opcode_9_3, opcode_DD_94,opcode_DD_95,opcode_DD_96,opcode_9_7\r
5387 .word opcode_9_8, opcode_9_9, opcode_9_A, opcode_9_B, opcode_DD_9C,opcode_DD_9D,opcode_DD_9E,opcode_9_F\r
5388 .word opcode_A_0, opcode_A_1, opcode_A_2, opcode_A_3, opcode_DD_A4,opcode_DD_A5,opcode_DD_A6,opcode_A_7\r
5389 .word opcode_A_8, opcode_A_9, opcode_A_A, opcode_A_B, opcode_DD_AC,opcode_DD_AD,opcode_DD_AE,opcode_A_F\r
5390 .word opcode_B_0, opcode_B_1, opcode_B_2, opcode_B_3, opcode_DD_B4,opcode_DD_B5,opcode_DD_B6,opcode_B_7\r
5391 .word opcode_B_8, opcode_B_9, opcode_B_A, opcode_B_B, opcode_DD_BC,opcode_DD_BD,opcode_DD_BE,opcode_B_F\r
5392 .word opcode_C_0, opcode_C_1, opcode_C_2, opcode_C_3, opcode_C_4, opcode_C_5, opcode_C_6, opcode_C_7\r
5393 .word opcode_C_8, opcode_C_9, opcode_C_A, opcode_DD_CB,opcode_C_C, opcode_C_D, opcode_C_E, opcode_C_F\r
5394 .word opcode_D_0, opcode_D_1, opcode_D_2, opcode_D_3, opcode_D_4, opcode_D_5, opcode_D_6, opcode_D_7\r
5395 .word opcode_D_8, opcode_D_9, opcode_D_A, opcode_D_B, opcode_D_C, opcode_D_D, opcode_D_E, opcode_D_F\r
5396 .word opcode_E_0, opcode_DD_E1,opcode_E_2, opcode_DD_E3,opcode_E_4, opcode_DD_E5,opcode_E_6, opcode_E_7\r
5397 .word opcode_E_8, opcode_DD_E9,opcode_E_A, opcode_E_B, opcode_E_C, opcode_E_D, opcode_E_E, opcode_E_F\r
5398 .word opcode_F_0, opcode_F_1, opcode_F_2, opcode_F_3, opcode_F_4, opcode_F_5, opcode_F_6, opcode_F_7\r
5399 .word opcode_F_8, opcode_DD_F9,opcode_F_A, opcode_F_B, opcode_F_C, opcode_F_D, opcode_F_E, opcode_F_F\r
5400\r
5401;@SBC A,N\r
5402opcode_D_E:\r
5403 ldrb r0,[z80pc],#1\r
5404 opSBCb\r
5405 fetch 7\r
5406;@RST 18H\r
5407opcode_D_F:\r
5408 opRST 0x18\r
5409\r
5410;@RET PO\r
5411opcode_E_0:\r
5412 tst z80f,#1<<VFlag\r
28d596af 5413 beq opcode_C_9_cond ;@unconditional RET\r
cc68a136 5414 fetch 5\r
5415;@POP HL\r
5416opcode_E_1:\r
5417 opPOPreg z80hl\r
5418\r
5419;@JP PO,$+3\r
5420opcode_E_2:\r
5421 tst z80f,#1<<VFlag\r
5422 beq opcode_C_3 ;@unconditional JP\r
5423 add z80pc,z80pc,#2\r
5424 fetch 10\r
5425;@EX (SP),HL\r
5426opcode_E_3:\r
5427.if FAST_Z80SP\r
5428 ldrb r0,[z80sp]\r
5429 ldrb r1,[z80sp,#1]\r
5430 orr r0,r0,r1, lsl #8\r
5431 mov r1,z80hl, lsr #24\r
5432 strb r1,[z80sp,#1]\r
5433 mov r1,z80hl, lsr #16\r
5434 strb r1,[z80sp]\r
5435 mov z80hl,r0, lsl #16\r
5436.else\r
5437 mov r0,z80sp\r
5438 readmem16\r
5439 mov r1,r0\r
5440 mov r0,z80hl,lsr#16\r
5441 mov z80hl,r1,lsl#16\r
5442 mov r1,z80sp\r
5443 writemem16\r
5444.endif\r
5445 fetch 19\r
5446;@CALL PO,NN\r
5447opcode_E_4:\r
5448 tst z80f,#1<<VFlag\r
5449 beq opcode_C_D ;@unconditional CALL\r
5450 add z80pc,z80pc,#2\r
5451 fetch 10\r
5452;@PUSH HL\r
5453opcode_E_5:\r
5454 opPUSHreg z80hl\r
5455 fetch 11\r
5456;@AND N\r
5457opcode_E_6:\r
5458 ldrb r0,[z80pc],#1\r
5459 opANDb\r
5460 fetch 7\r
5461;@RST 20H\r
5462opcode_E_7:\r
5463 opRST 0x20\r
5464\r
5465;@RET PE\r
5466opcode_E_8:\r
5467 tst z80f,#1<<VFlag\r
28d596af 5468 bne opcode_C_9_cond ;@unconditional RET\r
cc68a136 5469 fetch 5\r
5470;@JP (HL)\r
5471opcode_E_9:\r
5472 mov r0,z80hl, lsr #16\r
5473 rebasepc\r
5474 fetch 4\r
5475;@JP PE,$+3\r
5476opcode_E_A:\r
5477 tst z80f,#1<<VFlag\r
5478 bne opcode_C_3 ;@unconditional JP\r
5479 add z80pc,z80pc,#2\r
5480 fetch 10\r
5481;@EX DE,HL\r
5482opcode_E_B:\r
5483 mov r1,z80de\r
5484 mov z80de,z80hl\r
5485 mov z80hl,r1\r
5486 fetch 4\r
5487;@CALL PE,NN\r
5488opcode_E_C:\r
5489 tst z80f,#1<<VFlag\r
5490 bne opcode_C_D ;@unconditional CALL\r
5491 add z80pc,z80pc,#2\r
5492 fetch 10\r
5493\r
5494;@This should be caught at start\r
5495opcode_E_D:\r
5496 ldrb r1,[z80pc],#1\r
5497 ldr pc,[pc,r1, lsl #2]\r
5498opcodes_ED: .word 0x00000000\r
5499 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5500 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5501 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5502 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5503 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5504 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5505 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5506 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5507 .word opcode_ED_40,opcode_ED_41,opcode_ED_42,opcode_ED_43,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_47\r
5508 .word opcode_ED_48,opcode_ED_49,opcode_ED_4A,opcode_ED_4B,opcode_ED_44,opcode_ED_4D,opcode_ED_46,opcode_ED_4F\r
5509 .word opcode_ED_50,opcode_ED_51,opcode_ED_52,opcode_ED_53,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_57\r
5510 .word opcode_ED_58,opcode_ED_59,opcode_ED_5A,opcode_ED_5B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_5F\r
5511 .word opcode_ED_60,opcode_ED_61,opcode_ED_62,opcode_ED_63,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_67\r
5512 .word opcode_ED_68,opcode_ED_69,opcode_ED_6A,opcode_ED_6B,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_6F\r
5513 .word opcode_ED_70,opcode_ED_71,opcode_ED_72,opcode_ED_73,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_NF\r
5514 .word opcode_ED_78,opcode_ED_79,opcode_ED_7A,opcode_ED_7B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_NF\r
5515 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5516 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5517 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5518 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5519 .word opcode_ED_A0,opcode_ED_A1,opcode_ED_A2,opcode_ED_A3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5520 .word opcode_ED_A8,opcode_ED_A9,opcode_ED_AA,opcode_ED_AB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5521 .word opcode_ED_B0,opcode_ED_B1,opcode_ED_B2,opcode_ED_B3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5522 .word opcode_ED_B8,opcode_ED_B9,opcode_ED_BA,opcode_ED_BB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5523 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5524 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5525 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5526 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5527 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5528 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5529 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5530 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5531\r
5532;@XOR N\r
5533opcode_E_E:\r
5534 ldrb r0,[z80pc],#1\r
5535 opXORb\r
5536 fetch 7\r
5537;@RST 28H\r
5538opcode_E_F:\r
5539 opRST 0x28\r
5540\r
5541;@RET P\r
5542opcode_F_0:\r
5543 tst z80f,#1<<SFlag\r
28d596af 5544 beq opcode_C_9_cond ;@unconditional RET\r
cc68a136 5545 fetch 5\r
5546;@POP AF\r
5547opcode_F_1:\r
5548.if FAST_Z80SP\r
5549 ldrb z80f,[z80sp],#1\r
5550 sub r0,opcodes,#0x200\r
5551 ldrb z80f,[r0,z80f]\r
5552 ldrb z80a,[z80sp],#1\r
5553 mov z80a,z80a, lsl #24\r
5554.else\r
5555 mov r0,z80sp\r
5556 readmem16\r
5557 add z80sp,z80sp,#2\r
5558 and z80a,r0,#0xFF00\r
5559 mov z80a,z80a,lsl#16\r
5560 and z80f,r0,#0xFF\r
5561 sub r0,opcodes,#0x200\r
5562 ldrb z80f,[r0,z80f]\r
5563.endif\r
5564 fetch 10\r
5565;@JP P,$+3\r
5566opcode_F_2:\r
5567 tst z80f,#1<<SFlag\r
5568 beq opcode_C_3 ;@unconditional JP\r
5569 add z80pc,z80pc,#2\r
5570 fetch 10\r
5571;@DI\r
5572opcode_F_3:\r
5573 ldrb r1,[cpucontext,#z80if]\r
5574 bic r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5575 strb r1,[cpucontext,#z80if]\r
5576 fetch 4\r
5577;@CALL P,NN\r
5578opcode_F_4:\r
5579 tst z80f,#1<<SFlag\r
5580 beq opcode_C_D ;@unconditional CALL\r
5581 add z80pc,z80pc,#2\r
5582 fetch 10\r
5583;@PUSH AF\r
5584opcode_F_5:\r
5585 sub r0,opcodes,#0x300\r
5586 ldrb r0,[r0,z80f]\r
5587 orr r2,r0,z80a,lsr#16\r
5588 opPUSHareg r2\r
5589 fetch 11\r
5590;@OR N\r
5591opcode_F_6:\r
5592 ldrb r0,[z80pc],#1\r
5593 opORb\r
5594 fetch 7\r
5595;@RST 30H\r
5596opcode_F_7:\r
5597 opRST 0x30\r
5598\r
5599;@RET M\r
5600opcode_F_8:\r
5601 tst z80f,#1<<SFlag\r
28d596af 5602 bne opcode_C_9_cond ;@unconditional RET\r
cc68a136 5603 fetch 5\r
5604;@LD SP,HL\r
5605opcode_F_9:\r
5606.if FAST_Z80SP\r
5607 mov r0,z80hl, lsr #16\r
5608 rebasesp\r
5609 mov z80sp,r0\r
5610.else\r
5611 mov z80sp,z80hl, lsr #16\r
5612.endif\r
28d596af 5613 fetch 6\r
cc68a136 5614;@JP M,$+3\r
5615opcode_F_A:\r
5616 tst z80f,#1<<SFlag\r
5617 bne opcode_C_3 ;@unconditional JP\r
5618 add z80pc,z80pc,#2\r
5619 fetch 10\r
5620MAIN_opcodes_POINTER: .word MAIN_opcodes\r
5621EI_DUMMY_opcodes_POINTER: .word EI_DUMMY_opcodes\r
5622;@EI\r
5623opcode_F_B:\r
5624 ldrb r1,[cpucontext,#z80if]\r
de89bf45 5625 mov r2,opcodes\r
cc68a136 5626 orr r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5627 strb r1,[cpucontext,#z80if]\r
5628\r
de89bf45 5629 ldrb r0,[z80pc],#1\r
5630 eatcycles 4\r
cc68a136 5631 ldr opcodes,EI_DUMMY_opcodes_POINTER\r
5632 ldr pc,[r2,r0, lsl #2]\r
5633\r
5634ei_return:\r
5635 ;@point that program returns from EI to check interupts\r
5636 ;@an interupt can not be taken directly after a EI opcode\r
5637 ;@ reset z80pc and opcode pointer\r
de89bf45 5638 ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
cc68a136 5639 sub z80pc,z80pc,#1\r
5640 ldr opcodes,MAIN_opcodes_POINTER\r
5641 ;@ check ints\r
de89bf45 5642 tst r0,#0xff\r
5643 movne r0,r0,lsr #8\r
5644 tstne r0,#1\r
5645 blne DoInterrupt\r
5646\r
cc68a136 5647 ;@ continue\r
de89bf45 5648 fetch 0\r
cc68a136 5649\r
5650;@CALL M,NN\r
5651opcode_F_C:\r
5652 tst z80f,#1<<SFlag\r
5653 bne opcode_C_D ;@unconditional CALL\r
5654 add z80pc,z80pc,#2\r
5655 fetch 10\r
5656\r
5657;@SHOULD BE CAUGHT AT START - FD SECTION\r
5658\r
5659;@CP N\r
5660opcode_F_E:\r
5661 ldrb r0,[z80pc],#1\r
5662 opCPb\r
5663 fetch 7\r
5664;@RST 38H\r
5665opcode_F_F:\r
5666 opRST 0x38\r
5667\r
5668\r
5669;@##################################\r
5670;@##################################\r
5671;@### opcodes CB #########################\r
5672;@##################################\r
5673;@##################################\r
5674\r
5675\r
5676;@RLC B\r
5677opcode_CB_00:\r
5678 opRLCH z80bc\r
5679;@RLC C\r
5680opcode_CB_01:\r
5681 opRLCL z80bc\r
5682;@RLC D\r
5683opcode_CB_02:\r
5684 opRLCH z80de\r
5685;@RLC E\r
5686opcode_CB_03:\r
5687 opRLCL z80de\r
5688;@RLC H\r
5689opcode_CB_04:\r
5690 opRLCH z80hl\r
5691;@RLC L\r
5692opcode_CB_05:\r
5693 opRLCL z80hl\r
5694;@RLC (HL)\r
5695opcode_CB_06:\r
5696 readmem8HL\r
5697 opRLCb\r
5698 writemem8HL\r
5699 fetch 15\r
5700;@RLC A\r
5701opcode_CB_07:\r
5702 opRLCA\r
5703\r
5704;@RRC B\r
5705opcode_CB_08:\r
5706 opRRCH z80bc\r
5707;@RRC C\r
5708opcode_CB_09:\r
5709 opRRCL z80bc\r
5710;@RRC D\r
5711opcode_CB_0A:\r
5712 opRRCH z80de\r
5713;@RRC E\r
5714opcode_CB_0B:\r
5715 opRRCL z80de\r
5716;@RRC H\r
5717opcode_CB_0C:\r
5718 opRRCH z80hl\r
5719;@RRC L\r
5720opcode_CB_0D:\r
5721 opRRCL z80hl\r
5722;@RRC (HL)\r
5723opcode_CB_0E :\r
5724 readmem8HL\r
5725 opRRCb\r
5726 writemem8HL\r
5727 fetch 15\r
5728;@RRC A\r
5729opcode_CB_0F:\r
5730 opRRCA\r
5731\r
5732;@RL B\r
5733opcode_CB_10:\r
5734 opRLH z80bc\r
5735;@RL C\r
5736opcode_CB_11:\r
5737 opRLL z80bc\r
5738;@RL D\r
5739opcode_CB_12:\r
5740 opRLH z80de\r
5741;@RL E\r
5742opcode_CB_13:\r
5743 opRLL z80de\r
5744;@RL H\r
5745opcode_CB_14:\r
5746 opRLH z80hl\r
5747;@RL L\r
5748opcode_CB_15:\r
5749 opRLL z80hl\r
5750;@RL (HL)\r
5751opcode_CB_16:\r
5752 readmem8HL\r
5753 opRLb\r
5754 writemem8HL\r
5755 fetch 15\r
5756;@RL A\r
5757opcode_CB_17:\r
5758 opRLA\r
5759\r
5760;@RR B \r
5761opcode_CB_18:\r
5762 opRRH z80bc\r
5763;@RR C\r
5764opcode_CB_19:\r
5765 opRRL z80bc\r
5766;@RR D\r
5767opcode_CB_1A:\r
5768 opRRH z80de\r
5769;@RR E\r
5770opcode_CB_1B:\r
5771 opRRL z80de\r
5772;@RR H\r
5773opcode_CB_1C:\r
5774 opRRH z80hl\r
5775;@RR L\r
5776opcode_CB_1D:\r
5777 opRRL z80hl\r
5778;@RR (HL)\r
5779opcode_CB_1E:\r
5780 readmem8HL\r
5781 opRRb\r
5782 writemem8HL\r
5783 fetch 15\r
5784;@RR A\r
5785opcode_CB_1F:\r
5786 opRRA\r
5787\r
5788;@SLA B\r
5789opcode_CB_20:\r
5790 opSLAH z80bc\r
5791;@SLA C\r
5792opcode_CB_21:\r
5793 opSLAL z80bc\r
5794;@SLA D\r
5795opcode_CB_22:\r
5796 opSLAH z80de\r
5797;@SLA E\r
5798opcode_CB_23:\r
5799 opSLAL z80de\r
5800;@SLA H\r
5801opcode_CB_24:\r
5802 opSLAH z80hl\r
5803;@SLA L\r
5804opcode_CB_25:\r
5805 opSLAL z80hl\r
5806;@SLA (HL)\r
5807opcode_CB_26:\r
5808 readmem8HL\r
5809 opSLAb\r
5810 writemem8HL\r
5811 fetch 15\r
5812;@SLA A\r
5813opcode_CB_27:\r
5814 opSLAA\r
5815\r
5816;@SRA B\r
5817opcode_CB_28:\r
5818 opSRAH z80bc\r
5819;@SRA C\r
5820opcode_CB_29:\r
5821 opSRAL z80bc\r
5822;@SRA D\r
5823opcode_CB_2A:\r
5824 opSRAH z80de\r
5825;@SRA E\r
5826opcode_CB_2B:\r
5827 opSRAL z80de\r
5828;@SRA H\r
5829opcode_CB_2C:\r
5830 opSRAH z80hl\r
5831;@SRA L\r
5832opcode_CB_2D:\r
5833 opSRAL z80hl\r
5834;@SRA (HL)\r
5835opcode_CB_2E:\r
5836 readmem8HL\r
5837 opSRAb\r
5838 writemem8HL\r
5839 fetch 15\r
5840;@SRA A\r
5841opcode_CB_2F:\r
5842 opSRAA\r
5843\r
5844;@SLL B\r
5845opcode_CB_30:\r
5846 opSLLH z80bc\r
5847;@SLL C\r
5848opcode_CB_31:\r
5849 opSLLL z80bc\r
5850;@SLL D\r
5851opcode_CB_32:\r
5852 opSLLH z80de\r
5853;@SLL E\r
5854opcode_CB_33:\r
5855 opSLLL z80de\r
5856;@SLL H\r
5857opcode_CB_34:\r
5858 opSLLH z80hl\r
5859;@SLL L\r
5860opcode_CB_35:\r
5861 opSLLL z80hl\r
5862;@SLL (HL)\r
5863opcode_CB_36:\r
5864 readmem8HL\r
5865 opSLLb\r
5866 writemem8HL\r
5867 fetch 15\r
5868;@SLL A\r
5869opcode_CB_37:\r
5870 opSLLA\r
5871\r
5872;@SRL B\r
5873opcode_CB_38:\r
5874 opSRLH z80bc\r
5875;@SRL C\r
5876opcode_CB_39:\r
5877 opSRLL z80bc\r
5878;@SRL D\r
5879opcode_CB_3A:\r
5880 opSRLH z80de\r
5881;@SRL E\r
5882opcode_CB_3B:\r
5883 opSRLL z80de\r
5884;@SRL H\r
5885opcode_CB_3C:\r
5886 opSRLH z80hl\r
5887;@SRL L\r
5888opcode_CB_3D:\r
5889 opSRLL z80hl\r
5890;@SRL (HL)\r
5891opcode_CB_3E:\r
5892 readmem8HL\r
5893 opSRLb\r
5894 writemem8HL\r
5895 fetch 15\r
5896;@SRL A\r
5897opcode_CB_3F:\r
5898 opSRLA\r
5899\r
5900\r
5901;@BIT 0,B\r
5902opcode_CB_40:\r
5903 opBITH z80bc 0\r
5904;@BIT 0,C\r
5905opcode_CB_41:\r
5906 opBITL z80bc 0\r
5907;@BIT 0,D\r
5908opcode_CB_42:\r
5909 opBITH z80de 0\r
5910;@BIT 0,E\r
5911opcode_CB_43:\r
5912 opBITL z80de 0\r
5913;@BIT 0,H\r
5914opcode_CB_44:\r
5915 opBITH z80hl 0\r
5916;@BIT 0,L\r
5917opcode_CB_45:\r
5918 opBITL z80hl 0\r
5919;@BIT 0,(HL)\r
5920opcode_CB_46:\r
5921 readmem8HL\r
5922 opBITb 0\r
5923 fetch 12\r
5924;@BIT 0,A\r
5925opcode_CB_47:\r
5926 opBITH z80a 0\r
5927\r
5928;@BIT 1,B\r
5929opcode_CB_48:\r
5930 opBITH z80bc 1\r
5931;@BIT 1,C\r
5932opcode_CB_49:\r
5933 opBITL z80bc 1\r
5934;@BIT 1,D\r
5935opcode_CB_4A:\r
5936 opBITH z80de 1\r
5937;@BIT 1,E\r
5938opcode_CB_4B:\r
5939 opBITL z80de 1\r
5940;@BIT 1,H\r
5941opcode_CB_4C:\r
5942 opBITH z80hl 1\r
5943;@BIT 1,L\r
5944opcode_CB_4D:\r
5945 opBITL z80hl 1\r
5946;@BIT 1,(HL)\r
5947opcode_CB_4E:\r
5948 readmem8HL\r
5949 opBITb 1\r
5950 fetch 12\r
5951;@BIT 1,A\r
5952opcode_CB_4F:\r
5953 opBITH z80a 1\r
5954\r
5955;@BIT 2,B\r
5956opcode_CB_50:\r
5957 opBITH z80bc 2\r
5958;@BIT 2,C\r
5959opcode_CB_51:\r
5960 opBITL z80bc 2\r
5961;@BIT 2,D\r
5962opcode_CB_52:\r
5963 opBITH z80de 2\r
5964;@BIT 2,E\r
5965opcode_CB_53:\r
5966 opBITL z80de 2\r
5967;@BIT 2,H\r
5968opcode_CB_54:\r
5969 opBITH z80hl 2\r
5970;@BIT 2,L\r
5971opcode_CB_55:\r
5972 opBITL z80hl 2\r
5973;@BIT 2,(HL)\r
5974opcode_CB_56:\r
5975 readmem8HL\r
5976 opBITb 2\r
5977 fetch 12\r
5978;@BIT 2,A\r
5979opcode_CB_57:\r
5980 opBITH z80a 2\r
5981\r
5982;@BIT 3,B\r
5983opcode_CB_58:\r
5984 opBITH z80bc 3\r
5985;@BIT 3,C\r
5986opcode_CB_59:\r
5987 opBITL z80bc 3\r
5988;@BIT 3,D\r
5989opcode_CB_5A:\r
5990 opBITH z80de 3\r
5991;@BIT 3,E\r
5992opcode_CB_5B:\r
5993 opBITL z80de 3\r
5994;@BIT 3,H\r
5995opcode_CB_5C:\r
5996 opBITH z80hl 3\r
5997;@BIT 3,L\r
5998opcode_CB_5D:\r
5999 opBITL z80hl 3\r
6000;@BIT 3,(HL)\r
6001opcode_CB_5E:\r
6002 readmem8HL\r
6003 opBITb 3\r
6004 fetch 12\r
6005;@BIT 3,A\r
6006opcode_CB_5F:\r
6007 opBITH z80a 3\r
6008\r
6009;@BIT 4,B\r
6010opcode_CB_60:\r
6011 opBITH z80bc 4\r
6012;@BIT 4,C\r
6013opcode_CB_61:\r
6014 opBITL z80bc 4\r
6015;@BIT 4,D\r
6016opcode_CB_62:\r
6017 opBITH z80de 4\r
6018;@BIT 4,E\r
6019opcode_CB_63:\r
6020 opBITL z80de 4\r
6021;@BIT 4,H\r
6022opcode_CB_64:\r
6023 opBITH z80hl 4\r
6024;@BIT 4,L\r
6025opcode_CB_65:\r
6026 opBITL z80hl 4\r
6027;@BIT 4,(HL)\r
6028opcode_CB_66:\r
6029 readmem8HL\r
6030 opBITb 4\r
6031 fetch 12\r
6032;@BIT 4,A\r
6033opcode_CB_67:\r
6034 opBITH z80a 4\r
6035\r
6036;@BIT 5,B\r
6037opcode_CB_68:\r
6038 opBITH z80bc 5\r
6039;@BIT 5,C\r
6040opcode_CB_69:\r
6041 opBITL z80bc 5\r
6042;@BIT 5,D\r
6043opcode_CB_6A:\r
6044 opBITH z80de 5\r
6045;@BIT 5,E\r
6046opcode_CB_6B:\r
6047 opBITL z80de 5\r
6048;@BIT 5,H\r
6049opcode_CB_6C:\r
6050 opBITH z80hl 5\r
6051;@BIT 5,L\r
6052opcode_CB_6D:\r
6053 opBITL z80hl 5\r
6054;@BIT 5,(HL)\r
6055opcode_CB_6E:\r
6056 readmem8HL\r
6057 opBITb 5\r
6058 fetch 12\r
6059;@BIT 5,A\r
6060opcode_CB_6F:\r
6061 opBITH z80a 5\r
6062\r
6063;@BIT 6,B\r
6064opcode_CB_70:\r
6065 opBITH z80bc 6\r
6066;@BIT 6,C\r
6067opcode_CB_71:\r
6068 opBITL z80bc 6\r
6069;@BIT 6,D\r
6070opcode_CB_72:\r
6071 opBITH z80de 6\r
6072;@BIT 6,E\r
6073opcode_CB_73:\r
6074 opBITL z80de 6\r
6075;@BIT 6,H\r
6076opcode_CB_74:\r
6077 opBITH z80hl 6\r
6078;@BIT 6,L\r
6079opcode_CB_75:\r
6080 opBITL z80hl 6\r
6081;@BIT 6,(HL)\r
6082opcode_CB_76:\r
6083 readmem8HL\r
6084 opBITb 6\r
6085 fetch 12\r
6086;@BIT 6,A\r
6087opcode_CB_77:\r
6088 opBITH z80a 6\r
6089\r
6090;@BIT 7,B\r
6091opcode_CB_78:\r
6092 opBIT7H z80bc\r
6093;@BIT 7,C\r
6094opcode_CB_79:\r
6095 opBIT7L z80bc\r
6096;@BIT 7,D\r
6097opcode_CB_7A:\r
6098 opBIT7H z80de\r
6099;@BIT 7,E\r
6100opcode_CB_7B:\r
6101 opBIT7L z80de\r
6102;@BIT 7,H\r
6103opcode_CB_7C:\r
6104 opBIT7H z80hl\r
6105;@BIT 7,L\r
6106opcode_CB_7D:\r
6107 opBIT7L z80hl\r
6108;@BIT 7,(HL)\r
6109opcode_CB_7E:\r
6110 readmem8HL\r
6111 opBIT7b\r
6112 fetch 12\r
6113;@BIT 7,A\r
6114opcode_CB_7F:\r
6115 opBIT7H z80a\r
6116\r
6117;@RES 0,B\r
6118opcode_CB_80:\r
6119 bic z80bc,z80bc,#1<<24\r
6120 fetch 8\r
6121;@RES 0,C\r
6122opcode_CB_81:\r
6123 bic z80bc,z80bc,#1<<16\r
6124 fetch 8\r
6125;@RES 0,D\r
6126opcode_CB_82:\r
6127 bic z80de,z80de,#1<<24\r
6128 fetch 8\r
6129;@RES 0,E\r
6130opcode_CB_83:\r
6131 bic z80de,z80de,#1<<16\r
6132 fetch 8\r
6133;@RES 0,H\r
6134opcode_CB_84:\r
6135 bic z80hl,z80hl,#1<<24\r
6136 fetch 8\r
6137;@RES 0,L\r
6138opcode_CB_85:\r
6139 bic z80hl,z80hl,#1<<16\r
6140 fetch 8\r
6141;@RES 0,(HL)\r
6142opcode_CB_86:\r
6143 opRESmemHL 0\r
6144;@RES 0,A\r
6145opcode_CB_87:\r
6146 bic z80a,z80a,#1<<24\r
6147 fetch 8\r
6148\r
6149;@RES 1,B\r
6150opcode_CB_88:\r
6151 bic z80bc,z80bc,#1<<25\r
6152 fetch 8\r
6153;@RES 1,C\r
6154opcode_CB_89:\r
6155 bic z80bc,z80bc,#1<<17\r
6156 fetch 8\r
6157;@RES 1,D\r
6158opcode_CB_8A:\r
6159 bic z80de,z80de,#1<<25\r
6160 fetch 8\r
6161;@RES 1,E\r
6162opcode_CB_8B:\r
6163 bic z80de,z80de,#1<<17\r
6164 fetch 8\r
6165;@RES 1,H\r
6166opcode_CB_8C:\r
6167 bic z80hl,z80hl,#1<<25\r
6168 fetch 8\r
6169;@RES 1,L\r
6170opcode_CB_8D:\r
6171 bic z80hl,z80hl,#1<<17\r
6172 fetch 8\r
6173;@RES 1,(HL)\r
6174opcode_CB_8E:\r
6175 opRESmemHL 1\r
6176;@RES 1,A\r
6177opcode_CB_8F:\r
6178 bic z80a,z80a,#1<<25\r
6179 fetch 8\r
6180\r
6181;@RES 2,B\r
6182opcode_CB_90:\r
6183 bic z80bc,z80bc,#1<<26\r
6184 fetch 8\r
6185;@RES 2,C\r
6186opcode_CB_91:\r
6187 bic z80bc,z80bc,#1<<18\r
6188 fetch 8\r
6189;@RES 2,D\r
6190opcode_CB_92:\r
6191 bic z80de,z80de,#1<<26\r
6192 fetch 8\r
6193;@RES 2,E\r
6194opcode_CB_93:\r
6195 bic z80de,z80de,#1<<18\r
6196 fetch 8\r
6197;@RES 2,H\r
6198opcode_CB_94:\r
6199 bic z80hl,z80hl,#1<<26\r
6200 fetch 8\r
6201;@RES 2,L\r
6202opcode_CB_95:\r
6203 bic z80hl,z80hl,#1<<18\r
6204 fetch 8\r
6205;@RES 2,(HL)\r
6206opcode_CB_96:\r
6207 opRESmemHL 2\r
6208;@RES 2,A\r
6209opcode_CB_97:\r
6210 bic z80a,z80a,#1<<26\r
6211 fetch 8\r
6212\r
6213;@RES 3,B\r
6214opcode_CB_98:\r
6215 bic z80bc,z80bc,#1<<27\r
6216 fetch 8\r
6217;@RES 3,C\r
6218opcode_CB_99:\r
6219 bic z80bc,z80bc,#1<<19\r
6220 fetch 8\r
6221;@RES 3,D\r
6222opcode_CB_9A:\r
6223 bic z80de,z80de,#1<<27\r
6224 fetch 8\r
6225;@RES 3,E\r
6226opcode_CB_9B:\r
6227 bic z80de,z80de,#1<<19\r
6228 fetch 8\r
6229;@RES 3,H\r
6230opcode_CB_9C:\r
6231 bic z80hl,z80hl,#1<<27\r
6232 fetch 8\r
6233;@RES 3,L\r
6234opcode_CB_9D:\r
6235 bic z80hl,z80hl,#1<<19\r
6236 fetch 8\r
6237;@RES 3,(HL)\r
6238opcode_CB_9E:\r
6239 opRESmemHL 3\r
6240;@RES 3,A\r
6241opcode_CB_9F:\r
6242 bic z80a,z80a,#1<<27\r
6243 fetch 8\r
6244\r
6245;@RES 4,B\r
6246opcode_CB_A0:\r
6247 bic z80bc,z80bc,#1<<28\r
6248 fetch 8\r
6249;@RES 4,C\r
6250opcode_CB_A1:\r
6251 bic z80bc,z80bc,#1<<20\r
6252 fetch 8\r
6253;@RES 4,D\r
6254opcode_CB_A2:\r
6255 bic z80de,z80de,#1<<28\r
6256 fetch 8\r
6257;@RES 4,E\r
6258opcode_CB_A3:\r
6259 bic z80de,z80de,#1<<20\r
6260 fetch 8\r
6261;@RES 4,H\r
6262opcode_CB_A4:\r
6263 bic z80hl,z80hl,#1<<28\r
6264 fetch 8\r
6265;@RES 4,L\r
6266opcode_CB_A5:\r
6267 bic z80hl,z80hl,#1<<20\r
6268 fetch 8\r
6269;@RES 4,(HL)\r
6270opcode_CB_A6:\r
6271 opRESmemHL 4\r
6272;@RES 4,A\r
6273opcode_CB_A7:\r
6274 bic z80a,z80a,#1<<28\r
6275 fetch 8\r
6276\r
6277;@RES 5,B\r
6278opcode_CB_A8:\r
6279 bic z80bc,z80bc,#1<<29\r
6280 fetch 8\r
6281;@RES 5,C\r
6282opcode_CB_A9:\r
6283 bic z80bc,z80bc,#1<<21\r
6284 fetch 8\r
6285;@RES 5,D\r
6286opcode_CB_AA:\r
6287 bic z80de,z80de,#1<<29\r
6288 fetch 8\r
6289;@RES 5,E\r
6290opcode_CB_AB:\r
6291 bic z80de,z80de,#1<<21\r
6292 fetch 8\r
6293;@RES 5,H\r
6294opcode_CB_AC:\r
6295 bic z80hl,z80hl,#1<<29\r
6296 fetch 8\r
6297;@RES 5,L\r
6298opcode_CB_AD:\r
6299 bic z80hl,z80hl,#1<<21\r
6300 fetch 8\r
6301;@RES 5,(HL)\r
6302opcode_CB_AE:\r
6303 opRESmemHL 5\r
6304;@RES 5,A\r
6305opcode_CB_AF:\r
6306 bic z80a,z80a,#1<<29\r
6307 fetch 8\r
6308\r
6309;@RES 6,B\r
6310opcode_CB_B0:\r
6311 bic z80bc,z80bc,#1<<30\r
6312 fetch 8\r
6313;@RES 6,C\r
6314opcode_CB_B1:\r
6315 bic z80bc,z80bc,#1<<22\r
6316 fetch 8\r
6317;@RES 6,D\r
6318opcode_CB_B2:\r
6319 bic z80de,z80de,#1<<30\r
6320 fetch 8\r
6321;@RES 6,E\r
6322opcode_CB_B3:\r
6323 bic z80de,z80de,#1<<22\r
6324 fetch 8\r
6325;@RES 6,H\r
6326opcode_CB_B4:\r
6327 bic z80hl,z80hl,#1<<30\r
6328 fetch 8\r
6329;@RES 6,L\r
6330opcode_CB_B5:\r
6331 bic z80hl,z80hl,#1<<22\r
6332 fetch 8\r
6333;@RES 6,(HL)\r
6334opcode_CB_B6:\r
6335 opRESmemHL 6\r
6336;@RES 6,A\r
6337opcode_CB_B7:\r
6338 bic z80a,z80a,#1<<30\r
6339 fetch 8\r
6340\r
6341;@RES 7,B\r
6342opcode_CB_B8:\r
6343 bic z80bc,z80bc,#1<<31\r
6344 fetch 8\r
6345;@RES 7,C\r
6346opcode_CB_B9:\r
6347 bic z80bc,z80bc,#1<<23\r
6348 fetch 8\r
6349;@RES 7,D\r
6350opcode_CB_BA:\r
6351 bic z80de,z80de,#1<<31\r
6352 fetch 8\r
6353;@RES 7,E\r
6354opcode_CB_BB:\r
6355 bic z80de,z80de,#1<<23\r
6356 fetch 8\r
6357;@RES 7,H\r
6358opcode_CB_BC:\r
6359 bic z80hl,z80hl,#1<<31\r
6360 fetch 8\r
6361;@RES 7,L\r
6362opcode_CB_BD:\r
6363 bic z80hl,z80hl,#1<<23\r
6364 fetch 8\r
6365;@RES 7,(HL)\r
6366opcode_CB_BE:\r
6367 opRESmemHL 7\r
6368;@RES 7,A\r
6369opcode_CB_BF:\r
6370 bic z80a,z80a,#1<<31\r
6371 fetch 8\r
6372\r
6373;@SET 0,B\r
6374opcode_CB_C0:\r
6375 orr z80bc,z80bc,#1<<24\r
6376 fetch 8\r
6377;@SET 0,C\r
6378opcode_CB_C1:\r
6379 orr z80bc,z80bc,#1<<16\r
6380 fetch 8\r
6381;@SET 0,D\r
6382opcode_CB_C2:\r
6383 orr z80de,z80de,#1<<24\r
6384 fetch 8\r
6385;@SET 0,E\r
6386opcode_CB_C3:\r
6387 orr z80de,z80de,#1<<16\r
6388 fetch 8\r
6389;@SET 0,H\r
6390opcode_CB_C4:\r
6391 orr z80hl,z80hl,#1<<24\r
6392 fetch 8\r
6393;@SET 0,L\r
6394opcode_CB_C5:\r
6395 orr z80hl,z80hl,#1<<16\r
6396 fetch 8\r
6397;@SET 0,(HL)\r
6398opcode_CB_C6:\r
6399 opSETmemHL 0\r
6400;@SET 0,A\r
6401opcode_CB_C7:\r
6402 orr z80a,z80a,#1<<24\r
6403 fetch 8\r
6404\r
6405;@SET 1,B\r
6406opcode_CB_C8:\r
6407 orr z80bc,z80bc,#1<<25\r
6408 fetch 8\r
6409;@SET 1,C\r
6410opcode_CB_C9:\r
6411 orr z80bc,z80bc,#1<<17\r
6412 fetch 8\r
6413;@SET 1,D\r
6414opcode_CB_CA:\r
6415 orr z80de,z80de,#1<<25\r
6416 fetch 8\r
6417;@SET 1,E\r
6418opcode_CB_CB:\r
6419 orr z80de,z80de,#1<<17\r
6420 fetch 8\r
6421;@SET 1,H\r
6422opcode_CB_CC:\r
6423 orr z80hl,z80hl,#1<<25\r
6424 fetch 8\r
6425;@SET 1,L\r
6426opcode_CB_CD:\r
6427 orr z80hl,z80hl,#1<<17\r
6428 fetch 8\r
6429;@SET 1,(HL)\r
6430opcode_CB_CE:\r
6431 opSETmemHL 1\r
6432;@SET 1,A\r
6433opcode_CB_CF:\r
6434 orr z80a,z80a,#1<<25\r
6435 fetch 8\r
6436\r
6437;@SET 2,B\r
6438opcode_CB_D0:\r
6439 orr z80bc,z80bc,#1<<26\r
6440 fetch 8\r
6441;@SET 2,C\r
6442opcode_CB_D1:\r
6443 orr z80bc,z80bc,#1<<18\r
6444 fetch 8\r
6445;@SET 2,D\r
6446opcode_CB_D2:\r
6447 orr z80de,z80de,#1<<26\r
6448 fetch 8\r
6449;@SET 2,E\r
6450opcode_CB_D3:\r
6451 orr z80de,z80de,#1<<18\r
6452 fetch 8\r
6453;@SET 2,H\r
6454opcode_CB_D4:\r
6455 orr z80hl,z80hl,#1<<26\r
6456 fetch 8\r
6457;@SET 2,L\r
6458opcode_CB_D5:\r
6459 orr z80hl,z80hl,#1<<18\r
6460 fetch 8\r
6461;@SET 2,(HL)\r
6462opcode_CB_D6:\r
6463 opSETmemHL 2\r
6464;@SET 2,A\r
6465opcode_CB_D7:\r
6466 orr z80a,z80a,#1<<26\r
6467 fetch 8\r
6468\r
6469;@SET 3,B\r
6470opcode_CB_D8:\r
6471 orr z80bc,z80bc,#1<<27\r
6472 fetch 8\r
6473;@SET 3,C\r
6474opcode_CB_D9:\r
6475 orr z80bc,z80bc,#1<<19\r
6476 fetch 8\r
6477;@SET 3,D\r
6478opcode_CB_DA:\r
6479 orr z80de,z80de,#1<<27\r
6480 fetch 8\r
6481;@SET 3,E\r
6482opcode_CB_DB:\r
6483 orr z80de,z80de,#1<<19\r
6484 fetch 8\r
6485;@SET 3,H\r
6486opcode_CB_DC:\r
6487 orr z80hl,z80hl,#1<<27\r
6488 fetch 8\r
6489;@SET 3,L\r
6490opcode_CB_DD:\r
6491 orr z80hl,z80hl,#1<<19\r
6492 fetch 8\r
6493;@SET 3,(HL)\r
6494opcode_CB_DE:\r
6495 opSETmemHL 3\r
6496;@SET 3,A\r
6497opcode_CB_DF:\r
6498 orr z80a,z80a,#1<<27\r
6499 fetch 8\r
6500\r
6501;@SET 4,B\r
6502opcode_CB_E0:\r
6503 orr z80bc,z80bc,#1<<28\r
6504 fetch 8\r
6505;@SET 4,C\r
6506opcode_CB_E1:\r
6507 orr z80bc,z80bc,#1<<20\r
6508 fetch 8\r
6509;@SET 4,D\r
6510opcode_CB_E2:\r
6511 orr z80de,z80de,#1<<28\r
6512 fetch 8\r
6513;@SET 4,E\r
6514opcode_CB_E3:\r
6515 orr z80de,z80de,#1<<20\r
6516 fetch 8\r
6517;@SET 4,H\r
6518opcode_CB_E4:\r
6519 orr z80hl,z80hl,#1<<28\r
6520 fetch 8\r
6521;@SET 4,L\r
6522opcode_CB_E5:\r
6523 orr z80hl,z80hl,#1<<20\r
6524 fetch 8\r
6525;@SET 4,(HL)\r
6526opcode_CB_E6:\r
6527 opSETmemHL 4\r
6528;@SET 4,A\r
6529opcode_CB_E7:\r
6530 orr z80a,z80a,#1<<28\r
6531 fetch 8\r
6532\r
6533;@SET 5,B\r
6534opcode_CB_E8:\r
6535 orr z80bc,z80bc,#1<<29\r
6536 fetch 8\r
6537;@SET 5,C\r
6538opcode_CB_E9:\r
6539 orr z80bc,z80bc,#1<<21\r
6540 fetch 8\r
6541;@SET 5,D\r
6542opcode_CB_EA:\r
6543 orr z80de,z80de,#1<<29\r
6544 fetch 8\r
6545;@SET 5,E\r
6546opcode_CB_EB:\r
6547 orr z80de,z80de,#1<<21\r
6548 fetch 8\r
6549;@SET 5,H\r
6550opcode_CB_EC:\r
6551 orr z80hl,z80hl,#1<<29\r
6552 fetch 8\r
6553;@SET 5,L\r
6554opcode_CB_ED:\r
6555 orr z80hl,z80hl,#1<<21\r
6556 fetch 8\r
6557;@SET 5,(HL)\r
6558opcode_CB_EE:\r
6559 opSETmemHL 5\r
6560;@SET 5,A\r
6561opcode_CB_EF:\r
6562 orr z80a,z80a,#1<<29\r
6563 fetch 8\r
6564\r
6565;@SET 6,B\r
6566opcode_CB_F0:\r
6567 orr z80bc,z80bc,#1<<30\r
6568 fetch 8\r
6569;@SET 6,C\r
6570opcode_CB_F1:\r
6571 orr z80bc,z80bc,#1<<22\r
6572 fetch 8\r
6573;@SET 6,D\r
6574opcode_CB_F2:\r
6575 orr z80de,z80de,#1<<30\r
6576 fetch 8\r
6577;@SET 6,E\r
6578opcode_CB_F3:\r
6579 orr z80de,z80de,#1<<22\r
6580 fetch 8\r
6581;@SET 6,H\r
6582opcode_CB_F4:\r
6583 orr z80hl,z80hl,#1<<30\r
6584 fetch 8\r
6585;@SET 6,L\r
6586opcode_CB_F5:\r
6587 orr z80hl,z80hl,#1<<22\r
6588 fetch 8\r
6589;@SET 6,(HL)\r
6590opcode_CB_F6:\r
6591 opSETmemHL 6\r
6592;@SET 6,A\r
6593opcode_CB_F7:\r
6594 orr z80a,z80a,#1<<30\r
6595 fetch 8\r
6596\r
6597;@SET 7,B\r
6598opcode_CB_F8:\r
6599 orr z80bc,z80bc,#1<<31\r
6600 fetch 8\r
6601;@SET 7,C\r
6602opcode_CB_F9:\r
6603 orr z80bc,z80bc,#1<<23\r
6604 fetch 8\r
6605;@SET 7,D\r
6606opcode_CB_FA:\r
6607 orr z80de,z80de,#1<<31\r
6608 fetch 8\r
6609;@SET 7,E\r
6610opcode_CB_FB:\r
6611 orr z80de,z80de,#1<<23\r
6612 fetch 8\r
6613;@SET 7,H\r
6614opcode_CB_FC:\r
6615 orr z80hl,z80hl,#1<<31\r
6616 fetch 8\r
6617;@SET 7,L\r
6618opcode_CB_FD:\r
6619 orr z80hl,z80hl,#1<<23\r
6620 fetch 8\r
6621;@SET 7,(HL)\r
6622opcode_CB_FE:\r
6623 opSETmemHL 7\r
6624;@SET 7,A\r
6625opcode_CB_FF:\r
6626 orr z80a,z80a,#1<<31\r
6627 fetch 8\r
6628\r
6629\r
6630\r
6631;@##################################\r
6632;@##################################\r
6633;@### opcodes DD #########################\r
6634;@##################################\r
6635;@##################################\r
6636;@Because the DD opcodes are not a complete range from 00-FF I have\r
6637;@created this sub routine that will catch any undocumented ops\r
6638;@halt the emulator and mov the current instruction to r0\r
6639;@at a later stage I may change to display a text message on the screen\r
6640opcode_DD_NF:\r
6641 eatcycles 4\r
6642 ldr pc,[opcodes,r0, lsl #2]\r
6643;@ mov r2,#0x10*4\r
6644;@ cmp r2,z80xx\r
6645;@ bne opcode_FD_NF\r
6646;@ mov r0,#0xDD00\r
6647;@ orr r0,r0,r1\r
6648;@ b end_loop\r
6649;@opcode_FD_NF:\r
6650;@ mov r0,#0xFD00\r
6651;@ orr r0,r0,r1\r
6652;@ b end_loop\r
f0243975 6653\r
cc68a136 6654opcode_DD_NF2:\r
28d596af 6655 fetch 23\r
f0243975 6656;@ notaz: we don't want to deadlock here\r
6657;@ mov r0,#0xDD0000\r
6658;@ orr r0,r0,#0xCB00\r
6659;@ orr r0,r0,r1\r
6660;@ b end_loop\r
cc68a136 6661\r
6662;@ADD IX,BC\r
6663opcode_DD_09:\r
6664 ldr r0,[z80xx]\r
6665 opADD16 r0 z80bc\r
6666 str r0,[z80xx]\r
6667 fetch 15\r
6668;@ADD IX,DE\r
6669opcode_DD_19:\r
6670 ldr r0,[z80xx]\r
6671 opADD16 r0 z80de\r
6672 str r0,[z80xx]\r
6673 fetch 15\r
6674;@LD IX,NN\r
6675opcode_DD_21:\r
6676 ldrb r0,[z80pc],#1\r
6677 ldrb r1,[z80pc],#1\r
6678 orr r0,r0,r1, lsl #8\r
6679 strh r0,[z80xx,#2]\r
6680 fetch 14\r
6681;@LD (NN),IX\r
6682opcode_DD_22:\r
6683 ldrb r0,[z80pc],#1\r
6684 ldrb r1,[z80pc],#1\r
6685 orr r1,r0,r1, lsl #8\r
6686 ldrh r0,[z80xx,#2]\r
6687 writemem16\r
6688 fetch 20\r
6689;@INC IX\r
6690opcode_DD_23:\r
6691 ldr r0,[z80xx]\r
6692 add r0,r0,#1<<16\r
6693 str r0,[z80xx]\r
6694 fetch 10\r
6695;@INC I (IX)\r
6696opcode_DD_24:\r
6697 ldr r0,[z80xx]\r
6698 opINC8H r0\r
6699 str r0,[z80xx]\r
6700 fetch 8\r
6701;@DEC I (IX)\r
6702opcode_DD_25:\r
6703 ldr r0,[z80xx]\r
6704 opDEC8H r0\r
6705 str r0,[z80xx]\r
6706 fetch 8\r
6707;@LD I,N (IX)\r
6708opcode_DD_26:\r
6709 ldrb r0,[z80pc],#1\r
6710 strb r0,[z80xx,#3]\r
6711 fetch 11\r
6712;@ADD IX,IX\r
6713opcode_DD_29:\r
6714 ldr r0,[z80xx]\r
6715 opADD16_2 r0\r
6716 str r0,[z80xx]\r
6717 fetch 15\r
6718;@LD IX,(NN)\r
6719opcode_DD_2A:\r
6720 ldrb r0,[z80pc],#1\r
6721 ldrb r1,[z80pc],#1\r
6722 orr r0,r0,r1, lsl #8\r
6723 stmfd sp!,{z80xx}\r
6724 readmem16\r
6725 ldmfd sp!,{z80xx}\r
6726 strh r0,[z80xx,#2]\r
6727 fetch 20\r
6728;@DEC IX\r
6729opcode_DD_2B:\r
6730 ldr r0,[z80xx]\r
6731 sub r0,r0,#1<<16\r
6732 str r0,[z80xx]\r
6733 fetch 10\r
6734;@INC X (IX)\r
6735opcode_DD_2C:\r
6736 ldr r0,[z80xx]\r
6737 opINC8L r0\r
6738 str r0,[z80xx]\r
6739 fetch 8\r
6740;@DEC X (IX)\r
6741opcode_DD_2D:\r
6742 ldr r0,[z80xx]\r
6743 opDEC8L r0\r
6744 str r0,[z80xx]\r
6745 fetch 8\r
6746;@LD X,N (IX)\r
6747opcode_DD_2E:\r
6748 ldrb r0,[z80pc],#1\r
6749 strb r0,[z80xx,#2]\r
6750 fetch 11\r
6751;@INC (IX+N)\r
6752opcode_DD_34:\r
6753 ldrsb r0,[z80pc],#1\r
6754 ldr r1,[z80xx]\r
6755 add r0,r0,r1, lsr #16\r
6756 stmfd sp!,{r0} ;@ save addr\r
6757 readmem8\r
6758 opINC8b\r
6759 ldmfd sp!,{r1} ;@ restore addr into r1\r
6760 writemem8\r
6761 fetch 23\r
6762;@DEC (IX+N)\r
6763opcode_DD_35:\r
6764 ldrsb r0,[z80pc],#1\r
6765 ldr r1,[z80xx]\r
6766 add r0,r0,r1, lsr #16\r
6767 stmfd sp!,{r0} ;@ save addr\r
6768 readmem8\r
6769 opDEC8b\r
6770 ldmfd sp!,{r1} ;@ restore addr into r1\r
6771 writemem8\r
6772 fetch 23\r
6773;@LD (IX+N),N\r
6774opcode_DD_36:\r
6775 ldrsb r2,[z80pc],#1\r
6776 ldrb r0,[z80pc],#1\r
6777 ldr r1,[z80xx]\r
6778 add r1,r2,r1, lsr #16\r
6779 writemem8\r
6780 fetch 19\r
6781;@ADD IX,SP\r
6782opcode_DD_39:\r
6783 ldr r0,[z80xx]\r
6784.if FAST_Z80SP\r
6785 ldr r2,[cpucontext,#z80sp_base]\r
6786 sub r2,z80sp,r2\r
6787 opADD16s r0 r2 16\r
6788.else\r
6789 opADD16s r0 z80sp 16\r
6790.endif\r
6791 str r0,[z80xx]\r
6792 fetch 15\r
6793;@LD B,I ( IX )\r
6794opcode_DD_44:\r
6795 ldrb r0,[z80xx,#3]\r
6796 and z80bc,z80bc,#0xFF<<16\r
6797 orr z80bc,z80bc,r0, lsl #24\r
6798 fetch 8\r
6799;@LD B,X ( IX )\r
6800opcode_DD_45:\r
6801 ldrb r0,[z80xx,#2]\r
6802 and z80bc,z80bc,#0xFF<<16\r
6803 orr z80bc,z80bc,r0, lsl #24\r
6804 fetch 8\r
6805;@LD B,(IX,N)\r
6806opcode_DD_46:\r
6807 ldrsb r0,[z80pc],#1\r
6808 ldr r1,[z80xx]\r
6809 add r0,r0,r1, lsr #16\r
6810 readmem8\r
6811 and z80bc,z80bc,#0xFF<<16\r
6812 orr z80bc,z80bc,r0, lsl #24\r
6813 fetch 19\r
6814;@LD C,I (IX)\r
6815opcode_DD_4C:\r
6816 ldrb r0,[z80xx,#3]\r
6817 and z80bc,z80bc,#0xFF<<24\r
6818 orr z80bc,z80bc,r0, lsl #16\r
6819 fetch 8\r
6820;@LD C,X (IX)\r
6821opcode_DD_4D:\r
6822 ldrb r0,[z80xx,#2]\r
6823 and z80bc,z80bc,#0xFF<<24\r
6824 orr z80bc,z80bc,r0, lsl #16\r
6825 fetch 8\r
6826;@LD C,(IX,N)\r
6827opcode_DD_4E:\r
6828 ldrsb r0,[z80pc],#1\r
6829 ldr r1,[z80xx]\r
6830 add r0,r0,r1, lsr #16\r
6831 readmem8\r
6832 and z80bc,z80bc,#0xFF<<24\r
6833 orr z80bc,z80bc,r0, lsl #16\r
6834 fetch 19\r
6835\r
6836;@LD D,I (IX)\r
6837opcode_DD_54:\r
6838 ldrb r0,[z80xx,#3]\r
6839 and z80de,z80de,#0xFF<<16\r
6840 orr z80de,z80de,r0, lsl #24\r
6841 fetch 8\r
6842;@LD D,X (IX)\r
6843opcode_DD_55:\r
6844 ldrb r0,[z80xx,#2]\r
6845 and z80de,z80de,#0xFF<<16\r
6846 orr z80de,z80de,r0, lsl #24\r
6847 fetch 8\r
6848;@LD D,(IX,N)\r
6849opcode_DD_56:\r
6850 ldrsb r0,[z80pc],#1\r
6851 ldr r1,[z80xx]\r
6852 add r0,r0,r1, lsr #16\r
6853 readmem8\r
6854 and z80de,z80de,#0xFF<<16\r
6855 orr z80de,z80de,r0, lsl #24\r
6856 fetch 19\r
6857;@LD E,I (IX)\r
6858opcode_DD_5C:\r
6859 ldrb r0,[z80xx,#3]\r
6860 and z80de,z80de,#0xFF<<24\r
6861 orr z80de,z80de,r0, lsl #16\r
6862 fetch 8\r
6863;@LD E,X (IX)\r
6864opcode_DD_5D:\r
6865 ldrb r0,[z80xx,#2]\r
6866 and z80de,z80de,#0xFF<<24\r
6867 orr z80de,z80de,r0, lsl #16\r
6868 fetch 8\r
6869;@LD E,(IX,N)\r
6870opcode_DD_5E:\r
6871 ldrsb r0,[z80pc],#1\r
6872 ldr r1,[z80xx]\r
6873 add r0,r0,r1, lsr #16\r
6874 readmem8\r
6875 and z80de,z80de,#0xFF<<24\r
6876 orr z80de,z80de,r0, lsl #16\r
6877 fetch 19\r
6878;@LD I,B (IX)\r
6879opcode_DD_60:\r
6880 mov r0,z80bc,lsr#24\r
6881 strb r0,[z80xx,#3]\r
6882 fetch 8\r
6883;@LD I,C (IX)\r
6884opcode_DD_61:\r
6885 mov r0,z80bc,lsr#16\r
6886 strb r0,[z80xx,#3]\r
6887 fetch 8\r
6888;@LD I,D (IX)\r
6889opcode_DD_62:\r
6890 mov r0,z80de,lsr#24\r
6891 strb r0,[z80xx,#3]\r
6892 fetch 8\r
6893;@LD I,E (IX)\r
6894opcode_DD_63:\r
6895 mov r0,z80de,lsr#16\r
6896 strb r0,[z80xx,#3]\r
6897 fetch 8\r
6898;@LD I,I (IX)\r
6899opcode_DD_64:\r
6900 fetch 8\r
6901;@LD I,X (IX)\r
6902opcode_DD_65:\r
6903 ldrb r0,[z80xx,#2]\r
6904 strb r0,[z80xx,#3]\r
6905 fetch 8\r
6906;@LD H,(IX,N)\r
6907opcode_DD_66:\r
6908 ldrsb r0,[z80pc],#1\r
6909 ldr r1,[z80xx]\r
6910 add r0,r0,r1, lsr #16\r
6911 readmem8\r
6912 and z80hl,z80hl,#0xFF<<16\r
6913 orr z80hl,z80hl,r0, lsl #24\r
6914 fetch 19\r
6915;@LD I,A (IX)\r
6916opcode_DD_67:\r
6917 mov r0,z80a,lsr#24\r
6918 strb r0,[z80xx,#3]\r
6919 fetch 8\r
6920;@LD X,B (IX)\r
6921opcode_DD_68:\r
6922 mov r0,z80bc,lsr#24\r
6923 strb r0,[z80xx,#2]\r
6924 fetch 8\r
6925;@LD X,C (IX)\r
6926opcode_DD_69:\r
6927 mov r0,z80bc,lsr#16\r
6928 strb r0,[z80xx,#2]\r
6929 fetch 8\r
6930;@LD X,D (IX)\r
6931opcode_DD_6A:\r
6932 mov r0,z80de,lsr#24\r
6933 strb r0,[z80xx,#2]\r
6934 fetch 8\r
6935;@LD X,E (IX)\r
6936opcode_DD_6B:\r
6937 mov r0,z80de,lsr#16\r
6938 strb r0,[z80xx,#2]\r
6939 fetch 8\r
6940;@LD X,I (IX)\r
6941opcode_DD_6C:\r
6942 ldrb r0,[z80xx,#3]\r
6943 strb r0,[z80xx,#2]\r
6944 fetch 8\r
6945;@LD X,X (IX)\r
6946opcode_DD_6D:\r
6947 fetch 8\r
6948;@LD L,(IX,N)\r
6949opcode_DD_6E:\r
6950 ldrsb r0,[z80pc],#1\r
6951 ldr r1,[z80xx]\r
6952 add r0,r0,r1, lsr #16\r
6953 readmem8\r
6954 and z80hl,z80hl,#0xFF<<24\r
6955 orr z80hl,z80hl,r0, lsl #16\r
6956 fetch 19\r
6957;@LD X,A (IX)\r
6958opcode_DD_6F:\r
6959 mov r0,z80a,lsr#24\r
6960 strb r0,[z80xx,#2]\r
6961 fetch 8\r
6962\r
6963;@LD (IX,N),B\r
6964opcode_DD_70:\r
6965 ldrsb r0,[z80pc],#1\r
6966 ldr r1,[z80xx]\r
6967 add r1,r0,r1, lsr #16\r
6968 mov r0,z80bc, lsr #24\r
6969 writemem8\r
6970 fetch 19\r
6971;@LD (IX,N),C\r
6972opcode_DD_71:\r
6973 ldrsb r0,[z80pc],#1\r
6974 ldr r1,[z80xx]\r
6975 add r1,r0,r1, lsr #16\r
6976 mov r0,z80bc, lsr #16\r
6977 and r0,r0,#0xFF\r
6978 writemem8\r
6979 fetch 19\r
6980;@LD (IX,N),D\r
6981opcode_DD_72:\r
6982 ldrsb r0,[z80pc],#1\r
6983 ldr r1,[z80xx]\r
6984 add r1,r0,r1, lsr #16\r
6985 mov r0,z80de, lsr #24\r
6986 writemem8\r
6987 fetch 19\r
6988;@LD (IX,N),E\r
6989opcode_DD_73:\r
6990 ldrsb r0,[z80pc],#1\r
6991 ldr r1,[z80xx]\r
6992 add r1,r0,r1, lsr #16\r
6993 mov r0,z80de, lsr #16\r
6994 and r0,r0,#0xFF\r
6995 writemem8\r
6996 fetch 19\r
6997;@LD (IX,N),H\r
6998opcode_DD_74:\r
6999 ldrsb r0,[z80pc],#1\r
7000 ldr r1,[z80xx]\r
7001 add r1,r0,r1, lsr #16\r
7002 mov r0,z80hl, lsr #24\r
7003 writemem8\r
7004 fetch 19\r
7005;@LD (IX,N),L\r
7006opcode_DD_75:\r
7007 ldrsb r0,[z80pc],#1\r
7008 ldr r1,[z80xx]\r
7009 add r1,r0,r1, lsr #16\r
7010 mov r0,z80hl, lsr #16\r
7011 and r0,r0,#0xFF\r
7012 writemem8\r
7013 fetch 19\r
7014;@LD (IX,N),A\r
7015opcode_DD_77:\r
7016 ldrsb r0,[z80pc],#1\r
7017 ldr r1,[z80xx]\r
7018 add r1,r0,r1, lsr #16\r
7019 mov r0,z80a, lsr #24\r
7020 writemem8\r
7021 fetch 19\r
7022\r
7023;@LD A,I from (IX)\r
7024opcode_DD_7C:\r
7025 ldrb r0,[z80xx,#3]\r
7026 mov z80a,r0, lsl #24\r
7027 fetch 8\r
7028;@LD A,X from (IX)\r
7029opcode_DD_7D:\r
7030 ldrb r0,[z80xx,#2]\r
7031 mov z80a,r0, lsl #24\r
7032 fetch 8\r
7033;@LD A,(IX,N)\r
7034opcode_DD_7E:\r
7035 ldrsb r0,[z80pc],#1\r
7036 ldr r1,[z80xx]\r
7037 add r0,r0,r1, lsr #16\r
7038 readmem8\r
7039 mov z80a,r0, lsl #24\r
7040 fetch 19\r
7041\r
7042;@ADD A,I ( IX)\r
7043opcode_DD_84:\r
7044 ldrb r0,[z80xx,#3]\r
7045 opADDb\r
7046 fetch 8\r
7047;@ADD A,X ( IX)\r
7048opcode_DD_85:\r
7049 ldrb r0,[z80xx,#2]\r
7050 opADDb\r
7051 fetch 8\r
7052;@ADD A,(IX+N)\r
7053opcode_DD_86:\r
7054 ldrsb r0,[z80pc],#1\r
7055 ldr r1,[z80xx]\r
7056 add r0,r0,r1, lsr #16\r
7057 readmem8\r
7058 opADDb\r
7059 fetch 19\r
7060\r
7061;@ADC A,I (IX)\r
7062opcode_DD_8C:\r
7063 ldrb r0,[z80xx,#3]\r
7064 opADCb\r
7065 fetch 8\r
7066;@ADC A,X (IX)\r
7067opcode_DD_8D:\r
7068 ldrb r0,[z80xx,#2]\r
7069 opADCb\r
7070 fetch 8\r
7071;@ADC A,(IX+N)\r
7072opcode_DD_8E:\r
7073 ldrsb r0,[z80pc],#1\r
7074 ldr r1,[z80xx]\r
7075 add r0,r0,r1, lsr #16\r
7076 readmem8\r
7077 opADCb\r
7078 fetch 19\r
7079\r
7080;@SUB A,I (IX)\r
7081opcode_DD_94:\r
7082 ldrb r0,[z80xx,#3]\r
7083 opSUBb\r
7084 fetch 8\r
7085;@SUB A,X (IX)\r
7086opcode_DD_95:\r
7087 ldrb r0,[z80xx,#2]\r
7088 opSUBb\r
7089 fetch 8\r
7090;@SUB A,(IX+N)\r
7091opcode_DD_96:\r
7092 ldrsb r0,[z80pc],#1\r
7093 ldr r1,[z80xx]\r
7094 add r0,r0,r1, lsr #16\r
7095 readmem8\r
7096 opSUBb\r
7097 fetch 19\r
7098\r
7099;@SBC A,I (IX)\r
7100opcode_DD_9C:\r
7101 ldrb r0,[z80xx,#3]\r
7102 opSBCb\r
7103 fetch 8\r
7104;@SBC A,X (IX)\r
7105opcode_DD_9D:\r
7106 ldrb r0,[z80xx,#2]\r
7107 opSBCb\r
7108 fetch 8\r
7109;@SBC A,(IX+N)\r
7110opcode_DD_9E:\r
7111 ldrsb r0,[z80pc],#1\r
7112 ldr r1,[z80xx]\r
7113 add r0,r0,r1, lsr #16\r
7114 readmem8\r
7115 opSBCb\r
7116 fetch 19\r
7117\r
7118;@AND I (IX)\r
7119opcode_DD_A4:\r
7120 ldrb r0,[z80xx,#3]\r
7121 opANDb\r
7122 fetch 8\r
7123;@AND X (IX)\r
7124opcode_DD_A5:\r
7125 ldrb r0,[z80xx,#2]\r
7126 opANDb\r
7127 fetch 8\r
7128;@AND (IX+N)\r
7129opcode_DD_A6:\r
7130 ldrsb r0,[z80pc],#1\r
7131 ldr r1,[z80xx]\r
7132 add r0,r0,r1, lsr #16\r
7133 readmem8\r
7134 opANDb\r
7135 fetch 19\r
7136\r
7137;@XOR I (IX)\r
7138opcode_DD_AC:\r
7139 ldrb r0,[z80xx,#3]\r
7140 opXORb\r
7141 fetch 8\r
7142;@XOR X (IX)\r
7143opcode_DD_AD:\r
7144 ldrb r0,[z80xx,#2]\r
7145 opXORb\r
7146 fetch 8\r
7147;@XOR (IX+N)\r
7148opcode_DD_AE:\r
7149 ldrsb r0,[z80pc],#1\r
7150 ldr r1,[z80xx]\r
7151 add r0,r0,r1, lsr #16\r
7152 readmem8\r
7153 opXORb\r
7154 fetch 19\r
7155\r
7156;@OR I (IX)\r
7157opcode_DD_B4:\r
7158 ldrb r0,[z80xx,#3]\r
7159 opORb\r
7160 fetch 8\r
7161;@OR X (IX)\r
7162opcode_DD_B5:\r
7163 ldrb r0,[z80xx,#2]\r
7164 opORb\r
7165 fetch 8\r
7166;@OR (IX+N)\r
7167opcode_DD_B6:\r
7168 ldrsb r0,[z80pc],#1\r
7169 ldr r1,[z80xx]\r
7170 add r0,r0,r1, lsr #16\r
7171 readmem8\r
7172 opORb\r
7173 fetch 19\r
7174\r
7175;@CP I (IX)\r
7176opcode_DD_BC:\r
7177 ldrb r0,[z80xx,#3]\r
7178 opCPb\r
7179 fetch 8\r
7180;@CP X (IX)\r
7181opcode_DD_BD:\r
7182 ldrb r0,[z80xx,#2]\r
7183 opCPb\r
7184 fetch 8\r
7185;@CP (IX+N)\r
7186opcode_DD_BE:\r
7187 ldrsb r0,[z80pc],#1\r
7188 ldr r1,[z80xx]\r
7189 add r0,r0,r1, lsr #16\r
7190 readmem8\r
7191 opCPb\r
7192 fetch 19\r
7193\r
7194\r
7195opcodes_DD_CB_LOCAL: .word opcodes_DD_CB\r
7196opcode_DD_CB:\r
7197;@Looks up the opcode on the opcodes_DD_CB table and then \r
7198;@moves the PC to the location of the subroutine\r
7199 ldrsb r0,[z80pc],#1\r
7200 ldr r1,[z80xx]\r
7201 add r0,r0,r1, lsr #16\r
7202\r
7203 ldrb r1,[z80pc],#1\r
7204 ldr pc,[pc,r1, lsl #2]\r
7205 .word 0x00\r
7206opcodes_DD_CB:\r
7207 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_06,opcode_DD_NF2\r
7208 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_0E,opcode_DD_NF2\r
7209 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_16,opcode_DD_NF2\r
7210 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_1E,opcode_DD_NF2\r
7211 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_26,opcode_DD_NF2\r
7212 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_2E,opcode_DD_NF2\r
7213 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_36,opcode_DD_NF2\r
7214 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_3E,opcode_DD_NF2\r
7215 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_46,opcode_DD_NF2\r
7216 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_4E,opcode_DD_NF2\r
7217 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_56,opcode_DD_NF2\r
7218 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_5E,opcode_DD_NF2\r
7219 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_66,opcode_DD_NF2\r
7220 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_6E,opcode_DD_NF2\r
7221 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_76,opcode_DD_NF2\r
7222 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_7E,opcode_DD_NF2\r
7223 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_86,opcode_DD_NF2\r
7224 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_8E,opcode_DD_NF2\r
7225 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_96,opcode_DD_NF2\r
7226 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_9E,opcode_DD_NF2\r
7227 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_A6,opcode_DD_NF2\r
7228 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_AE,opcode_DD_NF2\r
7229 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_B6,opcode_DD_NF2\r
7230 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_BE,opcode_DD_NF2\r
7231 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_C6,opcode_DD_NF2\r
7232 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_CE,opcode_DD_NF2\r
7233 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_D6,opcode_DD_NF2\r
7234 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_DE,opcode_DD_NF2\r
7235 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_E6,opcode_DD_NF2\r
7236 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_EE,opcode_DD_NF2\r
7237 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_F6,opcode_DD_NF2\r
7238 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_FE,opcode_DD_NF2\r
7239\r
7240;@RLC (IX+N) \r
7241opcode_DD_CB_06:\r
7242 stmfd sp!,{r0} ;@ save addr\r
7243 readmem8\r
7244 opRLCb\r
7245 ldmfd sp!,{r1} ;@ restore addr into r1\r
7246 writemem8\r
7247 fetch 23\r
7248;@RRC (IX+N) \r
7249opcode_DD_CB_0E:\r
7250 stmfd sp!,{r0} ;@ save addr\r
7251 readmem8\r
7252 opRRCb\r
7253 ldmfd sp!,{r1} ;@ restore addr into r1\r
7254 writemem8\r
7255 fetch 23\r
7256;@RL (IX+N) \r
7257opcode_DD_CB_16:\r
7258 stmfd sp!,{r0} ;@ save addr\r
7259 readmem8\r
7260 opRLb\r
7261 ldmfd sp!,{r1} ;@ restore addr into r1\r
7262 writemem8\r
7263 fetch 23\r
7264;@RR (IX+N) \r
7265opcode_DD_CB_1E:\r
7266 stmfd sp!,{r0} ;@ save addr \r
7267 readmem8\r
7268 opRRb\r
7269 ldmfd sp!,{r1} ;@ restore addr into r1\r
7270 writemem8\r
7271 fetch 23\r
7272\r
7273;@SLA (IX+N) \r
7274opcode_DD_CB_26:\r
7275 stmfd sp!,{r0} ;@ save addr \r
7276 readmem8\r
7277 opSLAb\r
7278 ldmfd sp!,{r1} ;@ restore addr into r1\r
7279 writemem8\r
7280 fetch 23\r
7281;@SRA (IX+N) \r
7282opcode_DD_CB_2E:\r
7283 stmfd sp!,{r0} ;@ save addr \r
7284 readmem8\r
7285 opSRAb\r
7286 ldmfd sp!,{r1} ;@ restore addr into r1\r
7287 writemem8\r
7288 fetch 23\r
7289;@SLL (IX+N) \r
7290opcode_DD_CB_36:\r
7291 stmfd sp!,{r0} ;@ save addr \r
7292 readmem8\r
7293 opSLLb\r
7294 ldmfd sp!,{r1} ;@ restore addr into r1\r
7295 writemem8\r
7296 fetch 23\r
7297;@SRL (IX+N)\r
7298opcode_DD_CB_3E:\r
7299 stmfd sp!,{r0} ;@ save addr \r
7300 readmem8\r
7301 opSRLb\r
7302 ldmfd sp!,{r1} ;@ restore addr into r1\r
7303 writemem8\r
7304 fetch 23\r
7305\r
7306;@BIT 0,(IX+N) \r
7307opcode_DD_CB_46:\r
7308 readmem8\r
7309 opBITb 0\r
7310 fetch 20\r
7311;@BIT 1,(IX+N) \r
7312opcode_DD_CB_4E:\r
7313 readmem8\r
7314 opBITb 1\r
7315 fetch 20\r
7316;@BIT 2,(IX+N) \r
7317opcode_DD_CB_56:\r
7318 readmem8\r
7319 opBITb 2\r
7320 fetch 20\r
7321;@BIT 3,(IX+N) \r
7322opcode_DD_CB_5E:\r
7323 readmem8\r
7324 opBITb 3\r
7325 fetch 20\r
7326;@BIT 4,(IX+N) \r
7327opcode_DD_CB_66:\r
7328 readmem8\r
7329 opBITb 4\r
7330 fetch 20\r
7331;@BIT 5,(IX+N) \r
7332opcode_DD_CB_6E:\r
7333 readmem8\r
7334 opBITb 5\r
7335 fetch 20\r
7336;@BIT 6,(IX+N) \r
7337opcode_DD_CB_76:\r
7338 readmem8\r
7339 opBITb 6\r
7340 fetch 20\r
7341;@BIT 7,(IX+N) \r
7342opcode_DD_CB_7E:\r
7343 readmem8\r
7344 opBIT7b\r
7345 fetch 20\r
7346;@RES 0,(IX+N) \r
7347opcode_DD_CB_86:\r
7348 opRESmem 0\r
7349;@RES 1,(IX+N) \r
7350opcode_DD_CB_8E:\r
7351 opRESmem 1\r
7352;@RES 2,(IX+N) \r
7353opcode_DD_CB_96:\r
7354 opRESmem 2\r
7355;@RES 3,(IX+N) \r
7356opcode_DD_CB_9E:\r
7357 opRESmem 3\r
7358;@RES 4,(IX+N) \r
7359opcode_DD_CB_A6:\r
7360 opRESmem 4\r
7361;@RES 5,(IX+N) \r
7362opcode_DD_CB_AE:\r
7363 opRESmem 5\r
7364;@RES 6,(IX+N) \r
7365opcode_DD_CB_B6:\r
7366 opRESmem 6\r
7367;@RES 7,(IX+N) \r
7368opcode_DD_CB_BE:\r
7369 opRESmem 7\r
7370\r
7371;@SET 0,(IX+N) \r
7372opcode_DD_CB_C6:\r
7373 opSETmem 0\r
7374;@SET 1,(IX+N) \r
7375opcode_DD_CB_CE:\r
7376 opSETmem 1\r
7377;@SET 2,(IX+N) \r
7378opcode_DD_CB_D6:\r
7379 opSETmem 2\r
7380;@SET 3,(IX+N) \r
7381opcode_DD_CB_DE:\r
7382 opSETmem 3\r
7383;@SET 4,(IX+N) \r
7384opcode_DD_CB_E6:\r
7385 opSETmem 4\r
7386;@SET 5,(IX+N) \r
7387opcode_DD_CB_EE:\r
7388 opSETmem 5\r
7389;@SET 6,(IX+N) \r
7390opcode_DD_CB_F6:\r
7391 opSETmem 6\r
7392;@SET 7,(IX+N) \r
7393opcode_DD_CB_FE:\r
7394 opSETmem 7\r
7395\r
7396\r
7397\r
7398;@POP IX\r
7399opcode_DD_E1:\r
7400.if FAST_Z80SP\r
7401 opPOP\r
7402.else\r
7403 mov r0,z80sp\r
7404 stmfd sp!,{z80xx}\r
7405 readmem16\r
7406 ldmfd sp!,{z80xx}\r
7407 add z80sp,z80sp,#2\r
7408.endif\r
7409 strh r0,[z80xx,#2]\r
7410 fetch 14\r
7411;@EX (SP),IX\r
7412opcode_DD_E3:\r
7413.if FAST_Z80SP\r
7414 ldrb r0,[z80sp]\r
7415 ldrb r1,[z80sp,#1]\r
7416 orr r2,r0,r1, lsl #8\r
7417 ldrh r1,[z80xx,#2]\r
7418 mov r0,r1, lsr #8\r
7419 strb r0,[z80sp,#1]\r
7420 strb r1,[z80sp]\r
7421 strh r2,[z80xx,#2]\r
7422.else\r
7423 mov r0,z80sp\r
7424 stmfd sp!,{z80xx}\r
7425 readmem16\r
7426 ldmfd sp!,{z80xx}\r
7427 mov r2,r0\r
7428 ldrh r0,[z80xx,#2]\r
7429 strh r2,[z80xx,#2]\r
7430 mov r1,z80sp\r
7431 writemem16\r
7432.endif\r
7433 fetch 23\r
7434;@PUSH IX\r
7435opcode_DD_E5:\r
7436 ldr r2,[z80xx]\r
7437 opPUSHreg r2\r
7438 fetch 15\r
7439;@JP (IX)\r
7440opcode_DD_E9:\r
7441 ldrh r0,[z80xx,#2]\r
7442 rebasepc\r
7443 fetch 8\r
7444;@LD SP,IX\r
7445opcode_DD_F9:\r
7446.if FAST_Z80SP\r
7447 ldrh r0,[z80xx,#2]\r
7448 rebasesp\r
7449 mov z80sp,r0\r
7450.else\r
7451 ldrh z80sp,[z80xx,#2]\r
7452.endif\r
7453 fetch 10\r
7454\r
7455;@##################################\r
7456;@##################################\r
7457;@### opcodes ED #########################\r
7458;@##################################\r
7459;@##################################\r
7460\r
7461opcode_ED_NF:\r
7462 fetch 8\r
7463;@ ldrb r0,[z80pc],#1\r
7464;@ ldr pc,[opcodes,r0, lsl #2]\r
7465;@ mov r0,#0xED00\r
7466;@ orr r0,r0,r1\r
7467;@ b end_loop\r
7468\r
7469;@IN B,(C)\r
7470opcode_ED_40:\r
7471 opIN_C\r
7472 and z80bc,z80bc,#0xFF<<16\r
7473 orr z80bc,z80bc,r0, lsl #24\r
7474 sub r1,opcodes,#0x100\r
7475 ldrb r0,[r1,r0]\r
7476 and z80f,z80f,#1<<CFlag\r
7477 orr z80f,z80f,r0\r
7478 fetch 12\r
7479;@OUT (C),B\r
7480opcode_ED_41:\r
7481 mov r1,z80bc, lsr #24\r
7482 opOUT_C\r
7483 fetch 12\r
7484\r
7485;@SBC HL,BC\r
7486opcode_ED_42:\r
7487 opSBC16 z80bc\r
7488\r
7489;@LD (NN),BC\r
7490opcode_ED_43:\r
7491 ldrb r0,[z80pc],#1\r
7492 ldrb r1,[z80pc],#1\r
7493 orr r1,r0,r1, lsl #8\r
7494 mov r0,z80bc, lsr #16\r
7495 writemem16\r
7496 fetch 20\r
7497;@NEG\r
7498opcode_ED_44:\r
7499 rsbs z80a,z80a,#0\r
7500 mrs z80f,cpsr\r
7501 mov z80f,z80f,lsr#28 ;@S,Z,V&C\r
7502 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@invert C and set n.\r
7503 tst z80a,#0x0F000000 ;@H, correct\r
7504 orrne z80f,z80f,#1<<HFlag\r
7505 fetch 8\r
7506 \r
7507;@RETN, moved to ED_4D\r
7508;@opcode_ED_45:\r
7509\r
7510;@IM 0\r
7511opcode_ED_46:\r
7512 strb z80a,[cpucontext,#z80im]\r
7513 fetch 8\r
7514;@LD I,A\r
7515opcode_ED_47:\r
7516 str z80a,[cpucontext,#z80i]\r
7517 fetch 9\r
7518;@IN C,(C)\r
7519opcode_ED_48:\r
7520 opIN_C\r
7521 and z80bc,z80bc,#0xFF<<24\r
7522 orr z80bc,z80bc,r0, lsl #16\r
7523 sub r1,opcodes,#0x100\r
7524 ldrb r0,[r1,r0]\r
7525 and z80f,z80f,#1<<CFlag\r
7526 orr z80f,z80f,r0\r
7527 fetch 12\r
7528;@OUT (C),C\r
7529opcode_ED_49:\r
7530 mov r0,z80bc, lsr #16\r
7531 and r1,r0,#0xFF\r
7532 opOUT\r
7533 fetch 12\r
7534;@ADC HL,BC\r
7535opcode_ED_4A:\r
7536 opADC16 z80bc\r
7537;@LD BC,(NN)\r
7538opcode_ED_4B:\r
7539 ldrb r0,[z80pc],#1\r
7540 ldrb r1,[z80pc],#1\r
7541 orr r0,r0,r1, lsl #8\r
7542 readmem16\r
7543 mov z80bc,r0, lsl #16\r
7544 fetch 20\r
7545\r
7546;@RETN\r
7547opcode_ED_45:\r
7548;@RETI\r
7549opcode_ED_4D:\r
7550 ldrb r0,[cpucontext,#z80if]\r
7551 tst r0,#Z80_IF2\r
7552 orrne r0,r0,#Z80_IF1\r
7553 biceq r0,r0,#Z80_IF1\r
7554 strb r0,[cpucontext,#z80if]\r
7555 opPOP\r
7556 rebasepc\r
7557 fetch 14\r
7558\r
7559;@LD R,A\r
7560opcode_ED_4F:\r
7561 mov r0,z80a,lsr#24\r
7562 strb r0,[cpucontext,#z80r]\r
7563 fetch 9\r
7564\r
7565;@IN D,(C)\r
7566opcode_ED_50:\r
7567 opIN_C\r
7568 and z80de,z80de,#0xFF<<16\r
7569 orr z80de,z80de,r0, lsl #24\r
7570 sub r1,opcodes,#0x100\r
7571 ldrb r0,[r1,r0]\r
7572 and z80f,z80f,#1<<CFlag\r
7573 orr z80f,z80f,r0\r
7574 fetch 12\r
7575;@OUT (C),D\r
7576opcode_ED_51:\r
7577 mov r1,z80de, lsr #24\r
7578 opOUT_C\r
7579 fetch 12\r
7580;@SBC HL,DE\r
7581opcode_ED_52:\r
7582 opSBC16 z80de\r
7583;@LD (NN),DE\r
7584opcode_ED_53:\r
7585 ldrb r0,[z80pc],#1\r
7586 ldrb r1,[z80pc],#1\r
7587 orr r1,r0,r1, lsl #8\r
7588 mov r0,z80de, lsr #16\r
7589 writemem16\r
7590 fetch 20\r
7591;@IM 1\r
7592opcode_ED_56:\r
7593 mov r0,#1\r
7594 strb r0,[cpucontext,#z80im]\r
7595 fetch 8\r
7596;@LD A,I\r
7597opcode_ED_57:\r
7598 ldr z80a,[cpucontext,#z80i]\r
7599 tst z80a,#0xFF000000\r
7600 and z80f,z80f,#(1<<CFlag)\r
7601 orreq z80f,z80f,#(1<<ZFlag)\r
7602 orrmi z80f,z80f,#(1<<SFlag)\r
7603 ldrb r0,[cpucontext,#z80if]\r
7604 tst r0,#Z80_IF2\r
7605 orrne z80f,z80f,#(1<<VFlag)\r
7606 fetch 9\r
7607;@IN E,(C)\r
7608opcode_ED_58:\r
7609 opIN_C\r
7610 and z80de,z80de,#0xFF<<24\r
7611 orr z80de,z80de,r0, lsl #16\r
7612 sub r1,opcodes,#0x100\r
7613 ldrb r0,[r1,r0]\r
7614 and z80f,z80f,#1<<CFlag\r
7615 orr z80f,z80f,r0\r
7616 fetch 12\r
7617;@OUT (C),E\r
7618opcode_ED_59:\r
7619 mov r1,z80de, lsr #16\r
7620 and r1,r1,#0xFF\r
7621 opOUT_C\r
7622 fetch 12\r
7623;@ADC HL,DE\r
7624opcode_ED_5A:\r
7625 opADC16 z80de\r
7626;@LD DE,(NN)\r
7627opcode_ED_5B:\r
7628 ldrb r0,[z80pc],#1\r
7629 ldrb r1,[z80pc],#1\r
7630 orr r0,r0,r1, lsl #8\r
7631 readmem16\r
7632 mov z80de,r0, lsl #16\r
7633 fetch 20\r
7634;@IM 2\r
7635opcode_ED_5E:\r
7636 mov r0,#2\r
7637 strb r0,[cpucontext,#z80im]\r
7638 fetch 8\r
7639;@LD A,R\r
7640opcode_ED_5F:\r
7641 ldrb r0,[cpucontext,#z80r]\r
7642 and r0,r0,#0x80\r
7643 rsb r1,z80_icount,#0\r
7644 and r1,r1,#0x7F\r
7645 orr r0,r0,r1\r
7646 movs z80a,r0, lsl #24\r
7647 and z80f,z80f,#1<<CFlag\r
7648 orrmi z80f,z80f,#(1<<SFlag)\r
7649 orreq z80f,z80f,#(1<<ZFlag)\r
7650 ldrb r0,[cpucontext,#z80if]\r
7651 tst r0,#Z80_IF2\r
7652 orrne z80f,z80f,#(1<<VFlag)\r
7653 fetch 9\r
7654;@IN H,(C)\r
7655opcode_ED_60:\r
7656 opIN_C\r
7657 and z80hl,z80hl,#0xFF<<16\r
7658 orr z80hl,z80hl,r0, lsl #24\r
7659 sub r1,opcodes,#0x100\r
7660 ldrb r0,[r1,r0]\r
7661 and z80f,z80f,#1<<CFlag\r
7662 orr z80f,z80f,r0\r
7663 fetch 12\r
7664;@OUT (C),H\r
7665opcode_ED_61:\r
7666 mov r1,z80hl, lsr #24\r
7667 opOUT_C\r
7668 fetch 12\r
7669;@SBC HL,HL\r
7670opcode_ED_62:\r
7671 opSBC16HL\r
7672;@RRD\r
7673opcode_ED_67:\r
7674 readmem8HL\r
7675 mov r1,r0,ror#4\r
7676 orr r0,r1,z80a,lsr#20\r
7677 bic z80a,z80a,#0x0F000000\r
7678 orr z80a,z80a,r1,lsr#4\r
7679 writemem8HL\r
7680 sub r1,opcodes,#0x100\r
7681 ldrb r0,[r1,z80a, lsr #24]\r
7682 and z80f,z80f,#1<<CFlag\r
7683 orr z80f,z80f,r0\r
7684 fetch 18\r
7685;@IN L,(C)\r
7686opcode_ED_68:\r
7687 opIN_C\r
7688 and z80hl,z80hl,#0xFF<<24\r
7689 orr z80hl,z80hl,r0, lsl #16\r
7690 and z80f,z80f,#1<<CFlag\r
7691 sub r1,opcodes,#0x100\r
7692 ldrb r0,[r1,r0]\r
7693 orr z80f,z80f,r0\r
7694 fetch 12\r
7695;@OUT (C),L\r
7696opcode_ED_69:\r
7697 mov r1,z80hl, lsr #16\r
7698 and r1,r1,#0xFF\r
7699 opOUT_C\r
7700 fetch 12\r
7701;@ADC HL,HL\r
7702opcode_ED_6A:\r
7703 opADC16HL\r
7704;@RLD\r
7705opcode_ED_6F:\r
7706 readmem8HL\r
7707 orr r0,r0,z80a,lsl#4\r
7708 mov r0,r0,ror#28\r
7709 and z80a,z80a,#0xF0000000\r
7710 orr z80a,z80a,r0,lsl#16\r
7711 and z80a,z80a,#0xFF000000\r
7712 writemem8HL\r
7713 sub r1,opcodes,#0x100\r
7714 ldrb r0,[r1,z80a, lsr #24]\r
7715 and z80f,z80f,#1<<CFlag\r
7716 orr z80f,z80f,r0\r
7717 fetch 18\r
7718;@IN F,(C)\r
7719opcode_ED_70:\r
7720 opIN_C\r
7721 and z80f,z80f,#1<<CFlag\r
7722 sub r1,opcodes,#0x100\r
7723 ldrb r0,[r1,r0]\r
7724 orr z80f,z80f,r0\r
7725 fetch 12\r
7726;@OUT (C),0\r
7727opcode_ED_71:\r
7728 mov r1,#0\r
7729 opOUT_C\r
7730 fetch 12\r
7731\r
7732;@SBC HL,SP\r
7733opcode_ED_72:\r
7734.if FAST_Z80SP\r
7735 ldr r0,[cpucontext,#z80sp_base]\r
7736 sub r0,z80sp,r0\r
7737 mov r0, r0, lsl #16\r
7738.else\r
7739 mov r0,z80sp,lsl#16\r
7740.endif\r
7741 opSBC16 r0\r
7742;@LD (NN),SP\r
7743opcode_ED_73:\r
7744 ldrb r0,[z80pc],#1\r
7745 ldrb r1,[z80pc],#1\r
7746 orr r1,r0,r1, lsl #8\r
7747.if FAST_Z80SP\r
7748 ldr r0,[cpucontext,#z80sp_base]\r
7749 sub r0,z80sp,r0\r
7750.else\r
7751 mov r0,z80sp\r
7752.endif\r
7753 writemem16\r
7754 fetch 16\r
7755;@IN A,(C)\r
7756opcode_ED_78:\r
7757 opIN_C\r
7758 mov z80a,r0, lsl #24\r
7759 and z80f,z80f,#1<<CFlag\r
7760 sub r1,opcodes,#0x100\r
7761 ldrb r0,[r1,r0]\r
7762 orr z80f,z80f,r0\r
7763 fetch 12\r
7764;@OUT (C),A\r
7765opcode_ED_79:\r
7766 mov r1,z80a, lsr #24\r
7767 opOUT_C\r
7768 fetch 12\r
7769;@ADC HL,SP\r
7770opcode_ED_7A:\r
7771.if FAST_Z80SP\r
7772 ldr r0,[cpucontext,#z80sp_base]\r
7773 sub r0,z80sp,r0\r
7774 mov r0, r0, lsl #16\r
7775.else\r
7776 mov r0,z80sp,lsl#16\r
7777.endif\r
7778 opADC16 r0\r
7779;@LD SP,(NN)\r
7780opcode_ED_7B:\r
7781 ldrb r0,[z80pc],#1\r
7782 ldrb r1,[z80pc],#1\r
7783 orr r0,r0,r1, lsl #8\r
7784 readmem16\r
7785.if FAST_Z80SP\r
7786 rebasesp\r
7787.endif\r
7788 mov z80sp,r0\r
7789 fetch 20\r
7790;@LDI\r
7791opcode_ED_A0:\r
7792 copymem8HL_DE\r
7793 add z80hl,z80hl,#1<<16\r
7794 add z80de,z80de,#1<<16\r
7795 subs z80bc,z80bc,#1<<16\r
7796 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7797 orrne z80f,z80f,#1<<VFlag\r
7798 fetch 16\r
7799;@CPI\r
7800opcode_ED_A1:\r
7801 readmem8HL\r
7802 add z80hl,z80hl,#0x00010000\r
7803 mov r1,z80a,lsl#4\r
7804 cmp z80a,r0,lsl#24\r
7805 and z80f,z80f,#1<<CFlag\r
7806 orr z80f,z80f,#1<<NFlag\r
7807 orrmi z80f,z80f,#1<<SFlag\r
7808 orreq z80f,z80f,#1<<ZFlag\r
7809 cmp r1,r0,lsl#28\r
7810 orrcc z80f,z80f,#1<<HFlag\r
7811 subs z80bc,z80bc,#0x00010000\r
7812 orrne z80f,z80f,#1<<VFlag\r
7813 fetch 16\r
7814;@INI\r
7815opcode_ED_A2:\r
7816 opIN_C\r
7817 and z80f,r0,#0x80\r
7818 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7819;@ mov r1,z80bc,lsl#8\r
7820;@ add r1,r1,#0x01000000\r
7821;@ adds r1,r1,r0,lsl#24\r
7822;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7823 writemem8HL\r
7824 add z80hl,z80hl,#1<<16\r
7825 sub z80bc,z80bc,#1<<24\r
7826 tst z80bc,#0xFF<<24\r
7827 orrmi z80f,z80f,#1<<SFlag\r
7828 orreq z80f,z80f,#1<<ZFlag\r
7829 fetch 16\r
7830\r
7831;@OUTI\r
7832opcode_ED_A3:\r
7833 readmem8HL\r
7834 add z80hl,z80hl,#1<<16\r
7835 and z80f,r0,#0x80\r
7836 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7837 mov r1,z80hl,lsl#8\r
7838 adds r1,r1,r0,lsl#24\r
7839 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL)+L > 0xFF\r
7840 sub z80bc,z80bc,#1<<24\r
7841 tst z80bc,#0xFF<<24\r
7842 orrmi z80f,z80f,#1<<SFlag\r
7843 orreq z80f,z80f,#1<<ZFlag\r
7844 mov r1,r0\r
7845 opOUT_C\r
7846 fetch 16\r
7847\r
7848;@LDD\r
7849opcode_ED_A8:\r
7850 copymem8HL_DE\r
7851 sub z80hl,z80hl,#1<<16\r
7852 sub z80de,z80de,#1<<16\r
7853 subs z80bc,z80bc,#1<<16\r
7854 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7855 orrne z80f,z80f,#1<<VFlag\r
7856 fetch 16\r
7857\r
7858;@CPD\r
7859opcode_ED_A9:\r
7860 readmem8HL\r
7861 sub z80hl,z80hl,#1<<16\r
7862 mov r1,z80a,lsl#4\r
7863 cmp z80a,r0,lsl#24\r
7864 and z80f,z80f,#1<<CFlag\r
7865 orr z80f,z80f,#1<<NFlag\r
7866 orrmi z80f,z80f,#1<<SFlag\r
7867 orreq z80f,z80f,#1<<ZFlag\r
7868 cmp r1,r0,lsl#28\r
7869 orrcc z80f,z80f,#1<<HFlag\r
7870 subs z80bc,z80bc,#0x00010000\r
7871 orrne z80f,z80f,#1<<VFlag\r
7872 fetch 16\r
7873\r
7874;@IND\r
7875opcode_ED_AA:\r
7876 opIN_C\r
7877 and z80f,r0,#0x80\r
7878 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7879;@ mov r1,z80bc,lsl#8\r
7880;@ sub r1,r1,#0x01000000\r
7881;@ adds r1,r1,r0,lsl#24\r
7882;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
7883 writemem8HL\r
7884 sub z80hl,z80hl,#1<<16\r
7885 sub z80bc,z80bc,#1<<24\r
7886 tst z80bc,#0xFF<<24\r
7887 orrmi z80f,z80f,#1<<SFlag\r
7888 orreq z80f,z80f,#1<<ZFlag\r
7889 fetch 16\r
7890\r
7891;@OUTD\r
7892opcode_ED_AB:\r
7893 readmem8HL\r
7894 sub z80hl,z80hl,#1<<16\r
7895 and z80f,r0,#0x80\r
7896 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7897 mov r1,z80hl,lsl#8\r
7898 adds r1,r1,r0,lsl#24\r
7899 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7900 sub z80bc,z80bc,#1<<24\r
7901 tst z80bc,#0xFF<<24\r
7902 orrmi z80f,z80f,#1<<SFlag\r
7903 orreq z80f,z80f,#1<<ZFlag\r
7904 mov r1,r0\r
7905 opOUT_C\r
7906 fetch 16\r
7907;@LDIR\r
7908opcode_ED_B0:\r
7909 copymem8HL_DE\r
7910 add z80hl,z80hl,#1<<16\r
7911 add z80de,z80de,#1<<16\r
7912 subs z80bc,z80bc,#1<<16\r
7913 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7914 orrne z80f,z80f,#1<<VFlag\r
7915 subne z80pc,z80pc,#2\r
7916 subne z80_icount,z80_icount,#5\r
7917 fetch 16\r
7918\r
7919;@CPIR\r
7920opcode_ED_B1:\r
7921 readmem8HL\r
7922 add z80hl,z80hl,#1<<16 \r
7923 mov r1,z80a,lsl#4\r
7924 cmp z80a,r0,lsl#24\r
7925 and z80f,z80f,#1<<CFlag\r
7926 orr z80f,z80f,#1<<NFlag\r
7927 orrmi z80f,z80f,#1<<SFlag\r
7928 orreq z80f,z80f,#1<<ZFlag\r
7929 cmp r1,r0,lsl#28\r
7930 orrcc z80f,z80f,#1<<HFlag\r
7931 subs z80bc,z80bc,#1<<16\r
7932 bne opcode_ED_B1_decpc\r
7933 fetch 16\r
7934opcode_ED_B1_decpc:\r
7935 orr z80f,z80f,#1<<VFlag\r
7936 tst z80f,#1<<ZFlag\r
7937 subeq z80pc,z80pc,#2\r
7938 subeq z80_icount,z80_icount,#5\r
7939 fetch 16\r
7940;@INIR\r
7941opcode_ED_B2:\r
7942 opIN_C\r
7943 and z80f,r0,#0x80\r
7944 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7945;@ mov r1,z80bc,lsl#8\r
7946;@ add r1,r1,#0x01000000\r
7947;@ adds r1,r1,r0,lsl#24\r
7948;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7949 writemem8HL\r
7950 add z80hl,z80hl,#1<<16\r
7951 sub z80bc,z80bc,#1<<24\r
7952 tst z80bc,#0xFF<<24\r
7953 orrmi z80f,z80f,#1<<SFlag\r
7954 orreq z80f,z80f,#1<<ZFlag\r
7955 subne z80pc,z80pc,#2\r
7956 subne z80_icount,z80_icount,#5\r
7957 fetch 16\r
7958;@OTIR\r
7959opcode_ED_B3:\r
7960 readmem8HL\r
7961 add z80hl,z80hl,#1<<16\r
7962 and z80f,r0,#0x80\r
7963 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7964 mov r1,z80hl,lsl#8\r
7965 adds r1,r1,r0,lsl#24\r
7966 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7967 sub z80bc,z80bc,#1<<24\r
7968 tst z80bc,#0xFF<<24\r
7969 orrmi z80f,z80f,#1<<SFlag\r
7970 orreq z80f,z80f,#1<<ZFlag\r
7971 subne z80pc,z80pc,#2\r
7972 subne z80_icount,z80_icount,#5\r
7973 mov r1,r0\r
7974 opOUT_C\r
7975 fetch 16\r
7976;@LDDR\r
7977opcode_ED_B8:\r
7978 copymem8HL_DE\r
7979 sub z80hl,z80hl,#1<<16\r
7980 sub z80de,z80de,#1<<16\r
7981 subs z80bc,z80bc,#1<<16\r
7982 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7983 orrne z80f,z80f,#1<<VFlag\r
7984 subne z80pc,z80pc,#2\r
7985 subne z80_icount,z80_icount,#5\r
7986 fetch 16\r
7987\r
7988;@CPDR\r
7989opcode_ED_B9:\r
7990 readmem8HL\r
7991 sub z80hl,z80hl,#1<<16\r
7992 mov r1,z80a,lsl#4\r
7993 cmp z80a,r0,lsl#24\r
7994 and z80f,z80f,#1<<CFlag\r
7995 orr z80f,z80f,#1<<NFlag\r
7996 orrmi z80f,z80f,#1<<SFlag\r
7997 orreq z80f,z80f,#1<<ZFlag\r
7998 cmp r1,r0,lsl#28\r
7999 orrcc z80f,z80f,#1<<HFlag\r
8000 subs z80bc,z80bc,#1<<16\r
8001 bne opcode_ED_B9_decpc\r
8002 fetch 16\r
8003opcode_ED_B9_decpc:\r
8004 orr z80f,z80f,#1<<VFlag\r
8005 tst z80f,#1<<ZFlag\r
8006 subeq z80pc,z80pc,#2\r
8007 subeq z80_icount,z80_icount,#5\r
8008 fetch 16\r
8009;@INDR\r
8010opcode_ED_BA:\r
8011 opIN_C\r
8012 and z80f,r0,#0x80\r
8013 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8014;@ mov r1,z80bc,lsl#8\r
8015;@ sub r1,r1,#0x01000000\r
8016;@ adds r1,r1,r0,lsl#24\r
8017;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
8018 writemem8HL\r
8019 sub z80hl,z80hl,#1<<16\r
8020 sub z80bc,z80bc,#1<<24\r
8021 tst z80bc,#0xFF<<24\r
8022 orrmi z80f,z80f,#1<<SFlag\r
8023 orreq z80f,z80f,#1<<ZFlag\r
8024 subne z80pc,z80pc,#2\r
8025 subne z80_icount,z80_icount,#5\r
8026 fetch 16\r
8027;@OTDR\r
8028opcode_ED_BB:\r
8029 readmem8HL\r
8030 sub z80hl,z80hl,#1<<16\r
8031 and z80f,r0,#0x80\r
8032 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8033 mov r1,z80hl,lsl#8\r
8034 adds r1,r1,r0,lsl#24\r
8035 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
8036 sub z80bc,z80bc,#1<<24\r
8037 tst z80bc,#0xFF<<24\r
8038 orrmi z80f,z80f,#1<<SFlag\r
8039 orreq z80f,z80f,#1<<ZFlag\r
8040 subne z80pc,z80pc,#2\r
8041 subne z80_icount,z80_icount,#5\r
8042 mov r1,r0\r
8043 opOUT_C\r
8044 fetch 16\r
8045;@##################################\r
8046;@##################################\r
8047;@### opcodes FD #########################\r
8048;@##################################\r
8049;@##################################\r
8050;@Since DD and FD opcodes are all the same apart from the address\r
8051;@register they use. When a FD intruction the program runs the code\r
8052;@from the DD location but the address of the IY reg is passed instead\r
8053;@of IX\r
8054\r
f0243975 8055;@end_loop:\r
8056;@ b end_loop\r
cc68a136 8057\r
de89bf45 8058;@ vim:filetype=armasm\r
cc68a136 8059\r
fast MegaDrive/MegaCD/32X emulator