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changed EI handling a bit and types
[picodrive.git] / cpu / DrZ80 / drz80.s
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cc68a136 1;@ Reesy's Z80 Emulator Version 0.001\r
2\r
3;@ (c) Copyright 2004 Reesy, All rights reserved\r
4;@ DrZ80 is free for non-commercial use.\r
5\r
6;@ For commercial use, separate licencing terms must be obtained.\r
7\r
8 .data\r
9 .align 4\r
10\r
11 .global DrZ80Run\r
12 .global DrZ80Ver\r
13\r
e5f426aa 14 .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
15 .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
16 .equiv UPDATE_CONTEXT, 0\r
17 .equiv DRZ80_FOR_PICODRIVE, 1\r
cc68a136 18\r
19.if INTERRUPT_MODE\r
e5f426aa 20 .extern Interrupt\r
cc68a136 21.endif\r
22\r
23.if DRZ80_FOR_PICODRIVE\r
cc68a136 24 .extern PicoRead8\r
25 .extern Pico\r
26 .extern z80_write\r
43e6eaad 27 .extern ym2612_read_local_z80\r
cc68a136 28.endif\r
29\r
30DrZ80Ver: .long 0x0001\r
31\r
32;@ --------------------------- Defines ----------------------------\r
33;@ Make sure that regs/pointers for z80pc to z80sp match up!\r
34\r
35 opcodes .req r3\r
36 z80_icount .req r4\r
37 cpucontext .req r5\r
38 z80pc .req r6\r
39 z80a .req r7\r
40 z80f .req r8\r
41 z80bc .req r9\r
42 z80de .req r10\r
43 z80hl .req r11\r
44 z80sp .req r12 \r
45 z80xx .req lr\r
46\r
47 .equ z80pc_pointer, 0 ;@ 0\r
48 .equ z80a_pointer, z80pc_pointer+4 ;@ 4\r
49 .equ z80f_pointer, z80a_pointer+4 ;@ 8\r
50 .equ z80bc_pointer, z80f_pointer+4 ;@ \r
51 .equ z80de_pointer, z80bc_pointer+4\r
52 .equ z80hl_pointer, z80de_pointer+4\r
53 .equ z80sp_pointer, z80hl_pointer+4\r
54 .equ z80pc_base, z80sp_pointer+4\r
55 .equ z80sp_base, z80pc_base+4\r
56 .equ z80ix, z80sp_base+4\r
57 .equ z80iy, z80ix+4\r
58 .equ z80i, z80iy+4\r
59 .equ z80a2, z80i+4\r
60 .equ z80f2, z80a2+4\r
61 .equ z80bc2, z80f2+4\r
62 .equ z80de2, z80bc2+4\r
63 .equ z80hl2, z80de2+4\r
64 .equ cycles_pointer, z80hl2+4 \r
65 .equ previouspc, cycles_pointer+4 \r
66 .equ z80irq, previouspc+4\r
67 .equ z80if, z80irq+1\r
68 .equ z80im, z80if+1\r
69 .equ z80r, z80im+1\r
70 .equ z80irqvector, z80r+1\r
71 .equ z80irqcallback, z80irqvector+4\r
72 .equ z80_write8, z80irqcallback+4\r
73 .equ z80_write16, z80_write8+4\r
74 .equ z80_in, z80_write16+4\r
75 .equ z80_out, z80_in+4\r
76 .equ z80_read8, z80_out+4\r
77 .equ z80_read16, z80_read8+4\r
78 .equ z80_rebaseSP, z80_read16+4\r
79 .equ z80_rebasePC, z80_rebaseSP+4\r
80\r
81 .equ VFlag, 0\r
82 .equ CFlag, 1\r
83 .equ ZFlag, 2\r
84 .equ SFlag, 3\r
85 .equ HFlag, 4\r
86 .equ NFlag, 5\r
87 .equ Flag3, 6\r
88 .equ Flag5, 7\r
89\r
90 .equ Z80_CFlag, 0\r
91 .equ Z80_NFlag, 1\r
92 .equ Z80_VFlag, 2\r
93 .equ Z80_Flag3, 3\r
94 .equ Z80_HFlag, 4\r
95 .equ Z80_Flag5, 5\r
96 .equ Z80_ZFlag, 6\r
97 .equ Z80_SFlag, 7\r
98\r
99 .equ Z80_IF1, 1<<0\r
100 .equ Z80_IF2, 1<<1\r
101 .equ Z80_HALT, 1<<2\r
102\r
103;@---------------------------------------\r
104\r
105.text\r
106\r
107.if DRZ80_FOR_PICODRIVE\r
cc68a136 108\r
cc68a136 109pico_z80_read8: @ addr\r
110 cmp r0,#0x2000 @ Z80 RAM\r
111 ldrlt r1,[cpucontext,#z80sp_base]\r
112 ldrltb r0,[r1,r0]\r
113 bxlt lr\r
114\r
115 cmp r0,#0x8000 @ 68k bank\r
116 blt 1f\r
117 ldr r2,=(Pico+0x22212)\r
118 ldrh r1,[r2]\r
119 bic r0,r0,#0x3f8000\r
120 orr r0,r0,r1,lsl #15\r
121 ldr r1,[r2,#-0xe] @ ROM size\r
122 cmp r0,r1\r
123 ldrlt r1,[r2,#-0x12] @ ROM\r
124 eorlt r0,r0,#1 @ our ROM is byteswapped\r
125 ldrltb r0,[r1,r0]\r
126 bxlt lr\r
17043584 127 stmfd sp!,{r3,r12,lr}\r
cc68a136 128 bl PicoRead8\r
17043584 129 ldmfd sp!,{r3,r12,pc}\r
cc68a136 1301:\r
131 mov r1,r0,lsr #13\r
132 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
133 bne 0f\r
134 and r0,r0,#3\r
17043584 135 stmfd sp!,{r3,r12,lr}\r
136 str z80_icount,[cpucontext,#cycles_pointer]\r
137 bl ym2612_read_local_z80\r
138 ldmfd sp!,{r3,r12,pc}\r
cc68a136 1390:\r
140 cmp r0,#0x4000\r
141 movge r0,#0xff\r
142 bxge lr\r
143 ldr r1,[cpucontext,#z80sp_base]\r
144 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
145 ldrb r0,[r1,r0]\r
146 bx lr\r
147\r
148pico_z80_read16: @ addr\r
149 cmp r0,#0x2000 @ Z80 RAM\r
150 bge 2f\r
151 ldr r1,[cpucontext,#z80sp_base]\r
152 ldrb r0,[r1,r0]!\r
153 ldrb r1,[r1,#1]\r
154 orr r0,r0,r1,lsl #8\r
155 bx lr\r
156\r
1572:\r
158 cmp r0,#0x8000 @ 68k bank\r
159 blt 1f\r
160 ldr r2,=(Pico+0x22212)\r
161 ldrh r1,[r2]\r
162 bic r0,r0,#0x1f8000\r
163 orr r0,r0,r1,lsl #15\r
164 ldr r1,[r2,#-0xe] @ ROM size\r
165 cmp r0,r1\r
166 ldr r1,[r2,#-0x12] @ ROM\r
167 tst r0,#1\r
168 eor r0,r0,#1\r
169 ldrb r0,[r1,r0]!\r
170 ldreqb r1,[r1,#-1]\r
171 ldrneb r1,[r1,#3] @ this is due to byteswapped ROM\r
172 orr r0,r0,r1,lsl #8\r
173 bx lr\r
1743:\r
175 stmfd sp!,{r3-r5,r12,lr}\r
176 mov r4,r0\r
177 bl PicoRead8\r
178 mov r5,r0\r
179 add r0,r4,#1\r
180 bl PicoRead8\r
181 orr r0,r5,r0,lsl #8\r
b542be46 182 ldmfd sp!,{r3-r5,r12,pc}\r
cc68a136 1831:\r
184 mov r1,r0,lsr #13\r
185 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
186 bne 0f\r
187 and r0,r0,#3\r
17043584 188 stmfd sp!,{r3,r12,lr}\r
189 str z80_icount,[cpucontext,#cycles_pointer]\r
190 bl ym2612_read_local_z80\r
191 orr r0,r0,r0,lsl #8\r
192 ldmfd sp!,{r3,r12,pc}\r
cc68a136 1930:\r
194 cmp r0,#0x4000\r
195 movge r0,#0xff\r
196 bxge lr\r
197 ldr r1,[cpucontext,#z80sp_base]\r
198 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
199 ldrb r0,[r1,r0]!\r
200 ldrb r1,[r1,#1]\r
201 orr r0,r0,r1,lsl #8\r
202 bx lr\r
203\r
204pico_z80_write8: @ data, addr\r
205 cmp r1,#0x4000\r
206 bge 1f\r
207 ldr r2,[cpucontext,#z80sp_base]\r
208 bic r1,r1,#0x0fe000 @ Z80 RAM\r
209 strb r0,[r2,r1]\r
210 bx lr\r
2111:\r
212 stmfd sp!,{r3,r12,lr}\r
17043584 213 str z80_icount,[cpucontext,#cycles_pointer]\r
cc68a136 214 bl z80_write\r
215 ldmfd sp!,{r3,r12,pc}\r
216\r
217pico_z80_write16: @ data, addr\r
218 cmp r1,#0x4000\r
219 bge 1f\r
220 ldr r2,[cpucontext,#z80sp_base]\r
221 bic r1,r1,#0x0fe000 @ Z80 RAM\r
222 strb r0,[r2,r1]!\r
223 mov r0,r0,lsr #8\r
224 strb r0,[r2,#1]\r
225 bx lr\r
2261:\r
17043584 227 stmfd sp!,{r3-r5,r12,lr}\r
228 str z80_icount,[cpucontext,#cycles_pointer]\r
cc68a136 229 mov r4,r0\r
230 mov r5,r1\r
17043584 231 bl z80_write\r
cc68a136 232 mov r0,r4,lsr #8\r
233 add r1,r5,#1\r
17043584 234 bl z80_write\r
235 ldmfd sp!,{r3-r5,r12,pc}\r
cc68a136 236\r
237 .pool\r
238.endif\r
239\r
240.macro fetch cycs\r
241 subs z80_icount,z80_icount,#\cycs\r
242.if UPDATE_CONTEXT\r
243 str z80pc,[cpucontext,#z80pc_pointer]\r
244 str z80_icount,[cpucontext,#cycles_pointer]\r
245 ldr r1,[cpucontext,#z80pc_base]\r
246 sub r2,z80pc,r1\r
247 str r2,[cpucontext,#previouspc]\r
248.endif\r
249 ldrplb r0,[z80pc],#1\r
250 ldrpl pc,[opcodes,r0, lsl #2]\r
251 bmi z80_execute_end\r
252.endm\r
253\r
254.macro eatcycles cycs\r
255 sub z80_icount,z80_icount,#\cycs\r
256.if UPDATE_CONTEXT\r
257 str z80_icount,[cpucontext,#cycles_pointer]\r
258.endif\r
259.endm\r
260\r
261.macro readmem8\r
262.if UPDATE_CONTEXT\r
263 str z80pc,[cpucontext,#z80pc_pointer]\r
264.endif\r
265.if DRZ80_FOR_PICODRIVE\r
266 bl pico_z80_read8\r
267.else\r
268 stmfd sp!,{r3,r12}\r
269 mov lr,pc\r
270 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
271 ldmfd sp!,{r3,r12}\r
272.endif\r
273.endm\r
274\r
275.macro readmem8HL\r
276 mov r0,z80hl, lsr #16\r
277 readmem8\r
278.endm\r
279\r
280.macro readmem16\r
281.if UPDATE_CONTEXT\r
282 str z80pc,[cpucontext,#z80pc_pointer]\r
283.endif\r
284.if DRZ80_FOR_PICODRIVE\r
285 bl pico_z80_read16\r
286.else\r
287 stmfd sp!,{r3,r12}\r
288 mov lr,pc\r
289 ldr pc,[cpucontext,#z80_read16]\r
290 ldmfd sp!,{r3,r12}\r
291.endif\r
292.endm\r
293\r
294.macro writemem8\r
295.if UPDATE_CONTEXT\r
296 str z80pc,[cpucontext,#z80pc_pointer]\r
297.endif\r
298.if DRZ80_FOR_PICODRIVE\r
299 bl pico_z80_write8\r
300.else\r
301 stmfd sp!,{r3,r12}\r
302 mov lr,pc\r
303 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
304 ldmfd sp!,{r3,r12}\r
305.endif\r
306.endm\r
307\r
308.macro writemem8DE\r
309 mov r1,z80de, lsr #16\r
310 writemem8\r
311.endm\r
312\r
313.macro writemem8HL\r
314 mov r1,z80hl, lsr #16\r
315 writemem8\r
316.endm\r
317\r
318.macro writemem16\r
319.if UPDATE_CONTEXT\r
320 str z80pc,[cpucontext,#z80pc_pointer]\r
321.endif\r
322.if DRZ80_FOR_PICODRIVE\r
323 bl pico_z80_write16\r
324.else\r
325 stmfd sp!,{r3,r12}\r
326 mov lr,pc\r
327 ldr pc,[cpucontext,#z80_write16] ;@ r0=data r1=addr\r
328 ldmfd sp!,{r3,r12}\r
329.endif\r
330.endm\r
331\r
332.macro copymem8HL_DE\r
333.if UPDATE_CONTEXT\r
334 str z80pc,[cpucontext,#z80pc_pointer]\r
335.endif\r
336 mov r0,z80hl, lsr #16\r
337.if DRZ80_FOR_PICODRIVE\r
338 bl pico_z80_read8\r
339.else\r
340 stmfd sp!,{r3,r12}\r
341 mov lr,pc\r
342 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
343.endif\r
344.if UPDATE_CONTEXT\r
345 str z80pc,[cpucontext,#z80pc_pointer]\r
346.endif\r
347 mov r1,z80de, lsr #16\r
348.if DRZ80_FOR_PICODRIVE\r
349 bl pico_z80_write8\r
350.else\r
351 mov lr,pc\r
352 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
353 ldmfd sp!,{r3,r12}\r
354.endif\r
355.endm\r
356;@---------------------------------------\r
357\r
358.macro rebasepc\r
359.if UPDATE_CONTEXT\r
360 str z80pc,[cpucontext,#z80pc_pointer]\r
361.endif\r
362.if DRZ80_FOR_PICODRIVE\r
363 bic r0,r0,#0xfe000\r
364 ldr r1,[cpucontext,#z80pc_base]\r
365 add z80pc,r1,r0\r
366.else\r
367 stmfd sp!,{r3,r12}\r
368 mov lr,pc\r
369 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
370 ldmfd sp!,{r3,r12}\r
371 mov z80pc,r0\r
372.endif\r
373.endm\r
374\r
375.macro rebasesp\r
376.if UPDATE_CONTEXT\r
377 str z80pc,[cpucontext,#z80pc_pointer]\r
378.endif\r
379.if DRZ80_FOR_PICODRIVE\r
380 bic r0,r0,#0xfe000\r
381 ldr r1,[cpucontext,#z80sp_base]\r
382 add r0,r1,r0\r
383.else\r
384 stmfd sp!,{r3,r12}\r
385 mov lr,pc\r
386 ldr pc,[cpucontext,#z80_rebaseSP] ;@ external function must rebase sp\r
387 ldmfd sp!,{r3,r12}\r
388.endif\r
389.endm\r
390;@----------------------------------------------------------------------------\r
391\r
392.macro opADC\r
393 movs z80f,z80f,lsr#2 ;@ get C\r
394 subcs r0,r0,#0x100\r
395 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of half carry\r
396 adcs z80a,z80a,r0,ror#8\r
397 mrs r0,cpsr ;@ S,Z,V&C\r
398 eor z80f,z80f,z80a,lsr#24\r
399 and z80f,z80f,#1<<HFlag ;@ H, correct\r
400 orr z80f,z80f,r0,lsr#28\r
401.endm\r
402\r
403.macro opADCA\r
404 movs z80f,z80f,lsr#2 ;@ get C\r
405 orrcs z80a,z80a,#0x00800000\r
406 adds z80a,z80a,z80a\r
407 mrs z80f,cpsr ;@ S,Z,V&C\r
408 mov z80f,z80f,lsr#28\r
409 tst z80a,#0x10000000 ;@ H, correct\r
410 orrne z80f,z80f,#1<<HFlag\r
411 fetch 4\r
412.endm\r
413\r
414.macro opADCH reg\r
415 mov r0,\reg,lsr#24\r
416 opADC\r
417 fetch 4\r
418.endm\r
419\r
420.macro opADCL reg\r
421 movs z80f,z80f,lsr#2 ;@ get C\r
422 adc r0,\reg,\reg,lsr#15\r
423 orrcs z80a,z80a,#0x00800000\r
424 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
425 adds z80a,z80a,r0,lsl#23\r
426 mrs z80f,cpsr ;@ S,Z,V&C\r
427 mov z80f,z80f,lsr#28\r
428 cmn r1,r0,lsl#27\r
429 orrcs z80f,z80f,#1<<HFlag ;@ H, correct\r
430 fetch 4\r
431.endm\r
432\r
433.macro opADCb\r
434 opADC\r
435.endm\r
436;@---------------------------------------\r
437\r
438.macro opADD reg shift\r
439 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
440 adds z80a,z80a,\reg,lsl#\shift\r
441 mrs z80f,cpsr ;@ S,Z,V&C\r
442 mov z80f,z80f,lsr#28\r
443 cmn r1,\reg,lsl#\shift+4\r
444 orrcs z80f,z80f,#1<<HFlag\r
445.endm\r
446\r
447.macro opADDA\r
448 adds z80a,z80a,z80a\r
449 mrs z80f,cpsr ;@ S,Z,V&C\r
450 mov z80f,z80f,lsr#28\r
451 tst z80a,#0x10000000 ;@ H, correct\r
452 orrne z80f,z80f,#1<<HFlag\r
453 fetch 4\r
454.endm\r
455\r
456.macro opADDH reg\r
457 and r0,\reg,#0xFF000000\r
458 opADD r0 0\r
459 fetch 4\r
460.endm\r
461\r
462.macro opADDL reg\r
463 opADD \reg 8\r
464 fetch 4\r
465.endm\r
466\r
467.macro opADDb \r
468 opADD r0 24\r
469.endm\r
470;@---------------------------------------\r
471\r
472.macro opADC16 reg\r
473 movs z80f,z80f,lsr#2 ;@ get C\r
474 adc r0,z80a,\reg,lsr#15\r
475 orrcs z80hl,z80hl,#0x00008000\r
476 mov r1,z80hl,lsl#4\r
477 adds z80hl,z80hl,r0,lsl#15\r
478 mrs z80f,cpsr ;@ S, Z, V & C\r
479 mov z80f,z80f,lsr#28\r
480 cmn r1,r0,lsl#19\r
481 orrcs z80f,z80f,#1<<HFlag\r
482 fetch 15\r
483.endm\r
484\r
485.macro opADC16HL\r
486 movs z80f,z80f,lsr#2 ;@ get C\r
487 orrcs z80hl,z80hl,#0x00008000\r
488 adds z80hl,z80hl,z80hl\r
489 mrs z80f,cpsr ;@ S, Z, V & C\r
490 mov z80f,z80f,lsr#28\r
491 tst z80hl,#0x10000000 ;@ H, correct.\r
492 orrne z80f,z80f,#1<<HFlag\r
493 fetch 15\r
494.endm\r
495\r
496.macro opADD16 reg1 reg2\r
497 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
498 adds \reg1,\reg1,\reg2\r
499 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
500 orrcs z80f,z80f,#1<<CFlag\r
501 cmn r1,\reg2,lsl#4\r
502 orrcs z80f,z80f,#1<<HFlag\r
503.endm\r
504\r
505.macro opADD16s reg1 reg2 shift\r
506 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
507 adds \reg1,\reg1,\reg2,lsl#\shift\r
508 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
509 orrcs z80f,z80f,#1<<CFlag\r
510 cmn r1,\reg2,lsl#4+\shift\r
511 orrcs z80f,z80f,#1<<HFlag\r
512.endm\r
513\r
514.macro opADD16_2 reg\r
515 adds \reg,\reg,\reg\r
516 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
517 orrcs z80f,z80f,#1<<CFlag\r
518 tst \reg,#0x10000000 ;@ H, correct.\r
519 orrne z80f,z80f,#1<<HFlag\r
520.endm\r
521;@---------------------------------------\r
522\r
523.macro opAND reg shift\r
524 and z80a,z80a,\reg,lsl#\shift\r
525 sub r0,opcodes,#0x100\r
526 ldrb z80f,[r0,z80a, lsr #24]\r
527 orr z80f,z80f,#1<<HFlag\r
528.endm\r
529\r
530.macro opANDA\r
531 sub r0,opcodes,#0x100\r
532 ldrb z80f,[r0,z80a, lsr #24]\r
533 orr z80f,z80f,#1<<HFlag\r
534 fetch 4\r
535.endm\r
536\r
537.macro opANDH reg\r
538 opAND \reg 0\r
539 fetch 4\r
540.endm\r
541\r
542.macro opANDL reg\r
543 opAND \reg 8\r
544 fetch 4\r
545.endm\r
546\r
547.macro opANDb\r
548 opAND r0 24\r
549.endm\r
550;@---------------------------------------\r
551\r
552.macro opBITH reg bit\r
553 and z80f,z80f,#1<<CFlag\r
554 tst \reg,#1<<(24+\bit)\r
555 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
556 orrne z80f,z80f,#(1<<HFlag)\r
557 fetch 8\r
558.endm\r
559\r
560.macro opBIT7H reg\r
561 and z80f,z80f,#1<<CFlag\r
562 tst \reg,#1<<(24+7)\r
563 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
564 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
565 fetch 8\r
566.endm\r
567\r
568.macro opBITL reg bit\r
569 and z80f,z80f,#1<<CFlag\r
570 tst \reg,#1<<(16+\bit)\r
571 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
572 orrne z80f,z80f,#(1<<HFlag)\r
573 fetch 8\r
574.endm\r
575\r
576.macro opBIT7L reg\r
577 and z80f,z80f,#1<<CFlag\r
578 tst \reg,#1<<(16+7)\r
579 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
580 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
581 fetch 8\r
582.endm\r
583\r
584.macro opBITb bit\r
585 and z80f,z80f,#1<<CFlag\r
586 tst r0,#1<<\bit\r
587 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
588 orrne z80f,z80f,#(1<<HFlag)\r
589.endm\r
590\r
591.macro opBIT7b\r
592 and z80f,z80f,#1<<CFlag\r
593 tst r0,#1<<7\r
594 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
595 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
596.endm\r
597;@---------------------------------------\r
598\r
599.macro opCP reg shift\r
600 mov r1,z80a,lsl#4 ;@ prepare for check of half carry\r
601 cmp z80a,\reg,lsl#\shift\r
602 mrs z80f,cpsr\r
603 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
604 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
605 cmp r1,\reg,lsl#\shift+4\r
606 orrcc z80f,z80f,#1<<HFlag\r
607.endm\r
608\r
609.macro opCPA\r
610 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
611 fetch 4\r
612.endm\r
613\r
614.macro opCPH reg\r
615 and r0,\reg,#0xFF000000\r
616 opCP r0 0\r
617 fetch 4\r
618.endm\r
619\r
620.macro opCPL reg\r
621 opCP \reg 8\r
622 fetch 4\r
623.endm\r
624\r
625.macro opCPb\r
626 opCP r0 24\r
627.endm\r
628;@---------------------------------------\r
629\r
630.macro opDEC8 reg ;@for A and memory\r
631 and z80f,z80f,#1<<CFlag ;@save carry\r
632 orr z80f,z80f,#1<<NFlag ;@set n\r
633 tst \reg,#0x0f000000\r
634 orreq z80f,z80f,#1<<HFlag\r
635 subs \reg,\reg,#0x01000000\r
636 orrmi z80f,z80f,#1<<SFlag\r
637 orrvs z80f,z80f,#1<<VFlag\r
638 orreq z80f,z80f,#1<<ZFlag\r
639.endm\r
640\r
641.macro opDEC8H reg ;@for B, D & H\r
642 and z80f,z80f,#1<<CFlag ;@save carry\r
643 orr z80f,z80f,#1<<NFlag ;@set n\r
644 tst \reg,#0x0f000000\r
645 orreq z80f,z80f,#1<<HFlag\r
646 subs \reg,\reg,#0x01000000\r
647 orrmi z80f,z80f,#1<<SFlag\r
648 orrvs z80f,z80f,#1<<VFlag\r
649 tst \reg,#0xff000000 ;@Z\r
650 orreq z80f,z80f,#1<<ZFlag\r
651.endm\r
652\r
653.macro opDEC8L reg ;@for C, E & L\r
654 mov \reg,\reg,ror#24\r
655 opDEC8H \reg\r
656 mov \reg,\reg,ror#8\r
657.endm\r
658\r
659.macro opDEC8b ;@for memory\r
660 mov r0,r0,lsl#24\r
661 opDEC8 r0\r
662 mov r0,r0,lsr#24\r
663.endm\r
664;@---------------------------------------\r
665\r
666.macro opIN\r
667 stmfd sp!,{r3,r12}\r
668 mov lr,pc\r
669 ldr pc,[cpucontext,#z80_in] ;@ r0=port - data returned in r0\r
670 ldmfd sp!,{r3,r12}\r
671.endm\r
672\r
673.macro opIN_C\r
674 mov r0,z80bc, lsr #16\r
675 opIN\r
676.endm\r
677;@---------------------------------------\r
678\r
679.macro opINC8 reg ;@for A and memory\r
680 and z80f,z80f,#1<<CFlag ;@save carry, clear n\r
681 adds \reg,\reg,#0x01000000\r
682 orrmi z80f,z80f,#1<<SFlag\r
683 orrvs z80f,z80f,#1<<VFlag\r
684 orrcs z80f,z80f,#1<<ZFlag ;@cs when going from 0xFF to 0x00\r
685 tst \reg,#0x0f000000\r
686 orreq z80f,z80f,#1<<HFlag\r
687.endm\r
688\r
689.macro opINC8H reg ;@for B, D & H\r
690 opINC8 \reg\r
691.endm\r
692\r
693.macro opINC8L reg ;@for C, E & L\r
694 mov \reg,\reg,ror#24\r
695 opINC8 \reg\r
696 mov \reg,\reg,ror#8\r
697.endm\r
698\r
699.macro opINC8b ;@for memory\r
700 mov r0,r0,lsl#24\r
701 opINC8 r0\r
702 mov r0,r0,lsr#24\r
703.endm\r
704;@---------------------------------------\r
705\r
706.macro opOR reg shift\r
707 orr z80a,z80a,\reg,lsl#\shift\r
708 sub r0,opcodes,#0x100\r
709 ldrb z80f,[r0,z80a, lsr #24]\r
710.endm\r
711\r
712.macro opORA\r
713 sub r0,opcodes,#0x100\r
714 ldrb z80f,[r0,z80a, lsr #24]\r
715 fetch 4\r
716.endm\r
717\r
718.macro opORH reg\r
719 and r0,\reg,#0xFF000000\r
720 opOR r0 0\r
721 fetch 4\r
722.endm\r
723\r
724.macro opORL reg\r
725 opOR \reg 8\r
726 fetch 4\r
727.endm\r
728\r
729.macro opORb\r
730 opOR r0 24\r
731.endm\r
732;@---------------------------------------\r
733\r
734.macro opOUT\r
735 stmfd sp!,{r3,r12}\r
736 mov lr,pc\r
737 ldr pc,[cpucontext,#z80_out] ;@ r0=port r1=data\r
738 ldmfd sp!,{r3,r12}\r
739.endm\r
740\r
741.macro opOUT_C\r
742 mov r0,z80bc, lsr #16\r
743 opOUT\r
744.endm\r
745;@---------------------------------------\r
746\r
747.macro opPOP\r
748.if FAST_Z80SP\r
749.if DRZ80_FOR_PICODRIVE\r
750 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
751 ldr r2,[cpucontext,#z80sp_base]\r
752 ldrb r0,[z80sp],#1\r
753 add r2,r2,#0x2000\r
754 cmp z80sp,r2\r
755@ subge z80sp,z80sp,#0x2000 @ unstable?\r
756 ldrb r1,[z80sp],#1\r
757 cmp z80sp,r2\r
758@ subge z80sp,z80sp,#0x2000\r
759 orr r0,r0,r1, lsl #8\r
760.else\r
761 ldrb r0,[z80sp],#1\r
762 ldrb r1,[z80sp],#1\r
763 orr r0,r0,r1, lsl #8\r
764.endif\r
765.else\r
766 mov r0,z80sp\r
767 readmem16\r
768 add z80sp,z80sp,#2\r
769.endif\r
770.endm\r
771\r
772.macro opPOPreg reg\r
773 opPOP\r
774 mov \reg,r0, lsl #16\r
775 fetch 10\r
776.endm\r
777;@---------------------------------------\r
778\r
779.macro opPUSHareg reg @ reg > r1\r
780.if FAST_Z80SP\r
781.if DRZ80_FOR_PICODRIVE\r
782 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
783 ldr r0,[cpucontext,#z80sp_base]\r
784 cmp z80sp,r0\r
785 addle z80sp,z80sp,#0x2000\r
786 mov r1,\reg, lsr #8\r
787 strb r1,[z80sp,#-1]!\r
788 cmp z80sp,r0\r
789 addle z80sp,z80sp,#0x2000\r
790 strb \reg,[z80sp,#-1]!\r
791.else\r
792 mov r1,\reg, lsr #8\r
793 strb r1,[z80sp,#-1]!\r
794 strb \reg,[z80sp,#-1]!\r
795.endif\r
796.else\r
797 mov r0,\reg\r
798 sub z80sp,z80sp,#2\r
799 mov r1,z80sp\r
800 writemem16\r
801.endif\r
802.endm\r
803\r
804.macro opPUSHreg reg\r
805.if FAST_Z80SP\r
806.if DRZ80_FOR_PICODRIVE\r
807 ldr r0,[cpucontext,#z80sp_base]\r
808 cmp z80sp,r0\r
809 addle z80sp,z80sp,#0x2000\r
810 mov r1,\reg, lsr #24\r
811 strb r1,[z80sp,#-1]!\r
812 cmp z80sp,r0\r
813 addle z80sp,z80sp,#0x2000\r
814 mov r1,\reg, lsr #16\r
815 strb r1,[z80sp,#-1]!\r
816.else\r
817 mov r1,\reg, lsr #24\r
818 strb r1,[z80sp,#-1]!\r
819 mov r1,\reg, lsr #16\r
820 strb r1,[z80sp,#-1]!\r
821.endif\r
822.else\r
823 mov r0,\reg,lsr #16\r
824 sub z80sp,z80sp,#2\r
825 mov r1,z80sp\r
826 writemem16\r
827.endif\r
828.endm\r
829;@---------------------------------------\r
830\r
831.macro opRESmemHL bit\r
832.if DRZ80_FOR_PICODRIVE\r
833 mov r0,z80hl, lsr #16\r
834 bl pico_z80_read8\r
835 bic r0,r0,#1<<\bit\r
836 mov r1,z80hl, lsr #16\r
837 bl pico_z80_write8\r
838.else\r
839 mov r0,z80hl, lsr #16\r
840 stmfd sp!,{r3,r12}\r
841 mov lr,pc\r
842 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
843 bic r0,r0,#1<<\bit\r
844 mov r1,z80hl, lsr #16\r
845 mov lr,pc\r
846 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
847 ldmfd sp!,{r3,r12}\r
848.endif\r
849 fetch 15\r
850.endm\r
851;@---------------------------------------\r
852\r
853.macro opRESmem bit\r
854.if DRZ80_FOR_PICODRIVE\r
855 stmfd sp!,{r0} ;@ save addr as well\r
856 bl pico_z80_read8\r
857 bic r0,r0,#1<<\bit\r
858 ldmfd sp!,{r1} ;@ restore addr into r1\r
859 bl pico_z80_write8\r
860.else\r
861 stmfd sp!,{r3,r12}\r
862 stmfd sp!,{r0} ;@ save addr as well\r
863 mov lr,pc\r
864 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
865 bic r0,r0,#1<<\bit\r
866 ldmfd sp!,{r1} ;@ restore addr into r1\r
867 mov lr,pc\r
868 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
869 ldmfd sp!,{r3,r12}\r
870.endif\r
871 fetch 23\r
872.endm\r
873;@---------------------------------------\r
874\r
875.macro opRL reg1 reg2 shift\r
876 movs \reg1,\reg2,lsl \shift\r
877 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
878 orrne \reg1,\reg1,#0x01000000\r
879;@ and r2,z80f,#1<<CFlag\r
880;@ orr $x,$x,r2,lsl#23\r
881 sub r1,opcodes,#0x100\r
882 ldrb z80f,[r1,\reg1,lsr#24] ;@get PZS\r
883 orrcs z80f,z80f,#1<<CFlag\r
884.endm\r
885\r
886.macro opRLA\r
887 opRL z80a, z80a, #1\r
888 fetch 8\r
889.endm\r
890\r
891.macro opRLH reg\r
892 and r0,\reg,#0xFF000000 ;@mask high to r0\r
893 adds \reg,\reg,r0\r
894 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
895 orrne \reg,\reg,#0x01000000\r
896 sub r1,opcodes,#0x100\r
897 ldrb z80f,[r1,\reg,lsr#24] ;@get PZS\r
898 orrcs z80f,z80f,#1<<CFlag\r
899 fetch 8\r
900.endm\r
901\r
902.macro opRLL reg\r
903 opRL r0, \reg, #9\r
904 and \reg,\reg,#0xFF000000 ;@mask out high\r
905 orr \reg,\reg,r0,lsr#8\r
906 fetch 8\r
907.endm\r
908\r
909.macro opRLb\r
910 opRL r0, r0, #25\r
911 mov r0,r0,lsr#24\r
912.endm\r
913;@---------------------------------------\r
914\r
915.macro opRLC reg1 reg2 shift\r
916 movs \reg1,\reg2,lsl#\shift\r
917 orrcs \reg1,\reg1,#0x01000000\r
918 sub r1,opcodes,#0x100\r
919 ldrb z80f,[r1,\reg1,lsr#24]\r
920 orrcs z80f,z80f,#1<<CFlag\r
921.endm\r
922\r
923.macro opRLCA\r
924 opRLC z80a, z80a, 1\r
925 fetch 8\r
926.endm\r
927\r
928.macro opRLCH reg\r
929 and r0,\reg,#0xFF000000 ;@mask high to r0\r
930 adds \reg,\reg,r0\r
931 orrcs \reg,\reg,#0x01000000\r
932 sub r1,opcodes,#0x100\r
933 ldrb z80f,[r1,\reg,lsr#24]\r
934 orrcs z80f,z80f,#1<<CFlag\r
935 fetch 8\r
936.endm\r
937\r
938.macro opRLCL reg\r
939 opRLC r0, \reg, 9\r
940 and \reg,\reg,#0xFF000000 ;@mask out high\r
941 orr \reg,\reg,r0,lsr#8\r
942 fetch 8\r
943.endm\r
944\r
945.macro opRLCb\r
946 opRLC r0, r0, 25\r
947 mov r0,r0,lsr#24\r
948.endm\r
949;@---------------------------------------\r
950\r
951.macro opRR reg1 reg2 shift\r
952 movs \reg1,\reg2,lsr#\shift\r
953 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
954 orrne \reg1,\reg1,#0x00000080\r
955;@ and r2,z80_f,#PSR_C\r
956;@ orr \reg1,\reg1,r2,lsl#6\r
957 sub r1,opcodes,#0x100\r
958 ldrb z80f,[r1,\reg1]\r
959 orrcs z80f,z80f,#1<<CFlag\r
960.endm\r
961\r
962.macro opRRA\r
963 orr z80a,z80a,z80f,lsr#1 ;@get C\r
964 movs z80a,z80a,ror#25\r
965 mov z80a,z80a,lsl#24\r
966 sub r1,opcodes,#0x100\r
967 ldrb z80f,[r1,z80a,lsr#24]\r
968 orrcs z80f,z80f,#1<<CFlag\r
969 fetch 8\r
970.endm\r
971\r
972.macro opRRH reg\r
973 orr r0,\reg,z80f,lsr#1 ;@get C\r
974 movs r0,r0,ror#25\r
975 and \reg,\reg,#0x00FF0000 ;@mask out low\r
976 orr \reg,\reg,r0,lsl#24\r
977 sub r1,opcodes,#0x100\r
978 ldrb z80f,[r1,\reg,lsr#24]\r
979 orrcs z80f,z80f,#1<<CFlag\r
980 fetch 8\r
981.endm\r
982\r
983.macro opRRL reg\r
984 and r0,\reg,#0x00FF0000 ;@mask out low to r0\r
985 opRR r0 r0 17\r
986 and \reg,\reg,#0xFF000000 ;@mask out high\r
987 orr \reg,\reg,r0,lsl#16\r
988 fetch 8\r
989.endm\r
990\r
991.macro opRRb\r
992 opRR r0 r0 1\r
993.endm\r
994;@---------------------------------------\r
995\r
996.macro opRRC reg1 reg2 shift\r
997 movs \reg1,\reg2,lsr#\shift\r
998 orrcs \reg1,\reg1,#0x00000080\r
999 sub r1,opcodes,#0x100\r
1000 ldrb z80f,[r1,\reg1]\r
1001 orrcs z80f,z80f,#1<<CFlag\r
1002.endm\r
1003\r
1004.macro opRRCA\r
1005 opRRC z80a, z80a, 25\r
1006 mov z80a,z80a,lsl#24\r
1007 fetch 8\r
1008.endm\r
1009\r
1010.macro opRRCH reg\r
1011 opRRC r0, \reg, 25\r
1012 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1013 orr \reg,\reg,r0,lsl#24\r
1014 fetch 8\r
1015.endm\r
1016\r
1017.macro opRRCL reg\r
1018 and r0,\reg,#0x00FF0000 ;@mask low to r0\r
1019 opRRC r0, r0, 17\r
1020 and \reg,\reg,#0xFF000000 ;@mask out high\r
1021 orr \reg,\reg,r0,lsl#16\r
1022 fetch 8\r
1023.endm\r
1024\r
1025.macro opRRCb\r
1026 opRRC r0, r0, 1\r
1027.endm\r
1028;@---------------------------------------\r
1029\r
1030.macro opRST addr\r
1031 ldr r0,[cpucontext,#z80pc_base]\r
1032 sub r2,z80pc,r0\r
1033 opPUSHareg r2\r
1034 mov r0,#\addr\r
1035 rebasepc\r
1036 fetch 11\r
1037.endm\r
1038;@---------------------------------------\r
1039\r
1040.macro opSBC\r
1041 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1042 movs z80f,z80f,lsr#2 ;@ get C\r
1043 subcc r0,r0,#0x100\r
1044 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of H\r
1045 sbcs z80a,z80a,r0,ror#8\r
1046 mrs r0,cpsr\r
1047 eor z80f,z80f,z80a,lsr#24\r
1048 and z80f,z80f,#1<<HFlag ;@ H, correct\r
1049 orr z80f,z80f,r0,lsr#28 ;@ S,Z,V&C\r
1050 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1051.endm\r
1052\r
1053.macro opSBCA\r
1054 movs z80f,z80f,lsr#2 ;@ get C\r
1055 movcc z80a,#0x00000000\r
1056 movcs z80a,#0xFF000000\r
1057 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1058 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1059 fetch 4\r
1060.endm\r
1061\r
1062.macro opSBCH reg\r
1063 mov r0,\reg,lsr#24\r
1064 opSBC\r
1065 fetch 4\r
1066.endm\r
1067\r
1068.macro opSBCL reg\r
1069 mov r0,\reg,lsl#8\r
1070 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1071 movs z80f,z80f,lsr#2 ;@ get C\r
1072 sbccc r0,r0,#0xFF000000\r
1073 mov r1,z80a,lsl#4 ;@ prepare for check of H\r
1074 sbcs z80a,z80a,r0\r
1075 mrs z80f,cpsr\r
1076 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1077 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1078 cmp r1,r0,lsl#4\r
1079 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1080 fetch 4\r
1081.endm\r
1082\r
1083.macro opSBCb\r
1084 opSBC\r
1085.endm\r
1086;@---------------------------------------\r
1087\r
1088.macro opSBC16 reg\r
1089 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1090 movs z80f,z80f,lsr#2 ;@ get C\r
1091 sbc r1,r1,r1 ;@ set r1 to -1 or 0.\r
1092 orr r0,\reg,r1,lsr#16\r
1093 mov r1,z80hl,lsl#4 ;@ prepare for check of H\r
1094 sbcs z80hl,z80hl,r0\r
1095 mrs z80f,cpsr\r
1096 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1097 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1098 cmp r1,r0,lsl#4\r
1099 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1100 fetch 15\r
1101.endm\r
1102\r
1103.macro opSBC16HL\r
1104 movs z80f,z80f,lsr#2 ;@ get C\r
1105 mov z80hl,#0x00000000\r
1106 subcs z80hl,z80hl,#0x00010000\r
1107 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1108 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1109 fetch 15\r
1110.endm\r
1111;@---------------------------------------\r
1112\r
1113.macro opSETmemHL bit\r
1114.if DRZ80_FOR_PICODRIVE\r
1115 mov r0,z80hl, lsr #16\r
1116 bl pico_z80_read8\r
1117 orr r0,r0,#1<<\bit\r
1118 mov r1,z80hl, lsr #16\r
1119 bl pico_z80_write8\r
1120.else\r
1121 mov r0,z80hl, lsr #16\r
1122 stmfd sp!,{r3,r12}\r
1123 mov lr,pc\r
1124 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
1125 orr r0,r0,#1<<\bit\r
1126 mov r1,z80hl, lsr #16\r
1127 mov lr,pc\r
1128 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1129 ldmfd sp!,{r3,r12}\r
1130.endif\r
1131 fetch 15\r
1132.endm\r
1133;@---------------------------------------\r
1134\r
1135.macro opSETmem bit\r
1136.if DRZ80_FOR_PICODRIVE\r
1137 stmfd sp!,{r0} ;@ save addr as well\r
1138 bl pico_z80_read8\r
1139 orr r0,r0,#1<<\bit\r
1140 ldmfd sp!,{r1} ;@ restore addr into r1\r
1141 bl pico_z80_write8\r
1142.else\r
1143 stmfd sp!,{r3,r12}\r
1144 stmfd sp!,{r0} ;@ save addr as well\r
1145 mov lr,pc\r
1146 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
1147 orr r0,r0,#1<<\bit\r
1148 ldmfd sp!,{r1} ;@ restore addr into r1\r
1149 mov lr,pc\r
1150 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1151 ldmfd sp!,{r3,r12}\r
1152.endif\r
1153 fetch 23\r
1154.endm\r
1155;@---------------------------------------\r
1156\r
1157.macro opSLA reg1 reg2 shift\r
1158 movs \reg1,\reg2,lsl#\shift\r
1159 sub r1,opcodes,#0x100\r
1160 ldrb z80f,[r1,\reg1,lsr#24]\r
1161 orrcs z80f,z80f,#1<<CFlag\r
1162.endm\r
1163\r
1164.macro opSLAA\r
1165 opSLA z80a, z80a, 1\r
1166 fetch 8\r
1167.endm\r
1168\r
1169.macro opSLAH reg\r
1170 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1171 adds \reg,\reg,r0\r
1172 sub r1,opcodes,#0x100\r
1173 ldrb z80f,[r1,\reg,lsr#24]\r
1174 orrcs z80f,z80f,#1<<CFlag\r
1175 fetch 8\r
1176.endm\r
1177\r
1178.macro opSLAL reg\r
1179 opSLA r0, \reg, 9\r
1180 and \reg,\reg,#0xFF000000 ;@mask out high\r
1181 orr \reg,\reg,r0,lsr#8\r
1182 fetch 8\r
1183.endm\r
1184\r
1185.macro opSLAb\r
1186 opSLA r0, r0, 25\r
1187 mov r0,r0,lsr#24\r
1188.endm\r
1189;@---------------------------------------\r
1190\r
1191.macro opSLL reg1 reg2 shift\r
1192 movs \reg1,\reg2,lsl#\shift\r
1193 orr \reg1,\reg1,#0x01000000\r
1194 sub r1,opcodes,#0x100\r
1195 ldrb z80f,[r1,\reg1,lsr#24]\r
1196 orrcs z80f,z80f,#1<<CFlag\r
1197.endm\r
1198\r
1199.macro opSLLA\r
1200 opSLL z80a, z80a, 1\r
1201 fetch 8\r
1202.endm\r
1203\r
1204.macro opSLLH reg\r
1205 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1206 adds \reg,\reg,r0\r
1207 orr \reg,\reg,#0x01000000\r
1208 sub r1,opcodes,#0x100\r
1209 ldrb z80f,[r1,\reg,lsr#24]\r
1210 orrcs z80f,z80f,#1<<CFlag\r
1211 fetch 8\r
1212.endm\r
1213\r
1214.macro opSLLL reg\r
1215 opSLL r0, \reg, 9\r
1216 and \reg,\reg,#0xFF000000 ;@mask out high\r
1217 orr \reg,\reg,r0,lsr#8\r
1218 fetch 8\r
1219.endm\r
1220\r
1221.macro opSLLb\r
1222 opSLL r0, r0, 25\r
1223 mov r0,r0,lsr#24\r
1224.endm\r
1225;@---------------------------------------\r
1226\r
1227.macro opSRA reg1 reg2\r
1228 movs \reg1,\reg2,asr#25\r
1229 and \reg1,\reg1,#0xFF\r
1230 sub r1,opcodes,#0x100\r
1231 ldrb z80f,[r1,\reg1]\r
1232 orrcs z80f,z80f,#1<<CFlag\r
1233.endm\r
1234\r
1235.macro opSRAA\r
1236 movs r0,z80a,asr#25\r
1237 mov z80a,r0,lsl#24\r
1238 sub r1,opcodes,#0x100\r
1239 ldrb z80f,[r1,z80a,lsr#24]\r
1240 orrcs z80f,z80f,#1<<CFlag\r
1241 fetch 8\r
1242.endm\r
1243\r
1244.macro opSRAH reg\r
1245 movs r0,\reg,asr#25\r
1246 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1247 orr \reg,\reg,r0,lsl#24\r
1248 sub r1,opcodes,#0x100\r
1249 ldrb z80f,[r1,\reg,lsr#24]\r
1250 orrcs z80f,z80f,#1<<CFlag\r
1251 fetch 8\r
1252.endm\r
1253\r
1254.macro opSRAL reg\r
1255 mov r0,\reg,lsl#8\r
1256 opSRA r0, r0\r
1257 and \reg,\reg,#0xFF000000 ;@mask out high\r
1258 orr \reg,\reg,r0,lsl#16\r
1259 fetch 8\r
1260.endm\r
1261\r
1262.macro opSRAb\r
1263 mov r0,r0,lsl#24\r
1264 opSRA r0, r0\r
1265.endm\r
1266;@---------------------------------------\r
1267\r
1268.macro opSRL reg1 reg2 shift\r
1269 movs \reg1,\reg2,lsr#\shift\r
1270 sub r1,opcodes,#0x100\r
1271 ldrb z80f,[r1,\reg1]\r
1272 orrcs z80f,z80f,#1<<CFlag\r
1273.endm\r
1274\r
1275.macro opSRLA\r
1276 opSRL z80a, z80a, 25\r
1277 mov z80a,z80a,lsl#24\r
1278 fetch 8\r
1279.endm\r
1280\r
1281.macro opSRLH reg\r
1282 opSRL r0, \reg, 25\r
1283 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1284 orr \reg,\reg,r0,lsl#24\r
1285 fetch 8\r
1286.endm\r
1287\r
1288.macro opSRLL reg\r
1289 mov r0,\reg,lsl#8\r
1290 opSRL r0, r0, 25\r
1291 and \reg,\reg,#0xFF000000 ;@mask out high\r
1292 orr \reg,\reg,r0,lsl#16\r
1293 fetch 8\r
1294.endm\r
1295\r
1296.macro opSRLb\r
1297 opSRL r0, r0, 1\r
1298.endm\r
1299;@---------------------------------------\r
1300\r
1301.macro opSUB reg shift\r
1302 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
1303 subs z80a,z80a,\reg,lsl#\shift\r
1304 mrs z80f,cpsr\r
1305 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1306 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
1307 cmp r1,\reg,lsl#\shift+4\r
1308 orrcc z80f,z80f,#1<<HFlag\r
1309.endm\r
1310\r
1311.macro opSUBA\r
1312 mov z80a,#0\r
1313 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
1314 fetch 4\r
1315.endm\r
1316\r
1317.macro opSUBH reg\r
1318 and r0,\reg,#0xFF000000\r
1319 opSUB r0, 0\r
1320 fetch 4\r
1321.endm\r
1322\r
1323.macro opSUBL reg\r
1324 opSUB \reg, 8\r
1325 fetch 4\r
1326.endm\r
1327\r
1328.macro opSUBb\r
1329 opSUB r0, 24\r
1330.endm\r
1331;@---------------------------------------\r
1332\r
1333.macro opXOR reg shift\r
1334 eor z80a,z80a,\reg,lsl#\shift\r
1335 sub r0,opcodes,#0x100\r
1336 ldrb z80f,[r0,z80a, lsr #24]\r
1337.endm\r
1338\r
1339.macro opXORA\r
1340 mov z80a,#0\r
1341 mov z80f,#(1<<ZFlag)|(1<<VFlag)\r
1342 fetch 4\r
1343.endm\r
1344\r
1345.macro opXORH reg\r
1346 and r0,\reg,#0xFF000000\r
1347 opXOR r0, 0\r
1348 fetch 4\r
1349.endm\r
1350\r
1351.macro opXORL reg\r
1352 opXOR \reg, 8\r
1353 fetch 4\r
1354.endm\r
1355\r
1356.macro opXORb\r
1357 opXOR r0, 24\r
1358.endm\r
1359;@---------------------------------------\r
1360\r
1361\r
1362;@ --------------------------- Framework --------------------------\r
1363 \r
1364.text\r
1365\r
1366DrZ80Run:\r
1367 ;@ r0 = pointer to cpu context\r
1368 ;@ r1 = ISTATES to execute \r
1369 ;@######################################### \r
1370 stmdb sp!,{r4-r12,lr} ;@ save registers on stack\r
1371 mov cpucontext,r0 ;@ setup main memory pointer\r
1372 mov z80_icount,r1 ;@ setup number of Tstates to execute\r
1373\r
1374.if INTERRUPT_MODE == 0\r
1375 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
1376.endif\r
1377 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1378\r
1379.if INTERRUPT_MODE == 0\r
1380 ;@ check ints\r
1381 tst r0,#1\r
1382 movnes r0,r0,lsr #8\r
1383 blne DoInterrupt\r
1384.endif\r
1385\r
1386 ldrb r0,[z80pc],#1 ;@ get first op code\r
1387 ldr opcodes,MAIN_opcodes_POINTER2\r
1388 ldr pc,[opcodes,r0, lsl #2] ;@ execute op code\r
1389\r
1390MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
1391\r
1392\r
1393z80_execute_end:\r
1394 ;@ save registers in CPU context\r
1395 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1396 mov r0,z80_icount\r
1397 ldmia sp!,{r4-r12,pc} ;@ restore registers from stack and return to C code\r
1398\r
1399.if INTERRUPT_MODE\r
1400Interrupt_local: .word Interrupt\r
1401.endif\r
1402\r
1403DoInterrupt:\r
1404.if INTERRUPT_MODE\r
1405 ;@ Don't do own int handler, call mames instead\r
1406\r
1407 ;@ save everything back into DrZ80 context\r
1408 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1409 stmfd sp!,{r3,r4,r5,lr} ;@ save rest of regs on stack\r
1410 mov lr,pc\r
1411 ldr pc,Interrupt_local\r
1412 ldmfd sp!,{r3,r4,r5,lr} ;@ load regs from stack\r
1413 ;@ reload regs from DrZ80 context\r
1414 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1415 mov pc,lr ;@ return\r
1416.else\r
1417 stmfd sp!,{lr}\r
1418\r
1419 tst r0,#4 ;@ check halt\r
1420 addne z80pc,z80pc,#1\r
1421\r
1422 ldrb r1,[cpucontext,#z80im]\r
1423\r
1424 ;@ clear halt and int flags\r
1425 eor r0,r0,r0\r
1426 strb r0,[cpucontext,#z80if]\r
1427\r
1428 ;@ now check int mode\r
1429 tst r1,#1\r
1430 bne DoInterrupt_mode1\r
1431 tst r1,#2\r
1432 bne DoInterrupt_mode2\r
cc68a136 1433\r
1434DoInterrupt_mode0:\r
1435 ;@ get 3 byte vector\r
1436 ldr r2,[cpucontext, #z80irqvector]\r
1437 and r1,r2,#0xFF0000\r
1438 cmp r1,#0xCD0000 ;@ call\r
1439 bne 1f\r
1440 ;@ ########\r
1441 ;@ # call\r
1442 ;@ ########\r
1443 ;@ save current pc on stack\r
1444 ldr r0,[cpucontext,#z80pc_base]\r
1445 sub r0,z80pc,r0\r
1446.if FAST_Z80SP\r
1447 mov r1,r0, lsr #8\r
1448 strb r1,[z80sp,#-1]!\r
1449 strb r0,[z80sp,#-1]!\r
1450.else\r
1451 sub z80sp,z80sp,#2\r
1452 mov r1,z80sp\r
1453 writemem16\r
1454 ldr r2,[cpucontext, #z80irqvector]\r
1455.endif\r
1456 ;@ jump to vector\r
1457 mov r2,r2,lsl#16\r
1458 mov r0,r2,lsr#16\r
1459 ;@ rebase new pc\r
1460 rebasepc\r
1461\r
1462 b DoInterrupt_end\r
1463\r
14641:\r
1465 cmp r1,#0xC30000 ;@ jump\r
1466 bne DoInterrupt_mode1 ;@ rst\r
1467 ;@ #######\r
1468 ;@ # jump\r
1469 ;@ #######\r
1470 ;@ jump to vector\r
1471 mov r2,r2,lsl#16\r
1472 mov r0,r2,lsr#16\r
1473 ;@ rebase new pc\r
1474 rebasepc\r
1475\r
1476 b DoInterrupt_end\r
1477\r
1478DoInterrupt_mode1:\r
1479 ldr r0,[cpucontext,#z80pc_base]\r
1480 sub r2,z80pc,r0\r
1481 opPUSHareg r2\r
1482 mov r0,#0x38\r
1483 rebasepc\r
1484\r
1485 b DoInterrupt_end\r
1486\r
1487DoInterrupt_mode2:\r
1488 ;@ push pc on stack\r
1489 ldr r0,[cpucontext,#z80pc_base]\r
1490 sub r2,z80pc,r0\r
1491 opPUSHareg r2\r
1492\r
1493 ;@ get 1 byte vector address\r
1494 ldrb r0,[cpucontext, #z80irqvector]\r
1495 ldr r1,[cpucontext, #z80i]\r
1496 orr r0,r0,r1,lsr#16\r
1497\r
1498 ;@ read new pc from vector address\r
1499.if DRZ80_FOR_PICODRIVE\r
1500 bl pico_z80_read16\r
1501 bic r0,r0,#0xfe000\r
1502 ldr r1,[cpucontext,#z80pc_base]\r
1503 add z80pc,r1,r0\r
1504.if UPDATE_CONTEXT\r
1505 str z80pc,[cpucontext,#z80pc_pointer]\r
1506.endif\r
1507.else\r
1508 stmfd sp!,{r3,r12}\r
1509 mov lr,pc\r
1510 ldr pc,[cpucontext,#z80_read16]\r
1511\r
1512 ;@ rebase new pc\r
1513.if UPDATE_CONTEXT\r
1514 str z80pc,[cpucontext,#z80pc_pointer]\r
1515.endif\r
1516 mov lr,pc\r
1517 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
1518 ldmfd sp!,{r3,r12}\r
1519 mov z80pc,r0 \r
1520.endif\r
1521\r
1522DoInterrupt_end:\r
1523 ;@ interupt accepted so callback irq interface\r
1524 ldr r0,[cpucontext, #z80irqcallback]\r
1525 tst r0,r0\r
1526 ldmeqfd sp!,{pc}\r
1527 stmfd sp!,{r3,r12}\r
1528 mov lr,pc\r
1529 mov pc,r0 ;@ call callback function\r
1530 ldmfd sp!,{r3,r12}\r
1531 ldmfd sp!,{pc} ;@ return\r
1532\r
1533.endif\r
1534\r
1535.data\r
1536.align 4\r
1537\r
1538DAATable: .hword (0x00<<8)|(1<<ZFlag)|(1<<VFlag)\r
1539 .hword (0x01<<8) \r
1540 .hword (0x02<<8) \r
1541 .hword (0x03<<8) |(1<<VFlag)\r
1542 .hword (0x04<<8) \r
1543 .hword (0x05<<8) |(1<<VFlag)\r
1544 .hword (0x06<<8) |(1<<VFlag)\r
1545 .hword (0x07<<8) \r
1546 .hword (0x08<<8) \r
1547 .hword (0x09<<8) |(1<<VFlag)\r
1548 .hword (0x10<<8) |(1<<HFlag) \r
1549 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
1550 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
1551 .hword (0x13<<8) |(1<<HFlag) \r
1552 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
1553 .hword (0x15<<8) |(1<<HFlag) \r
1554 .hword (0x10<<8) \r
1555 .hword (0x11<<8) |(1<<VFlag)\r
1556 .hword (0x12<<8) |(1<<VFlag)\r
1557 .hword (0x13<<8) \r
1558 .hword (0x14<<8) |(1<<VFlag)\r
1559 .hword (0x15<<8) \r
1560 .hword (0x16<<8) \r
1561 .hword (0x17<<8) |(1<<VFlag)\r
1562 .hword (0x18<<8) |(1<<VFlag)\r
1563 .hword (0x19<<8) \r
1564 .hword (0x20<<8) |(1<<HFlag) \r
1565 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
1566 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
1567 .hword (0x23<<8) |(1<<HFlag) \r
1568 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
1569 .hword (0x25<<8) |(1<<HFlag) \r
1570 .hword (0x20<<8) \r
1571 .hword (0x21<<8) |(1<<VFlag)\r
1572 .hword (0x22<<8) |(1<<VFlag)\r
1573 .hword (0x23<<8) \r
1574 .hword (0x24<<8) |(1<<VFlag)\r
1575 .hword (0x25<<8) \r
1576 .hword (0x26<<8) \r
1577 .hword (0x27<<8) |(1<<VFlag)\r
1578 .hword (0x28<<8) |(1<<VFlag)\r
1579 .hword (0x29<<8) \r
1580 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
1581 .hword (0x31<<8) |(1<<HFlag) \r
1582 .hword (0x32<<8) |(1<<HFlag) \r
1583 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
1584 .hword (0x34<<8) |(1<<HFlag) \r
1585 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
1586 .hword (0x30<<8) |(1<<VFlag)\r
1587 .hword (0x31<<8) \r
1588 .hword (0x32<<8) \r
1589 .hword (0x33<<8) |(1<<VFlag)\r
1590 .hword (0x34<<8) \r
1591 .hword (0x35<<8) |(1<<VFlag)\r
1592 .hword (0x36<<8) |(1<<VFlag)\r
1593 .hword (0x37<<8) \r
1594 .hword (0x38<<8) \r
1595 .hword (0x39<<8) |(1<<VFlag)\r
1596 .hword (0x40<<8) |(1<<HFlag) \r
1597 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
1598 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
1599 .hword (0x43<<8) |(1<<HFlag) \r
1600 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
1601 .hword (0x45<<8) |(1<<HFlag) \r
1602 .hword (0x40<<8) \r
1603 .hword (0x41<<8) |(1<<VFlag)\r
1604 .hword (0x42<<8) |(1<<VFlag)\r
1605 .hword (0x43<<8) \r
1606 .hword (0x44<<8) |(1<<VFlag)\r
1607 .hword (0x45<<8) \r
1608 .hword (0x46<<8) \r
1609 .hword (0x47<<8) |(1<<VFlag)\r
1610 .hword (0x48<<8) |(1<<VFlag)\r
1611 .hword (0x49<<8) \r
1612 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
1613 .hword (0x51<<8) |(1<<HFlag) \r
1614 .hword (0x52<<8) |(1<<HFlag) \r
1615 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
1616 .hword (0x54<<8) |(1<<HFlag) \r
1617 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
1618 .hword (0x50<<8) |(1<<VFlag)\r
1619 .hword (0x51<<8) \r
1620 .hword (0x52<<8) \r
1621 .hword (0x53<<8) |(1<<VFlag)\r
1622 .hword (0x54<<8) \r
1623 .hword (0x55<<8) |(1<<VFlag)\r
1624 .hword (0x56<<8) |(1<<VFlag)\r
1625 .hword (0x57<<8) \r
1626 .hword (0x58<<8) \r
1627 .hword (0x59<<8) |(1<<VFlag)\r
1628 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
1629 .hword (0x61<<8) |(1<<HFlag) \r
1630 .hword (0x62<<8) |(1<<HFlag) \r
1631 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
1632 .hword (0x64<<8) |(1<<HFlag) \r
1633 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
1634 .hword (0x60<<8) |(1<<VFlag)\r
1635 .hword (0x61<<8) \r
1636 .hword (0x62<<8) \r
1637 .hword (0x63<<8) |(1<<VFlag)\r
1638 .hword (0x64<<8) \r
1639 .hword (0x65<<8) |(1<<VFlag)\r
1640 .hword (0x66<<8) |(1<<VFlag)\r
1641 .hword (0x67<<8) \r
1642 .hword (0x68<<8) \r
1643 .hword (0x69<<8) |(1<<VFlag)\r
1644 .hword (0x70<<8) |(1<<HFlag) \r
1645 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
1646 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
1647 .hword (0x73<<8) |(1<<HFlag) \r
1648 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
1649 .hword (0x75<<8) |(1<<HFlag) \r
1650 .hword (0x70<<8) \r
1651 .hword (0x71<<8) |(1<<VFlag)\r
1652 .hword (0x72<<8) |(1<<VFlag)\r
1653 .hword (0x73<<8) \r
1654 .hword (0x74<<8) |(1<<VFlag)\r
1655 .hword (0x75<<8) \r
1656 .hword (0x76<<8) \r
1657 .hword (0x77<<8) |(1<<VFlag)\r
1658 .hword (0x78<<8) |(1<<VFlag)\r
1659 .hword (0x79<<8) \r
1660 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
1661 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1662 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1663 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
1664 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1665 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
1666 .hword (0x80<<8)|(1<<SFlag) \r
1667 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)\r
1668 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)\r
1669 .hword (0x83<<8)|(1<<SFlag) \r
1670 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)\r
1671 .hword (0x85<<8)|(1<<SFlag) \r
1672 .hword (0x86<<8)|(1<<SFlag) \r
1673 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
1674 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
1675 .hword (0x89<<8)|(1<<SFlag) \r
1676 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1677 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
1678 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
1679 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1680 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
1681 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1682 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)\r
1683 .hword (0x91<<8)|(1<<SFlag) \r
1684 .hword (0x92<<8)|(1<<SFlag) \r
1685 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)\r
1686 .hword (0x94<<8)|(1<<SFlag) \r
1687 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)\r
1688 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
1689 .hword (0x97<<8)|(1<<SFlag) \r
1690 .hword (0x98<<8)|(1<<SFlag) \r
1691 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
1692 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1693 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1694 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1695 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1696 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1697 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1698 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1699 .hword (0x01<<8) |(1<<CFlag)\r
1700 .hword (0x02<<8) |(1<<CFlag)\r
1701 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1702 .hword (0x04<<8) |(1<<CFlag)\r
1703 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1704 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1705 .hword (0x07<<8) |(1<<CFlag)\r
1706 .hword (0x08<<8) |(1<<CFlag)\r
1707 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1708 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1709 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1710 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1711 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1712 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1713 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1714 .hword (0x10<<8) |(1<<CFlag)\r
1715 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1716 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1717 .hword (0x13<<8) |(1<<CFlag)\r
1718 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1719 .hword (0x15<<8) |(1<<CFlag)\r
1720 .hword (0x16<<8) |(1<<CFlag)\r
1721 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1722 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1723 .hword (0x19<<8) |(1<<CFlag)\r
1724 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1725 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1726 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1727 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1728 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1729 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1730 .hword (0x20<<8) |(1<<CFlag)\r
1731 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1732 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1733 .hword (0x23<<8) |(1<<CFlag)\r
1734 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1735 .hword (0x25<<8) |(1<<CFlag)\r
1736 .hword (0x26<<8) |(1<<CFlag)\r
1737 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1738 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1739 .hword (0x29<<8) |(1<<CFlag)\r
1740 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1741 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1742 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1743 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1744 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
1745 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1746 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
1747 .hword (0x31<<8) |(1<<CFlag)\r
1748 .hword (0x32<<8) |(1<<CFlag)\r
1749 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
1750 .hword (0x34<<8) |(1<<CFlag)\r
1751 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
1752 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
1753 .hword (0x37<<8) |(1<<CFlag)\r
1754 .hword (0x38<<8) |(1<<CFlag)\r
1755 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
1756 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
1757 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1758 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1759 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
1760 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1761 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
1762 .hword (0x40<<8) |(1<<CFlag)\r
1763 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
1764 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
1765 .hword (0x43<<8) |(1<<CFlag)\r
1766 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
1767 .hword (0x45<<8) |(1<<CFlag)\r
1768 .hword (0x46<<8) |(1<<CFlag)\r
1769 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
1770 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
1771 .hword (0x49<<8) |(1<<CFlag)\r
1772 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1773 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
1774 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
1775 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1776 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
1777 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1778 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
1779 .hword (0x51<<8) |(1<<CFlag)\r
1780 .hword (0x52<<8) |(1<<CFlag)\r
1781 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
1782 .hword (0x54<<8) |(1<<CFlag)\r
1783 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
1784 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
1785 .hword (0x57<<8) |(1<<CFlag)\r
1786 .hword (0x58<<8) |(1<<CFlag)\r
1787 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
1788 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1789 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
1790 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
1791 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1792 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
1793 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1794 .hword (0x60<<8) |(1<<VFlag) |(1<<CFlag)\r
1795 .hword (0x61<<8) |(1<<CFlag)\r
1796 .hword (0x62<<8) |(1<<CFlag)\r
1797 .hword (0x63<<8) |(1<<VFlag) |(1<<CFlag)\r
1798 .hword (0x64<<8) |(1<<CFlag)\r
1799 .hword (0x65<<8) |(1<<VFlag) |(1<<CFlag)\r
1800 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
1801 .hword (0x67<<8) |(1<<CFlag)\r
1802 .hword (0x68<<8) |(1<<CFlag)\r
1803 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
1804 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
1805 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1806 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1807 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
1808 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1809 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
1810 .hword (0x70<<8) |(1<<CFlag)\r
1811 .hword (0x71<<8) |(1<<VFlag) |(1<<CFlag)\r
1812 .hword (0x72<<8) |(1<<VFlag) |(1<<CFlag)\r
1813 .hword (0x73<<8) |(1<<CFlag)\r
1814 .hword (0x74<<8) |(1<<VFlag) |(1<<CFlag)\r
1815 .hword (0x75<<8) |(1<<CFlag)\r
1816 .hword (0x76<<8) |(1<<CFlag)\r
1817 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
1818 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
1819 .hword (0x79<<8) |(1<<CFlag)\r
1820 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1821 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1822 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1823 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1824 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1825 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1826 .hword (0x80<<8)|(1<<SFlag) |(1<<CFlag)\r
1827 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1828 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1829 .hword (0x83<<8)|(1<<SFlag) |(1<<CFlag)\r
1830 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1831 .hword (0x85<<8)|(1<<SFlag) |(1<<CFlag)\r
1832 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
1833 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1834 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1835 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
1836 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1837 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1838 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1839 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1840 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1841 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1842 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1843 .hword (0x91<<8)|(1<<SFlag) |(1<<CFlag)\r
1844 .hword (0x92<<8)|(1<<SFlag) |(1<<CFlag)\r
1845 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1846 .hword (0x94<<8)|(1<<SFlag) |(1<<CFlag)\r
1847 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1848 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1849 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
1850 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
1851 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1852 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1853 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1854 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1855 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1856 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1857 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1858 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1859 .hword (0xA1<<8)|(1<<SFlag) |(1<<CFlag)\r
1860 .hword (0xA2<<8)|(1<<SFlag) |(1<<CFlag)\r
1861 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1862 .hword (0xA4<<8)|(1<<SFlag) |(1<<CFlag)\r
1863 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1864 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1865 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
1866 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
1867 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1868 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1869 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1870 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1871 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1872 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1873 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1874 .hword (0xB0<<8)|(1<<SFlag) |(1<<CFlag)\r
1875 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1876 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1877 .hword (0xB3<<8)|(1<<SFlag) |(1<<CFlag)\r
1878 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1879 .hword (0xB5<<8)|(1<<SFlag) |(1<<CFlag)\r
1880 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
1881 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1882 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1883 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
1884 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1885 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1886 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1887 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1888 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1889 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1890 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1891 .hword (0xC1<<8)|(1<<SFlag) |(1<<CFlag)\r
1892 .hword (0xC2<<8)|(1<<SFlag) |(1<<CFlag)\r
1893 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1894 .hword (0xC4<<8)|(1<<SFlag) |(1<<CFlag)\r
1895 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1896 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1897 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
1898 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
1899 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1900 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1901 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1902 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1903 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1904 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1905 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1906 .hword (0xD0<<8)|(1<<SFlag) |(1<<CFlag)\r
1907 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1908 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1909 .hword (0xD3<<8)|(1<<SFlag) |(1<<CFlag)\r
1910 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1911 .hword (0xD5<<8)|(1<<SFlag) |(1<<CFlag)\r
1912 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
1913 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1914 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1915 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
1916 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1917 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1918 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1919 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1920 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1921 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1922 .hword (0xE0<<8)|(1<<SFlag) |(1<<CFlag)\r
1923 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1924 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1925 .hword (0xE3<<8)|(1<<SFlag) |(1<<CFlag)\r
1926 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1927 .hword (0xE5<<8)|(1<<SFlag) |(1<<CFlag)\r
1928 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
1929 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1930 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1931 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
1932 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1933 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1934 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1935 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1936 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1937 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1938 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1939 .hword (0xF1<<8)|(1<<SFlag) |(1<<CFlag)\r
1940 .hword (0xF2<<8)|(1<<SFlag) |(1<<CFlag)\r
1941 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1942 .hword (0xF4<<8)|(1<<SFlag) |(1<<CFlag)\r
1943 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1944 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1945 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
1946 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
1947 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1948 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1949 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1950 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1951 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1952 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1953 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1954 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1955 .hword (0x01<<8) |(1<<CFlag)\r
1956 .hword (0x02<<8) |(1<<CFlag)\r
1957 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1958 .hword (0x04<<8) |(1<<CFlag)\r
1959 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1960 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1961 .hword (0x07<<8) |(1<<CFlag)\r
1962 .hword (0x08<<8) |(1<<CFlag)\r
1963 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1964 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1965 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1966 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1967 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1968 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1969 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1970 .hword (0x10<<8) |(1<<CFlag)\r
1971 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1972 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1973 .hword (0x13<<8) |(1<<CFlag)\r
1974 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1975 .hword (0x15<<8) |(1<<CFlag)\r
1976 .hword (0x16<<8) |(1<<CFlag)\r
1977 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1978 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1979 .hword (0x19<<8) |(1<<CFlag)\r
1980 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1981 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1982 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1983 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1984 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1985 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1986 .hword (0x20<<8) |(1<<CFlag)\r
1987 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1988 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1989 .hword (0x23<<8) |(1<<CFlag)\r
1990 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1991 .hword (0x25<<8) |(1<<CFlag)\r
1992 .hword (0x26<<8) |(1<<CFlag)\r
1993 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1994 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1995 .hword (0x29<<8) |(1<<CFlag)\r
1996 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1997 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1998 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1999 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2000 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2001 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2002 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
2003 .hword (0x31<<8) |(1<<CFlag)\r
2004 .hword (0x32<<8) |(1<<CFlag)\r
2005 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
2006 .hword (0x34<<8) |(1<<CFlag)\r
2007 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
2008 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2009 .hword (0x37<<8) |(1<<CFlag)\r
2010 .hword (0x38<<8) |(1<<CFlag)\r
2011 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2012 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2013 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2014 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2015 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2016 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2017 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2018 .hword (0x40<<8) |(1<<CFlag)\r
2019 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
2020 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
2021 .hword (0x43<<8) |(1<<CFlag)\r
2022 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
2023 .hword (0x45<<8) |(1<<CFlag)\r
2024 .hword (0x46<<8) |(1<<CFlag)\r
2025 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2026 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2027 .hword (0x49<<8) |(1<<CFlag)\r
2028 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2029 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2030 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2031 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2032 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2033 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2034 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
2035 .hword (0x51<<8) |(1<<CFlag)\r
2036 .hword (0x52<<8) |(1<<CFlag)\r
2037 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
2038 .hword (0x54<<8) |(1<<CFlag)\r
2039 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
2040 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2041 .hword (0x57<<8) |(1<<CFlag)\r
2042 .hword (0x58<<8) |(1<<CFlag)\r
2043 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2044 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2045 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2046 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2047 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2048 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2049 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2050 .hword (0x06<<8) |(1<<VFlag)\r
2051 .hword (0x07<<8) \r
2052 .hword (0x08<<8) \r
2053 .hword (0x09<<8) |(1<<VFlag)\r
2054 .hword (0x0A<<8) |(1<<VFlag)\r
2055 .hword (0x0B<<8) \r
2056 .hword (0x0C<<8) |(1<<VFlag)\r
2057 .hword (0x0D<<8) \r
2058 .hword (0x0E<<8) \r
2059 .hword (0x0F<<8) |(1<<VFlag)\r
2060 .hword (0x10<<8) |(1<<HFlag) \r
2061 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
2062 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
2063 .hword (0x13<<8) |(1<<HFlag) \r
2064 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
2065 .hword (0x15<<8) |(1<<HFlag) \r
2066 .hword (0x16<<8) \r
2067 .hword (0x17<<8) |(1<<VFlag)\r
2068 .hword (0x18<<8) |(1<<VFlag)\r
2069 .hword (0x19<<8) \r
2070 .hword (0x1A<<8) \r
2071 .hword (0x1B<<8) |(1<<VFlag)\r
2072 .hword (0x1C<<8) \r
2073 .hword (0x1D<<8) |(1<<VFlag)\r
2074 .hword (0x1E<<8) |(1<<VFlag)\r
2075 .hword (0x1F<<8) \r
2076 .hword (0x20<<8) |(1<<HFlag) \r
2077 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
2078 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
2079 .hword (0x23<<8) |(1<<HFlag) \r
2080 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
2081 .hword (0x25<<8) |(1<<HFlag) \r
2082 .hword (0x26<<8) \r
2083 .hword (0x27<<8) |(1<<VFlag)\r
2084 .hword (0x28<<8) |(1<<VFlag)\r
2085 .hword (0x29<<8) \r
2086 .hword (0x2A<<8) \r
2087 .hword (0x2B<<8) |(1<<VFlag)\r
2088 .hword (0x2C<<8) \r
2089 .hword (0x2D<<8) |(1<<VFlag)\r
2090 .hword (0x2E<<8) |(1<<VFlag)\r
2091 .hword (0x2F<<8) \r
2092 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
2093 .hword (0x31<<8) |(1<<HFlag) \r
2094 .hword (0x32<<8) |(1<<HFlag) \r
2095 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
2096 .hword (0x34<<8) |(1<<HFlag) \r
2097 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
2098 .hword (0x36<<8) |(1<<VFlag)\r
2099 .hword (0x37<<8) \r
2100 .hword (0x38<<8) \r
2101 .hword (0x39<<8) |(1<<VFlag)\r
2102 .hword (0x3A<<8) |(1<<VFlag)\r
2103 .hword (0x3B<<8) \r
2104 .hword (0x3C<<8) |(1<<VFlag)\r
2105 .hword (0x3D<<8) \r
2106 .hword (0x3E<<8) \r
2107 .hword (0x3F<<8) |(1<<VFlag)\r
2108 .hword (0x40<<8) |(1<<HFlag) \r
2109 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
2110 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
2111 .hword (0x43<<8) |(1<<HFlag) \r
2112 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
2113 .hword (0x45<<8) |(1<<HFlag) \r
2114 .hword (0x46<<8) \r
2115 .hword (0x47<<8) |(1<<VFlag)\r
2116 .hword (0x48<<8) |(1<<VFlag)\r
2117 .hword (0x49<<8) \r
2118 .hword (0x4A<<8) \r
2119 .hword (0x4B<<8) |(1<<VFlag)\r
2120 .hword (0x4C<<8) \r
2121 .hword (0x4D<<8) |(1<<VFlag)\r
2122 .hword (0x4E<<8) |(1<<VFlag)\r
2123 .hword (0x4F<<8) \r
2124 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
2125 .hword (0x51<<8) |(1<<HFlag) \r
2126 .hword (0x52<<8) |(1<<HFlag) \r
2127 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
2128 .hword (0x54<<8) |(1<<HFlag) \r
2129 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
2130 .hword (0x56<<8) |(1<<VFlag)\r
2131 .hword (0x57<<8) \r
2132 .hword (0x58<<8) \r
2133 .hword (0x59<<8) |(1<<VFlag)\r
2134 .hword (0x5A<<8) |(1<<VFlag)\r
2135 .hword (0x5B<<8) \r
2136 .hword (0x5C<<8) |(1<<VFlag)\r
2137 .hword (0x5D<<8) \r
2138 .hword (0x5E<<8) \r
2139 .hword (0x5F<<8) |(1<<VFlag)\r
2140 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
2141 .hword (0x61<<8) |(1<<HFlag) \r
2142 .hword (0x62<<8) |(1<<HFlag) \r
2143 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
2144 .hword (0x64<<8) |(1<<HFlag) \r
2145 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
2146 .hword (0x66<<8) |(1<<VFlag)\r
2147 .hword (0x67<<8) \r
2148 .hword (0x68<<8) \r
2149 .hword (0x69<<8) |(1<<VFlag)\r
2150 .hword (0x6A<<8) |(1<<VFlag)\r
2151 .hword (0x6B<<8) \r
2152 .hword (0x6C<<8) |(1<<VFlag)\r
2153 .hword (0x6D<<8) \r
2154 .hword (0x6E<<8) \r
2155 .hword (0x6F<<8) |(1<<VFlag)\r
2156 .hword (0x70<<8) |(1<<HFlag) \r
2157 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
2158 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
2159 .hword (0x73<<8) |(1<<HFlag) \r
2160 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
2161 .hword (0x75<<8) |(1<<HFlag) \r
2162 .hword (0x76<<8) \r
2163 .hword (0x77<<8) |(1<<VFlag)\r
2164 .hword (0x78<<8) |(1<<VFlag)\r
2165 .hword (0x79<<8) \r
2166 .hword (0x7A<<8) \r
2167 .hword (0x7B<<8) |(1<<VFlag)\r
2168 .hword (0x7C<<8) \r
2169 .hword (0x7D<<8) |(1<<VFlag)\r
2170 .hword (0x7E<<8) |(1<<VFlag)\r
2171 .hword (0x7F<<8) \r
2172 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
2173 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2174 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2175 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
2176 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2177 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
2178 .hword (0x86<<8)|(1<<SFlag) \r
2179 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
2180 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
2181 .hword (0x89<<8)|(1<<SFlag) \r
2182 .hword (0x8A<<8)|(1<<SFlag) \r
2183 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag)\r
2184 .hword (0x8C<<8)|(1<<SFlag) \r
2185 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag)\r
2186 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag)\r
2187 .hword (0x8F<<8)|(1<<SFlag) \r
2188 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2189 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
2190 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
2191 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2192 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
2193 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2194 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
2195 .hword (0x97<<8)|(1<<SFlag) \r
2196 .hword (0x98<<8)|(1<<SFlag) \r
2197 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
2198 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag)\r
2199 .hword (0x9B<<8)|(1<<SFlag) \r
2200 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag)\r
2201 .hword (0x9D<<8)|(1<<SFlag) \r
2202 .hword (0x9E<<8)|(1<<SFlag) \r
2203 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag)\r
2204 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2205 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2206 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2207 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2208 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2209 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2210 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2211 .hword (0x07<<8) |(1<<CFlag)\r
2212 .hword (0x08<<8) |(1<<CFlag)\r
2213 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2214 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2215 .hword (0x0B<<8) |(1<<CFlag)\r
2216 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2217 .hword (0x0D<<8) |(1<<CFlag)\r
2218 .hword (0x0E<<8) |(1<<CFlag)\r
2219 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2220 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2221 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2222 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2223 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2224 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2225 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2226 .hword (0x16<<8) |(1<<CFlag)\r
2227 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2228 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2229 .hword (0x19<<8) |(1<<CFlag)\r
2230 .hword (0x1A<<8) |(1<<CFlag)\r
2231 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2232 .hword (0x1C<<8) |(1<<CFlag)\r
2233 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2234 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2235 .hword (0x1F<<8) |(1<<CFlag)\r
2236 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2237 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2238 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2239 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2240 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2241 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2242 .hword (0x26<<8) |(1<<CFlag)\r
2243 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2244 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2245 .hword (0x29<<8) |(1<<CFlag)\r
2246 .hword (0x2A<<8) |(1<<CFlag)\r
2247 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2248 .hword (0x2C<<8) |(1<<CFlag)\r
2249 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2250 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2251 .hword (0x2F<<8) |(1<<CFlag)\r
2252 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2253 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2254 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2255 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2256 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2257 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2258 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2259 .hword (0x37<<8) |(1<<CFlag)\r
2260 .hword (0x38<<8) |(1<<CFlag)\r
2261 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2262 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2263 .hword (0x3B<<8) |(1<<CFlag)\r
2264 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2265 .hword (0x3D<<8) |(1<<CFlag)\r
2266 .hword (0x3E<<8) |(1<<CFlag)\r
2267 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2268 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2269 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2270 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2271 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2272 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2273 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2274 .hword (0x46<<8) |(1<<CFlag)\r
2275 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2276 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2277 .hword (0x49<<8) |(1<<CFlag)\r
2278 .hword (0x4A<<8) |(1<<CFlag)\r
2279 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2280 .hword (0x4C<<8) |(1<<CFlag)\r
2281 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2282 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2283 .hword (0x4F<<8) |(1<<CFlag)\r
2284 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2285 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2286 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2287 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2288 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2289 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2290 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2291 .hword (0x57<<8) |(1<<CFlag)\r
2292 .hword (0x58<<8) |(1<<CFlag)\r
2293 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2294 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2295 .hword (0x5B<<8) |(1<<CFlag)\r
2296 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2297 .hword (0x5D<<8) |(1<<CFlag)\r
2298 .hword (0x5E<<8) |(1<<CFlag)\r
2299 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2300 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2301 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2302 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2303 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2304 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2305 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2306 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
2307 .hword (0x67<<8) |(1<<CFlag)\r
2308 .hword (0x68<<8) |(1<<CFlag)\r
2309 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
2310 .hword (0x6A<<8) |(1<<VFlag) |(1<<CFlag)\r
2311 .hword (0x6B<<8) |(1<<CFlag)\r
2312 .hword (0x6C<<8) |(1<<VFlag) |(1<<CFlag)\r
2313 .hword (0x6D<<8) |(1<<CFlag)\r
2314 .hword (0x6E<<8) |(1<<CFlag)\r
2315 .hword (0x6F<<8) |(1<<VFlag) |(1<<CFlag)\r
2316 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
2317 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2318 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2319 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
2320 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2321 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
2322 .hword (0x76<<8) |(1<<CFlag)\r
2323 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
2324 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
2325 .hword (0x79<<8) |(1<<CFlag)\r
2326 .hword (0x7A<<8) |(1<<CFlag)\r
2327 .hword (0x7B<<8) |(1<<VFlag) |(1<<CFlag)\r
2328 .hword (0x7C<<8) |(1<<CFlag)\r
2329 .hword (0x7D<<8) |(1<<VFlag) |(1<<CFlag)\r
2330 .hword (0x7E<<8) |(1<<VFlag) |(1<<CFlag)\r
2331 .hword (0x7F<<8) |(1<<CFlag)\r
2332 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2333 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2334 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2335 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2336 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2337 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2338 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
2339 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2340 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2341 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
2342 .hword (0x8A<<8)|(1<<SFlag) |(1<<CFlag)\r
2343 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2344 .hword (0x8C<<8)|(1<<SFlag) |(1<<CFlag)\r
2345 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2346 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2347 .hword (0x8F<<8)|(1<<SFlag) |(1<<CFlag)\r
2348 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2349 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2350 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2351 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2352 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2353 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2354 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2355 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
2356 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
2357 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2358 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2359 .hword (0x9B<<8)|(1<<SFlag) |(1<<CFlag)\r
2360 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2361 .hword (0x9D<<8)|(1<<SFlag) |(1<<CFlag)\r
2362 .hword (0x9E<<8)|(1<<SFlag) |(1<<CFlag)\r
2363 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2364 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2365 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2366 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2367 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2368 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2369 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2370 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2371 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
2372 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
2373 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2374 .hword (0xAA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2375 .hword (0xAB<<8)|(1<<SFlag) |(1<<CFlag)\r
2376 .hword (0xAC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2377 .hword (0xAD<<8)|(1<<SFlag) |(1<<CFlag)\r
2378 .hword (0xAE<<8)|(1<<SFlag) |(1<<CFlag)\r
2379 .hword (0xAF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2380 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2381 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2382 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2383 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2384 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2385 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2386 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
2387 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2388 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2389 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
2390 .hword (0xBA<<8)|(1<<SFlag) |(1<<CFlag)\r
2391 .hword (0xBB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2392 .hword (0xBC<<8)|(1<<SFlag) |(1<<CFlag)\r
2393 .hword (0xBD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2394 .hword (0xBE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2395 .hword (0xBF<<8)|(1<<SFlag) |(1<<CFlag)\r
2396 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2397 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2398 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2399 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2400 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2401 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2402 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2403 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
2404 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
2405 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2406 .hword (0xCA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2407 .hword (0xCB<<8)|(1<<SFlag) |(1<<CFlag)\r
2408 .hword (0xCC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2409 .hword (0xCD<<8)|(1<<SFlag) |(1<<CFlag)\r
2410 .hword (0xCE<<8)|(1<<SFlag) |(1<<CFlag)\r
2411 .hword (0xCF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2412 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2413 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2414 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2415 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2416 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2417 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2418 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
2419 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2420 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2421 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
2422 .hword (0xDA<<8)|(1<<SFlag) |(1<<CFlag)\r
2423 .hword (0xDB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2424 .hword (0xDC<<8)|(1<<SFlag) |(1<<CFlag)\r
2425 .hword (0xDD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2426 .hword (0xDE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2427 .hword (0xDF<<8)|(1<<SFlag) |(1<<CFlag)\r
2428 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2429 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2430 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2431 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2432 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2433 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2434 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
2435 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2436 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2437 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
2438 .hword (0xEA<<8)|(1<<SFlag) |(1<<CFlag)\r
2439 .hword (0xEB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2440 .hword (0xEC<<8)|(1<<SFlag) |(1<<CFlag)\r
2441 .hword (0xED<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2442 .hword (0xEE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2443 .hword (0xEF<<8)|(1<<SFlag) |(1<<CFlag)\r
2444 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2445 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2446 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2447 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2448 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2449 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2450 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2451 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
2452 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
2453 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2454 .hword (0xFA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2455 .hword (0xFB<<8)|(1<<SFlag) |(1<<CFlag)\r
2456 .hword (0xFC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2457 .hword (0xFD<<8)|(1<<SFlag) |(1<<CFlag)\r
2458 .hword (0xFE<<8)|(1<<SFlag) |(1<<CFlag)\r
2459 .hword (0xFF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2460 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2461 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2462 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2463 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2464 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2465 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2466 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2467 .hword (0x07<<8) |(1<<CFlag)\r
2468 .hword (0x08<<8) |(1<<CFlag)\r
2469 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2470 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2471 .hword (0x0B<<8) |(1<<CFlag)\r
2472 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2473 .hword (0x0D<<8) |(1<<CFlag)\r
2474 .hword (0x0E<<8) |(1<<CFlag)\r
2475 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2476 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2477 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2478 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2479 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2480 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2481 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2482 .hword (0x16<<8) |(1<<CFlag)\r
2483 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2484 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2485 .hword (0x19<<8) |(1<<CFlag)\r
2486 .hword (0x1A<<8) |(1<<CFlag)\r
2487 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2488 .hword (0x1C<<8) |(1<<CFlag)\r
2489 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2490 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2491 .hword (0x1F<<8) |(1<<CFlag)\r
2492 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2493 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2494 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2495 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2496 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2497 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2498 .hword (0x26<<8) |(1<<CFlag)\r
2499 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2500 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2501 .hword (0x29<<8) |(1<<CFlag)\r
2502 .hword (0x2A<<8) |(1<<CFlag)\r
2503 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2504 .hword (0x2C<<8) |(1<<CFlag)\r
2505 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2506 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2507 .hword (0x2F<<8) |(1<<CFlag)\r
2508 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2509 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2510 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2511 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2512 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2513 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2514 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2515 .hword (0x37<<8) |(1<<CFlag)\r
2516 .hword (0x38<<8) |(1<<CFlag)\r
2517 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2518 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2519 .hword (0x3B<<8) |(1<<CFlag)\r
2520 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2521 .hword (0x3D<<8) |(1<<CFlag)\r
2522 .hword (0x3E<<8) |(1<<CFlag)\r
2523 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2524 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2525 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2526 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2527 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2528 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2529 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2530 .hword (0x46<<8) |(1<<CFlag)\r
2531 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2532 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2533 .hword (0x49<<8) |(1<<CFlag)\r
2534 .hword (0x4A<<8) |(1<<CFlag)\r
2535 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2536 .hword (0x4C<<8) |(1<<CFlag)\r
2537 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2538 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2539 .hword (0x4F<<8) |(1<<CFlag)\r
2540 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2541 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2542 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2543 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2544 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2545 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2546 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2547 .hword (0x57<<8) |(1<<CFlag)\r
2548 .hword (0x58<<8) |(1<<CFlag)\r
2549 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2550 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2551 .hword (0x5B<<8) |(1<<CFlag)\r
2552 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2553 .hword (0x5D<<8) |(1<<CFlag)\r
2554 .hword (0x5E<<8) |(1<<CFlag)\r
2555 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2556 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2557 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2558 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2559 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2560 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2561 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2562 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
2563 .hword (0x01<<8) |(1<<NFlag) \r
2564 .hword (0x02<<8) |(1<<NFlag) \r
2565 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
2566 .hword (0x04<<8) |(1<<NFlag) \r
2567 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2568 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2569 .hword (0x07<<8) |(1<<NFlag) \r
2570 .hword (0x08<<8) |(1<<NFlag) \r
2571 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2572 .hword (0x04<<8) |(1<<NFlag) \r
2573 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2574 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2575 .hword (0x07<<8) |(1<<NFlag) \r
2576 .hword (0x08<<8) |(1<<NFlag) \r
2577 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2578 .hword (0x10<<8) |(1<<NFlag) \r
2579 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
2580 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
2581 .hword (0x13<<8) |(1<<NFlag) \r
2582 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2583 .hword (0x15<<8) |(1<<NFlag) \r
2584 .hword (0x16<<8) |(1<<NFlag) \r
2585 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2586 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2587 .hword (0x19<<8) |(1<<NFlag) \r
2588 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2589 .hword (0x15<<8) |(1<<NFlag) \r
2590 .hword (0x16<<8) |(1<<NFlag) \r
2591 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2592 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2593 .hword (0x19<<8) |(1<<NFlag) \r
2594 .hword (0x20<<8) |(1<<NFlag) \r
2595 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
2596 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
2597 .hword (0x23<<8) |(1<<NFlag) \r
2598 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2599 .hword (0x25<<8) |(1<<NFlag) \r
2600 .hword (0x26<<8) |(1<<NFlag) \r
2601 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2602 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2603 .hword (0x29<<8) |(1<<NFlag) \r
2604 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2605 .hword (0x25<<8) |(1<<NFlag) \r
2606 .hword (0x26<<8) |(1<<NFlag) \r
2607 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2608 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2609 .hword (0x29<<8) |(1<<NFlag) \r
2610 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
2611 .hword (0x31<<8) |(1<<NFlag) \r
2612 .hword (0x32<<8) |(1<<NFlag) \r
2613 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
2614 .hword (0x34<<8) |(1<<NFlag) \r
2615 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2616 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2617 .hword (0x37<<8) |(1<<NFlag) \r
2618 .hword (0x38<<8) |(1<<NFlag) \r
2619 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2620 .hword (0x34<<8) |(1<<NFlag) \r
2621 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2622 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2623 .hword (0x37<<8) |(1<<NFlag) \r
2624 .hword (0x38<<8) |(1<<NFlag) \r
2625 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2626 .hword (0x40<<8) |(1<<NFlag) \r
2627 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
2628 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
2629 .hword (0x43<<8) |(1<<NFlag) \r
2630 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2631 .hword (0x45<<8) |(1<<NFlag) \r
2632 .hword (0x46<<8) |(1<<NFlag) \r
2633 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2634 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2635 .hword (0x49<<8) |(1<<NFlag) \r
2636 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2637 .hword (0x45<<8) |(1<<NFlag) \r
2638 .hword (0x46<<8) |(1<<NFlag) \r
2639 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2640 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2641 .hword (0x49<<8) |(1<<NFlag) \r
2642 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
2643 .hword (0x51<<8) |(1<<NFlag) \r
2644 .hword (0x52<<8) |(1<<NFlag) \r
2645 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
2646 .hword (0x54<<8) |(1<<NFlag) \r
2647 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2648 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2649 .hword (0x57<<8) |(1<<NFlag) \r
2650 .hword (0x58<<8) |(1<<NFlag) \r
2651 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2652 .hword (0x54<<8) |(1<<NFlag) \r
2653 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2654 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2655 .hword (0x57<<8) |(1<<NFlag) \r
2656 .hword (0x58<<8) |(1<<NFlag) \r
2657 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2658 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
2659 .hword (0x61<<8) |(1<<NFlag) \r
2660 .hword (0x62<<8) |(1<<NFlag) \r
2661 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
2662 .hword (0x64<<8) |(1<<NFlag) \r
2663 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2664 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2665 .hword (0x67<<8) |(1<<NFlag) \r
2666 .hword (0x68<<8) |(1<<NFlag) \r
2667 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2668 .hword (0x64<<8) |(1<<NFlag) \r
2669 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2670 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2671 .hword (0x67<<8) |(1<<NFlag) \r
2672 .hword (0x68<<8) |(1<<NFlag) \r
2673 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2674 .hword (0x70<<8) |(1<<NFlag) \r
2675 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
2676 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
2677 .hword (0x73<<8) |(1<<NFlag) \r
2678 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2679 .hword (0x75<<8) |(1<<NFlag) \r
2680 .hword (0x76<<8) |(1<<NFlag) \r
2681 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2682 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2683 .hword (0x79<<8) |(1<<NFlag) \r
2684 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2685 .hword (0x75<<8) |(1<<NFlag) \r
2686 .hword (0x76<<8) |(1<<NFlag) \r
2687 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2688 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2689 .hword (0x79<<8) |(1<<NFlag) \r
2690 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
2691 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2692 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2693 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
2694 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2695 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2696 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2697 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2698 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2699 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2700 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2701 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2702 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2703 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2704 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2705 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2706 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2707 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
2708 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
2709 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2710 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag) \r
2711 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2712 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2713 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag) \r
2714 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag) \r
2715 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2716 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2717 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2718 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2719 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2720 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2721 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2722 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2723 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2724 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2725 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2726 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2727 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2728 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2729 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2730 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2731 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2732 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2733 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2734 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2735 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2736 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2737 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2738 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2739 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2740 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2741 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2742 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2743 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2744 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2745 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2746 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2747 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2748 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2749 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2750 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2751 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2752 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2753 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2754 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2755 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
2756 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
2757 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2758 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2759 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2760 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2761 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2762 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2763 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2764 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2765 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2766 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2767 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2768 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2769 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2770 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
2771 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2772 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2773 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
2774 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2775 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2776 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2777 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2778 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2779 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2780 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2781 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2782 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2783 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2784 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2785 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2786 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2787 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2788 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2789 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2790 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2791 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2792 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2793 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2794 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2795 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2796 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2797 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2798 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2799 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2800 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2801 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2802 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2803 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2804 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2805 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2806 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2807 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2808 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2809 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2810 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2811 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2812 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2813 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2814 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2815 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2816 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2817 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2818 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2819 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2820 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2821 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2822 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2823 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2824 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2825 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2826 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2827 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2828 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2829 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2830 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2831 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2832 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2833 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2834 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2835 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2836 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2837 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2838 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2839 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2840 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2841 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2842 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2843 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2844 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2845 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2846 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2847 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2848 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2849 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2850 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2851 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2852 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2853 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2854 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2855 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2856 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2857 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2858 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2859 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2860 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2861 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2862 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2863 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2864 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2865 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2866 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2867 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2868 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2869 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2870 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2871 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2872 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2873 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2874 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2875 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2876 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2877 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2878 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2879 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2880 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2881 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2882 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2883 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2884 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2885 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2886 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2887 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2888 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2889 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2890 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2891 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2892 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2893 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2894 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2895 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2896 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2897 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2898 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2899 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2900 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2901 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2902 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2903 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2904 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2905 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2906 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2907 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2908 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2909 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2910 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2911 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2912 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2913 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2914 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2915 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
2916 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
2917 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2918 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2919 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2920 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2921 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2922 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2923 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2924 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2925 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2926 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2927 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2928 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2929 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2930 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
2931 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2932 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2933 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
2934 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2935 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2936 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2937 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2938 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2939 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2940 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2941 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2942 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2943 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2944 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2945 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2946 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
2947 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2948 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2949 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
2950 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2951 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2952 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2953 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2954 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2955 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2956 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2957 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2958 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2959 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2960 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2961 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2962 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2963 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
2964 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
2965 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2966 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2967 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2968 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2969 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2970 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2971 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2972 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2973 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2974 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2975 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2976 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2977 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2978 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2979 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2980 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2981 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2982 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2983 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2984 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2985 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2986 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2987 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2988 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2989 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2990 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2991 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2992 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2993 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2994 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2995 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2996 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2997 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2998 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2999 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3000 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3001 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3002 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3003 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3004 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3005 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3006 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3007 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3008 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3009 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3010 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3011 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3012 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3013 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3014 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3015 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3016 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3017 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3018 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3019 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3020 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3021 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3022 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3023 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3024 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3025 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3026 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3027 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3028 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3029 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3030 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3031 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3032 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3033 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3034 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3035 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3036 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3037 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3038 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3039 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3040 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3041 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3042 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3043 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3044 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3045 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3046 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3047 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3048 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3049 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3050 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3051 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3052 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3053 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3054 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3055 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3056 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3057 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3058 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3059 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3060 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3061 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3062 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3063 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3064 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3065 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3066 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3067 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3068 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3069 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3070 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3071 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3072 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3073 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3074 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3075 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3076 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3077 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3078 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3079 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3080 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
3081 .hword (0x01<<8) |(1<<NFlag) \r
3082 .hword (0x02<<8) |(1<<NFlag) \r
3083 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
3084 .hword (0x04<<8) |(1<<NFlag) \r
3085 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
3086 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
3087 .hword (0x07<<8) |(1<<NFlag) \r
3088 .hword (0x08<<8) |(1<<NFlag) \r
3089 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
3090 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3091 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag) \r
3092 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3093 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag) \r
3094 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag) \r
3095 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3096 .hword (0x10<<8) |(1<<NFlag) \r
3097 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
3098 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
3099 .hword (0x13<<8) |(1<<NFlag) \r
3100 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
3101 .hword (0x15<<8) |(1<<NFlag) \r
3102 .hword (0x16<<8) |(1<<NFlag) \r
3103 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
3104 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
3105 .hword (0x19<<8) |(1<<NFlag) \r
3106 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag) \r
3107 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3108 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag) \r
3109 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3110 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3111 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag) \r
3112 .hword (0x20<<8) |(1<<NFlag) \r
3113 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
3114 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
3115 .hword (0x23<<8) |(1<<NFlag) \r
3116 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
3117 .hword (0x25<<8) |(1<<NFlag) \r
3118 .hword (0x26<<8) |(1<<NFlag) \r
3119 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
3120 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
3121 .hword (0x29<<8) |(1<<NFlag) \r
3122 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag) \r
3123 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3124 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag) \r
3125 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3126 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3127 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag) \r
3128 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
3129 .hword (0x31<<8) |(1<<NFlag) \r
3130 .hword (0x32<<8) |(1<<NFlag) \r
3131 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
3132 .hword (0x34<<8) |(1<<NFlag) \r
3133 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
3134 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
3135 .hword (0x37<<8) |(1<<NFlag) \r
3136 .hword (0x38<<8) |(1<<NFlag) \r
3137 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
3138 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3139 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag) \r
3140 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3141 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag) \r
3142 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag) \r
3143 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3144 .hword (0x40<<8) |(1<<NFlag) \r
3145 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
3146 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
3147 .hword (0x43<<8) |(1<<NFlag) \r
3148 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
3149 .hword (0x45<<8) |(1<<NFlag) \r
3150 .hword (0x46<<8) |(1<<NFlag) \r
3151 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
3152 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
3153 .hword (0x49<<8) |(1<<NFlag) \r
3154 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag) \r
3155 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3156 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag) \r
3157 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3158 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3159 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag) \r
3160 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
3161 .hword (0x51<<8) |(1<<NFlag) \r
3162 .hword (0x52<<8) |(1<<NFlag) \r
3163 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
3164 .hword (0x54<<8) |(1<<NFlag) \r
3165 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
3166 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
3167 .hword (0x57<<8) |(1<<NFlag) \r
3168 .hword (0x58<<8) |(1<<NFlag) \r
3169 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
3170 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3171 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag) \r
3172 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3173 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag) \r
3174 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag) \r
3175 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3176 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
3177 .hword (0x61<<8) |(1<<NFlag) \r
3178 .hword (0x62<<8) |(1<<NFlag) \r
3179 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
3180 .hword (0x64<<8) |(1<<NFlag) \r
3181 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
3182 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
3183 .hword (0x67<<8) |(1<<NFlag) \r
3184 .hword (0x68<<8) |(1<<NFlag) \r
3185 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
3186 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3187 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag) \r
3188 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3189 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag) \r
3190 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag) \r
3191 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3192 .hword (0x70<<8) |(1<<NFlag) \r
3193 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
3194 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
3195 .hword (0x73<<8) |(1<<NFlag) \r
3196 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
3197 .hword (0x75<<8) |(1<<NFlag) \r
3198 .hword (0x76<<8) |(1<<NFlag) \r
3199 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
3200 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
3201 .hword (0x79<<8) |(1<<NFlag) \r
3202 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag) \r
3203 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3204 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag) \r
3205 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3206 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3207 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag) \r
3208 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
3209 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3210 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3211 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
3212 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3213 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
3214 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
3215 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3216 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3217 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
3218 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3219 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3220 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3221 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3222 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3223 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3224 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3225 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
3226 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
3227 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3228 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3229 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3230 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3231 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3232 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3233 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3234 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3235 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3236 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3237 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3238 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3239 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3240 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3241 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3242 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3243 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3244 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3245 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3246 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3247 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3248 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3249 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3250 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3251 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3252 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3253 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3254 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3255 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3256 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3257 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3258 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3259 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3260 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3261 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3262 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3263 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3264 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3265 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3266 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3267 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3268 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3269 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3270 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3271 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3272 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3273 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3274 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3275 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3276 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3277 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3278 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3279 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3280 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3281 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3282 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3283 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3284 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3285 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3286 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3287 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3288 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3289 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3290 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3291 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3292 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3293 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3294 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3295 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3296 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3297 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3298 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3299 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3300 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3301 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3302 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3303 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3304 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3305 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3306 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3307 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3308 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3309 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3310 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3311 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3312 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3313 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3314 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3315 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3316 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3317 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3318 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3319 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3320 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3321 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3322 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3323 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3324 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3325 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3326 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3327 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3328 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3329 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3330 .hword (0x9A<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3331 .hword (0x9B<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3332 .hword (0x9C<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3333 .hword (0x9D<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3334 .hword (0x9E<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3335 .hword (0x9F<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3336 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3337 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3338 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3339 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3340 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3341 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3342 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3343 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3344 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3345 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3346 .hword (0xAA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3347 .hword (0xAB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3348 .hword (0xAC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3349 .hword (0xAD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3350 .hword (0xAE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3351 .hword (0xAF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3352 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3353 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3354 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3355 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3356 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3357 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3358 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3359 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3360 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3361 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3362 .hword (0xBA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3363 .hword (0xBB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3364 .hword (0xBC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3365 .hword (0xBD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3366 .hword (0xBE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3367 .hword (0xBF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3368 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3369 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3370 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3371 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3372 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3373 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3374 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3375 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3376 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3377 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3378 .hword (0xCA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3379 .hword (0xCB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3380 .hword (0xCC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3381 .hword (0xCD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3382 .hword (0xCE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3383 .hword (0xCF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3384 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3385 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3386 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3387 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3388 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3389 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3390 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3391 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3392 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3393 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3394 .hword (0xDA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3395 .hword (0xDB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3396 .hword (0xDC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3397 .hword (0xDD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3398 .hword (0xDE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3399 .hword (0xDF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3400 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3401 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3402 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3403 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3404 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3405 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3406 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3407 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3408 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3409 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3410 .hword (0xEA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3411 .hword (0xEB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3412 .hword (0xEC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3413 .hword (0xED<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3414 .hword (0xEE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3415 .hword (0xEF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3416 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3417 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3418 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3419 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3420 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3421 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3422 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3423 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3424 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3425 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3426 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3427 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3428 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3429 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3430 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3431 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3432 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3433 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
3434 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
3435 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3436 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
3437 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3438 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3439 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
3440 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
3441 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3442 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3443 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3444 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3445 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3446 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3447 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3448 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
3449 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3450 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3451 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
3452 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3453 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
3454 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
3455 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3456 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3457 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
3458 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3459 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3460 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3461 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3462 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3463 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3464 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
3465 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3466 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3467 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
3468 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3469 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
3470 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
3471 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3472 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3473 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
3474 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3475 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3476 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3477 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3478 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3479 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3480 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3481 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
3482 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
3483 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3484 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3485 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3486 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3487 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3488 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3489 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3490 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3491 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3492 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3493 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3494 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3495 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3496 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3497 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3498 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3499 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3500 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3501 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3502 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3503 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3504 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3505 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3506 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3507 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3508 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3509 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3510 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3511 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3512 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3513 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3514 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3515 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3516 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3517 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3518 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3519 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3520 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3521 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3522 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3523 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3524 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3525 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3526 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3527 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3528 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3529 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3530 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3531 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3532 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3533 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3534 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3535 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3536 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3537 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3538 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3539 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3540 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3541 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3542 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3543 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3544 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3545 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3546 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3547 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3548 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3549 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3550 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3551 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3552 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3553 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3554 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3555 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3556 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3557 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3558 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3559 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3560 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3561 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3562 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3563 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3564 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3565 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3566 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3567 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3568 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3569 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3570 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3571 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3572 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3573 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3574 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3575 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3576 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3577 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3578 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3579 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3580 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3581 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3582 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3583 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3584 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3585 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3586 \r
3587.align 4\r
3588\r
3589AF_Z80: .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 0\r
3590 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 1\r
3591 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 2\r
3592 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 3\r
3593 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 4\r
3594 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 5\r
3595 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 6\r
3596 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 7\r
3597 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 8\r
3598 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 9\r
3599 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 10\r
3600 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 11\r
3601 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 12\r
3602 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 13\r
3603 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 14\r
3604 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 15\r
3605 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 16\r
3606 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 17\r
3607 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 18\r
3608 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 19\r
3609 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 20\r
3610 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 21\r
3611 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 22\r
3612 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 23\r
3613 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 24\r
3614 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 25\r
3615 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 26\r
3616 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 27\r
3617 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 28\r
3618 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 29\r
3619 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 30\r
3620 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 31\r
3621 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 32\r
3622 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 33\r
3623 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 34\r
3624 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 35\r
3625 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 36\r
3626 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 37\r
3627 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 38\r
3628 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 39\r
3629 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 40\r
3630 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 41\r
3631 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 42\r
3632 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 43\r
3633 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 44\r
3634 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 45\r
3635 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 46\r
3636 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 47\r
3637 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 48\r
3638 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 49\r
3639 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 50\r
3640 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 51\r
3641 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 52\r
3642 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 53\r
3643 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 54\r
3644 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 55\r
3645 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 56\r
3646 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 57\r
3647 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 58\r
3648 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 59\r
3649 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 60\r
3650 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 61\r
3651 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 62\r
3652 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 63\r
3653 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 64\r
3654 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 65\r
3655 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 66\r
3656 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 67\r
3657 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 68\r
3658 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 69\r
3659 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 70\r
3660 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 71\r
3661 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 72\r
3662 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 73\r
3663 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 74\r
3664 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 75\r
3665 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 76\r
3666 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 77\r
3667 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 78\r
3668 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 79\r
3669 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 80\r
3670 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 81\r
3671 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 82\r
3672 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 83\r
3673 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 84\r
3674 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 85\r
3675 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 86\r
3676 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 87\r
3677 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 88\r
3678 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 89\r
3679 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 90\r
3680 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 91\r
3681 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 92\r
3682 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 93\r
3683 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 94\r
3684 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 95\r
3685 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 96\r
3686 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 97\r
3687 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 98\r
3688 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 99\r
3689 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 100\r
3690 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 101\r
3691 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 102\r
3692 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 103\r
3693 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 104\r
3694 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 105\r
3695 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 106\r
3696 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 107\r
3697 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 108\r
3698 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 109\r
3699 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 110\r
3700 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 111\r
3701 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 112\r
3702 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 113\r
3703 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 114\r
3704 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 115\r
3705 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 116\r
3706 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 117\r
3707 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 118\r
3708 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 119\r
3709 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 120\r
3710 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 121\r
3711 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 122\r
3712 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 123\r
3713 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 124\r
3714 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 125\r
3715 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 126\r
3716 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 127\r
3717 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 128\r
3718 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 129\r
3719 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 130\r
3720 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 131\r
3721 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 132\r
3722 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 133\r
3723 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 134\r
3724 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 135\r
3725 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 136\r
3726 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 137\r
3727 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 138\r
3728 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 139\r
3729 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 140\r
3730 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 141\r
3731 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 142\r
3732 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 143\r
3733 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 144\r
3734 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 145\r
3735 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 146\r
3736 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 147\r
3737 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 148\r
3738 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 149\r
3739 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 150\r
3740 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 151\r
3741 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 152\r
3742 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 153\r
3743 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 154\r
3744 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 155\r
3745 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 156\r
3746 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 157\r
3747 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 158\r
3748 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 159\r
3749 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 160\r
3750 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 161\r
3751 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 162\r
3752 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 163\r
3753 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 164\r
3754 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 165\r
3755 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 166\r
3756 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 167\r
3757 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 168\r
3758 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 169\r
3759 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 170\r
3760 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 171\r
3761 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 172\r
3762 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 173\r
3763 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 174\r
3764 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 175\r
3765 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 176\r
3766 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 177\r
3767 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 178\r
3768 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 179\r
3769 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 180\r
3770 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 181\r
3771 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 182\r
3772 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 183\r
3773 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 184\r
3774 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 185\r
3775 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 186\r
3776 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 187\r
3777 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 188\r
3778 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 189\r
3779 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 190\r
3780 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 191\r
3781 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 192\r
3782 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 193\r
3783 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 194\r
3784 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 195\r
3785 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 196\r
3786 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 197\r
3787 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 198\r
3788 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 199\r
3789 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 200\r
3790 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 201\r
3791 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 202\r
3792 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 203\r
3793 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 204\r
3794 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 205\r
3795 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 206\r
3796 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 207\r
3797 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 208\r
3798 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 209\r
3799 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 210\r
3800 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 211\r
3801 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 212\r
3802 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 213\r
3803 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 214\r
3804 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 215\r
3805 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 216\r
3806 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 217\r
3807 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 218\r
3808 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 219\r
3809 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 220\r
3810 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 221\r
3811 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 222\r
3812 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 223\r
3813 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 224\r
3814 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 225\r
3815 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 226\r
3816 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 227\r
3817 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 228\r
3818 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 229\r
3819 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 230\r
3820 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 231\r
3821 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 232\r
3822 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 233\r
3823 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 234\r
3824 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 235\r
3825 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 236\r
3826 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 237\r
3827 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 238\r
3828 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 239\r
3829 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 240\r
3830 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 241\r
3831 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 242\r
3832 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 243\r
3833 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 244\r
3834 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 245\r
3835 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 246\r
3836 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 247\r
3837 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 248\r
3838 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 249\r
3839 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 250\r
3840 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 251\r
3841 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 252\r
3842 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 253\r
3843 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 254\r
3844 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 255\r
3845\r
3846.align 4\r
3847\r
3848AF_ARM: .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 0\r
3849 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 1\r
3850 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 2\r
3851 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 3\r
3852 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 4\r
3853 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 5\r
3854 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 6\r
3855 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 7\r
3856 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 8\r
3857 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 9\r
3858 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 10\r
3859 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 11\r
3860 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 12\r
3861 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 13\r
3862 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 14\r
3863 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 15\r
3864 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 16\r
3865 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 17\r
3866 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 18\r
3867 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 19\r
3868 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 20\r
3869 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 21\r
3870 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 22\r
3871 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 23\r
3872 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 24\r
3873 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 25\r
3874 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 26\r
3875 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 27\r
3876 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 28\r
3877 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 29\r
3878 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 30\r
3879 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 31\r
3880 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 32\r
3881 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 33\r
3882 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 34\r
3883 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 35\r
3884 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 36\r
3885 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 37\r
3886 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 38\r
3887 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 39\r
3888 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 40\r
3889 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 41\r
3890 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 42\r
3891 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 43\r
3892 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 44\r
3893 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 45\r
3894 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 46\r
3895 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 47\r
3896 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 48\r
3897 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 49\r
3898 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 50\r
3899 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 51\r
3900 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 52\r
3901 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 53\r
3902 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 54\r
3903 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 55\r
3904 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 56\r
3905 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 57\r
3906 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 58\r
3907 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 59\r
3908 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 60\r
3909 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 61\r
3910 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 62\r
3911 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 63\r
3912 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 64\r
3913 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 65\r
3914 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 66\r
3915 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 67\r
3916 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 68\r
3917 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 69\r
3918 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 70\r
3919 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 71\r
3920 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 72\r
3921 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 73\r
3922 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 74\r
3923 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 75\r
3924 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 76\r
3925 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 77\r
3926 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 78\r
3927 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 79\r
3928 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 80\r
3929 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 81\r
3930 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 82\r
3931 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 83\r
3932 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 84\r
3933 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 85\r
3934 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 86\r
3935 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 87\r
3936 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 88\r
3937 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 89\r
3938 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 90\r
3939 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 91\r
3940 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 92\r
3941 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 93\r
3942 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 94\r
3943 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 95\r
3944 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 96\r
3945 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 97\r
3946 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 98\r
3947 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 99\r
3948 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 100\r
3949 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 101\r
3950 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 102\r
3951 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 103\r
3952 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 104\r
3953 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 105\r
3954 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 106\r
3955 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 107\r
3956 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 108\r
3957 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 109\r
3958 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 110\r
3959 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 111\r
3960 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 112\r
3961 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 113\r
3962 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 114\r
3963 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 115\r
3964 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 116\r
3965 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 117\r
3966 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 118\r
3967 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 119\r
3968 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 120\r
3969 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 121\r
3970 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 122\r
3971 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 123\r
3972 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 124\r
3973 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 125\r
3974 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 126\r
3975 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 127\r
3976 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 128\r
3977 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 129\r
3978 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 130\r
3979 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 131\r
3980 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 132\r
3981 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 133\r
3982 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 134\r
3983 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 135\r
3984 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 136\r
3985 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 137\r
3986 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 138\r
3987 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 139\r
3988 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 140\r
3989 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 141\r
3990 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 142\r
3991 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 143\r
3992 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 144\r
3993 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 145\r
3994 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 146\r
3995 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 147\r
3996 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 148\r
3997 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 149\r
3998 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 150\r
3999 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 151\r
4000 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 152\r
4001 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 153\r
4002 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 154\r
4003 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 155\r
4004 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 156\r
4005 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 157\r
4006 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 158\r
4007 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 159\r
4008 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 160\r
4009 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 161\r
4010 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 162\r
4011 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 163\r
4012 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 164\r
4013 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 165\r
4014 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 166\r
4015 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 167\r
4016 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 168\r
4017 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 169\r
4018 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 170\r
4019 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 171\r
4020 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 172\r
4021 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 173\r
4022 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 174\r
4023 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 175\r
4024 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 176\r
4025 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 177\r
4026 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 178\r
4027 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 179\r
4028 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 180\r
4029 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 181\r
4030 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 182\r
4031 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 183\r
4032 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 184\r
4033 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 185\r
4034 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 186\r
4035 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 187\r
4036 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 188\r
4037 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 189\r
4038 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 190\r
4039 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 191\r
4040 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 192\r
4041 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 193\r
4042 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 194\r
4043 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 195\r
4044 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 196\r
4045 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 197\r
4046 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 198\r
4047 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 199\r
4048 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 200\r
4049 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 201\r
4050 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 202\r
4051 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 203\r
4052 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 204\r
4053 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 205\r
4054 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 206\r
4055 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 207\r
4056 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 208\r
4057 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 209\r
4058 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 210\r
4059 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 211\r
4060 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 212\r
4061 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 213\r
4062 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 214\r
4063 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 215\r
4064 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 216\r
4065 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 217\r
4066 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 218\r
4067 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 219\r
4068 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 220\r
4069 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 221\r
4070 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 222\r
4071 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 223\r
4072 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 224\r
4073 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 225\r
4074 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 226\r
4075 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 227\r
4076 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 228\r
4077 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 229\r
4078 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 230\r
4079 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 231\r
4080 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 232\r
4081 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 233\r
4082 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 234\r
4083 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 235\r
4084 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 236\r
4085 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 237\r
4086 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 238\r
4087 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 239\r
4088 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 240\r
4089 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 241\r
4090 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 242\r
4091 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 243\r
4092 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 244\r
4093 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 245\r
4094 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 246\r
4095 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 247\r
4096 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 248\r
4097 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 249\r
4098 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 250\r
4099 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 251\r
4100 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 252\r
4101 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 253\r
4102 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 254\r
4103 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 255\r
4104\r
4105.align 4\r
4106\r
4107PZSTable_data: .byte (1<<ZFlag)|(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4108 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4109 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4110 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4111 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4112 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4113 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4114 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4115 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4116 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4117 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4118 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4119 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4120 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4121 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4122 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4123 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4124 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4125 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4126 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4127 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4128 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4129 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4130 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4131 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4132 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4133 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4134 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4135 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4136 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4137 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4138 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4139 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4140 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4141 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4142 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4143 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4144 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4145 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4146 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4147 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag) \r
4148\r
4149.align 4\r
4150\r
4151MAIN_opcodes: \r
4152 .word opcode_0_0,opcode_0_1,opcode_0_2,opcode_0_3,opcode_0_4,opcode_0_5,opcode_0_6,opcode_0_7\r
4153 .word opcode_0_8,opcode_0_9,opcode_0_A,opcode_0_B,opcode_0_C,opcode_0_D,opcode_0_E,opcode_0_F\r
4154 .word opcode_1_0,opcode_1_1,opcode_1_2,opcode_1_3,opcode_1_4,opcode_1_5,opcode_1_6,opcode_1_7\r
4155 .word opcode_1_8,opcode_1_9,opcode_1_A,opcode_1_B,opcode_1_C,opcode_1_D,opcode_1_E,opcode_1_F\r
4156 .word opcode_2_0,opcode_2_1,opcode_2_2,opcode_2_3,opcode_2_4,opcode_2_5,opcode_2_6,opcode_2_7\r
4157 .word opcode_2_8,opcode_2_9,opcode_2_A,opcode_2_B,opcode_2_C,opcode_2_D,opcode_2_E,opcode_2_F\r
4158 .word opcode_3_0,opcode_3_1,opcode_3_2,opcode_3_3,opcode_3_4,opcode_3_5,opcode_3_6,opcode_3_7\r
4159 .word opcode_3_8,opcode_3_9,opcode_3_A,opcode_3_B,opcode_3_C,opcode_3_D,opcode_3_E,opcode_3_F\r
4160 .word opcode_4_0,opcode_4_1,opcode_4_2,opcode_4_3,opcode_4_4,opcode_4_5,opcode_4_6,opcode_4_7\r
4161 .word opcode_4_8,opcode_4_9,opcode_4_A,opcode_4_B,opcode_4_C,opcode_4_D,opcode_4_E,opcode_4_F\r
4162 .word opcode_5_0,opcode_5_1,opcode_5_2,opcode_5_3,opcode_5_4,opcode_5_5,opcode_5_6,opcode_5_7\r
4163 .word opcode_5_8,opcode_5_9,opcode_5_A,opcode_5_B,opcode_5_C,opcode_5_D,opcode_5_E,opcode_5_F\r
4164 .word opcode_6_0,opcode_6_1,opcode_6_2,opcode_6_3,opcode_6_4,opcode_6_5,opcode_6_6,opcode_6_7\r
4165 .word opcode_6_8,opcode_6_9,opcode_6_A,opcode_6_B,opcode_6_C,opcode_6_D,opcode_6_E,opcode_6_F\r
4166 .word opcode_7_0,opcode_7_1,opcode_7_2,opcode_7_3,opcode_7_4,opcode_7_5,opcode_7_6,opcode_7_7\r
4167 .word opcode_7_8,opcode_7_9,opcode_7_A,opcode_7_B,opcode_7_C,opcode_7_D,opcode_7_E,opcode_7_F\r
4168 .word opcode_8_0,opcode_8_1,opcode_8_2,opcode_8_3,opcode_8_4,opcode_8_5,opcode_8_6,opcode_8_7\r
4169 .word opcode_8_8,opcode_8_9,opcode_8_A,opcode_8_B,opcode_8_C,opcode_8_D,opcode_8_E,opcode_8_F\r
4170 .word opcode_9_0,opcode_9_1,opcode_9_2,opcode_9_3,opcode_9_4,opcode_9_5,opcode_9_6,opcode_9_7\r
4171 .word opcode_9_8,opcode_9_9,opcode_9_A,opcode_9_B,opcode_9_C,opcode_9_D,opcode_9_E,opcode_9_F\r
4172 .word opcode_A_0,opcode_A_1,opcode_A_2,opcode_A_3,opcode_A_4,opcode_A_5,opcode_A_6,opcode_A_7\r
4173 .word opcode_A_8,opcode_A_9,opcode_A_A,opcode_A_B,opcode_A_C,opcode_A_D,opcode_A_E,opcode_A_F\r
4174 .word opcode_B_0,opcode_B_1,opcode_B_2,opcode_B_3,opcode_B_4,opcode_B_5,opcode_B_6,opcode_B_7\r
4175 .word opcode_B_8,opcode_B_9,opcode_B_A,opcode_B_B,opcode_B_C,opcode_B_D,opcode_B_E,opcode_B_F\r
4176 .word opcode_C_0,opcode_C_1,opcode_C_2,opcode_C_3,opcode_C_4,opcode_C_5,opcode_C_6,opcode_C_7\r
4177 .word opcode_C_8,opcode_C_9,opcode_C_A,opcode_C_B,opcode_C_C,opcode_C_D,opcode_C_E,opcode_C_F\r
4178 .word opcode_D_0,opcode_D_1,opcode_D_2,opcode_D_3,opcode_D_4,opcode_D_5,opcode_D_6,opcode_D_7\r
4179 .word opcode_D_8,opcode_D_9,opcode_D_A,opcode_D_B,opcode_D_C,opcode_D_D,opcode_D_E,opcode_D_F\r
4180 .word opcode_E_0,opcode_E_1,opcode_E_2,opcode_E_3,opcode_E_4,opcode_E_5,opcode_E_6,opcode_E_7\r
4181 .word opcode_E_8,opcode_E_9,opcode_E_A,opcode_E_B,opcode_E_C,opcode_E_D,opcode_E_E,opcode_E_F\r
4182 .word opcode_F_0,opcode_F_1,opcode_F_2,opcode_F_3,opcode_F_4,opcode_F_5,opcode_F_6,opcode_F_7\r
4183 .word opcode_F_8,opcode_F_9,opcode_F_A,opcode_F_B,opcode_F_C,opcode_F_D,opcode_F_E,opcode_F_F\r
4184\r
4185.align 4\r
4186\r
4187EI_DUMMY_opcodes:\r
4188 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4189 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4190 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4191 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4192 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4193 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4194 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4195 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4196 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4197 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4198 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4199 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4200 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4201 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4202 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4203 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4204 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4205 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4206 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4207 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4208 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4209 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4210 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4211 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4212 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4213 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4214 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4215 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4216 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4217 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4218 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4219 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4220\r
4221.text\r
4222.align 4\r
4223\r
4224;@NOP\r
4225opcode_0_0:\r
4226;@LD B,B\r
4227opcode_4_0:\r
4228;@LD C,C\r
4229opcode_4_9:\r
4230;@LD D,D\r
4231opcode_5_2:\r
4232;@LD E,E\r
4233opcode_5_B:\r
4234;@LD H,H\r
4235opcode_6_4:\r
4236;@LD L,L\r
4237opcode_6_D:\r
4238;@LD A,A\r
4239opcode_7_F:\r
4240 fetch 4\r
4241;@LD BC,NN\r
4242opcode_0_1:\r
4243 ldrb r0,[z80pc],#1\r
4244 ldrb r1,[z80pc],#1\r
4245 orr r0,r0,r1, lsl #8\r
4246 mov z80bc,r0, lsl #16\r
4247 fetch 10\r
4248;@LD (BC),A\r
4249opcode_0_2:\r
4250 mov r0,z80a, lsr #24\r
4251 mov r1,z80bc, lsr #16\r
4252 writemem8\r
4253 fetch 7\r
4254;@INC BC\r
4255opcode_0_3:\r
4256 add z80bc,z80bc,#1<<16\r
4257 fetch 6\r
4258;@INC B\r
4259opcode_0_4:\r
4260 opINC8H z80bc\r
4261 fetch 4\r
4262;@DEC B\r
4263opcode_0_5:\r
4264 opDEC8H z80bc\r
4265 fetch 4\r
4266;@LD B,N\r
4267opcode_0_6:\r
4268 ldrb r1,[z80pc],#1\r
4269 and z80bc,z80bc,#0xFF<<16\r
4270 orr z80bc,z80bc,r1, lsl #24\r
4271 fetch 7\r
4272;@RLCA\r
4273opcode_0_7:\r
4274 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4275 movs z80a,z80a, lsl #1\r
4276 orrcs z80a,z80a,#1<<24\r
4277 orrcs z80f,z80f,#1<<CFlag\r
4278 fetch 4\r
4279;@EX AF,AF'\r
4280opcode_0_8:\r
4281 add r1,cpucontext,#z80a2\r
4282 swp z80a,z80a,[r1]\r
4283 add r1,cpucontext,#z80f2\r
4284 swp z80f,z80f,[r1]\r
4285 fetch 4\r
4286;@ADD HL,BC\r
4287opcode_0_9:\r
4288 opADD16 z80hl z80bc\r
4289 fetch 11\r
4290;@LD A,(BC)\r
4291opcode_0_A:\r
4292 mov r0,z80bc, lsr #16\r
4293 readmem8\r
4294 mov z80a,r0, lsl #24\r
4295 fetch 7\r
4296;@DEC BC\r
4297opcode_0_B:\r
4298 sub z80bc,z80bc,#1<<16\r
4299 fetch 6\r
4300;@INC C\r
4301opcode_0_C:\r
4302 opINC8L z80bc\r
4303 fetch 4\r
4304;@DEC C\r
4305opcode_0_D:\r
4306 opDEC8L z80bc\r
4307 fetch 4\r
4308;@LD C,N\r
4309opcode_0_E:\r
4310 ldrb r1,[z80pc],#1\r
4311 and z80bc,z80bc,#0xFF<<24\r
4312 orr z80bc,z80bc,r1, lsl #16\r
4313 fetch 7\r
4314;@RRCA\r
4315opcode_0_F:\r
4316 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4317 movs z80a,z80a, lsr #25\r
4318 orrcs z80a,z80a,#1<<7\r
4319 orrcs z80f,z80f,#1<<CFlag\r
4320 mov z80a,z80a, lsl #24\r
4321 fetch 4\r
4322;@DJNZ $+2\r
4323opcode_1_0:\r
4324 sub z80bc,z80bc,#1<<24\r
4325 tst z80bc,#0xFF<<24\r
4326 ldrsb r1,[z80pc],#1\r
4327 addne z80pc,z80pc,r1\r
4328 subne z80_icount,z80_icount,#5\r
4329 fetch 8\r
4330\r
4331;@LD DE,NN\r
4332opcode_1_1:\r
4333 ldrb r0,[z80pc],#1\r
4334 ldrb r1,[z80pc],#1\r
4335 orr r0,r0,r1, lsl #8\r
4336 mov z80de,r0, lsl #16\r
4337 fetch 10\r
4338;@LD (DE),A\r
4339opcode_1_2:\r
4340 mov r0,z80a, lsr #24\r
4341 writemem8DE\r
4342 fetch 7\r
4343;@INC DE\r
4344opcode_1_3:\r
4345 add z80de,z80de,#1<<16\r
4346 fetch 6\r
4347;@INC D\r
4348opcode_1_4:\r
4349 opINC8H z80de\r
4350 fetch 4\r
4351;@DEC D\r
4352opcode_1_5:\r
4353 opDEC8H z80de\r
4354 fetch 4\r
4355;@LD D,N\r
4356opcode_1_6:\r
4357 ldrb r1,[z80pc],#1\r
4358 and z80de,z80de,#0xFF<<16\r
4359 orr z80de,z80de,r1, lsl #24\r
4360 fetch 7\r
4361;@RLA\r
4362opcode_1_7:\r
4363 tst z80f,#1<<CFlag\r
4364 orrne z80a,z80a,#1<<23\r
4365 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4366 movs z80a,z80a, lsl #1\r
4367 orrcs z80f,z80f,#1<<CFlag\r
4368 fetch 4\r
4369;@JR $+2\r
4370opcode_1_8:\r
4371 ldrsb r1,[z80pc],#1\r
4372 add z80pc,z80pc,r1\r
4373 fetch 12\r
4374;@ADD HL,DE\r
4375opcode_1_9:\r
4376 opADD16 z80hl z80de\r
4377 fetch 11\r
4378;@LD A,(DE)\r
4379opcode_1_A:\r
4380 mov r0,z80de, lsr #16\r
4381 readmem8\r
4382 mov z80a,r0, lsl #24\r
4383 fetch 7\r
4384;@DEC DE\r
4385opcode_1_B:\r
4386 sub z80de,z80de,#1<<16\r
4387 fetch 6\r
4388;@INC E\r
4389opcode_1_C:\r
4390 opINC8L z80de\r
4391 fetch 4\r
4392;@DEC E\r
4393opcode_1_D:\r
4394 opDEC8L z80de\r
4395 fetch 4\r
4396;@LD E,N\r
4397opcode_1_E:\r
4398 ldrb r0,[z80pc],#1\r
4399 and z80de,z80de,#0xFF<<24\r
4400 orr z80de,z80de,r0, lsl #16\r
4401 fetch 7\r
4402;@RRA\r
4403opcode_1_F:\r
4404 orr z80a,z80a,z80f,lsr#1 ;@get C\r
4405 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4406 movs z80a,z80a,ror#25\r
4407 orrcs z80f,z80f,#1<<CFlag\r
4408 mov z80a,z80a,lsl#24\r
4409 fetch 4\r
4410;@JR NZ,$+2\r
4411opcode_2_0:\r
4412 tst z80f,#1<<ZFlag\r
4413 beq opcode_1_8\r
4414 add z80pc,z80pc,#1\r
4415 fetch 7\r
4416;@LD HL,NN\r
4417opcode_2_1:\r
4418 ldrb r0,[z80pc],#1\r
4419 ldrb r1,[z80pc],#1\r
4420 orr r0,r0,r1, lsl #8\r
4421 mov z80hl,r0, lsl #16\r
4422 fetch 10\r
4423;@LD (NN),HL\r
4424opcode_ED_63:\r
4425 eatcycles 4\r
4426;@LD (NN),HL\r
4427opcode_2_2:\r
4428 ldrb r0,[z80pc],#1\r
4429 ldrb r1,[z80pc],#1\r
4430 orr r1,r0,r1, lsl #8\r
4431 mov r0,z80hl, lsr #16\r
4432 writemem16\r
4433 fetch 16\r
4434;@INC HL\r
4435opcode_2_3:\r
4436 add z80hl,z80hl,#1<<16\r
4437 fetch 6\r
4438;@INC H\r
4439opcode_2_4:\r
4440 opINC8H z80hl\r
4441 fetch 4\r
4442;@DEC H\r
4443opcode_2_5:\r
4444 opDEC8H z80hl\r
4445 fetch 4\r
4446;@LD H,N\r
4447opcode_2_6:\r
4448 ldrb r1,[z80pc],#1\r
4449 and z80hl,z80hl,#0xFF<<16\r
4450 orr z80hl,z80hl,r1, lsl #24\r
4451 fetch 7\r
4452DAATABLE_LOCAL: .word DAATable\r
4453;@DAA\r
4454opcode_2_7:\r
4455 mov r1,z80a, lsr #24\r
4456 tst z80f,#1<<CFlag\r
4457 orrne r1,r1,#256\r
4458 tst z80f,#1<<HFlag\r
4459 orrne r1,r1,#512\r
4460 tst z80f,#1<<NFlag\r
4461 orrne r1,r1,#1024\r
4462 ldr r2,DAATABLE_LOCAL\r
4463 add r2,r2,r1, lsl #1\r
4464 ldrh r1,[r2]\r
4465 and z80f,r1,#0xFF\r
4466 and r2,r1,#0xFF<<8\r
4467 mov z80a,r2, lsl #16\r
4468 fetch 4\r
4469;@JR Z,$+2\r
4470opcode_2_8:\r
4471 tst z80f,#1<<ZFlag\r
4472 bne opcode_1_8\r
4473 add z80pc,z80pc,#1\r
4474 fetch 7\r
4475;@ADD HL,HL\r
4476opcode_2_9:\r
4477 opADD16_2 z80hl\r
4478 fetch 11\r
4479;@LD HL,(NN)\r
4480opcode_ED_6B:\r
4481 eatcycles 4\r
4482;@LD HL,(NN)\r
4483opcode_2_A:\r
4484 ldrb r0,[z80pc],#1\r
4485 ldrb r1,[z80pc],#1\r
4486 orr r0,r0,r1, lsl #8\r
4487 readmem16\r
4488 mov z80hl,r0, lsl #16\r
4489 fetch 16\r
4490;@DEC HL\r
4491opcode_2_B:\r
4492 sub z80hl,z80hl,#1<<16\r
4493 fetch 6\r
4494;@INC L\r
4495opcode_2_C:\r
4496 opINC8L z80hl\r
4497 fetch 4\r
4498;@DEC L\r
4499opcode_2_D:\r
4500 opDEC8L z80hl\r
4501 fetch 4\r
4502;@LD L,N\r
4503opcode_2_E:\r
4504 ldrb r0,[z80pc],#1\r
4505 and z80hl,z80hl,#0xFF<<24\r
4506 orr z80hl,z80hl,r0, lsl #16\r
4507 fetch 7\r
4508;@CPL\r
4509opcode_2_F:\r
4510 eor z80a,z80a,#0xFF<<24\r
4511 orr z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4512 fetch 4\r
4513;@JR NC,$+2\r
4514opcode_3_0:\r
4515 tst z80f,#1<<CFlag\r
4516 beq opcode_1_8\r
4517 add z80pc,z80pc,#1\r
4518 fetch 7\r
4519;@LD SP,NN\r
4520opcode_3_1:\r
4521 ldrb r0,[z80pc],#1\r
4522 ldrb r1,[z80pc],#1\r
4523\r
4524.if FAST_Z80SP\r
4525 orr r0,r0,r1, lsl #8\r
4526 rebasesp\r
4527 mov z80sp,r0\r
4528.else\r
4529 orr z80sp,r0,r1, lsl #8\r
4530.endif\r
4531 fetch 10\r
4532;@LD (NN),A\r
4533opcode_3_2:\r
4534 ldrb r0,[z80pc],#1\r
4535 ldrb r1,[z80pc],#1\r
4536 orr r1,r0,r1, lsl #8\r
4537 mov r0,z80a, lsr #24\r
4538 writemem8\r
4539 fetch 13\r
4540;@INC SP\r
4541opcode_3_3:\r
4542 add z80sp,z80sp,#1\r
4543 fetch 6\r
4544;@INC (HL)\r
4545opcode_3_4:\r
4546 readmem8HL\r
4547 opINC8b\r
4548 writemem8HL\r
4549 fetch 11\r
4550;@DEC (HL)\r
4551opcode_3_5:\r
4552 readmem8HL\r
4553 opDEC8b\r
4554 writemem8HL\r
4555 fetch 11\r
4556;@LD (HL),N\r
4557opcode_3_6:\r
4558 ldrb r0,[z80pc],#1\r
4559 writemem8HL\r
4560 fetch 10\r
4561;@SCF\r
4562opcode_3_7:\r
4563 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4564 orr z80f,z80f,#1<<CFlag\r
4565 fetch 4\r
4566;@JR C,$+2\r
4567opcode_3_8:\r
4568 tst z80f,#1<<CFlag\r
4569 bne opcode_1_8\r
4570 add z80pc,z80pc,#1\r
28d596af 4571 fetch 7\r
cc68a136 4572;@ADD HL,SP\r
4573opcode_3_9:\r
4574.if FAST_Z80SP\r
4575 ldr r0,[cpucontext,#z80sp_base]\r
4576 sub r0,z80sp,r0\r
4577 opADD16s z80hl r0 16\r
4578.else\r
4579 opADD16s z80hl z80sp 16\r
4580.endif\r
4581 fetch 11\r
4582;@LD A,(NN)\r
4583opcode_3_A:\r
4584 ldrb r0,[z80pc],#1\r
4585 ldrb r1,[z80pc],#1\r
4586 orr r0,r0,r1, lsl #8\r
4587 readmem8\r
4588 mov z80a,r0, lsl #24\r
28d596af 4589 fetch 13\r
cc68a136 4590;@DEC SP\r
4591opcode_3_B:\r
4592 sub z80sp,z80sp,#1\r
4593 fetch 6\r
4594;@INC A\r
4595opcode_3_C:\r
4596 opINC8 z80a\r
4597 fetch 4\r
4598;@DEC A\r
4599opcode_3_D:\r
4600 opDEC8 z80a\r
4601 fetch 4\r
4602;@LD A,N\r
4603opcode_3_E:\r
4604 ldrb r0,[z80pc],#1\r
4605 mov z80a,r0, lsl #24\r
4606 fetch 7\r
4607;@CCF\r
4608opcode_3_F:\r
4609 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4610 tst z80f,#1<<CFlag\r
4611 orrne z80f,z80f,#1<<HFlag\r
4612 eor z80f,z80f,#1<<CFlag\r
4613 fetch 4\r
4614\r
4615;@LD B,C\r
4616opcode_4_1:\r
4617 and z80bc,z80bc,#0xFF<<16\r
4618 orr z80bc,z80bc,z80bc, lsl #8\r
4619 fetch 4\r
4620;@LD B,D\r
4621opcode_4_2:\r
4622 and z80bc,z80bc,#0xFF<<16\r
4623 and r1,z80de,#0xFF<<24\r
4624 orr z80bc,z80bc,r1\r
4625 fetch 4\r
4626;@LD B,E\r
4627opcode_4_3:\r
4628 and z80bc,z80bc,#0xFF<<16\r
4629 and r1,z80de,#0xFF<<16\r
4630 orr z80bc,z80bc,r1, lsl #8\r
4631 fetch 4\r
4632;@LD B,H\r
4633opcode_4_4:\r
4634 and z80bc,z80bc,#0xFF<<16\r
4635 and r1,z80hl,#0xFF<<24\r
4636 orr z80bc,z80bc,r1\r
4637 fetch 4\r
4638;@LD B,L\r
4639opcode_4_5:\r
4640 and z80bc,z80bc,#0xFF<<16\r
4641 and r1,z80hl,#0xFF<<16\r
4642 orr z80bc,z80bc,r1, lsl #8\r
4643 fetch 4\r
4644;@LD B,(HL)\r
4645opcode_4_6:\r
4646 readmem8HL\r
4647 and z80bc,z80bc,#0xFF<<16\r
4648 orr z80bc,z80bc,r0, lsl #24\r
4649 fetch 7\r
4650;@LD B,A\r
4651opcode_4_7:\r
4652 and z80bc,z80bc,#0xFF<<16\r
4653 orr z80bc,z80bc,z80a\r
4654 fetch 4\r
4655;@LD C,B\r
4656opcode_4_8:\r
4657 and z80bc,z80bc,#0xFF<<24\r
4658 orr z80bc,z80bc,z80bc, lsr #8\r
4659 fetch 4\r
4660;@LD C,D\r
4661opcode_4_A:\r
4662 and z80bc,z80bc,#0xFF<<24\r
4663 and r1,z80de,#0xFF<<24\r
4664 orr z80bc,z80bc,r1, lsr #8\r
4665 fetch 4\r
4666;@LD C,E\r
4667opcode_4_B:\r
4668 and z80bc,z80bc,#0xFF<<24\r
4669 and r1,z80de,#0xFF<<16\r
4670 orr z80bc,z80bc,r1 \r
4671 fetch 4\r
4672;@LD C,H\r
4673opcode_4_C:\r
4674 and z80bc,z80bc,#0xFF<<24\r
4675 and r1,z80hl,#0xFF<<24\r
4676 orr z80bc,z80bc,r1, lsr #8\r
4677 fetch 4\r
4678;@LD C,L\r
4679opcode_4_D:\r
4680 and z80bc,z80bc,#0xFF<<24\r
4681 and r1,z80hl,#0xFF<<16\r
4682 orr z80bc,z80bc,r1 \r
4683 fetch 4\r
4684;@LD C,(HL)\r
4685opcode_4_E:\r
4686 readmem8HL\r
4687 and z80bc,z80bc,#0xFF<<24\r
4688 orr z80bc,z80bc,r0, lsl #16\r
4689 fetch 7\r
4690;@LD C,A\r
4691opcode_4_F:\r
4692 and z80bc,z80bc,#0xFF<<24\r
4693 orr z80bc,z80bc,z80a, lsr #8\r
4694 fetch 4\r
4695;@LD D,B\r
4696opcode_5_0:\r
4697 and z80de,z80de,#0xFF<<16\r
4698 and r1,z80bc,#0xFF<<24\r
4699 orr z80de,z80de,r1\r
4700 fetch 4\r
4701;@LD D,C\r
4702opcode_5_1:\r
4703 and z80de,z80de,#0xFF<<16\r
4704 orr z80de,z80de,z80bc, lsl #8\r
4705 fetch 4\r
4706;@LD D,E\r
4707opcode_5_3:\r
4708 and z80de,z80de,#0xFF<<16\r
4709 orr z80de,z80de,z80de, lsl #8\r
4710 fetch 4\r
4711;@LD D,H\r
4712opcode_5_4:\r
4713 and z80de,z80de,#0xFF<<16\r
4714 and r1,z80hl,#0xFF<<24\r
4715 orr z80de,z80de,r1\r
4716 fetch 4\r
4717;@LD D,L\r
4718opcode_5_5:\r
4719 and z80de,z80de,#0xFF<<16\r
4720 orr z80de,z80de,z80hl, lsl #8\r
4721 fetch 4\r
4722;@LD D,(HL)\r
4723opcode_5_6:\r
4724 readmem8HL\r
4725 and z80de,z80de,#0xFF<<16\r
4726 orr z80de,z80de,r0, lsl #24\r
4727 fetch 7\r
4728;@LD D,A\r
4729opcode_5_7:\r
4730 and z80de,z80de,#0xFF<<16\r
4731 orr z80de,z80de,z80a\r
4732 fetch 4\r
4733;@LD E,B\r
4734opcode_5_8:\r
4735 and z80de,z80de,#0xFF<<24\r
4736 and r1,z80bc,#0xFF<<24\r
4737 orr z80de,z80de,r1, lsr #8\r
4738 fetch 4\r
4739;@LD E,C\r
4740opcode_5_9:\r
4741 and z80de,z80de,#0xFF<<24\r
4742 and r1,z80bc,#0xFF<<16\r
4743 orr z80de,z80de,r1 \r
4744 fetch 4\r
4745;@LD E,D\r
4746opcode_5_A:\r
4747 and z80de,z80de,#0xFF<<24\r
4748 orr z80de,z80de,z80de, lsr #8\r
4749 fetch 4\r
4750;@LD E,H\r
4751opcode_5_C:\r
4752 and z80de,z80de,#0xFF<<24\r
4753 and r1,z80hl,#0xFF<<24\r
4754 orr z80de,z80de,r1, lsr #8\r
4755 fetch 4\r
4756;@LD E,L\r
4757opcode_5_D:\r
4758 and z80de,z80de,#0xFF<<24\r
4759 and r1,z80hl,#0xFF<<16\r
4760 orr z80de,z80de,r1 \r
4761 fetch 4\r
4762;@LD E,(HL)\r
4763opcode_5_E:\r
4764 readmem8HL\r
4765 and z80de,z80de,#0xFF<<24\r
4766 orr z80de,z80de,r0, lsl #16\r
4767 fetch 7\r
4768;@LD E,A\r
4769opcode_5_F:\r
4770 and z80de,z80de,#0xFF<<24\r
4771 orr z80de,z80de,z80a, lsr #8\r
4772 fetch 4\r
4773\r
4774;@LD H,B\r
4775opcode_6_0:\r
4776 and z80hl,z80hl,#0xFF<<16\r
4777 and r1,z80bc,#0xFF<<24\r
4778 orr z80hl,z80hl,r1\r
4779 fetch 4\r
4780;@LD H,C\r
4781opcode_6_1:\r
4782 and z80hl,z80hl,#0xFF<<16\r
4783 orr z80hl,z80hl,z80bc, lsl #8\r
4784 fetch 4\r
4785;@LD H,D\r
4786opcode_6_2:\r
4787 and z80hl,z80hl,#0xFF<<16\r
4788 and r1,z80de,#0xFF<<24\r
4789 orr z80hl,z80hl,r1\r
4790 fetch 4\r
4791;@LD H,E\r
4792opcode_6_3:\r
4793 and z80hl,z80hl,#0xFF<<16\r
4794 orr z80hl,z80hl,z80de, lsl #8\r
4795 fetch 4\r
4796;@LD H,L\r
4797opcode_6_5:\r
4798 and z80hl,z80hl,#0xFF<<16\r
4799 orr z80hl,z80hl,z80hl, lsl #8\r
4800 fetch 4\r
4801;@LD H,(HL)\r
4802opcode_6_6:\r
4803 readmem8HL\r
4804 and z80hl,z80hl,#0xFF<<16\r
4805 orr z80hl,z80hl,r0, lsl #24\r
4806 fetch 7\r
4807;@LD H,A\r
4808opcode_6_7:\r
4809 and z80hl,z80hl,#0xFF<<16\r
4810 orr z80hl,z80hl,z80a\r
4811 fetch 4\r
4812\r
4813;@LD L,B\r
4814opcode_6_8:\r
4815 and z80hl,z80hl,#0xFF<<24\r
4816 and r1,z80bc,#0xFF<<24\r
4817 orr z80hl,z80hl,r1, lsr #8\r
4818 fetch 4\r
4819;@LD L,C\r
4820opcode_6_9:\r
4821 and z80hl,z80hl,#0xFF<<24\r
4822 and r1,z80bc,#0xFF<<16\r
4823 orr z80hl,z80hl,r1\r
4824 fetch 4\r
4825;@LD L,D\r
4826opcode_6_A:\r
4827 and z80hl,z80hl,#0xFF<<24\r
4828 and r1,z80de,#0xFF<<24\r
4829 orr z80hl,z80hl,r1, lsr #8\r
4830 fetch 4\r
4831;@LD L,E\r
4832opcode_6_B:\r
4833 and z80hl,z80hl,#0xFF<<24\r
4834 and r1,z80de,#0xFF<<16\r
4835 orr z80hl,z80hl,r1\r
4836 fetch 4\r
4837;@LD L,H\r
4838opcode_6_C:\r
4839 and z80hl,z80hl,#0xFF<<24\r
4840 orr z80hl,z80hl,z80hl, lsr #8\r
4841 fetch 4\r
4842;@LD L,(HL)\r
4843opcode_6_E:\r
4844 readmem8HL\r
4845 and z80hl,z80hl,#0xFF<<24\r
4846 orr z80hl,z80hl,r0, lsl #16\r
4847 fetch 7\r
4848;@LD L,A\r
4849opcode_6_F:\r
4850 and z80hl,z80hl,#0xFF<<24\r
4851 orr z80hl,z80hl,z80a, lsr #8\r
4852 fetch 4\r
4853\r
4854;@LD (HL),B\r
4855opcode_7_0:\r
4856 mov r0,z80bc, lsr #24\r
4857 writemem8HL\r
4858 fetch 7\r
4859;@LD (HL),C\r
4860opcode_7_1:\r
4861 mov r0,z80bc, lsr #16\r
4862 and r0,r0,#0xFF\r
4863 writemem8HL\r
4864 fetch 7\r
4865;@LD (HL),D\r
4866opcode_7_2:\r
4867 mov r0,z80de, lsr #24\r
4868 writemem8HL\r
4869 fetch 7\r
4870;@LD (HL),E\r
4871opcode_7_3:\r
4872 mov r0,z80de, lsr #16\r
4873 and r0,r0,#0xFF\r
4874 writemem8HL\r
4875 fetch 7\r
4876;@LD (HL),H\r
4877opcode_7_4:\r
4878 mov r0,z80hl, lsr #24\r
4879 writemem8HL\r
4880 fetch 7\r
4881;@LD (HL),L\r
4882opcode_7_5:\r
4883 mov r1,z80hl, lsr #16\r
4884 and r0,r1,#0xFF\r
4885 writemem8\r
4886 fetch 7\r
4887;@HALT\r
4888opcode_7_6:\r
4889 sub z80pc,z80pc,#1\r
4890 ldrb r0,[cpucontext,#z80if]\r
4891 orr r0,r0,#Z80_HALT\r
4892 strb r0,[cpucontext,#z80if]\r
28d596af 4893 mov z80_icount,#0\r
cc68a136 4894 b z80_execute_end\r
4895;@LD (HL),A\r
4896opcode_7_7:\r
4897 mov r0,z80a, lsr #24\r
4898 writemem8HL\r
4899 fetch 7\r
4900\r
4901;@LD A,B\r
4902opcode_7_8:\r
4903 and z80a,z80bc,#0xFF<<24\r
4904 fetch 4\r
4905;@LD A,C\r
4906opcode_7_9:\r
4907 mov z80a,z80bc, lsl #8\r
4908 fetch 4\r
4909;@LD A,D\r
4910opcode_7_A:\r
4911 and z80a,z80de,#0xFF<<24\r
4912 fetch 4\r
4913;@LD A,E\r
4914opcode_7_B:\r
4915 mov z80a,z80de, lsl #8\r
4916 fetch 4\r
4917;@LD A,H\r
4918opcode_7_C:\r
4919 and z80a,z80hl,#0xFF<<24\r
4920 fetch 4\r
4921;@LD A,L\r
4922opcode_7_D:\r
4923 mov z80a,z80hl, lsl #8\r
4924 fetch 4\r
4925;@LD A,(HL)\r
4926opcode_7_E:\r
4927 readmem8HL\r
4928 mov z80a,r0, lsl #24\r
4929 fetch 7\r
4930\r
4931;@ADD A,B\r
4932opcode_8_0:\r
4933 opADDH z80bc\r
4934;@ADD A,C\r
4935opcode_8_1:\r
4936 opADDL z80bc\r
4937;@ADD A,D\r
4938opcode_8_2:\r
4939 opADDH z80de\r
4940;@ADD A,E\r
4941opcode_8_3:\r
4942 opADDL z80de\r
4943;@ADD A,H\r
4944opcode_8_4:\r
4945 opADDH z80hl\r
4946;@ADD A,L\r
4947opcode_8_5:\r
4948 opADDL z80hl\r
4949;@ADD A,(HL)\r
4950opcode_8_6:\r
4951 readmem8HL\r
4952 opADDb\r
4953 fetch 7\r
4954;@ADD A,A\r
4955opcode_8_7:\r
4956 opADDA\r
4957\r
4958;@ADC A,B\r
4959opcode_8_8:\r
4960 opADCH z80bc\r
4961;@ADC A,C\r
4962opcode_8_9:\r
4963 opADCL z80bc\r
4964;@ADC A,D\r
4965opcode_8_A:\r
4966 opADCH z80de\r
4967;@ADC A,E\r
4968opcode_8_B:\r
4969 opADCL z80de\r
4970;@ADC A,H\r
4971opcode_8_C:\r
4972 opADCH z80hl\r
4973;@ADC A,L\r
4974opcode_8_D:\r
4975 opADCL z80hl\r
4976;@ADC A,(HL)\r
4977opcode_8_E:\r
4978 readmem8HL\r
4979 opADCb\r
4980 fetch 7\r
4981;@ADC A,A\r
4982opcode_8_F:\r
4983 opADCA\r
4984\r
4985;@SUB B\r
4986opcode_9_0:\r
4987 opSUBH z80bc\r
4988;@SUB C\r
4989opcode_9_1:\r
4990 opSUBL z80bc\r
4991;@SUB D\r
4992opcode_9_2:\r
4993 opSUBH z80de\r
4994;@SUB E\r
4995opcode_9_3:\r
4996 opSUBL z80de\r
4997;@SUB H\r
4998opcode_9_4:\r
4999 opSUBH z80hl\r
5000;@SUB L\r
5001opcode_9_5:\r
5002 opSUBL z80hl\r
5003;@SUB (HL)\r
5004opcode_9_6:\r
5005 readmem8HL\r
5006 opSUBb\r
5007 fetch 7\r
5008;@SUB A\r
5009opcode_9_7:\r
5010 opSUBA\r
5011\r
5012;@SBC B \r
5013opcode_9_8:\r
5014 opSBCH z80bc\r
5015;@SBC C\r
5016opcode_9_9:\r
5017 opSBCL z80bc\r
5018;@SBC D\r
5019opcode_9_A:\r
5020 opSBCH z80de\r
5021;@SBC E\r
5022opcode_9_B:\r
5023 opSBCL z80de\r
5024;@SBC H\r
5025opcode_9_C:\r
5026 opSBCH z80hl\r
5027;@SBC L\r
5028opcode_9_D:\r
5029 opSBCL z80hl\r
5030;@SBC (HL)\r
5031opcode_9_E:\r
5032 readmem8HL\r
5033 opSBCb\r
5034 fetch 7\r
5035;@SBC A\r
5036opcode_9_F:\r
5037 opSBCA\r
5038\r
5039;@AND B\r
5040opcode_A_0:\r
5041 opANDH z80bc\r
5042;@AND C\r
5043opcode_A_1:\r
5044 opANDL z80bc\r
5045;@AND D\r
5046opcode_A_2:\r
5047 opANDH z80de\r
5048;@AND E\r
5049opcode_A_3:\r
5050 opANDL z80de\r
5051;@AND H\r
5052opcode_A_4:\r
5053 opANDH z80hl\r
5054;@AND L\r
5055opcode_A_5:\r
5056 opANDL z80hl\r
5057;@AND (HL)\r
5058opcode_A_6:\r
5059 readmem8HL\r
5060 opANDb\r
5061 fetch 7\r
5062;@AND A\r
5063opcode_A_7:\r
5064 opANDA\r
5065\r
5066;@XOR B\r
5067opcode_A_8:\r
5068 opXORH z80bc\r
5069;@XOR C\r
5070opcode_A_9:\r
5071 opXORL z80bc\r
5072;@XOR D\r
5073opcode_A_A:\r
5074 opXORH z80de\r
5075;@XOR E\r
5076opcode_A_B:\r
5077 opXORL z80de\r
5078;@XOR H\r
5079opcode_A_C:\r
5080 opXORH z80hl\r
5081;@XOR L\r
5082opcode_A_D:\r
5083 opXORL z80hl\r
5084;@XOR (HL)\r
5085opcode_A_E:\r
5086 readmem8HL\r
5087 opXORb\r
5088 fetch 7\r
5089;@XOR A\r
5090opcode_A_F:\r
5091 opXORA\r
5092\r
5093;@OR B\r
5094opcode_B_0:\r
5095 opORH z80bc\r
5096;@OR C\r
5097opcode_B_1:\r
5098 opORL z80bc\r
5099;@OR D\r
5100opcode_B_2:\r
5101 opORH z80de\r
5102;@OR E\r
5103opcode_B_3:\r
5104 opORL z80de\r
5105;@OR H\r
5106opcode_B_4:\r
5107 opORH z80hl\r
5108;@OR L\r
5109opcode_B_5:\r
5110 opORL z80hl\r
5111;@OR (HL)\r
5112opcode_B_6:\r
5113 readmem8HL\r
5114 opORb\r
5115 fetch 7\r
5116;@OR A\r
5117opcode_B_7:\r
5118 opORA\r
5119\r
5120;@CP B\r
5121opcode_B_8:\r
5122 opCPH z80bc\r
5123;@CP C\r
5124opcode_B_9:\r
5125 opCPL z80bc\r
5126;@CP D\r
5127opcode_B_A:\r
5128 opCPH z80de\r
5129;@CP E\r
5130opcode_B_B:\r
5131 opCPL z80de\r
5132;@CP H\r
5133opcode_B_C:\r
5134 opCPH z80hl\r
5135;@CP L\r
5136opcode_B_D:\r
5137 opCPL z80hl\r
5138;@CP (HL)\r
5139opcode_B_E:\r
5140 readmem8HL\r
5141 opCPb\r
5142 fetch 7\r
5143;@CP A\r
5144opcode_B_F:\r
5145 opCPA\r
5146\r
5147;@RET NZ\r
5148opcode_C_0:\r
5149 tst z80f,#1<<ZFlag\r
28d596af 5150 beq opcode_C_9_cond ;@unconditional RET\r
cc68a136 5151 fetch 5\r
5152\r
5153;@POP BC\r
5154opcode_C_1:\r
5155 opPOPreg z80bc\r
5156\r
5157;@JP NZ,$+3\r
5158opcode_C_2:\r
5159 tst z80f,#1<<ZFlag\r
5160 beq opcode_C_3 ;@unconditional JP\r
5161 add z80pc,z80pc,#2\r
5162 fetch 10\r
5163;@JP $+3\r
5164opcode_C_3:\r
5165 ldrb r0,[z80pc],#1\r
5166 ldrb r1,[z80pc],#1\r
5167 orr r0,r0,r1, lsl #8\r
5168 rebasepc\r
5169 fetch 10\r
5170;@CALL NZ,NN\r
5171opcode_C_4:\r
5172 tst z80f,#1<<ZFlag\r
5173 beq opcode_C_D ;@unconditional CALL\r
5174 add z80pc,z80pc,#2\r
5175 fetch 10\r
5176\r
5177;@PUSH BC\r
5178opcode_C_5:\r
5179 opPUSHreg z80bc\r
5180 fetch 11\r
5181;@ADD A,N\r
5182opcode_C_6:\r
5183 ldrb r0,[z80pc],#1\r
5184 opADDb\r
5185 fetch 7\r
5186;@RST 0\r
5187opcode_C_7:\r
5188 opRST 0x00\r
5189\r
5190;@RET Z\r
5191opcode_C_8:\r
5192 tst z80f,#1<<ZFlag\r
28d596af 5193 bne opcode_C_9_cond ;@unconditional RET\r
cc68a136 5194 fetch 5\r
28d596af 5195\r
5196opcode_C_9_cond:\r
5197 sub z80_icount,#1\r
cc68a136 5198;@RET\r
5199opcode_C_9:\r
5200 opPOP\r
5201 rebasepc\r
5202 fetch 10\r
5203;@JP Z,$+3\r
5204opcode_C_A:\r
5205 tst z80f,#1<<ZFlag\r
5206 bne opcode_C_3 ;@unconditional JP\r
5207 add z80pc,z80pc,#2\r
5208 fetch 10\r
5209\r
5210;@This reads this opcodes_CB lookup table to find the location of\r
5211;@the CB sub for the intruction and then branches to that location\r
5212opcode_C_B:\r
5213 ldrb r0,[z80pc],#1\r
5214 ldr pc,[pc,r0, lsl #2]\r
5215opcodes_CB: .word 0x00000000\r
5216 .word opcode_CB_00,opcode_CB_01,opcode_CB_02,opcode_CB_03,opcode_CB_04,opcode_CB_05,opcode_CB_06,opcode_CB_07\r
5217 .word opcode_CB_08,opcode_CB_09,opcode_CB_0A,opcode_CB_0B,opcode_CB_0C,opcode_CB_0D,opcode_CB_0E,opcode_CB_0F\r
5218 .word opcode_CB_10,opcode_CB_11,opcode_CB_12,opcode_CB_13,opcode_CB_14,opcode_CB_15,opcode_CB_16,opcode_CB_17\r
5219 .word opcode_CB_18,opcode_CB_19,opcode_CB_1A,opcode_CB_1B,opcode_CB_1C,opcode_CB_1D,opcode_CB_1E,opcode_CB_1F\r
5220 .word opcode_CB_20,opcode_CB_21,opcode_CB_22,opcode_CB_23,opcode_CB_24,opcode_CB_25,opcode_CB_26,opcode_CB_27\r
5221 .word opcode_CB_28,opcode_CB_29,opcode_CB_2A,opcode_CB_2B,opcode_CB_2C,opcode_CB_2D,opcode_CB_2E,opcode_CB_2F\r
5222 .word opcode_CB_30,opcode_CB_31,opcode_CB_32,opcode_CB_33,opcode_CB_34,opcode_CB_35,opcode_CB_36,opcode_CB_37\r
5223 .word opcode_CB_38,opcode_CB_39,opcode_CB_3A,opcode_CB_3B,opcode_CB_3C,opcode_CB_3D,opcode_CB_3E,opcode_CB_3F\r
5224 .word opcode_CB_40,opcode_CB_41,opcode_CB_42,opcode_CB_43,opcode_CB_44,opcode_CB_45,opcode_CB_46,opcode_CB_47\r
5225 .word opcode_CB_48,opcode_CB_49,opcode_CB_4A,opcode_CB_4B,opcode_CB_4C,opcode_CB_4D,opcode_CB_4E,opcode_CB_4F\r
5226 .word opcode_CB_50,opcode_CB_51,opcode_CB_52,opcode_CB_53,opcode_CB_54,opcode_CB_55,opcode_CB_56,opcode_CB_57\r
5227 .word opcode_CB_58,opcode_CB_59,opcode_CB_5A,opcode_CB_5B,opcode_CB_5C,opcode_CB_5D,opcode_CB_5E,opcode_CB_5F\r
5228 .word opcode_CB_60,opcode_CB_61,opcode_CB_62,opcode_CB_63,opcode_CB_64,opcode_CB_65,opcode_CB_66,opcode_CB_67\r
5229 .word opcode_CB_68,opcode_CB_69,opcode_CB_6A,opcode_CB_6B,opcode_CB_6C,opcode_CB_6D,opcode_CB_6E,opcode_CB_6F\r
5230 .word opcode_CB_70,opcode_CB_71,opcode_CB_72,opcode_CB_73,opcode_CB_74,opcode_CB_75,opcode_CB_76,opcode_CB_77\r
5231 .word opcode_CB_78,opcode_CB_79,opcode_CB_7A,opcode_CB_7B,opcode_CB_7C,opcode_CB_7D,opcode_CB_7E,opcode_CB_7F\r
5232 .word opcode_CB_80,opcode_CB_81,opcode_CB_82,opcode_CB_83,opcode_CB_84,opcode_CB_85,opcode_CB_86,opcode_CB_87\r
5233 .word opcode_CB_88,opcode_CB_89,opcode_CB_8A,opcode_CB_8B,opcode_CB_8C,opcode_CB_8D,opcode_CB_8E,opcode_CB_8F\r
5234 .word opcode_CB_90,opcode_CB_91,opcode_CB_92,opcode_CB_93,opcode_CB_94,opcode_CB_95,opcode_CB_96,opcode_CB_97\r
5235 .word opcode_CB_98,opcode_CB_99,opcode_CB_9A,opcode_CB_9B,opcode_CB_9C,opcode_CB_9D,opcode_CB_9E,opcode_CB_9F\r
5236 .word opcode_CB_A0,opcode_CB_A1,opcode_CB_A2,opcode_CB_A3,opcode_CB_A4,opcode_CB_A5,opcode_CB_A6,opcode_CB_A7\r
5237 .word opcode_CB_A8,opcode_CB_A9,opcode_CB_AA,opcode_CB_AB,opcode_CB_AC,opcode_CB_AD,opcode_CB_AE,opcode_CB_AF\r
5238 .word opcode_CB_B0,opcode_CB_B1,opcode_CB_B2,opcode_CB_B3,opcode_CB_B4,opcode_CB_B5,opcode_CB_B6,opcode_CB_B7\r
5239 .word opcode_CB_B8,opcode_CB_B9,opcode_CB_BA,opcode_CB_BB,opcode_CB_BC,opcode_CB_BD,opcode_CB_BE,opcode_CB_BF\r
5240 .word opcode_CB_C0,opcode_CB_C1,opcode_CB_C2,opcode_CB_C3,opcode_CB_C4,opcode_CB_C5,opcode_CB_C6,opcode_CB_C7\r
5241 .word opcode_CB_C8,opcode_CB_C9,opcode_CB_CA,opcode_CB_CB,opcode_CB_CC,opcode_CB_CD,opcode_CB_CE,opcode_CB_CF\r
5242 .word opcode_CB_D0,opcode_CB_D1,opcode_CB_D2,opcode_CB_D3,opcode_CB_D4,opcode_CB_D5,opcode_CB_D6,opcode_CB_D7\r
5243 .word opcode_CB_D8,opcode_CB_D9,opcode_CB_DA,opcode_CB_DB,opcode_CB_DC,opcode_CB_DD,opcode_CB_DE,opcode_CB_DF\r
5244 .word opcode_CB_E0,opcode_CB_E1,opcode_CB_E2,opcode_CB_E3,opcode_CB_E4,opcode_CB_E5,opcode_CB_E6,opcode_CB_E7\r
5245 .word opcode_CB_E8,opcode_CB_E9,opcode_CB_EA,opcode_CB_EB,opcode_CB_EC,opcode_CB_ED,opcode_CB_EE,opcode_CB_EF\r
5246 .word opcode_CB_F0,opcode_CB_F1,opcode_CB_F2,opcode_CB_F3,opcode_CB_F4,opcode_CB_F5,opcode_CB_F6,opcode_CB_F7\r
5247 .word opcode_CB_F8,opcode_CB_F9,opcode_CB_FA,opcode_CB_FB,opcode_CB_FC,opcode_CB_FD,opcode_CB_FE,opcode_CB_FF\r
5248\r
5249;@CALL Z,NN\r
5250opcode_C_C:\r
5251 tst z80f,#1<<ZFlag\r
5252 bne opcode_C_D ;@unconditional CALL\r
5253 add z80pc,z80pc,#2\r
5254 fetch 10\r
5255;@CALL NN\r
5256opcode_C_D:\r
5257 ldrb r0,[z80pc],#1\r
5258 ldrb r1,[z80pc],#1\r
5259 ldr r2,[cpucontext,#z80pc_base]\r
5260 sub r2,z80pc,r2\r
5261 orr z80pc,r0,r1, lsl #8\r
5262 opPUSHareg r2\r
5263 mov r0,z80pc\r
5264 rebasepc\r
5265 fetch 17\r
5266;@ADC A,N\r
5267opcode_C_E:\r
5268 ldrb r0,[z80pc],#1\r
5269 opADCb\r
5270 fetch 7\r
5271;@RST 8H\r
5272opcode_C_F:\r
5273 opRST 0x08\r
5274\r
5275;@RET NC\r
5276opcode_D_0:\r
5277 tst z80f,#1<<CFlag\r
28d596af 5278 beq opcode_C_9_cond ;@unconditional RET\r
cc68a136 5279 fetch 5\r
5280;@POP DE\r
5281opcode_D_1:\r
5282 opPOPreg z80de\r
5283\r
5284;@JP NC, $+3\r
5285opcode_D_2 :\r
5286 tst z80f,#1<<CFlag\r
5287 beq opcode_C_3 ;@unconditional JP\r
5288 add z80pc,z80pc,#2\r
5289 fetch 10\r
5290;@OUT (N),A\r
5291opcode_D_3:\r
5292 ldrb r0,[z80pc],#1\r
5293 orr r0,r0,z80a,lsr#16\r
5294 mov r1,z80a, lsr #24\r
5295 opOUT\r
5296 fetch 11\r
5297;@CALL NC,NN\r
5298opcode_D_4:\r
5299 tst z80f,#1<<CFlag\r
5300 beq opcode_C_D ;@unconditional CALL\r
5301 add z80pc,z80pc,#2\r
5302 fetch 10\r
5303;@PUSH DE\r
5304opcode_D_5:\r
5305 opPUSHreg z80de\r
5306 fetch 11\r
5307;@SUB N\r
5308opcode_D_6:\r
5309 ldrb r0,[z80pc],#1\r
5310 opSUBb\r
5311 fetch 7\r
5312\r
5313;@RST 10H\r
5314opcode_D_7:\r
5315 opRST 0x10\r
5316\r
5317;@RET C\r
5318opcode_D_8:\r
5319 tst z80f,#1<<CFlag\r
28d596af 5320 bne opcode_C_9_cond ;@unconditional RET\r
cc68a136 5321 fetch 5\r
5322;@EXX\r
5323opcode_D_9:\r
5324 add r1,cpucontext,#z80bc2\r
5325 swp z80bc,z80bc,[r1]\r
5326 add r1,cpucontext,#z80de2\r
5327 swp z80de,z80de,[r1]\r
5328 add r1,cpucontext,#z80hl2\r
5329 swp z80hl,z80hl,[r1]\r
5330 fetch 4\r
5331;@JP C,$+3\r
5332opcode_D_A:\r
5333 tst z80f,#1<<CFlag\r
5334 bne opcode_C_3 ;@unconditional JP\r
5335 add z80pc,z80pc,#2\r
5336 fetch 10\r
5337;@IN A,(N)\r
5338opcode_D_B:\r
5339 ldrb r0,[z80pc],#1\r
5340 orr r0,r0,z80a,lsr#16\r
5341 opIN\r
5342 mov z80a,r0, lsl #24 ;@ r0 = data read\r
5343 fetch 11\r
5344;@CALL C,NN\r
5345opcode_D_C:\r
5346 tst z80f,#1<<CFlag\r
5347 bne opcode_C_D ;@unconditional CALL\r
5348 add z80pc,z80pc,#2\r
5349 fetch 10\r
5350\r
5351;@opcodes_DD\r
5352opcode_D_D:\r
5353 add z80xx,cpucontext,#z80ix\r
5354 b opcode_D_D_F_D\r
5355opcode_F_D:\r
5356 add z80xx,cpucontext,#z80iy\r
5357opcode_D_D_F_D:\r
5358 ldrb r0,[z80pc],#1\r
5359 ldr pc,[pc,r0, lsl #2]\r
5360opcodes_DD: .word 0x00000000\r
5361 .word opcode_0_0, opcode_0_1, opcode_0_2, opcode_0_3, opcode_0_4, opcode_0_5, opcode_0_6, opcode_0_7\r
5362 .word opcode_0_8, opcode_DD_09,opcode_0_A, opcode_0_B, opcode_0_C, opcode_0_D, opcode_0_E, opcode_0_F\r
5363 .word opcode_1_0, opcode_1_1, opcode_1_2, opcode_1_3, opcode_1_4, opcode_1_5, opcode_1_6, opcode_1_7\r
5364 .word opcode_1_8, opcode_DD_19,opcode_1_A, opcode_1_B, opcode_1_C, opcode_1_D, opcode_1_E, opcode_1_F\r
5365 .word opcode_2_0, opcode_DD_21,opcode_DD_22,opcode_DD_23,opcode_DD_24,opcode_DD_25,opcode_DD_26,opcode_2_7\r
5366 .word opcode_2_8, opcode_DD_29,opcode_DD_2A,opcode_DD_2B,opcode_DD_2C,opcode_DD_2D,opcode_DD_2E,opcode_2_F\r
5367 .word opcode_3_0, opcode_3_1, opcode_3_2, opcode_3_3, opcode_DD_34,opcode_DD_35,opcode_DD_36,opcode_3_7\r
5368 .word opcode_3_8, opcode_DD_39,opcode_3_A, opcode_3_B, opcode_3_C, opcode_3_D, opcode_3_E, opcode_3_F\r
5369 .word opcode_4_0, opcode_4_1, opcode_4_2, opcode_4_3, opcode_DD_44,opcode_DD_45,opcode_DD_46,opcode_4_7\r
5370 .word opcode_4_8, opcode_4_9, opcode_4_A, opcode_4_B, opcode_DD_4C,opcode_DD_4D,opcode_DD_4E,opcode_4_F\r
5371 .word opcode_5_0, opcode_5_1, opcode_5_2, opcode_5_3, opcode_DD_54,opcode_DD_55,opcode_DD_56,opcode_5_7\r
5372 .word opcode_5_8, opcode_5_9, opcode_5_A, opcode_5_B, opcode_DD_5C,opcode_DD_5D,opcode_DD_5E,opcode_5_F\r
5373 .word opcode_DD_60,opcode_DD_61,opcode_DD_62,opcode_DD_63,opcode_DD_64,opcode_DD_65,opcode_DD_66,opcode_DD_67\r
5374 .word opcode_DD_68,opcode_DD_69,opcode_DD_6A,opcode_DD_6B,opcode_DD_6C,opcode_DD_6D,opcode_DD_6E,opcode_DD_6F\r
5375 .word opcode_DD_70,opcode_DD_71,opcode_DD_72,opcode_DD_73,opcode_DD_74,opcode_DD_75,opcode_7_6, opcode_DD_77\r
5376 .word opcode_7_8, opcode_7_9, opcode_7_A, opcode_7_B, opcode_DD_7C,opcode_DD_7D,opcode_DD_7E,opcode_7_F\r
5377 .word opcode_8_0, opcode_8_1, opcode_8_2, opcode_8_3, opcode_DD_84,opcode_DD_85,opcode_DD_86,opcode_8_7\r
5378 .word opcode_8_8, opcode_8_9, opcode_8_A, opcode_8_B, opcode_DD_8C,opcode_DD_8D,opcode_DD_8E,opcode_8_F\r
5379 .word opcode_9_0, opcode_9_1, opcode_9_2, opcode_9_3, opcode_DD_94,opcode_DD_95,opcode_DD_96,opcode_9_7\r
5380 .word opcode_9_8, opcode_9_9, opcode_9_A, opcode_9_B, opcode_DD_9C,opcode_DD_9D,opcode_DD_9E,opcode_9_F\r
5381 .word opcode_A_0, opcode_A_1, opcode_A_2, opcode_A_3, opcode_DD_A4,opcode_DD_A5,opcode_DD_A6,opcode_A_7\r
5382 .word opcode_A_8, opcode_A_9, opcode_A_A, opcode_A_B, opcode_DD_AC,opcode_DD_AD,opcode_DD_AE,opcode_A_F\r
5383 .word opcode_B_0, opcode_B_1, opcode_B_2, opcode_B_3, opcode_DD_B4,opcode_DD_B5,opcode_DD_B6,opcode_B_7\r
5384 .word opcode_B_8, opcode_B_9, opcode_B_A, opcode_B_B, opcode_DD_BC,opcode_DD_BD,opcode_DD_BE,opcode_B_F\r
5385 .word opcode_C_0, opcode_C_1, opcode_C_2, opcode_C_3, opcode_C_4, opcode_C_5, opcode_C_6, opcode_C_7\r
5386 .word opcode_C_8, opcode_C_9, opcode_C_A, opcode_DD_CB,opcode_C_C, opcode_C_D, opcode_C_E, opcode_C_F\r
5387 .word opcode_D_0, opcode_D_1, opcode_D_2, opcode_D_3, opcode_D_4, opcode_D_5, opcode_D_6, opcode_D_7\r
5388 .word opcode_D_8, opcode_D_9, opcode_D_A, opcode_D_B, opcode_D_C, opcode_D_D, opcode_D_E, opcode_D_F\r
5389 .word opcode_E_0, opcode_DD_E1,opcode_E_2, opcode_DD_E3,opcode_E_4, opcode_DD_E5,opcode_E_6, opcode_E_7\r
5390 .word opcode_E_8, opcode_DD_E9,opcode_E_A, opcode_E_B, opcode_E_C, opcode_E_D, opcode_E_E, opcode_E_F\r
5391 .word opcode_F_0, opcode_F_1, opcode_F_2, opcode_F_3, opcode_F_4, opcode_F_5, opcode_F_6, opcode_F_7\r
5392 .word opcode_F_8, opcode_DD_F9,opcode_F_A, opcode_F_B, opcode_F_C, opcode_F_D, opcode_F_E, opcode_F_F\r
5393\r
5394;@SBC A,N\r
5395opcode_D_E:\r
5396 ldrb r0,[z80pc],#1\r
5397 opSBCb\r
5398 fetch 7\r
5399;@RST 18H\r
5400opcode_D_F:\r
5401 opRST 0x18\r
5402\r
5403;@RET PO\r
5404opcode_E_0:\r
5405 tst z80f,#1<<VFlag\r
28d596af 5406 beq opcode_C_9_cond ;@unconditional RET\r
cc68a136 5407 fetch 5\r
5408;@POP HL\r
5409opcode_E_1:\r
5410 opPOPreg z80hl\r
5411\r
5412;@JP PO,$+3\r
5413opcode_E_2:\r
5414 tst z80f,#1<<VFlag\r
5415 beq opcode_C_3 ;@unconditional JP\r
5416 add z80pc,z80pc,#2\r
5417 fetch 10\r
5418;@EX (SP),HL\r
5419opcode_E_3:\r
5420.if FAST_Z80SP\r
5421 ldrb r0,[z80sp]\r
5422 ldrb r1,[z80sp,#1]\r
5423 orr r0,r0,r1, lsl #8\r
5424 mov r1,z80hl, lsr #24\r
5425 strb r1,[z80sp,#1]\r
5426 mov r1,z80hl, lsr #16\r
5427 strb r1,[z80sp]\r
5428 mov z80hl,r0, lsl #16\r
5429.else\r
5430 mov r0,z80sp\r
5431 readmem16\r
5432 mov r1,r0\r
5433 mov r0,z80hl,lsr#16\r
5434 mov z80hl,r1,lsl#16\r
5435 mov r1,z80sp\r
5436 writemem16\r
5437.endif\r
5438 fetch 19\r
5439;@CALL PO,NN\r
5440opcode_E_4:\r
5441 tst z80f,#1<<VFlag\r
5442 beq opcode_C_D ;@unconditional CALL\r
5443 add z80pc,z80pc,#2\r
5444 fetch 10\r
5445;@PUSH HL\r
5446opcode_E_5:\r
5447 opPUSHreg z80hl\r
5448 fetch 11\r
5449;@AND N\r
5450opcode_E_6:\r
5451 ldrb r0,[z80pc],#1\r
5452 opANDb\r
5453 fetch 7\r
5454;@RST 20H\r
5455opcode_E_7:\r
5456 opRST 0x20\r
5457\r
5458;@RET PE\r
5459opcode_E_8:\r
5460 tst z80f,#1<<VFlag\r
28d596af 5461 bne opcode_C_9_cond ;@unconditional RET\r
cc68a136 5462 fetch 5\r
5463;@JP (HL)\r
5464opcode_E_9:\r
5465 mov r0,z80hl, lsr #16\r
5466 rebasepc\r
5467 fetch 4\r
5468;@JP PE,$+3\r
5469opcode_E_A:\r
5470 tst z80f,#1<<VFlag\r
5471 bne opcode_C_3 ;@unconditional JP\r
5472 add z80pc,z80pc,#2\r
5473 fetch 10\r
5474;@EX DE,HL\r
5475opcode_E_B:\r
5476 mov r1,z80de\r
5477 mov z80de,z80hl\r
5478 mov z80hl,r1\r
5479 fetch 4\r
5480;@CALL PE,NN\r
5481opcode_E_C:\r
5482 tst z80f,#1<<VFlag\r
5483 bne opcode_C_D ;@unconditional CALL\r
5484 add z80pc,z80pc,#2\r
5485 fetch 10\r
5486\r
5487;@This should be caught at start\r
5488opcode_E_D:\r
5489 ldrb r1,[z80pc],#1\r
5490 ldr pc,[pc,r1, lsl #2]\r
5491opcodes_ED: .word 0x00000000\r
5492 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5493 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5494 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5495 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5496 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5497 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5498 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5499 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5500 .word opcode_ED_40,opcode_ED_41,opcode_ED_42,opcode_ED_43,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_47\r
5501 .word opcode_ED_48,opcode_ED_49,opcode_ED_4A,opcode_ED_4B,opcode_ED_44,opcode_ED_4D,opcode_ED_46,opcode_ED_4F\r
5502 .word opcode_ED_50,opcode_ED_51,opcode_ED_52,opcode_ED_53,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_57\r
5503 .word opcode_ED_58,opcode_ED_59,opcode_ED_5A,opcode_ED_5B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_5F\r
5504 .word opcode_ED_60,opcode_ED_61,opcode_ED_62,opcode_ED_63,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_67\r
5505 .word opcode_ED_68,opcode_ED_69,opcode_ED_6A,opcode_ED_6B,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_6F\r
5506 .word opcode_ED_70,opcode_ED_71,opcode_ED_72,opcode_ED_73,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_NF\r
5507 .word opcode_ED_78,opcode_ED_79,opcode_ED_7A,opcode_ED_7B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_NF\r
5508 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5509 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5510 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5511 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5512 .word opcode_ED_A0,opcode_ED_A1,opcode_ED_A2,opcode_ED_A3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5513 .word opcode_ED_A8,opcode_ED_A9,opcode_ED_AA,opcode_ED_AB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5514 .word opcode_ED_B0,opcode_ED_B1,opcode_ED_B2,opcode_ED_B3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5515 .word opcode_ED_B8,opcode_ED_B9,opcode_ED_BA,opcode_ED_BB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5516 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5517 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5518 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5519 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5520 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5521 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5522 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5523 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5524\r
5525;@XOR N\r
5526opcode_E_E:\r
5527 ldrb r0,[z80pc],#1\r
5528 opXORb\r
5529 fetch 7\r
5530;@RST 28H\r
5531opcode_E_F:\r
5532 opRST 0x28\r
5533\r
5534;@RET P\r
5535opcode_F_0:\r
5536 tst z80f,#1<<SFlag\r
28d596af 5537 beq opcode_C_9_cond ;@unconditional RET\r
cc68a136 5538 fetch 5\r
5539;@POP AF\r
5540opcode_F_1:\r
5541.if FAST_Z80SP\r
5542 ldrb z80f,[z80sp],#1\r
5543 sub r0,opcodes,#0x200\r
5544 ldrb z80f,[r0,z80f]\r
5545 ldrb z80a,[z80sp],#1\r
5546 mov z80a,z80a, lsl #24\r
5547.else\r
5548 mov r0,z80sp\r
5549 readmem16\r
5550 add z80sp,z80sp,#2\r
5551 and z80a,r0,#0xFF00\r
5552 mov z80a,z80a,lsl#16\r
5553 and z80f,r0,#0xFF\r
5554 sub r0,opcodes,#0x200\r
5555 ldrb z80f,[r0,z80f]\r
5556.endif\r
5557 fetch 10\r
5558;@JP P,$+3\r
5559opcode_F_2:\r
5560 tst z80f,#1<<SFlag\r
5561 beq opcode_C_3 ;@unconditional JP\r
5562 add z80pc,z80pc,#2\r
5563 fetch 10\r
5564;@DI\r
5565opcode_F_3:\r
5566 ldrb r1,[cpucontext,#z80if]\r
5567 bic r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5568 strb r1,[cpucontext,#z80if]\r
5569 fetch 4\r
5570;@CALL P,NN\r
5571opcode_F_4:\r
5572 tst z80f,#1<<SFlag\r
5573 beq opcode_C_D ;@unconditional CALL\r
5574 add z80pc,z80pc,#2\r
5575 fetch 10\r
5576;@PUSH AF\r
5577opcode_F_5:\r
5578 sub r0,opcodes,#0x300\r
5579 ldrb r0,[r0,z80f]\r
5580 orr r2,r0,z80a,lsr#16\r
5581 opPUSHareg r2\r
5582 fetch 11\r
5583;@OR N\r
5584opcode_F_6:\r
5585 ldrb r0,[z80pc],#1\r
5586 opORb\r
5587 fetch 7\r
5588;@RST 30H\r
5589opcode_F_7:\r
5590 opRST 0x30\r
5591\r
5592;@RET M\r
5593opcode_F_8:\r
5594 tst z80f,#1<<SFlag\r
28d596af 5595 bne opcode_C_9_cond ;@unconditional RET\r
cc68a136 5596 fetch 5\r
5597;@LD SP,HL\r
5598opcode_F_9:\r
5599.if FAST_Z80SP\r
5600 mov r0,z80hl, lsr #16\r
5601 rebasesp\r
5602 mov z80sp,r0\r
5603.else\r
5604 mov z80sp,z80hl, lsr #16\r
5605.endif\r
28d596af 5606 fetch 6\r
cc68a136 5607;@JP M,$+3\r
5608opcode_F_A:\r
5609 tst z80f,#1<<SFlag\r
5610 bne opcode_C_3 ;@unconditional JP\r
5611 add z80pc,z80pc,#2\r
5612 fetch 10\r
5613MAIN_opcodes_POINTER: .word MAIN_opcodes\r
5614EI_DUMMY_opcodes_POINTER: .word EI_DUMMY_opcodes\r
5615;@EI\r
5616opcode_F_B:\r
5617 ldrb r1,[cpucontext,#z80if]\r
5618 tst r1,#Z80_IF1\r
5619 bne ei_return_exit\r
5620\r
5621 orr r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5622 strb r1,[cpucontext,#z80if]\r
5623\r
5624 mov r2,opcodes\r
5625 ldr opcodes,EI_DUMMY_opcodes_POINTER\r
5626 ldr pc,[r2,r0, lsl #2]\r
5627\r
5628ei_return:\r
5629 ;@point that program returns from EI to check interupts\r
5630 ;@an interupt can not be taken directly after a EI opcode\r
5631 ;@ reset z80pc and opcode pointer\r
5632 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
5633 sub z80pc,z80pc,#1\r
5634 ldr opcodes,MAIN_opcodes_POINTER\r
5635 ;@ check ints\r
5636 tst r0,#1\r
5637 movnes r0,r0,lsr #8\r
5638 blne DoInterrupt\r
5639 ;@ continue\r
5640ei_return_exit:\r
5641 fetch 4\r
5642\r
5643;@CALL M,NN\r
5644opcode_F_C:\r
5645 tst z80f,#1<<SFlag\r
5646 bne opcode_C_D ;@unconditional CALL\r
5647 add z80pc,z80pc,#2\r
5648 fetch 10\r
5649\r
5650;@SHOULD BE CAUGHT AT START - FD SECTION\r
5651\r
5652;@CP N\r
5653opcode_F_E:\r
5654 ldrb r0,[z80pc],#1\r
5655 opCPb\r
5656 fetch 7\r
5657;@RST 38H\r
5658opcode_F_F:\r
5659 opRST 0x38\r
5660\r
5661\r
5662;@##################################\r
5663;@##################################\r
5664;@### opcodes CB #########################\r
5665;@##################################\r
5666;@##################################\r
5667\r
5668\r
5669;@RLC B\r
5670opcode_CB_00:\r
5671 opRLCH z80bc\r
5672;@RLC C\r
5673opcode_CB_01:\r
5674 opRLCL z80bc\r
5675;@RLC D\r
5676opcode_CB_02:\r
5677 opRLCH z80de\r
5678;@RLC E\r
5679opcode_CB_03:\r
5680 opRLCL z80de\r
5681;@RLC H\r
5682opcode_CB_04:\r
5683 opRLCH z80hl\r
5684;@RLC L\r
5685opcode_CB_05:\r
5686 opRLCL z80hl\r
5687;@RLC (HL)\r
5688opcode_CB_06:\r
5689 readmem8HL\r
5690 opRLCb\r
5691 writemem8HL\r
5692 fetch 15\r
5693;@RLC A\r
5694opcode_CB_07:\r
5695 opRLCA\r
5696\r
5697;@RRC B\r
5698opcode_CB_08:\r
5699 opRRCH z80bc\r
5700;@RRC C\r
5701opcode_CB_09:\r
5702 opRRCL z80bc\r
5703;@RRC D\r
5704opcode_CB_0A:\r
5705 opRRCH z80de\r
5706;@RRC E\r
5707opcode_CB_0B:\r
5708 opRRCL z80de\r
5709;@RRC H\r
5710opcode_CB_0C:\r
5711 opRRCH z80hl\r
5712;@RRC L\r
5713opcode_CB_0D:\r
5714 opRRCL z80hl\r
5715;@RRC (HL)\r
5716opcode_CB_0E :\r
5717 readmem8HL\r
5718 opRRCb\r
5719 writemem8HL\r
5720 fetch 15\r
5721;@RRC A\r
5722opcode_CB_0F:\r
5723 opRRCA\r
5724\r
5725;@RL B\r
5726opcode_CB_10:\r
5727 opRLH z80bc\r
5728;@RL C\r
5729opcode_CB_11:\r
5730 opRLL z80bc\r
5731;@RL D\r
5732opcode_CB_12:\r
5733 opRLH z80de\r
5734;@RL E\r
5735opcode_CB_13:\r
5736 opRLL z80de\r
5737;@RL H\r
5738opcode_CB_14:\r
5739 opRLH z80hl\r
5740;@RL L\r
5741opcode_CB_15:\r
5742 opRLL z80hl\r
5743;@RL (HL)\r
5744opcode_CB_16:\r
5745 readmem8HL\r
5746 opRLb\r
5747 writemem8HL\r
5748 fetch 15\r
5749;@RL A\r
5750opcode_CB_17:\r
5751 opRLA\r
5752\r
5753;@RR B \r
5754opcode_CB_18:\r
5755 opRRH z80bc\r
5756;@RR C\r
5757opcode_CB_19:\r
5758 opRRL z80bc\r
5759;@RR D\r
5760opcode_CB_1A:\r
5761 opRRH z80de\r
5762;@RR E\r
5763opcode_CB_1B:\r
5764 opRRL z80de\r
5765;@RR H\r
5766opcode_CB_1C:\r
5767 opRRH z80hl\r
5768;@RR L\r
5769opcode_CB_1D:\r
5770 opRRL z80hl\r
5771;@RR (HL)\r
5772opcode_CB_1E:\r
5773 readmem8HL\r
5774 opRRb\r
5775 writemem8HL\r
5776 fetch 15\r
5777;@RR A\r
5778opcode_CB_1F:\r
5779 opRRA\r
5780\r
5781;@SLA B\r
5782opcode_CB_20:\r
5783 opSLAH z80bc\r
5784;@SLA C\r
5785opcode_CB_21:\r
5786 opSLAL z80bc\r
5787;@SLA D\r
5788opcode_CB_22:\r
5789 opSLAH z80de\r
5790;@SLA E\r
5791opcode_CB_23:\r
5792 opSLAL z80de\r
5793;@SLA H\r
5794opcode_CB_24:\r
5795 opSLAH z80hl\r
5796;@SLA L\r
5797opcode_CB_25:\r
5798 opSLAL z80hl\r
5799;@SLA (HL)\r
5800opcode_CB_26:\r
5801 readmem8HL\r
5802 opSLAb\r
5803 writemem8HL\r
5804 fetch 15\r
5805;@SLA A\r
5806opcode_CB_27:\r
5807 opSLAA\r
5808\r
5809;@SRA B\r
5810opcode_CB_28:\r
5811 opSRAH z80bc\r
5812;@SRA C\r
5813opcode_CB_29:\r
5814 opSRAL z80bc\r
5815;@SRA D\r
5816opcode_CB_2A:\r
5817 opSRAH z80de\r
5818;@SRA E\r
5819opcode_CB_2B:\r
5820 opSRAL z80de\r
5821;@SRA H\r
5822opcode_CB_2C:\r
5823 opSRAH z80hl\r
5824;@SRA L\r
5825opcode_CB_2D:\r
5826 opSRAL z80hl\r
5827;@SRA (HL)\r
5828opcode_CB_2E:\r
5829 readmem8HL\r
5830 opSRAb\r
5831 writemem8HL\r
5832 fetch 15\r
5833;@SRA A\r
5834opcode_CB_2F:\r
5835 opSRAA\r
5836\r
5837;@SLL B\r
5838opcode_CB_30:\r
5839 opSLLH z80bc\r
5840;@SLL C\r
5841opcode_CB_31:\r
5842 opSLLL z80bc\r
5843;@SLL D\r
5844opcode_CB_32:\r
5845 opSLLH z80de\r
5846;@SLL E\r
5847opcode_CB_33:\r
5848 opSLLL z80de\r
5849;@SLL H\r
5850opcode_CB_34:\r
5851 opSLLH z80hl\r
5852;@SLL L\r
5853opcode_CB_35:\r
5854 opSLLL z80hl\r
5855;@SLL (HL)\r
5856opcode_CB_36:\r
5857 readmem8HL\r
5858 opSLLb\r
5859 writemem8HL\r
5860 fetch 15\r
5861;@SLL A\r
5862opcode_CB_37:\r
5863 opSLLA\r
5864\r
5865;@SRL B\r
5866opcode_CB_38:\r
5867 opSRLH z80bc\r
5868;@SRL C\r
5869opcode_CB_39:\r
5870 opSRLL z80bc\r
5871;@SRL D\r
5872opcode_CB_3A:\r
5873 opSRLH z80de\r
5874;@SRL E\r
5875opcode_CB_3B:\r
5876 opSRLL z80de\r
5877;@SRL H\r
5878opcode_CB_3C:\r
5879 opSRLH z80hl\r
5880;@SRL L\r
5881opcode_CB_3D:\r
5882 opSRLL z80hl\r
5883;@SRL (HL)\r
5884opcode_CB_3E:\r
5885 readmem8HL\r
5886 opSRLb\r
5887 writemem8HL\r
5888 fetch 15\r
5889;@SRL A\r
5890opcode_CB_3F:\r
5891 opSRLA\r
5892\r
5893\r
5894;@BIT 0,B\r
5895opcode_CB_40:\r
5896 opBITH z80bc 0\r
5897;@BIT 0,C\r
5898opcode_CB_41:\r
5899 opBITL z80bc 0\r
5900;@BIT 0,D\r
5901opcode_CB_42:\r
5902 opBITH z80de 0\r
5903;@BIT 0,E\r
5904opcode_CB_43:\r
5905 opBITL z80de 0\r
5906;@BIT 0,H\r
5907opcode_CB_44:\r
5908 opBITH z80hl 0\r
5909;@BIT 0,L\r
5910opcode_CB_45:\r
5911 opBITL z80hl 0\r
5912;@BIT 0,(HL)\r
5913opcode_CB_46:\r
5914 readmem8HL\r
5915 opBITb 0\r
5916 fetch 12\r
5917;@BIT 0,A\r
5918opcode_CB_47:\r
5919 opBITH z80a 0\r
5920\r
5921;@BIT 1,B\r
5922opcode_CB_48:\r
5923 opBITH z80bc 1\r
5924;@BIT 1,C\r
5925opcode_CB_49:\r
5926 opBITL z80bc 1\r
5927;@BIT 1,D\r
5928opcode_CB_4A:\r
5929 opBITH z80de 1\r
5930;@BIT 1,E\r
5931opcode_CB_4B:\r
5932 opBITL z80de 1\r
5933;@BIT 1,H\r
5934opcode_CB_4C:\r
5935 opBITH z80hl 1\r
5936;@BIT 1,L\r
5937opcode_CB_4D:\r
5938 opBITL z80hl 1\r
5939;@BIT 1,(HL)\r
5940opcode_CB_4E:\r
5941 readmem8HL\r
5942 opBITb 1\r
5943 fetch 12\r
5944;@BIT 1,A\r
5945opcode_CB_4F:\r
5946 opBITH z80a 1\r
5947\r
5948;@BIT 2,B\r
5949opcode_CB_50:\r
5950 opBITH z80bc 2\r
5951;@BIT 2,C\r
5952opcode_CB_51:\r
5953 opBITL z80bc 2\r
5954;@BIT 2,D\r
5955opcode_CB_52:\r
5956 opBITH z80de 2\r
5957;@BIT 2,E\r
5958opcode_CB_53:\r
5959 opBITL z80de 2\r
5960;@BIT 2,H\r
5961opcode_CB_54:\r
5962 opBITH z80hl 2\r
5963;@BIT 2,L\r
5964opcode_CB_55:\r
5965 opBITL z80hl 2\r
5966;@BIT 2,(HL)\r
5967opcode_CB_56:\r
5968 readmem8HL\r
5969 opBITb 2\r
5970 fetch 12\r
5971;@BIT 2,A\r
5972opcode_CB_57:\r
5973 opBITH z80a 2\r
5974\r
5975;@BIT 3,B\r
5976opcode_CB_58:\r
5977 opBITH z80bc 3\r
5978;@BIT 3,C\r
5979opcode_CB_59:\r
5980 opBITL z80bc 3\r
5981;@BIT 3,D\r
5982opcode_CB_5A:\r
5983 opBITH z80de 3\r
5984;@BIT 3,E\r
5985opcode_CB_5B:\r
5986 opBITL z80de 3\r
5987;@BIT 3,H\r
5988opcode_CB_5C:\r
5989 opBITH z80hl 3\r
5990;@BIT 3,L\r
5991opcode_CB_5D:\r
5992 opBITL z80hl 3\r
5993;@BIT 3,(HL)\r
5994opcode_CB_5E:\r
5995 readmem8HL\r
5996 opBITb 3\r
5997 fetch 12\r
5998;@BIT 3,A\r
5999opcode_CB_5F:\r
6000 opBITH z80a 3\r
6001\r
6002;@BIT 4,B\r
6003opcode_CB_60:\r
6004 opBITH z80bc 4\r
6005;@BIT 4,C\r
6006opcode_CB_61:\r
6007 opBITL z80bc 4\r
6008;@BIT 4,D\r
6009opcode_CB_62:\r
6010 opBITH z80de 4\r
6011;@BIT 4,E\r
6012opcode_CB_63:\r
6013 opBITL z80de 4\r
6014;@BIT 4,H\r
6015opcode_CB_64:\r
6016 opBITH z80hl 4\r
6017;@BIT 4,L\r
6018opcode_CB_65:\r
6019 opBITL z80hl 4\r
6020;@BIT 4,(HL)\r
6021opcode_CB_66:\r
6022 readmem8HL\r
6023 opBITb 4\r
6024 fetch 12\r
6025;@BIT 4,A\r
6026opcode_CB_67:\r
6027 opBITH z80a 4\r
6028\r
6029;@BIT 5,B\r
6030opcode_CB_68:\r
6031 opBITH z80bc 5\r
6032;@BIT 5,C\r
6033opcode_CB_69:\r
6034 opBITL z80bc 5\r
6035;@BIT 5,D\r
6036opcode_CB_6A:\r
6037 opBITH z80de 5\r
6038;@BIT 5,E\r
6039opcode_CB_6B:\r
6040 opBITL z80de 5\r
6041;@BIT 5,H\r
6042opcode_CB_6C:\r
6043 opBITH z80hl 5\r
6044;@BIT 5,L\r
6045opcode_CB_6D:\r
6046 opBITL z80hl 5\r
6047;@BIT 5,(HL)\r
6048opcode_CB_6E:\r
6049 readmem8HL\r
6050 opBITb 5\r
6051 fetch 12\r
6052;@BIT 5,A\r
6053opcode_CB_6F:\r
6054 opBITH z80a 5\r
6055\r
6056;@BIT 6,B\r
6057opcode_CB_70:\r
6058 opBITH z80bc 6\r
6059;@BIT 6,C\r
6060opcode_CB_71:\r
6061 opBITL z80bc 6\r
6062;@BIT 6,D\r
6063opcode_CB_72:\r
6064 opBITH z80de 6\r
6065;@BIT 6,E\r
6066opcode_CB_73:\r
6067 opBITL z80de 6\r
6068;@BIT 6,H\r
6069opcode_CB_74:\r
6070 opBITH z80hl 6\r
6071;@BIT 6,L\r
6072opcode_CB_75:\r
6073 opBITL z80hl 6\r
6074;@BIT 6,(HL)\r
6075opcode_CB_76:\r
6076 readmem8HL\r
6077 opBITb 6\r
6078 fetch 12\r
6079;@BIT 6,A\r
6080opcode_CB_77:\r
6081 opBITH z80a 6\r
6082\r
6083;@BIT 7,B\r
6084opcode_CB_78:\r
6085 opBIT7H z80bc\r
6086;@BIT 7,C\r
6087opcode_CB_79:\r
6088 opBIT7L z80bc\r
6089;@BIT 7,D\r
6090opcode_CB_7A:\r
6091 opBIT7H z80de\r
6092;@BIT 7,E\r
6093opcode_CB_7B:\r
6094 opBIT7L z80de\r
6095;@BIT 7,H\r
6096opcode_CB_7C:\r
6097 opBIT7H z80hl\r
6098;@BIT 7,L\r
6099opcode_CB_7D:\r
6100 opBIT7L z80hl\r
6101;@BIT 7,(HL)\r
6102opcode_CB_7E:\r
6103 readmem8HL\r
6104 opBIT7b\r
6105 fetch 12\r
6106;@BIT 7,A\r
6107opcode_CB_7F:\r
6108 opBIT7H z80a\r
6109\r
6110;@RES 0,B\r
6111opcode_CB_80:\r
6112 bic z80bc,z80bc,#1<<24\r
6113 fetch 8\r
6114;@RES 0,C\r
6115opcode_CB_81:\r
6116 bic z80bc,z80bc,#1<<16\r
6117 fetch 8\r
6118;@RES 0,D\r
6119opcode_CB_82:\r
6120 bic z80de,z80de,#1<<24\r
6121 fetch 8\r
6122;@RES 0,E\r
6123opcode_CB_83:\r
6124 bic z80de,z80de,#1<<16\r
6125 fetch 8\r
6126;@RES 0,H\r
6127opcode_CB_84:\r
6128 bic z80hl,z80hl,#1<<24\r
6129 fetch 8\r
6130;@RES 0,L\r
6131opcode_CB_85:\r
6132 bic z80hl,z80hl,#1<<16\r
6133 fetch 8\r
6134;@RES 0,(HL)\r
6135opcode_CB_86:\r
6136 opRESmemHL 0\r
6137;@RES 0,A\r
6138opcode_CB_87:\r
6139 bic z80a,z80a,#1<<24\r
6140 fetch 8\r
6141\r
6142;@RES 1,B\r
6143opcode_CB_88:\r
6144 bic z80bc,z80bc,#1<<25\r
6145 fetch 8\r
6146;@RES 1,C\r
6147opcode_CB_89:\r
6148 bic z80bc,z80bc,#1<<17\r
6149 fetch 8\r
6150;@RES 1,D\r
6151opcode_CB_8A:\r
6152 bic z80de,z80de,#1<<25\r
6153 fetch 8\r
6154;@RES 1,E\r
6155opcode_CB_8B:\r
6156 bic z80de,z80de,#1<<17\r
6157 fetch 8\r
6158;@RES 1,H\r
6159opcode_CB_8C:\r
6160 bic z80hl,z80hl,#1<<25\r
6161 fetch 8\r
6162;@RES 1,L\r
6163opcode_CB_8D:\r
6164 bic z80hl,z80hl,#1<<17\r
6165 fetch 8\r
6166;@RES 1,(HL)\r
6167opcode_CB_8E:\r
6168 opRESmemHL 1\r
6169;@RES 1,A\r
6170opcode_CB_8F:\r
6171 bic z80a,z80a,#1<<25\r
6172 fetch 8\r
6173\r
6174;@RES 2,B\r
6175opcode_CB_90:\r
6176 bic z80bc,z80bc,#1<<26\r
6177 fetch 8\r
6178;@RES 2,C\r
6179opcode_CB_91:\r
6180 bic z80bc,z80bc,#1<<18\r
6181 fetch 8\r
6182;@RES 2,D\r
6183opcode_CB_92:\r
6184 bic z80de,z80de,#1<<26\r
6185 fetch 8\r
6186;@RES 2,E\r
6187opcode_CB_93:\r
6188 bic z80de,z80de,#1<<18\r
6189 fetch 8\r
6190;@RES 2,H\r
6191opcode_CB_94:\r
6192 bic z80hl,z80hl,#1<<26\r
6193 fetch 8\r
6194;@RES 2,L\r
6195opcode_CB_95:\r
6196 bic z80hl,z80hl,#1<<18\r
6197 fetch 8\r
6198;@RES 2,(HL)\r
6199opcode_CB_96:\r
6200 opRESmemHL 2\r
6201;@RES 2,A\r
6202opcode_CB_97:\r
6203 bic z80a,z80a,#1<<26\r
6204 fetch 8\r
6205\r
6206;@RES 3,B\r
6207opcode_CB_98:\r
6208 bic z80bc,z80bc,#1<<27\r
6209 fetch 8\r
6210;@RES 3,C\r
6211opcode_CB_99:\r
6212 bic z80bc,z80bc,#1<<19\r
6213 fetch 8\r
6214;@RES 3,D\r
6215opcode_CB_9A:\r
6216 bic z80de,z80de,#1<<27\r
6217 fetch 8\r
6218;@RES 3,E\r
6219opcode_CB_9B:\r
6220 bic z80de,z80de,#1<<19\r
6221 fetch 8\r
6222;@RES 3,H\r
6223opcode_CB_9C:\r
6224 bic z80hl,z80hl,#1<<27\r
6225 fetch 8\r
6226;@RES 3,L\r
6227opcode_CB_9D:\r
6228 bic z80hl,z80hl,#1<<19\r
6229 fetch 8\r
6230;@RES 3,(HL)\r
6231opcode_CB_9E:\r
6232 opRESmemHL 3\r
6233;@RES 3,A\r
6234opcode_CB_9F:\r
6235 bic z80a,z80a,#1<<27\r
6236 fetch 8\r
6237\r
6238;@RES 4,B\r
6239opcode_CB_A0:\r
6240 bic z80bc,z80bc,#1<<28\r
6241 fetch 8\r
6242;@RES 4,C\r
6243opcode_CB_A1:\r
6244 bic z80bc,z80bc,#1<<20\r
6245 fetch 8\r
6246;@RES 4,D\r
6247opcode_CB_A2:\r
6248 bic z80de,z80de,#1<<28\r
6249 fetch 8\r
6250;@RES 4,E\r
6251opcode_CB_A3:\r
6252 bic z80de,z80de,#1<<20\r
6253 fetch 8\r
6254;@RES 4,H\r
6255opcode_CB_A4:\r
6256 bic z80hl,z80hl,#1<<28\r
6257 fetch 8\r
6258;@RES 4,L\r
6259opcode_CB_A5:\r
6260 bic z80hl,z80hl,#1<<20\r
6261 fetch 8\r
6262;@RES 4,(HL)\r
6263opcode_CB_A6:\r
6264 opRESmemHL 4\r
6265;@RES 4,A\r
6266opcode_CB_A7:\r
6267 bic z80a,z80a,#1<<28\r
6268 fetch 8\r
6269\r
6270;@RES 5,B\r
6271opcode_CB_A8:\r
6272 bic z80bc,z80bc,#1<<29\r
6273 fetch 8\r
6274;@RES 5,C\r
6275opcode_CB_A9:\r
6276 bic z80bc,z80bc,#1<<21\r
6277 fetch 8\r
6278;@RES 5,D\r
6279opcode_CB_AA:\r
6280 bic z80de,z80de,#1<<29\r
6281 fetch 8\r
6282;@RES 5,E\r
6283opcode_CB_AB:\r
6284 bic z80de,z80de,#1<<21\r
6285 fetch 8\r
6286;@RES 5,H\r
6287opcode_CB_AC:\r
6288 bic z80hl,z80hl,#1<<29\r
6289 fetch 8\r
6290;@RES 5,L\r
6291opcode_CB_AD:\r
6292 bic z80hl,z80hl,#1<<21\r
6293 fetch 8\r
6294;@RES 5,(HL)\r
6295opcode_CB_AE:\r
6296 opRESmemHL 5\r
6297;@RES 5,A\r
6298opcode_CB_AF:\r
6299 bic z80a,z80a,#1<<29\r
6300 fetch 8\r
6301\r
6302;@RES 6,B\r
6303opcode_CB_B0:\r
6304 bic z80bc,z80bc,#1<<30\r
6305 fetch 8\r
6306;@RES 6,C\r
6307opcode_CB_B1:\r
6308 bic z80bc,z80bc,#1<<22\r
6309 fetch 8\r
6310;@RES 6,D\r
6311opcode_CB_B2:\r
6312 bic z80de,z80de,#1<<30\r
6313 fetch 8\r
6314;@RES 6,E\r
6315opcode_CB_B3:\r
6316 bic z80de,z80de,#1<<22\r
6317 fetch 8\r
6318;@RES 6,H\r
6319opcode_CB_B4:\r
6320 bic z80hl,z80hl,#1<<30\r
6321 fetch 8\r
6322;@RES 6,L\r
6323opcode_CB_B5:\r
6324 bic z80hl,z80hl,#1<<22\r
6325 fetch 8\r
6326;@RES 6,(HL)\r
6327opcode_CB_B6:\r
6328 opRESmemHL 6\r
6329;@RES 6,A\r
6330opcode_CB_B7:\r
6331 bic z80a,z80a,#1<<30\r
6332 fetch 8\r
6333\r
6334;@RES 7,B\r
6335opcode_CB_B8:\r
6336 bic z80bc,z80bc,#1<<31\r
6337 fetch 8\r
6338;@RES 7,C\r
6339opcode_CB_B9:\r
6340 bic z80bc,z80bc,#1<<23\r
6341 fetch 8\r
6342;@RES 7,D\r
6343opcode_CB_BA:\r
6344 bic z80de,z80de,#1<<31\r
6345 fetch 8\r
6346;@RES 7,E\r
6347opcode_CB_BB:\r
6348 bic z80de,z80de,#1<<23\r
6349 fetch 8\r
6350;@RES 7,H\r
6351opcode_CB_BC:\r
6352 bic z80hl,z80hl,#1<<31\r
6353 fetch 8\r
6354;@RES 7,L\r
6355opcode_CB_BD:\r
6356 bic z80hl,z80hl,#1<<23\r
6357 fetch 8\r
6358;@RES 7,(HL)\r
6359opcode_CB_BE:\r
6360 opRESmemHL 7\r
6361;@RES 7,A\r
6362opcode_CB_BF:\r
6363 bic z80a,z80a,#1<<31\r
6364 fetch 8\r
6365\r
6366;@SET 0,B\r
6367opcode_CB_C0:\r
6368 orr z80bc,z80bc,#1<<24\r
6369 fetch 8\r
6370;@SET 0,C\r
6371opcode_CB_C1:\r
6372 orr z80bc,z80bc,#1<<16\r
6373 fetch 8\r
6374;@SET 0,D\r
6375opcode_CB_C2:\r
6376 orr z80de,z80de,#1<<24\r
6377 fetch 8\r
6378;@SET 0,E\r
6379opcode_CB_C3:\r
6380 orr z80de,z80de,#1<<16\r
6381 fetch 8\r
6382;@SET 0,H\r
6383opcode_CB_C4:\r
6384 orr z80hl,z80hl,#1<<24\r
6385 fetch 8\r
6386;@SET 0,L\r
6387opcode_CB_C5:\r
6388 orr z80hl,z80hl,#1<<16\r
6389 fetch 8\r
6390;@SET 0,(HL)\r
6391opcode_CB_C6:\r
6392 opSETmemHL 0\r
6393;@SET 0,A\r
6394opcode_CB_C7:\r
6395 orr z80a,z80a,#1<<24\r
6396 fetch 8\r
6397\r
6398;@SET 1,B\r
6399opcode_CB_C8:\r
6400 orr z80bc,z80bc,#1<<25\r
6401 fetch 8\r
6402;@SET 1,C\r
6403opcode_CB_C9:\r
6404 orr z80bc,z80bc,#1<<17\r
6405 fetch 8\r
6406;@SET 1,D\r
6407opcode_CB_CA:\r
6408 orr z80de,z80de,#1<<25\r
6409 fetch 8\r
6410;@SET 1,E\r
6411opcode_CB_CB:\r
6412 orr z80de,z80de,#1<<17\r
6413 fetch 8\r
6414;@SET 1,H\r
6415opcode_CB_CC:\r
6416 orr z80hl,z80hl,#1<<25\r
6417 fetch 8\r
6418;@SET 1,L\r
6419opcode_CB_CD:\r
6420 orr z80hl,z80hl,#1<<17\r
6421 fetch 8\r
6422;@SET 1,(HL)\r
6423opcode_CB_CE:\r
6424 opSETmemHL 1\r
6425;@SET 1,A\r
6426opcode_CB_CF:\r
6427 orr z80a,z80a,#1<<25\r
6428 fetch 8\r
6429\r
6430;@SET 2,B\r
6431opcode_CB_D0:\r
6432 orr z80bc,z80bc,#1<<26\r
6433 fetch 8\r
6434;@SET 2,C\r
6435opcode_CB_D1:\r
6436 orr z80bc,z80bc,#1<<18\r
6437 fetch 8\r
6438;@SET 2,D\r
6439opcode_CB_D2:\r
6440 orr z80de,z80de,#1<<26\r
6441 fetch 8\r
6442;@SET 2,E\r
6443opcode_CB_D3:\r
6444 orr z80de,z80de,#1<<18\r
6445 fetch 8\r
6446;@SET 2,H\r
6447opcode_CB_D4:\r
6448 orr z80hl,z80hl,#1<<26\r
6449 fetch 8\r
6450;@SET 2,L\r
6451opcode_CB_D5:\r
6452 orr z80hl,z80hl,#1<<18\r
6453 fetch 8\r
6454;@SET 2,(HL)\r
6455opcode_CB_D6:\r
6456 opSETmemHL 2\r
6457;@SET 2,A\r
6458opcode_CB_D7:\r
6459 orr z80a,z80a,#1<<26\r
6460 fetch 8\r
6461\r
6462;@SET 3,B\r
6463opcode_CB_D8:\r
6464 orr z80bc,z80bc,#1<<27\r
6465 fetch 8\r
6466;@SET 3,C\r
6467opcode_CB_D9:\r
6468 orr z80bc,z80bc,#1<<19\r
6469 fetch 8\r
6470;@SET 3,D\r
6471opcode_CB_DA:\r
6472 orr z80de,z80de,#1<<27\r
6473 fetch 8\r
6474;@SET 3,E\r
6475opcode_CB_DB:\r
6476 orr z80de,z80de,#1<<19\r
6477 fetch 8\r
6478;@SET 3,H\r
6479opcode_CB_DC:\r
6480 orr z80hl,z80hl,#1<<27\r
6481 fetch 8\r
6482;@SET 3,L\r
6483opcode_CB_DD:\r
6484 orr z80hl,z80hl,#1<<19\r
6485 fetch 8\r
6486;@SET 3,(HL)\r
6487opcode_CB_DE:\r
6488 opSETmemHL 3\r
6489;@SET 3,A\r
6490opcode_CB_DF:\r
6491 orr z80a,z80a,#1<<27\r
6492 fetch 8\r
6493\r
6494;@SET 4,B\r
6495opcode_CB_E0:\r
6496 orr z80bc,z80bc,#1<<28\r
6497 fetch 8\r
6498;@SET 4,C\r
6499opcode_CB_E1:\r
6500 orr z80bc,z80bc,#1<<20\r
6501 fetch 8\r
6502;@SET 4,D\r
6503opcode_CB_E2:\r
6504 orr z80de,z80de,#1<<28\r
6505 fetch 8\r
6506;@SET 4,E\r
6507opcode_CB_E3:\r
6508 orr z80de,z80de,#1<<20\r
6509 fetch 8\r
6510;@SET 4,H\r
6511opcode_CB_E4:\r
6512 orr z80hl,z80hl,#1<<28\r
6513 fetch 8\r
6514;@SET 4,L\r
6515opcode_CB_E5:\r
6516 orr z80hl,z80hl,#1<<20\r
6517 fetch 8\r
6518;@SET 4,(HL)\r
6519opcode_CB_E6:\r
6520 opSETmemHL 4\r
6521;@SET 4,A\r
6522opcode_CB_E7:\r
6523 orr z80a,z80a,#1<<28\r
6524 fetch 8\r
6525\r
6526;@SET 5,B\r
6527opcode_CB_E8:\r
6528 orr z80bc,z80bc,#1<<29\r
6529 fetch 8\r
6530;@SET 5,C\r
6531opcode_CB_E9:\r
6532 orr z80bc,z80bc,#1<<21\r
6533 fetch 8\r
6534;@SET 5,D\r
6535opcode_CB_EA:\r
6536 orr z80de,z80de,#1<<29\r
6537 fetch 8\r
6538;@SET 5,E\r
6539opcode_CB_EB:\r
6540 orr z80de,z80de,#1<<21\r
6541 fetch 8\r
6542;@SET 5,H\r
6543opcode_CB_EC:\r
6544 orr z80hl,z80hl,#1<<29\r
6545 fetch 8\r
6546;@SET 5,L\r
6547opcode_CB_ED:\r
6548 orr z80hl,z80hl,#1<<21\r
6549 fetch 8\r
6550;@SET 5,(HL)\r
6551opcode_CB_EE:\r
6552 opSETmemHL 5\r
6553;@SET 5,A\r
6554opcode_CB_EF:\r
6555 orr z80a,z80a,#1<<29\r
6556 fetch 8\r
6557\r
6558;@SET 6,B\r
6559opcode_CB_F0:\r
6560 orr z80bc,z80bc,#1<<30\r
6561 fetch 8\r
6562;@SET 6,C\r
6563opcode_CB_F1:\r
6564 orr z80bc,z80bc,#1<<22\r
6565 fetch 8\r
6566;@SET 6,D\r
6567opcode_CB_F2:\r
6568 orr z80de,z80de,#1<<30\r
6569 fetch 8\r
6570;@SET 6,E\r
6571opcode_CB_F3:\r
6572 orr z80de,z80de,#1<<22\r
6573 fetch 8\r
6574;@SET 6,H\r
6575opcode_CB_F4:\r
6576 orr z80hl,z80hl,#1<<30\r
6577 fetch 8\r
6578;@SET 6,L\r
6579opcode_CB_F5:\r
6580 orr z80hl,z80hl,#1<<22\r
6581 fetch 8\r
6582;@SET 6,(HL)\r
6583opcode_CB_F6:\r
6584 opSETmemHL 6\r
6585;@SET 6,A\r
6586opcode_CB_F7:\r
6587 orr z80a,z80a,#1<<30\r
6588 fetch 8\r
6589\r
6590;@SET 7,B\r
6591opcode_CB_F8:\r
6592 orr z80bc,z80bc,#1<<31\r
6593 fetch 8\r
6594;@SET 7,C\r
6595opcode_CB_F9:\r
6596 orr z80bc,z80bc,#1<<23\r
6597 fetch 8\r
6598;@SET 7,D\r
6599opcode_CB_FA:\r
6600 orr z80de,z80de,#1<<31\r
6601 fetch 8\r
6602;@SET 7,E\r
6603opcode_CB_FB:\r
6604 orr z80de,z80de,#1<<23\r
6605 fetch 8\r
6606;@SET 7,H\r
6607opcode_CB_FC:\r
6608 orr z80hl,z80hl,#1<<31\r
6609 fetch 8\r
6610;@SET 7,L\r
6611opcode_CB_FD:\r
6612 orr z80hl,z80hl,#1<<23\r
6613 fetch 8\r
6614;@SET 7,(HL)\r
6615opcode_CB_FE:\r
6616 opSETmemHL 7\r
6617;@SET 7,A\r
6618opcode_CB_FF:\r
6619 orr z80a,z80a,#1<<31\r
6620 fetch 8\r
6621\r
6622\r
6623\r
6624;@##################################\r
6625;@##################################\r
6626;@### opcodes DD #########################\r
6627;@##################################\r
6628;@##################################\r
6629;@Because the DD opcodes are not a complete range from 00-FF I have\r
6630;@created this sub routine that will catch any undocumented ops\r
6631;@halt the emulator and mov the current instruction to r0\r
6632;@at a later stage I may change to display a text message on the screen\r
6633opcode_DD_NF:\r
6634 eatcycles 4\r
6635 ldr pc,[opcodes,r0, lsl #2]\r
6636;@ mov r2,#0x10*4\r
6637;@ cmp r2,z80xx\r
6638;@ bne opcode_FD_NF\r
6639;@ mov r0,#0xDD00\r
6640;@ orr r0,r0,r1\r
6641;@ b end_loop\r
6642;@opcode_FD_NF:\r
6643;@ mov r0,#0xFD00\r
6644;@ orr r0,r0,r1\r
6645;@ b end_loop\r
f0243975 6646\r
cc68a136 6647opcode_DD_NF2:\r
28d596af 6648 fetch 23\r
f0243975 6649;@ notaz: we don't want to deadlock here\r
6650;@ mov r0,#0xDD0000\r
6651;@ orr r0,r0,#0xCB00\r
6652;@ orr r0,r0,r1\r
6653;@ b end_loop\r
cc68a136 6654\r
6655;@ADD IX,BC\r
6656opcode_DD_09:\r
6657 ldr r0,[z80xx]\r
6658 opADD16 r0 z80bc\r
6659 str r0,[z80xx]\r
6660 fetch 15\r
6661;@ADD IX,DE\r
6662opcode_DD_19:\r
6663 ldr r0,[z80xx]\r
6664 opADD16 r0 z80de\r
6665 str r0,[z80xx]\r
6666 fetch 15\r
6667;@LD IX,NN\r
6668opcode_DD_21:\r
6669 ldrb r0,[z80pc],#1\r
6670 ldrb r1,[z80pc],#1\r
6671 orr r0,r0,r1, lsl #8\r
6672 strh r0,[z80xx,#2]\r
6673 fetch 14\r
6674;@LD (NN),IX\r
6675opcode_DD_22:\r
6676 ldrb r0,[z80pc],#1\r
6677 ldrb r1,[z80pc],#1\r
6678 orr r1,r0,r1, lsl #8\r
6679 ldrh r0,[z80xx,#2]\r
6680 writemem16\r
6681 fetch 20\r
6682;@INC IX\r
6683opcode_DD_23:\r
6684 ldr r0,[z80xx]\r
6685 add r0,r0,#1<<16\r
6686 str r0,[z80xx]\r
6687 fetch 10\r
6688;@INC I (IX)\r
6689opcode_DD_24:\r
6690 ldr r0,[z80xx]\r
6691 opINC8H r0\r
6692 str r0,[z80xx]\r
6693 fetch 8\r
6694;@DEC I (IX)\r
6695opcode_DD_25:\r
6696 ldr r0,[z80xx]\r
6697 opDEC8H r0\r
6698 str r0,[z80xx]\r
6699 fetch 8\r
6700;@LD I,N (IX)\r
6701opcode_DD_26:\r
6702 ldrb r0,[z80pc],#1\r
6703 strb r0,[z80xx,#3]\r
6704 fetch 11\r
6705;@ADD IX,IX\r
6706opcode_DD_29:\r
6707 ldr r0,[z80xx]\r
6708 opADD16_2 r0\r
6709 str r0,[z80xx]\r
6710 fetch 15\r
6711;@LD IX,(NN)\r
6712opcode_DD_2A:\r
6713 ldrb r0,[z80pc],#1\r
6714 ldrb r1,[z80pc],#1\r
6715 orr r0,r0,r1, lsl #8\r
6716 stmfd sp!,{z80xx}\r
6717 readmem16\r
6718 ldmfd sp!,{z80xx}\r
6719 strh r0,[z80xx,#2]\r
6720 fetch 20\r
6721;@DEC IX\r
6722opcode_DD_2B:\r
6723 ldr r0,[z80xx]\r
6724 sub r0,r0,#1<<16\r
6725 str r0,[z80xx]\r
6726 fetch 10\r
6727;@INC X (IX)\r
6728opcode_DD_2C:\r
6729 ldr r0,[z80xx]\r
6730 opINC8L r0\r
6731 str r0,[z80xx]\r
6732 fetch 8\r
6733;@DEC X (IX)\r
6734opcode_DD_2D:\r
6735 ldr r0,[z80xx]\r
6736 opDEC8L r0\r
6737 str r0,[z80xx]\r
6738 fetch 8\r
6739;@LD X,N (IX)\r
6740opcode_DD_2E:\r
6741 ldrb r0,[z80pc],#1\r
6742 strb r0,[z80xx,#2]\r
6743 fetch 11\r
6744;@INC (IX+N)\r
6745opcode_DD_34:\r
6746 ldrsb r0,[z80pc],#1\r
6747 ldr r1,[z80xx]\r
6748 add r0,r0,r1, lsr #16\r
6749 stmfd sp!,{r0} ;@ save addr\r
6750 readmem8\r
6751 opINC8b\r
6752 ldmfd sp!,{r1} ;@ restore addr into r1\r
6753 writemem8\r
6754 fetch 23\r
6755;@DEC (IX+N)\r
6756opcode_DD_35:\r
6757 ldrsb r0,[z80pc],#1\r
6758 ldr r1,[z80xx]\r
6759 add r0,r0,r1, lsr #16\r
6760 stmfd sp!,{r0} ;@ save addr\r
6761 readmem8\r
6762 opDEC8b\r
6763 ldmfd sp!,{r1} ;@ restore addr into r1\r
6764 writemem8\r
6765 fetch 23\r
6766;@LD (IX+N),N\r
6767opcode_DD_36:\r
6768 ldrsb r2,[z80pc],#1\r
6769 ldrb r0,[z80pc],#1\r
6770 ldr r1,[z80xx]\r
6771 add r1,r2,r1, lsr #16\r
6772 writemem8\r
6773 fetch 19\r
6774;@ADD IX,SP\r
6775opcode_DD_39:\r
6776 ldr r0,[z80xx]\r
6777.if FAST_Z80SP\r
6778 ldr r2,[cpucontext,#z80sp_base]\r
6779 sub r2,z80sp,r2\r
6780 opADD16s r0 r2 16\r
6781.else\r
6782 opADD16s r0 z80sp 16\r
6783.endif\r
6784 str r0,[z80xx]\r
6785 fetch 15\r
6786;@LD B,I ( IX )\r
6787opcode_DD_44:\r
6788 ldrb r0,[z80xx,#3]\r
6789 and z80bc,z80bc,#0xFF<<16\r
6790 orr z80bc,z80bc,r0, lsl #24\r
6791 fetch 8\r
6792;@LD B,X ( IX )\r
6793opcode_DD_45:\r
6794 ldrb r0,[z80xx,#2]\r
6795 and z80bc,z80bc,#0xFF<<16\r
6796 orr z80bc,z80bc,r0, lsl #24\r
6797 fetch 8\r
6798;@LD B,(IX,N)\r
6799opcode_DD_46:\r
6800 ldrsb r0,[z80pc],#1\r
6801 ldr r1,[z80xx]\r
6802 add r0,r0,r1, lsr #16\r
6803 readmem8\r
6804 and z80bc,z80bc,#0xFF<<16\r
6805 orr z80bc,z80bc,r0, lsl #24\r
6806 fetch 19\r
6807;@LD C,I (IX)\r
6808opcode_DD_4C:\r
6809 ldrb r0,[z80xx,#3]\r
6810 and z80bc,z80bc,#0xFF<<24\r
6811 orr z80bc,z80bc,r0, lsl #16\r
6812 fetch 8\r
6813;@LD C,X (IX)\r
6814opcode_DD_4D:\r
6815 ldrb r0,[z80xx,#2]\r
6816 and z80bc,z80bc,#0xFF<<24\r
6817 orr z80bc,z80bc,r0, lsl #16\r
6818 fetch 8\r
6819;@LD C,(IX,N)\r
6820opcode_DD_4E:\r
6821 ldrsb r0,[z80pc],#1\r
6822 ldr r1,[z80xx]\r
6823 add r0,r0,r1, lsr #16\r
6824 readmem8\r
6825 and z80bc,z80bc,#0xFF<<24\r
6826 orr z80bc,z80bc,r0, lsl #16\r
6827 fetch 19\r
6828\r
6829;@LD D,I (IX)\r
6830opcode_DD_54:\r
6831 ldrb r0,[z80xx,#3]\r
6832 and z80de,z80de,#0xFF<<16\r
6833 orr z80de,z80de,r0, lsl #24\r
6834 fetch 8\r
6835;@LD D,X (IX)\r
6836opcode_DD_55:\r
6837 ldrb r0,[z80xx,#2]\r
6838 and z80de,z80de,#0xFF<<16\r
6839 orr z80de,z80de,r0, lsl #24\r
6840 fetch 8\r
6841;@LD D,(IX,N)\r
6842opcode_DD_56:\r
6843 ldrsb r0,[z80pc],#1\r
6844 ldr r1,[z80xx]\r
6845 add r0,r0,r1, lsr #16\r
6846 readmem8\r
6847 and z80de,z80de,#0xFF<<16\r
6848 orr z80de,z80de,r0, lsl #24\r
6849 fetch 19\r
6850;@LD E,I (IX)\r
6851opcode_DD_5C:\r
6852 ldrb r0,[z80xx,#3]\r
6853 and z80de,z80de,#0xFF<<24\r
6854 orr z80de,z80de,r0, lsl #16\r
6855 fetch 8\r
6856;@LD E,X (IX)\r
6857opcode_DD_5D:\r
6858 ldrb r0,[z80xx,#2]\r
6859 and z80de,z80de,#0xFF<<24\r
6860 orr z80de,z80de,r0, lsl #16\r
6861 fetch 8\r
6862;@LD E,(IX,N)\r
6863opcode_DD_5E:\r
6864 ldrsb r0,[z80pc],#1\r
6865 ldr r1,[z80xx]\r
6866 add r0,r0,r1, lsr #16\r
6867 readmem8\r
6868 and z80de,z80de,#0xFF<<24\r
6869 orr z80de,z80de,r0, lsl #16\r
6870 fetch 19\r
6871;@LD I,B (IX)\r
6872opcode_DD_60:\r
6873 mov r0,z80bc,lsr#24\r
6874 strb r0,[z80xx,#3]\r
6875 fetch 8\r
6876;@LD I,C (IX)\r
6877opcode_DD_61:\r
6878 mov r0,z80bc,lsr#16\r
6879 strb r0,[z80xx,#3]\r
6880 fetch 8\r
6881;@LD I,D (IX)\r
6882opcode_DD_62:\r
6883 mov r0,z80de,lsr#24\r
6884 strb r0,[z80xx,#3]\r
6885 fetch 8\r
6886;@LD I,E (IX)\r
6887opcode_DD_63:\r
6888 mov r0,z80de,lsr#16\r
6889 strb r0,[z80xx,#3]\r
6890 fetch 8\r
6891;@LD I,I (IX)\r
6892opcode_DD_64:\r
6893 fetch 8\r
6894;@LD I,X (IX)\r
6895opcode_DD_65:\r
6896 ldrb r0,[z80xx,#2]\r
6897 strb r0,[z80xx,#3]\r
6898 fetch 8\r
6899;@LD H,(IX,N)\r
6900opcode_DD_66:\r
6901 ldrsb r0,[z80pc],#1\r
6902 ldr r1,[z80xx]\r
6903 add r0,r0,r1, lsr #16\r
6904 readmem8\r
6905 and z80hl,z80hl,#0xFF<<16\r
6906 orr z80hl,z80hl,r0, lsl #24\r
6907 fetch 19\r
6908;@LD I,A (IX)\r
6909opcode_DD_67:\r
6910 mov r0,z80a,lsr#24\r
6911 strb r0,[z80xx,#3]\r
6912 fetch 8\r
6913;@LD X,B (IX)\r
6914opcode_DD_68:\r
6915 mov r0,z80bc,lsr#24\r
6916 strb r0,[z80xx,#2]\r
6917 fetch 8\r
6918;@LD X,C (IX)\r
6919opcode_DD_69:\r
6920 mov r0,z80bc,lsr#16\r
6921 strb r0,[z80xx,#2]\r
6922 fetch 8\r
6923;@LD X,D (IX)\r
6924opcode_DD_6A:\r
6925 mov r0,z80de,lsr#24\r
6926 strb r0,[z80xx,#2]\r
6927 fetch 8\r
6928;@LD X,E (IX)\r
6929opcode_DD_6B:\r
6930 mov r0,z80de,lsr#16\r
6931 strb r0,[z80xx,#2]\r
6932 fetch 8\r
6933;@LD X,I (IX)\r
6934opcode_DD_6C:\r
6935 ldrb r0,[z80xx,#3]\r
6936 strb r0,[z80xx,#2]\r
6937 fetch 8\r
6938;@LD X,X (IX)\r
6939opcode_DD_6D:\r
6940 fetch 8\r
6941;@LD L,(IX,N)\r
6942opcode_DD_6E:\r
6943 ldrsb r0,[z80pc],#1\r
6944 ldr r1,[z80xx]\r
6945 add r0,r0,r1, lsr #16\r
6946 readmem8\r
6947 and z80hl,z80hl,#0xFF<<24\r
6948 orr z80hl,z80hl,r0, lsl #16\r
6949 fetch 19\r
6950;@LD X,A (IX)\r
6951opcode_DD_6F:\r
6952 mov r0,z80a,lsr#24\r
6953 strb r0,[z80xx,#2]\r
6954 fetch 8\r
6955\r
6956;@LD (IX,N),B\r
6957opcode_DD_70:\r
6958 ldrsb r0,[z80pc],#1\r
6959 ldr r1,[z80xx]\r
6960 add r1,r0,r1, lsr #16\r
6961 mov r0,z80bc, lsr #24\r
6962 writemem8\r
6963 fetch 19\r
6964;@LD (IX,N),C\r
6965opcode_DD_71:\r
6966 ldrsb r0,[z80pc],#1\r
6967 ldr r1,[z80xx]\r
6968 add r1,r0,r1, lsr #16\r
6969 mov r0,z80bc, lsr #16\r
6970 and r0,r0,#0xFF\r
6971 writemem8\r
6972 fetch 19\r
6973;@LD (IX,N),D\r
6974opcode_DD_72:\r
6975 ldrsb r0,[z80pc],#1\r
6976 ldr r1,[z80xx]\r
6977 add r1,r0,r1, lsr #16\r
6978 mov r0,z80de, lsr #24\r
6979 writemem8\r
6980 fetch 19\r
6981;@LD (IX,N),E\r
6982opcode_DD_73:\r
6983 ldrsb r0,[z80pc],#1\r
6984 ldr r1,[z80xx]\r
6985 add r1,r0,r1, lsr #16\r
6986 mov r0,z80de, lsr #16\r
6987 and r0,r0,#0xFF\r
6988 writemem8\r
6989 fetch 19\r
6990;@LD (IX,N),H\r
6991opcode_DD_74:\r
6992 ldrsb r0,[z80pc],#1\r
6993 ldr r1,[z80xx]\r
6994 add r1,r0,r1, lsr #16\r
6995 mov r0,z80hl, lsr #24\r
6996 writemem8\r
6997 fetch 19\r
6998;@LD (IX,N),L\r
6999opcode_DD_75:\r
7000 ldrsb r0,[z80pc],#1\r
7001 ldr r1,[z80xx]\r
7002 add r1,r0,r1, lsr #16\r
7003 mov r0,z80hl, lsr #16\r
7004 and r0,r0,#0xFF\r
7005 writemem8\r
7006 fetch 19\r
7007;@LD (IX,N),A\r
7008opcode_DD_77:\r
7009 ldrsb r0,[z80pc],#1\r
7010 ldr r1,[z80xx]\r
7011 add r1,r0,r1, lsr #16\r
7012 mov r0,z80a, lsr #24\r
7013 writemem8\r
7014 fetch 19\r
7015\r
7016;@LD A,I from (IX)\r
7017opcode_DD_7C:\r
7018 ldrb r0,[z80xx,#3]\r
7019 mov z80a,r0, lsl #24\r
7020 fetch 8\r
7021;@LD A,X from (IX)\r
7022opcode_DD_7D:\r
7023 ldrb r0,[z80xx,#2]\r
7024 mov z80a,r0, lsl #24\r
7025 fetch 8\r
7026;@LD A,(IX,N)\r
7027opcode_DD_7E:\r
7028 ldrsb r0,[z80pc],#1\r
7029 ldr r1,[z80xx]\r
7030 add r0,r0,r1, lsr #16\r
7031 readmem8\r
7032 mov z80a,r0, lsl #24\r
7033 fetch 19\r
7034\r
7035;@ADD A,I ( IX)\r
7036opcode_DD_84:\r
7037 ldrb r0,[z80xx,#3]\r
7038 opADDb\r
7039 fetch 8\r
7040;@ADD A,X ( IX)\r
7041opcode_DD_85:\r
7042 ldrb r0,[z80xx,#2]\r
7043 opADDb\r
7044 fetch 8\r
7045;@ADD A,(IX+N)\r
7046opcode_DD_86:\r
7047 ldrsb r0,[z80pc],#1\r
7048 ldr r1,[z80xx]\r
7049 add r0,r0,r1, lsr #16\r
7050 readmem8\r
7051 opADDb\r
7052 fetch 19\r
7053\r
7054;@ADC A,I (IX)\r
7055opcode_DD_8C:\r
7056 ldrb r0,[z80xx,#3]\r
7057 opADCb\r
7058 fetch 8\r
7059;@ADC A,X (IX)\r
7060opcode_DD_8D:\r
7061 ldrb r0,[z80xx,#2]\r
7062 opADCb\r
7063 fetch 8\r
7064;@ADC A,(IX+N)\r
7065opcode_DD_8E:\r
7066 ldrsb r0,[z80pc],#1\r
7067 ldr r1,[z80xx]\r
7068 add r0,r0,r1, lsr #16\r
7069 readmem8\r
7070 opADCb\r
7071 fetch 19\r
7072\r
7073;@SUB A,I (IX)\r
7074opcode_DD_94:\r
7075 ldrb r0,[z80xx,#3]\r
7076 opSUBb\r
7077 fetch 8\r
7078;@SUB A,X (IX)\r
7079opcode_DD_95:\r
7080 ldrb r0,[z80xx,#2]\r
7081 opSUBb\r
7082 fetch 8\r
7083;@SUB A,(IX+N)\r
7084opcode_DD_96:\r
7085 ldrsb r0,[z80pc],#1\r
7086 ldr r1,[z80xx]\r
7087 add r0,r0,r1, lsr #16\r
7088 readmem8\r
7089 opSUBb\r
7090 fetch 19\r
7091\r
7092;@SBC A,I (IX)\r
7093opcode_DD_9C:\r
7094 ldrb r0,[z80xx,#3]\r
7095 opSBCb\r
7096 fetch 8\r
7097;@SBC A,X (IX)\r
7098opcode_DD_9D:\r
7099 ldrb r0,[z80xx,#2]\r
7100 opSBCb\r
7101 fetch 8\r
7102;@SBC A,(IX+N)\r
7103opcode_DD_9E:\r
7104 ldrsb r0,[z80pc],#1\r
7105 ldr r1,[z80xx]\r
7106 add r0,r0,r1, lsr #16\r
7107 readmem8\r
7108 opSBCb\r
7109 fetch 19\r
7110\r
7111;@AND I (IX)\r
7112opcode_DD_A4:\r
7113 ldrb r0,[z80xx,#3]\r
7114 opANDb\r
7115 fetch 8\r
7116;@AND X (IX)\r
7117opcode_DD_A5:\r
7118 ldrb r0,[z80xx,#2]\r
7119 opANDb\r
7120 fetch 8\r
7121;@AND (IX+N)\r
7122opcode_DD_A6:\r
7123 ldrsb r0,[z80pc],#1\r
7124 ldr r1,[z80xx]\r
7125 add r0,r0,r1, lsr #16\r
7126 readmem8\r
7127 opANDb\r
7128 fetch 19\r
7129\r
7130;@XOR I (IX)\r
7131opcode_DD_AC:\r
7132 ldrb r0,[z80xx,#3]\r
7133 opXORb\r
7134 fetch 8\r
7135;@XOR X (IX)\r
7136opcode_DD_AD:\r
7137 ldrb r0,[z80xx,#2]\r
7138 opXORb\r
7139 fetch 8\r
7140;@XOR (IX+N)\r
7141opcode_DD_AE:\r
7142 ldrsb r0,[z80pc],#1\r
7143 ldr r1,[z80xx]\r
7144 add r0,r0,r1, lsr #16\r
7145 readmem8\r
7146 opXORb\r
7147 fetch 19\r
7148\r
7149;@OR I (IX)\r
7150opcode_DD_B4:\r
7151 ldrb r0,[z80xx,#3]\r
7152 opORb\r
7153 fetch 8\r
7154;@OR X (IX)\r
7155opcode_DD_B5:\r
7156 ldrb r0,[z80xx,#2]\r
7157 opORb\r
7158 fetch 8\r
7159;@OR (IX+N)\r
7160opcode_DD_B6:\r
7161 ldrsb r0,[z80pc],#1\r
7162 ldr r1,[z80xx]\r
7163 add r0,r0,r1, lsr #16\r
7164 readmem8\r
7165 opORb\r
7166 fetch 19\r
7167\r
7168;@CP I (IX)\r
7169opcode_DD_BC:\r
7170 ldrb r0,[z80xx,#3]\r
7171 opCPb\r
7172 fetch 8\r
7173;@CP X (IX)\r
7174opcode_DD_BD:\r
7175 ldrb r0,[z80xx,#2]\r
7176 opCPb\r
7177 fetch 8\r
7178;@CP (IX+N)\r
7179opcode_DD_BE:\r
7180 ldrsb r0,[z80pc],#1\r
7181 ldr r1,[z80xx]\r
7182 add r0,r0,r1, lsr #16\r
7183 readmem8\r
7184 opCPb\r
7185 fetch 19\r
7186\r
7187\r
7188opcodes_DD_CB_LOCAL: .word opcodes_DD_CB\r
7189opcode_DD_CB:\r
7190;@Looks up the opcode on the opcodes_DD_CB table and then \r
7191;@moves the PC to the location of the subroutine\r
7192 ldrsb r0,[z80pc],#1\r
7193 ldr r1,[z80xx]\r
7194 add r0,r0,r1, lsr #16\r
7195\r
7196 ldrb r1,[z80pc],#1\r
7197 ldr pc,[pc,r1, lsl #2]\r
7198 .word 0x00\r
7199opcodes_DD_CB:\r
7200 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_06,opcode_DD_NF2\r
7201 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_0E,opcode_DD_NF2\r
7202 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_16,opcode_DD_NF2\r
7203 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_1E,opcode_DD_NF2\r
7204 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_26,opcode_DD_NF2\r
7205 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_2E,opcode_DD_NF2\r
7206 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_36,opcode_DD_NF2\r
7207 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_3E,opcode_DD_NF2\r
7208 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_46,opcode_DD_NF2\r
7209 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_4E,opcode_DD_NF2\r
7210 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_56,opcode_DD_NF2\r
7211 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_5E,opcode_DD_NF2\r
7212 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_66,opcode_DD_NF2\r
7213 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_6E,opcode_DD_NF2\r
7214 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_76,opcode_DD_NF2\r
7215 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_7E,opcode_DD_NF2\r
7216 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_86,opcode_DD_NF2\r
7217 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_8E,opcode_DD_NF2\r
7218 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_96,opcode_DD_NF2\r
7219 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_9E,opcode_DD_NF2\r
7220 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_A6,opcode_DD_NF2\r
7221 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_AE,opcode_DD_NF2\r
7222 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_B6,opcode_DD_NF2\r
7223 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_BE,opcode_DD_NF2\r
7224 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_C6,opcode_DD_NF2\r
7225 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_CE,opcode_DD_NF2\r
7226 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_D6,opcode_DD_NF2\r
7227 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_DE,opcode_DD_NF2\r
7228 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_E6,opcode_DD_NF2\r
7229 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_EE,opcode_DD_NF2\r
7230 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_F6,opcode_DD_NF2\r
7231 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_FE,opcode_DD_NF2\r
7232\r
7233;@RLC (IX+N) \r
7234opcode_DD_CB_06:\r
7235 stmfd sp!,{r0} ;@ save addr\r
7236 readmem8\r
7237 opRLCb\r
7238 ldmfd sp!,{r1} ;@ restore addr into r1\r
7239 writemem8\r
7240 fetch 23\r
7241;@RRC (IX+N) \r
7242opcode_DD_CB_0E:\r
7243 stmfd sp!,{r0} ;@ save addr\r
7244 readmem8\r
7245 opRRCb\r
7246 ldmfd sp!,{r1} ;@ restore addr into r1\r
7247 writemem8\r
7248 fetch 23\r
7249;@RL (IX+N) \r
7250opcode_DD_CB_16:\r
7251 stmfd sp!,{r0} ;@ save addr\r
7252 readmem8\r
7253 opRLb\r
7254 ldmfd sp!,{r1} ;@ restore addr into r1\r
7255 writemem8\r
7256 fetch 23\r
7257;@RR (IX+N) \r
7258opcode_DD_CB_1E:\r
7259 stmfd sp!,{r0} ;@ save addr \r
7260 readmem8\r
7261 opRRb\r
7262 ldmfd sp!,{r1} ;@ restore addr into r1\r
7263 writemem8\r
7264 fetch 23\r
7265\r
7266;@SLA (IX+N) \r
7267opcode_DD_CB_26:\r
7268 stmfd sp!,{r0} ;@ save addr \r
7269 readmem8\r
7270 opSLAb\r
7271 ldmfd sp!,{r1} ;@ restore addr into r1\r
7272 writemem8\r
7273 fetch 23\r
7274;@SRA (IX+N) \r
7275opcode_DD_CB_2E:\r
7276 stmfd sp!,{r0} ;@ save addr \r
7277 readmem8\r
7278 opSRAb\r
7279 ldmfd sp!,{r1} ;@ restore addr into r1\r
7280 writemem8\r
7281 fetch 23\r
7282;@SLL (IX+N) \r
7283opcode_DD_CB_36:\r
7284 stmfd sp!,{r0} ;@ save addr \r
7285 readmem8\r
7286 opSLLb\r
7287 ldmfd sp!,{r1} ;@ restore addr into r1\r
7288 writemem8\r
7289 fetch 23\r
7290;@SRL (IX+N)\r
7291opcode_DD_CB_3E:\r
7292 stmfd sp!,{r0} ;@ save addr \r
7293 readmem8\r
7294 opSRLb\r
7295 ldmfd sp!,{r1} ;@ restore addr into r1\r
7296 writemem8\r
7297 fetch 23\r
7298\r
7299;@BIT 0,(IX+N) \r
7300opcode_DD_CB_46:\r
7301 readmem8\r
7302 opBITb 0\r
7303 fetch 20\r
7304;@BIT 1,(IX+N) \r
7305opcode_DD_CB_4E:\r
7306 readmem8\r
7307 opBITb 1\r
7308 fetch 20\r
7309;@BIT 2,(IX+N) \r
7310opcode_DD_CB_56:\r
7311 readmem8\r
7312 opBITb 2\r
7313 fetch 20\r
7314;@BIT 3,(IX+N) \r
7315opcode_DD_CB_5E:\r
7316 readmem8\r
7317 opBITb 3\r
7318 fetch 20\r
7319;@BIT 4,(IX+N) \r
7320opcode_DD_CB_66:\r
7321 readmem8\r
7322 opBITb 4\r
7323 fetch 20\r
7324;@BIT 5,(IX+N) \r
7325opcode_DD_CB_6E:\r
7326 readmem8\r
7327 opBITb 5\r
7328 fetch 20\r
7329;@BIT 6,(IX+N) \r
7330opcode_DD_CB_76:\r
7331 readmem8\r
7332 opBITb 6\r
7333 fetch 20\r
7334;@BIT 7,(IX+N) \r
7335opcode_DD_CB_7E:\r
7336 readmem8\r
7337 opBIT7b\r
7338 fetch 20\r
7339;@RES 0,(IX+N) \r
7340opcode_DD_CB_86:\r
7341 opRESmem 0\r
7342;@RES 1,(IX+N) \r
7343opcode_DD_CB_8E:\r
7344 opRESmem 1\r
7345;@RES 2,(IX+N) \r
7346opcode_DD_CB_96:\r
7347 opRESmem 2\r
7348;@RES 3,(IX+N) \r
7349opcode_DD_CB_9E:\r
7350 opRESmem 3\r
7351;@RES 4,(IX+N) \r
7352opcode_DD_CB_A6:\r
7353 opRESmem 4\r
7354;@RES 5,(IX+N) \r
7355opcode_DD_CB_AE:\r
7356 opRESmem 5\r
7357;@RES 6,(IX+N) \r
7358opcode_DD_CB_B6:\r
7359 opRESmem 6\r
7360;@RES 7,(IX+N) \r
7361opcode_DD_CB_BE:\r
7362 opRESmem 7\r
7363\r
7364;@SET 0,(IX+N) \r
7365opcode_DD_CB_C6:\r
7366 opSETmem 0\r
7367;@SET 1,(IX+N) \r
7368opcode_DD_CB_CE:\r
7369 opSETmem 1\r
7370;@SET 2,(IX+N) \r
7371opcode_DD_CB_D6:\r
7372 opSETmem 2\r
7373;@SET 3,(IX+N) \r
7374opcode_DD_CB_DE:\r
7375 opSETmem 3\r
7376;@SET 4,(IX+N) \r
7377opcode_DD_CB_E6:\r
7378 opSETmem 4\r
7379;@SET 5,(IX+N) \r
7380opcode_DD_CB_EE:\r
7381 opSETmem 5\r
7382;@SET 6,(IX+N) \r
7383opcode_DD_CB_F6:\r
7384 opSETmem 6\r
7385;@SET 7,(IX+N) \r
7386opcode_DD_CB_FE:\r
7387 opSETmem 7\r
7388\r
7389\r
7390\r
7391;@POP IX\r
7392opcode_DD_E1:\r
7393.if FAST_Z80SP\r
7394 opPOP\r
7395.else\r
7396 mov r0,z80sp\r
7397 stmfd sp!,{z80xx}\r
7398 readmem16\r
7399 ldmfd sp!,{z80xx}\r
7400 add z80sp,z80sp,#2\r
7401.endif\r
7402 strh r0,[z80xx,#2]\r
7403 fetch 14\r
7404;@EX (SP),IX\r
7405opcode_DD_E3:\r
7406.if FAST_Z80SP\r
7407 ldrb r0,[z80sp]\r
7408 ldrb r1,[z80sp,#1]\r
7409 orr r2,r0,r1, lsl #8\r
7410 ldrh r1,[z80xx,#2]\r
7411 mov r0,r1, lsr #8\r
7412 strb r0,[z80sp,#1]\r
7413 strb r1,[z80sp]\r
7414 strh r2,[z80xx,#2]\r
7415.else\r
7416 mov r0,z80sp\r
7417 stmfd sp!,{z80xx}\r
7418 readmem16\r
7419 ldmfd sp!,{z80xx}\r
7420 mov r2,r0\r
7421 ldrh r0,[z80xx,#2]\r
7422 strh r2,[z80xx,#2]\r
7423 mov r1,z80sp\r
7424 writemem16\r
7425.endif\r
7426 fetch 23\r
7427;@PUSH IX\r
7428opcode_DD_E5:\r
7429 ldr r2,[z80xx]\r
7430 opPUSHreg r2\r
7431 fetch 15\r
7432;@JP (IX)\r
7433opcode_DD_E9:\r
7434 ldrh r0,[z80xx,#2]\r
7435 rebasepc\r
7436 fetch 8\r
7437;@LD SP,IX\r
7438opcode_DD_F9:\r
7439.if FAST_Z80SP\r
7440 ldrh r0,[z80xx,#2]\r
7441 rebasesp\r
7442 mov z80sp,r0\r
7443.else\r
7444 ldrh z80sp,[z80xx,#2]\r
7445.endif\r
7446 fetch 10\r
7447\r
7448;@##################################\r
7449;@##################################\r
7450;@### opcodes ED #########################\r
7451;@##################################\r
7452;@##################################\r
7453\r
7454opcode_ED_NF:\r
7455 fetch 8\r
7456;@ ldrb r0,[z80pc],#1\r
7457;@ ldr pc,[opcodes,r0, lsl #2]\r
7458;@ mov r0,#0xED00\r
7459;@ orr r0,r0,r1\r
7460;@ b end_loop\r
7461\r
7462;@IN B,(C)\r
7463opcode_ED_40:\r
7464 opIN_C\r
7465 and z80bc,z80bc,#0xFF<<16\r
7466 orr z80bc,z80bc,r0, lsl #24\r
7467 sub r1,opcodes,#0x100\r
7468 ldrb r0,[r1,r0]\r
7469 and z80f,z80f,#1<<CFlag\r
7470 orr z80f,z80f,r0\r
7471 fetch 12\r
7472;@OUT (C),B\r
7473opcode_ED_41:\r
7474 mov r1,z80bc, lsr #24\r
7475 opOUT_C\r
7476 fetch 12\r
7477\r
7478;@SBC HL,BC\r
7479opcode_ED_42:\r
7480 opSBC16 z80bc\r
7481\r
7482;@LD (NN),BC\r
7483opcode_ED_43:\r
7484 ldrb r0,[z80pc],#1\r
7485 ldrb r1,[z80pc],#1\r
7486 orr r1,r0,r1, lsl #8\r
7487 mov r0,z80bc, lsr #16\r
7488 writemem16\r
7489 fetch 20\r
7490;@NEG\r
7491opcode_ED_44:\r
7492 rsbs z80a,z80a,#0\r
7493 mrs z80f,cpsr\r
7494 mov z80f,z80f,lsr#28 ;@S,Z,V&C\r
7495 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@invert C and set n.\r
7496 tst z80a,#0x0F000000 ;@H, correct\r
7497 orrne z80f,z80f,#1<<HFlag\r
7498 fetch 8\r
7499 \r
7500;@RETN, moved to ED_4D\r
7501;@opcode_ED_45:\r
7502\r
7503;@IM 0\r
7504opcode_ED_46:\r
7505 strb z80a,[cpucontext,#z80im]\r
7506 fetch 8\r
7507;@LD I,A\r
7508opcode_ED_47:\r
7509 str z80a,[cpucontext,#z80i]\r
7510 fetch 9\r
7511;@IN C,(C)\r
7512opcode_ED_48:\r
7513 opIN_C\r
7514 and z80bc,z80bc,#0xFF<<24\r
7515 orr z80bc,z80bc,r0, lsl #16\r
7516 sub r1,opcodes,#0x100\r
7517 ldrb r0,[r1,r0]\r
7518 and z80f,z80f,#1<<CFlag\r
7519 orr z80f,z80f,r0\r
7520 fetch 12\r
7521;@OUT (C),C\r
7522opcode_ED_49:\r
7523 mov r0,z80bc, lsr #16\r
7524 and r1,r0,#0xFF\r
7525 opOUT\r
7526 fetch 12\r
7527;@ADC HL,BC\r
7528opcode_ED_4A:\r
7529 opADC16 z80bc\r
7530;@LD BC,(NN)\r
7531opcode_ED_4B:\r
7532 ldrb r0,[z80pc],#1\r
7533 ldrb r1,[z80pc],#1\r
7534 orr r0,r0,r1, lsl #8\r
7535 readmem16\r
7536 mov z80bc,r0, lsl #16\r
7537 fetch 20\r
7538\r
7539;@RETN\r
7540opcode_ED_45:\r
7541;@RETI\r
7542opcode_ED_4D:\r
7543 ldrb r0,[cpucontext,#z80if]\r
7544 tst r0,#Z80_IF2\r
7545 orrne r0,r0,#Z80_IF1\r
7546 biceq r0,r0,#Z80_IF1\r
7547 strb r0,[cpucontext,#z80if]\r
7548 opPOP\r
7549 rebasepc\r
7550 fetch 14\r
7551\r
7552;@LD R,A\r
7553opcode_ED_4F:\r
7554 mov r0,z80a,lsr#24\r
7555 strb r0,[cpucontext,#z80r]\r
7556 fetch 9\r
7557\r
7558;@IN D,(C)\r
7559opcode_ED_50:\r
7560 opIN_C\r
7561 and z80de,z80de,#0xFF<<16\r
7562 orr z80de,z80de,r0, lsl #24\r
7563 sub r1,opcodes,#0x100\r
7564 ldrb r0,[r1,r0]\r
7565 and z80f,z80f,#1<<CFlag\r
7566 orr z80f,z80f,r0\r
7567 fetch 12\r
7568;@OUT (C),D\r
7569opcode_ED_51:\r
7570 mov r1,z80de, lsr #24\r
7571 opOUT_C\r
7572 fetch 12\r
7573;@SBC HL,DE\r
7574opcode_ED_52:\r
7575 opSBC16 z80de\r
7576;@LD (NN),DE\r
7577opcode_ED_53:\r
7578 ldrb r0,[z80pc],#1\r
7579 ldrb r1,[z80pc],#1\r
7580 orr r1,r0,r1, lsl #8\r
7581 mov r0,z80de, lsr #16\r
7582 writemem16\r
7583 fetch 20\r
7584;@IM 1\r
7585opcode_ED_56:\r
7586 mov r0,#1\r
7587 strb r0,[cpucontext,#z80im]\r
7588 fetch 8\r
7589;@LD A,I\r
7590opcode_ED_57:\r
7591 ldr z80a,[cpucontext,#z80i]\r
7592 tst z80a,#0xFF000000\r
7593 and z80f,z80f,#(1<<CFlag)\r
7594 orreq z80f,z80f,#(1<<ZFlag)\r
7595 orrmi z80f,z80f,#(1<<SFlag)\r
7596 ldrb r0,[cpucontext,#z80if]\r
7597 tst r0,#Z80_IF2\r
7598 orrne z80f,z80f,#(1<<VFlag)\r
7599 fetch 9\r
7600;@IN E,(C)\r
7601opcode_ED_58:\r
7602 opIN_C\r
7603 and z80de,z80de,#0xFF<<24\r
7604 orr z80de,z80de,r0, lsl #16\r
7605 sub r1,opcodes,#0x100\r
7606 ldrb r0,[r1,r0]\r
7607 and z80f,z80f,#1<<CFlag\r
7608 orr z80f,z80f,r0\r
7609 fetch 12\r
7610;@OUT (C),E\r
7611opcode_ED_59:\r
7612 mov r1,z80de, lsr #16\r
7613 and r1,r1,#0xFF\r
7614 opOUT_C\r
7615 fetch 12\r
7616;@ADC HL,DE\r
7617opcode_ED_5A:\r
7618 opADC16 z80de\r
7619;@LD DE,(NN)\r
7620opcode_ED_5B:\r
7621 ldrb r0,[z80pc],#1\r
7622 ldrb r1,[z80pc],#1\r
7623 orr r0,r0,r1, lsl #8\r
7624 readmem16\r
7625 mov z80de,r0, lsl #16\r
7626 fetch 20\r
7627;@IM 2\r
7628opcode_ED_5E:\r
7629 mov r0,#2\r
7630 strb r0,[cpucontext,#z80im]\r
7631 fetch 8\r
7632;@LD A,R\r
7633opcode_ED_5F:\r
7634 ldrb r0,[cpucontext,#z80r]\r
7635 and r0,r0,#0x80\r
7636 rsb r1,z80_icount,#0\r
7637 and r1,r1,#0x7F\r
7638 orr r0,r0,r1\r
7639 movs z80a,r0, lsl #24\r
7640 and z80f,z80f,#1<<CFlag\r
7641 orrmi z80f,z80f,#(1<<SFlag)\r
7642 orreq z80f,z80f,#(1<<ZFlag)\r
7643 ldrb r0,[cpucontext,#z80if]\r
7644 tst r0,#Z80_IF2\r
7645 orrne z80f,z80f,#(1<<VFlag)\r
7646 fetch 9\r
7647;@IN H,(C)\r
7648opcode_ED_60:\r
7649 opIN_C\r
7650 and z80hl,z80hl,#0xFF<<16\r
7651 orr z80hl,z80hl,r0, lsl #24\r
7652 sub r1,opcodes,#0x100\r
7653 ldrb r0,[r1,r0]\r
7654 and z80f,z80f,#1<<CFlag\r
7655 orr z80f,z80f,r0\r
7656 fetch 12\r
7657;@OUT (C),H\r
7658opcode_ED_61:\r
7659 mov r1,z80hl, lsr #24\r
7660 opOUT_C\r
7661 fetch 12\r
7662;@SBC HL,HL\r
7663opcode_ED_62:\r
7664 opSBC16HL\r
7665;@RRD\r
7666opcode_ED_67:\r
7667 readmem8HL\r
7668 mov r1,r0,ror#4\r
7669 orr r0,r1,z80a,lsr#20\r
7670 bic z80a,z80a,#0x0F000000\r
7671 orr z80a,z80a,r1,lsr#4\r
7672 writemem8HL\r
7673 sub r1,opcodes,#0x100\r
7674 ldrb r0,[r1,z80a, lsr #24]\r
7675 and z80f,z80f,#1<<CFlag\r
7676 orr z80f,z80f,r0\r
7677 fetch 18\r
7678;@IN L,(C)\r
7679opcode_ED_68:\r
7680 opIN_C\r
7681 and z80hl,z80hl,#0xFF<<24\r
7682 orr z80hl,z80hl,r0, lsl #16\r
7683 and z80f,z80f,#1<<CFlag\r
7684 sub r1,opcodes,#0x100\r
7685 ldrb r0,[r1,r0]\r
7686 orr z80f,z80f,r0\r
7687 fetch 12\r
7688;@OUT (C),L\r
7689opcode_ED_69:\r
7690 mov r1,z80hl, lsr #16\r
7691 and r1,r1,#0xFF\r
7692 opOUT_C\r
7693 fetch 12\r
7694;@ADC HL,HL\r
7695opcode_ED_6A:\r
7696 opADC16HL\r
7697;@RLD\r
7698opcode_ED_6F:\r
7699 readmem8HL\r
7700 orr r0,r0,z80a,lsl#4\r
7701 mov r0,r0,ror#28\r
7702 and z80a,z80a,#0xF0000000\r
7703 orr z80a,z80a,r0,lsl#16\r
7704 and z80a,z80a,#0xFF000000\r
7705 writemem8HL\r
7706 sub r1,opcodes,#0x100\r
7707 ldrb r0,[r1,z80a, lsr #24]\r
7708 and z80f,z80f,#1<<CFlag\r
7709 orr z80f,z80f,r0\r
7710 fetch 18\r
7711;@IN F,(C)\r
7712opcode_ED_70:\r
7713 opIN_C\r
7714 and z80f,z80f,#1<<CFlag\r
7715 sub r1,opcodes,#0x100\r
7716 ldrb r0,[r1,r0]\r
7717 orr z80f,z80f,r0\r
7718 fetch 12\r
7719;@OUT (C),0\r
7720opcode_ED_71:\r
7721 mov r1,#0\r
7722 opOUT_C\r
7723 fetch 12\r
7724\r
7725;@SBC HL,SP\r
7726opcode_ED_72:\r
7727.if FAST_Z80SP\r
7728 ldr r0,[cpucontext,#z80sp_base]\r
7729 sub r0,z80sp,r0\r
7730 mov r0, r0, lsl #16\r
7731.else\r
7732 mov r0,z80sp,lsl#16\r
7733.endif\r
7734 opSBC16 r0\r
7735;@LD (NN),SP\r
7736opcode_ED_73:\r
7737 ldrb r0,[z80pc],#1\r
7738 ldrb r1,[z80pc],#1\r
7739 orr r1,r0,r1, lsl #8\r
7740.if FAST_Z80SP\r
7741 ldr r0,[cpucontext,#z80sp_base]\r
7742 sub r0,z80sp,r0\r
7743.else\r
7744 mov r0,z80sp\r
7745.endif\r
7746 writemem16\r
7747 fetch 16\r
7748;@IN A,(C)\r
7749opcode_ED_78:\r
7750 opIN_C\r
7751 mov z80a,r0, lsl #24\r
7752 and z80f,z80f,#1<<CFlag\r
7753 sub r1,opcodes,#0x100\r
7754 ldrb r0,[r1,r0]\r
7755 orr z80f,z80f,r0\r
7756 fetch 12\r
7757;@OUT (C),A\r
7758opcode_ED_79:\r
7759 mov r1,z80a, lsr #24\r
7760 opOUT_C\r
7761 fetch 12\r
7762;@ADC HL,SP\r
7763opcode_ED_7A:\r
7764.if FAST_Z80SP\r
7765 ldr r0,[cpucontext,#z80sp_base]\r
7766 sub r0,z80sp,r0\r
7767 mov r0, r0, lsl #16\r
7768.else\r
7769 mov r0,z80sp,lsl#16\r
7770.endif\r
7771 opADC16 r0\r
7772;@LD SP,(NN)\r
7773opcode_ED_7B:\r
7774 ldrb r0,[z80pc],#1\r
7775 ldrb r1,[z80pc],#1\r
7776 orr r0,r0,r1, lsl #8\r
7777 readmem16\r
7778.if FAST_Z80SP\r
7779 rebasesp\r
7780.endif\r
7781 mov z80sp,r0\r
7782 fetch 20\r
7783;@LDI\r
7784opcode_ED_A0:\r
7785 copymem8HL_DE\r
7786 add z80hl,z80hl,#1<<16\r
7787 add z80de,z80de,#1<<16\r
7788 subs z80bc,z80bc,#1<<16\r
7789 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7790 orrne z80f,z80f,#1<<VFlag\r
7791 fetch 16\r
7792;@CPI\r
7793opcode_ED_A1:\r
7794 readmem8HL\r
7795 add z80hl,z80hl,#0x00010000\r
7796 mov r1,z80a,lsl#4\r
7797 cmp z80a,r0,lsl#24\r
7798 and z80f,z80f,#1<<CFlag\r
7799 orr z80f,z80f,#1<<NFlag\r
7800 orrmi z80f,z80f,#1<<SFlag\r
7801 orreq z80f,z80f,#1<<ZFlag\r
7802 cmp r1,r0,lsl#28\r
7803 orrcc z80f,z80f,#1<<HFlag\r
7804 subs z80bc,z80bc,#0x00010000\r
7805 orrne z80f,z80f,#1<<VFlag\r
7806 fetch 16\r
7807;@INI\r
7808opcode_ED_A2:\r
7809 opIN_C\r
7810 and z80f,r0,#0x80\r
7811 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7812;@ mov r1,z80bc,lsl#8\r
7813;@ add r1,r1,#0x01000000\r
7814;@ adds r1,r1,r0,lsl#24\r
7815;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7816 writemem8HL\r
7817 add z80hl,z80hl,#1<<16\r
7818 sub z80bc,z80bc,#1<<24\r
7819 tst z80bc,#0xFF<<24\r
7820 orrmi z80f,z80f,#1<<SFlag\r
7821 orreq z80f,z80f,#1<<ZFlag\r
7822 fetch 16\r
7823\r
7824;@OUTI\r
7825opcode_ED_A3:\r
7826 readmem8HL\r
7827 add z80hl,z80hl,#1<<16\r
7828 and z80f,r0,#0x80\r
7829 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7830 mov r1,z80hl,lsl#8\r
7831 adds r1,r1,r0,lsl#24\r
7832 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL)+L > 0xFF\r
7833 sub z80bc,z80bc,#1<<24\r
7834 tst z80bc,#0xFF<<24\r
7835 orrmi z80f,z80f,#1<<SFlag\r
7836 orreq z80f,z80f,#1<<ZFlag\r
7837 mov r1,r0\r
7838 opOUT_C\r
7839 fetch 16\r
7840\r
7841;@LDD\r
7842opcode_ED_A8:\r
7843 copymem8HL_DE\r
7844 sub z80hl,z80hl,#1<<16\r
7845 sub z80de,z80de,#1<<16\r
7846 subs z80bc,z80bc,#1<<16\r
7847 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7848 orrne z80f,z80f,#1<<VFlag\r
7849 fetch 16\r
7850\r
7851;@CPD\r
7852opcode_ED_A9:\r
7853 readmem8HL\r
7854 sub z80hl,z80hl,#1<<16\r
7855 mov r1,z80a,lsl#4\r
7856 cmp z80a,r0,lsl#24\r
7857 and z80f,z80f,#1<<CFlag\r
7858 orr z80f,z80f,#1<<NFlag\r
7859 orrmi z80f,z80f,#1<<SFlag\r
7860 orreq z80f,z80f,#1<<ZFlag\r
7861 cmp r1,r0,lsl#28\r
7862 orrcc z80f,z80f,#1<<HFlag\r
7863 subs z80bc,z80bc,#0x00010000\r
7864 orrne z80f,z80f,#1<<VFlag\r
7865 fetch 16\r
7866\r
7867;@IND\r
7868opcode_ED_AA:\r
7869 opIN_C\r
7870 and z80f,r0,#0x80\r
7871 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7872;@ mov r1,z80bc,lsl#8\r
7873;@ sub r1,r1,#0x01000000\r
7874;@ adds r1,r1,r0,lsl#24\r
7875;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
7876 writemem8HL\r
7877 sub z80hl,z80hl,#1<<16\r
7878 sub z80bc,z80bc,#1<<24\r
7879 tst z80bc,#0xFF<<24\r
7880 orrmi z80f,z80f,#1<<SFlag\r
7881 orreq z80f,z80f,#1<<ZFlag\r
7882 fetch 16\r
7883\r
7884;@OUTD\r
7885opcode_ED_AB:\r
7886 readmem8HL\r
7887 sub z80hl,z80hl,#1<<16\r
7888 and z80f,r0,#0x80\r
7889 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7890 mov r1,z80hl,lsl#8\r
7891 adds r1,r1,r0,lsl#24\r
7892 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7893 sub z80bc,z80bc,#1<<24\r
7894 tst z80bc,#0xFF<<24\r
7895 orrmi z80f,z80f,#1<<SFlag\r
7896 orreq z80f,z80f,#1<<ZFlag\r
7897 mov r1,r0\r
7898 opOUT_C\r
7899 fetch 16\r
7900;@LDIR\r
7901opcode_ED_B0:\r
7902 copymem8HL_DE\r
7903 add z80hl,z80hl,#1<<16\r
7904 add z80de,z80de,#1<<16\r
7905 subs z80bc,z80bc,#1<<16\r
7906 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7907 orrne z80f,z80f,#1<<VFlag\r
7908 subne z80pc,z80pc,#2\r
7909 subne z80_icount,z80_icount,#5\r
7910 fetch 16\r
7911\r
7912;@CPIR\r
7913opcode_ED_B1:\r
7914 readmem8HL\r
7915 add z80hl,z80hl,#1<<16 \r
7916 mov r1,z80a,lsl#4\r
7917 cmp z80a,r0,lsl#24\r
7918 and z80f,z80f,#1<<CFlag\r
7919 orr z80f,z80f,#1<<NFlag\r
7920 orrmi z80f,z80f,#1<<SFlag\r
7921 orreq z80f,z80f,#1<<ZFlag\r
7922 cmp r1,r0,lsl#28\r
7923 orrcc z80f,z80f,#1<<HFlag\r
7924 subs z80bc,z80bc,#1<<16\r
7925 bne opcode_ED_B1_decpc\r
7926 fetch 16\r
7927opcode_ED_B1_decpc:\r
7928 orr z80f,z80f,#1<<VFlag\r
7929 tst z80f,#1<<ZFlag\r
7930 subeq z80pc,z80pc,#2\r
7931 subeq z80_icount,z80_icount,#5\r
7932 fetch 16\r
7933;@INIR\r
7934opcode_ED_B2:\r
7935 opIN_C\r
7936 and z80f,r0,#0x80\r
7937 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7938;@ mov r1,z80bc,lsl#8\r
7939;@ add r1,r1,#0x01000000\r
7940;@ adds r1,r1,r0,lsl#24\r
7941;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7942 writemem8HL\r
7943 add z80hl,z80hl,#1<<16\r
7944 sub z80bc,z80bc,#1<<24\r
7945 tst z80bc,#0xFF<<24\r
7946 orrmi z80f,z80f,#1<<SFlag\r
7947 orreq z80f,z80f,#1<<ZFlag\r
7948 subne z80pc,z80pc,#2\r
7949 subne z80_icount,z80_icount,#5\r
7950 fetch 16\r
7951;@OTIR\r
7952opcode_ED_B3:\r
7953 readmem8HL\r
7954 add z80hl,z80hl,#1<<16\r
7955 and z80f,r0,#0x80\r
7956 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7957 mov r1,z80hl,lsl#8\r
7958 adds r1,r1,r0,lsl#24\r
7959 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7960 sub z80bc,z80bc,#1<<24\r
7961 tst z80bc,#0xFF<<24\r
7962 orrmi z80f,z80f,#1<<SFlag\r
7963 orreq z80f,z80f,#1<<ZFlag\r
7964 subne z80pc,z80pc,#2\r
7965 subne z80_icount,z80_icount,#5\r
7966 mov r1,r0\r
7967 opOUT_C\r
7968 fetch 16\r
7969;@LDDR\r
7970opcode_ED_B8:\r
7971 copymem8HL_DE\r
7972 sub z80hl,z80hl,#1<<16\r
7973 sub z80de,z80de,#1<<16\r
7974 subs z80bc,z80bc,#1<<16\r
7975 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7976 orrne z80f,z80f,#1<<VFlag\r
7977 subne z80pc,z80pc,#2\r
7978 subne z80_icount,z80_icount,#5\r
7979 fetch 16\r
7980\r
7981;@CPDR\r
7982opcode_ED_B9:\r
7983 readmem8HL\r
7984 sub z80hl,z80hl,#1<<16\r
7985 mov r1,z80a,lsl#4\r
7986 cmp z80a,r0,lsl#24\r
7987 and z80f,z80f,#1<<CFlag\r
7988 orr z80f,z80f,#1<<NFlag\r
7989 orrmi z80f,z80f,#1<<SFlag\r
7990 orreq z80f,z80f,#1<<ZFlag\r
7991 cmp r1,r0,lsl#28\r
7992 orrcc z80f,z80f,#1<<HFlag\r
7993 subs z80bc,z80bc,#1<<16\r
7994 bne opcode_ED_B9_decpc\r
7995 fetch 16\r
7996opcode_ED_B9_decpc:\r
7997 orr z80f,z80f,#1<<VFlag\r
7998 tst z80f,#1<<ZFlag\r
7999 subeq z80pc,z80pc,#2\r
8000 subeq z80_icount,z80_icount,#5\r
8001 fetch 16\r
8002;@INDR\r
8003opcode_ED_BA:\r
8004 opIN_C\r
8005 and z80f,r0,#0x80\r
8006 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8007;@ mov r1,z80bc,lsl#8\r
8008;@ sub r1,r1,#0x01000000\r
8009;@ adds r1,r1,r0,lsl#24\r
8010;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
8011 writemem8HL\r
8012 sub z80hl,z80hl,#1<<16\r
8013 sub z80bc,z80bc,#1<<24\r
8014 tst z80bc,#0xFF<<24\r
8015 orrmi z80f,z80f,#1<<SFlag\r
8016 orreq z80f,z80f,#1<<ZFlag\r
8017 subne z80pc,z80pc,#2\r
8018 subne z80_icount,z80_icount,#5\r
8019 fetch 16\r
8020;@OTDR\r
8021opcode_ED_BB:\r
8022 readmem8HL\r
8023 sub z80hl,z80hl,#1<<16\r
8024 and z80f,r0,#0x80\r
8025 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8026 mov r1,z80hl,lsl#8\r
8027 adds r1,r1,r0,lsl#24\r
8028 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
8029 sub z80bc,z80bc,#1<<24\r
8030 tst z80bc,#0xFF<<24\r
8031 orrmi z80f,z80f,#1<<SFlag\r
8032 orreq z80f,z80f,#1<<ZFlag\r
8033 subne z80pc,z80pc,#2\r
8034 subne z80_icount,z80_icount,#5\r
8035 mov r1,r0\r
8036 opOUT_C\r
8037 fetch 16\r
8038;@##################################\r
8039;@##################################\r
8040;@### opcodes FD #########################\r
8041;@##################################\r
8042;@##################################\r
8043;@Since DD and FD opcodes are all the same apart from the address\r
8044;@register they use. When a FD intruction the program runs the code\r
8045;@from the DD location but the address of the IY reg is passed instead\r
8046;@of IX\r
8047\r
f0243975 8048;@end_loop:\r
8049;@ b end_loop\r
cc68a136 8050\r
8051\r
8052\r
fast MegaDrive/MegaCD/32X emulator