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memhandlers slightly improved
[picodrive.git] / cpu / DrZ80 / drz80.s
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cc68a136 1;@ Reesy's Z80 Emulator Version 0.001\r
2\r
3;@ (c) Copyright 2004 Reesy, All rights reserved\r
4;@ DrZ80 is free for non-commercial use.\r
5\r
6;@ For commercial use, separate licencing terms must be obtained.\r
7\r
8 .data\r
9 .align 4\r
10\r
11 .global DrZ80Run\r
12 .global DrZ80Ver\r
13\r
e5f426aa 14 .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
15 .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
16 .equiv UPDATE_CONTEXT, 0\r
17 .equiv DRZ80_FOR_PICODRIVE, 1\r
cc68a136 18\r
19.if INTERRUPT_MODE\r
e5f426aa 20 .extern Interrupt\r
cc68a136 21.endif\r
22\r
23.if DRZ80_FOR_PICODRIVE\r
e5f426aa 24.include "port_config.s"\r
25 .extern YM2612Read_\r
26.if EXTERNAL_YM2612\r
27 .extern YM2612Read_940\r
28.endif\r
cc68a136 29 .extern PicoRead8\r
30 .extern Pico\r
31 .extern z80_write\r
32.endif\r
33\r
34DrZ80Ver: .long 0x0001\r
35\r
36;@ --------------------------- Defines ----------------------------\r
37;@ Make sure that regs/pointers for z80pc to z80sp match up!\r
38\r
39 opcodes .req r3\r
40 z80_icount .req r4\r
41 cpucontext .req r5\r
42 z80pc .req r6\r
43 z80a .req r7\r
44 z80f .req r8\r
45 z80bc .req r9\r
46 z80de .req r10\r
47 z80hl .req r11\r
48 z80sp .req r12 \r
49 z80xx .req lr\r
50\r
51 .equ z80pc_pointer, 0 ;@ 0\r
52 .equ z80a_pointer, z80pc_pointer+4 ;@ 4\r
53 .equ z80f_pointer, z80a_pointer+4 ;@ 8\r
54 .equ z80bc_pointer, z80f_pointer+4 ;@ \r
55 .equ z80de_pointer, z80bc_pointer+4\r
56 .equ z80hl_pointer, z80de_pointer+4\r
57 .equ z80sp_pointer, z80hl_pointer+4\r
58 .equ z80pc_base, z80sp_pointer+4\r
59 .equ z80sp_base, z80pc_base+4\r
60 .equ z80ix, z80sp_base+4\r
61 .equ z80iy, z80ix+4\r
62 .equ z80i, z80iy+4\r
63 .equ z80a2, z80i+4\r
64 .equ z80f2, z80a2+4\r
65 .equ z80bc2, z80f2+4\r
66 .equ z80de2, z80bc2+4\r
67 .equ z80hl2, z80de2+4\r
68 .equ cycles_pointer, z80hl2+4 \r
69 .equ previouspc, cycles_pointer+4 \r
70 .equ z80irq, previouspc+4\r
71 .equ z80if, z80irq+1\r
72 .equ z80im, z80if+1\r
73 .equ z80r, z80im+1\r
74 .equ z80irqvector, z80r+1\r
75 .equ z80irqcallback, z80irqvector+4\r
76 .equ z80_write8, z80irqcallback+4\r
77 .equ z80_write16, z80_write8+4\r
78 .equ z80_in, z80_write16+4\r
79 .equ z80_out, z80_in+4\r
80 .equ z80_read8, z80_out+4\r
81 .equ z80_read16, z80_read8+4\r
82 .equ z80_rebaseSP, z80_read16+4\r
83 .equ z80_rebasePC, z80_rebaseSP+4\r
84\r
85 .equ VFlag, 0\r
86 .equ CFlag, 1\r
87 .equ ZFlag, 2\r
88 .equ SFlag, 3\r
89 .equ HFlag, 4\r
90 .equ NFlag, 5\r
91 .equ Flag3, 6\r
92 .equ Flag5, 7\r
93\r
94 .equ Z80_CFlag, 0\r
95 .equ Z80_NFlag, 1\r
96 .equ Z80_VFlag, 2\r
97 .equ Z80_Flag3, 3\r
98 .equ Z80_HFlag, 4\r
99 .equ Z80_Flag5, 5\r
100 .equ Z80_ZFlag, 6\r
101 .equ Z80_SFlag, 7\r
102\r
103 .equ Z80_IF1, 1<<0\r
104 .equ Z80_IF2, 1<<1\r
105 .equ Z80_HALT, 1<<2\r
106\r
107;@---------------------------------------\r
108\r
109.text\r
110\r
111.if DRZ80_FOR_PICODRIVE\r
cc68a136 112\r
113.macro YM2612Read_and_ret8\r
e5503e2f 114 stmfd sp!,{r3,r12,lr}\r
cc68a136 115.if EXTERNAL_YM2612\r
116 ldr r1,=PicoOpt\r
117 ldr r1,[r1]\r
118 tst r1,#0x200\r
e5503e2f 119 ldrne r2, =YM2612Read_940\r
120 ldreq r2, =YM2612Read_\r
121 mov lr,pc\r
122 bx r2\r
cc68a136 123.else\r
124 bl YM2612Read_\r
125.endif\r
e5503e2f 126 ldmfd sp!,{r3,r12,pc}\r
cc68a136 127.endm\r
128\r
129.macro YM2612Read_and_ret16\r
e5503e2f 130 stmfd sp!,{r3,r12,lr}\r
cc68a136 131.if EXTERNAL_YM2612\r
132 ldr r0,=PicoOpt\r
133 ldr r0,[r0]\r
134 tst r0,#0x200\r
e5503e2f 135 ldrne r2, =YM2612Read_940\r
136 ldreq r2, =YM2612Read_\r
137 mov lr,pc\r
138 bx r2\r
cc68a136 139 orr r0,r0,r0,lsl #8\r
140.else\r
141 bl YM2612Read_\r
142 orr r0,r0,r0,lsl #8\r
143.endif\r
e5503e2f 144 ldmfd sp!,{r3,r12,pc}\r
cc68a136 145.endm\r
146\r
147pico_z80_read8: @ addr\r
148 cmp r0,#0x2000 @ Z80 RAM\r
149 ldrlt r1,[cpucontext,#z80sp_base]\r
150 ldrltb r0,[r1,r0]\r
151 bxlt lr\r
152\r
153 cmp r0,#0x8000 @ 68k bank\r
154 blt 1f\r
155 ldr r2,=(Pico+0x22212)\r
156 ldrh r1,[r2]\r
157 bic r0,r0,#0x3f8000\r
158 orr r0,r0,r1,lsl #15\r
159 ldr r1,[r2,#-0xe] @ ROM size\r
160 cmp r0,r1\r
161 ldrlt r1,[r2,#-0x12] @ ROM\r
162 eorlt r0,r0,#1 @ our ROM is byteswapped\r
163 ldrltb r0,[r1,r0]\r
164 bxlt lr\r
165 stmfd sp!,{r3,r12,lr}\r
166 bl PicoRead8\r
167 ldmfd sp!,{r3,r12,pc}\r
1681:\r
169 mov r1,r0,lsr #13\r
170 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
171 bne 0f\r
172 and r0,r0,#3\r
e5503e2f 173 YM2612Read_and_ret8\r
cc68a136 1740:\r
175 cmp r0,#0x4000\r
176 movge r0,#0xff\r
177 bxge lr\r
178 ldr r1,[cpucontext,#z80sp_base]\r
179 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
180 ldrb r0,[r1,r0]\r
181 bx lr\r
182\r
183pico_z80_read16: @ addr\r
184 cmp r0,#0x2000 @ Z80 RAM\r
185 bge 2f\r
186 ldr r1,[cpucontext,#z80sp_base]\r
187 ldrb r0,[r1,r0]!\r
188 ldrb r1,[r1,#1]\r
189 orr r0,r0,r1,lsl #8\r
190 bx lr\r
191\r
1922:\r
193 cmp r0,#0x8000 @ 68k bank\r
194 blt 1f\r
195 ldr r2,=(Pico+0x22212)\r
196 ldrh r1,[r2]\r
197 bic r0,r0,#0x1f8000\r
198 orr r0,r0,r1,lsl #15\r
199 ldr r1,[r2,#-0xe] @ ROM size\r
200 cmp r0,r1\r
201 ldr r1,[r2,#-0x12] @ ROM\r
202 tst r0,#1\r
203 eor r0,r0,#1\r
204 ldrb r0,[r1,r0]!\r
205 ldreqb r1,[r1,#-1]\r
206 ldrneb r1,[r1,#3] @ this is due to byteswapped ROM\r
207 orr r0,r0,r1,lsl #8\r
208 bx lr\r
2093:\r
210 stmfd sp!,{r3-r5,r12,lr}\r
211 mov r4,r0\r
212 bl PicoRead8\r
213 mov r5,r0\r
214 add r0,r4,#1\r
215 bl PicoRead8\r
216 orr r0,r5,r0,lsl #8\r
217 ldmfd sp!,{r3-r5,r12,pc}\r
2181:\r
219 mov r1,r0,lsr #13\r
220 cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
221 bne 0f\r
222 and r0,r0,#3\r
223 YM2612Read_and_ret16\r
2240:\r
225 cmp r0,#0x4000\r
226 movge r0,#0xff\r
227 bxge lr\r
228 ldr r1,[cpucontext,#z80sp_base]\r
229 bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
230 ldrb r0,[r1,r0]!\r
231 ldrb r1,[r1,#1]\r
232 orr r0,r0,r1,lsl #8\r
233 bx lr\r
234\r
235pico_z80_write8: @ data, addr\r
236 cmp r1,#0x4000\r
237 bge 1f\r
238 ldr r2,[cpucontext,#z80sp_base]\r
239 bic r1,r1,#0x0fe000 @ Z80 RAM\r
240 strb r0,[r2,r1]\r
241 bx lr\r
2421:\r
243 stmfd sp!,{r3,r12,lr}\r
244 bl z80_write\r
245 ldmfd sp!,{r3,r12,pc}\r
246\r
247pico_z80_write16: @ data, addr\r
248 cmp r1,#0x4000\r
249 bge 1f\r
250 ldr r2,[cpucontext,#z80sp_base]\r
251 bic r1,r1,#0x0fe000 @ Z80 RAM\r
252 strb r0,[r2,r1]!\r
253 mov r0,r0,lsr #8\r
254 strb r0,[r2,#1]\r
255 bx lr\r
2561:\r
257 stmfd sp!,{r3-r5,r12,lr}\r
258 mov r4,r0\r
259 mov r5,r1\r
260 bl z80_write\r
261 mov r0,r4,lsr #8\r
262 add r1,r5,#1\r
263 bl z80_write\r
264 ldmfd sp!,{r3-r5,r12,pc}\r
265\r
266 .pool\r
267.endif\r
268\r
269.macro fetch cycs\r
270 subs z80_icount,z80_icount,#\cycs\r
271.if UPDATE_CONTEXT\r
272 str z80pc,[cpucontext,#z80pc_pointer]\r
273 str z80_icount,[cpucontext,#cycles_pointer]\r
274 ldr r1,[cpucontext,#z80pc_base]\r
275 sub r2,z80pc,r1\r
276 str r2,[cpucontext,#previouspc]\r
277.endif\r
278 ldrplb r0,[z80pc],#1\r
279 ldrpl pc,[opcodes,r0, lsl #2]\r
280 bmi z80_execute_end\r
281.endm\r
282\r
283.macro eatcycles cycs\r
284 sub z80_icount,z80_icount,#\cycs\r
285.if UPDATE_CONTEXT\r
286 str z80_icount,[cpucontext,#cycles_pointer]\r
287.endif\r
288.endm\r
289\r
290.macro readmem8\r
291.if UPDATE_CONTEXT\r
292 str z80pc,[cpucontext,#z80pc_pointer]\r
293.endif\r
294.if DRZ80_FOR_PICODRIVE\r
295 bl pico_z80_read8\r
296.else\r
297 stmfd sp!,{r3,r12}\r
298 mov lr,pc\r
299 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
300 ldmfd sp!,{r3,r12}\r
301.endif\r
302.endm\r
303\r
304.macro readmem8HL\r
305 mov r0,z80hl, lsr #16\r
306 readmem8\r
307.endm\r
308\r
309.macro readmem16\r
310.if UPDATE_CONTEXT\r
311 str z80pc,[cpucontext,#z80pc_pointer]\r
312.endif\r
313.if DRZ80_FOR_PICODRIVE\r
314 bl pico_z80_read16\r
315.else\r
316 stmfd sp!,{r3,r12}\r
317 mov lr,pc\r
318 ldr pc,[cpucontext,#z80_read16]\r
319 ldmfd sp!,{r3,r12}\r
320.endif\r
321.endm\r
322\r
323.macro writemem8\r
324.if UPDATE_CONTEXT\r
325 str z80pc,[cpucontext,#z80pc_pointer]\r
326.endif\r
327.if DRZ80_FOR_PICODRIVE\r
328 bl pico_z80_write8\r
329.else\r
330 stmfd sp!,{r3,r12}\r
331 mov lr,pc\r
332 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
333 ldmfd sp!,{r3,r12}\r
334.endif\r
335.endm\r
336\r
337.macro writemem8DE\r
338 mov r1,z80de, lsr #16\r
339 writemem8\r
340.endm\r
341\r
342.macro writemem8HL\r
343 mov r1,z80hl, lsr #16\r
344 writemem8\r
345.endm\r
346\r
347.macro writemem16\r
348.if UPDATE_CONTEXT\r
349 str z80pc,[cpucontext,#z80pc_pointer]\r
350.endif\r
351.if DRZ80_FOR_PICODRIVE\r
352 bl pico_z80_write16\r
353.else\r
354 stmfd sp!,{r3,r12}\r
355 mov lr,pc\r
356 ldr pc,[cpucontext,#z80_write16] ;@ r0=data r1=addr\r
357 ldmfd sp!,{r3,r12}\r
358.endif\r
359.endm\r
360\r
361.macro copymem8HL_DE\r
362.if UPDATE_CONTEXT\r
363 str z80pc,[cpucontext,#z80pc_pointer]\r
364.endif\r
365 mov r0,z80hl, lsr #16\r
366.if DRZ80_FOR_PICODRIVE\r
367 bl pico_z80_read8\r
368.else\r
369 stmfd sp!,{r3,r12}\r
370 mov lr,pc\r
371 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
372.endif\r
373.if UPDATE_CONTEXT\r
374 str z80pc,[cpucontext,#z80pc_pointer]\r
375.endif\r
376 mov r1,z80de, lsr #16\r
377.if DRZ80_FOR_PICODRIVE\r
378 bl pico_z80_write8\r
379.else\r
380 mov lr,pc\r
381 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
382 ldmfd sp!,{r3,r12}\r
383.endif\r
384.endm\r
385;@---------------------------------------\r
386\r
387.macro rebasepc\r
388.if UPDATE_CONTEXT\r
389 str z80pc,[cpucontext,#z80pc_pointer]\r
390.endif\r
391.if DRZ80_FOR_PICODRIVE\r
392 bic r0,r0,#0xfe000\r
393 ldr r1,[cpucontext,#z80pc_base]\r
394 add z80pc,r1,r0\r
395.else\r
396 stmfd sp!,{r3,r12}\r
397 mov lr,pc\r
398 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
399 ldmfd sp!,{r3,r12}\r
400 mov z80pc,r0\r
401.endif\r
402.endm\r
403\r
404.macro rebasesp\r
405.if UPDATE_CONTEXT\r
406 str z80pc,[cpucontext,#z80pc_pointer]\r
407.endif\r
408.if DRZ80_FOR_PICODRIVE\r
409 bic r0,r0,#0xfe000\r
410 ldr r1,[cpucontext,#z80sp_base]\r
411 add r0,r1,r0\r
412.else\r
413 stmfd sp!,{r3,r12}\r
414 mov lr,pc\r
415 ldr pc,[cpucontext,#z80_rebaseSP] ;@ external function must rebase sp\r
416 ldmfd sp!,{r3,r12}\r
417.endif\r
418.endm\r
419;@----------------------------------------------------------------------------\r
420\r
421.macro opADC\r
422 movs z80f,z80f,lsr#2 ;@ get C\r
423 subcs r0,r0,#0x100\r
424 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of half carry\r
425 adcs z80a,z80a,r0,ror#8\r
426 mrs r0,cpsr ;@ S,Z,V&C\r
427 eor z80f,z80f,z80a,lsr#24\r
428 and z80f,z80f,#1<<HFlag ;@ H, correct\r
429 orr z80f,z80f,r0,lsr#28\r
430.endm\r
431\r
432.macro opADCA\r
433 movs z80f,z80f,lsr#2 ;@ get C\r
434 orrcs z80a,z80a,#0x00800000\r
435 adds z80a,z80a,z80a\r
436 mrs z80f,cpsr ;@ S,Z,V&C\r
437 mov z80f,z80f,lsr#28\r
438 tst z80a,#0x10000000 ;@ H, correct\r
439 orrne z80f,z80f,#1<<HFlag\r
440 fetch 4\r
441.endm\r
442\r
443.macro opADCH reg\r
444 mov r0,\reg,lsr#24\r
445 opADC\r
446 fetch 4\r
447.endm\r
448\r
449.macro opADCL reg\r
450 movs z80f,z80f,lsr#2 ;@ get C\r
451 adc r0,\reg,\reg,lsr#15\r
452 orrcs z80a,z80a,#0x00800000\r
453 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
454 adds z80a,z80a,r0,lsl#23\r
455 mrs z80f,cpsr ;@ S,Z,V&C\r
456 mov z80f,z80f,lsr#28\r
457 cmn r1,r0,lsl#27\r
458 orrcs z80f,z80f,#1<<HFlag ;@ H, correct\r
459 fetch 4\r
460.endm\r
461\r
462.macro opADCb\r
463 opADC\r
464.endm\r
465;@---------------------------------------\r
466\r
467.macro opADD reg shift\r
468 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
469 adds z80a,z80a,\reg,lsl#\shift\r
470 mrs z80f,cpsr ;@ S,Z,V&C\r
471 mov z80f,z80f,lsr#28\r
472 cmn r1,\reg,lsl#\shift+4\r
473 orrcs z80f,z80f,#1<<HFlag\r
474.endm\r
475\r
476.macro opADDA\r
477 adds z80a,z80a,z80a\r
478 mrs z80f,cpsr ;@ S,Z,V&C\r
479 mov z80f,z80f,lsr#28\r
480 tst z80a,#0x10000000 ;@ H, correct\r
481 orrne z80f,z80f,#1<<HFlag\r
482 fetch 4\r
483.endm\r
484\r
485.macro opADDH reg\r
486 and r0,\reg,#0xFF000000\r
487 opADD r0 0\r
488 fetch 4\r
489.endm\r
490\r
491.macro opADDL reg\r
492 opADD \reg 8\r
493 fetch 4\r
494.endm\r
495\r
496.macro opADDb \r
497 opADD r0 24\r
498.endm\r
499;@---------------------------------------\r
500\r
501.macro opADC16 reg\r
502 movs z80f,z80f,lsr#2 ;@ get C\r
503 adc r0,z80a,\reg,lsr#15\r
504 orrcs z80hl,z80hl,#0x00008000\r
505 mov r1,z80hl,lsl#4\r
506 adds z80hl,z80hl,r0,lsl#15\r
507 mrs z80f,cpsr ;@ S, Z, V & C\r
508 mov z80f,z80f,lsr#28\r
509 cmn r1,r0,lsl#19\r
510 orrcs z80f,z80f,#1<<HFlag\r
511 fetch 15\r
512.endm\r
513\r
514.macro opADC16HL\r
515 movs z80f,z80f,lsr#2 ;@ get C\r
516 orrcs z80hl,z80hl,#0x00008000\r
517 adds z80hl,z80hl,z80hl\r
518 mrs z80f,cpsr ;@ S, Z, V & C\r
519 mov z80f,z80f,lsr#28\r
520 tst z80hl,#0x10000000 ;@ H, correct.\r
521 orrne z80f,z80f,#1<<HFlag\r
522 fetch 15\r
523.endm\r
524\r
525.macro opADD16 reg1 reg2\r
526 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
527 adds \reg1,\reg1,\reg2\r
528 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
529 orrcs z80f,z80f,#1<<CFlag\r
530 cmn r1,\reg2,lsl#4\r
531 orrcs z80f,z80f,#1<<HFlag\r
532.endm\r
533\r
534.macro opADD16s reg1 reg2 shift\r
535 mov r1,\reg1,lsl#4 ;@ Prepare for check of half carry\r
536 adds \reg1,\reg1,\reg2,lsl#\shift\r
537 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
538 orrcs z80f,z80f,#1<<CFlag\r
539 cmn r1,\reg2,lsl#4+\shift\r
540 orrcs z80f,z80f,#1<<HFlag\r
541.endm\r
542\r
543.macro opADD16_2 reg\r
544 adds \reg,\reg,\reg\r
545 bic z80f,z80f,#(1<<CFlag)|(1<<HFlag)|(1<<NFlag)\r
546 orrcs z80f,z80f,#1<<CFlag\r
547 tst \reg,#0x10000000 ;@ H, correct.\r
548 orrne z80f,z80f,#1<<HFlag\r
549.endm\r
550;@---------------------------------------\r
551\r
552.macro opAND reg shift\r
553 and z80a,z80a,\reg,lsl#\shift\r
554 sub r0,opcodes,#0x100\r
555 ldrb z80f,[r0,z80a, lsr #24]\r
556 orr z80f,z80f,#1<<HFlag\r
557.endm\r
558\r
559.macro opANDA\r
560 sub r0,opcodes,#0x100\r
561 ldrb z80f,[r0,z80a, lsr #24]\r
562 orr z80f,z80f,#1<<HFlag\r
563 fetch 4\r
564.endm\r
565\r
566.macro opANDH reg\r
567 opAND \reg 0\r
568 fetch 4\r
569.endm\r
570\r
571.macro opANDL reg\r
572 opAND \reg 8\r
573 fetch 4\r
574.endm\r
575\r
576.macro opANDb\r
577 opAND r0 24\r
578.endm\r
579;@---------------------------------------\r
580\r
581.macro opBITH reg bit\r
582 and z80f,z80f,#1<<CFlag\r
583 tst \reg,#1<<(24+\bit)\r
584 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
585 orrne z80f,z80f,#(1<<HFlag)\r
586 fetch 8\r
587.endm\r
588\r
589.macro opBIT7H reg\r
590 and z80f,z80f,#1<<CFlag\r
591 tst \reg,#1<<(24+7)\r
592 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
593 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
594 fetch 8\r
595.endm\r
596\r
597.macro opBITL reg bit\r
598 and z80f,z80f,#1<<CFlag\r
599 tst \reg,#1<<(16+\bit)\r
600 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
601 orrne z80f,z80f,#(1<<HFlag)\r
602 fetch 8\r
603.endm\r
604\r
605.macro opBIT7L reg\r
606 and z80f,z80f,#1<<CFlag\r
607 tst \reg,#1<<(16+7)\r
608 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
609 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
610 fetch 8\r
611.endm\r
612\r
613.macro opBITb bit\r
614 and z80f,z80f,#1<<CFlag\r
615 tst r0,#1<<\bit\r
616 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
617 orrne z80f,z80f,#(1<<HFlag)\r
618.endm\r
619\r
620.macro opBIT7b\r
621 and z80f,z80f,#1<<CFlag\r
622 tst r0,#1<<7\r
623 orreq z80f,z80f,#(1<<HFlag)|(1<<ZFlag)|(1<<VFlag)\r
624 orrne z80f,z80f,#(1<<HFlag)|(1<<SFlag)\r
625.endm\r
626;@---------------------------------------\r
627\r
628.macro opCP reg shift\r
629 mov r1,z80a,lsl#4 ;@ prepare for check of half carry\r
630 cmp z80a,\reg,lsl#\shift\r
631 mrs z80f,cpsr\r
632 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
633 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
634 cmp r1,\reg,lsl#\shift+4\r
635 orrcc z80f,z80f,#1<<HFlag\r
636.endm\r
637\r
638.macro opCPA\r
639 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
640 fetch 4\r
641.endm\r
642\r
643.macro opCPH reg\r
644 and r0,\reg,#0xFF000000\r
645 opCP r0 0\r
646 fetch 4\r
647.endm\r
648\r
649.macro opCPL reg\r
650 opCP \reg 8\r
651 fetch 4\r
652.endm\r
653\r
654.macro opCPb\r
655 opCP r0 24\r
656.endm\r
657;@---------------------------------------\r
658\r
659.macro opDEC8 reg ;@for A and memory\r
660 and z80f,z80f,#1<<CFlag ;@save carry\r
661 orr z80f,z80f,#1<<NFlag ;@set n\r
662 tst \reg,#0x0f000000\r
663 orreq z80f,z80f,#1<<HFlag\r
664 subs \reg,\reg,#0x01000000\r
665 orrmi z80f,z80f,#1<<SFlag\r
666 orrvs z80f,z80f,#1<<VFlag\r
667 orreq z80f,z80f,#1<<ZFlag\r
668.endm\r
669\r
670.macro opDEC8H reg ;@for B, D & H\r
671 and z80f,z80f,#1<<CFlag ;@save carry\r
672 orr z80f,z80f,#1<<NFlag ;@set n\r
673 tst \reg,#0x0f000000\r
674 orreq z80f,z80f,#1<<HFlag\r
675 subs \reg,\reg,#0x01000000\r
676 orrmi z80f,z80f,#1<<SFlag\r
677 orrvs z80f,z80f,#1<<VFlag\r
678 tst \reg,#0xff000000 ;@Z\r
679 orreq z80f,z80f,#1<<ZFlag\r
680.endm\r
681\r
682.macro opDEC8L reg ;@for C, E & L\r
683 mov \reg,\reg,ror#24\r
684 opDEC8H \reg\r
685 mov \reg,\reg,ror#8\r
686.endm\r
687\r
688.macro opDEC8b ;@for memory\r
689 mov r0,r0,lsl#24\r
690 opDEC8 r0\r
691 mov r0,r0,lsr#24\r
692.endm\r
693;@---------------------------------------\r
694\r
695.macro opIN\r
696 stmfd sp!,{r3,r12}\r
697 mov lr,pc\r
698 ldr pc,[cpucontext,#z80_in] ;@ r0=port - data returned in r0\r
699 ldmfd sp!,{r3,r12}\r
700.endm\r
701\r
702.macro opIN_C\r
703 mov r0,z80bc, lsr #16\r
704 opIN\r
705.endm\r
706;@---------------------------------------\r
707\r
708.macro opINC8 reg ;@for A and memory\r
709 and z80f,z80f,#1<<CFlag ;@save carry, clear n\r
710 adds \reg,\reg,#0x01000000\r
711 orrmi z80f,z80f,#1<<SFlag\r
712 orrvs z80f,z80f,#1<<VFlag\r
713 orrcs z80f,z80f,#1<<ZFlag ;@cs when going from 0xFF to 0x00\r
714 tst \reg,#0x0f000000\r
715 orreq z80f,z80f,#1<<HFlag\r
716.endm\r
717\r
718.macro opINC8H reg ;@for B, D & H\r
719 opINC8 \reg\r
720.endm\r
721\r
722.macro opINC8L reg ;@for C, E & L\r
723 mov \reg,\reg,ror#24\r
724 opINC8 \reg\r
725 mov \reg,\reg,ror#8\r
726.endm\r
727\r
728.macro opINC8b ;@for memory\r
729 mov r0,r0,lsl#24\r
730 opINC8 r0\r
731 mov r0,r0,lsr#24\r
732.endm\r
733;@---------------------------------------\r
734\r
735.macro opOR reg shift\r
736 orr z80a,z80a,\reg,lsl#\shift\r
737 sub r0,opcodes,#0x100\r
738 ldrb z80f,[r0,z80a, lsr #24]\r
739.endm\r
740\r
741.macro opORA\r
742 sub r0,opcodes,#0x100\r
743 ldrb z80f,[r0,z80a, lsr #24]\r
744 fetch 4\r
745.endm\r
746\r
747.macro opORH reg\r
748 and r0,\reg,#0xFF000000\r
749 opOR r0 0\r
750 fetch 4\r
751.endm\r
752\r
753.macro opORL reg\r
754 opOR \reg 8\r
755 fetch 4\r
756.endm\r
757\r
758.macro opORb\r
759 opOR r0 24\r
760.endm\r
761;@---------------------------------------\r
762\r
763.macro opOUT\r
764 stmfd sp!,{r3,r12}\r
765 mov lr,pc\r
766 ldr pc,[cpucontext,#z80_out] ;@ r0=port r1=data\r
767 ldmfd sp!,{r3,r12}\r
768.endm\r
769\r
770.macro opOUT_C\r
771 mov r0,z80bc, lsr #16\r
772 opOUT\r
773.endm\r
774;@---------------------------------------\r
775\r
776.macro opPOP\r
777.if FAST_Z80SP\r
778.if DRZ80_FOR_PICODRIVE\r
779 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
780 ldr r2,[cpucontext,#z80sp_base]\r
781 ldrb r0,[z80sp],#1\r
782 add r2,r2,#0x2000\r
783 cmp z80sp,r2\r
784@ subge z80sp,z80sp,#0x2000 @ unstable?\r
785 ldrb r1,[z80sp],#1\r
786 cmp z80sp,r2\r
787@ subge z80sp,z80sp,#0x2000\r
788 orr r0,r0,r1, lsl #8\r
789.else\r
790 ldrb r0,[z80sp],#1\r
791 ldrb r1,[z80sp],#1\r
792 orr r0,r0,r1, lsl #8\r
793.endif\r
794.else\r
795 mov r0,z80sp\r
796 readmem16\r
797 add z80sp,z80sp,#2\r
798.endif\r
799.endm\r
800\r
801.macro opPOPreg reg\r
802 opPOP\r
803 mov \reg,r0, lsl #16\r
804 fetch 10\r
805.endm\r
806;@---------------------------------------\r
807\r
808.macro opPUSHareg reg @ reg > r1\r
809.if FAST_Z80SP\r
810.if DRZ80_FOR_PICODRIVE\r
811 @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
812 ldr r0,[cpucontext,#z80sp_base]\r
813 cmp z80sp,r0\r
814 addle z80sp,z80sp,#0x2000\r
815 mov r1,\reg, lsr #8\r
816 strb r1,[z80sp,#-1]!\r
817 cmp z80sp,r0\r
818 addle z80sp,z80sp,#0x2000\r
819 strb \reg,[z80sp,#-1]!\r
820.else\r
821 mov r1,\reg, lsr #8\r
822 strb r1,[z80sp,#-1]!\r
823 strb \reg,[z80sp,#-1]!\r
824.endif\r
825.else\r
826 mov r0,\reg\r
827 sub z80sp,z80sp,#2\r
828 mov r1,z80sp\r
829 writemem16\r
830.endif\r
831.endm\r
832\r
833.macro opPUSHreg reg\r
834.if FAST_Z80SP\r
835.if DRZ80_FOR_PICODRIVE\r
836 ldr r0,[cpucontext,#z80sp_base]\r
837 cmp z80sp,r0\r
838 addle z80sp,z80sp,#0x2000\r
839 mov r1,\reg, lsr #24\r
840 strb r1,[z80sp,#-1]!\r
841 cmp z80sp,r0\r
842 addle z80sp,z80sp,#0x2000\r
843 mov r1,\reg, lsr #16\r
844 strb r1,[z80sp,#-1]!\r
845.else\r
846 mov r1,\reg, lsr #24\r
847 strb r1,[z80sp,#-1]!\r
848 mov r1,\reg, lsr #16\r
849 strb r1,[z80sp,#-1]!\r
850.endif\r
851.else\r
852 mov r0,\reg,lsr #16\r
853 sub z80sp,z80sp,#2\r
854 mov r1,z80sp\r
855 writemem16\r
856.endif\r
857.endm\r
858;@---------------------------------------\r
859\r
860.macro opRESmemHL bit\r
861.if DRZ80_FOR_PICODRIVE\r
862 mov r0,z80hl, lsr #16\r
863 bl pico_z80_read8\r
864 bic r0,r0,#1<<\bit\r
865 mov r1,z80hl, lsr #16\r
866 bl pico_z80_write8\r
867.else\r
868 mov r0,z80hl, lsr #16\r
869 stmfd sp!,{r3,r12}\r
870 mov lr,pc\r
871 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
872 bic r0,r0,#1<<\bit\r
873 mov r1,z80hl, lsr #16\r
874 mov lr,pc\r
875 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
876 ldmfd sp!,{r3,r12}\r
877.endif\r
878 fetch 15\r
879.endm\r
880;@---------------------------------------\r
881\r
882.macro opRESmem bit\r
883.if DRZ80_FOR_PICODRIVE\r
884 stmfd sp!,{r0} ;@ save addr as well\r
885 bl pico_z80_read8\r
886 bic r0,r0,#1<<\bit\r
887 ldmfd sp!,{r1} ;@ restore addr into r1\r
888 bl pico_z80_write8\r
889.else\r
890 stmfd sp!,{r3,r12}\r
891 stmfd sp!,{r0} ;@ save addr as well\r
892 mov lr,pc\r
893 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
894 bic r0,r0,#1<<\bit\r
895 ldmfd sp!,{r1} ;@ restore addr into r1\r
896 mov lr,pc\r
897 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
898 ldmfd sp!,{r3,r12}\r
899.endif\r
900 fetch 23\r
901.endm\r
902;@---------------------------------------\r
903\r
904.macro opRL reg1 reg2 shift\r
905 movs \reg1,\reg2,lsl \shift\r
906 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
907 orrne \reg1,\reg1,#0x01000000\r
908;@ and r2,z80f,#1<<CFlag\r
909;@ orr $x,$x,r2,lsl#23\r
910 sub r1,opcodes,#0x100\r
911 ldrb z80f,[r1,\reg1,lsr#24] ;@get PZS\r
912 orrcs z80f,z80f,#1<<CFlag\r
913.endm\r
914\r
915.macro opRLA\r
916 opRL z80a, z80a, #1\r
917 fetch 8\r
918.endm\r
919\r
920.macro opRLH reg\r
921 and r0,\reg,#0xFF000000 ;@mask high to r0\r
922 adds \reg,\reg,r0\r
923 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
924 orrne \reg,\reg,#0x01000000\r
925 sub r1,opcodes,#0x100\r
926 ldrb z80f,[r1,\reg,lsr#24] ;@get PZS\r
927 orrcs z80f,z80f,#1<<CFlag\r
928 fetch 8\r
929.endm\r
930\r
931.macro opRLL reg\r
932 opRL r0, \reg, #9\r
933 and \reg,\reg,#0xFF000000 ;@mask out high\r
934 orr \reg,\reg,r0,lsr#8\r
935 fetch 8\r
936.endm\r
937\r
938.macro opRLb\r
939 opRL r0, r0, #25\r
940 mov r0,r0,lsr#24\r
941.endm\r
942;@---------------------------------------\r
943\r
944.macro opRLC reg1 reg2 shift\r
945 movs \reg1,\reg2,lsl#\shift\r
946 orrcs \reg1,\reg1,#0x01000000\r
947 sub r1,opcodes,#0x100\r
948 ldrb z80f,[r1,\reg1,lsr#24]\r
949 orrcs z80f,z80f,#1<<CFlag\r
950.endm\r
951\r
952.macro opRLCA\r
953 opRLC z80a, z80a, 1\r
954 fetch 8\r
955.endm\r
956\r
957.macro opRLCH reg\r
958 and r0,\reg,#0xFF000000 ;@mask high to r0\r
959 adds \reg,\reg,r0\r
960 orrcs \reg,\reg,#0x01000000\r
961 sub r1,opcodes,#0x100\r
962 ldrb z80f,[r1,\reg,lsr#24]\r
963 orrcs z80f,z80f,#1<<CFlag\r
964 fetch 8\r
965.endm\r
966\r
967.macro opRLCL reg\r
968 opRLC r0, \reg, 9\r
969 and \reg,\reg,#0xFF000000 ;@mask out high\r
970 orr \reg,\reg,r0,lsr#8\r
971 fetch 8\r
972.endm\r
973\r
974.macro opRLCb\r
975 opRLC r0, r0, 25\r
976 mov r0,r0,lsr#24\r
977.endm\r
978;@---------------------------------------\r
979\r
980.macro opRR reg1 reg2 shift\r
981 movs \reg1,\reg2,lsr#\shift\r
982 tst z80f,#1<<CFlag ;@doesn't affect ARM carry, as long as the imidiate value is < 0x100. Watch out!\r
983 orrne \reg1,\reg1,#0x00000080\r
984;@ and r2,z80_f,#PSR_C\r
985;@ orr \reg1,\reg1,r2,lsl#6\r
986 sub r1,opcodes,#0x100\r
987 ldrb z80f,[r1,\reg1]\r
988 orrcs z80f,z80f,#1<<CFlag\r
989.endm\r
990\r
991.macro opRRA\r
992 orr z80a,z80a,z80f,lsr#1 ;@get C\r
993 movs z80a,z80a,ror#25\r
994 mov z80a,z80a,lsl#24\r
995 sub r1,opcodes,#0x100\r
996 ldrb z80f,[r1,z80a,lsr#24]\r
997 orrcs z80f,z80f,#1<<CFlag\r
998 fetch 8\r
999.endm\r
1000\r
1001.macro opRRH reg\r
1002 orr r0,\reg,z80f,lsr#1 ;@get C\r
1003 movs r0,r0,ror#25\r
1004 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1005 orr \reg,\reg,r0,lsl#24\r
1006 sub r1,opcodes,#0x100\r
1007 ldrb z80f,[r1,\reg,lsr#24]\r
1008 orrcs z80f,z80f,#1<<CFlag\r
1009 fetch 8\r
1010.endm\r
1011\r
1012.macro opRRL reg\r
1013 and r0,\reg,#0x00FF0000 ;@mask out low to r0\r
1014 opRR r0 r0 17\r
1015 and \reg,\reg,#0xFF000000 ;@mask out high\r
1016 orr \reg,\reg,r0,lsl#16\r
1017 fetch 8\r
1018.endm\r
1019\r
1020.macro opRRb\r
1021 opRR r0 r0 1\r
1022.endm\r
1023;@---------------------------------------\r
1024\r
1025.macro opRRC reg1 reg2 shift\r
1026 movs \reg1,\reg2,lsr#\shift\r
1027 orrcs \reg1,\reg1,#0x00000080\r
1028 sub r1,opcodes,#0x100\r
1029 ldrb z80f,[r1,\reg1]\r
1030 orrcs z80f,z80f,#1<<CFlag\r
1031.endm\r
1032\r
1033.macro opRRCA\r
1034 opRRC z80a, z80a, 25\r
1035 mov z80a,z80a,lsl#24\r
1036 fetch 8\r
1037.endm\r
1038\r
1039.macro opRRCH reg\r
1040 opRRC r0, \reg, 25\r
1041 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1042 orr \reg,\reg,r0,lsl#24\r
1043 fetch 8\r
1044.endm\r
1045\r
1046.macro opRRCL reg\r
1047 and r0,\reg,#0x00FF0000 ;@mask low to r0\r
1048 opRRC r0, r0, 17\r
1049 and \reg,\reg,#0xFF000000 ;@mask out high\r
1050 orr \reg,\reg,r0,lsl#16\r
1051 fetch 8\r
1052.endm\r
1053\r
1054.macro opRRCb\r
1055 opRRC r0, r0, 1\r
1056.endm\r
1057;@---------------------------------------\r
1058\r
1059.macro opRST addr\r
1060 ldr r0,[cpucontext,#z80pc_base]\r
1061 sub r2,z80pc,r0\r
1062 opPUSHareg r2\r
1063 mov r0,#\addr\r
1064 rebasepc\r
1065 fetch 11\r
1066.endm\r
1067;@---------------------------------------\r
1068\r
1069.macro opSBC\r
1070 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1071 movs z80f,z80f,lsr#2 ;@ get C\r
1072 subcc r0,r0,#0x100\r
1073 eor z80f,r0,z80a,lsr#24 ;@ prepare for check of H\r
1074 sbcs z80a,z80a,r0,ror#8\r
1075 mrs r0,cpsr\r
1076 eor z80f,z80f,z80a,lsr#24\r
1077 and z80f,z80f,#1<<HFlag ;@ H, correct\r
1078 orr z80f,z80f,r0,lsr#28 ;@ S,Z,V&C\r
1079 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1080.endm\r
1081\r
1082.macro opSBCA\r
1083 movs z80f,z80f,lsr#2 ;@ get C\r
1084 movcc z80a,#0x00000000\r
1085 movcs z80a,#0xFF000000\r
1086 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1087 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1088 fetch 4\r
1089.endm\r
1090\r
1091.macro opSBCH reg\r
1092 mov r0,\reg,lsr#24\r
1093 opSBC\r
1094 fetch 4\r
1095.endm\r
1096\r
1097.macro opSBCL reg\r
1098 mov r0,\reg,lsl#8\r
1099 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1100 movs z80f,z80f,lsr#2 ;@ get C\r
1101 sbccc r0,r0,#0xFF000000\r
1102 mov r1,z80a,lsl#4 ;@ prepare for check of H\r
1103 sbcs z80a,z80a,r0\r
1104 mrs z80f,cpsr\r
1105 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1106 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1107 cmp r1,r0,lsl#4\r
1108 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1109 fetch 4\r
1110.endm\r
1111\r
1112.macro opSBCb\r
1113 opSBC\r
1114.endm\r
1115;@---------------------------------------\r
1116\r
1117.macro opSBC16 reg\r
1118 eor z80f,z80f,#1<<CFlag ;@ invert C\r
1119 movs z80f,z80f,lsr#2 ;@ get C\r
1120 sbc r1,r1,r1 ;@ set r1 to -1 or 0.\r
1121 orr r0,\reg,r1,lsr#16\r
1122 mov r1,z80hl,lsl#4 ;@ prepare for check of H\r
1123 sbcs z80hl,z80hl,r0\r
1124 mrs z80f,cpsr\r
1125 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1126 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n.\r
1127 cmp r1,r0,lsl#4\r
1128 orrcc z80f,z80f,#1<<HFlag ;@ H, correct\r
1129 fetch 15\r
1130.endm\r
1131\r
1132.macro opSBC16HL\r
1133 movs z80f,z80f,lsr#2 ;@ get C\r
1134 mov z80hl,#0x00000000\r
1135 subcs z80hl,z80hl,#0x00010000\r
1136 movcc z80f,#(1<<NFlag)|(1<<ZFlag)\r
1137 movcs z80f,#(1<<NFlag)|(1<<SFlag)|(1<<CFlag)|(1<<HFlag)\r
1138 fetch 15\r
1139.endm\r
1140;@---------------------------------------\r
1141\r
1142.macro opSETmemHL bit\r
1143.if DRZ80_FOR_PICODRIVE\r
1144 mov r0,z80hl, lsr #16\r
1145 bl pico_z80_read8\r
1146 orr r0,r0,#1<<\bit\r
1147 mov r1,z80hl, lsr #16\r
1148 bl pico_z80_write8\r
1149.else\r
1150 mov r0,z80hl, lsr #16\r
1151 stmfd sp!,{r3,r12}\r
1152 mov lr,pc\r
1153 ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
1154 orr r0,r0,#1<<\bit\r
1155 mov r1,z80hl, lsr #16\r
1156 mov lr,pc\r
1157 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1158 ldmfd sp!,{r3,r12}\r
1159.endif\r
1160 fetch 15\r
1161.endm\r
1162;@---------------------------------------\r
1163\r
1164.macro opSETmem bit\r
1165.if DRZ80_FOR_PICODRIVE\r
1166 stmfd sp!,{r0} ;@ save addr as well\r
1167 bl pico_z80_read8\r
1168 orr r0,r0,#1<<\bit\r
1169 ldmfd sp!,{r1} ;@ restore addr into r1\r
1170 bl pico_z80_write8\r
1171.else\r
1172 stmfd sp!,{r3,r12}\r
1173 stmfd sp!,{r0} ;@ save addr as well\r
1174 mov lr,pc\r
1175 ldr pc,[cpucontext,#z80_read8] ;@ r0=addr - data returned in r0\r
1176 orr r0,r0,#1<<\bit\r
1177 ldmfd sp!,{r1} ;@ restore addr into r1\r
1178 mov lr,pc\r
1179 ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
1180 ldmfd sp!,{r3,r12}\r
1181.endif\r
1182 fetch 23\r
1183.endm\r
1184;@---------------------------------------\r
1185\r
1186.macro opSLA reg1 reg2 shift\r
1187 movs \reg1,\reg2,lsl#\shift\r
1188 sub r1,opcodes,#0x100\r
1189 ldrb z80f,[r1,\reg1,lsr#24]\r
1190 orrcs z80f,z80f,#1<<CFlag\r
1191.endm\r
1192\r
1193.macro opSLAA\r
1194 opSLA z80a, z80a, 1\r
1195 fetch 8\r
1196.endm\r
1197\r
1198.macro opSLAH reg\r
1199 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1200 adds \reg,\reg,r0\r
1201 sub r1,opcodes,#0x100\r
1202 ldrb z80f,[r1,\reg,lsr#24]\r
1203 orrcs z80f,z80f,#1<<CFlag\r
1204 fetch 8\r
1205.endm\r
1206\r
1207.macro opSLAL reg\r
1208 opSLA r0, \reg, 9\r
1209 and \reg,\reg,#0xFF000000 ;@mask out high\r
1210 orr \reg,\reg,r0,lsr#8\r
1211 fetch 8\r
1212.endm\r
1213\r
1214.macro opSLAb\r
1215 opSLA r0, r0, 25\r
1216 mov r0,r0,lsr#24\r
1217.endm\r
1218;@---------------------------------------\r
1219\r
1220.macro opSLL reg1 reg2 shift\r
1221 movs \reg1,\reg2,lsl#\shift\r
1222 orr \reg1,\reg1,#0x01000000\r
1223 sub r1,opcodes,#0x100\r
1224 ldrb z80f,[r1,\reg1,lsr#24]\r
1225 orrcs z80f,z80f,#1<<CFlag\r
1226.endm\r
1227\r
1228.macro opSLLA\r
1229 opSLL z80a, z80a, 1\r
1230 fetch 8\r
1231.endm\r
1232\r
1233.macro opSLLH reg\r
1234 and r0,\reg,#0xFF000000 ;@mask high to r0\r
1235 adds \reg,\reg,r0\r
1236 orr \reg,\reg,#0x01000000\r
1237 sub r1,opcodes,#0x100\r
1238 ldrb z80f,[r1,\reg,lsr#24]\r
1239 orrcs z80f,z80f,#1<<CFlag\r
1240 fetch 8\r
1241.endm\r
1242\r
1243.macro opSLLL reg\r
1244 opSLL r0, \reg, 9\r
1245 and \reg,\reg,#0xFF000000 ;@mask out high\r
1246 orr \reg,\reg,r0,lsr#8\r
1247 fetch 8\r
1248.endm\r
1249\r
1250.macro opSLLb\r
1251 opSLL r0, r0, 25\r
1252 mov r0,r0,lsr#24\r
1253.endm\r
1254;@---------------------------------------\r
1255\r
1256.macro opSRA reg1 reg2\r
1257 movs \reg1,\reg2,asr#25\r
1258 and \reg1,\reg1,#0xFF\r
1259 sub r1,opcodes,#0x100\r
1260 ldrb z80f,[r1,\reg1]\r
1261 orrcs z80f,z80f,#1<<CFlag\r
1262.endm\r
1263\r
1264.macro opSRAA\r
1265 movs r0,z80a,asr#25\r
1266 mov z80a,r0,lsl#24\r
1267 sub r1,opcodes,#0x100\r
1268 ldrb z80f,[r1,z80a,lsr#24]\r
1269 orrcs z80f,z80f,#1<<CFlag\r
1270 fetch 8\r
1271.endm\r
1272\r
1273.macro opSRAH reg\r
1274 movs r0,\reg,asr#25\r
1275 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1276 orr \reg,\reg,r0,lsl#24\r
1277 sub r1,opcodes,#0x100\r
1278 ldrb z80f,[r1,\reg,lsr#24]\r
1279 orrcs z80f,z80f,#1<<CFlag\r
1280 fetch 8\r
1281.endm\r
1282\r
1283.macro opSRAL reg\r
1284 mov r0,\reg,lsl#8\r
1285 opSRA r0, r0\r
1286 and \reg,\reg,#0xFF000000 ;@mask out high\r
1287 orr \reg,\reg,r0,lsl#16\r
1288 fetch 8\r
1289.endm\r
1290\r
1291.macro opSRAb\r
1292 mov r0,r0,lsl#24\r
1293 opSRA r0, r0\r
1294.endm\r
1295;@---------------------------------------\r
1296\r
1297.macro opSRL reg1 reg2 shift\r
1298 movs \reg1,\reg2,lsr#\shift\r
1299 sub r1,opcodes,#0x100\r
1300 ldrb z80f,[r1,\reg1]\r
1301 orrcs z80f,z80f,#1<<CFlag\r
1302.endm\r
1303\r
1304.macro opSRLA\r
1305 opSRL z80a, z80a, 25\r
1306 mov z80a,z80a,lsl#24\r
1307 fetch 8\r
1308.endm\r
1309\r
1310.macro opSRLH reg\r
1311 opSRL r0, \reg, 25\r
1312 and \reg,\reg,#0x00FF0000 ;@mask out low\r
1313 orr \reg,\reg,r0,lsl#24\r
1314 fetch 8\r
1315.endm\r
1316\r
1317.macro opSRLL reg\r
1318 mov r0,\reg,lsl#8\r
1319 opSRL r0, r0, 25\r
1320 and \reg,\reg,#0xFF000000 ;@mask out high\r
1321 orr \reg,\reg,r0,lsl#16\r
1322 fetch 8\r
1323.endm\r
1324\r
1325.macro opSRLb\r
1326 opSRL r0, r0, 1\r
1327.endm\r
1328;@---------------------------------------\r
1329\r
1330.macro opSUB reg shift\r
1331 mov r1,z80a,lsl#4 ;@ Prepare for check of half carry\r
1332 subs z80a,z80a,\reg,lsl#\shift\r
1333 mrs z80f,cpsr\r
1334 mov z80f,z80f,lsr#28 ;@ S,Z,V&C\r
1335 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@ invert C and set n\r
1336 cmp r1,\reg,lsl#\shift+4\r
1337 orrcc z80f,z80f,#1<<HFlag\r
1338.endm\r
1339\r
1340.macro opSUBA\r
1341 mov z80a,#0\r
1342 mov z80f,#(1<<ZFlag)|(1<<NFlag) ;@ set Z & n\r
1343 fetch 4\r
1344.endm\r
1345\r
1346.macro opSUBH reg\r
1347 and r0,\reg,#0xFF000000\r
1348 opSUB r0, 0\r
1349 fetch 4\r
1350.endm\r
1351\r
1352.macro opSUBL reg\r
1353 opSUB \reg, 8\r
1354 fetch 4\r
1355.endm\r
1356\r
1357.macro opSUBb\r
1358 opSUB r0, 24\r
1359.endm\r
1360;@---------------------------------------\r
1361\r
1362.macro opXOR reg shift\r
1363 eor z80a,z80a,\reg,lsl#\shift\r
1364 sub r0,opcodes,#0x100\r
1365 ldrb z80f,[r0,z80a, lsr #24]\r
1366.endm\r
1367\r
1368.macro opXORA\r
1369 mov z80a,#0\r
1370 mov z80f,#(1<<ZFlag)|(1<<VFlag)\r
1371 fetch 4\r
1372.endm\r
1373\r
1374.macro opXORH reg\r
1375 and r0,\reg,#0xFF000000\r
1376 opXOR r0, 0\r
1377 fetch 4\r
1378.endm\r
1379\r
1380.macro opXORL reg\r
1381 opXOR \reg, 8\r
1382 fetch 4\r
1383.endm\r
1384\r
1385.macro opXORb\r
1386 opXOR r0, 24\r
1387.endm\r
1388;@---------------------------------------\r
1389\r
1390\r
1391;@ --------------------------- Framework --------------------------\r
1392 \r
1393.text\r
1394\r
1395DrZ80Run:\r
1396 ;@ r0 = pointer to cpu context\r
1397 ;@ r1 = ISTATES to execute \r
1398 ;@######################################### \r
1399 stmdb sp!,{r4-r12,lr} ;@ save registers on stack\r
1400 mov cpucontext,r0 ;@ setup main memory pointer\r
1401 mov z80_icount,r1 ;@ setup number of Tstates to execute\r
1402\r
1403.if INTERRUPT_MODE == 0\r
1404 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
1405.endif\r
1406 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1407\r
1408.if INTERRUPT_MODE == 0\r
1409 ;@ check ints\r
1410 tst r0,#1\r
1411 movnes r0,r0,lsr #8\r
1412 blne DoInterrupt\r
1413.endif\r
1414\r
1415 ldrb r0,[z80pc],#1 ;@ get first op code\r
1416 ldr opcodes,MAIN_opcodes_POINTER2\r
1417 ldr pc,[opcodes,r0, lsl #2] ;@ execute op code\r
1418\r
1419MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
1420\r
1421\r
1422z80_execute_end:\r
1423 ;@ save registers in CPU context\r
1424 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1425 mov r0,z80_icount\r
1426 ldmia sp!,{r4-r12,pc} ;@ restore registers from stack and return to C code\r
1427\r
1428.if INTERRUPT_MODE\r
1429Interrupt_local: .word Interrupt\r
1430.endif\r
1431\r
1432DoInterrupt:\r
1433.if INTERRUPT_MODE\r
1434 ;@ Don't do own int handler, call mames instead\r
1435\r
1436 ;@ save everything back into DrZ80 context\r
1437 stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
1438 stmfd sp!,{r3,r4,r5,lr} ;@ save rest of regs on stack\r
1439 mov lr,pc\r
1440 ldr pc,Interrupt_local\r
1441 ldmfd sp!,{r3,r4,r5,lr} ;@ load regs from stack\r
1442 ;@ reload regs from DrZ80 context\r
1443 ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
1444 mov pc,lr ;@ return\r
1445.else\r
1446 stmfd sp!,{lr}\r
1447\r
1448 tst r0,#4 ;@ check halt\r
1449 addne z80pc,z80pc,#1\r
1450\r
1451 ldrb r1,[cpucontext,#z80im]\r
1452\r
1453 ;@ clear halt and int flags\r
1454 eor r0,r0,r0\r
1455 strb r0,[cpucontext,#z80if]\r
1456\r
1457 ;@ now check int mode\r
1458 tst r1,#1\r
1459 bne DoInterrupt_mode1\r
1460 tst r1,#2\r
1461 bne DoInterrupt_mode2\r
1462 b DoInterrupt_mode0\r
1463\r
1464DoInterrupt_mode0:\r
1465 ;@ get 3 byte vector\r
1466 ldr r2,[cpucontext, #z80irqvector]\r
1467 and r1,r2,#0xFF0000\r
1468 cmp r1,#0xCD0000 ;@ call\r
1469 bne 1f\r
1470 ;@ ########\r
1471 ;@ # call\r
1472 ;@ ########\r
1473 ;@ save current pc on stack\r
1474 ldr r0,[cpucontext,#z80pc_base]\r
1475 sub r0,z80pc,r0\r
1476.if FAST_Z80SP\r
1477 mov r1,r0, lsr #8\r
1478 strb r1,[z80sp,#-1]!\r
1479 strb r0,[z80sp,#-1]!\r
1480.else\r
1481 sub z80sp,z80sp,#2\r
1482 mov r1,z80sp\r
1483 writemem16\r
1484 ldr r2,[cpucontext, #z80irqvector]\r
1485.endif\r
1486 ;@ jump to vector\r
1487 mov r2,r2,lsl#16\r
1488 mov r0,r2,lsr#16\r
1489 ;@ rebase new pc\r
1490 rebasepc\r
1491\r
1492 b DoInterrupt_end\r
1493\r
14941:\r
1495 cmp r1,#0xC30000 ;@ jump\r
1496 bne DoInterrupt_mode1 ;@ rst\r
1497 ;@ #######\r
1498 ;@ # jump\r
1499 ;@ #######\r
1500 ;@ jump to vector\r
1501 mov r2,r2,lsl#16\r
1502 mov r0,r2,lsr#16\r
1503 ;@ rebase new pc\r
1504 rebasepc\r
1505\r
1506 b DoInterrupt_end\r
1507\r
1508DoInterrupt_mode1:\r
1509 ldr r0,[cpucontext,#z80pc_base]\r
1510 sub r2,z80pc,r0\r
1511 opPUSHareg r2\r
1512 mov r0,#0x38\r
1513 rebasepc\r
1514\r
1515 b DoInterrupt_end\r
1516\r
1517DoInterrupt_mode2:\r
1518 ;@ push pc on stack\r
1519 ldr r0,[cpucontext,#z80pc_base]\r
1520 sub r2,z80pc,r0\r
1521 opPUSHareg r2\r
1522\r
1523 ;@ get 1 byte vector address\r
1524 ldrb r0,[cpucontext, #z80irqvector]\r
1525 ldr r1,[cpucontext, #z80i]\r
1526 orr r0,r0,r1,lsr#16\r
1527\r
1528 ;@ read new pc from vector address\r
1529.if DRZ80_FOR_PICODRIVE\r
1530 bl pico_z80_read16\r
1531 bic r0,r0,#0xfe000\r
1532 ldr r1,[cpucontext,#z80pc_base]\r
1533 add z80pc,r1,r0\r
1534.if UPDATE_CONTEXT\r
1535 str z80pc,[cpucontext,#z80pc_pointer]\r
1536.endif\r
1537.else\r
1538 stmfd sp!,{r3,r12}\r
1539 mov lr,pc\r
1540 ldr pc,[cpucontext,#z80_read16]\r
1541\r
1542 ;@ rebase new pc\r
1543.if UPDATE_CONTEXT\r
1544 str z80pc,[cpucontext,#z80pc_pointer]\r
1545.endif\r
1546 mov lr,pc\r
1547 ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
1548 ldmfd sp!,{r3,r12}\r
1549 mov z80pc,r0 \r
1550.endif\r
1551\r
1552DoInterrupt_end:\r
1553 ;@ interupt accepted so callback irq interface\r
1554 ldr r0,[cpucontext, #z80irqcallback]\r
1555 tst r0,r0\r
1556 ldmeqfd sp!,{pc}\r
1557 stmfd sp!,{r3,r12}\r
1558 mov lr,pc\r
1559 mov pc,r0 ;@ call callback function\r
1560 ldmfd sp!,{r3,r12}\r
1561 ldmfd sp!,{pc} ;@ return\r
1562\r
1563.endif\r
1564\r
1565.data\r
1566.align 4\r
1567\r
1568DAATable: .hword (0x00<<8)|(1<<ZFlag)|(1<<VFlag)\r
1569 .hword (0x01<<8) \r
1570 .hword (0x02<<8) \r
1571 .hword (0x03<<8) |(1<<VFlag)\r
1572 .hword (0x04<<8) \r
1573 .hword (0x05<<8) |(1<<VFlag)\r
1574 .hword (0x06<<8) |(1<<VFlag)\r
1575 .hword (0x07<<8) \r
1576 .hword (0x08<<8) \r
1577 .hword (0x09<<8) |(1<<VFlag)\r
1578 .hword (0x10<<8) |(1<<HFlag) \r
1579 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
1580 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
1581 .hword (0x13<<8) |(1<<HFlag) \r
1582 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
1583 .hword (0x15<<8) |(1<<HFlag) \r
1584 .hword (0x10<<8) \r
1585 .hword (0x11<<8) |(1<<VFlag)\r
1586 .hword (0x12<<8) |(1<<VFlag)\r
1587 .hword (0x13<<8) \r
1588 .hword (0x14<<8) |(1<<VFlag)\r
1589 .hword (0x15<<8) \r
1590 .hword (0x16<<8) \r
1591 .hword (0x17<<8) |(1<<VFlag)\r
1592 .hword (0x18<<8) |(1<<VFlag)\r
1593 .hword (0x19<<8) \r
1594 .hword (0x20<<8) |(1<<HFlag) \r
1595 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
1596 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
1597 .hword (0x23<<8) |(1<<HFlag) \r
1598 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
1599 .hword (0x25<<8) |(1<<HFlag) \r
1600 .hword (0x20<<8) \r
1601 .hword (0x21<<8) |(1<<VFlag)\r
1602 .hword (0x22<<8) |(1<<VFlag)\r
1603 .hword (0x23<<8) \r
1604 .hword (0x24<<8) |(1<<VFlag)\r
1605 .hword (0x25<<8) \r
1606 .hword (0x26<<8) \r
1607 .hword (0x27<<8) |(1<<VFlag)\r
1608 .hword (0x28<<8) |(1<<VFlag)\r
1609 .hword (0x29<<8) \r
1610 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
1611 .hword (0x31<<8) |(1<<HFlag) \r
1612 .hword (0x32<<8) |(1<<HFlag) \r
1613 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
1614 .hword (0x34<<8) |(1<<HFlag) \r
1615 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
1616 .hword (0x30<<8) |(1<<VFlag)\r
1617 .hword (0x31<<8) \r
1618 .hword (0x32<<8) \r
1619 .hword (0x33<<8) |(1<<VFlag)\r
1620 .hword (0x34<<8) \r
1621 .hword (0x35<<8) |(1<<VFlag)\r
1622 .hword (0x36<<8) |(1<<VFlag)\r
1623 .hword (0x37<<8) \r
1624 .hword (0x38<<8) \r
1625 .hword (0x39<<8) |(1<<VFlag)\r
1626 .hword (0x40<<8) |(1<<HFlag) \r
1627 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
1628 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
1629 .hword (0x43<<8) |(1<<HFlag) \r
1630 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
1631 .hword (0x45<<8) |(1<<HFlag) \r
1632 .hword (0x40<<8) \r
1633 .hword (0x41<<8) |(1<<VFlag)\r
1634 .hword (0x42<<8) |(1<<VFlag)\r
1635 .hword (0x43<<8) \r
1636 .hword (0x44<<8) |(1<<VFlag)\r
1637 .hword (0x45<<8) \r
1638 .hword (0x46<<8) \r
1639 .hword (0x47<<8) |(1<<VFlag)\r
1640 .hword (0x48<<8) |(1<<VFlag)\r
1641 .hword (0x49<<8) \r
1642 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
1643 .hword (0x51<<8) |(1<<HFlag) \r
1644 .hword (0x52<<8) |(1<<HFlag) \r
1645 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
1646 .hword (0x54<<8) |(1<<HFlag) \r
1647 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
1648 .hword (0x50<<8) |(1<<VFlag)\r
1649 .hword (0x51<<8) \r
1650 .hword (0x52<<8) \r
1651 .hword (0x53<<8) |(1<<VFlag)\r
1652 .hword (0x54<<8) \r
1653 .hword (0x55<<8) |(1<<VFlag)\r
1654 .hword (0x56<<8) |(1<<VFlag)\r
1655 .hword (0x57<<8) \r
1656 .hword (0x58<<8) \r
1657 .hword (0x59<<8) |(1<<VFlag)\r
1658 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
1659 .hword (0x61<<8) |(1<<HFlag) \r
1660 .hword (0x62<<8) |(1<<HFlag) \r
1661 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
1662 .hword (0x64<<8) |(1<<HFlag) \r
1663 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
1664 .hword (0x60<<8) |(1<<VFlag)\r
1665 .hword (0x61<<8) \r
1666 .hword (0x62<<8) \r
1667 .hword (0x63<<8) |(1<<VFlag)\r
1668 .hword (0x64<<8) \r
1669 .hword (0x65<<8) |(1<<VFlag)\r
1670 .hword (0x66<<8) |(1<<VFlag)\r
1671 .hword (0x67<<8) \r
1672 .hword (0x68<<8) \r
1673 .hword (0x69<<8) |(1<<VFlag)\r
1674 .hword (0x70<<8) |(1<<HFlag) \r
1675 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
1676 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
1677 .hword (0x73<<8) |(1<<HFlag) \r
1678 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
1679 .hword (0x75<<8) |(1<<HFlag) \r
1680 .hword (0x70<<8) \r
1681 .hword (0x71<<8) |(1<<VFlag)\r
1682 .hword (0x72<<8) |(1<<VFlag)\r
1683 .hword (0x73<<8) \r
1684 .hword (0x74<<8) |(1<<VFlag)\r
1685 .hword (0x75<<8) \r
1686 .hword (0x76<<8) \r
1687 .hword (0x77<<8) |(1<<VFlag)\r
1688 .hword (0x78<<8) |(1<<VFlag)\r
1689 .hword (0x79<<8) \r
1690 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
1691 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1692 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1693 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
1694 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1695 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
1696 .hword (0x80<<8)|(1<<SFlag) \r
1697 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)\r
1698 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)\r
1699 .hword (0x83<<8)|(1<<SFlag) \r
1700 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)\r
1701 .hword (0x85<<8)|(1<<SFlag) \r
1702 .hword (0x86<<8)|(1<<SFlag) \r
1703 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
1704 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
1705 .hword (0x89<<8)|(1<<SFlag) \r
1706 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1707 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
1708 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
1709 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1710 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
1711 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
1712 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)\r
1713 .hword (0x91<<8)|(1<<SFlag) \r
1714 .hword (0x92<<8)|(1<<SFlag) \r
1715 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)\r
1716 .hword (0x94<<8)|(1<<SFlag) \r
1717 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)\r
1718 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
1719 .hword (0x97<<8)|(1<<SFlag) \r
1720 .hword (0x98<<8)|(1<<SFlag) \r
1721 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
1722 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1723 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1724 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1725 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1726 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1727 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1728 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1729 .hword (0x01<<8) |(1<<CFlag)\r
1730 .hword (0x02<<8) |(1<<CFlag)\r
1731 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1732 .hword (0x04<<8) |(1<<CFlag)\r
1733 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1734 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1735 .hword (0x07<<8) |(1<<CFlag)\r
1736 .hword (0x08<<8) |(1<<CFlag)\r
1737 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1738 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1739 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1740 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1741 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1742 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1743 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
1744 .hword (0x10<<8) |(1<<CFlag)\r
1745 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
1746 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
1747 .hword (0x13<<8) |(1<<CFlag)\r
1748 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
1749 .hword (0x15<<8) |(1<<CFlag)\r
1750 .hword (0x16<<8) |(1<<CFlag)\r
1751 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
1752 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
1753 .hword (0x19<<8) |(1<<CFlag)\r
1754 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
1755 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1756 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1757 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
1758 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1759 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
1760 .hword (0x20<<8) |(1<<CFlag)\r
1761 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
1762 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
1763 .hword (0x23<<8) |(1<<CFlag)\r
1764 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
1765 .hword (0x25<<8) |(1<<CFlag)\r
1766 .hword (0x26<<8) |(1<<CFlag)\r
1767 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
1768 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
1769 .hword (0x29<<8) |(1<<CFlag)\r
1770 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1771 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
1772 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
1773 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1774 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
1775 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1776 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
1777 .hword (0x31<<8) |(1<<CFlag)\r
1778 .hword (0x32<<8) |(1<<CFlag)\r
1779 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
1780 .hword (0x34<<8) |(1<<CFlag)\r
1781 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
1782 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
1783 .hword (0x37<<8) |(1<<CFlag)\r
1784 .hword (0x38<<8) |(1<<CFlag)\r
1785 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
1786 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
1787 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1788 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1789 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
1790 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1791 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
1792 .hword (0x40<<8) |(1<<CFlag)\r
1793 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
1794 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
1795 .hword (0x43<<8) |(1<<CFlag)\r
1796 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
1797 .hword (0x45<<8) |(1<<CFlag)\r
1798 .hword (0x46<<8) |(1<<CFlag)\r
1799 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
1800 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
1801 .hword (0x49<<8) |(1<<CFlag)\r
1802 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1803 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
1804 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
1805 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1806 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
1807 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1808 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
1809 .hword (0x51<<8) |(1<<CFlag)\r
1810 .hword (0x52<<8) |(1<<CFlag)\r
1811 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
1812 .hword (0x54<<8) |(1<<CFlag)\r
1813 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
1814 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
1815 .hword (0x57<<8) |(1<<CFlag)\r
1816 .hword (0x58<<8) |(1<<CFlag)\r
1817 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
1818 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1819 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
1820 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
1821 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1822 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
1823 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1824 .hword (0x60<<8) |(1<<VFlag) |(1<<CFlag)\r
1825 .hword (0x61<<8) |(1<<CFlag)\r
1826 .hword (0x62<<8) |(1<<CFlag)\r
1827 .hword (0x63<<8) |(1<<VFlag) |(1<<CFlag)\r
1828 .hword (0x64<<8) |(1<<CFlag)\r
1829 .hword (0x65<<8) |(1<<VFlag) |(1<<CFlag)\r
1830 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
1831 .hword (0x67<<8) |(1<<CFlag)\r
1832 .hword (0x68<<8) |(1<<CFlag)\r
1833 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
1834 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
1835 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1836 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1837 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
1838 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1839 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
1840 .hword (0x70<<8) |(1<<CFlag)\r
1841 .hword (0x71<<8) |(1<<VFlag) |(1<<CFlag)\r
1842 .hword (0x72<<8) |(1<<VFlag) |(1<<CFlag)\r
1843 .hword (0x73<<8) |(1<<CFlag)\r
1844 .hword (0x74<<8) |(1<<VFlag) |(1<<CFlag)\r
1845 .hword (0x75<<8) |(1<<CFlag)\r
1846 .hword (0x76<<8) |(1<<CFlag)\r
1847 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
1848 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
1849 .hword (0x79<<8) |(1<<CFlag)\r
1850 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1851 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1852 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1853 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1854 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1855 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1856 .hword (0x80<<8)|(1<<SFlag) |(1<<CFlag)\r
1857 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1858 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1859 .hword (0x83<<8)|(1<<SFlag) |(1<<CFlag)\r
1860 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1861 .hword (0x85<<8)|(1<<SFlag) |(1<<CFlag)\r
1862 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
1863 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1864 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1865 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
1866 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1867 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1868 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1869 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1870 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1871 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1872 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1873 .hword (0x91<<8)|(1<<SFlag) |(1<<CFlag)\r
1874 .hword (0x92<<8)|(1<<SFlag) |(1<<CFlag)\r
1875 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1876 .hword (0x94<<8)|(1<<SFlag) |(1<<CFlag)\r
1877 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1878 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1879 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
1880 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
1881 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1882 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1883 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1884 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1885 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1886 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1887 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1888 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1889 .hword (0xA1<<8)|(1<<SFlag) |(1<<CFlag)\r
1890 .hword (0xA2<<8)|(1<<SFlag) |(1<<CFlag)\r
1891 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1892 .hword (0xA4<<8)|(1<<SFlag) |(1<<CFlag)\r
1893 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1894 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1895 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
1896 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
1897 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1898 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1899 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1900 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1901 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1902 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1903 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1904 .hword (0xB0<<8)|(1<<SFlag) |(1<<CFlag)\r
1905 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1906 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1907 .hword (0xB3<<8)|(1<<SFlag) |(1<<CFlag)\r
1908 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1909 .hword (0xB5<<8)|(1<<SFlag) |(1<<CFlag)\r
1910 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
1911 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1912 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1913 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
1914 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1915 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1916 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1917 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1918 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1919 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1920 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1921 .hword (0xC1<<8)|(1<<SFlag) |(1<<CFlag)\r
1922 .hword (0xC2<<8)|(1<<SFlag) |(1<<CFlag)\r
1923 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1924 .hword (0xC4<<8)|(1<<SFlag) |(1<<CFlag)\r
1925 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1926 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1927 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
1928 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
1929 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1930 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1931 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1932 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1933 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1934 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1935 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1936 .hword (0xD0<<8)|(1<<SFlag) |(1<<CFlag)\r
1937 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1938 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1939 .hword (0xD3<<8)|(1<<SFlag) |(1<<CFlag)\r
1940 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1941 .hword (0xD5<<8)|(1<<SFlag) |(1<<CFlag)\r
1942 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
1943 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1944 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1945 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
1946 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1947 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1948 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1949 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1950 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1951 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1952 .hword (0xE0<<8)|(1<<SFlag) |(1<<CFlag)\r
1953 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1954 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1955 .hword (0xE3<<8)|(1<<SFlag) |(1<<CFlag)\r
1956 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1957 .hword (0xE5<<8)|(1<<SFlag) |(1<<CFlag)\r
1958 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
1959 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1960 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1961 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
1962 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1963 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1964 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1965 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1966 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
1967 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1968 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1969 .hword (0xF1<<8)|(1<<SFlag) |(1<<CFlag)\r
1970 .hword (0xF2<<8)|(1<<SFlag) |(1<<CFlag)\r
1971 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1972 .hword (0xF4<<8)|(1<<SFlag) |(1<<CFlag)\r
1973 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1974 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1975 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
1976 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
1977 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
1978 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1979 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
1980 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
1981 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1982 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
1983 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1984 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag) |(1<<CFlag)\r
1985 .hword (0x01<<8) |(1<<CFlag)\r
1986 .hword (0x02<<8) |(1<<CFlag)\r
1987 .hword (0x03<<8) |(1<<VFlag) |(1<<CFlag)\r
1988 .hword (0x04<<8) |(1<<CFlag)\r
1989 .hword (0x05<<8) |(1<<VFlag) |(1<<CFlag)\r
1990 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
1991 .hword (0x07<<8) |(1<<CFlag)\r
1992 .hword (0x08<<8) |(1<<CFlag)\r
1993 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
1994 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
1995 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1996 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1997 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
1998 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
1999 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2000 .hword (0x10<<8) |(1<<CFlag)\r
2001 .hword (0x11<<8) |(1<<VFlag) |(1<<CFlag)\r
2002 .hword (0x12<<8) |(1<<VFlag) |(1<<CFlag)\r
2003 .hword (0x13<<8) |(1<<CFlag)\r
2004 .hword (0x14<<8) |(1<<VFlag) |(1<<CFlag)\r
2005 .hword (0x15<<8) |(1<<CFlag)\r
2006 .hword (0x16<<8) |(1<<CFlag)\r
2007 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2008 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2009 .hword (0x19<<8) |(1<<CFlag)\r
2010 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2011 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2012 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2013 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2014 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2015 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2016 .hword (0x20<<8) |(1<<CFlag)\r
2017 .hword (0x21<<8) |(1<<VFlag) |(1<<CFlag)\r
2018 .hword (0x22<<8) |(1<<VFlag) |(1<<CFlag)\r
2019 .hword (0x23<<8) |(1<<CFlag)\r
2020 .hword (0x24<<8) |(1<<VFlag) |(1<<CFlag)\r
2021 .hword (0x25<<8) |(1<<CFlag)\r
2022 .hword (0x26<<8) |(1<<CFlag)\r
2023 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2024 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2025 .hword (0x29<<8) |(1<<CFlag)\r
2026 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2027 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2028 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2029 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2030 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2031 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2032 .hword (0x30<<8) |(1<<VFlag) |(1<<CFlag)\r
2033 .hword (0x31<<8) |(1<<CFlag)\r
2034 .hword (0x32<<8) |(1<<CFlag)\r
2035 .hword (0x33<<8) |(1<<VFlag) |(1<<CFlag)\r
2036 .hword (0x34<<8) |(1<<CFlag)\r
2037 .hword (0x35<<8) |(1<<VFlag) |(1<<CFlag)\r
2038 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2039 .hword (0x37<<8) |(1<<CFlag)\r
2040 .hword (0x38<<8) |(1<<CFlag)\r
2041 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2042 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2043 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2044 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2045 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2046 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2047 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2048 .hword (0x40<<8) |(1<<CFlag)\r
2049 .hword (0x41<<8) |(1<<VFlag) |(1<<CFlag)\r
2050 .hword (0x42<<8) |(1<<VFlag) |(1<<CFlag)\r
2051 .hword (0x43<<8) |(1<<CFlag)\r
2052 .hword (0x44<<8) |(1<<VFlag) |(1<<CFlag)\r
2053 .hword (0x45<<8) |(1<<CFlag)\r
2054 .hword (0x46<<8) |(1<<CFlag)\r
2055 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2056 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2057 .hword (0x49<<8) |(1<<CFlag)\r
2058 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2059 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2060 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2061 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2062 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2063 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2064 .hword (0x50<<8) |(1<<VFlag) |(1<<CFlag)\r
2065 .hword (0x51<<8) |(1<<CFlag)\r
2066 .hword (0x52<<8) |(1<<CFlag)\r
2067 .hword (0x53<<8) |(1<<VFlag) |(1<<CFlag)\r
2068 .hword (0x54<<8) |(1<<CFlag)\r
2069 .hword (0x55<<8) |(1<<VFlag) |(1<<CFlag)\r
2070 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2071 .hword (0x57<<8) |(1<<CFlag)\r
2072 .hword (0x58<<8) |(1<<CFlag)\r
2073 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2074 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2075 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2076 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2077 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2078 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2079 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2080 .hword (0x06<<8) |(1<<VFlag)\r
2081 .hword (0x07<<8) \r
2082 .hword (0x08<<8) \r
2083 .hword (0x09<<8) |(1<<VFlag)\r
2084 .hword (0x0A<<8) |(1<<VFlag)\r
2085 .hword (0x0B<<8) \r
2086 .hword (0x0C<<8) |(1<<VFlag)\r
2087 .hword (0x0D<<8) \r
2088 .hword (0x0E<<8) \r
2089 .hword (0x0F<<8) |(1<<VFlag)\r
2090 .hword (0x10<<8) |(1<<HFlag) \r
2091 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag)\r
2092 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag)\r
2093 .hword (0x13<<8) |(1<<HFlag) \r
2094 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag)\r
2095 .hword (0x15<<8) |(1<<HFlag) \r
2096 .hword (0x16<<8) \r
2097 .hword (0x17<<8) |(1<<VFlag)\r
2098 .hword (0x18<<8) |(1<<VFlag)\r
2099 .hword (0x19<<8) \r
2100 .hword (0x1A<<8) \r
2101 .hword (0x1B<<8) |(1<<VFlag)\r
2102 .hword (0x1C<<8) \r
2103 .hword (0x1D<<8) |(1<<VFlag)\r
2104 .hword (0x1E<<8) |(1<<VFlag)\r
2105 .hword (0x1F<<8) \r
2106 .hword (0x20<<8) |(1<<HFlag) \r
2107 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag)\r
2108 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag)\r
2109 .hword (0x23<<8) |(1<<HFlag) \r
2110 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag)\r
2111 .hword (0x25<<8) |(1<<HFlag) \r
2112 .hword (0x26<<8) \r
2113 .hword (0x27<<8) |(1<<VFlag)\r
2114 .hword (0x28<<8) |(1<<VFlag)\r
2115 .hword (0x29<<8) \r
2116 .hword (0x2A<<8) \r
2117 .hword (0x2B<<8) |(1<<VFlag)\r
2118 .hword (0x2C<<8) \r
2119 .hword (0x2D<<8) |(1<<VFlag)\r
2120 .hword (0x2E<<8) |(1<<VFlag)\r
2121 .hword (0x2F<<8) \r
2122 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag)\r
2123 .hword (0x31<<8) |(1<<HFlag) \r
2124 .hword (0x32<<8) |(1<<HFlag) \r
2125 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag)\r
2126 .hword (0x34<<8) |(1<<HFlag) \r
2127 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag)\r
2128 .hword (0x36<<8) |(1<<VFlag)\r
2129 .hword (0x37<<8) \r
2130 .hword (0x38<<8) \r
2131 .hword (0x39<<8) |(1<<VFlag)\r
2132 .hword (0x3A<<8) |(1<<VFlag)\r
2133 .hword (0x3B<<8) \r
2134 .hword (0x3C<<8) |(1<<VFlag)\r
2135 .hword (0x3D<<8) \r
2136 .hword (0x3E<<8) \r
2137 .hword (0x3F<<8) |(1<<VFlag)\r
2138 .hword (0x40<<8) |(1<<HFlag) \r
2139 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag)\r
2140 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag)\r
2141 .hword (0x43<<8) |(1<<HFlag) \r
2142 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag)\r
2143 .hword (0x45<<8) |(1<<HFlag) \r
2144 .hword (0x46<<8) \r
2145 .hword (0x47<<8) |(1<<VFlag)\r
2146 .hword (0x48<<8) |(1<<VFlag)\r
2147 .hword (0x49<<8) \r
2148 .hword (0x4A<<8) \r
2149 .hword (0x4B<<8) |(1<<VFlag)\r
2150 .hword (0x4C<<8) \r
2151 .hword (0x4D<<8) |(1<<VFlag)\r
2152 .hword (0x4E<<8) |(1<<VFlag)\r
2153 .hword (0x4F<<8) \r
2154 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag)\r
2155 .hword (0x51<<8) |(1<<HFlag) \r
2156 .hword (0x52<<8) |(1<<HFlag) \r
2157 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag)\r
2158 .hword (0x54<<8) |(1<<HFlag) \r
2159 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag)\r
2160 .hword (0x56<<8) |(1<<VFlag)\r
2161 .hword (0x57<<8) \r
2162 .hword (0x58<<8) \r
2163 .hword (0x59<<8) |(1<<VFlag)\r
2164 .hword (0x5A<<8) |(1<<VFlag)\r
2165 .hword (0x5B<<8) \r
2166 .hword (0x5C<<8) |(1<<VFlag)\r
2167 .hword (0x5D<<8) \r
2168 .hword (0x5E<<8) \r
2169 .hword (0x5F<<8) |(1<<VFlag)\r
2170 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag)\r
2171 .hword (0x61<<8) |(1<<HFlag) \r
2172 .hword (0x62<<8) |(1<<HFlag) \r
2173 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag)\r
2174 .hword (0x64<<8) |(1<<HFlag) \r
2175 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag)\r
2176 .hword (0x66<<8) |(1<<VFlag)\r
2177 .hword (0x67<<8) \r
2178 .hword (0x68<<8) \r
2179 .hword (0x69<<8) |(1<<VFlag)\r
2180 .hword (0x6A<<8) |(1<<VFlag)\r
2181 .hword (0x6B<<8) \r
2182 .hword (0x6C<<8) |(1<<VFlag)\r
2183 .hword (0x6D<<8) \r
2184 .hword (0x6E<<8) \r
2185 .hword (0x6F<<8) |(1<<VFlag)\r
2186 .hword (0x70<<8) |(1<<HFlag) \r
2187 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag)\r
2188 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag)\r
2189 .hword (0x73<<8) |(1<<HFlag) \r
2190 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag)\r
2191 .hword (0x75<<8) |(1<<HFlag) \r
2192 .hword (0x76<<8) \r
2193 .hword (0x77<<8) |(1<<VFlag)\r
2194 .hword (0x78<<8) |(1<<VFlag)\r
2195 .hword (0x79<<8) \r
2196 .hword (0x7A<<8) \r
2197 .hword (0x7B<<8) |(1<<VFlag)\r
2198 .hword (0x7C<<8) \r
2199 .hword (0x7D<<8) |(1<<VFlag)\r
2200 .hword (0x7E<<8) |(1<<VFlag)\r
2201 .hword (0x7F<<8) \r
2202 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) \r
2203 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2204 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2205 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) \r
2206 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2207 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) \r
2208 .hword (0x86<<8)|(1<<SFlag) \r
2209 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)\r
2210 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)\r
2211 .hword (0x89<<8)|(1<<SFlag) \r
2212 .hword (0x8A<<8)|(1<<SFlag) \r
2213 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag)\r
2214 .hword (0x8C<<8)|(1<<SFlag) \r
2215 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag)\r
2216 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag)\r
2217 .hword (0x8F<<8)|(1<<SFlag) \r
2218 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2219 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) \r
2220 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) \r
2221 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2222 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) \r
2223 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag)\r
2224 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)\r
2225 .hword (0x97<<8)|(1<<SFlag) \r
2226 .hword (0x98<<8)|(1<<SFlag) \r
2227 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)\r
2228 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag)\r
2229 .hword (0x9B<<8)|(1<<SFlag) \r
2230 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag)\r
2231 .hword (0x9D<<8)|(1<<SFlag) \r
2232 .hword (0x9E<<8)|(1<<SFlag) \r
2233 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag)\r
2234 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2235 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2236 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2237 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2238 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2239 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2240 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2241 .hword (0x07<<8) |(1<<CFlag)\r
2242 .hword (0x08<<8) |(1<<CFlag)\r
2243 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2244 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2245 .hword (0x0B<<8) |(1<<CFlag)\r
2246 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2247 .hword (0x0D<<8) |(1<<CFlag)\r
2248 .hword (0x0E<<8) |(1<<CFlag)\r
2249 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2250 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2251 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2252 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2253 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2254 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2255 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2256 .hword (0x16<<8) |(1<<CFlag)\r
2257 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2258 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2259 .hword (0x19<<8) |(1<<CFlag)\r
2260 .hword (0x1A<<8) |(1<<CFlag)\r
2261 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2262 .hword (0x1C<<8) |(1<<CFlag)\r
2263 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2264 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2265 .hword (0x1F<<8) |(1<<CFlag)\r
2266 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2267 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2268 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2269 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2270 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2271 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2272 .hword (0x26<<8) |(1<<CFlag)\r
2273 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2274 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2275 .hword (0x29<<8) |(1<<CFlag)\r
2276 .hword (0x2A<<8) |(1<<CFlag)\r
2277 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2278 .hword (0x2C<<8) |(1<<CFlag)\r
2279 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2280 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2281 .hword (0x2F<<8) |(1<<CFlag)\r
2282 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2283 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2284 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2285 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2286 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2287 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2288 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2289 .hword (0x37<<8) |(1<<CFlag)\r
2290 .hword (0x38<<8) |(1<<CFlag)\r
2291 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2292 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2293 .hword (0x3B<<8) |(1<<CFlag)\r
2294 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2295 .hword (0x3D<<8) |(1<<CFlag)\r
2296 .hword (0x3E<<8) |(1<<CFlag)\r
2297 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2298 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2299 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2300 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2301 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2302 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2303 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2304 .hword (0x46<<8) |(1<<CFlag)\r
2305 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2306 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2307 .hword (0x49<<8) |(1<<CFlag)\r
2308 .hword (0x4A<<8) |(1<<CFlag)\r
2309 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2310 .hword (0x4C<<8) |(1<<CFlag)\r
2311 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2312 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2313 .hword (0x4F<<8) |(1<<CFlag)\r
2314 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2315 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2316 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2317 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2318 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2319 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2320 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2321 .hword (0x57<<8) |(1<<CFlag)\r
2322 .hword (0x58<<8) |(1<<CFlag)\r
2323 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2324 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2325 .hword (0x5B<<8) |(1<<CFlag)\r
2326 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2327 .hword (0x5D<<8) |(1<<CFlag)\r
2328 .hword (0x5E<<8) |(1<<CFlag)\r
2329 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2330 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2331 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2332 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2333 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2334 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2335 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2336 .hword (0x66<<8) |(1<<VFlag) |(1<<CFlag)\r
2337 .hword (0x67<<8) |(1<<CFlag)\r
2338 .hword (0x68<<8) |(1<<CFlag)\r
2339 .hword (0x69<<8) |(1<<VFlag) |(1<<CFlag)\r
2340 .hword (0x6A<<8) |(1<<VFlag) |(1<<CFlag)\r
2341 .hword (0x6B<<8) |(1<<CFlag)\r
2342 .hword (0x6C<<8) |(1<<VFlag) |(1<<CFlag)\r
2343 .hword (0x6D<<8) |(1<<CFlag)\r
2344 .hword (0x6E<<8) |(1<<CFlag)\r
2345 .hword (0x6F<<8) |(1<<VFlag) |(1<<CFlag)\r
2346 .hword (0x70<<8) |(1<<HFlag) |(1<<CFlag)\r
2347 .hword (0x71<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2348 .hword (0x72<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2349 .hword (0x73<<8) |(1<<HFlag) |(1<<CFlag)\r
2350 .hword (0x74<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2351 .hword (0x75<<8) |(1<<HFlag) |(1<<CFlag)\r
2352 .hword (0x76<<8) |(1<<CFlag)\r
2353 .hword (0x77<<8) |(1<<VFlag) |(1<<CFlag)\r
2354 .hword (0x78<<8) |(1<<VFlag) |(1<<CFlag)\r
2355 .hword (0x79<<8) |(1<<CFlag)\r
2356 .hword (0x7A<<8) |(1<<CFlag)\r
2357 .hword (0x7B<<8) |(1<<VFlag) |(1<<CFlag)\r
2358 .hword (0x7C<<8) |(1<<CFlag)\r
2359 .hword (0x7D<<8) |(1<<VFlag) |(1<<CFlag)\r
2360 .hword (0x7E<<8) |(1<<VFlag) |(1<<CFlag)\r
2361 .hword (0x7F<<8) |(1<<CFlag)\r
2362 .hword (0x80<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2363 .hword (0x81<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2364 .hword (0x82<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2365 .hword (0x83<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2366 .hword (0x84<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2367 .hword (0x85<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2368 .hword (0x86<<8)|(1<<SFlag) |(1<<CFlag)\r
2369 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2370 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2371 .hword (0x89<<8)|(1<<SFlag) |(1<<CFlag)\r
2372 .hword (0x8A<<8)|(1<<SFlag) |(1<<CFlag)\r
2373 .hword (0x8B<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2374 .hword (0x8C<<8)|(1<<SFlag) |(1<<CFlag)\r
2375 .hword (0x8D<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2376 .hword (0x8E<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2377 .hword (0x8F<<8)|(1<<SFlag) |(1<<CFlag)\r
2378 .hword (0x90<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2379 .hword (0x91<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2380 .hword (0x92<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2381 .hword (0x93<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2382 .hword (0x94<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2383 .hword (0x95<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2384 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2385 .hword (0x97<<8)|(1<<SFlag) |(1<<CFlag)\r
2386 .hword (0x98<<8)|(1<<SFlag) |(1<<CFlag)\r
2387 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2388 .hword (0x9A<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2389 .hword (0x9B<<8)|(1<<SFlag) |(1<<CFlag)\r
2390 .hword (0x9C<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2391 .hword (0x9D<<8)|(1<<SFlag) |(1<<CFlag)\r
2392 .hword (0x9E<<8)|(1<<SFlag) |(1<<CFlag)\r
2393 .hword (0x9F<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2394 .hword (0xA0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2395 .hword (0xA1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2396 .hword (0xA2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2397 .hword (0xA3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2398 .hword (0xA4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2399 .hword (0xA5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2400 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2401 .hword (0xA7<<8)|(1<<SFlag) |(1<<CFlag)\r
2402 .hword (0xA8<<8)|(1<<SFlag) |(1<<CFlag)\r
2403 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2404 .hword (0xAA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2405 .hword (0xAB<<8)|(1<<SFlag) |(1<<CFlag)\r
2406 .hword (0xAC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2407 .hword (0xAD<<8)|(1<<SFlag) |(1<<CFlag)\r
2408 .hword (0xAE<<8)|(1<<SFlag) |(1<<CFlag)\r
2409 .hword (0xAF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2410 .hword (0xB0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2411 .hword (0xB1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2412 .hword (0xB2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2413 .hword (0xB3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2414 .hword (0xB4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2415 .hword (0xB5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2416 .hword (0xB6<<8)|(1<<SFlag) |(1<<CFlag)\r
2417 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2418 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2419 .hword (0xB9<<8)|(1<<SFlag) |(1<<CFlag)\r
2420 .hword (0xBA<<8)|(1<<SFlag) |(1<<CFlag)\r
2421 .hword (0xBB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2422 .hword (0xBC<<8)|(1<<SFlag) |(1<<CFlag)\r
2423 .hword (0xBD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2424 .hword (0xBE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2425 .hword (0xBF<<8)|(1<<SFlag) |(1<<CFlag)\r
2426 .hword (0xC0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2427 .hword (0xC1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2428 .hword (0xC2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2429 .hword (0xC3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2430 .hword (0xC4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2431 .hword (0xC5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2432 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2433 .hword (0xC7<<8)|(1<<SFlag) |(1<<CFlag)\r
2434 .hword (0xC8<<8)|(1<<SFlag) |(1<<CFlag)\r
2435 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2436 .hword (0xCA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2437 .hword (0xCB<<8)|(1<<SFlag) |(1<<CFlag)\r
2438 .hword (0xCC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2439 .hword (0xCD<<8)|(1<<SFlag) |(1<<CFlag)\r
2440 .hword (0xCE<<8)|(1<<SFlag) |(1<<CFlag)\r
2441 .hword (0xCF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2442 .hword (0xD0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2443 .hword (0xD1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2444 .hword (0xD2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2445 .hword (0xD3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2446 .hword (0xD4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2447 .hword (0xD5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2448 .hword (0xD6<<8)|(1<<SFlag) |(1<<CFlag)\r
2449 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2450 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2451 .hword (0xD9<<8)|(1<<SFlag) |(1<<CFlag)\r
2452 .hword (0xDA<<8)|(1<<SFlag) |(1<<CFlag)\r
2453 .hword (0xDB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2454 .hword (0xDC<<8)|(1<<SFlag) |(1<<CFlag)\r
2455 .hword (0xDD<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2456 .hword (0xDE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2457 .hword (0xDF<<8)|(1<<SFlag) |(1<<CFlag)\r
2458 .hword (0xE0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2459 .hword (0xE1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2460 .hword (0xE2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2461 .hword (0xE3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2462 .hword (0xE4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2463 .hword (0xE5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2464 .hword (0xE6<<8)|(1<<SFlag) |(1<<CFlag)\r
2465 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2466 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2467 .hword (0xE9<<8)|(1<<SFlag) |(1<<CFlag)\r
2468 .hword (0xEA<<8)|(1<<SFlag) |(1<<CFlag)\r
2469 .hword (0xEB<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2470 .hword (0xEC<<8)|(1<<SFlag) |(1<<CFlag)\r
2471 .hword (0xED<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2472 .hword (0xEE<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2473 .hword (0xEF<<8)|(1<<SFlag) |(1<<CFlag)\r
2474 .hword (0xF0<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2475 .hword (0xF1<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2476 .hword (0xF2<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2477 .hword (0xF3<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2478 .hword (0xF4<<8)|(1<<SFlag) |(1<<HFlag) |(1<<CFlag)\r
2479 .hword (0xF5<<8)|(1<<SFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2480 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2481 .hword (0xF7<<8)|(1<<SFlag) |(1<<CFlag)\r
2482 .hword (0xF8<<8)|(1<<SFlag) |(1<<CFlag)\r
2483 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2484 .hword (0xFA<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2485 .hword (0xFB<<8)|(1<<SFlag) |(1<<CFlag)\r
2486 .hword (0xFC<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2487 .hword (0xFD<<8)|(1<<SFlag) |(1<<CFlag)\r
2488 .hword (0xFE<<8)|(1<<SFlag) |(1<<CFlag)\r
2489 .hword (0xFF<<8)|(1<<SFlag) |(1<<VFlag) |(1<<CFlag)\r
2490 .hword (0x00<<8) |(1<<ZFlag) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2491 .hword (0x01<<8) |(1<<HFlag) |(1<<CFlag)\r
2492 .hword (0x02<<8) |(1<<HFlag) |(1<<CFlag)\r
2493 .hword (0x03<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2494 .hword (0x04<<8) |(1<<HFlag) |(1<<CFlag)\r
2495 .hword (0x05<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2496 .hword (0x06<<8) |(1<<VFlag) |(1<<CFlag)\r
2497 .hword (0x07<<8) |(1<<CFlag)\r
2498 .hword (0x08<<8) |(1<<CFlag)\r
2499 .hword (0x09<<8) |(1<<VFlag) |(1<<CFlag)\r
2500 .hword (0x0A<<8) |(1<<VFlag) |(1<<CFlag)\r
2501 .hword (0x0B<<8) |(1<<CFlag)\r
2502 .hword (0x0C<<8) |(1<<VFlag) |(1<<CFlag)\r
2503 .hword (0x0D<<8) |(1<<CFlag)\r
2504 .hword (0x0E<<8) |(1<<CFlag)\r
2505 .hword (0x0F<<8) |(1<<VFlag) |(1<<CFlag)\r
2506 .hword (0x10<<8) |(1<<HFlag) |(1<<CFlag)\r
2507 .hword (0x11<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2508 .hword (0x12<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2509 .hword (0x13<<8) |(1<<HFlag) |(1<<CFlag)\r
2510 .hword (0x14<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2511 .hword (0x15<<8) |(1<<HFlag) |(1<<CFlag)\r
2512 .hword (0x16<<8) |(1<<CFlag)\r
2513 .hword (0x17<<8) |(1<<VFlag) |(1<<CFlag)\r
2514 .hword (0x18<<8) |(1<<VFlag) |(1<<CFlag)\r
2515 .hword (0x19<<8) |(1<<CFlag)\r
2516 .hword (0x1A<<8) |(1<<CFlag)\r
2517 .hword (0x1B<<8) |(1<<VFlag) |(1<<CFlag)\r
2518 .hword (0x1C<<8) |(1<<CFlag)\r
2519 .hword (0x1D<<8) |(1<<VFlag) |(1<<CFlag)\r
2520 .hword (0x1E<<8) |(1<<VFlag) |(1<<CFlag)\r
2521 .hword (0x1F<<8) |(1<<CFlag)\r
2522 .hword (0x20<<8) |(1<<HFlag) |(1<<CFlag)\r
2523 .hword (0x21<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2524 .hword (0x22<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2525 .hword (0x23<<8) |(1<<HFlag) |(1<<CFlag)\r
2526 .hword (0x24<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2527 .hword (0x25<<8) |(1<<HFlag) |(1<<CFlag)\r
2528 .hword (0x26<<8) |(1<<CFlag)\r
2529 .hword (0x27<<8) |(1<<VFlag) |(1<<CFlag)\r
2530 .hword (0x28<<8) |(1<<VFlag) |(1<<CFlag)\r
2531 .hword (0x29<<8) |(1<<CFlag)\r
2532 .hword (0x2A<<8) |(1<<CFlag)\r
2533 .hword (0x2B<<8) |(1<<VFlag) |(1<<CFlag)\r
2534 .hword (0x2C<<8) |(1<<CFlag)\r
2535 .hword (0x2D<<8) |(1<<VFlag) |(1<<CFlag)\r
2536 .hword (0x2E<<8) |(1<<VFlag) |(1<<CFlag)\r
2537 .hword (0x2F<<8) |(1<<CFlag)\r
2538 .hword (0x30<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2539 .hword (0x31<<8) |(1<<HFlag) |(1<<CFlag)\r
2540 .hword (0x32<<8) |(1<<HFlag) |(1<<CFlag)\r
2541 .hword (0x33<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2542 .hword (0x34<<8) |(1<<HFlag) |(1<<CFlag)\r
2543 .hword (0x35<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2544 .hword (0x36<<8) |(1<<VFlag) |(1<<CFlag)\r
2545 .hword (0x37<<8) |(1<<CFlag)\r
2546 .hword (0x38<<8) |(1<<CFlag)\r
2547 .hword (0x39<<8) |(1<<VFlag) |(1<<CFlag)\r
2548 .hword (0x3A<<8) |(1<<VFlag) |(1<<CFlag)\r
2549 .hword (0x3B<<8) |(1<<CFlag)\r
2550 .hword (0x3C<<8) |(1<<VFlag) |(1<<CFlag)\r
2551 .hword (0x3D<<8) |(1<<CFlag)\r
2552 .hword (0x3E<<8) |(1<<CFlag)\r
2553 .hword (0x3F<<8) |(1<<VFlag) |(1<<CFlag)\r
2554 .hword (0x40<<8) |(1<<HFlag) |(1<<CFlag)\r
2555 .hword (0x41<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2556 .hword (0x42<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2557 .hword (0x43<<8) |(1<<HFlag) |(1<<CFlag)\r
2558 .hword (0x44<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2559 .hword (0x45<<8) |(1<<HFlag) |(1<<CFlag)\r
2560 .hword (0x46<<8) |(1<<CFlag)\r
2561 .hword (0x47<<8) |(1<<VFlag) |(1<<CFlag)\r
2562 .hword (0x48<<8) |(1<<VFlag) |(1<<CFlag)\r
2563 .hword (0x49<<8) |(1<<CFlag)\r
2564 .hword (0x4A<<8) |(1<<CFlag)\r
2565 .hword (0x4B<<8) |(1<<VFlag) |(1<<CFlag)\r
2566 .hword (0x4C<<8) |(1<<CFlag)\r
2567 .hword (0x4D<<8) |(1<<VFlag) |(1<<CFlag)\r
2568 .hword (0x4E<<8) |(1<<VFlag) |(1<<CFlag)\r
2569 .hword (0x4F<<8) |(1<<CFlag)\r
2570 .hword (0x50<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2571 .hword (0x51<<8) |(1<<HFlag) |(1<<CFlag)\r
2572 .hword (0x52<<8) |(1<<HFlag) |(1<<CFlag)\r
2573 .hword (0x53<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2574 .hword (0x54<<8) |(1<<HFlag) |(1<<CFlag)\r
2575 .hword (0x55<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2576 .hword (0x56<<8) |(1<<VFlag) |(1<<CFlag)\r
2577 .hword (0x57<<8) |(1<<CFlag)\r
2578 .hword (0x58<<8) |(1<<CFlag)\r
2579 .hword (0x59<<8) |(1<<VFlag) |(1<<CFlag)\r
2580 .hword (0x5A<<8) |(1<<VFlag) |(1<<CFlag)\r
2581 .hword (0x5B<<8) |(1<<CFlag)\r
2582 .hword (0x5C<<8) |(1<<VFlag) |(1<<CFlag)\r
2583 .hword (0x5D<<8) |(1<<CFlag)\r
2584 .hword (0x5E<<8) |(1<<CFlag)\r
2585 .hword (0x5F<<8) |(1<<VFlag) |(1<<CFlag)\r
2586 .hword (0x60<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2587 .hword (0x61<<8) |(1<<HFlag) |(1<<CFlag)\r
2588 .hword (0x62<<8) |(1<<HFlag) |(1<<CFlag)\r
2589 .hword (0x63<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2590 .hword (0x64<<8) |(1<<HFlag) |(1<<CFlag)\r
2591 .hword (0x65<<8) |(1<<HFlag) |(1<<VFlag) |(1<<CFlag)\r
2592 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
2593 .hword (0x01<<8) |(1<<NFlag) \r
2594 .hword (0x02<<8) |(1<<NFlag) \r
2595 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
2596 .hword (0x04<<8) |(1<<NFlag) \r
2597 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2598 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2599 .hword (0x07<<8) |(1<<NFlag) \r
2600 .hword (0x08<<8) |(1<<NFlag) \r
2601 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2602 .hword (0x04<<8) |(1<<NFlag) \r
2603 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
2604 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
2605 .hword (0x07<<8) |(1<<NFlag) \r
2606 .hword (0x08<<8) |(1<<NFlag) \r
2607 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
2608 .hword (0x10<<8) |(1<<NFlag) \r
2609 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
2610 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
2611 .hword (0x13<<8) |(1<<NFlag) \r
2612 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2613 .hword (0x15<<8) |(1<<NFlag) \r
2614 .hword (0x16<<8) |(1<<NFlag) \r
2615 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2616 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2617 .hword (0x19<<8) |(1<<NFlag) \r
2618 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
2619 .hword (0x15<<8) |(1<<NFlag) \r
2620 .hword (0x16<<8) |(1<<NFlag) \r
2621 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
2622 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
2623 .hword (0x19<<8) |(1<<NFlag) \r
2624 .hword (0x20<<8) |(1<<NFlag) \r
2625 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
2626 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
2627 .hword (0x23<<8) |(1<<NFlag) \r
2628 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2629 .hword (0x25<<8) |(1<<NFlag) \r
2630 .hword (0x26<<8) |(1<<NFlag) \r
2631 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2632 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2633 .hword (0x29<<8) |(1<<NFlag) \r
2634 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
2635 .hword (0x25<<8) |(1<<NFlag) \r
2636 .hword (0x26<<8) |(1<<NFlag) \r
2637 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
2638 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
2639 .hword (0x29<<8) |(1<<NFlag) \r
2640 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
2641 .hword (0x31<<8) |(1<<NFlag) \r
2642 .hword (0x32<<8) |(1<<NFlag) \r
2643 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
2644 .hword (0x34<<8) |(1<<NFlag) \r
2645 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2646 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2647 .hword (0x37<<8) |(1<<NFlag) \r
2648 .hword (0x38<<8) |(1<<NFlag) \r
2649 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2650 .hword (0x34<<8) |(1<<NFlag) \r
2651 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
2652 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
2653 .hword (0x37<<8) |(1<<NFlag) \r
2654 .hword (0x38<<8) |(1<<NFlag) \r
2655 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
2656 .hword (0x40<<8) |(1<<NFlag) \r
2657 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
2658 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
2659 .hword (0x43<<8) |(1<<NFlag) \r
2660 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2661 .hword (0x45<<8) |(1<<NFlag) \r
2662 .hword (0x46<<8) |(1<<NFlag) \r
2663 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2664 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2665 .hword (0x49<<8) |(1<<NFlag) \r
2666 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
2667 .hword (0x45<<8) |(1<<NFlag) \r
2668 .hword (0x46<<8) |(1<<NFlag) \r
2669 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
2670 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
2671 .hword (0x49<<8) |(1<<NFlag) \r
2672 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
2673 .hword (0x51<<8) |(1<<NFlag) \r
2674 .hword (0x52<<8) |(1<<NFlag) \r
2675 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
2676 .hword (0x54<<8) |(1<<NFlag) \r
2677 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2678 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2679 .hword (0x57<<8) |(1<<NFlag) \r
2680 .hword (0x58<<8) |(1<<NFlag) \r
2681 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2682 .hword (0x54<<8) |(1<<NFlag) \r
2683 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
2684 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
2685 .hword (0x57<<8) |(1<<NFlag) \r
2686 .hword (0x58<<8) |(1<<NFlag) \r
2687 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
2688 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
2689 .hword (0x61<<8) |(1<<NFlag) \r
2690 .hword (0x62<<8) |(1<<NFlag) \r
2691 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
2692 .hword (0x64<<8) |(1<<NFlag) \r
2693 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2694 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2695 .hword (0x67<<8) |(1<<NFlag) \r
2696 .hword (0x68<<8) |(1<<NFlag) \r
2697 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2698 .hword (0x64<<8) |(1<<NFlag) \r
2699 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
2700 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
2701 .hword (0x67<<8) |(1<<NFlag) \r
2702 .hword (0x68<<8) |(1<<NFlag) \r
2703 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
2704 .hword (0x70<<8) |(1<<NFlag) \r
2705 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
2706 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
2707 .hword (0x73<<8) |(1<<NFlag) \r
2708 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2709 .hword (0x75<<8) |(1<<NFlag) \r
2710 .hword (0x76<<8) |(1<<NFlag) \r
2711 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2712 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2713 .hword (0x79<<8) |(1<<NFlag) \r
2714 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
2715 .hword (0x75<<8) |(1<<NFlag) \r
2716 .hword (0x76<<8) |(1<<NFlag) \r
2717 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
2718 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
2719 .hword (0x79<<8) |(1<<NFlag) \r
2720 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
2721 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2722 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2723 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
2724 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2725 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2726 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2727 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2728 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2729 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2730 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2731 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
2732 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
2733 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2734 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2735 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
2736 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2737 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
2738 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
2739 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2740 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag) \r
2741 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2742 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2743 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag) \r
2744 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag) \r
2745 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
2746 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2747 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2748 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2749 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
2750 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
2751 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2752 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
2753 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2754 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2755 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
2756 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2757 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2758 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2759 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2760 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2761 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2762 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2763 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
2764 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
2765 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2766 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2767 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
2768 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2769 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
2770 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
2771 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2772 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2773 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2774 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2775 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2776 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2777 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2778 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
2779 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2780 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2781 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
2782 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
2783 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2784 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2785 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
2786 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
2787 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2788 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2789 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2790 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2791 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2792 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2793 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2794 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
2795 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2796 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2797 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
2798 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
2799 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2800 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
2801 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2802 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2803 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
2804 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2805 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2806 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2807 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2808 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2809 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2810 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2811 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
2812 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
2813 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2814 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2815 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
2816 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2817 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2818 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2819 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2820 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2821 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2822 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2823 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2824 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2825 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2826 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2827 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2828 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2829 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2830 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2831 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2832 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2833 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2834 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2835 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2836 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2837 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2838 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2839 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2840 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2841 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2842 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2843 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2844 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2845 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2846 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2847 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2848 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2849 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2850 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2851 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2852 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2853 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2854 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2855 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2856 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2857 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2858 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2859 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2860 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2861 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2862 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2863 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2864 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2865 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2866 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2867 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2868 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2869 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2870 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2871 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2872 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2873 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2874 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2875 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2876 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2877 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2878 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2879 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2880 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2881 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2882 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2883 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2884 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2885 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2886 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2887 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2888 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2889 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2890 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2891 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2892 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2893 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2894 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2895 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2896 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2897 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2898 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2899 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2900 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2901 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2902 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2903 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2904 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2905 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2906 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2907 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2908 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2909 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2910 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2911 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2912 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2913 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2914 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2915 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2916 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2917 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2918 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2919 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2920 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2921 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2922 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2923 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2924 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2925 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2926 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2927 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2928 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2929 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2930 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2931 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2932 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2933 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2934 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2935 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2936 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2937 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2938 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2939 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2940 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2941 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2942 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
2943 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2944 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2945 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
2946 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
2947 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2948 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2949 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2950 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2951 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2952 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2953 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2954 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
2955 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2956 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2957 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
2958 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
2959 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2960 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
2961 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2962 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2963 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
2964 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2965 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2966 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2967 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2968 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2969 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2970 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2971 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
2972 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
2973 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2974 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2975 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
2976 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
2977 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2978 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2979 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
2980 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2981 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2982 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2983 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2984 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2985 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2986 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2987 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
2988 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
2989 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2990 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2991 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
2992 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2993 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
2994 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
2995 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2996 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
2997 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2998 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
2999 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3000 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3001 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3002 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3003 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3004 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3005 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3006 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3007 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3008 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3009 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3010 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3011 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3012 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3013 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3014 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3015 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3016 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3017 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3018 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3019 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3020 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3021 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3022 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3023 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3024 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3025 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3026 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3027 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3028 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3029 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3030 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3031 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3032 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3033 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3034 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3035 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3036 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3037 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3038 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3039 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3040 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3041 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3042 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3043 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3044 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3045 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3046 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3047 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3048 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3049 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3050 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3051 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3052 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3053 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3054 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3055 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3056 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3057 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3058 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3059 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3060 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3061 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3062 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3063 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3064 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3065 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3066 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3067 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3068 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3069 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3070 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3071 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3072 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3073 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3074 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3075 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3076 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3077 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3078 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3079 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3080 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3081 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3082 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3083 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3084 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3085 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3086 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3087 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3088 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3089 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3090 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3091 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3092 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3093 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3094 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3095 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3096 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3097 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3098 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3099 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3100 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3101 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3102 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3103 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3104 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3105 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3106 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3107 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3108 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3109 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3110 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag) \r
3111 .hword (0x01<<8) |(1<<NFlag) \r
3112 .hword (0x02<<8) |(1<<NFlag) \r
3113 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag) \r
3114 .hword (0x04<<8) |(1<<NFlag) \r
3115 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag) \r
3116 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag) \r
3117 .hword (0x07<<8) |(1<<NFlag) \r
3118 .hword (0x08<<8) |(1<<NFlag) \r
3119 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag) \r
3120 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3121 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag) \r
3122 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3123 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag) \r
3124 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag) \r
3125 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3126 .hword (0x10<<8) |(1<<NFlag) \r
3127 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag) \r
3128 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag) \r
3129 .hword (0x13<<8) |(1<<NFlag) \r
3130 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag) \r
3131 .hword (0x15<<8) |(1<<NFlag) \r
3132 .hword (0x16<<8) |(1<<NFlag) \r
3133 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag) \r
3134 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag) \r
3135 .hword (0x19<<8) |(1<<NFlag) \r
3136 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag) \r
3137 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3138 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag) \r
3139 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3140 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3141 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag) \r
3142 .hword (0x20<<8) |(1<<NFlag) \r
3143 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag) \r
3144 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag) \r
3145 .hword (0x23<<8) |(1<<NFlag) \r
3146 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag) \r
3147 .hword (0x25<<8) |(1<<NFlag) \r
3148 .hword (0x26<<8) |(1<<NFlag) \r
3149 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag) \r
3150 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag) \r
3151 .hword (0x29<<8) |(1<<NFlag) \r
3152 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag) \r
3153 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3154 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag) \r
3155 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3156 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3157 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag) \r
3158 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag) \r
3159 .hword (0x31<<8) |(1<<NFlag) \r
3160 .hword (0x32<<8) |(1<<NFlag) \r
3161 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag) \r
3162 .hword (0x34<<8) |(1<<NFlag) \r
3163 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag) \r
3164 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag) \r
3165 .hword (0x37<<8) |(1<<NFlag) \r
3166 .hword (0x38<<8) |(1<<NFlag) \r
3167 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag) \r
3168 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3169 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag) \r
3170 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3171 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag) \r
3172 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag) \r
3173 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3174 .hword (0x40<<8) |(1<<NFlag) \r
3175 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag) \r
3176 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag) \r
3177 .hword (0x43<<8) |(1<<NFlag) \r
3178 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag) \r
3179 .hword (0x45<<8) |(1<<NFlag) \r
3180 .hword (0x46<<8) |(1<<NFlag) \r
3181 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag) \r
3182 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag) \r
3183 .hword (0x49<<8) |(1<<NFlag) \r
3184 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag) \r
3185 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3186 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag) \r
3187 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3188 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3189 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag) \r
3190 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag) \r
3191 .hword (0x51<<8) |(1<<NFlag) \r
3192 .hword (0x52<<8) |(1<<NFlag) \r
3193 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag) \r
3194 .hword (0x54<<8) |(1<<NFlag) \r
3195 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag) \r
3196 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag) \r
3197 .hword (0x57<<8) |(1<<NFlag) \r
3198 .hword (0x58<<8) |(1<<NFlag) \r
3199 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag) \r
3200 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3201 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag) \r
3202 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3203 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag) \r
3204 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag) \r
3205 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3206 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag) \r
3207 .hword (0x61<<8) |(1<<NFlag) \r
3208 .hword (0x62<<8) |(1<<NFlag) \r
3209 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag) \r
3210 .hword (0x64<<8) |(1<<NFlag) \r
3211 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag) \r
3212 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag) \r
3213 .hword (0x67<<8) |(1<<NFlag) \r
3214 .hword (0x68<<8) |(1<<NFlag) \r
3215 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag) \r
3216 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3217 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag) \r
3218 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3219 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag) \r
3220 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag) \r
3221 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3222 .hword (0x70<<8) |(1<<NFlag) \r
3223 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag) \r
3224 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag) \r
3225 .hword (0x73<<8) |(1<<NFlag) \r
3226 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag) \r
3227 .hword (0x75<<8) |(1<<NFlag) \r
3228 .hword (0x76<<8) |(1<<NFlag) \r
3229 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag) \r
3230 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag) \r
3231 .hword (0x79<<8) |(1<<NFlag) \r
3232 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag) \r
3233 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3234 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag) \r
3235 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3236 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3237 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag) \r
3238 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag) \r
3239 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3240 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3241 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag) \r
3242 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3243 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag) \r
3244 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag) \r
3245 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3246 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3247 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag) \r
3248 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3249 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3250 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3251 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3252 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag) \r
3253 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag) \r
3254 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3255 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag) \r
3256 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag) \r
3257 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag) \r
3258 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3259 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3260 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3261 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3262 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3263 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3264 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3265 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3266 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3267 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3268 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3269 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3270 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3271 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3272 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3273 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3274 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3275 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3276 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3277 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3278 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3279 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3280 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3281 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3282 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3283 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3284 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3285 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3286 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3287 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3288 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3289 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3290 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3291 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3292 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3293 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3294 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3295 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3296 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3297 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3298 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3299 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3300 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3301 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3302 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3303 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3304 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3305 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3306 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3307 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3308 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3309 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3310 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3311 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3312 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3313 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3314 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3315 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3316 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3317 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3318 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3319 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3320 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3321 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3322 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3323 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3324 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3325 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3326 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3327 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3328 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3329 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3330 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3331 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3332 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3333 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3334 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3335 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3336 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3337 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3338 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3339 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3340 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3341 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3342 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3343 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3344 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3345 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3346 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3347 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3348 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3349 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3350 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3351 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3352 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3353 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3354 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3355 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3356 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3357 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3358 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3359 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3360 .hword (0x9A<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3361 .hword (0x9B<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3362 .hword (0x9C<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3363 .hword (0x9D<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3364 .hword (0x9E<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3365 .hword (0x9F<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3366 .hword (0xA0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3367 .hword (0xA1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3368 .hword (0xA2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3369 .hword (0xA3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3370 .hword (0xA4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3371 .hword (0xA5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3372 .hword (0xA6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3373 .hword (0xA7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3374 .hword (0xA8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3375 .hword (0xA9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3376 .hword (0xAA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3377 .hword (0xAB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3378 .hword (0xAC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3379 .hword (0xAD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3380 .hword (0xAE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3381 .hword (0xAF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3382 .hword (0xB0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3383 .hword (0xB1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3384 .hword (0xB2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3385 .hword (0xB3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3386 .hword (0xB4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3387 .hword (0xB5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3388 .hword (0xB6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3389 .hword (0xB7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3390 .hword (0xB8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3391 .hword (0xB9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3392 .hword (0xBA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3393 .hword (0xBB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3394 .hword (0xBC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3395 .hword (0xBD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3396 .hword (0xBE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3397 .hword (0xBF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3398 .hword (0xC0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3399 .hword (0xC1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3400 .hword (0xC2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3401 .hword (0xC3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3402 .hword (0xC4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3403 .hword (0xC5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3404 .hword (0xC6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3405 .hword (0xC7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3406 .hword (0xC8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3407 .hword (0xC9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3408 .hword (0xCA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3409 .hword (0xCB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3410 .hword (0xCC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3411 .hword (0xCD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3412 .hword (0xCE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3413 .hword (0xCF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3414 .hword (0xD0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3415 .hword (0xD1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3416 .hword (0xD2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3417 .hword (0xD3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3418 .hword (0xD4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3419 .hword (0xD5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3420 .hword (0xD6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3421 .hword (0xD7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3422 .hword (0xD8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3423 .hword (0xD9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3424 .hword (0xDA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3425 .hword (0xDB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3426 .hword (0xDC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3427 .hword (0xDD<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3428 .hword (0xDE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3429 .hword (0xDF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3430 .hword (0xE0<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3431 .hword (0xE1<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3432 .hword (0xE2<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3433 .hword (0xE3<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3434 .hword (0xE4<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3435 .hword (0xE5<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3436 .hword (0xE6<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3437 .hword (0xE7<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3438 .hword (0xE8<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3439 .hword (0xE9<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3440 .hword (0xEA<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3441 .hword (0xEB<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3442 .hword (0xEC<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3443 .hword (0xED<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3444 .hword (0xEE<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3445 .hword (0xEF<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3446 .hword (0xF0<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3447 .hword (0xF1<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3448 .hword (0xF2<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3449 .hword (0xF3<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3450 .hword (0xF4<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3451 .hword (0xF5<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3452 .hword (0xF6<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3453 .hword (0xF7<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3454 .hword (0xF8<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3455 .hword (0xF9<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3456 .hword (0xFA<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3457 .hword (0xFB<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3458 .hword (0xFC<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3459 .hword (0xFD<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3460 .hword (0xFE<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3461 .hword (0xFF<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3462 .hword (0x00<<8) |(1<<ZFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3463 .hword (0x01<<8) |(1<<NFlag)|(1<<CFlag)\r
3464 .hword (0x02<<8) |(1<<NFlag)|(1<<CFlag)\r
3465 .hword (0x03<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3466 .hword (0x04<<8) |(1<<NFlag)|(1<<CFlag)\r
3467 .hword (0x05<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3468 .hword (0x06<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3469 .hword (0x07<<8) |(1<<NFlag)|(1<<CFlag)\r
3470 .hword (0x08<<8) |(1<<NFlag)|(1<<CFlag)\r
3471 .hword (0x09<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3472 .hword (0x0A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3473 .hword (0x0B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3474 .hword (0x0C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3475 .hword (0x0D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3476 .hword (0x0E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3477 .hword (0x0F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3478 .hword (0x10<<8) |(1<<NFlag)|(1<<CFlag)\r
3479 .hword (0x11<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3480 .hword (0x12<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3481 .hword (0x13<<8) |(1<<NFlag)|(1<<CFlag)\r
3482 .hword (0x14<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3483 .hword (0x15<<8) |(1<<NFlag)|(1<<CFlag)\r
3484 .hword (0x16<<8) |(1<<NFlag)|(1<<CFlag)\r
3485 .hword (0x17<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3486 .hword (0x18<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3487 .hword (0x19<<8) |(1<<NFlag)|(1<<CFlag)\r
3488 .hword (0x1A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3489 .hword (0x1B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3490 .hword (0x1C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3491 .hword (0x1D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3492 .hword (0x1E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3493 .hword (0x1F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3494 .hword (0x20<<8) |(1<<NFlag)|(1<<CFlag)\r
3495 .hword (0x21<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3496 .hword (0x22<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3497 .hword (0x23<<8) |(1<<NFlag)|(1<<CFlag)\r
3498 .hword (0x24<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3499 .hword (0x25<<8) |(1<<NFlag)|(1<<CFlag)\r
3500 .hword (0x26<<8) |(1<<NFlag)|(1<<CFlag)\r
3501 .hword (0x27<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3502 .hword (0x28<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3503 .hword (0x29<<8) |(1<<NFlag)|(1<<CFlag)\r
3504 .hword (0x2A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3505 .hword (0x2B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3506 .hword (0x2C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3507 .hword (0x2D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3508 .hword (0x2E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3509 .hword (0x2F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3510 .hword (0x30<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3511 .hword (0x31<<8) |(1<<NFlag)|(1<<CFlag)\r
3512 .hword (0x32<<8) |(1<<NFlag)|(1<<CFlag)\r
3513 .hword (0x33<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3514 .hword (0x34<<8) |(1<<NFlag)|(1<<CFlag)\r
3515 .hword (0x35<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3516 .hword (0x36<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3517 .hword (0x37<<8) |(1<<NFlag)|(1<<CFlag)\r
3518 .hword (0x38<<8) |(1<<NFlag)|(1<<CFlag)\r
3519 .hword (0x39<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3520 .hword (0x3A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3521 .hword (0x3B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3522 .hword (0x3C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3523 .hword (0x3D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3524 .hword (0x3E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3525 .hword (0x3F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3526 .hword (0x40<<8) |(1<<NFlag)|(1<<CFlag)\r
3527 .hword (0x41<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3528 .hword (0x42<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3529 .hword (0x43<<8) |(1<<NFlag)|(1<<CFlag)\r
3530 .hword (0x44<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3531 .hword (0x45<<8) |(1<<NFlag)|(1<<CFlag)\r
3532 .hword (0x46<<8) |(1<<NFlag)|(1<<CFlag)\r
3533 .hword (0x47<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3534 .hword (0x48<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3535 .hword (0x49<<8) |(1<<NFlag)|(1<<CFlag)\r
3536 .hword (0x4A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3537 .hword (0x4B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3538 .hword (0x4C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3539 .hword (0x4D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3540 .hword (0x4E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3541 .hword (0x4F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3542 .hword (0x50<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3543 .hword (0x51<<8) |(1<<NFlag)|(1<<CFlag)\r
3544 .hword (0x52<<8) |(1<<NFlag)|(1<<CFlag)\r
3545 .hword (0x53<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3546 .hword (0x54<<8) |(1<<NFlag)|(1<<CFlag)\r
3547 .hword (0x55<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3548 .hword (0x56<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3549 .hword (0x57<<8) |(1<<NFlag)|(1<<CFlag)\r
3550 .hword (0x58<<8) |(1<<NFlag)|(1<<CFlag)\r
3551 .hword (0x59<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3552 .hword (0x5A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3553 .hword (0x5B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3554 .hword (0x5C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3555 .hword (0x5D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3556 .hword (0x5E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3557 .hword (0x5F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3558 .hword (0x60<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3559 .hword (0x61<<8) |(1<<NFlag)|(1<<CFlag)\r
3560 .hword (0x62<<8) |(1<<NFlag)|(1<<CFlag)\r
3561 .hword (0x63<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3562 .hword (0x64<<8) |(1<<NFlag)|(1<<CFlag)\r
3563 .hword (0x65<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3564 .hword (0x66<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3565 .hword (0x67<<8) |(1<<NFlag)|(1<<CFlag)\r
3566 .hword (0x68<<8) |(1<<NFlag)|(1<<CFlag)\r
3567 .hword (0x69<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3568 .hword (0x6A<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3569 .hword (0x6B<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3570 .hword (0x6C<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3571 .hword (0x6D<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3572 .hword (0x6E<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3573 .hword (0x6F<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3574 .hword (0x70<<8) |(1<<NFlag)|(1<<CFlag)\r
3575 .hword (0x71<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3576 .hword (0x72<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3577 .hword (0x73<<8) |(1<<NFlag)|(1<<CFlag)\r
3578 .hword (0x74<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3579 .hword (0x75<<8) |(1<<NFlag)|(1<<CFlag)\r
3580 .hword (0x76<<8) |(1<<NFlag)|(1<<CFlag)\r
3581 .hword (0x77<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3582 .hword (0x78<<8) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3583 .hword (0x79<<8) |(1<<NFlag)|(1<<CFlag)\r
3584 .hword (0x7A<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3585 .hword (0x7B<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3586 .hword (0x7C<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3587 .hword (0x7D<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3588 .hword (0x7E<<8) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3589 .hword (0x7F<<8) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3590 .hword (0x80<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3591 .hword (0x81<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3592 .hword (0x82<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3593 .hword (0x83<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3594 .hword (0x84<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3595 .hword (0x85<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3596 .hword (0x86<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3597 .hword (0x87<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3598 .hword (0x88<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3599 .hword (0x89<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3600 .hword (0x8A<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3601 .hword (0x8B<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3602 .hword (0x8C<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3603 .hword (0x8D<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3604 .hword (0x8E<<8)|(1<<SFlag) |(1<<HFlag)|(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3605 .hword (0x8F<<8)|(1<<SFlag) |(1<<HFlag) |(1<<NFlag)|(1<<CFlag)\r
3606 .hword (0x90<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3607 .hword (0x91<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3608 .hword (0x92<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3609 .hword (0x93<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3610 .hword (0x94<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3611 .hword (0x95<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3612 .hword (0x96<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3613 .hword (0x97<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3614 .hword (0x98<<8)|(1<<SFlag) |(1<<NFlag)|(1<<CFlag)\r
3615 .hword (0x99<<8)|(1<<SFlag) |(1<<VFlag)|(1<<NFlag)|(1<<CFlag)\r
3616 \r
3617.align 4\r
3618\r
3619AF_Z80: .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 0\r
3620 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 1\r
3621 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 2\r
3622 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 3\r
3623 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 4\r
3624 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 5\r
3625 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 6\r
3626 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 7\r
3627 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 8\r
3628 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 9\r
3629 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 10\r
3630 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 11\r
3631 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 12\r
3632 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 13\r
3633 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 14\r
3634 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 15\r
3635 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 16\r
3636 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 17\r
3637 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 18\r
3638 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 19\r
3639 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 20\r
3640 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 21\r
3641 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 22\r
3642 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 23\r
3643 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 24\r
3644 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 25\r
3645 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 26\r
3646 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 27\r
3647 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 28\r
3648 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 29\r
3649 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 30\r
3650 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 31\r
3651 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 32\r
3652 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 33\r
3653 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 34\r
3654 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 35\r
3655 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 36\r
3656 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 37\r
3657 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 38\r
3658 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 39\r
3659 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 40\r
3660 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 41\r
3661 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 42\r
3662 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 43\r
3663 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 44\r
3664 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 45\r
3665 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 46\r
3666 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 47\r
3667 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 48\r
3668 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 49\r
3669 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 50\r
3670 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 51\r
3671 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 52\r
3672 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 53\r
3673 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 54\r
3674 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 55\r
3675 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 56\r
3676 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 57\r
3677 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 58\r
3678 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 59\r
3679 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 60\r
3680 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 61\r
3681 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 62\r
3682 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 63\r
3683 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 64\r
3684 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 65\r
3685 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 66\r
3686 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 67\r
3687 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 68\r
3688 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 69\r
3689 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 70\r
3690 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 71\r
3691 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 72\r
3692 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 73\r
3693 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 74\r
3694 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 75\r
3695 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 76\r
3696 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 77\r
3697 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 78\r
3698 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 79\r
3699 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 80\r
3700 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 81\r
3701 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 82\r
3702 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 83\r
3703 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 84\r
3704 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 85\r
3705 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 86\r
3706 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 87\r
3707 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 88\r
3708 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 89\r
3709 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 90\r
3710 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 91\r
3711 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 92\r
3712 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 93\r
3713 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 94\r
3714 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 95\r
3715 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 96\r
3716 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 97\r
3717 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 98\r
3718 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 99\r
3719 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 100\r
3720 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 101\r
3721 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 102\r
3722 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 103\r
3723 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 104\r
3724 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 105\r
3725 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 106\r
3726 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 107\r
3727 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 108\r
3728 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 109\r
3729 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 110\r
3730 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 111\r
3731 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 112\r
3732 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 113\r
3733 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 114\r
3734 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 115\r
3735 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 116\r
3736 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 117\r
3737 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 118\r
3738 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 119\r
3739 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 120\r
3740 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 121\r
3741 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 122\r
3742 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 123\r
3743 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 124\r
3744 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 125\r
3745 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 126\r
3746 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 127\r
3747 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 128\r
3748 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 129\r
3749 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 130\r
3750 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 131\r
3751 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 132\r
3752 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 133\r
3753 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 134\r
3754 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 135\r
3755 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 136\r
3756 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 137\r
3757 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 138\r
3758 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 139\r
3759 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 140\r
3760 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 141\r
3761 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 142\r
3762 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 143\r
3763 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 144\r
3764 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 145\r
3765 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 146\r
3766 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 147\r
3767 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 148\r
3768 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 149\r
3769 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 150\r
3770 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 151\r
3771 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 152\r
3772 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 153\r
3773 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 154\r
3774 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 155\r
3775 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 156\r
3776 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 157\r
3777 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 158\r
3778 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 159\r
3779 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 160\r
3780 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 161\r
3781 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 162\r
3782 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 163\r
3783 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 164\r
3784 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 165\r
3785 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 166\r
3786 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 167\r
3787 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 168\r
3788 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 169\r
3789 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 170\r
3790 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 171\r
3791 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 172\r
3792 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 173\r
3793 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 174\r
3794 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 175\r
3795 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 176\r
3796 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 177\r
3797 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 178\r
3798 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 179\r
3799 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 180\r
3800 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 181\r
3801 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 182\r
3802 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 183\r
3803 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 184\r
3804 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 185\r
3805 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 186\r
3806 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 187\r
3807 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 188\r
3808 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 189\r
3809 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 190\r
3810 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 191\r
3811 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 192\r
3812 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 193\r
3813 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 194\r
3814 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 195\r
3815 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 196\r
3816 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 197\r
3817 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 198\r
3818 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 199\r
3819 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 200\r
3820 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 201\r
3821 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 202\r
3822 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 203\r
3823 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 204\r
3824 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 205\r
3825 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 206\r
3826 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 207\r
3827 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 208\r
3828 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 209\r
3829 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 210\r
3830 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 211\r
3831 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 212\r
3832 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 213\r
3833 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 214\r
3834 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 215\r
3835 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 216\r
3836 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 217\r
3837 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 218\r
3838 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 219\r
3839 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 220\r
3840 .byte (0<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 221\r
3841 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 222\r
3842 .byte (1<<Z80_CFlag)|(0<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 223\r
3843 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 224\r
3844 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 225\r
3845 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 226\r
3846 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 227\r
3847 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 228\r
3848 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 229\r
3849 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 230\r
3850 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 231\r
3851 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 232\r
3852 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 233\r
3853 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 234\r
3854 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 235\r
3855 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 236\r
3856 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 237\r
3857 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 238\r
3858 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(0<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 239\r
3859 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 240\r
3860 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 241\r
3861 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 242\r
3862 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 243\r
3863 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 244\r
3864 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 245\r
3865 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 246\r
3866 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(0<<Z80_SFlag) ;@ 247\r
3867 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 248\r
3868 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 249\r
3869 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 250\r
3870 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(0<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 251\r
3871 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 252\r
3872 .byte (0<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 253\r
3873 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(0<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 254\r
3874 .byte (1<<Z80_CFlag)|(1<<Z80_NFlag)|(1<<Z80_VFlag)|(1<<Z80_HFlag)|(1<<Z80_ZFlag)|(1<<Z80_SFlag) ;@ 255\r
3875\r
3876.align 4\r
3877\r
3878AF_ARM: .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 0\r
3879 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 1\r
3880 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 2\r
3881 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 3\r
3882 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 4\r
3883 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 5\r
3884 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 6\r
3885 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 7\r
3886 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 8\r
3887 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 9\r
3888 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 10\r
3889 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 11\r
3890 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 12\r
3891 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 13\r
3892 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 14\r
3893 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 15\r
3894 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 16\r
3895 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 17\r
3896 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 18\r
3897 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 19\r
3898 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 20\r
3899 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 21\r
3900 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 22\r
3901 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 23\r
3902 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 24\r
3903 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 25\r
3904 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 26\r
3905 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 27\r
3906 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 28\r
3907 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 29\r
3908 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 30\r
3909 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 31\r
3910 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 32\r
3911 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 33\r
3912 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 34\r
3913 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 35\r
3914 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 36\r
3915 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 37\r
3916 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 38\r
3917 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 39\r
3918 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 40\r
3919 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 41\r
3920 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 42\r
3921 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 43\r
3922 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 44\r
3923 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 45\r
3924 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 46\r
3925 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 47\r
3926 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 48\r
3927 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 49\r
3928 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 50\r
3929 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 51\r
3930 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 52\r
3931 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 53\r
3932 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 54\r
3933 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 55\r
3934 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 56\r
3935 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 57\r
3936 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 58\r
3937 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 59\r
3938 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 60\r
3939 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 61\r
3940 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 62\r
3941 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(0<<SFlag) ;@ 63\r
3942 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 64\r
3943 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 65\r
3944 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 66\r
3945 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 67\r
3946 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 68\r
3947 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 69\r
3948 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 70\r
3949 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 71\r
3950 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 72\r
3951 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 73\r
3952 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 74\r
3953 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 75\r
3954 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 76\r
3955 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 77\r
3956 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 78\r
3957 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 79\r
3958 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 80\r
3959 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 81\r
3960 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 82\r
3961 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 83\r
3962 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 84\r
3963 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 85\r
3964 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 86\r
3965 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 87\r
3966 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 88\r
3967 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 89\r
3968 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 90\r
3969 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 91\r
3970 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 92\r
3971 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 93\r
3972 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 94\r
3973 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 95\r
3974 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 96\r
3975 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 97\r
3976 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 98\r
3977 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 99\r
3978 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 100\r
3979 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 101\r
3980 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 102\r
3981 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 103\r
3982 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 104\r
3983 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 105\r
3984 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 106\r
3985 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 107\r
3986 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 108\r
3987 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 109\r
3988 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 110\r
3989 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 111\r
3990 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 112\r
3991 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 113\r
3992 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 114\r
3993 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 115\r
3994 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 116\r
3995 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 117\r
3996 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 118\r
3997 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 119\r
3998 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 120\r
3999 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 121\r
4000 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 122\r
4001 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 123\r
4002 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 124\r
4003 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 125\r
4004 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 126\r
4005 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(0<<SFlag) ;@ 127\r
4006 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 128\r
4007 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 129\r
4008 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 130\r
4009 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 131\r
4010 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 132\r
4011 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 133\r
4012 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 134\r
4013 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 135\r
4014 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 136\r
4015 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 137\r
4016 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 138\r
4017 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 139\r
4018 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 140\r
4019 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 141\r
4020 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 142\r
4021 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 143\r
4022 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 144\r
4023 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 145\r
4024 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 146\r
4025 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 147\r
4026 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 148\r
4027 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 149\r
4028 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 150\r
4029 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 151\r
4030 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 152\r
4031 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 153\r
4032 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 154\r
4033 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 155\r
4034 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 156\r
4035 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 157\r
4036 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 158\r
4037 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 159\r
4038 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 160\r
4039 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 161\r
4040 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 162\r
4041 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 163\r
4042 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 164\r
4043 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 165\r
4044 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 166\r
4045 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 167\r
4046 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 168\r
4047 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 169\r
4048 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 170\r
4049 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 171\r
4050 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 172\r
4051 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 173\r
4052 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 174\r
4053 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 175\r
4054 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 176\r
4055 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 177\r
4056 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 178\r
4057 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 179\r
4058 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 180\r
4059 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 181\r
4060 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 182\r
4061 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 183\r
4062 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 184\r
4063 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 185\r
4064 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 186\r
4065 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 187\r
4066 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 188\r
4067 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 189\r
4068 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 190\r
4069 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(0<<ZFlag)|(1<<SFlag) ;@ 191\r
4070 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 192\r
4071 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 193\r
4072 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 194\r
4073 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 195\r
4074 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 196\r
4075 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 197\r
4076 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 198\r
4077 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 199\r
4078 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 200\r
4079 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 201\r
4080 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 202\r
4081 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 203\r
4082 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 204\r
4083 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 205\r
4084 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 206\r
4085 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 207\r
4086 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 208\r
4087 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 209\r
4088 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 210\r
4089 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 211\r
4090 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 212\r
4091 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 213\r
4092 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 214\r
4093 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 215\r
4094 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 216\r
4095 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 217\r
4096 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 218\r
4097 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 219\r
4098 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 220\r
4099 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 221\r
4100 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 222\r
4101 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 223\r
4102 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 224\r
4103 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 225\r
4104 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 226\r
4105 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 227\r
4106 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 228\r
4107 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 229\r
4108 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 230\r
4109 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 231\r
4110 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 232\r
4111 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 233\r
4112 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 234\r
4113 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 235\r
4114 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 236\r
4115 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 237\r
4116 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 238\r
4117 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(0<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 239\r
4118 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 240\r
4119 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 241\r
4120 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 242\r
4121 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 243\r
4122 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 244\r
4123 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 245\r
4124 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 246\r
4125 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 247\r
4126 .byte (0<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 248\r
4127 .byte (1<<CFlag)|(0<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 249\r
4128 .byte (0<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 250\r
4129 .byte (1<<CFlag)|(1<<NFlag)|(0<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 251\r
4130 .byte (0<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 252\r
4131 .byte (1<<CFlag)|(0<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 253\r
4132 .byte (0<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 254\r
4133 .byte (1<<CFlag)|(1<<NFlag)|(1<<VFlag)|(1<<HFlag)|(1<<ZFlag)|(1<<SFlag) ;@ 255\r
4134\r
4135.align 4\r
4136\r
4137PZSTable_data: .byte (1<<ZFlag)|(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4138 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4139 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4140 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4141 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4142 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4143 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4144 .byte (1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag)\r
4145 .byte 0,(1<<VFlag),(1<<VFlag),0,(1<<VFlag),0,0,(1<<VFlag),(1<<VFlag),0,0,(1<<VFlag),0,(1<<VFlag),(1<<VFlag),0\r
4146 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4147 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4148 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4149 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4150 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4151 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4152 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4153 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4154 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4155 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4156 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4157 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4158 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4159 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4160 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4161 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4162 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4163 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4164 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4165 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4166 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4167 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4168 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4169 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4170 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4171 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4172 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4173 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4174 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag)\r
4175 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4176 .byte (1<<SFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)|(1<<VFlag),(1<<SFlag)\r
4177 .byte (1<<SFlag)|(1<<VFlag),(1<<SFlag),(1<<SFlag),(1<<SFlag)|(1<<VFlag) \r
4178\r
4179.align 4\r
4180\r
4181MAIN_opcodes: \r
4182 .word opcode_0_0,opcode_0_1,opcode_0_2,opcode_0_3,opcode_0_4,opcode_0_5,opcode_0_6,opcode_0_7\r
4183 .word opcode_0_8,opcode_0_9,opcode_0_A,opcode_0_B,opcode_0_C,opcode_0_D,opcode_0_E,opcode_0_F\r
4184 .word opcode_1_0,opcode_1_1,opcode_1_2,opcode_1_3,opcode_1_4,opcode_1_5,opcode_1_6,opcode_1_7\r
4185 .word opcode_1_8,opcode_1_9,opcode_1_A,opcode_1_B,opcode_1_C,opcode_1_D,opcode_1_E,opcode_1_F\r
4186 .word opcode_2_0,opcode_2_1,opcode_2_2,opcode_2_3,opcode_2_4,opcode_2_5,opcode_2_6,opcode_2_7\r
4187 .word opcode_2_8,opcode_2_9,opcode_2_A,opcode_2_B,opcode_2_C,opcode_2_D,opcode_2_E,opcode_2_F\r
4188 .word opcode_3_0,opcode_3_1,opcode_3_2,opcode_3_3,opcode_3_4,opcode_3_5,opcode_3_6,opcode_3_7\r
4189 .word opcode_3_8,opcode_3_9,opcode_3_A,opcode_3_B,opcode_3_C,opcode_3_D,opcode_3_E,opcode_3_F\r
4190 .word opcode_4_0,opcode_4_1,opcode_4_2,opcode_4_3,opcode_4_4,opcode_4_5,opcode_4_6,opcode_4_7\r
4191 .word opcode_4_8,opcode_4_9,opcode_4_A,opcode_4_B,opcode_4_C,opcode_4_D,opcode_4_E,opcode_4_F\r
4192 .word opcode_5_0,opcode_5_1,opcode_5_2,opcode_5_3,opcode_5_4,opcode_5_5,opcode_5_6,opcode_5_7\r
4193 .word opcode_5_8,opcode_5_9,opcode_5_A,opcode_5_B,opcode_5_C,opcode_5_D,opcode_5_E,opcode_5_F\r
4194 .word opcode_6_0,opcode_6_1,opcode_6_2,opcode_6_3,opcode_6_4,opcode_6_5,opcode_6_6,opcode_6_7\r
4195 .word opcode_6_8,opcode_6_9,opcode_6_A,opcode_6_B,opcode_6_C,opcode_6_D,opcode_6_E,opcode_6_F\r
4196 .word opcode_7_0,opcode_7_1,opcode_7_2,opcode_7_3,opcode_7_4,opcode_7_5,opcode_7_6,opcode_7_7\r
4197 .word opcode_7_8,opcode_7_9,opcode_7_A,opcode_7_B,opcode_7_C,opcode_7_D,opcode_7_E,opcode_7_F\r
4198 .word opcode_8_0,opcode_8_1,opcode_8_2,opcode_8_3,opcode_8_4,opcode_8_5,opcode_8_6,opcode_8_7\r
4199 .word opcode_8_8,opcode_8_9,opcode_8_A,opcode_8_B,opcode_8_C,opcode_8_D,opcode_8_E,opcode_8_F\r
4200 .word opcode_9_0,opcode_9_1,opcode_9_2,opcode_9_3,opcode_9_4,opcode_9_5,opcode_9_6,opcode_9_7\r
4201 .word opcode_9_8,opcode_9_9,opcode_9_A,opcode_9_B,opcode_9_C,opcode_9_D,opcode_9_E,opcode_9_F\r
4202 .word opcode_A_0,opcode_A_1,opcode_A_2,opcode_A_3,opcode_A_4,opcode_A_5,opcode_A_6,opcode_A_7\r
4203 .word opcode_A_8,opcode_A_9,opcode_A_A,opcode_A_B,opcode_A_C,opcode_A_D,opcode_A_E,opcode_A_F\r
4204 .word opcode_B_0,opcode_B_1,opcode_B_2,opcode_B_3,opcode_B_4,opcode_B_5,opcode_B_6,opcode_B_7\r
4205 .word opcode_B_8,opcode_B_9,opcode_B_A,opcode_B_B,opcode_B_C,opcode_B_D,opcode_B_E,opcode_B_F\r
4206 .word opcode_C_0,opcode_C_1,opcode_C_2,opcode_C_3,opcode_C_4,opcode_C_5,opcode_C_6,opcode_C_7\r
4207 .word opcode_C_8,opcode_C_9,opcode_C_A,opcode_C_B,opcode_C_C,opcode_C_D,opcode_C_E,opcode_C_F\r
4208 .word opcode_D_0,opcode_D_1,opcode_D_2,opcode_D_3,opcode_D_4,opcode_D_5,opcode_D_6,opcode_D_7\r
4209 .word opcode_D_8,opcode_D_9,opcode_D_A,opcode_D_B,opcode_D_C,opcode_D_D,opcode_D_E,opcode_D_F\r
4210 .word opcode_E_0,opcode_E_1,opcode_E_2,opcode_E_3,opcode_E_4,opcode_E_5,opcode_E_6,opcode_E_7\r
4211 .word opcode_E_8,opcode_E_9,opcode_E_A,opcode_E_B,opcode_E_C,opcode_E_D,opcode_E_E,opcode_E_F\r
4212 .word opcode_F_0,opcode_F_1,opcode_F_2,opcode_F_3,opcode_F_4,opcode_F_5,opcode_F_6,opcode_F_7\r
4213 .word opcode_F_8,opcode_F_9,opcode_F_A,opcode_F_B,opcode_F_C,opcode_F_D,opcode_F_E,opcode_F_F\r
4214\r
4215.align 4\r
4216\r
4217EI_DUMMY_opcodes:\r
4218 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4219 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@0\r
4220 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4221 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@1\r
4222 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4223 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@2\r
4224 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4225 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@3\r
4226 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4227 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@4\r
4228 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4229 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@5\r
4230 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4231 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@6\r
4232 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4233 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@7\r
4234 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4235 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@8\r
4236 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4237 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@9\r
4238 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4239 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@A\r
4240 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4241 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@B\r
4242 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4243 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@C\r
4244 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4245 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@D\r
4246 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4247 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@E\r
4248 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4249 .word ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return,ei_return ;@F\r
4250\r
4251.text\r
4252.align 4\r
4253\r
4254;@NOP\r
4255opcode_0_0:\r
4256;@LD B,B\r
4257opcode_4_0:\r
4258;@LD C,C\r
4259opcode_4_9:\r
4260;@LD D,D\r
4261opcode_5_2:\r
4262;@LD E,E\r
4263opcode_5_B:\r
4264;@LD H,H\r
4265opcode_6_4:\r
4266;@LD L,L\r
4267opcode_6_D:\r
4268;@LD A,A\r
4269opcode_7_F:\r
4270 fetch 4\r
4271;@LD BC,NN\r
4272opcode_0_1:\r
4273 ldrb r0,[z80pc],#1\r
4274 ldrb r1,[z80pc],#1\r
4275 orr r0,r0,r1, lsl #8\r
4276 mov z80bc,r0, lsl #16\r
4277 fetch 10\r
4278;@LD (BC),A\r
4279opcode_0_2:\r
4280 mov r0,z80a, lsr #24\r
4281 mov r1,z80bc, lsr #16\r
4282 writemem8\r
4283 fetch 7\r
4284;@INC BC\r
4285opcode_0_3:\r
4286 add z80bc,z80bc,#1<<16\r
4287 fetch 6\r
4288;@INC B\r
4289opcode_0_4:\r
4290 opINC8H z80bc\r
4291 fetch 4\r
4292;@DEC B\r
4293opcode_0_5:\r
4294 opDEC8H z80bc\r
4295 fetch 4\r
4296;@LD B,N\r
4297opcode_0_6:\r
4298 ldrb r1,[z80pc],#1\r
4299 and z80bc,z80bc,#0xFF<<16\r
4300 orr z80bc,z80bc,r1, lsl #24\r
4301 fetch 7\r
4302;@RLCA\r
4303opcode_0_7:\r
4304 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4305 movs z80a,z80a, lsl #1\r
4306 orrcs z80a,z80a,#1<<24\r
4307 orrcs z80f,z80f,#1<<CFlag\r
4308 fetch 4\r
4309;@EX AF,AF'\r
4310opcode_0_8:\r
4311 add r1,cpucontext,#z80a2\r
4312 swp z80a,z80a,[r1]\r
4313 add r1,cpucontext,#z80f2\r
4314 swp z80f,z80f,[r1]\r
4315 fetch 4\r
4316;@ADD HL,BC\r
4317opcode_0_9:\r
4318 opADD16 z80hl z80bc\r
4319 fetch 11\r
4320;@LD A,(BC)\r
4321opcode_0_A:\r
4322 mov r0,z80bc, lsr #16\r
4323 readmem8\r
4324 mov z80a,r0, lsl #24\r
4325 fetch 7\r
4326;@DEC BC\r
4327opcode_0_B:\r
4328 sub z80bc,z80bc,#1<<16\r
4329 fetch 6\r
4330;@INC C\r
4331opcode_0_C:\r
4332 opINC8L z80bc\r
4333 fetch 4\r
4334;@DEC C\r
4335opcode_0_D:\r
4336 opDEC8L z80bc\r
4337 fetch 4\r
4338;@LD C,N\r
4339opcode_0_E:\r
4340 ldrb r1,[z80pc],#1\r
4341 and z80bc,z80bc,#0xFF<<24\r
4342 orr z80bc,z80bc,r1, lsl #16\r
4343 fetch 7\r
4344;@RRCA\r
4345opcode_0_F:\r
4346 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4347 movs z80a,z80a, lsr #25\r
4348 orrcs z80a,z80a,#1<<7\r
4349 orrcs z80f,z80f,#1<<CFlag\r
4350 mov z80a,z80a, lsl #24\r
4351 fetch 4\r
4352;@DJNZ $+2\r
4353opcode_1_0:\r
4354 sub z80bc,z80bc,#1<<24\r
4355 tst z80bc,#0xFF<<24\r
4356 ldrsb r1,[z80pc],#1\r
4357 addne z80pc,z80pc,r1\r
4358 subne z80_icount,z80_icount,#5\r
4359 fetch 8\r
4360\r
4361;@LD DE,NN\r
4362opcode_1_1:\r
4363 ldrb r0,[z80pc],#1\r
4364 ldrb r1,[z80pc],#1\r
4365 orr r0,r0,r1, lsl #8\r
4366 mov z80de,r0, lsl #16\r
4367 fetch 10\r
4368;@LD (DE),A\r
4369opcode_1_2:\r
4370 mov r0,z80a, lsr #24\r
4371 writemem8DE\r
4372 fetch 7\r
4373;@INC DE\r
4374opcode_1_3:\r
4375 add z80de,z80de,#1<<16\r
4376 fetch 6\r
4377;@INC D\r
4378opcode_1_4:\r
4379 opINC8H z80de\r
4380 fetch 4\r
4381;@DEC D\r
4382opcode_1_5:\r
4383 opDEC8H z80de\r
4384 fetch 4\r
4385;@LD D,N\r
4386opcode_1_6:\r
4387 ldrb r1,[z80pc],#1\r
4388 and z80de,z80de,#0xFF<<16\r
4389 orr z80de,z80de,r1, lsl #24\r
4390 fetch 7\r
4391;@RLA\r
4392opcode_1_7:\r
4393 tst z80f,#1<<CFlag\r
4394 orrne z80a,z80a,#1<<23\r
4395 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4396 movs z80a,z80a, lsl #1\r
4397 orrcs z80f,z80f,#1<<CFlag\r
4398 fetch 4\r
4399;@JR $+2\r
4400opcode_1_8:\r
4401 ldrsb r1,[z80pc],#1\r
4402 add z80pc,z80pc,r1\r
4403 fetch 12\r
4404;@ADD HL,DE\r
4405opcode_1_9:\r
4406 opADD16 z80hl z80de\r
4407 fetch 11\r
4408;@LD A,(DE)\r
4409opcode_1_A:\r
4410 mov r0,z80de, lsr #16\r
4411 readmem8\r
4412 mov z80a,r0, lsl #24\r
4413 fetch 7\r
4414;@DEC DE\r
4415opcode_1_B:\r
4416 sub z80de,z80de,#1<<16\r
4417 fetch 6\r
4418;@INC E\r
4419opcode_1_C:\r
4420 opINC8L z80de\r
4421 fetch 4\r
4422;@DEC E\r
4423opcode_1_D:\r
4424 opDEC8L z80de\r
4425 fetch 4\r
4426;@LD E,N\r
4427opcode_1_E:\r
4428 ldrb r0,[z80pc],#1\r
4429 and z80de,z80de,#0xFF<<24\r
4430 orr z80de,z80de,r0, lsl #16\r
4431 fetch 7\r
4432;@RRA\r
4433opcode_1_F:\r
4434 orr z80a,z80a,z80f,lsr#1 ;@get C\r
4435 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)|(1<<CFlag)\r
4436 movs z80a,z80a,ror#25\r
4437 orrcs z80f,z80f,#1<<CFlag\r
4438 mov z80a,z80a,lsl#24\r
4439 fetch 4\r
4440;@JR NZ,$+2\r
4441opcode_2_0:\r
4442 tst z80f,#1<<ZFlag\r
4443 beq opcode_1_8\r
4444 add z80pc,z80pc,#1\r
4445 fetch 7\r
4446;@LD HL,NN\r
4447opcode_2_1:\r
4448 ldrb r0,[z80pc],#1\r
4449 ldrb r1,[z80pc],#1\r
4450 orr r0,r0,r1, lsl #8\r
4451 mov z80hl,r0, lsl #16\r
4452 fetch 10\r
4453;@LD (NN),HL\r
4454opcode_ED_63:\r
4455 eatcycles 4\r
4456;@LD (NN),HL\r
4457opcode_2_2:\r
4458 ldrb r0,[z80pc],#1\r
4459 ldrb r1,[z80pc],#1\r
4460 orr r1,r0,r1, lsl #8\r
4461 mov r0,z80hl, lsr #16\r
4462 writemem16\r
4463 fetch 16\r
4464;@INC HL\r
4465opcode_2_3:\r
4466 add z80hl,z80hl,#1<<16\r
4467 fetch 6\r
4468;@INC H\r
4469opcode_2_4:\r
4470 opINC8H z80hl\r
4471 fetch 4\r
4472;@DEC H\r
4473opcode_2_5:\r
4474 opDEC8H z80hl\r
4475 fetch 4\r
4476;@LD H,N\r
4477opcode_2_6:\r
4478 ldrb r1,[z80pc],#1\r
4479 and z80hl,z80hl,#0xFF<<16\r
4480 orr z80hl,z80hl,r1, lsl #24\r
4481 fetch 7\r
4482DAATABLE_LOCAL: .word DAATable\r
4483;@DAA\r
4484opcode_2_7:\r
4485 mov r1,z80a, lsr #24\r
4486 tst z80f,#1<<CFlag\r
4487 orrne r1,r1,#256\r
4488 tst z80f,#1<<HFlag\r
4489 orrne r1,r1,#512\r
4490 tst z80f,#1<<NFlag\r
4491 orrne r1,r1,#1024\r
4492 ldr r2,DAATABLE_LOCAL\r
4493 add r2,r2,r1, lsl #1\r
4494 ldrh r1,[r2]\r
4495 and z80f,r1,#0xFF\r
4496 and r2,r1,#0xFF<<8\r
4497 mov z80a,r2, lsl #16\r
4498 fetch 4\r
4499;@JR Z,$+2\r
4500opcode_2_8:\r
4501 tst z80f,#1<<ZFlag\r
4502 bne opcode_1_8\r
4503 add z80pc,z80pc,#1\r
4504 fetch 7\r
4505;@ADD HL,HL\r
4506opcode_2_9:\r
4507 opADD16_2 z80hl\r
4508 fetch 11\r
4509;@LD HL,(NN)\r
4510opcode_ED_6B:\r
4511 eatcycles 4\r
4512;@LD HL,(NN)\r
4513opcode_2_A:\r
4514 ldrb r0,[z80pc],#1\r
4515 ldrb r1,[z80pc],#1\r
4516 orr r0,r0,r1, lsl #8\r
4517 readmem16\r
4518 mov z80hl,r0, lsl #16\r
4519 fetch 16\r
4520;@DEC HL\r
4521opcode_2_B:\r
4522 sub z80hl,z80hl,#1<<16\r
4523 fetch 6\r
4524;@INC L\r
4525opcode_2_C:\r
4526 opINC8L z80hl\r
4527 fetch 4\r
4528;@DEC L\r
4529opcode_2_D:\r
4530 opDEC8L z80hl\r
4531 fetch 4\r
4532;@LD L,N\r
4533opcode_2_E:\r
4534 ldrb r0,[z80pc],#1\r
4535 and z80hl,z80hl,#0xFF<<24\r
4536 orr z80hl,z80hl,r0, lsl #16\r
4537 fetch 7\r
4538;@CPL\r
4539opcode_2_F:\r
4540 eor z80a,z80a,#0xFF<<24\r
4541 orr z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4542 fetch 4\r
4543;@JR NC,$+2\r
4544opcode_3_0:\r
4545 tst z80f,#1<<CFlag\r
4546 beq opcode_1_8\r
4547 add z80pc,z80pc,#1\r
4548 fetch 7\r
4549;@LD SP,NN\r
4550opcode_3_1:\r
4551 ldrb r0,[z80pc],#1\r
4552 ldrb r1,[z80pc],#1\r
4553\r
4554.if FAST_Z80SP\r
4555 orr r0,r0,r1, lsl #8\r
4556 rebasesp\r
4557 mov z80sp,r0\r
4558.else\r
4559 orr z80sp,r0,r1, lsl #8\r
4560.endif\r
4561 fetch 10\r
4562;@LD (NN),A\r
4563opcode_3_2:\r
4564 ldrb r0,[z80pc],#1\r
4565 ldrb r1,[z80pc],#1\r
4566 orr r1,r0,r1, lsl #8\r
4567 mov r0,z80a, lsr #24\r
4568 writemem8\r
4569 fetch 13\r
4570;@INC SP\r
4571opcode_3_3:\r
4572 add z80sp,z80sp,#1\r
4573 fetch 6\r
4574;@INC (HL)\r
4575opcode_3_4:\r
4576 readmem8HL\r
4577 opINC8b\r
4578 writemem8HL\r
4579 fetch 11\r
4580;@DEC (HL)\r
4581opcode_3_5:\r
4582 readmem8HL\r
4583 opDEC8b\r
4584 writemem8HL\r
4585 fetch 11\r
4586;@LD (HL),N\r
4587opcode_3_6:\r
4588 ldrb r0,[z80pc],#1\r
4589 writemem8HL\r
4590 fetch 10\r
4591;@SCF\r
4592opcode_3_7:\r
4593 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4594 orr z80f,z80f,#1<<CFlag\r
4595 fetch 4\r
4596;@JR C,$+2\r
4597opcode_3_8:\r
4598 tst z80f,#1<<CFlag\r
4599 bne opcode_1_8\r
4600 add z80pc,z80pc,#1\r
4601 fetch 8\r
4602;@ADD HL,SP\r
4603opcode_3_9:\r
4604.if FAST_Z80SP\r
4605 ldr r0,[cpucontext,#z80sp_base]\r
4606 sub r0,z80sp,r0\r
4607 opADD16s z80hl r0 16\r
4608.else\r
4609 opADD16s z80hl z80sp 16\r
4610.endif\r
4611 fetch 11\r
4612;@LD A,(NN)\r
4613opcode_3_A:\r
4614 ldrb r0,[z80pc],#1\r
4615 ldrb r1,[z80pc],#1\r
4616 orr r0,r0,r1, lsl #8\r
4617 readmem8\r
4618 mov z80a,r0, lsl #24\r
4619 fetch 11\r
4620;@DEC SP\r
4621opcode_3_B:\r
4622 sub z80sp,z80sp,#1\r
4623 fetch 6\r
4624;@INC A\r
4625opcode_3_C:\r
4626 opINC8 z80a\r
4627 fetch 4\r
4628;@DEC A\r
4629opcode_3_D:\r
4630 opDEC8 z80a\r
4631 fetch 4\r
4632;@LD A,N\r
4633opcode_3_E:\r
4634 ldrb r0,[z80pc],#1\r
4635 mov z80a,r0, lsl #24\r
4636 fetch 7\r
4637;@CCF\r
4638opcode_3_F:\r
4639 bic z80f,z80f,#(1<<NFlag)|(1<<HFlag)\r
4640 tst z80f,#1<<CFlag\r
4641 orrne z80f,z80f,#1<<HFlag\r
4642 eor z80f,z80f,#1<<CFlag\r
4643 fetch 4\r
4644\r
4645;@LD B,C\r
4646opcode_4_1:\r
4647 and z80bc,z80bc,#0xFF<<16\r
4648 orr z80bc,z80bc,z80bc, lsl #8\r
4649 fetch 4\r
4650;@LD B,D\r
4651opcode_4_2:\r
4652 and z80bc,z80bc,#0xFF<<16\r
4653 and r1,z80de,#0xFF<<24\r
4654 orr z80bc,z80bc,r1\r
4655 fetch 4\r
4656;@LD B,E\r
4657opcode_4_3:\r
4658 and z80bc,z80bc,#0xFF<<16\r
4659 and r1,z80de,#0xFF<<16\r
4660 orr z80bc,z80bc,r1, lsl #8\r
4661 fetch 4\r
4662;@LD B,H\r
4663opcode_4_4:\r
4664 and z80bc,z80bc,#0xFF<<16\r
4665 and r1,z80hl,#0xFF<<24\r
4666 orr z80bc,z80bc,r1\r
4667 fetch 4\r
4668;@LD B,L\r
4669opcode_4_5:\r
4670 and z80bc,z80bc,#0xFF<<16\r
4671 and r1,z80hl,#0xFF<<16\r
4672 orr z80bc,z80bc,r1, lsl #8\r
4673 fetch 4\r
4674;@LD B,(HL)\r
4675opcode_4_6:\r
4676 readmem8HL\r
4677 and z80bc,z80bc,#0xFF<<16\r
4678 orr z80bc,z80bc,r0, lsl #24\r
4679 fetch 7\r
4680;@LD B,A\r
4681opcode_4_7:\r
4682 and z80bc,z80bc,#0xFF<<16\r
4683 orr z80bc,z80bc,z80a\r
4684 fetch 4\r
4685;@LD C,B\r
4686opcode_4_8:\r
4687 and z80bc,z80bc,#0xFF<<24\r
4688 orr z80bc,z80bc,z80bc, lsr #8\r
4689 fetch 4\r
4690;@LD C,D\r
4691opcode_4_A:\r
4692 and z80bc,z80bc,#0xFF<<24\r
4693 and r1,z80de,#0xFF<<24\r
4694 orr z80bc,z80bc,r1, lsr #8\r
4695 fetch 4\r
4696;@LD C,E\r
4697opcode_4_B:\r
4698 and z80bc,z80bc,#0xFF<<24\r
4699 and r1,z80de,#0xFF<<16\r
4700 orr z80bc,z80bc,r1 \r
4701 fetch 4\r
4702;@LD C,H\r
4703opcode_4_C:\r
4704 and z80bc,z80bc,#0xFF<<24\r
4705 and r1,z80hl,#0xFF<<24\r
4706 orr z80bc,z80bc,r1, lsr #8\r
4707 fetch 4\r
4708;@LD C,L\r
4709opcode_4_D:\r
4710 and z80bc,z80bc,#0xFF<<24\r
4711 and r1,z80hl,#0xFF<<16\r
4712 orr z80bc,z80bc,r1 \r
4713 fetch 4\r
4714;@LD C,(HL)\r
4715opcode_4_E:\r
4716 readmem8HL\r
4717 and z80bc,z80bc,#0xFF<<24\r
4718 orr z80bc,z80bc,r0, lsl #16\r
4719 fetch 7\r
4720;@LD C,A\r
4721opcode_4_F:\r
4722 and z80bc,z80bc,#0xFF<<24\r
4723 orr z80bc,z80bc,z80a, lsr #8\r
4724 fetch 4\r
4725;@LD D,B\r
4726opcode_5_0:\r
4727 and z80de,z80de,#0xFF<<16\r
4728 and r1,z80bc,#0xFF<<24\r
4729 orr z80de,z80de,r1\r
4730 fetch 4\r
4731;@LD D,C\r
4732opcode_5_1:\r
4733 and z80de,z80de,#0xFF<<16\r
4734 orr z80de,z80de,z80bc, lsl #8\r
4735 fetch 4\r
4736;@LD D,E\r
4737opcode_5_3:\r
4738 and z80de,z80de,#0xFF<<16\r
4739 orr z80de,z80de,z80de, lsl #8\r
4740 fetch 4\r
4741;@LD D,H\r
4742opcode_5_4:\r
4743 and z80de,z80de,#0xFF<<16\r
4744 and r1,z80hl,#0xFF<<24\r
4745 orr z80de,z80de,r1\r
4746 fetch 4\r
4747;@LD D,L\r
4748opcode_5_5:\r
4749 and z80de,z80de,#0xFF<<16\r
4750 orr z80de,z80de,z80hl, lsl #8\r
4751 fetch 4\r
4752;@LD D,(HL)\r
4753opcode_5_6:\r
4754 readmem8HL\r
4755 and z80de,z80de,#0xFF<<16\r
4756 orr z80de,z80de,r0, lsl #24\r
4757 fetch 7\r
4758;@LD D,A\r
4759opcode_5_7:\r
4760 and z80de,z80de,#0xFF<<16\r
4761 orr z80de,z80de,z80a\r
4762 fetch 4\r
4763;@LD E,B\r
4764opcode_5_8:\r
4765 and z80de,z80de,#0xFF<<24\r
4766 and r1,z80bc,#0xFF<<24\r
4767 orr z80de,z80de,r1, lsr #8\r
4768 fetch 4\r
4769;@LD E,C\r
4770opcode_5_9:\r
4771 and z80de,z80de,#0xFF<<24\r
4772 and r1,z80bc,#0xFF<<16\r
4773 orr z80de,z80de,r1 \r
4774 fetch 4\r
4775;@LD E,D\r
4776opcode_5_A:\r
4777 and z80de,z80de,#0xFF<<24\r
4778 orr z80de,z80de,z80de, lsr #8\r
4779 fetch 4\r
4780;@LD E,H\r
4781opcode_5_C:\r
4782 and z80de,z80de,#0xFF<<24\r
4783 and r1,z80hl,#0xFF<<24\r
4784 orr z80de,z80de,r1, lsr #8\r
4785 fetch 4\r
4786;@LD E,L\r
4787opcode_5_D:\r
4788 and z80de,z80de,#0xFF<<24\r
4789 and r1,z80hl,#0xFF<<16\r
4790 orr z80de,z80de,r1 \r
4791 fetch 4\r
4792;@LD E,(HL)\r
4793opcode_5_E:\r
4794 readmem8HL\r
4795 and z80de,z80de,#0xFF<<24\r
4796 orr z80de,z80de,r0, lsl #16\r
4797 fetch 7\r
4798;@LD E,A\r
4799opcode_5_F:\r
4800 and z80de,z80de,#0xFF<<24\r
4801 orr z80de,z80de,z80a, lsr #8\r
4802 fetch 4\r
4803\r
4804;@LD H,B\r
4805opcode_6_0:\r
4806 and z80hl,z80hl,#0xFF<<16\r
4807 and r1,z80bc,#0xFF<<24\r
4808 orr z80hl,z80hl,r1\r
4809 fetch 4\r
4810;@LD H,C\r
4811opcode_6_1:\r
4812 and z80hl,z80hl,#0xFF<<16\r
4813 orr z80hl,z80hl,z80bc, lsl #8\r
4814 fetch 4\r
4815;@LD H,D\r
4816opcode_6_2:\r
4817 and z80hl,z80hl,#0xFF<<16\r
4818 and r1,z80de,#0xFF<<24\r
4819 orr z80hl,z80hl,r1\r
4820 fetch 4\r
4821;@LD H,E\r
4822opcode_6_3:\r
4823 and z80hl,z80hl,#0xFF<<16\r
4824 orr z80hl,z80hl,z80de, lsl #8\r
4825 fetch 4\r
4826;@LD H,L\r
4827opcode_6_5:\r
4828 and z80hl,z80hl,#0xFF<<16\r
4829 orr z80hl,z80hl,z80hl, lsl #8\r
4830 fetch 4\r
4831;@LD H,(HL)\r
4832opcode_6_6:\r
4833 readmem8HL\r
4834 and z80hl,z80hl,#0xFF<<16\r
4835 orr z80hl,z80hl,r0, lsl #24\r
4836 fetch 7\r
4837;@LD H,A\r
4838opcode_6_7:\r
4839 and z80hl,z80hl,#0xFF<<16\r
4840 orr z80hl,z80hl,z80a\r
4841 fetch 4\r
4842\r
4843;@LD L,B\r
4844opcode_6_8:\r
4845 and z80hl,z80hl,#0xFF<<24\r
4846 and r1,z80bc,#0xFF<<24\r
4847 orr z80hl,z80hl,r1, lsr #8\r
4848 fetch 4\r
4849;@LD L,C\r
4850opcode_6_9:\r
4851 and z80hl,z80hl,#0xFF<<24\r
4852 and r1,z80bc,#0xFF<<16\r
4853 orr z80hl,z80hl,r1\r
4854 fetch 4\r
4855;@LD L,D\r
4856opcode_6_A:\r
4857 and z80hl,z80hl,#0xFF<<24\r
4858 and r1,z80de,#0xFF<<24\r
4859 orr z80hl,z80hl,r1, lsr #8\r
4860 fetch 4\r
4861;@LD L,E\r
4862opcode_6_B:\r
4863 and z80hl,z80hl,#0xFF<<24\r
4864 and r1,z80de,#0xFF<<16\r
4865 orr z80hl,z80hl,r1\r
4866 fetch 4\r
4867;@LD L,H\r
4868opcode_6_C:\r
4869 and z80hl,z80hl,#0xFF<<24\r
4870 orr z80hl,z80hl,z80hl, lsr #8\r
4871 fetch 4\r
4872;@LD L,(HL)\r
4873opcode_6_E:\r
4874 readmem8HL\r
4875 and z80hl,z80hl,#0xFF<<24\r
4876 orr z80hl,z80hl,r0, lsl #16\r
4877 fetch 7\r
4878;@LD L,A\r
4879opcode_6_F:\r
4880 and z80hl,z80hl,#0xFF<<24\r
4881 orr z80hl,z80hl,z80a, lsr #8\r
4882 fetch 4\r
4883\r
4884;@LD (HL),B\r
4885opcode_7_0:\r
4886 mov r0,z80bc, lsr #24\r
4887 writemem8HL\r
4888 fetch 7\r
4889;@LD (HL),C\r
4890opcode_7_1:\r
4891 mov r0,z80bc, lsr #16\r
4892 and r0,r0,#0xFF\r
4893 writemem8HL\r
4894 fetch 7\r
4895;@LD (HL),D\r
4896opcode_7_2:\r
4897 mov r0,z80de, lsr #24\r
4898 writemem8HL\r
4899 fetch 7\r
4900;@LD (HL),E\r
4901opcode_7_3:\r
4902 mov r0,z80de, lsr #16\r
4903 and r0,r0,#0xFF\r
4904 writemem8HL\r
4905 fetch 7\r
4906;@LD (HL),H\r
4907opcode_7_4:\r
4908 mov r0,z80hl, lsr #24\r
4909 writemem8HL\r
4910 fetch 7\r
4911;@LD (HL),L\r
4912opcode_7_5:\r
4913 mov r1,z80hl, lsr #16\r
4914 and r0,r1,#0xFF\r
4915 writemem8\r
4916 fetch 7\r
4917;@HALT\r
4918opcode_7_6:\r
4919 sub z80pc,z80pc,#1\r
4920 ldrb r0,[cpucontext,#z80if]\r
4921 orr r0,r0,#Z80_HALT\r
4922 strb r0,[cpucontext,#z80if]\r
4923 b z80_execute_end\r
4924;@LD (HL),A\r
4925opcode_7_7:\r
4926 mov r0,z80a, lsr #24\r
4927 writemem8HL\r
4928 fetch 7\r
4929\r
4930;@LD A,B\r
4931opcode_7_8:\r
4932 and z80a,z80bc,#0xFF<<24\r
4933 fetch 4\r
4934;@LD A,C\r
4935opcode_7_9:\r
4936 mov z80a,z80bc, lsl #8\r
4937 fetch 4\r
4938;@LD A,D\r
4939opcode_7_A:\r
4940 and z80a,z80de,#0xFF<<24\r
4941 fetch 4\r
4942;@LD A,E\r
4943opcode_7_B:\r
4944 mov z80a,z80de, lsl #8\r
4945 fetch 4\r
4946;@LD A,H\r
4947opcode_7_C:\r
4948 and z80a,z80hl,#0xFF<<24\r
4949 fetch 4\r
4950;@LD A,L\r
4951opcode_7_D:\r
4952 mov z80a,z80hl, lsl #8\r
4953 fetch 4\r
4954;@LD A,(HL)\r
4955opcode_7_E:\r
4956 readmem8HL\r
4957 mov z80a,r0, lsl #24\r
4958 fetch 7\r
4959\r
4960;@ADD A,B\r
4961opcode_8_0:\r
4962 opADDH z80bc\r
4963;@ADD A,C\r
4964opcode_8_1:\r
4965 opADDL z80bc\r
4966;@ADD A,D\r
4967opcode_8_2:\r
4968 opADDH z80de\r
4969;@ADD A,E\r
4970opcode_8_3:\r
4971 opADDL z80de\r
4972;@ADD A,H\r
4973opcode_8_4:\r
4974 opADDH z80hl\r
4975;@ADD A,L\r
4976opcode_8_5:\r
4977 opADDL z80hl\r
4978;@ADD A,(HL)\r
4979opcode_8_6:\r
4980 readmem8HL\r
4981 opADDb\r
4982 fetch 7\r
4983;@ADD A,A\r
4984opcode_8_7:\r
4985 opADDA\r
4986\r
4987;@ADC A,B\r
4988opcode_8_8:\r
4989 opADCH z80bc\r
4990;@ADC A,C\r
4991opcode_8_9:\r
4992 opADCL z80bc\r
4993;@ADC A,D\r
4994opcode_8_A:\r
4995 opADCH z80de\r
4996;@ADC A,E\r
4997opcode_8_B:\r
4998 opADCL z80de\r
4999;@ADC A,H\r
5000opcode_8_C:\r
5001 opADCH z80hl\r
5002;@ADC A,L\r
5003opcode_8_D:\r
5004 opADCL z80hl\r
5005;@ADC A,(HL)\r
5006opcode_8_E:\r
5007 readmem8HL\r
5008 opADCb\r
5009 fetch 7\r
5010;@ADC A,A\r
5011opcode_8_F:\r
5012 opADCA\r
5013\r
5014;@SUB B\r
5015opcode_9_0:\r
5016 opSUBH z80bc\r
5017;@SUB C\r
5018opcode_9_1:\r
5019 opSUBL z80bc\r
5020;@SUB D\r
5021opcode_9_2:\r
5022 opSUBH z80de\r
5023;@SUB E\r
5024opcode_9_3:\r
5025 opSUBL z80de\r
5026;@SUB H\r
5027opcode_9_4:\r
5028 opSUBH z80hl\r
5029;@SUB L\r
5030opcode_9_5:\r
5031 opSUBL z80hl\r
5032;@SUB (HL)\r
5033opcode_9_6:\r
5034 readmem8HL\r
5035 opSUBb\r
5036 fetch 7\r
5037;@SUB A\r
5038opcode_9_7:\r
5039 opSUBA\r
5040\r
5041;@SBC B \r
5042opcode_9_8:\r
5043 opSBCH z80bc\r
5044;@SBC C\r
5045opcode_9_9:\r
5046 opSBCL z80bc\r
5047;@SBC D\r
5048opcode_9_A:\r
5049 opSBCH z80de\r
5050;@SBC E\r
5051opcode_9_B:\r
5052 opSBCL z80de\r
5053;@SBC H\r
5054opcode_9_C:\r
5055 opSBCH z80hl\r
5056;@SBC L\r
5057opcode_9_D:\r
5058 opSBCL z80hl\r
5059;@SBC (HL)\r
5060opcode_9_E:\r
5061 readmem8HL\r
5062 opSBCb\r
5063 fetch 7\r
5064;@SBC A\r
5065opcode_9_F:\r
5066 opSBCA\r
5067\r
5068;@AND B\r
5069opcode_A_0:\r
5070 opANDH z80bc\r
5071;@AND C\r
5072opcode_A_1:\r
5073 opANDL z80bc\r
5074;@AND D\r
5075opcode_A_2:\r
5076 opANDH z80de\r
5077;@AND E\r
5078opcode_A_3:\r
5079 opANDL z80de\r
5080;@AND H\r
5081opcode_A_4:\r
5082 opANDH z80hl\r
5083;@AND L\r
5084opcode_A_5:\r
5085 opANDL z80hl\r
5086;@AND (HL)\r
5087opcode_A_6:\r
5088 readmem8HL\r
5089 opANDb\r
5090 fetch 7\r
5091;@AND A\r
5092opcode_A_7:\r
5093 opANDA\r
5094\r
5095;@XOR B\r
5096opcode_A_8:\r
5097 opXORH z80bc\r
5098;@XOR C\r
5099opcode_A_9:\r
5100 opXORL z80bc\r
5101;@XOR D\r
5102opcode_A_A:\r
5103 opXORH z80de\r
5104;@XOR E\r
5105opcode_A_B:\r
5106 opXORL z80de\r
5107;@XOR H\r
5108opcode_A_C:\r
5109 opXORH z80hl\r
5110;@XOR L\r
5111opcode_A_D:\r
5112 opXORL z80hl\r
5113;@XOR (HL)\r
5114opcode_A_E:\r
5115 readmem8HL\r
5116 opXORb\r
5117 fetch 7\r
5118;@XOR A\r
5119opcode_A_F:\r
5120 opXORA\r
5121\r
5122;@OR B\r
5123opcode_B_0:\r
5124 opORH z80bc\r
5125;@OR C\r
5126opcode_B_1:\r
5127 opORL z80bc\r
5128;@OR D\r
5129opcode_B_2:\r
5130 opORH z80de\r
5131;@OR E\r
5132opcode_B_3:\r
5133 opORL z80de\r
5134;@OR H\r
5135opcode_B_4:\r
5136 opORH z80hl\r
5137;@OR L\r
5138opcode_B_5:\r
5139 opORL z80hl\r
5140;@OR (HL)\r
5141opcode_B_6:\r
5142 readmem8HL\r
5143 opORb\r
5144 fetch 7\r
5145;@OR A\r
5146opcode_B_7:\r
5147 opORA\r
5148\r
5149;@CP B\r
5150opcode_B_8:\r
5151 opCPH z80bc\r
5152;@CP C\r
5153opcode_B_9:\r
5154 opCPL z80bc\r
5155;@CP D\r
5156opcode_B_A:\r
5157 opCPH z80de\r
5158;@CP E\r
5159opcode_B_B:\r
5160 opCPL z80de\r
5161;@CP H\r
5162opcode_B_C:\r
5163 opCPH z80hl\r
5164;@CP L\r
5165opcode_B_D:\r
5166 opCPL z80hl\r
5167;@CP (HL)\r
5168opcode_B_E:\r
5169 readmem8HL\r
5170 opCPb\r
5171 fetch 7\r
5172;@CP A\r
5173opcode_B_F:\r
5174 opCPA\r
5175\r
5176;@RET NZ\r
5177opcode_C_0:\r
5178 tst z80f,#1<<ZFlag\r
5179 beq opcode_C_9 ;@unconditional RET\r
5180 fetch 5\r
5181\r
5182;@POP BC\r
5183opcode_C_1:\r
5184 opPOPreg z80bc\r
5185\r
5186;@JP NZ,$+3\r
5187opcode_C_2:\r
5188 tst z80f,#1<<ZFlag\r
5189 beq opcode_C_3 ;@unconditional JP\r
5190 add z80pc,z80pc,#2\r
5191 fetch 10\r
5192;@JP $+3\r
5193opcode_C_3:\r
5194 ldrb r0,[z80pc],#1\r
5195 ldrb r1,[z80pc],#1\r
5196 orr r0,r0,r1, lsl #8\r
5197 rebasepc\r
5198 fetch 10\r
5199;@CALL NZ,NN\r
5200opcode_C_4:\r
5201 tst z80f,#1<<ZFlag\r
5202 beq opcode_C_D ;@unconditional CALL\r
5203 add z80pc,z80pc,#2\r
5204 fetch 10\r
5205\r
5206;@PUSH BC\r
5207opcode_C_5:\r
5208 opPUSHreg z80bc\r
5209 fetch 11\r
5210;@ADD A,N\r
5211opcode_C_6:\r
5212 ldrb r0,[z80pc],#1\r
5213 opADDb\r
5214 fetch 7\r
5215;@RST 0\r
5216opcode_C_7:\r
5217 opRST 0x00\r
5218\r
5219;@RET Z\r
5220opcode_C_8:\r
5221 tst z80f,#1<<ZFlag\r
5222 bne opcode_C_9 ;@unconditional RET\r
5223 fetch 5\r
5224;@RET\r
5225opcode_C_9:\r
5226 opPOP\r
5227 rebasepc\r
5228 fetch 10\r
5229;@JP Z,$+3\r
5230opcode_C_A:\r
5231 tst z80f,#1<<ZFlag\r
5232 bne opcode_C_3 ;@unconditional JP\r
5233 add z80pc,z80pc,#2\r
5234 fetch 10\r
5235\r
5236;@This reads this opcodes_CB lookup table to find the location of\r
5237;@the CB sub for the intruction and then branches to that location\r
5238opcode_C_B:\r
5239 ldrb r0,[z80pc],#1\r
5240 ldr pc,[pc,r0, lsl #2]\r
5241opcodes_CB: .word 0x00000000\r
5242 .word opcode_CB_00,opcode_CB_01,opcode_CB_02,opcode_CB_03,opcode_CB_04,opcode_CB_05,opcode_CB_06,opcode_CB_07\r
5243 .word opcode_CB_08,opcode_CB_09,opcode_CB_0A,opcode_CB_0B,opcode_CB_0C,opcode_CB_0D,opcode_CB_0E,opcode_CB_0F\r
5244 .word opcode_CB_10,opcode_CB_11,opcode_CB_12,opcode_CB_13,opcode_CB_14,opcode_CB_15,opcode_CB_16,opcode_CB_17\r
5245 .word opcode_CB_18,opcode_CB_19,opcode_CB_1A,opcode_CB_1B,opcode_CB_1C,opcode_CB_1D,opcode_CB_1E,opcode_CB_1F\r
5246 .word opcode_CB_20,opcode_CB_21,opcode_CB_22,opcode_CB_23,opcode_CB_24,opcode_CB_25,opcode_CB_26,opcode_CB_27\r
5247 .word opcode_CB_28,opcode_CB_29,opcode_CB_2A,opcode_CB_2B,opcode_CB_2C,opcode_CB_2D,opcode_CB_2E,opcode_CB_2F\r
5248 .word opcode_CB_30,opcode_CB_31,opcode_CB_32,opcode_CB_33,opcode_CB_34,opcode_CB_35,opcode_CB_36,opcode_CB_37\r
5249 .word opcode_CB_38,opcode_CB_39,opcode_CB_3A,opcode_CB_3B,opcode_CB_3C,opcode_CB_3D,opcode_CB_3E,opcode_CB_3F\r
5250 .word opcode_CB_40,opcode_CB_41,opcode_CB_42,opcode_CB_43,opcode_CB_44,opcode_CB_45,opcode_CB_46,opcode_CB_47\r
5251 .word opcode_CB_48,opcode_CB_49,opcode_CB_4A,opcode_CB_4B,opcode_CB_4C,opcode_CB_4D,opcode_CB_4E,opcode_CB_4F\r
5252 .word opcode_CB_50,opcode_CB_51,opcode_CB_52,opcode_CB_53,opcode_CB_54,opcode_CB_55,opcode_CB_56,opcode_CB_57\r
5253 .word opcode_CB_58,opcode_CB_59,opcode_CB_5A,opcode_CB_5B,opcode_CB_5C,opcode_CB_5D,opcode_CB_5E,opcode_CB_5F\r
5254 .word opcode_CB_60,opcode_CB_61,opcode_CB_62,opcode_CB_63,opcode_CB_64,opcode_CB_65,opcode_CB_66,opcode_CB_67\r
5255 .word opcode_CB_68,opcode_CB_69,opcode_CB_6A,opcode_CB_6B,opcode_CB_6C,opcode_CB_6D,opcode_CB_6E,opcode_CB_6F\r
5256 .word opcode_CB_70,opcode_CB_71,opcode_CB_72,opcode_CB_73,opcode_CB_74,opcode_CB_75,opcode_CB_76,opcode_CB_77\r
5257 .word opcode_CB_78,opcode_CB_79,opcode_CB_7A,opcode_CB_7B,opcode_CB_7C,opcode_CB_7D,opcode_CB_7E,opcode_CB_7F\r
5258 .word opcode_CB_80,opcode_CB_81,opcode_CB_82,opcode_CB_83,opcode_CB_84,opcode_CB_85,opcode_CB_86,opcode_CB_87\r
5259 .word opcode_CB_88,opcode_CB_89,opcode_CB_8A,opcode_CB_8B,opcode_CB_8C,opcode_CB_8D,opcode_CB_8E,opcode_CB_8F\r
5260 .word opcode_CB_90,opcode_CB_91,opcode_CB_92,opcode_CB_93,opcode_CB_94,opcode_CB_95,opcode_CB_96,opcode_CB_97\r
5261 .word opcode_CB_98,opcode_CB_99,opcode_CB_9A,opcode_CB_9B,opcode_CB_9C,opcode_CB_9D,opcode_CB_9E,opcode_CB_9F\r
5262 .word opcode_CB_A0,opcode_CB_A1,opcode_CB_A2,opcode_CB_A3,opcode_CB_A4,opcode_CB_A5,opcode_CB_A6,opcode_CB_A7\r
5263 .word opcode_CB_A8,opcode_CB_A9,opcode_CB_AA,opcode_CB_AB,opcode_CB_AC,opcode_CB_AD,opcode_CB_AE,opcode_CB_AF\r
5264 .word opcode_CB_B0,opcode_CB_B1,opcode_CB_B2,opcode_CB_B3,opcode_CB_B4,opcode_CB_B5,opcode_CB_B6,opcode_CB_B7\r
5265 .word opcode_CB_B8,opcode_CB_B9,opcode_CB_BA,opcode_CB_BB,opcode_CB_BC,opcode_CB_BD,opcode_CB_BE,opcode_CB_BF\r
5266 .word opcode_CB_C0,opcode_CB_C1,opcode_CB_C2,opcode_CB_C3,opcode_CB_C4,opcode_CB_C5,opcode_CB_C6,opcode_CB_C7\r
5267 .word opcode_CB_C8,opcode_CB_C9,opcode_CB_CA,opcode_CB_CB,opcode_CB_CC,opcode_CB_CD,opcode_CB_CE,opcode_CB_CF\r
5268 .word opcode_CB_D0,opcode_CB_D1,opcode_CB_D2,opcode_CB_D3,opcode_CB_D4,opcode_CB_D5,opcode_CB_D6,opcode_CB_D7\r
5269 .word opcode_CB_D8,opcode_CB_D9,opcode_CB_DA,opcode_CB_DB,opcode_CB_DC,opcode_CB_DD,opcode_CB_DE,opcode_CB_DF\r
5270 .word opcode_CB_E0,opcode_CB_E1,opcode_CB_E2,opcode_CB_E3,opcode_CB_E4,opcode_CB_E5,opcode_CB_E6,opcode_CB_E7\r
5271 .word opcode_CB_E8,opcode_CB_E9,opcode_CB_EA,opcode_CB_EB,opcode_CB_EC,opcode_CB_ED,opcode_CB_EE,opcode_CB_EF\r
5272 .word opcode_CB_F0,opcode_CB_F1,opcode_CB_F2,opcode_CB_F3,opcode_CB_F4,opcode_CB_F5,opcode_CB_F6,opcode_CB_F7\r
5273 .word opcode_CB_F8,opcode_CB_F9,opcode_CB_FA,opcode_CB_FB,opcode_CB_FC,opcode_CB_FD,opcode_CB_FE,opcode_CB_FF\r
5274\r
5275;@CALL Z,NN\r
5276opcode_C_C:\r
5277 tst z80f,#1<<ZFlag\r
5278 bne opcode_C_D ;@unconditional CALL\r
5279 add z80pc,z80pc,#2\r
5280 fetch 10\r
5281;@CALL NN\r
5282opcode_C_D:\r
5283 ldrb r0,[z80pc],#1\r
5284 ldrb r1,[z80pc],#1\r
5285 ldr r2,[cpucontext,#z80pc_base]\r
5286 sub r2,z80pc,r2\r
5287 orr z80pc,r0,r1, lsl #8\r
5288 opPUSHareg r2\r
5289 mov r0,z80pc\r
5290 rebasepc\r
5291 fetch 17\r
5292;@ADC A,N\r
5293opcode_C_E:\r
5294 ldrb r0,[z80pc],#1\r
5295 opADCb\r
5296 fetch 7\r
5297;@RST 8H\r
5298opcode_C_F:\r
5299 opRST 0x08\r
5300\r
5301;@RET NC\r
5302opcode_D_0:\r
5303 tst z80f,#1<<CFlag\r
5304 beq opcode_C_9 ;@unconditional RET\r
5305 fetch 5\r
5306;@POP DE\r
5307opcode_D_1:\r
5308 opPOPreg z80de\r
5309\r
5310;@JP NC, $+3\r
5311opcode_D_2 :\r
5312 tst z80f,#1<<CFlag\r
5313 beq opcode_C_3 ;@unconditional JP\r
5314 add z80pc,z80pc,#2\r
5315 fetch 10\r
5316;@OUT (N),A\r
5317opcode_D_3:\r
5318 ldrb r0,[z80pc],#1\r
5319 orr r0,r0,z80a,lsr#16\r
5320 mov r1,z80a, lsr #24\r
5321 opOUT\r
5322 fetch 11\r
5323;@CALL NC,NN\r
5324opcode_D_4:\r
5325 tst z80f,#1<<CFlag\r
5326 beq opcode_C_D ;@unconditional CALL\r
5327 add z80pc,z80pc,#2\r
5328 fetch 10\r
5329;@PUSH DE\r
5330opcode_D_5:\r
5331 opPUSHreg z80de\r
5332 fetch 11\r
5333;@SUB N\r
5334opcode_D_6:\r
5335 ldrb r0,[z80pc],#1\r
5336 opSUBb\r
5337 fetch 7\r
5338\r
5339;@RST 10H\r
5340opcode_D_7:\r
5341 opRST 0x10\r
5342\r
5343;@RET C\r
5344opcode_D_8:\r
5345 tst z80f,#1<<CFlag\r
5346 bne opcode_C_9 ;@unconditional RET\r
5347 fetch 5\r
5348;@EXX\r
5349opcode_D_9:\r
5350 add r1,cpucontext,#z80bc2\r
5351 swp z80bc,z80bc,[r1]\r
5352 add r1,cpucontext,#z80de2\r
5353 swp z80de,z80de,[r1]\r
5354 add r1,cpucontext,#z80hl2\r
5355 swp z80hl,z80hl,[r1]\r
5356 fetch 4\r
5357;@JP C,$+3\r
5358opcode_D_A:\r
5359 tst z80f,#1<<CFlag\r
5360 bne opcode_C_3 ;@unconditional JP\r
5361 add z80pc,z80pc,#2\r
5362 fetch 10\r
5363;@IN A,(N)\r
5364opcode_D_B:\r
5365 ldrb r0,[z80pc],#1\r
5366 orr r0,r0,z80a,lsr#16\r
5367 opIN\r
5368 mov z80a,r0, lsl #24 ;@ r0 = data read\r
5369 fetch 11\r
5370;@CALL C,NN\r
5371opcode_D_C:\r
5372 tst z80f,#1<<CFlag\r
5373 bne opcode_C_D ;@unconditional CALL\r
5374 add z80pc,z80pc,#2\r
5375 fetch 10\r
5376\r
5377;@opcodes_DD\r
5378opcode_D_D:\r
5379 add z80xx,cpucontext,#z80ix\r
5380 b opcode_D_D_F_D\r
5381opcode_F_D:\r
5382 add z80xx,cpucontext,#z80iy\r
5383opcode_D_D_F_D:\r
5384 ldrb r0,[z80pc],#1\r
5385 ldr pc,[pc,r0, lsl #2]\r
5386opcodes_DD: .word 0x00000000\r
5387 .word opcode_0_0, opcode_0_1, opcode_0_2, opcode_0_3, opcode_0_4, opcode_0_5, opcode_0_6, opcode_0_7\r
5388 .word opcode_0_8, opcode_DD_09,opcode_0_A, opcode_0_B, opcode_0_C, opcode_0_D, opcode_0_E, opcode_0_F\r
5389 .word opcode_1_0, opcode_1_1, opcode_1_2, opcode_1_3, opcode_1_4, opcode_1_5, opcode_1_6, opcode_1_7\r
5390 .word opcode_1_8, opcode_DD_19,opcode_1_A, opcode_1_B, opcode_1_C, opcode_1_D, opcode_1_E, opcode_1_F\r
5391 .word opcode_2_0, opcode_DD_21,opcode_DD_22,opcode_DD_23,opcode_DD_24,opcode_DD_25,opcode_DD_26,opcode_2_7\r
5392 .word opcode_2_8, opcode_DD_29,opcode_DD_2A,opcode_DD_2B,opcode_DD_2C,opcode_DD_2D,opcode_DD_2E,opcode_2_F\r
5393 .word opcode_3_0, opcode_3_1, opcode_3_2, opcode_3_3, opcode_DD_34,opcode_DD_35,opcode_DD_36,opcode_3_7\r
5394 .word opcode_3_8, opcode_DD_39,opcode_3_A, opcode_3_B, opcode_3_C, opcode_3_D, opcode_3_E, opcode_3_F\r
5395 .word opcode_4_0, opcode_4_1, opcode_4_2, opcode_4_3, opcode_DD_44,opcode_DD_45,opcode_DD_46,opcode_4_7\r
5396 .word opcode_4_8, opcode_4_9, opcode_4_A, opcode_4_B, opcode_DD_4C,opcode_DD_4D,opcode_DD_4E,opcode_4_F\r
5397 .word opcode_5_0, opcode_5_1, opcode_5_2, opcode_5_3, opcode_DD_54,opcode_DD_55,opcode_DD_56,opcode_5_7\r
5398 .word opcode_5_8, opcode_5_9, opcode_5_A, opcode_5_B, opcode_DD_5C,opcode_DD_5D,opcode_DD_5E,opcode_5_F\r
5399 .word opcode_DD_60,opcode_DD_61,opcode_DD_62,opcode_DD_63,opcode_DD_64,opcode_DD_65,opcode_DD_66,opcode_DD_67\r
5400 .word opcode_DD_68,opcode_DD_69,opcode_DD_6A,opcode_DD_6B,opcode_DD_6C,opcode_DD_6D,opcode_DD_6E,opcode_DD_6F\r
5401 .word opcode_DD_70,opcode_DD_71,opcode_DD_72,opcode_DD_73,opcode_DD_74,opcode_DD_75,opcode_7_6, opcode_DD_77\r
5402 .word opcode_7_8, opcode_7_9, opcode_7_A, opcode_7_B, opcode_DD_7C,opcode_DD_7D,opcode_DD_7E,opcode_7_F\r
5403 .word opcode_8_0, opcode_8_1, opcode_8_2, opcode_8_3, opcode_DD_84,opcode_DD_85,opcode_DD_86,opcode_8_7\r
5404 .word opcode_8_8, opcode_8_9, opcode_8_A, opcode_8_B, opcode_DD_8C,opcode_DD_8D,opcode_DD_8E,opcode_8_F\r
5405 .word opcode_9_0, opcode_9_1, opcode_9_2, opcode_9_3, opcode_DD_94,opcode_DD_95,opcode_DD_96,opcode_9_7\r
5406 .word opcode_9_8, opcode_9_9, opcode_9_A, opcode_9_B, opcode_DD_9C,opcode_DD_9D,opcode_DD_9E,opcode_9_F\r
5407 .word opcode_A_0, opcode_A_1, opcode_A_2, opcode_A_3, opcode_DD_A4,opcode_DD_A5,opcode_DD_A6,opcode_A_7\r
5408 .word opcode_A_8, opcode_A_9, opcode_A_A, opcode_A_B, opcode_DD_AC,opcode_DD_AD,opcode_DD_AE,opcode_A_F\r
5409 .word opcode_B_0, opcode_B_1, opcode_B_2, opcode_B_3, opcode_DD_B4,opcode_DD_B5,opcode_DD_B6,opcode_B_7\r
5410 .word opcode_B_8, opcode_B_9, opcode_B_A, opcode_B_B, opcode_DD_BC,opcode_DD_BD,opcode_DD_BE,opcode_B_F\r
5411 .word opcode_C_0, opcode_C_1, opcode_C_2, opcode_C_3, opcode_C_4, opcode_C_5, opcode_C_6, opcode_C_7\r
5412 .word opcode_C_8, opcode_C_9, opcode_C_A, opcode_DD_CB,opcode_C_C, opcode_C_D, opcode_C_E, opcode_C_F\r
5413 .word opcode_D_0, opcode_D_1, opcode_D_2, opcode_D_3, opcode_D_4, opcode_D_5, opcode_D_6, opcode_D_7\r
5414 .word opcode_D_8, opcode_D_9, opcode_D_A, opcode_D_B, opcode_D_C, opcode_D_D, opcode_D_E, opcode_D_F\r
5415 .word opcode_E_0, opcode_DD_E1,opcode_E_2, opcode_DD_E3,opcode_E_4, opcode_DD_E5,opcode_E_6, opcode_E_7\r
5416 .word opcode_E_8, opcode_DD_E9,opcode_E_A, opcode_E_B, opcode_E_C, opcode_E_D, opcode_E_E, opcode_E_F\r
5417 .word opcode_F_0, opcode_F_1, opcode_F_2, opcode_F_3, opcode_F_4, opcode_F_5, opcode_F_6, opcode_F_7\r
5418 .word opcode_F_8, opcode_DD_F9,opcode_F_A, opcode_F_B, opcode_F_C, opcode_F_D, opcode_F_E, opcode_F_F\r
5419\r
5420;@SBC A,N\r
5421opcode_D_E:\r
5422 ldrb r0,[z80pc],#1\r
5423 opSBCb\r
5424 fetch 7\r
5425;@RST 18H\r
5426opcode_D_F:\r
5427 opRST 0x18\r
5428\r
5429;@RET PO\r
5430opcode_E_0:\r
5431 tst z80f,#1<<VFlag\r
5432 beq opcode_C_9 ;@unconditional RET\r
5433 fetch 5\r
5434;@POP HL\r
5435opcode_E_1:\r
5436 opPOPreg z80hl\r
5437\r
5438;@JP PO,$+3\r
5439opcode_E_2:\r
5440 tst z80f,#1<<VFlag\r
5441 beq opcode_C_3 ;@unconditional JP\r
5442 add z80pc,z80pc,#2\r
5443 fetch 10\r
5444;@EX (SP),HL\r
5445opcode_E_3:\r
5446.if FAST_Z80SP\r
5447 ldrb r0,[z80sp]\r
5448 ldrb r1,[z80sp,#1]\r
5449 orr r0,r0,r1, lsl #8\r
5450 mov r1,z80hl, lsr #24\r
5451 strb r1,[z80sp,#1]\r
5452 mov r1,z80hl, lsr #16\r
5453 strb r1,[z80sp]\r
5454 mov z80hl,r0, lsl #16\r
5455.else\r
5456 mov r0,z80sp\r
5457 readmem16\r
5458 mov r1,r0\r
5459 mov r0,z80hl,lsr#16\r
5460 mov z80hl,r1,lsl#16\r
5461 mov r1,z80sp\r
5462 writemem16\r
5463.endif\r
5464 fetch 19\r
5465;@CALL PO,NN\r
5466opcode_E_4:\r
5467 tst z80f,#1<<VFlag\r
5468 beq opcode_C_D ;@unconditional CALL\r
5469 add z80pc,z80pc,#2\r
5470 fetch 10\r
5471;@PUSH HL\r
5472opcode_E_5:\r
5473 opPUSHreg z80hl\r
5474 fetch 11\r
5475;@AND N\r
5476opcode_E_6:\r
5477 ldrb r0,[z80pc],#1\r
5478 opANDb\r
5479 fetch 7\r
5480;@RST 20H\r
5481opcode_E_7:\r
5482 opRST 0x20\r
5483\r
5484;@RET PE\r
5485opcode_E_8:\r
5486 tst z80f,#1<<VFlag\r
5487 bne opcode_C_9 ;@unconditional RET\r
5488 fetch 5\r
5489;@JP (HL)\r
5490opcode_E_9:\r
5491 mov r0,z80hl, lsr #16\r
5492 rebasepc\r
5493 fetch 4\r
5494;@JP PE,$+3\r
5495opcode_E_A:\r
5496 tst z80f,#1<<VFlag\r
5497 bne opcode_C_3 ;@unconditional JP\r
5498 add z80pc,z80pc,#2\r
5499 fetch 10\r
5500;@EX DE,HL\r
5501opcode_E_B:\r
5502 mov r1,z80de\r
5503 mov z80de,z80hl\r
5504 mov z80hl,r1\r
5505 fetch 4\r
5506;@CALL PE,NN\r
5507opcode_E_C:\r
5508 tst z80f,#1<<VFlag\r
5509 bne opcode_C_D ;@unconditional CALL\r
5510 add z80pc,z80pc,#2\r
5511 fetch 10\r
5512\r
5513;@This should be caught at start\r
5514opcode_E_D:\r
5515 ldrb r1,[z80pc],#1\r
5516 ldr pc,[pc,r1, lsl #2]\r
5517opcodes_ED: .word 0x00000000\r
5518 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5519 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5520 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5521 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5522 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5523 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5524 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5525 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5526 .word opcode_ED_40,opcode_ED_41,opcode_ED_42,opcode_ED_43,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_47\r
5527 .word opcode_ED_48,opcode_ED_49,opcode_ED_4A,opcode_ED_4B,opcode_ED_44,opcode_ED_4D,opcode_ED_46,opcode_ED_4F\r
5528 .word opcode_ED_50,opcode_ED_51,opcode_ED_52,opcode_ED_53,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_57\r
5529 .word opcode_ED_58,opcode_ED_59,opcode_ED_5A,opcode_ED_5B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_5F\r
5530 .word opcode_ED_60,opcode_ED_61,opcode_ED_62,opcode_ED_63,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_67\r
5531 .word opcode_ED_68,opcode_ED_69,opcode_ED_6A,opcode_ED_6B,opcode_ED_44,opcode_ED_45,opcode_ED_46,opcode_ED_6F\r
5532 .word opcode_ED_70,opcode_ED_71,opcode_ED_72,opcode_ED_73,opcode_ED_44,opcode_ED_45,opcode_ED_56,opcode_ED_NF\r
5533 .word opcode_ED_78,opcode_ED_79,opcode_ED_7A,opcode_ED_7B,opcode_ED_44,opcode_ED_45,opcode_ED_5E,opcode_ED_NF\r
5534 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5535 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5536 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5537 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5538 .word opcode_ED_A0,opcode_ED_A1,opcode_ED_A2,opcode_ED_A3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5539 .word opcode_ED_A8,opcode_ED_A9,opcode_ED_AA,opcode_ED_AB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5540 .word opcode_ED_B0,opcode_ED_B1,opcode_ED_B2,opcode_ED_B3,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5541 .word opcode_ED_B8,opcode_ED_B9,opcode_ED_BA,opcode_ED_BB,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5542 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5543 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5544 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5545 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5546 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5547 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5548 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5549 .word opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF,opcode_ED_NF\r
5550\r
5551;@XOR N\r
5552opcode_E_E:\r
5553 ldrb r0,[z80pc],#1\r
5554 opXORb\r
5555 fetch 7\r
5556;@RST 28H\r
5557opcode_E_F:\r
5558 opRST 0x28\r
5559\r
5560;@RET P\r
5561opcode_F_0:\r
5562 tst z80f,#1<<SFlag\r
5563 beq opcode_C_9 ;@unconditional RET\r
5564 fetch 5\r
5565;@POP AF\r
5566opcode_F_1:\r
5567.if FAST_Z80SP\r
5568 ldrb z80f,[z80sp],#1\r
5569 sub r0,opcodes,#0x200\r
5570 ldrb z80f,[r0,z80f]\r
5571 ldrb z80a,[z80sp],#1\r
5572 mov z80a,z80a, lsl #24\r
5573.else\r
5574 mov r0,z80sp\r
5575 readmem16\r
5576 add z80sp,z80sp,#2\r
5577 and z80a,r0,#0xFF00\r
5578 mov z80a,z80a,lsl#16\r
5579 and z80f,r0,#0xFF\r
5580 sub r0,opcodes,#0x200\r
5581 ldrb z80f,[r0,z80f]\r
5582.endif\r
5583 fetch 10\r
5584;@JP P,$+3\r
5585opcode_F_2:\r
5586 tst z80f,#1<<SFlag\r
5587 beq opcode_C_3 ;@unconditional JP\r
5588 add z80pc,z80pc,#2\r
5589 fetch 10\r
5590;@DI\r
5591opcode_F_3:\r
5592 ldrb r1,[cpucontext,#z80if]\r
5593 bic r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5594 strb r1,[cpucontext,#z80if]\r
5595 fetch 4\r
5596;@CALL P,NN\r
5597opcode_F_4:\r
5598 tst z80f,#1<<SFlag\r
5599 beq opcode_C_D ;@unconditional CALL\r
5600 add z80pc,z80pc,#2\r
5601 fetch 10\r
5602;@PUSH AF\r
5603opcode_F_5:\r
5604 sub r0,opcodes,#0x300\r
5605 ldrb r0,[r0,z80f]\r
5606 orr r2,r0,z80a,lsr#16\r
5607 opPUSHareg r2\r
5608 fetch 11\r
5609;@OR N\r
5610opcode_F_6:\r
5611 ldrb r0,[z80pc],#1\r
5612 opORb\r
5613 fetch 7\r
5614;@RST 30H\r
5615opcode_F_7:\r
5616 opRST 0x30\r
5617\r
5618;@RET M\r
5619opcode_F_8:\r
5620 tst z80f,#1<<SFlag\r
5621 bne opcode_C_9 ;@unconditional RET\r
5622 fetch 5\r
5623;@LD SP,HL\r
5624opcode_F_9:\r
5625.if FAST_Z80SP\r
5626 mov r0,z80hl, lsr #16\r
5627 rebasesp\r
5628 mov z80sp,r0\r
5629.else\r
5630 mov z80sp,z80hl, lsr #16\r
5631.endif\r
5632 fetch 4\r
5633;@JP M,$+3\r
5634opcode_F_A:\r
5635 tst z80f,#1<<SFlag\r
5636 bne opcode_C_3 ;@unconditional JP\r
5637 add z80pc,z80pc,#2\r
5638 fetch 10\r
5639MAIN_opcodes_POINTER: .word MAIN_opcodes\r
5640EI_DUMMY_opcodes_POINTER: .word EI_DUMMY_opcodes\r
5641;@EI\r
5642opcode_F_B:\r
5643 ldrb r1,[cpucontext,#z80if]\r
5644 tst r1,#Z80_IF1\r
5645 bne ei_return_exit\r
5646\r
5647 orr r1,r1,#(Z80_IF1)|(Z80_IF2)\r
5648 strb r1,[cpucontext,#z80if]\r
5649\r
5650 mov r2,opcodes\r
5651 ldr opcodes,EI_DUMMY_opcodes_POINTER\r
5652 ldr pc,[r2,r0, lsl #2]\r
5653\r
5654ei_return:\r
5655 ;@point that program returns from EI to check interupts\r
5656 ;@an interupt can not be taken directly after a EI opcode\r
5657 ;@ reset z80pc and opcode pointer\r
5658 ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
5659 sub z80pc,z80pc,#1\r
5660 ldr opcodes,MAIN_opcodes_POINTER\r
5661 ;@ check ints\r
5662 tst r0,#1\r
5663 movnes r0,r0,lsr #8\r
5664 blne DoInterrupt\r
5665 ;@ continue\r
5666ei_return_exit:\r
5667 fetch 4\r
5668\r
5669;@CALL M,NN\r
5670opcode_F_C:\r
5671 tst z80f,#1<<SFlag\r
5672 bne opcode_C_D ;@unconditional CALL\r
5673 add z80pc,z80pc,#2\r
5674 fetch 10\r
5675\r
5676;@SHOULD BE CAUGHT AT START - FD SECTION\r
5677\r
5678;@CP N\r
5679opcode_F_E:\r
5680 ldrb r0,[z80pc],#1\r
5681 opCPb\r
5682 fetch 7\r
5683;@RST 38H\r
5684opcode_F_F:\r
5685 opRST 0x38\r
5686\r
5687\r
5688;@##################################\r
5689;@##################################\r
5690;@### opcodes CB #########################\r
5691;@##################################\r
5692;@##################################\r
5693\r
5694\r
5695;@RLC B\r
5696opcode_CB_00:\r
5697 opRLCH z80bc\r
5698;@RLC C\r
5699opcode_CB_01:\r
5700 opRLCL z80bc\r
5701;@RLC D\r
5702opcode_CB_02:\r
5703 opRLCH z80de\r
5704;@RLC E\r
5705opcode_CB_03:\r
5706 opRLCL z80de\r
5707;@RLC H\r
5708opcode_CB_04:\r
5709 opRLCH z80hl\r
5710;@RLC L\r
5711opcode_CB_05:\r
5712 opRLCL z80hl\r
5713;@RLC (HL)\r
5714opcode_CB_06:\r
5715 readmem8HL\r
5716 opRLCb\r
5717 writemem8HL\r
5718 fetch 15\r
5719;@RLC A\r
5720opcode_CB_07:\r
5721 opRLCA\r
5722\r
5723;@RRC B\r
5724opcode_CB_08:\r
5725 opRRCH z80bc\r
5726;@RRC C\r
5727opcode_CB_09:\r
5728 opRRCL z80bc\r
5729;@RRC D\r
5730opcode_CB_0A:\r
5731 opRRCH z80de\r
5732;@RRC E\r
5733opcode_CB_0B:\r
5734 opRRCL z80de\r
5735;@RRC H\r
5736opcode_CB_0C:\r
5737 opRRCH z80hl\r
5738;@RRC L\r
5739opcode_CB_0D:\r
5740 opRRCL z80hl\r
5741;@RRC (HL)\r
5742opcode_CB_0E :\r
5743 readmem8HL\r
5744 opRRCb\r
5745 writemem8HL\r
5746 fetch 15\r
5747;@RRC A\r
5748opcode_CB_0F:\r
5749 opRRCA\r
5750\r
5751;@RL B\r
5752opcode_CB_10:\r
5753 opRLH z80bc\r
5754;@RL C\r
5755opcode_CB_11:\r
5756 opRLL z80bc\r
5757;@RL D\r
5758opcode_CB_12:\r
5759 opRLH z80de\r
5760;@RL E\r
5761opcode_CB_13:\r
5762 opRLL z80de\r
5763;@RL H\r
5764opcode_CB_14:\r
5765 opRLH z80hl\r
5766;@RL L\r
5767opcode_CB_15:\r
5768 opRLL z80hl\r
5769;@RL (HL)\r
5770opcode_CB_16:\r
5771 readmem8HL\r
5772 opRLb\r
5773 writemem8HL\r
5774 fetch 15\r
5775;@RL A\r
5776opcode_CB_17:\r
5777 opRLA\r
5778\r
5779;@RR B \r
5780opcode_CB_18:\r
5781 opRRH z80bc\r
5782;@RR C\r
5783opcode_CB_19:\r
5784 opRRL z80bc\r
5785;@RR D\r
5786opcode_CB_1A:\r
5787 opRRH z80de\r
5788;@RR E\r
5789opcode_CB_1B:\r
5790 opRRL z80de\r
5791;@RR H\r
5792opcode_CB_1C:\r
5793 opRRH z80hl\r
5794;@RR L\r
5795opcode_CB_1D:\r
5796 opRRL z80hl\r
5797;@RR (HL)\r
5798opcode_CB_1E:\r
5799 readmem8HL\r
5800 opRRb\r
5801 writemem8HL\r
5802 fetch 15\r
5803;@RR A\r
5804opcode_CB_1F:\r
5805 opRRA\r
5806\r
5807;@SLA B\r
5808opcode_CB_20:\r
5809 opSLAH z80bc\r
5810;@SLA C\r
5811opcode_CB_21:\r
5812 opSLAL z80bc\r
5813;@SLA D\r
5814opcode_CB_22:\r
5815 opSLAH z80de\r
5816;@SLA E\r
5817opcode_CB_23:\r
5818 opSLAL z80de\r
5819;@SLA H\r
5820opcode_CB_24:\r
5821 opSLAH z80hl\r
5822;@SLA L\r
5823opcode_CB_25:\r
5824 opSLAL z80hl\r
5825;@SLA (HL)\r
5826opcode_CB_26:\r
5827 readmem8HL\r
5828 opSLAb\r
5829 writemem8HL\r
5830 fetch 15\r
5831;@SLA A\r
5832opcode_CB_27:\r
5833 opSLAA\r
5834\r
5835;@SRA B\r
5836opcode_CB_28:\r
5837 opSRAH z80bc\r
5838;@SRA C\r
5839opcode_CB_29:\r
5840 opSRAL z80bc\r
5841;@SRA D\r
5842opcode_CB_2A:\r
5843 opSRAH z80de\r
5844;@SRA E\r
5845opcode_CB_2B:\r
5846 opSRAL z80de\r
5847;@SRA H\r
5848opcode_CB_2C:\r
5849 opSRAH z80hl\r
5850;@SRA L\r
5851opcode_CB_2D:\r
5852 opSRAL z80hl\r
5853;@SRA (HL)\r
5854opcode_CB_2E:\r
5855 readmem8HL\r
5856 opSRAb\r
5857 writemem8HL\r
5858 fetch 15\r
5859;@SRA A\r
5860opcode_CB_2F:\r
5861 opSRAA\r
5862\r
5863;@SLL B\r
5864opcode_CB_30:\r
5865 opSLLH z80bc\r
5866;@SLL C\r
5867opcode_CB_31:\r
5868 opSLLL z80bc\r
5869;@SLL D\r
5870opcode_CB_32:\r
5871 opSLLH z80de\r
5872;@SLL E\r
5873opcode_CB_33:\r
5874 opSLLL z80de\r
5875;@SLL H\r
5876opcode_CB_34:\r
5877 opSLLH z80hl\r
5878;@SLL L\r
5879opcode_CB_35:\r
5880 opSLLL z80hl\r
5881;@SLL (HL)\r
5882opcode_CB_36:\r
5883 readmem8HL\r
5884 opSLLb\r
5885 writemem8HL\r
5886 fetch 15\r
5887;@SLL A\r
5888opcode_CB_37:\r
5889 opSLLA\r
5890\r
5891;@SRL B\r
5892opcode_CB_38:\r
5893 opSRLH z80bc\r
5894;@SRL C\r
5895opcode_CB_39:\r
5896 opSRLL z80bc\r
5897;@SRL D\r
5898opcode_CB_3A:\r
5899 opSRLH z80de\r
5900;@SRL E\r
5901opcode_CB_3B:\r
5902 opSRLL z80de\r
5903;@SRL H\r
5904opcode_CB_3C:\r
5905 opSRLH z80hl\r
5906;@SRL L\r
5907opcode_CB_3D:\r
5908 opSRLL z80hl\r
5909;@SRL (HL)\r
5910opcode_CB_3E:\r
5911 readmem8HL\r
5912 opSRLb\r
5913 writemem8HL\r
5914 fetch 15\r
5915;@SRL A\r
5916opcode_CB_3F:\r
5917 opSRLA\r
5918\r
5919\r
5920;@BIT 0,B\r
5921opcode_CB_40:\r
5922 opBITH z80bc 0\r
5923;@BIT 0,C\r
5924opcode_CB_41:\r
5925 opBITL z80bc 0\r
5926;@BIT 0,D\r
5927opcode_CB_42:\r
5928 opBITH z80de 0\r
5929;@BIT 0,E\r
5930opcode_CB_43:\r
5931 opBITL z80de 0\r
5932;@BIT 0,H\r
5933opcode_CB_44:\r
5934 opBITH z80hl 0\r
5935;@BIT 0,L\r
5936opcode_CB_45:\r
5937 opBITL z80hl 0\r
5938;@BIT 0,(HL)\r
5939opcode_CB_46:\r
5940 readmem8HL\r
5941 opBITb 0\r
5942 fetch 12\r
5943;@BIT 0,A\r
5944opcode_CB_47:\r
5945 opBITH z80a 0\r
5946\r
5947;@BIT 1,B\r
5948opcode_CB_48:\r
5949 opBITH z80bc 1\r
5950;@BIT 1,C\r
5951opcode_CB_49:\r
5952 opBITL z80bc 1\r
5953;@BIT 1,D\r
5954opcode_CB_4A:\r
5955 opBITH z80de 1\r
5956;@BIT 1,E\r
5957opcode_CB_4B:\r
5958 opBITL z80de 1\r
5959;@BIT 1,H\r
5960opcode_CB_4C:\r
5961 opBITH z80hl 1\r
5962;@BIT 1,L\r
5963opcode_CB_4D:\r
5964 opBITL z80hl 1\r
5965;@BIT 1,(HL)\r
5966opcode_CB_4E:\r
5967 readmem8HL\r
5968 opBITb 1\r
5969 fetch 12\r
5970;@BIT 1,A\r
5971opcode_CB_4F:\r
5972 opBITH z80a 1\r
5973\r
5974;@BIT 2,B\r
5975opcode_CB_50:\r
5976 opBITH z80bc 2\r
5977;@BIT 2,C\r
5978opcode_CB_51:\r
5979 opBITL z80bc 2\r
5980;@BIT 2,D\r
5981opcode_CB_52:\r
5982 opBITH z80de 2\r
5983;@BIT 2,E\r
5984opcode_CB_53:\r
5985 opBITL z80de 2\r
5986;@BIT 2,H\r
5987opcode_CB_54:\r
5988 opBITH z80hl 2\r
5989;@BIT 2,L\r
5990opcode_CB_55:\r
5991 opBITL z80hl 2\r
5992;@BIT 2,(HL)\r
5993opcode_CB_56:\r
5994 readmem8HL\r
5995 opBITb 2\r
5996 fetch 12\r
5997;@BIT 2,A\r
5998opcode_CB_57:\r
5999 opBITH z80a 2\r
6000\r
6001;@BIT 3,B\r
6002opcode_CB_58:\r
6003 opBITH z80bc 3\r
6004;@BIT 3,C\r
6005opcode_CB_59:\r
6006 opBITL z80bc 3\r
6007;@BIT 3,D\r
6008opcode_CB_5A:\r
6009 opBITH z80de 3\r
6010;@BIT 3,E\r
6011opcode_CB_5B:\r
6012 opBITL z80de 3\r
6013;@BIT 3,H\r
6014opcode_CB_5C:\r
6015 opBITH z80hl 3\r
6016;@BIT 3,L\r
6017opcode_CB_5D:\r
6018 opBITL z80hl 3\r
6019;@BIT 3,(HL)\r
6020opcode_CB_5E:\r
6021 readmem8HL\r
6022 opBITb 3\r
6023 fetch 12\r
6024;@BIT 3,A\r
6025opcode_CB_5F:\r
6026 opBITH z80a 3\r
6027\r
6028;@BIT 4,B\r
6029opcode_CB_60:\r
6030 opBITH z80bc 4\r
6031;@BIT 4,C\r
6032opcode_CB_61:\r
6033 opBITL z80bc 4\r
6034;@BIT 4,D\r
6035opcode_CB_62:\r
6036 opBITH z80de 4\r
6037;@BIT 4,E\r
6038opcode_CB_63:\r
6039 opBITL z80de 4\r
6040;@BIT 4,H\r
6041opcode_CB_64:\r
6042 opBITH z80hl 4\r
6043;@BIT 4,L\r
6044opcode_CB_65:\r
6045 opBITL z80hl 4\r
6046;@BIT 4,(HL)\r
6047opcode_CB_66:\r
6048 readmem8HL\r
6049 opBITb 4\r
6050 fetch 12\r
6051;@BIT 4,A\r
6052opcode_CB_67:\r
6053 opBITH z80a 4\r
6054\r
6055;@BIT 5,B\r
6056opcode_CB_68:\r
6057 opBITH z80bc 5\r
6058;@BIT 5,C\r
6059opcode_CB_69:\r
6060 opBITL z80bc 5\r
6061;@BIT 5,D\r
6062opcode_CB_6A:\r
6063 opBITH z80de 5\r
6064;@BIT 5,E\r
6065opcode_CB_6B:\r
6066 opBITL z80de 5\r
6067;@BIT 5,H\r
6068opcode_CB_6C:\r
6069 opBITH z80hl 5\r
6070;@BIT 5,L\r
6071opcode_CB_6D:\r
6072 opBITL z80hl 5\r
6073;@BIT 5,(HL)\r
6074opcode_CB_6E:\r
6075 readmem8HL\r
6076 opBITb 5\r
6077 fetch 12\r
6078;@BIT 5,A\r
6079opcode_CB_6F:\r
6080 opBITH z80a 5\r
6081\r
6082;@BIT 6,B\r
6083opcode_CB_70:\r
6084 opBITH z80bc 6\r
6085;@BIT 6,C\r
6086opcode_CB_71:\r
6087 opBITL z80bc 6\r
6088;@BIT 6,D\r
6089opcode_CB_72:\r
6090 opBITH z80de 6\r
6091;@BIT 6,E\r
6092opcode_CB_73:\r
6093 opBITL z80de 6\r
6094;@BIT 6,H\r
6095opcode_CB_74:\r
6096 opBITH z80hl 6\r
6097;@BIT 6,L\r
6098opcode_CB_75:\r
6099 opBITL z80hl 6\r
6100;@BIT 6,(HL)\r
6101opcode_CB_76:\r
6102 readmem8HL\r
6103 opBITb 6\r
6104 fetch 12\r
6105;@BIT 6,A\r
6106opcode_CB_77:\r
6107 opBITH z80a 6\r
6108\r
6109;@BIT 7,B\r
6110opcode_CB_78:\r
6111 opBIT7H z80bc\r
6112;@BIT 7,C\r
6113opcode_CB_79:\r
6114 opBIT7L z80bc\r
6115;@BIT 7,D\r
6116opcode_CB_7A:\r
6117 opBIT7H z80de\r
6118;@BIT 7,E\r
6119opcode_CB_7B:\r
6120 opBIT7L z80de\r
6121;@BIT 7,H\r
6122opcode_CB_7C:\r
6123 opBIT7H z80hl\r
6124;@BIT 7,L\r
6125opcode_CB_7D:\r
6126 opBIT7L z80hl\r
6127;@BIT 7,(HL)\r
6128opcode_CB_7E:\r
6129 readmem8HL\r
6130 opBIT7b\r
6131 fetch 12\r
6132;@BIT 7,A\r
6133opcode_CB_7F:\r
6134 opBIT7H z80a\r
6135\r
6136;@RES 0,B\r
6137opcode_CB_80:\r
6138 bic z80bc,z80bc,#1<<24\r
6139 fetch 8\r
6140;@RES 0,C\r
6141opcode_CB_81:\r
6142 bic z80bc,z80bc,#1<<16\r
6143 fetch 8\r
6144;@RES 0,D\r
6145opcode_CB_82:\r
6146 bic z80de,z80de,#1<<24\r
6147 fetch 8\r
6148;@RES 0,E\r
6149opcode_CB_83:\r
6150 bic z80de,z80de,#1<<16\r
6151 fetch 8\r
6152;@RES 0,H\r
6153opcode_CB_84:\r
6154 bic z80hl,z80hl,#1<<24\r
6155 fetch 8\r
6156;@RES 0,L\r
6157opcode_CB_85:\r
6158 bic z80hl,z80hl,#1<<16\r
6159 fetch 8\r
6160;@RES 0,(HL)\r
6161opcode_CB_86:\r
6162 opRESmemHL 0\r
6163;@RES 0,A\r
6164opcode_CB_87:\r
6165 bic z80a,z80a,#1<<24\r
6166 fetch 8\r
6167\r
6168;@RES 1,B\r
6169opcode_CB_88:\r
6170 bic z80bc,z80bc,#1<<25\r
6171 fetch 8\r
6172;@RES 1,C\r
6173opcode_CB_89:\r
6174 bic z80bc,z80bc,#1<<17\r
6175 fetch 8\r
6176;@RES 1,D\r
6177opcode_CB_8A:\r
6178 bic z80de,z80de,#1<<25\r
6179 fetch 8\r
6180;@RES 1,E\r
6181opcode_CB_8B:\r
6182 bic z80de,z80de,#1<<17\r
6183 fetch 8\r
6184;@RES 1,H\r
6185opcode_CB_8C:\r
6186 bic z80hl,z80hl,#1<<25\r
6187 fetch 8\r
6188;@RES 1,L\r
6189opcode_CB_8D:\r
6190 bic z80hl,z80hl,#1<<17\r
6191 fetch 8\r
6192;@RES 1,(HL)\r
6193opcode_CB_8E:\r
6194 opRESmemHL 1\r
6195;@RES 1,A\r
6196opcode_CB_8F:\r
6197 bic z80a,z80a,#1<<25\r
6198 fetch 8\r
6199\r
6200;@RES 2,B\r
6201opcode_CB_90:\r
6202 bic z80bc,z80bc,#1<<26\r
6203 fetch 8\r
6204;@RES 2,C\r
6205opcode_CB_91:\r
6206 bic z80bc,z80bc,#1<<18\r
6207 fetch 8\r
6208;@RES 2,D\r
6209opcode_CB_92:\r
6210 bic z80de,z80de,#1<<26\r
6211 fetch 8\r
6212;@RES 2,E\r
6213opcode_CB_93:\r
6214 bic z80de,z80de,#1<<18\r
6215 fetch 8\r
6216;@RES 2,H\r
6217opcode_CB_94:\r
6218 bic z80hl,z80hl,#1<<26\r
6219 fetch 8\r
6220;@RES 2,L\r
6221opcode_CB_95:\r
6222 bic z80hl,z80hl,#1<<18\r
6223 fetch 8\r
6224;@RES 2,(HL)\r
6225opcode_CB_96:\r
6226 opRESmemHL 2\r
6227;@RES 2,A\r
6228opcode_CB_97:\r
6229 bic z80a,z80a,#1<<26\r
6230 fetch 8\r
6231\r
6232;@RES 3,B\r
6233opcode_CB_98:\r
6234 bic z80bc,z80bc,#1<<27\r
6235 fetch 8\r
6236;@RES 3,C\r
6237opcode_CB_99:\r
6238 bic z80bc,z80bc,#1<<19\r
6239 fetch 8\r
6240;@RES 3,D\r
6241opcode_CB_9A:\r
6242 bic z80de,z80de,#1<<27\r
6243 fetch 8\r
6244;@RES 3,E\r
6245opcode_CB_9B:\r
6246 bic z80de,z80de,#1<<19\r
6247 fetch 8\r
6248;@RES 3,H\r
6249opcode_CB_9C:\r
6250 bic z80hl,z80hl,#1<<27\r
6251 fetch 8\r
6252;@RES 3,L\r
6253opcode_CB_9D:\r
6254 bic z80hl,z80hl,#1<<19\r
6255 fetch 8\r
6256;@RES 3,(HL)\r
6257opcode_CB_9E:\r
6258 opRESmemHL 3\r
6259;@RES 3,A\r
6260opcode_CB_9F:\r
6261 bic z80a,z80a,#1<<27\r
6262 fetch 8\r
6263\r
6264;@RES 4,B\r
6265opcode_CB_A0:\r
6266 bic z80bc,z80bc,#1<<28\r
6267 fetch 8\r
6268;@RES 4,C\r
6269opcode_CB_A1:\r
6270 bic z80bc,z80bc,#1<<20\r
6271 fetch 8\r
6272;@RES 4,D\r
6273opcode_CB_A2:\r
6274 bic z80de,z80de,#1<<28\r
6275 fetch 8\r
6276;@RES 4,E\r
6277opcode_CB_A3:\r
6278 bic z80de,z80de,#1<<20\r
6279 fetch 8\r
6280;@RES 4,H\r
6281opcode_CB_A4:\r
6282 bic z80hl,z80hl,#1<<28\r
6283 fetch 8\r
6284;@RES 4,L\r
6285opcode_CB_A5:\r
6286 bic z80hl,z80hl,#1<<20\r
6287 fetch 8\r
6288;@RES 4,(HL)\r
6289opcode_CB_A6:\r
6290 opRESmemHL 4\r
6291;@RES 4,A\r
6292opcode_CB_A7:\r
6293 bic z80a,z80a,#1<<28\r
6294 fetch 8\r
6295\r
6296;@RES 5,B\r
6297opcode_CB_A8:\r
6298 bic z80bc,z80bc,#1<<29\r
6299 fetch 8\r
6300;@RES 5,C\r
6301opcode_CB_A9:\r
6302 bic z80bc,z80bc,#1<<21\r
6303 fetch 8\r
6304;@RES 5,D\r
6305opcode_CB_AA:\r
6306 bic z80de,z80de,#1<<29\r
6307 fetch 8\r
6308;@RES 5,E\r
6309opcode_CB_AB:\r
6310 bic z80de,z80de,#1<<21\r
6311 fetch 8\r
6312;@RES 5,H\r
6313opcode_CB_AC:\r
6314 bic z80hl,z80hl,#1<<29\r
6315 fetch 8\r
6316;@RES 5,L\r
6317opcode_CB_AD:\r
6318 bic z80hl,z80hl,#1<<21\r
6319 fetch 8\r
6320;@RES 5,(HL)\r
6321opcode_CB_AE:\r
6322 opRESmemHL 5\r
6323;@RES 5,A\r
6324opcode_CB_AF:\r
6325 bic z80a,z80a,#1<<29\r
6326 fetch 8\r
6327\r
6328;@RES 6,B\r
6329opcode_CB_B0:\r
6330 bic z80bc,z80bc,#1<<30\r
6331 fetch 8\r
6332;@RES 6,C\r
6333opcode_CB_B1:\r
6334 bic z80bc,z80bc,#1<<22\r
6335 fetch 8\r
6336;@RES 6,D\r
6337opcode_CB_B2:\r
6338 bic z80de,z80de,#1<<30\r
6339 fetch 8\r
6340;@RES 6,E\r
6341opcode_CB_B3:\r
6342 bic z80de,z80de,#1<<22\r
6343 fetch 8\r
6344;@RES 6,H\r
6345opcode_CB_B4:\r
6346 bic z80hl,z80hl,#1<<30\r
6347 fetch 8\r
6348;@RES 6,L\r
6349opcode_CB_B5:\r
6350 bic z80hl,z80hl,#1<<22\r
6351 fetch 8\r
6352;@RES 6,(HL)\r
6353opcode_CB_B6:\r
6354 opRESmemHL 6\r
6355;@RES 6,A\r
6356opcode_CB_B7:\r
6357 bic z80a,z80a,#1<<30\r
6358 fetch 8\r
6359\r
6360;@RES 7,B\r
6361opcode_CB_B8:\r
6362 bic z80bc,z80bc,#1<<31\r
6363 fetch 8\r
6364;@RES 7,C\r
6365opcode_CB_B9:\r
6366 bic z80bc,z80bc,#1<<23\r
6367 fetch 8\r
6368;@RES 7,D\r
6369opcode_CB_BA:\r
6370 bic z80de,z80de,#1<<31\r
6371 fetch 8\r
6372;@RES 7,E\r
6373opcode_CB_BB:\r
6374 bic z80de,z80de,#1<<23\r
6375 fetch 8\r
6376;@RES 7,H\r
6377opcode_CB_BC:\r
6378 bic z80hl,z80hl,#1<<31\r
6379 fetch 8\r
6380;@RES 7,L\r
6381opcode_CB_BD:\r
6382 bic z80hl,z80hl,#1<<23\r
6383 fetch 8\r
6384;@RES 7,(HL)\r
6385opcode_CB_BE:\r
6386 opRESmemHL 7\r
6387;@RES 7,A\r
6388opcode_CB_BF:\r
6389 bic z80a,z80a,#1<<31\r
6390 fetch 8\r
6391\r
6392;@SET 0,B\r
6393opcode_CB_C0:\r
6394 orr z80bc,z80bc,#1<<24\r
6395 fetch 8\r
6396;@SET 0,C\r
6397opcode_CB_C1:\r
6398 orr z80bc,z80bc,#1<<16\r
6399 fetch 8\r
6400;@SET 0,D\r
6401opcode_CB_C2:\r
6402 orr z80de,z80de,#1<<24\r
6403 fetch 8\r
6404;@SET 0,E\r
6405opcode_CB_C3:\r
6406 orr z80de,z80de,#1<<16\r
6407 fetch 8\r
6408;@SET 0,H\r
6409opcode_CB_C4:\r
6410 orr z80hl,z80hl,#1<<24\r
6411 fetch 8\r
6412;@SET 0,L\r
6413opcode_CB_C5:\r
6414 orr z80hl,z80hl,#1<<16\r
6415 fetch 8\r
6416;@SET 0,(HL)\r
6417opcode_CB_C6:\r
6418 opSETmemHL 0\r
6419;@SET 0,A\r
6420opcode_CB_C7:\r
6421 orr z80a,z80a,#1<<24\r
6422 fetch 8\r
6423\r
6424;@SET 1,B\r
6425opcode_CB_C8:\r
6426 orr z80bc,z80bc,#1<<25\r
6427 fetch 8\r
6428;@SET 1,C\r
6429opcode_CB_C9:\r
6430 orr z80bc,z80bc,#1<<17\r
6431 fetch 8\r
6432;@SET 1,D\r
6433opcode_CB_CA:\r
6434 orr z80de,z80de,#1<<25\r
6435 fetch 8\r
6436;@SET 1,E\r
6437opcode_CB_CB:\r
6438 orr z80de,z80de,#1<<17\r
6439 fetch 8\r
6440;@SET 1,H\r
6441opcode_CB_CC:\r
6442 orr z80hl,z80hl,#1<<25\r
6443 fetch 8\r
6444;@SET 1,L\r
6445opcode_CB_CD:\r
6446 orr z80hl,z80hl,#1<<17\r
6447 fetch 8\r
6448;@SET 1,(HL)\r
6449opcode_CB_CE:\r
6450 opSETmemHL 1\r
6451;@SET 1,A\r
6452opcode_CB_CF:\r
6453 orr z80a,z80a,#1<<25\r
6454 fetch 8\r
6455\r
6456;@SET 2,B\r
6457opcode_CB_D0:\r
6458 orr z80bc,z80bc,#1<<26\r
6459 fetch 8\r
6460;@SET 2,C\r
6461opcode_CB_D1:\r
6462 orr z80bc,z80bc,#1<<18\r
6463 fetch 8\r
6464;@SET 2,D\r
6465opcode_CB_D2:\r
6466 orr z80de,z80de,#1<<26\r
6467 fetch 8\r
6468;@SET 2,E\r
6469opcode_CB_D3:\r
6470 orr z80de,z80de,#1<<18\r
6471 fetch 8\r
6472;@SET 2,H\r
6473opcode_CB_D4:\r
6474 orr z80hl,z80hl,#1<<26\r
6475 fetch 8\r
6476;@SET 2,L\r
6477opcode_CB_D5:\r
6478 orr z80hl,z80hl,#1<<18\r
6479 fetch 8\r
6480;@SET 2,(HL)\r
6481opcode_CB_D6:\r
6482 opSETmemHL 2\r
6483;@SET 2,A\r
6484opcode_CB_D7:\r
6485 orr z80a,z80a,#1<<26\r
6486 fetch 8\r
6487\r
6488;@SET 3,B\r
6489opcode_CB_D8:\r
6490 orr z80bc,z80bc,#1<<27\r
6491 fetch 8\r
6492;@SET 3,C\r
6493opcode_CB_D9:\r
6494 orr z80bc,z80bc,#1<<19\r
6495 fetch 8\r
6496;@SET 3,D\r
6497opcode_CB_DA:\r
6498 orr z80de,z80de,#1<<27\r
6499 fetch 8\r
6500;@SET 3,E\r
6501opcode_CB_DB:\r
6502 orr z80de,z80de,#1<<19\r
6503 fetch 8\r
6504;@SET 3,H\r
6505opcode_CB_DC:\r
6506 orr z80hl,z80hl,#1<<27\r
6507 fetch 8\r
6508;@SET 3,L\r
6509opcode_CB_DD:\r
6510 orr z80hl,z80hl,#1<<19\r
6511 fetch 8\r
6512;@SET 3,(HL)\r
6513opcode_CB_DE:\r
6514 opSETmemHL 3\r
6515;@SET 3,A\r
6516opcode_CB_DF:\r
6517 orr z80a,z80a,#1<<27\r
6518 fetch 8\r
6519\r
6520;@SET 4,B\r
6521opcode_CB_E0:\r
6522 orr z80bc,z80bc,#1<<28\r
6523 fetch 8\r
6524;@SET 4,C\r
6525opcode_CB_E1:\r
6526 orr z80bc,z80bc,#1<<20\r
6527 fetch 8\r
6528;@SET 4,D\r
6529opcode_CB_E2:\r
6530 orr z80de,z80de,#1<<28\r
6531 fetch 8\r
6532;@SET 4,E\r
6533opcode_CB_E3:\r
6534 orr z80de,z80de,#1<<20\r
6535 fetch 8\r
6536;@SET 4,H\r
6537opcode_CB_E4:\r
6538 orr z80hl,z80hl,#1<<28\r
6539 fetch 8\r
6540;@SET 4,L\r
6541opcode_CB_E5:\r
6542 orr z80hl,z80hl,#1<<20\r
6543 fetch 8\r
6544;@SET 4,(HL)\r
6545opcode_CB_E6:\r
6546 opSETmemHL 4\r
6547;@SET 4,A\r
6548opcode_CB_E7:\r
6549 orr z80a,z80a,#1<<28\r
6550 fetch 8\r
6551\r
6552;@SET 5,B\r
6553opcode_CB_E8:\r
6554 orr z80bc,z80bc,#1<<29\r
6555 fetch 8\r
6556;@SET 5,C\r
6557opcode_CB_E9:\r
6558 orr z80bc,z80bc,#1<<21\r
6559 fetch 8\r
6560;@SET 5,D\r
6561opcode_CB_EA:\r
6562 orr z80de,z80de,#1<<29\r
6563 fetch 8\r
6564;@SET 5,E\r
6565opcode_CB_EB:\r
6566 orr z80de,z80de,#1<<21\r
6567 fetch 8\r
6568;@SET 5,H\r
6569opcode_CB_EC:\r
6570 orr z80hl,z80hl,#1<<29\r
6571 fetch 8\r
6572;@SET 5,L\r
6573opcode_CB_ED:\r
6574 orr z80hl,z80hl,#1<<21\r
6575 fetch 8\r
6576;@SET 5,(HL)\r
6577opcode_CB_EE:\r
6578 opSETmemHL 5\r
6579;@SET 5,A\r
6580opcode_CB_EF:\r
6581 orr z80a,z80a,#1<<29\r
6582 fetch 8\r
6583\r
6584;@SET 6,B\r
6585opcode_CB_F0:\r
6586 orr z80bc,z80bc,#1<<30\r
6587 fetch 8\r
6588;@SET 6,C\r
6589opcode_CB_F1:\r
6590 orr z80bc,z80bc,#1<<22\r
6591 fetch 8\r
6592;@SET 6,D\r
6593opcode_CB_F2:\r
6594 orr z80de,z80de,#1<<30\r
6595 fetch 8\r
6596;@SET 6,E\r
6597opcode_CB_F3:\r
6598 orr z80de,z80de,#1<<22\r
6599 fetch 8\r
6600;@SET 6,H\r
6601opcode_CB_F4:\r
6602 orr z80hl,z80hl,#1<<30\r
6603 fetch 8\r
6604;@SET 6,L\r
6605opcode_CB_F5:\r
6606 orr z80hl,z80hl,#1<<22\r
6607 fetch 8\r
6608;@SET 6,(HL)\r
6609opcode_CB_F6:\r
6610 opSETmemHL 6\r
6611;@SET 6,A\r
6612opcode_CB_F7:\r
6613 orr z80a,z80a,#1<<30\r
6614 fetch 8\r
6615\r
6616;@SET 7,B\r
6617opcode_CB_F8:\r
6618 orr z80bc,z80bc,#1<<31\r
6619 fetch 8\r
6620;@SET 7,C\r
6621opcode_CB_F9:\r
6622 orr z80bc,z80bc,#1<<23\r
6623 fetch 8\r
6624;@SET 7,D\r
6625opcode_CB_FA:\r
6626 orr z80de,z80de,#1<<31\r
6627 fetch 8\r
6628;@SET 7,E\r
6629opcode_CB_FB:\r
6630 orr z80de,z80de,#1<<23\r
6631 fetch 8\r
6632;@SET 7,H\r
6633opcode_CB_FC:\r
6634 orr z80hl,z80hl,#1<<31\r
6635 fetch 8\r
6636;@SET 7,L\r
6637opcode_CB_FD:\r
6638 orr z80hl,z80hl,#1<<23\r
6639 fetch 8\r
6640;@SET 7,(HL)\r
6641opcode_CB_FE:\r
6642 opSETmemHL 7\r
6643;@SET 7,A\r
6644opcode_CB_FF:\r
6645 orr z80a,z80a,#1<<31\r
6646 fetch 8\r
6647\r
6648\r
6649\r
6650;@##################################\r
6651;@##################################\r
6652;@### opcodes DD #########################\r
6653;@##################################\r
6654;@##################################\r
6655;@Because the DD opcodes are not a complete range from 00-FF I have\r
6656;@created this sub routine that will catch any undocumented ops\r
6657;@halt the emulator and mov the current instruction to r0\r
6658;@at a later stage I may change to display a text message on the screen\r
6659opcode_DD_NF:\r
6660 eatcycles 4\r
6661 ldr pc,[opcodes,r0, lsl #2]\r
6662;@ mov r2,#0x10*4\r
6663;@ cmp r2,z80xx\r
6664;@ bne opcode_FD_NF\r
6665;@ mov r0,#0xDD00\r
6666;@ orr r0,r0,r1\r
6667;@ b end_loop\r
6668;@opcode_FD_NF:\r
6669;@ mov r0,#0xFD00\r
6670;@ orr r0,r0,r1\r
6671;@ b end_loop\r
6672opcode_DD_NF2:\r
6673 mov r0,#0xDD0000\r
6674 orr r0,r0,#0xCB00\r
6675 orr r0,r0,r1\r
6676 b end_loop\r
6677\r
6678;@ADD IX,BC\r
6679opcode_DD_09:\r
6680 ldr r0,[z80xx]\r
6681 opADD16 r0 z80bc\r
6682 str r0,[z80xx]\r
6683 fetch 15\r
6684;@ADD IX,DE\r
6685opcode_DD_19:\r
6686 ldr r0,[z80xx]\r
6687 opADD16 r0 z80de\r
6688 str r0,[z80xx]\r
6689 fetch 15\r
6690;@LD IX,NN\r
6691opcode_DD_21:\r
6692 ldrb r0,[z80pc],#1\r
6693 ldrb r1,[z80pc],#1\r
6694 orr r0,r0,r1, lsl #8\r
6695 strh r0,[z80xx,#2]\r
6696 fetch 14\r
6697;@LD (NN),IX\r
6698opcode_DD_22:\r
6699 ldrb r0,[z80pc],#1\r
6700 ldrb r1,[z80pc],#1\r
6701 orr r1,r0,r1, lsl #8\r
6702 ldrh r0,[z80xx,#2]\r
6703 writemem16\r
6704 fetch 20\r
6705;@INC IX\r
6706opcode_DD_23:\r
6707 ldr r0,[z80xx]\r
6708 add r0,r0,#1<<16\r
6709 str r0,[z80xx]\r
6710 fetch 10\r
6711;@INC I (IX)\r
6712opcode_DD_24:\r
6713 ldr r0,[z80xx]\r
6714 opINC8H r0\r
6715 str r0,[z80xx]\r
6716 fetch 8\r
6717;@DEC I (IX)\r
6718opcode_DD_25:\r
6719 ldr r0,[z80xx]\r
6720 opDEC8H r0\r
6721 str r0,[z80xx]\r
6722 fetch 8\r
6723;@LD I,N (IX)\r
6724opcode_DD_26:\r
6725 ldrb r0,[z80pc],#1\r
6726 strb r0,[z80xx,#3]\r
6727 fetch 11\r
6728;@ADD IX,IX\r
6729opcode_DD_29:\r
6730 ldr r0,[z80xx]\r
6731 opADD16_2 r0\r
6732 str r0,[z80xx]\r
6733 fetch 15\r
6734;@LD IX,(NN)\r
6735opcode_DD_2A:\r
6736 ldrb r0,[z80pc],#1\r
6737 ldrb r1,[z80pc],#1\r
6738 orr r0,r0,r1, lsl #8\r
6739 stmfd sp!,{z80xx}\r
6740 readmem16\r
6741 ldmfd sp!,{z80xx}\r
6742 strh r0,[z80xx,#2]\r
6743 fetch 20\r
6744;@DEC IX\r
6745opcode_DD_2B:\r
6746 ldr r0,[z80xx]\r
6747 sub r0,r0,#1<<16\r
6748 str r0,[z80xx]\r
6749 fetch 10\r
6750;@INC X (IX)\r
6751opcode_DD_2C:\r
6752 ldr r0,[z80xx]\r
6753 opINC8L r0\r
6754 str r0,[z80xx]\r
6755 fetch 8\r
6756;@DEC X (IX)\r
6757opcode_DD_2D:\r
6758 ldr r0,[z80xx]\r
6759 opDEC8L r0\r
6760 str r0,[z80xx]\r
6761 fetch 8\r
6762;@LD X,N (IX)\r
6763opcode_DD_2E:\r
6764 ldrb r0,[z80pc],#1\r
6765 strb r0,[z80xx,#2]\r
6766 fetch 11\r
6767;@INC (IX+N)\r
6768opcode_DD_34:\r
6769 ldrsb r0,[z80pc],#1\r
6770 ldr r1,[z80xx]\r
6771 add r0,r0,r1, lsr #16\r
6772 stmfd sp!,{r0} ;@ save addr\r
6773 readmem8\r
6774 opINC8b\r
6775 ldmfd sp!,{r1} ;@ restore addr into r1\r
6776 writemem8\r
6777 fetch 23\r
6778;@DEC (IX+N)\r
6779opcode_DD_35:\r
6780 ldrsb r0,[z80pc],#1\r
6781 ldr r1,[z80xx]\r
6782 add r0,r0,r1, lsr #16\r
6783 stmfd sp!,{r0} ;@ save addr\r
6784 readmem8\r
6785 opDEC8b\r
6786 ldmfd sp!,{r1} ;@ restore addr into r1\r
6787 writemem8\r
6788 fetch 23\r
6789;@LD (IX+N),N\r
6790opcode_DD_36:\r
6791 ldrsb r2,[z80pc],#1\r
6792 ldrb r0,[z80pc],#1\r
6793 ldr r1,[z80xx]\r
6794 add r1,r2,r1, lsr #16\r
6795 writemem8\r
6796 fetch 19\r
6797;@ADD IX,SP\r
6798opcode_DD_39:\r
6799 ldr r0,[z80xx]\r
6800.if FAST_Z80SP\r
6801 ldr r2,[cpucontext,#z80sp_base]\r
6802 sub r2,z80sp,r2\r
6803 opADD16s r0 r2 16\r
6804.else\r
6805 opADD16s r0 z80sp 16\r
6806.endif\r
6807 str r0,[z80xx]\r
6808 fetch 15\r
6809;@LD B,I ( IX )\r
6810opcode_DD_44:\r
6811 ldrb r0,[z80xx,#3]\r
6812 and z80bc,z80bc,#0xFF<<16\r
6813 orr z80bc,z80bc,r0, lsl #24\r
6814 fetch 8\r
6815;@LD B,X ( IX )\r
6816opcode_DD_45:\r
6817 ldrb r0,[z80xx,#2]\r
6818 and z80bc,z80bc,#0xFF<<16\r
6819 orr z80bc,z80bc,r0, lsl #24\r
6820 fetch 8\r
6821;@LD B,(IX,N)\r
6822opcode_DD_46:\r
6823 ldrsb r0,[z80pc],#1\r
6824 ldr r1,[z80xx]\r
6825 add r0,r0,r1, lsr #16\r
6826 readmem8\r
6827 and z80bc,z80bc,#0xFF<<16\r
6828 orr z80bc,z80bc,r0, lsl #24\r
6829 fetch 19\r
6830;@LD C,I (IX)\r
6831opcode_DD_4C:\r
6832 ldrb r0,[z80xx,#3]\r
6833 and z80bc,z80bc,#0xFF<<24\r
6834 orr z80bc,z80bc,r0, lsl #16\r
6835 fetch 8\r
6836;@LD C,X (IX)\r
6837opcode_DD_4D:\r
6838 ldrb r0,[z80xx,#2]\r
6839 and z80bc,z80bc,#0xFF<<24\r
6840 orr z80bc,z80bc,r0, lsl #16\r
6841 fetch 8\r
6842;@LD C,(IX,N)\r
6843opcode_DD_4E:\r
6844 ldrsb r0,[z80pc],#1\r
6845 ldr r1,[z80xx]\r
6846 add r0,r0,r1, lsr #16\r
6847 readmem8\r
6848 and z80bc,z80bc,#0xFF<<24\r
6849 orr z80bc,z80bc,r0, lsl #16\r
6850 fetch 19\r
6851\r
6852;@LD D,I (IX)\r
6853opcode_DD_54:\r
6854 ldrb r0,[z80xx,#3]\r
6855 and z80de,z80de,#0xFF<<16\r
6856 orr z80de,z80de,r0, lsl #24\r
6857 fetch 8\r
6858;@LD D,X (IX)\r
6859opcode_DD_55:\r
6860 ldrb r0,[z80xx,#2]\r
6861 and z80de,z80de,#0xFF<<16\r
6862 orr z80de,z80de,r0, lsl #24\r
6863 fetch 8\r
6864;@LD D,(IX,N)\r
6865opcode_DD_56:\r
6866 ldrsb r0,[z80pc],#1\r
6867 ldr r1,[z80xx]\r
6868 add r0,r0,r1, lsr #16\r
6869 readmem8\r
6870 and z80de,z80de,#0xFF<<16\r
6871 orr z80de,z80de,r0, lsl #24\r
6872 fetch 19\r
6873;@LD E,I (IX)\r
6874opcode_DD_5C:\r
6875 ldrb r0,[z80xx,#3]\r
6876 and z80de,z80de,#0xFF<<24\r
6877 orr z80de,z80de,r0, lsl #16\r
6878 fetch 8\r
6879;@LD E,X (IX)\r
6880opcode_DD_5D:\r
6881 ldrb r0,[z80xx,#2]\r
6882 and z80de,z80de,#0xFF<<24\r
6883 orr z80de,z80de,r0, lsl #16\r
6884 fetch 8\r
6885;@LD E,(IX,N)\r
6886opcode_DD_5E:\r
6887 ldrsb r0,[z80pc],#1\r
6888 ldr r1,[z80xx]\r
6889 add r0,r0,r1, lsr #16\r
6890 readmem8\r
6891 and z80de,z80de,#0xFF<<24\r
6892 orr z80de,z80de,r0, lsl #16\r
6893 fetch 19\r
6894;@LD I,B (IX)\r
6895opcode_DD_60:\r
6896 mov r0,z80bc,lsr#24\r
6897 strb r0,[z80xx,#3]\r
6898 fetch 8\r
6899;@LD I,C (IX)\r
6900opcode_DD_61:\r
6901 mov r0,z80bc,lsr#16\r
6902 strb r0,[z80xx,#3]\r
6903 fetch 8\r
6904;@LD I,D (IX)\r
6905opcode_DD_62:\r
6906 mov r0,z80de,lsr#24\r
6907 strb r0,[z80xx,#3]\r
6908 fetch 8\r
6909;@LD I,E (IX)\r
6910opcode_DD_63:\r
6911 mov r0,z80de,lsr#16\r
6912 strb r0,[z80xx,#3]\r
6913 fetch 8\r
6914;@LD I,I (IX)\r
6915opcode_DD_64:\r
6916 fetch 8\r
6917;@LD I,X (IX)\r
6918opcode_DD_65:\r
6919 ldrb r0,[z80xx,#2]\r
6920 strb r0,[z80xx,#3]\r
6921 fetch 8\r
6922;@LD H,(IX,N)\r
6923opcode_DD_66:\r
6924 ldrsb r0,[z80pc],#1\r
6925 ldr r1,[z80xx]\r
6926 add r0,r0,r1, lsr #16\r
6927 readmem8\r
6928 and z80hl,z80hl,#0xFF<<16\r
6929 orr z80hl,z80hl,r0, lsl #24\r
6930 fetch 19\r
6931;@LD I,A (IX)\r
6932opcode_DD_67:\r
6933 mov r0,z80a,lsr#24\r
6934 strb r0,[z80xx,#3]\r
6935 fetch 8\r
6936;@LD X,B (IX)\r
6937opcode_DD_68:\r
6938 mov r0,z80bc,lsr#24\r
6939 strb r0,[z80xx,#2]\r
6940 fetch 8\r
6941;@LD X,C (IX)\r
6942opcode_DD_69:\r
6943 mov r0,z80bc,lsr#16\r
6944 strb r0,[z80xx,#2]\r
6945 fetch 8\r
6946;@LD X,D (IX)\r
6947opcode_DD_6A:\r
6948 mov r0,z80de,lsr#24\r
6949 strb r0,[z80xx,#2]\r
6950 fetch 8\r
6951;@LD X,E (IX)\r
6952opcode_DD_6B:\r
6953 mov r0,z80de,lsr#16\r
6954 strb r0,[z80xx,#2]\r
6955 fetch 8\r
6956;@LD X,I (IX)\r
6957opcode_DD_6C:\r
6958 ldrb r0,[z80xx,#3]\r
6959 strb r0,[z80xx,#2]\r
6960 fetch 8\r
6961;@LD X,X (IX)\r
6962opcode_DD_6D:\r
6963 fetch 8\r
6964;@LD L,(IX,N)\r
6965opcode_DD_6E:\r
6966 ldrsb r0,[z80pc],#1\r
6967 ldr r1,[z80xx]\r
6968 add r0,r0,r1, lsr #16\r
6969 readmem8\r
6970 and z80hl,z80hl,#0xFF<<24\r
6971 orr z80hl,z80hl,r0, lsl #16\r
6972 fetch 19\r
6973;@LD X,A (IX)\r
6974opcode_DD_6F:\r
6975 mov r0,z80a,lsr#24\r
6976 strb r0,[z80xx,#2]\r
6977 fetch 8\r
6978\r
6979;@LD (IX,N),B\r
6980opcode_DD_70:\r
6981 ldrsb r0,[z80pc],#1\r
6982 ldr r1,[z80xx]\r
6983 add r1,r0,r1, lsr #16\r
6984 mov r0,z80bc, lsr #24\r
6985 writemem8\r
6986 fetch 19\r
6987;@LD (IX,N),C\r
6988opcode_DD_71:\r
6989 ldrsb r0,[z80pc],#1\r
6990 ldr r1,[z80xx]\r
6991 add r1,r0,r1, lsr #16\r
6992 mov r0,z80bc, lsr #16\r
6993 and r0,r0,#0xFF\r
6994 writemem8\r
6995 fetch 19\r
6996;@LD (IX,N),D\r
6997opcode_DD_72:\r
6998 ldrsb r0,[z80pc],#1\r
6999 ldr r1,[z80xx]\r
7000 add r1,r0,r1, lsr #16\r
7001 mov r0,z80de, lsr #24\r
7002 writemem8\r
7003 fetch 19\r
7004;@LD (IX,N),E\r
7005opcode_DD_73:\r
7006 ldrsb r0,[z80pc],#1\r
7007 ldr r1,[z80xx]\r
7008 add r1,r0,r1, lsr #16\r
7009 mov r0,z80de, lsr #16\r
7010 and r0,r0,#0xFF\r
7011 writemem8\r
7012 fetch 19\r
7013;@LD (IX,N),H\r
7014opcode_DD_74:\r
7015 ldrsb r0,[z80pc],#1\r
7016 ldr r1,[z80xx]\r
7017 add r1,r0,r1, lsr #16\r
7018 mov r0,z80hl, lsr #24\r
7019 writemem8\r
7020 fetch 19\r
7021;@LD (IX,N),L\r
7022opcode_DD_75:\r
7023 ldrsb r0,[z80pc],#1\r
7024 ldr r1,[z80xx]\r
7025 add r1,r0,r1, lsr #16\r
7026 mov r0,z80hl, lsr #16\r
7027 and r0,r0,#0xFF\r
7028 writemem8\r
7029 fetch 19\r
7030;@LD (IX,N),A\r
7031opcode_DD_77:\r
7032 ldrsb r0,[z80pc],#1\r
7033 ldr r1,[z80xx]\r
7034 add r1,r0,r1, lsr #16\r
7035 mov r0,z80a, lsr #24\r
7036 writemem8\r
7037 fetch 19\r
7038\r
7039;@LD A,I from (IX)\r
7040opcode_DD_7C:\r
7041 ldrb r0,[z80xx,#3]\r
7042 mov z80a,r0, lsl #24\r
7043 fetch 8\r
7044;@LD A,X from (IX)\r
7045opcode_DD_7D:\r
7046 ldrb r0,[z80xx,#2]\r
7047 mov z80a,r0, lsl #24\r
7048 fetch 8\r
7049;@LD A,(IX,N)\r
7050opcode_DD_7E:\r
7051 ldrsb r0,[z80pc],#1\r
7052 ldr r1,[z80xx]\r
7053 add r0,r0,r1, lsr #16\r
7054 readmem8\r
7055 mov z80a,r0, lsl #24\r
7056 fetch 19\r
7057\r
7058;@ADD A,I ( IX)\r
7059opcode_DD_84:\r
7060 ldrb r0,[z80xx,#3]\r
7061 opADDb\r
7062 fetch 8\r
7063;@ADD A,X ( IX)\r
7064opcode_DD_85:\r
7065 ldrb r0,[z80xx,#2]\r
7066 opADDb\r
7067 fetch 8\r
7068;@ADD A,(IX+N)\r
7069opcode_DD_86:\r
7070 ldrsb r0,[z80pc],#1\r
7071 ldr r1,[z80xx]\r
7072 add r0,r0,r1, lsr #16\r
7073 readmem8\r
7074 opADDb\r
7075 fetch 19\r
7076\r
7077;@ADC A,I (IX)\r
7078opcode_DD_8C:\r
7079 ldrb r0,[z80xx,#3]\r
7080 opADCb\r
7081 fetch 8\r
7082;@ADC A,X (IX)\r
7083opcode_DD_8D:\r
7084 ldrb r0,[z80xx,#2]\r
7085 opADCb\r
7086 fetch 8\r
7087;@ADC A,(IX+N)\r
7088opcode_DD_8E:\r
7089 ldrsb r0,[z80pc],#1\r
7090 ldr r1,[z80xx]\r
7091 add r0,r0,r1, lsr #16\r
7092 readmem8\r
7093 opADCb\r
7094 fetch 19\r
7095\r
7096;@SUB A,I (IX)\r
7097opcode_DD_94:\r
7098 ldrb r0,[z80xx,#3]\r
7099 opSUBb\r
7100 fetch 8\r
7101;@SUB A,X (IX)\r
7102opcode_DD_95:\r
7103 ldrb r0,[z80xx,#2]\r
7104 opSUBb\r
7105 fetch 8\r
7106;@SUB A,(IX+N)\r
7107opcode_DD_96:\r
7108 ldrsb r0,[z80pc],#1\r
7109 ldr r1,[z80xx]\r
7110 add r0,r0,r1, lsr #16\r
7111 readmem8\r
7112 opSUBb\r
7113 fetch 19\r
7114\r
7115;@SBC A,I (IX)\r
7116opcode_DD_9C:\r
7117 ldrb r0,[z80xx,#3]\r
7118 opSBCb\r
7119 fetch 8\r
7120;@SBC A,X (IX)\r
7121opcode_DD_9D:\r
7122 ldrb r0,[z80xx,#2]\r
7123 opSBCb\r
7124 fetch 8\r
7125;@SBC A,(IX+N)\r
7126opcode_DD_9E:\r
7127 ldrsb r0,[z80pc],#1\r
7128 ldr r1,[z80xx]\r
7129 add r0,r0,r1, lsr #16\r
7130 readmem8\r
7131 opSBCb\r
7132 fetch 19\r
7133\r
7134;@AND I (IX)\r
7135opcode_DD_A4:\r
7136 ldrb r0,[z80xx,#3]\r
7137 opANDb\r
7138 fetch 8\r
7139;@AND X (IX)\r
7140opcode_DD_A5:\r
7141 ldrb r0,[z80xx,#2]\r
7142 opANDb\r
7143 fetch 8\r
7144;@AND (IX+N)\r
7145opcode_DD_A6:\r
7146 ldrsb r0,[z80pc],#1\r
7147 ldr r1,[z80xx]\r
7148 add r0,r0,r1, lsr #16\r
7149 readmem8\r
7150 opANDb\r
7151 fetch 19\r
7152\r
7153;@XOR I (IX)\r
7154opcode_DD_AC:\r
7155 ldrb r0,[z80xx,#3]\r
7156 opXORb\r
7157 fetch 8\r
7158;@XOR X (IX)\r
7159opcode_DD_AD:\r
7160 ldrb r0,[z80xx,#2]\r
7161 opXORb\r
7162 fetch 8\r
7163;@XOR (IX+N)\r
7164opcode_DD_AE:\r
7165 ldrsb r0,[z80pc],#1\r
7166 ldr r1,[z80xx]\r
7167 add r0,r0,r1, lsr #16\r
7168 readmem8\r
7169 opXORb\r
7170 fetch 19\r
7171\r
7172;@OR I (IX)\r
7173opcode_DD_B4:\r
7174 ldrb r0,[z80xx,#3]\r
7175 opORb\r
7176 fetch 8\r
7177;@OR X (IX)\r
7178opcode_DD_B5:\r
7179 ldrb r0,[z80xx,#2]\r
7180 opORb\r
7181 fetch 8\r
7182;@OR (IX+N)\r
7183opcode_DD_B6:\r
7184 ldrsb r0,[z80pc],#1\r
7185 ldr r1,[z80xx]\r
7186 add r0,r0,r1, lsr #16\r
7187 readmem8\r
7188 opORb\r
7189 fetch 19\r
7190\r
7191;@CP I (IX)\r
7192opcode_DD_BC:\r
7193 ldrb r0,[z80xx,#3]\r
7194 opCPb\r
7195 fetch 8\r
7196;@CP X (IX)\r
7197opcode_DD_BD:\r
7198 ldrb r0,[z80xx,#2]\r
7199 opCPb\r
7200 fetch 8\r
7201;@CP (IX+N)\r
7202opcode_DD_BE:\r
7203 ldrsb r0,[z80pc],#1\r
7204 ldr r1,[z80xx]\r
7205 add r0,r0,r1, lsr #16\r
7206 readmem8\r
7207 opCPb\r
7208 fetch 19\r
7209\r
7210\r
7211opcodes_DD_CB_LOCAL: .word opcodes_DD_CB\r
7212opcode_DD_CB:\r
7213;@Looks up the opcode on the opcodes_DD_CB table and then \r
7214;@moves the PC to the location of the subroutine\r
7215 ldrsb r0,[z80pc],#1\r
7216 ldr r1,[z80xx]\r
7217 add r0,r0,r1, lsr #16\r
7218\r
7219 ldrb r1,[z80pc],#1\r
7220 ldr pc,[pc,r1, lsl #2]\r
7221 .word 0x00\r
7222opcodes_DD_CB:\r
7223 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_06,opcode_DD_NF2\r
7224 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_0E,opcode_DD_NF2\r
7225 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_16,opcode_DD_NF2\r
7226 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_1E,opcode_DD_NF2\r
7227 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_26,opcode_DD_NF2\r
7228 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_2E,opcode_DD_NF2\r
7229 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_36,opcode_DD_NF2\r
7230 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_3E,opcode_DD_NF2\r
7231 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_46,opcode_DD_NF2\r
7232 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_4E,opcode_DD_NF2\r
7233 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_56,opcode_DD_NF2\r
7234 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_5E,opcode_DD_NF2\r
7235 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_66,opcode_DD_NF2\r
7236 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_6E,opcode_DD_NF2\r
7237 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_76,opcode_DD_NF2\r
7238 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_7E,opcode_DD_NF2\r
7239 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_86,opcode_DD_NF2\r
7240 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_8E,opcode_DD_NF2\r
7241 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_96,opcode_DD_NF2\r
7242 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_9E,opcode_DD_NF2\r
7243 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_A6,opcode_DD_NF2\r
7244 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_AE,opcode_DD_NF2\r
7245 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_B6,opcode_DD_NF2\r
7246 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_BE,opcode_DD_NF2\r
7247 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_C6,opcode_DD_NF2\r
7248 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_CE,opcode_DD_NF2\r
7249 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_D6,opcode_DD_NF2\r
7250 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_DE,opcode_DD_NF2\r
7251 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_E6,opcode_DD_NF2\r
7252 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_EE,opcode_DD_NF2\r
7253 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_F6,opcode_DD_NF2\r
7254 .word opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_NF2,opcode_DD_CB_FE,opcode_DD_NF2\r
7255\r
7256;@RLC (IX+N) \r
7257opcode_DD_CB_06:\r
7258 stmfd sp!,{r0} ;@ save addr\r
7259 readmem8\r
7260 opRLCb\r
7261 ldmfd sp!,{r1} ;@ restore addr into r1\r
7262 writemem8\r
7263 fetch 23\r
7264;@RRC (IX+N) \r
7265opcode_DD_CB_0E:\r
7266 stmfd sp!,{r0} ;@ save addr\r
7267 readmem8\r
7268 opRRCb\r
7269 ldmfd sp!,{r1} ;@ restore addr into r1\r
7270 writemem8\r
7271 fetch 23\r
7272;@RL (IX+N) \r
7273opcode_DD_CB_16:\r
7274 stmfd sp!,{r0} ;@ save addr\r
7275 readmem8\r
7276 opRLb\r
7277 ldmfd sp!,{r1} ;@ restore addr into r1\r
7278 writemem8\r
7279 fetch 23\r
7280;@RR (IX+N) \r
7281opcode_DD_CB_1E:\r
7282 stmfd sp!,{r0} ;@ save addr \r
7283 readmem8\r
7284 opRRb\r
7285 ldmfd sp!,{r1} ;@ restore addr into r1\r
7286 writemem8\r
7287 fetch 23\r
7288\r
7289;@SLA (IX+N) \r
7290opcode_DD_CB_26:\r
7291 stmfd sp!,{r0} ;@ save addr \r
7292 readmem8\r
7293 opSLAb\r
7294 ldmfd sp!,{r1} ;@ restore addr into r1\r
7295 writemem8\r
7296 fetch 23\r
7297;@SRA (IX+N) \r
7298opcode_DD_CB_2E:\r
7299 stmfd sp!,{r0} ;@ save addr \r
7300 readmem8\r
7301 opSRAb\r
7302 ldmfd sp!,{r1} ;@ restore addr into r1\r
7303 writemem8\r
7304 fetch 23\r
7305;@SLL (IX+N) \r
7306opcode_DD_CB_36:\r
7307 stmfd sp!,{r0} ;@ save addr \r
7308 readmem8\r
7309 opSLLb\r
7310 ldmfd sp!,{r1} ;@ restore addr into r1\r
7311 writemem8\r
7312 fetch 23\r
7313;@SRL (IX+N)\r
7314opcode_DD_CB_3E:\r
7315 stmfd sp!,{r0} ;@ save addr \r
7316 readmem8\r
7317 opSRLb\r
7318 ldmfd sp!,{r1} ;@ restore addr into r1\r
7319 writemem8\r
7320 fetch 23\r
7321\r
7322;@BIT 0,(IX+N) \r
7323opcode_DD_CB_46:\r
7324 readmem8\r
7325 opBITb 0\r
7326 fetch 20\r
7327;@BIT 1,(IX+N) \r
7328opcode_DD_CB_4E:\r
7329 readmem8\r
7330 opBITb 1\r
7331 fetch 20\r
7332;@BIT 2,(IX+N) \r
7333opcode_DD_CB_56:\r
7334 readmem8\r
7335 opBITb 2\r
7336 fetch 20\r
7337;@BIT 3,(IX+N) \r
7338opcode_DD_CB_5E:\r
7339 readmem8\r
7340 opBITb 3\r
7341 fetch 20\r
7342;@BIT 4,(IX+N) \r
7343opcode_DD_CB_66:\r
7344 readmem8\r
7345 opBITb 4\r
7346 fetch 20\r
7347;@BIT 5,(IX+N) \r
7348opcode_DD_CB_6E:\r
7349 readmem8\r
7350 opBITb 5\r
7351 fetch 20\r
7352;@BIT 6,(IX+N) \r
7353opcode_DD_CB_76:\r
7354 readmem8\r
7355 opBITb 6\r
7356 fetch 20\r
7357;@BIT 7,(IX+N) \r
7358opcode_DD_CB_7E:\r
7359 readmem8\r
7360 opBIT7b\r
7361 fetch 20\r
7362;@RES 0,(IX+N) \r
7363opcode_DD_CB_86:\r
7364 opRESmem 0\r
7365;@RES 1,(IX+N) \r
7366opcode_DD_CB_8E:\r
7367 opRESmem 1\r
7368;@RES 2,(IX+N) \r
7369opcode_DD_CB_96:\r
7370 opRESmem 2\r
7371;@RES 3,(IX+N) \r
7372opcode_DD_CB_9E:\r
7373 opRESmem 3\r
7374;@RES 4,(IX+N) \r
7375opcode_DD_CB_A6:\r
7376 opRESmem 4\r
7377;@RES 5,(IX+N) \r
7378opcode_DD_CB_AE:\r
7379 opRESmem 5\r
7380;@RES 6,(IX+N) \r
7381opcode_DD_CB_B6:\r
7382 opRESmem 6\r
7383;@RES 7,(IX+N) \r
7384opcode_DD_CB_BE:\r
7385 opRESmem 7\r
7386\r
7387;@SET 0,(IX+N) \r
7388opcode_DD_CB_C6:\r
7389 opSETmem 0\r
7390;@SET 1,(IX+N) \r
7391opcode_DD_CB_CE:\r
7392 opSETmem 1\r
7393;@SET 2,(IX+N) \r
7394opcode_DD_CB_D6:\r
7395 opSETmem 2\r
7396;@SET 3,(IX+N) \r
7397opcode_DD_CB_DE:\r
7398 opSETmem 3\r
7399;@SET 4,(IX+N) \r
7400opcode_DD_CB_E6:\r
7401 opSETmem 4\r
7402;@SET 5,(IX+N) \r
7403opcode_DD_CB_EE:\r
7404 opSETmem 5\r
7405;@SET 6,(IX+N) \r
7406opcode_DD_CB_F6:\r
7407 opSETmem 6\r
7408;@SET 7,(IX+N) \r
7409opcode_DD_CB_FE:\r
7410 opSETmem 7\r
7411\r
7412\r
7413\r
7414;@POP IX\r
7415opcode_DD_E1:\r
7416.if FAST_Z80SP\r
7417 opPOP\r
7418.else\r
7419 mov r0,z80sp\r
7420 stmfd sp!,{z80xx}\r
7421 readmem16\r
7422 ldmfd sp!,{z80xx}\r
7423 add z80sp,z80sp,#2\r
7424.endif\r
7425 strh r0,[z80xx,#2]\r
7426 fetch 14\r
7427;@EX (SP),IX\r
7428opcode_DD_E3:\r
7429.if FAST_Z80SP\r
7430 ldrb r0,[z80sp]\r
7431 ldrb r1,[z80sp,#1]\r
7432 orr r2,r0,r1, lsl #8\r
7433 ldrh r1,[z80xx,#2]\r
7434 mov r0,r1, lsr #8\r
7435 strb r0,[z80sp,#1]\r
7436 strb r1,[z80sp]\r
7437 strh r2,[z80xx,#2]\r
7438.else\r
7439 mov r0,z80sp\r
7440 stmfd sp!,{z80xx}\r
7441 readmem16\r
7442 ldmfd sp!,{z80xx}\r
7443 mov r2,r0\r
7444 ldrh r0,[z80xx,#2]\r
7445 strh r2,[z80xx,#2]\r
7446 mov r1,z80sp\r
7447 writemem16\r
7448.endif\r
7449 fetch 23\r
7450;@PUSH IX\r
7451opcode_DD_E5:\r
7452 ldr r2,[z80xx]\r
7453 opPUSHreg r2\r
7454 fetch 15\r
7455;@JP (IX)\r
7456opcode_DD_E9:\r
7457 ldrh r0,[z80xx,#2]\r
7458 rebasepc\r
7459 fetch 8\r
7460;@LD SP,IX\r
7461opcode_DD_F9:\r
7462.if FAST_Z80SP\r
7463 ldrh r0,[z80xx,#2]\r
7464 rebasesp\r
7465 mov z80sp,r0\r
7466.else\r
7467 ldrh z80sp,[z80xx,#2]\r
7468.endif\r
7469 fetch 10\r
7470\r
7471;@##################################\r
7472;@##################################\r
7473;@### opcodes ED #########################\r
7474;@##################################\r
7475;@##################################\r
7476\r
7477opcode_ED_NF:\r
7478 fetch 8\r
7479;@ ldrb r0,[z80pc],#1\r
7480;@ ldr pc,[opcodes,r0, lsl #2]\r
7481;@ mov r0,#0xED00\r
7482;@ orr r0,r0,r1\r
7483;@ b end_loop\r
7484\r
7485;@IN B,(C)\r
7486opcode_ED_40:\r
7487 opIN_C\r
7488 and z80bc,z80bc,#0xFF<<16\r
7489 orr z80bc,z80bc,r0, lsl #24\r
7490 sub r1,opcodes,#0x100\r
7491 ldrb r0,[r1,r0]\r
7492 and z80f,z80f,#1<<CFlag\r
7493 orr z80f,z80f,r0\r
7494 fetch 12\r
7495;@OUT (C),B\r
7496opcode_ED_41:\r
7497 mov r1,z80bc, lsr #24\r
7498 opOUT_C\r
7499 fetch 12\r
7500\r
7501;@SBC HL,BC\r
7502opcode_ED_42:\r
7503 opSBC16 z80bc\r
7504\r
7505;@LD (NN),BC\r
7506opcode_ED_43:\r
7507 ldrb r0,[z80pc],#1\r
7508 ldrb r1,[z80pc],#1\r
7509 orr r1,r0,r1, lsl #8\r
7510 mov r0,z80bc, lsr #16\r
7511 writemem16\r
7512 fetch 20\r
7513;@NEG\r
7514opcode_ED_44:\r
7515 rsbs z80a,z80a,#0\r
7516 mrs z80f,cpsr\r
7517 mov z80f,z80f,lsr#28 ;@S,Z,V&C\r
7518 eor z80f,z80f,#(1<<CFlag)|(1<<NFlag) ;@invert C and set n.\r
7519 tst z80a,#0x0F000000 ;@H, correct\r
7520 orrne z80f,z80f,#1<<HFlag\r
7521 fetch 8\r
7522 \r
7523;@RETN, moved to ED_4D\r
7524;@opcode_ED_45:\r
7525\r
7526;@IM 0\r
7527opcode_ED_46:\r
7528 strb z80a,[cpucontext,#z80im]\r
7529 fetch 8\r
7530;@LD I,A\r
7531opcode_ED_47:\r
7532 str z80a,[cpucontext,#z80i]\r
7533 fetch 9\r
7534;@IN C,(C)\r
7535opcode_ED_48:\r
7536 opIN_C\r
7537 and z80bc,z80bc,#0xFF<<24\r
7538 orr z80bc,z80bc,r0, lsl #16\r
7539 sub r1,opcodes,#0x100\r
7540 ldrb r0,[r1,r0]\r
7541 and z80f,z80f,#1<<CFlag\r
7542 orr z80f,z80f,r0\r
7543 fetch 12\r
7544;@OUT (C),C\r
7545opcode_ED_49:\r
7546 mov r0,z80bc, lsr #16\r
7547 and r1,r0,#0xFF\r
7548 opOUT\r
7549 fetch 12\r
7550;@ADC HL,BC\r
7551opcode_ED_4A:\r
7552 opADC16 z80bc\r
7553;@LD BC,(NN)\r
7554opcode_ED_4B:\r
7555 ldrb r0,[z80pc],#1\r
7556 ldrb r1,[z80pc],#1\r
7557 orr r0,r0,r1, lsl #8\r
7558 readmem16\r
7559 mov z80bc,r0, lsl #16\r
7560 fetch 20\r
7561\r
7562;@RETN\r
7563opcode_ED_45:\r
7564;@RETI\r
7565opcode_ED_4D:\r
7566 ldrb r0,[cpucontext,#z80if]\r
7567 tst r0,#Z80_IF2\r
7568 orrne r0,r0,#Z80_IF1\r
7569 biceq r0,r0,#Z80_IF1\r
7570 strb r0,[cpucontext,#z80if]\r
7571 opPOP\r
7572 rebasepc\r
7573 fetch 14\r
7574\r
7575;@LD R,A\r
7576opcode_ED_4F:\r
7577 mov r0,z80a,lsr#24\r
7578 strb r0,[cpucontext,#z80r]\r
7579 fetch 9\r
7580\r
7581;@IN D,(C)\r
7582opcode_ED_50:\r
7583 opIN_C\r
7584 and z80de,z80de,#0xFF<<16\r
7585 orr z80de,z80de,r0, lsl #24\r
7586 sub r1,opcodes,#0x100\r
7587 ldrb r0,[r1,r0]\r
7588 and z80f,z80f,#1<<CFlag\r
7589 orr z80f,z80f,r0\r
7590 fetch 12\r
7591;@OUT (C),D\r
7592opcode_ED_51:\r
7593 mov r1,z80de, lsr #24\r
7594 opOUT_C\r
7595 fetch 12\r
7596;@SBC HL,DE\r
7597opcode_ED_52:\r
7598 opSBC16 z80de\r
7599;@LD (NN),DE\r
7600opcode_ED_53:\r
7601 ldrb r0,[z80pc],#1\r
7602 ldrb r1,[z80pc],#1\r
7603 orr r1,r0,r1, lsl #8\r
7604 mov r0,z80de, lsr #16\r
7605 writemem16\r
7606 fetch 20\r
7607;@IM 1\r
7608opcode_ED_56:\r
7609 mov r0,#1\r
7610 strb r0,[cpucontext,#z80im]\r
7611 fetch 8\r
7612;@LD A,I\r
7613opcode_ED_57:\r
7614 ldr z80a,[cpucontext,#z80i]\r
7615 tst z80a,#0xFF000000\r
7616 and z80f,z80f,#(1<<CFlag)\r
7617 orreq z80f,z80f,#(1<<ZFlag)\r
7618 orrmi z80f,z80f,#(1<<SFlag)\r
7619 ldrb r0,[cpucontext,#z80if]\r
7620 tst r0,#Z80_IF2\r
7621 orrne z80f,z80f,#(1<<VFlag)\r
7622 fetch 9\r
7623;@IN E,(C)\r
7624opcode_ED_58:\r
7625 opIN_C\r
7626 and z80de,z80de,#0xFF<<24\r
7627 orr z80de,z80de,r0, lsl #16\r
7628 sub r1,opcodes,#0x100\r
7629 ldrb r0,[r1,r0]\r
7630 and z80f,z80f,#1<<CFlag\r
7631 orr z80f,z80f,r0\r
7632 fetch 12\r
7633;@OUT (C),E\r
7634opcode_ED_59:\r
7635 mov r1,z80de, lsr #16\r
7636 and r1,r1,#0xFF\r
7637 opOUT_C\r
7638 fetch 12\r
7639;@ADC HL,DE\r
7640opcode_ED_5A:\r
7641 opADC16 z80de\r
7642;@LD DE,(NN)\r
7643opcode_ED_5B:\r
7644 ldrb r0,[z80pc],#1\r
7645 ldrb r1,[z80pc],#1\r
7646 orr r0,r0,r1, lsl #8\r
7647 readmem16\r
7648 mov z80de,r0, lsl #16\r
7649 fetch 20\r
7650;@IM 2\r
7651opcode_ED_5E:\r
7652 mov r0,#2\r
7653 strb r0,[cpucontext,#z80im]\r
7654 fetch 8\r
7655;@LD A,R\r
7656opcode_ED_5F:\r
7657 ldrb r0,[cpucontext,#z80r]\r
7658 and r0,r0,#0x80\r
7659 rsb r1,z80_icount,#0\r
7660 and r1,r1,#0x7F\r
7661 orr r0,r0,r1\r
7662 movs z80a,r0, lsl #24\r
7663 and z80f,z80f,#1<<CFlag\r
7664 orrmi z80f,z80f,#(1<<SFlag)\r
7665 orreq z80f,z80f,#(1<<ZFlag)\r
7666 ldrb r0,[cpucontext,#z80if]\r
7667 tst r0,#Z80_IF2\r
7668 orrne z80f,z80f,#(1<<VFlag)\r
7669 fetch 9\r
7670;@IN H,(C)\r
7671opcode_ED_60:\r
7672 opIN_C\r
7673 and z80hl,z80hl,#0xFF<<16\r
7674 orr z80hl,z80hl,r0, lsl #24\r
7675 sub r1,opcodes,#0x100\r
7676 ldrb r0,[r1,r0]\r
7677 and z80f,z80f,#1<<CFlag\r
7678 orr z80f,z80f,r0\r
7679 fetch 12\r
7680;@OUT (C),H\r
7681opcode_ED_61:\r
7682 mov r1,z80hl, lsr #24\r
7683 opOUT_C\r
7684 fetch 12\r
7685;@SBC HL,HL\r
7686opcode_ED_62:\r
7687 opSBC16HL\r
7688;@RRD\r
7689opcode_ED_67:\r
7690 readmem8HL\r
7691 mov r1,r0,ror#4\r
7692 orr r0,r1,z80a,lsr#20\r
7693 bic z80a,z80a,#0x0F000000\r
7694 orr z80a,z80a,r1,lsr#4\r
7695 writemem8HL\r
7696 sub r1,opcodes,#0x100\r
7697 ldrb r0,[r1,z80a, lsr #24]\r
7698 and z80f,z80f,#1<<CFlag\r
7699 orr z80f,z80f,r0\r
7700 fetch 18\r
7701;@IN L,(C)\r
7702opcode_ED_68:\r
7703 opIN_C\r
7704 and z80hl,z80hl,#0xFF<<24\r
7705 orr z80hl,z80hl,r0, lsl #16\r
7706 and z80f,z80f,#1<<CFlag\r
7707 sub r1,opcodes,#0x100\r
7708 ldrb r0,[r1,r0]\r
7709 orr z80f,z80f,r0\r
7710 fetch 12\r
7711;@OUT (C),L\r
7712opcode_ED_69:\r
7713 mov r1,z80hl, lsr #16\r
7714 and r1,r1,#0xFF\r
7715 opOUT_C\r
7716 fetch 12\r
7717;@ADC HL,HL\r
7718opcode_ED_6A:\r
7719 opADC16HL\r
7720;@RLD\r
7721opcode_ED_6F:\r
7722 readmem8HL\r
7723 orr r0,r0,z80a,lsl#4\r
7724 mov r0,r0,ror#28\r
7725 and z80a,z80a,#0xF0000000\r
7726 orr z80a,z80a,r0,lsl#16\r
7727 and z80a,z80a,#0xFF000000\r
7728 writemem8HL\r
7729 sub r1,opcodes,#0x100\r
7730 ldrb r0,[r1,z80a, lsr #24]\r
7731 and z80f,z80f,#1<<CFlag\r
7732 orr z80f,z80f,r0\r
7733 fetch 18\r
7734;@IN F,(C)\r
7735opcode_ED_70:\r
7736 opIN_C\r
7737 and z80f,z80f,#1<<CFlag\r
7738 sub r1,opcodes,#0x100\r
7739 ldrb r0,[r1,r0]\r
7740 orr z80f,z80f,r0\r
7741 fetch 12\r
7742;@OUT (C),0\r
7743opcode_ED_71:\r
7744 mov r1,#0\r
7745 opOUT_C\r
7746 fetch 12\r
7747\r
7748;@SBC HL,SP\r
7749opcode_ED_72:\r
7750.if FAST_Z80SP\r
7751 ldr r0,[cpucontext,#z80sp_base]\r
7752 sub r0,z80sp,r0\r
7753 mov r0, r0, lsl #16\r
7754.else\r
7755 mov r0,z80sp,lsl#16\r
7756.endif\r
7757 opSBC16 r0\r
7758;@LD (NN),SP\r
7759opcode_ED_73:\r
7760 ldrb r0,[z80pc],#1\r
7761 ldrb r1,[z80pc],#1\r
7762 orr r1,r0,r1, lsl #8\r
7763.if FAST_Z80SP\r
7764 ldr r0,[cpucontext,#z80sp_base]\r
7765 sub r0,z80sp,r0\r
7766.else\r
7767 mov r0,z80sp\r
7768.endif\r
7769 writemem16\r
7770 fetch 16\r
7771;@IN A,(C)\r
7772opcode_ED_78:\r
7773 opIN_C\r
7774 mov z80a,r0, lsl #24\r
7775 and z80f,z80f,#1<<CFlag\r
7776 sub r1,opcodes,#0x100\r
7777 ldrb r0,[r1,r0]\r
7778 orr z80f,z80f,r0\r
7779 fetch 12\r
7780;@OUT (C),A\r
7781opcode_ED_79:\r
7782 mov r1,z80a, lsr #24\r
7783 opOUT_C\r
7784 fetch 12\r
7785;@ADC HL,SP\r
7786opcode_ED_7A:\r
7787.if FAST_Z80SP\r
7788 ldr r0,[cpucontext,#z80sp_base]\r
7789 sub r0,z80sp,r0\r
7790 mov r0, r0, lsl #16\r
7791.else\r
7792 mov r0,z80sp,lsl#16\r
7793.endif\r
7794 opADC16 r0\r
7795;@LD SP,(NN)\r
7796opcode_ED_7B:\r
7797 ldrb r0,[z80pc],#1\r
7798 ldrb r1,[z80pc],#1\r
7799 orr r0,r0,r1, lsl #8\r
7800 readmem16\r
7801.if FAST_Z80SP\r
7802 rebasesp\r
7803.endif\r
7804 mov z80sp,r0\r
7805 fetch 20\r
7806;@LDI\r
7807opcode_ED_A0:\r
7808 copymem8HL_DE\r
7809 add z80hl,z80hl,#1<<16\r
7810 add z80de,z80de,#1<<16\r
7811 subs z80bc,z80bc,#1<<16\r
7812 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7813 orrne z80f,z80f,#1<<VFlag\r
7814 fetch 16\r
7815;@CPI\r
7816opcode_ED_A1:\r
7817 readmem8HL\r
7818 add z80hl,z80hl,#0x00010000\r
7819 mov r1,z80a,lsl#4\r
7820 cmp z80a,r0,lsl#24\r
7821 and z80f,z80f,#1<<CFlag\r
7822 orr z80f,z80f,#1<<NFlag\r
7823 orrmi z80f,z80f,#1<<SFlag\r
7824 orreq z80f,z80f,#1<<ZFlag\r
7825 cmp r1,r0,lsl#28\r
7826 orrcc z80f,z80f,#1<<HFlag\r
7827 subs z80bc,z80bc,#0x00010000\r
7828 orrne z80f,z80f,#1<<VFlag\r
7829 fetch 16\r
7830;@INI\r
7831opcode_ED_A2:\r
7832 opIN_C\r
7833 and z80f,r0,#0x80\r
7834 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7835;@ mov r1,z80bc,lsl#8\r
7836;@ add r1,r1,#0x01000000\r
7837;@ adds r1,r1,r0,lsl#24\r
7838;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7839 writemem8HL\r
7840 add z80hl,z80hl,#1<<16\r
7841 sub z80bc,z80bc,#1<<24\r
7842 tst z80bc,#0xFF<<24\r
7843 orrmi z80f,z80f,#1<<SFlag\r
7844 orreq z80f,z80f,#1<<ZFlag\r
7845 fetch 16\r
7846\r
7847;@OUTI\r
7848opcode_ED_A3:\r
7849 readmem8HL\r
7850 add z80hl,z80hl,#1<<16\r
7851 and z80f,r0,#0x80\r
7852 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7853 mov r1,z80hl,lsl#8\r
7854 adds r1,r1,r0,lsl#24\r
7855 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL)+L > 0xFF\r
7856 sub z80bc,z80bc,#1<<24\r
7857 tst z80bc,#0xFF<<24\r
7858 orrmi z80f,z80f,#1<<SFlag\r
7859 orreq z80f,z80f,#1<<ZFlag\r
7860 mov r1,r0\r
7861 opOUT_C\r
7862 fetch 16\r
7863\r
7864;@LDD\r
7865opcode_ED_A8:\r
7866 copymem8HL_DE\r
7867 sub z80hl,z80hl,#1<<16\r
7868 sub z80de,z80de,#1<<16\r
7869 subs z80bc,z80bc,#1<<16\r
7870 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7871 orrne z80f,z80f,#1<<VFlag\r
7872 fetch 16\r
7873\r
7874;@CPD\r
7875opcode_ED_A9:\r
7876 readmem8HL\r
7877 sub z80hl,z80hl,#1<<16\r
7878 mov r1,z80a,lsl#4\r
7879 cmp z80a,r0,lsl#24\r
7880 and z80f,z80f,#1<<CFlag\r
7881 orr z80f,z80f,#1<<NFlag\r
7882 orrmi z80f,z80f,#1<<SFlag\r
7883 orreq z80f,z80f,#1<<ZFlag\r
7884 cmp r1,r0,lsl#28\r
7885 orrcc z80f,z80f,#1<<HFlag\r
7886 subs z80bc,z80bc,#0x00010000\r
7887 orrne z80f,z80f,#1<<VFlag\r
7888 fetch 16\r
7889\r
7890;@IND\r
7891opcode_ED_AA:\r
7892 opIN_C\r
7893 and z80f,r0,#0x80\r
7894 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7895;@ mov r1,z80bc,lsl#8\r
7896;@ sub r1,r1,#0x01000000\r
7897;@ adds r1,r1,r0,lsl#24\r
7898;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
7899 writemem8HL\r
7900 sub z80hl,z80hl,#1<<16\r
7901 sub z80bc,z80bc,#1<<24\r
7902 tst z80bc,#0xFF<<24\r
7903 orrmi z80f,z80f,#1<<SFlag\r
7904 orreq z80f,z80f,#1<<ZFlag\r
7905 fetch 16\r
7906\r
7907;@OUTD\r
7908opcode_ED_AB:\r
7909 readmem8HL\r
7910 sub z80hl,z80hl,#1<<16\r
7911 and z80f,r0,#0x80\r
7912 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7913 mov r1,z80hl,lsl#8\r
7914 adds r1,r1,r0,lsl#24\r
7915 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7916 sub z80bc,z80bc,#1<<24\r
7917 tst z80bc,#0xFF<<24\r
7918 orrmi z80f,z80f,#1<<SFlag\r
7919 orreq z80f,z80f,#1<<ZFlag\r
7920 mov r1,r0\r
7921 opOUT_C\r
7922 fetch 16\r
7923;@LDIR\r
7924opcode_ED_B0:\r
7925 copymem8HL_DE\r
7926 add z80hl,z80hl,#1<<16\r
7927 add z80de,z80de,#1<<16\r
7928 subs z80bc,z80bc,#1<<16\r
7929 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7930 orrne z80f,z80f,#1<<VFlag\r
7931 subne z80pc,z80pc,#2\r
7932 subne z80_icount,z80_icount,#5\r
7933 fetch 16\r
7934\r
7935;@CPIR\r
7936opcode_ED_B1:\r
7937 readmem8HL\r
7938 add z80hl,z80hl,#1<<16 \r
7939 mov r1,z80a,lsl#4\r
7940 cmp z80a,r0,lsl#24\r
7941 and z80f,z80f,#1<<CFlag\r
7942 orr z80f,z80f,#1<<NFlag\r
7943 orrmi z80f,z80f,#1<<SFlag\r
7944 orreq z80f,z80f,#1<<ZFlag\r
7945 cmp r1,r0,lsl#28\r
7946 orrcc z80f,z80f,#1<<HFlag\r
7947 subs z80bc,z80bc,#1<<16\r
7948 bne opcode_ED_B1_decpc\r
7949 fetch 16\r
7950opcode_ED_B1_decpc:\r
7951 orr z80f,z80f,#1<<VFlag\r
7952 tst z80f,#1<<ZFlag\r
7953 subeq z80pc,z80pc,#2\r
7954 subeq z80_icount,z80_icount,#5\r
7955 fetch 16\r
7956;@INIR\r
7957opcode_ED_B2:\r
7958 opIN_C\r
7959 and z80f,r0,#0x80\r
7960 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7961;@ mov r1,z80bc,lsl#8\r
7962;@ add r1,r1,#0x01000000\r
7963;@ adds r1,r1,r0,lsl#24\r
7964;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C+1) & 0xFF) > 0xFF\r
7965 writemem8HL\r
7966 add z80hl,z80hl,#1<<16\r
7967 sub z80bc,z80bc,#1<<24\r
7968 tst z80bc,#0xFF<<24\r
7969 orrmi z80f,z80f,#1<<SFlag\r
7970 orreq z80f,z80f,#1<<ZFlag\r
7971 subne z80pc,z80pc,#2\r
7972 subne z80_icount,z80_icount,#5\r
7973 fetch 16\r
7974;@OTIR\r
7975opcode_ED_B3:\r
7976 readmem8HL\r
7977 add z80hl,z80hl,#1<<16\r
7978 and z80f,r0,#0x80\r
7979 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
7980 mov r1,z80hl,lsl#8\r
7981 adds r1,r1,r0,lsl#24\r
7982 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
7983 sub z80bc,z80bc,#1<<24\r
7984 tst z80bc,#0xFF<<24\r
7985 orrmi z80f,z80f,#1<<SFlag\r
7986 orreq z80f,z80f,#1<<ZFlag\r
7987 subne z80pc,z80pc,#2\r
7988 subne z80_icount,z80_icount,#5\r
7989 mov r1,r0\r
7990 opOUT_C\r
7991 fetch 16\r
7992;@LDDR\r
7993opcode_ED_B8:\r
7994 copymem8HL_DE\r
7995 sub z80hl,z80hl,#1<<16\r
7996 sub z80de,z80de,#1<<16\r
7997 subs z80bc,z80bc,#1<<16\r
7998 bic z80f,z80f,#(1<<VFlag)|(1<<NFlag)|(1<<HFlag)\r
7999 orrne z80f,z80f,#1<<VFlag\r
8000 subne z80pc,z80pc,#2\r
8001 subne z80_icount,z80_icount,#5\r
8002 fetch 16\r
8003\r
8004;@CPDR\r
8005opcode_ED_B9:\r
8006 readmem8HL\r
8007 sub z80hl,z80hl,#1<<16\r
8008 mov r1,z80a,lsl#4\r
8009 cmp z80a,r0,lsl#24\r
8010 and z80f,z80f,#1<<CFlag\r
8011 orr z80f,z80f,#1<<NFlag\r
8012 orrmi z80f,z80f,#1<<SFlag\r
8013 orreq z80f,z80f,#1<<ZFlag\r
8014 cmp r1,r0,lsl#28\r
8015 orrcc z80f,z80f,#1<<HFlag\r
8016 subs z80bc,z80bc,#1<<16\r
8017 bne opcode_ED_B9_decpc\r
8018 fetch 16\r
8019opcode_ED_B9_decpc:\r
8020 orr z80f,z80f,#1<<VFlag\r
8021 tst z80f,#1<<ZFlag\r
8022 subeq z80pc,z80pc,#2\r
8023 subeq z80_icount,z80_icount,#5\r
8024 fetch 16\r
8025;@INDR\r
8026opcode_ED_BA:\r
8027 opIN_C\r
8028 and z80f,r0,#0x80\r
8029 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8030;@ mov r1,z80bc,lsl#8\r
8031;@ sub r1,r1,#0x01000000\r
8032;@ adds r1,r1,r0,lsl#24\r
8033;@ orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if (HL) + ((C-1) & 0xFF) > 0xFF\r
8034 writemem8HL\r
8035 sub z80hl,z80hl,#1<<16\r
8036 sub z80bc,z80bc,#1<<24\r
8037 tst z80bc,#0xFF<<24\r
8038 orrmi z80f,z80f,#1<<SFlag\r
8039 orreq z80f,z80f,#1<<ZFlag\r
8040 subne z80pc,z80pc,#2\r
8041 subne z80_icount,z80_icount,#5\r
8042 fetch 16\r
8043;@OTDR\r
8044opcode_ED_BB:\r
8045 readmem8HL\r
8046 sub z80hl,z80hl,#1<<16\r
8047 and z80f,r0,#0x80\r
8048 mov z80f,z80f,lsr#2 ;@NFlag set by bit 7\r
8049 mov r1,z80hl,lsl#8\r
8050 adds r1,r1,r0,lsl#24\r
8051 orrcs z80f,z80f,#(1<<CFlag)|(1<<HFlag) ;@ CF & HF set if r0+HL > 0xFF\r
8052 sub z80bc,z80bc,#1<<24\r
8053 tst z80bc,#0xFF<<24\r
8054 orrmi z80f,z80f,#1<<SFlag\r
8055 orreq z80f,z80f,#1<<ZFlag\r
8056 subne z80pc,z80pc,#2\r
8057 subne z80_icount,z80_icount,#5\r
8058 mov r1,r0\r
8059 opOUT_C\r
8060 fetch 16\r
8061;@##################################\r
8062;@##################################\r
8063;@### opcodes FD #########################\r
8064;@##################################\r
8065;@##################################\r
8066;@Since DD and FD opcodes are all the same apart from the address\r
8067;@register they use. When a FD intruction the program runs the code\r
8068;@from the DD location but the address of the IY reg is passed instead\r
8069;@of IX\r
8070\r
8071end_loop:\r
8072 b end_loop\r
8073\r
8074\r
8075\r
fast MegaDrive/MegaCD/32X emulator