3863edbd |
1 | /* |
8b4f38f4 |
2 | * note: |
3 | * temp registers must be eax-edx due to use of SETcc. |
f0d7b1fa |
4 | * note about silly things like emith_eor_r_r_r: |
8b4f38f4 |
5 | * these are here because the compiler was designed |
6 | * for ARM as it's primary target. |
3863edbd |
7 | */ |
679af8a3 |
8 | #include <stdarg.h> |
9 | |
f4bb5d6b |
10 | enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI }; |
11 | |
f4bb5d6b |
12 | #define CONTEXT_REG xBP |
679af8a3 |
13 | |
18b94127 |
14 | #define ICOND_JO 0x00 |
15 | #define ICOND_JNO 0x01 |
16 | #define ICOND_JB 0x02 |
17 | #define ICOND_JAE 0x03 |
18 | #define ICOND_JE 0x04 |
19 | #define ICOND_JNE 0x05 |
20 | #define ICOND_JBE 0x06 |
21 | #define ICOND_JA 0x07 |
22 | #define ICOND_JS 0x08 |
23 | #define ICOND_JNS 0x09 |
24 | #define ICOND_JL 0x0c |
25 | #define ICOND_JGE 0x0d |
26 | #define ICOND_JLE 0x0e |
27 | #define ICOND_JG 0x0f |
28 | |
29 | #define IOP_JMP 0xeb |
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30 | |
31 | // unified conditions (we just use rel8 jump instructions for x86) |
18b94127 |
32 | #define DCOND_EQ ICOND_JE |
33 | #define DCOND_NE ICOND_JNE |
34 | #define DCOND_MI ICOND_JS // MInus |
35 | #define DCOND_PL ICOND_JNS // PLus or zero |
36 | #define DCOND_HI ICOND_JA // higher (unsigned) |
37 | #define DCOND_HS ICOND_JAE // higher || same (unsigned) |
38 | #define DCOND_LO ICOND_JB // lower (unsigned) |
39 | #define DCOND_LS ICOND_JBE // lower || same (unsigned) |
40 | #define DCOND_GE ICOND_JGE // greater || equal (signed) |
41 | #define DCOND_GT ICOND_JG // greater (signed) |
42 | #define DCOND_LE ICOND_JLE // less || equal (signed) |
43 | #define DCOND_LT ICOND_JL // less (signed) |
44 | #define DCOND_VS ICOND_JO // oVerflow Set |
45 | #define DCOND_VC ICOND_JNO // oVerflow Clear |
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46 | |
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47 | #define EMIT_PTR(ptr, val, type) \ |
48 | *(type *)(ptr) = val |
49 | |
50 | #define EMIT(val, type) { \ |
51 | EMIT_PTR(tcache_ptr, val, type); \ |
f4bb5d6b |
52 | tcache_ptr += sizeof(type); \ |
679af8a3 |
53 | } |
54 | |
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55 | #define EMIT_OP(op) { \ |
56 | COUNT_OP; \ |
57 | EMIT(op, u8); \ |
58 | } |
59 | |
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60 | #define EMIT_MODRM(mod,r,rm) \ |
61 | EMIT(((mod)<<6) | ((r)<<3) | (rm), u8) |
62 | |
f0d7b1fa |
63 | #define EMIT_SIB(scale,index,base) \ |
64 | EMIT(((scale)<<6) | ((index)<<3) | (base), u8) |
65 | |
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66 | #define EMIT_OP_MODRM(op,mod,r,rm) { \ |
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67 | EMIT_OP(op); \ |
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68 | EMIT_MODRM(mod, r, rm); \ |
69 | } |
70 | |
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71 | #define JMP8_POS(ptr) \ |
72 | ptr = tcache_ptr; \ |
73 | tcache_ptr += 2 |
74 | |
75 | #define JMP8_EMIT(op, ptr) \ |
18b94127 |
76 | EMIT_PTR(ptr, 0x70|(op), u8); \ |
77 | EMIT_PTR(ptr + 1, (tcache_ptr - (ptr+2)), u8) |
78 | |
79 | #define JMP8_EMIT_NC(ptr) \ |
80 | EMIT_PTR(ptr, IOP_JMP, u8); \ |
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81 | EMIT_PTR(ptr + 1, (tcache_ptr - (ptr+2)), u8) |
82 | |
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83 | // _r_r |
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84 | #define emith_move_r_r(dst, src) \ |
85 | EMIT_OP_MODRM(0x8b, 3, dst, src) |
86 | |
80599a42 |
87 | #define emith_add_r_r(d, s) \ |
88 | EMIT_OP_MODRM(0x01, 3, s, d) |
89 | |
90 | #define emith_sub_r_r(d, s) \ |
91 | EMIT_OP_MODRM(0x29, 3, s, d) |
92 | |
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93 | #define emith_adc_r_r(d, s) \ |
94 | EMIT_OP_MODRM(0x11, 3, s, d) |
95 | |
96 | #define emith_sbc_r_r(d, s) \ |
97 | EMIT_OP_MODRM(0x19, 3, s, d) /* SBB */ |
98 | |
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99 | #define emith_or_r_r(d, s) \ |
100 | EMIT_OP_MODRM(0x09, 3, s, d) |
101 | |
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102 | #define emith_and_r_r(d, s) \ |
103 | EMIT_OP_MODRM(0x21, 3, s, d) |
104 | |
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105 | #define emith_eor_r_r(d, s) \ |
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106 | EMIT_OP_MODRM(0x31, 3, s, d) /* XOR */ |
107 | |
108 | #define emith_tst_r_r(d, s) \ |
109 | EMIT_OP_MODRM(0x85, 3, s, d) /* TEST */ |
110 | |
111 | #define emith_cmp_r_r(d, s) \ |
112 | EMIT_OP_MODRM(0x39, 3, s, d) |
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113 | |
114 | // fake teq - test equivalence - get_flags(d ^ s) |
115 | #define emith_teq_r_r(d, s) { \ |
116 | emith_push(d); \ |
117 | emith_eor_r_r(d, s); \ |
118 | emith_pop(d); \ |
119 | } |
120 | |
52d759c3 |
121 | #define emith_mvn_r_r(d, s) { \ |
122 | if (d != s) \ |
123 | emith_move_r_r(d, s); \ |
124 | EMIT_OP_MODRM(0xf7, 3, 2, d); /* NOT d */ \ |
125 | } |
126 | |
127 | #define emith_negc_r_r(d, s) { \ |
128 | int tmp_ = rcache_get_tmp(); \ |
129 | emith_move_r_imm(tmp_, 0); \ |
130 | emith_sbc_r_r(tmp_, s); \ |
131 | emith_move_r_r(d, tmp_); \ |
132 | rcache_free_tmp(tmp_); \ |
133 | } |
134 | |
135 | #define emith_neg_r_r(d, s) { \ |
136 | if (d != s) \ |
137 | emith_move_r_r(d, s); \ |
138 | EMIT_OP_MODRM(0xf7, 3, 3, d); /* NEG d */ \ |
139 | } |
140 | |
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141 | // _r_r_r |
142 | #define emith_eor_r_r_r(d, s1, s2) { \ |
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143 | if (d == s1) { \ |
144 | emith_eor_r_r(d, s2); \ |
145 | } else if (d == s2) { \ |
146 | emith_eor_r_r(d, s1); \ |
147 | } else { \ |
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148 | emith_move_r_r(d, s1); \ |
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149 | emith_eor_r_r(d, s2); \ |
150 | } \ |
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151 | } |
152 | |
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153 | // _r_r_shift |
154 | #define emith_or_r_r_lsl(d, s, lslimm) { \ |
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155 | int tmp_ = rcache_get_tmp(); \ |
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156 | emith_lsl(tmp_, s, lslimm); \ |
157 | emith_or_r_r(d, tmp_); \ |
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158 | rcache_free_tmp(tmp_); \ |
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159 | } |
160 | |
f0d7b1fa |
161 | // d != s |
162 | #define emith_eor_r_r_lsr(d, s, lsrimm) { \ |
163 | emith_push(s); \ |
164 | emith_lsr(s, s, lsrimm); \ |
165 | emith_eor_r_r(d, s); \ |
166 | emith_pop(s); \ |
167 | } |
168 | |
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169 | // _r_imm |
679af8a3 |
170 | #define emith_move_r_imm(r, imm) { \ |
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171 | EMIT_OP(0xb8 + (r)); \ |
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172 | EMIT(imm, u32); \ |
173 | } |
174 | |
52d759c3 |
175 | #define emith_move_r_imm_s8(r, imm) \ |
176 | emith_move_r_imm(r, (u32)(signed int)(signed char)(imm)) |
177 | |
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178 | #define emith_arith_r_imm(op, r, imm) do { \ |
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179 | EMIT_OP_MODRM(0x81, 3, op, r); \ |
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180 | EMIT(imm, u32); \ |
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181 | } while (0) |
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182 | |
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183 | // 2 - adc, 3 - sbb |
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184 | #define emith_add_r_imm(r, imm) \ |
185 | emith_arith_r_imm(0, r, imm) |
186 | |
187 | #define emith_or_r_imm(r, imm) \ |
188 | emith_arith_r_imm(1, r, imm) |
189 | |
190 | #define emith_and_r_imm(r, imm) \ |
191 | emith_arith_r_imm(4, r, imm) |
192 | |
193 | #define emith_sub_r_imm(r, imm) \ |
194 | emith_arith_r_imm(5, r, imm) |
195 | |
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196 | #define emith_eor_r_imm(r, imm) \ |
197 | emith_arith_r_imm(6, r, imm) |
198 | |
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199 | #define emith_cmp_r_imm(r, imm) \ |
200 | emith_arith_r_imm(7, r, imm) |
201 | |
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202 | #define emith_tst_r_imm(r, imm) do { \ |
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203 | EMIT_OP_MODRM(0xf7, 3, 0, r); \ |
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204 | EMIT(imm, u32); \ |
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205 | } while (0) |
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206 | |
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207 | // fake |
208 | #define emith_bic_r_imm(r, imm) \ |
209 | emith_arith_r_imm(4, r, ~(imm)) |
210 | |
211 | // fake conditionals (using SJMP instead) |
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212 | #define emith_move_r_imm_c(cond, r, imm) { \ |
213 | (void)(cond); \ |
214 | emith_move_r_imm(r, imm); \ |
215 | } |
216 | |
80599a42 |
217 | #define emith_add_r_imm_c(cond, r, imm) { \ |
218 | (void)(cond); \ |
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219 | emith_add_r_imm(r, imm); \ |
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220 | } |
221 | |
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222 | #define emith_sub_r_imm_c(cond, r, imm) { \ |
223 | (void)(cond); \ |
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224 | emith_sub_r_imm(r, imm); \ |
225 | } |
226 | |
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227 | #define emith_or_r_imm_c(cond, r, imm) \ |
228 | emith_or_r_imm(r, imm) |
229 | #define emith_eor_r_imm_c(cond, r, imm) \ |
230 | emith_eor_r_imm(r, imm) |
231 | #define emith_bic_r_imm_c(cond, r, imm) \ |
232 | emith_bic_r_imm(r, imm) |
233 | #define emith_ror_c(cond, d, s, cnt) \ |
234 | emith_ror(d, s, cnt) |
235 | |
236 | #define emith_read_r_r_offs_c(cond, r, rs, offs) \ |
237 | emith_read_r_r_offs(r, rs, offs) |
238 | #define emith_write_r_r_offs_c(cond, r, rs, offs) \ |
239 | emith_write_r_r_offs(r, rs, offs) |
240 | #define emith_read8_r_r_offs_c(cond, r, rs, offs) \ |
241 | emith_read8_r_r_offs(r, rs, offs) |
242 | #define emith_write8_r_r_offs_c(cond, r, rs, offs) \ |
243 | emith_write8_r_r_offs(r, rs, offs) |
244 | #define emith_read16_r_r_offs_c(cond, r, rs, offs) \ |
245 | emith_read16_r_r_offs(r, rs, offs) |
246 | #define emith_write16_r_r_offs_c(cond, r, rs, offs) \ |
247 | emith_write16_r_r_offs(r, rs, offs) |
248 | #define emith_jump_reg_c(cond, r) \ |
249 | emith_jump_reg(r) |
250 | #define emith_jump_ctx_c(cond, offs) \ |
251 | emith_jump_ctx(offs) |
252 | #define emith_ret_c(cond) \ |
253 | emith_ret() |
e05b81fc |
254 | |
52d759c3 |
255 | // _r_r_imm |
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256 | #define emith_add_r_r_imm(d, s, imm) { \ |
257 | if (d != s) \ |
258 | emith_move_r_r(d, s); \ |
259 | emith_add_r_imm(d, imm); \ |
260 | } |
261 | |
52d759c3 |
262 | #define emith_and_r_r_imm(d, s, imm) { \ |
263 | if (d != s) \ |
264 | emith_move_r_r(d, s); \ |
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265 | emith_and_r_imm(d, imm); \ |
52d759c3 |
266 | } |
267 | |
80599a42 |
268 | // shift |
269 | #define emith_shift(op, d, s, cnt) { \ |
270 | if (d != s) \ |
271 | emith_move_r_r(d, s); \ |
272 | EMIT_OP_MODRM(0xc1, 3, op, d); \ |
273 | EMIT(cnt, u8); \ |
274 | } |
275 | |
80599a42 |
276 | #define emith_lsl(d, s, cnt) \ |
277 | emith_shift(4, d, s, cnt) |
278 | |
3863edbd |
279 | #define emith_lsr(d, s, cnt) \ |
280 | emith_shift(5, d, s, cnt) |
281 | |
282 | #define emith_asr(d, s, cnt) \ |
283 | emith_shift(7, d, s, cnt) |
284 | |
ed8cf79b |
285 | #define emith_rol(d, s, cnt) \ |
286 | emith_shift(0, d, s, cnt) |
287 | |
288 | #define emith_ror(d, s, cnt) \ |
289 | emith_shift(1, d, s, cnt) |
290 | |
291 | #define emith_rolc(r) \ |
292 | EMIT_OP_MODRM(0xd1, 3, 2, r) |
293 | |
294 | #define emith_rorc(r) \ |
295 | EMIT_OP_MODRM(0xd1, 3, 3, r) |
296 | |
80599a42 |
297 | // misc |
298 | #define emith_push(r) \ |
299 | EMIT_OP(0x50 + (r)) |
300 | |
e05b81fc |
301 | #define emith_push_imm(imm) { \ |
302 | EMIT_OP(0x68); \ |
303 | EMIT(imm, u32); \ |
304 | } |
305 | |
80599a42 |
306 | #define emith_pop(r) \ |
307 | EMIT_OP(0x58 + (r)) |
308 | |
309 | #define emith_neg_r(r) \ |
310 | EMIT_OP_MODRM(0xf7, 3, 3, r) |
311 | |
312 | #define emith_clear_msb(d, s, count) { \ |
313 | u32 t = (u32)-1; \ |
314 | t >>= count; \ |
315 | if (d != s) \ |
316 | emith_move_r_r(d, s); \ |
317 | emith_and_r_imm(d, t); \ |
318 | } |
319 | |
f0d7b1fa |
320 | #define emith_clear_msb_c(cond, d, s, count) { \ |
321 | (void)(cond); \ |
322 | emith_clear_msb(d, s, count); \ |
323 | } |
324 | |
80599a42 |
325 | #define emith_sext(d, s, bits) { \ |
326 | emith_lsl(d, s, 32 - (bits)); \ |
327 | emith_asr(d, d, 32 - (bits)); \ |
328 | } |
329 | |
f0d7b1fa |
330 | #define emith_setc(r) { \ |
331 | EMIT_OP(0x0f); \ |
8b4f38f4 |
332 | EMIT_OP_MODRM(0x92, 3, 0, r); /* SETC r */ \ |
f0d7b1fa |
333 | } |
334 | |
80599a42 |
335 | // XXX: stupid mess |
3863edbd |
336 | #define emith_mul_(op, dlo, dhi, s1, s2) { \ |
80599a42 |
337 | int rmr; \ |
3863edbd |
338 | if (dlo != xAX && dhi != xAX) \ |
80599a42 |
339 | emith_push(xAX); \ |
3863edbd |
340 | if (dlo != xDX && dhi != xDX) \ |
341 | emith_push(xDX); \ |
80599a42 |
342 | if ((s1) == xAX) \ |
343 | rmr = s2; \ |
344 | else if ((s2) == xAX) \ |
345 | rmr = s1; \ |
346 | else { \ |
347 | emith_move_r_r(xAX, s1); \ |
348 | rmr = s2; \ |
349 | } \ |
3863edbd |
350 | EMIT_OP_MODRM(0xf7, 3, op, rmr); /* xMUL rmr */ \ |
351 | /* XXX: using push/pop for the case of edx->eax; eax->edx */ \ |
352 | if (dhi != xDX && dhi != -1) \ |
353 | emith_push(xDX); \ |
354 | if (dlo != xAX) \ |
355 | emith_move_r_r(dlo, xAX); \ |
356 | if (dhi != xDX && dhi != -1) \ |
357 | emith_pop(dhi); \ |
358 | if (dlo != xDX && dhi != xDX) \ |
359 | emith_pop(xDX); \ |
360 | if (dlo != xAX && dhi != xAX) \ |
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361 | emith_pop(xAX); \ |
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362 | } |
363 | |
3863edbd |
364 | #define emith_mul_u64(dlo, dhi, s1, s2) \ |
365 | emith_mul_(4, dlo, dhi, s1, s2) /* MUL */ |
366 | |
367 | #define emith_mul_s64(dlo, dhi, s1, s2) \ |
368 | emith_mul_(5, dlo, dhi, s1, s2) /* IMUL */ |
369 | |
370 | #define emith_mul(d, s1, s2) \ |
371 | emith_mul_(4, d, -1, s1, s2) |
372 | |
f0d7b1fa |
373 | // (dlo,dhi) += signed(s1) * signed(s2) |
374 | #define emith_mula_s64(dlo, dhi, s1, s2) { \ |
375 | emith_push(dhi); \ |
376 | emith_push(dlo); \ |
377 | emith_mul_(5, dlo, dhi, s1, s2); \ |
378 | EMIT_OP_MODRM(0x03, 0, dlo, 4); \ |
379 | EMIT_SIB(0, 4, 4); /* add dlo, [esp] */ \ |
380 | EMIT_OP_MODRM(0x13, 1, dhi, 4); \ |
381 | EMIT_SIB(0, 4, 4); \ |
382 | EMIT(4, u8); /* adc dhi, [esp+4] */ \ |
383 | emith_add_r_imm(xSP, 4*2); \ |
384 | } |
385 | |
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386 | // "flag" instructions are the same |
387 | #define emith_subf_r_imm emith_sub_r_imm |
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388 | #define emith_addf_r_r emith_add_r_r |
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389 | #define emith_subf_r_r emith_sub_r_r |
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390 | #define emith_adcf_r_r emith_adc_r_r |
391 | #define emith_sbcf_r_r emith_sbc_r_r |
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392 | #define emith_eorf_r_r emith_eor_r_r |
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393 | #define emith_negcf_r_r emith_negc_r_r |
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394 | |
ed8cf79b |
395 | #define emith_lslf emith_lsl |
396 | #define emith_lsrf emith_lsr |
397 | #define emith_asrf emith_asr |
398 | #define emith_rolf emith_rol |
399 | #define emith_rorf emith_ror |
400 | #define emith_rolcf emith_rolc |
401 | #define emith_rorcf emith_rorc |
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402 | |
b081408f |
403 | #define emith_deref_op(op, r, rs, offs) do { \ |
e05b81fc |
404 | /* mov r <-> [ebp+#offs] */ \ |
405 | if ((offs) >= 0x80) { \ |
b081408f |
406 | EMIT_OP_MODRM(op, 2, r, rs); \ |
e05b81fc |
407 | EMIT(offs, u32); \ |
408 | } else { \ |
b081408f |
409 | EMIT_OP_MODRM(op, 1, r, rs); \ |
e05b81fc |
410 | EMIT(offs, u8); \ |
411 | } \ |
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412 | } while (0) |
679af8a3 |
413 | |
b081408f |
414 | #define emith_read_r_r_offs(r, rs, offs) \ |
415 | emith_deref_op(0x8b, r, rs, offs) |
416 | |
417 | #define emith_write_r_r_offs(r, rs, offs) \ |
418 | emith_deref_op(0x89, r, rs, offs) |
419 | |
420 | #define emith_read8_r_r_offs(r, rs, offs) \ |
421 | emith_deref_op(0x8a, r, rs, offs) |
422 | |
423 | #define emith_write8_r_r_offs(r, rs, offs) \ |
424 | emith_deref_op(0x88, r, rs, offs) |
425 | |
426 | #define emith_read16_r_r_offs(r, rs, offs) { \ |
427 | EMIT(0x66, u8); /* operand override */ \ |
428 | emith_read_r_r_offs(r, rs, offs); \ |
429 | } |
430 | |
431 | #define emith_write16_r_r_offs(r, rs, offs) { \ |
432 | EMIT(0x66, u8); \ |
433 | emith_write16_r_r_offs(r, rs, offs) \ |
434 | } |
435 | |
e05b81fc |
436 | #define emith_ctx_read(r, offs) \ |
b081408f |
437 | emith_read_r_r_offs(r, CONTEXT_REG, offs) |
e05b81fc |
438 | |
439 | #define emith_ctx_write(r, offs) \ |
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440 | emith_write_r_r_offs(r, CONTEXT_REG, offs) |
e05b81fc |
441 | |
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442 | #define emith_ctx_read_multiple(r, offs, cnt, tmpr) do { \ |
443 | int r_ = r, offs_ = offs, cnt_ = cnt; \ |
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444 | for (; cnt_ > 0; r_++, offs_ += 4, cnt_--) \ |
8796b7ee |
445 | emith_ctx_read(r_, offs_); \ |
446 | } while (0) |
447 | |
8796b7ee |
448 | #define emith_ctx_write_multiple(r, offs, cnt, tmpr) do { \ |
449 | int r_ = r, offs_ = offs, cnt_ = cnt; \ |
8b4f38f4 |
450 | for (; cnt_ > 0; r_++, offs_ += 4, cnt_--) \ |
8796b7ee |
451 | emith_ctx_write(r_, offs_); \ |
452 | } while (0) |
679af8a3 |
453 | |
e05b81fc |
454 | // assumes EBX is free |
455 | #define emith_ret_to_ctx(offs) { \ |
456 | emith_pop(xBX); \ |
457 | emith_ctx_write(xBX, offs); \ |
458 | } |
459 | |
679af8a3 |
460 | #define emith_jump(ptr) { \ |
18b94127 |
461 | u32 disp = (u32)(ptr) - ((u32)tcache_ptr + 5); \ |
e898de13 |
462 | EMIT_OP(0xe9); \ |
679af8a3 |
463 | EMIT(disp, u32); \ |
464 | } |
465 | |
18b94127 |
466 | #define emith_jump_cond(cond, ptr) { \ |
467 | u32 disp = (u32)(ptr) - ((u32)tcache_ptr + 6); \ |
468 | EMIT(0x0f, u8); \ |
469 | EMIT_OP(0x80 | (cond)); \ |
470 | EMIT(disp, u32); \ |
471 | } |
472 | |
473 | #define emith_jump_patchable(cond) \ |
474 | emith_jump_cond(cond, 0) |
475 | |
476 | #define emith_jump_patch(ptr, target) do { \ |
477 | u32 disp = (u32)(target) - ((u32)(ptr) + 6); \ |
478 | EMIT_PTR((u8 *)(ptr) + 2, disp, u32); \ |
479 | } while (0) |
480 | |
679af8a3 |
481 | #define emith_call(ptr) { \ |
18b94127 |
482 | u32 disp = (u32)(ptr) - ((u32)tcache_ptr + 5); \ |
e898de13 |
483 | EMIT_OP(0xe8); \ |
679af8a3 |
484 | EMIT(disp, u32); \ |
485 | } |
486 | |
f0d7b1fa |
487 | #define emith_call_cond(cond, ptr) \ |
488 | emith_call(ptr) |
489 | |
e05b81fc |
490 | #define emith_call_reg(r) \ |
491 | EMIT_OP_MODRM(0xff, 3, 2, r) |
492 | |
493 | #define emith_call_ctx(offs) { \ |
b081408f |
494 | EMIT_OP_MODRM(0xff, 2, 2, CONTEXT_REG); \ |
e05b81fc |
495 | EMIT(offs, u32); \ |
496 | } |
497 | |
498 | #define emith_ret() \ |
499 | EMIT_OP(0xc3) |
500 | |
8796b7ee |
501 | #define emith_jump_reg(r) \ |
502 | EMIT_OP_MODRM(0xff, 3, 4, r) |
503 | |
e05b81fc |
504 | #define emith_jump_ctx(offs) { \ |
b081408f |
505 | EMIT_OP_MODRM(0xff, 2, 4, CONTEXT_REG); \ |
e05b81fc |
506 | EMIT(offs, u32); \ |
507 | } |
508 | |
8796b7ee |
509 | #define EMITH_JMP_START(cond) { \ |
80599a42 |
510 | u8 *cond_ptr; \ |
511 | JMP8_POS(cond_ptr) |
512 | |
8796b7ee |
513 | #define EMITH_JMP_END(cond) \ |
80599a42 |
514 | JMP8_EMIT(cond, cond_ptr); \ |
679af8a3 |
515 | } |
516 | |
b081408f |
517 | #define EMITH_JMP3_START(cond) { \ |
518 | u8 *cond_ptr, *else_ptr; \ |
519 | JMP8_POS(cond_ptr) |
520 | |
521 | #define EMITH_JMP3_MID(cond) \ |
522 | JMP8_POS(else_ptr); \ |
523 | JMP8_EMIT(cond, cond_ptr); |
524 | |
525 | #define EMITH_JMP3_END() \ |
526 | JMP8_EMIT_NC(else_ptr); \ |
527 | } |
528 | |
8796b7ee |
529 | // "simple" jump (no more then a few insns) |
b081408f |
530 | // ARM will use conditional instructions here |
8796b7ee |
531 | #define EMITH_SJMP_START EMITH_JMP_START |
532 | #define EMITH_SJMP_END EMITH_JMP_END |
533 | |
b081408f |
534 | #define EMITH_SJMP3_START EMITH_JMP3_START |
535 | #define EMITH_SJMP3_MID EMITH_JMP3_MID |
536 | #define EMITH_SJMP3_END EMITH_JMP3_END |
537 | |
80599a42 |
538 | #define host_arg2reg(rd, arg) \ |
f4bb5d6b |
539 | switch (arg) { \ |
540 | case 0: rd = xAX; break; \ |
541 | case 1: rd = xDX; break; \ |
542 | case 2: rd = xCX; break; \ |
679af8a3 |
543 | } |
544 | |
f4bb5d6b |
545 | #define emith_pass_arg_r(arg, reg) { \ |
546 | int rd = 7; \ |
80599a42 |
547 | host_arg2reg(rd, arg); \ |
f4bb5d6b |
548 | emith_move_r_r(rd, reg); \ |
549 | } |
550 | |
551 | #define emith_pass_arg_imm(arg, imm) { \ |
552 | int rd = 7; \ |
80599a42 |
553 | host_arg2reg(rd, arg); \ |
f4bb5d6b |
554 | emith_move_r_imm(rd, imm); \ |
679af8a3 |
555 | } |
556 | |
65c75cb0 |
557 | /* SH2 drc specific */ |
8796b7ee |
558 | #define emith_sh2_drc_entry() { \ |
559 | emith_push(xBX); \ |
560 | emith_push(xBP); \ |
8b4f38f4 |
561 | emith_push(xSI); \ |
562 | emith_push(xDI); \ |
8796b7ee |
563 | } |
564 | |
565 | #define emith_sh2_drc_exit() { \ |
8b4f38f4 |
566 | emith_pop(xDI); \ |
567 | emith_pop(xSI); \ |
8796b7ee |
568 | emith_pop(xBP); \ |
569 | emith_pop(xBX); \ |
e05b81fc |
570 | emith_ret(); \ |
571 | } |
572 | |
573 | // assumes EBX is free temporary |
574 | #define emith_sh2_wcall(a, tab, ret_ptr) { \ |
575 | int arg2_; \ |
576 | host_arg2reg(arg2_, 2); \ |
577 | emith_lsr(xBX, a, SH2_WRITE_SHIFT); \ |
578 | EMIT_OP_MODRM(0x8b, 0, xBX, 4); \ |
579 | EMIT_SIB(2, xBX, tab); /* mov ebx, [tab + ebx * 4] */ \ |
580 | emith_ctx_read(arg2_, offsetof(SH2, is_slave)); \ |
581 | emith_push_imm((long)(ret_ptr)); \ |
582 | emith_jump_reg(xBX); \ |
8796b7ee |
583 | } |
584 | |
80599a42 |
585 | #define emith_sh2_dtbf_loop() { \ |
586 | u8 *jmp0; /* negative cycles check */ \ |
587 | u8 *jmp1; /* unsinged overflow check */ \ |
588 | int cr, rn; \ |
52d759c3 |
589 | int tmp_ = rcache_get_tmp(); \ |
80599a42 |
590 | cr = rcache_get_reg(SHR_SR, RC_GR_RMW); \ |
591 | rn = rcache_get_reg((op >> 8) & 0x0f, RC_GR_RMW);\ |
592 | emith_sub_r_imm(rn, 1); \ |
593 | emith_sub_r_imm(cr, (cycles+1) << 12); \ |
594 | cycles = 0; \ |
52d759c3 |
595 | emith_asr(tmp_, cr, 2+12); \ |
80599a42 |
596 | JMP8_POS(jmp0); /* no negative cycles */ \ |
52d759c3 |
597 | emith_move_r_imm(tmp_, 0); \ |
18b94127 |
598 | JMP8_EMIT(ICOND_JNS, jmp0); \ |
80599a42 |
599 | emith_and_r_imm(cr, 0xffe); \ |
52d759c3 |
600 | emith_subf_r_r(rn, tmp_); \ |
80599a42 |
601 | JMP8_POS(jmp1); /* no overflow */ \ |
602 | emith_neg_r(rn); /* count left */ \ |
603 | emith_lsl(rn, rn, 2+12); \ |
604 | emith_or_r_r(cr, rn); \ |
605 | emith_or_r_imm(cr, 1); \ |
606 | emith_move_r_imm(rn, 0); \ |
18b94127 |
607 | JMP8_EMIT(ICOND_JA, jmp1); \ |
52d759c3 |
608 | rcache_free_tmp(tmp_); \ |
65c75cb0 |
609 | } |
610 | |
18b94127 |
611 | #define emith_write_sr(sr, srcr) { \ |
52d759c3 |
612 | int tmp_ = rcache_get_tmp(); \ |
18b94127 |
613 | emith_clear_msb(tmp_, srcr, 22); \ |
614 | emith_bic_r_imm(sr, 0x3ff); \ |
615 | emith_or_r_r(sr, tmp_); \ |
52d759c3 |
616 | rcache_free_tmp(tmp_); \ |
ed8cf79b |
617 | } |
618 | |
8b4f38f4 |
619 | #define emith_tpop_carry(sr, is_sub) \ |
620 | emith_lsr(sr, sr, 1) |
621 | |
622 | #define emith_tpush_carry(sr, is_sub) \ |
623 | emith_adc_r_r(sr, sr) |
ed8cf79b |
624 | |
f0d7b1fa |
625 | /* |
626 | * if Q |
627 | * t = carry(Rn += Rm) |
628 | * else |
629 | * t = carry(Rn -= Rm) |
630 | * T ^= t |
631 | */ |
632 | #define emith_sh2_div1_step(rn, rm, sr) { \ |
633 | u8 *jmp0, *jmp1; \ |
634 | int tmp_ = rcache_get_tmp(); \ |
8b4f38f4 |
635 | emith_eor_r_r(tmp_, tmp_); \ |
f0d7b1fa |
636 | emith_tst_r_imm(sr, Q); /* if (Q ^ M) */ \ |
637 | JMP8_POS(jmp0); /* je do_sub */ \ |
638 | emith_add_r_r(rn, rm); \ |
639 | JMP8_POS(jmp1); /* jmp done */ \ |
18b94127 |
640 | JMP8_EMIT(ICOND_JE, jmp0); /* do_sub: */ \ |
f0d7b1fa |
641 | emith_sub_r_r(rn, rm); \ |
18b94127 |
642 | JMP8_EMIT_NC(jmp1); /* done: */ \ |
f0d7b1fa |
643 | emith_setc(tmp_); \ |
8b4f38f4 |
644 | EMIT_OP_MODRM(0x31, 3, tmp_, sr); /* T = Q1 ^ Q2 */ \ |
f0d7b1fa |
645 | rcache_free_tmp(tmp_); \ |
646 | } |
647 | |