70357ce5 |
1 | |
2 | // ORI |
3 | OPCODE(0x0000) |
4 | { |
5 | u32 adr, res; |
6 | u32 src, dst; |
7 | |
8 | FETCH_BYTE(src); |
9 | res = DREGu8((Opcode >> 0) & 7); |
10 | res |= src; |
11 | flag_C = 0; |
12 | flag_V = 0; |
13 | flag_NotZ = res; |
14 | flag_N = res; |
15 | DREGu8((Opcode >> 0) & 7) = res; |
16 | RET(8) |
17 | } |
18 | |
19 | // ORI |
20 | OPCODE(0x0010) |
21 | { |
22 | u32 adr, res; |
23 | u32 src, dst; |
24 | |
25 | FETCH_BYTE(src); |
26 | adr = AREG((Opcode >> 0) & 7); |
27 | PRE_IO |
28 | READ_BYTE_F(adr, res) |
29 | res |= src; |
30 | flag_C = 0; |
31 | flag_V = 0; |
32 | flag_NotZ = res; |
33 | flag_N = res; |
34 | WRITE_BYTE_F(adr, res) |
35 | POST_IO |
36 | RET(16) |
37 | } |
38 | |
39 | // ORI |
40 | OPCODE(0x0018) |
41 | { |
42 | u32 adr, res; |
43 | u32 src, dst; |
44 | |
45 | FETCH_BYTE(src); |
46 | adr = AREG((Opcode >> 0) & 7); |
47 | AREG((Opcode >> 0) & 7) += 1; |
48 | PRE_IO |
49 | READ_BYTE_F(adr, res) |
50 | res |= src; |
51 | flag_C = 0; |
52 | flag_V = 0; |
53 | flag_NotZ = res; |
54 | flag_N = res; |
55 | WRITE_BYTE_F(adr, res) |
56 | POST_IO |
57 | RET(16) |
58 | } |
59 | |
60 | // ORI |
61 | OPCODE(0x0020) |
62 | { |
63 | u32 adr, res; |
64 | u32 src, dst; |
65 | |
66 | FETCH_BYTE(src); |
67 | adr = AREG((Opcode >> 0) & 7) - 1; |
68 | AREG((Opcode >> 0) & 7) = adr; |
69 | PRE_IO |
70 | READ_BYTE_F(adr, res) |
71 | res |= src; |
72 | flag_C = 0; |
73 | flag_V = 0; |
74 | flag_NotZ = res; |
75 | flag_N = res; |
76 | WRITE_BYTE_F(adr, res) |
77 | POST_IO |
78 | RET(18) |
79 | } |
80 | |
81 | // ORI |
82 | OPCODE(0x0028) |
83 | { |
84 | u32 adr, res; |
85 | u32 src, dst; |
86 | |
87 | FETCH_BYTE(src); |
88 | FETCH_SWORD(adr); |
89 | adr += AREG((Opcode >> 0) & 7); |
90 | PRE_IO |
91 | READ_BYTE_F(adr, res) |
92 | res |= src; |
93 | flag_C = 0; |
94 | flag_V = 0; |
95 | flag_NotZ = res; |
96 | flag_N = res; |
97 | WRITE_BYTE_F(adr, res) |
98 | POST_IO |
99 | RET(20) |
100 | } |
101 | |
102 | // ORI |
103 | OPCODE(0x0030) |
104 | { |
105 | u32 adr, res; |
106 | u32 src, dst; |
107 | |
108 | FETCH_BYTE(src); |
109 | adr = AREG((Opcode >> 0) & 7); |
110 | DECODE_EXT_WORD |
111 | PRE_IO |
112 | READ_BYTE_F(adr, res) |
113 | res |= src; |
114 | flag_C = 0; |
115 | flag_V = 0; |
116 | flag_NotZ = res; |
117 | flag_N = res; |
118 | WRITE_BYTE_F(adr, res) |
119 | POST_IO |
120 | RET(22) |
121 | } |
122 | |
123 | // ORI |
124 | OPCODE(0x0038) |
125 | { |
126 | u32 adr, res; |
127 | u32 src, dst; |
128 | |
129 | FETCH_BYTE(src); |
130 | FETCH_SWORD(adr); |
131 | PRE_IO |
132 | READ_BYTE_F(adr, res) |
133 | res |= src; |
134 | flag_C = 0; |
135 | flag_V = 0; |
136 | flag_NotZ = res; |
137 | flag_N = res; |
138 | WRITE_BYTE_F(adr, res) |
139 | POST_IO |
140 | RET(20) |
141 | } |
142 | |
143 | // ORI |
144 | OPCODE(0x0039) |
145 | { |
146 | u32 adr, res; |
147 | u32 src, dst; |
148 | |
149 | FETCH_BYTE(src); |
150 | FETCH_LONG(adr); |
151 | PRE_IO |
152 | READ_BYTE_F(adr, res) |
153 | res |= src; |
154 | flag_C = 0; |
155 | flag_V = 0; |
156 | flag_NotZ = res; |
157 | flag_N = res; |
158 | WRITE_BYTE_F(adr, res) |
159 | POST_IO |
160 | RET(24) |
161 | } |
162 | |
163 | // ORI |
164 | OPCODE(0x001F) |
165 | { |
166 | u32 adr, res; |
167 | u32 src, dst; |
168 | |
169 | FETCH_BYTE(src); |
170 | adr = AREG(7); |
171 | AREG(7) += 2; |
172 | PRE_IO |
173 | READ_BYTE_F(adr, res) |
174 | res |= src; |
175 | flag_C = 0; |
176 | flag_V = 0; |
177 | flag_NotZ = res; |
178 | flag_N = res; |
179 | WRITE_BYTE_F(adr, res) |
180 | POST_IO |
181 | RET(16) |
182 | } |
183 | |
184 | // ORI |
185 | OPCODE(0x0027) |
186 | { |
187 | u32 adr, res; |
188 | u32 src, dst; |
189 | |
190 | FETCH_BYTE(src); |
191 | adr = AREG(7) - 2; |
192 | AREG(7) = adr; |
193 | PRE_IO |
194 | READ_BYTE_F(adr, res) |
195 | res |= src; |
196 | flag_C = 0; |
197 | flag_V = 0; |
198 | flag_NotZ = res; |
199 | flag_N = res; |
200 | WRITE_BYTE_F(adr, res) |
201 | POST_IO |
202 | RET(18) |
203 | } |
204 | |
205 | // ORI |
206 | OPCODE(0x0040) |
207 | { |
208 | u32 adr, res; |
209 | u32 src, dst; |
210 | |
211 | FETCH_WORD(src); |
212 | res = DREGu16((Opcode >> 0) & 7); |
213 | res |= src; |
214 | flag_C = 0; |
215 | flag_V = 0; |
216 | flag_NotZ = res; |
217 | flag_N = res >> 8; |
218 | DREGu16((Opcode >> 0) & 7) = res; |
219 | RET(8) |
220 | } |
221 | |
222 | // ORI |
223 | OPCODE(0x0050) |
224 | { |
225 | u32 adr, res; |
226 | u32 src, dst; |
227 | |
228 | FETCH_WORD(src); |
229 | adr = AREG((Opcode >> 0) & 7); |
230 | PRE_IO |
231 | READ_WORD_F(adr, res) |
232 | res |= src; |
233 | flag_C = 0; |
234 | flag_V = 0; |
235 | flag_NotZ = res; |
236 | flag_N = res >> 8; |
237 | WRITE_WORD_F(adr, res) |
238 | POST_IO |
239 | RET(16) |
240 | } |
241 | |
242 | // ORI |
243 | OPCODE(0x0058) |
244 | { |
245 | u32 adr, res; |
246 | u32 src, dst; |
247 | |
248 | FETCH_WORD(src); |
249 | adr = AREG((Opcode >> 0) & 7); |
250 | AREG((Opcode >> 0) & 7) += 2; |
251 | PRE_IO |
252 | READ_WORD_F(adr, res) |
253 | res |= src; |
254 | flag_C = 0; |
255 | flag_V = 0; |
256 | flag_NotZ = res; |
257 | flag_N = res >> 8; |
258 | WRITE_WORD_F(adr, res) |
259 | POST_IO |
260 | RET(16) |
261 | } |
262 | |
263 | // ORI |
264 | OPCODE(0x0060) |
265 | { |
266 | u32 adr, res; |
267 | u32 src, dst; |
268 | |
269 | FETCH_WORD(src); |
270 | adr = AREG((Opcode >> 0) & 7) - 2; |
271 | AREG((Opcode >> 0) & 7) = adr; |
272 | PRE_IO |
273 | READ_WORD_F(adr, res) |
274 | res |= src; |
275 | flag_C = 0; |
276 | flag_V = 0; |
277 | flag_NotZ = res; |
278 | flag_N = res >> 8; |
279 | WRITE_WORD_F(adr, res) |
280 | POST_IO |
281 | RET(18) |
282 | } |
283 | |
284 | // ORI |
285 | OPCODE(0x0068) |
286 | { |
287 | u32 adr, res; |
288 | u32 src, dst; |
289 | |
290 | FETCH_WORD(src); |
291 | FETCH_SWORD(adr); |
292 | adr += AREG((Opcode >> 0) & 7); |
293 | PRE_IO |
294 | READ_WORD_F(adr, res) |
295 | res |= src; |
296 | flag_C = 0; |
297 | flag_V = 0; |
298 | flag_NotZ = res; |
299 | flag_N = res >> 8; |
300 | WRITE_WORD_F(adr, res) |
301 | POST_IO |
302 | RET(20) |
303 | } |
304 | |
305 | // ORI |
306 | OPCODE(0x0070) |
307 | { |
308 | u32 adr, res; |
309 | u32 src, dst; |
310 | |
311 | FETCH_WORD(src); |
312 | adr = AREG((Opcode >> 0) & 7); |
313 | DECODE_EXT_WORD |
314 | PRE_IO |
315 | READ_WORD_F(adr, res) |
316 | res |= src; |
317 | flag_C = 0; |
318 | flag_V = 0; |
319 | flag_NotZ = res; |
320 | flag_N = res >> 8; |
321 | WRITE_WORD_F(adr, res) |
322 | POST_IO |
323 | RET(22) |
324 | } |
325 | |
326 | // ORI |
327 | OPCODE(0x0078) |
328 | { |
329 | u32 adr, res; |
330 | u32 src, dst; |
331 | |
332 | FETCH_WORD(src); |
333 | FETCH_SWORD(adr); |
334 | PRE_IO |
335 | READ_WORD_F(adr, res) |
336 | res |= src; |
337 | flag_C = 0; |
338 | flag_V = 0; |
339 | flag_NotZ = res; |
340 | flag_N = res >> 8; |
341 | WRITE_WORD_F(adr, res) |
342 | POST_IO |
343 | RET(20) |
344 | } |
345 | |
346 | // ORI |
347 | OPCODE(0x0079) |
348 | { |
349 | u32 adr, res; |
350 | u32 src, dst; |
351 | |
352 | FETCH_WORD(src); |
353 | FETCH_LONG(adr); |
354 | PRE_IO |
355 | READ_WORD_F(adr, res) |
356 | res |= src; |
357 | flag_C = 0; |
358 | flag_V = 0; |
359 | flag_NotZ = res; |
360 | flag_N = res >> 8; |
361 | WRITE_WORD_F(adr, res) |
362 | POST_IO |
363 | RET(24) |
364 | } |
365 | |
366 | // ORI |
367 | OPCODE(0x005F) |
368 | { |
369 | u32 adr, res; |
370 | u32 src, dst; |
371 | |
372 | FETCH_WORD(src); |
373 | adr = AREG(7); |
374 | AREG(7) += 2; |
375 | PRE_IO |
376 | READ_WORD_F(adr, res) |
377 | res |= src; |
378 | flag_C = 0; |
379 | flag_V = 0; |
380 | flag_NotZ = res; |
381 | flag_N = res >> 8; |
382 | WRITE_WORD_F(adr, res) |
383 | POST_IO |
384 | RET(16) |
385 | } |
386 | |
387 | // ORI |
388 | OPCODE(0x0067) |
389 | { |
390 | u32 adr, res; |
391 | u32 src, dst; |
392 | |
393 | FETCH_WORD(src); |
394 | adr = AREG(7) - 2; |
395 | AREG(7) = adr; |
396 | PRE_IO |
397 | READ_WORD_F(adr, res) |
398 | res |= src; |
399 | flag_C = 0; |
400 | flag_V = 0; |
401 | flag_NotZ = res; |
402 | flag_N = res >> 8; |
403 | WRITE_WORD_F(adr, res) |
404 | POST_IO |
405 | RET(18) |
406 | } |
407 | |
408 | // ORI |
409 | OPCODE(0x0080) |
410 | { |
411 | u32 adr, res; |
412 | u32 src, dst; |
413 | |
414 | FETCH_LONG(src); |
415 | res = DREGu32((Opcode >> 0) & 7); |
416 | res |= src; |
417 | flag_C = 0; |
418 | flag_V = 0; |
419 | flag_NotZ = res; |
420 | flag_N = res >> 24; |
421 | DREGu32((Opcode >> 0) & 7) = res; |
422 | RET(16) |
423 | } |
424 | |
425 | // ORI |
426 | OPCODE(0x0090) |
427 | { |
428 | u32 adr, res; |
429 | u32 src, dst; |
430 | |
431 | FETCH_LONG(src); |
432 | adr = AREG((Opcode >> 0) & 7); |
433 | PRE_IO |
434 | READ_LONG_F(adr, res) |
435 | res |= src; |
436 | flag_C = 0; |
437 | flag_V = 0; |
438 | flag_NotZ = res; |
439 | flag_N = res >> 24; |
440 | WRITE_LONG_F(adr, res) |
441 | POST_IO |
442 | RET(28) |
443 | } |
444 | |
445 | // ORI |
446 | OPCODE(0x0098) |
447 | { |
448 | u32 adr, res; |
449 | u32 src, dst; |
450 | |
451 | FETCH_LONG(src); |
452 | adr = AREG((Opcode >> 0) & 7); |
453 | AREG((Opcode >> 0) & 7) += 4; |
454 | PRE_IO |
455 | READ_LONG_F(adr, res) |
456 | res |= src; |
457 | flag_C = 0; |
458 | flag_V = 0; |
459 | flag_NotZ = res; |
460 | flag_N = res >> 24; |
461 | WRITE_LONG_F(adr, res) |
462 | POST_IO |
463 | RET(28) |
464 | } |
465 | |
466 | // ORI |
467 | OPCODE(0x00A0) |
468 | { |
469 | u32 adr, res; |
470 | u32 src, dst; |
471 | |
472 | FETCH_LONG(src); |
473 | adr = AREG((Opcode >> 0) & 7) - 4; |
474 | AREG((Opcode >> 0) & 7) = adr; |
475 | PRE_IO |
476 | READ_LONG_F(adr, res) |
477 | res |= src; |
478 | flag_C = 0; |
479 | flag_V = 0; |
480 | flag_NotZ = res; |
481 | flag_N = res >> 24; |
482 | WRITE_LONG_F(adr, res) |
483 | POST_IO |
484 | RET(30) |
485 | } |
486 | |
487 | // ORI |
488 | OPCODE(0x00A8) |
489 | { |
490 | u32 adr, res; |
491 | u32 src, dst; |
492 | |
493 | FETCH_LONG(src); |
494 | FETCH_SWORD(adr); |
495 | adr += AREG((Opcode >> 0) & 7); |
496 | PRE_IO |
497 | READ_LONG_F(adr, res) |
498 | res |= src; |
499 | flag_C = 0; |
500 | flag_V = 0; |
501 | flag_NotZ = res; |
502 | flag_N = res >> 24; |
503 | WRITE_LONG_F(adr, res) |
504 | POST_IO |
505 | RET(32) |
506 | } |
507 | |
508 | // ORI |
509 | OPCODE(0x00B0) |
510 | { |
511 | u32 adr, res; |
512 | u32 src, dst; |
513 | |
514 | FETCH_LONG(src); |
515 | adr = AREG((Opcode >> 0) & 7); |
516 | DECODE_EXT_WORD |
517 | PRE_IO |
518 | READ_LONG_F(adr, res) |
519 | res |= src; |
520 | flag_C = 0; |
521 | flag_V = 0; |
522 | flag_NotZ = res; |
523 | flag_N = res >> 24; |
524 | WRITE_LONG_F(adr, res) |
525 | POST_IO |
526 | RET(34) |
527 | } |
528 | |
529 | // ORI |
530 | OPCODE(0x00B8) |
531 | { |
532 | u32 adr, res; |
533 | u32 src, dst; |
534 | |
535 | FETCH_LONG(src); |
536 | FETCH_SWORD(adr); |
537 | PRE_IO |
538 | READ_LONG_F(adr, res) |
539 | res |= src; |
540 | flag_C = 0; |
541 | flag_V = 0; |
542 | flag_NotZ = res; |
543 | flag_N = res >> 24; |
544 | WRITE_LONG_F(adr, res) |
545 | POST_IO |
546 | RET(32) |
547 | } |
548 | |
549 | // ORI |
550 | OPCODE(0x00B9) |
551 | { |
552 | u32 adr, res; |
553 | u32 src, dst; |
554 | |
555 | FETCH_LONG(src); |
556 | FETCH_LONG(adr); |
557 | PRE_IO |
558 | READ_LONG_F(adr, res) |
559 | res |= src; |
560 | flag_C = 0; |
561 | flag_V = 0; |
562 | flag_NotZ = res; |
563 | flag_N = res >> 24; |
564 | WRITE_LONG_F(adr, res) |
565 | POST_IO |
566 | RET(36) |
567 | } |
568 | |
569 | // ORI |
570 | OPCODE(0x009F) |
571 | { |
572 | u32 adr, res; |
573 | u32 src, dst; |
574 | |
575 | FETCH_LONG(src); |
576 | adr = AREG(7); |
577 | AREG(7) += 4; |
578 | PRE_IO |
579 | READ_LONG_F(adr, res) |
580 | res |= src; |
581 | flag_C = 0; |
582 | flag_V = 0; |
583 | flag_NotZ = res; |
584 | flag_N = res >> 24; |
585 | WRITE_LONG_F(adr, res) |
586 | POST_IO |
587 | RET(28) |
588 | } |
589 | |
590 | // ORI |
591 | OPCODE(0x00A7) |
592 | { |
593 | u32 adr, res; |
594 | u32 src, dst; |
595 | |
596 | FETCH_LONG(src); |
597 | adr = AREG(7) - 4; |
598 | AREG(7) = adr; |
599 | PRE_IO |
600 | READ_LONG_F(adr, res) |
601 | res |= src; |
602 | flag_C = 0; |
603 | flag_V = 0; |
604 | flag_NotZ = res; |
605 | flag_N = res >> 24; |
606 | WRITE_LONG_F(adr, res) |
607 | POST_IO |
608 | RET(30) |
609 | } |
610 | |
611 | // ORICCR |
612 | OPCODE(0x003C) |
613 | { |
614 | u32 adr, res; |
615 | u32 src, dst; |
616 | |
617 | FETCH_BYTE(res); |
618 | res &= M68K_CCR_MASK; |
619 | res |= GET_CCR; |
620 | SET_CCR(res) |
621 | RET(20) |
622 | } |
623 | |
624 | // ORISR |
625 | OPCODE(0x007C) |
626 | { |
627 | u32 adr, res; |
628 | u32 src, dst; |
629 | |
630 | if (flag_S) |
631 | { |
632 | u32 res; |
633 | FETCH_WORD(res); |
634 | res &= M68K_SR_MASK; |
635 | res |= GET_SR; |
636 | SET_SR(res) |
637 | CHECK_INT_TO_JUMP(20) |
638 | } |
639 | else |
640 | { |
d0ae0cb4 |
641 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
642 | #ifdef USE_CYCLONE_TIMING |
643 | RET(0) |
644 | #else |
645 | RET(4) |
646 | #endif |
647 | } |
648 | RET(20) |
649 | } |
650 | |
651 | // ANDI |
652 | OPCODE(0x0200) |
653 | { |
654 | u32 adr, res; |
655 | u32 src, dst; |
656 | |
657 | FETCH_BYTE(src); |
658 | res = DREGu8((Opcode >> 0) & 7); |
659 | res &= src; |
660 | flag_C = 0; |
661 | flag_V = 0; |
662 | flag_NotZ = res; |
663 | flag_N = res; |
664 | DREGu8((Opcode >> 0) & 7) = res; |
665 | RET(8) |
666 | } |
667 | |
668 | // ANDI |
669 | OPCODE(0x0210) |
670 | { |
671 | u32 adr, res; |
672 | u32 src, dst; |
673 | |
674 | FETCH_BYTE(src); |
675 | adr = AREG((Opcode >> 0) & 7); |
676 | PRE_IO |
677 | READ_BYTE_F(adr, res) |
678 | res &= src; |
679 | flag_C = 0; |
680 | flag_V = 0; |
681 | flag_NotZ = res; |
682 | flag_N = res; |
683 | WRITE_BYTE_F(adr, res) |
684 | POST_IO |
685 | RET(16) |
686 | } |
687 | |
688 | // ANDI |
689 | OPCODE(0x0218) |
690 | { |
691 | u32 adr, res; |
692 | u32 src, dst; |
693 | |
694 | FETCH_BYTE(src); |
695 | adr = AREG((Opcode >> 0) & 7); |
696 | AREG((Opcode >> 0) & 7) += 1; |
697 | PRE_IO |
698 | READ_BYTE_F(adr, res) |
699 | res &= src; |
700 | flag_C = 0; |
701 | flag_V = 0; |
702 | flag_NotZ = res; |
703 | flag_N = res; |
704 | WRITE_BYTE_F(adr, res) |
705 | POST_IO |
706 | RET(16) |
707 | } |
708 | |
709 | // ANDI |
710 | OPCODE(0x0220) |
711 | { |
712 | u32 adr, res; |
713 | u32 src, dst; |
714 | |
715 | FETCH_BYTE(src); |
716 | adr = AREG((Opcode >> 0) & 7) - 1; |
717 | AREG((Opcode >> 0) & 7) = adr; |
718 | PRE_IO |
719 | READ_BYTE_F(adr, res) |
720 | res &= src; |
721 | flag_C = 0; |
722 | flag_V = 0; |
723 | flag_NotZ = res; |
724 | flag_N = res; |
725 | WRITE_BYTE_F(adr, res) |
726 | POST_IO |
727 | RET(18) |
728 | } |
729 | |
730 | // ANDI |
731 | OPCODE(0x0228) |
732 | { |
733 | u32 adr, res; |
734 | u32 src, dst; |
735 | |
736 | FETCH_BYTE(src); |
737 | FETCH_SWORD(adr); |
738 | adr += AREG((Opcode >> 0) & 7); |
739 | PRE_IO |
740 | READ_BYTE_F(adr, res) |
741 | res &= src; |
742 | flag_C = 0; |
743 | flag_V = 0; |
744 | flag_NotZ = res; |
745 | flag_N = res; |
746 | WRITE_BYTE_F(adr, res) |
747 | POST_IO |
748 | RET(20) |
749 | } |
750 | |
751 | // ANDI |
752 | OPCODE(0x0230) |
753 | { |
754 | u32 adr, res; |
755 | u32 src, dst; |
756 | |
757 | FETCH_BYTE(src); |
758 | adr = AREG((Opcode >> 0) & 7); |
759 | DECODE_EXT_WORD |
760 | PRE_IO |
761 | READ_BYTE_F(adr, res) |
762 | res &= src; |
763 | flag_C = 0; |
764 | flag_V = 0; |
765 | flag_NotZ = res; |
766 | flag_N = res; |
767 | WRITE_BYTE_F(adr, res) |
768 | POST_IO |
769 | RET(22) |
770 | } |
771 | |
772 | // ANDI |
773 | OPCODE(0x0238) |
774 | { |
775 | u32 adr, res; |
776 | u32 src, dst; |
777 | |
778 | FETCH_BYTE(src); |
779 | FETCH_SWORD(adr); |
780 | PRE_IO |
781 | READ_BYTE_F(adr, res) |
782 | res &= src; |
783 | flag_C = 0; |
784 | flag_V = 0; |
785 | flag_NotZ = res; |
786 | flag_N = res; |
787 | WRITE_BYTE_F(adr, res) |
788 | POST_IO |
789 | RET(20) |
790 | } |
791 | |
792 | // ANDI |
793 | OPCODE(0x0239) |
794 | { |
795 | u32 adr, res; |
796 | u32 src, dst; |
797 | |
798 | FETCH_BYTE(src); |
799 | FETCH_LONG(adr); |
800 | PRE_IO |
801 | READ_BYTE_F(adr, res) |
802 | res &= src; |
803 | flag_C = 0; |
804 | flag_V = 0; |
805 | flag_NotZ = res; |
806 | flag_N = res; |
807 | WRITE_BYTE_F(adr, res) |
808 | POST_IO |
809 | RET(24) |
810 | } |
811 | |
812 | // ANDI |
813 | OPCODE(0x021F) |
814 | { |
815 | u32 adr, res; |
816 | u32 src, dst; |
817 | |
818 | FETCH_BYTE(src); |
819 | adr = AREG(7); |
820 | AREG(7) += 2; |
821 | PRE_IO |
822 | READ_BYTE_F(adr, res) |
823 | res &= src; |
824 | flag_C = 0; |
825 | flag_V = 0; |
826 | flag_NotZ = res; |
827 | flag_N = res; |
828 | WRITE_BYTE_F(adr, res) |
829 | POST_IO |
830 | RET(16) |
831 | } |
832 | |
833 | // ANDI |
834 | OPCODE(0x0227) |
835 | { |
836 | u32 adr, res; |
837 | u32 src, dst; |
838 | |
839 | FETCH_BYTE(src); |
840 | adr = AREG(7) - 2; |
841 | AREG(7) = adr; |
842 | PRE_IO |
843 | READ_BYTE_F(adr, res) |
844 | res &= src; |
845 | flag_C = 0; |
846 | flag_V = 0; |
847 | flag_NotZ = res; |
848 | flag_N = res; |
849 | WRITE_BYTE_F(adr, res) |
850 | POST_IO |
851 | RET(18) |
852 | } |
853 | |
854 | // ANDI |
855 | OPCODE(0x0240) |
856 | { |
857 | u32 adr, res; |
858 | u32 src, dst; |
859 | |
860 | FETCH_WORD(src); |
861 | res = DREGu16((Opcode >> 0) & 7); |
862 | res &= src; |
863 | flag_C = 0; |
864 | flag_V = 0; |
865 | flag_NotZ = res; |
866 | flag_N = res >> 8; |
867 | DREGu16((Opcode >> 0) & 7) = res; |
868 | RET(8) |
869 | } |
870 | |
871 | // ANDI |
872 | OPCODE(0x0250) |
873 | { |
874 | u32 adr, res; |
875 | u32 src, dst; |
876 | |
877 | FETCH_WORD(src); |
878 | adr = AREG((Opcode >> 0) & 7); |
879 | PRE_IO |
880 | READ_WORD_F(adr, res) |
881 | res &= src; |
882 | flag_C = 0; |
883 | flag_V = 0; |
884 | flag_NotZ = res; |
885 | flag_N = res >> 8; |
886 | WRITE_WORD_F(adr, res) |
887 | POST_IO |
888 | RET(16) |
889 | } |
890 | |
891 | // ANDI |
892 | OPCODE(0x0258) |
893 | { |
894 | u32 adr, res; |
895 | u32 src, dst; |
896 | |
897 | FETCH_WORD(src); |
898 | adr = AREG((Opcode >> 0) & 7); |
899 | AREG((Opcode >> 0) & 7) += 2; |
900 | PRE_IO |
901 | READ_WORD_F(adr, res) |
902 | res &= src; |
903 | flag_C = 0; |
904 | flag_V = 0; |
905 | flag_NotZ = res; |
906 | flag_N = res >> 8; |
907 | WRITE_WORD_F(adr, res) |
908 | POST_IO |
909 | RET(16) |
910 | } |
911 | |
912 | // ANDI |
913 | OPCODE(0x0260) |
914 | { |
915 | u32 adr, res; |
916 | u32 src, dst; |
917 | |
918 | FETCH_WORD(src); |
919 | adr = AREG((Opcode >> 0) & 7) - 2; |
920 | AREG((Opcode >> 0) & 7) = adr; |
921 | PRE_IO |
922 | READ_WORD_F(adr, res) |
923 | res &= src; |
924 | flag_C = 0; |
925 | flag_V = 0; |
926 | flag_NotZ = res; |
927 | flag_N = res >> 8; |
928 | WRITE_WORD_F(adr, res) |
929 | POST_IO |
930 | RET(18) |
931 | } |
932 | |
933 | // ANDI |
934 | OPCODE(0x0268) |
935 | { |
936 | u32 adr, res; |
937 | u32 src, dst; |
938 | |
939 | FETCH_WORD(src); |
940 | FETCH_SWORD(adr); |
941 | adr += AREG((Opcode >> 0) & 7); |
942 | PRE_IO |
943 | READ_WORD_F(adr, res) |
944 | res &= src; |
945 | flag_C = 0; |
946 | flag_V = 0; |
947 | flag_NotZ = res; |
948 | flag_N = res >> 8; |
949 | WRITE_WORD_F(adr, res) |
950 | POST_IO |
951 | RET(20) |
952 | } |
953 | |
954 | // ANDI |
955 | OPCODE(0x0270) |
956 | { |
957 | u32 adr, res; |
958 | u32 src, dst; |
959 | |
960 | FETCH_WORD(src); |
961 | adr = AREG((Opcode >> 0) & 7); |
962 | DECODE_EXT_WORD |
963 | PRE_IO |
964 | READ_WORD_F(adr, res) |
965 | res &= src; |
966 | flag_C = 0; |
967 | flag_V = 0; |
968 | flag_NotZ = res; |
969 | flag_N = res >> 8; |
970 | WRITE_WORD_F(adr, res) |
971 | POST_IO |
972 | RET(22) |
973 | } |
974 | |
975 | // ANDI |
976 | OPCODE(0x0278) |
977 | { |
978 | u32 adr, res; |
979 | u32 src, dst; |
980 | |
981 | FETCH_WORD(src); |
982 | FETCH_SWORD(adr); |
983 | PRE_IO |
984 | READ_WORD_F(adr, res) |
985 | res &= src; |
986 | flag_C = 0; |
987 | flag_V = 0; |
988 | flag_NotZ = res; |
989 | flag_N = res >> 8; |
990 | WRITE_WORD_F(adr, res) |
991 | POST_IO |
992 | RET(20) |
993 | } |
994 | |
995 | // ANDI |
996 | OPCODE(0x0279) |
997 | { |
998 | u32 adr, res; |
999 | u32 src, dst; |
1000 | |
1001 | FETCH_WORD(src); |
1002 | FETCH_LONG(adr); |
1003 | PRE_IO |
1004 | READ_WORD_F(adr, res) |
1005 | res &= src; |
1006 | flag_C = 0; |
1007 | flag_V = 0; |
1008 | flag_NotZ = res; |
1009 | flag_N = res >> 8; |
1010 | WRITE_WORD_F(adr, res) |
1011 | POST_IO |
1012 | RET(24) |
1013 | } |
1014 | |
1015 | // ANDI |
1016 | OPCODE(0x025F) |
1017 | { |
1018 | u32 adr, res; |
1019 | u32 src, dst; |
1020 | |
1021 | FETCH_WORD(src); |
1022 | adr = AREG(7); |
1023 | AREG(7) += 2; |
1024 | PRE_IO |
1025 | READ_WORD_F(adr, res) |
1026 | res &= src; |
1027 | flag_C = 0; |
1028 | flag_V = 0; |
1029 | flag_NotZ = res; |
1030 | flag_N = res >> 8; |
1031 | WRITE_WORD_F(adr, res) |
1032 | POST_IO |
1033 | RET(16) |
1034 | } |
1035 | |
1036 | // ANDI |
1037 | OPCODE(0x0267) |
1038 | { |
1039 | u32 adr, res; |
1040 | u32 src, dst; |
1041 | |
1042 | FETCH_WORD(src); |
1043 | adr = AREG(7) - 2; |
1044 | AREG(7) = adr; |
1045 | PRE_IO |
1046 | READ_WORD_F(adr, res) |
1047 | res &= src; |
1048 | flag_C = 0; |
1049 | flag_V = 0; |
1050 | flag_NotZ = res; |
1051 | flag_N = res >> 8; |
1052 | WRITE_WORD_F(adr, res) |
1053 | POST_IO |
1054 | RET(18) |
1055 | } |
1056 | |
1057 | // ANDI |
1058 | OPCODE(0x0280) |
1059 | { |
1060 | u32 adr, res; |
1061 | u32 src, dst; |
1062 | |
1063 | FETCH_LONG(src); |
1064 | res = DREGu32((Opcode >> 0) & 7); |
1065 | res &= src; |
1066 | flag_C = 0; |
1067 | flag_V = 0; |
1068 | flag_NotZ = res; |
1069 | flag_N = res >> 24; |
1070 | DREGu32((Opcode >> 0) & 7) = res; |
1071 | #ifdef USE_CYCLONE_TIMING |
1072 | RET(14) |
1073 | #else |
1074 | RET(16) |
1075 | #endif |
1076 | } |
1077 | |
1078 | // ANDI |
1079 | OPCODE(0x0290) |
1080 | { |
1081 | u32 adr, res; |
1082 | u32 src, dst; |
1083 | |
1084 | FETCH_LONG(src); |
1085 | adr = AREG((Opcode >> 0) & 7); |
1086 | PRE_IO |
1087 | READ_LONG_F(adr, res) |
1088 | res &= src; |
1089 | flag_C = 0; |
1090 | flag_V = 0; |
1091 | flag_NotZ = res; |
1092 | flag_N = res >> 24; |
1093 | WRITE_LONG_F(adr, res) |
1094 | POST_IO |
1095 | RET(28) |
1096 | } |
1097 | |
1098 | // ANDI |
1099 | OPCODE(0x0298) |
1100 | { |
1101 | u32 adr, res; |
1102 | u32 src, dst; |
1103 | |
1104 | FETCH_LONG(src); |
1105 | adr = AREG((Opcode >> 0) & 7); |
1106 | AREG((Opcode >> 0) & 7) += 4; |
1107 | PRE_IO |
1108 | READ_LONG_F(adr, res) |
1109 | res &= src; |
1110 | flag_C = 0; |
1111 | flag_V = 0; |
1112 | flag_NotZ = res; |
1113 | flag_N = res >> 24; |
1114 | WRITE_LONG_F(adr, res) |
1115 | POST_IO |
1116 | RET(28) |
1117 | } |
1118 | |
1119 | // ANDI |
1120 | OPCODE(0x02A0) |
1121 | { |
1122 | u32 adr, res; |
1123 | u32 src, dst; |
1124 | |
1125 | FETCH_LONG(src); |
1126 | adr = AREG((Opcode >> 0) & 7) - 4; |
1127 | AREG((Opcode >> 0) & 7) = adr; |
1128 | PRE_IO |
1129 | READ_LONG_F(adr, res) |
1130 | res &= src; |
1131 | flag_C = 0; |
1132 | flag_V = 0; |
1133 | flag_NotZ = res; |
1134 | flag_N = res >> 24; |
1135 | WRITE_LONG_F(adr, res) |
1136 | POST_IO |
1137 | RET(30) |
1138 | } |
1139 | |
1140 | // ANDI |
1141 | OPCODE(0x02A8) |
1142 | { |
1143 | u32 adr, res; |
1144 | u32 src, dst; |
1145 | |
1146 | FETCH_LONG(src); |
1147 | FETCH_SWORD(adr); |
1148 | adr += AREG((Opcode >> 0) & 7); |
1149 | PRE_IO |
1150 | READ_LONG_F(adr, res) |
1151 | res &= src; |
1152 | flag_C = 0; |
1153 | flag_V = 0; |
1154 | flag_NotZ = res; |
1155 | flag_N = res >> 24; |
1156 | WRITE_LONG_F(adr, res) |
1157 | POST_IO |
1158 | RET(32) |
1159 | } |
1160 | |
1161 | // ANDI |
1162 | OPCODE(0x02B0) |
1163 | { |
1164 | u32 adr, res; |
1165 | u32 src, dst; |
1166 | |
1167 | FETCH_LONG(src); |
1168 | adr = AREG((Opcode >> 0) & 7); |
1169 | DECODE_EXT_WORD |
1170 | PRE_IO |
1171 | READ_LONG_F(adr, res) |
1172 | res &= src; |
1173 | flag_C = 0; |
1174 | flag_V = 0; |
1175 | flag_NotZ = res; |
1176 | flag_N = res >> 24; |
1177 | WRITE_LONG_F(adr, res) |
1178 | POST_IO |
1179 | RET(34) |
1180 | } |
1181 | |
1182 | // ANDI |
1183 | OPCODE(0x02B8) |
1184 | { |
1185 | u32 adr, res; |
1186 | u32 src, dst; |
1187 | |
1188 | FETCH_LONG(src); |
1189 | FETCH_SWORD(adr); |
1190 | PRE_IO |
1191 | READ_LONG_F(adr, res) |
1192 | res &= src; |
1193 | flag_C = 0; |
1194 | flag_V = 0; |
1195 | flag_NotZ = res; |
1196 | flag_N = res >> 24; |
1197 | WRITE_LONG_F(adr, res) |
1198 | POST_IO |
1199 | RET(32) |
1200 | } |
1201 | |
1202 | // ANDI |
1203 | OPCODE(0x02B9) |
1204 | { |
1205 | u32 adr, res; |
1206 | u32 src, dst; |
1207 | |
1208 | FETCH_LONG(src); |
1209 | FETCH_LONG(adr); |
1210 | PRE_IO |
1211 | READ_LONG_F(adr, res) |
1212 | res &= src; |
1213 | flag_C = 0; |
1214 | flag_V = 0; |
1215 | flag_NotZ = res; |
1216 | flag_N = res >> 24; |
1217 | WRITE_LONG_F(adr, res) |
1218 | POST_IO |
1219 | RET(36) |
1220 | } |
1221 | |
1222 | // ANDI |
1223 | OPCODE(0x029F) |
1224 | { |
1225 | u32 adr, res; |
1226 | u32 src, dst; |
1227 | |
1228 | FETCH_LONG(src); |
1229 | adr = AREG(7); |
1230 | AREG(7) += 4; |
1231 | PRE_IO |
1232 | READ_LONG_F(adr, res) |
1233 | res &= src; |
1234 | flag_C = 0; |
1235 | flag_V = 0; |
1236 | flag_NotZ = res; |
1237 | flag_N = res >> 24; |
1238 | WRITE_LONG_F(adr, res) |
1239 | POST_IO |
1240 | RET(28) |
1241 | } |
1242 | |
1243 | // ANDI |
1244 | OPCODE(0x02A7) |
1245 | { |
1246 | u32 adr, res; |
1247 | u32 src, dst; |
1248 | |
1249 | FETCH_LONG(src); |
1250 | adr = AREG(7) - 4; |
1251 | AREG(7) = adr; |
1252 | PRE_IO |
1253 | READ_LONG_F(adr, res) |
1254 | res &= src; |
1255 | flag_C = 0; |
1256 | flag_V = 0; |
1257 | flag_NotZ = res; |
1258 | flag_N = res >> 24; |
1259 | WRITE_LONG_F(adr, res) |
1260 | POST_IO |
1261 | RET(30) |
1262 | } |
1263 | |
1264 | // ANDICCR |
1265 | OPCODE(0x023C) |
1266 | { |
1267 | u32 adr, res; |
1268 | u32 src, dst; |
1269 | |
1270 | FETCH_BYTE(res); |
1271 | res &= M68K_CCR_MASK; |
1272 | res &= GET_CCR; |
1273 | SET_CCR(res) |
1274 | RET(20) |
1275 | } |
1276 | |
1277 | // ANDISR |
1278 | OPCODE(0x027C) |
1279 | { |
1280 | u32 adr, res; |
1281 | u32 src, dst; |
1282 | |
1283 | if (flag_S) |
1284 | { |
1285 | FETCH_WORD(res); |
1286 | res &= M68K_SR_MASK; |
1287 | res &= GET_SR; |
1288 | SET_SR(res) |
1289 | if (!flag_S) |
1290 | { |
1291 | res = AREG(7); |
1292 | AREG(7) = ASP; |
1293 | ASP = res; |
1294 | } |
1295 | CHECK_INT_TO_JUMP(20) |
1296 | } |
1297 | else |
1298 | { |
d0ae0cb4 |
1299 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
1300 | RET(4) |
1301 | } |
1302 | RET(20) |
1303 | } |
1304 | |
1305 | // EORI |
1306 | OPCODE(0x0A00) |
1307 | { |
1308 | u32 adr, res; |
1309 | u32 src, dst; |
1310 | |
1311 | FETCH_BYTE(src); |
1312 | res = DREGu8((Opcode >> 0) & 7); |
1313 | res ^= src; |
1314 | flag_C = 0; |
1315 | flag_V = 0; |
1316 | flag_NotZ = res; |
1317 | flag_N = res; |
1318 | DREGu8((Opcode >> 0) & 7) = res; |
1319 | RET(8) |
1320 | } |
1321 | |
1322 | // EORI |
1323 | OPCODE(0x0A10) |
1324 | { |
1325 | u32 adr, res; |
1326 | u32 src, dst; |
1327 | |
1328 | FETCH_BYTE(src); |
1329 | adr = AREG((Opcode >> 0) & 7); |
1330 | PRE_IO |
1331 | READ_BYTE_F(adr, res) |
1332 | res ^= src; |
1333 | flag_C = 0; |
1334 | flag_V = 0; |
1335 | flag_NotZ = res; |
1336 | flag_N = res; |
1337 | WRITE_BYTE_F(adr, res) |
1338 | POST_IO |
1339 | RET(16) |
1340 | } |
1341 | |
1342 | // EORI |
1343 | OPCODE(0x0A18) |
1344 | { |
1345 | u32 adr, res; |
1346 | u32 src, dst; |
1347 | |
1348 | FETCH_BYTE(src); |
1349 | adr = AREG((Opcode >> 0) & 7); |
1350 | AREG((Opcode >> 0) & 7) += 1; |
1351 | PRE_IO |
1352 | READ_BYTE_F(adr, res) |
1353 | res ^= src; |
1354 | flag_C = 0; |
1355 | flag_V = 0; |
1356 | flag_NotZ = res; |
1357 | flag_N = res; |
1358 | WRITE_BYTE_F(adr, res) |
1359 | POST_IO |
1360 | RET(16) |
1361 | } |
1362 | |
1363 | // EORI |
1364 | OPCODE(0x0A20) |
1365 | { |
1366 | u32 adr, res; |
1367 | u32 src, dst; |
1368 | |
1369 | FETCH_BYTE(src); |
1370 | adr = AREG((Opcode >> 0) & 7) - 1; |
1371 | AREG((Opcode >> 0) & 7) = adr; |
1372 | PRE_IO |
1373 | READ_BYTE_F(adr, res) |
1374 | res ^= src; |
1375 | flag_C = 0; |
1376 | flag_V = 0; |
1377 | flag_NotZ = res; |
1378 | flag_N = res; |
1379 | WRITE_BYTE_F(adr, res) |
1380 | POST_IO |
1381 | RET(18) |
1382 | } |
1383 | |
1384 | // EORI |
1385 | OPCODE(0x0A28) |
1386 | { |
1387 | u32 adr, res; |
1388 | u32 src, dst; |
1389 | |
1390 | FETCH_BYTE(src); |
1391 | FETCH_SWORD(adr); |
1392 | adr += AREG((Opcode >> 0) & 7); |
1393 | PRE_IO |
1394 | READ_BYTE_F(adr, res) |
1395 | res ^= src; |
1396 | flag_C = 0; |
1397 | flag_V = 0; |
1398 | flag_NotZ = res; |
1399 | flag_N = res; |
1400 | WRITE_BYTE_F(adr, res) |
1401 | POST_IO |
1402 | RET(20) |
1403 | } |
1404 | |
1405 | // EORI |
1406 | OPCODE(0x0A30) |
1407 | { |
1408 | u32 adr, res; |
1409 | u32 src, dst; |
1410 | |
1411 | FETCH_BYTE(src); |
1412 | adr = AREG((Opcode >> 0) & 7); |
1413 | DECODE_EXT_WORD |
1414 | PRE_IO |
1415 | READ_BYTE_F(adr, res) |
1416 | res ^= src; |
1417 | flag_C = 0; |
1418 | flag_V = 0; |
1419 | flag_NotZ = res; |
1420 | flag_N = res; |
1421 | WRITE_BYTE_F(adr, res) |
1422 | POST_IO |
1423 | RET(22) |
1424 | } |
1425 | |
1426 | // EORI |
1427 | OPCODE(0x0A38) |
1428 | { |
1429 | u32 adr, res; |
1430 | u32 src, dst; |
1431 | |
1432 | FETCH_BYTE(src); |
1433 | FETCH_SWORD(adr); |
1434 | PRE_IO |
1435 | READ_BYTE_F(adr, res) |
1436 | res ^= src; |
1437 | flag_C = 0; |
1438 | flag_V = 0; |
1439 | flag_NotZ = res; |
1440 | flag_N = res; |
1441 | WRITE_BYTE_F(adr, res) |
1442 | POST_IO |
1443 | RET(20) |
1444 | } |
1445 | |
1446 | // EORI |
1447 | OPCODE(0x0A39) |
1448 | { |
1449 | u32 adr, res; |
1450 | u32 src, dst; |
1451 | |
1452 | FETCH_BYTE(src); |
1453 | FETCH_LONG(adr); |
1454 | PRE_IO |
1455 | READ_BYTE_F(adr, res) |
1456 | res ^= src; |
1457 | flag_C = 0; |
1458 | flag_V = 0; |
1459 | flag_NotZ = res; |
1460 | flag_N = res; |
1461 | WRITE_BYTE_F(adr, res) |
1462 | POST_IO |
1463 | RET(24) |
1464 | } |
1465 | |
1466 | // EORI |
1467 | OPCODE(0x0A1F) |
1468 | { |
1469 | u32 adr, res; |
1470 | u32 src, dst; |
1471 | |
1472 | FETCH_BYTE(src); |
1473 | adr = AREG(7); |
1474 | AREG(7) += 2; |
1475 | PRE_IO |
1476 | READ_BYTE_F(adr, res) |
1477 | res ^= src; |
1478 | flag_C = 0; |
1479 | flag_V = 0; |
1480 | flag_NotZ = res; |
1481 | flag_N = res; |
1482 | WRITE_BYTE_F(adr, res) |
1483 | POST_IO |
1484 | RET(16) |
1485 | } |
1486 | |
1487 | // EORI |
1488 | OPCODE(0x0A27) |
1489 | { |
1490 | u32 adr, res; |
1491 | u32 src, dst; |
1492 | |
1493 | FETCH_BYTE(src); |
1494 | adr = AREG(7) - 2; |
1495 | AREG(7) = adr; |
1496 | PRE_IO |
1497 | READ_BYTE_F(adr, res) |
1498 | res ^= src; |
1499 | flag_C = 0; |
1500 | flag_V = 0; |
1501 | flag_NotZ = res; |
1502 | flag_N = res; |
1503 | WRITE_BYTE_F(adr, res) |
1504 | POST_IO |
1505 | RET(18) |
1506 | } |
1507 | |
1508 | // EORI |
1509 | OPCODE(0x0A40) |
1510 | { |
1511 | u32 adr, res; |
1512 | u32 src, dst; |
1513 | |
1514 | FETCH_WORD(src); |
1515 | res = DREGu16((Opcode >> 0) & 7); |
1516 | res ^= src; |
1517 | flag_C = 0; |
1518 | flag_V = 0; |
1519 | flag_NotZ = res; |
1520 | flag_N = res >> 8; |
1521 | DREGu16((Opcode >> 0) & 7) = res; |
1522 | RET(8) |
1523 | } |
1524 | |
1525 | // EORI |
1526 | OPCODE(0x0A50) |
1527 | { |
1528 | u32 adr, res; |
1529 | u32 src, dst; |
1530 | |
1531 | FETCH_WORD(src); |
1532 | adr = AREG((Opcode >> 0) & 7); |
1533 | PRE_IO |
1534 | READ_WORD_F(adr, res) |
1535 | res ^= src; |
1536 | flag_C = 0; |
1537 | flag_V = 0; |
1538 | flag_NotZ = res; |
1539 | flag_N = res >> 8; |
1540 | WRITE_WORD_F(adr, res) |
1541 | POST_IO |
1542 | RET(16) |
1543 | } |
1544 | |
1545 | // EORI |
1546 | OPCODE(0x0A58) |
1547 | { |
1548 | u32 adr, res; |
1549 | u32 src, dst; |
1550 | |
1551 | FETCH_WORD(src); |
1552 | adr = AREG((Opcode >> 0) & 7); |
1553 | AREG((Opcode >> 0) & 7) += 2; |
1554 | PRE_IO |
1555 | READ_WORD_F(adr, res) |
1556 | res ^= src; |
1557 | flag_C = 0; |
1558 | flag_V = 0; |
1559 | flag_NotZ = res; |
1560 | flag_N = res >> 8; |
1561 | WRITE_WORD_F(adr, res) |
1562 | POST_IO |
1563 | RET(16) |
1564 | } |
1565 | |
1566 | // EORI |
1567 | OPCODE(0x0A60) |
1568 | { |
1569 | u32 adr, res; |
1570 | u32 src, dst; |
1571 | |
1572 | FETCH_WORD(src); |
1573 | adr = AREG((Opcode >> 0) & 7) - 2; |
1574 | AREG((Opcode >> 0) & 7) = adr; |
1575 | PRE_IO |
1576 | READ_WORD_F(adr, res) |
1577 | res ^= src; |
1578 | flag_C = 0; |
1579 | flag_V = 0; |
1580 | flag_NotZ = res; |
1581 | flag_N = res >> 8; |
1582 | WRITE_WORD_F(adr, res) |
1583 | POST_IO |
1584 | RET(18) |
1585 | } |
1586 | |
1587 | // EORI |
1588 | OPCODE(0x0A68) |
1589 | { |
1590 | u32 adr, res; |
1591 | u32 src, dst; |
1592 | |
1593 | FETCH_WORD(src); |
1594 | FETCH_SWORD(adr); |
1595 | adr += AREG((Opcode >> 0) & 7); |
1596 | PRE_IO |
1597 | READ_WORD_F(adr, res) |
1598 | res ^= src; |
1599 | flag_C = 0; |
1600 | flag_V = 0; |
1601 | flag_NotZ = res; |
1602 | flag_N = res >> 8; |
1603 | WRITE_WORD_F(adr, res) |
1604 | POST_IO |
1605 | RET(20) |
1606 | } |
1607 | |
1608 | // EORI |
1609 | OPCODE(0x0A70) |
1610 | { |
1611 | u32 adr, res; |
1612 | u32 src, dst; |
1613 | |
1614 | FETCH_WORD(src); |
1615 | adr = AREG((Opcode >> 0) & 7); |
1616 | DECODE_EXT_WORD |
1617 | PRE_IO |
1618 | READ_WORD_F(adr, res) |
1619 | res ^= src; |
1620 | flag_C = 0; |
1621 | flag_V = 0; |
1622 | flag_NotZ = res; |
1623 | flag_N = res >> 8; |
1624 | WRITE_WORD_F(adr, res) |
1625 | POST_IO |
1626 | RET(22) |
1627 | } |
1628 | |
1629 | // EORI |
1630 | OPCODE(0x0A78) |
1631 | { |
1632 | u32 adr, res; |
1633 | u32 src, dst; |
1634 | |
1635 | FETCH_WORD(src); |
1636 | FETCH_SWORD(adr); |
1637 | PRE_IO |
1638 | READ_WORD_F(adr, res) |
1639 | res ^= src; |
1640 | flag_C = 0; |
1641 | flag_V = 0; |
1642 | flag_NotZ = res; |
1643 | flag_N = res >> 8; |
1644 | WRITE_WORD_F(adr, res) |
1645 | POST_IO |
1646 | RET(20) |
1647 | } |
1648 | |
1649 | // EORI |
1650 | OPCODE(0x0A79) |
1651 | { |
1652 | u32 adr, res; |
1653 | u32 src, dst; |
1654 | |
1655 | FETCH_WORD(src); |
1656 | FETCH_LONG(adr); |
1657 | PRE_IO |
1658 | READ_WORD_F(adr, res) |
1659 | res ^= src; |
1660 | flag_C = 0; |
1661 | flag_V = 0; |
1662 | flag_NotZ = res; |
1663 | flag_N = res >> 8; |
1664 | WRITE_WORD_F(adr, res) |
1665 | POST_IO |
1666 | RET(24) |
1667 | } |
1668 | |
1669 | // EORI |
1670 | OPCODE(0x0A5F) |
1671 | { |
1672 | u32 adr, res; |
1673 | u32 src, dst; |
1674 | |
1675 | FETCH_WORD(src); |
1676 | adr = AREG(7); |
1677 | AREG(7) += 2; |
1678 | PRE_IO |
1679 | READ_WORD_F(adr, res) |
1680 | res ^= src; |
1681 | flag_C = 0; |
1682 | flag_V = 0; |
1683 | flag_NotZ = res; |
1684 | flag_N = res >> 8; |
1685 | WRITE_WORD_F(adr, res) |
1686 | POST_IO |
1687 | RET(16) |
1688 | } |
1689 | |
1690 | // EORI |
1691 | OPCODE(0x0A67) |
1692 | { |
1693 | u32 adr, res; |
1694 | u32 src, dst; |
1695 | |
1696 | FETCH_WORD(src); |
1697 | adr = AREG(7) - 2; |
1698 | AREG(7) = adr; |
1699 | PRE_IO |
1700 | READ_WORD_F(adr, res) |
1701 | res ^= src; |
1702 | flag_C = 0; |
1703 | flag_V = 0; |
1704 | flag_NotZ = res; |
1705 | flag_N = res >> 8; |
1706 | WRITE_WORD_F(adr, res) |
1707 | POST_IO |
1708 | RET(18) |
1709 | } |
1710 | |
1711 | // EORI |
1712 | OPCODE(0x0A80) |
1713 | { |
1714 | u32 adr, res; |
1715 | u32 src, dst; |
1716 | |
1717 | FETCH_LONG(src); |
1718 | res = DREGu32((Opcode >> 0) & 7); |
1719 | res ^= src; |
1720 | flag_C = 0; |
1721 | flag_V = 0; |
1722 | flag_NotZ = res; |
1723 | flag_N = res >> 24; |
1724 | DREGu32((Opcode >> 0) & 7) = res; |
1725 | RET(16) |
1726 | } |
1727 | |
1728 | // EORI |
1729 | OPCODE(0x0A90) |
1730 | { |
1731 | u32 adr, res; |
1732 | u32 src, dst; |
1733 | |
1734 | FETCH_LONG(src); |
1735 | adr = AREG((Opcode >> 0) & 7); |
1736 | PRE_IO |
1737 | READ_LONG_F(adr, res) |
1738 | res ^= src; |
1739 | flag_C = 0; |
1740 | flag_V = 0; |
1741 | flag_NotZ = res; |
1742 | flag_N = res >> 24; |
1743 | WRITE_LONG_F(adr, res) |
1744 | POST_IO |
1745 | RET(28) |
1746 | } |
1747 | |
1748 | // EORI |
1749 | OPCODE(0x0A98) |
1750 | { |
1751 | u32 adr, res; |
1752 | u32 src, dst; |
1753 | |
1754 | FETCH_LONG(src); |
1755 | adr = AREG((Opcode >> 0) & 7); |
1756 | AREG((Opcode >> 0) & 7) += 4; |
1757 | PRE_IO |
1758 | READ_LONG_F(adr, res) |
1759 | res ^= src; |
1760 | flag_C = 0; |
1761 | flag_V = 0; |
1762 | flag_NotZ = res; |
1763 | flag_N = res >> 24; |
1764 | WRITE_LONG_F(adr, res) |
1765 | POST_IO |
1766 | RET(28) |
1767 | } |
1768 | |
1769 | // EORI |
1770 | OPCODE(0x0AA0) |
1771 | { |
1772 | u32 adr, res; |
1773 | u32 src, dst; |
1774 | |
1775 | FETCH_LONG(src); |
1776 | adr = AREG((Opcode >> 0) & 7) - 4; |
1777 | AREG((Opcode >> 0) & 7) = adr; |
1778 | PRE_IO |
1779 | READ_LONG_F(adr, res) |
1780 | res ^= src; |
1781 | flag_C = 0; |
1782 | flag_V = 0; |
1783 | flag_NotZ = res; |
1784 | flag_N = res >> 24; |
1785 | WRITE_LONG_F(adr, res) |
1786 | POST_IO |
1787 | RET(30) |
1788 | } |
1789 | |
1790 | // EORI |
1791 | OPCODE(0x0AA8) |
1792 | { |
1793 | u32 adr, res; |
1794 | u32 src, dst; |
1795 | |
1796 | FETCH_LONG(src); |
1797 | FETCH_SWORD(adr); |
1798 | adr += AREG((Opcode >> 0) & 7); |
1799 | PRE_IO |
1800 | READ_LONG_F(adr, res) |
1801 | res ^= src; |
1802 | flag_C = 0; |
1803 | flag_V = 0; |
1804 | flag_NotZ = res; |
1805 | flag_N = res >> 24; |
1806 | WRITE_LONG_F(adr, res) |
1807 | POST_IO |
1808 | RET(32) |
1809 | } |
1810 | |
1811 | // EORI |
1812 | OPCODE(0x0AB0) |
1813 | { |
1814 | u32 adr, res; |
1815 | u32 src, dst; |
1816 | |
1817 | FETCH_LONG(src); |
1818 | adr = AREG((Opcode >> 0) & 7); |
1819 | DECODE_EXT_WORD |
1820 | PRE_IO |
1821 | READ_LONG_F(adr, res) |
1822 | res ^= src; |
1823 | flag_C = 0; |
1824 | flag_V = 0; |
1825 | flag_NotZ = res; |
1826 | flag_N = res >> 24; |
1827 | WRITE_LONG_F(adr, res) |
1828 | POST_IO |
1829 | RET(34) |
1830 | } |
1831 | |
1832 | // EORI |
1833 | OPCODE(0x0AB8) |
1834 | { |
1835 | u32 adr, res; |
1836 | u32 src, dst; |
1837 | |
1838 | FETCH_LONG(src); |
1839 | FETCH_SWORD(adr); |
1840 | PRE_IO |
1841 | READ_LONG_F(adr, res) |
1842 | res ^= src; |
1843 | flag_C = 0; |
1844 | flag_V = 0; |
1845 | flag_NotZ = res; |
1846 | flag_N = res >> 24; |
1847 | WRITE_LONG_F(adr, res) |
1848 | POST_IO |
1849 | RET(32) |
1850 | } |
1851 | |
1852 | // EORI |
1853 | OPCODE(0x0AB9) |
1854 | { |
1855 | u32 adr, res; |
1856 | u32 src, dst; |
1857 | |
1858 | FETCH_LONG(src); |
1859 | FETCH_LONG(adr); |
1860 | PRE_IO |
1861 | READ_LONG_F(adr, res) |
1862 | res ^= src; |
1863 | flag_C = 0; |
1864 | flag_V = 0; |
1865 | flag_NotZ = res; |
1866 | flag_N = res >> 24; |
1867 | WRITE_LONG_F(adr, res) |
1868 | POST_IO |
1869 | RET(36) |
1870 | } |
1871 | |
1872 | // EORI |
1873 | OPCODE(0x0A9F) |
1874 | { |
1875 | u32 adr, res; |
1876 | u32 src, dst; |
1877 | |
1878 | FETCH_LONG(src); |
1879 | adr = AREG(7); |
1880 | AREG(7) += 4; |
1881 | PRE_IO |
1882 | READ_LONG_F(adr, res) |
1883 | res ^= src; |
1884 | flag_C = 0; |
1885 | flag_V = 0; |
1886 | flag_NotZ = res; |
1887 | flag_N = res >> 24; |
1888 | WRITE_LONG_F(adr, res) |
1889 | POST_IO |
1890 | RET(28) |
1891 | } |
1892 | |
1893 | // EORI |
1894 | OPCODE(0x0AA7) |
1895 | { |
1896 | u32 adr, res; |
1897 | u32 src, dst; |
1898 | |
1899 | FETCH_LONG(src); |
1900 | adr = AREG(7) - 4; |
1901 | AREG(7) = adr; |
1902 | PRE_IO |
1903 | READ_LONG_F(adr, res) |
1904 | res ^= src; |
1905 | flag_C = 0; |
1906 | flag_V = 0; |
1907 | flag_NotZ = res; |
1908 | flag_N = res >> 24; |
1909 | WRITE_LONG_F(adr, res) |
1910 | POST_IO |
1911 | RET(30) |
1912 | } |
1913 | |
1914 | // EORICCR |
1915 | OPCODE(0x0A3C) |
1916 | { |
1917 | u32 adr, res; |
1918 | u32 src, dst; |
1919 | |
1920 | FETCH_BYTE(res); |
1921 | res &= M68K_CCR_MASK; |
1922 | res ^= GET_CCR; |
1923 | SET_CCR(res) |
1924 | RET(20) |
1925 | } |
1926 | |
1927 | // EORISR |
1928 | OPCODE(0x0A7C) |
1929 | { |
1930 | u32 adr, res; |
1931 | u32 src, dst; |
1932 | |
1933 | if (flag_S) |
1934 | { |
1935 | FETCH_WORD(res); |
1936 | res &= M68K_SR_MASK; |
1937 | res ^= GET_SR; |
1938 | SET_SR(res) |
1939 | if (!flag_S) |
1940 | { |
1941 | res = AREG(7); |
1942 | AREG(7) = ASP; |
1943 | ASP = res; |
1944 | } |
1945 | CHECK_INT_TO_JUMP(20) |
1946 | } |
1947 | else |
1948 | { |
d0ae0cb4 |
1949 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
1950 | RET(0) |
70357ce5 |
1951 | } |
1952 | RET(20) |
1953 | } |
1954 | |
1955 | // SUBI |
1956 | OPCODE(0x0400) |
1957 | { |
1958 | u32 adr, res; |
1959 | u32 src, dst; |
1960 | |
1961 | FETCH_BYTE(src); |
1962 | dst = DREGu8((Opcode >> 0) & 7); |
1963 | res = dst - src; |
1964 | flag_N = flag_X = flag_C = res; |
1965 | flag_V = (src ^ dst) & (res ^ dst); |
1966 | flag_NotZ = res & 0xFF; |
1967 | DREGu8((Opcode >> 0) & 7) = res; |
1968 | RET(8) |
1969 | } |
1970 | |
1971 | // SUBI |
1972 | OPCODE(0x0410) |
1973 | { |
1974 | u32 adr, res; |
1975 | u32 src, dst; |
1976 | |
1977 | FETCH_BYTE(src); |
1978 | adr = AREG((Opcode >> 0) & 7); |
1979 | PRE_IO |
1980 | READ_BYTE_F(adr, dst) |
1981 | res = dst - src; |
1982 | flag_N = flag_X = flag_C = res; |
1983 | flag_V = (src ^ dst) & (res ^ dst); |
1984 | flag_NotZ = res & 0xFF; |
1985 | WRITE_BYTE_F(adr, res) |
1986 | POST_IO |
1987 | RET(16) |
1988 | } |
1989 | |
1990 | // SUBI |
1991 | OPCODE(0x0418) |
1992 | { |
1993 | u32 adr, res; |
1994 | u32 src, dst; |
1995 | |
1996 | FETCH_BYTE(src); |
1997 | adr = AREG((Opcode >> 0) & 7); |
1998 | AREG((Opcode >> 0) & 7) += 1; |
1999 | PRE_IO |
2000 | READ_BYTE_F(adr, dst) |
2001 | res = dst - src; |
2002 | flag_N = flag_X = flag_C = res; |
2003 | flag_V = (src ^ dst) & (res ^ dst); |
2004 | flag_NotZ = res & 0xFF; |
2005 | WRITE_BYTE_F(adr, res) |
2006 | POST_IO |
2007 | RET(16) |
2008 | } |
2009 | |
2010 | // SUBI |
2011 | OPCODE(0x0420) |
2012 | { |
2013 | u32 adr, res; |
2014 | u32 src, dst; |
2015 | |
2016 | FETCH_BYTE(src); |
2017 | adr = AREG((Opcode >> 0) & 7) - 1; |
2018 | AREG((Opcode >> 0) & 7) = adr; |
2019 | PRE_IO |
2020 | READ_BYTE_F(adr, dst) |
2021 | res = dst - src; |
2022 | flag_N = flag_X = flag_C = res; |
2023 | flag_V = (src ^ dst) & (res ^ dst); |
2024 | flag_NotZ = res & 0xFF; |
2025 | WRITE_BYTE_F(adr, res) |
2026 | POST_IO |
2027 | RET(18) |
2028 | } |
2029 | |
2030 | // SUBI |
2031 | OPCODE(0x0428) |
2032 | { |
2033 | u32 adr, res; |
2034 | u32 src, dst; |
2035 | |
2036 | FETCH_BYTE(src); |
2037 | FETCH_SWORD(adr); |
2038 | adr += AREG((Opcode >> 0) & 7); |
2039 | PRE_IO |
2040 | READ_BYTE_F(adr, dst) |
2041 | res = dst - src; |
2042 | flag_N = flag_X = flag_C = res; |
2043 | flag_V = (src ^ dst) & (res ^ dst); |
2044 | flag_NotZ = res & 0xFF; |
2045 | WRITE_BYTE_F(adr, res) |
2046 | POST_IO |
2047 | RET(20) |
2048 | } |
2049 | |
2050 | // SUBI |
2051 | OPCODE(0x0430) |
2052 | { |
2053 | u32 adr, res; |
2054 | u32 src, dst; |
2055 | |
2056 | FETCH_BYTE(src); |
2057 | adr = AREG((Opcode >> 0) & 7); |
2058 | DECODE_EXT_WORD |
2059 | PRE_IO |
2060 | READ_BYTE_F(adr, dst) |
2061 | res = dst - src; |
2062 | flag_N = flag_X = flag_C = res; |
2063 | flag_V = (src ^ dst) & (res ^ dst); |
2064 | flag_NotZ = res & 0xFF; |
2065 | WRITE_BYTE_F(adr, res) |
2066 | POST_IO |
2067 | RET(22) |
2068 | } |
2069 | |
2070 | // SUBI |
2071 | OPCODE(0x0438) |
2072 | { |
2073 | u32 adr, res; |
2074 | u32 src, dst; |
2075 | |
2076 | FETCH_BYTE(src); |
2077 | FETCH_SWORD(adr); |
2078 | PRE_IO |
2079 | READ_BYTE_F(adr, dst) |
2080 | res = dst - src; |
2081 | flag_N = flag_X = flag_C = res; |
2082 | flag_V = (src ^ dst) & (res ^ dst); |
2083 | flag_NotZ = res & 0xFF; |
2084 | WRITE_BYTE_F(adr, res) |
2085 | POST_IO |
2086 | RET(20) |
2087 | } |
2088 | |
2089 | // SUBI |
2090 | OPCODE(0x0439) |
2091 | { |
2092 | u32 adr, res; |
2093 | u32 src, dst; |
2094 | |
2095 | FETCH_BYTE(src); |
2096 | FETCH_LONG(adr); |
2097 | PRE_IO |
2098 | READ_BYTE_F(adr, dst) |
2099 | res = dst - src; |
2100 | flag_N = flag_X = flag_C = res; |
2101 | flag_V = (src ^ dst) & (res ^ dst); |
2102 | flag_NotZ = res & 0xFF; |
2103 | WRITE_BYTE_F(adr, res) |
2104 | POST_IO |
2105 | RET(24) |
2106 | } |
2107 | |
2108 | // SUBI |
2109 | OPCODE(0x041F) |
2110 | { |
2111 | u32 adr, res; |
2112 | u32 src, dst; |
2113 | |
2114 | FETCH_BYTE(src); |
2115 | adr = AREG(7); |
2116 | AREG(7) += 2; |
2117 | PRE_IO |
2118 | READ_BYTE_F(adr, dst) |
2119 | res = dst - src; |
2120 | flag_N = flag_X = flag_C = res; |
2121 | flag_V = (src ^ dst) & (res ^ dst); |
2122 | flag_NotZ = res & 0xFF; |
2123 | WRITE_BYTE_F(adr, res) |
2124 | POST_IO |
2125 | RET(16) |
2126 | } |
2127 | |
2128 | // SUBI |
2129 | OPCODE(0x0427) |
2130 | { |
2131 | u32 adr, res; |
2132 | u32 src, dst; |
2133 | |
2134 | FETCH_BYTE(src); |
2135 | adr = AREG(7) - 2; |
2136 | AREG(7) = adr; |
2137 | PRE_IO |
2138 | READ_BYTE_F(adr, dst) |
2139 | res = dst - src; |
2140 | flag_N = flag_X = flag_C = res; |
2141 | flag_V = (src ^ dst) & (res ^ dst); |
2142 | flag_NotZ = res & 0xFF; |
2143 | WRITE_BYTE_F(adr, res) |
2144 | POST_IO |
2145 | RET(18) |
2146 | } |
2147 | |
2148 | // SUBI |
2149 | OPCODE(0x0440) |
2150 | { |
2151 | u32 adr, res; |
2152 | u32 src, dst; |
2153 | |
2154 | FETCH_WORD(src); |
2155 | dst = DREGu16((Opcode >> 0) & 7); |
2156 | res = dst - src; |
2157 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2158 | flag_N = flag_X = flag_C = res >> 8; |
2159 | flag_NotZ = res & 0xFFFF; |
2160 | DREGu16((Opcode >> 0) & 7) = res; |
2161 | RET(8) |
2162 | } |
2163 | |
2164 | // SUBI |
2165 | OPCODE(0x0450) |
2166 | { |
2167 | u32 adr, res; |
2168 | u32 src, dst; |
2169 | |
2170 | FETCH_WORD(src); |
2171 | adr = AREG((Opcode >> 0) & 7); |
2172 | PRE_IO |
2173 | READ_WORD_F(adr, dst) |
2174 | res = dst - src; |
2175 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2176 | flag_N = flag_X = flag_C = res >> 8; |
2177 | flag_NotZ = res & 0xFFFF; |
2178 | WRITE_WORD_F(adr, res) |
2179 | POST_IO |
2180 | RET(16) |
2181 | } |
2182 | |
2183 | // SUBI |
2184 | OPCODE(0x0458) |
2185 | { |
2186 | u32 adr, res; |
2187 | u32 src, dst; |
2188 | |
2189 | FETCH_WORD(src); |
2190 | adr = AREG((Opcode >> 0) & 7); |
2191 | AREG((Opcode >> 0) & 7) += 2; |
2192 | PRE_IO |
2193 | READ_WORD_F(adr, dst) |
2194 | res = dst - src; |
2195 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2196 | flag_N = flag_X = flag_C = res >> 8; |
2197 | flag_NotZ = res & 0xFFFF; |
2198 | WRITE_WORD_F(adr, res) |
2199 | POST_IO |
2200 | RET(16) |
2201 | } |
2202 | |
2203 | // SUBI |
2204 | OPCODE(0x0460) |
2205 | { |
2206 | u32 adr, res; |
2207 | u32 src, dst; |
2208 | |
2209 | FETCH_WORD(src); |
2210 | adr = AREG((Opcode >> 0) & 7) - 2; |
2211 | AREG((Opcode >> 0) & 7) = adr; |
2212 | PRE_IO |
2213 | READ_WORD_F(adr, dst) |
2214 | res = dst - src; |
2215 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2216 | flag_N = flag_X = flag_C = res >> 8; |
2217 | flag_NotZ = res & 0xFFFF; |
2218 | WRITE_WORD_F(adr, res) |
2219 | POST_IO |
2220 | RET(18) |
2221 | } |
2222 | |
2223 | // SUBI |
2224 | OPCODE(0x0468) |
2225 | { |
2226 | u32 adr, res; |
2227 | u32 src, dst; |
2228 | |
2229 | FETCH_WORD(src); |
2230 | FETCH_SWORD(adr); |
2231 | adr += AREG((Opcode >> 0) & 7); |
2232 | PRE_IO |
2233 | READ_WORD_F(adr, dst) |
2234 | res = dst - src; |
2235 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2236 | flag_N = flag_X = flag_C = res >> 8; |
2237 | flag_NotZ = res & 0xFFFF; |
2238 | WRITE_WORD_F(adr, res) |
2239 | POST_IO |
2240 | RET(20) |
2241 | } |
2242 | |
2243 | // SUBI |
2244 | OPCODE(0x0470) |
2245 | { |
2246 | u32 adr, res; |
2247 | u32 src, dst; |
2248 | |
2249 | FETCH_WORD(src); |
2250 | adr = AREG((Opcode >> 0) & 7); |
2251 | DECODE_EXT_WORD |
2252 | PRE_IO |
2253 | READ_WORD_F(adr, dst) |
2254 | res = dst - src; |
2255 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2256 | flag_N = flag_X = flag_C = res >> 8; |
2257 | flag_NotZ = res & 0xFFFF; |
2258 | WRITE_WORD_F(adr, res) |
2259 | POST_IO |
2260 | RET(22) |
2261 | } |
2262 | |
2263 | // SUBI |
2264 | OPCODE(0x0478) |
2265 | { |
2266 | u32 adr, res; |
2267 | u32 src, dst; |
2268 | |
2269 | FETCH_WORD(src); |
2270 | FETCH_SWORD(adr); |
2271 | PRE_IO |
2272 | READ_WORD_F(adr, dst) |
2273 | res = dst - src; |
2274 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2275 | flag_N = flag_X = flag_C = res >> 8; |
2276 | flag_NotZ = res & 0xFFFF; |
2277 | WRITE_WORD_F(adr, res) |
2278 | POST_IO |
2279 | RET(20) |
2280 | } |
2281 | |
2282 | // SUBI |
2283 | OPCODE(0x0479) |
2284 | { |
2285 | u32 adr, res; |
2286 | u32 src, dst; |
2287 | |
2288 | FETCH_WORD(src); |
2289 | FETCH_LONG(adr); |
2290 | PRE_IO |
2291 | READ_WORD_F(adr, dst) |
2292 | res = dst - src; |
2293 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2294 | flag_N = flag_X = flag_C = res >> 8; |
2295 | flag_NotZ = res & 0xFFFF; |
2296 | WRITE_WORD_F(adr, res) |
2297 | POST_IO |
2298 | RET(24) |
2299 | } |
2300 | |
2301 | // SUBI |
2302 | OPCODE(0x045F) |
2303 | { |
2304 | u32 adr, res; |
2305 | u32 src, dst; |
2306 | |
2307 | FETCH_WORD(src); |
2308 | adr = AREG(7); |
2309 | AREG(7) += 2; |
2310 | PRE_IO |
2311 | READ_WORD_F(adr, dst) |
2312 | res = dst - src; |
2313 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2314 | flag_N = flag_X = flag_C = res >> 8; |
2315 | flag_NotZ = res & 0xFFFF; |
2316 | WRITE_WORD_F(adr, res) |
2317 | POST_IO |
2318 | RET(16) |
2319 | } |
2320 | |
2321 | // SUBI |
2322 | OPCODE(0x0467) |
2323 | { |
2324 | u32 adr, res; |
2325 | u32 src, dst; |
2326 | |
2327 | FETCH_WORD(src); |
2328 | adr = AREG(7) - 2; |
2329 | AREG(7) = adr; |
2330 | PRE_IO |
2331 | READ_WORD_F(adr, dst) |
2332 | res = dst - src; |
2333 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2334 | flag_N = flag_X = flag_C = res >> 8; |
2335 | flag_NotZ = res & 0xFFFF; |
2336 | WRITE_WORD_F(adr, res) |
2337 | POST_IO |
2338 | RET(18) |
2339 | } |
2340 | |
2341 | // SUBI |
2342 | OPCODE(0x0480) |
2343 | { |
2344 | u32 adr, res; |
2345 | u32 src, dst; |
2346 | |
2347 | FETCH_LONG(src); |
2348 | dst = DREGu32((Opcode >> 0) & 7); |
2349 | res = dst - src; |
2350 | flag_NotZ = res; |
2351 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2352 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2353 | flag_N = res >> 24; |
2354 | DREGu32((Opcode >> 0) & 7) = res; |
2355 | RET(16) |
2356 | } |
2357 | |
2358 | // SUBI |
2359 | OPCODE(0x0490) |
2360 | { |
2361 | u32 adr, res; |
2362 | u32 src, dst; |
2363 | |
2364 | FETCH_LONG(src); |
2365 | adr = AREG((Opcode >> 0) & 7); |
2366 | PRE_IO |
2367 | READ_LONG_F(adr, dst) |
2368 | res = dst - src; |
2369 | flag_NotZ = res; |
2370 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2371 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2372 | flag_N = res >> 24; |
2373 | WRITE_LONG_F(adr, res) |
2374 | POST_IO |
2375 | RET(28) |
2376 | } |
2377 | |
2378 | // SUBI |
2379 | OPCODE(0x0498) |
2380 | { |
2381 | u32 adr, res; |
2382 | u32 src, dst; |
2383 | |
2384 | FETCH_LONG(src); |
2385 | adr = AREG((Opcode >> 0) & 7); |
2386 | AREG((Opcode >> 0) & 7) += 4; |
2387 | PRE_IO |
2388 | READ_LONG_F(adr, dst) |
2389 | res = dst - src; |
2390 | flag_NotZ = res; |
2391 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2392 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2393 | flag_N = res >> 24; |
2394 | WRITE_LONG_F(adr, res) |
2395 | POST_IO |
2396 | RET(28) |
2397 | } |
2398 | |
2399 | // SUBI |
2400 | OPCODE(0x04A0) |
2401 | { |
2402 | u32 adr, res; |
2403 | u32 src, dst; |
2404 | |
2405 | FETCH_LONG(src); |
2406 | adr = AREG((Opcode >> 0) & 7) - 4; |
2407 | AREG((Opcode >> 0) & 7) = adr; |
2408 | PRE_IO |
2409 | READ_LONG_F(adr, dst) |
2410 | res = dst - src; |
2411 | flag_NotZ = res; |
2412 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2413 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2414 | flag_N = res >> 24; |
2415 | WRITE_LONG_F(adr, res) |
2416 | POST_IO |
2417 | RET(30) |
2418 | } |
2419 | |
2420 | // SUBI |
2421 | OPCODE(0x04A8) |
2422 | { |
2423 | u32 adr, res; |
2424 | u32 src, dst; |
2425 | |
2426 | FETCH_LONG(src); |
2427 | FETCH_SWORD(adr); |
2428 | adr += AREG((Opcode >> 0) & 7); |
2429 | PRE_IO |
2430 | READ_LONG_F(adr, dst) |
2431 | res = dst - src; |
2432 | flag_NotZ = res; |
2433 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2434 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2435 | flag_N = res >> 24; |
2436 | WRITE_LONG_F(adr, res) |
2437 | POST_IO |
2438 | RET(32) |
2439 | } |
2440 | |
2441 | // SUBI |
2442 | OPCODE(0x04B0) |
2443 | { |
2444 | u32 adr, res; |
2445 | u32 src, dst; |
2446 | |
2447 | FETCH_LONG(src); |
2448 | adr = AREG((Opcode >> 0) & 7); |
2449 | DECODE_EXT_WORD |
2450 | PRE_IO |
2451 | READ_LONG_F(adr, dst) |
2452 | res = dst - src; |
2453 | flag_NotZ = res; |
2454 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2455 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2456 | flag_N = res >> 24; |
2457 | WRITE_LONG_F(adr, res) |
2458 | POST_IO |
2459 | RET(34) |
2460 | } |
2461 | |
2462 | // SUBI |
2463 | OPCODE(0x04B8) |
2464 | { |
2465 | u32 adr, res; |
2466 | u32 src, dst; |
2467 | |
2468 | FETCH_LONG(src); |
2469 | FETCH_SWORD(adr); |
2470 | PRE_IO |
2471 | READ_LONG_F(adr, dst) |
2472 | res = dst - src; |
2473 | flag_NotZ = res; |
2474 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2475 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2476 | flag_N = res >> 24; |
2477 | WRITE_LONG_F(adr, res) |
2478 | POST_IO |
2479 | RET(32) |
2480 | } |
2481 | |
2482 | // SUBI |
2483 | OPCODE(0x04B9) |
2484 | { |
2485 | u32 adr, res; |
2486 | u32 src, dst; |
2487 | |
2488 | FETCH_LONG(src); |
2489 | FETCH_LONG(adr); |
2490 | PRE_IO |
2491 | READ_LONG_F(adr, dst) |
2492 | res = dst - src; |
2493 | flag_NotZ = res; |
2494 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2495 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2496 | flag_N = res >> 24; |
2497 | WRITE_LONG_F(adr, res) |
2498 | POST_IO |
2499 | RET(36) |
2500 | } |
2501 | |
2502 | // SUBI |
2503 | OPCODE(0x049F) |
2504 | { |
2505 | u32 adr, res; |
2506 | u32 src, dst; |
2507 | |
2508 | FETCH_LONG(src); |
2509 | adr = AREG(7); |
2510 | AREG(7) += 4; |
2511 | PRE_IO |
2512 | READ_LONG_F(adr, dst) |
2513 | res = dst - src; |
2514 | flag_NotZ = res; |
2515 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2516 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2517 | flag_N = res >> 24; |
2518 | WRITE_LONG_F(adr, res) |
2519 | POST_IO |
2520 | RET(28) |
2521 | } |
2522 | |
2523 | // SUBI |
2524 | OPCODE(0x04A7) |
2525 | { |
2526 | u32 adr, res; |
2527 | u32 src, dst; |
2528 | |
2529 | FETCH_LONG(src); |
2530 | adr = AREG(7) - 4; |
2531 | AREG(7) = adr; |
2532 | PRE_IO |
2533 | READ_LONG_F(adr, dst) |
2534 | res = dst - src; |
2535 | flag_NotZ = res; |
2536 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2537 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2538 | flag_N = res >> 24; |
2539 | WRITE_LONG_F(adr, res) |
2540 | POST_IO |
2541 | RET(30) |
2542 | } |
2543 | |
2544 | // ADDI |
2545 | OPCODE(0x0600) |
2546 | { |
2547 | u32 adr, res; |
2548 | u32 src, dst; |
2549 | |
2550 | FETCH_BYTE(src); |
2551 | dst = DREGu8((Opcode >> 0) & 7); |
2552 | res = dst + src; |
2553 | flag_N = flag_X = flag_C = res; |
2554 | flag_V = (src ^ res) & (dst ^ res); |
2555 | flag_NotZ = res & 0xFF; |
2556 | DREGu8((Opcode >> 0) & 7) = res; |
2557 | RET(8) |
2558 | } |
2559 | |
2560 | // ADDI |
2561 | OPCODE(0x0610) |
2562 | { |
2563 | u32 adr, res; |
2564 | u32 src, dst; |
2565 | |
2566 | FETCH_BYTE(src); |
2567 | adr = AREG((Opcode >> 0) & 7); |
2568 | PRE_IO |
2569 | READ_BYTE_F(adr, dst) |
2570 | res = dst + src; |
2571 | flag_N = flag_X = flag_C = res; |
2572 | flag_V = (src ^ res) & (dst ^ res); |
2573 | flag_NotZ = res & 0xFF; |
2574 | WRITE_BYTE_F(adr, res) |
2575 | POST_IO |
2576 | RET(16) |
2577 | } |
2578 | |
2579 | // ADDI |
2580 | OPCODE(0x0618) |
2581 | { |
2582 | u32 adr, res; |
2583 | u32 src, dst; |
2584 | |
2585 | FETCH_BYTE(src); |
2586 | adr = AREG((Opcode >> 0) & 7); |
2587 | AREG((Opcode >> 0) & 7) += 1; |
2588 | PRE_IO |
2589 | READ_BYTE_F(adr, dst) |
2590 | res = dst + src; |
2591 | flag_N = flag_X = flag_C = res; |
2592 | flag_V = (src ^ res) & (dst ^ res); |
2593 | flag_NotZ = res & 0xFF; |
2594 | WRITE_BYTE_F(adr, res) |
2595 | POST_IO |
2596 | RET(16) |
2597 | } |
2598 | |
2599 | // ADDI |
2600 | OPCODE(0x0620) |
2601 | { |
2602 | u32 adr, res; |
2603 | u32 src, dst; |
2604 | |
2605 | FETCH_BYTE(src); |
2606 | adr = AREG((Opcode >> 0) & 7) - 1; |
2607 | AREG((Opcode >> 0) & 7) = adr; |
2608 | PRE_IO |
2609 | READ_BYTE_F(adr, dst) |
2610 | res = dst + src; |
2611 | flag_N = flag_X = flag_C = res; |
2612 | flag_V = (src ^ res) & (dst ^ res); |
2613 | flag_NotZ = res & 0xFF; |
2614 | WRITE_BYTE_F(adr, res) |
2615 | POST_IO |
2616 | RET(18) |
2617 | } |
2618 | |
2619 | // ADDI |
2620 | OPCODE(0x0628) |
2621 | { |
2622 | u32 adr, res; |
2623 | u32 src, dst; |
2624 | |
2625 | FETCH_BYTE(src); |
2626 | FETCH_SWORD(adr); |
2627 | adr += AREG((Opcode >> 0) & 7); |
2628 | PRE_IO |
2629 | READ_BYTE_F(adr, dst) |
2630 | res = dst + src; |
2631 | flag_N = flag_X = flag_C = res; |
2632 | flag_V = (src ^ res) & (dst ^ res); |
2633 | flag_NotZ = res & 0xFF; |
2634 | WRITE_BYTE_F(adr, res) |
2635 | POST_IO |
2636 | RET(20) |
2637 | } |
2638 | |
2639 | // ADDI |
2640 | OPCODE(0x0630) |
2641 | { |
2642 | u32 adr, res; |
2643 | u32 src, dst; |
2644 | |
2645 | FETCH_BYTE(src); |
2646 | adr = AREG((Opcode >> 0) & 7); |
2647 | DECODE_EXT_WORD |
2648 | PRE_IO |
2649 | READ_BYTE_F(adr, dst) |
2650 | res = dst + src; |
2651 | flag_N = flag_X = flag_C = res; |
2652 | flag_V = (src ^ res) & (dst ^ res); |
2653 | flag_NotZ = res & 0xFF; |
2654 | WRITE_BYTE_F(adr, res) |
2655 | POST_IO |
2656 | RET(22) |
2657 | } |
2658 | |
2659 | // ADDI |
2660 | OPCODE(0x0638) |
2661 | { |
2662 | u32 adr, res; |
2663 | u32 src, dst; |
2664 | |
2665 | FETCH_BYTE(src); |
2666 | FETCH_SWORD(adr); |
2667 | PRE_IO |
2668 | READ_BYTE_F(adr, dst) |
2669 | res = dst + src; |
2670 | flag_N = flag_X = flag_C = res; |
2671 | flag_V = (src ^ res) & (dst ^ res); |
2672 | flag_NotZ = res & 0xFF; |
2673 | WRITE_BYTE_F(adr, res) |
2674 | POST_IO |
2675 | RET(20) |
2676 | } |
2677 | |
2678 | // ADDI |
2679 | OPCODE(0x0639) |
2680 | { |
2681 | u32 adr, res; |
2682 | u32 src, dst; |
2683 | |
2684 | FETCH_BYTE(src); |
2685 | FETCH_LONG(adr); |
2686 | PRE_IO |
2687 | READ_BYTE_F(adr, dst) |
2688 | res = dst + src; |
2689 | flag_N = flag_X = flag_C = res; |
2690 | flag_V = (src ^ res) & (dst ^ res); |
2691 | flag_NotZ = res & 0xFF; |
2692 | WRITE_BYTE_F(adr, res) |
2693 | POST_IO |
2694 | RET(24) |
2695 | } |
2696 | |
2697 | // ADDI |
2698 | OPCODE(0x061F) |
2699 | { |
2700 | u32 adr, res; |
2701 | u32 src, dst; |
2702 | |
2703 | FETCH_BYTE(src); |
2704 | adr = AREG(7); |
2705 | AREG(7) += 2; |
2706 | PRE_IO |
2707 | READ_BYTE_F(adr, dst) |
2708 | res = dst + src; |
2709 | flag_N = flag_X = flag_C = res; |
2710 | flag_V = (src ^ res) & (dst ^ res); |
2711 | flag_NotZ = res & 0xFF; |
2712 | WRITE_BYTE_F(adr, res) |
2713 | POST_IO |
2714 | RET(16) |
2715 | } |
2716 | |
2717 | // ADDI |
2718 | OPCODE(0x0627) |
2719 | { |
2720 | u32 adr, res; |
2721 | u32 src, dst; |
2722 | |
2723 | FETCH_BYTE(src); |
2724 | adr = AREG(7) - 2; |
2725 | AREG(7) = adr; |
2726 | PRE_IO |
2727 | READ_BYTE_F(adr, dst) |
2728 | res = dst + src; |
2729 | flag_N = flag_X = flag_C = res; |
2730 | flag_V = (src ^ res) & (dst ^ res); |
2731 | flag_NotZ = res & 0xFF; |
2732 | WRITE_BYTE_F(adr, res) |
2733 | POST_IO |
2734 | RET(18) |
2735 | } |
2736 | |
2737 | // ADDI |
2738 | OPCODE(0x0640) |
2739 | { |
2740 | u32 adr, res; |
2741 | u32 src, dst; |
2742 | |
2743 | FETCH_WORD(src); |
2744 | dst = DREGu16((Opcode >> 0) & 7); |
2745 | res = dst + src; |
2746 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2747 | flag_N = flag_X = flag_C = res >> 8; |
2748 | flag_NotZ = res & 0xFFFF; |
2749 | DREGu16((Opcode >> 0) & 7) = res; |
2750 | RET(8) |
2751 | } |
2752 | |
2753 | // ADDI |
2754 | OPCODE(0x0650) |
2755 | { |
2756 | u32 adr, res; |
2757 | u32 src, dst; |
2758 | |
2759 | FETCH_WORD(src); |
2760 | adr = AREG((Opcode >> 0) & 7); |
2761 | PRE_IO |
2762 | READ_WORD_F(adr, dst) |
2763 | res = dst + src; |
2764 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2765 | flag_N = flag_X = flag_C = res >> 8; |
2766 | flag_NotZ = res & 0xFFFF; |
2767 | WRITE_WORD_F(adr, res) |
2768 | POST_IO |
2769 | RET(16) |
2770 | } |
2771 | |
2772 | // ADDI |
2773 | OPCODE(0x0658) |
2774 | { |
2775 | u32 adr, res; |
2776 | u32 src, dst; |
2777 | |
2778 | FETCH_WORD(src); |
2779 | adr = AREG((Opcode >> 0) & 7); |
2780 | AREG((Opcode >> 0) & 7) += 2; |
2781 | PRE_IO |
2782 | READ_WORD_F(adr, dst) |
2783 | res = dst + src; |
2784 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2785 | flag_N = flag_X = flag_C = res >> 8; |
2786 | flag_NotZ = res & 0xFFFF; |
2787 | WRITE_WORD_F(adr, res) |
2788 | POST_IO |
2789 | RET(16) |
2790 | } |
2791 | |
2792 | // ADDI |
2793 | OPCODE(0x0660) |
2794 | { |
2795 | u32 adr, res; |
2796 | u32 src, dst; |
2797 | |
2798 | FETCH_WORD(src); |
2799 | adr = AREG((Opcode >> 0) & 7) - 2; |
2800 | AREG((Opcode >> 0) & 7) = adr; |
2801 | PRE_IO |
2802 | READ_WORD_F(adr, dst) |
2803 | res = dst + src; |
2804 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2805 | flag_N = flag_X = flag_C = res >> 8; |
2806 | flag_NotZ = res & 0xFFFF; |
2807 | WRITE_WORD_F(adr, res) |
2808 | POST_IO |
2809 | RET(18) |
2810 | } |
2811 | |
2812 | // ADDI |
2813 | OPCODE(0x0668) |
2814 | { |
2815 | u32 adr, res; |
2816 | u32 src, dst; |
2817 | |
2818 | FETCH_WORD(src); |
2819 | FETCH_SWORD(adr); |
2820 | adr += AREG((Opcode >> 0) & 7); |
2821 | PRE_IO |
2822 | READ_WORD_F(adr, dst) |
2823 | res = dst + src; |
2824 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2825 | flag_N = flag_X = flag_C = res >> 8; |
2826 | flag_NotZ = res & 0xFFFF; |
2827 | WRITE_WORD_F(adr, res) |
2828 | POST_IO |
2829 | RET(20) |
2830 | } |
2831 | |
2832 | // ADDI |
2833 | OPCODE(0x0670) |
2834 | { |
2835 | u32 adr, res; |
2836 | u32 src, dst; |
2837 | |
2838 | FETCH_WORD(src); |
2839 | adr = AREG((Opcode >> 0) & 7); |
2840 | DECODE_EXT_WORD |
2841 | PRE_IO |
2842 | READ_WORD_F(adr, dst) |
2843 | res = dst + src; |
2844 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2845 | flag_N = flag_X = flag_C = res >> 8; |
2846 | flag_NotZ = res & 0xFFFF; |
2847 | WRITE_WORD_F(adr, res) |
2848 | POST_IO |
2849 | RET(22) |
2850 | } |
2851 | |
2852 | // ADDI |
2853 | OPCODE(0x0678) |
2854 | { |
2855 | u32 adr, res; |
2856 | u32 src, dst; |
2857 | |
2858 | FETCH_WORD(src); |
2859 | FETCH_SWORD(adr); |
2860 | PRE_IO |
2861 | READ_WORD_F(adr, dst) |
2862 | res = dst + src; |
2863 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2864 | flag_N = flag_X = flag_C = res >> 8; |
2865 | flag_NotZ = res & 0xFFFF; |
2866 | WRITE_WORD_F(adr, res) |
2867 | POST_IO |
2868 | RET(20) |
2869 | } |
2870 | |
2871 | // ADDI |
2872 | OPCODE(0x0679) |
2873 | { |
2874 | u32 adr, res; |
2875 | u32 src, dst; |
2876 | |
2877 | FETCH_WORD(src); |
2878 | FETCH_LONG(adr); |
2879 | PRE_IO |
2880 | READ_WORD_F(adr, dst) |
2881 | res = dst + src; |
2882 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2883 | flag_N = flag_X = flag_C = res >> 8; |
2884 | flag_NotZ = res & 0xFFFF; |
2885 | WRITE_WORD_F(adr, res) |
2886 | POST_IO |
2887 | RET(24) |
2888 | } |
2889 | |
2890 | // ADDI |
2891 | OPCODE(0x065F) |
2892 | { |
2893 | u32 adr, res; |
2894 | u32 src, dst; |
2895 | |
2896 | FETCH_WORD(src); |
2897 | adr = AREG(7); |
2898 | AREG(7) += 2; |
2899 | PRE_IO |
2900 | READ_WORD_F(adr, dst) |
2901 | res = dst + src; |
2902 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2903 | flag_N = flag_X = flag_C = res >> 8; |
2904 | flag_NotZ = res & 0xFFFF; |
2905 | WRITE_WORD_F(adr, res) |
2906 | POST_IO |
2907 | RET(16) |
2908 | } |
2909 | |
2910 | // ADDI |
2911 | OPCODE(0x0667) |
2912 | { |
2913 | u32 adr, res; |
2914 | u32 src, dst; |
2915 | |
2916 | FETCH_WORD(src); |
2917 | adr = AREG(7) - 2; |
2918 | AREG(7) = adr; |
2919 | PRE_IO |
2920 | READ_WORD_F(adr, dst) |
2921 | res = dst + src; |
2922 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2923 | flag_N = flag_X = flag_C = res >> 8; |
2924 | flag_NotZ = res & 0xFFFF; |
2925 | WRITE_WORD_F(adr, res) |
2926 | POST_IO |
2927 | RET(18) |
2928 | } |
2929 | |
2930 | // ADDI |
2931 | OPCODE(0x0680) |
2932 | { |
2933 | u32 adr, res; |
2934 | u32 src, dst; |
2935 | |
2936 | FETCH_LONG(src); |
2937 | dst = DREGu32((Opcode >> 0) & 7); |
2938 | res = dst + src; |
2939 | flag_NotZ = res; |
2940 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2941 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2942 | flag_N = res >> 24; |
2943 | DREGu32((Opcode >> 0) & 7) = res; |
2944 | RET(16) |
2945 | } |
2946 | |
2947 | // ADDI |
2948 | OPCODE(0x0690) |
2949 | { |
2950 | u32 adr, res; |
2951 | u32 src, dst; |
2952 | |
2953 | FETCH_LONG(src); |
2954 | adr = AREG((Opcode >> 0) & 7); |
2955 | PRE_IO |
2956 | READ_LONG_F(adr, dst) |
2957 | res = dst + src; |
2958 | flag_NotZ = res; |
2959 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2960 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2961 | flag_N = res >> 24; |
2962 | WRITE_LONG_F(adr, res) |
2963 | POST_IO |
2964 | RET(28) |
2965 | } |
2966 | |
2967 | // ADDI |
2968 | OPCODE(0x0698) |
2969 | { |
2970 | u32 adr, res; |
2971 | u32 src, dst; |
2972 | |
2973 | FETCH_LONG(src); |
2974 | adr = AREG((Opcode >> 0) & 7); |
2975 | AREG((Opcode >> 0) & 7) += 4; |
2976 | PRE_IO |
2977 | READ_LONG_F(adr, dst) |
2978 | res = dst + src; |
2979 | flag_NotZ = res; |
2980 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2981 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2982 | flag_N = res >> 24; |
2983 | WRITE_LONG_F(adr, res) |
2984 | POST_IO |
2985 | RET(28) |
2986 | } |
2987 | |
2988 | // ADDI |
2989 | OPCODE(0x06A0) |
2990 | { |
2991 | u32 adr, res; |
2992 | u32 src, dst; |
2993 | |
2994 | FETCH_LONG(src); |
2995 | adr = AREG((Opcode >> 0) & 7) - 4; |
2996 | AREG((Opcode >> 0) & 7) = adr; |
2997 | PRE_IO |
2998 | READ_LONG_F(adr, dst) |
2999 | res = dst + src; |
3000 | flag_NotZ = res; |
3001 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3002 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3003 | flag_N = res >> 24; |
3004 | WRITE_LONG_F(adr, res) |
3005 | POST_IO |
3006 | RET(30) |
3007 | } |
3008 | |
3009 | // ADDI |
3010 | OPCODE(0x06A8) |
3011 | { |
3012 | u32 adr, res; |
3013 | u32 src, dst; |
3014 | |
3015 | FETCH_LONG(src); |
3016 | FETCH_SWORD(adr); |
3017 | adr += AREG((Opcode >> 0) & 7); |
3018 | PRE_IO |
3019 | READ_LONG_F(adr, dst) |
3020 | res = dst + src; |
3021 | flag_NotZ = res; |
3022 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3023 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3024 | flag_N = res >> 24; |
3025 | WRITE_LONG_F(adr, res) |
3026 | POST_IO |
3027 | RET(32) |
3028 | } |
3029 | |
3030 | // ADDI |
3031 | OPCODE(0x06B0) |
3032 | { |
3033 | u32 adr, res; |
3034 | u32 src, dst; |
3035 | |
3036 | FETCH_LONG(src); |
3037 | adr = AREG((Opcode >> 0) & 7); |
3038 | DECODE_EXT_WORD |
3039 | PRE_IO |
3040 | READ_LONG_F(adr, dst) |
3041 | res = dst + src; |
3042 | flag_NotZ = res; |
3043 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3044 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3045 | flag_N = res >> 24; |
3046 | WRITE_LONG_F(adr, res) |
3047 | POST_IO |
3048 | RET(34) |
3049 | } |
3050 | |
3051 | // ADDI |
3052 | OPCODE(0x06B8) |
3053 | { |
3054 | u32 adr, res; |
3055 | u32 src, dst; |
3056 | |
3057 | FETCH_LONG(src); |
3058 | FETCH_SWORD(adr); |
3059 | PRE_IO |
3060 | READ_LONG_F(adr, dst) |
3061 | res = dst + src; |
3062 | flag_NotZ = res; |
3063 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3064 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3065 | flag_N = res >> 24; |
3066 | WRITE_LONG_F(adr, res) |
3067 | POST_IO |
3068 | RET(32) |
3069 | } |
3070 | |
3071 | // ADDI |
3072 | OPCODE(0x06B9) |
3073 | { |
3074 | u32 adr, res; |
3075 | u32 src, dst; |
3076 | |
3077 | FETCH_LONG(src); |
3078 | FETCH_LONG(adr); |
3079 | PRE_IO |
3080 | READ_LONG_F(adr, dst) |
3081 | res = dst + src; |
3082 | flag_NotZ = res; |
3083 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3084 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3085 | flag_N = res >> 24; |
3086 | WRITE_LONG_F(adr, res) |
3087 | POST_IO |
3088 | RET(36) |
3089 | } |
3090 | |
3091 | // ADDI |
3092 | OPCODE(0x069F) |
3093 | { |
3094 | u32 adr, res; |
3095 | u32 src, dst; |
3096 | |
3097 | FETCH_LONG(src); |
3098 | adr = AREG(7); |
3099 | AREG(7) += 4; |
3100 | PRE_IO |
3101 | READ_LONG_F(adr, dst) |
3102 | res = dst + src; |
3103 | flag_NotZ = res; |
3104 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3105 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3106 | flag_N = res >> 24; |
3107 | WRITE_LONG_F(adr, res) |
3108 | POST_IO |
3109 | RET(28) |
3110 | } |
3111 | |
3112 | // ADDI |
3113 | OPCODE(0x06A7) |
3114 | { |
3115 | u32 adr, res; |
3116 | u32 src, dst; |
3117 | |
3118 | FETCH_LONG(src); |
3119 | adr = AREG(7) - 4; |
3120 | AREG(7) = adr; |
3121 | PRE_IO |
3122 | READ_LONG_F(adr, dst) |
3123 | res = dst + src; |
3124 | flag_NotZ = res; |
3125 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3126 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3127 | flag_N = res >> 24; |
3128 | WRITE_LONG_F(adr, res) |
3129 | POST_IO |
3130 | RET(30) |
3131 | } |
3132 | |
3133 | // CMPI |
3134 | OPCODE(0x0C00) |
3135 | { |
3136 | u32 adr, res; |
3137 | u32 src, dst; |
3138 | |
3139 | FETCH_BYTE(src); |
3140 | dst = DREGu8((Opcode >> 0) & 7); |
3141 | res = dst - src; |
3142 | flag_N = flag_C = res; |
3143 | flag_V = (src ^ dst) & (res ^ dst); |
3144 | flag_NotZ = res & 0xFF; |
3145 | RET(8) |
3146 | } |
3147 | |
3148 | // CMPI |
3149 | OPCODE(0x0C10) |
3150 | { |
3151 | u32 adr, res; |
3152 | u32 src, dst; |
3153 | |
3154 | FETCH_BYTE(src); |
3155 | adr = AREG((Opcode >> 0) & 7); |
3156 | PRE_IO |
3157 | READ_BYTE_F(adr, dst) |
3158 | res = dst - src; |
3159 | flag_N = flag_C = res; |
3160 | flag_V = (src ^ dst) & (res ^ dst); |
3161 | flag_NotZ = res & 0xFF; |
3162 | POST_IO |
3163 | RET(12) |
3164 | } |
3165 | |
3166 | // CMPI |
3167 | OPCODE(0x0C18) |
3168 | { |
3169 | u32 adr, res; |
3170 | u32 src, dst; |
3171 | |
3172 | FETCH_BYTE(src); |
3173 | adr = AREG((Opcode >> 0) & 7); |
3174 | AREG((Opcode >> 0) & 7) += 1; |
3175 | PRE_IO |
3176 | READ_BYTE_F(adr, dst) |
3177 | res = dst - src; |
3178 | flag_N = flag_C = res; |
3179 | flag_V = (src ^ dst) & (res ^ dst); |
3180 | flag_NotZ = res & 0xFF; |
3181 | POST_IO |
3182 | RET(12) |
3183 | } |
3184 | |
3185 | // CMPI |
3186 | OPCODE(0x0C20) |
3187 | { |
3188 | u32 adr, res; |
3189 | u32 src, dst; |
3190 | |
3191 | FETCH_BYTE(src); |
3192 | adr = AREG((Opcode >> 0) & 7) - 1; |
3193 | AREG((Opcode >> 0) & 7) = adr; |
3194 | PRE_IO |
3195 | READ_BYTE_F(adr, dst) |
3196 | res = dst - src; |
3197 | flag_N = flag_C = res; |
3198 | flag_V = (src ^ dst) & (res ^ dst); |
3199 | flag_NotZ = res & 0xFF; |
3200 | POST_IO |
3201 | RET(14) |
3202 | } |
3203 | |
3204 | // CMPI |
3205 | OPCODE(0x0C28) |
3206 | { |
3207 | u32 adr, res; |
3208 | u32 src, dst; |
3209 | |
3210 | FETCH_BYTE(src); |
3211 | FETCH_SWORD(adr); |
3212 | adr += AREG((Opcode >> 0) & 7); |
3213 | PRE_IO |
3214 | READ_BYTE_F(adr, dst) |
3215 | res = dst - src; |
3216 | flag_N = flag_C = res; |
3217 | flag_V = (src ^ dst) & (res ^ dst); |
3218 | flag_NotZ = res & 0xFF; |
3219 | POST_IO |
3220 | RET(16) |
3221 | } |
3222 | |
3223 | // CMPI |
3224 | OPCODE(0x0C30) |
3225 | { |
3226 | u32 adr, res; |
3227 | u32 src, dst; |
3228 | |
3229 | FETCH_BYTE(src); |
3230 | adr = AREG((Opcode >> 0) & 7); |
3231 | DECODE_EXT_WORD |
3232 | PRE_IO |
3233 | READ_BYTE_F(adr, dst) |
3234 | res = dst - src; |
3235 | flag_N = flag_C = res; |
3236 | flag_V = (src ^ dst) & (res ^ dst); |
3237 | flag_NotZ = res & 0xFF; |
3238 | POST_IO |
3239 | RET(18) |
3240 | } |
3241 | |
3242 | // CMPI |
3243 | OPCODE(0x0C38) |
3244 | { |
3245 | u32 adr, res; |
3246 | u32 src, dst; |
3247 | |
3248 | FETCH_BYTE(src); |
3249 | FETCH_SWORD(adr); |
3250 | PRE_IO |
3251 | READ_BYTE_F(adr, dst) |
3252 | res = dst - src; |
3253 | flag_N = flag_C = res; |
3254 | flag_V = (src ^ dst) & (res ^ dst); |
3255 | flag_NotZ = res & 0xFF; |
3256 | POST_IO |
3257 | RET(16) |
3258 | } |
3259 | |
3260 | // CMPI |
3261 | OPCODE(0x0C39) |
3262 | { |
3263 | u32 adr, res; |
3264 | u32 src, dst; |
3265 | |
3266 | FETCH_BYTE(src); |
3267 | FETCH_LONG(adr); |
3268 | PRE_IO |
3269 | READ_BYTE_F(adr, dst) |
3270 | res = dst - src; |
3271 | flag_N = flag_C = res; |
3272 | flag_V = (src ^ dst) & (res ^ dst); |
3273 | flag_NotZ = res & 0xFF; |
3274 | POST_IO |
3275 | RET(20) |
3276 | } |
3277 | |
3278 | // CMPI |
3279 | OPCODE(0x0C1F) |
3280 | { |
3281 | u32 adr, res; |
3282 | u32 src, dst; |
3283 | |
3284 | FETCH_BYTE(src); |
3285 | adr = AREG(7); |
3286 | AREG(7) += 2; |
3287 | PRE_IO |
3288 | READ_BYTE_F(adr, dst) |
3289 | res = dst - src; |
3290 | flag_N = flag_C = res; |
3291 | flag_V = (src ^ dst) & (res ^ dst); |
3292 | flag_NotZ = res & 0xFF; |
3293 | POST_IO |
3294 | RET(12) |
3295 | } |
3296 | |
3297 | // CMPI |
3298 | OPCODE(0x0C27) |
3299 | { |
3300 | u32 adr, res; |
3301 | u32 src, dst; |
3302 | |
3303 | FETCH_BYTE(src); |
3304 | adr = AREG(7) - 2; |
3305 | AREG(7) = adr; |
3306 | PRE_IO |
3307 | READ_BYTE_F(adr, dst) |
3308 | res = dst - src; |
3309 | flag_N = flag_C = res; |
3310 | flag_V = (src ^ dst) & (res ^ dst); |
3311 | flag_NotZ = res & 0xFF; |
3312 | POST_IO |
3313 | RET(14) |
3314 | } |
3315 | |
3316 | // CMPI |
3317 | OPCODE(0x0C40) |
3318 | { |
3319 | u32 adr, res; |
3320 | u32 src, dst; |
3321 | |
3322 | FETCH_WORD(src); |
3323 | dst = DREGu16((Opcode >> 0) & 7); |
3324 | res = dst - src; |
3325 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3326 | flag_N = flag_C = res >> 8; |
3327 | flag_NotZ = res & 0xFFFF; |
3328 | RET(8) |
3329 | } |
3330 | |
3331 | // CMPI |
3332 | OPCODE(0x0C50) |
3333 | { |
3334 | u32 adr, res; |
3335 | u32 src, dst; |
3336 | |
3337 | FETCH_WORD(src); |
3338 | adr = AREG((Opcode >> 0) & 7); |
3339 | PRE_IO |
3340 | READ_WORD_F(adr, dst) |
3341 | res = dst - src; |
3342 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3343 | flag_N = flag_C = res >> 8; |
3344 | flag_NotZ = res & 0xFFFF; |
3345 | POST_IO |
3346 | RET(12) |
3347 | } |
3348 | |
3349 | // CMPI |
3350 | OPCODE(0x0C58) |
3351 | { |
3352 | u32 adr, res; |
3353 | u32 src, dst; |
3354 | |
3355 | FETCH_WORD(src); |
3356 | adr = AREG((Opcode >> 0) & 7); |
3357 | AREG((Opcode >> 0) & 7) += 2; |
3358 | PRE_IO |
3359 | READ_WORD_F(adr, dst) |
3360 | res = dst - src; |
3361 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3362 | flag_N = flag_C = res >> 8; |
3363 | flag_NotZ = res & 0xFFFF; |
3364 | POST_IO |
3365 | RET(12) |
3366 | } |
3367 | |
3368 | // CMPI |
3369 | OPCODE(0x0C60) |
3370 | { |
3371 | u32 adr, res; |
3372 | u32 src, dst; |
3373 | |
3374 | FETCH_WORD(src); |
3375 | adr = AREG((Opcode >> 0) & 7) - 2; |
3376 | AREG((Opcode >> 0) & 7) = adr; |
3377 | PRE_IO |
3378 | READ_WORD_F(adr, dst) |
3379 | res = dst - src; |
3380 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3381 | flag_N = flag_C = res >> 8; |
3382 | flag_NotZ = res & 0xFFFF; |
3383 | POST_IO |
3384 | RET(14) |
3385 | } |
3386 | |
3387 | // CMPI |
3388 | OPCODE(0x0C68) |
3389 | { |
3390 | u32 adr, res; |
3391 | u32 src, dst; |
3392 | |
3393 | FETCH_WORD(src); |
3394 | FETCH_SWORD(adr); |
3395 | adr += AREG((Opcode >> 0) & 7); |
3396 | PRE_IO |
3397 | READ_WORD_F(adr, dst) |
3398 | res = dst - src; |
3399 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3400 | flag_N = flag_C = res >> 8; |
3401 | flag_NotZ = res & 0xFFFF; |
3402 | POST_IO |
3403 | RET(16) |
3404 | } |
3405 | |
3406 | // CMPI |
3407 | OPCODE(0x0C70) |
3408 | { |
3409 | u32 adr, res; |
3410 | u32 src, dst; |
3411 | |
3412 | FETCH_WORD(src); |
3413 | adr = AREG((Opcode >> 0) & 7); |
3414 | DECODE_EXT_WORD |
3415 | PRE_IO |
3416 | READ_WORD_F(adr, dst) |
3417 | res = dst - src; |
3418 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3419 | flag_N = flag_C = res >> 8; |
3420 | flag_NotZ = res & 0xFFFF; |
3421 | POST_IO |
3422 | RET(18) |
3423 | } |
3424 | |
3425 | // CMPI |
3426 | OPCODE(0x0C78) |
3427 | { |
3428 | u32 adr, res; |
3429 | u32 src, dst; |
3430 | |
3431 | FETCH_WORD(src); |
3432 | FETCH_SWORD(adr); |
3433 | PRE_IO |
3434 | READ_WORD_F(adr, dst) |
3435 | res = dst - src; |
3436 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3437 | flag_N = flag_C = res >> 8; |
3438 | flag_NotZ = res & 0xFFFF; |
3439 | POST_IO |
3440 | RET(16) |
3441 | } |
3442 | |
3443 | // CMPI |
3444 | OPCODE(0x0C79) |
3445 | { |
3446 | u32 adr, res; |
3447 | u32 src, dst; |
3448 | |
3449 | FETCH_WORD(src); |
3450 | FETCH_LONG(adr); |
3451 | PRE_IO |
3452 | READ_WORD_F(adr, dst) |
3453 | res = dst - src; |
3454 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3455 | flag_N = flag_C = res >> 8; |
3456 | flag_NotZ = res & 0xFFFF; |
3457 | POST_IO |
3458 | RET(20) |
3459 | } |
3460 | |
3461 | // CMPI |
3462 | OPCODE(0x0C5F) |
3463 | { |
3464 | u32 adr, res; |
3465 | u32 src, dst; |
3466 | |
3467 | FETCH_WORD(src); |
3468 | adr = AREG(7); |
3469 | AREG(7) += 2; |
3470 | PRE_IO |
3471 | READ_WORD_F(adr, dst) |
3472 | res = dst - src; |
3473 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3474 | flag_N = flag_C = res >> 8; |
3475 | flag_NotZ = res & 0xFFFF; |
3476 | POST_IO |
3477 | RET(12) |
3478 | } |
3479 | |
3480 | // CMPI |
3481 | OPCODE(0x0C67) |
3482 | { |
3483 | u32 adr, res; |
3484 | u32 src, dst; |
3485 | |
3486 | FETCH_WORD(src); |
3487 | adr = AREG(7) - 2; |
3488 | AREG(7) = adr; |
3489 | PRE_IO |
3490 | READ_WORD_F(adr, dst) |
3491 | res = dst - src; |
3492 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3493 | flag_N = flag_C = res >> 8; |
3494 | flag_NotZ = res & 0xFFFF; |
3495 | POST_IO |
3496 | RET(14) |
3497 | } |
3498 | |
3499 | // CMPI |
3500 | OPCODE(0x0C80) |
3501 | { |
3502 | u32 adr, res; |
3503 | u32 src, dst; |
3504 | |
3505 | FETCH_LONG(src); |
3506 | dst = DREGu32((Opcode >> 0) & 7); |
3507 | res = dst - src; |
3508 | flag_NotZ = res; |
3509 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3510 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3511 | flag_N = res >> 24; |
3512 | RET(14) |
3513 | } |
3514 | |
3515 | // CMPI |
3516 | OPCODE(0x0C90) |
3517 | { |
3518 | u32 adr, res; |
3519 | u32 src, dst; |
3520 | |
3521 | FETCH_LONG(src); |
3522 | adr = AREG((Opcode >> 0) & 7); |
3523 | PRE_IO |
3524 | READ_LONG_F(adr, dst) |
3525 | res = dst - src; |
3526 | flag_NotZ = res; |
3527 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3528 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3529 | flag_N = res >> 24; |
3530 | POST_IO |
3531 | RET(20) |
3532 | } |
3533 | |
3534 | // CMPI |
3535 | OPCODE(0x0C98) |
3536 | { |
3537 | u32 adr, res; |
3538 | u32 src, dst; |
3539 | |
3540 | FETCH_LONG(src); |
3541 | adr = AREG((Opcode >> 0) & 7); |
3542 | AREG((Opcode >> 0) & 7) += 4; |
3543 | PRE_IO |
3544 | READ_LONG_F(adr, dst) |
3545 | res = dst - src; |
3546 | flag_NotZ = res; |
3547 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3548 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3549 | flag_N = res >> 24; |
3550 | POST_IO |
3551 | RET(20) |
3552 | } |
3553 | |
3554 | // CMPI |
3555 | OPCODE(0x0CA0) |
3556 | { |
3557 | u32 adr, res; |
3558 | u32 src, dst; |
3559 | |
3560 | FETCH_LONG(src); |
3561 | adr = AREG((Opcode >> 0) & 7) - 4; |
3562 | AREG((Opcode >> 0) & 7) = adr; |
3563 | PRE_IO |
3564 | READ_LONG_F(adr, dst) |
3565 | res = dst - src; |
3566 | flag_NotZ = res; |
3567 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3568 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3569 | flag_N = res >> 24; |
3570 | POST_IO |
3571 | RET(22) |
3572 | } |
3573 | |
3574 | // CMPI |
3575 | OPCODE(0x0CA8) |
3576 | { |
3577 | u32 adr, res; |
3578 | u32 src, dst; |
3579 | |
3580 | FETCH_LONG(src); |
3581 | FETCH_SWORD(adr); |
3582 | adr += AREG((Opcode >> 0) & 7); |
3583 | PRE_IO |
3584 | READ_LONG_F(adr, dst) |
3585 | res = dst - src; |
3586 | flag_NotZ = res; |
3587 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3588 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3589 | flag_N = res >> 24; |
3590 | POST_IO |
3591 | RET(24) |
3592 | } |
3593 | |
3594 | // CMPI |
3595 | OPCODE(0x0CB0) |
3596 | { |
3597 | u32 adr, res; |
3598 | u32 src, dst; |
3599 | |
3600 | FETCH_LONG(src); |
3601 | adr = AREG((Opcode >> 0) & 7); |
3602 | DECODE_EXT_WORD |
3603 | PRE_IO |
3604 | READ_LONG_F(adr, dst) |
3605 | res = dst - src; |
3606 | flag_NotZ = res; |
3607 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3608 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3609 | flag_N = res >> 24; |
3610 | POST_IO |
3611 | RET(26) |
3612 | } |
3613 | |
3614 | // CMPI |
3615 | OPCODE(0x0CB8) |
3616 | { |
3617 | u32 adr, res; |
3618 | u32 src, dst; |
3619 | |
3620 | FETCH_LONG(src); |
3621 | FETCH_SWORD(adr); |
3622 | PRE_IO |
3623 | READ_LONG_F(adr, dst) |
3624 | res = dst - src; |
3625 | flag_NotZ = res; |
3626 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3627 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3628 | flag_N = res >> 24; |
3629 | POST_IO |
3630 | RET(24) |
3631 | } |
3632 | |
3633 | // CMPI |
3634 | OPCODE(0x0CB9) |
3635 | { |
3636 | u32 adr, res; |
3637 | u32 src, dst; |
3638 | |
3639 | FETCH_LONG(src); |
3640 | FETCH_LONG(adr); |
3641 | PRE_IO |
3642 | READ_LONG_F(adr, dst) |
3643 | res = dst - src; |
3644 | flag_NotZ = res; |
3645 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3646 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3647 | flag_N = res >> 24; |
3648 | POST_IO |
3649 | RET(28) |
3650 | } |
3651 | |
3652 | // CMPI |
3653 | OPCODE(0x0C9F) |
3654 | { |
3655 | u32 adr, res; |
3656 | u32 src, dst; |
3657 | |
3658 | FETCH_LONG(src); |
3659 | adr = AREG(7); |
3660 | AREG(7) += 4; |
3661 | PRE_IO |
3662 | READ_LONG_F(adr, dst) |
3663 | res = dst - src; |
3664 | flag_NotZ = res; |
3665 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3666 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3667 | flag_N = res >> 24; |
3668 | POST_IO |
3669 | RET(20) |
3670 | } |
3671 | |
3672 | // CMPI |
3673 | OPCODE(0x0CA7) |
3674 | { |
3675 | u32 adr, res; |
3676 | u32 src, dst; |
3677 | |
3678 | FETCH_LONG(src); |
3679 | adr = AREG(7) - 4; |
3680 | AREG(7) = adr; |
3681 | PRE_IO |
3682 | READ_LONG_F(adr, dst) |
3683 | res = dst - src; |
3684 | flag_NotZ = res; |
3685 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3686 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3687 | flag_N = res >> 24; |
3688 | POST_IO |
3689 | RET(22) |
3690 | } |
3691 | |
3692 | // BTSTn |
3693 | OPCODE(0x0800) |
3694 | { |
3695 | u32 adr, res; |
3696 | u32 src, dst; |
3697 | |
3698 | FETCH_BYTE(src); |
3699 | src = 1 << (src & 31); |
3700 | res = DREGu32((Opcode >> 0) & 7); |
3701 | flag_NotZ = res & src; |
3702 | RET(10) |
3703 | } |
3704 | |
3705 | // BTSTn |
3706 | OPCODE(0x0810) |
3707 | { |
3708 | u32 adr, res; |
3709 | u32 src, dst; |
3710 | |
3711 | FETCH_BYTE(src); |
3712 | src = 1 << (src & 7); |
3713 | adr = AREG((Opcode >> 0) & 7); |
3714 | PRE_IO |
3715 | READ_BYTE_F(adr, res) |
3716 | flag_NotZ = res & src; |
3717 | POST_IO |
3718 | RET(12) |
3719 | } |
3720 | |
3721 | // BTSTn |
3722 | OPCODE(0x0818) |
3723 | { |
3724 | u32 adr, res; |
3725 | u32 src, dst; |
3726 | |
3727 | FETCH_BYTE(src); |
3728 | src = 1 << (src & 7); |
3729 | adr = AREG((Opcode >> 0) & 7); |
3730 | AREG((Opcode >> 0) & 7) += 1; |
3731 | PRE_IO |
3732 | READ_BYTE_F(adr, res) |
3733 | flag_NotZ = res & src; |
3734 | POST_IO |
3735 | RET(12) |
3736 | } |
3737 | |
3738 | // BTSTn |
3739 | OPCODE(0x0820) |
3740 | { |
3741 | u32 adr, res; |
3742 | u32 src, dst; |
3743 | |
3744 | FETCH_BYTE(src); |
3745 | src = 1 << (src & 7); |
3746 | adr = AREG((Opcode >> 0) & 7) - 1; |
3747 | AREG((Opcode >> 0) & 7) = adr; |
3748 | PRE_IO |
3749 | READ_BYTE_F(adr, res) |
3750 | flag_NotZ = res & src; |
3751 | POST_IO |
3752 | RET(14) |
3753 | } |
3754 | |
3755 | // BTSTn |
3756 | OPCODE(0x0828) |
3757 | { |
3758 | u32 adr, res; |
3759 | u32 src, dst; |
3760 | |
3761 | FETCH_BYTE(src); |
3762 | src = 1 << (src & 7); |
3763 | FETCH_SWORD(adr); |
3764 | adr += AREG((Opcode >> 0) & 7); |
3765 | PRE_IO |
3766 | READ_BYTE_F(adr, res) |
3767 | flag_NotZ = res & src; |
3768 | POST_IO |
3769 | RET(16) |
3770 | } |
3771 | |
3772 | // BTSTn |
3773 | OPCODE(0x0830) |
3774 | { |
3775 | u32 adr, res; |
3776 | u32 src, dst; |
3777 | |
3778 | FETCH_BYTE(src); |
3779 | src = 1 << (src & 7); |
3780 | adr = AREG((Opcode >> 0) & 7); |
3781 | DECODE_EXT_WORD |
3782 | PRE_IO |
3783 | READ_BYTE_F(adr, res) |
3784 | flag_NotZ = res & src; |
3785 | POST_IO |
3786 | RET(18) |
3787 | } |
3788 | |
3789 | // BTSTn |
3790 | OPCODE(0x0838) |
3791 | { |
3792 | u32 adr, res; |
3793 | u32 src, dst; |
3794 | |
3795 | FETCH_BYTE(src); |
3796 | src = 1 << (src & 7); |
3797 | FETCH_SWORD(adr); |
3798 | PRE_IO |
3799 | READ_BYTE_F(adr, res) |
3800 | flag_NotZ = res & src; |
3801 | POST_IO |
3802 | RET(16) |
3803 | } |
3804 | |
3805 | // BTSTn |
3806 | OPCODE(0x0839) |
3807 | { |
3808 | u32 adr, res; |
3809 | u32 src, dst; |
3810 | |
3811 | FETCH_BYTE(src); |
3812 | src = 1 << (src & 7); |
3813 | FETCH_LONG(adr); |
3814 | PRE_IO |
3815 | READ_BYTE_F(adr, res) |
3816 | flag_NotZ = res & src; |
3817 | POST_IO |
3818 | RET(20) |
3819 | } |
3820 | |
3821 | // BTSTn |
3822 | OPCODE(0x083A) |
3823 | { |
3824 | u32 adr, res; |
3825 | u32 src, dst; |
3826 | |
3827 | FETCH_BYTE(src); |
3828 | src = 1 << (src & 7); |
3829 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
3830 | PC++; |
3831 | PRE_IO |
3832 | READ_BYTE_F(adr, res) |
3833 | flag_NotZ = res & src; |
3834 | POST_IO |
3835 | RET(16) |
3836 | } |
3837 | |
3838 | // BTSTn |
3839 | OPCODE(0x083B) |
3840 | { |
3841 | u32 adr, res; |
3842 | u32 src, dst; |
3843 | |
3844 | FETCH_BYTE(src); |
3845 | src = 1 << (src & 7); |
3846 | adr = (u32)(PC) - BasePC; |
3847 | DECODE_EXT_WORD |
3848 | PRE_IO |
3849 | READ_BYTE_F(adr, res) |
3850 | flag_NotZ = res & src; |
3851 | POST_IO |
3852 | RET(18) |
3853 | } |
3854 | |
3855 | // BTSTn |
3856 | OPCODE(0x081F) |
3857 | { |
3858 | u32 adr, res; |
3859 | u32 src, dst; |
3860 | |
3861 | FETCH_BYTE(src); |
3862 | src = 1 << (src & 7); |
3863 | adr = AREG(7); |
3864 | AREG(7) += 2; |
3865 | PRE_IO |
3866 | READ_BYTE_F(adr, res) |
3867 | flag_NotZ = res & src; |
3868 | POST_IO |
3869 | RET(12) |
3870 | } |
3871 | |
3872 | // BTSTn |
3873 | OPCODE(0x0827) |
3874 | { |
3875 | u32 adr, res; |
3876 | u32 src, dst; |
3877 | |
3878 | FETCH_BYTE(src); |
3879 | src = 1 << (src & 7); |
3880 | adr = AREG(7) - 2; |
3881 | AREG(7) = adr; |
3882 | PRE_IO |
3883 | READ_BYTE_F(adr, res) |
3884 | flag_NotZ = res & src; |
3885 | POST_IO |
3886 | RET(14) |
3887 | } |
3888 | |
3889 | // BCHGn |
3890 | OPCODE(0x0840) |
3891 | { |
3892 | u32 adr, res; |
3893 | u32 src, dst; |
3894 | |
3895 | FETCH_BYTE(src); |
3896 | src = 1 << (src & 31); |
3897 | res = DREGu32((Opcode >> 0) & 7); |
3898 | flag_NotZ = res & src; |
3899 | res ^= src; |
3900 | DREGu32((Opcode >> 0) & 7) = res; |
3901 | RET(12) |
3902 | } |
3903 | |
3904 | // BCHGn |
3905 | OPCODE(0x0850) |
3906 | { |
3907 | u32 adr, res; |
3908 | u32 src, dst; |
3909 | |
3910 | FETCH_BYTE(src); |
3911 | src = 1 << (src & 7); |
3912 | adr = AREG((Opcode >> 0) & 7); |
3913 | PRE_IO |
3914 | READ_BYTE_F(adr, res) |
3915 | flag_NotZ = res & src; |
3916 | res ^= src; |
3917 | WRITE_BYTE_F(adr, res) |
3918 | POST_IO |
3919 | RET(16) |
3920 | } |
3921 | |
3922 | // BCHGn |
3923 | OPCODE(0x0858) |
3924 | { |
3925 | u32 adr, res; |
3926 | u32 src, dst; |
3927 | |
3928 | FETCH_BYTE(src); |
3929 | src = 1 << (src & 7); |
3930 | adr = AREG((Opcode >> 0) & 7); |
3931 | AREG((Opcode >> 0) & 7) += 1; |
3932 | PRE_IO |
3933 | READ_BYTE_F(adr, res) |
3934 | flag_NotZ = res & src; |
3935 | res ^= src; |
3936 | WRITE_BYTE_F(adr, res) |
3937 | POST_IO |
3938 | RET(16) |
3939 | } |
3940 | |
3941 | // BCHGn |
3942 | OPCODE(0x0860) |
3943 | { |
3944 | u32 adr, res; |
3945 | u32 src, dst; |
3946 | |
3947 | FETCH_BYTE(src); |
3948 | src = 1 << (src & 7); |
3949 | adr = AREG((Opcode >> 0) & 7) - 1; |
3950 | AREG((Opcode >> 0) & 7) = adr; |
3951 | PRE_IO |
3952 | READ_BYTE_F(adr, res) |
3953 | flag_NotZ = res & src; |
3954 | res ^= src; |
3955 | WRITE_BYTE_F(adr, res) |
3956 | POST_IO |
3957 | RET(18) |
3958 | } |
3959 | |
3960 | // BCHGn |
3961 | OPCODE(0x0868) |
3962 | { |
3963 | u32 adr, res; |
3964 | u32 src, dst; |
3965 | |
3966 | FETCH_BYTE(src); |
3967 | src = 1 << (src & 7); |
3968 | FETCH_SWORD(adr); |
3969 | adr += AREG((Opcode >> 0) & 7); |
3970 | PRE_IO |
3971 | READ_BYTE_F(adr, res) |
3972 | flag_NotZ = res & src; |
3973 | res ^= src; |
3974 | WRITE_BYTE_F(adr, res) |
3975 | POST_IO |
3976 | RET(20) |
3977 | } |
3978 | |
3979 | // BCHGn |
3980 | OPCODE(0x0870) |
3981 | { |
3982 | u32 adr, res; |
3983 | u32 src, dst; |
3984 | |
3985 | FETCH_BYTE(src); |
3986 | src = 1 << (src & 7); |
3987 | adr = AREG((Opcode >> 0) & 7); |
3988 | DECODE_EXT_WORD |
3989 | PRE_IO |
3990 | READ_BYTE_F(adr, res) |
3991 | flag_NotZ = res & src; |
3992 | res ^= src; |
3993 | WRITE_BYTE_F(adr, res) |
3994 | POST_IO |
3995 | RET(22) |
3996 | } |
3997 | |
3998 | // BCHGn |
3999 | OPCODE(0x0878) |
4000 | { |
4001 | u32 adr, res; |
4002 | u32 src, dst; |
4003 | |
4004 | FETCH_BYTE(src); |
4005 | src = 1 << (src & 7); |
4006 | FETCH_SWORD(adr); |
4007 | PRE_IO |
4008 | READ_BYTE_F(adr, res) |
4009 | flag_NotZ = res & src; |
4010 | res ^= src; |
4011 | WRITE_BYTE_F(adr, res) |
4012 | POST_IO |
4013 | RET(20) |
4014 | } |
4015 | |
4016 | // BCHGn |
4017 | OPCODE(0x0879) |
4018 | { |
4019 | u32 adr, res; |
4020 | u32 src, dst; |
4021 | |
4022 | FETCH_BYTE(src); |
4023 | src = 1 << (src & 7); |
4024 | FETCH_LONG(adr); |
4025 | PRE_IO |
4026 | READ_BYTE_F(adr, res) |
4027 | flag_NotZ = res & src; |
4028 | res ^= src; |
4029 | WRITE_BYTE_F(adr, res) |
4030 | POST_IO |
4031 | RET(24) |
4032 | } |
4033 | |
4034 | // BCHGn |
4035 | OPCODE(0x085F) |
4036 | { |
4037 | u32 adr, res; |
4038 | u32 src, dst; |
4039 | |
4040 | FETCH_BYTE(src); |
4041 | src = 1 << (src & 7); |
4042 | adr = AREG(7); |
4043 | AREG(7) += 2; |
4044 | PRE_IO |
4045 | READ_BYTE_F(adr, res) |
4046 | flag_NotZ = res & src; |
4047 | res ^= src; |
4048 | WRITE_BYTE_F(adr, res) |
4049 | POST_IO |
4050 | RET(16) |
4051 | } |
4052 | |
4053 | // BCHGn |
4054 | OPCODE(0x0867) |
4055 | { |
4056 | u32 adr, res; |
4057 | u32 src, dst; |
4058 | |
4059 | FETCH_BYTE(src); |
4060 | src = 1 << (src & 7); |
4061 | adr = AREG(7) - 2; |
4062 | AREG(7) = adr; |
4063 | PRE_IO |
4064 | READ_BYTE_F(adr, res) |
4065 | flag_NotZ = res & src; |
4066 | res ^= src; |
4067 | WRITE_BYTE_F(adr, res) |
4068 | POST_IO |
4069 | RET(18) |
4070 | } |
4071 | |
4072 | // BCLRn |
4073 | OPCODE(0x0880) |
4074 | { |
4075 | u32 adr, res; |
4076 | u32 src, dst; |
4077 | |
4078 | FETCH_BYTE(src); |
4079 | src = 1 << (src & 31); |
4080 | res = DREGu32((Opcode >> 0) & 7); |
4081 | flag_NotZ = res & src; |
4082 | res &= ~src; |
4083 | DREGu32((Opcode >> 0) & 7) = res; |
4084 | RET(14) |
4085 | } |
4086 | |
4087 | // BCLRn |
4088 | OPCODE(0x0890) |
4089 | { |
4090 | u32 adr, res; |
4091 | u32 src, dst; |
4092 | |
4093 | FETCH_BYTE(src); |
4094 | src = 1 << (src & 7); |
4095 | adr = AREG((Opcode >> 0) & 7); |
4096 | PRE_IO |
4097 | READ_BYTE_F(adr, res) |
4098 | flag_NotZ = res & src; |
4099 | res &= ~src; |
4100 | WRITE_BYTE_F(adr, res) |
4101 | POST_IO |
4102 | RET(16) |
4103 | } |
4104 | |
4105 | // BCLRn |
4106 | OPCODE(0x0898) |
4107 | { |
4108 | u32 adr, res; |
4109 | u32 src, dst; |
4110 | |
4111 | FETCH_BYTE(src); |
4112 | src = 1 << (src & 7); |
4113 | adr = AREG((Opcode >> 0) & 7); |
4114 | AREG((Opcode >> 0) & 7) += 1; |
4115 | PRE_IO |
4116 | READ_BYTE_F(adr, res) |
4117 | flag_NotZ = res & src; |
4118 | res &= ~src; |
4119 | WRITE_BYTE_F(adr, res) |
4120 | POST_IO |
4121 | RET(16) |
4122 | } |
4123 | |
4124 | // BCLRn |
4125 | OPCODE(0x08A0) |
4126 | { |
4127 | u32 adr, res; |
4128 | u32 src, dst; |
4129 | |
4130 | FETCH_BYTE(src); |
4131 | src = 1 << (src & 7); |
4132 | adr = AREG((Opcode >> 0) & 7) - 1; |
4133 | AREG((Opcode >> 0) & 7) = adr; |
4134 | PRE_IO |
4135 | READ_BYTE_F(adr, res) |
4136 | flag_NotZ = res & src; |
4137 | res &= ~src; |
4138 | WRITE_BYTE_F(adr, res) |
4139 | POST_IO |
4140 | RET(18) |
4141 | } |
4142 | |
4143 | // BCLRn |
4144 | OPCODE(0x08A8) |
4145 | { |
4146 | u32 adr, res; |
4147 | u32 src, dst; |
4148 | |
4149 | FETCH_BYTE(src); |
4150 | src = 1 << (src & 7); |
4151 | FETCH_SWORD(adr); |
4152 | adr += AREG((Opcode >> 0) & 7); |
4153 | PRE_IO |
4154 | READ_BYTE_F(adr, res) |
4155 | flag_NotZ = res & src; |
4156 | res &= ~src; |
4157 | WRITE_BYTE_F(adr, res) |
4158 | POST_IO |
4159 | RET(20) |
4160 | } |
4161 | |
4162 | // BCLRn |
4163 | OPCODE(0x08B0) |
4164 | { |
4165 | u32 adr, res; |
4166 | u32 src, dst; |
4167 | |
4168 | FETCH_BYTE(src); |
4169 | src = 1 << (src & 7); |
4170 | adr = AREG((Opcode >> 0) & 7); |
4171 | DECODE_EXT_WORD |
4172 | PRE_IO |
4173 | READ_BYTE_F(adr, res) |
4174 | flag_NotZ = res & src; |
4175 | res &= ~src; |
4176 | WRITE_BYTE_F(adr, res) |
4177 | POST_IO |
4178 | RET(22) |
4179 | } |
4180 | |
4181 | // BCLRn |
4182 | OPCODE(0x08B8) |
4183 | { |
4184 | u32 adr, res; |
4185 | u32 src, dst; |
4186 | |
4187 | FETCH_BYTE(src); |
4188 | src = 1 << (src & 7); |
4189 | FETCH_SWORD(adr); |
4190 | PRE_IO |
4191 | READ_BYTE_F(adr, res) |
4192 | flag_NotZ = res & src; |
4193 | res &= ~src; |
4194 | WRITE_BYTE_F(adr, res) |
4195 | POST_IO |
4196 | RET(20) |
4197 | } |
4198 | |
4199 | // BCLRn |
4200 | OPCODE(0x08B9) |
4201 | { |
4202 | u32 adr, res; |
4203 | u32 src, dst; |
4204 | |
4205 | FETCH_BYTE(src); |
4206 | src = 1 << (src & 7); |
4207 | FETCH_LONG(adr); |
4208 | PRE_IO |
4209 | READ_BYTE_F(adr, res) |
4210 | flag_NotZ = res & src; |
4211 | res &= ~src; |
4212 | WRITE_BYTE_F(adr, res) |
4213 | POST_IO |
4214 | RET(24) |
4215 | } |
4216 | |
4217 | // BCLRn |
4218 | OPCODE(0x089F) |
4219 | { |
4220 | u32 adr, res; |
4221 | u32 src, dst; |
4222 | |
4223 | FETCH_BYTE(src); |
4224 | src = 1 << (src & 7); |
4225 | adr = AREG(7); |
4226 | AREG(7) += 2; |
4227 | PRE_IO |
4228 | READ_BYTE_F(adr, res) |
4229 | flag_NotZ = res & src; |
4230 | res &= ~src; |
4231 | WRITE_BYTE_F(adr, res) |
4232 | POST_IO |
4233 | RET(16) |
4234 | } |
4235 | |
4236 | // BCLRn |
4237 | OPCODE(0x08A7) |
4238 | { |
4239 | u32 adr, res; |
4240 | u32 src, dst; |
4241 | |
4242 | FETCH_BYTE(src); |
4243 | src = 1 << (src & 7); |
4244 | adr = AREG(7) - 2; |
4245 | AREG(7) = adr; |
4246 | PRE_IO |
4247 | READ_BYTE_F(adr, res) |
4248 | flag_NotZ = res & src; |
4249 | res &= ~src; |
4250 | WRITE_BYTE_F(adr, res) |
4251 | POST_IO |
4252 | RET(18) |
4253 | } |
4254 | |
4255 | // BSETn |
4256 | OPCODE(0x08C0) |
4257 | { |
4258 | u32 adr, res; |
4259 | u32 src, dst; |
4260 | |
4261 | FETCH_BYTE(src); |
4262 | src = 1 << (src & 31); |
4263 | res = DREGu32((Opcode >> 0) & 7); |
4264 | flag_NotZ = res & src; |
4265 | res |= src; |
4266 | DREGu32((Opcode >> 0) & 7) = res; |
4267 | RET(12) |
4268 | } |
4269 | |
4270 | // BSETn |
4271 | OPCODE(0x08D0) |
4272 | { |
4273 | u32 adr, res; |
4274 | u32 src, dst; |
4275 | |
4276 | FETCH_BYTE(src); |
4277 | src = 1 << (src & 7); |
4278 | adr = AREG((Opcode >> 0) & 7); |
4279 | PRE_IO |
4280 | READ_BYTE_F(adr, res) |
4281 | flag_NotZ = res & src; |
4282 | res |= src; |
4283 | WRITE_BYTE_F(adr, res) |
4284 | POST_IO |
4285 | RET(16) |
4286 | } |
4287 | |
4288 | // BSETn |
4289 | OPCODE(0x08D8) |
4290 | { |
4291 | u32 adr, res; |
4292 | u32 src, dst; |
4293 | |
4294 | FETCH_BYTE(src); |
4295 | src = 1 << (src & 7); |
4296 | adr = AREG((Opcode >> 0) & 7); |
4297 | AREG((Opcode >> 0) & 7) += 1; |
4298 | PRE_IO |
4299 | READ_BYTE_F(adr, res) |
4300 | flag_NotZ = res & src; |
4301 | res |= src; |
4302 | WRITE_BYTE_F(adr, res) |
4303 | POST_IO |
4304 | RET(16) |
4305 | } |
4306 | |
4307 | // BSETn |
4308 | OPCODE(0x08E0) |
4309 | { |
4310 | u32 adr, res; |
4311 | u32 src, dst; |
4312 | |
4313 | FETCH_BYTE(src); |
4314 | src = 1 << (src & 7); |
4315 | adr = AREG((Opcode >> 0) & 7) - 1; |
4316 | AREG((Opcode >> 0) & 7) = adr; |
4317 | PRE_IO |
4318 | READ_BYTE_F(adr, res) |
4319 | flag_NotZ = res & src; |
4320 | res |= src; |
4321 | WRITE_BYTE_F(adr, res) |
4322 | POST_IO |
4323 | RET(18) |
4324 | } |
4325 | |
4326 | // BSETn |
4327 | OPCODE(0x08E8) |
4328 | { |
4329 | u32 adr, res; |
4330 | u32 src, dst; |
4331 | |
4332 | FETCH_BYTE(src); |
4333 | src = 1 << (src & 7); |
4334 | FETCH_SWORD(adr); |
4335 | adr += AREG((Opcode >> 0) & 7); |
4336 | PRE_IO |
4337 | READ_BYTE_F(adr, res) |
4338 | flag_NotZ = res & src; |
4339 | res |= src; |
4340 | WRITE_BYTE_F(adr, res) |
4341 | POST_IO |
4342 | RET(20) |
4343 | } |
4344 | |
4345 | // BSETn |
4346 | OPCODE(0x08F0) |
4347 | { |
4348 | u32 adr, res; |
4349 | u32 src, dst; |
4350 | |
4351 | FETCH_BYTE(src); |
4352 | src = 1 << (src & 7); |
4353 | adr = AREG((Opcode >> 0) & 7); |
4354 | DECODE_EXT_WORD |
4355 | PRE_IO |
4356 | READ_BYTE_F(adr, res) |
4357 | flag_NotZ = res & src; |
4358 | res |= src; |
4359 | WRITE_BYTE_F(adr, res) |
4360 | POST_IO |
4361 | RET(22) |
4362 | } |
4363 | |
4364 | // BSETn |
4365 | OPCODE(0x08F8) |
4366 | { |
4367 | u32 adr, res; |
4368 | u32 src, dst; |
4369 | |
4370 | FETCH_BYTE(src); |
4371 | src = 1 << (src & 7); |
4372 | FETCH_SWORD(adr); |
4373 | PRE_IO |
4374 | READ_BYTE_F(adr, res) |
4375 | flag_NotZ = res & src; |
4376 | res |= src; |
4377 | WRITE_BYTE_F(adr, res) |
4378 | POST_IO |
4379 | RET(20) |
4380 | } |
4381 | |
4382 | // BSETn |
4383 | OPCODE(0x08F9) |
4384 | { |
4385 | u32 adr, res; |
4386 | u32 src, dst; |
4387 | |
4388 | FETCH_BYTE(src); |
4389 | src = 1 << (src & 7); |
4390 | FETCH_LONG(adr); |
4391 | PRE_IO |
4392 | READ_BYTE_F(adr, res) |
4393 | flag_NotZ = res & src; |
4394 | res |= src; |
4395 | WRITE_BYTE_F(adr, res) |
4396 | POST_IO |
4397 | RET(24) |
4398 | } |
4399 | |
4400 | // BSETn |
4401 | OPCODE(0x08DF) |
4402 | { |
4403 | u32 adr, res; |
4404 | u32 src, dst; |
4405 | |
4406 | FETCH_BYTE(src); |
4407 | src = 1 << (src & 7); |
4408 | adr = AREG(7); |
4409 | AREG(7) += 2; |
4410 | PRE_IO |
4411 | READ_BYTE_F(adr, res) |
4412 | flag_NotZ = res & src; |
4413 | res |= src; |
4414 | WRITE_BYTE_F(adr, res) |
4415 | POST_IO |
4416 | RET(16) |
4417 | } |
4418 | |
4419 | // BSETn |
4420 | OPCODE(0x08E7) |
4421 | { |
4422 | u32 adr, res; |
4423 | u32 src, dst; |
4424 | |
4425 | FETCH_BYTE(src); |
4426 | src = 1 << (src & 7); |
4427 | adr = AREG(7) - 2; |
4428 | AREG(7) = adr; |
4429 | PRE_IO |
4430 | READ_BYTE_F(adr, res) |
4431 | flag_NotZ = res & src; |
4432 | res |= src; |
4433 | WRITE_BYTE_F(adr, res) |
4434 | POST_IO |
4435 | RET(18) |
4436 | } |
4437 | |
4438 | // BTST |
4439 | OPCODE(0x0100) |
4440 | { |
4441 | u32 adr, res; |
4442 | u32 src, dst; |
4443 | |
4444 | src = DREGu32((Opcode >> 9) & 7); |
4445 | src = 1 << (src & 31); |
4446 | res = DREGu32((Opcode >> 0) & 7); |
4447 | flag_NotZ = res & src; |
4448 | RET(6) |
4449 | } |
4450 | |
4451 | // BTST |
4452 | OPCODE(0x0110) |
4453 | { |
4454 | u32 adr, res; |
4455 | u32 src, dst; |
4456 | |
4457 | src = DREGu8((Opcode >> 9) & 7); |
4458 | src = 1 << (src & 7); |
4459 | adr = AREG((Opcode >> 0) & 7); |
4460 | PRE_IO |
4461 | READ_BYTE_F(adr, res) |
4462 | flag_NotZ = res & src; |
4463 | POST_IO |
4464 | RET(8) |
4465 | } |
4466 | |
4467 | // BTST |
4468 | OPCODE(0x0118) |
4469 | { |
4470 | u32 adr, res; |
4471 | u32 src, dst; |
4472 | |
4473 | src = DREGu8((Opcode >> 9) & 7); |
4474 | src = 1 << (src & 7); |
4475 | adr = AREG((Opcode >> 0) & 7); |
4476 | AREG((Opcode >> 0) & 7) += 1; |
4477 | PRE_IO |
4478 | READ_BYTE_F(adr, res) |
4479 | flag_NotZ = res & src; |
4480 | POST_IO |
4481 | RET(8) |
4482 | } |
4483 | |
4484 | // BTST |
4485 | OPCODE(0x0120) |
4486 | { |
4487 | u32 adr, res; |
4488 | u32 src, dst; |
4489 | |
4490 | src = DREGu8((Opcode >> 9) & 7); |
4491 | src = 1 << (src & 7); |
4492 | adr = AREG((Opcode >> 0) & 7) - 1; |
4493 | AREG((Opcode >> 0) & 7) = adr; |
4494 | PRE_IO |
4495 | READ_BYTE_F(adr, res) |
4496 | flag_NotZ = res & src; |
4497 | POST_IO |
4498 | RET(10) |
4499 | } |
4500 | |
4501 | // BTST |
4502 | OPCODE(0x0128) |
4503 | { |
4504 | u32 adr, res; |
4505 | u32 src, dst; |
4506 | |
4507 | src = DREGu8((Opcode >> 9) & 7); |
4508 | src = 1 << (src & 7); |
4509 | FETCH_SWORD(adr); |
4510 | adr += AREG((Opcode >> 0) & 7); |
4511 | PRE_IO |
4512 | READ_BYTE_F(adr, res) |
4513 | flag_NotZ = res & src; |
4514 | POST_IO |
4515 | RET(12) |
4516 | } |
4517 | |
4518 | // BTST |
4519 | OPCODE(0x0130) |
4520 | { |
4521 | u32 adr, res; |
4522 | u32 src, dst; |
4523 | |
4524 | src = DREGu8((Opcode >> 9) & 7); |
4525 | src = 1 << (src & 7); |
4526 | adr = AREG((Opcode >> 0) & 7); |
4527 | DECODE_EXT_WORD |
4528 | PRE_IO |
4529 | READ_BYTE_F(adr, res) |
4530 | flag_NotZ = res & src; |
4531 | POST_IO |
4532 | RET(14) |
4533 | } |
4534 | |
4535 | // BTST |
4536 | OPCODE(0x0138) |
4537 | { |
4538 | u32 adr, res; |
4539 | u32 src, dst; |
4540 | |
4541 | src = DREGu8((Opcode >> 9) & 7); |
4542 | src = 1 << (src & 7); |
4543 | FETCH_SWORD(adr); |
4544 | PRE_IO |
4545 | READ_BYTE_F(adr, res) |
4546 | flag_NotZ = res & src; |
4547 | POST_IO |
4548 | RET(12) |
4549 | } |
4550 | |
4551 | // BTST |
4552 | OPCODE(0x0139) |
4553 | { |
4554 | u32 adr, res; |
4555 | u32 src, dst; |
4556 | |
4557 | src = DREGu8((Opcode >> 9) & 7); |
4558 | src = 1 << (src & 7); |
4559 | FETCH_LONG(adr); |
4560 | PRE_IO |
4561 | READ_BYTE_F(adr, res) |
4562 | flag_NotZ = res & src; |
4563 | POST_IO |
4564 | RET(16) |
4565 | } |
4566 | |
4567 | // BTST |
4568 | OPCODE(0x013A) |
4569 | { |
4570 | u32 adr, res; |
4571 | u32 src, dst; |
4572 | |
4573 | src = DREGu8((Opcode >> 9) & 7); |
4574 | src = 1 << (src & 7); |
4575 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
4576 | PC++; |
4577 | PRE_IO |
4578 | READ_BYTE_F(adr, res) |
4579 | flag_NotZ = res & src; |
4580 | POST_IO |
4581 | RET(12) |
4582 | } |
4583 | |
4584 | // BTST |
4585 | OPCODE(0x013B) |
4586 | { |
4587 | u32 adr, res; |
4588 | u32 src, dst; |
4589 | |
4590 | src = DREGu8((Opcode >> 9) & 7); |
4591 | src = 1 << (src & 7); |
4592 | adr = (u32)(PC) - BasePC; |
4593 | DECODE_EXT_WORD |
4594 | PRE_IO |
4595 | READ_BYTE_F(adr, res) |
4596 | flag_NotZ = res & src; |
4597 | POST_IO |
4598 | RET(14) |
4599 | } |
4600 | |
4601 | // BTST |
4602 | OPCODE(0x013C) |
4603 | { |
4604 | u32 adr, res; |
4605 | u32 src, dst; |
4606 | |
4607 | src = DREGu8((Opcode >> 9) & 7); |
4608 | src = 1 << (src & 7); |
4609 | FETCH_BYTE(res); |
4610 | flag_NotZ = res & src; |
4611 | RET(8) |
4612 | } |
4613 | |
4614 | // BTST |
4615 | OPCODE(0x011F) |
4616 | { |
4617 | u32 adr, res; |
4618 | u32 src, dst; |
4619 | |
4620 | src = DREGu8((Opcode >> 9) & 7); |
4621 | src = 1 << (src & 7); |
4622 | adr = AREG(7); |
4623 | AREG(7) += 2; |
4624 | PRE_IO |
4625 | READ_BYTE_F(adr, res) |
4626 | flag_NotZ = res & src; |
4627 | POST_IO |
4628 | RET(8) |
4629 | } |
4630 | |
4631 | // BTST |
4632 | OPCODE(0x0127) |
4633 | { |
4634 | u32 adr, res; |
4635 | u32 src, dst; |
4636 | |
4637 | src = DREGu8((Opcode >> 9) & 7); |
4638 | src = 1 << (src & 7); |
4639 | adr = AREG(7) - 2; |
4640 | AREG(7) = adr; |
4641 | PRE_IO |
4642 | READ_BYTE_F(adr, res) |
4643 | flag_NotZ = res & src; |
4644 | POST_IO |
4645 | RET(10) |
4646 | } |
4647 | |
4648 | // BCHG |
4649 | OPCODE(0x0140) |
4650 | { |
4651 | u32 adr, res; |
4652 | u32 src, dst; |
4653 | |
4654 | src = DREGu32((Opcode >> 9) & 7); |
4655 | src = 1 << (src & 31); |
4656 | res = DREGu32((Opcode >> 0) & 7); |
4657 | flag_NotZ = res & src; |
4658 | res ^= src; |
4659 | DREGu32((Opcode >> 0) & 7) = res; |
4660 | RET(8) |
4661 | } |
4662 | |
4663 | // BCHG |
4664 | OPCODE(0x0150) |
4665 | { |
4666 | u32 adr, res; |
4667 | u32 src, dst; |
4668 | |
4669 | src = DREGu8((Opcode >> 9) & 7); |
4670 | src = 1 << (src & 7); |
4671 | adr = AREG((Opcode >> 0) & 7); |
4672 | PRE_IO |
4673 | READ_BYTE_F(adr, res) |
4674 | flag_NotZ = res & src; |
4675 | res ^= src; |
4676 | WRITE_BYTE_F(adr, res) |
4677 | POST_IO |
4678 | RET(12) |
4679 | } |
4680 | |
4681 | // BCHG |
4682 | OPCODE(0x0158) |
4683 | { |
4684 | u32 adr, res; |
4685 | u32 src, dst; |
4686 | |
4687 | src = DREGu8((Opcode >> 9) & 7); |
4688 | src = 1 << (src & 7); |
4689 | adr = AREG((Opcode >> 0) & 7); |
4690 | AREG((Opcode >> 0) & 7) += 1; |
4691 | PRE_IO |
4692 | READ_BYTE_F(adr, res) |
4693 | flag_NotZ = res & src; |
4694 | res ^= src; |
4695 | WRITE_BYTE_F(adr, res) |
4696 | POST_IO |
4697 | RET(12) |
4698 | } |
4699 | |
4700 | // BCHG |
4701 | OPCODE(0x0160) |
4702 | { |
4703 | u32 adr, res; |
4704 | u32 src, dst; |
4705 | |
4706 | src = DREGu8((Opcode >> 9) & 7); |
4707 | src = 1 << (src & 7); |
4708 | adr = AREG((Opcode >> 0) & 7) - 1; |
4709 | AREG((Opcode >> 0) & 7) = adr; |
4710 | PRE_IO |
4711 | READ_BYTE_F(adr, res) |
4712 | flag_NotZ = res & src; |
4713 | res ^= src; |
4714 | WRITE_BYTE_F(adr, res) |
4715 | POST_IO |
4716 | RET(14) |
4717 | } |
4718 | |
4719 | // BCHG |
4720 | OPCODE(0x0168) |
4721 | { |
4722 | u32 adr, res; |
4723 | u32 src, dst; |
4724 | |
4725 | src = DREGu8((Opcode >> 9) & 7); |
4726 | src = 1 << (src & 7); |
4727 | FETCH_SWORD(adr); |
4728 | adr += AREG((Opcode >> 0) & 7); |
4729 | PRE_IO |
4730 | READ_BYTE_F(adr, res) |
4731 | flag_NotZ = res & src; |
4732 | res ^= src; |
4733 | WRITE_BYTE_F(adr, res) |
4734 | POST_IO |
4735 | RET(16) |
4736 | } |
4737 | |
4738 | // BCHG |
4739 | OPCODE(0x0170) |
4740 | { |
4741 | u32 adr, res; |
4742 | u32 src, dst; |
4743 | |
4744 | src = DREGu8((Opcode >> 9) & 7); |
4745 | src = 1 << (src & 7); |
4746 | adr = AREG((Opcode >> 0) & 7); |
4747 | DECODE_EXT_WORD |
4748 | PRE_IO |
4749 | READ_BYTE_F(adr, res) |
4750 | flag_NotZ = res & src; |
4751 | res ^= src; |
4752 | WRITE_BYTE_F(adr, res) |
4753 | POST_IO |
4754 | RET(18) |
4755 | } |
4756 | |
4757 | // BCHG |
4758 | OPCODE(0x0178) |
4759 | { |
4760 | u32 adr, res; |
4761 | u32 src, dst; |
4762 | |
4763 | src = DREGu8((Opcode >> 9) & 7); |
4764 | src = 1 << (src & 7); |
4765 | FETCH_SWORD(adr); |
4766 | PRE_IO |
4767 | READ_BYTE_F(adr, res) |
4768 | flag_NotZ = res & src; |
4769 | res ^= src; |
4770 | WRITE_BYTE_F(adr, res) |
4771 | POST_IO |
4772 | RET(16) |
4773 | } |
4774 | |
4775 | // BCHG |
4776 | OPCODE(0x0179) |
4777 | { |
4778 | u32 adr, res; |
4779 | u32 src, dst; |
4780 | |
4781 | src = DREGu8((Opcode >> 9) & 7); |
4782 | src = 1 << (src & 7); |
4783 | FETCH_LONG(adr); |
4784 | PRE_IO |
4785 | READ_BYTE_F(adr, res) |
4786 | flag_NotZ = res & src; |
4787 | res ^= src; |
4788 | WRITE_BYTE_F(adr, res) |
4789 | POST_IO |
4790 | RET(20) |
4791 | } |
4792 | |
4793 | // BCHG |
4794 | OPCODE(0x015F) |
4795 | { |
4796 | u32 adr, res; |
4797 | u32 src, dst; |
4798 | |
4799 | src = DREGu8((Opcode >> 9) & 7); |
4800 | src = 1 << (src & 7); |
4801 | adr = AREG(7); |
4802 | AREG(7) += 2; |
4803 | PRE_IO |
4804 | READ_BYTE_F(adr, res) |
4805 | flag_NotZ = res & src; |
4806 | res ^= src; |
4807 | WRITE_BYTE_F(adr, res) |
4808 | POST_IO |
4809 | RET(12) |
4810 | } |
4811 | |
4812 | // BCHG |
4813 | OPCODE(0x0167) |
4814 | { |
4815 | u32 adr, res; |
4816 | u32 src, dst; |
4817 | |
4818 | src = DREGu8((Opcode >> 9) & 7); |
4819 | src = 1 << (src & 7); |
4820 | adr = AREG(7) - 2; |
4821 | AREG(7) = adr; |
4822 | PRE_IO |
4823 | READ_BYTE_F(adr, res) |
4824 | flag_NotZ = res & src; |
4825 | res ^= src; |
4826 | WRITE_BYTE_F(adr, res) |
4827 | POST_IO |
4828 | RET(14) |
4829 | } |
4830 | |
4831 | // BCLR |
4832 | OPCODE(0x0180) |
4833 | { |
4834 | u32 adr, res; |
4835 | u32 src, dst; |
4836 | |
4837 | src = DREGu32((Opcode >> 9) & 7); |
4838 | src = 1 << (src & 31); |
4839 | res = DREGu32((Opcode >> 0) & 7); |
4840 | flag_NotZ = res & src; |
4841 | res &= ~src; |
4842 | DREGu32((Opcode >> 0) & 7) = res; |
4843 | RET(10) |
4844 | } |
4845 | |
4846 | // BCLR |
4847 | OPCODE(0x0190) |
4848 | { |
4849 | u32 adr, res; |
4850 | u32 src, dst; |
4851 | |
4852 | src = DREGu8((Opcode >> 9) & 7); |
4853 | src = 1 << (src & 7); |
4854 | adr = AREG((Opcode >> 0) & 7); |
4855 | PRE_IO |
4856 | READ_BYTE_F(adr, res) |
4857 | flag_NotZ = res & src; |
4858 | res &= ~src; |
4859 | WRITE_BYTE_F(adr, res) |
4860 | POST_IO |
4861 | RET(12) |
4862 | } |
4863 | |
4864 | // BCLR |
4865 | OPCODE(0x0198) |
4866 | { |
4867 | u32 adr, res; |
4868 | u32 src, dst; |
4869 | |
4870 | src = DREGu8((Opcode >> 9) & 7); |
4871 | src = 1 << (src & 7); |
4872 | adr = AREG((Opcode >> 0) & 7); |
4873 | AREG((Opcode >> 0) & 7) += 1; |
4874 | PRE_IO |
4875 | READ_BYTE_F(adr, res) |
4876 | flag_NotZ = res & src; |
4877 | res &= ~src; |
4878 | WRITE_BYTE_F(adr, res) |
4879 | POST_IO |
4880 | RET(12) |
4881 | } |
4882 | |
4883 | // BCLR |
4884 | OPCODE(0x01A0) |
4885 | { |
4886 | u32 adr, res; |
4887 | u32 src, dst; |
4888 | |
4889 | src = DREGu8((Opcode >> 9) & 7); |
4890 | src = 1 << (src & 7); |
4891 | adr = AREG((Opcode >> 0) & 7) - 1; |
4892 | AREG((Opcode >> 0) & 7) = adr; |
4893 | PRE_IO |
4894 | READ_BYTE_F(adr, res) |
4895 | flag_NotZ = res & src; |
4896 | res &= ~src; |
4897 | WRITE_BYTE_F(adr, res) |
4898 | POST_IO |
4899 | RET(14) |
4900 | } |
4901 | |
4902 | // BCLR |
4903 | OPCODE(0x01A8) |
4904 | { |
4905 | u32 adr, res; |
4906 | u32 src, dst; |
4907 | |
4908 | src = DREGu8((Opcode >> 9) & 7); |
4909 | src = 1 << (src & 7); |
4910 | FETCH_SWORD(adr); |
4911 | adr += AREG((Opcode >> 0) & 7); |
4912 | PRE_IO |
4913 | READ_BYTE_F(adr, res) |
4914 | flag_NotZ = res & src; |
4915 | res &= ~src; |
4916 | WRITE_BYTE_F(adr, res) |
4917 | POST_IO |
4918 | RET(16) |
4919 | } |
4920 | |
4921 | // BCLR |
4922 | OPCODE(0x01B0) |
4923 | { |
4924 | u32 adr, res; |
4925 | u32 src, dst; |
4926 | |
4927 | src = DREGu8((Opcode >> 9) & 7); |
4928 | src = 1 << (src & 7); |
4929 | adr = AREG((Opcode >> 0) & 7); |
4930 | DECODE_EXT_WORD |
4931 | PRE_IO |
4932 | READ_BYTE_F(adr, res) |
4933 | flag_NotZ = res & src; |
4934 | res &= ~src; |
4935 | WRITE_BYTE_F(adr, res) |
4936 | POST_IO |
4937 | RET(18) |
4938 | } |
4939 | |
4940 | // BCLR |
4941 | OPCODE(0x01B8) |
4942 | { |
4943 | u32 adr, res; |
4944 | u32 src, dst; |
4945 | |
4946 | src = DREGu8((Opcode >> 9) & 7); |
4947 | src = 1 << (src & 7); |
4948 | FETCH_SWORD(adr); |
4949 | PRE_IO |
4950 | READ_BYTE_F(adr, res) |
4951 | flag_NotZ = res & src; |
4952 | res &= ~src; |
4953 | WRITE_BYTE_F(adr, res) |
4954 | POST_IO |
4955 | RET(16) |
4956 | } |
4957 | |
4958 | // BCLR |
4959 | OPCODE(0x01B9) |
4960 | { |
4961 | u32 adr, res; |
4962 | u32 src, dst; |
4963 | |
4964 | src = DREGu8((Opcode >> 9) & 7); |
4965 | src = 1 << (src & 7); |
4966 | FETCH_LONG(adr); |
4967 | PRE_IO |
4968 | READ_BYTE_F(adr, res) |
4969 | flag_NotZ = res & src; |
4970 | res &= ~src; |
4971 | WRITE_BYTE_F(adr, res) |
4972 | POST_IO |
4973 | RET(20) |
4974 | } |
4975 | |
4976 | // BCLR |
4977 | OPCODE(0x019F) |
4978 | { |
4979 | u32 adr, res; |
4980 | u32 src, dst; |
4981 | |
4982 | src = DREGu8((Opcode >> 9) & 7); |
4983 | src = 1 << (src & 7); |
4984 | adr = AREG(7); |
4985 | AREG(7) += 2; |
4986 | PRE_IO |
4987 | READ_BYTE_F(adr, res) |
4988 | flag_NotZ = res & src; |
4989 | res &= ~src; |
4990 | WRITE_BYTE_F(adr, res) |
4991 | POST_IO |
4992 | RET(12) |
4993 | } |
4994 | |
4995 | // BCLR |
4996 | OPCODE(0x01A7) |
4997 | { |
4998 | u32 adr, res; |
4999 | u32 src, dst; |
5000 | |
5001 | src = DREGu8((Opcode >> 9) & 7); |
5002 | src = 1 << (src & 7); |
5003 | adr = AREG(7) - 2; |
5004 | AREG(7) = adr; |
5005 | PRE_IO |
5006 | READ_BYTE_F(adr, res) |
5007 | flag_NotZ = res & src; |
5008 | res &= ~src; |
5009 | WRITE_BYTE_F(adr, res) |
5010 | POST_IO |
5011 | RET(14) |
5012 | } |
5013 | |
5014 | // BSET |
5015 | OPCODE(0x01C0) |
5016 | { |
5017 | u32 adr, res; |
5018 | u32 src, dst; |
5019 | |
5020 | src = DREGu32((Opcode >> 9) & 7); |
5021 | src = 1 << (src & 31); |
5022 | res = DREGu32((Opcode >> 0) & 7); |
5023 | flag_NotZ = res & src; |
5024 | res |= src; |
5025 | DREGu32((Opcode >> 0) & 7) = res; |
5026 | RET(8) |
5027 | } |
5028 | |
5029 | // BSET |
5030 | OPCODE(0x01D0) |
5031 | { |
5032 | u32 adr, res; |
5033 | u32 src, dst; |
5034 | |
5035 | src = DREGu8((Opcode >> 9) & 7); |
5036 | src = 1 << (src & 7); |
5037 | adr = AREG((Opcode >> 0) & 7); |
5038 | PRE_IO |
5039 | READ_BYTE_F(adr, res) |
5040 | flag_NotZ = res & src; |
5041 | res |= src; |
5042 | WRITE_BYTE_F(adr, res) |
5043 | POST_IO |
5044 | RET(12) |
5045 | } |
5046 | |
5047 | // BSET |
5048 | OPCODE(0x01D8) |
5049 | { |
5050 | u32 adr, res; |
5051 | u32 src, dst; |
5052 | |
5053 | src = DREGu8((Opcode >> 9) & 7); |
5054 | src = 1 << (src & 7); |
5055 | adr = AREG((Opcode >> 0) & 7); |
5056 | AREG((Opcode >> 0) & 7) += 1; |
5057 | PRE_IO |
5058 | READ_BYTE_F(adr, res) |
5059 | flag_NotZ = res & src; |
5060 | res |= src; |
5061 | WRITE_BYTE_F(adr, res) |
5062 | POST_IO |
5063 | RET(12) |
5064 | } |
5065 | |
5066 | // BSET |
5067 | OPCODE(0x01E0) |
5068 | { |
5069 | u32 adr, res; |
5070 | u32 src, dst; |
5071 | |
5072 | src = DREGu8((Opcode >> 9) & 7); |
5073 | src = 1 << (src & 7); |
5074 | adr = AREG((Opcode >> 0) & 7) - 1; |
5075 | AREG((Opcode >> 0) & 7) = adr; |
5076 | PRE_IO |
5077 | READ_BYTE_F(adr, res) |
5078 | flag_NotZ = res & src; |
5079 | res |= src; |
5080 | WRITE_BYTE_F(adr, res) |
5081 | POST_IO |
5082 | RET(14) |
5083 | } |
5084 | |
5085 | // BSET |
5086 | OPCODE(0x01E8) |
5087 | { |
5088 | u32 adr, res; |
5089 | u32 src, dst; |
5090 | |
5091 | src = DREGu8((Opcode >> 9) & 7); |
5092 | src = 1 << (src & 7); |
5093 | FETCH_SWORD(adr); |
5094 | adr += AREG((Opcode >> 0) & 7); |
5095 | PRE_IO |
5096 | READ_BYTE_F(adr, res) |
5097 | flag_NotZ = res & src; |
5098 | res |= src; |
5099 | WRITE_BYTE_F(adr, res) |
5100 | POST_IO |
5101 | RET(16) |
5102 | } |
5103 | |
5104 | // BSET |
5105 | OPCODE(0x01F0) |
5106 | { |
5107 | u32 adr, res; |
5108 | u32 src, dst; |
5109 | |
5110 | src = DREGu8((Opcode >> 9) & 7); |
5111 | src = 1 << (src & 7); |
5112 | adr = AREG((Opcode >> 0) & 7); |
5113 | DECODE_EXT_WORD |
5114 | PRE_IO |
5115 | READ_BYTE_F(adr, res) |
5116 | flag_NotZ = res & src; |
5117 | res |= src; |
5118 | WRITE_BYTE_F(adr, res) |
5119 | POST_IO |
5120 | RET(18) |
5121 | } |
5122 | |
5123 | // BSET |
5124 | OPCODE(0x01F8) |
5125 | { |
5126 | u32 adr, res; |
5127 | u32 src, dst; |
5128 | |
5129 | src = DREGu8((Opcode >> 9) & 7); |
5130 | src = 1 << (src & 7); |
5131 | FETCH_SWORD(adr); |
5132 | PRE_IO |
5133 | READ_BYTE_F(adr, res) |
5134 | flag_NotZ = res & src; |
5135 | res |= src; |
5136 | WRITE_BYTE_F(adr, res) |
5137 | POST_IO |
5138 | RET(16) |
5139 | } |
5140 | |
5141 | // BSET |
5142 | OPCODE(0x01F9) |
5143 | { |
5144 | u32 adr, res; |
5145 | u32 src, dst; |
5146 | |
5147 | src = DREGu8((Opcode >> 9) & 7); |
5148 | src = 1 << (src & 7); |
5149 | FETCH_LONG(adr); |
5150 | PRE_IO |
5151 | READ_BYTE_F(adr, res) |
5152 | flag_NotZ = res & src; |
5153 | res |= src; |
5154 | WRITE_BYTE_F(adr, res) |
5155 | POST_IO |
5156 | RET(20) |
5157 | } |
5158 | |
5159 | // BSET |
5160 | OPCODE(0x01DF) |
5161 | { |
5162 | u32 adr, res; |
5163 | u32 src, dst; |
5164 | |
5165 | src = DREGu8((Opcode >> 9) & 7); |
5166 | src = 1 << (src & 7); |
5167 | adr = AREG(7); |
5168 | AREG(7) += 2; |
5169 | PRE_IO |
5170 | READ_BYTE_F(adr, res) |
5171 | flag_NotZ = res & src; |
5172 | res |= src; |
5173 | WRITE_BYTE_F(adr, res) |
5174 | POST_IO |
5175 | RET(12) |
5176 | } |
5177 | |
5178 | // BSET |
5179 | OPCODE(0x01E7) |
5180 | { |
5181 | u32 adr, res; |
5182 | u32 src, dst; |
5183 | |
5184 | src = DREGu8((Opcode >> 9) & 7); |
5185 | src = 1 << (src & 7); |
5186 | adr = AREG(7) - 2; |
5187 | AREG(7) = adr; |
5188 | PRE_IO |
5189 | READ_BYTE_F(adr, res) |
5190 | flag_NotZ = res & src; |
5191 | res |= src; |
5192 | WRITE_BYTE_F(adr, res) |
5193 | POST_IO |
5194 | RET(14) |
5195 | } |
5196 | |
5197 | // MOVEPWaD |
5198 | OPCODE(0x0108) |
5199 | { |
5200 | u32 adr, res; |
5201 | u32 src, dst; |
5202 | |
5203 | FETCH_SWORD(adr); |
5204 | adr += AREG((Opcode >> 0) & 7); |
5205 | PRE_IO |
5206 | READ_BYTE_F(adr + 0, res) |
5207 | READ_BYTE_F(adr + 2, src) |
5208 | DREGu16((Opcode >> 9) & 7) = (res << 8) | src; |
5209 | POST_IO |
03e4f2a3 |
5210 | #ifdef USE_CYCLONE_TIMING |
5211 | RET(16) |
5212 | #else |
70357ce5 |
5213 | RET(24) |
03e4f2a3 |
5214 | #endif |
70357ce5 |
5215 | } |
5216 | |
5217 | // MOVEPLaD |
5218 | OPCODE(0x0148) |
5219 | { |
5220 | u32 adr, res; |
5221 | u32 src, dst; |
5222 | |
5223 | FETCH_SWORD(adr); |
5224 | adr += AREG((Opcode >> 0) & 7); |
5225 | PRE_IO |
5226 | READ_BYTE_F(adr, res) |
5227 | res <<= 24; |
5228 | adr += 2; |
5229 | READ_BYTE_F(adr, src) |
5230 | res |= src << 16; |
5231 | adr += 2; |
5232 | READ_BYTE_F(adr, src) |
5233 | res |= src << 8; |
5234 | adr += 2; |
5235 | READ_BYTE_F(adr, src) |
5236 | DREG((Opcode >> 9) & 7) = res | src; |
5237 | POST_IO |
03e4f2a3 |
5238 | #ifdef USE_CYCLONE_TIMING |
5239 | RET(24) |
5240 | #else |
70357ce5 |
5241 | RET(32) |
03e4f2a3 |
5242 | #endif |
70357ce5 |
5243 | } |
5244 | |
5245 | // MOVEPWDa |
5246 | OPCODE(0x0188) |
5247 | { |
5248 | u32 adr, res; |
5249 | u32 src, dst; |
5250 | |
5251 | res = DREGu32((Opcode >> 9) & 7); |
5252 | FETCH_SWORD(adr); |
5253 | adr += AREG((Opcode >> 0) & 7); |
5254 | PRE_IO |
5255 | WRITE_BYTE_F(adr + 0, res >> 8) |
5256 | WRITE_BYTE_F(adr + 2, res >> 0) |
5257 | POST_IO |
03e4f2a3 |
5258 | #ifdef USE_CYCLONE_TIMING |
5259 | RET(16) |
5260 | #else |
70357ce5 |
5261 | RET(24) |
03e4f2a3 |
5262 | #endif |
70357ce5 |
5263 | } |
5264 | |
5265 | // MOVEPLDa |
5266 | OPCODE(0x01C8) |
5267 | { |
5268 | u32 adr, res; |
5269 | u32 src, dst; |
5270 | |
5271 | res = DREGu32((Opcode >> 9) & 7); |
5272 | FETCH_SWORD(adr); |
5273 | adr += AREG((Opcode >> 0) & 7); |
5274 | PRE_IO |
5275 | WRITE_BYTE_F(adr, res >> 24) |
5276 | adr += 2; |
5277 | WRITE_BYTE_F(adr, res >> 16) |
5278 | adr += 2; |
5279 | WRITE_BYTE_F(adr, res >> 8) |
5280 | adr += 2; |
5281 | WRITE_BYTE_F(adr, res >> 0) |
5282 | POST_IO |
03e4f2a3 |
5283 | #ifdef USE_CYCLONE_TIMING |
5284 | RET(24) |
5285 | #else |
70357ce5 |
5286 | RET(32) |
03e4f2a3 |
5287 | #endif |
70357ce5 |
5288 | } |
5289 | |
5290 | // MOVEB |
5291 | OPCODE(0x1000) |
5292 | { |
5293 | u32 adr, res; |
5294 | u32 src, dst; |
5295 | |
5296 | res = DREGu8((Opcode >> 0) & 7); |
5297 | flag_C = 0; |
5298 | flag_V = 0; |
5299 | flag_NotZ = res; |
5300 | flag_N = res; |
5301 | DREGu8((Opcode >> 9) & 7) = res; |
5302 | RET(4) |
5303 | } |
5304 | |
5305 | // MOVEB |
5306 | OPCODE(0x1080) |
5307 | { |
5308 | u32 adr, res; |
5309 | u32 src, dst; |
5310 | |
5311 | res = DREGu8((Opcode >> 0) & 7); |
5312 | flag_C = 0; |
5313 | flag_V = 0; |
5314 | flag_NotZ = res; |
5315 | flag_N = res; |
5316 | adr = AREG((Opcode >> 9) & 7); |
5317 | PRE_IO |
5318 | WRITE_BYTE_F(adr, res) |
5319 | POST_IO |
5320 | RET(8) |
5321 | } |
5322 | |
5323 | // MOVEB |
5324 | OPCODE(0x10C0) |
5325 | { |
5326 | u32 adr, res; |
5327 | u32 src, dst; |
5328 | |
5329 | res = DREGu8((Opcode >> 0) & 7); |
5330 | flag_C = 0; |
5331 | flag_V = 0; |
5332 | flag_NotZ = res; |
5333 | flag_N = res; |
5334 | adr = AREG((Opcode >> 9) & 7); |
5335 | AREG((Opcode >> 9) & 7) += 1; |
5336 | PRE_IO |
5337 | WRITE_BYTE_F(adr, res) |
5338 | POST_IO |
5339 | RET(8) |
5340 | } |
5341 | |
5342 | // MOVEB |
5343 | OPCODE(0x1100) |
5344 | { |
5345 | u32 adr, res; |
5346 | u32 src, dst; |
5347 | |
5348 | res = DREGu8((Opcode >> 0) & 7); |
5349 | flag_C = 0; |
5350 | flag_V = 0; |
5351 | flag_NotZ = res; |
5352 | flag_N = res; |
5353 | adr = AREG((Opcode >> 9) & 7) - 1; |
5354 | AREG((Opcode >> 9) & 7) = adr; |
5355 | PRE_IO |
5356 | WRITE_BYTE_F(adr, res) |
5357 | POST_IO |
5358 | RET(8) |
5359 | } |
5360 | |
5361 | // MOVEB |
5362 | OPCODE(0x1140) |
5363 | { |
5364 | u32 adr, res; |
5365 | u32 src, dst; |
5366 | |
5367 | res = DREGu8((Opcode >> 0) & 7); |
5368 | flag_C = 0; |
5369 | flag_V = 0; |
5370 | flag_NotZ = res; |
5371 | flag_N = res; |
5372 | FETCH_SWORD(adr); |
5373 | adr += AREG((Opcode >> 9) & 7); |
5374 | PRE_IO |
5375 | WRITE_BYTE_F(adr, res) |
5376 | POST_IO |
5377 | RET(12) |
5378 | } |
5379 | |
5380 | // MOVEB |
5381 | OPCODE(0x1180) |
5382 | { |
5383 | u32 adr, res; |
5384 | u32 src, dst; |
5385 | |
5386 | res = DREGu8((Opcode >> 0) & 7); |
5387 | flag_C = 0; |
5388 | flag_V = 0; |
5389 | flag_NotZ = res; |
5390 | flag_N = res; |
5391 | adr = AREG((Opcode >> 9) & 7); |
5392 | DECODE_EXT_WORD |
5393 | PRE_IO |
5394 | WRITE_BYTE_F(adr, res) |
5395 | POST_IO |
5396 | RET(14) |
5397 | } |
5398 | |
5399 | // MOVEB |
5400 | OPCODE(0x11C0) |
5401 | { |
5402 | u32 adr, res; |
5403 | u32 src, dst; |
5404 | |
5405 | res = DREGu8((Opcode >> 0) & 7); |
5406 | flag_C = 0; |
5407 | flag_V = 0; |
5408 | flag_NotZ = res; |
5409 | flag_N = res; |
5410 | FETCH_SWORD(adr); |
5411 | PRE_IO |
5412 | WRITE_BYTE_F(adr, res) |
5413 | POST_IO |
5414 | RET(12) |
5415 | } |
5416 | |
5417 | // MOVEB |
5418 | OPCODE(0x13C0) |
5419 | { |
5420 | u32 adr, res; |
5421 | u32 src, dst; |
5422 | |
5423 | res = DREGu8((Opcode >> 0) & 7); |
5424 | flag_C = 0; |
5425 | flag_V = 0; |
5426 | flag_NotZ = res; |
5427 | flag_N = res; |
5428 | FETCH_LONG(adr); |
5429 | PRE_IO |
5430 | WRITE_BYTE_F(adr, res) |
5431 | POST_IO |
5432 | RET(16) |
5433 | } |
5434 | |
5435 | // MOVEB |
5436 | OPCODE(0x1EC0) |
5437 | { |
5438 | u32 adr, res; |
5439 | u32 src, dst; |
5440 | |
5441 | res = DREGu8((Opcode >> 0) & 7); |
5442 | flag_C = 0; |
5443 | flag_V = 0; |
5444 | flag_NotZ = res; |
5445 | flag_N = res; |
5446 | adr = AREG(7); |
5447 | AREG(7) += 2; |
5448 | PRE_IO |
5449 | WRITE_BYTE_F(adr, res) |
5450 | POST_IO |
5451 | RET(8) |
5452 | } |
5453 | |
5454 | // MOVEB |
5455 | OPCODE(0x1F00) |
5456 | { |
5457 | u32 adr, res; |
5458 | u32 src, dst; |
5459 | |
5460 | res = DREGu8((Opcode >> 0) & 7); |
5461 | flag_C = 0; |
5462 | flag_V = 0; |
5463 | flag_NotZ = res; |
5464 | flag_N = res; |
5465 | adr = AREG(7) - 2; |
5466 | AREG(7) = adr; |
5467 | PRE_IO |
5468 | WRITE_BYTE_F(adr, res) |
5469 | POST_IO |
5470 | RET(8) |
5471 | } |
5472 | |
03e4f2a3 |
5473 | #if 0 |
70357ce5 |
5474 | // MOVEB |
5475 | OPCODE(0x1008) |
5476 | { |
5477 | u32 adr, res; |
5478 | u32 src, dst; |
5479 | |
5480 | // can't read byte from Ax registers ! |
5481 | m68kcontext.execinfo |= M68K_FAULTED; |
5482 | m68kcontext.io_cycle_counter = 0; |
5483 | /* |
5484 | goto famec_Exec_End; |
5485 | flag_C = 0; |
5486 | flag_V = 0; |
5487 | flag_NotZ = res; |
5488 | flag_N = res; |
5489 | DREGu8((Opcode >> 9) & 7) = res; |
5490 | */ |
5491 | RET(4) |
5492 | } |
5493 | |
5494 | // MOVEB |
5495 | OPCODE(0x1088) |
5496 | { |
5497 | u32 adr, res; |
5498 | u32 src, dst; |
5499 | |
5500 | // can't read byte from Ax registers ! |
5501 | m68kcontext.execinfo |= M68K_FAULTED; |
5502 | m68kcontext.io_cycle_counter = 0; |
5503 | /* |
5504 | goto famec_Exec_End; |
5505 | flag_C = 0; |
5506 | flag_V = 0; |
5507 | flag_NotZ = res; |
5508 | flag_N = res; |
5509 | adr = AREG((Opcode >> 9) & 7); |
5510 | PRE_IO |
5511 | WRITE_BYTE_F(adr, res) |
5512 | POST_IO |
5513 | */ |
5514 | RET(8) |
5515 | } |
5516 | |
5517 | // MOVEB |
5518 | OPCODE(0x10C8) |
5519 | { |
5520 | u32 adr, res; |
5521 | u32 src, dst; |
5522 | |
5523 | // can't read byte from Ax registers ! |
5524 | m68kcontext.execinfo |= M68K_FAULTED; |
5525 | m68kcontext.io_cycle_counter = 0; |
5526 | /* |
5527 | goto famec_Exec_End; |
5528 | flag_C = 0; |
5529 | flag_V = 0; |
5530 | flag_NotZ = res; |
5531 | flag_N = res; |
5532 | adr = AREG((Opcode >> 9) & 7); |
5533 | AREG((Opcode >> 9) & 7) += 1; |
5534 | PRE_IO |
5535 | WRITE_BYTE_F(adr, res) |
5536 | POST_IO |
5537 | */ |
5538 | RET(8) |
5539 | } |
5540 | |
5541 | // MOVEB |
5542 | OPCODE(0x1108) |
5543 | { |
5544 | u32 adr, res; |
5545 | u32 src, dst; |
5546 | |
5547 | // can't read byte from Ax registers ! |
5548 | m68kcontext.execinfo |= M68K_FAULTED; |
5549 | m68kcontext.io_cycle_counter = 0; |
5550 | /* |
5551 | goto famec_Exec_End; |
5552 | flag_C = 0; |
5553 | flag_V = 0; |
5554 | flag_NotZ = res; |
5555 | flag_N = res; |
5556 | adr = AREG((Opcode >> 9) & 7) - 1; |
5557 | AREG((Opcode >> 9) & 7) = adr; |
5558 | PRE_IO |
5559 | WRITE_BYTE_F(adr, res) |
5560 | POST_IO |
5561 | */ |
5562 | RET(8) |
5563 | } |
5564 | |
5565 | // MOVEB |
5566 | OPCODE(0x1148) |
5567 | { |
5568 | u32 adr, res; |
5569 | u32 src, dst; |
5570 | |
5571 | // can't read byte from Ax registers ! |
5572 | m68kcontext.execinfo |= M68K_FAULTED; |
5573 | m68kcontext.io_cycle_counter = 0; |
5574 | /* |
5575 | goto famec_Exec_End; |
5576 | flag_C = 0; |
5577 | flag_V = 0; |
5578 | flag_NotZ = res; |
5579 | flag_N = res; |
5580 | FETCH_SWORD(adr); |
5581 | adr += AREG((Opcode >> 9) & 7); |
5582 | PRE_IO |
5583 | WRITE_BYTE_F(adr, res) |
5584 | POST_IO |
5585 | */ |
5586 | RET(12) |
5587 | } |
5588 | |
5589 | // MOVEB |
5590 | OPCODE(0x1188) |
5591 | { |
5592 | u32 adr, res; |
5593 | u32 src, dst; |
5594 | |
5595 | // can't read byte from Ax registers ! |
5596 | m68kcontext.execinfo |= M68K_FAULTED; |
5597 | m68kcontext.io_cycle_counter = 0; |
5598 | /* |
5599 | goto famec_Exec_End; |
5600 | flag_C = 0; |
5601 | flag_V = 0; |
5602 | flag_NotZ = res; |
5603 | flag_N = res; |
5604 | adr = AREG((Opcode >> 9) & 7); |
5605 | DECODE_EXT_WORD |
5606 | PRE_IO |
5607 | WRITE_BYTE_F(adr, res) |
5608 | POST_IO |
5609 | */ |
5610 | RET(14) |
5611 | } |
5612 | |
5613 | // MOVEB |
5614 | OPCODE(0x11C8) |
5615 | { |
5616 | u32 adr, res; |
5617 | u32 src, dst; |
5618 | |
5619 | // can't read byte from Ax registers ! |
5620 | m68kcontext.execinfo |= M68K_FAULTED; |
5621 | m68kcontext.io_cycle_counter = 0; |
5622 | /* |
5623 | goto famec_Exec_End; |
5624 | flag_C = 0; |
5625 | flag_V = 0; |
5626 | flag_NotZ = res; |
5627 | flag_N = res; |
5628 | FETCH_SWORD(adr); |
5629 | PRE_IO |
5630 | WRITE_BYTE_F(adr, res) |
5631 | POST_IO |
5632 | */ |
5633 | RET(12) |
5634 | } |
5635 | |
5636 | // MOVEB |
5637 | OPCODE(0x13C8) |
5638 | { |
5639 | u32 adr, res; |
5640 | u32 src, dst; |
5641 | |
5642 | // can't read byte from Ax registers ! |
5643 | m68kcontext.execinfo |= M68K_FAULTED; |
5644 | m68kcontext.io_cycle_counter = 0; |
5645 | /* |
5646 | goto famec_Exec_End; |
5647 | flag_C = 0; |
5648 | flag_V = 0; |
5649 | flag_NotZ = res; |
5650 | flag_N = res; |
5651 | FETCH_LONG(adr); |
5652 | PRE_IO |
5653 | WRITE_BYTE_F(adr, res) |
5654 | POST_IO |
5655 | */ |
5656 | RET(16) |
5657 | } |
5658 | |
5659 | // MOVEB |
5660 | OPCODE(0x1EC8) |
5661 | { |
5662 | u32 adr, res; |
5663 | u32 src, dst; |
5664 | |
5665 | // can't read byte from Ax registers ! |
5666 | m68kcontext.execinfo |= M68K_FAULTED; |
5667 | m68kcontext.io_cycle_counter = 0; |
5668 | /* |
5669 | goto famec_Exec_End; |
5670 | flag_C = 0; |
5671 | flag_V = 0; |
5672 | flag_NotZ = res; |
5673 | flag_N = res; |
5674 | adr = AREG(7); |
5675 | AREG(7) += 2; |
5676 | PRE_IO |
5677 | WRITE_BYTE_F(adr, res) |
5678 | POST_IO |
5679 | */ |
5680 | RET(8) |
5681 | } |
5682 | |
5683 | // MOVEB |
5684 | OPCODE(0x1F08) |
5685 | { |
5686 | u32 adr, res; |
5687 | u32 src, dst; |
5688 | |
5689 | // can't read byte from Ax registers ! |
5690 | m68kcontext.execinfo |= M68K_FAULTED; |
5691 | m68kcontext.io_cycle_counter = 0; |
5692 | /* |
5693 | goto famec_Exec_End; |
5694 | flag_C = 0; |
5695 | flag_V = 0; |
5696 | flag_NotZ = res; |
5697 | flag_N = res; |
5698 | adr = AREG(7) - 2; |
5699 | AREG(7) = adr; |
5700 | PRE_IO |
5701 | WRITE_BYTE_F(adr, res) |
5702 | POST_IO |
5703 | */ |
5704 | RET(8) |
5705 | } |
03e4f2a3 |
5706 | #endif |
70357ce5 |
5707 | |
5708 | // MOVEB |
5709 | OPCODE(0x1010) |
5710 | { |
5711 | u32 adr, res; |
5712 | u32 src, dst; |
5713 | |
5714 | adr = AREG((Opcode >> 0) & 7); |
5715 | PRE_IO |
5716 | READ_BYTE_F(adr, res) |
5717 | flag_C = 0; |
5718 | flag_V = 0; |
5719 | flag_NotZ = res; |
5720 | flag_N = res; |
5721 | DREGu8((Opcode >> 9) & 7) = res; |
5722 | POST_IO |
5723 | RET(8) |
5724 | } |
5725 | |
5726 | // MOVEB |
5727 | OPCODE(0x1090) |
5728 | { |
5729 | u32 adr, res; |
5730 | u32 src, dst; |
5731 | |
5732 | adr = AREG((Opcode >> 0) & 7); |
5733 | PRE_IO |
5734 | READ_BYTE_F(adr, res) |
5735 | flag_C = 0; |
5736 | flag_V = 0; |
5737 | flag_NotZ = res; |
5738 | flag_N = res; |
5739 | adr = AREG((Opcode >> 9) & 7); |
5740 | WRITE_BYTE_F(adr, res) |
5741 | POST_IO |
5742 | RET(12) |
5743 | } |
5744 | |
5745 | // MOVEB |
5746 | OPCODE(0x10D0) |
5747 | { |
5748 | u32 adr, res; |
5749 | u32 src, dst; |
5750 | |
5751 | adr = AREG((Opcode >> 0) & 7); |
5752 | PRE_IO |
5753 | READ_BYTE_F(adr, res) |
5754 | flag_C = 0; |
5755 | flag_V = 0; |
5756 | flag_NotZ = res; |
5757 | flag_N = res; |
5758 | adr = AREG((Opcode >> 9) & 7); |
5759 | AREG((Opcode >> 9) & 7) += 1; |
5760 | WRITE_BYTE_F(adr, res) |
5761 | POST_IO |
5762 | RET(12) |
5763 | } |
5764 | |
5765 | // MOVEB |
5766 | OPCODE(0x1110) |
5767 | { |
5768 | u32 adr, res; |
5769 | u32 src, dst; |
5770 | |
5771 | adr = AREG((Opcode >> 0) & 7); |
5772 | PRE_IO |
5773 | READ_BYTE_F(adr, res) |
5774 | flag_C = 0; |
5775 | flag_V = 0; |
5776 | flag_NotZ = res; |
5777 | flag_N = res; |
5778 | adr = AREG((Opcode >> 9) & 7) - 1; |
5779 | AREG((Opcode >> 9) & 7) = adr; |
5780 | WRITE_BYTE_F(adr, res) |
5781 | POST_IO |
5782 | RET(12) |
5783 | } |
5784 | |
5785 | // MOVEB |
5786 | OPCODE(0x1150) |
5787 | { |
5788 | u32 adr, res; |
5789 | u32 src, dst; |
5790 | |
5791 | adr = AREG((Opcode >> 0) & 7); |
5792 | PRE_IO |
5793 | READ_BYTE_F(adr, res) |
5794 | flag_C = 0; |
5795 | flag_V = 0; |
5796 | flag_NotZ = res; |
5797 | flag_N = res; |
5798 | FETCH_SWORD(adr); |
5799 | adr += AREG((Opcode >> 9) & 7); |
5800 | WRITE_BYTE_F(adr, res) |
5801 | POST_IO |
5802 | RET(16) |
5803 | } |
5804 | |
5805 | // MOVEB |
5806 | OPCODE(0x1190) |
5807 | { |
5808 | u32 adr, res; |
5809 | u32 src, dst; |
5810 | |
5811 | adr = AREG((Opcode >> 0) & 7); |
5812 | PRE_IO |
5813 | READ_BYTE_F(adr, res) |
5814 | flag_C = 0; |
5815 | flag_V = 0; |
5816 | flag_NotZ = res; |
5817 | flag_N = res; |
5818 | adr = AREG((Opcode >> 9) & 7); |
5819 | DECODE_EXT_WORD |
5820 | WRITE_BYTE_F(adr, res) |
5821 | POST_IO |
5822 | RET(18) |
5823 | } |
5824 | |
5825 | // MOVEB |
5826 | OPCODE(0x11D0) |
5827 | { |
5828 | u32 adr, res; |
5829 | u32 src, dst; |
5830 | |
5831 | adr = AREG((Opcode >> 0) & 7); |
5832 | PRE_IO |
5833 | READ_BYTE_F(adr, res) |
5834 | flag_C = 0; |
5835 | flag_V = 0; |
5836 | flag_NotZ = res; |
5837 | flag_N = res; |
5838 | FETCH_SWORD(adr); |
5839 | WRITE_BYTE_F(adr, res) |
5840 | POST_IO |
5841 | RET(16) |
5842 | } |
5843 | |
5844 | // MOVEB |
5845 | OPCODE(0x13D0) |
5846 | { |
5847 | u32 adr, res; |
5848 | u32 src, dst; |
5849 | |
5850 | adr = AREG((Opcode >> 0) & 7); |
5851 | PRE_IO |
5852 | READ_BYTE_F(adr, res) |
5853 | flag_C = 0; |
5854 | flag_V = 0; |
5855 | flag_NotZ = res; |
5856 | flag_N = res; |
5857 | FETCH_LONG(adr); |
5858 | WRITE_BYTE_F(adr, res) |
5859 | POST_IO |
5860 | RET(20) |
5861 | } |
5862 | |
5863 | // MOVEB |
5864 | OPCODE(0x1ED0) |
5865 | { |
5866 | u32 adr, res; |
5867 | u32 src, dst; |
5868 | |
5869 | adr = AREG((Opcode >> 0) & 7); |
5870 | PRE_IO |
5871 | READ_BYTE_F(adr, res) |
5872 | flag_C = 0; |
5873 | flag_V = 0; |
5874 | flag_NotZ = res; |
5875 | flag_N = res; |
5876 | adr = AREG(7); |
5877 | AREG(7) += 2; |
5878 | WRITE_BYTE_F(adr, res) |
5879 | POST_IO |
5880 | RET(12) |
5881 | } |
5882 | |
5883 | // MOVEB |
5884 | OPCODE(0x1F10) |
5885 | { |
5886 | u32 adr, res; |
5887 | u32 src, dst; |
5888 | |
5889 | adr = AREG((Opcode >> 0) & 7); |
5890 | PRE_IO |
5891 | READ_BYTE_F(adr, res) |
5892 | flag_C = 0; |
5893 | flag_V = 0; |
5894 | flag_NotZ = res; |
5895 | flag_N = res; |
5896 | adr = AREG(7) - 2; |
5897 | AREG(7) = adr; |
5898 | WRITE_BYTE_F(adr, res) |
5899 | POST_IO |
5900 | RET(12) |
5901 | } |
5902 | |
5903 | // MOVEB |
5904 | OPCODE(0x1018) |
5905 | { |
5906 | u32 adr, res; |
5907 | u32 src, dst; |
5908 | |
5909 | adr = AREG((Opcode >> 0) & 7); |
5910 | AREG((Opcode >> 0) & 7) += 1; |
5911 | PRE_IO |
5912 | READ_BYTE_F(adr, res) |
5913 | flag_C = 0; |
5914 | flag_V = 0; |
5915 | flag_NotZ = res; |
5916 | flag_N = res; |
5917 | DREGu8((Opcode >> 9) & 7) = res; |
5918 | POST_IO |
5919 | RET(8) |
5920 | } |
5921 | |
5922 | // MOVEB |
5923 | OPCODE(0x1098) |
5924 | { |
5925 | u32 adr, res; |
5926 | u32 src, dst; |
5927 | |
5928 | adr = AREG((Opcode >> 0) & 7); |
5929 | AREG((Opcode >> 0) & 7) += 1; |
5930 | PRE_IO |
5931 | READ_BYTE_F(adr, res) |
5932 | flag_C = 0; |
5933 | flag_V = 0; |
5934 | flag_NotZ = res; |
5935 | flag_N = res; |
5936 | adr = AREG((Opcode >> 9) & 7); |
5937 | WRITE_BYTE_F(adr, res) |
5938 | POST_IO |
5939 | RET(12) |
5940 | } |
5941 | |
5942 | // MOVEB |
5943 | OPCODE(0x10D8) |
5944 | { |
5945 | u32 adr, res; |
5946 | u32 src, dst; |
5947 | |
5948 | adr = AREG((Opcode >> 0) & 7); |
5949 | AREG((Opcode >> 0) & 7) += 1; |
5950 | PRE_IO |
5951 | READ_BYTE_F(adr, res) |
5952 | flag_C = 0; |
5953 | flag_V = 0; |
5954 | flag_NotZ = res; |
5955 | flag_N = res; |
5956 | adr = AREG((Opcode >> 9) & 7); |
5957 | AREG((Opcode >> 9) & 7) += 1; |
5958 | WRITE_BYTE_F(adr, res) |
5959 | POST_IO |
5960 | RET(12) |
5961 | } |
5962 | |
5963 | // MOVEB |
5964 | OPCODE(0x1118) |
5965 | { |
5966 | u32 adr, res; |
5967 | u32 src, dst; |
5968 | |
5969 | adr = AREG((Opcode >> 0) & 7); |
5970 | AREG((Opcode >> 0) & 7) += 1; |
5971 | PRE_IO |
5972 | READ_BYTE_F(adr, res) |
5973 | flag_C = 0; |
5974 | flag_V = 0; |
5975 | flag_NotZ = res; |
5976 | flag_N = res; |
5977 | adr = AREG((Opcode >> 9) & 7) - 1; |
5978 | AREG((Opcode >> 9) & 7) = adr; |
5979 | WRITE_BYTE_F(adr, res) |
5980 | POST_IO |
5981 | RET(12) |
5982 | } |
5983 | |
5984 | // MOVEB |
5985 | OPCODE(0x1158) |
5986 | { |
5987 | u32 adr, res; |
5988 | u32 src, dst; |
5989 | |
5990 | adr = AREG((Opcode >> 0) & 7); |
5991 | AREG((Opcode >> 0) & 7) += 1; |
5992 | PRE_IO |
5993 | READ_BYTE_F(adr, res) |
5994 | flag_C = 0; |
5995 | flag_V = 0; |
5996 | flag_NotZ = res; |
5997 | flag_N = res; |
5998 | FETCH_SWORD(adr); |
5999 | adr += AREG((Opcode >> 9) & 7); |
6000 | WRITE_BYTE_F(adr, res) |
6001 | POST_IO |
6002 | RET(16) |
6003 | } |
6004 | |
6005 | // MOVEB |
6006 | OPCODE(0x1198) |
6007 | { |
6008 | u32 adr, res; |
6009 | u32 src, dst; |
6010 | |
6011 | adr = AREG((Opcode >> 0) & 7); |
6012 | AREG((Opcode >> 0) & 7) += 1; |
6013 | PRE_IO |
6014 | READ_BYTE_F(adr, res) |
6015 | flag_C = 0; |
6016 | flag_V = 0; |
6017 | flag_NotZ = res; |
6018 | flag_N = res; |
6019 | adr = AREG((Opcode >> 9) & 7); |
6020 | DECODE_EXT_WORD |
6021 | WRITE_BYTE_F(adr, res) |
6022 | POST_IO |
6023 | RET(18) |
6024 | } |
6025 | |
6026 | // MOVEB |
6027 | OPCODE(0x11D8) |
6028 | { |
6029 | u32 adr, res; |
6030 | u32 src, dst; |
6031 | |
6032 | adr = AREG((Opcode >> 0) & 7); |
6033 | AREG((Opcode >> 0) & 7) += 1; |
6034 | PRE_IO |
6035 | READ_BYTE_F(adr, res) |
6036 | flag_C = 0; |
6037 | flag_V = 0; |
6038 | flag_NotZ = res; |
6039 | flag_N = res; |
6040 | FETCH_SWORD(adr); |
6041 | WRITE_BYTE_F(adr, res) |
6042 | POST_IO |
6043 | RET(16) |
6044 | } |
6045 | |
6046 | // MOVEB |
6047 | OPCODE(0x13D8) |
6048 | { |
6049 | u32 adr, res; |
6050 | u32 src, dst; |
6051 | |
6052 | adr = AREG((Opcode >> 0) & 7); |
6053 | AREG((Opcode >> 0) & 7) += 1; |
6054 | PRE_IO |
6055 | READ_BYTE_F(adr, res) |
6056 | flag_C = 0; |
6057 | flag_V = 0; |
6058 | flag_NotZ = res; |
6059 | flag_N = res; |
6060 | FETCH_LONG(adr); |
6061 | WRITE_BYTE_F(adr, res) |
6062 | POST_IO |
6063 | RET(20) |
6064 | } |
6065 | |
6066 | // MOVEB |
6067 | OPCODE(0x1ED8) |
6068 | { |
6069 | u32 adr, res; |
6070 | u32 src, dst; |
6071 | |
6072 | adr = AREG((Opcode >> 0) & 7); |
6073 | AREG((Opcode >> 0) & 7) += 1; |
6074 | PRE_IO |
6075 | READ_BYTE_F(adr, res) |
6076 | flag_C = 0; |
6077 | flag_V = 0; |
6078 | flag_NotZ = res; |
6079 | flag_N = res; |
6080 | adr = AREG(7); |
6081 | AREG(7) += 2; |
6082 | WRITE_BYTE_F(adr, res) |
6083 | POST_IO |
6084 | RET(12) |
6085 | } |
6086 | |
6087 | // MOVEB |
6088 | OPCODE(0x1F18) |
6089 | { |
6090 | u32 adr, res; |
6091 | u32 src, dst; |
6092 | |
6093 | adr = AREG((Opcode >> 0) & 7); |
6094 | AREG((Opcode >> 0) & 7) += 1; |
6095 | PRE_IO |
6096 | READ_BYTE_F(adr, res) |
6097 | flag_C = 0; |
6098 | flag_V = 0; |
6099 | flag_NotZ = res; |
6100 | flag_N = res; |
6101 | adr = AREG(7) - 2; |
6102 | AREG(7) = adr; |
6103 | WRITE_BYTE_F(adr, res) |
6104 | POST_IO |
6105 | RET(12) |
6106 | } |
6107 | |
6108 | // MOVEB |
6109 | OPCODE(0x1020) |
6110 | { |
6111 | u32 adr, res; |
6112 | u32 src, dst; |
6113 | |
6114 | adr = AREG((Opcode >> 0) & 7) - 1; |
6115 | AREG((Opcode >> 0) & 7) = adr; |
6116 | PRE_IO |
6117 | READ_BYTE_F(adr, res) |
6118 | flag_C = 0; |
6119 | flag_V = 0; |
6120 | flag_NotZ = res; |
6121 | flag_N = res; |
6122 | DREGu8((Opcode >> 9) & 7) = res; |
6123 | POST_IO |
6124 | RET(10) |
6125 | } |
6126 | |
6127 | // MOVEB |
6128 | OPCODE(0x10A0) |
6129 | { |
6130 | u32 adr, res; |
6131 | u32 src, dst; |
6132 | |
6133 | adr = AREG((Opcode >> 0) & 7) - 1; |
6134 | AREG((Opcode >> 0) & 7) = adr; |
6135 | PRE_IO |
6136 | READ_BYTE_F(adr, res) |
6137 | flag_C = 0; |
6138 | flag_V = 0; |
6139 | flag_NotZ = res; |
6140 | flag_N = res; |
6141 | adr = AREG((Opcode >> 9) & 7); |
6142 | WRITE_BYTE_F(adr, res) |
6143 | POST_IO |
6144 | RET(14) |
6145 | } |
6146 | |
6147 | // MOVEB |
6148 | OPCODE(0x10E0) |
6149 | { |
6150 | u32 adr, res; |
6151 | u32 src, dst; |
6152 | |
6153 | adr = AREG((Opcode >> 0) & 7) - 1; |
6154 | AREG((Opcode >> 0) & 7) = adr; |
6155 | PRE_IO |
6156 | READ_BYTE_F(adr, res) |
6157 | flag_C = 0; |
6158 | flag_V = 0; |
6159 | flag_NotZ = res; |
6160 | flag_N = res; |
6161 | adr = AREG((Opcode >> 9) & 7); |
6162 | AREG((Opcode >> 9) & 7) += 1; |
6163 | WRITE_BYTE_F(adr, res) |
6164 | POST_IO |
6165 | RET(14) |
6166 | } |
6167 | |
6168 | // MOVEB |
6169 | OPCODE(0x1120) |
6170 | { |
6171 | u32 adr, res; |
6172 | u32 src, dst; |
6173 | |
6174 | adr = AREG((Opcode >> 0) & 7) - 1; |
6175 | AREG((Opcode >> 0) & 7) = adr; |
6176 | PRE_IO |
6177 | READ_BYTE_F(adr, res) |
6178 | flag_C = 0; |
6179 | flag_V = 0; |
6180 | flag_NotZ = res; |
6181 | flag_N = res; |
6182 | adr = AREG((Opcode >> 9) & 7) - 1; |
6183 | AREG((Opcode >> 9) & 7) = adr; |
6184 | WRITE_BYTE_F(adr, res) |
6185 | POST_IO |
6186 | RET(14) |
6187 | } |
6188 | |
6189 | // MOVEB |
6190 | OPCODE(0x1160) |
6191 | { |
6192 | u32 adr, res; |
6193 | u32 src, dst; |
6194 | |
6195 | adr = AREG((Opcode >> 0) & 7) - 1; |
6196 | AREG((Opcode >> 0) & 7) = adr; |
6197 | PRE_IO |
6198 | READ_BYTE_F(adr, res) |
6199 | flag_C = 0; |
6200 | flag_V = 0; |
6201 | flag_NotZ = res; |
6202 | flag_N = res; |
6203 | FETCH_SWORD(adr); |
6204 | adr += AREG((Opcode >> 9) & 7); |
6205 | WRITE_BYTE_F(adr, res) |
6206 | POST_IO |
6207 | RET(18) |
6208 | } |
6209 | |
6210 | // MOVEB |
6211 | OPCODE(0x11A0) |
6212 | { |
6213 | u32 adr, res; |
6214 | u32 src, dst; |
6215 | |
6216 | adr = AREG((Opcode >> 0) & 7) - 1; |
6217 | AREG((Opcode >> 0) & 7) = adr; |
6218 | PRE_IO |
6219 | READ_BYTE_F(adr, res) |
6220 | flag_C = 0; |
6221 | flag_V = 0; |
6222 | flag_NotZ = res; |
6223 | flag_N = res; |
6224 | adr = AREG((Opcode >> 9) & 7); |
6225 | DECODE_EXT_WORD |
6226 | WRITE_BYTE_F(adr, res) |
6227 | POST_IO |
6228 | RET(20) |
6229 | } |
6230 | |
6231 | // MOVEB |
6232 | OPCODE(0x11E0) |
6233 | { |
6234 | u32 adr, res; |
6235 | u32 src, dst; |
6236 | |
6237 | adr = AREG((Opcode >> 0) & 7) - 1; |
6238 | AREG((Opcode >> 0) & 7) = adr; |
6239 | PRE_IO |
6240 | READ_BYTE_F(adr, res) |
6241 | flag_C = 0; |
6242 | flag_V = 0; |
6243 | flag_NotZ = res; |
6244 | flag_N = res; |
6245 | FETCH_SWORD(adr); |
6246 | WRITE_BYTE_F(adr, res) |
6247 | POST_IO |
6248 | RET(18) |
6249 | } |
6250 | |
6251 | // MOVEB |
6252 | OPCODE(0x13E0) |
6253 | { |
6254 | u32 adr, res; |
6255 | u32 src, dst; |
6256 | |
6257 | adr = AREG((Opcode >> 0) & 7) - 1; |
6258 | AREG((Opcode >> 0) & 7) = adr; |
6259 | PRE_IO |
6260 | READ_BYTE_F(adr, res) |
6261 | flag_C = 0; |
6262 | flag_V = 0; |
6263 | flag_NotZ = res; |
6264 | flag_N = res; |
6265 | FETCH_LONG(adr); |
6266 | WRITE_BYTE_F(adr, res) |
6267 | POST_IO |
6268 | RET(22) |
6269 | } |
6270 | |
6271 | // MOVEB |
6272 | OPCODE(0x1EE0) |
6273 | { |
6274 | u32 adr, res; |
6275 | u32 src, dst; |
6276 | |
6277 | adr = AREG((Opcode >> 0) & 7) - 1; |
6278 | AREG((Opcode >> 0) & 7) = adr; |
6279 | PRE_IO |
6280 | READ_BYTE_F(adr, res) |
6281 | flag_C = 0; |
6282 | flag_V = 0; |
6283 | flag_NotZ = res; |
6284 | flag_N = res; |
6285 | adr = AREG(7); |
6286 | AREG(7) += 2; |
6287 | WRITE_BYTE_F(adr, res) |
6288 | POST_IO |
6289 | RET(14) |
6290 | } |
6291 | |
6292 | // MOVEB |
6293 | OPCODE(0x1F20) |
6294 | { |
6295 | u32 adr, res; |
6296 | u32 src, dst; |
6297 | |
6298 | adr = AREG((Opcode >> 0) & 7) - 1; |
6299 | AREG((Opcode >> 0) & 7) = adr; |
6300 | PRE_IO |
6301 | READ_BYTE_F(adr, res) |
6302 | flag_C = 0; |
6303 | flag_V = 0; |
6304 | flag_NotZ = res; |
6305 | flag_N = res; |
6306 | adr = AREG(7) - 2; |
6307 | AREG(7) = adr; |
6308 | WRITE_BYTE_F(adr, res) |
6309 | POST_IO |
6310 | RET(14) |
6311 | } |
6312 | |
6313 | // MOVEB |
6314 | OPCODE(0x1028) |
6315 | { |
6316 | u32 adr, res; |
6317 | u32 src, dst; |
6318 | |
6319 | FETCH_SWORD(adr); |
6320 | adr += AREG((Opcode >> 0) & 7); |
6321 | PRE_IO |
6322 | READ_BYTE_F(adr, res) |
6323 | flag_C = 0; |
6324 | flag_V = 0; |
6325 | flag_NotZ = res; |
6326 | flag_N = res; |
6327 | DREGu8((Opcode >> 9) & 7) = res; |
6328 | POST_IO |
6329 | RET(12) |
6330 | } |
6331 | |
6332 | // MOVEB |
6333 | OPCODE(0x10A8) |
6334 | { |
6335 | u32 adr, res; |
6336 | u32 src, dst; |
6337 | |
6338 | FETCH_SWORD(adr); |
6339 | adr += AREG((Opcode >> 0) & 7); |
6340 | PRE_IO |
6341 | READ_BYTE_F(adr, res) |
6342 | flag_C = 0; |
6343 | flag_V = 0; |
6344 | flag_NotZ = res; |
6345 | flag_N = res; |
6346 | adr = AREG((Opcode >> 9) & 7); |
6347 | WRITE_BYTE_F(adr, res) |
6348 | POST_IO |
6349 | RET(16) |
6350 | } |
6351 | |
6352 | // MOVEB |
6353 | OPCODE(0x10E8) |
6354 | { |
6355 | u32 adr, res; |
6356 | u32 src, dst; |
6357 | |
6358 | FETCH_SWORD(adr); |
6359 | adr += AREG((Opcode >> 0) & 7); |
6360 | PRE_IO |
6361 | READ_BYTE_F(adr, res) |
6362 | flag_C = 0; |
6363 | flag_V = 0; |
6364 | flag_NotZ = res; |
6365 | flag_N = res; |
6366 | adr = AREG((Opcode >> 9) & 7); |
6367 | AREG((Opcode >> 9) & 7) += 1; |
6368 | WRITE_BYTE_F(adr, res) |
6369 | POST_IO |
6370 | RET(16) |
6371 | } |
6372 | |
6373 | // MOVEB |
6374 | OPCODE(0x1128) |
6375 | { |
6376 | u32 adr, res; |
6377 | u32 src, dst; |
6378 | |
6379 | FETCH_SWORD(adr); |
6380 | adr += AREG((Opcode >> 0) & 7); |
6381 | PRE_IO |
6382 | READ_BYTE_F(adr, res) |
6383 | flag_C = 0; |
6384 | flag_V = 0; |
6385 | flag_NotZ = res; |
6386 | flag_N = res; |
6387 | adr = AREG((Opcode >> 9) & 7) - 1; |
6388 | AREG((Opcode >> 9) & 7) = adr; |
6389 | WRITE_BYTE_F(adr, res) |
6390 | POST_IO |
6391 | RET(16) |
6392 | } |
6393 | |
6394 | // MOVEB |
6395 | OPCODE(0x1168) |
6396 | { |
6397 | u32 adr, res; |
6398 | u32 src, dst; |
6399 | |
6400 | FETCH_SWORD(adr); |
6401 | adr += AREG((Opcode >> 0) & 7); |
6402 | PRE_IO |
6403 | READ_BYTE_F(adr, res) |
6404 | flag_C = 0; |
6405 | flag_V = 0; |
6406 | flag_NotZ = res; |
6407 | flag_N = res; |
6408 | FETCH_SWORD(adr); |
6409 | adr += AREG((Opcode >> 9) & 7); |
6410 | WRITE_BYTE_F(adr, res) |
6411 | POST_IO |
6412 | RET(20) |
6413 | } |
6414 | |
6415 | // MOVEB |
6416 | OPCODE(0x11A8) |
6417 | { |
6418 | u32 adr, res; |
6419 | u32 src, dst; |
6420 | |
6421 | FETCH_SWORD(adr); |
6422 | adr += AREG((Opcode >> 0) & 7); |
6423 | PRE_IO |
6424 | READ_BYTE_F(adr, res) |
6425 | flag_C = 0; |
6426 | flag_V = 0; |
6427 | flag_NotZ = res; |
6428 | flag_N = res; |
6429 | adr = AREG((Opcode >> 9) & 7); |
6430 | DECODE_EXT_WORD |
6431 | WRITE_BYTE_F(adr, res) |
6432 | POST_IO |
6433 | RET(22) |
6434 | } |
6435 | |
6436 | // MOVEB |
6437 | OPCODE(0x11E8) |
6438 | { |
6439 | u32 adr, res; |
6440 | u32 src, dst; |
6441 | |
6442 | FETCH_SWORD(adr); |
6443 | adr += AREG((Opcode >> 0) & 7); |
6444 | PRE_IO |
6445 | READ_BYTE_F(adr, res) |
6446 | flag_C = 0; |
6447 | flag_V = 0; |
6448 | flag_NotZ = res; |
6449 | flag_N = res; |
6450 | FETCH_SWORD(adr); |
6451 | WRITE_BYTE_F(adr, res) |
6452 | POST_IO |
6453 | RET(20) |
6454 | } |
6455 | |
6456 | // MOVEB |
6457 | OPCODE(0x13E8) |
6458 | { |
6459 | u32 adr, res; |
6460 | u32 src, dst; |
6461 | |
6462 | FETCH_SWORD(adr); |
6463 | adr += AREG((Opcode >> 0) & 7); |
6464 | PRE_IO |
6465 | READ_BYTE_F(adr, res) |
6466 | flag_C = 0; |
6467 | flag_V = 0; |
6468 | flag_NotZ = res; |
6469 | flag_N = res; |
6470 | FETCH_LONG(adr); |
6471 | WRITE_BYTE_F(adr, res) |
6472 | POST_IO |
6473 | RET(24) |
6474 | } |
6475 | |
6476 | // MOVEB |
6477 | OPCODE(0x1EE8) |
6478 | { |
6479 | u32 adr, res; |
6480 | u32 src, dst; |
6481 | |
6482 | FETCH_SWORD(adr); |
6483 | adr += AREG((Opcode >> 0) & 7); |
6484 | PRE_IO |
6485 | READ_BYTE_F(adr, res) |
6486 | flag_C = 0; |
6487 | flag_V = 0; |
6488 | flag_NotZ = res; |
6489 | flag_N = res; |
6490 | adr = AREG(7); |
6491 | AREG(7) += 2; |
6492 | WRITE_BYTE_F(adr, res) |
6493 | POST_IO |
6494 | RET(16) |
6495 | } |
6496 | |
6497 | // MOVEB |
6498 | OPCODE(0x1F28) |
6499 | { |
6500 | u32 adr, res; |
6501 | u32 src, dst; |
6502 | |
6503 | FETCH_SWORD(adr); |
6504 | adr += AREG((Opcode >> 0) & 7); |
6505 | PRE_IO |
6506 | READ_BYTE_F(adr, res) |
6507 | flag_C = 0; |
6508 | flag_V = 0; |
6509 | flag_NotZ = res; |
6510 | flag_N = res; |
6511 | adr = AREG(7) - 2; |
6512 | AREG(7) = adr; |
6513 | WRITE_BYTE_F(adr, res) |
6514 | POST_IO |
6515 | RET(16) |
6516 | } |
6517 | |
6518 | // MOVEB |
6519 | OPCODE(0x1030) |
6520 | { |
6521 | u32 adr, res; |
6522 | u32 src, dst; |
6523 | |
6524 | adr = AREG((Opcode >> 0) & 7); |
6525 | DECODE_EXT_WORD |
6526 | PRE_IO |
6527 | READ_BYTE_F(adr, res) |
6528 | flag_C = 0; |
6529 | flag_V = 0; |
6530 | flag_NotZ = res; |
6531 | flag_N = res; |
6532 | DREGu8((Opcode >> 9) & 7) = res; |
6533 | POST_IO |
6534 | RET(14) |
6535 | } |
6536 | |
6537 | // MOVEB |
6538 | OPCODE(0x10B0) |
6539 | { |
6540 | u32 adr, res; |
6541 | u32 src, dst; |
6542 | |
6543 | adr = AREG((Opcode >> 0) & 7); |
6544 | DECODE_EXT_WORD |
6545 | PRE_IO |
6546 | READ_BYTE_F(adr, res) |
6547 | flag_C = 0; |
6548 | flag_V = 0; |
6549 | flag_NotZ = res; |
6550 | flag_N = res; |
6551 | adr = AREG((Opcode >> 9) & 7); |
6552 | WRITE_BYTE_F(adr, res) |
6553 | POST_IO |
6554 | RET(18) |
6555 | } |
6556 | |
6557 | // MOVEB |
6558 | OPCODE(0x10F0) |
6559 | { |
6560 | u32 adr, res; |
6561 | u32 src, dst; |
6562 | |
6563 | adr = AREG((Opcode >> 0) & 7); |
6564 | DECODE_EXT_WORD |
6565 | PRE_IO |
6566 | READ_BYTE_F(adr, res) |
6567 | flag_C = 0; |
6568 | flag_V = 0; |
6569 | flag_NotZ = res; |
6570 | flag_N = res; |
6571 | adr = AREG((Opcode >> 9) & 7); |
6572 | AREG((Opcode >> 9) & 7) += 1; |
6573 | WRITE_BYTE_F(adr, res) |
6574 | POST_IO |
6575 | RET(18) |
6576 | } |
6577 | |
6578 | // MOVEB |
6579 | OPCODE(0x1130) |
6580 | { |
6581 | u32 adr, res; |
6582 | u32 src, dst; |
6583 | |
6584 | adr = AREG((Opcode >> 0) & 7); |
6585 | DECODE_EXT_WORD |
6586 | PRE_IO |
6587 | READ_BYTE_F(adr, res) |
6588 | flag_C = 0; |
6589 | flag_V = 0; |
6590 | flag_NotZ = res; |
6591 | flag_N = res; |
6592 | adr = AREG((Opcode >> 9) & 7) - 1; |
6593 | AREG((Opcode >> 9) & 7) = adr; |
6594 | WRITE_BYTE_F(adr, res) |
6595 | POST_IO |
6596 | RET(18) |
6597 | } |
6598 | |
6599 | // MOVEB |
6600 | OPCODE(0x1170) |
6601 | { |
6602 | u32 adr, res; |
6603 | u32 src, dst; |
6604 | |
6605 | adr = AREG((Opcode >> 0) & 7); |
6606 | DECODE_EXT_WORD |
6607 | PRE_IO |
6608 | READ_BYTE_F(adr, res) |
6609 | flag_C = 0; |
6610 | flag_V = 0; |
6611 | flag_NotZ = res; |
6612 | flag_N = res; |
6613 | FETCH_SWORD(adr); |
6614 | adr += AREG((Opcode >> 9) & 7); |
6615 | WRITE_BYTE_F(adr, res) |
6616 | POST_IO |
6617 | RET(22) |
6618 | } |
6619 | |
6620 | // MOVEB |
6621 | OPCODE(0x11B0) |
6622 | { |
6623 | u32 adr, res; |
6624 | u32 src, dst; |
6625 | |
6626 | adr = AREG((Opcode >> 0) & 7); |
6627 | DECODE_EXT_WORD |
6628 | PRE_IO |
6629 | READ_BYTE_F(adr, res) |
6630 | flag_C = 0; |
6631 | flag_V = 0; |
6632 | flag_NotZ = res; |
6633 | flag_N = res; |
6634 | adr = AREG((Opcode >> 9) & 7); |
6635 | DECODE_EXT_WORD |
6636 | WRITE_BYTE_F(adr, res) |
6637 | POST_IO |
6638 | RET(24) |
6639 | } |
6640 | |
6641 | // MOVEB |
6642 | OPCODE(0x11F0) |
6643 | { |
6644 | u32 adr, res; |
6645 | u32 src, dst; |
6646 | |
6647 | adr = AREG((Opcode >> 0) & 7); |
6648 | DECODE_EXT_WORD |
6649 | PRE_IO |
6650 | READ_BYTE_F(adr, res) |
6651 | flag_C = 0; |
6652 | flag_V = 0; |
6653 | flag_NotZ = res; |
6654 | flag_N = res; |
6655 | FETCH_SWORD(adr); |
6656 | WRITE_BYTE_F(adr, res) |
6657 | POST_IO |
6658 | RET(22) |
6659 | } |
6660 | |
6661 | // MOVEB |
6662 | OPCODE(0x13F0) |
6663 | { |
6664 | u32 adr, res; |
6665 | u32 src, dst; |
6666 | |
6667 | adr = AREG((Opcode >> 0) & 7); |
6668 | DECODE_EXT_WORD |
6669 | PRE_IO |
6670 | READ_BYTE_F(adr, res) |
6671 | flag_C = 0; |
6672 | flag_V = 0; |
6673 | flag_NotZ = res; |
6674 | flag_N = res; |
6675 | FETCH_LONG(adr); |
6676 | WRITE_BYTE_F(adr, res) |
6677 | POST_IO |
6678 | RET(26) |
6679 | } |
6680 | |
6681 | // MOVEB |
6682 | OPCODE(0x1EF0) |
6683 | { |
6684 | u32 adr, res; |
6685 | u32 src, dst; |
6686 | |
6687 | adr = AREG((Opcode >> 0) & 7); |
6688 | DECODE_EXT_WORD |
6689 | PRE_IO |
6690 | READ_BYTE_F(adr, res) |
6691 | flag_C = 0; |
6692 | flag_V = 0; |
6693 | flag_NotZ = res; |
6694 | flag_N = res; |
6695 | adr = AREG(7); |
6696 | AREG(7) += 2; |
6697 | WRITE_BYTE_F(adr, res) |
6698 | POST_IO |
6699 | RET(18) |
6700 | } |
6701 | |
6702 | // MOVEB |
6703 | OPCODE(0x1F30) |
6704 | { |
6705 | u32 adr, res; |
6706 | u32 src, dst; |
6707 | |
6708 | adr = AREG((Opcode >> 0) & 7); |
6709 | DECODE_EXT_WORD |
6710 | PRE_IO |
6711 | READ_BYTE_F(adr, res) |
6712 | flag_C = 0; |
6713 | flag_V = 0; |
6714 | flag_NotZ = res; |
6715 | flag_N = res; |
6716 | adr = AREG(7) - 2; |
6717 | AREG(7) = adr; |
6718 | WRITE_BYTE_F(adr, res) |
6719 | POST_IO |
6720 | RET(18) |
6721 | } |
6722 | |
6723 | // MOVEB |
6724 | OPCODE(0x1038) |
6725 | { |
6726 | u32 adr, res; |
6727 | u32 src, dst; |
6728 | |
6729 | FETCH_SWORD(adr); |
6730 | PRE_IO |
6731 | READ_BYTE_F(adr, res) |
6732 | flag_C = 0; |
6733 | flag_V = 0; |
6734 | flag_NotZ = res; |
6735 | flag_N = res; |
6736 | DREGu8((Opcode >> 9) & 7) = res; |
6737 | POST_IO |
6738 | RET(12) |
6739 | } |
6740 | |
6741 | // MOVEB |
6742 | OPCODE(0x10B8) |
6743 | { |
6744 | u32 adr, res; |
6745 | u32 src, dst; |
6746 | |
6747 | FETCH_SWORD(adr); |
6748 | PRE_IO |
6749 | READ_BYTE_F(adr, res) |
6750 | flag_C = 0; |
6751 | flag_V = 0; |
6752 | flag_NotZ = res; |
6753 | flag_N = res; |
6754 | adr = AREG((Opcode >> 9) & 7); |
6755 | WRITE_BYTE_F(adr, res) |
6756 | POST_IO |
6757 | RET(16) |
6758 | } |
6759 | |
6760 | // MOVEB |
6761 | OPCODE(0x10F8) |
6762 | { |
6763 | u32 adr, res; |
6764 | u32 src, dst; |
6765 | |
6766 | FETCH_SWORD(adr); |
6767 | PRE_IO |
6768 | READ_BYTE_F(adr, res) |
6769 | flag_C = 0; |
6770 | flag_V = 0; |
6771 | flag_NotZ = res; |
6772 | flag_N = res; |
6773 | adr = AREG((Opcode >> 9) & 7); |
6774 | AREG((Opcode >> 9) & 7) += 1; |
6775 | WRITE_BYTE_F(adr, res) |
6776 | POST_IO |
6777 | RET(16) |
6778 | } |
6779 | |
6780 | // MOVEB |
6781 | OPCODE(0x1138) |
6782 | { |
6783 | u32 adr, res; |
6784 | u32 src, dst; |
6785 | |
6786 | FETCH_SWORD(adr); |
6787 | PRE_IO |
6788 | READ_BYTE_F(adr, res) |
6789 | flag_C = 0; |
6790 | flag_V = 0; |
6791 | flag_NotZ = res; |
6792 | flag_N = res; |
6793 | adr = AREG((Opcode >> 9) & 7) - 1; |
6794 | AREG((Opcode >> 9) & 7) = adr; |
6795 | WRITE_BYTE_F(adr, res) |
6796 | POST_IO |
6797 | RET(16) |
6798 | } |
6799 | |
6800 | // MOVEB |
6801 | OPCODE(0x1178) |
6802 | { |
6803 | u32 adr, res; |
6804 | u32 src, dst; |
6805 | |
6806 | FETCH_SWORD(adr); |
6807 | PRE_IO |
6808 | READ_BYTE_F(adr, res) |
6809 | flag_C = 0; |
6810 | flag_V = 0; |
6811 | flag_NotZ = res; |
6812 | flag_N = res; |
6813 | FETCH_SWORD(adr); |
6814 | adr += AREG((Opcode >> 9) & 7); |
6815 | WRITE_BYTE_F(adr, res) |
6816 | POST_IO |
6817 | RET(20) |
6818 | } |
6819 | |
6820 | // MOVEB |
6821 | OPCODE(0x11B8) |
6822 | { |
6823 | u32 adr, res; |
6824 | u32 src, dst; |
6825 | |
6826 | FETCH_SWORD(adr); |
6827 | PRE_IO |
6828 | READ_BYTE_F(adr, res) |
6829 | flag_C = 0; |
6830 | flag_V = 0; |
6831 | flag_NotZ = res; |
6832 | flag_N = res; |
6833 | adr = AREG((Opcode >> 9) & 7); |
6834 | DECODE_EXT_WORD |
6835 | WRITE_BYTE_F(adr, res) |
6836 | POST_IO |
6837 | RET(22) |
6838 | } |
6839 | |
6840 | // MOVEB |
6841 | OPCODE(0x11F8) |
6842 | { |
6843 | u32 adr, res; |
6844 | u32 src, dst; |
6845 | |
6846 | FETCH_SWORD(adr); |
6847 | PRE_IO |
6848 | READ_BYTE_F(adr, res) |
6849 | flag_C = 0; |
6850 | flag_V = 0; |
6851 | flag_NotZ = res; |
6852 | flag_N = res; |
6853 | FETCH_SWORD(adr); |
6854 | WRITE_BYTE_F(adr, res) |
6855 | POST_IO |
6856 | RET(20) |
6857 | } |
6858 | |
6859 | // MOVEB |
6860 | OPCODE(0x13F8) |
6861 | { |
6862 | u32 adr, res; |
6863 | u32 src, dst; |
6864 | |
6865 | FETCH_SWORD(adr); |
6866 | PRE_IO |
6867 | READ_BYTE_F(adr, res) |
6868 | flag_C = 0; |
6869 | flag_V = 0; |
6870 | flag_NotZ = res; |
6871 | flag_N = res; |
6872 | FETCH_LONG(adr); |
6873 | WRITE_BYTE_F(adr, res) |
6874 | POST_IO |
6875 | RET(24) |
6876 | } |
6877 | |
6878 | // MOVEB |
6879 | OPCODE(0x1EF8) |
6880 | { |
6881 | u32 adr, res; |
6882 | u32 src, dst; |
6883 | |
6884 | FETCH_SWORD(adr); |
6885 | PRE_IO |
6886 | READ_BYTE_F(adr, res) |
6887 | flag_C = 0; |
6888 | flag_V = 0; |
6889 | flag_NotZ = res; |
6890 | flag_N = res; |
6891 | adr = AREG(7); |
6892 | AREG(7) += 2; |
6893 | WRITE_BYTE_F(adr, res) |
6894 | POST_IO |
6895 | RET(16) |
6896 | } |
6897 | |
6898 | // MOVEB |
6899 | OPCODE(0x1F38) |
6900 | { |
6901 | u32 adr, res; |
6902 | u32 src, dst; |
6903 | |
6904 | FETCH_SWORD(adr); |
6905 | PRE_IO |
6906 | READ_BYTE_F(adr, res) |
6907 | flag_C = 0; |
6908 | flag_V = 0; |
6909 | flag_NotZ = res; |
6910 | flag_N = res; |
6911 | adr = AREG(7) - 2; |
6912 | AREG(7) = adr; |
6913 | WRITE_BYTE_F(adr, res) |
6914 | POST_IO |
6915 | RET(16) |
6916 | } |
6917 | |
6918 | // MOVEB |
6919 | OPCODE(0x1039) |
6920 | { |
6921 | u32 adr, res; |
6922 | u32 src, dst; |
6923 | |
6924 | FETCH_LONG(adr); |
6925 | PRE_IO |
6926 | READ_BYTE_F(adr, res) |
6927 | flag_C = 0; |
6928 | flag_V = 0; |
6929 | flag_NotZ = res; |
6930 | flag_N = res; |
6931 | DREGu8((Opcode >> 9) & 7) = res; |
6932 | POST_IO |
6933 | RET(16) |
6934 | } |
6935 | |
6936 | // MOVEB |
6937 | OPCODE(0x10B9) |
6938 | { |
6939 | u32 adr, res; |
6940 | u32 src, dst; |
6941 | |
6942 | FETCH_LONG(adr); |
6943 | PRE_IO |
6944 | READ_BYTE_F(adr, res) |
6945 | flag_C = 0; |
6946 | flag_V = 0; |
6947 | flag_NotZ = res; |
6948 | flag_N = res; |
6949 | adr = AREG((Opcode >> 9) & 7); |
6950 | WRITE_BYTE_F(adr, res) |
6951 | POST_IO |
6952 | RET(20) |
6953 | } |
6954 | |
6955 | // MOVEB |
6956 | OPCODE(0x10F9) |
6957 | { |
6958 | u32 adr, res; |
6959 | u32 src, dst; |
6960 | |
6961 | FETCH_LONG(adr); |
6962 | PRE_IO |
6963 | READ_BYTE_F(adr, res) |
6964 | flag_C = 0; |
6965 | flag_V = 0; |
6966 | flag_NotZ = res; |
6967 | flag_N = res; |
6968 | adr = AREG((Opcode >> 9) & 7); |
6969 | AREG((Opcode >> 9) & 7) += 1; |
6970 | WRITE_BYTE_F(adr, res) |
6971 | POST_IO |
6972 | RET(20) |
6973 | } |
6974 | |
6975 | // MOVEB |
6976 | OPCODE(0x1139) |
6977 | { |
6978 | u32 adr, res; |
6979 | u32 src, dst; |
6980 | |
6981 | FETCH_LONG(adr); |
6982 | PRE_IO |
6983 | READ_BYTE_F(adr, res) |
6984 | flag_C = 0; |
6985 | flag_V = 0; |
6986 | flag_NotZ = res; |
6987 | flag_N = res; |
6988 | adr = AREG((Opcode >> 9) & 7) - 1; |
6989 | AREG((Opcode >> 9) & 7) = adr; |
6990 | WRITE_BYTE_F(adr, res) |
6991 | POST_IO |
6992 | RET(20) |
6993 | } |
6994 | |
6995 | // MOVEB |
6996 | OPCODE(0x1179) |
6997 | { |
6998 | u32 adr, res; |
6999 | u32 src, dst; |
7000 | |
7001 | FETCH_LONG(adr); |
7002 | PRE_IO |
7003 | READ_BYTE_F(adr, res) |
7004 | flag_C = 0; |
7005 | flag_V = 0; |
7006 | flag_NotZ = res; |
7007 | flag_N = res; |
7008 | FETCH_SWORD(adr); |
7009 | adr += AREG((Opcode >> 9) & 7); |
7010 | WRITE_BYTE_F(adr, res) |
7011 | POST_IO |
7012 | RET(24) |
7013 | } |
7014 | |
7015 | // MOVEB |
7016 | OPCODE(0x11B9) |
7017 | { |
7018 | u32 adr, res; |
7019 | u32 src, dst; |
7020 | |
7021 | FETCH_LONG(adr); |
7022 | PRE_IO |
7023 | READ_BYTE_F(adr, res) |
7024 | flag_C = 0; |
7025 | flag_V = 0; |
7026 | flag_NotZ = res; |
7027 | flag_N = res; |
7028 | adr = AREG((Opcode >> 9) & 7); |
7029 | DECODE_EXT_WORD |
7030 | WRITE_BYTE_F(adr, res) |
7031 | POST_IO |
7032 | RET(26) |
7033 | } |
7034 | |
7035 | // MOVEB |
7036 | OPCODE(0x11F9) |
7037 | { |
7038 | u32 adr, res; |
7039 | u32 src, dst; |
7040 | |
7041 | FETCH_LONG(adr); |
7042 | PRE_IO |
7043 | READ_BYTE_F(adr, res) |
7044 | flag_C = 0; |
7045 | flag_V = 0; |
7046 | flag_NotZ = res; |
7047 | flag_N = res; |
7048 | FETCH_SWORD(adr); |
7049 | WRITE_BYTE_F(adr, res) |
7050 | POST_IO |
7051 | RET(24) |
7052 | } |
7053 | |
7054 | // MOVEB |
7055 | OPCODE(0x13F9) |
7056 | { |
7057 | u32 adr, res; |
7058 | u32 src, dst; |
7059 | |
7060 | FETCH_LONG(adr); |
7061 | PRE_IO |
7062 | READ_BYTE_F(adr, res) |
7063 | flag_C = 0; |
7064 | flag_V = 0; |
7065 | flag_NotZ = res; |
7066 | flag_N = res; |
7067 | FETCH_LONG(adr); |
7068 | WRITE_BYTE_F(adr, res) |
7069 | POST_IO |
7070 | RET(28) |
7071 | } |
7072 | |
7073 | // MOVEB |
7074 | OPCODE(0x1EF9) |
7075 | { |
7076 | u32 adr, res; |
7077 | u32 src, dst; |
7078 | |
7079 | FETCH_LONG(adr); |
7080 | PRE_IO |
7081 | READ_BYTE_F(adr, res) |
7082 | flag_C = 0; |
7083 | flag_V = 0; |
7084 | flag_NotZ = res; |
7085 | flag_N = res; |
7086 | adr = AREG(7); |
7087 | AREG(7) += 2; |
7088 | WRITE_BYTE_F(adr, res) |
7089 | POST_IO |
7090 | RET(20) |
7091 | } |
7092 | |
7093 | // MOVEB |
7094 | OPCODE(0x1F39) |
7095 | { |
7096 | u32 adr, res; |
7097 | u32 src, dst; |
7098 | |
7099 | FETCH_LONG(adr); |
7100 | PRE_IO |
7101 | READ_BYTE_F(adr, res) |
7102 | flag_C = 0; |
7103 | flag_V = 0; |
7104 | flag_NotZ = res; |
7105 | flag_N = res; |
7106 | adr = AREG(7) - 2; |
7107 | AREG(7) = adr; |
7108 | WRITE_BYTE_F(adr, res) |
7109 | POST_IO |
7110 | RET(20) |
7111 | } |
7112 | |
7113 | // MOVEB |
7114 | OPCODE(0x103A) |
7115 | { |
7116 | u32 adr, res; |
7117 | u32 src, dst; |
7118 | |
7119 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7120 | PC++; |
7121 | PRE_IO |
7122 | READ_BYTE_F(adr, res) |
7123 | flag_C = 0; |
7124 | flag_V = 0; |
7125 | flag_NotZ = res; |
7126 | flag_N = res; |
7127 | DREGu8((Opcode >> 9) & 7) = res; |
7128 | POST_IO |
7129 | RET(12) |
7130 | } |
7131 | |
7132 | // MOVEB |
7133 | OPCODE(0x10BA) |
7134 | { |
7135 | u32 adr, res; |
7136 | u32 src, dst; |
7137 | |
7138 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7139 | PC++; |
7140 | PRE_IO |
7141 | READ_BYTE_F(adr, res) |
7142 | flag_C = 0; |
7143 | flag_V = 0; |
7144 | flag_NotZ = res; |
7145 | flag_N = res; |
7146 | adr = AREG((Opcode >> 9) & 7); |
7147 | WRITE_BYTE_F(adr, res) |
7148 | POST_IO |
7149 | RET(16) |
7150 | } |
7151 | |
7152 | // MOVEB |
7153 | OPCODE(0x10FA) |
7154 | { |
7155 | u32 adr, res; |
7156 | u32 src, dst; |
7157 | |
7158 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7159 | PC++; |
7160 | PRE_IO |
7161 | READ_BYTE_F(adr, res) |
7162 | flag_C = 0; |
7163 | flag_V = 0; |
7164 | flag_NotZ = res; |
7165 | flag_N = res; |
7166 | adr = AREG((Opcode >> 9) & 7); |
7167 | AREG((Opcode >> 9) & 7) += 1; |
7168 | WRITE_BYTE_F(adr, res) |
7169 | POST_IO |
7170 | RET(16) |
7171 | } |
7172 | |
7173 | // MOVEB |
7174 | OPCODE(0x113A) |
7175 | { |
7176 | u32 adr, res; |
7177 | u32 src, dst; |
7178 | |
7179 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7180 | PC++; |
7181 | PRE_IO |
7182 | READ_BYTE_F(adr, res) |
7183 | flag_C = 0; |
7184 | flag_V = 0; |
7185 | flag_NotZ = res; |
7186 | flag_N = res; |
7187 | adr = AREG((Opcode >> 9) & 7) - 1; |
7188 | AREG((Opcode >> 9) & 7) = adr; |
7189 | WRITE_BYTE_F(adr, res) |
7190 | POST_IO |
7191 | RET(16) |
7192 | } |
7193 | |
7194 | // MOVEB |
7195 | OPCODE(0x117A) |
7196 | { |
7197 | u32 adr, res; |
7198 | u32 src, dst; |
7199 | |
7200 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7201 | PC++; |
7202 | PRE_IO |
7203 | READ_BYTE_F(adr, res) |
7204 | flag_C = 0; |
7205 | flag_V = 0; |
7206 | flag_NotZ = res; |
7207 | flag_N = res; |
7208 | FETCH_SWORD(adr); |
7209 | adr += AREG((Opcode >> 9) & 7); |
7210 | WRITE_BYTE_F(adr, res) |
7211 | POST_IO |
7212 | RET(20) |
7213 | } |
7214 | |
7215 | // MOVEB |
7216 | OPCODE(0x11BA) |
7217 | { |
7218 | u32 adr, res; |
7219 | u32 src, dst; |
7220 | |
7221 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7222 | PC++; |
7223 | PRE_IO |
7224 | READ_BYTE_F(adr, res) |
7225 | flag_C = 0; |
7226 | flag_V = 0; |
7227 | flag_NotZ = res; |
7228 | flag_N = res; |
7229 | adr = AREG((Opcode >> 9) & 7); |
7230 | DECODE_EXT_WORD |
7231 | WRITE_BYTE_F(adr, res) |
7232 | POST_IO |
7233 | RET(22) |
7234 | } |
7235 | |
7236 | // MOVEB |
7237 | OPCODE(0x11FA) |
7238 | { |
7239 | u32 adr, res; |
7240 | u32 src, dst; |
7241 | |
7242 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7243 | PC++; |
7244 | PRE_IO |
7245 | READ_BYTE_F(adr, res) |
7246 | flag_C = 0; |
7247 | flag_V = 0; |
7248 | flag_NotZ = res; |
7249 | flag_N = res; |
7250 | FETCH_SWORD(adr); |
7251 | WRITE_BYTE_F(adr, res) |
7252 | POST_IO |
7253 | RET(20) |
7254 | } |
7255 | |
7256 | // MOVEB |
7257 | OPCODE(0x13FA) |
7258 | { |
7259 | u32 adr, res; |
7260 | u32 src, dst; |
7261 | |
7262 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7263 | PC++; |
7264 | PRE_IO |
7265 | READ_BYTE_F(adr, res) |
7266 | flag_C = 0; |
7267 | flag_V = 0; |
7268 | flag_NotZ = res; |
7269 | flag_N = res; |
7270 | FETCH_LONG(adr); |
7271 | WRITE_BYTE_F(adr, res) |
7272 | POST_IO |
7273 | RET(24) |
7274 | } |
7275 | |
7276 | // MOVEB |
7277 | OPCODE(0x1EFA) |
7278 | { |
7279 | u32 adr, res; |
7280 | u32 src, dst; |
7281 | |
7282 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7283 | PC++; |
7284 | PRE_IO |
7285 | READ_BYTE_F(adr, res) |
7286 | flag_C = 0; |
7287 | flag_V = 0; |
7288 | flag_NotZ = res; |
7289 | flag_N = res; |
7290 | adr = AREG(7); |
7291 | AREG(7) += 2; |
7292 | WRITE_BYTE_F(adr, res) |
7293 | POST_IO |
7294 | RET(16) |
7295 | } |
7296 | |
7297 | // MOVEB |
7298 | OPCODE(0x1F3A) |
7299 | { |
7300 | u32 adr, res; |
7301 | u32 src, dst; |
7302 | |
7303 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7304 | PC++; |
7305 | PRE_IO |
7306 | READ_BYTE_F(adr, res) |
7307 | flag_C = 0; |
7308 | flag_V = 0; |
7309 | flag_NotZ = res; |
7310 | flag_N = res; |
7311 | adr = AREG(7) - 2; |
7312 | AREG(7) = adr; |
7313 | WRITE_BYTE_F(adr, res) |
7314 | POST_IO |
7315 | RET(16) |
7316 | } |
7317 | |
7318 | // MOVEB |
7319 | OPCODE(0x103B) |
7320 | { |
7321 | u32 adr, res; |
7322 | u32 src, dst; |
7323 | |
7324 | adr = (u32)(PC) - BasePC; |
7325 | DECODE_EXT_WORD |
7326 | PRE_IO |
7327 | READ_BYTE_F(adr, res) |
7328 | flag_C = 0; |
7329 | flag_V = 0; |
7330 | flag_NotZ = res; |
7331 | flag_N = res; |
7332 | DREGu8((Opcode >> 9) & 7) = res; |
7333 | POST_IO |
7334 | RET(14) |
7335 | } |
7336 | |
7337 | // MOVEB |
7338 | OPCODE(0x10BB) |
7339 | { |
7340 | u32 adr, res; |
7341 | u32 src, dst; |
7342 | |
7343 | adr = (u32)(PC) - BasePC; |
7344 | DECODE_EXT_WORD |
7345 | PRE_IO |
7346 | READ_BYTE_F(adr, res) |
7347 | flag_C = 0; |
7348 | flag_V = 0; |
7349 | flag_NotZ = res; |
7350 | flag_N = res; |
7351 | adr = AREG((Opcode >> 9) & 7); |
7352 | WRITE_BYTE_F(adr, res) |
7353 | POST_IO |
7354 | RET(18) |
7355 | } |
7356 | |
7357 | // MOVEB |
7358 | OPCODE(0x10FB) |
7359 | { |
7360 | u32 adr, res; |
7361 | u32 src, dst; |
7362 | |
7363 | adr = (u32)(PC) - BasePC; |
7364 | DECODE_EXT_WORD |
7365 | PRE_IO |
7366 | READ_BYTE_F(adr, res) |
7367 | flag_C = 0; |
7368 | flag_V = 0; |
7369 | flag_NotZ = res; |
7370 | flag_N = res; |
7371 | adr = AREG((Opcode >> 9) & 7); |
7372 | AREG((Opcode >> 9) & 7) += 1; |
7373 | WRITE_BYTE_F(adr, res) |
7374 | POST_IO |
7375 | RET(18) |
7376 | } |
7377 | |
7378 | // MOVEB |
7379 | OPCODE(0x113B) |
7380 | { |
7381 | u32 adr, res; |
7382 | u32 src, dst; |
7383 | |
7384 | adr = (u32)(PC) - BasePC; |
7385 | DECODE_EXT_WORD |
7386 | PRE_IO |
7387 | READ_BYTE_F(adr, res) |
7388 | flag_C = 0; |
7389 | flag_V = 0; |
7390 | flag_NotZ = res; |
7391 | flag_N = res; |
7392 | adr = AREG((Opcode >> 9) & 7) - 1; |
7393 | AREG((Opcode >> 9) & 7) = adr; |
7394 | WRITE_BYTE_F(adr, res) |
7395 | POST_IO |
7396 | RET(18) |
7397 | } |
7398 | |
7399 | // MOVEB |
7400 | OPCODE(0x117B) |
7401 | { |
7402 | u32 adr, res; |
7403 | u32 src, dst; |
7404 | |
7405 | adr = (u32)(PC) - BasePC; |
7406 | DECODE_EXT_WORD |
7407 | PRE_IO |
7408 | READ_BYTE_F(adr, res) |
7409 | flag_C = 0; |
7410 | flag_V = 0; |
7411 | flag_NotZ = res; |
7412 | flag_N = res; |
7413 | FETCH_SWORD(adr); |
7414 | adr += AREG((Opcode >> 9) & 7); |
7415 | WRITE_BYTE_F(adr, res) |
7416 | POST_IO |
7417 | RET(22) |
7418 | } |
7419 | |
7420 | // MOVEB |
7421 | OPCODE(0x11BB) |
7422 | { |
7423 | u32 adr, res; |
7424 | u32 src, dst; |
7425 | |
7426 | adr = (u32)(PC) - BasePC; |
7427 | DECODE_EXT_WORD |
7428 | PRE_IO |
7429 | READ_BYTE_F(adr, res) |
7430 | flag_C = 0; |
7431 | flag_V = 0; |
7432 | flag_NotZ = res; |
7433 | flag_N = res; |
7434 | adr = AREG((Opcode >> 9) & 7); |
7435 | DECODE_EXT_WORD |
7436 | WRITE_BYTE_F(adr, res) |
7437 | POST_IO |
7438 | RET(24) |
7439 | } |
7440 | |
7441 | // MOVEB |
7442 | OPCODE(0x11FB) |
7443 | { |
7444 | u32 adr, res; |
7445 | u32 src, dst; |
7446 | |
7447 | adr = (u32)(PC) - BasePC; |
7448 | DECODE_EXT_WORD |
7449 | PRE_IO |
7450 | READ_BYTE_F(adr, res) |
7451 | flag_C = 0; |
7452 | flag_V = 0; |
7453 | flag_NotZ = res; |
7454 | flag_N = res; |
7455 | FETCH_SWORD(adr); |
7456 | WRITE_BYTE_F(adr, res) |
7457 | POST_IO |
7458 | RET(22) |
7459 | } |
7460 | |
7461 | // MOVEB |
7462 | OPCODE(0x13FB) |
7463 | { |
7464 | u32 adr, res; |
7465 | u32 src, dst; |
7466 | |
7467 | adr = (u32)(PC) - BasePC; |
7468 | DECODE_EXT_WORD |
7469 | PRE_IO |
7470 | READ_BYTE_F(adr, res) |
7471 | flag_C = 0; |
7472 | flag_V = 0; |
7473 | flag_NotZ = res; |
7474 | flag_N = res; |
7475 | FETCH_LONG(adr); |
7476 | WRITE_BYTE_F(adr, res) |
7477 | POST_IO |
7478 | RET(26) |
7479 | } |
7480 | |
7481 | // MOVEB |
7482 | OPCODE(0x1EFB) |
7483 | { |
7484 | u32 adr, res; |
7485 | u32 src, dst; |
7486 | |
7487 | adr = (u32)(PC) - BasePC; |
7488 | DECODE_EXT_WORD |
7489 | PRE_IO |
7490 | READ_BYTE_F(adr, res) |
7491 | flag_C = 0; |
7492 | flag_V = 0; |
7493 | flag_NotZ = res; |
7494 | flag_N = res; |
7495 | adr = AREG(7); |
7496 | AREG(7) += 2; |
7497 | WRITE_BYTE_F(adr, res) |
7498 | POST_IO |
7499 | RET(18) |
7500 | } |
7501 | |
7502 | // MOVEB |
7503 | OPCODE(0x1F3B) |
7504 | { |
7505 | u32 adr, res; |
7506 | u32 src, dst; |
7507 | |
7508 | adr = (u32)(PC) - BasePC; |
7509 | DECODE_EXT_WORD |
7510 | PRE_IO |
7511 | READ_BYTE_F(adr, res) |
7512 | flag_C = 0; |
7513 | flag_V = 0; |
7514 | flag_NotZ = res; |
7515 | flag_N = res; |
7516 | adr = AREG(7) - 2; |
7517 | AREG(7) = adr; |
7518 | WRITE_BYTE_F(adr, res) |
7519 | POST_IO |
7520 | RET(18) |
7521 | } |
7522 | |
7523 | // MOVEB |
7524 | OPCODE(0x103C) |
7525 | { |
7526 | u32 adr, res; |
7527 | u32 src, dst; |
7528 | |
7529 | FETCH_BYTE(res); |
7530 | flag_C = 0; |
7531 | flag_V = 0; |
7532 | flag_NotZ = res; |
7533 | flag_N = res; |
7534 | DREGu8((Opcode >> 9) & 7) = res; |
7535 | RET(8) |
7536 | } |
7537 | |
7538 | // MOVEB |
7539 | OPCODE(0x10BC) |
7540 | { |
7541 | u32 adr, res; |
7542 | u32 src, dst; |
7543 | |
7544 | FETCH_BYTE(res); |
7545 | flag_C = 0; |
7546 | flag_V = 0; |
7547 | flag_NotZ = res; |
7548 | flag_N = res; |
7549 | adr = AREG((Opcode >> 9) & 7); |
7550 | PRE_IO |
7551 | WRITE_BYTE_F(adr, res) |
7552 | POST_IO |
7553 | RET(12) |
7554 | } |
7555 | |
7556 | // MOVEB |
7557 | OPCODE(0x10FC) |
7558 | { |
7559 | u32 adr, res; |
7560 | u32 src, dst; |
7561 | |
7562 | FETCH_BYTE(res); |
7563 | flag_C = 0; |
7564 | flag_V = 0; |
7565 | flag_NotZ = res; |
7566 | flag_N = res; |
7567 | adr = AREG((Opcode >> 9) & 7); |
7568 | AREG((Opcode >> 9) & 7) += 1; |
7569 | PRE_IO |
7570 | WRITE_BYTE_F(adr, res) |
7571 | POST_IO |
7572 | RET(12) |
7573 | } |
7574 | |
7575 | // MOVEB |
7576 | OPCODE(0x113C) |
7577 | { |
7578 | u32 adr, res; |
7579 | u32 src, dst; |
7580 | |
7581 | FETCH_BYTE(res); |
7582 | flag_C = 0; |
7583 | flag_V = 0; |
7584 | flag_NotZ = res; |
7585 | flag_N = res; |
7586 | adr = AREG((Opcode >> 9) & 7) - 1; |
7587 | AREG((Opcode >> 9) & 7) = adr; |
7588 | PRE_IO |
7589 | WRITE_BYTE_F(adr, res) |
7590 | POST_IO |
7591 | RET(12) |
7592 | } |
7593 | |
7594 | // MOVEB |
7595 | OPCODE(0x117C) |
7596 | { |
7597 | u32 adr, res; |
7598 | u32 src, dst; |
7599 | |
7600 | FETCH_BYTE(res); |
7601 | flag_C = 0; |
7602 | flag_V = 0; |
7603 | flag_NotZ = res; |
7604 | flag_N = res; |
7605 | FETCH_SWORD(adr); |
7606 | adr += AREG((Opcode >> 9) & 7); |
7607 | PRE_IO |
7608 | WRITE_BYTE_F(adr, res) |
7609 | POST_IO |
7610 | RET(16) |
7611 | } |
7612 | |
7613 | // MOVEB |
7614 | OPCODE(0x11BC) |
7615 | { |
7616 | u32 adr, res; |
7617 | u32 src, dst; |
7618 | |
7619 | FETCH_BYTE(res); |
7620 | flag_C = 0; |
7621 | flag_V = 0; |
7622 | flag_NotZ = res; |
7623 | flag_N = res; |
7624 | adr = AREG((Opcode >> 9) & 7); |
7625 | DECODE_EXT_WORD |
7626 | PRE_IO |
7627 | WRITE_BYTE_F(adr, res) |
7628 | POST_IO |
7629 | RET(18) |
7630 | } |
7631 | |
7632 | // MOVEB |
7633 | OPCODE(0x11FC) |
7634 | { |
7635 | u32 adr, res; |
7636 | u32 src, dst; |
7637 | |
7638 | FETCH_BYTE(res); |
7639 | flag_C = 0; |
7640 | flag_V = 0; |
7641 | flag_NotZ = res; |
7642 | flag_N = res; |
7643 | FETCH_SWORD(adr); |
7644 | PRE_IO |
7645 | WRITE_BYTE_F(adr, res) |
7646 | POST_IO |
7647 | RET(16) |
7648 | } |
7649 | |
7650 | // MOVEB |
7651 | OPCODE(0x13FC) |
7652 | { |
7653 | u32 adr, res; |
7654 | u32 src, dst; |
7655 | |
7656 | FETCH_BYTE(res); |
7657 | flag_C = 0; |
7658 | flag_V = 0; |
7659 | flag_NotZ = res; |
7660 | flag_N = res; |
7661 | FETCH_LONG(adr); |
7662 | PRE_IO |
7663 | WRITE_BYTE_F(adr, res) |
7664 | POST_IO |
7665 | RET(20) |
7666 | } |
7667 | |
7668 | // MOVEB |
7669 | OPCODE(0x1EFC) |
7670 | { |
7671 | u32 adr, res; |
7672 | u32 src, dst; |
7673 | |
7674 | FETCH_BYTE(res); |
7675 | flag_C = 0; |
7676 | flag_V = 0; |
7677 | flag_NotZ = res; |
7678 | flag_N = res; |
7679 | adr = AREG(7); |
7680 | AREG(7) += 2; |
7681 | PRE_IO |
7682 | WRITE_BYTE_F(adr, res) |
7683 | POST_IO |
7684 | RET(12) |
7685 | } |
7686 | |
7687 | // MOVEB |
7688 | OPCODE(0x1F3C) |
7689 | { |
7690 | u32 adr, res; |
7691 | u32 src, dst; |
7692 | |
7693 | FETCH_BYTE(res); |
7694 | flag_C = 0; |
7695 | flag_V = 0; |
7696 | flag_NotZ = res; |
7697 | flag_N = res; |
7698 | adr = AREG(7) - 2; |
7699 | AREG(7) = adr; |
7700 | PRE_IO |
7701 | WRITE_BYTE_F(adr, res) |
7702 | POST_IO |
7703 | RET(12) |
7704 | } |
7705 | |
7706 | // MOVEB |
7707 | OPCODE(0x101F) |
7708 | { |
7709 | u32 adr, res; |
7710 | u32 src, dst; |
7711 | |
7712 | adr = AREG(7); |
7713 | AREG(7) += 2; |
7714 | PRE_IO |
7715 | READ_BYTE_F(adr, res) |
7716 | flag_C = 0; |
7717 | flag_V = 0; |
7718 | flag_NotZ = res; |
7719 | flag_N = res; |
7720 | DREGu8((Opcode >> 9) & 7) = res; |
7721 | POST_IO |
7722 | RET(8) |
7723 | } |
7724 | |
7725 | // MOVEB |
7726 | OPCODE(0x109F) |
7727 | { |
7728 | u32 adr, res; |
7729 | u32 src, dst; |
7730 | |
7731 | adr = AREG(7); |
7732 | AREG(7) += 2; |
7733 | PRE_IO |
7734 | READ_BYTE_F(adr, res) |
7735 | flag_C = 0; |
7736 | flag_V = 0; |
7737 | flag_NotZ = res; |
7738 | flag_N = res; |
7739 | adr = AREG((Opcode >> 9) & 7); |
7740 | WRITE_BYTE_F(adr, res) |
7741 | POST_IO |
7742 | RET(12) |
7743 | } |
7744 | |
7745 | // MOVEB |
7746 | OPCODE(0x10DF) |
7747 | { |
7748 | u32 adr, res; |
7749 | u32 src, dst; |
7750 | |
7751 | adr = AREG(7); |
7752 | AREG(7) += 2; |
7753 | PRE_IO |
7754 | READ_BYTE_F(adr, res) |
7755 | flag_C = 0; |
7756 | flag_V = 0; |
7757 | flag_NotZ = res; |
7758 | flag_N = res; |
7759 | adr = AREG((Opcode >> 9) & 7); |
7760 | AREG((Opcode >> 9) & 7) += 1; |
7761 | WRITE_BYTE_F(adr, res) |
7762 | POST_IO |
7763 | RET(12) |
7764 | } |
7765 | |
7766 | // MOVEB |
7767 | OPCODE(0x111F) |
7768 | { |
7769 | u32 adr, res; |
7770 | u32 src, dst; |
7771 | |
7772 | adr = AREG(7); |
7773 | AREG(7) += 2; |
7774 | PRE_IO |
7775 | READ_BYTE_F(adr, res) |
7776 | flag_C = 0; |
7777 | flag_V = 0; |
7778 | flag_NotZ = res; |
7779 | flag_N = res; |
7780 | adr = AREG((Opcode >> 9) & 7) - 1; |
7781 | AREG((Opcode >> 9) & 7) = adr; |
7782 | WRITE_BYTE_F(adr, res) |
7783 | POST_IO |
7784 | RET(12) |
7785 | } |
7786 | |
7787 | // MOVEB |
7788 | OPCODE(0x115F) |
7789 | { |
7790 | u32 adr, res; |
7791 | u32 src, dst; |
7792 | |
7793 | adr = AREG(7); |
7794 | AREG(7) += 2; |
7795 | PRE_IO |
7796 | READ_BYTE_F(adr, res) |
7797 | flag_C = 0; |
7798 | flag_V = 0; |
7799 | flag_NotZ = res; |
7800 | flag_N = res; |
7801 | FETCH_SWORD(adr); |
7802 | adr += AREG((Opcode >> 9) & 7); |
7803 | WRITE_BYTE_F(adr, res) |
7804 | POST_IO |
7805 | RET(16) |
7806 | } |
7807 | |
7808 | // MOVEB |
7809 | OPCODE(0x119F) |
7810 | { |
7811 | u32 adr, res; |
7812 | u32 src, dst; |
7813 | |
7814 | adr = AREG(7); |
7815 | AREG(7) += 2; |
7816 | PRE_IO |
7817 | READ_BYTE_F(adr, res) |
7818 | flag_C = 0; |
7819 | flag_V = 0; |
7820 | flag_NotZ = res; |
7821 | flag_N = res; |
7822 | adr = AREG((Opcode >> 9) & 7); |
7823 | DECODE_EXT_WORD |
7824 | WRITE_BYTE_F(adr, res) |
7825 | POST_IO |
7826 | RET(18) |
7827 | } |
7828 | |
7829 | // MOVEB |
7830 | OPCODE(0x11DF) |
7831 | { |
7832 | u32 adr, res; |
7833 | u32 src, dst; |
7834 | |
7835 | adr = AREG(7); |
7836 | AREG(7) += 2; |
7837 | PRE_IO |
7838 | READ_BYTE_F(adr, res) |
7839 | flag_C = 0; |
7840 | flag_V = 0; |
7841 | flag_NotZ = res; |
7842 | flag_N = res; |
7843 | FETCH_SWORD(adr); |
7844 | WRITE_BYTE_F(adr, res) |
7845 | POST_IO |
7846 | RET(16) |
7847 | } |
7848 | |
7849 | // MOVEB |
7850 | OPCODE(0x13DF) |
7851 | { |
7852 | u32 adr, res; |
7853 | u32 src, dst; |
7854 | |
7855 | adr = AREG(7); |
7856 | AREG(7) += 2; |
7857 | PRE_IO |
7858 | READ_BYTE_F(adr, res) |
7859 | flag_C = 0; |
7860 | flag_V = 0; |
7861 | flag_NotZ = res; |
7862 | flag_N = res; |
7863 | FETCH_LONG(adr); |
7864 | WRITE_BYTE_F(adr, res) |
7865 | POST_IO |
7866 | RET(20) |
7867 | } |
7868 | |
7869 | // MOVEB |
7870 | OPCODE(0x1EDF) |
7871 | { |
7872 | u32 adr, res; |
7873 | u32 src, dst; |
7874 | |
7875 | adr = AREG(7); |
7876 | AREG(7) += 2; |
7877 | PRE_IO |
7878 | READ_BYTE_F(adr, res) |
7879 | flag_C = 0; |
7880 | flag_V = 0; |
7881 | flag_NotZ = res; |
7882 | flag_N = res; |
7883 | adr = AREG(7); |
7884 | AREG(7) += 2; |
7885 | WRITE_BYTE_F(adr, res) |
7886 | POST_IO |
7887 | RET(12) |
7888 | } |
7889 | |
7890 | // MOVEB |
7891 | OPCODE(0x1F1F) |
7892 | { |
7893 | u32 adr, res; |
7894 | u32 src, dst; |
7895 | |
7896 | adr = AREG(7); |
7897 | AREG(7) += 2; |
7898 | PRE_IO |
7899 | READ_BYTE_F(adr, res) |
7900 | flag_C = 0; |
7901 | flag_V = 0; |
7902 | flag_NotZ = res; |
7903 | flag_N = res; |
7904 | adr = AREG(7) - 2; |
7905 | AREG(7) = adr; |
7906 | WRITE_BYTE_F(adr, res) |
7907 | POST_IO |
7908 | RET(12) |
7909 | } |
7910 | |
7911 | // MOVEB |
7912 | OPCODE(0x1027) |
7913 | { |
7914 | u32 adr, res; |
7915 | u32 src, dst; |
7916 | |
7917 | adr = AREG(7) - 2; |
7918 | AREG(7) = adr; |
7919 | PRE_IO |
7920 | READ_BYTE_F(adr, res) |
7921 | flag_C = 0; |
7922 | flag_V = 0; |
7923 | flag_NotZ = res; |
7924 | flag_N = res; |
7925 | DREGu8((Opcode >> 9) & 7) = res; |
7926 | POST_IO |
7927 | RET(10) |
7928 | } |
7929 | |
7930 | // MOVEB |
7931 | OPCODE(0x10A7) |
7932 | { |
7933 | u32 adr, res; |
7934 | u32 src, dst; |
7935 | |
7936 | adr = AREG(7) - 2; |
7937 | AREG(7) = adr; |
7938 | PRE_IO |
7939 | READ_BYTE_F(adr, res) |
7940 | flag_C = 0; |
7941 | flag_V = 0; |
7942 | flag_NotZ = res; |
7943 | flag_N = res; |
7944 | adr = AREG((Opcode >> 9) & 7); |
7945 | WRITE_BYTE_F(adr, res) |
7946 | POST_IO |
7947 | RET(14) |
7948 | } |
7949 | |
7950 | // MOVEB |
7951 | OPCODE(0x10E7) |
7952 | { |
7953 | u32 adr, res; |
7954 | u32 src, dst; |
7955 | |
7956 | adr = AREG(7) - 2; |
7957 | AREG(7) = adr; |
7958 | PRE_IO |
7959 | READ_BYTE_F(adr, res) |
7960 | flag_C = 0; |
7961 | flag_V = 0; |
7962 | flag_NotZ = res; |
7963 | flag_N = res; |
7964 | adr = AREG((Opcode >> 9) & 7); |
7965 | AREG((Opcode >> 9) & 7) += 1; |
7966 | WRITE_BYTE_F(adr, res) |
7967 | POST_IO |
7968 | RET(14) |
7969 | } |
7970 | |
7971 | // MOVEB |
7972 | OPCODE(0x1127) |
7973 | { |
7974 | u32 adr, res; |
7975 | u32 src, dst; |
7976 | |
7977 | adr = AREG(7) - 2; |
7978 | AREG(7) = adr; |
7979 | PRE_IO |
7980 | READ_BYTE_F(adr, res) |
7981 | flag_C = 0; |
7982 | flag_V = 0; |
7983 | flag_NotZ = res; |
7984 | flag_N = res; |
7985 | adr = AREG((Opcode >> 9) & 7) - 1; |
7986 | AREG((Opcode >> 9) & 7) = adr; |
7987 | WRITE_BYTE_F(adr, res) |
7988 | POST_IO |
7989 | RET(14) |
7990 | } |
7991 | |
7992 | // MOVEB |
7993 | OPCODE(0x1167) |
7994 | { |
7995 | u32 adr, res; |
7996 | u32 src, dst; |
7997 | |
7998 | adr = AREG(7) - 2; |
7999 | AREG(7) = adr; |
8000 | PRE_IO |
8001 | READ_BYTE_F(adr, res) |
8002 | flag_C = 0; |
8003 | flag_V = 0; |
8004 | flag_NotZ = res; |
8005 | flag_N = res; |
8006 | FETCH_SWORD(adr); |
8007 | adr += AREG((Opcode >> 9) & 7); |
8008 | WRITE_BYTE_F(adr, res) |
8009 | POST_IO |
8010 | RET(18) |
8011 | } |
8012 | |
8013 | // MOVEB |
8014 | OPCODE(0x11A7) |
8015 | { |
8016 | u32 adr, res; |
8017 | u32 src, dst; |
8018 | |
8019 | adr = AREG(7) - 2; |
8020 | AREG(7) = adr; |
8021 | PRE_IO |
8022 | READ_BYTE_F(adr, res) |
8023 | flag_C = 0; |
8024 | flag_V = 0; |
8025 | flag_NotZ = res; |
8026 | flag_N = res; |
8027 | adr = AREG((Opcode >> 9) & 7); |
8028 | DECODE_EXT_WORD |
8029 | WRITE_BYTE_F(adr, res) |
8030 | POST_IO |
8031 | RET(20) |
8032 | } |
8033 | |
8034 | // MOVEB |
8035 | OPCODE(0x11E7) |
8036 | { |
8037 | u32 adr, res; |
8038 | u32 src, dst; |
8039 | |
8040 | adr = AREG(7) - 2; |
8041 | AREG(7) = adr; |
8042 | PRE_IO |
8043 | READ_BYTE_F(adr, res) |
8044 | flag_C = 0; |
8045 | flag_V = 0; |
8046 | flag_NotZ = res; |
8047 | flag_N = res; |
8048 | FETCH_SWORD(adr); |
8049 | WRITE_BYTE_F(adr, res) |
8050 | POST_IO |
8051 | RET(18) |
8052 | } |
8053 | |
8054 | // MOVEB |
8055 | OPCODE(0x13E7) |
8056 | { |
8057 | u32 adr, res; |
8058 | u32 src, dst; |
8059 | |
8060 | adr = AREG(7) - 2; |
8061 | AREG(7) = adr; |
8062 | PRE_IO |
8063 | READ_BYTE_F(adr, res) |
8064 | flag_C = 0; |
8065 | flag_V = 0; |
8066 | flag_NotZ = res; |
8067 | flag_N = res; |
8068 | FETCH_LONG(adr); |
8069 | WRITE_BYTE_F(adr, res) |
8070 | POST_IO |
8071 | RET(22) |
8072 | } |
8073 | |
8074 | // MOVEB |
8075 | OPCODE(0x1EE7) |
8076 | { |
8077 | u32 adr, res; |
8078 | u32 src, dst; |
8079 | |
8080 | adr = AREG(7) - 2; |
8081 | AREG(7) = adr; |
8082 | PRE_IO |
8083 | READ_BYTE_F(adr, res) |
8084 | flag_C = 0; |
8085 | flag_V = 0; |
8086 | flag_NotZ = res; |
8087 | flag_N = res; |
8088 | adr = AREG(7); |
8089 | AREG(7) += 2; |
8090 | WRITE_BYTE_F(adr, res) |
8091 | POST_IO |
8092 | RET(14) |
8093 | } |
8094 | |
8095 | // MOVEB |
8096 | OPCODE(0x1F27) |
8097 | { |
8098 | u32 adr, res; |
8099 | u32 src, dst; |
8100 | |
8101 | adr = AREG(7) - 2; |
8102 | AREG(7) = adr; |
8103 | PRE_IO |
8104 | READ_BYTE_F(adr, res) |
8105 | flag_C = 0; |
8106 | flag_V = 0; |
8107 | flag_NotZ = res; |
8108 | flag_N = res; |
8109 | adr = AREG(7) - 2; |
8110 | AREG(7) = adr; |
8111 | WRITE_BYTE_F(adr, res) |
8112 | POST_IO |
8113 | RET(14) |
8114 | } |
8115 | |
8116 | // MOVEL |
8117 | OPCODE(0x2000) |
8118 | { |
8119 | u32 adr, res; |
8120 | u32 src, dst; |
8121 | |
8122 | res = DREGu32((Opcode >> 0) & 7); |
8123 | flag_C = 0; |
8124 | flag_V = 0; |
8125 | flag_NotZ = res; |
8126 | flag_N = res >> 24; |
8127 | DREGu32((Opcode >> 9) & 7) = res; |
8128 | RET(4) |
8129 | } |
8130 | |
8131 | // MOVEL |
8132 | OPCODE(0x2080) |
8133 | { |
8134 | u32 adr, res; |
8135 | u32 src, dst; |
8136 | |
8137 | res = DREGu32((Opcode >> 0) & 7); |
8138 | flag_C = 0; |
8139 | flag_V = 0; |
8140 | flag_NotZ = res; |
8141 | flag_N = res >> 24; |
8142 | adr = AREG((Opcode >> 9) & 7); |
8143 | PRE_IO |
8144 | WRITE_LONG_F(adr, res) |
8145 | POST_IO |
8146 | RET(12) |
8147 | } |
8148 | |
8149 | // MOVEL |
8150 | OPCODE(0x20C0) |
8151 | { |
8152 | u32 adr, res; |
8153 | u32 src, dst; |
8154 | |
8155 | res = DREGu32((Opcode >> 0) & 7); |
8156 | flag_C = 0; |
8157 | flag_V = 0; |
8158 | flag_NotZ = res; |
8159 | flag_N = res >> 24; |
8160 | adr = AREG((Opcode >> 9) & 7); |
8161 | AREG((Opcode >> 9) & 7) += 4; |
8162 | PRE_IO |
8163 | WRITE_LONG_F(adr, res) |
8164 | POST_IO |
8165 | RET(12) |
8166 | } |
8167 | |
8168 | // MOVEL |
8169 | OPCODE(0x2100) |
8170 | { |
8171 | u32 adr, res; |
8172 | u32 src, dst; |
8173 | |
8174 | res = DREGu32((Opcode >> 0) & 7); |
8175 | flag_C = 0; |
8176 | flag_V = 0; |
8177 | flag_NotZ = res; |
8178 | flag_N = res >> 24; |
8179 | adr = AREG((Opcode >> 9) & 7) - 4; |
8180 | AREG((Opcode >> 9) & 7) = adr; |
8181 | PRE_IO |
80db4442 |
8182 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8183 | POST_IO |
8184 | RET(12) |
8185 | } |
8186 | |
8187 | // MOVEL |
8188 | OPCODE(0x2140) |
8189 | { |
8190 | u32 adr, res; |
8191 | u32 src, dst; |
8192 | |
8193 | res = DREGu32((Opcode >> 0) & 7); |
8194 | flag_C = 0; |
8195 | flag_V = 0; |
8196 | flag_NotZ = res; |
8197 | flag_N = res >> 24; |
8198 | FETCH_SWORD(adr); |
8199 | adr += AREG((Opcode >> 9) & 7); |
8200 | PRE_IO |
8201 | WRITE_LONG_F(adr, res) |
8202 | POST_IO |
8203 | RET(16) |
8204 | } |
8205 | |
8206 | // MOVEL |
8207 | OPCODE(0x2180) |
8208 | { |
8209 | u32 adr, res; |
8210 | u32 src, dst; |
8211 | |
8212 | res = DREGu32((Opcode >> 0) & 7); |
8213 | flag_C = 0; |
8214 | flag_V = 0; |
8215 | flag_NotZ = res; |
8216 | flag_N = res >> 24; |
8217 | adr = AREG((Opcode >> 9) & 7); |
8218 | DECODE_EXT_WORD |
8219 | PRE_IO |
8220 | WRITE_LONG_F(adr, res) |
8221 | POST_IO |
8222 | RET(18) |
8223 | } |
8224 | |
8225 | // MOVEL |
8226 | OPCODE(0x21C0) |
8227 | { |
8228 | u32 adr, res; |
8229 | u32 src, dst; |
8230 | |
8231 | res = DREGu32((Opcode >> 0) & 7); |
8232 | flag_C = 0; |
8233 | flag_V = 0; |
8234 | flag_NotZ = res; |
8235 | flag_N = res >> 24; |
8236 | FETCH_SWORD(adr); |
8237 | PRE_IO |
8238 | WRITE_LONG_F(adr, res) |
8239 | POST_IO |
8240 | RET(16) |
8241 | } |
8242 | |
8243 | // MOVEL |
8244 | OPCODE(0x23C0) |
8245 | { |
8246 | u32 adr, res; |
8247 | u32 src, dst; |
8248 | |
8249 | res = DREGu32((Opcode >> 0) & 7); |
8250 | flag_C = 0; |
8251 | flag_V = 0; |
8252 | flag_NotZ = res; |
8253 | flag_N = res >> 24; |
8254 | FETCH_LONG(adr); |
8255 | PRE_IO |
8256 | WRITE_LONG_F(adr, res) |
8257 | POST_IO |
8258 | RET(20) |
8259 | } |
8260 | |
8261 | // MOVEL |
8262 | OPCODE(0x2EC0) |
8263 | { |
8264 | u32 adr, res; |
8265 | u32 src, dst; |
8266 | |
8267 | res = DREGu32((Opcode >> 0) & 7); |
8268 | flag_C = 0; |
8269 | flag_V = 0; |
8270 | flag_NotZ = res; |
8271 | flag_N = res >> 24; |
8272 | adr = AREG(7); |
8273 | AREG(7) += 4; |
8274 | PRE_IO |
8275 | WRITE_LONG_F(adr, res) |
8276 | POST_IO |
8277 | RET(12) |
8278 | } |
8279 | |
8280 | // MOVEL |
8281 | OPCODE(0x2F00) |
8282 | { |
8283 | u32 adr, res; |
8284 | u32 src, dst; |
8285 | |
8286 | res = DREGu32((Opcode >> 0) & 7); |
8287 | flag_C = 0; |
8288 | flag_V = 0; |
8289 | flag_NotZ = res; |
8290 | flag_N = res >> 24; |
8291 | adr = AREG(7) - 4; |
8292 | AREG(7) = adr; |
8293 | PRE_IO |
03e4f2a3 |
8294 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8295 | POST_IO |
8296 | RET(12) |
8297 | } |
8298 | |
8299 | // MOVEL |
8300 | OPCODE(0x2008) |
8301 | { |
8302 | u32 adr, res; |
8303 | u32 src, dst; |
8304 | |
8305 | res = AREGu32((Opcode >> 0) & 7); |
8306 | flag_C = 0; |
8307 | flag_V = 0; |
8308 | flag_NotZ = res; |
8309 | flag_N = res >> 24; |
8310 | DREGu32((Opcode >> 9) & 7) = res; |
8311 | RET(4) |
8312 | } |
8313 | |
8314 | // MOVEL |
8315 | OPCODE(0x2088) |
8316 | { |
8317 | u32 adr, res; |
8318 | u32 src, dst; |
8319 | |
8320 | res = AREGu32((Opcode >> 0) & 7); |
8321 | flag_C = 0; |
8322 | flag_V = 0; |
8323 | flag_NotZ = res; |
8324 | flag_N = res >> 24; |
8325 | adr = AREG((Opcode >> 9) & 7); |
8326 | PRE_IO |
8327 | WRITE_LONG_F(adr, res) |
8328 | POST_IO |
8329 | RET(12) |
8330 | } |
8331 | |
8332 | // MOVEL |
8333 | OPCODE(0x20C8) |
8334 | { |
8335 | u32 adr, res; |
8336 | u32 src, dst; |
8337 | |
8338 | res = AREGu32((Opcode >> 0) & 7); |
8339 | flag_C = 0; |
8340 | flag_V = 0; |
8341 | flag_NotZ = res; |
8342 | flag_N = res >> 24; |
8343 | adr = AREG((Opcode >> 9) & 7); |
8344 | AREG((Opcode >> 9) & 7) += 4; |
8345 | PRE_IO |
8346 | WRITE_LONG_F(adr, res) |
8347 | POST_IO |
8348 | RET(12) |
8349 | } |
8350 | |
8351 | // MOVEL |
8352 | OPCODE(0x2108) |
8353 | { |
8354 | u32 adr, res; |
8355 | u32 src, dst; |
8356 | |
8357 | res = AREGu32((Opcode >> 0) & 7); |
8358 | flag_C = 0; |
8359 | flag_V = 0; |
8360 | flag_NotZ = res; |
8361 | flag_N = res >> 24; |
8362 | adr = AREG((Opcode >> 9) & 7) - 4; |
8363 | AREG((Opcode >> 9) & 7) = adr; |
8364 | PRE_IO |
80db4442 |
8365 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8366 | POST_IO |
8367 | RET(12) |
8368 | } |
8369 | |
8370 | // MOVEL |
8371 | OPCODE(0x2148) |
8372 | { |
8373 | u32 adr, res; |
8374 | u32 src, dst; |
8375 | |
8376 | res = AREGu32((Opcode >> 0) & 7); |
8377 | flag_C = 0; |
8378 | flag_V = 0; |
8379 | flag_NotZ = res; |
8380 | flag_N = res >> 24; |
8381 | FETCH_SWORD(adr); |
8382 | adr += AREG((Opcode >> 9) & 7); |
8383 | PRE_IO |
8384 | WRITE_LONG_F(adr, res) |
8385 | POST_IO |
8386 | RET(16) |
8387 | } |
8388 | |
8389 | // MOVEL |
8390 | OPCODE(0x2188) |
8391 | { |
8392 | u32 adr, res; |
8393 | u32 src, dst; |
8394 | |
8395 | res = AREGu32((Opcode >> 0) & 7); |
8396 | flag_C = 0; |
8397 | flag_V = 0; |
8398 | flag_NotZ = res; |
8399 | flag_N = res >> 24; |
8400 | adr = AREG((Opcode >> 9) & 7); |
8401 | DECODE_EXT_WORD |
8402 | PRE_IO |
8403 | WRITE_LONG_F(adr, res) |
8404 | POST_IO |
8405 | RET(18) |
8406 | } |
8407 | |
8408 | // MOVEL |
8409 | OPCODE(0x21C8) |
8410 | { |
8411 | u32 adr, res; |
8412 | u32 src, dst; |
8413 | |
8414 | res = AREGu32((Opcode >> 0) & 7); |
8415 | flag_C = 0; |
8416 | flag_V = 0; |
8417 | flag_NotZ = res; |
8418 | flag_N = res >> 24; |
8419 | FETCH_SWORD(adr); |
8420 | PRE_IO |
8421 | WRITE_LONG_F(adr, res) |
8422 | POST_IO |
8423 | RET(16) |
8424 | } |
8425 | |
8426 | // MOVEL |
8427 | OPCODE(0x23C8) |
8428 | { |
8429 | u32 adr, res; |
8430 | u32 src, dst; |
8431 | |
8432 | res = AREGu32((Opcode >> 0) & 7); |
8433 | flag_C = 0; |
8434 | flag_V = 0; |
8435 | flag_NotZ = res; |
8436 | flag_N = res >> 24; |
8437 | FETCH_LONG(adr); |
8438 | PRE_IO |
8439 | WRITE_LONG_F(adr, res) |
8440 | POST_IO |
8441 | RET(20) |
8442 | } |
8443 | |
8444 | // MOVEL |
8445 | OPCODE(0x2EC8) |
8446 | { |
8447 | u32 adr, res; |
8448 | u32 src, dst; |
8449 | |
8450 | res = AREGu32((Opcode >> 0) & 7); |
8451 | flag_C = 0; |
8452 | flag_V = 0; |
8453 | flag_NotZ = res; |
8454 | flag_N = res >> 24; |
8455 | adr = AREG(7); |
8456 | AREG(7) += 4; |
8457 | PRE_IO |
8458 | WRITE_LONG_F(adr, res) |
8459 | POST_IO |
8460 | RET(12) |
8461 | } |
8462 | |
8463 | // MOVEL |
8464 | OPCODE(0x2F08) |
8465 | { |
8466 | u32 adr, res; |
8467 | u32 src, dst; |
8468 | |
8469 | res = AREGu32((Opcode >> 0) & 7); |
8470 | flag_C = 0; |
8471 | flag_V = 0; |
8472 | flag_NotZ = res; |
8473 | flag_N = res >> 24; |
8474 | adr = AREG(7) - 4; |
8475 | AREG(7) = adr; |
8476 | PRE_IO |
03e4f2a3 |
8477 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8478 | POST_IO |
8479 | RET(12) |
8480 | } |
8481 | |
8482 | // MOVEL |
8483 | OPCODE(0x2010) |
8484 | { |
8485 | u32 adr, res; |
8486 | u32 src, dst; |
8487 | |
8488 | adr = AREG((Opcode >> 0) & 7); |
8489 | PRE_IO |
8490 | READ_LONG_F(adr, res) |
8491 | flag_C = 0; |
8492 | flag_V = 0; |
8493 | flag_NotZ = res; |
8494 | flag_N = res >> 24; |
8495 | DREGu32((Opcode >> 9) & 7) = res; |
8496 | POST_IO |
8497 | RET(12) |
8498 | } |
8499 | |
8500 | // MOVEL |
8501 | OPCODE(0x2090) |
8502 | { |
8503 | u32 adr, res; |
8504 | u32 src, dst; |
8505 | |
8506 | adr = AREG((Opcode >> 0) & 7); |
8507 | PRE_IO |
8508 | READ_LONG_F(adr, res) |
8509 | flag_C = 0; |
8510 | flag_V = 0; |
8511 | flag_NotZ = res; |
8512 | flag_N = res >> 24; |
8513 | adr = AREG((Opcode >> 9) & 7); |
8514 | WRITE_LONG_F(adr, res) |
8515 | POST_IO |
8516 | RET(20) |
8517 | } |
8518 | |
8519 | // MOVEL |
8520 | OPCODE(0x20D0) |
8521 | { |
8522 | u32 adr, res; |
8523 | u32 src, dst; |
8524 | |
8525 | adr = AREG((Opcode >> 0) & 7); |
8526 | PRE_IO |
8527 | READ_LONG_F(adr, res) |
8528 | flag_C = 0; |
8529 | flag_V = 0; |
8530 | flag_NotZ = res; |
8531 | flag_N = res >> 24; |
8532 | adr = AREG((Opcode >> 9) & 7); |
8533 | AREG((Opcode >> 9) & 7) += 4; |
8534 | WRITE_LONG_F(adr, res) |
8535 | POST_IO |
8536 | RET(20) |
8537 | } |
8538 | |
8539 | // MOVEL |
8540 | OPCODE(0x2110) |
8541 | { |
8542 | u32 adr, res; |
8543 | u32 src, dst; |
8544 | |
8545 | adr = AREG((Opcode >> 0) & 7); |
8546 | PRE_IO |
8547 | READ_LONG_F(adr, res) |
8548 | flag_C = 0; |
8549 | flag_V = 0; |
8550 | flag_NotZ = res; |
8551 | flag_N = res >> 24; |
8552 | adr = AREG((Opcode >> 9) & 7) - 4; |
8553 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8554 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8555 | POST_IO |
8556 | RET(20) |
8557 | } |
8558 | |
8559 | // MOVEL |
8560 | OPCODE(0x2150) |
8561 | { |
8562 | u32 adr, res; |
8563 | u32 src, dst; |
8564 | |
8565 | adr = AREG((Opcode >> 0) & 7); |
8566 | PRE_IO |
8567 | READ_LONG_F(adr, res) |
8568 | flag_C = 0; |
8569 | flag_V = 0; |
8570 | flag_NotZ = res; |
8571 | flag_N = res >> 24; |
8572 | FETCH_SWORD(adr); |
8573 | adr += AREG((Opcode >> 9) & 7); |
8574 | WRITE_LONG_F(adr, res) |
8575 | POST_IO |
8576 | RET(24) |
8577 | } |
8578 | |
8579 | // MOVEL |
8580 | OPCODE(0x2190) |
8581 | { |
8582 | u32 adr, res; |
8583 | u32 src, dst; |
8584 | |
8585 | adr = AREG((Opcode >> 0) & 7); |
8586 | PRE_IO |
8587 | READ_LONG_F(adr, res) |
8588 | flag_C = 0; |
8589 | flag_V = 0; |
8590 | flag_NotZ = res; |
8591 | flag_N = res >> 24; |
8592 | adr = AREG((Opcode >> 9) & 7); |
8593 | DECODE_EXT_WORD |
8594 | WRITE_LONG_F(adr, res) |
8595 | POST_IO |
8596 | RET(26) |
8597 | } |
8598 | |
8599 | // MOVEL |
8600 | OPCODE(0x21D0) |
8601 | { |
8602 | u32 adr, res; |
8603 | u32 src, dst; |
8604 | |
8605 | adr = AREG((Opcode >> 0) & 7); |
8606 | PRE_IO |
8607 | READ_LONG_F(adr, res) |
8608 | flag_C = 0; |
8609 | flag_V = 0; |
8610 | flag_NotZ = res; |
8611 | flag_N = res >> 24; |
8612 | FETCH_SWORD(adr); |
8613 | WRITE_LONG_F(adr, res) |
8614 | POST_IO |
8615 | RET(24) |
8616 | } |
8617 | |
8618 | // MOVEL |
8619 | OPCODE(0x23D0) |
8620 | { |
8621 | u32 adr, res; |
8622 | u32 src, dst; |
8623 | |
8624 | adr = AREG((Opcode >> 0) & 7); |
8625 | PRE_IO |
8626 | READ_LONG_F(adr, res) |
8627 | flag_C = 0; |
8628 | flag_V = 0; |
8629 | flag_NotZ = res; |
8630 | flag_N = res >> 24; |
8631 | FETCH_LONG(adr); |
8632 | WRITE_LONG_F(adr, res) |
8633 | POST_IO |
8634 | RET(28) |
8635 | } |
8636 | |
8637 | // MOVEL |
8638 | OPCODE(0x2ED0) |
8639 | { |
8640 | u32 adr, res; |
8641 | u32 src, dst; |
8642 | |
8643 | adr = AREG((Opcode >> 0) & 7); |
8644 | PRE_IO |
8645 | READ_LONG_F(adr, res) |
8646 | flag_C = 0; |
8647 | flag_V = 0; |
8648 | flag_NotZ = res; |
8649 | flag_N = res >> 24; |
8650 | adr = AREG(7); |
8651 | AREG(7) += 4; |
8652 | WRITE_LONG_F(adr, res) |
8653 | POST_IO |
8654 | RET(20) |
8655 | } |
8656 | |
8657 | // MOVEL |
8658 | OPCODE(0x2F10) |
8659 | { |
8660 | u32 adr, res; |
8661 | u32 src, dst; |
8662 | |
8663 | adr = AREG((Opcode >> 0) & 7); |
8664 | PRE_IO |
8665 | READ_LONG_F(adr, res) |
8666 | flag_C = 0; |
8667 | flag_V = 0; |
8668 | flag_NotZ = res; |
8669 | flag_N = res >> 24; |
8670 | adr = AREG(7) - 4; |
8671 | AREG(7) = adr; |
03e4f2a3 |
8672 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8673 | POST_IO |
8674 | RET(20) |
8675 | } |
8676 | |
8677 | // MOVEL |
8678 | OPCODE(0x2018) |
8679 | { |
8680 | u32 adr, res; |
8681 | u32 src, dst; |
8682 | |
8683 | adr = AREG((Opcode >> 0) & 7); |
8684 | AREG((Opcode >> 0) & 7) += 4; |
8685 | PRE_IO |
8686 | READ_LONG_F(adr, res) |
8687 | flag_C = 0; |
8688 | flag_V = 0; |
8689 | flag_NotZ = res; |
8690 | flag_N = res >> 24; |
8691 | DREGu32((Opcode >> 9) & 7) = res; |
8692 | POST_IO |
8693 | RET(12) |
8694 | } |
8695 | |
8696 | // MOVEL |
8697 | OPCODE(0x2098) |
8698 | { |
8699 | u32 adr, res; |
8700 | u32 src, dst; |
8701 | |
8702 | adr = AREG((Opcode >> 0) & 7); |
8703 | AREG((Opcode >> 0) & 7) += 4; |
8704 | PRE_IO |
8705 | READ_LONG_F(adr, res) |
8706 | flag_C = 0; |
8707 | flag_V = 0; |
8708 | flag_NotZ = res; |
8709 | flag_N = res >> 24; |
8710 | adr = AREG((Opcode >> 9) & 7); |
8711 | WRITE_LONG_F(adr, res) |
8712 | POST_IO |
8713 | RET(20) |
8714 | } |
8715 | |
8716 | // MOVEL |
8717 | OPCODE(0x20D8) |
8718 | { |
8719 | u32 adr, res; |
8720 | u32 src, dst; |
8721 | |
8722 | adr = AREG((Opcode >> 0) & 7); |
8723 | AREG((Opcode >> 0) & 7) += 4; |
8724 | PRE_IO |
8725 | READ_LONG_F(adr, res) |
8726 | flag_C = 0; |
8727 | flag_V = 0; |
8728 | flag_NotZ = res; |
8729 | flag_N = res >> 24; |
8730 | adr = AREG((Opcode >> 9) & 7); |
8731 | AREG((Opcode >> 9) & 7) += 4; |
8732 | WRITE_LONG_F(adr, res) |
8733 | POST_IO |
8734 | RET(20) |
8735 | } |
8736 | |
8737 | // MOVEL |
8738 | OPCODE(0x2118) |
8739 | { |
8740 | u32 adr, res; |
8741 | u32 src, dst; |
8742 | |
8743 | adr = AREG((Opcode >> 0) & 7); |
8744 | AREG((Opcode >> 0) & 7) += 4; |
8745 | PRE_IO |
8746 | READ_LONG_F(adr, res) |
8747 | flag_C = 0; |
8748 | flag_V = 0; |
8749 | flag_NotZ = res; |
8750 | flag_N = res >> 24; |
8751 | adr = AREG((Opcode >> 9) & 7) - 4; |
8752 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8753 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8754 | POST_IO |
8755 | RET(20) |
8756 | } |
8757 | |
8758 | // MOVEL |
8759 | OPCODE(0x2158) |
8760 | { |
8761 | u32 adr, res; |
8762 | u32 src, dst; |
8763 | |
8764 | adr = AREG((Opcode >> 0) & 7); |
8765 | AREG((Opcode >> 0) & 7) += 4; |
8766 | PRE_IO |
8767 | READ_LONG_F(adr, res) |
8768 | flag_C = 0; |
8769 | flag_V = 0; |
8770 | flag_NotZ = res; |
8771 | flag_N = res >> 24; |
8772 | FETCH_SWORD(adr); |
8773 | adr += AREG((Opcode >> 9) & 7); |
8774 | WRITE_LONG_F(adr, res) |
8775 | POST_IO |
8776 | RET(24) |
8777 | } |
8778 | |
8779 | // MOVEL |
8780 | OPCODE(0x2198) |
8781 | { |
8782 | u32 adr, res; |
8783 | u32 src, dst; |
8784 | |
8785 | adr = AREG((Opcode >> 0) & 7); |
8786 | AREG((Opcode >> 0) & 7) += 4; |
8787 | PRE_IO |
8788 | READ_LONG_F(adr, res) |
8789 | flag_C = 0; |
8790 | flag_V = 0; |
8791 | flag_NotZ = res; |
8792 | flag_N = res >> 24; |
8793 | adr = AREG((Opcode >> 9) & 7); |
8794 | DECODE_EXT_WORD |
8795 | WRITE_LONG_F(adr, res) |
8796 | POST_IO |
8797 | RET(26) |
8798 | } |
8799 | |
8800 | // MOVEL |
8801 | OPCODE(0x21D8) |
8802 | { |
8803 | u32 adr, res; |
8804 | u32 src, dst; |
8805 | |
8806 | adr = AREG((Opcode >> 0) & 7); |
8807 | AREG((Opcode >> 0) & 7) += 4; |
8808 | PRE_IO |
8809 | READ_LONG_F(adr, res) |
8810 | flag_C = 0; |
8811 | flag_V = 0; |
8812 | flag_NotZ = res; |
8813 | flag_N = res >> 24; |
8814 | FETCH_SWORD(adr); |
8815 | WRITE_LONG_F(adr, res) |
8816 | POST_IO |
8817 | RET(24) |
8818 | } |
8819 | |
8820 | // MOVEL |
8821 | OPCODE(0x23D8) |
8822 | { |
8823 | u32 adr, res; |
8824 | u32 src, dst; |
8825 | |
8826 | adr = AREG((Opcode >> 0) & 7); |
8827 | AREG((Opcode >> 0) & 7) += 4; |
8828 | PRE_IO |
8829 | READ_LONG_F(adr, res) |
8830 | flag_C = 0; |
8831 | flag_V = 0; |
8832 | flag_NotZ = res; |
8833 | flag_N = res >> 24; |
8834 | FETCH_LONG(adr); |
8835 | WRITE_LONG_F(adr, res) |
8836 | POST_IO |
8837 | RET(28) |
8838 | } |
8839 | |
8840 | // MOVEL |
8841 | OPCODE(0x2ED8) |
8842 | { |
8843 | u32 adr, res; |
8844 | u32 src, dst; |
8845 | |
8846 | adr = AREG((Opcode >> 0) & 7); |
8847 | AREG((Opcode >> 0) & 7) += 4; |
8848 | PRE_IO |
8849 | READ_LONG_F(adr, res) |
8850 | flag_C = 0; |
8851 | flag_V = 0; |
8852 | flag_NotZ = res; |
8853 | flag_N = res >> 24; |
8854 | adr = AREG(7); |
8855 | AREG(7) += 4; |
8856 | WRITE_LONG_F(adr, res) |
8857 | POST_IO |
8858 | RET(20) |
8859 | } |
8860 | |
8861 | // MOVEL |
8862 | OPCODE(0x2F18) |
8863 | { |
8864 | u32 adr, res; |
8865 | u32 src, dst; |
8866 | |
8867 | adr = AREG((Opcode >> 0) & 7); |
8868 | AREG((Opcode >> 0) & 7) += 4; |
8869 | PRE_IO |
8870 | READ_LONG_F(adr, res) |
8871 | flag_C = 0; |
8872 | flag_V = 0; |
8873 | flag_NotZ = res; |
8874 | flag_N = res >> 24; |
8875 | adr = AREG(7) - 4; |
8876 | AREG(7) = adr; |
03e4f2a3 |
8877 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8878 | POST_IO |
8879 | RET(20) |
8880 | } |
8881 | |
8882 | // MOVEL |
8883 | OPCODE(0x2020) |
8884 | { |
8885 | u32 adr, res; |
8886 | u32 src, dst; |
8887 | |
8888 | adr = AREG((Opcode >> 0) & 7) - 4; |
8889 | AREG((Opcode >> 0) & 7) = adr; |
8890 | PRE_IO |
8891 | READ_LONG_F(adr, res) |
8892 | flag_C = 0; |
8893 | flag_V = 0; |
8894 | flag_NotZ = res; |
8895 | flag_N = res >> 24; |
8896 | DREGu32((Opcode >> 9) & 7) = res; |
8897 | POST_IO |
8898 | RET(14) |
8899 | } |
8900 | |
8901 | // MOVEL |
8902 | OPCODE(0x20A0) |
8903 | { |
8904 | u32 adr, res; |
8905 | u32 src, dst; |
8906 | |
8907 | adr = AREG((Opcode >> 0) & 7) - 4; |
8908 | AREG((Opcode >> 0) & 7) = adr; |
8909 | PRE_IO |
8910 | READ_LONG_F(adr, res) |
8911 | flag_C = 0; |
8912 | flag_V = 0; |
8913 | flag_NotZ = res; |
8914 | flag_N = res >> 24; |
8915 | adr = AREG((Opcode >> 9) & 7); |
8916 | WRITE_LONG_F(adr, res) |
8917 | POST_IO |
8918 | RET(22) |
8919 | } |
8920 | |
8921 | // MOVEL |
8922 | OPCODE(0x20E0) |
8923 | { |
8924 | u32 adr, res; |
8925 | u32 src, dst; |
8926 | |
8927 | adr = AREG((Opcode >> 0) & 7) - 4; |
8928 | AREG((Opcode >> 0) & 7) = adr; |
8929 | PRE_IO |
8930 | READ_LONG_F(adr, res) |
8931 | flag_C = 0; |
8932 | flag_V = 0; |
8933 | flag_NotZ = res; |
8934 | flag_N = res >> 24; |
8935 | adr = AREG((Opcode >> 9) & 7); |
8936 | AREG((Opcode >> 9) & 7) += 4; |
8937 | WRITE_LONG_F(adr, res) |
8938 | POST_IO |
8939 | RET(22) |
8940 | } |
8941 | |
8942 | // MOVEL |
8943 | OPCODE(0x2120) |
8944 | { |
8945 | u32 adr, res; |
8946 | u32 src, dst; |
8947 | |
8948 | adr = AREG((Opcode >> 0) & 7) - 4; |
8949 | AREG((Opcode >> 0) & 7) = adr; |
8950 | PRE_IO |
8951 | READ_LONG_F(adr, res) |
8952 | flag_C = 0; |
8953 | flag_V = 0; |
8954 | flag_NotZ = res; |
8955 | flag_N = res >> 24; |
8956 | adr = AREG((Opcode >> 9) & 7) - 4; |
8957 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8958 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8959 | POST_IO |
8960 | RET(22) |
8961 | } |
8962 | |
8963 | // MOVEL |
8964 | OPCODE(0x2160) |
8965 | { |
8966 | u32 adr, res; |
8967 | u32 src, dst; |
8968 | |
8969 | adr = AREG((Opcode >> 0) & 7) - 4; |
8970 | AREG((Opcode >> 0) & 7) = adr; |
8971 | PRE_IO |
8972 | READ_LONG_F(adr, res) |
8973 | flag_C = 0; |
8974 | flag_V = 0; |
8975 | flag_NotZ = res; |
8976 | flag_N = res >> 24; |
8977 | FETCH_SWORD(adr); |
8978 | adr += AREG((Opcode >> 9) & 7); |
8979 | WRITE_LONG_F(adr, res) |
8980 | POST_IO |
8981 | RET(26) |
8982 | } |
8983 | |
8984 | // MOVEL |
8985 | OPCODE(0x21A0) |
8986 | { |
8987 | u32 adr, res; |
8988 | u32 src, dst; |
8989 | |
8990 | adr = AREG((Opcode >> 0) & 7) - 4; |
8991 | AREG((Opcode >> 0) & 7) = adr; |
8992 | PRE_IO |
8993 | READ_LONG_F(adr, res) |
8994 | flag_C = 0; |
8995 | flag_V = 0; |
8996 | flag_NotZ = res; |
8997 | flag_N = res >> 24; |
8998 | adr = AREG((Opcode >> 9) & 7); |
8999 | DECODE_EXT_WORD |
9000 | WRITE_LONG_F(adr, res) |
9001 | POST_IO |
9002 | RET(28) |
9003 | } |
9004 | |
9005 | // MOVEL |
9006 | OPCODE(0x21E0) |
9007 | { |
9008 | u32 adr, res; |
9009 | u32 src, dst; |
9010 | |
9011 | adr = AREG((Opcode >> 0) & 7) - 4; |
9012 | AREG((Opcode >> 0) & 7) = adr; |
9013 | PRE_IO |
9014 | READ_LONG_F(adr, res) |
9015 | flag_C = 0; |
9016 | flag_V = 0; |
9017 | flag_NotZ = res; |
9018 | flag_N = res >> 24; |
9019 | FETCH_SWORD(adr); |
9020 | WRITE_LONG_F(adr, res) |
9021 | POST_IO |
9022 | RET(26) |
9023 | } |
9024 | |
9025 | // MOVEL |
9026 | OPCODE(0x23E0) |
9027 | { |
9028 | u32 adr, res; |
9029 | u32 src, dst; |
9030 | |
9031 | adr = AREG((Opcode >> 0) & 7) - 4; |
9032 | AREG((Opcode >> 0) & 7) = adr; |
9033 | PRE_IO |
9034 | READ_LONG_F(adr, res) |
9035 | flag_C = 0; |
9036 | flag_V = 0; |
9037 | flag_NotZ = res; |
9038 | flag_N = res >> 24; |
9039 | FETCH_LONG(adr); |
9040 | WRITE_LONG_F(adr, res) |
9041 | POST_IO |
9042 | RET(30) |
9043 | } |
9044 | |
9045 | // MOVEL |
9046 | OPCODE(0x2EE0) |
9047 | { |
9048 | u32 adr, res; |
9049 | u32 src, dst; |
9050 | |
9051 | adr = AREG((Opcode >> 0) & 7) - 4; |
9052 | AREG((Opcode >> 0) & 7) = adr; |
9053 | PRE_IO |
9054 | READ_LONG_F(adr, res) |
9055 | flag_C = 0; |
9056 | flag_V = 0; |
9057 | flag_NotZ = res; |
9058 | flag_N = res >> 24; |
9059 | adr = AREG(7); |
9060 | AREG(7) += 4; |
9061 | WRITE_LONG_F(adr, res) |
9062 | POST_IO |
9063 | RET(22) |
9064 | } |
9065 | |
9066 | // MOVEL |
9067 | OPCODE(0x2F20) |
9068 | { |
9069 | u32 adr, res; |
9070 | u32 src, dst; |
9071 | |
9072 | adr = AREG((Opcode >> 0) & 7) - 4; |
9073 | AREG((Opcode >> 0) & 7) = adr; |
9074 | PRE_IO |
9075 | READ_LONG_F(adr, res) |
9076 | flag_C = 0; |
9077 | flag_V = 0; |
9078 | flag_NotZ = res; |
9079 | flag_N = res >> 24; |
9080 | adr = AREG(7) - 4; |
9081 | AREG(7) = adr; |
03e4f2a3 |
9082 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9083 | POST_IO |
9084 | RET(22) |
9085 | } |
9086 | |
9087 | // MOVEL |
9088 | OPCODE(0x2028) |
9089 | { |
9090 | u32 adr, res; |
9091 | u32 src, dst; |
9092 | |
9093 | FETCH_SWORD(adr); |
9094 | adr += AREG((Opcode >> 0) & 7); |
9095 | PRE_IO |
9096 | READ_LONG_F(adr, res) |
9097 | flag_C = 0; |
9098 | flag_V = 0; |
9099 | flag_NotZ = res; |
9100 | flag_N = res >> 24; |
9101 | DREGu32((Opcode >> 9) & 7) = res; |
9102 | POST_IO |
9103 | RET(16) |
9104 | } |
9105 | |
9106 | // MOVEL |
9107 | OPCODE(0x20A8) |
9108 | { |
9109 | u32 adr, res; |
9110 | u32 src, dst; |
9111 | |
9112 | FETCH_SWORD(adr); |
9113 | adr += AREG((Opcode >> 0) & 7); |
9114 | PRE_IO |
9115 | READ_LONG_F(adr, res) |
9116 | flag_C = 0; |
9117 | flag_V = 0; |
9118 | flag_NotZ = res; |
9119 | flag_N = res >> 24; |
9120 | adr = AREG((Opcode >> 9) & 7); |
9121 | WRITE_LONG_F(adr, res) |
9122 | POST_IO |
9123 | RET(24) |
9124 | } |
9125 | |
9126 | // MOVEL |
9127 | OPCODE(0x20E8) |
9128 | { |
9129 | u32 adr, res; |
9130 | u32 src, dst; |
9131 | |
9132 | FETCH_SWORD(adr); |
9133 | adr += AREG((Opcode >> 0) & 7); |
9134 | PRE_IO |
9135 | READ_LONG_F(adr, res) |
9136 | flag_C = 0; |
9137 | flag_V = 0; |
9138 | flag_NotZ = res; |
9139 | flag_N = res >> 24; |
9140 | adr = AREG((Opcode >> 9) & 7); |
9141 | AREG((Opcode >> 9) & 7) += 4; |
9142 | WRITE_LONG_F(adr, res) |
9143 | POST_IO |
9144 | RET(24) |
9145 | } |
9146 | |
9147 | // MOVEL |
9148 | OPCODE(0x2128) |
9149 | { |
9150 | u32 adr, res; |
9151 | u32 src, dst; |
9152 | |
9153 | FETCH_SWORD(adr); |
9154 | adr += AREG((Opcode >> 0) & 7); |
9155 | PRE_IO |
9156 | READ_LONG_F(adr, res) |
9157 | flag_C = 0; |
9158 | flag_V = 0; |
9159 | flag_NotZ = res; |
9160 | flag_N = res >> 24; |
9161 | adr = AREG((Opcode >> 9) & 7) - 4; |
9162 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9163 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9164 | POST_IO |
9165 | RET(24) |
9166 | } |
9167 | |
9168 | // MOVEL |
9169 | OPCODE(0x2168) |
9170 | { |
9171 | u32 adr, res; |
9172 | u32 src, dst; |
9173 | |
9174 | FETCH_SWORD(adr); |
9175 | adr += AREG((Opcode >> 0) & 7); |
9176 | PRE_IO |
9177 | READ_LONG_F(adr, res) |
9178 | flag_C = 0; |
9179 | flag_V = 0; |
9180 | flag_NotZ = res; |
9181 | flag_N = res >> 24; |
9182 | FETCH_SWORD(adr); |
9183 | adr += AREG((Opcode >> 9) & 7); |
9184 | WRITE_LONG_F(adr, res) |
9185 | POST_IO |
9186 | RET(28) |
9187 | } |
9188 | |
9189 | // MOVEL |
9190 | OPCODE(0x21A8) |
9191 | { |
9192 | u32 adr, res; |
9193 | u32 src, dst; |
9194 | |
9195 | FETCH_SWORD(adr); |
9196 | adr += AREG((Opcode >> 0) & 7); |
9197 | PRE_IO |
9198 | READ_LONG_F(adr, res) |
9199 | flag_C = 0; |
9200 | flag_V = 0; |
9201 | flag_NotZ = res; |
9202 | flag_N = res >> 24; |
9203 | adr = AREG((Opcode >> 9) & 7); |
9204 | DECODE_EXT_WORD |
9205 | WRITE_LONG_F(adr, res) |
9206 | POST_IO |
9207 | RET(30) |
9208 | } |
9209 | |
9210 | // MOVEL |
9211 | OPCODE(0x21E8) |
9212 | { |
9213 | u32 adr, res; |
9214 | u32 src, dst; |
9215 | |
9216 | FETCH_SWORD(adr); |
9217 | adr += AREG((Opcode >> 0) & 7); |
9218 | PRE_IO |
9219 | READ_LONG_F(adr, res) |
9220 | flag_C = 0; |
9221 | flag_V = 0; |
9222 | flag_NotZ = res; |
9223 | flag_N = res >> 24; |
9224 | FETCH_SWORD(adr); |
9225 | WRITE_LONG_F(adr, res) |
9226 | POST_IO |
9227 | RET(28) |
9228 | } |
9229 | |
9230 | // MOVEL |
9231 | OPCODE(0x23E8) |
9232 | { |
9233 | u32 adr, res; |
9234 | u32 src, dst; |
9235 | |
9236 | FETCH_SWORD(adr); |
9237 | adr += AREG((Opcode >> 0) & 7); |
9238 | PRE_IO |
9239 | READ_LONG_F(adr, res) |
9240 | flag_C = 0; |
9241 | flag_V = 0; |
9242 | flag_NotZ = res; |
9243 | flag_N = res >> 24; |
9244 | FETCH_LONG(adr); |
9245 | WRITE_LONG_F(adr, res) |
9246 | POST_IO |
9247 | RET(32) |
9248 | } |
9249 | |
9250 | // MOVEL |
9251 | OPCODE(0x2EE8) |
9252 | { |
9253 | u32 adr, res; |
9254 | u32 src, dst; |
9255 | |
9256 | FETCH_SWORD(adr); |
9257 | adr += AREG((Opcode >> 0) & 7); |
9258 | PRE_IO |
9259 | READ_LONG_F(adr, res) |
9260 | flag_C = 0; |
9261 | flag_V = 0; |
9262 | flag_NotZ = res; |
9263 | flag_N = res >> 24; |
9264 | adr = AREG(7); |
9265 | AREG(7) += 4; |
9266 | WRITE_LONG_F(adr, res) |
9267 | POST_IO |
9268 | RET(24) |
9269 | } |
9270 | |
9271 | // MOVEL |
9272 | OPCODE(0x2F28) |
9273 | { |
9274 | u32 adr, res; |
9275 | u32 src, dst; |
9276 | |
9277 | FETCH_SWORD(adr); |
9278 | adr += AREG((Opcode >> 0) & 7); |
9279 | PRE_IO |
9280 | READ_LONG_F(adr, res) |
9281 | flag_C = 0; |
9282 | flag_V = 0; |
9283 | flag_NotZ = res; |
9284 | flag_N = res >> 24; |
9285 | adr = AREG(7) - 4; |
9286 | AREG(7) = adr; |
03e4f2a3 |
9287 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9288 | POST_IO |
9289 | RET(24) |
9290 | } |
9291 | |
9292 | // MOVEL |
9293 | OPCODE(0x2030) |
9294 | { |
9295 | u32 adr, res; |
9296 | u32 src, dst; |
9297 | |
9298 | adr = AREG((Opcode >> 0) & 7); |
9299 | DECODE_EXT_WORD |
9300 | PRE_IO |
9301 | READ_LONG_F(adr, res) |
9302 | flag_C = 0; |
9303 | flag_V = 0; |
9304 | flag_NotZ = res; |
9305 | flag_N = res >> 24; |
9306 | DREGu32((Opcode >> 9) & 7) = res; |
9307 | POST_IO |
9308 | RET(18) |
9309 | } |
9310 | |
9311 | // MOVEL |
9312 | OPCODE(0x20B0) |
9313 | { |
9314 | u32 adr, res; |
9315 | u32 src, dst; |
9316 | |
9317 | adr = AREG((Opcode >> 0) & 7); |
9318 | DECODE_EXT_WORD |
9319 | PRE_IO |
9320 | READ_LONG_F(adr, res) |
9321 | flag_C = 0; |
9322 | flag_V = 0; |
9323 | flag_NotZ = res; |
9324 | flag_N = res >> 24; |
9325 | adr = AREG((Opcode >> 9) & 7); |
9326 | WRITE_LONG_F(adr, res) |
9327 | POST_IO |
9328 | RET(26) |
9329 | } |
9330 | |
9331 | // MOVEL |
9332 | OPCODE(0x20F0) |
9333 | { |
9334 | u32 adr, res; |
9335 | u32 src, dst; |
9336 | |
9337 | adr = AREG((Opcode >> 0) & 7); |
9338 | DECODE_EXT_WORD |
9339 | PRE_IO |
9340 | READ_LONG_F(adr, res) |
9341 | flag_C = 0; |
9342 | flag_V = 0; |
9343 | flag_NotZ = res; |
9344 | flag_N = res >> 24; |
9345 | adr = AREG((Opcode >> 9) & 7); |
9346 | AREG((Opcode >> 9) & 7) += 4; |
9347 | WRITE_LONG_F(adr, res) |
9348 | POST_IO |
9349 | RET(26) |
9350 | } |
9351 | |
9352 | // MOVEL |
9353 | OPCODE(0x2130) |
9354 | { |
9355 | u32 adr, res; |
9356 | u32 src, dst; |
9357 | |
9358 | adr = AREG((Opcode >> 0) & 7); |
9359 | DECODE_EXT_WORD |
9360 | PRE_IO |
9361 | READ_LONG_F(adr, res) |
9362 | flag_C = 0; |
9363 | flag_V = 0; |
9364 | flag_NotZ = res; |
9365 | flag_N = res >> 24; |
9366 | adr = AREG((Opcode >> 9) & 7) - 4; |
9367 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9368 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9369 | POST_IO |
9370 | RET(26) |
9371 | } |
9372 | |
9373 | // MOVEL |
9374 | OPCODE(0x2170) |
9375 | { |
9376 | u32 adr, res; |
9377 | u32 src, dst; |
9378 | |
9379 | adr = AREG((Opcode >> 0) & 7); |
9380 | DECODE_EXT_WORD |
9381 | PRE_IO |
9382 | READ_LONG_F(adr, res) |
9383 | flag_C = 0; |
9384 | flag_V = 0; |
9385 | flag_NotZ = res; |
9386 | flag_N = res >> 24; |
9387 | FETCH_SWORD(adr); |
9388 | adr += AREG((Opcode >> 9) & 7); |
9389 | WRITE_LONG_F(adr, res) |
9390 | POST_IO |
9391 | RET(30) |
9392 | } |
9393 | |
9394 | // MOVEL |
9395 | OPCODE(0x21B0) |
9396 | { |
9397 | u32 adr, res; |
9398 | u32 src, dst; |
9399 | |
9400 | adr = AREG((Opcode >> 0) & 7); |
9401 | DECODE_EXT_WORD |
9402 | PRE_IO |
9403 | READ_LONG_F(adr, res) |
9404 | flag_C = 0; |
9405 | flag_V = 0; |
9406 | flag_NotZ = res; |
9407 | flag_N = res >> 24; |
9408 | adr = AREG((Opcode >> 9) & 7); |
9409 | DECODE_EXT_WORD |
9410 | WRITE_LONG_F(adr, res) |
9411 | POST_IO |
9412 | RET(32) |
9413 | } |
9414 | |
9415 | // MOVEL |
9416 | OPCODE(0x21F0) |
9417 | { |
9418 | u32 adr, res; |
9419 | u32 src, dst; |
9420 | |
9421 | adr = AREG((Opcode >> 0) & 7); |
9422 | DECODE_EXT_WORD |
9423 | PRE_IO |
9424 | READ_LONG_F(adr, res) |
9425 | flag_C = 0; |
9426 | flag_V = 0; |
9427 | flag_NotZ = res; |
9428 | flag_N = res >> 24; |
9429 | FETCH_SWORD(adr); |
9430 | WRITE_LONG_F(adr, res) |
9431 | POST_IO |
9432 | RET(30) |
9433 | } |
9434 | |
9435 | // MOVEL |
9436 | OPCODE(0x23F0) |
9437 | { |
9438 | u32 adr, res; |
9439 | u32 src, dst; |
9440 | |
9441 | adr = AREG((Opcode >> 0) & 7); |
9442 | DECODE_EXT_WORD |
9443 | PRE_IO |
9444 | READ_LONG_F(adr, res) |
9445 | flag_C = 0; |
9446 | flag_V = 0; |
9447 | flag_NotZ = res; |
9448 | flag_N = res >> 24; |
9449 | FETCH_LONG(adr); |
9450 | WRITE_LONG_F(adr, res) |
9451 | POST_IO |
9452 | RET(34) |
9453 | } |
9454 | |
9455 | // MOVEL |
9456 | OPCODE(0x2EF0) |
9457 | { |
9458 | u32 adr, res; |
9459 | u32 src, dst; |
9460 | |
9461 | adr = AREG((Opcode >> 0) & 7); |
9462 | DECODE_EXT_WORD |
9463 | PRE_IO |
9464 | READ_LONG_F(adr, res) |
9465 | flag_C = 0; |
9466 | flag_V = 0; |
9467 | flag_NotZ = res; |
9468 | flag_N = res >> 24; |
9469 | adr = AREG(7); |
9470 | AREG(7) += 4; |
9471 | WRITE_LONG_F(adr, res) |
9472 | POST_IO |
9473 | RET(26) |
9474 | } |
9475 | |
9476 | // MOVEL |
9477 | OPCODE(0x2F30) |
9478 | { |
9479 | u32 adr, res; |
9480 | u32 src, dst; |
9481 | |
9482 | adr = AREG((Opcode >> 0) & 7); |
9483 | DECODE_EXT_WORD |
9484 | PRE_IO |
9485 | READ_LONG_F(adr, res) |
9486 | flag_C = 0; |
9487 | flag_V = 0; |
9488 | flag_NotZ = res; |
9489 | flag_N = res >> 24; |
9490 | adr = AREG(7) - 4; |
9491 | AREG(7) = adr; |
03e4f2a3 |
9492 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9493 | POST_IO |
9494 | RET(26) |
9495 | } |
9496 | |
9497 | // MOVEL |
9498 | OPCODE(0x2038) |
9499 | { |
9500 | u32 adr, res; |
9501 | u32 src, dst; |
9502 | |
9503 | FETCH_SWORD(adr); |
9504 | PRE_IO |
9505 | READ_LONG_F(adr, res) |
9506 | flag_C = 0; |
9507 | flag_V = 0; |
9508 | flag_NotZ = res; |
9509 | flag_N = res >> 24; |
9510 | DREGu32((Opcode >> 9) & 7) = res; |
9511 | POST_IO |
9512 | RET(16) |
9513 | } |
9514 | |
9515 | // MOVEL |
9516 | OPCODE(0x20B8) |
9517 | { |
9518 | u32 adr, res; |
9519 | u32 src, dst; |
9520 | |
9521 | FETCH_SWORD(adr); |
9522 | PRE_IO |
9523 | READ_LONG_F(adr, res) |
9524 | flag_C = 0; |
9525 | flag_V = 0; |
9526 | flag_NotZ = res; |
9527 | flag_N = res >> 24; |
9528 | adr = AREG((Opcode >> 9) & 7); |
9529 | WRITE_LONG_F(adr, res) |
9530 | POST_IO |
9531 | RET(24) |
9532 | } |
9533 | |
9534 | // MOVEL |
9535 | OPCODE(0x20F8) |
9536 | { |
9537 | u32 adr, res; |
9538 | u32 src, dst; |
9539 | |
9540 | FETCH_SWORD(adr); |
9541 | PRE_IO |
9542 | READ_LONG_F(adr, res) |
9543 | flag_C = 0; |
9544 | flag_V = 0; |
9545 | flag_NotZ = res; |
9546 | flag_N = res >> 24; |
9547 | adr = AREG((Opcode >> 9) & 7); |
9548 | AREG((Opcode >> 9) & 7) += 4; |
9549 | WRITE_LONG_F(adr, res) |
9550 | POST_IO |
9551 | RET(24) |
9552 | } |
9553 | |
9554 | // MOVEL |
9555 | OPCODE(0x2138) |
9556 | { |
9557 | u32 adr, res; |
9558 | u32 src, dst; |
9559 | |
9560 | FETCH_SWORD(adr); |
9561 | PRE_IO |
9562 | READ_LONG_F(adr, res) |
9563 | flag_C = 0; |
9564 | flag_V = 0; |
9565 | flag_NotZ = res; |
9566 | flag_N = res >> 24; |
9567 | adr = AREG((Opcode >> 9) & 7) - 4; |
9568 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9569 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9570 | POST_IO |
9571 | RET(24) |
9572 | } |
9573 | |
9574 | // MOVEL |
9575 | OPCODE(0x2178) |
9576 | { |
9577 | u32 adr, res; |
9578 | u32 src, dst; |
9579 | |
9580 | FETCH_SWORD(adr); |
9581 | PRE_IO |
9582 | READ_LONG_F(adr, res) |
9583 | flag_C = 0; |
9584 | flag_V = 0; |
9585 | flag_NotZ = res; |
9586 | flag_N = res >> 24; |
9587 | FETCH_SWORD(adr); |
9588 | adr += AREG((Opcode >> 9) & 7); |
9589 | WRITE_LONG_F(adr, res) |
9590 | POST_IO |
9591 | RET(28) |
9592 | } |
9593 | |
9594 | // MOVEL |
9595 | OPCODE(0x21B8) |
9596 | { |
9597 | u32 adr, res; |
9598 | u32 src, dst; |
9599 | |
9600 | FETCH_SWORD(adr); |
9601 | PRE_IO |
9602 | READ_LONG_F(adr, res) |
9603 | flag_C = 0; |
9604 | flag_V = 0; |
9605 | flag_NotZ = res; |
9606 | flag_N = res >> 24; |
9607 | adr = AREG((Opcode >> 9) & 7); |
9608 | DECODE_EXT_WORD |
9609 | WRITE_LONG_F(adr, res) |
9610 | POST_IO |
9611 | RET(30) |
9612 | } |
9613 | |
9614 | // MOVEL |
9615 | OPCODE(0x21F8) |
9616 | { |
9617 | u32 adr, res; |
9618 | u32 src, dst; |
9619 | |
9620 | FETCH_SWORD(adr); |
9621 | PRE_IO |
9622 | READ_LONG_F(adr, res) |
9623 | flag_C = 0; |
9624 | flag_V = 0; |
9625 | flag_NotZ = res; |
9626 | flag_N = res >> 24; |
9627 | FETCH_SWORD(adr); |
9628 | WRITE_LONG_F(adr, res) |
9629 | POST_IO |
9630 | RET(28) |
9631 | } |
9632 | |
9633 | // MOVEL |
9634 | OPCODE(0x23F8) |
9635 | { |
9636 | u32 adr, res; |
9637 | u32 src, dst; |
9638 | |
9639 | FETCH_SWORD(adr); |
9640 | PRE_IO |
9641 | READ_LONG_F(adr, res) |
9642 | flag_C = 0; |
9643 | flag_V = 0; |
9644 | flag_NotZ = res; |
9645 | flag_N = res >> 24; |
9646 | FETCH_LONG(adr); |
9647 | WRITE_LONG_F(adr, res) |
9648 | POST_IO |
9649 | RET(32) |
9650 | } |
9651 | |
9652 | // MOVEL |
9653 | OPCODE(0x2EF8) |
9654 | { |
9655 | u32 adr, res; |
9656 | u32 src, dst; |
9657 | |
9658 | FETCH_SWORD(adr); |
9659 | PRE_IO |
9660 | READ_LONG_F(adr, res) |
9661 | flag_C = 0; |
9662 | flag_V = 0; |
9663 | flag_NotZ = res; |
9664 | flag_N = res >> 24; |
9665 | adr = AREG(7); |
9666 | AREG(7) += 4; |
9667 | WRITE_LONG_F(adr, res) |
9668 | POST_IO |
9669 | RET(24) |
9670 | } |
9671 | |
9672 | // MOVEL |
9673 | OPCODE(0x2F38) |
9674 | { |
9675 | u32 adr, res; |
9676 | u32 src, dst; |
9677 | |
9678 | FETCH_SWORD(adr); |
9679 | PRE_IO |
9680 | READ_LONG_F(adr, res) |
9681 | flag_C = 0; |
9682 | flag_V = 0; |
9683 | flag_NotZ = res; |
9684 | flag_N = res >> 24; |
9685 | adr = AREG(7) - 4; |
9686 | AREG(7) = adr; |
03e4f2a3 |
9687 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9688 | POST_IO |
9689 | RET(24) |
9690 | } |
9691 | |
9692 | // MOVEL |
9693 | OPCODE(0x2039) |
9694 | { |
9695 | u32 adr, res; |
9696 | u32 src, dst; |
9697 | |
9698 | FETCH_LONG(adr); |
9699 | PRE_IO |
9700 | READ_LONG_F(adr, res) |
9701 | flag_C = 0; |
9702 | flag_V = 0; |
9703 | flag_NotZ = res; |
9704 | flag_N = res >> 24; |
9705 | DREGu32((Opcode >> 9) & 7) = res; |
9706 | POST_IO |
9707 | RET(20) |
9708 | } |
9709 | |
9710 | // MOVEL |
9711 | OPCODE(0x20B9) |
9712 | { |
9713 | u32 adr, res; |
9714 | u32 src, dst; |
9715 | |
9716 | FETCH_LONG(adr); |
9717 | PRE_IO |
9718 | READ_LONG_F(adr, res) |
9719 | flag_C = 0; |
9720 | flag_V = 0; |
9721 | flag_NotZ = res; |
9722 | flag_N = res >> 24; |
9723 | adr = AREG((Opcode >> 9) & 7); |
9724 | WRITE_LONG_F(adr, res) |
9725 | POST_IO |
9726 | RET(28) |
9727 | } |
9728 | |
9729 | // MOVEL |
9730 | OPCODE(0x20F9) |
9731 | { |
9732 | u32 adr, res; |
9733 | u32 src, dst; |
9734 | |
9735 | FETCH_LONG(adr); |
9736 | PRE_IO |
9737 | READ_LONG_F(adr, res) |
9738 | flag_C = 0; |
9739 | flag_V = 0; |
9740 | flag_NotZ = res; |
9741 | flag_N = res >> 24; |
9742 | adr = AREG((Opcode >> 9) & 7); |
9743 | AREG((Opcode >> 9) & 7) += 4; |
9744 | WRITE_LONG_F(adr, res) |
9745 | POST_IO |
9746 | RET(28) |
9747 | } |
9748 | |
9749 | // MOVEL |
9750 | OPCODE(0x2139) |
9751 | { |
9752 | u32 adr, res; |
9753 | u32 src, dst; |
9754 | |
9755 | FETCH_LONG(adr); |
9756 | PRE_IO |
9757 | READ_LONG_F(adr, res) |
9758 | flag_C = 0; |
9759 | flag_V = 0; |
9760 | flag_NotZ = res; |
9761 | flag_N = res >> 24; |
9762 | adr = AREG((Opcode >> 9) & 7) - 4; |
9763 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9764 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9765 | POST_IO |
9766 | RET(28) |
9767 | } |
9768 | |
9769 | // MOVEL |
9770 | OPCODE(0x2179) |
9771 | { |
9772 | u32 adr, res; |
9773 | u32 src, dst; |
9774 | |
9775 | FETCH_LONG(adr); |
9776 | PRE_IO |
9777 | READ_LONG_F(adr, res) |
9778 | flag_C = 0; |
9779 | flag_V = 0; |
9780 | flag_NotZ = res; |
9781 | flag_N = res >> 24; |
9782 | FETCH_SWORD(adr); |
9783 | adr += AREG((Opcode >> 9) & 7); |
9784 | WRITE_LONG_F(adr, res) |
9785 | POST_IO |
9786 | RET(32) |
9787 | } |
9788 | |
9789 | // MOVEL |
9790 | OPCODE(0x21B9) |
9791 | { |
9792 | u32 adr, res; |
9793 | u32 src, dst; |
9794 | |
9795 | FETCH_LONG(adr); |
9796 | PRE_IO |
9797 | READ_LONG_F(adr, res) |
9798 | flag_C = 0; |
9799 | flag_V = 0; |
9800 | flag_NotZ = res; |
9801 | flag_N = res >> 24; |
9802 | adr = AREG((Opcode >> 9) & 7); |
9803 | DECODE_EXT_WORD |
9804 | WRITE_LONG_F(adr, res) |
9805 | POST_IO |
9806 | RET(34) |
9807 | } |
9808 | |
9809 | // MOVEL |
9810 | OPCODE(0x21F9) |
9811 | { |
9812 | u32 adr, res; |
9813 | u32 src, dst; |
9814 | |
9815 | FETCH_LONG(adr); |
9816 | PRE_IO |
9817 | READ_LONG_F(adr, res) |
9818 | flag_C = 0; |
9819 | flag_V = 0; |
9820 | flag_NotZ = res; |
9821 | flag_N = res >> 24; |
9822 | FETCH_SWORD(adr); |
9823 | WRITE_LONG_F(adr, res) |
9824 | POST_IO |
9825 | RET(32) |
9826 | } |
9827 | |
9828 | // MOVEL |
9829 | OPCODE(0x23F9) |
9830 | { |
9831 | u32 adr, res; |
9832 | u32 src, dst; |
9833 | |
9834 | FETCH_LONG(adr); |
9835 | PRE_IO |
9836 | READ_LONG_F(adr, res) |
9837 | flag_C = 0; |
9838 | flag_V = 0; |
9839 | flag_NotZ = res; |
9840 | flag_N = res >> 24; |
9841 | FETCH_LONG(adr); |
9842 | WRITE_LONG_F(adr, res) |
9843 | POST_IO |
9844 | RET(36) |
9845 | } |
9846 | |
9847 | // MOVEL |
9848 | OPCODE(0x2EF9) |
9849 | { |
9850 | u32 adr, res; |
9851 | u32 src, dst; |
9852 | |
9853 | FETCH_LONG(adr); |
9854 | PRE_IO |
9855 | READ_LONG_F(adr, res) |
9856 | flag_C = 0; |
9857 | flag_V = 0; |
9858 | flag_NotZ = res; |
9859 | flag_N = res >> 24; |
9860 | adr = AREG(7); |
9861 | AREG(7) += 4; |
9862 | WRITE_LONG_F(adr, res) |
9863 | POST_IO |
9864 | RET(28) |
9865 | } |
9866 | |
9867 | // MOVEL |
9868 | OPCODE(0x2F39) |
9869 | { |
9870 | u32 adr, res; |
9871 | u32 src, dst; |
9872 | |
9873 | FETCH_LONG(adr); |
9874 | PRE_IO |
9875 | READ_LONG_F(adr, res) |
9876 | flag_C = 0; |
9877 | flag_V = 0; |
9878 | flag_NotZ = res; |
9879 | flag_N = res >> 24; |
9880 | adr = AREG(7) - 4; |
9881 | AREG(7) = adr; |
03e4f2a3 |
9882 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9883 | POST_IO |
9884 | RET(28) |
9885 | } |
9886 | |
9887 | // MOVEL |
9888 | OPCODE(0x203A) |
9889 | { |
9890 | u32 adr, res; |
9891 | u32 src, dst; |
9892 | |
9893 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9894 | PC++; |
9895 | PRE_IO |
9896 | READ_LONG_F(adr, res) |
9897 | flag_C = 0; |
9898 | flag_V = 0; |
9899 | flag_NotZ = res; |
9900 | flag_N = res >> 24; |
9901 | DREGu32((Opcode >> 9) & 7) = res; |
9902 | POST_IO |
9903 | RET(16) |
9904 | } |
9905 | |
9906 | // MOVEL |
9907 | OPCODE(0x20BA) |
9908 | { |
9909 | u32 adr, res; |
9910 | u32 src, dst; |
9911 | |
9912 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9913 | PC++; |
9914 | PRE_IO |
9915 | READ_LONG_F(adr, res) |
9916 | flag_C = 0; |
9917 | flag_V = 0; |
9918 | flag_NotZ = res; |
9919 | flag_N = res >> 24; |
9920 | adr = AREG((Opcode >> 9) & 7); |
9921 | WRITE_LONG_F(adr, res) |
9922 | POST_IO |
9923 | RET(24) |
9924 | } |
9925 | |
9926 | // MOVEL |
9927 | OPCODE(0x20FA) |
9928 | { |
9929 | u32 adr, res; |
9930 | u32 src, dst; |
9931 | |
9932 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9933 | PC++; |
9934 | PRE_IO |
9935 | READ_LONG_F(adr, res) |
9936 | flag_C = 0; |
9937 | flag_V = 0; |
9938 | flag_NotZ = res; |
9939 | flag_N = res >> 24; |
9940 | adr = AREG((Opcode >> 9) & 7); |
9941 | AREG((Opcode >> 9) & 7) += 4; |
9942 | WRITE_LONG_F(adr, res) |
9943 | POST_IO |
9944 | RET(24) |
9945 | } |
9946 | |
9947 | // MOVEL |
9948 | OPCODE(0x213A) |
9949 | { |
9950 | u32 adr, res; |
9951 | u32 src, dst; |
9952 | |
9953 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9954 | PC++; |
9955 | PRE_IO |
9956 | READ_LONG_F(adr, res) |
9957 | flag_C = 0; |
9958 | flag_V = 0; |
9959 | flag_NotZ = res; |
9960 | flag_N = res >> 24; |
9961 | adr = AREG((Opcode >> 9) & 7) - 4; |
9962 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9963 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9964 | POST_IO |
9965 | RET(24) |
9966 | } |
9967 | |
9968 | // MOVEL |
9969 | OPCODE(0x217A) |
9970 | { |
9971 | u32 adr, res; |
9972 | u32 src, dst; |
9973 | |
9974 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9975 | PC++; |
9976 | PRE_IO |
9977 | READ_LONG_F(adr, res) |
9978 | flag_C = 0; |
9979 | flag_V = 0; |
9980 | flag_NotZ = res; |
9981 | flag_N = res >> 24; |
9982 | FETCH_SWORD(adr); |
9983 | adr += AREG((Opcode >> 9) & 7); |
9984 | WRITE_LONG_F(adr, res) |
9985 | POST_IO |
9986 | RET(28) |
9987 | } |
9988 | |
9989 | // MOVEL |
9990 | OPCODE(0x21BA) |
9991 | { |
9992 | u32 adr, res; |
9993 | u32 src, dst; |
9994 | |
9995 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9996 | PC++; |
9997 | PRE_IO |
9998 | READ_LONG_F(adr, res) |
9999 | flag_C = 0; |
10000 | flag_V = 0; |
10001 | flag_NotZ = res; |
10002 | flag_N = res >> 24; |
10003 | adr = AREG((Opcode >> 9) & 7); |
10004 | DECODE_EXT_WORD |
10005 | WRITE_LONG_F(adr, res) |
10006 | POST_IO |
10007 | RET(30) |
10008 | } |
10009 | |
10010 | // MOVEL |
10011 | OPCODE(0x21FA) |
10012 | { |
10013 | u32 adr, res; |
10014 | u32 src, dst; |
10015 | |
10016 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10017 | PC++; |
10018 | PRE_IO |
10019 | READ_LONG_F(adr, res) |
10020 | flag_C = 0; |
10021 | flag_V = 0; |
10022 | flag_NotZ = res; |
10023 | flag_N = res >> 24; |
10024 | FETCH_SWORD(adr); |
10025 | WRITE_LONG_F(adr, res) |
10026 | POST_IO |
10027 | RET(28) |
10028 | } |
10029 | |
10030 | // MOVEL |
10031 | OPCODE(0x23FA) |
10032 | { |
10033 | u32 adr, res; |
10034 | u32 src, dst; |
10035 | |
10036 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10037 | PC++; |
10038 | PRE_IO |
10039 | READ_LONG_F(adr, res) |
10040 | flag_C = 0; |
10041 | flag_V = 0; |
10042 | flag_NotZ = res; |
10043 | flag_N = res >> 24; |
10044 | FETCH_LONG(adr); |
10045 | WRITE_LONG_F(adr, res) |
10046 | POST_IO |
10047 | RET(32) |
10048 | } |
10049 | |
10050 | // MOVEL |
10051 | OPCODE(0x2EFA) |
10052 | { |
10053 | u32 adr, res; |
10054 | u32 src, dst; |
10055 | |
10056 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10057 | PC++; |
10058 | PRE_IO |
10059 | READ_LONG_F(adr, res) |
10060 | flag_C = 0; |
10061 | flag_V = 0; |
10062 | flag_NotZ = res; |
10063 | flag_N = res >> 24; |
10064 | adr = AREG(7); |
10065 | AREG(7) += 4; |
10066 | WRITE_LONG_F(adr, res) |
10067 | POST_IO |
10068 | RET(24) |
10069 | } |
10070 | |
10071 | // MOVEL |
10072 | OPCODE(0x2F3A) |
10073 | { |
10074 | u32 adr, res; |
10075 | u32 src, dst; |
10076 | |
10077 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10078 | PC++; |
10079 | PRE_IO |
10080 | READ_LONG_F(adr, res) |
10081 | flag_C = 0; |
10082 | flag_V = 0; |
10083 | flag_NotZ = res; |
10084 | flag_N = res >> 24; |
10085 | adr = AREG(7) - 4; |
10086 | AREG(7) = adr; |
03e4f2a3 |
10087 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10088 | POST_IO |
10089 | RET(24) |
10090 | } |
10091 | |
10092 | // MOVEL |
10093 | OPCODE(0x203B) |
10094 | { |
10095 | u32 adr, res; |
10096 | u32 src, dst; |
10097 | |
10098 | adr = (u32)(PC) - BasePC; |
10099 | DECODE_EXT_WORD |
10100 | PRE_IO |
10101 | READ_LONG_F(adr, res) |
10102 | flag_C = 0; |
10103 | flag_V = 0; |
10104 | flag_NotZ = res; |
10105 | flag_N = res >> 24; |
10106 | DREGu32((Opcode >> 9) & 7) = res; |
10107 | POST_IO |
10108 | RET(18) |
10109 | } |
10110 | |
10111 | // MOVEL |
10112 | OPCODE(0x20BB) |
10113 | { |
10114 | u32 adr, res; |
10115 | u32 src, dst; |
10116 | |
10117 | adr = (u32)(PC) - BasePC; |
10118 | DECODE_EXT_WORD |
10119 | PRE_IO |
10120 | READ_LONG_F(adr, res) |
10121 | flag_C = 0; |
10122 | flag_V = 0; |
10123 | flag_NotZ = res; |
10124 | flag_N = res >> 24; |
10125 | adr = AREG((Opcode >> 9) & 7); |
10126 | WRITE_LONG_F(adr, res) |
10127 | POST_IO |
10128 | RET(26) |
10129 | } |
10130 | |
10131 | // MOVEL |
10132 | OPCODE(0x20FB) |
10133 | { |
10134 | u32 adr, res; |
10135 | u32 src, dst; |
10136 | |
10137 | adr = (u32)(PC) - BasePC; |
10138 | DECODE_EXT_WORD |
10139 | PRE_IO |
10140 | READ_LONG_F(adr, res) |
10141 | flag_C = 0; |
10142 | flag_V = 0; |
10143 | flag_NotZ = res; |
10144 | flag_N = res >> 24; |
10145 | adr = AREG((Opcode >> 9) & 7); |
10146 | AREG((Opcode >> 9) & 7) += 4; |
10147 | WRITE_LONG_F(adr, res) |
10148 | POST_IO |
10149 | RET(26) |
10150 | } |
10151 | |
10152 | // MOVEL |
10153 | OPCODE(0x213B) |
10154 | { |
10155 | u32 adr, res; |
10156 | u32 src, dst; |
10157 | |
10158 | adr = (u32)(PC) - BasePC; |
10159 | DECODE_EXT_WORD |
10160 | PRE_IO |
10161 | READ_LONG_F(adr, res) |
10162 | flag_C = 0; |
10163 | flag_V = 0; |
10164 | flag_NotZ = res; |
10165 | flag_N = res >> 24; |
10166 | adr = AREG((Opcode >> 9) & 7) - 4; |
10167 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10168 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10169 | POST_IO |
10170 | RET(26) |
10171 | } |
10172 | |
10173 | // MOVEL |
10174 | OPCODE(0x217B) |
10175 | { |
10176 | u32 adr, res; |
10177 | u32 src, dst; |
10178 | |
10179 | adr = (u32)(PC) - BasePC; |
10180 | DECODE_EXT_WORD |
10181 | PRE_IO |
10182 | READ_LONG_F(adr, res) |
10183 | flag_C = 0; |
10184 | flag_V = 0; |
10185 | flag_NotZ = res; |
10186 | flag_N = res >> 24; |
10187 | FETCH_SWORD(adr); |
10188 | adr += AREG((Opcode >> 9) & 7); |
10189 | WRITE_LONG_F(adr, res) |
10190 | POST_IO |
10191 | RET(30) |
10192 | } |
10193 | |
10194 | // MOVEL |
10195 | OPCODE(0x21BB) |
10196 | { |
10197 | u32 adr, res; |
10198 | u32 src, dst; |
10199 | |
10200 | adr = (u32)(PC) - BasePC; |
10201 | DECODE_EXT_WORD |
10202 | PRE_IO |
10203 | READ_LONG_F(adr, res) |
10204 | flag_C = 0; |
10205 | flag_V = 0; |
10206 | flag_NotZ = res; |
10207 | flag_N = res >> 24; |
10208 | adr = AREG((Opcode >> 9) & 7); |
10209 | DECODE_EXT_WORD |
10210 | WRITE_LONG_F(adr, res) |
10211 | POST_IO |
10212 | RET(32) |
10213 | } |
10214 | |
10215 | // MOVEL |
10216 | OPCODE(0x21FB) |
10217 | { |
10218 | u32 adr, res; |
10219 | u32 src, dst; |
10220 | |
10221 | adr = (u32)(PC) - BasePC; |
10222 | DECODE_EXT_WORD |
10223 | PRE_IO |
10224 | READ_LONG_F(adr, res) |
10225 | flag_C = 0; |
10226 | flag_V = 0; |
10227 | flag_NotZ = res; |
10228 | flag_N = res >> 24; |
10229 | FETCH_SWORD(adr); |
10230 | WRITE_LONG_F(adr, res) |
10231 | POST_IO |
10232 | RET(30) |
10233 | } |
10234 | |
10235 | // MOVEL |
10236 | OPCODE(0x23FB) |
10237 | { |
10238 | u32 adr, res; |
10239 | u32 src, dst; |
10240 | |
10241 | adr = (u32)(PC) - BasePC; |
10242 | DECODE_EXT_WORD |
10243 | PRE_IO |
10244 | READ_LONG_F(adr, res) |
10245 | flag_C = 0; |
10246 | flag_V = 0; |
10247 | flag_NotZ = res; |
10248 | flag_N = res >> 24; |
10249 | FETCH_LONG(adr); |
10250 | WRITE_LONG_F(adr, res) |
10251 | POST_IO |
10252 | RET(34) |
10253 | } |
10254 | |
10255 | // MOVEL |
10256 | OPCODE(0x2EFB) |
10257 | { |
10258 | u32 adr, res; |
10259 | u32 src, dst; |
10260 | |
10261 | adr = (u32)(PC) - BasePC; |
10262 | DECODE_EXT_WORD |
10263 | PRE_IO |
10264 | READ_LONG_F(adr, res) |
10265 | flag_C = 0; |
10266 | flag_V = 0; |
10267 | flag_NotZ = res; |
10268 | flag_N = res >> 24; |
10269 | adr = AREG(7); |
10270 | AREG(7) += 4; |
10271 | WRITE_LONG_F(adr, res) |
10272 | POST_IO |
10273 | RET(26) |
10274 | } |
10275 | |
10276 | // MOVEL |
10277 | OPCODE(0x2F3B) |
10278 | { |
10279 | u32 adr, res; |
10280 | u32 src, dst; |
10281 | |
10282 | adr = (u32)(PC) - BasePC; |
10283 | DECODE_EXT_WORD |
10284 | PRE_IO |
10285 | READ_LONG_F(adr, res) |
10286 | flag_C = 0; |
10287 | flag_V = 0; |
10288 | flag_NotZ = res; |
10289 | flag_N = res >> 24; |
10290 | adr = AREG(7) - 4; |
10291 | AREG(7) = adr; |
03e4f2a3 |
10292 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10293 | POST_IO |
10294 | RET(26) |
10295 | } |
10296 | |
10297 | // MOVEL |
10298 | OPCODE(0x203C) |
10299 | { |
10300 | u32 adr, res; |
10301 | u32 src, dst; |
10302 | |
10303 | FETCH_LONG(res); |
10304 | flag_C = 0; |
10305 | flag_V = 0; |
10306 | flag_NotZ = res; |
10307 | flag_N = res >> 24; |
10308 | DREGu32((Opcode >> 9) & 7) = res; |
10309 | RET(12) |
10310 | } |
10311 | |
10312 | // MOVEL |
10313 | OPCODE(0x20BC) |
10314 | { |
10315 | u32 adr, res; |
10316 | u32 src, dst; |
10317 | |
10318 | FETCH_LONG(res); |
10319 | flag_C = 0; |
10320 | flag_V = 0; |
10321 | flag_NotZ = res; |
10322 | flag_N = res >> 24; |
10323 | adr = AREG((Opcode >> 9) & 7); |
10324 | PRE_IO |
10325 | WRITE_LONG_F(adr, res) |
10326 | POST_IO |
10327 | RET(20) |
10328 | } |
10329 | |
10330 | // MOVEL |
10331 | OPCODE(0x20FC) |
10332 | { |
10333 | u32 adr, res; |
10334 | u32 src, dst; |
10335 | |
10336 | FETCH_LONG(res); |
10337 | flag_C = 0; |
10338 | flag_V = 0; |
10339 | flag_NotZ = res; |
10340 | flag_N = res >> 24; |
10341 | adr = AREG((Opcode >> 9) & 7); |
10342 | AREG((Opcode >> 9) & 7) += 4; |
10343 | PRE_IO |
10344 | WRITE_LONG_F(adr, res) |
10345 | POST_IO |
10346 | RET(20) |
10347 | } |
10348 | |
10349 | // MOVEL |
10350 | OPCODE(0x213C) |
10351 | { |
10352 | u32 adr, res; |
10353 | u32 src, dst; |
10354 | |
10355 | FETCH_LONG(res); |
10356 | flag_C = 0; |
10357 | flag_V = 0; |
10358 | flag_NotZ = res; |
10359 | flag_N = res >> 24; |
10360 | adr = AREG((Opcode >> 9) & 7) - 4; |
10361 | AREG((Opcode >> 9) & 7) = adr; |
10362 | PRE_IO |
80db4442 |
10363 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10364 | POST_IO |
10365 | RET(20) |
10366 | } |
10367 | |
10368 | // MOVEL |
10369 | OPCODE(0x217C) |
10370 | { |
10371 | u32 adr, res; |
10372 | u32 src, dst; |
10373 | |
10374 | FETCH_LONG(res); |
10375 | flag_C = 0; |
10376 | flag_V = 0; |
10377 | flag_NotZ = res; |
10378 | flag_N = res >> 24; |
10379 | FETCH_SWORD(adr); |
10380 | adr += AREG((Opcode >> 9) & 7); |
10381 | PRE_IO |
10382 | WRITE_LONG_F(adr, res) |
10383 | POST_IO |
10384 | RET(24) |
10385 | } |
10386 | |
10387 | // MOVEL |
10388 | OPCODE(0x21BC) |
10389 | { |
10390 | u32 adr, res; |
10391 | u32 src, dst; |
10392 | |
10393 | FETCH_LONG(res); |
10394 | flag_C = 0; |
10395 | flag_V = 0; |
10396 | flag_NotZ = res; |
10397 | flag_N = res >> 24; |
10398 | adr = AREG((Opcode >> 9) & 7); |
10399 | DECODE_EXT_WORD |
10400 | PRE_IO |
10401 | WRITE_LONG_F(adr, res) |
10402 | POST_IO |
10403 | RET(26) |
10404 | } |
10405 | |
10406 | // MOVEL |
10407 | OPCODE(0x21FC) |
10408 | { |
10409 | u32 adr, res; |
10410 | u32 src, dst; |
10411 | |
10412 | FETCH_LONG(res); |
10413 | flag_C = 0; |
10414 | flag_V = 0; |
10415 | flag_NotZ = res; |
10416 | flag_N = res >> 24; |
10417 | FETCH_SWORD(adr); |
10418 | PRE_IO |
10419 | WRITE_LONG_F(adr, res) |
10420 | POST_IO |
10421 | RET(24) |
10422 | } |
10423 | |
10424 | // MOVEL |
10425 | OPCODE(0x23FC) |
10426 | { |
10427 | u32 adr, res; |
10428 | u32 src, dst; |
10429 | |
10430 | FETCH_LONG(res); |
10431 | flag_C = 0; |
10432 | flag_V = 0; |
10433 | flag_NotZ = res; |
10434 | flag_N = res >> 24; |
10435 | FETCH_LONG(adr); |
10436 | PRE_IO |
10437 | WRITE_LONG_F(adr, res) |
10438 | POST_IO |
10439 | RET(28) |
10440 | } |
10441 | |
10442 | // MOVEL |
10443 | OPCODE(0x2EFC) |
10444 | { |
10445 | u32 adr, res; |
10446 | u32 src, dst; |
10447 | |
10448 | FETCH_LONG(res); |
10449 | flag_C = 0; |
10450 | flag_V = 0; |
10451 | flag_NotZ = res; |
10452 | flag_N = res >> 24; |
10453 | adr = AREG(7); |
10454 | AREG(7) += 4; |
10455 | PRE_IO |
10456 | WRITE_LONG_F(adr, res) |
10457 | POST_IO |
10458 | RET(20) |
10459 | } |
10460 | |
10461 | // MOVEL |
10462 | OPCODE(0x2F3C) |
10463 | { |
10464 | u32 adr, res; |
10465 | u32 src, dst; |
10466 | |
10467 | FETCH_LONG(res); |
10468 | flag_C = 0; |
10469 | flag_V = 0; |
10470 | flag_NotZ = res; |
10471 | flag_N = res >> 24; |
10472 | adr = AREG(7) - 4; |
10473 | AREG(7) = adr; |
10474 | PRE_IO |
03e4f2a3 |
10475 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10476 | POST_IO |
10477 | RET(20) |
10478 | } |
10479 | |
10480 | // MOVEL |
10481 | OPCODE(0x201F) |
10482 | { |
10483 | u32 adr, res; |
10484 | u32 src, dst; |
10485 | |
10486 | adr = AREG(7); |
10487 | AREG(7) += 4; |
10488 | PRE_IO |
10489 | READ_LONG_F(adr, res) |
10490 | flag_C = 0; |
10491 | flag_V = 0; |
10492 | flag_NotZ = res; |
10493 | flag_N = res >> 24; |
10494 | DREGu32((Opcode >> 9) & 7) = res; |
10495 | POST_IO |
10496 | RET(12) |
10497 | } |
10498 | |
10499 | // MOVEL |
10500 | OPCODE(0x209F) |
10501 | { |
10502 | u32 adr, res; |
10503 | u32 src, dst; |
10504 | |
10505 | adr = AREG(7); |
10506 | AREG(7) += 4; |
10507 | PRE_IO |
10508 | READ_LONG_F(adr, res) |
10509 | flag_C = 0; |
10510 | flag_V = 0; |
10511 | flag_NotZ = res; |
10512 | flag_N = res >> 24; |
10513 | adr = AREG((Opcode >> 9) & 7); |
10514 | WRITE_LONG_F(adr, res) |
10515 | POST_IO |
10516 | RET(20) |
10517 | } |
10518 | |
10519 | // MOVEL |
10520 | OPCODE(0x20DF) |
10521 | { |
10522 | u32 adr, res; |
10523 | u32 src, dst; |
10524 | |
10525 | adr = AREG(7); |
10526 | AREG(7) += 4; |
10527 | PRE_IO |
10528 | READ_LONG_F(adr, res) |
10529 | flag_C = 0; |
10530 | flag_V = 0; |
10531 | flag_NotZ = res; |
10532 | flag_N = res >> 24; |
10533 | adr = AREG((Opcode >> 9) & 7); |
10534 | AREG((Opcode >> 9) & 7) += 4; |
10535 | WRITE_LONG_F(adr, res) |
10536 | POST_IO |
10537 | RET(20) |
10538 | } |
10539 | |
10540 | // MOVEL |
10541 | OPCODE(0x211F) |
10542 | { |
10543 | u32 adr, res; |
10544 | u32 src, dst; |
10545 | |
10546 | adr = AREG(7); |
10547 | AREG(7) += 4; |
10548 | PRE_IO |
10549 | READ_LONG_F(adr, res) |
10550 | flag_C = 0; |
10551 | flag_V = 0; |
10552 | flag_NotZ = res; |
10553 | flag_N = res >> 24; |
10554 | adr = AREG((Opcode >> 9) & 7) - 4; |
10555 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10556 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10557 | POST_IO |
10558 | RET(20) |
10559 | } |
10560 | |
10561 | // MOVEL |
10562 | OPCODE(0x215F) |
10563 | { |
10564 | u32 adr, res; |
10565 | u32 src, dst; |
10566 | |
10567 | adr = AREG(7); |
10568 | AREG(7) += 4; |
10569 | PRE_IO |
10570 | READ_LONG_F(adr, res) |
10571 | flag_C = 0; |
10572 | flag_V = 0; |
10573 | flag_NotZ = res; |
10574 | flag_N = res >> 24; |
10575 | FETCH_SWORD(adr); |
10576 | adr += AREG((Opcode >> 9) & 7); |
10577 | WRITE_LONG_F(adr, res) |
10578 | POST_IO |
10579 | RET(24) |
10580 | } |
10581 | |
10582 | // MOVEL |
10583 | OPCODE(0x219F) |
10584 | { |
10585 | u32 adr, res; |
10586 | u32 src, dst; |
10587 | |
10588 | adr = AREG(7); |
10589 | AREG(7) += 4; |
10590 | PRE_IO |
10591 | READ_LONG_F(adr, res) |
10592 | flag_C = 0; |
10593 | flag_V = 0; |
10594 | flag_NotZ = res; |
10595 | flag_N = res >> 24; |
10596 | adr = AREG((Opcode >> 9) & 7); |
10597 | DECODE_EXT_WORD |
10598 | WRITE_LONG_F(adr, res) |
10599 | POST_IO |
10600 | RET(26) |
10601 | } |
10602 | |
10603 | // MOVEL |
10604 | OPCODE(0x21DF) |
10605 | { |
10606 | u32 adr, res; |
10607 | u32 src, dst; |
10608 | |
10609 | adr = AREG(7); |
10610 | AREG(7) += 4; |
10611 | PRE_IO |
10612 | READ_LONG_F(adr, res) |
10613 | flag_C = 0; |
10614 | flag_V = 0; |
10615 | flag_NotZ = res; |
10616 | flag_N = res >> 24; |
10617 | FETCH_SWORD(adr); |
10618 | WRITE_LONG_F(adr, res) |
10619 | POST_IO |
10620 | RET(24) |
10621 | } |
10622 | |
10623 | // MOVEL |
10624 | OPCODE(0x23DF) |
10625 | { |
10626 | u32 adr, res; |
10627 | u32 src, dst; |
10628 | |
10629 | adr = AREG(7); |
10630 | AREG(7) += 4; |
10631 | PRE_IO |
10632 | READ_LONG_F(adr, res) |
10633 | flag_C = 0; |
10634 | flag_V = 0; |
10635 | flag_NotZ = res; |
10636 | flag_N = res >> 24; |
10637 | FETCH_LONG(adr); |
10638 | WRITE_LONG_F(adr, res) |
10639 | POST_IO |
10640 | RET(28) |
10641 | } |
10642 | |
10643 | // MOVEL |
10644 | OPCODE(0x2EDF) |
10645 | { |
10646 | u32 adr, res; |
10647 | u32 src, dst; |
10648 | |
10649 | adr = AREG(7); |
10650 | AREG(7) += 4; |
10651 | PRE_IO |
10652 | READ_LONG_F(adr, res) |
10653 | flag_C = 0; |
10654 | flag_V = 0; |
10655 | flag_NotZ = res; |
10656 | flag_N = res >> 24; |
10657 | adr = AREG(7); |
10658 | AREG(7) += 4; |
10659 | WRITE_LONG_F(adr, res) |
10660 | POST_IO |
10661 | RET(20) |
10662 | } |
10663 | |
10664 | // MOVEL |
10665 | OPCODE(0x2F1F) |
10666 | { |
10667 | u32 adr, res; |
10668 | u32 src, dst; |
10669 | |
10670 | adr = AREG(7); |
10671 | AREG(7) += 4; |
10672 | PRE_IO |
10673 | READ_LONG_F(adr, res) |
10674 | flag_C = 0; |
10675 | flag_V = 0; |
10676 | flag_NotZ = res; |
10677 | flag_N = res >> 24; |
10678 | adr = AREG(7) - 4; |
10679 | AREG(7) = adr; |
03e4f2a3 |
10680 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10681 | POST_IO |
10682 | RET(20) |
10683 | } |
10684 | |
10685 | // MOVEL |
10686 | OPCODE(0x2027) |
10687 | { |
10688 | u32 adr, res; |
10689 | u32 src, dst; |
10690 | |
10691 | adr = AREG(7) - 4; |
10692 | AREG(7) = adr; |
10693 | PRE_IO |
10694 | READ_LONG_F(adr, res) |
10695 | flag_C = 0; |
10696 | flag_V = 0; |
10697 | flag_NotZ = res; |
10698 | flag_N = res >> 24; |
10699 | DREGu32((Opcode >> 9) & 7) = res; |
10700 | POST_IO |
10701 | RET(14) |
10702 | } |
10703 | |
10704 | // MOVEL |
10705 | OPCODE(0x20A7) |
10706 | { |
10707 | u32 adr, res; |
10708 | u32 src, dst; |
10709 | |
10710 | adr = AREG(7) - 4; |
10711 | AREG(7) = adr; |
10712 | PRE_IO |
10713 | READ_LONG_F(adr, res) |
10714 | flag_C = 0; |
10715 | flag_V = 0; |
10716 | flag_NotZ = res; |
10717 | flag_N = res >> 24; |
10718 | adr = AREG((Opcode >> 9) & 7); |
10719 | WRITE_LONG_F(adr, res) |
10720 | POST_IO |
10721 | RET(22) |
10722 | } |
10723 | |
10724 | // MOVEL |
10725 | OPCODE(0x20E7) |
10726 | { |
10727 | u32 adr, res; |
10728 | u32 src, dst; |
10729 | |
10730 | adr = AREG(7) - 4; |
10731 | AREG(7) = adr; |
10732 | PRE_IO |
10733 | READ_LONG_F(adr, res) |
10734 | flag_C = 0; |
10735 | flag_V = 0; |
10736 | flag_NotZ = res; |
10737 | flag_N = res >> 24; |
10738 | adr = AREG((Opcode >> 9) & 7); |
10739 | AREG((Opcode >> 9) & 7) += 4; |
10740 | WRITE_LONG_F(adr, res) |
10741 | POST_IO |
10742 | RET(22) |
10743 | } |
10744 | |
10745 | // MOVEL |
10746 | OPCODE(0x2127) |
10747 | { |
10748 | u32 adr, res; |
10749 | u32 src, dst; |
10750 | |
10751 | adr = AREG(7) - 4; |
10752 | AREG(7) = adr; |
10753 | PRE_IO |
10754 | READ_LONG_F(adr, res) |
10755 | flag_C = 0; |
10756 | flag_V = 0; |
10757 | flag_NotZ = res; |
10758 | flag_N = res >> 24; |
10759 | adr = AREG((Opcode >> 9) & 7) - 4; |
10760 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10761 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10762 | POST_IO |
10763 | RET(22) |
10764 | } |
10765 | |
10766 | // MOVEL |
10767 | OPCODE(0x2167) |
10768 | { |
10769 | u32 adr, res; |
10770 | u32 src, dst; |
10771 | |
10772 | adr = AREG(7) - 4; |
10773 | AREG(7) = adr; |
10774 | PRE_IO |
10775 | READ_LONG_F(adr, res) |
10776 | flag_C = 0; |
10777 | flag_V = 0; |
10778 | flag_NotZ = res; |
10779 | flag_N = res >> 24; |
10780 | FETCH_SWORD(adr); |
10781 | adr += AREG((Opcode >> 9) & 7); |
10782 | WRITE_LONG_F(adr, res) |
10783 | POST_IO |
10784 | RET(26) |
10785 | } |
10786 | |
10787 | // MOVEL |
10788 | OPCODE(0x21A7) |
10789 | { |
10790 | u32 adr, res; |
10791 | u32 src, dst; |
10792 | |
10793 | adr = AREG(7) - 4; |
10794 | AREG(7) = adr; |
10795 | PRE_IO |
10796 | READ_LONG_F(adr, res) |
10797 | flag_C = 0; |
10798 | flag_V = 0; |
10799 | flag_NotZ = res; |
10800 | flag_N = res >> 24; |
10801 | adr = AREG((Opcode >> 9) & 7); |
10802 | DECODE_EXT_WORD |
10803 | WRITE_LONG_F(adr, res) |
10804 | POST_IO |
10805 | RET(28) |
10806 | } |
10807 | |
10808 | // MOVEL |
10809 | OPCODE(0x21E7) |
10810 | { |
10811 | u32 adr, res; |
10812 | u32 src, dst; |
10813 | |
10814 | adr = AREG(7) - 4; |
10815 | AREG(7) = adr; |
10816 | PRE_IO |
10817 | READ_LONG_F(adr, res) |
10818 | flag_C = 0; |
10819 | flag_V = 0; |
10820 | flag_NotZ = res; |
10821 | flag_N = res >> 24; |
10822 | FETCH_SWORD(adr); |
10823 | WRITE_LONG_F(adr, res) |
10824 | POST_IO |
10825 | RET(26) |
10826 | } |
10827 | |
10828 | // MOVEL |
10829 | OPCODE(0x23E7) |
10830 | { |
10831 | u32 adr, res; |
10832 | u32 src, dst; |
10833 | |
10834 | adr = AREG(7) - 4; |
10835 | AREG(7) = adr; |
10836 | PRE_IO |
10837 | READ_LONG_F(adr, res) |
10838 | flag_C = 0; |
10839 | flag_V = 0; |
10840 | flag_NotZ = res; |
10841 | flag_N = res >> 24; |
10842 | FETCH_LONG(adr); |
10843 | WRITE_LONG_F(adr, res) |
10844 | POST_IO |
10845 | RET(30) |
10846 | } |
10847 | |
10848 | // MOVEL |
10849 | OPCODE(0x2EE7) |
10850 | { |
10851 | u32 adr, res; |
10852 | u32 src, dst; |
10853 | |
10854 | adr = AREG(7) - 4; |
10855 | AREG(7) = adr; |
10856 | PRE_IO |
10857 | READ_LONG_F(adr, res) |
10858 | flag_C = 0; |
10859 | flag_V = 0; |
10860 | flag_NotZ = res; |
10861 | flag_N = res >> 24; |
10862 | adr = AREG(7); |
10863 | AREG(7) += 4; |
10864 | WRITE_LONG_F(adr, res) |
10865 | POST_IO |
10866 | RET(22) |
10867 | } |
10868 | |
10869 | // MOVEL |
10870 | OPCODE(0x2F27) |
10871 | { |
10872 | u32 adr, res; |
10873 | u32 src, dst; |
10874 | |
10875 | adr = AREG(7) - 4; |
10876 | AREG(7) = adr; |
10877 | PRE_IO |
10878 | READ_LONG_F(adr, res) |
10879 | flag_C = 0; |
10880 | flag_V = 0; |
10881 | flag_NotZ = res; |
10882 | flag_N = res >> 24; |
10883 | adr = AREG(7) - 4; |
10884 | AREG(7) = adr; |
03e4f2a3 |
10885 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10886 | POST_IO |
10887 | RET(22) |
10888 | } |
10889 | |
10890 | // MOVEAL |
10891 | OPCODE(0x2040) |
10892 | { |
10893 | u32 adr, res; |
10894 | u32 src, dst; |
10895 | |
10896 | res = (s32)DREGs32((Opcode >> 0) & 7); |
10897 | AREG((Opcode >> 9) & 7) = res; |
10898 | RET(4) |
10899 | } |
10900 | |
10901 | // MOVEAL |
10902 | OPCODE(0x2048) |
10903 | { |
10904 | u32 adr, res; |
10905 | u32 src, dst; |
10906 | |
10907 | res = (s32)AREGs32((Opcode >> 0) & 7); |
10908 | AREG((Opcode >> 9) & 7) = res; |
10909 | RET(4) |
10910 | } |
10911 | |
10912 | // MOVEAL |
10913 | OPCODE(0x2050) |
10914 | { |
10915 | u32 adr, res; |
10916 | u32 src, dst; |
10917 | |
10918 | adr = AREG((Opcode >> 0) & 7); |
10919 | PRE_IO |
10920 | READSX_LONG_F(adr, res) |
10921 | AREG((Opcode >> 9) & 7) = res; |
10922 | POST_IO |
10923 | RET(12) |
10924 | } |
10925 | |
10926 | // MOVEAL |
10927 | OPCODE(0x2058) |
10928 | { |
10929 | u32 adr, res; |
10930 | u32 src, dst; |
10931 | |
10932 | adr = AREG((Opcode >> 0) & 7); |
10933 | AREG((Opcode >> 0) & 7) += 4; |
10934 | PRE_IO |
10935 | READSX_LONG_F(adr, res) |
10936 | AREG((Opcode >> 9) & 7) = res; |
10937 | POST_IO |
10938 | RET(12) |
10939 | } |
10940 | |
10941 | // MOVEAL |
10942 | OPCODE(0x2060) |
10943 | { |
10944 | u32 adr, res; |
10945 | u32 src, dst; |
10946 | |
10947 | adr = AREG((Opcode >> 0) & 7) - 4; |
10948 | AREG((Opcode >> 0) & 7) = adr; |
10949 | PRE_IO |
10950 | READSX_LONG_F(adr, res) |
10951 | AREG((Opcode >> 9) & 7) = res; |
10952 | POST_IO |
10953 | RET(14) |
10954 | } |
10955 | |
10956 | // MOVEAL |
10957 | OPCODE(0x2068) |
10958 | { |
10959 | u32 adr, res; |
10960 | u32 src, dst; |
10961 | |
10962 | FETCH_SWORD(adr); |
10963 | adr += AREG((Opcode >> 0) & 7); |
10964 | PRE_IO |
10965 | READSX_LONG_F(adr, res) |
10966 | AREG((Opcode >> 9) & 7) = res; |
10967 | POST_IO |
10968 | RET(16) |
10969 | } |
10970 | |
10971 | // MOVEAL |
10972 | OPCODE(0x2070) |
10973 | { |
10974 | u32 adr, res; |
10975 | u32 src, dst; |
10976 | |
10977 | adr = AREG((Opcode >> 0) & 7); |
10978 | DECODE_EXT_WORD |
10979 | PRE_IO |
10980 | READSX_LONG_F(adr, res) |
10981 | AREG((Opcode >> 9) & 7) = res; |
10982 | POST_IO |
10983 | RET(18) |
10984 | } |
10985 | |
10986 | // MOVEAL |
10987 | OPCODE(0x2078) |
10988 | { |
10989 | u32 adr, res; |
10990 | u32 src, dst; |
10991 | |
10992 | FETCH_SWORD(adr); |
10993 | PRE_IO |
10994 | READSX_LONG_F(adr, res) |
10995 | AREG((Opcode >> 9) & 7) = res; |
10996 | POST_IO |
10997 | RET(16) |
10998 | } |
10999 | |
11000 | // MOVEAL |
11001 | OPCODE(0x2079) |
11002 | { |
11003 | u32 adr, res; |
11004 | u32 src, dst; |
11005 | |
11006 | FETCH_LONG(adr); |
11007 | PRE_IO |
11008 | READSX_LONG_F(adr, res) |
11009 | AREG((Opcode >> 9) & 7) = res; |
11010 | POST_IO |
11011 | RET(20) |
11012 | } |
11013 | |
11014 | // MOVEAL |
11015 | OPCODE(0x207A) |
11016 | { |
11017 | u32 adr, res; |
11018 | u32 src, dst; |
11019 | |
11020 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
11021 | PC++; |
11022 | PRE_IO |
11023 | READSX_LONG_F(adr, res) |
11024 | AREG((Opcode >> 9) & 7) = res; |
11025 | POST_IO |
11026 | RET(16) |
11027 | } |
11028 | |
11029 | // MOVEAL |
11030 | OPCODE(0x207B) |
11031 | { |
11032 | u32 adr, res; |
11033 | u32 src, dst; |
11034 | |
11035 | adr = (u32)(PC) - BasePC; |
11036 | DECODE_EXT_WORD |
11037 | PRE_IO |
11038 | READSX_LONG_F(adr, res) |
11039 | AREG((Opcode >> 9) & 7) = res; |
11040 | POST_IO |
11041 | RET(18) |
11042 | } |
11043 | |
11044 | // MOVEAL |
11045 | OPCODE(0x207C) |
11046 | { |
11047 | u32 adr, res; |
11048 | u32 src, dst; |
11049 | |
11050 | FETCH_LONG(res); |
11051 | AREG((Opcode >> 9) & 7) = res; |
11052 | RET(12) |
11053 | } |
11054 | |
11055 | // MOVEAL |
11056 | OPCODE(0x205F) |
11057 | { |
11058 | u32 adr, res; |
11059 | u32 src, dst; |
11060 | |
11061 | adr = AREG(7); |
11062 | AREG(7) += 4; |
11063 | PRE_IO |
11064 | READSX_LONG_F(adr, res) |
11065 | AREG((Opcode >> 9) & 7) = res; |
11066 | POST_IO |
11067 | RET(12) |
11068 | } |
11069 | |
11070 | // MOVEAL |
11071 | OPCODE(0x2067) |
11072 | { |
11073 | u32 adr, res; |
11074 | u32 src, dst; |
11075 | |
11076 | adr = AREG(7) - 4; |
11077 | AREG(7) = adr; |
11078 | PRE_IO |
11079 | READSX_LONG_F(adr, res) |
11080 | AREG((Opcode >> 9) & 7) = res; |
11081 | POST_IO |
11082 | RET(14) |
11083 | } |
11084 | |
11085 | // MOVEW |
11086 | OPCODE(0x3000) |
11087 | { |
11088 | u32 adr, res; |
11089 | u32 src, dst; |
11090 | |
11091 | res = DREGu16((Opcode >> 0) & 7); |
11092 | flag_C = 0; |
11093 | flag_V = 0; |
11094 | flag_NotZ = res; |
11095 | flag_N = res >> 8; |
11096 | DREGu16((Opcode >> 9) & 7) = res; |
11097 | RET(4) |
11098 | } |
11099 | |
11100 | // MOVEW |
11101 | OPCODE(0x3080) |
11102 | { |
11103 | u32 adr, res; |
11104 | u32 src, dst; |
11105 | |
11106 | res = DREGu16((Opcode >> 0) & 7); |
11107 | flag_C = 0; |
11108 | flag_V = 0; |
11109 | flag_NotZ = res; |
11110 | flag_N = res >> 8; |
11111 | adr = AREG((Opcode >> 9) & 7); |
11112 | PRE_IO |
11113 | WRITE_WORD_F(adr, res) |
11114 | POST_IO |
11115 | RET(8) |
11116 | } |
11117 | |
11118 | // MOVEW |
11119 | OPCODE(0x30C0) |
11120 | { |
11121 | u32 adr, res; |
11122 | u32 src, dst; |
11123 | |
11124 | res = DREGu16((Opcode >> 0) & 7); |
11125 | flag_C = 0; |
11126 | flag_V = 0; |
11127 | flag_NotZ = res; |
11128 | flag_N = res >> 8; |
11129 | adr = AREG((Opcode >> 9) & 7); |
11130 | AREG((Opcode >> 9) & 7) += 2; |
11131 | PRE_IO |
11132 | WRITE_WORD_F(adr, res) |
11133 | POST_IO |
11134 | RET(8) |
11135 | } |
11136 | |
11137 | // MOVEW |
11138 | OPCODE(0x3100) |
11139 | { |
11140 | u32 adr, res; |
11141 | u32 src, dst; |
11142 | |
11143 | res = DREGu16((Opcode >> 0) & 7); |
11144 | flag_C = 0; |
11145 | flag_V = 0; |
11146 | flag_NotZ = res; |
11147 | flag_N = res >> 8; |
11148 | adr = AREG((Opcode >> 9) & 7) - 2; |
11149 | AREG((Opcode >> 9) & 7) = adr; |
11150 | PRE_IO |
11151 | WRITE_WORD_F(adr, res) |
11152 | POST_IO |
11153 | RET(8) |
11154 | } |
11155 | |
11156 | // MOVEW |
11157 | OPCODE(0x3140) |
11158 | { |
11159 | u32 adr, res; |
11160 | u32 src, dst; |
11161 | |
11162 | res = DREGu16((Opcode >> 0) & 7); |
11163 | flag_C = 0; |
11164 | flag_V = 0; |
11165 | flag_NotZ = res; |
11166 | flag_N = res >> 8; |
11167 | FETCH_SWORD(adr); |
11168 | adr += AREG((Opcode >> 9) & 7); |
11169 | PRE_IO |
11170 | WRITE_WORD_F(adr, res) |
11171 | POST_IO |
11172 | RET(12) |
11173 | } |
11174 | |
11175 | // MOVEW |
11176 | OPCODE(0x3180) |
11177 | { |
11178 | u32 adr, res; |
11179 | u32 src, dst; |
11180 | |
11181 | res = DREGu16((Opcode >> 0) & 7); |
11182 | flag_C = 0; |
11183 | flag_V = 0; |
11184 | flag_NotZ = res; |
11185 | flag_N = res >> 8; |
11186 | adr = AREG((Opcode >> 9) & 7); |
11187 | DECODE_EXT_WORD |
11188 | PRE_IO |
11189 | WRITE_WORD_F(adr, res) |
11190 | POST_IO |
11191 | RET(14) |
11192 | } |
11193 | |
11194 | // MOVEW |
11195 | OPCODE(0x31C0) |
11196 | { |
11197 | u32 adr, res; |
11198 | u32 src, dst; |
11199 | |
11200 | res = DREGu16((Opcode >> 0) & 7); |
11201 | flag_C = 0; |
11202 | flag_V = 0; |
11203 | flag_NotZ = res; |
11204 | flag_N = res >> 8; |
11205 | FETCH_SWORD(adr); |
11206 | PRE_IO |
11207 | WRITE_WORD_F(adr, res) |
11208 | POST_IO |
11209 | RET(12) |
11210 | } |
11211 | |
11212 | // MOVEW |
11213 | OPCODE(0x33C0) |
11214 | { |
11215 | u32 adr, res; |
11216 | u32 src, dst; |
11217 | |
11218 | res = DREGu16((Opcode >> 0) & 7); |
11219 | flag_C = 0; |
11220 | flag_V = 0; |
11221 | flag_NotZ = res; |
11222 | flag_N = res >> 8; |
11223 | FETCH_LONG(adr); |
11224 | PRE_IO |
11225 | WRITE_WORD_F(adr, res) |
11226 | POST_IO |
11227 | RET(16) |
11228 | } |
11229 | |
11230 | // MOVEW |
11231 | OPCODE(0x3EC0) |
11232 | { |
11233 | u32 adr, res; |
11234 | u32 src, dst; |
11235 | |
11236 | res = DREGu16((Opcode >> 0) & 7); |
11237 | flag_C = 0; |
11238 | flag_V = 0; |
11239 | flag_NotZ = res; |
11240 | flag_N = res >> 8; |
11241 | adr = AREG(7); |
11242 | AREG(7) += 2; |
11243 | PRE_IO |
11244 | WRITE_WORD_F(adr, res) |
11245 | POST_IO |
11246 | RET(8) |
11247 | } |
11248 | |
11249 | // MOVEW |
11250 | OPCODE(0x3F00) |
11251 | { |
11252 | u32 adr, res; |
11253 | u32 src, dst; |
11254 | |
11255 | res = DREGu16((Opcode >> 0) & 7); |
11256 | flag_C = 0; |
11257 | flag_V = 0; |
11258 | flag_NotZ = res; |
11259 | flag_N = res >> 8; |
11260 | adr = AREG(7) - 2; |
11261 | AREG(7) = adr; |
11262 | PRE_IO |
11263 | WRITE_WORD_F(adr, res) |
11264 | POST_IO |
11265 | RET(8) |
11266 | } |
11267 | |
11268 | // MOVEW |
11269 | OPCODE(0x3008) |
11270 | { |
11271 | u32 adr, res; |
11272 | u32 src, dst; |
11273 | |
11274 | res = AREGu16((Opcode >> 0) & 7); |
11275 | flag_C = 0; |
11276 | flag_V = 0; |
11277 | flag_NotZ = res; |
11278 | flag_N = res >> 8; |
11279 | DREGu16((Opcode >> 9) & 7) = res; |
11280 | RET(4) |
11281 | } |
11282 | |
11283 | // MOVEW |
11284 | OPCODE(0x3088) |
11285 | { |
11286 | u32 adr, res; |
11287 | u32 src, dst; |
11288 | |
11289 | res = AREGu16((Opcode >> 0) & 7); |
11290 | flag_C = 0; |
11291 | flag_V = 0; |
11292 | flag_NotZ = res; |
11293 | flag_N = res >> 8; |
11294 | adr = AREG((Opcode >> 9) & 7); |
11295 | PRE_IO |
11296 | WRITE_WORD_F(adr, res) |
11297 | POST_IO |
11298 | RET(8) |
11299 | } |
11300 | |
11301 | // MOVEW |
11302 | OPCODE(0x30C8) |
11303 | { |
11304 | u32 adr, res; |
11305 | u32 src, dst; |
11306 | |
11307 | res = AREGu16((Opcode >> 0) & 7); |
11308 | flag_C = 0; |
11309 | flag_V = 0; |
11310 | flag_NotZ = res; |
11311 | flag_N = res >> 8; |
11312 | adr = AREG((Opcode >> 9) & 7); |
11313 | AREG((Opcode >> 9) & 7) += 2; |
11314 | PRE_IO |
11315 | WRITE_WORD_F(adr, res) |
11316 | POST_IO |
11317 | RET(8) |
11318 | } |
11319 | |
11320 | // MOVEW |
11321 | OPCODE(0x3108) |
11322 | { |
11323 | u32 adr, res; |
11324 | u32 src, dst; |
11325 | |
11326 | res = AREGu16((Opcode >> 0) & 7); |
11327 | flag_C = 0; |
11328 | flag_V = 0; |
11329 | flag_NotZ = res; |
11330 | flag_N = res >> 8; |
11331 | adr = AREG((Opcode >> 9) & 7) - 2; |
11332 | AREG((Opcode >> 9) & 7) = adr; |
11333 | PRE_IO |
11334 | WRITE_WORD_F(adr, res) |
11335 | POST_IO |
11336 | RET(8) |
11337 | } |
11338 | |
11339 | // MOVEW |
11340 | OPCODE(0x3148) |
11341 | { |
11342 | u32 adr, res; |
11343 | u32 src, dst; |
11344 | |
11345 | res = AREGu16((Opcode >> 0) & 7); |
11346 | flag_C = 0; |
11347 | flag_V = 0; |
11348 | flag_NotZ = res; |
11349 | flag_N = res >> 8; |
11350 | FETCH_SWORD(adr); |
11351 | adr += AREG((Opcode >> 9) & 7); |
11352 | PRE_IO |
11353 | WRITE_WORD_F(adr, res) |
11354 | POST_IO |
11355 | RET(12) |
11356 | } |
11357 | |
11358 | // MOVEW |
11359 | OPCODE(0x3188) |
11360 | { |
11361 | u32 adr, res; |
11362 | u32 src, dst; |
11363 | |
11364 | res = AREGu16((Opcode >> 0) & 7); |
11365 | flag_C = 0; |
11366 | flag_V = 0; |
11367 | flag_NotZ = res; |
11368 | flag_N = res >> 8; |
11369 | adr = AREG((Opcode >> 9) & 7); |
11370 | DECODE_EXT_WORD |
11371 | PRE_IO |
11372 | WRITE_WORD_F(adr, res) |
11373 | POST_IO |
11374 | RET(14) |
11375 | } |
11376 | |
11377 | // MOVEW |
11378 | OPCODE(0x31C8) |
11379 | { |
11380 | u32 adr, res; |
11381 | u32 src, dst; |
11382 | |
11383 | res = AREGu16((Opcode >> 0) & 7); |
11384 | flag_C = 0; |
11385 | flag_V = 0; |
11386 | flag_NotZ = res; |
11387 | flag_N = res >> 8; |
11388 | FETCH_SWORD(adr); |
11389 | PRE_IO |
11390 | WRITE_WORD_F(adr, res) |
11391 | POST_IO |
11392 | RET(12) |
11393 | } |
11394 | |
11395 | // MOVEW |
11396 | OPCODE(0x33C8) |
11397 | { |
11398 | u32 adr, res; |
11399 | u32 src, dst; |
11400 | |
11401 | res = AREGu16((Opcode >> 0) & 7); |
11402 | flag_C = 0; |
11403 | flag_V = 0; |
11404 | flag_NotZ = res; |
11405 | flag_N = res >> 8; |
11406 | FETCH_LONG(adr); |
11407 | PRE_IO |
11408 | WRITE_WORD_F(adr, res) |
11409 | POST_IO |
11410 | RET(16) |
11411 | } |
11412 | |
11413 | // MOVEW |
11414 | OPCODE(0x3EC8) |
11415 | { |
11416 | u32 adr, res; |
11417 | u32 src, dst; |
11418 | |
11419 | res = AREGu16((Opcode >> 0) & 7); |
11420 | flag_C = 0; |
11421 | flag_V = 0; |
11422 | flag_NotZ = res; |
11423 | flag_N = res >> 8; |
11424 | adr = AREG(7); |
11425 | AREG(7) += 2; |
11426 | PRE_IO |
11427 | WRITE_WORD_F(adr, res) |
11428 | POST_IO |
11429 | RET(8) |
11430 | } |
11431 | |
11432 | // MOVEW |
11433 | OPCODE(0x3F08) |
11434 | { |
11435 | u32 adr, res; |
11436 | u32 src, dst; |
11437 | |
11438 | res = AREGu16((Opcode >> 0) & 7); |
11439 | flag_C = 0; |
11440 | flag_V = 0; |
11441 | flag_NotZ = res; |
11442 | flag_N = res >> 8; |
11443 | adr = AREG(7) - 2; |
11444 | AREG(7) = adr; |
11445 | PRE_IO |
11446 | WRITE_WORD_F(adr, res) |
11447 | POST_IO |
11448 | RET(8) |
11449 | } |
11450 | |
11451 | // MOVEW |
11452 | OPCODE(0x3010) |
11453 | { |
11454 | u32 adr, res; |
11455 | u32 src, dst; |
11456 | |
11457 | adr = AREG((Opcode >> 0) & 7); |
11458 | PRE_IO |
11459 | READ_WORD_F(adr, res) |
11460 | flag_C = 0; |
11461 | flag_V = 0; |
11462 | flag_NotZ = res; |
11463 | flag_N = res >> 8; |
11464 | DREGu16((Opcode >> 9) & 7) = res; |
11465 | POST_IO |
11466 | RET(8) |
11467 | } |
11468 | |
11469 | // MOVEW |
11470 | OPCODE(0x3090) |
11471 | { |
11472 | u32 adr, res; |
11473 | u32 src, dst; |
11474 | |
11475 | adr = AREG((Opcode >> 0) & 7); |
11476 | PRE_IO |
11477 | READ_WORD_F(adr, res) |
11478 | flag_C = 0; |
11479 | flag_V = 0; |
11480 | flag_NotZ = res; |
11481 | flag_N = res >> 8; |
11482 | adr = AREG((Opcode >> 9) & 7); |
11483 | WRITE_WORD_F(adr, res) |
11484 | POST_IO |
11485 | RET(12) |
11486 | } |
11487 | |
11488 | // MOVEW |
11489 | OPCODE(0x30D0) |
11490 | { |
11491 | u32 adr, res; |
11492 | u32 src, dst; |
11493 | |
11494 | adr = AREG((Opcode >> 0) & 7); |
11495 | PRE_IO |
11496 | READ_WORD_F(adr, res) |
11497 | flag_C = 0; |
11498 | flag_V = 0; |
11499 | flag_NotZ = res; |
11500 | flag_N = res >> 8; |
11501 | adr = AREG((Opcode >> 9) & 7); |
11502 | AREG((Opcode >> 9) & 7) += 2; |
11503 | WRITE_WORD_F(adr, res) |
11504 | POST_IO |
11505 | RET(12) |
11506 | } |
11507 | |
11508 | // MOVEW |
11509 | OPCODE(0x3110) |
11510 | { |
11511 | u32 adr, res; |
11512 | u32 src, dst; |
11513 | |
11514 | adr = AREG((Opcode >> 0) & 7); |
11515 | PRE_IO |
11516 | READ_WORD_F(adr, res) |
11517 | flag_C = 0; |
11518 | flag_V = 0; |
11519 | flag_NotZ = res; |
11520 | flag_N = res >> 8; |
11521 | adr = AREG((Opcode >> 9) & 7) - 2; |
11522 | AREG((Opcode >> 9) & 7) = adr; |
11523 | WRITE_WORD_F(adr, res) |
11524 | POST_IO |
11525 | RET(12) |
11526 | } |
11527 | |
11528 | // MOVEW |
11529 | OPCODE(0x3150) |
11530 | { |
11531 | u32 adr, res; |
11532 | u32 src, dst; |
11533 | |
11534 | adr = AREG((Opcode >> 0) & 7); |
11535 | PRE_IO |
11536 | READ_WORD_F(adr, res) |
11537 | flag_C = 0; |
11538 | flag_V = 0; |
11539 | flag_NotZ = res; |
11540 | flag_N = res >> 8; |
11541 | FETCH_SWORD(adr); |
11542 | adr += AREG((Opcode >> 9) & 7); |
11543 | WRITE_WORD_F(adr, res) |
11544 | POST_IO |
11545 | RET(16) |
11546 | } |
11547 | |
11548 | // MOVEW |
11549 | OPCODE(0x3190) |
11550 | { |
11551 | u32 adr, res; |
11552 | u32 src, dst; |
11553 | |
11554 | adr = AREG((Opcode >> 0) & 7); |
11555 | PRE_IO |
11556 | READ_WORD_F(adr, res) |
11557 | flag_C = 0; |
11558 | flag_V = 0; |
11559 | flag_NotZ = res; |
11560 | flag_N = res >> 8; |
11561 | adr = AREG((Opcode >> 9) & 7); |
11562 | DECODE_EXT_WORD |
11563 | WRITE_WORD_F(adr, res) |
11564 | POST_IO |
11565 | RET(18) |
11566 | } |
11567 | |
11568 | // MOVEW |
11569 | OPCODE(0x31D0) |
11570 | { |
11571 | u32 adr, res; |
11572 | u32 src, dst; |
11573 | |
11574 | adr = AREG((Opcode >> 0) & 7); |
11575 | PRE_IO |
11576 | READ_WORD_F(adr, res) |
11577 | flag_C = 0; |
11578 | flag_V = 0; |
11579 | flag_NotZ = res; |
11580 | flag_N = res >> 8; |
11581 | FETCH_SWORD(adr); |
11582 | WRITE_WORD_F(adr, res) |
11583 | POST_IO |
11584 | RET(16) |
11585 | } |
11586 | |
11587 | // MOVEW |
11588 | OPCODE(0x33D0) |
11589 | { |
11590 | u32 adr, res; |
11591 | u32 src, dst; |
11592 | |
11593 | adr = AREG((Opcode >> 0) & 7); |
11594 | PRE_IO |
11595 | READ_WORD_F(adr, res) |
11596 | flag_C = 0; |
11597 | flag_V = 0; |
11598 | flag_NotZ = res; |
11599 | flag_N = res >> 8; |
11600 | FETCH_LONG(adr); |
11601 | WRITE_WORD_F(adr, res) |
11602 | POST_IO |
11603 | RET(20) |
11604 | } |
11605 | |
11606 | // MOVEW |
11607 | OPCODE(0x3ED0) |
11608 | { |
11609 | u32 adr, res; |
11610 | u32 src, dst; |
11611 | |
11612 | adr = AREG((Opcode >> 0) & 7); |
11613 | PRE_IO |
11614 | READ_WORD_F(adr, res) |
11615 | flag_C = 0; |
11616 | flag_V = 0; |
11617 | flag_NotZ = res; |
11618 | flag_N = res >> 8; |
11619 | adr = AREG(7); |
11620 | AREG(7) += 2; |
11621 | WRITE_WORD_F(adr, res) |
11622 | POST_IO |
11623 | RET(12) |
11624 | } |
11625 | |
11626 | // MOVEW |
11627 | OPCODE(0x3F10) |
11628 | { |
11629 | u32 adr, res; |
11630 | u32 src, dst; |
11631 | |
11632 | adr = AREG((Opcode >> 0) & 7); |
11633 | PRE_IO |
11634 | READ_WORD_F(adr, res) |
11635 | flag_C = 0; |
11636 | flag_V = 0; |
11637 | flag_NotZ = res; |
11638 | flag_N = res >> 8; |
11639 | adr = AREG(7) - 2; |
11640 | AREG(7) = adr; |
11641 | WRITE_WORD_F(adr, res) |
11642 | POST_IO |
11643 | RET(12) |
11644 | } |
11645 | |
11646 | // MOVEW |
11647 | OPCODE(0x3018) |
11648 | { |
11649 | u32 adr, res; |
11650 | u32 src, dst; |
11651 | |
11652 | adr = AREG((Opcode >> 0) & 7); |
11653 | AREG((Opcode >> 0) & 7) += 2; |
11654 | PRE_IO |
11655 | READ_WORD_F(adr, res) |
11656 | flag_C = 0; |
11657 | flag_V = 0; |
11658 | flag_NotZ = res; |
11659 | flag_N = res >> 8; |
11660 | DREGu16((Opcode >> 9) & 7) = res; |
11661 | POST_IO |
11662 | RET(8) |
11663 | } |
11664 | |
11665 | // MOVEW |
11666 | OPCODE(0x3098) |
11667 | { |
11668 | u32 adr, res; |
11669 | u32 src, dst; |
11670 | |
11671 | adr = AREG((Opcode >> 0) & 7); |
11672 | AREG((Opcode >> 0) & 7) += 2; |
11673 | PRE_IO |
11674 | READ_WORD_F(adr, res) |
11675 | flag_C = 0; |
11676 | flag_V = 0; |
11677 | flag_NotZ = res; |
11678 | flag_N = res >> 8; |
11679 | adr = AREG((Opcode >> 9) & 7); |
11680 | WRITE_WORD_F(adr, res) |
11681 | POST_IO |
11682 | RET(12) |
11683 | } |
11684 | |
11685 | // MOVEW |
11686 | OPCODE(0x30D8) |
11687 | { |
11688 | u32 adr, res; |
11689 | u32 src, dst; |
11690 | |
11691 | adr = AREG((Opcode >> 0) & 7); |
11692 | AREG((Opcode >> 0) & 7) += 2; |
11693 | PRE_IO |
11694 | READ_WORD_F(adr, res) |
11695 | flag_C = 0; |
11696 | flag_V = 0; |
11697 | flag_NotZ = res; |
11698 | flag_N = res >> 8; |
11699 | adr = AREG((Opcode >> 9) & 7); |
11700 | AREG((Opcode >> 9) & 7) += 2; |
11701 | WRITE_WORD_F(adr, res) |
11702 | POST_IO |
11703 | RET(12) |
11704 | } |
11705 | |
11706 | // MOVEW |
11707 | OPCODE(0x3118) |
11708 | { |
11709 | u32 adr, res; |
11710 | u32 src, dst; |
11711 | |
11712 | adr = AREG((Opcode >> 0) & 7); |
11713 | AREG((Opcode >> 0) & 7) += 2; |
11714 | PRE_IO |
11715 | READ_WORD_F(adr, res) |
11716 | flag_C = 0; |
11717 | flag_V = 0; |
11718 | flag_NotZ = res; |
11719 | flag_N = res >> 8; |
11720 | adr = AREG((Opcode >> 9) & 7) - 2; |
11721 | AREG((Opcode >> 9) & 7) = adr; |
11722 | WRITE_WORD_F(adr, res) |
11723 | POST_IO |
11724 | RET(12) |
11725 | } |
11726 | |
11727 | // MOVEW |
11728 | OPCODE(0x3158) |
11729 | { |
11730 | u32 adr, res; |
11731 | u32 src, dst; |
11732 | |
11733 | adr = AREG((Opcode >> 0) & 7); |
11734 | AREG((Opcode >> 0) & 7) += 2; |
11735 | PRE_IO |
11736 | READ_WORD_F(adr, res) |
11737 | flag_C = 0; |
11738 | flag_V = 0; |
11739 | flag_NotZ = res; |
11740 | flag_N = res >> 8; |
11741 | FETCH_SWORD(adr); |
11742 | adr += AREG((Opcode >> 9) & 7); |
11743 | WRITE_WORD_F(adr, res) |
11744 | POST_IO |
11745 | RET(16) |
11746 | } |
11747 | |
11748 | // MOVEW |
11749 | OPCODE(0x3198) |
11750 | { |
11751 | u32 adr, res; |
11752 | u32 src, dst; |
11753 | |
11754 | adr = AREG((Opcode >> 0) & 7); |
11755 | AREG((Opcode >> 0) & 7) += 2; |
11756 | PRE_IO |
11757 | READ_WORD_F(adr, res) |
11758 | flag_C = 0; |
11759 | flag_V = 0; |
11760 | flag_NotZ = res; |
11761 | flag_N = res >> 8; |
11762 | adr = AREG((Opcode >> 9) & 7); |
11763 | DECODE_EXT_WORD |
11764 | WRITE_WORD_F(adr, res) |
11765 | POST_IO |
11766 | RET(18) |
11767 | } |
11768 | |
11769 | // MOVEW |
11770 | OPCODE(0x31D8) |
11771 | { |
11772 | u32 adr, res; |
11773 | u32 src, dst; |
11774 | |
11775 | adr = AREG((Opcode >> 0) & 7); |
11776 | AREG((Opcode >> 0) & 7) += 2; |
11777 | PRE_IO |
11778 | READ_WORD_F(adr, res) |
11779 | flag_C = 0; |
11780 | flag_V = 0; |
11781 | flag_NotZ = res; |
11782 | flag_N = res >> 8; |
11783 | FETCH_SWORD(adr); |
11784 | WRITE_WORD_F(adr, res) |
11785 | POST_IO |
11786 | RET(16) |
11787 | } |
11788 | |
11789 | // MOVEW |
11790 | OPCODE(0x33D8) |
11791 | { |
11792 | u32 adr, res; |
11793 | u32 src, dst; |
11794 | |
11795 | adr = AREG((Opcode >> 0) & 7); |
11796 | AREG((Opcode >> 0) & 7) += 2; |
11797 | PRE_IO |
11798 | READ_WORD_F(adr, res) |
11799 | flag_C = 0; |
11800 | flag_V = 0; |
11801 | flag_NotZ = res; |
11802 | flag_N = res >> 8; |
11803 | FETCH_LONG(adr); |
11804 | WRITE_WORD_F(adr, res) |
11805 | POST_IO |
11806 | RET(20) |
11807 | } |
11808 | |
11809 | // MOVEW |
11810 | OPCODE(0x3ED8) |
11811 | { |
11812 | u32 adr, res; |
11813 | u32 src, dst; |
11814 | |
11815 | adr = AREG((Opcode >> 0) & 7); |
11816 | AREG((Opcode >> 0) & 7) += 2; |
11817 | PRE_IO |
11818 | READ_WORD_F(adr, res) |
11819 | flag_C = 0; |
11820 | flag_V = 0; |
11821 | flag_NotZ = res; |
11822 | flag_N = res >> 8; |
11823 | adr = AREG(7); |
11824 | AREG(7) += 2; |
11825 | WRITE_WORD_F(adr, res) |
11826 | POST_IO |
11827 | RET(12) |
11828 | } |
11829 | |
11830 | // MOVEW |
11831 | OPCODE(0x3F18) |
11832 | { |
11833 | u32 adr, res; |
11834 | u32 src, dst; |
11835 | |
11836 | adr = AREG((Opcode >> 0) & 7); |
11837 | AREG((Opcode >> 0) & 7) += 2; |
11838 | PRE_IO |
11839 | READ_WORD_F(adr, res) |
11840 | flag_C = 0; |
11841 | flag_V = 0; |
11842 | flag_NotZ = res; |
11843 | flag_N = res >> 8; |
11844 | adr = AREG(7) - 2; |
11845 | AREG(7) = adr; |
11846 | WRITE_WORD_F(adr, res) |
11847 | POST_IO |
11848 | RET(12) |
11849 | } |
11850 | |
11851 | // MOVEW |
11852 | OPCODE(0x3020) |
11853 | { |
11854 | u32 adr, res; |
11855 | u32 src, dst; |
11856 | |
11857 | adr = AREG((Opcode >> 0) & 7) - 2; |
11858 | AREG((Opcode >> 0) & 7) = adr; |
11859 | PRE_IO |
11860 | READ_WORD_F(adr, res) |
11861 | flag_C = 0; |
11862 | flag_V = 0; |
11863 | flag_NotZ = res; |
11864 | flag_N = res >> 8; |
11865 | DREGu16((Opcode >> 9) & 7) = res; |
11866 | POST_IO |
11867 | RET(10) |
11868 | } |
11869 | |
11870 | // MOVEW |
11871 | OPCODE(0x30A0) |
11872 | { |
11873 | u32 adr, res; |
11874 | u32 src, dst; |
11875 | |
11876 | adr = AREG((Opcode >> 0) & 7) - 2; |
11877 | AREG((Opcode >> 0) & 7) = adr; |
11878 | PRE_IO |
11879 | READ_WORD_F(adr, res) |
11880 | flag_C = 0; |
11881 | flag_V = 0; |
11882 | flag_NotZ = res; |
11883 | flag_N = res >> 8; |
11884 | adr = AREG((Opcode >> 9) & 7); |
11885 | WRITE_WORD_F(adr, res) |
11886 | POST_IO |
11887 | RET(14) |
11888 | } |
11889 | |
11890 | // MOVEW |
11891 | OPCODE(0x30E0) |
11892 | { |
11893 | u32 adr, res; |
11894 | u32 src, dst; |
11895 | |
11896 | adr = AREG((Opcode >> 0) & 7) - 2; |
11897 | AREG((Opcode >> 0) & 7) = adr; |
11898 | PRE_IO |
11899 | READ_WORD_F(adr, res) |
11900 | flag_C = 0; |
11901 | flag_V = 0; |
11902 | flag_NotZ = res; |
11903 | flag_N = res >> 8; |
11904 | adr = AREG((Opcode >> 9) & 7); |
11905 | AREG((Opcode >> 9) & 7) += 2; |
11906 | WRITE_WORD_F(adr, res) |
11907 | POST_IO |
11908 | RET(14) |
11909 | } |
11910 | |
11911 | // MOVEW |
11912 | OPCODE(0x3120) |
11913 | { |
11914 | u32 adr, res; |
11915 | u32 src, dst; |
11916 | |
11917 | adr = AREG((Opcode >> 0) & 7) - 2; |
11918 | AREG((Opcode >> 0) & 7) = adr; |
11919 | PRE_IO |
11920 | READ_WORD_F(adr, res) |
11921 | flag_C = 0; |
11922 | flag_V = 0; |
11923 | flag_NotZ = res; |
11924 | flag_N = res >> 8; |
11925 | adr = AREG((Opcode >> 9) & 7) - 2; |
11926 | AREG((Opcode >> 9) & 7) = adr; |
11927 | WRITE_WORD_F(adr, res) |
11928 | POST_IO |
11929 | RET(14) |
11930 | } |
11931 | |
11932 | // MOVEW |
11933 | OPCODE(0x3160) |
11934 | { |
11935 | u32 adr, res; |
11936 | u32 src, dst; |
11937 | |
11938 | adr = AREG((Opcode >> 0) & 7) - 2; |
11939 | AREG((Opcode >> 0) & 7) = adr; |
11940 | PRE_IO |
11941 | READ_WORD_F(adr, res) |
11942 | flag_C = 0; |
11943 | flag_V = 0; |
11944 | flag_NotZ = res; |
11945 | flag_N = res >> 8; |
11946 | FETCH_SWORD(adr); |
11947 | adr += AREG((Opcode >> 9) & 7); |
11948 | WRITE_WORD_F(adr, res) |
11949 | POST_IO |
11950 | RET(18) |
11951 | } |
11952 | |
11953 | // MOVEW |
11954 | OPCODE(0x31A0) |
11955 | { |
11956 | u32 adr, res; |
11957 | u32 src, dst; |
11958 | |
11959 | adr = AREG((Opcode >> 0) & 7) - 2; |
11960 | AREG((Opcode >> 0) & 7) = adr; |
11961 | PRE_IO |
11962 | READ_WORD_F(adr, res) |
11963 | flag_C = 0; |
11964 | flag_V = 0; |
11965 | flag_NotZ = res; |
11966 | flag_N = res >> 8; |
11967 | adr = AREG((Opcode >> 9) & 7); |
11968 | DECODE_EXT_WORD |
11969 | WRITE_WORD_F(adr, res) |
11970 | POST_IO |
11971 | RET(20) |
11972 | } |
11973 | |
11974 | // MOVEW |
11975 | OPCODE(0x31E0) |
11976 | { |
11977 | u32 adr, res; |
11978 | u32 src, dst; |
11979 | |
11980 | adr = AREG((Opcode >> 0) & 7) - 2; |
11981 | AREG((Opcode >> 0) & 7) = adr; |
11982 | PRE_IO |
11983 | READ_WORD_F(adr, res) |
11984 | flag_C = 0; |
11985 | flag_V = 0; |
11986 | flag_NotZ = res; |
11987 | flag_N = res >> 8; |
11988 | FETCH_SWORD(adr); |
11989 | WRITE_WORD_F(adr, res) |
11990 | POST_IO |
11991 | RET(18) |
11992 | } |
11993 | |
11994 | // MOVEW |
11995 | OPCODE(0x33E0) |
11996 | { |
11997 | u32 adr, res; |
11998 | u32 src, dst; |
11999 | |
12000 | adr = AREG((Opcode >> 0) & 7) - 2; |
12001 | AREG((Opcode >> 0) & 7) = adr; |
12002 | PRE_IO |
12003 | READ_WORD_F(adr, res) |
12004 | flag_C = 0; |
12005 | flag_V = 0; |
12006 | flag_NotZ = res; |
12007 | flag_N = res >> 8; |
12008 | FETCH_LONG(adr); |
12009 | WRITE_WORD_F(adr, res) |
12010 | POST_IO |
12011 | RET(22) |
12012 | } |
12013 | |
12014 | // MOVEW |
12015 | OPCODE(0x3EE0) |
12016 | { |
12017 | u32 adr, res; |
12018 | u32 src, dst; |
12019 | |
12020 | adr = AREG((Opcode >> 0) & 7) - 2; |
12021 | AREG((Opcode >> 0) & 7) = adr; |
12022 | PRE_IO |
12023 | READ_WORD_F(adr, res) |
12024 | flag_C = 0; |
12025 | flag_V = 0; |
12026 | flag_NotZ = res; |
12027 | flag_N = res >> 8; |
12028 | adr = AREG(7); |
12029 | AREG(7) += 2; |
12030 | WRITE_WORD_F(adr, res) |
12031 | POST_IO |
12032 | RET(14) |
12033 | } |
12034 | |
12035 | // MOVEW |
12036 | OPCODE(0x3F20) |
12037 | { |
12038 | u32 adr, res; |
12039 | u32 src, dst; |
12040 | |
12041 | adr = AREG((Opcode >> 0) & 7) - 2; |
12042 | AREG((Opcode >> 0) & 7) = adr; |
12043 | PRE_IO |
12044 | READ_WORD_F(adr, res) |
12045 | flag_C = 0; |
12046 | flag_V = 0; |
12047 | flag_NotZ = res; |
12048 | flag_N = res >> 8; |
12049 | adr = AREG(7) - 2; |
12050 | AREG(7) = adr; |
12051 | WRITE_WORD_F(adr, res) |
12052 | POST_IO |
12053 | RET(14) |
12054 | } |
12055 | |
12056 | // MOVEW |
12057 | OPCODE(0x3028) |
12058 | { |
12059 | u32 adr, res; |
12060 | u32 src, dst; |
12061 | |
12062 | FETCH_SWORD(adr); |
12063 | adr += AREG((Opcode >> 0) & 7); |
12064 | PRE_IO |
12065 | READ_WORD_F(adr, res) |
12066 | flag_C = 0; |
12067 | flag_V = 0; |
12068 | flag_NotZ = res; |
12069 | flag_N = res >> 8; |
12070 | DREGu16((Opcode >> 9) & 7) = res; |
12071 | POST_IO |
12072 | RET(12) |
12073 | } |
12074 | |
12075 | // MOVEW |
12076 | OPCODE(0x30A8) |
12077 | { |
12078 | u32 adr, res; |
12079 | u32 src, dst; |
12080 | |
12081 | FETCH_SWORD(adr); |
12082 | adr += AREG((Opcode >> 0) & 7); |
12083 | PRE_IO |
12084 | READ_WORD_F(adr, res) |
12085 | flag_C = 0; |
12086 | flag_V = 0; |
12087 | flag_NotZ = res; |
12088 | flag_N = res >> 8; |
12089 | adr = AREG((Opcode >> 9) & 7); |
12090 | WRITE_WORD_F(adr, res) |
12091 | POST_IO |
12092 | RET(16) |
12093 | } |
12094 | |
12095 | // MOVEW |
12096 | OPCODE(0x30E8) |
12097 | { |
12098 | u32 adr, res; |
12099 | u32 src, dst; |
12100 | |
12101 | FETCH_SWORD(adr); |
12102 | adr += AREG((Opcode >> 0) & 7); |
12103 | PRE_IO |
12104 | READ_WORD_F(adr, res) |
12105 | flag_C = 0; |
12106 | flag_V = 0; |
12107 | flag_NotZ = res; |
12108 | flag_N = res >> 8; |
12109 | adr = AREG((Opcode >> 9) & 7); |
12110 | AREG((Opcode >> 9) & 7) += 2; |
12111 | WRITE_WORD_F(adr, res) |
12112 | POST_IO |
12113 | RET(16) |
12114 | } |
12115 | |
12116 | // MOVEW |
12117 | OPCODE(0x3128) |
12118 | { |
12119 | u32 adr, res; |
12120 | u32 src, dst; |
12121 | |
12122 | FETCH_SWORD(adr); |
12123 | adr += AREG((Opcode >> 0) & 7); |
12124 | PRE_IO |
12125 | READ_WORD_F(adr, res) |
12126 | flag_C = 0; |
12127 | flag_V = 0; |
12128 | flag_NotZ = res; |
12129 | flag_N = res >> 8; |
12130 | adr = AREG((Opcode >> 9) & 7) - 2; |
12131 | AREG((Opcode >> 9) & 7) = adr; |
12132 | WRITE_WORD_F(adr, res) |
12133 | POST_IO |
12134 | RET(16) |
12135 | } |
12136 | |
12137 | // MOVEW |
12138 | OPCODE(0x3168) |
12139 | { |
12140 | u32 adr, res; |
12141 | u32 src, dst; |
12142 | |
12143 | FETCH_SWORD(adr); |
12144 | adr += AREG((Opcode >> 0) & 7); |
12145 | PRE_IO |
12146 | READ_WORD_F(adr, res) |
12147 | flag_C = 0; |
12148 | flag_V = 0; |
12149 | flag_NotZ = res; |
12150 | flag_N = res >> 8; |
12151 | FETCH_SWORD(adr); |
12152 | adr += AREG((Opcode >> 9) & 7); |
12153 | WRITE_WORD_F(adr, res) |
12154 | POST_IO |
12155 | RET(20) |
12156 | } |
12157 | |
12158 | // MOVEW |
12159 | OPCODE(0x31A8) |
12160 | { |
12161 | u32 adr, res; |
12162 | u32 src, dst; |
12163 | |
12164 | FETCH_SWORD(adr); |
12165 | adr += AREG((Opcode >> 0) & 7); |
12166 | PRE_IO |
12167 | READ_WORD_F(adr, res) |
12168 | flag_C = 0; |
12169 | flag_V = 0; |
12170 | flag_NotZ = res; |
12171 | flag_N = res >> 8; |
12172 | adr = AREG((Opcode >> 9) & 7); |
12173 | DECODE_EXT_WORD |
12174 | WRITE_WORD_F(adr, res) |
12175 | POST_IO |
12176 | RET(22) |
12177 | } |
12178 | |
12179 | // MOVEW |
12180 | OPCODE(0x31E8) |
12181 | { |
12182 | u32 adr, res; |
12183 | u32 src, dst; |
12184 | |
12185 | FETCH_SWORD(adr); |
12186 | adr += AREG((Opcode >> 0) & 7); |
12187 | PRE_IO |
12188 | READ_WORD_F(adr, res) |
12189 | flag_C = 0; |
12190 | flag_V = 0; |
12191 | flag_NotZ = res; |
12192 | flag_N = res >> 8; |
12193 | FETCH_SWORD(adr); |
12194 | WRITE_WORD_F(adr, res) |
12195 | POST_IO |
12196 | RET(20) |
12197 | } |
12198 | |
12199 | // MOVEW |
12200 | OPCODE(0x33E8) |
12201 | { |
12202 | u32 adr, res; |
12203 | u32 src, dst; |
12204 | |
12205 | FETCH_SWORD(adr); |
12206 | adr += AREG((Opcode >> 0) & 7); |
12207 | PRE_IO |
12208 | READ_WORD_F(adr, res) |
12209 | flag_C = 0; |
12210 | flag_V = 0; |
12211 | flag_NotZ = res; |
12212 | flag_N = res >> 8; |
12213 | FETCH_LONG(adr); |
12214 | WRITE_WORD_F(adr, res) |
12215 | POST_IO |
12216 | RET(24) |
12217 | } |
12218 | |
12219 | // MOVEW |
12220 | OPCODE(0x3EE8) |
12221 | { |
12222 | u32 adr, res; |
12223 | u32 src, dst; |
12224 | |
12225 | FETCH_SWORD(adr); |
12226 | adr += AREG((Opcode >> 0) & 7); |
12227 | PRE_IO |
12228 | READ_WORD_F(adr, res) |
12229 | flag_C = 0; |
12230 | flag_V = 0; |
12231 | flag_NotZ = res; |
12232 | flag_N = res >> 8; |
12233 | adr = AREG(7); |
12234 | AREG(7) += 2; |
12235 | WRITE_WORD_F(adr, res) |
12236 | POST_IO |
12237 | RET(16) |
12238 | } |
12239 | |
12240 | // MOVEW |
12241 | OPCODE(0x3F28) |
12242 | { |
12243 | u32 adr, res; |
12244 | u32 src, dst; |
12245 | |
12246 | FETCH_SWORD(adr); |
12247 | adr += AREG((Opcode >> 0) & 7); |
12248 | PRE_IO |
12249 | READ_WORD_F(adr, res) |
12250 | flag_C = 0; |
12251 | flag_V = 0; |
12252 | flag_NotZ = res; |
12253 | flag_N = res >> 8; |
12254 | adr = AREG(7) - 2; |
12255 | AREG(7) = adr; |
12256 | WRITE_WORD_F(adr, res) |
12257 | POST_IO |
12258 | RET(16) |
12259 | } |
12260 | |
12261 | // MOVEW |
12262 | OPCODE(0x3030) |
12263 | { |
12264 | u32 adr, res; |
12265 | u32 src, dst; |
12266 | |
12267 | adr = AREG((Opcode >> 0) & 7); |
12268 | DECODE_EXT_WORD |
12269 | PRE_IO |
12270 | READ_WORD_F(adr, res) |
12271 | flag_C = 0; |
12272 | flag_V = 0; |
12273 | flag_NotZ = res; |
12274 | flag_N = res >> 8; |
12275 | DREGu16((Opcode >> 9) & 7) = res; |
12276 | POST_IO |
12277 | RET(14) |
12278 | } |
12279 | |
12280 | // MOVEW |
12281 | OPCODE(0x30B0) |
12282 | { |
12283 | u32 adr, res; |
12284 | u32 src, dst; |
12285 | |
12286 | adr = AREG((Opcode >> 0) & 7); |
12287 | DECODE_EXT_WORD |
12288 | PRE_IO |
12289 | READ_WORD_F(adr, res) |
12290 | flag_C = 0; |
12291 | flag_V = 0; |
12292 | flag_NotZ = res; |
12293 | flag_N = res >> 8; |
12294 | adr = AREG((Opcode >> 9) & 7); |
12295 | WRITE_WORD_F(adr, res) |
12296 | POST_IO |
12297 | RET(18) |
12298 | } |
12299 | |
12300 | // MOVEW |
12301 | OPCODE(0x30F0) |
12302 | { |
12303 | u32 adr, res; |
12304 | u32 src, dst; |
12305 | |
12306 | adr = AREG((Opcode >> 0) & 7); |
12307 | DECODE_EXT_WORD |
12308 | PRE_IO |
12309 | READ_WORD_F(adr, res) |
12310 | flag_C = 0; |
12311 | flag_V = 0; |
12312 | flag_NotZ = res; |
12313 | flag_N = res >> 8; |
12314 | adr = AREG((Opcode >> 9) & 7); |
12315 | AREG((Opcode >> 9) & 7) += 2; |
12316 | WRITE_WORD_F(adr, res) |
12317 | POST_IO |
12318 | RET(18) |
12319 | } |
12320 | |
12321 | // MOVEW |
12322 | OPCODE(0x3130) |
12323 | { |
12324 | u32 adr, res; |
12325 | u32 src, dst; |
12326 | |
12327 | adr = AREG((Opcode >> 0) & 7); |
12328 | DECODE_EXT_WORD |
12329 | PRE_IO |
12330 | READ_WORD_F(adr, res) |
12331 | flag_C = 0; |
12332 | flag_V = 0; |
12333 | flag_NotZ = res; |
12334 | flag_N = res >> 8; |
12335 | adr = AREG((Opcode >> 9) & 7) - 2; |
12336 | AREG((Opcode >> 9) & 7) = adr; |
12337 | WRITE_WORD_F(adr, res) |
12338 | POST_IO |
12339 | RET(18) |
12340 | } |
12341 | |
12342 | // MOVEW |
12343 | OPCODE(0x3170) |
12344 | { |
12345 | u32 adr, res; |
12346 | u32 src, dst; |
12347 | |
12348 | adr = AREG((Opcode >> 0) & 7); |
12349 | DECODE_EXT_WORD |
12350 | PRE_IO |
12351 | READ_WORD_F(adr, res) |
12352 | flag_C = 0; |
12353 | flag_V = 0; |
12354 | flag_NotZ = res; |
12355 | flag_N = res >> 8; |
12356 | FETCH_SWORD(adr); |
12357 | adr += AREG((Opcode >> 9) & 7); |
12358 | WRITE_WORD_F(adr, res) |
12359 | POST_IO |
12360 | RET(22) |
12361 | } |
12362 | |
12363 | // MOVEW |
12364 | OPCODE(0x31B0) |
12365 | { |
12366 | u32 adr, res; |
12367 | u32 src, dst; |
12368 | |
12369 | adr = AREG((Opcode >> 0) & 7); |
12370 | DECODE_EXT_WORD |
12371 | PRE_IO |
12372 | READ_WORD_F(adr, res) |
12373 | flag_C = 0; |
12374 | flag_V = 0; |
12375 | flag_NotZ = res; |
12376 | flag_N = res >> 8; |
12377 | adr = AREG((Opcode >> 9) & 7); |
12378 | DECODE_EXT_WORD |
12379 | WRITE_WORD_F(adr, res) |
12380 | POST_IO |
12381 | RET(24) |
12382 | } |
12383 | |
12384 | // MOVEW |
12385 | OPCODE(0x31F0) |
12386 | { |
12387 | u32 adr, res; |
12388 | u32 src, dst; |
12389 | |
12390 | adr = AREG((Opcode >> 0) & 7); |
12391 | DECODE_EXT_WORD |
12392 | PRE_IO |
12393 | READ_WORD_F(adr, res) |
12394 | flag_C = 0; |
12395 | flag_V = 0; |
12396 | flag_NotZ = res; |
12397 | flag_N = res >> 8; |
12398 | FETCH_SWORD(adr); |
12399 | WRITE_WORD_F(adr, res) |
12400 | POST_IO |
12401 | RET(22) |
12402 | } |
12403 | |
12404 | // MOVEW |
12405 | OPCODE(0x33F0) |
12406 | { |
12407 | u32 adr, res; |
12408 | u32 src, dst; |
12409 | |
12410 | adr = AREG((Opcode >> 0) & 7); |
12411 | DECODE_EXT_WORD |
12412 | PRE_IO |
12413 | READ_WORD_F(adr, res) |
12414 | flag_C = 0; |
12415 | flag_V = 0; |
12416 | flag_NotZ = res; |
12417 | flag_N = res >> 8; |
12418 | FETCH_LONG(adr); |
12419 | WRITE_WORD_F(adr, res) |
12420 | POST_IO |
12421 | RET(26) |
12422 | } |
12423 | |
12424 | // MOVEW |
12425 | OPCODE(0x3EF0) |
12426 | { |
12427 | u32 adr, res; |
12428 | u32 src, dst; |
12429 | |
12430 | adr = AREG((Opcode >> 0) & 7); |
12431 | DECODE_EXT_WORD |
12432 | PRE_IO |
12433 | READ_WORD_F(adr, res) |
12434 | flag_C = 0; |
12435 | flag_V = 0; |
12436 | flag_NotZ = res; |
12437 | flag_N = res >> 8; |
12438 | adr = AREG(7); |
12439 | AREG(7) += 2; |
12440 | WRITE_WORD_F(adr, res) |
12441 | POST_IO |
12442 | RET(18) |
12443 | } |
12444 | |
12445 | // MOVEW |
12446 | OPCODE(0x3F30) |
12447 | { |
12448 | u32 adr, res; |
12449 | u32 src, dst; |
12450 | |
12451 | adr = AREG((Opcode >> 0) & 7); |
12452 | DECODE_EXT_WORD |
12453 | PRE_IO |
12454 | READ_WORD_F(adr, res) |
12455 | flag_C = 0; |
12456 | flag_V = 0; |
12457 | flag_NotZ = res; |
12458 | flag_N = res >> 8; |
12459 | adr = AREG(7) - 2; |
12460 | AREG(7) = adr; |
12461 | WRITE_WORD_F(adr, res) |
12462 | POST_IO |
12463 | RET(18) |
12464 | } |
12465 | |
12466 | // MOVEW |
12467 | OPCODE(0x3038) |
12468 | { |
12469 | u32 adr, res; |
12470 | u32 src, dst; |
12471 | |
12472 | FETCH_SWORD(adr); |
12473 | PRE_IO |
12474 | READ_WORD_F(adr, res) |
12475 | flag_C = 0; |
12476 | flag_V = 0; |
12477 | flag_NotZ = res; |
12478 | flag_N = res >> 8; |
12479 | DREGu16((Opcode >> 9) & 7) = res; |
12480 | POST_IO |
12481 | RET(12) |
12482 | } |
12483 | |
12484 | // MOVEW |
12485 | OPCODE(0x30B8) |
12486 | { |
12487 | u32 adr, res; |
12488 | u32 src, dst; |
12489 | |
12490 | FETCH_SWORD(adr); |
12491 | PRE_IO |
12492 | READ_WORD_F(adr, res) |
12493 | flag_C = 0; |
12494 | flag_V = 0; |
12495 | flag_NotZ = res; |
12496 | flag_N = res >> 8; |
12497 | adr = AREG((Opcode >> 9) & 7); |
12498 | WRITE_WORD_F(adr, res) |
12499 | POST_IO |
12500 | RET(16) |
12501 | } |
12502 | |
12503 | // MOVEW |
12504 | OPCODE(0x30F8) |
12505 | { |
12506 | u32 adr, res; |
12507 | u32 src, dst; |
12508 | |
12509 | FETCH_SWORD(adr); |
12510 | PRE_IO |
12511 | READ_WORD_F(adr, res) |
12512 | flag_C = 0; |
12513 | flag_V = 0; |
12514 | flag_NotZ = res; |
12515 | flag_N = res >> 8; |
12516 | adr = AREG((Opcode >> 9) & 7); |
12517 | AREG((Opcode >> 9) & 7) += 2; |
12518 | WRITE_WORD_F(adr, res) |
12519 | POST_IO |
12520 | RET(16) |
12521 | } |
12522 | |
12523 | // MOVEW |
12524 | OPCODE(0x3138) |
12525 | { |
12526 | u32 adr, res; |
12527 | u32 src, dst; |
12528 | |
12529 | FETCH_SWORD(adr); |
12530 | PRE_IO |
12531 | READ_WORD_F(adr, res) |
12532 | flag_C = 0; |
12533 | flag_V = 0; |
12534 | flag_NotZ = res; |
12535 | flag_N = res >> 8; |
12536 | adr = AREG((Opcode >> 9) & 7) - 2; |
12537 | AREG((Opcode >> 9) & 7) = adr; |
12538 | WRITE_WORD_F(adr, res) |
12539 | POST_IO |
12540 | RET(16) |
12541 | } |
12542 | |
12543 | // MOVEW |
12544 | OPCODE(0x3178) |
12545 | { |
12546 | u32 adr, res; |
12547 | u32 src, dst; |
12548 | |
12549 | FETCH_SWORD(adr); |
12550 | PRE_IO |
12551 | READ_WORD_F(adr, res) |
12552 | flag_C = 0; |
12553 | flag_V = 0; |
12554 | flag_NotZ = res; |
12555 | flag_N = res >> 8; |
12556 | FETCH_SWORD(adr); |
12557 | adr += AREG((Opcode >> 9) & 7); |
12558 | WRITE_WORD_F(adr, res) |
12559 | POST_IO |
12560 | RET(20) |
12561 | } |
12562 | |
12563 | // MOVEW |
12564 | OPCODE(0x31B8) |
12565 | { |
12566 | u32 adr, res; |
12567 | u32 src, dst; |
12568 | |
12569 | FETCH_SWORD(adr); |
12570 | PRE_IO |
12571 | READ_WORD_F(adr, res) |
12572 | flag_C = 0; |
12573 | flag_V = 0; |
12574 | flag_NotZ = res; |
12575 | flag_N = res >> 8; |
12576 | adr = AREG((Opcode >> 9) & 7); |
12577 | DECODE_EXT_WORD |
12578 | WRITE_WORD_F(adr, res) |
12579 | POST_IO |
12580 | RET(22) |
12581 | } |
12582 | |
12583 | // MOVEW |
12584 | OPCODE(0x31F8) |
12585 | { |
12586 | u32 adr, res; |
12587 | u32 src, dst; |
12588 | |
12589 | FETCH_SWORD(adr); |
12590 | PRE_IO |
12591 | READ_WORD_F(adr, res) |
12592 | flag_C = 0; |
12593 | flag_V = 0; |
12594 | flag_NotZ = res; |
12595 | flag_N = res >> 8; |
12596 | FETCH_SWORD(adr); |
12597 | WRITE_WORD_F(adr, res) |
12598 | POST_IO |
12599 | RET(20) |
12600 | } |
12601 | |
12602 | // MOVEW |
12603 | OPCODE(0x33F8) |
12604 | { |
12605 | u32 adr, res; |
12606 | u32 src, dst; |
12607 | |
12608 | FETCH_SWORD(adr); |
12609 | PRE_IO |
12610 | READ_WORD_F(adr, res) |
12611 | flag_C = 0; |
12612 | flag_V = 0; |
12613 | flag_NotZ = res; |
12614 | flag_N = res >> 8; |
12615 | FETCH_LONG(adr); |
12616 | WRITE_WORD_F(adr, res) |
12617 | POST_IO |
12618 | RET(24) |
12619 | } |
12620 | |
12621 | // MOVEW |
12622 | OPCODE(0x3EF8) |
12623 | { |
12624 | u32 adr, res; |
12625 | u32 src, dst; |
12626 | |
12627 | FETCH_SWORD(adr); |
12628 | PRE_IO |
12629 | READ_WORD_F(adr, res) |
12630 | flag_C = 0; |
12631 | flag_V = 0; |
12632 | flag_NotZ = res; |
12633 | flag_N = res >> 8; |
12634 | adr = AREG(7); |
12635 | AREG(7) += 2; |
12636 | WRITE_WORD_F(adr, res) |
12637 | POST_IO |
12638 | RET(16) |
12639 | } |
12640 | |
12641 | // MOVEW |
12642 | OPCODE(0x3F38) |
12643 | { |
12644 | u32 adr, res; |
12645 | u32 src, dst; |
12646 | |
12647 | FETCH_SWORD(adr); |
12648 | PRE_IO |
12649 | READ_WORD_F(adr, res) |
12650 | flag_C = 0; |
12651 | flag_V = 0; |
12652 | flag_NotZ = res; |
12653 | flag_N = res >> 8; |
12654 | adr = AREG(7) - 2; |
12655 | AREG(7) = adr; |
12656 | WRITE_WORD_F(adr, res) |
12657 | POST_IO |
12658 | RET(16) |
12659 | } |
12660 | |
12661 | // MOVEW |
12662 | OPCODE(0x3039) |
12663 | { |
12664 | u32 adr, res; |
12665 | u32 src, dst; |
12666 | |
12667 | FETCH_LONG(adr); |
12668 | PRE_IO |
12669 | READ_WORD_F(adr, res) |
12670 | flag_C = 0; |
12671 | flag_V = 0; |
12672 | flag_NotZ = res; |
12673 | flag_N = res >> 8; |
12674 | DREGu16((Opcode >> 9) & 7) = res; |
12675 | POST_IO |
12676 | RET(16) |
12677 | } |
12678 | |
12679 | // MOVEW |
12680 | OPCODE(0x30B9) |
12681 | { |
12682 | u32 adr, res; |
12683 | u32 src, dst; |
12684 | |
12685 | FETCH_LONG(adr); |
12686 | PRE_IO |
12687 | READ_WORD_F(adr, res) |
12688 | flag_C = 0; |
12689 | flag_V = 0; |
12690 | flag_NotZ = res; |
12691 | flag_N = res >> 8; |
12692 | adr = AREG((Opcode >> 9) & 7); |
12693 | WRITE_WORD_F(adr, res) |
12694 | POST_IO |
12695 | RET(20) |
12696 | } |
12697 | |
12698 | // MOVEW |
12699 | OPCODE(0x30F9) |
12700 | { |
12701 | u32 adr, res; |
12702 | u32 src, dst; |
12703 | |
12704 | FETCH_LONG(adr); |
12705 | PRE_IO |
12706 | READ_WORD_F(adr, res) |
12707 | flag_C = 0; |
12708 | flag_V = 0; |
12709 | flag_NotZ = res; |
12710 | flag_N = res >> 8; |
12711 | adr = AREG((Opcode >> 9) & 7); |
12712 | AREG((Opcode >> 9) & 7) += 2; |
12713 | WRITE_WORD_F(adr, res) |
12714 | POST_IO |
12715 | RET(20) |
12716 | } |
12717 | |
12718 | // MOVEW |
12719 | OPCODE(0x3139) |
12720 | { |
12721 | u32 adr, res; |
12722 | u32 src, dst; |
12723 | |
12724 | FETCH_LONG(adr); |
12725 | PRE_IO |
12726 | READ_WORD_F(adr, res) |
12727 | flag_C = 0; |
12728 | flag_V = 0; |
12729 | flag_NotZ = res; |
12730 | flag_N = res >> 8; |
12731 | adr = AREG((Opcode >> 9) & 7) - 2; |
12732 | AREG((Opcode >> 9) & 7) = adr; |
12733 | WRITE_WORD_F(adr, res) |
12734 | POST_IO |
12735 | RET(20) |
12736 | } |
12737 | |
12738 | // MOVEW |
12739 | OPCODE(0x3179) |
12740 | { |
12741 | u32 adr, res; |
12742 | u32 src, dst; |
12743 | |
12744 | FETCH_LONG(adr); |
12745 | PRE_IO |
12746 | READ_WORD_F(adr, res) |
12747 | flag_C = 0; |
12748 | flag_V = 0; |
12749 | flag_NotZ = res; |
12750 | flag_N = res >> 8; |
12751 | FETCH_SWORD(adr); |
12752 | adr += AREG((Opcode >> 9) & 7); |
12753 | WRITE_WORD_F(adr, res) |
12754 | POST_IO |
12755 | RET(24) |
12756 | } |
12757 | |
12758 | // MOVEW |
12759 | OPCODE(0x31B9) |
12760 | { |
12761 | u32 adr, res; |
12762 | u32 src, dst; |
12763 | |
12764 | FETCH_LONG(adr); |
12765 | PRE_IO |
12766 | READ_WORD_F(adr, res) |
12767 | flag_C = 0; |
12768 | flag_V = 0; |
12769 | flag_NotZ = res; |
12770 | flag_N = res >> 8; |
12771 | adr = AREG((Opcode >> 9) & 7); |
12772 | DECODE_EXT_WORD |
12773 | WRITE_WORD_F(adr, res) |
12774 | POST_IO |
12775 | RET(26) |
12776 | } |
12777 | |
12778 | // MOVEW |
12779 | OPCODE(0x31F9) |
12780 | { |
12781 | u32 adr, res; |
12782 | u32 src, dst; |
12783 | |
12784 | FETCH_LONG(adr); |
12785 | PRE_IO |
12786 | READ_WORD_F(adr, res) |
12787 | flag_C = 0; |
12788 | flag_V = 0; |
12789 | flag_NotZ = res; |
12790 | flag_N = res >> 8; |
12791 | FETCH_SWORD(adr); |
12792 | WRITE_WORD_F(adr, res) |
12793 | POST_IO |
12794 | RET(24) |
12795 | } |
12796 | |
12797 | // MOVEW |
12798 | OPCODE(0x33F9) |
12799 | { |
12800 | u32 adr, res; |
12801 | u32 src, dst; |
12802 | |
12803 | FETCH_LONG(adr); |
12804 | PRE_IO |
12805 | READ_WORD_F(adr, res) |
12806 | flag_C = 0; |
12807 | flag_V = 0; |
12808 | flag_NotZ = res; |
12809 | flag_N = res >> 8; |
12810 | FETCH_LONG(adr); |
12811 | WRITE_WORD_F(adr, res) |
12812 | POST_IO |
12813 | RET(28) |
12814 | } |
12815 | |
12816 | // MOVEW |
12817 | OPCODE(0x3EF9) |
12818 | { |
12819 | u32 adr, res; |
12820 | u32 src, dst; |
12821 | |
12822 | FETCH_LONG(adr); |
12823 | PRE_IO |
12824 | READ_WORD_F(adr, res) |
12825 | flag_C = 0; |
12826 | flag_V = 0; |
12827 | flag_NotZ = res; |
12828 | flag_N = res >> 8; |
12829 | adr = AREG(7); |
12830 | AREG(7) += 2; |
12831 | WRITE_WORD_F(adr, res) |
12832 | POST_IO |
12833 | RET(20) |
12834 | } |
12835 | |
12836 | // MOVEW |
12837 | OPCODE(0x3F39) |
12838 | { |
12839 | u32 adr, res; |
12840 | u32 src, dst; |
12841 | |
12842 | FETCH_LONG(adr); |
12843 | PRE_IO |
12844 | READ_WORD_F(adr, res) |
12845 | flag_C = 0; |
12846 | flag_V = 0; |
12847 | flag_NotZ = res; |
12848 | flag_N = res >> 8; |
12849 | adr = AREG(7) - 2; |
12850 | AREG(7) = adr; |
12851 | WRITE_WORD_F(adr, res) |
12852 | POST_IO |
12853 | RET(20) |
12854 | } |
12855 | |
12856 | // MOVEW |
12857 | OPCODE(0x303A) |
12858 | { |
12859 | u32 adr, res; |
12860 | u32 src, dst; |
12861 | |
12862 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12863 | PC++; |
12864 | PRE_IO |
12865 | READ_WORD_F(adr, res) |
12866 | flag_C = 0; |
12867 | flag_V = 0; |
12868 | flag_NotZ = res; |
12869 | flag_N = res >> 8; |
12870 | DREGu16((Opcode >> 9) & 7) = res; |
12871 | POST_IO |
12872 | RET(12) |
12873 | } |
12874 | |
12875 | // MOVEW |
12876 | OPCODE(0x30BA) |
12877 | { |
12878 | u32 adr, res; |
12879 | u32 src, dst; |
12880 | |
12881 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12882 | PC++; |
12883 | PRE_IO |
12884 | READ_WORD_F(adr, res) |
12885 | flag_C = 0; |
12886 | flag_V = 0; |
12887 | flag_NotZ = res; |
12888 | flag_N = res >> 8; |
12889 | adr = AREG((Opcode >> 9) & 7); |
12890 | WRITE_WORD_F(adr, res) |
12891 | POST_IO |
12892 | RET(16) |
12893 | } |
12894 | |
12895 | // MOVEW |
12896 | OPCODE(0x30FA) |
12897 | { |
12898 | u32 adr, res; |
12899 | u32 src, dst; |
12900 | |
12901 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12902 | PC++; |
12903 | PRE_IO |
12904 | READ_WORD_F(adr, res) |
12905 | flag_C = 0; |
12906 | flag_V = 0; |
12907 | flag_NotZ = res; |
12908 | flag_N = res >> 8; |
12909 | adr = AREG((Opcode >> 9) & 7); |
12910 | AREG((Opcode >> 9) & 7) += 2; |
12911 | WRITE_WORD_F(adr, res) |
12912 | POST_IO |
12913 | RET(16) |
12914 | } |
12915 | |
12916 | // MOVEW |
12917 | OPCODE(0x313A) |
12918 | { |
12919 | u32 adr, res; |
12920 | u32 src, dst; |
12921 | |
12922 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12923 | PC++; |
12924 | PRE_IO |
12925 | READ_WORD_F(adr, res) |
12926 | flag_C = 0; |
12927 | flag_V = 0; |
12928 | flag_NotZ = res; |
12929 | flag_N = res >> 8; |
12930 | adr = AREG((Opcode >> 9) & 7) - 2; |
12931 | AREG((Opcode >> 9) & 7) = adr; |
12932 | WRITE_WORD_F(adr, res) |
12933 | POST_IO |
12934 | RET(16) |
12935 | } |
12936 | |
12937 | // MOVEW |
12938 | OPCODE(0x317A) |
12939 | { |
12940 | u32 adr, res; |
12941 | u32 src, dst; |
12942 | |
12943 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12944 | PC++; |
12945 | PRE_IO |
12946 | READ_WORD_F(adr, res) |
12947 | flag_C = 0; |
12948 | flag_V = 0; |
12949 | flag_NotZ = res; |
12950 | flag_N = res >> 8; |
12951 | FETCH_SWORD(adr); |
12952 | adr += AREG((Opcode >> 9) & 7); |
12953 | WRITE_WORD_F(adr, res) |
12954 | POST_IO |
12955 | RET(20) |
12956 | } |
12957 | |
12958 | // MOVEW |
12959 | OPCODE(0x31BA) |
12960 | { |
12961 | u32 adr, res; |
12962 | u32 src, dst; |
12963 | |
12964 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12965 | PC++; |
12966 | PRE_IO |
12967 | READ_WORD_F(adr, res) |
12968 | flag_C = 0; |
12969 | flag_V = 0; |
12970 | flag_NotZ = res; |
12971 | flag_N = res >> 8; |
12972 | adr = AREG((Opcode >> 9) & 7); |
12973 | DECODE_EXT_WORD |
12974 | WRITE_WORD_F(adr, res) |
12975 | POST_IO |
12976 | RET(22) |
12977 | } |
12978 | |
12979 | // MOVEW |
12980 | OPCODE(0x31FA) |
12981 | { |
12982 | u32 adr, res; |
12983 | u32 src, dst; |
12984 | |
12985 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12986 | PC++; |
12987 | PRE_IO |
12988 | READ_WORD_F(adr, res) |
12989 | flag_C = 0; |
12990 | flag_V = 0; |
12991 | flag_NotZ = res; |
12992 | flag_N = res >> 8; |
12993 | FETCH_SWORD(adr); |
12994 | WRITE_WORD_F(adr, res) |
12995 | POST_IO |
12996 | RET(20) |
12997 | } |
12998 | |
12999 | // MOVEW |
13000 | OPCODE(0x33FA) |
13001 | { |
13002 | u32 adr, res; |
13003 | u32 src, dst; |
13004 | |
13005 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13006 | PC++; |
13007 | PRE_IO |
13008 | READ_WORD_F(adr, res) |
13009 | flag_C = 0; |
13010 | flag_V = 0; |
13011 | flag_NotZ = res; |
13012 | flag_N = res >> 8; |
13013 | FETCH_LONG(adr); |
13014 | WRITE_WORD_F(adr, res) |
13015 | POST_IO |
13016 | RET(24) |
13017 | } |
13018 | |
13019 | // MOVEW |
13020 | OPCODE(0x3EFA) |
13021 | { |
13022 | u32 adr, res; |
13023 | u32 src, dst; |
13024 | |
13025 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13026 | PC++; |
13027 | PRE_IO |
13028 | READ_WORD_F(adr, res) |
13029 | flag_C = 0; |
13030 | flag_V = 0; |
13031 | flag_NotZ = res; |
13032 | flag_N = res >> 8; |
13033 | adr = AREG(7); |
13034 | AREG(7) += 2; |
13035 | WRITE_WORD_F(adr, res) |
13036 | POST_IO |
13037 | RET(16) |
13038 | } |
13039 | |
13040 | // MOVEW |
13041 | OPCODE(0x3F3A) |
13042 | { |
13043 | u32 adr, res; |
13044 | u32 src, dst; |
13045 | |
13046 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13047 | PC++; |
13048 | PRE_IO |
13049 | READ_WORD_F(adr, res) |
13050 | flag_C = 0; |
13051 | flag_V = 0; |
13052 | flag_NotZ = res; |
13053 | flag_N = res >> 8; |
13054 | adr = AREG(7) - 2; |
13055 | AREG(7) = adr; |
13056 | WRITE_WORD_F(adr, res) |
13057 | POST_IO |
13058 | RET(16) |
13059 | } |
13060 | |
13061 | // MOVEW |
13062 | OPCODE(0x303B) |
13063 | { |
13064 | u32 adr, res; |
13065 | u32 src, dst; |
13066 | |
13067 | adr = (u32)(PC) - BasePC; |
13068 | DECODE_EXT_WORD |
13069 | PRE_IO |
13070 | READ_WORD_F(adr, res) |
13071 | flag_C = 0; |
13072 | flag_V = 0; |
13073 | flag_NotZ = res; |
13074 | flag_N = res >> 8; |
13075 | DREGu16((Opcode >> 9) & 7) = res; |
13076 | POST_IO |
13077 | RET(14) |
13078 | } |
13079 | |
13080 | // MOVEW |
13081 | OPCODE(0x30BB) |
13082 | { |
13083 | u32 adr, res; |
13084 | u32 src, dst; |
13085 | |
13086 | adr = (u32)(PC) - BasePC; |
13087 | DECODE_EXT_WORD |
13088 | PRE_IO |
13089 | READ_WORD_F(adr, res) |
13090 | flag_C = 0; |
13091 | flag_V = 0; |
13092 | flag_NotZ = res; |
13093 | flag_N = res >> 8; |
13094 | adr = AREG((Opcode >> 9) & 7); |
13095 | WRITE_WORD_F(adr, res) |
13096 | POST_IO |
13097 | RET(18) |
13098 | } |
13099 | |
13100 | // MOVEW |
13101 | OPCODE(0x30FB) |
13102 | { |
13103 | u32 adr, res; |
13104 | u32 src, dst; |
13105 | |
13106 | adr = (u32)(PC) - BasePC; |
13107 | DECODE_EXT_WORD |
13108 | PRE_IO |
13109 | READ_WORD_F(adr, res) |
13110 | flag_C = 0; |
13111 | flag_V = 0; |
13112 | flag_NotZ = res; |
13113 | flag_N = res >> 8; |
13114 | adr = AREG((Opcode >> 9) & 7); |
13115 | AREG((Opcode >> 9) & 7) += 2; |
13116 | WRITE_WORD_F(adr, res) |
13117 | POST_IO |
13118 | RET(18) |
13119 | } |
13120 | |
13121 | // MOVEW |
13122 | OPCODE(0x313B) |
13123 | { |
13124 | u32 adr, res; |
13125 | u32 src, dst; |
13126 | |
13127 | adr = (u32)(PC) - BasePC; |
13128 | DECODE_EXT_WORD |
13129 | PRE_IO |
13130 | READ_WORD_F(adr, res) |
13131 | flag_C = 0; |
13132 | flag_V = 0; |
13133 | flag_NotZ = res; |
13134 | flag_N = res >> 8; |
13135 | adr = AREG((Opcode >> 9) & 7) - 2; |
13136 | AREG((Opcode >> 9) & 7) = adr; |
13137 | WRITE_WORD_F(adr, res) |
13138 | POST_IO |
13139 | RET(18) |
13140 | } |
13141 | |
13142 | // MOVEW |
13143 | OPCODE(0x317B) |
13144 | { |
13145 | u32 adr, res; |
13146 | u32 src, dst; |
13147 | |
13148 | adr = (u32)(PC) - BasePC; |
13149 | DECODE_EXT_WORD |
13150 | PRE_IO |
13151 | READ_WORD_F(adr, res) |
13152 | flag_C = 0; |
13153 | flag_V = 0; |
13154 | flag_NotZ = res; |
13155 | flag_N = res >> 8; |
13156 | FETCH_SWORD(adr); |
13157 | adr += AREG((Opcode >> 9) & 7); |
13158 | WRITE_WORD_F(adr, res) |
13159 | POST_IO |
13160 | RET(22) |
13161 | } |
13162 | |
13163 | // MOVEW |
13164 | OPCODE(0x31BB) |
13165 | { |
13166 | u32 adr, res; |
13167 | u32 src, dst; |
13168 | |
13169 | adr = (u32)(PC) - BasePC; |
13170 | DECODE_EXT_WORD |
13171 | PRE_IO |
13172 | READ_WORD_F(adr, res) |
13173 | flag_C = 0; |
13174 | flag_V = 0; |
13175 | flag_NotZ = res; |
13176 | flag_N = res >> 8; |
13177 | adr = AREG((Opcode >> 9) & 7); |
13178 | DECODE_EXT_WORD |
13179 | WRITE_WORD_F(adr, res) |
13180 | POST_IO |
13181 | RET(24) |
13182 | } |
13183 | |
13184 | // MOVEW |
13185 | OPCODE(0x31FB) |
13186 | { |
13187 | u32 adr, res; |
13188 | u32 src, dst; |
13189 | |
13190 | adr = (u32)(PC) - BasePC; |
13191 | DECODE_EXT_WORD |
13192 | PRE_IO |
13193 | READ_WORD_F(adr, res) |
13194 | flag_C = 0; |
13195 | flag_V = 0; |
13196 | flag_NotZ = res; |
13197 | flag_N = res >> 8; |
13198 | FETCH_SWORD(adr); |
13199 | WRITE_WORD_F(adr, res) |
13200 | POST_IO |
13201 | RET(22) |
13202 | } |
13203 | |
13204 | // MOVEW |
13205 | OPCODE(0x33FB) |
13206 | { |
13207 | u32 adr, res; |
13208 | u32 src, dst; |
13209 | |
13210 | adr = (u32)(PC) - BasePC; |
13211 | DECODE_EXT_WORD |
13212 | PRE_IO |
13213 | READ_WORD_F(adr, res) |
13214 | flag_C = 0; |
13215 | flag_V = 0; |
13216 | flag_NotZ = res; |
13217 | flag_N = res >> 8; |
13218 | FETCH_LONG(adr); |
13219 | WRITE_WORD_F(adr, res) |
13220 | POST_IO |
13221 | RET(26) |
13222 | } |
13223 | |
13224 | // MOVEW |
13225 | OPCODE(0x3EFB) |
13226 | { |
13227 | u32 adr, res; |
13228 | u32 src, dst; |
13229 | |
13230 | adr = (u32)(PC) - BasePC; |
13231 | DECODE_EXT_WORD |
13232 | PRE_IO |
13233 | READ_WORD_F(adr, res) |
13234 | flag_C = 0; |
13235 | flag_V = 0; |
13236 | flag_NotZ = res; |
13237 | flag_N = res >> 8; |
13238 | adr = AREG(7); |
13239 | AREG(7) += 2; |
13240 | WRITE_WORD_F(adr, res) |
13241 | POST_IO |
13242 | RET(18) |
13243 | } |
13244 | |
13245 | // MOVEW |
13246 | OPCODE(0x3F3B) |
13247 | { |
13248 | u32 adr, res; |
13249 | u32 src, dst; |
13250 | |
13251 | adr = (u32)(PC) - BasePC; |
13252 | DECODE_EXT_WORD |
13253 | PRE_IO |
13254 | READ_WORD_F(adr, res) |
13255 | flag_C = 0; |
13256 | flag_V = 0; |
13257 | flag_NotZ = res; |
13258 | flag_N = res >> 8; |
13259 | adr = AREG(7) - 2; |
13260 | AREG(7) = adr; |
13261 | WRITE_WORD_F(adr, res) |
13262 | POST_IO |
13263 | RET(18) |
13264 | } |
13265 | |
13266 | // MOVEW |
13267 | OPCODE(0x303C) |
13268 | { |
13269 | u32 adr, res; |
13270 | u32 src, dst; |
13271 | |
13272 | FETCH_WORD(res); |
13273 | flag_C = 0; |
13274 | flag_V = 0; |
13275 | flag_NotZ = res; |
13276 | flag_N = res >> 8; |
13277 | DREGu16((Opcode >> 9) & 7) = res; |
13278 | RET(8) |
13279 | } |
13280 | |
13281 | // MOVEW |
13282 | OPCODE(0x30BC) |
13283 | { |
13284 | u32 adr, res; |
13285 | u32 src, dst; |
13286 | |
13287 | FETCH_WORD(res); |
13288 | flag_C = 0; |
13289 | flag_V = 0; |
13290 | flag_NotZ = res; |
13291 | flag_N = res >> 8; |
13292 | adr = AREG((Opcode >> 9) & 7); |
13293 | PRE_IO |
13294 | WRITE_WORD_F(adr, res) |
13295 | POST_IO |
13296 | RET(12) |
13297 | } |
13298 | |
13299 | // MOVEW |
13300 | OPCODE(0x30FC) |
13301 | { |
13302 | u32 adr, res; |
13303 | u32 src, dst; |
13304 | |
13305 | FETCH_WORD(res); |
13306 | flag_C = 0; |
13307 | flag_V = 0; |
13308 | flag_NotZ = res; |
13309 | flag_N = res >> 8; |
13310 | adr = AREG((Opcode >> 9) & 7); |
13311 | AREG((Opcode >> 9) & 7) += 2; |
13312 | PRE_IO |
13313 | WRITE_WORD_F(adr, res) |
13314 | POST_IO |
13315 | RET(12) |
13316 | } |
13317 | |
13318 | // MOVEW |
13319 | OPCODE(0x313C) |
13320 | { |
13321 | u32 adr, res; |
13322 | u32 src, dst; |
13323 | |
13324 | FETCH_WORD(res); |
13325 | flag_C = 0; |
13326 | flag_V = 0; |
13327 | flag_NotZ = res; |
13328 | flag_N = res >> 8; |
13329 | adr = AREG((Opcode >> 9) & 7) - 2; |
13330 | AREG((Opcode >> 9) & 7) = adr; |
13331 | PRE_IO |
13332 | WRITE_WORD_F(adr, res) |
13333 | POST_IO |
13334 | RET(12) |
13335 | } |
13336 | |
13337 | // MOVEW |
13338 | OPCODE(0x317C) |
13339 | { |
13340 | u32 adr, res; |
13341 | u32 src, dst; |
13342 | |
13343 | FETCH_WORD(res); |
13344 | flag_C = 0; |
13345 | flag_V = 0; |
13346 | flag_NotZ = res; |
13347 | flag_N = res >> 8; |
13348 | FETCH_SWORD(adr); |
13349 | adr += AREG((Opcode >> 9) & 7); |
13350 | PRE_IO |
13351 | WRITE_WORD_F(adr, res) |
13352 | POST_IO |
13353 | RET(16) |
13354 | } |
13355 | |
13356 | // MOVEW |
13357 | OPCODE(0x31BC) |
13358 | { |
13359 | u32 adr, res; |
13360 | u32 src, dst; |
13361 | |
13362 | FETCH_WORD(res); |
13363 | flag_C = 0; |
13364 | flag_V = 0; |
13365 | flag_NotZ = res; |
13366 | flag_N = res >> 8; |
13367 | adr = AREG((Opcode >> 9) & 7); |
13368 | DECODE_EXT_WORD |
13369 | PRE_IO |
13370 | WRITE_WORD_F(adr, res) |
13371 | POST_IO |
13372 | RET(18) |
13373 | } |
13374 | |
13375 | // MOVEW |
13376 | OPCODE(0x31FC) |
13377 | { |
13378 | u32 adr, res; |
13379 | u32 src, dst; |
13380 | |
13381 | FETCH_WORD(res); |
13382 | flag_C = 0; |
13383 | flag_V = 0; |
13384 | flag_NotZ = res; |
13385 | flag_N = res >> 8; |
13386 | FETCH_SWORD(adr); |
13387 | PRE_IO |
13388 | WRITE_WORD_F(adr, res) |
13389 | POST_IO |
13390 | RET(16) |
13391 | } |
13392 | |
13393 | // MOVEW |
13394 | OPCODE(0x33FC) |
13395 | { |
13396 | u32 adr, res; |
13397 | u32 src, dst; |
13398 | |
13399 | FETCH_WORD(res); |
13400 | flag_C = 0; |
13401 | flag_V = 0; |
13402 | flag_NotZ = res; |
13403 | flag_N = res >> 8; |
13404 | FETCH_LONG(adr); |
13405 | PRE_IO |
13406 | WRITE_WORD_F(adr, res) |
13407 | POST_IO |
13408 | RET(20) |
13409 | } |
13410 | |
13411 | // MOVEW |
13412 | OPCODE(0x3EFC) |
13413 | { |
13414 | u32 adr, res; |
13415 | u32 src, dst; |
13416 | |
13417 | FETCH_WORD(res); |
13418 | flag_C = 0; |
13419 | flag_V = 0; |
13420 | flag_NotZ = res; |
13421 | flag_N = res >> 8; |
13422 | adr = AREG(7); |
13423 | AREG(7) += 2; |
13424 | PRE_IO |
13425 | WRITE_WORD_F(adr, res) |
13426 | POST_IO |
13427 | RET(12) |
13428 | } |
13429 | |
13430 | // MOVEW |
13431 | OPCODE(0x3F3C) |
13432 | { |
13433 | u32 adr, res; |
13434 | u32 src, dst; |
13435 | |
13436 | FETCH_WORD(res); |
13437 | flag_C = 0; |
13438 | flag_V = 0; |
13439 | flag_NotZ = res; |
13440 | flag_N = res >> 8; |
13441 | adr = AREG(7) - 2; |
13442 | AREG(7) = adr; |
13443 | PRE_IO |
13444 | WRITE_WORD_F(adr, res) |
13445 | POST_IO |
13446 | RET(12) |
13447 | } |
13448 | |
13449 | // MOVEW |
13450 | OPCODE(0x301F) |
13451 | { |
13452 | u32 adr, res; |
13453 | u32 src, dst; |
13454 | |
13455 | adr = AREG(7); |
13456 | AREG(7) += 2; |
13457 | PRE_IO |
13458 | READ_WORD_F(adr, res) |
13459 | flag_C = 0; |
13460 | flag_V = 0; |
13461 | flag_NotZ = res; |
13462 | flag_N = res >> 8; |
13463 | DREGu16((Opcode >> 9) & 7) = res; |
13464 | POST_IO |
13465 | RET(8) |
13466 | } |
13467 | |
13468 | // MOVEW |
13469 | OPCODE(0x309F) |
13470 | { |
13471 | u32 adr, res; |
13472 | u32 src, dst; |
13473 | |
13474 | adr = AREG(7); |
13475 | AREG(7) += 2; |
13476 | PRE_IO |
13477 | READ_WORD_F(adr, res) |
13478 | flag_C = 0; |
13479 | flag_V = 0; |
13480 | flag_NotZ = res; |
13481 | flag_N = res >> 8; |
13482 | adr = AREG((Opcode >> 9) & 7); |
13483 | WRITE_WORD_F(adr, res) |
13484 | POST_IO |
13485 | RET(12) |
13486 | } |
13487 | |
13488 | // MOVEW |
13489 | OPCODE(0x30DF) |
13490 | { |
13491 | u32 adr, res; |
13492 | u32 src, dst; |
13493 | |
13494 | adr = AREG(7); |
13495 | AREG(7) += 2; |
13496 | PRE_IO |
13497 | READ_WORD_F(adr, res) |
13498 | flag_C = 0; |
13499 | flag_V = 0; |
13500 | flag_NotZ = res; |
13501 | flag_N = res >> 8; |
13502 | adr = AREG((Opcode >> 9) & 7); |
13503 | AREG((Opcode >> 9) & 7) += 2; |
13504 | WRITE_WORD_F(adr, res) |
13505 | POST_IO |
13506 | RET(12) |
13507 | } |
13508 | |
13509 | // MOVEW |
13510 | OPCODE(0x311F) |
13511 | { |
13512 | u32 adr, res; |
13513 | u32 src, dst; |
13514 | |
13515 | adr = AREG(7); |
13516 | AREG(7) += 2; |
13517 | PRE_IO |
13518 | READ_WORD_F(adr, res) |
13519 | flag_C = 0; |
13520 | flag_V = 0; |
13521 | flag_NotZ = res; |
13522 | flag_N = res >> 8; |
13523 | adr = AREG((Opcode >> 9) & 7) - 2; |
13524 | AREG((Opcode >> 9) & 7) = adr; |
13525 | WRITE_WORD_F(adr, res) |
13526 | POST_IO |
13527 | RET(12) |
13528 | } |
13529 | |
13530 | // MOVEW |
13531 | OPCODE(0x315F) |
13532 | { |
13533 | u32 adr, res; |
13534 | u32 src, dst; |
13535 | |
13536 | adr = AREG(7); |
13537 | AREG(7) += 2; |
13538 | PRE_IO |
13539 | READ_WORD_F(adr, res) |
13540 | flag_C = 0; |
13541 | flag_V = 0; |
13542 | flag_NotZ = res; |
13543 | flag_N = res >> 8; |
13544 | FETCH_SWORD(adr); |
13545 | adr += AREG((Opcode >> 9) & 7); |
13546 | WRITE_WORD_F(adr, res) |
13547 | POST_IO |
13548 | RET(16) |
13549 | } |
13550 | |
13551 | // MOVEW |
13552 | OPCODE(0x319F) |
13553 | { |
13554 | u32 adr, res; |
13555 | u32 src, dst; |
13556 | |
13557 | adr = AREG(7); |
13558 | AREG(7) += 2; |
13559 | PRE_IO |
13560 | READ_WORD_F(adr, res) |
13561 | flag_C = 0; |
13562 | flag_V = 0; |
13563 | flag_NotZ = res; |
13564 | flag_N = res >> 8; |
13565 | adr = AREG((Opcode >> 9) & 7); |
13566 | DECODE_EXT_WORD |
13567 | WRITE_WORD_F(adr, res) |
13568 | POST_IO |
13569 | RET(18) |
13570 | } |
13571 | |
13572 | // MOVEW |
13573 | OPCODE(0x31DF) |
13574 | { |
13575 | u32 adr, res; |
13576 | u32 src, dst; |
13577 | |
13578 | adr = AREG(7); |
13579 | AREG(7) += 2; |
13580 | PRE_IO |
13581 | READ_WORD_F(adr, res) |
13582 | flag_C = 0; |
13583 | flag_V = 0; |
13584 | flag_NotZ = res; |
13585 | flag_N = res >> 8; |
13586 | FETCH_SWORD(adr); |
13587 | WRITE_WORD_F(adr, res) |
13588 | POST_IO |
13589 | RET(16) |
13590 | } |
13591 | |
13592 | // MOVEW |
13593 | OPCODE(0x33DF) |
13594 | { |
13595 | u32 adr, res; |
13596 | u32 src, dst; |
13597 | |
13598 | adr = AREG(7); |
13599 | AREG(7) += 2; |
13600 | PRE_IO |
13601 | READ_WORD_F(adr, res) |
13602 | flag_C = 0; |
13603 | flag_V = 0; |
13604 | flag_NotZ = res; |
13605 | flag_N = res >> 8; |
13606 | FETCH_LONG(adr); |
13607 | WRITE_WORD_F(adr, res) |
13608 | POST_IO |
13609 | RET(20) |
13610 | } |
13611 | |
13612 | // MOVEW |
13613 | OPCODE(0x3EDF) |
13614 | { |
13615 | u32 adr, res; |
13616 | u32 src, dst; |
13617 | |
13618 | adr = AREG(7); |
13619 | AREG(7) += 2; |
13620 | PRE_IO |
13621 | READ_WORD_F(adr, res) |
13622 | flag_C = 0; |
13623 | flag_V = 0; |
13624 | flag_NotZ = res; |
13625 | flag_N = res >> 8; |
13626 | adr = AREG(7); |
13627 | AREG(7) += 2; |
13628 | WRITE_WORD_F(adr, res) |
13629 | POST_IO |
13630 | RET(12) |
13631 | } |
13632 | |
13633 | // MOVEW |
13634 | OPCODE(0x3F1F) |
13635 | { |
13636 | u32 adr, res; |
13637 | u32 src, dst; |
13638 | |
13639 | adr = AREG(7); |
13640 | AREG(7) += 2; |
13641 | PRE_IO |
13642 | READ_WORD_F(adr, res) |
13643 | flag_C = 0; |
13644 | flag_V = 0; |
13645 | flag_NotZ = res; |
13646 | flag_N = res >> 8; |
13647 | adr = AREG(7) - 2; |
13648 | AREG(7) = adr; |
13649 | WRITE_WORD_F(adr, res) |
13650 | POST_IO |
13651 | RET(12) |
13652 | } |
13653 | |
13654 | // MOVEW |
13655 | OPCODE(0x3027) |
13656 | { |
13657 | u32 adr, res; |
13658 | u32 src, dst; |
13659 | |
13660 | adr = AREG(7) - 2; |
13661 | AREG(7) = adr; |
13662 | PRE_IO |
13663 | READ_WORD_F(adr, res) |
13664 | flag_C = 0; |
13665 | flag_V = 0; |
13666 | flag_NotZ = res; |
13667 | flag_N = res >> 8; |
13668 | DREGu16((Opcode >> 9) & 7) = res; |
13669 | POST_IO |
13670 | RET(10) |
13671 | } |
13672 | |
13673 | // MOVEW |
13674 | OPCODE(0x30A7) |
13675 | { |
13676 | u32 adr, res; |
13677 | u32 src, dst; |
13678 | |
13679 | adr = AREG(7) - 2; |
13680 | AREG(7) = adr; |
13681 | PRE_IO |
13682 | READ_WORD_F(adr, res) |
13683 | flag_C = 0; |
13684 | flag_V = 0; |
13685 | flag_NotZ = res; |
13686 | flag_N = res >> 8; |
13687 | adr = AREG((Opcode >> 9) & 7); |
13688 | WRITE_WORD_F(adr, res) |
13689 | POST_IO |
13690 | RET(14) |
13691 | } |
13692 | |
13693 | // MOVEW |
13694 | OPCODE(0x30E7) |
13695 | { |
13696 | u32 adr, res; |
13697 | u32 src, dst; |
13698 | |
13699 | adr = AREG(7) - 2; |
13700 | AREG(7) = adr; |
13701 | PRE_IO |
13702 | READ_WORD_F(adr, res) |
13703 | flag_C = 0; |
13704 | flag_V = 0; |
13705 | flag_NotZ = res; |
13706 | flag_N = res >> 8; |
13707 | adr = AREG((Opcode >> 9) & 7); |
13708 | AREG((Opcode >> 9) & 7) += 2; |
13709 | WRITE_WORD_F(adr, res) |
13710 | POST_IO |
13711 | RET(14) |
13712 | } |
13713 | |
13714 | // MOVEW |
13715 | OPCODE(0x3127) |
13716 | { |
13717 | u32 adr, res; |
13718 | u32 src, dst; |
13719 | |
13720 | adr = AREG(7) - 2; |
13721 | AREG(7) = adr; |
13722 | PRE_IO |
13723 | READ_WORD_F(adr, res) |
13724 | flag_C = 0; |
13725 | flag_V = 0; |
13726 | flag_NotZ = res; |
13727 | flag_N = res >> 8; |
13728 | adr = AREG((Opcode >> 9) & 7) - 2; |
13729 | AREG((Opcode >> 9) & 7) = adr; |
13730 | WRITE_WORD_F(adr, res) |
13731 | POST_IO |
13732 | RET(14) |
13733 | } |
13734 | |
13735 | // MOVEW |
13736 | OPCODE(0x3167) |
13737 | { |
13738 | u32 adr, res; |
13739 | u32 src, dst; |
13740 | |
13741 | adr = AREG(7) - 2; |
13742 | AREG(7) = adr; |
13743 | PRE_IO |
13744 | READ_WORD_F(adr, res) |
13745 | flag_C = 0; |
13746 | flag_V = 0; |
13747 | flag_NotZ = res; |
13748 | flag_N = res >> 8; |
13749 | FETCH_SWORD(adr); |
13750 | adr += AREG((Opcode >> 9) & 7); |
13751 | WRITE_WORD_F(adr, res) |
13752 | POST_IO |
13753 | RET(18) |
13754 | } |
13755 | |
13756 | // MOVEW |
13757 | OPCODE(0x31A7) |
13758 | { |
13759 | u32 adr, res; |
13760 | u32 src, dst; |
13761 | |
13762 | adr = AREG(7) - 2; |
13763 | AREG(7) = adr; |
13764 | PRE_IO |
13765 | READ_WORD_F(adr, res) |
13766 | flag_C = 0; |
13767 | flag_V = 0; |
13768 | flag_NotZ = res; |
13769 | flag_N = res >> 8; |
13770 | adr = AREG((Opcode >> 9) & 7); |
13771 | DECODE_EXT_WORD |
13772 | WRITE_WORD_F(adr, res) |
13773 | POST_IO |
13774 | RET(20) |
13775 | } |
13776 | |
13777 | // MOVEW |
13778 | OPCODE(0x31E7) |
13779 | { |
13780 | u32 adr, res; |
13781 | u32 src, dst; |
13782 | |
13783 | adr = AREG(7) - 2; |
13784 | AREG(7) = adr; |
13785 | PRE_IO |
13786 | READ_WORD_F(adr, res) |
13787 | flag_C = 0; |
13788 | flag_V = 0; |
13789 | flag_NotZ = res; |
13790 | flag_N = res >> 8; |
13791 | FETCH_SWORD(adr); |
13792 | WRITE_WORD_F(adr, res) |
13793 | POST_IO |
13794 | RET(18) |
13795 | } |
13796 | |
13797 | // MOVEW |
13798 | OPCODE(0x33E7) |
13799 | { |
13800 | u32 adr, res; |
13801 | u32 src, dst; |
13802 | |
13803 | adr = AREG(7) - 2; |
13804 | AREG(7) = adr; |
13805 | PRE_IO |
13806 | READ_WORD_F(adr, res) |
13807 | flag_C = 0; |
13808 | flag_V = 0; |
13809 | flag_NotZ = res; |
13810 | flag_N = res >> 8; |
13811 | FETCH_LONG(adr); |
13812 | WRITE_WORD_F(adr, res) |
13813 | POST_IO |
13814 | RET(22) |
13815 | } |
13816 | |
13817 | // MOVEW |
13818 | OPCODE(0x3EE7) |
13819 | { |
13820 | u32 adr, res; |
13821 | u32 src, dst; |
13822 | |
13823 | adr = AREG(7) - 2; |
13824 | AREG(7) = adr; |
13825 | PRE_IO |
13826 | READ_WORD_F(adr, res) |
13827 | flag_C = 0; |
13828 | flag_V = 0; |
13829 | flag_NotZ = res; |
13830 | flag_N = res >> 8; |
13831 | adr = AREG(7); |
13832 | AREG(7) += 2; |
13833 | WRITE_WORD_F(adr, res) |
13834 | POST_IO |
13835 | RET(14) |
13836 | } |
13837 | |
13838 | // MOVEW |
13839 | OPCODE(0x3F27) |
13840 | { |
13841 | u32 adr, res; |
13842 | u32 src, dst; |
13843 | |
13844 | adr = AREG(7) - 2; |
13845 | AREG(7) = adr; |
13846 | PRE_IO |
13847 | READ_WORD_F(adr, res) |
13848 | flag_C = 0; |
13849 | flag_V = 0; |
13850 | flag_NotZ = res; |
13851 | flag_N = res >> 8; |
13852 | adr = AREG(7) - 2; |
13853 | AREG(7) = adr; |
13854 | WRITE_WORD_F(adr, res) |
13855 | POST_IO |
13856 | RET(14) |
13857 | } |
13858 | |
13859 | // MOVEAW |
13860 | OPCODE(0x3040) |
13861 | { |
13862 | u32 adr, res; |
13863 | u32 src, dst; |
13864 | |
13865 | res = (s32)DREGs16((Opcode >> 0) & 7); |
13866 | AREG((Opcode >> 9) & 7) = res; |
13867 | RET(4) |
13868 | } |
13869 | |
13870 | // MOVEAW |
13871 | OPCODE(0x3048) |
13872 | { |
13873 | u32 adr, res; |
13874 | u32 src, dst; |
13875 | |
13876 | res = (s32)AREGs16((Opcode >> 0) & 7); |
13877 | AREG((Opcode >> 9) & 7) = res; |
13878 | RET(4) |
13879 | } |
13880 | |
13881 | // MOVEAW |
13882 | OPCODE(0x3050) |
13883 | { |
13884 | u32 adr, res; |
13885 | u32 src, dst; |
13886 | |
13887 | adr = AREG((Opcode >> 0) & 7); |
13888 | PRE_IO |
13889 | READSX_WORD_F(adr, res) |
13890 | AREG((Opcode >> 9) & 7) = res; |
13891 | POST_IO |
13892 | RET(8) |
13893 | } |
13894 | |
13895 | // MOVEAW |
13896 | OPCODE(0x3058) |
13897 | { |
13898 | u32 adr, res; |
13899 | u32 src, dst; |
13900 | |
13901 | adr = AREG((Opcode >> 0) & 7); |
13902 | AREG((Opcode >> 0) & 7) += 2; |
13903 | PRE_IO |
13904 | READSX_WORD_F(adr, res) |
13905 | AREG((Opcode >> 9) & 7) = res; |
13906 | POST_IO |
13907 | RET(8) |
13908 | } |
13909 | |
13910 | // MOVEAW |
13911 | OPCODE(0x3060) |
13912 | { |
13913 | u32 adr, res; |
13914 | u32 src, dst; |
13915 | |
13916 | adr = AREG((Opcode >> 0) & 7) - 2; |
13917 | AREG((Opcode >> 0) & 7) = adr; |
13918 | PRE_IO |
13919 | READSX_WORD_F(adr, res) |
13920 | AREG((Opcode >> 9) & 7) = res; |
13921 | POST_IO |
13922 | RET(10) |
13923 | } |
13924 | |
13925 | // MOVEAW |
13926 | OPCODE(0x3068) |
13927 | { |
13928 | u32 adr, res; |
13929 | u32 src, dst; |
13930 | |
13931 | FETCH_SWORD(adr); |
13932 | adr += AREG((Opcode >> 0) & 7); |
13933 | PRE_IO |
13934 | READSX_WORD_F(adr, res) |
13935 | AREG((Opcode >> 9) & 7) = res; |
13936 | POST_IO |
13937 | RET(12) |
13938 | } |
13939 | |
13940 | // MOVEAW |
13941 | OPCODE(0x3070) |
13942 | { |
13943 | u32 adr, res; |
13944 | u32 src, dst; |
13945 | |
13946 | adr = AREG((Opcode >> 0) & 7); |
13947 | DECODE_EXT_WORD |
13948 | PRE_IO |
13949 | READSX_WORD_F(adr, res) |
13950 | AREG((Opcode >> 9) & 7) = res; |
13951 | POST_IO |
13952 | RET(14) |
13953 | } |
13954 | |
13955 | // MOVEAW |
13956 | OPCODE(0x3078) |
13957 | { |
13958 | u32 adr, res; |
13959 | u32 src, dst; |
13960 | |
13961 | FETCH_SWORD(adr); |
13962 | PRE_IO |
13963 | READSX_WORD_F(adr, res) |
13964 | AREG((Opcode >> 9) & 7) = res; |
13965 | POST_IO |
13966 | RET(12) |
13967 | } |
13968 | |
13969 | // MOVEAW |
13970 | OPCODE(0x3079) |
13971 | { |
13972 | u32 adr, res; |
13973 | u32 src, dst; |
13974 | |
13975 | FETCH_LONG(adr); |
13976 | PRE_IO |
13977 | READSX_WORD_F(adr, res) |
13978 | AREG((Opcode >> 9) & 7) = res; |
13979 | POST_IO |
13980 | RET(16) |
13981 | } |
13982 | |
13983 | // MOVEAW |
13984 | OPCODE(0x307A) |
13985 | { |
13986 | u32 adr, res; |
13987 | u32 src, dst; |
13988 | |
13989 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13990 | PC++; |
13991 | PRE_IO |
13992 | READSX_WORD_F(adr, res) |
13993 | AREG((Opcode >> 9) & 7) = res; |
13994 | POST_IO |
13995 | RET(12) |
13996 | } |
13997 | |
13998 | // MOVEAW |
13999 | OPCODE(0x307B) |
14000 | { |
14001 | u32 adr, res; |
14002 | u32 src, dst; |
14003 | |
14004 | adr = (u32)(PC) - BasePC; |
14005 | DECODE_EXT_WORD |
14006 | PRE_IO |
14007 | READSX_WORD_F(adr, res) |
14008 | AREG((Opcode >> 9) & 7) = res; |
14009 | POST_IO |
14010 | RET(14) |
14011 | } |
14012 | |
14013 | // MOVEAW |
14014 | OPCODE(0x307C) |
14015 | { |
14016 | u32 adr, res; |
14017 | u32 src, dst; |
14018 | |
14019 | FETCH_SWORD(res); |
14020 | AREG((Opcode >> 9) & 7) = res; |
14021 | RET(8) |
14022 | } |
14023 | |
14024 | // MOVEAW |
14025 | OPCODE(0x305F) |
14026 | { |
14027 | u32 adr, res; |
14028 | u32 src, dst; |
14029 | |
14030 | adr = AREG(7); |
14031 | AREG(7) += 2; |
14032 | PRE_IO |
14033 | READSX_WORD_F(adr, res) |
14034 | AREG((Opcode >> 9) & 7) = res; |
14035 | POST_IO |
14036 | RET(8) |
14037 | } |
14038 | |
14039 | // MOVEAW |
14040 | OPCODE(0x3067) |
14041 | { |
14042 | u32 adr, res; |
14043 | u32 src, dst; |
14044 | |
14045 | adr = AREG(7) - 2; |
14046 | AREG(7) = adr; |
14047 | PRE_IO |
14048 | READSX_WORD_F(adr, res) |
14049 | AREG((Opcode >> 9) & 7) = res; |
14050 | POST_IO |
14051 | RET(10) |
14052 | } |
14053 | |
14054 | // NEGX |
14055 | OPCODE(0x4000) |
14056 | { |
14057 | u32 adr, res; |
14058 | u32 src, dst; |
14059 | |
14060 | src = DREGu8((Opcode >> 0) & 7); |
14061 | res = -src - ((flag_X >> 8) & 1); |
14062 | flag_V = res & src; |
14063 | flag_N = flag_X = flag_C = res; |
14064 | flag_NotZ |= res & 0xFF; |
14065 | DREGu8((Opcode >> 0) & 7) = res; |
14066 | RET(4) |
14067 | } |
14068 | |
14069 | // NEGX |
14070 | OPCODE(0x4010) |
14071 | { |
14072 | u32 adr, res; |
14073 | u32 src, dst; |
14074 | |
14075 | adr = AREG((Opcode >> 0) & 7); |
14076 | PRE_IO |
14077 | READ_BYTE_F(adr, src) |
14078 | res = -src - ((flag_X >> 8) & 1); |
14079 | flag_V = res & src; |
14080 | flag_N = flag_X = flag_C = res; |
14081 | flag_NotZ |= res & 0xFF; |
14082 | WRITE_BYTE_F(adr, res) |
14083 | POST_IO |
14084 | RET(12) |
14085 | } |
14086 | |
14087 | // NEGX |
14088 | OPCODE(0x4018) |
14089 | { |
14090 | u32 adr, res; |
14091 | u32 src, dst; |
14092 | |
14093 | adr = AREG((Opcode >> 0) & 7); |
14094 | AREG((Opcode >> 0) & 7) += 1; |
14095 | PRE_IO |
14096 | READ_BYTE_F(adr, src) |
14097 | res = -src - ((flag_X >> 8) & 1); |
14098 | flag_V = res & src; |
14099 | flag_N = flag_X = flag_C = res; |
14100 | flag_NotZ |= res & 0xFF; |
14101 | WRITE_BYTE_F(adr, res) |
14102 | POST_IO |
14103 | RET(12) |
14104 | } |
14105 | |
14106 | // NEGX |
14107 | OPCODE(0x4020) |
14108 | { |
14109 | u32 adr, res; |
14110 | u32 src, dst; |
14111 | |
14112 | adr = AREG((Opcode >> 0) & 7) - 1; |
14113 | AREG((Opcode >> 0) & 7) = adr; |
14114 | PRE_IO |
14115 | READ_BYTE_F(adr, src) |
14116 | res = -src - ((flag_X >> 8) & 1); |
14117 | flag_V = res & src; |
14118 | flag_N = flag_X = flag_C = res; |
14119 | flag_NotZ |= res & 0xFF; |
14120 | WRITE_BYTE_F(adr, res) |
14121 | POST_IO |
14122 | RET(14) |
14123 | } |
14124 | |
14125 | // NEGX |
14126 | OPCODE(0x4028) |
14127 | { |
14128 | u32 adr, res; |
14129 | u32 src, dst; |
14130 | |
14131 | FETCH_SWORD(adr); |
14132 | adr += AREG((Opcode >> 0) & 7); |
14133 | PRE_IO |
14134 | READ_BYTE_F(adr, src) |
14135 | res = -src - ((flag_X >> 8) & 1); |
14136 | flag_V = res & src; |
14137 | flag_N = flag_X = flag_C = res; |
14138 | flag_NotZ |= res & 0xFF; |
14139 | WRITE_BYTE_F(adr, res) |
14140 | POST_IO |
14141 | RET(16) |
14142 | } |
14143 | |
14144 | // NEGX |
14145 | OPCODE(0x4030) |
14146 | { |
14147 | u32 adr, res; |
14148 | u32 src, dst; |
14149 | |
14150 | adr = AREG((Opcode >> 0) & 7); |
14151 | DECODE_EXT_WORD |
14152 | PRE_IO |
14153 | READ_BYTE_F(adr, src) |
14154 | res = -src - ((flag_X >> 8) & 1); |
14155 | flag_V = res & src; |
14156 | flag_N = flag_X = flag_C = res; |
14157 | flag_NotZ |= res & 0xFF; |
14158 | WRITE_BYTE_F(adr, res) |
14159 | POST_IO |
14160 | RET(18) |
14161 | } |
14162 | |
14163 | // NEGX |
14164 | OPCODE(0x4038) |
14165 | { |
14166 | u32 adr, res; |
14167 | u32 src, dst; |
14168 | |
14169 | FETCH_SWORD(adr); |
14170 | PRE_IO |
14171 | READ_BYTE_F(adr, src) |
14172 | res = -src - ((flag_X >> 8) & 1); |
14173 | flag_V = res & src; |
14174 | flag_N = flag_X = flag_C = res; |
14175 | flag_NotZ |= res & 0xFF; |
14176 | WRITE_BYTE_F(adr, res) |
14177 | POST_IO |
14178 | RET(16) |
14179 | } |
14180 | |
14181 | // NEGX |
14182 | OPCODE(0x4039) |
14183 | { |
14184 | u32 adr, res; |
14185 | u32 src, dst; |
14186 | |
14187 | FETCH_LONG(adr); |
14188 | PRE_IO |
14189 | READ_BYTE_F(adr, src) |
14190 | res = -src - ((flag_X >> 8) & 1); |
14191 | flag_V = res & src; |
14192 | flag_N = flag_X = flag_C = res; |
14193 | flag_NotZ |= res & 0xFF; |
14194 | WRITE_BYTE_F(adr, res) |
14195 | POST_IO |
14196 | RET(20) |
14197 | } |
14198 | |
14199 | // NEGX |
14200 | OPCODE(0x401F) |
14201 | { |
14202 | u32 adr, res; |
14203 | u32 src, dst; |
14204 | |
14205 | adr = AREG(7); |
14206 | AREG(7) += 2; |
14207 | PRE_IO |
14208 | READ_BYTE_F(adr, src) |
14209 | res = -src - ((flag_X >> 8) & 1); |
14210 | flag_V = res & src; |
14211 | flag_N = flag_X = flag_C = res; |
14212 | flag_NotZ |= res & 0xFF; |
14213 | WRITE_BYTE_F(adr, res) |
14214 | POST_IO |
14215 | RET(12) |
14216 | } |
14217 | |
14218 | // NEGX |
14219 | OPCODE(0x4027) |
14220 | { |
14221 | u32 adr, res; |
14222 | u32 src, dst; |
14223 | |
14224 | adr = AREG(7) - 2; |
14225 | AREG(7) = adr; |
14226 | PRE_IO |
14227 | READ_BYTE_F(adr, src) |
14228 | res = -src - ((flag_X >> 8) & 1); |
14229 | flag_V = res & src; |
14230 | flag_N = flag_X = flag_C = res; |
14231 | flag_NotZ |= res & 0xFF; |
14232 | WRITE_BYTE_F(adr, res) |
14233 | POST_IO |
14234 | RET(14) |
14235 | } |
14236 | |
14237 | // NEGX |
14238 | OPCODE(0x4040) |
14239 | { |
14240 | u32 adr, res; |
14241 | u32 src, dst; |
14242 | |
14243 | src = DREGu16((Opcode >> 0) & 7); |
14244 | res = -src - ((flag_X >> 8) & 1); |
14245 | flag_V = (res & src) >> 8; |
14246 | flag_N = flag_X = flag_C = res >> 8; |
14247 | flag_NotZ |= res & 0xFFFF; |
14248 | DREGu16((Opcode >> 0) & 7) = res; |
14249 | RET(4) |
14250 | } |
14251 | |
14252 | // NEGX |
14253 | OPCODE(0x4050) |
14254 | { |
14255 | u32 adr, res; |
14256 | u32 src, dst; |
14257 | |
14258 | adr = AREG((Opcode >> 0) & 7); |
14259 | PRE_IO |
14260 | READ_WORD_F(adr, src) |
14261 | res = -src - ((flag_X >> 8) & 1); |
14262 | flag_V = (res & src) >> 8; |
14263 | flag_N = flag_X = flag_C = res >> 8; |
14264 | flag_NotZ |= res & 0xFFFF; |
14265 | WRITE_WORD_F(adr, res) |
14266 | POST_IO |
14267 | RET(12) |
14268 | } |
14269 | |
14270 | // NEGX |
14271 | OPCODE(0x4058) |
14272 | { |
14273 | u32 adr, res; |
14274 | u32 src, dst; |
14275 | |
14276 | adr = AREG((Opcode >> 0) & 7); |
14277 | AREG((Opcode >> 0) & 7) += 2; |
14278 | PRE_IO |
14279 | READ_WORD_F(adr, src) |
14280 | res = -src - ((flag_X >> 8) & 1); |
14281 | flag_V = (res & src) >> 8; |
14282 | flag_N = flag_X = flag_C = res >> 8; |
14283 | flag_NotZ |= res & 0xFFFF; |
14284 | WRITE_WORD_F(adr, res) |
14285 | POST_IO |
14286 | RET(12) |
14287 | } |
14288 | |
14289 | // NEGX |
14290 | OPCODE(0x4060) |
14291 | { |
14292 | u32 adr, res; |
14293 | u32 src, dst; |
14294 | |
14295 | adr = AREG((Opcode >> 0) & 7) - 2; |
14296 | AREG((Opcode >> 0) & 7) = adr; |
14297 | PRE_IO |
14298 | READ_WORD_F(adr, src) |
14299 | res = -src - ((flag_X >> 8) & 1); |
14300 | flag_V = (res & src) >> 8; |
14301 | flag_N = flag_X = flag_C = res >> 8; |
14302 | flag_NotZ |= res & 0xFFFF; |
14303 | WRITE_WORD_F(adr, res) |
14304 | POST_IO |
14305 | RET(14) |
14306 | } |
14307 | |
14308 | // NEGX |
14309 | OPCODE(0x4068) |
14310 | { |
14311 | u32 adr, res; |
14312 | u32 src, dst; |
14313 | |
14314 | FETCH_SWORD(adr); |
14315 | adr += AREG((Opcode >> 0) & 7); |
14316 | PRE_IO |
14317 | READ_WORD_F(adr, src) |
14318 | res = -src - ((flag_X >> 8) & 1); |
14319 | flag_V = (res & src) >> 8; |
14320 | flag_N = flag_X = flag_C = res >> 8; |
14321 | flag_NotZ |= res & 0xFFFF; |
14322 | WRITE_WORD_F(adr, res) |
14323 | POST_IO |
14324 | RET(16) |
14325 | } |
14326 | |
14327 | // NEGX |
14328 | OPCODE(0x4070) |
14329 | { |
14330 | u32 adr, res; |
14331 | u32 src, dst; |
14332 | |
14333 | adr = AREG((Opcode >> 0) & 7); |
14334 | DECODE_EXT_WORD |
14335 | PRE_IO |
14336 | READ_WORD_F(adr, src) |
14337 | res = -src - ((flag_X >> 8) & 1); |
14338 | flag_V = (res & src) >> 8; |
14339 | flag_N = flag_X = flag_C = res >> 8; |
14340 | flag_NotZ |= res & 0xFFFF; |
14341 | WRITE_WORD_F(adr, res) |
14342 | POST_IO |
14343 | RET(18) |
14344 | } |
14345 | |
14346 | // NEGX |
14347 | OPCODE(0x4078) |
14348 | { |
14349 | u32 adr, res; |
14350 | u32 src, dst; |
14351 | |
14352 | FETCH_SWORD(adr); |
14353 | PRE_IO |
14354 | READ_WORD_F(adr, src) |
14355 | res = -src - ((flag_X >> 8) & 1); |
14356 | flag_V = (res & src) >> 8; |
14357 | flag_N = flag_X = flag_C = res >> 8; |
14358 | flag_NotZ |= res & 0xFFFF; |
14359 | WRITE_WORD_F(adr, res) |
14360 | POST_IO |
14361 | RET(16) |
14362 | } |
14363 | |
14364 | // NEGX |
14365 | OPCODE(0x4079) |
14366 | { |
14367 | u32 adr, res; |
14368 | u32 src, dst; |
14369 | |
14370 | FETCH_LONG(adr); |
14371 | PRE_IO |
14372 | READ_WORD_F(adr, src) |
14373 | res = -src - ((flag_X >> 8) & 1); |
14374 | flag_V = (res & src) >> 8; |
14375 | flag_N = flag_X = flag_C = res >> 8; |
14376 | flag_NotZ |= res & 0xFFFF; |
14377 | WRITE_WORD_F(adr, res) |
14378 | POST_IO |
14379 | RET(20) |
14380 | } |
14381 | |
14382 | // NEGX |
14383 | OPCODE(0x405F) |
14384 | { |
14385 | u32 adr, res; |
14386 | u32 src, dst; |
14387 | |
14388 | adr = AREG(7); |
14389 | AREG(7) += 2; |
14390 | PRE_IO |
14391 | READ_WORD_F(adr, src) |
14392 | res = -src - ((flag_X >> 8) & 1); |
14393 | flag_V = (res & src) >> 8; |
14394 | flag_N = flag_X = flag_C = res >> 8; |
14395 | flag_NotZ |= res & 0xFFFF; |
14396 | WRITE_WORD_F(adr, res) |
14397 | POST_IO |
14398 | RET(12) |
14399 | } |
14400 | |
14401 | // NEGX |
14402 | OPCODE(0x4067) |
14403 | { |
14404 | u32 adr, res; |
14405 | u32 src, dst; |
14406 | |
14407 | adr = AREG(7) - 2; |
14408 | AREG(7) = adr; |
14409 | PRE_IO |
14410 | READ_WORD_F(adr, src) |
14411 | res = -src - ((flag_X >> 8) & 1); |
14412 | flag_V = (res & src) >> 8; |
14413 | flag_N = flag_X = flag_C = res >> 8; |
14414 | flag_NotZ |= res & 0xFFFF; |
14415 | WRITE_WORD_F(adr, res) |
14416 | POST_IO |
14417 | RET(14) |
14418 | } |
14419 | |
14420 | // NEGX |
14421 | OPCODE(0x4080) |
14422 | { |
14423 | u32 adr, res; |
14424 | u32 src, dst; |
14425 | |
14426 | src = DREGu32((Opcode >> 0) & 7); |
14427 | res = -src - ((flag_X >> 8) & 1); |
14428 | flag_NotZ |= res; |
14429 | flag_V = (res & src) >> 24; |
14430 | flag_X = flag_C = (res?1:0)<<8; |
14431 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14432 | flag_N = res >> 24; |
14433 | DREGu32((Opcode >> 0) & 7) = res; |
14434 | RET(6) |
14435 | } |
14436 | |
14437 | // NEGX |
14438 | OPCODE(0x4090) |
14439 | { |
14440 | u32 adr, res; |
14441 | u32 src, dst; |
14442 | |
14443 | adr = AREG((Opcode >> 0) & 7); |
14444 | PRE_IO |
14445 | READ_LONG_F(adr, src) |
14446 | res = -src - ((flag_X >> 8) & 1); |
14447 | flag_NotZ |= res; |
14448 | flag_V = (res & src) >> 24; |
14449 | flag_X = flag_C = (res?1:0)<<8; |
14450 | // flag_X = flag_C = ((src & res & 1) | (src >> 1) | (res >> 1)) >> 23; |
14451 | flag_N = res >> 24; |
14452 | WRITE_LONG_F(adr, res) |
14453 | POST_IO |
14454 | RET(20) |
14455 | } |
14456 | |
14457 | // NEGX |
14458 | OPCODE(0x4098) |
14459 | { |
14460 | u32 adr, res; |
14461 | u32 src, dst; |
14462 | |
14463 | adr = AREG((Opcode >> 0) & 7); |
14464 | AREG((Opcode >> 0) & 7) += 4; |
14465 | PRE_IO |
14466 | READ_LONG_F(adr, src) |
14467 | res = -src - ((flag_X >> 8) & 1); |
14468 | flag_NotZ |= res; |
14469 | flag_V = (res & src) >> 24; |
14470 | flag_X = flag_C = (res?1:0)<<8; |
14471 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14472 | flag_N = res >> 24; |
14473 | WRITE_LONG_F(adr, res) |
14474 | POST_IO |
14475 | RET(20) |
14476 | } |
14477 | |
14478 | // NEGX |
14479 | OPCODE(0x40A0) |
14480 | { |
14481 | u32 adr, res; |
14482 | u32 src, dst; |
14483 | |
14484 | adr = AREG((Opcode >> 0) & 7) - 4; |
14485 | AREG((Opcode >> 0) & 7) = adr; |
14486 | PRE_IO |
14487 | READ_LONG_F(adr, src) |
14488 | res = -src - ((flag_X >> 8) & 1); |
14489 | flag_NotZ |= res; |
14490 | flag_V = (res & src) >> 24; |
14491 | flag_X = flag_C = (res?1:0)<<8; |
14492 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14493 | flag_N = res >> 24; |
14494 | WRITE_LONG_F(adr, res) |
14495 | POST_IO |
14496 | RET(22) |
14497 | } |
14498 | |
14499 | // NEGX |
14500 | OPCODE(0x40A8) |
14501 | { |
14502 | u32 adr, res; |
14503 | u32 src, dst; |
14504 | |
14505 | FETCH_SWORD(adr); |
14506 | adr += AREG((Opcode >> 0) & 7); |
14507 | PRE_IO |
14508 | READ_LONG_F(adr, src) |
14509 | res = -src - ((flag_X >> 8) & 1); |
14510 | flag_NotZ |= res; |
14511 | flag_V = (res & src) >> 24; |
14512 | flag_X = flag_C = (res?1:0)<<8; |
14513 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14514 | flag_N = res >> 24; |
14515 | WRITE_LONG_F(adr, res) |
14516 | POST_IO |
14517 | RET(24) |
14518 | } |
14519 | |
14520 | // NEGX |
14521 | OPCODE(0x40B0) |
14522 | { |
14523 | u32 adr, res; |
14524 | u32 src, dst; |
14525 | |
14526 | adr = AREG((Opcode >> 0) & 7); |
14527 | DECODE_EXT_WORD |
14528 | PRE_IO |
14529 | READ_LONG_F(adr, src) |
14530 | res = -src - ((flag_X >> 8) & 1); |
14531 | flag_NotZ |= res; |
14532 | flag_V = (res & src) >> 24; |
14533 | flag_X = flag_C = (res?1:0)<<8; |
14534 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14535 | flag_N = res >> 24; |
14536 | WRITE_LONG_F(adr, res) |
14537 | POST_IO |
14538 | RET(26) |
14539 | } |
14540 | |
14541 | // NEGX |
14542 | OPCODE(0x40B8) |
14543 | { |
14544 | u32 adr, res; |
14545 | u32 src, dst; |
14546 | |
14547 | FETCH_SWORD(adr); |
14548 | PRE_IO |
14549 | READ_LONG_F(adr, src) |
14550 | res = -src - ((flag_X >> 8) & 1); |
14551 | flag_NotZ |= res; |
14552 | flag_V = (res & src) >> 24; |
14553 | flag_X = flag_C = (res?1:0)<<8; |
14554 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14555 | flag_N = res >> 24; |
14556 | WRITE_LONG_F(adr, res) |
14557 | POST_IO |
14558 | RET(24) |
14559 | } |
14560 | |
14561 | // NEGX |
14562 | OPCODE(0x40B9) |
14563 | { |
14564 | u32 adr, res; |
14565 | u32 src, dst; |
14566 | |
14567 | FETCH_LONG(adr); |
14568 | PRE_IO |
14569 | READ_LONG_F(adr, src) |
14570 | res = -src - ((flag_X >> 8) & 1); |
14571 | flag_NotZ |= res; |
14572 | flag_V = (res & src) >> 24; |
14573 | flag_X = flag_C = (res?1:0)<<8; |
14574 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14575 | flag_N = res >> 24; |
14576 | WRITE_LONG_F(adr, res) |
14577 | POST_IO |
14578 | RET(28) |
14579 | } |
14580 | |
14581 | // NEGX |
14582 | OPCODE(0x409F) |
14583 | { |
14584 | u32 adr, res; |
14585 | u32 src, dst; |
14586 | |
14587 | adr = AREG(7); |
14588 | AREG(7) += 4; |
14589 | PRE_IO |
14590 | READ_LONG_F(adr, src) |
14591 | res = -src - ((flag_X >> 8) & 1); |
14592 | flag_NotZ |= res; |
14593 | flag_V = (res & src) >> 24; |
14594 | flag_X = flag_C = (res?1:0)<<8; |
14595 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14596 | flag_N = res >> 24; |
14597 | WRITE_LONG_F(adr, res) |
14598 | POST_IO |
14599 | RET(20) |
14600 | } |
14601 | |
14602 | // NEGX |
14603 | OPCODE(0x40A7) |
14604 | { |
14605 | u32 adr, res; |
14606 | u32 src, dst; |
14607 | |
14608 | adr = AREG(7) - 4; |
14609 | AREG(7) = adr; |
14610 | PRE_IO |
14611 | READ_LONG_F(adr, src) |
14612 | res = -src - ((flag_X >> 8) & 1); |
14613 | flag_NotZ |= res; |
14614 | flag_V = (res & src) >> 24; |
14615 | flag_X = flag_C = (res?1:0)<<8; |
14616 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14617 | flag_N = res >> 24; |
14618 | WRITE_LONG_F(adr, res) |
14619 | POST_IO |
14620 | RET(22) |
14621 | } |
14622 | |
14623 | // CLR |
14624 | OPCODE(0x4200) |
14625 | { |
14626 | u32 adr, res; |
14627 | u32 src, dst; |
14628 | |
14629 | res = 0; |
14630 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14631 | DREGu8((Opcode >> 0) & 7) = res; |
14632 | RET(4) |
14633 | } |
14634 | |
14635 | // CLR |
14636 | OPCODE(0x4210) |
14637 | { |
14638 | u32 adr, res; |
14639 | u32 src, dst; |
14640 | |
14641 | adr = AREG((Opcode >> 0) & 7); |
14642 | res = 0; |
14643 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14644 | PRE_IO |
14645 | WRITE_BYTE_F(adr, res) |
14646 | POST_IO |
14647 | RET(12) |
14648 | } |
14649 | |
14650 | // CLR |
14651 | OPCODE(0x4218) |
14652 | { |
14653 | u32 adr, res; |
14654 | u32 src, dst; |
14655 | |
14656 | adr = AREG((Opcode >> 0) & 7); |
14657 | AREG((Opcode >> 0) & 7) += 1; |
14658 | res = 0; |
14659 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14660 | PRE_IO |
14661 | WRITE_BYTE_F(adr, res) |
14662 | POST_IO |
14663 | RET(12) |
14664 | } |
14665 | |
14666 | // CLR |
14667 | OPCODE(0x4220) |
14668 | { |
14669 | u32 adr, res; |
14670 | u32 src, dst; |
14671 | |
14672 | adr = AREG((Opcode >> 0) & 7) - 1; |
14673 | AREG((Opcode >> 0) & 7) = adr; |
14674 | res = 0; |
14675 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14676 | PRE_IO |
14677 | WRITE_BYTE_F(adr, res) |
14678 | POST_IO |
14679 | RET(14) |
14680 | } |
14681 | |
14682 | // CLR |
14683 | OPCODE(0x4228) |
14684 | { |
14685 | u32 adr, res; |
14686 | u32 src, dst; |
14687 | |
14688 | FETCH_SWORD(adr); |
14689 | adr += AREG((Opcode >> 0) & 7); |
14690 | res = 0; |
14691 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14692 | PRE_IO |
14693 | WRITE_BYTE_F(adr, res) |
14694 | POST_IO |
14695 | RET(16) |
14696 | } |
14697 | |
14698 | // CLR |
14699 | OPCODE(0x4230) |
14700 | { |
14701 | u32 adr, res; |
14702 | u32 src, dst; |
14703 | |
14704 | adr = AREG((Opcode >> 0) & 7); |
14705 | DECODE_EXT_WORD |
14706 | res = 0; |
14707 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14708 | PRE_IO |
14709 | WRITE_BYTE_F(adr, res) |
14710 | POST_IO |
14711 | RET(18) |
14712 | } |
14713 | |
14714 | // CLR |
14715 | OPCODE(0x4238) |
14716 | { |
14717 | u32 adr, res; |
14718 | u32 src, dst; |
14719 | |
14720 | FETCH_SWORD(adr); |
14721 | res = 0; |
14722 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14723 | PRE_IO |
14724 | WRITE_BYTE_F(adr, res) |
14725 | POST_IO |
14726 | RET(16) |
14727 | } |
14728 | |
14729 | // CLR |
14730 | OPCODE(0x4239) |
14731 | { |
14732 | u32 adr, res; |
14733 | u32 src, dst; |
14734 | |
14735 | FETCH_LONG(adr); |
14736 | res = 0; |
14737 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14738 | PRE_IO |
14739 | WRITE_BYTE_F(adr, res) |
14740 | POST_IO |
14741 | RET(20) |
14742 | } |
14743 | |
14744 | // CLR |
14745 | OPCODE(0x421F) |
14746 | { |
14747 | u32 adr, res; |
14748 | u32 src, dst; |
14749 | |
14750 | adr = AREG(7); |
14751 | AREG(7) += 2; |
14752 | res = 0; |
14753 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14754 | PRE_IO |
14755 | WRITE_BYTE_F(adr, res) |
14756 | POST_IO |
14757 | RET(12) |
14758 | } |
14759 | |
14760 | // CLR |
14761 | OPCODE(0x4227) |
14762 | { |
14763 | u32 adr, res; |
14764 | u32 src, dst; |
14765 | |
14766 | adr = AREG(7) - 2; |
14767 | AREG(7) = adr; |
14768 | res = 0; |
14769 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14770 | PRE_IO |
14771 | WRITE_BYTE_F(adr, res) |
14772 | POST_IO |
14773 | RET(14) |
14774 | } |
14775 | |
14776 | // CLR |
14777 | OPCODE(0x4240) |
14778 | { |
14779 | u32 adr, res; |
14780 | u32 src, dst; |
14781 | |
14782 | res = 0; |
14783 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14784 | DREGu16((Opcode >> 0) & 7) = res; |
14785 | RET(4) |
14786 | } |
14787 | |
14788 | // CLR |
14789 | OPCODE(0x4250) |
14790 | { |
14791 | u32 adr, res; |
14792 | u32 src, dst; |
14793 | |
14794 | adr = AREG((Opcode >> 0) & 7); |
14795 | res = 0; |
14796 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14797 | PRE_IO |
14798 | WRITE_WORD_F(adr, res) |
14799 | POST_IO |
14800 | RET(12) |
14801 | } |
14802 | |
14803 | // CLR |
14804 | OPCODE(0x4258) |
14805 | { |
14806 | u32 adr, res; |
14807 | u32 src, dst; |
14808 | |
14809 | adr = AREG((Opcode >> 0) & 7); |
14810 | AREG((Opcode >> 0) & 7) += 2; |
14811 | res = 0; |
14812 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14813 | PRE_IO |
14814 | WRITE_WORD_F(adr, res) |
14815 | POST_IO |
14816 | RET(12) |
14817 | } |
14818 | |
14819 | // CLR |
14820 | OPCODE(0x4260) |
14821 | { |
14822 | u32 adr, res; |
14823 | u32 src, dst; |
14824 | |
14825 | adr = AREG((Opcode >> 0) & 7) - 2; |
14826 | AREG((Opcode >> 0) & 7) = adr; |
14827 | res = 0; |
14828 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14829 | PRE_IO |
14830 | WRITE_WORD_F(adr, res) |
14831 | POST_IO |
14832 | RET(14) |
14833 | } |
14834 | |
14835 | // CLR |
14836 | OPCODE(0x4268) |
14837 | { |
14838 | u32 adr, res; |
14839 | u32 src, dst; |
14840 | |
14841 | FETCH_SWORD(adr); |
14842 | adr += AREG((Opcode >> 0) & 7); |
14843 | res = 0; |
14844 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14845 | PRE_IO |
14846 | WRITE_WORD_F(adr, res) |
14847 | POST_IO |
14848 | RET(16) |
14849 | } |
14850 | |
14851 | // CLR |
14852 | OPCODE(0x4270) |
14853 | { |
14854 | u32 adr, res; |
14855 | u32 src, dst; |
14856 | |
14857 | adr = AREG((Opcode >> 0) & 7); |
14858 | DECODE_EXT_WORD |
14859 | res = 0; |
14860 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14861 | PRE_IO |
14862 | WRITE_WORD_F(adr, res) |
14863 | POST_IO |
14864 | RET(18) |
14865 | } |
14866 | |
14867 | // CLR |
14868 | OPCODE(0x4278) |
14869 | { |
14870 | u32 adr, res; |
14871 | u32 src, dst; |
14872 | |
14873 | FETCH_SWORD(adr); |
14874 | res = 0; |
14875 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14876 | PRE_IO |
14877 | WRITE_WORD_F(adr, res) |
14878 | POST_IO |
14879 | RET(16) |
14880 | } |
14881 | |
14882 | // CLR |
14883 | OPCODE(0x4279) |
14884 | { |
14885 | u32 adr, res; |
14886 | u32 src, dst; |
14887 | |
14888 | FETCH_LONG(adr); |
14889 | res = 0; |
14890 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14891 | PRE_IO |
14892 | WRITE_WORD_F(adr, res) |
14893 | POST_IO |
14894 | RET(20) |
14895 | } |
14896 | |
14897 | // CLR |
14898 | OPCODE(0x425F) |
14899 | { |
14900 | u32 adr, res; |
14901 | u32 src, dst; |
14902 | |
14903 | adr = AREG(7); |
14904 | AREG(7) += 2; |
14905 | res = 0; |
14906 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14907 | PRE_IO |
14908 | WRITE_WORD_F(adr, res) |
14909 | POST_IO |
14910 | RET(12) |
14911 | } |
14912 | |
14913 | // CLR |
14914 | OPCODE(0x4267) |
14915 | { |
14916 | u32 adr, res; |
14917 | u32 src, dst; |
14918 | |
14919 | adr = AREG(7) - 2; |
14920 | AREG(7) = adr; |
14921 | res = 0; |
14922 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14923 | PRE_IO |
14924 | WRITE_WORD_F(adr, res) |
14925 | POST_IO |
14926 | RET(14) |
14927 | } |
14928 | |
14929 | // CLR |
14930 | OPCODE(0x4280) |
14931 | { |
14932 | u32 adr, res; |
14933 | u32 src, dst; |
14934 | |
14935 | res = 0; |
14936 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14937 | DREGu32((Opcode >> 0) & 7) = res; |
14938 | RET(6) |
14939 | } |
14940 | |
14941 | // CLR |
14942 | OPCODE(0x4290) |
14943 | { |
14944 | u32 adr, res; |
14945 | u32 src, dst; |
14946 | |
14947 | adr = AREG((Opcode >> 0) & 7); |
14948 | res = 0; |
14949 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14950 | PRE_IO |
14951 | WRITE_LONG_F(adr, res) |
14952 | POST_IO |
14953 | RET(20) |
14954 | } |
14955 | |
14956 | // CLR |
14957 | OPCODE(0x4298) |
14958 | { |
14959 | u32 adr, res; |
14960 | u32 src, dst; |
14961 | |
14962 | adr = AREG((Opcode >> 0) & 7); |
14963 | AREG((Opcode >> 0) & 7) += 4; |
14964 | res = 0; |
14965 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14966 | PRE_IO |
14967 | WRITE_LONG_F(adr, res) |
14968 | POST_IO |
14969 | RET(20) |
14970 | } |
14971 | |
14972 | // CLR |
14973 | OPCODE(0x42A0) |
14974 | { |
14975 | u32 adr, res; |
14976 | u32 src, dst; |
14977 | |
14978 | adr = AREG((Opcode >> 0) & 7) - 4; |
14979 | AREG((Opcode >> 0) & 7) = adr; |
14980 | res = 0; |
14981 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14982 | PRE_IO |
14983 | WRITE_LONG_F(adr, res) |
14984 | POST_IO |
14985 | RET(22) |
14986 | } |
14987 | |
14988 | // CLR |
14989 | OPCODE(0x42A8) |
14990 | { |
14991 | u32 adr, res; |
14992 | u32 src, dst; |
14993 | |
14994 | FETCH_SWORD(adr); |
14995 | adr += AREG((Opcode >> 0) & 7); |
14996 | res = 0; |
14997 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14998 | PRE_IO |
14999 | WRITE_LONG_F(adr, res) |
15000 | POST_IO |
15001 | RET(24) |
15002 | } |
15003 | |
15004 | // CLR |
15005 | OPCODE(0x42B0) |
15006 | { |
15007 | u32 adr, res; |
15008 | u32 src, dst; |
15009 | |
15010 | adr = AREG((Opcode >> 0) & 7); |
15011 | DECODE_EXT_WORD |
15012 | res = 0; |
15013 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15014 | PRE_IO |
15015 | WRITE_LONG_F(adr, res) |
15016 | POST_IO |
15017 | RET(26) |
15018 | } |
15019 | |
15020 | // CLR |
15021 | OPCODE(0x42B8) |
15022 | { |
15023 | u32 adr, res; |
15024 | u32 src, dst; |
15025 | |
15026 | FETCH_SWORD(adr); |
15027 | res = 0; |
15028 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15029 | PRE_IO |
15030 | WRITE_LONG_F(adr, res) |
15031 | POST_IO |
15032 | RET(24) |
15033 | } |
15034 | |
15035 | // CLR |
15036 | OPCODE(0x42B9) |
15037 | { |
15038 | u32 adr, res; |
15039 | u32 src, dst; |
15040 | |
15041 | FETCH_LONG(adr); |
15042 | res = 0; |
15043 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15044 | PRE_IO |
15045 | WRITE_LONG_F(adr, res) |
15046 | POST_IO |
15047 | RET(28) |
15048 | } |
15049 | |
15050 | // CLR |
15051 | OPCODE(0x429F) |
15052 | { |
15053 | u32 adr, res; |
15054 | u32 src, dst; |
15055 | |
15056 | adr = AREG(7); |
15057 | AREG(7) += 4; |
15058 | res = 0; |
15059 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15060 | PRE_IO |
15061 | WRITE_LONG_F(adr, res) |
15062 | POST_IO |
15063 | RET(20) |
15064 | } |
15065 | |
15066 | // CLR |
15067 | OPCODE(0x42A7) |
15068 | { |
15069 | u32 adr, res; |
15070 | u32 src, dst; |
15071 | |
15072 | adr = AREG(7) - 4; |
15073 | AREG(7) = adr; |
15074 | res = 0; |
15075 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15076 | PRE_IO |
15077 | WRITE_LONG_F(adr, res) |
15078 | POST_IO |
15079 | RET(22) |
15080 | } |
15081 | |
15082 | // NEG |
15083 | OPCODE(0x4400) |
15084 | { |
15085 | u32 adr, res; |
15086 | u32 src, dst; |
15087 | |
15088 | src = DREGu8((Opcode >> 0) & 7); |
15089 | res = -src; |
15090 | flag_V = res & src; |
15091 | flag_N = flag_X = flag_C = res; |
15092 | flag_NotZ = res & 0xFF; |
15093 | DREGu8((Opcode >> 0) & 7) = res; |
15094 | RET(4) |
15095 | } |
15096 | |
15097 | // NEG |
15098 | OPCODE(0x4410) |
15099 | { |
15100 | u32 adr, res; |
15101 | u32 src, dst; |
15102 | |
15103 | adr = AREG((Opcode >> 0) & 7); |
15104 | PRE_IO |
15105 | READ_BYTE_F(adr, src) |
15106 | res = -src; |
15107 | flag_V = res & src; |
15108 | flag_N = flag_X = flag_C = res; |
15109 | flag_NotZ = res & 0xFF; |
15110 | WRITE_BYTE_F(adr, res) |
15111 | POST_IO |
15112 | RET(12) |
15113 | } |
15114 | |
15115 | // NEG |
15116 | OPCODE(0x4418) |
15117 | { |
15118 | u32 adr, res; |
15119 | u32 src, dst; |
15120 | |
15121 | adr = AREG((Opcode >> 0) & 7); |
15122 | AREG((Opcode >> 0) & 7) += 1; |
15123 | PRE_IO |
15124 | READ_BYTE_F(adr, src) |
15125 | res = -src; |
15126 | flag_V = res & src; |
15127 | flag_N = flag_X = flag_C = res; |
15128 | flag_NotZ = res & 0xFF; |
15129 | WRITE_BYTE_F(adr, res) |
15130 | POST_IO |
15131 | RET(12) |
15132 | } |
15133 | |
15134 | // NEG |
15135 | OPCODE(0x4420) |
15136 | { |
15137 | u32 adr, res; |
15138 | u32 src, dst; |
15139 | |
15140 | adr = AREG((Opcode >> 0) & 7) - 1; |
15141 | AREG((Opcode >> 0) & 7) = adr; |
15142 | PRE_IO |
15143 | READ_BYTE_F(adr, src) |
15144 | res = -src; |
15145 | flag_V = res & src; |
15146 | flag_N = flag_X = flag_C = res; |
15147 | flag_NotZ = res & 0xFF; |
15148 | WRITE_BYTE_F(adr, res) |
15149 | POST_IO |
15150 | RET(14) |
15151 | } |
15152 | |
15153 | // NEG |
15154 | OPCODE(0x4428) |
15155 | { |
15156 | u32 adr, res; |
15157 | u32 src, dst; |
15158 | |
15159 | FETCH_SWORD(adr); |
15160 | adr += AREG((Opcode >> 0) & 7); |
15161 | PRE_IO |
15162 | READ_BYTE_F(adr, src) |
15163 | res = -src; |
15164 | flag_V = res & src; |
15165 | flag_N = flag_X = flag_C = res; |
15166 | flag_NotZ = res & 0xFF; |
15167 | WRITE_BYTE_F(adr, res) |
15168 | POST_IO |
15169 | RET(16) |
15170 | } |
15171 | |
15172 | // NEG |
15173 | OPCODE(0x4430) |
15174 | { |
15175 | u32 adr, res; |
15176 | u32 src, dst; |
15177 | |
15178 | adr = AREG((Opcode >> 0) & 7); |
15179 | DECODE_EXT_WORD |
15180 | PRE_IO |
15181 | READ_BYTE_F(adr, src) |
15182 | res = -src; |
15183 | flag_V = res & src; |
15184 | flag_N = flag_X = flag_C = res; |
15185 | flag_NotZ = res & 0xFF; |
15186 | WRITE_BYTE_F(adr, res) |
15187 | POST_IO |
15188 | RET(18) |
15189 | } |
15190 | |
15191 | // NEG |
15192 | OPCODE(0x4438) |
15193 | { |
15194 | u32 adr, res; |
15195 | u32 src, dst; |
15196 | |
15197 | FETCH_SWORD(adr); |
15198 | PRE_IO |
15199 | READ_BYTE_F(adr, src) |
15200 | res = -src; |
15201 | flag_V = res & src; |
15202 | flag_N = flag_X = flag_C = res; |
15203 | flag_NotZ = res & 0xFF; |
15204 | WRITE_BYTE_F(adr, res) |
15205 | POST_IO |
15206 | RET(16) |
15207 | } |
15208 | |
15209 | // NEG |
15210 | OPCODE(0x4439) |
15211 | { |
15212 | u32 adr, res; |
15213 | u32 src, dst; |
15214 | |
15215 | FETCH_LONG(adr); |
15216 | PRE_IO |
15217 | READ_BYTE_F(adr, src) |
15218 | res = -src; |
15219 | flag_V = res & src; |
15220 | flag_N = flag_X = flag_C = res; |
15221 | flag_NotZ = res & 0xFF; |
15222 | WRITE_BYTE_F(adr, res) |
15223 | POST_IO |
15224 | RET(20) |
15225 | } |
15226 | |
15227 | // NEG |
15228 | OPCODE(0x441F) |
15229 | { |
15230 | u32 adr, res; |
15231 | u32 src, dst; |
15232 | |
15233 | adr = AREG(7); |
15234 | AREG(7) += 2; |
15235 | PRE_IO |
15236 | READ_BYTE_F(adr, src) |
15237 | res = -src; |
15238 | flag_V = res & src; |
15239 | flag_N = flag_X = flag_C = res; |
15240 | flag_NotZ = res & 0xFF; |
15241 | WRITE_BYTE_F(adr, res) |
15242 | POST_IO |
15243 | RET(12) |
15244 | } |
15245 | |
15246 | // NEG |
15247 | OPCODE(0x4427) |
15248 | { |
15249 | u32 adr, res; |
15250 | u32 src, dst; |
15251 | |
15252 | adr = AREG(7) - 2; |
15253 | AREG(7) = adr; |
15254 | PRE_IO |
15255 | READ_BYTE_F(adr, src) |
15256 | res = -src; |
15257 | flag_V = res & src; |
15258 | flag_N = flag_X = flag_C = res; |
15259 | flag_NotZ = res & 0xFF; |
15260 | WRITE_BYTE_F(adr, res) |
15261 | POST_IO |
15262 | RET(14) |
15263 | } |
15264 | |
15265 | // NEG |
15266 | OPCODE(0x4440) |
15267 | { |
15268 | u32 adr, res; |
15269 | u32 src, dst; |
15270 | |
15271 | src = DREGu16((Opcode >> 0) & 7); |
15272 | res = -src; |
15273 | flag_V = (res & src) >> 8; |
15274 | flag_N = flag_X = flag_C = res >> 8; |
15275 | flag_NotZ = res & 0xFFFF; |
15276 | DREGu16((Opcode >> 0) & 7) = res; |
15277 | RET(4) |
15278 | } |
15279 | |
15280 | // NEG |
15281 | OPCODE(0x4450) |
15282 | { |
15283 | u32 adr, res; |
15284 | u32 src, dst; |
15285 | |
15286 | adr = AREG((Opcode >> 0) & 7); |
15287 | PRE_IO |
15288 | READ_WORD_F(adr, src) |
15289 | res = -src; |
15290 | flag_V = (res & src) >> 8; |
15291 | flag_N = flag_X = flag_C = res >> 8; |
15292 | flag_NotZ = res & 0xFFFF; |
15293 | WRITE_WORD_F(adr, res) |
15294 | POST_IO |
15295 | RET(12) |
15296 | } |
15297 | |
15298 | // NEG |
15299 | OPCODE(0x4458) |
15300 | { |
15301 | u32 adr, res; |
15302 | u32 src, dst; |
15303 | |
15304 | adr = AREG((Opcode >> 0) & 7); |
15305 | AREG((Opcode >> 0) & 7) += 2; |
15306 | PRE_IO |
15307 | READ_WORD_F(adr, src) |
15308 | res = -src; |
15309 | flag_V = (res & src) >> 8; |
15310 | flag_N = flag_X = flag_C = res >> 8; |
15311 | flag_NotZ = res & 0xFFFF; |
15312 | WRITE_WORD_F(adr, res) |
15313 | POST_IO |
15314 | RET(12) |
15315 | } |
15316 | |
15317 | // NEG |
15318 | OPCODE(0x4460) |
15319 | { |
15320 | u32 adr, res; |
15321 | u32 src, dst; |
15322 | |
15323 | adr = AREG((Opcode >> 0) & 7) - 2; |
15324 | AREG((Opcode >> 0) & 7) = adr; |
15325 | PRE_IO |
15326 | READ_WORD_F(adr, src) |
15327 | res = -src; |
15328 | flag_V = (res & src) >> 8; |
15329 | flag_N = flag_X = flag_C = res >> 8; |
15330 | flag_NotZ = res & 0xFFFF; |
15331 | WRITE_WORD_F(adr, res) |
15332 | POST_IO |
15333 | RET(14) |
15334 | } |
15335 | |
15336 | // NEG |
15337 | OPCODE(0x4468) |
15338 | { |
15339 | u32 adr, res; |
15340 | u32 src, dst; |
15341 | |
15342 | FETCH_SWORD(adr); |
15343 | adr += AREG((Opcode >> 0) & 7); |
15344 | PRE_IO |
15345 | READ_WORD_F(adr, src) |
15346 | res = -src; |
15347 | flag_V = (res & src) >> 8; |
15348 | flag_N = flag_X = flag_C = res >> 8; |
15349 | flag_NotZ = res & 0xFFFF; |
15350 | WRITE_WORD_F(adr, res) |
15351 | POST_IO |
15352 | RET(16) |
15353 | } |
15354 | |
15355 | // NEG |
15356 | OPCODE(0x4470) |
15357 | { |
15358 | u32 adr, res; |
15359 | u32 src, dst; |
15360 | |
15361 | adr = AREG((Opcode >> 0) & 7); |
15362 | DECODE_EXT_WORD |
15363 | PRE_IO |
15364 | READ_WORD_F(adr, src) |
15365 | res = -src; |
15366 | flag_V = (res & src) >> 8; |
15367 | flag_N = flag_X = flag_C = res >> 8; |
15368 | flag_NotZ = res & 0xFFFF; |
15369 | WRITE_WORD_F(adr, res) |
15370 | POST_IO |
15371 | RET(18) |
15372 | } |
15373 | |
15374 | // NEG |
15375 | OPCODE(0x4478) |
15376 | { |
15377 | u32 adr, res; |
15378 | u32 src, dst; |
15379 | |
15380 | FETCH_SWORD(adr); |
15381 | PRE_IO |
15382 | READ_WORD_F(adr, src) |
15383 | res = -src; |
15384 | flag_V = (res & src) >> 8; |
15385 | flag_N = flag_X = flag_C = res >> 8; |
15386 | flag_NotZ = res & 0xFFFF; |
15387 | WRITE_WORD_F(adr, res) |
15388 | POST_IO |
15389 | RET(16) |
15390 | } |
15391 | |
15392 | // NEG |
15393 | OPCODE(0x4479) |
15394 | { |
15395 | u32 adr, res; |
15396 | u32 src, dst; |
15397 | |
15398 | FETCH_LONG(adr); |
15399 | PRE_IO |
15400 | READ_WORD_F(adr, src) |
15401 | res = -src; |
15402 | flag_V = (res & src) >> 8; |
15403 | flag_N = flag_X = flag_C = res >> 8; |
15404 | flag_NotZ = res & 0xFFFF; |
15405 | WRITE_WORD_F(adr, res) |
15406 | POST_IO |
15407 | RET(20) |
15408 | } |
15409 | |
15410 | // NEG |
15411 | OPCODE(0x445F) |
15412 | { |
15413 | u32 adr, res; |
15414 | u32 src, dst; |
15415 | |
15416 | adr = AREG(7); |
15417 | AREG(7) += 2; |
15418 | PRE_IO |
15419 | READ_WORD_F(adr, src) |
15420 | res = -src; |
15421 | flag_V = (res & src) >> 8; |
15422 | flag_N = flag_X = flag_C = res >> 8; |
15423 | flag_NotZ = res & 0xFFFF; |
15424 | WRITE_WORD_F(adr, res) |
15425 | POST_IO |
15426 | RET(12) |
15427 | } |
15428 | |
15429 | // NEG |
15430 | OPCODE(0x4467) |
15431 | { |
15432 | u32 adr, res; |
15433 | u32 src, dst; |
15434 | |
15435 | adr = AREG(7) - 2; |
15436 | AREG(7) = adr; |
15437 | PRE_IO |
15438 | READ_WORD_F(adr, src) |
15439 | res = -src; |
15440 | flag_V = (res & src) >> 8; |
15441 | flag_N = flag_X = flag_C = res >> 8; |
15442 | flag_NotZ = res & 0xFFFF; |
15443 | WRITE_WORD_F(adr, res) |
15444 | POST_IO |
15445 | RET(14) |
15446 | } |
15447 | |
15448 | // NEG |
15449 | OPCODE(0x4480) |
15450 | { |
15451 | u32 adr, res; |
15452 | u32 src, dst; |
15453 | |
15454 | src = DREGu32((Opcode >> 0) & 7); |
15455 | res = -src; |
15456 | flag_NotZ = res; |
15457 | flag_V = (res & src) >> 24; |
15458 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15459 | flag_N = res >> 24; |
15460 | DREGu32((Opcode >> 0) & 7) = res; |
15461 | RET(6) |
15462 | } |
15463 | |
15464 | // NEG |
15465 | OPCODE(0x4490) |
15466 | { |
15467 | u32 adr, res; |
15468 | u32 src, dst; |
15469 | |
15470 | adr = AREG((Opcode >> 0) & 7); |
15471 | PRE_IO |
15472 | READ_LONG_F(adr, src) |
15473 | res = -src; |
15474 | flag_NotZ = res; |
15475 | flag_V = (res & src) >> 24; |
15476 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15477 | flag_N = res >> 24; |
15478 | WRITE_LONG_F(adr, res) |
15479 | POST_IO |
15480 | RET(20) |
15481 | } |
15482 | |
15483 | // NEG |
15484 | OPCODE(0x4498) |
15485 | { |
15486 | u32 adr, res; |
15487 | u32 src, dst; |
15488 | |
15489 | adr = AREG((Opcode >> 0) & 7); |
15490 | AREG((Opcode >> 0) & 7) += 4; |
15491 | PRE_IO |
15492 | READ_LONG_F(adr, src) |
15493 | res = -src; |
15494 | flag_NotZ = res; |
15495 | flag_V = (res & src) >> 24; |
15496 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15497 | flag_N = res >> 24; |
15498 | WRITE_LONG_F(adr, res) |
15499 | POST_IO |
15500 | RET(20) |
15501 | } |
15502 | |
15503 | // NEG |
15504 | OPCODE(0x44A0) |
15505 | { |
15506 | u32 adr, res; |
15507 | u32 src, dst; |
15508 | |
15509 | adr = AREG((Opcode >> 0) & 7) - 4; |
15510 | AREG((Opcode >> 0) & 7) = adr; |
15511 | PRE_IO |
15512 | READ_LONG_F(adr, src) |
15513 | res = -src; |
15514 | flag_NotZ = res; |
15515 | flag_V = (res & src) >> 24; |
15516 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15517 | flag_N = res >> 24; |
15518 | WRITE_LONG_F(adr, res) |
15519 | POST_IO |
15520 | RET(22) |
15521 | } |
15522 | |
15523 | // NEG |
15524 | OPCODE(0x44A8) |
15525 | { |
15526 | u32 adr, res; |
15527 | u32 src, dst; |
15528 | |
15529 | FETCH_SWORD(adr); |
15530 | adr += AREG((Opcode >> 0) & 7); |
15531 | PRE_IO |
15532 | READ_LONG_F(adr, src) |
15533 | res = -src; |
15534 | flag_NotZ = res; |
15535 | flag_V = (res & src) >> 24; |
15536 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15537 | flag_N = res >> 24; |
15538 | WRITE_LONG_F(adr, res) |
15539 | POST_IO |
15540 | RET(24) |
15541 | } |
15542 | |
15543 | // NEG |
15544 | OPCODE(0x44B0) |
15545 | { |
15546 | u32 adr, res; |
15547 | u32 src, dst; |
15548 | |
15549 | adr = AREG((Opcode >> 0) & 7); |
15550 | DECODE_EXT_WORD |
15551 | PRE_IO |
15552 | READ_LONG_F(adr, src) |
15553 | res = -src; |
15554 | flag_NotZ = res; |
15555 | flag_V = (res & src) >> 24; |
15556 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15557 | flag_N = res >> 24; |
15558 | WRITE_LONG_F(adr, res) |
15559 | POST_IO |
15560 | RET(26) |
15561 | } |
15562 | |
15563 | // NEG |
15564 | OPCODE(0x44B8) |
15565 | { |
15566 | u32 adr, res; |
15567 | u32 src, dst; |
15568 | |
15569 | FETCH_SWORD(adr); |
15570 | PRE_IO |
15571 | READ_LONG_F(adr, src) |
15572 | res = -src; |
15573 | flag_NotZ = res; |
15574 | flag_V = (res & src) >> 24; |
15575 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15576 | flag_N = res >> 24; |
15577 | WRITE_LONG_F(adr, res) |
15578 | POST_IO |
15579 | RET(24) |
15580 | } |
15581 | |
15582 | // NEG |
15583 | OPCODE(0x44B9) |
15584 | { |
15585 | u32 adr, res; |
15586 | u32 src, dst; |
15587 | |
15588 | FETCH_LONG(adr); |
15589 | PRE_IO |
15590 | READ_LONG_F(adr, src) |
15591 | res = -src; |
15592 | flag_NotZ = res; |
15593 | flag_V = (res & src) >> 24; |
15594 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15595 | flag_N = res >> 24; |
15596 | WRITE_LONG_F(adr, res) |
15597 | POST_IO |
15598 | RET(28) |
15599 | } |
15600 | |
15601 | // NEG |
15602 | OPCODE(0x449F) |
15603 | { |
15604 | u32 adr, res; |
15605 | u32 src, dst; |
15606 | |
15607 | adr = AREG(7); |
15608 | AREG(7) += 4; |
15609 | PRE_IO |
15610 | READ_LONG_F(adr, src) |
15611 | res = -src; |
15612 | flag_NotZ = res; |
15613 | flag_V = (res & src) >> 24; |
15614 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15615 | flag_N = res >> 24; |
15616 | WRITE_LONG_F(adr, res) |
15617 | POST_IO |
15618 | RET(20) |
15619 | } |
15620 | |
15621 | // NEG |
15622 | OPCODE(0x44A7) |
15623 | { |
15624 | u32 adr, res; |
15625 | u32 src, dst; |
15626 | |
15627 | adr = AREG(7) - 4; |
15628 | AREG(7) = adr; |
15629 | PRE_IO |
15630 | READ_LONG_F(adr, src) |
15631 | res = -src; |
15632 | flag_NotZ = res; |
15633 | flag_V = (res & src) >> 24; |
15634 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15635 | flag_N = res >> 24; |
15636 | WRITE_LONG_F(adr, res) |
15637 | POST_IO |
15638 | RET(22) |
15639 | } |
15640 | |
15641 | // NOT |
15642 | OPCODE(0x4600) |
15643 | { |
15644 | u32 adr, res; |
15645 | u32 src, dst; |
15646 | |
15647 | src = DREGu8((Opcode >> 0) & 7); |
15648 | res = ~src; |
15649 | flag_C = 0; |
15650 | flag_V = 0; |
15651 | flag_N = res; |
15652 | flag_NotZ = res & 0xFF; |
15653 | DREGu8((Opcode >> 0) & 7) = res; |
15654 | RET(4) |
15655 | } |
15656 | |
15657 | // NOT |
15658 | OPCODE(0x4610) |
15659 | { |
15660 | u32 adr, res; |
15661 | u32 src, dst; |
15662 | |
15663 | adr = AREG((Opcode >> 0) & 7); |
15664 | PRE_IO |
15665 | READ_BYTE_F(adr, src) |
15666 | res = ~src; |
15667 | flag_C = 0; |
15668 | flag_V = 0; |
15669 | flag_N = res; |
15670 | flag_NotZ = res & 0xFF; |
15671 | WRITE_BYTE_F(adr, res) |
15672 | POST_IO |
15673 | RET(12) |
15674 | } |
15675 | |
15676 | // NOT |
15677 | OPCODE(0x4618) |
15678 | { |
15679 | u32 adr, res; |
15680 | u32 src, dst; |
15681 | |
15682 | adr = AREG((Opcode >> 0) & 7); |
15683 | AREG((Opcode >> 0) & 7) += 1; |
15684 | PRE_IO |
15685 | READ_BYTE_F(adr, src) |
15686 | res = ~src; |
15687 | flag_C = 0; |
15688 | flag_V = 0; |
15689 | flag_N = res; |
15690 | flag_NotZ = res & 0xFF; |
15691 | WRITE_BYTE_F(adr, res) |
15692 | POST_IO |
15693 | RET(12) |
15694 | } |
15695 | |
15696 | // NOT |
15697 | OPCODE(0x4620) |
15698 | { |
15699 | u32 adr, res; |
15700 | u32 src, dst; |
15701 | |
15702 | adr = AREG((Opcode >> 0) & 7) - 1; |
15703 | AREG((Opcode >> 0) & 7) = adr; |
15704 | PRE_IO |
15705 | READ_BYTE_F(adr, src) |
15706 | res = ~src; |
15707 | flag_C = 0; |
15708 | flag_V = 0; |
15709 | flag_N = res; |
15710 | flag_NotZ = res & 0xFF; |
15711 | WRITE_BYTE_F(adr, res) |
15712 | POST_IO |
15713 | RET(14) |
15714 | } |
15715 | |
15716 | // NOT |
15717 | OPCODE(0x4628) |
15718 | { |
15719 | u32 adr, res; |
15720 | u32 src, dst; |
15721 | |
15722 | FETCH_SWORD(adr); |
15723 | adr += AREG((Opcode >> 0) & 7); |
15724 | PRE_IO |
15725 | READ_BYTE_F(adr, src) |
15726 | res = ~src; |
15727 | flag_C = 0; |
15728 | flag_V = 0; |
15729 | flag_N = res; |
15730 | flag_NotZ = res & 0xFF; |
15731 | WRITE_BYTE_F(adr, res) |
15732 | POST_IO |
15733 | RET(16) |
15734 | } |
15735 | |
15736 | // NOT |
15737 | OPCODE(0x4630) |
15738 | { |
15739 | u32 adr, res; |
15740 | u32 src, dst; |
15741 | |
15742 | adr = AREG((Opcode >> 0) & 7); |
15743 | DECODE_EXT_WORD |
15744 | PRE_IO |
15745 | READ_BYTE_F(adr, src) |
15746 | res = ~src; |
15747 | flag_C = 0; |
15748 | flag_V = 0; |
15749 | flag_N = res; |
15750 | flag_NotZ = res & 0xFF; |
15751 | WRITE_BYTE_F(adr, res) |
15752 | POST_IO |
15753 | RET(18) |
15754 | } |
15755 | |
15756 | // NOT |
15757 | OPCODE(0x4638) |
15758 | { |
15759 | u32 adr, res; |
15760 | u32 src, dst; |
15761 | |
15762 | FETCH_SWORD(adr); |
15763 | PRE_IO |
15764 | READ_BYTE_F(adr, src) |
15765 | res = ~src; |
15766 | flag_C = 0; |
15767 | flag_V = 0; |
15768 | flag_N = res; |
15769 | flag_NotZ = res & 0xFF; |
15770 | WRITE_BYTE_F(adr, res) |
15771 | POST_IO |
15772 | RET(16) |
15773 | } |
15774 | |
15775 | // NOT |
15776 | OPCODE(0x4639) |
15777 | { |
15778 | u32 adr, res; |
15779 | u32 src, dst; |
15780 | |
15781 | FETCH_LONG(adr); |
15782 | PRE_IO |
15783 | READ_BYTE_F(adr, src) |
15784 | res = ~src; |
15785 | flag_C = 0; |
15786 | flag_V = 0; |
15787 | flag_N = res; |
15788 | flag_NotZ = res & 0xFF; |
15789 | WRITE_BYTE_F(adr, res) |
15790 | POST_IO |
15791 | RET(20) |
15792 | } |
15793 | |
15794 | // NOT |
15795 | OPCODE(0x461F) |
15796 | { |
15797 | u32 adr, res; |
15798 | u32 src, dst; |
15799 | |
15800 | adr = AREG(7); |
15801 | AREG(7) += 2; |
15802 | PRE_IO |
15803 | READ_BYTE_F(adr, src) |
15804 | res = ~src; |
15805 | flag_C = 0; |
15806 | flag_V = 0; |
15807 | flag_N = res; |
15808 | flag_NotZ = res & 0xFF; |
15809 | WRITE_BYTE_F(adr, res) |
15810 | POST_IO |
15811 | RET(12) |
15812 | } |
15813 | |
15814 | // NOT |
15815 | OPCODE(0x4627) |
15816 | { |
15817 | u32 adr, res; |
15818 | u32 src, dst; |
15819 | |
15820 | adr = AREG(7) - 2; |
15821 | AREG(7) = adr; |
15822 | PRE_IO |
15823 | READ_BYTE_F(adr, src) |
15824 | res = ~src; |
15825 | flag_C = 0; |
15826 | flag_V = 0; |
15827 | flag_N = res; |
15828 | flag_NotZ = res & 0xFF; |
15829 | WRITE_BYTE_F(adr, res) |
15830 | POST_IO |
15831 | RET(14) |
15832 | } |
15833 | |
15834 | // NOT |
15835 | OPCODE(0x4640) |
15836 | { |
15837 | u32 adr, res; |
15838 | u32 src, dst; |
15839 | |
15840 | src = DREGu16((Opcode >> 0) & 7); |
15841 | res = ~src; |
15842 | flag_C = 0; |
15843 | flag_V = 0; |
15844 | flag_NotZ = res & 0xFFFF; |
15845 | flag_N = res >> 8; |
15846 | DREGu16((Opcode >> 0) & 7) = res; |
15847 | RET(4) |
15848 | } |
15849 | |
15850 | // NOT |
15851 | OPCODE(0x4650) |
15852 | { |
15853 | u32 adr, res; |
15854 | u32 src, dst; |
15855 | |
15856 | adr = AREG((Opcode >> 0) & 7); |
15857 | PRE_IO |
15858 | READ_WORD_F(adr, src) |
15859 | res = ~src; |
15860 | flag_C = 0; |
15861 | flag_V = 0; |
15862 | flag_NotZ = res & 0xFFFF; |
15863 | flag_N = res >> 8; |
15864 | WRITE_WORD_F(adr, res) |
15865 | POST_IO |
15866 | RET(12) |
15867 | } |
15868 | |
15869 | // NOT |
15870 | OPCODE(0x4658) |
15871 | { |
15872 | u32 adr, res; |
15873 | u32 src, dst; |
15874 | |
15875 | adr = AREG((Opcode >> 0) & 7); |
15876 | AREG((Opcode >> 0) & 7) += 2; |
15877 | PRE_IO |
15878 | READ_WORD_F(adr, src) |
15879 | res = ~src; |
15880 | flag_C = 0; |
15881 | flag_V = 0; |
15882 | flag_NotZ = res & 0xFFFF; |
15883 | flag_N = res >> 8; |
15884 | WRITE_WORD_F(adr, res) |
15885 | POST_IO |
15886 | RET(12) |
15887 | } |
15888 | |
15889 | // NOT |
15890 | OPCODE(0x4660) |
15891 | { |
15892 | u32 adr, res; |
15893 | u32 src, dst; |
15894 | |
15895 | adr = AREG((Opcode >> 0) & 7) - 2; |
15896 | AREG((Opcode >> 0) & 7) = adr; |
15897 | PRE_IO |
15898 | READ_WORD_F(adr, src) |
15899 | res = ~src; |
15900 | flag_C = 0; |
15901 | flag_V = 0; |
15902 | flag_NotZ = res & 0xFFFF; |
15903 | flag_N = res >> 8; |
15904 | WRITE_WORD_F(adr, res) |
15905 | POST_IO |
15906 | RET(14) |
15907 | } |
15908 | |
15909 | // NOT |
15910 | OPCODE(0x4668) |
15911 | { |
15912 | u32 adr, res; |
15913 | u32 src, dst; |
15914 | |
15915 | FETCH_SWORD(adr); |
15916 | adr += AREG((Opcode >> 0) & 7); |
15917 | PRE_IO |
15918 | READ_WORD_F(adr, src) |
15919 | res = ~src; |
15920 | flag_C = 0; |
15921 | flag_V = 0; |
15922 | flag_NotZ = res & 0xFFFF; |
15923 | flag_N = res >> 8; |
15924 | WRITE_WORD_F(adr, res) |
15925 | POST_IO |
15926 | RET(16) |
15927 | } |
15928 | |
15929 | // NOT |
15930 | OPCODE(0x4670) |
15931 | { |
15932 | u32 adr, res; |
15933 | u32 src, dst; |
15934 | |
15935 | adr = AREG((Opcode >> 0) & 7); |
15936 | DECODE_EXT_WORD |
15937 | PRE_IO |
15938 | READ_WORD_F(adr, src) |
15939 | res = ~src; |
15940 | flag_C = 0; |
15941 | flag_V = 0; |
15942 | flag_NotZ = res & 0xFFFF; |
15943 | flag_N = res >> 8; |
15944 | WRITE_WORD_F(adr, res) |
15945 | POST_IO |
15946 | RET(18) |
15947 | } |
15948 | |
15949 | // NOT |
15950 | OPCODE(0x4678) |
15951 | { |
15952 | u32 adr, res; |
15953 | u32 src, dst; |
15954 | |
15955 | FETCH_SWORD(adr); |
15956 | PRE_IO |
15957 | READ_WORD_F(adr, src) |
15958 | res = ~src; |
15959 | flag_C = 0; |
15960 | flag_V = 0; |
15961 | flag_NotZ = res & 0xFFFF; |
15962 | flag_N = res >> 8; |
15963 | WRITE_WORD_F(adr, res) |
15964 | POST_IO |
15965 | RET(16) |
15966 | } |
15967 | |
15968 | // NOT |
15969 | OPCODE(0x4679) |
15970 | { |
15971 | u32 adr, res; |
15972 | u32 src, dst; |
15973 | |
15974 | FETCH_LONG(adr); |
15975 | PRE_IO |
15976 | READ_WORD_F(adr, src) |
15977 | res = ~src; |
15978 | flag_C = 0; |
15979 | flag_V = 0; |
15980 | flag_NotZ = res & 0xFFFF; |
15981 | flag_N = res >> 8; |
15982 | WRITE_WORD_F(adr, res) |
15983 | POST_IO |
15984 | RET(20) |
15985 | } |
15986 | |
15987 | // NOT |
15988 | OPCODE(0x465F) |
15989 | { |
15990 | u32 adr, res; |
15991 | u32 src, dst; |
15992 | |
15993 | adr = AREG(7); |
15994 | AREG(7) += 2; |
15995 | PRE_IO |
15996 | READ_WORD_F(adr, src) |
15997 | res = ~src; |
15998 | flag_C = 0; |
15999 | flag_V = 0; |
16000 | flag_NotZ = res & 0xFFFF; |
16001 | flag_N = res >> 8; |
16002 | WRITE_WORD_F(adr, res) |
16003 | POST_IO |
16004 | RET(12) |
16005 | } |
16006 | |
16007 | // NOT |
16008 | OPCODE(0x4667) |
16009 | { |
16010 | u32 adr, res; |
16011 | u32 src, dst; |
16012 | |
16013 | adr = AREG(7) - 2; |
16014 | AREG(7) = adr; |
16015 | PRE_IO |
16016 | READ_WORD_F(adr, src) |
16017 | res = ~src; |
16018 | flag_C = 0; |
16019 | flag_V = 0; |
16020 | flag_NotZ = res & 0xFFFF; |
16021 | flag_N = res >> 8; |
16022 | WRITE_WORD_F(adr, res) |
16023 | POST_IO |
16024 | RET(14) |
16025 | } |
16026 | |
16027 | // NOT |
16028 | OPCODE(0x4680) |
16029 | { |
16030 | u32 adr, res; |
16031 | u32 src, dst; |
16032 | |
16033 | src = DREGu32((Opcode >> 0) & 7); |
16034 | res = ~src; |
16035 | flag_C = 0; |
16036 | flag_V = 0; |
16037 | flag_NotZ = res; |
16038 | flag_N = res >> 24; |
16039 | DREGu32((Opcode >> 0) & 7) = res; |
16040 | RET(6) |
16041 | } |
16042 | |
16043 | // NOT |
16044 | OPCODE(0x4690) |
16045 | { |
16046 | u32 adr, res; |
16047 | u32 src, dst; |
16048 | |
16049 | adr = AREG((Opcode >> 0) & 7); |
16050 | PRE_IO |
16051 | READ_LONG_F(adr, src) |
16052 | res = ~src; |
16053 | flag_C = 0; |
16054 | flag_V = 0; |
16055 | flag_NotZ = res; |
16056 | flag_N = res >> 24; |
16057 | WRITE_LONG_F(adr, res) |
16058 | POST_IO |
16059 | RET(20) |
16060 | } |
16061 | |
16062 | // NOT |
16063 | OPCODE(0x4698) |
16064 | { |
16065 | u32 adr, res; |
16066 | u32 src, dst; |
16067 | |
16068 | adr = AREG((Opcode >> 0) & 7); |
16069 | AREG((Opcode >> 0) & 7) += 4; |
16070 | PRE_IO |
16071 | READ_LONG_F(adr, src) |
16072 | res = ~src; |
16073 | flag_C = 0; |
16074 | flag_V = 0; |
16075 | flag_NotZ = res; |
16076 | flag_N = res >> 24; |
16077 | WRITE_LONG_F(adr, res) |
16078 | POST_IO |
16079 | RET(20) |
16080 | } |
16081 | |
16082 | // NOT |
16083 | OPCODE(0x46A0) |
16084 | { |
16085 | u32 adr, res; |
16086 | u32 src, dst; |
16087 | |
16088 | adr = AREG((Opcode >> 0) & 7) - 4; |
16089 | AREG((Opcode >> 0) & 7) = adr; |
16090 | PRE_IO |
16091 | READ_LONG_F(adr, src) |
16092 | res = ~src; |
16093 | flag_C = 0; |
16094 | flag_V = 0; |
16095 | flag_NotZ = res; |
16096 | flag_N = res >> 24; |
16097 | WRITE_LONG_F(adr, res) |
16098 | POST_IO |
16099 | RET(22) |
16100 | } |
16101 | |
16102 | // NOT |
16103 | OPCODE(0x46A8) |
16104 | { |
16105 | u32 adr, res; |
16106 | u32 src, dst; |
16107 | |
16108 | FETCH_SWORD(adr); |
16109 | adr += AREG((Opcode >> 0) & 7); |
16110 | PRE_IO |
16111 | READ_LONG_F(adr, src) |
16112 | res = ~src; |
16113 | flag_C = 0; |
16114 | flag_V = 0; |
16115 | flag_NotZ = res; |
16116 | flag_N = res >> 24; |
16117 | WRITE_LONG_F(adr, res) |
16118 | POST_IO |
16119 | RET(24) |
16120 | } |
16121 | |
16122 | // NOT |
16123 | OPCODE(0x46B0) |
16124 | { |
16125 | u32 adr, res; |
16126 | u32 src, dst; |
16127 | |
16128 | adr = AREG((Opcode >> 0) & 7); |
16129 | DECODE_EXT_WORD |
16130 | PRE_IO |
16131 | READ_LONG_F(adr, src) |
16132 | res = ~src; |
16133 | flag_C = 0; |
16134 | flag_V = 0; |
16135 | flag_NotZ = res; |
16136 | flag_N = res >> 24; |
16137 | WRITE_LONG_F(adr, res) |
16138 | POST_IO |
16139 | RET(26) |
16140 | } |
16141 | |
16142 | // NOT |
16143 | OPCODE(0x46B8) |
16144 | { |
16145 | u32 adr, res; |
16146 | u32 src, dst; |
16147 | |
16148 | FETCH_SWORD(adr); |
16149 | PRE_IO |
16150 | READ_LONG_F(adr, src) |
16151 | res = ~src; |
16152 | flag_C = 0; |
16153 | flag_V = 0; |
16154 | flag_NotZ = res; |
16155 | flag_N = res >> 24; |
16156 | WRITE_LONG_F(adr, res) |
16157 | POST_IO |
16158 | RET(24) |
16159 | } |
16160 | |
16161 | // NOT |
16162 | OPCODE(0x46B9) |
16163 | { |
16164 | u32 adr, res; |
16165 | u32 src, dst; |
16166 | |
16167 | FETCH_LONG(adr); |
16168 | PRE_IO |
16169 | READ_LONG_F(adr, src) |
16170 | res = ~src; |
16171 | flag_C = 0; |
16172 | flag_V = 0; |
16173 | flag_NotZ = res; |
16174 | flag_N = res >> 24; |
16175 | WRITE_LONG_F(adr, res) |
16176 | POST_IO |
16177 | RET(28) |
16178 | } |
16179 | |
16180 | // NOT |
16181 | OPCODE(0x469F) |
16182 | { |
16183 | u32 adr, res; |
16184 | u32 src, dst; |
16185 | |
16186 | adr = AREG(7); |
16187 | AREG(7) += 4; |
16188 | PRE_IO |
16189 | READ_LONG_F(adr, src) |
16190 | res = ~src; |
16191 | flag_C = 0; |
16192 | flag_V = 0; |
16193 | flag_NotZ = res; |
16194 | flag_N = res >> 24; |
16195 | WRITE_LONG_F(adr, res) |
16196 | POST_IO |
16197 | RET(20) |
16198 | } |
16199 | |
16200 | // NOT |
16201 | OPCODE(0x46A7) |
16202 | { |
16203 | u32 adr, res; |
16204 | u32 src, dst; |
16205 | |
16206 | adr = AREG(7) - 4; |
16207 | AREG(7) = adr; |
16208 | PRE_IO |
16209 | READ_LONG_F(adr, src) |
16210 | res = ~src; |
16211 | flag_C = 0; |
16212 | flag_V = 0; |
16213 | flag_NotZ = res; |
16214 | flag_N = res >> 24; |
16215 | WRITE_LONG_F(adr, res) |
16216 | POST_IO |
16217 | RET(22) |
16218 | } |
16219 | |
16220 | // MOVESRa |
16221 | OPCODE(0x40C0) |
16222 | { |
16223 | u32 adr, res; |
16224 | u32 src, dst; |
16225 | |
16226 | res = GET_SR; |
16227 | DREGu16((Opcode >> 0) & 7) = res; |
16228 | RET(6) |
16229 | } |
16230 | |
16231 | // MOVESRa |
16232 | OPCODE(0x40D0) |
16233 | { |
16234 | u32 adr, res; |
16235 | u32 src, dst; |
16236 | |
16237 | res = GET_SR; |
16238 | adr = AREG((Opcode >> 0) & 7); |
16239 | PRE_IO |
16240 | WRITE_WORD_F(adr, res) |
16241 | POST_IO |
16242 | RET(12) |
16243 | } |
16244 | |
16245 | // MOVESRa |
16246 | OPCODE(0x40D8) |
16247 | { |
16248 | u32 adr, res; |
16249 | u32 src, dst; |
16250 | |
16251 | res = GET_SR; |
16252 | adr = AREG((Opcode >> 0) & 7); |
16253 | AREG((Opcode >> 0) & 7) += 2; |
16254 | PRE_IO |
16255 | WRITE_WORD_F(adr, res) |
16256 | POST_IO |
16257 | RET(12) |
16258 | } |
16259 | |
16260 | // MOVESRa |
16261 | OPCODE(0x40E0) |
16262 | { |
16263 | u32 adr, res; |
16264 | u32 src, dst; |
16265 | |
16266 | res = GET_SR; |
16267 | adr = AREG((Opcode >> 0) & 7) - 2; |
16268 | AREG((Opcode >> 0) & 7) = adr; |
16269 | PRE_IO |
16270 | WRITE_WORD_F(adr, res) |
16271 | POST_IO |
16272 | RET(14) |
16273 | } |
16274 | |
16275 | // MOVESRa |
16276 | OPCODE(0x40E8) |
16277 | { |
16278 | u32 adr, res; |
16279 | u32 src, dst; |
16280 | |
16281 | res = GET_SR; |
16282 | FETCH_SWORD(adr); |
16283 | adr += AREG((Opcode >> 0) & 7); |
16284 | PRE_IO |
16285 | WRITE_WORD_F(adr, res) |
16286 | POST_IO |
16287 | RET(16) |
16288 | } |
16289 | |
16290 | // MOVESRa |
16291 | OPCODE(0x40F0) |
16292 | { |
16293 | u32 adr, res; |
16294 | u32 src, dst; |
16295 | |
16296 | res = GET_SR; |
16297 | adr = AREG((Opcode >> 0) & 7); |
16298 | DECODE_EXT_WORD |
16299 | PRE_IO |
16300 | WRITE_WORD_F(adr, res) |
16301 | POST_IO |
16302 | RET(18) |
16303 | } |
16304 | |
16305 | // MOVESRa |
16306 | OPCODE(0x40F8) |
16307 | { |
16308 | u32 adr, res; |
16309 | u32 src, dst; |
16310 | |
16311 | res = GET_SR; |
16312 | FETCH_SWORD(adr); |
16313 | PRE_IO |
16314 | WRITE_WORD_F(adr, res) |
16315 | POST_IO |
16316 | RET(16) |
16317 | } |
16318 | |
16319 | // MOVESRa |
16320 | OPCODE(0x40F9) |
16321 | { |
16322 | u32 adr, res; |
16323 | u32 src, dst; |
16324 | |
16325 | res = GET_SR; |
16326 | FETCH_LONG(adr); |
16327 | PRE_IO |
16328 | WRITE_WORD_F(adr, res) |
16329 | POST_IO |
16330 | RET(20) |
16331 | } |
16332 | |
16333 | // MOVESRa |
16334 | OPCODE(0x40DF) |
16335 | { |
16336 | u32 adr, res; |
16337 | u32 src, dst; |
16338 | |
16339 | res = GET_SR; |
16340 | adr = AREG(7); |
16341 | AREG(7) += 2; |
16342 | PRE_IO |
16343 | WRITE_WORD_F(adr, res) |
16344 | POST_IO |
16345 | RET(12) |
16346 | } |
16347 | |
16348 | // MOVESRa |
16349 | OPCODE(0x40E7) |
16350 | { |
16351 | u32 adr, res; |
16352 | u32 src, dst; |
16353 | |
16354 | res = GET_SR; |
16355 | adr = AREG(7) - 2; |
16356 | AREG(7) = adr; |
16357 | PRE_IO |
16358 | WRITE_WORD_F(adr, res) |
16359 | POST_IO |
16360 | RET(14) |
16361 | } |
16362 | |
16363 | // MOVEaCCR |
16364 | OPCODE(0x44C0) |
16365 | { |
16366 | u32 adr, res; |
16367 | u32 src, dst; |
16368 | |
16369 | res = DREGu16((Opcode >> 0) & 7); |
16370 | SET_CCR(res) |
16371 | RET(12) |
16372 | } |
16373 | |
16374 | // MOVEaCCR |
16375 | OPCODE(0x44D0) |
16376 | { |
16377 | u32 adr, res; |
16378 | u32 src, dst; |
16379 | |
16380 | adr = AREG((Opcode >> 0) & 7); |
16381 | PRE_IO |
16382 | READ_WORD_F(adr, res) |
16383 | SET_CCR(res) |
16384 | POST_IO |
16385 | RET(16) |
16386 | } |
16387 | |
16388 | // MOVEaCCR |
16389 | OPCODE(0x44D8) |
16390 | { |
16391 | u32 adr, res; |
16392 | u32 src, dst; |
16393 | |
16394 | adr = AREG((Opcode >> 0) & 7); |
16395 | AREG((Opcode >> 0) & 7) += 2; |
16396 | PRE_IO |
16397 | READ_WORD_F(adr, res) |
16398 | SET_CCR(res) |
16399 | POST_IO |
16400 | RET(16) |
16401 | } |
16402 | |
16403 | // MOVEaCCR |
16404 | OPCODE(0x44E0) |
16405 | { |
16406 | u32 adr, res; |
16407 | u32 src, dst; |
16408 | |
16409 | adr = AREG((Opcode >> 0) & 7) - 2; |
16410 | AREG((Opcode >> 0) & 7) = adr; |
16411 | PRE_IO |
16412 | READ_WORD_F(adr, res) |
16413 | SET_CCR(res) |
16414 | POST_IO |
16415 | RET(18) |
16416 | } |
16417 | |
16418 | // MOVEaCCR |
16419 | OPCODE(0x44E8) |
16420 | { |
16421 | u32 adr, res; |
16422 | u32 src, dst; |
16423 | |
16424 | FETCH_SWORD(adr); |
16425 | adr += AREG((Opcode >> 0) & 7); |
16426 | PRE_IO |
16427 | READ_WORD_F(adr, res) |
16428 | SET_CCR(res) |
16429 | POST_IO |
16430 | RET(20) |
16431 | } |
16432 | |
16433 | // MOVEaCCR |
16434 | OPCODE(0x44F0) |
16435 | { |
16436 | u32 adr, res; |
16437 | u32 src, dst; |
16438 | |
16439 | adr = AREG((Opcode >> 0) & 7); |
16440 | DECODE_EXT_WORD |
16441 | PRE_IO |
16442 | READ_WORD_F(adr, res) |
16443 | SET_CCR(res) |
16444 | POST_IO |
16445 | RET(22) |
16446 | } |
16447 | |
16448 | // MOVEaCCR |
16449 | OPCODE(0x44F8) |
16450 | { |
16451 | u32 adr, res; |
16452 | u32 src, dst; |
16453 | |
16454 | FETCH_SWORD(adr); |
16455 | PRE_IO |
16456 | READ_WORD_F(adr, res) |
16457 | SET_CCR(res) |
16458 | POST_IO |
16459 | RET(20) |
16460 | } |
16461 | |
16462 | // MOVEaCCR |
16463 | OPCODE(0x44F9) |
16464 | { |
16465 | u32 adr, res; |
16466 | u32 src, dst; |
16467 | |
16468 | FETCH_LONG(adr); |
16469 | PRE_IO |
16470 | READ_WORD_F(adr, res) |
16471 | SET_CCR(res) |
16472 | POST_IO |
16473 | RET(24) |
16474 | } |
16475 | |
16476 | // MOVEaCCR |
16477 | OPCODE(0x44FA) |
16478 | { |
16479 | u32 adr, res; |
16480 | u32 src, dst; |
16481 | |
16482 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
16483 | PC++; |
16484 | PRE_IO |
16485 | READ_WORD_F(adr, res) |
16486 | SET_CCR(res) |
16487 | POST_IO |
16488 | RET(20) |
16489 | } |
16490 | |
16491 | // MOVEaCCR |
16492 | OPCODE(0x44FB) |
16493 | { |
16494 | u32 adr, res; |
16495 | u32 src, dst; |
16496 | |
16497 | adr = (u32)(PC) - BasePC; |
16498 | DECODE_EXT_WORD |
16499 | PRE_IO |
16500 | READ_WORD_F(adr, res) |
16501 | SET_CCR(res) |
16502 | POST_IO |
16503 | RET(22) |
16504 | } |
16505 | |
16506 | // MOVEaCCR |
16507 | OPCODE(0x44FC) |
16508 | { |
16509 | u32 adr, res; |
16510 | u32 src, dst; |
16511 | |
16512 | FETCH_WORD(res); |
16513 | SET_CCR(res) |
16514 | RET(16) |
16515 | } |
16516 | |
16517 | // MOVEaCCR |
16518 | OPCODE(0x44DF) |
16519 | { |
16520 | u32 adr, res; |
16521 | u32 src, dst; |
16522 | |
16523 | adr = AREG(7); |
16524 | AREG(7) += 2; |
16525 | PRE_IO |
16526 | READ_WORD_F(adr, res) |
16527 | SET_CCR(res) |
16528 | POST_IO |
16529 | RET(16) |
16530 | } |
16531 | |
16532 | // MOVEaCCR |
16533 | OPCODE(0x44E7) |
16534 | { |
16535 | u32 adr, res; |
16536 | u32 src, dst; |
16537 | |
16538 | adr = AREG(7) - 2; |
16539 | AREG(7) = adr; |
16540 | PRE_IO |
16541 | READ_WORD_F(adr, res) |
16542 | SET_CCR(res) |
16543 | POST_IO |
16544 | RET(18) |
16545 | } |
16546 | |
16547 | // MOVEaSR |
16548 | OPCODE(0x46C0) |
16549 | { |
16550 | u32 adr, res; |
16551 | u32 src, dst; |
16552 | |
16553 | if (flag_S) |
16554 | { |
16555 | res = DREGu16((Opcode >> 0) & 7); |
16556 | SET_SR(res) |
16557 | if (!flag_S) |
16558 | { |
16559 | res = AREG(7); |
16560 | AREG(7) = ASP; |
16561 | ASP = res; |
16562 | } |
16563 | CHECK_INT_TO_JUMP(12) |
16564 | } |
16565 | else |
16566 | { |
d0ae0cb4 |
16567 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16568 | RET(4) |
16569 | } |
16570 | RET(12) |
16571 | } |
16572 | |
16573 | // MOVEaSR |
16574 | OPCODE(0x46D0) |
16575 | { |
16576 | u32 adr, res; |
16577 | u32 src, dst; |
16578 | |
16579 | if (flag_S) |
16580 | { |
16581 | adr = AREG((Opcode >> 0) & 7); |
16582 | PRE_IO |
16583 | READ_WORD_F(adr, res) |
16584 | SET_SR(res) |
16585 | if (!flag_S) |
16586 | { |
16587 | res = AREG(7); |
16588 | AREG(7) = ASP; |
16589 | ASP = res; |
16590 | } |
16591 | POST_IO |
16592 | CHECK_INT_TO_JUMP(16) |
16593 | } |
16594 | else |
16595 | { |
d0ae0cb4 |
16596 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16597 | RET(4) |
16598 | } |
16599 | RET(16) |
16600 | } |
16601 | |
16602 | // MOVEaSR |
16603 | OPCODE(0x46D8) |
16604 | { |
16605 | u32 adr, res; |
16606 | u32 src, dst; |
16607 | |
16608 | if (flag_S) |
16609 | { |
16610 | adr = AREG((Opcode >> 0) & 7); |
16611 | AREG((Opcode >> 0) & 7) += 2; |
16612 | PRE_IO |
16613 | READ_WORD_F(adr, res) |
16614 | SET_SR(res) |
16615 | if (!flag_S) |
16616 | { |
16617 | res = AREG(7); |
16618 | AREG(7) = ASP; |
16619 | ASP = res; |
16620 | } |
16621 | POST_IO |
16622 | CHECK_INT_TO_JUMP(16) |
16623 | } |
16624 | else |
16625 | { |
d0ae0cb4 |
16626 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16627 | RET(4) |
16628 | } |
16629 | RET(16) |
16630 | } |
16631 | |
16632 | // MOVEaSR |
16633 | OPCODE(0x46E0) |
16634 | { |
16635 | u32 adr, res; |
16636 | u32 src, dst; |
16637 | |
16638 | if (flag_S) |
16639 | { |
16640 | adr = AREG((Opcode >> 0) & 7) - 2; |
16641 | AREG((Opcode >> 0) & 7) = adr; |
16642 | PRE_IO |
16643 | READ_WORD_F(adr, res) |
16644 | SET_SR(res) |
16645 | if (!flag_S) |
16646 | { |
16647 | res = AREG(7); |
16648 | AREG(7) = ASP; |
16649 | ASP = res; |
16650 | } |
16651 | POST_IO |
16652 | CHECK_INT_TO_JUMP(18) |
16653 | } |
16654 | else |
16655 | { |
d0ae0cb4 |
16656 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16657 | RET(4) |
16658 | } |
16659 | RET(18) |
16660 | } |
16661 | |
16662 | // MOVEaSR |
16663 | OPCODE(0x46E8) |
16664 | { |
16665 | u32 adr, res; |
16666 | u32 src, dst; |
16667 | |
16668 | if (flag_S) |
16669 | { |
16670 | FETCH_SWORD(adr); |
16671 | adr += AREG((Opcode >> 0) & 7); |
16672 | PRE_IO |
16673 | READ_WORD_F(adr, res) |
16674 | SET_SR(res) |
16675 | if (!flag_S) |
16676 | { |
16677 | res = AREG(7); |
16678 | AREG(7) = ASP; |
16679 | ASP = res; |
16680 | } |
16681 | POST_IO |
16682 | CHECK_INT_TO_JUMP(20) |
16683 | } |
16684 | else |
16685 | { |
d0ae0cb4 |
16686 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16687 | RET(4) |
16688 | } |
16689 | RET(20) |
16690 | } |
16691 | |
16692 | // MOVEaSR |
16693 | OPCODE(0x46F0) |
16694 | { |
16695 | u32 adr, res; |
16696 | u32 src, dst; |
16697 | |
16698 | if (flag_S) |
16699 | { |
16700 | adr = AREG((Opcode >> 0) & 7); |
16701 | DECODE_EXT_WORD |
16702 | PRE_IO |
16703 | READ_WORD_F(adr, res) |
16704 | SET_SR(res) |
16705 | if (!flag_S) |
16706 | { |
16707 | res = AREG(7); |
16708 | AREG(7) = ASP; |
16709 | ASP = res; |
16710 | } |
16711 | POST_IO |
16712 | CHECK_INT_TO_JUMP(22) |
16713 | } |
16714 | else |
16715 | { |
d0ae0cb4 |
16716 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16717 | RET(4) |
16718 | } |
16719 | RET(22) |
16720 | } |
16721 | |
16722 | |
16723 | // MOVEaSR |
16724 | OPCODE(0x46F8) |
16725 | { |
16726 | u32 adr, res; |
16727 | u32 src, dst; |
16728 | |
16729 | if (flag_S) |
16730 | { |
16731 | FETCH_SWORD(adr); |
16732 | PRE_IO |
16733 | READ_WORD_F(adr, res) |
16734 | SET_SR(res) |
16735 | if (!flag_S) |
16736 | { |
16737 | res = AREG(7); |
16738 | AREG(7) = ASP; |
16739 | ASP = res; |
16740 | } |
16741 | POST_IO |
16742 | CHECK_INT_TO_JUMP(20) |
16743 | } |
16744 | else |
16745 | { |
d0ae0cb4 |
16746 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16747 | RET(4) |
16748 | } |
16749 | RET(20) |
16750 | } |
16751 | |
16752 | // MOVEaSR |
16753 | OPCODE(0x46F9) |
16754 | { |
16755 | u32 adr, res; |
16756 | u32 src, dst; |
16757 | |
16758 | if (flag_S) |
16759 | { |
16760 | FETCH_LONG(adr); |
16761 | PRE_IO |
16762 | READ_WORD_F(adr, res) |
16763 | SET_SR(res) |
16764 | if (!flag_S) |
16765 | { |
16766 | res = AREG(7); |
16767 | AREG(7) = ASP; |
16768 | ASP = res; |
16769 | } |
16770 | POST_IO |
16771 | CHECK_INT_TO_JUMP(24) |
16772 | } |
16773 | else |
16774 | { |
d0ae0cb4 |
16775 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16776 | RET(4) |
16777 | } |
16778 | RET(24) |
16779 | } |
16780 | |
16781 | // MOVEaSR |
16782 | OPCODE(0x46FA) |
16783 | { |
16784 | u32 adr, res; |
16785 | u32 src, dst; |
16786 | |
16787 | if (flag_S) |
16788 | { |
16789 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
16790 | PC++; |
16791 | PRE_IO |
16792 | READ_WORD_F(adr, res) |
16793 | SET_SR(res) |
16794 | if (!flag_S) |
16795 | { |
16796 | res = AREG(7); |
16797 | AREG(7) = ASP; |
16798 | ASP = res; |
16799 | } |
16800 | POST_IO |
d0ae0cb4 |
16801 | CHECK_INT_TO_JUMP(20) |
70357ce5 |
16802 | } |
16803 | else |
16804 | { |
d0ae0cb4 |
16805 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16806 | RET(4) |
16807 | } |
16808 | RET(20) |
16809 | } |
16810 | |
16811 | // MOVEaSR |
16812 | OPCODE(0x46FB) |
16813 | { |
16814 | u32 adr, res; |
16815 | u32 src, dst; |
16816 | |
16817 | if (flag_S) |
16818 | { |
16819 | adr = (u32)(PC) - BasePC; |
16820 | DECODE_EXT_WORD |
16821 | PRE_IO |
16822 | READ_WORD_F(adr, res) |
16823 | SET_SR(res) |
16824 | if (!flag_S) |
16825 | { |
16826 | res = AREG(7); |
16827 | AREG(7) = ASP; |
16828 | ASP = res; |
16829 | } |
16830 | POST_IO |
16831 | CHECK_INT_TO_JUMP(22) |
16832 | } |
16833 | else |
16834 | { |
d0ae0cb4 |
16835 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16836 | RET(4) |
16837 | } |
16838 | RET(22) |
16839 | } |
16840 | |
16841 | // MOVEaSR |
16842 | OPCODE(0x46FC) |
16843 | { |
16844 | u32 adr, res; |
16845 | u32 src, dst; |
16846 | |
16847 | if (flag_S) |
16848 | { |
16849 | FETCH_WORD(res); |
16850 | SET_SR(res) |
16851 | if (!flag_S) |
16852 | { |
16853 | res = AREG(7); |
16854 | AREG(7) = ASP; |
16855 | ASP = res; |
16856 | } |
16857 | CHECK_INT_TO_JUMP(16) |
16858 | } |
16859 | else |
16860 | { |
d0ae0cb4 |
16861 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16862 | RET(4) |
16863 | } |
16864 | RET(16) |
16865 | } |
16866 | |
16867 | // MOVEaSR |
16868 | OPCODE(0x46DF) |
16869 | { |
16870 | u32 adr, res; |
16871 | u32 src, dst; |
16872 | |
16873 | if (flag_S) |
16874 | { |
16875 | adr = AREG(7); |
16876 | AREG(7) += 2; |
16877 | PRE_IO |
16878 | READ_WORD_F(adr, res) |
16879 | SET_SR(res) |
16880 | if (!flag_S) |
16881 | { |
16882 | res = AREG(7); |
16883 | AREG(7) = ASP; |
16884 | ASP = res; |
16885 | } |
16886 | POST_IO |
16887 | CHECK_INT_TO_JUMP(16) |
16888 | } |
16889 | else |
16890 | { |
d0ae0cb4 |
16891 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16892 | RET(4) |
16893 | } |
16894 | RET(16) |
16895 | } |
16896 | |
16897 | // MOVEaSR |
16898 | OPCODE(0x46E7) |
16899 | { |
16900 | u32 adr, res; |
16901 | u32 src, dst; |
16902 | |
16903 | if (flag_S) |
16904 | { |
16905 | adr = AREG(7) - 2; |
16906 | AREG(7) = adr; |
16907 | PRE_IO |
16908 | READ_WORD_F(adr, res) |
16909 | SET_SR(res) |
16910 | if (!flag_S) |
16911 | { |
16912 | res = AREG(7); |
16913 | AREG(7) = ASP; |
16914 | ASP = res; |
16915 | } |
16916 | POST_IO |
16917 | CHECK_INT_TO_JUMP(18) |
16918 | } |
16919 | else |
16920 | { |
d0ae0cb4 |
16921 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16922 | RET(4) |
16923 | } |
16924 | RET(18) |
16925 | } |
16926 | |
16927 | // NBCD |
16928 | OPCODE(0x4800) |
16929 | { |
16930 | u32 adr, res; |
16931 | u32 src, dst; |
16932 | |
16933 | res = DREGu8((Opcode >> 0) & 7); |
16934 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16935 | |
16936 | if (res != 0x9a) |
16937 | { |
16938 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16939 | res &= 0xFF; |
16940 | DREGu8((Opcode >> 0) & 7) = res; |
16941 | flag_NotZ |= res; |
16942 | flag_X = flag_C = M68K_SR_C; |
16943 | } |
16944 | else flag_X = flag_C = 0; |
16945 | flag_N = res; |
16946 | RET(6) |
16947 | } |
16948 | |
16949 | // NBCD |
16950 | OPCODE(0x4810) |
16951 | { |
16952 | u32 adr, res; |
16953 | u32 src, dst; |
16954 | |
16955 | adr = AREG((Opcode >> 0) & 7); |
16956 | PRE_IO |
16957 | READ_BYTE_F(adr, res) |
16958 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16959 | |
16960 | if (res != 0x9a) |
16961 | { |
16962 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16963 | res &= 0xFF; |
16964 | WRITE_BYTE_F(adr, res) |
16965 | flag_NotZ |= res; |
16966 | flag_X = flag_C = M68K_SR_C; |
16967 | } |
16968 | else flag_X = flag_C = 0; |
16969 | flag_N = res; |
16970 | POST_IO |
16971 | RET(12) |
16972 | } |
16973 | |
16974 | // NBCD |
16975 | OPCODE(0x4818) |
16976 | { |
16977 | u32 adr, res; |
16978 | u32 src, dst; |
16979 | |
16980 | adr = AREG((Opcode >> 0) & 7); |
16981 | AREG((Opcode >> 0) & 7) += 1; |
16982 | PRE_IO |
16983 | READ_BYTE_F(adr, res) |
16984 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16985 | |
16986 | if (res != 0x9a) |
16987 | { |
16988 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16989 | res &= 0xFF; |
16990 | WRITE_BYTE_F(adr, res) |
16991 | flag_NotZ |= res; |
16992 | flag_X = flag_C = M68K_SR_C; |
16993 | } |
16994 | else flag_X = flag_C = 0; |
16995 | flag_N = res; |
16996 | POST_IO |
16997 | RET(12) |
16998 | } |
16999 | |
17000 | // NBCD |
17001 | OPCODE(0x4820) |
17002 | { |
17003 | u32 adr, res; |
17004 | u32 src, dst; |
17005 | |
17006 | adr = AREG((Opcode >> 0) & 7) - 1; |
17007 | AREG((Opcode >> 0) & 7) = adr; |
17008 | PRE_IO |
17009 | READ_BYTE_F(adr, res) |
17010 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17011 | |
17012 | if (res != 0x9a) |
17013 | { |
17014 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17015 | res &= 0xFF; |
17016 | WRITE_BYTE_F(adr, res) |
17017 | flag_NotZ |= res; |
17018 | flag_X = flag_C = M68K_SR_C; |
17019 | } |
17020 | else flag_X = flag_C = 0; |
17021 | flag_N = res; |
17022 | POST_IO |
17023 | RET(14) |
17024 | } |
17025 | |
17026 | // NBCD |
17027 | OPCODE(0x4828) |
17028 | { |
17029 | u32 adr, res; |
17030 | u32 src, dst; |
17031 | |
17032 | FETCH_SWORD(adr); |
17033 | adr += AREG((Opcode >> 0) & 7); |
17034 | PRE_IO |
17035 | READ_BYTE_F(adr, res) |
17036 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17037 | |
17038 | if (res != 0x9a) |
17039 | { |
17040 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17041 | res &= 0xFF; |
17042 | WRITE_BYTE_F(adr, res) |
17043 | flag_NotZ |= res; |
17044 | flag_X = flag_C = M68K_SR_C; |
17045 | } |
17046 | else flag_X = flag_C = 0; |
17047 | flag_N = res; |
17048 | POST_IO |
17049 | RET(16) |
17050 | } |
17051 | |
17052 | // NBCD |
17053 | OPCODE(0x4830) |
17054 | { |
17055 | u32 adr, res; |
17056 | u32 src, dst; |
17057 | |
17058 | adr = AREG((Opcode >> 0) & 7); |
17059 | DECODE_EXT_WORD |
17060 | PRE_IO |
17061 | READ_BYTE_F(adr, res) |
17062 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17063 | |
17064 | if (res != 0x9a) |
17065 | { |
17066 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17067 | res &= 0xFF; |
17068 | WRITE_BYTE_F(adr, res) |
17069 | flag_NotZ |= res; |
17070 | flag_X = flag_C = M68K_SR_C; |
17071 | } |
17072 | else flag_X = flag_C = 0; |
17073 | flag_N = res; |
17074 | POST_IO |
17075 | RET(18) |
17076 | } |
17077 | |
17078 | // NBCD |
17079 | OPCODE(0x4838) |
17080 | { |
17081 | u32 adr, res; |
17082 | u32 src, dst; |
17083 | |
17084 | FETCH_SWORD(adr); |
17085 | PRE_IO |
17086 | READ_BYTE_F(adr, res) |
17087 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17088 | |
17089 | if (res != 0x9a) |
17090 | { |
17091 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17092 | res &= 0xFF; |
17093 | WRITE_BYTE_F(adr, res) |
17094 | flag_NotZ |= res; |
17095 | flag_X = flag_C = M68K_SR_C; |
17096 | } |
17097 | else flag_X = flag_C = 0; |
17098 | flag_N = res; |
17099 | POST_IO |
17100 | RET(16) |
17101 | } |
17102 | |
17103 | // NBCD |
17104 | OPCODE(0x4839) |
17105 | { |
17106 | u32 adr, res; |
17107 | u32 src, dst; |
17108 | |
17109 | FETCH_LONG(adr); |
17110 | PRE_IO |
17111 | READ_BYTE_F(adr, res) |
17112 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17113 | |
17114 | if (res != 0x9a) |
17115 | { |
17116 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17117 | res &= 0xFF; |
17118 | WRITE_BYTE_F(adr, res) |
17119 | flag_NotZ |= res; |
17120 | flag_X = flag_C = M68K_SR_C; |
17121 | } |
17122 | else flag_X = flag_C = 0; |
17123 | flag_N = res; |
17124 | POST_IO |
17125 | RET(20) |
17126 | } |
17127 | |
17128 | // NBCD |
17129 | OPCODE(0x481F) |
17130 | { |
17131 | u32 adr, res; |
17132 | u32 src, dst; |
17133 | |
17134 | adr = AREG(7); |
17135 | AREG(7) += 2; |
17136 | PRE_IO |
17137 | READ_BYTE_F(adr, res) |
17138 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17139 | |
17140 | if (res != 0x9a) |
17141 | { |
17142 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17143 | res &= 0xFF; |
17144 | WRITE_BYTE_F(adr, res) |
17145 | flag_NotZ |= res; |
17146 | flag_X = flag_C = M68K_SR_C; |
17147 | } |
17148 | else flag_X = flag_C = 0; |
17149 | flag_N = res; |
17150 | POST_IO |
17151 | RET(12) |
17152 | } |
17153 | |
17154 | // NBCD |
17155 | OPCODE(0x4827) |
17156 | { |
17157 | u32 adr, res; |
17158 | u32 src, dst; |
17159 | |
17160 | adr = AREG(7) - 2; |
17161 | AREG(7) = adr; |
17162 | PRE_IO |
17163 | READ_BYTE_F(adr, res) |
17164 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17165 | |
17166 | if (res != 0x9a) |
17167 | { |
17168 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17169 | res &= 0xFF; |
17170 | WRITE_BYTE_F(adr, res) |
17171 | flag_NotZ |= res; |
17172 | flag_X = flag_C = M68K_SR_C; |
17173 | } |
17174 | else flag_X = flag_C = 0; |
17175 | flag_N = res; |
17176 | POST_IO |
17177 | RET(14) |
17178 | } |
17179 | |
17180 | // PEA |
17181 | OPCODE(0x4850) |
17182 | { |
17183 | u32 adr, res; |
17184 | u32 src, dst; |
17185 | |
17186 | adr = AREG((Opcode >> 0) & 7); |
17187 | PRE_IO |
17188 | PUSH_32_F(adr) |
17189 | POST_IO |
17190 | RET(12) |
17191 | } |
17192 | |
17193 | // PEA |
17194 | OPCODE(0x4868) |
17195 | { |
17196 | u32 adr, res; |
17197 | u32 src, dst; |
17198 | |
17199 | FETCH_SWORD(adr); |
17200 | adr += AREG((Opcode >> 0) & 7); |
17201 | PRE_IO |
17202 | PUSH_32_F(adr) |
17203 | POST_IO |
17204 | RET(16) |
17205 | } |
17206 | |
17207 | // PEA |
17208 | OPCODE(0x4870) |
17209 | { |
17210 | u32 adr, res; |
17211 | u32 src, dst; |
17212 | |
17213 | adr = AREG((Opcode >> 0) & 7); |
17214 | DECODE_EXT_WORD |
17215 | PRE_IO |
17216 | PUSH_32_F(adr) |
17217 | POST_IO |
17218 | RET(20) |
17219 | } |
17220 | |
17221 | // PEA |
17222 | OPCODE(0x4878) |
17223 | { |
17224 | u32 adr, res; |
17225 | u32 src, dst; |
17226 | |
17227 | FETCH_SWORD(adr); |
17228 | PRE_IO |
17229 | PUSH_32_F(adr) |
17230 | POST_IO |
17231 | RET(16) |
17232 | } |
17233 | |
17234 | // PEA |
17235 | OPCODE(0x4879) |
17236 | { |
17237 | u32 adr, res; |
17238 | u32 src, dst; |
17239 | |
17240 | FETCH_LONG(adr); |
17241 | PRE_IO |
17242 | PUSH_32_F(adr) |
17243 | POST_IO |
17244 | RET(20) |
17245 | } |
17246 | |
17247 | // PEA |
17248 | OPCODE(0x487A) |
17249 | { |
17250 | u32 adr, res; |
17251 | u32 src, dst; |
17252 | |
17253 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
17254 | PC++; |
17255 | PRE_IO |
17256 | PUSH_32_F(adr) |
17257 | POST_IO |
17258 | RET(16) |
17259 | } |
17260 | |
17261 | // PEA |
17262 | OPCODE(0x487B) |
17263 | { |
17264 | u32 adr, res; |
17265 | u32 src, dst; |
17266 | |
17267 | adr = (u32)(PC) - BasePC; |
17268 | DECODE_EXT_WORD |
17269 | PRE_IO |
17270 | PUSH_32_F(adr) |
17271 | POST_IO |
17272 | RET(20) |
17273 | } |
17274 | |
17275 | // SWAP |
17276 | OPCODE(0x4840) |
17277 | { |
17278 | u32 adr, res; |
17279 | u32 src, dst; |
17280 | |
17281 | res = DREGu32((Opcode >> 0) & 7); |
17282 | res = (res >> 16) | (res << 16); |
17283 | flag_C = 0; |
17284 | flag_V = 0; |
17285 | flag_NotZ = res; |
17286 | flag_N = res >> 24; |
17287 | DREGu32((Opcode >> 0) & 7) = res; |
17288 | RET(4) |
17289 | } |
17290 | |
17291 | // MOVEMRa |
17292 | OPCODE(0x4890) |
17293 | { |
17294 | u32 adr, res; |
17295 | u32 src, dst; |
17296 | |
17297 | u32 *psrc; |
17298 | |
17299 | FETCH_WORD(res); |
17300 | adr = AREG((Opcode >> 0) & 7); |
17301 | psrc = &DREGu32(0); |
17302 | dst = adr; |
17303 | PRE_IO |
17304 | do |
17305 | { |
17306 | if (res & 1) |
17307 | { |
17308 | WRITE_WORD_F(adr, *psrc) |
17309 | adr += 2; |
17310 | } |
17311 | psrc++; |
17312 | } while (res >>= 1); |
17313 | POST_IO |
17314 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17315 | #ifdef USE_CYCLONE_TIMING |
17316 | RET(8) |
17317 | #else |
17318 | RET(12) |
17319 | #endif |
17320 | } |
17321 | |
17322 | // MOVEMRa |
17323 | OPCODE(0x48A0) |
17324 | { |
17325 | u32 adr, res; |
17326 | u32 src, dst; |
17327 | |
17328 | u32 *psrc; |
17329 | |
17330 | FETCH_WORD(res); |
17331 | adr = AREG((Opcode >> 0) & 7); |
17332 | psrc = &AREGu32(7); |
17333 | dst = adr; |
17334 | PRE_IO |
17335 | do |
17336 | { |
17337 | if (res & 1) |
17338 | { |
17339 | adr -= 2; |
17340 | WRITE_WORD_F(adr, *psrc) |
17341 | } |
17342 | psrc--; |
17343 | } while (res >>= 1); |
17344 | AREG((Opcode >> 0) & 7) = adr; |
17345 | POST_IO |
17346 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17347 | RET(8) |
17348 | } |
17349 | |
17350 | // MOVEMRa |
17351 | OPCODE(0x48A8) |
17352 | { |
17353 | u32 adr, res; |
17354 | u32 src, dst; |
17355 | |
17356 | u32 *psrc; |
17357 | |
17358 | FETCH_WORD(res); |
17359 | FETCH_SWORD(adr); |
17360 | adr += AREG((Opcode >> 0) & 7); |
17361 | psrc = &DREGu32(0); |
17362 | dst = adr; |
17363 | PRE_IO |
17364 | do |
17365 | { |
17366 | if (res & 1) |
17367 | { |
17368 | WRITE_WORD_F(adr, *psrc) |
17369 | adr += 2; |
17370 | } |
17371 | psrc++; |
17372 | } while (res >>= 1); |
17373 | POST_IO |
17374 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17375 | #ifdef USE_CYCLONE_TIMING |
17376 | RET(12) |
17377 | #else |
17378 | RET(20) |
17379 | #endif |
17380 | } |
17381 | |
17382 | // MOVEMRa |
17383 | OPCODE(0x48B0) |
17384 | { |
17385 | u32 adr, res; |
17386 | u32 src, dst; |
17387 | |
17388 | u32 *psrc; |
17389 | |
17390 | FETCH_WORD(res); |
17391 | adr = AREG((Opcode >> 0) & 7); |
17392 | DECODE_EXT_WORD |
17393 | psrc = &DREGu32(0); |
17394 | dst = adr; |
17395 | PRE_IO |
17396 | do |
17397 | { |
17398 | if (res & 1) |
17399 | { |
17400 | WRITE_WORD_F(adr, *psrc) |
17401 | adr += 2; |
17402 | } |
17403 | psrc++; |
17404 | } while (res >>= 1); |
17405 | POST_IO |
17406 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17407 | #ifdef USE_CYCLONE_TIMING |
17408 | RET(14) |
17409 | #else |
17410 | RET(24) |
17411 | #endif |
17412 | } |
17413 | |
17414 | // MOVEMRa |
17415 | OPCODE(0x48B8) |
17416 | { |
17417 | u32 adr, res; |
17418 | u32 src, dst; |
17419 | |
17420 | u32 *psrc; |
17421 | |
17422 | FETCH_WORD(res); |
17423 | FETCH_SWORD(adr); |
17424 | psrc = &DREGu32(0); |
17425 | dst = adr; |
17426 | PRE_IO |
17427 | do |
17428 | { |
17429 | if (res & 1) |
17430 | { |
17431 | WRITE_WORD_F(adr, *psrc) |
17432 | adr += 2; |
17433 | } |
17434 | psrc++; |
17435 | } while (res >>= 1); |
17436 | POST_IO |
17437 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17438 | #ifdef USE_CYCLONE_TIMING |
17439 | RET(12) |
17440 | #else |
17441 | RET(20) |
17442 | #endif |
17443 | } |
17444 | |
17445 | // MOVEMRa |
17446 | OPCODE(0x48B9) |
17447 | { |
17448 | u32 adr, res; |
17449 | u32 src, dst; |
17450 | |
17451 | u32 *psrc; |
17452 | |
17453 | FETCH_WORD(res); |
17454 | FETCH_LONG(adr); |
17455 | psrc = &DREGu32(0); |
17456 | dst = adr; |
17457 | PRE_IO |
17458 | do |
17459 | { |
17460 | if (res & 1) |
17461 | { |
17462 | WRITE_WORD_F(adr, *psrc) |
17463 | adr += 2; |
17464 | } |
17465 | psrc++; |
17466 | } while (res >>= 1); |
17467 | POST_IO |
17468 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17469 | #ifdef USE_CYCLONE_TIMING |
17470 | RET(16) |
17471 | #else |
17472 | RET(28) |
17473 | #endif |
17474 | } |
17475 | |
17476 | // MOVEMRa |
17477 | OPCODE(0x48A7) |
17478 | { |
17479 | u32 adr, res; |
17480 | u32 src, dst; |
17481 | |
17482 | u32 *psrc; |
17483 | |
17484 | FETCH_WORD(res); |
17485 | adr = AREG(7); |
17486 | psrc = &AREGu32(7); |
17487 | dst = adr; |
17488 | PRE_IO |
17489 | do |
17490 | { |
17491 | if (res & 1) |
17492 | { |
17493 | adr -= 2; |
17494 | WRITE_WORD_F(adr, *psrc) |
17495 | } |
17496 | psrc--; |
17497 | } while (res >>= 1); |
17498 | AREG(7) = adr; |
17499 | POST_IO |
17500 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17501 | RET(8) |
17502 | } |
17503 | |
17504 | // MOVEMRa |
17505 | OPCODE(0x48D0) |
17506 | { |
17507 | u32 adr, res; |
17508 | u32 src, dst; |
17509 | |
17510 | u32 *psrc; |
17511 | |
17512 | FETCH_WORD(res); |
17513 | adr = AREG((Opcode >> 0) & 7); |
17514 | psrc = &DREGu32(0); |
17515 | dst = adr; |
17516 | PRE_IO |
17517 | do |
17518 | { |
17519 | if (res & 1) |
17520 | { |
17521 | WRITE_LONG_F(adr, *psrc) |
17522 | adr += 4; |
17523 | } |
17524 | psrc++; |
17525 | } while (res >>= 1); |
17526 | POST_IO |
17527 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17528 | #ifdef USE_CYCLONE_TIMING |
17529 | RET(8) |
17530 | #else |
17531 | RET(16) |
17532 | #endif |
17533 | } |
17534 | |
17535 | // MOVEMRa |
17536 | OPCODE(0x48E0) |
17537 | { |
17538 | u32 adr, res; |
17539 | u32 src, dst; |
17540 | |
17541 | u32 *psrc; |
17542 | |
17543 | FETCH_WORD(res); |
17544 | adr = AREG((Opcode >> 0) & 7); |
17545 | psrc = &AREGu32(7); |
17546 | dst = adr; |
17547 | PRE_IO |
17548 | do |
17549 | { |
17550 | if (res & 1) |
17551 | { |
17552 | adr -= 4; |
17553 | WRITE_LONG_DEC_F(adr, *psrc) |
17554 | } |
17555 | psrc--; |
17556 | } while (res >>= 1); |
17557 | AREG((Opcode >> 0) & 7) = adr; |
17558 | POST_IO |
17559 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17560 | RET(8) |
17561 | } |
17562 | |
17563 | // MOVEMRa |
17564 | OPCODE(0x48E8) |
17565 | { |
17566 | u32 adr, res; |
17567 | u32 src, dst; |
17568 | |
17569 | u32 *psrc; |
17570 | |
17571 | FETCH_WORD(res); |
17572 | FETCH_SWORD(adr); |
17573 | adr += AREG((Opcode >> 0) & 7); |
17574 | psrc = &DREGu32(0); |
17575 | dst = adr; |
17576 | PRE_IO |
17577 | do |
17578 | { |
17579 | if (res & 1) |
17580 | { |
17581 | WRITE_LONG_F(adr, *psrc) |
17582 | adr += 4; |
17583 | } |
17584 | psrc++; |
17585 | } while (res >>= 1); |
17586 | POST_IO |
17587 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17588 | #ifdef USE_CYCLONE_TIMING |
17589 | RET(12) |
17590 | #else |
17591 | RET(24) |
17592 | #endif |
17593 | } |
17594 | |
17595 | // MOVEMRa |
17596 | OPCODE(0x48F0) |
17597 | { |
17598 | u32 adr, res; |
17599 | u32 src, dst; |
17600 | |
17601 | u32 *psrc; |
17602 | |
17603 | FETCH_WORD(res); |
17604 | adr = AREG((Opcode >> 0) & 7); |
17605 | DECODE_EXT_WORD |
17606 | psrc = &DREGu32(0); |
17607 | dst = adr; |
17608 | PRE_IO |
17609 | do |
17610 | { |
17611 | if (res & 1) |
17612 | { |
17613 | WRITE_LONG_F(adr, *psrc) |
17614 | adr += 4; |
17615 | } |
17616 | psrc++; |
17617 | } while (res >>= 1); |
17618 | POST_IO |
17619 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17620 | #ifdef USE_CYCLONE_TIMING |
17621 | RET(14) |
17622 | #else |
17623 | RET(28) |
17624 | #endif |
17625 | } |
17626 | |
17627 | // MOVEMRa |
17628 | OPCODE(0x48F8) |
17629 | { |
17630 | u32 adr, res; |
17631 | u32 src, dst; |
17632 | |
17633 | u32 *psrc; |
17634 | |
17635 | FETCH_WORD(res); |
17636 | FETCH_SWORD(adr); |
17637 | psrc = &DREGu32(0); |
17638 | dst = adr; |
17639 | PRE_IO |
17640 | do |
17641 | { |
17642 | if (res & 1) |
17643 | { |
17644 | WRITE_LONG_F(adr, *psrc) |
17645 | adr += 4; |
17646 | } |
17647 | psrc++; |
17648 | } while (res >>= 1); |
17649 | POST_IO |
17650 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17651 | #ifdef USE_CYCLONE_TIMING |
17652 | RET(12) |
17653 | #else |
17654 | RET(24) |
17655 | #endif |
17656 | } |
17657 | |
17658 | // MOVEMRa |
17659 | OPCODE(0x48F9) |
17660 | { |
17661 | u32 adr, res; |
17662 | u32 src, dst; |
17663 | |
17664 | u32 *psrc; |
17665 | |
17666 | FETCH_WORD(res); |
17667 | FETCH_LONG(adr); |
17668 | psrc = &DREGu32(0); |
17669 | dst = adr; |
17670 | PRE_IO |
17671 | do |
17672 | { |
17673 | if (res & 1) |
17674 | { |
17675 | WRITE_LONG_F(adr, *psrc) |
17676 | adr += 4; |
17677 | } |
17678 | psrc++; |
17679 | } while (res >>= 1); |
17680 | POST_IO |
17681 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17682 | #ifdef USE_CYCLONE_TIMING |
17683 | RET(16) |
17684 | #else |
17685 | RET(32) |
17686 | #endif |
17687 | } |
17688 | |
17689 | // MOVEMRa |
17690 | OPCODE(0x48E7) |
17691 | { |
17692 | u32 adr, res; |
17693 | u32 src, dst; |
17694 | |
17695 | u32 *psrc; |
17696 | |
17697 | FETCH_WORD(res); |
17698 | adr = AREG(7); |
17699 | psrc = &AREGu32(7); |
17700 | dst = adr; |
17701 | PRE_IO |
17702 | do |
17703 | { |
17704 | if (res & 1) |
17705 | { |
17706 | adr -= 4; |
17707 | WRITE_LONG_DEC_F(adr, *psrc) |
17708 | } |
17709 | psrc--; |
17710 | } while (res >>= 1); |
17711 | AREG(7) = adr; |
17712 | POST_IO |
17713 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17714 | RET(8) |
17715 | } |
17716 | |
17717 | // EXT |
17718 | OPCODE(0x4880) |
17719 | { |
17720 | u32 adr, res; |
17721 | u32 src, dst; |
17722 | |
17723 | res = (s32)DREGs8((Opcode >> 0) & 7); |
17724 | flag_C = 0; |
17725 | flag_V = 0; |
17726 | flag_NotZ = res; |
17727 | flag_N = res; |
17728 | DREGu16((Opcode >> 0) & 7) = res; |
17729 | RET(4) |
17730 | } |
17731 | |
17732 | // EXT |
17733 | OPCODE(0x48C0) |
17734 | { |
17735 | u32 adr, res; |
17736 | u32 src, dst; |
17737 | |
17738 | res = (s32)DREGs16((Opcode >> 0) & 7); |
17739 | flag_C = 0; |
17740 | flag_V = 0; |
17741 | flag_NotZ = res; |
17742 | flag_N = res >> 8; |
17743 | DREGu32((Opcode >> 0) & 7) = res; |
17744 | RET(4) |
17745 | } |
17746 | |
17747 | // TST |
17748 | OPCODE(0x4A00) |
17749 | { |
17750 | u32 adr, res; |
17751 | u32 src, dst; |
17752 | |
17753 | res = DREGu8((Opcode >> 0) & 7); |
17754 | flag_C = 0; |
17755 | flag_V = 0; |
17756 | flag_NotZ = res; |
17757 | flag_N = res; |
17758 | RET(4) |
17759 | } |
17760 | |
17761 | // TST |
17762 | OPCODE(0x4A10) |
17763 | { |
17764 | u32 adr, res; |
17765 | u32 src, dst; |
17766 | |
17767 | adr = AREG((Opcode >> 0) & 7); |
17768 | PRE_IO |
17769 | READ_BYTE_F(adr, res) |
17770 | flag_C = 0; |
17771 | flag_V = 0; |
17772 | flag_NotZ = res; |
17773 | flag_N = res; |
17774 | POST_IO |
17775 | RET(8) |
17776 | } |
17777 | |
17778 | // TST |
17779 | OPCODE(0x4A18) |
17780 | { |
17781 | u32 adr, res; |
17782 | u32 src, dst; |
17783 | |
17784 | adr = AREG((Opcode >> 0) & 7); |
17785 | AREG((Opcode >> 0) & 7) += 1; |
17786 | PRE_IO |
17787 | READ_BYTE_F(adr, res) |
17788 | flag_C = 0; |
17789 | flag_V = 0; |
17790 | flag_NotZ = res; |
17791 | flag_N = res; |
17792 | POST_IO |
17793 | RET(8) |
17794 | } |
17795 | |
17796 | // TST |
17797 | OPCODE(0x4A20) |
17798 | { |
17799 | u32 adr, res; |
17800 | u32 src, dst; |
17801 | |
17802 | adr = AREG((Opcode >> 0) & 7) - 1; |
17803 | AREG((Opcode >> 0) & 7) = adr; |
17804 | PRE_IO |
17805 | READ_BYTE_F(adr, res) |
17806 | flag_C = 0; |
17807 | flag_V = 0; |
17808 | flag_NotZ = res; |
17809 | flag_N = res; |
17810 | POST_IO |
17811 | RET(10) |
17812 | } |
17813 | |
17814 | // TST |
17815 | OPCODE(0x4A28) |
17816 | { |
17817 | u32 adr, res; |
17818 | u32 src, dst; |
17819 | |
17820 | FETCH_SWORD(adr); |
17821 | adr += AREG((Opcode >> 0) & 7); |
17822 | PRE_IO |
17823 | READ_BYTE_F(adr, res) |
17824 | flag_C = 0; |
17825 | flag_V = 0; |
17826 | flag_NotZ = res; |
17827 | flag_N = res; |
17828 | POST_IO |
17829 | RET(12) |
17830 | } |
17831 | |
17832 | // TST |
17833 | OPCODE(0x4A30) |
17834 | { |
17835 | u32 adr, res; |
17836 | u32 src, dst; |
17837 | |
17838 | adr = AREG((Opcode >> 0) & 7); |
17839 | DECODE_EXT_WORD |
17840 | PRE_IO |
17841 | READ_BYTE_F(adr, res) |
17842 | flag_C = 0; |
17843 | flag_V = 0; |
17844 | flag_NotZ = res; |
17845 | flag_N = res; |
17846 | POST_IO |
17847 | RET(14) |
17848 | } |
17849 | |
17850 | // TST |
17851 | OPCODE(0x4A38) |
17852 | { |
17853 | u32 adr, res; |
17854 | u32 src, dst; |
17855 | |
17856 | FETCH_SWORD(adr); |
17857 | PRE_IO |
17858 | READ_BYTE_F(adr, res) |
17859 | flag_C = 0; |
17860 | flag_V = 0; |
17861 | flag_NotZ = res; |
17862 | flag_N = res; |
17863 | POST_IO |
17864 | RET(12) |
17865 | } |
17866 | |
17867 | // TST |
17868 | OPCODE(0x4A39) |
17869 | { |
17870 | u32 adr, res; |
17871 | u32 src, dst; |
17872 | |
17873 | FETCH_LONG(adr); |
17874 | PRE_IO |
17875 | READ_BYTE_F(adr, res) |
17876 | flag_C = 0; |
17877 | flag_V = 0; |
17878 | flag_NotZ = res; |
17879 | flag_N = res; |
17880 | POST_IO |
17881 | RET(16) |
17882 | } |
17883 | |
17884 | // TST |
17885 | OPCODE(0x4A1F) |
17886 | { |
17887 | u32 adr, res; |
17888 | u32 src, dst; |
17889 | |
17890 | adr = AREG(7); |
17891 | AREG(7) += 2; |
17892 | PRE_IO |
17893 | READ_BYTE_F(adr, res) |
17894 | flag_C = 0; |
17895 | flag_V = 0; |
17896 | flag_NotZ = res; |
17897 | flag_N = res; |
17898 | POST_IO |
17899 | RET(8) |
17900 | } |
17901 | |
17902 | // TST |
17903 | OPCODE(0x4A27) |
17904 | { |
17905 | u32 adr, res; |
17906 | u32 src, dst; |
17907 | |
17908 | adr = AREG(7) - 2; |
17909 | AREG(7) = adr; |
17910 | PRE_IO |
17911 | READ_BYTE_F(adr, res) |
17912 | flag_C = 0; |
17913 | flag_V = 0; |
17914 | flag_NotZ = res; |
17915 | flag_N = res; |
17916 | POST_IO |
17917 | RET(10) |
17918 | } |
17919 | |
17920 | // TST |
17921 | OPCODE(0x4A40) |
17922 | { |
17923 | u32 adr, res; |
17924 | u32 src, dst; |
17925 | |
17926 | res = DREGu16((Opcode >> 0) & 7); |
17927 | flag_C = 0; |
17928 | flag_V = 0; |
17929 | flag_NotZ = res; |
17930 | flag_N = res >> 8; |
17931 | RET(4) |
17932 | } |
17933 | |
17934 | // TST |
17935 | OPCODE(0x4A50) |
17936 | { |
17937 | u32 adr, res; |
17938 | u32 src, dst; |
17939 | |
17940 | adr = AREG((Opcode >> 0) & 7); |
17941 | PRE_IO |
17942 | READ_WORD_F(adr, res) |
17943 | flag_C = 0; |
17944 | flag_V = 0; |
17945 | flag_NotZ = res; |
17946 | flag_N = res >> 8; |
17947 | POST_IO |
17948 | RET(8) |
17949 | } |
17950 | |
17951 | // TST |
17952 | OPCODE(0x4A58) |
17953 | { |
17954 | u32 adr, res; |
17955 | u32 src, dst; |
17956 | |
17957 | adr = AREG((Opcode >> 0) & 7); |
17958 | AREG((Opcode >> 0) & 7) += 2; |
17959 | PRE_IO |
17960 | READ_WORD_F(adr, res) |
17961 | flag_C = 0; |
17962 | flag_V = 0; |
17963 | flag_NotZ = res; |
17964 | flag_N = res >> 8; |
17965 | POST_IO |
17966 | RET(8) |
17967 | } |
17968 | |
17969 | // TST |
17970 | OPCODE(0x4A60) |
17971 | { |
17972 | u32 adr, res; |
17973 | u32 src, dst; |
17974 | |
17975 | adr = AREG((Opcode >> 0) & 7) - 2; |
17976 | AREG((Opcode >> 0) & 7) = adr; |
17977 | PRE_IO |
17978 | READ_WORD_F(adr, res) |
17979 | flag_C = 0; |
17980 | flag_V = 0; |
17981 | flag_NotZ = res; |
17982 | flag_N = res >> 8; |
17983 | POST_IO |
17984 | RET(10) |
17985 | } |
17986 | |
17987 | // TST |
17988 | OPCODE(0x4A68) |
17989 | { |
17990 | u32 adr, res; |
17991 | u32 src, dst; |
17992 | |
17993 | FETCH_SWORD(adr); |
17994 | adr += AREG((Opcode >> 0) & 7); |
17995 | PRE_IO |
17996 | READ_WORD_F(adr, res) |
17997 | flag_C = 0; |
17998 | flag_V = 0; |
17999 | flag_NotZ = res; |
18000 | flag_N = res >> 8; |
18001 | POST_IO |
18002 | RET(12) |
18003 | } |
18004 | |
18005 | // TST |
18006 | OPCODE(0x4A70) |
18007 | { |
18008 | u32 adr, res; |
18009 | u32 src, dst; |
18010 | |
18011 | adr = AREG((Opcode >> 0) & 7); |
18012 | DECODE_EXT_WORD |
18013 | PRE_IO |
18014 | READ_WORD_F(adr, res) |
18015 | flag_C = 0; |
18016 | flag_V = 0; |
18017 | flag_NotZ = res; |
18018 | flag_N = res >> 8; |
18019 | POST_IO |
18020 | RET(14) |
18021 | } |
18022 | |
18023 | // TST |
18024 | OPCODE(0x4A78) |
18025 | { |
18026 | u32 adr, res; |
18027 | u32 src, dst; |
18028 | |
18029 | FETCH_SWORD(adr); |
18030 | PRE_IO |
18031 | READ_WORD_F(adr, res) |
18032 | flag_C = 0; |
18033 | flag_V = 0; |
18034 | flag_NotZ = res; |
18035 | flag_N = res >> 8; |
18036 | POST_IO |
18037 | RET(12) |
18038 | } |
18039 | |
18040 | // TST |
18041 | OPCODE(0x4A79) |
18042 | { |
18043 | u32 adr, res; |
18044 | u32 src, dst; |
18045 | |
18046 | FETCH_LONG(adr); |
18047 | PRE_IO |
18048 | READ_WORD_F(adr, res) |
18049 | flag_C = 0; |
18050 | flag_V = 0; |
18051 | flag_NotZ = res; |
18052 | flag_N = res >> 8; |
18053 | POST_IO |
18054 | RET(16) |
18055 | } |
18056 | |
18057 | // TST |
18058 | OPCODE(0x4A5F) |
18059 | { |
18060 | u32 adr, res; |
18061 | u32 src, dst; |
18062 | |
18063 | adr = AREG(7); |
18064 | AREG(7) += 2; |
18065 | PRE_IO |
18066 | READ_WORD_F(adr, res) |
18067 | flag_C = 0; |
18068 | flag_V = 0; |
18069 | flag_NotZ = res; |
18070 | flag_N = res >> 8; |
18071 | POST_IO |
18072 | RET(8) |
18073 | } |
18074 | |
18075 | // TST |
18076 | OPCODE(0x4A67) |
18077 | { |
18078 | u32 adr, res; |
18079 | u32 src, dst; |
18080 | |
18081 | adr = AREG(7) - 2; |
18082 | AREG(7) = adr; |
18083 | PRE_IO |
18084 | READ_WORD_F(adr, res) |
18085 | flag_C = 0; |
18086 | flag_V = 0; |
18087 | flag_NotZ = res; |
18088 | flag_N = res >> 8; |
18089 | POST_IO |
18090 | RET(10) |
18091 | } |
18092 | |
18093 | // TST |
18094 | OPCODE(0x4A80) |
18095 | { |
18096 | u32 adr, res; |
18097 | u32 src, dst; |
18098 | |
18099 | res = DREGu32((Opcode >> 0) & 7); |
18100 | flag_C = 0; |
18101 | flag_V = 0; |
18102 | flag_NotZ = res; |
18103 | flag_N = res >> 24; |
18104 | RET(4) |
18105 | } |
18106 | |
18107 | // TST |
18108 | OPCODE(0x4A90) |
18109 | { |
18110 | u32 adr, res; |
18111 | u32 src, dst; |
18112 | |
18113 | adr = AREG((Opcode >> 0) & 7); |
18114 | PRE_IO |
18115 | READ_LONG_F(adr, res) |
18116 | flag_C = 0; |
18117 | flag_V = 0; |
18118 | flag_NotZ = res; |
18119 | flag_N = res >> 24; |
18120 | POST_IO |
18121 | RET(12) |
18122 | } |
18123 | |
18124 | // TST |
18125 | OPCODE(0x4A98) |
18126 | { |
18127 | u32 adr, res; |
18128 | u32 src, dst; |
18129 | |
18130 | adr = AREG((Opcode >> 0) & 7); |
18131 | AREG((Opcode >> 0) & 7) += 4; |
18132 | PRE_IO |
18133 | READ_LONG_F(adr, res) |
18134 | flag_C = 0; |
18135 | flag_V = 0; |
18136 | flag_NotZ = res; |
18137 | flag_N = res >> 24; |
18138 | POST_IO |
18139 | RET(12) |
18140 | } |
18141 | |
18142 | // TST |
18143 | OPCODE(0x4AA0) |
18144 | { |
18145 | u32 adr, res; |
18146 | u32 src, dst; |
18147 | |
18148 | adr = AREG((Opcode >> 0) & 7) - 4; |
18149 | AREG((Opcode >> 0) & 7) = adr; |
18150 | PRE_IO |
18151 | READ_LONG_F(adr, res) |
18152 | flag_C = 0; |
18153 | flag_V = 0; |
18154 | flag_NotZ = res; |
18155 | flag_N = res >> 24; |
18156 | POST_IO |
18157 | RET(14) |
18158 | } |
18159 | |
18160 | // TST |
18161 | OPCODE(0x4AA8) |
18162 | { |
18163 | u32 adr, res; |
18164 | u32 src, dst; |
18165 | |
18166 | FETCH_SWORD(adr); |
18167 | adr += AREG((Opcode >> 0) & 7); |
18168 | PRE_IO |
18169 | READ_LONG_F(adr, res) |
18170 | flag_C = 0; |
18171 | flag_V = 0; |
18172 | flag_NotZ = res; |
18173 | flag_N = res >> 24; |
18174 | POST_IO |
18175 | RET(16) |
18176 | } |
18177 | |
18178 | // TST |
18179 | OPCODE(0x4AB0) |
18180 | { |
18181 | u32 adr, res; |
18182 | u32 src, dst; |
18183 | |
18184 | adr = AREG((Opcode >> 0) & 7); |
18185 | DECODE_EXT_WORD |
18186 | PRE_IO |
18187 | READ_LONG_F(adr, res) |
18188 | flag_C = 0; |
18189 | flag_V = 0; |
18190 | flag_NotZ = res; |
18191 | flag_N = res >> 24; |
18192 | POST_IO |
18193 | RET(18) |
18194 | } |
18195 | |
18196 | // TST |
18197 | OPCODE(0x4AB8) |
18198 | { |
18199 | u32 adr, res; |
18200 | u32 src, dst; |
18201 | |
18202 | FETCH_SWORD(adr); |
18203 | PRE_IO |
18204 | READ_LONG_F(adr, res) |
18205 | flag_C = 0; |
18206 | flag_V = 0; |
18207 | flag_NotZ = res; |
18208 | flag_N = res >> 24; |
18209 | POST_IO |
18210 | RET(16) |
18211 | } |
18212 | |
18213 | // TST |
18214 | OPCODE(0x4AB9) |
18215 | { |
18216 | u32 adr, res; |
18217 | u32 src, dst; |
18218 | |
18219 | FETCH_LONG(adr); |
18220 | PRE_IO |
18221 | READ_LONG_F(adr, res) |
18222 | flag_C = 0; |
18223 | flag_V = 0; |
18224 | flag_NotZ = res; |
18225 | flag_N = res >> 24; |
18226 | POST_IO |
18227 | RET(20) |
18228 | } |
18229 | |
18230 | // TST |
18231 | OPCODE(0x4A9F) |
18232 | { |
18233 | u32 adr, res; |
18234 | u32 src, dst; |
18235 | |
18236 | adr = AREG(7); |
18237 | AREG(7) += 4; |
18238 | PRE_IO |
18239 | READ_LONG_F(adr, res) |
18240 | flag_C = 0; |
18241 | flag_V = 0; |
18242 | flag_NotZ = res; |
18243 | flag_N = res >> 24; |
18244 | POST_IO |
18245 | RET(12) |
18246 | } |
18247 | |
18248 | // TST |
18249 | OPCODE(0x4AA7) |
18250 | { |
18251 | u32 adr, res; |
18252 | u32 src, dst; |
18253 | |
18254 | adr = AREG(7) - 4; |
18255 | AREG(7) = adr; |
18256 | PRE_IO |
18257 | READ_LONG_F(adr, res) |
18258 | flag_C = 0; |
18259 | flag_V = 0; |
18260 | flag_NotZ = res; |
18261 | flag_N = res >> 24; |
18262 | POST_IO |
18263 | RET(14) |
18264 | } |
18265 | |
18266 | // TAS |
18267 | OPCODE(0x4AC0) |
18268 | { |
18269 | u32 adr, res; |
18270 | u32 src, dst; |
18271 | |
18272 | res = DREGu8((Opcode >> 0) & 7); |
18273 | flag_C = 0; |
18274 | flag_V = 0; |
18275 | flag_NotZ = res; |
18276 | flag_N = res; |
18277 | res |= 0x80; |
18278 | DREGu8((Opcode >> 0) & 7) = res; |
18279 | RET(4) |
18280 | } |
18281 | |
18282 | // TAS |
18283 | OPCODE(0x4AD0) |
18284 | { |
18285 | u32 adr, res; |
18286 | u32 src, dst; |
18287 | |
18288 | adr = AREG((Opcode >> 0) & 7); |
18289 | PRE_IO |
18290 | READ_BYTE_F(adr, res) |
18291 | flag_C = 0; |
18292 | flag_V = 0; |
18293 | flag_NotZ = res; |
18294 | flag_N = res; |
18295 | POST_IO |
18296 | RET(8) |
18297 | } |
18298 | |
18299 | // TAS |
18300 | OPCODE(0x4AD8) |
18301 | { |
18302 | u32 adr, res; |
18303 | u32 src, dst; |
18304 | |
18305 | adr = AREG((Opcode >> 0) & 7); |
18306 | AREG((Opcode >> 0) & 7) += 1; |
18307 | PRE_IO |
18308 | READ_BYTE_F(adr, res) |
18309 | flag_C = 0; |
18310 | flag_V = 0; |
18311 | flag_NotZ = res; |
18312 | flag_N = res; |
18313 | POST_IO |
18314 | RET(8) |
18315 | } |
18316 | |
18317 | // TAS |
18318 | OPCODE(0x4AE0) |
18319 | { |
18320 | u32 adr, res; |
18321 | u32 src, dst; |
18322 | |
18323 | adr = AREG((Opcode >> 0) & 7) - 1; |
18324 | AREG((Opcode >> 0) & 7) = adr; |
18325 | PRE_IO |
18326 | READ_BYTE_F(adr, res) |
18327 | flag_C = 0; |
18328 | flag_V = 0; |
18329 | flag_NotZ = res; |
18330 | flag_N = res; |
18331 | POST_IO |
18332 | RET(10) |
18333 | } |
18334 | |
18335 | // TAS |
18336 | OPCODE(0x4AE8) |
18337 | { |
18338 | u32 adr, res; |
18339 | u32 src, dst; |
18340 | |
18341 | FETCH_SWORD(adr); |
18342 | adr += AREG((Opcode >> 0) & 7); |
18343 | PRE_IO |
18344 | READ_BYTE_F(adr, res) |
18345 | flag_C = 0; |
18346 | flag_V = 0; |
18347 | flag_NotZ = res; |
18348 | flag_N = res; |
18349 | POST_IO |
18350 | RET(12) |
18351 | } |
18352 | |
18353 | // TAS |
18354 | OPCODE(0x4AF0) |
18355 | { |
18356 | u32 adr, res; |
18357 | u32 src, dst; |
18358 | |
18359 | adr = AREG((Opcode >> 0) & 7); |
18360 | DECODE_EXT_WORD |
18361 | PRE_IO |
18362 | READ_BYTE_F(adr, res) |
18363 | flag_C = 0; |
18364 | flag_V = 0; |
18365 | flag_NotZ = res; |
18366 | flag_N = res; |
18367 | POST_IO |
18368 | RET(14) |
18369 | } |
18370 | |
18371 | // TAS |
18372 | OPCODE(0x4AF8) |
18373 | { |
18374 | u32 adr, res; |
18375 | u32 src, dst; |
18376 | |
18377 | FETCH_SWORD(adr); |
18378 | PRE_IO |
18379 | READ_BYTE_F(adr, res) |
18380 | flag_C = 0; |
18381 | flag_V = 0; |
18382 | flag_NotZ = res; |
18383 | flag_N = res; |
18384 | POST_IO |
18385 | RET(12) |
18386 | } |
18387 | |
18388 | // TAS |
18389 | OPCODE(0x4AF9) |
18390 | { |
18391 | u32 adr, res; |
18392 | u32 src, dst; |
18393 | |
18394 | FETCH_LONG(adr); |
18395 | PRE_IO |
18396 | READ_BYTE_F(adr, res) |
18397 | flag_C = 0; |
18398 | flag_V = 0; |
18399 | flag_NotZ = res; |
18400 | flag_N = res; |
18401 | POST_IO |
18402 | RET(16) |
18403 | } |
18404 | |
18405 | // TAS |
18406 | OPCODE(0x4ADF) |
18407 | { |
18408 | u32 adr, res; |
18409 | u32 src, dst; |
18410 | |
18411 | adr = AREG(7); |
18412 | AREG(7) += 2; |
18413 | PRE_IO |
18414 | READ_BYTE_F(adr, res) |
18415 | flag_C = 0; |
18416 | flag_V = 0; |
18417 | flag_NotZ = res; |
18418 | flag_N = res; |
18419 | POST_IO |
18420 | RET(8) |
18421 | } |
18422 | |
18423 | // TAS |
18424 | OPCODE(0x4AE7) |
18425 | { |
18426 | u32 adr, res; |
18427 | u32 src, dst; |
18428 | |
18429 | adr = AREG(7) - 2; |
18430 | AREG(7) = adr; |
18431 | PRE_IO |
18432 | READ_BYTE_F(adr, res) |
18433 | flag_C = 0; |
18434 | flag_V = 0; |
18435 | flag_NotZ = res; |
18436 | flag_N = res; |
18437 | POST_IO |
18438 | RET(10) |
18439 | } |
18440 | |
18441 | // ILLEGAL |
18442 | OPCODE(0x4AFC) |
18443 | { |
d0ae0cb4 |
18444 | SET_PC(execute_exception(M68K_ILLEGAL_INSTRUCTION_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18445 | RET(0) |
70357ce5 |
18446 | } |
18447 | |
18448 | // ILLEGAL A000-AFFF |
18449 | OPCODE(0xA000) |
18450 | { |
d0ae0cb4 |
18451 | SET_PC(execute_exception(M68K_1010_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18452 | RET(0) |
70357ce5 |
18453 | } |
18454 | |
18455 | // ILLEGAL F000-FFFF |
18456 | OPCODE(0xF000) |
18457 | { |
d0ae0cb4 |
18458 | SET_PC(execute_exception(M68K_1111_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18459 | RET(0) // 4 already taken by exc. handler |
70357ce5 |
18460 | } |
18461 | |
18462 | // MOVEMaR |
18463 | OPCODE(0x4C90) |
18464 | { |
18465 | u32 adr, res; |
18466 | u32 src, dst; |
18467 | |
18468 | s32 *psrc; |
18469 | |
18470 | FETCH_WORD(res); |
18471 | adr = AREG((Opcode >> 0) & 7); |
18472 | psrc = &DREGs32(0); |
18473 | dst = adr; |
18474 | PRE_IO |
18475 | do |
18476 | { |
18477 | if (res & 1) |
18478 | { |
18479 | READSX_WORD_F(adr, *psrc) |
18480 | adr += 2; |
18481 | } |
18482 | psrc++; |
18483 | } while (res >>= 1); |
18484 | POST_IO |
18485 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18486 | #ifdef USE_CYCLONE_TIMING |
18487 | RET(12) |
18488 | #else |
18489 | RET(16) |
18490 | #endif |
18491 | } |
18492 | |
18493 | // MOVEMaR |
18494 | OPCODE(0x4C98) |
18495 | { |
18496 | u32 adr, res; |
18497 | u32 src, dst; |
18498 | |
18499 | s32 *psrc; |
18500 | |
18501 | FETCH_WORD(res); |
18502 | adr = AREG((Opcode >> 0) & 7); |
18503 | psrc = &DREGs32(0); |
18504 | dst = adr; |
18505 | PRE_IO |
18506 | do |
18507 | { |
18508 | if (res & 1) |
18509 | { |
18510 | READSX_WORD_F(adr, *psrc) |
18511 | adr += 2; |
18512 | } |
18513 | psrc++; |
18514 | } while (res >>= 1); |
18515 | AREG((Opcode >> 0) & 7) = adr; |
18516 | POST_IO |
18517 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18518 | RET(12) |
18519 | } |
18520 | |
18521 | // MOVEMaR |
18522 | OPCODE(0x4CA8) |
18523 | { |
18524 | u32 adr, res; |
18525 | u32 src, dst; |
18526 | |
18527 | s32 *psrc; |
18528 | |
18529 | FETCH_WORD(res); |
18530 | FETCH_SWORD(adr); |
18531 | adr += AREG((Opcode >> 0) & 7); |
18532 | psrc = &DREGs32(0); |
18533 | dst = adr; |
18534 | PRE_IO |
18535 | do |
18536 | { |
18537 | if (res & 1) |
18538 | { |
18539 | READSX_WORD_F(adr, *psrc) |
18540 | adr += 2; |
18541 | } |
18542 | psrc++; |
18543 | } while (res >>= 1); |
18544 | POST_IO |
18545 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18546 | #ifdef USE_CYCLONE_TIMING |
18547 | RET(16) |
18548 | #else |
18549 | RET(24) |
18550 | #endif |
18551 | } |
18552 | |
18553 | // MOVEMaR |
18554 | OPCODE(0x4CB0) |
18555 | { |
18556 | u32 adr, res; |
18557 | u32 src, dst; |
18558 | |
18559 | s32 *psrc; |
18560 | |
18561 | FETCH_WORD(res); |
18562 | adr = AREG((Opcode >> 0) & 7); |
18563 | DECODE_EXT_WORD |
18564 | psrc = &DREGs32(0); |
18565 | dst = adr; |
18566 | PRE_IO |
18567 | do |
18568 | { |
18569 | if (res & 1) |
18570 | { |
18571 | READSX_WORD_F(adr, *psrc) |
18572 | adr += 2; |
18573 | } |
18574 | psrc++; |
18575 | } while (res >>= 1); |
18576 | POST_IO |
18577 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18578 | #ifdef USE_CYCLONE_TIMING |
18579 | RET(18) |
18580 | #else |
18581 | RET(28) |
18582 | #endif |
18583 | } |
18584 | |
18585 | // MOVEMaR |
18586 | OPCODE(0x4CB8) |
18587 | { |
18588 | u32 adr, res; |
18589 | u32 src, dst; |
18590 | |
18591 | s32 *psrc; |
18592 | |
18593 | FETCH_WORD(res); |
18594 | FETCH_SWORD(adr); |
18595 | psrc = &DREGs32(0); |
18596 | dst = adr; |
18597 | PRE_IO |
18598 | do |
18599 | { |
18600 | if (res & 1) |
18601 | { |
18602 | READSX_WORD_F(adr, *psrc) |
18603 | adr += 2; |
18604 | } |
18605 | psrc++; |
18606 | } while (res >>= 1); |
18607 | POST_IO |
18608 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18609 | #ifdef USE_CYCLONE_TIMING |
18610 | RET(16) |
18611 | #else |
18612 | RET(24) |
18613 | #endif |
18614 | } |
18615 | |
18616 | // MOVEMaR |
18617 | OPCODE(0x4CB9) |
18618 | { |
18619 | u32 adr, res; |
18620 | u32 src, dst; |
18621 | |
18622 | s32 *psrc; |
18623 | |
18624 | FETCH_WORD(res); |
18625 | FETCH_LONG(adr); |
18626 | psrc = &DREGs32(0); |
18627 | dst = adr; |
18628 | PRE_IO |
18629 | do |
18630 | { |
18631 | if (res & 1) |
18632 | { |
18633 | READSX_WORD_F(adr, *psrc) |
18634 | adr += 2; |
18635 | } |
18636 | psrc++; |
18637 | } while (res >>= 1); |
18638 | POST_IO |
18639 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18640 | #ifdef USE_CYCLONE_TIMING |
18641 | RET(20) |
18642 | #else |
18643 | RET(32) |
18644 | #endif |
18645 | } |
18646 | |
18647 | // MOVEMaR |
18648 | OPCODE(0x4CBA) |
18649 | { |
18650 | u32 adr, res; |
18651 | u32 src, dst; |
18652 | |
18653 | s32 *psrc; |
18654 | |
18655 | FETCH_WORD(res); |
18656 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
18657 | PC++; |
18658 | psrc = &DREGs32(0); |
18659 | dst = adr; |
18660 | PRE_IO |
18661 | do |
18662 | { |
18663 | if (res & 1) |
18664 | { |
18665 | READSX_WORD_F(adr, *psrc) |
18666 | adr += 2; |
18667 | } |
18668 | psrc++; |
18669 | } while (res >>= 1); |
18670 | POST_IO |
18671 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18672 | #ifdef USE_CYCLONE_TIMING |
18673 | RET(16) |
18674 | #else |
18675 | RET(24) |
18676 | #endif |
18677 | } |
18678 | |
18679 | // MOVEMaR |
18680 | OPCODE(0x4CBB) |
18681 | { |
18682 | u32 adr, res; |
18683 | u32 src, dst; |
18684 | |
18685 | s32 *psrc; |
18686 | |
18687 | FETCH_WORD(res); |
18688 | adr = (u32)(PC) - BasePC; |
18689 | DECODE_EXT_WORD |
18690 | psrc = &DREGs32(0); |
18691 | dst = adr; |
18692 | PRE_IO |
18693 | do |
18694 | { |
18695 | if (res & 1) |
18696 | { |
18697 | READSX_WORD_F(adr, *psrc) |
18698 | adr += 2; |
18699 | } |
18700 | psrc++; |
18701 | } while (res >>= 1); |
18702 | POST_IO |
18703 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18704 | #ifdef USE_CYCLONE_TIMING |
18705 | RET(18) |
18706 | #else |
18707 | RET(28) |
18708 | #endif |
18709 | } |
18710 | |
18711 | // MOVEMaR |
18712 | OPCODE(0x4C9F) |
18713 | { |
18714 | u32 adr, res; |
18715 | u32 src, dst; |
18716 | |
18717 | s32 *psrc; |
18718 | |
18719 | FETCH_WORD(res); |
18720 | adr = AREG(7); |
18721 | psrc = &DREGs32(0); |
18722 | dst = adr; |
18723 | PRE_IO |
18724 | do |
18725 | { |
18726 | if (res & 1) |
18727 | { |
18728 | READSX_WORD_F(adr, *psrc) |
18729 | adr += 2; |
18730 | } |
18731 | psrc++; |
18732 | } while (res >>= 1); |
18733 | AREG(7) = adr; |
18734 | POST_IO |
18735 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18736 | RET(12) |
18737 | } |
18738 | |
18739 | // MOVEMaR |
18740 | OPCODE(0x4CD0) |
18741 | { |
18742 | u32 adr, res; |
18743 | u32 src, dst; |
18744 | |
18745 | u32 *psrc; |
18746 | |
18747 | FETCH_WORD(res); |
18748 | adr = AREG((Opcode >> 0) & 7); |
18749 | psrc = &DREGu32(0); |
18750 | dst = adr; |
18751 | PRE_IO |
18752 | do |
18753 | { |
18754 | if (res & 1) |
18755 | { |
18756 | READ_LONG_F(adr, *psrc) |
18757 | adr += 4; |
18758 | } |
18759 | psrc++; |
18760 | } while (res >>= 1); |
18761 | POST_IO |
18762 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18763 | #ifdef USE_CYCLONE_TIMING |
18764 | RET(12) |
18765 | #else |
18766 | RET(20) |
18767 | #endif |
18768 | } |
18769 | |
18770 | // MOVEMaR |
18771 | OPCODE(0x4CD8) |
18772 | { |
18773 | u32 adr, res; |
18774 | u32 src, dst; |
18775 | |
18776 | u32 *psrc; |
18777 | |
18778 | FETCH_WORD(res); |
18779 | adr = AREG((Opcode >> 0) & 7); |
18780 | psrc = &DREGu32(0); |
18781 | dst = adr; |
18782 | PRE_IO |
18783 | do |
18784 | { |
18785 | if (res & 1) |
18786 | { |
18787 | READ_LONG_F(adr, *psrc) |
18788 | adr += 4; |
18789 | } |
18790 | psrc++; |
18791 | } while (res >>= 1); |
18792 | AREG((Opcode >> 0) & 7) = adr; |
18793 | POST_IO |
18794 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18795 | RET(12) |
18796 | } |
18797 | |
18798 | // MOVEMaR |
18799 | OPCODE(0x4CE8) |
18800 | { |
18801 | u32 adr, res; |
18802 | u32 src, dst; |
18803 | |
18804 | u32 *psrc; |
18805 | |
18806 | FETCH_WORD(res); |
18807 | FETCH_SWORD(adr); |
18808 | adr += AREG((Opcode >> 0) & 7); |
18809 | psrc = &DREGu32(0); |
18810 | dst = adr; |
18811 | PRE_IO |
18812 | do |
18813 | { |
18814 | if (res & 1) |
18815 | { |
18816 | READ_LONG_F(adr, *psrc) |
18817 | adr += 4; |
18818 | } |
18819 | psrc++; |
18820 | } while (res >>= 1); |
18821 | POST_IO |
18822 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18823 | #ifdef USE_CYCLONE_TIMING |
18824 | RET(16) |
18825 | #else |
18826 | RET(28) |
18827 | #endif |
18828 | } |
18829 | |
18830 | // MOVEMaR |
18831 | OPCODE(0x4CF0) |
18832 | { |
18833 | u32 adr, res; |
18834 | u32 src, dst; |
18835 | |
18836 | u32 *psrc; |
18837 | |
18838 | FETCH_WORD(res); |
18839 | adr = AREG((Opcode >> 0) & 7); |
18840 | DECODE_EXT_WORD |
18841 | psrc = &DREGu32(0); |
18842 | dst = adr; |
18843 | PRE_IO |
18844 | do |
18845 | { |
18846 | if (res & 1) |
18847 | { |
18848 | READ_LONG_F(adr, *psrc) |
18849 | adr += 4; |
18850 | } |
18851 | psrc++; |
18852 | } while (res >>= 1); |
18853 | POST_IO |
18854 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18855 | #ifdef USE_CYCLONE_TIMING |
18856 | RET(18) |
18857 | #else |
18858 | RET(32) |
18859 | #endif |
18860 | } |
18861 | |
18862 | // MOVEMaR |
18863 | OPCODE(0x4CF8) |
18864 | { |
18865 | u32 adr, res; |
18866 | u32 src, dst; |
18867 | |
18868 | u32 *psrc; |
18869 | |
18870 | FETCH_WORD(res); |
18871 | FETCH_SWORD(adr); |
18872 | psrc = &DREGu32(0); |
18873 | dst = adr; |
18874 | PRE_IO |
18875 | do |
18876 | { |
18877 | if (res & 1) |
18878 | { |
18879 | READ_LONG_F(adr, *psrc) |
18880 | adr += 4; |
18881 | } |
18882 | psrc++; |
18883 | } while (res >>= 1); |
18884 | POST_IO |
18885 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18886 | #ifdef USE_CYCLONE_TIMING |
18887 | RET(16) |
18888 | #else |
18889 | RET(28) |
18890 | #endif |
18891 | } |
18892 | |
18893 | // MOVEMaR |
18894 | OPCODE(0x4CF9) |
18895 | { |
18896 | u32 adr, res; |
18897 | u32 src, dst; |
18898 | |
18899 | u32 *psrc; |
18900 | |
18901 | FETCH_WORD(res); |
18902 | FETCH_LONG(adr); |
18903 | psrc = &DREGu32(0); |
18904 | dst = adr; |
18905 | PRE_IO |
18906 | do |
18907 | { |
18908 | if (res & 1) |
18909 | { |
18910 | READ_LONG_F(adr, *psrc) |
18911 | adr += 4; |
18912 | } |
18913 | psrc++; |
18914 | } while (res >>= 1); |
18915 | POST_IO |
18916 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18917 | #ifdef USE_CYCLONE_TIMING |
18918 | RET(20) |
18919 | #else |
18920 | RET(36) |
18921 | #endif |
18922 | } |
18923 | |
18924 | // MOVEMaR |
18925 | OPCODE(0x4CFA) |
18926 | { |
18927 | u32 adr, res; |
18928 | u32 src, dst; |
18929 | |
18930 | u32 *psrc; |
18931 | |
18932 | FETCH_WORD(res); |
18933 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
18934 | PC++; |
18935 | psrc = &DREGu32(0); |
18936 | dst = adr; |
18937 | PRE_IO |
18938 | do |
18939 | { |
18940 | if (res & 1) |
18941 | { |
18942 | READ_LONG_F(adr, *psrc) |
18943 | adr += 4; |
18944 | } |
18945 | psrc++; |
18946 | } while (res >>= 1); |
18947 | POST_IO |
18948 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18949 | #ifdef USE_CYCLONE_TIMING |
18950 | RET(16) |
18951 | #else |
18952 | RET(28) |
18953 | #endif |
18954 | } |
18955 | |
18956 | // MOVEMaR |
18957 | OPCODE(0x4CFB) |
18958 | { |
18959 | u32 adr, res; |
18960 | u32 src, dst; |
18961 | |
18962 | u32 *psrc; |
18963 | |
18964 | FETCH_WORD(res); |
18965 | adr = (u32)(PC) - BasePC; |
18966 | DECODE_EXT_WORD |
18967 | psrc = &DREGu32(0); |
18968 | dst = adr; |
18969 | PRE_IO |
18970 | do |
18971 | { |
18972 | if (res & 1) |
18973 | { |
18974 | READ_LONG_F(adr, *psrc) |
18975 | adr += 4; |
18976 | } |
18977 | psrc++; |
18978 | } while (res >>= 1); |
18979 | POST_IO |
18980 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18981 | #ifdef USE_CYCLONE_TIMING |
18982 | RET(18) |
18983 | #else |
18984 | RET(32) |
18985 | #endif |
18986 | } |
18987 | |
18988 | // MOVEMaR |
18989 | OPCODE(0x4CDF) |
18990 | { |
18991 | u32 adr, res; |
18992 | u32 src, dst; |
18993 | |
18994 | u32 *psrc; |
18995 | |
18996 | FETCH_WORD(res); |
18997 | adr = AREG(7); |
18998 | psrc = &DREGu32(0); |
18999 | dst = adr; |
19000 | PRE_IO |
19001 | do |
19002 | { |
19003 | if (res & 1) |
19004 | { |
19005 | READ_LONG_F(adr, *psrc) |
19006 | adr += 4; |
19007 | } |
19008 | psrc++; |
19009 | } while (res >>= 1); |
19010 | AREG(7) = adr; |
19011 | POST_IO |
19012 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19013 | RET(12) |
19014 | } |
19015 | |
19016 | // TRAP |
19017 | OPCODE(0x4E40) |
19018 | { |
d0ae0cb4 |
19019 | SET_PC(execute_exception(M68K_TRAP_BASE_EX + (Opcode & 0xF), GET_PC, GET_SR)); |
70357ce5 |
19020 | RET(4) |
19021 | } |
19022 | |
19023 | // LINK |
19024 | OPCODE(0x4E50) |
19025 | { |
19026 | u32 adr, res; |
19027 | u32 src, dst; |
19028 | |
19029 | res = AREGu32((Opcode >> 0) & 7); |
19030 | PRE_IO |
19031 | PUSH_32_F(res) |
19032 | res = AREG(7); |
19033 | AREG((Opcode >> 0) & 7) = res; |
19034 | FETCH_SWORD(res); |
19035 | AREG(7) += res; |
19036 | POST_IO |
19037 | RET(16) |
19038 | } |
19039 | |
19040 | // LINKA7 |
19041 | OPCODE(0x4E57) |
19042 | { |
19043 | u32 adr, res; |
19044 | u32 src, dst; |
19045 | |
19046 | AREG(7) -= 4; |
19047 | PRE_IO |
19048 | WRITE_LONG_DEC_F(AREG(7), AREG(7)) |
19049 | FETCH_SWORD(res); |
19050 | AREG(7) += res; |
19051 | POST_IO |
19052 | RET(16) |
19053 | } |
19054 | |
19055 | // ULNK |
19056 | OPCODE(0x4E58) |
19057 | { |
19058 | u32 adr, res; |
19059 | u32 src, dst; |
19060 | |
19061 | src = AREGu32((Opcode >> 0) & 7); |
19062 | AREG(7) = src + 4; |
19063 | PRE_IO |
19064 | READ_LONG_F(src, res) |
19065 | AREG((Opcode >> 0) & 7) = res; |
19066 | POST_IO |
19067 | RET(12) |
19068 | } |
19069 | |
19070 | // ULNKA7 |
19071 | OPCODE(0x4E5F) |
19072 | { |
19073 | u32 adr, res; |
19074 | u32 src, dst; |
19075 | |
19076 | PRE_IO |
19077 | READ_LONG_F(AREG(7), AREG(7)) |
19078 | POST_IO |
19079 | RET(12) |
19080 | } |
19081 | |
19082 | // MOVEAUSP |
19083 | OPCODE(0x4E60) |
19084 | { |
19085 | u32 adr, res; |
19086 | u32 src, dst; |
19087 | |
19088 | if (!flag_S) |
19089 | { |
d0ae0cb4 |
19090 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19091 | RET(4) |
19092 | } |
19093 | res = AREGu32((Opcode >> 0) & 7); |
19094 | ASP = res; |
19095 | RET(4) |
19096 | } |
19097 | |
19098 | // MOVEUSPA |
19099 | OPCODE(0x4E68) |
19100 | { |
19101 | u32 adr, res; |
19102 | u32 src, dst; |
19103 | |
19104 | if (!flag_S) |
19105 | { |
d0ae0cb4 |
19106 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19107 | RET(4) |
19108 | } |
19109 | res = ASP; |
19110 | AREG((Opcode >> 0) & 7) = res; |
19111 | RET(4) |
19112 | } |
19113 | |
19114 | // RESET |
19115 | OPCODE(0x4E70) |
19116 | { |
19117 | u32 adr, res; |
19118 | u32 src, dst; |
19119 | |
19120 | if (!flag_S) |
19121 | { |
d0ae0cb4 |
19122 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19123 | RET(4) |
19124 | } |
19125 | PRE_IO |
19126 | if (m68kcontext.reset_handler) m68kcontext.reset_handler(); |
19127 | // CPU->Reset_CallBack(); |
19128 | POST_IO |
19129 | RET(132) |
19130 | } |
19131 | |
19132 | // NOP |
19133 | OPCODE(0x4E71) |
19134 | { |
19135 | RET(4) |
19136 | } |
19137 | |
19138 | // STOP |
19139 | OPCODE(0x4E72) |
19140 | { |
19141 | u32 adr, res; |
19142 | u32 src, dst; |
19143 | |
19144 | if (!flag_S) |
19145 | { |
d0ae0cb4 |
19146 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19147 | RET(4) |
19148 | } |
19149 | FETCH_WORD(res); |
19150 | res &= M68K_SR_MASK; |
19151 | SET_SR(res) |
19152 | if (!flag_S) |
19153 | { |
19154 | res = AREG(7); |
19155 | AREG(7) = ASP; |
19156 | ASP = res; |
19157 | } |
03e4f2a3 |
19158 | m68kcontext.execinfo |= FM68K_HALTED; |
70357ce5 |
19159 | m68kcontext.io_cycle_counter = 0; |
19160 | RET(4) |
19161 | } |
19162 | |
19163 | // RTE |
19164 | OPCODE(0x4E73) |
19165 | { |
19166 | u32 adr, res; |
19167 | u32 src, dst; |
19168 | |
19169 | if (!flag_S) |
19170 | { |
d0ae0cb4 |
19171 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19172 | RET(4) |
19173 | } |
19174 | PRE_IO |
19175 | POP_16_F(res) |
19176 | SET_SR(res) |
19177 | POP_32_F(res) |
19178 | SET_PC(res) |
19179 | if (!flag_S) |
19180 | { |
19181 | res = AREG(7); |
19182 | AREG(7) = ASP; |
19183 | ASP = res; |
19184 | } |
19185 | POST_IO |
03e4f2a3 |
19186 | m68kcontext.execinfo &= ~(FM68K_EMULATE_GROUP_0|FM68K_EMULATE_TRACE|FM68K_DO_TRACE); |
70357ce5 |
19187 | CHECK_INT_TO_JUMP(20) |
19188 | RET(20) |
19189 | } |
19190 | |
19191 | // RTS |
19192 | OPCODE(0x4E75) |
19193 | { |
19194 | u32 adr, res; |
19195 | u32 src, dst; |
19196 | |
19197 | PRE_IO |
19198 | POP_32_F(res) |
19199 | SET_PC(res) |
19200 | CHECK_BRANCH_EXCEPTION(res) |
19201 | POST_IO |
19202 | RET(16) |
19203 | } |
19204 | |
19205 | // TRAPV |
19206 | OPCODE(0x4E76) |
19207 | { |
19208 | if (flag_V & 0x80) |
d0ae0cb4 |
19209 | SET_PC(execute_exception(M68K_TRAPV_EX, GET_PC, GET_SR)); |
70357ce5 |
19210 | RET(4) |
19211 | } |
19212 | |
19213 | // RTR |
19214 | OPCODE(0x4E77) |
19215 | { |
19216 | u32 adr, res; |
19217 | u32 src, dst; |
19218 | |
19219 | PRE_IO |
19220 | POP_16_F(res) |
19221 | SET_CCR(res) |
19222 | POP_32_F(res) |
19223 | SET_PC(res) |
19224 | CHECK_BRANCH_EXCEPTION(res) |
19225 | POST_IO |
19226 | RET(20) |
19227 | } |
19228 | |
19229 | // JSR |
19230 | OPCODE(0x4E90) |
19231 | { |
19232 | u32 adr, res; |
19233 | u32 src, dst; |
19234 | |
19235 | adr = AREG((Opcode >> 0) & 7); |
19236 | { |
19237 | u32 oldPC; |
19238 | |
19239 | oldPC = (u32)(PC) - BasePC; |
19240 | PRE_IO |
19241 | PUSH_32_F(oldPC) |
19242 | } |
19243 | SET_PC(adr) |
19244 | CHECK_BRANCH_EXCEPTION(adr) |
19245 | POST_IO |
19246 | RET(16) |
19247 | } |
19248 | |
19249 | // JSR |
19250 | OPCODE(0x4EA8) |
19251 | { |
19252 | u32 adr, res; |
19253 | u32 src, dst; |
19254 | |
19255 | FETCH_SWORD(adr); |
19256 | adr += AREG((Opcode >> 0) & 7); |
19257 | { |
19258 | u32 oldPC; |
19259 | |
19260 | oldPC = (u32)(PC) - BasePC; |
19261 | PRE_IO |
19262 | PUSH_32_F(oldPC) |
19263 | } |
19264 | SET_PC(adr) |
19265 | CHECK_BRANCH_EXCEPTION(adr) |
19266 | POST_IO |
19267 | RET(18) |
19268 | } |
19269 | |
19270 | // JSR |
19271 | OPCODE(0x4EB0) |
19272 | { |
19273 | u32 adr, res; |
19274 | u32 src, dst; |
19275 | |
19276 | adr = AREG((Opcode >> 0) & 7); |
19277 | DECODE_EXT_WORD |
19278 | { |
19279 | u32 oldPC; |
19280 | |
19281 | oldPC = (u32)(PC) - BasePC; |
19282 | PRE_IO |
19283 | PUSH_32_F(oldPC) |
19284 | } |
19285 | SET_PC(adr) |
19286 | CHECK_BRANCH_EXCEPTION(adr) |
19287 | POST_IO |
19288 | RET(22) |
19289 | } |
19290 | |
19291 | // JSR |
19292 | OPCODE(0x4EB8) |
19293 | { |
19294 | u32 adr, res; |
19295 | u32 src, dst; |
19296 | |
19297 | FETCH_SWORD(adr); |
19298 | { |
19299 | u32 oldPC; |
19300 | |
19301 | oldPC = (u32)(PC) - BasePC; |
19302 | PRE_IO |
19303 | PUSH_32_F(oldPC) |
19304 | } |
19305 | SET_PC(adr) |
19306 | CHECK_BRANCH_EXCEPTION(adr) |
19307 | POST_IO |
19308 | RET(18) |
19309 | } |
19310 | |
19311 | // JSR |
19312 | OPCODE(0x4EB9) |
19313 | { |
19314 | u32 adr, res; |
19315 | u32 src, dst; |
19316 | |
19317 | FETCH_LONG(adr); |
19318 | { |
19319 | u32 oldPC; |
19320 | |
19321 | oldPC = (u32)(PC) - BasePC; |
19322 | PRE_IO |
19323 | PUSH_32_F(oldPC) |
19324 | } |
19325 | SET_PC(adr) |
19326 | CHECK_BRANCH_EXCEPTION(adr) |
19327 | POST_IO |
19328 | RET(20) |
19329 | } |
19330 | |
19331 | // JSR |
19332 | OPCODE(0x4EBA) |
19333 | { |
19334 | u32 adr, res; |
19335 | u32 src, dst; |
19336 | |
19337 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19338 | PC++; |
19339 | { |
19340 | u32 oldPC; |
19341 | |
19342 | oldPC = (u32)(PC) - BasePC; |
19343 | PRE_IO |
19344 | PUSH_32_F(oldPC) |
19345 | } |
19346 | SET_PC(adr) |
19347 | CHECK_BRANCH_EXCEPTION(adr) |
19348 | POST_IO |
19349 | RET(18) |
19350 | } |
19351 | |
19352 | // JSR |
19353 | OPCODE(0x4EBB) |
19354 | { |
19355 | u32 adr, res; |
19356 | u32 src, dst; |
19357 | |
19358 | adr = (u32)(PC) - BasePC; |
19359 | DECODE_EXT_WORD |
19360 | { |
19361 | u32 oldPC; |
19362 | |
19363 | oldPC = (u32)(PC) - BasePC; |
19364 | PRE_IO |
19365 | PUSH_32_F(oldPC) |
19366 | } |
19367 | SET_PC(adr) |
19368 | CHECK_BRANCH_EXCEPTION(adr) |
19369 | POST_IO |
19370 | RET(22) |
19371 | } |
19372 | |
19373 | // JMP |
19374 | OPCODE(0x4ED0) |
19375 | { |
19376 | u32 adr, res; |
19377 | u32 src, dst; |
19378 | |
19379 | adr = AREG((Opcode >> 0) & 7); |
19380 | SET_PC(adr) |
19381 | CHECK_BRANCH_EXCEPTION(adr) |
19382 | RET(8) |
19383 | } |
19384 | |
19385 | // JMP |
19386 | OPCODE(0x4EE8) |
19387 | { |
19388 | u32 adr, res; |
19389 | u32 src, dst; |
19390 | |
19391 | FETCH_SWORD(adr); |
19392 | adr += AREG((Opcode >> 0) & 7); |
19393 | SET_PC(adr) |
19394 | CHECK_BRANCH_EXCEPTION(adr) |
19395 | RET(10) |
19396 | } |
19397 | |
19398 | // JMP |
19399 | OPCODE(0x4EF0) |
19400 | { |
19401 | u32 adr, res; |
19402 | u32 src, dst; |
19403 | |
19404 | adr = AREG((Opcode >> 0) & 7); |
19405 | DECODE_EXT_WORD |
19406 | SET_PC(adr) |
19407 | CHECK_BRANCH_EXCEPTION(adr) |
19408 | RET(14) |
19409 | } |
19410 | |
19411 | // JMP |
19412 | OPCODE(0x4EF8) |
19413 | { |
19414 | u32 adr, res; |
19415 | u32 src, dst; |
19416 | |
19417 | FETCH_SWORD(adr); |
19418 | SET_PC(adr) |
19419 | CHECK_BRANCH_EXCEPTION(adr) |
19420 | RET(10) |
19421 | } |
19422 | |
19423 | // JMP |
19424 | OPCODE(0x4EF9) |
19425 | { |
19426 | u32 adr, res; |
19427 | u32 src, dst; |
19428 | |
19429 | FETCH_LONG(adr); |
19430 | SET_PC(adr) |
19431 | CHECK_BRANCH_EXCEPTION(adr) |
19432 | RET(12) |
19433 | } |
19434 | |
19435 | // JMP |
19436 | OPCODE(0x4EFA) |
19437 | { |
19438 | u32 adr, res; |
19439 | u32 src, dst; |
19440 | |
19441 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19442 | PC++; |
19443 | SET_PC(adr) |
19444 | CHECK_BRANCH_EXCEPTION(adr) |
19445 | RET(10) |
19446 | } |
19447 | |
19448 | // JMP |
19449 | OPCODE(0x4EFB) |
19450 | { |
19451 | u32 adr, res; |
19452 | u32 src, dst; |
19453 | |
19454 | adr = (u32)(PC) - BasePC; |
19455 | DECODE_EXT_WORD |
19456 | SET_PC(adr) |
19457 | CHECK_BRANCH_EXCEPTION(adr) |
19458 | RET(14) |
19459 | } |
19460 | |
19461 | // CHK |
19462 | OPCODE(0x4180) |
19463 | { |
19464 | u32 adr, res; |
19465 | u32 src, dst; |
19466 | |
19467 | src = DREGu16((Opcode >> 0) & 7); |
19468 | res = DREGu16((Opcode >> 9) & 7); |
19469 | if (((s32)res < 0) || (res > src)) |
19470 | { |
19471 | flag_N = res >> 8; |
d0ae0cb4 |
19472 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19473 | } |
19474 | RET(10) |
19475 | } |
19476 | |
19477 | // CHK |
19478 | OPCODE(0x4190) |
19479 | { |
19480 | u32 adr, res; |
19481 | u32 src, dst; |
19482 | |
19483 | adr = AREG((Opcode >> 0) & 7); |
19484 | PRE_IO |
19485 | READ_WORD_F(adr, src) |
19486 | res = DREGu16((Opcode >> 9) & 7); |
19487 | if (((s32)res < 0) || (res > src)) |
19488 | { |
19489 | flag_N = res >> 8; |
d0ae0cb4 |
19490 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19491 | } |
19492 | POST_IO |
19493 | RET(14) |
19494 | } |
19495 | |
19496 | // CHK |
19497 | OPCODE(0x4198) |
19498 | { |
19499 | u32 adr, res; |
19500 | u32 src, dst; |
19501 | |
19502 | adr = AREG((Opcode >> 0) & 7); |
19503 | AREG((Opcode >> 0) & 7) += 2; |
19504 | PRE_IO |
19505 | READ_WORD_F(adr, src) |
19506 | res = DREGu16((Opcode >> 9) & 7); |
19507 | if (((s32)res < 0) || (res > src)) |
19508 | { |
19509 | flag_N = res >> 8; |
d0ae0cb4 |
19510 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19511 | } |
19512 | POST_IO |
19513 | RET(14) |
19514 | } |
19515 | |
19516 | // CHK |
19517 | OPCODE(0x41A0) |
19518 | { |
19519 | u32 adr, res; |
19520 | u32 src, dst; |
19521 | |
19522 | adr = AREG((Opcode >> 0) & 7) - 2; |
19523 | AREG((Opcode >> 0) & 7) = adr; |
19524 | PRE_IO |
19525 | READ_WORD_F(adr, src) |
19526 | res = DREGu16((Opcode >> 9) & 7); |
19527 | if (((s32)res < 0) || (res > src)) |
19528 | { |
19529 | flag_N = res >> 8; |
d0ae0cb4 |
19530 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19531 | } |
19532 | POST_IO |
19533 | RET(16) |
19534 | } |
19535 | |
19536 | // CHK |
19537 | OPCODE(0x41A8) |
19538 | { |
19539 | u32 adr, res; |
19540 | u32 src, dst; |
19541 | |
19542 | FETCH_SWORD(adr); |
19543 | adr += AREG((Opcode >> 0) & 7); |
19544 | PRE_IO |
19545 | READ_WORD_F(adr, src) |
19546 | res = DREGu16((Opcode >> 9) & 7); |
19547 | if (((s32)res < 0) || (res > src)) |
19548 | { |
19549 | flag_N = res >> 8; |
d0ae0cb4 |
19550 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19551 | } |
19552 | POST_IO |
19553 | RET(18) |
19554 | } |
19555 | |
19556 | // CHK |
19557 | OPCODE(0x41B0) |
19558 | { |
19559 | u32 adr, res; |
19560 | u32 src, dst; |
19561 | |
19562 | adr = AREG((Opcode >> 0) & 7); |
19563 | DECODE_EXT_WORD |
19564 | PRE_IO |
19565 | READ_WORD_F(adr, src) |
19566 | res = DREGu16((Opcode >> 9) & 7); |
19567 | if (((s32)res < 0) || (res > src)) |
19568 | { |
19569 | flag_N = res >> 8; |
d0ae0cb4 |
19570 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19571 | } |
19572 | POST_IO |
19573 | RET(20) |
19574 | } |
19575 | |
19576 | // CHK |
19577 | OPCODE(0x41B8) |
19578 | { |
19579 | u32 adr, res; |
19580 | u32 src, dst; |
19581 | |
19582 | FETCH_SWORD(adr); |
19583 | PRE_IO |
19584 | READ_WORD_F(adr, src) |
19585 | res = DREGu16((Opcode >> 9) & 7); |
19586 | if (((s32)res < 0) || (res > src)) |
19587 | { |
19588 | flag_N = res >> 8; |
d0ae0cb4 |
19589 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19590 | } |
19591 | POST_IO |
19592 | RET(18) |
19593 | } |
19594 | |
19595 | // CHK |
19596 | OPCODE(0x41B9) |
19597 | { |
19598 | u32 adr, res; |
19599 | u32 src, dst; |
19600 | |
19601 | FETCH_LONG(adr); |
19602 | PRE_IO |
19603 | READ_WORD_F(adr, src) |
19604 | res = DREGu16((Opcode >> 9) & 7); |
19605 | if (((s32)res < 0) || (res > src)) |
19606 | { |
19607 | flag_N = res >> 8; |
d0ae0cb4 |
19608 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19609 | } |
19610 | POST_IO |
19611 | RET(22) |
19612 | } |
19613 | |
19614 | // CHK |
19615 | OPCODE(0x41BA) |
19616 | { |
19617 | u32 adr, res; |
19618 | u32 src, dst; |
19619 | |
19620 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19621 | PC++; |
19622 | PRE_IO |
19623 | READ_WORD_F(adr, src) |
19624 | res = DREGu16((Opcode >> 9) & 7); |
19625 | if (((s32)res < 0) || (res > src)) |
19626 | { |
19627 | flag_N = res >> 8; |
d0ae0cb4 |
19628 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19629 | } |
19630 | POST_IO |
19631 | RET(18) |
19632 | } |
19633 | |
19634 | // CHK |
19635 | OPCODE(0x41BB) |
19636 | { |
19637 | u32 adr, res; |
19638 | u32 src, dst; |
19639 | |
19640 | adr = (u32)(PC) - BasePC; |
19641 | DECODE_EXT_WORD |
19642 | PRE_IO |
19643 | READ_WORD_F(adr, src) |
19644 | res = DREGu16((Opcode >> 9) & 7); |
19645 | if (((s32)res < 0) || (res > src)) |
19646 | { |
19647 | flag_N = res >> 8; |
d0ae0cb4 |
19648 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19649 | } |
19650 | POST_IO |
19651 | RET(20) |
19652 | } |
19653 | |
19654 | // CHK |
19655 | OPCODE(0x41BC) |
19656 | { |
19657 | u32 adr, res; |
19658 | u32 src, dst; |
19659 | |
19660 | FETCH_WORD(src); |
19661 | res = DREGu16((Opcode >> 9) & 7); |
19662 | if (((s32)res < 0) || (res > src)) |
19663 | { |
19664 | flag_N = res >> 8; |
d0ae0cb4 |
19665 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19666 | } |
19667 | POST_IO |
19668 | RET(14) |
19669 | } |
19670 | |
19671 | // CHK |
19672 | OPCODE(0x419F) |
19673 | { |
19674 | u32 adr, res; |
19675 | u32 src, dst; |
19676 | |
19677 | adr = AREG(7); |
19678 | AREG(7) += 2; |
19679 | PRE_IO |
19680 | READ_WORD_F(adr, src) |
19681 | res = DREGu16((Opcode >> 9) & 7); |
19682 | if (((s32)res < 0) || (res > src)) |
19683 | { |
19684 | flag_N = res >> 8; |
d0ae0cb4 |
19685 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19686 | } |
19687 | POST_IO |
19688 | RET(14) |
19689 | } |
19690 | |
19691 | // CHK |
19692 | OPCODE(0x41A7) |
19693 | { |
19694 | u32 adr, res; |
19695 | u32 src, dst; |
19696 | |
19697 | adr = AREG(7) - 2; |
19698 | AREG(7) = adr; |
19699 | PRE_IO |
19700 | READ_WORD_F(adr, src) |
19701 | res = DREGu16((Opcode >> 9) & 7); |
19702 | if (((s32)res < 0) || (res > src)) |
19703 | { |
19704 | flag_N = res >> 8; |
d0ae0cb4 |
19705 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19706 | } |
19707 | POST_IO |
19708 | RET(16) |
19709 | } |
19710 | |
19711 | // LEA |
19712 | OPCODE(0x41D0) |
19713 | { |
19714 | u32 adr, res; |
19715 | u32 src, dst; |
19716 | |
19717 | adr = AREG((Opcode >> 0) & 7); |
19718 | res = adr; |
19719 | AREG((Opcode >> 9) & 7) = res; |
19720 | RET(4) |
19721 | } |
19722 | |
19723 | // LEA |
19724 | OPCODE(0x41E8) |
19725 | { |
19726 | u32 adr, res; |
19727 | u32 src, dst; |
19728 | |
19729 | FETCH_SWORD(adr); |
19730 | adr += AREG((Opcode >> 0) & 7); |
19731 | res = adr; |
19732 | AREG((Opcode >> 9) & 7) = res; |
19733 | RET(8) |
19734 | } |
19735 | |
19736 | // LEA |
19737 | OPCODE(0x41F0) |
19738 | { |
19739 | u32 adr, res; |
19740 | u32 src, dst; |
19741 | |
19742 | adr = AREG((Opcode >> 0) & 7); |
19743 | DECODE_EXT_WORD |
19744 | res = adr; |
19745 | AREG((Opcode >> 9) & 7) = res; |
19746 | RET(12) |
19747 | } |
19748 | |
19749 | // LEA |
19750 | OPCODE(0x41F8) |
19751 | { |
19752 | u32 adr, res; |
19753 | u32 src, dst; |
19754 | |
19755 | FETCH_SWORD(adr); |
19756 | res = adr; |
19757 | AREG((Opcode >> 9) & 7) = res; |
19758 | RET(8) |
19759 | } |
19760 | |
19761 | // LEA |
19762 | OPCODE(0x41F9) |
19763 | { |
19764 | u32 adr, res; |
19765 | u32 src, dst; |
19766 | |
19767 | FETCH_LONG(adr); |
19768 | res = adr; |
19769 | AREG((Opcode >> 9) & 7) = res; |
19770 | RET(12) |
19771 | } |
19772 | |
19773 | // LEA |
19774 | OPCODE(0x41FA) |
19775 | { |
19776 | u32 adr, res; |
19777 | u32 src, dst; |
19778 | |
19779 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19780 | PC++; |
19781 | res = adr; |
19782 | AREG((Opcode >> 9) & 7) = res; |
19783 | RET(8) |
19784 | } |
19785 | |
19786 | // LEA |
19787 | OPCODE(0x41FB) |
19788 | { |
19789 | u32 adr, res; |
19790 | u32 src, dst; |
19791 | |
19792 | adr = (u32)(PC) - BasePC; |
19793 | DECODE_EXT_WORD |
19794 | res = adr; |
19795 | AREG((Opcode >> 9) & 7) = res; |
19796 | RET(12) |
19797 | } |
19798 | |
19799 | // STCC |
19800 | OPCODE(0x50C0) |
19801 | { |
19802 | u32 adr, res; |
19803 | u32 src, dst; |
19804 | |
19805 | res = 0xFF; |
19806 | DREGu8((Opcode >> 0) & 7) = res; |
19807 | RET(6) |
19808 | } |
19809 | |
19810 | // STCC |
19811 | OPCODE(0x51C0) |
19812 | { |
19813 | u32 adr, res; |
19814 | u32 src, dst; |
19815 | |
19816 | res = 0; |
19817 | DREGu8((Opcode >> 0) & 7) = res; |
19818 | RET(4) |
19819 | } |
19820 | |
19821 | // STCC |
19822 | OPCODE(0x52C0) |
19823 | { |
19824 | u32 adr, res; |
19825 | u32 src, dst; |
19826 | |
19827 | if (flag_NotZ && (!(flag_C & 0x100))) |
19828 | { |
19829 | res = 0xFF; |
19830 | DREGu8((Opcode >> 0) & 7) = res; |
19831 | RET(6) |
19832 | } |
19833 | res = 0; |
19834 | DREGu8((Opcode >> 0) & 7) = res; |
19835 | RET(4) |
19836 | } |
19837 | |
19838 | // STCC |
19839 | OPCODE(0x53C0) |
19840 | { |
19841 | u32 adr, res; |
19842 | u32 src, dst; |
19843 | |
19844 | if ((!flag_NotZ) || (flag_C & 0x100)) |
19845 | { |
19846 | res = 0xFF; |
19847 | DREGu8((Opcode >> 0) & 7) = res; |
19848 | RET(6) |
19849 | } |
19850 | res = 0; |
19851 | DREGu8((Opcode >> 0) & 7) = res; |
19852 | RET(4) |
19853 | } |
19854 | |
19855 | // STCC |
19856 | OPCODE(0x54C0) |
19857 | { |
19858 | u32 adr, res; |
19859 | u32 src, dst; |
19860 | |
19861 | if (!(flag_C & 0x100)) |
19862 | { |
19863 | res = 0xFF; |
19864 | DREGu8((Opcode >> 0) & 7) = res; |
19865 | RET(6) |
19866 | } |
19867 | res = 0; |
19868 | DREGu8((Opcode >> 0) & 7) = res; |
19869 | RET(4) |
19870 | } |
19871 | |
19872 | // STCC |
19873 | OPCODE(0x55C0) |
19874 | { |
19875 | u32 adr, res; |
19876 | u32 src, dst; |
19877 | |
19878 | if (flag_C & 0x100) |
19879 | { |
19880 | res = 0xFF; |
19881 | DREGu8((Opcode >> 0) & 7) = res; |
19882 | RET(6) |
19883 | } |
19884 | res = 0; |
19885 | DREGu8((Opcode >> 0) & 7) = res; |
19886 | RET(4) |
19887 | } |
19888 | |
19889 | // STCC |
19890 | OPCODE(0x56C0) |
19891 | { |
19892 | u32 adr, res; |
19893 | u32 src, dst; |
19894 | |
19895 | if (flag_NotZ) |
19896 | { |
19897 | res = 0xFF; |
19898 | DREGu8((Opcode >> 0) & 7) = res; |
19899 | RET(6) |
19900 | } |
19901 | res = 0; |
19902 | DREGu8((Opcode >> 0) & 7) = res; |
19903 | RET(4) |
19904 | } |
19905 | |
19906 | // STCC |
19907 | OPCODE(0x57C0) |
19908 | { |
19909 | u32 adr, res; |
19910 | u32 src, dst; |
19911 | |
19912 | if (!flag_NotZ) |
19913 | { |
19914 | res = 0xFF; |
19915 | DREGu8((Opcode >> 0) & 7) = res; |
19916 | RET(6) |
19917 | } |
19918 | res = 0; |
19919 | DREGu8((Opcode >> 0) & 7) = res; |
19920 | RET(4) |
19921 | } |
19922 | |
19923 | // STCC |
19924 | OPCODE(0x58C0) |
19925 | { |
19926 | u32 adr, res; |
19927 | u32 src, dst; |
19928 | |
19929 | if (!(flag_V & 0x80)) |
19930 | { |
19931 | res = 0xFF; |
19932 | DREGu8((Opcode >> 0) & 7) = res; |
19933 | RET(6) |
19934 | } |
19935 | res = 0; |
19936 | DREGu8((Opcode >> 0) & 7) = res; |
19937 | RET(4) |
19938 | } |
19939 | |
19940 | // STCC |
19941 | OPCODE(0x59C0) |
19942 | { |
19943 | u32 adr, res; |
19944 | u32 src, dst; |
19945 | |
19946 | if (flag_V & 0x80) |
19947 | { |
19948 | res = 0xFF; |
19949 | DREGu8((Opcode >> 0) & 7) = res; |
19950 | RET(6) |
19951 | } |
19952 | res = 0; |
19953 | DREGu8((Opcode >> 0) & 7) = res; |
19954 | RET(4) |
19955 | } |
19956 | |
19957 | // STCC |
19958 | OPCODE(0x5AC0) |
19959 | { |
19960 | u32 adr, res; |
19961 | u32 src, dst; |
19962 | |
19963 | if (!(flag_N & 0x80)) |
19964 | { |
19965 | res = 0xFF; |
19966 | DREGu8((Opcode >> 0) & 7) = res; |
19967 | RET(6) |
19968 | } |
19969 | res = 0; |
19970 | DREGu8((Opcode >> 0) & 7) = res; |
19971 | RET(4) |
19972 | } |
19973 | |
19974 | // STCC |
19975 | OPCODE(0x5BC0) |
19976 | { |
19977 | u32 adr, res; |
19978 | u32 src, dst; |
19979 | |
19980 | if (flag_N & 0x80) |
19981 | { |
19982 | res = 0xFF; |
19983 | DREGu8((Opcode >> 0) & 7) = res; |
19984 | RET(6) |
19985 | } |
19986 | res = 0; |
19987 | DREGu8((Opcode >> 0) & 7) = res; |
19988 | RET(4) |
19989 | } |
19990 | |
19991 | // STCC |
19992 | OPCODE(0x5CC0) |
19993 | { |
19994 | u32 adr, res; |
19995 | u32 src, dst; |
19996 | |
19997 | if (!((flag_N ^ flag_V) & 0x80)) |
19998 | { |
19999 | res = 0xFF; |
20000 | DREGu8((Opcode >> 0) & 7) = res; |
20001 | RET(6) |
20002 | } |
20003 | res = 0; |
20004 | DREGu8((Opcode >> 0) & 7) = res; |
20005 | RET(4) |
20006 | } |
20007 | |
20008 | // STCC |
20009 | OPCODE(0x5DC0) |
20010 | { |
20011 | u32 adr, res; |
20012 | u32 src, dst; |
20013 | |
20014 | if ((flag_N ^ flag_V) & 0x80) |
20015 | { |
20016 | res = 0xFF; |
20017 | DREGu8((Opcode >> 0) & 7) = res; |
20018 | RET(6) |
20019 | } |
20020 | res = 0; |
20021 | DREGu8((Opcode >> 0) & 7) = res; |
20022 | RET(4) |
20023 | } |
20024 | |
20025 | // STCC |
20026 | OPCODE(0x5EC0) |
20027 | { |
20028 | u32 adr, res; |
20029 | u32 src, dst; |
20030 | |
20031 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20032 | { |
20033 | res = 0xFF; |
20034 | DREGu8((Opcode >> 0) & 7) = res; |
20035 | RET(6) |
20036 | } |
20037 | res = 0; |
20038 | DREGu8((Opcode >> 0) & 7) = res; |
20039 | RET(4) |
20040 | } |
20041 | |
20042 | // STCC |
20043 | OPCODE(0x5FC0) |
20044 | { |
20045 | u32 adr, res; |
20046 | u32 src, dst; |
20047 | |
20048 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20049 | { |
20050 | res = 0xFF; |
20051 | DREGu8((Opcode >> 0) & 7) = res; |
20052 | RET(6) |
20053 | } |
20054 | res = 0; |
20055 | DREGu8((Opcode >> 0) & 7) = res; |
20056 | RET(4) |
20057 | } |
20058 | |
20059 | // STCC |
20060 | OPCODE(0x50D0) |
20061 | { |
20062 | u32 adr, res; |
20063 | u32 src, dst; |
20064 | |
20065 | adr = AREG((Opcode >> 0) & 7); |
20066 | res = 0xFF; |
20067 | PRE_IO |
20068 | WRITE_BYTE_F(adr, res) |
20069 | POST_IO |
20070 | RET(12) |
20071 | } |
20072 | |
20073 | // STCC |
20074 | OPCODE(0x51D0) |
20075 | { |
20076 | u32 adr, res; |
20077 | u32 src, dst; |
20078 | |
20079 | adr = AREG((Opcode >> 0) & 7); |
20080 | res = 0; |
20081 | PRE_IO |
20082 | WRITE_BYTE_F(adr, res) |
20083 | POST_IO |
20084 | RET(12) |
20085 | } |
20086 | |
20087 | // STCC |
20088 | OPCODE(0x52D0) |
20089 | { |
20090 | u32 adr, res; |
20091 | u32 src, dst; |
20092 | |
20093 | adr = AREG((Opcode >> 0) & 7); |
20094 | if (flag_NotZ && (!(flag_C & 0x100))) |
20095 | { |
20096 | res = 0xFF; |
20097 | PRE_IO |
20098 | WRITE_BYTE_F(adr, res) |
20099 | POST_IO |
20100 | RET(12) |
20101 | } |
20102 | res = 0; |
20103 | PRE_IO |
20104 | WRITE_BYTE_F(adr, res) |
20105 | POST_IO |
20106 | RET(12) |
20107 | } |
20108 | |
20109 | // STCC |
20110 | OPCODE(0x53D0) |
20111 | { |
20112 | u32 adr, res; |
20113 | u32 src, dst; |
20114 | |
20115 | adr = AREG((Opcode >> 0) & 7); |
20116 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20117 | { |
20118 | res = 0xFF; |
20119 | PRE_IO |
20120 | WRITE_BYTE_F(adr, res) |
20121 | POST_IO |
20122 | RET(12) |
20123 | } |
20124 | res = 0; |
20125 | PRE_IO |
20126 | WRITE_BYTE_F(adr, res) |
20127 | POST_IO |
20128 | RET(12) |
20129 | } |
20130 | |
20131 | // STCC |
20132 | OPCODE(0x54D0) |
20133 | { |
20134 | u32 adr, res; |
20135 | u32 src, dst; |
20136 | |
20137 | adr = AREG((Opcode >> 0) & 7); |
20138 | if (!(flag_C & 0x100)) |
20139 | { |
20140 | res = 0xFF; |
20141 | PRE_IO |
20142 | WRITE_BYTE_F(adr, res) |
20143 | POST_IO |
20144 | RET(12) |
20145 | } |
20146 | res = 0; |
20147 | PRE_IO |
20148 | WRITE_BYTE_F(adr, res) |
20149 | POST_IO |
20150 | RET(12) |
20151 | } |
20152 | |
20153 | // STCC |
20154 | OPCODE(0x55D0) |
20155 | { |
20156 | u32 adr, res; |
20157 | u32 src, dst; |
20158 | |
20159 | adr = AREG((Opcode >> 0) & 7); |
20160 | if (flag_C & 0x100) |
20161 | { |
20162 | res = 0xFF; |
20163 | PRE_IO |
20164 | WRITE_BYTE_F(adr, res) |
20165 | POST_IO |
20166 | RET(12) |
20167 | } |
20168 | res = 0; |
20169 | PRE_IO |
20170 | WRITE_BYTE_F(adr, res) |
20171 | POST_IO |
20172 | RET(12) |
20173 | } |
20174 | |
20175 | // STCC |
20176 | OPCODE(0x56D0) |
20177 | { |
20178 | u32 adr, res; |
20179 | u32 src, dst; |
20180 | |
20181 | adr = AREG((Opcode >> 0) & 7); |
20182 | if (flag_NotZ) |
20183 | { |
20184 | res = 0xFF; |
20185 | PRE_IO |
20186 | WRITE_BYTE_F(adr, res) |
20187 | POST_IO |
20188 | RET(12) |
20189 | } |
20190 | res = 0; |
20191 | PRE_IO |
20192 | WRITE_BYTE_F(adr, res) |
20193 | POST_IO |
20194 | RET(12) |
20195 | } |
20196 | |
20197 | // STCC |
20198 | OPCODE(0x57D0) |
20199 | { |
20200 | u32 adr, res; |
20201 | u32 src, dst; |
20202 | |
20203 | adr = AREG((Opcode >> 0) & 7); |
20204 | if (!flag_NotZ) |
20205 | { |
20206 | res = 0xFF; |
20207 | PRE_IO |
20208 | WRITE_BYTE_F(adr, res) |
20209 | POST_IO |
20210 | RET(12) |
20211 | } |
20212 | res = 0; |
20213 | PRE_IO |
20214 | WRITE_BYTE_F(adr, res) |
20215 | POST_IO |
20216 | RET(12) |
20217 | } |
20218 | |
20219 | // STCC |
20220 | OPCODE(0x58D0) |
20221 | { |
20222 | u32 adr, res; |
20223 | u32 src, dst; |
20224 | |
20225 | adr = AREG((Opcode >> 0) & 7); |
20226 | if (!(flag_V & 0x80)) |
20227 | { |
20228 | res = 0xFF; |
20229 | PRE_IO |
20230 | WRITE_BYTE_F(adr, res) |
20231 | POST_IO |
20232 | RET(12) |
20233 | } |
20234 | res = 0; |
20235 | PRE_IO |
20236 | WRITE_BYTE_F(adr, res) |
20237 | POST_IO |
20238 | RET(12) |
20239 | } |
20240 | |
20241 | // STCC |
20242 | OPCODE(0x59D0) |
20243 | { |
20244 | u32 adr, res; |
20245 | u32 src, dst; |
20246 | |
20247 | adr = AREG((Opcode >> 0) & 7); |
20248 | if (flag_V & 0x80) |
20249 | { |
20250 | res = 0xFF; |
20251 | PRE_IO |
20252 | WRITE_BYTE_F(adr, res) |
20253 | POST_IO |
20254 | RET(12) |
20255 | } |
20256 | res = 0; |
20257 | PRE_IO |
20258 | WRITE_BYTE_F(adr, res) |
20259 | POST_IO |
20260 | RET(12) |
20261 | } |
20262 | |
20263 | // STCC |
20264 | OPCODE(0x5AD0) |
20265 | { |
20266 | u32 adr, res; |
20267 | u32 src, dst; |
20268 | |
20269 | adr = AREG((Opcode >> 0) & 7); |
20270 | if (!(flag_N & 0x80)) |
20271 | { |
20272 | res = 0xFF; |
20273 | PRE_IO |
20274 | WRITE_BYTE_F(adr, res) |
20275 | POST_IO |
20276 | RET(12) |
20277 | } |
20278 | res = 0; |
20279 | PRE_IO |
20280 | WRITE_BYTE_F(adr, res) |
20281 | POST_IO |
20282 | RET(12) |
20283 | } |
20284 | |
20285 | // STCC |
20286 | OPCODE(0x5BD0) |
20287 | { |
20288 | u32 adr, res; |
20289 | u32 src, dst; |
20290 | |
20291 | adr = AREG((Opcode >> 0) & 7); |
20292 | if (flag_N & 0x80) |
20293 | { |
20294 | res = 0xFF; |
20295 | PRE_IO |
20296 | WRITE_BYTE_F(adr, res) |
20297 | POST_IO |
20298 | RET(12) |
20299 | } |
20300 | res = 0; |
20301 | PRE_IO |
20302 | WRITE_BYTE_F(adr, res) |
20303 | POST_IO |
20304 | RET(12) |
20305 | } |
20306 | |
20307 | // STCC |
20308 | OPCODE(0x5CD0) |
20309 | { |
20310 | u32 adr, res; |
20311 | u32 src, dst; |
20312 | |
20313 | adr = AREG((Opcode >> 0) & 7); |
20314 | if (!((flag_N ^ flag_V) & 0x80)) |
20315 | { |
20316 | res = 0xFF; |
20317 | PRE_IO |
20318 | WRITE_BYTE_F(adr, res) |
20319 | POST_IO |
20320 | RET(12) |
20321 | } |
20322 | res = 0; |
20323 | PRE_IO |
20324 | WRITE_BYTE_F(adr, res) |
20325 | POST_IO |
20326 | RET(12) |
20327 | } |
20328 | |
20329 | // STCC |
20330 | OPCODE(0x5DD0) |
20331 | { |
20332 | u32 adr, res; |
20333 | u32 src, dst; |
20334 | |
20335 | adr = AREG((Opcode >> 0) & 7); |
20336 | if ((flag_N ^ flag_V) & 0x80) |
20337 | { |
20338 | res = 0xFF; |
20339 | PRE_IO |
20340 | WRITE_BYTE_F(adr, res) |
20341 | POST_IO |
20342 | RET(12) |
20343 | } |
20344 | res = 0; |
20345 | PRE_IO |
20346 | WRITE_BYTE_F(adr, res) |
20347 | POST_IO |
20348 | RET(12) |
20349 | } |
20350 | |
20351 | // STCC |
20352 | OPCODE(0x5ED0) |
20353 | { |
20354 | u32 adr, res; |
20355 | u32 src, dst; |
20356 | |
20357 | adr = AREG((Opcode >> 0) & 7); |
20358 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20359 | { |
20360 | res = 0xFF; |
20361 | PRE_IO |
20362 | WRITE_BYTE_F(adr, res) |
20363 | POST_IO |
20364 | RET(12) |
20365 | } |
20366 | res = 0; |
20367 | PRE_IO |
20368 | WRITE_BYTE_F(adr, res) |
20369 | POST_IO |
20370 | RET(12) |
20371 | } |
20372 | |
20373 | // STCC |
20374 | OPCODE(0x5FD0) |
20375 | { |
20376 | u32 adr, res; |
20377 | u32 src, dst; |
20378 | |
20379 | adr = AREG((Opcode >> 0) & 7); |
20380 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20381 | { |
20382 | res = 0xFF; |
20383 | PRE_IO |
20384 | WRITE_BYTE_F(adr, res) |
20385 | POST_IO |
20386 | RET(12) |
20387 | } |
20388 | res = 0; |
20389 | PRE_IO |
20390 | WRITE_BYTE_F(adr, res) |
20391 | POST_IO |
20392 | RET(12) |
20393 | } |
20394 | |
20395 | // STCC |
20396 | OPCODE(0x50D8) |
20397 | { |
20398 | u32 adr, res; |
20399 | u32 src, dst; |
20400 | |
20401 | adr = AREG((Opcode >> 0) & 7); |
20402 | AREG((Opcode >> 0) & 7) += 1; |
20403 | res = 0xFF; |
20404 | PRE_IO |
20405 | WRITE_BYTE_F(adr, res) |
20406 | POST_IO |
20407 | RET(12) |
20408 | } |
20409 | |
20410 | // STCC |
20411 | OPCODE(0x51D8) |
20412 | { |
20413 | u32 adr, res; |
20414 | u32 src, dst; |
20415 | |
20416 | adr = AREG((Opcode >> 0) & 7); |
20417 | AREG((Opcode >> 0) & 7) += 1; |
20418 | res = 0; |
20419 | PRE_IO |
20420 | WRITE_BYTE_F(adr, res) |
20421 | POST_IO |
20422 | RET(12) |
20423 | } |
20424 | |
20425 | // STCC |
20426 | OPCODE(0x52D8) |
20427 | { |
20428 | u32 adr, res; |
20429 | u32 src, dst; |
20430 | |
20431 | adr = AREG((Opcode >> 0) & 7); |
20432 | AREG((Opcode >> 0) & 7) += 1; |
20433 | if (flag_NotZ && (!(flag_C & 0x100))) |
20434 | { |
20435 | res = 0xFF; |
20436 | PRE_IO |
20437 | WRITE_BYTE_F(adr, res) |
20438 | POST_IO |
20439 | RET(12) |
20440 | } |
20441 | res = 0; |
20442 | PRE_IO |
20443 | WRITE_BYTE_F(adr, res) |
20444 | POST_IO |
20445 | RET(12) |
20446 | } |
20447 | |
20448 | // STCC |
20449 | OPCODE(0x53D8) |
20450 | { |
20451 | u32 adr, res; |
20452 | u32 src, dst; |
20453 | |
20454 | adr = AREG((Opcode >> 0) & 7); |
20455 | AREG((Opcode >> 0) & 7) += 1; |
20456 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20457 | { |
20458 | res = 0xFF; |
20459 | PRE_IO |
20460 | WRITE_BYTE_F(adr, res) |
20461 | POST_IO |
20462 | RET(12) |
20463 | } |
20464 | res = 0; |
20465 | PRE_IO |
20466 | WRITE_BYTE_F(adr, res) |
20467 | POST_IO |
20468 | RET(12) |
20469 | } |
20470 | |
20471 | // STCC |
20472 | OPCODE(0x54D8) |
20473 | { |
20474 | u32 adr, res; |
20475 | u32 src, dst; |
20476 | |
20477 | adr = AREG((Opcode >> 0) & 7); |
20478 | AREG((Opcode >> 0) & 7) += 1; |
20479 | if (!(flag_C & 0x100)) |
20480 | { |
20481 | res = 0xFF; |
20482 | PRE_IO |
20483 | WRITE_BYTE_F(adr, res) |
20484 | POST_IO |
20485 | RET(12) |
20486 | } |
20487 | res = 0; |
20488 | PRE_IO |
20489 | WRITE_BYTE_F(adr, res) |
20490 | POST_IO |
20491 | RET(12) |
20492 | } |
20493 | |
20494 | // STCC |
20495 | OPCODE(0x55D8) |
20496 | { |
20497 | u32 adr, res; |
20498 | u32 src, dst; |
20499 | |
20500 | adr = AREG((Opcode >> 0) & 7); |
20501 | AREG((Opcode >> 0) & 7) += 1; |
20502 | if (flag_C & 0x100) |
20503 | { |
20504 | res = 0xFF; |
20505 | PRE_IO |
20506 | WRITE_BYTE_F(adr, res) |
20507 | POST_IO |
20508 | RET(12) |
20509 | } |
20510 | res = 0; |
20511 | PRE_IO |
20512 | WRITE_BYTE_F(adr, res) |
20513 | POST_IO |
20514 | RET(12) |
20515 | } |
20516 | |
20517 | // STCC |
20518 | OPCODE(0x56D8) |
20519 | { |
20520 | u32 adr, res; |
20521 | u32 src, dst; |
20522 | |
20523 | adr = AREG((Opcode >> 0) & 7); |
20524 | AREG((Opcode >> 0) & 7) += 1; |
20525 | if (flag_NotZ) |
20526 | { |
20527 | res = 0xFF; |
20528 | PRE_IO |
20529 | WRITE_BYTE_F(adr, res) |
20530 | POST_IO |
20531 | RET(12) |
20532 | } |
20533 | res = 0; |
20534 | PRE_IO |
20535 | WRITE_BYTE_F(adr, res) |
20536 | POST_IO |
20537 | RET(12) |
20538 | } |
20539 | |
20540 | // STCC |
20541 | OPCODE(0x57D8) |
20542 | { |
20543 | u32 adr, res; |
20544 | u32 src, dst; |
20545 | |
20546 | adr = AREG((Opcode >> 0) & 7); |
20547 | AREG((Opcode >> 0) & 7) += 1; |
20548 | if (!flag_NotZ) |
20549 | { |
20550 | res = 0xFF; |
20551 | PRE_IO |
20552 | WRITE_BYTE_F(adr, res) |
20553 | POST_IO |
20554 | RET(12) |
20555 | } |
20556 | res = 0; |
20557 | PRE_IO |
20558 | WRITE_BYTE_F(adr, res) |
20559 | POST_IO |
20560 | RET(12) |
20561 | } |
20562 | |
20563 | // STCC |
20564 | OPCODE(0x58D8) |
20565 | { |
20566 | u32 adr, res; |
20567 | u32 src, dst; |
20568 | |
20569 | adr = AREG((Opcode >> 0) & 7); |
20570 | AREG((Opcode >> 0) & 7) += 1; |
20571 | if (!(flag_V & 0x80)) |
20572 | { |
20573 | res = 0xFF; |
20574 | PRE_IO |
20575 | WRITE_BYTE_F(adr, res) |
20576 | POST_IO |
20577 | RET(12) |
20578 | } |
20579 | res = 0; |
20580 | PRE_IO |
20581 | WRITE_BYTE_F(adr, res) |
20582 | POST_IO |
20583 | RET(12) |
20584 | } |
20585 | |
20586 | // STCC |
20587 | OPCODE(0x59D8) |
20588 | { |
20589 | u32 adr, res; |
20590 | u32 src, dst; |
20591 | |
20592 | adr = AREG((Opcode >> 0) & 7); |
20593 | AREG((Opcode >> 0) & 7) += 1; |
20594 | if (flag_V & 0x80) |
20595 | { |
20596 | res = 0xFF; |
20597 | PRE_IO |
20598 | WRITE_BYTE_F(adr, res) |
20599 | POST_IO |
20600 | RET(12) |
20601 | } |
20602 | res = 0; |
20603 | PRE_IO |
20604 | WRITE_BYTE_F(adr, res) |
20605 | POST_IO |
20606 | RET(12) |
20607 | } |
20608 | |
20609 | // STCC |
20610 | OPCODE(0x5AD8) |
20611 | { |
20612 | u32 adr, res; |
20613 | u32 src, dst; |
20614 | |
20615 | adr = AREG((Opcode >> 0) & 7); |
20616 | AREG((Opcode >> 0) & 7) += 1; |
20617 | if (!(flag_N & 0x80)) |
20618 | { |
20619 | res = 0xFF; |
20620 | PRE_IO |
20621 | WRITE_BYTE_F(adr, res) |
20622 | POST_IO |
20623 | RET(12) |
20624 | } |
20625 | res = 0; |
20626 | PRE_IO |
20627 | WRITE_BYTE_F(adr, res) |
20628 | POST_IO |
20629 | RET(12) |
20630 | } |
20631 | |
20632 | // STCC |
20633 | OPCODE(0x5BD8) |
20634 | { |
20635 | u32 adr, res; |
20636 | u32 src, dst; |
20637 | |
20638 | adr = AREG((Opcode >> 0) & 7); |
20639 | AREG((Opcode >> 0) & 7) += 1; |
20640 | if (flag_N & 0x80) |
20641 | { |
20642 | res = 0xFF; |
20643 | PRE_IO |
20644 | WRITE_BYTE_F(adr, res) |
20645 | POST_IO |
20646 | RET(12) |
20647 | } |
20648 | res = 0; |
20649 | PRE_IO |
20650 | WRITE_BYTE_F(adr, res) |
20651 | POST_IO |
20652 | RET(12) |
20653 | } |
20654 | |
20655 | // STCC |
20656 | OPCODE(0x5CD8) |
20657 | { |
20658 | u32 adr, res; |
20659 | u32 src, dst; |
20660 | |
20661 | adr = AREG((Opcode >> 0) & 7); |
20662 | AREG((Opcode >> 0) & 7) += 1; |
20663 | if (!((flag_N ^ flag_V) & 0x80)) |
20664 | { |
20665 | res = 0xFF; |
20666 | PRE_IO |
20667 | WRITE_BYTE_F(adr, res) |
20668 | POST_IO |
20669 | RET(12) |
20670 | } |
20671 | res = 0; |
20672 | PRE_IO |
20673 | WRITE_BYTE_F(adr, res) |
20674 | POST_IO |
20675 | RET(12) |
20676 | } |
20677 | |
20678 | // STCC |
20679 | OPCODE(0x5DD8) |
20680 | { |
20681 | u32 adr, res; |
20682 | u32 src, dst; |
20683 | |
20684 | adr = AREG((Opcode >> 0) & 7); |
20685 | AREG((Opcode >> 0) & 7) += 1; |
20686 | if ((flag_N ^ flag_V) & 0x80) |
20687 | { |
20688 | res = 0xFF; |
20689 | PRE_IO |
20690 | WRITE_BYTE_F(adr, res) |
20691 | POST_IO |
20692 | RET(12) |
20693 | } |
20694 | res = 0; |
20695 | PRE_IO |
20696 | WRITE_BYTE_F(adr, res) |
20697 | POST_IO |
20698 | RET(12) |
20699 | } |
20700 | |
20701 | // STCC |
20702 | OPCODE(0x5ED8) |
20703 | { |
20704 | u32 adr, res; |
20705 | u32 src, dst; |
20706 | |
20707 | adr = AREG((Opcode >> 0) & 7); |
20708 | AREG((Opcode >> 0) & 7) += 1; |
20709 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20710 | { |
20711 | res = 0xFF; |
20712 | PRE_IO |
20713 | WRITE_BYTE_F(adr, res) |
20714 | POST_IO |
20715 | RET(12) |
20716 | } |
20717 | res = 0; |
20718 | PRE_IO |
20719 | WRITE_BYTE_F(adr, res) |
20720 | POST_IO |
20721 | RET(12) |
20722 | } |
20723 | |
20724 | // STCC |
20725 | OPCODE(0x5FD8) |
20726 | { |
20727 | u32 adr, res; |
20728 | u32 src, dst; |
20729 | |
20730 | adr = AREG((Opcode >> 0) & 7); |
20731 | AREG((Opcode >> 0) & 7) += 1; |
20732 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20733 | { |
20734 | res = 0xFF; |
20735 | PRE_IO |
20736 | WRITE_BYTE_F(adr, res) |
20737 | POST_IO |
20738 | RET(12) |
20739 | } |
20740 | res = 0; |
20741 | PRE_IO |
20742 | WRITE_BYTE_F(adr, res) |
20743 | POST_IO |
20744 | RET(12) |
20745 | } |
20746 | |
20747 | // STCC |
20748 | OPCODE(0x50E0) |
20749 | { |
20750 | u32 adr, res; |
20751 | u32 src, dst; |
20752 | |
20753 | adr = AREG((Opcode >> 0) & 7) - 1; |
20754 | AREG((Opcode >> 0) & 7) = adr; |
20755 | res = 0xFF; |
20756 | PRE_IO |
20757 | WRITE_BYTE_F(adr, res) |
20758 | POST_IO |
20759 | RET(14) |
20760 | } |
20761 | |
20762 | // STCC |
20763 | OPCODE(0x51E0) |
20764 | { |
20765 | u32 adr, res; |
20766 | u32 src, dst; |
20767 | |
20768 | adr = AREG((Opcode >> 0) & 7) - 1; |
20769 | AREG((Opcode >> 0) & 7) = adr; |
20770 | res = 0; |
20771 | PRE_IO |
20772 | WRITE_BYTE_F(adr, res) |
20773 | POST_IO |
20774 | RET(14) |
20775 | } |
20776 | |
20777 | // STCC |
20778 | OPCODE(0x52E0) |
20779 | { |
20780 | u32 adr, res; |
20781 | u32 src, dst; |
20782 | |
20783 | adr = AREG((Opcode >> 0) & 7) - 1; |
20784 | AREG((Opcode >> 0) & 7) = adr; |
20785 | if (flag_NotZ && (!(flag_C & 0x100))) |
20786 | { |
20787 | res = 0xFF; |
20788 | PRE_IO |
20789 | WRITE_BYTE_F(adr, res) |
20790 | POST_IO |
20791 | RET(14) |
20792 | } |
20793 | res = 0; |
20794 | PRE_IO |
20795 | WRITE_BYTE_F(adr, res) |
20796 | POST_IO |
20797 | RET(14) |
20798 | } |
20799 | |
20800 | // STCC |
20801 | OPCODE(0x53E0) |
20802 | { |
20803 | u32 adr, res; |
20804 | u32 src, dst; |
20805 | |
20806 | adr = AREG((Opcode >> 0) & 7) - 1; |
20807 | AREG((Opcode >> 0) & 7) = adr; |
20808 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20809 | { |
20810 | res = 0xFF; |
20811 | PRE_IO |
20812 | WRITE_BYTE_F(adr, res) |
20813 | POST_IO |
20814 | RET(14) |
20815 | } |
20816 | res = 0; |
20817 | PRE_IO |
20818 | WRITE_BYTE_F(adr, res) |
20819 | POST_IO |
20820 | RET(14) |
20821 | } |
20822 | |
20823 | // STCC |
20824 | OPCODE(0x54E0) |
20825 | { |
20826 | u32 adr, res; |
20827 | u32 src, dst; |
20828 | |
20829 | adr = AREG((Opcode >> 0) & 7) - 1; |
20830 | AREG((Opcode >> 0) & 7) = adr; |
20831 | if (!(flag_C & 0x100)) |
20832 | { |
20833 | res = 0xFF; |
20834 | PRE_IO |
20835 | WRITE_BYTE_F(adr, res) |
20836 | POST_IO |
20837 | RET(14) |
20838 | } |
20839 | res = 0; |
20840 | PRE_IO |
20841 | WRITE_BYTE_F(adr, res) |
20842 | POST_IO |
20843 | RET(14) |
20844 | } |
20845 | |
20846 | // STCC |
20847 | OPCODE(0x55E0) |
20848 | { |
20849 | u32 adr, res; |
20850 | u32 src, dst; |
20851 | |
20852 | adr = AREG((Opcode >> 0) & 7) - 1; |
20853 | AREG((Opcode >> 0) & 7) = adr; |
20854 | if (flag_C & 0x100) |
20855 | { |
20856 | res = 0xFF; |
20857 | PRE_IO |
20858 | WRITE_BYTE_F(adr, res) |
20859 | POST_IO |
20860 | RET(14) |
20861 | } |
20862 | res = 0; |
20863 | PRE_IO |
20864 | WRITE_BYTE_F(adr, res) |
20865 | POST_IO |
20866 | RET(14) |
20867 | } |
20868 | |
20869 | // STCC |
20870 | OPCODE(0x56E0) |
20871 | { |
20872 | u32 adr, res; |
20873 | u32 src, dst; |
20874 | |
20875 | adr = AREG((Opcode >> 0) & 7) - 1; |
20876 | AREG((Opcode >> 0) & 7) = adr; |
20877 | if (flag_NotZ) |
20878 | { |
20879 | res = 0xFF; |
20880 | PRE_IO |
20881 | WRITE_BYTE_F(adr, res) |
20882 | POST_IO |
20883 | RET(14) |
20884 | } |
20885 | res = 0; |
20886 | PRE_IO |
20887 | WRITE_BYTE_F(adr, res) |
20888 | POST_IO |
20889 | RET(14) |
20890 | } |
20891 | |
20892 | // STCC |
20893 | OPCODE(0x57E0) |
20894 | { |
20895 | u32 adr, res; |
20896 | u32 src, dst; |
20897 | |
20898 | adr = AREG((Opcode >> 0) & 7) - 1; |
20899 | AREG((Opcode >> 0) & 7) = adr; |
20900 | if (!flag_NotZ) |
20901 | { |
20902 | res = 0xFF; |
20903 | PRE_IO |
20904 | WRITE_BYTE_F(adr, res) |
20905 | POST_IO |
20906 | RET(14) |
20907 | } |
20908 | res = 0; |
20909 | PRE_IO |
20910 | WRITE_BYTE_F(adr, res) |
20911 | POST_IO |
20912 | RET(14) |
20913 | } |
20914 | |
20915 | // STCC |
20916 | OPCODE(0x58E0) |
20917 | { |
20918 | u32 adr, res; |
20919 | u32 src, dst; |
20920 | |
20921 | adr = AREG((Opcode >> 0) & 7) - 1; |
20922 | AREG((Opcode >> 0) & 7) = adr; |
20923 | if (!(flag_V & 0x80)) |
20924 | { |
20925 | res = 0xFF; |
20926 | PRE_IO |
20927 | WRITE_BYTE_F(adr, res) |
20928 | POST_IO |
20929 | RET(14) |
20930 | } |
20931 | res = 0; |
20932 | PRE_IO |
20933 | WRITE_BYTE_F(adr, res) |
20934 | POST_IO |
20935 | RET(14) |
20936 | } |
20937 | |
20938 | // STCC |
20939 | OPCODE(0x59E0) |
20940 | { |
20941 | u32 adr, res; |
20942 | u32 src, dst; |
20943 | |
20944 | adr = AREG((Opcode >> 0) & 7) - 1; |
20945 | AREG((Opcode >> 0) & 7) = adr; |
20946 | if (flag_V & 0x80) |
20947 | { |
20948 | res = 0xFF; |
20949 | PRE_IO |
20950 | WRITE_BYTE_F(adr, res) |
20951 | POST_IO |
20952 | RET(14) |
20953 | } |
20954 | res = 0; |
20955 | PRE_IO |
20956 | WRITE_BYTE_F(adr, res) |
20957 | POST_IO |
20958 | RET(14) |
20959 | } |
20960 | |
20961 | // STCC |
20962 | OPCODE(0x5AE0) |
20963 | { |
20964 | u32 adr, res; |
20965 | u32 src, dst; |
20966 | |
20967 | adr = AREG((Opcode >> 0) & 7) - 1; |
20968 | AREG((Opcode >> 0) & 7) = adr; |
20969 | if (!(flag_N & 0x80)) |
20970 | { |
20971 | res = 0xFF; |
20972 | PRE_IO |
20973 | WRITE_BYTE_F(adr, res) |
20974 | POST_IO |
20975 | RET(14) |
20976 | } |
20977 | res = 0; |
20978 | PRE_IO |
20979 | WRITE_BYTE_F(adr, res) |
20980 | POST_IO |
20981 | RET(14) |
20982 | } |
20983 | |
20984 | // STCC |
20985 | OPCODE(0x5BE0) |
20986 | { |
20987 | u32 adr, res; |
20988 | u32 src, dst; |
20989 | |
20990 | adr = AREG((Opcode >> 0) & 7) - 1; |
20991 | AREG((Opcode >> 0) & 7) = adr; |
20992 | if (flag_N & 0x80) |
20993 | { |
20994 | res = 0xFF; |
20995 | PRE_IO |
20996 | WRITE_BYTE_F(adr, res) |
20997 | POST_IO |
20998 | RET(14) |
20999 | } |
21000 | res = 0; |
21001 | PRE_IO |
21002 | WRITE_BYTE_F(adr, res) |
21003 | POST_IO |
21004 | RET(14) |
21005 | } |
21006 | |
21007 | // STCC |
21008 | OPCODE(0x5CE0) |
21009 | { |
21010 | u32 adr, res; |
21011 | u32 src, dst; |
21012 | |
21013 | adr = AREG((Opcode >> 0) & 7) - 1; |
21014 | AREG((Opcode >> 0) & 7) = adr; |
21015 | if (!((flag_N ^ flag_V) & 0x80)) |
21016 | { |
21017 | res = 0xFF; |
21018 | PRE_IO |
21019 | WRITE_BYTE_F(adr, res) |
21020 | POST_IO |
21021 | RET(14) |
21022 | } |
21023 | res = 0; |
21024 | PRE_IO |
21025 | WRITE_BYTE_F(adr, res) |
21026 | POST_IO |
21027 | RET(14) |
21028 | } |
21029 | |
21030 | // STCC |
21031 | OPCODE(0x5DE0) |
21032 | { |
21033 | u32 adr, res; |
21034 | u32 src, dst; |
21035 | |
21036 | adr = AREG((Opcode >> 0) & 7) - 1; |
21037 | AREG((Opcode >> 0) & 7) = adr; |
21038 | if ((flag_N ^ flag_V) & 0x80) |
21039 | { |
21040 | res = 0xFF; |
21041 | PRE_IO |
21042 | WRITE_BYTE_F(adr, res) |
21043 | POST_IO |
21044 | RET(14) |
21045 | } |
21046 | res = 0; |
21047 | PRE_IO |
21048 | WRITE_BYTE_F(adr, res) |
21049 | POST_IO |
21050 | RET(14) |
21051 | } |
21052 | |
21053 | // STCC |
21054 | OPCODE(0x5EE0) |
21055 | { |
21056 | u32 adr, res; |
21057 | u32 src, dst; |
21058 | |
21059 | adr = AREG((Opcode >> 0) & 7) - 1; |
21060 | AREG((Opcode >> 0) & 7) = adr; |
21061 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21062 | { |
21063 | res = 0xFF; |
21064 | PRE_IO |
21065 | WRITE_BYTE_F(adr, res) |
21066 | POST_IO |
21067 | RET(14) |
21068 | } |
21069 | res = 0; |
21070 | PRE_IO |
21071 | WRITE_BYTE_F(adr, res) |
21072 | POST_IO |
21073 | RET(14) |
21074 | } |
21075 | |
21076 | // STCC |
21077 | OPCODE(0x5FE0) |
21078 | { |
21079 | u32 adr, res; |
21080 | u32 src, dst; |
21081 | |
21082 | adr = AREG((Opcode >> 0) & 7) - 1; |
21083 | AREG((Opcode >> 0) & 7) = adr; |
21084 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21085 | { |
21086 | res = 0xFF; |
21087 | PRE_IO |
21088 | WRITE_BYTE_F(adr, res) |
21089 | POST_IO |
21090 | RET(14) |
21091 | } |
21092 | res = 0; |
21093 | PRE_IO |
21094 | WRITE_BYTE_F(adr, res) |
21095 | POST_IO |
21096 | RET(14) |
21097 | } |
21098 | |
21099 | // STCC |
21100 | OPCODE(0x50E8) |
21101 | { |
21102 | u32 adr, res; |
21103 | u32 src, dst; |
21104 | |
21105 | FETCH_SWORD(adr); |
21106 | adr += AREG((Opcode >> 0) & 7); |
21107 | res = 0xFF; |
21108 | PRE_IO |
21109 | WRITE_BYTE_F(adr, res) |
21110 | POST_IO |
21111 | RET(16) |
21112 | } |
21113 | |
21114 | // STCC |
21115 | OPCODE(0x51E8) |
21116 | { |
21117 | u32 adr, res; |
21118 | u32 src, dst; |
21119 | |
21120 | FETCH_SWORD(adr); |
21121 | adr += AREG((Opcode >> 0) & 7); |
21122 | res = 0; |
21123 | PRE_IO |
21124 | WRITE_BYTE_F(adr, res) |
21125 | POST_IO |
21126 | RET(16) |
21127 | } |
21128 | |
21129 | // STCC |
21130 | OPCODE(0x52E8) |
21131 | { |
21132 | u32 adr, res; |
21133 | u32 src, dst; |
21134 | |
21135 | FETCH_SWORD(adr); |
21136 | adr += AREG((Opcode >> 0) & 7); |
21137 | if (flag_NotZ && (!(flag_C & 0x100))) |
21138 | { |
21139 | res = 0xFF; |
21140 | PRE_IO |
21141 | WRITE_BYTE_F(adr, res) |
21142 | POST_IO |
21143 | RET(16) |
21144 | } |
21145 | res = 0; |
21146 | PRE_IO |
21147 | WRITE_BYTE_F(adr, res) |
21148 | POST_IO |
21149 | RET(16) |
21150 | } |
21151 | |
21152 | // STCC |
21153 | OPCODE(0x53E8) |
21154 | { |
21155 | u32 adr, res; |
21156 | u32 src, dst; |
21157 | |
21158 | FETCH_SWORD(adr); |
21159 | adr += AREG((Opcode >> 0) & 7); |
21160 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21161 | { |
21162 | res = 0xFF; |
21163 | PRE_IO |
21164 | WRITE_BYTE_F(adr, res) |
21165 | POST_IO |
21166 | RET(16) |
21167 | } |
21168 | res = 0; |
21169 | PRE_IO |
21170 | WRITE_BYTE_F(adr, res) |
21171 | POST_IO |
21172 | RET(16) |
21173 | } |
21174 | |
21175 | // STCC |
21176 | OPCODE(0x54E8) |
21177 | { |
21178 | u32 adr, res; |
21179 | u32 src, dst; |
21180 | |
21181 | FETCH_SWORD(adr); |
21182 | adr += AREG((Opcode >> 0) & 7); |
21183 | if (!(flag_C & 0x100)) |
21184 | { |
21185 | res = 0xFF; |
21186 | PRE_IO |
21187 | WRITE_BYTE_F(adr, res) |
21188 | POST_IO |
21189 | RET(16) |
21190 | } |
21191 | res = 0; |
21192 | PRE_IO |
21193 | WRITE_BYTE_F(adr, res) |
21194 | POST_IO |
21195 | RET(16) |
21196 | } |
21197 | |
21198 | // STCC |
21199 | OPCODE(0x55E8) |
21200 | { |
21201 | u32 adr, res; |
21202 | u32 src, dst; |
21203 | |
21204 | FETCH_SWORD(adr); |
21205 | adr += AREG((Opcode >> 0) & 7); |
21206 | if (flag_C & 0x100) |
21207 | { |
21208 | res = 0xFF; |
21209 | PRE_IO |
21210 | WRITE_BYTE_F(adr, res) |
21211 | POST_IO |
21212 | RET(16) |
21213 | } |
21214 | res = 0; |
21215 | PRE_IO |
21216 | WRITE_BYTE_F(adr, res) |
21217 | POST_IO |
21218 | RET(16) |
21219 | } |
21220 | |
21221 | // STCC |
21222 | OPCODE(0x56E8) |
21223 | { |
21224 | u32 adr, res; |
21225 | u32 src, dst; |
21226 | |
21227 | FETCH_SWORD(adr); |
21228 | adr += AREG((Opcode >> 0) & 7); |
21229 | if (flag_NotZ) |
21230 | { |
21231 | res = 0xFF; |
21232 | PRE_IO |
21233 | WRITE_BYTE_F(adr, res) |
21234 | POST_IO |
21235 | RET(16) |
21236 | } |
21237 | res = 0; |
21238 | PRE_IO |
21239 | WRITE_BYTE_F(adr, res) |
21240 | POST_IO |
21241 | RET(16) |
21242 | } |
21243 | |
21244 | // STCC |
21245 | OPCODE(0x57E8) |
21246 | { |
21247 | u32 adr, res; |
21248 | u32 src, dst; |
21249 | |
21250 | FETCH_SWORD(adr); |
21251 | adr += AREG((Opcode >> 0) & 7); |
21252 | if (!flag_NotZ) |
21253 | { |
21254 | res = 0xFF; |
21255 | PRE_IO |
21256 | WRITE_BYTE_F(adr, res) |
21257 | POST_IO |
21258 | RET(16) |
21259 | } |
21260 | res = 0; |
21261 | PRE_IO |
21262 | WRITE_BYTE_F(adr, res) |
21263 | POST_IO |
21264 | RET(16) |
21265 | } |
21266 | |
21267 | // STCC |
21268 | OPCODE(0x58E8) |
21269 | { |
21270 | u32 adr, res; |
21271 | u32 src, dst; |
21272 | |
21273 | FETCH_SWORD(adr); |
21274 | adr += AREG((Opcode >> 0) & 7); |
21275 | if (!(flag_V & 0x80)) |
21276 | { |
21277 | res = 0xFF; |
21278 | PRE_IO |
21279 | WRITE_BYTE_F(adr, res) |
21280 | POST_IO |
21281 | RET(16) |
21282 | } |
21283 | res = 0; |
21284 | PRE_IO |
21285 | WRITE_BYTE_F(adr, res) |
21286 | POST_IO |
21287 | RET(16) |
21288 | } |
21289 | |
21290 | // STCC |
21291 | OPCODE(0x59E8) |
21292 | { |
21293 | u32 adr, res; |
21294 | u32 src, dst; |
21295 | |
21296 | FETCH_SWORD(adr); |
21297 | adr += AREG((Opcode >> 0) & 7); |
21298 | if (flag_V & 0x80) |
21299 | { |
21300 | res = 0xFF; |
21301 | PRE_IO |
21302 | WRITE_BYTE_F(adr, res) |
21303 | POST_IO |
21304 | RET(16) |
21305 | } |
21306 | res = 0; |
21307 | PRE_IO |
21308 | WRITE_BYTE_F(adr, res) |
21309 | POST_IO |
21310 | RET(16) |
21311 | } |
21312 | |
21313 | // STCC |
21314 | OPCODE(0x5AE8) |
21315 | { |
21316 | u32 adr, res; |
21317 | u32 src, dst; |
21318 | |
21319 | FETCH_SWORD(adr); |
21320 | adr += AREG((Opcode >> 0) & 7); |
21321 | if (!(flag_N & 0x80)) |
21322 | { |
21323 | res = 0xFF; |
21324 | PRE_IO |
21325 | WRITE_BYTE_F(adr, res) |
21326 | POST_IO |
21327 | RET(16) |
21328 | } |
21329 | res = 0; |
21330 | PRE_IO |
21331 | WRITE_BYTE_F(adr, res) |
21332 | POST_IO |
21333 | RET(16) |
21334 | } |
21335 | |
21336 | // STCC |
21337 | OPCODE(0x5BE8) |
21338 | { |
21339 | u32 adr, res; |
21340 | u32 src, dst; |
21341 | |
21342 | FETCH_SWORD(adr); |
21343 | adr += AREG((Opcode >> 0) & 7); |
21344 | if (flag_N & 0x80) |
21345 | { |
21346 | res = 0xFF; |
21347 | PRE_IO |
21348 | WRITE_BYTE_F(adr, res) |
21349 | POST_IO |
21350 | RET(16) |
21351 | } |
21352 | res = 0; |
21353 | PRE_IO |
21354 | WRITE_BYTE_F(adr, res) |
21355 | POST_IO |
21356 | RET(16) |
21357 | } |
21358 | |
21359 | // STCC |
21360 | OPCODE(0x5CE8) |
21361 | { |
21362 | u32 adr, res; |
21363 | u32 src, dst; |
21364 | |
21365 | FETCH_SWORD(adr); |
21366 | adr += AREG((Opcode >> 0) & 7); |
21367 | if (!((flag_N ^ flag_V) & 0x80)) |
21368 | { |
21369 | res = 0xFF; |
21370 | PRE_IO |
21371 | WRITE_BYTE_F(adr, res) |
21372 | POST_IO |
21373 | RET(16) |
21374 | } |
21375 | res = 0; |
21376 | PRE_IO |
21377 | WRITE_BYTE_F(adr, res) |
21378 | POST_IO |
21379 | RET(16) |
21380 | } |
21381 | |
21382 | // STCC |
21383 | OPCODE(0x5DE8) |
21384 | { |
21385 | u32 adr, res; |
21386 | u32 src, dst; |
21387 | |
21388 | FETCH_SWORD(adr); |
21389 | adr += AREG((Opcode >> 0) & 7); |
21390 | if ((flag_N ^ flag_V) & 0x80) |
21391 | { |
21392 | res = 0xFF; |
21393 | PRE_IO |
21394 | WRITE_BYTE_F(adr, res) |
21395 | POST_IO |
21396 | RET(16) |
21397 | } |
21398 | res = 0; |
21399 | PRE_IO |
21400 | WRITE_BYTE_F(adr, res) |
21401 | POST_IO |
21402 | RET(16) |
21403 | } |
21404 | |
21405 | // STCC |
21406 | OPCODE(0x5EE8) |
21407 | { |
21408 | u32 adr, res; |
21409 | u32 src, dst; |
21410 | |
21411 | FETCH_SWORD(adr); |
21412 | adr += AREG((Opcode >> 0) & 7); |
21413 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21414 | { |
21415 | res = 0xFF; |
21416 | PRE_IO |
21417 | WRITE_BYTE_F(adr, res) |
21418 | POST_IO |
21419 | RET(16) |
21420 | } |
21421 | res = 0; |
21422 | PRE_IO |
21423 | WRITE_BYTE_F(adr, res) |
21424 | POST_IO |
21425 | RET(16) |
21426 | } |
21427 | |
21428 | // STCC |
21429 | OPCODE(0x5FE8) |
21430 | { |
21431 | u32 adr, res; |
21432 | u32 src, dst; |
21433 | |
21434 | FETCH_SWORD(adr); |
21435 | adr += AREG((Opcode >> 0) & 7); |
21436 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21437 | { |
21438 | res = 0xFF; |
21439 | PRE_IO |
21440 | WRITE_BYTE_F(adr, res) |
21441 | POST_IO |
21442 | RET(16) |
21443 | } |
21444 | res = 0; |
21445 | PRE_IO |
21446 | WRITE_BYTE_F(adr, res) |
21447 | POST_IO |
21448 | RET(16) |
21449 | } |
21450 | |
21451 | // STCC |
21452 | OPCODE(0x50F0) |
21453 | { |
21454 | u32 adr, res; |
21455 | u32 src, dst; |
21456 | |
21457 | adr = AREG((Opcode >> 0) & 7); |
21458 | DECODE_EXT_WORD |
21459 | res = 0xFF; |
21460 | PRE_IO |
21461 | WRITE_BYTE_F(adr, res) |
21462 | POST_IO |
21463 | RET(18) |
21464 | } |
21465 | |
21466 | // STCC |
21467 | OPCODE(0x51F0) |
21468 | { |
21469 | u32 adr, res; |
21470 | u32 src, dst; |
21471 | |
21472 | adr = AREG((Opcode >> 0) & 7); |
21473 | DECODE_EXT_WORD |
21474 | res = 0; |
21475 | PRE_IO |
21476 | WRITE_BYTE_F(adr, res) |
21477 | POST_IO |
21478 | RET(18) |
21479 | } |
21480 | |
21481 | // STCC |
21482 | OPCODE(0x52F0) |
21483 | { |
21484 | u32 adr, res; |
21485 | u32 src, dst; |
21486 | |
21487 | adr = AREG((Opcode >> 0) & 7); |
21488 | DECODE_EXT_WORD |
21489 | if (flag_NotZ && (!(flag_C & 0x100))) |
21490 | { |
21491 | res = 0xFF; |
21492 | PRE_IO |
21493 | WRITE_BYTE_F(adr, res) |
21494 | POST_IO |
21495 | RET(18) |
21496 | } |
21497 | res = 0; |
21498 | PRE_IO |
21499 | WRITE_BYTE_F(adr, res) |
21500 | POST_IO |
21501 | RET(18) |
21502 | } |
21503 | |
21504 | // STCC |
21505 | OPCODE(0x53F0) |
21506 | { |
21507 | u32 adr, res; |
21508 | u32 src, dst; |
21509 | |
21510 | adr = AREG((Opcode >> 0) & 7); |
21511 | DECODE_EXT_WORD |
21512 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21513 | { |
21514 | res = 0xFF; |
21515 | PRE_IO |
21516 | WRITE_BYTE_F(adr, res) |
21517 | POST_IO |
21518 | RET(18) |
21519 | } |
21520 | res = 0; |
21521 | PRE_IO |
21522 | WRITE_BYTE_F(adr, res) |
21523 | POST_IO |
21524 | RET(18) |
21525 | } |
21526 | |
21527 | // STCC |
21528 | OPCODE(0x54F0) |
21529 | { |
21530 | u32 adr, res; |
21531 | u32 src, dst; |
21532 | |
21533 | adr = AREG((Opcode >> 0) & 7); |
21534 | DECODE_EXT_WORD |
21535 | if (!(flag_C & 0x100)) |
21536 | { |
21537 | res = 0xFF; |
21538 | PRE_IO |
21539 | WRITE_BYTE_F(adr, res) |
21540 | POST_IO |
21541 | RET(18) |
21542 | } |
21543 | res = 0; |
21544 | PRE_IO |
21545 | WRITE_BYTE_F(adr, res) |
21546 | POST_IO |
21547 | RET(18) |
21548 | } |
21549 | |
21550 | // STCC |
21551 | OPCODE(0x55F0) |
21552 | { |
21553 | u32 adr, res; |
21554 | u32 src, dst; |
21555 | |
21556 | adr = AREG((Opcode >> 0) & 7); |
21557 | DECODE_EXT_WORD |
21558 | if (flag_C & 0x100) |
21559 | { |
21560 | res = 0xFF; |
21561 | PRE_IO |
21562 | WRITE_BYTE_F(adr, res) |
21563 | POST_IO |
21564 | RET(18) |
21565 | } |
21566 | res = 0; |
21567 | PRE_IO |
21568 | WRITE_BYTE_F(adr, res) |
21569 | POST_IO |
21570 | RET(18) |
21571 | } |
21572 | |
21573 | // STCC |
21574 | OPCODE(0x56F0) |
21575 | { |
21576 | u32 adr, res; |
21577 | u32 src, dst; |
21578 | |
21579 | adr = AREG((Opcode >> 0) & 7); |
21580 | DECODE_EXT_WORD |
21581 | if (flag_NotZ) |
21582 | { |
21583 | res = 0xFF; |
21584 | PRE_IO |
21585 | WRITE_BYTE_F(adr, res) |
21586 | POST_IO |
21587 | RET(18) |
21588 | } |
21589 | res = 0; |
21590 | PRE_IO |
21591 | WRITE_BYTE_F(adr, res) |
21592 | POST_IO |
21593 | RET(18) |
21594 | } |
21595 | |
21596 | // STCC |
21597 | OPCODE(0x57F0) |
21598 | { |
21599 | u32 adr, res; |
21600 | u32 src, dst; |
21601 | |
21602 | adr = AREG((Opcode >> 0) & 7); |
21603 | DECODE_EXT_WORD |
21604 | if (!flag_NotZ) |
21605 | { |
21606 | res = 0xFF; |
21607 | PRE_IO |
21608 | WRITE_BYTE_F(adr, res) |
21609 | POST_IO |
21610 | RET(18) |
21611 | } |
21612 | res = 0; |
21613 | PRE_IO |
21614 | WRITE_BYTE_F(adr, res) |
21615 | POST_IO |
21616 | RET(18) |
21617 | } |
21618 | |
21619 | // STCC |
21620 | OPCODE(0x58F0) |
21621 | { |
21622 | u32 adr, res; |
21623 | u32 src, dst; |
21624 | |
21625 | adr = AREG((Opcode >> 0) & 7); |
21626 | DECODE_EXT_WORD |
21627 | if (!(flag_V & 0x80)) |
21628 | { |
21629 | res = 0xFF; |
21630 | PRE_IO |
21631 | WRITE_BYTE_F(adr, res) |
21632 | POST_IO |
21633 | RET(18) |
21634 | } |
21635 | res = 0; |
21636 | PRE_IO |
21637 | WRITE_BYTE_F(adr, res) |
21638 | POST_IO |
21639 | RET(18) |
21640 | } |
21641 | |
21642 | // STCC |
21643 | OPCODE(0x59F0) |
21644 | { |
21645 | u32 adr, res; |
21646 | u32 src, dst; |
21647 | |
21648 | adr = AREG((Opcode >> 0) & 7); |
21649 | DECODE_EXT_WORD |
21650 | if (flag_V & 0x80) |
21651 | { |
21652 | res = 0xFF; |
21653 | PRE_IO |
21654 | WRITE_BYTE_F(adr, res) |
21655 | POST_IO |
21656 | RET(18) |
21657 | } |
21658 | res = 0; |
21659 | PRE_IO |
21660 | WRITE_BYTE_F(adr, res) |
21661 | POST_IO |
21662 | RET(18) |
21663 | } |
21664 | |
21665 | // STCC |
21666 | OPCODE(0x5AF0) |
21667 | { |
21668 | u32 adr, res; |
21669 | u32 src, dst; |
21670 | |
21671 | adr = AREG((Opcode >> 0) & 7); |
21672 | DECODE_EXT_WORD |
21673 | if (!(flag_N & 0x80)) |
21674 | { |
21675 | res = 0xFF; |
21676 | PRE_IO |
21677 | WRITE_BYTE_F(adr, res) |
21678 | POST_IO |
21679 | RET(18) |
21680 | } |
21681 | res = 0; |
21682 | PRE_IO |
21683 | WRITE_BYTE_F(adr, res) |
21684 | POST_IO |
21685 | RET(18) |
21686 | } |
21687 | |
21688 | // STCC |
21689 | OPCODE(0x5BF0) |
21690 | { |
21691 | u32 adr, res; |
21692 | u32 src, dst; |
21693 | |
21694 | adr = AREG((Opcode >> 0) & 7); |
21695 | DECODE_EXT_WORD |
21696 | if (flag_N & 0x80) |
21697 | { |
21698 | res = 0xFF; |
21699 | PRE_IO |
21700 | WRITE_BYTE_F(adr, res) |
21701 | POST_IO |
21702 | RET(18) |
21703 | } |
21704 | res = 0; |
21705 | PRE_IO |
21706 | WRITE_BYTE_F(adr, res) |
21707 | POST_IO |
21708 | RET(18) |
21709 | } |
21710 | |
21711 | // STCC |
21712 | OPCODE(0x5CF0) |
21713 | { |
21714 | u32 adr, res; |
21715 | u32 src, dst; |
21716 | |
21717 | adr = AREG((Opcode >> 0) & 7); |
21718 | DECODE_EXT_WORD |
21719 | if (!((flag_N ^ flag_V) & 0x80)) |
21720 | { |
21721 | res = 0xFF; |
21722 | PRE_IO |
21723 | WRITE_BYTE_F(adr, res) |
21724 | POST_IO |
21725 | RET(18) |
21726 | } |
21727 | res = 0; |
21728 | PRE_IO |
21729 | WRITE_BYTE_F(adr, res) |
21730 | POST_IO |
21731 | RET(18) |
21732 | } |
21733 | |
21734 | // STCC |
21735 | OPCODE(0x5DF0) |
21736 | { |
21737 | u32 adr, res; |
21738 | u32 src, dst; |
21739 | |
21740 | adr = AREG((Opcode >> 0) & 7); |
21741 | DECODE_EXT_WORD |
21742 | if ((flag_N ^ flag_V) & 0x80) |
21743 | { |
21744 | res = 0xFF; |
21745 | PRE_IO |
21746 | WRITE_BYTE_F(adr, res) |
21747 | POST_IO |
21748 | RET(18) |
21749 | } |
21750 | res = 0; |
21751 | PRE_IO |
21752 | WRITE_BYTE_F(adr, res) |
21753 | POST_IO |
21754 | RET(18) |
21755 | } |
21756 | |
21757 | // STCC |
21758 | OPCODE(0x5EF0) |
21759 | { |
21760 | u32 adr, res; |
21761 | u32 src, dst; |
21762 | |
21763 | adr = AREG((Opcode >> 0) & 7); |
21764 | DECODE_EXT_WORD |
21765 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21766 | { |
21767 | res = 0xFF; |
21768 | PRE_IO |
21769 | WRITE_BYTE_F(adr, res) |
21770 | POST_IO |
21771 | RET(18) |
21772 | } |
21773 | res = 0; |
21774 | PRE_IO |
21775 | WRITE_BYTE_F(adr, res) |
21776 | POST_IO |
21777 | RET(18) |
21778 | } |
21779 | |
21780 | // STCC |
21781 | OPCODE(0x5FF0) |
21782 | { |
21783 | u32 adr, res; |
21784 | u32 src, dst; |
21785 | |
21786 | adr = AREG((Opcode >> 0) & 7); |
21787 | DECODE_EXT_WORD |
21788 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21789 | { |
21790 | res = 0xFF; |
21791 | PRE_IO |
21792 | WRITE_BYTE_F(adr, res) |
21793 | POST_IO |
21794 | RET(18) |
21795 | } |
21796 | res = 0; |
21797 | PRE_IO |
21798 | WRITE_BYTE_F(adr, res) |
21799 | POST_IO |
21800 | RET(18) |
21801 | } |
21802 | |
21803 | // STCC |
21804 | OPCODE(0x50F8) |
21805 | { |
21806 | u32 adr, res; |
21807 | u32 src, dst; |
21808 | |
21809 | FETCH_SWORD(adr); |
21810 | res = 0xFF; |
21811 | PRE_IO |
21812 | WRITE_BYTE_F(adr, res) |
21813 | POST_IO |
21814 | RET(16) |
21815 | } |
21816 | |
21817 | // STCC |
21818 | OPCODE(0x51F8) |
21819 | { |
21820 | u32 adr, res; |
21821 | u32 src, dst; |
21822 | |
21823 | FETCH_SWORD(adr); |
21824 | res = 0; |
21825 | PRE_IO |
21826 | WRITE_BYTE_F(adr, res) |
21827 | POST_IO |
21828 | RET(16) |
21829 | } |
21830 | |
21831 | // STCC |
21832 | OPCODE(0x52F8) |
21833 | { |
21834 | u32 adr, res; |
21835 | u32 src, dst; |
21836 | |
21837 | FETCH_SWORD(adr); |
21838 | if (flag_NotZ && (!(flag_C & 0x100))) |
21839 | { |
21840 | res = 0xFF; |
21841 | PRE_IO |
21842 | WRITE_BYTE_F(adr, res) |
21843 | POST_IO |
21844 | RET(16) |
21845 | } |
21846 | res = 0; |
21847 | PRE_IO |
21848 | WRITE_BYTE_F(adr, res) |
21849 | POST_IO |
21850 | RET(16) |
21851 | } |
21852 | |
21853 | // STCC |
21854 | OPCODE(0x53F8) |
21855 | { |
21856 | u32 adr, res; |
21857 | u32 src, dst; |
21858 | |
21859 | FETCH_SWORD(adr); |
21860 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21861 | { |
21862 | res = 0xFF; |
21863 | PRE_IO |
21864 | WRITE_BYTE_F(adr, res) |
21865 | POST_IO |
21866 | RET(16) |
21867 | } |
21868 | res = 0; |
21869 | PRE_IO |
21870 | WRITE_BYTE_F(adr, res) |
21871 | POST_IO |
21872 | RET(16) |
21873 | } |
21874 | |
21875 | // STCC |
21876 | OPCODE(0x54F8) |
21877 | { |
21878 | u32 adr, res; |
21879 | u32 src, dst; |
21880 | |
21881 | FETCH_SWORD(adr); |
21882 | if (!(flag_C & 0x100)) |
21883 | { |
21884 | res = 0xFF; |
21885 | PRE_IO |
21886 | WRITE_BYTE_F(adr, res) |
21887 | POST_IO |
21888 | RET(16) |
21889 | } |
21890 | res = 0; |
21891 | PRE_IO |
21892 | WRITE_BYTE_F(adr, res) |
21893 | POST_IO |
21894 | RET(16) |
21895 | } |
21896 | |
21897 | // STCC |
21898 | OPCODE(0x55F8) |
21899 | { |
21900 | u32 adr, res; |
21901 | u32 src, dst; |
21902 | |
21903 | FETCH_SWORD(adr); |
21904 | if (flag_C & 0x100) |
21905 | { |
21906 | res = 0xFF; |
21907 | PRE_IO |
21908 | WRITE_BYTE_F(adr, res) |
21909 | POST_IO |
21910 | RET(16) |
21911 | } |
21912 | res = 0; |
21913 | PRE_IO |
21914 | WRITE_BYTE_F(adr, res) |
21915 | POST_IO |
21916 | RET(16) |
21917 | } |
21918 | |
21919 | // STCC |
21920 | OPCODE(0x56F8) |
21921 | { |
21922 | u32 adr, res; |
21923 | u32 src, dst; |
21924 | |
21925 | FETCH_SWORD(adr); |
21926 | if (flag_NotZ) |
21927 | { |
21928 | res = 0xFF; |
21929 | PRE_IO |
21930 | WRITE_BYTE_F(adr, res) |
21931 | POST_IO |
21932 | RET(16) |
21933 | } |
21934 | res = 0; |
21935 | PRE_IO |
21936 | WRITE_BYTE_F(adr, res) |
21937 | POST_IO |
21938 | RET(16) |
21939 | } |
21940 | |
21941 | // STCC |
21942 | OPCODE(0x57F8) |
21943 | { |
21944 | u32 adr, res; |
21945 | u32 src, dst; |
21946 | |
21947 | FETCH_SWORD(adr); |
21948 | if (!flag_NotZ) |
21949 | { |
21950 | res = 0xFF; |
21951 | PRE_IO |
21952 | WRITE_BYTE_F(adr, res) |
21953 | POST_IO |
21954 | RET(16) |
21955 | } |
21956 | res = 0; |
21957 | PRE_IO |
21958 | WRITE_BYTE_F(adr, res) |
21959 | POST_IO |
21960 | RET(16) |
21961 | } |
21962 | |
21963 | // STCC |
21964 | OPCODE(0x58F8) |
21965 | { |
21966 | u32 adr, res; |
21967 | u32 src, dst; |
21968 | |
21969 | FETCH_SWORD(adr); |
21970 | if (!(flag_V & 0x80)) |
21971 | { |
21972 | res = 0xFF; |
21973 | PRE_IO |
21974 | WRITE_BYTE_F(adr, res) |
21975 | POST_IO |
21976 | RET(16) |
21977 | } |
21978 | res = 0; |
21979 | PRE_IO |
21980 | WRITE_BYTE_F(adr, res) |
21981 | POST_IO |
21982 | RET(16) |
21983 | } |
21984 | |
21985 | // STCC |
21986 | OPCODE(0x59F8) |
21987 | { |
21988 | u32 adr, res; |
21989 | u32 src, dst; |
21990 | |
21991 | FETCH_SWORD(adr); |
21992 | if (flag_V & 0x80) |
21993 | { |
21994 | res = 0xFF; |
21995 | PRE_IO |
21996 | WRITE_BYTE_F(adr, res) |
21997 | POST_IO |
21998 | RET(16) |
21999 | } |
22000 | res = 0; |
22001 | PRE_IO |
22002 | WRITE_BYTE_F(adr, res) |
22003 | POST_IO |
22004 | RET(16) |
22005 | } |
22006 | |
22007 | // STCC |
22008 | OPCODE(0x5AF8) |
22009 | { |
22010 | u32 adr, res; |
22011 | u32 src, dst; |
22012 | |
22013 | FETCH_SWORD(adr); |
22014 | if (!(flag_N & 0x80)) |
22015 | { |
22016 | res = 0xFF; |
22017 | PRE_IO |
22018 | WRITE_BYTE_F(adr, res) |
22019 | POST_IO |
22020 | RET(16) |
22021 | } |
22022 | res = 0; |
22023 | PRE_IO |
22024 | WRITE_BYTE_F(adr, res) |
22025 | POST_IO |
22026 | RET(16) |
22027 | } |
22028 | |
22029 | // STCC |
22030 | OPCODE(0x5BF8) |
22031 | { |
22032 | u32 adr, res; |
22033 | u32 src, dst; |
22034 | |
22035 | FETCH_SWORD(adr); |
22036 | if (flag_N & 0x80) |
22037 | { |
22038 | res = 0xFF; |
22039 | PRE_IO |
22040 | WRITE_BYTE_F(adr, res) |
22041 | POST_IO |
22042 | RET(16) |
22043 | } |
22044 | res = 0; |
22045 | PRE_IO |
22046 | WRITE_BYTE_F(adr, res) |
22047 | POST_IO |
22048 | RET(16) |
22049 | } |
22050 | |
22051 | // STCC |
22052 | OPCODE(0x5CF8) |
22053 | { |
22054 | u32 adr, res; |
22055 | u32 src, dst; |
22056 | |
22057 | FETCH_SWORD(adr); |
22058 | if (!((flag_N ^ flag_V) & 0x80)) |
22059 | { |
22060 | res = 0xFF; |
22061 | PRE_IO |
22062 | WRITE_BYTE_F(adr, res) |
22063 | POST_IO |
22064 | RET(16) |
22065 | } |
22066 | res = 0; |
22067 | PRE_IO |
22068 | WRITE_BYTE_F(adr, res) |
22069 | POST_IO |
22070 | RET(16) |
22071 | } |
22072 | |
22073 | // STCC |
22074 | OPCODE(0x5DF8) |
22075 | { |
22076 | u32 adr, res; |
22077 | u32 src, dst; |
22078 | |
22079 | FETCH_SWORD(adr); |
22080 | if ((flag_N ^ flag_V) & 0x80) |
22081 | { |
22082 | res = 0xFF; |
22083 | PRE_IO |
22084 | WRITE_BYTE_F(adr, res) |
22085 | POST_IO |
22086 | RET(16) |
22087 | } |
22088 | res = 0; |
22089 | PRE_IO |
22090 | WRITE_BYTE_F(adr, res) |
22091 | POST_IO |
22092 | RET(16) |
22093 | } |
22094 | |
22095 | // STCC |
22096 | OPCODE(0x5EF8) |
22097 | { |
22098 | u32 adr, res; |
22099 | u32 src, dst; |
22100 | |
22101 | FETCH_SWORD(adr); |
22102 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22103 | { |
22104 | res = 0xFF; |
22105 | PRE_IO |
22106 | WRITE_BYTE_F(adr, res) |
22107 | POST_IO |
22108 | RET(16) |
22109 | } |
22110 | res = 0; |
22111 | PRE_IO |
22112 | WRITE_BYTE_F(adr, res) |
22113 | POST_IO |
22114 | RET(16) |
22115 | } |
22116 | |
22117 | // STCC |
22118 | OPCODE(0x5FF8) |
22119 | { |
22120 | u32 adr, res; |
22121 | u32 src, dst; |
22122 | |
22123 | FETCH_SWORD(adr); |
22124 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22125 | { |
22126 | res = 0xFF; |
22127 | PRE_IO |
22128 | WRITE_BYTE_F(adr, res) |
22129 | POST_IO |
22130 | RET(16) |
22131 | } |
22132 | res = 0; |
22133 | PRE_IO |
22134 | WRITE_BYTE_F(adr, res) |
22135 | POST_IO |
22136 | RET(16) |
22137 | } |
22138 | |
22139 | // STCC |
22140 | OPCODE(0x50F9) |
22141 | { |
22142 | u32 adr, res; |
22143 | u32 src, dst; |
22144 | |
22145 | FETCH_LONG(adr); |
22146 | res = 0xFF; |
22147 | PRE_IO |
22148 | WRITE_BYTE_F(adr, res) |
22149 | POST_IO |
22150 | RET(20) |
22151 | } |
22152 | |
22153 | // STCC |
22154 | OPCODE(0x51F9) |
22155 | { |
22156 | u32 adr, res; |
22157 | u32 src, dst; |
22158 | |
22159 | FETCH_LONG(adr); |
22160 | res = 0; |
22161 | PRE_IO |
22162 | WRITE_BYTE_F(adr, res) |
22163 | POST_IO |
22164 | RET(20) |
22165 | } |
22166 | |
22167 | // STCC |
22168 | OPCODE(0x52F9) |
22169 | { |
22170 | u32 adr, res; |
22171 | u32 src, dst; |
22172 | |
22173 | FETCH_LONG(adr); |
22174 | if (flag_NotZ && (!(flag_C & 0x100))) |
22175 | { |
22176 | res = 0xFF; |
22177 | PRE_IO |
22178 | WRITE_BYTE_F(adr, res) |
22179 | POST_IO |
22180 | RET(20) |
22181 | } |
22182 | res = 0; |
22183 | PRE_IO |
22184 | WRITE_BYTE_F(adr, res) |
22185 | POST_IO |
22186 | RET(20) |
22187 | } |
22188 | |
22189 | // STCC |
22190 | OPCODE(0x53F9) |
22191 | { |
22192 | u32 adr, res; |
22193 | u32 src, dst; |
22194 | |
22195 | FETCH_LONG(adr); |
22196 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22197 | { |
22198 | res = 0xFF; |
22199 | PRE_IO |
22200 | WRITE_BYTE_F(adr, res) |
22201 | POST_IO |
22202 | RET(20) |
22203 | } |
22204 | res = 0; |
22205 | PRE_IO |
22206 | WRITE_BYTE_F(adr, res) |
22207 | POST_IO |
22208 | RET(20) |
22209 | } |
22210 | |
22211 | // STCC |
22212 | OPCODE(0x54F9) |
22213 | { |
22214 | u32 adr, res; |
22215 | u32 src, dst; |
22216 | |
22217 | FETCH_LONG(adr); |
22218 | if (!(flag_C & 0x100)) |
22219 | { |
22220 | res = 0xFF; |
22221 | PRE_IO |
22222 | WRITE_BYTE_F(adr, res) |
22223 | POST_IO |
22224 | RET(20) |
22225 | } |
22226 | res = 0; |
22227 | PRE_IO |
22228 | WRITE_BYTE_F(adr, res) |
22229 | POST_IO |
22230 | RET(20) |
22231 | } |
22232 | |
22233 | // STCC |
22234 | OPCODE(0x55F9) |
22235 | { |
22236 | u32 adr, res; |
22237 | u32 src, dst; |
22238 | |
22239 | FETCH_LONG(adr); |
22240 | if (flag_C & 0x100) |
22241 | { |
22242 | res = 0xFF; |
22243 | PRE_IO |
22244 | WRITE_BYTE_F(adr, res) |
22245 | POST_IO |
22246 | RET(20) |
22247 | } |
22248 | res = 0; |
22249 | PRE_IO |
22250 | WRITE_BYTE_F(adr, res) |
22251 | POST_IO |
22252 | RET(20) |
22253 | } |
22254 | |
22255 | // STCC |
22256 | OPCODE(0x56F9) |
22257 | { |
22258 | u32 adr, res; |
22259 | u32 src, dst; |
22260 | |
22261 | FETCH_LONG(adr); |
22262 | if (flag_NotZ) |
22263 | { |
22264 | res = 0xFF; |
22265 | PRE_IO |
22266 | WRITE_BYTE_F(adr, res) |
22267 | POST_IO |
22268 | RET(20) |
22269 | } |
22270 | res = 0; |
22271 | PRE_IO |
22272 | WRITE_BYTE_F(adr, res) |
22273 | POST_IO |
22274 | RET(20) |
22275 | } |
22276 | |
22277 | // STCC |
22278 | OPCODE(0x57F9) |
22279 | { |
22280 | u32 adr, res; |
22281 | u32 src, dst; |
22282 | |
22283 | FETCH_LONG(adr); |
22284 | if (!flag_NotZ) |
22285 | { |
22286 | res = 0xFF; |
22287 | PRE_IO |
22288 | WRITE_BYTE_F(adr, res) |
22289 | POST_IO |
22290 | RET(20) |
22291 | } |
22292 | res = 0; |
22293 | PRE_IO |
22294 | WRITE_BYTE_F(adr, res) |
22295 | POST_IO |
22296 | RET(20) |
22297 | } |
22298 | |
22299 | // STCC |
22300 | OPCODE(0x58F9) |
22301 | { |
22302 | u32 adr, res; |
22303 | u32 src, dst; |
22304 | |
22305 | FETCH_LONG(adr); |
22306 | if (!(flag_V & 0x80)) |
22307 | { |
22308 | res = 0xFF; |
22309 | PRE_IO |
22310 | WRITE_BYTE_F(adr, res) |
22311 | POST_IO |
22312 | RET(20) |
22313 | } |
22314 | res = 0; |
22315 | PRE_IO |
22316 | WRITE_BYTE_F(adr, res) |
22317 | POST_IO |
22318 | RET(20) |
22319 | } |
22320 | |
22321 | // STCC |
22322 | OPCODE(0x59F9) |
22323 | { |
22324 | u32 adr, res; |
22325 | u32 src, dst; |
22326 | |
22327 | FETCH_LONG(adr); |
22328 | if (flag_V & 0x80) |
22329 | { |
22330 | res = 0xFF; |
22331 | PRE_IO |
22332 | WRITE_BYTE_F(adr, res) |
22333 | POST_IO |
22334 | RET(20) |
22335 | } |
22336 | res = 0; |
22337 | PRE_IO |
22338 | WRITE_BYTE_F(adr, res) |
22339 | POST_IO |
22340 | RET(20) |
22341 | } |
22342 | |
22343 | // STCC |
22344 | OPCODE(0x5AF9) |
22345 | { |
22346 | u32 adr, res; |
22347 | u32 src, dst; |
22348 | |
22349 | FETCH_LONG(adr); |
22350 | if (!(flag_N & 0x80)) |
22351 | { |
22352 | res = 0xFF; |
22353 | PRE_IO |
22354 | WRITE_BYTE_F(adr, res) |
22355 | POST_IO |
22356 | RET(20) |
22357 | } |
22358 | res = 0; |
22359 | PRE_IO |
22360 | WRITE_BYTE_F(adr, res) |
22361 | POST_IO |
22362 | RET(20) |
22363 | } |
22364 | |
22365 | // STCC |
22366 | OPCODE(0x5BF9) |
22367 | { |
22368 | u32 adr, res; |
22369 | u32 src, dst; |
22370 | |
22371 | FETCH_LONG(adr); |
22372 | if (flag_N & 0x80) |
22373 | { |
22374 | res = 0xFF; |
22375 | PRE_IO |
22376 | WRITE_BYTE_F(adr, res) |
22377 | POST_IO |
22378 | RET(20) |
22379 | } |
22380 | res = 0; |
22381 | PRE_IO |
22382 | WRITE_BYTE_F(adr, res) |
22383 | POST_IO |
22384 | RET(20) |
22385 | } |
22386 | |
22387 | // STCC |
22388 | OPCODE(0x5CF9) |
22389 | { |
22390 | u32 adr, res; |
22391 | u32 src, dst; |
22392 | |
22393 | FETCH_LONG(adr); |
22394 | if (!((flag_N ^ flag_V) & 0x80)) |
22395 | { |
22396 | res = 0xFF; |
22397 | PRE_IO |
22398 | WRITE_BYTE_F(adr, res) |
22399 | POST_IO |
22400 | RET(20) |
22401 | } |
22402 | res = 0; |
22403 | PRE_IO |
22404 | WRITE_BYTE_F(adr, res) |
22405 | POST_IO |
22406 | RET(20) |
22407 | } |
22408 | |
22409 | // STCC |
22410 | OPCODE(0x5DF9) |
22411 | { |
22412 | u32 adr, res; |
22413 | u32 src, dst; |
22414 | |
22415 | FETCH_LONG(adr); |
22416 | if ((flag_N ^ flag_V) & 0x80) |
22417 | { |
22418 | res = 0xFF; |
22419 | PRE_IO |
22420 | WRITE_BYTE_F(adr, res) |
22421 | POST_IO |
22422 | RET(20) |
22423 | } |
22424 | res = 0; |
22425 | PRE_IO |
22426 | WRITE_BYTE_F(adr, res) |
22427 | POST_IO |
22428 | RET(20) |
22429 | } |
22430 | |
22431 | // STCC |
22432 | OPCODE(0x5EF9) |
22433 | { |
22434 | u32 adr, res; |
22435 | u32 src, dst; |
22436 | |
22437 | FETCH_LONG(adr); |
22438 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22439 | { |
22440 | res = 0xFF; |
22441 | PRE_IO |
22442 | WRITE_BYTE_F(adr, res) |
22443 | POST_IO |
22444 | RET(20) |
22445 | } |
22446 | res = 0; |
22447 | PRE_IO |
22448 | WRITE_BYTE_F(adr, res) |
22449 | POST_IO |
22450 | RET(20) |
22451 | } |
22452 | |
22453 | // STCC |
22454 | OPCODE(0x5FF9) |
22455 | { |
22456 | u32 adr, res; |
22457 | u32 src, dst; |
22458 | |
22459 | FETCH_LONG(adr); |
22460 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22461 | { |
22462 | res = 0xFF; |
22463 | PRE_IO |
22464 | WRITE_BYTE_F(adr, res) |
22465 | POST_IO |
22466 | RET(20) |
22467 | } |
22468 | res = 0; |
22469 | PRE_IO |
22470 | WRITE_BYTE_F(adr, res) |
22471 | POST_IO |
22472 | RET(20) |
22473 | } |
22474 | |
22475 | // STCC |
22476 | OPCODE(0x50DF) |
22477 | { |
22478 | u32 adr, res; |
22479 | u32 src, dst; |
22480 | |
22481 | adr = AREG(7); |
22482 | AREG(7) += 2; |
22483 | res = 0xFF; |
22484 | PRE_IO |
22485 | WRITE_BYTE_F(adr, res) |
22486 | POST_IO |
22487 | RET(12) |
22488 | } |
22489 | |
22490 | // STCC |
22491 | OPCODE(0x51DF) |
22492 | { |
22493 | u32 adr, res; |
22494 | u32 src, dst; |
22495 | |
22496 | adr = AREG(7); |
22497 | AREG(7) += 2; |
22498 | res = 0; |
22499 | PRE_IO |
22500 | WRITE_BYTE_F(adr, res) |
22501 | POST_IO |
22502 | RET(12) |
22503 | } |
22504 | |
22505 | // STCC |
22506 | OPCODE(0x52DF) |
22507 | { |
22508 | u32 adr, res; |
22509 | u32 src, dst; |
22510 | |
22511 | adr = AREG(7); |
22512 | AREG(7) += 2; |
22513 | if (flag_NotZ && (!(flag_C & 0x100))) |
22514 | { |
22515 | res = 0xFF; |
22516 | PRE_IO |
22517 | WRITE_BYTE_F(adr, res) |
22518 | POST_IO |
22519 | RET(12) |
22520 | } |
22521 | res = 0; |
22522 | PRE_IO |
22523 | WRITE_BYTE_F(adr, res) |
22524 | POST_IO |
22525 | RET(12) |
22526 | } |
22527 | |
22528 | // STCC |
22529 | OPCODE(0x53DF) |
22530 | { |
22531 | u32 adr, res; |
22532 | u32 src, dst; |
22533 | |
22534 | adr = AREG(7); |
22535 | AREG(7) += 2; |
22536 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22537 | { |
22538 | res = 0xFF; |
22539 | PRE_IO |
22540 | WRITE_BYTE_F(adr, res) |
22541 | POST_IO |
22542 | RET(12) |
22543 | } |
22544 | res = 0; |
22545 | PRE_IO |
22546 | WRITE_BYTE_F(adr, res) |
22547 | POST_IO |
22548 | RET(12) |
22549 | } |
22550 | |
22551 | // STCC |
22552 | OPCODE(0x54DF) |
22553 | { |
22554 | u32 adr, res; |
22555 | u32 src, dst; |
22556 | |
22557 | adr = AREG(7); |
22558 | AREG(7) += 2; |
22559 | if (!(flag_C & 0x100)) |
22560 | { |
22561 | res = 0xFF; |
22562 | PRE_IO |
22563 | WRITE_BYTE_F(adr, res) |
22564 | POST_IO |
22565 | RET(12) |
22566 | } |
22567 | res = 0; |
22568 | PRE_IO |
22569 | WRITE_BYTE_F(adr, res) |
22570 | POST_IO |
22571 | RET(12) |
22572 | } |
22573 | |
22574 | // STCC |
22575 | OPCODE(0x55DF) |
22576 | { |
22577 | u32 adr, res; |
22578 | u32 src, dst; |
22579 | |
22580 | adr = AREG(7); |
22581 | AREG(7) += 2; |
22582 | if (flag_C & 0x100) |
22583 | { |
22584 | res = 0xFF; |
22585 | PRE_IO |
22586 | WRITE_BYTE_F(adr, res) |
22587 | POST_IO |
22588 | RET(12) |
22589 | } |
22590 | res = 0; |
22591 | PRE_IO |
22592 | WRITE_BYTE_F(adr, res) |
22593 | POST_IO |
22594 | RET(12) |
22595 | } |
22596 | |
22597 | // STCC |
22598 | OPCODE(0x56DF) |
22599 | { |
22600 | u32 adr, res; |
22601 | u32 src, dst; |
22602 | |
22603 | adr = AREG(7); |
22604 | AREG(7) += 2; |
22605 | if (flag_NotZ) |
22606 | { |
22607 | res = 0xFF; |
22608 | PRE_IO |
22609 | WRITE_BYTE_F(adr, res) |
22610 | POST_IO |
22611 | RET(12) |
22612 | } |
22613 | res = 0; |
22614 | PRE_IO |
22615 | WRITE_BYTE_F(adr, res) |
22616 | POST_IO |
22617 | RET(12) |
22618 | } |
22619 | |
22620 | // STCC |
22621 | OPCODE(0x57DF) |
22622 | { |
22623 | u32 adr, res; |
22624 | u32 src, dst; |
22625 | |
22626 | adr = AREG(7); |
22627 | AREG(7) += 2; |
22628 | if (!flag_NotZ) |
22629 | { |
22630 | res = 0xFF; |
22631 | PRE_IO |
22632 | WRITE_BYTE_F(adr, res) |
22633 | POST_IO |
22634 | RET(12) |
22635 | } |
22636 | res = 0; |
22637 | PRE_IO |
22638 | WRITE_BYTE_F(adr, res) |
22639 | POST_IO |
22640 | RET(12) |
22641 | } |
22642 | |
22643 | // STCC |
22644 | OPCODE(0x58DF) |
22645 | { |
22646 | u32 adr, res; |
22647 | u32 src, dst; |
22648 | |
22649 | adr = AREG(7); |
22650 | AREG(7) += 2; |
22651 | if (!(flag_V & 0x80)) |
22652 | { |
22653 | res = 0xFF; |
22654 | PRE_IO |
22655 | WRITE_BYTE_F(adr, res) |
22656 | POST_IO |
22657 | RET(12) |
22658 | } |
22659 | res = 0; |
22660 | PRE_IO |
22661 | WRITE_BYTE_F(adr, res) |
22662 | POST_IO |
22663 | RET(12) |
22664 | } |
22665 | |
22666 | // STCC |
22667 | OPCODE(0x59DF) |
22668 | { |
22669 | u32 adr, res; |
22670 | u32 src, dst; |
22671 | |
22672 | adr = AREG(7); |
22673 | AREG(7) += 2; |
22674 | if (flag_V & 0x80) |
22675 | { |
22676 | res = 0xFF; |
22677 | PRE_IO |
22678 | WRITE_BYTE_F(adr, res) |
22679 | POST_IO |
22680 | RET(12) |
22681 | } |
22682 | res = 0; |
22683 | PRE_IO |
22684 | WRITE_BYTE_F(adr, res) |
22685 | POST_IO |
22686 | RET(12) |
22687 | } |
22688 | |
22689 | // STCC |
22690 | OPCODE(0x5ADF) |
22691 | { |
22692 | u32 adr, res; |
22693 | u32 src, dst; |
22694 | |
22695 | adr = AREG(7); |
22696 | AREG(7) += 2; |
22697 | if (!(flag_N & 0x80)) |
22698 | { |
22699 | res = 0xFF; |
22700 | PRE_IO |
22701 | WRITE_BYTE_F(adr, res) |
22702 | POST_IO |
22703 | RET(12) |
22704 | } |
22705 | res = 0; |
22706 | PRE_IO |
22707 | WRITE_BYTE_F(adr, res) |
22708 | POST_IO |
22709 | RET(12) |
22710 | } |
22711 | |
22712 | // STCC |
22713 | OPCODE(0x5BDF) |
22714 | { |
22715 | u32 adr, res; |
22716 | u32 src, dst; |
22717 | |
22718 | adr = AREG(7); |
22719 | AREG(7) += 2; |
22720 | if (flag_N & 0x80) |
22721 | { |
22722 | res = 0xFF; |
22723 | PRE_IO |
22724 | WRITE_BYTE_F(adr, res) |
22725 | POST_IO |
22726 | RET(12) |
22727 | } |
22728 | res = 0; |
22729 | PRE_IO |
22730 | WRITE_BYTE_F(adr, res) |
22731 | POST_IO |
22732 | RET(12) |
22733 | } |
22734 | |
22735 | // STCC |
22736 | OPCODE(0x5CDF) |
22737 | { |
22738 | u32 adr, res; |
22739 | u32 src, dst; |
22740 | |
22741 | adr = AREG(7); |
22742 | AREG(7) += 2; |
22743 | if (!((flag_N ^ flag_V) & 0x80)) |
22744 | { |
22745 | res = 0xFF; |
22746 | PRE_IO |
22747 | WRITE_BYTE_F(adr, res) |
22748 | POST_IO |
22749 | RET(12) |
22750 | } |
22751 | res = 0; |
22752 | PRE_IO |
22753 | WRITE_BYTE_F(adr, res) |
22754 | POST_IO |
22755 | RET(12) |
22756 | } |
22757 | |
22758 | // STCC |
22759 | OPCODE(0x5DDF) |
22760 | { |
22761 | u32 adr, res; |
22762 | u32 src, dst; |
22763 | |
22764 | adr = AREG(7); |
22765 | AREG(7) += 2; |
22766 | if ((flag_N ^ flag_V) & 0x80) |
22767 | { |
22768 | res = 0xFF; |
22769 | PRE_IO |
22770 | WRITE_BYTE_F(adr, res) |
22771 | POST_IO |
22772 | RET(12) |
22773 | } |
22774 | res = 0; |
22775 | PRE_IO |
22776 | WRITE_BYTE_F(adr, res) |
22777 | POST_IO |
22778 | RET(12) |
22779 | } |
22780 | |
22781 | // STCC |
22782 | OPCODE(0x5EDF) |
22783 | { |
22784 | u32 adr, res; |
22785 | u32 src, dst; |
22786 | |
22787 | adr = AREG(7); |
22788 | AREG(7) += 2; |
22789 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22790 | { |
22791 | res = 0xFF; |
22792 | PRE_IO |
22793 | WRITE_BYTE_F(adr, res) |
22794 | POST_IO |
22795 | RET(12) |
22796 | } |
22797 | res = 0; |
22798 | PRE_IO |
22799 | WRITE_BYTE_F(adr, res) |
22800 | POST_IO |
22801 | RET(12) |
22802 | } |
22803 | |
22804 | // STCC |
22805 | OPCODE(0x5FDF) |
22806 | { |
22807 | u32 adr, res; |
22808 | u32 src, dst; |
22809 | |
22810 | adr = AREG(7); |
22811 | AREG(7) += 2; |
22812 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22813 | { |
22814 | res = 0xFF; |
22815 | PRE_IO |
22816 | WRITE_BYTE_F(adr, res) |
22817 | POST_IO |
22818 | RET(12) |
22819 | } |
22820 | res = 0; |
22821 | PRE_IO |
22822 | WRITE_BYTE_F(adr, res) |
22823 | POST_IO |
22824 | RET(12) |
22825 | } |
22826 | |
22827 | // STCC |
22828 | OPCODE(0x50E7) |
22829 | { |
22830 | u32 adr, res; |
22831 | u32 src, dst; |
22832 | |
22833 | adr = AREG(7) - 2; |
22834 | AREG(7) = adr; |
22835 | res = 0xFF; |
22836 | PRE_IO |
22837 | WRITE_BYTE_F(adr, res) |
22838 | POST_IO |
22839 | RET(14) |
22840 | } |
22841 | |
22842 | // STCC |
22843 | OPCODE(0x51E7) |
22844 | { |
22845 | u32 adr, res; |
22846 | u32 src, dst; |
22847 | |
22848 | adr = AREG(7) - 2; |
22849 | AREG(7) = adr; |
22850 | res = 0; |
22851 | PRE_IO |
22852 | WRITE_BYTE_F(adr, res) |
22853 | POST_IO |
22854 | RET(14) |
22855 | } |
22856 | |
22857 | // STCC |
22858 | OPCODE(0x52E7) |
22859 | { |
22860 | u32 adr, res; |
22861 | u32 src, dst; |
22862 | |
22863 | adr = AREG(7) - 2; |
22864 | AREG(7) = adr; |
22865 | if (flag_NotZ && (!(flag_C & 0x100))) |
22866 | { |
22867 | res = 0xFF; |
22868 | PRE_IO |
22869 | WRITE_BYTE_F(adr, res) |
22870 | POST_IO |
22871 | RET(14) |
22872 | } |
22873 | res = 0; |
22874 | PRE_IO |
22875 | WRITE_BYTE_F(adr, res) |
22876 | POST_IO |
22877 | RET(14) |
22878 | } |
22879 | |
22880 | // STCC |
22881 | OPCODE(0x53E7) |
22882 | { |
22883 | u32 adr, res; |
22884 | u32 src, dst; |
22885 | |
22886 | adr = AREG(7) - 2; |
22887 | AREG(7) = adr; |
22888 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22889 | { |
22890 | res = 0xFF; |
22891 | PRE_IO |
22892 | WRITE_BYTE_F(adr, res) |
22893 | POST_IO |
22894 | RET(14) |
22895 | } |
22896 | res = 0; |
22897 | PRE_IO |
22898 | WRITE_BYTE_F(adr, res) |
22899 | POST_IO |
22900 | RET(14) |
22901 | } |
22902 | |
22903 | // STCC |
22904 | OPCODE(0x54E7) |
22905 | { |
22906 | u32 adr, res; |
22907 | u32 src, dst; |
22908 | |
22909 | adr = AREG(7) - 2; |
22910 | AREG(7) = adr; |
22911 | if (!(flag_C & 0x100)) |
22912 | { |
22913 | res = 0xFF; |
22914 | PRE_IO |
22915 | WRITE_BYTE_F(adr, res) |
22916 | POST_IO |
22917 | RET(14) |
22918 | } |
22919 | res = 0; |
22920 | PRE_IO |
22921 | WRITE_BYTE_F(adr, res) |
22922 | POST_IO |
22923 | RET(14) |
22924 | } |
22925 | |
22926 | // STCC |
22927 | OPCODE(0x55E7) |
22928 | { |
22929 | u32 adr, res; |
22930 | u32 src, dst; |
22931 | |
22932 | adr = AREG(7) - 2; |
22933 | AREG(7) = adr; |
22934 | if (flag_C & 0x100) |
22935 | { |
22936 | res = 0xFF; |
22937 | PRE_IO |
22938 | WRITE_BYTE_F(adr, res) |
22939 | POST_IO |
22940 | RET(14) |
22941 | } |
22942 | res = 0; |
22943 | PRE_IO |
22944 | WRITE_BYTE_F(adr, res) |
22945 | POST_IO |
22946 | RET(14) |
22947 | } |
22948 | |
22949 | // STCC |
22950 | OPCODE(0x56E7) |
22951 | { |
22952 | u32 adr, res; |
22953 | u32 src, dst; |
22954 | |
22955 | adr = AREG(7) - 2; |
22956 | AREG(7) = adr; |
22957 | if (flag_NotZ) |
22958 | { |
22959 | res = 0xFF; |
22960 | PRE_IO |
22961 | WRITE_BYTE_F(adr, res) |
22962 | POST_IO |
22963 | RET(14) |
22964 | } |
22965 | res = 0; |
22966 | PRE_IO |
22967 | WRITE_BYTE_F(adr, res) |
22968 | POST_IO |
22969 | RET(14) |
22970 | } |
22971 | |
22972 | // STCC |
22973 | OPCODE(0x57E7) |
22974 | { |
22975 | u32 adr, res; |
22976 | u32 src, dst; |
22977 | |
22978 | adr = AREG(7) - 2; |
22979 | AREG(7) = adr; |
22980 | if (!flag_NotZ) |
22981 | { |
22982 | res = 0xFF; |
22983 | PRE_IO |
22984 | WRITE_BYTE_F(adr, res) |
22985 | POST_IO |
22986 | RET(14) |
22987 | } |
22988 | res = 0; |
22989 | PRE_IO |
22990 | WRITE_BYTE_F(adr, res) |
22991 | POST_IO |
22992 | RET(14) |
22993 | } |
22994 | |
22995 | // STCC |
22996 | OPCODE(0x58E7) |
22997 | { |
22998 | u32 adr, res; |
22999 | u32 src, dst; |
23000 | |
23001 | adr = AREG(7) - 2; |
23002 | AREG(7) = adr; |
23003 | if (!(flag_V & 0x80)) |
23004 | { |
23005 | res = 0xFF; |
23006 | PRE_IO |
23007 | WRITE_BYTE_F(adr, res) |
23008 | POST_IO |
23009 | RET(14) |
23010 | } |
23011 | res = 0; |
23012 | PRE_IO |
23013 | WRITE_BYTE_F(adr, res) |
23014 | POST_IO |
23015 | RET(14) |
23016 | } |
23017 | |
23018 | // STCC |
23019 | OPCODE(0x59E7) |
23020 | { |
23021 | u32 adr, res; |
23022 | u32 src, dst; |
23023 | |
23024 | adr = AREG(7) - 2; |
23025 | AREG(7) = adr; |
23026 | if (flag_V & 0x80) |
23027 | { |
23028 | res = 0xFF; |
23029 | PRE_IO |
23030 | WRITE_BYTE_F(adr, res) |
23031 | POST_IO |
23032 | RET(14) |
23033 | } |
23034 | res = 0; |
23035 | PRE_IO |
23036 | WRITE_BYTE_F(adr, res) |
23037 | POST_IO |
23038 | RET(14) |
23039 | } |
23040 | |
23041 | // STCC |
23042 | OPCODE(0x5AE7) |
23043 | { |
23044 | u32 adr, res; |
23045 | u32 src, dst; |
23046 | |
23047 | adr = AREG(7) - 2; |
23048 | AREG(7) = adr; |
23049 | if (!(flag_N & 0x80)) |
23050 | { |
23051 | res = 0xFF; |
23052 | PRE_IO |
23053 | WRITE_BYTE_F(adr, res) |
23054 | POST_IO |
23055 | RET(14) |
23056 | } |
23057 | res = 0; |
23058 | PRE_IO |
23059 | WRITE_BYTE_F(adr, res) |
23060 | POST_IO |
23061 | RET(14) |
23062 | } |
23063 | |
23064 | // STCC |
23065 | OPCODE(0x5BE7) |
23066 | { |
23067 | u32 adr, res; |
23068 | u32 src, dst; |
23069 | |
23070 | adr = AREG(7) - 2; |
23071 | AREG(7) = adr; |
23072 | if (flag_N & 0x80) |
23073 | { |
23074 | res = 0xFF; |
23075 | PRE_IO |
23076 | WRITE_BYTE_F(adr, res) |
23077 | POST_IO |
23078 | RET(14) |
23079 | } |
23080 | res = 0; |
23081 | PRE_IO |
23082 | WRITE_BYTE_F(adr, res) |
23083 | POST_IO |
23084 | RET(14) |
23085 | } |
23086 | |
23087 | // STCC |
23088 | OPCODE(0x5CE7) |
23089 | { |
23090 | u32 adr, res; |
23091 | u32 src, dst; |
23092 | |
23093 | adr = AREG(7) - 2; |
23094 | AREG(7) = adr; |
23095 | if (!((flag_N ^ flag_V) & 0x80)) |
23096 | { |
23097 | res = 0xFF; |
23098 | PRE_IO |
23099 | WRITE_BYTE_F(adr, res) |
23100 | POST_IO |
23101 | RET(14) |
23102 | } |
23103 | res = 0; |
23104 | PRE_IO |
23105 | WRITE_BYTE_F(adr, res) |
23106 | POST_IO |
23107 | RET(14) |
23108 | } |
23109 | |
23110 | // STCC |
23111 | OPCODE(0x5DE7) |
23112 | { |
23113 | u32 adr, res; |
23114 | u32 src, dst; |
23115 | |
23116 | adr = AREG(7) - 2; |
23117 | AREG(7) = adr; |
23118 | if ((flag_N ^ flag_V) & 0x80) |
23119 | { |
23120 | res = 0xFF; |
23121 | PRE_IO |
23122 | WRITE_BYTE_F(adr, res) |
23123 | POST_IO |
23124 | RET(14) |
23125 | } |
23126 | res = 0; |
23127 | PRE_IO |
23128 | WRITE_BYTE_F(adr, res) |
23129 | POST_IO |
23130 | RET(14) |
23131 | } |
23132 | |
23133 | // STCC |
23134 | OPCODE(0x5EE7) |
23135 | { |
23136 | u32 adr, res; |
23137 | u32 src, dst; |
23138 | |
23139 | adr = AREG(7) - 2; |
23140 | AREG(7) = adr; |
23141 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23142 | { |
23143 | res = 0xFF; |
23144 | PRE_IO |
23145 | WRITE_BYTE_F(adr, res) |
23146 | POST_IO |
23147 | RET(14) |
23148 | } |
23149 | res = 0; |
23150 | PRE_IO |
23151 | WRITE_BYTE_F(adr, res) |
23152 | POST_IO |
23153 | RET(14) |
23154 | } |
23155 | |
23156 | // STCC |
23157 | OPCODE(0x5FE7) |
23158 | { |
23159 | u32 adr, res; |
23160 | u32 src, dst; |
23161 | |
23162 | adr = AREG(7) - 2; |
23163 | AREG(7) = adr; |
23164 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23165 | { |
23166 | res = 0xFF; |
23167 | PRE_IO |
23168 | WRITE_BYTE_F(adr, res) |
23169 | POST_IO |
23170 | RET(14) |
23171 | } |
23172 | res = 0; |
23173 | PRE_IO |
23174 | WRITE_BYTE_F(adr, res) |
23175 | POST_IO |
23176 | RET(14) |
23177 | } |
23178 | |
23179 | // DBCC |
23180 | OPCODE(0x50C8) |
23181 | { |
23182 | u32 adr, res; |
23183 | u32 src, dst; |
23184 | |
23185 | PC++; |
23186 | RET(12) |
23187 | } |
23188 | |
23189 | // DBCC |
23190 | OPCODE(0x51C8) |
23191 | { |
23192 | u32 adr, res; |
23193 | u32 src, dst; |
23194 | |
23195 | res = DREGu16((Opcode >> 0) & 7); |
23196 | res--; |
23197 | DREGu16((Opcode >> 0) & 7) = res; |
23198 | if ((s32)res != -1) |
23199 | { |
23200 | u32 newPC; |
23201 | |
23202 | newPC = (u32)(PC) - BasePC; |
23203 | newPC += GET_SWORD; |
23204 | SET_PC(newPC); |
23205 | CHECK_BRANCH_EXCEPTION(newPC) |
23206 | RET(10) |
23207 | } |
23208 | PC++; |
23209 | RET(14) |
23210 | } |
23211 | |
23212 | // DBCC |
23213 | OPCODE(0x52C8) |
23214 | { |
23215 | u32 adr, res; |
23216 | u32 src, dst; |
23217 | |
23218 | if ((!flag_NotZ) || (flag_C & 0x100)) |
23219 | { |
23220 | res = DREGu16((Opcode >> 0) & 7); |
23221 | res--; |
23222 | DREGu16((Opcode >> 0) & 7) = res; |
23223 | if ((s32)res != -1) |
23224 | { |
23225 | u32 newPC; |
23226 | |
23227 | newPC = (u32)(PC) - BasePC; |
23228 | newPC += GET_SWORD; |
23229 | SET_PC(newPC); |
23230 | CHECK_BRANCH_EXCEPTION(newPC) |
23231 | RET(10) |
23232 | } |
23233 | } |
23234 | else |
23235 | { |
23236 | PC++; |
23237 | RET(12) |
23238 | } |
23239 | PC++; |
23240 | RET(14) |
23241 | } |
23242 | |
23243 | // DBCC |
23244 | OPCODE(0x53C8) |
23245 | { |
23246 | u32 adr, res; |
23247 | u32 src, dst; |
23248 | |
23249 | if (flag_NotZ && (!(flag_C & 0x100))) |
23250 | { |
23251 | res = DREGu16((Opcode >> 0) & 7); |
23252 | res--; |
23253 | DREGu16((Opcode >> 0) & 7) = res; |
23254 | if ((s32)res != -1) |
23255 | { |
23256 | u32 newPC; |
23257 | |
23258 | newPC = (u32)(PC) - BasePC; |
23259 | newPC += GET_SWORD; |
23260 | SET_PC(newPC); |
23261 | CHECK_BRANCH_EXCEPTION(newPC) |
23262 | RET(10) |
23263 | } |
23264 | } |
23265 | else |
23266 | { |
23267 | PC++; |
23268 | RET(12) |
23269 | } |
23270 | PC++; |
23271 | RET(14) |
23272 | } |
23273 | |
23274 | // DBCC |
23275 | OPCODE(0x54C8) |
23276 | { |
23277 | u32 adr, res; |
23278 | u32 src, dst; |
23279 | |
23280 | if (flag_C & 0x100) |
23281 | { |
23282 | res = DREGu16((Opcode >> 0) & 7); |
23283 | res--; |
23284 | DREGu16((Opcode >> 0) & 7) = res; |
23285 | if ((s32)res != -1) |
23286 | { |
23287 | u32 newPC; |
23288 | |
23289 | newPC = (u32)(PC) - BasePC; |
23290 | newPC += GET_SWORD; |
23291 | SET_PC(newPC); |
23292 | CHECK_BRANCH_EXCEPTION(newPC) |
23293 | RET(10) |
23294 | } |
23295 | } |
23296 | else |
23297 | { |
23298 | PC++; |
23299 | RET(12) |
23300 | } |
23301 | PC++; |
23302 | RET(14) |
23303 | } |
23304 | |
23305 | // DBCC |
23306 | OPCODE(0x55C8) |
23307 | { |
23308 | u32 adr, res; |
23309 | u32 src, dst; |
23310 | |
23311 | if (!(flag_C & 0x100)) |
23312 | { |
23313 | res = DREGu16((Opcode >> 0) & 7); |
23314 | res--; |
23315 | DREGu16((Opcode >> 0) & 7) = res; |
23316 | if ((s32)res != -1) |
23317 | { |
23318 | u32 newPC; |
23319 | |
23320 | newPC = (u32)(PC) - BasePC; |
23321 | newPC += GET_SWORD; |
23322 | SET_PC(newPC); |
23323 | CHECK_BRANCH_EXCEPTION(newPC) |
23324 | RET(10) |
23325 | } |
23326 | } |
23327 | else |
23328 | { |
23329 | PC++; |
23330 | RET(12) |
23331 | } |
23332 | PC++; |
23333 | RET(14) |
23334 | } |
23335 | |
23336 | // DBCC |
23337 | OPCODE(0x56C8) |
23338 | { |
23339 | u32 adr, res; |
23340 | u32 src, dst; |
23341 | |
23342 | if (!flag_NotZ) |
23343 | { |
23344 | res = DREGu16((Opcode >> 0) & 7); |
23345 | res--; |
23346 | DREGu16((Opcode >> 0) & 7) = res; |
23347 | if ((s32)res != -1) |
23348 | { |
23349 | u32 newPC; |
23350 | |
23351 | newPC = (u32)(PC) - BasePC; |
23352 | newPC += GET_SWORD; |
23353 | SET_PC(newPC); |
23354 | CHECK_BRANCH_EXCEPTION(newPC) |
23355 | RET(10) |
23356 | } |
23357 | } |
23358 | else |
23359 | { |
23360 | PC++; |
23361 | RET(12) |
23362 | } |
23363 | PC++; |
23364 | RET(14) |
23365 | } |
23366 | |
23367 | // DBCC |
23368 | OPCODE(0x57C8) |
23369 | { |
23370 | u32 adr, res; |
23371 | u32 src, dst; |
23372 | |
23373 | if (flag_NotZ) |
23374 | { |
23375 | res = DREGu16((Opcode >> 0) & 7); |
23376 | res--; |
23377 | DREGu16((Opcode >> 0) & 7) = res; |
23378 | if ((s32)res != -1) |
23379 | { |
23380 | u32 newPC; |
23381 | |
23382 | newPC = (u32)(PC) - BasePC; |
23383 | newPC += GET_SWORD; |
23384 | SET_PC(newPC); |
23385 | CHECK_BRANCH_EXCEPTION(newPC) |
23386 | RET(10) |
23387 | } |
23388 | } |
23389 | else |
23390 | { |
23391 | PC++; |
23392 | RET(12) |
23393 | } |
23394 | PC++; |
23395 | RET(14) |
23396 | } |
23397 | |
23398 | // DBCC |
23399 | OPCODE(0x58C8) |
23400 | { |
23401 | u32 adr, res; |
23402 | u32 src, dst; |
23403 | |
23404 | if (flag_V & 0x80) |
23405 | { |
23406 | res = DREGu16((Opcode >> 0) & 7); |
23407 | res--; |
23408 | DREGu16((Opcode >> 0) & 7) = res; |
23409 | if ((s32)res != -1) |
23410 | { |
23411 | u32 newPC; |
23412 | |
23413 | newPC = (u32)(PC) - BasePC; |
23414 | newPC += GET_SWORD; |
23415 | SET_PC(newPC); |
23416 | CHECK_BRANCH_EXCEPTION(newPC) |
23417 | RET(10) |
23418 | } |
23419 | } |
23420 | else |
23421 | { |
23422 | PC++; |
23423 | RET(12) |
23424 | } |
23425 | PC++; |
23426 | RET(14) |
23427 | } |
23428 | |
23429 | // DBCC |
23430 | OPCODE(0x59C8) |
23431 | { |
23432 | u32 adr, res; |
23433 | u32 src, dst; |
23434 | |
23435 | if (!(flag_V & 0x80)) |
23436 | { |
23437 | res = DREGu16((Opcode >> 0) & 7); |
23438 | res--; |
23439 | DREGu16((Opcode >> 0) & 7) = res; |
23440 | if ((s32)res != -1) |
23441 | { |
23442 | u32 newPC; |
23443 | |
23444 | newPC = (u32)(PC) - BasePC; |
23445 | newPC += GET_SWORD; |
23446 | SET_PC(newPC); |
23447 | CHECK_BRANCH_EXCEPTION(newPC) |
23448 | RET(10) |
23449 | } |
23450 | } |
23451 | else |
23452 | { |
23453 | PC++; |
23454 | RET(12) |
23455 | } |
23456 | PC++; |
23457 | RET(14) |
23458 | } |
23459 | |
23460 | // DBCC |
23461 | OPCODE(0x5AC8) |
23462 | { |
23463 | u32 adr, res; |
23464 | u32 src, dst; |
23465 | |
23466 | if (flag_N & 0x80) |
23467 | { |
23468 | res = DREGu16((Opcode >> 0) & 7); |
23469 | res--; |
23470 | DREGu16((Opcode >> 0) & 7) = res; |
23471 | if ((s32)res != -1) |
23472 | { |
23473 | u32 newPC; |
23474 | |
23475 | newPC = (u32)(PC) - BasePC; |
23476 | newPC += GET_SWORD; |
23477 | SET_PC(newPC); |
23478 | CHECK_BRANCH_EXCEPTION(newPC) |
23479 | RET(10) |
23480 | } |
23481 | } |
23482 | else |
23483 | { |
23484 | PC++; |
23485 | RET(12) |
23486 | } |
23487 | PC++; |
23488 | RET(14) |
23489 | } |
23490 | |
23491 | // DBCC |
23492 | OPCODE(0x5BC8) |
23493 | { |
23494 | u32 adr, res; |
23495 | u32 src, dst; |
23496 | |
23497 | if (!(flag_N & 0x80)) |
23498 | { |
23499 | res = DREGu16((Opcode >> 0) & 7); |
23500 | res--; |
23501 | DREGu16((Opcode >> 0) & 7) = res; |
23502 | if ((s32)res != -1) |
23503 | { |
23504 | u32 newPC; |
23505 | |
23506 | newPC = (u32)(PC) - BasePC; |
23507 | newPC += GET_SWORD; |
23508 | SET_PC(newPC); |
23509 | CHECK_BRANCH_EXCEPTION(newPC) |
23510 | RET(10) |
23511 | } |
23512 | } |
23513 | else |
23514 | { |
23515 | PC++; |
23516 | RET(12) |
23517 | } |
23518 | PC++; |
23519 | RET(14) |
23520 | } |
23521 | |
23522 | // DBCC |
23523 | OPCODE(0x5CC8) |
23524 | { |
23525 | u32 adr, res; |
23526 | u32 src, dst; |
23527 | |
23528 | if ((flag_N ^ flag_V) & 0x80) |
23529 | { |
23530 | res = DREGu16((Opcode >> 0) & 7); |
23531 | res--; |
23532 | DREGu16((Opcode >> 0) & 7) = res; |
23533 | if ((s32)res != -1) |
23534 | { |
23535 | u32 newPC; |
23536 | |
23537 | newPC = (u32)(PC) - BasePC; |
23538 | newPC += GET_SWORD; |
23539 | SET_PC(newPC); |
23540 | CHECK_BRANCH_EXCEPTION(newPC) |
23541 | RET(10) |
23542 | } |
23543 | } |
23544 | else |
23545 | { |
23546 | PC++; |
23547 | RET(12) |
23548 | } |
23549 | PC++; |
23550 | RET(14) |
23551 | } |
23552 | |
23553 | // DBCC |
23554 | OPCODE(0x5DC8) |
23555 | { |
23556 | u32 adr, res; |
23557 | u32 src, dst; |
23558 | |
23559 | if (!((flag_N ^ flag_V) & 0x80)) |
23560 | { |
23561 | res = DREGu16((Opcode >> 0) & 7); |
23562 | res--; |
23563 | DREGu16((Opcode >> 0) & 7) = res; |
23564 | if ((s32)res != -1) |
23565 | { |
23566 | u32 newPC; |
23567 | |
23568 | newPC = (u32)(PC) - BasePC; |
23569 | newPC += GET_SWORD; |
23570 | SET_PC(newPC); |
23571 | CHECK_BRANCH_EXCEPTION(newPC) |
23572 | RET(10) |
23573 | } |
23574 | } |
23575 | else |
23576 | { |
23577 | PC++; |
23578 | RET(12) |
23579 | } |
23580 | PC++; |
23581 | RET(14) |
23582 | } |
23583 | |
23584 | // DBCC |
23585 | OPCODE(0x5EC8) |
23586 | { |
23587 | u32 adr, res; |
23588 | u32 src, dst; |
23589 | |
23590 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23591 | { |
23592 | res = DREGu16((Opcode >> 0) & 7); |
23593 | res--; |
23594 | DREGu16((Opcode >> 0) & 7) = res; |
23595 | if ((s32)res != -1) |
23596 | { |
23597 | u32 newPC; |
23598 | |
23599 | newPC = (u32)(PC) - BasePC; |
23600 | newPC += GET_SWORD; |
23601 | SET_PC(newPC); |
23602 | CHECK_BRANCH_EXCEPTION(newPC) |
23603 | RET(10) |
23604 | } |
23605 | } |
23606 | else |
23607 | { |
23608 | PC++; |
23609 | RET(12) |
23610 | } |
23611 | PC++; |
23612 | RET(14) |
23613 | } |
23614 | |
23615 | // DBCC |
23616 | OPCODE(0x5FC8) |
23617 | { |
23618 | u32 adr, res; |
23619 | u32 src, dst; |
23620 | |
23621 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23622 | { |
23623 | res = DREGu16((Opcode >> 0) & 7); |
23624 | res--; |
23625 | DREGu16((Opcode >> 0) & 7) = res; |
23626 | if ((s32)res != -1) |
23627 | { |
23628 | u32 newPC; |
23629 | |
23630 | newPC = (u32)(PC) - BasePC; |
23631 | newPC += GET_SWORD; |
23632 | SET_PC(newPC); |
23633 | CHECK_BRANCH_EXCEPTION(newPC) |
23634 | RET(10) |
23635 | } |
23636 | } |
23637 | else |
23638 | { |
23639 | PC++; |
23640 | RET(12) |
23641 | } |
23642 | PC++; |
23643 | RET(14) |
23644 | } |
23645 | |
23646 | // ADDQ |
23647 | OPCODE(0x5000) |
23648 | { |
23649 | u32 adr, res; |
23650 | u32 src, dst; |
23651 | |
23652 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23653 | dst = DREGu8((Opcode >> 0) & 7); |
23654 | res = dst + src; |
23655 | flag_N = flag_X = flag_C = res; |
23656 | flag_V = (src ^ res) & (dst ^ res); |
23657 | flag_NotZ = res & 0xFF; |
23658 | DREGu8((Opcode >> 0) & 7) = res; |
23659 | RET(4) |
23660 | } |
23661 | |
23662 | // ADDQ |
23663 | OPCODE(0x5010) |
23664 | { |
23665 | u32 adr, res; |
23666 | u32 src, dst; |
23667 | |
23668 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23669 | adr = AREG((Opcode >> 0) & 7); |
23670 | PRE_IO |
23671 | READ_BYTE_F(adr, dst) |
23672 | res = dst + src; |
23673 | flag_N = flag_X = flag_C = res; |
23674 | flag_V = (src ^ res) & (dst ^ res); |
23675 | flag_NotZ = res & 0xFF; |
23676 | WRITE_BYTE_F(adr, res) |
23677 | POST_IO |
23678 | RET(12) |
23679 | } |
23680 | |
23681 | // ADDQ |
23682 | OPCODE(0x5018) |
23683 | { |
23684 | u32 adr, res; |
23685 | u32 src, dst; |
23686 | |
23687 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23688 | adr = AREG((Opcode >> 0) & 7); |
23689 | AREG((Opcode >> 0) & 7) += 1; |
23690 | PRE_IO |
23691 | READ_BYTE_F(adr, dst) |
23692 | res = dst + src; |
23693 | flag_N = flag_X = flag_C = res; |
23694 | flag_V = (src ^ res) & (dst ^ res); |
23695 | flag_NotZ = res & 0xFF; |
23696 | WRITE_BYTE_F(adr, res) |
23697 | POST_IO |
23698 | RET(12) |
23699 | } |
23700 | |
23701 | // ADDQ |
23702 | OPCODE(0x5020) |
23703 | { |
23704 | u32 adr, res; |
23705 | u32 src, dst; |
23706 | |
23707 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23708 | adr = AREG((Opcode >> 0) & 7) - 1; |
23709 | AREG((Opcode >> 0) & 7) = adr; |
23710 | PRE_IO |
23711 | READ_BYTE_F(adr, dst) |
23712 | res = dst + src; |
23713 | flag_N = flag_X = flag_C = res; |
23714 | flag_V = (src ^ res) & (dst ^ res); |
23715 | flag_NotZ = res & 0xFF; |
23716 | WRITE_BYTE_F(adr, res) |
23717 | POST_IO |
23718 | RET(14) |
23719 | } |
23720 | |
23721 | // ADDQ |
23722 | OPCODE(0x5028) |
23723 | { |
23724 | u32 adr, res; |
23725 | u32 src, dst; |
23726 | |
23727 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23728 | FETCH_SWORD(adr); |
23729 | adr += AREG((Opcode >> 0) & 7); |
23730 | PRE_IO |
23731 | READ_BYTE_F(adr, dst) |
23732 | res = dst + src; |
23733 | flag_N = flag_X = flag_C = res; |
23734 | flag_V = (src ^ res) & (dst ^ res); |
23735 | flag_NotZ = res & 0xFF; |
23736 | WRITE_BYTE_F(adr, res) |
23737 | POST_IO |
23738 | RET(16) |
23739 | } |
23740 | |
23741 | // ADDQ |
23742 | OPCODE(0x5030) |
23743 | { |
23744 | u32 adr, res; |
23745 | u32 src, dst; |
23746 | |
23747 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23748 | adr = AREG((Opcode >> 0) & 7); |
23749 | DECODE_EXT_WORD |
23750 | PRE_IO |
23751 | READ_BYTE_F(adr, dst) |
23752 | res = dst + src; |
23753 | flag_N = flag_X = flag_C = res; |
23754 | flag_V = (src ^ res) & (dst ^ res); |
23755 | flag_NotZ = res & 0xFF; |
23756 | WRITE_BYTE_F(adr, res) |
23757 | POST_IO |
23758 | RET(18) |
23759 | } |
23760 | |
23761 | // ADDQ |
23762 | OPCODE(0x5038) |
23763 | { |
23764 | u32 adr, res; |
23765 | u32 src, dst; |
23766 | |
23767 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23768 | FETCH_SWORD(adr); |
23769 | PRE_IO |
23770 | READ_BYTE_F(adr, dst) |
23771 | res = dst + src; |
23772 | flag_N = flag_X = flag_C = res; |
23773 | flag_V = (src ^ res) & (dst ^ res); |
23774 | flag_NotZ = res & 0xFF; |
23775 | WRITE_BYTE_F(adr, res) |
23776 | POST_IO |
23777 | RET(16) |
23778 | } |
23779 | |
23780 | // ADDQ |
23781 | OPCODE(0x5039) |
23782 | { |
23783 | u32 adr, res; |
23784 | u32 src, dst; |
23785 | |
23786 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23787 | FETCH_LONG(adr); |
23788 | PRE_IO |
23789 | READ_BYTE_F(adr, dst) |
23790 | res = dst + src; |
23791 | flag_N = flag_X = flag_C = res; |
23792 | flag_V = (src ^ res) & (dst ^ res); |
23793 | flag_NotZ = res & 0xFF; |
23794 | WRITE_BYTE_F(adr, res) |
23795 | POST_IO |
23796 | RET(20) |
23797 | } |
23798 | |
23799 | // ADDQ |
23800 | OPCODE(0x501F) |
23801 | { |
23802 | u32 adr, res; |
23803 | u32 src, dst; |
23804 | |
23805 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23806 | adr = AREG(7); |
23807 | AREG(7) += 2; |
23808 | PRE_IO |
23809 | READ_BYTE_F(adr, dst) |
23810 | res = dst + src; |
23811 | flag_N = flag_X = flag_C = res; |
23812 | flag_V = (src ^ res) & (dst ^ res); |
23813 | flag_NotZ = res & 0xFF; |
23814 | WRITE_BYTE_F(adr, res) |
23815 | POST_IO |
23816 | RET(12) |
23817 | } |
23818 | |
23819 | // ADDQ |
23820 | OPCODE(0x5027) |
23821 | { |
23822 | u32 adr, res; |
23823 | u32 src, dst; |
23824 | |
23825 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23826 | adr = AREG(7) - 2; |
23827 | AREG(7) = adr; |
23828 | PRE_IO |
23829 | READ_BYTE_F(adr, dst) |
23830 | res = dst + src; |
23831 | flag_N = flag_X = flag_C = res; |
23832 | flag_V = (src ^ res) & (dst ^ res); |
23833 | flag_NotZ = res & 0xFF; |
23834 | WRITE_BYTE_F(adr, res) |
23835 | POST_IO |
23836 | RET(14) |
23837 | } |
23838 | |
23839 | // ADDQ |
23840 | OPCODE(0x5040) |
23841 | { |
23842 | u32 adr, res; |
23843 | u32 src, dst; |
23844 | |
23845 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23846 | dst = DREGu16((Opcode >> 0) & 7); |
23847 | res = dst + src; |
23848 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23849 | flag_N = flag_X = flag_C = res >> 8; |
23850 | flag_NotZ = res & 0xFFFF; |
23851 | DREGu16((Opcode >> 0) & 7) = res; |
23852 | RET(4) |
23853 | } |
23854 | |
23855 | // ADDQ |
23856 | OPCODE(0x5048) |
23857 | { |
23858 | u32 adr, res; |
23859 | u32 src, dst; |
23860 | |
23861 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23862 | dst = AREGu32((Opcode >> 0) & 7); |
23863 | res = dst + src; |
23864 | AREG((Opcode >> 0) & 7) = res; |
03e4f2a3 |
23865 | #ifdef USE_CYCLONE_TIMING |
70357ce5 |
23866 | RET(4) |
23867 | #else |
23868 | RET(8) |
23869 | #endif |
23870 | } |
23871 | |
23872 | // ADDQ |
23873 | OPCODE(0x5050) |
23874 | { |
23875 | u32 adr, res; |
23876 | u32 src, dst; |
23877 | |
23878 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23879 | adr = AREG((Opcode >> 0) & 7); |
23880 | PRE_IO |
23881 | READ_WORD_F(adr, dst) |
23882 | res = dst + src; |
23883 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23884 | flag_N = flag_X = flag_C = res >> 8; |
23885 | flag_NotZ = res & 0xFFFF; |
23886 | WRITE_WORD_F(adr, res) |
23887 | POST_IO |
23888 | RET(12) |
23889 | } |
23890 | |
23891 | // ADDQ |
23892 | OPCODE(0x5058) |
23893 | { |
23894 | u32 adr, res; |
23895 | u32 src, dst; |
23896 | |
23897 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23898 | adr = AREG((Opcode >> 0) & 7); |
23899 | AREG((Opcode >> 0) & 7) += 2; |
23900 | PRE_IO |
23901 | READ_WORD_F(adr, dst) |
23902 | res = dst + src; |
23903 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23904 | flag_N = flag_X = flag_C = res >> 8; |
23905 | flag_NotZ = res & 0xFFFF; |
23906 | WRITE_WORD_F(adr, res) |
23907 | POST_IO |
23908 | RET(12) |
23909 | } |
23910 | |
23911 | // ADDQ |
23912 | OPCODE(0x5060) |
23913 | { |
23914 | u32 adr, res; |
23915 | u32 src, dst; |
23916 | |
23917 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23918 | adr = AREG((Opcode >> 0) & 7) - 2; |
23919 | AREG((Opcode >> 0) & 7) = adr; |
23920 | PRE_IO |
23921 | READ_WORD_F(adr, dst) |
23922 | res = dst + src; |
23923 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23924 | flag_N = flag_X = flag_C = res >> 8; |
23925 | flag_NotZ = res & 0xFFFF; |
23926 | WRITE_WORD_F(adr, res) |
23927 | POST_IO |
23928 | RET(14) |
23929 | } |
23930 | |
23931 | // ADDQ |
23932 | OPCODE(0x5068) |
23933 | { |
23934 | u32 adr, res; |
23935 | u32 src, dst; |
23936 | |
23937 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23938 | FETCH_SWORD(adr); |
23939 | adr += AREG((Opcode >> 0) & 7); |
23940 | PRE_IO |
23941 | READ_WORD_F(adr, dst) |
23942 | res = dst + src; |
23943 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23944 | flag_N = flag_X = flag_C = res >> 8; |
23945 | flag_NotZ = res & 0xFFFF; |
23946 | WRITE_WORD_F(adr, res) |
23947 | POST_IO |
23948 | RET(16) |
23949 | } |
23950 | |
23951 | // ADDQ |
23952 | OPCODE(0x5070) |
23953 | { |
23954 | u32 adr, res; |
23955 | u32 src, dst; |
23956 | |
23957 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23958 | adr = AREG((Opcode >> 0) & 7); |
23959 | DECODE_EXT_WORD |
23960 | PRE_IO |
23961 | READ_WORD_F(adr, dst) |
23962 | res = dst + src; |
23963 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23964 | flag_N = flag_X = flag_C = res >> 8; |
23965 | flag_NotZ = res & 0xFFFF; |
23966 | WRITE_WORD_F(adr, res) |
23967 | POST_IO |
23968 | RET(18) |
23969 | } |
23970 | |
23971 | // ADDQ |
23972 | OPCODE(0x5078) |
23973 | { |
23974 | u32 adr, res; |
23975 | u32 src, dst; |
23976 | |
23977 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23978 | FETCH_SWORD(adr); |
23979 | PRE_IO |
23980 | READ_WORD_F(adr, dst) |
23981 | res = dst + src; |
23982 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23983 | flag_N = flag_X = flag_C = res >> 8; |
23984 | flag_NotZ = res & 0xFFFF; |
23985 | WRITE_WORD_F(adr, res) |
23986 | POST_IO |
23987 | RET(16) |
23988 | } |
23989 | |
23990 | // ADDQ |
23991 | OPCODE(0x5079) |
23992 | { |
23993 | u32 adr, res; |
23994 | u32 src, dst; |
23995 | |
23996 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23997 | FETCH_LONG(adr); |
23998 | PRE_IO |
23999 | READ_WORD_F(adr, dst) |
24000 | res = dst + src; |
24001 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24002 | flag_N = flag_X = flag_C = res >> 8; |
24003 | flag_NotZ = res & 0xFFFF; |
24004 | WRITE_WORD_F(adr, res) |
24005 | POST_IO |
24006 | RET(20) |
24007 | } |
24008 | |
24009 | // ADDQ |
24010 | OPCODE(0x505F) |
24011 | { |
24012 | u32 adr, res; |
24013 | u32 src, dst; |
24014 | |
24015 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24016 | adr = AREG(7); |
24017 | AREG(7) += 2; |
24018 | PRE_IO |
24019 | READ_WORD_F(adr, dst) |
24020 | res = dst + src; |
24021 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24022 | flag_N = flag_X = flag_C = res >> 8; |
24023 | flag_NotZ = res & 0xFFFF; |
24024 | WRITE_WORD_F(adr, res) |
24025 | POST_IO |
24026 | RET(12) |
24027 | } |
24028 | |
24029 | // ADDQ |
24030 | OPCODE(0x5067) |
24031 | { |
24032 | u32 adr, res; |
24033 | u32 src, dst; |
24034 | |
24035 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24036 | adr = AREG(7) - 2; |
24037 | AREG(7) = adr; |
24038 | PRE_IO |
24039 | READ_WORD_F(adr, dst) |
24040 | res = dst + src; |
24041 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24042 | flag_N = flag_X = flag_C = res >> 8; |
24043 | flag_NotZ = res & 0xFFFF; |
24044 | WRITE_WORD_F(adr, res) |
24045 | POST_IO |
24046 | RET(14) |
24047 | } |
24048 | |
24049 | // ADDQ |
24050 | OPCODE(0x5080) |
24051 | { |
24052 | u32 adr, res; |
24053 | u32 src, dst; |
24054 | |
24055 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24056 | dst = DREGu32((Opcode >> 0) & 7); |
24057 | res = dst + src; |
24058 | flag_NotZ = res; |
24059 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24060 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24061 | flag_N = res >> 24; |
24062 | DREGu32((Opcode >> 0) & 7) = res; |
24063 | RET(8) |
24064 | } |
24065 | |
24066 | // ADDQ |
24067 | OPCODE(0x5088) |
24068 | { |
24069 | u32 adr, res; |
24070 | u32 src, dst; |
24071 | |
24072 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24073 | dst = AREGu32((Opcode >> 0) & 7); |
24074 | res = dst + src; |
24075 | AREG((Opcode >> 0) & 7) = res; |
24076 | RET(8) |
24077 | } |
24078 | |
24079 | // ADDQ |
24080 | OPCODE(0x5090) |
24081 | { |
24082 | u32 adr, res; |
24083 | u32 src, dst; |
24084 | |
24085 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24086 | adr = AREG((Opcode >> 0) & 7); |
24087 | PRE_IO |
24088 | READ_LONG_F(adr, dst) |
24089 | res = dst + src; |
24090 | flag_NotZ = res; |
24091 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24092 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24093 | flag_N = res >> 24; |
24094 | WRITE_LONG_F(adr, res) |
24095 | POST_IO |
24096 | RET(20) |
24097 | } |
24098 | |
24099 | // ADDQ |
24100 | OPCODE(0x5098) |
24101 | { |
24102 | u32 adr, res; |
24103 | u32 src, dst; |
24104 | |
24105 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24106 | adr = AREG((Opcode >> 0) & 7); |
24107 | AREG((Opcode >> 0) & 7) += 4; |
24108 | PRE_IO |
24109 | READ_LONG_F(adr, dst) |
24110 | res = dst + src; |
24111 | flag_NotZ = res; |
24112 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24113 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24114 | flag_N = res >> 24; |
24115 | WRITE_LONG_F(adr, res) |
24116 | POST_IO |
24117 | RET(20) |
24118 | } |
24119 | |
24120 | // ADDQ |
24121 | OPCODE(0x50A0) |
24122 | { |
24123 | u32 adr, res; |
24124 | u32 src, dst; |
24125 | |
24126 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24127 | adr = AREG((Opcode >> 0) & 7) - 4; |
24128 | AREG((Opcode >> 0) & 7) = adr; |
24129 | PRE_IO |
24130 | READ_LONG_F(adr, dst) |
24131 | res = dst + src; |
24132 | flag_NotZ = res; |
24133 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24134 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24135 | flag_N = res >> 24; |
24136 | WRITE_LONG_F(adr, res) |
24137 | POST_IO |
24138 | RET(22) |
24139 | } |
24140 | |
24141 | // ADDQ |
24142 | OPCODE(0x50A8) |
24143 | { |
24144 | u32 adr, res; |
24145 | u32 src, dst; |
24146 | |
24147 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24148 | FETCH_SWORD(adr); |
24149 | adr += AREG((Opcode >> 0) & 7); |
24150 | PRE_IO |
24151 | READ_LONG_F(adr, dst) |
24152 | res = dst + src; |
24153 | flag_NotZ = res; |
24154 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24155 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24156 | flag_N = res >> 24; |
24157 | WRITE_LONG_F(adr, res) |
24158 | POST_IO |
24159 | RET(24) |
24160 | } |
24161 | |
24162 | // ADDQ |
24163 | OPCODE(0x50B0) |
24164 | { |
24165 | u32 adr, res; |
24166 | u32 src, dst; |
24167 | |
24168 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24169 | adr = AREG((Opcode >> 0) & 7); |
24170 | DECODE_EXT_WORD |
24171 | PRE_IO |
24172 | READ_LONG_F(adr, dst) |
24173 | res = dst + src; |
24174 | flag_NotZ = res; |
24175 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24176 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24177 | flag_N = res >> 24; |
24178 | WRITE_LONG_F(adr, res) |
24179 | POST_IO |
24180 | RET(26) |
24181 | } |
24182 | |
24183 | // ADDQ |
24184 | OPCODE(0x50B8) |
24185 | { |
24186 | u32 adr, res; |
24187 | u32 src, dst; |
24188 | |
24189 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24190 | FETCH_SWORD(adr); |
24191 | PRE_IO |
24192 | READ_LONG_F(adr, dst) |
24193 | res = dst + src; |
24194 | flag_NotZ = res; |
24195 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24196 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24197 | flag_N = res >> 24; |
24198 | WRITE_LONG_F(adr, res) |
24199 | POST_IO |
24200 | RET(24) |
24201 | } |
24202 | |
24203 | // ADDQ |
24204 | OPCODE(0x50B9) |
24205 | { |
24206 | u32 adr, res; |
24207 | u32 src, dst; |
24208 | |
24209 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24210 | FETCH_LONG(adr); |
24211 | PRE_IO |
24212 | READ_LONG_F(adr, dst) |
24213 | res = dst + src; |
24214 | flag_NotZ = res; |
24215 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24216 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24217 | flag_N = res >> 24; |
24218 | WRITE_LONG_F(adr, res) |
24219 | POST_IO |
24220 | RET(28) |
24221 | } |
24222 | |
24223 | // ADDQ |
24224 | OPCODE(0x509F) |
24225 | { |
24226 | u32 adr, res; |
24227 | u32 src, dst; |
24228 | |
24229 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24230 | adr = AREG(7); |
24231 | AREG(7) += 4; |
24232 | PRE_IO |
24233 | READ_LONG_F(adr, dst) |
24234 | res = dst + src; |
24235 | flag_NotZ = res; |
24236 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24237 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24238 | flag_N = res >> 24; |
24239 | WRITE_LONG_F(adr, res) |
24240 | POST_IO |
24241 | RET(20) |
24242 | } |
24243 | |
24244 | // ADDQ |
24245 | OPCODE(0x50A7) |
24246 | { |
24247 | u32 adr, res; |
24248 | u32 src, dst; |
24249 | |
24250 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24251 | adr = AREG(7) - 4; |
24252 | AREG(7) = adr; |
24253 | PRE_IO |
24254 | READ_LONG_F(adr, dst) |
24255 | res = dst + src; |
24256 | flag_NotZ = res; |
24257 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24258 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24259 | flag_N = res >> 24; |
24260 | WRITE_LONG_F(adr, res) |
24261 | POST_IO |
24262 | RET(22) |
24263 | } |
24264 | |
24265 | // SUBQ |
24266 | OPCODE(0x5100) |
24267 | { |
24268 | u32 adr, res; |
24269 | u32 src, dst; |
24270 | |
24271 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24272 | dst = DREGu8((Opcode >> 0) & 7); |
24273 | res = dst - src; |
24274 | flag_N = flag_X = flag_C = res; |
24275 | flag_V = (src ^ dst) & (res ^ dst); |
24276 | flag_NotZ = res & 0xFF; |
24277 | DREGu8((Opcode >> 0) & 7) = res; |
24278 | RET(4) |
24279 | } |
24280 | |
24281 | // SUBQ |
24282 | OPCODE(0x5110) |
24283 | { |
24284 | u32 adr, res; |
24285 | u32 src, dst; |
24286 | |
24287 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24288 | adr = AREG((Opcode >> 0) & 7); |
24289 | PRE_IO |
24290 | READ_BYTE_F(adr, dst) |
24291 | res = dst - src; |
24292 | flag_N = flag_X = flag_C = res; |
24293 | flag_V = (src ^ dst) & (res ^ dst); |
24294 | flag_NotZ = res & 0xFF; |
24295 | WRITE_BYTE_F(adr, res) |
24296 | POST_IO |
24297 | RET(12) |
24298 | } |
24299 | |
24300 | // SUBQ |
24301 | OPCODE(0x5118) |
24302 | { |
24303 | u32 adr, res; |
24304 | u32 src, dst; |
24305 | |
24306 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24307 | adr = AREG((Opcode >> 0) & 7); |
24308 | AREG((Opcode >> 0) & 7) += 1; |
24309 | PRE_IO |
24310 | READ_BYTE_F(adr, dst) |
24311 | res = dst - src; |
24312 | flag_N = flag_X = flag_C = res; |
24313 | flag_V = (src ^ dst) & (res ^ dst); |
24314 | flag_NotZ = res & 0xFF; |
24315 | WRITE_BYTE_F(adr, res) |
24316 | POST_IO |
24317 | RET(12) |
24318 | } |
24319 | |
24320 | // SUBQ |
24321 | OPCODE(0x5120) |
24322 | { |
24323 | u32 adr, res; |
24324 | u32 src, dst; |
24325 | |
24326 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24327 | adr = AREG((Opcode >> 0) & 7) - 1; |
24328 | AREG((Opcode >> 0) & 7) = adr; |
24329 | PRE_IO |
24330 | READ_BYTE_F(adr, dst) |
24331 | res = dst - src; |
24332 | flag_N = flag_X = flag_C = res; |
24333 | flag_V = (src ^ dst) & (res ^ dst); |
24334 | flag_NotZ = res & 0xFF; |
24335 | WRITE_BYTE_F(adr, res) |
24336 | POST_IO |
24337 | RET(14) |
24338 | } |
24339 | |
24340 | // SUBQ |
24341 | OPCODE(0x5128) |
24342 | { |
24343 | u32 adr, res; |
24344 | u32 src, dst; |
24345 | |
24346 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24347 | FETCH_SWORD(adr); |
24348 | adr += AREG((Opcode >> 0) & 7); |
24349 | PRE_IO |
24350 | READ_BYTE_F(adr, dst) |
24351 | res = dst - src; |
24352 | flag_N = flag_X = flag_C = res; |
24353 | flag_V = (src ^ dst) & (res ^ dst); |
24354 | flag_NotZ = res & 0xFF; |
24355 | WRITE_BYTE_F(adr, res) |
24356 | POST_IO |
24357 | RET(16) |
24358 | } |
24359 | |
24360 | // SUBQ |
24361 | OPCODE(0x5130) |
24362 | { |
24363 | u32 adr, res; |
24364 | u32 src, dst; |
24365 | |
24366 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24367 | adr = AREG((Opcode >> 0) & 7); |
24368 | DECODE_EXT_WORD |
24369 | PRE_IO |
24370 | READ_BYTE_F(adr, dst) |
24371 | res = dst - src; |
24372 | flag_N = flag_X = flag_C = res; |
24373 | flag_V = (src ^ dst) & (res ^ dst); |
24374 | flag_NotZ = res & 0xFF; |
24375 | WRITE_BYTE_F(adr, res) |
24376 | POST_IO |
24377 | RET(18) |
24378 | } |
24379 | |
24380 | // SUBQ |
24381 | OPCODE(0x5138) |
24382 | { |
24383 | u32 adr, res; |
24384 | u32 src, dst; |
24385 | |
24386 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24387 | FETCH_SWORD(adr); |
24388 | PRE_IO |
24389 | READ_BYTE_F(adr, dst) |
24390 | res = dst - src; |
24391 | flag_N = flag_X = flag_C = res; |
24392 | flag_V = (src ^ dst) & (res ^ dst); |
24393 | flag_NotZ = res & 0xFF; |
24394 | WRITE_BYTE_F(adr, res) |
24395 | POST_IO |
24396 | RET(16) |
24397 | } |
24398 | |
24399 | // SUBQ |
24400 | OPCODE(0x5139) |
24401 | { |
24402 | u32 adr, res; |
24403 | u32 src, dst; |
24404 | |
24405 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24406 | FETCH_LONG(adr); |
24407 | PRE_IO |
24408 | READ_BYTE_F(adr, dst) |
24409 | res = dst - src; |
24410 | flag_N = flag_X = flag_C = res; |
24411 | flag_V = (src ^ dst) & (res ^ dst); |
24412 | flag_NotZ = res & 0xFF; |
24413 | WRITE_BYTE_F(adr, res) |
24414 | POST_IO |
24415 | RET(20) |
24416 | } |
24417 | |
24418 | // SUBQ |
24419 | OPCODE(0x511F) |
24420 | { |
24421 | u32 adr, res; |
24422 | u32 src, dst; |
24423 | |
24424 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24425 | adr = AREG(7); |
24426 | AREG(7) += 2; |
24427 | PRE_IO |
24428 | READ_BYTE_F(adr, dst) |
24429 | res = dst - src; |
24430 | flag_N = flag_X = flag_C = res; |
24431 | flag_V = (src ^ dst) & (res ^ dst); |
24432 | flag_NotZ = res & 0xFF; |
24433 | WRITE_BYTE_F(adr, res) |
24434 | POST_IO |
24435 | RET(12) |
24436 | } |
24437 | |
24438 | // SUBQ |
24439 | OPCODE(0x5127) |
24440 | { |
24441 | u32 adr, res; |
24442 | u32 src, dst; |
24443 | |
24444 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24445 | adr = AREG(7) - 2; |
24446 | AREG(7) = adr; |
24447 | PRE_IO |
24448 | READ_BYTE_F(adr, dst) |
24449 | res = dst - src; |
24450 | flag_N = flag_X = flag_C = res; |
24451 | flag_V = (src ^ dst) & (res ^ dst); |
24452 | flag_NotZ = res & 0xFF; |
24453 | WRITE_BYTE_F(adr, res) |
24454 | POST_IO |
24455 | RET(14) |
24456 | } |
24457 | |
24458 | // SUBQ |
24459 | OPCODE(0x5140) |
24460 | { |
24461 | u32 adr, res; |
24462 | u32 src, dst; |
24463 | |
24464 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24465 | dst = DREGu16((Opcode >> 0) & 7); |
24466 | res = dst - src; |
24467 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24468 | flag_N = flag_X = flag_C = res >> 8; |
24469 | flag_NotZ = res & 0xFFFF; |
24470 | DREGu16((Opcode >> 0) & 7) = res; |
24471 | RET(4) |
24472 | } |
24473 | |
24474 | // SUBQ |
24475 | OPCODE(0x5148) |
24476 | { |
24477 | u32 adr, res; |
24478 | u32 src, dst; |
24479 | |
24480 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24481 | dst = AREGu32((Opcode >> 0) & 7); |
24482 | res = dst - src; |
24483 | AREG((Opcode >> 0) & 7) = res; |
24484 | RET(8) |
24485 | } |
24486 | |
24487 | // SUBQ |
24488 | OPCODE(0x5150) |
24489 | { |
24490 | u32 adr, res; |
24491 | u32 src, dst; |
24492 | |
24493 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24494 | adr = AREG((Opcode >> 0) & 7); |
24495 | PRE_IO |
24496 | READ_WORD_F(adr, dst) |
24497 | res = dst - src; |
24498 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24499 | flag_N = flag_X = flag_C = res >> 8; |
24500 | flag_NotZ = res & 0xFFFF; |
24501 | WRITE_WORD_F(adr, res) |
24502 | POST_IO |
24503 | RET(12) |
24504 | } |
24505 | |
24506 | // SUBQ |
24507 | OPCODE(0x5158) |
24508 | { |
24509 | u32 adr, res; |
24510 | u32 src, dst; |
24511 | |
24512 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24513 | adr = AREG((Opcode >> 0) & 7); |
24514 | AREG((Opcode >> 0) & 7) += 2; |
24515 | PRE_IO |
24516 | READ_WORD_F(adr, dst) |
24517 | res = dst - src; |
24518 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24519 | flag_N = flag_X = flag_C = res >> 8; |
24520 | flag_NotZ = res & 0xFFFF; |
24521 | WRITE_WORD_F(adr, res) |
24522 | POST_IO |
24523 | RET(12) |
24524 | } |
24525 | |
24526 | // SUBQ |
24527 | OPCODE(0x5160) |
24528 | { |
24529 | u32 adr, res; |
24530 | u32 src, dst; |
24531 | |
24532 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24533 | adr = AREG((Opcode >> 0) & 7) - 2; |
24534 | AREG((Opcode >> 0) & 7) = adr; |
24535 | PRE_IO |
24536 | READ_WORD_F(adr, dst) |
24537 | res = dst - src; |
24538 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24539 | flag_N = flag_X = flag_C = res >> 8; |
24540 | flag_NotZ = res & 0xFFFF; |
24541 | WRITE_WORD_F(adr, res) |
24542 | POST_IO |
24543 | RET(14) |
24544 | } |
24545 | |
24546 | // SUBQ |
24547 | OPCODE(0x5168) |
24548 | { |
24549 | u32 adr, res; |
24550 | u32 src, dst; |
24551 | |
24552 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24553 | FETCH_SWORD(adr); |
24554 | adr += AREG((Opcode >> 0) & 7); |
24555 | PRE_IO |
24556 | READ_WORD_F(adr, dst) |
24557 | res = dst - src; |
24558 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24559 | flag_N = flag_X = flag_C = res >> 8; |
24560 | flag_NotZ = res & 0xFFFF; |
24561 | WRITE_WORD_F(adr, res) |
24562 | POST_IO |
24563 | RET(16) |
24564 | } |
24565 | |
24566 | // SUBQ |
24567 | OPCODE(0x5170) |
24568 | { |
24569 | u32 adr, res; |
24570 | u32 src, dst; |
24571 | |
24572 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24573 | adr = AREG((Opcode >> 0) & 7); |
24574 | DECODE_EXT_WORD |
24575 | PRE_IO |
24576 | READ_WORD_F(adr, dst) |
24577 | res = dst - src; |
24578 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24579 | flag_N = flag_X = flag_C = res >> 8; |
24580 | flag_NotZ = res & 0xFFFF; |
24581 | WRITE_WORD_F(adr, res) |
24582 | POST_IO |
24583 | RET(18) |
24584 | } |
24585 | |
24586 | // SUBQ |
24587 | OPCODE(0x5178) |
24588 | { |
24589 | u32 adr, res; |
24590 | u32 src, dst; |
24591 | |
24592 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24593 | FETCH_SWORD(adr); |
24594 | PRE_IO |
24595 | READ_WORD_F(adr, dst) |
24596 | res = dst - src; |
24597 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24598 | flag_N = flag_X = flag_C = res >> 8; |
24599 | flag_NotZ = res & 0xFFFF; |
24600 | WRITE_WORD_F(adr, res) |
24601 | POST_IO |
24602 | RET(16) |
24603 | } |
24604 | |
24605 | // SUBQ |
24606 | OPCODE(0x5179) |
24607 | { |
24608 | u32 adr, res; |
24609 | u32 src, dst; |
24610 | |
24611 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24612 | FETCH_LONG(adr); |
24613 | PRE_IO |
24614 | READ_WORD_F(adr, dst) |
24615 | res = dst - src; |
24616 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24617 | flag_N = flag_X = flag_C = res >> 8; |
24618 | flag_NotZ = res & 0xFFFF; |
24619 | WRITE_WORD_F(adr, res) |
24620 | POST_IO |
24621 | RET(20) |
24622 | } |
24623 | |
24624 | // SUBQ |
24625 | OPCODE(0x515F) |
24626 | { |
24627 | u32 adr, res; |
24628 | u32 src, dst; |
24629 | |
24630 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24631 | adr = AREG(7); |
24632 | AREG(7) += 2; |
24633 | PRE_IO |
24634 | READ_WORD_F(adr, dst) |
24635 | res = dst - src; |
24636 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24637 | flag_N = flag_X = flag_C = res >> 8; |
24638 | flag_NotZ = res & 0xFFFF; |
24639 | WRITE_WORD_F(adr, res) |
24640 | POST_IO |
24641 | RET(12) |
24642 | } |
24643 | |
24644 | // SUBQ |
24645 | OPCODE(0x5167) |
24646 | { |
24647 | u32 adr, res; |
24648 | u32 src, dst; |
24649 | |
24650 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24651 | adr = AREG(7) - 2; |
24652 | AREG(7) = adr; |
24653 | PRE_IO |
24654 | READ_WORD_F(adr, dst) |
24655 | res = dst - src; |
24656 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24657 | flag_N = flag_X = flag_C = res >> 8; |
24658 | flag_NotZ = res & 0xFFFF; |
24659 | WRITE_WORD_F(adr, res) |
24660 | POST_IO |
24661 | RET(14) |
24662 | } |
24663 | |
24664 | // SUBQ |
24665 | OPCODE(0x5180) |
24666 | { |
24667 | u32 adr, res; |
24668 | u32 src, dst; |
24669 | |
24670 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24671 | dst = DREGu32((Opcode >> 0) & 7); |
24672 | res = dst - src; |
24673 | flag_NotZ = res; |
24674 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24675 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24676 | flag_N = res >> 24; |
24677 | DREGu32((Opcode >> 0) & 7) = res; |
24678 | RET(8) |
24679 | } |
24680 | |
24681 | // SUBQ |
24682 | OPCODE(0x5188) |
24683 | { |
24684 | u32 adr, res; |
24685 | u32 src, dst; |
24686 | |
24687 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24688 | dst = AREGu32((Opcode >> 0) & 7); |
24689 | res = dst - src; |
24690 | AREG((Opcode >> 0) & 7) = res; |
24691 | RET(8) |
24692 | } |
24693 | |
24694 | // SUBQ |
24695 | OPCODE(0x5190) |
24696 | { |
24697 | u32 adr, res; |
24698 | u32 src, dst; |
24699 | |
24700 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24701 | adr = AREG((Opcode >> 0) & 7); |
24702 | PRE_IO |
24703 | READ_LONG_F(adr, dst) |
24704 | res = dst - src; |
24705 | flag_NotZ = res; |
24706 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24707 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24708 | flag_N = res >> 24; |
24709 | WRITE_LONG_F(adr, res) |
24710 | POST_IO |
24711 | RET(20) |
24712 | } |
24713 | |
24714 | // SUBQ |
24715 | OPCODE(0x5198) |
24716 | { |
24717 | u32 adr, res; |
24718 | u32 src, dst; |
24719 | |
24720 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24721 | adr = AREG((Opcode >> 0) & 7); |
24722 | AREG((Opcode >> 0) & 7) += 4; |
24723 | PRE_IO |
24724 | READ_LONG_F(adr, dst) |
24725 | res = dst - src; |
24726 | flag_NotZ = res; |
24727 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24728 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24729 | flag_N = res >> 24; |
24730 | WRITE_LONG_F(adr, res) |
24731 | POST_IO |
24732 | RET(20) |
24733 | } |
24734 | |
24735 | // SUBQ |
24736 | OPCODE(0x51A0) |
24737 | { |
24738 | u32 adr, res; |
24739 | u32 src, dst; |
24740 | |
24741 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24742 | adr = AREG((Opcode >> 0) & 7) - 4; |
24743 | AREG((Opcode >> 0) & 7) = adr; |
24744 | PRE_IO |
24745 | READ_LONG_F(adr, dst) |
24746 | res = dst - src; |
24747 | flag_NotZ = res; |
24748 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24749 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24750 | flag_N = res >> 24; |
24751 | WRITE_LONG_F(adr, res) |
24752 | POST_IO |
24753 | RET(22) |
24754 | } |
24755 | |
24756 | // SUBQ |
24757 | OPCODE(0x51A8) |
24758 | { |
24759 | u32 adr, res; |
24760 | u32 src, dst; |
24761 | |
24762 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24763 | FETCH_SWORD(adr); |
24764 | adr += AREG((Opcode >> 0) & 7); |
24765 | PRE_IO |
24766 | READ_LONG_F(adr, dst) |
24767 | res = dst - src; |
24768 | flag_NotZ = res; |
24769 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24770 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24771 | flag_N = res >> 24; |
24772 | WRITE_LONG_F(adr, res) |
24773 | POST_IO |
24774 | RET(24) |
24775 | } |
24776 | |
24777 | // SUBQ |
24778 | OPCODE(0x51B0) |
24779 | { |
24780 | u32 adr, res; |
24781 | u32 src, dst; |
24782 | |
24783 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24784 | adr = AREG((Opcode >> 0) & 7); |
24785 | DECODE_EXT_WORD |
24786 | PRE_IO |
24787 | READ_LONG_F(adr, dst) |
24788 | res = dst - src; |
24789 | flag_NotZ = res; |
24790 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24791 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24792 | flag_N = res >> 24; |
24793 | WRITE_LONG_F(adr, res) |
24794 | POST_IO |
24795 | RET(26) |
24796 | } |
24797 | |
24798 | // SUBQ |
24799 | OPCODE(0x51B8) |
24800 | { |
24801 | u32 adr, res; |
24802 | u32 src, dst; |
24803 | |
24804 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24805 | FETCH_SWORD(adr); |
24806 | PRE_IO |
24807 | READ_LONG_F(adr, dst) |
24808 | res = dst - src; |
24809 | flag_NotZ = res; |
24810 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24811 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24812 | flag_N = res >> 24; |
24813 | WRITE_LONG_F(adr, res) |
24814 | POST_IO |
24815 | RET(24) |
24816 | } |
24817 | |
24818 | // SUBQ |
24819 | OPCODE(0x51B9) |
24820 | { |
24821 | u32 adr, res; |
24822 | u32 src, dst; |
24823 | |
24824 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24825 | FETCH_LONG(adr); |
24826 | PRE_IO |
24827 | READ_LONG_F(adr, dst) |
24828 | res = dst - src; |
24829 | flag_NotZ = res; |
24830 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24831 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24832 | flag_N = res >> 24; |
24833 | WRITE_LONG_F(adr, res) |
24834 | POST_IO |
24835 | RET(28) |
24836 | } |
24837 | |
24838 | // SUBQ |
24839 | OPCODE(0x519F) |
24840 | { |
24841 | u32 adr, res; |
24842 | u32 src, dst; |
24843 | |
24844 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24845 | adr = AREG(7); |
24846 | AREG(7) += 4; |
24847 | PRE_IO |
24848 | READ_LONG_F(adr, dst) |
24849 | res = dst - src; |
24850 | flag_NotZ = res; |
24851 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24852 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24853 | flag_N = res >> 24; |
24854 | WRITE_LONG_F(adr, res) |
24855 | POST_IO |
24856 | RET(20) |
24857 | } |
24858 | |
24859 | // SUBQ |
24860 | OPCODE(0x51A7) |
24861 | { |
24862 | u32 adr, res; |
24863 | u32 src, dst; |
24864 | |
24865 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24866 | adr = AREG(7) - 4; |
24867 | AREG(7) = adr; |
24868 | PRE_IO |
24869 | READ_LONG_F(adr, dst) |
24870 | res = dst - src; |
24871 | flag_NotZ = res; |
24872 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24873 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24874 | flag_N = res >> 24; |
24875 | WRITE_LONG_F(adr, res) |
24876 | POST_IO |
24877 | RET(22) |
24878 | } |
24879 | |
24880 | // BCC |
24881 | OPCODE(0x6201) |
24882 | { |
24883 | u32 adr, res; |
24884 | u32 src, dst; |
24885 | |
24886 | if (flag_NotZ && (!(flag_C & 0x100))) |
24887 | { |
24888 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24889 | m68kcontext.io_cycle_counter -= 2; |
24890 | } |
24891 | RET(8) |
24892 | } |
24893 | |
24894 | // BCC |
24895 | OPCODE(0x6301) |
24896 | { |
24897 | u32 adr, res; |
24898 | u32 src, dst; |
24899 | |
24900 | if ((!flag_NotZ) || (flag_C & 0x100)) |
24901 | { |
24902 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24903 | m68kcontext.io_cycle_counter -= 2; |
24904 | } |
24905 | RET(8) |
24906 | } |
24907 | |
24908 | // BCC |
24909 | OPCODE(0x6401) |
24910 | { |
24911 | u32 adr, res; |
24912 | u32 src, dst; |
24913 | |
24914 | if (!(flag_C & 0x100)) |
24915 | { |
24916 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24917 | m68kcontext.io_cycle_counter -= 2; |
24918 | } |
24919 | RET(8) |
24920 | } |
24921 | |
24922 | // BCC |
24923 | OPCODE(0x6501) |
24924 | { |
24925 | u32 adr, res; |
24926 | u32 src, dst; |
24927 | |
24928 | if (flag_C & 0x100) |
24929 | { |
24930 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24931 | m68kcontext.io_cycle_counter -= 2; |
24932 | } |
24933 | RET(8) |
24934 | } |
24935 | |
24936 | // BCC |
24937 | OPCODE(0x6601) |
24938 | { |
24939 | u32 adr, res; |
24940 | u32 src, dst; |
24941 | |
24942 | if (flag_NotZ) |
24943 | { |
24944 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24945 | m68kcontext.io_cycle_counter -= 2; |
24946 | } |
24947 | RET(8) |
24948 | } |
24949 | |
24950 | // BCC |
24951 | OPCODE(0x6701) |
24952 | { |
24953 | u32 adr, res; |
24954 | u32 src, dst; |
24955 | |
24956 | if (!flag_NotZ) |
24957 | { |
24958 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24959 | m68kcontext.io_cycle_counter -= 2; |
24960 | } |
24961 | RET(8) |
24962 | } |
24963 | |
24964 | // BCC |
24965 | OPCODE(0x6801) |
24966 | { |
24967 | u32 adr, res; |
24968 | u32 src, dst; |
24969 | |
24970 | if (!(flag_V & 0x80)) |
24971 | { |
24972 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24973 | m68kcontext.io_cycle_counter -= 2; |
24974 | } |
24975 | RET(8) |
24976 | } |
24977 | |
24978 | // BCC |
24979 | OPCODE(0x6901) |
24980 | { |
24981 | u32 adr, res; |
24982 | u32 src, dst; |
24983 | |
24984 | if (flag_V & 0x80) |
24985 | { |
24986 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24987 | m68kcontext.io_cycle_counter -= 2; |
24988 | } |
24989 | RET(8) |
24990 | } |
24991 | |
24992 | // BCC |
24993 | OPCODE(0x6A01) |
24994 | { |
24995 | u32 adr, res; |
24996 | u32 src, dst; |
24997 | |
24998 | if (!(flag_N & 0x80)) |
24999 | { |
25000 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25001 | m68kcontext.io_cycle_counter -= 2; |
25002 | } |
25003 | RET(8) |
25004 | } |
25005 | |
25006 | // BCC |
25007 | OPCODE(0x6B01) |
25008 | { |
25009 | u32 adr, res; |
25010 | u32 src, dst; |
25011 | |
25012 | if (flag_N & 0x80) |
25013 | { |
25014 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25015 | m68kcontext.io_cycle_counter -= 2; |
25016 | } |
25017 | RET(8) |
25018 | } |
25019 | |
25020 | // BCC |
25021 | OPCODE(0x6C01) |
25022 | { |
25023 | u32 adr, res; |
25024 | u32 src, dst; |
25025 | |
25026 | if (!((flag_N ^ flag_V) & 0x80)) |
25027 | { |
25028 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25029 | m68kcontext.io_cycle_counter -= 2; |
25030 | } |
25031 | RET(8) |
25032 | } |
25033 | |
25034 | // BCC |
25035 | OPCODE(0x6D01) |
25036 | { |
25037 | u32 adr, res; |
25038 | u32 src, dst; |
25039 | |
25040 | if ((flag_N ^ flag_V) & 0x80) |
25041 | { |
25042 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25043 | m68kcontext.io_cycle_counter -= 2; |
25044 | } |
25045 | RET(8) |
25046 | } |
25047 | |
25048 | // BCC |
25049 | OPCODE(0x6E01) |
25050 | { |
25051 | u32 adr, res; |
25052 | u32 src, dst; |
25053 | |
25054 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25055 | { |
25056 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25057 | m68kcontext.io_cycle_counter -= 2; |
25058 | } |
25059 | RET(8) |
25060 | } |
25061 | |
25062 | // BCC |
25063 | OPCODE(0x6F01) |
25064 | { |
25065 | u32 adr, res; |
25066 | u32 src, dst; |
25067 | |
25068 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25069 | { |
25070 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25071 | m68kcontext.io_cycle_counter -= 2; |
25072 | } |
25073 | RET(8) |
25074 | } |
25075 | |
25076 | // BCC16 |
25077 | OPCODE(0x6200) |
25078 | { |
25079 | u32 adr, res; |
25080 | u32 src, dst; |
25081 | |
25082 | if (flag_NotZ && (!(flag_C & 0x100))) |
25083 | { |
25084 | u32 newPC; |
25085 | |
25086 | newPC = (u32)(PC) - BasePC; |
25087 | newPC += GET_SWORD; |
25088 | SET_PC(newPC); |
25089 | CHECK_BRANCH_EXCEPTION(newPC) |
25090 | RET(10) |
25091 | } |
25092 | PC++; |
25093 | RET(12) |
25094 | } |
25095 | |
25096 | // BCC16 |
25097 | OPCODE(0x6300) |
25098 | { |
25099 | u32 adr, res; |
25100 | u32 src, dst; |
25101 | |
25102 | if ((!flag_NotZ) || (flag_C & 0x100)) |
25103 | { |
25104 | u32 newPC; |
25105 | |
25106 | newPC = (u32)(PC) - BasePC; |
25107 | newPC += GET_SWORD; |
25108 | SET_PC(newPC); |
25109 | CHECK_BRANCH_EXCEPTION(newPC) |
25110 | RET(10) |
25111 | } |
25112 | PC++; |
25113 | RET(12) |
25114 | } |
25115 | |
25116 | // BCC16 |
25117 | OPCODE(0x6400) |
25118 | { |
25119 | u32 adr, res; |
25120 | u32 src, dst; |
25121 | |
25122 | if (!(flag_C & 0x100)) |
25123 | { |
25124 | u32 newPC; |
25125 | |
25126 | newPC = (u32)(PC) - BasePC; |
25127 | newPC += GET_SWORD; |
25128 | SET_PC(newPC); |
25129 | CHECK_BRANCH_EXCEPTION(newPC) |
25130 | RET(10) |
25131 | } |
25132 | PC++; |
25133 | RET(12) |
25134 | } |
25135 | |
25136 | // BCC16 |
25137 | OPCODE(0x6500) |
25138 | { |
25139 | u32 adr, res; |
25140 | u32 src, dst; |
25141 | |
25142 | if (flag_C & 0x100) |
25143 | { |
25144 | u32 newPC; |
25145 | |
25146 | newPC = (u32)(PC) - BasePC; |
25147 | newPC += GET_SWORD; |
25148 | SET_PC(newPC); |
25149 | CHECK_BRANCH_EXCEPTION(newPC) |
25150 | RET(10) |
25151 | } |
25152 | PC++; |
25153 | RET(12) |
25154 | } |
25155 | |
25156 | // BCC16 |
25157 | OPCODE(0x6600) |
25158 | { |
25159 | u32 adr, res; |
25160 | u32 src, dst; |
25161 | |
25162 | if (flag_NotZ) |
25163 | { |
25164 | u32 newPC; |
25165 | |
25166 | newPC = (u32)(PC) - BasePC; |
25167 | newPC += GET_SWORD; |
25168 | SET_PC(newPC); |
25169 | CHECK_BRANCH_EXCEPTION(newPC) |
25170 | RET(10) |
25171 | } |
25172 | PC++; |
25173 | RET(12) |
25174 | } |
25175 | |
25176 | // BCC16 |
25177 | OPCODE(0x6700) |
25178 | { |
25179 | u32 adr, res; |
25180 | u32 src, dst; |
25181 | |
25182 | if (!flag_NotZ) |
25183 | { |
25184 | u32 newPC; |
25185 | |
25186 | newPC = (u32)(PC) - BasePC; |
25187 | newPC += GET_SWORD; |
25188 | SET_PC(newPC); |
25189 | CHECK_BRANCH_EXCEPTION(newPC) |
25190 | RET(10) |
25191 | } |
25192 | PC++; |
25193 | RET(12) |
25194 | } |
25195 | |
25196 | // BCC16 |
25197 | OPCODE(0x6800) |
25198 | { |
25199 | u32 adr, res; |
25200 | u32 src, dst; |
25201 | |
25202 | if (!(flag_V & 0x80)) |
25203 | { |
25204 | u32 newPC; |
25205 | |
25206 | newPC = (u32)(PC) - BasePC; |
25207 | newPC += GET_SWORD; |
25208 | SET_PC(newPC); |
25209 | CHECK_BRANCH_EXCEPTION(newPC) |
25210 | RET(10) |
25211 | } |
25212 | PC++; |
25213 | RET(12) |
25214 | } |
25215 | |
25216 | // BCC16 |
25217 | OPCODE(0x6900) |
25218 | { |
25219 | u32 adr, res; |
25220 | u32 src, dst; |
25221 | |
25222 | if (flag_V & 0x80) |
25223 | { |
25224 | u32 newPC; |
25225 | |
25226 | newPC = (u32)(PC) - BasePC; |
25227 | newPC += GET_SWORD; |
25228 | SET_PC(newPC); |
25229 | CHECK_BRANCH_EXCEPTION(newPC) |
25230 | RET(10) |
25231 | } |
25232 | PC++; |
25233 | RET(12) |
25234 | } |
25235 | |
25236 | // BCC16 |
25237 | OPCODE(0x6A00) |
25238 | { |
25239 | u32 adr, res; |
25240 | u32 src, dst; |
25241 | |
25242 | if (!(flag_N & 0x80)) |
25243 | { |
25244 | u32 newPC; |
25245 | |
25246 | newPC = (u32)(PC) - BasePC; |
25247 | newPC += GET_SWORD; |
25248 | SET_PC(newPC); |
25249 | CHECK_BRANCH_EXCEPTION(newPC) |
25250 | RET(10) |
25251 | } |
25252 | PC++; |
25253 | RET(12) |
25254 | } |
25255 | |
25256 | // BCC16 |
25257 | OPCODE(0x6B00) |
25258 | { |
25259 | u32 adr, res; |
25260 | u32 src, dst; |
25261 | |
25262 | if (flag_N & 0x80) |
25263 | { |
25264 | u32 newPC; |
25265 | |
25266 | newPC = (u32)(PC) - BasePC; |
25267 | newPC += GET_SWORD; |
25268 | SET_PC(newPC); |
25269 | CHECK_BRANCH_EXCEPTION(newPC) |
25270 | RET(10) |
25271 | } |
25272 | PC++; |
25273 | RET(12) |
25274 | } |
25275 | |
25276 | // BCC16 |
25277 | OPCODE(0x6C00) |
25278 | { |
25279 | u32 adr, res; |
25280 | u32 src, dst; |
25281 | |
25282 | if (!((flag_N ^ flag_V) & 0x80)) |
25283 | { |
25284 | u32 newPC; |
25285 | |
25286 | newPC = (u32)(PC) - BasePC; |
25287 | newPC += GET_SWORD; |
25288 | SET_PC(newPC); |
25289 | CHECK_BRANCH_EXCEPTION(newPC) |
25290 | RET(10) |
25291 | } |
25292 | PC++; |
25293 | RET(12) |
25294 | } |
25295 | |
25296 | // BCC16 |
25297 | OPCODE(0x6D00) |
25298 | { |
25299 | u32 adr, res; |
25300 | u32 src, dst; |
25301 | |
25302 | if ((flag_N ^ flag_V) & 0x80) |
25303 | { |
25304 | u32 newPC; |
25305 | |
25306 | newPC = (u32)(PC) - BasePC; |
25307 | newPC += GET_SWORD; |
25308 | SET_PC(newPC); |
25309 | CHECK_BRANCH_EXCEPTION(newPC) |
25310 | RET(10) |
25311 | } |
25312 | PC++; |
25313 | RET(12) |
25314 | } |
25315 | |
25316 | // BCC16 |
25317 | OPCODE(0x6E00) |
25318 | { |
25319 | u32 adr, res; |
25320 | u32 src, dst; |
25321 | |
25322 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25323 | { |
25324 | u32 newPC; |
25325 | |
25326 | newPC = (u32)(PC) - BasePC; |
25327 | newPC += GET_SWORD; |
25328 | SET_PC(newPC); |
25329 | CHECK_BRANCH_EXCEPTION(newPC) |
25330 | RET(10) |
25331 | } |
25332 | PC++; |
25333 | RET(12) |
25334 | } |
25335 | |
25336 | // BCC16 |
25337 | OPCODE(0x6F00) |
25338 | { |
25339 | u32 adr, res; |
25340 | u32 src, dst; |
25341 | |
25342 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25343 | { |
25344 | u32 newPC; |
25345 | |
25346 | newPC = (u32)(PC) - BasePC; |
25347 | newPC += GET_SWORD; |
25348 | SET_PC(newPC); |
25349 | CHECK_BRANCH_EXCEPTION(newPC) |
25350 | RET(10) |
25351 | } |
25352 | PC++; |
25353 | RET(12) |
25354 | } |
25355 | |
25356 | // BRA |
25357 | OPCODE(0x6001) |
25358 | { |
25359 | #ifdef FAMEC_CHECK_BRANCHES |
25360 | u32 newPC = (u32)(PC) - BasePC; |
25361 | s8 offs=Opcode; |
25362 | newPC += offs; |
25363 | SET_PC(newPC); |
25364 | CHECK_BRANCH_EXCEPTION(offs) |
25365 | #else |
25366 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25367 | #endif |
25368 | RET(10) |
25369 | } |
25370 | |
25371 | // BRA16 |
25372 | OPCODE(0x6000) |
25373 | { |
25374 | u32 adr, res; |
25375 | u32 src, dst; |
25376 | |
25377 | { |
25378 | u32 newPC; |
25379 | |
25380 | newPC = (u32)(PC) - BasePC; |
25381 | newPC += GET_SWORD; |
25382 | SET_PC(newPC); |
25383 | CHECK_BRANCH_EXCEPTION(newPC) |
25384 | } |
25385 | RET(10) |
25386 | } |
25387 | |
25388 | // BSR |
25389 | OPCODE(0x6101) |
25390 | { |
25391 | u32 adr, res; |
25392 | u32 src, dst; |
25393 | u32 oldPC; |
25394 | s8 offs; |
25395 | |
25396 | PRE_IO |
25397 | |
25398 | oldPC = (u32)(PC) - BasePC; |
25399 | PUSH_32_F(oldPC) |
25400 | #ifdef FAMEC_CHECK_BRANCHES |
25401 | offs = Opcode; |
25402 | oldPC += offs; |
25403 | SET_PC(oldPC); |
25404 | CHECK_BRANCH_EXCEPTION(offs) |
25405 | #else |
25406 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25407 | #endif |
25408 | POST_IO |
25409 | RET(18) |
25410 | } |
25411 | |
25412 | // BSR16 |
25413 | OPCODE(0x6100) |
25414 | { |
25415 | u32 adr, res; |
25416 | u32 src, dst; |
25417 | |
25418 | PRE_IO |
25419 | { |
25420 | u32 oldPC, newPC; |
25421 | |
25422 | newPC = (u32)(PC) - BasePC; |
25423 | oldPC = newPC + 2; |
25424 | PUSH_32_F(oldPC) |
25425 | newPC += GET_SWORD; |
25426 | SET_PC(newPC); |
25427 | CHECK_BRANCH_EXCEPTION(newPC) |
25428 | } |
25429 | POST_IO |
25430 | RET(18) |
25431 | } |
25432 | |
25433 | // MOVEQ |
25434 | OPCODE(0x7000) |
25435 | { |
25436 | u32 adr, res; |
25437 | u32 src, dst; |
25438 | |
25439 | res = (s32)(s8)Opcode; |
25440 | flag_C = flag_V = 0; |
25441 | flag_N = flag_NotZ = res; |
25442 | DREGu32((Opcode >> 9) & 7) = res; |
25443 | RET(4) |
25444 | } |
25445 | |
25446 | // ORaD |
25447 | OPCODE(0x8000) |
25448 | { |
25449 | u32 adr, res; |
25450 | u32 src, dst; |
25451 | |
25452 | src = DREGu8((Opcode >> 0) & 7); |
25453 | res = DREGu8((Opcode >> 9) & 7); |
25454 | res |= src; |
25455 | flag_C = 0; |
25456 | flag_V = 0; |
25457 | flag_NotZ = res; |
25458 | flag_N = res; |
25459 | DREGu8((Opcode >> 9) & 7) = res; |
25460 | RET(4) |
25461 | } |
25462 | |
25463 | // ORaD |
25464 | OPCODE(0x8010) |
25465 | { |
25466 | u32 adr, res; |
25467 | u32 src, dst; |
25468 | |
25469 | adr = AREG((Opcode >> 0) & 7); |
25470 | PRE_IO |
25471 | READ_BYTE_F(adr, src) |
25472 | res = DREGu8((Opcode >> 9) & 7); |
25473 | res |= src; |
25474 | flag_C = 0; |
25475 | flag_V = 0; |
25476 | flag_NotZ = res; |
25477 | flag_N = res; |
25478 | DREGu8((Opcode >> 9) & 7) = res; |
25479 | POST_IO |
25480 | RET(8) |
25481 | } |
25482 | |
25483 | // ORaD |
25484 | OPCODE(0x8018) |
25485 | { |
25486 | u32 adr, res; |
25487 | u32 src, dst; |
25488 | |
25489 | adr = AREG((Opcode >> 0) & 7); |
25490 | AREG((Opcode >> 0) & 7) += 1; |
25491 | PRE_IO |
25492 | READ_BYTE_F(adr, src) |
25493 | res = DREGu8((Opcode >> 9) & 7); |
25494 | res |= src; |
25495 | flag_C = 0; |
25496 | flag_V = 0; |
25497 | flag_NotZ = res; |
25498 | flag_N = res; |
25499 | DREGu8((Opcode >> 9) & 7) = res; |
25500 | POST_IO |
25501 | RET(8) |
25502 | } |
25503 | |
25504 | // ORaD |
25505 | OPCODE(0x8020) |
25506 | { |
25507 | u32 adr, res; |
25508 | u32 src, dst; |
25509 | |
25510 | adr = AREG((Opcode >> 0) & 7) - 1; |
25511 | AREG((Opcode >> 0) & 7) = adr; |
25512 | PRE_IO |
25513 | READ_BYTE_F(adr, src) |
25514 | res = DREGu8((Opcode >> 9) & 7); |
25515 | res |= src; |
25516 | flag_C = 0; |
25517 | flag_V = 0; |
25518 | flag_NotZ = res; |
25519 | flag_N = res; |
25520 | DREGu8((Opcode >> 9) & 7) = res; |
25521 | POST_IO |
25522 | RET(10) |
25523 | } |
25524 | |
25525 | // ORaD |
25526 | OPCODE(0x8028) |
25527 | { |
25528 | u32 adr, res; |
25529 | u32 src, dst; |
25530 | |
25531 | FETCH_SWORD(adr); |
25532 | adr += AREG((Opcode >> 0) & 7); |
25533 | PRE_IO |
25534 | READ_BYTE_F(adr, src) |
25535 | res = DREGu8((Opcode >> 9) & 7); |
25536 | res |= src; |
25537 | flag_C = 0; |
25538 | flag_V = 0; |
25539 | flag_NotZ = res; |
25540 | flag_N = res; |
25541 | DREGu8((Opcode >> 9) & 7) = res; |
25542 | POST_IO |
25543 | RET(12) |
25544 | } |
25545 | |
25546 | // ORaD |
25547 | OPCODE(0x8030) |
25548 | { |
25549 | u32 adr, res; |
25550 | u32 src, dst; |
25551 | |
25552 | adr = AREG((Opcode >> 0) & 7); |
25553 | DECODE_EXT_WORD |
25554 | PRE_IO |
25555 | READ_BYTE_F(adr, src) |
25556 | res = DREGu8((Opcode >> 9) & 7); |
25557 | res |= src; |
25558 | flag_C = 0; |
25559 | flag_V = 0; |
25560 | flag_NotZ = res; |
25561 | flag_N = res; |
25562 | DREGu8((Opcode >> 9) & 7) = res; |
25563 | POST_IO |
25564 | RET(14) |
25565 | } |
25566 | |
25567 | // ORaD |
25568 | OPCODE(0x8038) |
25569 | { |
25570 | u32 adr, res; |
25571 | u32 src, dst; |
25572 | |
25573 | FETCH_SWORD(adr); |
25574 | PRE_IO |
25575 | READ_BYTE_F(adr, src) |
25576 | res = DREGu8((Opcode >> 9) & 7); |
25577 | res |= src; |
25578 | flag_C = 0; |
25579 | flag_V = 0; |
25580 | flag_NotZ = res; |
25581 | flag_N = res; |
25582 | DREGu8((Opcode >> 9) & 7) = res; |
25583 | POST_IO |
25584 | RET(12) |
25585 | } |
25586 | |
25587 | // ORaD |
25588 | OPCODE(0x8039) |
25589 | { |
25590 | u32 adr, res; |
25591 | u32 src, dst; |
25592 | |
25593 | FETCH_LONG(adr); |
25594 | PRE_IO |
25595 | READ_BYTE_F(adr, src) |
25596 | res = DREGu8((Opcode >> 9) & 7); |
25597 | res |= src; |
25598 | flag_C = 0; |
25599 | flag_V = 0; |
25600 | flag_NotZ = res; |
25601 | flag_N = res; |
25602 | DREGu8((Opcode >> 9) & 7) = res; |
25603 | POST_IO |
25604 | RET(16) |
25605 | } |
25606 | |
25607 | // ORaD |
25608 | OPCODE(0x803A) |
25609 | { |
25610 | u32 adr, res; |
25611 | u32 src, dst; |
25612 | |
25613 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
25614 | PC++; |
25615 | PRE_IO |
25616 | READ_BYTE_F(adr, src) |
25617 | res = DREGu8((Opcode >> 9) & 7); |
25618 | res |= src; |
25619 | flag_C = 0; |
25620 | flag_V = 0; |
25621 | flag_NotZ = res; |
25622 | flag_N = res; |
25623 | DREGu8((Opcode >> 9) & 7) = res; |
25624 | POST_IO |
25625 | RET(12) |
25626 | } |
25627 | |
25628 | // ORaD |
25629 | OPCODE(0x803B) |
25630 | { |
25631 | u32 adr, res; |
25632 | u32 src, dst; |
25633 | |
25634 | adr = (u32)(PC) - BasePC; |
25635 | DECODE_EXT_WORD |
25636 | PRE_IO |
25637 | READ_BYTE_F(adr, src) |
25638 | res = DREGu8((Opcode >> 9) & 7); |
25639 | res |= src; |
25640 | flag_C = 0; |
25641 | flag_V = 0; |
25642 | flag_NotZ = res; |
25643 | flag_N = res; |
25644 | DREGu8((Opcode >> 9) & 7) = res; |
25645 | POST_IO |
25646 | RET(14) |
25647 | } |
25648 | |
25649 | // ORaD |
25650 | OPCODE(0x803C) |
25651 | { |
25652 | u32 adr, res; |
25653 | u32 src, dst; |
25654 | |
25655 | FETCH_BYTE(src); |
25656 | res = DREGu8((Opcode >> 9) & 7); |
25657 | res |= src; |
25658 | flag_C = 0; |
25659 | flag_V = 0; |
25660 | flag_NotZ = res; |
25661 | flag_N = res; |
25662 | DREGu8((Opcode >> 9) & 7) = res; |
25663 | RET(8) |
25664 | } |
25665 | |
25666 | // ORaD |
25667 | OPCODE(0x801F) |
25668 | { |
25669 | u32 adr, res; |
25670 | u32 src, dst; |
25671 | |
25672 | adr = AREG(7); |
25673 | AREG(7) += 2; |
25674 | PRE_IO |
25675 | READ_BYTE_F(adr, src) |
25676 | res = DREGu8((Opcode >> 9) & 7); |
25677 | res |= src; |
25678 | flag_C = 0; |
25679 | flag_V = 0; |
25680 | flag_NotZ = res; |
25681 | flag_N = res; |
25682 | DREGu8((Opcode >> 9) & 7) = res; |
25683 | POST_IO |
25684 | RET(8) |
25685 | } |
25686 | |
25687 | // ORaD |
25688 | OPCODE(0x8027) |
25689 | { |
25690 | u32 adr, res; |
25691 | u32 src, dst; |
25692 | |
25693 | adr = AREG(7) - 2; |
25694 | AREG(7) = adr; |
25695 | PRE_IO |
25696 | READ_BYTE_F(adr, src) |
25697 | res = DREGu8((Opcode >> 9) & 7); |
25698 | res |= src; |
25699 | flag_C = 0; |
25700 | flag_V = 0; |
25701 | flag_NotZ = res; |
25702 | flag_N = res; |
25703 | DREGu8((Opcode >> 9) & 7) = res; |
25704 | POST_IO |
25705 | RET(10) |
25706 | } |
25707 | |
25708 | // ORaD |
25709 | OPCODE(0x8040) |
25710 | { |
25711 | u32 adr, res; |
25712 | u32 src, dst; |
25713 | |
25714 | src = DREGu16((Opcode >> 0) & 7); |
25715 | res = DREGu16((Opcode >> 9) & 7); |
25716 | res |= src; |
25717 | flag_C = 0; |
25718 | flag_V = 0; |
25719 | flag_NotZ = res; |
25720 | flag_N = res >> 8; |
25721 | DREGu16((Opcode >> 9) & 7) = res; |
25722 | RET(4) |
25723 | } |
25724 | |
25725 | // ORaD |
25726 | OPCODE(0x8050) |
25727 | { |
25728 | u32 adr, res; |
25729 | u32 src, dst; |
25730 | |
25731 | adr = AREG((Opcode >> 0) & 7); |
25732 | PRE_IO |
25733 | READ_WORD_F(adr, src) |
25734 | res = DREGu16((Opcode >> 9) & 7); |
25735 | res |= src; |
25736 | flag_C = 0; |
25737 | flag_V = 0; |
25738 | flag_NotZ = res; |
25739 | flag_N = res >> 8; |
25740 | DREGu16((Opcode >> 9) & 7) = res; |
25741 | POST_IO |
25742 | RET(8) |
25743 | } |
25744 | |
25745 | // ORaD |
25746 | OPCODE(0x8058) |
25747 | { |
25748 | u32 adr, res; |
25749 | u32 src, dst; |
25750 | |
25751 | adr = AREG((Opcode >> 0) & 7); |
25752 | AREG((Opcode >> 0) & 7) += 2; |
25753 | PRE_IO |
25754 | READ_WORD_F(adr, src) |
25755 | res = DREGu16((Opcode >> 9) & 7); |
25756 | res |= src; |
25757 | flag_C = 0; |
25758 | flag_V = 0; |
25759 | flag_NotZ = res; |
25760 | flag_N = res >> 8; |
25761 | DREGu16((Opcode >> 9) & 7) = res; |
25762 | POST_IO |
25763 | RET(8) |
25764 | } |
25765 | |
25766 | // ORaD |
25767 | OPCODE(0x8060) |
25768 | { |
25769 | u32 adr, res; |
25770 | u32 src, dst; |
25771 | |
25772 | adr = AREG((Opcode >> 0) & 7) - 2; |
25773 | AREG((Opcode >> 0) & 7) = adr; |
25774 | PRE_IO |
25775 | READ_WORD_F(adr, src) |
25776 | res = DREGu16((Opcode >> 9) & 7); |
25777 | res |= src; |
25778 | flag_C = 0; |
25779 | flag_V = 0; |
25780 | flag_NotZ = res; |
25781 | flag_N = res >> 8; |
25782 | DREGu16((Opcode >> 9) & 7) = res; |
25783 | POST_IO |
25784 | RET(10) |
25785 | } |
25786 | |
25787 | // ORaD |
25788 | OPCODE(0x8068) |
25789 | { |
25790 | u32 adr, res; |
25791 | u32 src, dst; |
25792 | |
25793 | FETCH_SWORD(adr); |
25794 | adr += AREG((Opcode >> 0) & 7); |
25795 | PRE_IO |
25796 | READ_WORD_F(adr, src) |
25797 | res = DREGu16((Opcode >> 9) & 7); |
25798 | res |= src; |
25799 | flag_C = 0; |
25800 | flag_V = 0; |
25801 | flag_NotZ = res; |
25802 | flag_N = res >> 8; |
25803 | DREGu16((Opcode >> 9) & 7) = res; |
25804 | POST_IO |
25805 | RET(12) |
25806 | } |
25807 | |
25808 | // ORaD |
25809 | OPCODE(0x8070) |
25810 | { |
25811 | u32 adr, res; |
25812 | u32 src, dst; |
25813 | |
25814 | adr = AREG((Opcode >> 0) & 7); |
25815 | DECODE_EXT_WORD |
25816 | PRE_IO |
25817 | READ_WORD_F(adr, src) |
25818 | res = DREGu16((Opcode >> 9) & 7); |
25819 | res |= src; |
25820 | flag_C = 0; |
25821 | flag_V = 0; |
25822 | flag_NotZ = res; |
25823 | flag_N = res >> 8; |
25824 | DREGu16((Opcode >> 9) & 7) = res; |
25825 | POST_IO |
25826 | RET(14) |
25827 | } |
25828 | |
25829 | // ORaD |
25830 | OPCODE(0x8078) |
25831 | { |
25832 | u32 adr, res; |
25833 | u32 src, dst; |
25834 | |
25835 | FETCH_SWORD(adr); |
25836 | PRE_IO |
25837 | READ_WORD_F(adr, src) |
25838 | res = DREGu16((Opcode >> 9) & 7); |
25839 | res |= src; |
25840 | flag_C = 0; |
25841 | flag_V = 0; |
25842 | flag_NotZ = res; |
25843 | flag_N = res >> 8; |
25844 | DREGu16((Opcode >> 9) & 7) = res; |
25845 | POST_IO |
25846 | RET(12) |
25847 | } |
25848 | |
25849 | // ORaD |
25850 | OPCODE(0x8079) |
25851 | { |
25852 | u32 adr, res; |
25853 | u32 src, dst; |
25854 | |
25855 | FETCH_LONG(adr); |
25856 | PRE_IO |
25857 | READ_WORD_F(adr, src) |
25858 | res = DREGu16((Opcode >> 9) & 7); |
25859 | res |= src; |
25860 | flag_C = 0; |
25861 | flag_V = 0; |
25862 | flag_NotZ = res; |
25863 | flag_N = res >> 8; |
25864 | DREGu16((Opcode >> 9) & 7) = res; |
25865 | POST_IO |
25866 | RET(16) |
25867 | } |
25868 | |
25869 | // ORaD |
25870 | OPCODE(0x807A) |
25871 | { |
25872 | u32 adr, res; |
25873 | u32 src, dst; |
25874 | |
25875 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
25876 | PC++; |
25877 | PRE_IO |
25878 | READ_WORD_F(adr, src) |
25879 | res = DREGu16((Opcode >> 9) & 7); |
25880 | res |= src; |
25881 | flag_C = 0; |
25882 | flag_V = 0; |
25883 | flag_NotZ = res; |
25884 | flag_N = res >> 8; |
25885 | DREGu16((Opcode >> 9) & 7) = res; |
25886 | POST_IO |
25887 | RET(12) |
25888 | } |
25889 | |
25890 | // ORaD |
25891 | OPCODE(0x807B) |
25892 | { |
25893 | u32 adr, res; |
25894 | u32 src, dst; |
25895 | |
25896 | adr = (u32)(PC) - BasePC; |
25897 | DECODE_EXT_WORD |
25898 | PRE_IO |
25899 | READ_WORD_F(adr, src) |
25900 | res = DREGu16((Opcode >> 9) & 7); |
25901 | res |= src; |
25902 | flag_C = 0; |
25903 | flag_V = 0; |
25904 | flag_NotZ = res; |
25905 | flag_N = res >> 8; |
25906 | DREGu16((Opcode >> 9) & 7) = res; |
25907 | POST_IO |
25908 | RET(14) |
25909 | } |
25910 | |
25911 | // ORaD |
25912 | OPCODE(0x807C) |
25913 | { |
25914 | u32 adr, res; |
25915 | u32 src, dst; |
25916 | |
25917 | FETCH_WORD(src); |
25918 | res = DREGu16((Opcode >> 9) & 7); |
25919 | res |= src; |
25920 | flag_C = 0; |
25921 | flag_V = 0; |
25922 | flag_NotZ = res; |
25923 | flag_N = res >> 8; |
25924 | DREGu16((Opcode >> 9) & 7) = res; |
25925 | RET(8) |
25926 | } |
25927 | |
25928 | // ORaD |
25929 | OPCODE(0x805F) |
25930 | { |
25931 | u32 adr, res; |
25932 | u32 src, dst; |
25933 | |
25934 | adr = AREG(7); |
25935 | AREG(7) += 2; |
25936 | PRE_IO |
25937 | READ_WORD_F(adr, src) |
25938 | res = DREGu16((Opcode >> 9) & 7); |
25939 | res |= src; |
25940 | flag_C = 0; |
25941 | flag_V = 0; |
25942 | flag_NotZ = res; |
25943 | flag_N = res >> 8; |
25944 | DREGu16((Opcode >> 9) & 7) = res; |
25945 | POST_IO |
25946 | RET(8) |
25947 | } |
25948 | |
25949 | // ORaD |
25950 | OPCODE(0x8067) |
25951 | { |
25952 | u32 adr, res; |
25953 | u32 src, dst; |
25954 | |
25955 | adr = AREG(7) - 2; |
25956 | AREG(7) = adr; |
25957 | PRE_IO |
25958 | READ_WORD_F(adr, src) |
25959 | res = DREGu16((Opcode >> 9) & 7); |
25960 | res |= src; |
25961 | flag_C = 0; |
25962 | flag_V = 0; |
25963 | flag_NotZ = res; |
25964 | flag_N = res >> 8; |
25965 | DREGu16((Opcode >> 9) & 7) = res; |
25966 | POST_IO |
25967 | RET(10) |
25968 | } |
25969 | |
25970 | // ORaD |
25971 | OPCODE(0x8080) |
25972 | { |
25973 | u32 adr, res; |
25974 | u32 src, dst; |
25975 | |
25976 | src = DREGu32((Opcode >> 0) & 7); |
25977 | res = DREGu32((Opcode >> 9) & 7); |
25978 | res |= src; |
25979 | flag_C = 0; |
25980 | flag_V = 0; |
25981 | flag_NotZ = res; |
25982 | flag_N = res >> 24; |
25983 | DREGu32((Opcode >> 9) & 7) = res; |
25984 | RET(8) |
25985 | } |
25986 | |
25987 | // ORaD |
25988 | OPCODE(0x8090) |
25989 | { |
25990 | u32 adr, res; |
25991 | u32 src, dst; |
25992 | |
25993 | adr = AREG((Opcode >> 0) & 7); |
25994 | PRE_IO |
25995 | READ_LONG_F(adr, src) |
25996 | res = DREGu32((Opcode >> 9) & 7); |
25997 | res |= src; |
25998 | flag_C = 0; |
25999 | flag_V = 0; |
26000 | flag_NotZ = res; |
26001 | flag_N = res >> 24; |
26002 | DREGu32((Opcode >> 9) & 7) = res; |
26003 | POST_IO |
26004 | RET(14) |
26005 | } |
26006 | |
26007 | // ORaD |
26008 | OPCODE(0x8098) |
26009 | { |
26010 | u32 adr, res; |
26011 | u32 src, dst; |
26012 | |
26013 | adr = AREG((Opcode >> 0) & 7); |
26014 | AREG((Opcode >> 0) & 7) += 4; |
26015 | PRE_IO |
26016 | READ_LONG_F(adr, src) |
26017 | res = DREGu32((Opcode >> 9) & 7); |
26018 | res |= src; |
26019 | flag_C = 0; |
26020 | flag_V = 0; |
26021 | flag_NotZ = res; |
26022 | flag_N = res >> 24; |
26023 | DREGu32((Opcode >> 9) & 7) = res; |
26024 | POST_IO |
26025 | RET(14) |
26026 | } |
26027 | |
26028 | // ORaD |
26029 | OPCODE(0x80A0) |
26030 | { |
26031 | u32 adr, res; |
26032 | u32 src, dst; |
26033 | |
26034 | adr = AREG((Opcode >> 0) & 7) - 4; |
26035 | AREG((Opcode >> 0) & 7) = adr; |
26036 | PRE_IO |
26037 | READ_LONG_F(adr, src) |
26038 | res = DREGu32((Opcode >> 9) & 7); |
26039 | res |= src; |
26040 | flag_C = 0; |
26041 | flag_V = 0; |
26042 | flag_NotZ = res; |
26043 | flag_N = res >> 24; |
26044 | DREGu32((Opcode >> 9) & 7) = res; |
26045 | POST_IO |
26046 | RET(16) |
26047 | } |
26048 | |
26049 | // ORaD |
26050 | OPCODE(0x80A8) |
26051 | { |
26052 | u32 adr, res; |
26053 | u32 src, dst; |
26054 | |
26055 | FETCH_SWORD(adr); |
26056 | adr += AREG((Opcode >> 0) & 7); |
26057 | PRE_IO |
26058 | READ_LONG_F(adr, src) |
26059 | res = DREGu32((Opcode >> 9) & 7); |
26060 | res |= src; |
26061 | flag_C = 0; |
26062 | flag_V = 0; |
26063 | flag_NotZ = res; |
26064 | flag_N = res >> 24; |
26065 | DREGu32((Opcode >> 9) & 7) = res; |
26066 | POST_IO |
26067 | RET(18) |
26068 | } |
26069 | |
26070 | // ORaD |
26071 | OPCODE(0x80B0) |
26072 | { |
26073 | u32 adr, res; |
26074 | u32 src, dst; |
26075 | |
26076 | adr = AREG((Opcode >> 0) & 7); |
26077 | DECODE_EXT_WORD |
26078 | PRE_IO |
26079 | READ_LONG_F(adr, src) |
26080 | res = DREGu32((Opcode >> 9) & 7); |
26081 | res |= src; |
26082 | flag_C = 0; |
26083 | flag_V = 0; |
26084 | flag_NotZ = res; |
26085 | flag_N = res >> 24; |
26086 | DREGu32((Opcode >> 9) & 7) = res; |
26087 | POST_IO |
26088 | RET(20) |
26089 | } |
26090 | |
26091 | // ORaD |
26092 | OPCODE(0x80B8) |
26093 | { |
26094 | u32 adr, res; |
26095 | u32 src, dst; |
26096 | |
26097 | FETCH_SWORD(adr); |
26098 | PRE_IO |
26099 | READ_LONG_F(adr, src) |
26100 | res = DREGu32((Opcode >> 9) & 7); |
26101 | res |= src; |
26102 | flag_C = 0; |
26103 | flag_V = 0; |
26104 | flag_NotZ = res; |
26105 | flag_N = res >> 24; |
26106 | DREGu32((Opcode >> 9) & 7) = res; |
26107 | POST_IO |
26108 | RET(18) |
26109 | } |
26110 | |
26111 | // ORaD |
26112 | OPCODE(0x80B9) |
26113 | { |
26114 | u32 adr, res; |
26115 | u32 src, dst; |
26116 | |
26117 | FETCH_LONG(adr); |
26118 | PRE_IO |
26119 | READ_LONG_F(adr, src) |
26120 | res = DREGu32((Opcode >> 9) & 7); |
26121 | res |= src; |
26122 | flag_C = 0; |
26123 | flag_V = 0; |
26124 | flag_NotZ = res; |
26125 | flag_N = res >> 24; |
26126 | DREGu32((Opcode >> 9) & 7) = res; |
26127 | POST_IO |
26128 | RET(22) |
26129 | } |
26130 | |
26131 | // ORaD |
26132 | OPCODE(0x80BA) |
26133 | { |
26134 | u32 adr, res; |
26135 | u32 src, dst; |
26136 | |
26137 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
26138 | PC++; |
26139 | PRE_IO |
26140 | READ_LONG_F(adr, src) |
26141 | res = DREGu32((Opcode >> 9) & 7); |
26142 | res |= src; |
26143 | flag_C = 0; |
26144 | flag_V = 0; |
26145 | flag_NotZ = res; |
26146 | flag_N = res >> 24; |
26147 | DREGu32((Opcode >> 9) & 7) = res; |
26148 | POST_IO |
26149 | RET(18) |
26150 | } |
26151 | |
26152 | // ORaD |
26153 | OPCODE(0x80BB) |
26154 | { |
26155 | u32 adr, res; |
26156 | u32 src, dst; |
26157 | |
26158 | adr = (u32)(PC) - BasePC; |
26159 | DECODE_EXT_WORD |
26160 | PRE_IO |
26161 | READ_LONG_F(adr, src) |
26162 | res = DREGu32((Opcode >> 9) & 7); |
26163 | res |= src; |
26164 | flag_C = 0; |
26165 | flag_V = 0; |
26166 | flag_NotZ = res; |
26167 | flag_N = res >> 24; |
26168 | DREGu32((Opcode >> 9) & 7) = res; |
26169 | POST_IO |
26170 | RET(20) |
26171 | } |
26172 | |
26173 | // ORaD |
26174 | OPCODE(0x80BC) |
26175 | { |
26176 | u32 adr, res; |
26177 | u32 src, dst; |
26178 | |
26179 | FETCH_LONG(src); |
26180 | res = DREGu32((Opcode >> 9) & 7); |
26181 | res |= src; |
26182 | flag_C = 0; |
26183 | flag_V = 0; |
26184 | flag_NotZ = res; |
26185 | flag_N = res >> 24; |
26186 | DREGu32((Opcode >> 9) & 7) = res; |
26187 | RET(16) |
26188 | } |
26189 | |
26190 | // ORaD |
26191 | OPCODE(0x809F) |
26192 | { |
26193 | u32 adr, res; |
26194 | u32 src, dst; |
26195 | |
26196 | adr = AREG(7); |
26197 | AREG(7) += 4; |
26198 | PRE_IO |
26199 | READ_LONG_F(adr, src) |
26200 | res = DREGu32((Opcode >> 9) & 7); |
26201 | res |= src; |
26202 | flag_C = 0; |
26203 | flag_V = 0; |
26204 | flag_NotZ = res; |
26205 | flag_N = res >> 24; |
26206 | DREGu32((Opcode >> 9) & 7) = res; |
26207 | POST_IO |
26208 | RET(14) |
26209 | } |
26210 | |
26211 | // ORaD |
26212 | OPCODE(0x80A7) |
26213 | { |
26214 | u32 adr, res; |
26215 | u32 src, dst; |
26216 | |
26217 | adr = AREG(7) - 4; |
26218 | AREG(7) = adr; |
26219 | PRE_IO |
26220 | READ_LONG_F(adr, src) |
26221 | res = DREGu32((Opcode >> 9) & 7); |
26222 | res |= src; |
26223 | flag_C = 0; |
26224 | flag_V = 0; |
26225 | flag_NotZ = res; |
26226 | flag_N = res >> 24; |
26227 | DREGu32((Opcode >> 9) & 7) = res; |
26228 | POST_IO |
26229 | RET(16) |
26230 | } |
26231 | |
26232 | // ORDa |
26233 | OPCODE(0x8110) |
26234 | { |
26235 | u32 adr, res; |
26236 | u32 src, dst; |
26237 | |
26238 | src = DREGu8((Opcode >> 9) & 7); |
26239 | adr = AREG((Opcode >> 0) & 7); |
26240 | PRE_IO |
26241 | READ_BYTE_F(adr, res) |
26242 | res |= src; |
26243 | flag_C = 0; |
26244 | flag_V = 0; |
26245 | flag_NotZ = res; |
26246 | flag_N = res; |
26247 | WRITE_BYTE_F(adr, res) |
26248 | POST_IO |
26249 | RET(12) |
26250 | } |
26251 | |
26252 | // ORDa |
26253 | OPCODE(0x8118) |
26254 | { |
26255 | u32 adr, res; |
26256 | u32 src, dst; |
26257 | |
26258 | src = DREGu8((Opcode >> 9) & 7); |
26259 | adr = AREG((Opcode >> 0) & 7); |
26260 | AREG((Opcode >> 0) & 7) += 1; |
26261 | PRE_IO |
26262 | READ_BYTE_F(adr, res) |
26263 | res |= src; |
26264 | flag_C = 0; |
26265 | flag_V = 0; |
26266 | flag_NotZ = res; |
26267 | flag_N = res; |
26268 | WRITE_BYTE_F(adr, res) |
26269 | POST_IO |
26270 | RET(12) |
26271 | } |
26272 | |
26273 | // ORDa |
26274 | OPCODE(0x8120) |
26275 | { |
26276 | u32 adr, res; |
26277 | u32 src, dst; |
26278 | |
26279 | src = DREGu8((Opcode >> 9) & 7); |
26280 | adr = AREG((Opcode >> 0) & 7) - 1; |
26281 | AREG((Opcode >> 0) & 7) = adr; |
26282 | PRE_IO |
26283 | READ_BYTE_F(adr, res) |
26284 | res |= src; |
26285 | flag_C = 0; |
26286 | flag_V = 0; |
26287 | flag_NotZ = res; |
26288 | flag_N = res; |
26289 | WRITE_BYTE_F(adr, res) |
26290 | POST_IO |
26291 | RET(14) |
26292 | } |
26293 | |
26294 | // ORDa |
26295 | OPCODE(0x8128) |
26296 | { |
26297 | u32 adr, res; |
26298 | u32 src, dst; |
26299 | |
26300 | src = DREGu8((Opcode >> 9) & 7); |
26301 | FETCH_SWORD(adr); |
26302 | adr += AREG((Opcode >> 0) & 7); |
26303 | PRE_IO |
26304 | READ_BYTE_F(adr, res) |
26305 | res |= src; |
26306 | flag_C = 0; |
26307 | flag_V = 0; |
26308 | flag_NotZ = res; |
26309 | flag_N = res; |
26310 | WRITE_BYTE_F(adr, res) |
26311 | POST_IO |
26312 | RET(16) |
26313 | } |
26314 | |
26315 | // ORDa |
26316 | OPCODE(0x8130) |
26317 | { |
26318 | u32 adr, res; |
26319 | u32 src, dst; |
26320 | |
26321 | src = DREGu8((Opcode >> 9) & 7); |
26322 | adr = AREG((Opcode >> 0) & 7); |
26323 | DECODE_EXT_WORD |
26324 | PRE_IO |
26325 | READ_BYTE_F(adr, res) |
26326 | res |= src; |
26327 | flag_C = 0; |
26328 | flag_V = 0; |
26329 | flag_NotZ = res; |
26330 | flag_N = res; |
26331 | WRITE_BYTE_F(adr, res) |
26332 | POST_IO |
26333 | RET(18) |
26334 | } |
26335 | |
26336 | // ORDa |
26337 | OPCODE(0x8138) |
26338 | { |
26339 | u32 adr, res; |
26340 | u32 src, dst; |
26341 | |
26342 | src = DREGu8((Opcode >> 9) & 7); |
26343 | FETCH_SWORD(adr); |
26344 | PRE_IO |
26345 | READ_BYTE_F(adr, res) |
26346 | res |= src; |
26347 | flag_C = 0; |
26348 | flag_V = 0; |
26349 | flag_NotZ = res; |
26350 | flag_N = res; |
26351 | WRITE_BYTE_F(adr, res) |
26352 | POST_IO |
26353 | RET(16) |
26354 | } |
26355 | |
26356 | // ORDa |
26357 | OPCODE(0x8139) |
26358 | { |
26359 | u32 adr, res; |
26360 | u32 src, dst; |
26361 | |
26362 | src = DREGu8((Opcode >> 9) & 7); |
26363 | FETCH_LONG(adr); |
26364 | PRE_IO |
26365 | READ_BYTE_F(adr, res) |
26366 | res |= src; |
26367 | flag_C = 0; |
26368 | flag_V = 0; |
26369 | flag_NotZ = res; |
26370 | flag_N = res; |
26371 | WRITE_BYTE_F(adr, res) |
26372 | POST_IO |
26373 | RET(20) |
26374 | } |
26375 | |
26376 | // ORDa |
26377 | OPCODE(0x811F) |
26378 | { |
26379 | u32 adr, res; |
26380 | u32 src, dst; |
26381 | |
26382 | src = DREGu8((Opcode >> 9) & 7); |
26383 | adr = AREG(7); |
26384 | AREG(7) += 2; |
26385 | PRE_IO |
26386 | READ_BYTE_F(adr, res) |
26387 | res |= src; |
26388 | flag_C = 0; |
26389 | flag_V = 0; |
26390 | flag_NotZ = res; |
26391 | flag_N = res; |
26392 | WRITE_BYTE_F(adr, res) |
26393 | POST_IO |
26394 | RET(12) |
26395 | } |
26396 | |
26397 | // ORDa |
26398 | OPCODE(0x8127) |
26399 | { |
26400 | u32 adr, res; |
26401 | u32 src, dst; |
26402 | |
26403 | src = DREGu8((Opcode >> 9) & 7); |
26404 | adr = AREG(7) - 2; |
26405 | AREG(7) = adr; |
26406 | PRE_IO |
26407 | READ_BYTE_F(adr, res) |
26408 | res |= src; |
26409 | flag_C = 0; |
26410 | flag_V = 0; |
26411 | flag_NotZ = res; |
26412 | flag_N = res; |
26413 | WRITE_BYTE_F(adr, res) |
26414 | POST_IO |
26415 | RET(14) |
26416 | } |
26417 | |
26418 | // ORDa |
26419 | OPCODE(0x8150) |
26420 | { |
26421 | u32 adr, res; |
26422 | u32 src, dst; |
26423 | |
26424 | src = DREGu16((Opcode >> 9) & 7); |
26425 | adr = AREG((Opcode >> 0) & 7); |
26426 | PRE_IO |
26427 | READ_WORD_F(adr, res) |
26428 | res |= src; |
26429 | flag_C = 0; |
26430 | flag_V = 0; |
26431 | flag_NotZ = res; |
26432 | flag_N = res >> 8; |
26433 | WRITE_WORD_F(adr, res) |
26434 | POST_IO |
26435 | RET(12) |
26436 | } |
26437 | |
26438 | // ORDa |
26439 | OPCODE(0x8158) |
26440 | { |
26441 | u32 adr, res; |
26442 | u32 src, dst; |
26443 | |
26444 | src = DREGu16((Opcode >> 9) & 7); |
26445 | adr = AREG((Opcode >> 0) & 7); |
26446 | AREG((Opcode >> 0) & 7) += 2; |
26447 | PRE_IO |
26448 | READ_WORD_F(adr, res) |
26449 | res |= src; |
26450 | flag_C = 0; |
26451 | flag_V = 0; |
26452 | flag_NotZ = res; |
26453 | flag_N = res >> 8; |
26454 | WRITE_WORD_F(adr, res) |
26455 | POST_IO |
26456 | RET(12) |
26457 | } |
26458 | |
26459 | // ORDa |
26460 | OPCODE(0x8160) |
26461 | { |
26462 | u32 adr, res; |
26463 | u32 src, dst; |
26464 | |
26465 | src = DREGu16((Opcode >> 9) & 7); |
26466 | adr = AREG((Opcode >> 0) & 7) - 2; |
26467 | AREG((Opcode >> 0) & 7) = adr; |
26468 | PRE_IO |
26469 | READ_WORD_F(adr, res) |
26470 | res |= src; |
26471 | flag_C = 0; |
26472 | flag_V = 0; |
26473 | flag_NotZ = res; |
26474 | flag_N = res >> 8; |
26475 | WRITE_WORD_F(adr, res) |
26476 | POST_IO |
26477 | RET(14) |
26478 | } |
26479 | |
26480 | // ORDa |
26481 | OPCODE(0x8168) |
26482 | { |
26483 | u32 adr, res; |
26484 | u32 src, dst; |
26485 | |
26486 | src = DREGu16((Opcode >> 9) & 7); |
26487 | FETCH_SWORD(adr); |
26488 | adr += AREG((Opcode >> 0) & 7); |
26489 | PRE_IO |
26490 | READ_WORD_F(adr, res) |
26491 | res |= src; |
26492 | flag_C = 0; |
26493 | flag_V = 0; |
26494 | flag_NotZ = res; |
26495 | flag_N = res >> 8; |
26496 | WRITE_WORD_F(adr, res) |
26497 | POST_IO |
26498 | RET(16) |
26499 | } |
26500 | |
26501 | // ORDa |
26502 | OPCODE(0x8170) |
26503 | { |
26504 | u32 adr, res; |
26505 | u32 src, dst; |
26506 | |
26507 | src = DREGu16((Opcode >> 9) & 7); |
26508 | adr = AREG((Opcode >> 0) & 7); |
26509 | DECODE_EXT_WORD |
26510 | PRE_IO |
26511 | READ_WORD_F(adr, res) |
26512 | res |= src; |
26513 | flag_C = 0; |
26514 | flag_V = 0; |
26515 | flag_NotZ = res; |
26516 | flag_N = res >> 8; |
26517 | WRITE_WORD_F(adr, res) |
26518 | POST_IO |
26519 | RET(18) |
26520 | } |
26521 | |
26522 | // ORDa |
26523 | OPCODE(0x8178) |
26524 | { |
26525 | u32 adr, res; |
26526 | u32 src, dst; |
26527 | |
26528 | src = DREGu16((Opcode >> 9) & 7); |
26529 | FETCH_SWORD(adr); |
26530 | PRE_IO |
26531 | READ_WORD_F(adr, res) |
26532 | res |= src; |
26533 | flag_C = 0; |
26534 | flag_V = 0; |
26535 | flag_NotZ = res; |
26536 | flag_N = res >> 8; |
26537 | WRITE_WORD_F(adr, res) |
26538 | POST_IO |
26539 | RET(16) |
26540 | } |
26541 | |
26542 | // ORDa |
26543 | OPCODE(0x8179) |
26544 | { |
26545 | u32 adr, res; |
26546 | u32 src, dst; |
26547 | |
26548 | src = DREGu16((Opcode >> 9) & 7); |
26549 | FETCH_LONG(adr); |
26550 | PRE_IO |
26551 | READ_WORD_F(adr, res) |
26552 | res |= src; |
26553 | flag_C = 0; |
26554 | flag_V = 0; |
26555 | flag_NotZ = res; |
26556 | flag_N = res >> 8; |
26557 | WRITE_WORD_F(adr, res) |
26558 | POST_IO |
26559 | RET(20) |
26560 | } |
26561 | |
26562 | // ORDa |
26563 | OPCODE(0x815F) |
26564 | { |
26565 | u32 adr, res; |
26566 | u32 src, dst; |
26567 | |
26568 | src = DREGu16((Opcode >> 9) & 7); |
26569 | adr = AREG(7); |
26570 | AREG(7) += 2; |
26571 | PRE_IO |
26572 | READ_WORD_F(adr, res) |
26573 | res |= src; |
26574 | flag_C = 0; |
26575 | flag_V = 0; |
26576 | flag_NotZ = res; |
26577 | flag_N = res >> 8; |
26578 | WRITE_WORD_F(adr, res) |
26579 | POST_IO |
26580 | RET(12) |
26581 | } |
26582 | |
26583 | // ORDa |
26584 | OPCODE(0x8167) |
26585 | { |
26586 | u32 adr, res; |
26587 | u32 src, dst; |
26588 | |
26589 | src = DREGu16((Opcode >> 9) & 7); |
26590 | adr = AREG(7) - 2; |
26591 | AREG(7) = adr; |
26592 | PRE_IO |
26593 | READ_WORD_F(adr, res) |
26594 | res |= src; |
26595 | flag_C = 0; |
26596 | flag_V = 0; |
26597 | flag_NotZ = res; |
26598 | flag_N = res >> 8; |
26599 | WRITE_WORD_F(adr, res) |
26600 | POST_IO |
26601 | RET(14) |
26602 | } |
26603 | |
26604 | // ORDa |
26605 | OPCODE(0x8190) |
26606 | { |
26607 | u32 adr, res; |
26608 | u32 src, dst; |
26609 | |
26610 | src = DREGu32((Opcode >> 9) & 7); |
26611 | adr = AREG((Opcode >> 0) & 7); |
26612 | PRE_IO |
26613 | READ_LONG_F(adr, res) |
26614 | res |= src; |
26615 | flag_C = 0; |
26616 | flag_V = 0; |
26617 | flag_NotZ = res; |
26618 | flag_N = res >> 24; |
26619 | WRITE_LONG_F(adr, res) |
26620 | POST_IO |
26621 | RET(20) |
26622 | } |
26623 | |
26624 | // ORDa |
26625 | OPCODE(0x8198) |
26626 | { |
26627 | u32 adr, res; |
26628 | u32 src, dst; |
26629 | |
26630 | src = DREGu32((Opcode >> 9) & 7); |
26631 | adr = AREG((Opcode >> 0) & 7); |
26632 | AREG((Opcode >> 0) & 7) += 4; |
26633 | PRE_IO |
26634 | READ_LONG_F(adr, res) |
26635 | res |= src; |
26636 | flag_C = 0; |
26637 | flag_V = 0; |
26638 | flag_NotZ = res; |
26639 | flag_N = res >> 24; |
26640 | WRITE_LONG_F(adr, res) |
26641 | POST_IO |
26642 | RET(20) |
26643 | } |
26644 | |
26645 | // ORDa |
26646 | OPCODE(0x81A0) |
26647 | { |
26648 | u32 adr, res; |
26649 | u32 src, dst; |
26650 | |
26651 | src = DREGu32((Opcode >> 9) & 7); |
26652 | adr = AREG((Opcode >> 0) & 7) - 4; |
26653 | AREG((Opcode >> 0) & 7) = adr; |
26654 | PRE_IO |
26655 | READ_LONG_F(adr, res) |
26656 | res |= src; |
26657 | flag_C = 0; |
26658 | flag_V = 0; |
26659 | flag_NotZ = res; |
26660 | flag_N = res >> 24; |
26661 | WRITE_LONG_F(adr, res) |
26662 | POST_IO |
26663 | RET(22) |
26664 | } |
26665 | |
26666 | // ORDa |
26667 | OPCODE(0x81A8) |
26668 | { |
26669 | u32 adr, res; |
26670 | u32 src, dst; |
26671 | |
26672 | src = DREGu32((Opcode >> 9) & 7); |
26673 | FETCH_SWORD(adr); |
26674 | adr += AREG((Opcode >> 0) & 7); |
26675 | PRE_IO |
26676 | READ_LONG_F(adr, res) |
26677 | res |= src; |
26678 | flag_C = 0; |
26679 | flag_V = 0; |
26680 | flag_NotZ = res; |
26681 | flag_N = res >> 24; |
26682 | WRITE_LONG_F(adr, res) |
26683 | POST_IO |
26684 | RET(24) |
26685 | } |
26686 | |
26687 | // ORDa |
26688 | OPCODE(0x81B0) |
26689 | { |
26690 | u32 adr, res; |
26691 | u32 src, dst; |
26692 | |
26693 | src = DREGu32((Opcode >> 9) & 7); |
26694 | adr = AREG((Opcode >> 0) & 7); |
26695 | DECODE_EXT_WORD |
26696 | PRE_IO |
26697 | READ_LONG_F(adr, res) |
26698 | res |= src; |
26699 | flag_C = 0; |
26700 | flag_V = 0; |
26701 | flag_NotZ = res; |
26702 | flag_N = res >> 24; |
26703 | WRITE_LONG_F(adr, res) |
26704 | POST_IO |
26705 | RET(26) |
26706 | } |
26707 | |
26708 | // ORDa |
26709 | OPCODE(0x81B8) |
26710 | { |
26711 | u32 adr, res; |
26712 | u32 src, dst; |
26713 | |
26714 | src = DREGu32((Opcode >> 9) & 7); |
26715 | FETCH_SWORD(adr); |
26716 | PRE_IO |
26717 | READ_LONG_F(adr, res) |
26718 | res |= src; |
26719 | flag_C = 0; |
26720 | flag_V = 0; |
26721 | flag_NotZ = res; |
26722 | flag_N = res >> 24; |
26723 | WRITE_LONG_F(adr, res) |
26724 | POST_IO |
26725 | RET(24) |
26726 | } |
26727 | |
26728 | // ORDa |
26729 | OPCODE(0x81B9) |
26730 | { |
26731 | u32 adr, res; |
26732 | u32 src, dst; |
26733 | |
26734 | src = DREGu32((Opcode >> 9) & 7); |
26735 | FETCH_LONG(adr); |
26736 | PRE_IO |
26737 | READ_LONG_F(adr, res) |
26738 | res |= src; |
26739 | flag_C = 0; |
26740 | flag_V = 0; |
26741 | flag_NotZ = res; |
26742 | flag_N = res >> 24; |
26743 | WRITE_LONG_F(adr, res) |
26744 | POST_IO |
26745 | RET(28) |
26746 | } |
26747 | |
26748 | // ORDa |
26749 | OPCODE(0x819F) |
26750 | { |
26751 | u32 adr, res; |
26752 | u32 src, dst; |
26753 | |
26754 | src = DREGu32((Opcode >> 9) & 7); |
26755 | adr = AREG(7); |
26756 | AREG(7) += 4; |
26757 | PRE_IO |
26758 | READ_LONG_F(adr, res) |
26759 | res |= src; |
26760 | flag_C = 0; |
26761 | flag_V = 0; |
26762 | flag_NotZ = res; |
26763 | flag_N = res >> 24; |
26764 | WRITE_LONG_F(adr, res) |
26765 | POST_IO |
26766 | RET(20) |
26767 | } |
26768 | |
26769 | // ORDa |
26770 | OPCODE(0x81A7) |
26771 | { |
26772 | u32 adr, res; |
26773 | u32 src, dst; |
26774 | |
26775 | src = DREGu32((Opcode >> 9) & 7); |
26776 | adr = AREG(7) - 4; |
26777 | AREG(7) = adr; |
26778 | PRE_IO |
26779 | READ_LONG_F(adr, res) |
26780 | res |= src; |
26781 | flag_C = 0; |
26782 | flag_V = 0; |
26783 | flag_NotZ = res; |
26784 | flag_N = res >> 24; |
26785 | WRITE_LONG_F(adr, res) |
26786 | POST_IO |
26787 | RET(22) |
26788 | } |
26789 | |
26790 | // SBCD |
26791 | OPCODE(0x8100) |
26792 | { |
26793 | u32 adr, res; |
26794 | u32 src, dst; |
26795 | |
26796 | src = DREGu8((Opcode >> 0) & 7); |
26797 | dst = DREGu8((Opcode >> 9) & 7); |
26798 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26799 | if (res > 9) res -= 6; |
26800 | res += (dst & 0xF0) - (src & 0xF0); |
26801 | if (res > 0x99) |
26802 | { |
26803 | res += 0xA0; |
26804 | flag_X = flag_C = M68K_SR_C; |
26805 | } |
26806 | else flag_X = flag_C = 0; |
26807 | flag_NotZ |= res & 0xFF; |
26808 | flag_N = res; |
26809 | DREGu8((Opcode >> 9) & 7) = res; |
26810 | RET(6) |
26811 | } |
26812 | |
26813 | // SBCDM |
26814 | OPCODE(0x8108) |
26815 | { |
26816 | u32 adr, res; |
26817 | u32 src, dst; |
26818 | |
26819 | adr = AREG((Opcode >> 0) & 7) - 1; |
26820 | AREG((Opcode >> 0) & 7) = adr; |
26821 | PRE_IO |
26822 | READ_BYTE_F(adr, src) |
26823 | adr = AREG((Opcode >> 9) & 7) - 1; |
26824 | AREG((Opcode >> 9) & 7) = adr; |
26825 | READ_BYTE_F(adr, dst) |
26826 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26827 | if (res > 9) res -= 6; |
26828 | res += (dst & 0xF0) - (src & 0xF0); |
26829 | if (res > 0x99) |
26830 | { |
26831 | res += 0xA0; |
26832 | flag_X = flag_C = M68K_SR_C; |
26833 | } |
26834 | else flag_X = flag_C = 0; |
26835 | flag_NotZ |= res & 0xFF; |
26836 | flag_N = res; |
26837 | WRITE_BYTE_F(adr, res) |
26838 | POST_IO |
26839 | RET(18) |
26840 | } |
26841 | |
26842 | // SBCD7M |
26843 | OPCODE(0x810F) |
26844 | { |
26845 | u32 adr, res; |
26846 | u32 src, dst; |
26847 | |
26848 | adr = AREG(7) - 2; |
26849 | AREG(7) = adr; |
26850 | PRE_IO |
26851 | READ_BYTE_F(adr, src) |
26852 | adr = AREG((Opcode >> 9) & 7) - 1; |
26853 | AREG((Opcode >> 9) & 7) = adr; |
26854 | READ_BYTE_F(adr, dst) |
26855 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26856 | if (res > 9) res -= 6; |
26857 | res += (dst & 0xF0) - (src & 0xF0); |
26858 | if (res > 0x99) |
26859 | { |
26860 | res += 0xA0; |
26861 | flag_X = flag_C = M68K_SR_C; |
26862 | } |
26863 | else flag_X = flag_C = 0; |
26864 | flag_NotZ |= res & 0xFF; |
26865 | flag_N = res; |
26866 | WRITE_BYTE_F(adr, res) |
26867 | POST_IO |
26868 | RET(18) |
26869 | } |
26870 | |
26871 | // SBCDM7 |
26872 | OPCODE(0x8F08) |
26873 | { |
26874 | u32 adr, res; |
26875 | u32 src, dst; |
26876 | |
26877 | adr = AREG((Opcode >> 0) & 7) - 1; |
26878 | AREG((Opcode >> 0) & 7) = adr; |
26879 | PRE_IO |
26880 | READ_BYTE_F(adr, src) |
26881 | adr = AREG(7) - 2; |
26882 | AREG(7) = adr; |
26883 | READ_BYTE_F(adr, dst) |
26884 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26885 | if (res > 9) res -= 6; |
26886 | res += (dst & 0xF0) - (src & 0xF0); |
26887 | if (res > 0x99) |
26888 | { |
26889 | res += 0xA0; |
26890 | flag_X = flag_C = M68K_SR_C; |
26891 | } |
26892 | else flag_X = flag_C = 0; |
26893 | flag_NotZ |= res & 0xFF; |
26894 | flag_N = res; |
26895 | WRITE_BYTE_F(adr, res) |
26896 | POST_IO |
26897 | RET(18) |
26898 | } |
26899 | |
26900 | // SBCD7M7 |
26901 | OPCODE(0x8F0F) |
26902 | { |
26903 | u32 adr, res; |
26904 | u32 src, dst; |
26905 | |
26906 | adr = AREG(7) - 2; |
26907 | AREG(7) = adr; |
26908 | PRE_IO |
26909 | READ_BYTE_F(adr, src) |
26910 | adr = AREG(7) - 2; |
26911 | AREG(7) = adr; |
26912 | READ_BYTE_F(adr, dst) |
26913 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26914 | if (res > 9) res -= 6; |
26915 | res += (dst & 0xF0) - (src & 0xF0); |
26916 | if (res > 0x99) |
26917 | { |
26918 | res += 0xA0; |
26919 | flag_X = flag_C = M68K_SR_C; |
26920 | } |
26921 | else flag_X = flag_C = 0; |
26922 | flag_NotZ |= res & 0xFF; |
26923 | flag_N = res; |
26924 | WRITE_BYTE_F(adr, res) |
26925 | POST_IO |
26926 | RET(18) |
26927 | } |
26928 | |
26929 | // DIVU |
26930 | OPCODE(0x80C0) |
26931 | { |
26932 | u32 adr, res; |
26933 | u32 src, dst; |
26934 | |
26935 | src = DREGu16((Opcode >> 0) & 7); |
26936 | if (src == 0) |
26937 | { |
d0ae0cb4 |
26938 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
26939 | #ifdef USE_CYCLONE_TIMING_DIV |
26940 | RET(140) |
26941 | #else |
26942 | RET(10) |
26943 | #endif |
26944 | } |
26945 | dst = DREGu32((Opcode >> 9) & 7); |
26946 | { |
26947 | u32 q, r; |
26948 | |
26949 | q = dst / src; |
26950 | r = dst % src; |
26951 | |
26952 | if (q & 0xFFFF0000) |
26953 | { |
26954 | flag_V = M68K_SR_V; |
26955 | #ifdef USE_CYCLONE_TIMING_DIV |
26956 | RET(140) |
26957 | #else |
26958 | RET(70) |
26959 | #endif |
26960 | } |
26961 | q &= 0x0000FFFF; |
26962 | flag_NotZ = q; |
26963 | flag_N = q >> 8; |
26964 | flag_V = flag_C = 0; |
26965 | res = q | (r << 16); |
26966 | DREGu32((Opcode >> 9) & 7) = res; |
26967 | } |
26968 | #ifdef USE_CYCLONE_TIMING_DIV |
26969 | RET(140) |
26970 | #else |
26971 | RET(90) |
26972 | #endif |
26973 | } |
26974 | |
26975 | // DIVU |
26976 | OPCODE(0x80D0) |
26977 | { |
26978 | u32 adr, res; |
26979 | u32 src, dst; |
26980 | |
26981 | adr = AREG((Opcode >> 0) & 7); |
26982 | PRE_IO |
26983 | READ_WORD_F(adr, src) |
26984 | if (src == 0) |
26985 | { |
d0ae0cb4 |
26986 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
26987 | #ifdef USE_CYCLONE_TIMING_DIV |
26988 | RET(144) |
26989 | #else |
26990 | RET(14) |
26991 | #endif |
26992 | } |
26993 | dst = DREGu32((Opcode >> 9) & 7); |
26994 | { |
26995 | u32 q, r; |
26996 | |
26997 | q = dst / src; |
26998 | r = dst % src; |
26999 | |
27000 | if (q & 0xFFFF0000) |
27001 | { |
27002 | flag_V = M68K_SR_V; |
27003 | #ifdef USE_CYCLONE_TIMING_DIV |
27004 | RET(144) |
27005 | #else |
27006 | RET(74) |
27007 | #endif |
27008 | } |
27009 | q &= 0x0000FFFF; |
27010 | flag_NotZ = q; |
27011 | flag_N = q >> 8; |
27012 | flag_V = flag_C = 0; |
27013 | res = q | (r << 16); |
27014 | DREGu32((Opcode >> 9) & 7) = res; |
27015 | } |
27016 | #ifdef USE_CYCLONE_TIMING_DIV |
27017 | RET(144) |
27018 | #else |
27019 | RET(94) |
27020 | #endif |
27021 | } |
27022 | |
27023 | // DIVU |
27024 | OPCODE(0x80D8) |
27025 | { |
27026 | u32 adr, res; |
27027 | u32 src, dst; |
27028 | |
27029 | adr = AREG((Opcode >> 0) & 7); |
27030 | AREG((Opcode >> 0) & 7) += 2; |
27031 | PRE_IO |
27032 | READ_WORD_F(adr, src) |
27033 | if (src == 0) |
27034 | { |
d0ae0cb4 |
27035 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27036 | #ifdef USE_CYCLONE_TIMING_DIV |
27037 | RET(144) |
27038 | #else |
27039 | RET(14) |
27040 | #endif |
27041 | } |
27042 | dst = DREGu32((Opcode >> 9) & 7); |
27043 | { |
27044 | u32 q, r; |
27045 | |
27046 | q = dst / src; |
27047 | r = dst % src; |
27048 | |
27049 | if (q & 0xFFFF0000) |
27050 | { |
27051 | flag_V = M68K_SR_V; |
27052 | #ifdef USE_CYCLONE_TIMING_DIV |
27053 | RET(144) |
27054 | #else |
27055 | RET(74) |
27056 | #endif |
27057 | } |
27058 | q &= 0x0000FFFF; |
27059 | flag_NotZ = q; |
27060 | flag_N = q >> 8; |
27061 | flag_V = flag_C = 0; |
27062 | res = q | (r << 16); |
27063 | DREGu32((Opcode >> 9) & 7) = res; |
27064 | } |
27065 | #ifdef USE_CYCLONE_TIMING_DIV |
27066 | RET(144) |
27067 | #else |
27068 | RET(94) |
27069 | #endif |
27070 | } |
27071 | |
27072 | // DIVU |
27073 | OPCODE(0x80E0) |
27074 | { |
27075 | u32 adr, res; |
27076 | u32 src, dst; |
27077 | |
27078 | adr = AREG((Opcode >> 0) & 7) - 2; |
27079 | AREG((Opcode >> 0) & 7) = adr; |
27080 | PRE_IO |
27081 | READ_WORD_F(adr, src) |
27082 | if (src == 0) |
27083 | { |
d0ae0cb4 |
27084 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27085 | #ifdef USE_CYCLONE_TIMING_DIV |
27086 | RET(146) |
27087 | #else |
27088 | RET(16) |
27089 | #endif |
27090 | } |
27091 | dst = DREGu32((Opcode >> 9) & 7); |
27092 | { |
27093 | u32 q, r; |
27094 | |
27095 | q = dst / src; |
27096 | r = dst % src; |
27097 | |
27098 | if (q & 0xFFFF0000) |
27099 | { |
27100 | flag_V = M68K_SR_V; |
27101 | #ifdef USE_CYCLONE_TIMING_DIV |
27102 | RET(146) |
27103 | #else |
27104 | RET(76) |
27105 | #endif |
27106 | } |
27107 | q &= 0x0000FFFF; |
27108 | flag_NotZ = q; |
27109 | flag_N = q >> 8; |
27110 | flag_V = flag_C = 0; |
27111 | res = q | (r << 16); |
27112 | DREGu32((Opcode >> 9) & 7) = res; |
27113 | } |
27114 | #ifdef USE_CYCLONE_TIMING_DIV |
27115 | RET(146) |
27116 | #else |
27117 | RET(96) |
27118 | #endif |
27119 | } |
27120 | |
27121 | // DIVU |
27122 | OPCODE(0x80E8) |
27123 | { |
27124 | u32 adr, res; |
27125 | u32 src, dst; |
27126 | |
27127 | FETCH_SWORD(adr); |
27128 | adr += AREG((Opcode >> 0) & 7); |
27129 | PRE_IO |
27130 | READ_WORD_F(adr, src) |
27131 | if (src == 0) |
27132 | { |
d0ae0cb4 |
27133 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27134 | #ifdef USE_CYCLONE_TIMING_DIV |
27135 | RET(148) |
27136 | #else |
27137 | RET(18) |
27138 | #endif |
27139 | } |
27140 | dst = DREGu32((Opcode >> 9) & 7); |
27141 | { |
27142 | u32 q, r; |
27143 | |
27144 | q = dst / src; |
27145 | r = dst % src; |
27146 | |
27147 | if (q & 0xFFFF0000) |
27148 | { |
27149 | flag_V = M68K_SR_V; |
27150 | #ifdef USE_CYCLONE_TIMING_DIV |
27151 | RET(148) |
27152 | #else |
27153 | RET(78) |
27154 | #endif |
27155 | } |
27156 | q &= 0x0000FFFF; |
27157 | flag_NotZ = q; |
27158 | flag_N = q >> 8; |
27159 | flag_V = flag_C = 0; |
27160 | res = q | (r << 16); |
27161 | DREGu32((Opcode >> 9) & 7) = res; |
27162 | } |
27163 | #ifdef USE_CYCLONE_TIMING_DIV |
27164 | RET(148) |
27165 | #else |
27166 | RET(98) |
27167 | #endif |
27168 | } |
27169 | |
27170 | // DIVU |
27171 | OPCODE(0x80F0) |
27172 | { |
27173 | u32 adr, res; |
27174 | u32 src, dst; |
27175 | |
27176 | adr = AREG((Opcode >> 0) & 7); |
27177 | DECODE_EXT_WORD |
27178 | PRE_IO |
27179 | READ_WORD_F(adr, src) |
27180 | if (src == 0) |
27181 | { |
d0ae0cb4 |
27182 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27183 | #ifdef USE_CYCLONE_TIMING_DIV |
27184 | RET(150) |
27185 | #else |
27186 | RET(20) |
27187 | #endif |
27188 | } |
27189 | dst = DREGu32((Opcode >> 9) & 7); |
27190 | { |
27191 | u32 q, r; |
27192 | |
27193 | q = dst / src; |
27194 | r = dst % src; |
27195 | |
27196 | if (q & 0xFFFF0000) |
27197 | { |
27198 | flag_V = M68K_SR_V; |
27199 | #ifdef USE_CYCLONE_TIMING_DIV |
27200 | RET(150) |
27201 | #else |
27202 | RET(80) |
27203 | #endif |
27204 | } |
27205 | q &= 0x0000FFFF; |
27206 | flag_NotZ = q; |
27207 | flag_N = q >> 8; |
27208 | flag_V = flag_C = 0; |
27209 | res = q | (r << 16); |
27210 | DREGu32((Opcode >> 9) & 7) = res; |
27211 | } |
27212 | #ifdef USE_CYCLONE_TIMING_DIV |
27213 | RET(150) |
27214 | #else |
27215 | RET(100) |
27216 | #endif |
27217 | } |
27218 | |
27219 | // DIVU |
27220 | OPCODE(0x80F8) |
27221 | { |
27222 | u32 adr, res; |
27223 | u32 src, dst; |
27224 | |
27225 | FETCH_SWORD(adr); |
27226 | PRE_IO |
27227 | READ_WORD_F(adr, src) |
27228 | if (src == 0) |
27229 | { |
d0ae0cb4 |
27230 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27231 | #ifdef USE_CYCLONE_TIMING_DIV |
27232 | RET(148) |
27233 | #else |
27234 | RET(18) |
27235 | #endif |
27236 | } |
27237 | dst = DREGu32((Opcode >> 9) & 7); |
27238 | { |
27239 | u32 q, r; |
27240 | |
27241 | q = dst / src; |
27242 | r = dst % src; |
27243 | |
27244 | if (q & 0xFFFF0000) |
27245 | { |
27246 | flag_V = M68K_SR_V; |
27247 | #ifdef USE_CYCLONE_TIMING_DIV |
27248 | RET(148) |
27249 | #else |
27250 | RET(78) |
27251 | #endif |
27252 | } |
27253 | q &= 0x0000FFFF; |
27254 | flag_NotZ = q; |
27255 | flag_N = q >> 8; |
27256 | flag_V = flag_C = 0; |
27257 | res = q | (r << 16); |
27258 | DREGu32((Opcode >> 9) & 7) = res; |
27259 | } |
27260 | #ifdef USE_CYCLONE_TIMING_DIV |
27261 | RET(148) |
27262 | #else |
27263 | RET(98) |
27264 | #endif |
27265 | } |
27266 | |
27267 | // DIVU |
27268 | OPCODE(0x80F9) |
27269 | { |
27270 | u32 adr, res; |
27271 | u32 src, dst; |
27272 | |
27273 | FETCH_LONG(adr); |
27274 | PRE_IO |
27275 | READ_WORD_F(adr, src) |
27276 | if (src == 0) |
27277 | { |
d0ae0cb4 |
27278 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27279 | #ifdef USE_CYCLONE_TIMING_DIV |
27280 | RET(162) |
27281 | #else |
27282 | RET(22) |
27283 | #endif |
27284 | } |
27285 | dst = DREGu32((Opcode >> 9) & 7); |
27286 | { |
27287 | u32 q, r; |
27288 | |
27289 | q = dst / src; |
27290 | r = dst % src; |
27291 | |
27292 | if (q & 0xFFFF0000) |
27293 | { |
27294 | flag_V = M68K_SR_V; |
27295 | #ifdef USE_CYCLONE_TIMING_DIV |
27296 | RET(162) |
27297 | #else |
27298 | RET(82) |
27299 | #endif |
27300 | } |
27301 | q &= 0x0000FFFF; |
27302 | flag_NotZ = q; |
27303 | flag_N = q >> 8; |
27304 | flag_V = flag_C = 0; |
27305 | res = q | (r << 16); |
27306 | DREGu32((Opcode >> 9) & 7) = res; |
27307 | } |
27308 | #ifdef USE_CYCLONE_TIMING_DIV |
27309 | RET(162) |
27310 | #else |
27311 | RET(102) |
27312 | #endif |
27313 | } |
27314 | |
27315 | // DIVU |
27316 | OPCODE(0x80FA) |
27317 | { |
27318 | u32 adr, res; |
27319 | u32 src, dst; |
27320 | |
27321 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
27322 | PC++; |
27323 | PRE_IO |
27324 | READ_WORD_F(adr, src) |
27325 | if (src == 0) |
27326 | { |
d0ae0cb4 |
27327 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27328 | #ifdef USE_CYCLONE_TIMING_DIV |
27329 | RET(148) |
27330 | #else |
27331 | RET(18) |
27332 | #endif |
27333 | } |
27334 | dst = DREGu32((Opcode >> 9) & 7); |
27335 | { |
27336 | u32 q, r; |
27337 | |
27338 | q = dst / src; |
27339 | r = dst % src; |
27340 | |
27341 | if (q & 0xFFFF0000) |
27342 | { |
27343 | flag_V = M68K_SR_V; |
27344 | #ifdef USE_CYCLONE_TIMING_DIV |
27345 | RET(148) |
27346 | #else |
27347 | RET(78) |
27348 | #endif |
27349 | } |
27350 | q &= 0x0000FFFF; |
27351 | flag_NotZ = q; |
27352 | flag_N = q >> 8; |
27353 | flag_V = flag_C = 0; |
27354 | res = q | (r << 16); |
27355 | DREGu32((Opcode >> 9) & 7) = res; |
27356 | } |
27357 | #ifdef USE_CYCLONE_TIMING_DIV |
27358 | RET(148) |
27359 | #else |
27360 | RET(98) |
27361 | #endif |
27362 | } |
27363 | |
27364 | // DIVU |
27365 | OPCODE(0x80FB) |
27366 | { |
27367 | u32 adr, res; |
27368 | u32 src, dst; |
27369 | |
27370 | adr = (u32)(PC) - BasePC; |
27371 | DECODE_EXT_WORD |
27372 | PRE_IO |
27373 | READ_WORD_F(adr, src) |
27374 | if (src == 0) |
27375 | { |
d0ae0cb4 |
27376 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27377 | #ifdef USE_CYCLONE_TIMING_DIV |
27378 | RET(160) |
27379 | #else |
27380 | RET(20) |
27381 | #endif |
27382 | } |
27383 | dst = DREGu32((Opcode >> 9) & 7); |
27384 | { |
27385 | u32 q, r; |
27386 | |
27387 | q = dst / src; |
27388 | r = dst % src; |
27389 | |
27390 | if (q & 0xFFFF0000) |
27391 | { |
27392 | flag_V = M68K_SR_V; |
27393 | #ifdef USE_CYCLONE_TIMING_DIV |
27394 | RET(160) |
27395 | #else |
27396 | RET(80) |
27397 | #endif |
27398 | } |
27399 | q &= 0x0000FFFF; |
27400 | flag_NotZ = q; |
27401 | flag_N = q >> 8; |
27402 | flag_V = flag_C = 0; |
27403 | res = q | (r << 16); |
27404 | DREGu32((Opcode >> 9) & 7) = res; |
27405 | } |
27406 | #ifdef USE_CYCLONE_TIMING_DIV |
27407 | RET(160) |
27408 | #else |
27409 | RET(100) |
27410 | #endif |
27411 | } |
27412 | |
27413 | // DIVU |
27414 | OPCODE(0x80FC) |
27415 | { |
27416 | u32 adr, res; |
27417 | u32 src, dst; |
27418 | |
27419 | FETCH_WORD(src); |
27420 | if (src == 0) |
27421 | { |
d0ae0cb4 |
27422 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27423 | #ifdef USE_CYCLONE_TIMING_DIV |
27424 | RET(144) |
27425 | #else |
27426 | RET(14) |
27427 | #endif |
27428 | } |
27429 | dst = DREGu32((Opcode >> 9) & 7); |
27430 | { |
27431 | u32 q, r; |
27432 | |
27433 | q = dst / src; |
27434 | r = dst % src; |
27435 | |
27436 | if (q & 0xFFFF0000) |
27437 | { |
27438 | flag_V = M68K_SR_V; |
27439 | #ifdef USE_CYCLONE_TIMING_DIV |
27440 | RET(144) |
27441 | #else |
27442 | RET(74) |
27443 | #endif |
27444 | } |
27445 | q &= 0x0000FFFF; |
27446 | flag_NotZ = q; |
27447 | flag_N = q >> 8; |
27448 | flag_V = flag_C = 0; |
27449 | res = q | (r << 16); |
27450 | DREGu32((Opcode >> 9) & 7) = res; |
27451 | } |
27452 | #ifdef USE_CYCLONE_TIMING_DIV |
27453 | RET(144) |
27454 | #else |
27455 | RET(94) |
27456 | #endif |
27457 | } |
27458 | |
27459 | // DIVU |
27460 | OPCODE(0x80DF) |
27461 | { |
27462 | u32 adr, res; |
27463 | u32 src, dst; |
27464 | |
27465 | adr = AREG(7); |
27466 | AREG(7) += 2; |
27467 | PRE_IO |
27468 | READ_WORD_F(adr, src) |
27469 | if (src == 0) |
27470 | { |
d0ae0cb4 |
27471 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27472 | #ifdef USE_CYCLONE_TIMING_DIV |
27473 | RET(144) |
27474 | #else |
27475 | RET(14) |
27476 | #endif |
27477 | } |
27478 | dst = DREGu32((Opcode >> 9) & 7); |
27479 | { |
27480 | u32 q, r; |
27481 | |
27482 | q = dst / src; |
27483 | r = dst % src; |
27484 | |
27485 | if (q & 0xFFFF0000) |
27486 | { |
27487 | flag_V = M68K_SR_V; |
27488 | #ifdef USE_CYCLONE_TIMING_DIV |
27489 | RET(144) |
27490 | #else |
27491 | RET(74) |
27492 | #endif |
27493 | } |
27494 | q &= 0x0000FFFF; |
27495 | flag_NotZ = q; |
27496 | flag_N = q >> 8; |
27497 | flag_V = flag_C = 0; |
27498 | res = q | (r << 16); |
27499 | DREGu32((Opcode >> 9) & 7) = res; |
27500 | } |
27501 | #ifdef USE_CYCLONE_TIMING_DIV |
27502 | RET(144) |
27503 | #else |
27504 | RET(94) |
27505 | #endif |
27506 | } |
27507 | |
27508 | // DIVU |
27509 | OPCODE(0x80E7) |
27510 | { |
27511 | u32 adr, res; |
27512 | u32 src, dst; |
27513 | |
27514 | adr = AREG(7) - 2; |
27515 | AREG(7) = adr; |
27516 | PRE_IO |
27517 | READ_WORD_F(adr, src) |
27518 | if (src == 0) |
27519 | { |
d0ae0cb4 |
27520 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27521 | #ifdef USE_CYCLONE_TIMING_DIV |
27522 | RET(146) |
27523 | #else |
27524 | RET(16) |
27525 | #endif |
27526 | } |
27527 | dst = DREGu32((Opcode >> 9) & 7); |
27528 | { |
27529 | u32 q, r; |
27530 | |
27531 | q = dst / src; |
27532 | r = dst % src; |
27533 | |
27534 | if (q & 0xFFFF0000) |
27535 | { |
27536 | flag_V = M68K_SR_V; |
27537 | #ifdef USE_CYCLONE_TIMING_DIV |
27538 | RET(146) |
27539 | #else |
27540 | RET(76) |
27541 | #endif |
27542 | } |
27543 | q &= 0x0000FFFF; |
27544 | flag_NotZ = q; |
27545 | flag_N = q >> 8; |
27546 | flag_V = flag_C = 0; |
27547 | res = q | (r << 16); |
27548 | DREGu32((Opcode >> 9) & 7) = res; |
27549 | } |
27550 | #ifdef USE_CYCLONE_TIMING_DIV |
27551 | RET(146) |
27552 | #else |
27553 | RET(96) |
27554 | #endif |
27555 | } |
27556 | |
27557 | // DIVS |
27558 | OPCODE(0x81C0) |
27559 | { |
27560 | u32 adr, res; |
27561 | u32 src, dst; |
27562 | |
27563 | src = (s32)DREGs16((Opcode >> 0) & 7); |
27564 | if (src == 0) |
27565 | { |
d0ae0cb4 |
27566 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27567 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27568 | goto end81C0; |
70357ce5 |
27569 | #endif |
27570 | RET(10) |
27571 | } |
27572 | dst = DREGu32((Opcode >> 9) & 7); |
27573 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27574 | { |
27575 | flag_NotZ = flag_N = 0; |
27576 | flag_V = flag_C = 0; |
27577 | res = 0; |
27578 | DREGu32((Opcode >> 9) & 7) = res; |
27579 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27580 | goto end81C0; |
70357ce5 |
27581 | #endif |
27582 | RET(50) |
27583 | } |
27584 | { |
27585 | s32 q, r; |
27586 | |
27587 | q = (s32)dst / (s32)src; |
27588 | r = (s32)dst % (s32)src; |
27589 | |
27590 | if ((q > 0x7FFF) || (q < -0x8000)) |
27591 | { |
27592 | flag_V = M68K_SR_V; |
27593 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27594 | goto end81C0; |
70357ce5 |
27595 | #endif |
27596 | RET(80) |
27597 | } |
27598 | q &= 0x0000FFFF; |
27599 | flag_NotZ = q; |
27600 | flag_N = q >> 8; |
27601 | flag_V = flag_C = 0; |
27602 | res = q | (r << 16); |
27603 | DREGu32((Opcode >> 9) & 7) = res; |
27604 | } |
27605 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27606 | end81C0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27607 | #endif |
27608 | RET(108) |
27609 | } |
27610 | |
27611 | // DIVS |
27612 | OPCODE(0x81D0) |
27613 | { |
27614 | u32 adr, res; |
27615 | u32 src, dst; |
27616 | |
27617 | adr = AREG((Opcode >> 0) & 7); |
27618 | PRE_IO |
27619 | READSX_WORD_F(adr, src) |
27620 | if (src == 0) |
27621 | { |
d0ae0cb4 |
27622 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27623 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27624 | goto end81D0; |
70357ce5 |
27625 | #endif |
27626 | RET(14) |
27627 | } |
27628 | dst = DREGu32((Opcode >> 9) & 7); |
27629 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27630 | { |
27631 | flag_NotZ = flag_N = 0; |
27632 | flag_V = flag_C = 0; |
27633 | res = 0; |
27634 | DREGu32((Opcode >> 9) & 7) = res; |
27635 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27636 | goto end81D0; |
70357ce5 |
27637 | #endif |
27638 | RET(54) |
27639 | } |
27640 | { |
27641 | s32 q, r; |
27642 | |
27643 | q = (s32)dst / (s32)src; |
27644 | r = (s32)dst % (s32)src; |
27645 | |
27646 | if ((q > 0x7FFF) || (q < -0x8000)) |
27647 | { |
27648 | flag_V = M68K_SR_V; |
27649 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27650 | goto end81D0; |
70357ce5 |
27651 | #endif |
27652 | RET(84) |
27653 | } |
27654 | q &= 0x0000FFFF; |
27655 | flag_NotZ = q; |
27656 | flag_N = q >> 8; |
27657 | flag_V = flag_C = 0; |
27658 | res = q | (r << 16); |
27659 | DREGu32((Opcode >> 9) & 7) = res; |
27660 | } |
27661 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27662 | end81D0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27663 | #endif |
27664 | RET(112) |
27665 | } |
27666 | |
27667 | // DIVS |
27668 | OPCODE(0x81D8) |
27669 | { |
27670 | u32 adr, res; |
27671 | u32 src, dst; |
27672 | |
27673 | adr = AREG((Opcode >> 0) & 7); |
27674 | AREG((Opcode >> 0) & 7) += 2; |
27675 | PRE_IO |
27676 | READSX_WORD_F(adr, src) |
27677 | if (src == 0) |
27678 | { |
d0ae0cb4 |
27679 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27680 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27681 | goto end81D8; |
70357ce5 |
27682 | #endif |
27683 | RET(14) |
27684 | } |
27685 | dst = DREGu32((Opcode >> 9) & 7); |
27686 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27687 | { |
27688 | flag_NotZ = flag_N = 0; |
27689 | flag_V = flag_C = 0; |
27690 | res = 0; |
27691 | DREGu32((Opcode >> 9) & 7) = res; |
27692 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27693 | goto end81D8; |
70357ce5 |
27694 | #endif |
27695 | RET(54) |
27696 | } |
27697 | { |
27698 | s32 q, r; |
27699 | |
27700 | q = (s32)dst / (s32)src; |
27701 | r = (s32)dst % (s32)src; |
27702 | |
27703 | if ((q > 0x7FFF) || (q < -0x8000)) |
27704 | { |
27705 | flag_V = M68K_SR_V; |
27706 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27707 | goto end81D8; |
70357ce5 |
27708 | #endif |
27709 | RET(84) |
27710 | } |
27711 | q &= 0x0000FFFF; |
27712 | flag_NotZ = q; |
27713 | flag_N = q >> 8; |
27714 | flag_V = flag_C = 0; |
27715 | res = q | (r << 16); |
27716 | DREGu32((Opcode >> 9) & 7) = res; |
27717 | } |
27718 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27719 | end81D8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27720 | #endif |
27721 | RET(112) |
27722 | } |
27723 | |
27724 | // DIVS |
27725 | OPCODE(0x81E0) |
27726 | { |
27727 | u32 adr, res; |
27728 | u32 src, dst; |
27729 | |
27730 | adr = AREG((Opcode >> 0) & 7) - 2; |
27731 | AREG((Opcode >> 0) & 7) = adr; |
27732 | PRE_IO |
27733 | READSX_WORD_F(adr, src) |
27734 | if (src == 0) |
27735 | { |
d0ae0cb4 |
27736 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27737 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27738 | goto end81E0; |
70357ce5 |
27739 | #endif |
27740 | RET(16) |
27741 | } |
27742 | dst = DREGu32((Opcode >> 9) & 7); |
27743 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27744 | { |
27745 | flag_NotZ = flag_N = 0; |
27746 | flag_V = flag_C = 0; |
27747 | res = 0; |
27748 | DREGu32((Opcode >> 9) & 7) = res; |
27749 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27750 | goto end81E0; |
70357ce5 |
27751 | #endif |
27752 | RET(56) |
27753 | } |
27754 | { |
27755 | s32 q, r; |
27756 | |
27757 | q = (s32)dst / (s32)src; |
27758 | r = (s32)dst % (s32)src; |
27759 | |
27760 | if ((q > 0x7FFF) || (q < -0x8000)) |
27761 | { |
27762 | flag_V = M68K_SR_V; |
27763 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27764 | goto end81E0; |
70357ce5 |
27765 | #endif |
27766 | RET(86) |
27767 | } |
27768 | q &= 0x0000FFFF; |
27769 | flag_NotZ = q; |
27770 | flag_N = q >> 8; |
27771 | flag_V = flag_C = 0; |
27772 | res = q | (r << 16); |
27773 | DREGu32((Opcode >> 9) & 7) = res; |
27774 | } |
27775 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27776 | end81E0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27777 | #endif |
27778 | RET(114) |
27779 | } |
27780 | |
27781 | // DIVS |
27782 | OPCODE(0x81E8) |
27783 | { |
27784 | u32 adr, res; |
27785 | u32 src, dst; |
27786 | |
27787 | FETCH_SWORD(adr); |
27788 | adr += AREG((Opcode >> 0) & 7); |
27789 | PRE_IO |
27790 | READSX_WORD_F(adr, src) |
27791 | if (src == 0) |
27792 | { |
d0ae0cb4 |
27793 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27794 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27795 | goto end81E8; |
70357ce5 |
27796 | #endif |
27797 | RET(18) |
27798 | } |
27799 | dst = DREGu32((Opcode >> 9) & 7); |
27800 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27801 | { |
27802 | flag_NotZ = flag_N = 0; |
27803 | flag_V = flag_C = 0; |
27804 | res = 0; |
27805 | DREGu32((Opcode >> 9) & 7) = res; |
27806 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27807 | goto end81E8; |
70357ce5 |
27808 | #endif |
27809 | RET(58) |
27810 | } |
27811 | { |
27812 | s32 q, r; |
27813 | |
27814 | q = (s32)dst / (s32)src; |
27815 | r = (s32)dst % (s32)src; |
27816 | |
27817 | if ((q > 0x7FFF) || (q < -0x8000)) |
27818 | { |
27819 | flag_V = M68K_SR_V; |
27820 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27821 | goto end81E8; |
70357ce5 |
27822 | #endif |
27823 | RET(88) |
27824 | } |
27825 | q &= 0x0000FFFF; |
27826 | flag_NotZ = q; |
27827 | flag_N = q >> 8; |
27828 | flag_V = flag_C = 0; |
27829 | res = q | (r << 16); |
27830 | DREGu32((Opcode >> 9) & 7) = res; |
27831 | } |
27832 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27833 | end81E8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27834 | #endif |
27835 | RET(116) |
27836 | } |
27837 | |
27838 | // DIVS |
27839 | OPCODE(0x81F0) |
27840 | { |
27841 | u32 adr, res; |
27842 | u32 src, dst; |
27843 | |
27844 | adr = AREG((Opcode >> 0) & 7); |
27845 | DECODE_EXT_WORD |
27846 | PRE_IO |
27847 | READSX_WORD_F(adr, src) |
27848 | if (src == 0) |
27849 | { |
d0ae0cb4 |
27850 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27851 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27852 | goto end81F0; |
70357ce5 |
27853 | #endif |
27854 | RET(20) |
27855 | } |
27856 | dst = DREGu32((Opcode >> 9) & 7); |
27857 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27858 | { |
27859 | flag_NotZ = flag_N = 0; |
27860 | flag_V = flag_C = 0; |
27861 | res = 0; |
27862 | DREGu32((Opcode >> 9) & 7) = res; |
27863 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27864 | goto end81F0; |
70357ce5 |
27865 | #endif |
27866 | RET(60) |
27867 | } |
27868 | { |
27869 | s32 q, r; |
27870 | |
27871 | q = (s32)dst / (s32)src; |
27872 | r = (s32)dst % (s32)src; |
27873 | |
27874 | if ((q > 0x7FFF) || (q < -0x8000)) |
27875 | { |
27876 | flag_V = M68K_SR_V; |
27877 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27878 | goto end81F0; |
70357ce5 |
27879 | #endif |
27880 | RET(90) |
27881 | } |
27882 | q &= 0x0000FFFF; |
27883 | flag_NotZ = q; |
27884 | flag_N = q >> 8; |
27885 | flag_V = flag_C = 0; |
27886 | res = q | (r << 16); |
27887 | DREGu32((Opcode >> 9) & 7) = res; |
27888 | } |
27889 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27890 | end81F0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27891 | #endif |
27892 | RET(118) |
27893 | } |
27894 | |
27895 | // DIVS |
27896 | OPCODE(0x81F8) |
27897 | { |
27898 | u32 adr, res; |
27899 | u32 src, dst; |
27900 | |
27901 | FETCH_SWORD(adr); |
27902 | PRE_IO |
27903 | READSX_WORD_F(adr, src) |
27904 | if (src == 0) |
27905 | { |
d0ae0cb4 |
27906 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27907 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27908 | goto end81F8; |
70357ce5 |
27909 | #endif |
27910 | RET(18) |
27911 | } |
27912 | dst = DREGu32((Opcode >> 9) & 7); |
27913 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27914 | { |
27915 | flag_NotZ = flag_N = 0; |
27916 | flag_V = flag_C = 0; |
27917 | res = 0; |
27918 | DREGu32((Opcode >> 9) & 7) = res; |
27919 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27920 | goto end81F8; |
70357ce5 |
27921 | #endif |
27922 | RET(58) |
27923 | } |
27924 | { |
27925 | s32 q, r; |
27926 | |
27927 | q = (s32)dst / (s32)src; |
27928 | r = (s32)dst % (s32)src; |
27929 | |
27930 | if ((q > 0x7FFF) || (q < -0x8000)) |
27931 | { |
27932 | flag_V = M68K_SR_V; |
27933 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27934 | goto end81F8; |
70357ce5 |
27935 | #endif |
27936 | RET(88) |
27937 | } |
27938 | q &= 0x0000FFFF; |
27939 | flag_NotZ = q; |
27940 | flag_N = q >> 8; |
27941 | flag_V = flag_C = 0; |
27942 | res = q | (r << 16); |
27943 | DREGu32((Opcode >> 9) & 7) = res; |
27944 | } |
27945 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27946 | end81F8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27947 | #endif |
27948 | RET(116) |
27949 | } |
27950 | |
27951 | // DIVS |
27952 | OPCODE(0x81F9) |
27953 | { |
27954 | u32 adr, res; |
27955 | u32 src, dst; |
27956 | |
27957 | FETCH_LONG(adr); |
27958 | PRE_IO |
27959 | READSX_WORD_F(adr, src) |
27960 | if (src == 0) |
27961 | { |
d0ae0cb4 |
27962 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27963 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27964 | goto end81F9; |
70357ce5 |
27965 | #endif |
27966 | RET(22) |
27967 | } |
27968 | dst = DREGu32((Opcode >> 9) & 7); |
27969 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27970 | { |
27971 | flag_NotZ = flag_N = 0; |
27972 | flag_V = flag_C = 0; |
27973 | res = 0; |
27974 | DREGu32((Opcode >> 9) & 7) = res; |
27975 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27976 | goto end81F9; |
70357ce5 |
27977 | #endif |
27978 | RET(62) |
27979 | } |
27980 | { |
27981 | s32 q, r; |
27982 | |
27983 | q = (s32)dst / (s32)src; |
27984 | r = (s32)dst % (s32)src; |
27985 | |
27986 | if ((q > 0x7FFF) || (q < -0x8000)) |
27987 | { |
27988 | flag_V = M68K_SR_V; |
27989 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27990 | goto end81F9; |
70357ce5 |
27991 | #endif |
27992 | RET(92) |
27993 | } |
27994 | q &= 0x0000FFFF; |
27995 | flag_NotZ = q; |
27996 | flag_N = q >> 8; |
27997 | flag_V = flag_C = 0; |
27998 | res = q | (r << 16); |
27999 | DREGu32((Opcode >> 9) & 7) = res; |
28000 | } |
28001 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28002 | end81F9: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28003 | #endif |
28004 | RET(120) |
28005 | } |
28006 | |
28007 | // DIVS |
28008 | OPCODE(0x81FA) |
28009 | { |
28010 | u32 adr, res; |
28011 | u32 src, dst; |
28012 | |
28013 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28014 | PC++; |
28015 | PRE_IO |
28016 | READSX_WORD_F(adr, src) |
28017 | if (src == 0) |
28018 | { |
d0ae0cb4 |
28019 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28020 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28021 | goto end81FA; |
70357ce5 |
28022 | #endif |
28023 | RET(18) |
28024 | } |
28025 | dst = DREGu32((Opcode >> 9) & 7); |
28026 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28027 | { |
28028 | flag_NotZ = flag_N = 0; |
28029 | flag_V = flag_C = 0; |
28030 | res = 0; |
28031 | DREGu32((Opcode >> 9) & 7) = res; |
28032 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28033 | goto end81FA; |
70357ce5 |
28034 | #endif |
28035 | RET(58) |
28036 | } |
28037 | { |
28038 | s32 q, r; |
28039 | |
28040 | q = (s32)dst / (s32)src; |
28041 | r = (s32)dst % (s32)src; |
28042 | |
28043 | if ((q > 0x7FFF) || (q < -0x8000)) |
28044 | { |
28045 | flag_V = M68K_SR_V; |
28046 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28047 | goto end81FA; |
70357ce5 |
28048 | #endif |
28049 | RET(88) |
28050 | } |
28051 | q &= 0x0000FFFF; |
28052 | flag_NotZ = q; |
28053 | flag_N = q >> 8; |
28054 | flag_V = flag_C = 0; |
28055 | res = q | (r << 16); |
28056 | DREGu32((Opcode >> 9) & 7) = res; |
28057 | } |
28058 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28059 | end81FA: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28060 | #endif |
28061 | RET(116) |
28062 | } |
28063 | |
28064 | // DIVS |
28065 | OPCODE(0x81FB) |
28066 | { |
28067 | u32 adr, res; |
28068 | u32 src, dst; |
28069 | |
28070 | adr = (u32)(PC) - BasePC; |
28071 | DECODE_EXT_WORD |
28072 | PRE_IO |
28073 | READSX_WORD_F(adr, src) |
28074 | if (src == 0) |
28075 | { |
d0ae0cb4 |
28076 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28077 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28078 | goto end81FB; |
70357ce5 |
28079 | #endif |
28080 | RET(20) |
28081 | } |
28082 | dst = DREGu32((Opcode >> 9) & 7); |
28083 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28084 | { |
28085 | flag_NotZ = flag_N = 0; |
28086 | flag_V = flag_C = 0; |
28087 | res = 0; |
28088 | DREGu32((Opcode >> 9) & 7) = res; |
28089 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28090 | goto end81FB; |
70357ce5 |
28091 | #endif |
28092 | RET(60) |
28093 | } |
28094 | { |
28095 | s32 q, r; |
28096 | |
28097 | q = (s32)dst / (s32)src; |
28098 | r = (s32)dst % (s32)src; |
28099 | |
28100 | if ((q > 0x7FFF) || (q < -0x8000)) |
28101 | { |
28102 | flag_V = M68K_SR_V; |
28103 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28104 | goto end81FB; |
70357ce5 |
28105 | #endif |
28106 | RET(90) |
28107 | } |
28108 | q &= 0x0000FFFF; |
28109 | flag_NotZ = q; |
28110 | flag_N = q >> 8; |
28111 | flag_V = flag_C = 0; |
28112 | res = q | (r << 16); |
28113 | DREGu32((Opcode >> 9) & 7) = res; |
28114 | } |
28115 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28116 | end81FB: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28117 | #endif |
28118 | RET(118) |
28119 | } |
28120 | |
28121 | // DIVS |
28122 | OPCODE(0x81FC) |
28123 | { |
28124 | u32 adr, res; |
28125 | u32 src, dst; |
28126 | |
28127 | FETCH_SWORD(src); |
28128 | if (src == 0) |
28129 | { |
d0ae0cb4 |
28130 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28131 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28132 | goto end81FC; |
70357ce5 |
28133 | #endif |
28134 | RET(14) |
28135 | } |
28136 | dst = DREGu32((Opcode >> 9) & 7); |
28137 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28138 | { |
28139 | flag_NotZ = flag_N = 0; |
28140 | flag_V = flag_C = 0; |
28141 | res = 0; |
28142 | DREGu32((Opcode >> 9) & 7) = res; |
28143 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28144 | goto end81FC; |
70357ce5 |
28145 | #endif |
28146 | RET(54) |
28147 | } |
28148 | { |
28149 | s32 q, r; |
28150 | |
28151 | q = (s32)dst / (s32)src; |
28152 | r = (s32)dst % (s32)src; |
28153 | |
28154 | if ((q > 0x7FFF) || (q < -0x8000)) |
28155 | { |
28156 | flag_V = M68K_SR_V; |
28157 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28158 | goto end81FC; |
70357ce5 |
28159 | #endif |
28160 | RET(84) |
28161 | } |
28162 | q &= 0x0000FFFF; |
28163 | flag_NotZ = q; |
28164 | flag_N = q >> 8; |
28165 | flag_V = flag_C = 0; |
28166 | res = q | (r << 16); |
28167 | DREGu32((Opcode >> 9) & 7) = res; |
28168 | } |
28169 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28170 | end81FC: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28171 | #endif |
28172 | RET(112) |
28173 | } |
28174 | |
28175 | // DIVS |
28176 | OPCODE(0x81DF) |
28177 | { |
28178 | u32 adr, res; |
28179 | u32 src, dst; |
28180 | |
28181 | adr = AREG(7); |
28182 | AREG(7) += 2; |
28183 | PRE_IO |
28184 | READSX_WORD_F(adr, src) |
28185 | if (src == 0) |
28186 | { |
d0ae0cb4 |
28187 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28188 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28189 | goto end81DF; |
70357ce5 |
28190 | #endif |
28191 | RET(14) |
28192 | } |
28193 | dst = DREGu32((Opcode >> 9) & 7); |
28194 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28195 | { |
28196 | flag_NotZ = flag_N = 0; |
28197 | flag_V = flag_C = 0; |
28198 | res = 0; |
28199 | DREGu32((Opcode >> 9) & 7) = res; |
28200 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28201 | goto end81DF; |
70357ce5 |
28202 | #endif |
28203 | RET(54) |
28204 | } |
28205 | { |
28206 | s32 q, r; |
28207 | |
28208 | q = (s32)dst / (s32)src; |
28209 | r = (s32)dst % (s32)src; |
28210 | |
28211 | if ((q > 0x7FFF) || (q < -0x8000)) |
28212 | { |
28213 | flag_V = M68K_SR_V; |
28214 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28215 | goto end81DF; |
70357ce5 |
28216 | #endif |
28217 | RET(84) |
28218 | } |
28219 | q &= 0x0000FFFF; |
28220 | flag_NotZ = q; |
28221 | flag_N = q >> 8; |
28222 | flag_V = flag_C = 0; |
28223 | res = q | (r << 16); |
28224 | DREGu32((Opcode >> 9) & 7) = res; |
28225 | } |
28226 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28227 | end81DF: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28228 | #endif |
28229 | RET(112) |
28230 | } |
28231 | |
28232 | // DIVS |
28233 | OPCODE(0x81E7) |
28234 | { |
28235 | u32 adr, res; |
28236 | u32 src, dst; |
28237 | |
28238 | adr = AREG(7) - 2; |
28239 | AREG(7) = adr; |
28240 | PRE_IO |
28241 | READSX_WORD_F(adr, src) |
28242 | if (src == 0) |
28243 | { |
d0ae0cb4 |
28244 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28245 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28246 | goto end81E7; |
70357ce5 |
28247 | #endif |
28248 | RET(16) |
28249 | } |
28250 | dst = DREGu32((Opcode >> 9) & 7); |
28251 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28252 | { |
28253 | flag_NotZ = flag_N = 0; |
28254 | flag_V = flag_C = 0; |
28255 | res = 0; |
28256 | DREGu32((Opcode >> 9) & 7) = res; |
28257 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28258 | goto end81E7; |
70357ce5 |
28259 | #endif |
28260 | RET(56) |
28261 | } |
28262 | { |
28263 | s32 q, r; |
28264 | |
28265 | q = (s32)dst / (s32)src; |
28266 | r = (s32)dst % (s32)src; |
28267 | |
28268 | if ((q > 0x7FFF) || (q < -0x8000)) |
28269 | { |
28270 | flag_V = M68K_SR_V; |
28271 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28272 | goto end81E7; |
70357ce5 |
28273 | #endif |
28274 | RET(86) |
28275 | } |
28276 | q &= 0x0000FFFF; |
28277 | flag_NotZ = q; |
28278 | flag_N = q >> 8; |
28279 | flag_V = flag_C = 0; |
28280 | res = q | (r << 16); |
28281 | DREGu32((Opcode >> 9) & 7) = res; |
28282 | } |
28283 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28284 | end81E7: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28285 | #endif |
28286 | RET(114) |
28287 | } |
28288 | |
28289 | // SUBaD |
28290 | OPCODE(0x9000) |
28291 | { |
28292 | u32 adr, res; |
28293 | u32 src, dst; |
28294 | |
28295 | src = DREGu8((Opcode >> 0) & 7); |
28296 | dst = DREGu8((Opcode >> 9) & 7); |
28297 | res = dst - src; |
28298 | flag_N = flag_X = flag_C = res; |
28299 | flag_V = (src ^ dst) & (res ^ dst); |
28300 | flag_NotZ = res & 0xFF; |
28301 | DREGu8((Opcode >> 9) & 7) = res; |
28302 | RET(4) |
28303 | } |
28304 | |
28305 | // SUBaD |
03e4f2a3 |
28306 | #if 0 |
70357ce5 |
28307 | OPCODE(0x9008) |
28308 | { |
28309 | u32 adr, res; |
28310 | u32 src, dst; |
28311 | |
28312 | // can't read byte from Ax registers ! |
28313 | m68kcontext.execinfo |= M68K_FAULTED; |
28314 | m68kcontext.io_cycle_counter = 0; |
28315 | /* |
28316 | goto famec_Exec_End; |
28317 | dst = DREGu8((Opcode >> 9) & 7); |
28318 | res = dst - src; |
28319 | flag_N = flag_X = flag_C = res; |
28320 | flag_V = (src ^ dst) & (res ^ dst); |
28321 | flag_NotZ = res & 0xFF; |
28322 | DREGu8((Opcode >> 9) & 7) = res; |
28323 | */ |
28324 | RET(4) |
28325 | } |
03e4f2a3 |
28326 | #endif |
70357ce5 |
28327 | |
28328 | // SUBaD |
28329 | OPCODE(0x9010) |
28330 | { |
28331 | u32 adr, res; |
28332 | u32 src, dst; |
28333 | |
28334 | adr = AREG((Opcode >> 0) & 7); |
28335 | PRE_IO |
28336 | READ_BYTE_F(adr, src) |
28337 | dst = DREGu8((Opcode >> 9) & 7); |
28338 | res = dst - src; |
28339 | flag_N = flag_X = flag_C = res; |
28340 | flag_V = (src ^ dst) & (res ^ dst); |
28341 | flag_NotZ = res & 0xFF; |
28342 | DREGu8((Opcode >> 9) & 7) = res; |
28343 | POST_IO |
28344 | RET(8) |
28345 | } |
28346 | |
28347 | // SUBaD |
28348 | OPCODE(0x9018) |
28349 | { |
28350 | u32 adr, res; |
28351 | u32 src, dst; |
28352 | |
28353 | adr = AREG((Opcode >> 0) & 7); |
28354 | AREG((Opcode >> 0) & 7) += 1; |
28355 | PRE_IO |
28356 | READ_BYTE_F(adr, src) |
28357 | dst = DREGu8((Opcode >> 9) & 7); |
28358 | res = dst - src; |
28359 | flag_N = flag_X = flag_C = res; |
28360 | flag_V = (src ^ dst) & (res ^ dst); |
28361 | flag_NotZ = res & 0xFF; |
28362 | DREGu8((Opcode >> 9) & 7) = res; |
28363 | POST_IO |
28364 | RET(8) |
28365 | } |
28366 | |
28367 | // SUBaD |
28368 | OPCODE(0x9020) |
28369 | { |
28370 | u32 adr, res; |
28371 | u32 src, dst; |
28372 | |
28373 | adr = AREG((Opcode >> 0) & 7) - 1; |
28374 | AREG((Opcode >> 0) & 7) = adr; |
28375 | PRE_IO |
28376 | READ_BYTE_F(adr, src) |
28377 | dst = DREGu8((Opcode >> 9) & 7); |
28378 | res = dst - src; |
28379 | flag_N = flag_X = flag_C = res; |
28380 | flag_V = (src ^ dst) & (res ^ dst); |
28381 | flag_NotZ = res & 0xFF; |
28382 | DREGu8((Opcode >> 9) & 7) = res; |
28383 | POST_IO |
28384 | RET(10) |
28385 | } |
28386 | |
28387 | // SUBaD |
28388 | OPCODE(0x9028) |
28389 | { |
28390 | u32 adr, res; |
28391 | u32 src, dst; |
28392 | |
28393 | FETCH_SWORD(adr); |
28394 | adr += AREG((Opcode >> 0) & 7); |
28395 | PRE_IO |
28396 | READ_BYTE_F(adr, src) |
28397 | dst = DREGu8((Opcode >> 9) & 7); |
28398 | res = dst - src; |
28399 | flag_N = flag_X = flag_C = res; |
28400 | flag_V = (src ^ dst) & (res ^ dst); |
28401 | flag_NotZ = res & 0xFF; |
28402 | DREGu8((Opcode >> 9) & 7) = res; |
28403 | POST_IO |
28404 | RET(12) |
28405 | } |
28406 | |
28407 | // SUBaD |
28408 | OPCODE(0x9030) |
28409 | { |
28410 | u32 adr, res; |
28411 | u32 src, dst; |
28412 | |
28413 | adr = AREG((Opcode >> 0) & 7); |
28414 | DECODE_EXT_WORD |
28415 | PRE_IO |
28416 | READ_BYTE_F(adr, src) |
28417 | dst = DREGu8((Opcode >> 9) & 7); |
28418 | res = dst - src; |
28419 | flag_N = flag_X = flag_C = res; |
28420 | flag_V = (src ^ dst) & (res ^ dst); |
28421 | flag_NotZ = res & 0xFF; |
28422 | DREGu8((Opcode >> 9) & 7) = res; |
28423 | POST_IO |
28424 | RET(14) |
28425 | } |
28426 | |
28427 | // SUBaD |
28428 | OPCODE(0x9038) |
28429 | { |
28430 | u32 adr, res; |
28431 | u32 src, dst; |
28432 | |
28433 | FETCH_SWORD(adr); |
28434 | PRE_IO |
28435 | READ_BYTE_F(adr, src) |
28436 | dst = DREGu8((Opcode >> 9) & 7); |
28437 | res = dst - src; |
28438 | flag_N = flag_X = flag_C = res; |
28439 | flag_V = (src ^ dst) & (res ^ dst); |
28440 | flag_NotZ = res & 0xFF; |
28441 | DREGu8((Opcode >> 9) & 7) = res; |
28442 | POST_IO |
28443 | RET(12) |
28444 | } |
28445 | |
28446 | // SUBaD |
28447 | OPCODE(0x9039) |
28448 | { |
28449 | u32 adr, res; |
28450 | u32 src, dst; |
28451 | |
28452 | FETCH_LONG(adr); |
28453 | PRE_IO |
28454 | READ_BYTE_F(adr, src) |
28455 | dst = DREGu8((Opcode >> 9) & 7); |
28456 | res = dst - src; |
28457 | flag_N = flag_X = flag_C = res; |
28458 | flag_V = (src ^ dst) & (res ^ dst); |
28459 | flag_NotZ = res & 0xFF; |
28460 | DREGu8((Opcode >> 9) & 7) = res; |
28461 | POST_IO |
28462 | RET(16) |
28463 | } |
28464 | |
28465 | // SUBaD |
28466 | OPCODE(0x903A) |
28467 | { |
28468 | u32 adr, res; |
28469 | u32 src, dst; |
28470 | |
28471 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28472 | PC++; |
28473 | PRE_IO |
28474 | READ_BYTE_F(adr, src) |
28475 | dst = DREGu8((Opcode >> 9) & 7); |
28476 | res = dst - src; |
28477 | flag_N = flag_X = flag_C = res; |
28478 | flag_V = (src ^ dst) & (res ^ dst); |
28479 | flag_NotZ = res & 0xFF; |
28480 | DREGu8((Opcode >> 9) & 7) = res; |
28481 | POST_IO |
28482 | RET(12) |
28483 | } |
28484 | |
28485 | // SUBaD |
28486 | OPCODE(0x903B) |
28487 | { |
28488 | u32 adr, res; |
28489 | u32 src, dst; |
28490 | |
28491 | adr = (u32)(PC) - BasePC; |
28492 | DECODE_EXT_WORD |
28493 | PRE_IO |
28494 | READ_BYTE_F(adr, src) |
28495 | dst = DREGu8((Opcode >> 9) & 7); |
28496 | res = dst - src; |
28497 | flag_N = flag_X = flag_C = res; |
28498 | flag_V = (src ^ dst) & (res ^ dst); |
28499 | flag_NotZ = res & 0xFF; |
28500 | DREGu8((Opcode >> 9) & 7) = res; |
28501 | POST_IO |
28502 | RET(14) |
28503 | } |
28504 | |
28505 | // SUBaD |
28506 | OPCODE(0x903C) |
28507 | { |
28508 | u32 adr, res; |
28509 | u32 src, dst; |
28510 | |
28511 | FETCH_BYTE(src); |
28512 | dst = DREGu8((Opcode >> 9) & 7); |
28513 | res = dst - src; |
28514 | flag_N = flag_X = flag_C = res; |
28515 | flag_V = (src ^ dst) & (res ^ dst); |
28516 | flag_NotZ = res & 0xFF; |
28517 | DREGu8((Opcode >> 9) & 7) = res; |
28518 | RET(8) |
28519 | } |
28520 | |
28521 | // SUBaD |
28522 | OPCODE(0x901F) |
28523 | { |
28524 | u32 adr, res; |
28525 | u32 src, dst; |
28526 | |
28527 | adr = AREG(7); |
28528 | AREG(7) += 2; |
28529 | PRE_IO |
28530 | READ_BYTE_F(adr, src) |
28531 | dst = DREGu8((Opcode >> 9) & 7); |
28532 | res = dst - src; |
28533 | flag_N = flag_X = flag_C = res; |
28534 | flag_V = (src ^ dst) & (res ^ dst); |
28535 | flag_NotZ = res & 0xFF; |
28536 | DREGu8((Opcode >> 9) & 7) = res; |
28537 | POST_IO |
28538 | RET(8) |
28539 | } |
28540 | |
28541 | // SUBaD |
28542 | OPCODE(0x9027) |
28543 | { |
28544 | u32 adr, res; |
28545 | u32 src, dst; |
28546 | |
28547 | adr = AREG(7) - 2; |
28548 | AREG(7) = adr; |
28549 | PRE_IO |
28550 | READ_BYTE_F(adr, src) |
28551 | dst = DREGu8((Opcode >> 9) & 7); |
28552 | res = dst - src; |
28553 | flag_N = flag_X = flag_C = res; |
28554 | flag_V = (src ^ dst) & (res ^ dst); |
28555 | flag_NotZ = res & 0xFF; |
28556 | DREGu8((Opcode >> 9) & 7) = res; |
28557 | POST_IO |
28558 | RET(10) |
28559 | } |
28560 | |
28561 | // SUBaD |
28562 | OPCODE(0x9040) |
28563 | { |
28564 | u32 adr, res; |
28565 | u32 src, dst; |
28566 | |
28567 | src = DREGu16((Opcode >> 0) & 7); |
28568 | dst = DREGu16((Opcode >> 9) & 7); |
28569 | res = dst - src; |
28570 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28571 | flag_N = flag_X = flag_C = res >> 8; |
28572 | flag_NotZ = res & 0xFFFF; |
28573 | DREGu16((Opcode >> 9) & 7) = res; |
28574 | RET(4) |
28575 | } |
28576 | |
28577 | // SUBaD |
28578 | OPCODE(0x9048) |
28579 | { |
28580 | u32 adr, res; |
28581 | u32 src, dst; |
28582 | |
28583 | src = AREGu16((Opcode >> 0) & 7); |
28584 | dst = DREGu16((Opcode >> 9) & 7); |
28585 | res = dst - src; |
28586 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28587 | flag_N = flag_X = flag_C = res >> 8; |
28588 | flag_NotZ = res & 0xFFFF; |
28589 | DREGu16((Opcode >> 9) & 7) = res; |
28590 | RET(4) |
28591 | } |
28592 | |
28593 | // SUBaD |
28594 | OPCODE(0x9050) |
28595 | { |
28596 | u32 adr, res; |
28597 | u32 src, dst; |
28598 | |
28599 | adr = AREG((Opcode >> 0) & 7); |
28600 | PRE_IO |
28601 | READ_WORD_F(adr, src) |
28602 | dst = DREGu16((Opcode >> 9) & 7); |
28603 | res = dst - src; |
28604 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28605 | flag_N = flag_X = flag_C = res >> 8; |
28606 | flag_NotZ = res & 0xFFFF; |
28607 | DREGu16((Opcode >> 9) & 7) = res; |
28608 | POST_IO |
28609 | RET(8) |
28610 | } |
28611 | |
28612 | // SUBaD |
28613 | OPCODE(0x9058) |
28614 | { |
28615 | u32 adr, res; |
28616 | u32 src, dst; |
28617 | |
28618 | adr = AREG((Opcode >> 0) & 7); |
28619 | AREG((Opcode >> 0) & 7) += 2; |
28620 | PRE_IO |
28621 | READ_WORD_F(adr, src) |
28622 | dst = DREGu16((Opcode >> 9) & 7); |
28623 | res = dst - src; |
28624 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28625 | flag_N = flag_X = flag_C = res >> 8; |
28626 | flag_NotZ = res & 0xFFFF; |
28627 | DREGu16((Opcode >> 9) & 7) = res; |
28628 | POST_IO |
28629 | RET(8) |
28630 | } |
28631 | |
28632 | // SUBaD |
28633 | OPCODE(0x9060) |
28634 | { |
28635 | u32 adr, res; |
28636 | u32 src, dst; |
28637 | |
28638 | adr = AREG((Opcode >> 0) & 7) - 2; |
28639 | AREG((Opcode >> 0) & 7) = adr; |
28640 | PRE_IO |
28641 | READ_WORD_F(adr, src) |
28642 | dst = DREGu16((Opcode >> 9) & 7); |
28643 | res = dst - src; |
28644 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28645 | flag_N = flag_X = flag_C = res >> 8; |
28646 | flag_NotZ = res & 0xFFFF; |
28647 | DREGu16((Opcode >> 9) & 7) = res; |
28648 | POST_IO |
28649 | RET(10) |
28650 | } |
28651 | |
28652 | // SUBaD |
28653 | OPCODE(0x9068) |
28654 | { |
28655 | u32 adr, res; |
28656 | u32 src, dst; |
28657 | |
28658 | FETCH_SWORD(adr); |
28659 | adr += AREG((Opcode >> 0) & 7); |
28660 | PRE_IO |
28661 | READ_WORD_F(adr, src) |
28662 | dst = DREGu16((Opcode >> 9) & 7); |
28663 | res = dst - src; |
28664 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28665 | flag_N = flag_X = flag_C = res >> 8; |
28666 | flag_NotZ = res & 0xFFFF; |
28667 | DREGu16((Opcode >> 9) & 7) = res; |
28668 | POST_IO |
28669 | RET(12) |
28670 | } |
28671 | |
28672 | // SUBaD |
28673 | OPCODE(0x9070) |
28674 | { |
28675 | u32 adr, res; |
28676 | u32 src, dst; |
28677 | |
28678 | adr = AREG((Opcode >> 0) & 7); |
28679 | DECODE_EXT_WORD |
28680 | PRE_IO |
28681 | READ_WORD_F(adr, src) |
28682 | dst = DREGu16((Opcode >> 9) & 7); |
28683 | res = dst - src; |
28684 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28685 | flag_N = flag_X = flag_C = res >> 8; |
28686 | flag_NotZ = res & 0xFFFF; |
28687 | DREGu16((Opcode >> 9) & 7) = res; |
28688 | POST_IO |
28689 | RET(14) |
28690 | } |
28691 | |
28692 | // SUBaD |
28693 | OPCODE(0x9078) |
28694 | { |
28695 | u32 adr, res; |
28696 | u32 src, dst; |
28697 | |
28698 | FETCH_SWORD(adr); |
28699 | PRE_IO |
28700 | READ_WORD_F(adr, src) |
28701 | dst = DREGu16((Opcode >> 9) & 7); |
28702 | res = dst - src; |
28703 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28704 | flag_N = flag_X = flag_C = res >> 8; |
28705 | flag_NotZ = res & 0xFFFF; |
28706 | DREGu16((Opcode >> 9) & 7) = res; |
28707 | POST_IO |
28708 | RET(12) |
28709 | } |
28710 | |
28711 | // SUBaD |
28712 | OPCODE(0x9079) |
28713 | { |
28714 | u32 adr, res; |
28715 | u32 src, dst; |
28716 | |
28717 | FETCH_LONG(adr); |
28718 | PRE_IO |
28719 | READ_WORD_F(adr, src) |
28720 | dst = DREGu16((Opcode >> 9) & 7); |
28721 | res = dst - src; |
28722 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28723 | flag_N = flag_X = flag_C = res >> 8; |
28724 | flag_NotZ = res & 0xFFFF; |
28725 | DREGu16((Opcode >> 9) & 7) = res; |
28726 | POST_IO |
28727 | RET(16) |
28728 | } |
28729 | |
28730 | // SUBaD |
28731 | OPCODE(0x907A) |
28732 | { |
28733 | u32 adr, res; |
28734 | u32 src, dst; |
28735 | |
28736 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28737 | PC++; |
28738 | PRE_IO |
28739 | READ_WORD_F(adr, src) |
28740 | dst = DREGu16((Opcode >> 9) & 7); |
28741 | res = dst - src; |
28742 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28743 | flag_N = flag_X = flag_C = res >> 8; |
28744 | flag_NotZ = res & 0xFFFF; |
28745 | DREGu16((Opcode >> 9) & 7) = res; |
28746 | POST_IO |
28747 | RET(12) |
28748 | } |
28749 | |
28750 | // SUBaD |
28751 | OPCODE(0x907B) |
28752 | { |
28753 | u32 adr, res; |
28754 | u32 src, dst; |
28755 | |
28756 | adr = (u32)(PC) - BasePC; |
28757 | DECODE_EXT_WORD |
28758 | PRE_IO |
28759 | READ_WORD_F(adr, src) |
28760 | dst = DREGu16((Opcode >> 9) & 7); |
28761 | res = dst - src; |
28762 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28763 | flag_N = flag_X = flag_C = res >> 8; |
28764 | flag_NotZ = res & 0xFFFF; |
28765 | DREGu16((Opcode >> 9) & 7) = res; |
28766 | POST_IO |
28767 | RET(14) |
28768 | } |
28769 | |
28770 | // SUBaD |
28771 | OPCODE(0x907C) |
28772 | { |
28773 | u32 adr, res; |
28774 | u32 src, dst; |
28775 | |
28776 | FETCH_WORD(src); |
28777 | dst = DREGu16((Opcode >> 9) & 7); |
28778 | res = dst - src; |
28779 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28780 | flag_N = flag_X = flag_C = res >> 8; |
28781 | flag_NotZ = res & 0xFFFF; |
28782 | DREGu16((Opcode >> 9) & 7) = res; |
28783 | RET(8) |
28784 | } |
28785 | |
28786 | // SUBaD |
28787 | OPCODE(0x905F) |
28788 | { |
28789 | u32 adr, res; |
28790 | u32 src, dst; |
28791 | |
28792 | adr = AREG(7); |
28793 | AREG(7) += 2; |
28794 | PRE_IO |
28795 | READ_WORD_F(adr, src) |
28796 | dst = DREGu16((Opcode >> 9) & 7); |
28797 | res = dst - src; |
28798 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28799 | flag_N = flag_X = flag_C = res >> 8; |
28800 | flag_NotZ = res & 0xFFFF; |
28801 | DREGu16((Opcode >> 9) & 7) = res; |
28802 | POST_IO |
28803 | RET(8) |
28804 | } |
28805 | |
28806 | // SUBaD |
28807 | OPCODE(0x9067) |
28808 | { |
28809 | u32 adr, res; |
28810 | u32 src, dst; |
28811 | |
28812 | adr = AREG(7) - 2; |
28813 | AREG(7) = adr; |
28814 | PRE_IO |
28815 | READ_WORD_F(adr, src) |
28816 | dst = DREGu16((Opcode >> 9) & 7); |
28817 | res = dst - src; |
28818 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28819 | flag_N = flag_X = flag_C = res >> 8; |
28820 | flag_NotZ = res & 0xFFFF; |
28821 | DREGu16((Opcode >> 9) & 7) = res; |
28822 | POST_IO |
28823 | RET(10) |
28824 | } |
28825 | |
28826 | // SUBaD |
28827 | OPCODE(0x9080) |
28828 | { |
28829 | u32 adr, res; |
28830 | u32 src, dst; |
28831 | |
28832 | src = DREGu32((Opcode >> 0) & 7); |
28833 | dst = DREGu32((Opcode >> 9) & 7); |
28834 | res = dst - src; |
28835 | flag_NotZ = res; |
28836 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28837 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28838 | flag_N = res >> 24; |
28839 | DREGu32((Opcode >> 9) & 7) = res; |
28840 | RET(8) |
28841 | } |
28842 | |
28843 | // SUBaD |
28844 | OPCODE(0x9088) |
28845 | { |
28846 | u32 adr, res; |
28847 | u32 src, dst; |
28848 | |
28849 | src = AREGu32((Opcode >> 0) & 7); |
28850 | dst = DREGu32((Opcode >> 9) & 7); |
28851 | res = dst - src; |
28852 | flag_NotZ = res; |
28853 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28854 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28855 | flag_N = res >> 24; |
28856 | DREGu32((Opcode >> 9) & 7) = res; |
28857 | RET(8) |
28858 | } |
28859 | |
28860 | // SUBaD |
28861 | OPCODE(0x9090) |
28862 | { |
28863 | u32 adr, res; |
28864 | u32 src, dst; |
28865 | |
28866 | adr = AREG((Opcode >> 0) & 7); |
28867 | PRE_IO |
28868 | READ_LONG_F(adr, src) |
28869 | dst = DREGu32((Opcode >> 9) & 7); |
28870 | res = dst - src; |
28871 | flag_NotZ = res; |
28872 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28873 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28874 | flag_N = res >> 24; |
28875 | DREGu32((Opcode >> 9) & 7) = res; |
28876 | POST_IO |
28877 | RET(14) |
28878 | } |
28879 | |
28880 | // SUBaD |
28881 | OPCODE(0x9098) |
28882 | { |
28883 | u32 adr, res; |
28884 | u32 src, dst; |
28885 | |
28886 | adr = AREG((Opcode >> 0) & 7); |
28887 | AREG((Opcode >> 0) & 7) += 4; |
28888 | PRE_IO |
28889 | READ_LONG_F(adr, src) |
28890 | dst = DREGu32((Opcode >> 9) & 7); |
28891 | res = dst - src; |
28892 | flag_NotZ = res; |
28893 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28894 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28895 | flag_N = res >> 24; |
28896 | DREGu32((Opcode >> 9) & 7) = res; |
28897 | POST_IO |
28898 | RET(14) |
28899 | } |
28900 | |
28901 | // SUBaD |
28902 | OPCODE(0x90A0) |
28903 | { |
28904 | u32 adr, res; |
28905 | u32 src, dst; |
28906 | |
28907 | adr = AREG((Opcode >> 0) & 7) - 4; |
28908 | AREG((Opcode >> 0) & 7) = adr; |
28909 | PRE_IO |
28910 | READ_LONG_F(adr, src) |
28911 | dst = DREGu32((Opcode >> 9) & 7); |
28912 | res = dst - src; |
28913 | flag_NotZ = res; |
28914 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28915 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28916 | flag_N = res >> 24; |
28917 | DREGu32((Opcode >> 9) & 7) = res; |
28918 | POST_IO |
28919 | RET(16) |
28920 | } |
28921 | |
28922 | // SUBaD |
28923 | OPCODE(0x90A8) |
28924 | { |
28925 | u32 adr, res; |
28926 | u32 src, dst; |
28927 | |
28928 | FETCH_SWORD(adr); |
28929 | adr += AREG((Opcode >> 0) & 7); |
28930 | PRE_IO |
28931 | READ_LONG_F(adr, src) |
28932 | dst = DREGu32((Opcode >> 9) & 7); |
28933 | res = dst - src; |
28934 | flag_NotZ = res; |
28935 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28936 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28937 | flag_N = res >> 24; |
28938 | DREGu32((Opcode >> 9) & 7) = res; |
28939 | POST_IO |
28940 | RET(18) |
28941 | } |
28942 | |
28943 | // SUBaD |
28944 | OPCODE(0x90B0) |
28945 | { |
28946 | u32 adr, res; |
28947 | u32 src, dst; |
28948 | |
28949 | adr = AREG((Opcode >> 0) & 7); |
28950 | DECODE_EXT_WORD |
28951 | PRE_IO |
28952 | READ_LONG_F(adr, src) |
28953 | dst = DREGu32((Opcode >> 9) & 7); |
28954 | res = dst - src; |
28955 | flag_NotZ = res; |
28956 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28957 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28958 | flag_N = res >> 24; |
28959 | DREGu32((Opcode >> 9) & 7) = res; |
28960 | POST_IO |
28961 | RET(20) |
28962 | } |
28963 | |
28964 | // SUBaD |
28965 | OPCODE(0x90B8) |
28966 | { |
28967 | u32 adr, res; |
28968 | u32 src, dst; |
28969 | |
28970 | FETCH_SWORD(adr); |
28971 | PRE_IO |
28972 | READ_LONG_F(adr, src) |
28973 | dst = DREGu32((Opcode >> 9) & 7); |
28974 | res = dst - src; |
28975 | flag_NotZ = res; |
28976 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28977 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28978 | flag_N = res >> 24; |
28979 | DREGu32((Opcode >> 9) & 7) = res; |
28980 | POST_IO |
28981 | RET(18) |
28982 | } |
28983 | |
28984 | // SUBaD |
28985 | OPCODE(0x90B9) |
28986 | { |
28987 | u32 adr, res; |
28988 | u32 src, dst; |
28989 | |
28990 | FETCH_LONG(adr); |
28991 | PRE_IO |
28992 | READ_LONG_F(adr, src) |
28993 | dst = DREGu32((Opcode >> 9) & 7); |
28994 | res = dst - src; |
28995 | flag_NotZ = res; |
28996 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28997 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28998 | flag_N = res >> 24; |
28999 | DREGu32((Opcode >> 9) & 7) = res; |
29000 | POST_IO |
29001 | RET(22) |
29002 | } |
29003 | |
29004 | // SUBaD |
29005 | OPCODE(0x90BA) |
29006 | { |
29007 | u32 adr, res; |
29008 | u32 src, dst; |
29009 | |
29010 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
29011 | PC++; |
29012 | PRE_IO |
29013 | READ_LONG_F(adr, src) |
29014 | dst = DREGu32((Opcode >> 9) & 7); |
29015 | res = dst - src; |
29016 | flag_NotZ = res; |
29017 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29018 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29019 | flag_N = res >> 24; |
29020 | DREGu32((Opcode >> 9) & 7) = res; |
29021 | POST_IO |
29022 | RET(18) |
29023 | } |
29024 | |
29025 | // SUBaD |
29026 | OPCODE(0x90BB) |
29027 | { |
29028 | u32 adr, res; |
29029 | u32 src, dst; |
29030 | |
29031 | adr = (u32)(PC) - BasePC; |
29032 | DECODE_EXT_WORD |
29033 | PRE_IO |
29034 | READ_LONG_F(adr, src) |
29035 | dst = DREGu32((Opcode >> 9) & 7); |
29036 | res = dst - src; |
29037 | flag_NotZ = res; |
29038 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29039 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29040 | flag_N = res >> 24; |
29041 | DREGu32((Opcode >> 9) & 7) = res; |
29042 | POST_IO |
29043 | RET(20) |
29044 | } |
29045 | |
29046 | // SUBaD |
29047 | OPCODE(0x90BC) |
29048 | { |
29049 | u32 adr, res; |
29050 | u32 src, dst; |
29051 | |
29052 | FETCH_LONG(src); |
29053 | dst = DREGu32((Opcode >> 9) & 7); |
29054 | res = dst - src; |
29055 | flag_NotZ = res; |
29056 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29057 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29058 | flag_N = res >> 24; |
29059 | DREGu32((Opcode >> 9) & 7) = res; |
29060 | RET(16) |
29061 | } |
29062 | |
29063 | // SUBaD |
29064 | OPCODE(0x909F) |
29065 | { |
29066 | u32 adr, res; |
29067 | u32 src, dst; |
29068 | |
29069 | adr = AREG(7); |
29070 | AREG(7) += 4; |
29071 | PRE_IO |
29072 | READ_LONG_F(adr, src) |
29073 | dst = DREGu32((Opcode >> 9) & 7); |
29074 | res = dst - src; |
29075 | flag_NotZ = res; |
29076 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29077 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29078 | flag_N = res >> 24; |
29079 | DREGu32((Opcode >> 9) & 7) = res; |
29080 | POST_IO |
29081 | RET(14) |
29082 | } |
29083 | |
29084 | // SUBaD |
29085 | OPCODE(0x90A7) |
29086 | { |
29087 | u32 adr, res; |
29088 | u32 src, dst; |
29089 | |
29090 | adr = AREG(7) - 4; |
29091 | AREG(7) = adr; |
29092 | PRE_IO |
29093 | READ_LONG_F(adr, src) |
29094 | dst = DREGu32((Opcode >> 9) & 7); |
29095 | res = dst - src; |
29096 | flag_NotZ = res; |
29097 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29098 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29099 | flag_N = res >> 24; |
29100 | DREGu32((Opcode >> 9) & 7) = res; |
29101 | POST_IO |
29102 | RET(16) |
29103 | } |
29104 | |
29105 | // SUBDa |
29106 | OPCODE(0x9110) |
29107 | { |
29108 | u32 adr, res; |
29109 | u32 src, dst; |
29110 | |
29111 | src = DREGu8((Opcode >> 9) & 7); |
29112 | adr = AREG((Opcode >> 0) & 7); |
29113 | PRE_IO |
29114 | READ_BYTE_F(adr, dst) |
29115 | res = dst - src; |
29116 | flag_N = flag_X = flag_C = res; |
29117 | flag_V = (src ^ dst) & (res ^ dst); |
29118 | flag_NotZ = res & 0xFF; |
29119 | WRITE_BYTE_F(adr, res) |
29120 | POST_IO |
29121 | RET(12) |
29122 | } |
29123 | |
29124 | // SUBDa |
29125 | OPCODE(0x9118) |
29126 | { |
29127 | u32 adr, res; |
29128 | u32 src, dst; |
29129 | |
29130 | src = DREGu8((Opcode >> 9) & 7); |
29131 | adr = AREG((Opcode >> 0) & 7); |
29132 | AREG((Opcode >> 0) & 7) += 1; |
29133 | PRE_IO |
29134 | READ_BYTE_F(adr, dst) |
29135 | res = dst - src; |
29136 | flag_N = flag_X = flag_C = res; |
29137 | flag_V = (src ^ dst) & (res ^ dst); |
29138 | flag_NotZ = res & 0xFF; |
29139 | WRITE_BYTE_F(adr, res) |
29140 | POST_IO |
29141 | RET(12) |
29142 | } |
29143 | |
29144 | // SUBDa |
29145 | OPCODE(0x9120) |
29146 | { |
29147 | u32 adr, res; |
29148 | u32 src, dst; |
29149 | |
29150 | src = DREGu8((Opcode >> 9) & 7); |
29151 | adr = AREG((Opcode >> 0) & 7) - 1; |
29152 | AREG((Opcode >> 0) & 7) = adr; |
29153 | PRE_IO |
29154 | READ_BYTE_F(adr, dst) |
29155 | res = dst - src; |
29156 | flag_N = flag_X = flag_C = res; |
29157 | flag_V = (src ^ dst) & (res ^ dst); |
29158 | flag_NotZ = res & 0xFF; |
29159 | WRITE_BYTE_F(adr, res) |
29160 | POST_IO |
29161 | RET(14) |
29162 | } |
29163 | |
29164 | // SUBDa |
29165 | OPCODE(0x9128) |
29166 | { |
29167 | u32 adr, res; |
29168 | u32 src, dst; |
29169 | |
29170 | src = DREGu8((Opcode >> 9) & 7); |
29171 | FETCH_SWORD(adr); |
29172 | adr += AREG((Opcode >> 0) & 7); |
29173 | PRE_IO |
29174 | READ_BYTE_F(adr, dst) |
29175 | res = dst - src; |
29176 | flag_N = flag_X = flag_C = res; |
29177 | flag_V = (src ^ dst) & (res ^ dst); |
29178 | flag_NotZ = res & 0xFF; |
29179 | WRITE_BYTE_F(adr, res) |
29180 | POST_IO |
29181 | RET(16) |
29182 | } |
29183 | |
29184 | // SUBDa |
29185 | OPCODE(0x9130) |
29186 | { |
29187 | u32 adr, res; |
29188 | u32 src, dst; |
29189 | |
29190 | src = DREGu8((Opcode >> 9) & 7); |
29191 | adr = AREG((Opcode >> 0) & 7); |
29192 | DECODE_EXT_WORD |
29193 | PRE_IO |
29194 | READ_BYTE_F(adr, dst) |
29195 | res = dst - src; |
29196 | flag_N = flag_X = flag_C = res; |
29197 | flag_V = (src ^ dst) & (res ^ dst); |
29198 | flag_NotZ = res & 0xFF; |
29199 | WRITE_BYTE_F(adr, res) |
29200 | POST_IO |
29201 | RET(18) |
29202 | } |
29203 | |
29204 | // SUBDa |
29205 | OPCODE(0x9138) |
29206 | { |
29207 | u32 adr, res; |
29208 | u32 src, dst; |
29209 | |
29210 | src = DREGu8((Opcode >> 9) & 7); |
29211 | FETCH_SWORD(adr); |
29212 | PRE_IO |
29213 | READ_BYTE_F(adr, dst) |
29214 | res = dst - src; |
29215 | flag_N = flag_X = flag_C = res; |
29216 | flag_V = (src ^ dst) & (res ^ dst); |
29217 | flag_NotZ = res & 0xFF; |
29218 | WRITE_BYTE_F(adr, res) |
29219 | POST_IO |
29220 | RET(16) |
29221 | } |
29222 | |
29223 | // SUBDa |
29224 | OPCODE(0x9139) |
29225 | { |
29226 | u32 adr, res; |
29227 | u32 src, dst; |
29228 | |
29229 | src = DREGu8((Opcode >> 9) & 7); |
29230 | FETCH_LONG(adr); |
29231 | PRE_IO |
29232 | READ_BYTE_F(adr, dst) |
29233 | res = dst - src; |
29234 | flag_N = flag_X = flag_C = res; |
29235 | flag_V = (src ^ dst) & (res ^ dst); |
29236 | flag_NotZ = res & 0xFF; |
29237 | WRITE_BYTE_F(adr, res) |
29238 | POST_IO |
29239 | RET(20) |
29240 | } |
29241 | |
29242 | // SUBDa |
29243 | OPCODE(0x911F) |
29244 | { |
29245 | u32 adr, res; |
29246 | u32 src, dst; |
29247 | |
29248 | src = DREGu8((Opcode >> 9) & 7); |
29249 | adr = AREG(7); |
29250 | AREG(7) += 2; |
29251 | PRE_IO |
29252 | READ_BYTE_F(adr, dst) |
29253 | res = dst - src; |
29254 | flag_N = flag_X = flag_C = res; |
29255 | flag_V = (src ^ dst) & (res ^ dst); |
29256 | flag_NotZ = res & 0xFF; |
29257 | WRITE_BYTE_F(adr, res) |
29258 | POST_IO |
29259 | RET(12) |
29260 | } |
29261 | |
29262 | // SUBDa |
29263 | OPCODE(0x9127) |
29264 | { |
29265 | u32 adr, res; |
29266 | u32 src, dst; |
29267 | |
29268 | src = DREGu8((Opcode >> 9) & 7); |
29269 | adr = AREG(7) - 2; |
29270 | AREG(7) = adr; |
29271 | PRE_IO |
29272 | READ_BYTE_F(adr, dst) |
29273 | res = dst - src; |
29274 | flag_N = flag_X = flag_C = res; |
29275 | flag_V = (src ^ dst) & (res ^ dst); |
29276 | flag_NotZ = res & 0xFF; |
29277 | WRITE_BYTE_F(adr, res) |
29278 | POST_IO |
29279 | RET(14) |
29280 | } |
29281 | |
29282 | // SUBDa |
29283 | OPCODE(0x9150) |
29284 | { |
29285 | u32 adr, res; |
29286 | u32 src, dst; |
29287 | |
29288 | src = DREGu16((Opcode >> 9) & 7); |
29289 | adr = AREG((Opcode >> 0) & 7); |
29290 | PRE_IO |
29291 | READ_WORD_F(adr, dst) |
29292 | res = dst - src; |
29293 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29294 | flag_N = flag_X = flag_C = res >> 8; |
29295 | flag_NotZ = res & 0xFFFF; |
29296 | WRITE_WORD_F(adr, res) |
29297 | POST_IO |
29298 | RET(12) |
29299 | } |
29300 | |
29301 | // SUBDa |
29302 | OPCODE(0x9158) |
29303 | { |
29304 | u32 adr, res; |
29305 | u32 src, dst; |
29306 | |
29307 | src = DREGu16((Opcode >> 9) & 7); |
29308 | adr = AREG((Opcode >> 0) & 7); |
29309 | AREG((Opcode >> 0) & 7) += 2; |
29310 | PRE_IO |
29311 | READ_WORD_F(adr, dst) |
29312 | res = dst - src; |
29313 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29314 | flag_N = flag_X = flag_C = res >> 8; |
29315 | flag_NotZ = res & 0xFFFF; |
29316 | WRITE_WORD_F(adr, res) |
29317 | POST_IO |
29318 | RET(12) |
29319 | } |
29320 | |
29321 | // SUBDa |
29322 | OPCODE(0x9160) |
29323 | { |
29324 | u32 adr, res; |
29325 | u32 src, dst; |
29326 | |
29327 | src = DREGu16((Opcode >> 9) & 7); |
29328 | adr = AREG((Opcode >> 0) & 7) - 2; |
29329 | AREG((Opcode >> 0) & 7) = adr; |
29330 | PRE_IO |
29331 | READ_WORD_F(adr, dst) |
29332 | res = dst - src; |
29333 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29334 | flag_N = flag_X = flag_C = res >> 8; |
29335 | flag_NotZ = res & 0xFFFF; |
29336 | WRITE_WORD_F(adr, res) |
29337 | POST_IO |
29338 | RET(14) |
29339 | } |
29340 | |
29341 | // SUBDa |
29342 | OPCODE(0x9168) |
29343 | { |
29344 | u32 adr, res; |
29345 | u32 src, dst; |
29346 | |
29347 | src = DREGu16((Opcode >> 9) & 7); |
29348 | FETCH_SWORD(adr); |
29349 | adr += AREG((Opcode >> 0) & 7); |
29350 | PRE_IO |
29351 | READ_WORD_F(adr, dst) |
29352 | res = dst - src; |
29353 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29354 | flag_N = flag_X = flag_C = res >> 8; |
29355 | flag_NotZ = res & 0xFFFF; |
29356 | WRITE_WORD_F(adr, res) |
29357 | POST_IO |
29358 | RET(16) |
29359 | } |
29360 | |
29361 | // SUBDa |
29362 | OPCODE(0x9170) |
29363 | { |
29364 | u32 adr, res; |
29365 | u32 src, dst; |
29366 | |
29367 | src = DREGu16((Opcode >> 9) & 7); |
29368 | adr = AREG((Opcode >> 0) & 7); |
29369 | DECODE_EXT_WORD |
29370 | PRE_IO |
29371 | READ_WORD_F(adr, dst) |
29372 | res = dst - src; |
29373 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29374 | flag_N = flag_X = flag_C = res >> 8; |
29375 | flag_NotZ = res & 0xFFFF; |
29376 | WRITE_WORD_F(adr, res) |
29377 | POST_IO |
29378 | RET(18) |
29379 | } |
29380 | |
29381 | // SUBDa |
29382 | OPCODE(0x9178) |
29383 | { |
29384 | u32 adr, res; |
29385 | u32 src, dst; |
29386 | |
29387 | src = DREGu16((Opcode >> 9) & 7); |
29388 | FETCH_SWORD(adr); |
29389 | PRE_IO |
29390 | READ_WORD_F(adr, dst) |
29391 | res = dst - src; |
29392 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29393 | flag_N = flag_X = flag_C = res >> 8; |
29394 | flag_NotZ = res & 0xFFFF; |
29395 | WRITE_WORD_F(adr, res) |
29396 | POST_IO |
29397 | RET(16) |
29398 | } |
29399 | |
29400 | // SUBDa |
29401 | OPCODE(0x9179) |
29402 | { |
29403 | u32 adr, res; |
29404 | u32 src, dst; |
29405 | |
29406 | src = DREGu16((Opcode >> 9) & 7); |
29407 | FETCH_LONG(adr); |
29408 | PRE_IO |
29409 | READ_WORD_F(adr, dst) |
29410 | res = dst - src; |
29411 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29412 | flag_N = flag_X = flag_C = res >> 8; |
29413 | flag_NotZ = res & 0xFFFF; |
29414 | WRITE_WORD_F(adr, res) |
29415 | POST_IO |
29416 | RET(20) |
29417 | } |
29418 | |
29419 | // SUBDa |
29420 | OPCODE(0x915F) |
29421 | { |
29422 | u32 adr, res; |
29423 | u32 src, dst; |
29424 | |
29425 | src = DREGu16((Opcode >> 9) & 7); |
29426 | adr = AREG(7); |
29427 | AREG(7) += 2; |
29428 | PRE_IO |
29429 | READ_WORD_F(adr, dst) |
29430 | res = dst - src; |
29431 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29432 | flag_N = flag_X = flag_C = res >> 8; |
29433 | flag_NotZ = res & 0xFFFF; |
29434 | WRITE_WORD_F(adr, res) |
29435 | POST_IO |
29436 | RET(12) |
29437 | } |
29438 | |
29439 | // SUBDa |
29440 | OPCODE(0x9167) |
29441 | { |
29442 | u32 adr, res; |
29443 | u32 src, dst; |
29444 | |
29445 | src = DREGu16((Opcode >> 9) & 7); |
29446 | adr = AREG(7) - 2; |
29447 | AREG(7) = adr; |
29448 | PRE_IO |
29449 | READ_WORD_F(adr, dst) |
29450 | res = dst - src; |
29451 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29452 | flag_N = flag_X = flag_C = res >> 8; |
29453 | flag_NotZ = res & 0xFFFF; |
29454 | WRITE_WORD_F(adr, res) |
29455 | POST_IO |
29456 | RET(14) |
29457 | } |
29458 | |
29459 | // SUBDa |
29460 | OPCODE(0x9190) |
29461 | { |
29462 | u32 adr, res; |
29463 | u32 src, dst; |
29464 | |
29465 | src = DREGu32((Opcode >> 9) & 7); |
29466 | adr = AREG((Opcode >> 0) & 7); |
29467 | PRE_IO |
29468 | READ_LONG_F(adr, dst) |
29469 | res = dst - src; |
29470 | flag_NotZ = res; |
29471 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29472 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29473 | flag_N = res >> 24; |
29474 | WRITE_LONG_F(adr, res) |
29475 | POST_IO |
29476 | RET(20) |
29477 | } |
29478 | |
29479 | // SUBDa |
29480 | OPCODE(0x9198) |
29481 | { |
29482 | u32 adr, res; |
29483 | u32 src, dst; |
29484 | |
29485 | src = DREGu32((Opcode >> 9) & 7); |
29486 | adr = AREG((Opcode >> 0) & 7); |
29487 | AREG((Opcode >> 0) & 7) += 4; |
29488 | PRE_IO |
29489 | READ_LONG_F(adr, dst) |
29490 | res = dst - src; |
29491 | flag_NotZ = res; |
29492 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29493 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29494 | flag_N = res >> 24; |
29495 | WRITE_LONG_F(adr, res) |
29496 | POST_IO |
29497 | RET(20) |
29498 | } |
29499 | |
29500 | // SUBDa |
29501 | OPCODE(0x91A0) |
29502 | { |
29503 | u32 adr, res; |
29504 | u32 src, dst; |
29505 | |
29506 | src = DREGu32((Opcode >> 9) & 7); |
29507 | adr = AREG((Opcode >> 0) & 7) - 4; |
29508 | AREG((Opcode >> 0) & 7) = adr; |
29509 | PRE_IO |
29510 | READ_LONG_F(adr, dst) |
29511 | res = dst - src; |
29512 | flag_NotZ = res; |
29513 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29514 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29515 | flag_N = res >> 24; |
29516 | WRITE_LONG_F(adr, res) |
29517 | POST_IO |
29518 | RET(22) |
29519 | } |
29520 | |
29521 | // SUBDa |
29522 | OPCODE(0x91A8) |
29523 | { |
29524 | u32 adr, res; |
29525 | u32 src, dst; |
29526 | |
29527 | src = DREGu32((Opcode >> 9) & 7); |
29528 | FETCH_SWORD(adr); |
29529 | adr += AREG((Opcode >> 0) & 7); |
29530 | PRE_IO |
29531 | READ_LONG_F(adr, dst) |
29532 | res = dst - src; |
29533 | flag_NotZ = res; |
29534 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29535 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29536 | flag_N = res >> 24; |
29537 | WRITE_LONG_F(adr, res) |
29538 | POST_IO |
29539 | RET(24) |
29540 | } |
29541 | |
29542 | // SUBDa |
29543 | OPCODE(0x91B0) |
29544 | { |
29545 | u32 adr, res; |
29546 | u32 src, dst; |
29547 | |
29548 | src = DREGu32((Opcode >> 9) & 7); |
29549 | adr = AREG((Opcode >> 0) & 7); |
29550 | DECODE_EXT_WORD |
29551 | PRE_IO |
29552 | READ_LONG_F(adr, dst) |
29553 | res = dst - src; |
29554 | flag_NotZ = res; |
29555 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29556 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29557 | flag_N = res >> 24; |
29558 | WRITE_LONG_F(adr, res) |
29559 | POST_IO |
29560 | RET(26) |
29561 | } |
29562 | |
29563 | // SUBDa |
29564 | OPCODE(0x91B8) |
29565 | { |
29566 | u32 adr, res; |
29567 | u32 src, dst; |
29568 | |
29569 | src = DREGu32((Opcode >> 9) & 7); |
29570 | FETCH_SWORD(adr); |
29571 | PRE_IO |
29572 | READ_LONG_F(adr, dst) |
29573 | res = dst - src; |
29574 | flag_NotZ = res; |
29575 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29576 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29577 | flag_N = res >> 24; |
29578 | WRITE_LONG_F(adr, res) |
29579 | POST_IO |
29580 | RET(24) |
29581 | } |
29582 | |
29583 | // SUBDa |
29584 | OPCODE(0x91B9) |
29585 | { |
29586 | u32 adr, res; |
29587 | u32 src, dst; |
29588 | |
29589 | src = DREGu32((Opcode >> 9) & 7); |
29590 | FETCH_LONG(adr); |
29591 | PRE_IO |
29592 | READ_LONG_F(adr, dst) |
29593 | res = dst - src; |
29594 | flag_NotZ = res; |
29595 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29596 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29597 | flag_N = res >> 24; |
29598 | WRITE_LONG_F(adr, res) |
29599 | POST_IO |
29600 | RET(28) |
29601 | } |
29602 | |
29603 | // SUBDa |
29604 | OPCODE(0x919F) |
29605 | { |
29606 | u32 adr, res; |
29607 | u32 src, dst; |
29608 | |
29609 | src = DREGu32((Opcode >> 9) & 7); |
29610 | adr = AREG(7); |
29611 | AREG(7) += 4; |
29612 | PRE_IO |
29613 | READ_LONG_F(adr, dst) |
29614 | res = dst - src; |
29615 | flag_NotZ = res; |
29616 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29617 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29618 | flag_N = res >> 24; |
29619 | WRITE_LONG_F(adr, res) |
29620 | POST_IO |
29621 | RET(20) |
29622 | } |
29623 | |
29624 | // SUBDa |
29625 | OPCODE(0x91A7) |
29626 | { |
29627 | u32 adr, res; |
29628 | u32 src, dst; |
29629 | |
29630 | src = DREGu32((Opcode >> 9) & 7); |
29631 | adr = AREG(7) - 4; |
29632 | AREG(7) = adr; |
29633 | PRE_IO |
29634 | READ_LONG_F(adr, dst) |
29635 | res = dst - src; |
29636 | flag_NotZ = res; |
29637 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29638 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29639 | flag_N = res >> 24; |
29640 | WRITE_LONG_F(adr, res) |
29641 | POST_IO |
29642 | RET(22) |
29643 | } |
29644 | |
29645 | // SUBX |
29646 | OPCODE(0x9100) |
29647 | { |
29648 | u32 adr, res; |
29649 | u32 src, dst; |
29650 | |
29651 | src = DREGu8((Opcode >> 0) & 7); |
29652 | dst = DREGu8((Opcode >> 9) & 7); |
29653 | res = dst - src - ((flag_X >> 8) & 1); |
29654 | flag_N = flag_X = flag_C = res; |
29655 | flag_V = (src ^ dst) & (res ^ dst); |
29656 | flag_NotZ |= res & 0xFF; |
29657 | DREGu8((Opcode >> 9) & 7) = res; |
29658 | RET(4) |
29659 | } |
29660 | |
29661 | // SUBX |
29662 | OPCODE(0x9140) |
29663 | { |
29664 | u32 adr, res; |
29665 | u32 src, dst; |
29666 | |
29667 | src = DREGu16((Opcode >> 0) & 7); |
29668 | dst = DREGu16((Opcode >> 9) & 7); |
29669 | res = dst - src - ((flag_X >> 8) & 1); |
29670 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29671 | flag_N = flag_X = flag_C = res >> 8; |
29672 | flag_NotZ |= res & 0xFFFF; |
29673 | DREGu16((Opcode >> 9) & 7) = res; |
29674 | RET(4) |
29675 | } |
29676 | |
29677 | // SUBX |
29678 | OPCODE(0x9180) |
29679 | { |
29680 | u32 adr, res; |
29681 | u32 src, dst; |
29682 | |
29683 | src = DREGu32((Opcode >> 0) & 7); |
29684 | dst = DREGu32((Opcode >> 9) & 7); |
29685 | res = dst - src - ((flag_X >> 8) & 1); |
29686 | flag_NotZ |= res; |
29687 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29688 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29689 | flag_N = res >> 24; |
29690 | DREGu32((Opcode >> 9) & 7) = res; |
29691 | RET(8) |
29692 | } |
29693 | |
29694 | // SUBXM |
29695 | OPCODE(0x9108) |
29696 | { |
29697 | u32 adr, res; |
29698 | u32 src, dst; |
29699 | |
29700 | adr = AREG((Opcode >> 0) & 7) - 1; |
29701 | AREG((Opcode >> 0) & 7) = adr; |
29702 | PRE_IO |
29703 | READ_BYTE_F(adr, src) |
29704 | adr = AREG((Opcode >> 9) & 7) - 1; |
29705 | AREG((Opcode >> 9) & 7) = adr; |
29706 | READ_BYTE_F(adr, dst) |
29707 | res = dst - src - ((flag_X >> 8) & 1); |
29708 | flag_N = flag_X = flag_C = res; |
29709 | flag_V = (src ^ dst) & (res ^ dst); |
29710 | flag_NotZ |= res & 0xFF; |
29711 | WRITE_BYTE_F(adr, res) |
29712 | POST_IO |
29713 | RET(18) |
29714 | } |
29715 | |
29716 | // SUBXM |
29717 | OPCODE(0x9148) |
29718 | { |
29719 | u32 adr, res; |
29720 | u32 src, dst; |
29721 | |
29722 | adr = AREG((Opcode >> 0) & 7) - 2; |
29723 | AREG((Opcode >> 0) & 7) = adr; |
29724 | PRE_IO |
29725 | READ_WORD_F(adr, src) |
29726 | adr = AREG((Opcode >> 9) & 7) - 2; |
29727 | AREG((Opcode >> 9) & 7) = adr; |
29728 | READ_WORD_F(adr, dst) |
29729 | res = dst - src - ((flag_X >> 8) & 1); |
29730 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29731 | flag_N = flag_X = flag_C = res >> 8; |
29732 | flag_NotZ |= res & 0xFFFF; |
29733 | WRITE_WORD_F(adr, res) |
29734 | POST_IO |
29735 | RET(18) |
29736 | } |
29737 | |
29738 | // SUBXM |
29739 | OPCODE(0x9188) |
29740 | { |
29741 | u32 adr, res; |
29742 | u32 src, dst; |
29743 | |
29744 | adr = AREG((Opcode >> 0) & 7) - 4; |
29745 | AREG((Opcode >> 0) & 7) = adr; |
29746 | PRE_IO |
29747 | READ_LONG_F(adr, src) |
29748 | adr = AREG((Opcode >> 9) & 7) - 4; |
29749 | AREG((Opcode >> 9) & 7) = adr; |
29750 | READ_LONG_F(adr, dst) |
29751 | res = dst - src - ((flag_X >> 8) & 1); |
29752 | flag_NotZ |= res; |
29753 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29754 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29755 | flag_N = res >> 24; |
29756 | WRITE_LONG_F(adr, res) |
29757 | POST_IO |
29758 | RET(30) |
29759 | } |
29760 | |
29761 | // SUBX7M |
29762 | OPCODE(0x910F) |
29763 | { |
29764 | u32 adr, res; |
29765 | u32 src, dst; |
29766 | |
29767 | adr = AREG(7) - 2; |
29768 | AREG(7) = adr; |
29769 | PRE_IO |
29770 | READ_BYTE_F(adr, src) |
29771 | adr = AREG((Opcode >> 9) & 7) - 1; |
29772 | AREG((Opcode >> 9) & 7) = adr; |
29773 | READ_BYTE_F(adr, dst) |
29774 | res = dst - src - ((flag_X >> 8) & 1); |
29775 | flag_N = flag_X = flag_C = res; |
29776 | flag_V = (src ^ dst) & (res ^ dst); |
29777 | flag_NotZ |= res & 0xFF; |
29778 | WRITE_BYTE_F(adr, res) |
29779 | POST_IO |
29780 | RET(18) |
29781 | } |
29782 | |
29783 | // SUBX7M |
29784 | OPCODE(0x914F) |
29785 | { |
29786 | u32 adr, res; |
29787 | u32 src, dst; |
29788 | |
29789 | adr = AREG(7) - 2; |
29790 | AREG(7) = adr; |
29791 | PRE_IO |
29792 | READ_WORD_F(adr, src) |
29793 | adr = AREG((Opcode >> 9) & 7) - 2; |
29794 | AREG((Opcode >> 9) & 7) = adr; |
29795 | READ_WORD_F(adr, dst) |
29796 | res = dst - src - ((flag_X >> 8) & 1); |
29797 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29798 | flag_N = flag_X = flag_C = res >> 8; |
29799 | flag_NotZ |= res & 0xFFFF; |
29800 | WRITE_WORD_F(adr, res) |
29801 | POST_IO |
29802 | RET(18) |
29803 | } |
29804 | |
29805 | // SUBX7M |
29806 | OPCODE(0x918F) |
29807 | { |
29808 | u32 adr, res; |
29809 | u32 src, dst; |
29810 | |
29811 | adr = AREG(7) - 4; |
29812 | AREG(7) = adr; |
29813 | PRE_IO |
29814 | READ_LONG_F(adr, src) |
29815 | adr = AREG((Opcode >> 9) & 7) - 4; |
29816 | AREG((Opcode >> 9) & 7) = adr; |
29817 | READ_LONG_F(adr, dst) |
29818 | res = dst - src - ((flag_X >> 8) & 1); |
29819 | flag_NotZ |= res; |
29820 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29821 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29822 | flag_N = res >> 24; |
29823 | WRITE_LONG_F(adr, res) |
29824 | POST_IO |
29825 | RET(30) |
29826 | } |
29827 | |
29828 | // SUBXM7 |
29829 | OPCODE(0x9F08) |
29830 | { |
29831 | u32 adr, res; |
29832 | u32 src, dst; |
29833 | |
29834 | adr = AREG((Opcode >> 0) & 7) - 1; |
29835 | AREG((Opcode >> 0) & 7) = adr; |
29836 | PRE_IO |
29837 | READ_BYTE_F(adr, src) |
29838 | adr = AREG(7) - 2; |
29839 | AREG(7) = adr; |
29840 | READ_BYTE_F(adr, dst) |
29841 | res = dst - src - ((flag_X >> 8) & 1); |
29842 | flag_N = flag_X = flag_C = res; |
29843 | flag_V = (src ^ dst) & (res ^ dst); |
29844 | flag_NotZ |= res & 0xFF; |
29845 | WRITE_BYTE_F(adr, res) |
29846 | POST_IO |
29847 | RET(18) |
29848 | } |
29849 | |
29850 | // SUBXM7 |
29851 | OPCODE(0x9F48) |
29852 | { |
29853 | u32 adr, res; |
29854 | u32 src, dst; |
29855 | |
29856 | adr = AREG((Opcode >> 0) & 7) - 2; |
29857 | AREG((Opcode >> 0) & 7) = adr; |
29858 | PRE_IO |
29859 | READ_WORD_F(adr, src) |
29860 | adr = AREG(7) - 2; |
29861 | AREG(7) = adr; |
29862 | READ_WORD_F(adr, dst) |
29863 | res = dst - src - ((flag_X >> 8) & 1); |
29864 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29865 | flag_N = flag_X = flag_C = res >> 8; |
29866 | flag_NotZ |= res & 0xFFFF; |
29867 | WRITE_WORD_F(adr, res) |
29868 | POST_IO |
29869 | RET(18) |
29870 | } |
29871 | |
29872 | // SUBXM7 |
29873 | OPCODE(0x9F88) |
29874 | { |
29875 | u32 adr, res; |
29876 | u32 src, dst; |
29877 | |
29878 | adr = AREG((Opcode >> 0) & 7) - 4; |
29879 | AREG((Opcode >> 0) & 7) = adr; |
29880 | PRE_IO |
29881 | READ_LONG_F(adr, src) |
29882 | adr = AREG(7) - 4; |
29883 | AREG(7) = adr; |
29884 | READ_LONG_F(adr, dst) |
29885 | res = dst - src - ((flag_X >> 8) & 1); |
29886 | flag_NotZ |= res; |
29887 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29888 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29889 | flag_N = res >> 24; |
29890 | WRITE_LONG_F(adr, res) |
29891 | POST_IO |
29892 | RET(30) |
29893 | } |
29894 | |
29895 | // SUBX7M7 |
29896 | OPCODE(0x9F0F) |
29897 | { |
29898 | u32 adr, res; |
29899 | u32 src, dst; |
29900 | |
29901 | adr = AREG(7) - 2; |
29902 | AREG(7) = adr; |
29903 | PRE_IO |
29904 | READ_BYTE_F(adr, src) |
29905 | adr = AREG(7) - 2; |
29906 | AREG(7) = adr; |
29907 | READ_BYTE_F(adr, dst) |
29908 | res = dst - src - ((flag_X >> 8) & 1); |
29909 | flag_N = flag_X = flag_C = res; |
29910 | flag_V = (src ^ dst) & (res ^ dst); |
29911 | flag_NotZ |= res & 0xFF; |
29912 | WRITE_BYTE_F(adr, res) |
29913 | POST_IO |
29914 | RET(18) |
29915 | } |
29916 | |
29917 | // SUBX7M7 |
29918 | OPCODE(0x9F4F) |
29919 | { |
29920 | u32 adr, res; |
29921 | u32 src, dst; |
29922 | |
29923 | adr = AREG(7) - 2; |
29924 | AREG(7) = adr; |
29925 | PRE_IO |
29926 | READ_WORD_F(adr, src) |
29927 | adr = AREG(7) - 2; |
29928 | AREG(7) = adr; |
29929 | READ_WORD_F(adr, dst) |
29930 | res = dst - src - ((flag_X >> 8) & 1); |
29931 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29932 | flag_N = flag_X = flag_C = res >> 8; |
29933 | flag_NotZ |= res & 0xFFFF; |
29934 | WRITE_WORD_F(adr, res) |
29935 | POST_IO |
29936 | RET(18) |
29937 | } |
29938 | |
29939 | // SUBX7M7 |
29940 | OPCODE(0x9F8F) |
29941 | { |
29942 | u32 adr, res; |
29943 | u32 src, dst; |
29944 | |
29945 | adr = AREG(7) - 4; |
29946 | AREG(7) = adr; |
29947 | PRE_IO |
29948 | READ_LONG_F(adr, src) |
29949 | adr = AREG(7) - 4; |
29950 | AREG(7) = adr; |
29951 | READ_LONG_F(adr, dst) |
29952 | res = dst - src - ((flag_X >> 8) & 1); |
29953 | flag_NotZ |= res; |
29954 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29955 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29956 | flag_N = res >> 24; |
29957 | WRITE_LONG_F(adr, res) |
29958 | POST_IO |
29959 | RET(30) |
29960 | } |
29961 | |
29962 | // SUBA |
29963 | OPCODE(0x90C0) |
29964 | { |
29965 | u32 adr, res; |
29966 | u32 src, dst; |
29967 | |
29968 | src = (s32)DREGs16((Opcode >> 0) & 7); |
29969 | dst = AREGu32((Opcode >> 9) & 7); |
29970 | res = dst - src; |
29971 | AREG((Opcode >> 9) & 7) = res; |
29972 | RET(8) |
29973 | } |
29974 | |
29975 | // SUBA |
29976 | OPCODE(0x90C8) |
29977 | { |
29978 | u32 adr, res; |
29979 | u32 src, dst; |
29980 | |
29981 | src = (s32)AREGs16((Opcode >> 0) & 7); |
29982 | dst = AREGu32((Opcode >> 9) & 7); |
29983 | res = dst - src; |
29984 | AREG((Opcode >> 9) & 7) = res; |
29985 | RET(8) |
29986 | } |
29987 | |
29988 | // SUBA |
29989 | OPCODE(0x90D0) |
29990 | { |
29991 | u32 adr, res; |
29992 | u32 src, dst; |
29993 | |
29994 | adr = AREG((Opcode >> 0) & 7); |
29995 | PRE_IO |
29996 | READSX_WORD_F(adr, src) |
29997 | dst = AREGu32((Opcode >> 9) & 7); |
29998 | res = dst - src; |
29999 | AREG((Opcode >> 9) & 7) = res; |
30000 | POST_IO |
9d917eea |
30001 | #ifdef USE_CYCLONE_TIMING |
30002 | RET(12) |
30003 | #else |
70357ce5 |
30004 | RET(10) |
9d917eea |
30005 | #endif |
70357ce5 |
30006 | } |
30007 | |
30008 | // SUBA |
30009 | OPCODE(0x90D8) |
30010 | { |
30011 | u32 adr, res; |
30012 | u32 src, dst; |
30013 | |
30014 | adr = AREG((Opcode >> 0) & 7); |
30015 | AREG((Opcode >> 0) & 7) += 2; |
30016 | PRE_IO |
30017 | READSX_WORD_F(adr, src) |
30018 | dst = AREGu32((Opcode >> 9) & 7); |
30019 | res = dst - src; |
30020 | AREG((Opcode >> 9) & 7) = res; |
30021 | POST_IO |
9d917eea |
30022 | #ifdef USE_CYCLONE_TIMING |
30023 | RET(12) |
30024 | #else |
70357ce5 |
30025 | RET(10) |
9d917eea |
30026 | #endif |
70357ce5 |
30027 | } |
30028 | |
30029 | // SUBA |
30030 | OPCODE(0x90E0) |
30031 | { |
30032 | u32 adr, res; |
30033 | u32 src, dst; |
30034 | |
30035 | adr = AREG((Opcode >> 0) & 7) - 2; |
30036 | AREG((Opcode >> 0) & 7) = adr; |
30037 | PRE_IO |
30038 | READSX_WORD_F(adr, src) |
30039 | dst = AREGu32((Opcode >> 9) & 7); |
30040 | res = dst - src; |
30041 | AREG((Opcode >> 9) & 7) = res; |
30042 | POST_IO |
9d917eea |
30043 | #ifdef USE_CYCLONE_TIMING |
30044 | RET(14) |
30045 | #else |
70357ce5 |
30046 | RET(12) |
9d917eea |
30047 | #endif |
70357ce5 |
30048 | } |
30049 | |
30050 | // SUBA |
30051 | OPCODE(0x90E8) |
30052 | { |
30053 | u32 adr, res; |
30054 | u32 src, dst; |
30055 | |
30056 | FETCH_SWORD(adr); |
30057 | adr += AREG((Opcode >> 0) & 7); |
30058 | PRE_IO |
30059 | READSX_WORD_F(adr, src) |
30060 | dst = AREGu32((Opcode >> 9) & 7); |
30061 | res = dst - src; |
30062 | AREG((Opcode >> 9) & 7) = res; |
30063 | POST_IO |
9d917eea |
30064 | #ifdef USE_CYCLONE_TIMING |
30065 | RET(16) |
30066 | #else |
70357ce5 |
30067 | RET(14) |
9d917eea |
30068 | #endif |
70357ce5 |
30069 | } |
30070 | |
30071 | // SUBA |
30072 | OPCODE(0x90F0) |
30073 | { |
30074 | u32 adr, res; |
30075 | u32 src, dst; |
30076 | |
30077 | adr = AREG((Opcode >> 0) & 7); |
30078 | DECODE_EXT_WORD |
30079 | PRE_IO |
30080 | READSX_WORD_F(adr, src) |
30081 | dst = AREGu32((Opcode >> 9) & 7); |
30082 | res = dst - src; |
30083 | AREG((Opcode >> 9) & 7) = res; |
30084 | POST_IO |
9d917eea |
30085 | #ifdef USE_CYCLONE_TIMING |
30086 | RET(18) |
30087 | #else |
70357ce5 |
30088 | RET(16) |
9d917eea |
30089 | #endif |
70357ce5 |
30090 | } |
30091 | |
30092 | // SUBA |
30093 | OPCODE(0x90F8) |
30094 | { |
30095 | u32 adr, res; |
30096 | u32 src, dst; |
30097 | |
30098 | FETCH_SWORD(adr); |
30099 | PRE_IO |
30100 | READSX_WORD_F(adr, src) |
30101 | dst = AREGu32((Opcode >> 9) & 7); |
30102 | res = dst - src; |
30103 | AREG((Opcode >> 9) & 7) = res; |
30104 | POST_IO |
9d917eea |
30105 | #ifdef USE_CYCLONE_TIMING |
30106 | RET(16) |
30107 | #else |
70357ce5 |
30108 | RET(14) |
9d917eea |
30109 | #endif |
70357ce5 |
30110 | } |
30111 | |
30112 | // SUBA |
30113 | OPCODE(0x90F9) |
30114 | { |
30115 | u32 adr, res; |
30116 | u32 src, dst; |
30117 | |
30118 | FETCH_LONG(adr); |
30119 | PRE_IO |
30120 | READSX_WORD_F(adr, src) |
30121 | dst = AREGu32((Opcode >> 9) & 7); |
30122 | res = dst - src; |
30123 | AREG((Opcode >> 9) & 7) = res; |
30124 | POST_IO |
9d917eea |
30125 | #ifdef USE_CYCLONE_TIMING |
30126 | RET(20) |
30127 | #else |
70357ce5 |
30128 | RET(18) |
9d917eea |
30129 | #endif |
70357ce5 |
30130 | } |
30131 | |
30132 | // SUBA |
30133 | OPCODE(0x90FA) |
30134 | { |
30135 | u32 adr, res; |
30136 | u32 src, dst; |
30137 | |
30138 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30139 | PC++; |
30140 | PRE_IO |
30141 | READSX_WORD_F(adr, src) |
30142 | dst = AREGu32((Opcode >> 9) & 7); |
30143 | res = dst - src; |
30144 | AREG((Opcode >> 9) & 7) = res; |
30145 | POST_IO |
9d917eea |
30146 | #ifdef USE_CYCLONE_TIMING |
30147 | RET(16) |
30148 | #else |
70357ce5 |
30149 | RET(14) |
9d917eea |
30150 | #endif |
70357ce5 |
30151 | } |
30152 | |
30153 | // SUBA |
30154 | OPCODE(0x90FB) |
30155 | { |
30156 | u32 adr, res; |
30157 | u32 src, dst; |
30158 | |
30159 | adr = (u32)(PC) - BasePC; |
30160 | DECODE_EXT_WORD |
30161 | PRE_IO |
30162 | READSX_WORD_F(adr, src) |
30163 | dst = AREGu32((Opcode >> 9) & 7); |
30164 | res = dst - src; |
30165 | AREG((Opcode >> 9) & 7) = res; |
30166 | POST_IO |
9d917eea |
30167 | #ifdef USE_CYCLONE_TIMING |
30168 | RET(18) |
30169 | #else |
70357ce5 |
30170 | RET(16) |
9d917eea |
30171 | #endif |
70357ce5 |
30172 | } |
30173 | |
30174 | // SUBA |
30175 | OPCODE(0x90FC) |
30176 | { |
30177 | u32 adr, res; |
30178 | u32 src, dst; |
30179 | |
30180 | FETCH_SWORD(src); |
30181 | dst = AREGu32((Opcode >> 9) & 7); |
30182 | res = dst - src; |
30183 | AREG((Opcode >> 9) & 7) = res; |
30184 | RET(12) |
30185 | } |
30186 | |
30187 | // SUBA |
30188 | OPCODE(0x90DF) |
30189 | { |
30190 | u32 adr, res; |
30191 | u32 src, dst; |
30192 | |
30193 | adr = AREG(7); |
30194 | AREG(7) += 2; |
30195 | PRE_IO |
30196 | READSX_WORD_F(adr, src) |
30197 | dst = AREGu32((Opcode >> 9) & 7); |
30198 | res = dst - src; |
30199 | AREG((Opcode >> 9) & 7) = res; |
30200 | POST_IO |
9d917eea |
30201 | #ifdef USE_CYCLONE_TIMING |
30202 | RET(12) |
30203 | #else |
70357ce5 |
30204 | RET(10) |
9d917eea |
30205 | #endif |
70357ce5 |
30206 | } |
30207 | |
30208 | // SUBA |
30209 | OPCODE(0x90E7) |
30210 | { |
30211 | u32 adr, res; |
30212 | u32 src, dst; |
30213 | |
30214 | adr = AREG(7) - 2; |
30215 | AREG(7) = adr; |
30216 | PRE_IO |
30217 | READSX_WORD_F(adr, src) |
30218 | dst = AREGu32((Opcode >> 9) & 7); |
30219 | res = dst - src; |
30220 | AREG((Opcode >> 9) & 7) = res; |
30221 | POST_IO |
9d917eea |
30222 | #ifdef USE_CYCLONE_TIMING |
30223 | RET(14) |
30224 | #else |
70357ce5 |
30225 | RET(12) |
9d917eea |
30226 | #endif |
70357ce5 |
30227 | } |
30228 | |
30229 | // SUBA |
30230 | OPCODE(0x91C0) |
30231 | { |
30232 | u32 adr, res; |
30233 | u32 src, dst; |
30234 | |
30235 | src = (s32)DREGs32((Opcode >> 0) & 7); |
30236 | dst = AREGu32((Opcode >> 9) & 7); |
30237 | res = dst - src; |
30238 | AREG((Opcode >> 9) & 7) = res; |
30239 | #ifdef USE_CYCLONE_TIMING |
30240 | RET(8) |
30241 | #else |
30242 | RET(6) |
30243 | #endif |
30244 | } |
30245 | |
30246 | // SUBA |
30247 | OPCODE(0x91C8) |
30248 | { |
30249 | u32 adr, res; |
30250 | u32 src, dst; |
30251 | |
30252 | src = (s32)AREGs32((Opcode >> 0) & 7); |
30253 | dst = AREGu32((Opcode >> 9) & 7); |
30254 | res = dst - src; |
30255 | AREG((Opcode >> 9) & 7) = res; |
30256 | #ifdef USE_CYCLONE_TIMING |
30257 | RET(8) |
30258 | #else |
30259 | RET(6) |
30260 | #endif |
30261 | } |
30262 | |
30263 | // SUBA |
30264 | OPCODE(0x91D0) |
30265 | { |
30266 | u32 adr, res; |
30267 | u32 src, dst; |
30268 | |
30269 | adr = AREG((Opcode >> 0) & 7); |
30270 | PRE_IO |
30271 | READSX_LONG_F(adr, src) |
30272 | dst = AREGu32((Opcode >> 9) & 7); |
30273 | res = dst - src; |
30274 | AREG((Opcode >> 9) & 7) = res; |
30275 | POST_IO |
30276 | RET(14) |
30277 | } |
30278 | |
30279 | // SUBA |
30280 | OPCODE(0x91D8) |
30281 | { |
30282 | u32 adr, res; |
30283 | u32 src, dst; |
30284 | |
30285 | adr = AREG((Opcode >> 0) & 7); |
30286 | AREG((Opcode >> 0) & 7) += 4; |
30287 | PRE_IO |
30288 | READSX_LONG_F(adr, src) |
30289 | dst = AREGu32((Opcode >> 9) & 7); |
30290 | res = dst - src; |
30291 | AREG((Opcode >> 9) & 7) = res; |
30292 | POST_IO |
30293 | RET(14) |
30294 | } |
30295 | |
30296 | // SUBA |
30297 | OPCODE(0x91E0) |
30298 | { |
30299 | u32 adr, res; |
30300 | u32 src, dst; |
30301 | |
30302 | adr = AREG((Opcode >> 0) & 7) - 4; |
30303 | AREG((Opcode >> 0) & 7) = adr; |
30304 | PRE_IO |
30305 | READSX_LONG_F(adr, src) |
30306 | dst = AREGu32((Opcode >> 9) & 7); |
30307 | res = dst - src; |
30308 | AREG((Opcode >> 9) & 7) = res; |
30309 | POST_IO |
30310 | RET(16) |
30311 | } |
30312 | |
30313 | // SUBA |
30314 | OPCODE(0x91E8) |
30315 | { |
30316 | u32 adr, res; |
30317 | u32 src, dst; |
30318 | |
30319 | FETCH_SWORD(adr); |
30320 | adr += AREG((Opcode >> 0) & 7); |
30321 | PRE_IO |
30322 | READSX_LONG_F(adr, src) |
30323 | dst = AREGu32((Opcode >> 9) & 7); |
30324 | res = dst - src; |
30325 | AREG((Opcode >> 9) & 7) = res; |
30326 | POST_IO |
30327 | RET(18) |
30328 | } |
30329 | |
30330 | // SUBA |
30331 | OPCODE(0x91F0) |
30332 | { |
30333 | u32 adr, res; |
30334 | u32 src, dst; |
30335 | |
30336 | adr = AREG((Opcode >> 0) & 7); |
30337 | DECODE_EXT_WORD |
30338 | PRE_IO |
30339 | READSX_LONG_F(adr, src) |
30340 | dst = AREGu32((Opcode >> 9) & 7); |
30341 | res = dst - src; |
30342 | AREG((Opcode >> 9) & 7) = res; |
30343 | POST_IO |
30344 | RET(20) |
30345 | } |
30346 | |
30347 | // SUBA |
30348 | OPCODE(0x91F8) |
30349 | { |
30350 | u32 adr, res; |
30351 | u32 src, dst; |
30352 | |
30353 | FETCH_SWORD(adr); |
30354 | PRE_IO |
30355 | READSX_LONG_F(adr, src) |
30356 | dst = AREGu32((Opcode >> 9) & 7); |
30357 | res = dst - src; |
30358 | AREG((Opcode >> 9) & 7) = res; |
30359 | POST_IO |
30360 | RET(18) |
30361 | } |
30362 | |
30363 | // SUBA |
30364 | OPCODE(0x91F9) |
30365 | { |
30366 | u32 adr, res; |
30367 | u32 src, dst; |
30368 | |
30369 | FETCH_LONG(adr); |
30370 | PRE_IO |
30371 | READSX_LONG_F(adr, src) |
30372 | dst = AREGu32((Opcode >> 9) & 7); |
30373 | res = dst - src; |
30374 | AREG((Opcode >> 9) & 7) = res; |
30375 | POST_IO |
30376 | RET(22) |
30377 | } |
30378 | |
30379 | // SUBA |
30380 | OPCODE(0x91FA) |
30381 | { |
30382 | u32 adr, res; |
30383 | u32 src, dst; |
30384 | |
30385 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30386 | PC++; |
30387 | PRE_IO |
30388 | READSX_LONG_F(adr, src) |
30389 | dst = AREGu32((Opcode >> 9) & 7); |
30390 | res = dst - src; |
30391 | AREG((Opcode >> 9) & 7) = res; |
30392 | POST_IO |
30393 | RET(18) |
30394 | } |
30395 | |
30396 | // SUBA |
30397 | OPCODE(0x91FB) |
30398 | { |
30399 | u32 adr, res; |
30400 | u32 src, dst; |
30401 | |
30402 | adr = (u32)(PC) - BasePC; |
30403 | DECODE_EXT_WORD |
30404 | PRE_IO |
30405 | READSX_LONG_F(adr, src) |
30406 | dst = AREGu32((Opcode >> 9) & 7); |
30407 | res = dst - src; |
30408 | AREG((Opcode >> 9) & 7) = res; |
30409 | POST_IO |
30410 | RET(20) |
30411 | } |
30412 | |
30413 | // SUBA |
30414 | OPCODE(0x91FC) |
30415 | { |
30416 | u32 adr, res; |
30417 | u32 src, dst; |
30418 | |
30419 | FETCH_LONG(src); |
30420 | dst = AREGu32((Opcode >> 9) & 7); |
30421 | res = dst - src; |
30422 | AREG((Opcode >> 9) & 7) = res; |
30423 | #ifdef USE_CYCLONE_TIMING |
30424 | RET(16) |
30425 | #else |
30426 | RET(14) |
30427 | #endif |
30428 | } |
30429 | |
30430 | // SUBA |
30431 | OPCODE(0x91DF) |
30432 | { |
30433 | u32 adr, res; |
30434 | u32 src, dst; |
30435 | |
30436 | adr = AREG(7); |
30437 | AREG(7) += 4; |
30438 | PRE_IO |
30439 | READSX_LONG_F(adr, src) |
30440 | dst = AREGu32((Opcode >> 9) & 7); |
30441 | res = dst - src; |
30442 | AREG((Opcode >> 9) & 7) = res; |
30443 | POST_IO |
30444 | RET(14) |
30445 | } |
30446 | |
30447 | // SUBA |
30448 | OPCODE(0x91E7) |
30449 | { |
30450 | u32 adr, res; |
30451 | u32 src, dst; |
30452 | |
30453 | adr = AREG(7) - 4; |
30454 | AREG(7) = adr; |
30455 | PRE_IO |
30456 | READSX_LONG_F(adr, src) |
30457 | dst = AREGu32((Opcode >> 9) & 7); |
30458 | res = dst - src; |
30459 | AREG((Opcode >> 9) & 7) = res; |
30460 | POST_IO |
30461 | RET(16) |
30462 | } |
30463 | |
30464 | // CMP |
30465 | OPCODE(0xB000) |
30466 | { |
30467 | u32 adr, res; |
30468 | u32 src, dst; |
30469 | |
30470 | src = DREGu8((Opcode >> 0) & 7); |
30471 | dst = DREGu8((Opcode >> 9) & 7); |
30472 | res = dst - src; |
30473 | flag_N = flag_C = res; |
30474 | flag_V = (src ^ dst) & (res ^ dst); |
30475 | flag_NotZ = res & 0xFF; |
30476 | RET(4) |
30477 | } |
30478 | |
30479 | // CMP |
03e4f2a3 |
30480 | #if 0 |
70357ce5 |
30481 | OPCODE(0xB008) |
30482 | { |
30483 | u32 adr, res; |
30484 | u32 src, dst; |
30485 | |
30486 | // can't read byte from Ax registers ! |
30487 | m68kcontext.execinfo |= M68K_FAULTED; |
30488 | m68kcontext.io_cycle_counter = 0; |
30489 | /* |
30490 | goto famec_Exec_End; |
30491 | dst = DREGu8((Opcode >> 9) & 7); |
30492 | res = dst - src; |
30493 | flag_N = flag_C = res; |
30494 | flag_V = (src ^ dst) & (res ^ dst); |
30495 | flag_NotZ = res & 0xFF; |
30496 | */ |
30497 | RET(4) |
30498 | } |
03e4f2a3 |
30499 | #endif |
70357ce5 |
30500 | |
30501 | // CMP |
30502 | OPCODE(0xB010) |
30503 | { |
30504 | u32 adr, res; |
30505 | u32 src, dst; |
30506 | |
30507 | adr = AREG((Opcode >> 0) & 7); |
30508 | PRE_IO |
30509 | READ_BYTE_F(adr, src) |
30510 | dst = DREGu8((Opcode >> 9) & 7); |
30511 | res = dst - src; |
30512 | flag_N = flag_C = res; |
30513 | flag_V = (src ^ dst) & (res ^ dst); |
30514 | flag_NotZ = res & 0xFF; |
30515 | POST_IO |
30516 | RET(8) |
30517 | } |
30518 | |
30519 | // CMP |
30520 | OPCODE(0xB018) |
30521 | { |
30522 | u32 adr, res; |
30523 | u32 src, dst; |
30524 | |
30525 | adr = AREG((Opcode >> 0) & 7); |
30526 | AREG((Opcode >> 0) & 7) += 1; |
30527 | PRE_IO |
30528 | READ_BYTE_F(adr, src) |
30529 | dst = DREGu8((Opcode >> 9) & 7); |
30530 | res = dst - src; |
30531 | flag_N = flag_C = res; |
30532 | flag_V = (src ^ dst) & (res ^ dst); |
30533 | flag_NotZ = res & 0xFF; |
30534 | POST_IO |
30535 | RET(8) |
30536 | } |
30537 | |
30538 | // CMP |
30539 | OPCODE(0xB020) |
30540 | { |
30541 | u32 adr, res; |
30542 | u32 src, dst; |
30543 | |
30544 | adr = AREG((Opcode >> 0) & 7) - 1; |
30545 | AREG((Opcode >> 0) & 7) = adr; |
30546 | PRE_IO |
30547 | READ_BYTE_F(adr, src) |
30548 | dst = DREGu8((Opcode >> 9) & 7); |
30549 | res = dst - src; |
30550 | flag_N = flag_C = res; |
30551 | flag_V = (src ^ dst) & (res ^ dst); |
30552 | flag_NotZ = res & 0xFF; |
30553 | POST_IO |
30554 | RET(10) |
30555 | } |
30556 | |
30557 | // CMP |
30558 | OPCODE(0xB028) |
30559 | { |
30560 | u32 adr, res; |
30561 | u32 src, dst; |
30562 | |
30563 | FETCH_SWORD(adr); |
30564 | adr += AREG((Opcode >> 0) & 7); |
30565 | PRE_IO |
30566 | READ_BYTE_F(adr, src) |
30567 | dst = DREGu8((Opcode >> 9) & 7); |
30568 | res = dst - src; |
30569 | flag_N = flag_C = res; |
30570 | flag_V = (src ^ dst) & (res ^ dst); |
30571 | flag_NotZ = res & 0xFF; |
30572 | POST_IO |
30573 | RET(12) |
30574 | } |
30575 | |
30576 | // CMP |
30577 | OPCODE(0xB030) |
30578 | { |
30579 | u32 adr, res; |
30580 | u32 src, dst; |
30581 | |
30582 | adr = AREG((Opcode >> 0) & 7); |
30583 | DECODE_EXT_WORD |
30584 | PRE_IO |
30585 | READ_BYTE_F(adr, src) |
30586 | dst = DREGu8((Opcode >> 9) & 7); |
30587 | res = dst - src; |
30588 | flag_N = flag_C = res; |
30589 | flag_V = (src ^ dst) & (res ^ dst); |
30590 | flag_NotZ = res & 0xFF; |
30591 | POST_IO |
30592 | RET(14) |
30593 | } |
30594 | |
30595 | // CMP |
30596 | OPCODE(0xB038) |
30597 | { |
30598 | u32 adr, res; |
30599 | u32 src, dst; |
30600 | |
30601 | FETCH_SWORD(adr); |
30602 | PRE_IO |
30603 | READ_BYTE_F(adr, src) |
30604 | dst = DREGu8((Opcode >> 9) & 7); |
30605 | res = dst - src; |
30606 | flag_N = flag_C = res; |
30607 | flag_V = (src ^ dst) & (res ^ dst); |
30608 | flag_NotZ = res & 0xFF; |
30609 | POST_IO |
30610 | RET(12) |
30611 | } |
30612 | |
30613 | // CMP |
30614 | OPCODE(0xB039) |
30615 | { |
30616 | u32 adr, res; |
30617 | u32 src, dst; |
30618 | |
30619 | FETCH_LONG(adr); |
30620 | PRE_IO |
30621 | READ_BYTE_F(adr, src) |
30622 | dst = DREGu8((Opcode >> 9) & 7); |
30623 | res = dst - src; |
30624 | flag_N = flag_C = res; |
30625 | flag_V = (src ^ dst) & (res ^ dst); |
30626 | flag_NotZ = res & 0xFF; |
30627 | POST_IO |
30628 | RET(16) |
30629 | } |
30630 | |
30631 | // CMP |
30632 | OPCODE(0xB03A) |
30633 | { |
30634 | u32 adr, res; |
30635 | u32 src, dst; |
30636 | |
30637 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30638 | PC++; |
30639 | PRE_IO |
30640 | READ_BYTE_F(adr, src) |
30641 | dst = DREGu8((Opcode >> 9) & 7); |
30642 | res = dst - src; |
30643 | flag_N = flag_C = res; |
30644 | flag_V = (src ^ dst) & (res ^ dst); |
30645 | flag_NotZ = res & 0xFF; |
30646 | POST_IO |
30647 | RET(12) |
30648 | } |
30649 | |
30650 | // CMP |
30651 | OPCODE(0xB03B) |
30652 | { |
30653 | u32 adr, res; |
30654 | u32 src, dst; |
30655 | |
30656 | adr = (u32)(PC) - BasePC; |
30657 | DECODE_EXT_WORD |
30658 | PRE_IO |
30659 | READ_BYTE_F(adr, src) |
30660 | dst = DREGu8((Opcode >> 9) & 7); |
30661 | res = dst - src; |
30662 | flag_N = flag_C = res; |
30663 | flag_V = (src ^ dst) & (res ^ dst); |
30664 | flag_NotZ = res & 0xFF; |
30665 | POST_IO |
30666 | RET(14) |
30667 | } |
30668 | |
30669 | // CMP |
30670 | OPCODE(0xB03C) |
30671 | { |
30672 | u32 adr, res; |
30673 | u32 src, dst; |
30674 | |
30675 | FETCH_BYTE(src); |
30676 | dst = DREGu8((Opcode >> 9) & 7); |
30677 | res = dst - src; |
30678 | flag_N = flag_C = res; |
30679 | flag_V = (src ^ dst) & (res ^ dst); |
30680 | flag_NotZ = res & 0xFF; |
30681 | RET(8) |
30682 | } |
30683 | |
30684 | // CMP |
30685 | OPCODE(0xB01F) |
30686 | { |
30687 | u32 adr, res; |
30688 | u32 src, dst; |
30689 | |
30690 | adr = AREG(7); |
30691 | AREG(7) += 2; |
30692 | PRE_IO |
30693 | READ_BYTE_F(adr, src) |
30694 | dst = DREGu8((Opcode >> 9) & 7); |
30695 | res = dst - src; |
30696 | flag_N = flag_C = res; |
30697 | flag_V = (src ^ dst) & (res ^ dst); |
30698 | flag_NotZ = res & 0xFF; |
30699 | POST_IO |
30700 | RET(8) |
30701 | } |
30702 | |
30703 | // CMP |
30704 | OPCODE(0xB027) |
30705 | { |
30706 | u32 adr, res; |
30707 | u32 src, dst; |
30708 | |
30709 | adr = AREG(7) - 2; |
30710 | AREG(7) = adr; |
30711 | PRE_IO |
30712 | READ_BYTE_F(adr, src) |
30713 | dst = DREGu8((Opcode >> 9) & 7); |
30714 | res = dst - src; |
30715 | flag_N = flag_C = res; |
30716 | flag_V = (src ^ dst) & (res ^ dst); |
30717 | flag_NotZ = res & 0xFF; |
30718 | POST_IO |
30719 | RET(10) |
30720 | } |
30721 | |
30722 | // CMP |
30723 | OPCODE(0xB040) |
30724 | { |
30725 | u32 adr, res; |
30726 | u32 src, dst; |
30727 | |
30728 | src = DREGu16((Opcode >> 0) & 7); |
30729 | dst = DREGu16((Opcode >> 9) & 7); |
30730 | res = dst - src; |
30731 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30732 | flag_N = flag_C = res >> 8; |
30733 | flag_NotZ = res & 0xFFFF; |
30734 | RET(4) |
30735 | } |
30736 | |
30737 | // CMP |
30738 | OPCODE(0xB048) |
30739 | { |
30740 | u32 adr, res; |
30741 | u32 src, dst; |
30742 | |
30743 | src = AREGu16((Opcode >> 0) & 7); |
30744 | dst = DREGu16((Opcode >> 9) & 7); |
30745 | res = dst - src; |
30746 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30747 | flag_N = flag_C = res >> 8; |
30748 | flag_NotZ = res & 0xFFFF; |
30749 | RET(4) |
30750 | } |
30751 | |
30752 | // CMP |
30753 | OPCODE(0xB050) |
30754 | { |
30755 | u32 adr, res; |
30756 | u32 src, dst; |
30757 | |
30758 | adr = AREG((Opcode >> 0) & 7); |
30759 | PRE_IO |
30760 | READ_WORD_F(adr, src) |
30761 | dst = DREGu16((Opcode >> 9) & 7); |
30762 | res = dst - src; |
30763 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30764 | flag_N = flag_C = res >> 8; |
30765 | flag_NotZ = res & 0xFFFF; |
30766 | POST_IO |
30767 | RET(8) |
30768 | } |
30769 | |
30770 | // CMP |
30771 | OPCODE(0xB058) |
30772 | { |
30773 | u32 adr, res; |
30774 | u32 src, dst; |
30775 | |
30776 | adr = AREG((Opcode >> 0) & 7); |
30777 | AREG((Opcode >> 0) & 7) += 2; |
30778 | PRE_IO |
30779 | READ_WORD_F(adr, src) |
30780 | dst = DREGu16((Opcode >> 9) & 7); |
30781 | res = dst - src; |
30782 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30783 | flag_N = flag_C = res >> 8; |
30784 | flag_NotZ = res & 0xFFFF; |
30785 | POST_IO |
30786 | RET(8) |
30787 | } |
30788 | |
30789 | // CMP |
30790 | OPCODE(0xB060) |
30791 | { |
30792 | u32 adr, res; |
30793 | u32 src, dst; |
30794 | |
30795 | adr = AREG((Opcode >> 0) & 7) - 2; |
30796 | AREG((Opcode >> 0) & 7) = adr; |
30797 | PRE_IO |
30798 | READ_WORD_F(adr, src) |
30799 | dst = DREGu16((Opcode >> 9) & 7); |
30800 | res = dst - src; |
30801 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30802 | flag_N = flag_C = res >> 8; |
30803 | flag_NotZ = res & 0xFFFF; |
30804 | POST_IO |
30805 | RET(10) |
30806 | } |
30807 | |
30808 | // CMP |
30809 | OPCODE(0xB068) |
30810 | { |
30811 | u32 adr, res; |
30812 | u32 src, dst; |
30813 | |
30814 | FETCH_SWORD(adr); |
30815 | adr += AREG((Opcode >> 0) & 7); |
30816 | PRE_IO |
30817 | READ_WORD_F(adr, src) |
30818 | dst = DREGu16((Opcode >> 9) & 7); |
30819 | res = dst - src; |
30820 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30821 | flag_N = flag_C = res >> 8; |
30822 | flag_NotZ = res & 0xFFFF; |
30823 | POST_IO |
30824 | RET(12) |
30825 | } |
30826 | |
30827 | // CMP |
30828 | OPCODE(0xB070) |
30829 | { |
30830 | u32 adr, res; |
30831 | u32 src, dst; |
30832 | |
30833 | adr = AREG((Opcode >> 0) & 7); |
30834 | DECODE_EXT_WORD |
30835 | PRE_IO |
30836 | READ_WORD_F(adr, src) |
30837 | dst = DREGu16((Opcode >> 9) & 7); |
30838 | res = dst - src; |
30839 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30840 | flag_N = flag_C = res >> 8; |
30841 | flag_NotZ = res & 0xFFFF; |
30842 | POST_IO |
30843 | RET(14) |
30844 | } |
30845 | |
30846 | // CMP |
30847 | OPCODE(0xB078) |
30848 | { |
30849 | u32 adr, res; |
30850 | u32 src, dst; |
30851 | |
30852 | FETCH_SWORD(adr); |
30853 | PRE_IO |
30854 | READ_WORD_F(adr, src) |
30855 | dst = DREGu16((Opcode >> 9) & 7); |
30856 | res = dst - src; |
30857 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30858 | flag_N = flag_C = res >> 8; |
30859 | flag_NotZ = res & 0xFFFF; |
30860 | POST_IO |
30861 | RET(12) |
30862 | } |
30863 | |
30864 | // CMP |
30865 | OPCODE(0xB079) |
30866 | { |
30867 | u32 adr, res; |
30868 | u32 src, dst; |
30869 | |
30870 | FETCH_LONG(adr); |
30871 | PRE_IO |
30872 | READ_WORD_F(adr, src) |
30873 | dst = DREGu16((Opcode >> 9) & 7); |
30874 | res = dst - src; |
30875 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30876 | flag_N = flag_C = res >> 8; |
30877 | flag_NotZ = res & 0xFFFF; |
30878 | POST_IO |
30879 | RET(16) |
30880 | } |
30881 | |
30882 | // CMP |
30883 | OPCODE(0xB07A) |
30884 | { |
30885 | u32 adr, res; |
30886 | u32 src, dst; |
30887 | |
30888 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30889 | PC++; |
30890 | PRE_IO |
30891 | READ_WORD_F(adr, src) |
30892 | dst = DREGu16((Opcode >> 9) & 7); |
30893 | res = dst - src; |
30894 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30895 | flag_N = flag_C = res >> 8; |
30896 | flag_NotZ = res & 0xFFFF; |
30897 | POST_IO |
30898 | RET(12) |
30899 | } |
30900 | |
30901 | // CMP |
30902 | OPCODE(0xB07B) |
30903 | { |
30904 | u32 adr, res; |
30905 | u32 src, dst; |
30906 | |
30907 | adr = (u32)(PC) - BasePC; |
30908 | DECODE_EXT_WORD |
30909 | PRE_IO |
30910 | READ_WORD_F(adr, src) |
30911 | dst = DREGu16((Opcode >> 9) & 7); |
30912 | res = dst - src; |
30913 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30914 | flag_N = flag_C = res >> 8; |
30915 | flag_NotZ = res & 0xFFFF; |
30916 | POST_IO |
30917 | RET(14) |
30918 | } |
30919 | |
30920 | // CMP |
30921 | OPCODE(0xB07C) |
30922 | { |
30923 | u32 adr, res; |
30924 | u32 src, dst; |
30925 | |
30926 | FETCH_WORD(src); |
30927 | dst = DREGu16((Opcode >> 9) & 7); |
30928 | res = dst - src; |
30929 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30930 | flag_N = flag_C = res >> 8; |
30931 | flag_NotZ = res & 0xFFFF; |
30932 | RET(8) |
30933 | } |
30934 | |
30935 | // CMP |
30936 | OPCODE(0xB05F) |
30937 | { |
30938 | u32 adr, res; |
30939 | u32 src, dst; |
30940 | |
30941 | adr = AREG(7); |
30942 | AREG(7) += 2; |
30943 | PRE_IO |
30944 | READ_WORD_F(adr, src) |
30945 | dst = DREGu16((Opcode >> 9) & 7); |
30946 | res = dst - src; |
30947 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30948 | flag_N = flag_C = res >> 8; |
30949 | flag_NotZ = res & 0xFFFF; |
30950 | POST_IO |
30951 | RET(8) |
30952 | } |
30953 | |
30954 | // CMP |
30955 | OPCODE(0xB067) |
30956 | { |
30957 | u32 adr, res; |
30958 | u32 src, dst; |
30959 | |
30960 | adr = AREG(7) - 2; |
30961 | AREG(7) = adr; |
30962 | PRE_IO |
30963 | READ_WORD_F(adr, src) |
30964 | dst = DREGu16((Opcode >> 9) & 7); |
30965 | res = dst - src; |
30966 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30967 | flag_N = flag_C = res >> 8; |
30968 | flag_NotZ = res & 0xFFFF; |
30969 | POST_IO |
30970 | RET(10) |
30971 | } |
30972 | |
30973 | // CMP |
30974 | OPCODE(0xB080) |
30975 | { |
30976 | u32 adr, res; |
30977 | u32 src, dst; |
30978 | |
30979 | src = DREGu32((Opcode >> 0) & 7); |
30980 | dst = DREGu32((Opcode >> 9) & 7); |
30981 | res = dst - src; |
30982 | flag_NotZ = res; |
30983 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30984 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30985 | flag_N = res >> 24; |
30986 | RET(6) |
30987 | } |
30988 | |
30989 | // CMP |
30990 | OPCODE(0xB088) |
30991 | { |
30992 | u32 adr, res; |
30993 | u32 src, dst; |
30994 | |
30995 | src = AREGu32((Opcode >> 0) & 7); |
30996 | dst = DREGu32((Opcode >> 9) & 7); |
30997 | res = dst - src; |
30998 | flag_NotZ = res; |
30999 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31000 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31001 | flag_N = res >> 24; |
31002 | RET(6) |
31003 | } |
31004 | |
31005 | // CMP |
31006 | OPCODE(0xB090) |
31007 | { |
31008 | u32 adr, res; |
31009 | u32 src, dst; |
31010 | |
31011 | adr = AREG((Opcode >> 0) & 7); |
31012 | PRE_IO |
31013 | READ_LONG_F(adr, src) |
31014 | dst = DREGu32((Opcode >> 9) & 7); |
31015 | res = dst - src; |
31016 | flag_NotZ = res; |
31017 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31018 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31019 | flag_N = res >> 24; |
31020 | POST_IO |
31021 | RET(14) |
31022 | } |
31023 | |
31024 | // CMP |
31025 | OPCODE(0xB098) |
31026 | { |
31027 | u32 adr, res; |
31028 | u32 src, dst; |
31029 | |
31030 | adr = AREG((Opcode >> 0) & 7); |
31031 | AREG((Opcode >> 0) & 7) += 4; |
31032 | PRE_IO |
31033 | READ_LONG_F(adr, src) |
31034 | dst = DREGu32((Opcode >> 9) & 7); |
31035 | res = dst - src; |
31036 | flag_NotZ = res; |
31037 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31038 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31039 | flag_N = res >> 24; |
31040 | POST_IO |
31041 | RET(14) |
31042 | } |
31043 | |
31044 | // CMP |
31045 | OPCODE(0xB0A0) |
31046 | { |
31047 | u32 adr, res; |
31048 | u32 src, dst; |
31049 | |
31050 | adr = AREG((Opcode >> 0) & 7) - 4; |
31051 | AREG((Opcode >> 0) & 7) = adr; |
31052 | PRE_IO |
31053 | READ_LONG_F(adr, src) |
31054 | dst = DREGu32((Opcode >> 9) & 7); |
31055 | res = dst - src; |
31056 | flag_NotZ = res; |
31057 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31058 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31059 | flag_N = res >> 24; |
31060 | POST_IO |
31061 | RET(16) |
31062 | } |
31063 | |
31064 | // CMP |
31065 | OPCODE(0xB0A8) |
31066 | { |
31067 | u32 adr, res; |
31068 | u32 src, dst; |
31069 | |
31070 | FETCH_SWORD(adr); |
31071 | adr += AREG((Opcode >> 0) & 7); |
31072 | PRE_IO |
31073 | READ_LONG_F(adr, src) |
31074 | dst = DREGu32((Opcode >> 9) & 7); |
31075 | res = dst - src; |
31076 | flag_NotZ = res; |
31077 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31078 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31079 | flag_N = res >> 24; |
31080 | POST_IO |
31081 | RET(18) |
31082 | } |
31083 | |
31084 | // CMP |
31085 | OPCODE(0xB0B0) |
31086 | { |
31087 | u32 adr, res; |
31088 | u32 src, dst; |
31089 | |
31090 | adr = AREG((Opcode >> 0) & 7); |
31091 | DECODE_EXT_WORD |
31092 | PRE_IO |
31093 | READ_LONG_F(adr, src) |
31094 | dst = DREGu32((Opcode >> 9) & 7); |
31095 | res = dst - src; |
31096 | flag_NotZ = res; |
31097 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31098 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31099 | flag_N = res >> 24; |
31100 | POST_IO |
31101 | RET(20) |
31102 | } |
31103 | |
31104 | // CMP |
31105 | OPCODE(0xB0B8) |
31106 | { |
31107 | u32 adr, res; |
31108 | u32 src, dst; |
31109 | |
31110 | FETCH_SWORD(adr); |
31111 | PRE_IO |
31112 | READ_LONG_F(adr, src) |
31113 | dst = DREGu32((Opcode >> 9) & 7); |
31114 | res = dst - src; |
31115 | flag_NotZ = res; |
31116 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31117 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31118 | flag_N = res >> 24; |
31119 | POST_IO |
31120 | RET(18) |
31121 | } |
31122 | |
31123 | // CMP |
31124 | OPCODE(0xB0B9) |
31125 | { |
31126 | u32 adr, res; |
31127 | u32 src, dst; |
31128 | |
31129 | FETCH_LONG(adr); |
31130 | PRE_IO |
31131 | READ_LONG_F(adr, src) |
31132 | dst = DREGu32((Opcode >> 9) & 7); |
31133 | res = dst - src; |
31134 | flag_NotZ = res; |
31135 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31136 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31137 | flag_N = res >> 24; |
31138 | POST_IO |
31139 | RET(22) |
31140 | } |
31141 | |
31142 | // CMP |
31143 | OPCODE(0xB0BA) |
31144 | { |
31145 | u32 adr, res; |
31146 | u32 src, dst; |
31147 | |
31148 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
31149 | PC++; |
31150 | PRE_IO |
31151 | READ_LONG_F(adr, src) |
31152 | dst = DREGu32((Opcode >> 9) & 7); |
31153 | res = dst - src; |
31154 | flag_NotZ = res; |
31155 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31156 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31157 | flag_N = res >> 24; |
31158 | POST_IO |
31159 | RET(18) |
31160 | } |
31161 | |
31162 | // CMP |
31163 | OPCODE(0xB0BB) |
31164 | { |
31165 | u32 adr, res; |
31166 | u32 src, dst; |
31167 | |
31168 | adr = (u32)(PC) - BasePC; |
31169 | DECODE_EXT_WORD |
31170 | PRE_IO |
31171 | READ_LONG_F(adr, src) |
31172 | dst = DREGu32((Opcode >> 9) & 7); |
31173 | res = dst - src; |
31174 | flag_NotZ = res; |
31175 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31176 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31177 | flag_N = res >> 24; |
31178 | POST_IO |
31179 | RET(20) |
31180 | } |
31181 | |
31182 | // CMP |
31183 | OPCODE(0xB0BC) |
31184 | { |
31185 | u32 adr, res; |
31186 | u32 src, dst; |
31187 | |
31188 | FETCH_LONG(src); |
31189 | dst = DREGu32((Opcode >> 9) & 7); |
31190 | res = dst - src; |
31191 | flag_NotZ = res; |
31192 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31193 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31194 | flag_N = res >> 24; |
31195 | RET(14) |
31196 | } |
31197 | |
31198 | // CMP |
31199 | OPCODE(0xB09F) |
31200 | { |
31201 | u32 adr, res; |
31202 | u32 src, dst; |
31203 | |
31204 | adr = AREG(7); |
31205 | AREG(7) += 4; |
31206 | PRE_IO |
31207 | READ_LONG_F(adr, src) |
31208 | dst = DREGu32((Opcode >> 9) & 7); |
31209 | res = dst - src; |
31210 | flag_NotZ = res; |
31211 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31212 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31213 | flag_N = res >> 24; |
31214 | POST_IO |
31215 | RET(14) |
31216 | } |
31217 | |
31218 | // CMP |
31219 | OPCODE(0xB0A7) |
31220 | { |
31221 | u32 adr, res; |
31222 | u32 src, dst; |
31223 | |
31224 | adr = AREG(7) - 4; |
31225 | AREG(7) = adr; |
31226 | PRE_IO |
31227 | READ_LONG_F(adr, src) |
31228 | dst = DREGu32((Opcode >> 9) & 7); |
31229 | res = dst - src; |
31230 | flag_NotZ = res; |
31231 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31232 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31233 | flag_N = res >> 24; |
31234 | POST_IO |
31235 | RET(16) |
31236 | } |
31237 | |
31238 | // CMPM |
31239 | OPCODE(0xB108) |
31240 | { |
31241 | u32 adr, res; |
31242 | u32 src, dst; |
31243 | |
31244 | adr = AREG((Opcode >> 0) & 7); |
31245 | AREG((Opcode >> 0) & 7) += 1; |
31246 | PRE_IO |
31247 | READ_BYTE_F(adr, src) |
31248 | adr = AREG((Opcode >> 9) & 7); |
31249 | AREG((Opcode >> 9) & 7) += 1; |
31250 | READ_BYTE_F(adr, dst) |
31251 | res = dst - src; |
31252 | flag_N = flag_C = res; |
31253 | flag_V = (src ^ dst) & (res ^ dst); |
31254 | flag_NotZ = res & 0xFF; |
31255 | POST_IO |
31256 | RET(12) |
31257 | } |
31258 | |
31259 | // CMPM |
31260 | OPCODE(0xB148) |
31261 | { |
31262 | u32 adr, res; |
31263 | u32 src, dst; |
31264 | |
31265 | adr = AREG((Opcode >> 0) & 7); |
31266 | AREG((Opcode >> 0) & 7) += 2; |
31267 | PRE_IO |
31268 | READ_WORD_F(adr, src) |
31269 | adr = AREG((Opcode >> 9) & 7); |
31270 | AREG((Opcode >> 9) & 7) += 2; |
31271 | READ_WORD_F(adr, dst) |
31272 | res = dst - src; |
31273 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31274 | flag_N = flag_C = res >> 8; |
31275 | flag_NotZ = res & 0xFFFF; |
31276 | POST_IO |
31277 | RET(12) |
31278 | } |
31279 | |
31280 | // CMPM |
31281 | OPCODE(0xB188) |
31282 | { |
31283 | u32 adr, res; |
31284 | u32 src, dst; |
31285 | |
31286 | adr = AREG((Opcode >> 0) & 7); |
31287 | AREG((Opcode >> 0) & 7) += 4; |
31288 | PRE_IO |
31289 | READ_LONG_F(adr, src) |
31290 | adr = AREG((Opcode >> 9) & 7); |
31291 | AREG((Opcode >> 9) & 7) += 4; |
31292 | READ_LONG_F(adr, dst) |
31293 | res = dst - src; |
31294 | flag_NotZ = res; |
31295 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31296 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31297 | flag_N = res >> 24; |
31298 | POST_IO |
31299 | RET(20) |
31300 | } |
31301 | |
31302 | // CMP7M |
31303 | OPCODE(0xB10F) |
31304 | { |
31305 | u32 adr, res; |
31306 | u32 src, dst; |
31307 | |
31308 | adr = AREG(7); |
31309 | AREG(7) += 2; |
31310 | PRE_IO |
31311 | READ_BYTE_F(adr, src) |
31312 | adr = AREG((Opcode >> 9) & 7); |
31313 | AREG((Opcode >> 9) & 7) += 1; |
31314 | READ_BYTE_F(adr, dst) |
31315 | res = dst - src; |
31316 | flag_N = flag_C = res; |
31317 | flag_V = (src ^ dst) & (res ^ dst); |
31318 | flag_NotZ = res & 0xFF; |
31319 | POST_IO |
31320 | RET(12) |
31321 | } |
31322 | |
31323 | // CMP7M |
31324 | OPCODE(0xB14F) |
31325 | { |
31326 | u32 adr, res; |
31327 | u32 src, dst; |
31328 | |
31329 | adr = AREG(7); |
31330 | AREG(7) += 2; |
31331 | PRE_IO |
31332 | READ_WORD_F(adr, src) |
31333 | adr = AREG((Opcode >> 9) & 7); |
31334 | AREG((Opcode >> 9) & 7) += 2; |
31335 | READ_WORD_F(adr, dst) |
31336 | res = dst - src; |
31337 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31338 | flag_N = flag_C = res >> 8; |
31339 | flag_NotZ = res & 0xFFFF; |
31340 | POST_IO |
31341 | RET(12) |
31342 | } |
31343 | |
31344 | // CMP7M |
31345 | OPCODE(0xB18F) |
31346 | { |
31347 | u32 adr, res; |
31348 | u32 src, dst; |
31349 | |
31350 | adr = AREG(7); |
31351 | AREG(7) += 4; |
31352 | PRE_IO |
31353 | READ_LONG_F(adr, src) |
31354 | adr = AREG((Opcode >> 9) & 7); |
31355 | AREG((Opcode >> 9) & 7) += 4; |
31356 | READ_LONG_F(adr, dst) |
31357 | res = dst - src; |
31358 | flag_NotZ = res; |
31359 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31360 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31361 | flag_N = res >> 24; |
31362 | POST_IO |
31363 | RET(20) |
31364 | } |
31365 | |
31366 | // CMPM7 |
31367 | OPCODE(0xBF08) |
31368 | { |
31369 | u32 adr, res; |
31370 | u32 src, dst; |
31371 | |
31372 | adr = AREG((Opcode >> 0) & 7); |
31373 | AREG((Opcode >> 0) & 7) += 1; |
31374 | PRE_IO |
31375 | READ_BYTE_F(adr, src) |
31376 | adr = AREG(7); |
31377 | AREG(7) += 2; |
31378 | READ_BYTE_F(adr, dst) |
31379 | res = dst - src; |
31380 | flag_N = flag_C = res; |
31381 | flag_V = (src ^ dst) & (res ^ dst); |
31382 | flag_NotZ = res & 0xFF; |
31383 | POST_IO |
31384 | RET(12) |
31385 | } |
31386 | |
31387 | // CMPM7 |
31388 | OPCODE(0xBF48) |
31389 | { |
31390 | u32 adr, res; |
31391 | u32 src, dst; |
31392 | |
31393 | adr = AREG((Opcode >> 0) & 7); |
31394 | AREG((Opcode >> 0) & 7) += 2; |
31395 | PRE_IO |
31396 | READ_WORD_F(adr, src) |
31397 | adr = AREG(7); |
31398 | AREG(7) += 2; |
31399 | READ_WORD_F(adr, dst) |
31400 | res = dst - src; |
31401 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31402 | flag_N = flag_C = res >> 8; |
31403 | flag_NotZ = res & 0xFFFF; |
31404 | POST_IO |
31405 | RET(12) |
31406 | } |
31407 | |
31408 | // CMPM7 |
31409 | OPCODE(0xBF88) |
31410 | { |
31411 | u32 adr, res; |
31412 | u32 src, dst; |
31413 | |
31414 | adr = AREG((Opcode >> 0) & 7); |
31415 | AREG((Opcode >> 0) & 7) += 4; |
31416 | PRE_IO |
31417 | READ_LONG_F(adr, src) |
31418 | adr = AREG(7); |
31419 | AREG(7) += 4; |
31420 | READ_LONG_F(adr, dst) |
31421 | res = dst - src; |
31422 | flag_NotZ = res; |
31423 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31424 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31425 | flag_N = res >> 24; |
31426 | POST_IO |
31427 | RET(20) |
31428 | } |
31429 | |
31430 | // CMP7M7 |
31431 | OPCODE(0xBF0F) |
31432 | { |
31433 | u32 adr, res; |
31434 | u32 src, dst; |
31435 | |
31436 | adr = AREG(7); |
31437 | AREG(7) += 2; |
31438 | PRE_IO |
31439 | READ_BYTE_F(adr, src) |
31440 | adr = AREG(7); |
31441 | AREG(7) += 2; |
31442 | READ_BYTE_F(adr, dst) |
31443 | res = dst - src; |
31444 | flag_N = flag_C = res; |
31445 | flag_V = (src ^ dst) & (res ^ dst); |
31446 | flag_NotZ = res & 0xFF; |
31447 | POST_IO |
31448 | RET(12) |
31449 | } |
31450 | |
31451 | // CMP7M7 |
31452 | OPCODE(0xBF4F) |
31453 | { |
31454 | u32 adr, res; |
31455 | u32 src, dst; |
31456 | |
31457 | adr = AREG(7); |
31458 | AREG(7) += 2; |
31459 | PRE_IO |
31460 | READ_WORD_F(adr, src) |
31461 | adr = AREG(7); |
31462 | AREG(7) += 2; |
31463 | READ_WORD_F(adr, dst) |
31464 | res = dst - src; |
31465 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31466 | flag_N = flag_C = res >> 8; |
31467 | flag_NotZ = res & 0xFFFF; |
31468 | POST_IO |
31469 | RET(12) |
31470 | } |
31471 | |
31472 | // CMP7M7 |
31473 | OPCODE(0xBF8F) |
31474 | { |
31475 | u32 adr, res; |
31476 | u32 src, dst; |
31477 | |
31478 | adr = AREG(7); |
31479 | AREG(7) += 4; |
31480 | PRE_IO |
31481 | READ_LONG_F(adr, src) |
31482 | adr = AREG(7); |
31483 | AREG(7) += 4; |
31484 | READ_LONG_F(adr, dst) |
31485 | res = dst - src; |
31486 | flag_NotZ = res; |
31487 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31488 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31489 | flag_N = res >> 24; |
31490 | POST_IO |
31491 | RET(20) |
31492 | } |
31493 | |
31494 | // EORDa |
31495 | OPCODE(0xB100) |
31496 | { |
31497 | u32 adr, res; |
31498 | u32 src, dst; |
31499 | |
31500 | src = DREGu8((Opcode >> 9) & 7); |
31501 | res = DREGu8((Opcode >> 0) & 7); |
31502 | res ^= src; |
31503 | flag_C = 0; |
31504 | flag_V = 0; |
31505 | flag_NotZ = res; |
31506 | flag_N = res; |
31507 | DREGu8((Opcode >> 0) & 7) = res; |
31508 | RET(4) |
31509 | } |
31510 | |
31511 | // EORDa |
31512 | OPCODE(0xB110) |
31513 | { |
31514 | u32 adr, res; |
31515 | u32 src, dst; |
31516 | |
31517 | src = DREGu8((Opcode >> 9) & 7); |
31518 | adr = AREG((Opcode >> 0) & 7); |
31519 | PRE_IO |
31520 | READ_BYTE_F(adr, res) |
31521 | res ^= src; |
31522 | flag_C = 0; |
31523 | flag_V = 0; |
31524 | flag_NotZ = res; |
31525 | flag_N = res; |
31526 | WRITE_BYTE_F(adr, res) |
31527 | POST_IO |
31528 | RET(12) |
31529 | } |
31530 | |
31531 | // EORDa |
31532 | OPCODE(0xB118) |
31533 | { |
31534 | u32 adr, res; |
31535 | u32 src, dst; |
31536 | |
31537 | src = DREGu8((Opcode >> 9) & 7); |
31538 | adr = AREG((Opcode >> 0) & 7); |
31539 | AREG((Opcode >> 0) & 7) += 1; |
31540 | PRE_IO |
31541 | READ_BYTE_F(adr, res) |
31542 | res ^= src; |
31543 | flag_C = 0; |
31544 | flag_V = 0; |
31545 | flag_NotZ = res; |
31546 | flag_N = res; |
31547 | WRITE_BYTE_F(adr, res) |
31548 | POST_IO |
31549 | RET(12) |
31550 | } |
31551 | |
31552 | // EORDa |
31553 | OPCODE(0xB120) |
31554 | { |
31555 | u32 adr, res; |
31556 | u32 src, dst; |
31557 | |
31558 | src = DREGu8((Opcode >> 9) & 7); |
31559 | adr = AREG((Opcode >> 0) & 7) - 1; |
31560 | AREG((Opcode >> 0) & 7) = adr; |
31561 | PRE_IO |
31562 | READ_BYTE_F(adr, res) |
31563 | res ^= src; |
31564 | flag_C = 0; |
31565 | flag_V = 0; |
31566 | flag_NotZ = res; |
31567 | flag_N = res; |
31568 | WRITE_BYTE_F(adr, res) |
31569 | POST_IO |
31570 | RET(14) |
31571 | } |
31572 | |
31573 | // EORDa |
31574 | OPCODE(0xB128) |
31575 | { |
31576 | u32 adr, res; |
31577 | u32 src, dst; |
31578 | |
31579 | src = DREGu8((Opcode >> 9) & 7); |
31580 | FETCH_SWORD(adr); |
31581 | adr += AREG((Opcode >> 0) & 7); |
31582 | PRE_IO |
31583 | READ_BYTE_F(adr, res) |
31584 | res ^= src; |
31585 | flag_C = 0; |
31586 | flag_V = 0; |
31587 | flag_NotZ = res; |
31588 | flag_N = res; |
31589 | WRITE_BYTE_F(adr, res) |
31590 | POST_IO |
31591 | RET(16) |
31592 | } |
31593 | |
31594 | // EORDa |
31595 | OPCODE(0xB130) |
31596 | { |
31597 | u32 adr, res; |
31598 | u32 src, dst; |
31599 | |
31600 | src = DREGu8((Opcode >> 9) & 7); |
31601 | adr = AREG((Opcode >> 0) & 7); |
31602 | DECODE_EXT_WORD |
31603 | PRE_IO |
31604 | READ_BYTE_F(adr, res) |
31605 | res ^= src; |
31606 | flag_C = 0; |
31607 | flag_V = 0; |
31608 | flag_NotZ = res; |
31609 | flag_N = res; |
31610 | WRITE_BYTE_F(adr, res) |
31611 | POST_IO |
31612 | RET(18) |
31613 | } |
31614 | |
31615 | // EORDa |
31616 | OPCODE(0xB138) |
31617 | { |
31618 | u32 adr, res; |
31619 | u32 src, dst; |
31620 | |
31621 | src = DREGu8((Opcode >> 9) & 7); |
31622 | FETCH_SWORD(adr); |
31623 | PRE_IO |
31624 | READ_BYTE_F(adr, res) |
31625 | res ^= src; |
31626 | flag_C = 0; |
31627 | flag_V = 0; |
31628 | flag_NotZ = res; |
31629 | flag_N = res; |
31630 | WRITE_BYTE_F(adr, res) |
31631 | POST_IO |
31632 | RET(16) |
31633 | } |
31634 | |
31635 | // EORDa |
31636 | OPCODE(0xB139) |
31637 | { |
31638 | u32 adr, res; |
31639 | u32 src, dst; |
31640 | |
31641 | src = DREGu8((Opcode >> 9) & 7); |
31642 | FETCH_LONG(adr); |
31643 | PRE_IO |
31644 | READ_BYTE_F(adr, res) |
31645 | res ^= src; |
31646 | flag_C = 0; |
31647 | flag_V = 0; |
31648 | flag_NotZ = res; |
31649 | flag_N = res; |
31650 | WRITE_BYTE_F(adr, res) |
31651 | POST_IO |
31652 | RET(20) |
31653 | } |
31654 | |
31655 | // EORDa |
31656 | OPCODE(0xB11F) |
31657 | { |
31658 | u32 adr, res; |
31659 | u32 src, dst; |
31660 | |
31661 | src = DREGu8((Opcode >> 9) & 7); |
31662 | adr = AREG(7); |
31663 | AREG(7) += 2; |
31664 | PRE_IO |
31665 | READ_BYTE_F(adr, res) |
31666 | res ^= src; |
31667 | flag_C = 0; |
31668 | flag_V = 0; |
31669 | flag_NotZ = res; |
31670 | flag_N = res; |
31671 | WRITE_BYTE_F(adr, res) |
31672 | POST_IO |
31673 | RET(12) |
31674 | } |
31675 | |
31676 | // EORDa |
31677 | OPCODE(0xB127) |
31678 | { |
31679 | u32 adr, res; |
31680 | u32 src, dst; |
31681 | |
31682 | src = DREGu8((Opcode >> 9) & 7); |
31683 | adr = AREG(7) - 2; |
31684 | AREG(7) = adr; |
31685 | PRE_IO |
31686 | READ_BYTE_F(adr, res) |
31687 | res ^= src; |
31688 | flag_C = 0; |
31689 | flag_V = 0; |
31690 | flag_NotZ = res; |
31691 | flag_N = res; |
31692 | WRITE_BYTE_F(adr, res) |
31693 | POST_IO |
31694 | RET(14) |
31695 | } |
31696 | |
31697 | // EORDa |
31698 | OPCODE(0xB140) |
31699 | { |
31700 | u32 adr, res; |
31701 | u32 src, dst; |
31702 | |
31703 | src = DREGu16((Opcode >> 9) & 7); |
31704 | res = DREGu16((Opcode >> 0) & 7); |
31705 | res ^= src; |
31706 | flag_C = 0; |
31707 | flag_V = 0; |
31708 | flag_NotZ = res; |
31709 | flag_N = res >> 8; |
31710 | DREGu16((Opcode >> 0) & 7) = res; |
31711 | RET(4) |
31712 | } |
31713 | |
31714 | // EORDa |
31715 | OPCODE(0xB150) |
31716 | { |
31717 | u32 adr, res; |
31718 | u32 src, dst; |
31719 | |
31720 | src = DREGu16((Opcode >> 9) & 7); |
31721 | adr = AREG((Opcode >> 0) & 7); |
31722 | PRE_IO |
31723 | READ_WORD_F(adr, res) |
31724 | res ^= src; |
31725 | flag_C = 0; |
31726 | flag_V = 0; |
31727 | flag_NotZ = res; |
31728 | flag_N = res >> 8; |
31729 | WRITE_WORD_F(adr, res) |
31730 | POST_IO |
31731 | RET(12) |
31732 | } |
31733 | |
31734 | // EORDa |
31735 | OPCODE(0xB158) |
31736 | { |
31737 | u32 adr, res; |
31738 | u32 src, dst; |
31739 | |
31740 | src = DREGu16((Opcode >> 9) & 7); |
31741 | adr = AREG((Opcode >> 0) & 7); |
31742 | AREG((Opcode >> 0) & 7) += 2; |
31743 | PRE_IO |
31744 | READ_WORD_F(adr, res) |
31745 | res ^= src; |
31746 | flag_C = 0; |
31747 | flag_V = 0; |
31748 | flag_NotZ = res; |
31749 | flag_N = res >> 8; |
31750 | WRITE_WORD_F(adr, res) |
31751 | POST_IO |
31752 | RET(12) |
31753 | } |
31754 | |
31755 | // EORDa |
31756 | OPCODE(0xB160) |
31757 | { |
31758 | u32 adr, res; |
31759 | u32 src, dst; |
31760 | |
31761 | src = DREGu16((Opcode >> 9) & 7); |
31762 | adr = AREG((Opcode >> 0) & 7) - 2; |
31763 | AREG((Opcode >> 0) & 7) = adr; |
31764 | PRE_IO |
31765 | READ_WORD_F(adr, res) |
31766 | res ^= src; |
31767 | flag_C = 0; |
31768 | flag_V = 0; |
31769 | flag_NotZ = res; |
31770 | flag_N = res >> 8; |
31771 | WRITE_WORD_F(adr, res) |
31772 | POST_IO |
31773 | RET(14) |
31774 | } |
31775 | |
31776 | // EORDa |
31777 | OPCODE(0xB168) |
31778 | { |
31779 | u32 adr, res; |
31780 | u32 src, dst; |
31781 | |
31782 | src = DREGu16((Opcode >> 9) & 7); |
31783 | FETCH_SWORD(adr); |
31784 | adr += AREG((Opcode >> 0) & 7); |
31785 | PRE_IO |
31786 | READ_WORD_F(adr, res) |
31787 | res ^= src; |
31788 | flag_C = 0; |
31789 | flag_V = 0; |
31790 | flag_NotZ = res; |
31791 | flag_N = res >> 8; |
31792 | WRITE_WORD_F(adr, res) |
31793 | POST_IO |
31794 | RET(16) |
31795 | } |
31796 | |
31797 | // EORDa |
31798 | OPCODE(0xB170) |
31799 | { |
31800 | u32 adr, res; |
31801 | u32 src, dst; |
31802 | |
31803 | src = DREGu16((Opcode >> 9) & 7); |
31804 | adr = AREG((Opcode >> 0) & 7); |
31805 | DECODE_EXT_WORD |
31806 | PRE_IO |
31807 | READ_WORD_F(adr, res) |
31808 | res ^= src; |
31809 | flag_C = 0; |
31810 | flag_V = 0; |
31811 | flag_NotZ = res; |
31812 | flag_N = res >> 8; |
31813 | WRITE_WORD_F(adr, res) |
31814 | POST_IO |
31815 | RET(18) |
31816 | } |
31817 | |
31818 | // EORDa |
31819 | OPCODE(0xB178) |
31820 | { |
31821 | u32 adr, res; |
31822 | u32 src, dst; |
31823 | |
31824 | src = DREGu16((Opcode >> 9) & 7); |
31825 | FETCH_SWORD(adr); |
31826 | PRE_IO |
31827 | READ_WORD_F(adr, res) |
31828 | res ^= src; |
31829 | flag_C = 0; |
31830 | flag_V = 0; |
31831 | flag_NotZ = res; |
31832 | flag_N = res >> 8; |
31833 | WRITE_WORD_F(adr, res) |
31834 | POST_IO |
31835 | RET(16) |
31836 | } |
31837 | |
31838 | // EORDa |
31839 | OPCODE(0xB179) |
31840 | { |
31841 | u32 adr, res; |
31842 | u32 src, dst; |
31843 | |
31844 | src = DREGu16((Opcode >> 9) & 7); |
31845 | FETCH_LONG(adr); |
31846 | PRE_IO |
31847 | READ_WORD_F(adr, res) |
31848 | res ^= src; |
31849 | flag_C = 0; |
31850 | flag_V = 0; |
31851 | flag_NotZ = res; |
31852 | flag_N = res >> 8; |
31853 | WRITE_WORD_F(adr, res) |
31854 | POST_IO |
31855 | RET(20) |
31856 | } |
31857 | |
31858 | // EORDa |
31859 | OPCODE(0xB15F) |
31860 | { |
31861 | u32 adr, res; |
31862 | u32 src, dst; |
31863 | |
31864 | src = DREGu16((Opcode >> 9) & 7); |
31865 | adr = AREG(7); |
31866 | AREG(7) += 2; |
31867 | PRE_IO |
31868 | READ_WORD_F(adr, res) |
31869 | res ^= src; |
31870 | flag_C = 0; |
31871 | flag_V = 0; |
31872 | flag_NotZ = res; |
31873 | flag_N = res >> 8; |
31874 | WRITE_WORD_F(adr, res) |
31875 | POST_IO |
31876 | RET(12) |
31877 | } |
31878 | |
31879 | // EORDa |
31880 | OPCODE(0xB167) |
31881 | { |
31882 | u32 adr, res; |
31883 | u32 src, dst; |
31884 | |
31885 | src = DREGu16((Opcode >> 9) & 7); |
31886 | adr = AREG(7) - 2; |
31887 | AREG(7) = adr; |
31888 | PRE_IO |
31889 | READ_WORD_F(adr, res) |
31890 | res ^= src; |
31891 | flag_C = 0; |
31892 | flag_V = 0; |
31893 | flag_NotZ = res; |
31894 | flag_N = res >> 8; |
31895 | WRITE_WORD_F(adr, res) |
31896 | POST_IO |
31897 | RET(14) |
31898 | } |
31899 | |
31900 | // EORDa |
31901 | OPCODE(0xB180) |
31902 | { |
31903 | u32 adr, res; |
31904 | u32 src, dst; |
31905 | |
31906 | src = DREGu32((Opcode >> 9) & 7); |
31907 | res = DREGu32((Opcode >> 0) & 7); |
31908 | res ^= src; |
31909 | flag_C = 0; |
31910 | flag_V = 0; |
31911 | flag_NotZ = res; |
31912 | flag_N = res >> 24; |
31913 | DREGu32((Opcode >> 0) & 7) = res; |
31914 | RET(8) |
31915 | } |
31916 | |
31917 | // EORDa |
31918 | OPCODE(0xB190) |
31919 | { |
31920 | u32 adr, res; |
31921 | u32 src, dst; |
31922 | |
31923 | src = DREGu32((Opcode >> 9) & 7); |
31924 | adr = AREG((Opcode >> 0) & 7); |
31925 | PRE_IO |
31926 | READ_LONG_F(adr, res) |
31927 | res ^= src; |
31928 | flag_C = 0; |
31929 | flag_V = 0; |
31930 | flag_NotZ = res; |
31931 | flag_N = res >> 24; |
31932 | WRITE_LONG_F(adr, res) |
31933 | POST_IO |
31934 | RET(20) |
31935 | } |
31936 | |
31937 | // EORDa |
31938 | OPCODE(0xB198) |
31939 | { |
31940 | u32 adr, res; |
31941 | u32 src, dst; |
31942 | |
31943 | src = DREGu32((Opcode >> 9) & 7); |
31944 | adr = AREG((Opcode >> 0) & 7); |
31945 | AREG((Opcode >> 0) & 7) += 4; |
31946 | PRE_IO |
31947 | READ_LONG_F(adr, res) |
31948 | res ^= src; |
31949 | flag_C = 0; |
31950 | flag_V = 0; |
31951 | flag_NotZ = res; |
31952 | flag_N = res >> 24; |
31953 | WRITE_LONG_F(adr, res) |
31954 | POST_IO |
31955 | RET(20) |
31956 | } |
31957 | |
31958 | // EORDa |
31959 | OPCODE(0xB1A0) |
31960 | { |
31961 | u32 adr, res; |
31962 | u32 src, dst; |
31963 | |
31964 | src = DREGu32((Opcode >> 9) & 7); |
31965 | adr = AREG((Opcode >> 0) & 7) - 4; |
31966 | AREG((Opcode >> 0) & 7) = adr; |
31967 | PRE_IO |
31968 | READ_LONG_F(adr, res) |
31969 | res ^= src; |
31970 | flag_C = 0; |
31971 | flag_V = 0; |
31972 | flag_NotZ = res; |
31973 | flag_N = res >> 24; |
31974 | WRITE_LONG_F(adr, res) |
31975 | POST_IO |
31976 | RET(22) |
31977 | } |
31978 | |
31979 | // EORDa |
31980 | OPCODE(0xB1A8) |
31981 | { |
31982 | u32 adr, res; |
31983 | u32 src, dst; |
31984 | |
31985 | src = DREGu32((Opcode >> 9) & 7); |
31986 | FETCH_SWORD(adr); |
31987 | adr += AREG((Opcode >> 0) & 7); |
31988 | PRE_IO |
31989 | READ_LONG_F(adr, res) |
31990 | res ^= src; |
31991 | flag_C = 0; |
31992 | flag_V = 0; |
31993 | flag_NotZ = res; |
31994 | flag_N = res >> 24; |
31995 | WRITE_LONG_F(adr, res) |
31996 | POST_IO |
31997 | RET(24) |
31998 | } |
31999 | |
32000 | // EORDa |
32001 | OPCODE(0xB1B0) |
32002 | { |
32003 | u32 adr, res; |
32004 | u32 src, dst; |
32005 | |
32006 | src = DREGu32((Opcode >> 9) & 7); |
32007 | adr = AREG((Opcode >> 0) & 7); |
32008 | DECODE_EXT_WORD |
32009 | PRE_IO |
32010 | READ_LONG_F(adr, res) |
32011 | res ^= src; |
32012 | flag_C = 0; |
32013 | flag_V = 0; |
32014 | flag_NotZ = res; |
32015 | flag_N = res >> 24; |
32016 | WRITE_LONG_F(adr, res) |
32017 | POST_IO |
32018 | RET(26) |
32019 | } |
32020 | |
32021 | // EORDa |
32022 | OPCODE(0xB1B8) |
32023 | { |
32024 | u32 adr, res; |
32025 | u32 src, dst; |
32026 | |
32027 | src = DREGu32((Opcode >> 9) & 7); |
32028 | FETCH_SWORD(adr); |
32029 | PRE_IO |
32030 | READ_LONG_F(adr, res) |
32031 | res ^= src; |
32032 | flag_C = 0; |
32033 | flag_V = 0; |
32034 | flag_NotZ = res; |
32035 | flag_N = res >> 24; |
32036 | WRITE_LONG_F(adr, res) |
32037 | POST_IO |
32038 | RET(24) |
32039 | } |
32040 | |
32041 | // EORDa |
32042 | OPCODE(0xB1B9) |
32043 | { |
32044 | u32 adr, res; |
32045 | u32 src, dst; |
32046 | |
32047 | src = DREGu32((Opcode >> 9) & 7); |
32048 | FETCH_LONG(adr); |
32049 | PRE_IO |
32050 | READ_LONG_F(adr, res) |
32051 | res ^= src; |
32052 | flag_C = 0; |
32053 | flag_V = 0; |
32054 | flag_NotZ = res; |
32055 | flag_N = res >> 24; |
32056 | WRITE_LONG_F(adr, res) |
32057 | POST_IO |
32058 | RET(28) |
32059 | } |
32060 | |
32061 | // EORDa |
32062 | OPCODE(0xB19F) |
32063 | { |
32064 | u32 adr, res; |
32065 | u32 src, dst; |
32066 | |
32067 | src = DREGu32((Opcode >> 9) & 7); |
32068 | adr = AREG(7); |
32069 | AREG(7) += 4; |
32070 | PRE_IO |
32071 | READ_LONG_F(adr, res) |
32072 | res ^= src; |
32073 | flag_C = 0; |
32074 | flag_V = 0; |
32075 | flag_NotZ = res; |
32076 | flag_N = res >> 24; |
32077 | WRITE_LONG_F(adr, res) |
32078 | POST_IO |
32079 | RET(20) |
32080 | } |
32081 | |
32082 | // EORDa |
32083 | OPCODE(0xB1A7) |
32084 | { |
32085 | u32 adr, res; |
32086 | u32 src, dst; |
32087 | |
32088 | src = DREGu32((Opcode >> 9) & 7); |
32089 | adr = AREG(7) - 4; |
32090 | AREG(7) = adr; |
32091 | PRE_IO |
32092 | READ_LONG_F(adr, res) |
32093 | res ^= src; |
32094 | flag_C = 0; |
32095 | flag_V = 0; |
32096 | flag_NotZ = res; |
32097 | flag_N = res >> 24; |
32098 | WRITE_LONG_F(adr, res) |
32099 | POST_IO |
32100 | RET(22) |
32101 | } |
32102 | |
32103 | // CMPA |
32104 | OPCODE(0xB0C0) |
32105 | { |
32106 | u32 adr, res; |
32107 | u32 src, dst; |
32108 | |
32109 | src = (s32)DREGs16((Opcode >> 0) & 7); |
32110 | dst = AREGu32((Opcode >> 9) & 7); |
32111 | res = dst - src; |
32112 | flag_NotZ = res; |
32113 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32114 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32115 | flag_N = res >> 24; |
32116 | RET(6) |
32117 | } |
32118 | |
32119 | // CMPA |
32120 | OPCODE(0xB0C8) |
32121 | { |
32122 | u32 adr, res; |
32123 | u32 src, dst; |
32124 | |
32125 | src = (s32)AREGs16((Opcode >> 0) & 7); |
32126 | dst = AREGu32((Opcode >> 9) & 7); |
32127 | res = dst - src; |
32128 | flag_NotZ = res; |
32129 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32130 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32131 | flag_N = res >> 24; |
32132 | RET(6) |
32133 | } |
32134 | |
32135 | // CMPA |
32136 | OPCODE(0xB0D0) |
32137 | { |
32138 | u32 adr, res; |
32139 | u32 src, dst; |
32140 | |
32141 | adr = AREG((Opcode >> 0) & 7); |
32142 | PRE_IO |
32143 | READSX_WORD_F(adr, src) |
32144 | dst = AREGu32((Opcode >> 9) & 7); |
32145 | res = dst - src; |
32146 | flag_NotZ = res; |
32147 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32148 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32149 | flag_N = res >> 24; |
32150 | POST_IO |
32151 | RET(10) |
32152 | } |
32153 | |
32154 | // CMPA |
32155 | OPCODE(0xB0D8) |
32156 | { |
32157 | u32 adr, res; |
32158 | u32 src, dst; |
32159 | |
32160 | adr = AREG((Opcode >> 0) & 7); |
32161 | AREG((Opcode >> 0) & 7) += 2; |
32162 | PRE_IO |
32163 | READSX_WORD_F(adr, src) |
32164 | dst = AREGu32((Opcode >> 9) & 7); |
32165 | res = dst - src; |
32166 | flag_NotZ = res; |
32167 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32168 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32169 | flag_N = res >> 24; |
32170 | POST_IO |
32171 | RET(10) |
32172 | } |
32173 | |
32174 | // CMPA |
32175 | OPCODE(0xB0E0) |
32176 | { |
32177 | u32 adr, res; |
32178 | u32 src, dst; |
32179 | |
32180 | adr = AREG((Opcode >> 0) & 7) - 2; |
32181 | AREG((Opcode >> 0) & 7) = adr; |
32182 | PRE_IO |
32183 | READSX_WORD_F(adr, src) |
32184 | dst = AREGu32((Opcode >> 9) & 7); |
32185 | res = dst - src; |
32186 | flag_NotZ = res; |
32187 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32188 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32189 | flag_N = res >> 24; |
32190 | POST_IO |
32191 | RET(12) |
32192 | } |
32193 | |
32194 | // CMPA |
32195 | OPCODE(0xB0E8) |
32196 | { |
32197 | u32 adr, res; |
32198 | u32 src, dst; |
32199 | |
32200 | FETCH_SWORD(adr); |
32201 | adr += AREG((Opcode >> 0) & 7); |
32202 | PRE_IO |
32203 | READSX_WORD_F(adr, src) |
32204 | dst = AREGu32((Opcode >> 9) & 7); |
32205 | res = dst - src; |
32206 | flag_NotZ = res; |
32207 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32208 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32209 | flag_N = res >> 24; |
32210 | POST_IO |
32211 | RET(14) |
32212 | } |
32213 | |
32214 | // CMPA |
32215 | OPCODE(0xB0F0) |
32216 | { |
32217 | u32 adr, res; |
32218 | u32 src, dst; |
32219 | |
32220 | adr = AREG((Opcode >> 0) & 7); |
32221 | DECODE_EXT_WORD |
32222 | PRE_IO |
32223 | READSX_WORD_F(adr, src) |
32224 | dst = AREGu32((Opcode >> 9) & 7); |
32225 | res = dst - src; |
32226 | flag_NotZ = res; |
32227 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32228 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32229 | flag_N = res >> 24; |
32230 | POST_IO |
32231 | RET(16) |
32232 | } |
32233 | |
32234 | // CMPA |
32235 | OPCODE(0xB0F8) |
32236 | { |
32237 | u32 adr, res; |
32238 | u32 src, dst; |
32239 | |
32240 | FETCH_SWORD(adr); |
32241 | PRE_IO |
32242 | READSX_WORD_F(adr, src) |
32243 | dst = AREGu32((Opcode >> 9) & 7); |
32244 | res = dst - src; |
32245 | flag_NotZ = res; |
32246 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32247 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32248 | flag_N = res >> 24; |
32249 | POST_IO |
32250 | RET(14) |
32251 | } |
32252 | |
32253 | // CMPA |
32254 | OPCODE(0xB0F9) |
32255 | { |
32256 | u32 adr, res; |
32257 | u32 src, dst; |
32258 | |
32259 | FETCH_LONG(adr); |
32260 | PRE_IO |
32261 | READSX_WORD_F(adr, src) |
32262 | dst = AREGu32((Opcode >> 9) & 7); |
32263 | res = dst - src; |
32264 | flag_NotZ = res; |
32265 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32266 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32267 | flag_N = res >> 24; |
32268 | POST_IO |
32269 | RET(18) |
32270 | } |
32271 | |
32272 | // CMPA |
32273 | OPCODE(0xB0FA) |
32274 | { |
32275 | u32 adr, res; |
32276 | u32 src, dst; |
32277 | |
32278 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32279 | PC++; |
32280 | PRE_IO |
32281 | READSX_WORD_F(adr, src) |
32282 | dst = AREGu32((Opcode >> 9) & 7); |
32283 | res = dst - src; |
32284 | flag_NotZ = res; |
32285 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32286 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32287 | flag_N = res >> 24; |
32288 | POST_IO |
32289 | RET(14) |
32290 | } |
32291 | |
32292 | // CMPA |
32293 | OPCODE(0xB0FB) |
32294 | { |
32295 | u32 adr, res; |
32296 | u32 src, dst; |
32297 | |
32298 | adr = (u32)(PC) - BasePC; |
32299 | DECODE_EXT_WORD |
32300 | PRE_IO |
32301 | READSX_WORD_F(adr, src) |
32302 | dst = AREGu32((Opcode >> 9) & 7); |
32303 | res = dst - src; |
32304 | flag_NotZ = res; |
32305 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32306 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32307 | flag_N = res >> 24; |
32308 | POST_IO |
32309 | RET(16) |
32310 | } |
32311 | |
32312 | // CMPA |
32313 | OPCODE(0xB0FC) |
32314 | { |
32315 | u32 adr, res; |
32316 | u32 src, dst; |
32317 | |
32318 | FETCH_SWORD(src); |
32319 | dst = AREGu32((Opcode >> 9) & 7); |
32320 | res = dst - src; |
32321 | flag_NotZ = res; |
32322 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32323 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32324 | flag_N = res >> 24; |
32325 | RET(10) |
32326 | } |
32327 | |
32328 | // CMPA |
32329 | OPCODE(0xB0DF) |
32330 | { |
32331 | u32 adr, res; |
32332 | u32 src, dst; |
32333 | |
32334 | adr = AREG(7); |
32335 | AREG(7) += 2; |
32336 | PRE_IO |
32337 | READSX_WORD_F(adr, src) |
32338 | dst = AREGu32((Opcode >> 9) & 7); |
32339 | res = dst - src; |
32340 | flag_NotZ = res; |
32341 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32342 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32343 | flag_N = res >> 24; |
32344 | POST_IO |
32345 | RET(10) |
32346 | } |
32347 | |
32348 | // CMPA |
32349 | OPCODE(0xB0E7) |
32350 | { |
32351 | u32 adr, res; |
32352 | u32 src, dst; |
32353 | |
32354 | adr = AREG(7) - 2; |
32355 | AREG(7) = adr; |
32356 | PRE_IO |
32357 | READSX_WORD_F(adr, src) |
32358 | dst = AREGu32((Opcode >> 9) & 7); |
32359 | res = dst - src; |
32360 | flag_NotZ = res; |
32361 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32362 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32363 | flag_N = res >> 24; |
32364 | POST_IO |
32365 | RET(12) |
32366 | } |
32367 | |
32368 | // CMPA |
32369 | OPCODE(0xB1C0) |
32370 | { |
32371 | u32 adr, res; |
32372 | u32 src, dst; |
32373 | |
32374 | src = (s32)DREGs32((Opcode >> 0) & 7); |
32375 | dst = AREGu32((Opcode >> 9) & 7); |
32376 | res = dst - src; |
32377 | flag_NotZ = res; |
32378 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32379 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32380 | flag_N = res >> 24; |
32381 | RET(6) |
32382 | } |
32383 | |
32384 | // CMPA |
32385 | OPCODE(0xB1C8) |
32386 | { |
32387 | u32 adr, res; |
32388 | u32 src, dst; |
32389 | |
32390 | src = (s32)AREGs32((Opcode >> 0) & 7); |
32391 | dst = AREGu32((Opcode >> 9) & 7); |
32392 | res = dst - src; |
32393 | flag_NotZ = res; |
32394 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32395 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32396 | flag_N = res >> 24; |
32397 | RET(6) |
32398 | } |
32399 | |
32400 | // CMPA |
32401 | OPCODE(0xB1D0) |
32402 | { |
32403 | u32 adr, res; |
32404 | u32 src, dst; |
32405 | |
32406 | adr = AREG((Opcode >> 0) & 7); |
32407 | PRE_IO |
32408 | READSX_LONG_F(adr, src) |
32409 | dst = AREGu32((Opcode >> 9) & 7); |
32410 | res = dst - src; |
32411 | flag_NotZ = res; |
32412 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32413 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32414 | flag_N = res >> 24; |
32415 | POST_IO |
32416 | RET(14) |
32417 | } |
32418 | |
32419 | // CMPA |
32420 | OPCODE(0xB1D8) |
32421 | { |
32422 | u32 adr, res; |
32423 | u32 src, dst; |
32424 | |
32425 | adr = AREG((Opcode >> 0) & 7); |
32426 | AREG((Opcode >> 0) & 7) += 4; |
32427 | PRE_IO |
32428 | READSX_LONG_F(adr, src) |
32429 | dst = AREGu32((Opcode >> 9) & 7); |
32430 | res = dst - src; |
32431 | flag_NotZ = res; |
32432 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32433 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32434 | flag_N = res >> 24; |
32435 | POST_IO |
32436 | RET(14) |
32437 | } |
32438 | |
32439 | // CMPA |
32440 | OPCODE(0xB1E0) |
32441 | { |
32442 | u32 adr, res; |
32443 | u32 src, dst; |
32444 | |
32445 | adr = AREG((Opcode >> 0) & 7) - 4; |
32446 | AREG((Opcode >> 0) & 7) = adr; |
32447 | PRE_IO |
32448 | READSX_LONG_F(adr, src) |
32449 | dst = AREGu32((Opcode >> 9) & 7); |
32450 | res = dst - src; |
32451 | flag_NotZ = res; |
32452 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32453 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32454 | flag_N = res >> 24; |
32455 | POST_IO |
32456 | RET(16) |
32457 | } |
32458 | |
32459 | // CMPA |
32460 | OPCODE(0xB1E8) |
32461 | { |
32462 | u32 adr, res; |
32463 | u32 src, dst; |
32464 | |
32465 | FETCH_SWORD(adr); |
32466 | adr += AREG((Opcode >> 0) & 7); |
32467 | PRE_IO |
32468 | READSX_LONG_F(adr, src) |
32469 | dst = AREGu32((Opcode >> 9) & 7); |
32470 | res = dst - src; |
32471 | flag_NotZ = res; |
32472 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32473 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32474 | flag_N = res >> 24; |
32475 | POST_IO |
32476 | RET(18) |
32477 | } |
32478 | |
32479 | // CMPA |
32480 | OPCODE(0xB1F0) |
32481 | { |
32482 | u32 adr, res; |
32483 | u32 src, dst; |
32484 | |
32485 | adr = AREG((Opcode >> 0) & 7); |
32486 | DECODE_EXT_WORD |
32487 | PRE_IO |
32488 | READSX_LONG_F(adr, src) |
32489 | dst = AREGu32((Opcode >> 9) & 7); |
32490 | res = dst - src; |
32491 | flag_NotZ = res; |
32492 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32493 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32494 | flag_N = res >> 24; |
32495 | POST_IO |
32496 | RET(20) |
32497 | } |
32498 | |
32499 | // CMPA |
32500 | OPCODE(0xB1F8) |
32501 | { |
32502 | u32 adr, res; |
32503 | u32 src, dst; |
32504 | |
32505 | FETCH_SWORD(adr); |
32506 | PRE_IO |
32507 | READSX_LONG_F(adr, src) |
32508 | dst = AREGu32((Opcode >> 9) & 7); |
32509 | res = dst - src; |
32510 | flag_NotZ = res; |
32511 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32512 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32513 | flag_N = res >> 24; |
32514 | POST_IO |
32515 | RET(18) |
32516 | } |
32517 | |
32518 | // CMPA |
32519 | OPCODE(0xB1F9) |
32520 | { |
32521 | u32 adr, res; |
32522 | u32 src, dst; |
32523 | |
32524 | FETCH_LONG(adr); |
32525 | PRE_IO |
32526 | READSX_LONG_F(adr, src) |
32527 | dst = AREGu32((Opcode >> 9) & 7); |
32528 | res = dst - src; |
32529 | flag_NotZ = res; |
32530 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32531 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32532 | flag_N = res >> 24; |
32533 | POST_IO |
32534 | RET(22) |
32535 | } |
32536 | |
32537 | // CMPA |
32538 | OPCODE(0xB1FA) |
32539 | { |
32540 | u32 adr, res; |
32541 | u32 src, dst; |
32542 | |
32543 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32544 | PC++; |
32545 | PRE_IO |
32546 | READSX_LONG_F(adr, src) |
32547 | dst = AREGu32((Opcode >> 9) & 7); |
32548 | res = dst - src; |
32549 | flag_NotZ = res; |
32550 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32551 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32552 | flag_N = res >> 24; |
32553 | POST_IO |
32554 | RET(18) |
32555 | } |
32556 | |
32557 | // CMPA |
32558 | OPCODE(0xB1FB) |
32559 | { |
32560 | u32 adr, res; |
32561 | u32 src, dst; |
32562 | |
32563 | adr = (u32)(PC) - BasePC; |
32564 | DECODE_EXT_WORD |
32565 | PRE_IO |
32566 | READSX_LONG_F(adr, src) |
32567 | dst = AREGu32((Opcode >> 9) & 7); |
32568 | res = dst - src; |
32569 | flag_NotZ = res; |
32570 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32571 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32572 | flag_N = res >> 24; |
32573 | POST_IO |
32574 | RET(20) |
32575 | } |
32576 | |
32577 | // CMPA |
32578 | OPCODE(0xB1FC) |
32579 | { |
32580 | u32 adr, res; |
32581 | u32 src, dst; |
32582 | |
32583 | FETCH_LONG(src); |
32584 | dst = AREGu32((Opcode >> 9) & 7); |
32585 | res = dst - src; |
32586 | flag_NotZ = res; |
32587 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32588 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32589 | flag_N = res >> 24; |
32590 | RET(14) |
32591 | } |
32592 | |
32593 | // CMPA |
32594 | OPCODE(0xB1DF) |
32595 | { |
32596 | u32 adr, res; |
32597 | u32 src, dst; |
32598 | |
32599 | adr = AREG(7); |
32600 | AREG(7) += 4; |
32601 | PRE_IO |
32602 | READSX_LONG_F(adr, src) |
32603 | dst = AREGu32((Opcode >> 9) & 7); |
32604 | res = dst - src; |
32605 | flag_NotZ = res; |
32606 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32607 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32608 | flag_N = res >> 24; |
32609 | POST_IO |
32610 | RET(14) |
32611 | } |
32612 | |
32613 | // CMPA |
32614 | OPCODE(0xB1E7) |
32615 | { |
32616 | u32 adr, res; |
32617 | u32 src, dst; |
32618 | |
32619 | adr = AREG(7) - 4; |
32620 | AREG(7) = adr; |
32621 | PRE_IO |
32622 | READSX_LONG_F(adr, src) |
32623 | dst = AREGu32((Opcode >> 9) & 7); |
32624 | res = dst - src; |
32625 | flag_NotZ = res; |
32626 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32627 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32628 | flag_N = res >> 24; |
32629 | POST_IO |
32630 | RET(16) |
32631 | } |
32632 | |
32633 | // ANDaD |
32634 | OPCODE(0xC000) |
32635 | { |
32636 | u32 adr, res; |
32637 | u32 src, dst; |
32638 | |
32639 | src = DREGu8((Opcode >> 0) & 7); |
32640 | res = DREGu8((Opcode >> 9) & 7); |
32641 | res &= src; |
32642 | flag_C = 0; |
32643 | flag_V = 0; |
32644 | flag_NotZ = res; |
32645 | flag_N = res; |
32646 | DREGu8((Opcode >> 9) & 7) = res; |
32647 | RET(4) |
32648 | } |
32649 | |
32650 | // ANDaD |
32651 | OPCODE(0xC010) |
32652 | { |
32653 | u32 adr, res; |
32654 | u32 src, dst; |
32655 | |
32656 | adr = AREG((Opcode >> 0) & 7); |
32657 | PRE_IO |
32658 | READ_BYTE_F(adr, src) |
32659 | res = DREGu8((Opcode >> 9) & 7); |
32660 | res &= src; |
32661 | flag_C = 0; |
32662 | flag_V = 0; |
32663 | flag_NotZ = res; |
32664 | flag_N = res; |
32665 | DREGu8((Opcode >> 9) & 7) = res; |
32666 | POST_IO |
32667 | RET(8) |
32668 | } |
32669 | |
32670 | // ANDaD |
32671 | OPCODE(0xC018) |
32672 | { |
32673 | u32 adr, res; |
32674 | u32 src, dst; |
32675 | |
32676 | adr = AREG((Opcode >> 0) & 7); |
32677 | AREG((Opcode >> 0) & 7) += 1; |
32678 | PRE_IO |
32679 | READ_BYTE_F(adr, src) |
32680 | res = DREGu8((Opcode >> 9) & 7); |
32681 | res &= src; |
32682 | flag_C = 0; |
32683 | flag_V = 0; |
32684 | flag_NotZ = res; |
32685 | flag_N = res; |
32686 | DREGu8((Opcode >> 9) & 7) = res; |
32687 | POST_IO |
32688 | RET(8) |
32689 | } |
32690 | |
32691 | // ANDaD |
32692 | OPCODE(0xC020) |
32693 | { |
32694 | u32 adr, res; |
32695 | u32 src, dst; |
32696 | |
32697 | adr = AREG((Opcode >> 0) & 7) - 1; |
32698 | AREG((Opcode >> 0) & 7) = adr; |
32699 | PRE_IO |
32700 | READ_BYTE_F(adr, src) |
32701 | res = DREGu8((Opcode >> 9) & 7); |
32702 | res &= src; |
32703 | flag_C = 0; |
32704 | flag_V = 0; |
32705 | flag_NotZ = res; |
32706 | flag_N = res; |
32707 | DREGu8((Opcode >> 9) & 7) = res; |
32708 | POST_IO |
32709 | RET(10) |
32710 | } |
32711 | |
32712 | // ANDaD |
32713 | OPCODE(0xC028) |
32714 | { |
32715 | u32 adr, res; |
32716 | u32 src, dst; |
32717 | |
32718 | FETCH_SWORD(adr); |
32719 | adr += AREG((Opcode >> 0) & 7); |
32720 | PRE_IO |
32721 | READ_BYTE_F(adr, src) |
32722 | res = DREGu8((Opcode >> 9) & 7); |
32723 | res &= src; |
32724 | flag_C = 0; |
32725 | flag_V = 0; |
32726 | flag_NotZ = res; |
32727 | flag_N = res; |
32728 | DREGu8((Opcode >> 9) & 7) = res; |
32729 | POST_IO |
32730 | RET(12) |
32731 | } |
32732 | |
32733 | // ANDaD |
32734 | OPCODE(0xC030) |
32735 | { |
32736 | u32 adr, res; |
32737 | u32 src, dst; |
32738 | |
32739 | adr = AREG((Opcode >> 0) & 7); |
32740 | DECODE_EXT_WORD |
32741 | PRE_IO |
32742 | READ_BYTE_F(adr, src) |
32743 | res = DREGu8((Opcode >> 9) & 7); |
32744 | res &= src; |
32745 | flag_C = 0; |
32746 | flag_V = 0; |
32747 | flag_NotZ = res; |
32748 | flag_N = res; |
32749 | DREGu8((Opcode >> 9) & 7) = res; |
32750 | POST_IO |
32751 | RET(14) |
32752 | } |
32753 | |
32754 | // ANDaD |
32755 | OPCODE(0xC038) |
32756 | { |
32757 | u32 adr, res; |
32758 | u32 src, dst; |
32759 | |
32760 | FETCH_SWORD(adr); |
32761 | PRE_IO |
32762 | READ_BYTE_F(adr, src) |
32763 | res = DREGu8((Opcode >> 9) & 7); |
32764 | res &= src; |
32765 | flag_C = 0; |
32766 | flag_V = 0; |
32767 | flag_NotZ = res; |
32768 | flag_N = res; |
32769 | DREGu8((Opcode >> 9) & 7) = res; |
32770 | POST_IO |
32771 | RET(12) |
32772 | } |
32773 | |
32774 | // ANDaD |
32775 | OPCODE(0xC039) |
32776 | { |
32777 | u32 adr, res; |
32778 | u32 src, dst; |
32779 | |
32780 | FETCH_LONG(adr); |
32781 | PRE_IO |
32782 | READ_BYTE_F(adr, src) |
32783 | res = DREGu8((Opcode >> 9) & 7); |
32784 | res &= src; |
32785 | flag_C = 0; |
32786 | flag_V = 0; |
32787 | flag_NotZ = res; |
32788 | flag_N = res; |
32789 | DREGu8((Opcode >> 9) & 7) = res; |
32790 | POST_IO |
32791 | RET(16) |
32792 | } |
32793 | |
32794 | // ANDaD |
32795 | OPCODE(0xC03A) |
32796 | { |
32797 | u32 adr, res; |
32798 | u32 src, dst; |
32799 | |
32800 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32801 | PC++; |
32802 | PRE_IO |
32803 | READ_BYTE_F(adr, src) |
32804 | res = DREGu8((Opcode >> 9) & 7); |
32805 | res &= src; |
32806 | flag_C = 0; |
32807 | flag_V = 0; |
32808 | flag_NotZ = res; |
32809 | flag_N = res; |
32810 | DREGu8((Opcode >> 9) & 7) = res; |
32811 | POST_IO |
32812 | RET(12) |
32813 | } |
32814 | |
32815 | // ANDaD |
32816 | OPCODE(0xC03B) |
32817 | { |
32818 | u32 adr, res; |
32819 | u32 src, dst; |
32820 | |
32821 | adr = (u32)(PC) - BasePC; |
32822 | DECODE_EXT_WORD |
32823 | PRE_IO |
32824 | READ_BYTE_F(adr, src) |
32825 | res = DREGu8((Opcode >> 9) & 7); |
32826 | res &= src; |
32827 | flag_C = 0; |
32828 | flag_V = 0; |
32829 | flag_NotZ = res; |
32830 | flag_N = res; |
32831 | DREGu8((Opcode >> 9) & 7) = res; |
32832 | POST_IO |
32833 | RET(14) |
32834 | } |
32835 | |
32836 | // ANDaD |
32837 | OPCODE(0xC03C) |
32838 | { |
32839 | u32 adr, res; |
32840 | u32 src, dst; |
32841 | |
32842 | FETCH_BYTE(src); |
32843 | res = DREGu8((Opcode >> 9) & 7); |
32844 | res &= src; |
32845 | flag_C = 0; |
32846 | flag_V = 0; |
32847 | flag_NotZ = res; |
32848 | flag_N = res; |
32849 | DREGu8((Opcode >> 9) & 7) = res; |
32850 | RET(8) |
32851 | } |
32852 | |
32853 | // ANDaD |
32854 | OPCODE(0xC01F) |
32855 | { |
32856 | u32 adr, res; |
32857 | u32 src, dst; |
32858 | |
32859 | adr = AREG(7); |
32860 | AREG(7) += 2; |
32861 | PRE_IO |
32862 | READ_BYTE_F(adr, src) |
32863 | res = DREGu8((Opcode >> 9) & 7); |
32864 | res &= src; |
32865 | flag_C = 0; |
32866 | flag_V = 0; |
32867 | flag_NotZ = res; |
32868 | flag_N = res; |
32869 | DREGu8((Opcode >> 9) & 7) = res; |
32870 | POST_IO |
32871 | RET(8) |
32872 | } |
32873 | |
32874 | // ANDaD |
32875 | OPCODE(0xC027) |
32876 | { |
32877 | u32 adr, res; |
32878 | u32 src, dst; |
32879 | |
32880 | adr = AREG(7) - 2; |
32881 | AREG(7) = adr; |
32882 | PRE_IO |
32883 | READ_BYTE_F(adr, src) |
32884 | res = DREGu8((Opcode >> 9) & 7); |
32885 | res &= src; |
32886 | flag_C = 0; |
32887 | flag_V = 0; |
32888 | flag_NotZ = res; |
32889 | flag_N = res; |
32890 | DREGu8((Opcode >> 9) & 7) = res; |
32891 | POST_IO |
32892 | RET(10) |
32893 | } |
32894 | |
32895 | // ANDaD |
32896 | OPCODE(0xC040) |
32897 | { |
32898 | u32 adr, res; |
32899 | u32 src, dst; |
32900 | |
32901 | src = DREGu16((Opcode >> 0) & 7); |
32902 | res = DREGu16((Opcode >> 9) & 7); |
32903 | res &= src; |
32904 | flag_C = 0; |
32905 | flag_V = 0; |
32906 | flag_NotZ = res; |
32907 | flag_N = res >> 8; |
32908 | DREGu16((Opcode >> 9) & 7) = res; |
32909 | RET(4) |
32910 | } |
32911 | |
32912 | // ANDaD |
32913 | OPCODE(0xC050) |
32914 | { |
32915 | u32 adr, res; |
32916 | u32 src, dst; |
32917 | |
32918 | adr = AREG((Opcode >> 0) & 7); |
32919 | PRE_IO |
32920 | READ_WORD_F(adr, src) |
32921 | res = DREGu16((Opcode >> 9) & 7); |
32922 | res &= src; |
32923 | flag_C = 0; |
32924 | flag_V = 0; |
32925 | flag_NotZ = res; |
32926 | flag_N = res >> 8; |
32927 | DREGu16((Opcode >> 9) & 7) = res; |
32928 | POST_IO |
32929 | RET(8) |
32930 | } |
32931 | |
32932 | // ANDaD |
32933 | OPCODE(0xC058) |
32934 | { |
32935 | u32 adr, res; |
32936 | u32 src, dst; |
32937 | |
32938 | adr = AREG((Opcode >> 0) & 7); |
32939 | AREG((Opcode >> 0) & 7) += 2; |
32940 | PRE_IO |
32941 | READ_WORD_F(adr, src) |
32942 | res = DREGu16((Opcode >> 9) & 7); |
32943 | res &= src; |
32944 | flag_C = 0; |
32945 | flag_V = 0; |
32946 | flag_NotZ = res; |
32947 | flag_N = res >> 8; |
32948 | DREGu16((Opcode >> 9) & 7) = res; |
32949 | POST_IO |
32950 | RET(8) |
32951 | } |
32952 | |
32953 | // ANDaD |
32954 | OPCODE(0xC060) |
32955 | { |
32956 | u32 adr, res; |
32957 | u32 src, dst; |
32958 | |
32959 | adr = AREG((Opcode >> 0) & 7) - 2; |
32960 | AREG((Opcode >> 0) & 7) = adr; |
32961 | PRE_IO |
32962 | READ_WORD_F(adr, src) |
32963 | res = DREGu16((Opcode >> 9) & 7); |
32964 | res &= src; |
32965 | flag_C = 0; |
32966 | flag_V = 0; |
32967 | flag_NotZ = res; |
32968 | flag_N = res >> 8; |
32969 | DREGu16((Opcode >> 9) & 7) = res; |
32970 | POST_IO |
32971 | RET(10) |
32972 | } |
32973 | |
32974 | // ANDaD |
32975 | OPCODE(0xC068) |
32976 | { |
32977 | u32 adr, res; |
32978 | u32 src, dst; |
32979 | |
32980 | FETCH_SWORD(adr); |
32981 | adr += AREG((Opcode >> 0) & 7); |
32982 | PRE_IO |
32983 | READ_WORD_F(adr, src) |
32984 | res = DREGu16((Opcode >> 9) & 7); |
32985 | res &= src; |
32986 | flag_C = 0; |
32987 | flag_V = 0; |
32988 | flag_NotZ = res; |
32989 | flag_N = res >> 8; |
32990 | DREGu16((Opcode >> 9) & 7) = res; |
32991 | POST_IO |
32992 | RET(12) |
32993 | } |
32994 | |
32995 | // ANDaD |
32996 | OPCODE(0xC070) |
32997 | { |
32998 | u32 adr, res; |
32999 | u32 src, dst; |
33000 | |
33001 | adr = AREG((Opcode >> 0) & 7); |
33002 | DECODE_EXT_WORD |
33003 | PRE_IO |
33004 | READ_WORD_F(adr, src) |
33005 | res = DREGu16((Opcode >> 9) & 7); |
33006 | res &= src; |
33007 | flag_C = 0; |
33008 | flag_V = 0; |
33009 | flag_NotZ = res; |
33010 | flag_N = res >> 8; |
33011 | DREGu16((Opcode >> 9) & 7) = res; |
33012 | POST_IO |
33013 | RET(14) |
33014 | } |
33015 | |
33016 | // ANDaD |
33017 | OPCODE(0xC078) |
33018 | { |
33019 | u32 adr, res; |
33020 | u32 src, dst; |
33021 | |
33022 | FETCH_SWORD(adr); |
33023 | PRE_IO |
33024 | READ_WORD_F(adr, src) |
33025 | res = DREGu16((Opcode >> 9) & 7); |
33026 | res &= src; |
33027 | flag_C = 0; |
33028 | flag_V = 0; |
33029 | flag_NotZ = res; |
33030 | flag_N = res >> 8; |
33031 | DREGu16((Opcode >> 9) & 7) = res; |
33032 | POST_IO |
33033 | RET(12) |
33034 | } |
33035 | |
33036 | // ANDaD |
33037 | OPCODE(0xC079) |
33038 | { |
33039 | u32 adr, res; |
33040 | u32 src, dst; |
33041 | |
33042 | FETCH_LONG(adr); |
33043 | PRE_IO |
33044 | READ_WORD_F(adr, src) |
33045 | res = DREGu16((Opcode >> 9) & 7); |
33046 | res &= src; |
33047 | flag_C = 0; |
33048 | flag_V = 0; |
33049 | flag_NotZ = res; |
33050 | flag_N = res >> 8; |
33051 | DREGu16((Opcode >> 9) & 7) = res; |
33052 | POST_IO |
33053 | RET(16) |
33054 | } |
33055 | |
33056 | // ANDaD |
33057 | OPCODE(0xC07A) |
33058 | { |
33059 | u32 adr, res; |
33060 | u32 src, dst; |
33061 | |
33062 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
33063 | PC++; |
33064 | PRE_IO |
33065 | READ_WORD_F(adr, src) |
33066 | res = DREGu16((Opcode >> 9) & 7); |
33067 | res &= src; |
33068 | flag_C = 0; |
33069 | flag_V = 0; |
33070 | flag_NotZ = res; |
33071 | flag_N = res >> 8; |
33072 | DREGu16((Opcode >> 9) & 7) = res; |
33073 | POST_IO |
33074 | RET(12) |
33075 | } |
33076 | |
33077 | // ANDaD |
33078 | OPCODE(0xC07B) |
33079 | { |
33080 | u32 adr, res; |
33081 | u32 src, dst; |
33082 | |
33083 | adr = (u32)(PC) - BasePC; |
33084 | DECODE_EXT_WORD |
33085 | PRE_IO |
33086 | READ_WORD_F(adr, src) |
33087 | res = DREGu16((Opcode >> 9) & 7); |
33088 | res &= src; |
33089 | flag_C = 0; |
33090 | flag_V = 0; |
33091 | flag_NotZ = res; |
33092 | flag_N = res >> 8; |
33093 | DREGu16((Opcode >> 9) & 7) = res; |
33094 | POST_IO |
33095 | RET(14) |
33096 | } |
33097 | |
33098 | // ANDaD |
33099 | OPCODE(0xC07C) |
33100 | { |
33101 | u32 adr, res; |
33102 | u32 src, dst; |
33103 | |
33104 | FETCH_WORD(src); |
33105 | res = DREGu16((Opcode >> 9) & 7); |
33106 | res &= src; |
33107 | flag_C = 0; |
33108 | flag_V = 0; |
33109 | flag_NotZ = res; |
33110 | flag_N = res >> 8; |
33111 | DREGu16((Opcode >> 9) & 7) = res; |
33112 | RET(8) |
33113 | } |
33114 | |
33115 | // ANDaD |
33116 | OPCODE(0xC05F) |
33117 | { |
33118 | u32 adr, res; |
33119 | u32 src, dst; |
33120 | |
33121 | adr = AREG(7); |
33122 | AREG(7) += 2; |
33123 | PRE_IO |
33124 | READ_WORD_F(adr, src) |
33125 | res = DREGu16((Opcode >> 9) & 7); |
33126 | res &= src; |
33127 | flag_C = 0; |
33128 | flag_V = 0; |
33129 | flag_NotZ = res; |
33130 | flag_N = res >> 8; |
33131 | DREGu16((Opcode >> 9) & 7) = res; |
33132 | POST_IO |
33133 | RET(8) |
33134 | } |
33135 | |
33136 | // ANDaD |
33137 | OPCODE(0xC067) |
33138 | { |
33139 | u32 adr, res; |
33140 | u32 src, dst; |
33141 | |
33142 | adr = AREG(7) - 2; |
33143 | AREG(7) = adr; |
33144 | PRE_IO |
33145 | READ_WORD_F(adr, src) |
33146 | res = DREGu16((Opcode >> 9) & 7); |
33147 | res &= src; |
33148 | flag_C = 0; |
33149 | flag_V = 0; |
33150 | flag_NotZ = res; |
33151 | flag_N = res >> 8; |
33152 | DREGu16((Opcode >> 9) & 7) = res; |
33153 | POST_IO |
33154 | RET(10) |
33155 | } |
33156 | |
33157 | // ANDaD |
33158 | OPCODE(0xC080) |
33159 | { |
33160 | u32 adr, res; |
33161 | u32 src, dst; |
33162 | |
33163 | src = DREGu32((Opcode >> 0) & 7); |
33164 | res = DREGu32((Opcode >> 9) & 7); |
33165 | res &= src; |
33166 | flag_C = 0; |
33167 | flag_V = 0; |
33168 | flag_NotZ = res; |
33169 | flag_N = res >> 24; |
33170 | DREGu32((Opcode >> 9) & 7) = res; |
33171 | RET(8) |
33172 | } |
33173 | |
33174 | // ANDaD |
33175 | OPCODE(0xC090) |
33176 | { |
33177 | u32 adr, res; |
33178 | u32 src, dst; |
33179 | |
33180 | adr = AREG((Opcode >> 0) & 7); |
33181 | PRE_IO |
33182 | READ_LONG_F(adr, src) |
33183 | res = DREGu32((Opcode >> 9) & 7); |
33184 | res &= src; |
33185 | flag_C = 0; |
33186 | flag_V = 0; |
33187 | flag_NotZ = res; |
33188 | flag_N = res >> 24; |
33189 | DREGu32((Opcode >> 9) & 7) = res; |
33190 | POST_IO |
33191 | RET(14) |
33192 | } |
33193 | |
33194 | // ANDaD |
33195 | OPCODE(0xC098) |
33196 | { |
33197 | u32 adr, res; |
33198 | u32 src, dst; |
33199 | |
33200 | adr = AREG((Opcode >> 0) & 7); |
33201 | AREG((Opcode >> 0) & 7) += 4; |
33202 | PRE_IO |
33203 | READ_LONG_F(adr, src) |
33204 | res = DREGu32((Opcode >> 9) & 7); |
33205 | res &= src; |
33206 | flag_C = 0; |
33207 | flag_V = 0; |
33208 | flag_NotZ = res; |
33209 | flag_N = res >> 24; |
33210 | DREGu32((Opcode >> 9) & 7) = res; |
33211 | POST_IO |
33212 | RET(14) |
33213 | } |
33214 | |
33215 | // ANDaD |
33216 | OPCODE(0xC0A0) |
33217 | { |
33218 | u32 adr, res; |
33219 | u32 src, dst; |
33220 | |
33221 | adr = AREG((Opcode >> 0) & 7) - 4; |
33222 | AREG((Opcode >> 0) & 7) = adr; |
33223 | PRE_IO |
33224 | READ_LONG_F(adr, src) |
33225 | res = DREGu32((Opcode >> 9) & 7); |
33226 | res &= src; |
33227 | flag_C = 0; |
33228 | flag_V = 0; |
33229 | flag_NotZ = res; |
33230 | flag_N = res >> 24; |
33231 | DREGu32((Opcode >> 9) & 7) = res; |
33232 | POST_IO |
33233 | RET(16) |
33234 | } |
33235 | |
33236 | // ANDaD |
33237 | OPCODE(0xC0A8) |
33238 | { |
33239 | u32 adr, res; |
33240 | u32 src, dst; |
33241 | |
33242 | FETCH_SWORD(adr); |
33243 | adr += AREG((Opcode >> 0) & 7); |
33244 | PRE_IO |
33245 | READ_LONG_F(adr, src) |
33246 | res = DREGu32((Opcode >> 9) & 7); |
33247 | res &= src; |
33248 | flag_C = 0; |
33249 | flag_V = 0; |
33250 | flag_NotZ = res; |
33251 | flag_N = res >> 24; |
33252 | DREGu32((Opcode >> 9) & 7) = res; |
33253 | POST_IO |
33254 | RET(18) |
33255 | } |
33256 | |
33257 | // ANDaD |
33258 | OPCODE(0xC0B0) |
33259 | { |
33260 | u32 adr, res; |
33261 | u32 src, dst; |
33262 | |
33263 | adr = AREG((Opcode >> 0) & 7); |
33264 | DECODE_EXT_WORD |
33265 | PRE_IO |
33266 | READ_LONG_F(adr, src) |
33267 | res = DREGu32((Opcode >> 9) & 7); |
33268 | res &= src; |
33269 | flag_C = 0; |
33270 | flag_V = 0; |
33271 | flag_NotZ = res; |
33272 | flag_N = res >> 24; |
33273 | DREGu32((Opcode >> 9) & 7) = res; |
33274 | POST_IO |
33275 | RET(20) |
33276 | } |
33277 | |
33278 | // ANDaD |
33279 | OPCODE(0xC0B8) |
33280 | { |
33281 | u32 adr, res; |
33282 | u32 src, dst; |
33283 | |
33284 | FETCH_SWORD(adr); |
33285 | PRE_IO |
33286 | READ_LONG_F(adr, src) |
33287 | res = DREGu32((Opcode >> 9) & 7); |
33288 | res &= src; |
33289 | flag_C = 0; |
33290 | flag_V = 0; |
33291 | flag_NotZ = res; |
33292 | flag_N = res >> 24; |
33293 | DREGu32((Opcode >> 9) & 7) = res; |
33294 | POST_IO |
33295 | RET(18) |
33296 | } |
33297 | |
33298 | // ANDaD |
33299 | OPCODE(0xC0B9) |
33300 | { |
33301 | u32 adr, res; |
33302 | u32 src, dst; |
33303 | |
33304 | FETCH_LONG(adr); |
33305 | PRE_IO |
33306 | READ_LONG_F(adr, src) |
33307 | res = DREGu32((Opcode >> 9) & 7); |
33308 | res &= src; |
33309 | flag_C = 0; |
33310 | flag_V = 0; |
33311 | flag_NotZ = res; |
33312 | flag_N = res >> 24; |
33313 | DREGu32((Opcode >> 9) & 7) = res; |
33314 | POST_IO |
33315 | RET(22) |
33316 | } |
33317 | |
33318 | // ANDaD |
33319 | OPCODE(0xC0BA) |
33320 | { |
33321 | u32 adr, res; |
33322 | u32 src, dst; |
33323 | |
33324 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
33325 | PC++; |
33326 | PRE_IO |
33327 | READ_LONG_F(adr, src) |
33328 | res = DREGu32((Opcode >> 9) & 7); |
33329 | res &= src; |
33330 | flag_C = 0; |
33331 | flag_V = 0; |
33332 | flag_NotZ = res; |
33333 | flag_N = res >> 24; |
33334 | DREGu32((Opcode >> 9) & 7) = res; |
33335 | POST_IO |
33336 | RET(18) |
33337 | } |
33338 | |
33339 | // ANDaD |
33340 | OPCODE(0xC0BB) |
33341 | { |
33342 | u32 adr, res; |
33343 | u32 src, dst; |
33344 | |
33345 | adr = (u32)(PC) - BasePC; |
33346 | DECODE_EXT_WORD |
33347 | PRE_IO |
33348 | READ_LONG_F(adr, src) |
33349 | res = DREGu32((Opcode >> 9) & 7); |
33350 | res &= src; |
33351 | flag_C = 0; |
33352 | flag_V = 0; |
33353 | flag_NotZ = res; |
33354 | flag_N = res >> 24; |
33355 | DREGu32((Opcode >> 9) & 7) = res; |
33356 | POST_IO |
33357 | RET(20) |
33358 | } |
33359 | |
33360 | // ANDaD |
33361 | OPCODE(0xC0BC) |
33362 | { |
33363 | u32 adr, res; |
33364 | u32 src, dst; |
33365 | |
33366 | FETCH_LONG(src); |
33367 | res = DREGu32((Opcode >> 9) & 7); |
33368 | res &= src; |
33369 | flag_C = 0; |
33370 | flag_V = 0; |
33371 | flag_NotZ = res; |
33372 | flag_N = res >> 24; |
33373 | DREGu32((Opcode >> 9) & 7) = res; |
33374 | RET(16) |
33375 | } |
33376 | |
33377 | // ANDaD |
33378 | OPCODE(0xC09F) |
33379 | { |
33380 | u32 adr, res; |
33381 | u32 src, dst; |
33382 | |
33383 | adr = AREG(7); |
33384 | AREG(7) += 4; |
33385 | PRE_IO |
33386 | READ_LONG_F(adr, src) |
33387 | res = DREGu32((Opcode >> 9) & 7); |
33388 | res &= src; |
33389 | flag_C = 0; |
33390 | flag_V = 0; |
33391 | flag_NotZ = res; |
33392 | flag_N = res >> 24; |
33393 | DREGu32((Opcode >> 9) & 7) = res; |
33394 | POST_IO |
33395 | RET(14) |
33396 | } |
33397 | |
33398 | // ANDaD |
33399 | OPCODE(0xC0A7) |
33400 | { |
33401 | u32 adr, res; |
33402 | u32 src, dst; |
33403 | |
33404 | adr = AREG(7) - 4; |
33405 | AREG(7) = adr; |
33406 | PRE_IO |
33407 | READ_LONG_F(adr, src) |
33408 | res = DREGu32((Opcode >> 9) & 7); |
33409 | res &= src; |
33410 | flag_C = 0; |
33411 | flag_V = 0; |
33412 | flag_NotZ = res; |
33413 | flag_N = res >> 24; |
33414 | DREGu32((Opcode >> 9) & 7) = res; |
33415 | POST_IO |
33416 | RET(16) |
33417 | } |
33418 | |
33419 | // ANDDa |
33420 | OPCODE(0xC110) |
33421 | { |
33422 | u32 adr, res; |
33423 | u32 src, dst; |
33424 | |
33425 | src = DREGu8((Opcode >> 9) & 7); |
33426 | adr = AREG((Opcode >> 0) & 7); |
33427 | PRE_IO |
33428 | READ_BYTE_F(adr, res) |
33429 | res &= src; |
33430 | flag_C = 0; |
33431 | flag_V = 0; |
33432 | flag_NotZ = res; |
33433 | flag_N = res; |
33434 | WRITE_BYTE_F(adr, res) |
33435 | POST_IO |
33436 | RET(12) |
33437 | } |
33438 | |
33439 | // ANDDa |
33440 | OPCODE(0xC118) |
33441 | { |
33442 | u32 adr, res; |
33443 | u32 src, dst; |
33444 | |
33445 | src = DREGu8((Opcode >> 9) & 7); |
33446 | adr = AREG((Opcode >> 0) & 7); |
33447 | AREG((Opcode >> 0) & 7) += 1; |
33448 | PRE_IO |
33449 | READ_BYTE_F(adr, res) |
33450 | res &= src; |
33451 | flag_C = 0; |
33452 | flag_V = 0; |
33453 | flag_NotZ = res; |
33454 | flag_N = res; |
33455 | WRITE_BYTE_F(adr, res) |
33456 | POST_IO |
33457 | RET(12) |
33458 | } |
33459 | |
33460 | // ANDDa |
33461 | OPCODE(0xC120) |
33462 | { |
33463 | u32 adr, res; |
33464 | u32 src, dst; |
33465 | |
33466 | src = DREGu8((Opcode >> 9) & 7); |
33467 | adr = AREG((Opcode >> 0) & 7) - 1; |
33468 | AREG((Opcode >> 0) & 7) = adr; |
33469 | PRE_IO |
33470 | READ_BYTE_F(adr, res) |
33471 | res &= src; |
33472 | flag_C = 0; |
33473 | flag_V = 0; |
33474 | flag_NotZ = res; |
33475 | flag_N = res; |
33476 | WRITE_BYTE_F(adr, res) |
33477 | POST_IO |
33478 | RET(14) |
33479 | } |
33480 | |
33481 | // ANDDa |
33482 | OPCODE(0xC128) |
33483 | { |
33484 | u32 adr, res; |
33485 | u32 src, dst; |
33486 | |
33487 | src = DREGu8((Opcode >> 9) & 7); |
33488 | FETCH_SWORD(adr); |
33489 | adr += AREG((Opcode >> 0) & 7); |
33490 | PRE_IO |
33491 | READ_BYTE_F(adr, res) |
33492 | res &= src; |
33493 | flag_C = 0; |
33494 | flag_V = 0; |
33495 | flag_NotZ = res; |
33496 | flag_N = res; |
33497 | WRITE_BYTE_F(adr, res) |
33498 | POST_IO |
33499 | RET(16) |
33500 | } |
33501 | |
33502 | // ANDDa |
33503 | OPCODE(0xC130) |
33504 | { |
33505 | u32 adr, res; |
33506 | u32 src, dst; |
33507 | |
33508 | src = DREGu8((Opcode >> 9) & 7); |
33509 | adr = AREG((Opcode >> 0) & 7); |
33510 | DECODE_EXT_WORD |
33511 | PRE_IO |
33512 | READ_BYTE_F(adr, res) |
33513 | res &= src; |
33514 | flag_C = 0; |
33515 | flag_V = 0; |
33516 | flag_NotZ = res; |
33517 | flag_N = res; |
33518 | WRITE_BYTE_F(adr, res) |
33519 | POST_IO |
33520 | RET(18) |
33521 | } |
33522 | |
33523 | // ANDDa |
33524 | OPCODE(0xC138) |
33525 | { |
33526 | u32 adr, res; |
33527 | u32 src, dst; |
33528 | |
33529 | src = DREGu8((Opcode >> 9) & 7); |
33530 | FETCH_SWORD(adr); |
33531 | PRE_IO |
33532 | READ_BYTE_F(adr, res) |
33533 | res &= src; |
33534 | flag_C = 0; |
33535 | flag_V = 0; |
33536 | flag_NotZ = res; |
33537 | flag_N = res; |
33538 | WRITE_BYTE_F(adr, res) |
33539 | POST_IO |
33540 | RET(16) |
33541 | } |
33542 | |
33543 | // ANDDa |
33544 | OPCODE(0xC139) |
33545 | { |
33546 | u32 adr, res; |
33547 | u32 src, dst; |
33548 | |
33549 | src = DREGu8((Opcode >> 9) & 7); |
33550 | FETCH_LONG(adr); |
33551 | PRE_IO |
33552 | READ_BYTE_F(adr, res) |
33553 | res &= src; |
33554 | flag_C = 0; |
33555 | flag_V = 0; |
33556 | flag_NotZ = res; |
33557 | flag_N = res; |
33558 | WRITE_BYTE_F(adr, res) |
33559 | POST_IO |
33560 | RET(20) |
33561 | } |
33562 | |
33563 | // ANDDa |
33564 | OPCODE(0xC11F) |
33565 | { |
33566 | u32 adr, res; |
33567 | u32 src, dst; |
33568 | |
33569 | src = DREGu8((Opcode >> 9) & 7); |
33570 | adr = AREG(7); |
33571 | AREG(7) += 2; |
33572 | PRE_IO |
33573 | READ_BYTE_F(adr, res) |
33574 | res &= src; |
33575 | flag_C = 0; |
33576 | flag_V = 0; |
33577 | flag_NotZ = res; |
33578 | flag_N = res; |
33579 | WRITE_BYTE_F(adr, res) |
33580 | POST_IO |
33581 | RET(12) |
33582 | } |
33583 | |
33584 | // ANDDa |
33585 | OPCODE(0xC127) |
33586 | { |
33587 | u32 adr, res; |
33588 | u32 src, dst; |
33589 | |
33590 | src = DREGu8((Opcode >> 9) & 7); |
33591 | adr = AREG(7) - 2; |
33592 | AREG(7) = adr; |
33593 | PRE_IO |
33594 | READ_BYTE_F(adr, res) |
33595 | res &= src; |
33596 | flag_C = 0; |
33597 | flag_V = 0; |
33598 | flag_NotZ = res; |
33599 | flag_N = res; |
33600 | WRITE_BYTE_F(adr, res) |
33601 | POST_IO |
33602 | RET(14) |
33603 | } |
33604 | |
33605 | // ANDDa |
33606 | OPCODE(0xC150) |
33607 | { |
33608 | u32 adr, res; |
33609 | u32 src, dst; |
33610 | |
33611 | src = DREGu16((Opcode >> 9) & 7); |
33612 | adr = AREG((Opcode >> 0) & 7); |
33613 | PRE_IO |
33614 | READ_WORD_F(adr, res) |
33615 | res &= src; |
33616 | flag_C = 0; |
33617 | flag_V = 0; |
33618 | flag_NotZ = res; |
33619 | flag_N = res >> 8; |
33620 | WRITE_WORD_F(adr, res) |
33621 | POST_IO |
33622 | RET(12) |
33623 | } |
33624 | |
33625 | // ANDDa |
33626 | OPCODE(0xC158) |
33627 | { |
33628 | u32 adr, res; |
33629 | u32 src, dst; |
33630 | |
33631 | src = DREGu16((Opcode >> 9) & 7); |
33632 | adr = AREG((Opcode >> 0) & 7); |
33633 | AREG((Opcode >> 0) & 7) += 2; |
33634 | PRE_IO |
33635 | READ_WORD_F(adr, res) |
33636 | res &= src; |
33637 | flag_C = 0; |
33638 | flag_V = 0; |
33639 | flag_NotZ = res; |
33640 | flag_N = res >> 8; |
33641 | WRITE_WORD_F(adr, res) |
33642 | POST_IO |
33643 | RET(12) |
33644 | } |
33645 | |
33646 | // ANDDa |
33647 | OPCODE(0xC160) |
33648 | { |
33649 | u32 adr, res; |
33650 | u32 src, dst; |
33651 | |
33652 | src = DREGu16((Opcode >> 9) & 7); |
33653 | adr = AREG((Opcode >> 0) & 7) - 2; |
33654 | AREG((Opcode >> 0) & 7) = adr; |
33655 | PRE_IO |
33656 | READ_WORD_F(adr, res) |
33657 | res &= src; |
33658 | flag_C = 0; |
33659 | flag_V = 0; |
33660 | flag_NotZ = res; |
33661 | flag_N = res >> 8; |
33662 | WRITE_WORD_F(adr, res) |
33663 | POST_IO |
33664 | RET(14) |
33665 | } |
33666 | |
33667 | // ANDDa |
33668 | OPCODE(0xC168) |
33669 | { |
33670 | u32 adr, res; |
33671 | u32 src, dst; |
33672 | |
33673 | src = DREGu16((Opcode >> 9) & 7); |
33674 | FETCH_SWORD(adr); |
33675 | adr += AREG((Opcode >> 0) & 7); |
33676 | PRE_IO |
33677 | READ_WORD_F(adr, res) |
33678 | res &= src; |
33679 | flag_C = 0; |
33680 | flag_V = 0; |
33681 | flag_NotZ = res; |
33682 | flag_N = res >> 8; |
33683 | WRITE_WORD_F(adr, res) |
33684 | POST_IO |
33685 | RET(16) |
33686 | } |
33687 | |
33688 | // ANDDa |
33689 | OPCODE(0xC170) |
33690 | { |
33691 | u32 adr, res; |
33692 | u32 src, dst; |
33693 | |
33694 | src = DREGu16((Opcode >> 9) & 7); |
33695 | adr = AREG((Opcode >> 0) & 7); |
33696 | DECODE_EXT_WORD |
33697 | PRE_IO |
33698 | READ_WORD_F(adr, res) |
33699 | res &= src; |
33700 | flag_C = 0; |
33701 | flag_V = 0; |
33702 | flag_NotZ = res; |
33703 | flag_N = res >> 8; |
33704 | WRITE_WORD_F(adr, res) |
33705 | POST_IO |
33706 | RET(18) |
33707 | } |
33708 | |
33709 | // ANDDa |
33710 | OPCODE(0xC178) |
33711 | { |
33712 | u32 adr, res; |
33713 | u32 src, dst; |
33714 | |
33715 | src = DREGu16((Opcode >> 9) & 7); |
33716 | FETCH_SWORD(adr); |
33717 | PRE_IO |
33718 | READ_WORD_F(adr, res) |
33719 | res &= src; |
33720 | flag_C = 0; |
33721 | flag_V = 0; |
33722 | flag_NotZ = res; |
33723 | flag_N = res >> 8; |
33724 | WRITE_WORD_F(adr, res) |
33725 | POST_IO |
33726 | RET(16) |
33727 | } |
33728 | |
33729 | // ANDDa |
33730 | OPCODE(0xC179) |
33731 | { |
33732 | u32 adr, res; |
33733 | u32 src, dst; |
33734 | |
33735 | src = DREGu16((Opcode >> 9) & 7); |
33736 | FETCH_LONG(adr); |
33737 | PRE_IO |
33738 | READ_WORD_F(adr, res) |
33739 | res &= src; |
33740 | flag_C = 0; |
33741 | flag_V = 0; |
33742 | flag_NotZ = res; |
33743 | flag_N = res >> 8; |
33744 | WRITE_WORD_F(adr, res) |
33745 | POST_IO |
33746 | RET(20) |
33747 | } |
33748 | |
33749 | // ANDDa |
33750 | OPCODE(0xC15F) |
33751 | { |
33752 | u32 adr, res; |
33753 | u32 src, dst; |
33754 | |
33755 | src = DREGu16((Opcode >> 9) & 7); |
33756 | adr = AREG(7); |
33757 | AREG(7) += 2; |
33758 | PRE_IO |
33759 | READ_WORD_F(adr, res) |
33760 | res &= src; |
33761 | flag_C = 0; |
33762 | flag_V = 0; |
33763 | flag_NotZ = res; |
33764 | flag_N = res >> 8; |
33765 | WRITE_WORD_F(adr, res) |
33766 | POST_IO |
33767 | RET(12) |
33768 | } |
33769 | |
33770 | // ANDDa |
33771 | OPCODE(0xC167) |
33772 | { |
33773 | u32 adr, res; |
33774 | u32 src, dst; |
33775 | |
33776 | src = DREGu16((Opcode >> 9) & 7); |
33777 | adr = AREG(7) - 2; |
33778 | AREG(7) = adr; |
33779 | PRE_IO |
33780 | READ_WORD_F(adr, res) |
33781 | res &= src; |
33782 | flag_C = 0; |
33783 | flag_V = 0; |
33784 | flag_NotZ = res; |
33785 | flag_N = res >> 8; |
33786 | WRITE_WORD_F(adr, res) |
33787 | POST_IO |
33788 | RET(14) |
33789 | } |
33790 | |
33791 | // ANDDa |
33792 | OPCODE(0xC190) |
33793 | { |
33794 | u32 adr, res; |
33795 | u32 src, dst; |
33796 | |
33797 | src = DREGu32((Opcode >> 9) & 7); |
33798 | adr = AREG((Opcode >> 0) & 7); |
33799 | PRE_IO |
33800 | READ_LONG_F(adr, res) |
33801 | res &= src; |
33802 | flag_C = 0; |
33803 | flag_V = 0; |
33804 | flag_NotZ = res; |
33805 | flag_N = res >> 24; |
33806 | WRITE_LONG_F(adr, res) |
33807 | POST_IO |
33808 | RET(20) |
33809 | } |
33810 | |
33811 | // ANDDa |
33812 | OPCODE(0xC198) |
33813 | { |
33814 | u32 adr, res; |
33815 | u32 src, dst; |
33816 | |
33817 | src = DREGu32((Opcode >> 9) & 7); |
33818 | adr = AREG((Opcode >> 0) & 7); |
33819 | AREG((Opcode >> 0) & 7) += 4; |
33820 | PRE_IO |
33821 | READ_LONG_F(adr, res) |
33822 | res &= src; |
33823 | flag_C = 0; |
33824 | flag_V = 0; |
33825 | flag_NotZ = res; |
33826 | flag_N = res >> 24; |
33827 | WRITE_LONG_F(adr, res) |
33828 | POST_IO |
33829 | RET(20) |
33830 | } |
33831 | |
33832 | // ANDDa |
33833 | OPCODE(0xC1A0) |
33834 | { |
33835 | u32 adr, res; |
33836 | u32 src, dst; |
33837 | |
33838 | src = DREGu32((Opcode >> 9) & 7); |
33839 | adr = AREG((Opcode >> 0) & 7) - 4; |
33840 | AREG((Opcode >> 0) & 7) = adr; |
33841 | PRE_IO |
33842 | READ_LONG_F(adr, res) |
33843 | res &= src; |
33844 | flag_C = 0; |
33845 | flag_V = 0; |
33846 | flag_NotZ = res; |
33847 | flag_N = res >> 24; |
33848 | WRITE_LONG_F(adr, res) |
33849 | POST_IO |
33850 | RET(22) |
33851 | } |
33852 | |
33853 | // ANDDa |
33854 | OPCODE(0xC1A8) |
33855 | { |
33856 | u32 adr, res; |
33857 | u32 src, dst; |
33858 | |
33859 | src = DREGu32((Opcode >> 9) & 7); |
33860 | FETCH_SWORD(adr); |
33861 | adr += AREG((Opcode >> 0) & 7); |
33862 | PRE_IO |
33863 | READ_LONG_F(adr, res) |
33864 | res &= src; |
33865 | flag_C = 0; |
33866 | flag_V = 0; |
33867 | flag_NotZ = res; |
33868 | flag_N = res >> 24; |
33869 | WRITE_LONG_F(adr, res) |
33870 | POST_IO |
33871 | RET(24) |
33872 | } |
33873 | |
33874 | // ANDDa |
33875 | OPCODE(0xC1B0) |
33876 | { |
33877 | u32 adr, res; |
33878 | u32 src, dst; |
33879 | |
33880 | src = DREGu32((Opcode >> 9) & 7); |
33881 | adr = AREG((Opcode >> 0) & 7); |
33882 | DECODE_EXT_WORD |
33883 | PRE_IO |
33884 | READ_LONG_F(adr, res) |
33885 | res &= src; |
33886 | flag_C = 0; |
33887 | flag_V = 0; |
33888 | flag_NotZ = res; |
33889 | flag_N = res >> 24; |
33890 | WRITE_LONG_F(adr, res) |
33891 | POST_IO |
33892 | RET(26) |
33893 | } |
33894 | |
33895 | // ANDDa |
33896 | OPCODE(0xC1B8) |
33897 | { |
33898 | u32 adr, res; |
33899 | u32 src, dst; |
33900 | |
33901 | src = DREGu32((Opcode >> 9) & 7); |
33902 | FETCH_SWORD(adr); |
33903 | PRE_IO |
33904 | READ_LONG_F(adr, res) |
33905 | res &= src; |
33906 | flag_C = 0; |
33907 | flag_V = 0; |
33908 | flag_NotZ = res; |
33909 | flag_N = res >> 24; |
33910 | WRITE_LONG_F(adr, res) |
33911 | POST_IO |
33912 | RET(24) |
33913 | } |
33914 | |
33915 | // ANDDa |
33916 | OPCODE(0xC1B9) |
33917 | { |
33918 | u32 adr, res; |
33919 | u32 src, dst; |
33920 | |
33921 | src = DREGu32((Opcode >> 9) & 7); |
33922 | FETCH_LONG(adr); |
33923 | PRE_IO |
33924 | READ_LONG_F(adr, res) |
33925 | res &= src; |
33926 | flag_C = 0; |
33927 | flag_V = 0; |
33928 | flag_NotZ = res; |
33929 | flag_N = res >> 24; |
33930 | WRITE_LONG_F(adr, res) |
33931 | POST_IO |
33932 | RET(28) |
33933 | } |
33934 | |
33935 | // ANDDa |
33936 | OPCODE(0xC19F) |
33937 | { |
33938 | u32 adr, res; |
33939 | u32 src, dst; |
33940 | |
33941 | src = DREGu32((Opcode >> 9) & 7); |
33942 | adr = AREG(7); |
33943 | AREG(7) += 4; |
33944 | PRE_IO |
33945 | READ_LONG_F(adr, res) |
33946 | res &= src; |
33947 | flag_C = 0; |
33948 | flag_V = 0; |
33949 | flag_NotZ = res; |
33950 | flag_N = res >> 24; |
33951 | WRITE_LONG_F(adr, res) |
33952 | POST_IO |
33953 | RET(20) |
33954 | } |
33955 | |
33956 | // ANDDa |
33957 | OPCODE(0xC1A7) |
33958 | { |
33959 | u32 adr, res; |
33960 | u32 src, dst; |
33961 | |
33962 | src = DREGu32((Opcode >> 9) & 7); |
33963 | adr = AREG(7) - 4; |
33964 | AREG(7) = adr; |
33965 | PRE_IO |
33966 | READ_LONG_F(adr, res) |
33967 | res &= src; |
33968 | flag_C = 0; |
33969 | flag_V = 0; |
33970 | flag_NotZ = res; |
33971 | flag_N = res >> 24; |
33972 | WRITE_LONG_F(adr, res) |
33973 | POST_IO |
33974 | RET(22) |
33975 | } |
33976 | |
33977 | // ABCD |
33978 | OPCODE(0xC100) |
33979 | { |
33980 | u32 adr, res; |
33981 | u32 src, dst; |
33982 | |
33983 | src = DREGu8((Opcode >> 0) & 7); |
33984 | dst = DREGu8((Opcode >> 9) & 7); |
33985 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
33986 | if (res > 9) res += 6; |
33987 | res += (dst & 0xF0) + (src & 0xF0); |
33988 | if (res > 0x99) |
33989 | { |
33990 | res -= 0xA0; |
33991 | flag_X = flag_C = M68K_SR_C; |
33992 | } |
33993 | else flag_X = flag_C = 0; |
33994 | flag_NotZ |= res & 0xFF; |
33995 | flag_N = res; |
33996 | DREGu8((Opcode >> 9) & 7) = res; |
33997 | RET(6) |
33998 | } |
33999 | |
34000 | // ABCDM |
34001 | OPCODE(0xC108) |
34002 | { |
34003 | u32 adr, res; |
34004 | u32 src, dst; |
34005 | |
34006 | adr = AREG((Opcode >> 0) & 7) - 1; |
34007 | AREG((Opcode >> 0) & 7) = adr; |
34008 | PRE_IO |
34009 | READ_BYTE_F(adr, src) |
34010 | adr = AREG((Opcode >> 9) & 7) - 1; |
34011 | AREG((Opcode >> 9) & 7) = adr; |
34012 | READ_BYTE_F(adr, dst) |
34013 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34014 | if (res > 9) res += 6; |
34015 | res += (dst & 0xF0) + (src & 0xF0); |
34016 | if (res > 0x99) |
34017 | { |
34018 | res -= 0xA0; |
34019 | flag_X = flag_C = M68K_SR_C; |
34020 | } |
34021 | else flag_X = flag_C = 0; |
34022 | flag_NotZ |= res & 0xFF; |
34023 | flag_N = res; |
34024 | WRITE_BYTE_F(adr, res) |
34025 | POST_IO |
34026 | RET(18) |
34027 | } |
34028 | |
34029 | // ABCD7M |
34030 | OPCODE(0xC10F) |
34031 | { |
34032 | u32 adr, res; |
34033 | u32 src, dst; |
34034 | |
34035 | adr = AREG(7) - 2; |
34036 | AREG(7) = adr; |
34037 | PRE_IO |
34038 | READ_BYTE_F(adr, src) |
34039 | adr = AREG((Opcode >> 9) & 7) - 1; |
34040 | AREG((Opcode >> 9) & 7) = adr; |
34041 | READ_BYTE_F(adr, dst) |
34042 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34043 | if (res > 9) res += 6; |
34044 | res += (dst & 0xF0) + (src & 0xF0); |
34045 | if (res > 0x99) |
34046 | { |
34047 | res -= 0xA0; |
34048 | flag_X = flag_C = M68K_SR_C; |
34049 | } |
34050 | else flag_X = flag_C = 0; |
34051 | flag_NotZ |= res & 0xFF; |
34052 | flag_N = res; |
34053 | WRITE_BYTE_F(adr, res) |
34054 | POST_IO |
34055 | RET(18) |
34056 | } |
34057 | |
34058 | // ABCDM7 |
34059 | OPCODE(0xCF08) |
34060 | { |
34061 | u32 adr, res; |
34062 | u32 src, dst; |
34063 | |
34064 | adr = AREG((Opcode >> 0) & 7) - 1; |
34065 | AREG((Opcode >> 0) & 7) = adr; |
34066 | PRE_IO |
34067 | READ_BYTE_F(adr, src) |
34068 | adr = AREG(7) - 2; |
34069 | AREG(7) = adr; |
34070 | READ_BYTE_F(adr, dst) |
34071 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34072 | if (res > 9) res += 6; |
34073 | res += (dst & 0xF0) + (src & 0xF0); |
34074 | if (res > 0x99) |
34075 | { |
34076 | res -= 0xA0; |
34077 | flag_X = flag_C = M68K_SR_C; |
34078 | } |
34079 | else flag_X = flag_C = 0; |
34080 | flag_NotZ |= res & 0xFF; |
34081 | flag_N = res; |
34082 | WRITE_BYTE_F(adr, res) |
34083 | POST_IO |
34084 | RET(18) |
34085 | } |
34086 | |
34087 | // ABCD7M7 |
34088 | OPCODE(0xCF0F) |
34089 | { |
34090 | u32 adr, res; |
34091 | u32 src, dst; |
34092 | |
34093 | adr = AREG(7) - 2; |
34094 | AREG(7) = adr; |
34095 | PRE_IO |
34096 | READ_BYTE_F(adr, src) |
34097 | adr = AREG(7) - 2; |
34098 | AREG(7) = adr; |
34099 | READ_BYTE_F(adr, dst) |
34100 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34101 | if (res > 9) res += 6; |
34102 | res += (dst & 0xF0) + (src & 0xF0); |
34103 | if (res > 0x99) |
34104 | { |
34105 | res -= 0xA0; |
34106 | flag_X = flag_C = M68K_SR_C; |
34107 | } |
34108 | else flag_X = flag_C = 0; |
34109 | flag_NotZ |= res & 0xFF; |
34110 | flag_N = res; |
34111 | WRITE_BYTE_F(adr, res) |
34112 | POST_IO |
34113 | RET(18) |
34114 | } |
34115 | |
34116 | // MULU |
34117 | OPCODE(0xC0C0) |
34118 | { |
34119 | u32 adr, res; |
34120 | u32 src, dst; |
34121 | |
34122 | src = DREGu16((Opcode >> 0) & 7); |
34123 | res = DREGu16((Opcode >> 9) & 7); |
34124 | res *= src; |
34125 | flag_N = res >> 24; |
34126 | flag_NotZ = res; |
34127 | flag_V = flag_C = 0; |
34128 | DREGu32((Opcode >> 9) & 7) = res; |
34129 | #ifdef USE_CYCLONE_TIMING |
34130 | RET(54) |
34131 | #else |
34132 | RET(50) |
34133 | #endif |
34134 | } |
34135 | |
34136 | // MULU |
34137 | OPCODE(0xC0D0) |
34138 | { |
34139 | u32 adr, res; |
34140 | u32 src, dst; |
34141 | |
34142 | adr = AREG((Opcode >> 0) & 7); |
34143 | PRE_IO |
34144 | READ_WORD_F(adr, src) |
34145 | res = DREGu16((Opcode >> 9) & 7); |
34146 | res *= src; |
34147 | flag_N = res >> 24; |
34148 | flag_NotZ = res; |
34149 | flag_V = flag_C = 0; |
34150 | DREGu32((Opcode >> 9) & 7) = res; |
34151 | POST_IO |
34152 | #ifdef USE_CYCLONE_TIMING |
34153 | RET(58) |
34154 | #else |
34155 | RET(54) |
34156 | #endif |
34157 | } |
34158 | |
34159 | // MULU |
34160 | OPCODE(0xC0D8) |
34161 | { |
34162 | u32 adr, res; |
34163 | u32 src, dst; |
34164 | |
34165 | adr = AREG((Opcode >> 0) & 7); |
34166 | AREG((Opcode >> 0) & 7) += 2; |
34167 | PRE_IO |
34168 | READ_WORD_F(adr, src) |
34169 | res = DREGu16((Opcode >> 9) & 7); |
34170 | res *= src; |
34171 | flag_N = res >> 24; |
34172 | flag_NotZ = res; |
34173 | flag_V = flag_C = 0; |
34174 | DREGu32((Opcode >> 9) & 7) = res; |
34175 | POST_IO |
34176 | #ifdef USE_CYCLONE_TIMING |
34177 | RET(58) |
34178 | #else |
34179 | RET(54) |
34180 | #endif |
34181 | } |
34182 | |
34183 | // MULU |
34184 | OPCODE(0xC0E0) |
34185 | { |
34186 | u32 adr, res; |
34187 | u32 src, dst; |
34188 | |
34189 | adr = AREG((Opcode >> 0) & 7) - 2; |
34190 | AREG((Opcode >> 0) & 7) = adr; |
34191 | PRE_IO |
34192 | READ_WORD_F(adr, src) |
34193 | res = DREGu16((Opcode >> 9) & 7); |
34194 | res *= src; |
34195 | flag_N = res >> 24; |
34196 | flag_NotZ = res; |
34197 | flag_V = flag_C = 0; |
34198 | DREGu32((Opcode >> 9) & 7) = res; |
34199 | POST_IO |
34200 | #ifdef USE_CYCLONE_TIMING |
34201 | RET(60) |
34202 | #else |
34203 | RET(56) |
34204 | #endif |
34205 | } |
34206 | |
34207 | // MULU |
34208 | OPCODE(0xC0E8) |
34209 | { |
34210 | u32 adr, res; |
34211 | u32 src, dst; |
34212 | |
34213 | FETCH_SWORD(adr); |
34214 | adr += AREG((Opcode >> 0) & 7); |
34215 | PRE_IO |
34216 | READ_WORD_F(adr, src) |
34217 | res = DREGu16((Opcode >> 9) & 7); |
34218 | res *= src; |
34219 | flag_N = res >> 24; |
34220 | flag_NotZ = res; |
34221 | flag_V = flag_C = 0; |
34222 | DREGu32((Opcode >> 9) & 7) = res; |
34223 | POST_IO |
34224 | #ifdef USE_CYCLONE_TIMING |
34225 | RET(62) |
34226 | #else |
34227 | RET(58) |
34228 | #endif |
34229 | } |
34230 | |
34231 | // MULU |
34232 | OPCODE(0xC0F0) |
34233 | { |
34234 | u32 adr, res; |
34235 | u32 src, dst; |
34236 | |
34237 | adr = AREG((Opcode >> 0) & 7); |
34238 | DECODE_EXT_WORD |
34239 | PRE_IO |
34240 | READ_WORD_F(adr, src) |
34241 | res = DREGu16((Opcode >> 9) & 7); |
34242 | res *= src; |
34243 | flag_N = res >> 24; |
34244 | flag_NotZ = res; |
34245 | flag_V = flag_C = 0; |
34246 | DREGu32((Opcode >> 9) & 7) = res; |
34247 | POST_IO |
34248 | #ifdef USE_CYCLONE_TIMING |
34249 | RET(64) |
34250 | #else |
34251 | RET(60) |
34252 | #endif |
34253 | } |
34254 | |
34255 | // MULU |
34256 | OPCODE(0xC0F8) |
34257 | { |
34258 | u32 adr, res; |
34259 | u32 src, dst; |
34260 | |
34261 | FETCH_SWORD(adr); |
34262 | PRE_IO |
34263 | READ_WORD_F(adr, src) |
34264 | res = DREGu16((Opcode >> 9) & 7); |
34265 | res *= src; |
34266 | flag_N = res >> 24; |
34267 | flag_NotZ = res; |
34268 | flag_V = flag_C = 0; |
34269 | DREGu32((Opcode >> 9) & 7) = res; |
34270 | POST_IO |
34271 | #ifdef USE_CYCLONE_TIMING |
34272 | RET(62) |
34273 | #else |
34274 | RET(58) |
34275 | #endif |
34276 | } |
34277 | |
34278 | // MULU |
34279 | OPCODE(0xC0F9) |
34280 | { |
34281 | u32 adr, res; |
34282 | u32 src, dst; |
34283 | |
34284 | FETCH_LONG(adr); |
34285 | PRE_IO |
34286 | READ_WORD_F(adr, src) |
34287 | res = DREGu16((Opcode >> 9) & 7); |
34288 | res *= src; |
34289 | flag_N = res >> 24; |
34290 | flag_NotZ = res; |
34291 | flag_V = flag_C = 0; |
34292 | DREGu32((Opcode >> 9) & 7) = res; |
34293 | POST_IO |
34294 | #ifdef USE_CYCLONE_TIMING |
34295 | RET(66) |
34296 | #else |
34297 | RET(62) |
34298 | #endif |
34299 | } |
34300 | |
34301 | // MULU |
34302 | OPCODE(0xC0FA) |
34303 | { |
34304 | u32 adr, res; |
34305 | u32 src, dst; |
34306 | |
34307 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34308 | PC++; |
34309 | PRE_IO |
34310 | READ_WORD_F(adr, src) |
34311 | res = DREGu16((Opcode >> 9) & 7); |
34312 | res *= src; |
34313 | flag_N = res >> 24; |
34314 | flag_NotZ = res; |
34315 | flag_V = flag_C = 0; |
34316 | DREGu32((Opcode >> 9) & 7) = res; |
34317 | POST_IO |
34318 | #ifdef USE_CYCLONE_TIMING |
34319 | RET(62) |
34320 | #else |
34321 | RET(58) |
34322 | #endif |
34323 | } |
34324 | |
34325 | // MULU |
34326 | OPCODE(0xC0FB) |
34327 | { |
34328 | u32 adr, res; |
34329 | u32 src, dst; |
34330 | |
34331 | adr = (u32)(PC) - BasePC; |
34332 | DECODE_EXT_WORD |
34333 | PRE_IO |
34334 | READ_WORD_F(adr, src) |
34335 | res = DREGu16((Opcode >> 9) & 7); |
34336 | res *= src; |
34337 | flag_N = res >> 24; |
34338 | flag_NotZ = res; |
34339 | flag_V = flag_C = 0; |
34340 | DREGu32((Opcode >> 9) & 7) = res; |
34341 | POST_IO |
34342 | #ifdef USE_CYCLONE_TIMING |
34343 | RET(64) |
34344 | #else |
34345 | RET(60) |
34346 | #endif |
34347 | } |
34348 | |
34349 | // MULU |
34350 | OPCODE(0xC0FC) |
34351 | { |
34352 | u32 adr, res; |
34353 | u32 src, dst; |
34354 | |
34355 | FETCH_WORD(src); |
34356 | res = DREGu16((Opcode >> 9) & 7); |
34357 | res *= src; |
34358 | flag_N = res >> 24; |
34359 | flag_NotZ = res; |
34360 | flag_V = flag_C = 0; |
34361 | DREGu32((Opcode >> 9) & 7) = res; |
34362 | #ifdef USE_CYCLONE_TIMING |
34363 | RET(58) |
34364 | #else |
34365 | RET(54) |
34366 | #endif |
34367 | } |
34368 | |
34369 | // MULU |
34370 | OPCODE(0xC0DF) |
34371 | { |
34372 | u32 adr, res; |
34373 | u32 src, dst; |
34374 | |
34375 | adr = AREG(7); |
34376 | AREG(7) += 2; |
34377 | PRE_IO |
34378 | READ_WORD_F(adr, src) |
34379 | res = DREGu16((Opcode >> 9) & 7); |
34380 | res *= src; |
34381 | flag_N = res >> 24; |
34382 | flag_NotZ = res; |
34383 | flag_V = flag_C = 0; |
34384 | DREGu32((Opcode >> 9) & 7) = res; |
34385 | POST_IO |
34386 | #ifdef USE_CYCLONE_TIMING |
34387 | RET(58) |
34388 | #else |
34389 | RET(54) |
34390 | #endif |
34391 | } |
34392 | |
34393 | // MULU |
34394 | OPCODE(0xC0E7) |
34395 | { |
34396 | u32 adr, res; |
34397 | u32 src, dst; |
34398 | |
34399 | adr = AREG(7) - 2; |
34400 | AREG(7) = adr; |
34401 | PRE_IO |
34402 | READ_WORD_F(adr, src) |
34403 | res = DREGu16((Opcode >> 9) & 7); |
34404 | res *= src; |
34405 | flag_N = res >> 24; |
34406 | flag_NotZ = res; |
34407 | flag_V = flag_C = 0; |
34408 | DREGu32((Opcode >> 9) & 7) = res; |
34409 | POST_IO |
34410 | #ifdef USE_CYCLONE_TIMING |
34411 | RET(60) |
34412 | #else |
34413 | RET(56) |
34414 | #endif |
34415 | } |
34416 | |
34417 | // MULS |
34418 | OPCODE(0xC1C0) |
34419 | { |
34420 | u32 adr, res; |
34421 | u32 src, dst; |
34422 | |
34423 | src = (s32)DREGs16((Opcode >> 0) & 7); |
34424 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34425 | res = ((s32)res) * ((s32)src); |
34426 | flag_N = res >> 24; |
34427 | flag_NotZ = res; |
34428 | flag_V = flag_C = 0; |
34429 | DREGu32((Opcode >> 9) & 7) = res; |
34430 | #ifdef USE_CYCLONE_TIMING |
34431 | RET(54) |
34432 | #else |
34433 | RET(50) |
34434 | #endif |
34435 | } |
34436 | |
34437 | // MULS |
34438 | OPCODE(0xC1D0) |
34439 | { |
34440 | u32 adr, res; |
34441 | u32 src, dst; |
34442 | |
34443 | adr = AREG((Opcode >> 0) & 7); |
34444 | PRE_IO |
34445 | READSX_WORD_F(adr, src) |
34446 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34447 | res = ((s32)res) * ((s32)src); |
34448 | flag_N = res >> 24; |
34449 | flag_NotZ = res; |
34450 | flag_V = flag_C = 0; |
34451 | DREGu32((Opcode >> 9) & 7) = res; |
34452 | POST_IO |
34453 | #ifdef USE_CYCLONE_TIMING |
34454 | RET(58) |
34455 | #else |
34456 | RET(54) |
34457 | #endif |
34458 | } |
34459 | |
34460 | // MULS |
34461 | OPCODE(0xC1D8) |
34462 | { |
34463 | u32 adr, res; |
34464 | u32 src, dst; |
34465 | |
34466 | adr = AREG((Opcode >> 0) & 7); |
34467 | AREG((Opcode >> 0) & 7) += 2; |
34468 | PRE_IO |
34469 | READSX_WORD_F(adr, src) |
34470 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34471 | res = ((s32)res) * ((s32)src); |
34472 | flag_N = res >> 24; |
34473 | flag_NotZ = res; |
34474 | flag_V = flag_C = 0; |
34475 | DREGu32((Opcode >> 9) & 7) = res; |
34476 | POST_IO |
34477 | #ifdef USE_CYCLONE_TIMING |
34478 | RET(58) |
34479 | #else |
34480 | RET(54) |
34481 | #endif |
34482 | } |
34483 | |
34484 | // MULS |
34485 | OPCODE(0xC1E0) |
34486 | { |
34487 | u32 adr, res; |
34488 | u32 src, dst; |
34489 | |
34490 | adr = AREG((Opcode >> 0) & 7) - 2; |
34491 | AREG((Opcode >> 0) & 7) = adr; |
34492 | PRE_IO |
34493 | READSX_WORD_F(adr, src) |
34494 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34495 | res = ((s32)res) * ((s32)src); |
34496 | flag_N = res >> 24; |
34497 | flag_NotZ = res; |
34498 | flag_V = flag_C = 0; |
34499 | DREGu32((Opcode >> 9) & 7) = res; |
34500 | POST_IO |
34501 | #ifdef USE_CYCLONE_TIMING |
34502 | RET(60) |
34503 | #else |
34504 | RET(56) |
34505 | #endif |
34506 | } |
34507 | |
34508 | // MULS |
34509 | OPCODE(0xC1E8) |
34510 | { |
34511 | u32 adr, res; |
34512 | u32 src, dst; |
34513 | |
34514 | FETCH_SWORD(adr); |
34515 | adr += AREG((Opcode >> 0) & 7); |
34516 | PRE_IO |
34517 | READSX_WORD_F(adr, src) |
34518 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34519 | res = ((s32)res) * ((s32)src); |
34520 | flag_N = res >> 24; |
34521 | flag_NotZ = res; |
34522 | flag_V = flag_C = 0; |
34523 | DREGu32((Opcode >> 9) & 7) = res; |
34524 | POST_IO |
34525 | #ifdef USE_CYCLONE_TIMING |
34526 | RET(62) |
34527 | #else |
34528 | RET(58) |
34529 | #endif |
34530 | } |
34531 | |
34532 | // MULS |
34533 | OPCODE(0xC1F0) |
34534 | { |
34535 | u32 adr, res; |
34536 | u32 src, dst; |
34537 | |
34538 | adr = AREG((Opcode >> 0) & 7); |
34539 | DECODE_EXT_WORD |
34540 | PRE_IO |
34541 | READSX_WORD_F(adr, src) |
34542 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34543 | res = ((s32)res) * ((s32)src); |
34544 | flag_N = res >> 24; |
34545 | flag_NotZ = res; |
34546 | flag_V = flag_C = 0; |
34547 | DREGu32((Opcode >> 9) & 7) = res; |
34548 | POST_IO |
34549 | #ifdef USE_CYCLONE_TIMING |
34550 | RET(64) |
34551 | #else |
34552 | RET(60) |
34553 | #endif |
34554 | } |
34555 | |
34556 | // MULS |
34557 | OPCODE(0xC1F8) |
34558 | { |
34559 | u32 adr, res; |
34560 | u32 src, dst; |
34561 | |
34562 | FETCH_SWORD(adr); |
34563 | PRE_IO |
34564 | READSX_WORD_F(adr, src) |
34565 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34566 | res = ((s32)res) * ((s32)src); |
34567 | flag_N = res >> 24; |
34568 | flag_NotZ = res; |
34569 | flag_V = flag_C = 0; |
34570 | DREGu32((Opcode >> 9) & 7) = res; |
34571 | POST_IO |
34572 | #ifdef USE_CYCLONE_TIMING |
34573 | RET(62) |
34574 | #else |
34575 | RET(58) |
34576 | #endif |
34577 | } |
34578 | |
34579 | // MULS |
34580 | OPCODE(0xC1F9) |
34581 | { |
34582 | u32 adr, res; |
34583 | u32 src, dst; |
34584 | |
34585 | FETCH_LONG(adr); |
34586 | PRE_IO |
34587 | READSX_WORD_F(adr, src) |
34588 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34589 | res = ((s32)res) * ((s32)src); |
34590 | flag_N = res >> 24; |
34591 | flag_NotZ = res; |
34592 | flag_V = flag_C = 0; |
34593 | DREGu32((Opcode >> 9) & 7) = res; |
34594 | POST_IO |
34595 | #ifdef USE_CYCLONE_TIMING |
34596 | RET(66) |
34597 | #else |
34598 | RET(62) |
34599 | #endif |
34600 | } |
34601 | |
34602 | // MULS |
34603 | OPCODE(0xC1FA) |
34604 | { |
34605 | u32 adr, res; |
34606 | u32 src, dst; |
34607 | |
34608 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34609 | PC++; |
34610 | PRE_IO |
34611 | READSX_WORD_F(adr, src) |
34612 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34613 | res = ((s32)res) * ((s32)src); |
34614 | flag_N = res >> 24; |
34615 | flag_NotZ = res; |
34616 | flag_V = flag_C = 0; |
34617 | DREGu32((Opcode >> 9) & 7) = res; |
34618 | POST_IO |
34619 | #ifdef USE_CYCLONE_TIMING |
34620 | RET(62) |
34621 | #else |
34622 | RET(58) |
34623 | #endif |
34624 | } |
34625 | |
34626 | // MULS |
34627 | OPCODE(0xC1FB) |
34628 | { |
34629 | u32 adr, res; |
34630 | u32 src, dst; |
34631 | |
34632 | adr = (u32)(PC) - BasePC; |
34633 | DECODE_EXT_WORD |
34634 | PRE_IO |
34635 | READSX_WORD_F(adr, src) |
34636 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34637 | res = ((s32)res) * ((s32)src); |
34638 | flag_N = res >> 24; |
34639 | flag_NotZ = res; |
34640 | flag_V = flag_C = 0; |
34641 | DREGu32((Opcode >> 9) & 7) = res; |
34642 | POST_IO |
34643 | #ifdef USE_CYCLONE_TIMING |
34644 | RET(64) |
34645 | #else |
34646 | RET(60) |
34647 | #endif |
34648 | } |
34649 | |
34650 | // MULS |
34651 | OPCODE(0xC1FC) |
34652 | { |
34653 | u32 adr, res; |
34654 | u32 src, dst; |
34655 | |
34656 | FETCH_SWORD(src); |
34657 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34658 | res = ((s32)res) * ((s32)src); |
34659 | flag_N = res >> 24; |
34660 | flag_NotZ = res; |
34661 | flag_V = flag_C = 0; |
34662 | DREGu32((Opcode >> 9) & 7) = res; |
34663 | #ifdef USE_CYCLONE_TIMING |
34664 | RET(58) |
34665 | #else |
34666 | RET(54) |
34667 | #endif |
34668 | } |
34669 | |
34670 | // MULS |
34671 | OPCODE(0xC1DF) |
34672 | { |
34673 | u32 adr, res; |
34674 | u32 src, dst; |
34675 | |
34676 | adr = AREG(7); |
34677 | AREG(7) += 2; |
34678 | PRE_IO |
34679 | READSX_WORD_F(adr, src) |
34680 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34681 | res = ((s32)res) * ((s32)src); |
34682 | flag_N = res >> 24; |
34683 | flag_NotZ = res; |
34684 | flag_V = flag_C = 0; |
34685 | DREGu32((Opcode >> 9) & 7) = res; |
34686 | POST_IO |
34687 | #ifdef USE_CYCLONE_TIMING |
34688 | RET(58) |
34689 | #else |
34690 | RET(54) |
34691 | #endif |
34692 | } |
34693 | |
34694 | // MULS |
34695 | OPCODE(0xC1E7) |
34696 | { |
34697 | u32 adr, res; |
34698 | u32 src, dst; |
34699 | |
34700 | adr = AREG(7) - 2; |
34701 | AREG(7) = adr; |
34702 | PRE_IO |
34703 | READSX_WORD_F(adr, src) |
34704 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34705 | res = ((s32)res) * ((s32)src); |
34706 | flag_N = res >> 24; |
34707 | flag_NotZ = res; |
34708 | flag_V = flag_C = 0; |
34709 | DREGu32((Opcode >> 9) & 7) = res; |
34710 | POST_IO |
34711 | #ifdef USE_CYCLONE_TIMING |
34712 | RET(60) |
34713 | #else |
34714 | RET(56) |
34715 | #endif |
34716 | } |
34717 | |
34718 | // EXGDD |
34719 | OPCODE(0xC140) |
34720 | { |
34721 | u32 adr, res; |
34722 | u32 src, dst; |
34723 | |
34724 | res = DREGu32((Opcode >> 0) & 7); |
34725 | src = DREGu32((Opcode >> 9) & 7); |
34726 | DREGu32((Opcode >> 9) & 7) = res; |
34727 | res = src; |
34728 | DREGu32((Opcode >> 0) & 7) = res; |
34729 | RET(6) |
34730 | } |
34731 | |
34732 | // EXGAA |
34733 | OPCODE(0xC148) |
34734 | { |
34735 | u32 adr, res; |
34736 | u32 src, dst; |
34737 | |
34738 | res = AREGu32((Opcode >> 0) & 7); |
34739 | src = AREGu32((Opcode >> 9) & 7); |
34740 | AREG((Opcode >> 9) & 7) = res; |
34741 | res = src; |
34742 | AREG((Opcode >> 0) & 7) = res; |
34743 | RET(6) |
34744 | } |
34745 | |
34746 | // EXGAD |
34747 | OPCODE(0xC188) |
34748 | { |
34749 | u32 adr, res; |
34750 | u32 src, dst; |
34751 | |
34752 | res = AREGu32((Opcode >> 0) & 7); |
34753 | src = DREGu32((Opcode >> 9) & 7); |
34754 | DREGu32((Opcode >> 9) & 7) = res; |
34755 | res = src; |
34756 | AREG((Opcode >> 0) & 7) = res; |
34757 | RET(6) |
34758 | } |
34759 | |
34760 | // ADDaD |
34761 | OPCODE(0xD000) |
34762 | { |
34763 | u32 adr, res; |
34764 | u32 src, dst; |
34765 | |
34766 | src = DREGu8((Opcode >> 0) & 7); |
34767 | dst = DREGu8((Opcode >> 9) & 7); |
34768 | res = dst + src; |
34769 | flag_N = flag_X = flag_C = res; |
34770 | flag_V = (src ^ res) & (dst ^ res); |
34771 | flag_NotZ = res & 0xFF; |
34772 | DREGu8((Opcode >> 9) & 7) = res; |
34773 | RET(4) |
34774 | } |
34775 | |
34776 | // ADDaD |
03e4f2a3 |
34777 | #if 0 |
70357ce5 |
34778 | OPCODE(0xD008) |
34779 | { |
34780 | u32 adr, res; |
34781 | u32 src, dst; |
34782 | |
34783 | // can't read byte from Ax registers ! |
34784 | m68kcontext.execinfo |= M68K_FAULTED; |
34785 | m68kcontext.io_cycle_counter = 0; |
34786 | /* |
34787 | goto famec_Exec_End; |
34788 | dst = DREGu8((Opcode >> 9) & 7); |
34789 | res = dst + src; |
34790 | flag_N = flag_X = flag_C = res; |
34791 | flag_V = (src ^ res) & (dst ^ res); |
34792 | flag_NotZ = res & 0xFF; |
34793 | DREGu8((Opcode >> 9) & 7) = res; |
34794 | */ |
34795 | RET(4) |
34796 | } |
03e4f2a3 |
34797 | #endif |
70357ce5 |
34798 | |
34799 | // ADDaD |
34800 | OPCODE(0xD010) |
34801 | { |
34802 | u32 adr, res; |
34803 | u32 src, dst; |
34804 | |
34805 | adr = AREG((Opcode >> 0) & 7); |
34806 | PRE_IO |
34807 | READ_BYTE_F(adr, src) |
34808 | dst = DREGu8((Opcode >> 9) & 7); |
34809 | res = dst + src; |
34810 | flag_N = flag_X = flag_C = res; |
34811 | flag_V = (src ^ res) & (dst ^ res); |
34812 | flag_NotZ = res & 0xFF; |
34813 | DREGu8((Opcode >> 9) & 7) = res; |
34814 | POST_IO |
34815 | RET(8) |
34816 | } |
34817 | |
34818 | // ADDaD |
34819 | OPCODE(0xD018) |
34820 | { |
34821 | u32 adr, res; |
34822 | u32 src, dst; |
34823 | |
34824 | adr = AREG((Opcode >> 0) & 7); |
34825 | AREG((Opcode >> 0) & 7) += 1; |
34826 | PRE_IO |
34827 | READ_BYTE_F(adr, src) |
34828 | dst = DREGu8((Opcode >> 9) & 7); |
34829 | res = dst + src; |
34830 | flag_N = flag_X = flag_C = res; |
34831 | flag_V = (src ^ res) & (dst ^ res); |
34832 | flag_NotZ = res & 0xFF; |
34833 | DREGu8((Opcode >> 9) & 7) = res; |
34834 | POST_IO |
34835 | RET(8) |
34836 | } |
34837 | |
34838 | // ADDaD |
34839 | OPCODE(0xD020) |
34840 | { |
34841 | u32 adr, res; |
34842 | u32 src, dst; |
34843 | |
34844 | adr = AREG((Opcode >> 0) & 7) - 1; |
34845 | AREG((Opcode >> 0) & 7) = adr; |
34846 | PRE_IO |
34847 | READ_BYTE_F(adr, src) |
34848 | dst = DREGu8((Opcode >> 9) & 7); |
34849 | res = dst + src; |
34850 | flag_N = flag_X = flag_C = res; |
34851 | flag_V = (src ^ res) & (dst ^ res); |
34852 | flag_NotZ = res & 0xFF; |
34853 | DREGu8((Opcode >> 9) & 7) = res; |
34854 | POST_IO |
34855 | RET(10) |
34856 | } |
34857 | |
34858 | // ADDaD |
34859 | OPCODE(0xD028) |
34860 | { |
34861 | u32 adr, res; |
34862 | u32 src, dst; |
34863 | |
34864 | FETCH_SWORD(adr); |
34865 | adr += AREG((Opcode >> 0) & 7); |
34866 | PRE_IO |
34867 | READ_BYTE_F(adr, src) |
34868 | dst = DREGu8((Opcode >> 9) & 7); |
34869 | res = dst + src; |
34870 | flag_N = flag_X = flag_C = res; |
34871 | flag_V = (src ^ res) & (dst ^ res); |
34872 | flag_NotZ = res & 0xFF; |
34873 | DREGu8((Opcode >> 9) & 7) = res; |
34874 | POST_IO |
34875 | RET(12) |
34876 | } |
34877 | |
34878 | // ADDaD |
34879 | OPCODE(0xD030) |
34880 | { |
34881 | u32 adr, res; |
34882 | u32 src, dst; |
34883 | |
34884 | adr = AREG((Opcode >> 0) & 7); |
34885 | DECODE_EXT_WORD |
34886 | PRE_IO |
34887 | READ_BYTE_F(adr, src) |
34888 | dst = DREGu8((Opcode >> 9) & 7); |
34889 | res = dst + src; |
34890 | flag_N = flag_X = flag_C = res; |
34891 | flag_V = (src ^ res) & (dst ^ res); |
34892 | flag_NotZ = res & 0xFF; |
34893 | DREGu8((Opcode >> 9) & 7) = res; |
34894 | POST_IO |
34895 | RET(14) |
34896 | } |
34897 | |
34898 | // ADDaD |
34899 | OPCODE(0xD038) |
34900 | { |
34901 | u32 adr, res; |
34902 | u32 src, dst; |
34903 | |
34904 | FETCH_SWORD(adr); |
34905 | PRE_IO |
34906 | READ_BYTE_F(adr, src) |
34907 | dst = DREGu8((Opcode >> 9) & 7); |
34908 | res = dst + src; |
34909 | flag_N = flag_X = flag_C = res; |
34910 | flag_V = (src ^ res) & (dst ^ res); |
34911 | flag_NotZ = res & 0xFF; |
34912 | DREGu8((Opcode >> 9) & 7) = res; |
34913 | POST_IO |
34914 | RET(12) |
34915 | } |
34916 | |
34917 | // ADDaD |
34918 | OPCODE(0xD039) |
34919 | { |
34920 | u32 adr, res; |
34921 | u32 src, dst; |
34922 | |
34923 | FETCH_LONG(adr); |
34924 | PRE_IO |
34925 | READ_BYTE_F(adr, src) |
34926 | dst = DREGu8((Opcode >> 9) & 7); |
34927 | res = dst + src; |
34928 | flag_N = flag_X = flag_C = res; |
34929 | flag_V = (src ^ res) & (dst ^ res); |
34930 | flag_NotZ = res & 0xFF; |
34931 | DREGu8((Opcode >> 9) & 7) = res; |
34932 | POST_IO |
34933 | RET(16) |
34934 | } |
34935 | |
34936 | // ADDaD |
34937 | OPCODE(0xD03A) |
34938 | { |
34939 | u32 adr, res; |
34940 | u32 src, dst; |
34941 | |
34942 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34943 | PC++; |
34944 | PRE_IO |
34945 | READ_BYTE_F(adr, src) |
34946 | dst = DREGu8((Opcode >> 9) & 7); |
34947 | res = dst + src; |
34948 | flag_N = flag_X = flag_C = res; |
34949 | flag_V = (src ^ res) & (dst ^ res); |
34950 | flag_NotZ = res & 0xFF; |
34951 | DREGu8((Opcode >> 9) & 7) = res; |
34952 | POST_IO |
34953 | RET(12) |
34954 | } |
34955 | |
34956 | // ADDaD |
34957 | OPCODE(0xD03B) |
34958 | { |
34959 | u32 adr, res; |
34960 | u32 src, dst; |
34961 | |
34962 | adr = (u32)(PC) - BasePC; |
34963 | DECODE_EXT_WORD |
34964 | PRE_IO |
34965 | READ_BYTE_F(adr, src) |
34966 | dst = DREGu8((Opcode >> 9) & 7); |
34967 | res = dst + src; |
34968 | flag_N = flag_X = flag_C = res; |
34969 | flag_V = (src ^ res) & (dst ^ res); |
34970 | flag_NotZ = res & 0xFF; |
34971 | DREGu8((Opcode >> 9) & 7) = res; |
34972 | POST_IO |
34973 | RET(14) |
34974 | } |
34975 | |
34976 | // ADDaD |
34977 | OPCODE(0xD03C) |
34978 | { |
34979 | u32 adr, res; |
34980 | u32 src, dst; |
34981 | |
34982 | FETCH_BYTE(src); |
34983 | dst = DREGu8((Opcode >> 9) & 7); |
34984 | res = dst + src; |
34985 | flag_N = flag_X = flag_C = res; |
34986 | flag_V = (src ^ res) & (dst ^ res); |
34987 | flag_NotZ = res & 0xFF; |
34988 | DREGu8((Opcode >> 9) & 7) = res; |
34989 | RET(8) |
34990 | } |
34991 | |
34992 | // ADDaD |
34993 | OPCODE(0xD01F) |
34994 | { |
34995 | u32 adr, res; |
34996 | u32 src, dst; |
34997 | |
34998 | adr = AREG(7); |
34999 | AREG(7) += 2; |
35000 | PRE_IO |
35001 | READ_BYTE_F(adr, src) |
35002 | dst = DREGu8((Opcode >> 9) & 7); |
35003 | res = dst + src; |
35004 | flag_N = flag_X = flag_C = res; |
35005 | flag_V = (src ^ res) & (dst ^ res); |
35006 | flag_NotZ = res & 0xFF; |
35007 | DREGu8((Opcode >> 9) & 7) = res; |
35008 | POST_IO |
35009 | RET(8) |
35010 | } |
35011 | |
35012 | // ADDaD |
35013 | OPCODE(0xD027) |
35014 | { |
35015 | u32 adr, res; |
35016 | u32 src, dst; |
35017 | |
35018 | adr = AREG(7) - 2; |
35019 | AREG(7) = adr; |
35020 | PRE_IO |
35021 | READ_BYTE_F(adr, src) |
35022 | dst = DREGu8((Opcode >> 9) & 7); |
35023 | res = dst + src; |
35024 | flag_N = flag_X = flag_C = res; |
35025 | flag_V = (src ^ res) & (dst ^ res); |
35026 | flag_NotZ = res & 0xFF; |
35027 | DREGu8((Opcode >> 9) & 7) = res; |
35028 | POST_IO |
35029 | RET(10) |
35030 | } |
35031 | |
35032 | // ADDaD |
35033 | OPCODE(0xD040) |
35034 | { |
35035 | u32 adr, res; |
35036 | u32 src, dst; |
35037 | |
35038 | src = DREGu16((Opcode >> 0) & 7); |
35039 | dst = DREGu16((Opcode >> 9) & 7); |
35040 | res = dst + src; |
35041 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35042 | flag_N = flag_X = flag_C = res >> 8; |
35043 | flag_NotZ = res & 0xFFFF; |
35044 | DREGu16((Opcode >> 9) & 7) = res; |
35045 | RET(4) |
35046 | } |
35047 | |
35048 | // ADDaD |
35049 | OPCODE(0xD048) |
35050 | { |
35051 | u32 adr, res; |
35052 | u32 src, dst; |
35053 | |
35054 | src = AREGu16((Opcode >> 0) & 7); |
35055 | dst = DREGu16((Opcode >> 9) & 7); |
35056 | res = dst + src; |
35057 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35058 | flag_N = flag_X = flag_C = res >> 8; |
35059 | flag_NotZ = res & 0xFFFF; |
35060 | DREGu16((Opcode >> 9) & 7) = res; |
35061 | RET(4) |
35062 | } |
35063 | |
35064 | // ADDaD |
35065 | OPCODE(0xD050) |
35066 | { |
35067 | u32 adr, res; |
35068 | u32 src, dst; |
35069 | |
35070 | adr = AREG((Opcode >> 0) & 7); |
35071 | PRE_IO |
35072 | READ_WORD_F(adr, src) |
35073 | dst = DREGu16((Opcode >> 9) & 7); |
35074 | res = dst + src; |
35075 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35076 | flag_N = flag_X = flag_C = res >> 8; |
35077 | flag_NotZ = res & 0xFFFF; |
35078 | DREGu16((Opcode >> 9) & 7) = res; |
35079 | POST_IO |
35080 | RET(8) |
35081 | } |
35082 | |
35083 | // ADDaD |
35084 | OPCODE(0xD058) |
35085 | { |
35086 | u32 adr, res; |
35087 | u32 src, dst; |
35088 | |
35089 | adr = AREG((Opcode >> 0) & 7); |
35090 | AREG((Opcode >> 0) & 7) += 2; |
35091 | PRE_IO |
35092 | READ_WORD_F(adr, src) |
35093 | dst = DREGu16((Opcode >> 9) & 7); |
35094 | res = dst + src; |
35095 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35096 | flag_N = flag_X = flag_C = res >> 8; |
35097 | flag_NotZ = res & 0xFFFF; |
35098 | DREGu16((Opcode >> 9) & 7) = res; |
35099 | POST_IO |
35100 | RET(8) |
35101 | } |
35102 | |
35103 | // ADDaD |
35104 | OPCODE(0xD060) |
35105 | { |
35106 | u32 adr, res; |
35107 | u32 src, dst; |
35108 | |
35109 | adr = AREG((Opcode >> 0) & 7) - 2; |
35110 | AREG((Opcode >> 0) & 7) = adr; |
35111 | PRE_IO |
35112 | READ_WORD_F(adr, src) |
35113 | dst = DREGu16((Opcode >> 9) & 7); |
35114 | res = dst + src; |
35115 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35116 | flag_N = flag_X = flag_C = res >> 8; |
35117 | flag_NotZ = res & 0xFFFF; |
35118 | DREGu16((Opcode >> 9) & 7) = res; |
35119 | POST_IO |
35120 | RET(10) |
35121 | } |
35122 | |
35123 | // ADDaD |
35124 | OPCODE(0xD068) |
35125 | { |
35126 | u32 adr, res; |
35127 | u32 src, dst; |
35128 | |
35129 | FETCH_SWORD(adr); |
35130 | adr += AREG((Opcode >> 0) & 7); |
35131 | PRE_IO |
35132 | READ_WORD_F(adr, src) |
35133 | dst = DREGu16((Opcode >> 9) & 7); |
35134 | res = dst + src; |
35135 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35136 | flag_N = flag_X = flag_C = res >> 8; |
35137 | flag_NotZ = res & 0xFFFF; |
35138 | DREGu16((Opcode >> 9) & 7) = res; |
35139 | POST_IO |
35140 | RET(12) |
35141 | } |
35142 | |
35143 | // ADDaD |
35144 | OPCODE(0xD070) |
35145 | { |
35146 | u32 adr, res; |
35147 | u32 src, dst; |
35148 | |
35149 | adr = AREG((Opcode >> 0) & 7); |
35150 | DECODE_EXT_WORD |
35151 | PRE_IO |
35152 | READ_WORD_F(adr, src) |
35153 | dst = DREGu16((Opcode >> 9) & 7); |
35154 | res = dst + src; |
35155 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35156 | flag_N = flag_X = flag_C = res >> 8; |
35157 | flag_NotZ = res & 0xFFFF; |
35158 | DREGu16((Opcode >> 9) & 7) = res; |
35159 | POST_IO |
35160 | RET(14) |
35161 | } |
35162 | |
35163 | // ADDaD |
35164 | OPCODE(0xD078) |
35165 | { |
35166 | u32 adr, res; |
35167 | u32 src, dst; |
35168 | |
35169 | FETCH_SWORD(adr); |
35170 | PRE_IO |
35171 | READ_WORD_F(adr, src) |
35172 | dst = DREGu16((Opcode >> 9) & 7); |
35173 | res = dst + src; |
35174 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35175 | flag_N = flag_X = flag_C = res >> 8; |
35176 | flag_NotZ = res & 0xFFFF; |
35177 | DREGu16((Opcode >> 9) & 7) = res; |
35178 | POST_IO |
35179 | RET(12) |
35180 | } |
35181 | |
35182 | // ADDaD |
35183 | OPCODE(0xD079) |
35184 | { |
35185 | u32 adr, res; |
35186 | u32 src, dst; |
35187 | |
35188 | FETCH_LONG(adr); |
35189 | PRE_IO |
35190 | READ_WORD_F(adr, src) |
35191 | dst = DREGu16((Opcode >> 9) & 7); |
35192 | res = dst + src; |
35193 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35194 | flag_N = flag_X = flag_C = res >> 8; |
35195 | flag_NotZ = res & 0xFFFF; |
35196 | DREGu16((Opcode >> 9) & 7) = res; |
35197 | POST_IO |
35198 | RET(16) |
35199 | } |
35200 | |
35201 | // ADDaD |
35202 | OPCODE(0xD07A) |
35203 | { |
35204 | u32 adr, res; |
35205 | u32 src, dst; |
35206 | |
35207 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
35208 | PC++; |
35209 | PRE_IO |
35210 | READ_WORD_F(adr, src) |
35211 | dst = DREGu16((Opcode >> 9) & 7); |
35212 | res = dst + src; |
35213 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35214 | flag_N = flag_X = flag_C = res >> 8; |
35215 | flag_NotZ = res & 0xFFFF; |
35216 | DREGu16((Opcode >> 9) & 7) = res; |
35217 | POST_IO |
35218 | RET(12) |
35219 | } |
35220 | |
35221 | // ADDaD |
35222 | OPCODE(0xD07B) |
35223 | { |
35224 | u32 adr, res; |
35225 | u32 src, dst; |
35226 | |
35227 | adr = (u32)(PC) - BasePC; |
35228 | DECODE_EXT_WORD |
35229 | PRE_IO |
35230 | READ_WORD_F(adr, src) |
35231 | dst = DREGu16((Opcode >> 9) & 7); |
35232 | res = dst + src; |
35233 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35234 | flag_N = flag_X = flag_C = res >> 8; |
35235 | flag_NotZ = res & 0xFFFF; |
35236 | DREGu16((Opcode >> 9) & 7) = res; |
35237 | POST_IO |
35238 | RET(14) |
35239 | } |
35240 | |
35241 | // ADDaD |
35242 | OPCODE(0xD07C) |
35243 | { |
35244 | u32 adr, res; |
35245 | u32 src, dst; |
35246 | |
35247 | FETCH_WORD(src); |
35248 | dst = DREGu16((Opcode >> 9) & 7); |
35249 | res = dst + src; |
35250 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35251 | flag_N = flag_X = flag_C = res >> 8; |
35252 | flag_NotZ = res & 0xFFFF; |
35253 | DREGu16((Opcode >> 9) & 7) = res; |
35254 | RET(8) |
35255 | } |
35256 | |
35257 | // ADDaD |
35258 | OPCODE(0xD05F) |
35259 | { |
35260 | u32 adr, res; |
35261 | u32 src, dst; |
35262 | |
35263 | adr = AREG(7); |
35264 | AREG(7) += 2; |
35265 | PRE_IO |
35266 | READ_WORD_F(adr, src) |
35267 | dst = DREGu16((Opcode >> 9) & 7); |
35268 | res = dst + src; |
35269 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35270 | flag_N = flag_X = flag_C = res >> 8; |
35271 | flag_NotZ = res & 0xFFFF; |
35272 | DREGu16((Opcode >> 9) & 7) = res; |
35273 | POST_IO |
35274 | RET(8) |
35275 | } |
35276 | |
35277 | // ADDaD |
35278 | OPCODE(0xD067) |
35279 | { |
35280 | u32 adr, res; |
35281 | u32 src, dst; |
35282 | |
35283 | adr = AREG(7) - 2; |
35284 | AREG(7) = adr; |
35285 | PRE_IO |
35286 | READ_WORD_F(adr, src) |
35287 | dst = DREGu16((Opcode >> 9) & 7); |
35288 | res = dst + src; |
35289 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35290 | flag_N = flag_X = flag_C = res >> 8; |
35291 | flag_NotZ = res & 0xFFFF; |
35292 | DREGu16((Opcode >> 9) & 7) = res; |
35293 | POST_IO |
35294 | RET(10) |
35295 | } |
35296 | |
35297 | // ADDaD |
35298 | OPCODE(0xD080) |
35299 | { |
35300 | u32 adr, res; |
35301 | u32 src, dst; |
35302 | |
35303 | src = DREGu32((Opcode >> 0) & 7); |
35304 | dst = DREGu32((Opcode >> 9) & 7); |
35305 | res = dst + src; |
35306 | flag_NotZ = res; |
35307 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35308 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35309 | flag_N = res >> 24; |
35310 | DREGu32((Opcode >> 9) & 7) = res; |
35311 | RET(8) |
35312 | } |
35313 | |
35314 | // ADDaD |
35315 | OPCODE(0xD088) |
35316 | { |
35317 | u32 adr, res; |
35318 | u32 src, dst; |
35319 | |
35320 | src = AREGu32((Opcode >> 0) & 7); |
35321 | dst = DREGu32((Opcode >> 9) & 7); |
35322 | res = dst + src; |
35323 | flag_NotZ = res; |
35324 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35325 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35326 | flag_N = res >> 24; |
35327 | DREGu32((Opcode >> 9) & 7) = res; |
35328 | RET(8) |
35329 | } |
35330 | |
35331 | // ADDaD |
35332 | OPCODE(0xD090) |
35333 | { |
35334 | u32 adr, res; |
35335 | u32 src, dst; |
35336 | |
35337 | adr = AREG((Opcode >> 0) & 7); |
35338 | PRE_IO |
35339 | READ_LONG_F(adr, src) |
35340 | dst = DREGu32((Opcode >> 9) & 7); |
35341 | res = dst + src; |
35342 | flag_NotZ = res; |
35343 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35344 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35345 | flag_N = res >> 24; |
35346 | DREGu32((Opcode >> 9) & 7) = res; |
35347 | POST_IO |
35348 | RET(14) |
35349 | } |
35350 | |
35351 | // ADDaD |
35352 | OPCODE(0xD098) |
35353 | { |
35354 | u32 adr, res; |
35355 | u32 src, dst; |
35356 | |
35357 | adr = AREG((Opcode >> 0) & 7); |
35358 | AREG((Opcode >> 0) & 7) += 4; |
35359 | PRE_IO |
35360 | READ_LONG_F(adr, src) |
35361 | dst = DREGu32((Opcode >> 9) & 7); |
35362 | res = dst + src; |
35363 | flag_NotZ = res; |
35364 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35365 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35366 | flag_N = res >> 24; |
35367 | DREGu32((Opcode >> 9) & 7) = res; |
35368 | POST_IO |
35369 | RET(14) |
35370 | } |
35371 | |
35372 | // ADDaD |
35373 | OPCODE(0xD0A0) |
35374 | { |
35375 | u32 adr, res; |
35376 | u32 src, dst; |
35377 | |
35378 | adr = AREG((Opcode >> 0) & 7) - 4; |
35379 | AREG((Opcode >> 0) & 7) = adr; |
35380 | PRE_IO |
35381 | READ_LONG_F(adr, src) |
35382 | dst = DREGu32((Opcode >> 9) & 7); |
35383 | res = dst + src; |
35384 | flag_NotZ = res; |
35385 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35386 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35387 | flag_N = res >> 24; |
35388 | DREGu32((Opcode >> 9) & 7) = res; |
35389 | POST_IO |
35390 | RET(16) |
35391 | } |
35392 | |
35393 | // ADDaD |
35394 | OPCODE(0xD0A8) |
35395 | { |
35396 | u32 adr, res; |
35397 | u32 src, dst; |
35398 | |
35399 | FETCH_SWORD(adr); |
35400 | adr += AREG((Opcode >> 0) & 7); |
35401 | PRE_IO |
35402 | READ_LONG_F(adr, src) |
35403 | dst = DREGu32((Opcode >> 9) & 7); |
35404 | res = dst + src; |
35405 | flag_NotZ = res; |
35406 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35407 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35408 | flag_N = res >> 24; |
35409 | DREGu32((Opcode >> 9) & 7) = res; |
35410 | POST_IO |
35411 | RET(18) |
35412 | } |
35413 | |
35414 | // ADDaD |
35415 | OPCODE(0xD0B0) |
35416 | { |
35417 | u32 adr, res; |
35418 | u32 src, dst; |
35419 | |
35420 | adr = AREG((Opcode >> 0) & 7); |
35421 | DECODE_EXT_WORD |
35422 | PRE_IO |
35423 | READ_LONG_F(adr, src) |
35424 | dst = DREGu32((Opcode >> 9) & 7); |
35425 | res = dst + src; |
35426 | flag_NotZ = res; |
35427 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35428 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35429 | flag_N = res >> 24; |
35430 | DREGu32((Opcode >> 9) & 7) = res; |
35431 | POST_IO |
35432 | RET(20) |
35433 | } |
35434 | |
35435 | // ADDaD |
35436 | OPCODE(0xD0B8) |
35437 | { |
35438 | u32 adr, res; |
35439 | u32 src, dst; |
35440 | |
35441 | FETCH_SWORD(adr); |
35442 | PRE_IO |
35443 | READ_LONG_F(adr, src) |
35444 | dst = DREGu32((Opcode >> 9) & 7); |
35445 | res = dst + src; |
35446 | flag_NotZ = res; |
35447 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35448 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35449 | flag_N = res >> 24; |
35450 | DREGu32((Opcode >> 9) & 7) = res; |
35451 | POST_IO |
35452 | RET(18) |
35453 | } |
35454 | |
35455 | // ADDaD |
35456 | OPCODE(0xD0B9) |
35457 | { |
35458 | u32 adr, res; |
35459 | u32 src, dst; |
35460 | |
35461 | FETCH_LONG(adr); |
35462 | PRE_IO |
35463 | READ_LONG_F(adr, src) |
35464 | dst = DREGu32((Opcode >> 9) & 7); |
35465 | res = dst + src; |
35466 | flag_NotZ = res; |
35467 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35468 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35469 | flag_N = res >> 24; |
35470 | DREGu32((Opcode >> 9) & 7) = res; |
35471 | POST_IO |
35472 | RET(22) |
35473 | } |
35474 | |
35475 | // ADDaD |
35476 | OPCODE(0xD0BA) |
35477 | { |
35478 | u32 adr, res; |
35479 | u32 src, dst; |
35480 | |
35481 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
35482 | PC++; |
35483 | PRE_IO |
35484 | READ_LONG_F(adr, src) |
35485 | dst = DREGu32((Opcode >> 9) & 7); |
35486 | res = dst + src; |
35487 | flag_NotZ = res; |
35488 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35489 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35490 | flag_N = res >> 24; |
35491 | DREGu32((Opcode >> 9) & 7) = res; |
35492 | POST_IO |
35493 | RET(18) |
35494 | } |
35495 | |
35496 | // ADDaD |
35497 | OPCODE(0xD0BB) |
35498 | { |
35499 | u32 adr, res; |
35500 | u32 src, dst; |
35501 | |
35502 | adr = (u32)(PC) - BasePC; |
35503 | DECODE_EXT_WORD |
35504 | PRE_IO |
35505 | READ_LONG_F(adr, src) |
35506 | dst = DREGu32((Opcode >> 9) & 7); |
35507 | res = dst + src; |
35508 | flag_NotZ = res; |
35509 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35510 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35511 | flag_N = res >> 24; |
35512 | DREGu32((Opcode >> 9) & 7) = res; |
35513 | POST_IO |
35514 | RET(20) |
35515 | } |
35516 | |
35517 | // ADDaD |
35518 | OPCODE(0xD0BC) |
35519 | { |
35520 | u32 adr, res; |
35521 | u32 src, dst; |
35522 | |
35523 | FETCH_LONG(src); |
35524 | dst = DREGu32((Opcode >> 9) & 7); |
35525 | res = dst + src; |
35526 | flag_NotZ = res; |
35527 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35528 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35529 | flag_N = res >> 24; |
35530 | DREGu32((Opcode >> 9) & 7) = res; |
35531 | RET(16) |
35532 | } |
35533 | |
35534 | // ADDaD |
35535 | OPCODE(0xD09F) |
35536 | { |
35537 | u32 adr, res; |
35538 | u32 src, dst; |
35539 | |
35540 | adr = AREG(7); |
35541 | AREG(7) += 4; |
35542 | PRE_IO |
35543 | READ_LONG_F(adr, src) |
35544 | dst = DREGu32((Opcode >> 9) & 7); |
35545 | res = dst + src; |
35546 | flag_NotZ = res; |
35547 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35548 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35549 | flag_N = res >> 24; |
35550 | DREGu32((Opcode >> 9) & 7) = res; |
35551 | POST_IO |
35552 | RET(14) |
35553 | } |
35554 | |
35555 | // ADDaD |
35556 | OPCODE(0xD0A7) |
35557 | { |
35558 | u32 adr, res; |
35559 | u32 src, dst; |
35560 | |
35561 | adr = AREG(7) - 4; |
35562 | AREG(7) = adr; |
35563 | PRE_IO |
35564 | READ_LONG_F(adr, src) |
35565 | dst = DREGu32((Opcode >> 9) & 7); |
35566 | res = dst + src; |
35567 | flag_NotZ = res; |
35568 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35569 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35570 | flag_N = res >> 24; |
35571 | DREGu32((Opcode >> 9) & 7) = res; |
35572 | POST_IO |
35573 | RET(16) |
35574 | } |
35575 | |
35576 | // ADDDa |
35577 | OPCODE(0xD110) |
35578 | { |
35579 | u32 adr, res; |
35580 | u32 src, dst; |
35581 | |
35582 | src = DREGu8((Opcode >> 9) & 7); |
35583 | adr = AREG((Opcode >> 0) & 7); |
35584 | PRE_IO |
35585 | READ_BYTE_F(adr, dst) |
35586 | res = dst + src; |
35587 | flag_N = flag_X = flag_C = res; |
35588 | flag_V = (src ^ res) & (dst ^ res); |
35589 | flag_NotZ = res & 0xFF; |
35590 | WRITE_BYTE_F(adr, res) |
35591 | POST_IO |
35592 | RET(12) |
35593 | } |
35594 | |
35595 | // ADDDa |
35596 | OPCODE(0xD118) |
35597 | { |
35598 | u32 adr, res; |
35599 | u32 src, dst; |
35600 | |
35601 | src = DREGu8((Opcode >> 9) & 7); |
35602 | adr = AREG((Opcode >> 0) & 7); |
35603 | AREG((Opcode >> 0) & 7) += 1; |
35604 | PRE_IO |
35605 | READ_BYTE_F(adr, dst) |
35606 | res = dst + src; |
35607 | flag_N = flag_X = flag_C = res; |
35608 | flag_V = (src ^ res) & (dst ^ res); |
35609 | flag_NotZ = res & 0xFF; |
35610 | WRITE_BYTE_F(adr, res) |
35611 | POST_IO |
35612 | RET(12) |
35613 | } |
35614 | |
35615 | // ADDDa |
35616 | OPCODE(0xD120) |
35617 | { |
35618 | u32 adr, res; |
35619 | u32 src, dst; |
35620 | |
35621 | src = DREGu8((Opcode >> 9) & 7); |
35622 | adr = AREG((Opcode >> 0) & 7) - 1; |
35623 | AREG((Opcode >> 0) & 7) = adr; |
35624 | PRE_IO |
35625 | READ_BYTE_F(adr, dst) |
35626 | res = dst + src; |
35627 | flag_N = flag_X = flag_C = res; |
35628 | flag_V = (src ^ res) & (dst ^ res); |
35629 | flag_NotZ = res & 0xFF; |
35630 | WRITE_BYTE_F(adr, res) |
35631 | POST_IO |
35632 | RET(14) |
35633 | } |
35634 | |
35635 | // ADDDa |
35636 | OPCODE(0xD128) |
35637 | { |
35638 | u32 adr, res; |
35639 | u32 src, dst; |
35640 | |
35641 | src = DREGu8((Opcode >> 9) & 7); |
35642 | FETCH_SWORD(adr); |
35643 | adr += AREG((Opcode >> 0) & 7); |
35644 | PRE_IO |
35645 | READ_BYTE_F(adr, dst) |
35646 | res = dst + src; |
35647 | flag_N = flag_X = flag_C = res; |
35648 | flag_V = (src ^ res) & (dst ^ res); |
35649 | flag_NotZ = res & 0xFF; |
35650 | WRITE_BYTE_F(adr, res) |
35651 | POST_IO |
35652 | RET(16) |
35653 | } |
35654 | |
35655 | // ADDDa |
35656 | OPCODE(0xD130) |
35657 | { |
35658 | u32 adr, res; |
35659 | u32 src, dst; |
35660 | |
35661 | src = DREGu8((Opcode >> 9) & 7); |
35662 | adr = AREG((Opcode >> 0) & 7); |
35663 | DECODE_EXT_WORD |
35664 | PRE_IO |
35665 | READ_BYTE_F(adr, dst) |
35666 | res = dst + src; |
35667 | flag_N = flag_X = flag_C = res; |
35668 | flag_V = (src ^ res) & (dst ^ res); |
35669 | flag_NotZ = res & 0xFF; |
35670 | WRITE_BYTE_F(adr, res) |
35671 | POST_IO |
35672 | RET(18) |
35673 | } |
35674 | |
35675 | // ADDDa |
35676 | OPCODE(0xD138) |
35677 | { |
35678 | u32 adr, res; |
35679 | u32 src, dst; |
35680 | |
35681 | src = DREGu8((Opcode >> 9) & 7); |
35682 | FETCH_SWORD(adr); |
35683 | PRE_IO |
35684 | READ_BYTE_F(adr, dst) |
35685 | res = dst + src; |
35686 | flag_N = flag_X = flag_C = res; |
35687 | flag_V = (src ^ res) & (dst ^ res); |
35688 | flag_NotZ = res & 0xFF; |
35689 | WRITE_BYTE_F(adr, res) |
35690 | POST_IO |
35691 | RET(16) |
35692 | } |
35693 | |
35694 | // ADDDa |
35695 | OPCODE(0xD139) |
35696 | { |
35697 | u32 adr, res; |
35698 | u32 src, dst; |
35699 | |
35700 | src = DREGu8((Opcode >> 9) & 7); |
35701 | FETCH_LONG(adr); |
35702 | PRE_IO |
35703 | READ_BYTE_F(adr, dst) |
35704 | res = dst + src; |
35705 | flag_N = flag_X = flag_C = res; |
35706 | flag_V = (src ^ res) & (dst ^ res); |
35707 | flag_NotZ = res & 0xFF; |
35708 | WRITE_BYTE_F(adr, res) |
35709 | POST_IO |
35710 | RET(20) |
35711 | } |
35712 | |
35713 | // ADDDa |
35714 | OPCODE(0xD11F) |
35715 | { |
35716 | u32 adr, res; |
35717 | u32 src, dst; |
35718 | |
35719 | src = DREGu8((Opcode >> 9) & 7); |
35720 | adr = AREG(7); |
35721 | AREG(7) += 2; |
35722 | PRE_IO |
35723 | READ_BYTE_F(adr, dst) |
35724 | res = dst + src; |
35725 | flag_N = flag_X = flag_C = res; |
35726 | flag_V = (src ^ res) & (dst ^ res); |
35727 | flag_NotZ = res & 0xFF; |
35728 | WRITE_BYTE_F(adr, res) |
35729 | POST_IO |
35730 | RET(12) |
35731 | } |
35732 | |
35733 | // ADDDa |
35734 | OPCODE(0xD127) |
35735 | { |
35736 | u32 adr, res; |
35737 | u32 src, dst; |
35738 | |
35739 | src = DREGu8((Opcode >> 9) & 7); |
35740 | adr = AREG(7) - 2; |
35741 | AREG(7) = adr; |
35742 | PRE_IO |
35743 | READ_BYTE_F(adr, dst) |
35744 | res = dst + src; |
35745 | flag_N = flag_X = flag_C = res; |
35746 | flag_V = (src ^ res) & (dst ^ res); |
35747 | flag_NotZ = res & 0xFF; |
35748 | WRITE_BYTE_F(adr, res) |
35749 | POST_IO |
35750 | RET(14) |
35751 | } |
35752 | |
35753 | // ADDDa |
35754 | OPCODE(0xD150) |
35755 | { |
35756 | u32 adr, res; |
35757 | u32 src, dst; |
35758 | |
35759 | src = DREGu16((Opcode >> 9) & 7); |
35760 | adr = AREG((Opcode >> 0) & 7); |
35761 | PRE_IO |
35762 | READ_WORD_F(adr, dst) |
35763 | res = dst + src; |
35764 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35765 | flag_N = flag_X = flag_C = res >> 8; |
35766 | flag_NotZ = res & 0xFFFF; |
35767 | WRITE_WORD_F(adr, res) |
35768 | POST_IO |
35769 | RET(12) |
35770 | } |
35771 | |
35772 | // ADDDa |
35773 | OPCODE(0xD158) |
35774 | { |
35775 | u32 adr, res; |
35776 | u32 src, dst; |
35777 | |
35778 | src = DREGu16((Opcode >> 9) & 7); |
35779 | adr = AREG((Opcode >> 0) & 7); |
35780 | AREG((Opcode >> 0) & 7) += 2; |
35781 | PRE_IO |
35782 | READ_WORD_F(adr, dst) |
35783 | res = dst + src; |
35784 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35785 | flag_N = flag_X = flag_C = res >> 8; |
35786 | flag_NotZ = res & 0xFFFF; |
35787 | WRITE_WORD_F(adr, res) |
35788 | POST_IO |
35789 | RET(12) |
35790 | } |
35791 | |
35792 | // ADDDa |
35793 | OPCODE(0xD160) |
35794 | { |
35795 | u32 adr, res; |
35796 | u32 src, dst; |
35797 | |
35798 | src = DREGu16((Opcode >> 9) & 7); |
35799 | adr = AREG((Opcode >> 0) & 7) - 2; |
35800 | AREG((Opcode >> 0) & 7) = adr; |
35801 | PRE_IO |
35802 | READ_WORD_F(adr, dst) |
35803 | res = dst + src; |
35804 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35805 | flag_N = flag_X = flag_C = res >> 8; |
35806 | flag_NotZ = res & 0xFFFF; |
35807 | WRITE_WORD_F(adr, res) |
35808 | POST_IO |
35809 | RET(14) |
35810 | } |
35811 | |
35812 | // ADDDa |
35813 | OPCODE(0xD168) |
35814 | { |
35815 | u32 adr, res; |
35816 | u32 src, dst; |
35817 | |
35818 | src = DREGu16((Opcode >> 9) & 7); |
35819 | FETCH_SWORD(adr); |
35820 | adr += AREG((Opcode >> 0) & 7); |
35821 | PRE_IO |
35822 | READ_WORD_F(adr, dst) |
35823 | res = dst + src; |
35824 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35825 | flag_N = flag_X = flag_C = res >> 8; |
35826 | flag_NotZ = res & 0xFFFF; |
35827 | WRITE_WORD_F(adr, res) |
35828 | POST_IO |
35829 | RET(16) |
35830 | } |
35831 | |
35832 | // ADDDa |
35833 | OPCODE(0xD170) |
35834 | { |
35835 | u32 adr, res; |
35836 | u32 src, dst; |
35837 | |
35838 | src = DREGu16((Opcode >> 9) & 7); |
35839 | adr = AREG((Opcode >> 0) & 7); |
35840 | DECODE_EXT_WORD |
35841 | PRE_IO |
35842 | READ_WORD_F(adr, dst) |
35843 | res = dst + src; |
35844 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35845 | flag_N = flag_X = flag_C = res >> 8; |
35846 | flag_NotZ = res & 0xFFFF; |
35847 | WRITE_WORD_F(adr, res) |
35848 | POST_IO |
35849 | RET(18) |
35850 | } |
35851 | |
35852 | // ADDDa |
35853 | OPCODE(0xD178) |
35854 | { |
35855 | u32 adr, res; |
35856 | u32 src, dst; |
35857 | |
35858 | src = DREGu16((Opcode >> 9) & 7); |
35859 | FETCH_SWORD(adr); |
35860 | PRE_IO |
35861 | READ_WORD_F(adr, dst) |
35862 | res = dst + src; |
35863 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35864 | flag_N = flag_X = flag_C = res >> 8; |
35865 | flag_NotZ = res & 0xFFFF; |
35866 | WRITE_WORD_F(adr, res) |
35867 | POST_IO |
35868 | RET(16) |
35869 | } |
35870 | |
35871 | // ADDDa |
35872 | OPCODE(0xD179) |
35873 | { |
35874 | u32 adr, res; |
35875 | u32 src, dst; |
35876 | |
35877 | src = DREGu16((Opcode >> 9) & 7); |
35878 | FETCH_LONG(adr); |
35879 | PRE_IO |
35880 | READ_WORD_F(adr, dst) |
35881 | res = dst + src; |
35882 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35883 | flag_N = flag_X = flag_C = res >> 8; |
35884 | flag_NotZ = res & 0xFFFF; |
35885 | WRITE_WORD_F(adr, res) |
35886 | POST_IO |
35887 | RET(20) |
35888 | } |
35889 | |
35890 | // ADDDa |
35891 | OPCODE(0xD15F) |
35892 | { |
35893 | u32 adr, res; |
35894 | u32 src, dst; |
35895 | |
35896 | src = DREGu16((Opcode >> 9) & 7); |
35897 | adr = AREG(7); |
35898 | AREG(7) += 2; |
35899 | PRE_IO |
35900 | READ_WORD_F(adr, dst) |
35901 | res = dst + src; |
35902 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35903 | flag_N = flag_X = flag_C = res >> 8; |
35904 | flag_NotZ = res & 0xFFFF; |
35905 | WRITE_WORD_F(adr, res) |
35906 | POST_IO |
35907 | RET(12) |
35908 | } |
35909 | |
35910 | // ADDDa |
35911 | OPCODE(0xD167) |
35912 | { |
35913 | u32 adr, res; |
35914 | u32 src, dst; |
35915 | |
35916 | src = DREGu16((Opcode >> 9) & 7); |
35917 | adr = AREG(7) - 2; |
35918 | AREG(7) = adr; |
35919 | PRE_IO |
35920 | READ_WORD_F(adr, dst) |
35921 | res = dst + src; |
35922 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35923 | flag_N = flag_X = flag_C = res >> 8; |
35924 | flag_NotZ = res & 0xFFFF; |
35925 | WRITE_WORD_F(adr, res) |
35926 | POST_IO |
35927 | RET(14) |
35928 | } |
35929 | |
35930 | // ADDDa |
35931 | OPCODE(0xD190) |
35932 | { |
35933 | u32 adr, res; |
35934 | u32 src, dst; |
35935 | |
35936 | src = DREGu32((Opcode >> 9) & 7); |
35937 | adr = AREG((Opcode >> 0) & 7); |
35938 | PRE_IO |
35939 | READ_LONG_F(adr, dst) |
35940 | res = dst + src; |
35941 | flag_NotZ = res; |
35942 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35943 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35944 | flag_N = res >> 24; |
35945 | WRITE_LONG_F(adr, res) |
35946 | POST_IO |
35947 | RET(20) |
35948 | } |
35949 | |
35950 | // ADDDa |
35951 | OPCODE(0xD198) |
35952 | { |
35953 | u32 adr, res; |
35954 | u32 src, dst; |
35955 | |
35956 | src = DREGu32((Opcode >> 9) & 7); |
35957 | adr = AREG((Opcode >> 0) & 7); |
35958 | AREG((Opcode >> 0) & 7) += 4; |
35959 | PRE_IO |
35960 | READ_LONG_F(adr, dst) |
35961 | res = dst + src; |
35962 | flag_NotZ = res; |
35963 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35964 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35965 | flag_N = res >> 24; |
35966 | WRITE_LONG_F(adr, res) |
35967 | POST_IO |
35968 | RET(20) |
35969 | } |
35970 | |
35971 | // ADDDa |
35972 | OPCODE(0xD1A0) |
35973 | { |
35974 | u32 adr, res; |
35975 | u32 src, dst; |
35976 | |
35977 | src = DREGu32((Opcode >> 9) & 7); |
35978 | adr = AREG((Opcode >> 0) & 7) - 4; |
35979 | AREG((Opcode >> 0) & 7) = adr; |
35980 | PRE_IO |
35981 | READ_LONG_F(adr, dst) |
35982 | res = dst + src; |
35983 | flag_NotZ = res; |
35984 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35985 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35986 | flag_N = res >> 24; |
35987 | WRITE_LONG_F(adr, res) |
35988 | POST_IO |
35989 | RET(22) |
35990 | } |
35991 | |
35992 | // ADDDa |
35993 | OPCODE(0xD1A8) |
35994 | { |
35995 | u32 adr, res; |
35996 | u32 src, dst; |
35997 | |
35998 | src = DREGu32((Opcode >> 9) & 7); |
35999 | FETCH_SWORD(adr); |
36000 | adr += AREG((Opcode >> 0) & 7); |
36001 | PRE_IO |
36002 | READ_LONG_F(adr, dst) |
36003 | res = dst + src; |
36004 | flag_NotZ = res; |
36005 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36006 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36007 | flag_N = res >> 24; |
36008 | WRITE_LONG_F(adr, res) |
36009 | POST_IO |
36010 | RET(24) |
36011 | } |
36012 | |
36013 | // ADDDa |
36014 | OPCODE(0xD1B0) |
36015 | { |
36016 | u32 adr, res; |
36017 | u32 src, dst; |
36018 | |
36019 | src = DREGu32((Opcode >> 9) & 7); |
36020 | adr = AREG((Opcode >> 0) & 7); |
36021 | DECODE_EXT_WORD |
36022 | PRE_IO |
36023 | READ_LONG_F(adr, dst) |
36024 | res = dst + src; |
36025 | flag_NotZ = res; |
36026 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36027 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36028 | flag_N = res >> 24; |
36029 | WRITE_LONG_F(adr, res) |
36030 | POST_IO |
36031 | RET(26) |
36032 | } |
36033 | |
36034 | // ADDDa |
36035 | OPCODE(0xD1B8) |
36036 | { |
36037 | u32 adr, res; |
36038 | u32 src, dst; |
36039 | |
36040 | src = DREGu32((Opcode >> 9) & 7); |
36041 | FETCH_SWORD(adr); |
36042 | PRE_IO |
36043 | READ_LONG_F(adr, dst) |
36044 | res = dst + src; |
36045 | flag_NotZ = res; |
36046 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36047 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36048 | flag_N = res >> 24; |
36049 | WRITE_LONG_F(adr, res) |
36050 | POST_IO |
36051 | RET(24) |
36052 | } |
36053 | |
36054 | // ADDDa |
36055 | OPCODE(0xD1B9) |
36056 | { |
36057 | u32 adr, res; |
36058 | u32 src, dst; |
36059 | |
36060 | src = DREGu32((Opcode >> 9) & 7); |
36061 | FETCH_LONG(adr); |
36062 | PRE_IO |
36063 | READ_LONG_F(adr, dst) |
36064 | res = dst + src; |
36065 | flag_NotZ = res; |
36066 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36067 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36068 | flag_N = res >> 24; |
36069 | WRITE_LONG_F(adr, res) |
36070 | POST_IO |
36071 | RET(28) |
36072 | } |
36073 | |
36074 | // ADDDa |
36075 | OPCODE(0xD19F) |
36076 | { |
36077 | u32 adr, res; |
36078 | u32 src, dst; |
36079 | |
36080 | src = DREGu32((Opcode >> 9) & 7); |
36081 | adr = AREG(7); |
36082 | AREG(7) += 4; |
36083 | PRE_IO |
36084 | READ_LONG_F(adr, dst) |
36085 | res = dst + src; |
36086 | flag_NotZ = res; |
36087 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36088 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36089 | flag_N = res >> 24; |
36090 | WRITE_LONG_F(adr, res) |
36091 | POST_IO |
36092 | RET(20) |
36093 | } |
36094 | |
36095 | // ADDDa |
36096 | OPCODE(0xD1A7) |
36097 | { |
36098 | u32 adr, res; |
36099 | u32 src, dst; |
36100 | |
36101 | src = DREGu32((Opcode >> 9) & 7); |
36102 | adr = AREG(7) - 4; |
36103 | AREG(7) = adr; |
36104 | PRE_IO |
36105 | READ_LONG_F(adr, dst) |
36106 | res = dst + src; |
36107 | flag_NotZ = res; |
36108 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36109 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36110 | flag_N = res >> 24; |
36111 | WRITE_LONG_F(adr, res) |
36112 | POST_IO |
36113 | RET(22) |
36114 | } |
36115 | |
36116 | // ADDX |
36117 | OPCODE(0xD100) |
36118 | { |
36119 | u32 adr, res; |
36120 | u32 src, dst; |
36121 | |
36122 | src = DREGu8((Opcode >> 0) & 7); |
36123 | dst = DREGu8((Opcode >> 9) & 7); |
36124 | res = dst + src + ((flag_X >> 8) & 1); |
36125 | flag_N = flag_X = flag_C = res; |
36126 | flag_V = (src ^ res) & (dst ^ res); |
36127 | flag_NotZ |= res & 0xFF; |
36128 | DREGu8((Opcode >> 9) & 7) = res; |
36129 | RET(4) |
36130 | } |
36131 | |
36132 | // ADDX |
36133 | OPCODE(0xD140) |
36134 | { |
36135 | u32 adr, res; |
36136 | u32 src, dst; |
36137 | |
36138 | src = DREGu16((Opcode >> 0) & 7); |
36139 | dst = DREGu16((Opcode >> 9) & 7); |
36140 | res = dst + src + ((flag_X >> 8) & 1); |
36141 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36142 | flag_N = flag_X = flag_C = res >> 8; |
36143 | flag_NotZ |= res & 0xFFFF; |
36144 | DREGu16((Opcode >> 9) & 7) = res; |
36145 | RET(4) |
36146 | } |
36147 | |
36148 | // ADDX |
36149 | OPCODE(0xD180) |
36150 | { |
36151 | u32 adr, res; |
36152 | u32 src, dst; |
36153 | |
36154 | src = DREGu32((Opcode >> 0) & 7); |
36155 | dst = DREGu32((Opcode >> 9) & 7); |
36156 | res = dst + src + ((flag_X >> 8) & 1); |
36157 | flag_NotZ |= res; |
36158 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36159 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36160 | flag_N = res >> 24; |
36161 | DREGu32((Opcode >> 9) & 7) = res; |
36162 | RET(8) |
36163 | } |
36164 | |
36165 | // ADDXM |
36166 | OPCODE(0xD108) |
36167 | { |
36168 | u32 adr, res; |
36169 | u32 src, dst; |
36170 | |
36171 | adr = AREG((Opcode >> 0) & 7) - 1; |
36172 | AREG((Opcode >> 0) & 7) = adr; |
36173 | PRE_IO |
36174 | READ_BYTE_F(adr, src) |
36175 | adr = AREG((Opcode >> 9) & 7) - 1; |
36176 | AREG((Opcode >> 9) & 7) = adr; |
36177 | READ_BYTE_F(adr, dst) |
36178 | res = dst + src + ((flag_X >> 8) & 1); |
36179 | flag_N = flag_X = flag_C = res; |
36180 | flag_V = (src ^ res) & (dst ^ res); |
36181 | flag_NotZ |= res & 0xFF; |
36182 | WRITE_BYTE_F(adr, res) |
36183 | POST_IO |
36184 | RET(18) |
36185 | } |
36186 | |
36187 | // ADDXM |
36188 | OPCODE(0xD148) |
36189 | { |
36190 | u32 adr, res; |
36191 | u32 src, dst; |
36192 | |
36193 | adr = AREG((Opcode >> 0) & 7) - 2; |
36194 | AREG((Opcode >> 0) & 7) = adr; |
36195 | PRE_IO |
36196 | READ_WORD_F(adr, src) |
36197 | adr = AREG((Opcode >> 9) & 7) - 2; |
36198 | AREG((Opcode >> 9) & 7) = adr; |
36199 | READ_WORD_F(adr, dst) |
36200 | res = dst + src + ((flag_X >> 8) & 1); |
36201 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36202 | flag_N = flag_X = flag_C = res >> 8; |
36203 | flag_NotZ |= res & 0xFFFF; |
36204 | WRITE_WORD_F(adr, res) |
36205 | POST_IO |
36206 | RET(18) |
36207 | } |
36208 | |
36209 | // ADDXM |
36210 | OPCODE(0xD188) |
36211 | { |
36212 | u32 adr, res; |
36213 | u32 src, dst; |
36214 | |
36215 | adr = AREG((Opcode >> 0) & 7) - 4; |
36216 | AREG((Opcode >> 0) & 7) = adr; |
36217 | PRE_IO |
36218 | READ_LONG_F(adr, src) |
36219 | adr = AREG((Opcode >> 9) & 7) - 4; |
36220 | AREG((Opcode >> 9) & 7) = adr; |
36221 | READ_LONG_F(adr, dst) |
36222 | res = dst + src + ((flag_X >> 8) & 1); |
36223 | flag_NotZ |= res; |
36224 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36225 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36226 | flag_N = res >> 24; |
36227 | WRITE_LONG_F(adr, res) |
36228 | POST_IO |
36229 | RET(30) |
36230 | } |
36231 | |
36232 | // ADDX7M |
36233 | OPCODE(0xD10F) |
36234 | { |
36235 | u32 adr, res; |
36236 | u32 src, dst; |
36237 | |
36238 | adr = AREG(7) - 2; |
36239 | AREG(7) = adr; |
36240 | PRE_IO |
36241 | READ_BYTE_F(adr, src) |
36242 | adr = AREG((Opcode >> 9) & 7) - 1; |
36243 | AREG((Opcode >> 9) & 7) = adr; |
36244 | READ_BYTE_F(adr, dst) |
36245 | res = dst + src + ((flag_X >> 8) & 1); |
36246 | flag_N = flag_X = flag_C = res; |
36247 | flag_V = (src ^ res) & (dst ^ res); |
36248 | flag_NotZ |= res & 0xFF; |
36249 | WRITE_BYTE_F(adr, res) |
36250 | POST_IO |
36251 | RET(18) |
36252 | } |
36253 | |
36254 | // ADDX7M |
36255 | OPCODE(0xD14F) |
36256 | { |
36257 | u32 adr, res; |
36258 | u32 src, dst; |
36259 | |
36260 | adr = AREG(7) - 2; |
36261 | AREG(7) = adr; |
36262 | PRE_IO |
36263 | READ_WORD_F(adr, src) |
36264 | adr = AREG((Opcode >> 9) & 7) - 2; |
36265 | AREG((Opcode >> 9) & 7) = adr; |
36266 | READ_WORD_F(adr, dst) |
36267 | res = dst + src + ((flag_X >> 8) & 1); |
36268 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36269 | flag_N = flag_X = flag_C = res >> 8; |
36270 | flag_NotZ |= res & 0xFFFF; |
36271 | WRITE_WORD_F(adr, res) |
36272 | POST_IO |
36273 | RET(18) |
36274 | } |
36275 | |
36276 | // ADDX7M |
36277 | OPCODE(0xD18F) |
36278 | { |
36279 | u32 adr, res; |
36280 | u32 src, dst; |
36281 | |
36282 | adr = AREG(7) - 4; |
36283 | AREG(7) = adr; |
36284 | PRE_IO |
36285 | READ_LONG_F(adr, src) |
36286 | adr = AREG((Opcode >> 9) & 7) - 4; |
36287 | AREG((Opcode >> 9) & 7) = adr; |
36288 | READ_LONG_F(adr, dst) |
36289 | res = dst + src + ((flag_X >> 8) & 1); |
36290 | flag_NotZ |= res; |
36291 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36292 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36293 | flag_N = res >> 24; |
36294 | WRITE_LONG_F(adr, res) |
36295 | POST_IO |
36296 | RET(30) |
36297 | } |
36298 | |
36299 | // ADDXM7 |
36300 | OPCODE(0xDF08) |
36301 | { |
36302 | u32 adr, res; |
36303 | u32 src, dst; |
36304 | |
36305 | adr = AREG((Opcode >> 0) & 7) - 1; |
36306 | AREG((Opcode >> 0) & 7) = adr; |
36307 | PRE_IO |
36308 | READ_BYTE_F(adr, src) |
36309 | adr = AREG(7) - 2; |
36310 | AREG(7) = adr; |
36311 | READ_BYTE_F(adr, dst) |
36312 | res = dst + src + ((flag_X >> 8) & 1); |
36313 | flag_N = flag_X = flag_C = res; |
36314 | flag_V = (src ^ res) & (dst ^ res); |
36315 | flag_NotZ |= res & 0xFF; |
36316 | WRITE_BYTE_F(adr, res) |
36317 | POST_IO |
36318 | RET(18) |
36319 | } |
36320 | |
36321 | // ADDXM7 |
36322 | OPCODE(0xDF48) |
36323 | { |
36324 | u32 adr, res; |
36325 | u32 src, dst; |
36326 | |
36327 | adr = AREG((Opcode >> 0) & 7) - 2; |
36328 | AREG((Opcode >> 0) & 7) = adr; |
36329 | PRE_IO |
36330 | READ_WORD_F(adr, src) |
36331 | adr = AREG(7) - 2; |
36332 | AREG(7) = adr; |
36333 | READ_WORD_F(adr, dst) |
36334 | res = dst + src + ((flag_X >> 8) & 1); |
36335 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36336 | flag_N = flag_X = flag_C = res >> 8; |
36337 | flag_NotZ |= res & 0xFFFF; |
36338 | WRITE_WORD_F(adr, res) |
36339 | POST_IO |
36340 | RET(18) |
36341 | } |
36342 | |
36343 | // ADDXM7 |
36344 | OPCODE(0xDF88) |
36345 | { |
36346 | u32 adr, res; |
36347 | u32 src, dst; |
36348 | |
36349 | adr = AREG((Opcode >> 0) & 7) - 4; |
36350 | AREG((Opcode >> 0) & 7) = adr; |
36351 | PRE_IO |
36352 | READ_LONG_F(adr, src) |
36353 | adr = AREG(7) - 4; |
36354 | AREG(7) = adr; |
36355 | READ_LONG_F(adr, dst) |
36356 | res = dst + src + ((flag_X >> 8) & 1); |
36357 | flag_NotZ |= res; |
36358 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36359 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36360 | flag_N = res >> 24; |
36361 | WRITE_LONG_F(adr, res) |
36362 | POST_IO |
36363 | RET(30) |
36364 | } |
36365 | |
36366 | // ADDX7M7 |
36367 | OPCODE(0xDF0F) |
36368 | { |
36369 | u32 adr, res; |
36370 | u32 src, dst; |
36371 | |
36372 | adr = AREG(7) - 2; |
36373 | AREG(7) = adr; |
36374 | PRE_IO |
36375 | READ_BYTE_F(adr, src) |
36376 | adr = AREG(7) - 2; |
36377 | AREG(7) = adr; |
36378 | READ_BYTE_F(adr, dst) |
36379 | res = dst + src + ((flag_X >> 8) & 1); |
36380 | flag_N = flag_X = flag_C = res; |
36381 | flag_V = (src ^ res) & (dst ^ res); |
36382 | flag_NotZ |= res & 0xFF; |
36383 | WRITE_BYTE_F(adr, res) |
36384 | POST_IO |
36385 | RET(18) |
36386 | } |
36387 | |
36388 | // ADDX7M7 |
36389 | OPCODE(0xDF4F) |
36390 | { |
36391 | u32 adr, res; |
36392 | u32 src, dst; |
36393 | |
36394 | adr = AREG(7) - 2; |
36395 | AREG(7) = adr; |
36396 | PRE_IO |
36397 | READ_WORD_F(adr, src) |
36398 | adr = AREG(7) - 2; |
36399 | AREG(7) = adr; |
36400 | READ_WORD_F(adr, dst) |
36401 | res = dst + src + ((flag_X >> 8) & 1); |
36402 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36403 | flag_N = flag_X = flag_C = res >> 8; |
36404 | flag_NotZ |= res & 0xFFFF; |
36405 | WRITE_WORD_F(adr, res) |
36406 | POST_IO |
36407 | RET(18) |
36408 | } |
36409 | |
36410 | // ADDX7M7 |
36411 | OPCODE(0xDF8F) |
36412 | { |
36413 | u32 adr, res; |
36414 | u32 src, dst; |
36415 | |
36416 | adr = AREG(7) - 4; |
36417 | AREG(7) = adr; |
36418 | PRE_IO |
36419 | READ_LONG_F(adr, src) |
36420 | adr = AREG(7) - 4; |
36421 | AREG(7) = adr; |
36422 | READ_LONG_F(adr, dst) |
36423 | res = dst + src + ((flag_X >> 8) & 1); |
36424 | flag_NotZ |= res; |
36425 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36426 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36427 | flag_N = res >> 24; |
36428 | WRITE_LONG_F(adr, res) |
36429 | POST_IO |
36430 | RET(30) |
36431 | } |
36432 | |
36433 | // ADDA |
36434 | OPCODE(0xD0C0) |
36435 | { |
36436 | u32 adr, res; |
36437 | u32 src, dst; |
36438 | |
36439 | src = (s32)DREGs16((Opcode >> 0) & 7); |
36440 | dst = AREGu32((Opcode >> 9) & 7); |
36441 | res = dst + src; |
36442 | AREG((Opcode >> 9) & 7) = res; |
36443 | RET(8) |
36444 | } |
36445 | |
36446 | // ADDA |
36447 | OPCODE(0xD0C8) |
36448 | { |
36449 | u32 adr, res; |
36450 | u32 src, dst; |
36451 | |
36452 | src = (s32)AREGs16((Opcode >> 0) & 7); |
36453 | dst = AREGu32((Opcode >> 9) & 7); |
36454 | res = dst + src; |
36455 | AREG((Opcode >> 9) & 7) = res; |
36456 | RET(8) |
36457 | } |
36458 | |
36459 | // ADDA |
36460 | OPCODE(0xD0D0) |
36461 | { |
36462 | u32 adr, res; |
36463 | u32 src, dst; |
36464 | |
36465 | adr = AREG((Opcode >> 0) & 7); |
36466 | PRE_IO |
36467 | READSX_WORD_F(adr, src) |
36468 | dst = AREGu32((Opcode >> 9) & 7); |
36469 | res = dst + src; |
36470 | AREG((Opcode >> 9) & 7) = res; |
36471 | POST_IO |
03e4f2a3 |
36472 | #ifdef USE_CYCLONE_TIMING |
36473 | RET(12) |
36474 | #else |
70357ce5 |
36475 | RET(10) |
03e4f2a3 |
36476 | #endif |
70357ce5 |
36477 | } |
36478 | |
36479 | // ADDA |
36480 | OPCODE(0xD0D8) |
36481 | { |
36482 | u32 adr, res; |
36483 | u32 src, dst; |
36484 | |
36485 | adr = AREG((Opcode >> 0) & 7); |
36486 | AREG((Opcode >> 0) & 7) += 2; |
36487 | PRE_IO |
36488 | READSX_WORD_F(adr, src) |
36489 | dst = AREGu32((Opcode >> 9) & 7); |
36490 | res = dst + src; |
36491 | AREG((Opcode >> 9) & 7) = res; |
36492 | POST_IO |
03e4f2a3 |
36493 | #ifdef USE_CYCLONE_TIMING |
36494 | RET(12) |
36495 | #else |
70357ce5 |
36496 | RET(10) |
03e4f2a3 |
36497 | #endif |
70357ce5 |
36498 | } |
36499 | |
36500 | // ADDA |
36501 | OPCODE(0xD0E0) |
36502 | { |
36503 | u32 adr, res; |
36504 | u32 src, dst; |
36505 | |
36506 | adr = AREG((Opcode >> 0) & 7) - 2; |
36507 | AREG((Opcode >> 0) & 7) = adr; |
36508 | PRE_IO |
36509 | READSX_WORD_F(adr, src) |
36510 | dst = AREGu32((Opcode >> 9) & 7); |
36511 | res = dst + src; |
36512 | AREG((Opcode >> 9) & 7) = res; |
36513 | POST_IO |
03e4f2a3 |
36514 | #ifdef USE_CYCLONE_TIMING |
36515 | RET(14) |
36516 | #else |
70357ce5 |
36517 | RET(12) |
03e4f2a3 |
36518 | #endif |
70357ce5 |
36519 | } |
36520 | |
36521 | // ADDA |
36522 | OPCODE(0xD0E8) |
36523 | { |
36524 | u32 adr, res; |
36525 | u32 src, dst; |
36526 | |
36527 | FETCH_SWORD(adr); |
36528 | adr += AREG((Opcode >> 0) & 7); |
36529 | PRE_IO |
36530 | READSX_WORD_F(adr, src) |
36531 | dst = AREGu32((Opcode >> 9) & 7); |
36532 | res = dst + src; |
36533 | AREG((Opcode >> 9) & 7) = res; |
36534 | POST_IO |
03e4f2a3 |
36535 | #ifdef USE_CYCLONE_TIMING |
36536 | RET(16) |
36537 | #else |
70357ce5 |
36538 | RET(14) |
03e4f2a3 |
36539 | #endif |
70357ce5 |
36540 | } |
36541 | |
36542 | // ADDA |
36543 | OPCODE(0xD0F0) |
36544 | { |
36545 | u32 adr, res; |
36546 | u32 src, dst; |
36547 | |
36548 | adr = AREG((Opcode >> 0) & 7); |
36549 | DECODE_EXT_WORD |
36550 | PRE_IO |
36551 | READSX_WORD_F(adr, src) |
36552 | dst = AREGu32((Opcode >> 9) & 7); |
36553 | res = dst + src; |
36554 | AREG((Opcode >> 9) & 7) = res; |
36555 | POST_IO |
03e4f2a3 |
36556 | #ifdef USE_CYCLONE_TIMING |
36557 | RET(18) |
36558 | #else |
70357ce5 |
36559 | RET(16) |
03e4f2a3 |
36560 | #endif |
70357ce5 |
36561 | } |
36562 | |
36563 | // ADDA |
36564 | OPCODE(0xD0F8) |
36565 | { |
36566 | u32 adr, res; |
36567 | u32 src, dst; |
36568 | |
36569 | FETCH_SWORD(adr); |
36570 | PRE_IO |
36571 | READSX_WORD_F(adr, src) |
36572 | dst = AREGu32((Opcode >> 9) & 7); |
36573 | res = dst + src; |
36574 | AREG((Opcode >> 9) & 7) = res; |
36575 | POST_IO |
03e4f2a3 |
36576 | #ifdef USE_CYCLONE_TIMING |
36577 | RET(16) |
36578 | #else |
70357ce5 |
36579 | RET(14) |
03e4f2a3 |
36580 | #endif |
70357ce5 |
36581 | } |
36582 | |
36583 | // ADDA |
36584 | OPCODE(0xD0F9) |
36585 | { |
36586 | u32 adr, res; |
36587 | u32 src, dst; |
36588 | |
36589 | FETCH_LONG(adr); |
36590 | PRE_IO |
36591 | READSX_WORD_F(adr, src) |
36592 | dst = AREGu32((Opcode >> 9) & 7); |
36593 | res = dst + src; |
36594 | AREG((Opcode >> 9) & 7) = res; |
36595 | POST_IO |
03e4f2a3 |
36596 | #ifdef USE_CYCLONE_TIMING |
36597 | RET(20) |
36598 | #else |
70357ce5 |
36599 | RET(18) |
03e4f2a3 |
36600 | #endif |
70357ce5 |
36601 | } |
36602 | |
36603 | // ADDA |
36604 | OPCODE(0xD0FA) |
36605 | { |
36606 | u32 adr, res; |
36607 | u32 src, dst; |
36608 | |
36609 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
36610 | PC++; |
36611 | PRE_IO |
36612 | READSX_WORD_F(adr, src) |
36613 | dst = AREGu32((Opcode >> 9) & 7); |
36614 | res = dst + src; |
36615 | AREG((Opcode >> 9) & 7) = res; |
36616 | POST_IO |
03e4f2a3 |
36617 | #ifdef USE_CYCLONE_TIMING |
36618 | RET(16) |
36619 | #else |
70357ce5 |
36620 | RET(14) |
03e4f2a3 |
36621 | #endif |
70357ce5 |
36622 | } |
36623 | |
36624 | // ADDA |
36625 | OPCODE(0xD0FB) |
36626 | { |
36627 | u32 adr, res; |
36628 | u32 src, dst; |
36629 | |
36630 | adr = (u32)(PC) - BasePC; |
36631 | DECODE_EXT_WORD |
36632 | PRE_IO |
36633 | READSX_WORD_F(adr, src) |
36634 | dst = AREGu32((Opcode >> 9) & 7); |
36635 | res = dst + src; |
36636 | AREG((Opcode >> 9) & 7) = res; |
36637 | POST_IO |
03e4f2a3 |
36638 | #ifdef USE_CYCLONE_TIMING |
36639 | RET(18) |
36640 | #else |
70357ce5 |
36641 | RET(16) |
03e4f2a3 |
36642 | #endif |
70357ce5 |
36643 | } |
36644 | |
36645 | // ADDA |
36646 | OPCODE(0xD0FC) |
36647 | { |
36648 | u32 adr, res; |
36649 | u32 src, dst; |
36650 | |
36651 | FETCH_SWORD(src); |
36652 | dst = AREGu32((Opcode >> 9) & 7); |
36653 | res = dst + src; |
36654 | AREG((Opcode >> 9) & 7) = res; |
36655 | RET(12) |
36656 | } |
36657 | |
36658 | // ADDA |
36659 | OPCODE(0xD0DF) |
36660 | { |
36661 | u32 adr, res; |
36662 | u32 src, dst; |
36663 | |
36664 | adr = AREG(7); |
36665 | AREG(7) += 2; |
36666 | PRE_IO |
36667 | READSX_WORD_F(adr, src) |
36668 | dst = AREGu32((Opcode >> 9) & 7); |
36669 | res = dst + src; |
36670 | AREG((Opcode >> 9) & 7) = res; |
36671 | POST_IO |
03e4f2a3 |
36672 | #ifdef USE_CYCLONE_TIMING |
36673 | RET(12) |
36674 | #else |
70357ce5 |
36675 | RET(10) |
03e4f2a3 |
36676 | #endif |
70357ce5 |
36677 | } |
36678 | |
36679 | // ADDA |
36680 | OPCODE(0xD0E7) |
36681 | { |
36682 | u32 adr, res; |
36683 | u32 src, dst; |
36684 | |
36685 | adr = AREG(7) - 2; |
36686 | AREG(7) = adr; |
36687 | PRE_IO |
36688 | READSX_WORD_F(adr, src) |
36689 | dst = AREGu32((Opcode >> 9) & 7); |
36690 | res = dst + src; |
36691 | AREG((Opcode >> 9) & 7) = res; |
36692 | POST_IO |
03e4f2a3 |
36693 | #ifdef USE_CYCLONE_TIMING |
36694 | RET(14) |
36695 | #else |
70357ce5 |
36696 | RET(12) |
03e4f2a3 |
36697 | #endif |
70357ce5 |
36698 | } |
36699 | |
36700 | // ADDA |
36701 | OPCODE(0xD1C0) |
36702 | { |
36703 | u32 adr, res; |
36704 | u32 src, dst; |
36705 | |
36706 | src = (s32)DREGs32((Opcode >> 0) & 7); |
36707 | dst = AREGu32((Opcode >> 9) & 7); |
36708 | res = dst + src; |
36709 | AREG((Opcode >> 9) & 7) = res; |
36710 | #ifdef USE_CYCLONE_TIMING |
36711 | RET(8) |
36712 | #else |
36713 | RET(6) |
36714 | #endif |
36715 | } |
36716 | |
36717 | // ADDA |
36718 | OPCODE(0xD1C8) |
36719 | { |
36720 | u32 adr, res; |
36721 | u32 src, dst; |
36722 | |
36723 | src = (s32)AREGs32((Opcode >> 0) & 7); |
36724 | dst = AREGu32((Opcode >> 9) & 7); |
36725 | res = dst + src; |
36726 | AREG((Opcode >> 9) & 7) = res; |
36727 | #ifdef USE_CYCLONE_TIMING |
36728 | RET(8) |
36729 | #else |
36730 | RET(6) |
36731 | #endif |
36732 | } |
36733 | |
36734 | // ADDA |
36735 | OPCODE(0xD1D0) |
36736 | { |
36737 | u32 adr, res; |
36738 | u32 src, dst; |
36739 | |
36740 | adr = AREG((Opcode >> 0) & 7); |
36741 | PRE_IO |
36742 | READSX_LONG_F(adr, src) |
36743 | dst = AREGu32((Opcode >> 9) & 7); |
36744 | res = dst + src; |
36745 | AREG((Opcode >> 9) & 7) = res; |
36746 | POST_IO |
36747 | RET(14) |
36748 | } |
36749 | |
36750 | // ADDA |
36751 | OPCODE(0xD1D8) |
36752 | { |
36753 | u32 adr, res; |
36754 | u32 src, dst; |
36755 | |
36756 | adr = AREG((Opcode >> 0) & 7); |
36757 | AREG((Opcode >> 0) & 7) += 4; |
36758 | PRE_IO |
36759 | READSX_LONG_F(adr, src) |
36760 | dst = AREGu32((Opcode >> 9) & 7); |
36761 | res = dst + src; |
36762 | AREG((Opcode >> 9) & 7) = res; |
36763 | POST_IO |
36764 | RET(14) |
36765 | } |
36766 | |
36767 | // ADDA |
36768 | OPCODE(0xD1E0) |
36769 | { |
36770 | u32 adr, res; |
36771 | u32 src, dst; |
36772 | |
36773 | adr = AREG((Opcode >> 0) & 7) - 4; |
36774 | AREG((Opcode >> 0) & 7) = adr; |
36775 | PRE_IO |
36776 | READSX_LONG_F(adr, src) |
36777 | dst = AREGu32((Opcode >> 9) & 7); |
36778 | res = dst + src; |
36779 | AREG((Opcode >> 9) & 7) = res; |
36780 | POST_IO |
36781 | RET(16) |
36782 | } |
36783 | |
36784 | // ADDA |
36785 | OPCODE(0xD1E8) |
36786 | { |
36787 | u32 adr, res; |
36788 | u32 src, dst; |
36789 | |
36790 | FETCH_SWORD(adr); |
36791 | adr += AREG((Opcode >> 0) & 7); |
36792 | PRE_IO |
36793 | READSX_LONG_F(adr, src) |
36794 | dst = AREGu32((Opcode >> 9) & 7); |
36795 | res = dst + src; |
36796 | AREG((Opcode >> 9) & 7) = res; |
36797 | POST_IO |
36798 | RET(18) |
36799 | } |
36800 | |
36801 | // ADDA |
36802 | OPCODE(0xD1F0) |
36803 | { |
36804 | u32 adr, res; |
36805 | u32 src, dst; |
36806 | |
36807 | adr = AREG((Opcode >> 0) & 7); |
36808 | DECODE_EXT_WORD |
36809 | PRE_IO |
36810 | READSX_LONG_F(adr, src) |
36811 | dst = AREGu32((Opcode >> 9) & 7); |
36812 | res = dst + src; |
36813 | AREG((Opcode >> 9) & 7) = res; |
36814 | POST_IO |
36815 | RET(20) |
36816 | } |
36817 | |
36818 | // ADDA |
36819 | OPCODE(0xD1F8) |
36820 | { |
36821 | u32 adr, res; |
36822 | u32 src, dst; |
36823 | |
36824 | FETCH_SWORD(adr); |
36825 | PRE_IO |
36826 | READSX_LONG_F(adr, src) |
36827 | dst = AREGu32((Opcode >> 9) & 7); |
36828 | res = dst + src; |
36829 | AREG((Opcode >> 9) & 7) = res; |
36830 | POST_IO |
36831 | RET(18) |
36832 | } |
36833 | |
36834 | // ADDA |
36835 | OPCODE(0xD1F9) |
36836 | { |
36837 | u32 adr, res; |
36838 | u32 src, dst; |
36839 | |
36840 | FETCH_LONG(adr); |
36841 | PRE_IO |
36842 | READSX_LONG_F(adr, src) |
36843 | dst = AREGu32((Opcode >> 9) & 7); |
36844 | res = dst + src; |
36845 | AREG((Opcode >> 9) & 7) = res; |
36846 | POST_IO |
36847 | RET(22) |
36848 | } |
36849 | |
36850 | // ADDA |
36851 | OPCODE(0xD1FA) |
36852 | { |
36853 | u32 adr, res; |
36854 | u32 src, dst; |
36855 | |
36856 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
36857 | PC++; |
36858 | PRE_IO |
36859 | READSX_LONG_F(adr, src) |
36860 | dst = AREGu32((Opcode >> 9) & 7); |
36861 | res = dst + src; |
36862 | AREG((Opcode >> 9) & 7) = res; |
36863 | POST_IO |
36864 | RET(18) |
36865 | } |
36866 | |
36867 | // ADDA |
36868 | OPCODE(0xD1FB) |
36869 | { |
36870 | u32 adr, res; |
36871 | u32 src, dst; |
36872 | |
36873 | adr = (u32)(PC) - BasePC; |
36874 | DECODE_EXT_WORD |
36875 | PRE_IO |
36876 | READSX_LONG_F(adr, src) |
36877 | dst = AREGu32((Opcode >> 9) & 7); |
36878 | res = dst + src; |
36879 | AREG((Opcode >> 9) & 7) = res; |
36880 | POST_IO |
36881 | RET(20) |
36882 | } |
36883 | |
36884 | // ADDA |
36885 | OPCODE(0xD1FC) |
36886 | { |
36887 | u32 adr, res; |
36888 | u32 src, dst; |
36889 | |
36890 | FETCH_LONG(src); |
36891 | dst = AREGu32((Opcode >> 9) & 7); |
36892 | res = dst + src; |
36893 | AREG((Opcode >> 9) & 7) = res; |
36894 | #ifdef USE_CYCLONE_TIMING |
36895 | RET(16) |
36896 | #else |
36897 | RET(14) |
36898 | #endif |
36899 | } |
36900 | |
36901 | // ADDA |
36902 | OPCODE(0xD1DF) |
36903 | { |
36904 | u32 adr, res; |
36905 | u32 src, dst; |
36906 | |
36907 | adr = AREG(7); |
36908 | AREG(7) += 4; |
36909 | PRE_IO |
36910 | READSX_LONG_F(adr, src) |
36911 | dst = AREGu32((Opcode >> 9) & 7); |
36912 | res = dst + src; |
36913 | AREG((Opcode >> 9) & 7) = res; |
36914 | POST_IO |
36915 | RET(14) |
36916 | } |
36917 | |
36918 | // ADDA |
36919 | OPCODE(0xD1E7) |
36920 | { |
36921 | u32 adr, res; |
36922 | u32 src, dst; |
36923 | |
36924 | adr = AREG(7) - 4; |
36925 | AREG(7) = adr; |
36926 | PRE_IO |
36927 | READSX_LONG_F(adr, src) |
36928 | dst = AREGu32((Opcode >> 9) & 7); |
36929 | res = dst + src; |
36930 | AREG((Opcode >> 9) & 7) = res; |
36931 | POST_IO |
36932 | RET(16) |
36933 | } |
36934 | |
36935 | // ASRk |
36936 | OPCODE(0xE000) |
36937 | { |
36938 | u32 adr, res; |
36939 | u32 src, dst; |
36940 | |
36941 | u32 sft; |
36942 | |
36943 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36944 | m68kcontext.io_cycle_counter -= sft * 2; |
36945 | src = (s32)DREGs8((Opcode >> 0) & 7); |
36946 | flag_V = 0; |
36947 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36948 | res = ((s32)src) >> sft; |
36949 | flag_N = res >> 0; |
36950 | flag_NotZ = res; |
36951 | DREGu8((Opcode >> 0) & 7) = res; |
36952 | RET(6) |
36953 | } |
36954 | |
36955 | // ASRk |
36956 | OPCODE(0xE040) |
36957 | { |
36958 | u32 adr, res; |
36959 | u32 src, dst; |
36960 | |
36961 | u32 sft; |
36962 | |
36963 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36964 | m68kcontext.io_cycle_counter -= sft * 2; |
36965 | src = (s32)DREGs16((Opcode >> 0) & 7); |
36966 | flag_V = 0; |
36967 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36968 | res = ((s32)src) >> sft; |
36969 | flag_N = res >> 8; |
36970 | flag_NotZ = res; |
36971 | DREGu16((Opcode >> 0) & 7) = res; |
36972 | RET(6) |
36973 | } |
36974 | |
36975 | // ASRk |
36976 | OPCODE(0xE080) |
36977 | { |
36978 | u32 adr, res; |
36979 | u32 src, dst; |
36980 | |
36981 | u32 sft; |
36982 | |
36983 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36984 | m68kcontext.io_cycle_counter -= sft * 2; |
36985 | src = (s32)DREGs32((Opcode >> 0) & 7); |
36986 | flag_V = 0; |
36987 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36988 | res = ((s32)src) >> sft; |
36989 | flag_N = res >> 24; |
36990 | flag_NotZ = res; |
36991 | DREGu32((Opcode >> 0) & 7) = res; |
36992 | RET(8) |
36993 | } |
36994 | |
36995 | // LSRk |
36996 | OPCODE(0xE008) |
36997 | { |
36998 | u32 adr, res; |
36999 | u32 src, dst; |
37000 | |
37001 | u32 sft; |
37002 | |
37003 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37004 | m68kcontext.io_cycle_counter -= sft * 2; |
37005 | src = DREGu8((Opcode >> 0) & 7); |
37006 | flag_N = flag_V = 0; |
37007 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37008 | res = src >> sft; |
37009 | flag_NotZ = res; |
37010 | DREGu8((Opcode >> 0) & 7) = res; |
37011 | RET(6) |
37012 | } |
37013 | |
37014 | // LSRk |
37015 | OPCODE(0xE048) |
37016 | { |
37017 | u32 adr, res; |
37018 | u32 src, dst; |
37019 | |
37020 | u32 sft; |
37021 | |
37022 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37023 | m68kcontext.io_cycle_counter -= sft * 2; |
37024 | src = DREGu16((Opcode >> 0) & 7); |
37025 | flag_N = flag_V = 0; |
37026 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37027 | res = src >> sft; |
37028 | flag_NotZ = res; |
37029 | DREGu16((Opcode >> 0) & 7) = res; |
37030 | RET(6) |
37031 | } |
37032 | |
37033 | // LSRk |
37034 | OPCODE(0xE088) |
37035 | { |
37036 | u32 adr, res; |
37037 | u32 src, dst; |
37038 | |
37039 | u32 sft; |
37040 | |
37041 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37042 | m68kcontext.io_cycle_counter -= sft * 2; |
37043 | src = DREGu32((Opcode >> 0) & 7); |
37044 | flag_N = flag_V = 0; |
37045 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37046 | res = src >> sft; |
37047 | flag_NotZ = res; |
37048 | DREGu32((Opcode >> 0) & 7) = res; |
37049 | RET(8) |
37050 | } |
37051 | |
37052 | // ROXRk |
37053 | OPCODE(0xE010) |
37054 | { |
37055 | u32 adr, res; |
37056 | u32 src, dst; |
37057 | |
37058 | u32 sft; |
37059 | |
37060 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37061 | m68kcontext.io_cycle_counter -= sft * 2; |
37062 | src = DREGu8((Opcode >> 0) & 7); |
37063 | src |= (flag_X & M68K_SR_X) << 0; |
37064 | res = (src >> sft) | (src << (9 - sft)); |
37065 | flag_X = flag_C = res >> 0; |
37066 | flag_V = 0; |
37067 | flag_N = res >> 0; |
37068 | flag_NotZ = res & 0x000000FF; |
37069 | DREGu8((Opcode >> 0) & 7) = res; |
37070 | RET(6) |
37071 | } |
37072 | |
37073 | // ROXRk |
37074 | OPCODE(0xE050) |
37075 | { |
37076 | u32 adr, res; |
37077 | u32 src, dst; |
37078 | |
37079 | u32 sft; |
37080 | |
37081 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37082 | m68kcontext.io_cycle_counter -= sft * 2; |
37083 | src = DREGu16((Opcode >> 0) & 7); |
37084 | src |= (flag_X & M68K_SR_X) << 8; |
37085 | res = (src >> sft) | (src << (17 - sft)); |
37086 | flag_X = flag_C = res >> 8; |
37087 | flag_V = 0; |
37088 | flag_N = res >> 8; |
37089 | flag_NotZ = res & 0x0000FFFF; |
37090 | DREGu16((Opcode >> 0) & 7) = res; |
37091 | RET(6) |
37092 | } |
37093 | |
37094 | // ROXRk |
37095 | OPCODE(0xE090) |
37096 | { |
37097 | u32 adr, res; |
37098 | u32 src, dst; |
37099 | |
37100 | u32 sft; |
37101 | |
37102 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37103 | m68kcontext.io_cycle_counter -= sft * 2; |
37104 | src = DREGu32((Opcode >> 0) & 7); |
37105 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37106 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37107 | else res = (src >> sft) | (src << (33 - sft)) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + sft))); |
37108 | flag_X = flag_C; |
37109 | flag_V = 0; |
37110 | flag_N = res >> 24; |
37111 | flag_NotZ = res; |
37112 | DREGu32((Opcode >> 0) & 7) = res; |
37113 | RET(8) |
37114 | } |
37115 | |
37116 | // RORk |
37117 | OPCODE(0xE018) |
37118 | { |
37119 | u32 adr, res; |
37120 | u32 src, dst; |
37121 | |
37122 | u32 sft; |
37123 | |
37124 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37125 | m68kcontext.io_cycle_counter -= sft * 2; |
37126 | src = DREGu8((Opcode >> 0) & 7); |
37127 | flag_V = 0; |
37128 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37129 | res = (src >> sft) | (src << (8 - sft)); |
37130 | flag_N = res >> 0; |
37131 | flag_NotZ = res & 0x000000FF; |
37132 | DREGu8((Opcode >> 0) & 7) = res; |
37133 | RET(6) |
37134 | } |
37135 | |
37136 | // RORk |
37137 | OPCODE(0xE058) |
37138 | { |
37139 | u32 adr, res; |
37140 | u32 src, dst; |
37141 | |
37142 | u32 sft; |
37143 | |
37144 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37145 | m68kcontext.io_cycle_counter -= sft * 2; |
37146 | src = DREGu16((Opcode >> 0) & 7); |
37147 | flag_V = 0; |
37148 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37149 | res = (src >> sft) | (src << (16 - sft)); |
37150 | flag_N = res >> 8; |
37151 | flag_NotZ = res & 0x0000FFFF; |
37152 | DREGu16((Opcode >> 0) & 7) = res; |
37153 | RET(6) |
37154 | } |
37155 | |
37156 | // RORk |
37157 | OPCODE(0xE098) |
37158 | { |
37159 | u32 adr, res; |
37160 | u32 src, dst; |
37161 | |
37162 | u32 sft; |
37163 | |
37164 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37165 | m68kcontext.io_cycle_counter -= sft * 2; |
37166 | src = DREGu32((Opcode >> 0) & 7); |
37167 | flag_V = 0; |
37168 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37169 | res = (src >> sft) | (src << (32 - sft)); |
37170 | flag_N = res >> 24; |
37171 | flag_NotZ = res; |
37172 | DREGu32((Opcode >> 0) & 7) = res; |
37173 | RET(8) |
37174 | } |
37175 | |
37176 | // ASLk |
37177 | OPCODE(0xE100) |
37178 | { |
37179 | u32 adr, res; |
37180 | u32 src, dst; |
37181 | |
37182 | u32 sft; |
37183 | |
37184 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37185 | m68kcontext.io_cycle_counter -= sft * 2; |
37186 | src = DREGu8((Opcode >> 0) & 7); |
37187 | if (sft < 8) |
37188 | { |
37189 | flag_X = flag_C = src << (0 + sft); |
37190 | res = src << sft; |
37191 | flag_N = res >> 0; |
37192 | flag_NotZ = res & 0x000000FF; |
37193 | DREGu8((Opcode >> 0) & 7) = res; |
37194 | flag_V = 0; |
37195 | if ((sft > 7) && (src)) flag_V = M68K_SR_V; |
37196 | else |
37197 | { |
37198 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
37199 | src &= msk; |
37200 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37201 | } |
37202 | RET(6) |
37203 | } |
37204 | |
37205 | if (src) flag_V = M68K_SR_V; |
37206 | else flag_V = 0; |
37207 | flag_X = flag_C = src << M68K_SR_C_SFT; |
37208 | res = 0; |
37209 | DREGu8((Opcode >> 0) & 7) = res; |
37210 | flag_N = 0; |
37211 | flag_NotZ = 0; |
37212 | RET(6) |
37213 | } |
37214 | |
37215 | // ASLk |
37216 | OPCODE(0xE140) |
37217 | { |
37218 | u32 adr, res; |
37219 | u32 src, dst; |
37220 | |
37221 | u32 sft; |
37222 | |
37223 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37224 | m68kcontext.io_cycle_counter -= sft * 2; |
37225 | src = DREGu16((Opcode >> 0) & 7); |
37226 | flag_X = flag_C = src >> (8 - sft); |
37227 | res = src << sft; |
37228 | flag_N = res >> 8; |
37229 | flag_NotZ = res & 0x0000FFFF; |
37230 | DREGu16((Opcode >> 0) & 7) = res; |
37231 | flag_V = 0; |
37232 | { |
37233 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
37234 | src &= msk; |
37235 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37236 | } |
37237 | RET(6) |
37238 | } |
37239 | |
37240 | // ASLk |
37241 | OPCODE(0xE180) |
37242 | { |
37243 | u32 adr, res; |
37244 | u32 src, dst; |
37245 | |
37246 | u32 sft; |
37247 | |
37248 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37249 | m68kcontext.io_cycle_counter -= sft * 2; |
37250 | src = DREGu32((Opcode >> 0) & 7); |
37251 | flag_X = flag_C = src >> (24 - sft); |
37252 | res = src << sft; |
37253 | flag_N = res >> 24; |
37254 | flag_NotZ = res & 0xFFFFFFFF; |
37255 | DREGu32((Opcode >> 0) & 7) = res; |
37256 | flag_V = 0; |
37257 | { |
37258 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
37259 | src &= msk; |
37260 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37261 | } |
37262 | RET(8) |
37263 | } |
37264 | |
37265 | // LSLk |
37266 | OPCODE(0xE108) |
37267 | { |
37268 | u32 adr, res; |
37269 | u32 src, dst; |
37270 | |
37271 | u32 sft; |
37272 | |
37273 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37274 | m68kcontext.io_cycle_counter -= sft * 2; |
37275 | src = DREGu8((Opcode >> 0) & 7); |
37276 | flag_V = 0; |
37277 | flag_X = flag_C = src << (0 + sft); |
37278 | res = src << sft; |
37279 | flag_N = res >> 0; |
37280 | flag_NotZ = res & 0x000000FF; |
37281 | DREGu8((Opcode >> 0) & 7) = res; |
37282 | RET(6) |
37283 | } |
37284 | |
37285 | // LSLk |
37286 | OPCODE(0xE148) |
37287 | { |
37288 | u32 adr, res; |
37289 | u32 src, dst; |
37290 | |
37291 | u32 sft; |
37292 | |
37293 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37294 | m68kcontext.io_cycle_counter -= sft * 2; |
37295 | src = DREGu16((Opcode >> 0) & 7); |
37296 | flag_V = 0; |
37297 | flag_X = flag_C = src >> (8 - sft); |
37298 | res = src << sft; |
37299 | flag_N = res >> 8; |
37300 | flag_NotZ = res & 0x0000FFFF; |
37301 | DREGu16((Opcode >> 0) & 7) = res; |
37302 | RET(6) |
37303 | } |
37304 | |
37305 | // LSLk |
37306 | OPCODE(0xE188) |
37307 | { |
37308 | u32 adr, res; |
37309 | u32 src, dst; |
37310 | |
37311 | u32 sft; |
37312 | |
37313 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37314 | m68kcontext.io_cycle_counter -= sft * 2; |
37315 | src = DREGu32((Opcode >> 0) & 7); |
37316 | flag_V = 0; |
37317 | flag_X = flag_C = src >> (24 - sft); |
37318 | res = src << sft; |
37319 | flag_N = res >> 24; |
37320 | flag_NotZ = res & 0xFFFFFFFF; |
37321 | DREGu32((Opcode >> 0) & 7) = res; |
37322 | RET(8) |
37323 | } |
37324 | |
37325 | // ROXLk |
37326 | OPCODE(0xE110) |
37327 | { |
37328 | u32 adr, res; |
37329 | u32 src, dst; |
37330 | |
37331 | u32 sft; |
37332 | |
37333 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37334 | m68kcontext.io_cycle_counter -= sft * 2; |
37335 | src = DREGu8((Opcode >> 0) & 7); |
37336 | src |= (flag_X & M68K_SR_X) << 0; |
37337 | res = (src << sft) | (src >> (9 - sft)); |
37338 | flag_X = flag_C = res >> 0; |
37339 | flag_V = 0; |
37340 | flag_N = res >> 0; |
37341 | flag_NotZ = res & 0x000000FF; |
37342 | DREGu8((Opcode >> 0) & 7) = res; |
37343 | RET(6) |
37344 | } |
37345 | |
37346 | // ROXLk |
37347 | OPCODE(0xE150) |
37348 | { |
37349 | u32 adr, res; |
37350 | u32 src, dst; |
37351 | |
37352 | u32 sft; |
37353 | |
37354 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37355 | m68kcontext.io_cycle_counter -= sft * 2; |
37356 | src = DREGu16((Opcode >> 0) & 7); |
37357 | src |= (flag_X & M68K_SR_X) << 8; |
37358 | res = (src << sft) | (src >> (17 - sft)); |
37359 | flag_X = flag_C = res >> 8; |
37360 | flag_V = 0; |
37361 | flag_N = res >> 8; |
37362 | flag_NotZ = res & 0x0000FFFF; |
37363 | DREGu16((Opcode >> 0) & 7) = res; |
37364 | RET(6) |
37365 | } |
37366 | |
37367 | // ROXLk |
37368 | OPCODE(0xE190) |
37369 | { |
37370 | u32 adr, res; |
37371 | u32 src, dst; |
37372 | |
37373 | u32 sft; |
37374 | |
37375 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37376 | m68kcontext.io_cycle_counter -= sft * 2; |
37377 | src = DREGu32((Opcode >> 0) & 7); |
37378 | flag_C = src >> ((32 - M68K_SR_C_SFT) - sft); |
37379 | if (sft == 1) res = (src << 1) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - 1)); |
37380 | else res = (src << sft) | (src >> (33 - sft)) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - sft)); |
37381 | flag_X = flag_C; |
37382 | flag_V = 0; |
37383 | flag_N = res >> 24; |
37384 | flag_NotZ = res; |
37385 | DREGu32((Opcode >> 0) & 7) = res; |
37386 | RET(8) |
37387 | } |
37388 | |
37389 | // ROLk |
37390 | OPCODE(0xE118) |
37391 | { |
37392 | u32 adr, res; |
37393 | u32 src, dst; |
37394 | |
37395 | u32 sft; |
37396 | |
37397 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37398 | m68kcontext.io_cycle_counter -= sft * 2; |
37399 | src = DREGu8((Opcode >> 0) & 7); |
37400 | flag_V = 0; |
37401 | flag_C = src << (0 + sft); |
37402 | res = (src << sft) | (src >> (8 - sft)); |
37403 | flag_N = res >> 0; |
37404 | flag_NotZ = res & 0x000000FF; |
37405 | DREGu8((Opcode >> 0) & 7) = res; |
37406 | RET(6) |
37407 | } |
37408 | |
37409 | // ROLk |
37410 | OPCODE(0xE158) |
37411 | { |
37412 | u32 adr, res; |
37413 | u32 src, dst; |
37414 | |
37415 | u32 sft; |
37416 | |
37417 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37418 | m68kcontext.io_cycle_counter -= sft * 2; |
37419 | src = DREGu16((Opcode >> 0) & 7); |
37420 | flag_V = 0; |
37421 | flag_C = src >> (8 - sft); |
37422 | res = (src << sft) | (src >> (16 - sft)); |
37423 | flag_N = res >> 8; |
37424 | flag_NotZ = res & 0x0000FFFF; |
37425 | DREGu16((Opcode >> 0) & 7) = res; |
37426 | RET(6) |
37427 | } |
37428 | |
37429 | // ROLk |
37430 | OPCODE(0xE198) |
37431 | { |
37432 | u32 adr, res; |
37433 | u32 src, dst; |
37434 | |
37435 | u32 sft; |
37436 | |
37437 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37438 | m68kcontext.io_cycle_counter -= sft * 2; |
37439 | src = DREGu32((Opcode >> 0) & 7); |
37440 | flag_V = 0; |
37441 | flag_C = src >> (24 - sft); |
37442 | res = (src << sft) | (src >> (32 - sft)); |
37443 | flag_N = res >> 24; |
37444 | flag_NotZ = res; |
37445 | DREGu32((Opcode >> 0) & 7) = res; |
37446 | RET(8) |
37447 | } |
37448 | |
37449 | // ASRD |
37450 | OPCODE(0xE020) |
37451 | { |
37452 | u32 adr, res; |
37453 | u32 src, dst; |
37454 | |
37455 | u32 sft; |
37456 | |
37457 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37458 | src = (s32)DREGs8((Opcode >> 0) & 7); |
37459 | if (sft) |
37460 | { |
37461 | m68kcontext.io_cycle_counter -= sft * 2; |
37462 | if (sft < 8) |
37463 | { |
37464 | flag_V = 0; |
37465 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37466 | res = ((s32)src) >> sft; |
37467 | flag_N = res >> 0; |
37468 | flag_NotZ = res; |
37469 | DREGu8((Opcode >> 0) & 7) = res; |
37470 | RET(6) |
37471 | } |
37472 | |
37473 | if (src & (1 << 7)) |
37474 | { |
37475 | flag_N = M68K_SR_N; |
37476 | flag_NotZ = 1; |
37477 | flag_V = 0; |
37478 | flag_C = M68K_SR_C; |
37479 | flag_X = M68K_SR_X; |
37480 | res = 0x000000FF; |
37481 | DREGu8((Opcode >> 0) & 7) = res; |
37482 | RET(6) |
37483 | } |
37484 | |
37485 | flag_N = 0; |
37486 | flag_NotZ = 0; |
37487 | flag_V = 0; |
37488 | flag_C = 0; |
37489 | flag_X = 0; |
37490 | res = 0; |
37491 | DREGu8((Opcode >> 0) & 7) = res; |
37492 | RET(6) |
37493 | } |
37494 | |
37495 | flag_V = 0; |
37496 | flag_C = 0; |
37497 | flag_N = src >> 0; |
37498 | flag_NotZ = src; |
37499 | RET(6) |
37500 | } |
37501 | |
37502 | // ASRD |
37503 | OPCODE(0xE060) |
37504 | { |
37505 | u32 adr, res; |
37506 | u32 src, dst; |
37507 | |
37508 | u32 sft; |
37509 | |
37510 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37511 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37512 | if (sft) |
37513 | { |
37514 | m68kcontext.io_cycle_counter -= sft * 2; |
37515 | if (sft < 16) |
37516 | { |
37517 | flag_V = 0; |
37518 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37519 | res = ((s32)src) >> sft; |
37520 | flag_N = res >> 8; |
37521 | flag_NotZ = res; |
37522 | DREGu16((Opcode >> 0) & 7) = res; |
37523 | RET(6) |
37524 | } |
37525 | |
37526 | if (src & (1 << 15)) |
37527 | { |
37528 | flag_N = M68K_SR_N; |
37529 | flag_NotZ = 1; |
37530 | flag_V = 0; |
37531 | flag_C = M68K_SR_C; |
37532 | flag_X = M68K_SR_X; |
37533 | res = 0x0000FFFF; |
37534 | DREGu16((Opcode >> 0) & 7) = res; |
37535 | RET(6) |
37536 | } |
37537 | |
37538 | flag_N = 0; |
37539 | flag_NotZ = 0; |
37540 | flag_V = 0; |
37541 | flag_C = 0; |
37542 | flag_X = 0; |
37543 | res = 0; |
37544 | DREGu16((Opcode >> 0) & 7) = res; |
37545 | RET(6) |
37546 | } |
37547 | |
37548 | flag_V = 0; |
37549 | flag_C = 0; |
37550 | flag_N = src >> 8; |
37551 | flag_NotZ = src; |
37552 | RET(6) |
37553 | } |
37554 | |
37555 | // ASRD |
37556 | OPCODE(0xE0A0) |
37557 | { |
37558 | #ifdef USE_CYCLONE_TIMING |
37559 | #define CYC 8 |
37560 | #else |
37561 | #define CYC 6 |
37562 | #endif |
37563 | u32 adr, res; |
37564 | u32 src, dst; |
37565 | |
37566 | u32 sft; |
37567 | |
37568 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37569 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37570 | if (sft) |
37571 | { |
37572 | m68kcontext.io_cycle_counter -= sft * 2; |
37573 | if (sft < 32) |
37574 | { |
37575 | flag_V = 0; |
37576 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37577 | res = ((s32)src) >> sft; |
37578 | flag_N = res >> 24; |
37579 | flag_NotZ = res; |
37580 | DREGu32((Opcode >> 0) & 7) = res; |
37581 | RET(CYC) |
37582 | } |
37583 | |
37584 | if (src & (1 << 31)) |
37585 | { |
37586 | flag_N = M68K_SR_N; |
37587 | flag_NotZ = 1; |
37588 | flag_V = 0; |
37589 | flag_C = M68K_SR_C; |
37590 | flag_X = M68K_SR_X; |
37591 | res = 0xFFFFFFFF; |
37592 | DREGu32((Opcode >> 0) & 7) = res; |
37593 | RET(CYC) |
37594 | } |
37595 | |
37596 | flag_N = 0; |
37597 | flag_NotZ = 0; |
37598 | flag_V = 0; |
37599 | flag_C = 0; |
37600 | flag_X = 0; |
37601 | res = 0; |
37602 | DREGu32((Opcode >> 0) & 7) = res; |
37603 | RET(CYC) |
37604 | } |
37605 | |
37606 | flag_V = 0; |
37607 | flag_C = 0; |
37608 | flag_N = src >> 24; |
37609 | flag_NotZ = src; |
37610 | RET(CYC) |
37611 | #undef CYC |
37612 | } |
37613 | |
37614 | // LSRD |
37615 | OPCODE(0xE028) |
37616 | { |
37617 | u32 adr, res; |
37618 | u32 src, dst; |
37619 | |
37620 | u32 sft; |
37621 | |
37622 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37623 | src = DREGu8((Opcode >> 0) & 7); |
37624 | if (sft) |
37625 | { |
37626 | m68kcontext.io_cycle_counter -= sft * 2; |
37627 | if (sft <= 8) |
37628 | { |
37629 | flag_N = flag_V = 0; |
37630 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37631 | res = src >> sft; |
37632 | flag_NotZ = res; |
37633 | DREGu8((Opcode >> 0) & 7) = res; |
37634 | RET(6) |
37635 | } |
37636 | |
37637 | flag_X = flag_C = 0; |
37638 | flag_N = 0; |
37639 | flag_NotZ = 0; |
37640 | flag_V = 0; |
37641 | res = 0; |
37642 | DREGu8((Opcode >> 0) & 7) = res; |
37643 | RET(6) |
37644 | } |
37645 | |
37646 | flag_V = 0; |
37647 | flag_C = 0; |
37648 | flag_N = src >> 0; |
37649 | flag_NotZ = src; |
37650 | RET(6) |
37651 | } |
37652 | |
37653 | // LSRD |
37654 | OPCODE(0xE068) |
37655 | { |
37656 | u32 adr, res; |
37657 | u32 src, dst; |
37658 | |
37659 | u32 sft; |
37660 | |
37661 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37662 | src = DREGu16((Opcode >> 0) & 7); |
37663 | if (sft) |
37664 | { |
37665 | m68kcontext.io_cycle_counter -= sft * 2; |
37666 | if (sft <= 16) |
37667 | { |
37668 | flag_N = flag_V = 0; |
37669 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37670 | res = src >> sft; |
37671 | flag_NotZ = res; |
37672 | DREGu16((Opcode >> 0) & 7) = res; |
37673 | RET(6) |
37674 | } |
37675 | |
37676 | flag_X = flag_C = 0; |
37677 | flag_N = 0; |
37678 | flag_NotZ = 0; |
37679 | flag_V = 0; |
37680 | res = 0; |
37681 | DREGu16((Opcode >> 0) & 7) = res; |
37682 | RET(6) |
37683 | } |
37684 | |
37685 | flag_V = 0; |
37686 | flag_C = 0; |
37687 | flag_N = src >> 8; |
37688 | flag_NotZ = src; |
37689 | RET(6) |
37690 | } |
37691 | |
37692 | // LSRD |
37693 | OPCODE(0xE0A8) |
37694 | { |
37695 | #ifdef USE_CYCLONE_TIMING |
37696 | #define CYC 8 |
37697 | #else |
37698 | #define CYC 6 |
37699 | #endif |
37700 | u32 adr, res; |
37701 | u32 src, dst; |
37702 | |
37703 | u32 sft; |
37704 | |
37705 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37706 | src = DREGu32((Opcode >> 0) & 7); |
37707 | if (sft) |
37708 | { |
37709 | m68kcontext.io_cycle_counter -= sft * 2; |
37710 | if (sft < 32) |
37711 | { |
37712 | flag_N = flag_V = 0; |
37713 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37714 | res = src >> sft; |
37715 | flag_NotZ = res; |
37716 | DREGu32((Opcode >> 0) & 7) = res; |
37717 | RET(CYC) |
37718 | } |
37719 | |
37720 | if (sft == 32) flag_C = src >> (31 - M68K_SR_C_SFT); |
37721 | else flag_C = 0; |
37722 | flag_X = flag_C; |
37723 | flag_N = 0; |
37724 | flag_NotZ = 0; |
37725 | flag_V = 0; |
37726 | res = 0; |
37727 | DREGu32((Opcode >> 0) & 7) = res; |
37728 | RET(CYC) |
37729 | } |
37730 | |
37731 | flag_V = 0; |
37732 | flag_C = 0; |
37733 | flag_N = src >> 24; |
37734 | flag_NotZ = src; |
37735 | RET(CYC) |
37736 | #undef CYC |
37737 | } |
37738 | |
37739 | // ROXRD |
37740 | OPCODE(0xE030) |
37741 | { |
37742 | u32 adr, res; |
37743 | u32 src, dst; |
37744 | |
37745 | u32 sft; |
37746 | |
37747 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37748 | src = DREGu8((Opcode >> 0) & 7); |
37749 | if (sft) |
37750 | { |
37751 | m68kcontext.io_cycle_counter -= sft * 2; |
37752 | sft %= 9; |
37753 | |
37754 | src |= (flag_X & M68K_SR_X) << 0; |
37755 | res = (src >> sft) | (src << (9 - sft)); |
37756 | flag_X = flag_C = res >> 0; |
37757 | flag_V = 0; |
37758 | flag_N = res >> 0; |
37759 | flag_NotZ = res & 0x000000FF; |
37760 | DREGu8((Opcode >> 0) & 7) = res; |
37761 | RET(6) |
37762 | } |
37763 | |
37764 | flag_V = 0; |
37765 | flag_C = flag_X; |
37766 | flag_N = src >> 0; |
37767 | flag_NotZ = src; |
37768 | RET(6) |
37769 | } |
37770 | |
37771 | // ROXRD |
37772 | OPCODE(0xE070) |
37773 | { |
37774 | u32 adr, res; |
37775 | u32 src, dst; |
37776 | |
37777 | u32 sft; |
37778 | |
37779 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37780 | src = DREGu16((Opcode >> 0) & 7); |
37781 | if (sft) |
37782 | { |
37783 | m68kcontext.io_cycle_counter -= sft * 2; |
37784 | sft %= 17; |
37785 | |
37786 | src |= (flag_X & M68K_SR_X) << 8; |
37787 | res = (src >> sft) | (src << (17 - sft)); |
37788 | flag_X = flag_C = res >> 8; |
37789 | flag_V = 0; |
37790 | flag_N = res >> 8; |
37791 | flag_NotZ = res & 0x0000FFFF; |
37792 | DREGu16((Opcode >> 0) & 7) = res; |
37793 | RET(6) |
37794 | } |
37795 | |
37796 | flag_V = 0; |
37797 | flag_C = flag_X; |
37798 | flag_N = src >> 8; |
37799 | flag_NotZ = src; |
37800 | RET(6) |
37801 | } |
37802 | |
37803 | // ROXRD |
37804 | OPCODE(0xE0B0) |
37805 | { |
37806 | #ifdef USE_CYCLONE_TIMING |
37807 | #define CYC 8 |
37808 | #else |
37809 | #define CYC 6 |
37810 | #endif |
37811 | u32 adr, res; |
37812 | u32 src, dst; |
37813 | |
37814 | u32 sft; |
37815 | |
37816 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37817 | src = DREGu32((Opcode >> 0) & 7); |
37818 | if (sft) |
37819 | { |
37820 | m68kcontext.io_cycle_counter -= sft * 2; |
37821 | sft %= 33; |
37822 | |
37823 | if (sft != 0) |
37824 | { |
37825 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37826 | else res = (src >> sft) | (src << (33 - sft)) | (((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))) >> (sft - 1)); |
37827 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
37828 | } |
37829 | else res = src; |
37830 | flag_C = flag_X; |
37831 | flag_V = 0; |
37832 | flag_N = res >> 24; |
37833 | flag_NotZ = res; |
37834 | DREGu32((Opcode >> 0) & 7) = res; |
37835 | RET(CYC) |
37836 | } |
37837 | |
37838 | flag_V = 0; |
37839 | flag_C = flag_X; |
37840 | flag_N = src >> 24; |
37841 | flag_NotZ = src; |
37842 | RET(CYC) |
37843 | #undef CYC |
37844 | } |
37845 | |
37846 | // RORD |
37847 | OPCODE(0xE038) |
37848 | { |
37849 | u32 adr, res; |
37850 | u32 src, dst; |
37851 | |
37852 | u32 sft; |
37853 | |
37854 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37855 | src = DREGu8((Opcode >> 0) & 7); |
37856 | if (sft) |
37857 | { |
37858 | m68kcontext.io_cycle_counter -= sft * 2; |
37859 | sft &= 0x07; |
37860 | |
37861 | flag_C = src << (M68K_SR_C_SFT - ((sft - 1) & 7)); |
37862 | res = (src >> sft) | (src << (8 - sft)); |
37863 | flag_V = 0; |
37864 | flag_N = res >> 0; |
37865 | flag_NotZ = res & 0x000000FF; |
37866 | DREGu8((Opcode >> 0) & 7) = res; |
37867 | RET(6) |
37868 | } |
37869 | |
37870 | flag_V = 0; |
37871 | flag_C = 0; |
37872 | flag_N = src >> 0; |
37873 | flag_NotZ = src; |
37874 | RET(6) |
37875 | } |
37876 | |
37877 | // RORD |
37878 | OPCODE(0xE078) |
37879 | { |
37880 | u32 adr, res; |
37881 | u32 src, dst; |
37882 | |
37883 | u32 sft; |
37884 | |
37885 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37886 | src = DREGu16((Opcode >> 0) & 7); |
37887 | if (sft) |
37888 | { |
37889 | m68kcontext.io_cycle_counter -= sft * 2; |
37890 | sft &= 0x0F; |
37891 | |
37892 | flag_C = (src >> ((sft - 1) & 15)) << M68K_SR_C_SFT; |
37893 | res = (src >> sft) | (src << (16 - sft)); |
37894 | flag_V = 0; |
37895 | flag_N = res >> 8; |
37896 | flag_NotZ = res & 0x0000FFFF; |
37897 | DREGu16((Opcode >> 0) & 7) = res; |
37898 | RET(6) |
37899 | } |
37900 | |
37901 | flag_V = 0; |
37902 | flag_C = 0; |
37903 | flag_N = src >> 8; |
37904 | flag_NotZ = src; |
37905 | RET(6) |
37906 | } |
37907 | |
37908 | // RORD |
37909 | OPCODE(0xE0B8) |
37910 | { |
37911 | #ifdef USE_CYCLONE_TIMING |
37912 | #define CYC 8 |
37913 | #else |
37914 | #define CYC 6 |
37915 | #endif |
37916 | u32 adr, res; |
37917 | u32 src, dst; |
37918 | |
37919 | u32 sft; |
37920 | |
37921 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37922 | src = DREGu32((Opcode >> 0) & 7); |
37923 | if (sft) |
37924 | { |
37925 | m68kcontext.io_cycle_counter -= sft * 2; |
37926 | sft &= 0x1F; |
37927 | |
37928 | flag_C = (src >> ((sft - 1) & 31)) << M68K_SR_C_SFT; |
37929 | res = (src >> sft) | (src << (32 - sft)); |
37930 | flag_V = 0; |
37931 | flag_N = res >> 24; |
37932 | flag_NotZ = res; |
37933 | DREGu32((Opcode >> 0) & 7) = res; |
37934 | RET(CYC) |
37935 | } |
37936 | |
37937 | flag_V = 0; |
37938 | flag_C = 0; |
37939 | flag_N = src >> 24; |
37940 | flag_NotZ = src; |
37941 | RET(CYC) |
37942 | #undef CYC |
37943 | } |
37944 | |
37945 | // ASLD |
37946 | OPCODE(0xE120) |
37947 | { |
37948 | u32 adr, res; |
37949 | u32 src, dst; |
37950 | |
37951 | u32 sft; |
37952 | |
37953 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37954 | src = DREGu8((Opcode >> 0) & 7); |
37955 | if (sft) |
37956 | { |
37957 | m68kcontext.io_cycle_counter -= sft * 2; |
37958 | if (sft < 8) |
37959 | { |
37960 | flag_X = flag_C = (src << sft) >> 0; |
37961 | res = (src << sft) & 0x000000FF; |
37962 | flag_N = res >> 0; |
37963 | flag_NotZ = res; |
37964 | DREGu8((Opcode >> 0) & 7) = res; |
37965 | flag_V = 0; |
37966 | { |
37967 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
37968 | src &= msk; |
37969 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37970 | } |
37971 | RET(6) |
37972 | } |
37973 | |
37974 | if (sft == 256) flag_C = src << M68K_SR_C_SFT; |
37975 | else flag_C = 0; |
37976 | flag_X = flag_C; |
37977 | if (src) flag_V = M68K_SR_V; |
37978 | else flag_V = 0; |
37979 | res = 0; |
37980 | DREGu8((Opcode >> 0) & 7) = res; |
37981 | flag_N = 0; |
37982 | flag_NotZ = 0; |
37983 | RET(6) |
37984 | } |
37985 | |
37986 | flag_V = 0; |
37987 | flag_C = 0; |
37988 | flag_N = src >> 0; |
37989 | flag_NotZ = src; |
37990 | RET(6) |
37991 | } |
37992 | |
37993 | // ASLD |
37994 | OPCODE(0xE160) |
37995 | { |
37996 | u32 adr, res; |
37997 | u32 src, dst; |
37998 | |
37999 | u32 sft; |
38000 | |
38001 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38002 | src = DREGu16((Opcode >> 0) & 7); |
38003 | if (sft) |
38004 | { |
38005 | m68kcontext.io_cycle_counter -= sft * 2; |
38006 | if (sft < 16) |
38007 | { |
38008 | flag_X = flag_C = (src << sft) >> 8; |
38009 | res = (src << sft) & 0x0000FFFF; |
38010 | flag_N = res >> 8; |
38011 | flag_NotZ = res; |
38012 | DREGu16((Opcode >> 0) & 7) = res; |
38013 | flag_V = 0; |
38014 | { |
38015 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
38016 | src &= msk; |
38017 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38018 | } |
38019 | RET(6) |
38020 | } |
38021 | |
38022 | if (sft == 65536) flag_C = src << M68K_SR_C_SFT; |
38023 | else flag_C = 0; |
38024 | flag_X = flag_C; |
38025 | if (src) flag_V = M68K_SR_V; |
38026 | else flag_V = 0; |
38027 | res = 0; |
38028 | DREGu16((Opcode >> 0) & 7) = res; |
38029 | flag_N = 0; |
38030 | flag_NotZ = 0; |
38031 | RET(6) |
38032 | } |
38033 | |
38034 | flag_V = 0; |
38035 | flag_C = 0; |
38036 | flag_N = src >> 8; |
38037 | flag_NotZ = src; |
38038 | RET(6) |
38039 | } |
38040 | |
38041 | // ASLD |
38042 | OPCODE(0xE1A0) |
38043 | { |
38044 | #ifdef USE_CYCLONE_TIMING |
38045 | #define CYC 8 |
38046 | #else |
38047 | #define CYC 6 |
38048 | #endif |
38049 | u32 adr, res; |
38050 | u32 src, dst; |
38051 | |
38052 | u32 sft; |
38053 | |
38054 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38055 | src = DREGu32((Opcode >> 0) & 7); |
38056 | if (sft) |
38057 | { |
38058 | m68kcontext.io_cycle_counter -= sft * 2; |
38059 | if (sft < 32) |
38060 | { |
38061 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38062 | res = src << sft; |
38063 | flag_N = res >> 24; |
38064 | flag_NotZ = res; |
38065 | DREGu32((Opcode >> 0) & 7) = res; |
38066 | flag_V = 0; |
38067 | { |
38068 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
38069 | src &= msk; |
38070 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38071 | } |
38072 | RET(CYC) |
38073 | } |
38074 | |
38075 | if (sft == 0) flag_C = src << M68K_SR_C_SFT; |
38076 | else flag_C = 0; |
38077 | flag_X = flag_C; |
38078 | if (src) flag_V = M68K_SR_V; |
38079 | else flag_V = 0; |
38080 | res = 0; |
38081 | DREGu32((Opcode >> 0) & 7) = res; |
38082 | flag_N = 0; |
38083 | flag_NotZ = 0; |
38084 | RET(CYC) |
38085 | } |
38086 | |
38087 | flag_V = 0; |
38088 | flag_C = 0; |
38089 | flag_N = src >> 24; |
38090 | flag_NotZ = src; |
38091 | RET(CYC) |
38092 | #undef CYC |
38093 | } |
38094 | |
38095 | // LSLD |
38096 | OPCODE(0xE128) |
38097 | { |
38098 | u32 adr, res; |
38099 | u32 src, dst; |
38100 | |
38101 | u32 sft; |
38102 | |
38103 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38104 | src = DREGu8((Opcode >> 0) & 7); |
38105 | if (sft) |
38106 | { |
38107 | m68kcontext.io_cycle_counter -= sft * 2; |
38108 | if (sft <= 8) |
38109 | { |
38110 | flag_X = flag_C = (src << sft) >> 0; |
38111 | res = (src << sft) & 0x000000FF; |
38112 | flag_V = 0; |
38113 | flag_N = res >> 0; |
38114 | flag_NotZ = res; |
38115 | DREGu8((Opcode >> 0) & 7) = res; |
38116 | RET(6) |
38117 | } |
38118 | |
38119 | flag_X = flag_C = 0; |
38120 | flag_N = 0; |
38121 | flag_NotZ = 0; |
38122 | flag_V = 0; |
38123 | res = 0; |
38124 | DREGu8((Opcode >> 0) & 7) = res; |
38125 | RET(6) |
38126 | } |
38127 | |
38128 | flag_V = 0; |
38129 | flag_C = 0; |
38130 | flag_N = src >> 0; |
38131 | flag_NotZ = src; |
38132 | RET(6) |
38133 | } |
38134 | |
38135 | // LSLD |
38136 | OPCODE(0xE168) |
38137 | { |
38138 | u32 adr, res; |
38139 | u32 src, dst; |
38140 | |
38141 | u32 sft; |
38142 | |
38143 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38144 | src = DREGu16((Opcode >> 0) & 7); |
38145 | if (sft) |
38146 | { |
38147 | m68kcontext.io_cycle_counter -= sft * 2; |
38148 | if (sft <= 16) |
38149 | { |
38150 | flag_X = flag_C = (src << sft) >> 8; |
38151 | res = (src << sft) & 0x0000FFFF; |
38152 | flag_V = 0; |
38153 | flag_N = res >> 8; |
38154 | flag_NotZ = res; |
38155 | DREGu16((Opcode >> 0) & 7) = res; |
38156 | RET(6) |
38157 | } |
38158 | |
38159 | flag_X = flag_C = 0; |
38160 | flag_N = 0; |
38161 | flag_NotZ = 0; |
38162 | flag_V = 0; |
38163 | res = 0; |
38164 | DREGu16((Opcode >> 0) & 7) = res; |
38165 | RET(6) |
38166 | } |
38167 | |
38168 | flag_V = 0; |
38169 | flag_C = 0; |
38170 | flag_N = src >> 8; |
38171 | flag_NotZ = src; |
38172 | RET(6) |
38173 | } |
38174 | |
38175 | // LSLD |
38176 | OPCODE(0xE1A8) |
38177 | { |
38178 | #ifdef USE_CYCLONE_TIMING |
38179 | #define CYC 8 |
38180 | #else |
38181 | #define CYC 6 |
38182 | #endif |
38183 | u32 adr, res; |
38184 | u32 src, dst; |
38185 | |
38186 | u32 sft; |
38187 | |
38188 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38189 | src = DREGu32((Opcode >> 0) & 7); |
38190 | if (sft) |
38191 | { |
38192 | m68kcontext.io_cycle_counter -= sft * 2; |
38193 | if (sft < 32) |
38194 | { |
38195 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38196 | res = src << sft; |
38197 | flag_V = 0; |
38198 | flag_N = res >> 24; |
38199 | flag_NotZ = res; |
38200 | DREGu32((Opcode >> 0) & 7) = res; |
38201 | RET(CYC) |
38202 | } |
38203 | |
38204 | if (sft == 32) flag_C = src << M68K_SR_C_SFT; |
38205 | else flag_C = 0; |
38206 | flag_X = flag_C; |
38207 | flag_N = 0; |
38208 | flag_NotZ = 0; |
38209 | flag_V = 0; |
38210 | res = 0; |
38211 | DREGu32((Opcode >> 0) & 7) = res; |
38212 | RET(CYC) |
38213 | } |
38214 | |
38215 | flag_V = 0; |
38216 | flag_C = 0; |
38217 | flag_N = src >> 24; |
38218 | flag_NotZ = src; |
38219 | RET(CYC) |
38220 | #undef CYC |
38221 | } |
38222 | |
38223 | // ROXLD |
38224 | OPCODE(0xE130) |
38225 | { |
38226 | u32 adr, res; |
38227 | u32 src, dst; |
38228 | |
38229 | u32 sft; |
38230 | |
38231 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38232 | src = DREGu8((Opcode >> 0) & 7); |
38233 | if (sft) |
38234 | { |
38235 | m68kcontext.io_cycle_counter -= sft * 2; |
38236 | sft %= 9; |
38237 | |
38238 | src |= (flag_X & M68K_SR_X) << 0; |
38239 | res = (src << sft) | (src >> (9 - sft)); |
38240 | flag_X = flag_C = res >> 0; |
38241 | flag_V = 0; |
38242 | flag_N = res >> 0; |
38243 | flag_NotZ = res & 0x000000FF; |
38244 | DREGu8((Opcode >> 0) & 7) = res; |
38245 | RET(6) |
38246 | } |
38247 | |
38248 | flag_V = 0; |
38249 | flag_C = flag_X; |
38250 | flag_N = src >> 0; |
38251 | flag_NotZ = src; |
38252 | RET(6) |
38253 | } |
38254 | |
38255 | // ROXLD |
38256 | OPCODE(0xE170) |
38257 | { |
38258 | u32 adr, res; |
38259 | u32 src, dst; |
38260 | |
38261 | u32 sft; |
38262 | |
38263 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38264 | src = DREGu16((Opcode >> 0) & 7); |
38265 | if (sft) |
38266 | { |
38267 | m68kcontext.io_cycle_counter -= sft * 2; |
38268 | sft %= 17; |
38269 | |
38270 | src |= (flag_X & M68K_SR_X) << 8; |
38271 | res = (src << sft) | (src >> (17 - sft)); |
38272 | flag_X = flag_C = res >> 8; |
38273 | flag_V = 0; |
38274 | flag_N = res >> 8; |
38275 | flag_NotZ = res & 0x0000FFFF; |
38276 | DREGu16((Opcode >> 0) & 7) = res; |
38277 | RET(6) |
38278 | } |
38279 | |
38280 | flag_V = 0; |
38281 | flag_C = flag_X; |
38282 | flag_N = src >> 8; |
38283 | flag_NotZ = src; |
38284 | RET(6) |
38285 | } |
38286 | |
38287 | // ROXLD |
38288 | OPCODE(0xE1B0) |
38289 | { |
38290 | #ifdef USE_CYCLONE_TIMING |
38291 | #define CYC 8 |
38292 | #else |
38293 | #define CYC 6 |
38294 | #endif |
38295 | u32 adr, res; |
38296 | u32 src, dst; |
38297 | |
38298 | u32 sft; |
38299 | |
38300 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38301 | src = DREGu32((Opcode >> 0) & 7); |
38302 | if (sft) |
38303 | { |
38304 | m68kcontext.io_cycle_counter -= sft * 2; |
38305 | sft %= 33; |
38306 | |
38307 | if (sft != 0) |
38308 | { |
38309 | if (sft == 1) res = (src << 1) | ((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1); |
38310 | else res = (src << sft) | (src >> (33 - sft)) | (((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1) << (sft - 1)); |
38311 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
38312 | } |
38313 | else res = src; |
38314 | flag_C = flag_X; |
38315 | flag_V = 0; |
38316 | flag_N = res >> 24; |
38317 | flag_NotZ = res; |
38318 | DREGu32((Opcode >> 0) & 7) = res; |
38319 | RET(CYC) |
38320 | } |
38321 | |
38322 | flag_V = 0; |
38323 | flag_C = flag_X; |
38324 | flag_N = src >> 24; |
38325 | flag_NotZ = src; |
38326 | RET(CYC) |
38327 | #undef CYC |
38328 | } |
38329 | |
38330 | // ROLD |
38331 | OPCODE(0xE138) |
38332 | { |
38333 | u32 adr, res; |
38334 | u32 src, dst; |
38335 | |
38336 | u32 sft; |
38337 | |
38338 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38339 | src = DREGu8((Opcode >> 0) & 7); |
38340 | if (sft) |
38341 | { |
38342 | m68kcontext.io_cycle_counter -= sft * 2; |
38343 | if (sft &= 0x07) |
38344 | { |
38345 | flag_C = (src << sft) >> 0; |
38346 | res = ((src << sft) | (src >> (8 - sft))) & 0x000000FF; |
38347 | flag_V = 0; |
38348 | flag_N = res >> 0; |
38349 | flag_NotZ = res; |
38350 | DREGu8((Opcode >> 0) & 7) = res; |
38351 | RET(6) |
38352 | } |
38353 | |
38354 | flag_V = 0; |
38355 | flag_C = src << M68K_SR_C_SFT; |
38356 | flag_N = src >> 0; |
38357 | flag_NotZ = src; |
38358 | RET(6) |
38359 | } |
38360 | |
38361 | flag_V = 0; |
38362 | flag_C = 0; |
38363 | flag_N = src >> 0; |
38364 | flag_NotZ = src; |
38365 | RET(6) |
38366 | } |
38367 | |
38368 | // ROLD |
38369 | OPCODE(0xE178) |
38370 | { |
38371 | u32 adr, res; |
38372 | u32 src, dst; |
38373 | |
38374 | u32 sft; |
38375 | |
38376 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38377 | src = DREGu16((Opcode >> 0) & 7); |
38378 | if (sft) |
38379 | { |
38380 | m68kcontext.io_cycle_counter -= sft * 2; |
38381 | if (sft &= 0x0F) |
38382 | { |
38383 | flag_C = (src << sft) >> 8; |
38384 | res = ((src << sft) | (src >> (16 - sft))) & 0x0000FFFF; |
38385 | flag_V = 0; |
38386 | flag_N = res >> 8; |
38387 | flag_NotZ = res; |
38388 | DREGu16((Opcode >> 0) & 7) = res; |
38389 | RET(6) |
38390 | } |
38391 | |
38392 | flag_V = 0; |
38393 | flag_C = src << M68K_SR_C_SFT; |
38394 | flag_N = src >> 8; |
38395 | flag_NotZ = src; |
38396 | RET(6) |
38397 | } |
38398 | |
38399 | flag_V = 0; |
38400 | flag_C = 0; |
38401 | flag_N = src >> 8; |
38402 | flag_NotZ = src; |
38403 | RET(6) |
38404 | } |
38405 | |
38406 | // ROLD |
38407 | OPCODE(0xE1B8) |
38408 | { |
38409 | #ifdef USE_CYCLONE_TIMING |
38410 | #define CYC 8 |
38411 | #else |
38412 | #define CYC 6 |
38413 | #endif |
38414 | u32 adr, res; |
38415 | u32 src, dst; |
38416 | |
38417 | u32 sft; |
38418 | |
38419 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38420 | src = DREGu32((Opcode >> 0) & 7); |
38421 | if (sft) |
38422 | { |
38423 | m68kcontext.io_cycle_counter -= sft * 2; |
38424 | if (sft &= 0x1F) |
38425 | { |
38426 | flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38427 | res = (src << sft) | (src >> (32 - sft)); |
38428 | flag_V = 0; |
38429 | flag_N = res >> 24; |
38430 | flag_NotZ = res; |
38431 | DREGu32((Opcode >> 0) & 7) = res; |
38432 | RET(CYC) |
38433 | } |
38434 | |
38435 | flag_V = 0; |
38436 | flag_C = src << M68K_SR_C_SFT; |
38437 | flag_N = src >> 24; |
38438 | flag_NotZ = src; |
38439 | RET(CYC) |
38440 | } |
38441 | |
38442 | flag_V = 0; |
38443 | flag_C = 0; |
38444 | flag_N = src >> 24; |
38445 | flag_NotZ = src; |
38446 | RET(CYC) |
38447 | #undef CYC |
38448 | } |
38449 | |
38450 | // ASR |
38451 | OPCODE(0xE0D0) |
38452 | { |
38453 | u32 adr, res; |
38454 | u32 src, dst; |
38455 | |
38456 | adr = AREG((Opcode >> 0) & 7); |
38457 | PRE_IO |
38458 | READ_WORD_F(adr, src) |
38459 | flag_V = 0; |
38460 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38461 | res = (src >> 1) | (src & (1 << 15)); |
38462 | flag_N = res >> 8; |
38463 | flag_NotZ = res; |
38464 | WRITE_WORD_F(adr, res) |
38465 | POST_IO |
38466 | RET(12) |
38467 | } |
38468 | |
38469 | // ASR |
38470 | OPCODE(0xE0D8) |
38471 | { |
38472 | u32 adr, res; |
38473 | u32 src, dst; |
38474 | |
38475 | adr = AREG((Opcode >> 0) & 7); |
38476 | AREG((Opcode >> 0) & 7) += 2; |
38477 | PRE_IO |
38478 | READ_WORD_F(adr, src) |
38479 | flag_V = 0; |
38480 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38481 | res = (src >> 1) | (src & (1 << 15)); |
38482 | flag_N = res >> 8; |
38483 | flag_NotZ = res; |
38484 | WRITE_WORD_F(adr, res) |
38485 | POST_IO |
38486 | RET(12) |
38487 | } |
38488 | |
38489 | // ASR |
38490 | OPCODE(0xE0E0) |
38491 | { |
38492 | u32 adr, res; |
38493 | u32 src, dst; |
38494 | |
38495 | adr = AREG((Opcode >> 0) & 7) - 2; |
38496 | AREG((Opcode >> 0) & 7) = adr; |
38497 | PRE_IO |
38498 | READ_WORD_F(adr, src) |
38499 | flag_V = 0; |
38500 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38501 | res = (src >> 1) | (src & (1 << 15)); |
38502 | flag_N = res >> 8; |
38503 | flag_NotZ = res; |
38504 | WRITE_WORD_F(adr, res) |
38505 | POST_IO |
38506 | RET(14) |
38507 | } |
38508 | |
38509 | // ASR |
38510 | OPCODE(0xE0E8) |
38511 | { |
38512 | u32 adr, res; |
38513 | u32 src, dst; |
38514 | |
38515 | FETCH_SWORD(adr); |
38516 | adr += AREG((Opcode >> 0) & 7); |
38517 | PRE_IO |
38518 | READ_WORD_F(adr, src) |
38519 | flag_V = 0; |
38520 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38521 | res = (src >> 1) | (src & (1 << 15)); |
38522 | flag_N = res >> 8; |
38523 | flag_NotZ = res; |
38524 | WRITE_WORD_F(adr, res) |
38525 | POST_IO |
38526 | RET(16) |
38527 | } |
38528 | |
38529 | // ASR |
38530 | OPCODE(0xE0F0) |
38531 | { |
38532 | u32 adr, res; |
38533 | u32 src, dst; |
38534 | |
38535 | adr = AREG((Opcode >> 0) & 7); |
38536 | DECODE_EXT_WORD |
38537 | PRE_IO |
38538 | READ_WORD_F(adr, src) |
38539 | flag_V = 0; |
38540 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38541 | res = (src >> 1) | (src & (1 << 15)); |
38542 | flag_N = res >> 8; |
38543 | flag_NotZ = res; |
38544 | WRITE_WORD_F(adr, res) |
38545 | POST_IO |
38546 | RET(18) |
38547 | } |
38548 | |
38549 | // ASR |
38550 | OPCODE(0xE0F8) |
38551 | { |
38552 | u32 adr, res; |
38553 | u32 src, dst; |
38554 | |
38555 | FETCH_SWORD(adr); |
38556 | PRE_IO |
38557 | READ_WORD_F(adr, src) |
38558 | flag_V = 0; |
38559 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38560 | res = (src >> 1) | (src & (1 << 15)); |
38561 | flag_N = res >> 8; |
38562 | flag_NotZ = res; |
38563 | WRITE_WORD_F(adr, res) |
38564 | POST_IO |
38565 | RET(16) |
38566 | } |
38567 | |
38568 | // ASR |
38569 | OPCODE(0xE0F9) |
38570 | { |
38571 | u32 adr, res; |
38572 | u32 src, dst; |
38573 | |
38574 | FETCH_LONG(adr); |
38575 | PRE_IO |
38576 | READ_WORD_F(adr, src) |
38577 | flag_V = 0; |
38578 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38579 | res = (src >> 1) | (src & (1 << 15)); |
38580 | flag_N = res >> 8; |
38581 | flag_NotZ = res; |
38582 | WRITE_WORD_F(adr, res) |
38583 | POST_IO |
38584 | RET(20) |
38585 | } |
38586 | |
38587 | // ASR |
38588 | OPCODE(0xE0DF) |
38589 | { |
38590 | u32 adr, res; |
38591 | u32 src, dst; |
38592 | |
38593 | adr = AREG(7); |
38594 | AREG(7) += 2; |
38595 | PRE_IO |
38596 | READ_WORD_F(adr, src) |
38597 | flag_V = 0; |
38598 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38599 | res = (src >> 1) | (src & (1 << 15)); |
38600 | flag_N = res >> 8; |
38601 | flag_NotZ = res; |
38602 | WRITE_WORD_F(adr, res) |
38603 | POST_IO |
38604 | RET(12) |
38605 | } |
38606 | |
38607 | // ASR |
38608 | OPCODE(0xE0E7) |
38609 | { |
38610 | u32 adr, res; |
38611 | u32 src, dst; |
38612 | |
38613 | adr = AREG(7) - 2; |
38614 | AREG(7) = adr; |
38615 | PRE_IO |
38616 | READ_WORD_F(adr, src) |
38617 | flag_V = 0; |
38618 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38619 | res = (src >> 1) | (src & (1 << 15)); |
38620 | flag_N = res >> 8; |
38621 | flag_NotZ = res; |
38622 | WRITE_WORD_F(adr, res) |
38623 | POST_IO |
38624 | RET(14) |
38625 | } |
38626 | |
38627 | // LSR |
38628 | OPCODE(0xE2D0) |
38629 | { |
38630 | u32 adr, res; |
38631 | u32 src, dst; |
38632 | |
38633 | adr = AREG((Opcode >> 0) & 7); |
38634 | PRE_IO |
38635 | READ_WORD_F(adr, src) |
38636 | flag_N = flag_V = 0; |
38637 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38638 | res = src >> 1; |
38639 | flag_NotZ = res; |
38640 | WRITE_WORD_F(adr, res) |
38641 | POST_IO |
38642 | RET(12) |
38643 | } |
38644 | |
38645 | // LSR |
38646 | OPCODE(0xE2D8) |
38647 | { |
38648 | u32 adr, res; |
38649 | u32 src, dst; |
38650 | |
38651 | adr = AREG((Opcode >> 0) & 7); |
38652 | AREG((Opcode >> 0) & 7) += 2; |
38653 | PRE_IO |
38654 | READ_WORD_F(adr, src) |
38655 | flag_N = flag_V = 0; |
38656 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38657 | res = src >> 1; |
38658 | flag_NotZ = res; |
38659 | WRITE_WORD_F(adr, res) |
38660 | POST_IO |
38661 | RET(12) |
38662 | } |
38663 | |
38664 | // LSR |
38665 | OPCODE(0xE2E0) |
38666 | { |
38667 | u32 adr, res; |
38668 | u32 src, dst; |
38669 | |
38670 | adr = AREG((Opcode >> 0) & 7) - 2; |
38671 | AREG((Opcode >> 0) & 7) = adr; |
38672 | PRE_IO |
38673 | READ_WORD_F(adr, src) |
38674 | flag_N = flag_V = 0; |
38675 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38676 | res = src >> 1; |
38677 | flag_NotZ = res; |
38678 | WRITE_WORD_F(adr, res) |
38679 | POST_IO |
38680 | RET(14) |
38681 | } |
38682 | |
38683 | // LSR |
38684 | OPCODE(0xE2E8) |
38685 | { |
38686 | u32 adr, res; |
38687 | u32 src, dst; |
38688 | |
38689 | FETCH_SWORD(adr); |
38690 | adr += AREG((Opcode >> 0) & 7); |
38691 | PRE_IO |
38692 | READ_WORD_F(adr, src) |
38693 | flag_N = flag_V = 0; |
38694 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38695 | res = src >> 1; |
38696 | flag_NotZ = res; |
38697 | WRITE_WORD_F(adr, res) |
38698 | POST_IO |
38699 | RET(16) |
38700 | } |
38701 | |
38702 | // LSR |
38703 | OPCODE(0xE2F0) |
38704 | { |
38705 | u32 adr, res; |
38706 | u32 src, dst; |
38707 | |
38708 | adr = AREG((Opcode >> 0) & 7); |
38709 | DECODE_EXT_WORD |
38710 | PRE_IO |
38711 | READ_WORD_F(adr, src) |
38712 | flag_N = flag_V = 0; |
38713 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38714 | res = src >> 1; |
38715 | flag_NotZ = res; |
38716 | WRITE_WORD_F(adr, res) |
38717 | POST_IO |
38718 | RET(18) |
38719 | } |
38720 | |
38721 | // LSR |
38722 | OPCODE(0xE2F8) |
38723 | { |
38724 | u32 adr, res; |
38725 | u32 src, dst; |
38726 | |
38727 | FETCH_SWORD(adr); |
38728 | PRE_IO |
38729 | READ_WORD_F(adr, src) |
38730 | flag_N = flag_V = 0; |
38731 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38732 | res = src >> 1; |
38733 | flag_NotZ = res; |
38734 | WRITE_WORD_F(adr, res) |
38735 | POST_IO |
38736 | RET(16) |
38737 | } |
38738 | |
38739 | // LSR |
38740 | OPCODE(0xE2F9) |
38741 | { |
38742 | u32 adr, res; |
38743 | u32 src, dst; |
38744 | |
38745 | FETCH_LONG(adr); |
38746 | PRE_IO |
38747 | READ_WORD_F(adr, src) |
38748 | flag_N = flag_V = 0; |
38749 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38750 | res = src >> 1; |
38751 | flag_NotZ = res; |
38752 | WRITE_WORD_F(adr, res) |
38753 | POST_IO |
38754 | RET(20) |
38755 | } |
38756 | |
38757 | // LSR |
38758 | OPCODE(0xE2DF) |
38759 | { |
38760 | u32 adr, res; |
38761 | u32 src, dst; |
38762 | |
38763 | adr = AREG(7); |
38764 | AREG(7) += 2; |
38765 | PRE_IO |
38766 | READ_WORD_F(adr, src) |
38767 | flag_N = flag_V = 0; |
38768 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38769 | res = src >> 1; |
38770 | flag_NotZ = res; |
38771 | WRITE_WORD_F(adr, res) |
38772 | POST_IO |
38773 | RET(12) |
38774 | } |
38775 | |
38776 | // LSR |
38777 | OPCODE(0xE2E7) |
38778 | { |
38779 | u32 adr, res; |
38780 | u32 src, dst; |
38781 | |
38782 | adr = AREG(7) - 2; |
38783 | AREG(7) = adr; |
38784 | PRE_IO |
38785 | READ_WORD_F(adr, src) |
38786 | flag_N = flag_V = 0; |
38787 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38788 | res = src >> 1; |
38789 | flag_NotZ = res; |
38790 | WRITE_WORD_F(adr, res) |
38791 | POST_IO |
38792 | RET(14) |
38793 | } |
38794 | |
38795 | // ROXR |
38796 | OPCODE(0xE4D0) |
38797 | { |
38798 | u32 adr, res; |
38799 | u32 src, dst; |
38800 | |
38801 | adr = AREG((Opcode >> 0) & 7); |
38802 | PRE_IO |
38803 | READ_WORD_F(adr, src) |
38804 | flag_V = 0; |
38805 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38806 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38807 | flag_N = res >> 8; |
38808 | flag_NotZ = res; |
38809 | WRITE_WORD_F(adr, res) |
38810 | POST_IO |
38811 | RET(12) |
38812 | } |
38813 | |
38814 | // ROXR |
38815 | OPCODE(0xE4D8) |
38816 | { |
38817 | u32 adr, res; |
38818 | u32 src, dst; |
38819 | |
38820 | adr = AREG((Opcode >> 0) & 7); |
38821 | AREG((Opcode >> 0) & 7) += 2; |
38822 | PRE_IO |
38823 | READ_WORD_F(adr, src) |
38824 | flag_V = 0; |
38825 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38826 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38827 | flag_N = res >> 8; |
38828 | flag_NotZ = res; |
38829 | WRITE_WORD_F(adr, res) |
38830 | POST_IO |
38831 | RET(12) |
38832 | } |
38833 | |
38834 | // ROXR |
38835 | OPCODE(0xE4E0) |
38836 | { |
38837 | u32 adr, res; |
38838 | u32 src, dst; |
38839 | |
38840 | adr = AREG((Opcode >> 0) & 7) - 2; |
38841 | AREG((Opcode >> 0) & 7) = adr; |
38842 | PRE_IO |
38843 | READ_WORD_F(adr, src) |
38844 | flag_V = 0; |
38845 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38846 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38847 | flag_N = res >> 8; |
38848 | flag_NotZ = res; |
38849 | WRITE_WORD_F(adr, res) |
38850 | POST_IO |
38851 | RET(14) |
38852 | } |
38853 | |
38854 | // ROXR |
38855 | OPCODE(0xE4E8) |
38856 | { |
38857 | u32 adr, res; |
38858 | u32 src, dst; |
38859 | |
38860 | FETCH_SWORD(adr); |
38861 | adr += AREG((Opcode >> 0) & 7); |
38862 | PRE_IO |
38863 | READ_WORD_F(adr, src) |
38864 | flag_V = 0; |
38865 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38866 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38867 | flag_N = res >> 8; |
38868 | flag_NotZ = res; |
38869 | WRITE_WORD_F(adr, res) |
38870 | POST_IO |
38871 | RET(16) |
38872 | } |
38873 | |
38874 | // ROXR |
38875 | OPCODE(0xE4F0) |
38876 | { |
38877 | u32 adr, res; |
38878 | u32 src, dst; |
38879 | |
38880 | adr = AREG((Opcode >> 0) & 7); |
38881 | DECODE_EXT_WORD |
38882 | PRE_IO |
38883 | READ_WORD_F(adr, src) |
38884 | flag_V = 0; |
38885 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38886 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38887 | flag_N = res >> 8; |
38888 | flag_NotZ = res; |
38889 | WRITE_WORD_F(adr, res) |
38890 | POST_IO |
38891 | RET(18) |
38892 | } |
38893 | |
38894 | // ROXR |
38895 | OPCODE(0xE4F8) |
38896 | { |
38897 | u32 adr, res; |
38898 | u32 src, dst; |
38899 | |
38900 | FETCH_SWORD(adr); |
38901 | PRE_IO |
38902 | READ_WORD_F(adr, src) |
38903 | flag_V = 0; |
38904 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38905 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38906 | flag_N = res >> 8; |
38907 | flag_NotZ = res; |
38908 | WRITE_WORD_F(adr, res) |
38909 | POST_IO |
38910 | RET(16) |
38911 | } |
38912 | |
38913 | // ROXR |
38914 | OPCODE(0xE4F9) |
38915 | { |
38916 | u32 adr, res; |
38917 | u32 src, dst; |
38918 | |
38919 | FETCH_LONG(adr); |
38920 | PRE_IO |
38921 | READ_WORD_F(adr, src) |
38922 | flag_V = 0; |
38923 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38924 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38925 | flag_N = res >> 8; |
38926 | flag_NotZ = res; |
38927 | WRITE_WORD_F(adr, res) |
38928 | POST_IO |
38929 | RET(20) |
38930 | } |
38931 | |
38932 | // ROXR |
38933 | OPCODE(0xE4DF) |
38934 | { |
38935 | u32 adr, res; |
38936 | u32 src, dst; |
38937 | |
38938 | adr = AREG(7); |
38939 | AREG(7) += 2; |
38940 | PRE_IO |
38941 | READ_WORD_F(adr, src) |
38942 | flag_V = 0; |
38943 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38944 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38945 | flag_N = res >> 8; |
38946 | flag_NotZ = res; |
38947 | WRITE_WORD_F(adr, res) |
38948 | POST_IO |
38949 | RET(12) |
38950 | } |
38951 | |
38952 | // ROXR |
38953 | OPCODE(0xE4E7) |
38954 | { |
38955 | u32 adr, res; |
38956 | u32 src, dst; |
38957 | |
38958 | adr = AREG(7) - 2; |
38959 | AREG(7) = adr; |
38960 | PRE_IO |
38961 | READ_WORD_F(adr, src) |
38962 | flag_V = 0; |
38963 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38964 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38965 | flag_N = res >> 8; |
38966 | flag_NotZ = res; |
38967 | WRITE_WORD_F(adr, res) |
38968 | POST_IO |
38969 | RET(14) |
38970 | } |
38971 | |
38972 | // ROR |
38973 | OPCODE(0xE6D0) |
38974 | { |
38975 | u32 adr, res; |
38976 | u32 src, dst; |
38977 | |
38978 | adr = AREG((Opcode >> 0) & 7); |
38979 | PRE_IO |
38980 | READ_WORD_F(adr, src) |
38981 | flag_V = 0; |
38982 | flag_C = src << M68K_SR_C_SFT; |
38983 | res = (src >> 1) | (src << 15); |
38984 | flag_N = res >> 8; |
38985 | flag_NotZ = res & 0x0000FFFF; |
38986 | WRITE_WORD_F(adr, res) |
38987 | POST_IO |
38988 | RET(12) |
38989 | } |
38990 | |
38991 | // ROR |
38992 | OPCODE(0xE6D8) |
38993 | { |
38994 | u32 adr, res; |
38995 | u32 src, dst; |
38996 | |
38997 | adr = AREG((Opcode >> 0) & 7); |
38998 | AREG((Opcode >> 0) & 7) += 2; |
38999 | PRE_IO |
39000 | READ_WORD_F(adr, src) |
39001 | flag_V = 0; |
39002 | flag_C = src << M68K_SR_C_SFT; |
39003 | res = (src >> 1) | (src << 15); |
39004 | flag_N = res >> 8; |
39005 | flag_NotZ = res & 0x0000FFFF; |
39006 | WRITE_WORD_F(adr, res) |
39007 | POST_IO |
39008 | RET(12) |
39009 | } |
39010 | |
39011 | // ROR |
39012 | OPCODE(0xE6E0) |
39013 | { |
39014 | u32 adr, res; |
39015 | u32 src, dst; |
39016 | |
39017 | adr = AREG((Opcode >> 0) & 7) - 2; |
39018 | AREG((Opcode >> 0) & 7) = adr; |
39019 | PRE_IO |
39020 | READ_WORD_F(adr, src) |
39021 | flag_V = 0; |
39022 | flag_C = src << M68K_SR_C_SFT; |
39023 | res = (src >> 1) | (src << 15); |
39024 | flag_N = res >> 8; |
39025 | flag_NotZ = res & 0x0000FFFF; |
39026 | WRITE_WORD_F(adr, res) |
39027 | POST_IO |
39028 | RET(14) |
39029 | } |
39030 | |
39031 | // ROR |
39032 | OPCODE(0xE6E8) |
39033 | { |
39034 | u32 adr, res; |
39035 | u32 src, dst; |
39036 | |
39037 | FETCH_SWORD(adr); |
39038 | adr += AREG((Opcode >> 0) & 7); |
39039 | PRE_IO |
39040 | READ_WORD_F(adr, src) |
39041 | flag_V = 0; |
39042 | flag_C = src << M68K_SR_C_SFT; |
39043 | res = (src >> 1) | (src << 15); |
39044 | flag_N = res >> 8; |
39045 | flag_NotZ = res & 0x0000FFFF; |
39046 | WRITE_WORD_F(adr, res) |
39047 | POST_IO |
39048 | RET(16) |
39049 | } |
39050 | |
39051 | // ROR |
39052 | OPCODE(0xE6F0) |
39053 | { |
39054 | u32 adr, res; |
39055 | u32 src, dst; |
39056 | |
39057 | adr = AREG((Opcode >> 0) & 7); |
39058 | DECODE_EXT_WORD |
39059 | PRE_IO |
39060 | READ_WORD_F(adr, src) |
39061 | flag_V = 0; |
39062 | flag_C = src << M68K_SR_C_SFT; |
39063 | res = (src >> 1) | (src << 15); |
39064 | flag_N = res >> 8; |
39065 | flag_NotZ = res & 0x0000FFFF; |
39066 | WRITE_WORD_F(adr, res) |
39067 | POST_IO |
39068 | RET(18) |
39069 | } |
39070 | |
39071 | // ROR |
39072 | OPCODE(0xE6F8) |
39073 | { |
39074 | u32 adr, res; |
39075 | u32 src, dst; |
39076 | |
39077 | FETCH_SWORD(adr); |
39078 | PRE_IO |
39079 | READ_WORD_F(adr, src) |
39080 | flag_V = 0; |
39081 | flag_C = src << M68K_SR_C_SFT; |
39082 | res = (src >> 1) | (src << 15); |
39083 | flag_N = res >> 8; |
39084 | flag_NotZ = res & 0x0000FFFF; |
39085 | WRITE_WORD_F(adr, res) |
39086 | POST_IO |
39087 | RET(16) |
39088 | } |
39089 | |
39090 | // ROR |
39091 | OPCODE(0xE6F9) |
39092 | { |
39093 | u32 adr, res; |
39094 | u32 src, dst; |
39095 | |
39096 | FETCH_LONG(adr); |
39097 | PRE_IO |
39098 | READ_WORD_F(adr, src) |
39099 | flag_V = 0; |
39100 | flag_C = src << M68K_SR_C_SFT; |
39101 | res = (src >> 1) | (src << 15); |
39102 | flag_N = res >> 8; |
39103 | flag_NotZ = res & 0x0000FFFF; |
39104 | WRITE_WORD_F(adr, res) |
39105 | POST_IO |
39106 | RET(20) |
39107 | } |
39108 | |
39109 | // ROR |
39110 | OPCODE(0xE6DF) |
39111 | { |
39112 | u32 adr, res; |
39113 | u32 src, dst; |
39114 | |
39115 | adr = AREG(7); |
39116 | AREG(7) += 2; |
39117 | PRE_IO |
39118 | READ_WORD_F(adr, src) |
39119 | flag_V = 0; |
39120 | flag_C = src << M68K_SR_C_SFT; |
39121 | res = (src >> 1) | (src << 15); |
39122 | flag_N = res >> 8; |
39123 | flag_NotZ = res & 0x0000FFFF; |
39124 | WRITE_WORD_F(adr, res) |
39125 | POST_IO |
39126 | RET(12) |
39127 | } |
39128 | |
39129 | // ROR |
39130 | OPCODE(0xE6E7) |
39131 | { |
39132 | u32 adr, res; |
39133 | u32 src, dst; |
39134 | |
39135 | adr = AREG(7) - 2; |
39136 | AREG(7) = adr; |
39137 | PRE_IO |
39138 | READ_WORD_F(adr, src) |
39139 | flag_V = 0; |
39140 | flag_C = src << M68K_SR_C_SFT; |
39141 | res = (src >> 1) | (src << 15); |
39142 | flag_N = res >> 8; |
39143 | flag_NotZ = res & 0x0000FFFF; |
39144 | WRITE_WORD_F(adr, res) |
39145 | POST_IO |
39146 | RET(14) |
39147 | } |
39148 | |
39149 | // ASL |
39150 | OPCODE(0xE1D0) |
39151 | { |
39152 | u32 adr, res; |
39153 | u32 src, dst; |
39154 | |
39155 | adr = AREG((Opcode >> 0) & 7); |
39156 | PRE_IO |
39157 | READ_WORD_F(adr, src) |
39158 | flag_X = flag_C = src >> 7; |
39159 | res = src << 1; |
39160 | flag_V = (src ^ res) >> 8; |
39161 | flag_N = res >> 8; |
39162 | flag_NotZ = res & 0x0000FFFF; |
39163 | WRITE_WORD_F(adr, res) |
39164 | POST_IO |
39165 | RET(12) |
39166 | } |
39167 | |
39168 | // ASL |
39169 | OPCODE(0xE1D8) |
39170 | { |
39171 | u32 adr, res; |
39172 | u32 src, dst; |
39173 | |
39174 | adr = AREG((Opcode >> 0) & 7); |
39175 | AREG((Opcode >> 0) & 7) += 2; |
39176 | PRE_IO |
39177 | READ_WORD_F(adr, src) |
39178 | flag_X = flag_C = src >> 7; |
39179 | res = src << 1; |
39180 | flag_V = (src ^ res) >> 8; |
39181 | flag_N = res >> 8; |
39182 | flag_NotZ = res & 0x0000FFFF; |
39183 | WRITE_WORD_F(adr, res) |
39184 | POST_IO |
39185 | RET(12) |
39186 | } |
39187 | |
39188 | // ASL |
39189 | OPCODE(0xE1E0) |
39190 | { |
39191 | u32 adr, res; |
39192 | u32 src, dst; |
39193 | |
39194 | adr = AREG((Opcode >> 0) & 7) - 2; |
39195 | AREG((Opcode >> 0) & 7) = adr; |
39196 | PRE_IO |
39197 | READ_WORD_F(adr, src) |
39198 | flag_X = flag_C = src >> 7; |
39199 | res = src << 1; |
39200 | flag_V = (src ^ res) >> 8; |
39201 | flag_N = res >> 8; |
39202 | flag_NotZ = res & 0x0000FFFF; |
39203 | WRITE_WORD_F(adr, res) |
39204 | POST_IO |
39205 | RET(14) |
39206 | } |
39207 | |
39208 | // ASL |
39209 | OPCODE(0xE1E8) |
39210 | { |
39211 | u32 adr, res; |
39212 | u32 src, dst; |
39213 | |
39214 | FETCH_SWORD(adr); |
39215 | adr += AREG((Opcode >> 0) & 7); |
39216 | PRE_IO |
39217 | READ_WORD_F(adr, src) |
39218 | flag_X = flag_C = src >> 7; |
39219 | res = src << 1; |
39220 | flag_V = (src ^ res) >> 8; |
39221 | flag_N = res >> 8; |
39222 | flag_NotZ = res & 0x0000FFFF; |
39223 | WRITE_WORD_F(adr, res) |
39224 | POST_IO |
39225 | RET(16) |
39226 | } |
39227 | |
39228 | // ASL |
39229 | OPCODE(0xE1F0) |
39230 | { |
39231 | u32 adr, res; |
39232 | u32 src, dst; |
39233 | |
39234 | adr = AREG((Opcode >> 0) & 7); |
39235 | DECODE_EXT_WORD |
39236 | PRE_IO |
39237 | READ_WORD_F(adr, src) |
39238 | flag_X = flag_C = src >> 7; |
39239 | res = src << 1; |
39240 | flag_V = (src ^ res) >> 8; |
39241 | flag_N = res >> 8; |
39242 | flag_NotZ = res & 0x0000FFFF; |
39243 | WRITE_WORD_F(adr, res) |
39244 | POST_IO |
39245 | RET(18) |
39246 | } |
39247 | |
39248 | // ASL |
39249 | OPCODE(0xE1F8) |
39250 | { |
39251 | u32 adr, res; |
39252 | u32 src, dst; |
39253 | |
39254 | FETCH_SWORD(adr); |
39255 | PRE_IO |
39256 | READ_WORD_F(adr, src) |
39257 | flag_X = flag_C = src >> 7; |
39258 | res = src << 1; |
39259 | flag_V = (src ^ res) >> 8; |
39260 | flag_N = res >> 8; |
39261 | flag_NotZ = res & 0x0000FFFF; |
39262 | WRITE_WORD_F(adr, res) |
39263 | POST_IO |
39264 | RET(16) |
39265 | } |
39266 | |
39267 | // ASL |
39268 | OPCODE(0xE1F9) |
39269 | { |
39270 | u32 adr, res; |
39271 | u32 src, dst; |
39272 | |
39273 | FETCH_LONG(adr); |
39274 | PRE_IO |
39275 | READ_WORD_F(adr, src) |
39276 | flag_X = flag_C = src >> 7; |
39277 | res = src << 1; |
39278 | flag_V = (src ^ res) >> 8; |
39279 | flag_N = res >> 8; |
39280 | flag_NotZ = res & 0x0000FFFF; |
39281 | WRITE_WORD_F(adr, res) |
39282 | POST_IO |
39283 | RET(20) |
39284 | } |
39285 | |
39286 | // ASL |
39287 | OPCODE(0xE1DF) |
39288 | { |
39289 | u32 adr, res; |
39290 | u32 src, dst; |
39291 | |
39292 | adr = AREG(7); |
39293 | AREG(7) += 2; |
39294 | PRE_IO |
39295 | READ_WORD_F(adr, src) |
39296 | flag_X = flag_C = src >> 7; |
39297 | res = src << 1; |
39298 | flag_V = (src ^ res) >> 8; |
39299 | flag_N = res >> 8; |
39300 | flag_NotZ = res & 0x0000FFFF; |
39301 | WRITE_WORD_F(adr, res) |
39302 | POST_IO |
39303 | RET(12) |
39304 | } |
39305 | |
39306 | // ASL |
39307 | OPCODE(0xE1E7) |
39308 | { |
39309 | u32 adr, res; |
39310 | u32 src, dst; |
39311 | |
39312 | adr = AREG(7) - 2; |
39313 | AREG(7) = adr; |
39314 | PRE_IO |
39315 | READ_WORD_F(adr, src) |
39316 | flag_X = flag_C = src >> 7; |
39317 | res = src << 1; |
39318 | flag_V = (src ^ res) >> 8; |
39319 | flag_N = res >> 8; |
39320 | flag_NotZ = res & 0x0000FFFF; |
39321 | WRITE_WORD_F(adr, res) |
39322 | POST_IO |
39323 | RET(14) |
39324 | } |
39325 | |
39326 | // LSL |
39327 | OPCODE(0xE3D0) |
39328 | { |
39329 | u32 adr, res; |
39330 | u32 src, dst; |
39331 | |
39332 | adr = AREG((Opcode >> 0) & 7); |
39333 | PRE_IO |
39334 | READ_WORD_F(adr, src) |
39335 | flag_V = 0; |
39336 | flag_X = flag_C = src >> 7; |
39337 | res = src << 1; |
39338 | flag_N = res >> 8; |
39339 | flag_NotZ = res & 0x0000FFFF; |
39340 | WRITE_WORD_F(adr, res) |
39341 | POST_IO |
39342 | RET(12) |
39343 | } |
39344 | |
39345 | // LSL |
39346 | OPCODE(0xE3D8) |
39347 | { |
39348 | u32 adr, res; |
39349 | u32 src, dst; |
39350 | |
39351 | adr = AREG((Opcode >> 0) & 7); |
39352 | AREG((Opcode >> 0) & 7) += 2; |
39353 | PRE_IO |
39354 | READ_WORD_F(adr, src) |
39355 | flag_V = 0; |
39356 | flag_X = flag_C = src >> 7; |
39357 | res = src << 1; |
39358 | flag_N = res >> 8; |
39359 | flag_NotZ = res & 0x0000FFFF; |
39360 | WRITE_WORD_F(adr, res) |
39361 | POST_IO |
39362 | RET(12) |
39363 | } |
39364 | |
39365 | // LSL |
39366 | OPCODE(0xE3E0) |
39367 | { |
39368 | u32 adr, res; |
39369 | u32 src, dst; |
39370 | |
39371 | adr = AREG((Opcode >> 0) & 7) - 2; |
39372 | AREG((Opcode >> 0) & 7) = adr; |
39373 | PRE_IO |
39374 | READ_WORD_F(adr, src) |
39375 | flag_V = 0; |
39376 | flag_X = flag_C = src >> 7; |
39377 | res = src << 1; |
39378 | flag_N = res >> 8; |
39379 | flag_NotZ = res & 0x0000FFFF; |
39380 | WRITE_WORD_F(adr, res) |
39381 | POST_IO |
39382 | RET(14) |
39383 | } |
39384 | |
39385 | // LSL |
39386 | OPCODE(0xE3E8) |
39387 | { |
39388 | u32 adr, res; |
39389 | u32 src, dst; |
39390 | |
39391 | FETCH_SWORD(adr); |
39392 | adr += AREG((Opcode >> 0) & 7); |
39393 | PRE_IO |
39394 | READ_WORD_F(adr, src) |
39395 | flag_V = 0; |
39396 | flag_X = flag_C = src >> 7; |
39397 | res = src << 1; |
39398 | flag_N = res >> 8; |
39399 | flag_NotZ = res & 0x0000FFFF; |
39400 | WRITE_WORD_F(adr, res) |
39401 | POST_IO |
39402 | RET(16) |
39403 | } |
39404 | |
39405 | // LSL |
39406 | OPCODE(0xE3F0) |
39407 | { |
39408 | u32 adr, res; |
39409 | u32 src, dst; |
39410 | |
39411 | adr = AREG((Opcode >> 0) & 7); |
39412 | DECODE_EXT_WORD |
39413 | PRE_IO |
39414 | READ_WORD_F(adr, src) |
39415 | flag_V = 0; |
39416 | flag_X = flag_C = src >> 7; |
39417 | res = src << 1; |
39418 | flag_N = res >> 8; |
39419 | flag_NotZ = res & 0x0000FFFF; |
39420 | WRITE_WORD_F(adr, res) |
39421 | POST_IO |
39422 | RET(18) |
39423 | } |
39424 | |
39425 | // LSL |
39426 | OPCODE(0xE3F8) |
39427 | { |
39428 | u32 adr, res; |
39429 | u32 src, dst; |
39430 | |
39431 | FETCH_SWORD(adr); |
39432 | PRE_IO |
39433 | READ_WORD_F(adr, src) |
39434 | flag_V = 0; |
39435 | flag_X = flag_C = src >> 7; |
39436 | res = src << 1; |
39437 | flag_N = res >> 8; |
39438 | flag_NotZ = res & 0x0000FFFF; |
39439 | WRITE_WORD_F(adr, res) |
39440 | POST_IO |
39441 | RET(16) |
39442 | } |
39443 | |
39444 | // LSL |
39445 | OPCODE(0xE3F9) |
39446 | { |
39447 | u32 adr, res; |
39448 | u32 src, dst; |
39449 | |
39450 | FETCH_LONG(adr); |
39451 | PRE_IO |
39452 | READ_WORD_F(adr, src) |
39453 | flag_V = 0; |
39454 | flag_X = flag_C = src >> 7; |
39455 | res = src << 1; |
39456 | flag_N = res >> 8; |
39457 | flag_NotZ = res & 0x0000FFFF; |
39458 | WRITE_WORD_F(adr, res) |
39459 | POST_IO |
39460 | RET(20) |
39461 | } |
39462 | |
39463 | // LSL |
39464 | OPCODE(0xE3DF) |
39465 | { |
39466 | u32 adr, res; |
39467 | u32 src, dst; |
39468 | |
39469 | adr = AREG(7); |
39470 | AREG(7) += 2; |
39471 | PRE_IO |
39472 | READ_WORD_F(adr, src) |
39473 | flag_V = 0; |
39474 | flag_X = flag_C = src >> 7; |
39475 | res = src << 1; |
39476 | flag_N = res >> 8; |
39477 | flag_NotZ = res & 0x0000FFFF; |
39478 | WRITE_WORD_F(adr, res) |
39479 | POST_IO |
39480 | RET(12) |
39481 | } |
39482 | |
39483 | // LSL |
39484 | OPCODE(0xE3E7) |
39485 | { |
39486 | u32 adr, res; |
39487 | u32 src, dst; |
39488 | |
39489 | adr = AREG(7) - 2; |
39490 | AREG(7) = adr; |
39491 | PRE_IO |
39492 | READ_WORD_F(adr, src) |
39493 | flag_V = 0; |
39494 | flag_X = flag_C = src >> 7; |
39495 | res = src << 1; |
39496 | flag_N = res >> 8; |
39497 | flag_NotZ = res & 0x0000FFFF; |
39498 | WRITE_WORD_F(adr, res) |
39499 | POST_IO |
39500 | RET(14) |
39501 | } |
39502 | |
39503 | // ROXL |
39504 | OPCODE(0xE5D0) |
39505 | { |
39506 | u32 adr, res; |
39507 | u32 src, dst; |
39508 | |
39509 | adr = AREG((Opcode >> 0) & 7); |
39510 | PRE_IO |
39511 | READ_WORD_F(adr, src) |
39512 | flag_V = 0; |
39513 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39514 | flag_X = flag_C = src >> 7; |
39515 | flag_N = res >> 8; |
39516 | flag_NotZ = res & 0x0000FFFF; |
39517 | WRITE_WORD_F(adr, res) |
39518 | POST_IO |
39519 | RET(12) |
39520 | } |
39521 | |
39522 | // ROXL |
39523 | OPCODE(0xE5D8) |
39524 | { |
39525 | u32 adr, res; |
39526 | u32 src, dst; |
39527 | |
39528 | adr = AREG((Opcode >> 0) & 7); |
39529 | AREG((Opcode >> 0) & 7) += 2; |
39530 | PRE_IO |
39531 | READ_WORD_F(adr, src) |
39532 | flag_V = 0; |
39533 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39534 | flag_X = flag_C = src >> 7; |
39535 | flag_N = res >> 8; |
39536 | flag_NotZ = res & 0x0000FFFF; |
39537 | WRITE_WORD_F(adr, res) |
39538 | POST_IO |
39539 | RET(12) |
39540 | } |
39541 | |
39542 | // ROXL |
39543 | OPCODE(0xE5E0) |
39544 | { |
39545 | u32 adr, res; |
39546 | u32 src, dst; |
39547 | |
39548 | adr = AREG((Opcode >> 0) & 7) - 2; |
39549 | AREG((Opcode >> 0) & 7) = adr; |
39550 | PRE_IO |
39551 | READ_WORD_F(adr, src) |
39552 | flag_V = 0; |
39553 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39554 | flag_X = flag_C = src >> 7; |
39555 | flag_N = res >> 8; |
39556 | flag_NotZ = res & 0x0000FFFF; |
39557 | WRITE_WORD_F(adr, res) |
39558 | POST_IO |
39559 | RET(14) |
39560 | } |
39561 | |
39562 | // ROXL |
39563 | OPCODE(0xE5E8) |
39564 | { |
39565 | u32 adr, res; |
39566 | u32 src, dst; |
39567 | |
39568 | FETCH_SWORD(adr); |
39569 | adr += AREG((Opcode >> 0) & 7); |
39570 | PRE_IO |
39571 | READ_WORD_F(adr, src) |
39572 | flag_V = 0; |
39573 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39574 | flag_X = flag_C = src >> 7; |
39575 | flag_N = res >> 8; |
39576 | flag_NotZ = res & 0x0000FFFF; |
39577 | WRITE_WORD_F(adr, res) |
39578 | POST_IO |
39579 | RET(16) |
39580 | } |
39581 | |
39582 | // ROXL |
39583 | OPCODE(0xE5F0) |
39584 | { |
39585 | u32 adr, res; |
39586 | u32 src, dst; |
39587 | |
39588 | adr = AREG((Opcode >> 0) & 7); |
39589 | DECODE_EXT_WORD |
39590 | PRE_IO |
39591 | READ_WORD_F(adr, src) |
39592 | flag_V = 0; |
39593 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39594 | flag_X = flag_C = src >> 7; |
39595 | flag_N = res >> 8; |
39596 | flag_NotZ = res & 0x0000FFFF; |
39597 | WRITE_WORD_F(adr, res) |
39598 | POST_IO |
39599 | RET(18) |
39600 | } |
39601 | |
39602 | // ROXL |
39603 | OPCODE(0xE5F8) |
39604 | { |
39605 | u32 adr, res; |
39606 | u32 src, dst; |
39607 | |
39608 | FETCH_SWORD(adr); |
39609 | PRE_IO |
39610 | READ_WORD_F(adr, src) |
39611 | flag_V = 0; |
39612 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39613 | flag_X = flag_C = src >> 7; |
39614 | flag_N = res >> 8; |
39615 | flag_NotZ = res & 0x0000FFFF; |
39616 | WRITE_WORD_F(adr, res) |
39617 | POST_IO |
39618 | RET(16) |
39619 | } |
39620 | |
39621 | // ROXL |
39622 | OPCODE(0xE5F9) |
39623 | { |
39624 | u32 adr, res; |
39625 | u32 src, dst; |
39626 | |
39627 | FETCH_LONG(adr); |
39628 | PRE_IO |
39629 | READ_WORD_F(adr, src) |
39630 | flag_V = 0; |
39631 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39632 | flag_X = flag_C = src >> 7; |
39633 | flag_N = res >> 8; |
39634 | flag_NotZ = res & 0x0000FFFF; |
39635 | WRITE_WORD_F(adr, res) |
39636 | POST_IO |
39637 | RET(20) |
39638 | } |
39639 | |
39640 | // ROXL |
39641 | OPCODE(0xE5DF) |
39642 | { |
39643 | u32 adr, res; |
39644 | u32 src, dst; |
39645 | |
39646 | adr = AREG(7); |
39647 | AREG(7) += 2; |
39648 | PRE_IO |
39649 | READ_WORD_F(adr, src) |
39650 | flag_V = 0; |
39651 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39652 | flag_X = flag_C = src >> 7; |
39653 | flag_N = res >> 8; |
39654 | flag_NotZ = res & 0x0000FFFF; |
39655 | WRITE_WORD_F(adr, res) |
39656 | POST_IO |
39657 | RET(12) |
39658 | } |
39659 | |
39660 | // ROXL |
39661 | OPCODE(0xE5E7) |
39662 | { |
39663 | u32 adr, res; |
39664 | u32 src, dst; |
39665 | |
39666 | adr = AREG(7) - 2; |
39667 | AREG(7) = adr; |
39668 | PRE_IO |
39669 | READ_WORD_F(adr, src) |
39670 | flag_V = 0; |
39671 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39672 | flag_X = flag_C = src >> 7; |
39673 | flag_N = res >> 8; |
39674 | flag_NotZ = res & 0x0000FFFF; |
39675 | WRITE_WORD_F(adr, res) |
39676 | POST_IO |
39677 | RET(14) |
39678 | } |
39679 | |
39680 | // ROL |
39681 | OPCODE(0xE7D0) |
39682 | { |
39683 | u32 adr, res; |
39684 | u32 src, dst; |
39685 | |
39686 | adr = AREG((Opcode >> 0) & 7); |
39687 | PRE_IO |
39688 | READ_WORD_F(adr, src) |
39689 | flag_V = 0; |
39690 | flag_C = src >> 7; |
39691 | res = (src << 1) | (src >> 15); |
39692 | flag_N = res >> 8; |
39693 | flag_NotZ = res & 0x0000FFFF; |
39694 | WRITE_WORD_F(adr, res) |
39695 | POST_IO |
39696 | RET(12) |
39697 | } |
39698 | |
39699 | // ROL |
39700 | OPCODE(0xE7D8) |
39701 | { |
39702 | u32 adr, res; |
39703 | u32 src, dst; |
39704 | |
39705 | adr = AREG((Opcode >> 0) & 7); |
39706 | AREG((Opcode >> 0) & 7) += 2; |
39707 | PRE_IO |
39708 | READ_WORD_F(adr, src) |
39709 | flag_V = 0; |
39710 | flag_C = src >> 7; |
39711 | res = (src << 1) | (src >> 15); |
39712 | flag_N = res >> 8; |
39713 | flag_NotZ = res & 0x0000FFFF; |
39714 | WRITE_WORD_F(adr, res) |
39715 | POST_IO |
39716 | RET(12) |
39717 | } |
39718 | |
39719 | // ROL |
39720 | OPCODE(0xE7E0) |
39721 | { |
39722 | u32 adr, res; |
39723 | u32 src, dst; |
39724 | |
39725 | adr = AREG((Opcode >> 0) & 7) - 2; |
39726 | AREG((Opcode >> 0) & 7) = adr; |
39727 | PRE_IO |
39728 | READ_WORD_F(adr, src) |
39729 | flag_V = 0; |
39730 | flag_C = src >> 7; |
39731 | res = (src << 1) | (src >> 15); |
39732 | flag_N = res >> 8; |
39733 | flag_NotZ = res & 0x0000FFFF; |
39734 | WRITE_WORD_F(adr, res) |
39735 | POST_IO |
39736 | RET(14) |
39737 | } |
39738 | |
39739 | // ROL |
39740 | OPCODE(0xE7E8) |
39741 | { |
39742 | u32 adr, res; |
39743 | u32 src, dst; |
39744 | |
39745 | FETCH_SWORD(adr); |
39746 | adr += AREG((Opcode >> 0) & 7); |
39747 | PRE_IO |
39748 | READ_WORD_F(adr, src) |
39749 | flag_V = 0; |
39750 | flag_C = src >> 7; |
39751 | res = (src << 1) | (src >> 15); |
39752 | flag_N = res >> 8; |
39753 | flag_NotZ = res & 0x0000FFFF; |
39754 | WRITE_WORD_F(adr, res) |
39755 | POST_IO |
39756 | RET(16) |
39757 | } |
39758 | |
39759 | // ROL |
39760 | OPCODE(0xE7F0) |
39761 | { |
39762 | u32 adr, res; |
39763 | u32 src, dst; |
39764 | |
39765 | adr = AREG((Opcode >> 0) & 7); |
39766 | DECODE_EXT_WORD |
39767 | PRE_IO |
39768 | READ_WORD_F(adr, src) |
39769 | flag_V = 0; |
39770 | flag_C = src >> 7; |
39771 | res = (src << 1) | (src >> 15); |
39772 | flag_N = res >> 8; |
39773 | flag_NotZ = res & 0x0000FFFF; |
39774 | WRITE_WORD_F(adr, res) |
39775 | POST_IO |
39776 | RET(18) |
39777 | } |
39778 | |
39779 | // ROL |
39780 | OPCODE(0xE7F8) |
39781 | { |
39782 | u32 adr, res; |
39783 | u32 src, dst; |
39784 | |
39785 | FETCH_SWORD(adr); |
39786 | PRE_IO |
39787 | READ_WORD_F(adr, src) |
39788 | flag_V = 0; |
39789 | flag_C = src >> 7; |
39790 | res = (src << 1) | (src >> 15); |
39791 | flag_N = res >> 8; |
39792 | flag_NotZ = res & 0x0000FFFF; |
39793 | WRITE_WORD_F(adr, res) |
39794 | POST_IO |
39795 | RET(16) |
39796 | } |
39797 | |
39798 | // ROL |
39799 | OPCODE(0xE7F9) |
39800 | { |
39801 | u32 adr, res; |
39802 | u32 src, dst; |
39803 | |
39804 | FETCH_LONG(adr); |
39805 | PRE_IO |
39806 | READ_WORD_F(adr, src) |
39807 | flag_V = 0; |
39808 | flag_C = src >> 7; |
39809 | res = (src << 1) | (src >> 15); |
39810 | flag_N = res >> 8; |
39811 | flag_NotZ = res & 0x0000FFFF; |
39812 | WRITE_WORD_F(adr, res) |
39813 | POST_IO |
39814 | RET(20) |
39815 | } |
39816 | |
39817 | // ROL |
39818 | OPCODE(0xE7DF) |
39819 | { |
39820 | u32 adr, res; |
39821 | u32 src, dst; |
39822 | |
39823 | adr = AREG(7); |
39824 | AREG(7) += 2; |
39825 | PRE_IO |
39826 | READ_WORD_F(adr, src) |
39827 | flag_V = 0; |
39828 | flag_C = src >> 7; |
39829 | res = (src << 1) | (src >> 15); |
39830 | flag_N = res >> 8; |
39831 | flag_NotZ = res & 0x0000FFFF; |
39832 | WRITE_WORD_F(adr, res) |
39833 | POST_IO |
39834 | RET(12) |
39835 | } |
39836 | |
39837 | // ROL |
39838 | OPCODE(0xE7E7) |
39839 | { |
39840 | u32 adr, res; |
39841 | u32 src, dst; |
39842 | |
39843 | adr = AREG(7) - 2; |
39844 | AREG(7) = adr; |
39845 | PRE_IO |
39846 | READ_WORD_F(adr, src) |
39847 | flag_V = 0; |
39848 | flag_C = src >> 7; |
39849 | res = (src << 1) | (src >> 15); |
39850 | flag_N = res >> 8; |
39851 | flag_NotZ = res & 0x0000FFFF; |
39852 | WRITE_WORD_F(adr, res) |
39853 | POST_IO |
39854 | RET(14) |
39855 | } |
39856 | |