70357ce5 |
1 | |
2 | // ORI |
3 | OPCODE(0x0000) |
4 | { |
5 | u32 adr, res; |
6 | u32 src, dst; |
7 | |
8 | FETCH_BYTE(src); |
9 | res = DREGu8((Opcode >> 0) & 7); |
10 | res |= src; |
11 | flag_C = 0; |
12 | flag_V = 0; |
13 | flag_NotZ = res; |
14 | flag_N = res; |
15 | DREGu8((Opcode >> 0) & 7) = res; |
16 | RET(8) |
17 | } |
18 | |
19 | // ORI |
20 | OPCODE(0x0010) |
21 | { |
22 | u32 adr, res; |
23 | u32 src, dst; |
24 | |
25 | FETCH_BYTE(src); |
26 | adr = AREG((Opcode >> 0) & 7); |
27 | PRE_IO |
28 | READ_BYTE_F(adr, res) |
29 | res |= src; |
30 | flag_C = 0; |
31 | flag_V = 0; |
32 | flag_NotZ = res; |
33 | flag_N = res; |
34 | WRITE_BYTE_F(adr, res) |
35 | POST_IO |
36 | RET(16) |
37 | } |
38 | |
39 | // ORI |
40 | OPCODE(0x0018) |
41 | { |
42 | u32 adr, res; |
43 | u32 src, dst; |
44 | |
45 | FETCH_BYTE(src); |
46 | adr = AREG((Opcode >> 0) & 7); |
47 | AREG((Opcode >> 0) & 7) += 1; |
48 | PRE_IO |
49 | READ_BYTE_F(adr, res) |
50 | res |= src; |
51 | flag_C = 0; |
52 | flag_V = 0; |
53 | flag_NotZ = res; |
54 | flag_N = res; |
55 | WRITE_BYTE_F(adr, res) |
56 | POST_IO |
57 | RET(16) |
58 | } |
59 | |
60 | // ORI |
61 | OPCODE(0x0020) |
62 | { |
63 | u32 adr, res; |
64 | u32 src, dst; |
65 | |
66 | FETCH_BYTE(src); |
67 | adr = AREG((Opcode >> 0) & 7) - 1; |
68 | AREG((Opcode >> 0) & 7) = adr; |
69 | PRE_IO |
70 | READ_BYTE_F(adr, res) |
71 | res |= src; |
72 | flag_C = 0; |
73 | flag_V = 0; |
74 | flag_NotZ = res; |
75 | flag_N = res; |
76 | WRITE_BYTE_F(adr, res) |
77 | POST_IO |
78 | RET(18) |
79 | } |
80 | |
81 | // ORI |
82 | OPCODE(0x0028) |
83 | { |
84 | u32 adr, res; |
85 | u32 src, dst; |
86 | |
87 | FETCH_BYTE(src); |
88 | FETCH_SWORD(adr); |
89 | adr += AREG((Opcode >> 0) & 7); |
90 | PRE_IO |
91 | READ_BYTE_F(adr, res) |
92 | res |= src; |
93 | flag_C = 0; |
94 | flag_V = 0; |
95 | flag_NotZ = res; |
96 | flag_N = res; |
97 | WRITE_BYTE_F(adr, res) |
98 | POST_IO |
99 | RET(20) |
100 | } |
101 | |
102 | // ORI |
103 | OPCODE(0x0030) |
104 | { |
105 | u32 adr, res; |
106 | u32 src, dst; |
107 | |
108 | FETCH_BYTE(src); |
109 | adr = AREG((Opcode >> 0) & 7); |
110 | DECODE_EXT_WORD |
111 | PRE_IO |
112 | READ_BYTE_F(adr, res) |
113 | res |= src; |
114 | flag_C = 0; |
115 | flag_V = 0; |
116 | flag_NotZ = res; |
117 | flag_N = res; |
118 | WRITE_BYTE_F(adr, res) |
119 | POST_IO |
120 | RET(22) |
121 | } |
122 | |
123 | // ORI |
124 | OPCODE(0x0038) |
125 | { |
126 | u32 adr, res; |
127 | u32 src, dst; |
128 | |
129 | FETCH_BYTE(src); |
130 | FETCH_SWORD(adr); |
131 | PRE_IO |
132 | READ_BYTE_F(adr, res) |
133 | res |= src; |
134 | flag_C = 0; |
135 | flag_V = 0; |
136 | flag_NotZ = res; |
137 | flag_N = res; |
138 | WRITE_BYTE_F(adr, res) |
139 | POST_IO |
140 | RET(20) |
141 | } |
142 | |
143 | // ORI |
144 | OPCODE(0x0039) |
145 | { |
146 | u32 adr, res; |
147 | u32 src, dst; |
148 | |
149 | FETCH_BYTE(src); |
150 | FETCH_LONG(adr); |
151 | PRE_IO |
152 | READ_BYTE_F(adr, res) |
153 | res |= src; |
154 | flag_C = 0; |
155 | flag_V = 0; |
156 | flag_NotZ = res; |
157 | flag_N = res; |
158 | WRITE_BYTE_F(adr, res) |
159 | POST_IO |
160 | RET(24) |
161 | } |
162 | |
163 | // ORI |
164 | OPCODE(0x001F) |
165 | { |
166 | u32 adr, res; |
167 | u32 src, dst; |
168 | |
169 | FETCH_BYTE(src); |
170 | adr = AREG(7); |
171 | AREG(7) += 2; |
172 | PRE_IO |
173 | READ_BYTE_F(adr, res) |
174 | res |= src; |
175 | flag_C = 0; |
176 | flag_V = 0; |
177 | flag_NotZ = res; |
178 | flag_N = res; |
179 | WRITE_BYTE_F(adr, res) |
180 | POST_IO |
181 | RET(16) |
182 | } |
183 | |
184 | // ORI |
185 | OPCODE(0x0027) |
186 | { |
187 | u32 adr, res; |
188 | u32 src, dst; |
189 | |
190 | FETCH_BYTE(src); |
191 | adr = AREG(7) - 2; |
192 | AREG(7) = adr; |
193 | PRE_IO |
194 | READ_BYTE_F(adr, res) |
195 | res |= src; |
196 | flag_C = 0; |
197 | flag_V = 0; |
198 | flag_NotZ = res; |
199 | flag_N = res; |
200 | WRITE_BYTE_F(adr, res) |
201 | POST_IO |
202 | RET(18) |
203 | } |
204 | |
205 | // ORI |
206 | OPCODE(0x0040) |
207 | { |
208 | u32 adr, res; |
209 | u32 src, dst; |
210 | |
211 | FETCH_WORD(src); |
212 | res = DREGu16((Opcode >> 0) & 7); |
213 | res |= src; |
214 | flag_C = 0; |
215 | flag_V = 0; |
216 | flag_NotZ = res; |
217 | flag_N = res >> 8; |
218 | DREGu16((Opcode >> 0) & 7) = res; |
219 | RET(8) |
220 | } |
221 | |
222 | // ORI |
223 | OPCODE(0x0050) |
224 | { |
225 | u32 adr, res; |
226 | u32 src, dst; |
227 | |
228 | FETCH_WORD(src); |
229 | adr = AREG((Opcode >> 0) & 7); |
230 | PRE_IO |
231 | READ_WORD_F(adr, res) |
232 | res |= src; |
233 | flag_C = 0; |
234 | flag_V = 0; |
235 | flag_NotZ = res; |
236 | flag_N = res >> 8; |
237 | WRITE_WORD_F(adr, res) |
238 | POST_IO |
239 | RET(16) |
240 | } |
241 | |
242 | // ORI |
243 | OPCODE(0x0058) |
244 | { |
245 | u32 adr, res; |
246 | u32 src, dst; |
247 | |
248 | FETCH_WORD(src); |
249 | adr = AREG((Opcode >> 0) & 7); |
250 | AREG((Opcode >> 0) & 7) += 2; |
251 | PRE_IO |
252 | READ_WORD_F(adr, res) |
253 | res |= src; |
254 | flag_C = 0; |
255 | flag_V = 0; |
256 | flag_NotZ = res; |
257 | flag_N = res >> 8; |
258 | WRITE_WORD_F(adr, res) |
259 | POST_IO |
260 | RET(16) |
261 | } |
262 | |
263 | // ORI |
264 | OPCODE(0x0060) |
265 | { |
266 | u32 adr, res; |
267 | u32 src, dst; |
268 | |
269 | FETCH_WORD(src); |
270 | adr = AREG((Opcode >> 0) & 7) - 2; |
271 | AREG((Opcode >> 0) & 7) = adr; |
272 | PRE_IO |
273 | READ_WORD_F(adr, res) |
274 | res |= src; |
275 | flag_C = 0; |
276 | flag_V = 0; |
277 | flag_NotZ = res; |
278 | flag_N = res >> 8; |
279 | WRITE_WORD_F(adr, res) |
280 | POST_IO |
281 | RET(18) |
282 | } |
283 | |
284 | // ORI |
285 | OPCODE(0x0068) |
286 | { |
287 | u32 adr, res; |
288 | u32 src, dst; |
289 | |
290 | FETCH_WORD(src); |
291 | FETCH_SWORD(adr); |
292 | adr += AREG((Opcode >> 0) & 7); |
293 | PRE_IO |
294 | READ_WORD_F(adr, res) |
295 | res |= src; |
296 | flag_C = 0; |
297 | flag_V = 0; |
298 | flag_NotZ = res; |
299 | flag_N = res >> 8; |
300 | WRITE_WORD_F(adr, res) |
301 | POST_IO |
302 | RET(20) |
303 | } |
304 | |
305 | // ORI |
306 | OPCODE(0x0070) |
307 | { |
308 | u32 adr, res; |
309 | u32 src, dst; |
310 | |
311 | FETCH_WORD(src); |
312 | adr = AREG((Opcode >> 0) & 7); |
313 | DECODE_EXT_WORD |
314 | PRE_IO |
315 | READ_WORD_F(adr, res) |
316 | res |= src; |
317 | flag_C = 0; |
318 | flag_V = 0; |
319 | flag_NotZ = res; |
320 | flag_N = res >> 8; |
321 | WRITE_WORD_F(adr, res) |
322 | POST_IO |
323 | RET(22) |
324 | } |
325 | |
326 | // ORI |
327 | OPCODE(0x0078) |
328 | { |
329 | u32 adr, res; |
330 | u32 src, dst; |
331 | |
332 | FETCH_WORD(src); |
333 | FETCH_SWORD(adr); |
334 | PRE_IO |
335 | READ_WORD_F(adr, res) |
336 | res |= src; |
337 | flag_C = 0; |
338 | flag_V = 0; |
339 | flag_NotZ = res; |
340 | flag_N = res >> 8; |
341 | WRITE_WORD_F(adr, res) |
342 | POST_IO |
343 | RET(20) |
344 | } |
345 | |
346 | // ORI |
347 | OPCODE(0x0079) |
348 | { |
349 | u32 adr, res; |
350 | u32 src, dst; |
351 | |
352 | FETCH_WORD(src); |
353 | FETCH_LONG(adr); |
354 | PRE_IO |
355 | READ_WORD_F(adr, res) |
356 | res |= src; |
357 | flag_C = 0; |
358 | flag_V = 0; |
359 | flag_NotZ = res; |
360 | flag_N = res >> 8; |
361 | WRITE_WORD_F(adr, res) |
362 | POST_IO |
363 | RET(24) |
364 | } |
365 | |
366 | // ORI |
367 | OPCODE(0x005F) |
368 | { |
369 | u32 adr, res; |
370 | u32 src, dst; |
371 | |
372 | FETCH_WORD(src); |
373 | adr = AREG(7); |
374 | AREG(7) += 2; |
375 | PRE_IO |
376 | READ_WORD_F(adr, res) |
377 | res |= src; |
378 | flag_C = 0; |
379 | flag_V = 0; |
380 | flag_NotZ = res; |
381 | flag_N = res >> 8; |
382 | WRITE_WORD_F(adr, res) |
383 | POST_IO |
384 | RET(16) |
385 | } |
386 | |
387 | // ORI |
388 | OPCODE(0x0067) |
389 | { |
390 | u32 adr, res; |
391 | u32 src, dst; |
392 | |
393 | FETCH_WORD(src); |
394 | adr = AREG(7) - 2; |
395 | AREG(7) = adr; |
396 | PRE_IO |
397 | READ_WORD_F(adr, res) |
398 | res |= src; |
399 | flag_C = 0; |
400 | flag_V = 0; |
401 | flag_NotZ = res; |
402 | flag_N = res >> 8; |
403 | WRITE_WORD_F(adr, res) |
404 | POST_IO |
405 | RET(18) |
406 | } |
407 | |
408 | // ORI |
409 | OPCODE(0x0080) |
410 | { |
411 | u32 adr, res; |
412 | u32 src, dst; |
413 | |
414 | FETCH_LONG(src); |
415 | res = DREGu32((Opcode >> 0) & 7); |
416 | res |= src; |
417 | flag_C = 0; |
418 | flag_V = 0; |
419 | flag_NotZ = res; |
420 | flag_N = res >> 24; |
421 | DREGu32((Opcode >> 0) & 7) = res; |
422 | RET(16) |
423 | } |
424 | |
425 | // ORI |
426 | OPCODE(0x0090) |
427 | { |
428 | u32 adr, res; |
429 | u32 src, dst; |
430 | |
431 | FETCH_LONG(src); |
432 | adr = AREG((Opcode >> 0) & 7); |
433 | PRE_IO |
434 | READ_LONG_F(adr, res) |
435 | res |= src; |
436 | flag_C = 0; |
437 | flag_V = 0; |
438 | flag_NotZ = res; |
439 | flag_N = res >> 24; |
440 | WRITE_LONG_F(adr, res) |
441 | POST_IO |
442 | RET(28) |
443 | } |
444 | |
445 | // ORI |
446 | OPCODE(0x0098) |
447 | { |
448 | u32 adr, res; |
449 | u32 src, dst; |
450 | |
451 | FETCH_LONG(src); |
452 | adr = AREG((Opcode >> 0) & 7); |
453 | AREG((Opcode >> 0) & 7) += 4; |
454 | PRE_IO |
455 | READ_LONG_F(adr, res) |
456 | res |= src; |
457 | flag_C = 0; |
458 | flag_V = 0; |
459 | flag_NotZ = res; |
460 | flag_N = res >> 24; |
461 | WRITE_LONG_F(adr, res) |
462 | POST_IO |
463 | RET(28) |
464 | } |
465 | |
466 | // ORI |
467 | OPCODE(0x00A0) |
468 | { |
469 | u32 adr, res; |
470 | u32 src, dst; |
471 | |
472 | FETCH_LONG(src); |
473 | adr = AREG((Opcode >> 0) & 7) - 4; |
474 | AREG((Opcode >> 0) & 7) = adr; |
475 | PRE_IO |
476 | READ_LONG_F(adr, res) |
477 | res |= src; |
478 | flag_C = 0; |
479 | flag_V = 0; |
480 | flag_NotZ = res; |
481 | flag_N = res >> 24; |
482 | WRITE_LONG_F(adr, res) |
483 | POST_IO |
484 | RET(30) |
485 | } |
486 | |
487 | // ORI |
488 | OPCODE(0x00A8) |
489 | { |
490 | u32 adr, res; |
491 | u32 src, dst; |
492 | |
493 | FETCH_LONG(src); |
494 | FETCH_SWORD(adr); |
495 | adr += AREG((Opcode >> 0) & 7); |
496 | PRE_IO |
497 | READ_LONG_F(adr, res) |
498 | res |= src; |
499 | flag_C = 0; |
500 | flag_V = 0; |
501 | flag_NotZ = res; |
502 | flag_N = res >> 24; |
503 | WRITE_LONG_F(adr, res) |
504 | POST_IO |
505 | RET(32) |
506 | } |
507 | |
508 | // ORI |
509 | OPCODE(0x00B0) |
510 | { |
511 | u32 adr, res; |
512 | u32 src, dst; |
513 | |
514 | FETCH_LONG(src); |
515 | adr = AREG((Opcode >> 0) & 7); |
516 | DECODE_EXT_WORD |
517 | PRE_IO |
518 | READ_LONG_F(adr, res) |
519 | res |= src; |
520 | flag_C = 0; |
521 | flag_V = 0; |
522 | flag_NotZ = res; |
523 | flag_N = res >> 24; |
524 | WRITE_LONG_F(adr, res) |
525 | POST_IO |
526 | RET(34) |
527 | } |
528 | |
529 | // ORI |
530 | OPCODE(0x00B8) |
531 | { |
532 | u32 adr, res; |
533 | u32 src, dst; |
534 | |
535 | FETCH_LONG(src); |
536 | FETCH_SWORD(adr); |
537 | PRE_IO |
538 | READ_LONG_F(adr, res) |
539 | res |= src; |
540 | flag_C = 0; |
541 | flag_V = 0; |
542 | flag_NotZ = res; |
543 | flag_N = res >> 24; |
544 | WRITE_LONG_F(adr, res) |
545 | POST_IO |
546 | RET(32) |
547 | } |
548 | |
549 | // ORI |
550 | OPCODE(0x00B9) |
551 | { |
552 | u32 adr, res; |
553 | u32 src, dst; |
554 | |
555 | FETCH_LONG(src); |
556 | FETCH_LONG(adr); |
557 | PRE_IO |
558 | READ_LONG_F(adr, res) |
559 | res |= src; |
560 | flag_C = 0; |
561 | flag_V = 0; |
562 | flag_NotZ = res; |
563 | flag_N = res >> 24; |
564 | WRITE_LONG_F(adr, res) |
565 | POST_IO |
566 | RET(36) |
567 | } |
568 | |
569 | // ORI |
570 | OPCODE(0x009F) |
571 | { |
572 | u32 adr, res; |
573 | u32 src, dst; |
574 | |
575 | FETCH_LONG(src); |
576 | adr = AREG(7); |
577 | AREG(7) += 4; |
578 | PRE_IO |
579 | READ_LONG_F(adr, res) |
580 | res |= src; |
581 | flag_C = 0; |
582 | flag_V = 0; |
583 | flag_NotZ = res; |
584 | flag_N = res >> 24; |
585 | WRITE_LONG_F(adr, res) |
586 | POST_IO |
587 | RET(28) |
588 | } |
589 | |
590 | // ORI |
591 | OPCODE(0x00A7) |
592 | { |
593 | u32 adr, res; |
594 | u32 src, dst; |
595 | |
596 | FETCH_LONG(src); |
597 | adr = AREG(7) - 4; |
598 | AREG(7) = adr; |
599 | PRE_IO |
600 | READ_LONG_F(adr, res) |
601 | res |= src; |
602 | flag_C = 0; |
603 | flag_V = 0; |
604 | flag_NotZ = res; |
605 | flag_N = res >> 24; |
606 | WRITE_LONG_F(adr, res) |
607 | POST_IO |
608 | RET(30) |
609 | } |
610 | |
611 | // ORICCR |
612 | OPCODE(0x003C) |
613 | { |
614 | u32 adr, res; |
615 | u32 src, dst; |
616 | |
617 | FETCH_BYTE(res); |
618 | res &= M68K_CCR_MASK; |
619 | res |= GET_CCR; |
620 | SET_CCR(res) |
621 | RET(20) |
622 | } |
623 | |
624 | // ORISR |
625 | OPCODE(0x007C) |
626 | { |
627 | u32 adr, res; |
628 | u32 src, dst; |
629 | |
630 | if (flag_S) |
631 | { |
632 | u32 res; |
633 | FETCH_WORD(res); |
634 | res &= M68K_SR_MASK; |
635 | res |= GET_SR; |
636 | SET_SR(res) |
637 | CHECK_INT_TO_JUMP(20) |
638 | } |
639 | else |
640 | { |
d0ae0cb4 |
641 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
642 | #ifdef USE_CYCLONE_TIMING |
643 | RET(0) |
644 | #else |
645 | RET(4) |
646 | #endif |
647 | } |
648 | RET(20) |
649 | } |
650 | |
651 | // ANDI |
652 | OPCODE(0x0200) |
653 | { |
654 | u32 adr, res; |
655 | u32 src, dst; |
656 | |
657 | FETCH_BYTE(src); |
658 | res = DREGu8((Opcode >> 0) & 7); |
659 | res &= src; |
660 | flag_C = 0; |
661 | flag_V = 0; |
662 | flag_NotZ = res; |
663 | flag_N = res; |
664 | DREGu8((Opcode >> 0) & 7) = res; |
665 | RET(8) |
666 | } |
667 | |
668 | // ANDI |
669 | OPCODE(0x0210) |
670 | { |
671 | u32 adr, res; |
672 | u32 src, dst; |
673 | |
674 | FETCH_BYTE(src); |
675 | adr = AREG((Opcode >> 0) & 7); |
676 | PRE_IO |
677 | READ_BYTE_F(adr, res) |
678 | res &= src; |
679 | flag_C = 0; |
680 | flag_V = 0; |
681 | flag_NotZ = res; |
682 | flag_N = res; |
683 | WRITE_BYTE_F(adr, res) |
684 | POST_IO |
685 | RET(16) |
686 | } |
687 | |
688 | // ANDI |
689 | OPCODE(0x0218) |
690 | { |
691 | u32 adr, res; |
692 | u32 src, dst; |
693 | |
694 | FETCH_BYTE(src); |
695 | adr = AREG((Opcode >> 0) & 7); |
696 | AREG((Opcode >> 0) & 7) += 1; |
697 | PRE_IO |
698 | READ_BYTE_F(adr, res) |
699 | res &= src; |
700 | flag_C = 0; |
701 | flag_V = 0; |
702 | flag_NotZ = res; |
703 | flag_N = res; |
704 | WRITE_BYTE_F(adr, res) |
705 | POST_IO |
706 | RET(16) |
707 | } |
708 | |
709 | // ANDI |
710 | OPCODE(0x0220) |
711 | { |
712 | u32 adr, res; |
713 | u32 src, dst; |
714 | |
715 | FETCH_BYTE(src); |
716 | adr = AREG((Opcode >> 0) & 7) - 1; |
717 | AREG((Opcode >> 0) & 7) = adr; |
718 | PRE_IO |
719 | READ_BYTE_F(adr, res) |
720 | res &= src; |
721 | flag_C = 0; |
722 | flag_V = 0; |
723 | flag_NotZ = res; |
724 | flag_N = res; |
725 | WRITE_BYTE_F(adr, res) |
726 | POST_IO |
727 | RET(18) |
728 | } |
729 | |
730 | // ANDI |
731 | OPCODE(0x0228) |
732 | { |
733 | u32 adr, res; |
734 | u32 src, dst; |
735 | |
736 | FETCH_BYTE(src); |
737 | FETCH_SWORD(adr); |
738 | adr += AREG((Opcode >> 0) & 7); |
739 | PRE_IO |
740 | READ_BYTE_F(adr, res) |
741 | res &= src; |
742 | flag_C = 0; |
743 | flag_V = 0; |
744 | flag_NotZ = res; |
745 | flag_N = res; |
746 | WRITE_BYTE_F(adr, res) |
747 | POST_IO |
748 | RET(20) |
749 | } |
750 | |
751 | // ANDI |
752 | OPCODE(0x0230) |
753 | { |
754 | u32 adr, res; |
755 | u32 src, dst; |
756 | |
757 | FETCH_BYTE(src); |
758 | adr = AREG((Opcode >> 0) & 7); |
759 | DECODE_EXT_WORD |
760 | PRE_IO |
761 | READ_BYTE_F(adr, res) |
762 | res &= src; |
763 | flag_C = 0; |
764 | flag_V = 0; |
765 | flag_NotZ = res; |
766 | flag_N = res; |
767 | WRITE_BYTE_F(adr, res) |
768 | POST_IO |
769 | RET(22) |
770 | } |
771 | |
772 | // ANDI |
773 | OPCODE(0x0238) |
774 | { |
775 | u32 adr, res; |
776 | u32 src, dst; |
777 | |
778 | FETCH_BYTE(src); |
779 | FETCH_SWORD(adr); |
780 | PRE_IO |
781 | READ_BYTE_F(adr, res) |
782 | res &= src; |
783 | flag_C = 0; |
784 | flag_V = 0; |
785 | flag_NotZ = res; |
786 | flag_N = res; |
787 | WRITE_BYTE_F(adr, res) |
788 | POST_IO |
789 | RET(20) |
790 | } |
791 | |
792 | // ANDI |
793 | OPCODE(0x0239) |
794 | { |
795 | u32 adr, res; |
796 | u32 src, dst; |
797 | |
798 | FETCH_BYTE(src); |
799 | FETCH_LONG(adr); |
800 | PRE_IO |
801 | READ_BYTE_F(adr, res) |
802 | res &= src; |
803 | flag_C = 0; |
804 | flag_V = 0; |
805 | flag_NotZ = res; |
806 | flag_N = res; |
807 | WRITE_BYTE_F(adr, res) |
808 | POST_IO |
809 | RET(24) |
810 | } |
811 | |
812 | // ANDI |
813 | OPCODE(0x021F) |
814 | { |
815 | u32 adr, res; |
816 | u32 src, dst; |
817 | |
818 | FETCH_BYTE(src); |
819 | adr = AREG(7); |
820 | AREG(7) += 2; |
821 | PRE_IO |
822 | READ_BYTE_F(adr, res) |
823 | res &= src; |
824 | flag_C = 0; |
825 | flag_V = 0; |
826 | flag_NotZ = res; |
827 | flag_N = res; |
828 | WRITE_BYTE_F(adr, res) |
829 | POST_IO |
830 | RET(16) |
831 | } |
832 | |
833 | // ANDI |
834 | OPCODE(0x0227) |
835 | { |
836 | u32 adr, res; |
837 | u32 src, dst; |
838 | |
839 | FETCH_BYTE(src); |
840 | adr = AREG(7) - 2; |
841 | AREG(7) = adr; |
842 | PRE_IO |
843 | READ_BYTE_F(adr, res) |
844 | res &= src; |
845 | flag_C = 0; |
846 | flag_V = 0; |
847 | flag_NotZ = res; |
848 | flag_N = res; |
849 | WRITE_BYTE_F(adr, res) |
850 | POST_IO |
851 | RET(18) |
852 | } |
853 | |
854 | // ANDI |
855 | OPCODE(0x0240) |
856 | { |
857 | u32 adr, res; |
858 | u32 src, dst; |
859 | |
860 | FETCH_WORD(src); |
861 | res = DREGu16((Opcode >> 0) & 7); |
862 | res &= src; |
863 | flag_C = 0; |
864 | flag_V = 0; |
865 | flag_NotZ = res; |
866 | flag_N = res >> 8; |
867 | DREGu16((Opcode >> 0) & 7) = res; |
868 | RET(8) |
869 | } |
870 | |
871 | // ANDI |
872 | OPCODE(0x0250) |
873 | { |
874 | u32 adr, res; |
875 | u32 src, dst; |
876 | |
877 | FETCH_WORD(src); |
878 | adr = AREG((Opcode >> 0) & 7); |
879 | PRE_IO |
880 | READ_WORD_F(adr, res) |
881 | res &= src; |
882 | flag_C = 0; |
883 | flag_V = 0; |
884 | flag_NotZ = res; |
885 | flag_N = res >> 8; |
886 | WRITE_WORD_F(adr, res) |
887 | POST_IO |
888 | RET(16) |
889 | } |
890 | |
891 | // ANDI |
892 | OPCODE(0x0258) |
893 | { |
894 | u32 adr, res; |
895 | u32 src, dst; |
896 | |
897 | FETCH_WORD(src); |
898 | adr = AREG((Opcode >> 0) & 7); |
899 | AREG((Opcode >> 0) & 7) += 2; |
900 | PRE_IO |
901 | READ_WORD_F(adr, res) |
902 | res &= src; |
903 | flag_C = 0; |
904 | flag_V = 0; |
905 | flag_NotZ = res; |
906 | flag_N = res >> 8; |
907 | WRITE_WORD_F(adr, res) |
908 | POST_IO |
909 | RET(16) |
910 | } |
911 | |
912 | // ANDI |
913 | OPCODE(0x0260) |
914 | { |
915 | u32 adr, res; |
916 | u32 src, dst; |
917 | |
918 | FETCH_WORD(src); |
919 | adr = AREG((Opcode >> 0) & 7) - 2; |
920 | AREG((Opcode >> 0) & 7) = adr; |
921 | PRE_IO |
922 | READ_WORD_F(adr, res) |
923 | res &= src; |
924 | flag_C = 0; |
925 | flag_V = 0; |
926 | flag_NotZ = res; |
927 | flag_N = res >> 8; |
928 | WRITE_WORD_F(adr, res) |
929 | POST_IO |
930 | RET(18) |
931 | } |
932 | |
933 | // ANDI |
934 | OPCODE(0x0268) |
935 | { |
936 | u32 adr, res; |
937 | u32 src, dst; |
938 | |
939 | FETCH_WORD(src); |
940 | FETCH_SWORD(adr); |
941 | adr += AREG((Opcode >> 0) & 7); |
942 | PRE_IO |
943 | READ_WORD_F(adr, res) |
944 | res &= src; |
945 | flag_C = 0; |
946 | flag_V = 0; |
947 | flag_NotZ = res; |
948 | flag_N = res >> 8; |
949 | WRITE_WORD_F(adr, res) |
950 | POST_IO |
951 | RET(20) |
952 | } |
953 | |
954 | // ANDI |
955 | OPCODE(0x0270) |
956 | { |
957 | u32 adr, res; |
958 | u32 src, dst; |
959 | |
960 | FETCH_WORD(src); |
961 | adr = AREG((Opcode >> 0) & 7); |
962 | DECODE_EXT_WORD |
963 | PRE_IO |
964 | READ_WORD_F(adr, res) |
965 | res &= src; |
966 | flag_C = 0; |
967 | flag_V = 0; |
968 | flag_NotZ = res; |
969 | flag_N = res >> 8; |
970 | WRITE_WORD_F(adr, res) |
971 | POST_IO |
972 | RET(22) |
973 | } |
974 | |
975 | // ANDI |
976 | OPCODE(0x0278) |
977 | { |
978 | u32 adr, res; |
979 | u32 src, dst; |
980 | |
981 | FETCH_WORD(src); |
982 | FETCH_SWORD(adr); |
983 | PRE_IO |
984 | READ_WORD_F(adr, res) |
985 | res &= src; |
986 | flag_C = 0; |
987 | flag_V = 0; |
988 | flag_NotZ = res; |
989 | flag_N = res >> 8; |
990 | WRITE_WORD_F(adr, res) |
991 | POST_IO |
992 | RET(20) |
993 | } |
994 | |
995 | // ANDI |
996 | OPCODE(0x0279) |
997 | { |
998 | u32 adr, res; |
999 | u32 src, dst; |
1000 | |
1001 | FETCH_WORD(src); |
1002 | FETCH_LONG(adr); |
1003 | PRE_IO |
1004 | READ_WORD_F(adr, res) |
1005 | res &= src; |
1006 | flag_C = 0; |
1007 | flag_V = 0; |
1008 | flag_NotZ = res; |
1009 | flag_N = res >> 8; |
1010 | WRITE_WORD_F(adr, res) |
1011 | POST_IO |
1012 | RET(24) |
1013 | } |
1014 | |
1015 | // ANDI |
1016 | OPCODE(0x025F) |
1017 | { |
1018 | u32 adr, res; |
1019 | u32 src, dst; |
1020 | |
1021 | FETCH_WORD(src); |
1022 | adr = AREG(7); |
1023 | AREG(7) += 2; |
1024 | PRE_IO |
1025 | READ_WORD_F(adr, res) |
1026 | res &= src; |
1027 | flag_C = 0; |
1028 | flag_V = 0; |
1029 | flag_NotZ = res; |
1030 | flag_N = res >> 8; |
1031 | WRITE_WORD_F(adr, res) |
1032 | POST_IO |
1033 | RET(16) |
1034 | } |
1035 | |
1036 | // ANDI |
1037 | OPCODE(0x0267) |
1038 | { |
1039 | u32 adr, res; |
1040 | u32 src, dst; |
1041 | |
1042 | FETCH_WORD(src); |
1043 | adr = AREG(7) - 2; |
1044 | AREG(7) = adr; |
1045 | PRE_IO |
1046 | READ_WORD_F(adr, res) |
1047 | res &= src; |
1048 | flag_C = 0; |
1049 | flag_V = 0; |
1050 | flag_NotZ = res; |
1051 | flag_N = res >> 8; |
1052 | WRITE_WORD_F(adr, res) |
1053 | POST_IO |
1054 | RET(18) |
1055 | } |
1056 | |
1057 | // ANDI |
1058 | OPCODE(0x0280) |
1059 | { |
1060 | u32 adr, res; |
1061 | u32 src, dst; |
1062 | |
1063 | FETCH_LONG(src); |
1064 | res = DREGu32((Opcode >> 0) & 7); |
1065 | res &= src; |
1066 | flag_C = 0; |
1067 | flag_V = 0; |
1068 | flag_NotZ = res; |
1069 | flag_N = res >> 24; |
1070 | DREGu32((Opcode >> 0) & 7) = res; |
1071 | #ifdef USE_CYCLONE_TIMING |
1072 | RET(14) |
1073 | #else |
1074 | RET(16) |
1075 | #endif |
1076 | } |
1077 | |
1078 | // ANDI |
1079 | OPCODE(0x0290) |
1080 | { |
1081 | u32 adr, res; |
1082 | u32 src, dst; |
1083 | |
1084 | FETCH_LONG(src); |
1085 | adr = AREG((Opcode >> 0) & 7); |
1086 | PRE_IO |
1087 | READ_LONG_F(adr, res) |
1088 | res &= src; |
1089 | flag_C = 0; |
1090 | flag_V = 0; |
1091 | flag_NotZ = res; |
1092 | flag_N = res >> 24; |
1093 | WRITE_LONG_F(adr, res) |
1094 | POST_IO |
1095 | RET(28) |
1096 | } |
1097 | |
1098 | // ANDI |
1099 | OPCODE(0x0298) |
1100 | { |
1101 | u32 adr, res; |
1102 | u32 src, dst; |
1103 | |
1104 | FETCH_LONG(src); |
1105 | adr = AREG((Opcode >> 0) & 7); |
1106 | AREG((Opcode >> 0) & 7) += 4; |
1107 | PRE_IO |
1108 | READ_LONG_F(adr, res) |
1109 | res &= src; |
1110 | flag_C = 0; |
1111 | flag_V = 0; |
1112 | flag_NotZ = res; |
1113 | flag_N = res >> 24; |
1114 | WRITE_LONG_F(adr, res) |
1115 | POST_IO |
1116 | RET(28) |
1117 | } |
1118 | |
1119 | // ANDI |
1120 | OPCODE(0x02A0) |
1121 | { |
1122 | u32 adr, res; |
1123 | u32 src, dst; |
1124 | |
1125 | FETCH_LONG(src); |
1126 | adr = AREG((Opcode >> 0) & 7) - 4; |
1127 | AREG((Opcode >> 0) & 7) = adr; |
1128 | PRE_IO |
1129 | READ_LONG_F(adr, res) |
1130 | res &= src; |
1131 | flag_C = 0; |
1132 | flag_V = 0; |
1133 | flag_NotZ = res; |
1134 | flag_N = res >> 24; |
1135 | WRITE_LONG_F(adr, res) |
1136 | POST_IO |
1137 | RET(30) |
1138 | } |
1139 | |
1140 | // ANDI |
1141 | OPCODE(0x02A8) |
1142 | { |
1143 | u32 adr, res; |
1144 | u32 src, dst; |
1145 | |
1146 | FETCH_LONG(src); |
1147 | FETCH_SWORD(adr); |
1148 | adr += AREG((Opcode >> 0) & 7); |
1149 | PRE_IO |
1150 | READ_LONG_F(adr, res) |
1151 | res &= src; |
1152 | flag_C = 0; |
1153 | flag_V = 0; |
1154 | flag_NotZ = res; |
1155 | flag_N = res >> 24; |
1156 | WRITE_LONG_F(adr, res) |
1157 | POST_IO |
1158 | RET(32) |
1159 | } |
1160 | |
1161 | // ANDI |
1162 | OPCODE(0x02B0) |
1163 | { |
1164 | u32 adr, res; |
1165 | u32 src, dst; |
1166 | |
1167 | FETCH_LONG(src); |
1168 | adr = AREG((Opcode >> 0) & 7); |
1169 | DECODE_EXT_WORD |
1170 | PRE_IO |
1171 | READ_LONG_F(adr, res) |
1172 | res &= src; |
1173 | flag_C = 0; |
1174 | flag_V = 0; |
1175 | flag_NotZ = res; |
1176 | flag_N = res >> 24; |
1177 | WRITE_LONG_F(adr, res) |
1178 | POST_IO |
1179 | RET(34) |
1180 | } |
1181 | |
1182 | // ANDI |
1183 | OPCODE(0x02B8) |
1184 | { |
1185 | u32 adr, res; |
1186 | u32 src, dst; |
1187 | |
1188 | FETCH_LONG(src); |
1189 | FETCH_SWORD(adr); |
1190 | PRE_IO |
1191 | READ_LONG_F(adr, res) |
1192 | res &= src; |
1193 | flag_C = 0; |
1194 | flag_V = 0; |
1195 | flag_NotZ = res; |
1196 | flag_N = res >> 24; |
1197 | WRITE_LONG_F(adr, res) |
1198 | POST_IO |
1199 | RET(32) |
1200 | } |
1201 | |
1202 | // ANDI |
1203 | OPCODE(0x02B9) |
1204 | { |
1205 | u32 adr, res; |
1206 | u32 src, dst; |
1207 | |
1208 | FETCH_LONG(src); |
1209 | FETCH_LONG(adr); |
1210 | PRE_IO |
1211 | READ_LONG_F(adr, res) |
1212 | res &= src; |
1213 | flag_C = 0; |
1214 | flag_V = 0; |
1215 | flag_NotZ = res; |
1216 | flag_N = res >> 24; |
1217 | WRITE_LONG_F(adr, res) |
1218 | POST_IO |
1219 | RET(36) |
1220 | } |
1221 | |
1222 | // ANDI |
1223 | OPCODE(0x029F) |
1224 | { |
1225 | u32 adr, res; |
1226 | u32 src, dst; |
1227 | |
1228 | FETCH_LONG(src); |
1229 | adr = AREG(7); |
1230 | AREG(7) += 4; |
1231 | PRE_IO |
1232 | READ_LONG_F(adr, res) |
1233 | res &= src; |
1234 | flag_C = 0; |
1235 | flag_V = 0; |
1236 | flag_NotZ = res; |
1237 | flag_N = res >> 24; |
1238 | WRITE_LONG_F(adr, res) |
1239 | POST_IO |
1240 | RET(28) |
1241 | } |
1242 | |
1243 | // ANDI |
1244 | OPCODE(0x02A7) |
1245 | { |
1246 | u32 adr, res; |
1247 | u32 src, dst; |
1248 | |
1249 | FETCH_LONG(src); |
1250 | adr = AREG(7) - 4; |
1251 | AREG(7) = adr; |
1252 | PRE_IO |
1253 | READ_LONG_F(adr, res) |
1254 | res &= src; |
1255 | flag_C = 0; |
1256 | flag_V = 0; |
1257 | flag_NotZ = res; |
1258 | flag_N = res >> 24; |
1259 | WRITE_LONG_F(adr, res) |
1260 | POST_IO |
1261 | RET(30) |
1262 | } |
1263 | |
1264 | // ANDICCR |
1265 | OPCODE(0x023C) |
1266 | { |
1267 | u32 adr, res; |
1268 | u32 src, dst; |
1269 | |
1270 | FETCH_BYTE(res); |
1271 | res &= M68K_CCR_MASK; |
1272 | res &= GET_CCR; |
1273 | SET_CCR(res) |
1274 | RET(20) |
1275 | } |
1276 | |
1277 | // ANDISR |
1278 | OPCODE(0x027C) |
1279 | { |
1280 | u32 adr, res; |
1281 | u32 src, dst; |
1282 | |
1283 | if (flag_S) |
1284 | { |
1285 | FETCH_WORD(res); |
1286 | res &= M68K_SR_MASK; |
1287 | res &= GET_SR; |
1288 | SET_SR(res) |
1289 | if (!flag_S) |
1290 | { |
1291 | res = AREG(7); |
1292 | AREG(7) = ASP; |
1293 | ASP = res; |
1294 | } |
1295 | CHECK_INT_TO_JUMP(20) |
1296 | } |
1297 | else |
1298 | { |
d0ae0cb4 |
1299 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
1300 | RET(4) |
1301 | } |
1302 | RET(20) |
1303 | } |
1304 | |
1305 | // EORI |
1306 | OPCODE(0x0A00) |
1307 | { |
1308 | u32 adr, res; |
1309 | u32 src, dst; |
1310 | |
1311 | FETCH_BYTE(src); |
1312 | res = DREGu8((Opcode >> 0) & 7); |
1313 | res ^= src; |
1314 | flag_C = 0; |
1315 | flag_V = 0; |
1316 | flag_NotZ = res; |
1317 | flag_N = res; |
1318 | DREGu8((Opcode >> 0) & 7) = res; |
1319 | RET(8) |
1320 | } |
1321 | |
1322 | // EORI |
1323 | OPCODE(0x0A10) |
1324 | { |
1325 | u32 adr, res; |
1326 | u32 src, dst; |
1327 | |
1328 | FETCH_BYTE(src); |
1329 | adr = AREG((Opcode >> 0) & 7); |
1330 | PRE_IO |
1331 | READ_BYTE_F(adr, res) |
1332 | res ^= src; |
1333 | flag_C = 0; |
1334 | flag_V = 0; |
1335 | flag_NotZ = res; |
1336 | flag_N = res; |
1337 | WRITE_BYTE_F(adr, res) |
1338 | POST_IO |
1339 | RET(16) |
1340 | } |
1341 | |
1342 | // EORI |
1343 | OPCODE(0x0A18) |
1344 | { |
1345 | u32 adr, res; |
1346 | u32 src, dst; |
1347 | |
1348 | FETCH_BYTE(src); |
1349 | adr = AREG((Opcode >> 0) & 7); |
1350 | AREG((Opcode >> 0) & 7) += 1; |
1351 | PRE_IO |
1352 | READ_BYTE_F(adr, res) |
1353 | res ^= src; |
1354 | flag_C = 0; |
1355 | flag_V = 0; |
1356 | flag_NotZ = res; |
1357 | flag_N = res; |
1358 | WRITE_BYTE_F(adr, res) |
1359 | POST_IO |
1360 | RET(16) |
1361 | } |
1362 | |
1363 | // EORI |
1364 | OPCODE(0x0A20) |
1365 | { |
1366 | u32 adr, res; |
1367 | u32 src, dst; |
1368 | |
1369 | FETCH_BYTE(src); |
1370 | adr = AREG((Opcode >> 0) & 7) - 1; |
1371 | AREG((Opcode >> 0) & 7) = adr; |
1372 | PRE_IO |
1373 | READ_BYTE_F(adr, res) |
1374 | res ^= src; |
1375 | flag_C = 0; |
1376 | flag_V = 0; |
1377 | flag_NotZ = res; |
1378 | flag_N = res; |
1379 | WRITE_BYTE_F(adr, res) |
1380 | POST_IO |
1381 | RET(18) |
1382 | } |
1383 | |
1384 | // EORI |
1385 | OPCODE(0x0A28) |
1386 | { |
1387 | u32 adr, res; |
1388 | u32 src, dst; |
1389 | |
1390 | FETCH_BYTE(src); |
1391 | FETCH_SWORD(adr); |
1392 | adr += AREG((Opcode >> 0) & 7); |
1393 | PRE_IO |
1394 | READ_BYTE_F(adr, res) |
1395 | res ^= src; |
1396 | flag_C = 0; |
1397 | flag_V = 0; |
1398 | flag_NotZ = res; |
1399 | flag_N = res; |
1400 | WRITE_BYTE_F(adr, res) |
1401 | POST_IO |
1402 | RET(20) |
1403 | } |
1404 | |
1405 | // EORI |
1406 | OPCODE(0x0A30) |
1407 | { |
1408 | u32 adr, res; |
1409 | u32 src, dst; |
1410 | |
1411 | FETCH_BYTE(src); |
1412 | adr = AREG((Opcode >> 0) & 7); |
1413 | DECODE_EXT_WORD |
1414 | PRE_IO |
1415 | READ_BYTE_F(adr, res) |
1416 | res ^= src; |
1417 | flag_C = 0; |
1418 | flag_V = 0; |
1419 | flag_NotZ = res; |
1420 | flag_N = res; |
1421 | WRITE_BYTE_F(adr, res) |
1422 | POST_IO |
1423 | RET(22) |
1424 | } |
1425 | |
1426 | // EORI |
1427 | OPCODE(0x0A38) |
1428 | { |
1429 | u32 adr, res; |
1430 | u32 src, dst; |
1431 | |
1432 | FETCH_BYTE(src); |
1433 | FETCH_SWORD(adr); |
1434 | PRE_IO |
1435 | READ_BYTE_F(adr, res) |
1436 | res ^= src; |
1437 | flag_C = 0; |
1438 | flag_V = 0; |
1439 | flag_NotZ = res; |
1440 | flag_N = res; |
1441 | WRITE_BYTE_F(adr, res) |
1442 | POST_IO |
1443 | RET(20) |
1444 | } |
1445 | |
1446 | // EORI |
1447 | OPCODE(0x0A39) |
1448 | { |
1449 | u32 adr, res; |
1450 | u32 src, dst; |
1451 | |
1452 | FETCH_BYTE(src); |
1453 | FETCH_LONG(adr); |
1454 | PRE_IO |
1455 | READ_BYTE_F(adr, res) |
1456 | res ^= src; |
1457 | flag_C = 0; |
1458 | flag_V = 0; |
1459 | flag_NotZ = res; |
1460 | flag_N = res; |
1461 | WRITE_BYTE_F(adr, res) |
1462 | POST_IO |
1463 | RET(24) |
1464 | } |
1465 | |
1466 | // EORI |
1467 | OPCODE(0x0A1F) |
1468 | { |
1469 | u32 adr, res; |
1470 | u32 src, dst; |
1471 | |
1472 | FETCH_BYTE(src); |
1473 | adr = AREG(7); |
1474 | AREG(7) += 2; |
1475 | PRE_IO |
1476 | READ_BYTE_F(adr, res) |
1477 | res ^= src; |
1478 | flag_C = 0; |
1479 | flag_V = 0; |
1480 | flag_NotZ = res; |
1481 | flag_N = res; |
1482 | WRITE_BYTE_F(adr, res) |
1483 | POST_IO |
1484 | RET(16) |
1485 | } |
1486 | |
1487 | // EORI |
1488 | OPCODE(0x0A27) |
1489 | { |
1490 | u32 adr, res; |
1491 | u32 src, dst; |
1492 | |
1493 | FETCH_BYTE(src); |
1494 | adr = AREG(7) - 2; |
1495 | AREG(7) = adr; |
1496 | PRE_IO |
1497 | READ_BYTE_F(adr, res) |
1498 | res ^= src; |
1499 | flag_C = 0; |
1500 | flag_V = 0; |
1501 | flag_NotZ = res; |
1502 | flag_N = res; |
1503 | WRITE_BYTE_F(adr, res) |
1504 | POST_IO |
1505 | RET(18) |
1506 | } |
1507 | |
1508 | // EORI |
1509 | OPCODE(0x0A40) |
1510 | { |
1511 | u32 adr, res; |
1512 | u32 src, dst; |
1513 | |
1514 | FETCH_WORD(src); |
1515 | res = DREGu16((Opcode >> 0) & 7); |
1516 | res ^= src; |
1517 | flag_C = 0; |
1518 | flag_V = 0; |
1519 | flag_NotZ = res; |
1520 | flag_N = res >> 8; |
1521 | DREGu16((Opcode >> 0) & 7) = res; |
1522 | RET(8) |
1523 | } |
1524 | |
1525 | // EORI |
1526 | OPCODE(0x0A50) |
1527 | { |
1528 | u32 adr, res; |
1529 | u32 src, dst; |
1530 | |
1531 | FETCH_WORD(src); |
1532 | adr = AREG((Opcode >> 0) & 7); |
1533 | PRE_IO |
1534 | READ_WORD_F(adr, res) |
1535 | res ^= src; |
1536 | flag_C = 0; |
1537 | flag_V = 0; |
1538 | flag_NotZ = res; |
1539 | flag_N = res >> 8; |
1540 | WRITE_WORD_F(adr, res) |
1541 | POST_IO |
1542 | RET(16) |
1543 | } |
1544 | |
1545 | // EORI |
1546 | OPCODE(0x0A58) |
1547 | { |
1548 | u32 adr, res; |
1549 | u32 src, dst; |
1550 | |
1551 | FETCH_WORD(src); |
1552 | adr = AREG((Opcode >> 0) & 7); |
1553 | AREG((Opcode >> 0) & 7) += 2; |
1554 | PRE_IO |
1555 | READ_WORD_F(adr, res) |
1556 | res ^= src; |
1557 | flag_C = 0; |
1558 | flag_V = 0; |
1559 | flag_NotZ = res; |
1560 | flag_N = res >> 8; |
1561 | WRITE_WORD_F(adr, res) |
1562 | POST_IO |
1563 | RET(16) |
1564 | } |
1565 | |
1566 | // EORI |
1567 | OPCODE(0x0A60) |
1568 | { |
1569 | u32 adr, res; |
1570 | u32 src, dst; |
1571 | |
1572 | FETCH_WORD(src); |
1573 | adr = AREG((Opcode >> 0) & 7) - 2; |
1574 | AREG((Opcode >> 0) & 7) = adr; |
1575 | PRE_IO |
1576 | READ_WORD_F(adr, res) |
1577 | res ^= src; |
1578 | flag_C = 0; |
1579 | flag_V = 0; |
1580 | flag_NotZ = res; |
1581 | flag_N = res >> 8; |
1582 | WRITE_WORD_F(adr, res) |
1583 | POST_IO |
1584 | RET(18) |
1585 | } |
1586 | |
1587 | // EORI |
1588 | OPCODE(0x0A68) |
1589 | { |
1590 | u32 adr, res; |
1591 | u32 src, dst; |
1592 | |
1593 | FETCH_WORD(src); |
1594 | FETCH_SWORD(adr); |
1595 | adr += AREG((Opcode >> 0) & 7); |
1596 | PRE_IO |
1597 | READ_WORD_F(adr, res) |
1598 | res ^= src; |
1599 | flag_C = 0; |
1600 | flag_V = 0; |
1601 | flag_NotZ = res; |
1602 | flag_N = res >> 8; |
1603 | WRITE_WORD_F(adr, res) |
1604 | POST_IO |
1605 | RET(20) |
1606 | } |
1607 | |
1608 | // EORI |
1609 | OPCODE(0x0A70) |
1610 | { |
1611 | u32 adr, res; |
1612 | u32 src, dst; |
1613 | |
1614 | FETCH_WORD(src); |
1615 | adr = AREG((Opcode >> 0) & 7); |
1616 | DECODE_EXT_WORD |
1617 | PRE_IO |
1618 | READ_WORD_F(adr, res) |
1619 | res ^= src; |
1620 | flag_C = 0; |
1621 | flag_V = 0; |
1622 | flag_NotZ = res; |
1623 | flag_N = res >> 8; |
1624 | WRITE_WORD_F(adr, res) |
1625 | POST_IO |
1626 | RET(22) |
1627 | } |
1628 | |
1629 | // EORI |
1630 | OPCODE(0x0A78) |
1631 | { |
1632 | u32 adr, res; |
1633 | u32 src, dst; |
1634 | |
1635 | FETCH_WORD(src); |
1636 | FETCH_SWORD(adr); |
1637 | PRE_IO |
1638 | READ_WORD_F(adr, res) |
1639 | res ^= src; |
1640 | flag_C = 0; |
1641 | flag_V = 0; |
1642 | flag_NotZ = res; |
1643 | flag_N = res >> 8; |
1644 | WRITE_WORD_F(adr, res) |
1645 | POST_IO |
1646 | RET(20) |
1647 | } |
1648 | |
1649 | // EORI |
1650 | OPCODE(0x0A79) |
1651 | { |
1652 | u32 adr, res; |
1653 | u32 src, dst; |
1654 | |
1655 | FETCH_WORD(src); |
1656 | FETCH_LONG(adr); |
1657 | PRE_IO |
1658 | READ_WORD_F(adr, res) |
1659 | res ^= src; |
1660 | flag_C = 0; |
1661 | flag_V = 0; |
1662 | flag_NotZ = res; |
1663 | flag_N = res >> 8; |
1664 | WRITE_WORD_F(adr, res) |
1665 | POST_IO |
1666 | RET(24) |
1667 | } |
1668 | |
1669 | // EORI |
1670 | OPCODE(0x0A5F) |
1671 | { |
1672 | u32 adr, res; |
1673 | u32 src, dst; |
1674 | |
1675 | FETCH_WORD(src); |
1676 | adr = AREG(7); |
1677 | AREG(7) += 2; |
1678 | PRE_IO |
1679 | READ_WORD_F(adr, res) |
1680 | res ^= src; |
1681 | flag_C = 0; |
1682 | flag_V = 0; |
1683 | flag_NotZ = res; |
1684 | flag_N = res >> 8; |
1685 | WRITE_WORD_F(adr, res) |
1686 | POST_IO |
1687 | RET(16) |
1688 | } |
1689 | |
1690 | // EORI |
1691 | OPCODE(0x0A67) |
1692 | { |
1693 | u32 adr, res; |
1694 | u32 src, dst; |
1695 | |
1696 | FETCH_WORD(src); |
1697 | adr = AREG(7) - 2; |
1698 | AREG(7) = adr; |
1699 | PRE_IO |
1700 | READ_WORD_F(adr, res) |
1701 | res ^= src; |
1702 | flag_C = 0; |
1703 | flag_V = 0; |
1704 | flag_NotZ = res; |
1705 | flag_N = res >> 8; |
1706 | WRITE_WORD_F(adr, res) |
1707 | POST_IO |
1708 | RET(18) |
1709 | } |
1710 | |
1711 | // EORI |
1712 | OPCODE(0x0A80) |
1713 | { |
1714 | u32 adr, res; |
1715 | u32 src, dst; |
1716 | |
1717 | FETCH_LONG(src); |
1718 | res = DREGu32((Opcode >> 0) & 7); |
1719 | res ^= src; |
1720 | flag_C = 0; |
1721 | flag_V = 0; |
1722 | flag_NotZ = res; |
1723 | flag_N = res >> 24; |
1724 | DREGu32((Opcode >> 0) & 7) = res; |
1725 | RET(16) |
1726 | } |
1727 | |
1728 | // EORI |
1729 | OPCODE(0x0A90) |
1730 | { |
1731 | u32 adr, res; |
1732 | u32 src, dst; |
1733 | |
1734 | FETCH_LONG(src); |
1735 | adr = AREG((Opcode >> 0) & 7); |
1736 | PRE_IO |
1737 | READ_LONG_F(adr, res) |
1738 | res ^= src; |
1739 | flag_C = 0; |
1740 | flag_V = 0; |
1741 | flag_NotZ = res; |
1742 | flag_N = res >> 24; |
1743 | WRITE_LONG_F(adr, res) |
1744 | POST_IO |
1745 | RET(28) |
1746 | } |
1747 | |
1748 | // EORI |
1749 | OPCODE(0x0A98) |
1750 | { |
1751 | u32 adr, res; |
1752 | u32 src, dst; |
1753 | |
1754 | FETCH_LONG(src); |
1755 | adr = AREG((Opcode >> 0) & 7); |
1756 | AREG((Opcode >> 0) & 7) += 4; |
1757 | PRE_IO |
1758 | READ_LONG_F(adr, res) |
1759 | res ^= src; |
1760 | flag_C = 0; |
1761 | flag_V = 0; |
1762 | flag_NotZ = res; |
1763 | flag_N = res >> 24; |
1764 | WRITE_LONG_F(adr, res) |
1765 | POST_IO |
1766 | RET(28) |
1767 | } |
1768 | |
1769 | // EORI |
1770 | OPCODE(0x0AA0) |
1771 | { |
1772 | u32 adr, res; |
1773 | u32 src, dst; |
1774 | |
1775 | FETCH_LONG(src); |
1776 | adr = AREG((Opcode >> 0) & 7) - 4; |
1777 | AREG((Opcode >> 0) & 7) = adr; |
1778 | PRE_IO |
1779 | READ_LONG_F(adr, res) |
1780 | res ^= src; |
1781 | flag_C = 0; |
1782 | flag_V = 0; |
1783 | flag_NotZ = res; |
1784 | flag_N = res >> 24; |
1785 | WRITE_LONG_F(adr, res) |
1786 | POST_IO |
1787 | RET(30) |
1788 | } |
1789 | |
1790 | // EORI |
1791 | OPCODE(0x0AA8) |
1792 | { |
1793 | u32 adr, res; |
1794 | u32 src, dst; |
1795 | |
1796 | FETCH_LONG(src); |
1797 | FETCH_SWORD(adr); |
1798 | adr += AREG((Opcode >> 0) & 7); |
1799 | PRE_IO |
1800 | READ_LONG_F(adr, res) |
1801 | res ^= src; |
1802 | flag_C = 0; |
1803 | flag_V = 0; |
1804 | flag_NotZ = res; |
1805 | flag_N = res >> 24; |
1806 | WRITE_LONG_F(adr, res) |
1807 | POST_IO |
1808 | RET(32) |
1809 | } |
1810 | |
1811 | // EORI |
1812 | OPCODE(0x0AB0) |
1813 | { |
1814 | u32 adr, res; |
1815 | u32 src, dst; |
1816 | |
1817 | FETCH_LONG(src); |
1818 | adr = AREG((Opcode >> 0) & 7); |
1819 | DECODE_EXT_WORD |
1820 | PRE_IO |
1821 | READ_LONG_F(adr, res) |
1822 | res ^= src; |
1823 | flag_C = 0; |
1824 | flag_V = 0; |
1825 | flag_NotZ = res; |
1826 | flag_N = res >> 24; |
1827 | WRITE_LONG_F(adr, res) |
1828 | POST_IO |
1829 | RET(34) |
1830 | } |
1831 | |
1832 | // EORI |
1833 | OPCODE(0x0AB8) |
1834 | { |
1835 | u32 adr, res; |
1836 | u32 src, dst; |
1837 | |
1838 | FETCH_LONG(src); |
1839 | FETCH_SWORD(adr); |
1840 | PRE_IO |
1841 | READ_LONG_F(adr, res) |
1842 | res ^= src; |
1843 | flag_C = 0; |
1844 | flag_V = 0; |
1845 | flag_NotZ = res; |
1846 | flag_N = res >> 24; |
1847 | WRITE_LONG_F(adr, res) |
1848 | POST_IO |
1849 | RET(32) |
1850 | } |
1851 | |
1852 | // EORI |
1853 | OPCODE(0x0AB9) |
1854 | { |
1855 | u32 adr, res; |
1856 | u32 src, dst; |
1857 | |
1858 | FETCH_LONG(src); |
1859 | FETCH_LONG(adr); |
1860 | PRE_IO |
1861 | READ_LONG_F(adr, res) |
1862 | res ^= src; |
1863 | flag_C = 0; |
1864 | flag_V = 0; |
1865 | flag_NotZ = res; |
1866 | flag_N = res >> 24; |
1867 | WRITE_LONG_F(adr, res) |
1868 | POST_IO |
1869 | RET(36) |
1870 | } |
1871 | |
1872 | // EORI |
1873 | OPCODE(0x0A9F) |
1874 | { |
1875 | u32 adr, res; |
1876 | u32 src, dst; |
1877 | |
1878 | FETCH_LONG(src); |
1879 | adr = AREG(7); |
1880 | AREG(7) += 4; |
1881 | PRE_IO |
1882 | READ_LONG_F(adr, res) |
1883 | res ^= src; |
1884 | flag_C = 0; |
1885 | flag_V = 0; |
1886 | flag_NotZ = res; |
1887 | flag_N = res >> 24; |
1888 | WRITE_LONG_F(adr, res) |
1889 | POST_IO |
1890 | RET(28) |
1891 | } |
1892 | |
1893 | // EORI |
1894 | OPCODE(0x0AA7) |
1895 | { |
1896 | u32 adr, res; |
1897 | u32 src, dst; |
1898 | |
1899 | FETCH_LONG(src); |
1900 | adr = AREG(7) - 4; |
1901 | AREG(7) = adr; |
1902 | PRE_IO |
1903 | READ_LONG_F(adr, res) |
1904 | res ^= src; |
1905 | flag_C = 0; |
1906 | flag_V = 0; |
1907 | flag_NotZ = res; |
1908 | flag_N = res >> 24; |
1909 | WRITE_LONG_F(adr, res) |
1910 | POST_IO |
1911 | RET(30) |
1912 | } |
1913 | |
1914 | // EORICCR |
1915 | OPCODE(0x0A3C) |
1916 | { |
1917 | u32 adr, res; |
1918 | u32 src, dst; |
1919 | |
1920 | FETCH_BYTE(res); |
1921 | res &= M68K_CCR_MASK; |
1922 | res ^= GET_CCR; |
1923 | SET_CCR(res) |
1924 | RET(20) |
1925 | } |
1926 | |
1927 | // EORISR |
1928 | OPCODE(0x0A7C) |
1929 | { |
1930 | u32 adr, res; |
1931 | u32 src, dst; |
1932 | |
1933 | if (flag_S) |
1934 | { |
1935 | FETCH_WORD(res); |
1936 | res &= M68K_SR_MASK; |
1937 | res ^= GET_SR; |
1938 | SET_SR(res) |
1939 | if (!flag_S) |
1940 | { |
1941 | res = AREG(7); |
1942 | AREG(7) = ASP; |
1943 | ASP = res; |
1944 | } |
1945 | CHECK_INT_TO_JUMP(20) |
1946 | } |
1947 | else |
1948 | { |
d0ae0cb4 |
1949 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
1950 | RET(0) |
70357ce5 |
1951 | } |
1952 | RET(20) |
1953 | } |
1954 | |
1955 | // SUBI |
1956 | OPCODE(0x0400) |
1957 | { |
1958 | u32 adr, res; |
1959 | u32 src, dst; |
1960 | |
1961 | FETCH_BYTE(src); |
1962 | dst = DREGu8((Opcode >> 0) & 7); |
1963 | res = dst - src; |
1964 | flag_N = flag_X = flag_C = res; |
1965 | flag_V = (src ^ dst) & (res ^ dst); |
1966 | flag_NotZ = res & 0xFF; |
1967 | DREGu8((Opcode >> 0) & 7) = res; |
1968 | RET(8) |
1969 | } |
1970 | |
1971 | // SUBI |
1972 | OPCODE(0x0410) |
1973 | { |
1974 | u32 adr, res; |
1975 | u32 src, dst; |
1976 | |
1977 | FETCH_BYTE(src); |
1978 | adr = AREG((Opcode >> 0) & 7); |
1979 | PRE_IO |
1980 | READ_BYTE_F(adr, dst) |
1981 | res = dst - src; |
1982 | flag_N = flag_X = flag_C = res; |
1983 | flag_V = (src ^ dst) & (res ^ dst); |
1984 | flag_NotZ = res & 0xFF; |
1985 | WRITE_BYTE_F(adr, res) |
1986 | POST_IO |
1987 | RET(16) |
1988 | } |
1989 | |
1990 | // SUBI |
1991 | OPCODE(0x0418) |
1992 | { |
1993 | u32 adr, res; |
1994 | u32 src, dst; |
1995 | |
1996 | FETCH_BYTE(src); |
1997 | adr = AREG((Opcode >> 0) & 7); |
1998 | AREG((Opcode >> 0) & 7) += 1; |
1999 | PRE_IO |
2000 | READ_BYTE_F(adr, dst) |
2001 | res = dst - src; |
2002 | flag_N = flag_X = flag_C = res; |
2003 | flag_V = (src ^ dst) & (res ^ dst); |
2004 | flag_NotZ = res & 0xFF; |
2005 | WRITE_BYTE_F(adr, res) |
2006 | POST_IO |
2007 | RET(16) |
2008 | } |
2009 | |
2010 | // SUBI |
2011 | OPCODE(0x0420) |
2012 | { |
2013 | u32 adr, res; |
2014 | u32 src, dst; |
2015 | |
2016 | FETCH_BYTE(src); |
2017 | adr = AREG((Opcode >> 0) & 7) - 1; |
2018 | AREG((Opcode >> 0) & 7) = adr; |
2019 | PRE_IO |
2020 | READ_BYTE_F(adr, dst) |
2021 | res = dst - src; |
2022 | flag_N = flag_X = flag_C = res; |
2023 | flag_V = (src ^ dst) & (res ^ dst); |
2024 | flag_NotZ = res & 0xFF; |
2025 | WRITE_BYTE_F(adr, res) |
2026 | POST_IO |
2027 | RET(18) |
2028 | } |
2029 | |
2030 | // SUBI |
2031 | OPCODE(0x0428) |
2032 | { |
2033 | u32 adr, res; |
2034 | u32 src, dst; |
2035 | |
2036 | FETCH_BYTE(src); |
2037 | FETCH_SWORD(adr); |
2038 | adr += AREG((Opcode >> 0) & 7); |
2039 | PRE_IO |
2040 | READ_BYTE_F(adr, dst) |
2041 | res = dst - src; |
2042 | flag_N = flag_X = flag_C = res; |
2043 | flag_V = (src ^ dst) & (res ^ dst); |
2044 | flag_NotZ = res & 0xFF; |
2045 | WRITE_BYTE_F(adr, res) |
2046 | POST_IO |
2047 | RET(20) |
2048 | } |
2049 | |
2050 | // SUBI |
2051 | OPCODE(0x0430) |
2052 | { |
2053 | u32 adr, res; |
2054 | u32 src, dst; |
2055 | |
2056 | FETCH_BYTE(src); |
2057 | adr = AREG((Opcode >> 0) & 7); |
2058 | DECODE_EXT_WORD |
2059 | PRE_IO |
2060 | READ_BYTE_F(adr, dst) |
2061 | res = dst - src; |
2062 | flag_N = flag_X = flag_C = res; |
2063 | flag_V = (src ^ dst) & (res ^ dst); |
2064 | flag_NotZ = res & 0xFF; |
2065 | WRITE_BYTE_F(adr, res) |
2066 | POST_IO |
2067 | RET(22) |
2068 | } |
2069 | |
2070 | // SUBI |
2071 | OPCODE(0x0438) |
2072 | { |
2073 | u32 adr, res; |
2074 | u32 src, dst; |
2075 | |
2076 | FETCH_BYTE(src); |
2077 | FETCH_SWORD(adr); |
2078 | PRE_IO |
2079 | READ_BYTE_F(adr, dst) |
2080 | res = dst - src; |
2081 | flag_N = flag_X = flag_C = res; |
2082 | flag_V = (src ^ dst) & (res ^ dst); |
2083 | flag_NotZ = res & 0xFF; |
2084 | WRITE_BYTE_F(adr, res) |
2085 | POST_IO |
2086 | RET(20) |
2087 | } |
2088 | |
2089 | // SUBI |
2090 | OPCODE(0x0439) |
2091 | { |
2092 | u32 adr, res; |
2093 | u32 src, dst; |
2094 | |
2095 | FETCH_BYTE(src); |
2096 | FETCH_LONG(adr); |
2097 | PRE_IO |
2098 | READ_BYTE_F(adr, dst) |
2099 | res = dst - src; |
2100 | flag_N = flag_X = flag_C = res; |
2101 | flag_V = (src ^ dst) & (res ^ dst); |
2102 | flag_NotZ = res & 0xFF; |
2103 | WRITE_BYTE_F(adr, res) |
2104 | POST_IO |
2105 | RET(24) |
2106 | } |
2107 | |
2108 | // SUBI |
2109 | OPCODE(0x041F) |
2110 | { |
2111 | u32 adr, res; |
2112 | u32 src, dst; |
2113 | |
2114 | FETCH_BYTE(src); |
2115 | adr = AREG(7); |
2116 | AREG(7) += 2; |
2117 | PRE_IO |
2118 | READ_BYTE_F(adr, dst) |
2119 | res = dst - src; |
2120 | flag_N = flag_X = flag_C = res; |
2121 | flag_V = (src ^ dst) & (res ^ dst); |
2122 | flag_NotZ = res & 0xFF; |
2123 | WRITE_BYTE_F(adr, res) |
2124 | POST_IO |
2125 | RET(16) |
2126 | } |
2127 | |
2128 | // SUBI |
2129 | OPCODE(0x0427) |
2130 | { |
2131 | u32 adr, res; |
2132 | u32 src, dst; |
2133 | |
2134 | FETCH_BYTE(src); |
2135 | adr = AREG(7) - 2; |
2136 | AREG(7) = adr; |
2137 | PRE_IO |
2138 | READ_BYTE_F(adr, dst) |
2139 | res = dst - src; |
2140 | flag_N = flag_X = flag_C = res; |
2141 | flag_V = (src ^ dst) & (res ^ dst); |
2142 | flag_NotZ = res & 0xFF; |
2143 | WRITE_BYTE_F(adr, res) |
2144 | POST_IO |
2145 | RET(18) |
2146 | } |
2147 | |
2148 | // SUBI |
2149 | OPCODE(0x0440) |
2150 | { |
2151 | u32 adr, res; |
2152 | u32 src, dst; |
2153 | |
2154 | FETCH_WORD(src); |
2155 | dst = DREGu16((Opcode >> 0) & 7); |
2156 | res = dst - src; |
2157 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2158 | flag_N = flag_X = flag_C = res >> 8; |
2159 | flag_NotZ = res & 0xFFFF; |
2160 | DREGu16((Opcode >> 0) & 7) = res; |
2161 | RET(8) |
2162 | } |
2163 | |
2164 | // SUBI |
2165 | OPCODE(0x0450) |
2166 | { |
2167 | u32 adr, res; |
2168 | u32 src, dst; |
2169 | |
2170 | FETCH_WORD(src); |
2171 | adr = AREG((Opcode >> 0) & 7); |
2172 | PRE_IO |
2173 | READ_WORD_F(adr, dst) |
2174 | res = dst - src; |
2175 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2176 | flag_N = flag_X = flag_C = res >> 8; |
2177 | flag_NotZ = res & 0xFFFF; |
2178 | WRITE_WORD_F(adr, res) |
2179 | POST_IO |
2180 | RET(16) |
2181 | } |
2182 | |
2183 | // SUBI |
2184 | OPCODE(0x0458) |
2185 | { |
2186 | u32 adr, res; |
2187 | u32 src, dst; |
2188 | |
2189 | FETCH_WORD(src); |
2190 | adr = AREG((Opcode >> 0) & 7); |
2191 | AREG((Opcode >> 0) & 7) += 2; |
2192 | PRE_IO |
2193 | READ_WORD_F(adr, dst) |
2194 | res = dst - src; |
2195 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2196 | flag_N = flag_X = flag_C = res >> 8; |
2197 | flag_NotZ = res & 0xFFFF; |
2198 | WRITE_WORD_F(adr, res) |
2199 | POST_IO |
2200 | RET(16) |
2201 | } |
2202 | |
2203 | // SUBI |
2204 | OPCODE(0x0460) |
2205 | { |
2206 | u32 adr, res; |
2207 | u32 src, dst; |
2208 | |
2209 | FETCH_WORD(src); |
2210 | adr = AREG((Opcode >> 0) & 7) - 2; |
2211 | AREG((Opcode >> 0) & 7) = adr; |
2212 | PRE_IO |
2213 | READ_WORD_F(adr, dst) |
2214 | res = dst - src; |
2215 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2216 | flag_N = flag_X = flag_C = res >> 8; |
2217 | flag_NotZ = res & 0xFFFF; |
2218 | WRITE_WORD_F(adr, res) |
2219 | POST_IO |
2220 | RET(18) |
2221 | } |
2222 | |
2223 | // SUBI |
2224 | OPCODE(0x0468) |
2225 | { |
2226 | u32 adr, res; |
2227 | u32 src, dst; |
2228 | |
2229 | FETCH_WORD(src); |
2230 | FETCH_SWORD(adr); |
2231 | adr += AREG((Opcode >> 0) & 7); |
2232 | PRE_IO |
2233 | READ_WORD_F(adr, dst) |
2234 | res = dst - src; |
2235 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2236 | flag_N = flag_X = flag_C = res >> 8; |
2237 | flag_NotZ = res & 0xFFFF; |
2238 | WRITE_WORD_F(adr, res) |
2239 | POST_IO |
2240 | RET(20) |
2241 | } |
2242 | |
2243 | // SUBI |
2244 | OPCODE(0x0470) |
2245 | { |
2246 | u32 adr, res; |
2247 | u32 src, dst; |
2248 | |
2249 | FETCH_WORD(src); |
2250 | adr = AREG((Opcode >> 0) & 7); |
2251 | DECODE_EXT_WORD |
2252 | PRE_IO |
2253 | READ_WORD_F(adr, dst) |
2254 | res = dst - src; |
2255 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2256 | flag_N = flag_X = flag_C = res >> 8; |
2257 | flag_NotZ = res & 0xFFFF; |
2258 | WRITE_WORD_F(adr, res) |
2259 | POST_IO |
2260 | RET(22) |
2261 | } |
2262 | |
2263 | // SUBI |
2264 | OPCODE(0x0478) |
2265 | { |
2266 | u32 adr, res; |
2267 | u32 src, dst; |
2268 | |
2269 | FETCH_WORD(src); |
2270 | FETCH_SWORD(adr); |
2271 | PRE_IO |
2272 | READ_WORD_F(adr, dst) |
2273 | res = dst - src; |
2274 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2275 | flag_N = flag_X = flag_C = res >> 8; |
2276 | flag_NotZ = res & 0xFFFF; |
2277 | WRITE_WORD_F(adr, res) |
2278 | POST_IO |
2279 | RET(20) |
2280 | } |
2281 | |
2282 | // SUBI |
2283 | OPCODE(0x0479) |
2284 | { |
2285 | u32 adr, res; |
2286 | u32 src, dst; |
2287 | |
2288 | FETCH_WORD(src); |
2289 | FETCH_LONG(adr); |
2290 | PRE_IO |
2291 | READ_WORD_F(adr, dst) |
2292 | res = dst - src; |
2293 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2294 | flag_N = flag_X = flag_C = res >> 8; |
2295 | flag_NotZ = res & 0xFFFF; |
2296 | WRITE_WORD_F(adr, res) |
2297 | POST_IO |
2298 | RET(24) |
2299 | } |
2300 | |
2301 | // SUBI |
2302 | OPCODE(0x045F) |
2303 | { |
2304 | u32 adr, res; |
2305 | u32 src, dst; |
2306 | |
2307 | FETCH_WORD(src); |
2308 | adr = AREG(7); |
2309 | AREG(7) += 2; |
2310 | PRE_IO |
2311 | READ_WORD_F(adr, dst) |
2312 | res = dst - src; |
2313 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2314 | flag_N = flag_X = flag_C = res >> 8; |
2315 | flag_NotZ = res & 0xFFFF; |
2316 | WRITE_WORD_F(adr, res) |
2317 | POST_IO |
2318 | RET(16) |
2319 | } |
2320 | |
2321 | // SUBI |
2322 | OPCODE(0x0467) |
2323 | { |
2324 | u32 adr, res; |
2325 | u32 src, dst; |
2326 | |
2327 | FETCH_WORD(src); |
2328 | adr = AREG(7) - 2; |
2329 | AREG(7) = adr; |
2330 | PRE_IO |
2331 | READ_WORD_F(adr, dst) |
2332 | res = dst - src; |
2333 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2334 | flag_N = flag_X = flag_C = res >> 8; |
2335 | flag_NotZ = res & 0xFFFF; |
2336 | WRITE_WORD_F(adr, res) |
2337 | POST_IO |
2338 | RET(18) |
2339 | } |
2340 | |
2341 | // SUBI |
2342 | OPCODE(0x0480) |
2343 | { |
2344 | u32 adr, res; |
2345 | u32 src, dst; |
2346 | |
2347 | FETCH_LONG(src); |
2348 | dst = DREGu32((Opcode >> 0) & 7); |
2349 | res = dst - src; |
2350 | flag_NotZ = res; |
2351 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2352 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2353 | flag_N = res >> 24; |
2354 | DREGu32((Opcode >> 0) & 7) = res; |
2355 | RET(16) |
2356 | } |
2357 | |
2358 | // SUBI |
2359 | OPCODE(0x0490) |
2360 | { |
2361 | u32 adr, res; |
2362 | u32 src, dst; |
2363 | |
2364 | FETCH_LONG(src); |
2365 | adr = AREG((Opcode >> 0) & 7); |
2366 | PRE_IO |
2367 | READ_LONG_F(adr, dst) |
2368 | res = dst - src; |
2369 | flag_NotZ = res; |
2370 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2371 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2372 | flag_N = res >> 24; |
2373 | WRITE_LONG_F(adr, res) |
2374 | POST_IO |
2375 | RET(28) |
2376 | } |
2377 | |
2378 | // SUBI |
2379 | OPCODE(0x0498) |
2380 | { |
2381 | u32 adr, res; |
2382 | u32 src, dst; |
2383 | |
2384 | FETCH_LONG(src); |
2385 | adr = AREG((Opcode >> 0) & 7); |
2386 | AREG((Opcode >> 0) & 7) += 4; |
2387 | PRE_IO |
2388 | READ_LONG_F(adr, dst) |
2389 | res = dst - src; |
2390 | flag_NotZ = res; |
2391 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2392 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2393 | flag_N = res >> 24; |
2394 | WRITE_LONG_F(adr, res) |
2395 | POST_IO |
2396 | RET(28) |
2397 | } |
2398 | |
2399 | // SUBI |
2400 | OPCODE(0x04A0) |
2401 | { |
2402 | u32 adr, res; |
2403 | u32 src, dst; |
2404 | |
2405 | FETCH_LONG(src); |
2406 | adr = AREG((Opcode >> 0) & 7) - 4; |
2407 | AREG((Opcode >> 0) & 7) = adr; |
2408 | PRE_IO |
2409 | READ_LONG_F(adr, dst) |
2410 | res = dst - src; |
2411 | flag_NotZ = res; |
2412 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2413 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2414 | flag_N = res >> 24; |
2415 | WRITE_LONG_F(adr, res) |
2416 | POST_IO |
2417 | RET(30) |
2418 | } |
2419 | |
2420 | // SUBI |
2421 | OPCODE(0x04A8) |
2422 | { |
2423 | u32 adr, res; |
2424 | u32 src, dst; |
2425 | |
2426 | FETCH_LONG(src); |
2427 | FETCH_SWORD(adr); |
2428 | adr += AREG((Opcode >> 0) & 7); |
2429 | PRE_IO |
2430 | READ_LONG_F(adr, dst) |
2431 | res = dst - src; |
2432 | flag_NotZ = res; |
2433 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2434 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2435 | flag_N = res >> 24; |
2436 | WRITE_LONG_F(adr, res) |
2437 | POST_IO |
2438 | RET(32) |
2439 | } |
2440 | |
2441 | // SUBI |
2442 | OPCODE(0x04B0) |
2443 | { |
2444 | u32 adr, res; |
2445 | u32 src, dst; |
2446 | |
2447 | FETCH_LONG(src); |
2448 | adr = AREG((Opcode >> 0) & 7); |
2449 | DECODE_EXT_WORD |
2450 | PRE_IO |
2451 | READ_LONG_F(adr, dst) |
2452 | res = dst - src; |
2453 | flag_NotZ = res; |
2454 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2455 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2456 | flag_N = res >> 24; |
2457 | WRITE_LONG_F(adr, res) |
2458 | POST_IO |
2459 | RET(34) |
2460 | } |
2461 | |
2462 | // SUBI |
2463 | OPCODE(0x04B8) |
2464 | { |
2465 | u32 adr, res; |
2466 | u32 src, dst; |
2467 | |
2468 | FETCH_LONG(src); |
2469 | FETCH_SWORD(adr); |
2470 | PRE_IO |
2471 | READ_LONG_F(adr, dst) |
2472 | res = dst - src; |
2473 | flag_NotZ = res; |
2474 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2475 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2476 | flag_N = res >> 24; |
2477 | WRITE_LONG_F(adr, res) |
2478 | POST_IO |
2479 | RET(32) |
2480 | } |
2481 | |
2482 | // SUBI |
2483 | OPCODE(0x04B9) |
2484 | { |
2485 | u32 adr, res; |
2486 | u32 src, dst; |
2487 | |
2488 | FETCH_LONG(src); |
2489 | FETCH_LONG(adr); |
2490 | PRE_IO |
2491 | READ_LONG_F(adr, dst) |
2492 | res = dst - src; |
2493 | flag_NotZ = res; |
2494 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2495 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2496 | flag_N = res >> 24; |
2497 | WRITE_LONG_F(adr, res) |
2498 | POST_IO |
2499 | RET(36) |
2500 | } |
2501 | |
2502 | // SUBI |
2503 | OPCODE(0x049F) |
2504 | { |
2505 | u32 adr, res; |
2506 | u32 src, dst; |
2507 | |
2508 | FETCH_LONG(src); |
2509 | adr = AREG(7); |
2510 | AREG(7) += 4; |
2511 | PRE_IO |
2512 | READ_LONG_F(adr, dst) |
2513 | res = dst - src; |
2514 | flag_NotZ = res; |
2515 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2516 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2517 | flag_N = res >> 24; |
2518 | WRITE_LONG_F(adr, res) |
2519 | POST_IO |
2520 | RET(28) |
2521 | } |
2522 | |
2523 | // SUBI |
2524 | OPCODE(0x04A7) |
2525 | { |
2526 | u32 adr, res; |
2527 | u32 src, dst; |
2528 | |
2529 | FETCH_LONG(src); |
2530 | adr = AREG(7) - 4; |
2531 | AREG(7) = adr; |
2532 | PRE_IO |
2533 | READ_LONG_F(adr, dst) |
2534 | res = dst - src; |
2535 | flag_NotZ = res; |
2536 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2537 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2538 | flag_N = res >> 24; |
2539 | WRITE_LONG_F(adr, res) |
2540 | POST_IO |
2541 | RET(30) |
2542 | } |
2543 | |
2544 | // ADDI |
2545 | OPCODE(0x0600) |
2546 | { |
2547 | u32 adr, res; |
2548 | u32 src, dst; |
2549 | |
2550 | FETCH_BYTE(src); |
2551 | dst = DREGu8((Opcode >> 0) & 7); |
2552 | res = dst + src; |
2553 | flag_N = flag_X = flag_C = res; |
2554 | flag_V = (src ^ res) & (dst ^ res); |
2555 | flag_NotZ = res & 0xFF; |
2556 | DREGu8((Opcode >> 0) & 7) = res; |
2557 | RET(8) |
2558 | } |
2559 | |
2560 | // ADDI |
2561 | OPCODE(0x0610) |
2562 | { |
2563 | u32 adr, res; |
2564 | u32 src, dst; |
2565 | |
2566 | FETCH_BYTE(src); |
2567 | adr = AREG((Opcode >> 0) & 7); |
2568 | PRE_IO |
2569 | READ_BYTE_F(adr, dst) |
2570 | res = dst + src; |
2571 | flag_N = flag_X = flag_C = res; |
2572 | flag_V = (src ^ res) & (dst ^ res); |
2573 | flag_NotZ = res & 0xFF; |
2574 | WRITE_BYTE_F(adr, res) |
2575 | POST_IO |
2576 | RET(16) |
2577 | } |
2578 | |
2579 | // ADDI |
2580 | OPCODE(0x0618) |
2581 | { |
2582 | u32 adr, res; |
2583 | u32 src, dst; |
2584 | |
2585 | FETCH_BYTE(src); |
2586 | adr = AREG((Opcode >> 0) & 7); |
2587 | AREG((Opcode >> 0) & 7) += 1; |
2588 | PRE_IO |
2589 | READ_BYTE_F(adr, dst) |
2590 | res = dst + src; |
2591 | flag_N = flag_X = flag_C = res; |
2592 | flag_V = (src ^ res) & (dst ^ res); |
2593 | flag_NotZ = res & 0xFF; |
2594 | WRITE_BYTE_F(adr, res) |
2595 | POST_IO |
2596 | RET(16) |
2597 | } |
2598 | |
2599 | // ADDI |
2600 | OPCODE(0x0620) |
2601 | { |
2602 | u32 adr, res; |
2603 | u32 src, dst; |
2604 | |
2605 | FETCH_BYTE(src); |
2606 | adr = AREG((Opcode >> 0) & 7) - 1; |
2607 | AREG((Opcode >> 0) & 7) = adr; |
2608 | PRE_IO |
2609 | READ_BYTE_F(adr, dst) |
2610 | res = dst + src; |
2611 | flag_N = flag_X = flag_C = res; |
2612 | flag_V = (src ^ res) & (dst ^ res); |
2613 | flag_NotZ = res & 0xFF; |
2614 | WRITE_BYTE_F(adr, res) |
2615 | POST_IO |
2616 | RET(18) |
2617 | } |
2618 | |
2619 | // ADDI |
2620 | OPCODE(0x0628) |
2621 | { |
2622 | u32 adr, res; |
2623 | u32 src, dst; |
2624 | |
2625 | FETCH_BYTE(src); |
2626 | FETCH_SWORD(adr); |
2627 | adr += AREG((Opcode >> 0) & 7); |
2628 | PRE_IO |
2629 | READ_BYTE_F(adr, dst) |
2630 | res = dst + src; |
2631 | flag_N = flag_X = flag_C = res; |
2632 | flag_V = (src ^ res) & (dst ^ res); |
2633 | flag_NotZ = res & 0xFF; |
2634 | WRITE_BYTE_F(adr, res) |
2635 | POST_IO |
2636 | RET(20) |
2637 | } |
2638 | |
2639 | // ADDI |
2640 | OPCODE(0x0630) |
2641 | { |
2642 | u32 adr, res; |
2643 | u32 src, dst; |
2644 | |
2645 | FETCH_BYTE(src); |
2646 | adr = AREG((Opcode >> 0) & 7); |
2647 | DECODE_EXT_WORD |
2648 | PRE_IO |
2649 | READ_BYTE_F(adr, dst) |
2650 | res = dst + src; |
2651 | flag_N = flag_X = flag_C = res; |
2652 | flag_V = (src ^ res) & (dst ^ res); |
2653 | flag_NotZ = res & 0xFF; |
2654 | WRITE_BYTE_F(adr, res) |
2655 | POST_IO |
2656 | RET(22) |
2657 | } |
2658 | |
2659 | // ADDI |
2660 | OPCODE(0x0638) |
2661 | { |
2662 | u32 adr, res; |
2663 | u32 src, dst; |
2664 | |
2665 | FETCH_BYTE(src); |
2666 | FETCH_SWORD(adr); |
2667 | PRE_IO |
2668 | READ_BYTE_F(adr, dst) |
2669 | res = dst + src; |
2670 | flag_N = flag_X = flag_C = res; |
2671 | flag_V = (src ^ res) & (dst ^ res); |
2672 | flag_NotZ = res & 0xFF; |
2673 | WRITE_BYTE_F(adr, res) |
2674 | POST_IO |
2675 | RET(20) |
2676 | } |
2677 | |
2678 | // ADDI |
2679 | OPCODE(0x0639) |
2680 | { |
2681 | u32 adr, res; |
2682 | u32 src, dst; |
2683 | |
2684 | FETCH_BYTE(src); |
2685 | FETCH_LONG(adr); |
2686 | PRE_IO |
2687 | READ_BYTE_F(adr, dst) |
2688 | res = dst + src; |
2689 | flag_N = flag_X = flag_C = res; |
2690 | flag_V = (src ^ res) & (dst ^ res); |
2691 | flag_NotZ = res & 0xFF; |
2692 | WRITE_BYTE_F(adr, res) |
2693 | POST_IO |
2694 | RET(24) |
2695 | } |
2696 | |
2697 | // ADDI |
2698 | OPCODE(0x061F) |
2699 | { |
2700 | u32 adr, res; |
2701 | u32 src, dst; |
2702 | |
2703 | FETCH_BYTE(src); |
2704 | adr = AREG(7); |
2705 | AREG(7) += 2; |
2706 | PRE_IO |
2707 | READ_BYTE_F(adr, dst) |
2708 | res = dst + src; |
2709 | flag_N = flag_X = flag_C = res; |
2710 | flag_V = (src ^ res) & (dst ^ res); |
2711 | flag_NotZ = res & 0xFF; |
2712 | WRITE_BYTE_F(adr, res) |
2713 | POST_IO |
2714 | RET(16) |
2715 | } |
2716 | |
2717 | // ADDI |
2718 | OPCODE(0x0627) |
2719 | { |
2720 | u32 adr, res; |
2721 | u32 src, dst; |
2722 | |
2723 | FETCH_BYTE(src); |
2724 | adr = AREG(7) - 2; |
2725 | AREG(7) = adr; |
2726 | PRE_IO |
2727 | READ_BYTE_F(adr, dst) |
2728 | res = dst + src; |
2729 | flag_N = flag_X = flag_C = res; |
2730 | flag_V = (src ^ res) & (dst ^ res); |
2731 | flag_NotZ = res & 0xFF; |
2732 | WRITE_BYTE_F(adr, res) |
2733 | POST_IO |
2734 | RET(18) |
2735 | } |
2736 | |
2737 | // ADDI |
2738 | OPCODE(0x0640) |
2739 | { |
2740 | u32 adr, res; |
2741 | u32 src, dst; |
2742 | |
2743 | FETCH_WORD(src); |
2744 | dst = DREGu16((Opcode >> 0) & 7); |
2745 | res = dst + src; |
2746 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2747 | flag_N = flag_X = flag_C = res >> 8; |
2748 | flag_NotZ = res & 0xFFFF; |
2749 | DREGu16((Opcode >> 0) & 7) = res; |
2750 | RET(8) |
2751 | } |
2752 | |
2753 | // ADDI |
2754 | OPCODE(0x0650) |
2755 | { |
2756 | u32 adr, res; |
2757 | u32 src, dst; |
2758 | |
2759 | FETCH_WORD(src); |
2760 | adr = AREG((Opcode >> 0) & 7); |
2761 | PRE_IO |
2762 | READ_WORD_F(adr, dst) |
2763 | res = dst + src; |
2764 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2765 | flag_N = flag_X = flag_C = res >> 8; |
2766 | flag_NotZ = res & 0xFFFF; |
2767 | WRITE_WORD_F(adr, res) |
2768 | POST_IO |
2769 | RET(16) |
2770 | } |
2771 | |
2772 | // ADDI |
2773 | OPCODE(0x0658) |
2774 | { |
2775 | u32 adr, res; |
2776 | u32 src, dst; |
2777 | |
2778 | FETCH_WORD(src); |
2779 | adr = AREG((Opcode >> 0) & 7); |
2780 | AREG((Opcode >> 0) & 7) += 2; |
2781 | PRE_IO |
2782 | READ_WORD_F(adr, dst) |
2783 | res = dst + src; |
2784 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2785 | flag_N = flag_X = flag_C = res >> 8; |
2786 | flag_NotZ = res & 0xFFFF; |
2787 | WRITE_WORD_F(adr, res) |
2788 | POST_IO |
2789 | RET(16) |
2790 | } |
2791 | |
2792 | // ADDI |
2793 | OPCODE(0x0660) |
2794 | { |
2795 | u32 adr, res; |
2796 | u32 src, dst; |
2797 | |
2798 | FETCH_WORD(src); |
2799 | adr = AREG((Opcode >> 0) & 7) - 2; |
2800 | AREG((Opcode >> 0) & 7) = adr; |
2801 | PRE_IO |
2802 | READ_WORD_F(adr, dst) |
2803 | res = dst + src; |
2804 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2805 | flag_N = flag_X = flag_C = res >> 8; |
2806 | flag_NotZ = res & 0xFFFF; |
2807 | WRITE_WORD_F(adr, res) |
2808 | POST_IO |
2809 | RET(18) |
2810 | } |
2811 | |
2812 | // ADDI |
2813 | OPCODE(0x0668) |
2814 | { |
2815 | u32 adr, res; |
2816 | u32 src, dst; |
2817 | |
2818 | FETCH_WORD(src); |
2819 | FETCH_SWORD(adr); |
2820 | adr += AREG((Opcode >> 0) & 7); |
2821 | PRE_IO |
2822 | READ_WORD_F(adr, dst) |
2823 | res = dst + src; |
2824 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2825 | flag_N = flag_X = flag_C = res >> 8; |
2826 | flag_NotZ = res & 0xFFFF; |
2827 | WRITE_WORD_F(adr, res) |
2828 | POST_IO |
2829 | RET(20) |
2830 | } |
2831 | |
2832 | // ADDI |
2833 | OPCODE(0x0670) |
2834 | { |
2835 | u32 adr, res; |
2836 | u32 src, dst; |
2837 | |
2838 | FETCH_WORD(src); |
2839 | adr = AREG((Opcode >> 0) & 7); |
2840 | DECODE_EXT_WORD |
2841 | PRE_IO |
2842 | READ_WORD_F(adr, dst) |
2843 | res = dst + src; |
2844 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2845 | flag_N = flag_X = flag_C = res >> 8; |
2846 | flag_NotZ = res & 0xFFFF; |
2847 | WRITE_WORD_F(adr, res) |
2848 | POST_IO |
2849 | RET(22) |
2850 | } |
2851 | |
2852 | // ADDI |
2853 | OPCODE(0x0678) |
2854 | { |
2855 | u32 adr, res; |
2856 | u32 src, dst; |
2857 | |
2858 | FETCH_WORD(src); |
2859 | FETCH_SWORD(adr); |
2860 | PRE_IO |
2861 | READ_WORD_F(adr, dst) |
2862 | res = dst + src; |
2863 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2864 | flag_N = flag_X = flag_C = res >> 8; |
2865 | flag_NotZ = res & 0xFFFF; |
2866 | WRITE_WORD_F(adr, res) |
2867 | POST_IO |
2868 | RET(20) |
2869 | } |
2870 | |
2871 | // ADDI |
2872 | OPCODE(0x0679) |
2873 | { |
2874 | u32 adr, res; |
2875 | u32 src, dst; |
2876 | |
2877 | FETCH_WORD(src); |
2878 | FETCH_LONG(adr); |
2879 | PRE_IO |
2880 | READ_WORD_F(adr, dst) |
2881 | res = dst + src; |
2882 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2883 | flag_N = flag_X = flag_C = res >> 8; |
2884 | flag_NotZ = res & 0xFFFF; |
2885 | WRITE_WORD_F(adr, res) |
2886 | POST_IO |
2887 | RET(24) |
2888 | } |
2889 | |
2890 | // ADDI |
2891 | OPCODE(0x065F) |
2892 | { |
2893 | u32 adr, res; |
2894 | u32 src, dst; |
2895 | |
2896 | FETCH_WORD(src); |
2897 | adr = AREG(7); |
2898 | AREG(7) += 2; |
2899 | PRE_IO |
2900 | READ_WORD_F(adr, dst) |
2901 | res = dst + src; |
2902 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2903 | flag_N = flag_X = flag_C = res >> 8; |
2904 | flag_NotZ = res & 0xFFFF; |
2905 | WRITE_WORD_F(adr, res) |
2906 | POST_IO |
2907 | RET(16) |
2908 | } |
2909 | |
2910 | // ADDI |
2911 | OPCODE(0x0667) |
2912 | { |
2913 | u32 adr, res; |
2914 | u32 src, dst; |
2915 | |
2916 | FETCH_WORD(src); |
2917 | adr = AREG(7) - 2; |
2918 | AREG(7) = adr; |
2919 | PRE_IO |
2920 | READ_WORD_F(adr, dst) |
2921 | res = dst + src; |
2922 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2923 | flag_N = flag_X = flag_C = res >> 8; |
2924 | flag_NotZ = res & 0xFFFF; |
2925 | WRITE_WORD_F(adr, res) |
2926 | POST_IO |
2927 | RET(18) |
2928 | } |
2929 | |
2930 | // ADDI |
2931 | OPCODE(0x0680) |
2932 | { |
2933 | u32 adr, res; |
2934 | u32 src, dst; |
2935 | |
2936 | FETCH_LONG(src); |
2937 | dst = DREGu32((Opcode >> 0) & 7); |
2938 | res = dst + src; |
2939 | flag_NotZ = res; |
2940 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2941 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2942 | flag_N = res >> 24; |
2943 | DREGu32((Opcode >> 0) & 7) = res; |
2944 | RET(16) |
2945 | } |
2946 | |
2947 | // ADDI |
2948 | OPCODE(0x0690) |
2949 | { |
2950 | u32 adr, res; |
2951 | u32 src, dst; |
2952 | |
2953 | FETCH_LONG(src); |
2954 | adr = AREG((Opcode >> 0) & 7); |
2955 | PRE_IO |
2956 | READ_LONG_F(adr, dst) |
2957 | res = dst + src; |
2958 | flag_NotZ = res; |
2959 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2960 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2961 | flag_N = res >> 24; |
2962 | WRITE_LONG_F(adr, res) |
2963 | POST_IO |
2964 | RET(28) |
2965 | } |
2966 | |
2967 | // ADDI |
2968 | OPCODE(0x0698) |
2969 | { |
2970 | u32 adr, res; |
2971 | u32 src, dst; |
2972 | |
2973 | FETCH_LONG(src); |
2974 | adr = AREG((Opcode >> 0) & 7); |
2975 | AREG((Opcode >> 0) & 7) += 4; |
2976 | PRE_IO |
2977 | READ_LONG_F(adr, dst) |
2978 | res = dst + src; |
2979 | flag_NotZ = res; |
2980 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2981 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2982 | flag_N = res >> 24; |
2983 | WRITE_LONG_F(adr, res) |
2984 | POST_IO |
2985 | RET(28) |
2986 | } |
2987 | |
2988 | // ADDI |
2989 | OPCODE(0x06A0) |
2990 | { |
2991 | u32 adr, res; |
2992 | u32 src, dst; |
2993 | |
2994 | FETCH_LONG(src); |
2995 | adr = AREG((Opcode >> 0) & 7) - 4; |
2996 | AREG((Opcode >> 0) & 7) = adr; |
2997 | PRE_IO |
2998 | READ_LONG_F(adr, dst) |
2999 | res = dst + src; |
3000 | flag_NotZ = res; |
3001 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3002 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3003 | flag_N = res >> 24; |
3004 | WRITE_LONG_F(adr, res) |
3005 | POST_IO |
3006 | RET(30) |
3007 | } |
3008 | |
3009 | // ADDI |
3010 | OPCODE(0x06A8) |
3011 | { |
3012 | u32 adr, res; |
3013 | u32 src, dst; |
3014 | |
3015 | FETCH_LONG(src); |
3016 | FETCH_SWORD(adr); |
3017 | adr += AREG((Opcode >> 0) & 7); |
3018 | PRE_IO |
3019 | READ_LONG_F(adr, dst) |
3020 | res = dst + src; |
3021 | flag_NotZ = res; |
3022 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3023 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3024 | flag_N = res >> 24; |
3025 | WRITE_LONG_F(adr, res) |
3026 | POST_IO |
3027 | RET(32) |
3028 | } |
3029 | |
3030 | // ADDI |
3031 | OPCODE(0x06B0) |
3032 | { |
3033 | u32 adr, res; |
3034 | u32 src, dst; |
3035 | |
3036 | FETCH_LONG(src); |
3037 | adr = AREG((Opcode >> 0) & 7); |
3038 | DECODE_EXT_WORD |
3039 | PRE_IO |
3040 | READ_LONG_F(adr, dst) |
3041 | res = dst + src; |
3042 | flag_NotZ = res; |
3043 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3044 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3045 | flag_N = res >> 24; |
3046 | WRITE_LONG_F(adr, res) |
3047 | POST_IO |
3048 | RET(34) |
3049 | } |
3050 | |
3051 | // ADDI |
3052 | OPCODE(0x06B8) |
3053 | { |
3054 | u32 adr, res; |
3055 | u32 src, dst; |
3056 | |
3057 | FETCH_LONG(src); |
3058 | FETCH_SWORD(adr); |
3059 | PRE_IO |
3060 | READ_LONG_F(adr, dst) |
3061 | res = dst + src; |
3062 | flag_NotZ = res; |
3063 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3064 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3065 | flag_N = res >> 24; |
3066 | WRITE_LONG_F(adr, res) |
3067 | POST_IO |
3068 | RET(32) |
3069 | } |
3070 | |
3071 | // ADDI |
3072 | OPCODE(0x06B9) |
3073 | { |
3074 | u32 adr, res; |
3075 | u32 src, dst; |
3076 | |
3077 | FETCH_LONG(src); |
3078 | FETCH_LONG(adr); |
3079 | PRE_IO |
3080 | READ_LONG_F(adr, dst) |
3081 | res = dst + src; |
3082 | flag_NotZ = res; |
3083 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3084 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3085 | flag_N = res >> 24; |
3086 | WRITE_LONG_F(adr, res) |
3087 | POST_IO |
3088 | RET(36) |
3089 | } |
3090 | |
3091 | // ADDI |
3092 | OPCODE(0x069F) |
3093 | { |
3094 | u32 adr, res; |
3095 | u32 src, dst; |
3096 | |
3097 | FETCH_LONG(src); |
3098 | adr = AREG(7); |
3099 | AREG(7) += 4; |
3100 | PRE_IO |
3101 | READ_LONG_F(adr, dst) |
3102 | res = dst + src; |
3103 | flag_NotZ = res; |
3104 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3105 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3106 | flag_N = res >> 24; |
3107 | WRITE_LONG_F(adr, res) |
3108 | POST_IO |
3109 | RET(28) |
3110 | } |
3111 | |
3112 | // ADDI |
3113 | OPCODE(0x06A7) |
3114 | { |
3115 | u32 adr, res; |
3116 | u32 src, dst; |
3117 | |
3118 | FETCH_LONG(src); |
3119 | adr = AREG(7) - 4; |
3120 | AREG(7) = adr; |
3121 | PRE_IO |
3122 | READ_LONG_F(adr, dst) |
3123 | res = dst + src; |
3124 | flag_NotZ = res; |
3125 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3126 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3127 | flag_N = res >> 24; |
3128 | WRITE_LONG_F(adr, res) |
3129 | POST_IO |
3130 | RET(30) |
3131 | } |
3132 | |
3133 | // CMPI |
3134 | OPCODE(0x0C00) |
3135 | { |
3136 | u32 adr, res; |
3137 | u32 src, dst; |
3138 | |
3139 | FETCH_BYTE(src); |
3140 | dst = DREGu8((Opcode >> 0) & 7); |
3141 | res = dst - src; |
3142 | flag_N = flag_C = res; |
3143 | flag_V = (src ^ dst) & (res ^ dst); |
3144 | flag_NotZ = res & 0xFF; |
3145 | RET(8) |
3146 | } |
3147 | |
3148 | // CMPI |
3149 | OPCODE(0x0C10) |
3150 | { |
3151 | u32 adr, res; |
3152 | u32 src, dst; |
3153 | |
3154 | FETCH_BYTE(src); |
3155 | adr = AREG((Opcode >> 0) & 7); |
3156 | PRE_IO |
3157 | READ_BYTE_F(adr, dst) |
3158 | res = dst - src; |
3159 | flag_N = flag_C = res; |
3160 | flag_V = (src ^ dst) & (res ^ dst); |
3161 | flag_NotZ = res & 0xFF; |
3162 | POST_IO |
3163 | RET(12) |
3164 | } |
3165 | |
3166 | // CMPI |
3167 | OPCODE(0x0C18) |
3168 | { |
3169 | u32 adr, res; |
3170 | u32 src, dst; |
3171 | |
3172 | FETCH_BYTE(src); |
3173 | adr = AREG((Opcode >> 0) & 7); |
3174 | AREG((Opcode >> 0) & 7) += 1; |
3175 | PRE_IO |
3176 | READ_BYTE_F(adr, dst) |
3177 | res = dst - src; |
3178 | flag_N = flag_C = res; |
3179 | flag_V = (src ^ dst) & (res ^ dst); |
3180 | flag_NotZ = res & 0xFF; |
3181 | POST_IO |
3182 | RET(12) |
3183 | } |
3184 | |
3185 | // CMPI |
3186 | OPCODE(0x0C20) |
3187 | { |
3188 | u32 adr, res; |
3189 | u32 src, dst; |
3190 | |
3191 | FETCH_BYTE(src); |
3192 | adr = AREG((Opcode >> 0) & 7) - 1; |
3193 | AREG((Opcode >> 0) & 7) = adr; |
3194 | PRE_IO |
3195 | READ_BYTE_F(adr, dst) |
3196 | res = dst - src; |
3197 | flag_N = flag_C = res; |
3198 | flag_V = (src ^ dst) & (res ^ dst); |
3199 | flag_NotZ = res & 0xFF; |
3200 | POST_IO |
3201 | RET(14) |
3202 | } |
3203 | |
3204 | // CMPI |
3205 | OPCODE(0x0C28) |
3206 | { |
3207 | u32 adr, res; |
3208 | u32 src, dst; |
3209 | |
3210 | FETCH_BYTE(src); |
3211 | FETCH_SWORD(adr); |
3212 | adr += AREG((Opcode >> 0) & 7); |
3213 | PRE_IO |
3214 | READ_BYTE_F(adr, dst) |
3215 | res = dst - src; |
3216 | flag_N = flag_C = res; |
3217 | flag_V = (src ^ dst) & (res ^ dst); |
3218 | flag_NotZ = res & 0xFF; |
3219 | POST_IO |
3220 | RET(16) |
3221 | } |
3222 | |
3223 | // CMPI |
3224 | OPCODE(0x0C30) |
3225 | { |
3226 | u32 adr, res; |
3227 | u32 src, dst; |
3228 | |
3229 | FETCH_BYTE(src); |
3230 | adr = AREG((Opcode >> 0) & 7); |
3231 | DECODE_EXT_WORD |
3232 | PRE_IO |
3233 | READ_BYTE_F(adr, dst) |
3234 | res = dst - src; |
3235 | flag_N = flag_C = res; |
3236 | flag_V = (src ^ dst) & (res ^ dst); |
3237 | flag_NotZ = res & 0xFF; |
3238 | POST_IO |
3239 | RET(18) |
3240 | } |
3241 | |
3242 | // CMPI |
3243 | OPCODE(0x0C38) |
3244 | { |
3245 | u32 adr, res; |
3246 | u32 src, dst; |
3247 | |
3248 | FETCH_BYTE(src); |
3249 | FETCH_SWORD(adr); |
3250 | PRE_IO |
3251 | READ_BYTE_F(adr, dst) |
3252 | res = dst - src; |
3253 | flag_N = flag_C = res; |
3254 | flag_V = (src ^ dst) & (res ^ dst); |
3255 | flag_NotZ = res & 0xFF; |
3256 | POST_IO |
3257 | RET(16) |
3258 | } |
3259 | |
3260 | // CMPI |
3261 | OPCODE(0x0C39) |
3262 | { |
3263 | u32 adr, res; |
3264 | u32 src, dst; |
3265 | |
3266 | FETCH_BYTE(src); |
3267 | FETCH_LONG(adr); |
3268 | PRE_IO |
3269 | READ_BYTE_F(adr, dst) |
3270 | res = dst - src; |
3271 | flag_N = flag_C = res; |
3272 | flag_V = (src ^ dst) & (res ^ dst); |
3273 | flag_NotZ = res & 0xFF; |
3274 | POST_IO |
3275 | RET(20) |
3276 | } |
3277 | |
3278 | // CMPI |
3279 | OPCODE(0x0C1F) |
3280 | { |
3281 | u32 adr, res; |
3282 | u32 src, dst; |
3283 | |
3284 | FETCH_BYTE(src); |
3285 | adr = AREG(7); |
3286 | AREG(7) += 2; |
3287 | PRE_IO |
3288 | READ_BYTE_F(adr, dst) |
3289 | res = dst - src; |
3290 | flag_N = flag_C = res; |
3291 | flag_V = (src ^ dst) & (res ^ dst); |
3292 | flag_NotZ = res & 0xFF; |
3293 | POST_IO |
3294 | RET(12) |
3295 | } |
3296 | |
3297 | // CMPI |
3298 | OPCODE(0x0C27) |
3299 | { |
3300 | u32 adr, res; |
3301 | u32 src, dst; |
3302 | |
3303 | FETCH_BYTE(src); |
3304 | adr = AREG(7) - 2; |
3305 | AREG(7) = adr; |
3306 | PRE_IO |
3307 | READ_BYTE_F(adr, dst) |
3308 | res = dst - src; |
3309 | flag_N = flag_C = res; |
3310 | flag_V = (src ^ dst) & (res ^ dst); |
3311 | flag_NotZ = res & 0xFF; |
3312 | POST_IO |
3313 | RET(14) |
3314 | } |
3315 | |
3316 | // CMPI |
3317 | OPCODE(0x0C40) |
3318 | { |
3319 | u32 adr, res; |
3320 | u32 src, dst; |
3321 | |
3322 | FETCH_WORD(src); |
3323 | dst = DREGu16((Opcode >> 0) & 7); |
3324 | res = dst - src; |
3325 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3326 | flag_N = flag_C = res >> 8; |
3327 | flag_NotZ = res & 0xFFFF; |
3328 | RET(8) |
3329 | } |
3330 | |
3331 | // CMPI |
3332 | OPCODE(0x0C50) |
3333 | { |
3334 | u32 adr, res; |
3335 | u32 src, dst; |
3336 | |
3337 | FETCH_WORD(src); |
3338 | adr = AREG((Opcode >> 0) & 7); |
3339 | PRE_IO |
3340 | READ_WORD_F(adr, dst) |
3341 | res = dst - src; |
3342 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3343 | flag_N = flag_C = res >> 8; |
3344 | flag_NotZ = res & 0xFFFF; |
3345 | POST_IO |
3346 | RET(12) |
3347 | } |
3348 | |
3349 | // CMPI |
3350 | OPCODE(0x0C58) |
3351 | { |
3352 | u32 adr, res; |
3353 | u32 src, dst; |
3354 | |
3355 | FETCH_WORD(src); |
3356 | adr = AREG((Opcode >> 0) & 7); |
3357 | AREG((Opcode >> 0) & 7) += 2; |
3358 | PRE_IO |
3359 | READ_WORD_F(adr, dst) |
3360 | res = dst - src; |
3361 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3362 | flag_N = flag_C = res >> 8; |
3363 | flag_NotZ = res & 0xFFFF; |
3364 | POST_IO |
3365 | RET(12) |
3366 | } |
3367 | |
3368 | // CMPI |
3369 | OPCODE(0x0C60) |
3370 | { |
3371 | u32 adr, res; |
3372 | u32 src, dst; |
3373 | |
3374 | FETCH_WORD(src); |
3375 | adr = AREG((Opcode >> 0) & 7) - 2; |
3376 | AREG((Opcode >> 0) & 7) = adr; |
3377 | PRE_IO |
3378 | READ_WORD_F(adr, dst) |
3379 | res = dst - src; |
3380 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3381 | flag_N = flag_C = res >> 8; |
3382 | flag_NotZ = res & 0xFFFF; |
3383 | POST_IO |
3384 | RET(14) |
3385 | } |
3386 | |
3387 | // CMPI |
3388 | OPCODE(0x0C68) |
3389 | { |
3390 | u32 adr, res; |
3391 | u32 src, dst; |
3392 | |
3393 | FETCH_WORD(src); |
3394 | FETCH_SWORD(adr); |
3395 | adr += AREG((Opcode >> 0) & 7); |
3396 | PRE_IO |
3397 | READ_WORD_F(adr, dst) |
3398 | res = dst - src; |
3399 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3400 | flag_N = flag_C = res >> 8; |
3401 | flag_NotZ = res & 0xFFFF; |
3402 | POST_IO |
3403 | RET(16) |
3404 | } |
3405 | |
3406 | // CMPI |
3407 | OPCODE(0x0C70) |
3408 | { |
3409 | u32 adr, res; |
3410 | u32 src, dst; |
3411 | |
3412 | FETCH_WORD(src); |
3413 | adr = AREG((Opcode >> 0) & 7); |
3414 | DECODE_EXT_WORD |
3415 | PRE_IO |
3416 | READ_WORD_F(adr, dst) |
3417 | res = dst - src; |
3418 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3419 | flag_N = flag_C = res >> 8; |
3420 | flag_NotZ = res & 0xFFFF; |
3421 | POST_IO |
3422 | RET(18) |
3423 | } |
3424 | |
3425 | // CMPI |
3426 | OPCODE(0x0C78) |
3427 | { |
3428 | u32 adr, res; |
3429 | u32 src, dst; |
3430 | |
3431 | FETCH_WORD(src); |
3432 | FETCH_SWORD(adr); |
3433 | PRE_IO |
3434 | READ_WORD_F(adr, dst) |
3435 | res = dst - src; |
3436 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3437 | flag_N = flag_C = res >> 8; |
3438 | flag_NotZ = res & 0xFFFF; |
3439 | POST_IO |
3440 | RET(16) |
3441 | } |
3442 | |
3443 | // CMPI |
3444 | OPCODE(0x0C79) |
3445 | { |
3446 | u32 adr, res; |
3447 | u32 src, dst; |
3448 | |
3449 | FETCH_WORD(src); |
3450 | FETCH_LONG(adr); |
3451 | PRE_IO |
3452 | READ_WORD_F(adr, dst) |
3453 | res = dst - src; |
3454 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3455 | flag_N = flag_C = res >> 8; |
3456 | flag_NotZ = res & 0xFFFF; |
3457 | POST_IO |
3458 | RET(20) |
3459 | } |
3460 | |
3461 | // CMPI |
3462 | OPCODE(0x0C5F) |
3463 | { |
3464 | u32 adr, res; |
3465 | u32 src, dst; |
3466 | |
3467 | FETCH_WORD(src); |
3468 | adr = AREG(7); |
3469 | AREG(7) += 2; |
3470 | PRE_IO |
3471 | READ_WORD_F(adr, dst) |
3472 | res = dst - src; |
3473 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3474 | flag_N = flag_C = res >> 8; |
3475 | flag_NotZ = res & 0xFFFF; |
3476 | POST_IO |
3477 | RET(12) |
3478 | } |
3479 | |
3480 | // CMPI |
3481 | OPCODE(0x0C67) |
3482 | { |
3483 | u32 adr, res; |
3484 | u32 src, dst; |
3485 | |
3486 | FETCH_WORD(src); |
3487 | adr = AREG(7) - 2; |
3488 | AREG(7) = adr; |
3489 | PRE_IO |
3490 | READ_WORD_F(adr, dst) |
3491 | res = dst - src; |
3492 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3493 | flag_N = flag_C = res >> 8; |
3494 | flag_NotZ = res & 0xFFFF; |
3495 | POST_IO |
3496 | RET(14) |
3497 | } |
3498 | |
3499 | // CMPI |
3500 | OPCODE(0x0C80) |
3501 | { |
3502 | u32 adr, res; |
3503 | u32 src, dst; |
3504 | |
3505 | FETCH_LONG(src); |
3506 | dst = DREGu32((Opcode >> 0) & 7); |
3507 | res = dst - src; |
3508 | flag_NotZ = res; |
3509 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3510 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3511 | flag_N = res >> 24; |
3512 | RET(14) |
3513 | } |
3514 | |
3515 | // CMPI |
3516 | OPCODE(0x0C90) |
3517 | { |
3518 | u32 adr, res; |
3519 | u32 src, dst; |
3520 | |
3521 | FETCH_LONG(src); |
3522 | adr = AREG((Opcode >> 0) & 7); |
3523 | PRE_IO |
3524 | READ_LONG_F(adr, dst) |
3525 | res = dst - src; |
3526 | flag_NotZ = res; |
3527 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3528 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3529 | flag_N = res >> 24; |
3530 | POST_IO |
3531 | RET(20) |
3532 | } |
3533 | |
3534 | // CMPI |
3535 | OPCODE(0x0C98) |
3536 | { |
3537 | u32 adr, res; |
3538 | u32 src, dst; |
3539 | |
3540 | FETCH_LONG(src); |
3541 | adr = AREG((Opcode >> 0) & 7); |
3542 | AREG((Opcode >> 0) & 7) += 4; |
3543 | PRE_IO |
3544 | READ_LONG_F(adr, dst) |
3545 | res = dst - src; |
3546 | flag_NotZ = res; |
3547 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3548 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3549 | flag_N = res >> 24; |
3550 | POST_IO |
3551 | RET(20) |
3552 | } |
3553 | |
3554 | // CMPI |
3555 | OPCODE(0x0CA0) |
3556 | { |
3557 | u32 adr, res; |
3558 | u32 src, dst; |
3559 | |
3560 | FETCH_LONG(src); |
3561 | adr = AREG((Opcode >> 0) & 7) - 4; |
3562 | AREG((Opcode >> 0) & 7) = adr; |
3563 | PRE_IO |
3564 | READ_LONG_F(adr, dst) |
3565 | res = dst - src; |
3566 | flag_NotZ = res; |
3567 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3568 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3569 | flag_N = res >> 24; |
3570 | POST_IO |
3571 | RET(22) |
3572 | } |
3573 | |
3574 | // CMPI |
3575 | OPCODE(0x0CA8) |
3576 | { |
3577 | u32 adr, res; |
3578 | u32 src, dst; |
3579 | |
3580 | FETCH_LONG(src); |
3581 | FETCH_SWORD(adr); |
3582 | adr += AREG((Opcode >> 0) & 7); |
3583 | PRE_IO |
3584 | READ_LONG_F(adr, dst) |
3585 | res = dst - src; |
3586 | flag_NotZ = res; |
3587 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3588 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3589 | flag_N = res >> 24; |
3590 | POST_IO |
3591 | RET(24) |
3592 | } |
3593 | |
3594 | // CMPI |
3595 | OPCODE(0x0CB0) |
3596 | { |
3597 | u32 adr, res; |
3598 | u32 src, dst; |
3599 | |
3600 | FETCH_LONG(src); |
3601 | adr = AREG((Opcode >> 0) & 7); |
3602 | DECODE_EXT_WORD |
3603 | PRE_IO |
3604 | READ_LONG_F(adr, dst) |
3605 | res = dst - src; |
3606 | flag_NotZ = res; |
3607 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3608 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3609 | flag_N = res >> 24; |
3610 | POST_IO |
3611 | RET(26) |
3612 | } |
3613 | |
3614 | // CMPI |
3615 | OPCODE(0x0CB8) |
3616 | { |
3617 | u32 adr, res; |
3618 | u32 src, dst; |
3619 | |
3620 | FETCH_LONG(src); |
3621 | FETCH_SWORD(adr); |
3622 | PRE_IO |
3623 | READ_LONG_F(adr, dst) |
3624 | res = dst - src; |
3625 | flag_NotZ = res; |
3626 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3627 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3628 | flag_N = res >> 24; |
3629 | POST_IO |
3630 | RET(24) |
3631 | } |
3632 | |
3633 | // CMPI |
3634 | OPCODE(0x0CB9) |
3635 | { |
3636 | u32 adr, res; |
3637 | u32 src, dst; |
3638 | |
3639 | FETCH_LONG(src); |
3640 | FETCH_LONG(adr); |
3641 | PRE_IO |
3642 | READ_LONG_F(adr, dst) |
3643 | res = dst - src; |
3644 | flag_NotZ = res; |
3645 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3646 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3647 | flag_N = res >> 24; |
3648 | POST_IO |
3649 | RET(28) |
3650 | } |
3651 | |
3652 | // CMPI |
3653 | OPCODE(0x0C9F) |
3654 | { |
3655 | u32 adr, res; |
3656 | u32 src, dst; |
3657 | |
3658 | FETCH_LONG(src); |
3659 | adr = AREG(7); |
3660 | AREG(7) += 4; |
3661 | PRE_IO |
3662 | READ_LONG_F(adr, dst) |
3663 | res = dst - src; |
3664 | flag_NotZ = res; |
3665 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3666 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3667 | flag_N = res >> 24; |
3668 | POST_IO |
3669 | RET(20) |
3670 | } |
3671 | |
3672 | // CMPI |
3673 | OPCODE(0x0CA7) |
3674 | { |
3675 | u32 adr, res; |
3676 | u32 src, dst; |
3677 | |
3678 | FETCH_LONG(src); |
3679 | adr = AREG(7) - 4; |
3680 | AREG(7) = adr; |
3681 | PRE_IO |
3682 | READ_LONG_F(adr, dst) |
3683 | res = dst - src; |
3684 | flag_NotZ = res; |
3685 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3686 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3687 | flag_N = res >> 24; |
3688 | POST_IO |
3689 | RET(22) |
3690 | } |
3691 | |
3692 | // BTSTn |
3693 | OPCODE(0x0800) |
3694 | { |
3695 | u32 adr, res; |
3696 | u32 src, dst; |
3697 | |
3698 | FETCH_BYTE(src); |
3699 | src = 1 << (src & 31); |
3700 | res = DREGu32((Opcode >> 0) & 7); |
3701 | flag_NotZ = res & src; |
3702 | RET(10) |
3703 | } |
3704 | |
3705 | // BTSTn |
3706 | OPCODE(0x0810) |
3707 | { |
3708 | u32 adr, res; |
3709 | u32 src, dst; |
3710 | |
3711 | FETCH_BYTE(src); |
3712 | src = 1 << (src & 7); |
3713 | adr = AREG((Opcode >> 0) & 7); |
3714 | PRE_IO |
3715 | READ_BYTE_F(adr, res) |
3716 | flag_NotZ = res & src; |
3717 | POST_IO |
3718 | RET(12) |
3719 | } |
3720 | |
3721 | // BTSTn |
3722 | OPCODE(0x0818) |
3723 | { |
3724 | u32 adr, res; |
3725 | u32 src, dst; |
3726 | |
3727 | FETCH_BYTE(src); |
3728 | src = 1 << (src & 7); |
3729 | adr = AREG((Opcode >> 0) & 7); |
3730 | AREG((Opcode >> 0) & 7) += 1; |
3731 | PRE_IO |
3732 | READ_BYTE_F(adr, res) |
3733 | flag_NotZ = res & src; |
3734 | POST_IO |
3735 | RET(12) |
3736 | } |
3737 | |
3738 | // BTSTn |
3739 | OPCODE(0x0820) |
3740 | { |
3741 | u32 adr, res; |
3742 | u32 src, dst; |
3743 | |
3744 | FETCH_BYTE(src); |
3745 | src = 1 << (src & 7); |
3746 | adr = AREG((Opcode >> 0) & 7) - 1; |
3747 | AREG((Opcode >> 0) & 7) = adr; |
3748 | PRE_IO |
3749 | READ_BYTE_F(adr, res) |
3750 | flag_NotZ = res & src; |
3751 | POST_IO |
3752 | RET(14) |
3753 | } |
3754 | |
3755 | // BTSTn |
3756 | OPCODE(0x0828) |
3757 | { |
3758 | u32 adr, res; |
3759 | u32 src, dst; |
3760 | |
3761 | FETCH_BYTE(src); |
3762 | src = 1 << (src & 7); |
3763 | FETCH_SWORD(adr); |
3764 | adr += AREG((Opcode >> 0) & 7); |
3765 | PRE_IO |
3766 | READ_BYTE_F(adr, res) |
3767 | flag_NotZ = res & src; |
3768 | POST_IO |
3769 | RET(16) |
3770 | } |
3771 | |
3772 | // BTSTn |
3773 | OPCODE(0x0830) |
3774 | { |
3775 | u32 adr, res; |
3776 | u32 src, dst; |
3777 | |
3778 | FETCH_BYTE(src); |
3779 | src = 1 << (src & 7); |
3780 | adr = AREG((Opcode >> 0) & 7); |
3781 | DECODE_EXT_WORD |
3782 | PRE_IO |
3783 | READ_BYTE_F(adr, res) |
3784 | flag_NotZ = res & src; |
3785 | POST_IO |
3786 | RET(18) |
3787 | } |
3788 | |
3789 | // BTSTn |
3790 | OPCODE(0x0838) |
3791 | { |
3792 | u32 adr, res; |
3793 | u32 src, dst; |
3794 | |
3795 | FETCH_BYTE(src); |
3796 | src = 1 << (src & 7); |
3797 | FETCH_SWORD(adr); |
3798 | PRE_IO |
3799 | READ_BYTE_F(adr, res) |
3800 | flag_NotZ = res & src; |
3801 | POST_IO |
3802 | RET(16) |
3803 | } |
3804 | |
3805 | // BTSTn |
3806 | OPCODE(0x0839) |
3807 | { |
3808 | u32 adr, res; |
3809 | u32 src, dst; |
3810 | |
3811 | FETCH_BYTE(src); |
3812 | src = 1 << (src & 7); |
3813 | FETCH_LONG(adr); |
3814 | PRE_IO |
3815 | READ_BYTE_F(adr, res) |
3816 | flag_NotZ = res & src; |
3817 | POST_IO |
3818 | RET(20) |
3819 | } |
3820 | |
3821 | // BTSTn |
3822 | OPCODE(0x083A) |
3823 | { |
3824 | u32 adr, res; |
3825 | u32 src, dst; |
3826 | |
3827 | FETCH_BYTE(src); |
3828 | src = 1 << (src & 7); |
3829 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
3830 | PC++; |
3831 | PRE_IO |
3832 | READ_BYTE_F(adr, res) |
3833 | flag_NotZ = res & src; |
3834 | POST_IO |
3835 | RET(16) |
3836 | } |
3837 | |
3838 | // BTSTn |
3839 | OPCODE(0x083B) |
3840 | { |
3841 | u32 adr, res; |
3842 | u32 src, dst; |
3843 | |
3844 | FETCH_BYTE(src); |
3845 | src = 1 << (src & 7); |
3846 | adr = (u32)(PC) - BasePC; |
3847 | DECODE_EXT_WORD |
3848 | PRE_IO |
3849 | READ_BYTE_F(adr, res) |
3850 | flag_NotZ = res & src; |
3851 | POST_IO |
3852 | RET(18) |
3853 | } |
3854 | |
3855 | // BTSTn |
3856 | OPCODE(0x081F) |
3857 | { |
3858 | u32 adr, res; |
3859 | u32 src, dst; |
3860 | |
3861 | FETCH_BYTE(src); |
3862 | src = 1 << (src & 7); |
3863 | adr = AREG(7); |
3864 | AREG(7) += 2; |
3865 | PRE_IO |
3866 | READ_BYTE_F(adr, res) |
3867 | flag_NotZ = res & src; |
3868 | POST_IO |
3869 | RET(12) |
3870 | } |
3871 | |
3872 | // BTSTn |
3873 | OPCODE(0x0827) |
3874 | { |
3875 | u32 adr, res; |
3876 | u32 src, dst; |
3877 | |
3878 | FETCH_BYTE(src); |
3879 | src = 1 << (src & 7); |
3880 | adr = AREG(7) - 2; |
3881 | AREG(7) = adr; |
3882 | PRE_IO |
3883 | READ_BYTE_F(adr, res) |
3884 | flag_NotZ = res & src; |
3885 | POST_IO |
3886 | RET(14) |
3887 | } |
3888 | |
3889 | // BCHGn |
3890 | OPCODE(0x0840) |
3891 | { |
3892 | u32 adr, res; |
3893 | u32 src, dst; |
3894 | |
3895 | FETCH_BYTE(src); |
3896 | src = 1 << (src & 31); |
3897 | res = DREGu32((Opcode >> 0) & 7); |
3898 | flag_NotZ = res & src; |
3899 | res ^= src; |
3900 | DREGu32((Opcode >> 0) & 7) = res; |
3901 | RET(12) |
3902 | } |
3903 | |
3904 | // BCHGn |
3905 | OPCODE(0x0850) |
3906 | { |
3907 | u32 adr, res; |
3908 | u32 src, dst; |
3909 | |
3910 | FETCH_BYTE(src); |
3911 | src = 1 << (src & 7); |
3912 | adr = AREG((Opcode >> 0) & 7); |
3913 | PRE_IO |
3914 | READ_BYTE_F(adr, res) |
3915 | flag_NotZ = res & src; |
3916 | res ^= src; |
3917 | WRITE_BYTE_F(adr, res) |
3918 | POST_IO |
3919 | RET(16) |
3920 | } |
3921 | |
3922 | // BCHGn |
3923 | OPCODE(0x0858) |
3924 | { |
3925 | u32 adr, res; |
3926 | u32 src, dst; |
3927 | |
3928 | FETCH_BYTE(src); |
3929 | src = 1 << (src & 7); |
3930 | adr = AREG((Opcode >> 0) & 7); |
3931 | AREG((Opcode >> 0) & 7) += 1; |
3932 | PRE_IO |
3933 | READ_BYTE_F(adr, res) |
3934 | flag_NotZ = res & src; |
3935 | res ^= src; |
3936 | WRITE_BYTE_F(adr, res) |
3937 | POST_IO |
3938 | RET(16) |
3939 | } |
3940 | |
3941 | // BCHGn |
3942 | OPCODE(0x0860) |
3943 | { |
3944 | u32 adr, res; |
3945 | u32 src, dst; |
3946 | |
3947 | FETCH_BYTE(src); |
3948 | src = 1 << (src & 7); |
3949 | adr = AREG((Opcode >> 0) & 7) - 1; |
3950 | AREG((Opcode >> 0) & 7) = adr; |
3951 | PRE_IO |
3952 | READ_BYTE_F(adr, res) |
3953 | flag_NotZ = res & src; |
3954 | res ^= src; |
3955 | WRITE_BYTE_F(adr, res) |
3956 | POST_IO |
3957 | RET(18) |
3958 | } |
3959 | |
3960 | // BCHGn |
3961 | OPCODE(0x0868) |
3962 | { |
3963 | u32 adr, res; |
3964 | u32 src, dst; |
3965 | |
3966 | FETCH_BYTE(src); |
3967 | src = 1 << (src & 7); |
3968 | FETCH_SWORD(adr); |
3969 | adr += AREG((Opcode >> 0) & 7); |
3970 | PRE_IO |
3971 | READ_BYTE_F(adr, res) |
3972 | flag_NotZ = res & src; |
3973 | res ^= src; |
3974 | WRITE_BYTE_F(adr, res) |
3975 | POST_IO |
3976 | RET(20) |
3977 | } |
3978 | |
3979 | // BCHGn |
3980 | OPCODE(0x0870) |
3981 | { |
3982 | u32 adr, res; |
3983 | u32 src, dst; |
3984 | |
3985 | FETCH_BYTE(src); |
3986 | src = 1 << (src & 7); |
3987 | adr = AREG((Opcode >> 0) & 7); |
3988 | DECODE_EXT_WORD |
3989 | PRE_IO |
3990 | READ_BYTE_F(adr, res) |
3991 | flag_NotZ = res & src; |
3992 | res ^= src; |
3993 | WRITE_BYTE_F(adr, res) |
3994 | POST_IO |
3995 | RET(22) |
3996 | } |
3997 | |
3998 | // BCHGn |
3999 | OPCODE(0x0878) |
4000 | { |
4001 | u32 adr, res; |
4002 | u32 src, dst; |
4003 | |
4004 | FETCH_BYTE(src); |
4005 | src = 1 << (src & 7); |
4006 | FETCH_SWORD(adr); |
4007 | PRE_IO |
4008 | READ_BYTE_F(adr, res) |
4009 | flag_NotZ = res & src; |
4010 | res ^= src; |
4011 | WRITE_BYTE_F(adr, res) |
4012 | POST_IO |
4013 | RET(20) |
4014 | } |
4015 | |
4016 | // BCHGn |
4017 | OPCODE(0x0879) |
4018 | { |
4019 | u32 adr, res; |
4020 | u32 src, dst; |
4021 | |
4022 | FETCH_BYTE(src); |
4023 | src = 1 << (src & 7); |
4024 | FETCH_LONG(adr); |
4025 | PRE_IO |
4026 | READ_BYTE_F(adr, res) |
4027 | flag_NotZ = res & src; |
4028 | res ^= src; |
4029 | WRITE_BYTE_F(adr, res) |
4030 | POST_IO |
4031 | RET(24) |
4032 | } |
4033 | |
4034 | // BCHGn |
4035 | OPCODE(0x085F) |
4036 | { |
4037 | u32 adr, res; |
4038 | u32 src, dst; |
4039 | |
4040 | FETCH_BYTE(src); |
4041 | src = 1 << (src & 7); |
4042 | adr = AREG(7); |
4043 | AREG(7) += 2; |
4044 | PRE_IO |
4045 | READ_BYTE_F(adr, res) |
4046 | flag_NotZ = res & src; |
4047 | res ^= src; |
4048 | WRITE_BYTE_F(adr, res) |
4049 | POST_IO |
4050 | RET(16) |
4051 | } |
4052 | |
4053 | // BCHGn |
4054 | OPCODE(0x0867) |
4055 | { |
4056 | u32 adr, res; |
4057 | u32 src, dst; |
4058 | |
4059 | FETCH_BYTE(src); |
4060 | src = 1 << (src & 7); |
4061 | adr = AREG(7) - 2; |
4062 | AREG(7) = adr; |
4063 | PRE_IO |
4064 | READ_BYTE_F(adr, res) |
4065 | flag_NotZ = res & src; |
4066 | res ^= src; |
4067 | WRITE_BYTE_F(adr, res) |
4068 | POST_IO |
4069 | RET(18) |
4070 | } |
4071 | |
4072 | // BCLRn |
4073 | OPCODE(0x0880) |
4074 | { |
4075 | u32 adr, res; |
4076 | u32 src, dst; |
4077 | |
4078 | FETCH_BYTE(src); |
4079 | src = 1 << (src & 31); |
4080 | res = DREGu32((Opcode >> 0) & 7); |
4081 | flag_NotZ = res & src; |
4082 | res &= ~src; |
4083 | DREGu32((Opcode >> 0) & 7) = res; |
4084 | RET(14) |
4085 | } |
4086 | |
4087 | // BCLRn |
4088 | OPCODE(0x0890) |
4089 | { |
4090 | u32 adr, res; |
4091 | u32 src, dst; |
4092 | |
4093 | FETCH_BYTE(src); |
4094 | src = 1 << (src & 7); |
4095 | adr = AREG((Opcode >> 0) & 7); |
4096 | PRE_IO |
4097 | READ_BYTE_F(adr, res) |
4098 | flag_NotZ = res & src; |
4099 | res &= ~src; |
4100 | WRITE_BYTE_F(adr, res) |
4101 | POST_IO |
4102 | RET(16) |
4103 | } |
4104 | |
4105 | // BCLRn |
4106 | OPCODE(0x0898) |
4107 | { |
4108 | u32 adr, res; |
4109 | u32 src, dst; |
4110 | |
4111 | FETCH_BYTE(src); |
4112 | src = 1 << (src & 7); |
4113 | adr = AREG((Opcode >> 0) & 7); |
4114 | AREG((Opcode >> 0) & 7) += 1; |
4115 | PRE_IO |
4116 | READ_BYTE_F(adr, res) |
4117 | flag_NotZ = res & src; |
4118 | res &= ~src; |
4119 | WRITE_BYTE_F(adr, res) |
4120 | POST_IO |
4121 | RET(16) |
4122 | } |
4123 | |
4124 | // BCLRn |
4125 | OPCODE(0x08A0) |
4126 | { |
4127 | u32 adr, res; |
4128 | u32 src, dst; |
4129 | |
4130 | FETCH_BYTE(src); |
4131 | src = 1 << (src & 7); |
4132 | adr = AREG((Opcode >> 0) & 7) - 1; |
4133 | AREG((Opcode >> 0) & 7) = adr; |
4134 | PRE_IO |
4135 | READ_BYTE_F(adr, res) |
4136 | flag_NotZ = res & src; |
4137 | res &= ~src; |
4138 | WRITE_BYTE_F(adr, res) |
4139 | POST_IO |
4140 | RET(18) |
4141 | } |
4142 | |
4143 | // BCLRn |
4144 | OPCODE(0x08A8) |
4145 | { |
4146 | u32 adr, res; |
4147 | u32 src, dst; |
4148 | |
4149 | FETCH_BYTE(src); |
4150 | src = 1 << (src & 7); |
4151 | FETCH_SWORD(adr); |
4152 | adr += AREG((Opcode >> 0) & 7); |
4153 | PRE_IO |
4154 | READ_BYTE_F(adr, res) |
4155 | flag_NotZ = res & src; |
4156 | res &= ~src; |
4157 | WRITE_BYTE_F(adr, res) |
4158 | POST_IO |
4159 | RET(20) |
4160 | } |
4161 | |
4162 | // BCLRn |
4163 | OPCODE(0x08B0) |
4164 | { |
4165 | u32 adr, res; |
4166 | u32 src, dst; |
4167 | |
4168 | FETCH_BYTE(src); |
4169 | src = 1 << (src & 7); |
4170 | adr = AREG((Opcode >> 0) & 7); |
4171 | DECODE_EXT_WORD |
4172 | PRE_IO |
4173 | READ_BYTE_F(adr, res) |
4174 | flag_NotZ = res & src; |
4175 | res &= ~src; |
4176 | WRITE_BYTE_F(adr, res) |
4177 | POST_IO |
4178 | RET(22) |
4179 | } |
4180 | |
4181 | // BCLRn |
4182 | OPCODE(0x08B8) |
4183 | { |
4184 | u32 adr, res; |
4185 | u32 src, dst; |
4186 | |
4187 | FETCH_BYTE(src); |
4188 | src = 1 << (src & 7); |
4189 | FETCH_SWORD(adr); |
4190 | PRE_IO |
4191 | READ_BYTE_F(adr, res) |
4192 | flag_NotZ = res & src; |
4193 | res &= ~src; |
4194 | WRITE_BYTE_F(adr, res) |
4195 | POST_IO |
4196 | RET(20) |
4197 | } |
4198 | |
4199 | // BCLRn |
4200 | OPCODE(0x08B9) |
4201 | { |
4202 | u32 adr, res; |
4203 | u32 src, dst; |
4204 | |
4205 | FETCH_BYTE(src); |
4206 | src = 1 << (src & 7); |
4207 | FETCH_LONG(adr); |
4208 | PRE_IO |
4209 | READ_BYTE_F(adr, res) |
4210 | flag_NotZ = res & src; |
4211 | res &= ~src; |
4212 | WRITE_BYTE_F(adr, res) |
4213 | POST_IO |
4214 | RET(24) |
4215 | } |
4216 | |
4217 | // BCLRn |
4218 | OPCODE(0x089F) |
4219 | { |
4220 | u32 adr, res; |
4221 | u32 src, dst; |
4222 | |
4223 | FETCH_BYTE(src); |
4224 | src = 1 << (src & 7); |
4225 | adr = AREG(7); |
4226 | AREG(7) += 2; |
4227 | PRE_IO |
4228 | READ_BYTE_F(adr, res) |
4229 | flag_NotZ = res & src; |
4230 | res &= ~src; |
4231 | WRITE_BYTE_F(adr, res) |
4232 | POST_IO |
4233 | RET(16) |
4234 | } |
4235 | |
4236 | // BCLRn |
4237 | OPCODE(0x08A7) |
4238 | { |
4239 | u32 adr, res; |
4240 | u32 src, dst; |
4241 | |
4242 | FETCH_BYTE(src); |
4243 | src = 1 << (src & 7); |
4244 | adr = AREG(7) - 2; |
4245 | AREG(7) = adr; |
4246 | PRE_IO |
4247 | READ_BYTE_F(adr, res) |
4248 | flag_NotZ = res & src; |
4249 | res &= ~src; |
4250 | WRITE_BYTE_F(adr, res) |
4251 | POST_IO |
4252 | RET(18) |
4253 | } |
4254 | |
4255 | // BSETn |
4256 | OPCODE(0x08C0) |
4257 | { |
4258 | u32 adr, res; |
4259 | u32 src, dst; |
4260 | |
4261 | FETCH_BYTE(src); |
4262 | src = 1 << (src & 31); |
4263 | res = DREGu32((Opcode >> 0) & 7); |
4264 | flag_NotZ = res & src; |
4265 | res |= src; |
4266 | DREGu32((Opcode >> 0) & 7) = res; |
4267 | RET(12) |
4268 | } |
4269 | |
4270 | // BSETn |
4271 | OPCODE(0x08D0) |
4272 | { |
4273 | u32 adr, res; |
4274 | u32 src, dst; |
4275 | |
4276 | FETCH_BYTE(src); |
4277 | src = 1 << (src & 7); |
4278 | adr = AREG((Opcode >> 0) & 7); |
4279 | PRE_IO |
4280 | READ_BYTE_F(adr, res) |
4281 | flag_NotZ = res & src; |
4282 | res |= src; |
4283 | WRITE_BYTE_F(adr, res) |
4284 | POST_IO |
4285 | RET(16) |
4286 | } |
4287 | |
4288 | // BSETn |
4289 | OPCODE(0x08D8) |
4290 | { |
4291 | u32 adr, res; |
4292 | u32 src, dst; |
4293 | |
4294 | FETCH_BYTE(src); |
4295 | src = 1 << (src & 7); |
4296 | adr = AREG((Opcode >> 0) & 7); |
4297 | AREG((Opcode >> 0) & 7) += 1; |
4298 | PRE_IO |
4299 | READ_BYTE_F(adr, res) |
4300 | flag_NotZ = res & src; |
4301 | res |= src; |
4302 | WRITE_BYTE_F(adr, res) |
4303 | POST_IO |
4304 | RET(16) |
4305 | } |
4306 | |
4307 | // BSETn |
4308 | OPCODE(0x08E0) |
4309 | { |
4310 | u32 adr, res; |
4311 | u32 src, dst; |
4312 | |
4313 | FETCH_BYTE(src); |
4314 | src = 1 << (src & 7); |
4315 | adr = AREG((Opcode >> 0) & 7) - 1; |
4316 | AREG((Opcode >> 0) & 7) = adr; |
4317 | PRE_IO |
4318 | READ_BYTE_F(adr, res) |
4319 | flag_NotZ = res & src; |
4320 | res |= src; |
4321 | WRITE_BYTE_F(adr, res) |
4322 | POST_IO |
4323 | RET(18) |
4324 | } |
4325 | |
4326 | // BSETn |
4327 | OPCODE(0x08E8) |
4328 | { |
4329 | u32 adr, res; |
4330 | u32 src, dst; |
4331 | |
4332 | FETCH_BYTE(src); |
4333 | src = 1 << (src & 7); |
4334 | FETCH_SWORD(adr); |
4335 | adr += AREG((Opcode >> 0) & 7); |
4336 | PRE_IO |
4337 | READ_BYTE_F(adr, res) |
4338 | flag_NotZ = res & src; |
4339 | res |= src; |
4340 | WRITE_BYTE_F(adr, res) |
4341 | POST_IO |
4342 | RET(20) |
4343 | } |
4344 | |
4345 | // BSETn |
4346 | OPCODE(0x08F0) |
4347 | { |
4348 | u32 adr, res; |
4349 | u32 src, dst; |
4350 | |
4351 | FETCH_BYTE(src); |
4352 | src = 1 << (src & 7); |
4353 | adr = AREG((Opcode >> 0) & 7); |
4354 | DECODE_EXT_WORD |
4355 | PRE_IO |
4356 | READ_BYTE_F(adr, res) |
4357 | flag_NotZ = res & src; |
4358 | res |= src; |
4359 | WRITE_BYTE_F(adr, res) |
4360 | POST_IO |
4361 | RET(22) |
4362 | } |
4363 | |
4364 | // BSETn |
4365 | OPCODE(0x08F8) |
4366 | { |
4367 | u32 adr, res; |
4368 | u32 src, dst; |
4369 | |
4370 | FETCH_BYTE(src); |
4371 | src = 1 << (src & 7); |
4372 | FETCH_SWORD(adr); |
4373 | PRE_IO |
4374 | READ_BYTE_F(adr, res) |
4375 | flag_NotZ = res & src; |
4376 | res |= src; |
4377 | WRITE_BYTE_F(adr, res) |
4378 | POST_IO |
4379 | RET(20) |
4380 | } |
4381 | |
4382 | // BSETn |
4383 | OPCODE(0x08F9) |
4384 | { |
4385 | u32 adr, res; |
4386 | u32 src, dst; |
4387 | |
4388 | FETCH_BYTE(src); |
4389 | src = 1 << (src & 7); |
4390 | FETCH_LONG(adr); |
4391 | PRE_IO |
4392 | READ_BYTE_F(adr, res) |
4393 | flag_NotZ = res & src; |
4394 | res |= src; |
4395 | WRITE_BYTE_F(adr, res) |
4396 | POST_IO |
4397 | RET(24) |
4398 | } |
4399 | |
4400 | // BSETn |
4401 | OPCODE(0x08DF) |
4402 | { |
4403 | u32 adr, res; |
4404 | u32 src, dst; |
4405 | |
4406 | FETCH_BYTE(src); |
4407 | src = 1 << (src & 7); |
4408 | adr = AREG(7); |
4409 | AREG(7) += 2; |
4410 | PRE_IO |
4411 | READ_BYTE_F(adr, res) |
4412 | flag_NotZ = res & src; |
4413 | res |= src; |
4414 | WRITE_BYTE_F(adr, res) |
4415 | POST_IO |
4416 | RET(16) |
4417 | } |
4418 | |
4419 | // BSETn |
4420 | OPCODE(0x08E7) |
4421 | { |
4422 | u32 adr, res; |
4423 | u32 src, dst; |
4424 | |
4425 | FETCH_BYTE(src); |
4426 | src = 1 << (src & 7); |
4427 | adr = AREG(7) - 2; |
4428 | AREG(7) = adr; |
4429 | PRE_IO |
4430 | READ_BYTE_F(adr, res) |
4431 | flag_NotZ = res & src; |
4432 | res |= src; |
4433 | WRITE_BYTE_F(adr, res) |
4434 | POST_IO |
4435 | RET(18) |
4436 | } |
4437 | |
4438 | // BTST |
4439 | OPCODE(0x0100) |
4440 | { |
4441 | u32 adr, res; |
4442 | u32 src, dst; |
4443 | |
4444 | src = DREGu32((Opcode >> 9) & 7); |
4445 | src = 1 << (src & 31); |
4446 | res = DREGu32((Opcode >> 0) & 7); |
4447 | flag_NotZ = res & src; |
4448 | RET(6) |
4449 | } |
4450 | |
4451 | // BTST |
4452 | OPCODE(0x0110) |
4453 | { |
4454 | u32 adr, res; |
4455 | u32 src, dst; |
4456 | |
4457 | src = DREGu8((Opcode >> 9) & 7); |
4458 | src = 1 << (src & 7); |
4459 | adr = AREG((Opcode >> 0) & 7); |
4460 | PRE_IO |
4461 | READ_BYTE_F(adr, res) |
4462 | flag_NotZ = res & src; |
4463 | POST_IO |
4464 | RET(8) |
4465 | } |
4466 | |
4467 | // BTST |
4468 | OPCODE(0x0118) |
4469 | { |
4470 | u32 adr, res; |
4471 | u32 src, dst; |
4472 | |
4473 | src = DREGu8((Opcode >> 9) & 7); |
4474 | src = 1 << (src & 7); |
4475 | adr = AREG((Opcode >> 0) & 7); |
4476 | AREG((Opcode >> 0) & 7) += 1; |
4477 | PRE_IO |
4478 | READ_BYTE_F(adr, res) |
4479 | flag_NotZ = res & src; |
4480 | POST_IO |
4481 | RET(8) |
4482 | } |
4483 | |
4484 | // BTST |
4485 | OPCODE(0x0120) |
4486 | { |
4487 | u32 adr, res; |
4488 | u32 src, dst; |
4489 | |
4490 | src = DREGu8((Opcode >> 9) & 7); |
4491 | src = 1 << (src & 7); |
4492 | adr = AREG((Opcode >> 0) & 7) - 1; |
4493 | AREG((Opcode >> 0) & 7) = adr; |
4494 | PRE_IO |
4495 | READ_BYTE_F(adr, res) |
4496 | flag_NotZ = res & src; |
4497 | POST_IO |
4498 | RET(10) |
4499 | } |
4500 | |
4501 | // BTST |
4502 | OPCODE(0x0128) |
4503 | { |
4504 | u32 adr, res; |
4505 | u32 src, dst; |
4506 | |
4507 | src = DREGu8((Opcode >> 9) & 7); |
4508 | src = 1 << (src & 7); |
4509 | FETCH_SWORD(adr); |
4510 | adr += AREG((Opcode >> 0) & 7); |
4511 | PRE_IO |
4512 | READ_BYTE_F(adr, res) |
4513 | flag_NotZ = res & src; |
4514 | POST_IO |
4515 | RET(12) |
4516 | } |
4517 | |
4518 | // BTST |
4519 | OPCODE(0x0130) |
4520 | { |
4521 | u32 adr, res; |
4522 | u32 src, dst; |
4523 | |
4524 | src = DREGu8((Opcode >> 9) & 7); |
4525 | src = 1 << (src & 7); |
4526 | adr = AREG((Opcode >> 0) & 7); |
4527 | DECODE_EXT_WORD |
4528 | PRE_IO |
4529 | READ_BYTE_F(adr, res) |
4530 | flag_NotZ = res & src; |
4531 | POST_IO |
4532 | RET(14) |
4533 | } |
4534 | |
4535 | // BTST |
4536 | OPCODE(0x0138) |
4537 | { |
4538 | u32 adr, res; |
4539 | u32 src, dst; |
4540 | |
4541 | src = DREGu8((Opcode >> 9) & 7); |
4542 | src = 1 << (src & 7); |
4543 | FETCH_SWORD(adr); |
4544 | PRE_IO |
4545 | READ_BYTE_F(adr, res) |
4546 | flag_NotZ = res & src; |
4547 | POST_IO |
4548 | RET(12) |
4549 | } |
4550 | |
4551 | // BTST |
4552 | OPCODE(0x0139) |
4553 | { |
4554 | u32 adr, res; |
4555 | u32 src, dst; |
4556 | |
4557 | src = DREGu8((Opcode >> 9) & 7); |
4558 | src = 1 << (src & 7); |
4559 | FETCH_LONG(adr); |
4560 | PRE_IO |
4561 | READ_BYTE_F(adr, res) |
4562 | flag_NotZ = res & src; |
4563 | POST_IO |
4564 | RET(16) |
4565 | } |
4566 | |
4567 | // BTST |
4568 | OPCODE(0x013A) |
4569 | { |
4570 | u32 adr, res; |
4571 | u32 src, dst; |
4572 | |
4573 | src = DREGu8((Opcode >> 9) & 7); |
4574 | src = 1 << (src & 7); |
4575 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
4576 | PC++; |
4577 | PRE_IO |
4578 | READ_BYTE_F(adr, res) |
4579 | flag_NotZ = res & src; |
4580 | POST_IO |
4581 | RET(12) |
4582 | } |
4583 | |
4584 | // BTST |
4585 | OPCODE(0x013B) |
4586 | { |
4587 | u32 adr, res; |
4588 | u32 src, dst; |
4589 | |
4590 | src = DREGu8((Opcode >> 9) & 7); |
4591 | src = 1 << (src & 7); |
4592 | adr = (u32)(PC) - BasePC; |
4593 | DECODE_EXT_WORD |
4594 | PRE_IO |
4595 | READ_BYTE_F(adr, res) |
4596 | flag_NotZ = res & src; |
4597 | POST_IO |
4598 | RET(14) |
4599 | } |
4600 | |
4601 | // BTST |
4602 | OPCODE(0x013C) |
4603 | { |
4604 | u32 adr, res; |
4605 | u32 src, dst; |
4606 | |
4607 | src = DREGu8((Opcode >> 9) & 7); |
4608 | src = 1 << (src & 7); |
4609 | FETCH_BYTE(res); |
4610 | flag_NotZ = res & src; |
4611 | RET(8) |
4612 | } |
4613 | |
4614 | // BTST |
4615 | OPCODE(0x011F) |
4616 | { |
4617 | u32 adr, res; |
4618 | u32 src, dst; |
4619 | |
4620 | src = DREGu8((Opcode >> 9) & 7); |
4621 | src = 1 << (src & 7); |
4622 | adr = AREG(7); |
4623 | AREG(7) += 2; |
4624 | PRE_IO |
4625 | READ_BYTE_F(adr, res) |
4626 | flag_NotZ = res & src; |
4627 | POST_IO |
4628 | RET(8) |
4629 | } |
4630 | |
4631 | // BTST |
4632 | OPCODE(0x0127) |
4633 | { |
4634 | u32 adr, res; |
4635 | u32 src, dst; |
4636 | |
4637 | src = DREGu8((Opcode >> 9) & 7); |
4638 | src = 1 << (src & 7); |
4639 | adr = AREG(7) - 2; |
4640 | AREG(7) = adr; |
4641 | PRE_IO |
4642 | READ_BYTE_F(adr, res) |
4643 | flag_NotZ = res & src; |
4644 | POST_IO |
4645 | RET(10) |
4646 | } |
4647 | |
4648 | // BCHG |
4649 | OPCODE(0x0140) |
4650 | { |
4651 | u32 adr, res; |
4652 | u32 src, dst; |
4653 | |
4654 | src = DREGu32((Opcode >> 9) & 7); |
4655 | src = 1 << (src & 31); |
4656 | res = DREGu32((Opcode >> 0) & 7); |
4657 | flag_NotZ = res & src; |
4658 | res ^= src; |
4659 | DREGu32((Opcode >> 0) & 7) = res; |
4660 | RET(8) |
4661 | } |
4662 | |
4663 | // BCHG |
4664 | OPCODE(0x0150) |
4665 | { |
4666 | u32 adr, res; |
4667 | u32 src, dst; |
4668 | |
4669 | src = DREGu8((Opcode >> 9) & 7); |
4670 | src = 1 << (src & 7); |
4671 | adr = AREG((Opcode >> 0) & 7); |
4672 | PRE_IO |
4673 | READ_BYTE_F(adr, res) |
4674 | flag_NotZ = res & src; |
4675 | res ^= src; |
4676 | WRITE_BYTE_F(adr, res) |
4677 | POST_IO |
4678 | RET(12) |
4679 | } |
4680 | |
4681 | // BCHG |
4682 | OPCODE(0x0158) |
4683 | { |
4684 | u32 adr, res; |
4685 | u32 src, dst; |
4686 | |
4687 | src = DREGu8((Opcode >> 9) & 7); |
4688 | src = 1 << (src & 7); |
4689 | adr = AREG((Opcode >> 0) & 7); |
4690 | AREG((Opcode >> 0) & 7) += 1; |
4691 | PRE_IO |
4692 | READ_BYTE_F(adr, res) |
4693 | flag_NotZ = res & src; |
4694 | res ^= src; |
4695 | WRITE_BYTE_F(adr, res) |
4696 | POST_IO |
4697 | RET(12) |
4698 | } |
4699 | |
4700 | // BCHG |
4701 | OPCODE(0x0160) |
4702 | { |
4703 | u32 adr, res; |
4704 | u32 src, dst; |
4705 | |
4706 | src = DREGu8((Opcode >> 9) & 7); |
4707 | src = 1 << (src & 7); |
4708 | adr = AREG((Opcode >> 0) & 7) - 1; |
4709 | AREG((Opcode >> 0) & 7) = adr; |
4710 | PRE_IO |
4711 | READ_BYTE_F(adr, res) |
4712 | flag_NotZ = res & src; |
4713 | res ^= src; |
4714 | WRITE_BYTE_F(adr, res) |
4715 | POST_IO |
4716 | RET(14) |
4717 | } |
4718 | |
4719 | // BCHG |
4720 | OPCODE(0x0168) |
4721 | { |
4722 | u32 adr, res; |
4723 | u32 src, dst; |
4724 | |
4725 | src = DREGu8((Opcode >> 9) & 7); |
4726 | src = 1 << (src & 7); |
4727 | FETCH_SWORD(adr); |
4728 | adr += AREG((Opcode >> 0) & 7); |
4729 | PRE_IO |
4730 | READ_BYTE_F(adr, res) |
4731 | flag_NotZ = res & src; |
4732 | res ^= src; |
4733 | WRITE_BYTE_F(adr, res) |
4734 | POST_IO |
4735 | RET(16) |
4736 | } |
4737 | |
4738 | // BCHG |
4739 | OPCODE(0x0170) |
4740 | { |
4741 | u32 adr, res; |
4742 | u32 src, dst; |
4743 | |
4744 | src = DREGu8((Opcode >> 9) & 7); |
4745 | src = 1 << (src & 7); |
4746 | adr = AREG((Opcode >> 0) & 7); |
4747 | DECODE_EXT_WORD |
4748 | PRE_IO |
4749 | READ_BYTE_F(adr, res) |
4750 | flag_NotZ = res & src; |
4751 | res ^= src; |
4752 | WRITE_BYTE_F(adr, res) |
4753 | POST_IO |
4754 | RET(18) |
4755 | } |
4756 | |
4757 | // BCHG |
4758 | OPCODE(0x0178) |
4759 | { |
4760 | u32 adr, res; |
4761 | u32 src, dst; |
4762 | |
4763 | src = DREGu8((Opcode >> 9) & 7); |
4764 | src = 1 << (src & 7); |
4765 | FETCH_SWORD(adr); |
4766 | PRE_IO |
4767 | READ_BYTE_F(adr, res) |
4768 | flag_NotZ = res & src; |
4769 | res ^= src; |
4770 | WRITE_BYTE_F(adr, res) |
4771 | POST_IO |
4772 | RET(16) |
4773 | } |
4774 | |
4775 | // BCHG |
4776 | OPCODE(0x0179) |
4777 | { |
4778 | u32 adr, res; |
4779 | u32 src, dst; |
4780 | |
4781 | src = DREGu8((Opcode >> 9) & 7); |
4782 | src = 1 << (src & 7); |
4783 | FETCH_LONG(adr); |
4784 | PRE_IO |
4785 | READ_BYTE_F(adr, res) |
4786 | flag_NotZ = res & src; |
4787 | res ^= src; |
4788 | WRITE_BYTE_F(adr, res) |
4789 | POST_IO |
4790 | RET(20) |
4791 | } |
4792 | |
4793 | // BCHG |
4794 | OPCODE(0x015F) |
4795 | { |
4796 | u32 adr, res; |
4797 | u32 src, dst; |
4798 | |
4799 | src = DREGu8((Opcode >> 9) & 7); |
4800 | src = 1 << (src & 7); |
4801 | adr = AREG(7); |
4802 | AREG(7) += 2; |
4803 | PRE_IO |
4804 | READ_BYTE_F(adr, res) |
4805 | flag_NotZ = res & src; |
4806 | res ^= src; |
4807 | WRITE_BYTE_F(adr, res) |
4808 | POST_IO |
4809 | RET(12) |
4810 | } |
4811 | |
4812 | // BCHG |
4813 | OPCODE(0x0167) |
4814 | { |
4815 | u32 adr, res; |
4816 | u32 src, dst; |
4817 | |
4818 | src = DREGu8((Opcode >> 9) & 7); |
4819 | src = 1 << (src & 7); |
4820 | adr = AREG(7) - 2; |
4821 | AREG(7) = adr; |
4822 | PRE_IO |
4823 | READ_BYTE_F(adr, res) |
4824 | flag_NotZ = res & src; |
4825 | res ^= src; |
4826 | WRITE_BYTE_F(adr, res) |
4827 | POST_IO |
4828 | RET(14) |
4829 | } |
4830 | |
4831 | // BCLR |
4832 | OPCODE(0x0180) |
4833 | { |
4834 | u32 adr, res; |
4835 | u32 src, dst; |
4836 | |
4837 | src = DREGu32((Opcode >> 9) & 7); |
4838 | src = 1 << (src & 31); |
4839 | res = DREGu32((Opcode >> 0) & 7); |
4840 | flag_NotZ = res & src; |
4841 | res &= ~src; |
4842 | DREGu32((Opcode >> 0) & 7) = res; |
4843 | RET(10) |
4844 | } |
4845 | |
4846 | // BCLR |
4847 | OPCODE(0x0190) |
4848 | { |
4849 | u32 adr, res; |
4850 | u32 src, dst; |
4851 | |
4852 | src = DREGu8((Opcode >> 9) & 7); |
4853 | src = 1 << (src & 7); |
4854 | adr = AREG((Opcode >> 0) & 7); |
4855 | PRE_IO |
4856 | READ_BYTE_F(adr, res) |
4857 | flag_NotZ = res & src; |
4858 | res &= ~src; |
4859 | WRITE_BYTE_F(adr, res) |
4860 | POST_IO |
4861 | RET(12) |
4862 | } |
4863 | |
4864 | // BCLR |
4865 | OPCODE(0x0198) |
4866 | { |
4867 | u32 adr, res; |
4868 | u32 src, dst; |
4869 | |
4870 | src = DREGu8((Opcode >> 9) & 7); |
4871 | src = 1 << (src & 7); |
4872 | adr = AREG((Opcode >> 0) & 7); |
4873 | AREG((Opcode >> 0) & 7) += 1; |
4874 | PRE_IO |
4875 | READ_BYTE_F(adr, res) |
4876 | flag_NotZ = res & src; |
4877 | res &= ~src; |
4878 | WRITE_BYTE_F(adr, res) |
4879 | POST_IO |
4880 | RET(12) |
4881 | } |
4882 | |
4883 | // BCLR |
4884 | OPCODE(0x01A0) |
4885 | { |
4886 | u32 adr, res; |
4887 | u32 src, dst; |
4888 | |
4889 | src = DREGu8((Opcode >> 9) & 7); |
4890 | src = 1 << (src & 7); |
4891 | adr = AREG((Opcode >> 0) & 7) - 1; |
4892 | AREG((Opcode >> 0) & 7) = adr; |
4893 | PRE_IO |
4894 | READ_BYTE_F(adr, res) |
4895 | flag_NotZ = res & src; |
4896 | res &= ~src; |
4897 | WRITE_BYTE_F(adr, res) |
4898 | POST_IO |
4899 | RET(14) |
4900 | } |
4901 | |
4902 | // BCLR |
4903 | OPCODE(0x01A8) |
4904 | { |
4905 | u32 adr, res; |
4906 | u32 src, dst; |
4907 | |
4908 | src = DREGu8((Opcode >> 9) & 7); |
4909 | src = 1 << (src & 7); |
4910 | FETCH_SWORD(adr); |
4911 | adr += AREG((Opcode >> 0) & 7); |
4912 | PRE_IO |
4913 | READ_BYTE_F(adr, res) |
4914 | flag_NotZ = res & src; |
4915 | res &= ~src; |
4916 | WRITE_BYTE_F(adr, res) |
4917 | POST_IO |
4918 | RET(16) |
4919 | } |
4920 | |
4921 | // BCLR |
4922 | OPCODE(0x01B0) |
4923 | { |
4924 | u32 adr, res; |
4925 | u32 src, dst; |
4926 | |
4927 | src = DREGu8((Opcode >> 9) & 7); |
4928 | src = 1 << (src & 7); |
4929 | adr = AREG((Opcode >> 0) & 7); |
4930 | DECODE_EXT_WORD |
4931 | PRE_IO |
4932 | READ_BYTE_F(adr, res) |
4933 | flag_NotZ = res & src; |
4934 | res &= ~src; |
4935 | WRITE_BYTE_F(adr, res) |
4936 | POST_IO |
4937 | RET(18) |
4938 | } |
4939 | |
4940 | // BCLR |
4941 | OPCODE(0x01B8) |
4942 | { |
4943 | u32 adr, res; |
4944 | u32 src, dst; |
4945 | |
4946 | src = DREGu8((Opcode >> 9) & 7); |
4947 | src = 1 << (src & 7); |
4948 | FETCH_SWORD(adr); |
4949 | PRE_IO |
4950 | READ_BYTE_F(adr, res) |
4951 | flag_NotZ = res & src; |
4952 | res &= ~src; |
4953 | WRITE_BYTE_F(adr, res) |
4954 | POST_IO |
4955 | RET(16) |
4956 | } |
4957 | |
4958 | // BCLR |
4959 | OPCODE(0x01B9) |
4960 | { |
4961 | u32 adr, res; |
4962 | u32 src, dst; |
4963 | |
4964 | src = DREGu8((Opcode >> 9) & 7); |
4965 | src = 1 << (src & 7); |
4966 | FETCH_LONG(adr); |
4967 | PRE_IO |
4968 | READ_BYTE_F(adr, res) |
4969 | flag_NotZ = res & src; |
4970 | res &= ~src; |
4971 | WRITE_BYTE_F(adr, res) |
4972 | POST_IO |
4973 | RET(20) |
4974 | } |
4975 | |
4976 | // BCLR |
4977 | OPCODE(0x019F) |
4978 | { |
4979 | u32 adr, res; |
4980 | u32 src, dst; |
4981 | |
4982 | src = DREGu8((Opcode >> 9) & 7); |
4983 | src = 1 << (src & 7); |
4984 | adr = AREG(7); |
4985 | AREG(7) += 2; |
4986 | PRE_IO |
4987 | READ_BYTE_F(adr, res) |
4988 | flag_NotZ = res & src; |
4989 | res &= ~src; |
4990 | WRITE_BYTE_F(adr, res) |
4991 | POST_IO |
4992 | RET(12) |
4993 | } |
4994 | |
4995 | // BCLR |
4996 | OPCODE(0x01A7) |
4997 | { |
4998 | u32 adr, res; |
4999 | u32 src, dst; |
5000 | |
5001 | src = DREGu8((Opcode >> 9) & 7); |
5002 | src = 1 << (src & 7); |
5003 | adr = AREG(7) - 2; |
5004 | AREG(7) = adr; |
5005 | PRE_IO |
5006 | READ_BYTE_F(adr, res) |
5007 | flag_NotZ = res & src; |
5008 | res &= ~src; |
5009 | WRITE_BYTE_F(adr, res) |
5010 | POST_IO |
5011 | RET(14) |
5012 | } |
5013 | |
5014 | // BSET |
5015 | OPCODE(0x01C0) |
5016 | { |
5017 | u32 adr, res; |
5018 | u32 src, dst; |
5019 | |
5020 | src = DREGu32((Opcode >> 9) & 7); |
5021 | src = 1 << (src & 31); |
5022 | res = DREGu32((Opcode >> 0) & 7); |
5023 | flag_NotZ = res & src; |
5024 | res |= src; |
5025 | DREGu32((Opcode >> 0) & 7) = res; |
5026 | RET(8) |
5027 | } |
5028 | |
5029 | // BSET |
5030 | OPCODE(0x01D0) |
5031 | { |
5032 | u32 adr, res; |
5033 | u32 src, dst; |
5034 | |
5035 | src = DREGu8((Opcode >> 9) & 7); |
5036 | src = 1 << (src & 7); |
5037 | adr = AREG((Opcode >> 0) & 7); |
5038 | PRE_IO |
5039 | READ_BYTE_F(adr, res) |
5040 | flag_NotZ = res & src; |
5041 | res |= src; |
5042 | WRITE_BYTE_F(adr, res) |
5043 | POST_IO |
5044 | RET(12) |
5045 | } |
5046 | |
5047 | // BSET |
5048 | OPCODE(0x01D8) |
5049 | { |
5050 | u32 adr, res; |
5051 | u32 src, dst; |
5052 | |
5053 | src = DREGu8((Opcode >> 9) & 7); |
5054 | src = 1 << (src & 7); |
5055 | adr = AREG((Opcode >> 0) & 7); |
5056 | AREG((Opcode >> 0) & 7) += 1; |
5057 | PRE_IO |
5058 | READ_BYTE_F(adr, res) |
5059 | flag_NotZ = res & src; |
5060 | res |= src; |
5061 | WRITE_BYTE_F(adr, res) |
5062 | POST_IO |
5063 | RET(12) |
5064 | } |
5065 | |
5066 | // BSET |
5067 | OPCODE(0x01E0) |
5068 | { |
5069 | u32 adr, res; |
5070 | u32 src, dst; |
5071 | |
5072 | src = DREGu8((Opcode >> 9) & 7); |
5073 | src = 1 << (src & 7); |
5074 | adr = AREG((Opcode >> 0) & 7) - 1; |
5075 | AREG((Opcode >> 0) & 7) = adr; |
5076 | PRE_IO |
5077 | READ_BYTE_F(adr, res) |
5078 | flag_NotZ = res & src; |
5079 | res |= src; |
5080 | WRITE_BYTE_F(adr, res) |
5081 | POST_IO |
5082 | RET(14) |
5083 | } |
5084 | |
5085 | // BSET |
5086 | OPCODE(0x01E8) |
5087 | { |
5088 | u32 adr, res; |
5089 | u32 src, dst; |
5090 | |
5091 | src = DREGu8((Opcode >> 9) & 7); |
5092 | src = 1 << (src & 7); |
5093 | FETCH_SWORD(adr); |
5094 | adr += AREG((Opcode >> 0) & 7); |
5095 | PRE_IO |
5096 | READ_BYTE_F(adr, res) |
5097 | flag_NotZ = res & src; |
5098 | res |= src; |
5099 | WRITE_BYTE_F(adr, res) |
5100 | POST_IO |
5101 | RET(16) |
5102 | } |
5103 | |
5104 | // BSET |
5105 | OPCODE(0x01F0) |
5106 | { |
5107 | u32 adr, res; |
5108 | u32 src, dst; |
5109 | |
5110 | src = DREGu8((Opcode >> 9) & 7); |
5111 | src = 1 << (src & 7); |
5112 | adr = AREG((Opcode >> 0) & 7); |
5113 | DECODE_EXT_WORD |
5114 | PRE_IO |
5115 | READ_BYTE_F(adr, res) |
5116 | flag_NotZ = res & src; |
5117 | res |= src; |
5118 | WRITE_BYTE_F(adr, res) |
5119 | POST_IO |
5120 | RET(18) |
5121 | } |
5122 | |
5123 | // BSET |
5124 | OPCODE(0x01F8) |
5125 | { |
5126 | u32 adr, res; |
5127 | u32 src, dst; |
5128 | |
5129 | src = DREGu8((Opcode >> 9) & 7); |
5130 | src = 1 << (src & 7); |
5131 | FETCH_SWORD(adr); |
5132 | PRE_IO |
5133 | READ_BYTE_F(adr, res) |
5134 | flag_NotZ = res & src; |
5135 | res |= src; |
5136 | WRITE_BYTE_F(adr, res) |
5137 | POST_IO |
5138 | RET(16) |
5139 | } |
5140 | |
5141 | // BSET |
5142 | OPCODE(0x01F9) |
5143 | { |
5144 | u32 adr, res; |
5145 | u32 src, dst; |
5146 | |
5147 | src = DREGu8((Opcode >> 9) & 7); |
5148 | src = 1 << (src & 7); |
5149 | FETCH_LONG(adr); |
5150 | PRE_IO |
5151 | READ_BYTE_F(adr, res) |
5152 | flag_NotZ = res & src; |
5153 | res |= src; |
5154 | WRITE_BYTE_F(adr, res) |
5155 | POST_IO |
5156 | RET(20) |
5157 | } |
5158 | |
5159 | // BSET |
5160 | OPCODE(0x01DF) |
5161 | { |
5162 | u32 adr, res; |
5163 | u32 src, dst; |
5164 | |
5165 | src = DREGu8((Opcode >> 9) & 7); |
5166 | src = 1 << (src & 7); |
5167 | adr = AREG(7); |
5168 | AREG(7) += 2; |
5169 | PRE_IO |
5170 | READ_BYTE_F(adr, res) |
5171 | flag_NotZ = res & src; |
5172 | res |= src; |
5173 | WRITE_BYTE_F(adr, res) |
5174 | POST_IO |
5175 | RET(12) |
5176 | } |
5177 | |
5178 | // BSET |
5179 | OPCODE(0x01E7) |
5180 | { |
5181 | u32 adr, res; |
5182 | u32 src, dst; |
5183 | |
5184 | src = DREGu8((Opcode >> 9) & 7); |
5185 | src = 1 << (src & 7); |
5186 | adr = AREG(7) - 2; |
5187 | AREG(7) = adr; |
5188 | PRE_IO |
5189 | READ_BYTE_F(adr, res) |
5190 | flag_NotZ = res & src; |
5191 | res |= src; |
5192 | WRITE_BYTE_F(adr, res) |
5193 | POST_IO |
5194 | RET(14) |
5195 | } |
5196 | |
5197 | // MOVEPWaD |
5198 | OPCODE(0x0108) |
5199 | { |
5200 | u32 adr, res; |
5201 | u32 src, dst; |
5202 | |
5203 | FETCH_SWORD(adr); |
5204 | adr += AREG((Opcode >> 0) & 7); |
5205 | PRE_IO |
5206 | READ_BYTE_F(adr + 0, res) |
5207 | READ_BYTE_F(adr + 2, src) |
5208 | DREGu16((Opcode >> 9) & 7) = (res << 8) | src; |
5209 | POST_IO |
03e4f2a3 |
5210 | #ifdef USE_CYCLONE_TIMING |
5211 | RET(16) |
5212 | #else |
70357ce5 |
5213 | RET(24) |
03e4f2a3 |
5214 | #endif |
70357ce5 |
5215 | } |
5216 | |
5217 | // MOVEPLaD |
5218 | OPCODE(0x0148) |
5219 | { |
5220 | u32 adr, res; |
5221 | u32 src, dst; |
5222 | |
5223 | FETCH_SWORD(adr); |
5224 | adr += AREG((Opcode >> 0) & 7); |
5225 | PRE_IO |
5226 | READ_BYTE_F(adr, res) |
5227 | res <<= 24; |
5228 | adr += 2; |
5229 | READ_BYTE_F(adr, src) |
5230 | res |= src << 16; |
5231 | adr += 2; |
5232 | READ_BYTE_F(adr, src) |
5233 | res |= src << 8; |
5234 | adr += 2; |
5235 | READ_BYTE_F(adr, src) |
5236 | DREG((Opcode >> 9) & 7) = res | src; |
5237 | POST_IO |
03e4f2a3 |
5238 | #ifdef USE_CYCLONE_TIMING |
5239 | RET(24) |
5240 | #else |
70357ce5 |
5241 | RET(32) |
03e4f2a3 |
5242 | #endif |
70357ce5 |
5243 | } |
5244 | |
5245 | // MOVEPWDa |
5246 | OPCODE(0x0188) |
5247 | { |
5248 | u32 adr, res; |
5249 | u32 src, dst; |
5250 | |
5251 | res = DREGu32((Opcode >> 9) & 7); |
5252 | FETCH_SWORD(adr); |
5253 | adr += AREG((Opcode >> 0) & 7); |
5254 | PRE_IO |
5255 | WRITE_BYTE_F(adr + 0, res >> 8) |
5256 | WRITE_BYTE_F(adr + 2, res >> 0) |
5257 | POST_IO |
03e4f2a3 |
5258 | #ifdef USE_CYCLONE_TIMING |
5259 | RET(16) |
5260 | #else |
70357ce5 |
5261 | RET(24) |
03e4f2a3 |
5262 | #endif |
70357ce5 |
5263 | } |
5264 | |
5265 | // MOVEPLDa |
5266 | OPCODE(0x01C8) |
5267 | { |
5268 | u32 adr, res; |
5269 | u32 src, dst; |
5270 | |
5271 | res = DREGu32((Opcode >> 9) & 7); |
5272 | FETCH_SWORD(adr); |
5273 | adr += AREG((Opcode >> 0) & 7); |
5274 | PRE_IO |
5275 | WRITE_BYTE_F(adr, res >> 24) |
5276 | adr += 2; |
5277 | WRITE_BYTE_F(adr, res >> 16) |
5278 | adr += 2; |
5279 | WRITE_BYTE_F(adr, res >> 8) |
5280 | adr += 2; |
5281 | WRITE_BYTE_F(adr, res >> 0) |
5282 | POST_IO |
03e4f2a3 |
5283 | #ifdef USE_CYCLONE_TIMING |
5284 | RET(24) |
5285 | #else |
70357ce5 |
5286 | RET(32) |
03e4f2a3 |
5287 | #endif |
70357ce5 |
5288 | } |
5289 | |
5290 | // MOVEB |
5291 | OPCODE(0x1000) |
5292 | { |
5293 | u32 adr, res; |
5294 | u32 src, dst; |
5295 | |
5296 | res = DREGu8((Opcode >> 0) & 7); |
5297 | flag_C = 0; |
5298 | flag_V = 0; |
5299 | flag_NotZ = res; |
5300 | flag_N = res; |
5301 | DREGu8((Opcode >> 9) & 7) = res; |
5302 | RET(4) |
5303 | } |
5304 | |
5305 | // MOVEB |
5306 | OPCODE(0x1080) |
5307 | { |
5308 | u32 adr, res; |
5309 | u32 src, dst; |
5310 | |
5311 | res = DREGu8((Opcode >> 0) & 7); |
5312 | flag_C = 0; |
5313 | flag_V = 0; |
5314 | flag_NotZ = res; |
5315 | flag_N = res; |
5316 | adr = AREG((Opcode >> 9) & 7); |
5317 | PRE_IO |
5318 | WRITE_BYTE_F(adr, res) |
5319 | POST_IO |
5320 | RET(8) |
5321 | } |
5322 | |
5323 | // MOVEB |
5324 | OPCODE(0x10C0) |
5325 | { |
5326 | u32 adr, res; |
5327 | u32 src, dst; |
5328 | |
5329 | res = DREGu8((Opcode >> 0) & 7); |
5330 | flag_C = 0; |
5331 | flag_V = 0; |
5332 | flag_NotZ = res; |
5333 | flag_N = res; |
5334 | adr = AREG((Opcode >> 9) & 7); |
5335 | AREG((Opcode >> 9) & 7) += 1; |
5336 | PRE_IO |
5337 | WRITE_BYTE_F(adr, res) |
5338 | POST_IO |
5339 | RET(8) |
5340 | } |
5341 | |
5342 | // MOVEB |
5343 | OPCODE(0x1100) |
5344 | { |
5345 | u32 adr, res; |
5346 | u32 src, dst; |
5347 | |
5348 | res = DREGu8((Opcode >> 0) & 7); |
5349 | flag_C = 0; |
5350 | flag_V = 0; |
5351 | flag_NotZ = res; |
5352 | flag_N = res; |
5353 | adr = AREG((Opcode >> 9) & 7) - 1; |
5354 | AREG((Opcode >> 9) & 7) = adr; |
5355 | PRE_IO |
5356 | WRITE_BYTE_F(adr, res) |
5357 | POST_IO |
5358 | RET(8) |
5359 | } |
5360 | |
5361 | // MOVEB |
5362 | OPCODE(0x1140) |
5363 | { |
5364 | u32 adr, res; |
5365 | u32 src, dst; |
5366 | |
5367 | res = DREGu8((Opcode >> 0) & 7); |
5368 | flag_C = 0; |
5369 | flag_V = 0; |
5370 | flag_NotZ = res; |
5371 | flag_N = res; |
5372 | FETCH_SWORD(adr); |
5373 | adr += AREG((Opcode >> 9) & 7); |
5374 | PRE_IO |
5375 | WRITE_BYTE_F(adr, res) |
5376 | POST_IO |
5377 | RET(12) |
5378 | } |
5379 | |
5380 | // MOVEB |
5381 | OPCODE(0x1180) |
5382 | { |
5383 | u32 adr, res; |
5384 | u32 src, dst; |
5385 | |
5386 | res = DREGu8((Opcode >> 0) & 7); |
5387 | flag_C = 0; |
5388 | flag_V = 0; |
5389 | flag_NotZ = res; |
5390 | flag_N = res; |
5391 | adr = AREG((Opcode >> 9) & 7); |
5392 | DECODE_EXT_WORD |
5393 | PRE_IO |
5394 | WRITE_BYTE_F(adr, res) |
5395 | POST_IO |
5396 | RET(14) |
5397 | } |
5398 | |
5399 | // MOVEB |
5400 | OPCODE(0x11C0) |
5401 | { |
5402 | u32 adr, res; |
5403 | u32 src, dst; |
5404 | |
5405 | res = DREGu8((Opcode >> 0) & 7); |
5406 | flag_C = 0; |
5407 | flag_V = 0; |
5408 | flag_NotZ = res; |
5409 | flag_N = res; |
5410 | FETCH_SWORD(adr); |
5411 | PRE_IO |
5412 | WRITE_BYTE_F(adr, res) |
5413 | POST_IO |
5414 | RET(12) |
5415 | } |
5416 | |
5417 | // MOVEB |
5418 | OPCODE(0x13C0) |
5419 | { |
5420 | u32 adr, res; |
5421 | u32 src, dst; |
5422 | |
5423 | res = DREGu8((Opcode >> 0) & 7); |
5424 | flag_C = 0; |
5425 | flag_V = 0; |
5426 | flag_NotZ = res; |
5427 | flag_N = res; |
5428 | FETCH_LONG(adr); |
5429 | PRE_IO |
5430 | WRITE_BYTE_F(adr, res) |
5431 | POST_IO |
5432 | RET(16) |
5433 | } |
5434 | |
5435 | // MOVEB |
5436 | OPCODE(0x1EC0) |
5437 | { |
5438 | u32 adr, res; |
5439 | u32 src, dst; |
5440 | |
5441 | res = DREGu8((Opcode >> 0) & 7); |
5442 | flag_C = 0; |
5443 | flag_V = 0; |
5444 | flag_NotZ = res; |
5445 | flag_N = res; |
5446 | adr = AREG(7); |
5447 | AREG(7) += 2; |
5448 | PRE_IO |
5449 | WRITE_BYTE_F(adr, res) |
5450 | POST_IO |
5451 | RET(8) |
5452 | } |
5453 | |
5454 | // MOVEB |
5455 | OPCODE(0x1F00) |
5456 | { |
5457 | u32 adr, res; |
5458 | u32 src, dst; |
5459 | |
5460 | res = DREGu8((Opcode >> 0) & 7); |
5461 | flag_C = 0; |
5462 | flag_V = 0; |
5463 | flag_NotZ = res; |
5464 | flag_N = res; |
5465 | adr = AREG(7) - 2; |
5466 | AREG(7) = adr; |
5467 | PRE_IO |
5468 | WRITE_BYTE_F(adr, res) |
5469 | POST_IO |
5470 | RET(8) |
5471 | } |
5472 | |
03e4f2a3 |
5473 | #if 0 |
70357ce5 |
5474 | // MOVEB |
5475 | OPCODE(0x1008) |
5476 | { |
5477 | u32 adr, res; |
5478 | u32 src, dst; |
5479 | |
5480 | // can't read byte from Ax registers ! |
5481 | m68kcontext.execinfo |= M68K_FAULTED; |
5482 | m68kcontext.io_cycle_counter = 0; |
5483 | /* |
5484 | goto famec_Exec_End; |
5485 | flag_C = 0; |
5486 | flag_V = 0; |
5487 | flag_NotZ = res; |
5488 | flag_N = res; |
5489 | DREGu8((Opcode >> 9) & 7) = res; |
5490 | */ |
5491 | RET(4) |
5492 | } |
5493 | |
5494 | // MOVEB |
5495 | OPCODE(0x1088) |
5496 | { |
5497 | u32 adr, res; |
5498 | u32 src, dst; |
5499 | |
5500 | // can't read byte from Ax registers ! |
5501 | m68kcontext.execinfo |= M68K_FAULTED; |
5502 | m68kcontext.io_cycle_counter = 0; |
5503 | /* |
5504 | goto famec_Exec_End; |
5505 | flag_C = 0; |
5506 | flag_V = 0; |
5507 | flag_NotZ = res; |
5508 | flag_N = res; |
5509 | adr = AREG((Opcode >> 9) & 7); |
5510 | PRE_IO |
5511 | WRITE_BYTE_F(adr, res) |
5512 | POST_IO |
5513 | */ |
5514 | RET(8) |
5515 | } |
5516 | |
5517 | // MOVEB |
5518 | OPCODE(0x10C8) |
5519 | { |
5520 | u32 adr, res; |
5521 | u32 src, dst; |
5522 | |
5523 | // can't read byte from Ax registers ! |
5524 | m68kcontext.execinfo |= M68K_FAULTED; |
5525 | m68kcontext.io_cycle_counter = 0; |
5526 | /* |
5527 | goto famec_Exec_End; |
5528 | flag_C = 0; |
5529 | flag_V = 0; |
5530 | flag_NotZ = res; |
5531 | flag_N = res; |
5532 | adr = AREG((Opcode >> 9) & 7); |
5533 | AREG((Opcode >> 9) & 7) += 1; |
5534 | PRE_IO |
5535 | WRITE_BYTE_F(adr, res) |
5536 | POST_IO |
5537 | */ |
5538 | RET(8) |
5539 | } |
5540 | |
5541 | // MOVEB |
5542 | OPCODE(0x1108) |
5543 | { |
5544 | u32 adr, res; |
5545 | u32 src, dst; |
5546 | |
5547 | // can't read byte from Ax registers ! |
5548 | m68kcontext.execinfo |= M68K_FAULTED; |
5549 | m68kcontext.io_cycle_counter = 0; |
5550 | /* |
5551 | goto famec_Exec_End; |
5552 | flag_C = 0; |
5553 | flag_V = 0; |
5554 | flag_NotZ = res; |
5555 | flag_N = res; |
5556 | adr = AREG((Opcode >> 9) & 7) - 1; |
5557 | AREG((Opcode >> 9) & 7) = adr; |
5558 | PRE_IO |
5559 | WRITE_BYTE_F(adr, res) |
5560 | POST_IO |
5561 | */ |
5562 | RET(8) |
5563 | } |
5564 | |
5565 | // MOVEB |
5566 | OPCODE(0x1148) |
5567 | { |
5568 | u32 adr, res; |
5569 | u32 src, dst; |
5570 | |
5571 | // can't read byte from Ax registers ! |
5572 | m68kcontext.execinfo |= M68K_FAULTED; |
5573 | m68kcontext.io_cycle_counter = 0; |
5574 | /* |
5575 | goto famec_Exec_End; |
5576 | flag_C = 0; |
5577 | flag_V = 0; |
5578 | flag_NotZ = res; |
5579 | flag_N = res; |
5580 | FETCH_SWORD(adr); |
5581 | adr += AREG((Opcode >> 9) & 7); |
5582 | PRE_IO |
5583 | WRITE_BYTE_F(adr, res) |
5584 | POST_IO |
5585 | */ |
5586 | RET(12) |
5587 | } |
5588 | |
5589 | // MOVEB |
5590 | OPCODE(0x1188) |
5591 | { |
5592 | u32 adr, res; |
5593 | u32 src, dst; |
5594 | |
5595 | // can't read byte from Ax registers ! |
5596 | m68kcontext.execinfo |= M68K_FAULTED; |
5597 | m68kcontext.io_cycle_counter = 0; |
5598 | /* |
5599 | goto famec_Exec_End; |
5600 | flag_C = 0; |
5601 | flag_V = 0; |
5602 | flag_NotZ = res; |
5603 | flag_N = res; |
5604 | adr = AREG((Opcode >> 9) & 7); |
5605 | DECODE_EXT_WORD |
5606 | PRE_IO |
5607 | WRITE_BYTE_F(adr, res) |
5608 | POST_IO |
5609 | */ |
5610 | RET(14) |
5611 | } |
5612 | |
5613 | // MOVEB |
5614 | OPCODE(0x11C8) |
5615 | { |
5616 | u32 adr, res; |
5617 | u32 src, dst; |
5618 | |
5619 | // can't read byte from Ax registers ! |
5620 | m68kcontext.execinfo |= M68K_FAULTED; |
5621 | m68kcontext.io_cycle_counter = 0; |
5622 | /* |
5623 | goto famec_Exec_End; |
5624 | flag_C = 0; |
5625 | flag_V = 0; |
5626 | flag_NotZ = res; |
5627 | flag_N = res; |
5628 | FETCH_SWORD(adr); |
5629 | PRE_IO |
5630 | WRITE_BYTE_F(adr, res) |
5631 | POST_IO |
5632 | */ |
5633 | RET(12) |
5634 | } |
5635 | |
5636 | // MOVEB |
5637 | OPCODE(0x13C8) |
5638 | { |
5639 | u32 adr, res; |
5640 | u32 src, dst; |
5641 | |
5642 | // can't read byte from Ax registers ! |
5643 | m68kcontext.execinfo |= M68K_FAULTED; |
5644 | m68kcontext.io_cycle_counter = 0; |
5645 | /* |
5646 | goto famec_Exec_End; |
5647 | flag_C = 0; |
5648 | flag_V = 0; |
5649 | flag_NotZ = res; |
5650 | flag_N = res; |
5651 | FETCH_LONG(adr); |
5652 | PRE_IO |
5653 | WRITE_BYTE_F(adr, res) |
5654 | POST_IO |
5655 | */ |
5656 | RET(16) |
5657 | } |
5658 | |
5659 | // MOVEB |
5660 | OPCODE(0x1EC8) |
5661 | { |
5662 | u32 adr, res; |
5663 | u32 src, dst; |
5664 | |
5665 | // can't read byte from Ax registers ! |
5666 | m68kcontext.execinfo |= M68K_FAULTED; |
5667 | m68kcontext.io_cycle_counter = 0; |
5668 | /* |
5669 | goto famec_Exec_End; |
5670 | flag_C = 0; |
5671 | flag_V = 0; |
5672 | flag_NotZ = res; |
5673 | flag_N = res; |
5674 | adr = AREG(7); |
5675 | AREG(7) += 2; |
5676 | PRE_IO |
5677 | WRITE_BYTE_F(adr, res) |
5678 | POST_IO |
5679 | */ |
5680 | RET(8) |
5681 | } |
5682 | |
5683 | // MOVEB |
5684 | OPCODE(0x1F08) |
5685 | { |
5686 | u32 adr, res; |
5687 | u32 src, dst; |
5688 | |
5689 | // can't read byte from Ax registers ! |
5690 | m68kcontext.execinfo |= M68K_FAULTED; |
5691 | m68kcontext.io_cycle_counter = 0; |
5692 | /* |
5693 | goto famec_Exec_End; |
5694 | flag_C = 0; |
5695 | flag_V = 0; |
5696 | flag_NotZ = res; |
5697 | flag_N = res; |
5698 | adr = AREG(7) - 2; |
5699 | AREG(7) = adr; |
5700 | PRE_IO |
5701 | WRITE_BYTE_F(adr, res) |
5702 | POST_IO |
5703 | */ |
5704 | RET(8) |
5705 | } |
03e4f2a3 |
5706 | #endif |
70357ce5 |
5707 | |
5708 | // MOVEB |
5709 | OPCODE(0x1010) |
5710 | { |
5711 | u32 adr, res; |
5712 | u32 src, dst; |
5713 | |
5714 | adr = AREG((Opcode >> 0) & 7); |
5715 | PRE_IO |
5716 | READ_BYTE_F(adr, res) |
5717 | flag_C = 0; |
5718 | flag_V = 0; |
5719 | flag_NotZ = res; |
5720 | flag_N = res; |
5721 | DREGu8((Opcode >> 9) & 7) = res; |
5722 | POST_IO |
5723 | RET(8) |
5724 | } |
5725 | |
5726 | // MOVEB |
5727 | OPCODE(0x1090) |
5728 | { |
5729 | u32 adr, res; |
5730 | u32 src, dst; |
5731 | |
5732 | adr = AREG((Opcode >> 0) & 7); |
5733 | PRE_IO |
5734 | READ_BYTE_F(adr, res) |
5735 | flag_C = 0; |
5736 | flag_V = 0; |
5737 | flag_NotZ = res; |
5738 | flag_N = res; |
5739 | adr = AREG((Opcode >> 9) & 7); |
5740 | WRITE_BYTE_F(adr, res) |
5741 | POST_IO |
5742 | RET(12) |
5743 | } |
5744 | |
5745 | // MOVEB |
5746 | OPCODE(0x10D0) |
5747 | { |
5748 | u32 adr, res; |
5749 | u32 src, dst; |
5750 | |
5751 | adr = AREG((Opcode >> 0) & 7); |
5752 | PRE_IO |
5753 | READ_BYTE_F(adr, res) |
5754 | flag_C = 0; |
5755 | flag_V = 0; |
5756 | flag_NotZ = res; |
5757 | flag_N = res; |
5758 | adr = AREG((Opcode >> 9) & 7); |
5759 | AREG((Opcode >> 9) & 7) += 1; |
5760 | WRITE_BYTE_F(adr, res) |
5761 | POST_IO |
5762 | RET(12) |
5763 | } |
5764 | |
5765 | // MOVEB |
5766 | OPCODE(0x1110) |
5767 | { |
5768 | u32 adr, res; |
5769 | u32 src, dst; |
5770 | |
5771 | adr = AREG((Opcode >> 0) & 7); |
5772 | PRE_IO |
5773 | READ_BYTE_F(adr, res) |
5774 | flag_C = 0; |
5775 | flag_V = 0; |
5776 | flag_NotZ = res; |
5777 | flag_N = res; |
5778 | adr = AREG((Opcode >> 9) & 7) - 1; |
5779 | AREG((Opcode >> 9) & 7) = adr; |
5780 | WRITE_BYTE_F(adr, res) |
5781 | POST_IO |
5782 | RET(12) |
5783 | } |
5784 | |
5785 | // MOVEB |
5786 | OPCODE(0x1150) |
5787 | { |
5788 | u32 adr, res; |
5789 | u32 src, dst; |
5790 | |
5791 | adr = AREG((Opcode >> 0) & 7); |
5792 | PRE_IO |
5793 | READ_BYTE_F(adr, res) |
5794 | flag_C = 0; |
5795 | flag_V = 0; |
5796 | flag_NotZ = res; |
5797 | flag_N = res; |
5798 | FETCH_SWORD(adr); |
5799 | adr += AREG((Opcode >> 9) & 7); |
5800 | WRITE_BYTE_F(adr, res) |
5801 | POST_IO |
5802 | RET(16) |
5803 | } |
5804 | |
5805 | // MOVEB |
5806 | OPCODE(0x1190) |
5807 | { |
5808 | u32 adr, res; |
5809 | u32 src, dst; |
5810 | |
5811 | adr = AREG((Opcode >> 0) & 7); |
5812 | PRE_IO |
5813 | READ_BYTE_F(adr, res) |
5814 | flag_C = 0; |
5815 | flag_V = 0; |
5816 | flag_NotZ = res; |
5817 | flag_N = res; |
5818 | adr = AREG((Opcode >> 9) & 7); |
5819 | DECODE_EXT_WORD |
5820 | WRITE_BYTE_F(adr, res) |
5821 | POST_IO |
5822 | RET(18) |
5823 | } |
5824 | |
5825 | // MOVEB |
5826 | OPCODE(0x11D0) |
5827 | { |
5828 | u32 adr, res; |
5829 | u32 src, dst; |
5830 | |
5831 | adr = AREG((Opcode >> 0) & 7); |
5832 | PRE_IO |
5833 | READ_BYTE_F(adr, res) |
5834 | flag_C = 0; |
5835 | flag_V = 0; |
5836 | flag_NotZ = res; |
5837 | flag_N = res; |
5838 | FETCH_SWORD(adr); |
5839 | WRITE_BYTE_F(adr, res) |
5840 | POST_IO |
5841 | RET(16) |
5842 | } |
5843 | |
5844 | // MOVEB |
5845 | OPCODE(0x13D0) |
5846 | { |
5847 | u32 adr, res; |
5848 | u32 src, dst; |
5849 | |
5850 | adr = AREG((Opcode >> 0) & 7); |
5851 | PRE_IO |
5852 | READ_BYTE_F(adr, res) |
5853 | flag_C = 0; |
5854 | flag_V = 0; |
5855 | flag_NotZ = res; |
5856 | flag_N = res; |
5857 | FETCH_LONG(adr); |
5858 | WRITE_BYTE_F(adr, res) |
5859 | POST_IO |
5860 | RET(20) |
5861 | } |
5862 | |
5863 | // MOVEB |
5864 | OPCODE(0x1ED0) |
5865 | { |
5866 | u32 adr, res; |
5867 | u32 src, dst; |
5868 | |
5869 | adr = AREG((Opcode >> 0) & 7); |
5870 | PRE_IO |
5871 | READ_BYTE_F(adr, res) |
5872 | flag_C = 0; |
5873 | flag_V = 0; |
5874 | flag_NotZ = res; |
5875 | flag_N = res; |
5876 | adr = AREG(7); |
5877 | AREG(7) += 2; |
5878 | WRITE_BYTE_F(adr, res) |
5879 | POST_IO |
5880 | RET(12) |
5881 | } |
5882 | |
5883 | // MOVEB |
5884 | OPCODE(0x1F10) |
5885 | { |
5886 | u32 adr, res; |
5887 | u32 src, dst; |
5888 | |
5889 | adr = AREG((Opcode >> 0) & 7); |
5890 | PRE_IO |
5891 | READ_BYTE_F(adr, res) |
5892 | flag_C = 0; |
5893 | flag_V = 0; |
5894 | flag_NotZ = res; |
5895 | flag_N = res; |
5896 | adr = AREG(7) - 2; |
5897 | AREG(7) = adr; |
5898 | WRITE_BYTE_F(adr, res) |
5899 | POST_IO |
5900 | RET(12) |
5901 | } |
5902 | |
5903 | // MOVEB |
5904 | OPCODE(0x1018) |
5905 | { |
5906 | u32 adr, res; |
5907 | u32 src, dst; |
5908 | |
5909 | adr = AREG((Opcode >> 0) & 7); |
5910 | AREG((Opcode >> 0) & 7) += 1; |
5911 | PRE_IO |
5912 | READ_BYTE_F(adr, res) |
5913 | flag_C = 0; |
5914 | flag_V = 0; |
5915 | flag_NotZ = res; |
5916 | flag_N = res; |
5917 | DREGu8((Opcode >> 9) & 7) = res; |
5918 | POST_IO |
5919 | RET(8) |
5920 | } |
5921 | |
5922 | // MOVEB |
5923 | OPCODE(0x1098) |
5924 | { |
5925 | u32 adr, res; |
5926 | u32 src, dst; |
5927 | |
5928 | adr = AREG((Opcode >> 0) & 7); |
5929 | AREG((Opcode >> 0) & 7) += 1; |
5930 | PRE_IO |
5931 | READ_BYTE_F(adr, res) |
5932 | flag_C = 0; |
5933 | flag_V = 0; |
5934 | flag_NotZ = res; |
5935 | flag_N = res; |
5936 | adr = AREG((Opcode >> 9) & 7); |
5937 | WRITE_BYTE_F(adr, res) |
5938 | POST_IO |
5939 | RET(12) |
5940 | } |
5941 | |
5942 | // MOVEB |
5943 | OPCODE(0x10D8) |
5944 | { |
5945 | u32 adr, res; |
5946 | u32 src, dst; |
5947 | |
5948 | adr = AREG((Opcode >> 0) & 7); |
5949 | AREG((Opcode >> 0) & 7) += 1; |
5950 | PRE_IO |
5951 | READ_BYTE_F(adr, res) |
5952 | flag_C = 0; |
5953 | flag_V = 0; |
5954 | flag_NotZ = res; |
5955 | flag_N = res; |
5956 | adr = AREG((Opcode >> 9) & 7); |
5957 | AREG((Opcode >> 9) & 7) += 1; |
5958 | WRITE_BYTE_F(adr, res) |
5959 | POST_IO |
5960 | RET(12) |
5961 | } |
5962 | |
5963 | // MOVEB |
5964 | OPCODE(0x1118) |
5965 | { |
5966 | u32 adr, res; |
5967 | u32 src, dst; |
5968 | |
5969 | adr = AREG((Opcode >> 0) & 7); |
5970 | AREG((Opcode >> 0) & 7) += 1; |
5971 | PRE_IO |
5972 | READ_BYTE_F(adr, res) |
5973 | flag_C = 0; |
5974 | flag_V = 0; |
5975 | flag_NotZ = res; |
5976 | flag_N = res; |
5977 | adr = AREG((Opcode >> 9) & 7) - 1; |
5978 | AREG((Opcode >> 9) & 7) = adr; |
5979 | WRITE_BYTE_F(adr, res) |
5980 | POST_IO |
5981 | RET(12) |
5982 | } |
5983 | |
5984 | // MOVEB |
5985 | OPCODE(0x1158) |
5986 | { |
5987 | u32 adr, res; |
5988 | u32 src, dst; |
5989 | |
5990 | adr = AREG((Opcode >> 0) & 7); |
5991 | AREG((Opcode >> 0) & 7) += 1; |
5992 | PRE_IO |
5993 | READ_BYTE_F(adr, res) |
5994 | flag_C = 0; |
5995 | flag_V = 0; |
5996 | flag_NotZ = res; |
5997 | flag_N = res; |
5998 | FETCH_SWORD(adr); |
5999 | adr += AREG((Opcode >> 9) & 7); |
6000 | WRITE_BYTE_F(adr, res) |
6001 | POST_IO |
6002 | RET(16) |
6003 | } |
6004 | |
6005 | // MOVEB |
6006 | OPCODE(0x1198) |
6007 | { |
6008 | u32 adr, res; |
6009 | u32 src, dst; |
6010 | |
6011 | adr = AREG((Opcode >> 0) & 7); |
6012 | AREG((Opcode >> 0) & 7) += 1; |
6013 | PRE_IO |
6014 | READ_BYTE_F(adr, res) |
6015 | flag_C = 0; |
6016 | flag_V = 0; |
6017 | flag_NotZ = res; |
6018 | flag_N = res; |
6019 | adr = AREG((Opcode >> 9) & 7); |
6020 | DECODE_EXT_WORD |
6021 | WRITE_BYTE_F(adr, res) |
6022 | POST_IO |
6023 | RET(18) |
6024 | } |
6025 | |
6026 | // MOVEB |
6027 | OPCODE(0x11D8) |
6028 | { |
6029 | u32 adr, res; |
6030 | u32 src, dst; |
6031 | |
6032 | adr = AREG((Opcode >> 0) & 7); |
6033 | AREG((Opcode >> 0) & 7) += 1; |
6034 | PRE_IO |
6035 | READ_BYTE_F(adr, res) |
6036 | flag_C = 0; |
6037 | flag_V = 0; |
6038 | flag_NotZ = res; |
6039 | flag_N = res; |
6040 | FETCH_SWORD(adr); |
6041 | WRITE_BYTE_F(adr, res) |
6042 | POST_IO |
6043 | RET(16) |
6044 | } |
6045 | |
6046 | // MOVEB |
6047 | OPCODE(0x13D8) |
6048 | { |
6049 | u32 adr, res; |
6050 | u32 src, dst; |
6051 | |
6052 | adr = AREG((Opcode >> 0) & 7); |
6053 | AREG((Opcode >> 0) & 7) += 1; |
6054 | PRE_IO |
6055 | READ_BYTE_F(adr, res) |
6056 | flag_C = 0; |
6057 | flag_V = 0; |
6058 | flag_NotZ = res; |
6059 | flag_N = res; |
6060 | FETCH_LONG(adr); |
6061 | WRITE_BYTE_F(adr, res) |
6062 | POST_IO |
6063 | RET(20) |
6064 | } |
6065 | |
6066 | // MOVEB |
6067 | OPCODE(0x1ED8) |
6068 | { |
6069 | u32 adr, res; |
6070 | u32 src, dst; |
6071 | |
6072 | adr = AREG((Opcode >> 0) & 7); |
6073 | AREG((Opcode >> 0) & 7) += 1; |
6074 | PRE_IO |
6075 | READ_BYTE_F(adr, res) |
6076 | flag_C = 0; |
6077 | flag_V = 0; |
6078 | flag_NotZ = res; |
6079 | flag_N = res; |
6080 | adr = AREG(7); |
6081 | AREG(7) += 2; |
6082 | WRITE_BYTE_F(adr, res) |
6083 | POST_IO |
6084 | RET(12) |
6085 | } |
6086 | |
6087 | // MOVEB |
6088 | OPCODE(0x1F18) |
6089 | { |
6090 | u32 adr, res; |
6091 | u32 src, dst; |
6092 | |
6093 | adr = AREG((Opcode >> 0) & 7); |
6094 | AREG((Opcode >> 0) & 7) += 1; |
6095 | PRE_IO |
6096 | READ_BYTE_F(adr, res) |
6097 | flag_C = 0; |
6098 | flag_V = 0; |
6099 | flag_NotZ = res; |
6100 | flag_N = res; |
6101 | adr = AREG(7) - 2; |
6102 | AREG(7) = adr; |
6103 | WRITE_BYTE_F(adr, res) |
6104 | POST_IO |
6105 | RET(12) |
6106 | } |
6107 | |
6108 | // MOVEB |
6109 | OPCODE(0x1020) |
6110 | { |
6111 | u32 adr, res; |
6112 | u32 src, dst; |
6113 | |
6114 | adr = AREG((Opcode >> 0) & 7) - 1; |
6115 | AREG((Opcode >> 0) & 7) = adr; |
6116 | PRE_IO |
6117 | READ_BYTE_F(adr, res) |
6118 | flag_C = 0; |
6119 | flag_V = 0; |
6120 | flag_NotZ = res; |
6121 | flag_N = res; |
6122 | DREGu8((Opcode >> 9) & 7) = res; |
6123 | POST_IO |
6124 | RET(10) |
6125 | } |
6126 | |
6127 | // MOVEB |
6128 | OPCODE(0x10A0) |
6129 | { |
6130 | u32 adr, res; |
6131 | u32 src, dst; |
6132 | |
6133 | adr = AREG((Opcode >> 0) & 7) - 1; |
6134 | AREG((Opcode >> 0) & 7) = adr; |
6135 | PRE_IO |
6136 | READ_BYTE_F(adr, res) |
6137 | flag_C = 0; |
6138 | flag_V = 0; |
6139 | flag_NotZ = res; |
6140 | flag_N = res; |
6141 | adr = AREG((Opcode >> 9) & 7); |
6142 | WRITE_BYTE_F(adr, res) |
6143 | POST_IO |
6144 | RET(14) |
6145 | } |
6146 | |
6147 | // MOVEB |
6148 | OPCODE(0x10E0) |
6149 | { |
6150 | u32 adr, res; |
6151 | u32 src, dst; |
6152 | |
6153 | adr = AREG((Opcode >> 0) & 7) - 1; |
6154 | AREG((Opcode >> 0) & 7) = adr; |
6155 | PRE_IO |
6156 | READ_BYTE_F(adr, res) |
6157 | flag_C = 0; |
6158 | flag_V = 0; |
6159 | flag_NotZ = res; |
6160 | flag_N = res; |
6161 | adr = AREG((Opcode >> 9) & 7); |
6162 | AREG((Opcode >> 9) & 7) += 1; |
6163 | WRITE_BYTE_F(adr, res) |
6164 | POST_IO |
6165 | RET(14) |
6166 | } |
6167 | |
6168 | // MOVEB |
6169 | OPCODE(0x1120) |
6170 | { |
6171 | u32 adr, res; |
6172 | u32 src, dst; |
6173 | |
6174 | adr = AREG((Opcode >> 0) & 7) - 1; |
6175 | AREG((Opcode >> 0) & 7) = adr; |
6176 | PRE_IO |
6177 | READ_BYTE_F(adr, res) |
6178 | flag_C = 0; |
6179 | flag_V = 0; |
6180 | flag_NotZ = res; |
6181 | flag_N = res; |
6182 | adr = AREG((Opcode >> 9) & 7) - 1; |
6183 | AREG((Opcode >> 9) & 7) = adr; |
6184 | WRITE_BYTE_F(adr, res) |
6185 | POST_IO |
6186 | RET(14) |
6187 | } |
6188 | |
6189 | // MOVEB |
6190 | OPCODE(0x1160) |
6191 | { |
6192 | u32 adr, res; |
6193 | u32 src, dst; |
6194 | |
6195 | adr = AREG((Opcode >> 0) & 7) - 1; |
6196 | AREG((Opcode >> 0) & 7) = adr; |
6197 | PRE_IO |
6198 | READ_BYTE_F(adr, res) |
6199 | flag_C = 0; |
6200 | flag_V = 0; |
6201 | flag_NotZ = res; |
6202 | flag_N = res; |
6203 | FETCH_SWORD(adr); |
6204 | adr += AREG((Opcode >> 9) & 7); |
6205 | WRITE_BYTE_F(adr, res) |
6206 | POST_IO |
6207 | RET(18) |
6208 | } |
6209 | |
6210 | // MOVEB |
6211 | OPCODE(0x11A0) |
6212 | { |
6213 | u32 adr, res; |
6214 | u32 src, dst; |
6215 | |
6216 | adr = AREG((Opcode >> 0) & 7) - 1; |
6217 | AREG((Opcode >> 0) & 7) = adr; |
6218 | PRE_IO |
6219 | READ_BYTE_F(adr, res) |
6220 | flag_C = 0; |
6221 | flag_V = 0; |
6222 | flag_NotZ = res; |
6223 | flag_N = res; |
6224 | adr = AREG((Opcode >> 9) & 7); |
6225 | DECODE_EXT_WORD |
6226 | WRITE_BYTE_F(adr, res) |
6227 | POST_IO |
6228 | RET(20) |
6229 | } |
6230 | |
6231 | // MOVEB |
6232 | OPCODE(0x11E0) |
6233 | { |
6234 | u32 adr, res; |
6235 | u32 src, dst; |
6236 | |
6237 | adr = AREG((Opcode >> 0) & 7) - 1; |
6238 | AREG((Opcode >> 0) & 7) = adr; |
6239 | PRE_IO |
6240 | READ_BYTE_F(adr, res) |
6241 | flag_C = 0; |
6242 | flag_V = 0; |
6243 | flag_NotZ = res; |
6244 | flag_N = res; |
6245 | FETCH_SWORD(adr); |
6246 | WRITE_BYTE_F(adr, res) |
6247 | POST_IO |
6248 | RET(18) |
6249 | } |
6250 | |
6251 | // MOVEB |
6252 | OPCODE(0x13E0) |
6253 | { |
6254 | u32 adr, res; |
6255 | u32 src, dst; |
6256 | |
6257 | adr = AREG((Opcode >> 0) & 7) - 1; |
6258 | AREG((Opcode >> 0) & 7) = adr; |
6259 | PRE_IO |
6260 | READ_BYTE_F(adr, res) |
6261 | flag_C = 0; |
6262 | flag_V = 0; |
6263 | flag_NotZ = res; |
6264 | flag_N = res; |
6265 | FETCH_LONG(adr); |
6266 | WRITE_BYTE_F(adr, res) |
6267 | POST_IO |
6268 | RET(22) |
6269 | } |
6270 | |
6271 | // MOVEB |
6272 | OPCODE(0x1EE0) |
6273 | { |
6274 | u32 adr, res; |
6275 | u32 src, dst; |
6276 | |
6277 | adr = AREG((Opcode >> 0) & 7) - 1; |
6278 | AREG((Opcode >> 0) & 7) = adr; |
6279 | PRE_IO |
6280 | READ_BYTE_F(adr, res) |
6281 | flag_C = 0; |
6282 | flag_V = 0; |
6283 | flag_NotZ = res; |
6284 | flag_N = res; |
6285 | adr = AREG(7); |
6286 | AREG(7) += 2; |
6287 | WRITE_BYTE_F(adr, res) |
6288 | POST_IO |
6289 | RET(14) |
6290 | } |
6291 | |
6292 | // MOVEB |
6293 | OPCODE(0x1F20) |
6294 | { |
6295 | u32 adr, res; |
6296 | u32 src, dst; |
6297 | |
6298 | adr = AREG((Opcode >> 0) & 7) - 1; |
6299 | AREG((Opcode >> 0) & 7) = adr; |
6300 | PRE_IO |
6301 | READ_BYTE_F(adr, res) |
6302 | flag_C = 0; |
6303 | flag_V = 0; |
6304 | flag_NotZ = res; |
6305 | flag_N = res; |
6306 | adr = AREG(7) - 2; |
6307 | AREG(7) = adr; |
6308 | WRITE_BYTE_F(adr, res) |
6309 | POST_IO |
6310 | RET(14) |
6311 | } |
6312 | |
6313 | // MOVEB |
6314 | OPCODE(0x1028) |
6315 | { |
6316 | u32 adr, res; |
6317 | u32 src, dst; |
6318 | |
6319 | FETCH_SWORD(adr); |
6320 | adr += AREG((Opcode >> 0) & 7); |
6321 | PRE_IO |
6322 | READ_BYTE_F(adr, res) |
6323 | flag_C = 0; |
6324 | flag_V = 0; |
6325 | flag_NotZ = res; |
6326 | flag_N = res; |
6327 | DREGu8((Opcode >> 9) & 7) = res; |
6328 | POST_IO |
6329 | RET(12) |
6330 | } |
6331 | |
6332 | // MOVEB |
6333 | OPCODE(0x10A8) |
6334 | { |
6335 | u32 adr, res; |
6336 | u32 src, dst; |
6337 | |
6338 | FETCH_SWORD(adr); |
6339 | adr += AREG((Opcode >> 0) & 7); |
6340 | PRE_IO |
6341 | READ_BYTE_F(adr, res) |
6342 | flag_C = 0; |
6343 | flag_V = 0; |
6344 | flag_NotZ = res; |
6345 | flag_N = res; |
6346 | adr = AREG((Opcode >> 9) & 7); |
6347 | WRITE_BYTE_F(adr, res) |
6348 | POST_IO |
6349 | RET(16) |
6350 | } |
6351 | |
6352 | // MOVEB |
6353 | OPCODE(0x10E8) |
6354 | { |
6355 | u32 adr, res; |
6356 | u32 src, dst; |
6357 | |
6358 | FETCH_SWORD(adr); |
6359 | adr += AREG((Opcode >> 0) & 7); |
6360 | PRE_IO |
6361 | READ_BYTE_F(adr, res) |
6362 | flag_C = 0; |
6363 | flag_V = 0; |
6364 | flag_NotZ = res; |
6365 | flag_N = res; |
6366 | adr = AREG((Opcode >> 9) & 7); |
6367 | AREG((Opcode >> 9) & 7) += 1; |
6368 | WRITE_BYTE_F(adr, res) |
6369 | POST_IO |
6370 | RET(16) |
6371 | } |
6372 | |
6373 | // MOVEB |
6374 | OPCODE(0x1128) |
6375 | { |
6376 | u32 adr, res; |
6377 | u32 src, dst; |
6378 | |
6379 | FETCH_SWORD(adr); |
6380 | adr += AREG((Opcode >> 0) & 7); |
6381 | PRE_IO |
6382 | READ_BYTE_F(adr, res) |
6383 | flag_C = 0; |
6384 | flag_V = 0; |
6385 | flag_NotZ = res; |
6386 | flag_N = res; |
6387 | adr = AREG((Opcode >> 9) & 7) - 1; |
6388 | AREG((Opcode >> 9) & 7) = adr; |
6389 | WRITE_BYTE_F(adr, res) |
6390 | POST_IO |
6391 | RET(16) |
6392 | } |
6393 | |
6394 | // MOVEB |
6395 | OPCODE(0x1168) |
6396 | { |
6397 | u32 adr, res; |
6398 | u32 src, dst; |
6399 | |
6400 | FETCH_SWORD(adr); |
6401 | adr += AREG((Opcode >> 0) & 7); |
6402 | PRE_IO |
6403 | READ_BYTE_F(adr, res) |
6404 | flag_C = 0; |
6405 | flag_V = 0; |
6406 | flag_NotZ = res; |
6407 | flag_N = res; |
6408 | FETCH_SWORD(adr); |
6409 | adr += AREG((Opcode >> 9) & 7); |
6410 | WRITE_BYTE_F(adr, res) |
6411 | POST_IO |
6412 | RET(20) |
6413 | } |
6414 | |
6415 | // MOVEB |
6416 | OPCODE(0x11A8) |
6417 | { |
6418 | u32 adr, res; |
6419 | u32 src, dst; |
6420 | |
6421 | FETCH_SWORD(adr); |
6422 | adr += AREG((Opcode >> 0) & 7); |
6423 | PRE_IO |
6424 | READ_BYTE_F(adr, res) |
6425 | flag_C = 0; |
6426 | flag_V = 0; |
6427 | flag_NotZ = res; |
6428 | flag_N = res; |
6429 | adr = AREG((Opcode >> 9) & 7); |
6430 | DECODE_EXT_WORD |
6431 | WRITE_BYTE_F(adr, res) |
6432 | POST_IO |
6433 | RET(22) |
6434 | } |
6435 | |
6436 | // MOVEB |
6437 | OPCODE(0x11E8) |
6438 | { |
6439 | u32 adr, res; |
6440 | u32 src, dst; |
6441 | |
6442 | FETCH_SWORD(adr); |
6443 | adr += AREG((Opcode >> 0) & 7); |
6444 | PRE_IO |
6445 | READ_BYTE_F(adr, res) |
6446 | flag_C = 0; |
6447 | flag_V = 0; |
6448 | flag_NotZ = res; |
6449 | flag_N = res; |
6450 | FETCH_SWORD(adr); |
6451 | WRITE_BYTE_F(adr, res) |
6452 | POST_IO |
6453 | RET(20) |
6454 | } |
6455 | |
6456 | // MOVEB |
6457 | OPCODE(0x13E8) |
6458 | { |
6459 | u32 adr, res; |
6460 | u32 src, dst; |
6461 | |
6462 | FETCH_SWORD(adr); |
6463 | adr += AREG((Opcode >> 0) & 7); |
6464 | PRE_IO |
6465 | READ_BYTE_F(adr, res) |
6466 | flag_C = 0; |
6467 | flag_V = 0; |
6468 | flag_NotZ = res; |
6469 | flag_N = res; |
6470 | FETCH_LONG(adr); |
6471 | WRITE_BYTE_F(adr, res) |
6472 | POST_IO |
6473 | RET(24) |
6474 | } |
6475 | |
6476 | // MOVEB |
6477 | OPCODE(0x1EE8) |
6478 | { |
6479 | u32 adr, res; |
6480 | u32 src, dst; |
6481 | |
6482 | FETCH_SWORD(adr); |
6483 | adr += AREG((Opcode >> 0) & 7); |
6484 | PRE_IO |
6485 | READ_BYTE_F(adr, res) |
6486 | flag_C = 0; |
6487 | flag_V = 0; |
6488 | flag_NotZ = res; |
6489 | flag_N = res; |
6490 | adr = AREG(7); |
6491 | AREG(7) += 2; |
6492 | WRITE_BYTE_F(adr, res) |
6493 | POST_IO |
6494 | RET(16) |
6495 | } |
6496 | |
6497 | // MOVEB |
6498 | OPCODE(0x1F28) |
6499 | { |
6500 | u32 adr, res; |
6501 | u32 src, dst; |
6502 | |
6503 | FETCH_SWORD(adr); |
6504 | adr += AREG((Opcode >> 0) & 7); |
6505 | PRE_IO |
6506 | READ_BYTE_F(adr, res) |
6507 | flag_C = 0; |
6508 | flag_V = 0; |
6509 | flag_NotZ = res; |
6510 | flag_N = res; |
6511 | adr = AREG(7) - 2; |
6512 | AREG(7) = adr; |
6513 | WRITE_BYTE_F(adr, res) |
6514 | POST_IO |
6515 | RET(16) |
6516 | } |
6517 | |
6518 | // MOVEB |
6519 | OPCODE(0x1030) |
6520 | { |
6521 | u32 adr, res; |
6522 | u32 src, dst; |
6523 | |
6524 | adr = AREG((Opcode >> 0) & 7); |
6525 | DECODE_EXT_WORD |
6526 | PRE_IO |
6527 | READ_BYTE_F(adr, res) |
6528 | flag_C = 0; |
6529 | flag_V = 0; |
6530 | flag_NotZ = res; |
6531 | flag_N = res; |
6532 | DREGu8((Opcode >> 9) & 7) = res; |
6533 | POST_IO |
6534 | RET(14) |
6535 | } |
6536 | |
6537 | // MOVEB |
6538 | OPCODE(0x10B0) |
6539 | { |
6540 | u32 adr, res; |
6541 | u32 src, dst; |
6542 | |
6543 | adr = AREG((Opcode >> 0) & 7); |
6544 | DECODE_EXT_WORD |
6545 | PRE_IO |
6546 | READ_BYTE_F(adr, res) |
6547 | flag_C = 0; |
6548 | flag_V = 0; |
6549 | flag_NotZ = res; |
6550 | flag_N = res; |
6551 | adr = AREG((Opcode >> 9) & 7); |
6552 | WRITE_BYTE_F(adr, res) |
6553 | POST_IO |
6554 | RET(18) |
6555 | } |
6556 | |
6557 | // MOVEB |
6558 | OPCODE(0x10F0) |
6559 | { |
6560 | u32 adr, res; |
6561 | u32 src, dst; |
6562 | |
6563 | adr = AREG((Opcode >> 0) & 7); |
6564 | DECODE_EXT_WORD |
6565 | PRE_IO |
6566 | READ_BYTE_F(adr, res) |
6567 | flag_C = 0; |
6568 | flag_V = 0; |
6569 | flag_NotZ = res; |
6570 | flag_N = res; |
6571 | adr = AREG((Opcode >> 9) & 7); |
6572 | AREG((Opcode >> 9) & 7) += 1; |
6573 | WRITE_BYTE_F(adr, res) |
6574 | POST_IO |
6575 | RET(18) |
6576 | } |
6577 | |
6578 | // MOVEB |
6579 | OPCODE(0x1130) |
6580 | { |
6581 | u32 adr, res; |
6582 | u32 src, dst; |
6583 | |
6584 | adr = AREG((Opcode >> 0) & 7); |
6585 | DECODE_EXT_WORD |
6586 | PRE_IO |
6587 | READ_BYTE_F(adr, res) |
6588 | flag_C = 0; |
6589 | flag_V = 0; |
6590 | flag_NotZ = res; |
6591 | flag_N = res; |
6592 | adr = AREG((Opcode >> 9) & 7) - 1; |
6593 | AREG((Opcode >> 9) & 7) = adr; |
6594 | WRITE_BYTE_F(adr, res) |
6595 | POST_IO |
6596 | RET(18) |
6597 | } |
6598 | |
6599 | // MOVEB |
6600 | OPCODE(0x1170) |
6601 | { |
6602 | u32 adr, res; |
6603 | u32 src, dst; |
6604 | |
6605 | adr = AREG((Opcode >> 0) & 7); |
6606 | DECODE_EXT_WORD |
6607 | PRE_IO |
6608 | READ_BYTE_F(adr, res) |
6609 | flag_C = 0; |
6610 | flag_V = 0; |
6611 | flag_NotZ = res; |
6612 | flag_N = res; |
6613 | FETCH_SWORD(adr); |
6614 | adr += AREG((Opcode >> 9) & 7); |
6615 | WRITE_BYTE_F(adr, res) |
6616 | POST_IO |
6617 | RET(22) |
6618 | } |
6619 | |
6620 | // MOVEB |
6621 | OPCODE(0x11B0) |
6622 | { |
6623 | u32 adr, res; |
6624 | u32 src, dst; |
6625 | |
6626 | adr = AREG((Opcode >> 0) & 7); |
6627 | DECODE_EXT_WORD |
6628 | PRE_IO |
6629 | READ_BYTE_F(adr, res) |
6630 | flag_C = 0; |
6631 | flag_V = 0; |
6632 | flag_NotZ = res; |
6633 | flag_N = res; |
6634 | adr = AREG((Opcode >> 9) & 7); |
6635 | DECODE_EXT_WORD |
6636 | WRITE_BYTE_F(adr, res) |
6637 | POST_IO |
6638 | RET(24) |
6639 | } |
6640 | |
6641 | // MOVEB |
6642 | OPCODE(0x11F0) |
6643 | { |
6644 | u32 adr, res; |
6645 | u32 src, dst; |
6646 | |
6647 | adr = AREG((Opcode >> 0) & 7); |
6648 | DECODE_EXT_WORD |
6649 | PRE_IO |
6650 | READ_BYTE_F(adr, res) |
6651 | flag_C = 0; |
6652 | flag_V = 0; |
6653 | flag_NotZ = res; |
6654 | flag_N = res; |
6655 | FETCH_SWORD(adr); |
6656 | WRITE_BYTE_F(adr, res) |
6657 | POST_IO |
6658 | RET(22) |
6659 | } |
6660 | |
6661 | // MOVEB |
6662 | OPCODE(0x13F0) |
6663 | { |
6664 | u32 adr, res; |
6665 | u32 src, dst; |
6666 | |
6667 | adr = AREG((Opcode >> 0) & 7); |
6668 | DECODE_EXT_WORD |
6669 | PRE_IO |
6670 | READ_BYTE_F(adr, res) |
6671 | flag_C = 0; |
6672 | flag_V = 0; |
6673 | flag_NotZ = res; |
6674 | flag_N = res; |
6675 | FETCH_LONG(adr); |
6676 | WRITE_BYTE_F(adr, res) |
6677 | POST_IO |
6678 | RET(26) |
6679 | } |
6680 | |
6681 | // MOVEB |
6682 | OPCODE(0x1EF0) |
6683 | { |
6684 | u32 adr, res; |
6685 | u32 src, dst; |
6686 | |
6687 | adr = AREG((Opcode >> 0) & 7); |
6688 | DECODE_EXT_WORD |
6689 | PRE_IO |
6690 | READ_BYTE_F(adr, res) |
6691 | flag_C = 0; |
6692 | flag_V = 0; |
6693 | flag_NotZ = res; |
6694 | flag_N = res; |
6695 | adr = AREG(7); |
6696 | AREG(7) += 2; |
6697 | WRITE_BYTE_F(adr, res) |
6698 | POST_IO |
6699 | RET(18) |
6700 | } |
6701 | |
6702 | // MOVEB |
6703 | OPCODE(0x1F30) |
6704 | { |
6705 | u32 adr, res; |
6706 | u32 src, dst; |
6707 | |
6708 | adr = AREG((Opcode >> 0) & 7); |
6709 | DECODE_EXT_WORD |
6710 | PRE_IO |
6711 | READ_BYTE_F(adr, res) |
6712 | flag_C = 0; |
6713 | flag_V = 0; |
6714 | flag_NotZ = res; |
6715 | flag_N = res; |
6716 | adr = AREG(7) - 2; |
6717 | AREG(7) = adr; |
6718 | WRITE_BYTE_F(adr, res) |
6719 | POST_IO |
6720 | RET(18) |
6721 | } |
6722 | |
6723 | // MOVEB |
6724 | OPCODE(0x1038) |
6725 | { |
6726 | u32 adr, res; |
6727 | u32 src, dst; |
6728 | |
6729 | FETCH_SWORD(adr); |
6730 | PRE_IO |
6731 | READ_BYTE_F(adr, res) |
6732 | flag_C = 0; |
6733 | flag_V = 0; |
6734 | flag_NotZ = res; |
6735 | flag_N = res; |
6736 | DREGu8((Opcode >> 9) & 7) = res; |
6737 | POST_IO |
6738 | RET(12) |
6739 | } |
6740 | |
6741 | // MOVEB |
6742 | OPCODE(0x10B8) |
6743 | { |
6744 | u32 adr, res; |
6745 | u32 src, dst; |
6746 | |
6747 | FETCH_SWORD(adr); |
6748 | PRE_IO |
6749 | READ_BYTE_F(adr, res) |
6750 | flag_C = 0; |
6751 | flag_V = 0; |
6752 | flag_NotZ = res; |
6753 | flag_N = res; |
6754 | adr = AREG((Opcode >> 9) & 7); |
6755 | WRITE_BYTE_F(adr, res) |
6756 | POST_IO |
6757 | RET(16) |
6758 | } |
6759 | |
6760 | // MOVEB |
6761 | OPCODE(0x10F8) |
6762 | { |
6763 | u32 adr, res; |
6764 | u32 src, dst; |
6765 | |
6766 | FETCH_SWORD(adr); |
6767 | PRE_IO |
6768 | READ_BYTE_F(adr, res) |
6769 | flag_C = 0; |
6770 | flag_V = 0; |
6771 | flag_NotZ = res; |
6772 | flag_N = res; |
6773 | adr = AREG((Opcode >> 9) & 7); |
6774 | AREG((Opcode >> 9) & 7) += 1; |
6775 | WRITE_BYTE_F(adr, res) |
6776 | POST_IO |
6777 | RET(16) |
6778 | } |
6779 | |
6780 | // MOVEB |
6781 | OPCODE(0x1138) |
6782 | { |
6783 | u32 adr, res; |
6784 | u32 src, dst; |
6785 | |
6786 | FETCH_SWORD(adr); |
6787 | PRE_IO |
6788 | READ_BYTE_F(adr, res) |
6789 | flag_C = 0; |
6790 | flag_V = 0; |
6791 | flag_NotZ = res; |
6792 | flag_N = res; |
6793 | adr = AREG((Opcode >> 9) & 7) - 1; |
6794 | AREG((Opcode >> 9) & 7) = adr; |
6795 | WRITE_BYTE_F(adr, res) |
6796 | POST_IO |
6797 | RET(16) |
6798 | } |
6799 | |
6800 | // MOVEB |
6801 | OPCODE(0x1178) |
6802 | { |
6803 | u32 adr, res; |
6804 | u32 src, dst; |
6805 | |
6806 | FETCH_SWORD(adr); |
6807 | PRE_IO |
6808 | READ_BYTE_F(adr, res) |
6809 | flag_C = 0; |
6810 | flag_V = 0; |
6811 | flag_NotZ = res; |
6812 | flag_N = res; |
6813 | FETCH_SWORD(adr); |
6814 | adr += AREG((Opcode >> 9) & 7); |
6815 | WRITE_BYTE_F(adr, res) |
6816 | POST_IO |
6817 | RET(20) |
6818 | } |
6819 | |
6820 | // MOVEB |
6821 | OPCODE(0x11B8) |
6822 | { |
6823 | u32 adr, res; |
6824 | u32 src, dst; |
6825 | |
6826 | FETCH_SWORD(adr); |
6827 | PRE_IO |
6828 | READ_BYTE_F(adr, res) |
6829 | flag_C = 0; |
6830 | flag_V = 0; |
6831 | flag_NotZ = res; |
6832 | flag_N = res; |
6833 | adr = AREG((Opcode >> 9) & 7); |
6834 | DECODE_EXT_WORD |
6835 | WRITE_BYTE_F(adr, res) |
6836 | POST_IO |
6837 | RET(22) |
6838 | } |
6839 | |
6840 | // MOVEB |
6841 | OPCODE(0x11F8) |
6842 | { |
6843 | u32 adr, res; |
6844 | u32 src, dst; |
6845 | |
6846 | FETCH_SWORD(adr); |
6847 | PRE_IO |
6848 | READ_BYTE_F(adr, res) |
6849 | flag_C = 0; |
6850 | flag_V = 0; |
6851 | flag_NotZ = res; |
6852 | flag_N = res; |
6853 | FETCH_SWORD(adr); |
6854 | WRITE_BYTE_F(adr, res) |
6855 | POST_IO |
6856 | RET(20) |
6857 | } |
6858 | |
6859 | // MOVEB |
6860 | OPCODE(0x13F8) |
6861 | { |
6862 | u32 adr, res; |
6863 | u32 src, dst; |
6864 | |
6865 | FETCH_SWORD(adr); |
6866 | PRE_IO |
6867 | READ_BYTE_F(adr, res) |
6868 | flag_C = 0; |
6869 | flag_V = 0; |
6870 | flag_NotZ = res; |
6871 | flag_N = res; |
6872 | FETCH_LONG(adr); |
6873 | WRITE_BYTE_F(adr, res) |
6874 | POST_IO |
6875 | RET(24) |
6876 | } |
6877 | |
6878 | // MOVEB |
6879 | OPCODE(0x1EF8) |
6880 | { |
6881 | u32 adr, res; |
6882 | u32 src, dst; |
6883 | |
6884 | FETCH_SWORD(adr); |
6885 | PRE_IO |
6886 | READ_BYTE_F(adr, res) |
6887 | flag_C = 0; |
6888 | flag_V = 0; |
6889 | flag_NotZ = res; |
6890 | flag_N = res; |
6891 | adr = AREG(7); |
6892 | AREG(7) += 2; |
6893 | WRITE_BYTE_F(adr, res) |
6894 | POST_IO |
6895 | RET(16) |
6896 | } |
6897 | |
6898 | // MOVEB |
6899 | OPCODE(0x1F38) |
6900 | { |
6901 | u32 adr, res; |
6902 | u32 src, dst; |
6903 | |
6904 | FETCH_SWORD(adr); |
6905 | PRE_IO |
6906 | READ_BYTE_F(adr, res) |
6907 | flag_C = 0; |
6908 | flag_V = 0; |
6909 | flag_NotZ = res; |
6910 | flag_N = res; |
6911 | adr = AREG(7) - 2; |
6912 | AREG(7) = adr; |
6913 | WRITE_BYTE_F(adr, res) |
6914 | POST_IO |
6915 | RET(16) |
6916 | } |
6917 | |
6918 | // MOVEB |
6919 | OPCODE(0x1039) |
6920 | { |
6921 | u32 adr, res; |
6922 | u32 src, dst; |
6923 | |
6924 | FETCH_LONG(adr); |
6925 | PRE_IO |
6926 | READ_BYTE_F(adr, res) |
6927 | flag_C = 0; |
6928 | flag_V = 0; |
6929 | flag_NotZ = res; |
6930 | flag_N = res; |
6931 | DREGu8((Opcode >> 9) & 7) = res; |
6932 | POST_IO |
6933 | RET(16) |
6934 | } |
6935 | |
6936 | // MOVEB |
6937 | OPCODE(0x10B9) |
6938 | { |
6939 | u32 adr, res; |
6940 | u32 src, dst; |
6941 | |
6942 | FETCH_LONG(adr); |
6943 | PRE_IO |
6944 | READ_BYTE_F(adr, res) |
6945 | flag_C = 0; |
6946 | flag_V = 0; |
6947 | flag_NotZ = res; |
6948 | flag_N = res; |
6949 | adr = AREG((Opcode >> 9) & 7); |
6950 | WRITE_BYTE_F(adr, res) |
6951 | POST_IO |
6952 | RET(20) |
6953 | } |
6954 | |
6955 | // MOVEB |
6956 | OPCODE(0x10F9) |
6957 | { |
6958 | u32 adr, res; |
6959 | u32 src, dst; |
6960 | |
6961 | FETCH_LONG(adr); |
6962 | PRE_IO |
6963 | READ_BYTE_F(adr, res) |
6964 | flag_C = 0; |
6965 | flag_V = 0; |
6966 | flag_NotZ = res; |
6967 | flag_N = res; |
6968 | adr = AREG((Opcode >> 9) & 7); |
6969 | AREG((Opcode >> 9) & 7) += 1; |
6970 | WRITE_BYTE_F(adr, res) |
6971 | POST_IO |
6972 | RET(20) |
6973 | } |
6974 | |
6975 | // MOVEB |
6976 | OPCODE(0x1139) |
6977 | { |
6978 | u32 adr, res; |
6979 | u32 src, dst; |
6980 | |
6981 | FETCH_LONG(adr); |
6982 | PRE_IO |
6983 | READ_BYTE_F(adr, res) |
6984 | flag_C = 0; |
6985 | flag_V = 0; |
6986 | flag_NotZ = res; |
6987 | flag_N = res; |
6988 | adr = AREG((Opcode >> 9) & 7) - 1; |
6989 | AREG((Opcode >> 9) & 7) = adr; |
6990 | WRITE_BYTE_F(adr, res) |
6991 | POST_IO |
6992 | RET(20) |
6993 | } |
6994 | |
6995 | // MOVEB |
6996 | OPCODE(0x1179) |
6997 | { |
6998 | u32 adr, res; |
6999 | u32 src, dst; |
7000 | |
7001 | FETCH_LONG(adr); |
7002 | PRE_IO |
7003 | READ_BYTE_F(adr, res) |
7004 | flag_C = 0; |
7005 | flag_V = 0; |
7006 | flag_NotZ = res; |
7007 | flag_N = res; |
7008 | FETCH_SWORD(adr); |
7009 | adr += AREG((Opcode >> 9) & 7); |
7010 | WRITE_BYTE_F(adr, res) |
7011 | POST_IO |
7012 | RET(24) |
7013 | } |
7014 | |
7015 | // MOVEB |
7016 | OPCODE(0x11B9) |
7017 | { |
7018 | u32 adr, res; |
7019 | u32 src, dst; |
7020 | |
7021 | FETCH_LONG(adr); |
7022 | PRE_IO |
7023 | READ_BYTE_F(adr, res) |
7024 | flag_C = 0; |
7025 | flag_V = 0; |
7026 | flag_NotZ = res; |
7027 | flag_N = res; |
7028 | adr = AREG((Opcode >> 9) & 7); |
7029 | DECODE_EXT_WORD |
7030 | WRITE_BYTE_F(adr, res) |
7031 | POST_IO |
7032 | RET(26) |
7033 | } |
7034 | |
7035 | // MOVEB |
7036 | OPCODE(0x11F9) |
7037 | { |
7038 | u32 adr, res; |
7039 | u32 src, dst; |
7040 | |
7041 | FETCH_LONG(adr); |
7042 | PRE_IO |
7043 | READ_BYTE_F(adr, res) |
7044 | flag_C = 0; |
7045 | flag_V = 0; |
7046 | flag_NotZ = res; |
7047 | flag_N = res; |
7048 | FETCH_SWORD(adr); |
7049 | WRITE_BYTE_F(adr, res) |
7050 | POST_IO |
7051 | RET(24) |
7052 | } |
7053 | |
7054 | // MOVEB |
7055 | OPCODE(0x13F9) |
7056 | { |
7057 | u32 adr, res; |
7058 | u32 src, dst; |
7059 | |
7060 | FETCH_LONG(adr); |
7061 | PRE_IO |
7062 | READ_BYTE_F(adr, res) |
7063 | flag_C = 0; |
7064 | flag_V = 0; |
7065 | flag_NotZ = res; |
7066 | flag_N = res; |
7067 | FETCH_LONG(adr); |
7068 | WRITE_BYTE_F(adr, res) |
7069 | POST_IO |
7070 | RET(28) |
7071 | } |
7072 | |
7073 | // MOVEB |
7074 | OPCODE(0x1EF9) |
7075 | { |
7076 | u32 adr, res; |
7077 | u32 src, dst; |
7078 | |
7079 | FETCH_LONG(adr); |
7080 | PRE_IO |
7081 | READ_BYTE_F(adr, res) |
7082 | flag_C = 0; |
7083 | flag_V = 0; |
7084 | flag_NotZ = res; |
7085 | flag_N = res; |
7086 | adr = AREG(7); |
7087 | AREG(7) += 2; |
7088 | WRITE_BYTE_F(adr, res) |
7089 | POST_IO |
7090 | RET(20) |
7091 | } |
7092 | |
7093 | // MOVEB |
7094 | OPCODE(0x1F39) |
7095 | { |
7096 | u32 adr, res; |
7097 | u32 src, dst; |
7098 | |
7099 | FETCH_LONG(adr); |
7100 | PRE_IO |
7101 | READ_BYTE_F(adr, res) |
7102 | flag_C = 0; |
7103 | flag_V = 0; |
7104 | flag_NotZ = res; |
7105 | flag_N = res; |
7106 | adr = AREG(7) - 2; |
7107 | AREG(7) = adr; |
7108 | WRITE_BYTE_F(adr, res) |
7109 | POST_IO |
7110 | RET(20) |
7111 | } |
7112 | |
7113 | // MOVEB |
7114 | OPCODE(0x103A) |
7115 | { |
7116 | u32 adr, res; |
7117 | u32 src, dst; |
7118 | |
7119 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7120 | PC++; |
7121 | PRE_IO |
7122 | READ_BYTE_F(adr, res) |
7123 | flag_C = 0; |
7124 | flag_V = 0; |
7125 | flag_NotZ = res; |
7126 | flag_N = res; |
7127 | DREGu8((Opcode >> 9) & 7) = res; |
7128 | POST_IO |
7129 | RET(12) |
7130 | } |
7131 | |
7132 | // MOVEB |
7133 | OPCODE(0x10BA) |
7134 | { |
7135 | u32 adr, res; |
7136 | u32 src, dst; |
7137 | |
7138 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7139 | PC++; |
7140 | PRE_IO |
7141 | READ_BYTE_F(adr, res) |
7142 | flag_C = 0; |
7143 | flag_V = 0; |
7144 | flag_NotZ = res; |
7145 | flag_N = res; |
7146 | adr = AREG((Opcode >> 9) & 7); |
7147 | WRITE_BYTE_F(adr, res) |
7148 | POST_IO |
7149 | RET(16) |
7150 | } |
7151 | |
7152 | // MOVEB |
7153 | OPCODE(0x10FA) |
7154 | { |
7155 | u32 adr, res; |
7156 | u32 src, dst; |
7157 | |
7158 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7159 | PC++; |
7160 | PRE_IO |
7161 | READ_BYTE_F(adr, res) |
7162 | flag_C = 0; |
7163 | flag_V = 0; |
7164 | flag_NotZ = res; |
7165 | flag_N = res; |
7166 | adr = AREG((Opcode >> 9) & 7); |
7167 | AREG((Opcode >> 9) & 7) += 1; |
7168 | WRITE_BYTE_F(adr, res) |
7169 | POST_IO |
7170 | RET(16) |
7171 | } |
7172 | |
7173 | // MOVEB |
7174 | OPCODE(0x113A) |
7175 | { |
7176 | u32 adr, res; |
7177 | u32 src, dst; |
7178 | |
7179 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7180 | PC++; |
7181 | PRE_IO |
7182 | READ_BYTE_F(adr, res) |
7183 | flag_C = 0; |
7184 | flag_V = 0; |
7185 | flag_NotZ = res; |
7186 | flag_N = res; |
7187 | adr = AREG((Opcode >> 9) & 7) - 1; |
7188 | AREG((Opcode >> 9) & 7) = adr; |
7189 | WRITE_BYTE_F(adr, res) |
7190 | POST_IO |
7191 | RET(16) |
7192 | } |
7193 | |
7194 | // MOVEB |
7195 | OPCODE(0x117A) |
7196 | { |
7197 | u32 adr, res; |
7198 | u32 src, dst; |
7199 | |
7200 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7201 | PC++; |
7202 | PRE_IO |
7203 | READ_BYTE_F(adr, res) |
7204 | flag_C = 0; |
7205 | flag_V = 0; |
7206 | flag_NotZ = res; |
7207 | flag_N = res; |
7208 | FETCH_SWORD(adr); |
7209 | adr += AREG((Opcode >> 9) & 7); |
7210 | WRITE_BYTE_F(adr, res) |
7211 | POST_IO |
7212 | RET(20) |
7213 | } |
7214 | |
7215 | // MOVEB |
7216 | OPCODE(0x11BA) |
7217 | { |
7218 | u32 adr, res; |
7219 | u32 src, dst; |
7220 | |
7221 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7222 | PC++; |
7223 | PRE_IO |
7224 | READ_BYTE_F(adr, res) |
7225 | flag_C = 0; |
7226 | flag_V = 0; |
7227 | flag_NotZ = res; |
7228 | flag_N = res; |
7229 | adr = AREG((Opcode >> 9) & 7); |
7230 | DECODE_EXT_WORD |
7231 | WRITE_BYTE_F(adr, res) |
7232 | POST_IO |
7233 | RET(22) |
7234 | } |
7235 | |
7236 | // MOVEB |
7237 | OPCODE(0x11FA) |
7238 | { |
7239 | u32 adr, res; |
7240 | u32 src, dst; |
7241 | |
7242 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7243 | PC++; |
7244 | PRE_IO |
7245 | READ_BYTE_F(adr, res) |
7246 | flag_C = 0; |
7247 | flag_V = 0; |
7248 | flag_NotZ = res; |
7249 | flag_N = res; |
7250 | FETCH_SWORD(adr); |
7251 | WRITE_BYTE_F(adr, res) |
7252 | POST_IO |
7253 | RET(20) |
7254 | } |
7255 | |
7256 | // MOVEB |
7257 | OPCODE(0x13FA) |
7258 | { |
7259 | u32 adr, res; |
7260 | u32 src, dst; |
7261 | |
7262 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7263 | PC++; |
7264 | PRE_IO |
7265 | READ_BYTE_F(adr, res) |
7266 | flag_C = 0; |
7267 | flag_V = 0; |
7268 | flag_NotZ = res; |
7269 | flag_N = res; |
7270 | FETCH_LONG(adr); |
7271 | WRITE_BYTE_F(adr, res) |
7272 | POST_IO |
7273 | RET(24) |
7274 | } |
7275 | |
7276 | // MOVEB |
7277 | OPCODE(0x1EFA) |
7278 | { |
7279 | u32 adr, res; |
7280 | u32 src, dst; |
7281 | |
7282 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7283 | PC++; |
7284 | PRE_IO |
7285 | READ_BYTE_F(adr, res) |
7286 | flag_C = 0; |
7287 | flag_V = 0; |
7288 | flag_NotZ = res; |
7289 | flag_N = res; |
7290 | adr = AREG(7); |
7291 | AREG(7) += 2; |
7292 | WRITE_BYTE_F(adr, res) |
7293 | POST_IO |
7294 | RET(16) |
7295 | } |
7296 | |
7297 | // MOVEB |
7298 | OPCODE(0x1F3A) |
7299 | { |
7300 | u32 adr, res; |
7301 | u32 src, dst; |
7302 | |
7303 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7304 | PC++; |
7305 | PRE_IO |
7306 | READ_BYTE_F(adr, res) |
7307 | flag_C = 0; |
7308 | flag_V = 0; |
7309 | flag_NotZ = res; |
7310 | flag_N = res; |
7311 | adr = AREG(7) - 2; |
7312 | AREG(7) = adr; |
7313 | WRITE_BYTE_F(adr, res) |
7314 | POST_IO |
7315 | RET(16) |
7316 | } |
7317 | |
7318 | // MOVEB |
7319 | OPCODE(0x103B) |
7320 | { |
7321 | u32 adr, res; |
7322 | u32 src, dst; |
7323 | |
7324 | adr = (u32)(PC) - BasePC; |
7325 | DECODE_EXT_WORD |
7326 | PRE_IO |
7327 | READ_BYTE_F(adr, res) |
7328 | flag_C = 0; |
7329 | flag_V = 0; |
7330 | flag_NotZ = res; |
7331 | flag_N = res; |
7332 | DREGu8((Opcode >> 9) & 7) = res; |
7333 | POST_IO |
7334 | RET(14) |
7335 | } |
7336 | |
7337 | // MOVEB |
7338 | OPCODE(0x10BB) |
7339 | { |
7340 | u32 adr, res; |
7341 | u32 src, dst; |
7342 | |
7343 | adr = (u32)(PC) - BasePC; |
7344 | DECODE_EXT_WORD |
7345 | PRE_IO |
7346 | READ_BYTE_F(adr, res) |
7347 | flag_C = 0; |
7348 | flag_V = 0; |
7349 | flag_NotZ = res; |
7350 | flag_N = res; |
7351 | adr = AREG((Opcode >> 9) & 7); |
7352 | WRITE_BYTE_F(adr, res) |
7353 | POST_IO |
7354 | RET(18) |
7355 | } |
7356 | |
7357 | // MOVEB |
7358 | OPCODE(0x10FB) |
7359 | { |
7360 | u32 adr, res; |
7361 | u32 src, dst; |
7362 | |
7363 | adr = (u32)(PC) - BasePC; |
7364 | DECODE_EXT_WORD |
7365 | PRE_IO |
7366 | READ_BYTE_F(adr, res) |
7367 | flag_C = 0; |
7368 | flag_V = 0; |
7369 | flag_NotZ = res; |
7370 | flag_N = res; |
7371 | adr = AREG((Opcode >> 9) & 7); |
7372 | AREG((Opcode >> 9) & 7) += 1; |
7373 | WRITE_BYTE_F(adr, res) |
7374 | POST_IO |
7375 | RET(18) |
7376 | } |
7377 | |
7378 | // MOVEB |
7379 | OPCODE(0x113B) |
7380 | { |
7381 | u32 adr, res; |
7382 | u32 src, dst; |
7383 | |
7384 | adr = (u32)(PC) - BasePC; |
7385 | DECODE_EXT_WORD |
7386 | PRE_IO |
7387 | READ_BYTE_F(adr, res) |
7388 | flag_C = 0; |
7389 | flag_V = 0; |
7390 | flag_NotZ = res; |
7391 | flag_N = res; |
7392 | adr = AREG((Opcode >> 9) & 7) - 1; |
7393 | AREG((Opcode >> 9) & 7) = adr; |
7394 | WRITE_BYTE_F(adr, res) |
7395 | POST_IO |
7396 | RET(18) |
7397 | } |
7398 | |
7399 | // MOVEB |
7400 | OPCODE(0x117B) |
7401 | { |
7402 | u32 adr, res; |
7403 | u32 src, dst; |
7404 | |
7405 | adr = (u32)(PC) - BasePC; |
7406 | DECODE_EXT_WORD |
7407 | PRE_IO |
7408 | READ_BYTE_F(adr, res) |
7409 | flag_C = 0; |
7410 | flag_V = 0; |
7411 | flag_NotZ = res; |
7412 | flag_N = res; |
7413 | FETCH_SWORD(adr); |
7414 | adr += AREG((Opcode >> 9) & 7); |
7415 | WRITE_BYTE_F(adr, res) |
7416 | POST_IO |
7417 | RET(22) |
7418 | } |
7419 | |
7420 | // MOVEB |
7421 | OPCODE(0x11BB) |
7422 | { |
7423 | u32 adr, res; |
7424 | u32 src, dst; |
7425 | |
7426 | adr = (u32)(PC) - BasePC; |
7427 | DECODE_EXT_WORD |
7428 | PRE_IO |
7429 | READ_BYTE_F(adr, res) |
7430 | flag_C = 0; |
7431 | flag_V = 0; |
7432 | flag_NotZ = res; |
7433 | flag_N = res; |
7434 | adr = AREG((Opcode >> 9) & 7); |
7435 | DECODE_EXT_WORD |
7436 | WRITE_BYTE_F(adr, res) |
7437 | POST_IO |
7438 | RET(24) |
7439 | } |
7440 | |
7441 | // MOVEB |
7442 | OPCODE(0x11FB) |
7443 | { |
7444 | u32 adr, res; |
7445 | u32 src, dst; |
7446 | |
7447 | adr = (u32)(PC) - BasePC; |
7448 | DECODE_EXT_WORD |
7449 | PRE_IO |
7450 | READ_BYTE_F(adr, res) |
7451 | flag_C = 0; |
7452 | flag_V = 0; |
7453 | flag_NotZ = res; |
7454 | flag_N = res; |
7455 | FETCH_SWORD(adr); |
7456 | WRITE_BYTE_F(adr, res) |
7457 | POST_IO |
7458 | RET(22) |
7459 | } |
7460 | |
7461 | // MOVEB |
7462 | OPCODE(0x13FB) |
7463 | { |
7464 | u32 adr, res; |
7465 | u32 src, dst; |
7466 | |
7467 | adr = (u32)(PC) - BasePC; |
7468 | DECODE_EXT_WORD |
7469 | PRE_IO |
7470 | READ_BYTE_F(adr, res) |
7471 | flag_C = 0; |
7472 | flag_V = 0; |
7473 | flag_NotZ = res; |
7474 | flag_N = res; |
7475 | FETCH_LONG(adr); |
7476 | WRITE_BYTE_F(adr, res) |
7477 | POST_IO |
7478 | RET(26) |
7479 | } |
7480 | |
7481 | // MOVEB |
7482 | OPCODE(0x1EFB) |
7483 | { |
7484 | u32 adr, res; |
7485 | u32 src, dst; |
7486 | |
7487 | adr = (u32)(PC) - BasePC; |
7488 | DECODE_EXT_WORD |
7489 | PRE_IO |
7490 | READ_BYTE_F(adr, res) |
7491 | flag_C = 0; |
7492 | flag_V = 0; |
7493 | flag_NotZ = res; |
7494 | flag_N = res; |
7495 | adr = AREG(7); |
7496 | AREG(7) += 2; |
7497 | WRITE_BYTE_F(adr, res) |
7498 | POST_IO |
7499 | RET(18) |
7500 | } |
7501 | |
7502 | // MOVEB |
7503 | OPCODE(0x1F3B) |
7504 | { |
7505 | u32 adr, res; |
7506 | u32 src, dst; |
7507 | |
7508 | adr = (u32)(PC) - BasePC; |
7509 | DECODE_EXT_WORD |
7510 | PRE_IO |
7511 | READ_BYTE_F(adr, res) |
7512 | flag_C = 0; |
7513 | flag_V = 0; |
7514 | flag_NotZ = res; |
7515 | flag_N = res; |
7516 | adr = AREG(7) - 2; |
7517 | AREG(7) = adr; |
7518 | WRITE_BYTE_F(adr, res) |
7519 | POST_IO |
7520 | RET(18) |
7521 | } |
7522 | |
7523 | // MOVEB |
7524 | OPCODE(0x103C) |
7525 | { |
7526 | u32 adr, res; |
7527 | u32 src, dst; |
7528 | |
7529 | FETCH_BYTE(res); |
7530 | flag_C = 0; |
7531 | flag_V = 0; |
7532 | flag_NotZ = res; |
7533 | flag_N = res; |
7534 | DREGu8((Opcode >> 9) & 7) = res; |
7535 | RET(8) |
7536 | } |
7537 | |
7538 | // MOVEB |
7539 | OPCODE(0x10BC) |
7540 | { |
7541 | u32 adr, res; |
7542 | u32 src, dst; |
7543 | |
7544 | FETCH_BYTE(res); |
7545 | flag_C = 0; |
7546 | flag_V = 0; |
7547 | flag_NotZ = res; |
7548 | flag_N = res; |
7549 | adr = AREG((Opcode >> 9) & 7); |
7550 | PRE_IO |
7551 | WRITE_BYTE_F(adr, res) |
7552 | POST_IO |
7553 | RET(12) |
7554 | } |
7555 | |
7556 | // MOVEB |
7557 | OPCODE(0x10FC) |
7558 | { |
7559 | u32 adr, res; |
7560 | u32 src, dst; |
7561 | |
7562 | FETCH_BYTE(res); |
7563 | flag_C = 0; |
7564 | flag_V = 0; |
7565 | flag_NotZ = res; |
7566 | flag_N = res; |
7567 | adr = AREG((Opcode >> 9) & 7); |
7568 | AREG((Opcode >> 9) & 7) += 1; |
7569 | PRE_IO |
7570 | WRITE_BYTE_F(adr, res) |
7571 | POST_IO |
7572 | RET(12) |
7573 | } |
7574 | |
7575 | // MOVEB |
7576 | OPCODE(0x113C) |
7577 | { |
7578 | u32 adr, res; |
7579 | u32 src, dst; |
7580 | |
7581 | FETCH_BYTE(res); |
7582 | flag_C = 0; |
7583 | flag_V = 0; |
7584 | flag_NotZ = res; |
7585 | flag_N = res; |
7586 | adr = AREG((Opcode >> 9) & 7) - 1; |
7587 | AREG((Opcode >> 9) & 7) = adr; |
7588 | PRE_IO |
7589 | WRITE_BYTE_F(adr, res) |
7590 | POST_IO |
7591 | RET(12) |
7592 | } |
7593 | |
7594 | // MOVEB |
7595 | OPCODE(0x117C) |
7596 | { |
7597 | u32 adr, res; |
7598 | u32 src, dst; |
7599 | |
7600 | FETCH_BYTE(res); |
7601 | flag_C = 0; |
7602 | flag_V = 0; |
7603 | flag_NotZ = res; |
7604 | flag_N = res; |
7605 | FETCH_SWORD(adr); |
7606 | adr += AREG((Opcode >> 9) & 7); |
7607 | PRE_IO |
7608 | WRITE_BYTE_F(adr, res) |
7609 | POST_IO |
7610 | RET(16) |
7611 | } |
7612 | |
7613 | // MOVEB |
7614 | OPCODE(0x11BC) |
7615 | { |
7616 | u32 adr, res; |
7617 | u32 src, dst; |
7618 | |
7619 | FETCH_BYTE(res); |
7620 | flag_C = 0; |
7621 | flag_V = 0; |
7622 | flag_NotZ = res; |
7623 | flag_N = res; |
7624 | adr = AREG((Opcode >> 9) & 7); |
7625 | DECODE_EXT_WORD |
7626 | PRE_IO |
7627 | WRITE_BYTE_F(adr, res) |
7628 | POST_IO |
7629 | RET(18) |
7630 | } |
7631 | |
7632 | // MOVEB |
7633 | OPCODE(0x11FC) |
7634 | { |
7635 | u32 adr, res; |
7636 | u32 src, dst; |
7637 | |
7638 | FETCH_BYTE(res); |
7639 | flag_C = 0; |
7640 | flag_V = 0; |
7641 | flag_NotZ = res; |
7642 | flag_N = res; |
7643 | FETCH_SWORD(adr); |
7644 | PRE_IO |
7645 | WRITE_BYTE_F(adr, res) |
7646 | POST_IO |
7647 | RET(16) |
7648 | } |
7649 | |
7650 | // MOVEB |
7651 | OPCODE(0x13FC) |
7652 | { |
7653 | u32 adr, res; |
7654 | u32 src, dst; |
7655 | |
7656 | FETCH_BYTE(res); |
7657 | flag_C = 0; |
7658 | flag_V = 0; |
7659 | flag_NotZ = res; |
7660 | flag_N = res; |
7661 | FETCH_LONG(adr); |
7662 | PRE_IO |
7663 | WRITE_BYTE_F(adr, res) |
7664 | POST_IO |
7665 | RET(20) |
7666 | } |
7667 | |
7668 | // MOVEB |
7669 | OPCODE(0x1EFC) |
7670 | { |
7671 | u32 adr, res; |
7672 | u32 src, dst; |
7673 | |
7674 | FETCH_BYTE(res); |
7675 | flag_C = 0; |
7676 | flag_V = 0; |
7677 | flag_NotZ = res; |
7678 | flag_N = res; |
7679 | adr = AREG(7); |
7680 | AREG(7) += 2; |
7681 | PRE_IO |
7682 | WRITE_BYTE_F(adr, res) |
7683 | POST_IO |
7684 | RET(12) |
7685 | } |
7686 | |
7687 | // MOVEB |
7688 | OPCODE(0x1F3C) |
7689 | { |
7690 | u32 adr, res; |
7691 | u32 src, dst; |
7692 | |
7693 | FETCH_BYTE(res); |
7694 | flag_C = 0; |
7695 | flag_V = 0; |
7696 | flag_NotZ = res; |
7697 | flag_N = res; |
7698 | adr = AREG(7) - 2; |
7699 | AREG(7) = adr; |
7700 | PRE_IO |
7701 | WRITE_BYTE_F(adr, res) |
7702 | POST_IO |
7703 | RET(12) |
7704 | } |
7705 | |
7706 | // MOVEB |
7707 | OPCODE(0x101F) |
7708 | { |
7709 | u32 adr, res; |
7710 | u32 src, dst; |
7711 | |
7712 | adr = AREG(7); |
7713 | AREG(7) += 2; |
7714 | PRE_IO |
7715 | READ_BYTE_F(adr, res) |
7716 | flag_C = 0; |
7717 | flag_V = 0; |
7718 | flag_NotZ = res; |
7719 | flag_N = res; |
7720 | DREGu8((Opcode >> 9) & 7) = res; |
7721 | POST_IO |
7722 | RET(8) |
7723 | } |
7724 | |
7725 | // MOVEB |
7726 | OPCODE(0x109F) |
7727 | { |
7728 | u32 adr, res; |
7729 | u32 src, dst; |
7730 | |
7731 | adr = AREG(7); |
7732 | AREG(7) += 2; |
7733 | PRE_IO |
7734 | READ_BYTE_F(adr, res) |
7735 | flag_C = 0; |
7736 | flag_V = 0; |
7737 | flag_NotZ = res; |
7738 | flag_N = res; |
7739 | adr = AREG((Opcode >> 9) & 7); |
7740 | WRITE_BYTE_F(adr, res) |
7741 | POST_IO |
7742 | RET(12) |
7743 | } |
7744 | |
7745 | // MOVEB |
7746 | OPCODE(0x10DF) |
7747 | { |
7748 | u32 adr, res; |
7749 | u32 src, dst; |
7750 | |
7751 | adr = AREG(7); |
7752 | AREG(7) += 2; |
7753 | PRE_IO |
7754 | READ_BYTE_F(adr, res) |
7755 | flag_C = 0; |
7756 | flag_V = 0; |
7757 | flag_NotZ = res; |
7758 | flag_N = res; |
7759 | adr = AREG((Opcode >> 9) & 7); |
7760 | AREG((Opcode >> 9) & 7) += 1; |
7761 | WRITE_BYTE_F(adr, res) |
7762 | POST_IO |
7763 | RET(12) |
7764 | } |
7765 | |
7766 | // MOVEB |
7767 | OPCODE(0x111F) |
7768 | { |
7769 | u32 adr, res; |
7770 | u32 src, dst; |
7771 | |
7772 | adr = AREG(7); |
7773 | AREG(7) += 2; |
7774 | PRE_IO |
7775 | READ_BYTE_F(adr, res) |
7776 | flag_C = 0; |
7777 | flag_V = 0; |
7778 | flag_NotZ = res; |
7779 | flag_N = res; |
7780 | adr = AREG((Opcode >> 9) & 7) - 1; |
7781 | AREG((Opcode >> 9) & 7) = adr; |
7782 | WRITE_BYTE_F(adr, res) |
7783 | POST_IO |
7784 | RET(12) |
7785 | } |
7786 | |
7787 | // MOVEB |
7788 | OPCODE(0x115F) |
7789 | { |
7790 | u32 adr, res; |
7791 | u32 src, dst; |
7792 | |
7793 | adr = AREG(7); |
7794 | AREG(7) += 2; |
7795 | PRE_IO |
7796 | READ_BYTE_F(adr, res) |
7797 | flag_C = 0; |
7798 | flag_V = 0; |
7799 | flag_NotZ = res; |
7800 | flag_N = res; |
7801 | FETCH_SWORD(adr); |
7802 | adr += AREG((Opcode >> 9) & 7); |
7803 | WRITE_BYTE_F(adr, res) |
7804 | POST_IO |
7805 | RET(16) |
7806 | } |
7807 | |
7808 | // MOVEB |
7809 | OPCODE(0x119F) |
7810 | { |
7811 | u32 adr, res; |
7812 | u32 src, dst; |
7813 | |
7814 | adr = AREG(7); |
7815 | AREG(7) += 2; |
7816 | PRE_IO |
7817 | READ_BYTE_F(adr, res) |
7818 | flag_C = 0; |
7819 | flag_V = 0; |
7820 | flag_NotZ = res; |
7821 | flag_N = res; |
7822 | adr = AREG((Opcode >> 9) & 7); |
7823 | DECODE_EXT_WORD |
7824 | WRITE_BYTE_F(adr, res) |
7825 | POST_IO |
7826 | RET(18) |
7827 | } |
7828 | |
7829 | // MOVEB |
7830 | OPCODE(0x11DF) |
7831 | { |
7832 | u32 adr, res; |
7833 | u32 src, dst; |
7834 | |
7835 | adr = AREG(7); |
7836 | AREG(7) += 2; |
7837 | PRE_IO |
7838 | READ_BYTE_F(adr, res) |
7839 | flag_C = 0; |
7840 | flag_V = 0; |
7841 | flag_NotZ = res; |
7842 | flag_N = res; |
7843 | FETCH_SWORD(adr); |
7844 | WRITE_BYTE_F(adr, res) |
7845 | POST_IO |
7846 | RET(16) |
7847 | } |
7848 | |
7849 | // MOVEB |
7850 | OPCODE(0x13DF) |
7851 | { |
7852 | u32 adr, res; |
7853 | u32 src, dst; |
7854 | |
7855 | adr = AREG(7); |
7856 | AREG(7) += 2; |
7857 | PRE_IO |
7858 | READ_BYTE_F(adr, res) |
7859 | flag_C = 0; |
7860 | flag_V = 0; |
7861 | flag_NotZ = res; |
7862 | flag_N = res; |
7863 | FETCH_LONG(adr); |
7864 | WRITE_BYTE_F(adr, res) |
7865 | POST_IO |
7866 | RET(20) |
7867 | } |
7868 | |
7869 | // MOVEB |
7870 | OPCODE(0x1EDF) |
7871 | { |
7872 | u32 adr, res; |
7873 | u32 src, dst; |
7874 | |
7875 | adr = AREG(7); |
7876 | AREG(7) += 2; |
7877 | PRE_IO |
7878 | READ_BYTE_F(adr, res) |
7879 | flag_C = 0; |
7880 | flag_V = 0; |
7881 | flag_NotZ = res; |
7882 | flag_N = res; |
7883 | adr = AREG(7); |
7884 | AREG(7) += 2; |
7885 | WRITE_BYTE_F(adr, res) |
7886 | POST_IO |
7887 | RET(12) |
7888 | } |
7889 | |
7890 | // MOVEB |
7891 | OPCODE(0x1F1F) |
7892 | { |
7893 | u32 adr, res; |
7894 | u32 src, dst; |
7895 | |
7896 | adr = AREG(7); |
7897 | AREG(7) += 2; |
7898 | PRE_IO |
7899 | READ_BYTE_F(adr, res) |
7900 | flag_C = 0; |
7901 | flag_V = 0; |
7902 | flag_NotZ = res; |
7903 | flag_N = res; |
7904 | adr = AREG(7) - 2; |
7905 | AREG(7) = adr; |
7906 | WRITE_BYTE_F(adr, res) |
7907 | POST_IO |
7908 | RET(12) |
7909 | } |
7910 | |
7911 | // MOVEB |
7912 | OPCODE(0x1027) |
7913 | { |
7914 | u32 adr, res; |
7915 | u32 src, dst; |
7916 | |
7917 | adr = AREG(7) - 2; |
7918 | AREG(7) = adr; |
7919 | PRE_IO |
7920 | READ_BYTE_F(adr, res) |
7921 | flag_C = 0; |
7922 | flag_V = 0; |
7923 | flag_NotZ = res; |
7924 | flag_N = res; |
7925 | DREGu8((Opcode >> 9) & 7) = res; |
7926 | POST_IO |
7927 | RET(10) |
7928 | } |
7929 | |
7930 | // MOVEB |
7931 | OPCODE(0x10A7) |
7932 | { |
7933 | u32 adr, res; |
7934 | u32 src, dst; |
7935 | |
7936 | adr = AREG(7) - 2; |
7937 | AREG(7) = adr; |
7938 | PRE_IO |
7939 | READ_BYTE_F(adr, res) |
7940 | flag_C = 0; |
7941 | flag_V = 0; |
7942 | flag_NotZ = res; |
7943 | flag_N = res; |
7944 | adr = AREG((Opcode >> 9) & 7); |
7945 | WRITE_BYTE_F(adr, res) |
7946 | POST_IO |
7947 | RET(14) |
7948 | } |
7949 | |
7950 | // MOVEB |
7951 | OPCODE(0x10E7) |
7952 | { |
7953 | u32 adr, res; |
7954 | u32 src, dst; |
7955 | |
7956 | adr = AREG(7) - 2; |
7957 | AREG(7) = adr; |
7958 | PRE_IO |
7959 | READ_BYTE_F(adr, res) |
7960 | flag_C = 0; |
7961 | flag_V = 0; |
7962 | flag_NotZ = res; |
7963 | flag_N = res; |
7964 | adr = AREG((Opcode >> 9) & 7); |
7965 | AREG((Opcode >> 9) & 7) += 1; |
7966 | WRITE_BYTE_F(adr, res) |
7967 | POST_IO |
7968 | RET(14) |
7969 | } |
7970 | |
7971 | // MOVEB |
7972 | OPCODE(0x1127) |
7973 | { |
7974 | u32 adr, res; |
7975 | u32 src, dst; |
7976 | |
7977 | adr = AREG(7) - 2; |
7978 | AREG(7) = adr; |
7979 | PRE_IO |
7980 | READ_BYTE_F(adr, res) |
7981 | flag_C = 0; |
7982 | flag_V = 0; |
7983 | flag_NotZ = res; |
7984 | flag_N = res; |
7985 | adr = AREG((Opcode >> 9) & 7) - 1; |
7986 | AREG((Opcode >> 9) & 7) = adr; |
7987 | WRITE_BYTE_F(adr, res) |
7988 | POST_IO |
7989 | RET(14) |
7990 | } |
7991 | |
7992 | // MOVEB |
7993 | OPCODE(0x1167) |
7994 | { |
7995 | u32 adr, res; |
7996 | u32 src, dst; |
7997 | |
7998 | adr = AREG(7) - 2; |
7999 | AREG(7) = adr; |
8000 | PRE_IO |
8001 | READ_BYTE_F(adr, res) |
8002 | flag_C = 0; |
8003 | flag_V = 0; |
8004 | flag_NotZ = res; |
8005 | flag_N = res; |
8006 | FETCH_SWORD(adr); |
8007 | adr += AREG((Opcode >> 9) & 7); |
8008 | WRITE_BYTE_F(adr, res) |
8009 | POST_IO |
8010 | RET(18) |
8011 | } |
8012 | |
8013 | // MOVEB |
8014 | OPCODE(0x11A7) |
8015 | { |
8016 | u32 adr, res; |
8017 | u32 src, dst; |
8018 | |
8019 | adr = AREG(7) - 2; |
8020 | AREG(7) = adr; |
8021 | PRE_IO |
8022 | READ_BYTE_F(adr, res) |
8023 | flag_C = 0; |
8024 | flag_V = 0; |
8025 | flag_NotZ = res; |
8026 | flag_N = res; |
8027 | adr = AREG((Opcode >> 9) & 7); |
8028 | DECODE_EXT_WORD |
8029 | WRITE_BYTE_F(adr, res) |
8030 | POST_IO |
8031 | RET(20) |
8032 | } |
8033 | |
8034 | // MOVEB |
8035 | OPCODE(0x11E7) |
8036 | { |
8037 | u32 adr, res; |
8038 | u32 src, dst; |
8039 | |
8040 | adr = AREG(7) - 2; |
8041 | AREG(7) = adr; |
8042 | PRE_IO |
8043 | READ_BYTE_F(adr, res) |
8044 | flag_C = 0; |
8045 | flag_V = 0; |
8046 | flag_NotZ = res; |
8047 | flag_N = res; |
8048 | FETCH_SWORD(adr); |
8049 | WRITE_BYTE_F(adr, res) |
8050 | POST_IO |
8051 | RET(18) |
8052 | } |
8053 | |
8054 | // MOVEB |
8055 | OPCODE(0x13E7) |
8056 | { |
8057 | u32 adr, res; |
8058 | u32 src, dst; |
8059 | |
8060 | adr = AREG(7) - 2; |
8061 | AREG(7) = adr; |
8062 | PRE_IO |
8063 | READ_BYTE_F(adr, res) |
8064 | flag_C = 0; |
8065 | flag_V = 0; |
8066 | flag_NotZ = res; |
8067 | flag_N = res; |
8068 | FETCH_LONG(adr); |
8069 | WRITE_BYTE_F(adr, res) |
8070 | POST_IO |
8071 | RET(22) |
8072 | } |
8073 | |
8074 | // MOVEB |
8075 | OPCODE(0x1EE7) |
8076 | { |
8077 | u32 adr, res; |
8078 | u32 src, dst; |
8079 | |
8080 | adr = AREG(7) - 2; |
8081 | AREG(7) = adr; |
8082 | PRE_IO |
8083 | READ_BYTE_F(adr, res) |
8084 | flag_C = 0; |
8085 | flag_V = 0; |
8086 | flag_NotZ = res; |
8087 | flag_N = res; |
8088 | adr = AREG(7); |
8089 | AREG(7) += 2; |
8090 | WRITE_BYTE_F(adr, res) |
8091 | POST_IO |
8092 | RET(14) |
8093 | } |
8094 | |
8095 | // MOVEB |
8096 | OPCODE(0x1F27) |
8097 | { |
8098 | u32 adr, res; |
8099 | u32 src, dst; |
8100 | |
8101 | adr = AREG(7) - 2; |
8102 | AREG(7) = adr; |
8103 | PRE_IO |
8104 | READ_BYTE_F(adr, res) |
8105 | flag_C = 0; |
8106 | flag_V = 0; |
8107 | flag_NotZ = res; |
8108 | flag_N = res; |
8109 | adr = AREG(7) - 2; |
8110 | AREG(7) = adr; |
8111 | WRITE_BYTE_F(adr, res) |
8112 | POST_IO |
8113 | RET(14) |
8114 | } |
8115 | |
8116 | // MOVEL |
8117 | OPCODE(0x2000) |
8118 | { |
8119 | u32 adr, res; |
8120 | u32 src, dst; |
8121 | |
8122 | res = DREGu32((Opcode >> 0) & 7); |
8123 | flag_C = 0; |
8124 | flag_V = 0; |
8125 | flag_NotZ = res; |
8126 | flag_N = res >> 24; |
8127 | DREGu32((Opcode >> 9) & 7) = res; |
8128 | RET(4) |
8129 | } |
8130 | |
8131 | // MOVEL |
8132 | OPCODE(0x2080) |
8133 | { |
8134 | u32 adr, res; |
8135 | u32 src, dst; |
8136 | |
8137 | res = DREGu32((Opcode >> 0) & 7); |
8138 | flag_C = 0; |
8139 | flag_V = 0; |
8140 | flag_NotZ = res; |
8141 | flag_N = res >> 24; |
8142 | adr = AREG((Opcode >> 9) & 7); |
8143 | PRE_IO |
8144 | WRITE_LONG_F(adr, res) |
8145 | POST_IO |
8146 | RET(12) |
8147 | } |
8148 | |
8149 | // MOVEL |
8150 | OPCODE(0x20C0) |
8151 | { |
8152 | u32 adr, res; |
8153 | u32 src, dst; |
8154 | |
8155 | res = DREGu32((Opcode >> 0) & 7); |
8156 | flag_C = 0; |
8157 | flag_V = 0; |
8158 | flag_NotZ = res; |
8159 | flag_N = res >> 24; |
8160 | adr = AREG((Opcode >> 9) & 7); |
8161 | AREG((Opcode >> 9) & 7) += 4; |
8162 | PRE_IO |
8163 | WRITE_LONG_F(adr, res) |
8164 | POST_IO |
8165 | RET(12) |
8166 | } |
8167 | |
8168 | // MOVEL |
8169 | OPCODE(0x2100) |
8170 | { |
8171 | u32 adr, res; |
8172 | u32 src, dst; |
8173 | |
8174 | res = DREGu32((Opcode >> 0) & 7); |
8175 | flag_C = 0; |
8176 | flag_V = 0; |
8177 | flag_NotZ = res; |
8178 | flag_N = res >> 24; |
8179 | adr = AREG((Opcode >> 9) & 7) - 4; |
8180 | AREG((Opcode >> 9) & 7) = adr; |
8181 | PRE_IO |
80db4442 |
8182 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8183 | POST_IO |
8184 | RET(12) |
8185 | } |
8186 | |
8187 | // MOVEL |
8188 | OPCODE(0x2140) |
8189 | { |
8190 | u32 adr, res; |
8191 | u32 src, dst; |
8192 | |
8193 | res = DREGu32((Opcode >> 0) & 7); |
8194 | flag_C = 0; |
8195 | flag_V = 0; |
8196 | flag_NotZ = res; |
8197 | flag_N = res >> 24; |
8198 | FETCH_SWORD(adr); |
8199 | adr += AREG((Opcode >> 9) & 7); |
8200 | PRE_IO |
8201 | WRITE_LONG_F(adr, res) |
8202 | POST_IO |
8203 | RET(16) |
8204 | } |
8205 | |
8206 | // MOVEL |
8207 | OPCODE(0x2180) |
8208 | { |
8209 | u32 adr, res; |
8210 | u32 src, dst; |
8211 | |
8212 | res = DREGu32((Opcode >> 0) & 7); |
8213 | flag_C = 0; |
8214 | flag_V = 0; |
8215 | flag_NotZ = res; |
8216 | flag_N = res >> 24; |
8217 | adr = AREG((Opcode >> 9) & 7); |
8218 | DECODE_EXT_WORD |
8219 | PRE_IO |
8220 | WRITE_LONG_F(adr, res) |
8221 | POST_IO |
8222 | RET(18) |
8223 | } |
8224 | |
8225 | // MOVEL |
8226 | OPCODE(0x21C0) |
8227 | { |
8228 | u32 adr, res; |
8229 | u32 src, dst; |
8230 | |
8231 | res = DREGu32((Opcode >> 0) & 7); |
8232 | flag_C = 0; |
8233 | flag_V = 0; |
8234 | flag_NotZ = res; |
8235 | flag_N = res >> 24; |
8236 | FETCH_SWORD(adr); |
8237 | PRE_IO |
8238 | WRITE_LONG_F(adr, res) |
8239 | POST_IO |
8240 | RET(16) |
8241 | } |
8242 | |
8243 | // MOVEL |
8244 | OPCODE(0x23C0) |
8245 | { |
8246 | u32 adr, res; |
8247 | u32 src, dst; |
8248 | |
8249 | res = DREGu32((Opcode >> 0) & 7); |
8250 | flag_C = 0; |
8251 | flag_V = 0; |
8252 | flag_NotZ = res; |
8253 | flag_N = res >> 24; |
8254 | FETCH_LONG(adr); |
8255 | PRE_IO |
8256 | WRITE_LONG_F(adr, res) |
8257 | POST_IO |
8258 | RET(20) |
8259 | } |
8260 | |
8261 | // MOVEL |
8262 | OPCODE(0x2EC0) |
8263 | { |
8264 | u32 adr, res; |
8265 | u32 src, dst; |
8266 | |
8267 | res = DREGu32((Opcode >> 0) & 7); |
8268 | flag_C = 0; |
8269 | flag_V = 0; |
8270 | flag_NotZ = res; |
8271 | flag_N = res >> 24; |
8272 | adr = AREG(7); |
8273 | AREG(7) += 4; |
8274 | PRE_IO |
8275 | WRITE_LONG_F(adr, res) |
8276 | POST_IO |
8277 | RET(12) |
8278 | } |
8279 | |
8280 | // MOVEL |
8281 | OPCODE(0x2F00) |
8282 | { |
8283 | u32 adr, res; |
8284 | u32 src, dst; |
8285 | |
8286 | res = DREGu32((Opcode >> 0) & 7); |
8287 | flag_C = 0; |
8288 | flag_V = 0; |
8289 | flag_NotZ = res; |
8290 | flag_N = res >> 24; |
8291 | adr = AREG(7) - 4; |
8292 | AREG(7) = adr; |
8293 | PRE_IO |
03e4f2a3 |
8294 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8295 | POST_IO |
8296 | RET(12) |
8297 | } |
8298 | |
8299 | // MOVEL |
8300 | OPCODE(0x2008) |
8301 | { |
8302 | u32 adr, res; |
8303 | u32 src, dst; |
8304 | |
8305 | res = AREGu32((Opcode >> 0) & 7); |
8306 | flag_C = 0; |
8307 | flag_V = 0; |
8308 | flag_NotZ = res; |
8309 | flag_N = res >> 24; |
8310 | DREGu32((Opcode >> 9) & 7) = res; |
8311 | RET(4) |
8312 | } |
8313 | |
8314 | // MOVEL |
8315 | OPCODE(0x2088) |
8316 | { |
8317 | u32 adr, res; |
8318 | u32 src, dst; |
8319 | |
8320 | res = AREGu32((Opcode >> 0) & 7); |
8321 | flag_C = 0; |
8322 | flag_V = 0; |
8323 | flag_NotZ = res; |
8324 | flag_N = res >> 24; |
8325 | adr = AREG((Opcode >> 9) & 7); |
8326 | PRE_IO |
8327 | WRITE_LONG_F(adr, res) |
8328 | POST_IO |
8329 | RET(12) |
8330 | } |
8331 | |
8332 | // MOVEL |
8333 | OPCODE(0x20C8) |
8334 | { |
8335 | u32 adr, res; |
8336 | u32 src, dst; |
8337 | |
8338 | res = AREGu32((Opcode >> 0) & 7); |
8339 | flag_C = 0; |
8340 | flag_V = 0; |
8341 | flag_NotZ = res; |
8342 | flag_N = res >> 24; |
8343 | adr = AREG((Opcode >> 9) & 7); |
8344 | AREG((Opcode >> 9) & 7) += 4; |
8345 | PRE_IO |
8346 | WRITE_LONG_F(adr, res) |
8347 | POST_IO |
8348 | RET(12) |
8349 | } |
8350 | |
8351 | // MOVEL |
8352 | OPCODE(0x2108) |
8353 | { |
8354 | u32 adr, res; |
8355 | u32 src, dst; |
8356 | |
8357 | res = AREGu32((Opcode >> 0) & 7); |
8358 | flag_C = 0; |
8359 | flag_V = 0; |
8360 | flag_NotZ = res; |
8361 | flag_N = res >> 24; |
8362 | adr = AREG((Opcode >> 9) & 7) - 4; |
8363 | AREG((Opcode >> 9) & 7) = adr; |
8364 | PRE_IO |
80db4442 |
8365 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8366 | POST_IO |
8367 | RET(12) |
8368 | } |
8369 | |
8370 | // MOVEL |
8371 | OPCODE(0x2148) |
8372 | { |
8373 | u32 adr, res; |
8374 | u32 src, dst; |
8375 | |
8376 | res = AREGu32((Opcode >> 0) & 7); |
8377 | flag_C = 0; |
8378 | flag_V = 0; |
8379 | flag_NotZ = res; |
8380 | flag_N = res >> 24; |
8381 | FETCH_SWORD(adr); |
8382 | adr += AREG((Opcode >> 9) & 7); |
8383 | PRE_IO |
8384 | WRITE_LONG_F(adr, res) |
8385 | POST_IO |
8386 | RET(16) |
8387 | } |
8388 | |
8389 | // MOVEL |
8390 | OPCODE(0x2188) |
8391 | { |
8392 | u32 adr, res; |
8393 | u32 src, dst; |
8394 | |
8395 | res = AREGu32((Opcode >> 0) & 7); |
8396 | flag_C = 0; |
8397 | flag_V = 0; |
8398 | flag_NotZ = res; |
8399 | flag_N = res >> 24; |
8400 | adr = AREG((Opcode >> 9) & 7); |
8401 | DECODE_EXT_WORD |
8402 | PRE_IO |
8403 | WRITE_LONG_F(adr, res) |
8404 | POST_IO |
8405 | RET(18) |
8406 | } |
8407 | |
8408 | // MOVEL |
8409 | OPCODE(0x21C8) |
8410 | { |
8411 | u32 adr, res; |
8412 | u32 src, dst; |
8413 | |
8414 | res = AREGu32((Opcode >> 0) & 7); |
8415 | flag_C = 0; |
8416 | flag_V = 0; |
8417 | flag_NotZ = res; |
8418 | flag_N = res >> 24; |
8419 | FETCH_SWORD(adr); |
8420 | PRE_IO |
8421 | WRITE_LONG_F(adr, res) |
8422 | POST_IO |
8423 | RET(16) |
8424 | } |
8425 | |
8426 | // MOVEL |
8427 | OPCODE(0x23C8) |
8428 | { |
8429 | u32 adr, res; |
8430 | u32 src, dst; |
8431 | |
8432 | res = AREGu32((Opcode >> 0) & 7); |
8433 | flag_C = 0; |
8434 | flag_V = 0; |
8435 | flag_NotZ = res; |
8436 | flag_N = res >> 24; |
8437 | FETCH_LONG(adr); |
8438 | PRE_IO |
8439 | WRITE_LONG_F(adr, res) |
8440 | POST_IO |
8441 | RET(20) |
8442 | } |
8443 | |
8444 | // MOVEL |
8445 | OPCODE(0x2EC8) |
8446 | { |
8447 | u32 adr, res; |
8448 | u32 src, dst; |
8449 | |
8450 | res = AREGu32((Opcode >> 0) & 7); |
8451 | flag_C = 0; |
8452 | flag_V = 0; |
8453 | flag_NotZ = res; |
8454 | flag_N = res >> 24; |
8455 | adr = AREG(7); |
8456 | AREG(7) += 4; |
8457 | PRE_IO |
8458 | WRITE_LONG_F(adr, res) |
8459 | POST_IO |
8460 | RET(12) |
8461 | } |
8462 | |
8463 | // MOVEL |
8464 | OPCODE(0x2F08) |
8465 | { |
8466 | u32 adr, res; |
8467 | u32 src, dst; |
8468 | |
8469 | res = AREGu32((Opcode >> 0) & 7); |
8470 | flag_C = 0; |
8471 | flag_V = 0; |
8472 | flag_NotZ = res; |
8473 | flag_N = res >> 24; |
8474 | adr = AREG(7) - 4; |
8475 | AREG(7) = adr; |
8476 | PRE_IO |
03e4f2a3 |
8477 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8478 | POST_IO |
8479 | RET(12) |
8480 | } |
8481 | |
8482 | // MOVEL |
8483 | OPCODE(0x2010) |
8484 | { |
8485 | u32 adr, res; |
8486 | u32 src, dst; |
8487 | |
8488 | adr = AREG((Opcode >> 0) & 7); |
8489 | PRE_IO |
8490 | READ_LONG_F(adr, res) |
8491 | flag_C = 0; |
8492 | flag_V = 0; |
8493 | flag_NotZ = res; |
8494 | flag_N = res >> 24; |
8495 | DREGu32((Opcode >> 9) & 7) = res; |
8496 | POST_IO |
8497 | RET(12) |
8498 | } |
8499 | |
8500 | // MOVEL |
8501 | OPCODE(0x2090) |
8502 | { |
8503 | u32 adr, res; |
8504 | u32 src, dst; |
8505 | |
8506 | adr = AREG((Opcode >> 0) & 7); |
8507 | PRE_IO |
8508 | READ_LONG_F(adr, res) |
8509 | flag_C = 0; |
8510 | flag_V = 0; |
8511 | flag_NotZ = res; |
8512 | flag_N = res >> 24; |
8513 | adr = AREG((Opcode >> 9) & 7); |
8514 | WRITE_LONG_F(adr, res) |
8515 | POST_IO |
8516 | RET(20) |
8517 | } |
8518 | |
8519 | // MOVEL |
8520 | OPCODE(0x20D0) |
8521 | { |
8522 | u32 adr, res; |
8523 | u32 src, dst; |
8524 | |
8525 | adr = AREG((Opcode >> 0) & 7); |
8526 | PRE_IO |
8527 | READ_LONG_F(adr, res) |
8528 | flag_C = 0; |
8529 | flag_V = 0; |
8530 | flag_NotZ = res; |
8531 | flag_N = res >> 24; |
8532 | adr = AREG((Opcode >> 9) & 7); |
8533 | AREG((Opcode >> 9) & 7) += 4; |
8534 | WRITE_LONG_F(adr, res) |
8535 | POST_IO |
8536 | RET(20) |
8537 | } |
8538 | |
8539 | // MOVEL |
8540 | OPCODE(0x2110) |
8541 | { |
8542 | u32 adr, res; |
8543 | u32 src, dst; |
8544 | |
8545 | adr = AREG((Opcode >> 0) & 7); |
8546 | PRE_IO |
8547 | READ_LONG_F(adr, res) |
8548 | flag_C = 0; |
8549 | flag_V = 0; |
8550 | flag_NotZ = res; |
8551 | flag_N = res >> 24; |
8552 | adr = AREG((Opcode >> 9) & 7) - 4; |
8553 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8554 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8555 | POST_IO |
8556 | RET(20) |
8557 | } |
8558 | |
8559 | // MOVEL |
8560 | OPCODE(0x2150) |
8561 | { |
8562 | u32 adr, res; |
8563 | u32 src, dst; |
8564 | |
8565 | adr = AREG((Opcode >> 0) & 7); |
8566 | PRE_IO |
8567 | READ_LONG_F(adr, res) |
8568 | flag_C = 0; |
8569 | flag_V = 0; |
8570 | flag_NotZ = res; |
8571 | flag_N = res >> 24; |
8572 | FETCH_SWORD(adr); |
8573 | adr += AREG((Opcode >> 9) & 7); |
8574 | WRITE_LONG_F(adr, res) |
8575 | POST_IO |
8576 | RET(24) |
8577 | } |
8578 | |
8579 | // MOVEL |
8580 | OPCODE(0x2190) |
8581 | { |
8582 | u32 adr, res; |
8583 | u32 src, dst; |
8584 | |
8585 | adr = AREG((Opcode >> 0) & 7); |
8586 | PRE_IO |
8587 | READ_LONG_F(adr, res) |
8588 | flag_C = 0; |
8589 | flag_V = 0; |
8590 | flag_NotZ = res; |
8591 | flag_N = res >> 24; |
8592 | adr = AREG((Opcode >> 9) & 7); |
8593 | DECODE_EXT_WORD |
8594 | WRITE_LONG_F(adr, res) |
8595 | POST_IO |
8596 | RET(26) |
8597 | } |
8598 | |
8599 | // MOVEL |
8600 | OPCODE(0x21D0) |
8601 | { |
8602 | u32 adr, res; |
8603 | u32 src, dst; |
8604 | |
8605 | adr = AREG((Opcode >> 0) & 7); |
8606 | PRE_IO |
8607 | READ_LONG_F(adr, res) |
8608 | flag_C = 0; |
8609 | flag_V = 0; |
8610 | flag_NotZ = res; |
8611 | flag_N = res >> 24; |
8612 | FETCH_SWORD(adr); |
8613 | WRITE_LONG_F(adr, res) |
8614 | POST_IO |
8615 | RET(24) |
8616 | } |
8617 | |
8618 | // MOVEL |
8619 | OPCODE(0x23D0) |
8620 | { |
8621 | u32 adr, res; |
8622 | u32 src, dst; |
8623 | |
8624 | adr = AREG((Opcode >> 0) & 7); |
8625 | PRE_IO |
8626 | READ_LONG_F(adr, res) |
8627 | flag_C = 0; |
8628 | flag_V = 0; |
8629 | flag_NotZ = res; |
8630 | flag_N = res >> 24; |
8631 | FETCH_LONG(adr); |
8632 | WRITE_LONG_F(adr, res) |
8633 | POST_IO |
8634 | RET(28) |
8635 | } |
8636 | |
8637 | // MOVEL |
8638 | OPCODE(0x2ED0) |
8639 | { |
8640 | u32 adr, res; |
8641 | u32 src, dst; |
8642 | |
8643 | adr = AREG((Opcode >> 0) & 7); |
8644 | PRE_IO |
8645 | READ_LONG_F(adr, res) |
8646 | flag_C = 0; |
8647 | flag_V = 0; |
8648 | flag_NotZ = res; |
8649 | flag_N = res >> 24; |
8650 | adr = AREG(7); |
8651 | AREG(7) += 4; |
8652 | WRITE_LONG_F(adr, res) |
8653 | POST_IO |
8654 | RET(20) |
8655 | } |
8656 | |
8657 | // MOVEL |
8658 | OPCODE(0x2F10) |
8659 | { |
8660 | u32 adr, res; |
8661 | u32 src, dst; |
8662 | |
8663 | adr = AREG((Opcode >> 0) & 7); |
8664 | PRE_IO |
8665 | READ_LONG_F(adr, res) |
8666 | flag_C = 0; |
8667 | flag_V = 0; |
8668 | flag_NotZ = res; |
8669 | flag_N = res >> 24; |
8670 | adr = AREG(7) - 4; |
8671 | AREG(7) = adr; |
03e4f2a3 |
8672 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8673 | POST_IO |
8674 | RET(20) |
8675 | } |
8676 | |
8677 | // MOVEL |
8678 | OPCODE(0x2018) |
8679 | { |
8680 | u32 adr, res; |
8681 | u32 src, dst; |
8682 | |
8683 | adr = AREG((Opcode >> 0) & 7); |
8684 | AREG((Opcode >> 0) & 7) += 4; |
8685 | PRE_IO |
8686 | READ_LONG_F(adr, res) |
8687 | flag_C = 0; |
8688 | flag_V = 0; |
8689 | flag_NotZ = res; |
8690 | flag_N = res >> 24; |
8691 | DREGu32((Opcode >> 9) & 7) = res; |
8692 | POST_IO |
8693 | RET(12) |
8694 | } |
8695 | |
8696 | // MOVEL |
8697 | OPCODE(0x2098) |
8698 | { |
8699 | u32 adr, res; |
8700 | u32 src, dst; |
8701 | |
8702 | adr = AREG((Opcode >> 0) & 7); |
8703 | AREG((Opcode >> 0) & 7) += 4; |
8704 | PRE_IO |
8705 | READ_LONG_F(adr, res) |
8706 | flag_C = 0; |
8707 | flag_V = 0; |
8708 | flag_NotZ = res; |
8709 | flag_N = res >> 24; |
8710 | adr = AREG((Opcode >> 9) & 7); |
8711 | WRITE_LONG_F(adr, res) |
8712 | POST_IO |
8713 | RET(20) |
8714 | } |
8715 | |
8716 | // MOVEL |
8717 | OPCODE(0x20D8) |
8718 | { |
8719 | u32 adr, res; |
8720 | u32 src, dst; |
8721 | |
8722 | adr = AREG((Opcode >> 0) & 7); |
8723 | AREG((Opcode >> 0) & 7) += 4; |
8724 | PRE_IO |
8725 | READ_LONG_F(adr, res) |
8726 | flag_C = 0; |
8727 | flag_V = 0; |
8728 | flag_NotZ = res; |
8729 | flag_N = res >> 24; |
8730 | adr = AREG((Opcode >> 9) & 7); |
8731 | AREG((Opcode >> 9) & 7) += 4; |
8732 | WRITE_LONG_F(adr, res) |
8733 | POST_IO |
8734 | RET(20) |
8735 | } |
8736 | |
8737 | // MOVEL |
8738 | OPCODE(0x2118) |
8739 | { |
8740 | u32 adr, res; |
8741 | u32 src, dst; |
8742 | |
8743 | adr = AREG((Opcode >> 0) & 7); |
8744 | AREG((Opcode >> 0) & 7) += 4; |
8745 | PRE_IO |
8746 | READ_LONG_F(adr, res) |
8747 | flag_C = 0; |
8748 | flag_V = 0; |
8749 | flag_NotZ = res; |
8750 | flag_N = res >> 24; |
8751 | adr = AREG((Opcode >> 9) & 7) - 4; |
8752 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8753 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8754 | POST_IO |
8755 | RET(20) |
8756 | } |
8757 | |
8758 | // MOVEL |
8759 | OPCODE(0x2158) |
8760 | { |
8761 | u32 adr, res; |
8762 | u32 src, dst; |
8763 | |
8764 | adr = AREG((Opcode >> 0) & 7); |
8765 | AREG((Opcode >> 0) & 7) += 4; |
8766 | PRE_IO |
8767 | READ_LONG_F(adr, res) |
8768 | flag_C = 0; |
8769 | flag_V = 0; |
8770 | flag_NotZ = res; |
8771 | flag_N = res >> 24; |
8772 | FETCH_SWORD(adr); |
8773 | adr += AREG((Opcode >> 9) & 7); |
8774 | WRITE_LONG_F(adr, res) |
8775 | POST_IO |
8776 | RET(24) |
8777 | } |
8778 | |
8779 | // MOVEL |
8780 | OPCODE(0x2198) |
8781 | { |
8782 | u32 adr, res; |
8783 | u32 src, dst; |
8784 | |
8785 | adr = AREG((Opcode >> 0) & 7); |
8786 | AREG((Opcode >> 0) & 7) += 4; |
8787 | PRE_IO |
8788 | READ_LONG_F(adr, res) |
8789 | flag_C = 0; |
8790 | flag_V = 0; |
8791 | flag_NotZ = res; |
8792 | flag_N = res >> 24; |
8793 | adr = AREG((Opcode >> 9) & 7); |
8794 | DECODE_EXT_WORD |
8795 | WRITE_LONG_F(adr, res) |
8796 | POST_IO |
8797 | RET(26) |
8798 | } |
8799 | |
8800 | // MOVEL |
8801 | OPCODE(0x21D8) |
8802 | { |
8803 | u32 adr, res; |
8804 | u32 src, dst; |
8805 | |
8806 | adr = AREG((Opcode >> 0) & 7); |
8807 | AREG((Opcode >> 0) & 7) += 4; |
8808 | PRE_IO |
8809 | READ_LONG_F(adr, res) |
8810 | flag_C = 0; |
8811 | flag_V = 0; |
8812 | flag_NotZ = res; |
8813 | flag_N = res >> 24; |
8814 | FETCH_SWORD(adr); |
8815 | WRITE_LONG_F(adr, res) |
8816 | POST_IO |
8817 | RET(24) |
8818 | } |
8819 | |
8820 | // MOVEL |
8821 | OPCODE(0x23D8) |
8822 | { |
8823 | u32 adr, res; |
8824 | u32 src, dst; |
8825 | |
8826 | adr = AREG((Opcode >> 0) & 7); |
8827 | AREG((Opcode >> 0) & 7) += 4; |
8828 | PRE_IO |
8829 | READ_LONG_F(adr, res) |
8830 | flag_C = 0; |
8831 | flag_V = 0; |
8832 | flag_NotZ = res; |
8833 | flag_N = res >> 24; |
8834 | FETCH_LONG(adr); |
8835 | WRITE_LONG_F(adr, res) |
8836 | POST_IO |
8837 | RET(28) |
8838 | } |
8839 | |
8840 | // MOVEL |
8841 | OPCODE(0x2ED8) |
8842 | { |
8843 | u32 adr, res; |
8844 | u32 src, dst; |
8845 | |
8846 | adr = AREG((Opcode >> 0) & 7); |
8847 | AREG((Opcode >> 0) & 7) += 4; |
8848 | PRE_IO |
8849 | READ_LONG_F(adr, res) |
8850 | flag_C = 0; |
8851 | flag_V = 0; |
8852 | flag_NotZ = res; |
8853 | flag_N = res >> 24; |
8854 | adr = AREG(7); |
8855 | AREG(7) += 4; |
8856 | WRITE_LONG_F(adr, res) |
8857 | POST_IO |
8858 | RET(20) |
8859 | } |
8860 | |
8861 | // MOVEL |
8862 | OPCODE(0x2F18) |
8863 | { |
8864 | u32 adr, res; |
8865 | u32 src, dst; |
8866 | |
8867 | adr = AREG((Opcode >> 0) & 7); |
8868 | AREG((Opcode >> 0) & 7) += 4; |
8869 | PRE_IO |
8870 | READ_LONG_F(adr, res) |
8871 | flag_C = 0; |
8872 | flag_V = 0; |
8873 | flag_NotZ = res; |
8874 | flag_N = res >> 24; |
8875 | adr = AREG(7) - 4; |
8876 | AREG(7) = adr; |
03e4f2a3 |
8877 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8878 | POST_IO |
8879 | RET(20) |
8880 | } |
8881 | |
8882 | // MOVEL |
8883 | OPCODE(0x2020) |
8884 | { |
8885 | u32 adr, res; |
8886 | u32 src, dst; |
8887 | |
8888 | adr = AREG((Opcode >> 0) & 7) - 4; |
8889 | AREG((Opcode >> 0) & 7) = adr; |
8890 | PRE_IO |
8891 | READ_LONG_F(adr, res) |
8892 | flag_C = 0; |
8893 | flag_V = 0; |
8894 | flag_NotZ = res; |
8895 | flag_N = res >> 24; |
8896 | DREGu32((Opcode >> 9) & 7) = res; |
8897 | POST_IO |
8898 | RET(14) |
8899 | } |
8900 | |
8901 | // MOVEL |
8902 | OPCODE(0x20A0) |
8903 | { |
8904 | u32 adr, res; |
8905 | u32 src, dst; |
8906 | |
8907 | adr = AREG((Opcode >> 0) & 7) - 4; |
8908 | AREG((Opcode >> 0) & 7) = adr; |
8909 | PRE_IO |
8910 | READ_LONG_F(adr, res) |
8911 | flag_C = 0; |
8912 | flag_V = 0; |
8913 | flag_NotZ = res; |
8914 | flag_N = res >> 24; |
8915 | adr = AREG((Opcode >> 9) & 7); |
8916 | WRITE_LONG_F(adr, res) |
8917 | POST_IO |
8918 | RET(22) |
8919 | } |
8920 | |
8921 | // MOVEL |
8922 | OPCODE(0x20E0) |
8923 | { |
8924 | u32 adr, res; |
8925 | u32 src, dst; |
8926 | |
8927 | adr = AREG((Opcode >> 0) & 7) - 4; |
8928 | AREG((Opcode >> 0) & 7) = adr; |
8929 | PRE_IO |
8930 | READ_LONG_F(adr, res) |
8931 | flag_C = 0; |
8932 | flag_V = 0; |
8933 | flag_NotZ = res; |
8934 | flag_N = res >> 24; |
8935 | adr = AREG((Opcode >> 9) & 7); |
8936 | AREG((Opcode >> 9) & 7) += 4; |
8937 | WRITE_LONG_F(adr, res) |
8938 | POST_IO |
8939 | RET(22) |
8940 | } |
8941 | |
8942 | // MOVEL |
8943 | OPCODE(0x2120) |
8944 | { |
8945 | u32 adr, res; |
8946 | u32 src, dst; |
8947 | |
8948 | adr = AREG((Opcode >> 0) & 7) - 4; |
8949 | AREG((Opcode >> 0) & 7) = adr; |
8950 | PRE_IO |
8951 | READ_LONG_F(adr, res) |
8952 | flag_C = 0; |
8953 | flag_V = 0; |
8954 | flag_NotZ = res; |
8955 | flag_N = res >> 24; |
8956 | adr = AREG((Opcode >> 9) & 7) - 4; |
8957 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8958 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8959 | POST_IO |
8960 | RET(22) |
8961 | } |
8962 | |
8963 | // MOVEL |
8964 | OPCODE(0x2160) |
8965 | { |
8966 | u32 adr, res; |
8967 | u32 src, dst; |
8968 | |
8969 | adr = AREG((Opcode >> 0) & 7) - 4; |
8970 | AREG((Opcode >> 0) & 7) = adr; |
8971 | PRE_IO |
8972 | READ_LONG_F(adr, res) |
8973 | flag_C = 0; |
8974 | flag_V = 0; |
8975 | flag_NotZ = res; |
8976 | flag_N = res >> 24; |
8977 | FETCH_SWORD(adr); |
8978 | adr += AREG((Opcode >> 9) & 7); |
8979 | WRITE_LONG_F(adr, res) |
8980 | POST_IO |
8981 | RET(26) |
8982 | } |
8983 | |
8984 | // MOVEL |
8985 | OPCODE(0x21A0) |
8986 | { |
8987 | u32 adr, res; |
8988 | u32 src, dst; |
8989 | |
8990 | adr = AREG((Opcode >> 0) & 7) - 4; |
8991 | AREG((Opcode >> 0) & 7) = adr; |
8992 | PRE_IO |
8993 | READ_LONG_F(adr, res) |
8994 | flag_C = 0; |
8995 | flag_V = 0; |
8996 | flag_NotZ = res; |
8997 | flag_N = res >> 24; |
8998 | adr = AREG((Opcode >> 9) & 7); |
8999 | DECODE_EXT_WORD |
9000 | WRITE_LONG_F(adr, res) |
9001 | POST_IO |
9002 | RET(28) |
9003 | } |
9004 | |
9005 | // MOVEL |
9006 | OPCODE(0x21E0) |
9007 | { |
9008 | u32 adr, res; |
9009 | u32 src, dst; |
9010 | |
9011 | adr = AREG((Opcode >> 0) & 7) - 4; |
9012 | AREG((Opcode >> 0) & 7) = adr; |
9013 | PRE_IO |
9014 | READ_LONG_F(adr, res) |
9015 | flag_C = 0; |
9016 | flag_V = 0; |
9017 | flag_NotZ = res; |
9018 | flag_N = res >> 24; |
9019 | FETCH_SWORD(adr); |
9020 | WRITE_LONG_F(adr, res) |
9021 | POST_IO |
9022 | RET(26) |
9023 | } |
9024 | |
9025 | // MOVEL |
9026 | OPCODE(0x23E0) |
9027 | { |
9028 | u32 adr, res; |
9029 | u32 src, dst; |
9030 | |
9031 | adr = AREG((Opcode >> 0) & 7) - 4; |
9032 | AREG((Opcode >> 0) & 7) = adr; |
9033 | PRE_IO |
9034 | READ_LONG_F(adr, res) |
9035 | flag_C = 0; |
9036 | flag_V = 0; |
9037 | flag_NotZ = res; |
9038 | flag_N = res >> 24; |
9039 | FETCH_LONG(adr); |
9040 | WRITE_LONG_F(adr, res) |
9041 | POST_IO |
9042 | RET(30) |
9043 | } |
9044 | |
9045 | // MOVEL |
9046 | OPCODE(0x2EE0) |
9047 | { |
9048 | u32 adr, res; |
9049 | u32 src, dst; |
9050 | |
9051 | adr = AREG((Opcode >> 0) & 7) - 4; |
9052 | AREG((Opcode >> 0) & 7) = adr; |
9053 | PRE_IO |
9054 | READ_LONG_F(adr, res) |
9055 | flag_C = 0; |
9056 | flag_V = 0; |
9057 | flag_NotZ = res; |
9058 | flag_N = res >> 24; |
9059 | adr = AREG(7); |
9060 | AREG(7) += 4; |
9061 | WRITE_LONG_F(adr, res) |
9062 | POST_IO |
9063 | RET(22) |
9064 | } |
9065 | |
9066 | // MOVEL |
9067 | OPCODE(0x2F20) |
9068 | { |
9069 | u32 adr, res; |
9070 | u32 src, dst; |
9071 | |
9072 | adr = AREG((Opcode >> 0) & 7) - 4; |
9073 | AREG((Opcode >> 0) & 7) = adr; |
9074 | PRE_IO |
9075 | READ_LONG_F(adr, res) |
9076 | flag_C = 0; |
9077 | flag_V = 0; |
9078 | flag_NotZ = res; |
9079 | flag_N = res >> 24; |
9080 | adr = AREG(7) - 4; |
9081 | AREG(7) = adr; |
03e4f2a3 |
9082 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9083 | POST_IO |
9084 | RET(22) |
9085 | } |
9086 | |
9087 | // MOVEL |
9088 | OPCODE(0x2028) |
9089 | { |
9090 | u32 adr, res; |
9091 | u32 src, dst; |
9092 | |
9093 | FETCH_SWORD(adr); |
9094 | adr += AREG((Opcode >> 0) & 7); |
9095 | PRE_IO |
9096 | READ_LONG_F(adr, res) |
9097 | flag_C = 0; |
9098 | flag_V = 0; |
9099 | flag_NotZ = res; |
9100 | flag_N = res >> 24; |
9101 | DREGu32((Opcode >> 9) & 7) = res; |
9102 | POST_IO |
9103 | RET(16) |
9104 | } |
9105 | |
9106 | // MOVEL |
9107 | OPCODE(0x20A8) |
9108 | { |
9109 | u32 adr, res; |
9110 | u32 src, dst; |
9111 | |
9112 | FETCH_SWORD(adr); |
9113 | adr += AREG((Opcode >> 0) & 7); |
9114 | PRE_IO |
9115 | READ_LONG_F(adr, res) |
9116 | flag_C = 0; |
9117 | flag_V = 0; |
9118 | flag_NotZ = res; |
9119 | flag_N = res >> 24; |
9120 | adr = AREG((Opcode >> 9) & 7); |
9121 | WRITE_LONG_F(adr, res) |
9122 | POST_IO |
9123 | RET(24) |
9124 | } |
9125 | |
9126 | // MOVEL |
9127 | OPCODE(0x20E8) |
9128 | { |
9129 | u32 adr, res; |
9130 | u32 src, dst; |
9131 | |
9132 | FETCH_SWORD(adr); |
9133 | adr += AREG((Opcode >> 0) & 7); |
9134 | PRE_IO |
9135 | READ_LONG_F(adr, res) |
9136 | flag_C = 0; |
9137 | flag_V = 0; |
9138 | flag_NotZ = res; |
9139 | flag_N = res >> 24; |
9140 | adr = AREG((Opcode >> 9) & 7); |
9141 | AREG((Opcode >> 9) & 7) += 4; |
9142 | WRITE_LONG_F(adr, res) |
9143 | POST_IO |
9144 | RET(24) |
9145 | } |
9146 | |
9147 | // MOVEL |
9148 | OPCODE(0x2128) |
9149 | { |
9150 | u32 adr, res; |
9151 | u32 src, dst; |
9152 | |
9153 | FETCH_SWORD(adr); |
9154 | adr += AREG((Opcode >> 0) & 7); |
9155 | PRE_IO |
9156 | READ_LONG_F(adr, res) |
9157 | flag_C = 0; |
9158 | flag_V = 0; |
9159 | flag_NotZ = res; |
9160 | flag_N = res >> 24; |
9161 | adr = AREG((Opcode >> 9) & 7) - 4; |
9162 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9163 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9164 | POST_IO |
9165 | RET(24) |
9166 | } |
9167 | |
9168 | // MOVEL |
9169 | OPCODE(0x2168) |
9170 | { |
9171 | u32 adr, res; |
9172 | u32 src, dst; |
9173 | |
9174 | FETCH_SWORD(adr); |
9175 | adr += AREG((Opcode >> 0) & 7); |
9176 | PRE_IO |
9177 | READ_LONG_F(adr, res) |
9178 | flag_C = 0; |
9179 | flag_V = 0; |
9180 | flag_NotZ = res; |
9181 | flag_N = res >> 24; |
9182 | FETCH_SWORD(adr); |
9183 | adr += AREG((Opcode >> 9) & 7); |
9184 | WRITE_LONG_F(adr, res) |
9185 | POST_IO |
9186 | RET(28) |
9187 | } |
9188 | |
9189 | // MOVEL |
9190 | OPCODE(0x21A8) |
9191 | { |
9192 | u32 adr, res; |
9193 | u32 src, dst; |
9194 | |
9195 | FETCH_SWORD(adr); |
9196 | adr += AREG((Opcode >> 0) & 7); |
9197 | PRE_IO |
9198 | READ_LONG_F(adr, res) |
9199 | flag_C = 0; |
9200 | flag_V = 0; |
9201 | flag_NotZ = res; |
9202 | flag_N = res >> 24; |
9203 | adr = AREG((Opcode >> 9) & 7); |
9204 | DECODE_EXT_WORD |
9205 | WRITE_LONG_F(adr, res) |
9206 | POST_IO |
9207 | RET(30) |
9208 | } |
9209 | |
9210 | // MOVEL |
9211 | OPCODE(0x21E8) |
9212 | { |
9213 | u32 adr, res; |
9214 | u32 src, dst; |
9215 | |
9216 | FETCH_SWORD(adr); |
9217 | adr += AREG((Opcode >> 0) & 7); |
9218 | PRE_IO |
9219 | READ_LONG_F(adr, res) |
9220 | flag_C = 0; |
9221 | flag_V = 0; |
9222 | flag_NotZ = res; |
9223 | flag_N = res >> 24; |
9224 | FETCH_SWORD(adr); |
9225 | WRITE_LONG_F(adr, res) |
9226 | POST_IO |
9227 | RET(28) |
9228 | } |
9229 | |
9230 | // MOVEL |
9231 | OPCODE(0x23E8) |
9232 | { |
9233 | u32 adr, res; |
9234 | u32 src, dst; |
9235 | |
9236 | FETCH_SWORD(adr); |
9237 | adr += AREG((Opcode >> 0) & 7); |
9238 | PRE_IO |
9239 | READ_LONG_F(adr, res) |
9240 | flag_C = 0; |
9241 | flag_V = 0; |
9242 | flag_NotZ = res; |
9243 | flag_N = res >> 24; |
9244 | FETCH_LONG(adr); |
9245 | WRITE_LONG_F(adr, res) |
9246 | POST_IO |
9247 | RET(32) |
9248 | } |
9249 | |
9250 | // MOVEL |
9251 | OPCODE(0x2EE8) |
9252 | { |
9253 | u32 adr, res; |
9254 | u32 src, dst; |
9255 | |
9256 | FETCH_SWORD(adr); |
9257 | adr += AREG((Opcode >> 0) & 7); |
9258 | PRE_IO |
9259 | READ_LONG_F(adr, res) |
9260 | flag_C = 0; |
9261 | flag_V = 0; |
9262 | flag_NotZ = res; |
9263 | flag_N = res >> 24; |
9264 | adr = AREG(7); |
9265 | AREG(7) += 4; |
9266 | WRITE_LONG_F(adr, res) |
9267 | POST_IO |
9268 | RET(24) |
9269 | } |
9270 | |
9271 | // MOVEL |
9272 | OPCODE(0x2F28) |
9273 | { |
9274 | u32 adr, res; |
9275 | u32 src, dst; |
9276 | |
9277 | FETCH_SWORD(adr); |
9278 | adr += AREG((Opcode >> 0) & 7); |
9279 | PRE_IO |
9280 | READ_LONG_F(adr, res) |
9281 | flag_C = 0; |
9282 | flag_V = 0; |
9283 | flag_NotZ = res; |
9284 | flag_N = res >> 24; |
9285 | adr = AREG(7) - 4; |
9286 | AREG(7) = adr; |
03e4f2a3 |
9287 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9288 | POST_IO |
9289 | RET(24) |
9290 | } |
9291 | |
9292 | // MOVEL |
9293 | OPCODE(0x2030) |
9294 | { |
9295 | u32 adr, res; |
9296 | u32 src, dst; |
9297 | |
9298 | adr = AREG((Opcode >> 0) & 7); |
9299 | DECODE_EXT_WORD |
9300 | PRE_IO |
9301 | READ_LONG_F(adr, res) |
9302 | flag_C = 0; |
9303 | flag_V = 0; |
9304 | flag_NotZ = res; |
9305 | flag_N = res >> 24; |
9306 | DREGu32((Opcode >> 9) & 7) = res; |
9307 | POST_IO |
9308 | RET(18) |
9309 | } |
9310 | |
9311 | // MOVEL |
9312 | OPCODE(0x20B0) |
9313 | { |
9314 | u32 adr, res; |
9315 | u32 src, dst; |
9316 | |
9317 | adr = AREG((Opcode >> 0) & 7); |
9318 | DECODE_EXT_WORD |
9319 | PRE_IO |
9320 | READ_LONG_F(adr, res) |
9321 | flag_C = 0; |
9322 | flag_V = 0; |
9323 | flag_NotZ = res; |
9324 | flag_N = res >> 24; |
9325 | adr = AREG((Opcode >> 9) & 7); |
9326 | WRITE_LONG_F(adr, res) |
9327 | POST_IO |
9328 | RET(26) |
9329 | } |
9330 | |
9331 | // MOVEL |
9332 | OPCODE(0x20F0) |
9333 | { |
9334 | u32 adr, res; |
9335 | u32 src, dst; |
9336 | |
9337 | adr = AREG((Opcode >> 0) & 7); |
9338 | DECODE_EXT_WORD |
9339 | PRE_IO |
9340 | READ_LONG_F(adr, res) |
9341 | flag_C = 0; |
9342 | flag_V = 0; |
9343 | flag_NotZ = res; |
9344 | flag_N = res >> 24; |
9345 | adr = AREG((Opcode >> 9) & 7); |
9346 | AREG((Opcode >> 9) & 7) += 4; |
9347 | WRITE_LONG_F(adr, res) |
9348 | POST_IO |
9349 | RET(26) |
9350 | } |
9351 | |
9352 | // MOVEL |
9353 | OPCODE(0x2130) |
9354 | { |
9355 | u32 adr, res; |
9356 | u32 src, dst; |
9357 | |
9358 | adr = AREG((Opcode >> 0) & 7); |
9359 | DECODE_EXT_WORD |
9360 | PRE_IO |
9361 | READ_LONG_F(adr, res) |
9362 | flag_C = 0; |
9363 | flag_V = 0; |
9364 | flag_NotZ = res; |
9365 | flag_N = res >> 24; |
9366 | adr = AREG((Opcode >> 9) & 7) - 4; |
9367 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9368 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9369 | POST_IO |
9370 | RET(26) |
9371 | } |
9372 | |
9373 | // MOVEL |
9374 | OPCODE(0x2170) |
9375 | { |
9376 | u32 adr, res; |
9377 | u32 src, dst; |
9378 | |
9379 | adr = AREG((Opcode >> 0) & 7); |
9380 | DECODE_EXT_WORD |
9381 | PRE_IO |
9382 | READ_LONG_F(adr, res) |
9383 | flag_C = 0; |
9384 | flag_V = 0; |
9385 | flag_NotZ = res; |
9386 | flag_N = res >> 24; |
9387 | FETCH_SWORD(adr); |
9388 | adr += AREG((Opcode >> 9) & 7); |
9389 | WRITE_LONG_F(adr, res) |
9390 | POST_IO |
9391 | RET(30) |
9392 | } |
9393 | |
9394 | // MOVEL |
9395 | OPCODE(0x21B0) |
9396 | { |
9397 | u32 adr, res; |
9398 | u32 src, dst; |
9399 | |
9400 | adr = AREG((Opcode >> 0) & 7); |
9401 | DECODE_EXT_WORD |
9402 | PRE_IO |
9403 | READ_LONG_F(adr, res) |
9404 | flag_C = 0; |
9405 | flag_V = 0; |
9406 | flag_NotZ = res; |
9407 | flag_N = res >> 24; |
9408 | adr = AREG((Opcode >> 9) & 7); |
9409 | DECODE_EXT_WORD |
9410 | WRITE_LONG_F(adr, res) |
9411 | POST_IO |
9412 | RET(32) |
9413 | } |
9414 | |
9415 | // MOVEL |
9416 | OPCODE(0x21F0) |
9417 | { |
9418 | u32 adr, res; |
9419 | u32 src, dst; |
9420 | |
9421 | adr = AREG((Opcode >> 0) & 7); |
9422 | DECODE_EXT_WORD |
9423 | PRE_IO |
9424 | READ_LONG_F(adr, res) |
9425 | flag_C = 0; |
9426 | flag_V = 0; |
9427 | flag_NotZ = res; |
9428 | flag_N = res >> 24; |
9429 | FETCH_SWORD(adr); |
9430 | WRITE_LONG_F(adr, res) |
9431 | POST_IO |
9432 | RET(30) |
9433 | } |
9434 | |
9435 | // MOVEL |
9436 | OPCODE(0x23F0) |
9437 | { |
9438 | u32 adr, res; |
9439 | u32 src, dst; |
9440 | |
9441 | adr = AREG((Opcode >> 0) & 7); |
9442 | DECODE_EXT_WORD |
9443 | PRE_IO |
9444 | READ_LONG_F(adr, res) |
9445 | flag_C = 0; |
9446 | flag_V = 0; |
9447 | flag_NotZ = res; |
9448 | flag_N = res >> 24; |
9449 | FETCH_LONG(adr); |
9450 | WRITE_LONG_F(adr, res) |
9451 | POST_IO |
9452 | RET(34) |
9453 | } |
9454 | |
9455 | // MOVEL |
9456 | OPCODE(0x2EF0) |
9457 | { |
9458 | u32 adr, res; |
9459 | u32 src, dst; |
9460 | |
9461 | adr = AREG((Opcode >> 0) & 7); |
9462 | DECODE_EXT_WORD |
9463 | PRE_IO |
9464 | READ_LONG_F(adr, res) |
9465 | flag_C = 0; |
9466 | flag_V = 0; |
9467 | flag_NotZ = res; |
9468 | flag_N = res >> 24; |
9469 | adr = AREG(7); |
9470 | AREG(7) += 4; |
9471 | WRITE_LONG_F(adr, res) |
9472 | POST_IO |
9473 | RET(26) |
9474 | } |
9475 | |
9476 | // MOVEL |
9477 | OPCODE(0x2F30) |
9478 | { |
9479 | u32 adr, res; |
9480 | u32 src, dst; |
9481 | |
9482 | adr = AREG((Opcode >> 0) & 7); |
9483 | DECODE_EXT_WORD |
9484 | PRE_IO |
9485 | READ_LONG_F(adr, res) |
9486 | flag_C = 0; |
9487 | flag_V = 0; |
9488 | flag_NotZ = res; |
9489 | flag_N = res >> 24; |
9490 | adr = AREG(7) - 4; |
9491 | AREG(7) = adr; |
03e4f2a3 |
9492 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9493 | POST_IO |
9494 | RET(26) |
9495 | } |
9496 | |
9497 | // MOVEL |
9498 | OPCODE(0x2038) |
9499 | { |
9500 | u32 adr, res; |
9501 | u32 src, dst; |
9502 | |
9503 | FETCH_SWORD(adr); |
9504 | PRE_IO |
9505 | READ_LONG_F(adr, res) |
9506 | flag_C = 0; |
9507 | flag_V = 0; |
9508 | flag_NotZ = res; |
9509 | flag_N = res >> 24; |
9510 | DREGu32((Opcode >> 9) & 7) = res; |
9511 | POST_IO |
9512 | RET(16) |
9513 | } |
9514 | |
9515 | // MOVEL |
9516 | OPCODE(0x20B8) |
9517 | { |
9518 | u32 adr, res; |
9519 | u32 src, dst; |
9520 | |
9521 | FETCH_SWORD(adr); |
9522 | PRE_IO |
9523 | READ_LONG_F(adr, res) |
9524 | flag_C = 0; |
9525 | flag_V = 0; |
9526 | flag_NotZ = res; |
9527 | flag_N = res >> 24; |
9528 | adr = AREG((Opcode >> 9) & 7); |
9529 | WRITE_LONG_F(adr, res) |
9530 | POST_IO |
9531 | RET(24) |
9532 | } |
9533 | |
9534 | // MOVEL |
9535 | OPCODE(0x20F8) |
9536 | { |
9537 | u32 adr, res; |
9538 | u32 src, dst; |
9539 | |
9540 | FETCH_SWORD(adr); |
9541 | PRE_IO |
9542 | READ_LONG_F(adr, res) |
9543 | flag_C = 0; |
9544 | flag_V = 0; |
9545 | flag_NotZ = res; |
9546 | flag_N = res >> 24; |
9547 | adr = AREG((Opcode >> 9) & 7); |
9548 | AREG((Opcode >> 9) & 7) += 4; |
9549 | WRITE_LONG_F(adr, res) |
9550 | POST_IO |
9551 | RET(24) |
9552 | } |
9553 | |
9554 | // MOVEL |
9555 | OPCODE(0x2138) |
9556 | { |
9557 | u32 adr, res; |
9558 | u32 src, dst; |
9559 | |
9560 | FETCH_SWORD(adr); |
9561 | PRE_IO |
9562 | READ_LONG_F(adr, res) |
9563 | flag_C = 0; |
9564 | flag_V = 0; |
9565 | flag_NotZ = res; |
9566 | flag_N = res >> 24; |
9567 | adr = AREG((Opcode >> 9) & 7) - 4; |
9568 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9569 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9570 | POST_IO |
9571 | RET(24) |
9572 | } |
9573 | |
9574 | // MOVEL |
9575 | OPCODE(0x2178) |
9576 | { |
9577 | u32 adr, res; |
9578 | u32 src, dst; |
9579 | |
9580 | FETCH_SWORD(adr); |
9581 | PRE_IO |
9582 | READ_LONG_F(adr, res) |
9583 | flag_C = 0; |
9584 | flag_V = 0; |
9585 | flag_NotZ = res; |
9586 | flag_N = res >> 24; |
9587 | FETCH_SWORD(adr); |
9588 | adr += AREG((Opcode >> 9) & 7); |
9589 | WRITE_LONG_F(adr, res) |
9590 | POST_IO |
9591 | RET(28) |
9592 | } |
9593 | |
9594 | // MOVEL |
9595 | OPCODE(0x21B8) |
9596 | { |
9597 | u32 adr, res; |
9598 | u32 src, dst; |
9599 | |
9600 | FETCH_SWORD(adr); |
9601 | PRE_IO |
9602 | READ_LONG_F(adr, res) |
9603 | flag_C = 0; |
9604 | flag_V = 0; |
9605 | flag_NotZ = res; |
9606 | flag_N = res >> 24; |
9607 | adr = AREG((Opcode >> 9) & 7); |
9608 | DECODE_EXT_WORD |
9609 | WRITE_LONG_F(adr, res) |
9610 | POST_IO |
9611 | RET(30) |
9612 | } |
9613 | |
9614 | // MOVEL |
9615 | OPCODE(0x21F8) |
9616 | { |
9617 | u32 adr, res; |
9618 | u32 src, dst; |
9619 | |
9620 | FETCH_SWORD(adr); |
9621 | PRE_IO |
9622 | READ_LONG_F(adr, res) |
9623 | flag_C = 0; |
9624 | flag_V = 0; |
9625 | flag_NotZ = res; |
9626 | flag_N = res >> 24; |
9627 | FETCH_SWORD(adr); |
9628 | WRITE_LONG_F(adr, res) |
9629 | POST_IO |
9630 | RET(28) |
9631 | } |
9632 | |
9633 | // MOVEL |
9634 | OPCODE(0x23F8) |
9635 | { |
9636 | u32 adr, res; |
9637 | u32 src, dst; |
9638 | |
9639 | FETCH_SWORD(adr); |
9640 | PRE_IO |
9641 | READ_LONG_F(adr, res) |
9642 | flag_C = 0; |
9643 | flag_V = 0; |
9644 | flag_NotZ = res; |
9645 | flag_N = res >> 24; |
9646 | FETCH_LONG(adr); |
9647 | WRITE_LONG_F(adr, res) |
9648 | POST_IO |
9649 | RET(32) |
9650 | } |
9651 | |
9652 | // MOVEL |
9653 | OPCODE(0x2EF8) |
9654 | { |
9655 | u32 adr, res; |
9656 | u32 src, dst; |
9657 | |
9658 | FETCH_SWORD(adr); |
9659 | PRE_IO |
9660 | READ_LONG_F(adr, res) |
9661 | flag_C = 0; |
9662 | flag_V = 0; |
9663 | flag_NotZ = res; |
9664 | flag_N = res >> 24; |
9665 | adr = AREG(7); |
9666 | AREG(7) += 4; |
9667 | WRITE_LONG_F(adr, res) |
9668 | POST_IO |
9669 | RET(24) |
9670 | } |
9671 | |
9672 | // MOVEL |
9673 | OPCODE(0x2F38) |
9674 | { |
9675 | u32 adr, res; |
9676 | u32 src, dst; |
9677 | |
9678 | FETCH_SWORD(adr); |
9679 | PRE_IO |
9680 | READ_LONG_F(adr, res) |
9681 | flag_C = 0; |
9682 | flag_V = 0; |
9683 | flag_NotZ = res; |
9684 | flag_N = res >> 24; |
9685 | adr = AREG(7) - 4; |
9686 | AREG(7) = adr; |
03e4f2a3 |
9687 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9688 | POST_IO |
9689 | RET(24) |
9690 | } |
9691 | |
9692 | // MOVEL |
9693 | OPCODE(0x2039) |
9694 | { |
9695 | u32 adr, res; |
9696 | u32 src, dst; |
9697 | |
9698 | FETCH_LONG(adr); |
9699 | PRE_IO |
9700 | READ_LONG_F(adr, res) |
9701 | flag_C = 0; |
9702 | flag_V = 0; |
9703 | flag_NotZ = res; |
9704 | flag_N = res >> 24; |
9705 | DREGu32((Opcode >> 9) & 7) = res; |
9706 | POST_IO |
9707 | RET(20) |
9708 | } |
9709 | |
9710 | // MOVEL |
9711 | OPCODE(0x20B9) |
9712 | { |
9713 | u32 adr, res; |
9714 | u32 src, dst; |
9715 | |
9716 | FETCH_LONG(adr); |
9717 | PRE_IO |
9718 | READ_LONG_F(adr, res) |
9719 | flag_C = 0; |
9720 | flag_V = 0; |
9721 | flag_NotZ = res; |
9722 | flag_N = res >> 24; |
9723 | adr = AREG((Opcode >> 9) & 7); |
9724 | WRITE_LONG_F(adr, res) |
9725 | POST_IO |
9726 | RET(28) |
9727 | } |
9728 | |
9729 | // MOVEL |
9730 | OPCODE(0x20F9) |
9731 | { |
9732 | u32 adr, res; |
9733 | u32 src, dst; |
9734 | |
9735 | FETCH_LONG(adr); |
9736 | PRE_IO |
9737 | READ_LONG_F(adr, res) |
9738 | flag_C = 0; |
9739 | flag_V = 0; |
9740 | flag_NotZ = res; |
9741 | flag_N = res >> 24; |
9742 | adr = AREG((Opcode >> 9) & 7); |
9743 | AREG((Opcode >> 9) & 7) += 4; |
9744 | WRITE_LONG_F(adr, res) |
9745 | POST_IO |
9746 | RET(28) |
9747 | } |
9748 | |
9749 | // MOVEL |
9750 | OPCODE(0x2139) |
9751 | { |
9752 | u32 adr, res; |
9753 | u32 src, dst; |
9754 | |
9755 | FETCH_LONG(adr); |
9756 | PRE_IO |
9757 | READ_LONG_F(adr, res) |
9758 | flag_C = 0; |
9759 | flag_V = 0; |
9760 | flag_NotZ = res; |
9761 | flag_N = res >> 24; |
9762 | adr = AREG((Opcode >> 9) & 7) - 4; |
9763 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9764 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9765 | POST_IO |
9766 | RET(28) |
9767 | } |
9768 | |
9769 | // MOVEL |
9770 | OPCODE(0x2179) |
9771 | { |
9772 | u32 adr, res; |
9773 | u32 src, dst; |
9774 | |
9775 | FETCH_LONG(adr); |
9776 | PRE_IO |
9777 | READ_LONG_F(adr, res) |
9778 | flag_C = 0; |
9779 | flag_V = 0; |
9780 | flag_NotZ = res; |
9781 | flag_N = res >> 24; |
9782 | FETCH_SWORD(adr); |
9783 | adr += AREG((Opcode >> 9) & 7); |
9784 | WRITE_LONG_F(adr, res) |
9785 | POST_IO |
9786 | RET(32) |
9787 | } |
9788 | |
9789 | // MOVEL |
9790 | OPCODE(0x21B9) |
9791 | { |
9792 | u32 adr, res; |
9793 | u32 src, dst; |
9794 | |
9795 | FETCH_LONG(adr); |
9796 | PRE_IO |
9797 | READ_LONG_F(adr, res) |
9798 | flag_C = 0; |
9799 | flag_V = 0; |
9800 | flag_NotZ = res; |
9801 | flag_N = res >> 24; |
9802 | adr = AREG((Opcode >> 9) & 7); |
9803 | DECODE_EXT_WORD |
9804 | WRITE_LONG_F(adr, res) |
9805 | POST_IO |
9806 | RET(34) |
9807 | } |
9808 | |
9809 | // MOVEL |
9810 | OPCODE(0x21F9) |
9811 | { |
9812 | u32 adr, res; |
9813 | u32 src, dst; |
9814 | |
9815 | FETCH_LONG(adr); |
9816 | PRE_IO |
9817 | READ_LONG_F(adr, res) |
9818 | flag_C = 0; |
9819 | flag_V = 0; |
9820 | flag_NotZ = res; |
9821 | flag_N = res >> 24; |
9822 | FETCH_SWORD(adr); |
9823 | WRITE_LONG_F(adr, res) |
9824 | POST_IO |
9825 | RET(32) |
9826 | } |
9827 | |
9828 | // MOVEL |
9829 | OPCODE(0x23F9) |
9830 | { |
9831 | u32 adr, res; |
9832 | u32 src, dst; |
9833 | |
9834 | FETCH_LONG(adr); |
9835 | PRE_IO |
9836 | READ_LONG_F(adr, res) |
9837 | flag_C = 0; |
9838 | flag_V = 0; |
9839 | flag_NotZ = res; |
9840 | flag_N = res >> 24; |
9841 | FETCH_LONG(adr); |
9842 | WRITE_LONG_F(adr, res) |
9843 | POST_IO |
9844 | RET(36) |
9845 | } |
9846 | |
9847 | // MOVEL |
9848 | OPCODE(0x2EF9) |
9849 | { |
9850 | u32 adr, res; |
9851 | u32 src, dst; |
9852 | |
9853 | FETCH_LONG(adr); |
9854 | PRE_IO |
9855 | READ_LONG_F(adr, res) |
9856 | flag_C = 0; |
9857 | flag_V = 0; |
9858 | flag_NotZ = res; |
9859 | flag_N = res >> 24; |
9860 | adr = AREG(7); |
9861 | AREG(7) += 4; |
9862 | WRITE_LONG_F(adr, res) |
9863 | POST_IO |
9864 | RET(28) |
9865 | } |
9866 | |
9867 | // MOVEL |
9868 | OPCODE(0x2F39) |
9869 | { |
9870 | u32 adr, res; |
9871 | u32 src, dst; |
9872 | |
9873 | FETCH_LONG(adr); |
9874 | PRE_IO |
9875 | READ_LONG_F(adr, res) |
9876 | flag_C = 0; |
9877 | flag_V = 0; |
9878 | flag_NotZ = res; |
9879 | flag_N = res >> 24; |
9880 | adr = AREG(7) - 4; |
9881 | AREG(7) = adr; |
03e4f2a3 |
9882 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9883 | POST_IO |
9884 | RET(28) |
9885 | } |
9886 | |
9887 | // MOVEL |
9888 | OPCODE(0x203A) |
9889 | { |
9890 | u32 adr, res; |
9891 | u32 src, dst; |
9892 | |
9893 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9894 | PC++; |
9895 | PRE_IO |
9896 | READ_LONG_F(adr, res) |
9897 | flag_C = 0; |
9898 | flag_V = 0; |
9899 | flag_NotZ = res; |
9900 | flag_N = res >> 24; |
9901 | DREGu32((Opcode >> 9) & 7) = res; |
9902 | POST_IO |
9903 | RET(16) |
9904 | } |
9905 | |
9906 | // MOVEL |
9907 | OPCODE(0x20BA) |
9908 | { |
9909 | u32 adr, res; |
9910 | u32 src, dst; |
9911 | |
9912 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9913 | PC++; |
9914 | PRE_IO |
9915 | READ_LONG_F(adr, res) |
9916 | flag_C = 0; |
9917 | flag_V = 0; |
9918 | flag_NotZ = res; |
9919 | flag_N = res >> 24; |
9920 | adr = AREG((Opcode >> 9) & 7); |
9921 | WRITE_LONG_F(adr, res) |
9922 | POST_IO |
9923 | RET(24) |
9924 | } |
9925 | |
9926 | // MOVEL |
9927 | OPCODE(0x20FA) |
9928 | { |
9929 | u32 adr, res; |
9930 | u32 src, dst; |
9931 | |
9932 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9933 | PC++; |
9934 | PRE_IO |
9935 | READ_LONG_F(adr, res) |
9936 | flag_C = 0; |
9937 | flag_V = 0; |
9938 | flag_NotZ = res; |
9939 | flag_N = res >> 24; |
9940 | adr = AREG((Opcode >> 9) & 7); |
9941 | AREG((Opcode >> 9) & 7) += 4; |
9942 | WRITE_LONG_F(adr, res) |
9943 | POST_IO |
9944 | RET(24) |
9945 | } |
9946 | |
9947 | // MOVEL |
9948 | OPCODE(0x213A) |
9949 | { |
9950 | u32 adr, res; |
9951 | u32 src, dst; |
9952 | |
9953 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9954 | PC++; |
9955 | PRE_IO |
9956 | READ_LONG_F(adr, res) |
9957 | flag_C = 0; |
9958 | flag_V = 0; |
9959 | flag_NotZ = res; |
9960 | flag_N = res >> 24; |
9961 | adr = AREG((Opcode >> 9) & 7) - 4; |
9962 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9963 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9964 | POST_IO |
9965 | RET(24) |
9966 | } |
9967 | |
9968 | // MOVEL |
9969 | OPCODE(0x217A) |
9970 | { |
9971 | u32 adr, res; |
9972 | u32 src, dst; |
9973 | |
9974 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9975 | PC++; |
9976 | PRE_IO |
9977 | READ_LONG_F(adr, res) |
9978 | flag_C = 0; |
9979 | flag_V = 0; |
9980 | flag_NotZ = res; |
9981 | flag_N = res >> 24; |
9982 | FETCH_SWORD(adr); |
9983 | adr += AREG((Opcode >> 9) & 7); |
9984 | WRITE_LONG_F(adr, res) |
9985 | POST_IO |
9986 | RET(28) |
9987 | } |
9988 | |
9989 | // MOVEL |
9990 | OPCODE(0x21BA) |
9991 | { |
9992 | u32 adr, res; |
9993 | u32 src, dst; |
9994 | |
9995 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9996 | PC++; |
9997 | PRE_IO |
9998 | READ_LONG_F(adr, res) |
9999 | flag_C = 0; |
10000 | flag_V = 0; |
10001 | flag_NotZ = res; |
10002 | flag_N = res >> 24; |
10003 | adr = AREG((Opcode >> 9) & 7); |
10004 | DECODE_EXT_WORD |
10005 | WRITE_LONG_F(adr, res) |
10006 | POST_IO |
10007 | RET(30) |
10008 | } |
10009 | |
10010 | // MOVEL |
10011 | OPCODE(0x21FA) |
10012 | { |
10013 | u32 adr, res; |
10014 | u32 src, dst; |
10015 | |
10016 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10017 | PC++; |
10018 | PRE_IO |
10019 | READ_LONG_F(adr, res) |
10020 | flag_C = 0; |
10021 | flag_V = 0; |
10022 | flag_NotZ = res; |
10023 | flag_N = res >> 24; |
10024 | FETCH_SWORD(adr); |
10025 | WRITE_LONG_F(adr, res) |
10026 | POST_IO |
10027 | RET(28) |
10028 | } |
10029 | |
10030 | // MOVEL |
10031 | OPCODE(0x23FA) |
10032 | { |
10033 | u32 adr, res; |
10034 | u32 src, dst; |
10035 | |
10036 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10037 | PC++; |
10038 | PRE_IO |
10039 | READ_LONG_F(adr, res) |
10040 | flag_C = 0; |
10041 | flag_V = 0; |
10042 | flag_NotZ = res; |
10043 | flag_N = res >> 24; |
10044 | FETCH_LONG(adr); |
10045 | WRITE_LONG_F(adr, res) |
10046 | POST_IO |
10047 | RET(32) |
10048 | } |
10049 | |
10050 | // MOVEL |
10051 | OPCODE(0x2EFA) |
10052 | { |
10053 | u32 adr, res; |
10054 | u32 src, dst; |
10055 | |
10056 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10057 | PC++; |
10058 | PRE_IO |
10059 | READ_LONG_F(adr, res) |
10060 | flag_C = 0; |
10061 | flag_V = 0; |
10062 | flag_NotZ = res; |
10063 | flag_N = res >> 24; |
10064 | adr = AREG(7); |
10065 | AREG(7) += 4; |
10066 | WRITE_LONG_F(adr, res) |
10067 | POST_IO |
10068 | RET(24) |
10069 | } |
10070 | |
10071 | // MOVEL |
10072 | OPCODE(0x2F3A) |
10073 | { |
10074 | u32 adr, res; |
10075 | u32 src, dst; |
10076 | |
10077 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10078 | PC++; |
10079 | PRE_IO |
10080 | READ_LONG_F(adr, res) |
10081 | flag_C = 0; |
10082 | flag_V = 0; |
10083 | flag_NotZ = res; |
10084 | flag_N = res >> 24; |
10085 | adr = AREG(7) - 4; |
10086 | AREG(7) = adr; |
03e4f2a3 |
10087 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10088 | POST_IO |
10089 | RET(24) |
10090 | } |
10091 | |
10092 | // MOVEL |
10093 | OPCODE(0x203B) |
10094 | { |
10095 | u32 adr, res; |
10096 | u32 src, dst; |
10097 | |
10098 | adr = (u32)(PC) - BasePC; |
10099 | DECODE_EXT_WORD |
10100 | PRE_IO |
10101 | READ_LONG_F(adr, res) |
10102 | flag_C = 0; |
10103 | flag_V = 0; |
10104 | flag_NotZ = res; |
10105 | flag_N = res >> 24; |
10106 | DREGu32((Opcode >> 9) & 7) = res; |
10107 | POST_IO |
10108 | RET(18) |
10109 | } |
10110 | |
10111 | // MOVEL |
10112 | OPCODE(0x20BB) |
10113 | { |
10114 | u32 adr, res; |
10115 | u32 src, dst; |
10116 | |
10117 | adr = (u32)(PC) - BasePC; |
10118 | DECODE_EXT_WORD |
10119 | PRE_IO |
10120 | READ_LONG_F(adr, res) |
10121 | flag_C = 0; |
10122 | flag_V = 0; |
10123 | flag_NotZ = res; |
10124 | flag_N = res >> 24; |
10125 | adr = AREG((Opcode >> 9) & 7); |
10126 | WRITE_LONG_F(adr, res) |
10127 | POST_IO |
10128 | RET(26) |
10129 | } |
10130 | |
10131 | // MOVEL |
10132 | OPCODE(0x20FB) |
10133 | { |
10134 | u32 adr, res; |
10135 | u32 src, dst; |
10136 | |
10137 | adr = (u32)(PC) - BasePC; |
10138 | DECODE_EXT_WORD |
10139 | PRE_IO |
10140 | READ_LONG_F(adr, res) |
10141 | flag_C = 0; |
10142 | flag_V = 0; |
10143 | flag_NotZ = res; |
10144 | flag_N = res >> 24; |
10145 | adr = AREG((Opcode >> 9) & 7); |
10146 | AREG((Opcode >> 9) & 7) += 4; |
10147 | WRITE_LONG_F(adr, res) |
10148 | POST_IO |
10149 | RET(26) |
10150 | } |
10151 | |
10152 | // MOVEL |
10153 | OPCODE(0x213B) |
10154 | { |
10155 | u32 adr, res; |
10156 | u32 src, dst; |
10157 | |
10158 | adr = (u32)(PC) - BasePC; |
10159 | DECODE_EXT_WORD |
10160 | PRE_IO |
10161 | READ_LONG_F(adr, res) |
10162 | flag_C = 0; |
10163 | flag_V = 0; |
10164 | flag_NotZ = res; |
10165 | flag_N = res >> 24; |
10166 | adr = AREG((Opcode >> 9) & 7) - 4; |
10167 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10168 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10169 | POST_IO |
10170 | RET(26) |
10171 | } |
10172 | |
10173 | // MOVEL |
10174 | OPCODE(0x217B) |
10175 | { |
10176 | u32 adr, res; |
10177 | u32 src, dst; |
10178 | |
10179 | adr = (u32)(PC) - BasePC; |
10180 | DECODE_EXT_WORD |
10181 | PRE_IO |
10182 | READ_LONG_F(adr, res) |
10183 | flag_C = 0; |
10184 | flag_V = 0; |
10185 | flag_NotZ = res; |
10186 | flag_N = res >> 24; |
10187 | FETCH_SWORD(adr); |
10188 | adr += AREG((Opcode >> 9) & 7); |
10189 | WRITE_LONG_F(adr, res) |
10190 | POST_IO |
10191 | RET(30) |
10192 | } |
10193 | |
10194 | // MOVEL |
10195 | OPCODE(0x21BB) |
10196 | { |
10197 | u32 adr, res; |
10198 | u32 src, dst; |
10199 | |
10200 | adr = (u32)(PC) - BasePC; |
10201 | DECODE_EXT_WORD |
10202 | PRE_IO |
10203 | READ_LONG_F(adr, res) |
10204 | flag_C = 0; |
10205 | flag_V = 0; |
10206 | flag_NotZ = res; |
10207 | flag_N = res >> 24; |
10208 | adr = AREG((Opcode >> 9) & 7); |
10209 | DECODE_EXT_WORD |
10210 | WRITE_LONG_F(adr, res) |
10211 | POST_IO |
10212 | RET(32) |
10213 | } |
10214 | |
10215 | // MOVEL |
10216 | OPCODE(0x21FB) |
10217 | { |
10218 | u32 adr, res; |
10219 | u32 src, dst; |
10220 | |
10221 | adr = (u32)(PC) - BasePC; |
10222 | DECODE_EXT_WORD |
10223 | PRE_IO |
10224 | READ_LONG_F(adr, res) |
10225 | flag_C = 0; |
10226 | flag_V = 0; |
10227 | flag_NotZ = res; |
10228 | flag_N = res >> 24; |
10229 | FETCH_SWORD(adr); |
10230 | WRITE_LONG_F(adr, res) |
10231 | POST_IO |
10232 | RET(30) |
10233 | } |
10234 | |
10235 | // MOVEL |
10236 | OPCODE(0x23FB) |
10237 | { |
10238 | u32 adr, res; |
10239 | u32 src, dst; |
10240 | |
10241 | adr = (u32)(PC) - BasePC; |
10242 | DECODE_EXT_WORD |
10243 | PRE_IO |
10244 | READ_LONG_F(adr, res) |
10245 | flag_C = 0; |
10246 | flag_V = 0; |
10247 | flag_NotZ = res; |
10248 | flag_N = res >> 24; |
10249 | FETCH_LONG(adr); |
10250 | WRITE_LONG_F(adr, res) |
10251 | POST_IO |
10252 | RET(34) |
10253 | } |
10254 | |
10255 | // MOVEL |
10256 | OPCODE(0x2EFB) |
10257 | { |
10258 | u32 adr, res; |
10259 | u32 src, dst; |
10260 | |
10261 | adr = (u32)(PC) - BasePC; |
10262 | DECODE_EXT_WORD |
10263 | PRE_IO |
10264 | READ_LONG_F(adr, res) |
10265 | flag_C = 0; |
10266 | flag_V = 0; |
10267 | flag_NotZ = res; |
10268 | flag_N = res >> 24; |
10269 | adr = AREG(7); |
10270 | AREG(7) += 4; |
10271 | WRITE_LONG_F(adr, res) |
10272 | POST_IO |
10273 | RET(26) |
10274 | } |
10275 | |
10276 | // MOVEL |
10277 | OPCODE(0x2F3B) |
10278 | { |
10279 | u32 adr, res; |
10280 | u32 src, dst; |
10281 | |
10282 | adr = (u32)(PC) - BasePC; |
10283 | DECODE_EXT_WORD |
10284 | PRE_IO |
10285 | READ_LONG_F(adr, res) |
10286 | flag_C = 0; |
10287 | flag_V = 0; |
10288 | flag_NotZ = res; |
10289 | flag_N = res >> 24; |
10290 | adr = AREG(7) - 4; |
10291 | AREG(7) = adr; |
03e4f2a3 |
10292 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10293 | POST_IO |
10294 | RET(26) |
10295 | } |
10296 | |
10297 | // MOVEL |
10298 | OPCODE(0x203C) |
10299 | { |
10300 | u32 adr, res; |
10301 | u32 src, dst; |
10302 | |
10303 | FETCH_LONG(res); |
10304 | flag_C = 0; |
10305 | flag_V = 0; |
10306 | flag_NotZ = res; |
10307 | flag_N = res >> 24; |
10308 | DREGu32((Opcode >> 9) & 7) = res; |
10309 | RET(12) |
10310 | } |
10311 | |
10312 | // MOVEL |
10313 | OPCODE(0x20BC) |
10314 | { |
10315 | u32 adr, res; |
10316 | u32 src, dst; |
10317 | |
10318 | FETCH_LONG(res); |
10319 | flag_C = 0; |
10320 | flag_V = 0; |
10321 | flag_NotZ = res; |
10322 | flag_N = res >> 24; |
10323 | adr = AREG((Opcode >> 9) & 7); |
10324 | PRE_IO |
10325 | WRITE_LONG_F(adr, res) |
10326 | POST_IO |
10327 | RET(20) |
10328 | } |
10329 | |
10330 | // MOVEL |
10331 | OPCODE(0x20FC) |
10332 | { |
10333 | u32 adr, res; |
10334 | u32 src, dst; |
10335 | |
10336 | FETCH_LONG(res); |
10337 | flag_C = 0; |
10338 | flag_V = 0; |
10339 | flag_NotZ = res; |
10340 | flag_N = res >> 24; |
10341 | adr = AREG((Opcode >> 9) & 7); |
10342 | AREG((Opcode >> 9) & 7) += 4; |
10343 | PRE_IO |
10344 | WRITE_LONG_F(adr, res) |
10345 | POST_IO |
10346 | RET(20) |
10347 | } |
10348 | |
10349 | // MOVEL |
10350 | OPCODE(0x213C) |
10351 | { |
10352 | u32 adr, res; |
10353 | u32 src, dst; |
10354 | |
10355 | FETCH_LONG(res); |
10356 | flag_C = 0; |
10357 | flag_V = 0; |
10358 | flag_NotZ = res; |
10359 | flag_N = res >> 24; |
10360 | adr = AREG((Opcode >> 9) & 7) - 4; |
10361 | AREG((Opcode >> 9) & 7) = adr; |
10362 | PRE_IO |
80db4442 |
10363 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10364 | POST_IO |
10365 | RET(20) |
10366 | } |
10367 | |
10368 | // MOVEL |
10369 | OPCODE(0x217C) |
10370 | { |
10371 | u32 adr, res; |
10372 | u32 src, dst; |
10373 | |
10374 | FETCH_LONG(res); |
10375 | flag_C = 0; |
10376 | flag_V = 0; |
10377 | flag_NotZ = res; |
10378 | flag_N = res >> 24; |
10379 | FETCH_SWORD(adr); |
10380 | adr += AREG((Opcode >> 9) & 7); |
10381 | PRE_IO |
10382 | WRITE_LONG_F(adr, res) |
10383 | POST_IO |
10384 | RET(24) |
10385 | } |
10386 | |
10387 | // MOVEL |
10388 | OPCODE(0x21BC) |
10389 | { |
10390 | u32 adr, res; |
10391 | u32 src, dst; |
10392 | |
10393 | FETCH_LONG(res); |
10394 | flag_C = 0; |
10395 | flag_V = 0; |
10396 | flag_NotZ = res; |
10397 | flag_N = res >> 24; |
10398 | adr = AREG((Opcode >> 9) & 7); |
10399 | DECODE_EXT_WORD |
10400 | PRE_IO |
10401 | WRITE_LONG_F(adr, res) |
10402 | POST_IO |
10403 | RET(26) |
10404 | } |
10405 | |
10406 | // MOVEL |
10407 | OPCODE(0x21FC) |
10408 | { |
10409 | u32 adr, res; |
10410 | u32 src, dst; |
10411 | |
10412 | FETCH_LONG(res); |
10413 | flag_C = 0; |
10414 | flag_V = 0; |
10415 | flag_NotZ = res; |
10416 | flag_N = res >> 24; |
10417 | FETCH_SWORD(adr); |
10418 | PRE_IO |
10419 | WRITE_LONG_F(adr, res) |
10420 | POST_IO |
10421 | RET(24) |
10422 | } |
10423 | |
10424 | // MOVEL |
10425 | OPCODE(0x23FC) |
10426 | { |
10427 | u32 adr, res; |
10428 | u32 src, dst; |
10429 | |
10430 | FETCH_LONG(res); |
10431 | flag_C = 0; |
10432 | flag_V = 0; |
10433 | flag_NotZ = res; |
10434 | flag_N = res >> 24; |
10435 | FETCH_LONG(adr); |
10436 | PRE_IO |
10437 | WRITE_LONG_F(adr, res) |
10438 | POST_IO |
10439 | RET(28) |
10440 | } |
10441 | |
10442 | // MOVEL |
10443 | OPCODE(0x2EFC) |
10444 | { |
10445 | u32 adr, res; |
10446 | u32 src, dst; |
10447 | |
10448 | FETCH_LONG(res); |
10449 | flag_C = 0; |
10450 | flag_V = 0; |
10451 | flag_NotZ = res; |
10452 | flag_N = res >> 24; |
10453 | adr = AREG(7); |
10454 | AREG(7) += 4; |
10455 | PRE_IO |
10456 | WRITE_LONG_F(adr, res) |
10457 | POST_IO |
10458 | RET(20) |
10459 | } |
10460 | |
10461 | // MOVEL |
10462 | OPCODE(0x2F3C) |
10463 | { |
10464 | u32 adr, res; |
10465 | u32 src, dst; |
10466 | |
10467 | FETCH_LONG(res); |
10468 | flag_C = 0; |
10469 | flag_V = 0; |
10470 | flag_NotZ = res; |
10471 | flag_N = res >> 24; |
10472 | adr = AREG(7) - 4; |
10473 | AREG(7) = adr; |
10474 | PRE_IO |
03e4f2a3 |
10475 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10476 | POST_IO |
10477 | RET(20) |
10478 | } |
10479 | |
10480 | // MOVEL |
10481 | OPCODE(0x201F) |
10482 | { |
10483 | u32 adr, res; |
10484 | u32 src, dst; |
10485 | |
10486 | adr = AREG(7); |
10487 | AREG(7) += 4; |
10488 | PRE_IO |
10489 | READ_LONG_F(adr, res) |
10490 | flag_C = 0; |
10491 | flag_V = 0; |
10492 | flag_NotZ = res; |
10493 | flag_N = res >> 24; |
10494 | DREGu32((Opcode >> 9) & 7) = res; |
10495 | POST_IO |
10496 | RET(12) |
10497 | } |
10498 | |
10499 | // MOVEL |
10500 | OPCODE(0x209F) |
10501 | { |
10502 | u32 adr, res; |
10503 | u32 src, dst; |
10504 | |
10505 | adr = AREG(7); |
10506 | AREG(7) += 4; |
10507 | PRE_IO |
10508 | READ_LONG_F(adr, res) |
10509 | flag_C = 0; |
10510 | flag_V = 0; |
10511 | flag_NotZ = res; |
10512 | flag_N = res >> 24; |
10513 | adr = AREG((Opcode >> 9) & 7); |
10514 | WRITE_LONG_F(adr, res) |
10515 | POST_IO |
10516 | RET(20) |
10517 | } |
10518 | |
10519 | // MOVEL |
10520 | OPCODE(0x20DF) |
10521 | { |
10522 | u32 adr, res; |
10523 | u32 src, dst; |
10524 | |
10525 | adr = AREG(7); |
10526 | AREG(7) += 4; |
10527 | PRE_IO |
10528 | READ_LONG_F(adr, res) |
10529 | flag_C = 0; |
10530 | flag_V = 0; |
10531 | flag_NotZ = res; |
10532 | flag_N = res >> 24; |
10533 | adr = AREG((Opcode >> 9) & 7); |
10534 | AREG((Opcode >> 9) & 7) += 4; |
10535 | WRITE_LONG_F(adr, res) |
10536 | POST_IO |
10537 | RET(20) |
10538 | } |
10539 | |
10540 | // MOVEL |
10541 | OPCODE(0x211F) |
10542 | { |
10543 | u32 adr, res; |
10544 | u32 src, dst; |
10545 | |
10546 | adr = AREG(7); |
10547 | AREG(7) += 4; |
10548 | PRE_IO |
10549 | READ_LONG_F(adr, res) |
10550 | flag_C = 0; |
10551 | flag_V = 0; |
10552 | flag_NotZ = res; |
10553 | flag_N = res >> 24; |
10554 | adr = AREG((Opcode >> 9) & 7) - 4; |
10555 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10556 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10557 | POST_IO |
10558 | RET(20) |
10559 | } |
10560 | |
10561 | // MOVEL |
10562 | OPCODE(0x215F) |
10563 | { |
10564 | u32 adr, res; |
10565 | u32 src, dst; |
10566 | |
10567 | adr = AREG(7); |
10568 | AREG(7) += 4; |
10569 | PRE_IO |
10570 | READ_LONG_F(adr, res) |
10571 | flag_C = 0; |
10572 | flag_V = 0; |
10573 | flag_NotZ = res; |
10574 | flag_N = res >> 24; |
10575 | FETCH_SWORD(adr); |
10576 | adr += AREG((Opcode >> 9) & 7); |
10577 | WRITE_LONG_F(adr, res) |
10578 | POST_IO |
10579 | RET(24) |
10580 | } |
10581 | |
10582 | // MOVEL |
10583 | OPCODE(0x219F) |
10584 | { |
10585 | u32 adr, res; |
10586 | u32 src, dst; |
10587 | |
10588 | adr = AREG(7); |
10589 | AREG(7) += 4; |
10590 | PRE_IO |
10591 | READ_LONG_F(adr, res) |
10592 | flag_C = 0; |
10593 | flag_V = 0; |
10594 | flag_NotZ = res; |
10595 | flag_N = res >> 24; |
10596 | adr = AREG((Opcode >> 9) & 7); |
10597 | DECODE_EXT_WORD |
10598 | WRITE_LONG_F(adr, res) |
10599 | POST_IO |
10600 | RET(26) |
10601 | } |
10602 | |
10603 | // MOVEL |
10604 | OPCODE(0x21DF) |
10605 | { |
10606 | u32 adr, res; |
10607 | u32 src, dst; |
10608 | |
10609 | adr = AREG(7); |
10610 | AREG(7) += 4; |
10611 | PRE_IO |
10612 | READ_LONG_F(adr, res) |
10613 | flag_C = 0; |
10614 | flag_V = 0; |
10615 | flag_NotZ = res; |
10616 | flag_N = res >> 24; |
10617 | FETCH_SWORD(adr); |
10618 | WRITE_LONG_F(adr, res) |
10619 | POST_IO |
10620 | RET(24) |
10621 | } |
10622 | |
10623 | // MOVEL |
10624 | OPCODE(0x23DF) |
10625 | { |
10626 | u32 adr, res; |
10627 | u32 src, dst; |
10628 | |
10629 | adr = AREG(7); |
10630 | AREG(7) += 4; |
10631 | PRE_IO |
10632 | READ_LONG_F(adr, res) |
10633 | flag_C = 0; |
10634 | flag_V = 0; |
10635 | flag_NotZ = res; |
10636 | flag_N = res >> 24; |
10637 | FETCH_LONG(adr); |
10638 | WRITE_LONG_F(adr, res) |
10639 | POST_IO |
10640 | RET(28) |
10641 | } |
10642 | |
10643 | // MOVEL |
10644 | OPCODE(0x2EDF) |
10645 | { |
10646 | u32 adr, res; |
10647 | u32 src, dst; |
10648 | |
10649 | adr = AREG(7); |
10650 | AREG(7) += 4; |
10651 | PRE_IO |
10652 | READ_LONG_F(adr, res) |
10653 | flag_C = 0; |
10654 | flag_V = 0; |
10655 | flag_NotZ = res; |
10656 | flag_N = res >> 24; |
10657 | adr = AREG(7); |
10658 | AREG(7) += 4; |
10659 | WRITE_LONG_F(adr, res) |
10660 | POST_IO |
10661 | RET(20) |
10662 | } |
10663 | |
10664 | // MOVEL |
10665 | OPCODE(0x2F1F) |
10666 | { |
10667 | u32 adr, res; |
10668 | u32 src, dst; |
10669 | |
10670 | adr = AREG(7); |
10671 | AREG(7) += 4; |
10672 | PRE_IO |
10673 | READ_LONG_F(adr, res) |
10674 | flag_C = 0; |
10675 | flag_V = 0; |
10676 | flag_NotZ = res; |
10677 | flag_N = res >> 24; |
10678 | adr = AREG(7) - 4; |
10679 | AREG(7) = adr; |
03e4f2a3 |
10680 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10681 | POST_IO |
10682 | RET(20) |
10683 | } |
10684 | |
10685 | // MOVEL |
10686 | OPCODE(0x2027) |
10687 | { |
10688 | u32 adr, res; |
10689 | u32 src, dst; |
10690 | |
10691 | adr = AREG(7) - 4; |
10692 | AREG(7) = adr; |
10693 | PRE_IO |
10694 | READ_LONG_F(adr, res) |
10695 | flag_C = 0; |
10696 | flag_V = 0; |
10697 | flag_NotZ = res; |
10698 | flag_N = res >> 24; |
10699 | DREGu32((Opcode >> 9) & 7) = res; |
10700 | POST_IO |
10701 | RET(14) |
10702 | } |
10703 | |
10704 | // MOVEL |
10705 | OPCODE(0x20A7) |
10706 | { |
10707 | u32 adr, res; |
10708 | u32 src, dst; |
10709 | |
10710 | adr = AREG(7) - 4; |
10711 | AREG(7) = adr; |
10712 | PRE_IO |
10713 | READ_LONG_F(adr, res) |
10714 | flag_C = 0; |
10715 | flag_V = 0; |
10716 | flag_NotZ = res; |
10717 | flag_N = res >> 24; |
10718 | adr = AREG((Opcode >> 9) & 7); |
10719 | WRITE_LONG_F(adr, res) |
10720 | POST_IO |
10721 | RET(22) |
10722 | } |
10723 | |
10724 | // MOVEL |
10725 | OPCODE(0x20E7) |
10726 | { |
10727 | u32 adr, res; |
10728 | u32 src, dst; |
10729 | |
10730 | adr = AREG(7) - 4; |
10731 | AREG(7) = adr; |
10732 | PRE_IO |
10733 | READ_LONG_F(adr, res) |
10734 | flag_C = 0; |
10735 | flag_V = 0; |
10736 | flag_NotZ = res; |
10737 | flag_N = res >> 24; |
10738 | adr = AREG((Opcode >> 9) & 7); |
10739 | AREG((Opcode >> 9) & 7) += 4; |
10740 | WRITE_LONG_F(adr, res) |
10741 | POST_IO |
10742 | RET(22) |
10743 | } |
10744 | |
10745 | // MOVEL |
10746 | OPCODE(0x2127) |
10747 | { |
10748 | u32 adr, res; |
10749 | u32 src, dst; |
10750 | |
10751 | adr = AREG(7) - 4; |
10752 | AREG(7) = adr; |
10753 | PRE_IO |
10754 | READ_LONG_F(adr, res) |
10755 | flag_C = 0; |
10756 | flag_V = 0; |
10757 | flag_NotZ = res; |
10758 | flag_N = res >> 24; |
10759 | adr = AREG((Opcode >> 9) & 7) - 4; |
10760 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10761 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10762 | POST_IO |
10763 | RET(22) |
10764 | } |
10765 | |
10766 | // MOVEL |
10767 | OPCODE(0x2167) |
10768 | { |
10769 | u32 adr, res; |
10770 | u32 src, dst; |
10771 | |
10772 | adr = AREG(7) - 4; |
10773 | AREG(7) = adr; |
10774 | PRE_IO |
10775 | READ_LONG_F(adr, res) |
10776 | flag_C = 0; |
10777 | flag_V = 0; |
10778 | flag_NotZ = res; |
10779 | flag_N = res >> 24; |
10780 | FETCH_SWORD(adr); |
10781 | adr += AREG((Opcode >> 9) & 7); |
10782 | WRITE_LONG_F(adr, res) |
10783 | POST_IO |
10784 | RET(26) |
10785 | } |
10786 | |
10787 | // MOVEL |
10788 | OPCODE(0x21A7) |
10789 | { |
10790 | u32 adr, res; |
10791 | u32 src, dst; |
10792 | |
10793 | adr = AREG(7) - 4; |
10794 | AREG(7) = adr; |
10795 | PRE_IO |
10796 | READ_LONG_F(adr, res) |
10797 | flag_C = 0; |
10798 | flag_V = 0; |
10799 | flag_NotZ = res; |
10800 | flag_N = res >> 24; |
10801 | adr = AREG((Opcode >> 9) & 7); |
10802 | DECODE_EXT_WORD |
10803 | WRITE_LONG_F(adr, res) |
10804 | POST_IO |
10805 | RET(28) |
10806 | } |
10807 | |
10808 | // MOVEL |
10809 | OPCODE(0x21E7) |
10810 | { |
10811 | u32 adr, res; |
10812 | u32 src, dst; |
10813 | |
10814 | adr = AREG(7) - 4; |
10815 | AREG(7) = adr; |
10816 | PRE_IO |
10817 | READ_LONG_F(adr, res) |
10818 | flag_C = 0; |
10819 | flag_V = 0; |
10820 | flag_NotZ = res; |
10821 | flag_N = res >> 24; |
10822 | FETCH_SWORD(adr); |
10823 | WRITE_LONG_F(adr, res) |
10824 | POST_IO |
10825 | RET(26) |
10826 | } |
10827 | |
10828 | // MOVEL |
10829 | OPCODE(0x23E7) |
10830 | { |
10831 | u32 adr, res; |
10832 | u32 src, dst; |
10833 | |
10834 | adr = AREG(7) - 4; |
10835 | AREG(7) = adr; |
10836 | PRE_IO |
10837 | READ_LONG_F(adr, res) |
10838 | flag_C = 0; |
10839 | flag_V = 0; |
10840 | flag_NotZ = res; |
10841 | flag_N = res >> 24; |
10842 | FETCH_LONG(adr); |
10843 | WRITE_LONG_F(adr, res) |
10844 | POST_IO |
10845 | RET(30) |
10846 | } |
10847 | |
10848 | // MOVEL |
10849 | OPCODE(0x2EE7) |
10850 | { |
10851 | u32 adr, res; |
10852 | u32 src, dst; |
10853 | |
10854 | adr = AREG(7) - 4; |
10855 | AREG(7) = adr; |
10856 | PRE_IO |
10857 | READ_LONG_F(adr, res) |
10858 | flag_C = 0; |
10859 | flag_V = 0; |
10860 | flag_NotZ = res; |
10861 | flag_N = res >> 24; |
10862 | adr = AREG(7); |
10863 | AREG(7) += 4; |
10864 | WRITE_LONG_F(adr, res) |
10865 | POST_IO |
10866 | RET(22) |
10867 | } |
10868 | |
10869 | // MOVEL |
10870 | OPCODE(0x2F27) |
10871 | { |
10872 | u32 adr, res; |
10873 | u32 src, dst; |
10874 | |
10875 | adr = AREG(7) - 4; |
10876 | AREG(7) = adr; |
10877 | PRE_IO |
10878 | READ_LONG_F(adr, res) |
10879 | flag_C = 0; |
10880 | flag_V = 0; |
10881 | flag_NotZ = res; |
10882 | flag_N = res >> 24; |
10883 | adr = AREG(7) - 4; |
10884 | AREG(7) = adr; |
03e4f2a3 |
10885 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10886 | POST_IO |
10887 | RET(22) |
10888 | } |
10889 | |
10890 | // MOVEAL |
10891 | OPCODE(0x2040) |
10892 | { |
10893 | u32 adr, res; |
10894 | u32 src, dst; |
10895 | |
10896 | res = (s32)DREGs32((Opcode >> 0) & 7); |
10897 | AREG((Opcode >> 9) & 7) = res; |
10898 | RET(4) |
10899 | } |
10900 | |
10901 | // MOVEAL |
10902 | OPCODE(0x2048) |
10903 | { |
10904 | u32 adr, res; |
10905 | u32 src, dst; |
10906 | |
10907 | res = (s32)AREGs32((Opcode >> 0) & 7); |
10908 | AREG((Opcode >> 9) & 7) = res; |
10909 | RET(4) |
10910 | } |
10911 | |
10912 | // MOVEAL |
10913 | OPCODE(0x2050) |
10914 | { |
10915 | u32 adr, res; |
10916 | u32 src, dst; |
10917 | |
10918 | adr = AREG((Opcode >> 0) & 7); |
10919 | PRE_IO |
10920 | READSX_LONG_F(adr, res) |
10921 | AREG((Opcode >> 9) & 7) = res; |
10922 | POST_IO |
10923 | RET(12) |
10924 | } |
10925 | |
10926 | // MOVEAL |
10927 | OPCODE(0x2058) |
10928 | { |
10929 | u32 adr, res; |
10930 | u32 src, dst; |
10931 | |
10932 | adr = AREG((Opcode >> 0) & 7); |
10933 | AREG((Opcode >> 0) & 7) += 4; |
10934 | PRE_IO |
10935 | READSX_LONG_F(adr, res) |
10936 | AREG((Opcode >> 9) & 7) = res; |
10937 | POST_IO |
10938 | RET(12) |
10939 | } |
10940 | |
10941 | // MOVEAL |
10942 | OPCODE(0x2060) |
10943 | { |
10944 | u32 adr, res; |
10945 | u32 src, dst; |
10946 | |
10947 | adr = AREG((Opcode >> 0) & 7) - 4; |
10948 | AREG((Opcode >> 0) & 7) = adr; |
10949 | PRE_IO |
10950 | READSX_LONG_F(adr, res) |
10951 | AREG((Opcode >> 9) & 7) = res; |
10952 | POST_IO |
10953 | RET(14) |
10954 | } |
10955 | |
10956 | // MOVEAL |
10957 | OPCODE(0x2068) |
10958 | { |
10959 | u32 adr, res; |
10960 | u32 src, dst; |
10961 | |
10962 | FETCH_SWORD(adr); |
10963 | adr += AREG((Opcode >> 0) & 7); |
10964 | PRE_IO |
10965 | READSX_LONG_F(adr, res) |
10966 | AREG((Opcode >> 9) & 7) = res; |
10967 | POST_IO |
10968 | RET(16) |
10969 | } |
10970 | |
10971 | // MOVEAL |
10972 | OPCODE(0x2070) |
10973 | { |
10974 | u32 adr, res; |
10975 | u32 src, dst; |
10976 | |
10977 | adr = AREG((Opcode >> 0) & 7); |
10978 | DECODE_EXT_WORD |
10979 | PRE_IO |
10980 | READSX_LONG_F(adr, res) |
10981 | AREG((Opcode >> 9) & 7) = res; |
10982 | POST_IO |
10983 | RET(18) |
10984 | } |
10985 | |
10986 | // MOVEAL |
10987 | OPCODE(0x2078) |
10988 | { |
10989 | u32 adr, res; |
10990 | u32 src, dst; |
10991 | |
10992 | FETCH_SWORD(adr); |
10993 | PRE_IO |
10994 | READSX_LONG_F(adr, res) |
10995 | AREG((Opcode >> 9) & 7) = res; |
10996 | POST_IO |
10997 | RET(16) |
10998 | } |
10999 | |
11000 | // MOVEAL |
11001 | OPCODE(0x2079) |
11002 | { |
11003 | u32 adr, res; |
11004 | u32 src, dst; |
11005 | |
11006 | FETCH_LONG(adr); |
11007 | PRE_IO |
11008 | READSX_LONG_F(adr, res) |
11009 | AREG((Opcode >> 9) & 7) = res; |
11010 | POST_IO |
11011 | RET(20) |
11012 | } |
11013 | |
11014 | // MOVEAL |
11015 | OPCODE(0x207A) |
11016 | { |
11017 | u32 adr, res; |
11018 | u32 src, dst; |
11019 | |
11020 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
11021 | PC++; |
11022 | PRE_IO |
11023 | READSX_LONG_F(adr, res) |
11024 | AREG((Opcode >> 9) & 7) = res; |
11025 | POST_IO |
11026 | RET(16) |
11027 | } |
11028 | |
11029 | // MOVEAL |
11030 | OPCODE(0x207B) |
11031 | { |
11032 | u32 adr, res; |
11033 | u32 src, dst; |
11034 | |
11035 | adr = (u32)(PC) - BasePC; |
11036 | DECODE_EXT_WORD |
11037 | PRE_IO |
11038 | READSX_LONG_F(adr, res) |
11039 | AREG((Opcode >> 9) & 7) = res; |
11040 | POST_IO |
11041 | RET(18) |
11042 | } |
11043 | |
11044 | // MOVEAL |
11045 | OPCODE(0x207C) |
11046 | { |
11047 | u32 adr, res; |
11048 | u32 src, dst; |
11049 | |
11050 | FETCH_LONG(res); |
11051 | AREG((Opcode >> 9) & 7) = res; |
11052 | RET(12) |
11053 | } |
11054 | |
11055 | // MOVEAL |
11056 | OPCODE(0x205F) |
11057 | { |
11058 | u32 adr, res; |
11059 | u32 src, dst; |
11060 | |
11061 | adr = AREG(7); |
11062 | AREG(7) += 4; |
11063 | PRE_IO |
11064 | READSX_LONG_F(adr, res) |
11065 | AREG((Opcode >> 9) & 7) = res; |
11066 | POST_IO |
11067 | RET(12) |
11068 | } |
11069 | |
11070 | // MOVEAL |
11071 | OPCODE(0x2067) |
11072 | { |
11073 | u32 adr, res; |
11074 | u32 src, dst; |
11075 | |
11076 | adr = AREG(7) - 4; |
11077 | AREG(7) = adr; |
11078 | PRE_IO |
11079 | READSX_LONG_F(adr, res) |
11080 | AREG((Opcode >> 9) & 7) = res; |
11081 | POST_IO |
11082 | RET(14) |
11083 | } |
11084 | |
11085 | // MOVEW |
11086 | OPCODE(0x3000) |
11087 | { |
11088 | u32 adr, res; |
11089 | u32 src, dst; |
11090 | |
11091 | res = DREGu16((Opcode >> 0) & 7); |
11092 | flag_C = 0; |
11093 | flag_V = 0; |
11094 | flag_NotZ = res; |
11095 | flag_N = res >> 8; |
11096 | DREGu16((Opcode >> 9) & 7) = res; |
11097 | RET(4) |
11098 | } |
11099 | |
11100 | // MOVEW |
11101 | OPCODE(0x3080) |
11102 | { |
11103 | u32 adr, res; |
11104 | u32 src, dst; |
11105 | |
11106 | res = DREGu16((Opcode >> 0) & 7); |
11107 | flag_C = 0; |
11108 | flag_V = 0; |
11109 | flag_NotZ = res; |
11110 | flag_N = res >> 8; |
11111 | adr = AREG((Opcode >> 9) & 7); |
11112 | PRE_IO |
11113 | WRITE_WORD_F(adr, res) |
11114 | POST_IO |
11115 | RET(8) |
11116 | } |
11117 | |
11118 | // MOVEW |
11119 | OPCODE(0x30C0) |
11120 | { |
11121 | u32 adr, res; |
11122 | u32 src, dst; |
11123 | |
11124 | res = DREGu16((Opcode >> 0) & 7); |
11125 | flag_C = 0; |
11126 | flag_V = 0; |
11127 | flag_NotZ = res; |
11128 | flag_N = res >> 8; |
11129 | adr = AREG((Opcode >> 9) & 7); |
11130 | AREG((Opcode >> 9) & 7) += 2; |
11131 | PRE_IO |
11132 | WRITE_WORD_F(adr, res) |
11133 | POST_IO |
11134 | RET(8) |
11135 | } |
11136 | |
11137 | // MOVEW |
11138 | OPCODE(0x3100) |
11139 | { |
11140 | u32 adr, res; |
11141 | u32 src, dst; |
11142 | |
11143 | res = DREGu16((Opcode >> 0) & 7); |
11144 | flag_C = 0; |
11145 | flag_V = 0; |
11146 | flag_NotZ = res; |
11147 | flag_N = res >> 8; |
11148 | adr = AREG((Opcode >> 9) & 7) - 2; |
11149 | AREG((Opcode >> 9) & 7) = adr; |
11150 | PRE_IO |
11151 | WRITE_WORD_F(adr, res) |
11152 | POST_IO |
11153 | RET(8) |
11154 | } |
11155 | |
11156 | // MOVEW |
11157 | OPCODE(0x3140) |
11158 | { |
11159 | u32 adr, res; |
11160 | u32 src, dst; |
11161 | |
11162 | res = DREGu16((Opcode >> 0) & 7); |
11163 | flag_C = 0; |
11164 | flag_V = 0; |
11165 | flag_NotZ = res; |
11166 | flag_N = res >> 8; |
11167 | FETCH_SWORD(adr); |
11168 | adr += AREG((Opcode >> 9) & 7); |
11169 | PRE_IO |
11170 | WRITE_WORD_F(adr, res) |
11171 | POST_IO |
11172 | RET(12) |
11173 | } |
11174 | |
11175 | // MOVEW |
11176 | OPCODE(0x3180) |
11177 | { |
11178 | u32 adr, res; |
11179 | u32 src, dst; |
11180 | |
11181 | res = DREGu16((Opcode >> 0) & 7); |
11182 | flag_C = 0; |
11183 | flag_V = 0; |
11184 | flag_NotZ = res; |
11185 | flag_N = res >> 8; |
11186 | adr = AREG((Opcode >> 9) & 7); |
11187 | DECODE_EXT_WORD |
11188 | PRE_IO |
11189 | WRITE_WORD_F(adr, res) |
11190 | POST_IO |
11191 | RET(14) |
11192 | } |
11193 | |
11194 | // MOVEW |
11195 | OPCODE(0x31C0) |
11196 | { |
11197 | u32 adr, res; |
11198 | u32 src, dst; |
11199 | |
11200 | res = DREGu16((Opcode >> 0) & 7); |
11201 | flag_C = 0; |
11202 | flag_V = 0; |
11203 | flag_NotZ = res; |
11204 | flag_N = res >> 8; |
11205 | FETCH_SWORD(adr); |
11206 | PRE_IO |
11207 | WRITE_WORD_F(adr, res) |
11208 | POST_IO |
11209 | RET(12) |
11210 | } |
11211 | |
11212 | // MOVEW |
11213 | OPCODE(0x33C0) |
11214 | { |
11215 | u32 adr, res; |
11216 | u32 src, dst; |
11217 | |
11218 | res = DREGu16((Opcode >> 0) & 7); |
11219 | flag_C = 0; |
11220 | flag_V = 0; |
11221 | flag_NotZ = res; |
11222 | flag_N = res >> 8; |
11223 | FETCH_LONG(adr); |
11224 | PRE_IO |
11225 | WRITE_WORD_F(adr, res) |
11226 | POST_IO |
11227 | RET(16) |
11228 | } |
11229 | |
11230 | // MOVEW |
11231 | OPCODE(0x3EC0) |
11232 | { |
11233 | u32 adr, res; |
11234 | u32 src, dst; |
11235 | |
11236 | res = DREGu16((Opcode >> 0) & 7); |
11237 | flag_C = 0; |
11238 | flag_V = 0; |
11239 | flag_NotZ = res; |
11240 | flag_N = res >> 8; |
11241 | adr = AREG(7); |
11242 | AREG(7) += 2; |
11243 | PRE_IO |
11244 | WRITE_WORD_F(adr, res) |
11245 | POST_IO |
11246 | RET(8) |
11247 | } |
11248 | |
11249 | // MOVEW |
11250 | OPCODE(0x3F00) |
11251 | { |
11252 | u32 adr, res; |
11253 | u32 src, dst; |
11254 | |
11255 | res = DREGu16((Opcode >> 0) & 7); |
11256 | flag_C = 0; |
11257 | flag_V = 0; |
11258 | flag_NotZ = res; |
11259 | flag_N = res >> 8; |
11260 | adr = AREG(7) - 2; |
11261 | AREG(7) = adr; |
11262 | PRE_IO |
11263 | WRITE_WORD_F(adr, res) |
11264 | POST_IO |
11265 | RET(8) |
11266 | } |
11267 | |
11268 | // MOVEW |
11269 | OPCODE(0x3008) |
11270 | { |
11271 | u32 adr, res; |
11272 | u32 src, dst; |
11273 | |
11274 | res = AREGu16((Opcode >> 0) & 7); |
11275 | flag_C = 0; |
11276 | flag_V = 0; |
11277 | flag_NotZ = res; |
11278 | flag_N = res >> 8; |
11279 | DREGu16((Opcode >> 9) & 7) = res; |
11280 | RET(4) |
11281 | } |
11282 | |
11283 | // MOVEW |
11284 | OPCODE(0x3088) |
11285 | { |
11286 | u32 adr, res; |
11287 | u32 src, dst; |
11288 | |
11289 | res = AREGu16((Opcode >> 0) & 7); |
11290 | flag_C = 0; |
11291 | flag_V = 0; |
11292 | flag_NotZ = res; |
11293 | flag_N = res >> 8; |
11294 | adr = AREG((Opcode >> 9) & 7); |
11295 | PRE_IO |
11296 | WRITE_WORD_F(adr, res) |
11297 | POST_IO |
11298 | RET(8) |
11299 | } |
11300 | |
11301 | // MOVEW |
11302 | OPCODE(0x30C8) |
11303 | { |
11304 | u32 adr, res; |
11305 | u32 src, dst; |
11306 | |
11307 | res = AREGu16((Opcode >> 0) & 7); |
11308 | flag_C = 0; |
11309 | flag_V = 0; |
11310 | flag_NotZ = res; |
11311 | flag_N = res >> 8; |
11312 | adr = AREG((Opcode >> 9) & 7); |
11313 | AREG((Opcode >> 9) & 7) += 2; |
11314 | PRE_IO |
11315 | WRITE_WORD_F(adr, res) |
11316 | POST_IO |
11317 | RET(8) |
11318 | } |
11319 | |
11320 | // MOVEW |
11321 | OPCODE(0x3108) |
11322 | { |
11323 | u32 adr, res; |
11324 | u32 src, dst; |
11325 | |
11326 | res = AREGu16((Opcode >> 0) & 7); |
11327 | flag_C = 0; |
11328 | flag_V = 0; |
11329 | flag_NotZ = res; |
11330 | flag_N = res >> 8; |
11331 | adr = AREG((Opcode >> 9) & 7) - 2; |
11332 | AREG((Opcode >> 9) & 7) = adr; |
11333 | PRE_IO |
11334 | WRITE_WORD_F(adr, res) |
11335 | POST_IO |
11336 | RET(8) |
11337 | } |
11338 | |
11339 | // MOVEW |
11340 | OPCODE(0x3148) |
11341 | { |
11342 | u32 adr, res; |
11343 | u32 src, dst; |
11344 | |
11345 | res = AREGu16((Opcode >> 0) & 7); |
11346 | flag_C = 0; |
11347 | flag_V = 0; |
11348 | flag_NotZ = res; |
11349 | flag_N = res >> 8; |
11350 | FETCH_SWORD(adr); |
11351 | adr += AREG((Opcode >> 9) & 7); |
11352 | PRE_IO |
11353 | WRITE_WORD_F(adr, res) |
11354 | POST_IO |
11355 | RET(12) |
11356 | } |
11357 | |
11358 | // MOVEW |
11359 | OPCODE(0x3188) |
11360 | { |
11361 | u32 adr, res; |
11362 | u32 src, dst; |
11363 | |
11364 | res = AREGu16((Opcode >> 0) & 7); |
11365 | flag_C = 0; |
11366 | flag_V = 0; |
11367 | flag_NotZ = res; |
11368 | flag_N = res >> 8; |
11369 | adr = AREG((Opcode >> 9) & 7); |
11370 | DECODE_EXT_WORD |
11371 | PRE_IO |
11372 | WRITE_WORD_F(adr, res) |
11373 | POST_IO |
11374 | RET(14) |
11375 | } |
11376 | |
11377 | // MOVEW |
11378 | OPCODE(0x31C8) |
11379 | { |
11380 | u32 adr, res; |
11381 | u32 src, dst; |
11382 | |
11383 | res = AREGu16((Opcode >> 0) & 7); |
11384 | flag_C = 0; |
11385 | flag_V = 0; |
11386 | flag_NotZ = res; |
11387 | flag_N = res >> 8; |
11388 | FETCH_SWORD(adr); |
11389 | PRE_IO |
11390 | WRITE_WORD_F(adr, res) |
11391 | POST_IO |
11392 | RET(12) |
11393 | } |
11394 | |
11395 | // MOVEW |
11396 | OPCODE(0x33C8) |
11397 | { |
11398 | u32 adr, res; |
11399 | u32 src, dst; |
11400 | |
11401 | res = AREGu16((Opcode >> 0) & 7); |
11402 | flag_C = 0; |
11403 | flag_V = 0; |
11404 | flag_NotZ = res; |
11405 | flag_N = res >> 8; |
11406 | FETCH_LONG(adr); |
11407 | PRE_IO |
11408 | WRITE_WORD_F(adr, res) |
11409 | POST_IO |
11410 | RET(16) |
11411 | } |
11412 | |
11413 | // MOVEW |
11414 | OPCODE(0x3EC8) |
11415 | { |
11416 | u32 adr, res; |
11417 | u32 src, dst; |
11418 | |
11419 | res = AREGu16((Opcode >> 0) & 7); |
11420 | flag_C = 0; |
11421 | flag_V = 0; |
11422 | flag_NotZ = res; |
11423 | flag_N = res >> 8; |
11424 | adr = AREG(7); |
11425 | AREG(7) += 2; |
11426 | PRE_IO |
11427 | WRITE_WORD_F(adr, res) |
11428 | POST_IO |
11429 | RET(8) |
11430 | } |
11431 | |
11432 | // MOVEW |
11433 | OPCODE(0x3F08) |
11434 | { |
11435 | u32 adr, res; |
11436 | u32 src, dst; |
11437 | |
11438 | res = AREGu16((Opcode >> 0) & 7); |
11439 | flag_C = 0; |
11440 | flag_V = 0; |
11441 | flag_NotZ = res; |
11442 | flag_N = res >> 8; |
11443 | adr = AREG(7) - 2; |
11444 | AREG(7) = adr; |
11445 | PRE_IO |
11446 | WRITE_WORD_F(adr, res) |
11447 | POST_IO |
11448 | RET(8) |
11449 | } |
11450 | |
11451 | // MOVEW |
11452 | OPCODE(0x3010) |
11453 | { |
11454 | u32 adr, res; |
11455 | u32 src, dst; |
11456 | |
11457 | adr = AREG((Opcode >> 0) & 7); |
11458 | PRE_IO |
11459 | READ_WORD_F(adr, res) |
11460 | flag_C = 0; |
11461 | flag_V = 0; |
11462 | flag_NotZ = res; |
11463 | flag_N = res >> 8; |
11464 | DREGu16((Opcode >> 9) & 7) = res; |
11465 | POST_IO |
11466 | RET(8) |
11467 | } |
11468 | |
11469 | // MOVEW |
11470 | OPCODE(0x3090) |
11471 | { |
11472 | u32 adr, res; |
11473 | u32 src, dst; |
11474 | |
11475 | adr = AREG((Opcode >> 0) & 7); |
11476 | PRE_IO |
11477 | READ_WORD_F(adr, res) |
11478 | flag_C = 0; |
11479 | flag_V = 0; |
11480 | flag_NotZ = res; |
11481 | flag_N = res >> 8; |
11482 | adr = AREG((Opcode >> 9) & 7); |
11483 | WRITE_WORD_F(adr, res) |
11484 | POST_IO |
11485 | RET(12) |
11486 | } |
11487 | |
11488 | // MOVEW |
11489 | OPCODE(0x30D0) |
11490 | { |
11491 | u32 adr, res; |
11492 | u32 src, dst; |
11493 | |
11494 | adr = AREG((Opcode >> 0) & 7); |
11495 | PRE_IO |
11496 | READ_WORD_F(adr, res) |
11497 | flag_C = 0; |
11498 | flag_V = 0; |
11499 | flag_NotZ = res; |
11500 | flag_N = res >> 8; |
11501 | adr = AREG((Opcode >> 9) & 7); |
11502 | AREG((Opcode >> 9) & 7) += 2; |
11503 | WRITE_WORD_F(adr, res) |
11504 | POST_IO |
11505 | RET(12) |
11506 | } |
11507 | |
11508 | // MOVEW |
11509 | OPCODE(0x3110) |
11510 | { |
11511 | u32 adr, res; |
11512 | u32 src, dst; |
11513 | |
11514 | adr = AREG((Opcode >> 0) & 7); |
11515 | PRE_IO |
11516 | READ_WORD_F(adr, res) |
11517 | flag_C = 0; |
11518 | flag_V = 0; |
11519 | flag_NotZ = res; |
11520 | flag_N = res >> 8; |
11521 | adr = AREG((Opcode >> 9) & 7) - 2; |
11522 | AREG((Opcode >> 9) & 7) = adr; |
11523 | WRITE_WORD_F(adr, res) |
11524 | POST_IO |
11525 | RET(12) |
11526 | } |
11527 | |
11528 | // MOVEW |
11529 | OPCODE(0x3150) |
11530 | { |
11531 | u32 adr, res; |
11532 | u32 src, dst; |
11533 | |
11534 | adr = AREG((Opcode >> 0) & 7); |
11535 | PRE_IO |
11536 | READ_WORD_F(adr, res) |
11537 | flag_C = 0; |
11538 | flag_V = 0; |
11539 | flag_NotZ = res; |
11540 | flag_N = res >> 8; |
11541 | FETCH_SWORD(adr); |
11542 | adr += AREG((Opcode >> 9) & 7); |
11543 | WRITE_WORD_F(adr, res) |
11544 | POST_IO |
11545 | RET(16) |
11546 | } |
11547 | |
11548 | // MOVEW |
11549 | OPCODE(0x3190) |
11550 | { |
11551 | u32 adr, res; |
11552 | u32 src, dst; |
11553 | |
11554 | adr = AREG((Opcode >> 0) & 7); |
11555 | PRE_IO |
11556 | READ_WORD_F(adr, res) |
11557 | flag_C = 0; |
11558 | flag_V = 0; |
11559 | flag_NotZ = res; |
11560 | flag_N = res >> 8; |
11561 | adr = AREG((Opcode >> 9) & 7); |
11562 | DECODE_EXT_WORD |
11563 | WRITE_WORD_F(adr, res) |
11564 | POST_IO |
11565 | RET(18) |
11566 | } |
11567 | |
11568 | // MOVEW |
11569 | OPCODE(0x31D0) |
11570 | { |
11571 | u32 adr, res; |
11572 | u32 src, dst; |
11573 | |
11574 | adr = AREG((Opcode >> 0) & 7); |
11575 | PRE_IO |
11576 | READ_WORD_F(adr, res) |
11577 | flag_C = 0; |
11578 | flag_V = 0; |
11579 | flag_NotZ = res; |
11580 | flag_N = res >> 8; |
11581 | FETCH_SWORD(adr); |
11582 | WRITE_WORD_F(adr, res) |
11583 | POST_IO |
11584 | RET(16) |
11585 | } |
11586 | |
11587 | // MOVEW |
11588 | OPCODE(0x33D0) |
11589 | { |
11590 | u32 adr, res; |
11591 | u32 src, dst; |
11592 | |
11593 | adr = AREG((Opcode >> 0) & 7); |
11594 | PRE_IO |
11595 | READ_WORD_F(adr, res) |
11596 | flag_C = 0; |
11597 | flag_V = 0; |
11598 | flag_NotZ = res; |
11599 | flag_N = res >> 8; |
11600 | FETCH_LONG(adr); |
11601 | WRITE_WORD_F(adr, res) |
11602 | POST_IO |
11603 | RET(20) |
11604 | } |
11605 | |
11606 | // MOVEW |
11607 | OPCODE(0x3ED0) |
11608 | { |
11609 | u32 adr, res; |
11610 | u32 src, dst; |
11611 | |
11612 | adr = AREG((Opcode >> 0) & 7); |
11613 | PRE_IO |
11614 | READ_WORD_F(adr, res) |
11615 | flag_C = 0; |
11616 | flag_V = 0; |
11617 | flag_NotZ = res; |
11618 | flag_N = res >> 8; |
11619 | adr = AREG(7); |
11620 | AREG(7) += 2; |
11621 | WRITE_WORD_F(adr, res) |
11622 | POST_IO |
11623 | RET(12) |
11624 | } |
11625 | |
11626 | // MOVEW |
11627 | OPCODE(0x3F10) |
11628 | { |
11629 | u32 adr, res; |
11630 | u32 src, dst; |
11631 | |
11632 | adr = AREG((Opcode >> 0) & 7); |
11633 | PRE_IO |
11634 | READ_WORD_F(adr, res) |
11635 | flag_C = 0; |
11636 | flag_V = 0; |
11637 | flag_NotZ = res; |
11638 | flag_N = res >> 8; |
11639 | adr = AREG(7) - 2; |
11640 | AREG(7) = adr; |
11641 | WRITE_WORD_F(adr, res) |
11642 | POST_IO |
11643 | RET(12) |
11644 | } |
11645 | |
11646 | // MOVEW |
11647 | OPCODE(0x3018) |
11648 | { |
11649 | u32 adr, res; |
11650 | u32 src, dst; |
11651 | |
11652 | adr = AREG((Opcode >> 0) & 7); |
11653 | AREG((Opcode >> 0) & 7) += 2; |
11654 | PRE_IO |
11655 | READ_WORD_F(adr, res) |
11656 | flag_C = 0; |
11657 | flag_V = 0; |
11658 | flag_NotZ = res; |
11659 | flag_N = res >> 8; |
11660 | DREGu16((Opcode >> 9) & 7) = res; |
11661 | POST_IO |
11662 | RET(8) |
11663 | } |
11664 | |
11665 | // MOVEW |
11666 | OPCODE(0x3098) |
11667 | { |
11668 | u32 adr, res; |
11669 | u32 src, dst; |
11670 | |
11671 | adr = AREG((Opcode >> 0) & 7); |
11672 | AREG((Opcode >> 0) & 7) += 2; |
11673 | PRE_IO |
11674 | READ_WORD_F(adr, res) |
11675 | flag_C = 0; |
11676 | flag_V = 0; |
11677 | flag_NotZ = res; |
11678 | flag_N = res >> 8; |
11679 | adr = AREG((Opcode >> 9) & 7); |
11680 | WRITE_WORD_F(adr, res) |
11681 | POST_IO |
11682 | RET(12) |
11683 | } |
11684 | |
11685 | // MOVEW |
11686 | OPCODE(0x30D8) |
11687 | { |
11688 | u32 adr, res; |
11689 | u32 src, dst; |
11690 | |
11691 | adr = AREG((Opcode >> 0) & 7); |
11692 | AREG((Opcode >> 0) & 7) += 2; |
11693 | PRE_IO |
11694 | READ_WORD_F(adr, res) |
11695 | flag_C = 0; |
11696 | flag_V = 0; |
11697 | flag_NotZ = res; |
11698 | flag_N = res >> 8; |
11699 | adr = AREG((Opcode >> 9) & 7); |
11700 | AREG((Opcode >> 9) & 7) += 2; |
11701 | WRITE_WORD_F(adr, res) |
11702 | POST_IO |
11703 | RET(12) |
11704 | } |
11705 | |
11706 | // MOVEW |
11707 | OPCODE(0x3118) |
11708 | { |
11709 | u32 adr, res; |
11710 | u32 src, dst; |
11711 | |
11712 | adr = AREG((Opcode >> 0) & 7); |
11713 | AREG((Opcode >> 0) & 7) += 2; |
11714 | PRE_IO |
11715 | READ_WORD_F(adr, res) |
11716 | flag_C = 0; |
11717 | flag_V = 0; |
11718 | flag_NotZ = res; |
11719 | flag_N = res >> 8; |
11720 | adr = AREG((Opcode >> 9) & 7) - 2; |
11721 | AREG((Opcode >> 9) & 7) = adr; |
11722 | WRITE_WORD_F(adr, res) |
11723 | POST_IO |
11724 | RET(12) |
11725 | } |
11726 | |
11727 | // MOVEW |
11728 | OPCODE(0x3158) |
11729 | { |
11730 | u32 adr, res; |
11731 | u32 src, dst; |
11732 | |
11733 | adr = AREG((Opcode >> 0) & 7); |
11734 | AREG((Opcode >> 0) & 7) += 2; |
11735 | PRE_IO |
11736 | READ_WORD_F(adr, res) |
11737 | flag_C = 0; |
11738 | flag_V = 0; |
11739 | flag_NotZ = res; |
11740 | flag_N = res >> 8; |
11741 | FETCH_SWORD(adr); |
11742 | adr += AREG((Opcode >> 9) & 7); |
11743 | WRITE_WORD_F(adr, res) |
11744 | POST_IO |
11745 | RET(16) |
11746 | } |
11747 | |
11748 | // MOVEW |
11749 | OPCODE(0x3198) |
11750 | { |
11751 | u32 adr, res; |
11752 | u32 src, dst; |
11753 | |
11754 | adr = AREG((Opcode >> 0) & 7); |
11755 | AREG((Opcode >> 0) & 7) += 2; |
11756 | PRE_IO |
11757 | READ_WORD_F(adr, res) |
11758 | flag_C = 0; |
11759 | flag_V = 0; |
11760 | flag_NotZ = res; |
11761 | flag_N = res >> 8; |
11762 | adr = AREG((Opcode >> 9) & 7); |
11763 | DECODE_EXT_WORD |
11764 | WRITE_WORD_F(adr, res) |
11765 | POST_IO |
11766 | RET(18) |
11767 | } |
11768 | |
11769 | // MOVEW |
11770 | OPCODE(0x31D8) |
11771 | { |
11772 | u32 adr, res; |
11773 | u32 src, dst; |
11774 | |
11775 | adr = AREG((Opcode >> 0) & 7); |
11776 | AREG((Opcode >> 0) & 7) += 2; |
11777 | PRE_IO |
11778 | READ_WORD_F(adr, res) |
11779 | flag_C = 0; |
11780 | flag_V = 0; |
11781 | flag_NotZ = res; |
11782 | flag_N = res >> 8; |
11783 | FETCH_SWORD(adr); |
11784 | WRITE_WORD_F(adr, res) |
11785 | POST_IO |
11786 | RET(16) |
11787 | } |
11788 | |
11789 | // MOVEW |
11790 | OPCODE(0x33D8) |
11791 | { |
11792 | u32 adr, res; |
11793 | u32 src, dst; |
11794 | |
11795 | adr = AREG((Opcode >> 0) & 7); |
11796 | AREG((Opcode >> 0) & 7) += 2; |
11797 | PRE_IO |
11798 | READ_WORD_F(adr, res) |
11799 | flag_C = 0; |
11800 | flag_V = 0; |
11801 | flag_NotZ = res; |
11802 | flag_N = res >> 8; |
11803 | FETCH_LONG(adr); |
11804 | WRITE_WORD_F(adr, res) |
11805 | POST_IO |
11806 | RET(20) |
11807 | } |
11808 | |
11809 | // MOVEW |
11810 | OPCODE(0x3ED8) |
11811 | { |
11812 | u32 adr, res; |
11813 | u32 src, dst; |
11814 | |
11815 | adr = AREG((Opcode >> 0) & 7); |
11816 | AREG((Opcode >> 0) & 7) += 2; |
11817 | PRE_IO |
11818 | READ_WORD_F(adr, res) |
11819 | flag_C = 0; |
11820 | flag_V = 0; |
11821 | flag_NotZ = res; |
11822 | flag_N = res >> 8; |
11823 | adr = AREG(7); |
11824 | AREG(7) += 2; |
11825 | WRITE_WORD_F(adr, res) |
11826 | POST_IO |
11827 | RET(12) |
11828 | } |
11829 | |
11830 | // MOVEW |
11831 | OPCODE(0x3F18) |
11832 | { |
11833 | u32 adr, res; |
11834 | u32 src, dst; |
11835 | |
11836 | adr = AREG((Opcode >> 0) & 7); |
11837 | AREG((Opcode >> 0) & 7) += 2; |
11838 | PRE_IO |
11839 | READ_WORD_F(adr, res) |
11840 | flag_C = 0; |
11841 | flag_V = 0; |
11842 | flag_NotZ = res; |
11843 | flag_N = res >> 8; |
11844 | adr = AREG(7) - 2; |
11845 | AREG(7) = adr; |
11846 | WRITE_WORD_F(adr, res) |
11847 | POST_IO |
11848 | RET(12) |
11849 | } |
11850 | |
11851 | // MOVEW |
11852 | OPCODE(0x3020) |
11853 | { |
11854 | u32 adr, res; |
11855 | u32 src, dst; |
11856 | |
11857 | adr = AREG((Opcode >> 0) & 7) - 2; |
11858 | AREG((Opcode >> 0) & 7) = adr; |
11859 | PRE_IO |
11860 | READ_WORD_F(adr, res) |
11861 | flag_C = 0; |
11862 | flag_V = 0; |
11863 | flag_NotZ = res; |
11864 | flag_N = res >> 8; |
11865 | DREGu16((Opcode >> 9) & 7) = res; |
11866 | POST_IO |
11867 | RET(10) |
11868 | } |
11869 | |
11870 | // MOVEW |
11871 | OPCODE(0x30A0) |
11872 | { |
11873 | u32 adr, res; |
11874 | u32 src, dst; |
11875 | |
11876 | adr = AREG((Opcode >> 0) & 7) - 2; |
11877 | AREG((Opcode >> 0) & 7) = adr; |
11878 | PRE_IO |
11879 | READ_WORD_F(adr, res) |
11880 | flag_C = 0; |
11881 | flag_V = 0; |
11882 | flag_NotZ = res; |
11883 | flag_N = res >> 8; |
11884 | adr = AREG((Opcode >> 9) & 7); |
11885 | WRITE_WORD_F(adr, res) |
11886 | POST_IO |
11887 | RET(14) |
11888 | } |
11889 | |
11890 | // MOVEW |
11891 | OPCODE(0x30E0) |
11892 | { |
11893 | u32 adr, res; |
11894 | u32 src, dst; |
11895 | |
11896 | adr = AREG((Opcode >> 0) & 7) - 2; |
11897 | AREG((Opcode >> 0) & 7) = adr; |
11898 | PRE_IO |
11899 | READ_WORD_F(adr, res) |
11900 | flag_C = 0; |
11901 | flag_V = 0; |
11902 | flag_NotZ = res; |
11903 | flag_N = res >> 8; |
11904 | adr = AREG((Opcode >> 9) & 7); |
11905 | AREG((Opcode >> 9) & 7) += 2; |
11906 | WRITE_WORD_F(adr, res) |
11907 | POST_IO |
11908 | RET(14) |
11909 | } |
11910 | |
11911 | // MOVEW |
11912 | OPCODE(0x3120) |
11913 | { |
11914 | u32 adr, res; |
11915 | u32 src, dst; |
11916 | |
11917 | adr = AREG((Opcode >> 0) & 7) - 2; |
11918 | AREG((Opcode >> 0) & 7) = adr; |
11919 | PRE_IO |
11920 | READ_WORD_F(adr, res) |
11921 | flag_C = 0; |
11922 | flag_V = 0; |
11923 | flag_NotZ = res; |
11924 | flag_N = res >> 8; |
11925 | adr = AREG((Opcode >> 9) & 7) - 2; |
11926 | AREG((Opcode >> 9) & 7) = adr; |
11927 | WRITE_WORD_F(adr, res) |
11928 | POST_IO |
11929 | RET(14) |
11930 | } |
11931 | |
11932 | // MOVEW |
11933 | OPCODE(0x3160) |
11934 | { |
11935 | u32 adr, res; |
11936 | u32 src, dst; |
11937 | |
11938 | adr = AREG((Opcode >> 0) & 7) - 2; |
11939 | AREG((Opcode >> 0) & 7) = adr; |
11940 | PRE_IO |
11941 | READ_WORD_F(adr, res) |
11942 | flag_C = 0; |
11943 | flag_V = 0; |
11944 | flag_NotZ = res; |
11945 | flag_N = res >> 8; |
11946 | FETCH_SWORD(adr); |
11947 | adr += AREG((Opcode >> 9) & 7); |
11948 | WRITE_WORD_F(adr, res) |
11949 | POST_IO |
11950 | RET(18) |
11951 | } |
11952 | |
11953 | // MOVEW |
11954 | OPCODE(0x31A0) |
11955 | { |
11956 | u32 adr, res; |
11957 | u32 src, dst; |
11958 | |
11959 | adr = AREG((Opcode >> 0) & 7) - 2; |
11960 | AREG((Opcode >> 0) & 7) = adr; |
11961 | PRE_IO |
11962 | READ_WORD_F(adr, res) |
11963 | flag_C = 0; |
11964 | flag_V = 0; |
11965 | flag_NotZ = res; |
11966 | flag_N = res >> 8; |
11967 | adr = AREG((Opcode >> 9) & 7); |
11968 | DECODE_EXT_WORD |
11969 | WRITE_WORD_F(adr, res) |
11970 | POST_IO |
11971 | RET(20) |
11972 | } |
11973 | |
11974 | // MOVEW |
11975 | OPCODE(0x31E0) |
11976 | { |
11977 | u32 adr, res; |
11978 | u32 src, dst; |
11979 | |
11980 | adr = AREG((Opcode >> 0) & 7) - 2; |
11981 | AREG((Opcode >> 0) & 7) = adr; |
11982 | PRE_IO |
11983 | READ_WORD_F(adr, res) |
11984 | flag_C = 0; |
11985 | flag_V = 0; |
11986 | flag_NotZ = res; |
11987 | flag_N = res >> 8; |
11988 | FETCH_SWORD(adr); |
11989 | WRITE_WORD_F(adr, res) |
11990 | POST_IO |
11991 | RET(18) |
11992 | } |
11993 | |
11994 | // MOVEW |
11995 | OPCODE(0x33E0) |
11996 | { |
11997 | u32 adr, res; |
11998 | u32 src, dst; |
11999 | |
12000 | adr = AREG((Opcode >> 0) & 7) - 2; |
12001 | AREG((Opcode >> 0) & 7) = adr; |
12002 | PRE_IO |
12003 | READ_WORD_F(adr, res) |
12004 | flag_C = 0; |
12005 | flag_V = 0; |
12006 | flag_NotZ = res; |
12007 | flag_N = res >> 8; |
12008 | FETCH_LONG(adr); |
12009 | WRITE_WORD_F(adr, res) |
12010 | POST_IO |
12011 | RET(22) |
12012 | } |
12013 | |
12014 | // MOVEW |
12015 | OPCODE(0x3EE0) |
12016 | { |
12017 | u32 adr, res; |
12018 | u32 src, dst; |
12019 | |
12020 | adr = AREG((Opcode >> 0) & 7) - 2; |
12021 | AREG((Opcode >> 0) & 7) = adr; |
12022 | PRE_IO |
12023 | READ_WORD_F(adr, res) |
12024 | flag_C = 0; |
12025 | flag_V = 0; |
12026 | flag_NotZ = res; |
12027 | flag_N = res >> 8; |
12028 | adr = AREG(7); |
12029 | AREG(7) += 2; |
12030 | WRITE_WORD_F(adr, res) |
12031 | POST_IO |
12032 | RET(14) |
12033 | } |
12034 | |
12035 | // MOVEW |
12036 | OPCODE(0x3F20) |
12037 | { |
12038 | u32 adr, res; |
12039 | u32 src, dst; |
12040 | |
12041 | adr = AREG((Opcode >> 0) & 7) - 2; |
12042 | AREG((Opcode >> 0) & 7) = adr; |
12043 | PRE_IO |
12044 | READ_WORD_F(adr, res) |
12045 | flag_C = 0; |
12046 | flag_V = 0; |
12047 | flag_NotZ = res; |
12048 | flag_N = res >> 8; |
12049 | adr = AREG(7) - 2; |
12050 | AREG(7) = adr; |
12051 | WRITE_WORD_F(adr, res) |
12052 | POST_IO |
12053 | RET(14) |
12054 | } |
12055 | |
12056 | // MOVEW |
12057 | OPCODE(0x3028) |
12058 | { |
12059 | u32 adr, res; |
12060 | u32 src, dst; |
12061 | |
12062 | FETCH_SWORD(adr); |
12063 | adr += AREG((Opcode >> 0) & 7); |
12064 | PRE_IO |
12065 | READ_WORD_F(adr, res) |
12066 | flag_C = 0; |
12067 | flag_V = 0; |
12068 | flag_NotZ = res; |
12069 | flag_N = res >> 8; |
12070 | DREGu16((Opcode >> 9) & 7) = res; |
12071 | POST_IO |
12072 | RET(12) |
12073 | } |
12074 | |
12075 | // MOVEW |
12076 | OPCODE(0x30A8) |
12077 | { |
12078 | u32 adr, res; |
12079 | u32 src, dst; |
12080 | |
12081 | FETCH_SWORD(adr); |
12082 | adr += AREG((Opcode >> 0) & 7); |
12083 | PRE_IO |
12084 | READ_WORD_F(adr, res) |
12085 | flag_C = 0; |
12086 | flag_V = 0; |
12087 | flag_NotZ = res; |
12088 | flag_N = res >> 8; |
12089 | adr = AREG((Opcode >> 9) & 7); |
12090 | WRITE_WORD_F(adr, res) |
12091 | POST_IO |
12092 | RET(16) |
12093 | } |
12094 | |
12095 | // MOVEW |
12096 | OPCODE(0x30E8) |
12097 | { |
12098 | u32 adr, res; |
12099 | u32 src, dst; |
12100 | |
12101 | FETCH_SWORD(adr); |
12102 | adr += AREG((Opcode >> 0) & 7); |
12103 | PRE_IO |
12104 | READ_WORD_F(adr, res) |
12105 | flag_C = 0; |
12106 | flag_V = 0; |
12107 | flag_NotZ = res; |
12108 | flag_N = res >> 8; |
12109 | adr = AREG((Opcode >> 9) & 7); |
12110 | AREG((Opcode >> 9) & 7) += 2; |
12111 | WRITE_WORD_F(adr, res) |
12112 | POST_IO |
12113 | RET(16) |
12114 | } |
12115 | |
12116 | // MOVEW |
12117 | OPCODE(0x3128) |
12118 | { |
12119 | u32 adr, res; |
12120 | u32 src, dst; |
12121 | |
12122 | FETCH_SWORD(adr); |
12123 | adr += AREG((Opcode >> 0) & 7); |
12124 | PRE_IO |
12125 | READ_WORD_F(adr, res) |
12126 | flag_C = 0; |
12127 | flag_V = 0; |
12128 | flag_NotZ = res; |
12129 | flag_N = res >> 8; |
12130 | adr = AREG((Opcode >> 9) & 7) - 2; |
12131 | AREG((Opcode >> 9) & 7) = adr; |
12132 | WRITE_WORD_F(adr, res) |
12133 | POST_IO |
12134 | RET(16) |
12135 | } |
12136 | |
12137 | // MOVEW |
12138 | OPCODE(0x3168) |
12139 | { |
12140 | u32 adr, res; |
12141 | u32 src, dst; |
12142 | |
12143 | FETCH_SWORD(adr); |
12144 | adr += AREG((Opcode >> 0) & 7); |
12145 | PRE_IO |
12146 | READ_WORD_F(adr, res) |
12147 | flag_C = 0; |
12148 | flag_V = 0; |
12149 | flag_NotZ = res; |
12150 | flag_N = res >> 8; |
12151 | FETCH_SWORD(adr); |
12152 | adr += AREG((Opcode >> 9) & 7); |
12153 | WRITE_WORD_F(adr, res) |
12154 | POST_IO |
12155 | RET(20) |
12156 | } |
12157 | |
12158 | // MOVEW |
12159 | OPCODE(0x31A8) |
12160 | { |
12161 | u32 adr, res; |
12162 | u32 src, dst; |
12163 | |
12164 | FETCH_SWORD(adr); |
12165 | adr += AREG((Opcode >> 0) & 7); |
12166 | PRE_IO |
12167 | READ_WORD_F(adr, res) |
12168 | flag_C = 0; |
12169 | flag_V = 0; |
12170 | flag_NotZ = res; |
12171 | flag_N = res >> 8; |
12172 | adr = AREG((Opcode >> 9) & 7); |
12173 | DECODE_EXT_WORD |
12174 | WRITE_WORD_F(adr, res) |
12175 | POST_IO |
12176 | RET(22) |
12177 | } |
12178 | |
12179 | // MOVEW |
12180 | OPCODE(0x31E8) |
12181 | { |
12182 | u32 adr, res; |
12183 | u32 src, dst; |
12184 | |
12185 | FETCH_SWORD(adr); |
12186 | adr += AREG((Opcode >> 0) & 7); |
12187 | PRE_IO |
12188 | READ_WORD_F(adr, res) |
12189 | flag_C = 0; |
12190 | flag_V = 0; |
12191 | flag_NotZ = res; |
12192 | flag_N = res >> 8; |
12193 | FETCH_SWORD(adr); |
12194 | WRITE_WORD_F(adr, res) |
12195 | POST_IO |
12196 | RET(20) |
12197 | } |
12198 | |
12199 | // MOVEW |
12200 | OPCODE(0x33E8) |
12201 | { |
12202 | u32 adr, res; |
12203 | u32 src, dst; |
12204 | |
12205 | FETCH_SWORD(adr); |
12206 | adr += AREG((Opcode >> 0) & 7); |
12207 | PRE_IO |
12208 | READ_WORD_F(adr, res) |
12209 | flag_C = 0; |
12210 | flag_V = 0; |
12211 | flag_NotZ = res; |
12212 | flag_N = res >> 8; |
12213 | FETCH_LONG(adr); |
12214 | WRITE_WORD_F(adr, res) |
12215 | POST_IO |
12216 | RET(24) |
12217 | } |
12218 | |
12219 | // MOVEW |
12220 | OPCODE(0x3EE8) |
12221 | { |
12222 | u32 adr, res; |
12223 | u32 src, dst; |
12224 | |
12225 | FETCH_SWORD(adr); |
12226 | adr += AREG((Opcode >> 0) & 7); |
12227 | PRE_IO |
12228 | READ_WORD_F(adr, res) |
12229 | flag_C = 0; |
12230 | flag_V = 0; |
12231 | flag_NotZ = res; |
12232 | flag_N = res >> 8; |
12233 | adr = AREG(7); |
12234 | AREG(7) += 2; |
12235 | WRITE_WORD_F(adr, res) |
12236 | POST_IO |
12237 | RET(16) |
12238 | } |
12239 | |
12240 | // MOVEW |
12241 | OPCODE(0x3F28) |
12242 | { |
12243 | u32 adr, res; |
12244 | u32 src, dst; |
12245 | |
12246 | FETCH_SWORD(adr); |
12247 | adr += AREG((Opcode >> 0) & 7); |
12248 | PRE_IO |
12249 | READ_WORD_F(adr, res) |
12250 | flag_C = 0; |
12251 | flag_V = 0; |
12252 | flag_NotZ = res; |
12253 | flag_N = res >> 8; |
12254 | adr = AREG(7) - 2; |
12255 | AREG(7) = adr; |
12256 | WRITE_WORD_F(adr, res) |
12257 | POST_IO |
12258 | RET(16) |
12259 | } |
12260 | |
12261 | // MOVEW |
12262 | OPCODE(0x3030) |
12263 | { |
12264 | u32 adr, res; |
12265 | u32 src, dst; |
12266 | |
12267 | adr = AREG((Opcode >> 0) & 7); |
12268 | DECODE_EXT_WORD |
12269 | PRE_IO |
12270 | READ_WORD_F(adr, res) |
12271 | flag_C = 0; |
12272 | flag_V = 0; |
12273 | flag_NotZ = res; |
12274 | flag_N = res >> 8; |
12275 | DREGu16((Opcode >> 9) & 7) = res; |
12276 | POST_IO |
12277 | RET(14) |
12278 | } |
12279 | |
12280 | // MOVEW |
12281 | OPCODE(0x30B0) |
12282 | { |
12283 | u32 adr, res; |
12284 | u32 src, dst; |
12285 | |
12286 | adr = AREG((Opcode >> 0) & 7); |
12287 | DECODE_EXT_WORD |
12288 | PRE_IO |
12289 | READ_WORD_F(adr, res) |
12290 | flag_C = 0; |
12291 | flag_V = 0; |
12292 | flag_NotZ = res; |
12293 | flag_N = res >> 8; |
12294 | adr = AREG((Opcode >> 9) & 7); |
12295 | WRITE_WORD_F(adr, res) |
12296 | POST_IO |
12297 | RET(18) |
12298 | } |
12299 | |
12300 | // MOVEW |
12301 | OPCODE(0x30F0) |
12302 | { |
12303 | u32 adr, res; |
12304 | u32 src, dst; |
12305 | |
12306 | adr = AREG((Opcode >> 0) & 7); |
12307 | DECODE_EXT_WORD |
12308 | PRE_IO |
12309 | READ_WORD_F(adr, res) |
12310 | flag_C = 0; |
12311 | flag_V = 0; |
12312 | flag_NotZ = res; |
12313 | flag_N = res >> 8; |
12314 | adr = AREG((Opcode >> 9) & 7); |
12315 | AREG((Opcode >> 9) & 7) += 2; |
12316 | WRITE_WORD_F(adr, res) |
12317 | POST_IO |
12318 | RET(18) |
12319 | } |
12320 | |
12321 | // MOVEW |
12322 | OPCODE(0x3130) |
12323 | { |
12324 | u32 adr, res; |
12325 | u32 src, dst; |
12326 | |
12327 | adr = AREG((Opcode >> 0) & 7); |
12328 | DECODE_EXT_WORD |
12329 | PRE_IO |
12330 | READ_WORD_F(adr, res) |
12331 | flag_C = 0; |
12332 | flag_V = 0; |
12333 | flag_NotZ = res; |
12334 | flag_N = res >> 8; |
12335 | adr = AREG((Opcode >> 9) & 7) - 2; |
12336 | AREG((Opcode >> 9) & 7) = adr; |
12337 | WRITE_WORD_F(adr, res) |
12338 | POST_IO |
12339 | RET(18) |
12340 | } |
12341 | |
12342 | // MOVEW |
12343 | OPCODE(0x3170) |
12344 | { |
12345 | u32 adr, res; |
12346 | u32 src, dst; |
12347 | |
12348 | adr = AREG((Opcode >> 0) & 7); |
12349 | DECODE_EXT_WORD |
12350 | PRE_IO |
12351 | READ_WORD_F(adr, res) |
12352 | flag_C = 0; |
12353 | flag_V = 0; |
12354 | flag_NotZ = res; |
12355 | flag_N = res >> 8; |
12356 | FETCH_SWORD(adr); |
12357 | adr += AREG((Opcode >> 9) & 7); |
12358 | WRITE_WORD_F(adr, res) |
12359 | POST_IO |
12360 | RET(22) |
12361 | } |
12362 | |
12363 | // MOVEW |
12364 | OPCODE(0x31B0) |
12365 | { |
12366 | u32 adr, res; |
12367 | u32 src, dst; |
12368 | |
12369 | adr = AREG((Opcode >> 0) & 7); |
12370 | DECODE_EXT_WORD |
12371 | PRE_IO |
12372 | READ_WORD_F(adr, res) |
12373 | flag_C = 0; |
12374 | flag_V = 0; |
12375 | flag_NotZ = res; |
12376 | flag_N = res >> 8; |
12377 | adr = AREG((Opcode >> 9) & 7); |
12378 | DECODE_EXT_WORD |
12379 | WRITE_WORD_F(adr, res) |
12380 | POST_IO |
12381 | RET(24) |
12382 | } |
12383 | |
12384 | // MOVEW |
12385 | OPCODE(0x31F0) |
12386 | { |
12387 | u32 adr, res; |
12388 | u32 src, dst; |
12389 | |
12390 | adr = AREG((Opcode >> 0) & 7); |
12391 | DECODE_EXT_WORD |
12392 | PRE_IO |
12393 | READ_WORD_F(adr, res) |
12394 | flag_C = 0; |
12395 | flag_V = 0; |
12396 | flag_NotZ = res; |
12397 | flag_N = res >> 8; |
12398 | FETCH_SWORD(adr); |
12399 | WRITE_WORD_F(adr, res) |
12400 | POST_IO |
12401 | RET(22) |
12402 | } |
12403 | |
12404 | // MOVEW |
12405 | OPCODE(0x33F0) |
12406 | { |
12407 | u32 adr, res; |
12408 | u32 src, dst; |
12409 | |
12410 | adr = AREG((Opcode >> 0) & 7); |
12411 | DECODE_EXT_WORD |
12412 | PRE_IO |
12413 | READ_WORD_F(adr, res) |
12414 | flag_C = 0; |
12415 | flag_V = 0; |
12416 | flag_NotZ = res; |
12417 | flag_N = res >> 8; |
12418 | FETCH_LONG(adr); |
12419 | WRITE_WORD_F(adr, res) |
12420 | POST_IO |
12421 | RET(26) |
12422 | } |
12423 | |
12424 | // MOVEW |
12425 | OPCODE(0x3EF0) |
12426 | { |
12427 | u32 adr, res; |
12428 | u32 src, dst; |
12429 | |
12430 | adr = AREG((Opcode >> 0) & 7); |
12431 | DECODE_EXT_WORD |
12432 | PRE_IO |
12433 | READ_WORD_F(adr, res) |
12434 | flag_C = 0; |
12435 | flag_V = 0; |
12436 | flag_NotZ = res; |
12437 | flag_N = res >> 8; |
12438 | adr = AREG(7); |
12439 | AREG(7) += 2; |
12440 | WRITE_WORD_F(adr, res) |
12441 | POST_IO |
12442 | RET(18) |
12443 | } |
12444 | |
12445 | // MOVEW |
12446 | OPCODE(0x3F30) |
12447 | { |
12448 | u32 adr, res; |
12449 | u32 src, dst; |
12450 | |
12451 | adr = AREG((Opcode >> 0) & 7); |
12452 | DECODE_EXT_WORD |
12453 | PRE_IO |
12454 | READ_WORD_F(adr, res) |
12455 | flag_C = 0; |
12456 | flag_V = 0; |
12457 | flag_NotZ = res; |
12458 | flag_N = res >> 8; |
12459 | adr = AREG(7) - 2; |
12460 | AREG(7) = adr; |
12461 | WRITE_WORD_F(adr, res) |
12462 | POST_IO |
12463 | RET(18) |
12464 | } |
12465 | |
12466 | // MOVEW |
12467 | OPCODE(0x3038) |
12468 | { |
12469 | u32 adr, res; |
12470 | u32 src, dst; |
12471 | |
12472 | FETCH_SWORD(adr); |
12473 | PRE_IO |
12474 | READ_WORD_F(adr, res) |
12475 | flag_C = 0; |
12476 | flag_V = 0; |
12477 | flag_NotZ = res; |
12478 | flag_N = res >> 8; |
12479 | DREGu16((Opcode >> 9) & 7) = res; |
12480 | POST_IO |
12481 | RET(12) |
12482 | } |
12483 | |
12484 | // MOVEW |
12485 | OPCODE(0x30B8) |
12486 | { |
12487 | u32 adr, res; |
12488 | u32 src, dst; |
12489 | |
12490 | FETCH_SWORD(adr); |
12491 | PRE_IO |
12492 | READ_WORD_F(adr, res) |
12493 | flag_C = 0; |
12494 | flag_V = 0; |
12495 | flag_NotZ = res; |
12496 | flag_N = res >> 8; |
12497 | adr = AREG((Opcode >> 9) & 7); |
12498 | WRITE_WORD_F(adr, res) |
12499 | POST_IO |
12500 | RET(16) |
12501 | } |
12502 | |
12503 | // MOVEW |
12504 | OPCODE(0x30F8) |
12505 | { |
12506 | u32 adr, res; |
12507 | u32 src, dst; |
12508 | |
12509 | FETCH_SWORD(adr); |
12510 | PRE_IO |
12511 | READ_WORD_F(adr, res) |
12512 | flag_C = 0; |
12513 | flag_V = 0; |
12514 | flag_NotZ = res; |
12515 | flag_N = res >> 8; |
12516 | adr = AREG((Opcode >> 9) & 7); |
12517 | AREG((Opcode >> 9) & 7) += 2; |
12518 | WRITE_WORD_F(adr, res) |
12519 | POST_IO |
12520 | RET(16) |
12521 | } |
12522 | |
12523 | // MOVEW |
12524 | OPCODE(0x3138) |
12525 | { |
12526 | u32 adr, res; |
12527 | u32 src, dst; |
12528 | |
12529 | FETCH_SWORD(adr); |
12530 | PRE_IO |
12531 | READ_WORD_F(adr, res) |
12532 | flag_C = 0; |
12533 | flag_V = 0; |
12534 | flag_NotZ = res; |
12535 | flag_N = res >> 8; |
12536 | adr = AREG((Opcode >> 9) & 7) - 2; |
12537 | AREG((Opcode >> 9) & 7) = adr; |
12538 | WRITE_WORD_F(adr, res) |
12539 | POST_IO |
12540 | RET(16) |
12541 | } |
12542 | |
12543 | // MOVEW |
12544 | OPCODE(0x3178) |
12545 | { |
12546 | u32 adr, res; |
12547 | u32 src, dst; |
12548 | |
12549 | FETCH_SWORD(adr); |
12550 | PRE_IO |
12551 | READ_WORD_F(adr, res) |
12552 | flag_C = 0; |
12553 | flag_V = 0; |
12554 | flag_NotZ = res; |
12555 | flag_N = res >> 8; |
12556 | FETCH_SWORD(adr); |
12557 | adr += AREG((Opcode >> 9) & 7); |
12558 | WRITE_WORD_F(adr, res) |
12559 | POST_IO |
12560 | RET(20) |
12561 | } |
12562 | |
12563 | // MOVEW |
12564 | OPCODE(0x31B8) |
12565 | { |
12566 | u32 adr, res; |
12567 | u32 src, dst; |
12568 | |
12569 | FETCH_SWORD(adr); |
12570 | PRE_IO |
12571 | READ_WORD_F(adr, res) |
12572 | flag_C = 0; |
12573 | flag_V = 0; |
12574 | flag_NotZ = res; |
12575 | flag_N = res >> 8; |
12576 | adr = AREG((Opcode >> 9) & 7); |
12577 | DECODE_EXT_WORD |
12578 | WRITE_WORD_F(adr, res) |
12579 | POST_IO |
12580 | RET(22) |
12581 | } |
12582 | |
12583 | // MOVEW |
12584 | OPCODE(0x31F8) |
12585 | { |
12586 | u32 adr, res; |
12587 | u32 src, dst; |
12588 | |
12589 | FETCH_SWORD(adr); |
12590 | PRE_IO |
12591 | READ_WORD_F(adr, res) |
12592 | flag_C = 0; |
12593 | flag_V = 0; |
12594 | flag_NotZ = res; |
12595 | flag_N = res >> 8; |
12596 | FETCH_SWORD(adr); |
12597 | WRITE_WORD_F(adr, res) |
12598 | POST_IO |
12599 | RET(20) |
12600 | } |
12601 | |
12602 | // MOVEW |
12603 | OPCODE(0x33F8) |
12604 | { |
12605 | u32 adr, res; |
12606 | u32 src, dst; |
12607 | |
12608 | FETCH_SWORD(adr); |
12609 | PRE_IO |
12610 | READ_WORD_F(adr, res) |
12611 | flag_C = 0; |
12612 | flag_V = 0; |
12613 | flag_NotZ = res; |
12614 | flag_N = res >> 8; |
12615 | FETCH_LONG(adr); |
12616 | WRITE_WORD_F(adr, res) |
12617 | POST_IO |
12618 | RET(24) |
12619 | } |
12620 | |
12621 | // MOVEW |
12622 | OPCODE(0x3EF8) |
12623 | { |
12624 | u32 adr, res; |
12625 | u32 src, dst; |
12626 | |
12627 | FETCH_SWORD(adr); |
12628 | PRE_IO |
12629 | READ_WORD_F(adr, res) |
12630 | flag_C = 0; |
12631 | flag_V = 0; |
12632 | flag_NotZ = res; |
12633 | flag_N = res >> 8; |
12634 | adr = AREG(7); |
12635 | AREG(7) += 2; |
12636 | WRITE_WORD_F(adr, res) |
12637 | POST_IO |
12638 | RET(16) |
12639 | } |
12640 | |
12641 | // MOVEW |
12642 | OPCODE(0x3F38) |
12643 | { |
12644 | u32 adr, res; |
12645 | u32 src, dst; |
12646 | |
12647 | FETCH_SWORD(adr); |
12648 | PRE_IO |
12649 | READ_WORD_F(adr, res) |
12650 | flag_C = 0; |
12651 | flag_V = 0; |
12652 | flag_NotZ = res; |
12653 | flag_N = res >> 8; |
12654 | adr = AREG(7) - 2; |
12655 | AREG(7) = adr; |
12656 | WRITE_WORD_F(adr, res) |
12657 | POST_IO |
12658 | RET(16) |
12659 | } |
12660 | |
12661 | // MOVEW |
12662 | OPCODE(0x3039) |
12663 | { |
12664 | u32 adr, res; |
12665 | u32 src, dst; |
12666 | |
12667 | FETCH_LONG(adr); |
12668 | PRE_IO |
12669 | READ_WORD_F(adr, res) |
12670 | flag_C = 0; |
12671 | flag_V = 0; |
12672 | flag_NotZ = res; |
12673 | flag_N = res >> 8; |
12674 | DREGu16((Opcode >> 9) & 7) = res; |
12675 | POST_IO |
12676 | RET(16) |
12677 | } |
12678 | |
12679 | // MOVEW |
12680 | OPCODE(0x30B9) |
12681 | { |
12682 | u32 adr, res; |
12683 | u32 src, dst; |
12684 | |
12685 | FETCH_LONG(adr); |
12686 | PRE_IO |
12687 | READ_WORD_F(adr, res) |
12688 | flag_C = 0; |
12689 | flag_V = 0; |
12690 | flag_NotZ = res; |
12691 | flag_N = res >> 8; |
12692 | adr = AREG((Opcode >> 9) & 7); |
12693 | WRITE_WORD_F(adr, res) |
12694 | POST_IO |
12695 | RET(20) |
12696 | } |
12697 | |
12698 | // MOVEW |
12699 | OPCODE(0x30F9) |
12700 | { |
12701 | u32 adr, res; |
12702 | u32 src, dst; |
12703 | |
12704 | FETCH_LONG(adr); |
12705 | PRE_IO |
12706 | READ_WORD_F(adr, res) |
12707 | flag_C = 0; |
12708 | flag_V = 0; |
12709 | flag_NotZ = res; |
12710 | flag_N = res >> 8; |
12711 | adr = AREG((Opcode >> 9) & 7); |
12712 | AREG((Opcode >> 9) & 7) += 2; |
12713 | WRITE_WORD_F(adr, res) |
12714 | POST_IO |
12715 | RET(20) |
12716 | } |
12717 | |
12718 | // MOVEW |
12719 | OPCODE(0x3139) |
12720 | { |
12721 | u32 adr, res; |
12722 | u32 src, dst; |
12723 | |
12724 | FETCH_LONG(adr); |
12725 | PRE_IO |
12726 | READ_WORD_F(adr, res) |
12727 | flag_C = 0; |
12728 | flag_V = 0; |
12729 | flag_NotZ = res; |
12730 | flag_N = res >> 8; |
12731 | adr = AREG((Opcode >> 9) & 7) - 2; |
12732 | AREG((Opcode >> 9) & 7) = adr; |
12733 | WRITE_WORD_F(adr, res) |
12734 | POST_IO |
12735 | RET(20) |
12736 | } |
12737 | |
12738 | // MOVEW |
12739 | OPCODE(0x3179) |
12740 | { |
12741 | u32 adr, res; |
12742 | u32 src, dst; |
12743 | |
12744 | FETCH_LONG(adr); |
12745 | PRE_IO |
12746 | READ_WORD_F(adr, res) |
12747 | flag_C = 0; |
12748 | flag_V = 0; |
12749 | flag_NotZ = res; |
12750 | flag_N = res >> 8; |
12751 | FETCH_SWORD(adr); |
12752 | adr += AREG((Opcode >> 9) & 7); |
12753 | WRITE_WORD_F(adr, res) |
12754 | POST_IO |
12755 | RET(24) |
12756 | } |
12757 | |
12758 | // MOVEW |
12759 | OPCODE(0x31B9) |
12760 | { |
12761 | u32 adr, res; |
12762 | u32 src, dst; |
12763 | |
12764 | FETCH_LONG(adr); |
12765 | PRE_IO |
12766 | READ_WORD_F(adr, res) |
12767 | flag_C = 0; |
12768 | flag_V = 0; |
12769 | flag_NotZ = res; |
12770 | flag_N = res >> 8; |
12771 | adr = AREG((Opcode >> 9) & 7); |
12772 | DECODE_EXT_WORD |
12773 | WRITE_WORD_F(adr, res) |
12774 | POST_IO |
12775 | RET(26) |
12776 | } |
12777 | |
12778 | // MOVEW |
12779 | OPCODE(0x31F9) |
12780 | { |
12781 | u32 adr, res; |
12782 | u32 src, dst; |
12783 | |
12784 | FETCH_LONG(adr); |
12785 | PRE_IO |
12786 | READ_WORD_F(adr, res) |
12787 | flag_C = 0; |
12788 | flag_V = 0; |
12789 | flag_NotZ = res; |
12790 | flag_N = res >> 8; |
12791 | FETCH_SWORD(adr); |
12792 | WRITE_WORD_F(adr, res) |
12793 | POST_IO |
12794 | RET(24) |
12795 | } |
12796 | |
12797 | // MOVEW |
12798 | OPCODE(0x33F9) |
12799 | { |
12800 | u32 adr, res; |
12801 | u32 src, dst; |
12802 | |
12803 | FETCH_LONG(adr); |
12804 | PRE_IO |
12805 | READ_WORD_F(adr, res) |
12806 | flag_C = 0; |
12807 | flag_V = 0; |
12808 | flag_NotZ = res; |
12809 | flag_N = res >> 8; |
12810 | FETCH_LONG(adr); |
12811 | WRITE_WORD_F(adr, res) |
12812 | POST_IO |
12813 | RET(28) |
12814 | } |
12815 | |
12816 | // MOVEW |
12817 | OPCODE(0x3EF9) |
12818 | { |
12819 | u32 adr, res; |
12820 | u32 src, dst; |
12821 | |
12822 | FETCH_LONG(adr); |
12823 | PRE_IO |
12824 | READ_WORD_F(adr, res) |
12825 | flag_C = 0; |
12826 | flag_V = 0; |
12827 | flag_NotZ = res; |
12828 | flag_N = res >> 8; |
12829 | adr = AREG(7); |
12830 | AREG(7) += 2; |
12831 | WRITE_WORD_F(adr, res) |
12832 | POST_IO |
12833 | RET(20) |
12834 | } |
12835 | |
12836 | // MOVEW |
12837 | OPCODE(0x3F39) |
12838 | { |
12839 | u32 adr, res; |
12840 | u32 src, dst; |
12841 | |
12842 | FETCH_LONG(adr); |
12843 | PRE_IO |
12844 | READ_WORD_F(adr, res) |
12845 | flag_C = 0; |
12846 | flag_V = 0; |
12847 | flag_NotZ = res; |
12848 | flag_N = res >> 8; |
12849 | adr = AREG(7) - 2; |
12850 | AREG(7) = adr; |
12851 | WRITE_WORD_F(adr, res) |
12852 | POST_IO |
12853 | RET(20) |
12854 | } |
12855 | |
12856 | // MOVEW |
12857 | OPCODE(0x303A) |
12858 | { |
12859 | u32 adr, res; |
12860 | u32 src, dst; |
12861 | |
12862 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12863 | PC++; |
12864 | PRE_IO |
12865 | READ_WORD_F(adr, res) |
12866 | flag_C = 0; |
12867 | flag_V = 0; |
12868 | flag_NotZ = res; |
12869 | flag_N = res >> 8; |
12870 | DREGu16((Opcode >> 9) & 7) = res; |
12871 | POST_IO |
12872 | RET(12) |
12873 | } |
12874 | |
12875 | // MOVEW |
12876 | OPCODE(0x30BA) |
12877 | { |
12878 | u32 adr, res; |
12879 | u32 src, dst; |
12880 | |
12881 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12882 | PC++; |
12883 | PRE_IO |
12884 | READ_WORD_F(adr, res) |
12885 | flag_C = 0; |
12886 | flag_V = 0; |
12887 | flag_NotZ = res; |
12888 | flag_N = res >> 8; |
12889 | adr = AREG((Opcode >> 9) & 7); |
12890 | WRITE_WORD_F(adr, res) |
12891 | POST_IO |
12892 | RET(16) |
12893 | } |
12894 | |
12895 | // MOVEW |
12896 | OPCODE(0x30FA) |
12897 | { |
12898 | u32 adr, res; |
12899 | u32 src, dst; |
12900 | |
12901 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12902 | PC++; |
12903 | PRE_IO |
12904 | READ_WORD_F(adr, res) |
12905 | flag_C = 0; |
12906 | flag_V = 0; |
12907 | flag_NotZ = res; |
12908 | flag_N = res >> 8; |
12909 | adr = AREG((Opcode >> 9) & 7); |
12910 | AREG((Opcode >> 9) & 7) += 2; |
12911 | WRITE_WORD_F(adr, res) |
12912 | POST_IO |
12913 | RET(16) |
12914 | } |
12915 | |
12916 | // MOVEW |
12917 | OPCODE(0x313A) |
12918 | { |
12919 | u32 adr, res; |
12920 | u32 src, dst; |
12921 | |
12922 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12923 | PC++; |
12924 | PRE_IO |
12925 | READ_WORD_F(adr, res) |
12926 | flag_C = 0; |
12927 | flag_V = 0; |
12928 | flag_NotZ = res; |
12929 | flag_N = res >> 8; |
12930 | adr = AREG((Opcode >> 9) & 7) - 2; |
12931 | AREG((Opcode >> 9) & 7) = adr; |
12932 | WRITE_WORD_F(adr, res) |
12933 | POST_IO |
12934 | RET(16) |
12935 | } |
12936 | |
12937 | // MOVEW |
12938 | OPCODE(0x317A) |
12939 | { |
12940 | u32 adr, res; |
12941 | u32 src, dst; |
12942 | |
12943 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12944 | PC++; |
12945 | PRE_IO |
12946 | READ_WORD_F(adr, res) |
12947 | flag_C = 0; |
12948 | flag_V = 0; |
12949 | flag_NotZ = res; |
12950 | flag_N = res >> 8; |
12951 | FETCH_SWORD(adr); |
12952 | adr += AREG((Opcode >> 9) & 7); |
12953 | WRITE_WORD_F(adr, res) |
12954 | POST_IO |
12955 | RET(20) |
12956 | } |
12957 | |
12958 | // MOVEW |
12959 | OPCODE(0x31BA) |
12960 | { |
12961 | u32 adr, res; |
12962 | u32 src, dst; |
12963 | |
12964 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12965 | PC++; |
12966 | PRE_IO |
12967 | READ_WORD_F(adr, res) |
12968 | flag_C = 0; |
12969 | flag_V = 0; |
12970 | flag_NotZ = res; |
12971 | flag_N = res >> 8; |
12972 | adr = AREG((Opcode >> 9) & 7); |
12973 | DECODE_EXT_WORD |
12974 | WRITE_WORD_F(adr, res) |
12975 | POST_IO |
12976 | RET(22) |
12977 | } |
12978 | |
12979 | // MOVEW |
12980 | OPCODE(0x31FA) |
12981 | { |
12982 | u32 adr, res; |
12983 | u32 src, dst; |
12984 | |
12985 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12986 | PC++; |
12987 | PRE_IO |
12988 | READ_WORD_F(adr, res) |
12989 | flag_C = 0; |
12990 | flag_V = 0; |
12991 | flag_NotZ = res; |
12992 | flag_N = res >> 8; |
12993 | FETCH_SWORD(adr); |
12994 | WRITE_WORD_F(adr, res) |
12995 | POST_IO |
12996 | RET(20) |
12997 | } |
12998 | |
12999 | // MOVEW |
13000 | OPCODE(0x33FA) |
13001 | { |
13002 | u32 adr, res; |
13003 | u32 src, dst; |
13004 | |
13005 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13006 | PC++; |
13007 | PRE_IO |
13008 | READ_WORD_F(adr, res) |
13009 | flag_C = 0; |
13010 | flag_V = 0; |
13011 | flag_NotZ = res; |
13012 | flag_N = res >> 8; |
13013 | FETCH_LONG(adr); |
13014 | WRITE_WORD_F(adr, res) |
13015 | POST_IO |
13016 | RET(24) |
13017 | } |
13018 | |
13019 | // MOVEW |
13020 | OPCODE(0x3EFA) |
13021 | { |
13022 | u32 adr, res; |
13023 | u32 src, dst; |
13024 | |
13025 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13026 | PC++; |
13027 | PRE_IO |
13028 | READ_WORD_F(adr, res) |
13029 | flag_C = 0; |
13030 | flag_V = 0; |
13031 | flag_NotZ = res; |
13032 | flag_N = res >> 8; |
13033 | adr = AREG(7); |
13034 | AREG(7) += 2; |
13035 | WRITE_WORD_F(adr, res) |
13036 | POST_IO |
13037 | RET(16) |
13038 | } |
13039 | |
13040 | // MOVEW |
13041 | OPCODE(0x3F3A) |
13042 | { |
13043 | u32 adr, res; |
13044 | u32 src, dst; |
13045 | |
13046 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13047 | PC++; |
13048 | PRE_IO |
13049 | READ_WORD_F(adr, res) |
13050 | flag_C = 0; |
13051 | flag_V = 0; |
13052 | flag_NotZ = res; |
13053 | flag_N = res >> 8; |
13054 | adr = AREG(7) - 2; |
13055 | AREG(7) = adr; |
13056 | WRITE_WORD_F(adr, res) |
13057 | POST_IO |
13058 | RET(16) |
13059 | } |
13060 | |
13061 | // MOVEW |
13062 | OPCODE(0x303B) |
13063 | { |
13064 | u32 adr, res; |
13065 | u32 src, dst; |
13066 | |
13067 | adr = (u32)(PC) - BasePC; |
13068 | DECODE_EXT_WORD |
13069 | PRE_IO |
13070 | READ_WORD_F(adr, res) |
13071 | flag_C = 0; |
13072 | flag_V = 0; |
13073 | flag_NotZ = res; |
13074 | flag_N = res >> 8; |
13075 | DREGu16((Opcode >> 9) & 7) = res; |
13076 | POST_IO |
13077 | RET(14) |
13078 | } |
13079 | |
13080 | // MOVEW |
13081 | OPCODE(0x30BB) |
13082 | { |
13083 | u32 adr, res; |
13084 | u32 src, dst; |
13085 | |
13086 | adr = (u32)(PC) - BasePC; |
13087 | DECODE_EXT_WORD |
13088 | PRE_IO |
13089 | READ_WORD_F(adr, res) |
13090 | flag_C = 0; |
13091 | flag_V = 0; |
13092 | flag_NotZ = res; |
13093 | flag_N = res >> 8; |
13094 | adr = AREG((Opcode >> 9) & 7); |
13095 | WRITE_WORD_F(adr, res) |
13096 | POST_IO |
13097 | RET(18) |
13098 | } |
13099 | |
13100 | // MOVEW |
13101 | OPCODE(0x30FB) |
13102 | { |
13103 | u32 adr, res; |
13104 | u32 src, dst; |
13105 | |
13106 | adr = (u32)(PC) - BasePC; |
13107 | DECODE_EXT_WORD |
13108 | PRE_IO |
13109 | READ_WORD_F(adr, res) |
13110 | flag_C = 0; |
13111 | flag_V = 0; |
13112 | flag_NotZ = res; |
13113 | flag_N = res >> 8; |
13114 | adr = AREG((Opcode >> 9) & 7); |
13115 | AREG((Opcode >> 9) & 7) += 2; |
13116 | WRITE_WORD_F(adr, res) |
13117 | POST_IO |
13118 | RET(18) |
13119 | } |
13120 | |
13121 | // MOVEW |
13122 | OPCODE(0x313B) |
13123 | { |
13124 | u32 adr, res; |
13125 | u32 src, dst; |
13126 | |
13127 | adr = (u32)(PC) - BasePC; |
13128 | DECODE_EXT_WORD |
13129 | PRE_IO |
13130 | READ_WORD_F(adr, res) |
13131 | flag_C = 0; |
13132 | flag_V = 0; |
13133 | flag_NotZ = res; |
13134 | flag_N = res >> 8; |
13135 | adr = AREG((Opcode >> 9) & 7) - 2; |
13136 | AREG((Opcode >> 9) & 7) = adr; |
13137 | WRITE_WORD_F(adr, res) |
13138 | POST_IO |
13139 | RET(18) |
13140 | } |
13141 | |
13142 | // MOVEW |
13143 | OPCODE(0x317B) |
13144 | { |
13145 | u32 adr, res; |
13146 | u32 src, dst; |
13147 | |
13148 | adr = (u32)(PC) - BasePC; |
13149 | DECODE_EXT_WORD |
13150 | PRE_IO |
13151 | READ_WORD_F(adr, res) |
13152 | flag_C = 0; |
13153 | flag_V = 0; |
13154 | flag_NotZ = res; |
13155 | flag_N = res >> 8; |
13156 | FETCH_SWORD(adr); |
13157 | adr += AREG((Opcode >> 9) & 7); |
13158 | WRITE_WORD_F(adr, res) |
13159 | POST_IO |
13160 | RET(22) |
13161 | } |
13162 | |
13163 | // MOVEW |
13164 | OPCODE(0x31BB) |
13165 | { |
13166 | u32 adr, res; |
13167 | u32 src, dst; |
13168 | |
13169 | adr = (u32)(PC) - BasePC; |
13170 | DECODE_EXT_WORD |
13171 | PRE_IO |
13172 | READ_WORD_F(adr, res) |
13173 | flag_C = 0; |
13174 | flag_V = 0; |
13175 | flag_NotZ = res; |
13176 | flag_N = res >> 8; |
13177 | adr = AREG((Opcode >> 9) & 7); |
13178 | DECODE_EXT_WORD |
13179 | WRITE_WORD_F(adr, res) |
13180 | POST_IO |
13181 | RET(24) |
13182 | } |
13183 | |
13184 | // MOVEW |
13185 | OPCODE(0x31FB) |
13186 | { |
13187 | u32 adr, res; |
13188 | u32 src, dst; |
13189 | |
13190 | adr = (u32)(PC) - BasePC; |
13191 | DECODE_EXT_WORD |
13192 | PRE_IO |
13193 | READ_WORD_F(adr, res) |
13194 | flag_C = 0; |
13195 | flag_V = 0; |
13196 | flag_NotZ = res; |
13197 | flag_N = res >> 8; |
13198 | FETCH_SWORD(adr); |
13199 | WRITE_WORD_F(adr, res) |
13200 | POST_IO |
13201 | RET(22) |
13202 | } |
13203 | |
13204 | // MOVEW |
13205 | OPCODE(0x33FB) |
13206 | { |
13207 | u32 adr, res; |
13208 | u32 src, dst; |
13209 | |
13210 | adr = (u32)(PC) - BasePC; |
13211 | DECODE_EXT_WORD |
13212 | PRE_IO |
13213 | READ_WORD_F(adr, res) |
13214 | flag_C = 0; |
13215 | flag_V = 0; |
13216 | flag_NotZ = res; |
13217 | flag_N = res >> 8; |
13218 | FETCH_LONG(adr); |
13219 | WRITE_WORD_F(adr, res) |
13220 | POST_IO |
13221 | RET(26) |
13222 | } |
13223 | |
13224 | // MOVEW |
13225 | OPCODE(0x3EFB) |
13226 | { |
13227 | u32 adr, res; |
13228 | u32 src, dst; |
13229 | |
13230 | adr = (u32)(PC) - BasePC; |
13231 | DECODE_EXT_WORD |
13232 | PRE_IO |
13233 | READ_WORD_F(adr, res) |
13234 | flag_C = 0; |
13235 | flag_V = 0; |
13236 | flag_NotZ = res; |
13237 | flag_N = res >> 8; |
13238 | adr = AREG(7); |
13239 | AREG(7) += 2; |
13240 | WRITE_WORD_F(adr, res) |
13241 | POST_IO |
13242 | RET(18) |
13243 | } |
13244 | |
13245 | // MOVEW |
13246 | OPCODE(0x3F3B) |
13247 | { |
13248 | u32 adr, res; |
13249 | u32 src, dst; |
13250 | |
13251 | adr = (u32)(PC) - BasePC; |
13252 | DECODE_EXT_WORD |
13253 | PRE_IO |
13254 | READ_WORD_F(adr, res) |
13255 | flag_C = 0; |
13256 | flag_V = 0; |
13257 | flag_NotZ = res; |
13258 | flag_N = res >> 8; |
13259 | adr = AREG(7) - 2; |
13260 | AREG(7) = adr; |
13261 | WRITE_WORD_F(adr, res) |
13262 | POST_IO |
13263 | RET(18) |
13264 | } |
13265 | |
13266 | // MOVEW |
13267 | OPCODE(0x303C) |
13268 | { |
13269 | u32 adr, res; |
13270 | u32 src, dst; |
13271 | |
13272 | FETCH_WORD(res); |
13273 | flag_C = 0; |
13274 | flag_V = 0; |
13275 | flag_NotZ = res; |
13276 | flag_N = res >> 8; |
13277 | DREGu16((Opcode >> 9) & 7) = res; |
13278 | RET(8) |
13279 | } |
13280 | |
13281 | // MOVEW |
13282 | OPCODE(0x30BC) |
13283 | { |
13284 | u32 adr, res; |
13285 | u32 src, dst; |
13286 | |
13287 | FETCH_WORD(res); |
13288 | flag_C = 0; |
13289 | flag_V = 0; |
13290 | flag_NotZ = res; |
13291 | flag_N = res >> 8; |
13292 | adr = AREG((Opcode >> 9) & 7); |
13293 | PRE_IO |
13294 | WRITE_WORD_F(adr, res) |
13295 | POST_IO |
13296 | RET(12) |
13297 | } |
13298 | |
13299 | // MOVEW |
13300 | OPCODE(0x30FC) |
13301 | { |
13302 | u32 adr, res; |
13303 | u32 src, dst; |
13304 | |
13305 | FETCH_WORD(res); |
13306 | flag_C = 0; |
13307 | flag_V = 0; |
13308 | flag_NotZ = res; |
13309 | flag_N = res >> 8; |
13310 | adr = AREG((Opcode >> 9) & 7); |
13311 | AREG((Opcode >> 9) & 7) += 2; |
13312 | PRE_IO |
13313 | WRITE_WORD_F(adr, res) |
13314 | POST_IO |
13315 | RET(12) |
13316 | } |
13317 | |
13318 | // MOVEW |
13319 | OPCODE(0x313C) |
13320 | { |
13321 | u32 adr, res; |
13322 | u32 src, dst; |
13323 | |
13324 | FETCH_WORD(res); |
13325 | flag_C = 0; |
13326 | flag_V = 0; |
13327 | flag_NotZ = res; |
13328 | flag_N = res >> 8; |
13329 | adr = AREG((Opcode >> 9) & 7) - 2; |
13330 | AREG((Opcode >> 9) & 7) = adr; |
13331 | PRE_IO |
13332 | WRITE_WORD_F(adr, res) |
13333 | POST_IO |
13334 | RET(12) |
13335 | } |
13336 | |
13337 | // MOVEW |
13338 | OPCODE(0x317C) |
13339 | { |
13340 | u32 adr, res; |
13341 | u32 src, dst; |
13342 | |
13343 | FETCH_WORD(res); |
13344 | flag_C = 0; |
13345 | flag_V = 0; |
13346 | flag_NotZ = res; |
13347 | flag_N = res >> 8; |
13348 | FETCH_SWORD(adr); |
13349 | adr += AREG((Opcode >> 9) & 7); |
13350 | PRE_IO |
13351 | WRITE_WORD_F(adr, res) |
13352 | POST_IO |
13353 | RET(16) |
13354 | } |
13355 | |
13356 | // MOVEW |
13357 | OPCODE(0x31BC) |
13358 | { |
13359 | u32 adr, res; |
13360 | u32 src, dst; |
13361 | |
13362 | FETCH_WORD(res); |
13363 | flag_C = 0; |
13364 | flag_V = 0; |
13365 | flag_NotZ = res; |
13366 | flag_N = res >> 8; |
13367 | adr = AREG((Opcode >> 9) & 7); |
13368 | DECODE_EXT_WORD |
13369 | PRE_IO |
13370 | WRITE_WORD_F(adr, res) |
13371 | POST_IO |
13372 | RET(18) |
13373 | } |
13374 | |
13375 | // MOVEW |
13376 | OPCODE(0x31FC) |
13377 | { |
13378 | u32 adr, res; |
13379 | u32 src, dst; |
13380 | |
13381 | FETCH_WORD(res); |
13382 | flag_C = 0; |
13383 | flag_V = 0; |
13384 | flag_NotZ = res; |
13385 | flag_N = res >> 8; |
13386 | FETCH_SWORD(adr); |
13387 | PRE_IO |
13388 | WRITE_WORD_F(adr, res) |
13389 | POST_IO |
13390 | RET(16) |
13391 | } |
13392 | |
13393 | // MOVEW |
13394 | OPCODE(0x33FC) |
13395 | { |
13396 | u32 adr, res; |
13397 | u32 src, dst; |
13398 | |
13399 | FETCH_WORD(res); |
13400 | flag_C = 0; |
13401 | flag_V = 0; |
13402 | flag_NotZ = res; |
13403 | flag_N = res >> 8; |
13404 | FETCH_LONG(adr); |
13405 | PRE_IO |
13406 | WRITE_WORD_F(adr, res) |
13407 | POST_IO |
13408 | RET(20) |
13409 | } |
13410 | |
13411 | // MOVEW |
13412 | OPCODE(0x3EFC) |
13413 | { |
13414 | u32 adr, res; |
13415 | u32 src, dst; |
13416 | |
13417 | FETCH_WORD(res); |
13418 | flag_C = 0; |
13419 | flag_V = 0; |
13420 | flag_NotZ = res; |
13421 | flag_N = res >> 8; |
13422 | adr = AREG(7); |
13423 | AREG(7) += 2; |
13424 | PRE_IO |
13425 | WRITE_WORD_F(adr, res) |
13426 | POST_IO |
13427 | RET(12) |
13428 | } |
13429 | |
13430 | // MOVEW |
13431 | OPCODE(0x3F3C) |
13432 | { |
13433 | u32 adr, res; |
13434 | u32 src, dst; |
13435 | |
13436 | FETCH_WORD(res); |
13437 | flag_C = 0; |
13438 | flag_V = 0; |
13439 | flag_NotZ = res; |
13440 | flag_N = res >> 8; |
13441 | adr = AREG(7) - 2; |
13442 | AREG(7) = adr; |
13443 | PRE_IO |
13444 | WRITE_WORD_F(adr, res) |
13445 | POST_IO |
13446 | RET(12) |
13447 | } |
13448 | |
13449 | // MOVEW |
13450 | OPCODE(0x301F) |
13451 | { |
13452 | u32 adr, res; |
13453 | u32 src, dst; |
13454 | |
13455 | adr = AREG(7); |
13456 | AREG(7) += 2; |
13457 | PRE_IO |
13458 | READ_WORD_F(adr, res) |
13459 | flag_C = 0; |
13460 | flag_V = 0; |
13461 | flag_NotZ = res; |
13462 | flag_N = res >> 8; |
13463 | DREGu16((Opcode >> 9) & 7) = res; |
13464 | POST_IO |
13465 | RET(8) |
13466 | } |
13467 | |
13468 | // MOVEW |
13469 | OPCODE(0x309F) |
13470 | { |
13471 | u32 adr, res; |
13472 | u32 src, dst; |
13473 | |
13474 | adr = AREG(7); |
13475 | AREG(7) += 2; |
13476 | PRE_IO |
13477 | READ_WORD_F(adr, res) |
13478 | flag_C = 0; |
13479 | flag_V = 0; |
13480 | flag_NotZ = res; |
13481 | flag_N = res >> 8; |
13482 | adr = AREG((Opcode >> 9) & 7); |
13483 | WRITE_WORD_F(adr, res) |
13484 | POST_IO |
13485 | RET(12) |
13486 | } |
13487 | |
13488 | // MOVEW |
13489 | OPCODE(0x30DF) |
13490 | { |
13491 | u32 adr, res; |
13492 | u32 src, dst; |
13493 | |
13494 | adr = AREG(7); |
13495 | AREG(7) += 2; |
13496 | PRE_IO |
13497 | READ_WORD_F(adr, res) |
13498 | flag_C = 0; |
13499 | flag_V = 0; |
13500 | flag_NotZ = res; |
13501 | flag_N = res >> 8; |
13502 | adr = AREG((Opcode >> 9) & 7); |
13503 | AREG((Opcode >> 9) & 7) += 2; |
13504 | WRITE_WORD_F(adr, res) |
13505 | POST_IO |
13506 | RET(12) |
13507 | } |
13508 | |
13509 | // MOVEW |
13510 | OPCODE(0x311F) |
13511 | { |
13512 | u32 adr, res; |
13513 | u32 src, dst; |
13514 | |
13515 | adr = AREG(7); |
13516 | AREG(7) += 2; |
13517 | PRE_IO |
13518 | READ_WORD_F(adr, res) |
13519 | flag_C = 0; |
13520 | flag_V = 0; |
13521 | flag_NotZ = res; |
13522 | flag_N = res >> 8; |
13523 | adr = AREG((Opcode >> 9) & 7) - 2; |
13524 | AREG((Opcode >> 9) & 7) = adr; |
13525 | WRITE_WORD_F(adr, res) |
13526 | POST_IO |
13527 | RET(12) |
13528 | } |
13529 | |
13530 | // MOVEW |
13531 | OPCODE(0x315F) |
13532 | { |
13533 | u32 adr, res; |
13534 | u32 src, dst; |
13535 | |
13536 | adr = AREG(7); |
13537 | AREG(7) += 2; |
13538 | PRE_IO |
13539 | READ_WORD_F(adr, res) |
13540 | flag_C = 0; |
13541 | flag_V = 0; |
13542 | flag_NotZ = res; |
13543 | flag_N = res >> 8; |
13544 | FETCH_SWORD(adr); |
13545 | adr += AREG((Opcode >> 9) & 7); |
13546 | WRITE_WORD_F(adr, res) |
13547 | POST_IO |
13548 | RET(16) |
13549 | } |
13550 | |
13551 | // MOVEW |
13552 | OPCODE(0x319F) |
13553 | { |
13554 | u32 adr, res; |
13555 | u32 src, dst; |
13556 | |
13557 | adr = AREG(7); |
13558 | AREG(7) += 2; |
13559 | PRE_IO |
13560 | READ_WORD_F(adr, res) |
13561 | flag_C = 0; |
13562 | flag_V = 0; |
13563 | flag_NotZ = res; |
13564 | flag_N = res >> 8; |
13565 | adr = AREG((Opcode >> 9) & 7); |
13566 | DECODE_EXT_WORD |
13567 | WRITE_WORD_F(adr, res) |
13568 | POST_IO |
13569 | RET(18) |
13570 | } |
13571 | |
13572 | // MOVEW |
13573 | OPCODE(0x31DF) |
13574 | { |
13575 | u32 adr, res; |
13576 | u32 src, dst; |
13577 | |
13578 | adr = AREG(7); |
13579 | AREG(7) += 2; |
13580 | PRE_IO |
13581 | READ_WORD_F(adr, res) |
13582 | flag_C = 0; |
13583 | flag_V = 0; |
13584 | flag_NotZ = res; |
13585 | flag_N = res >> 8; |
13586 | FETCH_SWORD(adr); |
13587 | WRITE_WORD_F(adr, res) |
13588 | POST_IO |
13589 | RET(16) |
13590 | } |
13591 | |
13592 | // MOVEW |
13593 | OPCODE(0x33DF) |
13594 | { |
13595 | u32 adr, res; |
13596 | u32 src, dst; |
13597 | |
13598 | adr = AREG(7); |
13599 | AREG(7) += 2; |
13600 | PRE_IO |
13601 | READ_WORD_F(adr, res) |
13602 | flag_C = 0; |
13603 | flag_V = 0; |
13604 | flag_NotZ = res; |
13605 | flag_N = res >> 8; |
13606 | FETCH_LONG(adr); |
13607 | WRITE_WORD_F(adr, res) |
13608 | POST_IO |
13609 | RET(20) |
13610 | } |
13611 | |
13612 | // MOVEW |
13613 | OPCODE(0x3EDF) |
13614 | { |
13615 | u32 adr, res; |
13616 | u32 src, dst; |
13617 | |
13618 | adr = AREG(7); |
13619 | AREG(7) += 2; |
13620 | PRE_IO |
13621 | READ_WORD_F(adr, res) |
13622 | flag_C = 0; |
13623 | flag_V = 0; |
13624 | flag_NotZ = res; |
13625 | flag_N = res >> 8; |
13626 | adr = AREG(7); |
13627 | AREG(7) += 2; |
13628 | WRITE_WORD_F(adr, res) |
13629 | POST_IO |
13630 | RET(12) |
13631 | } |
13632 | |
13633 | // MOVEW |
13634 | OPCODE(0x3F1F) |
13635 | { |
13636 | u32 adr, res; |
13637 | u32 src, dst; |
13638 | |
13639 | adr = AREG(7); |
13640 | AREG(7) += 2; |
13641 | PRE_IO |
13642 | READ_WORD_F(adr, res) |
13643 | flag_C = 0; |
13644 | flag_V = 0; |
13645 | flag_NotZ = res; |
13646 | flag_N = res >> 8; |
13647 | adr = AREG(7) - 2; |
13648 | AREG(7) = adr; |
13649 | WRITE_WORD_F(adr, res) |
13650 | POST_IO |
13651 | RET(12) |
13652 | } |
13653 | |
13654 | // MOVEW |
13655 | OPCODE(0x3027) |
13656 | { |
13657 | u32 adr, res; |
13658 | u32 src, dst; |
13659 | |
13660 | adr = AREG(7) - 2; |
13661 | AREG(7) = adr; |
13662 | PRE_IO |
13663 | READ_WORD_F(adr, res) |
13664 | flag_C = 0; |
13665 | flag_V = 0; |
13666 | flag_NotZ = res; |
13667 | flag_N = res >> 8; |
13668 | DREGu16((Opcode >> 9) & 7) = res; |
13669 | POST_IO |
13670 | RET(10) |
13671 | } |
13672 | |
13673 | // MOVEW |
13674 | OPCODE(0x30A7) |
13675 | { |
13676 | u32 adr, res; |
13677 | u32 src, dst; |
13678 | |
13679 | adr = AREG(7) - 2; |
13680 | AREG(7) = adr; |
13681 | PRE_IO |
13682 | READ_WORD_F(adr, res) |
13683 | flag_C = 0; |
13684 | flag_V = 0; |
13685 | flag_NotZ = res; |
13686 | flag_N = res >> 8; |
13687 | adr = AREG((Opcode >> 9) & 7); |
13688 | WRITE_WORD_F(adr, res) |
13689 | POST_IO |
13690 | RET(14) |
13691 | } |
13692 | |
13693 | // MOVEW |
13694 | OPCODE(0x30E7) |
13695 | { |
13696 | u32 adr, res; |
13697 | u32 src, dst; |
13698 | |
13699 | adr = AREG(7) - 2; |
13700 | AREG(7) = adr; |
13701 | PRE_IO |
13702 | READ_WORD_F(adr, res) |
13703 | flag_C = 0; |
13704 | flag_V = 0; |
13705 | flag_NotZ = res; |
13706 | flag_N = res >> 8; |
13707 | adr = AREG((Opcode >> 9) & 7); |
13708 | AREG((Opcode >> 9) & 7) += 2; |
13709 | WRITE_WORD_F(adr, res) |
13710 | POST_IO |
13711 | RET(14) |
13712 | } |
13713 | |
13714 | // MOVEW |
13715 | OPCODE(0x3127) |
13716 | { |
13717 | u32 adr, res; |
13718 | u32 src, dst; |
13719 | |
13720 | adr = AREG(7) - 2; |
13721 | AREG(7) = adr; |
13722 | PRE_IO |
13723 | READ_WORD_F(adr, res) |
13724 | flag_C = 0; |
13725 | flag_V = 0; |
13726 | flag_NotZ = res; |
13727 | flag_N = res >> 8; |
13728 | adr = AREG((Opcode >> 9) & 7) - 2; |
13729 | AREG((Opcode >> 9) & 7) = adr; |
13730 | WRITE_WORD_F(adr, res) |
13731 | POST_IO |
13732 | RET(14) |
13733 | } |
13734 | |
13735 | // MOVEW |
13736 | OPCODE(0x3167) |
13737 | { |
13738 | u32 adr, res; |
13739 | u32 src, dst; |
13740 | |
13741 | adr = AREG(7) - 2; |
13742 | AREG(7) = adr; |
13743 | PRE_IO |
13744 | READ_WORD_F(adr, res) |
13745 | flag_C = 0; |
13746 | flag_V = 0; |
13747 | flag_NotZ = res; |
13748 | flag_N = res >> 8; |
13749 | FETCH_SWORD(adr); |
13750 | adr += AREG((Opcode >> 9) & 7); |
13751 | WRITE_WORD_F(adr, res) |
13752 | POST_IO |
13753 | RET(18) |
13754 | } |
13755 | |
13756 | // MOVEW |
13757 | OPCODE(0x31A7) |
13758 | { |
13759 | u32 adr, res; |
13760 | u32 src, dst; |
13761 | |
13762 | adr = AREG(7) - 2; |
13763 | AREG(7) = adr; |
13764 | PRE_IO |
13765 | READ_WORD_F(adr, res) |
13766 | flag_C = 0; |
13767 | flag_V = 0; |
13768 | flag_NotZ = res; |
13769 | flag_N = res >> 8; |
13770 | adr = AREG((Opcode >> 9) & 7); |
13771 | DECODE_EXT_WORD |
13772 | WRITE_WORD_F(adr, res) |
13773 | POST_IO |
13774 | RET(20) |
13775 | } |
13776 | |
13777 | // MOVEW |
13778 | OPCODE(0x31E7) |
13779 | { |
13780 | u32 adr, res; |
13781 | u32 src, dst; |
13782 | |
13783 | adr = AREG(7) - 2; |
13784 | AREG(7) = adr; |
13785 | PRE_IO |
13786 | READ_WORD_F(adr, res) |
13787 | flag_C = 0; |
13788 | flag_V = 0; |
13789 | flag_NotZ = res; |
13790 | flag_N = res >> 8; |
13791 | FETCH_SWORD(adr); |
13792 | WRITE_WORD_F(adr, res) |
13793 | POST_IO |
13794 | RET(18) |
13795 | } |
13796 | |
13797 | // MOVEW |
13798 | OPCODE(0x33E7) |
13799 | { |
13800 | u32 adr, res; |
13801 | u32 src, dst; |
13802 | |
13803 | adr = AREG(7) - 2; |
13804 | AREG(7) = adr; |
13805 | PRE_IO |
13806 | READ_WORD_F(adr, res) |
13807 | flag_C = 0; |
13808 | flag_V = 0; |
13809 | flag_NotZ = res; |
13810 | flag_N = res >> 8; |
13811 | FETCH_LONG(adr); |
13812 | WRITE_WORD_F(adr, res) |
13813 | POST_IO |
13814 | RET(22) |
13815 | } |
13816 | |
13817 | // MOVEW |
13818 | OPCODE(0x3EE7) |
13819 | { |
13820 | u32 adr, res; |
13821 | u32 src, dst; |
13822 | |
13823 | adr = AREG(7) - 2; |
13824 | AREG(7) = adr; |
13825 | PRE_IO |
13826 | READ_WORD_F(adr, res) |
13827 | flag_C = 0; |
13828 | flag_V = 0; |
13829 | flag_NotZ = res; |
13830 | flag_N = res >> 8; |
13831 | adr = AREG(7); |
13832 | AREG(7) += 2; |
13833 | WRITE_WORD_F(adr, res) |
13834 | POST_IO |
13835 | RET(14) |
13836 | } |
13837 | |
13838 | // MOVEW |
13839 | OPCODE(0x3F27) |
13840 | { |
13841 | u32 adr, res; |
13842 | u32 src, dst; |
13843 | |
13844 | adr = AREG(7) - 2; |
13845 | AREG(7) = adr; |
13846 | PRE_IO |
13847 | READ_WORD_F(adr, res) |
13848 | flag_C = 0; |
13849 | flag_V = 0; |
13850 | flag_NotZ = res; |
13851 | flag_N = res >> 8; |
13852 | adr = AREG(7) - 2; |
13853 | AREG(7) = adr; |
13854 | WRITE_WORD_F(adr, res) |
13855 | POST_IO |
13856 | RET(14) |
13857 | } |
13858 | |
13859 | // MOVEAW |
13860 | OPCODE(0x3040) |
13861 | { |
13862 | u32 adr, res; |
13863 | u32 src, dst; |
13864 | |
13865 | res = (s32)DREGs16((Opcode >> 0) & 7); |
13866 | AREG((Opcode >> 9) & 7) = res; |
13867 | RET(4) |
13868 | } |
13869 | |
13870 | // MOVEAW |
13871 | OPCODE(0x3048) |
13872 | { |
13873 | u32 adr, res; |
13874 | u32 src, dst; |
13875 | |
13876 | res = (s32)AREGs16((Opcode >> 0) & 7); |
13877 | AREG((Opcode >> 9) & 7) = res; |
13878 | RET(4) |
13879 | } |
13880 | |
13881 | // MOVEAW |
13882 | OPCODE(0x3050) |
13883 | { |
13884 | u32 adr, res; |
13885 | u32 src, dst; |
13886 | |
13887 | adr = AREG((Opcode >> 0) & 7); |
13888 | PRE_IO |
13889 | READSX_WORD_F(adr, res) |
13890 | AREG((Opcode >> 9) & 7) = res; |
13891 | POST_IO |
13892 | RET(8) |
13893 | } |
13894 | |
13895 | // MOVEAW |
13896 | OPCODE(0x3058) |
13897 | { |
13898 | u32 adr, res; |
13899 | u32 src, dst; |
13900 | |
13901 | adr = AREG((Opcode >> 0) & 7); |
13902 | AREG((Opcode >> 0) & 7) += 2; |
13903 | PRE_IO |
13904 | READSX_WORD_F(adr, res) |
13905 | AREG((Opcode >> 9) & 7) = res; |
13906 | POST_IO |
13907 | RET(8) |
13908 | } |
13909 | |
13910 | // MOVEAW |
13911 | OPCODE(0x3060) |
13912 | { |
13913 | u32 adr, res; |
13914 | u32 src, dst; |
13915 | |
13916 | adr = AREG((Opcode >> 0) & 7) - 2; |
13917 | AREG((Opcode >> 0) & 7) = adr; |
13918 | PRE_IO |
13919 | READSX_WORD_F(adr, res) |
13920 | AREG((Opcode >> 9) & 7) = res; |
13921 | POST_IO |
13922 | RET(10) |
13923 | } |
13924 | |
13925 | // MOVEAW |
13926 | OPCODE(0x3068) |
13927 | { |
13928 | u32 adr, res; |
13929 | u32 src, dst; |
13930 | |
13931 | FETCH_SWORD(adr); |
13932 | adr += AREG((Opcode >> 0) & 7); |
13933 | PRE_IO |
13934 | READSX_WORD_F(adr, res) |
13935 | AREG((Opcode >> 9) & 7) = res; |
13936 | POST_IO |
13937 | RET(12) |
13938 | } |
13939 | |
13940 | // MOVEAW |
13941 | OPCODE(0x3070) |
13942 | { |
13943 | u32 adr, res; |
13944 | u32 src, dst; |
13945 | |
13946 | adr = AREG((Opcode >> 0) & 7); |
13947 | DECODE_EXT_WORD |
13948 | PRE_IO |
13949 | READSX_WORD_F(adr, res) |
13950 | AREG((Opcode >> 9) & 7) = res; |
13951 | POST_IO |
13952 | RET(14) |
13953 | } |
13954 | |
13955 | // MOVEAW |
13956 | OPCODE(0x3078) |
13957 | { |
13958 | u32 adr, res; |
13959 | u32 src, dst; |
13960 | |
13961 | FETCH_SWORD(adr); |
13962 | PRE_IO |
13963 | READSX_WORD_F(adr, res) |
13964 | AREG((Opcode >> 9) & 7) = res; |
13965 | POST_IO |
13966 | RET(12) |
13967 | } |
13968 | |
13969 | // MOVEAW |
13970 | OPCODE(0x3079) |
13971 | { |
13972 | u32 adr, res; |
13973 | u32 src, dst; |
13974 | |
13975 | FETCH_LONG(adr); |
13976 | PRE_IO |
13977 | READSX_WORD_F(adr, res) |
13978 | AREG((Opcode >> 9) & 7) = res; |
13979 | POST_IO |
13980 | RET(16) |
13981 | } |
13982 | |
13983 | // MOVEAW |
13984 | OPCODE(0x307A) |
13985 | { |
13986 | u32 adr, res; |
13987 | u32 src, dst; |
13988 | |
13989 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13990 | PC++; |
13991 | PRE_IO |
13992 | READSX_WORD_F(adr, res) |
13993 | AREG((Opcode >> 9) & 7) = res; |
13994 | POST_IO |
13995 | RET(12) |
13996 | } |
13997 | |
13998 | // MOVEAW |
13999 | OPCODE(0x307B) |
14000 | { |
14001 | u32 adr, res; |
14002 | u32 src, dst; |
14003 | |
14004 | adr = (u32)(PC) - BasePC; |
14005 | DECODE_EXT_WORD |
14006 | PRE_IO |
14007 | READSX_WORD_F(adr, res) |
14008 | AREG((Opcode >> 9) & 7) = res; |
14009 | POST_IO |
14010 | RET(14) |
14011 | } |
14012 | |
14013 | // MOVEAW |
14014 | OPCODE(0x307C) |
14015 | { |
14016 | u32 adr, res; |
14017 | u32 src, dst; |
14018 | |
14019 | FETCH_SWORD(res); |
14020 | AREG((Opcode >> 9) & 7) = res; |
14021 | RET(8) |
14022 | } |
14023 | |
14024 | // MOVEAW |
14025 | OPCODE(0x305F) |
14026 | { |
14027 | u32 adr, res; |
14028 | u32 src, dst; |
14029 | |
14030 | adr = AREG(7); |
14031 | AREG(7) += 2; |
14032 | PRE_IO |
14033 | READSX_WORD_F(adr, res) |
14034 | AREG((Opcode >> 9) & 7) = res; |
14035 | POST_IO |
14036 | RET(8) |
14037 | } |
14038 | |
14039 | // MOVEAW |
14040 | OPCODE(0x3067) |
14041 | { |
14042 | u32 adr, res; |
14043 | u32 src, dst; |
14044 | |
14045 | adr = AREG(7) - 2; |
14046 | AREG(7) = adr; |
14047 | PRE_IO |
14048 | READSX_WORD_F(adr, res) |
14049 | AREG((Opcode >> 9) & 7) = res; |
14050 | POST_IO |
14051 | RET(10) |
14052 | } |
14053 | |
14054 | // NEGX |
14055 | OPCODE(0x4000) |
14056 | { |
14057 | u32 adr, res; |
14058 | u32 src, dst; |
14059 | |
14060 | src = DREGu8((Opcode >> 0) & 7); |
14061 | res = -src - ((flag_X >> 8) & 1); |
14062 | flag_V = res & src; |
14063 | flag_N = flag_X = flag_C = res; |
14064 | flag_NotZ |= res & 0xFF; |
14065 | DREGu8((Opcode >> 0) & 7) = res; |
14066 | RET(4) |
14067 | } |
14068 | |
14069 | // NEGX |
14070 | OPCODE(0x4010) |
14071 | { |
14072 | u32 adr, res; |
14073 | u32 src, dst; |
14074 | |
14075 | adr = AREG((Opcode >> 0) & 7); |
14076 | PRE_IO |
14077 | READ_BYTE_F(adr, src) |
14078 | res = -src - ((flag_X >> 8) & 1); |
14079 | flag_V = res & src; |
14080 | flag_N = flag_X = flag_C = res; |
14081 | flag_NotZ |= res & 0xFF; |
14082 | WRITE_BYTE_F(adr, res) |
14083 | POST_IO |
14084 | RET(12) |
14085 | } |
14086 | |
14087 | // NEGX |
14088 | OPCODE(0x4018) |
14089 | { |
14090 | u32 adr, res; |
14091 | u32 src, dst; |
14092 | |
14093 | adr = AREG((Opcode >> 0) & 7); |
14094 | AREG((Opcode >> 0) & 7) += 1; |
14095 | PRE_IO |
14096 | READ_BYTE_F(adr, src) |
14097 | res = -src - ((flag_X >> 8) & 1); |
14098 | flag_V = res & src; |
14099 | flag_N = flag_X = flag_C = res; |
14100 | flag_NotZ |= res & 0xFF; |
14101 | WRITE_BYTE_F(adr, res) |
14102 | POST_IO |
14103 | RET(12) |
14104 | } |
14105 | |
14106 | // NEGX |
14107 | OPCODE(0x4020) |
14108 | { |
14109 | u32 adr, res; |
14110 | u32 src, dst; |
14111 | |
14112 | adr = AREG((Opcode >> 0) & 7) - 1; |
14113 | AREG((Opcode >> 0) & 7) = adr; |
14114 | PRE_IO |
14115 | READ_BYTE_F(adr, src) |
14116 | res = -src - ((flag_X >> 8) & 1); |
14117 | flag_V = res & src; |
14118 | flag_N = flag_X = flag_C = res; |
14119 | flag_NotZ |= res & 0xFF; |
14120 | WRITE_BYTE_F(adr, res) |
14121 | POST_IO |
14122 | RET(14) |
14123 | } |
14124 | |
14125 | // NEGX |
14126 | OPCODE(0x4028) |
14127 | { |
14128 | u32 adr, res; |
14129 | u32 src, dst; |
14130 | |
14131 | FETCH_SWORD(adr); |
14132 | adr += AREG((Opcode >> 0) & 7); |
14133 | PRE_IO |
14134 | READ_BYTE_F(adr, src) |
14135 | res = -src - ((flag_X >> 8) & 1); |
14136 | flag_V = res & src; |
14137 | flag_N = flag_X = flag_C = res; |
14138 | flag_NotZ |= res & 0xFF; |
14139 | WRITE_BYTE_F(adr, res) |
14140 | POST_IO |
14141 | RET(16) |
14142 | } |
14143 | |
14144 | // NEGX |
14145 | OPCODE(0x4030) |
14146 | { |
14147 | u32 adr, res; |
14148 | u32 src, dst; |
14149 | |
14150 | adr = AREG((Opcode >> 0) & 7); |
14151 | DECODE_EXT_WORD |
14152 | PRE_IO |
14153 | READ_BYTE_F(adr, src) |
14154 | res = -src - ((flag_X >> 8) & 1); |
14155 | flag_V = res & src; |
14156 | flag_N = flag_X = flag_C = res; |
14157 | flag_NotZ |= res & 0xFF; |
14158 | WRITE_BYTE_F(adr, res) |
14159 | POST_IO |
14160 | RET(18) |
14161 | } |
14162 | |
14163 | // NEGX |
14164 | OPCODE(0x4038) |
14165 | { |
14166 | u32 adr, res; |
14167 | u32 src, dst; |
14168 | |
14169 | FETCH_SWORD(adr); |
14170 | PRE_IO |
14171 | READ_BYTE_F(adr, src) |
14172 | res = -src - ((flag_X >> 8) & 1); |
14173 | flag_V = res & src; |
14174 | flag_N = flag_X = flag_C = res; |
14175 | flag_NotZ |= res & 0xFF; |
14176 | WRITE_BYTE_F(adr, res) |
14177 | POST_IO |
14178 | RET(16) |
14179 | } |
14180 | |
14181 | // NEGX |
14182 | OPCODE(0x4039) |
14183 | { |
14184 | u32 adr, res; |
14185 | u32 src, dst; |
14186 | |
14187 | FETCH_LONG(adr); |
14188 | PRE_IO |
14189 | READ_BYTE_F(adr, src) |
14190 | res = -src - ((flag_X >> 8) & 1); |
14191 | flag_V = res & src; |
14192 | flag_N = flag_X = flag_C = res; |
14193 | flag_NotZ |= res & 0xFF; |
14194 | WRITE_BYTE_F(adr, res) |
14195 | POST_IO |
14196 | RET(20) |
14197 | } |
14198 | |
14199 | // NEGX |
14200 | OPCODE(0x401F) |
14201 | { |
14202 | u32 adr, res; |
14203 | u32 src, dst; |
14204 | |
14205 | adr = AREG(7); |
14206 | AREG(7) += 2; |
14207 | PRE_IO |
14208 | READ_BYTE_F(adr, src) |
14209 | res = -src - ((flag_X >> 8) & 1); |
14210 | flag_V = res & src; |
14211 | flag_N = flag_X = flag_C = res; |
14212 | flag_NotZ |= res & 0xFF; |
14213 | WRITE_BYTE_F(adr, res) |
14214 | POST_IO |
14215 | RET(12) |
14216 | } |
14217 | |
14218 | // NEGX |
14219 | OPCODE(0x4027) |
14220 | { |
14221 | u32 adr, res; |
14222 | u32 src, dst; |
14223 | |
14224 | adr = AREG(7) - 2; |
14225 | AREG(7) = adr; |
14226 | PRE_IO |
14227 | READ_BYTE_F(adr, src) |
14228 | res = -src - ((flag_X >> 8) & 1); |
14229 | flag_V = res & src; |
14230 | flag_N = flag_X = flag_C = res; |
14231 | flag_NotZ |= res & 0xFF; |
14232 | WRITE_BYTE_F(adr, res) |
14233 | POST_IO |
14234 | RET(14) |
14235 | } |
14236 | |
14237 | // NEGX |
14238 | OPCODE(0x4040) |
14239 | { |
14240 | u32 adr, res; |
14241 | u32 src, dst; |
14242 | |
14243 | src = DREGu16((Opcode >> 0) & 7); |
14244 | res = -src - ((flag_X >> 8) & 1); |
14245 | flag_V = (res & src) >> 8; |
14246 | flag_N = flag_X = flag_C = res >> 8; |
14247 | flag_NotZ |= res & 0xFFFF; |
14248 | DREGu16((Opcode >> 0) & 7) = res; |
14249 | RET(4) |
14250 | } |
14251 | |
14252 | // NEGX |
14253 | OPCODE(0x4050) |
14254 | { |
14255 | u32 adr, res; |
14256 | u32 src, dst; |
14257 | |
14258 | adr = AREG((Opcode >> 0) & 7); |
14259 | PRE_IO |
14260 | READ_WORD_F(adr, src) |
14261 | res = -src - ((flag_X >> 8) & 1); |
14262 | flag_V = (res & src) >> 8; |
14263 | flag_N = flag_X = flag_C = res >> 8; |
14264 | flag_NotZ |= res & 0xFFFF; |
14265 | WRITE_WORD_F(adr, res) |
14266 | POST_IO |
14267 | RET(12) |
14268 | } |
14269 | |
14270 | // NEGX |
14271 | OPCODE(0x4058) |
14272 | { |
14273 | u32 adr, res; |
14274 | u32 src, dst; |
14275 | |
14276 | adr = AREG((Opcode >> 0) & 7); |
14277 | AREG((Opcode >> 0) & 7) += 2; |
14278 | PRE_IO |
14279 | READ_WORD_F(adr, src) |
14280 | res = -src - ((flag_X >> 8) & 1); |
14281 | flag_V = (res & src) >> 8; |
14282 | flag_N = flag_X = flag_C = res >> 8; |
14283 | flag_NotZ |= res & 0xFFFF; |
14284 | WRITE_WORD_F(adr, res) |
14285 | POST_IO |
14286 | RET(12) |
14287 | } |
14288 | |
14289 | // NEGX |
14290 | OPCODE(0x4060) |
14291 | { |
14292 | u32 adr, res; |
14293 | u32 src, dst; |
14294 | |
14295 | adr = AREG((Opcode >> 0) & 7) - 2; |
14296 | AREG((Opcode >> 0) & 7) = adr; |
14297 | PRE_IO |
14298 | READ_WORD_F(adr, src) |
14299 | res = -src - ((flag_X >> 8) & 1); |
14300 | flag_V = (res & src) >> 8; |
14301 | flag_N = flag_X = flag_C = res >> 8; |
14302 | flag_NotZ |= res & 0xFFFF; |
14303 | WRITE_WORD_F(adr, res) |
14304 | POST_IO |
14305 | RET(14) |
14306 | } |
14307 | |
14308 | // NEGX |
14309 | OPCODE(0x4068) |
14310 | { |
14311 | u32 adr, res; |
14312 | u32 src, dst; |
14313 | |
14314 | FETCH_SWORD(adr); |
14315 | adr += AREG((Opcode >> 0) & 7); |
14316 | PRE_IO |
14317 | READ_WORD_F(adr, src) |
14318 | res = -src - ((flag_X >> 8) & 1); |
14319 | flag_V = (res & src) >> 8; |
14320 | flag_N = flag_X = flag_C = res >> 8; |
14321 | flag_NotZ |= res & 0xFFFF; |
14322 | WRITE_WORD_F(adr, res) |
14323 | POST_IO |
14324 | RET(16) |
14325 | } |
14326 | |
14327 | // NEGX |
14328 | OPCODE(0x4070) |
14329 | { |
14330 | u32 adr, res; |
14331 | u32 src, dst; |
14332 | |
14333 | adr = AREG((Opcode >> 0) & 7); |
14334 | DECODE_EXT_WORD |
14335 | PRE_IO |
14336 | READ_WORD_F(adr, src) |
14337 | res = -src - ((flag_X >> 8) & 1); |
14338 | flag_V = (res & src) >> 8; |
14339 | flag_N = flag_X = flag_C = res >> 8; |
14340 | flag_NotZ |= res & 0xFFFF; |
14341 | WRITE_WORD_F(adr, res) |
14342 | POST_IO |
14343 | RET(18) |
14344 | } |
14345 | |
14346 | // NEGX |
14347 | OPCODE(0x4078) |
14348 | { |
14349 | u32 adr, res; |
14350 | u32 src, dst; |
14351 | |
14352 | FETCH_SWORD(adr); |
14353 | PRE_IO |
14354 | READ_WORD_F(adr, src) |
14355 | res = -src - ((flag_X >> 8) & 1); |
14356 | flag_V = (res & src) >> 8; |
14357 | flag_N = flag_X = flag_C = res >> 8; |
14358 | flag_NotZ |= res & 0xFFFF; |
14359 | WRITE_WORD_F(adr, res) |
14360 | POST_IO |
14361 | RET(16) |
14362 | } |
14363 | |
14364 | // NEGX |
14365 | OPCODE(0x4079) |
14366 | { |
14367 | u32 adr, res; |
14368 | u32 src, dst; |
14369 | |
14370 | FETCH_LONG(adr); |
14371 | PRE_IO |
14372 | READ_WORD_F(adr, src) |
14373 | res = -src - ((flag_X >> 8) & 1); |
14374 | flag_V = (res & src) >> 8; |
14375 | flag_N = flag_X = flag_C = res >> 8; |
14376 | flag_NotZ |= res & 0xFFFF; |
14377 | WRITE_WORD_F(adr, res) |
14378 | POST_IO |
14379 | RET(20) |
14380 | } |
14381 | |
14382 | // NEGX |
14383 | OPCODE(0x405F) |
14384 | { |
14385 | u32 adr, res; |
14386 | u32 src, dst; |
14387 | |
14388 | adr = AREG(7); |
14389 | AREG(7) += 2; |
14390 | PRE_IO |
14391 | READ_WORD_F(adr, src) |
14392 | res = -src - ((flag_X >> 8) & 1); |
14393 | flag_V = (res & src) >> 8; |
14394 | flag_N = flag_X = flag_C = res >> 8; |
14395 | flag_NotZ |= res & 0xFFFF; |
14396 | WRITE_WORD_F(adr, res) |
14397 | POST_IO |
14398 | RET(12) |
14399 | } |
14400 | |
14401 | // NEGX |
14402 | OPCODE(0x4067) |
14403 | { |
14404 | u32 adr, res; |
14405 | u32 src, dst; |
14406 | |
14407 | adr = AREG(7) - 2; |
14408 | AREG(7) = adr; |
14409 | PRE_IO |
14410 | READ_WORD_F(adr, src) |
14411 | res = -src - ((flag_X >> 8) & 1); |
14412 | flag_V = (res & src) >> 8; |
14413 | flag_N = flag_X = flag_C = res >> 8; |
14414 | flag_NotZ |= res & 0xFFFF; |
14415 | WRITE_WORD_F(adr, res) |
14416 | POST_IO |
14417 | RET(14) |
14418 | } |
14419 | |
14420 | // NEGX |
14421 | OPCODE(0x4080) |
14422 | { |
14423 | u32 adr, res; |
14424 | u32 src, dst; |
14425 | |
14426 | src = DREGu32((Opcode >> 0) & 7); |
14427 | res = -src - ((flag_X >> 8) & 1); |
14428 | flag_NotZ |= res; |
14429 | flag_V = (res & src) >> 24; |
14430 | flag_X = flag_C = (res?1:0)<<8; |
14431 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14432 | flag_N = res >> 24; |
14433 | DREGu32((Opcode >> 0) & 7) = res; |
14434 | RET(6) |
14435 | } |
14436 | |
14437 | // NEGX |
14438 | OPCODE(0x4090) |
14439 | { |
14440 | u32 adr, res; |
14441 | u32 src, dst; |
14442 | |
14443 | adr = AREG((Opcode >> 0) & 7); |
14444 | PRE_IO |
14445 | READ_LONG_F(adr, src) |
14446 | res = -src - ((flag_X >> 8) & 1); |
14447 | flag_NotZ |= res; |
14448 | flag_V = (res & src) >> 24; |
14449 | flag_X = flag_C = (res?1:0)<<8; |
14450 | // flag_X = flag_C = ((src & res & 1) | (src >> 1) | (res >> 1)) >> 23; |
14451 | flag_N = res >> 24; |
14452 | WRITE_LONG_F(adr, res) |
14453 | POST_IO |
14454 | RET(20) |
14455 | } |
14456 | |
14457 | // NEGX |
14458 | OPCODE(0x4098) |
14459 | { |
14460 | u32 adr, res; |
14461 | u32 src, dst; |
14462 | |
14463 | adr = AREG((Opcode >> 0) & 7); |
14464 | AREG((Opcode >> 0) & 7) += 4; |
14465 | PRE_IO |
14466 | READ_LONG_F(adr, src) |
14467 | res = -src - ((flag_X >> 8) & 1); |
14468 | flag_NotZ |= res; |
14469 | flag_V = (res & src) >> 24; |
14470 | flag_X = flag_C = (res?1:0)<<8; |
14471 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14472 | flag_N = res >> 24; |
14473 | WRITE_LONG_F(adr, res) |
14474 | POST_IO |
14475 | RET(20) |
14476 | } |
14477 | |
14478 | // NEGX |
14479 | OPCODE(0x40A0) |
14480 | { |
14481 | u32 adr, res; |
14482 | u32 src, dst; |
14483 | |
14484 | adr = AREG((Opcode >> 0) & 7) - 4; |
14485 | AREG((Opcode >> 0) & 7) = adr; |
14486 | PRE_IO |
14487 | READ_LONG_F(adr, src) |
14488 | res = -src - ((flag_X >> 8) & 1); |
14489 | flag_NotZ |= res; |
14490 | flag_V = (res & src) >> 24; |
14491 | flag_X = flag_C = (res?1:0)<<8; |
14492 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14493 | flag_N = res >> 24; |
14494 | WRITE_LONG_F(adr, res) |
14495 | POST_IO |
14496 | RET(22) |
14497 | } |
14498 | |
14499 | // NEGX |
14500 | OPCODE(0x40A8) |
14501 | { |
14502 | u32 adr, res; |
14503 | u32 src, dst; |
14504 | |
14505 | FETCH_SWORD(adr); |
14506 | adr += AREG((Opcode >> 0) & 7); |
14507 | PRE_IO |
14508 | READ_LONG_F(adr, src) |
14509 | res = -src - ((flag_X >> 8) & 1); |
14510 | flag_NotZ |= res; |
14511 | flag_V = (res & src) >> 24; |
14512 | flag_X = flag_C = (res?1:0)<<8; |
14513 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14514 | flag_N = res >> 24; |
14515 | WRITE_LONG_F(adr, res) |
14516 | POST_IO |
14517 | RET(24) |
14518 | } |
14519 | |
14520 | // NEGX |
14521 | OPCODE(0x40B0) |
14522 | { |
14523 | u32 adr, res; |
14524 | u32 src, dst; |
14525 | |
14526 | adr = AREG((Opcode >> 0) & 7); |
14527 | DECODE_EXT_WORD |
14528 | PRE_IO |
14529 | READ_LONG_F(adr, src) |
14530 | res = -src - ((flag_X >> 8) & 1); |
14531 | flag_NotZ |= res; |
14532 | flag_V = (res & src) >> 24; |
14533 | flag_X = flag_C = (res?1:0)<<8; |
14534 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14535 | flag_N = res >> 24; |
14536 | WRITE_LONG_F(adr, res) |
14537 | POST_IO |
14538 | RET(26) |
14539 | } |
14540 | |
14541 | // NEGX |
14542 | OPCODE(0x40B8) |
14543 | { |
14544 | u32 adr, res; |
14545 | u32 src, dst; |
14546 | |
14547 | FETCH_SWORD(adr); |
14548 | PRE_IO |
14549 | READ_LONG_F(adr, src) |
14550 | res = -src - ((flag_X >> 8) & 1); |
14551 | flag_NotZ |= res; |
14552 | flag_V = (res & src) >> 24; |
14553 | flag_X = flag_C = (res?1:0)<<8; |
14554 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14555 | flag_N = res >> 24; |
14556 | WRITE_LONG_F(adr, res) |
14557 | POST_IO |
14558 | RET(24) |
14559 | } |
14560 | |
14561 | // NEGX |
14562 | OPCODE(0x40B9) |
14563 | { |
14564 | u32 adr, res; |
14565 | u32 src, dst; |
14566 | |
14567 | FETCH_LONG(adr); |
14568 | PRE_IO |
14569 | READ_LONG_F(adr, src) |
14570 | res = -src - ((flag_X >> 8) & 1); |
14571 | flag_NotZ |= res; |
14572 | flag_V = (res & src) >> 24; |
14573 | flag_X = flag_C = (res?1:0)<<8; |
14574 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14575 | flag_N = res >> 24; |
14576 | WRITE_LONG_F(adr, res) |
14577 | POST_IO |
14578 | RET(28) |
14579 | } |
14580 | |
14581 | // NEGX |
14582 | OPCODE(0x409F) |
14583 | { |
14584 | u32 adr, res; |
14585 | u32 src, dst; |
14586 | |
14587 | adr = AREG(7); |
14588 | AREG(7) += 4; |
14589 | PRE_IO |
14590 | READ_LONG_F(adr, src) |
14591 | res = -src - ((flag_X >> 8) & 1); |
14592 | flag_NotZ |= res; |
14593 | flag_V = (res & src) >> 24; |
14594 | flag_X = flag_C = (res?1:0)<<8; |
14595 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14596 | flag_N = res >> 24; |
14597 | WRITE_LONG_F(adr, res) |
14598 | POST_IO |
14599 | RET(20) |
14600 | } |
14601 | |
14602 | // NEGX |
14603 | OPCODE(0x40A7) |
14604 | { |
14605 | u32 adr, res; |
14606 | u32 src, dst; |
14607 | |
14608 | adr = AREG(7) - 4; |
14609 | AREG(7) = adr; |
14610 | PRE_IO |
14611 | READ_LONG_F(adr, src) |
14612 | res = -src - ((flag_X >> 8) & 1); |
14613 | flag_NotZ |= res; |
14614 | flag_V = (res & src) >> 24; |
14615 | flag_X = flag_C = (res?1:0)<<8; |
14616 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14617 | flag_N = res >> 24; |
14618 | WRITE_LONG_F(adr, res) |
14619 | POST_IO |
14620 | RET(22) |
14621 | } |
14622 | |
14623 | // CLR |
14624 | OPCODE(0x4200) |
14625 | { |
14626 | u32 adr, res; |
14627 | u32 src, dst; |
14628 | |
14629 | res = 0; |
14630 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14631 | DREGu8((Opcode >> 0) & 7) = res; |
14632 | RET(4) |
14633 | } |
14634 | |
14635 | // CLR |
14636 | OPCODE(0x4210) |
14637 | { |
14638 | u32 adr, res; |
14639 | u32 src, dst; |
14640 | |
14641 | adr = AREG((Opcode >> 0) & 7); |
14642 | res = 0; |
14643 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14644 | PRE_IO |
14645 | WRITE_BYTE_F(adr, res) |
14646 | POST_IO |
14647 | RET(12) |
14648 | } |
14649 | |
14650 | // CLR |
14651 | OPCODE(0x4218) |
14652 | { |
14653 | u32 adr, res; |
14654 | u32 src, dst; |
14655 | |
14656 | adr = AREG((Opcode >> 0) & 7); |
14657 | AREG((Opcode >> 0) & 7) += 1; |
14658 | res = 0; |
14659 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14660 | PRE_IO |
14661 | WRITE_BYTE_F(adr, res) |
14662 | POST_IO |
14663 | RET(12) |
14664 | } |
14665 | |
14666 | // CLR |
14667 | OPCODE(0x4220) |
14668 | { |
14669 | u32 adr, res; |
14670 | u32 src, dst; |
14671 | |
14672 | adr = AREG((Opcode >> 0) & 7) - 1; |
14673 | AREG((Opcode >> 0) & 7) = adr; |
14674 | res = 0; |
14675 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14676 | PRE_IO |
14677 | WRITE_BYTE_F(adr, res) |
14678 | POST_IO |
14679 | RET(14) |
14680 | } |
14681 | |
14682 | // CLR |
14683 | OPCODE(0x4228) |
14684 | { |
14685 | u32 adr, res; |
14686 | u32 src, dst; |
14687 | |
14688 | FETCH_SWORD(adr); |
14689 | adr += AREG((Opcode >> 0) & 7); |
14690 | res = 0; |
14691 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14692 | PRE_IO |
14693 | WRITE_BYTE_F(adr, res) |
14694 | POST_IO |
14695 | RET(16) |
14696 | } |
14697 | |
14698 | // CLR |
14699 | OPCODE(0x4230) |
14700 | { |
14701 | u32 adr, res; |
14702 | u32 src, dst; |
14703 | |
14704 | adr = AREG((Opcode >> 0) & 7); |
14705 | DECODE_EXT_WORD |
14706 | res = 0; |
14707 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14708 | PRE_IO |
14709 | WRITE_BYTE_F(adr, res) |
14710 | POST_IO |
14711 | RET(18) |
14712 | } |
14713 | |
14714 | // CLR |
14715 | OPCODE(0x4238) |
14716 | { |
14717 | u32 adr, res; |
14718 | u32 src, dst; |
14719 | |
14720 | FETCH_SWORD(adr); |
14721 | res = 0; |
14722 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14723 | PRE_IO |
14724 | WRITE_BYTE_F(adr, res) |
14725 | POST_IO |
14726 | RET(16) |
14727 | } |
14728 | |
14729 | // CLR |
14730 | OPCODE(0x4239) |
14731 | { |
14732 | u32 adr, res; |
14733 | u32 src, dst; |
14734 | |
14735 | FETCH_LONG(adr); |
14736 | res = 0; |
14737 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14738 | PRE_IO |
14739 | WRITE_BYTE_F(adr, res) |
14740 | POST_IO |
14741 | RET(20) |
14742 | } |
14743 | |
14744 | // CLR |
14745 | OPCODE(0x421F) |
14746 | { |
14747 | u32 adr, res; |
14748 | u32 src, dst; |
14749 | |
14750 | adr = AREG(7); |
14751 | AREG(7) += 2; |
14752 | res = 0; |
14753 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14754 | PRE_IO |
14755 | WRITE_BYTE_F(adr, res) |
14756 | POST_IO |
14757 | RET(12) |
14758 | } |
14759 | |
14760 | // CLR |
14761 | OPCODE(0x4227) |
14762 | { |
14763 | u32 adr, res; |
14764 | u32 src, dst; |
14765 | |
14766 | adr = AREG(7) - 2; |
14767 | AREG(7) = adr; |
14768 | res = 0; |
14769 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14770 | PRE_IO |
14771 | WRITE_BYTE_F(adr, res) |
14772 | POST_IO |
14773 | RET(14) |
14774 | } |
14775 | |
14776 | // CLR |
14777 | OPCODE(0x4240) |
14778 | { |
14779 | u32 adr, res; |
14780 | u32 src, dst; |
14781 | |
14782 | res = 0; |
14783 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14784 | DREGu16((Opcode >> 0) & 7) = res; |
14785 | RET(4) |
14786 | } |
14787 | |
14788 | // CLR |
14789 | OPCODE(0x4250) |
14790 | { |
14791 | u32 adr, res; |
14792 | u32 src, dst; |
14793 | |
14794 | adr = AREG((Opcode >> 0) & 7); |
14795 | res = 0; |
14796 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14797 | PRE_IO |
14798 | WRITE_WORD_F(adr, res) |
14799 | POST_IO |
14800 | RET(12) |
14801 | } |
14802 | |
14803 | // CLR |
14804 | OPCODE(0x4258) |
14805 | { |
14806 | u32 adr, res; |
14807 | u32 src, dst; |
14808 | |
14809 | adr = AREG((Opcode >> 0) & 7); |
14810 | AREG((Opcode >> 0) & 7) += 2; |
14811 | res = 0; |
14812 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14813 | PRE_IO |
14814 | WRITE_WORD_F(adr, res) |
14815 | POST_IO |
14816 | RET(12) |
14817 | } |
14818 | |
14819 | // CLR |
14820 | OPCODE(0x4260) |
14821 | { |
14822 | u32 adr, res; |
14823 | u32 src, dst; |
14824 | |
14825 | adr = AREG((Opcode >> 0) & 7) - 2; |
14826 | AREG((Opcode >> 0) & 7) = adr; |
14827 | res = 0; |
14828 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14829 | PRE_IO |
14830 | WRITE_WORD_F(adr, res) |
14831 | POST_IO |
14832 | RET(14) |
14833 | } |
14834 | |
14835 | // CLR |
14836 | OPCODE(0x4268) |
14837 | { |
14838 | u32 adr, res; |
14839 | u32 src, dst; |
14840 | |
14841 | FETCH_SWORD(adr); |
14842 | adr += AREG((Opcode >> 0) & 7); |
14843 | res = 0; |
14844 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14845 | PRE_IO |
14846 | WRITE_WORD_F(adr, res) |
14847 | POST_IO |
14848 | RET(16) |
14849 | } |
14850 | |
14851 | // CLR |
14852 | OPCODE(0x4270) |
14853 | { |
14854 | u32 adr, res; |
14855 | u32 src, dst; |
14856 | |
14857 | adr = AREG((Opcode >> 0) & 7); |
14858 | DECODE_EXT_WORD |
14859 | res = 0; |
14860 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14861 | PRE_IO |
14862 | WRITE_WORD_F(adr, res) |
14863 | POST_IO |
14864 | RET(18) |
14865 | } |
14866 | |
14867 | // CLR |
14868 | OPCODE(0x4278) |
14869 | { |
14870 | u32 adr, res; |
14871 | u32 src, dst; |
14872 | |
14873 | FETCH_SWORD(adr); |
14874 | res = 0; |
14875 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14876 | PRE_IO |
14877 | WRITE_WORD_F(adr, res) |
14878 | POST_IO |
14879 | RET(16) |
14880 | } |
14881 | |
14882 | // CLR |
14883 | OPCODE(0x4279) |
14884 | { |
14885 | u32 adr, res; |
14886 | u32 src, dst; |
14887 | |
14888 | FETCH_LONG(adr); |
14889 | res = 0; |
14890 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14891 | PRE_IO |
14892 | WRITE_WORD_F(adr, res) |
14893 | POST_IO |
14894 | RET(20) |
14895 | } |
14896 | |
14897 | // CLR |
14898 | OPCODE(0x425F) |
14899 | { |
14900 | u32 adr, res; |
14901 | u32 src, dst; |
14902 | |
14903 | adr = AREG(7); |
14904 | AREG(7) += 2; |
14905 | res = 0; |
14906 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14907 | PRE_IO |
14908 | WRITE_WORD_F(adr, res) |
14909 | POST_IO |
14910 | RET(12) |
14911 | } |
14912 | |
14913 | // CLR |
14914 | OPCODE(0x4267) |
14915 | { |
14916 | u32 adr, res; |
14917 | u32 src, dst; |
14918 | |
14919 | adr = AREG(7) - 2; |
14920 | AREG(7) = adr; |
14921 | res = 0; |
14922 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14923 | PRE_IO |
14924 | WRITE_WORD_F(adr, res) |
14925 | POST_IO |
14926 | RET(14) |
14927 | } |
14928 | |
14929 | // CLR |
14930 | OPCODE(0x4280) |
14931 | { |
14932 | u32 adr, res; |
14933 | u32 src, dst; |
14934 | |
14935 | res = 0; |
14936 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14937 | DREGu32((Opcode >> 0) & 7) = res; |
14938 | RET(6) |
14939 | } |
14940 | |
14941 | // CLR |
14942 | OPCODE(0x4290) |
14943 | { |
14944 | u32 adr, res; |
14945 | u32 src, dst; |
14946 | |
14947 | adr = AREG((Opcode >> 0) & 7); |
14948 | res = 0; |
14949 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14950 | PRE_IO |
14951 | WRITE_LONG_F(adr, res) |
14952 | POST_IO |
14953 | RET(20) |
14954 | } |
14955 | |
14956 | // CLR |
14957 | OPCODE(0x4298) |
14958 | { |
14959 | u32 adr, res; |
14960 | u32 src, dst; |
14961 | |
14962 | adr = AREG((Opcode >> 0) & 7); |
14963 | AREG((Opcode >> 0) & 7) += 4; |
14964 | res = 0; |
14965 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14966 | PRE_IO |
14967 | WRITE_LONG_F(adr, res) |
14968 | POST_IO |
14969 | RET(20) |
14970 | } |
14971 | |
14972 | // CLR |
14973 | OPCODE(0x42A0) |
14974 | { |
14975 | u32 adr, res; |
14976 | u32 src, dst; |
14977 | |
14978 | adr = AREG((Opcode >> 0) & 7) - 4; |
14979 | AREG((Opcode >> 0) & 7) = adr; |
14980 | res = 0; |
14981 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14982 | PRE_IO |
14983 | WRITE_LONG_F(adr, res) |
14984 | POST_IO |
14985 | RET(22) |
14986 | } |
14987 | |
14988 | // CLR |
14989 | OPCODE(0x42A8) |
14990 | { |
14991 | u32 adr, res; |
14992 | u32 src, dst; |
14993 | |
14994 | FETCH_SWORD(adr); |
14995 | adr += AREG((Opcode >> 0) & 7); |
14996 | res = 0; |
14997 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14998 | PRE_IO |
14999 | WRITE_LONG_F(adr, res) |
15000 | POST_IO |
15001 | RET(24) |
15002 | } |
15003 | |
15004 | // CLR |
15005 | OPCODE(0x42B0) |
15006 | { |
15007 | u32 adr, res; |
15008 | u32 src, dst; |
15009 | |
15010 | adr = AREG((Opcode >> 0) & 7); |
15011 | DECODE_EXT_WORD |
15012 | res = 0; |
15013 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15014 | PRE_IO |
15015 | WRITE_LONG_F(adr, res) |
15016 | POST_IO |
15017 | RET(26) |
15018 | } |
15019 | |
15020 | // CLR |
15021 | OPCODE(0x42B8) |
15022 | { |
15023 | u32 adr, res; |
15024 | u32 src, dst; |
15025 | |
15026 | FETCH_SWORD(adr); |
15027 | res = 0; |
15028 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15029 | PRE_IO |
15030 | WRITE_LONG_F(adr, res) |
15031 | POST_IO |
15032 | RET(24) |
15033 | } |
15034 | |
15035 | // CLR |
15036 | OPCODE(0x42B9) |
15037 | { |
15038 | u32 adr, res; |
15039 | u32 src, dst; |
15040 | |
15041 | FETCH_LONG(adr); |
15042 | res = 0; |
15043 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15044 | PRE_IO |
15045 | WRITE_LONG_F(adr, res) |
15046 | POST_IO |
15047 | RET(28) |
15048 | } |
15049 | |
15050 | // CLR |
15051 | OPCODE(0x429F) |
15052 | { |
15053 | u32 adr, res; |
15054 | u32 src, dst; |
15055 | |
15056 | adr = AREG(7); |
15057 | AREG(7) += 4; |
15058 | res = 0; |
15059 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15060 | PRE_IO |
15061 | WRITE_LONG_F(adr, res) |
15062 | POST_IO |
15063 | RET(20) |
15064 | } |
15065 | |
15066 | // CLR |
15067 | OPCODE(0x42A7) |
15068 | { |
15069 | u32 adr, res; |
15070 | u32 src, dst; |
15071 | |
15072 | adr = AREG(7) - 4; |
15073 | AREG(7) = adr; |
15074 | res = 0; |
15075 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15076 | PRE_IO |
15077 | WRITE_LONG_F(adr, res) |
15078 | POST_IO |
15079 | RET(22) |
15080 | } |
15081 | |
15082 | // NEG |
15083 | OPCODE(0x4400) |
15084 | { |
15085 | u32 adr, res; |
15086 | u32 src, dst; |
15087 | |
15088 | src = DREGu8((Opcode >> 0) & 7); |
15089 | res = -src; |
15090 | flag_V = res & src; |
15091 | flag_N = flag_X = flag_C = res; |
15092 | flag_NotZ = res & 0xFF; |
15093 | DREGu8((Opcode >> 0) & 7) = res; |
15094 | RET(4) |
15095 | } |
15096 | |
15097 | // NEG |
15098 | OPCODE(0x4410) |
15099 | { |
15100 | u32 adr, res; |
15101 | u32 src, dst; |
15102 | |
15103 | adr = AREG((Opcode >> 0) & 7); |
15104 | PRE_IO |
15105 | READ_BYTE_F(adr, src) |
15106 | res = -src; |
15107 | flag_V = res & src; |
15108 | flag_N = flag_X = flag_C = res; |
15109 | flag_NotZ = res & 0xFF; |
15110 | WRITE_BYTE_F(adr, res) |
15111 | POST_IO |
15112 | RET(12) |
15113 | } |
15114 | |
15115 | // NEG |
15116 | OPCODE(0x4418) |
15117 | { |
15118 | u32 adr, res; |
15119 | u32 src, dst; |
15120 | |
15121 | adr = AREG((Opcode >> 0) & 7); |
15122 | AREG((Opcode >> 0) & 7) += 1; |
15123 | PRE_IO |
15124 | READ_BYTE_F(adr, src) |
15125 | res = -src; |
15126 | flag_V = res & src; |
15127 | flag_N = flag_X = flag_C = res; |
15128 | flag_NotZ = res & 0xFF; |
15129 | WRITE_BYTE_F(adr, res) |
15130 | POST_IO |
15131 | RET(12) |
15132 | } |
15133 | |
15134 | // NEG |
15135 | OPCODE(0x4420) |
15136 | { |
15137 | u32 adr, res; |
15138 | u32 src, dst; |
15139 | |
15140 | adr = AREG((Opcode >> 0) & 7) - 1; |
15141 | AREG((Opcode >> 0) & 7) = adr; |
15142 | PRE_IO |
15143 | READ_BYTE_F(adr, src) |
15144 | res = -src; |
15145 | flag_V = res & src; |
15146 | flag_N = flag_X = flag_C = res; |
15147 | flag_NotZ = res & 0xFF; |
15148 | WRITE_BYTE_F(adr, res) |
15149 | POST_IO |
15150 | RET(14) |
15151 | } |
15152 | |
15153 | // NEG |
15154 | OPCODE(0x4428) |
15155 | { |
15156 | u32 adr, res; |
15157 | u32 src, dst; |
15158 | |
15159 | FETCH_SWORD(adr); |
15160 | adr += AREG((Opcode >> 0) & 7); |
15161 | PRE_IO |
15162 | READ_BYTE_F(adr, src) |
15163 | res = -src; |
15164 | flag_V = res & src; |
15165 | flag_N = flag_X = flag_C = res; |
15166 | flag_NotZ = res & 0xFF; |
15167 | WRITE_BYTE_F(adr, res) |
15168 | POST_IO |
15169 | RET(16) |
15170 | } |
15171 | |
15172 | // NEG |
15173 | OPCODE(0x4430) |
15174 | { |
15175 | u32 adr, res; |
15176 | u32 src, dst; |
15177 | |
15178 | adr = AREG((Opcode >> 0) & 7); |
15179 | DECODE_EXT_WORD |
15180 | PRE_IO |
15181 | READ_BYTE_F(adr, src) |
15182 | res = -src; |
15183 | flag_V = res & src; |
15184 | flag_N = flag_X = flag_C = res; |
15185 | flag_NotZ = res & 0xFF; |
15186 | WRITE_BYTE_F(adr, res) |
15187 | POST_IO |
15188 | RET(18) |
15189 | } |
15190 | |
15191 | // NEG |
15192 | OPCODE(0x4438) |
15193 | { |
15194 | u32 adr, res; |
15195 | u32 src, dst; |
15196 | |
15197 | FETCH_SWORD(adr); |
15198 | PRE_IO |
15199 | READ_BYTE_F(adr, src) |
15200 | res = -src; |
15201 | flag_V = res & src; |
15202 | flag_N = flag_X = flag_C = res; |
15203 | flag_NotZ = res & 0xFF; |
15204 | WRITE_BYTE_F(adr, res) |
15205 | POST_IO |
15206 | RET(16) |
15207 | } |
15208 | |
15209 | // NEG |
15210 | OPCODE(0x4439) |
15211 | { |
15212 | u32 adr, res; |
15213 | u32 src, dst; |
15214 | |
15215 | FETCH_LONG(adr); |
15216 | PRE_IO |
15217 | READ_BYTE_F(adr, src) |
15218 | res = -src; |
15219 | flag_V = res & src; |
15220 | flag_N = flag_X = flag_C = res; |
15221 | flag_NotZ = res & 0xFF; |
15222 | WRITE_BYTE_F(adr, res) |
15223 | POST_IO |
15224 | RET(20) |
15225 | } |
15226 | |
15227 | // NEG |
15228 | OPCODE(0x441F) |
15229 | { |
15230 | u32 adr, res; |
15231 | u32 src, dst; |
15232 | |
15233 | adr = AREG(7); |
15234 | AREG(7) += 2; |
15235 | PRE_IO |
15236 | READ_BYTE_F(adr, src) |
15237 | res = -src; |
15238 | flag_V = res & src; |
15239 | flag_N = flag_X = flag_C = res; |
15240 | flag_NotZ = res & 0xFF; |
15241 | WRITE_BYTE_F(adr, res) |
15242 | POST_IO |
15243 | RET(12) |
15244 | } |
15245 | |
15246 | // NEG |
15247 | OPCODE(0x4427) |
15248 | { |
15249 | u32 adr, res; |
15250 | u32 src, dst; |
15251 | |
15252 | adr = AREG(7) - 2; |
15253 | AREG(7) = adr; |
15254 | PRE_IO |
15255 | READ_BYTE_F(adr, src) |
15256 | res = -src; |
15257 | flag_V = res & src; |
15258 | flag_N = flag_X = flag_C = res; |
15259 | flag_NotZ = res & 0xFF; |
15260 | WRITE_BYTE_F(adr, res) |
15261 | POST_IO |
15262 | RET(14) |
15263 | } |
15264 | |
15265 | // NEG |
15266 | OPCODE(0x4440) |
15267 | { |
15268 | u32 adr, res; |
15269 | u32 src, dst; |
15270 | |
15271 | src = DREGu16((Opcode >> 0) & 7); |
15272 | res = -src; |
15273 | flag_V = (res & src) >> 8; |
15274 | flag_N = flag_X = flag_C = res >> 8; |
15275 | flag_NotZ = res & 0xFFFF; |
15276 | DREGu16((Opcode >> 0) & 7) = res; |
15277 | RET(4) |
15278 | } |
15279 | |
15280 | // NEG |
15281 | OPCODE(0x4450) |
15282 | { |
15283 | u32 adr, res; |
15284 | u32 src, dst; |
15285 | |
15286 | adr = AREG((Opcode >> 0) & 7); |
15287 | PRE_IO |
15288 | READ_WORD_F(adr, src) |
15289 | res = -src; |
15290 | flag_V = (res & src) >> 8; |
15291 | flag_N = flag_X = flag_C = res >> 8; |
15292 | flag_NotZ = res & 0xFFFF; |
15293 | WRITE_WORD_F(adr, res) |
15294 | POST_IO |
15295 | RET(12) |
15296 | } |
15297 | |
15298 | // NEG |
15299 | OPCODE(0x4458) |
15300 | { |
15301 | u32 adr, res; |
15302 | u32 src, dst; |
15303 | |
15304 | adr = AREG((Opcode >> 0) & 7); |
15305 | AREG((Opcode >> 0) & 7) += 2; |
15306 | PRE_IO |
15307 | READ_WORD_F(adr, src) |
15308 | res = -src; |
15309 | flag_V = (res & src) >> 8; |
15310 | flag_N = flag_X = flag_C = res >> 8; |
15311 | flag_NotZ = res & 0xFFFF; |
15312 | WRITE_WORD_F(adr, res) |
15313 | POST_IO |
15314 | RET(12) |
15315 | } |
15316 | |
15317 | // NEG |
15318 | OPCODE(0x4460) |
15319 | { |
15320 | u32 adr, res; |
15321 | u32 src, dst; |
15322 | |
15323 | adr = AREG((Opcode >> 0) & 7) - 2; |
15324 | AREG((Opcode >> 0) & 7) = adr; |
15325 | PRE_IO |
15326 | READ_WORD_F(adr, src) |
15327 | res = -src; |
15328 | flag_V = (res & src) >> 8; |
15329 | flag_N = flag_X = flag_C = res >> 8; |
15330 | flag_NotZ = res & 0xFFFF; |
15331 | WRITE_WORD_F(adr, res) |
15332 | POST_IO |
15333 | RET(14) |
15334 | } |
15335 | |
15336 | // NEG |
15337 | OPCODE(0x4468) |
15338 | { |
15339 | u32 adr, res; |
15340 | u32 src, dst; |
15341 | |
15342 | FETCH_SWORD(adr); |
15343 | adr += AREG((Opcode >> 0) & 7); |
15344 | PRE_IO |
15345 | READ_WORD_F(adr, src) |
15346 | res = -src; |
15347 | flag_V = (res & src) >> 8; |
15348 | flag_N = flag_X = flag_C = res >> 8; |
15349 | flag_NotZ = res & 0xFFFF; |
15350 | WRITE_WORD_F(adr, res) |
15351 | POST_IO |
15352 | RET(16) |
15353 | } |
15354 | |
15355 | // NEG |
15356 | OPCODE(0x4470) |
15357 | { |
15358 | u32 adr, res; |
15359 | u32 src, dst; |
15360 | |
15361 | adr = AREG((Opcode >> 0) & 7); |
15362 | DECODE_EXT_WORD |
15363 | PRE_IO |
15364 | READ_WORD_F(adr, src) |
15365 | res = -src; |
15366 | flag_V = (res & src) >> 8; |
15367 | flag_N = flag_X = flag_C = res >> 8; |
15368 | flag_NotZ = res & 0xFFFF; |
15369 | WRITE_WORD_F(adr, res) |
15370 | POST_IO |
15371 | RET(18) |
15372 | } |
15373 | |
15374 | // NEG |
15375 | OPCODE(0x4478) |
15376 | { |
15377 | u32 adr, res; |
15378 | u32 src, dst; |
15379 | |
15380 | FETCH_SWORD(adr); |
15381 | PRE_IO |
15382 | READ_WORD_F(adr, src) |
15383 | res = -src; |
15384 | flag_V = (res & src) >> 8; |
15385 | flag_N = flag_X = flag_C = res >> 8; |
15386 | flag_NotZ = res & 0xFFFF; |
15387 | WRITE_WORD_F(adr, res) |
15388 | POST_IO |
15389 | RET(16) |
15390 | } |
15391 | |
15392 | // NEG |
15393 | OPCODE(0x4479) |
15394 | { |
15395 | u32 adr, res; |
15396 | u32 src, dst; |
15397 | |
15398 | FETCH_LONG(adr); |
15399 | PRE_IO |
15400 | READ_WORD_F(adr, src) |
15401 | res = -src; |
15402 | flag_V = (res & src) >> 8; |
15403 | flag_N = flag_X = flag_C = res >> 8; |
15404 | flag_NotZ = res & 0xFFFF; |
15405 | WRITE_WORD_F(adr, res) |
15406 | POST_IO |
15407 | RET(20) |
15408 | } |
15409 | |
15410 | // NEG |
15411 | OPCODE(0x445F) |
15412 | { |
15413 | u32 adr, res; |
15414 | u32 src, dst; |
15415 | |
15416 | adr = AREG(7); |
15417 | AREG(7) += 2; |
15418 | PRE_IO |
15419 | READ_WORD_F(adr, src) |
15420 | res = -src; |
15421 | flag_V = (res & src) >> 8; |
15422 | flag_N = flag_X = flag_C = res >> 8; |
15423 | flag_NotZ = res & 0xFFFF; |
15424 | WRITE_WORD_F(adr, res) |
15425 | POST_IO |
15426 | RET(12) |
15427 | } |
15428 | |
15429 | // NEG |
15430 | OPCODE(0x4467) |
15431 | { |
15432 | u32 adr, res; |
15433 | u32 src, dst; |
15434 | |
15435 | adr = AREG(7) - 2; |
15436 | AREG(7) = adr; |
15437 | PRE_IO |
15438 | READ_WORD_F(adr, src) |
15439 | res = -src; |
15440 | flag_V = (res & src) >> 8; |
15441 | flag_N = flag_X = flag_C = res >> 8; |
15442 | flag_NotZ = res & 0xFFFF; |
15443 | WRITE_WORD_F(adr, res) |
15444 | POST_IO |
15445 | RET(14) |
15446 | } |
15447 | |
15448 | // NEG |
15449 | OPCODE(0x4480) |
15450 | { |
15451 | u32 adr, res; |
15452 | u32 src, dst; |
15453 | |
15454 | src = DREGu32((Opcode >> 0) & 7); |
15455 | res = -src; |
15456 | flag_NotZ = res; |
15457 | flag_V = (res & src) >> 24; |
15458 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15459 | flag_N = res >> 24; |
15460 | DREGu32((Opcode >> 0) & 7) = res; |
15461 | RET(6) |
15462 | } |
15463 | |
15464 | // NEG |
15465 | OPCODE(0x4490) |
15466 | { |
15467 | u32 adr, res; |
15468 | u32 src, dst; |
15469 | |
15470 | adr = AREG((Opcode >> 0) & 7); |
15471 | PRE_IO |
15472 | READ_LONG_F(adr, src) |
15473 | res = -src; |
15474 | flag_NotZ = res; |
15475 | flag_V = (res & src) >> 24; |
15476 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15477 | flag_N = res >> 24; |
15478 | WRITE_LONG_F(adr, res) |
15479 | POST_IO |
15480 | RET(20) |
15481 | } |
15482 | |
15483 | // NEG |
15484 | OPCODE(0x4498) |
15485 | { |
15486 | u32 adr, res; |
15487 | u32 src, dst; |
15488 | |
15489 | adr = AREG((Opcode >> 0) & 7); |
15490 | AREG((Opcode >> 0) & 7) += 4; |
15491 | PRE_IO |
15492 | READ_LONG_F(adr, src) |
15493 | res = -src; |
15494 | flag_NotZ = res; |
15495 | flag_V = (res & src) >> 24; |
15496 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15497 | flag_N = res >> 24; |
15498 | WRITE_LONG_F(adr, res) |
15499 | POST_IO |
15500 | RET(20) |
15501 | } |
15502 | |
15503 | // NEG |
15504 | OPCODE(0x44A0) |
15505 | { |
15506 | u32 adr, res; |
15507 | u32 src, dst; |
15508 | |
15509 | adr = AREG((Opcode >> 0) & 7) - 4; |
15510 | AREG((Opcode >> 0) & 7) = adr; |
15511 | PRE_IO |
15512 | READ_LONG_F(adr, src) |
15513 | res = -src; |
15514 | flag_NotZ = res; |
15515 | flag_V = (res & src) >> 24; |
15516 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15517 | flag_N = res >> 24; |
15518 | WRITE_LONG_F(adr, res) |
15519 | POST_IO |
15520 | RET(22) |
15521 | } |
15522 | |
15523 | // NEG |
15524 | OPCODE(0x44A8) |
15525 | { |
15526 | u32 adr, res; |
15527 | u32 src, dst; |
15528 | |
15529 | FETCH_SWORD(adr); |
15530 | adr += AREG((Opcode >> 0) & 7); |
15531 | PRE_IO |
15532 | READ_LONG_F(adr, src) |
15533 | res = -src; |
15534 | flag_NotZ = res; |
15535 | flag_V = (res & src) >> 24; |
15536 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15537 | flag_N = res >> 24; |
15538 | WRITE_LONG_F(adr, res) |
15539 | POST_IO |
15540 | RET(24) |
15541 | } |
15542 | |
15543 | // NEG |
15544 | OPCODE(0x44B0) |
15545 | { |
15546 | u32 adr, res; |
15547 | u32 src, dst; |
15548 | |
15549 | adr = AREG((Opcode >> 0) & 7); |
15550 | DECODE_EXT_WORD |
15551 | PRE_IO |
15552 | READ_LONG_F(adr, src) |
15553 | res = -src; |
15554 | flag_NotZ = res; |
15555 | flag_V = (res & src) >> 24; |
15556 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15557 | flag_N = res >> 24; |
15558 | WRITE_LONG_F(adr, res) |
15559 | POST_IO |
15560 | RET(26) |
15561 | } |
15562 | |
15563 | // NEG |
15564 | OPCODE(0x44B8) |
15565 | { |
15566 | u32 adr, res; |
15567 | u32 src, dst; |
15568 | |
15569 | FETCH_SWORD(adr); |
15570 | PRE_IO |
15571 | READ_LONG_F(adr, src) |
15572 | res = -src; |
15573 | flag_NotZ = res; |
15574 | flag_V = (res & src) >> 24; |
15575 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15576 | flag_N = res >> 24; |
15577 | WRITE_LONG_F(adr, res) |
15578 | POST_IO |
15579 | RET(24) |
15580 | } |
15581 | |
15582 | // NEG |
15583 | OPCODE(0x44B9) |
15584 | { |
15585 | u32 adr, res; |
15586 | u32 src, dst; |
15587 | |
15588 | FETCH_LONG(adr); |
15589 | PRE_IO |
15590 | READ_LONG_F(adr, src) |
15591 | res = -src; |
15592 | flag_NotZ = res; |
15593 | flag_V = (res & src) >> 24; |
15594 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15595 | flag_N = res >> 24; |
15596 | WRITE_LONG_F(adr, res) |
15597 | POST_IO |
15598 | RET(28) |
15599 | } |
15600 | |
15601 | // NEG |
15602 | OPCODE(0x449F) |
15603 | { |
15604 | u32 adr, res; |
15605 | u32 src, dst; |
15606 | |
15607 | adr = AREG(7); |
15608 | AREG(7) += 4; |
15609 | PRE_IO |
15610 | READ_LONG_F(adr, src) |
15611 | res = -src; |
15612 | flag_NotZ = res; |
15613 | flag_V = (res & src) >> 24; |
15614 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15615 | flag_N = res >> 24; |
15616 | WRITE_LONG_F(adr, res) |
15617 | POST_IO |
15618 | RET(20) |
15619 | } |
15620 | |
15621 | // NEG |
15622 | OPCODE(0x44A7) |
15623 | { |
15624 | u32 adr, res; |
15625 | u32 src, dst; |
15626 | |
15627 | adr = AREG(7) - 4; |
15628 | AREG(7) = adr; |
15629 | PRE_IO |
15630 | READ_LONG_F(adr, src) |
15631 | res = -src; |
15632 | flag_NotZ = res; |
15633 | flag_V = (res & src) >> 24; |
15634 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15635 | flag_N = res >> 24; |
15636 | WRITE_LONG_F(adr, res) |
15637 | POST_IO |
15638 | RET(22) |
15639 | } |
15640 | |
15641 | // NOT |
15642 | OPCODE(0x4600) |
15643 | { |
15644 | u32 adr, res; |
15645 | u32 src, dst; |
15646 | |
15647 | src = DREGu8((Opcode >> 0) & 7); |
15648 | res = ~src; |
15649 | flag_C = 0; |
15650 | flag_V = 0; |
15651 | flag_N = res; |
15652 | flag_NotZ = res & 0xFF; |
15653 | DREGu8((Opcode >> 0) & 7) = res; |
15654 | RET(4) |
15655 | } |
15656 | |
15657 | // NOT |
15658 | OPCODE(0x4610) |
15659 | { |
15660 | u32 adr, res; |
15661 | u32 src, dst; |
15662 | |
15663 | adr = AREG((Opcode >> 0) & 7); |
15664 | PRE_IO |
15665 | READ_BYTE_F(adr, src) |
15666 | res = ~src; |
15667 | flag_C = 0; |
15668 | flag_V = 0; |
15669 | flag_N = res; |
15670 | flag_NotZ = res & 0xFF; |
15671 | WRITE_BYTE_F(adr, res) |
15672 | POST_IO |
15673 | RET(12) |
15674 | } |
15675 | |
15676 | // NOT |
15677 | OPCODE(0x4618) |
15678 | { |
15679 | u32 adr, res; |
15680 | u32 src, dst; |
15681 | |
15682 | adr = AREG((Opcode >> 0) & 7); |
15683 | AREG((Opcode >> 0) & 7) += 1; |
15684 | PRE_IO |
15685 | READ_BYTE_F(adr, src) |
15686 | res = ~src; |
15687 | flag_C = 0; |
15688 | flag_V = 0; |
15689 | flag_N = res; |
15690 | flag_NotZ = res & 0xFF; |
15691 | WRITE_BYTE_F(adr, res) |
15692 | POST_IO |
15693 | RET(12) |
15694 | } |
15695 | |
15696 | // NOT |
15697 | OPCODE(0x4620) |
15698 | { |
15699 | u32 adr, res; |
15700 | u32 src, dst; |
15701 | |
15702 | adr = AREG((Opcode >> 0) & 7) - 1; |
15703 | AREG((Opcode >> 0) & 7) = adr; |
15704 | PRE_IO |
15705 | READ_BYTE_F(adr, src) |
15706 | res = ~src; |
15707 | flag_C = 0; |
15708 | flag_V = 0; |
15709 | flag_N = res; |
15710 | flag_NotZ = res & 0xFF; |
15711 | WRITE_BYTE_F(adr, res) |
15712 | POST_IO |
15713 | RET(14) |
15714 | } |
15715 | |
15716 | // NOT |
15717 | OPCODE(0x4628) |
15718 | { |
15719 | u32 adr, res; |
15720 | u32 src, dst; |
15721 | |
15722 | FETCH_SWORD(adr); |
15723 | adr += AREG((Opcode >> 0) & 7); |
15724 | PRE_IO |
15725 | READ_BYTE_F(adr, src) |
15726 | res = ~src; |
15727 | flag_C = 0; |
15728 | flag_V = 0; |
15729 | flag_N = res; |
15730 | flag_NotZ = res & 0xFF; |
15731 | WRITE_BYTE_F(adr, res) |
15732 | POST_IO |
15733 | RET(16) |
15734 | } |
15735 | |
15736 | // NOT |
15737 | OPCODE(0x4630) |
15738 | { |
15739 | u32 adr, res; |
15740 | u32 src, dst; |
15741 | |
15742 | adr = AREG((Opcode >> 0) & 7); |
15743 | DECODE_EXT_WORD |
15744 | PRE_IO |
15745 | READ_BYTE_F(adr, src) |
15746 | res = ~src; |
15747 | flag_C = 0; |
15748 | flag_V = 0; |
15749 | flag_N = res; |
15750 | flag_NotZ = res & 0xFF; |
15751 | WRITE_BYTE_F(adr, res) |
15752 | POST_IO |
15753 | RET(18) |
15754 | } |
15755 | |
15756 | // NOT |
15757 | OPCODE(0x4638) |
15758 | { |
15759 | u32 adr, res; |
15760 | u32 src, dst; |
15761 | |
15762 | FETCH_SWORD(adr); |
15763 | PRE_IO |
15764 | READ_BYTE_F(adr, src) |
15765 | res = ~src; |
15766 | flag_C = 0; |
15767 | flag_V = 0; |
15768 | flag_N = res; |
15769 | flag_NotZ = res & 0xFF; |
15770 | WRITE_BYTE_F(adr, res) |
15771 | POST_IO |
15772 | RET(16) |
15773 | } |
15774 | |
15775 | // NOT |
15776 | OPCODE(0x4639) |
15777 | { |
15778 | u32 adr, res; |
15779 | u32 src, dst; |
15780 | |
15781 | FETCH_LONG(adr); |
15782 | PRE_IO |
15783 | READ_BYTE_F(adr, src) |
15784 | res = ~src; |
15785 | flag_C = 0; |
15786 | flag_V = 0; |
15787 | flag_N = res; |
15788 | flag_NotZ = res & 0xFF; |
15789 | WRITE_BYTE_F(adr, res) |
15790 | POST_IO |
15791 | RET(20) |
15792 | } |
15793 | |
15794 | // NOT |
15795 | OPCODE(0x461F) |
15796 | { |
15797 | u32 adr, res; |
15798 | u32 src, dst; |
15799 | |
15800 | adr = AREG(7); |
15801 | AREG(7) += 2; |
15802 | PRE_IO |
15803 | READ_BYTE_F(adr, src) |
15804 | res = ~src; |
15805 | flag_C = 0; |
15806 | flag_V = 0; |
15807 | flag_N = res; |
15808 | flag_NotZ = res & 0xFF; |
15809 | WRITE_BYTE_F(adr, res) |
15810 | POST_IO |
15811 | RET(12) |
15812 | } |
15813 | |
15814 | // NOT |
15815 | OPCODE(0x4627) |
15816 | { |
15817 | u32 adr, res; |
15818 | u32 src, dst; |
15819 | |
15820 | adr = AREG(7) - 2; |
15821 | AREG(7) = adr; |
15822 | PRE_IO |
15823 | READ_BYTE_F(adr, src) |
15824 | res = ~src; |
15825 | flag_C = 0; |
15826 | flag_V = 0; |
15827 | flag_N = res; |
15828 | flag_NotZ = res & 0xFF; |
15829 | WRITE_BYTE_F(adr, res) |
15830 | POST_IO |
15831 | RET(14) |
15832 | } |
15833 | |
15834 | // NOT |
15835 | OPCODE(0x4640) |
15836 | { |
15837 | u32 adr, res; |
15838 | u32 src, dst; |
15839 | |
15840 | src = DREGu16((Opcode >> 0) & 7); |
15841 | res = ~src; |
15842 | flag_C = 0; |
15843 | flag_V = 0; |
15844 | flag_NotZ = res & 0xFFFF; |
15845 | flag_N = res >> 8; |
15846 | DREGu16((Opcode >> 0) & 7) = res; |
15847 | RET(4) |
15848 | } |
15849 | |
15850 | // NOT |
15851 | OPCODE(0x4650) |
15852 | { |
15853 | u32 adr, res; |
15854 | u32 src, dst; |
15855 | |
15856 | adr = AREG((Opcode >> 0) & 7); |
15857 | PRE_IO |
15858 | READ_WORD_F(adr, src) |
15859 | res = ~src; |
15860 | flag_C = 0; |
15861 | flag_V = 0; |
15862 | flag_NotZ = res & 0xFFFF; |
15863 | flag_N = res >> 8; |
15864 | WRITE_WORD_F(adr, res) |
15865 | POST_IO |
15866 | RET(12) |
15867 | } |
15868 | |
15869 | // NOT |
15870 | OPCODE(0x4658) |
15871 | { |
15872 | u32 adr, res; |
15873 | u32 src, dst; |
15874 | |
15875 | adr = AREG((Opcode >> 0) & 7); |
15876 | AREG((Opcode >> 0) & 7) += 2; |
15877 | PRE_IO |
15878 | READ_WORD_F(adr, src) |
15879 | res = ~src; |
15880 | flag_C = 0; |
15881 | flag_V = 0; |
15882 | flag_NotZ = res & 0xFFFF; |
15883 | flag_N = res >> 8; |
15884 | WRITE_WORD_F(adr, res) |
15885 | POST_IO |
15886 | RET(12) |
15887 | } |
15888 | |
15889 | // NOT |
15890 | OPCODE(0x4660) |
15891 | { |
15892 | u32 adr, res; |
15893 | u32 src, dst; |
15894 | |
15895 | adr = AREG((Opcode >> 0) & 7) - 2; |
15896 | AREG((Opcode >> 0) & 7) = adr; |
15897 | PRE_IO |
15898 | READ_WORD_F(adr, src) |
15899 | res = ~src; |
15900 | flag_C = 0; |
15901 | flag_V = 0; |
15902 | flag_NotZ = res & 0xFFFF; |
15903 | flag_N = res >> 8; |
15904 | WRITE_WORD_F(adr, res) |
15905 | POST_IO |
15906 | RET(14) |
15907 | } |
15908 | |
15909 | // NOT |
15910 | OPCODE(0x4668) |
15911 | { |
15912 | u32 adr, res; |
15913 | u32 src, dst; |
15914 | |
15915 | FETCH_SWORD(adr); |
15916 | adr += AREG((Opcode >> 0) & 7); |
15917 | PRE_IO |
15918 | READ_WORD_F(adr, src) |
15919 | res = ~src; |
15920 | flag_C = 0; |
15921 | flag_V = 0; |
15922 | flag_NotZ = res & 0xFFFF; |
15923 | flag_N = res >> 8; |
15924 | WRITE_WORD_F(adr, res) |
15925 | POST_IO |
15926 | RET(16) |
15927 | } |
15928 | |
15929 | // NOT |
15930 | OPCODE(0x4670) |
15931 | { |
15932 | u32 adr, res; |
15933 | u32 src, dst; |
15934 | |
15935 | adr = AREG((Opcode >> 0) & 7); |
15936 | DECODE_EXT_WORD |
15937 | PRE_IO |
15938 | READ_WORD_F(adr, src) |
15939 | res = ~src; |
15940 | flag_C = 0; |
15941 | flag_V = 0; |
15942 | flag_NotZ = res & 0xFFFF; |
15943 | flag_N = res >> 8; |
15944 | WRITE_WORD_F(adr, res) |
15945 | POST_IO |
15946 | RET(18) |
15947 | } |
15948 | |
15949 | // NOT |
15950 | OPCODE(0x4678) |
15951 | { |
15952 | u32 adr, res; |
15953 | u32 src, dst; |
15954 | |
15955 | FETCH_SWORD(adr); |
15956 | PRE_IO |
15957 | READ_WORD_F(adr, src) |
15958 | res = ~src; |
15959 | flag_C = 0; |
15960 | flag_V = 0; |
15961 | flag_NotZ = res & 0xFFFF; |
15962 | flag_N = res >> 8; |
15963 | WRITE_WORD_F(adr, res) |
15964 | POST_IO |
15965 | RET(16) |
15966 | } |
15967 | |
15968 | // NOT |
15969 | OPCODE(0x4679) |
15970 | { |
15971 | u32 adr, res; |
15972 | u32 src, dst; |
15973 | |
15974 | FETCH_LONG(adr); |
15975 | PRE_IO |
15976 | READ_WORD_F(adr, src) |
15977 | res = ~src; |
15978 | flag_C = 0; |
15979 | flag_V = 0; |
15980 | flag_NotZ = res & 0xFFFF; |
15981 | flag_N = res >> 8; |
15982 | WRITE_WORD_F(adr, res) |
15983 | POST_IO |
15984 | RET(20) |
15985 | } |
15986 | |
15987 | // NOT |
15988 | OPCODE(0x465F) |
15989 | { |
15990 | u32 adr, res; |
15991 | u32 src, dst; |
15992 | |
15993 | adr = AREG(7); |
15994 | AREG(7) += 2; |
15995 | PRE_IO |
15996 | READ_WORD_F(adr, src) |
15997 | res = ~src; |
15998 | flag_C = 0; |
15999 | flag_V = 0; |
16000 | flag_NotZ = res & 0xFFFF; |
16001 | flag_N = res >> 8; |
16002 | WRITE_WORD_F(adr, res) |
16003 | POST_IO |
16004 | RET(12) |
16005 | } |
16006 | |
16007 | // NOT |
16008 | OPCODE(0x4667) |
16009 | { |
16010 | u32 adr, res; |
16011 | u32 src, dst; |
16012 | |
16013 | adr = AREG(7) - 2; |
16014 | AREG(7) = adr; |
16015 | PRE_IO |
16016 | READ_WORD_F(adr, src) |
16017 | res = ~src; |
16018 | flag_C = 0; |
16019 | flag_V = 0; |
16020 | flag_NotZ = res & 0xFFFF; |
16021 | flag_N = res >> 8; |
16022 | WRITE_WORD_F(adr, res) |
16023 | POST_IO |
16024 | RET(14) |
16025 | } |
16026 | |
16027 | // NOT |
16028 | OPCODE(0x4680) |
16029 | { |
16030 | u32 adr, res; |
16031 | u32 src, dst; |
16032 | |
16033 | src = DREGu32((Opcode >> 0) & 7); |
16034 | res = ~src; |
16035 | flag_C = 0; |
16036 | flag_V = 0; |
16037 | flag_NotZ = res; |
16038 | flag_N = res >> 24; |
16039 | DREGu32((Opcode >> 0) & 7) = res; |
16040 | RET(6) |
16041 | } |
16042 | |
16043 | // NOT |
16044 | OPCODE(0x4690) |
16045 | { |
16046 | u32 adr, res; |
16047 | u32 src, dst; |
16048 | |
16049 | adr = AREG((Opcode >> 0) & 7); |
16050 | PRE_IO |
16051 | READ_LONG_F(adr, src) |
16052 | res = ~src; |
16053 | flag_C = 0; |
16054 | flag_V = 0; |
16055 | flag_NotZ = res; |
16056 | flag_N = res >> 24; |
16057 | WRITE_LONG_F(adr, res) |
16058 | POST_IO |
16059 | RET(20) |
16060 | } |
16061 | |
16062 | // NOT |
16063 | OPCODE(0x4698) |
16064 | { |
16065 | u32 adr, res; |
16066 | u32 src, dst; |
16067 | |
16068 | adr = AREG((Opcode >> 0) & 7); |
16069 | AREG((Opcode >> 0) & 7) += 4; |
16070 | PRE_IO |
16071 | READ_LONG_F(adr, src) |
16072 | res = ~src; |
16073 | flag_C = 0; |
16074 | flag_V = 0; |
16075 | flag_NotZ = res; |
16076 | flag_N = res >> 24; |
16077 | WRITE_LONG_F(adr, res) |
16078 | POST_IO |
16079 | RET(20) |
16080 | } |
16081 | |
16082 | // NOT |
16083 | OPCODE(0x46A0) |
16084 | { |
16085 | u32 adr, res; |
16086 | u32 src, dst; |
16087 | |
16088 | adr = AREG((Opcode >> 0) & 7) - 4; |
16089 | AREG((Opcode >> 0) & 7) = adr; |
16090 | PRE_IO |
16091 | READ_LONG_F(adr, src) |
16092 | res = ~src; |
16093 | flag_C = 0; |
16094 | flag_V = 0; |
16095 | flag_NotZ = res; |
16096 | flag_N = res >> 24; |
16097 | WRITE_LONG_F(adr, res) |
16098 | POST_IO |
16099 | RET(22) |
16100 | } |
16101 | |
16102 | // NOT |
16103 | OPCODE(0x46A8) |
16104 | { |
16105 | u32 adr, res; |
16106 | u32 src, dst; |
16107 | |
16108 | FETCH_SWORD(adr); |
16109 | adr += AREG((Opcode >> 0) & 7); |
16110 | PRE_IO |
16111 | READ_LONG_F(adr, src) |
16112 | res = ~src; |
16113 | flag_C = 0; |
16114 | flag_V = 0; |
16115 | flag_NotZ = res; |
16116 | flag_N = res >> 24; |
16117 | WRITE_LONG_F(adr, res) |
16118 | POST_IO |
16119 | RET(24) |
16120 | } |
16121 | |
16122 | // NOT |
16123 | OPCODE(0x46B0) |
16124 | { |
16125 | u32 adr, res; |
16126 | u32 src, dst; |
16127 | |
16128 | adr = AREG((Opcode >> 0) & 7); |
16129 | DECODE_EXT_WORD |
16130 | PRE_IO |
16131 | READ_LONG_F(adr, src) |
16132 | res = ~src; |
16133 | flag_C = 0; |
16134 | flag_V = 0; |
16135 | flag_NotZ = res; |
16136 | flag_N = res >> 24; |
16137 | WRITE_LONG_F(adr, res) |
16138 | POST_IO |
16139 | RET(26) |
16140 | } |
16141 | |
16142 | // NOT |
16143 | OPCODE(0x46B8) |
16144 | { |
16145 | u32 adr, res; |
16146 | u32 src, dst; |
16147 | |
16148 | FETCH_SWORD(adr); |
16149 | PRE_IO |
16150 | READ_LONG_F(adr, src) |
16151 | res = ~src; |
16152 | flag_C = 0; |
16153 | flag_V = 0; |
16154 | flag_NotZ = res; |
16155 | flag_N = res >> 24; |
16156 | WRITE_LONG_F(adr, res) |
16157 | POST_IO |
16158 | RET(24) |
16159 | } |
16160 | |
16161 | // NOT |
16162 | OPCODE(0x46B9) |
16163 | { |
16164 | u32 adr, res; |
16165 | u32 src, dst; |
16166 | |
16167 | FETCH_LONG(adr); |
16168 | PRE_IO |
16169 | READ_LONG_F(adr, src) |
16170 | res = ~src; |
16171 | flag_C = 0; |
16172 | flag_V = 0; |
16173 | flag_NotZ = res; |
16174 | flag_N = res >> 24; |
16175 | WRITE_LONG_F(adr, res) |
16176 | POST_IO |
16177 | RET(28) |
16178 | } |
16179 | |
16180 | // NOT |
16181 | OPCODE(0x469F) |
16182 | { |
16183 | u32 adr, res; |
16184 | u32 src, dst; |
16185 | |
16186 | adr = AREG(7); |
16187 | AREG(7) += 4; |
16188 | PRE_IO |
16189 | READ_LONG_F(adr, src) |
16190 | res = ~src; |
16191 | flag_C = 0; |
16192 | flag_V = 0; |
16193 | flag_NotZ = res; |
16194 | flag_N = res >> 24; |
16195 | WRITE_LONG_F(adr, res) |
16196 | POST_IO |
16197 | RET(20) |
16198 | } |
16199 | |
16200 | // NOT |
16201 | OPCODE(0x46A7) |
16202 | { |
16203 | u32 adr, res; |
16204 | u32 src, dst; |
16205 | |
16206 | adr = AREG(7) - 4; |
16207 | AREG(7) = adr; |
16208 | PRE_IO |
16209 | READ_LONG_F(adr, src) |
16210 | res = ~src; |
16211 | flag_C = 0; |
16212 | flag_V = 0; |
16213 | flag_NotZ = res; |
16214 | flag_N = res >> 24; |
16215 | WRITE_LONG_F(adr, res) |
16216 | POST_IO |
16217 | RET(22) |
16218 | } |
16219 | |
16220 | // MOVESRa |
16221 | OPCODE(0x40C0) |
16222 | { |
16223 | u32 adr, res; |
16224 | u32 src, dst; |
16225 | |
16226 | res = GET_SR; |
16227 | DREGu16((Opcode >> 0) & 7) = res; |
16228 | RET(6) |
16229 | } |
16230 | |
16231 | // MOVESRa |
16232 | OPCODE(0x40D0) |
16233 | { |
16234 | u32 adr, res; |
16235 | u32 src, dst; |
16236 | |
16237 | res = GET_SR; |
16238 | adr = AREG((Opcode >> 0) & 7); |
16239 | PRE_IO |
16240 | WRITE_WORD_F(adr, res) |
16241 | POST_IO |
16242 | RET(12) |
16243 | } |
16244 | |
16245 | // MOVESRa |
16246 | OPCODE(0x40D8) |
16247 | { |
16248 | u32 adr, res; |
16249 | u32 src, dst; |
16250 | |
16251 | res = GET_SR; |
16252 | adr = AREG((Opcode >> 0) & 7); |
16253 | AREG((Opcode >> 0) & 7) += 2; |
16254 | PRE_IO |
16255 | WRITE_WORD_F(adr, res) |
16256 | POST_IO |
16257 | RET(12) |
16258 | } |
16259 | |
16260 | // MOVESRa |
16261 | OPCODE(0x40E0) |
16262 | { |
16263 | u32 adr, res; |
16264 | u32 src, dst; |
16265 | |
16266 | res = GET_SR; |
16267 | adr = AREG((Opcode >> 0) & 7) - 2; |
16268 | AREG((Opcode >> 0) & 7) = adr; |
16269 | PRE_IO |
16270 | WRITE_WORD_F(adr, res) |
16271 | POST_IO |
16272 | RET(14) |
16273 | } |
16274 | |
16275 | // MOVESRa |
16276 | OPCODE(0x40E8) |
16277 | { |
16278 | u32 adr, res; |
16279 | u32 src, dst; |
16280 | |
16281 | res = GET_SR; |
16282 | FETCH_SWORD(adr); |
16283 | adr += AREG((Opcode >> 0) & 7); |
16284 | PRE_IO |
16285 | WRITE_WORD_F(adr, res) |
16286 | POST_IO |
16287 | RET(16) |
16288 | } |
16289 | |
16290 | // MOVESRa |
16291 | OPCODE(0x40F0) |
16292 | { |
16293 | u32 adr, res; |
16294 | u32 src, dst; |
16295 | |
16296 | res = GET_SR; |
16297 | adr = AREG((Opcode >> 0) & 7); |
16298 | DECODE_EXT_WORD |
16299 | PRE_IO |
16300 | WRITE_WORD_F(adr, res) |
16301 | POST_IO |
16302 | RET(18) |
16303 | } |
16304 | |
16305 | // MOVESRa |
16306 | OPCODE(0x40F8) |
16307 | { |
16308 | u32 adr, res; |
16309 | u32 src, dst; |
16310 | |
16311 | res = GET_SR; |
16312 | FETCH_SWORD(adr); |
16313 | PRE_IO |
16314 | WRITE_WORD_F(adr, res) |
16315 | POST_IO |
16316 | RET(16) |
16317 | } |
16318 | |
16319 | // MOVESRa |
16320 | OPCODE(0x40F9) |
16321 | { |
16322 | u32 adr, res; |
16323 | u32 src, dst; |
16324 | |
16325 | res = GET_SR; |
16326 | FETCH_LONG(adr); |
16327 | PRE_IO |
16328 | WRITE_WORD_F(adr, res) |
16329 | POST_IO |
16330 | RET(20) |
16331 | } |
16332 | |
16333 | // MOVESRa |
16334 | OPCODE(0x40DF) |
16335 | { |
16336 | u32 adr, res; |
16337 | u32 src, dst; |
16338 | |
16339 | res = GET_SR; |
16340 | adr = AREG(7); |
16341 | AREG(7) += 2; |
16342 | PRE_IO |
16343 | WRITE_WORD_F(adr, res) |
16344 | POST_IO |
16345 | RET(12) |
16346 | } |
16347 | |
16348 | // MOVESRa |
16349 | OPCODE(0x40E7) |
16350 | { |
16351 | u32 adr, res; |
16352 | u32 src, dst; |
16353 | |
16354 | res = GET_SR; |
16355 | adr = AREG(7) - 2; |
16356 | AREG(7) = adr; |
16357 | PRE_IO |
16358 | WRITE_WORD_F(adr, res) |
16359 | POST_IO |
16360 | RET(14) |
16361 | } |
16362 | |
16363 | // MOVEaCCR |
16364 | OPCODE(0x44C0) |
16365 | { |
16366 | u32 adr, res; |
16367 | u32 src, dst; |
16368 | |
16369 | res = DREGu16((Opcode >> 0) & 7); |
16370 | SET_CCR(res) |
16371 | RET(12) |
16372 | } |
16373 | |
16374 | // MOVEaCCR |
16375 | OPCODE(0x44D0) |
16376 | { |
16377 | u32 adr, res; |
16378 | u32 src, dst; |
16379 | |
16380 | adr = AREG((Opcode >> 0) & 7); |
16381 | PRE_IO |
16382 | READ_WORD_F(adr, res) |
16383 | SET_CCR(res) |
16384 | POST_IO |
16385 | RET(16) |
16386 | } |
16387 | |
16388 | // MOVEaCCR |
16389 | OPCODE(0x44D8) |
16390 | { |
16391 | u32 adr, res; |
16392 | u32 src, dst; |
16393 | |
16394 | adr = AREG((Opcode >> 0) & 7); |
16395 | AREG((Opcode >> 0) & 7) += 2; |
16396 | PRE_IO |
16397 | READ_WORD_F(adr, res) |
16398 | SET_CCR(res) |
16399 | POST_IO |
16400 | RET(16) |
16401 | } |
16402 | |
16403 | // MOVEaCCR |
16404 | OPCODE(0x44E0) |
16405 | { |
16406 | u32 adr, res; |
16407 | u32 src, dst; |
16408 | |
16409 | adr = AREG((Opcode >> 0) & 7) - 2; |
16410 | AREG((Opcode >> 0) & 7) = adr; |
16411 | PRE_IO |
16412 | READ_WORD_F(adr, res) |
16413 | SET_CCR(res) |
16414 | POST_IO |
16415 | RET(18) |
16416 | } |
16417 | |
16418 | // MOVEaCCR |
16419 | OPCODE(0x44E8) |
16420 | { |
16421 | u32 adr, res; |
16422 | u32 src, dst; |
16423 | |
16424 | FETCH_SWORD(adr); |
16425 | adr += AREG((Opcode >> 0) & 7); |
16426 | PRE_IO |
16427 | READ_WORD_F(adr, res) |
16428 | SET_CCR(res) |
16429 | POST_IO |
16430 | RET(20) |
16431 | } |
16432 | |
16433 | // MOVEaCCR |
16434 | OPCODE(0x44F0) |
16435 | { |
16436 | u32 adr, res; |
16437 | u32 src, dst; |
16438 | |
16439 | adr = AREG((Opcode >> 0) & 7); |
16440 | DECODE_EXT_WORD |
16441 | PRE_IO |
16442 | READ_WORD_F(adr, res) |
16443 | SET_CCR(res) |
16444 | POST_IO |
16445 | RET(22) |
16446 | } |
16447 | |
16448 | // MOVEaCCR |
16449 | OPCODE(0x44F8) |
16450 | { |
16451 | u32 adr, res; |
16452 | u32 src, dst; |
16453 | |
16454 | FETCH_SWORD(adr); |
16455 | PRE_IO |
16456 | READ_WORD_F(adr, res) |
16457 | SET_CCR(res) |
16458 | POST_IO |
16459 | RET(20) |
16460 | } |
16461 | |
16462 | // MOVEaCCR |
16463 | OPCODE(0x44F9) |
16464 | { |
16465 | u32 adr, res; |
16466 | u32 src, dst; |
16467 | |
16468 | FETCH_LONG(adr); |
16469 | PRE_IO |
16470 | READ_WORD_F(adr, res) |
16471 | SET_CCR(res) |
16472 | POST_IO |
16473 | RET(24) |
16474 | } |
16475 | |
16476 | // MOVEaCCR |
16477 | OPCODE(0x44FA) |
16478 | { |
16479 | u32 adr, res; |
16480 | u32 src, dst; |
16481 | |
16482 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
16483 | PC++; |
16484 | PRE_IO |
16485 | READ_WORD_F(adr, res) |
16486 | SET_CCR(res) |
16487 | POST_IO |
16488 | RET(20) |
16489 | } |
16490 | |
16491 | // MOVEaCCR |
16492 | OPCODE(0x44FB) |
16493 | { |
16494 | u32 adr, res; |
16495 | u32 src, dst; |
16496 | |
16497 | adr = (u32)(PC) - BasePC; |
16498 | DECODE_EXT_WORD |
16499 | PRE_IO |
16500 | READ_WORD_F(adr, res) |
16501 | SET_CCR(res) |
16502 | POST_IO |
16503 | RET(22) |
16504 | } |
16505 | |
16506 | // MOVEaCCR |
16507 | OPCODE(0x44FC) |
16508 | { |
16509 | u32 adr, res; |
16510 | u32 src, dst; |
16511 | |
16512 | FETCH_WORD(res); |
16513 | SET_CCR(res) |
16514 | RET(16) |
16515 | } |
16516 | |
16517 | // MOVEaCCR |
16518 | OPCODE(0x44DF) |
16519 | { |
16520 | u32 adr, res; |
16521 | u32 src, dst; |
16522 | |
16523 | adr = AREG(7); |
16524 | AREG(7) += 2; |
16525 | PRE_IO |
16526 | READ_WORD_F(adr, res) |
16527 | SET_CCR(res) |
16528 | POST_IO |
16529 | RET(16) |
16530 | } |
16531 | |
16532 | // MOVEaCCR |
16533 | OPCODE(0x44E7) |
16534 | { |
16535 | u32 adr, res; |
16536 | u32 src, dst; |
16537 | |
16538 | adr = AREG(7) - 2; |
16539 | AREG(7) = adr; |
16540 | PRE_IO |
16541 | READ_WORD_F(adr, res) |
16542 | SET_CCR(res) |
16543 | POST_IO |
16544 | RET(18) |
16545 | } |
16546 | |
16547 | // MOVEaSR |
16548 | OPCODE(0x46C0) |
16549 | { |
16550 | u32 adr, res; |
16551 | u32 src, dst; |
16552 | |
16553 | if (flag_S) |
16554 | { |
16555 | res = DREGu16((Opcode >> 0) & 7); |
16556 | SET_SR(res) |
16557 | if (!flag_S) |
16558 | { |
16559 | res = AREG(7); |
16560 | AREG(7) = ASP; |
16561 | ASP = res; |
16562 | } |
16563 | CHECK_INT_TO_JUMP(12) |
16564 | } |
16565 | else |
16566 | { |
d0ae0cb4 |
16567 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16568 | RET(4) |
16569 | } |
16570 | RET(12) |
16571 | } |
16572 | |
16573 | // MOVEaSR |
16574 | OPCODE(0x46D0) |
16575 | { |
16576 | u32 adr, res; |
16577 | u32 src, dst; |
16578 | |
16579 | if (flag_S) |
16580 | { |
16581 | adr = AREG((Opcode >> 0) & 7); |
16582 | PRE_IO |
16583 | READ_WORD_F(adr, res) |
16584 | SET_SR(res) |
16585 | if (!flag_S) |
16586 | { |
16587 | res = AREG(7); |
16588 | AREG(7) = ASP; |
16589 | ASP = res; |
16590 | } |
16591 | POST_IO |
16592 | CHECK_INT_TO_JUMP(16) |
16593 | } |
16594 | else |
16595 | { |
d0ae0cb4 |
16596 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16597 | RET(4) |
16598 | } |
16599 | RET(16) |
16600 | } |
16601 | |
16602 | // MOVEaSR |
16603 | OPCODE(0x46D8) |
16604 | { |
16605 | u32 adr, res; |
16606 | u32 src, dst; |
16607 | |
16608 | if (flag_S) |
16609 | { |
16610 | adr = AREG((Opcode >> 0) & 7); |
16611 | AREG((Opcode >> 0) & 7) += 2; |
16612 | PRE_IO |
16613 | READ_WORD_F(adr, res) |
16614 | SET_SR(res) |
16615 | if (!flag_S) |
16616 | { |
16617 | res = AREG(7); |
16618 | AREG(7) = ASP; |
16619 | ASP = res; |
16620 | } |
16621 | POST_IO |
16622 | CHECK_INT_TO_JUMP(16) |
16623 | } |
16624 | else |
16625 | { |
d0ae0cb4 |
16626 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16627 | RET(4) |
16628 | } |
16629 | RET(16) |
16630 | } |
16631 | |
16632 | // MOVEaSR |
16633 | OPCODE(0x46E0) |
16634 | { |
16635 | u32 adr, res; |
16636 | u32 src, dst; |
16637 | |
16638 | if (flag_S) |
16639 | { |
16640 | adr = AREG((Opcode >> 0) & 7) - 2; |
16641 | AREG((Opcode >> 0) & 7) = adr; |
16642 | PRE_IO |
16643 | READ_WORD_F(adr, res) |
16644 | SET_SR(res) |
16645 | if (!flag_S) |
16646 | { |
16647 | res = AREG(7); |
16648 | AREG(7) = ASP; |
16649 | ASP = res; |
16650 | } |
16651 | POST_IO |
16652 | CHECK_INT_TO_JUMP(18) |
16653 | } |
16654 | else |
16655 | { |
d0ae0cb4 |
16656 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16657 | RET(4) |
16658 | } |
16659 | RET(18) |
16660 | } |
16661 | |
16662 | // MOVEaSR |
16663 | OPCODE(0x46E8) |
16664 | { |
16665 | u32 adr, res; |
16666 | u32 src, dst; |
16667 | |
16668 | if (flag_S) |
16669 | { |
16670 | FETCH_SWORD(adr); |
16671 | adr += AREG((Opcode >> 0) & 7); |
16672 | PRE_IO |
16673 | READ_WORD_F(adr, res) |
16674 | SET_SR(res) |
16675 | if (!flag_S) |
16676 | { |
16677 | res = AREG(7); |
16678 | AREG(7) = ASP; |
16679 | ASP = res; |
16680 | } |
16681 | POST_IO |
16682 | CHECK_INT_TO_JUMP(20) |
16683 | } |
16684 | else |
16685 | { |
d0ae0cb4 |
16686 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16687 | RET(4) |
16688 | } |
16689 | RET(20) |
16690 | } |
16691 | |
16692 | // MOVEaSR |
16693 | OPCODE(0x46F0) |
16694 | { |
16695 | u32 adr, res; |
16696 | u32 src, dst; |
16697 | |
16698 | if (flag_S) |
16699 | { |
16700 | adr = AREG((Opcode >> 0) & 7); |
16701 | DECODE_EXT_WORD |
16702 | PRE_IO |
16703 | READ_WORD_F(adr, res) |
16704 | SET_SR(res) |
16705 | if (!flag_S) |
16706 | { |
16707 | res = AREG(7); |
16708 | AREG(7) = ASP; |
16709 | ASP = res; |
16710 | } |
16711 | POST_IO |
16712 | CHECK_INT_TO_JUMP(22) |
16713 | } |
16714 | else |
16715 | { |
d0ae0cb4 |
16716 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16717 | RET(4) |
16718 | } |
16719 | RET(22) |
16720 | } |
16721 | |
16722 | |
16723 | // MOVEaSR |
16724 | OPCODE(0x46F8) |
16725 | { |
16726 | u32 adr, res; |
16727 | u32 src, dst; |
16728 | |
16729 | if (flag_S) |
16730 | { |
16731 | FETCH_SWORD(adr); |
16732 | PRE_IO |
16733 | READ_WORD_F(adr, res) |
16734 | SET_SR(res) |
16735 | if (!flag_S) |
16736 | { |
16737 | res = AREG(7); |
16738 | AREG(7) = ASP; |
16739 | ASP = res; |
16740 | } |
16741 | POST_IO |
16742 | CHECK_INT_TO_JUMP(20) |
16743 | } |
16744 | else |
16745 | { |
d0ae0cb4 |
16746 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16747 | RET(4) |
16748 | } |
16749 | RET(20) |
16750 | } |
16751 | |
16752 | // MOVEaSR |
16753 | OPCODE(0x46F9) |
16754 | { |
16755 | u32 adr, res; |
16756 | u32 src, dst; |
16757 | |
16758 | if (flag_S) |
16759 | { |
16760 | FETCH_LONG(adr); |
16761 | PRE_IO |
16762 | READ_WORD_F(adr, res) |
16763 | SET_SR(res) |
16764 | if (!flag_S) |
16765 | { |
16766 | res = AREG(7); |
16767 | AREG(7) = ASP; |
16768 | ASP = res; |
16769 | } |
16770 | POST_IO |
16771 | CHECK_INT_TO_JUMP(24) |
16772 | } |
16773 | else |
16774 | { |
d0ae0cb4 |
16775 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16776 | RET(4) |
16777 | } |
16778 | RET(24) |
16779 | } |
16780 | |
16781 | // MOVEaSR |
16782 | OPCODE(0x46FA) |
16783 | { |
16784 | u32 adr, res; |
16785 | u32 src, dst; |
16786 | |
16787 | if (flag_S) |
16788 | { |
16789 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
16790 | PC++; |
16791 | PRE_IO |
16792 | READ_WORD_F(adr, res) |
16793 | SET_SR(res) |
16794 | if (!flag_S) |
16795 | { |
16796 | res = AREG(7); |
16797 | AREG(7) = ASP; |
16798 | ASP = res; |
16799 | } |
16800 | POST_IO |
d0ae0cb4 |
16801 | CHECK_INT_TO_JUMP(20) |
70357ce5 |
16802 | } |
16803 | else |
16804 | { |
d0ae0cb4 |
16805 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16806 | RET(4) |
16807 | } |
16808 | RET(20) |
16809 | } |
16810 | |
16811 | // MOVEaSR |
16812 | OPCODE(0x46FB) |
16813 | { |
16814 | u32 adr, res; |
16815 | u32 src, dst; |
16816 | |
16817 | if (flag_S) |
16818 | { |
16819 | adr = (u32)(PC) - BasePC; |
16820 | DECODE_EXT_WORD |
16821 | PRE_IO |
16822 | READ_WORD_F(adr, res) |
16823 | SET_SR(res) |
16824 | if (!flag_S) |
16825 | { |
16826 | res = AREG(7); |
16827 | AREG(7) = ASP; |
16828 | ASP = res; |
16829 | } |
16830 | POST_IO |
16831 | CHECK_INT_TO_JUMP(22) |
16832 | } |
16833 | else |
16834 | { |
d0ae0cb4 |
16835 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16836 | RET(4) |
16837 | } |
16838 | RET(22) |
16839 | } |
16840 | |
16841 | // MOVEaSR |
16842 | OPCODE(0x46FC) |
16843 | { |
16844 | u32 adr, res; |
16845 | u32 src, dst; |
16846 | |
16847 | if (flag_S) |
16848 | { |
16849 | FETCH_WORD(res); |
16850 | SET_SR(res) |
16851 | if (!flag_S) |
16852 | { |
16853 | res = AREG(7); |
16854 | AREG(7) = ASP; |
16855 | ASP = res; |
16856 | } |
16857 | CHECK_INT_TO_JUMP(16) |
16858 | } |
16859 | else |
16860 | { |
d0ae0cb4 |
16861 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16862 | RET(4) |
16863 | } |
16864 | RET(16) |
16865 | } |
16866 | |
16867 | // MOVEaSR |
16868 | OPCODE(0x46DF) |
16869 | { |
16870 | u32 adr, res; |
16871 | u32 src, dst; |
16872 | |
16873 | if (flag_S) |
16874 | { |
16875 | adr = AREG(7); |
16876 | AREG(7) += 2; |
16877 | PRE_IO |
16878 | READ_WORD_F(adr, res) |
16879 | SET_SR(res) |
16880 | if (!flag_S) |
16881 | { |
16882 | res = AREG(7); |
16883 | AREG(7) = ASP; |
16884 | ASP = res; |
16885 | } |
16886 | POST_IO |
16887 | CHECK_INT_TO_JUMP(16) |
16888 | } |
16889 | else |
16890 | { |
d0ae0cb4 |
16891 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16892 | RET(4) |
16893 | } |
16894 | RET(16) |
16895 | } |
16896 | |
16897 | // MOVEaSR |
16898 | OPCODE(0x46E7) |
16899 | { |
16900 | u32 adr, res; |
16901 | u32 src, dst; |
16902 | |
16903 | if (flag_S) |
16904 | { |
16905 | adr = AREG(7) - 2; |
16906 | AREG(7) = adr; |
16907 | PRE_IO |
16908 | READ_WORD_F(adr, res) |
16909 | SET_SR(res) |
16910 | if (!flag_S) |
16911 | { |
16912 | res = AREG(7); |
16913 | AREG(7) = ASP; |
16914 | ASP = res; |
16915 | } |
16916 | POST_IO |
16917 | CHECK_INT_TO_JUMP(18) |
16918 | } |
16919 | else |
16920 | { |
d0ae0cb4 |
16921 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16922 | RET(4) |
16923 | } |
16924 | RET(18) |
16925 | } |
16926 | |
16927 | // NBCD |
16928 | OPCODE(0x4800) |
16929 | { |
16930 | u32 adr, res; |
16931 | u32 src, dst; |
16932 | |
16933 | res = DREGu8((Opcode >> 0) & 7); |
16934 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16935 | |
16936 | if (res != 0x9a) |
16937 | { |
16938 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16939 | res &= 0xFF; |
16940 | DREGu8((Opcode >> 0) & 7) = res; |
16941 | flag_NotZ |= res; |
16942 | flag_X = flag_C = M68K_SR_C; |
16943 | } |
16944 | else flag_X = flag_C = 0; |
16945 | flag_N = res; |
16946 | RET(6) |
16947 | } |
16948 | |
16949 | // NBCD |
16950 | OPCODE(0x4810) |
16951 | { |
16952 | u32 adr, res; |
16953 | u32 src, dst; |
16954 | |
16955 | adr = AREG((Opcode >> 0) & 7); |
16956 | PRE_IO |
16957 | READ_BYTE_F(adr, res) |
16958 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16959 | |
16960 | if (res != 0x9a) |
16961 | { |
16962 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16963 | res &= 0xFF; |
16964 | WRITE_BYTE_F(adr, res) |
16965 | flag_NotZ |= res; |
16966 | flag_X = flag_C = M68K_SR_C; |
16967 | } |
16968 | else flag_X = flag_C = 0; |
16969 | flag_N = res; |
16970 | POST_IO |
16971 | RET(12) |
16972 | } |
16973 | |
16974 | // NBCD |
16975 | OPCODE(0x4818) |
16976 | { |
16977 | u32 adr, res; |
16978 | u32 src, dst; |
16979 | |
16980 | adr = AREG((Opcode >> 0) & 7); |
16981 | AREG((Opcode >> 0) & 7) += 1; |
16982 | PRE_IO |
16983 | READ_BYTE_F(adr, res) |
16984 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16985 | |
16986 | if (res != 0x9a) |
16987 | { |
16988 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16989 | res &= 0xFF; |
16990 | WRITE_BYTE_F(adr, res) |
16991 | flag_NotZ |= res; |
16992 | flag_X = flag_C = M68K_SR_C; |
16993 | } |
16994 | else flag_X = flag_C = 0; |
16995 | flag_N = res; |
16996 | POST_IO |
16997 | RET(12) |
16998 | } |
16999 | |
17000 | // NBCD |
17001 | OPCODE(0x4820) |
17002 | { |
17003 | u32 adr, res; |
17004 | u32 src, dst; |
17005 | |
17006 | adr = AREG((Opcode >> 0) & 7) - 1; |
17007 | AREG((Opcode >> 0) & 7) = adr; |
17008 | PRE_IO |
17009 | READ_BYTE_F(adr, res) |
17010 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17011 | |
17012 | if (res != 0x9a) |
17013 | { |
17014 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17015 | res &= 0xFF; |
17016 | WRITE_BYTE_F(adr, res) |
17017 | flag_NotZ |= res; |
17018 | flag_X = flag_C = M68K_SR_C; |
17019 | } |
17020 | else flag_X = flag_C = 0; |
17021 | flag_N = res; |
17022 | POST_IO |
17023 | RET(14) |
17024 | } |
17025 | |
17026 | // NBCD |
17027 | OPCODE(0x4828) |
17028 | { |
17029 | u32 adr, res; |
17030 | u32 src, dst; |
17031 | |
17032 | FETCH_SWORD(adr); |
17033 | adr += AREG((Opcode >> 0) & 7); |
17034 | PRE_IO |
17035 | READ_BYTE_F(adr, res) |
17036 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17037 | |
17038 | if (res != 0x9a) |
17039 | { |
17040 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17041 | res &= 0xFF; |
17042 | WRITE_BYTE_F(adr, res) |
17043 | flag_NotZ |= res; |
17044 | flag_X = flag_C = M68K_SR_C; |
17045 | } |
17046 | else flag_X = flag_C = 0; |
17047 | flag_N = res; |
17048 | POST_IO |
17049 | RET(16) |
17050 | } |
17051 | |
17052 | // NBCD |
17053 | OPCODE(0x4830) |
17054 | { |
17055 | u32 adr, res; |
17056 | u32 src, dst; |
17057 | |
17058 | adr = AREG((Opcode >> 0) & 7); |
17059 | DECODE_EXT_WORD |
17060 | PRE_IO |
17061 | READ_BYTE_F(adr, res) |
17062 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17063 | |
17064 | if (res != 0x9a) |
17065 | { |
17066 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17067 | res &= 0xFF; |
17068 | WRITE_BYTE_F(adr, res) |
17069 | flag_NotZ |= res; |
17070 | flag_X = flag_C = M68K_SR_C; |
17071 | } |
17072 | else flag_X = flag_C = 0; |
17073 | flag_N = res; |
17074 | POST_IO |
17075 | RET(18) |
17076 | } |
17077 | |
17078 | // NBCD |
17079 | OPCODE(0x4838) |
17080 | { |
17081 | u32 adr, res; |
17082 | u32 src, dst; |
17083 | |
17084 | FETCH_SWORD(adr); |
17085 | PRE_IO |
17086 | READ_BYTE_F(adr, res) |
17087 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17088 | |
17089 | if (res != 0x9a) |
17090 | { |
17091 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17092 | res &= 0xFF; |
17093 | WRITE_BYTE_F(adr, res) |
17094 | flag_NotZ |= res; |
17095 | flag_X = flag_C = M68K_SR_C; |
17096 | } |
17097 | else flag_X = flag_C = 0; |
17098 | flag_N = res; |
17099 | POST_IO |
17100 | RET(16) |
17101 | } |
17102 | |
17103 | // NBCD |
17104 | OPCODE(0x4839) |
17105 | { |
17106 | u32 adr, res; |
17107 | u32 src, dst; |
17108 | |
17109 | FETCH_LONG(adr); |
17110 | PRE_IO |
17111 | READ_BYTE_F(adr, res) |
17112 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17113 | |
17114 | if (res != 0x9a) |
17115 | { |
17116 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17117 | res &= 0xFF; |
17118 | WRITE_BYTE_F(adr, res) |
17119 | flag_NotZ |= res; |
17120 | flag_X = flag_C = M68K_SR_C; |
17121 | } |
17122 | else flag_X = flag_C = 0; |
17123 | flag_N = res; |
17124 | POST_IO |
17125 | RET(20) |
17126 | } |
17127 | |
17128 | // NBCD |
17129 | OPCODE(0x481F) |
17130 | { |
17131 | u32 adr, res; |
17132 | u32 src, dst; |
17133 | |
17134 | adr = AREG(7); |
17135 | AREG(7) += 2; |
17136 | PRE_IO |
17137 | READ_BYTE_F(adr, res) |
17138 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17139 | |
17140 | if (res != 0x9a) |
17141 | { |
17142 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17143 | res &= 0xFF; |
17144 | WRITE_BYTE_F(adr, res) |
17145 | flag_NotZ |= res; |
17146 | flag_X = flag_C = M68K_SR_C; |
17147 | } |
17148 | else flag_X = flag_C = 0; |
17149 | flag_N = res; |
17150 | POST_IO |
17151 | RET(12) |
17152 | } |
17153 | |
17154 | // NBCD |
17155 | OPCODE(0x4827) |
17156 | { |
17157 | u32 adr, res; |
17158 | u32 src, dst; |
17159 | |
17160 | adr = AREG(7) - 2; |
17161 | AREG(7) = adr; |
17162 | PRE_IO |
17163 | READ_BYTE_F(adr, res) |
17164 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17165 | |
17166 | if (res != 0x9a) |
17167 | { |
17168 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17169 | res &= 0xFF; |
17170 | WRITE_BYTE_F(adr, res) |
17171 | flag_NotZ |= res; |
17172 | flag_X = flag_C = M68K_SR_C; |
17173 | } |
17174 | else flag_X = flag_C = 0; |
17175 | flag_N = res; |
17176 | POST_IO |
17177 | RET(14) |
17178 | } |
17179 | |
17180 | // PEA |
17181 | OPCODE(0x4850) |
17182 | { |
17183 | u32 adr, res; |
17184 | u32 src, dst; |
17185 | |
17186 | adr = AREG((Opcode >> 0) & 7); |
17187 | PRE_IO |
17188 | PUSH_32_F(adr) |
17189 | POST_IO |
17190 | RET(12) |
17191 | } |
17192 | |
17193 | // PEA |
17194 | OPCODE(0x4868) |
17195 | { |
17196 | u32 adr, res; |
17197 | u32 src, dst; |
17198 | |
17199 | FETCH_SWORD(adr); |
17200 | adr += AREG((Opcode >> 0) & 7); |
17201 | PRE_IO |
17202 | PUSH_32_F(adr) |
17203 | POST_IO |
17204 | RET(16) |
17205 | } |
17206 | |
17207 | // PEA |
17208 | OPCODE(0x4870) |
17209 | { |
17210 | u32 adr, res; |
17211 | u32 src, dst; |
17212 | |
17213 | adr = AREG((Opcode >> 0) & 7); |
17214 | DECODE_EXT_WORD |
17215 | PRE_IO |
17216 | PUSH_32_F(adr) |
17217 | POST_IO |
17218 | RET(20) |
17219 | } |
17220 | |
17221 | // PEA |
17222 | OPCODE(0x4878) |
17223 | { |
17224 | u32 adr, res; |
17225 | u32 src, dst; |
17226 | |
17227 | FETCH_SWORD(adr); |
17228 | PRE_IO |
17229 | PUSH_32_F(adr) |
17230 | POST_IO |
17231 | RET(16) |
17232 | } |
17233 | |
17234 | // PEA |
17235 | OPCODE(0x4879) |
17236 | { |
17237 | u32 adr, res; |
17238 | u32 src, dst; |
17239 | |
17240 | FETCH_LONG(adr); |
17241 | PRE_IO |
17242 | PUSH_32_F(adr) |
17243 | POST_IO |
17244 | RET(20) |
17245 | } |
17246 | |
17247 | // PEA |
17248 | OPCODE(0x487A) |
17249 | { |
17250 | u32 adr, res; |
17251 | u32 src, dst; |
17252 | |
17253 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
17254 | PC++; |
17255 | PRE_IO |
17256 | PUSH_32_F(adr) |
17257 | POST_IO |
17258 | RET(16) |
17259 | } |
17260 | |
17261 | // PEA |
17262 | OPCODE(0x487B) |
17263 | { |
17264 | u32 adr, res; |
17265 | u32 src, dst; |
17266 | |
17267 | adr = (u32)(PC) - BasePC; |
17268 | DECODE_EXT_WORD |
17269 | PRE_IO |
17270 | PUSH_32_F(adr) |
17271 | POST_IO |
17272 | RET(20) |
17273 | } |
17274 | |
17275 | // SWAP |
17276 | OPCODE(0x4840) |
17277 | { |
17278 | u32 adr, res; |
17279 | u32 src, dst; |
17280 | |
17281 | res = DREGu32((Opcode >> 0) & 7); |
17282 | res = (res >> 16) | (res << 16); |
17283 | flag_C = 0; |
17284 | flag_V = 0; |
17285 | flag_NotZ = res; |
17286 | flag_N = res >> 24; |
17287 | DREGu32((Opcode >> 0) & 7) = res; |
17288 | RET(4) |
17289 | } |
17290 | |
17291 | // MOVEMRa |
17292 | OPCODE(0x4890) |
17293 | { |
17294 | u32 adr, res; |
17295 | u32 src, dst; |
17296 | |
17297 | u32 *psrc; |
17298 | |
17299 | FETCH_WORD(res); |
17300 | adr = AREG((Opcode >> 0) & 7); |
17301 | psrc = &DREGu32(0); |
17302 | dst = adr; |
17303 | PRE_IO |
17304 | do |
17305 | { |
17306 | if (res & 1) |
17307 | { |
17308 | WRITE_WORD_F(adr, *psrc) |
17309 | adr += 2; |
17310 | } |
17311 | psrc++; |
17312 | } while (res >>= 1); |
17313 | POST_IO |
17314 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17315 | #ifdef USE_CYCLONE_TIMING |
17316 | RET(8) |
17317 | #else |
17318 | RET(12) |
17319 | #endif |
17320 | } |
17321 | |
17322 | // MOVEMRa |
17323 | OPCODE(0x48A0) |
17324 | { |
17325 | u32 adr, res; |
17326 | u32 src, dst; |
17327 | |
17328 | u32 *psrc; |
17329 | |
17330 | FETCH_WORD(res); |
17331 | adr = AREG((Opcode >> 0) & 7); |
17332 | psrc = &AREGu32(7); |
17333 | dst = adr; |
17334 | PRE_IO |
17335 | do |
17336 | { |
17337 | if (res & 1) |
17338 | { |
17339 | adr -= 2; |
17340 | WRITE_WORD_F(adr, *psrc) |
17341 | } |
17342 | psrc--; |
17343 | } while (res >>= 1); |
17344 | AREG((Opcode >> 0) & 7) = adr; |
17345 | POST_IO |
17346 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17347 | RET(8) |
17348 | } |
17349 | |
17350 | // MOVEMRa |
17351 | OPCODE(0x48A8) |
17352 | { |
17353 | u32 adr, res; |
17354 | u32 src, dst; |
17355 | |
17356 | u32 *psrc; |
17357 | |
17358 | FETCH_WORD(res); |
17359 | FETCH_SWORD(adr); |
17360 | adr += AREG((Opcode >> 0) & 7); |
17361 | psrc = &DREGu32(0); |
17362 | dst = adr; |
17363 | PRE_IO |
17364 | do |
17365 | { |
17366 | if (res & 1) |
17367 | { |
17368 | WRITE_WORD_F(adr, *psrc) |
17369 | adr += 2; |
17370 | } |
17371 | psrc++; |
17372 | } while (res >>= 1); |
17373 | POST_IO |
17374 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17375 | #ifdef USE_CYCLONE_TIMING |
17376 | RET(12) |
17377 | #else |
17378 | RET(20) |
17379 | #endif |
17380 | } |
17381 | |
17382 | // MOVEMRa |
17383 | OPCODE(0x48B0) |
17384 | { |
17385 | u32 adr, res; |
17386 | u32 src, dst; |
17387 | |
17388 | u32 *psrc; |
17389 | |
17390 | FETCH_WORD(res); |
17391 | adr = AREG((Opcode >> 0) & 7); |
17392 | DECODE_EXT_WORD |
17393 | psrc = &DREGu32(0); |
17394 | dst = adr; |
17395 | PRE_IO |
17396 | do |
17397 | { |
17398 | if (res & 1) |
17399 | { |
17400 | WRITE_WORD_F(adr, *psrc) |
17401 | adr += 2; |
17402 | } |
17403 | psrc++; |
17404 | } while (res >>= 1); |
17405 | POST_IO |
17406 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17407 | #ifdef USE_CYCLONE_TIMING |
17408 | RET(14) |
17409 | #else |
17410 | RET(24) |
17411 | #endif |
17412 | } |
17413 | |
17414 | // MOVEMRa |
17415 | OPCODE(0x48B8) |
17416 | { |
17417 | u32 adr, res; |
17418 | u32 src, dst; |
17419 | |
17420 | u32 *psrc; |
17421 | |
17422 | FETCH_WORD(res); |
17423 | FETCH_SWORD(adr); |
17424 | psrc = &DREGu32(0); |
17425 | dst = adr; |
17426 | PRE_IO |
17427 | do |
17428 | { |
17429 | if (res & 1) |
17430 | { |
17431 | WRITE_WORD_F(adr, *psrc) |
17432 | adr += 2; |
17433 | } |
17434 | psrc++; |
17435 | } while (res >>= 1); |
17436 | POST_IO |
17437 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17438 | #ifdef USE_CYCLONE_TIMING |
17439 | RET(12) |
17440 | #else |
17441 | RET(20) |
17442 | #endif |
17443 | } |
17444 | |
17445 | // MOVEMRa |
17446 | OPCODE(0x48B9) |
17447 | { |
17448 | u32 adr, res; |
17449 | u32 src, dst; |
17450 | |
17451 | u32 *psrc; |
17452 | |
17453 | FETCH_WORD(res); |
17454 | FETCH_LONG(adr); |
17455 | psrc = &DREGu32(0); |
17456 | dst = adr; |
17457 | PRE_IO |
17458 | do |
17459 | { |
17460 | if (res & 1) |
17461 | { |
17462 | WRITE_WORD_F(adr, *psrc) |
17463 | adr += 2; |
17464 | } |
17465 | psrc++; |
17466 | } while (res >>= 1); |
17467 | POST_IO |
17468 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17469 | #ifdef USE_CYCLONE_TIMING |
17470 | RET(16) |
17471 | #else |
17472 | RET(28) |
17473 | #endif |
17474 | } |
17475 | |
17476 | // MOVEMRa |
17477 | OPCODE(0x48A7) |
17478 | { |
17479 | u32 adr, res; |
17480 | u32 src, dst; |
17481 | |
17482 | u32 *psrc; |
17483 | |
17484 | FETCH_WORD(res); |
17485 | adr = AREG(7); |
17486 | psrc = &AREGu32(7); |
17487 | dst = adr; |
17488 | PRE_IO |
17489 | do |
17490 | { |
17491 | if (res & 1) |
17492 | { |
17493 | adr -= 2; |
17494 | WRITE_WORD_F(adr, *psrc) |
17495 | } |
17496 | psrc--; |
17497 | } while (res >>= 1); |
17498 | AREG(7) = adr; |
17499 | POST_IO |
17500 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17501 | RET(8) |
17502 | } |
17503 | |
17504 | // MOVEMRa |
17505 | OPCODE(0x48D0) |
17506 | { |
17507 | u32 adr, res; |
17508 | u32 src, dst; |
17509 | |
17510 | u32 *psrc; |
17511 | |
17512 | FETCH_WORD(res); |
17513 | adr = AREG((Opcode >> 0) & 7); |
17514 | psrc = &DREGu32(0); |
17515 | dst = adr; |
17516 | PRE_IO |
17517 | do |
17518 | { |
17519 | if (res & 1) |
17520 | { |
17521 | WRITE_LONG_F(adr, *psrc) |
17522 | adr += 4; |
17523 | } |
17524 | psrc++; |
17525 | } while (res >>= 1); |
17526 | POST_IO |
17527 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17528 | #ifdef USE_CYCLONE_TIMING |
17529 | RET(8) |
17530 | #else |
17531 | RET(16) |
17532 | #endif |
17533 | } |
17534 | |
17535 | // MOVEMRa |
17536 | OPCODE(0x48E0) |
17537 | { |
17538 | u32 adr, res; |
17539 | u32 src, dst; |
17540 | |
17541 | u32 *psrc; |
17542 | |
17543 | FETCH_WORD(res); |
17544 | adr = AREG((Opcode >> 0) & 7); |
17545 | psrc = &AREGu32(7); |
17546 | dst = adr; |
17547 | PRE_IO |
17548 | do |
17549 | { |
17550 | if (res & 1) |
17551 | { |
17552 | adr -= 4; |
17553 | WRITE_LONG_DEC_F(adr, *psrc) |
17554 | } |
17555 | psrc--; |
17556 | } while (res >>= 1); |
17557 | AREG((Opcode >> 0) & 7) = adr; |
17558 | POST_IO |
17559 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17560 | RET(8) |
17561 | } |
17562 | |
17563 | // MOVEMRa |
17564 | OPCODE(0x48E8) |
17565 | { |
17566 | u32 adr, res; |
17567 | u32 src, dst; |
17568 | |
17569 | u32 *psrc; |
17570 | |
17571 | FETCH_WORD(res); |
17572 | FETCH_SWORD(adr); |
17573 | adr += AREG((Opcode >> 0) & 7); |
17574 | psrc = &DREGu32(0); |
17575 | dst = adr; |
17576 | PRE_IO |
17577 | do |
17578 | { |
17579 | if (res & 1) |
17580 | { |
17581 | WRITE_LONG_F(adr, *psrc) |
17582 | adr += 4; |
17583 | } |
17584 | psrc++; |
17585 | } while (res >>= 1); |
17586 | POST_IO |
17587 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17588 | #ifdef USE_CYCLONE_TIMING |
17589 | RET(12) |
17590 | #else |
17591 | RET(24) |
17592 | #endif |
17593 | } |
17594 | |
17595 | // MOVEMRa |
17596 | OPCODE(0x48F0) |
17597 | { |
17598 | u32 adr, res; |
17599 | u32 src, dst; |
17600 | |
17601 | u32 *psrc; |
17602 | |
17603 | FETCH_WORD(res); |
17604 | adr = AREG((Opcode >> 0) & 7); |
17605 | DECODE_EXT_WORD |
17606 | psrc = &DREGu32(0); |
17607 | dst = adr; |
17608 | PRE_IO |
17609 | do |
17610 | { |
17611 | if (res & 1) |
17612 | { |
17613 | WRITE_LONG_F(adr, *psrc) |
17614 | adr += 4; |
17615 | } |
17616 | psrc++; |
17617 | } while (res >>= 1); |
17618 | POST_IO |
17619 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17620 | #ifdef USE_CYCLONE_TIMING |
17621 | RET(14) |
17622 | #else |
17623 | RET(28) |
17624 | #endif |
17625 | } |
17626 | |
17627 | // MOVEMRa |
17628 | OPCODE(0x48F8) |
17629 | { |
17630 | u32 adr, res; |
17631 | u32 src, dst; |
17632 | |
17633 | u32 *psrc; |
17634 | |
17635 | FETCH_WORD(res); |
17636 | FETCH_SWORD(adr); |
17637 | psrc = &DREGu32(0); |
17638 | dst = adr; |
17639 | PRE_IO |
17640 | do |
17641 | { |
17642 | if (res & 1) |
17643 | { |
17644 | WRITE_LONG_F(adr, *psrc) |
17645 | adr += 4; |
17646 | } |
17647 | psrc++; |
17648 | } while (res >>= 1); |
17649 | POST_IO |
17650 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17651 | #ifdef USE_CYCLONE_TIMING |
17652 | RET(12) |
17653 | #else |
17654 | RET(24) |
17655 | #endif |
17656 | } |
17657 | |
17658 | // MOVEMRa |
17659 | OPCODE(0x48F9) |
17660 | { |
17661 | u32 adr, res; |
17662 | u32 src, dst; |
17663 | |
17664 | u32 *psrc; |
17665 | |
17666 | FETCH_WORD(res); |
17667 | FETCH_LONG(adr); |
17668 | psrc = &DREGu32(0); |
17669 | dst = adr; |
17670 | PRE_IO |
17671 | do |
17672 | { |
17673 | if (res & 1) |
17674 | { |
17675 | WRITE_LONG_F(adr, *psrc) |
17676 | adr += 4; |
17677 | } |
17678 | psrc++; |
17679 | } while (res >>= 1); |
17680 | POST_IO |
17681 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17682 | #ifdef USE_CYCLONE_TIMING |
17683 | RET(16) |
17684 | #else |
17685 | RET(32) |
17686 | #endif |
17687 | } |
17688 | |
17689 | // MOVEMRa |
17690 | OPCODE(0x48E7) |
17691 | { |
17692 | u32 adr, res; |
17693 | u32 src, dst; |
17694 | |
17695 | u32 *psrc; |
17696 | |
17697 | FETCH_WORD(res); |
17698 | adr = AREG(7); |
17699 | psrc = &AREGu32(7); |
17700 | dst = adr; |
17701 | PRE_IO |
17702 | do |
17703 | { |
17704 | if (res & 1) |
17705 | { |
17706 | adr -= 4; |
17707 | WRITE_LONG_DEC_F(adr, *psrc) |
17708 | } |
17709 | psrc--; |
17710 | } while (res >>= 1); |
17711 | AREG(7) = adr; |
17712 | POST_IO |
17713 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17714 | RET(8) |
17715 | } |
17716 | |
17717 | // EXT |
17718 | OPCODE(0x4880) |
17719 | { |
17720 | u32 adr, res; |
17721 | u32 src, dst; |
17722 | |
17723 | res = (s32)DREGs8((Opcode >> 0) & 7); |
17724 | flag_C = 0; |
17725 | flag_V = 0; |
17726 | flag_NotZ = res; |
17727 | flag_N = res; |
17728 | DREGu16((Opcode >> 0) & 7) = res; |
17729 | RET(4) |
17730 | } |
17731 | |
17732 | // EXT |
17733 | OPCODE(0x48C0) |
17734 | { |
17735 | u32 adr, res; |
17736 | u32 src, dst; |
17737 | |
17738 | res = (s32)DREGs16((Opcode >> 0) & 7); |
17739 | flag_C = 0; |
17740 | flag_V = 0; |
17741 | flag_NotZ = res; |
17742 | flag_N = res >> 8; |
17743 | DREGu32((Opcode >> 0) & 7) = res; |
17744 | RET(4) |
17745 | } |
17746 | |
17747 | // TST |
17748 | OPCODE(0x4A00) |
17749 | { |
17750 | u32 adr, res; |
17751 | u32 src, dst; |
17752 | |
17753 | res = DREGu8((Opcode >> 0) & 7); |
17754 | flag_C = 0; |
17755 | flag_V = 0; |
17756 | flag_NotZ = res; |
17757 | flag_N = res; |
17758 | RET(4) |
17759 | } |
17760 | |
17761 | // TST |
17762 | OPCODE(0x4A10) |
17763 | { |
17764 | u32 adr, res; |
17765 | u32 src, dst; |
17766 | |
17767 | adr = AREG((Opcode >> 0) & 7); |
17768 | PRE_IO |
17769 | READ_BYTE_F(adr, res) |
17770 | flag_C = 0; |
17771 | flag_V = 0; |
17772 | flag_NotZ = res; |
17773 | flag_N = res; |
17774 | POST_IO |
17775 | RET(8) |
17776 | } |
17777 | |
17778 | // TST |
17779 | OPCODE(0x4A18) |
17780 | { |
17781 | u32 adr, res; |
17782 | u32 src, dst; |
17783 | |
17784 | adr = AREG((Opcode >> 0) & 7); |
17785 | AREG((Opcode >> 0) & 7) += 1; |
17786 | PRE_IO |
17787 | READ_BYTE_F(adr, res) |
17788 | flag_C = 0; |
17789 | flag_V = 0; |
17790 | flag_NotZ = res; |
17791 | flag_N = res; |
17792 | POST_IO |
17793 | RET(8) |
17794 | } |
17795 | |
17796 | // TST |
17797 | OPCODE(0x4A20) |
17798 | { |
17799 | u32 adr, res; |
17800 | u32 src, dst; |
17801 | |
17802 | adr = AREG((Opcode >> 0) & 7) - 1; |
17803 | AREG((Opcode >> 0) & 7) = adr; |
17804 | PRE_IO |
17805 | READ_BYTE_F(adr, res) |
17806 | flag_C = 0; |
17807 | flag_V = 0; |
17808 | flag_NotZ = res; |
17809 | flag_N = res; |
17810 | POST_IO |
17811 | RET(10) |
17812 | } |
17813 | |
17814 | // TST |
17815 | OPCODE(0x4A28) |
17816 | { |
17817 | u32 adr, res; |
17818 | u32 src, dst; |
17819 | |
17820 | FETCH_SWORD(adr); |
17821 | adr += AREG((Opcode >> 0) & 7); |
17822 | PRE_IO |
17823 | READ_BYTE_F(adr, res) |
17824 | flag_C = 0; |
17825 | flag_V = 0; |
17826 | flag_NotZ = res; |
17827 | flag_N = res; |
17828 | POST_IO |
17829 | RET(12) |
17830 | } |
17831 | |
17832 | // TST |
17833 | OPCODE(0x4A30) |
17834 | { |
17835 | u32 adr, res; |
17836 | u32 src, dst; |
17837 | |
17838 | adr = AREG((Opcode >> 0) & 7); |
17839 | DECODE_EXT_WORD |
17840 | PRE_IO |
17841 | READ_BYTE_F(adr, res) |
17842 | flag_C = 0; |
17843 | flag_V = 0; |
17844 | flag_NotZ = res; |
17845 | flag_N = res; |
17846 | POST_IO |
17847 | RET(14) |
17848 | } |
17849 | |
17850 | // TST |
17851 | OPCODE(0x4A38) |
17852 | { |
17853 | u32 adr, res; |
17854 | u32 src, dst; |
17855 | |
17856 | FETCH_SWORD(adr); |
17857 | PRE_IO |
17858 | READ_BYTE_F(adr, res) |
17859 | flag_C = 0; |
17860 | flag_V = 0; |
17861 | flag_NotZ = res; |
17862 | flag_N = res; |
17863 | POST_IO |
17864 | RET(12) |
17865 | } |
17866 | |
17867 | // TST |
17868 | OPCODE(0x4A39) |
17869 | { |
17870 | u32 adr, res; |
17871 | u32 src, dst; |
17872 | |
17873 | FETCH_LONG(adr); |
17874 | PRE_IO |
17875 | READ_BYTE_F(adr, res) |
17876 | flag_C = 0; |
17877 | flag_V = 0; |
17878 | flag_NotZ = res; |
17879 | flag_N = res; |
17880 | POST_IO |
17881 | RET(16) |
17882 | } |
17883 | |
17884 | // TST |
17885 | OPCODE(0x4A1F) |
17886 | { |
17887 | u32 adr, res; |
17888 | u32 src, dst; |
17889 | |
17890 | adr = AREG(7); |
17891 | AREG(7) += 2; |
17892 | PRE_IO |
17893 | READ_BYTE_F(adr, res) |
17894 | flag_C = 0; |
17895 | flag_V = 0; |
17896 | flag_NotZ = res; |
17897 | flag_N = res; |
17898 | POST_IO |
17899 | RET(8) |
17900 | } |
17901 | |
17902 | // TST |
17903 | OPCODE(0x4A27) |
17904 | { |
17905 | u32 adr, res; |
17906 | u32 src, dst; |
17907 | |
17908 | adr = AREG(7) - 2; |
17909 | AREG(7) = adr; |
17910 | PRE_IO |
17911 | READ_BYTE_F(adr, res) |
17912 | flag_C = 0; |
17913 | flag_V = 0; |
17914 | flag_NotZ = res; |
17915 | flag_N = res; |
17916 | POST_IO |
17917 | RET(10) |
17918 | } |
17919 | |
17920 | // TST |
17921 | OPCODE(0x4A40) |
17922 | { |
17923 | u32 adr, res; |
17924 | u32 src, dst; |
17925 | |
17926 | res = DREGu16((Opcode >> 0) & 7); |
17927 | flag_C = 0; |
17928 | flag_V = 0; |
17929 | flag_NotZ = res; |
17930 | flag_N = res >> 8; |
17931 | RET(4) |
17932 | } |
17933 | |
17934 | // TST |
17935 | OPCODE(0x4A50) |
17936 | { |
17937 | u32 adr, res; |
17938 | u32 src, dst; |
17939 | |
17940 | adr = AREG((Opcode >> 0) & 7); |
17941 | PRE_IO |
17942 | READ_WORD_F(adr, res) |
17943 | flag_C = 0; |
17944 | flag_V = 0; |
17945 | flag_NotZ = res; |
17946 | flag_N = res >> 8; |
17947 | POST_IO |
17948 | RET(8) |
17949 | } |
17950 | |
17951 | // TST |
17952 | OPCODE(0x4A58) |
17953 | { |
17954 | u32 adr, res; |
17955 | u32 src, dst; |
17956 | |
17957 | adr = AREG((Opcode >> 0) & 7); |
17958 | AREG((Opcode >> 0) & 7) += 2; |
17959 | PRE_IO |
17960 | READ_WORD_F(adr, res) |
17961 | flag_C = 0; |
17962 | flag_V = 0; |
17963 | flag_NotZ = res; |
17964 | flag_N = res >> 8; |
17965 | POST_IO |
17966 | RET(8) |
17967 | } |
17968 | |
17969 | // TST |
17970 | OPCODE(0x4A60) |
17971 | { |
17972 | u32 adr, res; |
17973 | u32 src, dst; |
17974 | |
17975 | adr = AREG((Opcode >> 0) & 7) - 2; |
17976 | AREG((Opcode >> 0) & 7) = adr; |
17977 | PRE_IO |
17978 | READ_WORD_F(adr, res) |
17979 | flag_C = 0; |
17980 | flag_V = 0; |
17981 | flag_NotZ = res; |
17982 | flag_N = res >> 8; |
17983 | POST_IO |
17984 | RET(10) |
17985 | } |
17986 | |
17987 | // TST |
17988 | OPCODE(0x4A68) |
17989 | { |
17990 | u32 adr, res; |
17991 | u32 src, dst; |
17992 | |
17993 | FETCH_SWORD(adr); |
17994 | adr += AREG((Opcode >> 0) & 7); |
17995 | PRE_IO |
17996 | READ_WORD_F(adr, res) |
17997 | flag_C = 0; |
17998 | flag_V = 0; |
17999 | flag_NotZ = res; |
18000 | flag_N = res >> 8; |
18001 | POST_IO |
18002 | RET(12) |
18003 | } |
18004 | |
18005 | // TST |
18006 | OPCODE(0x4A70) |
18007 | { |
18008 | u32 adr, res; |
18009 | u32 src, dst; |
18010 | |
18011 | adr = AREG((Opcode >> 0) & 7); |
18012 | DECODE_EXT_WORD |
18013 | PRE_IO |
18014 | READ_WORD_F(adr, res) |
18015 | flag_C = 0; |
18016 | flag_V = 0; |
18017 | flag_NotZ = res; |
18018 | flag_N = res >> 8; |
18019 | POST_IO |
18020 | RET(14) |
18021 | } |
18022 | |
18023 | // TST |
18024 | OPCODE(0x4A78) |
18025 | { |
18026 | u32 adr, res; |
18027 | u32 src, dst; |
18028 | |
18029 | FETCH_SWORD(adr); |
18030 | PRE_IO |
18031 | READ_WORD_F(adr, res) |
18032 | flag_C = 0; |
18033 | flag_V = 0; |
18034 | flag_NotZ = res; |
18035 | flag_N = res >> 8; |
18036 | POST_IO |
18037 | RET(12) |
18038 | } |
18039 | |
18040 | // TST |
18041 | OPCODE(0x4A79) |
18042 | { |
18043 | u32 adr, res; |
18044 | u32 src, dst; |
18045 | |
18046 | FETCH_LONG(adr); |
18047 | PRE_IO |
18048 | READ_WORD_F(adr, res) |
18049 | flag_C = 0; |
18050 | flag_V = 0; |
18051 | flag_NotZ = res; |
18052 | flag_N = res >> 8; |
18053 | POST_IO |
18054 | RET(16) |
18055 | } |
18056 | |
18057 | // TST |
18058 | OPCODE(0x4A5F) |
18059 | { |
18060 | u32 adr, res; |
18061 | u32 src, dst; |
18062 | |
18063 | adr = AREG(7); |
18064 | AREG(7) += 2; |
18065 | PRE_IO |
18066 | READ_WORD_F(adr, res) |
18067 | flag_C = 0; |
18068 | flag_V = 0; |
18069 | flag_NotZ = res; |
18070 | flag_N = res >> 8; |
18071 | POST_IO |
18072 | RET(8) |
18073 | } |
18074 | |
18075 | // TST |
18076 | OPCODE(0x4A67) |
18077 | { |
18078 | u32 adr, res; |
18079 | u32 src, dst; |
18080 | |
18081 | adr = AREG(7) - 2; |
18082 | AREG(7) = adr; |
18083 | PRE_IO |
18084 | READ_WORD_F(adr, res) |
18085 | flag_C = 0; |
18086 | flag_V = 0; |
18087 | flag_NotZ = res; |
18088 | flag_N = res >> 8; |
18089 | POST_IO |
18090 | RET(10) |
18091 | } |
18092 | |
18093 | // TST |
18094 | OPCODE(0x4A80) |
18095 | { |
18096 | u32 adr, res; |
18097 | u32 src, dst; |
18098 | |
18099 | res = DREGu32((Opcode >> 0) & 7); |
18100 | flag_C = 0; |
18101 | flag_V = 0; |
18102 | flag_NotZ = res; |
18103 | flag_N = res >> 24; |
18104 | RET(4) |
18105 | } |
18106 | |
18107 | // TST |
18108 | OPCODE(0x4A90) |
18109 | { |
18110 | u32 adr, res; |
18111 | u32 src, dst; |
18112 | |
18113 | adr = AREG((Opcode >> 0) & 7); |
18114 | PRE_IO |
18115 | READ_LONG_F(adr, res) |
18116 | flag_C = 0; |
18117 | flag_V = 0; |
18118 | flag_NotZ = res; |
18119 | flag_N = res >> 24; |
18120 | POST_IO |
18121 | RET(12) |
18122 | } |
18123 | |
18124 | // TST |
18125 | OPCODE(0x4A98) |
18126 | { |
18127 | u32 adr, res; |
18128 | u32 src, dst; |
18129 | |
18130 | adr = AREG((Opcode >> 0) & 7); |
18131 | AREG((Opcode >> 0) & 7) += 4; |
18132 | PRE_IO |
18133 | READ_LONG_F(adr, res) |
18134 | flag_C = 0; |
18135 | flag_V = 0; |
18136 | flag_NotZ = res; |
18137 | flag_N = res >> 24; |
18138 | POST_IO |
18139 | RET(12) |
18140 | } |
18141 | |
18142 | // TST |
18143 | OPCODE(0x4AA0) |
18144 | { |
18145 | u32 adr, res; |
18146 | u32 src, dst; |
18147 | |
18148 | adr = AREG((Opcode >> 0) & 7) - 4; |
18149 | AREG((Opcode >> 0) & 7) = adr; |
18150 | PRE_IO |
18151 | READ_LONG_F(adr, res) |
18152 | flag_C = 0; |
18153 | flag_V = 0; |
18154 | flag_NotZ = res; |
18155 | flag_N = res >> 24; |
18156 | POST_IO |
18157 | RET(14) |
18158 | } |
18159 | |
18160 | // TST |
18161 | OPCODE(0x4AA8) |
18162 | { |
18163 | u32 adr, res; |
18164 | u32 src, dst; |
18165 | |
18166 | FETCH_SWORD(adr); |
18167 | adr += AREG((Opcode >> 0) & 7); |
18168 | PRE_IO |
18169 | READ_LONG_F(adr, res) |
18170 | flag_C = 0; |
18171 | flag_V = 0; |
18172 | flag_NotZ = res; |
18173 | flag_N = res >> 24; |
18174 | POST_IO |
18175 | RET(16) |
18176 | } |
18177 | |
18178 | // TST |
18179 | OPCODE(0x4AB0) |
18180 | { |
18181 | u32 adr, res; |
18182 | u32 src, dst; |
18183 | |
18184 | adr = AREG((Opcode >> 0) & 7); |
18185 | DECODE_EXT_WORD |
18186 | PRE_IO |
18187 | READ_LONG_F(adr, res) |
18188 | flag_C = 0; |
18189 | flag_V = 0; |
18190 | flag_NotZ = res; |
18191 | flag_N = res >> 24; |
18192 | POST_IO |
18193 | RET(18) |
18194 | } |
18195 | |
18196 | // TST |
18197 | OPCODE(0x4AB8) |
18198 | { |
18199 | u32 adr, res; |
18200 | u32 src, dst; |
18201 | |
18202 | FETCH_SWORD(adr); |
18203 | PRE_IO |
18204 | READ_LONG_F(adr, res) |
18205 | flag_C = 0; |
18206 | flag_V = 0; |
18207 | flag_NotZ = res; |
18208 | flag_N = res >> 24; |
18209 | POST_IO |
18210 | RET(16) |
18211 | } |
18212 | |
18213 | // TST |
18214 | OPCODE(0x4AB9) |
18215 | { |
18216 | u32 adr, res; |
18217 | u32 src, dst; |
18218 | |
18219 | FETCH_LONG(adr); |
18220 | PRE_IO |
18221 | READ_LONG_F(adr, res) |
18222 | flag_C = 0; |
18223 | flag_V = 0; |
18224 | flag_NotZ = res; |
18225 | flag_N = res >> 24; |
18226 | POST_IO |
18227 | RET(20) |
18228 | } |
18229 | |
18230 | // TST |
18231 | OPCODE(0x4A9F) |
18232 | { |
18233 | u32 adr, res; |
18234 | u32 src, dst; |
18235 | |
18236 | adr = AREG(7); |
18237 | AREG(7) += 4; |
18238 | PRE_IO |
18239 | READ_LONG_F(adr, res) |
18240 | flag_C = 0; |
18241 | flag_V = 0; |
18242 | flag_NotZ = res; |
18243 | flag_N = res >> 24; |
18244 | POST_IO |
18245 | RET(12) |
18246 | } |
18247 | |
18248 | // TST |
18249 | OPCODE(0x4AA7) |
18250 | { |
18251 | u32 adr, res; |
18252 | u32 src, dst; |
18253 | |
18254 | adr = AREG(7) - 4; |
18255 | AREG(7) = adr; |
18256 | PRE_IO |
18257 | READ_LONG_F(adr, res) |
18258 | flag_C = 0; |
18259 | flag_V = 0; |
18260 | flag_NotZ = res; |
18261 | flag_N = res >> 24; |
18262 | POST_IO |
18263 | RET(14) |
18264 | } |
18265 | |
18266 | // TAS |
18267 | OPCODE(0x4AC0) |
18268 | { |
18269 | u32 adr, res; |
18270 | u32 src, dst; |
18271 | |
18272 | res = DREGu8((Opcode >> 0) & 7); |
18273 | flag_C = 0; |
18274 | flag_V = 0; |
18275 | flag_NotZ = res; |
18276 | flag_N = res; |
18277 | res |= 0x80; |
18278 | DREGu8((Opcode >> 0) & 7) = res; |
18279 | RET(4) |
18280 | } |
18281 | |
18282 | // TAS |
18283 | OPCODE(0x4AD0) |
18284 | { |
18285 | u32 adr, res; |
18286 | u32 src, dst; |
18287 | |
18288 | adr = AREG((Opcode >> 0) & 7); |
18289 | PRE_IO |
18290 | READ_BYTE_F(adr, res) |
18291 | flag_C = 0; |
18292 | flag_V = 0; |
18293 | flag_NotZ = res; |
18294 | flag_N = res; |
b5e5172d |
18295 | #ifdef PICODRIVE_HACK |
18296 | if (g_m68kcontext == &PicoCpuFS68k) { |
18297 | res |= 0x80; |
18298 | WRITE_BYTE_F(adr, res); |
18299 | } |
18300 | #endif |
18301 | |
70357ce5 |
18302 | POST_IO |
b5e5172d |
18303 | #ifdef USE_CYCLONE_TIMING |
18304 | RET(18) |
18305 | #else |
70357ce5 |
18306 | RET(8) |
b5e5172d |
18307 | #endif |
70357ce5 |
18308 | } |
18309 | |
18310 | // TAS |
18311 | OPCODE(0x4AD8) |
18312 | { |
18313 | u32 adr, res; |
18314 | u32 src, dst; |
18315 | |
18316 | adr = AREG((Opcode >> 0) & 7); |
18317 | AREG((Opcode >> 0) & 7) += 1; |
18318 | PRE_IO |
18319 | READ_BYTE_F(adr, res) |
18320 | flag_C = 0; |
18321 | flag_V = 0; |
18322 | flag_NotZ = res; |
18323 | flag_N = res; |
b5e5172d |
18324 | |
18325 | #ifdef PICODRIVE_HACK |
18326 | if (g_m68kcontext == &PicoCpuFS68k) { |
18327 | res |= 0x80; |
18328 | WRITE_BYTE_F(adr, res); |
18329 | } |
18330 | #endif |
18331 | |
70357ce5 |
18332 | POST_IO |
b5e5172d |
18333 | #ifdef USE_CYCLONE_TIMING |
18334 | RET(18) |
18335 | #else |
70357ce5 |
18336 | RET(8) |
b5e5172d |
18337 | #endif |
70357ce5 |
18338 | } |
18339 | |
18340 | // TAS |
18341 | OPCODE(0x4AE0) |
18342 | { |
18343 | u32 adr, res; |
18344 | u32 src, dst; |
18345 | |
18346 | adr = AREG((Opcode >> 0) & 7) - 1; |
18347 | AREG((Opcode >> 0) & 7) = adr; |
18348 | PRE_IO |
18349 | READ_BYTE_F(adr, res) |
18350 | flag_C = 0; |
18351 | flag_V = 0; |
18352 | flag_NotZ = res; |
18353 | flag_N = res; |
b5e5172d |
18354 | |
18355 | #ifdef PICODRIVE_HACK |
18356 | if (g_m68kcontext == &PicoCpuFS68k) { |
18357 | res |= 0x80; |
18358 | WRITE_BYTE_F(adr, res); |
18359 | } |
18360 | #endif |
18361 | |
70357ce5 |
18362 | POST_IO |
b5e5172d |
18363 | #ifdef USE_CYCLONE_TIMING |
18364 | RET(20) |
18365 | #else |
70357ce5 |
18366 | RET(10) |
b5e5172d |
18367 | #endif |
70357ce5 |
18368 | } |
18369 | |
18370 | // TAS |
18371 | OPCODE(0x4AE8) |
18372 | { |
18373 | u32 adr, res; |
18374 | u32 src, dst; |
18375 | |
18376 | FETCH_SWORD(adr); |
18377 | adr += AREG((Opcode >> 0) & 7); |
18378 | PRE_IO |
18379 | READ_BYTE_F(adr, res) |
18380 | flag_C = 0; |
18381 | flag_V = 0; |
18382 | flag_NotZ = res; |
18383 | flag_N = res; |
b5e5172d |
18384 | |
18385 | #ifdef PICODRIVE_HACK |
18386 | if (g_m68kcontext == &PicoCpuFS68k) { |
18387 | res |= 0x80; |
18388 | WRITE_BYTE_F(adr, res); |
18389 | } |
18390 | #endif |
18391 | |
70357ce5 |
18392 | POST_IO |
b5e5172d |
18393 | #ifdef USE_CYCLONE_TIMING |
18394 | RET(22) |
18395 | #else |
70357ce5 |
18396 | RET(12) |
b5e5172d |
18397 | #endif |
70357ce5 |
18398 | } |
18399 | |
18400 | // TAS |
18401 | OPCODE(0x4AF0) |
18402 | { |
18403 | u32 adr, res; |
18404 | u32 src, dst; |
18405 | |
18406 | adr = AREG((Opcode >> 0) & 7); |
18407 | DECODE_EXT_WORD |
18408 | PRE_IO |
18409 | READ_BYTE_F(adr, res) |
18410 | flag_C = 0; |
18411 | flag_V = 0; |
18412 | flag_NotZ = res; |
18413 | flag_N = res; |
b5e5172d |
18414 | |
18415 | #ifdef PICODRIVE_HACK |
18416 | if (g_m68kcontext == &PicoCpuFS68k) { |
18417 | res |= 0x80; |
18418 | WRITE_BYTE_F(adr, res); |
18419 | } |
18420 | #endif |
18421 | |
70357ce5 |
18422 | POST_IO |
b5e5172d |
18423 | #ifdef USE_CYCLONE_TIMING |
18424 | RET(24) |
18425 | #else |
70357ce5 |
18426 | RET(14) |
b5e5172d |
18427 | #endif |
70357ce5 |
18428 | } |
18429 | |
18430 | // TAS |
18431 | OPCODE(0x4AF8) |
18432 | { |
18433 | u32 adr, res; |
18434 | u32 src, dst; |
18435 | |
18436 | FETCH_SWORD(adr); |
18437 | PRE_IO |
18438 | READ_BYTE_F(adr, res) |
18439 | flag_C = 0; |
18440 | flag_V = 0; |
18441 | flag_NotZ = res; |
18442 | flag_N = res; |
b5e5172d |
18443 | |
18444 | #ifdef PICODRIVE_HACK |
18445 | if (g_m68kcontext == &PicoCpuFS68k) { |
18446 | res |= 0x80; |
18447 | WRITE_BYTE_F(adr, res); |
18448 | } |
18449 | #endif |
18450 | |
70357ce5 |
18451 | POST_IO |
b5e5172d |
18452 | #ifdef USE_CYCLONE_TIMING |
18453 | RET(22) |
18454 | #else |
70357ce5 |
18455 | RET(12) |
b5e5172d |
18456 | #endif |
70357ce5 |
18457 | } |
18458 | |
18459 | // TAS |
18460 | OPCODE(0x4AF9) |
18461 | { |
18462 | u32 adr, res; |
18463 | u32 src, dst; |
18464 | |
18465 | FETCH_LONG(adr); |
18466 | PRE_IO |
18467 | READ_BYTE_F(adr, res) |
18468 | flag_C = 0; |
18469 | flag_V = 0; |
18470 | flag_NotZ = res; |
18471 | flag_N = res; |
b5e5172d |
18472 | |
18473 | #ifdef PICODRIVE_HACK |
18474 | if (g_m68kcontext == &PicoCpuFS68k) { |
18475 | res |= 0x80; |
18476 | WRITE_BYTE_F(adr, res); |
18477 | } |
18478 | #endif |
18479 | |
70357ce5 |
18480 | POST_IO |
b5e5172d |
18481 | #ifdef USE_CYCLONE_TIMING |
18482 | RET(26) |
18483 | #else |
70357ce5 |
18484 | RET(16) |
b5e5172d |
18485 | #endif |
70357ce5 |
18486 | } |
18487 | |
18488 | // TAS |
18489 | OPCODE(0x4ADF) |
18490 | { |
18491 | u32 adr, res; |
18492 | u32 src, dst; |
18493 | |
18494 | adr = AREG(7); |
18495 | AREG(7) += 2; |
18496 | PRE_IO |
18497 | READ_BYTE_F(adr, res) |
18498 | flag_C = 0; |
18499 | flag_V = 0; |
18500 | flag_NotZ = res; |
18501 | flag_N = res; |
b5e5172d |
18502 | |
18503 | #ifdef PICODRIVE_HACK |
18504 | if (g_m68kcontext == &PicoCpuFS68k) { |
18505 | res |= 0x80; |
18506 | WRITE_BYTE_F(adr, res); |
18507 | } |
18508 | #endif |
18509 | |
70357ce5 |
18510 | POST_IO |
b5e5172d |
18511 | #ifdef USE_CYCLONE_TIMING |
18512 | RET(18) |
18513 | #else |
70357ce5 |
18514 | RET(8) |
b5e5172d |
18515 | #endif |
70357ce5 |
18516 | } |
18517 | |
18518 | // TAS |
18519 | OPCODE(0x4AE7) |
18520 | { |
18521 | u32 adr, res; |
18522 | u32 src, dst; |
18523 | |
18524 | adr = AREG(7) - 2; |
18525 | AREG(7) = adr; |
18526 | PRE_IO |
18527 | READ_BYTE_F(adr, res) |
18528 | flag_C = 0; |
18529 | flag_V = 0; |
18530 | flag_NotZ = res; |
18531 | flag_N = res; |
b5e5172d |
18532 | |
18533 | #ifdef PICODRIVE_HACK |
18534 | if (g_m68kcontext == &PicoCpuFS68k) { |
18535 | res |= 0x80; |
18536 | WRITE_BYTE_F(adr, res); |
18537 | } |
18538 | #endif |
18539 | |
70357ce5 |
18540 | POST_IO |
b5e5172d |
18541 | #ifdef USE_CYCLONE_TIMING |
18542 | RET(20) |
18543 | #else |
18544 | RET(8) |
18545 | #endif |
70357ce5 |
18546 | } |
18547 | |
18548 | // ILLEGAL |
18549 | OPCODE(0x4AFC) |
18550 | { |
d0ae0cb4 |
18551 | SET_PC(execute_exception(M68K_ILLEGAL_INSTRUCTION_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18552 | RET(0) |
70357ce5 |
18553 | } |
18554 | |
18555 | // ILLEGAL A000-AFFF |
18556 | OPCODE(0xA000) |
18557 | { |
d0ae0cb4 |
18558 | SET_PC(execute_exception(M68K_1010_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18559 | RET(0) |
70357ce5 |
18560 | } |
18561 | |
18562 | // ILLEGAL F000-FFFF |
18563 | OPCODE(0xF000) |
18564 | { |
d0ae0cb4 |
18565 | SET_PC(execute_exception(M68K_1111_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18566 | RET(0) // 4 already taken by exc. handler |
70357ce5 |
18567 | } |
18568 | |
18569 | // MOVEMaR |
18570 | OPCODE(0x4C90) |
18571 | { |
18572 | u32 adr, res; |
18573 | u32 src, dst; |
18574 | |
18575 | s32 *psrc; |
18576 | |
18577 | FETCH_WORD(res); |
18578 | adr = AREG((Opcode >> 0) & 7); |
18579 | psrc = &DREGs32(0); |
18580 | dst = adr; |
18581 | PRE_IO |
18582 | do |
18583 | { |
18584 | if (res & 1) |
18585 | { |
18586 | READSX_WORD_F(adr, *psrc) |
18587 | adr += 2; |
18588 | } |
18589 | psrc++; |
18590 | } while (res >>= 1); |
18591 | POST_IO |
18592 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18593 | #ifdef USE_CYCLONE_TIMING |
18594 | RET(12) |
18595 | #else |
18596 | RET(16) |
18597 | #endif |
18598 | } |
18599 | |
18600 | // MOVEMaR |
18601 | OPCODE(0x4C98) |
18602 | { |
18603 | u32 adr, res; |
18604 | u32 src, dst; |
18605 | |
18606 | s32 *psrc; |
18607 | |
18608 | FETCH_WORD(res); |
18609 | adr = AREG((Opcode >> 0) & 7); |
18610 | psrc = &DREGs32(0); |
18611 | dst = adr; |
18612 | PRE_IO |
18613 | do |
18614 | { |
18615 | if (res & 1) |
18616 | { |
18617 | READSX_WORD_F(adr, *psrc) |
18618 | adr += 2; |
18619 | } |
18620 | psrc++; |
18621 | } while (res >>= 1); |
18622 | AREG((Opcode >> 0) & 7) = adr; |
18623 | POST_IO |
18624 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18625 | RET(12) |
18626 | } |
18627 | |
18628 | // MOVEMaR |
18629 | OPCODE(0x4CA8) |
18630 | { |
18631 | u32 adr, res; |
18632 | u32 src, dst; |
18633 | |
18634 | s32 *psrc; |
18635 | |
18636 | FETCH_WORD(res); |
18637 | FETCH_SWORD(adr); |
18638 | adr += AREG((Opcode >> 0) & 7); |
18639 | psrc = &DREGs32(0); |
18640 | dst = adr; |
18641 | PRE_IO |
18642 | do |
18643 | { |
18644 | if (res & 1) |
18645 | { |
18646 | READSX_WORD_F(adr, *psrc) |
18647 | adr += 2; |
18648 | } |
18649 | psrc++; |
18650 | } while (res >>= 1); |
18651 | POST_IO |
18652 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18653 | #ifdef USE_CYCLONE_TIMING |
18654 | RET(16) |
18655 | #else |
18656 | RET(24) |
18657 | #endif |
18658 | } |
18659 | |
18660 | // MOVEMaR |
18661 | OPCODE(0x4CB0) |
18662 | { |
18663 | u32 adr, res; |
18664 | u32 src, dst; |
18665 | |
18666 | s32 *psrc; |
18667 | |
18668 | FETCH_WORD(res); |
18669 | adr = AREG((Opcode >> 0) & 7); |
18670 | DECODE_EXT_WORD |
18671 | psrc = &DREGs32(0); |
18672 | dst = adr; |
18673 | PRE_IO |
18674 | do |
18675 | { |
18676 | if (res & 1) |
18677 | { |
18678 | READSX_WORD_F(adr, *psrc) |
18679 | adr += 2; |
18680 | } |
18681 | psrc++; |
18682 | } while (res >>= 1); |
18683 | POST_IO |
18684 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18685 | #ifdef USE_CYCLONE_TIMING |
18686 | RET(18) |
18687 | #else |
18688 | RET(28) |
18689 | #endif |
18690 | } |
18691 | |
18692 | // MOVEMaR |
18693 | OPCODE(0x4CB8) |
18694 | { |
18695 | u32 adr, res; |
18696 | u32 src, dst; |
18697 | |
18698 | s32 *psrc; |
18699 | |
18700 | FETCH_WORD(res); |
18701 | FETCH_SWORD(adr); |
18702 | psrc = &DREGs32(0); |
18703 | dst = adr; |
18704 | PRE_IO |
18705 | do |
18706 | { |
18707 | if (res & 1) |
18708 | { |
18709 | READSX_WORD_F(adr, *psrc) |
18710 | adr += 2; |
18711 | } |
18712 | psrc++; |
18713 | } while (res >>= 1); |
18714 | POST_IO |
18715 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18716 | #ifdef USE_CYCLONE_TIMING |
18717 | RET(16) |
18718 | #else |
18719 | RET(24) |
18720 | #endif |
18721 | } |
18722 | |
18723 | // MOVEMaR |
18724 | OPCODE(0x4CB9) |
18725 | { |
18726 | u32 adr, res; |
18727 | u32 src, dst; |
18728 | |
18729 | s32 *psrc; |
18730 | |
18731 | FETCH_WORD(res); |
18732 | FETCH_LONG(adr); |
18733 | psrc = &DREGs32(0); |
18734 | dst = adr; |
18735 | PRE_IO |
18736 | do |
18737 | { |
18738 | if (res & 1) |
18739 | { |
18740 | READSX_WORD_F(adr, *psrc) |
18741 | adr += 2; |
18742 | } |
18743 | psrc++; |
18744 | } while (res >>= 1); |
18745 | POST_IO |
18746 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18747 | #ifdef USE_CYCLONE_TIMING |
18748 | RET(20) |
18749 | #else |
18750 | RET(32) |
18751 | #endif |
18752 | } |
18753 | |
18754 | // MOVEMaR |
18755 | OPCODE(0x4CBA) |
18756 | { |
18757 | u32 adr, res; |
18758 | u32 src, dst; |
18759 | |
18760 | s32 *psrc; |
18761 | |
18762 | FETCH_WORD(res); |
18763 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
18764 | PC++; |
18765 | psrc = &DREGs32(0); |
18766 | dst = adr; |
18767 | PRE_IO |
18768 | do |
18769 | { |
18770 | if (res & 1) |
18771 | { |
18772 | READSX_WORD_F(adr, *psrc) |
18773 | adr += 2; |
18774 | } |
18775 | psrc++; |
18776 | } while (res >>= 1); |
18777 | POST_IO |
18778 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18779 | #ifdef USE_CYCLONE_TIMING |
18780 | RET(16) |
18781 | #else |
18782 | RET(24) |
18783 | #endif |
18784 | } |
18785 | |
18786 | // MOVEMaR |
18787 | OPCODE(0x4CBB) |
18788 | { |
18789 | u32 adr, res; |
18790 | u32 src, dst; |
18791 | |
18792 | s32 *psrc; |
18793 | |
18794 | FETCH_WORD(res); |
18795 | adr = (u32)(PC) - BasePC; |
18796 | DECODE_EXT_WORD |
18797 | psrc = &DREGs32(0); |
18798 | dst = adr; |
18799 | PRE_IO |
18800 | do |
18801 | { |
18802 | if (res & 1) |
18803 | { |
18804 | READSX_WORD_F(adr, *psrc) |
18805 | adr += 2; |
18806 | } |
18807 | psrc++; |
18808 | } while (res >>= 1); |
18809 | POST_IO |
18810 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18811 | #ifdef USE_CYCLONE_TIMING |
18812 | RET(18) |
18813 | #else |
18814 | RET(28) |
18815 | #endif |
18816 | } |
18817 | |
18818 | // MOVEMaR |
18819 | OPCODE(0x4C9F) |
18820 | { |
18821 | u32 adr, res; |
18822 | u32 src, dst; |
18823 | |
18824 | s32 *psrc; |
18825 | |
18826 | FETCH_WORD(res); |
18827 | adr = AREG(7); |
18828 | psrc = &DREGs32(0); |
18829 | dst = adr; |
18830 | PRE_IO |
18831 | do |
18832 | { |
18833 | if (res & 1) |
18834 | { |
18835 | READSX_WORD_F(adr, *psrc) |
18836 | adr += 2; |
18837 | } |
18838 | psrc++; |
18839 | } while (res >>= 1); |
18840 | AREG(7) = adr; |
18841 | POST_IO |
18842 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18843 | RET(12) |
18844 | } |
18845 | |
18846 | // MOVEMaR |
18847 | OPCODE(0x4CD0) |
18848 | { |
18849 | u32 adr, res; |
18850 | u32 src, dst; |
18851 | |
18852 | u32 *psrc; |
18853 | |
18854 | FETCH_WORD(res); |
18855 | adr = AREG((Opcode >> 0) & 7); |
18856 | psrc = &DREGu32(0); |
18857 | dst = adr; |
18858 | PRE_IO |
18859 | do |
18860 | { |
18861 | if (res & 1) |
18862 | { |
18863 | READ_LONG_F(adr, *psrc) |
18864 | adr += 4; |
18865 | } |
18866 | psrc++; |
18867 | } while (res >>= 1); |
18868 | POST_IO |
18869 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18870 | #ifdef USE_CYCLONE_TIMING |
18871 | RET(12) |
18872 | #else |
18873 | RET(20) |
18874 | #endif |
18875 | } |
18876 | |
18877 | // MOVEMaR |
18878 | OPCODE(0x4CD8) |
18879 | { |
18880 | u32 adr, res; |
18881 | u32 src, dst; |
18882 | |
18883 | u32 *psrc; |
18884 | |
18885 | FETCH_WORD(res); |
18886 | adr = AREG((Opcode >> 0) & 7); |
18887 | psrc = &DREGu32(0); |
18888 | dst = adr; |
18889 | PRE_IO |
18890 | do |
18891 | { |
18892 | if (res & 1) |
18893 | { |
18894 | READ_LONG_F(adr, *psrc) |
18895 | adr += 4; |
18896 | } |
18897 | psrc++; |
18898 | } while (res >>= 1); |
18899 | AREG((Opcode >> 0) & 7) = adr; |
18900 | POST_IO |
18901 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18902 | RET(12) |
18903 | } |
18904 | |
18905 | // MOVEMaR |
18906 | OPCODE(0x4CE8) |
18907 | { |
18908 | u32 adr, res; |
18909 | u32 src, dst; |
18910 | |
18911 | u32 *psrc; |
18912 | |
18913 | FETCH_WORD(res); |
18914 | FETCH_SWORD(adr); |
18915 | adr += AREG((Opcode >> 0) & 7); |
18916 | psrc = &DREGu32(0); |
18917 | dst = adr; |
18918 | PRE_IO |
18919 | do |
18920 | { |
18921 | if (res & 1) |
18922 | { |
18923 | READ_LONG_F(adr, *psrc) |
18924 | adr += 4; |
18925 | } |
18926 | psrc++; |
18927 | } while (res >>= 1); |
18928 | POST_IO |
18929 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18930 | #ifdef USE_CYCLONE_TIMING |
18931 | RET(16) |
18932 | #else |
18933 | RET(28) |
18934 | #endif |
18935 | } |
18936 | |
18937 | // MOVEMaR |
18938 | OPCODE(0x4CF0) |
18939 | { |
18940 | u32 adr, res; |
18941 | u32 src, dst; |
18942 | |
18943 | u32 *psrc; |
18944 | |
18945 | FETCH_WORD(res); |
18946 | adr = AREG((Opcode >> 0) & 7); |
18947 | DECODE_EXT_WORD |
18948 | psrc = &DREGu32(0); |
18949 | dst = adr; |
18950 | PRE_IO |
18951 | do |
18952 | { |
18953 | if (res & 1) |
18954 | { |
18955 | READ_LONG_F(adr, *psrc) |
18956 | adr += 4; |
18957 | } |
18958 | psrc++; |
18959 | } while (res >>= 1); |
18960 | POST_IO |
18961 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18962 | #ifdef USE_CYCLONE_TIMING |
18963 | RET(18) |
18964 | #else |
18965 | RET(32) |
18966 | #endif |
18967 | } |
18968 | |
18969 | // MOVEMaR |
18970 | OPCODE(0x4CF8) |
18971 | { |
18972 | u32 adr, res; |
18973 | u32 src, dst; |
18974 | |
18975 | u32 *psrc; |
18976 | |
18977 | FETCH_WORD(res); |
18978 | FETCH_SWORD(adr); |
18979 | psrc = &DREGu32(0); |
18980 | dst = adr; |
18981 | PRE_IO |
18982 | do |
18983 | { |
18984 | if (res & 1) |
18985 | { |
18986 | READ_LONG_F(adr, *psrc) |
18987 | adr += 4; |
18988 | } |
18989 | psrc++; |
18990 | } while (res >>= 1); |
18991 | POST_IO |
18992 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18993 | #ifdef USE_CYCLONE_TIMING |
18994 | RET(16) |
18995 | #else |
18996 | RET(28) |
18997 | #endif |
18998 | } |
18999 | |
19000 | // MOVEMaR |
19001 | OPCODE(0x4CF9) |
19002 | { |
19003 | u32 adr, res; |
19004 | u32 src, dst; |
19005 | |
19006 | u32 *psrc; |
19007 | |
19008 | FETCH_WORD(res); |
19009 | FETCH_LONG(adr); |
19010 | psrc = &DREGu32(0); |
19011 | dst = adr; |
19012 | PRE_IO |
19013 | do |
19014 | { |
19015 | if (res & 1) |
19016 | { |
19017 | READ_LONG_F(adr, *psrc) |
19018 | adr += 4; |
19019 | } |
19020 | psrc++; |
19021 | } while (res >>= 1); |
19022 | POST_IO |
19023 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19024 | #ifdef USE_CYCLONE_TIMING |
19025 | RET(20) |
19026 | #else |
19027 | RET(36) |
19028 | #endif |
19029 | } |
19030 | |
19031 | // MOVEMaR |
19032 | OPCODE(0x4CFA) |
19033 | { |
19034 | u32 adr, res; |
19035 | u32 src, dst; |
19036 | |
19037 | u32 *psrc; |
19038 | |
19039 | FETCH_WORD(res); |
19040 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19041 | PC++; |
19042 | psrc = &DREGu32(0); |
19043 | dst = adr; |
19044 | PRE_IO |
19045 | do |
19046 | { |
19047 | if (res & 1) |
19048 | { |
19049 | READ_LONG_F(adr, *psrc) |
19050 | adr += 4; |
19051 | } |
19052 | psrc++; |
19053 | } while (res >>= 1); |
19054 | POST_IO |
19055 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19056 | #ifdef USE_CYCLONE_TIMING |
19057 | RET(16) |
19058 | #else |
19059 | RET(28) |
19060 | #endif |
19061 | } |
19062 | |
19063 | // MOVEMaR |
19064 | OPCODE(0x4CFB) |
19065 | { |
19066 | u32 adr, res; |
19067 | u32 src, dst; |
19068 | |
19069 | u32 *psrc; |
19070 | |
19071 | FETCH_WORD(res); |
19072 | adr = (u32)(PC) - BasePC; |
19073 | DECODE_EXT_WORD |
19074 | psrc = &DREGu32(0); |
19075 | dst = adr; |
19076 | PRE_IO |
19077 | do |
19078 | { |
19079 | if (res & 1) |
19080 | { |
19081 | READ_LONG_F(adr, *psrc) |
19082 | adr += 4; |
19083 | } |
19084 | psrc++; |
19085 | } while (res >>= 1); |
19086 | POST_IO |
19087 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19088 | #ifdef USE_CYCLONE_TIMING |
19089 | RET(18) |
19090 | #else |
19091 | RET(32) |
19092 | #endif |
19093 | } |
19094 | |
19095 | // MOVEMaR |
19096 | OPCODE(0x4CDF) |
19097 | { |
19098 | u32 adr, res; |
19099 | u32 src, dst; |
19100 | |
19101 | u32 *psrc; |
19102 | |
19103 | FETCH_WORD(res); |
19104 | adr = AREG(7); |
19105 | psrc = &DREGu32(0); |
19106 | dst = adr; |
19107 | PRE_IO |
19108 | do |
19109 | { |
19110 | if (res & 1) |
19111 | { |
19112 | READ_LONG_F(adr, *psrc) |
19113 | adr += 4; |
19114 | } |
19115 | psrc++; |
19116 | } while (res >>= 1); |
19117 | AREG(7) = adr; |
19118 | POST_IO |
19119 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19120 | RET(12) |
19121 | } |
19122 | |
19123 | // TRAP |
19124 | OPCODE(0x4E40) |
19125 | { |
d0ae0cb4 |
19126 | SET_PC(execute_exception(M68K_TRAP_BASE_EX + (Opcode & 0xF), GET_PC, GET_SR)); |
70357ce5 |
19127 | RET(4) |
19128 | } |
19129 | |
19130 | // LINK |
19131 | OPCODE(0x4E50) |
19132 | { |
19133 | u32 adr, res; |
19134 | u32 src, dst; |
19135 | |
19136 | res = AREGu32((Opcode >> 0) & 7); |
19137 | PRE_IO |
19138 | PUSH_32_F(res) |
19139 | res = AREG(7); |
19140 | AREG((Opcode >> 0) & 7) = res; |
19141 | FETCH_SWORD(res); |
19142 | AREG(7) += res; |
19143 | POST_IO |
19144 | RET(16) |
19145 | } |
19146 | |
19147 | // LINKA7 |
19148 | OPCODE(0x4E57) |
19149 | { |
19150 | u32 adr, res; |
19151 | u32 src, dst; |
19152 | |
19153 | AREG(7) -= 4; |
19154 | PRE_IO |
19155 | WRITE_LONG_DEC_F(AREG(7), AREG(7)) |
19156 | FETCH_SWORD(res); |
19157 | AREG(7) += res; |
19158 | POST_IO |
19159 | RET(16) |
19160 | } |
19161 | |
19162 | // ULNK |
19163 | OPCODE(0x4E58) |
19164 | { |
19165 | u32 adr, res; |
19166 | u32 src, dst; |
19167 | |
19168 | src = AREGu32((Opcode >> 0) & 7); |
19169 | AREG(7) = src + 4; |
19170 | PRE_IO |
19171 | READ_LONG_F(src, res) |
19172 | AREG((Opcode >> 0) & 7) = res; |
19173 | POST_IO |
19174 | RET(12) |
19175 | } |
19176 | |
19177 | // ULNKA7 |
19178 | OPCODE(0x4E5F) |
19179 | { |
19180 | u32 adr, res; |
19181 | u32 src, dst; |
19182 | |
19183 | PRE_IO |
19184 | READ_LONG_F(AREG(7), AREG(7)) |
19185 | POST_IO |
19186 | RET(12) |
19187 | } |
19188 | |
19189 | // MOVEAUSP |
19190 | OPCODE(0x4E60) |
19191 | { |
19192 | u32 adr, res; |
19193 | u32 src, dst; |
19194 | |
19195 | if (!flag_S) |
19196 | { |
d0ae0cb4 |
19197 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19198 | RET(4) |
19199 | } |
19200 | res = AREGu32((Opcode >> 0) & 7); |
19201 | ASP = res; |
19202 | RET(4) |
19203 | } |
19204 | |
19205 | // MOVEUSPA |
19206 | OPCODE(0x4E68) |
19207 | { |
19208 | u32 adr, res; |
19209 | u32 src, dst; |
19210 | |
19211 | if (!flag_S) |
19212 | { |
d0ae0cb4 |
19213 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19214 | RET(4) |
19215 | } |
19216 | res = ASP; |
19217 | AREG((Opcode >> 0) & 7) = res; |
19218 | RET(4) |
19219 | } |
19220 | |
19221 | // RESET |
19222 | OPCODE(0x4E70) |
19223 | { |
19224 | u32 adr, res; |
19225 | u32 src, dst; |
19226 | |
19227 | if (!flag_S) |
19228 | { |
d0ae0cb4 |
19229 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19230 | RET(4) |
19231 | } |
19232 | PRE_IO |
19233 | if (m68kcontext.reset_handler) m68kcontext.reset_handler(); |
19234 | // CPU->Reset_CallBack(); |
19235 | POST_IO |
19236 | RET(132) |
19237 | } |
19238 | |
19239 | // NOP |
19240 | OPCODE(0x4E71) |
19241 | { |
19242 | RET(4) |
19243 | } |
19244 | |
19245 | // STOP |
19246 | OPCODE(0x4E72) |
19247 | { |
19248 | u32 adr, res; |
19249 | u32 src, dst; |
19250 | |
19251 | if (!flag_S) |
19252 | { |
d0ae0cb4 |
19253 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19254 | RET(4) |
19255 | } |
19256 | FETCH_WORD(res); |
19257 | res &= M68K_SR_MASK; |
19258 | SET_SR(res) |
19259 | if (!flag_S) |
19260 | { |
19261 | res = AREG(7); |
19262 | AREG(7) = ASP; |
19263 | ASP = res; |
19264 | } |
03e4f2a3 |
19265 | m68kcontext.execinfo |= FM68K_HALTED; |
70357ce5 |
19266 | m68kcontext.io_cycle_counter = 0; |
19267 | RET(4) |
19268 | } |
19269 | |
19270 | // RTE |
19271 | OPCODE(0x4E73) |
19272 | { |
19273 | u32 adr, res; |
19274 | u32 src, dst; |
19275 | |
19276 | if (!flag_S) |
19277 | { |
d0ae0cb4 |
19278 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19279 | RET(4) |
19280 | } |
19281 | PRE_IO |
19282 | POP_16_F(res) |
19283 | SET_SR(res) |
19284 | POP_32_F(res) |
19285 | SET_PC(res) |
19286 | if (!flag_S) |
19287 | { |
19288 | res = AREG(7); |
19289 | AREG(7) = ASP; |
19290 | ASP = res; |
19291 | } |
19292 | POST_IO |
03e4f2a3 |
19293 | m68kcontext.execinfo &= ~(FM68K_EMULATE_GROUP_0|FM68K_EMULATE_TRACE|FM68K_DO_TRACE); |
70357ce5 |
19294 | CHECK_INT_TO_JUMP(20) |
19295 | RET(20) |
19296 | } |
19297 | |
19298 | // RTS |
19299 | OPCODE(0x4E75) |
19300 | { |
19301 | u32 adr, res; |
19302 | u32 src, dst; |
19303 | |
19304 | PRE_IO |
19305 | POP_32_F(res) |
19306 | SET_PC(res) |
19307 | CHECK_BRANCH_EXCEPTION(res) |
19308 | POST_IO |
19309 | RET(16) |
19310 | } |
19311 | |
19312 | // TRAPV |
19313 | OPCODE(0x4E76) |
19314 | { |
19315 | if (flag_V & 0x80) |
d0ae0cb4 |
19316 | SET_PC(execute_exception(M68K_TRAPV_EX, GET_PC, GET_SR)); |
70357ce5 |
19317 | RET(4) |
19318 | } |
19319 | |
19320 | // RTR |
19321 | OPCODE(0x4E77) |
19322 | { |
19323 | u32 adr, res; |
19324 | u32 src, dst; |
19325 | |
19326 | PRE_IO |
19327 | POP_16_F(res) |
19328 | SET_CCR(res) |
19329 | POP_32_F(res) |
19330 | SET_PC(res) |
19331 | CHECK_BRANCH_EXCEPTION(res) |
19332 | POST_IO |
19333 | RET(20) |
19334 | } |
19335 | |
19336 | // JSR |
19337 | OPCODE(0x4E90) |
19338 | { |
19339 | u32 adr, res; |
19340 | u32 src, dst; |
19341 | |
19342 | adr = AREG((Opcode >> 0) & 7); |
19343 | { |
19344 | u32 oldPC; |
19345 | |
19346 | oldPC = (u32)(PC) - BasePC; |
19347 | PRE_IO |
19348 | PUSH_32_F(oldPC) |
19349 | } |
19350 | SET_PC(adr) |
19351 | CHECK_BRANCH_EXCEPTION(adr) |
19352 | POST_IO |
19353 | RET(16) |
19354 | } |
19355 | |
19356 | // JSR |
19357 | OPCODE(0x4EA8) |
19358 | { |
19359 | u32 adr, res; |
19360 | u32 src, dst; |
19361 | |
19362 | FETCH_SWORD(adr); |
19363 | adr += AREG((Opcode >> 0) & 7); |
19364 | { |
19365 | u32 oldPC; |
19366 | |
19367 | oldPC = (u32)(PC) - BasePC; |
19368 | PRE_IO |
19369 | PUSH_32_F(oldPC) |
19370 | } |
19371 | SET_PC(adr) |
19372 | CHECK_BRANCH_EXCEPTION(adr) |
19373 | POST_IO |
19374 | RET(18) |
19375 | } |
19376 | |
19377 | // JSR |
19378 | OPCODE(0x4EB0) |
19379 | { |
19380 | u32 adr, res; |
19381 | u32 src, dst; |
19382 | |
19383 | adr = AREG((Opcode >> 0) & 7); |
19384 | DECODE_EXT_WORD |
19385 | { |
19386 | u32 oldPC; |
19387 | |
19388 | oldPC = (u32)(PC) - BasePC; |
19389 | PRE_IO |
19390 | PUSH_32_F(oldPC) |
19391 | } |
19392 | SET_PC(adr) |
19393 | CHECK_BRANCH_EXCEPTION(adr) |
19394 | POST_IO |
19395 | RET(22) |
19396 | } |
19397 | |
19398 | // JSR |
19399 | OPCODE(0x4EB8) |
19400 | { |
19401 | u32 adr, res; |
19402 | u32 src, dst; |
19403 | |
19404 | FETCH_SWORD(adr); |
19405 | { |
19406 | u32 oldPC; |
19407 | |
19408 | oldPC = (u32)(PC) - BasePC; |
19409 | PRE_IO |
19410 | PUSH_32_F(oldPC) |
19411 | } |
19412 | SET_PC(adr) |
19413 | CHECK_BRANCH_EXCEPTION(adr) |
19414 | POST_IO |
19415 | RET(18) |
19416 | } |
19417 | |
19418 | // JSR |
19419 | OPCODE(0x4EB9) |
19420 | { |
19421 | u32 adr, res; |
19422 | u32 src, dst; |
19423 | |
19424 | FETCH_LONG(adr); |
19425 | { |
19426 | u32 oldPC; |
19427 | |
19428 | oldPC = (u32)(PC) - BasePC; |
19429 | PRE_IO |
19430 | PUSH_32_F(oldPC) |
19431 | } |
19432 | SET_PC(adr) |
19433 | CHECK_BRANCH_EXCEPTION(adr) |
19434 | POST_IO |
19435 | RET(20) |
19436 | } |
19437 | |
19438 | // JSR |
19439 | OPCODE(0x4EBA) |
19440 | { |
19441 | u32 adr, res; |
19442 | u32 src, dst; |
19443 | |
19444 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19445 | PC++; |
19446 | { |
19447 | u32 oldPC; |
19448 | |
19449 | oldPC = (u32)(PC) - BasePC; |
19450 | PRE_IO |
19451 | PUSH_32_F(oldPC) |
19452 | } |
19453 | SET_PC(adr) |
19454 | CHECK_BRANCH_EXCEPTION(adr) |
19455 | POST_IO |
19456 | RET(18) |
19457 | } |
19458 | |
19459 | // JSR |
19460 | OPCODE(0x4EBB) |
19461 | { |
19462 | u32 adr, res; |
19463 | u32 src, dst; |
19464 | |
19465 | adr = (u32)(PC) - BasePC; |
19466 | DECODE_EXT_WORD |
19467 | { |
19468 | u32 oldPC; |
19469 | |
19470 | oldPC = (u32)(PC) - BasePC; |
19471 | PRE_IO |
19472 | PUSH_32_F(oldPC) |
19473 | } |
19474 | SET_PC(adr) |
19475 | CHECK_BRANCH_EXCEPTION(adr) |
19476 | POST_IO |
19477 | RET(22) |
19478 | } |
19479 | |
19480 | // JMP |
19481 | OPCODE(0x4ED0) |
19482 | { |
19483 | u32 adr, res; |
19484 | u32 src, dst; |
19485 | |
19486 | adr = AREG((Opcode >> 0) & 7); |
19487 | SET_PC(adr) |
19488 | CHECK_BRANCH_EXCEPTION(adr) |
19489 | RET(8) |
19490 | } |
19491 | |
19492 | // JMP |
19493 | OPCODE(0x4EE8) |
19494 | { |
19495 | u32 adr, res; |
19496 | u32 src, dst; |
19497 | |
19498 | FETCH_SWORD(adr); |
19499 | adr += AREG((Opcode >> 0) & 7); |
19500 | SET_PC(adr) |
19501 | CHECK_BRANCH_EXCEPTION(adr) |
19502 | RET(10) |
19503 | } |
19504 | |
19505 | // JMP |
19506 | OPCODE(0x4EF0) |
19507 | { |
19508 | u32 adr, res; |
19509 | u32 src, dst; |
19510 | |
19511 | adr = AREG((Opcode >> 0) & 7); |
19512 | DECODE_EXT_WORD |
19513 | SET_PC(adr) |
19514 | CHECK_BRANCH_EXCEPTION(adr) |
19515 | RET(14) |
19516 | } |
19517 | |
19518 | // JMP |
19519 | OPCODE(0x4EF8) |
19520 | { |
19521 | u32 adr, res; |
19522 | u32 src, dst; |
19523 | |
19524 | FETCH_SWORD(adr); |
19525 | SET_PC(adr) |
19526 | CHECK_BRANCH_EXCEPTION(adr) |
19527 | RET(10) |
19528 | } |
19529 | |
19530 | // JMP |
19531 | OPCODE(0x4EF9) |
19532 | { |
19533 | u32 adr, res; |
19534 | u32 src, dst; |
19535 | |
19536 | FETCH_LONG(adr); |
19537 | SET_PC(adr) |
19538 | CHECK_BRANCH_EXCEPTION(adr) |
19539 | RET(12) |
19540 | } |
19541 | |
19542 | // JMP |
19543 | OPCODE(0x4EFA) |
19544 | { |
19545 | u32 adr, res; |
19546 | u32 src, dst; |
19547 | |
19548 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19549 | PC++; |
19550 | SET_PC(adr) |
19551 | CHECK_BRANCH_EXCEPTION(adr) |
19552 | RET(10) |
19553 | } |
19554 | |
19555 | // JMP |
19556 | OPCODE(0x4EFB) |
19557 | { |
19558 | u32 adr, res; |
19559 | u32 src, dst; |
19560 | |
19561 | adr = (u32)(PC) - BasePC; |
19562 | DECODE_EXT_WORD |
19563 | SET_PC(adr) |
19564 | CHECK_BRANCH_EXCEPTION(adr) |
19565 | RET(14) |
19566 | } |
19567 | |
19568 | // CHK |
19569 | OPCODE(0x4180) |
19570 | { |
19571 | u32 adr, res; |
19572 | u32 src, dst; |
19573 | |
19574 | src = DREGu16((Opcode >> 0) & 7); |
19575 | res = DREGu16((Opcode >> 9) & 7); |
19576 | if (((s32)res < 0) || (res > src)) |
19577 | { |
19578 | flag_N = res >> 8; |
d0ae0cb4 |
19579 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19580 | } |
19581 | RET(10) |
19582 | } |
19583 | |
19584 | // CHK |
19585 | OPCODE(0x4190) |
19586 | { |
19587 | u32 adr, res; |
19588 | u32 src, dst; |
19589 | |
19590 | adr = AREG((Opcode >> 0) & 7); |
19591 | PRE_IO |
19592 | READ_WORD_F(adr, src) |
19593 | res = DREGu16((Opcode >> 9) & 7); |
19594 | if (((s32)res < 0) || (res > src)) |
19595 | { |
19596 | flag_N = res >> 8; |
d0ae0cb4 |
19597 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19598 | } |
19599 | POST_IO |
19600 | RET(14) |
19601 | } |
19602 | |
19603 | // CHK |
19604 | OPCODE(0x4198) |
19605 | { |
19606 | u32 adr, res; |
19607 | u32 src, dst; |
19608 | |
19609 | adr = AREG((Opcode >> 0) & 7); |
19610 | AREG((Opcode >> 0) & 7) += 2; |
19611 | PRE_IO |
19612 | READ_WORD_F(adr, src) |
19613 | res = DREGu16((Opcode >> 9) & 7); |
19614 | if (((s32)res < 0) || (res > src)) |
19615 | { |
19616 | flag_N = res >> 8; |
d0ae0cb4 |
19617 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19618 | } |
19619 | POST_IO |
19620 | RET(14) |
19621 | } |
19622 | |
19623 | // CHK |
19624 | OPCODE(0x41A0) |
19625 | { |
19626 | u32 adr, res; |
19627 | u32 src, dst; |
19628 | |
19629 | adr = AREG((Opcode >> 0) & 7) - 2; |
19630 | AREG((Opcode >> 0) & 7) = adr; |
19631 | PRE_IO |
19632 | READ_WORD_F(adr, src) |
19633 | res = DREGu16((Opcode >> 9) & 7); |
19634 | if (((s32)res < 0) || (res > src)) |
19635 | { |
19636 | flag_N = res >> 8; |
d0ae0cb4 |
19637 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19638 | } |
19639 | POST_IO |
19640 | RET(16) |
19641 | } |
19642 | |
19643 | // CHK |
19644 | OPCODE(0x41A8) |
19645 | { |
19646 | u32 adr, res; |
19647 | u32 src, dst; |
19648 | |
19649 | FETCH_SWORD(adr); |
19650 | adr += AREG((Opcode >> 0) & 7); |
19651 | PRE_IO |
19652 | READ_WORD_F(adr, src) |
19653 | res = DREGu16((Opcode >> 9) & 7); |
19654 | if (((s32)res < 0) || (res > src)) |
19655 | { |
19656 | flag_N = res >> 8; |
d0ae0cb4 |
19657 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19658 | } |
19659 | POST_IO |
19660 | RET(18) |
19661 | } |
19662 | |
19663 | // CHK |
19664 | OPCODE(0x41B0) |
19665 | { |
19666 | u32 adr, res; |
19667 | u32 src, dst; |
19668 | |
19669 | adr = AREG((Opcode >> 0) & 7); |
19670 | DECODE_EXT_WORD |
19671 | PRE_IO |
19672 | READ_WORD_F(adr, src) |
19673 | res = DREGu16((Opcode >> 9) & 7); |
19674 | if (((s32)res < 0) || (res > src)) |
19675 | { |
19676 | flag_N = res >> 8; |
d0ae0cb4 |
19677 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19678 | } |
19679 | POST_IO |
19680 | RET(20) |
19681 | } |
19682 | |
19683 | // CHK |
19684 | OPCODE(0x41B8) |
19685 | { |
19686 | u32 adr, res; |
19687 | u32 src, dst; |
19688 | |
19689 | FETCH_SWORD(adr); |
19690 | PRE_IO |
19691 | READ_WORD_F(adr, src) |
19692 | res = DREGu16((Opcode >> 9) & 7); |
19693 | if (((s32)res < 0) || (res > src)) |
19694 | { |
19695 | flag_N = res >> 8; |
d0ae0cb4 |
19696 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19697 | } |
19698 | POST_IO |
19699 | RET(18) |
19700 | } |
19701 | |
19702 | // CHK |
19703 | OPCODE(0x41B9) |
19704 | { |
19705 | u32 adr, res; |
19706 | u32 src, dst; |
19707 | |
19708 | FETCH_LONG(adr); |
19709 | PRE_IO |
19710 | READ_WORD_F(adr, src) |
19711 | res = DREGu16((Opcode >> 9) & 7); |
19712 | if (((s32)res < 0) || (res > src)) |
19713 | { |
19714 | flag_N = res >> 8; |
d0ae0cb4 |
19715 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19716 | } |
19717 | POST_IO |
19718 | RET(22) |
19719 | } |
19720 | |
19721 | // CHK |
19722 | OPCODE(0x41BA) |
19723 | { |
19724 | u32 adr, res; |
19725 | u32 src, dst; |
19726 | |
19727 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19728 | PC++; |
19729 | PRE_IO |
19730 | READ_WORD_F(adr, src) |
19731 | res = DREGu16((Opcode >> 9) & 7); |
19732 | if (((s32)res < 0) || (res > src)) |
19733 | { |
19734 | flag_N = res >> 8; |
d0ae0cb4 |
19735 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19736 | } |
19737 | POST_IO |
19738 | RET(18) |
19739 | } |
19740 | |
19741 | // CHK |
19742 | OPCODE(0x41BB) |
19743 | { |
19744 | u32 adr, res; |
19745 | u32 src, dst; |
19746 | |
19747 | adr = (u32)(PC) - BasePC; |
19748 | DECODE_EXT_WORD |
19749 | PRE_IO |
19750 | READ_WORD_F(adr, src) |
19751 | res = DREGu16((Opcode >> 9) & 7); |
19752 | if (((s32)res < 0) || (res > src)) |
19753 | { |
19754 | flag_N = res >> 8; |
d0ae0cb4 |
19755 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19756 | } |
19757 | POST_IO |
19758 | RET(20) |
19759 | } |
19760 | |
19761 | // CHK |
19762 | OPCODE(0x41BC) |
19763 | { |
19764 | u32 adr, res; |
19765 | u32 src, dst; |
19766 | |
19767 | FETCH_WORD(src); |
19768 | res = DREGu16((Opcode >> 9) & 7); |
19769 | if (((s32)res < 0) || (res > src)) |
19770 | { |
19771 | flag_N = res >> 8; |
d0ae0cb4 |
19772 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19773 | } |
19774 | POST_IO |
19775 | RET(14) |
19776 | } |
19777 | |
19778 | // CHK |
19779 | OPCODE(0x419F) |
19780 | { |
19781 | u32 adr, res; |
19782 | u32 src, dst; |
19783 | |
19784 | adr = AREG(7); |
19785 | AREG(7) += 2; |
19786 | PRE_IO |
19787 | READ_WORD_F(adr, src) |
19788 | res = DREGu16((Opcode >> 9) & 7); |
19789 | if (((s32)res < 0) || (res > src)) |
19790 | { |
19791 | flag_N = res >> 8; |
d0ae0cb4 |
19792 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19793 | } |
19794 | POST_IO |
19795 | RET(14) |
19796 | } |
19797 | |
19798 | // CHK |
19799 | OPCODE(0x41A7) |
19800 | { |
19801 | u32 adr, res; |
19802 | u32 src, dst; |
19803 | |
19804 | adr = AREG(7) - 2; |
19805 | AREG(7) = adr; |
19806 | PRE_IO |
19807 | READ_WORD_F(adr, src) |
19808 | res = DREGu16((Opcode >> 9) & 7); |
19809 | if (((s32)res < 0) || (res > src)) |
19810 | { |
19811 | flag_N = res >> 8; |
d0ae0cb4 |
19812 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19813 | } |
19814 | POST_IO |
19815 | RET(16) |
19816 | } |
19817 | |
19818 | // LEA |
19819 | OPCODE(0x41D0) |
19820 | { |
19821 | u32 adr, res; |
19822 | u32 src, dst; |
19823 | |
19824 | adr = AREG((Opcode >> 0) & 7); |
19825 | res = adr; |
19826 | AREG((Opcode >> 9) & 7) = res; |
19827 | RET(4) |
19828 | } |
19829 | |
19830 | // LEA |
19831 | OPCODE(0x41E8) |
19832 | { |
19833 | u32 adr, res; |
19834 | u32 src, dst; |
19835 | |
19836 | FETCH_SWORD(adr); |
19837 | adr += AREG((Opcode >> 0) & 7); |
19838 | res = adr; |
19839 | AREG((Opcode >> 9) & 7) = res; |
19840 | RET(8) |
19841 | } |
19842 | |
19843 | // LEA |
19844 | OPCODE(0x41F0) |
19845 | { |
19846 | u32 adr, res; |
19847 | u32 src, dst; |
19848 | |
19849 | adr = AREG((Opcode >> 0) & 7); |
19850 | DECODE_EXT_WORD |
19851 | res = adr; |
19852 | AREG((Opcode >> 9) & 7) = res; |
19853 | RET(12) |
19854 | } |
19855 | |
19856 | // LEA |
19857 | OPCODE(0x41F8) |
19858 | { |
19859 | u32 adr, res; |
19860 | u32 src, dst; |
19861 | |
19862 | FETCH_SWORD(adr); |
19863 | res = adr; |
19864 | AREG((Opcode >> 9) & 7) = res; |
19865 | RET(8) |
19866 | } |
19867 | |
19868 | // LEA |
19869 | OPCODE(0x41F9) |
19870 | { |
19871 | u32 adr, res; |
19872 | u32 src, dst; |
19873 | |
19874 | FETCH_LONG(adr); |
19875 | res = adr; |
19876 | AREG((Opcode >> 9) & 7) = res; |
19877 | RET(12) |
19878 | } |
19879 | |
19880 | // LEA |
19881 | OPCODE(0x41FA) |
19882 | { |
19883 | u32 adr, res; |
19884 | u32 src, dst; |
19885 | |
19886 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19887 | PC++; |
19888 | res = adr; |
19889 | AREG((Opcode >> 9) & 7) = res; |
19890 | RET(8) |
19891 | } |
19892 | |
19893 | // LEA |
19894 | OPCODE(0x41FB) |
19895 | { |
19896 | u32 adr, res; |
19897 | u32 src, dst; |
19898 | |
19899 | adr = (u32)(PC) - BasePC; |
19900 | DECODE_EXT_WORD |
19901 | res = adr; |
19902 | AREG((Opcode >> 9) & 7) = res; |
19903 | RET(12) |
19904 | } |
19905 | |
19906 | // STCC |
19907 | OPCODE(0x50C0) |
19908 | { |
19909 | u32 adr, res; |
19910 | u32 src, dst; |
19911 | |
19912 | res = 0xFF; |
19913 | DREGu8((Opcode >> 0) & 7) = res; |
19914 | RET(6) |
19915 | } |
19916 | |
19917 | // STCC |
19918 | OPCODE(0x51C0) |
19919 | { |
19920 | u32 adr, res; |
19921 | u32 src, dst; |
19922 | |
19923 | res = 0; |
19924 | DREGu8((Opcode >> 0) & 7) = res; |
19925 | RET(4) |
19926 | } |
19927 | |
19928 | // STCC |
19929 | OPCODE(0x52C0) |
19930 | { |
19931 | u32 adr, res; |
19932 | u32 src, dst; |
19933 | |
19934 | if (flag_NotZ && (!(flag_C & 0x100))) |
19935 | { |
19936 | res = 0xFF; |
19937 | DREGu8((Opcode >> 0) & 7) = res; |
19938 | RET(6) |
19939 | } |
19940 | res = 0; |
19941 | DREGu8((Opcode >> 0) & 7) = res; |
19942 | RET(4) |
19943 | } |
19944 | |
19945 | // STCC |
19946 | OPCODE(0x53C0) |
19947 | { |
19948 | u32 adr, res; |
19949 | u32 src, dst; |
19950 | |
19951 | if ((!flag_NotZ) || (flag_C & 0x100)) |
19952 | { |
19953 | res = 0xFF; |
19954 | DREGu8((Opcode >> 0) & 7) = res; |
19955 | RET(6) |
19956 | } |
19957 | res = 0; |
19958 | DREGu8((Opcode >> 0) & 7) = res; |
19959 | RET(4) |
19960 | } |
19961 | |
19962 | // STCC |
19963 | OPCODE(0x54C0) |
19964 | { |
19965 | u32 adr, res; |
19966 | u32 src, dst; |
19967 | |
19968 | if (!(flag_C & 0x100)) |
19969 | { |
19970 | res = 0xFF; |
19971 | DREGu8((Opcode >> 0) & 7) = res; |
19972 | RET(6) |
19973 | } |
19974 | res = 0; |
19975 | DREGu8((Opcode >> 0) & 7) = res; |
19976 | RET(4) |
19977 | } |
19978 | |
19979 | // STCC |
19980 | OPCODE(0x55C0) |
19981 | { |
19982 | u32 adr, res; |
19983 | u32 src, dst; |
19984 | |
19985 | if (flag_C & 0x100) |
19986 | { |
19987 | res = 0xFF; |
19988 | DREGu8((Opcode >> 0) & 7) = res; |
19989 | RET(6) |
19990 | } |
19991 | res = 0; |
19992 | DREGu8((Opcode >> 0) & 7) = res; |
19993 | RET(4) |
19994 | } |
19995 | |
19996 | // STCC |
19997 | OPCODE(0x56C0) |
19998 | { |
19999 | u32 adr, res; |
20000 | u32 src, dst; |
20001 | |
20002 | if (flag_NotZ) |
20003 | { |
20004 | res = 0xFF; |
20005 | DREGu8((Opcode >> 0) & 7) = res; |
20006 | RET(6) |
20007 | } |
20008 | res = 0; |
20009 | DREGu8((Opcode >> 0) & 7) = res; |
20010 | RET(4) |
20011 | } |
20012 | |
20013 | // STCC |
20014 | OPCODE(0x57C0) |
20015 | { |
20016 | u32 adr, res; |
20017 | u32 src, dst; |
20018 | |
20019 | if (!flag_NotZ) |
20020 | { |
20021 | res = 0xFF; |
20022 | DREGu8((Opcode >> 0) & 7) = res; |
20023 | RET(6) |
20024 | } |
20025 | res = 0; |
20026 | DREGu8((Opcode >> 0) & 7) = res; |
20027 | RET(4) |
20028 | } |
20029 | |
20030 | // STCC |
20031 | OPCODE(0x58C0) |
20032 | { |
20033 | u32 adr, res; |
20034 | u32 src, dst; |
20035 | |
20036 | if (!(flag_V & 0x80)) |
20037 | { |
20038 | res = 0xFF; |
20039 | DREGu8((Opcode >> 0) & 7) = res; |
20040 | RET(6) |
20041 | } |
20042 | res = 0; |
20043 | DREGu8((Opcode >> 0) & 7) = res; |
20044 | RET(4) |
20045 | } |
20046 | |
20047 | // STCC |
20048 | OPCODE(0x59C0) |
20049 | { |
20050 | u32 adr, res; |
20051 | u32 src, dst; |
20052 | |
20053 | if (flag_V & 0x80) |
20054 | { |
20055 | res = 0xFF; |
20056 | DREGu8((Opcode >> 0) & 7) = res; |
20057 | RET(6) |
20058 | } |
20059 | res = 0; |
20060 | DREGu8((Opcode >> 0) & 7) = res; |
20061 | RET(4) |
20062 | } |
20063 | |
20064 | // STCC |
20065 | OPCODE(0x5AC0) |
20066 | { |
20067 | u32 adr, res; |
20068 | u32 src, dst; |
20069 | |
20070 | if (!(flag_N & 0x80)) |
20071 | { |
20072 | res = 0xFF; |
20073 | DREGu8((Opcode >> 0) & 7) = res; |
20074 | RET(6) |
20075 | } |
20076 | res = 0; |
20077 | DREGu8((Opcode >> 0) & 7) = res; |
20078 | RET(4) |
20079 | } |
20080 | |
20081 | // STCC |
20082 | OPCODE(0x5BC0) |
20083 | { |
20084 | u32 adr, res; |
20085 | u32 src, dst; |
20086 | |
20087 | if (flag_N & 0x80) |
20088 | { |
20089 | res = 0xFF; |
20090 | DREGu8((Opcode >> 0) & 7) = res; |
20091 | RET(6) |
20092 | } |
20093 | res = 0; |
20094 | DREGu8((Opcode >> 0) & 7) = res; |
20095 | RET(4) |
20096 | } |
20097 | |
20098 | // STCC |
20099 | OPCODE(0x5CC0) |
20100 | { |
20101 | u32 adr, res; |
20102 | u32 src, dst; |
20103 | |
20104 | if (!((flag_N ^ flag_V) & 0x80)) |
20105 | { |
20106 | res = 0xFF; |
20107 | DREGu8((Opcode >> 0) & 7) = res; |
20108 | RET(6) |
20109 | } |
20110 | res = 0; |
20111 | DREGu8((Opcode >> 0) & 7) = res; |
20112 | RET(4) |
20113 | } |
20114 | |
20115 | // STCC |
20116 | OPCODE(0x5DC0) |
20117 | { |
20118 | u32 adr, res; |
20119 | u32 src, dst; |
20120 | |
20121 | if ((flag_N ^ flag_V) & 0x80) |
20122 | { |
20123 | res = 0xFF; |
20124 | DREGu8((Opcode >> 0) & 7) = res; |
20125 | RET(6) |
20126 | } |
20127 | res = 0; |
20128 | DREGu8((Opcode >> 0) & 7) = res; |
20129 | RET(4) |
20130 | } |
20131 | |
20132 | // STCC |
20133 | OPCODE(0x5EC0) |
20134 | { |
20135 | u32 adr, res; |
20136 | u32 src, dst; |
20137 | |
20138 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20139 | { |
20140 | res = 0xFF; |
20141 | DREGu8((Opcode >> 0) & 7) = res; |
20142 | RET(6) |
20143 | } |
20144 | res = 0; |
20145 | DREGu8((Opcode >> 0) & 7) = res; |
20146 | RET(4) |
20147 | } |
20148 | |
20149 | // STCC |
20150 | OPCODE(0x5FC0) |
20151 | { |
20152 | u32 adr, res; |
20153 | u32 src, dst; |
20154 | |
20155 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20156 | { |
20157 | res = 0xFF; |
20158 | DREGu8((Opcode >> 0) & 7) = res; |
20159 | RET(6) |
20160 | } |
20161 | res = 0; |
20162 | DREGu8((Opcode >> 0) & 7) = res; |
20163 | RET(4) |
20164 | } |
20165 | |
20166 | // STCC |
20167 | OPCODE(0x50D0) |
20168 | { |
20169 | u32 adr, res; |
20170 | u32 src, dst; |
20171 | |
20172 | adr = AREG((Opcode >> 0) & 7); |
20173 | res = 0xFF; |
20174 | PRE_IO |
20175 | WRITE_BYTE_F(adr, res) |
20176 | POST_IO |
20177 | RET(12) |
20178 | } |
20179 | |
20180 | // STCC |
20181 | OPCODE(0x51D0) |
20182 | { |
20183 | u32 adr, res; |
20184 | u32 src, dst; |
20185 | |
20186 | adr = AREG((Opcode >> 0) & 7); |
20187 | res = 0; |
20188 | PRE_IO |
20189 | WRITE_BYTE_F(adr, res) |
20190 | POST_IO |
20191 | RET(12) |
20192 | } |
20193 | |
20194 | // STCC |
20195 | OPCODE(0x52D0) |
20196 | { |
20197 | u32 adr, res; |
20198 | u32 src, dst; |
20199 | |
20200 | adr = AREG((Opcode >> 0) & 7); |
20201 | if (flag_NotZ && (!(flag_C & 0x100))) |
20202 | { |
20203 | res = 0xFF; |
20204 | PRE_IO |
20205 | WRITE_BYTE_F(adr, res) |
20206 | POST_IO |
20207 | RET(12) |
20208 | } |
20209 | res = 0; |
20210 | PRE_IO |
20211 | WRITE_BYTE_F(adr, res) |
20212 | POST_IO |
20213 | RET(12) |
20214 | } |
20215 | |
20216 | // STCC |
20217 | OPCODE(0x53D0) |
20218 | { |
20219 | u32 adr, res; |
20220 | u32 src, dst; |
20221 | |
20222 | adr = AREG((Opcode >> 0) & 7); |
20223 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20224 | { |
20225 | res = 0xFF; |
20226 | PRE_IO |
20227 | WRITE_BYTE_F(adr, res) |
20228 | POST_IO |
20229 | RET(12) |
20230 | } |
20231 | res = 0; |
20232 | PRE_IO |
20233 | WRITE_BYTE_F(adr, res) |
20234 | POST_IO |
20235 | RET(12) |
20236 | } |
20237 | |
20238 | // STCC |
20239 | OPCODE(0x54D0) |
20240 | { |
20241 | u32 adr, res; |
20242 | u32 src, dst; |
20243 | |
20244 | adr = AREG((Opcode >> 0) & 7); |
20245 | if (!(flag_C & 0x100)) |
20246 | { |
20247 | res = 0xFF; |
20248 | PRE_IO |
20249 | WRITE_BYTE_F(adr, res) |
20250 | POST_IO |
20251 | RET(12) |
20252 | } |
20253 | res = 0; |
20254 | PRE_IO |
20255 | WRITE_BYTE_F(adr, res) |
20256 | POST_IO |
20257 | RET(12) |
20258 | } |
20259 | |
20260 | // STCC |
20261 | OPCODE(0x55D0) |
20262 | { |
20263 | u32 adr, res; |
20264 | u32 src, dst; |
20265 | |
20266 | adr = AREG((Opcode >> 0) & 7); |
20267 | if (flag_C & 0x100) |
20268 | { |
20269 | res = 0xFF; |
20270 | PRE_IO |
20271 | WRITE_BYTE_F(adr, res) |
20272 | POST_IO |
20273 | RET(12) |
20274 | } |
20275 | res = 0; |
20276 | PRE_IO |
20277 | WRITE_BYTE_F(adr, res) |
20278 | POST_IO |
20279 | RET(12) |
20280 | } |
20281 | |
20282 | // STCC |
20283 | OPCODE(0x56D0) |
20284 | { |
20285 | u32 adr, res; |
20286 | u32 src, dst; |
20287 | |
20288 | adr = AREG((Opcode >> 0) & 7); |
20289 | if (flag_NotZ) |
20290 | { |
20291 | res = 0xFF; |
20292 | PRE_IO |
20293 | WRITE_BYTE_F(adr, res) |
20294 | POST_IO |
20295 | RET(12) |
20296 | } |
20297 | res = 0; |
20298 | PRE_IO |
20299 | WRITE_BYTE_F(adr, res) |
20300 | POST_IO |
20301 | RET(12) |
20302 | } |
20303 | |
20304 | // STCC |
20305 | OPCODE(0x57D0) |
20306 | { |
20307 | u32 adr, res; |
20308 | u32 src, dst; |
20309 | |
20310 | adr = AREG((Opcode >> 0) & 7); |
20311 | if (!flag_NotZ) |
20312 | { |
20313 | res = 0xFF; |
20314 | PRE_IO |
20315 | WRITE_BYTE_F(adr, res) |
20316 | POST_IO |
20317 | RET(12) |
20318 | } |
20319 | res = 0; |
20320 | PRE_IO |
20321 | WRITE_BYTE_F(adr, res) |
20322 | POST_IO |
20323 | RET(12) |
20324 | } |
20325 | |
20326 | // STCC |
20327 | OPCODE(0x58D0) |
20328 | { |
20329 | u32 adr, res; |
20330 | u32 src, dst; |
20331 | |
20332 | adr = AREG((Opcode >> 0) & 7); |
20333 | if (!(flag_V & 0x80)) |
20334 | { |
20335 | res = 0xFF; |
20336 | PRE_IO |
20337 | WRITE_BYTE_F(adr, res) |
20338 | POST_IO |
20339 | RET(12) |
20340 | } |
20341 | res = 0; |
20342 | PRE_IO |
20343 | WRITE_BYTE_F(adr, res) |
20344 | POST_IO |
20345 | RET(12) |
20346 | } |
20347 | |
20348 | // STCC |
20349 | OPCODE(0x59D0) |
20350 | { |
20351 | u32 adr, res; |
20352 | u32 src, dst; |
20353 | |
20354 | adr = AREG((Opcode >> 0) & 7); |
20355 | if (flag_V & 0x80) |
20356 | { |
20357 | res = 0xFF; |
20358 | PRE_IO |
20359 | WRITE_BYTE_F(adr, res) |
20360 | POST_IO |
20361 | RET(12) |
20362 | } |
20363 | res = 0; |
20364 | PRE_IO |
20365 | WRITE_BYTE_F(adr, res) |
20366 | POST_IO |
20367 | RET(12) |
20368 | } |
20369 | |
20370 | // STCC |
20371 | OPCODE(0x5AD0) |
20372 | { |
20373 | u32 adr, res; |
20374 | u32 src, dst; |
20375 | |
20376 | adr = AREG((Opcode >> 0) & 7); |
20377 | if (!(flag_N & 0x80)) |
20378 | { |
20379 | res = 0xFF; |
20380 | PRE_IO |
20381 | WRITE_BYTE_F(adr, res) |
20382 | POST_IO |
20383 | RET(12) |
20384 | } |
20385 | res = 0; |
20386 | PRE_IO |
20387 | WRITE_BYTE_F(adr, res) |
20388 | POST_IO |
20389 | RET(12) |
20390 | } |
20391 | |
20392 | // STCC |
20393 | OPCODE(0x5BD0) |
20394 | { |
20395 | u32 adr, res; |
20396 | u32 src, dst; |
20397 | |
20398 | adr = AREG((Opcode >> 0) & 7); |
20399 | if (flag_N & 0x80) |
20400 | { |
20401 | res = 0xFF; |
20402 | PRE_IO |
20403 | WRITE_BYTE_F(adr, res) |
20404 | POST_IO |
20405 | RET(12) |
20406 | } |
20407 | res = 0; |
20408 | PRE_IO |
20409 | WRITE_BYTE_F(adr, res) |
20410 | POST_IO |
20411 | RET(12) |
20412 | } |
20413 | |
20414 | // STCC |
20415 | OPCODE(0x5CD0) |
20416 | { |
20417 | u32 adr, res; |
20418 | u32 src, dst; |
20419 | |
20420 | adr = AREG((Opcode >> 0) & 7); |
20421 | if (!((flag_N ^ flag_V) & 0x80)) |
20422 | { |
20423 | res = 0xFF; |
20424 | PRE_IO |
20425 | WRITE_BYTE_F(adr, res) |
20426 | POST_IO |
20427 | RET(12) |
20428 | } |
20429 | res = 0; |
20430 | PRE_IO |
20431 | WRITE_BYTE_F(adr, res) |
20432 | POST_IO |
20433 | RET(12) |
20434 | } |
20435 | |
20436 | // STCC |
20437 | OPCODE(0x5DD0) |
20438 | { |
20439 | u32 adr, res; |
20440 | u32 src, dst; |
20441 | |
20442 | adr = AREG((Opcode >> 0) & 7); |
20443 | if ((flag_N ^ flag_V) & 0x80) |
20444 | { |
20445 | res = 0xFF; |
20446 | PRE_IO |
20447 | WRITE_BYTE_F(adr, res) |
20448 | POST_IO |
20449 | RET(12) |
20450 | } |
20451 | res = 0; |
20452 | PRE_IO |
20453 | WRITE_BYTE_F(adr, res) |
20454 | POST_IO |
20455 | RET(12) |
20456 | } |
20457 | |
20458 | // STCC |
20459 | OPCODE(0x5ED0) |
20460 | { |
20461 | u32 adr, res; |
20462 | u32 src, dst; |
20463 | |
20464 | adr = AREG((Opcode >> 0) & 7); |
20465 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20466 | { |
20467 | res = 0xFF; |
20468 | PRE_IO |
20469 | WRITE_BYTE_F(adr, res) |
20470 | POST_IO |
20471 | RET(12) |
20472 | } |
20473 | res = 0; |
20474 | PRE_IO |
20475 | WRITE_BYTE_F(adr, res) |
20476 | POST_IO |
20477 | RET(12) |
20478 | } |
20479 | |
20480 | // STCC |
20481 | OPCODE(0x5FD0) |
20482 | { |
20483 | u32 adr, res; |
20484 | u32 src, dst; |
20485 | |
20486 | adr = AREG((Opcode >> 0) & 7); |
20487 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20488 | { |
20489 | res = 0xFF; |
20490 | PRE_IO |
20491 | WRITE_BYTE_F(adr, res) |
20492 | POST_IO |
20493 | RET(12) |
20494 | } |
20495 | res = 0; |
20496 | PRE_IO |
20497 | WRITE_BYTE_F(adr, res) |
20498 | POST_IO |
20499 | RET(12) |
20500 | } |
20501 | |
20502 | // STCC |
20503 | OPCODE(0x50D8) |
20504 | { |
20505 | u32 adr, res; |
20506 | u32 src, dst; |
20507 | |
20508 | adr = AREG((Opcode >> 0) & 7); |
20509 | AREG((Opcode >> 0) & 7) += 1; |
20510 | res = 0xFF; |
20511 | PRE_IO |
20512 | WRITE_BYTE_F(adr, res) |
20513 | POST_IO |
20514 | RET(12) |
20515 | } |
20516 | |
20517 | // STCC |
20518 | OPCODE(0x51D8) |
20519 | { |
20520 | u32 adr, res; |
20521 | u32 src, dst; |
20522 | |
20523 | adr = AREG((Opcode >> 0) & 7); |
20524 | AREG((Opcode >> 0) & 7) += 1; |
20525 | res = 0; |
20526 | PRE_IO |
20527 | WRITE_BYTE_F(adr, res) |
20528 | POST_IO |
20529 | RET(12) |
20530 | } |
20531 | |
20532 | // STCC |
20533 | OPCODE(0x52D8) |
20534 | { |
20535 | u32 adr, res; |
20536 | u32 src, dst; |
20537 | |
20538 | adr = AREG((Opcode >> 0) & 7); |
20539 | AREG((Opcode >> 0) & 7) += 1; |
20540 | if (flag_NotZ && (!(flag_C & 0x100))) |
20541 | { |
20542 | res = 0xFF; |
20543 | PRE_IO |
20544 | WRITE_BYTE_F(adr, res) |
20545 | POST_IO |
20546 | RET(12) |
20547 | } |
20548 | res = 0; |
20549 | PRE_IO |
20550 | WRITE_BYTE_F(adr, res) |
20551 | POST_IO |
20552 | RET(12) |
20553 | } |
20554 | |
20555 | // STCC |
20556 | OPCODE(0x53D8) |
20557 | { |
20558 | u32 adr, res; |
20559 | u32 src, dst; |
20560 | |
20561 | adr = AREG((Opcode >> 0) & 7); |
20562 | AREG((Opcode >> 0) & 7) += 1; |
20563 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20564 | { |
20565 | res = 0xFF; |
20566 | PRE_IO |
20567 | WRITE_BYTE_F(adr, res) |
20568 | POST_IO |
20569 | RET(12) |
20570 | } |
20571 | res = 0; |
20572 | PRE_IO |
20573 | WRITE_BYTE_F(adr, res) |
20574 | POST_IO |
20575 | RET(12) |
20576 | } |
20577 | |
20578 | // STCC |
20579 | OPCODE(0x54D8) |
20580 | { |
20581 | u32 adr, res; |
20582 | u32 src, dst; |
20583 | |
20584 | adr = AREG((Opcode >> 0) & 7); |
20585 | AREG((Opcode >> 0) & 7) += 1; |
20586 | if (!(flag_C & 0x100)) |
20587 | { |
20588 | res = 0xFF; |
20589 | PRE_IO |
20590 | WRITE_BYTE_F(adr, res) |
20591 | POST_IO |
20592 | RET(12) |
20593 | } |
20594 | res = 0; |
20595 | PRE_IO |
20596 | WRITE_BYTE_F(adr, res) |
20597 | POST_IO |
20598 | RET(12) |
20599 | } |
20600 | |
20601 | // STCC |
20602 | OPCODE(0x55D8) |
20603 | { |
20604 | u32 adr, res; |
20605 | u32 src, dst; |
20606 | |
20607 | adr = AREG((Opcode >> 0) & 7); |
20608 | AREG((Opcode >> 0) & 7) += 1; |
20609 | if (flag_C & 0x100) |
20610 | { |
20611 | res = 0xFF; |
20612 | PRE_IO |
20613 | WRITE_BYTE_F(adr, res) |
20614 | POST_IO |
20615 | RET(12) |
20616 | } |
20617 | res = 0; |
20618 | PRE_IO |
20619 | WRITE_BYTE_F(adr, res) |
20620 | POST_IO |
20621 | RET(12) |
20622 | } |
20623 | |
20624 | // STCC |
20625 | OPCODE(0x56D8) |
20626 | { |
20627 | u32 adr, res; |
20628 | u32 src, dst; |
20629 | |
20630 | adr = AREG((Opcode >> 0) & 7); |
20631 | AREG((Opcode >> 0) & 7) += 1; |
20632 | if (flag_NotZ) |
20633 | { |
20634 | res = 0xFF; |
20635 | PRE_IO |
20636 | WRITE_BYTE_F(adr, res) |
20637 | POST_IO |
20638 | RET(12) |
20639 | } |
20640 | res = 0; |
20641 | PRE_IO |
20642 | WRITE_BYTE_F(adr, res) |
20643 | POST_IO |
20644 | RET(12) |
20645 | } |
20646 | |
20647 | // STCC |
20648 | OPCODE(0x57D8) |
20649 | { |
20650 | u32 adr, res; |
20651 | u32 src, dst; |
20652 | |
20653 | adr = AREG((Opcode >> 0) & 7); |
20654 | AREG((Opcode >> 0) & 7) += 1; |
20655 | if (!flag_NotZ) |
20656 | { |
20657 | res = 0xFF; |
20658 | PRE_IO |
20659 | WRITE_BYTE_F(adr, res) |
20660 | POST_IO |
20661 | RET(12) |
20662 | } |
20663 | res = 0; |
20664 | PRE_IO |
20665 | WRITE_BYTE_F(adr, res) |
20666 | POST_IO |
20667 | RET(12) |
20668 | } |
20669 | |
20670 | // STCC |
20671 | OPCODE(0x58D8) |
20672 | { |
20673 | u32 adr, res; |
20674 | u32 src, dst; |
20675 | |
20676 | adr = AREG((Opcode >> 0) & 7); |
20677 | AREG((Opcode >> 0) & 7) += 1; |
20678 | if (!(flag_V & 0x80)) |
20679 | { |
20680 | res = 0xFF; |
20681 | PRE_IO |
20682 | WRITE_BYTE_F(adr, res) |
20683 | POST_IO |
20684 | RET(12) |
20685 | } |
20686 | res = 0; |
20687 | PRE_IO |
20688 | WRITE_BYTE_F(adr, res) |
20689 | POST_IO |
20690 | RET(12) |
20691 | } |
20692 | |
20693 | // STCC |
20694 | OPCODE(0x59D8) |
20695 | { |
20696 | u32 adr, res; |
20697 | u32 src, dst; |
20698 | |
20699 | adr = AREG((Opcode >> 0) & 7); |
20700 | AREG((Opcode >> 0) & 7) += 1; |
20701 | if (flag_V & 0x80) |
20702 | { |
20703 | res = 0xFF; |
20704 | PRE_IO |
20705 | WRITE_BYTE_F(adr, res) |
20706 | POST_IO |
20707 | RET(12) |
20708 | } |
20709 | res = 0; |
20710 | PRE_IO |
20711 | WRITE_BYTE_F(adr, res) |
20712 | POST_IO |
20713 | RET(12) |
20714 | } |
20715 | |
20716 | // STCC |
20717 | OPCODE(0x5AD8) |
20718 | { |
20719 | u32 adr, res; |
20720 | u32 src, dst; |
20721 | |
20722 | adr = AREG((Opcode >> 0) & 7); |
20723 | AREG((Opcode >> 0) & 7) += 1; |
20724 | if (!(flag_N & 0x80)) |
20725 | { |
20726 | res = 0xFF; |
20727 | PRE_IO |
20728 | WRITE_BYTE_F(adr, res) |
20729 | POST_IO |
20730 | RET(12) |
20731 | } |
20732 | res = 0; |
20733 | PRE_IO |
20734 | WRITE_BYTE_F(adr, res) |
20735 | POST_IO |
20736 | RET(12) |
20737 | } |
20738 | |
20739 | // STCC |
20740 | OPCODE(0x5BD8) |
20741 | { |
20742 | u32 adr, res; |
20743 | u32 src, dst; |
20744 | |
20745 | adr = AREG((Opcode >> 0) & 7); |
20746 | AREG((Opcode >> 0) & 7) += 1; |
20747 | if (flag_N & 0x80) |
20748 | { |
20749 | res = 0xFF; |
20750 | PRE_IO |
20751 | WRITE_BYTE_F(adr, res) |
20752 | POST_IO |
20753 | RET(12) |
20754 | } |
20755 | res = 0; |
20756 | PRE_IO |
20757 | WRITE_BYTE_F(adr, res) |
20758 | POST_IO |
20759 | RET(12) |
20760 | } |
20761 | |
20762 | // STCC |
20763 | OPCODE(0x5CD8) |
20764 | { |
20765 | u32 adr, res; |
20766 | u32 src, dst; |
20767 | |
20768 | adr = AREG((Opcode >> 0) & 7); |
20769 | AREG((Opcode >> 0) & 7) += 1; |
20770 | if (!((flag_N ^ flag_V) & 0x80)) |
20771 | { |
20772 | res = 0xFF; |
20773 | PRE_IO |
20774 | WRITE_BYTE_F(adr, res) |
20775 | POST_IO |
20776 | RET(12) |
20777 | } |
20778 | res = 0; |
20779 | PRE_IO |
20780 | WRITE_BYTE_F(adr, res) |
20781 | POST_IO |
20782 | RET(12) |
20783 | } |
20784 | |
20785 | // STCC |
20786 | OPCODE(0x5DD8) |
20787 | { |
20788 | u32 adr, res; |
20789 | u32 src, dst; |
20790 | |
20791 | adr = AREG((Opcode >> 0) & 7); |
20792 | AREG((Opcode >> 0) & 7) += 1; |
20793 | if ((flag_N ^ flag_V) & 0x80) |
20794 | { |
20795 | res = 0xFF; |
20796 | PRE_IO |
20797 | WRITE_BYTE_F(adr, res) |
20798 | POST_IO |
20799 | RET(12) |
20800 | } |
20801 | res = 0; |
20802 | PRE_IO |
20803 | WRITE_BYTE_F(adr, res) |
20804 | POST_IO |
20805 | RET(12) |
20806 | } |
20807 | |
20808 | // STCC |
20809 | OPCODE(0x5ED8) |
20810 | { |
20811 | u32 adr, res; |
20812 | u32 src, dst; |
20813 | |
20814 | adr = AREG((Opcode >> 0) & 7); |
20815 | AREG((Opcode >> 0) & 7) += 1; |
20816 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20817 | { |
20818 | res = 0xFF; |
20819 | PRE_IO |
20820 | WRITE_BYTE_F(adr, res) |
20821 | POST_IO |
20822 | RET(12) |
20823 | } |
20824 | res = 0; |
20825 | PRE_IO |
20826 | WRITE_BYTE_F(adr, res) |
20827 | POST_IO |
20828 | RET(12) |
20829 | } |
20830 | |
20831 | // STCC |
20832 | OPCODE(0x5FD8) |
20833 | { |
20834 | u32 adr, res; |
20835 | u32 src, dst; |
20836 | |
20837 | adr = AREG((Opcode >> 0) & 7); |
20838 | AREG((Opcode >> 0) & 7) += 1; |
20839 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20840 | { |
20841 | res = 0xFF; |
20842 | PRE_IO |
20843 | WRITE_BYTE_F(adr, res) |
20844 | POST_IO |
20845 | RET(12) |
20846 | } |
20847 | res = 0; |
20848 | PRE_IO |
20849 | WRITE_BYTE_F(adr, res) |
20850 | POST_IO |
20851 | RET(12) |
20852 | } |
20853 | |
20854 | // STCC |
20855 | OPCODE(0x50E0) |
20856 | { |
20857 | u32 adr, res; |
20858 | u32 src, dst; |
20859 | |
20860 | adr = AREG((Opcode >> 0) & 7) - 1; |
20861 | AREG((Opcode >> 0) & 7) = adr; |
20862 | res = 0xFF; |
20863 | PRE_IO |
20864 | WRITE_BYTE_F(adr, res) |
20865 | POST_IO |
20866 | RET(14) |
20867 | } |
20868 | |
20869 | // STCC |
20870 | OPCODE(0x51E0) |
20871 | { |
20872 | u32 adr, res; |
20873 | u32 src, dst; |
20874 | |
20875 | adr = AREG((Opcode >> 0) & 7) - 1; |
20876 | AREG((Opcode >> 0) & 7) = adr; |
20877 | res = 0; |
20878 | PRE_IO |
20879 | WRITE_BYTE_F(adr, res) |
20880 | POST_IO |
20881 | RET(14) |
20882 | } |
20883 | |
20884 | // STCC |
20885 | OPCODE(0x52E0) |
20886 | { |
20887 | u32 adr, res; |
20888 | u32 src, dst; |
20889 | |
20890 | adr = AREG((Opcode >> 0) & 7) - 1; |
20891 | AREG((Opcode >> 0) & 7) = adr; |
20892 | if (flag_NotZ && (!(flag_C & 0x100))) |
20893 | { |
20894 | res = 0xFF; |
20895 | PRE_IO |
20896 | WRITE_BYTE_F(adr, res) |
20897 | POST_IO |
20898 | RET(14) |
20899 | } |
20900 | res = 0; |
20901 | PRE_IO |
20902 | WRITE_BYTE_F(adr, res) |
20903 | POST_IO |
20904 | RET(14) |
20905 | } |
20906 | |
20907 | // STCC |
20908 | OPCODE(0x53E0) |
20909 | { |
20910 | u32 adr, res; |
20911 | u32 src, dst; |
20912 | |
20913 | adr = AREG((Opcode >> 0) & 7) - 1; |
20914 | AREG((Opcode >> 0) & 7) = adr; |
20915 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20916 | { |
20917 | res = 0xFF; |
20918 | PRE_IO |
20919 | WRITE_BYTE_F(adr, res) |
20920 | POST_IO |
20921 | RET(14) |
20922 | } |
20923 | res = 0; |
20924 | PRE_IO |
20925 | WRITE_BYTE_F(adr, res) |
20926 | POST_IO |
20927 | RET(14) |
20928 | } |
20929 | |
20930 | // STCC |
20931 | OPCODE(0x54E0) |
20932 | { |
20933 | u32 adr, res; |
20934 | u32 src, dst; |
20935 | |
20936 | adr = AREG((Opcode >> 0) & 7) - 1; |
20937 | AREG((Opcode >> 0) & 7) = adr; |
20938 | if (!(flag_C & 0x100)) |
20939 | { |
20940 | res = 0xFF; |
20941 | PRE_IO |
20942 | WRITE_BYTE_F(adr, res) |
20943 | POST_IO |
20944 | RET(14) |
20945 | } |
20946 | res = 0; |
20947 | PRE_IO |
20948 | WRITE_BYTE_F(adr, res) |
20949 | POST_IO |
20950 | RET(14) |
20951 | } |
20952 | |
20953 | // STCC |
20954 | OPCODE(0x55E0) |
20955 | { |
20956 | u32 adr, res; |
20957 | u32 src, dst; |
20958 | |
20959 | adr = AREG((Opcode >> 0) & 7) - 1; |
20960 | AREG((Opcode >> 0) & 7) = adr; |
20961 | if (flag_C & 0x100) |
20962 | { |
20963 | res = 0xFF; |
20964 | PRE_IO |
20965 | WRITE_BYTE_F(adr, res) |
20966 | POST_IO |
20967 | RET(14) |
20968 | } |
20969 | res = 0; |
20970 | PRE_IO |
20971 | WRITE_BYTE_F(adr, res) |
20972 | POST_IO |
20973 | RET(14) |
20974 | } |
20975 | |
20976 | // STCC |
20977 | OPCODE(0x56E0) |
20978 | { |
20979 | u32 adr, res; |
20980 | u32 src, dst; |
20981 | |
20982 | adr = AREG((Opcode >> 0) & 7) - 1; |
20983 | AREG((Opcode >> 0) & 7) = adr; |
20984 | if (flag_NotZ) |
20985 | { |
20986 | res = 0xFF; |
20987 | PRE_IO |
20988 | WRITE_BYTE_F(adr, res) |
20989 | POST_IO |
20990 | RET(14) |
20991 | } |
20992 | res = 0; |
20993 | PRE_IO |
20994 | WRITE_BYTE_F(adr, res) |
20995 | POST_IO |
20996 | RET(14) |
20997 | } |
20998 | |
20999 | // STCC |
21000 | OPCODE(0x57E0) |
21001 | { |
21002 | u32 adr, res; |
21003 | u32 src, dst; |
21004 | |
21005 | adr = AREG((Opcode >> 0) & 7) - 1; |
21006 | AREG((Opcode >> 0) & 7) = adr; |
21007 | if (!flag_NotZ) |
21008 | { |
21009 | res = 0xFF; |
21010 | PRE_IO |
21011 | WRITE_BYTE_F(adr, res) |
21012 | POST_IO |
21013 | RET(14) |
21014 | } |
21015 | res = 0; |
21016 | PRE_IO |
21017 | WRITE_BYTE_F(adr, res) |
21018 | POST_IO |
21019 | RET(14) |
21020 | } |
21021 | |
21022 | // STCC |
21023 | OPCODE(0x58E0) |
21024 | { |
21025 | u32 adr, res; |
21026 | u32 src, dst; |
21027 | |
21028 | adr = AREG((Opcode >> 0) & 7) - 1; |
21029 | AREG((Opcode >> 0) & 7) = adr; |
21030 | if (!(flag_V & 0x80)) |
21031 | { |
21032 | res = 0xFF; |
21033 | PRE_IO |
21034 | WRITE_BYTE_F(adr, res) |
21035 | POST_IO |
21036 | RET(14) |
21037 | } |
21038 | res = 0; |
21039 | PRE_IO |
21040 | WRITE_BYTE_F(adr, res) |
21041 | POST_IO |
21042 | RET(14) |
21043 | } |
21044 | |
21045 | // STCC |
21046 | OPCODE(0x59E0) |
21047 | { |
21048 | u32 adr, res; |
21049 | u32 src, dst; |
21050 | |
21051 | adr = AREG((Opcode >> 0) & 7) - 1; |
21052 | AREG((Opcode >> 0) & 7) = adr; |
21053 | if (flag_V & 0x80) |
21054 | { |
21055 | res = 0xFF; |
21056 | PRE_IO |
21057 | WRITE_BYTE_F(adr, res) |
21058 | POST_IO |
21059 | RET(14) |
21060 | } |
21061 | res = 0; |
21062 | PRE_IO |
21063 | WRITE_BYTE_F(adr, res) |
21064 | POST_IO |
21065 | RET(14) |
21066 | } |
21067 | |
21068 | // STCC |
21069 | OPCODE(0x5AE0) |
21070 | { |
21071 | u32 adr, res; |
21072 | u32 src, dst; |
21073 | |
21074 | adr = AREG((Opcode >> 0) & 7) - 1; |
21075 | AREG((Opcode >> 0) & 7) = adr; |
21076 | if (!(flag_N & 0x80)) |
21077 | { |
21078 | res = 0xFF; |
21079 | PRE_IO |
21080 | WRITE_BYTE_F(adr, res) |
21081 | POST_IO |
21082 | RET(14) |
21083 | } |
21084 | res = 0; |
21085 | PRE_IO |
21086 | WRITE_BYTE_F(adr, res) |
21087 | POST_IO |
21088 | RET(14) |
21089 | } |
21090 | |
21091 | // STCC |
21092 | OPCODE(0x5BE0) |
21093 | { |
21094 | u32 adr, res; |
21095 | u32 src, dst; |
21096 | |
21097 | adr = AREG((Opcode >> 0) & 7) - 1; |
21098 | AREG((Opcode >> 0) & 7) = adr; |
21099 | if (flag_N & 0x80) |
21100 | { |
21101 | res = 0xFF; |
21102 | PRE_IO |
21103 | WRITE_BYTE_F(adr, res) |
21104 | POST_IO |
21105 | RET(14) |
21106 | } |
21107 | res = 0; |
21108 | PRE_IO |
21109 | WRITE_BYTE_F(adr, res) |
21110 | POST_IO |
21111 | RET(14) |
21112 | } |
21113 | |
21114 | // STCC |
21115 | OPCODE(0x5CE0) |
21116 | { |
21117 | u32 adr, res; |
21118 | u32 src, dst; |
21119 | |
21120 | adr = AREG((Opcode >> 0) & 7) - 1; |
21121 | AREG((Opcode >> 0) & 7) = adr; |
21122 | if (!((flag_N ^ flag_V) & 0x80)) |
21123 | { |
21124 | res = 0xFF; |
21125 | PRE_IO |
21126 | WRITE_BYTE_F(adr, res) |
21127 | POST_IO |
21128 | RET(14) |
21129 | } |
21130 | res = 0; |
21131 | PRE_IO |
21132 | WRITE_BYTE_F(adr, res) |
21133 | POST_IO |
21134 | RET(14) |
21135 | } |
21136 | |
21137 | // STCC |
21138 | OPCODE(0x5DE0) |
21139 | { |
21140 | u32 adr, res; |
21141 | u32 src, dst; |
21142 | |
21143 | adr = AREG((Opcode >> 0) & 7) - 1; |
21144 | AREG((Opcode >> 0) & 7) = adr; |
21145 | if ((flag_N ^ flag_V) & 0x80) |
21146 | { |
21147 | res = 0xFF; |
21148 | PRE_IO |
21149 | WRITE_BYTE_F(adr, res) |
21150 | POST_IO |
21151 | RET(14) |
21152 | } |
21153 | res = 0; |
21154 | PRE_IO |
21155 | WRITE_BYTE_F(adr, res) |
21156 | POST_IO |
21157 | RET(14) |
21158 | } |
21159 | |
21160 | // STCC |
21161 | OPCODE(0x5EE0) |
21162 | { |
21163 | u32 adr, res; |
21164 | u32 src, dst; |
21165 | |
21166 | adr = AREG((Opcode >> 0) & 7) - 1; |
21167 | AREG((Opcode >> 0) & 7) = adr; |
21168 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21169 | { |
21170 | res = 0xFF; |
21171 | PRE_IO |
21172 | WRITE_BYTE_F(adr, res) |
21173 | POST_IO |
21174 | RET(14) |
21175 | } |
21176 | res = 0; |
21177 | PRE_IO |
21178 | WRITE_BYTE_F(adr, res) |
21179 | POST_IO |
21180 | RET(14) |
21181 | } |
21182 | |
21183 | // STCC |
21184 | OPCODE(0x5FE0) |
21185 | { |
21186 | u32 adr, res; |
21187 | u32 src, dst; |
21188 | |
21189 | adr = AREG((Opcode >> 0) & 7) - 1; |
21190 | AREG((Opcode >> 0) & 7) = adr; |
21191 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21192 | { |
21193 | res = 0xFF; |
21194 | PRE_IO |
21195 | WRITE_BYTE_F(adr, res) |
21196 | POST_IO |
21197 | RET(14) |
21198 | } |
21199 | res = 0; |
21200 | PRE_IO |
21201 | WRITE_BYTE_F(adr, res) |
21202 | POST_IO |
21203 | RET(14) |
21204 | } |
21205 | |
21206 | // STCC |
21207 | OPCODE(0x50E8) |
21208 | { |
21209 | u32 adr, res; |
21210 | u32 src, dst; |
21211 | |
21212 | FETCH_SWORD(adr); |
21213 | adr += AREG((Opcode >> 0) & 7); |
21214 | res = 0xFF; |
21215 | PRE_IO |
21216 | WRITE_BYTE_F(adr, res) |
21217 | POST_IO |
21218 | RET(16) |
21219 | } |
21220 | |
21221 | // STCC |
21222 | OPCODE(0x51E8) |
21223 | { |
21224 | u32 adr, res; |
21225 | u32 src, dst; |
21226 | |
21227 | FETCH_SWORD(adr); |
21228 | adr += AREG((Opcode >> 0) & 7); |
21229 | res = 0; |
21230 | PRE_IO |
21231 | WRITE_BYTE_F(adr, res) |
21232 | POST_IO |
21233 | RET(16) |
21234 | } |
21235 | |
21236 | // STCC |
21237 | OPCODE(0x52E8) |
21238 | { |
21239 | u32 adr, res; |
21240 | u32 src, dst; |
21241 | |
21242 | FETCH_SWORD(adr); |
21243 | adr += AREG((Opcode >> 0) & 7); |
21244 | if (flag_NotZ && (!(flag_C & 0x100))) |
21245 | { |
21246 | res = 0xFF; |
21247 | PRE_IO |
21248 | WRITE_BYTE_F(adr, res) |
21249 | POST_IO |
21250 | RET(16) |
21251 | } |
21252 | res = 0; |
21253 | PRE_IO |
21254 | WRITE_BYTE_F(adr, res) |
21255 | POST_IO |
21256 | RET(16) |
21257 | } |
21258 | |
21259 | // STCC |
21260 | OPCODE(0x53E8) |
21261 | { |
21262 | u32 adr, res; |
21263 | u32 src, dst; |
21264 | |
21265 | FETCH_SWORD(adr); |
21266 | adr += AREG((Opcode >> 0) & 7); |
21267 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21268 | { |
21269 | res = 0xFF; |
21270 | PRE_IO |
21271 | WRITE_BYTE_F(adr, res) |
21272 | POST_IO |
21273 | RET(16) |
21274 | } |
21275 | res = 0; |
21276 | PRE_IO |
21277 | WRITE_BYTE_F(adr, res) |
21278 | POST_IO |
21279 | RET(16) |
21280 | } |
21281 | |
21282 | // STCC |
21283 | OPCODE(0x54E8) |
21284 | { |
21285 | u32 adr, res; |
21286 | u32 src, dst; |
21287 | |
21288 | FETCH_SWORD(adr); |
21289 | adr += AREG((Opcode >> 0) & 7); |
21290 | if (!(flag_C & 0x100)) |
21291 | { |
21292 | res = 0xFF; |
21293 | PRE_IO |
21294 | WRITE_BYTE_F(adr, res) |
21295 | POST_IO |
21296 | RET(16) |
21297 | } |
21298 | res = 0; |
21299 | PRE_IO |
21300 | WRITE_BYTE_F(adr, res) |
21301 | POST_IO |
21302 | RET(16) |
21303 | } |
21304 | |
21305 | // STCC |
21306 | OPCODE(0x55E8) |
21307 | { |
21308 | u32 adr, res; |
21309 | u32 src, dst; |
21310 | |
21311 | FETCH_SWORD(adr); |
21312 | adr += AREG((Opcode >> 0) & 7); |
21313 | if (flag_C & 0x100) |
21314 | { |
21315 | res = 0xFF; |
21316 | PRE_IO |
21317 | WRITE_BYTE_F(adr, res) |
21318 | POST_IO |
21319 | RET(16) |
21320 | } |
21321 | res = 0; |
21322 | PRE_IO |
21323 | WRITE_BYTE_F(adr, res) |
21324 | POST_IO |
21325 | RET(16) |
21326 | } |
21327 | |
21328 | // STCC |
21329 | OPCODE(0x56E8) |
21330 | { |
21331 | u32 adr, res; |
21332 | u32 src, dst; |
21333 | |
21334 | FETCH_SWORD(adr); |
21335 | adr += AREG((Opcode >> 0) & 7); |
21336 | if (flag_NotZ) |
21337 | { |
21338 | res = 0xFF; |
21339 | PRE_IO |
21340 | WRITE_BYTE_F(adr, res) |
21341 | POST_IO |
21342 | RET(16) |
21343 | } |
21344 | res = 0; |
21345 | PRE_IO |
21346 | WRITE_BYTE_F(adr, res) |
21347 | POST_IO |
21348 | RET(16) |
21349 | } |
21350 | |
21351 | // STCC |
21352 | OPCODE(0x57E8) |
21353 | { |
21354 | u32 adr, res; |
21355 | u32 src, dst; |
21356 | |
21357 | FETCH_SWORD(adr); |
21358 | adr += AREG((Opcode >> 0) & 7); |
21359 | if (!flag_NotZ) |
21360 | { |
21361 | res = 0xFF; |
21362 | PRE_IO |
21363 | WRITE_BYTE_F(adr, res) |
21364 | POST_IO |
21365 | RET(16) |
21366 | } |
21367 | res = 0; |
21368 | PRE_IO |
21369 | WRITE_BYTE_F(adr, res) |
21370 | POST_IO |
21371 | RET(16) |
21372 | } |
21373 | |
21374 | // STCC |
21375 | OPCODE(0x58E8) |
21376 | { |
21377 | u32 adr, res; |
21378 | u32 src, dst; |
21379 | |
21380 | FETCH_SWORD(adr); |
21381 | adr += AREG((Opcode >> 0) & 7); |
21382 | if (!(flag_V & 0x80)) |
21383 | { |
21384 | res = 0xFF; |
21385 | PRE_IO |
21386 | WRITE_BYTE_F(adr, res) |
21387 | POST_IO |
21388 | RET(16) |
21389 | } |
21390 | res = 0; |
21391 | PRE_IO |
21392 | WRITE_BYTE_F(adr, res) |
21393 | POST_IO |
21394 | RET(16) |
21395 | } |
21396 | |
21397 | // STCC |
21398 | OPCODE(0x59E8) |
21399 | { |
21400 | u32 adr, res; |
21401 | u32 src, dst; |
21402 | |
21403 | FETCH_SWORD(adr); |
21404 | adr += AREG((Opcode >> 0) & 7); |
21405 | if (flag_V & 0x80) |
21406 | { |
21407 | res = 0xFF; |
21408 | PRE_IO |
21409 | WRITE_BYTE_F(adr, res) |
21410 | POST_IO |
21411 | RET(16) |
21412 | } |
21413 | res = 0; |
21414 | PRE_IO |
21415 | WRITE_BYTE_F(adr, res) |
21416 | POST_IO |
21417 | RET(16) |
21418 | } |
21419 | |
21420 | // STCC |
21421 | OPCODE(0x5AE8) |
21422 | { |
21423 | u32 adr, res; |
21424 | u32 src, dst; |
21425 | |
21426 | FETCH_SWORD(adr); |
21427 | adr += AREG((Opcode >> 0) & 7); |
21428 | if (!(flag_N & 0x80)) |
21429 | { |
21430 | res = 0xFF; |
21431 | PRE_IO |
21432 | WRITE_BYTE_F(adr, res) |
21433 | POST_IO |
21434 | RET(16) |
21435 | } |
21436 | res = 0; |
21437 | PRE_IO |
21438 | WRITE_BYTE_F(adr, res) |
21439 | POST_IO |
21440 | RET(16) |
21441 | } |
21442 | |
21443 | // STCC |
21444 | OPCODE(0x5BE8) |
21445 | { |
21446 | u32 adr, res; |
21447 | u32 src, dst; |
21448 | |
21449 | FETCH_SWORD(adr); |
21450 | adr += AREG((Opcode >> 0) & 7); |
21451 | if (flag_N & 0x80) |
21452 | { |
21453 | res = 0xFF; |
21454 | PRE_IO |
21455 | WRITE_BYTE_F(adr, res) |
21456 | POST_IO |
21457 | RET(16) |
21458 | } |
21459 | res = 0; |
21460 | PRE_IO |
21461 | WRITE_BYTE_F(adr, res) |
21462 | POST_IO |
21463 | RET(16) |
21464 | } |
21465 | |
21466 | // STCC |
21467 | OPCODE(0x5CE8) |
21468 | { |
21469 | u32 adr, res; |
21470 | u32 src, dst; |
21471 | |
21472 | FETCH_SWORD(adr); |
21473 | adr += AREG((Opcode >> 0) & 7); |
21474 | if (!((flag_N ^ flag_V) & 0x80)) |
21475 | { |
21476 | res = 0xFF; |
21477 | PRE_IO |
21478 | WRITE_BYTE_F(adr, res) |
21479 | POST_IO |
21480 | RET(16) |
21481 | } |
21482 | res = 0; |
21483 | PRE_IO |
21484 | WRITE_BYTE_F(adr, res) |
21485 | POST_IO |
21486 | RET(16) |
21487 | } |
21488 | |
21489 | // STCC |
21490 | OPCODE(0x5DE8) |
21491 | { |
21492 | u32 adr, res; |
21493 | u32 src, dst; |
21494 | |
21495 | FETCH_SWORD(adr); |
21496 | adr += AREG((Opcode >> 0) & 7); |
21497 | if ((flag_N ^ flag_V) & 0x80) |
21498 | { |
21499 | res = 0xFF; |
21500 | PRE_IO |
21501 | WRITE_BYTE_F(adr, res) |
21502 | POST_IO |
21503 | RET(16) |
21504 | } |
21505 | res = 0; |
21506 | PRE_IO |
21507 | WRITE_BYTE_F(adr, res) |
21508 | POST_IO |
21509 | RET(16) |
21510 | } |
21511 | |
21512 | // STCC |
21513 | OPCODE(0x5EE8) |
21514 | { |
21515 | u32 adr, res; |
21516 | u32 src, dst; |
21517 | |
21518 | FETCH_SWORD(adr); |
21519 | adr += AREG((Opcode >> 0) & 7); |
21520 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21521 | { |
21522 | res = 0xFF; |
21523 | PRE_IO |
21524 | WRITE_BYTE_F(adr, res) |
21525 | POST_IO |
21526 | RET(16) |
21527 | } |
21528 | res = 0; |
21529 | PRE_IO |
21530 | WRITE_BYTE_F(adr, res) |
21531 | POST_IO |
21532 | RET(16) |
21533 | } |
21534 | |
21535 | // STCC |
21536 | OPCODE(0x5FE8) |
21537 | { |
21538 | u32 adr, res; |
21539 | u32 src, dst; |
21540 | |
21541 | FETCH_SWORD(adr); |
21542 | adr += AREG((Opcode >> 0) & 7); |
21543 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21544 | { |
21545 | res = 0xFF; |
21546 | PRE_IO |
21547 | WRITE_BYTE_F(adr, res) |
21548 | POST_IO |
21549 | RET(16) |
21550 | } |
21551 | res = 0; |
21552 | PRE_IO |
21553 | WRITE_BYTE_F(adr, res) |
21554 | POST_IO |
21555 | RET(16) |
21556 | } |
21557 | |
21558 | // STCC |
21559 | OPCODE(0x50F0) |
21560 | { |
21561 | u32 adr, res; |
21562 | u32 src, dst; |
21563 | |
21564 | adr = AREG((Opcode >> 0) & 7); |
21565 | DECODE_EXT_WORD |
21566 | res = 0xFF; |
21567 | PRE_IO |
21568 | WRITE_BYTE_F(adr, res) |
21569 | POST_IO |
21570 | RET(18) |
21571 | } |
21572 | |
21573 | // STCC |
21574 | OPCODE(0x51F0) |
21575 | { |
21576 | u32 adr, res; |
21577 | u32 src, dst; |
21578 | |
21579 | adr = AREG((Opcode >> 0) & 7); |
21580 | DECODE_EXT_WORD |
21581 | res = 0; |
21582 | PRE_IO |
21583 | WRITE_BYTE_F(adr, res) |
21584 | POST_IO |
21585 | RET(18) |
21586 | } |
21587 | |
21588 | // STCC |
21589 | OPCODE(0x52F0) |
21590 | { |
21591 | u32 adr, res; |
21592 | u32 src, dst; |
21593 | |
21594 | adr = AREG((Opcode >> 0) & 7); |
21595 | DECODE_EXT_WORD |
21596 | if (flag_NotZ && (!(flag_C & 0x100))) |
21597 | { |
21598 | res = 0xFF; |
21599 | PRE_IO |
21600 | WRITE_BYTE_F(adr, res) |
21601 | POST_IO |
21602 | RET(18) |
21603 | } |
21604 | res = 0; |
21605 | PRE_IO |
21606 | WRITE_BYTE_F(adr, res) |
21607 | POST_IO |
21608 | RET(18) |
21609 | } |
21610 | |
21611 | // STCC |
21612 | OPCODE(0x53F0) |
21613 | { |
21614 | u32 adr, res; |
21615 | u32 src, dst; |
21616 | |
21617 | adr = AREG((Opcode >> 0) & 7); |
21618 | DECODE_EXT_WORD |
21619 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21620 | { |
21621 | res = 0xFF; |
21622 | PRE_IO |
21623 | WRITE_BYTE_F(adr, res) |
21624 | POST_IO |
21625 | RET(18) |
21626 | } |
21627 | res = 0; |
21628 | PRE_IO |
21629 | WRITE_BYTE_F(adr, res) |
21630 | POST_IO |
21631 | RET(18) |
21632 | } |
21633 | |
21634 | // STCC |
21635 | OPCODE(0x54F0) |
21636 | { |
21637 | u32 adr, res; |
21638 | u32 src, dst; |
21639 | |
21640 | adr = AREG((Opcode >> 0) & 7); |
21641 | DECODE_EXT_WORD |
21642 | if (!(flag_C & 0x100)) |
21643 | { |
21644 | res = 0xFF; |
21645 | PRE_IO |
21646 | WRITE_BYTE_F(adr, res) |
21647 | POST_IO |
21648 | RET(18) |
21649 | } |
21650 | res = 0; |
21651 | PRE_IO |
21652 | WRITE_BYTE_F(adr, res) |
21653 | POST_IO |
21654 | RET(18) |
21655 | } |
21656 | |
21657 | // STCC |
21658 | OPCODE(0x55F0) |
21659 | { |
21660 | u32 adr, res; |
21661 | u32 src, dst; |
21662 | |
21663 | adr = AREG((Opcode >> 0) & 7); |
21664 | DECODE_EXT_WORD |
21665 | if (flag_C & 0x100) |
21666 | { |
21667 | res = 0xFF; |
21668 | PRE_IO |
21669 | WRITE_BYTE_F(adr, res) |
21670 | POST_IO |
21671 | RET(18) |
21672 | } |
21673 | res = 0; |
21674 | PRE_IO |
21675 | WRITE_BYTE_F(adr, res) |
21676 | POST_IO |
21677 | RET(18) |
21678 | } |
21679 | |
21680 | // STCC |
21681 | OPCODE(0x56F0) |
21682 | { |
21683 | u32 adr, res; |
21684 | u32 src, dst; |
21685 | |
21686 | adr = AREG((Opcode >> 0) & 7); |
21687 | DECODE_EXT_WORD |
21688 | if (flag_NotZ) |
21689 | { |
21690 | res = 0xFF; |
21691 | PRE_IO |
21692 | WRITE_BYTE_F(adr, res) |
21693 | POST_IO |
21694 | RET(18) |
21695 | } |
21696 | res = 0; |
21697 | PRE_IO |
21698 | WRITE_BYTE_F(adr, res) |
21699 | POST_IO |
21700 | RET(18) |
21701 | } |
21702 | |
21703 | // STCC |
21704 | OPCODE(0x57F0) |
21705 | { |
21706 | u32 adr, res; |
21707 | u32 src, dst; |
21708 | |
21709 | adr = AREG((Opcode >> 0) & 7); |
21710 | DECODE_EXT_WORD |
21711 | if (!flag_NotZ) |
21712 | { |
21713 | res = 0xFF; |
21714 | PRE_IO |
21715 | WRITE_BYTE_F(adr, res) |
21716 | POST_IO |
21717 | RET(18) |
21718 | } |
21719 | res = 0; |
21720 | PRE_IO |
21721 | WRITE_BYTE_F(adr, res) |
21722 | POST_IO |
21723 | RET(18) |
21724 | } |
21725 | |
21726 | // STCC |
21727 | OPCODE(0x58F0) |
21728 | { |
21729 | u32 adr, res; |
21730 | u32 src, dst; |
21731 | |
21732 | adr = AREG((Opcode >> 0) & 7); |
21733 | DECODE_EXT_WORD |
21734 | if (!(flag_V & 0x80)) |
21735 | { |
21736 | res = 0xFF; |
21737 | PRE_IO |
21738 | WRITE_BYTE_F(adr, res) |
21739 | POST_IO |
21740 | RET(18) |
21741 | } |
21742 | res = 0; |
21743 | PRE_IO |
21744 | WRITE_BYTE_F(adr, res) |
21745 | POST_IO |
21746 | RET(18) |
21747 | } |
21748 | |
21749 | // STCC |
21750 | OPCODE(0x59F0) |
21751 | { |
21752 | u32 adr, res; |
21753 | u32 src, dst; |
21754 | |
21755 | adr = AREG((Opcode >> 0) & 7); |
21756 | DECODE_EXT_WORD |
21757 | if (flag_V & 0x80) |
21758 | { |
21759 | res = 0xFF; |
21760 | PRE_IO |
21761 | WRITE_BYTE_F(adr, res) |
21762 | POST_IO |
21763 | RET(18) |
21764 | } |
21765 | res = 0; |
21766 | PRE_IO |
21767 | WRITE_BYTE_F(adr, res) |
21768 | POST_IO |
21769 | RET(18) |
21770 | } |
21771 | |
21772 | // STCC |
21773 | OPCODE(0x5AF0) |
21774 | { |
21775 | u32 adr, res; |
21776 | u32 src, dst; |
21777 | |
21778 | adr = AREG((Opcode >> 0) & 7); |
21779 | DECODE_EXT_WORD |
21780 | if (!(flag_N & 0x80)) |
21781 | { |
21782 | res = 0xFF; |
21783 | PRE_IO |
21784 | WRITE_BYTE_F(adr, res) |
21785 | POST_IO |
21786 | RET(18) |
21787 | } |
21788 | res = 0; |
21789 | PRE_IO |
21790 | WRITE_BYTE_F(adr, res) |
21791 | POST_IO |
21792 | RET(18) |
21793 | } |
21794 | |
21795 | // STCC |
21796 | OPCODE(0x5BF0) |
21797 | { |
21798 | u32 adr, res; |
21799 | u32 src, dst; |
21800 | |
21801 | adr = AREG((Opcode >> 0) & 7); |
21802 | DECODE_EXT_WORD |
21803 | if (flag_N & 0x80) |
21804 | { |
21805 | res = 0xFF; |
21806 | PRE_IO |
21807 | WRITE_BYTE_F(adr, res) |
21808 | POST_IO |
21809 | RET(18) |
21810 | } |
21811 | res = 0; |
21812 | PRE_IO |
21813 | WRITE_BYTE_F(adr, res) |
21814 | POST_IO |
21815 | RET(18) |
21816 | } |
21817 | |
21818 | // STCC |
21819 | OPCODE(0x5CF0) |
21820 | { |
21821 | u32 adr, res; |
21822 | u32 src, dst; |
21823 | |
21824 | adr = AREG((Opcode >> 0) & 7); |
21825 | DECODE_EXT_WORD |
21826 | if (!((flag_N ^ flag_V) & 0x80)) |
21827 | { |
21828 | res = 0xFF; |
21829 | PRE_IO |
21830 | WRITE_BYTE_F(adr, res) |
21831 | POST_IO |
21832 | RET(18) |
21833 | } |
21834 | res = 0; |
21835 | PRE_IO |
21836 | WRITE_BYTE_F(adr, res) |
21837 | POST_IO |
21838 | RET(18) |
21839 | } |
21840 | |
21841 | // STCC |
21842 | OPCODE(0x5DF0) |
21843 | { |
21844 | u32 adr, res; |
21845 | u32 src, dst; |
21846 | |
21847 | adr = AREG((Opcode >> 0) & 7); |
21848 | DECODE_EXT_WORD |
21849 | if ((flag_N ^ flag_V) & 0x80) |
21850 | { |
21851 | res = 0xFF; |
21852 | PRE_IO |
21853 | WRITE_BYTE_F(adr, res) |
21854 | POST_IO |
21855 | RET(18) |
21856 | } |
21857 | res = 0; |
21858 | PRE_IO |
21859 | WRITE_BYTE_F(adr, res) |
21860 | POST_IO |
21861 | RET(18) |
21862 | } |
21863 | |
21864 | // STCC |
21865 | OPCODE(0x5EF0) |
21866 | { |
21867 | u32 adr, res; |
21868 | u32 src, dst; |
21869 | |
21870 | adr = AREG((Opcode >> 0) & 7); |
21871 | DECODE_EXT_WORD |
21872 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21873 | { |
21874 | res = 0xFF; |
21875 | PRE_IO |
21876 | WRITE_BYTE_F(adr, res) |
21877 | POST_IO |
21878 | RET(18) |
21879 | } |
21880 | res = 0; |
21881 | PRE_IO |
21882 | WRITE_BYTE_F(adr, res) |
21883 | POST_IO |
21884 | RET(18) |
21885 | } |
21886 | |
21887 | // STCC |
21888 | OPCODE(0x5FF0) |
21889 | { |
21890 | u32 adr, res; |
21891 | u32 src, dst; |
21892 | |
21893 | adr = AREG((Opcode >> 0) & 7); |
21894 | DECODE_EXT_WORD |
21895 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21896 | { |
21897 | res = 0xFF; |
21898 | PRE_IO |
21899 | WRITE_BYTE_F(adr, res) |
21900 | POST_IO |
21901 | RET(18) |
21902 | } |
21903 | res = 0; |
21904 | PRE_IO |
21905 | WRITE_BYTE_F(adr, res) |
21906 | POST_IO |
21907 | RET(18) |
21908 | } |
21909 | |
21910 | // STCC |
21911 | OPCODE(0x50F8) |
21912 | { |
21913 | u32 adr, res; |
21914 | u32 src, dst; |
21915 | |
21916 | FETCH_SWORD(adr); |
21917 | res = 0xFF; |
21918 | PRE_IO |
21919 | WRITE_BYTE_F(adr, res) |
21920 | POST_IO |
21921 | RET(16) |
21922 | } |
21923 | |
21924 | // STCC |
21925 | OPCODE(0x51F8) |
21926 | { |
21927 | u32 adr, res; |
21928 | u32 src, dst; |
21929 | |
21930 | FETCH_SWORD(adr); |
21931 | res = 0; |
21932 | PRE_IO |
21933 | WRITE_BYTE_F(adr, res) |
21934 | POST_IO |
21935 | RET(16) |
21936 | } |
21937 | |
21938 | // STCC |
21939 | OPCODE(0x52F8) |
21940 | { |
21941 | u32 adr, res; |
21942 | u32 src, dst; |
21943 | |
21944 | FETCH_SWORD(adr); |
21945 | if (flag_NotZ && (!(flag_C & 0x100))) |
21946 | { |
21947 | res = 0xFF; |
21948 | PRE_IO |
21949 | WRITE_BYTE_F(adr, res) |
21950 | POST_IO |
21951 | RET(16) |
21952 | } |
21953 | res = 0; |
21954 | PRE_IO |
21955 | WRITE_BYTE_F(adr, res) |
21956 | POST_IO |
21957 | RET(16) |
21958 | } |
21959 | |
21960 | // STCC |
21961 | OPCODE(0x53F8) |
21962 | { |
21963 | u32 adr, res; |
21964 | u32 src, dst; |
21965 | |
21966 | FETCH_SWORD(adr); |
21967 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21968 | { |
21969 | res = 0xFF; |
21970 | PRE_IO |
21971 | WRITE_BYTE_F(adr, res) |
21972 | POST_IO |
21973 | RET(16) |
21974 | } |
21975 | res = 0; |
21976 | PRE_IO |
21977 | WRITE_BYTE_F(adr, res) |
21978 | POST_IO |
21979 | RET(16) |
21980 | } |
21981 | |
21982 | // STCC |
21983 | OPCODE(0x54F8) |
21984 | { |
21985 | u32 adr, res; |
21986 | u32 src, dst; |
21987 | |
21988 | FETCH_SWORD(adr); |
21989 | if (!(flag_C & 0x100)) |
21990 | { |
21991 | res = 0xFF; |
21992 | PRE_IO |
21993 | WRITE_BYTE_F(adr, res) |
21994 | POST_IO |
21995 | RET(16) |
21996 | } |
21997 | res = 0; |
21998 | PRE_IO |
21999 | WRITE_BYTE_F(adr, res) |
22000 | POST_IO |
22001 | RET(16) |
22002 | } |
22003 | |
22004 | // STCC |
22005 | OPCODE(0x55F8) |
22006 | { |
22007 | u32 adr, res; |
22008 | u32 src, dst; |
22009 | |
22010 | FETCH_SWORD(adr); |
22011 | if (flag_C & 0x100) |
22012 | { |
22013 | res = 0xFF; |
22014 | PRE_IO |
22015 | WRITE_BYTE_F(adr, res) |
22016 | POST_IO |
22017 | RET(16) |
22018 | } |
22019 | res = 0; |
22020 | PRE_IO |
22021 | WRITE_BYTE_F(adr, res) |
22022 | POST_IO |
22023 | RET(16) |
22024 | } |
22025 | |
22026 | // STCC |
22027 | OPCODE(0x56F8) |
22028 | { |
22029 | u32 adr, res; |
22030 | u32 src, dst; |
22031 | |
22032 | FETCH_SWORD(adr); |
22033 | if (flag_NotZ) |
22034 | { |
22035 | res = 0xFF; |
22036 | PRE_IO |
22037 | WRITE_BYTE_F(adr, res) |
22038 | POST_IO |
22039 | RET(16) |
22040 | } |
22041 | res = 0; |
22042 | PRE_IO |
22043 | WRITE_BYTE_F(adr, res) |
22044 | POST_IO |
22045 | RET(16) |
22046 | } |
22047 | |
22048 | // STCC |
22049 | OPCODE(0x57F8) |
22050 | { |
22051 | u32 adr, res; |
22052 | u32 src, dst; |
22053 | |
22054 | FETCH_SWORD(adr); |
22055 | if (!flag_NotZ) |
22056 | { |
22057 | res = 0xFF; |
22058 | PRE_IO |
22059 | WRITE_BYTE_F(adr, res) |
22060 | POST_IO |
22061 | RET(16) |
22062 | } |
22063 | res = 0; |
22064 | PRE_IO |
22065 | WRITE_BYTE_F(adr, res) |
22066 | POST_IO |
22067 | RET(16) |
22068 | } |
22069 | |
22070 | // STCC |
22071 | OPCODE(0x58F8) |
22072 | { |
22073 | u32 adr, res; |
22074 | u32 src, dst; |
22075 | |
22076 | FETCH_SWORD(adr); |
22077 | if (!(flag_V & 0x80)) |
22078 | { |
22079 | res = 0xFF; |
22080 | PRE_IO |
22081 | WRITE_BYTE_F(adr, res) |
22082 | POST_IO |
22083 | RET(16) |
22084 | } |
22085 | res = 0; |
22086 | PRE_IO |
22087 | WRITE_BYTE_F(adr, res) |
22088 | POST_IO |
22089 | RET(16) |
22090 | } |
22091 | |
22092 | // STCC |
22093 | OPCODE(0x59F8) |
22094 | { |
22095 | u32 adr, res; |
22096 | u32 src, dst; |
22097 | |
22098 | FETCH_SWORD(adr); |
22099 | if (flag_V & 0x80) |
22100 | { |
22101 | res = 0xFF; |
22102 | PRE_IO |
22103 | WRITE_BYTE_F(adr, res) |
22104 | POST_IO |
22105 | RET(16) |
22106 | } |
22107 | res = 0; |
22108 | PRE_IO |
22109 | WRITE_BYTE_F(adr, res) |
22110 | POST_IO |
22111 | RET(16) |
22112 | } |
22113 | |
22114 | // STCC |
22115 | OPCODE(0x5AF8) |
22116 | { |
22117 | u32 adr, res; |
22118 | u32 src, dst; |
22119 | |
22120 | FETCH_SWORD(adr); |
22121 | if (!(flag_N & 0x80)) |
22122 | { |
22123 | res = 0xFF; |
22124 | PRE_IO |
22125 | WRITE_BYTE_F(adr, res) |
22126 | POST_IO |
22127 | RET(16) |
22128 | } |
22129 | res = 0; |
22130 | PRE_IO |
22131 | WRITE_BYTE_F(adr, res) |
22132 | POST_IO |
22133 | RET(16) |
22134 | } |
22135 | |
22136 | // STCC |
22137 | OPCODE(0x5BF8) |
22138 | { |
22139 | u32 adr, res; |
22140 | u32 src, dst; |
22141 | |
22142 | FETCH_SWORD(adr); |
22143 | if (flag_N & 0x80) |
22144 | { |
22145 | res = 0xFF; |
22146 | PRE_IO |
22147 | WRITE_BYTE_F(adr, res) |
22148 | POST_IO |
22149 | RET(16) |
22150 | } |
22151 | res = 0; |
22152 | PRE_IO |
22153 | WRITE_BYTE_F(adr, res) |
22154 | POST_IO |
22155 | RET(16) |
22156 | } |
22157 | |
22158 | // STCC |
22159 | OPCODE(0x5CF8) |
22160 | { |
22161 | u32 adr, res; |
22162 | u32 src, dst; |
22163 | |
22164 | FETCH_SWORD(adr); |
22165 | if (!((flag_N ^ flag_V) & 0x80)) |
22166 | { |
22167 | res = 0xFF; |
22168 | PRE_IO |
22169 | WRITE_BYTE_F(adr, res) |
22170 | POST_IO |
22171 | RET(16) |
22172 | } |
22173 | res = 0; |
22174 | PRE_IO |
22175 | WRITE_BYTE_F(adr, res) |
22176 | POST_IO |
22177 | RET(16) |
22178 | } |
22179 | |
22180 | // STCC |
22181 | OPCODE(0x5DF8) |
22182 | { |
22183 | u32 adr, res; |
22184 | u32 src, dst; |
22185 | |
22186 | FETCH_SWORD(adr); |
22187 | if ((flag_N ^ flag_V) & 0x80) |
22188 | { |
22189 | res = 0xFF; |
22190 | PRE_IO |
22191 | WRITE_BYTE_F(adr, res) |
22192 | POST_IO |
22193 | RET(16) |
22194 | } |
22195 | res = 0; |
22196 | PRE_IO |
22197 | WRITE_BYTE_F(adr, res) |
22198 | POST_IO |
22199 | RET(16) |
22200 | } |
22201 | |
22202 | // STCC |
22203 | OPCODE(0x5EF8) |
22204 | { |
22205 | u32 adr, res; |
22206 | u32 src, dst; |
22207 | |
22208 | FETCH_SWORD(adr); |
22209 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22210 | { |
22211 | res = 0xFF; |
22212 | PRE_IO |
22213 | WRITE_BYTE_F(adr, res) |
22214 | POST_IO |
22215 | RET(16) |
22216 | } |
22217 | res = 0; |
22218 | PRE_IO |
22219 | WRITE_BYTE_F(adr, res) |
22220 | POST_IO |
22221 | RET(16) |
22222 | } |
22223 | |
22224 | // STCC |
22225 | OPCODE(0x5FF8) |
22226 | { |
22227 | u32 adr, res; |
22228 | u32 src, dst; |
22229 | |
22230 | FETCH_SWORD(adr); |
22231 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22232 | { |
22233 | res = 0xFF; |
22234 | PRE_IO |
22235 | WRITE_BYTE_F(adr, res) |
22236 | POST_IO |
22237 | RET(16) |
22238 | } |
22239 | res = 0; |
22240 | PRE_IO |
22241 | WRITE_BYTE_F(adr, res) |
22242 | POST_IO |
22243 | RET(16) |
22244 | } |
22245 | |
22246 | // STCC |
22247 | OPCODE(0x50F9) |
22248 | { |
22249 | u32 adr, res; |
22250 | u32 src, dst; |
22251 | |
22252 | FETCH_LONG(adr); |
22253 | res = 0xFF; |
22254 | PRE_IO |
22255 | WRITE_BYTE_F(adr, res) |
22256 | POST_IO |
22257 | RET(20) |
22258 | } |
22259 | |
22260 | // STCC |
22261 | OPCODE(0x51F9) |
22262 | { |
22263 | u32 adr, res; |
22264 | u32 src, dst; |
22265 | |
22266 | FETCH_LONG(adr); |
22267 | res = 0; |
22268 | PRE_IO |
22269 | WRITE_BYTE_F(adr, res) |
22270 | POST_IO |
22271 | RET(20) |
22272 | } |
22273 | |
22274 | // STCC |
22275 | OPCODE(0x52F9) |
22276 | { |
22277 | u32 adr, res; |
22278 | u32 src, dst; |
22279 | |
22280 | FETCH_LONG(adr); |
22281 | if (flag_NotZ && (!(flag_C & 0x100))) |
22282 | { |
22283 | res = 0xFF; |
22284 | PRE_IO |
22285 | WRITE_BYTE_F(adr, res) |
22286 | POST_IO |
22287 | RET(20) |
22288 | } |
22289 | res = 0; |
22290 | PRE_IO |
22291 | WRITE_BYTE_F(adr, res) |
22292 | POST_IO |
22293 | RET(20) |
22294 | } |
22295 | |
22296 | // STCC |
22297 | OPCODE(0x53F9) |
22298 | { |
22299 | u32 adr, res; |
22300 | u32 src, dst; |
22301 | |
22302 | FETCH_LONG(adr); |
22303 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22304 | { |
22305 | res = 0xFF; |
22306 | PRE_IO |
22307 | WRITE_BYTE_F(adr, res) |
22308 | POST_IO |
22309 | RET(20) |
22310 | } |
22311 | res = 0; |
22312 | PRE_IO |
22313 | WRITE_BYTE_F(adr, res) |
22314 | POST_IO |
22315 | RET(20) |
22316 | } |
22317 | |
22318 | // STCC |
22319 | OPCODE(0x54F9) |
22320 | { |
22321 | u32 adr, res; |
22322 | u32 src, dst; |
22323 | |
22324 | FETCH_LONG(adr); |
22325 | if (!(flag_C & 0x100)) |
22326 | { |
22327 | res = 0xFF; |
22328 | PRE_IO |
22329 | WRITE_BYTE_F(adr, res) |
22330 | POST_IO |
22331 | RET(20) |
22332 | } |
22333 | res = 0; |
22334 | PRE_IO |
22335 | WRITE_BYTE_F(adr, res) |
22336 | POST_IO |
22337 | RET(20) |
22338 | } |
22339 | |
22340 | // STCC |
22341 | OPCODE(0x55F9) |
22342 | { |
22343 | u32 adr, res; |
22344 | u32 src, dst; |
22345 | |
22346 | FETCH_LONG(adr); |
22347 | if (flag_C & 0x100) |
22348 | { |
22349 | res = 0xFF; |
22350 | PRE_IO |
22351 | WRITE_BYTE_F(adr, res) |
22352 | POST_IO |
22353 | RET(20) |
22354 | } |
22355 | res = 0; |
22356 | PRE_IO |
22357 | WRITE_BYTE_F(adr, res) |
22358 | POST_IO |
22359 | RET(20) |
22360 | } |
22361 | |
22362 | // STCC |
22363 | OPCODE(0x56F9) |
22364 | { |
22365 | u32 adr, res; |
22366 | u32 src, dst; |
22367 | |
22368 | FETCH_LONG(adr); |
22369 | if (flag_NotZ) |
22370 | { |
22371 | res = 0xFF; |
22372 | PRE_IO |
22373 | WRITE_BYTE_F(adr, res) |
22374 | POST_IO |
22375 | RET(20) |
22376 | } |
22377 | res = 0; |
22378 | PRE_IO |
22379 | WRITE_BYTE_F(adr, res) |
22380 | POST_IO |
22381 | RET(20) |
22382 | } |
22383 | |
22384 | // STCC |
22385 | OPCODE(0x57F9) |
22386 | { |
22387 | u32 adr, res; |
22388 | u32 src, dst; |
22389 | |
22390 | FETCH_LONG(adr); |
22391 | if (!flag_NotZ) |
22392 | { |
22393 | res = 0xFF; |
22394 | PRE_IO |
22395 | WRITE_BYTE_F(adr, res) |
22396 | POST_IO |
22397 | RET(20) |
22398 | } |
22399 | res = 0; |
22400 | PRE_IO |
22401 | WRITE_BYTE_F(adr, res) |
22402 | POST_IO |
22403 | RET(20) |
22404 | } |
22405 | |
22406 | // STCC |
22407 | OPCODE(0x58F9) |
22408 | { |
22409 | u32 adr, res; |
22410 | u32 src, dst; |
22411 | |
22412 | FETCH_LONG(adr); |
22413 | if (!(flag_V & 0x80)) |
22414 | { |
22415 | res = 0xFF; |
22416 | PRE_IO |
22417 | WRITE_BYTE_F(adr, res) |
22418 | POST_IO |
22419 | RET(20) |
22420 | } |
22421 | res = 0; |
22422 | PRE_IO |
22423 | WRITE_BYTE_F(adr, res) |
22424 | POST_IO |
22425 | RET(20) |
22426 | } |
22427 | |
22428 | // STCC |
22429 | OPCODE(0x59F9) |
22430 | { |
22431 | u32 adr, res; |
22432 | u32 src, dst; |
22433 | |
22434 | FETCH_LONG(adr); |
22435 | if (flag_V & 0x80) |
22436 | { |
22437 | res = 0xFF; |
22438 | PRE_IO |
22439 | WRITE_BYTE_F(adr, res) |
22440 | POST_IO |
22441 | RET(20) |
22442 | } |
22443 | res = 0; |
22444 | PRE_IO |
22445 | WRITE_BYTE_F(adr, res) |
22446 | POST_IO |
22447 | RET(20) |
22448 | } |
22449 | |
22450 | // STCC |
22451 | OPCODE(0x5AF9) |
22452 | { |
22453 | u32 adr, res; |
22454 | u32 src, dst; |
22455 | |
22456 | FETCH_LONG(adr); |
22457 | if (!(flag_N & 0x80)) |
22458 | { |
22459 | res = 0xFF; |
22460 | PRE_IO |
22461 | WRITE_BYTE_F(adr, res) |
22462 | POST_IO |
22463 | RET(20) |
22464 | } |
22465 | res = 0; |
22466 | PRE_IO |
22467 | WRITE_BYTE_F(adr, res) |
22468 | POST_IO |
22469 | RET(20) |
22470 | } |
22471 | |
22472 | // STCC |
22473 | OPCODE(0x5BF9) |
22474 | { |
22475 | u32 adr, res; |
22476 | u32 src, dst; |
22477 | |
22478 | FETCH_LONG(adr); |
22479 | if (flag_N & 0x80) |
22480 | { |
22481 | res = 0xFF; |
22482 | PRE_IO |
22483 | WRITE_BYTE_F(adr, res) |
22484 | POST_IO |
22485 | RET(20) |
22486 | } |
22487 | res = 0; |
22488 | PRE_IO |
22489 | WRITE_BYTE_F(adr, res) |
22490 | POST_IO |
22491 | RET(20) |
22492 | } |
22493 | |
22494 | // STCC |
22495 | OPCODE(0x5CF9) |
22496 | { |
22497 | u32 adr, res; |
22498 | u32 src, dst; |
22499 | |
22500 | FETCH_LONG(adr); |
22501 | if (!((flag_N ^ flag_V) & 0x80)) |
22502 | { |
22503 | res = 0xFF; |
22504 | PRE_IO |
22505 | WRITE_BYTE_F(adr, res) |
22506 | POST_IO |
22507 | RET(20) |
22508 | } |
22509 | res = 0; |
22510 | PRE_IO |
22511 | WRITE_BYTE_F(adr, res) |
22512 | POST_IO |
22513 | RET(20) |
22514 | } |
22515 | |
22516 | // STCC |
22517 | OPCODE(0x5DF9) |
22518 | { |
22519 | u32 adr, res; |
22520 | u32 src, dst; |
22521 | |
22522 | FETCH_LONG(adr); |
22523 | if ((flag_N ^ flag_V) & 0x80) |
22524 | { |
22525 | res = 0xFF; |
22526 | PRE_IO |
22527 | WRITE_BYTE_F(adr, res) |
22528 | POST_IO |
22529 | RET(20) |
22530 | } |
22531 | res = 0; |
22532 | PRE_IO |
22533 | WRITE_BYTE_F(adr, res) |
22534 | POST_IO |
22535 | RET(20) |
22536 | } |
22537 | |
22538 | // STCC |
22539 | OPCODE(0x5EF9) |
22540 | { |
22541 | u32 adr, res; |
22542 | u32 src, dst; |
22543 | |
22544 | FETCH_LONG(adr); |
22545 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22546 | { |
22547 | res = 0xFF; |
22548 | PRE_IO |
22549 | WRITE_BYTE_F(adr, res) |
22550 | POST_IO |
22551 | RET(20) |
22552 | } |
22553 | res = 0; |
22554 | PRE_IO |
22555 | WRITE_BYTE_F(adr, res) |
22556 | POST_IO |
22557 | RET(20) |
22558 | } |
22559 | |
22560 | // STCC |
22561 | OPCODE(0x5FF9) |
22562 | { |
22563 | u32 adr, res; |
22564 | u32 src, dst; |
22565 | |
22566 | FETCH_LONG(adr); |
22567 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22568 | { |
22569 | res = 0xFF; |
22570 | PRE_IO |
22571 | WRITE_BYTE_F(adr, res) |
22572 | POST_IO |
22573 | RET(20) |
22574 | } |
22575 | res = 0; |
22576 | PRE_IO |
22577 | WRITE_BYTE_F(adr, res) |
22578 | POST_IO |
22579 | RET(20) |
22580 | } |
22581 | |
22582 | // STCC |
22583 | OPCODE(0x50DF) |
22584 | { |
22585 | u32 adr, res; |
22586 | u32 src, dst; |
22587 | |
22588 | adr = AREG(7); |
22589 | AREG(7) += 2; |
22590 | res = 0xFF; |
22591 | PRE_IO |
22592 | WRITE_BYTE_F(adr, res) |
22593 | POST_IO |
22594 | RET(12) |
22595 | } |
22596 | |
22597 | // STCC |
22598 | OPCODE(0x51DF) |
22599 | { |
22600 | u32 adr, res; |
22601 | u32 src, dst; |
22602 | |
22603 | adr = AREG(7); |
22604 | AREG(7) += 2; |
22605 | res = 0; |
22606 | PRE_IO |
22607 | WRITE_BYTE_F(adr, res) |
22608 | POST_IO |
22609 | RET(12) |
22610 | } |
22611 | |
22612 | // STCC |
22613 | OPCODE(0x52DF) |
22614 | { |
22615 | u32 adr, res; |
22616 | u32 src, dst; |
22617 | |
22618 | adr = AREG(7); |
22619 | AREG(7) += 2; |
22620 | if (flag_NotZ && (!(flag_C & 0x100))) |
22621 | { |
22622 | res = 0xFF; |
22623 | PRE_IO |
22624 | WRITE_BYTE_F(adr, res) |
22625 | POST_IO |
22626 | RET(12) |
22627 | } |
22628 | res = 0; |
22629 | PRE_IO |
22630 | WRITE_BYTE_F(adr, res) |
22631 | POST_IO |
22632 | RET(12) |
22633 | } |
22634 | |
22635 | // STCC |
22636 | OPCODE(0x53DF) |
22637 | { |
22638 | u32 adr, res; |
22639 | u32 src, dst; |
22640 | |
22641 | adr = AREG(7); |
22642 | AREG(7) += 2; |
22643 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22644 | { |
22645 | res = 0xFF; |
22646 | PRE_IO |
22647 | WRITE_BYTE_F(adr, res) |
22648 | POST_IO |
22649 | RET(12) |
22650 | } |
22651 | res = 0; |
22652 | PRE_IO |
22653 | WRITE_BYTE_F(adr, res) |
22654 | POST_IO |
22655 | RET(12) |
22656 | } |
22657 | |
22658 | // STCC |
22659 | OPCODE(0x54DF) |
22660 | { |
22661 | u32 adr, res; |
22662 | u32 src, dst; |
22663 | |
22664 | adr = AREG(7); |
22665 | AREG(7) += 2; |
22666 | if (!(flag_C & 0x100)) |
22667 | { |
22668 | res = 0xFF; |
22669 | PRE_IO |
22670 | WRITE_BYTE_F(adr, res) |
22671 | POST_IO |
22672 | RET(12) |
22673 | } |
22674 | res = 0; |
22675 | PRE_IO |
22676 | WRITE_BYTE_F(adr, res) |
22677 | POST_IO |
22678 | RET(12) |
22679 | } |
22680 | |
22681 | // STCC |
22682 | OPCODE(0x55DF) |
22683 | { |
22684 | u32 adr, res; |
22685 | u32 src, dst; |
22686 | |
22687 | adr = AREG(7); |
22688 | AREG(7) += 2; |
22689 | if (flag_C & 0x100) |
22690 | { |
22691 | res = 0xFF; |
22692 | PRE_IO |
22693 | WRITE_BYTE_F(adr, res) |
22694 | POST_IO |
22695 | RET(12) |
22696 | } |
22697 | res = 0; |
22698 | PRE_IO |
22699 | WRITE_BYTE_F(adr, res) |
22700 | POST_IO |
22701 | RET(12) |
22702 | } |
22703 | |
22704 | // STCC |
22705 | OPCODE(0x56DF) |
22706 | { |
22707 | u32 adr, res; |
22708 | u32 src, dst; |
22709 | |
22710 | adr = AREG(7); |
22711 | AREG(7) += 2; |
22712 | if (flag_NotZ) |
22713 | { |
22714 | res = 0xFF; |
22715 | PRE_IO |
22716 | WRITE_BYTE_F(adr, res) |
22717 | POST_IO |
22718 | RET(12) |
22719 | } |
22720 | res = 0; |
22721 | PRE_IO |
22722 | WRITE_BYTE_F(adr, res) |
22723 | POST_IO |
22724 | RET(12) |
22725 | } |
22726 | |
22727 | // STCC |
22728 | OPCODE(0x57DF) |
22729 | { |
22730 | u32 adr, res; |
22731 | u32 src, dst; |
22732 | |
22733 | adr = AREG(7); |
22734 | AREG(7) += 2; |
22735 | if (!flag_NotZ) |
22736 | { |
22737 | res = 0xFF; |
22738 | PRE_IO |
22739 | WRITE_BYTE_F(adr, res) |
22740 | POST_IO |
22741 | RET(12) |
22742 | } |
22743 | res = 0; |
22744 | PRE_IO |
22745 | WRITE_BYTE_F(adr, res) |
22746 | POST_IO |
22747 | RET(12) |
22748 | } |
22749 | |
22750 | // STCC |
22751 | OPCODE(0x58DF) |
22752 | { |
22753 | u32 adr, res; |
22754 | u32 src, dst; |
22755 | |
22756 | adr = AREG(7); |
22757 | AREG(7) += 2; |
22758 | if (!(flag_V & 0x80)) |
22759 | { |
22760 | res = 0xFF; |
22761 | PRE_IO |
22762 | WRITE_BYTE_F(adr, res) |
22763 | POST_IO |
22764 | RET(12) |
22765 | } |
22766 | res = 0; |
22767 | PRE_IO |
22768 | WRITE_BYTE_F(adr, res) |
22769 | POST_IO |
22770 | RET(12) |
22771 | } |
22772 | |
22773 | // STCC |
22774 | OPCODE(0x59DF) |
22775 | { |
22776 | u32 adr, res; |
22777 | u32 src, dst; |
22778 | |
22779 | adr = AREG(7); |
22780 | AREG(7) += 2; |
22781 | if (flag_V & 0x80) |
22782 | { |
22783 | res = 0xFF; |
22784 | PRE_IO |
22785 | WRITE_BYTE_F(adr, res) |
22786 | POST_IO |
22787 | RET(12) |
22788 | } |
22789 | res = 0; |
22790 | PRE_IO |
22791 | WRITE_BYTE_F(adr, res) |
22792 | POST_IO |
22793 | RET(12) |
22794 | } |
22795 | |
22796 | // STCC |
22797 | OPCODE(0x5ADF) |
22798 | { |
22799 | u32 adr, res; |
22800 | u32 src, dst; |
22801 | |
22802 | adr = AREG(7); |
22803 | AREG(7) += 2; |
22804 | if (!(flag_N & 0x80)) |
22805 | { |
22806 | res = 0xFF; |
22807 | PRE_IO |
22808 | WRITE_BYTE_F(adr, res) |
22809 | POST_IO |
22810 | RET(12) |
22811 | } |
22812 | res = 0; |
22813 | PRE_IO |
22814 | WRITE_BYTE_F(adr, res) |
22815 | POST_IO |
22816 | RET(12) |
22817 | } |
22818 | |
22819 | // STCC |
22820 | OPCODE(0x5BDF) |
22821 | { |
22822 | u32 adr, res; |
22823 | u32 src, dst; |
22824 | |
22825 | adr = AREG(7); |
22826 | AREG(7) += 2; |
22827 | if (flag_N & 0x80) |
22828 | { |
22829 | res = 0xFF; |
22830 | PRE_IO |
22831 | WRITE_BYTE_F(adr, res) |
22832 | POST_IO |
22833 | RET(12) |
22834 | } |
22835 | res = 0; |
22836 | PRE_IO |
22837 | WRITE_BYTE_F(adr, res) |
22838 | POST_IO |
22839 | RET(12) |
22840 | } |
22841 | |
22842 | // STCC |
22843 | OPCODE(0x5CDF) |
22844 | { |
22845 | u32 adr, res; |
22846 | u32 src, dst; |
22847 | |
22848 | adr = AREG(7); |
22849 | AREG(7) += 2; |
22850 | if (!((flag_N ^ flag_V) & 0x80)) |
22851 | { |
22852 | res = 0xFF; |
22853 | PRE_IO |
22854 | WRITE_BYTE_F(adr, res) |
22855 | POST_IO |
22856 | RET(12) |
22857 | } |
22858 | res = 0; |
22859 | PRE_IO |
22860 | WRITE_BYTE_F(adr, res) |
22861 | POST_IO |
22862 | RET(12) |
22863 | } |
22864 | |
22865 | // STCC |
22866 | OPCODE(0x5DDF) |
22867 | { |
22868 | u32 adr, res; |
22869 | u32 src, dst; |
22870 | |
22871 | adr = AREG(7); |
22872 | AREG(7) += 2; |
22873 | if ((flag_N ^ flag_V) & 0x80) |
22874 | { |
22875 | res = 0xFF; |
22876 | PRE_IO |
22877 | WRITE_BYTE_F(adr, res) |
22878 | POST_IO |
22879 | RET(12) |
22880 | } |
22881 | res = 0; |
22882 | PRE_IO |
22883 | WRITE_BYTE_F(adr, res) |
22884 | POST_IO |
22885 | RET(12) |
22886 | } |
22887 | |
22888 | // STCC |
22889 | OPCODE(0x5EDF) |
22890 | { |
22891 | u32 adr, res; |
22892 | u32 src, dst; |
22893 | |
22894 | adr = AREG(7); |
22895 | AREG(7) += 2; |
22896 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22897 | { |
22898 | res = 0xFF; |
22899 | PRE_IO |
22900 | WRITE_BYTE_F(adr, res) |
22901 | POST_IO |
22902 | RET(12) |
22903 | } |
22904 | res = 0; |
22905 | PRE_IO |
22906 | WRITE_BYTE_F(adr, res) |
22907 | POST_IO |
22908 | RET(12) |
22909 | } |
22910 | |
22911 | // STCC |
22912 | OPCODE(0x5FDF) |
22913 | { |
22914 | u32 adr, res; |
22915 | u32 src, dst; |
22916 | |
22917 | adr = AREG(7); |
22918 | AREG(7) += 2; |
22919 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22920 | { |
22921 | res = 0xFF; |
22922 | PRE_IO |
22923 | WRITE_BYTE_F(adr, res) |
22924 | POST_IO |
22925 | RET(12) |
22926 | } |
22927 | res = 0; |
22928 | PRE_IO |
22929 | WRITE_BYTE_F(adr, res) |
22930 | POST_IO |
22931 | RET(12) |
22932 | } |
22933 | |
22934 | // STCC |
22935 | OPCODE(0x50E7) |
22936 | { |
22937 | u32 adr, res; |
22938 | u32 src, dst; |
22939 | |
22940 | adr = AREG(7) - 2; |
22941 | AREG(7) = adr; |
22942 | res = 0xFF; |
22943 | PRE_IO |
22944 | WRITE_BYTE_F(adr, res) |
22945 | POST_IO |
22946 | RET(14) |
22947 | } |
22948 | |
22949 | // STCC |
22950 | OPCODE(0x51E7) |
22951 | { |
22952 | u32 adr, res; |
22953 | u32 src, dst; |
22954 | |
22955 | adr = AREG(7) - 2; |
22956 | AREG(7) = adr; |
22957 | res = 0; |
22958 | PRE_IO |
22959 | WRITE_BYTE_F(adr, res) |
22960 | POST_IO |
22961 | RET(14) |
22962 | } |
22963 | |
22964 | // STCC |
22965 | OPCODE(0x52E7) |
22966 | { |
22967 | u32 adr, res; |
22968 | u32 src, dst; |
22969 | |
22970 | adr = AREG(7) - 2; |
22971 | AREG(7) = adr; |
22972 | if (flag_NotZ && (!(flag_C & 0x100))) |
22973 | { |
22974 | res = 0xFF; |
22975 | PRE_IO |
22976 | WRITE_BYTE_F(adr, res) |
22977 | POST_IO |
22978 | RET(14) |
22979 | } |
22980 | res = 0; |
22981 | PRE_IO |
22982 | WRITE_BYTE_F(adr, res) |
22983 | POST_IO |
22984 | RET(14) |
22985 | } |
22986 | |
22987 | // STCC |
22988 | OPCODE(0x53E7) |
22989 | { |
22990 | u32 adr, res; |
22991 | u32 src, dst; |
22992 | |
22993 | adr = AREG(7) - 2; |
22994 | AREG(7) = adr; |
22995 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22996 | { |
22997 | res = 0xFF; |
22998 | PRE_IO |
22999 | WRITE_BYTE_F(adr, res) |
23000 | POST_IO |
23001 | RET(14) |
23002 | } |
23003 | res = 0; |
23004 | PRE_IO |
23005 | WRITE_BYTE_F(adr, res) |
23006 | POST_IO |
23007 | RET(14) |
23008 | } |
23009 | |
23010 | // STCC |
23011 | OPCODE(0x54E7) |
23012 | { |
23013 | u32 adr, res; |
23014 | u32 src, dst; |
23015 | |
23016 | adr = AREG(7) - 2; |
23017 | AREG(7) = adr; |
23018 | if (!(flag_C & 0x100)) |
23019 | { |
23020 | res = 0xFF; |
23021 | PRE_IO |
23022 | WRITE_BYTE_F(adr, res) |
23023 | POST_IO |
23024 | RET(14) |
23025 | } |
23026 | res = 0; |
23027 | PRE_IO |
23028 | WRITE_BYTE_F(adr, res) |
23029 | POST_IO |
23030 | RET(14) |
23031 | } |
23032 | |
23033 | // STCC |
23034 | OPCODE(0x55E7) |
23035 | { |
23036 | u32 adr, res; |
23037 | u32 src, dst; |
23038 | |
23039 | adr = AREG(7) - 2; |
23040 | AREG(7) = adr; |
23041 | if (flag_C & 0x100) |
23042 | { |
23043 | res = 0xFF; |
23044 | PRE_IO |
23045 | WRITE_BYTE_F(adr, res) |
23046 | POST_IO |
23047 | RET(14) |
23048 | } |
23049 | res = 0; |
23050 | PRE_IO |
23051 | WRITE_BYTE_F(adr, res) |
23052 | POST_IO |
23053 | RET(14) |
23054 | } |
23055 | |
23056 | // STCC |
23057 | OPCODE(0x56E7) |
23058 | { |
23059 | u32 adr, res; |
23060 | u32 src, dst; |
23061 | |
23062 | adr = AREG(7) - 2; |
23063 | AREG(7) = adr; |
23064 | if (flag_NotZ) |
23065 | { |
23066 | res = 0xFF; |
23067 | PRE_IO |
23068 | WRITE_BYTE_F(adr, res) |
23069 | POST_IO |
23070 | RET(14) |
23071 | } |
23072 | res = 0; |
23073 | PRE_IO |
23074 | WRITE_BYTE_F(adr, res) |
23075 | POST_IO |
23076 | RET(14) |
23077 | } |
23078 | |
23079 | // STCC |
23080 | OPCODE(0x57E7) |
23081 | { |
23082 | u32 adr, res; |
23083 | u32 src, dst; |
23084 | |
23085 | adr = AREG(7) - 2; |
23086 | AREG(7) = adr; |
23087 | if (!flag_NotZ) |
23088 | { |
23089 | res = 0xFF; |
23090 | PRE_IO |
23091 | WRITE_BYTE_F(adr, res) |
23092 | POST_IO |
23093 | RET(14) |
23094 | } |
23095 | res = 0; |
23096 | PRE_IO |
23097 | WRITE_BYTE_F(adr, res) |
23098 | POST_IO |
23099 | RET(14) |
23100 | } |
23101 | |
23102 | // STCC |
23103 | OPCODE(0x58E7) |
23104 | { |
23105 | u32 adr, res; |
23106 | u32 src, dst; |
23107 | |
23108 | adr = AREG(7) - 2; |
23109 | AREG(7) = adr; |
23110 | if (!(flag_V & 0x80)) |
23111 | { |
23112 | res = 0xFF; |
23113 | PRE_IO |
23114 | WRITE_BYTE_F(adr, res) |
23115 | POST_IO |
23116 | RET(14) |
23117 | } |
23118 | res = 0; |
23119 | PRE_IO |
23120 | WRITE_BYTE_F(adr, res) |
23121 | POST_IO |
23122 | RET(14) |
23123 | } |
23124 | |
23125 | // STCC |
23126 | OPCODE(0x59E7) |
23127 | { |
23128 | u32 adr, res; |
23129 | u32 src, dst; |
23130 | |
23131 | adr = AREG(7) - 2; |
23132 | AREG(7) = adr; |
23133 | if (flag_V & 0x80) |
23134 | { |
23135 | res = 0xFF; |
23136 | PRE_IO |
23137 | WRITE_BYTE_F(adr, res) |
23138 | POST_IO |
23139 | RET(14) |
23140 | } |
23141 | res = 0; |
23142 | PRE_IO |
23143 | WRITE_BYTE_F(adr, res) |
23144 | POST_IO |
23145 | RET(14) |
23146 | } |
23147 | |
23148 | // STCC |
23149 | OPCODE(0x5AE7) |
23150 | { |
23151 | u32 adr, res; |
23152 | u32 src, dst; |
23153 | |
23154 | adr = AREG(7) - 2; |
23155 | AREG(7) = adr; |
23156 | if (!(flag_N & 0x80)) |
23157 | { |
23158 | res = 0xFF; |
23159 | PRE_IO |
23160 | WRITE_BYTE_F(adr, res) |
23161 | POST_IO |
23162 | RET(14) |
23163 | } |
23164 | res = 0; |
23165 | PRE_IO |
23166 | WRITE_BYTE_F(adr, res) |
23167 | POST_IO |
23168 | RET(14) |
23169 | } |
23170 | |
23171 | // STCC |
23172 | OPCODE(0x5BE7) |
23173 | { |
23174 | u32 adr, res; |
23175 | u32 src, dst; |
23176 | |
23177 | adr = AREG(7) - 2; |
23178 | AREG(7) = adr; |
23179 | if (flag_N & 0x80) |
23180 | { |
23181 | res = 0xFF; |
23182 | PRE_IO |
23183 | WRITE_BYTE_F(adr, res) |
23184 | POST_IO |
23185 | RET(14) |
23186 | } |
23187 | res = 0; |
23188 | PRE_IO |
23189 | WRITE_BYTE_F(adr, res) |
23190 | POST_IO |
23191 | RET(14) |
23192 | } |
23193 | |
23194 | // STCC |
23195 | OPCODE(0x5CE7) |
23196 | { |
23197 | u32 adr, res; |
23198 | u32 src, dst; |
23199 | |
23200 | adr = AREG(7) - 2; |
23201 | AREG(7) = adr; |
23202 | if (!((flag_N ^ flag_V) & 0x80)) |
23203 | { |
23204 | res = 0xFF; |
23205 | PRE_IO |
23206 | WRITE_BYTE_F(adr, res) |
23207 | POST_IO |
23208 | RET(14) |
23209 | } |
23210 | res = 0; |
23211 | PRE_IO |
23212 | WRITE_BYTE_F(adr, res) |
23213 | POST_IO |
23214 | RET(14) |
23215 | } |
23216 | |
23217 | // STCC |
23218 | OPCODE(0x5DE7) |
23219 | { |
23220 | u32 adr, res; |
23221 | u32 src, dst; |
23222 | |
23223 | adr = AREG(7) - 2; |
23224 | AREG(7) = adr; |
23225 | if ((flag_N ^ flag_V) & 0x80) |
23226 | { |
23227 | res = 0xFF; |
23228 | PRE_IO |
23229 | WRITE_BYTE_F(adr, res) |
23230 | POST_IO |
23231 | RET(14) |
23232 | } |
23233 | res = 0; |
23234 | PRE_IO |
23235 | WRITE_BYTE_F(adr, res) |
23236 | POST_IO |
23237 | RET(14) |
23238 | } |
23239 | |
23240 | // STCC |
23241 | OPCODE(0x5EE7) |
23242 | { |
23243 | u32 adr, res; |
23244 | u32 src, dst; |
23245 | |
23246 | adr = AREG(7) - 2; |
23247 | AREG(7) = adr; |
23248 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23249 | { |
23250 | res = 0xFF; |
23251 | PRE_IO |
23252 | WRITE_BYTE_F(adr, res) |
23253 | POST_IO |
23254 | RET(14) |
23255 | } |
23256 | res = 0; |
23257 | PRE_IO |
23258 | WRITE_BYTE_F(adr, res) |
23259 | POST_IO |
23260 | RET(14) |
23261 | } |
23262 | |
23263 | // STCC |
23264 | OPCODE(0x5FE7) |
23265 | { |
23266 | u32 adr, res; |
23267 | u32 src, dst; |
23268 | |
23269 | adr = AREG(7) - 2; |
23270 | AREG(7) = adr; |
23271 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23272 | { |
23273 | res = 0xFF; |
23274 | PRE_IO |
23275 | WRITE_BYTE_F(adr, res) |
23276 | POST_IO |
23277 | RET(14) |
23278 | } |
23279 | res = 0; |
23280 | PRE_IO |
23281 | WRITE_BYTE_F(adr, res) |
23282 | POST_IO |
23283 | RET(14) |
23284 | } |
23285 | |
23286 | // DBCC |
23287 | OPCODE(0x50C8) |
23288 | { |
23289 | u32 adr, res; |
23290 | u32 src, dst; |
23291 | |
23292 | PC++; |
23293 | RET(12) |
23294 | } |
23295 | |
23296 | // DBCC |
23297 | OPCODE(0x51C8) |
23298 | { |
23299 | u32 adr, res; |
23300 | u32 src, dst; |
23301 | |
23302 | res = DREGu16((Opcode >> 0) & 7); |
23303 | res--; |
23304 | DREGu16((Opcode >> 0) & 7) = res; |
23305 | if ((s32)res != -1) |
23306 | { |
23307 | u32 newPC; |
23308 | |
23309 | newPC = (u32)(PC) - BasePC; |
23310 | newPC += GET_SWORD; |
23311 | SET_PC(newPC); |
23312 | CHECK_BRANCH_EXCEPTION(newPC) |
23313 | RET(10) |
23314 | } |
23315 | PC++; |
23316 | RET(14) |
23317 | } |
23318 | |
23319 | // DBCC |
23320 | OPCODE(0x52C8) |
23321 | { |
23322 | u32 adr, res; |
23323 | u32 src, dst; |
23324 | |
23325 | if ((!flag_NotZ) || (flag_C & 0x100)) |
23326 | { |
23327 | res = DREGu16((Opcode >> 0) & 7); |
23328 | res--; |
23329 | DREGu16((Opcode >> 0) & 7) = res; |
23330 | if ((s32)res != -1) |
23331 | { |
23332 | u32 newPC; |
23333 | |
23334 | newPC = (u32)(PC) - BasePC; |
23335 | newPC += GET_SWORD; |
23336 | SET_PC(newPC); |
23337 | CHECK_BRANCH_EXCEPTION(newPC) |
23338 | RET(10) |
23339 | } |
23340 | } |
23341 | else |
23342 | { |
23343 | PC++; |
23344 | RET(12) |
23345 | } |
23346 | PC++; |
23347 | RET(14) |
23348 | } |
23349 | |
23350 | // DBCC |
23351 | OPCODE(0x53C8) |
23352 | { |
23353 | u32 adr, res; |
23354 | u32 src, dst; |
23355 | |
23356 | if (flag_NotZ && (!(flag_C & 0x100))) |
23357 | { |
23358 | res = DREGu16((Opcode >> 0) & 7); |
23359 | res--; |
23360 | DREGu16((Opcode >> 0) & 7) = res; |
23361 | if ((s32)res != -1) |
23362 | { |
23363 | u32 newPC; |
23364 | |
23365 | newPC = (u32)(PC) - BasePC; |
23366 | newPC += GET_SWORD; |
23367 | SET_PC(newPC); |
23368 | CHECK_BRANCH_EXCEPTION(newPC) |
23369 | RET(10) |
23370 | } |
23371 | } |
23372 | else |
23373 | { |
23374 | PC++; |
23375 | RET(12) |
23376 | } |
23377 | PC++; |
23378 | RET(14) |
23379 | } |
23380 | |
23381 | // DBCC |
23382 | OPCODE(0x54C8) |
23383 | { |
23384 | u32 adr, res; |
23385 | u32 src, dst; |
23386 | |
23387 | if (flag_C & 0x100) |
23388 | { |
23389 | res = DREGu16((Opcode >> 0) & 7); |
23390 | res--; |
23391 | DREGu16((Opcode >> 0) & 7) = res; |
23392 | if ((s32)res != -1) |
23393 | { |
23394 | u32 newPC; |
23395 | |
23396 | newPC = (u32)(PC) - BasePC; |
23397 | newPC += GET_SWORD; |
23398 | SET_PC(newPC); |
23399 | CHECK_BRANCH_EXCEPTION(newPC) |
23400 | RET(10) |
23401 | } |
23402 | } |
23403 | else |
23404 | { |
23405 | PC++; |
23406 | RET(12) |
23407 | } |
23408 | PC++; |
23409 | RET(14) |
23410 | } |
23411 | |
23412 | // DBCC |
23413 | OPCODE(0x55C8) |
23414 | { |
23415 | u32 adr, res; |
23416 | u32 src, dst; |
23417 | |
23418 | if (!(flag_C & 0x100)) |
23419 | { |
23420 | res = DREGu16((Opcode >> 0) & 7); |
23421 | res--; |
23422 | DREGu16((Opcode >> 0) & 7) = res; |
23423 | if ((s32)res != -1) |
23424 | { |
23425 | u32 newPC; |
23426 | |
23427 | newPC = (u32)(PC) - BasePC; |
23428 | newPC += GET_SWORD; |
23429 | SET_PC(newPC); |
23430 | CHECK_BRANCH_EXCEPTION(newPC) |
23431 | RET(10) |
23432 | } |
23433 | } |
23434 | else |
23435 | { |
23436 | PC++; |
23437 | RET(12) |
23438 | } |
23439 | PC++; |
23440 | RET(14) |
23441 | } |
23442 | |
23443 | // DBCC |
23444 | OPCODE(0x56C8) |
23445 | { |
23446 | u32 adr, res; |
23447 | u32 src, dst; |
23448 | |
23449 | if (!flag_NotZ) |
23450 | { |
23451 | res = DREGu16((Opcode >> 0) & 7); |
23452 | res--; |
23453 | DREGu16((Opcode >> 0) & 7) = res; |
23454 | if ((s32)res != -1) |
23455 | { |
23456 | u32 newPC; |
23457 | |
23458 | newPC = (u32)(PC) - BasePC; |
23459 | newPC += GET_SWORD; |
23460 | SET_PC(newPC); |
23461 | CHECK_BRANCH_EXCEPTION(newPC) |
23462 | RET(10) |
23463 | } |
23464 | } |
23465 | else |
23466 | { |
23467 | PC++; |
23468 | RET(12) |
23469 | } |
23470 | PC++; |
23471 | RET(14) |
23472 | } |
23473 | |
23474 | // DBCC |
23475 | OPCODE(0x57C8) |
23476 | { |
23477 | u32 adr, res; |
23478 | u32 src, dst; |
23479 | |
23480 | if (flag_NotZ) |
23481 | { |
23482 | res = DREGu16((Opcode >> 0) & 7); |
23483 | res--; |
23484 | DREGu16((Opcode >> 0) & 7) = res; |
23485 | if ((s32)res != -1) |
23486 | { |
23487 | u32 newPC; |
23488 | |
23489 | newPC = (u32)(PC) - BasePC; |
23490 | newPC += GET_SWORD; |
23491 | SET_PC(newPC); |
23492 | CHECK_BRANCH_EXCEPTION(newPC) |
23493 | RET(10) |
23494 | } |
23495 | } |
23496 | else |
23497 | { |
23498 | PC++; |
23499 | RET(12) |
23500 | } |
23501 | PC++; |
23502 | RET(14) |
23503 | } |
23504 | |
23505 | // DBCC |
23506 | OPCODE(0x58C8) |
23507 | { |
23508 | u32 adr, res; |
23509 | u32 src, dst; |
23510 | |
23511 | if (flag_V & 0x80) |
23512 | { |
23513 | res = DREGu16((Opcode >> 0) & 7); |
23514 | res--; |
23515 | DREGu16((Opcode >> 0) & 7) = res; |
23516 | if ((s32)res != -1) |
23517 | { |
23518 | u32 newPC; |
23519 | |
23520 | newPC = (u32)(PC) - BasePC; |
23521 | newPC += GET_SWORD; |
23522 | SET_PC(newPC); |
23523 | CHECK_BRANCH_EXCEPTION(newPC) |
23524 | RET(10) |
23525 | } |
23526 | } |
23527 | else |
23528 | { |
23529 | PC++; |
23530 | RET(12) |
23531 | } |
23532 | PC++; |
23533 | RET(14) |
23534 | } |
23535 | |
23536 | // DBCC |
23537 | OPCODE(0x59C8) |
23538 | { |
23539 | u32 adr, res; |
23540 | u32 src, dst; |
23541 | |
23542 | if (!(flag_V & 0x80)) |
23543 | { |
23544 | res = DREGu16((Opcode >> 0) & 7); |
23545 | res--; |
23546 | DREGu16((Opcode >> 0) & 7) = res; |
23547 | if ((s32)res != -1) |
23548 | { |
23549 | u32 newPC; |
23550 | |
23551 | newPC = (u32)(PC) - BasePC; |
23552 | newPC += GET_SWORD; |
23553 | SET_PC(newPC); |
23554 | CHECK_BRANCH_EXCEPTION(newPC) |
23555 | RET(10) |
23556 | } |
23557 | } |
23558 | else |
23559 | { |
23560 | PC++; |
23561 | RET(12) |
23562 | } |
23563 | PC++; |
23564 | RET(14) |
23565 | } |
23566 | |
23567 | // DBCC |
23568 | OPCODE(0x5AC8) |
23569 | { |
23570 | u32 adr, res; |
23571 | u32 src, dst; |
23572 | |
23573 | if (flag_N & 0x80) |
23574 | { |
23575 | res = DREGu16((Opcode >> 0) & 7); |
23576 | res--; |
23577 | DREGu16((Opcode >> 0) & 7) = res; |
23578 | if ((s32)res != -1) |
23579 | { |
23580 | u32 newPC; |
23581 | |
23582 | newPC = (u32)(PC) - BasePC; |
23583 | newPC += GET_SWORD; |
23584 | SET_PC(newPC); |
23585 | CHECK_BRANCH_EXCEPTION(newPC) |
23586 | RET(10) |
23587 | } |
23588 | } |
23589 | else |
23590 | { |
23591 | PC++; |
23592 | RET(12) |
23593 | } |
23594 | PC++; |
23595 | RET(14) |
23596 | } |
23597 | |
23598 | // DBCC |
23599 | OPCODE(0x5BC8) |
23600 | { |
23601 | u32 adr, res; |
23602 | u32 src, dst; |
23603 | |
23604 | if (!(flag_N & 0x80)) |
23605 | { |
23606 | res = DREGu16((Opcode >> 0) & 7); |
23607 | res--; |
23608 | DREGu16((Opcode >> 0) & 7) = res; |
23609 | if ((s32)res != -1) |
23610 | { |
23611 | u32 newPC; |
23612 | |
23613 | newPC = (u32)(PC) - BasePC; |
23614 | newPC += GET_SWORD; |
23615 | SET_PC(newPC); |
23616 | CHECK_BRANCH_EXCEPTION(newPC) |
23617 | RET(10) |
23618 | } |
23619 | } |
23620 | else |
23621 | { |
23622 | PC++; |
23623 | RET(12) |
23624 | } |
23625 | PC++; |
23626 | RET(14) |
23627 | } |
23628 | |
23629 | // DBCC |
23630 | OPCODE(0x5CC8) |
23631 | { |
23632 | u32 adr, res; |
23633 | u32 src, dst; |
23634 | |
23635 | if ((flag_N ^ flag_V) & 0x80) |
23636 | { |
23637 | res = DREGu16((Opcode >> 0) & 7); |
23638 | res--; |
23639 | DREGu16((Opcode >> 0) & 7) = res; |
23640 | if ((s32)res != -1) |
23641 | { |
23642 | u32 newPC; |
23643 | |
23644 | newPC = (u32)(PC) - BasePC; |
23645 | newPC += GET_SWORD; |
23646 | SET_PC(newPC); |
23647 | CHECK_BRANCH_EXCEPTION(newPC) |
23648 | RET(10) |
23649 | } |
23650 | } |
23651 | else |
23652 | { |
23653 | PC++; |
23654 | RET(12) |
23655 | } |
23656 | PC++; |
23657 | RET(14) |
23658 | } |
23659 | |
23660 | // DBCC |
23661 | OPCODE(0x5DC8) |
23662 | { |
23663 | u32 adr, res; |
23664 | u32 src, dst; |
23665 | |
23666 | if (!((flag_N ^ flag_V) & 0x80)) |
23667 | { |
23668 | res = DREGu16((Opcode >> 0) & 7); |
23669 | res--; |
23670 | DREGu16((Opcode >> 0) & 7) = res; |
23671 | if ((s32)res != -1) |
23672 | { |
23673 | u32 newPC; |
23674 | |
23675 | newPC = (u32)(PC) - BasePC; |
23676 | newPC += GET_SWORD; |
23677 | SET_PC(newPC); |
23678 | CHECK_BRANCH_EXCEPTION(newPC) |
23679 | RET(10) |
23680 | } |
23681 | } |
23682 | else |
23683 | { |
23684 | PC++; |
23685 | RET(12) |
23686 | } |
23687 | PC++; |
23688 | RET(14) |
23689 | } |
23690 | |
23691 | // DBCC |
23692 | OPCODE(0x5EC8) |
23693 | { |
23694 | u32 adr, res; |
23695 | u32 src, dst; |
23696 | |
23697 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23698 | { |
23699 | res = DREGu16((Opcode >> 0) & 7); |
23700 | res--; |
23701 | DREGu16((Opcode >> 0) & 7) = res; |
23702 | if ((s32)res != -1) |
23703 | { |
23704 | u32 newPC; |
23705 | |
23706 | newPC = (u32)(PC) - BasePC; |
23707 | newPC += GET_SWORD; |
23708 | SET_PC(newPC); |
23709 | CHECK_BRANCH_EXCEPTION(newPC) |
23710 | RET(10) |
23711 | } |
23712 | } |
23713 | else |
23714 | { |
23715 | PC++; |
23716 | RET(12) |
23717 | } |
23718 | PC++; |
23719 | RET(14) |
23720 | } |
23721 | |
23722 | // DBCC |
23723 | OPCODE(0x5FC8) |
23724 | { |
23725 | u32 adr, res; |
23726 | u32 src, dst; |
23727 | |
23728 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23729 | { |
23730 | res = DREGu16((Opcode >> 0) & 7); |
23731 | res--; |
23732 | DREGu16((Opcode >> 0) & 7) = res; |
23733 | if ((s32)res != -1) |
23734 | { |
23735 | u32 newPC; |
23736 | |
23737 | newPC = (u32)(PC) - BasePC; |
23738 | newPC += GET_SWORD; |
23739 | SET_PC(newPC); |
23740 | CHECK_BRANCH_EXCEPTION(newPC) |
23741 | RET(10) |
23742 | } |
23743 | } |
23744 | else |
23745 | { |
23746 | PC++; |
23747 | RET(12) |
23748 | } |
23749 | PC++; |
23750 | RET(14) |
23751 | } |
23752 | |
23753 | // ADDQ |
23754 | OPCODE(0x5000) |
23755 | { |
23756 | u32 adr, res; |
23757 | u32 src, dst; |
23758 | |
23759 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23760 | dst = DREGu8((Opcode >> 0) & 7); |
23761 | res = dst + src; |
23762 | flag_N = flag_X = flag_C = res; |
23763 | flag_V = (src ^ res) & (dst ^ res); |
23764 | flag_NotZ = res & 0xFF; |
23765 | DREGu8((Opcode >> 0) & 7) = res; |
23766 | RET(4) |
23767 | } |
23768 | |
23769 | // ADDQ |
23770 | OPCODE(0x5010) |
23771 | { |
23772 | u32 adr, res; |
23773 | u32 src, dst; |
23774 | |
23775 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23776 | adr = AREG((Opcode >> 0) & 7); |
23777 | PRE_IO |
23778 | READ_BYTE_F(adr, dst) |
23779 | res = dst + src; |
23780 | flag_N = flag_X = flag_C = res; |
23781 | flag_V = (src ^ res) & (dst ^ res); |
23782 | flag_NotZ = res & 0xFF; |
23783 | WRITE_BYTE_F(adr, res) |
23784 | POST_IO |
23785 | RET(12) |
23786 | } |
23787 | |
23788 | // ADDQ |
23789 | OPCODE(0x5018) |
23790 | { |
23791 | u32 adr, res; |
23792 | u32 src, dst; |
23793 | |
23794 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23795 | adr = AREG((Opcode >> 0) & 7); |
23796 | AREG((Opcode >> 0) & 7) += 1; |
23797 | PRE_IO |
23798 | READ_BYTE_F(adr, dst) |
23799 | res = dst + src; |
23800 | flag_N = flag_X = flag_C = res; |
23801 | flag_V = (src ^ res) & (dst ^ res); |
23802 | flag_NotZ = res & 0xFF; |
23803 | WRITE_BYTE_F(adr, res) |
23804 | POST_IO |
23805 | RET(12) |
23806 | } |
23807 | |
23808 | // ADDQ |
23809 | OPCODE(0x5020) |
23810 | { |
23811 | u32 adr, res; |
23812 | u32 src, dst; |
23813 | |
23814 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23815 | adr = AREG((Opcode >> 0) & 7) - 1; |
23816 | AREG((Opcode >> 0) & 7) = adr; |
23817 | PRE_IO |
23818 | READ_BYTE_F(adr, dst) |
23819 | res = dst + src; |
23820 | flag_N = flag_X = flag_C = res; |
23821 | flag_V = (src ^ res) & (dst ^ res); |
23822 | flag_NotZ = res & 0xFF; |
23823 | WRITE_BYTE_F(adr, res) |
23824 | POST_IO |
23825 | RET(14) |
23826 | } |
23827 | |
23828 | // ADDQ |
23829 | OPCODE(0x5028) |
23830 | { |
23831 | u32 adr, res; |
23832 | u32 src, dst; |
23833 | |
23834 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23835 | FETCH_SWORD(adr); |
23836 | adr += AREG((Opcode >> 0) & 7); |
23837 | PRE_IO |
23838 | READ_BYTE_F(adr, dst) |
23839 | res = dst + src; |
23840 | flag_N = flag_X = flag_C = res; |
23841 | flag_V = (src ^ res) & (dst ^ res); |
23842 | flag_NotZ = res & 0xFF; |
23843 | WRITE_BYTE_F(adr, res) |
23844 | POST_IO |
23845 | RET(16) |
23846 | } |
23847 | |
23848 | // ADDQ |
23849 | OPCODE(0x5030) |
23850 | { |
23851 | u32 adr, res; |
23852 | u32 src, dst; |
23853 | |
23854 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23855 | adr = AREG((Opcode >> 0) & 7); |
23856 | DECODE_EXT_WORD |
23857 | PRE_IO |
23858 | READ_BYTE_F(adr, dst) |
23859 | res = dst + src; |
23860 | flag_N = flag_X = flag_C = res; |
23861 | flag_V = (src ^ res) & (dst ^ res); |
23862 | flag_NotZ = res & 0xFF; |
23863 | WRITE_BYTE_F(adr, res) |
23864 | POST_IO |
23865 | RET(18) |
23866 | } |
23867 | |
23868 | // ADDQ |
23869 | OPCODE(0x5038) |
23870 | { |
23871 | u32 adr, res; |
23872 | u32 src, dst; |
23873 | |
23874 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23875 | FETCH_SWORD(adr); |
23876 | PRE_IO |
23877 | READ_BYTE_F(adr, dst) |
23878 | res = dst + src; |
23879 | flag_N = flag_X = flag_C = res; |
23880 | flag_V = (src ^ res) & (dst ^ res); |
23881 | flag_NotZ = res & 0xFF; |
23882 | WRITE_BYTE_F(adr, res) |
23883 | POST_IO |
23884 | RET(16) |
23885 | } |
23886 | |
23887 | // ADDQ |
23888 | OPCODE(0x5039) |
23889 | { |
23890 | u32 adr, res; |
23891 | u32 src, dst; |
23892 | |
23893 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23894 | FETCH_LONG(adr); |
23895 | PRE_IO |
23896 | READ_BYTE_F(adr, dst) |
23897 | res = dst + src; |
23898 | flag_N = flag_X = flag_C = res; |
23899 | flag_V = (src ^ res) & (dst ^ res); |
23900 | flag_NotZ = res & 0xFF; |
23901 | WRITE_BYTE_F(adr, res) |
23902 | POST_IO |
23903 | RET(20) |
23904 | } |
23905 | |
23906 | // ADDQ |
23907 | OPCODE(0x501F) |
23908 | { |
23909 | u32 adr, res; |
23910 | u32 src, dst; |
23911 | |
23912 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23913 | adr = AREG(7); |
23914 | AREG(7) += 2; |
23915 | PRE_IO |
23916 | READ_BYTE_F(adr, dst) |
23917 | res = dst + src; |
23918 | flag_N = flag_X = flag_C = res; |
23919 | flag_V = (src ^ res) & (dst ^ res); |
23920 | flag_NotZ = res & 0xFF; |
23921 | WRITE_BYTE_F(adr, res) |
23922 | POST_IO |
23923 | RET(12) |
23924 | } |
23925 | |
23926 | // ADDQ |
23927 | OPCODE(0x5027) |
23928 | { |
23929 | u32 adr, res; |
23930 | u32 src, dst; |
23931 | |
23932 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23933 | adr = AREG(7) - 2; |
23934 | AREG(7) = adr; |
23935 | PRE_IO |
23936 | READ_BYTE_F(adr, dst) |
23937 | res = dst + src; |
23938 | flag_N = flag_X = flag_C = res; |
23939 | flag_V = (src ^ res) & (dst ^ res); |
23940 | flag_NotZ = res & 0xFF; |
23941 | WRITE_BYTE_F(adr, res) |
23942 | POST_IO |
23943 | RET(14) |
23944 | } |
23945 | |
23946 | // ADDQ |
23947 | OPCODE(0x5040) |
23948 | { |
23949 | u32 adr, res; |
23950 | u32 src, dst; |
23951 | |
23952 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23953 | dst = DREGu16((Opcode >> 0) & 7); |
23954 | res = dst + src; |
23955 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23956 | flag_N = flag_X = flag_C = res >> 8; |
23957 | flag_NotZ = res & 0xFFFF; |
23958 | DREGu16((Opcode >> 0) & 7) = res; |
23959 | RET(4) |
23960 | } |
23961 | |
23962 | // ADDQ |
23963 | OPCODE(0x5048) |
23964 | { |
23965 | u32 adr, res; |
23966 | u32 src, dst; |
23967 | |
23968 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23969 | dst = AREGu32((Opcode >> 0) & 7); |
23970 | res = dst + src; |
23971 | AREG((Opcode >> 0) & 7) = res; |
03e4f2a3 |
23972 | #ifdef USE_CYCLONE_TIMING |
70357ce5 |
23973 | RET(4) |
23974 | #else |
23975 | RET(8) |
23976 | #endif |
23977 | } |
23978 | |
23979 | // ADDQ |
23980 | OPCODE(0x5050) |
23981 | { |
23982 | u32 adr, res; |
23983 | u32 src, dst; |
23984 | |
23985 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23986 | adr = AREG((Opcode >> 0) & 7); |
23987 | PRE_IO |
23988 | READ_WORD_F(adr, dst) |
23989 | res = dst + src; |
23990 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23991 | flag_N = flag_X = flag_C = res >> 8; |
23992 | flag_NotZ = res & 0xFFFF; |
23993 | WRITE_WORD_F(adr, res) |
23994 | POST_IO |
23995 | RET(12) |
23996 | } |
23997 | |
23998 | // ADDQ |
23999 | OPCODE(0x5058) |
24000 | { |
24001 | u32 adr, res; |
24002 | u32 src, dst; |
24003 | |
24004 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24005 | adr = AREG((Opcode >> 0) & 7); |
24006 | AREG((Opcode >> 0) & 7) += 2; |
24007 | PRE_IO |
24008 | READ_WORD_F(adr, dst) |
24009 | res = dst + src; |
24010 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24011 | flag_N = flag_X = flag_C = res >> 8; |
24012 | flag_NotZ = res & 0xFFFF; |
24013 | WRITE_WORD_F(adr, res) |
24014 | POST_IO |
24015 | RET(12) |
24016 | } |
24017 | |
24018 | // ADDQ |
24019 | OPCODE(0x5060) |
24020 | { |
24021 | u32 adr, res; |
24022 | u32 src, dst; |
24023 | |
24024 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24025 | adr = AREG((Opcode >> 0) & 7) - 2; |
24026 | AREG((Opcode >> 0) & 7) = adr; |
24027 | PRE_IO |
24028 | READ_WORD_F(adr, dst) |
24029 | res = dst + src; |
24030 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24031 | flag_N = flag_X = flag_C = res >> 8; |
24032 | flag_NotZ = res & 0xFFFF; |
24033 | WRITE_WORD_F(adr, res) |
24034 | POST_IO |
24035 | RET(14) |
24036 | } |
24037 | |
24038 | // ADDQ |
24039 | OPCODE(0x5068) |
24040 | { |
24041 | u32 adr, res; |
24042 | u32 src, dst; |
24043 | |
24044 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24045 | FETCH_SWORD(adr); |
24046 | adr += AREG((Opcode >> 0) & 7); |
24047 | PRE_IO |
24048 | READ_WORD_F(adr, dst) |
24049 | res = dst + src; |
24050 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24051 | flag_N = flag_X = flag_C = res >> 8; |
24052 | flag_NotZ = res & 0xFFFF; |
24053 | WRITE_WORD_F(adr, res) |
24054 | POST_IO |
24055 | RET(16) |
24056 | } |
24057 | |
24058 | // ADDQ |
24059 | OPCODE(0x5070) |
24060 | { |
24061 | u32 adr, res; |
24062 | u32 src, dst; |
24063 | |
24064 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24065 | adr = AREG((Opcode >> 0) & 7); |
24066 | DECODE_EXT_WORD |
24067 | PRE_IO |
24068 | READ_WORD_F(adr, dst) |
24069 | res = dst + src; |
24070 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24071 | flag_N = flag_X = flag_C = res >> 8; |
24072 | flag_NotZ = res & 0xFFFF; |
24073 | WRITE_WORD_F(adr, res) |
24074 | POST_IO |
24075 | RET(18) |
24076 | } |
24077 | |
24078 | // ADDQ |
24079 | OPCODE(0x5078) |
24080 | { |
24081 | u32 adr, res; |
24082 | u32 src, dst; |
24083 | |
24084 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24085 | FETCH_SWORD(adr); |
24086 | PRE_IO |
24087 | READ_WORD_F(adr, dst) |
24088 | res = dst + src; |
24089 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24090 | flag_N = flag_X = flag_C = res >> 8; |
24091 | flag_NotZ = res & 0xFFFF; |
24092 | WRITE_WORD_F(adr, res) |
24093 | POST_IO |
24094 | RET(16) |
24095 | } |
24096 | |
24097 | // ADDQ |
24098 | OPCODE(0x5079) |
24099 | { |
24100 | u32 adr, res; |
24101 | u32 src, dst; |
24102 | |
24103 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24104 | FETCH_LONG(adr); |
24105 | PRE_IO |
24106 | READ_WORD_F(adr, dst) |
24107 | res = dst + src; |
24108 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24109 | flag_N = flag_X = flag_C = res >> 8; |
24110 | flag_NotZ = res & 0xFFFF; |
24111 | WRITE_WORD_F(adr, res) |
24112 | POST_IO |
24113 | RET(20) |
24114 | } |
24115 | |
24116 | // ADDQ |
24117 | OPCODE(0x505F) |
24118 | { |
24119 | u32 adr, res; |
24120 | u32 src, dst; |
24121 | |
24122 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24123 | adr = AREG(7); |
24124 | AREG(7) += 2; |
24125 | PRE_IO |
24126 | READ_WORD_F(adr, dst) |
24127 | res = dst + src; |
24128 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24129 | flag_N = flag_X = flag_C = res >> 8; |
24130 | flag_NotZ = res & 0xFFFF; |
24131 | WRITE_WORD_F(adr, res) |
24132 | POST_IO |
24133 | RET(12) |
24134 | } |
24135 | |
24136 | // ADDQ |
24137 | OPCODE(0x5067) |
24138 | { |
24139 | u32 adr, res; |
24140 | u32 src, dst; |
24141 | |
24142 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24143 | adr = AREG(7) - 2; |
24144 | AREG(7) = adr; |
24145 | PRE_IO |
24146 | READ_WORD_F(adr, dst) |
24147 | res = dst + src; |
24148 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24149 | flag_N = flag_X = flag_C = res >> 8; |
24150 | flag_NotZ = res & 0xFFFF; |
24151 | WRITE_WORD_F(adr, res) |
24152 | POST_IO |
24153 | RET(14) |
24154 | } |
24155 | |
24156 | // ADDQ |
24157 | OPCODE(0x5080) |
24158 | { |
24159 | u32 adr, res; |
24160 | u32 src, dst; |
24161 | |
24162 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24163 | dst = DREGu32((Opcode >> 0) & 7); |
24164 | res = dst + src; |
24165 | flag_NotZ = res; |
24166 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24167 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24168 | flag_N = res >> 24; |
24169 | DREGu32((Opcode >> 0) & 7) = res; |
24170 | RET(8) |
24171 | } |
24172 | |
24173 | // ADDQ |
24174 | OPCODE(0x5088) |
24175 | { |
24176 | u32 adr, res; |
24177 | u32 src, dst; |
24178 | |
24179 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24180 | dst = AREGu32((Opcode >> 0) & 7); |
24181 | res = dst + src; |
24182 | AREG((Opcode >> 0) & 7) = res; |
24183 | RET(8) |
24184 | } |
24185 | |
24186 | // ADDQ |
24187 | OPCODE(0x5090) |
24188 | { |
24189 | u32 adr, res; |
24190 | u32 src, dst; |
24191 | |
24192 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24193 | adr = AREG((Opcode >> 0) & 7); |
24194 | PRE_IO |
24195 | READ_LONG_F(adr, dst) |
24196 | res = dst + src; |
24197 | flag_NotZ = res; |
24198 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24199 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24200 | flag_N = res >> 24; |
24201 | WRITE_LONG_F(adr, res) |
24202 | POST_IO |
24203 | RET(20) |
24204 | } |
24205 | |
24206 | // ADDQ |
24207 | OPCODE(0x5098) |
24208 | { |
24209 | u32 adr, res; |
24210 | u32 src, dst; |
24211 | |
24212 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24213 | adr = AREG((Opcode >> 0) & 7); |
24214 | AREG((Opcode >> 0) & 7) += 4; |
24215 | PRE_IO |
24216 | READ_LONG_F(adr, dst) |
24217 | res = dst + src; |
24218 | flag_NotZ = res; |
24219 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24220 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24221 | flag_N = res >> 24; |
24222 | WRITE_LONG_F(adr, res) |
24223 | POST_IO |
24224 | RET(20) |
24225 | } |
24226 | |
24227 | // ADDQ |
24228 | OPCODE(0x50A0) |
24229 | { |
24230 | u32 adr, res; |
24231 | u32 src, dst; |
24232 | |
24233 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24234 | adr = AREG((Opcode >> 0) & 7) - 4; |
24235 | AREG((Opcode >> 0) & 7) = adr; |
24236 | PRE_IO |
24237 | READ_LONG_F(adr, dst) |
24238 | res = dst + src; |
24239 | flag_NotZ = res; |
24240 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24241 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24242 | flag_N = res >> 24; |
24243 | WRITE_LONG_F(adr, res) |
24244 | POST_IO |
24245 | RET(22) |
24246 | } |
24247 | |
24248 | // ADDQ |
24249 | OPCODE(0x50A8) |
24250 | { |
24251 | u32 adr, res; |
24252 | u32 src, dst; |
24253 | |
24254 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24255 | FETCH_SWORD(adr); |
24256 | adr += AREG((Opcode >> 0) & 7); |
24257 | PRE_IO |
24258 | READ_LONG_F(adr, dst) |
24259 | res = dst + src; |
24260 | flag_NotZ = res; |
24261 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24262 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24263 | flag_N = res >> 24; |
24264 | WRITE_LONG_F(adr, res) |
24265 | POST_IO |
24266 | RET(24) |
24267 | } |
24268 | |
24269 | // ADDQ |
24270 | OPCODE(0x50B0) |
24271 | { |
24272 | u32 adr, res; |
24273 | u32 src, dst; |
24274 | |
24275 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24276 | adr = AREG((Opcode >> 0) & 7); |
24277 | DECODE_EXT_WORD |
24278 | PRE_IO |
24279 | READ_LONG_F(adr, dst) |
24280 | res = dst + src; |
24281 | flag_NotZ = res; |
24282 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24283 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24284 | flag_N = res >> 24; |
24285 | WRITE_LONG_F(adr, res) |
24286 | POST_IO |
24287 | RET(26) |
24288 | } |
24289 | |
24290 | // ADDQ |
24291 | OPCODE(0x50B8) |
24292 | { |
24293 | u32 adr, res; |
24294 | u32 src, dst; |
24295 | |
24296 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24297 | FETCH_SWORD(adr); |
24298 | PRE_IO |
24299 | READ_LONG_F(adr, dst) |
24300 | res = dst + src; |
24301 | flag_NotZ = res; |
24302 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24303 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24304 | flag_N = res >> 24; |
24305 | WRITE_LONG_F(adr, res) |
24306 | POST_IO |
24307 | RET(24) |
24308 | } |
24309 | |
24310 | // ADDQ |
24311 | OPCODE(0x50B9) |
24312 | { |
24313 | u32 adr, res; |
24314 | u32 src, dst; |
24315 | |
24316 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24317 | FETCH_LONG(adr); |
24318 | PRE_IO |
24319 | READ_LONG_F(adr, dst) |
24320 | res = dst + src; |
24321 | flag_NotZ = res; |
24322 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24323 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24324 | flag_N = res >> 24; |
24325 | WRITE_LONG_F(adr, res) |
24326 | POST_IO |
24327 | RET(28) |
24328 | } |
24329 | |
24330 | // ADDQ |
24331 | OPCODE(0x509F) |
24332 | { |
24333 | u32 adr, res; |
24334 | u32 src, dst; |
24335 | |
24336 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24337 | adr = AREG(7); |
24338 | AREG(7) += 4; |
24339 | PRE_IO |
24340 | READ_LONG_F(adr, dst) |
24341 | res = dst + src; |
24342 | flag_NotZ = res; |
24343 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24344 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24345 | flag_N = res >> 24; |
24346 | WRITE_LONG_F(adr, res) |
24347 | POST_IO |
24348 | RET(20) |
24349 | } |
24350 | |
24351 | // ADDQ |
24352 | OPCODE(0x50A7) |
24353 | { |
24354 | u32 adr, res; |
24355 | u32 src, dst; |
24356 | |
24357 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24358 | adr = AREG(7) - 4; |
24359 | AREG(7) = adr; |
24360 | PRE_IO |
24361 | READ_LONG_F(adr, dst) |
24362 | res = dst + src; |
24363 | flag_NotZ = res; |
24364 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24365 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24366 | flag_N = res >> 24; |
24367 | WRITE_LONG_F(adr, res) |
24368 | POST_IO |
24369 | RET(22) |
24370 | } |
24371 | |
24372 | // SUBQ |
24373 | OPCODE(0x5100) |
24374 | { |
24375 | u32 adr, res; |
24376 | u32 src, dst; |
24377 | |
24378 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24379 | dst = DREGu8((Opcode >> 0) & 7); |
24380 | res = dst - src; |
24381 | flag_N = flag_X = flag_C = res; |
24382 | flag_V = (src ^ dst) & (res ^ dst); |
24383 | flag_NotZ = res & 0xFF; |
24384 | DREGu8((Opcode >> 0) & 7) = res; |
24385 | RET(4) |
24386 | } |
24387 | |
24388 | // SUBQ |
24389 | OPCODE(0x5110) |
24390 | { |
24391 | u32 adr, res; |
24392 | u32 src, dst; |
24393 | |
24394 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24395 | adr = AREG((Opcode >> 0) & 7); |
24396 | PRE_IO |
24397 | READ_BYTE_F(adr, dst) |
24398 | res = dst - src; |
24399 | flag_N = flag_X = flag_C = res; |
24400 | flag_V = (src ^ dst) & (res ^ dst); |
24401 | flag_NotZ = res & 0xFF; |
24402 | WRITE_BYTE_F(adr, res) |
24403 | POST_IO |
24404 | RET(12) |
24405 | } |
24406 | |
24407 | // SUBQ |
24408 | OPCODE(0x5118) |
24409 | { |
24410 | u32 adr, res; |
24411 | u32 src, dst; |
24412 | |
24413 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24414 | adr = AREG((Opcode >> 0) & 7); |
24415 | AREG((Opcode >> 0) & 7) += 1; |
24416 | PRE_IO |
24417 | READ_BYTE_F(adr, dst) |
24418 | res = dst - src; |
24419 | flag_N = flag_X = flag_C = res; |
24420 | flag_V = (src ^ dst) & (res ^ dst); |
24421 | flag_NotZ = res & 0xFF; |
24422 | WRITE_BYTE_F(adr, res) |
24423 | POST_IO |
24424 | RET(12) |
24425 | } |
24426 | |
24427 | // SUBQ |
24428 | OPCODE(0x5120) |
24429 | { |
24430 | u32 adr, res; |
24431 | u32 src, dst; |
24432 | |
24433 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24434 | adr = AREG((Opcode >> 0) & 7) - 1; |
24435 | AREG((Opcode >> 0) & 7) = adr; |
24436 | PRE_IO |
24437 | READ_BYTE_F(adr, dst) |
24438 | res = dst - src; |
24439 | flag_N = flag_X = flag_C = res; |
24440 | flag_V = (src ^ dst) & (res ^ dst); |
24441 | flag_NotZ = res & 0xFF; |
24442 | WRITE_BYTE_F(adr, res) |
24443 | POST_IO |
24444 | RET(14) |
24445 | } |
24446 | |
24447 | // SUBQ |
24448 | OPCODE(0x5128) |
24449 | { |
24450 | u32 adr, res; |
24451 | u32 src, dst; |
24452 | |
24453 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24454 | FETCH_SWORD(adr); |
24455 | adr += AREG((Opcode >> 0) & 7); |
24456 | PRE_IO |
24457 | READ_BYTE_F(adr, dst) |
24458 | res = dst - src; |
24459 | flag_N = flag_X = flag_C = res; |
24460 | flag_V = (src ^ dst) & (res ^ dst); |
24461 | flag_NotZ = res & 0xFF; |
24462 | WRITE_BYTE_F(adr, res) |
24463 | POST_IO |
24464 | RET(16) |
24465 | } |
24466 | |
24467 | // SUBQ |
24468 | OPCODE(0x5130) |
24469 | { |
24470 | u32 adr, res; |
24471 | u32 src, dst; |
24472 | |
24473 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24474 | adr = AREG((Opcode >> 0) & 7); |
24475 | DECODE_EXT_WORD |
24476 | PRE_IO |
24477 | READ_BYTE_F(adr, dst) |
24478 | res = dst - src; |
24479 | flag_N = flag_X = flag_C = res; |
24480 | flag_V = (src ^ dst) & (res ^ dst); |
24481 | flag_NotZ = res & 0xFF; |
24482 | WRITE_BYTE_F(adr, res) |
24483 | POST_IO |
24484 | RET(18) |
24485 | } |
24486 | |
24487 | // SUBQ |
24488 | OPCODE(0x5138) |
24489 | { |
24490 | u32 adr, res; |
24491 | u32 src, dst; |
24492 | |
24493 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24494 | FETCH_SWORD(adr); |
24495 | PRE_IO |
24496 | READ_BYTE_F(adr, dst) |
24497 | res = dst - src; |
24498 | flag_N = flag_X = flag_C = res; |
24499 | flag_V = (src ^ dst) & (res ^ dst); |
24500 | flag_NotZ = res & 0xFF; |
24501 | WRITE_BYTE_F(adr, res) |
24502 | POST_IO |
24503 | RET(16) |
24504 | } |
24505 | |
24506 | // SUBQ |
24507 | OPCODE(0x5139) |
24508 | { |
24509 | u32 adr, res; |
24510 | u32 src, dst; |
24511 | |
24512 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24513 | FETCH_LONG(adr); |
24514 | PRE_IO |
24515 | READ_BYTE_F(adr, dst) |
24516 | res = dst - src; |
24517 | flag_N = flag_X = flag_C = res; |
24518 | flag_V = (src ^ dst) & (res ^ dst); |
24519 | flag_NotZ = res & 0xFF; |
24520 | WRITE_BYTE_F(adr, res) |
24521 | POST_IO |
24522 | RET(20) |
24523 | } |
24524 | |
24525 | // SUBQ |
24526 | OPCODE(0x511F) |
24527 | { |
24528 | u32 adr, res; |
24529 | u32 src, dst; |
24530 | |
24531 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24532 | adr = AREG(7); |
24533 | AREG(7) += 2; |
24534 | PRE_IO |
24535 | READ_BYTE_F(adr, dst) |
24536 | res = dst - src; |
24537 | flag_N = flag_X = flag_C = res; |
24538 | flag_V = (src ^ dst) & (res ^ dst); |
24539 | flag_NotZ = res & 0xFF; |
24540 | WRITE_BYTE_F(adr, res) |
24541 | POST_IO |
24542 | RET(12) |
24543 | } |
24544 | |
24545 | // SUBQ |
24546 | OPCODE(0x5127) |
24547 | { |
24548 | u32 adr, res; |
24549 | u32 src, dst; |
24550 | |
24551 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24552 | adr = AREG(7) - 2; |
24553 | AREG(7) = adr; |
24554 | PRE_IO |
24555 | READ_BYTE_F(adr, dst) |
24556 | res = dst - src; |
24557 | flag_N = flag_X = flag_C = res; |
24558 | flag_V = (src ^ dst) & (res ^ dst); |
24559 | flag_NotZ = res & 0xFF; |
24560 | WRITE_BYTE_F(adr, res) |
24561 | POST_IO |
24562 | RET(14) |
24563 | } |
24564 | |
24565 | // SUBQ |
24566 | OPCODE(0x5140) |
24567 | { |
24568 | u32 adr, res; |
24569 | u32 src, dst; |
24570 | |
24571 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24572 | dst = DREGu16((Opcode >> 0) & 7); |
24573 | res = dst - src; |
24574 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24575 | flag_N = flag_X = flag_C = res >> 8; |
24576 | flag_NotZ = res & 0xFFFF; |
24577 | DREGu16((Opcode >> 0) & 7) = res; |
24578 | RET(4) |
24579 | } |
24580 | |
24581 | // SUBQ |
24582 | OPCODE(0x5148) |
24583 | { |
24584 | u32 adr, res; |
24585 | u32 src, dst; |
24586 | |
24587 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24588 | dst = AREGu32((Opcode >> 0) & 7); |
24589 | res = dst - src; |
24590 | AREG((Opcode >> 0) & 7) = res; |
24591 | RET(8) |
24592 | } |
24593 | |
24594 | // SUBQ |
24595 | OPCODE(0x5150) |
24596 | { |
24597 | u32 adr, res; |
24598 | u32 src, dst; |
24599 | |
24600 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24601 | adr = AREG((Opcode >> 0) & 7); |
24602 | PRE_IO |
24603 | READ_WORD_F(adr, dst) |
24604 | res = dst - src; |
24605 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24606 | flag_N = flag_X = flag_C = res >> 8; |
24607 | flag_NotZ = res & 0xFFFF; |
24608 | WRITE_WORD_F(adr, res) |
24609 | POST_IO |
24610 | RET(12) |
24611 | } |
24612 | |
24613 | // SUBQ |
24614 | OPCODE(0x5158) |
24615 | { |
24616 | u32 adr, res; |
24617 | u32 src, dst; |
24618 | |
24619 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24620 | adr = AREG((Opcode >> 0) & 7); |
24621 | AREG((Opcode >> 0) & 7) += 2; |
24622 | PRE_IO |
24623 | READ_WORD_F(adr, dst) |
24624 | res = dst - src; |
24625 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24626 | flag_N = flag_X = flag_C = res >> 8; |
24627 | flag_NotZ = res & 0xFFFF; |
24628 | WRITE_WORD_F(adr, res) |
24629 | POST_IO |
24630 | RET(12) |
24631 | } |
24632 | |
24633 | // SUBQ |
24634 | OPCODE(0x5160) |
24635 | { |
24636 | u32 adr, res; |
24637 | u32 src, dst; |
24638 | |
24639 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24640 | adr = AREG((Opcode >> 0) & 7) - 2; |
24641 | AREG((Opcode >> 0) & 7) = adr; |
24642 | PRE_IO |
24643 | READ_WORD_F(adr, dst) |
24644 | res = dst - src; |
24645 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24646 | flag_N = flag_X = flag_C = res >> 8; |
24647 | flag_NotZ = res & 0xFFFF; |
24648 | WRITE_WORD_F(adr, res) |
24649 | POST_IO |
24650 | RET(14) |
24651 | } |
24652 | |
24653 | // SUBQ |
24654 | OPCODE(0x5168) |
24655 | { |
24656 | u32 adr, res; |
24657 | u32 src, dst; |
24658 | |
24659 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24660 | FETCH_SWORD(adr); |
24661 | adr += AREG((Opcode >> 0) & 7); |
24662 | PRE_IO |
24663 | READ_WORD_F(adr, dst) |
24664 | res = dst - src; |
24665 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24666 | flag_N = flag_X = flag_C = res >> 8; |
24667 | flag_NotZ = res & 0xFFFF; |
24668 | WRITE_WORD_F(adr, res) |
24669 | POST_IO |
24670 | RET(16) |
24671 | } |
24672 | |
24673 | // SUBQ |
24674 | OPCODE(0x5170) |
24675 | { |
24676 | u32 adr, res; |
24677 | u32 src, dst; |
24678 | |
24679 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24680 | adr = AREG((Opcode >> 0) & 7); |
24681 | DECODE_EXT_WORD |
24682 | PRE_IO |
24683 | READ_WORD_F(adr, dst) |
24684 | res = dst - src; |
24685 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24686 | flag_N = flag_X = flag_C = res >> 8; |
24687 | flag_NotZ = res & 0xFFFF; |
24688 | WRITE_WORD_F(adr, res) |
24689 | POST_IO |
24690 | RET(18) |
24691 | } |
24692 | |
24693 | // SUBQ |
24694 | OPCODE(0x5178) |
24695 | { |
24696 | u32 adr, res; |
24697 | u32 src, dst; |
24698 | |
24699 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24700 | FETCH_SWORD(adr); |
24701 | PRE_IO |
24702 | READ_WORD_F(adr, dst) |
24703 | res = dst - src; |
24704 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24705 | flag_N = flag_X = flag_C = res >> 8; |
24706 | flag_NotZ = res & 0xFFFF; |
24707 | WRITE_WORD_F(adr, res) |
24708 | POST_IO |
24709 | RET(16) |
24710 | } |
24711 | |
24712 | // SUBQ |
24713 | OPCODE(0x5179) |
24714 | { |
24715 | u32 adr, res; |
24716 | u32 src, dst; |
24717 | |
24718 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24719 | FETCH_LONG(adr); |
24720 | PRE_IO |
24721 | READ_WORD_F(adr, dst) |
24722 | res = dst - src; |
24723 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24724 | flag_N = flag_X = flag_C = res >> 8; |
24725 | flag_NotZ = res & 0xFFFF; |
24726 | WRITE_WORD_F(adr, res) |
24727 | POST_IO |
24728 | RET(20) |
24729 | } |
24730 | |
24731 | // SUBQ |
24732 | OPCODE(0x515F) |
24733 | { |
24734 | u32 adr, res; |
24735 | u32 src, dst; |
24736 | |
24737 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24738 | adr = AREG(7); |
24739 | AREG(7) += 2; |
24740 | PRE_IO |
24741 | READ_WORD_F(adr, dst) |
24742 | res = dst - src; |
24743 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24744 | flag_N = flag_X = flag_C = res >> 8; |
24745 | flag_NotZ = res & 0xFFFF; |
24746 | WRITE_WORD_F(adr, res) |
24747 | POST_IO |
24748 | RET(12) |
24749 | } |
24750 | |
24751 | // SUBQ |
24752 | OPCODE(0x5167) |
24753 | { |
24754 | u32 adr, res; |
24755 | u32 src, dst; |
24756 | |
24757 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24758 | adr = AREG(7) - 2; |
24759 | AREG(7) = adr; |
24760 | PRE_IO |
24761 | READ_WORD_F(adr, dst) |
24762 | res = dst - src; |
24763 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24764 | flag_N = flag_X = flag_C = res >> 8; |
24765 | flag_NotZ = res & 0xFFFF; |
24766 | WRITE_WORD_F(adr, res) |
24767 | POST_IO |
24768 | RET(14) |
24769 | } |
24770 | |
24771 | // SUBQ |
24772 | OPCODE(0x5180) |
24773 | { |
24774 | u32 adr, res; |
24775 | u32 src, dst; |
24776 | |
24777 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24778 | dst = DREGu32((Opcode >> 0) & 7); |
24779 | res = dst - src; |
24780 | flag_NotZ = res; |
24781 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24782 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24783 | flag_N = res >> 24; |
24784 | DREGu32((Opcode >> 0) & 7) = res; |
24785 | RET(8) |
24786 | } |
24787 | |
24788 | // SUBQ |
24789 | OPCODE(0x5188) |
24790 | { |
24791 | u32 adr, res; |
24792 | u32 src, dst; |
24793 | |
24794 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24795 | dst = AREGu32((Opcode >> 0) & 7); |
24796 | res = dst - src; |
24797 | AREG((Opcode >> 0) & 7) = res; |
24798 | RET(8) |
24799 | } |
24800 | |
24801 | // SUBQ |
24802 | OPCODE(0x5190) |
24803 | { |
24804 | u32 adr, res; |
24805 | u32 src, dst; |
24806 | |
24807 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24808 | adr = AREG((Opcode >> 0) & 7); |
24809 | PRE_IO |
24810 | READ_LONG_F(adr, dst) |
24811 | res = dst - src; |
24812 | flag_NotZ = res; |
24813 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24814 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24815 | flag_N = res >> 24; |
24816 | WRITE_LONG_F(adr, res) |
24817 | POST_IO |
24818 | RET(20) |
24819 | } |
24820 | |
24821 | // SUBQ |
24822 | OPCODE(0x5198) |
24823 | { |
24824 | u32 adr, res; |
24825 | u32 src, dst; |
24826 | |
24827 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24828 | adr = AREG((Opcode >> 0) & 7); |
24829 | AREG((Opcode >> 0) & 7) += 4; |
24830 | PRE_IO |
24831 | READ_LONG_F(adr, dst) |
24832 | res = dst - src; |
24833 | flag_NotZ = res; |
24834 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24835 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24836 | flag_N = res >> 24; |
24837 | WRITE_LONG_F(adr, res) |
24838 | POST_IO |
24839 | RET(20) |
24840 | } |
24841 | |
24842 | // SUBQ |
24843 | OPCODE(0x51A0) |
24844 | { |
24845 | u32 adr, res; |
24846 | u32 src, dst; |
24847 | |
24848 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24849 | adr = AREG((Opcode >> 0) & 7) - 4; |
24850 | AREG((Opcode >> 0) & 7) = adr; |
24851 | PRE_IO |
24852 | READ_LONG_F(adr, dst) |
24853 | res = dst - src; |
24854 | flag_NotZ = res; |
24855 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24856 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24857 | flag_N = res >> 24; |
24858 | WRITE_LONG_F(adr, res) |
24859 | POST_IO |
24860 | RET(22) |
24861 | } |
24862 | |
24863 | // SUBQ |
24864 | OPCODE(0x51A8) |
24865 | { |
24866 | u32 adr, res; |
24867 | u32 src, dst; |
24868 | |
24869 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24870 | FETCH_SWORD(adr); |
24871 | adr += AREG((Opcode >> 0) & 7); |
24872 | PRE_IO |
24873 | READ_LONG_F(adr, dst) |
24874 | res = dst - src; |
24875 | flag_NotZ = res; |
24876 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24877 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24878 | flag_N = res >> 24; |
24879 | WRITE_LONG_F(adr, res) |
24880 | POST_IO |
24881 | RET(24) |
24882 | } |
24883 | |
24884 | // SUBQ |
24885 | OPCODE(0x51B0) |
24886 | { |
24887 | u32 adr, res; |
24888 | u32 src, dst; |
24889 | |
24890 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24891 | adr = AREG((Opcode >> 0) & 7); |
24892 | DECODE_EXT_WORD |
24893 | PRE_IO |
24894 | READ_LONG_F(adr, dst) |
24895 | res = dst - src; |
24896 | flag_NotZ = res; |
24897 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24898 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24899 | flag_N = res >> 24; |
24900 | WRITE_LONG_F(adr, res) |
24901 | POST_IO |
24902 | RET(26) |
24903 | } |
24904 | |
24905 | // SUBQ |
24906 | OPCODE(0x51B8) |
24907 | { |
24908 | u32 adr, res; |
24909 | u32 src, dst; |
24910 | |
24911 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24912 | FETCH_SWORD(adr); |
24913 | PRE_IO |
24914 | READ_LONG_F(adr, dst) |
24915 | res = dst - src; |
24916 | flag_NotZ = res; |
24917 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24918 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24919 | flag_N = res >> 24; |
24920 | WRITE_LONG_F(adr, res) |
24921 | POST_IO |
24922 | RET(24) |
24923 | } |
24924 | |
24925 | // SUBQ |
24926 | OPCODE(0x51B9) |
24927 | { |
24928 | u32 adr, res; |
24929 | u32 src, dst; |
24930 | |
24931 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24932 | FETCH_LONG(adr); |
24933 | PRE_IO |
24934 | READ_LONG_F(adr, dst) |
24935 | res = dst - src; |
24936 | flag_NotZ = res; |
24937 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24938 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24939 | flag_N = res >> 24; |
24940 | WRITE_LONG_F(adr, res) |
24941 | POST_IO |
24942 | RET(28) |
24943 | } |
24944 | |
24945 | // SUBQ |
24946 | OPCODE(0x519F) |
24947 | { |
24948 | u32 adr, res; |
24949 | u32 src, dst; |
24950 | |
24951 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24952 | adr = AREG(7); |
24953 | AREG(7) += 4; |
24954 | PRE_IO |
24955 | READ_LONG_F(adr, dst) |
24956 | res = dst - src; |
24957 | flag_NotZ = res; |
24958 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24959 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24960 | flag_N = res >> 24; |
24961 | WRITE_LONG_F(adr, res) |
24962 | POST_IO |
24963 | RET(20) |
24964 | } |
24965 | |
24966 | // SUBQ |
24967 | OPCODE(0x51A7) |
24968 | { |
24969 | u32 adr, res; |
24970 | u32 src, dst; |
24971 | |
24972 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24973 | adr = AREG(7) - 4; |
24974 | AREG(7) = adr; |
24975 | PRE_IO |
24976 | READ_LONG_F(adr, dst) |
24977 | res = dst - src; |
24978 | flag_NotZ = res; |
24979 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24980 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24981 | flag_N = res >> 24; |
24982 | WRITE_LONG_F(adr, res) |
24983 | POST_IO |
24984 | RET(22) |
24985 | } |
24986 | |
24987 | // BCC |
24988 | OPCODE(0x6201) |
24989 | { |
24990 | u32 adr, res; |
24991 | u32 src, dst; |
24992 | |
24993 | if (flag_NotZ && (!(flag_C & 0x100))) |
24994 | { |
24995 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24996 | m68kcontext.io_cycle_counter -= 2; |
24997 | } |
24998 | RET(8) |
24999 | } |
25000 | |
25001 | // BCC |
25002 | OPCODE(0x6301) |
25003 | { |
25004 | u32 adr, res; |
25005 | u32 src, dst; |
25006 | |
25007 | if ((!flag_NotZ) || (flag_C & 0x100)) |
25008 | { |
25009 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25010 | m68kcontext.io_cycle_counter -= 2; |
25011 | } |
25012 | RET(8) |
25013 | } |
25014 | |
25015 | // BCC |
25016 | OPCODE(0x6401) |
25017 | { |
25018 | u32 adr, res; |
25019 | u32 src, dst; |
25020 | |
25021 | if (!(flag_C & 0x100)) |
25022 | { |
25023 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25024 | m68kcontext.io_cycle_counter -= 2; |
25025 | } |
25026 | RET(8) |
25027 | } |
25028 | |
25029 | // BCC |
25030 | OPCODE(0x6501) |
25031 | { |
25032 | u32 adr, res; |
25033 | u32 src, dst; |
25034 | |
25035 | if (flag_C & 0x100) |
25036 | { |
25037 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25038 | m68kcontext.io_cycle_counter -= 2; |
25039 | } |
25040 | RET(8) |
25041 | } |
25042 | |
25043 | // BCC |
25044 | OPCODE(0x6601) |
25045 | { |
25046 | u32 adr, res; |
25047 | u32 src, dst; |
25048 | |
25049 | if (flag_NotZ) |
25050 | { |
25051 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25052 | m68kcontext.io_cycle_counter -= 2; |
25053 | } |
25054 | RET(8) |
25055 | } |
25056 | |
25057 | // BCC |
25058 | OPCODE(0x6701) |
25059 | { |
25060 | u32 adr, res; |
25061 | u32 src, dst; |
25062 | |
25063 | if (!flag_NotZ) |
25064 | { |
25065 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25066 | m68kcontext.io_cycle_counter -= 2; |
25067 | } |
25068 | RET(8) |
25069 | } |
25070 | |
25071 | // BCC |
25072 | OPCODE(0x6801) |
25073 | { |
25074 | u32 adr, res; |
25075 | u32 src, dst; |
25076 | |
25077 | if (!(flag_V & 0x80)) |
25078 | { |
25079 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25080 | m68kcontext.io_cycle_counter -= 2; |
25081 | } |
25082 | RET(8) |
25083 | } |
25084 | |
25085 | // BCC |
25086 | OPCODE(0x6901) |
25087 | { |
25088 | u32 adr, res; |
25089 | u32 src, dst; |
25090 | |
25091 | if (flag_V & 0x80) |
25092 | { |
25093 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25094 | m68kcontext.io_cycle_counter -= 2; |
25095 | } |
25096 | RET(8) |
25097 | } |
25098 | |
25099 | // BCC |
25100 | OPCODE(0x6A01) |
25101 | { |
25102 | u32 adr, res; |
25103 | u32 src, dst; |
25104 | |
25105 | if (!(flag_N & 0x80)) |
25106 | { |
25107 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25108 | m68kcontext.io_cycle_counter -= 2; |
25109 | } |
25110 | RET(8) |
25111 | } |
25112 | |
25113 | // BCC |
25114 | OPCODE(0x6B01) |
25115 | { |
25116 | u32 adr, res; |
25117 | u32 src, dst; |
25118 | |
25119 | if (flag_N & 0x80) |
25120 | { |
25121 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25122 | m68kcontext.io_cycle_counter -= 2; |
25123 | } |
25124 | RET(8) |
25125 | } |
25126 | |
25127 | // BCC |
25128 | OPCODE(0x6C01) |
25129 | { |
25130 | u32 adr, res; |
25131 | u32 src, dst; |
25132 | |
25133 | if (!((flag_N ^ flag_V) & 0x80)) |
25134 | { |
25135 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25136 | m68kcontext.io_cycle_counter -= 2; |
25137 | } |
25138 | RET(8) |
25139 | } |
25140 | |
25141 | // BCC |
25142 | OPCODE(0x6D01) |
25143 | { |
25144 | u32 adr, res; |
25145 | u32 src, dst; |
25146 | |
25147 | if ((flag_N ^ flag_V) & 0x80) |
25148 | { |
25149 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25150 | m68kcontext.io_cycle_counter -= 2; |
25151 | } |
25152 | RET(8) |
25153 | } |
25154 | |
25155 | // BCC |
25156 | OPCODE(0x6E01) |
25157 | { |
25158 | u32 adr, res; |
25159 | u32 src, dst; |
25160 | |
25161 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25162 | { |
25163 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25164 | m68kcontext.io_cycle_counter -= 2; |
25165 | } |
25166 | RET(8) |
25167 | } |
25168 | |
25169 | // BCC |
25170 | OPCODE(0x6F01) |
25171 | { |
25172 | u32 adr, res; |
25173 | u32 src, dst; |
25174 | |
25175 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25176 | { |
25177 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25178 | m68kcontext.io_cycle_counter -= 2; |
25179 | } |
25180 | RET(8) |
25181 | } |
25182 | |
25183 | // BCC16 |
25184 | OPCODE(0x6200) |
25185 | { |
25186 | u32 adr, res; |
25187 | u32 src, dst; |
25188 | |
25189 | if (flag_NotZ && (!(flag_C & 0x100))) |
25190 | { |
25191 | u32 newPC; |
25192 | |
25193 | newPC = (u32)(PC) - BasePC; |
25194 | newPC += GET_SWORD; |
25195 | SET_PC(newPC); |
25196 | CHECK_BRANCH_EXCEPTION(newPC) |
25197 | RET(10) |
25198 | } |
25199 | PC++; |
25200 | RET(12) |
25201 | } |
25202 | |
25203 | // BCC16 |
25204 | OPCODE(0x6300) |
25205 | { |
25206 | u32 adr, res; |
25207 | u32 src, dst; |
25208 | |
25209 | if ((!flag_NotZ) || (flag_C & 0x100)) |
25210 | { |
25211 | u32 newPC; |
25212 | |
25213 | newPC = (u32)(PC) - BasePC; |
25214 | newPC += GET_SWORD; |
25215 | SET_PC(newPC); |
25216 | CHECK_BRANCH_EXCEPTION(newPC) |
25217 | RET(10) |
25218 | } |
25219 | PC++; |
25220 | RET(12) |
25221 | } |
25222 | |
25223 | // BCC16 |
25224 | OPCODE(0x6400) |
25225 | { |
25226 | u32 adr, res; |
25227 | u32 src, dst; |
25228 | |
25229 | if (!(flag_C & 0x100)) |
25230 | { |
25231 | u32 newPC; |
25232 | |
25233 | newPC = (u32)(PC) - BasePC; |
25234 | newPC += GET_SWORD; |
25235 | SET_PC(newPC); |
25236 | CHECK_BRANCH_EXCEPTION(newPC) |
25237 | RET(10) |
25238 | } |
25239 | PC++; |
25240 | RET(12) |
25241 | } |
25242 | |
25243 | // BCC16 |
25244 | OPCODE(0x6500) |
25245 | { |
25246 | u32 adr, res; |
25247 | u32 src, dst; |
25248 | |
25249 | if (flag_C & 0x100) |
25250 | { |
25251 | u32 newPC; |
25252 | |
25253 | newPC = (u32)(PC) - BasePC; |
25254 | newPC += GET_SWORD; |
25255 | SET_PC(newPC); |
25256 | CHECK_BRANCH_EXCEPTION(newPC) |
25257 | RET(10) |
25258 | } |
25259 | PC++; |
25260 | RET(12) |
25261 | } |
25262 | |
25263 | // BCC16 |
25264 | OPCODE(0x6600) |
25265 | { |
25266 | u32 adr, res; |
25267 | u32 src, dst; |
25268 | |
25269 | if (flag_NotZ) |
25270 | { |
25271 | u32 newPC; |
25272 | |
25273 | newPC = (u32)(PC) - BasePC; |
25274 | newPC += GET_SWORD; |
25275 | SET_PC(newPC); |
25276 | CHECK_BRANCH_EXCEPTION(newPC) |
25277 | RET(10) |
25278 | } |
25279 | PC++; |
25280 | RET(12) |
25281 | } |
25282 | |
25283 | // BCC16 |
25284 | OPCODE(0x6700) |
25285 | { |
25286 | u32 adr, res; |
25287 | u32 src, dst; |
25288 | |
25289 | if (!flag_NotZ) |
25290 | { |
25291 | u32 newPC; |
25292 | |
25293 | newPC = (u32)(PC) - BasePC; |
25294 | newPC += GET_SWORD; |
25295 | SET_PC(newPC); |
25296 | CHECK_BRANCH_EXCEPTION(newPC) |
25297 | RET(10) |
25298 | } |
25299 | PC++; |
25300 | RET(12) |
25301 | } |
25302 | |
25303 | // BCC16 |
25304 | OPCODE(0x6800) |
25305 | { |
25306 | u32 adr, res; |
25307 | u32 src, dst; |
25308 | |
25309 | if (!(flag_V & 0x80)) |
25310 | { |
25311 | u32 newPC; |
25312 | |
25313 | newPC = (u32)(PC) - BasePC; |
25314 | newPC += GET_SWORD; |
25315 | SET_PC(newPC); |
25316 | CHECK_BRANCH_EXCEPTION(newPC) |
25317 | RET(10) |
25318 | } |
25319 | PC++; |
25320 | RET(12) |
25321 | } |
25322 | |
25323 | // BCC16 |
25324 | OPCODE(0x6900) |
25325 | { |
25326 | u32 adr, res; |
25327 | u32 src, dst; |
25328 | |
25329 | if (flag_V & 0x80) |
25330 | { |
25331 | u32 newPC; |
25332 | |
25333 | newPC = (u32)(PC) - BasePC; |
25334 | newPC += GET_SWORD; |
25335 | SET_PC(newPC); |
25336 | CHECK_BRANCH_EXCEPTION(newPC) |
25337 | RET(10) |
25338 | } |
25339 | PC++; |
25340 | RET(12) |
25341 | } |
25342 | |
25343 | // BCC16 |
25344 | OPCODE(0x6A00) |
25345 | { |
25346 | u32 adr, res; |
25347 | u32 src, dst; |
25348 | |
25349 | if (!(flag_N & 0x80)) |
25350 | { |
25351 | u32 newPC; |
25352 | |
25353 | newPC = (u32)(PC) - BasePC; |
25354 | newPC += GET_SWORD; |
25355 | SET_PC(newPC); |
25356 | CHECK_BRANCH_EXCEPTION(newPC) |
25357 | RET(10) |
25358 | } |
25359 | PC++; |
25360 | RET(12) |
25361 | } |
25362 | |
25363 | // BCC16 |
25364 | OPCODE(0x6B00) |
25365 | { |
25366 | u32 adr, res; |
25367 | u32 src, dst; |
25368 | |
25369 | if (flag_N & 0x80) |
25370 | { |
25371 | u32 newPC; |
25372 | |
25373 | newPC = (u32)(PC) - BasePC; |
25374 | newPC += GET_SWORD; |
25375 | SET_PC(newPC); |
25376 | CHECK_BRANCH_EXCEPTION(newPC) |
25377 | RET(10) |
25378 | } |
25379 | PC++; |
25380 | RET(12) |
25381 | } |
25382 | |
25383 | // BCC16 |
25384 | OPCODE(0x6C00) |
25385 | { |
25386 | u32 adr, res; |
25387 | u32 src, dst; |
25388 | |
25389 | if (!((flag_N ^ flag_V) & 0x80)) |
25390 | { |
25391 | u32 newPC; |
25392 | |
25393 | newPC = (u32)(PC) - BasePC; |
25394 | newPC += GET_SWORD; |
25395 | SET_PC(newPC); |
25396 | CHECK_BRANCH_EXCEPTION(newPC) |
25397 | RET(10) |
25398 | } |
25399 | PC++; |
25400 | RET(12) |
25401 | } |
25402 | |
25403 | // BCC16 |
25404 | OPCODE(0x6D00) |
25405 | { |
25406 | u32 adr, res; |
25407 | u32 src, dst; |
25408 | |
25409 | if ((flag_N ^ flag_V) & 0x80) |
25410 | { |
25411 | u32 newPC; |
25412 | |
25413 | newPC = (u32)(PC) - BasePC; |
25414 | newPC += GET_SWORD; |
25415 | SET_PC(newPC); |
25416 | CHECK_BRANCH_EXCEPTION(newPC) |
25417 | RET(10) |
25418 | } |
25419 | PC++; |
25420 | RET(12) |
25421 | } |
25422 | |
25423 | // BCC16 |
25424 | OPCODE(0x6E00) |
25425 | { |
25426 | u32 adr, res; |
25427 | u32 src, dst; |
25428 | |
25429 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25430 | { |
25431 | u32 newPC; |
25432 | |
25433 | newPC = (u32)(PC) - BasePC; |
25434 | newPC += GET_SWORD; |
25435 | SET_PC(newPC); |
25436 | CHECK_BRANCH_EXCEPTION(newPC) |
25437 | RET(10) |
25438 | } |
25439 | PC++; |
25440 | RET(12) |
25441 | } |
25442 | |
25443 | // BCC16 |
25444 | OPCODE(0x6F00) |
25445 | { |
25446 | u32 adr, res; |
25447 | u32 src, dst; |
25448 | |
25449 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25450 | { |
25451 | u32 newPC; |
25452 | |
25453 | newPC = (u32)(PC) - BasePC; |
25454 | newPC += GET_SWORD; |
25455 | SET_PC(newPC); |
25456 | CHECK_BRANCH_EXCEPTION(newPC) |
25457 | RET(10) |
25458 | } |
25459 | PC++; |
25460 | RET(12) |
25461 | } |
25462 | |
25463 | // BRA |
25464 | OPCODE(0x6001) |
25465 | { |
25466 | #ifdef FAMEC_CHECK_BRANCHES |
25467 | u32 newPC = (u32)(PC) - BasePC; |
25468 | s8 offs=Opcode; |
25469 | newPC += offs; |
25470 | SET_PC(newPC); |
25471 | CHECK_BRANCH_EXCEPTION(offs) |
25472 | #else |
25473 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25474 | #endif |
25475 | RET(10) |
25476 | } |
25477 | |
25478 | // BRA16 |
25479 | OPCODE(0x6000) |
25480 | { |
25481 | u32 adr, res; |
25482 | u32 src, dst; |
25483 | |
25484 | { |
25485 | u32 newPC; |
25486 | |
25487 | newPC = (u32)(PC) - BasePC; |
25488 | newPC += GET_SWORD; |
25489 | SET_PC(newPC); |
25490 | CHECK_BRANCH_EXCEPTION(newPC) |
25491 | } |
25492 | RET(10) |
25493 | } |
25494 | |
25495 | // BSR |
25496 | OPCODE(0x6101) |
25497 | { |
25498 | u32 adr, res; |
25499 | u32 src, dst; |
25500 | u32 oldPC; |
25501 | s8 offs; |
25502 | |
25503 | PRE_IO |
25504 | |
25505 | oldPC = (u32)(PC) - BasePC; |
25506 | PUSH_32_F(oldPC) |
25507 | #ifdef FAMEC_CHECK_BRANCHES |
25508 | offs = Opcode; |
25509 | oldPC += offs; |
25510 | SET_PC(oldPC); |
25511 | CHECK_BRANCH_EXCEPTION(offs) |
25512 | #else |
25513 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25514 | #endif |
25515 | POST_IO |
25516 | RET(18) |
25517 | } |
25518 | |
25519 | // BSR16 |
25520 | OPCODE(0x6100) |
25521 | { |
25522 | u32 adr, res; |
25523 | u32 src, dst; |
25524 | |
25525 | PRE_IO |
25526 | { |
25527 | u32 oldPC, newPC; |
25528 | |
25529 | newPC = (u32)(PC) - BasePC; |
25530 | oldPC = newPC + 2; |
25531 | PUSH_32_F(oldPC) |
25532 | newPC += GET_SWORD; |
25533 | SET_PC(newPC); |
25534 | CHECK_BRANCH_EXCEPTION(newPC) |
25535 | } |
25536 | POST_IO |
25537 | RET(18) |
25538 | } |
25539 | |
25540 | // MOVEQ |
25541 | OPCODE(0x7000) |
25542 | { |
25543 | u32 adr, res; |
25544 | u32 src, dst; |
25545 | |
25546 | res = (s32)(s8)Opcode; |
25547 | flag_C = flag_V = 0; |
25548 | flag_N = flag_NotZ = res; |
25549 | DREGu32((Opcode >> 9) & 7) = res; |
25550 | RET(4) |
25551 | } |
25552 | |
25553 | // ORaD |
25554 | OPCODE(0x8000) |
25555 | { |
25556 | u32 adr, res; |
25557 | u32 src, dst; |
25558 | |
25559 | src = DREGu8((Opcode >> 0) & 7); |
25560 | res = DREGu8((Opcode >> 9) & 7); |
25561 | res |= src; |
25562 | flag_C = 0; |
25563 | flag_V = 0; |
25564 | flag_NotZ = res; |
25565 | flag_N = res; |
25566 | DREGu8((Opcode >> 9) & 7) = res; |
25567 | RET(4) |
25568 | } |
25569 | |
25570 | // ORaD |
25571 | OPCODE(0x8010) |
25572 | { |
25573 | u32 adr, res; |
25574 | u32 src, dst; |
25575 | |
25576 | adr = AREG((Opcode >> 0) & 7); |
25577 | PRE_IO |
25578 | READ_BYTE_F(adr, src) |
25579 | res = DREGu8((Opcode >> 9) & 7); |
25580 | res |= src; |
25581 | flag_C = 0; |
25582 | flag_V = 0; |
25583 | flag_NotZ = res; |
25584 | flag_N = res; |
25585 | DREGu8((Opcode >> 9) & 7) = res; |
25586 | POST_IO |
25587 | RET(8) |
25588 | } |
25589 | |
25590 | // ORaD |
25591 | OPCODE(0x8018) |
25592 | { |
25593 | u32 adr, res; |
25594 | u32 src, dst; |
25595 | |
25596 | adr = AREG((Opcode >> 0) & 7); |
25597 | AREG((Opcode >> 0) & 7) += 1; |
25598 | PRE_IO |
25599 | READ_BYTE_F(adr, src) |
25600 | res = DREGu8((Opcode >> 9) & 7); |
25601 | res |= src; |
25602 | flag_C = 0; |
25603 | flag_V = 0; |
25604 | flag_NotZ = res; |
25605 | flag_N = res; |
25606 | DREGu8((Opcode >> 9) & 7) = res; |
25607 | POST_IO |
25608 | RET(8) |
25609 | } |
25610 | |
25611 | // ORaD |
25612 | OPCODE(0x8020) |
25613 | { |
25614 | u32 adr, res; |
25615 | u32 src, dst; |
25616 | |
25617 | adr = AREG((Opcode >> 0) & 7) - 1; |
25618 | AREG((Opcode >> 0) & 7) = adr; |
25619 | PRE_IO |
25620 | READ_BYTE_F(adr, src) |
25621 | res = DREGu8((Opcode >> 9) & 7); |
25622 | res |= src; |
25623 | flag_C = 0; |
25624 | flag_V = 0; |
25625 | flag_NotZ = res; |
25626 | flag_N = res; |
25627 | DREGu8((Opcode >> 9) & 7) = res; |
25628 | POST_IO |
25629 | RET(10) |
25630 | } |
25631 | |
25632 | // ORaD |
25633 | OPCODE(0x8028) |
25634 | { |
25635 | u32 adr, res; |
25636 | u32 src, dst; |
25637 | |
25638 | FETCH_SWORD(adr); |
25639 | adr += AREG((Opcode >> 0) & 7); |
25640 | PRE_IO |
25641 | READ_BYTE_F(adr, src) |
25642 | res = DREGu8((Opcode >> 9) & 7); |
25643 | res |= src; |
25644 | flag_C = 0; |
25645 | flag_V = 0; |
25646 | flag_NotZ = res; |
25647 | flag_N = res; |
25648 | DREGu8((Opcode >> 9) & 7) = res; |
25649 | POST_IO |
25650 | RET(12) |
25651 | } |
25652 | |
25653 | // ORaD |
25654 | OPCODE(0x8030) |
25655 | { |
25656 | u32 adr, res; |
25657 | u32 src, dst; |
25658 | |
25659 | adr = AREG((Opcode >> 0) & 7); |
25660 | DECODE_EXT_WORD |
25661 | PRE_IO |
25662 | READ_BYTE_F(adr, src) |
25663 | res = DREGu8((Opcode >> 9) & 7); |
25664 | res |= src; |
25665 | flag_C = 0; |
25666 | flag_V = 0; |
25667 | flag_NotZ = res; |
25668 | flag_N = res; |
25669 | DREGu8((Opcode >> 9) & 7) = res; |
25670 | POST_IO |
25671 | RET(14) |
25672 | } |
25673 | |
25674 | // ORaD |
25675 | OPCODE(0x8038) |
25676 | { |
25677 | u32 adr, res; |
25678 | u32 src, dst; |
25679 | |
25680 | FETCH_SWORD(adr); |
25681 | PRE_IO |
25682 | READ_BYTE_F(adr, src) |
25683 | res = DREGu8((Opcode >> 9) & 7); |
25684 | res |= src; |
25685 | flag_C = 0; |
25686 | flag_V = 0; |
25687 | flag_NotZ = res; |
25688 | flag_N = res; |
25689 | DREGu8((Opcode >> 9) & 7) = res; |
25690 | POST_IO |
25691 | RET(12) |
25692 | } |
25693 | |
25694 | // ORaD |
25695 | OPCODE(0x8039) |
25696 | { |
25697 | u32 adr, res; |
25698 | u32 src, dst; |
25699 | |
25700 | FETCH_LONG(adr); |
25701 | PRE_IO |
25702 | READ_BYTE_F(adr, src) |
25703 | res = DREGu8((Opcode >> 9) & 7); |
25704 | res |= src; |
25705 | flag_C = 0; |
25706 | flag_V = 0; |
25707 | flag_NotZ = res; |
25708 | flag_N = res; |
25709 | DREGu8((Opcode >> 9) & 7) = res; |
25710 | POST_IO |
25711 | RET(16) |
25712 | } |
25713 | |
25714 | // ORaD |
25715 | OPCODE(0x803A) |
25716 | { |
25717 | u32 adr, res; |
25718 | u32 src, dst; |
25719 | |
25720 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
25721 | PC++; |
25722 | PRE_IO |
25723 | READ_BYTE_F(adr, src) |
25724 | res = DREGu8((Opcode >> 9) & 7); |
25725 | res |= src; |
25726 | flag_C = 0; |
25727 | flag_V = 0; |
25728 | flag_NotZ = res; |
25729 | flag_N = res; |
25730 | DREGu8((Opcode >> 9) & 7) = res; |
25731 | POST_IO |
25732 | RET(12) |
25733 | } |
25734 | |
25735 | // ORaD |
25736 | OPCODE(0x803B) |
25737 | { |
25738 | u32 adr, res; |
25739 | u32 src, dst; |
25740 | |
25741 | adr = (u32)(PC) - BasePC; |
25742 | DECODE_EXT_WORD |
25743 | PRE_IO |
25744 | READ_BYTE_F(adr, src) |
25745 | res = DREGu8((Opcode >> 9) & 7); |
25746 | res |= src; |
25747 | flag_C = 0; |
25748 | flag_V = 0; |
25749 | flag_NotZ = res; |
25750 | flag_N = res; |
25751 | DREGu8((Opcode >> 9) & 7) = res; |
25752 | POST_IO |
25753 | RET(14) |
25754 | } |
25755 | |
25756 | // ORaD |
25757 | OPCODE(0x803C) |
25758 | { |
25759 | u32 adr, res; |
25760 | u32 src, dst; |
25761 | |
25762 | FETCH_BYTE(src); |
25763 | res = DREGu8((Opcode >> 9) & 7); |
25764 | res |= src; |
25765 | flag_C = 0; |
25766 | flag_V = 0; |
25767 | flag_NotZ = res; |
25768 | flag_N = res; |
25769 | DREGu8((Opcode >> 9) & 7) = res; |
25770 | RET(8) |
25771 | } |
25772 | |
25773 | // ORaD |
25774 | OPCODE(0x801F) |
25775 | { |
25776 | u32 adr, res; |
25777 | u32 src, dst; |
25778 | |
25779 | adr = AREG(7); |
25780 | AREG(7) += 2; |
25781 | PRE_IO |
25782 | READ_BYTE_F(adr, src) |
25783 | res = DREGu8((Opcode >> 9) & 7); |
25784 | res |= src; |
25785 | flag_C = 0; |
25786 | flag_V = 0; |
25787 | flag_NotZ = res; |
25788 | flag_N = res; |
25789 | DREGu8((Opcode >> 9) & 7) = res; |
25790 | POST_IO |
25791 | RET(8) |
25792 | } |
25793 | |
25794 | // ORaD |
25795 | OPCODE(0x8027) |
25796 | { |
25797 | u32 adr, res; |
25798 | u32 src, dst; |
25799 | |
25800 | adr = AREG(7) - 2; |
25801 | AREG(7) = adr; |
25802 | PRE_IO |
25803 | READ_BYTE_F(adr, src) |
25804 | res = DREGu8((Opcode >> 9) & 7); |
25805 | res |= src; |
25806 | flag_C = 0; |
25807 | flag_V = 0; |
25808 | flag_NotZ = res; |
25809 | flag_N = res; |
25810 | DREGu8((Opcode >> 9) & 7) = res; |
25811 | POST_IO |
25812 | RET(10) |
25813 | } |
25814 | |
25815 | // ORaD |
25816 | OPCODE(0x8040) |
25817 | { |
25818 | u32 adr, res; |
25819 | u32 src, dst; |
25820 | |
25821 | src = DREGu16((Opcode >> 0) & 7); |
25822 | res = DREGu16((Opcode >> 9) & 7); |
25823 | res |= src; |
25824 | flag_C = 0; |
25825 | flag_V = 0; |
25826 | flag_NotZ = res; |
25827 | flag_N = res >> 8; |
25828 | DREGu16((Opcode >> 9) & 7) = res; |
25829 | RET(4) |
25830 | } |
25831 | |
25832 | // ORaD |
25833 | OPCODE(0x8050) |
25834 | { |
25835 | u32 adr, res; |
25836 | u32 src, dst; |
25837 | |
25838 | adr = AREG((Opcode >> 0) & 7); |
25839 | PRE_IO |
25840 | READ_WORD_F(adr, src) |
25841 | res = DREGu16((Opcode >> 9) & 7); |
25842 | res |= src; |
25843 | flag_C = 0; |
25844 | flag_V = 0; |
25845 | flag_NotZ = res; |
25846 | flag_N = res >> 8; |
25847 | DREGu16((Opcode >> 9) & 7) = res; |
25848 | POST_IO |
25849 | RET(8) |
25850 | } |
25851 | |
25852 | // ORaD |
25853 | OPCODE(0x8058) |
25854 | { |
25855 | u32 adr, res; |
25856 | u32 src, dst; |
25857 | |
25858 | adr = AREG((Opcode >> 0) & 7); |
25859 | AREG((Opcode >> 0) & 7) += 2; |
25860 | PRE_IO |
25861 | READ_WORD_F(adr, src) |
25862 | res = DREGu16((Opcode >> 9) & 7); |
25863 | res |= src; |
25864 | flag_C = 0; |
25865 | flag_V = 0; |
25866 | flag_NotZ = res; |
25867 | flag_N = res >> 8; |
25868 | DREGu16((Opcode >> 9) & 7) = res; |
25869 | POST_IO |
25870 | RET(8) |
25871 | } |
25872 | |
25873 | // ORaD |
25874 | OPCODE(0x8060) |
25875 | { |
25876 | u32 adr, res; |
25877 | u32 src, dst; |
25878 | |
25879 | adr = AREG((Opcode >> 0) & 7) - 2; |
25880 | AREG((Opcode >> 0) & 7) = adr; |
25881 | PRE_IO |
25882 | READ_WORD_F(adr, src) |
25883 | res = DREGu16((Opcode >> 9) & 7); |
25884 | res |= src; |
25885 | flag_C = 0; |
25886 | flag_V = 0; |
25887 | flag_NotZ = res; |
25888 | flag_N = res >> 8; |
25889 | DREGu16((Opcode >> 9) & 7) = res; |
25890 | POST_IO |
25891 | RET(10) |
25892 | } |
25893 | |
25894 | // ORaD |
25895 | OPCODE(0x8068) |
25896 | { |
25897 | u32 adr, res; |
25898 | u32 src, dst; |
25899 | |
25900 | FETCH_SWORD(adr); |
25901 | adr += AREG((Opcode >> 0) & 7); |
25902 | PRE_IO |
25903 | READ_WORD_F(adr, src) |
25904 | res = DREGu16((Opcode >> 9) & 7); |
25905 | res |= src; |
25906 | flag_C = 0; |
25907 | flag_V = 0; |
25908 | flag_NotZ = res; |
25909 | flag_N = res >> 8; |
25910 | DREGu16((Opcode >> 9) & 7) = res; |
25911 | POST_IO |
25912 | RET(12) |
25913 | } |
25914 | |
25915 | // ORaD |
25916 | OPCODE(0x8070) |
25917 | { |
25918 | u32 adr, res; |
25919 | u32 src, dst; |
25920 | |
25921 | adr = AREG((Opcode >> 0) & 7); |
25922 | DECODE_EXT_WORD |
25923 | PRE_IO |
25924 | READ_WORD_F(adr, src) |
25925 | res = DREGu16((Opcode >> 9) & 7); |
25926 | res |= src; |
25927 | flag_C = 0; |
25928 | flag_V = 0; |
25929 | flag_NotZ = res; |
25930 | flag_N = res >> 8; |
25931 | DREGu16((Opcode >> 9) & 7) = res; |
25932 | POST_IO |
25933 | RET(14) |
25934 | } |
25935 | |
25936 | // ORaD |
25937 | OPCODE(0x8078) |
25938 | { |
25939 | u32 adr, res; |
25940 | u32 src, dst; |
25941 | |
25942 | FETCH_SWORD(adr); |
25943 | PRE_IO |
25944 | READ_WORD_F(adr, src) |
25945 | res = DREGu16((Opcode >> 9) & 7); |
25946 | res |= src; |
25947 | flag_C = 0; |
25948 | flag_V = 0; |
25949 | flag_NotZ = res; |
25950 | flag_N = res >> 8; |
25951 | DREGu16((Opcode >> 9) & 7) = res; |
25952 | POST_IO |
25953 | RET(12) |
25954 | } |
25955 | |
25956 | // ORaD |
25957 | OPCODE(0x8079) |
25958 | { |
25959 | u32 adr, res; |
25960 | u32 src, dst; |
25961 | |
25962 | FETCH_LONG(adr); |
25963 | PRE_IO |
25964 | READ_WORD_F(adr, src) |
25965 | res = DREGu16((Opcode >> 9) & 7); |
25966 | res |= src; |
25967 | flag_C = 0; |
25968 | flag_V = 0; |
25969 | flag_NotZ = res; |
25970 | flag_N = res >> 8; |
25971 | DREGu16((Opcode >> 9) & 7) = res; |
25972 | POST_IO |
25973 | RET(16) |
25974 | } |
25975 | |
25976 | // ORaD |
25977 | OPCODE(0x807A) |
25978 | { |
25979 | u32 adr, res; |
25980 | u32 src, dst; |
25981 | |
25982 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
25983 | PC++; |
25984 | PRE_IO |
25985 | READ_WORD_F(adr, src) |
25986 | res = DREGu16((Opcode >> 9) & 7); |
25987 | res |= src; |
25988 | flag_C = 0; |
25989 | flag_V = 0; |
25990 | flag_NotZ = res; |
25991 | flag_N = res >> 8; |
25992 | DREGu16((Opcode >> 9) & 7) = res; |
25993 | POST_IO |
25994 | RET(12) |
25995 | } |
25996 | |
25997 | // ORaD |
25998 | OPCODE(0x807B) |
25999 | { |
26000 | u32 adr, res; |
26001 | u32 src, dst; |
26002 | |
26003 | adr = (u32)(PC) - BasePC; |
26004 | DECODE_EXT_WORD |
26005 | PRE_IO |
26006 | READ_WORD_F(adr, src) |
26007 | res = DREGu16((Opcode >> 9) & 7); |
26008 | res |= src; |
26009 | flag_C = 0; |
26010 | flag_V = 0; |
26011 | flag_NotZ = res; |
26012 | flag_N = res >> 8; |
26013 | DREGu16((Opcode >> 9) & 7) = res; |
26014 | POST_IO |
26015 | RET(14) |
26016 | } |
26017 | |
26018 | // ORaD |
26019 | OPCODE(0x807C) |
26020 | { |
26021 | u32 adr, res; |
26022 | u32 src, dst; |
26023 | |
26024 | FETCH_WORD(src); |
26025 | res = DREGu16((Opcode >> 9) & 7); |
26026 | res |= src; |
26027 | flag_C = 0; |
26028 | flag_V = 0; |
26029 | flag_NotZ = res; |
26030 | flag_N = res >> 8; |
26031 | DREGu16((Opcode >> 9) & 7) = res; |
26032 | RET(8) |
26033 | } |
26034 | |
26035 | // ORaD |
26036 | OPCODE(0x805F) |
26037 | { |
26038 | u32 adr, res; |
26039 | u32 src, dst; |
26040 | |
26041 | adr = AREG(7); |
26042 | AREG(7) += 2; |
26043 | PRE_IO |
26044 | READ_WORD_F(adr, src) |
26045 | res = DREGu16((Opcode >> 9) & 7); |
26046 | res |= src; |
26047 | flag_C = 0; |
26048 | flag_V = 0; |
26049 | flag_NotZ = res; |
26050 | flag_N = res >> 8; |
26051 | DREGu16((Opcode >> 9) & 7) = res; |
26052 | POST_IO |
26053 | RET(8) |
26054 | } |
26055 | |
26056 | // ORaD |
26057 | OPCODE(0x8067) |
26058 | { |
26059 | u32 adr, res; |
26060 | u32 src, dst; |
26061 | |
26062 | adr = AREG(7) - 2; |
26063 | AREG(7) = adr; |
26064 | PRE_IO |
26065 | READ_WORD_F(adr, src) |
26066 | res = DREGu16((Opcode >> 9) & 7); |
26067 | res |= src; |
26068 | flag_C = 0; |
26069 | flag_V = 0; |
26070 | flag_NotZ = res; |
26071 | flag_N = res >> 8; |
26072 | DREGu16((Opcode >> 9) & 7) = res; |
26073 | POST_IO |
26074 | RET(10) |
26075 | } |
26076 | |
26077 | // ORaD |
26078 | OPCODE(0x8080) |
26079 | { |
26080 | u32 adr, res; |
26081 | u32 src, dst; |
26082 | |
26083 | src = DREGu32((Opcode >> 0) & 7); |
26084 | res = DREGu32((Opcode >> 9) & 7); |
26085 | res |= src; |
26086 | flag_C = 0; |
26087 | flag_V = 0; |
26088 | flag_NotZ = res; |
26089 | flag_N = res >> 24; |
26090 | DREGu32((Opcode >> 9) & 7) = res; |
26091 | RET(8) |
26092 | } |
26093 | |
26094 | // ORaD |
26095 | OPCODE(0x8090) |
26096 | { |
26097 | u32 adr, res; |
26098 | u32 src, dst; |
26099 | |
26100 | adr = AREG((Opcode >> 0) & 7); |
26101 | PRE_IO |
26102 | READ_LONG_F(adr, src) |
26103 | res = DREGu32((Opcode >> 9) & 7); |
26104 | res |= src; |
26105 | flag_C = 0; |
26106 | flag_V = 0; |
26107 | flag_NotZ = res; |
26108 | flag_N = res >> 24; |
26109 | DREGu32((Opcode >> 9) & 7) = res; |
26110 | POST_IO |
26111 | RET(14) |
26112 | } |
26113 | |
26114 | // ORaD |
26115 | OPCODE(0x8098) |
26116 | { |
26117 | u32 adr, res; |
26118 | u32 src, dst; |
26119 | |
26120 | adr = AREG((Opcode >> 0) & 7); |
26121 | AREG((Opcode >> 0) & 7) += 4; |
26122 | PRE_IO |
26123 | READ_LONG_F(adr, src) |
26124 | res = DREGu32((Opcode >> 9) & 7); |
26125 | res |= src; |
26126 | flag_C = 0; |
26127 | flag_V = 0; |
26128 | flag_NotZ = res; |
26129 | flag_N = res >> 24; |
26130 | DREGu32((Opcode >> 9) & 7) = res; |
26131 | POST_IO |
26132 | RET(14) |
26133 | } |
26134 | |
26135 | // ORaD |
26136 | OPCODE(0x80A0) |
26137 | { |
26138 | u32 adr, res; |
26139 | u32 src, dst; |
26140 | |
26141 | adr = AREG((Opcode >> 0) & 7) - 4; |
26142 | AREG((Opcode >> 0) & 7) = adr; |
26143 | PRE_IO |
26144 | READ_LONG_F(adr, src) |
26145 | res = DREGu32((Opcode >> 9) & 7); |
26146 | res |= src; |
26147 | flag_C = 0; |
26148 | flag_V = 0; |
26149 | flag_NotZ = res; |
26150 | flag_N = res >> 24; |
26151 | DREGu32((Opcode >> 9) & 7) = res; |
26152 | POST_IO |
26153 | RET(16) |
26154 | } |
26155 | |
26156 | // ORaD |
26157 | OPCODE(0x80A8) |
26158 | { |
26159 | u32 adr, res; |
26160 | u32 src, dst; |
26161 | |
26162 | FETCH_SWORD(adr); |
26163 | adr += AREG((Opcode >> 0) & 7); |
26164 | PRE_IO |
26165 | READ_LONG_F(adr, src) |
26166 | res = DREGu32((Opcode >> 9) & 7); |
26167 | res |= src; |
26168 | flag_C = 0; |
26169 | flag_V = 0; |
26170 | flag_NotZ = res; |
26171 | flag_N = res >> 24; |
26172 | DREGu32((Opcode >> 9) & 7) = res; |
26173 | POST_IO |
26174 | RET(18) |
26175 | } |
26176 | |
26177 | // ORaD |
26178 | OPCODE(0x80B0) |
26179 | { |
26180 | u32 adr, res; |
26181 | u32 src, dst; |
26182 | |
26183 | adr = AREG((Opcode >> 0) & 7); |
26184 | DECODE_EXT_WORD |
26185 | PRE_IO |
26186 | READ_LONG_F(adr, src) |
26187 | res = DREGu32((Opcode >> 9) & 7); |
26188 | res |= src; |
26189 | flag_C = 0; |
26190 | flag_V = 0; |
26191 | flag_NotZ = res; |
26192 | flag_N = res >> 24; |
26193 | DREGu32((Opcode >> 9) & 7) = res; |
26194 | POST_IO |
26195 | RET(20) |
26196 | } |
26197 | |
26198 | // ORaD |
26199 | OPCODE(0x80B8) |
26200 | { |
26201 | u32 adr, res; |
26202 | u32 src, dst; |
26203 | |
26204 | FETCH_SWORD(adr); |
26205 | PRE_IO |
26206 | READ_LONG_F(adr, src) |
26207 | res = DREGu32((Opcode >> 9) & 7); |
26208 | res |= src; |
26209 | flag_C = 0; |
26210 | flag_V = 0; |
26211 | flag_NotZ = res; |
26212 | flag_N = res >> 24; |
26213 | DREGu32((Opcode >> 9) & 7) = res; |
26214 | POST_IO |
26215 | RET(18) |
26216 | } |
26217 | |
26218 | // ORaD |
26219 | OPCODE(0x80B9) |
26220 | { |
26221 | u32 adr, res; |
26222 | u32 src, dst; |
26223 | |
26224 | FETCH_LONG(adr); |
26225 | PRE_IO |
26226 | READ_LONG_F(adr, src) |
26227 | res = DREGu32((Opcode >> 9) & 7); |
26228 | res |= src; |
26229 | flag_C = 0; |
26230 | flag_V = 0; |
26231 | flag_NotZ = res; |
26232 | flag_N = res >> 24; |
26233 | DREGu32((Opcode >> 9) & 7) = res; |
26234 | POST_IO |
26235 | RET(22) |
26236 | } |
26237 | |
26238 | // ORaD |
26239 | OPCODE(0x80BA) |
26240 | { |
26241 | u32 adr, res; |
26242 | u32 src, dst; |
26243 | |
26244 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
26245 | PC++; |
26246 | PRE_IO |
26247 | READ_LONG_F(adr, src) |
26248 | res = DREGu32((Opcode >> 9) & 7); |
26249 | res |= src; |
26250 | flag_C = 0; |
26251 | flag_V = 0; |
26252 | flag_NotZ = res; |
26253 | flag_N = res >> 24; |
26254 | DREGu32((Opcode >> 9) & 7) = res; |
26255 | POST_IO |
26256 | RET(18) |
26257 | } |
26258 | |
26259 | // ORaD |
26260 | OPCODE(0x80BB) |
26261 | { |
26262 | u32 adr, res; |
26263 | u32 src, dst; |
26264 | |
26265 | adr = (u32)(PC) - BasePC; |
26266 | DECODE_EXT_WORD |
26267 | PRE_IO |
26268 | READ_LONG_F(adr, src) |
26269 | res = DREGu32((Opcode >> 9) & 7); |
26270 | res |= src; |
26271 | flag_C = 0; |
26272 | flag_V = 0; |
26273 | flag_NotZ = res; |
26274 | flag_N = res >> 24; |
26275 | DREGu32((Opcode >> 9) & 7) = res; |
26276 | POST_IO |
26277 | RET(20) |
26278 | } |
26279 | |
26280 | // ORaD |
26281 | OPCODE(0x80BC) |
26282 | { |
26283 | u32 adr, res; |
26284 | u32 src, dst; |
26285 | |
26286 | FETCH_LONG(src); |
26287 | res = DREGu32((Opcode >> 9) & 7); |
26288 | res |= src; |
26289 | flag_C = 0; |
26290 | flag_V = 0; |
26291 | flag_NotZ = res; |
26292 | flag_N = res >> 24; |
26293 | DREGu32((Opcode >> 9) & 7) = res; |
26294 | RET(16) |
26295 | } |
26296 | |
26297 | // ORaD |
26298 | OPCODE(0x809F) |
26299 | { |
26300 | u32 adr, res; |
26301 | u32 src, dst; |
26302 | |
26303 | adr = AREG(7); |
26304 | AREG(7) += 4; |
26305 | PRE_IO |
26306 | READ_LONG_F(adr, src) |
26307 | res = DREGu32((Opcode >> 9) & 7); |
26308 | res |= src; |
26309 | flag_C = 0; |
26310 | flag_V = 0; |
26311 | flag_NotZ = res; |
26312 | flag_N = res >> 24; |
26313 | DREGu32((Opcode >> 9) & 7) = res; |
26314 | POST_IO |
26315 | RET(14) |
26316 | } |
26317 | |
26318 | // ORaD |
26319 | OPCODE(0x80A7) |
26320 | { |
26321 | u32 adr, res; |
26322 | u32 src, dst; |
26323 | |
26324 | adr = AREG(7) - 4; |
26325 | AREG(7) = adr; |
26326 | PRE_IO |
26327 | READ_LONG_F(adr, src) |
26328 | res = DREGu32((Opcode >> 9) & 7); |
26329 | res |= src; |
26330 | flag_C = 0; |
26331 | flag_V = 0; |
26332 | flag_NotZ = res; |
26333 | flag_N = res >> 24; |
26334 | DREGu32((Opcode >> 9) & 7) = res; |
26335 | POST_IO |
26336 | RET(16) |
26337 | } |
26338 | |
26339 | // ORDa |
26340 | OPCODE(0x8110) |
26341 | { |
26342 | u32 adr, res; |
26343 | u32 src, dst; |
26344 | |
26345 | src = DREGu8((Opcode >> 9) & 7); |
26346 | adr = AREG((Opcode >> 0) & 7); |
26347 | PRE_IO |
26348 | READ_BYTE_F(adr, res) |
26349 | res |= src; |
26350 | flag_C = 0; |
26351 | flag_V = 0; |
26352 | flag_NotZ = res; |
26353 | flag_N = res; |
26354 | WRITE_BYTE_F(adr, res) |
26355 | POST_IO |
26356 | RET(12) |
26357 | } |
26358 | |
26359 | // ORDa |
26360 | OPCODE(0x8118) |
26361 | { |
26362 | u32 adr, res; |
26363 | u32 src, dst; |
26364 | |
26365 | src = DREGu8((Opcode >> 9) & 7); |
26366 | adr = AREG((Opcode >> 0) & 7); |
26367 | AREG((Opcode >> 0) & 7) += 1; |
26368 | PRE_IO |
26369 | READ_BYTE_F(adr, res) |
26370 | res |= src; |
26371 | flag_C = 0; |
26372 | flag_V = 0; |
26373 | flag_NotZ = res; |
26374 | flag_N = res; |
26375 | WRITE_BYTE_F(adr, res) |
26376 | POST_IO |
26377 | RET(12) |
26378 | } |
26379 | |
26380 | // ORDa |
26381 | OPCODE(0x8120) |
26382 | { |
26383 | u32 adr, res; |
26384 | u32 src, dst; |
26385 | |
26386 | src = DREGu8((Opcode >> 9) & 7); |
26387 | adr = AREG((Opcode >> 0) & 7) - 1; |
26388 | AREG((Opcode >> 0) & 7) = adr; |
26389 | PRE_IO |
26390 | READ_BYTE_F(adr, res) |
26391 | res |= src; |
26392 | flag_C = 0; |
26393 | flag_V = 0; |
26394 | flag_NotZ = res; |
26395 | flag_N = res; |
26396 | WRITE_BYTE_F(adr, res) |
26397 | POST_IO |
26398 | RET(14) |
26399 | } |
26400 | |
26401 | // ORDa |
26402 | OPCODE(0x8128) |
26403 | { |
26404 | u32 adr, res; |
26405 | u32 src, dst; |
26406 | |
26407 | src = DREGu8((Opcode >> 9) & 7); |
26408 | FETCH_SWORD(adr); |
26409 | adr += AREG((Opcode >> 0) & 7); |
26410 | PRE_IO |
26411 | READ_BYTE_F(adr, res) |
26412 | res |= src; |
26413 | flag_C = 0; |
26414 | flag_V = 0; |
26415 | flag_NotZ = res; |
26416 | flag_N = res; |
26417 | WRITE_BYTE_F(adr, res) |
26418 | POST_IO |
26419 | RET(16) |
26420 | } |
26421 | |
26422 | // ORDa |
26423 | OPCODE(0x8130) |
26424 | { |
26425 | u32 adr, res; |
26426 | u32 src, dst; |
26427 | |
26428 | src = DREGu8((Opcode >> 9) & 7); |
26429 | adr = AREG((Opcode >> 0) & 7); |
26430 | DECODE_EXT_WORD |
26431 | PRE_IO |
26432 | READ_BYTE_F(adr, res) |
26433 | res |= src; |
26434 | flag_C = 0; |
26435 | flag_V = 0; |
26436 | flag_NotZ = res; |
26437 | flag_N = res; |
26438 | WRITE_BYTE_F(adr, res) |
26439 | POST_IO |
26440 | RET(18) |
26441 | } |
26442 | |
26443 | // ORDa |
26444 | OPCODE(0x8138) |
26445 | { |
26446 | u32 adr, res; |
26447 | u32 src, dst; |
26448 | |
26449 | src = DREGu8((Opcode >> 9) & 7); |
26450 | FETCH_SWORD(adr); |
26451 | PRE_IO |
26452 | READ_BYTE_F(adr, res) |
26453 | res |= src; |
26454 | flag_C = 0; |
26455 | flag_V = 0; |
26456 | flag_NotZ = res; |
26457 | flag_N = res; |
26458 | WRITE_BYTE_F(adr, res) |
26459 | POST_IO |
26460 | RET(16) |
26461 | } |
26462 | |
26463 | // ORDa |
26464 | OPCODE(0x8139) |
26465 | { |
26466 | u32 adr, res; |
26467 | u32 src, dst; |
26468 | |
26469 | src = DREGu8((Opcode >> 9) & 7); |
26470 | FETCH_LONG(adr); |
26471 | PRE_IO |
26472 | READ_BYTE_F(adr, res) |
26473 | res |= src; |
26474 | flag_C = 0; |
26475 | flag_V = 0; |
26476 | flag_NotZ = res; |
26477 | flag_N = res; |
26478 | WRITE_BYTE_F(adr, res) |
26479 | POST_IO |
26480 | RET(20) |
26481 | } |
26482 | |
26483 | // ORDa |
26484 | OPCODE(0x811F) |
26485 | { |
26486 | u32 adr, res; |
26487 | u32 src, dst; |
26488 | |
26489 | src = DREGu8((Opcode >> 9) & 7); |
26490 | adr = AREG(7); |
26491 | AREG(7) += 2; |
26492 | PRE_IO |
26493 | READ_BYTE_F(adr, res) |
26494 | res |= src; |
26495 | flag_C = 0; |
26496 | flag_V = 0; |
26497 | flag_NotZ = res; |
26498 | flag_N = res; |
26499 | WRITE_BYTE_F(adr, res) |
26500 | POST_IO |
26501 | RET(12) |
26502 | } |
26503 | |
26504 | // ORDa |
26505 | OPCODE(0x8127) |
26506 | { |
26507 | u32 adr, res; |
26508 | u32 src, dst; |
26509 | |
26510 | src = DREGu8((Opcode >> 9) & 7); |
26511 | adr = AREG(7) - 2; |
26512 | AREG(7) = adr; |
26513 | PRE_IO |
26514 | READ_BYTE_F(adr, res) |
26515 | res |= src; |
26516 | flag_C = 0; |
26517 | flag_V = 0; |
26518 | flag_NotZ = res; |
26519 | flag_N = res; |
26520 | WRITE_BYTE_F(adr, res) |
26521 | POST_IO |
26522 | RET(14) |
26523 | } |
26524 | |
26525 | // ORDa |
26526 | OPCODE(0x8150) |
26527 | { |
26528 | u32 adr, res; |
26529 | u32 src, dst; |
26530 | |
26531 | src = DREGu16((Opcode >> 9) & 7); |
26532 | adr = AREG((Opcode >> 0) & 7); |
26533 | PRE_IO |
26534 | READ_WORD_F(adr, res) |
26535 | res |= src; |
26536 | flag_C = 0; |
26537 | flag_V = 0; |
26538 | flag_NotZ = res; |
26539 | flag_N = res >> 8; |
26540 | WRITE_WORD_F(adr, res) |
26541 | POST_IO |
26542 | RET(12) |
26543 | } |
26544 | |
26545 | // ORDa |
26546 | OPCODE(0x8158) |
26547 | { |
26548 | u32 adr, res; |
26549 | u32 src, dst; |
26550 | |
26551 | src = DREGu16((Opcode >> 9) & 7); |
26552 | adr = AREG((Opcode >> 0) & 7); |
26553 | AREG((Opcode >> 0) & 7) += 2; |
26554 | PRE_IO |
26555 | READ_WORD_F(adr, res) |
26556 | res |= src; |
26557 | flag_C = 0; |
26558 | flag_V = 0; |
26559 | flag_NotZ = res; |
26560 | flag_N = res >> 8; |
26561 | WRITE_WORD_F(adr, res) |
26562 | POST_IO |
26563 | RET(12) |
26564 | } |
26565 | |
26566 | // ORDa |
26567 | OPCODE(0x8160) |
26568 | { |
26569 | u32 adr, res; |
26570 | u32 src, dst; |
26571 | |
26572 | src = DREGu16((Opcode >> 9) & 7); |
26573 | adr = AREG((Opcode >> 0) & 7) - 2; |
26574 | AREG((Opcode >> 0) & 7) = adr; |
26575 | PRE_IO |
26576 | READ_WORD_F(adr, res) |
26577 | res |= src; |
26578 | flag_C = 0; |
26579 | flag_V = 0; |
26580 | flag_NotZ = res; |
26581 | flag_N = res >> 8; |
26582 | WRITE_WORD_F(adr, res) |
26583 | POST_IO |
26584 | RET(14) |
26585 | } |
26586 | |
26587 | // ORDa |
26588 | OPCODE(0x8168) |
26589 | { |
26590 | u32 adr, res; |
26591 | u32 src, dst; |
26592 | |
26593 | src = DREGu16((Opcode >> 9) & 7); |
26594 | FETCH_SWORD(adr); |
26595 | adr += AREG((Opcode >> 0) & 7); |
26596 | PRE_IO |
26597 | READ_WORD_F(adr, res) |
26598 | res |= src; |
26599 | flag_C = 0; |
26600 | flag_V = 0; |
26601 | flag_NotZ = res; |
26602 | flag_N = res >> 8; |
26603 | WRITE_WORD_F(adr, res) |
26604 | POST_IO |
26605 | RET(16) |
26606 | } |
26607 | |
26608 | // ORDa |
26609 | OPCODE(0x8170) |
26610 | { |
26611 | u32 adr, res; |
26612 | u32 src, dst; |
26613 | |
26614 | src = DREGu16((Opcode >> 9) & 7); |
26615 | adr = AREG((Opcode >> 0) & 7); |
26616 | DECODE_EXT_WORD |
26617 | PRE_IO |
26618 | READ_WORD_F(adr, res) |
26619 | res |= src; |
26620 | flag_C = 0; |
26621 | flag_V = 0; |
26622 | flag_NotZ = res; |
26623 | flag_N = res >> 8; |
26624 | WRITE_WORD_F(adr, res) |
26625 | POST_IO |
26626 | RET(18) |
26627 | } |
26628 | |
26629 | // ORDa |
26630 | OPCODE(0x8178) |
26631 | { |
26632 | u32 adr, res; |
26633 | u32 src, dst; |
26634 | |
26635 | src = DREGu16((Opcode >> 9) & 7); |
26636 | FETCH_SWORD(adr); |
26637 | PRE_IO |
26638 | READ_WORD_F(adr, res) |
26639 | res |= src; |
26640 | flag_C = 0; |
26641 | flag_V = 0; |
26642 | flag_NotZ = res; |
26643 | flag_N = res >> 8; |
26644 | WRITE_WORD_F(adr, res) |
26645 | POST_IO |
26646 | RET(16) |
26647 | } |
26648 | |
26649 | // ORDa |
26650 | OPCODE(0x8179) |
26651 | { |
26652 | u32 adr, res; |
26653 | u32 src, dst; |
26654 | |
26655 | src = DREGu16((Opcode >> 9) & 7); |
26656 | FETCH_LONG(adr); |
26657 | PRE_IO |
26658 | READ_WORD_F(adr, res) |
26659 | res |= src; |
26660 | flag_C = 0; |
26661 | flag_V = 0; |
26662 | flag_NotZ = res; |
26663 | flag_N = res >> 8; |
26664 | WRITE_WORD_F(adr, res) |
26665 | POST_IO |
26666 | RET(20) |
26667 | } |
26668 | |
26669 | // ORDa |
26670 | OPCODE(0x815F) |
26671 | { |
26672 | u32 adr, res; |
26673 | u32 src, dst; |
26674 | |
26675 | src = DREGu16((Opcode >> 9) & 7); |
26676 | adr = AREG(7); |
26677 | AREG(7) += 2; |
26678 | PRE_IO |
26679 | READ_WORD_F(adr, res) |
26680 | res |= src; |
26681 | flag_C = 0; |
26682 | flag_V = 0; |
26683 | flag_NotZ = res; |
26684 | flag_N = res >> 8; |
26685 | WRITE_WORD_F(adr, res) |
26686 | POST_IO |
26687 | RET(12) |
26688 | } |
26689 | |
26690 | // ORDa |
26691 | OPCODE(0x8167) |
26692 | { |
26693 | u32 adr, res; |
26694 | u32 src, dst; |
26695 | |
26696 | src = DREGu16((Opcode >> 9) & 7); |
26697 | adr = AREG(7) - 2; |
26698 | AREG(7) = adr; |
26699 | PRE_IO |
26700 | READ_WORD_F(adr, res) |
26701 | res |= src; |
26702 | flag_C = 0; |
26703 | flag_V = 0; |
26704 | flag_NotZ = res; |
26705 | flag_N = res >> 8; |
26706 | WRITE_WORD_F(adr, res) |
26707 | POST_IO |
26708 | RET(14) |
26709 | } |
26710 | |
26711 | // ORDa |
26712 | OPCODE(0x8190) |
26713 | { |
26714 | u32 adr, res; |
26715 | u32 src, dst; |
26716 | |
26717 | src = DREGu32((Opcode >> 9) & 7); |
26718 | adr = AREG((Opcode >> 0) & 7); |
26719 | PRE_IO |
26720 | READ_LONG_F(adr, res) |
26721 | res |= src; |
26722 | flag_C = 0; |
26723 | flag_V = 0; |
26724 | flag_NotZ = res; |
26725 | flag_N = res >> 24; |
26726 | WRITE_LONG_F(adr, res) |
26727 | POST_IO |
26728 | RET(20) |
26729 | } |
26730 | |
26731 | // ORDa |
26732 | OPCODE(0x8198) |
26733 | { |
26734 | u32 adr, res; |
26735 | u32 src, dst; |
26736 | |
26737 | src = DREGu32((Opcode >> 9) & 7); |
26738 | adr = AREG((Opcode >> 0) & 7); |
26739 | AREG((Opcode >> 0) & 7) += 4; |
26740 | PRE_IO |
26741 | READ_LONG_F(adr, res) |
26742 | res |= src; |
26743 | flag_C = 0; |
26744 | flag_V = 0; |
26745 | flag_NotZ = res; |
26746 | flag_N = res >> 24; |
26747 | WRITE_LONG_F(adr, res) |
26748 | POST_IO |
26749 | RET(20) |
26750 | } |
26751 | |
26752 | // ORDa |
26753 | OPCODE(0x81A0) |
26754 | { |
26755 | u32 adr, res; |
26756 | u32 src, dst; |
26757 | |
26758 | src = DREGu32((Opcode >> 9) & 7); |
26759 | adr = AREG((Opcode >> 0) & 7) - 4; |
26760 | AREG((Opcode >> 0) & 7) = adr; |
26761 | PRE_IO |
26762 | READ_LONG_F(adr, res) |
26763 | res |= src; |
26764 | flag_C = 0; |
26765 | flag_V = 0; |
26766 | flag_NotZ = res; |
26767 | flag_N = res >> 24; |
26768 | WRITE_LONG_F(adr, res) |
26769 | POST_IO |
26770 | RET(22) |
26771 | } |
26772 | |
26773 | // ORDa |
26774 | OPCODE(0x81A8) |
26775 | { |
26776 | u32 adr, res; |
26777 | u32 src, dst; |
26778 | |
26779 | src = DREGu32((Opcode >> 9) & 7); |
26780 | FETCH_SWORD(adr); |
26781 | adr += AREG((Opcode >> 0) & 7); |
26782 | PRE_IO |
26783 | READ_LONG_F(adr, res) |
26784 | res |= src; |
26785 | flag_C = 0; |
26786 | flag_V = 0; |
26787 | flag_NotZ = res; |
26788 | flag_N = res >> 24; |
26789 | WRITE_LONG_F(adr, res) |
26790 | POST_IO |
26791 | RET(24) |
26792 | } |
26793 | |
26794 | // ORDa |
26795 | OPCODE(0x81B0) |
26796 | { |
26797 | u32 adr, res; |
26798 | u32 src, dst; |
26799 | |
26800 | src = DREGu32((Opcode >> 9) & 7); |
26801 | adr = AREG((Opcode >> 0) & 7); |
26802 | DECODE_EXT_WORD |
26803 | PRE_IO |
26804 | READ_LONG_F(adr, res) |
26805 | res |= src; |
26806 | flag_C = 0; |
26807 | flag_V = 0; |
26808 | flag_NotZ = res; |
26809 | flag_N = res >> 24; |
26810 | WRITE_LONG_F(adr, res) |
26811 | POST_IO |
26812 | RET(26) |
26813 | } |
26814 | |
26815 | // ORDa |
26816 | OPCODE(0x81B8) |
26817 | { |
26818 | u32 adr, res; |
26819 | u32 src, dst; |
26820 | |
26821 | src = DREGu32((Opcode >> 9) & 7); |
26822 | FETCH_SWORD(adr); |
26823 | PRE_IO |
26824 | READ_LONG_F(adr, res) |
26825 | res |= src; |
26826 | flag_C = 0; |
26827 | flag_V = 0; |
26828 | flag_NotZ = res; |
26829 | flag_N = res >> 24; |
26830 | WRITE_LONG_F(adr, res) |
26831 | POST_IO |
26832 | RET(24) |
26833 | } |
26834 | |
26835 | // ORDa |
26836 | OPCODE(0x81B9) |
26837 | { |
26838 | u32 adr, res; |
26839 | u32 src, dst; |
26840 | |
26841 | src = DREGu32((Opcode >> 9) & 7); |
26842 | FETCH_LONG(adr); |
26843 | PRE_IO |
26844 | READ_LONG_F(adr, res) |
26845 | res |= src; |
26846 | flag_C = 0; |
26847 | flag_V = 0; |
26848 | flag_NotZ = res; |
26849 | flag_N = res >> 24; |
26850 | WRITE_LONG_F(adr, res) |
26851 | POST_IO |
26852 | RET(28) |
26853 | } |
26854 | |
26855 | // ORDa |
26856 | OPCODE(0x819F) |
26857 | { |
26858 | u32 adr, res; |
26859 | u32 src, dst; |
26860 | |
26861 | src = DREGu32((Opcode >> 9) & 7); |
26862 | adr = AREG(7); |
26863 | AREG(7) += 4; |
26864 | PRE_IO |
26865 | READ_LONG_F(adr, res) |
26866 | res |= src; |
26867 | flag_C = 0; |
26868 | flag_V = 0; |
26869 | flag_NotZ = res; |
26870 | flag_N = res >> 24; |
26871 | WRITE_LONG_F(adr, res) |
26872 | POST_IO |
26873 | RET(20) |
26874 | } |
26875 | |
26876 | // ORDa |
26877 | OPCODE(0x81A7) |
26878 | { |
26879 | u32 adr, res; |
26880 | u32 src, dst; |
26881 | |
26882 | src = DREGu32((Opcode >> 9) & 7); |
26883 | adr = AREG(7) - 4; |
26884 | AREG(7) = adr; |
26885 | PRE_IO |
26886 | READ_LONG_F(adr, res) |
26887 | res |= src; |
26888 | flag_C = 0; |
26889 | flag_V = 0; |
26890 | flag_NotZ = res; |
26891 | flag_N = res >> 24; |
26892 | WRITE_LONG_F(adr, res) |
26893 | POST_IO |
26894 | RET(22) |
26895 | } |
26896 | |
26897 | // SBCD |
26898 | OPCODE(0x8100) |
26899 | { |
26900 | u32 adr, res; |
26901 | u32 src, dst; |
26902 | |
26903 | src = DREGu8((Opcode >> 0) & 7); |
26904 | dst = DREGu8((Opcode >> 9) & 7); |
26905 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26906 | if (res > 9) res -= 6; |
26907 | res += (dst & 0xF0) - (src & 0xF0); |
26908 | if (res > 0x99) |
26909 | { |
26910 | res += 0xA0; |
26911 | flag_X = flag_C = M68K_SR_C; |
26912 | } |
26913 | else flag_X = flag_C = 0; |
26914 | flag_NotZ |= res & 0xFF; |
26915 | flag_N = res; |
26916 | DREGu8((Opcode >> 9) & 7) = res; |
26917 | RET(6) |
26918 | } |
26919 | |
26920 | // SBCDM |
26921 | OPCODE(0x8108) |
26922 | { |
26923 | u32 adr, res; |
26924 | u32 src, dst; |
26925 | |
26926 | adr = AREG((Opcode >> 0) & 7) - 1; |
26927 | AREG((Opcode >> 0) & 7) = adr; |
26928 | PRE_IO |
26929 | READ_BYTE_F(adr, src) |
26930 | adr = AREG((Opcode >> 9) & 7) - 1; |
26931 | AREG((Opcode >> 9) & 7) = adr; |
26932 | READ_BYTE_F(adr, dst) |
26933 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26934 | if (res > 9) res -= 6; |
26935 | res += (dst & 0xF0) - (src & 0xF0); |
26936 | if (res > 0x99) |
26937 | { |
26938 | res += 0xA0; |
26939 | flag_X = flag_C = M68K_SR_C; |
26940 | } |
26941 | else flag_X = flag_C = 0; |
26942 | flag_NotZ |= res & 0xFF; |
26943 | flag_N = res; |
26944 | WRITE_BYTE_F(adr, res) |
26945 | POST_IO |
26946 | RET(18) |
26947 | } |
26948 | |
26949 | // SBCD7M |
26950 | OPCODE(0x810F) |
26951 | { |
26952 | u32 adr, res; |
26953 | u32 src, dst; |
26954 | |
26955 | adr = AREG(7) - 2; |
26956 | AREG(7) = adr; |
26957 | PRE_IO |
26958 | READ_BYTE_F(adr, src) |
26959 | adr = AREG((Opcode >> 9) & 7) - 1; |
26960 | AREG((Opcode >> 9) & 7) = adr; |
26961 | READ_BYTE_F(adr, dst) |
26962 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26963 | if (res > 9) res -= 6; |
26964 | res += (dst & 0xF0) - (src & 0xF0); |
26965 | if (res > 0x99) |
26966 | { |
26967 | res += 0xA0; |
26968 | flag_X = flag_C = M68K_SR_C; |
26969 | } |
26970 | else flag_X = flag_C = 0; |
26971 | flag_NotZ |= res & 0xFF; |
26972 | flag_N = res; |
26973 | WRITE_BYTE_F(adr, res) |
26974 | POST_IO |
26975 | RET(18) |
26976 | } |
26977 | |
26978 | // SBCDM7 |
26979 | OPCODE(0x8F08) |
26980 | { |
26981 | u32 adr, res; |
26982 | u32 src, dst; |
26983 | |
26984 | adr = AREG((Opcode >> 0) & 7) - 1; |
26985 | AREG((Opcode >> 0) & 7) = adr; |
26986 | PRE_IO |
26987 | READ_BYTE_F(adr, src) |
26988 | adr = AREG(7) - 2; |
26989 | AREG(7) = adr; |
26990 | READ_BYTE_F(adr, dst) |
26991 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26992 | if (res > 9) res -= 6; |
26993 | res += (dst & 0xF0) - (src & 0xF0); |
26994 | if (res > 0x99) |
26995 | { |
26996 | res += 0xA0; |
26997 | flag_X = flag_C = M68K_SR_C; |
26998 | } |
26999 | else flag_X = flag_C = 0; |
27000 | flag_NotZ |= res & 0xFF; |
27001 | flag_N = res; |
27002 | WRITE_BYTE_F(adr, res) |
27003 | POST_IO |
27004 | RET(18) |
27005 | } |
27006 | |
27007 | // SBCD7M7 |
27008 | OPCODE(0x8F0F) |
27009 | { |
27010 | u32 adr, res; |
27011 | u32 src, dst; |
27012 | |
27013 | adr = AREG(7) - 2; |
27014 | AREG(7) = adr; |
27015 | PRE_IO |
27016 | READ_BYTE_F(adr, src) |
27017 | adr = AREG(7) - 2; |
27018 | AREG(7) = adr; |
27019 | READ_BYTE_F(adr, dst) |
27020 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
27021 | if (res > 9) res -= 6; |
27022 | res += (dst & 0xF0) - (src & 0xF0); |
27023 | if (res > 0x99) |
27024 | { |
27025 | res += 0xA0; |
27026 | flag_X = flag_C = M68K_SR_C; |
27027 | } |
27028 | else flag_X = flag_C = 0; |
27029 | flag_NotZ |= res & 0xFF; |
27030 | flag_N = res; |
27031 | WRITE_BYTE_F(adr, res) |
27032 | POST_IO |
27033 | RET(18) |
27034 | } |
27035 | |
27036 | // DIVU |
27037 | OPCODE(0x80C0) |
27038 | { |
27039 | u32 adr, res; |
27040 | u32 src, dst; |
27041 | |
27042 | src = DREGu16((Opcode >> 0) & 7); |
27043 | if (src == 0) |
27044 | { |
d0ae0cb4 |
27045 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27046 | #ifdef USE_CYCLONE_TIMING_DIV |
27047 | RET(140) |
27048 | #else |
27049 | RET(10) |
27050 | #endif |
27051 | } |
27052 | dst = DREGu32((Opcode >> 9) & 7); |
27053 | { |
27054 | u32 q, r; |
27055 | |
27056 | q = dst / src; |
27057 | r = dst % src; |
27058 | |
27059 | if (q & 0xFFFF0000) |
27060 | { |
27061 | flag_V = M68K_SR_V; |
27062 | #ifdef USE_CYCLONE_TIMING_DIV |
27063 | RET(140) |
27064 | #else |
27065 | RET(70) |
27066 | #endif |
27067 | } |
27068 | q &= 0x0000FFFF; |
27069 | flag_NotZ = q; |
27070 | flag_N = q >> 8; |
27071 | flag_V = flag_C = 0; |
27072 | res = q | (r << 16); |
27073 | DREGu32((Opcode >> 9) & 7) = res; |
27074 | } |
27075 | #ifdef USE_CYCLONE_TIMING_DIV |
27076 | RET(140) |
27077 | #else |
27078 | RET(90) |
27079 | #endif |
27080 | } |
27081 | |
27082 | // DIVU |
27083 | OPCODE(0x80D0) |
27084 | { |
27085 | u32 adr, res; |
27086 | u32 src, dst; |
27087 | |
27088 | adr = AREG((Opcode >> 0) & 7); |
27089 | PRE_IO |
27090 | READ_WORD_F(adr, src) |
27091 | if (src == 0) |
27092 | { |
d0ae0cb4 |
27093 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27094 | #ifdef USE_CYCLONE_TIMING_DIV |
27095 | RET(144) |
27096 | #else |
27097 | RET(14) |
27098 | #endif |
27099 | } |
27100 | dst = DREGu32((Opcode >> 9) & 7); |
27101 | { |
27102 | u32 q, r; |
27103 | |
27104 | q = dst / src; |
27105 | r = dst % src; |
27106 | |
27107 | if (q & 0xFFFF0000) |
27108 | { |
27109 | flag_V = M68K_SR_V; |
27110 | #ifdef USE_CYCLONE_TIMING_DIV |
27111 | RET(144) |
27112 | #else |
27113 | RET(74) |
27114 | #endif |
27115 | } |
27116 | q &= 0x0000FFFF; |
27117 | flag_NotZ = q; |
27118 | flag_N = q >> 8; |
27119 | flag_V = flag_C = 0; |
27120 | res = q | (r << 16); |
27121 | DREGu32((Opcode >> 9) & 7) = res; |
27122 | } |
27123 | #ifdef USE_CYCLONE_TIMING_DIV |
27124 | RET(144) |
27125 | #else |
27126 | RET(94) |
27127 | #endif |
27128 | } |
27129 | |
27130 | // DIVU |
27131 | OPCODE(0x80D8) |
27132 | { |
27133 | u32 adr, res; |
27134 | u32 src, dst; |
27135 | |
27136 | adr = AREG((Opcode >> 0) & 7); |
27137 | AREG((Opcode >> 0) & 7) += 2; |
27138 | PRE_IO |
27139 | READ_WORD_F(adr, src) |
27140 | if (src == 0) |
27141 | { |
d0ae0cb4 |
27142 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27143 | #ifdef USE_CYCLONE_TIMING_DIV |
27144 | RET(144) |
27145 | #else |
27146 | RET(14) |
27147 | #endif |
27148 | } |
27149 | dst = DREGu32((Opcode >> 9) & 7); |
27150 | { |
27151 | u32 q, r; |
27152 | |
27153 | q = dst / src; |
27154 | r = dst % src; |
27155 | |
27156 | if (q & 0xFFFF0000) |
27157 | { |
27158 | flag_V = M68K_SR_V; |
27159 | #ifdef USE_CYCLONE_TIMING_DIV |
27160 | RET(144) |
27161 | #else |
27162 | RET(74) |
27163 | #endif |
27164 | } |
27165 | q &= 0x0000FFFF; |
27166 | flag_NotZ = q; |
27167 | flag_N = q >> 8; |
27168 | flag_V = flag_C = 0; |
27169 | res = q | (r << 16); |
27170 | DREGu32((Opcode >> 9) & 7) = res; |
27171 | } |
27172 | #ifdef USE_CYCLONE_TIMING_DIV |
27173 | RET(144) |
27174 | #else |
27175 | RET(94) |
27176 | #endif |
27177 | } |
27178 | |
27179 | // DIVU |
27180 | OPCODE(0x80E0) |
27181 | { |
27182 | u32 adr, res; |
27183 | u32 src, dst; |
27184 | |
27185 | adr = AREG((Opcode >> 0) & 7) - 2; |
27186 | AREG((Opcode >> 0) & 7) = adr; |
27187 | PRE_IO |
27188 | READ_WORD_F(adr, src) |
27189 | if (src == 0) |
27190 | { |
d0ae0cb4 |
27191 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27192 | #ifdef USE_CYCLONE_TIMING_DIV |
27193 | RET(146) |
27194 | #else |
27195 | RET(16) |
27196 | #endif |
27197 | } |
27198 | dst = DREGu32((Opcode >> 9) & 7); |
27199 | { |
27200 | u32 q, r; |
27201 | |
27202 | q = dst / src; |
27203 | r = dst % src; |
27204 | |
27205 | if (q & 0xFFFF0000) |
27206 | { |
27207 | flag_V = M68K_SR_V; |
27208 | #ifdef USE_CYCLONE_TIMING_DIV |
27209 | RET(146) |
27210 | #else |
27211 | RET(76) |
27212 | #endif |
27213 | } |
27214 | q &= 0x0000FFFF; |
27215 | flag_NotZ = q; |
27216 | flag_N = q >> 8; |
27217 | flag_V = flag_C = 0; |
27218 | res = q | (r << 16); |
27219 | DREGu32((Opcode >> 9) & 7) = res; |
27220 | } |
27221 | #ifdef USE_CYCLONE_TIMING_DIV |
27222 | RET(146) |
27223 | #else |
27224 | RET(96) |
27225 | #endif |
27226 | } |
27227 | |
27228 | // DIVU |
27229 | OPCODE(0x80E8) |
27230 | { |
27231 | u32 adr, res; |
27232 | u32 src, dst; |
27233 | |
27234 | FETCH_SWORD(adr); |
27235 | adr += AREG((Opcode >> 0) & 7); |
27236 | PRE_IO |
27237 | READ_WORD_F(adr, src) |
27238 | if (src == 0) |
27239 | { |
d0ae0cb4 |
27240 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27241 | #ifdef USE_CYCLONE_TIMING_DIV |
27242 | RET(148) |
27243 | #else |
27244 | RET(18) |
27245 | #endif |
27246 | } |
27247 | dst = DREGu32((Opcode >> 9) & 7); |
27248 | { |
27249 | u32 q, r; |
27250 | |
27251 | q = dst / src; |
27252 | r = dst % src; |
27253 | |
27254 | if (q & 0xFFFF0000) |
27255 | { |
27256 | flag_V = M68K_SR_V; |
27257 | #ifdef USE_CYCLONE_TIMING_DIV |
27258 | RET(148) |
27259 | #else |
27260 | RET(78) |
27261 | #endif |
27262 | } |
27263 | q &= 0x0000FFFF; |
27264 | flag_NotZ = q; |
27265 | flag_N = q >> 8; |
27266 | flag_V = flag_C = 0; |
27267 | res = q | (r << 16); |
27268 | DREGu32((Opcode >> 9) & 7) = res; |
27269 | } |
27270 | #ifdef USE_CYCLONE_TIMING_DIV |
27271 | RET(148) |
27272 | #else |
27273 | RET(98) |
27274 | #endif |
27275 | } |
27276 | |
27277 | // DIVU |
27278 | OPCODE(0x80F0) |
27279 | { |
27280 | u32 adr, res; |
27281 | u32 src, dst; |
27282 | |
27283 | adr = AREG((Opcode >> 0) & 7); |
27284 | DECODE_EXT_WORD |
27285 | PRE_IO |
27286 | READ_WORD_F(adr, src) |
27287 | if (src == 0) |
27288 | { |
d0ae0cb4 |
27289 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27290 | #ifdef USE_CYCLONE_TIMING_DIV |
27291 | RET(150) |
27292 | #else |
27293 | RET(20) |
27294 | #endif |
27295 | } |
27296 | dst = DREGu32((Opcode >> 9) & 7); |
27297 | { |
27298 | u32 q, r; |
27299 | |
27300 | q = dst / src; |
27301 | r = dst % src; |
27302 | |
27303 | if (q & 0xFFFF0000) |
27304 | { |
27305 | flag_V = M68K_SR_V; |
27306 | #ifdef USE_CYCLONE_TIMING_DIV |
27307 | RET(150) |
27308 | #else |
27309 | RET(80) |
27310 | #endif |
27311 | } |
27312 | q &= 0x0000FFFF; |
27313 | flag_NotZ = q; |
27314 | flag_N = q >> 8; |
27315 | flag_V = flag_C = 0; |
27316 | res = q | (r << 16); |
27317 | DREGu32((Opcode >> 9) & 7) = res; |
27318 | } |
27319 | #ifdef USE_CYCLONE_TIMING_DIV |
27320 | RET(150) |
27321 | #else |
27322 | RET(100) |
27323 | #endif |
27324 | } |
27325 | |
27326 | // DIVU |
27327 | OPCODE(0x80F8) |
27328 | { |
27329 | u32 adr, res; |
27330 | u32 src, dst; |
27331 | |
27332 | FETCH_SWORD(adr); |
27333 | PRE_IO |
27334 | READ_WORD_F(adr, src) |
27335 | if (src == 0) |
27336 | { |
d0ae0cb4 |
27337 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27338 | #ifdef USE_CYCLONE_TIMING_DIV |
27339 | RET(148) |
27340 | #else |
27341 | RET(18) |
27342 | #endif |
27343 | } |
27344 | dst = DREGu32((Opcode >> 9) & 7); |
27345 | { |
27346 | u32 q, r; |
27347 | |
27348 | q = dst / src; |
27349 | r = dst % src; |
27350 | |
27351 | if (q & 0xFFFF0000) |
27352 | { |
27353 | flag_V = M68K_SR_V; |
27354 | #ifdef USE_CYCLONE_TIMING_DIV |
27355 | RET(148) |
27356 | #else |
27357 | RET(78) |
27358 | #endif |
27359 | } |
27360 | q &= 0x0000FFFF; |
27361 | flag_NotZ = q; |
27362 | flag_N = q >> 8; |
27363 | flag_V = flag_C = 0; |
27364 | res = q | (r << 16); |
27365 | DREGu32((Opcode >> 9) & 7) = res; |
27366 | } |
27367 | #ifdef USE_CYCLONE_TIMING_DIV |
27368 | RET(148) |
27369 | #else |
27370 | RET(98) |
27371 | #endif |
27372 | } |
27373 | |
27374 | // DIVU |
27375 | OPCODE(0x80F9) |
27376 | { |
27377 | u32 adr, res; |
27378 | u32 src, dst; |
27379 | |
27380 | FETCH_LONG(adr); |
27381 | PRE_IO |
27382 | READ_WORD_F(adr, src) |
27383 | if (src == 0) |
27384 | { |
d0ae0cb4 |
27385 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27386 | #ifdef USE_CYCLONE_TIMING_DIV |
27387 | RET(162) |
27388 | #else |
27389 | RET(22) |
27390 | #endif |
27391 | } |
27392 | dst = DREGu32((Opcode >> 9) & 7); |
27393 | { |
27394 | u32 q, r; |
27395 | |
27396 | q = dst / src; |
27397 | r = dst % src; |
27398 | |
27399 | if (q & 0xFFFF0000) |
27400 | { |
27401 | flag_V = M68K_SR_V; |
27402 | #ifdef USE_CYCLONE_TIMING_DIV |
27403 | RET(162) |
27404 | #else |
27405 | RET(82) |
27406 | #endif |
27407 | } |
27408 | q &= 0x0000FFFF; |
27409 | flag_NotZ = q; |
27410 | flag_N = q >> 8; |
27411 | flag_V = flag_C = 0; |
27412 | res = q | (r << 16); |
27413 | DREGu32((Opcode >> 9) & 7) = res; |
27414 | } |
27415 | #ifdef USE_CYCLONE_TIMING_DIV |
27416 | RET(162) |
27417 | #else |
27418 | RET(102) |
27419 | #endif |
27420 | } |
27421 | |
27422 | // DIVU |
27423 | OPCODE(0x80FA) |
27424 | { |
27425 | u32 adr, res; |
27426 | u32 src, dst; |
27427 | |
27428 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
27429 | PC++; |
27430 | PRE_IO |
27431 | READ_WORD_F(adr, src) |
27432 | if (src == 0) |
27433 | { |
d0ae0cb4 |
27434 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27435 | #ifdef USE_CYCLONE_TIMING_DIV |
27436 | RET(148) |
27437 | #else |
27438 | RET(18) |
27439 | #endif |
27440 | } |
27441 | dst = DREGu32((Opcode >> 9) & 7); |
27442 | { |
27443 | u32 q, r; |
27444 | |
27445 | q = dst / src; |
27446 | r = dst % src; |
27447 | |
27448 | if (q & 0xFFFF0000) |
27449 | { |
27450 | flag_V = M68K_SR_V; |
27451 | #ifdef USE_CYCLONE_TIMING_DIV |
27452 | RET(148) |
27453 | #else |
27454 | RET(78) |
27455 | #endif |
27456 | } |
27457 | q &= 0x0000FFFF; |
27458 | flag_NotZ = q; |
27459 | flag_N = q >> 8; |
27460 | flag_V = flag_C = 0; |
27461 | res = q | (r << 16); |
27462 | DREGu32((Opcode >> 9) & 7) = res; |
27463 | } |
27464 | #ifdef USE_CYCLONE_TIMING_DIV |
27465 | RET(148) |
27466 | #else |
27467 | RET(98) |
27468 | #endif |
27469 | } |
27470 | |
27471 | // DIVU |
27472 | OPCODE(0x80FB) |
27473 | { |
27474 | u32 adr, res; |
27475 | u32 src, dst; |
27476 | |
27477 | adr = (u32)(PC) - BasePC; |
27478 | DECODE_EXT_WORD |
27479 | PRE_IO |
27480 | READ_WORD_F(adr, src) |
27481 | if (src == 0) |
27482 | { |
d0ae0cb4 |
27483 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27484 | #ifdef USE_CYCLONE_TIMING_DIV |
27485 | RET(160) |
27486 | #else |
27487 | RET(20) |
27488 | #endif |
27489 | } |
27490 | dst = DREGu32((Opcode >> 9) & 7); |
27491 | { |
27492 | u32 q, r; |
27493 | |
27494 | q = dst / src; |
27495 | r = dst % src; |
27496 | |
27497 | if (q & 0xFFFF0000) |
27498 | { |
27499 | flag_V = M68K_SR_V; |
27500 | #ifdef USE_CYCLONE_TIMING_DIV |
27501 | RET(160) |
27502 | #else |
27503 | RET(80) |
27504 | #endif |
27505 | } |
27506 | q &= 0x0000FFFF; |
27507 | flag_NotZ = q; |
27508 | flag_N = q >> 8; |
27509 | flag_V = flag_C = 0; |
27510 | res = q | (r << 16); |
27511 | DREGu32((Opcode >> 9) & 7) = res; |
27512 | } |
27513 | #ifdef USE_CYCLONE_TIMING_DIV |
27514 | RET(160) |
27515 | #else |
27516 | RET(100) |
27517 | #endif |
27518 | } |
27519 | |
27520 | // DIVU |
27521 | OPCODE(0x80FC) |
27522 | { |
27523 | u32 adr, res; |
27524 | u32 src, dst; |
27525 | |
27526 | FETCH_WORD(src); |
27527 | if (src == 0) |
27528 | { |
d0ae0cb4 |
27529 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27530 | #ifdef USE_CYCLONE_TIMING_DIV |
27531 | RET(144) |
27532 | #else |
27533 | RET(14) |
27534 | #endif |
27535 | } |
27536 | dst = DREGu32((Opcode >> 9) & 7); |
27537 | { |
27538 | u32 q, r; |
27539 | |
27540 | q = dst / src; |
27541 | r = dst % src; |
27542 | |
27543 | if (q & 0xFFFF0000) |
27544 | { |
27545 | flag_V = M68K_SR_V; |
27546 | #ifdef USE_CYCLONE_TIMING_DIV |
27547 | RET(144) |
27548 | #else |
27549 | RET(74) |
27550 | #endif |
27551 | } |
27552 | q &= 0x0000FFFF; |
27553 | flag_NotZ = q; |
27554 | flag_N = q >> 8; |
27555 | flag_V = flag_C = 0; |
27556 | res = q | (r << 16); |
27557 | DREGu32((Opcode >> 9) & 7) = res; |
27558 | } |
27559 | #ifdef USE_CYCLONE_TIMING_DIV |
27560 | RET(144) |
27561 | #else |
27562 | RET(94) |
27563 | #endif |
27564 | } |
27565 | |
27566 | // DIVU |
27567 | OPCODE(0x80DF) |
27568 | { |
27569 | u32 adr, res; |
27570 | u32 src, dst; |
27571 | |
27572 | adr = AREG(7); |
27573 | AREG(7) += 2; |
27574 | PRE_IO |
27575 | READ_WORD_F(adr, src) |
27576 | if (src == 0) |
27577 | { |
d0ae0cb4 |
27578 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27579 | #ifdef USE_CYCLONE_TIMING_DIV |
27580 | RET(144) |
27581 | #else |
27582 | RET(14) |
27583 | #endif |
27584 | } |
27585 | dst = DREGu32((Opcode >> 9) & 7); |
27586 | { |
27587 | u32 q, r; |
27588 | |
27589 | q = dst / src; |
27590 | r = dst % src; |
27591 | |
27592 | if (q & 0xFFFF0000) |
27593 | { |
27594 | flag_V = M68K_SR_V; |
27595 | #ifdef USE_CYCLONE_TIMING_DIV |
27596 | RET(144) |
27597 | #else |
27598 | RET(74) |
27599 | #endif |
27600 | } |
27601 | q &= 0x0000FFFF; |
27602 | flag_NotZ = q; |
27603 | flag_N = q >> 8; |
27604 | flag_V = flag_C = 0; |
27605 | res = q | (r << 16); |
27606 | DREGu32((Opcode >> 9) & 7) = res; |
27607 | } |
27608 | #ifdef USE_CYCLONE_TIMING_DIV |
27609 | RET(144) |
27610 | #else |
27611 | RET(94) |
27612 | #endif |
27613 | } |
27614 | |
27615 | // DIVU |
27616 | OPCODE(0x80E7) |
27617 | { |
27618 | u32 adr, res; |
27619 | u32 src, dst; |
27620 | |
27621 | adr = AREG(7) - 2; |
27622 | AREG(7) = adr; |
27623 | PRE_IO |
27624 | READ_WORD_F(adr, src) |
27625 | if (src == 0) |
27626 | { |
d0ae0cb4 |
27627 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27628 | #ifdef USE_CYCLONE_TIMING_DIV |
27629 | RET(146) |
27630 | #else |
27631 | RET(16) |
27632 | #endif |
27633 | } |
27634 | dst = DREGu32((Opcode >> 9) & 7); |
27635 | { |
27636 | u32 q, r; |
27637 | |
27638 | q = dst / src; |
27639 | r = dst % src; |
27640 | |
27641 | if (q & 0xFFFF0000) |
27642 | { |
27643 | flag_V = M68K_SR_V; |
27644 | #ifdef USE_CYCLONE_TIMING_DIV |
27645 | RET(146) |
27646 | #else |
27647 | RET(76) |
27648 | #endif |
27649 | } |
27650 | q &= 0x0000FFFF; |
27651 | flag_NotZ = q; |
27652 | flag_N = q >> 8; |
27653 | flag_V = flag_C = 0; |
27654 | res = q | (r << 16); |
27655 | DREGu32((Opcode >> 9) & 7) = res; |
27656 | } |
27657 | #ifdef USE_CYCLONE_TIMING_DIV |
27658 | RET(146) |
27659 | #else |
27660 | RET(96) |
27661 | #endif |
27662 | } |
27663 | |
27664 | // DIVS |
27665 | OPCODE(0x81C0) |
27666 | { |
27667 | u32 adr, res; |
27668 | u32 src, dst; |
27669 | |
27670 | src = (s32)DREGs16((Opcode >> 0) & 7); |
27671 | if (src == 0) |
27672 | { |
d0ae0cb4 |
27673 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27674 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27675 | goto end81C0; |
70357ce5 |
27676 | #endif |
27677 | RET(10) |
27678 | } |
27679 | dst = DREGu32((Opcode >> 9) & 7); |
27680 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27681 | { |
27682 | flag_NotZ = flag_N = 0; |
27683 | flag_V = flag_C = 0; |
27684 | res = 0; |
27685 | DREGu32((Opcode >> 9) & 7) = res; |
27686 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27687 | goto end81C0; |
70357ce5 |
27688 | #endif |
27689 | RET(50) |
27690 | } |
27691 | { |
27692 | s32 q, r; |
27693 | |
27694 | q = (s32)dst / (s32)src; |
27695 | r = (s32)dst % (s32)src; |
27696 | |
27697 | if ((q > 0x7FFF) || (q < -0x8000)) |
27698 | { |
27699 | flag_V = M68K_SR_V; |
27700 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27701 | goto end81C0; |
70357ce5 |
27702 | #endif |
27703 | RET(80) |
27704 | } |
27705 | q &= 0x0000FFFF; |
27706 | flag_NotZ = q; |
27707 | flag_N = q >> 8; |
27708 | flag_V = flag_C = 0; |
27709 | res = q | (r << 16); |
27710 | DREGu32((Opcode >> 9) & 7) = res; |
27711 | } |
27712 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27713 | end81C0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27714 | #endif |
27715 | RET(108) |
27716 | } |
27717 | |
27718 | // DIVS |
27719 | OPCODE(0x81D0) |
27720 | { |
27721 | u32 adr, res; |
27722 | u32 src, dst; |
27723 | |
27724 | adr = AREG((Opcode >> 0) & 7); |
27725 | PRE_IO |
27726 | READSX_WORD_F(adr, src) |
27727 | if (src == 0) |
27728 | { |
d0ae0cb4 |
27729 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27730 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27731 | goto end81D0; |
70357ce5 |
27732 | #endif |
27733 | RET(14) |
27734 | } |
27735 | dst = DREGu32((Opcode >> 9) & 7); |
27736 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27737 | { |
27738 | flag_NotZ = flag_N = 0; |
27739 | flag_V = flag_C = 0; |
27740 | res = 0; |
27741 | DREGu32((Opcode >> 9) & 7) = res; |
27742 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27743 | goto end81D0; |
70357ce5 |
27744 | #endif |
27745 | RET(54) |
27746 | } |
27747 | { |
27748 | s32 q, r; |
27749 | |
27750 | q = (s32)dst / (s32)src; |
27751 | r = (s32)dst % (s32)src; |
27752 | |
27753 | if ((q > 0x7FFF) || (q < -0x8000)) |
27754 | { |
27755 | flag_V = M68K_SR_V; |
27756 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27757 | goto end81D0; |
70357ce5 |
27758 | #endif |
27759 | RET(84) |
27760 | } |
27761 | q &= 0x0000FFFF; |
27762 | flag_NotZ = q; |
27763 | flag_N = q >> 8; |
27764 | flag_V = flag_C = 0; |
27765 | res = q | (r << 16); |
27766 | DREGu32((Opcode >> 9) & 7) = res; |
27767 | } |
27768 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27769 | end81D0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27770 | #endif |
27771 | RET(112) |
27772 | } |
27773 | |
27774 | // DIVS |
27775 | OPCODE(0x81D8) |
27776 | { |
27777 | u32 adr, res; |
27778 | u32 src, dst; |
27779 | |
27780 | adr = AREG((Opcode >> 0) & 7); |
27781 | AREG((Opcode >> 0) & 7) += 2; |
27782 | PRE_IO |
27783 | READSX_WORD_F(adr, src) |
27784 | if (src == 0) |
27785 | { |
d0ae0cb4 |
27786 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27787 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27788 | goto end81D8; |
70357ce5 |
27789 | #endif |
27790 | RET(14) |
27791 | } |
27792 | dst = DREGu32((Opcode >> 9) & 7); |
27793 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27794 | { |
27795 | flag_NotZ = flag_N = 0; |
27796 | flag_V = flag_C = 0; |
27797 | res = 0; |
27798 | DREGu32((Opcode >> 9) & 7) = res; |
27799 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27800 | goto end81D8; |
70357ce5 |
27801 | #endif |
27802 | RET(54) |
27803 | } |
27804 | { |
27805 | s32 q, r; |
27806 | |
27807 | q = (s32)dst / (s32)src; |
27808 | r = (s32)dst % (s32)src; |
27809 | |
27810 | if ((q > 0x7FFF) || (q < -0x8000)) |
27811 | { |
27812 | flag_V = M68K_SR_V; |
27813 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27814 | goto end81D8; |
70357ce5 |
27815 | #endif |
27816 | RET(84) |
27817 | } |
27818 | q &= 0x0000FFFF; |
27819 | flag_NotZ = q; |
27820 | flag_N = q >> 8; |
27821 | flag_V = flag_C = 0; |
27822 | res = q | (r << 16); |
27823 | DREGu32((Opcode >> 9) & 7) = res; |
27824 | } |
27825 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27826 | end81D8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27827 | #endif |
27828 | RET(112) |
27829 | } |
27830 | |
27831 | // DIVS |
27832 | OPCODE(0x81E0) |
27833 | { |
27834 | u32 adr, res; |
27835 | u32 src, dst; |
27836 | |
27837 | adr = AREG((Opcode >> 0) & 7) - 2; |
27838 | AREG((Opcode >> 0) & 7) = adr; |
27839 | PRE_IO |
27840 | READSX_WORD_F(adr, src) |
27841 | if (src == 0) |
27842 | { |
d0ae0cb4 |
27843 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27844 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27845 | goto end81E0; |
70357ce5 |
27846 | #endif |
27847 | RET(16) |
27848 | } |
27849 | dst = DREGu32((Opcode >> 9) & 7); |
27850 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27851 | { |
27852 | flag_NotZ = flag_N = 0; |
27853 | flag_V = flag_C = 0; |
27854 | res = 0; |
27855 | DREGu32((Opcode >> 9) & 7) = res; |
27856 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27857 | goto end81E0; |
70357ce5 |
27858 | #endif |
27859 | RET(56) |
27860 | } |
27861 | { |
27862 | s32 q, r; |
27863 | |
27864 | q = (s32)dst / (s32)src; |
27865 | r = (s32)dst % (s32)src; |
27866 | |
27867 | if ((q > 0x7FFF) || (q < -0x8000)) |
27868 | { |
27869 | flag_V = M68K_SR_V; |
27870 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27871 | goto end81E0; |
70357ce5 |
27872 | #endif |
27873 | RET(86) |
27874 | } |
27875 | q &= 0x0000FFFF; |
27876 | flag_NotZ = q; |
27877 | flag_N = q >> 8; |
27878 | flag_V = flag_C = 0; |
27879 | res = q | (r << 16); |
27880 | DREGu32((Opcode >> 9) & 7) = res; |
27881 | } |
27882 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27883 | end81E0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27884 | #endif |
27885 | RET(114) |
27886 | } |
27887 | |
27888 | // DIVS |
27889 | OPCODE(0x81E8) |
27890 | { |
27891 | u32 adr, res; |
27892 | u32 src, dst; |
27893 | |
27894 | FETCH_SWORD(adr); |
27895 | adr += AREG((Opcode >> 0) & 7); |
27896 | PRE_IO |
27897 | READSX_WORD_F(adr, src) |
27898 | if (src == 0) |
27899 | { |
d0ae0cb4 |
27900 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27901 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27902 | goto end81E8; |
70357ce5 |
27903 | #endif |
27904 | RET(18) |
27905 | } |
27906 | dst = DREGu32((Opcode >> 9) & 7); |
27907 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27908 | { |
27909 | flag_NotZ = flag_N = 0; |
27910 | flag_V = flag_C = 0; |
27911 | res = 0; |
27912 | DREGu32((Opcode >> 9) & 7) = res; |
27913 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27914 | goto end81E8; |
70357ce5 |
27915 | #endif |
27916 | RET(58) |
27917 | } |
27918 | { |
27919 | s32 q, r; |
27920 | |
27921 | q = (s32)dst / (s32)src; |
27922 | r = (s32)dst % (s32)src; |
27923 | |
27924 | if ((q > 0x7FFF) || (q < -0x8000)) |
27925 | { |
27926 | flag_V = M68K_SR_V; |
27927 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27928 | goto end81E8; |
70357ce5 |
27929 | #endif |
27930 | RET(88) |
27931 | } |
27932 | q &= 0x0000FFFF; |
27933 | flag_NotZ = q; |
27934 | flag_N = q >> 8; |
27935 | flag_V = flag_C = 0; |
27936 | res = q | (r << 16); |
27937 | DREGu32((Opcode >> 9) & 7) = res; |
27938 | } |
27939 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27940 | end81E8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27941 | #endif |
27942 | RET(116) |
27943 | } |
27944 | |
27945 | // DIVS |
27946 | OPCODE(0x81F0) |
27947 | { |
27948 | u32 adr, res; |
27949 | u32 src, dst; |
27950 | |
27951 | adr = AREG((Opcode >> 0) & 7); |
27952 | DECODE_EXT_WORD |
27953 | PRE_IO |
27954 | READSX_WORD_F(adr, src) |
27955 | if (src == 0) |
27956 | { |
d0ae0cb4 |
27957 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27958 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27959 | goto end81F0; |
70357ce5 |
27960 | #endif |
27961 | RET(20) |
27962 | } |
27963 | dst = DREGu32((Opcode >> 9) & 7); |
27964 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27965 | { |
27966 | flag_NotZ = flag_N = 0; |
27967 | flag_V = flag_C = 0; |
27968 | res = 0; |
27969 | DREGu32((Opcode >> 9) & 7) = res; |
27970 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27971 | goto end81F0; |
70357ce5 |
27972 | #endif |
27973 | RET(60) |
27974 | } |
27975 | { |
27976 | s32 q, r; |
27977 | |
27978 | q = (s32)dst / (s32)src; |
27979 | r = (s32)dst % (s32)src; |
27980 | |
27981 | if ((q > 0x7FFF) || (q < -0x8000)) |
27982 | { |
27983 | flag_V = M68K_SR_V; |
27984 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27985 | goto end81F0; |
70357ce5 |
27986 | #endif |
27987 | RET(90) |
27988 | } |
27989 | q &= 0x0000FFFF; |
27990 | flag_NotZ = q; |
27991 | flag_N = q >> 8; |
27992 | flag_V = flag_C = 0; |
27993 | res = q | (r << 16); |
27994 | DREGu32((Opcode >> 9) & 7) = res; |
27995 | } |
27996 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27997 | end81F0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27998 | #endif |
27999 | RET(118) |
28000 | } |
28001 | |
28002 | // DIVS |
28003 | OPCODE(0x81F8) |
28004 | { |
28005 | u32 adr, res; |
28006 | u32 src, dst; |
28007 | |
28008 | FETCH_SWORD(adr); |
28009 | PRE_IO |
28010 | READSX_WORD_F(adr, src) |
28011 | if (src == 0) |
28012 | { |
d0ae0cb4 |
28013 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28014 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28015 | goto end81F8; |
70357ce5 |
28016 | #endif |
28017 | RET(18) |
28018 | } |
28019 | dst = DREGu32((Opcode >> 9) & 7); |
28020 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28021 | { |
28022 | flag_NotZ = flag_N = 0; |
28023 | flag_V = flag_C = 0; |
28024 | res = 0; |
28025 | DREGu32((Opcode >> 9) & 7) = res; |
28026 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28027 | goto end81F8; |
70357ce5 |
28028 | #endif |
28029 | RET(58) |
28030 | } |
28031 | { |
28032 | s32 q, r; |
28033 | |
28034 | q = (s32)dst / (s32)src; |
28035 | r = (s32)dst % (s32)src; |
28036 | |
28037 | if ((q > 0x7FFF) || (q < -0x8000)) |
28038 | { |
28039 | flag_V = M68K_SR_V; |
28040 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28041 | goto end81F8; |
70357ce5 |
28042 | #endif |
28043 | RET(88) |
28044 | } |
28045 | q &= 0x0000FFFF; |
28046 | flag_NotZ = q; |
28047 | flag_N = q >> 8; |
28048 | flag_V = flag_C = 0; |
28049 | res = q | (r << 16); |
28050 | DREGu32((Opcode >> 9) & 7) = res; |
28051 | } |
28052 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28053 | end81F8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28054 | #endif |
28055 | RET(116) |
28056 | } |
28057 | |
28058 | // DIVS |
28059 | OPCODE(0x81F9) |
28060 | { |
28061 | u32 adr, res; |
28062 | u32 src, dst; |
28063 | |
28064 | FETCH_LONG(adr); |
28065 | PRE_IO |
28066 | READSX_WORD_F(adr, src) |
28067 | if (src == 0) |
28068 | { |
d0ae0cb4 |
28069 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28070 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28071 | goto end81F9; |
70357ce5 |
28072 | #endif |
28073 | RET(22) |
28074 | } |
28075 | dst = DREGu32((Opcode >> 9) & 7); |
28076 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28077 | { |
28078 | flag_NotZ = flag_N = 0; |
28079 | flag_V = flag_C = 0; |
28080 | res = 0; |
28081 | DREGu32((Opcode >> 9) & 7) = res; |
28082 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28083 | goto end81F9; |
70357ce5 |
28084 | #endif |
28085 | RET(62) |
28086 | } |
28087 | { |
28088 | s32 q, r; |
28089 | |
28090 | q = (s32)dst / (s32)src; |
28091 | r = (s32)dst % (s32)src; |
28092 | |
28093 | if ((q > 0x7FFF) || (q < -0x8000)) |
28094 | { |
28095 | flag_V = M68K_SR_V; |
28096 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28097 | goto end81F9; |
70357ce5 |
28098 | #endif |
28099 | RET(92) |
28100 | } |
28101 | q &= 0x0000FFFF; |
28102 | flag_NotZ = q; |
28103 | flag_N = q >> 8; |
28104 | flag_V = flag_C = 0; |
28105 | res = q | (r << 16); |
28106 | DREGu32((Opcode >> 9) & 7) = res; |
28107 | } |
28108 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28109 | end81F9: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28110 | #endif |
28111 | RET(120) |
28112 | } |
28113 | |
28114 | // DIVS |
28115 | OPCODE(0x81FA) |
28116 | { |
28117 | u32 adr, res; |
28118 | u32 src, dst; |
28119 | |
28120 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28121 | PC++; |
28122 | PRE_IO |
28123 | READSX_WORD_F(adr, src) |
28124 | if (src == 0) |
28125 | { |
d0ae0cb4 |
28126 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28127 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28128 | goto end81FA; |
70357ce5 |
28129 | #endif |
28130 | RET(18) |
28131 | } |
28132 | dst = DREGu32((Opcode >> 9) & 7); |
28133 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28134 | { |
28135 | flag_NotZ = flag_N = 0; |
28136 | flag_V = flag_C = 0; |
28137 | res = 0; |
28138 | DREGu32((Opcode >> 9) & 7) = res; |
28139 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28140 | goto end81FA; |
70357ce5 |
28141 | #endif |
28142 | RET(58) |
28143 | } |
28144 | { |
28145 | s32 q, r; |
28146 | |
28147 | q = (s32)dst / (s32)src; |
28148 | r = (s32)dst % (s32)src; |
28149 | |
28150 | if ((q > 0x7FFF) || (q < -0x8000)) |
28151 | { |
28152 | flag_V = M68K_SR_V; |
28153 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28154 | goto end81FA; |
70357ce5 |
28155 | #endif |
28156 | RET(88) |
28157 | } |
28158 | q &= 0x0000FFFF; |
28159 | flag_NotZ = q; |
28160 | flag_N = q >> 8; |
28161 | flag_V = flag_C = 0; |
28162 | res = q | (r << 16); |
28163 | DREGu32((Opcode >> 9) & 7) = res; |
28164 | } |
28165 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28166 | end81FA: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28167 | #endif |
28168 | RET(116) |
28169 | } |
28170 | |
28171 | // DIVS |
28172 | OPCODE(0x81FB) |
28173 | { |
28174 | u32 adr, res; |
28175 | u32 src, dst; |
28176 | |
28177 | adr = (u32)(PC) - BasePC; |
28178 | DECODE_EXT_WORD |
28179 | PRE_IO |
28180 | READSX_WORD_F(adr, src) |
28181 | if (src == 0) |
28182 | { |
d0ae0cb4 |
28183 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28184 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28185 | goto end81FB; |
70357ce5 |
28186 | #endif |
28187 | RET(20) |
28188 | } |
28189 | dst = DREGu32((Opcode >> 9) & 7); |
28190 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28191 | { |
28192 | flag_NotZ = flag_N = 0; |
28193 | flag_V = flag_C = 0; |
28194 | res = 0; |
28195 | DREGu32((Opcode >> 9) & 7) = res; |
28196 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28197 | goto end81FB; |
70357ce5 |
28198 | #endif |
28199 | RET(60) |
28200 | } |
28201 | { |
28202 | s32 q, r; |
28203 | |
28204 | q = (s32)dst / (s32)src; |
28205 | r = (s32)dst % (s32)src; |
28206 | |
28207 | if ((q > 0x7FFF) || (q < -0x8000)) |
28208 | { |
28209 | flag_V = M68K_SR_V; |
28210 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28211 | goto end81FB; |
70357ce5 |
28212 | #endif |
28213 | RET(90) |
28214 | } |
28215 | q &= 0x0000FFFF; |
28216 | flag_NotZ = q; |
28217 | flag_N = q >> 8; |
28218 | flag_V = flag_C = 0; |
28219 | res = q | (r << 16); |
28220 | DREGu32((Opcode >> 9) & 7) = res; |
28221 | } |
28222 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28223 | end81FB: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28224 | #endif |
28225 | RET(118) |
28226 | } |
28227 | |
28228 | // DIVS |
28229 | OPCODE(0x81FC) |
28230 | { |
28231 | u32 adr, res; |
28232 | u32 src, dst; |
28233 | |
28234 | FETCH_SWORD(src); |
28235 | if (src == 0) |
28236 | { |
d0ae0cb4 |
28237 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28238 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28239 | goto end81FC; |
70357ce5 |
28240 | #endif |
28241 | RET(14) |
28242 | } |
28243 | dst = DREGu32((Opcode >> 9) & 7); |
28244 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28245 | { |
28246 | flag_NotZ = flag_N = 0; |
28247 | flag_V = flag_C = 0; |
28248 | res = 0; |
28249 | DREGu32((Opcode >> 9) & 7) = res; |
28250 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28251 | goto end81FC; |
70357ce5 |
28252 | #endif |
28253 | RET(54) |
28254 | } |
28255 | { |
28256 | s32 q, r; |
28257 | |
28258 | q = (s32)dst / (s32)src; |
28259 | r = (s32)dst % (s32)src; |
28260 | |
28261 | if ((q > 0x7FFF) || (q < -0x8000)) |
28262 | { |
28263 | flag_V = M68K_SR_V; |
28264 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28265 | goto end81FC; |
70357ce5 |
28266 | #endif |
28267 | RET(84) |
28268 | } |
28269 | q &= 0x0000FFFF; |
28270 | flag_NotZ = q; |
28271 | flag_N = q >> 8; |
28272 | flag_V = flag_C = 0; |
28273 | res = q | (r << 16); |
28274 | DREGu32((Opcode >> 9) & 7) = res; |
28275 | } |
28276 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28277 | end81FC: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28278 | #endif |
28279 | RET(112) |
28280 | } |
28281 | |
28282 | // DIVS |
28283 | OPCODE(0x81DF) |
28284 | { |
28285 | u32 adr, res; |
28286 | u32 src, dst; |
28287 | |
28288 | adr = AREG(7); |
28289 | AREG(7) += 2; |
28290 | PRE_IO |
28291 | READSX_WORD_F(adr, src) |
28292 | if (src == 0) |
28293 | { |
d0ae0cb4 |
28294 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28295 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28296 | goto end81DF; |
70357ce5 |
28297 | #endif |
28298 | RET(14) |
28299 | } |
28300 | dst = DREGu32((Opcode >> 9) & 7); |
28301 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28302 | { |
28303 | flag_NotZ = flag_N = 0; |
28304 | flag_V = flag_C = 0; |
28305 | res = 0; |
28306 | DREGu32((Opcode >> 9) & 7) = res; |
28307 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28308 | goto end81DF; |
70357ce5 |
28309 | #endif |
28310 | RET(54) |
28311 | } |
28312 | { |
28313 | s32 q, r; |
28314 | |
28315 | q = (s32)dst / (s32)src; |
28316 | r = (s32)dst % (s32)src; |
28317 | |
28318 | if ((q > 0x7FFF) || (q < -0x8000)) |
28319 | { |
28320 | flag_V = M68K_SR_V; |
28321 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28322 | goto end81DF; |
70357ce5 |
28323 | #endif |
28324 | RET(84) |
28325 | } |
28326 | q &= 0x0000FFFF; |
28327 | flag_NotZ = q; |
28328 | flag_N = q >> 8; |
28329 | flag_V = flag_C = 0; |
28330 | res = q | (r << 16); |
28331 | DREGu32((Opcode >> 9) & 7) = res; |
28332 | } |
28333 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28334 | end81DF: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28335 | #endif |
28336 | RET(112) |
28337 | } |
28338 | |
28339 | // DIVS |
28340 | OPCODE(0x81E7) |
28341 | { |
28342 | u32 adr, res; |
28343 | u32 src, dst; |
28344 | |
28345 | adr = AREG(7) - 2; |
28346 | AREG(7) = adr; |
28347 | PRE_IO |
28348 | READSX_WORD_F(adr, src) |
28349 | if (src == 0) |
28350 | { |
d0ae0cb4 |
28351 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28352 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28353 | goto end81E7; |
70357ce5 |
28354 | #endif |
28355 | RET(16) |
28356 | } |
28357 | dst = DREGu32((Opcode >> 9) & 7); |
28358 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28359 | { |
28360 | flag_NotZ = flag_N = 0; |
28361 | flag_V = flag_C = 0; |
28362 | res = 0; |
28363 | DREGu32((Opcode >> 9) & 7) = res; |
28364 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28365 | goto end81E7; |
70357ce5 |
28366 | #endif |
28367 | RET(56) |
28368 | } |
28369 | { |
28370 | s32 q, r; |
28371 | |
28372 | q = (s32)dst / (s32)src; |
28373 | r = (s32)dst % (s32)src; |
28374 | |
28375 | if ((q > 0x7FFF) || (q < -0x8000)) |
28376 | { |
28377 | flag_V = M68K_SR_V; |
28378 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28379 | goto end81E7; |
70357ce5 |
28380 | #endif |
28381 | RET(86) |
28382 | } |
28383 | q &= 0x0000FFFF; |
28384 | flag_NotZ = q; |
28385 | flag_N = q >> 8; |
28386 | flag_V = flag_C = 0; |
28387 | res = q | (r << 16); |
28388 | DREGu32((Opcode >> 9) & 7) = res; |
28389 | } |
28390 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28391 | end81E7: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28392 | #endif |
28393 | RET(114) |
28394 | } |
28395 | |
28396 | // SUBaD |
28397 | OPCODE(0x9000) |
28398 | { |
28399 | u32 adr, res; |
28400 | u32 src, dst; |
28401 | |
28402 | src = DREGu8((Opcode >> 0) & 7); |
28403 | dst = DREGu8((Opcode >> 9) & 7); |
28404 | res = dst - src; |
28405 | flag_N = flag_X = flag_C = res; |
28406 | flag_V = (src ^ dst) & (res ^ dst); |
28407 | flag_NotZ = res & 0xFF; |
28408 | DREGu8((Opcode >> 9) & 7) = res; |
28409 | RET(4) |
28410 | } |
28411 | |
28412 | // SUBaD |
03e4f2a3 |
28413 | #if 0 |
70357ce5 |
28414 | OPCODE(0x9008) |
28415 | { |
28416 | u32 adr, res; |
28417 | u32 src, dst; |
28418 | |
28419 | // can't read byte from Ax registers ! |
28420 | m68kcontext.execinfo |= M68K_FAULTED; |
28421 | m68kcontext.io_cycle_counter = 0; |
28422 | /* |
28423 | goto famec_Exec_End; |
28424 | dst = DREGu8((Opcode >> 9) & 7); |
28425 | res = dst - src; |
28426 | flag_N = flag_X = flag_C = res; |
28427 | flag_V = (src ^ dst) & (res ^ dst); |
28428 | flag_NotZ = res & 0xFF; |
28429 | DREGu8((Opcode >> 9) & 7) = res; |
28430 | */ |
28431 | RET(4) |
28432 | } |
03e4f2a3 |
28433 | #endif |
70357ce5 |
28434 | |
28435 | // SUBaD |
28436 | OPCODE(0x9010) |
28437 | { |
28438 | u32 adr, res; |
28439 | u32 src, dst; |
28440 | |
28441 | adr = AREG((Opcode >> 0) & 7); |
28442 | PRE_IO |
28443 | READ_BYTE_F(adr, src) |
28444 | dst = DREGu8((Opcode >> 9) & 7); |
28445 | res = dst - src; |
28446 | flag_N = flag_X = flag_C = res; |
28447 | flag_V = (src ^ dst) & (res ^ dst); |
28448 | flag_NotZ = res & 0xFF; |
28449 | DREGu8((Opcode >> 9) & 7) = res; |
28450 | POST_IO |
28451 | RET(8) |
28452 | } |
28453 | |
28454 | // SUBaD |
28455 | OPCODE(0x9018) |
28456 | { |
28457 | u32 adr, res; |
28458 | u32 src, dst; |
28459 | |
28460 | adr = AREG((Opcode >> 0) & 7); |
28461 | AREG((Opcode >> 0) & 7) += 1; |
28462 | PRE_IO |
28463 | READ_BYTE_F(adr, src) |
28464 | dst = DREGu8((Opcode >> 9) & 7); |
28465 | res = dst - src; |
28466 | flag_N = flag_X = flag_C = res; |
28467 | flag_V = (src ^ dst) & (res ^ dst); |
28468 | flag_NotZ = res & 0xFF; |
28469 | DREGu8((Opcode >> 9) & 7) = res; |
28470 | POST_IO |
28471 | RET(8) |
28472 | } |
28473 | |
28474 | // SUBaD |
28475 | OPCODE(0x9020) |
28476 | { |
28477 | u32 adr, res; |
28478 | u32 src, dst; |
28479 | |
28480 | adr = AREG((Opcode >> 0) & 7) - 1; |
28481 | AREG((Opcode >> 0) & 7) = adr; |
28482 | PRE_IO |
28483 | READ_BYTE_F(adr, src) |
28484 | dst = DREGu8((Opcode >> 9) & 7); |
28485 | res = dst - src; |
28486 | flag_N = flag_X = flag_C = res; |
28487 | flag_V = (src ^ dst) & (res ^ dst); |
28488 | flag_NotZ = res & 0xFF; |
28489 | DREGu8((Opcode >> 9) & 7) = res; |
28490 | POST_IO |
28491 | RET(10) |
28492 | } |
28493 | |
28494 | // SUBaD |
28495 | OPCODE(0x9028) |
28496 | { |
28497 | u32 adr, res; |
28498 | u32 src, dst; |
28499 | |
28500 | FETCH_SWORD(adr); |
28501 | adr += AREG((Opcode >> 0) & 7); |
28502 | PRE_IO |
28503 | READ_BYTE_F(adr, src) |
28504 | dst = DREGu8((Opcode >> 9) & 7); |
28505 | res = dst - src; |
28506 | flag_N = flag_X = flag_C = res; |
28507 | flag_V = (src ^ dst) & (res ^ dst); |
28508 | flag_NotZ = res & 0xFF; |
28509 | DREGu8((Opcode >> 9) & 7) = res; |
28510 | POST_IO |
28511 | RET(12) |
28512 | } |
28513 | |
28514 | // SUBaD |
28515 | OPCODE(0x9030) |
28516 | { |
28517 | u32 adr, res; |
28518 | u32 src, dst; |
28519 | |
28520 | adr = AREG((Opcode >> 0) & 7); |
28521 | DECODE_EXT_WORD |
28522 | PRE_IO |
28523 | READ_BYTE_F(adr, src) |
28524 | dst = DREGu8((Opcode >> 9) & 7); |
28525 | res = dst - src; |
28526 | flag_N = flag_X = flag_C = res; |
28527 | flag_V = (src ^ dst) & (res ^ dst); |
28528 | flag_NotZ = res & 0xFF; |
28529 | DREGu8((Opcode >> 9) & 7) = res; |
28530 | POST_IO |
28531 | RET(14) |
28532 | } |
28533 | |
28534 | // SUBaD |
28535 | OPCODE(0x9038) |
28536 | { |
28537 | u32 adr, res; |
28538 | u32 src, dst; |
28539 | |
28540 | FETCH_SWORD(adr); |
28541 | PRE_IO |
28542 | READ_BYTE_F(adr, src) |
28543 | dst = DREGu8((Opcode >> 9) & 7); |
28544 | res = dst - src; |
28545 | flag_N = flag_X = flag_C = res; |
28546 | flag_V = (src ^ dst) & (res ^ dst); |
28547 | flag_NotZ = res & 0xFF; |
28548 | DREGu8((Opcode >> 9) & 7) = res; |
28549 | POST_IO |
28550 | RET(12) |
28551 | } |
28552 | |
28553 | // SUBaD |
28554 | OPCODE(0x9039) |
28555 | { |
28556 | u32 adr, res; |
28557 | u32 src, dst; |
28558 | |
28559 | FETCH_LONG(adr); |
28560 | PRE_IO |
28561 | READ_BYTE_F(adr, src) |
28562 | dst = DREGu8((Opcode >> 9) & 7); |
28563 | res = dst - src; |
28564 | flag_N = flag_X = flag_C = res; |
28565 | flag_V = (src ^ dst) & (res ^ dst); |
28566 | flag_NotZ = res & 0xFF; |
28567 | DREGu8((Opcode >> 9) & 7) = res; |
28568 | POST_IO |
28569 | RET(16) |
28570 | } |
28571 | |
28572 | // SUBaD |
28573 | OPCODE(0x903A) |
28574 | { |
28575 | u32 adr, res; |
28576 | u32 src, dst; |
28577 | |
28578 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28579 | PC++; |
28580 | PRE_IO |
28581 | READ_BYTE_F(adr, src) |
28582 | dst = DREGu8((Opcode >> 9) & 7); |
28583 | res = dst - src; |
28584 | flag_N = flag_X = flag_C = res; |
28585 | flag_V = (src ^ dst) & (res ^ dst); |
28586 | flag_NotZ = res & 0xFF; |
28587 | DREGu8((Opcode >> 9) & 7) = res; |
28588 | POST_IO |
28589 | RET(12) |
28590 | } |
28591 | |
28592 | // SUBaD |
28593 | OPCODE(0x903B) |
28594 | { |
28595 | u32 adr, res; |
28596 | u32 src, dst; |
28597 | |
28598 | adr = (u32)(PC) - BasePC; |
28599 | DECODE_EXT_WORD |
28600 | PRE_IO |
28601 | READ_BYTE_F(adr, src) |
28602 | dst = DREGu8((Opcode >> 9) & 7); |
28603 | res = dst - src; |
28604 | flag_N = flag_X = flag_C = res; |
28605 | flag_V = (src ^ dst) & (res ^ dst); |
28606 | flag_NotZ = res & 0xFF; |
28607 | DREGu8((Opcode >> 9) & 7) = res; |
28608 | POST_IO |
28609 | RET(14) |
28610 | } |
28611 | |
28612 | // SUBaD |
28613 | OPCODE(0x903C) |
28614 | { |
28615 | u32 adr, res; |
28616 | u32 src, dst; |
28617 | |
28618 | FETCH_BYTE(src); |
28619 | dst = DREGu8((Opcode >> 9) & 7); |
28620 | res = dst - src; |
28621 | flag_N = flag_X = flag_C = res; |
28622 | flag_V = (src ^ dst) & (res ^ dst); |
28623 | flag_NotZ = res & 0xFF; |
28624 | DREGu8((Opcode >> 9) & 7) = res; |
28625 | RET(8) |
28626 | } |
28627 | |
28628 | // SUBaD |
28629 | OPCODE(0x901F) |
28630 | { |
28631 | u32 adr, res; |
28632 | u32 src, dst; |
28633 | |
28634 | adr = AREG(7); |
28635 | AREG(7) += 2; |
28636 | PRE_IO |
28637 | READ_BYTE_F(adr, src) |
28638 | dst = DREGu8((Opcode >> 9) & 7); |
28639 | res = dst - src; |
28640 | flag_N = flag_X = flag_C = res; |
28641 | flag_V = (src ^ dst) & (res ^ dst); |
28642 | flag_NotZ = res & 0xFF; |
28643 | DREGu8((Opcode >> 9) & 7) = res; |
28644 | POST_IO |
28645 | RET(8) |
28646 | } |
28647 | |
28648 | // SUBaD |
28649 | OPCODE(0x9027) |
28650 | { |
28651 | u32 adr, res; |
28652 | u32 src, dst; |
28653 | |
28654 | adr = AREG(7) - 2; |
28655 | AREG(7) = adr; |
28656 | PRE_IO |
28657 | READ_BYTE_F(adr, src) |
28658 | dst = DREGu8((Opcode >> 9) & 7); |
28659 | res = dst - src; |
28660 | flag_N = flag_X = flag_C = res; |
28661 | flag_V = (src ^ dst) & (res ^ dst); |
28662 | flag_NotZ = res & 0xFF; |
28663 | DREGu8((Opcode >> 9) & 7) = res; |
28664 | POST_IO |
28665 | RET(10) |
28666 | } |
28667 | |
28668 | // SUBaD |
28669 | OPCODE(0x9040) |
28670 | { |
28671 | u32 adr, res; |
28672 | u32 src, dst; |
28673 | |
28674 | src = DREGu16((Opcode >> 0) & 7); |
28675 | dst = DREGu16((Opcode >> 9) & 7); |
28676 | res = dst - src; |
28677 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28678 | flag_N = flag_X = flag_C = res >> 8; |
28679 | flag_NotZ = res & 0xFFFF; |
28680 | DREGu16((Opcode >> 9) & 7) = res; |
28681 | RET(4) |
28682 | } |
28683 | |
28684 | // SUBaD |
28685 | OPCODE(0x9048) |
28686 | { |
28687 | u32 adr, res; |
28688 | u32 src, dst; |
28689 | |
28690 | src = AREGu16((Opcode >> 0) & 7); |
28691 | dst = DREGu16((Opcode >> 9) & 7); |
28692 | res = dst - src; |
28693 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28694 | flag_N = flag_X = flag_C = res >> 8; |
28695 | flag_NotZ = res & 0xFFFF; |
28696 | DREGu16((Opcode >> 9) & 7) = res; |
28697 | RET(4) |
28698 | } |
28699 | |
28700 | // SUBaD |
28701 | OPCODE(0x9050) |
28702 | { |
28703 | u32 adr, res; |
28704 | u32 src, dst; |
28705 | |
28706 | adr = AREG((Opcode >> 0) & 7); |
28707 | PRE_IO |
28708 | READ_WORD_F(adr, src) |
28709 | dst = DREGu16((Opcode >> 9) & 7); |
28710 | res = dst - src; |
28711 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28712 | flag_N = flag_X = flag_C = res >> 8; |
28713 | flag_NotZ = res & 0xFFFF; |
28714 | DREGu16((Opcode >> 9) & 7) = res; |
28715 | POST_IO |
28716 | RET(8) |
28717 | } |
28718 | |
28719 | // SUBaD |
28720 | OPCODE(0x9058) |
28721 | { |
28722 | u32 adr, res; |
28723 | u32 src, dst; |
28724 | |
28725 | adr = AREG((Opcode >> 0) & 7); |
28726 | AREG((Opcode >> 0) & 7) += 2; |
28727 | PRE_IO |
28728 | READ_WORD_F(adr, src) |
28729 | dst = DREGu16((Opcode >> 9) & 7); |
28730 | res = dst - src; |
28731 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28732 | flag_N = flag_X = flag_C = res >> 8; |
28733 | flag_NotZ = res & 0xFFFF; |
28734 | DREGu16((Opcode >> 9) & 7) = res; |
28735 | POST_IO |
28736 | RET(8) |
28737 | } |
28738 | |
28739 | // SUBaD |
28740 | OPCODE(0x9060) |
28741 | { |
28742 | u32 adr, res; |
28743 | u32 src, dst; |
28744 | |
28745 | adr = AREG((Opcode >> 0) & 7) - 2; |
28746 | AREG((Opcode >> 0) & 7) = adr; |
28747 | PRE_IO |
28748 | READ_WORD_F(adr, src) |
28749 | dst = DREGu16((Opcode >> 9) & 7); |
28750 | res = dst - src; |
28751 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28752 | flag_N = flag_X = flag_C = res >> 8; |
28753 | flag_NotZ = res & 0xFFFF; |
28754 | DREGu16((Opcode >> 9) & 7) = res; |
28755 | POST_IO |
28756 | RET(10) |
28757 | } |
28758 | |
28759 | // SUBaD |
28760 | OPCODE(0x9068) |
28761 | { |
28762 | u32 adr, res; |
28763 | u32 src, dst; |
28764 | |
28765 | FETCH_SWORD(adr); |
28766 | adr += AREG((Opcode >> 0) & 7); |
28767 | PRE_IO |
28768 | READ_WORD_F(adr, src) |
28769 | dst = DREGu16((Opcode >> 9) & 7); |
28770 | res = dst - src; |
28771 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28772 | flag_N = flag_X = flag_C = res >> 8; |
28773 | flag_NotZ = res & 0xFFFF; |
28774 | DREGu16((Opcode >> 9) & 7) = res; |
28775 | POST_IO |
28776 | RET(12) |
28777 | } |
28778 | |
28779 | // SUBaD |
28780 | OPCODE(0x9070) |
28781 | { |
28782 | u32 adr, res; |
28783 | u32 src, dst; |
28784 | |
28785 | adr = AREG((Opcode >> 0) & 7); |
28786 | DECODE_EXT_WORD |
28787 | PRE_IO |
28788 | READ_WORD_F(adr, src) |
28789 | dst = DREGu16((Opcode >> 9) & 7); |
28790 | res = dst - src; |
28791 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28792 | flag_N = flag_X = flag_C = res >> 8; |
28793 | flag_NotZ = res & 0xFFFF; |
28794 | DREGu16((Opcode >> 9) & 7) = res; |
28795 | POST_IO |
28796 | RET(14) |
28797 | } |
28798 | |
28799 | // SUBaD |
28800 | OPCODE(0x9078) |
28801 | { |
28802 | u32 adr, res; |
28803 | u32 src, dst; |
28804 | |
28805 | FETCH_SWORD(adr); |
28806 | PRE_IO |
28807 | READ_WORD_F(adr, src) |
28808 | dst = DREGu16((Opcode >> 9) & 7); |
28809 | res = dst - src; |
28810 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28811 | flag_N = flag_X = flag_C = res >> 8; |
28812 | flag_NotZ = res & 0xFFFF; |
28813 | DREGu16((Opcode >> 9) & 7) = res; |
28814 | POST_IO |
28815 | RET(12) |
28816 | } |
28817 | |
28818 | // SUBaD |
28819 | OPCODE(0x9079) |
28820 | { |
28821 | u32 adr, res; |
28822 | u32 src, dst; |
28823 | |
28824 | FETCH_LONG(adr); |
28825 | PRE_IO |
28826 | READ_WORD_F(adr, src) |
28827 | dst = DREGu16((Opcode >> 9) & 7); |
28828 | res = dst - src; |
28829 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28830 | flag_N = flag_X = flag_C = res >> 8; |
28831 | flag_NotZ = res & 0xFFFF; |
28832 | DREGu16((Opcode >> 9) & 7) = res; |
28833 | POST_IO |
28834 | RET(16) |
28835 | } |
28836 | |
28837 | // SUBaD |
28838 | OPCODE(0x907A) |
28839 | { |
28840 | u32 adr, res; |
28841 | u32 src, dst; |
28842 | |
28843 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28844 | PC++; |
28845 | PRE_IO |
28846 | READ_WORD_F(adr, src) |
28847 | dst = DREGu16((Opcode >> 9) & 7); |
28848 | res = dst - src; |
28849 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28850 | flag_N = flag_X = flag_C = res >> 8; |
28851 | flag_NotZ = res & 0xFFFF; |
28852 | DREGu16((Opcode >> 9) & 7) = res; |
28853 | POST_IO |
28854 | RET(12) |
28855 | } |
28856 | |
28857 | // SUBaD |
28858 | OPCODE(0x907B) |
28859 | { |
28860 | u32 adr, res; |
28861 | u32 src, dst; |
28862 | |
28863 | adr = (u32)(PC) - BasePC; |
28864 | DECODE_EXT_WORD |
28865 | PRE_IO |
28866 | READ_WORD_F(adr, src) |
28867 | dst = DREGu16((Opcode >> 9) & 7); |
28868 | res = dst - src; |
28869 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28870 | flag_N = flag_X = flag_C = res >> 8; |
28871 | flag_NotZ = res & 0xFFFF; |
28872 | DREGu16((Opcode >> 9) & 7) = res; |
28873 | POST_IO |
28874 | RET(14) |
28875 | } |
28876 | |
28877 | // SUBaD |
28878 | OPCODE(0x907C) |
28879 | { |
28880 | u32 adr, res; |
28881 | u32 src, dst; |
28882 | |
28883 | FETCH_WORD(src); |
28884 | dst = DREGu16((Opcode >> 9) & 7); |
28885 | res = dst - src; |
28886 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28887 | flag_N = flag_X = flag_C = res >> 8; |
28888 | flag_NotZ = res & 0xFFFF; |
28889 | DREGu16((Opcode >> 9) & 7) = res; |
28890 | RET(8) |
28891 | } |
28892 | |
28893 | // SUBaD |
28894 | OPCODE(0x905F) |
28895 | { |
28896 | u32 adr, res; |
28897 | u32 src, dst; |
28898 | |
28899 | adr = AREG(7); |
28900 | AREG(7) += 2; |
28901 | PRE_IO |
28902 | READ_WORD_F(adr, src) |
28903 | dst = DREGu16((Opcode >> 9) & 7); |
28904 | res = dst - src; |
28905 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28906 | flag_N = flag_X = flag_C = res >> 8; |
28907 | flag_NotZ = res & 0xFFFF; |
28908 | DREGu16((Opcode >> 9) & 7) = res; |
28909 | POST_IO |
28910 | RET(8) |
28911 | } |
28912 | |
28913 | // SUBaD |
28914 | OPCODE(0x9067) |
28915 | { |
28916 | u32 adr, res; |
28917 | u32 src, dst; |
28918 | |
28919 | adr = AREG(7) - 2; |
28920 | AREG(7) = adr; |
28921 | PRE_IO |
28922 | READ_WORD_F(adr, src) |
28923 | dst = DREGu16((Opcode >> 9) & 7); |
28924 | res = dst - src; |
28925 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28926 | flag_N = flag_X = flag_C = res >> 8; |
28927 | flag_NotZ = res & 0xFFFF; |
28928 | DREGu16((Opcode >> 9) & 7) = res; |
28929 | POST_IO |
28930 | RET(10) |
28931 | } |
28932 | |
28933 | // SUBaD |
28934 | OPCODE(0x9080) |
28935 | { |
28936 | u32 adr, res; |
28937 | u32 src, dst; |
28938 | |
28939 | src = DREGu32((Opcode >> 0) & 7); |
28940 | dst = DREGu32((Opcode >> 9) & 7); |
28941 | res = dst - src; |
28942 | flag_NotZ = res; |
28943 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28944 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28945 | flag_N = res >> 24; |
28946 | DREGu32((Opcode >> 9) & 7) = res; |
28947 | RET(8) |
28948 | } |
28949 | |
28950 | // SUBaD |
28951 | OPCODE(0x9088) |
28952 | { |
28953 | u32 adr, res; |
28954 | u32 src, dst; |
28955 | |
28956 | src = AREGu32((Opcode >> 0) & 7); |
28957 | dst = DREGu32((Opcode >> 9) & 7); |
28958 | res = dst - src; |
28959 | flag_NotZ = res; |
28960 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28961 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28962 | flag_N = res >> 24; |
28963 | DREGu32((Opcode >> 9) & 7) = res; |
28964 | RET(8) |
28965 | } |
28966 | |
28967 | // SUBaD |
28968 | OPCODE(0x9090) |
28969 | { |
28970 | u32 adr, res; |
28971 | u32 src, dst; |
28972 | |
28973 | adr = AREG((Opcode >> 0) & 7); |
28974 | PRE_IO |
28975 | READ_LONG_F(adr, src) |
28976 | dst = DREGu32((Opcode >> 9) & 7); |
28977 | res = dst - src; |
28978 | flag_NotZ = res; |
28979 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28980 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28981 | flag_N = res >> 24; |
28982 | DREGu32((Opcode >> 9) & 7) = res; |
28983 | POST_IO |
28984 | RET(14) |
28985 | } |
28986 | |
28987 | // SUBaD |
28988 | OPCODE(0x9098) |
28989 | { |
28990 | u32 adr, res; |
28991 | u32 src, dst; |
28992 | |
28993 | adr = AREG((Opcode >> 0) & 7); |
28994 | AREG((Opcode >> 0) & 7) += 4; |
28995 | PRE_IO |
28996 | READ_LONG_F(adr, src) |
28997 | dst = DREGu32((Opcode >> 9) & 7); |
28998 | res = dst - src; |
28999 | flag_NotZ = res; |
29000 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29001 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29002 | flag_N = res >> 24; |
29003 | DREGu32((Opcode >> 9) & 7) = res; |
29004 | POST_IO |
29005 | RET(14) |
29006 | } |
29007 | |
29008 | // SUBaD |
29009 | OPCODE(0x90A0) |
29010 | { |
29011 | u32 adr, res; |
29012 | u32 src, dst; |
29013 | |
29014 | adr = AREG((Opcode >> 0) & 7) - 4; |
29015 | AREG((Opcode >> 0) & 7) = adr; |
29016 | PRE_IO |
29017 | READ_LONG_F(adr, src) |
29018 | dst = DREGu32((Opcode >> 9) & 7); |
29019 | res = dst - src; |
29020 | flag_NotZ = res; |
29021 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29022 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29023 | flag_N = res >> 24; |
29024 | DREGu32((Opcode >> 9) & 7) = res; |
29025 | POST_IO |
29026 | RET(16) |
29027 | } |
29028 | |
29029 | // SUBaD |
29030 | OPCODE(0x90A8) |
29031 | { |
29032 | u32 adr, res; |
29033 | u32 src, dst; |
29034 | |
29035 | FETCH_SWORD(adr); |
29036 | adr += AREG((Opcode >> 0) & 7); |
29037 | PRE_IO |
29038 | READ_LONG_F(adr, src) |
29039 | dst = DREGu32((Opcode >> 9) & 7); |
29040 | res = dst - src; |
29041 | flag_NotZ = res; |
29042 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29043 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29044 | flag_N = res >> 24; |
29045 | DREGu32((Opcode >> 9) & 7) = res; |
29046 | POST_IO |
29047 | RET(18) |
29048 | } |
29049 | |
29050 | // SUBaD |
29051 | OPCODE(0x90B0) |
29052 | { |
29053 | u32 adr, res; |
29054 | u32 src, dst; |
29055 | |
29056 | adr = AREG((Opcode >> 0) & 7); |
29057 | DECODE_EXT_WORD |
29058 | PRE_IO |
29059 | READ_LONG_F(adr, src) |
29060 | dst = DREGu32((Opcode >> 9) & 7); |
29061 | res = dst - src; |
29062 | flag_NotZ = res; |
29063 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29064 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29065 | flag_N = res >> 24; |
29066 | DREGu32((Opcode >> 9) & 7) = res; |
29067 | POST_IO |
29068 | RET(20) |
29069 | } |
29070 | |
29071 | // SUBaD |
29072 | OPCODE(0x90B8) |
29073 | { |
29074 | u32 adr, res; |
29075 | u32 src, dst; |
29076 | |
29077 | FETCH_SWORD(adr); |
29078 | PRE_IO |
29079 | READ_LONG_F(adr, src) |
29080 | dst = DREGu32((Opcode >> 9) & 7); |
29081 | res = dst - src; |
29082 | flag_NotZ = res; |
29083 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29084 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29085 | flag_N = res >> 24; |
29086 | DREGu32((Opcode >> 9) & 7) = res; |
29087 | POST_IO |
29088 | RET(18) |
29089 | } |
29090 | |
29091 | // SUBaD |
29092 | OPCODE(0x90B9) |
29093 | { |
29094 | u32 adr, res; |
29095 | u32 src, dst; |
29096 | |
29097 | FETCH_LONG(adr); |
29098 | PRE_IO |
29099 | READ_LONG_F(adr, src) |
29100 | dst = DREGu32((Opcode >> 9) & 7); |
29101 | res = dst - src; |
29102 | flag_NotZ = res; |
29103 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29104 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29105 | flag_N = res >> 24; |
29106 | DREGu32((Opcode >> 9) & 7) = res; |
29107 | POST_IO |
29108 | RET(22) |
29109 | } |
29110 | |
29111 | // SUBaD |
29112 | OPCODE(0x90BA) |
29113 | { |
29114 | u32 adr, res; |
29115 | u32 src, dst; |
29116 | |
29117 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
29118 | PC++; |
29119 | PRE_IO |
29120 | READ_LONG_F(adr, src) |
29121 | dst = DREGu32((Opcode >> 9) & 7); |
29122 | res = dst - src; |
29123 | flag_NotZ = res; |
29124 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29125 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29126 | flag_N = res >> 24; |
29127 | DREGu32((Opcode >> 9) & 7) = res; |
29128 | POST_IO |
29129 | RET(18) |
29130 | } |
29131 | |
29132 | // SUBaD |
29133 | OPCODE(0x90BB) |
29134 | { |
29135 | u32 adr, res; |
29136 | u32 src, dst; |
29137 | |
29138 | adr = (u32)(PC) - BasePC; |
29139 | DECODE_EXT_WORD |
29140 | PRE_IO |
29141 | READ_LONG_F(adr, src) |
29142 | dst = DREGu32((Opcode >> 9) & 7); |
29143 | res = dst - src; |
29144 | flag_NotZ = res; |
29145 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29146 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29147 | flag_N = res >> 24; |
29148 | DREGu32((Opcode >> 9) & 7) = res; |
29149 | POST_IO |
29150 | RET(20) |
29151 | } |
29152 | |
29153 | // SUBaD |
29154 | OPCODE(0x90BC) |
29155 | { |
29156 | u32 adr, res; |
29157 | u32 src, dst; |
29158 | |
29159 | FETCH_LONG(src); |
29160 | dst = DREGu32((Opcode >> 9) & 7); |
29161 | res = dst - src; |
29162 | flag_NotZ = res; |
29163 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29164 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29165 | flag_N = res >> 24; |
29166 | DREGu32((Opcode >> 9) & 7) = res; |
29167 | RET(16) |
29168 | } |
29169 | |
29170 | // SUBaD |
29171 | OPCODE(0x909F) |
29172 | { |
29173 | u32 adr, res; |
29174 | u32 src, dst; |
29175 | |
29176 | adr = AREG(7); |
29177 | AREG(7) += 4; |
29178 | PRE_IO |
29179 | READ_LONG_F(adr, src) |
29180 | dst = DREGu32((Opcode >> 9) & 7); |
29181 | res = dst - src; |
29182 | flag_NotZ = res; |
29183 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29184 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29185 | flag_N = res >> 24; |
29186 | DREGu32((Opcode >> 9) & 7) = res; |
29187 | POST_IO |
29188 | RET(14) |
29189 | } |
29190 | |
29191 | // SUBaD |
29192 | OPCODE(0x90A7) |
29193 | { |
29194 | u32 adr, res; |
29195 | u32 src, dst; |
29196 | |
29197 | adr = AREG(7) - 4; |
29198 | AREG(7) = adr; |
29199 | PRE_IO |
29200 | READ_LONG_F(adr, src) |
29201 | dst = DREGu32((Opcode >> 9) & 7); |
29202 | res = dst - src; |
29203 | flag_NotZ = res; |
29204 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29205 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29206 | flag_N = res >> 24; |
29207 | DREGu32((Opcode >> 9) & 7) = res; |
29208 | POST_IO |
29209 | RET(16) |
29210 | } |
29211 | |
29212 | // SUBDa |
29213 | OPCODE(0x9110) |
29214 | { |
29215 | u32 adr, res; |
29216 | u32 src, dst; |
29217 | |
29218 | src = DREGu8((Opcode >> 9) & 7); |
29219 | adr = AREG((Opcode >> 0) & 7); |
29220 | PRE_IO |
29221 | READ_BYTE_F(adr, dst) |
29222 | res = dst - src; |
29223 | flag_N = flag_X = flag_C = res; |
29224 | flag_V = (src ^ dst) & (res ^ dst); |
29225 | flag_NotZ = res & 0xFF; |
29226 | WRITE_BYTE_F(adr, res) |
29227 | POST_IO |
29228 | RET(12) |
29229 | } |
29230 | |
29231 | // SUBDa |
29232 | OPCODE(0x9118) |
29233 | { |
29234 | u32 adr, res; |
29235 | u32 src, dst; |
29236 | |
29237 | src = DREGu8((Opcode >> 9) & 7); |
29238 | adr = AREG((Opcode >> 0) & 7); |
29239 | AREG((Opcode >> 0) & 7) += 1; |
29240 | PRE_IO |
29241 | READ_BYTE_F(adr, dst) |
29242 | res = dst - src; |
29243 | flag_N = flag_X = flag_C = res; |
29244 | flag_V = (src ^ dst) & (res ^ dst); |
29245 | flag_NotZ = res & 0xFF; |
29246 | WRITE_BYTE_F(adr, res) |
29247 | POST_IO |
29248 | RET(12) |
29249 | } |
29250 | |
29251 | // SUBDa |
29252 | OPCODE(0x9120) |
29253 | { |
29254 | u32 adr, res; |
29255 | u32 src, dst; |
29256 | |
29257 | src = DREGu8((Opcode >> 9) & 7); |
29258 | adr = AREG((Opcode >> 0) & 7) - 1; |
29259 | AREG((Opcode >> 0) & 7) = adr; |
29260 | PRE_IO |
29261 | READ_BYTE_F(adr, dst) |
29262 | res = dst - src; |
29263 | flag_N = flag_X = flag_C = res; |
29264 | flag_V = (src ^ dst) & (res ^ dst); |
29265 | flag_NotZ = res & 0xFF; |
29266 | WRITE_BYTE_F(adr, res) |
29267 | POST_IO |
29268 | RET(14) |
29269 | } |
29270 | |
29271 | // SUBDa |
29272 | OPCODE(0x9128) |
29273 | { |
29274 | u32 adr, res; |
29275 | u32 src, dst; |
29276 | |
29277 | src = DREGu8((Opcode >> 9) & 7); |
29278 | FETCH_SWORD(adr); |
29279 | adr += AREG((Opcode >> 0) & 7); |
29280 | PRE_IO |
29281 | READ_BYTE_F(adr, dst) |
29282 | res = dst - src; |
29283 | flag_N = flag_X = flag_C = res; |
29284 | flag_V = (src ^ dst) & (res ^ dst); |
29285 | flag_NotZ = res & 0xFF; |
29286 | WRITE_BYTE_F(adr, res) |
29287 | POST_IO |
29288 | RET(16) |
29289 | } |
29290 | |
29291 | // SUBDa |
29292 | OPCODE(0x9130) |
29293 | { |
29294 | u32 adr, res; |
29295 | u32 src, dst; |
29296 | |
29297 | src = DREGu8((Opcode >> 9) & 7); |
29298 | adr = AREG((Opcode >> 0) & 7); |
29299 | DECODE_EXT_WORD |
29300 | PRE_IO |
29301 | READ_BYTE_F(adr, dst) |
29302 | res = dst - src; |
29303 | flag_N = flag_X = flag_C = res; |
29304 | flag_V = (src ^ dst) & (res ^ dst); |
29305 | flag_NotZ = res & 0xFF; |
29306 | WRITE_BYTE_F(adr, res) |
29307 | POST_IO |
29308 | RET(18) |
29309 | } |
29310 | |
29311 | // SUBDa |
29312 | OPCODE(0x9138) |
29313 | { |
29314 | u32 adr, res; |
29315 | u32 src, dst; |
29316 | |
29317 | src = DREGu8((Opcode >> 9) & 7); |
29318 | FETCH_SWORD(adr); |
29319 | PRE_IO |
29320 | READ_BYTE_F(adr, dst) |
29321 | res = dst - src; |
29322 | flag_N = flag_X = flag_C = res; |
29323 | flag_V = (src ^ dst) & (res ^ dst); |
29324 | flag_NotZ = res & 0xFF; |
29325 | WRITE_BYTE_F(adr, res) |
29326 | POST_IO |
29327 | RET(16) |
29328 | } |
29329 | |
29330 | // SUBDa |
29331 | OPCODE(0x9139) |
29332 | { |
29333 | u32 adr, res; |
29334 | u32 src, dst; |
29335 | |
29336 | src = DREGu8((Opcode >> 9) & 7); |
29337 | FETCH_LONG(adr); |
29338 | PRE_IO |
29339 | READ_BYTE_F(adr, dst) |
29340 | res = dst - src; |
29341 | flag_N = flag_X = flag_C = res; |
29342 | flag_V = (src ^ dst) & (res ^ dst); |
29343 | flag_NotZ = res & 0xFF; |
29344 | WRITE_BYTE_F(adr, res) |
29345 | POST_IO |
29346 | RET(20) |
29347 | } |
29348 | |
29349 | // SUBDa |
29350 | OPCODE(0x911F) |
29351 | { |
29352 | u32 adr, res; |
29353 | u32 src, dst; |
29354 | |
29355 | src = DREGu8((Opcode >> 9) & 7); |
29356 | adr = AREG(7); |
29357 | AREG(7) += 2; |
29358 | PRE_IO |
29359 | READ_BYTE_F(adr, dst) |
29360 | res = dst - src; |
29361 | flag_N = flag_X = flag_C = res; |
29362 | flag_V = (src ^ dst) & (res ^ dst); |
29363 | flag_NotZ = res & 0xFF; |
29364 | WRITE_BYTE_F(adr, res) |
29365 | POST_IO |
29366 | RET(12) |
29367 | } |
29368 | |
29369 | // SUBDa |
29370 | OPCODE(0x9127) |
29371 | { |
29372 | u32 adr, res; |
29373 | u32 src, dst; |
29374 | |
29375 | src = DREGu8((Opcode >> 9) & 7); |
29376 | adr = AREG(7) - 2; |
29377 | AREG(7) = adr; |
29378 | PRE_IO |
29379 | READ_BYTE_F(adr, dst) |
29380 | res = dst - src; |
29381 | flag_N = flag_X = flag_C = res; |
29382 | flag_V = (src ^ dst) & (res ^ dst); |
29383 | flag_NotZ = res & 0xFF; |
29384 | WRITE_BYTE_F(adr, res) |
29385 | POST_IO |
29386 | RET(14) |
29387 | } |
29388 | |
29389 | // SUBDa |
29390 | OPCODE(0x9150) |
29391 | { |
29392 | u32 adr, res; |
29393 | u32 src, dst; |
29394 | |
29395 | src = DREGu16((Opcode >> 9) & 7); |
29396 | adr = AREG((Opcode >> 0) & 7); |
29397 | PRE_IO |
29398 | READ_WORD_F(adr, dst) |
29399 | res = dst - src; |
29400 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29401 | flag_N = flag_X = flag_C = res >> 8; |
29402 | flag_NotZ = res & 0xFFFF; |
29403 | WRITE_WORD_F(adr, res) |
29404 | POST_IO |
29405 | RET(12) |
29406 | } |
29407 | |
29408 | // SUBDa |
29409 | OPCODE(0x9158) |
29410 | { |
29411 | u32 adr, res; |
29412 | u32 src, dst; |
29413 | |
29414 | src = DREGu16((Opcode >> 9) & 7); |
29415 | adr = AREG((Opcode >> 0) & 7); |
29416 | AREG((Opcode >> 0) & 7) += 2; |
29417 | PRE_IO |
29418 | READ_WORD_F(adr, dst) |
29419 | res = dst - src; |
29420 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29421 | flag_N = flag_X = flag_C = res >> 8; |
29422 | flag_NotZ = res & 0xFFFF; |
29423 | WRITE_WORD_F(adr, res) |
29424 | POST_IO |
29425 | RET(12) |
29426 | } |
29427 | |
29428 | // SUBDa |
29429 | OPCODE(0x9160) |
29430 | { |
29431 | u32 adr, res; |
29432 | u32 src, dst; |
29433 | |
29434 | src = DREGu16((Opcode >> 9) & 7); |
29435 | adr = AREG((Opcode >> 0) & 7) - 2; |
29436 | AREG((Opcode >> 0) & 7) = adr; |
29437 | PRE_IO |
29438 | READ_WORD_F(adr, dst) |
29439 | res = dst - src; |
29440 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29441 | flag_N = flag_X = flag_C = res >> 8; |
29442 | flag_NotZ = res & 0xFFFF; |
29443 | WRITE_WORD_F(adr, res) |
29444 | POST_IO |
29445 | RET(14) |
29446 | } |
29447 | |
29448 | // SUBDa |
29449 | OPCODE(0x9168) |
29450 | { |
29451 | u32 adr, res; |
29452 | u32 src, dst; |
29453 | |
29454 | src = DREGu16((Opcode >> 9) & 7); |
29455 | FETCH_SWORD(adr); |
29456 | adr += AREG((Opcode >> 0) & 7); |
29457 | PRE_IO |
29458 | READ_WORD_F(adr, dst) |
29459 | res = dst - src; |
29460 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29461 | flag_N = flag_X = flag_C = res >> 8; |
29462 | flag_NotZ = res & 0xFFFF; |
29463 | WRITE_WORD_F(adr, res) |
29464 | POST_IO |
29465 | RET(16) |
29466 | } |
29467 | |
29468 | // SUBDa |
29469 | OPCODE(0x9170) |
29470 | { |
29471 | u32 adr, res; |
29472 | u32 src, dst; |
29473 | |
29474 | src = DREGu16((Opcode >> 9) & 7); |
29475 | adr = AREG((Opcode >> 0) & 7); |
29476 | DECODE_EXT_WORD |
29477 | PRE_IO |
29478 | READ_WORD_F(adr, dst) |
29479 | res = dst - src; |
29480 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29481 | flag_N = flag_X = flag_C = res >> 8; |
29482 | flag_NotZ = res & 0xFFFF; |
29483 | WRITE_WORD_F(adr, res) |
29484 | POST_IO |
29485 | RET(18) |
29486 | } |
29487 | |
29488 | // SUBDa |
29489 | OPCODE(0x9178) |
29490 | { |
29491 | u32 adr, res; |
29492 | u32 src, dst; |
29493 | |
29494 | src = DREGu16((Opcode >> 9) & 7); |
29495 | FETCH_SWORD(adr); |
29496 | PRE_IO |
29497 | READ_WORD_F(adr, dst) |
29498 | res = dst - src; |
29499 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29500 | flag_N = flag_X = flag_C = res >> 8; |
29501 | flag_NotZ = res & 0xFFFF; |
29502 | WRITE_WORD_F(adr, res) |
29503 | POST_IO |
29504 | RET(16) |
29505 | } |
29506 | |
29507 | // SUBDa |
29508 | OPCODE(0x9179) |
29509 | { |
29510 | u32 adr, res; |
29511 | u32 src, dst; |
29512 | |
29513 | src = DREGu16((Opcode >> 9) & 7); |
29514 | FETCH_LONG(adr); |
29515 | PRE_IO |
29516 | READ_WORD_F(adr, dst) |
29517 | res = dst - src; |
29518 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29519 | flag_N = flag_X = flag_C = res >> 8; |
29520 | flag_NotZ = res & 0xFFFF; |
29521 | WRITE_WORD_F(adr, res) |
29522 | POST_IO |
29523 | RET(20) |
29524 | } |
29525 | |
29526 | // SUBDa |
29527 | OPCODE(0x915F) |
29528 | { |
29529 | u32 adr, res; |
29530 | u32 src, dst; |
29531 | |
29532 | src = DREGu16((Opcode >> 9) & 7); |
29533 | adr = AREG(7); |
29534 | AREG(7) += 2; |
29535 | PRE_IO |
29536 | READ_WORD_F(adr, dst) |
29537 | res = dst - src; |
29538 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29539 | flag_N = flag_X = flag_C = res >> 8; |
29540 | flag_NotZ = res & 0xFFFF; |
29541 | WRITE_WORD_F(adr, res) |
29542 | POST_IO |
29543 | RET(12) |
29544 | } |
29545 | |
29546 | // SUBDa |
29547 | OPCODE(0x9167) |
29548 | { |
29549 | u32 adr, res; |
29550 | u32 src, dst; |
29551 | |
29552 | src = DREGu16((Opcode >> 9) & 7); |
29553 | adr = AREG(7) - 2; |
29554 | AREG(7) = adr; |
29555 | PRE_IO |
29556 | READ_WORD_F(adr, dst) |
29557 | res = dst - src; |
29558 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29559 | flag_N = flag_X = flag_C = res >> 8; |
29560 | flag_NotZ = res & 0xFFFF; |
29561 | WRITE_WORD_F(adr, res) |
29562 | POST_IO |
29563 | RET(14) |
29564 | } |
29565 | |
29566 | // SUBDa |
29567 | OPCODE(0x9190) |
29568 | { |
29569 | u32 adr, res; |
29570 | u32 src, dst; |
29571 | |
29572 | src = DREGu32((Opcode >> 9) & 7); |
29573 | adr = AREG((Opcode >> 0) & 7); |
29574 | PRE_IO |
29575 | READ_LONG_F(adr, dst) |
29576 | res = dst - src; |
29577 | flag_NotZ = res; |
29578 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29579 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29580 | flag_N = res >> 24; |
29581 | WRITE_LONG_F(adr, res) |
29582 | POST_IO |
29583 | RET(20) |
29584 | } |
29585 | |
29586 | // SUBDa |
29587 | OPCODE(0x9198) |
29588 | { |
29589 | u32 adr, res; |
29590 | u32 src, dst; |
29591 | |
29592 | src = DREGu32((Opcode >> 9) & 7); |
29593 | adr = AREG((Opcode >> 0) & 7); |
29594 | AREG((Opcode >> 0) & 7) += 4; |
29595 | PRE_IO |
29596 | READ_LONG_F(adr, dst) |
29597 | res = dst - src; |
29598 | flag_NotZ = res; |
29599 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29600 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29601 | flag_N = res >> 24; |
29602 | WRITE_LONG_F(adr, res) |
29603 | POST_IO |
29604 | RET(20) |
29605 | } |
29606 | |
29607 | // SUBDa |
29608 | OPCODE(0x91A0) |
29609 | { |
29610 | u32 adr, res; |
29611 | u32 src, dst; |
29612 | |
29613 | src = DREGu32((Opcode >> 9) & 7); |
29614 | adr = AREG((Opcode >> 0) & 7) - 4; |
29615 | AREG((Opcode >> 0) & 7) = adr; |
29616 | PRE_IO |
29617 | READ_LONG_F(adr, dst) |
29618 | res = dst - src; |
29619 | flag_NotZ = res; |
29620 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29621 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29622 | flag_N = res >> 24; |
29623 | WRITE_LONG_F(adr, res) |
29624 | POST_IO |
29625 | RET(22) |
29626 | } |
29627 | |
29628 | // SUBDa |
29629 | OPCODE(0x91A8) |
29630 | { |
29631 | u32 adr, res; |
29632 | u32 src, dst; |
29633 | |
29634 | src = DREGu32((Opcode >> 9) & 7); |
29635 | FETCH_SWORD(adr); |
29636 | adr += AREG((Opcode >> 0) & 7); |
29637 | PRE_IO |
29638 | READ_LONG_F(adr, dst) |
29639 | res = dst - src; |
29640 | flag_NotZ = res; |
29641 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29642 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29643 | flag_N = res >> 24; |
29644 | WRITE_LONG_F(adr, res) |
29645 | POST_IO |
29646 | RET(24) |
29647 | } |
29648 | |
29649 | // SUBDa |
29650 | OPCODE(0x91B0) |
29651 | { |
29652 | u32 adr, res; |
29653 | u32 src, dst; |
29654 | |
29655 | src = DREGu32((Opcode >> 9) & 7); |
29656 | adr = AREG((Opcode >> 0) & 7); |
29657 | DECODE_EXT_WORD |
29658 | PRE_IO |
29659 | READ_LONG_F(adr, dst) |
29660 | res = dst - src; |
29661 | flag_NotZ = res; |
29662 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29663 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29664 | flag_N = res >> 24; |
29665 | WRITE_LONG_F(adr, res) |
29666 | POST_IO |
29667 | RET(26) |
29668 | } |
29669 | |
29670 | // SUBDa |
29671 | OPCODE(0x91B8) |
29672 | { |
29673 | u32 adr, res; |
29674 | u32 src, dst; |
29675 | |
29676 | src = DREGu32((Opcode >> 9) & 7); |
29677 | FETCH_SWORD(adr); |
29678 | PRE_IO |
29679 | READ_LONG_F(adr, dst) |
29680 | res = dst - src; |
29681 | flag_NotZ = res; |
29682 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29683 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29684 | flag_N = res >> 24; |
29685 | WRITE_LONG_F(adr, res) |
29686 | POST_IO |
29687 | RET(24) |
29688 | } |
29689 | |
29690 | // SUBDa |
29691 | OPCODE(0x91B9) |
29692 | { |
29693 | u32 adr, res; |
29694 | u32 src, dst; |
29695 | |
29696 | src = DREGu32((Opcode >> 9) & 7); |
29697 | FETCH_LONG(adr); |
29698 | PRE_IO |
29699 | READ_LONG_F(adr, dst) |
29700 | res = dst - src; |
29701 | flag_NotZ = res; |
29702 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29703 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29704 | flag_N = res >> 24; |
29705 | WRITE_LONG_F(adr, res) |
29706 | POST_IO |
29707 | RET(28) |
29708 | } |
29709 | |
29710 | // SUBDa |
29711 | OPCODE(0x919F) |
29712 | { |
29713 | u32 adr, res; |
29714 | u32 src, dst; |
29715 | |
29716 | src = DREGu32((Opcode >> 9) & 7); |
29717 | adr = AREG(7); |
29718 | AREG(7) += 4; |
29719 | PRE_IO |
29720 | READ_LONG_F(adr, dst) |
29721 | res = dst - src; |
29722 | flag_NotZ = res; |
29723 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29724 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29725 | flag_N = res >> 24; |
29726 | WRITE_LONG_F(adr, res) |
29727 | POST_IO |
29728 | RET(20) |
29729 | } |
29730 | |
29731 | // SUBDa |
29732 | OPCODE(0x91A7) |
29733 | { |
29734 | u32 adr, res; |
29735 | u32 src, dst; |
29736 | |
29737 | src = DREGu32((Opcode >> 9) & 7); |
29738 | adr = AREG(7) - 4; |
29739 | AREG(7) = adr; |
29740 | PRE_IO |
29741 | READ_LONG_F(adr, dst) |
29742 | res = dst - src; |
29743 | flag_NotZ = res; |
29744 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29745 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29746 | flag_N = res >> 24; |
29747 | WRITE_LONG_F(adr, res) |
29748 | POST_IO |
29749 | RET(22) |
29750 | } |
29751 | |
29752 | // SUBX |
29753 | OPCODE(0x9100) |
29754 | { |
29755 | u32 adr, res; |
29756 | u32 src, dst; |
29757 | |
29758 | src = DREGu8((Opcode >> 0) & 7); |
29759 | dst = DREGu8((Opcode >> 9) & 7); |
29760 | res = dst - src - ((flag_X >> 8) & 1); |
29761 | flag_N = flag_X = flag_C = res; |
29762 | flag_V = (src ^ dst) & (res ^ dst); |
29763 | flag_NotZ |= res & 0xFF; |
29764 | DREGu8((Opcode >> 9) & 7) = res; |
29765 | RET(4) |
29766 | } |
29767 | |
29768 | // SUBX |
29769 | OPCODE(0x9140) |
29770 | { |
29771 | u32 adr, res; |
29772 | u32 src, dst; |
29773 | |
29774 | src = DREGu16((Opcode >> 0) & 7); |
29775 | dst = DREGu16((Opcode >> 9) & 7); |
29776 | res = dst - src - ((flag_X >> 8) & 1); |
29777 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29778 | flag_N = flag_X = flag_C = res >> 8; |
29779 | flag_NotZ |= res & 0xFFFF; |
29780 | DREGu16((Opcode >> 9) & 7) = res; |
29781 | RET(4) |
29782 | } |
29783 | |
29784 | // SUBX |
29785 | OPCODE(0x9180) |
29786 | { |
29787 | u32 adr, res; |
29788 | u32 src, dst; |
29789 | |
29790 | src = DREGu32((Opcode >> 0) & 7); |
29791 | dst = DREGu32((Opcode >> 9) & 7); |
29792 | res = dst - src - ((flag_X >> 8) & 1); |
29793 | flag_NotZ |= res; |
29794 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29795 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29796 | flag_N = res >> 24; |
29797 | DREGu32((Opcode >> 9) & 7) = res; |
29798 | RET(8) |
29799 | } |
29800 | |
29801 | // SUBXM |
29802 | OPCODE(0x9108) |
29803 | { |
29804 | u32 adr, res; |
29805 | u32 src, dst; |
29806 | |
29807 | adr = AREG((Opcode >> 0) & 7) - 1; |
29808 | AREG((Opcode >> 0) & 7) = adr; |
29809 | PRE_IO |
29810 | READ_BYTE_F(adr, src) |
29811 | adr = AREG((Opcode >> 9) & 7) - 1; |
29812 | AREG((Opcode >> 9) & 7) = adr; |
29813 | READ_BYTE_F(adr, dst) |
29814 | res = dst - src - ((flag_X >> 8) & 1); |
29815 | flag_N = flag_X = flag_C = res; |
29816 | flag_V = (src ^ dst) & (res ^ dst); |
29817 | flag_NotZ |= res & 0xFF; |
29818 | WRITE_BYTE_F(adr, res) |
29819 | POST_IO |
29820 | RET(18) |
29821 | } |
29822 | |
29823 | // SUBXM |
29824 | OPCODE(0x9148) |
29825 | { |
29826 | u32 adr, res; |
29827 | u32 src, dst; |
29828 | |
29829 | adr = AREG((Opcode >> 0) & 7) - 2; |
29830 | AREG((Opcode >> 0) & 7) = adr; |
29831 | PRE_IO |
29832 | READ_WORD_F(adr, src) |
29833 | adr = AREG((Opcode >> 9) & 7) - 2; |
29834 | AREG((Opcode >> 9) & 7) = adr; |
29835 | READ_WORD_F(adr, dst) |
29836 | res = dst - src - ((flag_X >> 8) & 1); |
29837 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29838 | flag_N = flag_X = flag_C = res >> 8; |
29839 | flag_NotZ |= res & 0xFFFF; |
29840 | WRITE_WORD_F(adr, res) |
29841 | POST_IO |
29842 | RET(18) |
29843 | } |
29844 | |
29845 | // SUBXM |
29846 | OPCODE(0x9188) |
29847 | { |
29848 | u32 adr, res; |
29849 | u32 src, dst; |
29850 | |
29851 | adr = AREG((Opcode >> 0) & 7) - 4; |
29852 | AREG((Opcode >> 0) & 7) = adr; |
29853 | PRE_IO |
29854 | READ_LONG_F(adr, src) |
29855 | adr = AREG((Opcode >> 9) & 7) - 4; |
29856 | AREG((Opcode >> 9) & 7) = adr; |
29857 | READ_LONG_F(adr, dst) |
29858 | res = dst - src - ((flag_X >> 8) & 1); |
29859 | flag_NotZ |= res; |
29860 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29861 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29862 | flag_N = res >> 24; |
29863 | WRITE_LONG_F(adr, res) |
29864 | POST_IO |
29865 | RET(30) |
29866 | } |
29867 | |
29868 | // SUBX7M |
29869 | OPCODE(0x910F) |
29870 | { |
29871 | u32 adr, res; |
29872 | u32 src, dst; |
29873 | |
29874 | adr = AREG(7) - 2; |
29875 | AREG(7) = adr; |
29876 | PRE_IO |
29877 | READ_BYTE_F(adr, src) |
29878 | adr = AREG((Opcode >> 9) & 7) - 1; |
29879 | AREG((Opcode >> 9) & 7) = adr; |
29880 | READ_BYTE_F(adr, dst) |
29881 | res = dst - src - ((flag_X >> 8) & 1); |
29882 | flag_N = flag_X = flag_C = res; |
29883 | flag_V = (src ^ dst) & (res ^ dst); |
29884 | flag_NotZ |= res & 0xFF; |
29885 | WRITE_BYTE_F(adr, res) |
29886 | POST_IO |
29887 | RET(18) |
29888 | } |
29889 | |
29890 | // SUBX7M |
29891 | OPCODE(0x914F) |
29892 | { |
29893 | u32 adr, res; |
29894 | u32 src, dst; |
29895 | |
29896 | adr = AREG(7) - 2; |
29897 | AREG(7) = adr; |
29898 | PRE_IO |
29899 | READ_WORD_F(adr, src) |
29900 | adr = AREG((Opcode >> 9) & 7) - 2; |
29901 | AREG((Opcode >> 9) & 7) = adr; |
29902 | READ_WORD_F(adr, dst) |
29903 | res = dst - src - ((flag_X >> 8) & 1); |
29904 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29905 | flag_N = flag_X = flag_C = res >> 8; |
29906 | flag_NotZ |= res & 0xFFFF; |
29907 | WRITE_WORD_F(adr, res) |
29908 | POST_IO |
29909 | RET(18) |
29910 | } |
29911 | |
29912 | // SUBX7M |
29913 | OPCODE(0x918F) |
29914 | { |
29915 | u32 adr, res; |
29916 | u32 src, dst; |
29917 | |
29918 | adr = AREG(7) - 4; |
29919 | AREG(7) = adr; |
29920 | PRE_IO |
29921 | READ_LONG_F(adr, src) |
29922 | adr = AREG((Opcode >> 9) & 7) - 4; |
29923 | AREG((Opcode >> 9) & 7) = adr; |
29924 | READ_LONG_F(adr, dst) |
29925 | res = dst - src - ((flag_X >> 8) & 1); |
29926 | flag_NotZ |= res; |
29927 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29928 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29929 | flag_N = res >> 24; |
29930 | WRITE_LONG_F(adr, res) |
29931 | POST_IO |
29932 | RET(30) |
29933 | } |
29934 | |
29935 | // SUBXM7 |
29936 | OPCODE(0x9F08) |
29937 | { |
29938 | u32 adr, res; |
29939 | u32 src, dst; |
29940 | |
29941 | adr = AREG((Opcode >> 0) & 7) - 1; |
29942 | AREG((Opcode >> 0) & 7) = adr; |
29943 | PRE_IO |
29944 | READ_BYTE_F(adr, src) |
29945 | adr = AREG(7) - 2; |
29946 | AREG(7) = adr; |
29947 | READ_BYTE_F(adr, dst) |
29948 | res = dst - src - ((flag_X >> 8) & 1); |
29949 | flag_N = flag_X = flag_C = res; |
29950 | flag_V = (src ^ dst) & (res ^ dst); |
29951 | flag_NotZ |= res & 0xFF; |
29952 | WRITE_BYTE_F(adr, res) |
29953 | POST_IO |
29954 | RET(18) |
29955 | } |
29956 | |
29957 | // SUBXM7 |
29958 | OPCODE(0x9F48) |
29959 | { |
29960 | u32 adr, res; |
29961 | u32 src, dst; |
29962 | |
29963 | adr = AREG((Opcode >> 0) & 7) - 2; |
29964 | AREG((Opcode >> 0) & 7) = adr; |
29965 | PRE_IO |
29966 | READ_WORD_F(adr, src) |
29967 | adr = AREG(7) - 2; |
29968 | AREG(7) = adr; |
29969 | READ_WORD_F(adr, dst) |
29970 | res = dst - src - ((flag_X >> 8) & 1); |
29971 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29972 | flag_N = flag_X = flag_C = res >> 8; |
29973 | flag_NotZ |= res & 0xFFFF; |
29974 | WRITE_WORD_F(adr, res) |
29975 | POST_IO |
29976 | RET(18) |
29977 | } |
29978 | |
29979 | // SUBXM7 |
29980 | OPCODE(0x9F88) |
29981 | { |
29982 | u32 adr, res; |
29983 | u32 src, dst; |
29984 | |
29985 | adr = AREG((Opcode >> 0) & 7) - 4; |
29986 | AREG((Opcode >> 0) & 7) = adr; |
29987 | PRE_IO |
29988 | READ_LONG_F(adr, src) |
29989 | adr = AREG(7) - 4; |
29990 | AREG(7) = adr; |
29991 | READ_LONG_F(adr, dst) |
29992 | res = dst - src - ((flag_X >> 8) & 1); |
29993 | flag_NotZ |= res; |
29994 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29995 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29996 | flag_N = res >> 24; |
29997 | WRITE_LONG_F(adr, res) |
29998 | POST_IO |
29999 | RET(30) |
30000 | } |
30001 | |
30002 | // SUBX7M7 |
30003 | OPCODE(0x9F0F) |
30004 | { |
30005 | u32 adr, res; |
30006 | u32 src, dst; |
30007 | |
30008 | adr = AREG(7) - 2; |
30009 | AREG(7) = adr; |
30010 | PRE_IO |
30011 | READ_BYTE_F(adr, src) |
30012 | adr = AREG(7) - 2; |
30013 | AREG(7) = adr; |
30014 | READ_BYTE_F(adr, dst) |
30015 | res = dst - src - ((flag_X >> 8) & 1); |
30016 | flag_N = flag_X = flag_C = res; |
30017 | flag_V = (src ^ dst) & (res ^ dst); |
30018 | flag_NotZ |= res & 0xFF; |
30019 | WRITE_BYTE_F(adr, res) |
30020 | POST_IO |
30021 | RET(18) |
30022 | } |
30023 | |
30024 | // SUBX7M7 |
30025 | OPCODE(0x9F4F) |
30026 | { |
30027 | u32 adr, res; |
30028 | u32 src, dst; |
30029 | |
30030 | adr = AREG(7) - 2; |
30031 | AREG(7) = adr; |
30032 | PRE_IO |
30033 | READ_WORD_F(adr, src) |
30034 | adr = AREG(7) - 2; |
30035 | AREG(7) = adr; |
30036 | READ_WORD_F(adr, dst) |
30037 | res = dst - src - ((flag_X >> 8) & 1); |
30038 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30039 | flag_N = flag_X = flag_C = res >> 8; |
30040 | flag_NotZ |= res & 0xFFFF; |
30041 | WRITE_WORD_F(adr, res) |
30042 | POST_IO |
30043 | RET(18) |
30044 | } |
30045 | |
30046 | // SUBX7M7 |
30047 | OPCODE(0x9F8F) |
30048 | { |
30049 | u32 adr, res; |
30050 | u32 src, dst; |
30051 | |
30052 | adr = AREG(7) - 4; |
30053 | AREG(7) = adr; |
30054 | PRE_IO |
30055 | READ_LONG_F(adr, src) |
30056 | adr = AREG(7) - 4; |
30057 | AREG(7) = adr; |
30058 | READ_LONG_F(adr, dst) |
30059 | res = dst - src - ((flag_X >> 8) & 1); |
30060 | flag_NotZ |= res; |
30061 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30062 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30063 | flag_N = res >> 24; |
30064 | WRITE_LONG_F(adr, res) |
30065 | POST_IO |
30066 | RET(30) |
30067 | } |
30068 | |
30069 | // SUBA |
30070 | OPCODE(0x90C0) |
30071 | { |
30072 | u32 adr, res; |
30073 | u32 src, dst; |
30074 | |
30075 | src = (s32)DREGs16((Opcode >> 0) & 7); |
30076 | dst = AREGu32((Opcode >> 9) & 7); |
30077 | res = dst - src; |
30078 | AREG((Opcode >> 9) & 7) = res; |
30079 | RET(8) |
30080 | } |
30081 | |
30082 | // SUBA |
30083 | OPCODE(0x90C8) |
30084 | { |
30085 | u32 adr, res; |
30086 | u32 src, dst; |
30087 | |
30088 | src = (s32)AREGs16((Opcode >> 0) & 7); |
30089 | dst = AREGu32((Opcode >> 9) & 7); |
30090 | res = dst - src; |
30091 | AREG((Opcode >> 9) & 7) = res; |
30092 | RET(8) |
30093 | } |
30094 | |
30095 | // SUBA |
30096 | OPCODE(0x90D0) |
30097 | { |
30098 | u32 adr, res; |
30099 | u32 src, dst; |
30100 | |
30101 | adr = AREG((Opcode >> 0) & 7); |
30102 | PRE_IO |
30103 | READSX_WORD_F(adr, src) |
30104 | dst = AREGu32((Opcode >> 9) & 7); |
30105 | res = dst - src; |
30106 | AREG((Opcode >> 9) & 7) = res; |
30107 | POST_IO |
9d917eea |
30108 | #ifdef USE_CYCLONE_TIMING |
30109 | RET(12) |
30110 | #else |
70357ce5 |
30111 | RET(10) |
9d917eea |
30112 | #endif |
70357ce5 |
30113 | } |
30114 | |
30115 | // SUBA |
30116 | OPCODE(0x90D8) |
30117 | { |
30118 | u32 adr, res; |
30119 | u32 src, dst; |
30120 | |
30121 | adr = AREG((Opcode >> 0) & 7); |
30122 | AREG((Opcode >> 0) & 7) += 2; |
30123 | PRE_IO |
30124 | READSX_WORD_F(adr, src) |
30125 | dst = AREGu32((Opcode >> 9) & 7); |
30126 | res = dst - src; |
30127 | AREG((Opcode >> 9) & 7) = res; |
30128 | POST_IO |
9d917eea |
30129 | #ifdef USE_CYCLONE_TIMING |
30130 | RET(12) |
30131 | #else |
70357ce5 |
30132 | RET(10) |
9d917eea |
30133 | #endif |
70357ce5 |
30134 | } |
30135 | |
30136 | // SUBA |
30137 | OPCODE(0x90E0) |
30138 | { |
30139 | u32 adr, res; |
30140 | u32 src, dst; |
30141 | |
30142 | adr = AREG((Opcode >> 0) & 7) - 2; |
30143 | AREG((Opcode >> 0) & 7) = adr; |
30144 | PRE_IO |
30145 | READSX_WORD_F(adr, src) |
30146 | dst = AREGu32((Opcode >> 9) & 7); |
30147 | res = dst - src; |
30148 | AREG((Opcode >> 9) & 7) = res; |
30149 | POST_IO |
9d917eea |
30150 | #ifdef USE_CYCLONE_TIMING |
30151 | RET(14) |
30152 | #else |
70357ce5 |
30153 | RET(12) |
9d917eea |
30154 | #endif |
70357ce5 |
30155 | } |
30156 | |
30157 | // SUBA |
30158 | OPCODE(0x90E8) |
30159 | { |
30160 | u32 adr, res; |
30161 | u32 src, dst; |
30162 | |
30163 | FETCH_SWORD(adr); |
30164 | adr += AREG((Opcode >> 0) & 7); |
30165 | PRE_IO |
30166 | READSX_WORD_F(adr, src) |
30167 | dst = AREGu32((Opcode >> 9) & 7); |
30168 | res = dst - src; |
30169 | AREG((Opcode >> 9) & 7) = res; |
30170 | POST_IO |
9d917eea |
30171 | #ifdef USE_CYCLONE_TIMING |
30172 | RET(16) |
30173 | #else |
70357ce5 |
30174 | RET(14) |
9d917eea |
30175 | #endif |
70357ce5 |
30176 | } |
30177 | |
30178 | // SUBA |
30179 | OPCODE(0x90F0) |
30180 | { |
30181 | u32 adr, res; |
30182 | u32 src, dst; |
30183 | |
30184 | adr = AREG((Opcode >> 0) & 7); |
30185 | DECODE_EXT_WORD |
30186 | PRE_IO |
30187 | READSX_WORD_F(adr, src) |
30188 | dst = AREGu32((Opcode >> 9) & 7); |
30189 | res = dst - src; |
30190 | AREG((Opcode >> 9) & 7) = res; |
30191 | POST_IO |
9d917eea |
30192 | #ifdef USE_CYCLONE_TIMING |
30193 | RET(18) |
30194 | #else |
70357ce5 |
30195 | RET(16) |
9d917eea |
30196 | #endif |
70357ce5 |
30197 | } |
30198 | |
30199 | // SUBA |
30200 | OPCODE(0x90F8) |
30201 | { |
30202 | u32 adr, res; |
30203 | u32 src, dst; |
30204 | |
30205 | FETCH_SWORD(adr); |
30206 | PRE_IO |
30207 | READSX_WORD_F(adr, src) |
30208 | dst = AREGu32((Opcode >> 9) & 7); |
30209 | res = dst - src; |
30210 | AREG((Opcode >> 9) & 7) = res; |
30211 | POST_IO |
9d917eea |
30212 | #ifdef USE_CYCLONE_TIMING |
30213 | RET(16) |
30214 | #else |
70357ce5 |
30215 | RET(14) |
9d917eea |
30216 | #endif |
70357ce5 |
30217 | } |
30218 | |
30219 | // SUBA |
30220 | OPCODE(0x90F9) |
30221 | { |
30222 | u32 adr, res; |
30223 | u32 src, dst; |
30224 | |
30225 | FETCH_LONG(adr); |
30226 | PRE_IO |
30227 | READSX_WORD_F(adr, src) |
30228 | dst = AREGu32((Opcode >> 9) & 7); |
30229 | res = dst - src; |
30230 | AREG((Opcode >> 9) & 7) = res; |
30231 | POST_IO |
9d917eea |
30232 | #ifdef USE_CYCLONE_TIMING |
30233 | RET(20) |
30234 | #else |
70357ce5 |
30235 | RET(18) |
9d917eea |
30236 | #endif |
70357ce5 |
30237 | } |
30238 | |
30239 | // SUBA |
30240 | OPCODE(0x90FA) |
30241 | { |
30242 | u32 adr, res; |
30243 | u32 src, dst; |
30244 | |
30245 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30246 | PC++; |
30247 | PRE_IO |
30248 | READSX_WORD_F(adr, src) |
30249 | dst = AREGu32((Opcode >> 9) & 7); |
30250 | res = dst - src; |
30251 | AREG((Opcode >> 9) & 7) = res; |
30252 | POST_IO |
9d917eea |
30253 | #ifdef USE_CYCLONE_TIMING |
30254 | RET(16) |
30255 | #else |
70357ce5 |
30256 | RET(14) |
9d917eea |
30257 | #endif |
70357ce5 |
30258 | } |
30259 | |
30260 | // SUBA |
30261 | OPCODE(0x90FB) |
30262 | { |
30263 | u32 adr, res; |
30264 | u32 src, dst; |
30265 | |
30266 | adr = (u32)(PC) - BasePC; |
30267 | DECODE_EXT_WORD |
30268 | PRE_IO |
30269 | READSX_WORD_F(adr, src) |
30270 | dst = AREGu32((Opcode >> 9) & 7); |
30271 | res = dst - src; |
30272 | AREG((Opcode >> 9) & 7) = res; |
30273 | POST_IO |
9d917eea |
30274 | #ifdef USE_CYCLONE_TIMING |
30275 | RET(18) |
30276 | #else |
70357ce5 |
30277 | RET(16) |
9d917eea |
30278 | #endif |
70357ce5 |
30279 | } |
30280 | |
30281 | // SUBA |
30282 | OPCODE(0x90FC) |
30283 | { |
30284 | u32 adr, res; |
30285 | u32 src, dst; |
30286 | |
30287 | FETCH_SWORD(src); |
30288 | dst = AREGu32((Opcode >> 9) & 7); |
30289 | res = dst - src; |
30290 | AREG((Opcode >> 9) & 7) = res; |
30291 | RET(12) |
30292 | } |
30293 | |
30294 | // SUBA |
30295 | OPCODE(0x90DF) |
30296 | { |
30297 | u32 adr, res; |
30298 | u32 src, dst; |
30299 | |
30300 | adr = AREG(7); |
30301 | AREG(7) += 2; |
30302 | PRE_IO |
30303 | READSX_WORD_F(adr, src) |
30304 | dst = AREGu32((Opcode >> 9) & 7); |
30305 | res = dst - src; |
30306 | AREG((Opcode >> 9) & 7) = res; |
30307 | POST_IO |
9d917eea |
30308 | #ifdef USE_CYCLONE_TIMING |
30309 | RET(12) |
30310 | #else |
70357ce5 |
30311 | RET(10) |
9d917eea |
30312 | #endif |
70357ce5 |
30313 | } |
30314 | |
30315 | // SUBA |
30316 | OPCODE(0x90E7) |
30317 | { |
30318 | u32 adr, res; |
30319 | u32 src, dst; |
30320 | |
30321 | adr = AREG(7) - 2; |
30322 | AREG(7) = adr; |
30323 | PRE_IO |
30324 | READSX_WORD_F(adr, src) |
30325 | dst = AREGu32((Opcode >> 9) & 7); |
30326 | res = dst - src; |
30327 | AREG((Opcode >> 9) & 7) = res; |
30328 | POST_IO |
9d917eea |
30329 | #ifdef USE_CYCLONE_TIMING |
30330 | RET(14) |
30331 | #else |
70357ce5 |
30332 | RET(12) |
9d917eea |
30333 | #endif |
70357ce5 |
30334 | } |
30335 | |
30336 | // SUBA |
30337 | OPCODE(0x91C0) |
30338 | { |
30339 | u32 adr, res; |
30340 | u32 src, dst; |
30341 | |
30342 | src = (s32)DREGs32((Opcode >> 0) & 7); |
30343 | dst = AREGu32((Opcode >> 9) & 7); |
30344 | res = dst - src; |
30345 | AREG((Opcode >> 9) & 7) = res; |
30346 | #ifdef USE_CYCLONE_TIMING |
30347 | RET(8) |
30348 | #else |
30349 | RET(6) |
30350 | #endif |
30351 | } |
30352 | |
30353 | // SUBA |
30354 | OPCODE(0x91C8) |
30355 | { |
30356 | u32 adr, res; |
30357 | u32 src, dst; |
30358 | |
30359 | src = (s32)AREGs32((Opcode >> 0) & 7); |
30360 | dst = AREGu32((Opcode >> 9) & 7); |
30361 | res = dst - src; |
30362 | AREG((Opcode >> 9) & 7) = res; |
30363 | #ifdef USE_CYCLONE_TIMING |
30364 | RET(8) |
30365 | #else |
30366 | RET(6) |
30367 | #endif |
30368 | } |
30369 | |
30370 | // SUBA |
30371 | OPCODE(0x91D0) |
30372 | { |
30373 | u32 adr, res; |
30374 | u32 src, dst; |
30375 | |
30376 | adr = AREG((Opcode >> 0) & 7); |
30377 | PRE_IO |
30378 | READSX_LONG_F(adr, src) |
30379 | dst = AREGu32((Opcode >> 9) & 7); |
30380 | res = dst - src; |
30381 | AREG((Opcode >> 9) & 7) = res; |
30382 | POST_IO |
30383 | RET(14) |
30384 | } |
30385 | |
30386 | // SUBA |
30387 | OPCODE(0x91D8) |
30388 | { |
30389 | u32 adr, res; |
30390 | u32 src, dst; |
30391 | |
30392 | adr = AREG((Opcode >> 0) & 7); |
30393 | AREG((Opcode >> 0) & 7) += 4; |
30394 | PRE_IO |
30395 | READSX_LONG_F(adr, src) |
30396 | dst = AREGu32((Opcode >> 9) & 7); |
30397 | res = dst - src; |
30398 | AREG((Opcode >> 9) & 7) = res; |
30399 | POST_IO |
30400 | RET(14) |
30401 | } |
30402 | |
30403 | // SUBA |
30404 | OPCODE(0x91E0) |
30405 | { |
30406 | u32 adr, res; |
30407 | u32 src, dst; |
30408 | |
30409 | adr = AREG((Opcode >> 0) & 7) - 4; |
30410 | AREG((Opcode >> 0) & 7) = adr; |
30411 | PRE_IO |
30412 | READSX_LONG_F(adr, src) |
30413 | dst = AREGu32((Opcode >> 9) & 7); |
30414 | res = dst - src; |
30415 | AREG((Opcode >> 9) & 7) = res; |
30416 | POST_IO |
30417 | RET(16) |
30418 | } |
30419 | |
30420 | // SUBA |
30421 | OPCODE(0x91E8) |
30422 | { |
30423 | u32 adr, res; |
30424 | u32 src, dst; |
30425 | |
30426 | FETCH_SWORD(adr); |
30427 | adr += AREG((Opcode >> 0) & 7); |
30428 | PRE_IO |
30429 | READSX_LONG_F(adr, src) |
30430 | dst = AREGu32((Opcode >> 9) & 7); |
30431 | res = dst - src; |
30432 | AREG((Opcode >> 9) & 7) = res; |
30433 | POST_IO |
30434 | RET(18) |
30435 | } |
30436 | |
30437 | // SUBA |
30438 | OPCODE(0x91F0) |
30439 | { |
30440 | u32 adr, res; |
30441 | u32 src, dst; |
30442 | |
30443 | adr = AREG((Opcode >> 0) & 7); |
30444 | DECODE_EXT_WORD |
30445 | PRE_IO |
30446 | READSX_LONG_F(adr, src) |
30447 | dst = AREGu32((Opcode >> 9) & 7); |
30448 | res = dst - src; |
30449 | AREG((Opcode >> 9) & 7) = res; |
30450 | POST_IO |
30451 | RET(20) |
30452 | } |
30453 | |
30454 | // SUBA |
30455 | OPCODE(0x91F8) |
30456 | { |
30457 | u32 adr, res; |
30458 | u32 src, dst; |
30459 | |
30460 | FETCH_SWORD(adr); |
30461 | PRE_IO |
30462 | READSX_LONG_F(adr, src) |
30463 | dst = AREGu32((Opcode >> 9) & 7); |
30464 | res = dst - src; |
30465 | AREG((Opcode >> 9) & 7) = res; |
30466 | POST_IO |
30467 | RET(18) |
30468 | } |
30469 | |
30470 | // SUBA |
30471 | OPCODE(0x91F9) |
30472 | { |
30473 | u32 adr, res; |
30474 | u32 src, dst; |
30475 | |
30476 | FETCH_LONG(adr); |
30477 | PRE_IO |
30478 | READSX_LONG_F(adr, src) |
30479 | dst = AREGu32((Opcode >> 9) & 7); |
30480 | res = dst - src; |
30481 | AREG((Opcode >> 9) & 7) = res; |
30482 | POST_IO |
30483 | RET(22) |
30484 | } |
30485 | |
30486 | // SUBA |
30487 | OPCODE(0x91FA) |
30488 | { |
30489 | u32 adr, res; |
30490 | u32 src, dst; |
30491 | |
30492 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30493 | PC++; |
30494 | PRE_IO |
30495 | READSX_LONG_F(adr, src) |
30496 | dst = AREGu32((Opcode >> 9) & 7); |
30497 | res = dst - src; |
30498 | AREG((Opcode >> 9) & 7) = res; |
30499 | POST_IO |
30500 | RET(18) |
30501 | } |
30502 | |
30503 | // SUBA |
30504 | OPCODE(0x91FB) |
30505 | { |
30506 | u32 adr, res; |
30507 | u32 src, dst; |
30508 | |
30509 | adr = (u32)(PC) - BasePC; |
30510 | DECODE_EXT_WORD |
30511 | PRE_IO |
30512 | READSX_LONG_F(adr, src) |
30513 | dst = AREGu32((Opcode >> 9) & 7); |
30514 | res = dst - src; |
30515 | AREG((Opcode >> 9) & 7) = res; |
30516 | POST_IO |
30517 | RET(20) |
30518 | } |
30519 | |
30520 | // SUBA |
30521 | OPCODE(0x91FC) |
30522 | { |
30523 | u32 adr, res; |
30524 | u32 src, dst; |
30525 | |
30526 | FETCH_LONG(src); |
30527 | dst = AREGu32((Opcode >> 9) & 7); |
30528 | res = dst - src; |
30529 | AREG((Opcode >> 9) & 7) = res; |
30530 | #ifdef USE_CYCLONE_TIMING |
30531 | RET(16) |
30532 | #else |
30533 | RET(14) |
30534 | #endif |
30535 | } |
30536 | |
30537 | // SUBA |
30538 | OPCODE(0x91DF) |
30539 | { |
30540 | u32 adr, res; |
30541 | u32 src, dst; |
30542 | |
30543 | adr = AREG(7); |
30544 | AREG(7) += 4; |
30545 | PRE_IO |
30546 | READSX_LONG_F(adr, src) |
30547 | dst = AREGu32((Opcode >> 9) & 7); |
30548 | res = dst - src; |
30549 | AREG((Opcode >> 9) & 7) = res; |
30550 | POST_IO |
30551 | RET(14) |
30552 | } |
30553 | |
30554 | // SUBA |
30555 | OPCODE(0x91E7) |
30556 | { |
30557 | u32 adr, res; |
30558 | u32 src, dst; |
30559 | |
30560 | adr = AREG(7) - 4; |
30561 | AREG(7) = adr; |
30562 | PRE_IO |
30563 | READSX_LONG_F(adr, src) |
30564 | dst = AREGu32((Opcode >> 9) & 7); |
30565 | res = dst - src; |
30566 | AREG((Opcode >> 9) & 7) = res; |
30567 | POST_IO |
30568 | RET(16) |
30569 | } |
30570 | |
30571 | // CMP |
30572 | OPCODE(0xB000) |
30573 | { |
30574 | u32 adr, res; |
30575 | u32 src, dst; |
30576 | |
30577 | src = DREGu8((Opcode >> 0) & 7); |
30578 | dst = DREGu8((Opcode >> 9) & 7); |
30579 | res = dst - src; |
30580 | flag_N = flag_C = res; |
30581 | flag_V = (src ^ dst) & (res ^ dst); |
30582 | flag_NotZ = res & 0xFF; |
30583 | RET(4) |
30584 | } |
30585 | |
30586 | // CMP |
03e4f2a3 |
30587 | #if 0 |
70357ce5 |
30588 | OPCODE(0xB008) |
30589 | { |
30590 | u32 adr, res; |
30591 | u32 src, dst; |
30592 | |
30593 | // can't read byte from Ax registers ! |
30594 | m68kcontext.execinfo |= M68K_FAULTED; |
30595 | m68kcontext.io_cycle_counter = 0; |
30596 | /* |
30597 | goto famec_Exec_End; |
30598 | dst = DREGu8((Opcode >> 9) & 7); |
30599 | res = dst - src; |
30600 | flag_N = flag_C = res; |
30601 | flag_V = (src ^ dst) & (res ^ dst); |
30602 | flag_NotZ = res & 0xFF; |
30603 | */ |
30604 | RET(4) |
30605 | } |
03e4f2a3 |
30606 | #endif |
70357ce5 |
30607 | |
30608 | // CMP |
30609 | OPCODE(0xB010) |
30610 | { |
30611 | u32 adr, res; |
30612 | u32 src, dst; |
30613 | |
30614 | adr = AREG((Opcode >> 0) & 7); |
30615 | PRE_IO |
30616 | READ_BYTE_F(adr, src) |
30617 | dst = DREGu8((Opcode >> 9) & 7); |
30618 | res = dst - src; |
30619 | flag_N = flag_C = res; |
30620 | flag_V = (src ^ dst) & (res ^ dst); |
30621 | flag_NotZ = res & 0xFF; |
30622 | POST_IO |
30623 | RET(8) |
30624 | } |
30625 | |
30626 | // CMP |
30627 | OPCODE(0xB018) |
30628 | { |
30629 | u32 adr, res; |
30630 | u32 src, dst; |
30631 | |
30632 | adr = AREG((Opcode >> 0) & 7); |
30633 | AREG((Opcode >> 0) & 7) += 1; |
30634 | PRE_IO |
30635 | READ_BYTE_F(adr, src) |
30636 | dst = DREGu8((Opcode >> 9) & 7); |
30637 | res = dst - src; |
30638 | flag_N = flag_C = res; |
30639 | flag_V = (src ^ dst) & (res ^ dst); |
30640 | flag_NotZ = res & 0xFF; |
30641 | POST_IO |
30642 | RET(8) |
30643 | } |
30644 | |
30645 | // CMP |
30646 | OPCODE(0xB020) |
30647 | { |
30648 | u32 adr, res; |
30649 | u32 src, dst; |
30650 | |
30651 | adr = AREG((Opcode >> 0) & 7) - 1; |
30652 | AREG((Opcode >> 0) & 7) = adr; |
30653 | PRE_IO |
30654 | READ_BYTE_F(adr, src) |
30655 | dst = DREGu8((Opcode >> 9) & 7); |
30656 | res = dst - src; |
30657 | flag_N = flag_C = res; |
30658 | flag_V = (src ^ dst) & (res ^ dst); |
30659 | flag_NotZ = res & 0xFF; |
30660 | POST_IO |
30661 | RET(10) |
30662 | } |
30663 | |
30664 | // CMP |
30665 | OPCODE(0xB028) |
30666 | { |
30667 | u32 adr, res; |
30668 | u32 src, dst; |
30669 | |
30670 | FETCH_SWORD(adr); |
30671 | adr += AREG((Opcode >> 0) & 7); |
30672 | PRE_IO |
30673 | READ_BYTE_F(adr, src) |
30674 | dst = DREGu8((Opcode >> 9) & 7); |
30675 | res = dst - src; |
30676 | flag_N = flag_C = res; |
30677 | flag_V = (src ^ dst) & (res ^ dst); |
30678 | flag_NotZ = res & 0xFF; |
30679 | POST_IO |
30680 | RET(12) |
30681 | } |
30682 | |
30683 | // CMP |
30684 | OPCODE(0xB030) |
30685 | { |
30686 | u32 adr, res; |
30687 | u32 src, dst; |
30688 | |
30689 | adr = AREG((Opcode >> 0) & 7); |
30690 | DECODE_EXT_WORD |
30691 | PRE_IO |
30692 | READ_BYTE_F(adr, src) |
30693 | dst = DREGu8((Opcode >> 9) & 7); |
30694 | res = dst - src; |
30695 | flag_N = flag_C = res; |
30696 | flag_V = (src ^ dst) & (res ^ dst); |
30697 | flag_NotZ = res & 0xFF; |
30698 | POST_IO |
30699 | RET(14) |
30700 | } |
30701 | |
30702 | // CMP |
30703 | OPCODE(0xB038) |
30704 | { |
30705 | u32 adr, res; |
30706 | u32 src, dst; |
30707 | |
30708 | FETCH_SWORD(adr); |
30709 | PRE_IO |
30710 | READ_BYTE_F(adr, src) |
30711 | dst = DREGu8((Opcode >> 9) & 7); |
30712 | res = dst - src; |
30713 | flag_N = flag_C = res; |
30714 | flag_V = (src ^ dst) & (res ^ dst); |
30715 | flag_NotZ = res & 0xFF; |
30716 | POST_IO |
30717 | RET(12) |
30718 | } |
30719 | |
30720 | // CMP |
30721 | OPCODE(0xB039) |
30722 | { |
30723 | u32 adr, res; |
30724 | u32 src, dst; |
30725 | |
30726 | FETCH_LONG(adr); |
30727 | PRE_IO |
30728 | READ_BYTE_F(adr, src) |
30729 | dst = DREGu8((Opcode >> 9) & 7); |
30730 | res = dst - src; |
30731 | flag_N = flag_C = res; |
30732 | flag_V = (src ^ dst) & (res ^ dst); |
30733 | flag_NotZ = res & 0xFF; |
30734 | POST_IO |
30735 | RET(16) |
30736 | } |
30737 | |
30738 | // CMP |
30739 | OPCODE(0xB03A) |
30740 | { |
30741 | u32 adr, res; |
30742 | u32 src, dst; |
30743 | |
30744 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30745 | PC++; |
30746 | PRE_IO |
30747 | READ_BYTE_F(adr, src) |
30748 | dst = DREGu8((Opcode >> 9) & 7); |
30749 | res = dst - src; |
30750 | flag_N = flag_C = res; |
30751 | flag_V = (src ^ dst) & (res ^ dst); |
30752 | flag_NotZ = res & 0xFF; |
30753 | POST_IO |
30754 | RET(12) |
30755 | } |
30756 | |
30757 | // CMP |
30758 | OPCODE(0xB03B) |
30759 | { |
30760 | u32 adr, res; |
30761 | u32 src, dst; |
30762 | |
30763 | adr = (u32)(PC) - BasePC; |
30764 | DECODE_EXT_WORD |
30765 | PRE_IO |
30766 | READ_BYTE_F(adr, src) |
30767 | dst = DREGu8((Opcode >> 9) & 7); |
30768 | res = dst - src; |
30769 | flag_N = flag_C = res; |
30770 | flag_V = (src ^ dst) & (res ^ dst); |
30771 | flag_NotZ = res & 0xFF; |
30772 | POST_IO |
30773 | RET(14) |
30774 | } |
30775 | |
30776 | // CMP |
30777 | OPCODE(0xB03C) |
30778 | { |
30779 | u32 adr, res; |
30780 | u32 src, dst; |
30781 | |
30782 | FETCH_BYTE(src); |
30783 | dst = DREGu8((Opcode >> 9) & 7); |
30784 | res = dst - src; |
30785 | flag_N = flag_C = res; |
30786 | flag_V = (src ^ dst) & (res ^ dst); |
30787 | flag_NotZ = res & 0xFF; |
30788 | RET(8) |
30789 | } |
30790 | |
30791 | // CMP |
30792 | OPCODE(0xB01F) |
30793 | { |
30794 | u32 adr, res; |
30795 | u32 src, dst; |
30796 | |
30797 | adr = AREG(7); |
30798 | AREG(7) += 2; |
30799 | PRE_IO |
30800 | READ_BYTE_F(adr, src) |
30801 | dst = DREGu8((Opcode >> 9) & 7); |
30802 | res = dst - src; |
30803 | flag_N = flag_C = res; |
30804 | flag_V = (src ^ dst) & (res ^ dst); |
30805 | flag_NotZ = res & 0xFF; |
30806 | POST_IO |
30807 | RET(8) |
30808 | } |
30809 | |
30810 | // CMP |
30811 | OPCODE(0xB027) |
30812 | { |
30813 | u32 adr, res; |
30814 | u32 src, dst; |
30815 | |
30816 | adr = AREG(7) - 2; |
30817 | AREG(7) = adr; |
30818 | PRE_IO |
30819 | READ_BYTE_F(adr, src) |
30820 | dst = DREGu8((Opcode >> 9) & 7); |
30821 | res = dst - src; |
30822 | flag_N = flag_C = res; |
30823 | flag_V = (src ^ dst) & (res ^ dst); |
30824 | flag_NotZ = res & 0xFF; |
30825 | POST_IO |
30826 | RET(10) |
30827 | } |
30828 | |
30829 | // CMP |
30830 | OPCODE(0xB040) |
30831 | { |
30832 | u32 adr, res; |
30833 | u32 src, dst; |
30834 | |
30835 | src = DREGu16((Opcode >> 0) & 7); |
30836 | dst = DREGu16((Opcode >> 9) & 7); |
30837 | res = dst - src; |
30838 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30839 | flag_N = flag_C = res >> 8; |
30840 | flag_NotZ = res & 0xFFFF; |
30841 | RET(4) |
30842 | } |
30843 | |
30844 | // CMP |
30845 | OPCODE(0xB048) |
30846 | { |
30847 | u32 adr, res; |
30848 | u32 src, dst; |
30849 | |
30850 | src = AREGu16((Opcode >> 0) & 7); |
30851 | dst = DREGu16((Opcode >> 9) & 7); |
30852 | res = dst - src; |
30853 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30854 | flag_N = flag_C = res >> 8; |
30855 | flag_NotZ = res & 0xFFFF; |
30856 | RET(4) |
30857 | } |
30858 | |
30859 | // CMP |
30860 | OPCODE(0xB050) |
30861 | { |
30862 | u32 adr, res; |
30863 | u32 src, dst; |
30864 | |
30865 | adr = AREG((Opcode >> 0) & 7); |
30866 | PRE_IO |
30867 | READ_WORD_F(adr, src) |
30868 | dst = DREGu16((Opcode >> 9) & 7); |
30869 | res = dst - src; |
30870 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30871 | flag_N = flag_C = res >> 8; |
30872 | flag_NotZ = res & 0xFFFF; |
30873 | POST_IO |
30874 | RET(8) |
30875 | } |
30876 | |
30877 | // CMP |
30878 | OPCODE(0xB058) |
30879 | { |
30880 | u32 adr, res; |
30881 | u32 src, dst; |
30882 | |
30883 | adr = AREG((Opcode >> 0) & 7); |
30884 | AREG((Opcode >> 0) & 7) += 2; |
30885 | PRE_IO |
30886 | READ_WORD_F(adr, src) |
30887 | dst = DREGu16((Opcode >> 9) & 7); |
30888 | res = dst - src; |
30889 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30890 | flag_N = flag_C = res >> 8; |
30891 | flag_NotZ = res & 0xFFFF; |
30892 | POST_IO |
30893 | RET(8) |
30894 | } |
30895 | |
30896 | // CMP |
30897 | OPCODE(0xB060) |
30898 | { |
30899 | u32 adr, res; |
30900 | u32 src, dst; |
30901 | |
30902 | adr = AREG((Opcode >> 0) & 7) - 2; |
30903 | AREG((Opcode >> 0) & 7) = adr; |
30904 | PRE_IO |
30905 | READ_WORD_F(adr, src) |
30906 | dst = DREGu16((Opcode >> 9) & 7); |
30907 | res = dst - src; |
30908 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30909 | flag_N = flag_C = res >> 8; |
30910 | flag_NotZ = res & 0xFFFF; |
30911 | POST_IO |
30912 | RET(10) |
30913 | } |
30914 | |
30915 | // CMP |
30916 | OPCODE(0xB068) |
30917 | { |
30918 | u32 adr, res; |
30919 | u32 src, dst; |
30920 | |
30921 | FETCH_SWORD(adr); |
30922 | adr += AREG((Opcode >> 0) & 7); |
30923 | PRE_IO |
30924 | READ_WORD_F(adr, src) |
30925 | dst = DREGu16((Opcode >> 9) & 7); |
30926 | res = dst - src; |
30927 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30928 | flag_N = flag_C = res >> 8; |
30929 | flag_NotZ = res & 0xFFFF; |
30930 | POST_IO |
30931 | RET(12) |
30932 | } |
30933 | |
30934 | // CMP |
30935 | OPCODE(0xB070) |
30936 | { |
30937 | u32 adr, res; |
30938 | u32 src, dst; |
30939 | |
30940 | adr = AREG((Opcode >> 0) & 7); |
30941 | DECODE_EXT_WORD |
30942 | PRE_IO |
30943 | READ_WORD_F(adr, src) |
30944 | dst = DREGu16((Opcode >> 9) & 7); |
30945 | res = dst - src; |
30946 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30947 | flag_N = flag_C = res >> 8; |
30948 | flag_NotZ = res & 0xFFFF; |
30949 | POST_IO |
30950 | RET(14) |
30951 | } |
30952 | |
30953 | // CMP |
30954 | OPCODE(0xB078) |
30955 | { |
30956 | u32 adr, res; |
30957 | u32 src, dst; |
30958 | |
30959 | FETCH_SWORD(adr); |
30960 | PRE_IO |
30961 | READ_WORD_F(adr, src) |
30962 | dst = DREGu16((Opcode >> 9) & 7); |
30963 | res = dst - src; |
30964 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30965 | flag_N = flag_C = res >> 8; |
30966 | flag_NotZ = res & 0xFFFF; |
30967 | POST_IO |
30968 | RET(12) |
30969 | } |
30970 | |
30971 | // CMP |
30972 | OPCODE(0xB079) |
30973 | { |
30974 | u32 adr, res; |
30975 | u32 src, dst; |
30976 | |
30977 | FETCH_LONG(adr); |
30978 | PRE_IO |
30979 | READ_WORD_F(adr, src) |
30980 | dst = DREGu16((Opcode >> 9) & 7); |
30981 | res = dst - src; |
30982 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30983 | flag_N = flag_C = res >> 8; |
30984 | flag_NotZ = res & 0xFFFF; |
30985 | POST_IO |
30986 | RET(16) |
30987 | } |
30988 | |
30989 | // CMP |
30990 | OPCODE(0xB07A) |
30991 | { |
30992 | u32 adr, res; |
30993 | u32 src, dst; |
30994 | |
30995 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30996 | PC++; |
30997 | PRE_IO |
30998 | READ_WORD_F(adr, src) |
30999 | dst = DREGu16((Opcode >> 9) & 7); |
31000 | res = dst - src; |
31001 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31002 | flag_N = flag_C = res >> 8; |
31003 | flag_NotZ = res & 0xFFFF; |
31004 | POST_IO |
31005 | RET(12) |
31006 | } |
31007 | |
31008 | // CMP |
31009 | OPCODE(0xB07B) |
31010 | { |
31011 | u32 adr, res; |
31012 | u32 src, dst; |
31013 | |
31014 | adr = (u32)(PC) - BasePC; |
31015 | DECODE_EXT_WORD |
31016 | PRE_IO |
31017 | READ_WORD_F(adr, src) |
31018 | dst = DREGu16((Opcode >> 9) & 7); |
31019 | res = dst - src; |
31020 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31021 | flag_N = flag_C = res >> 8; |
31022 | flag_NotZ = res & 0xFFFF; |
31023 | POST_IO |
31024 | RET(14) |
31025 | } |
31026 | |
31027 | // CMP |
31028 | OPCODE(0xB07C) |
31029 | { |
31030 | u32 adr, res; |
31031 | u32 src, dst; |
31032 | |
31033 | FETCH_WORD(src); |
31034 | dst = DREGu16((Opcode >> 9) & 7); |
31035 | res = dst - src; |
31036 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31037 | flag_N = flag_C = res >> 8; |
31038 | flag_NotZ = res & 0xFFFF; |
31039 | RET(8) |
31040 | } |
31041 | |
31042 | // CMP |
31043 | OPCODE(0xB05F) |
31044 | { |
31045 | u32 adr, res; |
31046 | u32 src, dst; |
31047 | |
31048 | adr = AREG(7); |
31049 | AREG(7) += 2; |
31050 | PRE_IO |
31051 | READ_WORD_F(adr, src) |
31052 | dst = DREGu16((Opcode >> 9) & 7); |
31053 | res = dst - src; |
31054 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31055 | flag_N = flag_C = res >> 8; |
31056 | flag_NotZ = res & 0xFFFF; |
31057 | POST_IO |
31058 | RET(8) |
31059 | } |
31060 | |
31061 | // CMP |
31062 | OPCODE(0xB067) |
31063 | { |
31064 | u32 adr, res; |
31065 | u32 src, dst; |
31066 | |
31067 | adr = AREG(7) - 2; |
31068 | AREG(7) = adr; |
31069 | PRE_IO |
31070 | READ_WORD_F(adr, src) |
31071 | dst = DREGu16((Opcode >> 9) & 7); |
31072 | res = dst - src; |
31073 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31074 | flag_N = flag_C = res >> 8; |
31075 | flag_NotZ = res & 0xFFFF; |
31076 | POST_IO |
31077 | RET(10) |
31078 | } |
31079 | |
31080 | // CMP |
31081 | OPCODE(0xB080) |
31082 | { |
31083 | u32 adr, res; |
31084 | u32 src, dst; |
31085 | |
31086 | src = DREGu32((Opcode >> 0) & 7); |
31087 | dst = DREGu32((Opcode >> 9) & 7); |
31088 | res = dst - src; |
31089 | flag_NotZ = res; |
31090 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31091 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31092 | flag_N = res >> 24; |
31093 | RET(6) |
31094 | } |
31095 | |
31096 | // CMP |
31097 | OPCODE(0xB088) |
31098 | { |
31099 | u32 adr, res; |
31100 | u32 src, dst; |
31101 | |
31102 | src = AREGu32((Opcode >> 0) & 7); |
31103 | dst = DREGu32((Opcode >> 9) & 7); |
31104 | res = dst - src; |
31105 | flag_NotZ = res; |
31106 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31107 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31108 | flag_N = res >> 24; |
31109 | RET(6) |
31110 | } |
31111 | |
31112 | // CMP |
31113 | OPCODE(0xB090) |
31114 | { |
31115 | u32 adr, res; |
31116 | u32 src, dst; |
31117 | |
31118 | adr = AREG((Opcode >> 0) & 7); |
31119 | PRE_IO |
31120 | READ_LONG_F(adr, src) |
31121 | dst = DREGu32((Opcode >> 9) & 7); |
31122 | res = dst - src; |
31123 | flag_NotZ = res; |
31124 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31125 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31126 | flag_N = res >> 24; |
31127 | POST_IO |
31128 | RET(14) |
31129 | } |
31130 | |
31131 | // CMP |
31132 | OPCODE(0xB098) |
31133 | { |
31134 | u32 adr, res; |
31135 | u32 src, dst; |
31136 | |
31137 | adr = AREG((Opcode >> 0) & 7); |
31138 | AREG((Opcode >> 0) & 7) += 4; |
31139 | PRE_IO |
31140 | READ_LONG_F(adr, src) |
31141 | dst = DREGu32((Opcode >> 9) & 7); |
31142 | res = dst - src; |
31143 | flag_NotZ = res; |
31144 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31145 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31146 | flag_N = res >> 24; |
31147 | POST_IO |
31148 | RET(14) |
31149 | } |
31150 | |
31151 | // CMP |
31152 | OPCODE(0xB0A0) |
31153 | { |
31154 | u32 adr, res; |
31155 | u32 src, dst; |
31156 | |
31157 | adr = AREG((Opcode >> 0) & 7) - 4; |
31158 | AREG((Opcode >> 0) & 7) = adr; |
31159 | PRE_IO |
31160 | READ_LONG_F(adr, src) |
31161 | dst = DREGu32((Opcode >> 9) & 7); |
31162 | res = dst - src; |
31163 | flag_NotZ = res; |
31164 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31165 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31166 | flag_N = res >> 24; |
31167 | POST_IO |
31168 | RET(16) |
31169 | } |
31170 | |
31171 | // CMP |
31172 | OPCODE(0xB0A8) |
31173 | { |
31174 | u32 adr, res; |
31175 | u32 src, dst; |
31176 | |
31177 | FETCH_SWORD(adr); |
31178 | adr += AREG((Opcode >> 0) & 7); |
31179 | PRE_IO |
31180 | READ_LONG_F(adr, src) |
31181 | dst = DREGu32((Opcode >> 9) & 7); |
31182 | res = dst - src; |
31183 | flag_NotZ = res; |
31184 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31185 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31186 | flag_N = res >> 24; |
31187 | POST_IO |
31188 | RET(18) |
31189 | } |
31190 | |
31191 | // CMP |
31192 | OPCODE(0xB0B0) |
31193 | { |
31194 | u32 adr, res; |
31195 | u32 src, dst; |
31196 | |
31197 | adr = AREG((Opcode >> 0) & 7); |
31198 | DECODE_EXT_WORD |
31199 | PRE_IO |
31200 | READ_LONG_F(adr, src) |
31201 | dst = DREGu32((Opcode >> 9) & 7); |
31202 | res = dst - src; |
31203 | flag_NotZ = res; |
31204 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31205 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31206 | flag_N = res >> 24; |
31207 | POST_IO |
31208 | RET(20) |
31209 | } |
31210 | |
31211 | // CMP |
31212 | OPCODE(0xB0B8) |
31213 | { |
31214 | u32 adr, res; |
31215 | u32 src, dst; |
31216 | |
31217 | FETCH_SWORD(adr); |
31218 | PRE_IO |
31219 | READ_LONG_F(adr, src) |
31220 | dst = DREGu32((Opcode >> 9) & 7); |
31221 | res = dst - src; |
31222 | flag_NotZ = res; |
31223 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31224 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31225 | flag_N = res >> 24; |
31226 | POST_IO |
31227 | RET(18) |
31228 | } |
31229 | |
31230 | // CMP |
31231 | OPCODE(0xB0B9) |
31232 | { |
31233 | u32 adr, res; |
31234 | u32 src, dst; |
31235 | |
31236 | FETCH_LONG(adr); |
31237 | PRE_IO |
31238 | READ_LONG_F(adr, src) |
31239 | dst = DREGu32((Opcode >> 9) & 7); |
31240 | res = dst - src; |
31241 | flag_NotZ = res; |
31242 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31243 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31244 | flag_N = res >> 24; |
31245 | POST_IO |
31246 | RET(22) |
31247 | } |
31248 | |
31249 | // CMP |
31250 | OPCODE(0xB0BA) |
31251 | { |
31252 | u32 adr, res; |
31253 | u32 src, dst; |
31254 | |
31255 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
31256 | PC++; |
31257 | PRE_IO |
31258 | READ_LONG_F(adr, src) |
31259 | dst = DREGu32((Opcode >> 9) & 7); |
31260 | res = dst - src; |
31261 | flag_NotZ = res; |
31262 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31263 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31264 | flag_N = res >> 24; |
31265 | POST_IO |
31266 | RET(18) |
31267 | } |
31268 | |
31269 | // CMP |
31270 | OPCODE(0xB0BB) |
31271 | { |
31272 | u32 adr, res; |
31273 | u32 src, dst; |
31274 | |
31275 | adr = (u32)(PC) - BasePC; |
31276 | DECODE_EXT_WORD |
31277 | PRE_IO |
31278 | READ_LONG_F(adr, src) |
31279 | dst = DREGu32((Opcode >> 9) & 7); |
31280 | res = dst - src; |
31281 | flag_NotZ = res; |
31282 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31283 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31284 | flag_N = res >> 24; |
31285 | POST_IO |
31286 | RET(20) |
31287 | } |
31288 | |
31289 | // CMP |
31290 | OPCODE(0xB0BC) |
31291 | { |
31292 | u32 adr, res; |
31293 | u32 src, dst; |
31294 | |
31295 | FETCH_LONG(src); |
31296 | dst = DREGu32((Opcode >> 9) & 7); |
31297 | res = dst - src; |
31298 | flag_NotZ = res; |
31299 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31300 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31301 | flag_N = res >> 24; |
31302 | RET(14) |
31303 | } |
31304 | |
31305 | // CMP |
31306 | OPCODE(0xB09F) |
31307 | { |
31308 | u32 adr, res; |
31309 | u32 src, dst; |
31310 | |
31311 | adr = AREG(7); |
31312 | AREG(7) += 4; |
31313 | PRE_IO |
31314 | READ_LONG_F(adr, src) |
31315 | dst = DREGu32((Opcode >> 9) & 7); |
31316 | res = dst - src; |
31317 | flag_NotZ = res; |
31318 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31319 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31320 | flag_N = res >> 24; |
31321 | POST_IO |
31322 | RET(14) |
31323 | } |
31324 | |
31325 | // CMP |
31326 | OPCODE(0xB0A7) |
31327 | { |
31328 | u32 adr, res; |
31329 | u32 src, dst; |
31330 | |
31331 | adr = AREG(7) - 4; |
31332 | AREG(7) = adr; |
31333 | PRE_IO |
31334 | READ_LONG_F(adr, src) |
31335 | dst = DREGu32((Opcode >> 9) & 7); |
31336 | res = dst - src; |
31337 | flag_NotZ = res; |
31338 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31339 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31340 | flag_N = res >> 24; |
31341 | POST_IO |
31342 | RET(16) |
31343 | } |
31344 | |
31345 | // CMPM |
31346 | OPCODE(0xB108) |
31347 | { |
31348 | u32 adr, res; |
31349 | u32 src, dst; |
31350 | |
31351 | adr = AREG((Opcode >> 0) & 7); |
31352 | AREG((Opcode >> 0) & 7) += 1; |
31353 | PRE_IO |
31354 | READ_BYTE_F(adr, src) |
31355 | adr = AREG((Opcode >> 9) & 7); |
31356 | AREG((Opcode >> 9) & 7) += 1; |
31357 | READ_BYTE_F(adr, dst) |
31358 | res = dst - src; |
31359 | flag_N = flag_C = res; |
31360 | flag_V = (src ^ dst) & (res ^ dst); |
31361 | flag_NotZ = res & 0xFF; |
31362 | POST_IO |
31363 | RET(12) |
31364 | } |
31365 | |
31366 | // CMPM |
31367 | OPCODE(0xB148) |
31368 | { |
31369 | u32 adr, res; |
31370 | u32 src, dst; |
31371 | |
31372 | adr = AREG((Opcode >> 0) & 7); |
31373 | AREG((Opcode >> 0) & 7) += 2; |
31374 | PRE_IO |
31375 | READ_WORD_F(adr, src) |
31376 | adr = AREG((Opcode >> 9) & 7); |
31377 | AREG((Opcode >> 9) & 7) += 2; |
31378 | READ_WORD_F(adr, dst) |
31379 | res = dst - src; |
31380 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31381 | flag_N = flag_C = res >> 8; |
31382 | flag_NotZ = res & 0xFFFF; |
31383 | POST_IO |
31384 | RET(12) |
31385 | } |
31386 | |
31387 | // CMPM |
31388 | OPCODE(0xB188) |
31389 | { |
31390 | u32 adr, res; |
31391 | u32 src, dst; |
31392 | |
31393 | adr = AREG((Opcode >> 0) & 7); |
31394 | AREG((Opcode >> 0) & 7) += 4; |
31395 | PRE_IO |
31396 | READ_LONG_F(adr, src) |
31397 | adr = AREG((Opcode >> 9) & 7); |
31398 | AREG((Opcode >> 9) & 7) += 4; |
31399 | READ_LONG_F(adr, dst) |
31400 | res = dst - src; |
31401 | flag_NotZ = res; |
31402 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31403 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31404 | flag_N = res >> 24; |
31405 | POST_IO |
31406 | RET(20) |
31407 | } |
31408 | |
31409 | // CMP7M |
31410 | OPCODE(0xB10F) |
31411 | { |
31412 | u32 adr, res; |
31413 | u32 src, dst; |
31414 | |
31415 | adr = AREG(7); |
31416 | AREG(7) += 2; |
31417 | PRE_IO |
31418 | READ_BYTE_F(adr, src) |
31419 | adr = AREG((Opcode >> 9) & 7); |
31420 | AREG((Opcode >> 9) & 7) += 1; |
31421 | READ_BYTE_F(adr, dst) |
31422 | res = dst - src; |
31423 | flag_N = flag_C = res; |
31424 | flag_V = (src ^ dst) & (res ^ dst); |
31425 | flag_NotZ = res & 0xFF; |
31426 | POST_IO |
31427 | RET(12) |
31428 | } |
31429 | |
31430 | // CMP7M |
31431 | OPCODE(0xB14F) |
31432 | { |
31433 | u32 adr, res; |
31434 | u32 src, dst; |
31435 | |
31436 | adr = AREG(7); |
31437 | AREG(7) += 2; |
31438 | PRE_IO |
31439 | READ_WORD_F(adr, src) |
31440 | adr = AREG((Opcode >> 9) & 7); |
31441 | AREG((Opcode >> 9) & 7) += 2; |
31442 | READ_WORD_F(adr, dst) |
31443 | res = dst - src; |
31444 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31445 | flag_N = flag_C = res >> 8; |
31446 | flag_NotZ = res & 0xFFFF; |
31447 | POST_IO |
31448 | RET(12) |
31449 | } |
31450 | |
31451 | // CMP7M |
31452 | OPCODE(0xB18F) |
31453 | { |
31454 | u32 adr, res; |
31455 | u32 src, dst; |
31456 | |
31457 | adr = AREG(7); |
31458 | AREG(7) += 4; |
31459 | PRE_IO |
31460 | READ_LONG_F(adr, src) |
31461 | adr = AREG((Opcode >> 9) & 7); |
31462 | AREG((Opcode >> 9) & 7) += 4; |
31463 | READ_LONG_F(adr, dst) |
31464 | res = dst - src; |
31465 | flag_NotZ = res; |
31466 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31467 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31468 | flag_N = res >> 24; |
31469 | POST_IO |
31470 | RET(20) |
31471 | } |
31472 | |
31473 | // CMPM7 |
31474 | OPCODE(0xBF08) |
31475 | { |
31476 | u32 adr, res; |
31477 | u32 src, dst; |
31478 | |
31479 | adr = AREG((Opcode >> 0) & 7); |
31480 | AREG((Opcode >> 0) & 7) += 1; |
31481 | PRE_IO |
31482 | READ_BYTE_F(adr, src) |
31483 | adr = AREG(7); |
31484 | AREG(7) += 2; |
31485 | READ_BYTE_F(adr, dst) |
31486 | res = dst - src; |
31487 | flag_N = flag_C = res; |
31488 | flag_V = (src ^ dst) & (res ^ dst); |
31489 | flag_NotZ = res & 0xFF; |
31490 | POST_IO |
31491 | RET(12) |
31492 | } |
31493 | |
31494 | // CMPM7 |
31495 | OPCODE(0xBF48) |
31496 | { |
31497 | u32 adr, res; |
31498 | u32 src, dst; |
31499 | |
31500 | adr = AREG((Opcode >> 0) & 7); |
31501 | AREG((Opcode >> 0) & 7) += 2; |
31502 | PRE_IO |
31503 | READ_WORD_F(adr, src) |
31504 | adr = AREG(7); |
31505 | AREG(7) += 2; |
31506 | READ_WORD_F(adr, dst) |
31507 | res = dst - src; |
31508 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31509 | flag_N = flag_C = res >> 8; |
31510 | flag_NotZ = res & 0xFFFF; |
31511 | POST_IO |
31512 | RET(12) |
31513 | } |
31514 | |
31515 | // CMPM7 |
31516 | OPCODE(0xBF88) |
31517 | { |
31518 | u32 adr, res; |
31519 | u32 src, dst; |
31520 | |
31521 | adr = AREG((Opcode >> 0) & 7); |
31522 | AREG((Opcode >> 0) & 7) += 4; |
31523 | PRE_IO |
31524 | READ_LONG_F(adr, src) |
31525 | adr = AREG(7); |
31526 | AREG(7) += 4; |
31527 | READ_LONG_F(adr, dst) |
31528 | res = dst - src; |
31529 | flag_NotZ = res; |
31530 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31531 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31532 | flag_N = res >> 24; |
31533 | POST_IO |
31534 | RET(20) |
31535 | } |
31536 | |
31537 | // CMP7M7 |
31538 | OPCODE(0xBF0F) |
31539 | { |
31540 | u32 adr, res; |
31541 | u32 src, dst; |
31542 | |
31543 | adr = AREG(7); |
31544 | AREG(7) += 2; |
31545 | PRE_IO |
31546 | READ_BYTE_F(adr, src) |
31547 | adr = AREG(7); |
31548 | AREG(7) += 2; |
31549 | READ_BYTE_F(adr, dst) |
31550 | res = dst - src; |
31551 | flag_N = flag_C = res; |
31552 | flag_V = (src ^ dst) & (res ^ dst); |
31553 | flag_NotZ = res & 0xFF; |
31554 | POST_IO |
31555 | RET(12) |
31556 | } |
31557 | |
31558 | // CMP7M7 |
31559 | OPCODE(0xBF4F) |
31560 | { |
31561 | u32 adr, res; |
31562 | u32 src, dst; |
31563 | |
31564 | adr = AREG(7); |
31565 | AREG(7) += 2; |
31566 | PRE_IO |
31567 | READ_WORD_F(adr, src) |
31568 | adr = AREG(7); |
31569 | AREG(7) += 2; |
31570 | READ_WORD_F(adr, dst) |
31571 | res = dst - src; |
31572 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31573 | flag_N = flag_C = res >> 8; |
31574 | flag_NotZ = res & 0xFFFF; |
31575 | POST_IO |
31576 | RET(12) |
31577 | } |
31578 | |
31579 | // CMP7M7 |
31580 | OPCODE(0xBF8F) |
31581 | { |
31582 | u32 adr, res; |
31583 | u32 src, dst; |
31584 | |
31585 | adr = AREG(7); |
31586 | AREG(7) += 4; |
31587 | PRE_IO |
31588 | READ_LONG_F(adr, src) |
31589 | adr = AREG(7); |
31590 | AREG(7) += 4; |
31591 | READ_LONG_F(adr, dst) |
31592 | res = dst - src; |
31593 | flag_NotZ = res; |
31594 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31595 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31596 | flag_N = res >> 24; |
31597 | POST_IO |
31598 | RET(20) |
31599 | } |
31600 | |
31601 | // EORDa |
31602 | OPCODE(0xB100) |
31603 | { |
31604 | u32 adr, res; |
31605 | u32 src, dst; |
31606 | |
31607 | src = DREGu8((Opcode >> 9) & 7); |
31608 | res = DREGu8((Opcode >> 0) & 7); |
31609 | res ^= src; |
31610 | flag_C = 0; |
31611 | flag_V = 0; |
31612 | flag_NotZ = res; |
31613 | flag_N = res; |
31614 | DREGu8((Opcode >> 0) & 7) = res; |
31615 | RET(4) |
31616 | } |
31617 | |
31618 | // EORDa |
31619 | OPCODE(0xB110) |
31620 | { |
31621 | u32 adr, res; |
31622 | u32 src, dst; |
31623 | |
31624 | src = DREGu8((Opcode >> 9) & 7); |
31625 | adr = AREG((Opcode >> 0) & 7); |
31626 | PRE_IO |
31627 | READ_BYTE_F(adr, res) |
31628 | res ^= src; |
31629 | flag_C = 0; |
31630 | flag_V = 0; |
31631 | flag_NotZ = res; |
31632 | flag_N = res; |
31633 | WRITE_BYTE_F(adr, res) |
31634 | POST_IO |
31635 | RET(12) |
31636 | } |
31637 | |
31638 | // EORDa |
31639 | OPCODE(0xB118) |
31640 | { |
31641 | u32 adr, res; |
31642 | u32 src, dst; |
31643 | |
31644 | src = DREGu8((Opcode >> 9) & 7); |
31645 | adr = AREG((Opcode >> 0) & 7); |
31646 | AREG((Opcode >> 0) & 7) += 1; |
31647 | PRE_IO |
31648 | READ_BYTE_F(adr, res) |
31649 | res ^= src; |
31650 | flag_C = 0; |
31651 | flag_V = 0; |
31652 | flag_NotZ = res; |
31653 | flag_N = res; |
31654 | WRITE_BYTE_F(adr, res) |
31655 | POST_IO |
31656 | RET(12) |
31657 | } |
31658 | |
31659 | // EORDa |
31660 | OPCODE(0xB120) |
31661 | { |
31662 | u32 adr, res; |
31663 | u32 src, dst; |
31664 | |
31665 | src = DREGu8((Opcode >> 9) & 7); |
31666 | adr = AREG((Opcode >> 0) & 7) - 1; |
31667 | AREG((Opcode >> 0) & 7) = adr; |
31668 | PRE_IO |
31669 | READ_BYTE_F(adr, res) |
31670 | res ^= src; |
31671 | flag_C = 0; |
31672 | flag_V = 0; |
31673 | flag_NotZ = res; |
31674 | flag_N = res; |
31675 | WRITE_BYTE_F(adr, res) |
31676 | POST_IO |
31677 | RET(14) |
31678 | } |
31679 | |
31680 | // EORDa |
31681 | OPCODE(0xB128) |
31682 | { |
31683 | u32 adr, res; |
31684 | u32 src, dst; |
31685 | |
31686 | src = DREGu8((Opcode >> 9) & 7); |
31687 | FETCH_SWORD(adr); |
31688 | adr += AREG((Opcode >> 0) & 7); |
31689 | PRE_IO |
31690 | READ_BYTE_F(adr, res) |
31691 | res ^= src; |
31692 | flag_C = 0; |
31693 | flag_V = 0; |
31694 | flag_NotZ = res; |
31695 | flag_N = res; |
31696 | WRITE_BYTE_F(adr, res) |
31697 | POST_IO |
31698 | RET(16) |
31699 | } |
31700 | |
31701 | // EORDa |
31702 | OPCODE(0xB130) |
31703 | { |
31704 | u32 adr, res; |
31705 | u32 src, dst; |
31706 | |
31707 | src = DREGu8((Opcode >> 9) & 7); |
31708 | adr = AREG((Opcode >> 0) & 7); |
31709 | DECODE_EXT_WORD |
31710 | PRE_IO |
31711 | READ_BYTE_F(adr, res) |
31712 | res ^= src; |
31713 | flag_C = 0; |
31714 | flag_V = 0; |
31715 | flag_NotZ = res; |
31716 | flag_N = res; |
31717 | WRITE_BYTE_F(adr, res) |
31718 | POST_IO |
31719 | RET(18) |
31720 | } |
31721 | |
31722 | // EORDa |
31723 | OPCODE(0xB138) |
31724 | { |
31725 | u32 adr, res; |
31726 | u32 src, dst; |
31727 | |
31728 | src = DREGu8((Opcode >> 9) & 7); |
31729 | FETCH_SWORD(adr); |
31730 | PRE_IO |
31731 | READ_BYTE_F(adr, res) |
31732 | res ^= src; |
31733 | flag_C = 0; |
31734 | flag_V = 0; |
31735 | flag_NotZ = res; |
31736 | flag_N = res; |
31737 | WRITE_BYTE_F(adr, res) |
31738 | POST_IO |
31739 | RET(16) |
31740 | } |
31741 | |
31742 | // EORDa |
31743 | OPCODE(0xB139) |
31744 | { |
31745 | u32 adr, res; |
31746 | u32 src, dst; |
31747 | |
31748 | src = DREGu8((Opcode >> 9) & 7); |
31749 | FETCH_LONG(adr); |
31750 | PRE_IO |
31751 | READ_BYTE_F(adr, res) |
31752 | res ^= src; |
31753 | flag_C = 0; |
31754 | flag_V = 0; |
31755 | flag_NotZ = res; |
31756 | flag_N = res; |
31757 | WRITE_BYTE_F(adr, res) |
31758 | POST_IO |
31759 | RET(20) |
31760 | } |
31761 | |
31762 | // EORDa |
31763 | OPCODE(0xB11F) |
31764 | { |
31765 | u32 adr, res; |
31766 | u32 src, dst; |
31767 | |
31768 | src = DREGu8((Opcode >> 9) & 7); |
31769 | adr = AREG(7); |
31770 | AREG(7) += 2; |
31771 | PRE_IO |
31772 | READ_BYTE_F(adr, res) |
31773 | res ^= src; |
31774 | flag_C = 0; |
31775 | flag_V = 0; |
31776 | flag_NotZ = res; |
31777 | flag_N = res; |
31778 | WRITE_BYTE_F(adr, res) |
31779 | POST_IO |
31780 | RET(12) |
31781 | } |
31782 | |
31783 | // EORDa |
31784 | OPCODE(0xB127) |
31785 | { |
31786 | u32 adr, res; |
31787 | u32 src, dst; |
31788 | |
31789 | src = DREGu8((Opcode >> 9) & 7); |
31790 | adr = AREG(7) - 2; |
31791 | AREG(7) = adr; |
31792 | PRE_IO |
31793 | READ_BYTE_F(adr, res) |
31794 | res ^= src; |
31795 | flag_C = 0; |
31796 | flag_V = 0; |
31797 | flag_NotZ = res; |
31798 | flag_N = res; |
31799 | WRITE_BYTE_F(adr, res) |
31800 | POST_IO |
31801 | RET(14) |
31802 | } |
31803 | |
31804 | // EORDa |
31805 | OPCODE(0xB140) |
31806 | { |
31807 | u32 adr, res; |
31808 | u32 src, dst; |
31809 | |
31810 | src = DREGu16((Opcode >> 9) & 7); |
31811 | res = DREGu16((Opcode >> 0) & 7); |
31812 | res ^= src; |
31813 | flag_C = 0; |
31814 | flag_V = 0; |
31815 | flag_NotZ = res; |
31816 | flag_N = res >> 8; |
31817 | DREGu16((Opcode >> 0) & 7) = res; |
31818 | RET(4) |
31819 | } |
31820 | |
31821 | // EORDa |
31822 | OPCODE(0xB150) |
31823 | { |
31824 | u32 adr, res; |
31825 | u32 src, dst; |
31826 | |
31827 | src = DREGu16((Opcode >> 9) & 7); |
31828 | adr = AREG((Opcode >> 0) & 7); |
31829 | PRE_IO |
31830 | READ_WORD_F(adr, res) |
31831 | res ^= src; |
31832 | flag_C = 0; |
31833 | flag_V = 0; |
31834 | flag_NotZ = res; |
31835 | flag_N = res >> 8; |
31836 | WRITE_WORD_F(adr, res) |
31837 | POST_IO |
31838 | RET(12) |
31839 | } |
31840 | |
31841 | // EORDa |
31842 | OPCODE(0xB158) |
31843 | { |
31844 | u32 adr, res; |
31845 | u32 src, dst; |
31846 | |
31847 | src = DREGu16((Opcode >> 9) & 7); |
31848 | adr = AREG((Opcode >> 0) & 7); |
31849 | AREG((Opcode >> 0) & 7) += 2; |
31850 | PRE_IO |
31851 | READ_WORD_F(adr, res) |
31852 | res ^= src; |
31853 | flag_C = 0; |
31854 | flag_V = 0; |
31855 | flag_NotZ = res; |
31856 | flag_N = res >> 8; |
31857 | WRITE_WORD_F(adr, res) |
31858 | POST_IO |
31859 | RET(12) |
31860 | } |
31861 | |
31862 | // EORDa |
31863 | OPCODE(0xB160) |
31864 | { |
31865 | u32 adr, res; |
31866 | u32 src, dst; |
31867 | |
31868 | src = DREGu16((Opcode >> 9) & 7); |
31869 | adr = AREG((Opcode >> 0) & 7) - 2; |
31870 | AREG((Opcode >> 0) & 7) = adr; |
31871 | PRE_IO |
31872 | READ_WORD_F(adr, res) |
31873 | res ^= src; |
31874 | flag_C = 0; |
31875 | flag_V = 0; |
31876 | flag_NotZ = res; |
31877 | flag_N = res >> 8; |
31878 | WRITE_WORD_F(adr, res) |
31879 | POST_IO |
31880 | RET(14) |
31881 | } |
31882 | |
31883 | // EORDa |
31884 | OPCODE(0xB168) |
31885 | { |
31886 | u32 adr, res; |
31887 | u32 src, dst; |
31888 | |
31889 | src = DREGu16((Opcode >> 9) & 7); |
31890 | FETCH_SWORD(adr); |
31891 | adr += AREG((Opcode >> 0) & 7); |
31892 | PRE_IO |
31893 | READ_WORD_F(adr, res) |
31894 | res ^= src; |
31895 | flag_C = 0; |
31896 | flag_V = 0; |
31897 | flag_NotZ = res; |
31898 | flag_N = res >> 8; |
31899 | WRITE_WORD_F(adr, res) |
31900 | POST_IO |
31901 | RET(16) |
31902 | } |
31903 | |
31904 | // EORDa |
31905 | OPCODE(0xB170) |
31906 | { |
31907 | u32 adr, res; |
31908 | u32 src, dst; |
31909 | |
31910 | src = DREGu16((Opcode >> 9) & 7); |
31911 | adr = AREG((Opcode >> 0) & 7); |
31912 | DECODE_EXT_WORD |
31913 | PRE_IO |
31914 | READ_WORD_F(adr, res) |
31915 | res ^= src; |
31916 | flag_C = 0; |
31917 | flag_V = 0; |
31918 | flag_NotZ = res; |
31919 | flag_N = res >> 8; |
31920 | WRITE_WORD_F(adr, res) |
31921 | POST_IO |
31922 | RET(18) |
31923 | } |
31924 | |
31925 | // EORDa |
31926 | OPCODE(0xB178) |
31927 | { |
31928 | u32 adr, res; |
31929 | u32 src, dst; |
31930 | |
31931 | src = DREGu16((Opcode >> 9) & 7); |
31932 | FETCH_SWORD(adr); |
31933 | PRE_IO |
31934 | READ_WORD_F(adr, res) |
31935 | res ^= src; |
31936 | flag_C = 0; |
31937 | flag_V = 0; |
31938 | flag_NotZ = res; |
31939 | flag_N = res >> 8; |
31940 | WRITE_WORD_F(adr, res) |
31941 | POST_IO |
31942 | RET(16) |
31943 | } |
31944 | |
31945 | // EORDa |
31946 | OPCODE(0xB179) |
31947 | { |
31948 | u32 adr, res; |
31949 | u32 src, dst; |
31950 | |
31951 | src = DREGu16((Opcode >> 9) & 7); |
31952 | FETCH_LONG(adr); |
31953 | PRE_IO |
31954 | READ_WORD_F(adr, res) |
31955 | res ^= src; |
31956 | flag_C = 0; |
31957 | flag_V = 0; |
31958 | flag_NotZ = res; |
31959 | flag_N = res >> 8; |
31960 | WRITE_WORD_F(adr, res) |
31961 | POST_IO |
31962 | RET(20) |
31963 | } |
31964 | |
31965 | // EORDa |
31966 | OPCODE(0xB15F) |
31967 | { |
31968 | u32 adr, res; |
31969 | u32 src, dst; |
31970 | |
31971 | src = DREGu16((Opcode >> 9) & 7); |
31972 | adr = AREG(7); |
31973 | AREG(7) += 2; |
31974 | PRE_IO |
31975 | READ_WORD_F(adr, res) |
31976 | res ^= src; |
31977 | flag_C = 0; |
31978 | flag_V = 0; |
31979 | flag_NotZ = res; |
31980 | flag_N = res >> 8; |
31981 | WRITE_WORD_F(adr, res) |
31982 | POST_IO |
31983 | RET(12) |
31984 | } |
31985 | |
31986 | // EORDa |
31987 | OPCODE(0xB167) |
31988 | { |
31989 | u32 adr, res; |
31990 | u32 src, dst; |
31991 | |
31992 | src = DREGu16((Opcode >> 9) & 7); |
31993 | adr = AREG(7) - 2; |
31994 | AREG(7) = adr; |
31995 | PRE_IO |
31996 | READ_WORD_F(adr, res) |
31997 | res ^= src; |
31998 | flag_C = 0; |
31999 | flag_V = 0; |
32000 | flag_NotZ = res; |
32001 | flag_N = res >> 8; |
32002 | WRITE_WORD_F(adr, res) |
32003 | POST_IO |
32004 | RET(14) |
32005 | } |
32006 | |
32007 | // EORDa |
32008 | OPCODE(0xB180) |
32009 | { |
32010 | u32 adr, res; |
32011 | u32 src, dst; |
32012 | |
32013 | src = DREGu32((Opcode >> 9) & 7); |
32014 | res = DREGu32((Opcode >> 0) & 7); |
32015 | res ^= src; |
32016 | flag_C = 0; |
32017 | flag_V = 0; |
32018 | flag_NotZ = res; |
32019 | flag_N = res >> 24; |
32020 | DREGu32((Opcode >> 0) & 7) = res; |
32021 | RET(8) |
32022 | } |
32023 | |
32024 | // EORDa |
32025 | OPCODE(0xB190) |
32026 | { |
32027 | u32 adr, res; |
32028 | u32 src, dst; |
32029 | |
32030 | src = DREGu32((Opcode >> 9) & 7); |
32031 | adr = AREG((Opcode >> 0) & 7); |
32032 | PRE_IO |
32033 | READ_LONG_F(adr, res) |
32034 | res ^= src; |
32035 | flag_C = 0; |
32036 | flag_V = 0; |
32037 | flag_NotZ = res; |
32038 | flag_N = res >> 24; |
32039 | WRITE_LONG_F(adr, res) |
32040 | POST_IO |
32041 | RET(20) |
32042 | } |
32043 | |
32044 | // EORDa |
32045 | OPCODE(0xB198) |
32046 | { |
32047 | u32 adr, res; |
32048 | u32 src, dst; |
32049 | |
32050 | src = DREGu32((Opcode >> 9) & 7); |
32051 | adr = AREG((Opcode >> 0) & 7); |
32052 | AREG((Opcode >> 0) & 7) += 4; |
32053 | PRE_IO |
32054 | READ_LONG_F(adr, res) |
32055 | res ^= src; |
32056 | flag_C = 0; |
32057 | flag_V = 0; |
32058 | flag_NotZ = res; |
32059 | flag_N = res >> 24; |
32060 | WRITE_LONG_F(adr, res) |
32061 | POST_IO |
32062 | RET(20) |
32063 | } |
32064 | |
32065 | // EORDa |
32066 | OPCODE(0xB1A0) |
32067 | { |
32068 | u32 adr, res; |
32069 | u32 src, dst; |
32070 | |
32071 | src = DREGu32((Opcode >> 9) & 7); |
32072 | adr = AREG((Opcode >> 0) & 7) - 4; |
32073 | AREG((Opcode >> 0) & 7) = adr; |
32074 | PRE_IO |
32075 | READ_LONG_F(adr, res) |
32076 | res ^= src; |
32077 | flag_C = 0; |
32078 | flag_V = 0; |
32079 | flag_NotZ = res; |
32080 | flag_N = res >> 24; |
32081 | WRITE_LONG_F(adr, res) |
32082 | POST_IO |
32083 | RET(22) |
32084 | } |
32085 | |
32086 | // EORDa |
32087 | OPCODE(0xB1A8) |
32088 | { |
32089 | u32 adr, res; |
32090 | u32 src, dst; |
32091 | |
32092 | src = DREGu32((Opcode >> 9) & 7); |
32093 | FETCH_SWORD(adr); |
32094 | adr += AREG((Opcode >> 0) & 7); |
32095 | PRE_IO |
32096 | READ_LONG_F(adr, res) |
32097 | res ^= src; |
32098 | flag_C = 0; |
32099 | flag_V = 0; |
32100 | flag_NotZ = res; |
32101 | flag_N = res >> 24; |
32102 | WRITE_LONG_F(adr, res) |
32103 | POST_IO |
32104 | RET(24) |
32105 | } |
32106 | |
32107 | // EORDa |
32108 | OPCODE(0xB1B0) |
32109 | { |
32110 | u32 adr, res; |
32111 | u32 src, dst; |
32112 | |
32113 | src = DREGu32((Opcode >> 9) & 7); |
32114 | adr = AREG((Opcode >> 0) & 7); |
32115 | DECODE_EXT_WORD |
32116 | PRE_IO |
32117 | READ_LONG_F(adr, res) |
32118 | res ^= src; |
32119 | flag_C = 0; |
32120 | flag_V = 0; |
32121 | flag_NotZ = res; |
32122 | flag_N = res >> 24; |
32123 | WRITE_LONG_F(adr, res) |
32124 | POST_IO |
32125 | RET(26) |
32126 | } |
32127 | |
32128 | // EORDa |
32129 | OPCODE(0xB1B8) |
32130 | { |
32131 | u32 adr, res; |
32132 | u32 src, dst; |
32133 | |
32134 | src = DREGu32((Opcode >> 9) & 7); |
32135 | FETCH_SWORD(adr); |
32136 | PRE_IO |
32137 | READ_LONG_F(adr, res) |
32138 | res ^= src; |
32139 | flag_C = 0; |
32140 | flag_V = 0; |
32141 | flag_NotZ = res; |
32142 | flag_N = res >> 24; |
32143 | WRITE_LONG_F(adr, res) |
32144 | POST_IO |
32145 | RET(24) |
32146 | } |
32147 | |
32148 | // EORDa |
32149 | OPCODE(0xB1B9) |
32150 | { |
32151 | u32 adr, res; |
32152 | u32 src, dst; |
32153 | |
32154 | src = DREGu32((Opcode >> 9) & 7); |
32155 | FETCH_LONG(adr); |
32156 | PRE_IO |
32157 | READ_LONG_F(adr, res) |
32158 | res ^= src; |
32159 | flag_C = 0; |
32160 | flag_V = 0; |
32161 | flag_NotZ = res; |
32162 | flag_N = res >> 24; |
32163 | WRITE_LONG_F(adr, res) |
32164 | POST_IO |
32165 | RET(28) |
32166 | } |
32167 | |
32168 | // EORDa |
32169 | OPCODE(0xB19F) |
32170 | { |
32171 | u32 adr, res; |
32172 | u32 src, dst; |
32173 | |
32174 | src = DREGu32((Opcode >> 9) & 7); |
32175 | adr = AREG(7); |
32176 | AREG(7) += 4; |
32177 | PRE_IO |
32178 | READ_LONG_F(adr, res) |
32179 | res ^= src; |
32180 | flag_C = 0; |
32181 | flag_V = 0; |
32182 | flag_NotZ = res; |
32183 | flag_N = res >> 24; |
32184 | WRITE_LONG_F(adr, res) |
32185 | POST_IO |
32186 | RET(20) |
32187 | } |
32188 | |
32189 | // EORDa |
32190 | OPCODE(0xB1A7) |
32191 | { |
32192 | u32 adr, res; |
32193 | u32 src, dst; |
32194 | |
32195 | src = DREGu32((Opcode >> 9) & 7); |
32196 | adr = AREG(7) - 4; |
32197 | AREG(7) = adr; |
32198 | PRE_IO |
32199 | READ_LONG_F(adr, res) |
32200 | res ^= src; |
32201 | flag_C = 0; |
32202 | flag_V = 0; |
32203 | flag_NotZ = res; |
32204 | flag_N = res >> 24; |
32205 | WRITE_LONG_F(adr, res) |
32206 | POST_IO |
32207 | RET(22) |
32208 | } |
32209 | |
32210 | // CMPA |
32211 | OPCODE(0xB0C0) |
32212 | { |
32213 | u32 adr, res; |
32214 | u32 src, dst; |
32215 | |
32216 | src = (s32)DREGs16((Opcode >> 0) & 7); |
32217 | dst = AREGu32((Opcode >> 9) & 7); |
32218 | res = dst - src; |
32219 | flag_NotZ = res; |
32220 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32221 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32222 | flag_N = res >> 24; |
32223 | RET(6) |
32224 | } |
32225 | |
32226 | // CMPA |
32227 | OPCODE(0xB0C8) |
32228 | { |
32229 | u32 adr, res; |
32230 | u32 src, dst; |
32231 | |
32232 | src = (s32)AREGs16((Opcode >> 0) & 7); |
32233 | dst = AREGu32((Opcode >> 9) & 7); |
32234 | res = dst - src; |
32235 | flag_NotZ = res; |
32236 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32237 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32238 | flag_N = res >> 24; |
32239 | RET(6) |
32240 | } |
32241 | |
32242 | // CMPA |
32243 | OPCODE(0xB0D0) |
32244 | { |
32245 | u32 adr, res; |
32246 | u32 src, dst; |
32247 | |
32248 | adr = AREG((Opcode >> 0) & 7); |
32249 | PRE_IO |
32250 | READSX_WORD_F(adr, src) |
32251 | dst = AREGu32((Opcode >> 9) & 7); |
32252 | res = dst - src; |
32253 | flag_NotZ = res; |
32254 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32255 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32256 | flag_N = res >> 24; |
32257 | POST_IO |
32258 | RET(10) |
32259 | } |
32260 | |
32261 | // CMPA |
32262 | OPCODE(0xB0D8) |
32263 | { |
32264 | u32 adr, res; |
32265 | u32 src, dst; |
32266 | |
32267 | adr = AREG((Opcode >> 0) & 7); |
32268 | AREG((Opcode >> 0) & 7) += 2; |
32269 | PRE_IO |
32270 | READSX_WORD_F(adr, src) |
32271 | dst = AREGu32((Opcode >> 9) & 7); |
32272 | res = dst - src; |
32273 | flag_NotZ = res; |
32274 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32275 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32276 | flag_N = res >> 24; |
32277 | POST_IO |
32278 | RET(10) |
32279 | } |
32280 | |
32281 | // CMPA |
32282 | OPCODE(0xB0E0) |
32283 | { |
32284 | u32 adr, res; |
32285 | u32 src, dst; |
32286 | |
32287 | adr = AREG((Opcode >> 0) & 7) - 2; |
32288 | AREG((Opcode >> 0) & 7) = adr; |
32289 | PRE_IO |
32290 | READSX_WORD_F(adr, src) |
32291 | dst = AREGu32((Opcode >> 9) & 7); |
32292 | res = dst - src; |
32293 | flag_NotZ = res; |
32294 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32295 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32296 | flag_N = res >> 24; |
32297 | POST_IO |
32298 | RET(12) |
32299 | } |
32300 | |
32301 | // CMPA |
32302 | OPCODE(0xB0E8) |
32303 | { |
32304 | u32 adr, res; |
32305 | u32 src, dst; |
32306 | |
32307 | FETCH_SWORD(adr); |
32308 | adr += AREG((Opcode >> 0) & 7); |
32309 | PRE_IO |
32310 | READSX_WORD_F(adr, src) |
32311 | dst = AREGu32((Opcode >> 9) & 7); |
32312 | res = dst - src; |
32313 | flag_NotZ = res; |
32314 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32315 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32316 | flag_N = res >> 24; |
32317 | POST_IO |
32318 | RET(14) |
32319 | } |
32320 | |
32321 | // CMPA |
32322 | OPCODE(0xB0F0) |
32323 | { |
32324 | u32 adr, res; |
32325 | u32 src, dst; |
32326 | |
32327 | adr = AREG((Opcode >> 0) & 7); |
32328 | DECODE_EXT_WORD |
32329 | PRE_IO |
32330 | READSX_WORD_F(adr, src) |
32331 | dst = AREGu32((Opcode >> 9) & 7); |
32332 | res = dst - src; |
32333 | flag_NotZ = res; |
32334 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32335 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32336 | flag_N = res >> 24; |
32337 | POST_IO |
32338 | RET(16) |
32339 | } |
32340 | |
32341 | // CMPA |
32342 | OPCODE(0xB0F8) |
32343 | { |
32344 | u32 adr, res; |
32345 | u32 src, dst; |
32346 | |
32347 | FETCH_SWORD(adr); |
32348 | PRE_IO |
32349 | READSX_WORD_F(adr, src) |
32350 | dst = AREGu32((Opcode >> 9) & 7); |
32351 | res = dst - src; |
32352 | flag_NotZ = res; |
32353 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32354 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32355 | flag_N = res >> 24; |
32356 | POST_IO |
32357 | RET(14) |
32358 | } |
32359 | |
32360 | // CMPA |
32361 | OPCODE(0xB0F9) |
32362 | { |
32363 | u32 adr, res; |
32364 | u32 src, dst; |
32365 | |
32366 | FETCH_LONG(adr); |
32367 | PRE_IO |
32368 | READSX_WORD_F(adr, src) |
32369 | dst = AREGu32((Opcode >> 9) & 7); |
32370 | res = dst - src; |
32371 | flag_NotZ = res; |
32372 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32373 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32374 | flag_N = res >> 24; |
32375 | POST_IO |
32376 | RET(18) |
32377 | } |
32378 | |
32379 | // CMPA |
32380 | OPCODE(0xB0FA) |
32381 | { |
32382 | u32 adr, res; |
32383 | u32 src, dst; |
32384 | |
32385 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32386 | PC++; |
32387 | PRE_IO |
32388 | READSX_WORD_F(adr, src) |
32389 | dst = AREGu32((Opcode >> 9) & 7); |
32390 | res = dst - src; |
32391 | flag_NotZ = res; |
32392 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32393 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32394 | flag_N = res >> 24; |
32395 | POST_IO |
32396 | RET(14) |
32397 | } |
32398 | |
32399 | // CMPA |
32400 | OPCODE(0xB0FB) |
32401 | { |
32402 | u32 adr, res; |
32403 | u32 src, dst; |
32404 | |
32405 | adr = (u32)(PC) - BasePC; |
32406 | DECODE_EXT_WORD |
32407 | PRE_IO |
32408 | READSX_WORD_F(adr, src) |
32409 | dst = AREGu32((Opcode >> 9) & 7); |
32410 | res = dst - src; |
32411 | flag_NotZ = res; |
32412 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32413 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32414 | flag_N = res >> 24; |
32415 | POST_IO |
32416 | RET(16) |
32417 | } |
32418 | |
32419 | // CMPA |
32420 | OPCODE(0xB0FC) |
32421 | { |
32422 | u32 adr, res; |
32423 | u32 src, dst; |
32424 | |
32425 | FETCH_SWORD(src); |
32426 | dst = AREGu32((Opcode >> 9) & 7); |
32427 | res = dst - src; |
32428 | flag_NotZ = res; |
32429 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32430 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32431 | flag_N = res >> 24; |
32432 | RET(10) |
32433 | } |
32434 | |
32435 | // CMPA |
32436 | OPCODE(0xB0DF) |
32437 | { |
32438 | u32 adr, res; |
32439 | u32 src, dst; |
32440 | |
32441 | adr = AREG(7); |
32442 | AREG(7) += 2; |
32443 | PRE_IO |
32444 | READSX_WORD_F(adr, src) |
32445 | dst = AREGu32((Opcode >> 9) & 7); |
32446 | res = dst - src; |
32447 | flag_NotZ = res; |
32448 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32449 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32450 | flag_N = res >> 24; |
32451 | POST_IO |
32452 | RET(10) |
32453 | } |
32454 | |
32455 | // CMPA |
32456 | OPCODE(0xB0E7) |
32457 | { |
32458 | u32 adr, res; |
32459 | u32 src, dst; |
32460 | |
32461 | adr = AREG(7) - 2; |
32462 | AREG(7) = adr; |
32463 | PRE_IO |
32464 | READSX_WORD_F(adr, src) |
32465 | dst = AREGu32((Opcode >> 9) & 7); |
32466 | res = dst - src; |
32467 | flag_NotZ = res; |
32468 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32469 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32470 | flag_N = res >> 24; |
32471 | POST_IO |
32472 | RET(12) |
32473 | } |
32474 | |
32475 | // CMPA |
32476 | OPCODE(0xB1C0) |
32477 | { |
32478 | u32 adr, res; |
32479 | u32 src, dst; |
32480 | |
32481 | src = (s32)DREGs32((Opcode >> 0) & 7); |
32482 | dst = AREGu32((Opcode >> 9) & 7); |
32483 | res = dst - src; |
32484 | flag_NotZ = res; |
32485 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32486 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32487 | flag_N = res >> 24; |
32488 | RET(6) |
32489 | } |
32490 | |
32491 | // CMPA |
32492 | OPCODE(0xB1C8) |
32493 | { |
32494 | u32 adr, res; |
32495 | u32 src, dst; |
32496 | |
32497 | src = (s32)AREGs32((Opcode >> 0) & 7); |
32498 | dst = AREGu32((Opcode >> 9) & 7); |
32499 | res = dst - src; |
32500 | flag_NotZ = res; |
32501 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32502 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32503 | flag_N = res >> 24; |
32504 | RET(6) |
32505 | } |
32506 | |
32507 | // CMPA |
32508 | OPCODE(0xB1D0) |
32509 | { |
32510 | u32 adr, res; |
32511 | u32 src, dst; |
32512 | |
32513 | adr = AREG((Opcode >> 0) & 7); |
32514 | PRE_IO |
32515 | READSX_LONG_F(adr, src) |
32516 | dst = AREGu32((Opcode >> 9) & 7); |
32517 | res = dst - src; |
32518 | flag_NotZ = res; |
32519 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32520 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32521 | flag_N = res >> 24; |
32522 | POST_IO |
32523 | RET(14) |
32524 | } |
32525 | |
32526 | // CMPA |
32527 | OPCODE(0xB1D8) |
32528 | { |
32529 | u32 adr, res; |
32530 | u32 src, dst; |
32531 | |
32532 | adr = AREG((Opcode >> 0) & 7); |
32533 | AREG((Opcode >> 0) & 7) += 4; |
32534 | PRE_IO |
32535 | READSX_LONG_F(adr, src) |
32536 | dst = AREGu32((Opcode >> 9) & 7); |
32537 | res = dst - src; |
32538 | flag_NotZ = res; |
32539 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32540 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32541 | flag_N = res >> 24; |
32542 | POST_IO |
32543 | RET(14) |
32544 | } |
32545 | |
32546 | // CMPA |
32547 | OPCODE(0xB1E0) |
32548 | { |
32549 | u32 adr, res; |
32550 | u32 src, dst; |
32551 | |
32552 | adr = AREG((Opcode >> 0) & 7) - 4; |
32553 | AREG((Opcode >> 0) & 7) = adr; |
32554 | PRE_IO |
32555 | READSX_LONG_F(adr, src) |
32556 | dst = AREGu32((Opcode >> 9) & 7); |
32557 | res = dst - src; |
32558 | flag_NotZ = res; |
32559 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32560 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32561 | flag_N = res >> 24; |
32562 | POST_IO |
32563 | RET(16) |
32564 | } |
32565 | |
32566 | // CMPA |
32567 | OPCODE(0xB1E8) |
32568 | { |
32569 | u32 adr, res; |
32570 | u32 src, dst; |
32571 | |
32572 | FETCH_SWORD(adr); |
32573 | adr += AREG((Opcode >> 0) & 7); |
32574 | PRE_IO |
32575 | READSX_LONG_F(adr, src) |
32576 | dst = AREGu32((Opcode >> 9) & 7); |
32577 | res = dst - src; |
32578 | flag_NotZ = res; |
32579 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32580 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32581 | flag_N = res >> 24; |
32582 | POST_IO |
32583 | RET(18) |
32584 | } |
32585 | |
32586 | // CMPA |
32587 | OPCODE(0xB1F0) |
32588 | { |
32589 | u32 adr, res; |
32590 | u32 src, dst; |
32591 | |
32592 | adr = AREG((Opcode >> 0) & 7); |
32593 | DECODE_EXT_WORD |
32594 | PRE_IO |
32595 | READSX_LONG_F(adr, src) |
32596 | dst = AREGu32((Opcode >> 9) & 7); |
32597 | res = dst - src; |
32598 | flag_NotZ = res; |
32599 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32600 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32601 | flag_N = res >> 24; |
32602 | POST_IO |
32603 | RET(20) |
32604 | } |
32605 | |
32606 | // CMPA |
32607 | OPCODE(0xB1F8) |
32608 | { |
32609 | u32 adr, res; |
32610 | u32 src, dst; |
32611 | |
32612 | FETCH_SWORD(adr); |
32613 | PRE_IO |
32614 | READSX_LONG_F(adr, src) |
32615 | dst = AREGu32((Opcode >> 9) & 7); |
32616 | res = dst - src; |
32617 | flag_NotZ = res; |
32618 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32619 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32620 | flag_N = res >> 24; |
32621 | POST_IO |
32622 | RET(18) |
32623 | } |
32624 | |
32625 | // CMPA |
32626 | OPCODE(0xB1F9) |
32627 | { |
32628 | u32 adr, res; |
32629 | u32 src, dst; |
32630 | |
32631 | FETCH_LONG(adr); |
32632 | PRE_IO |
32633 | READSX_LONG_F(adr, src) |
32634 | dst = AREGu32((Opcode >> 9) & 7); |
32635 | res = dst - src; |
32636 | flag_NotZ = res; |
32637 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32638 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32639 | flag_N = res >> 24; |
32640 | POST_IO |
32641 | RET(22) |
32642 | } |
32643 | |
32644 | // CMPA |
32645 | OPCODE(0xB1FA) |
32646 | { |
32647 | u32 adr, res; |
32648 | u32 src, dst; |
32649 | |
32650 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32651 | PC++; |
32652 | PRE_IO |
32653 | READSX_LONG_F(adr, src) |
32654 | dst = AREGu32((Opcode >> 9) & 7); |
32655 | res = dst - src; |
32656 | flag_NotZ = res; |
32657 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32658 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32659 | flag_N = res >> 24; |
32660 | POST_IO |
32661 | RET(18) |
32662 | } |
32663 | |
32664 | // CMPA |
32665 | OPCODE(0xB1FB) |
32666 | { |
32667 | u32 adr, res; |
32668 | u32 src, dst; |
32669 | |
32670 | adr = (u32)(PC) - BasePC; |
32671 | DECODE_EXT_WORD |
32672 | PRE_IO |
32673 | READSX_LONG_F(adr, src) |
32674 | dst = AREGu32((Opcode >> 9) & 7); |
32675 | res = dst - src; |
32676 | flag_NotZ = res; |
32677 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32678 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32679 | flag_N = res >> 24; |
32680 | POST_IO |
32681 | RET(20) |
32682 | } |
32683 | |
32684 | // CMPA |
32685 | OPCODE(0xB1FC) |
32686 | { |
32687 | u32 adr, res; |
32688 | u32 src, dst; |
32689 | |
32690 | FETCH_LONG(src); |
32691 | dst = AREGu32((Opcode >> 9) & 7); |
32692 | res = dst - src; |
32693 | flag_NotZ = res; |
32694 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32695 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32696 | flag_N = res >> 24; |
32697 | RET(14) |
32698 | } |
32699 | |
32700 | // CMPA |
32701 | OPCODE(0xB1DF) |
32702 | { |
32703 | u32 adr, res; |
32704 | u32 src, dst; |
32705 | |
32706 | adr = AREG(7); |
32707 | AREG(7) += 4; |
32708 | PRE_IO |
32709 | READSX_LONG_F(adr, src) |
32710 | dst = AREGu32((Opcode >> 9) & 7); |
32711 | res = dst - src; |
32712 | flag_NotZ = res; |
32713 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32714 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32715 | flag_N = res >> 24; |
32716 | POST_IO |
32717 | RET(14) |
32718 | } |
32719 | |
32720 | // CMPA |
32721 | OPCODE(0xB1E7) |
32722 | { |
32723 | u32 adr, res; |
32724 | u32 src, dst; |
32725 | |
32726 | adr = AREG(7) - 4; |
32727 | AREG(7) = adr; |
32728 | PRE_IO |
32729 | READSX_LONG_F(adr, src) |
32730 | dst = AREGu32((Opcode >> 9) & 7); |
32731 | res = dst - src; |
32732 | flag_NotZ = res; |
32733 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32734 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32735 | flag_N = res >> 24; |
32736 | POST_IO |
32737 | RET(16) |
32738 | } |
32739 | |
32740 | // ANDaD |
32741 | OPCODE(0xC000) |
32742 | { |
32743 | u32 adr, res; |
32744 | u32 src, dst; |
32745 | |
32746 | src = DREGu8((Opcode >> 0) & 7); |
32747 | res = DREGu8((Opcode >> 9) & 7); |
32748 | res &= src; |
32749 | flag_C = 0; |
32750 | flag_V = 0; |
32751 | flag_NotZ = res; |
32752 | flag_N = res; |
32753 | DREGu8((Opcode >> 9) & 7) = res; |
32754 | RET(4) |
32755 | } |
32756 | |
32757 | // ANDaD |
32758 | OPCODE(0xC010) |
32759 | { |
32760 | u32 adr, res; |
32761 | u32 src, dst; |
32762 | |
32763 | adr = AREG((Opcode >> 0) & 7); |
32764 | PRE_IO |
32765 | READ_BYTE_F(adr, src) |
32766 | res = DREGu8((Opcode >> 9) & 7); |
32767 | res &= src; |
32768 | flag_C = 0; |
32769 | flag_V = 0; |
32770 | flag_NotZ = res; |
32771 | flag_N = res; |
32772 | DREGu8((Opcode >> 9) & 7) = res; |
32773 | POST_IO |
32774 | RET(8) |
32775 | } |
32776 | |
32777 | // ANDaD |
32778 | OPCODE(0xC018) |
32779 | { |
32780 | u32 adr, res; |
32781 | u32 src, dst; |
32782 | |
32783 | adr = AREG((Opcode >> 0) & 7); |
32784 | AREG((Opcode >> 0) & 7) += 1; |
32785 | PRE_IO |
32786 | READ_BYTE_F(adr, src) |
32787 | res = DREGu8((Opcode >> 9) & 7); |
32788 | res &= src; |
32789 | flag_C = 0; |
32790 | flag_V = 0; |
32791 | flag_NotZ = res; |
32792 | flag_N = res; |
32793 | DREGu8((Opcode >> 9) & 7) = res; |
32794 | POST_IO |
32795 | RET(8) |
32796 | } |
32797 | |
32798 | // ANDaD |
32799 | OPCODE(0xC020) |
32800 | { |
32801 | u32 adr, res; |
32802 | u32 src, dst; |
32803 | |
32804 | adr = AREG((Opcode >> 0) & 7) - 1; |
32805 | AREG((Opcode >> 0) & 7) = adr; |
32806 | PRE_IO |
32807 | READ_BYTE_F(adr, src) |
32808 | res = DREGu8((Opcode >> 9) & 7); |
32809 | res &= src; |
32810 | flag_C = 0; |
32811 | flag_V = 0; |
32812 | flag_NotZ = res; |
32813 | flag_N = res; |
32814 | DREGu8((Opcode >> 9) & 7) = res; |
32815 | POST_IO |
32816 | RET(10) |
32817 | } |
32818 | |
32819 | // ANDaD |
32820 | OPCODE(0xC028) |
32821 | { |
32822 | u32 adr, res; |
32823 | u32 src, dst; |
32824 | |
32825 | FETCH_SWORD(adr); |
32826 | adr += AREG((Opcode >> 0) & 7); |
32827 | PRE_IO |
32828 | READ_BYTE_F(adr, src) |
32829 | res = DREGu8((Opcode >> 9) & 7); |
32830 | res &= src; |
32831 | flag_C = 0; |
32832 | flag_V = 0; |
32833 | flag_NotZ = res; |
32834 | flag_N = res; |
32835 | DREGu8((Opcode >> 9) & 7) = res; |
32836 | POST_IO |
32837 | RET(12) |
32838 | } |
32839 | |
32840 | // ANDaD |
32841 | OPCODE(0xC030) |
32842 | { |
32843 | u32 adr, res; |
32844 | u32 src, dst; |
32845 | |
32846 | adr = AREG((Opcode >> 0) & 7); |
32847 | DECODE_EXT_WORD |
32848 | PRE_IO |
32849 | READ_BYTE_F(adr, src) |
32850 | res = DREGu8((Opcode >> 9) & 7); |
32851 | res &= src; |
32852 | flag_C = 0; |
32853 | flag_V = 0; |
32854 | flag_NotZ = res; |
32855 | flag_N = res; |
32856 | DREGu8((Opcode >> 9) & 7) = res; |
32857 | POST_IO |
32858 | RET(14) |
32859 | } |
32860 | |
32861 | // ANDaD |
32862 | OPCODE(0xC038) |
32863 | { |
32864 | u32 adr, res; |
32865 | u32 src, dst; |
32866 | |
32867 | FETCH_SWORD(adr); |
32868 | PRE_IO |
32869 | READ_BYTE_F(adr, src) |
32870 | res = DREGu8((Opcode >> 9) & 7); |
32871 | res &= src; |
32872 | flag_C = 0; |
32873 | flag_V = 0; |
32874 | flag_NotZ = res; |
32875 | flag_N = res; |
32876 | DREGu8((Opcode >> 9) & 7) = res; |
32877 | POST_IO |
32878 | RET(12) |
32879 | } |
32880 | |
32881 | // ANDaD |
32882 | OPCODE(0xC039) |
32883 | { |
32884 | u32 adr, res; |
32885 | u32 src, dst; |
32886 | |
32887 | FETCH_LONG(adr); |
32888 | PRE_IO |
32889 | READ_BYTE_F(adr, src) |
32890 | res = DREGu8((Opcode >> 9) & 7); |
32891 | res &= src; |
32892 | flag_C = 0; |
32893 | flag_V = 0; |
32894 | flag_NotZ = res; |
32895 | flag_N = res; |
32896 | DREGu8((Opcode >> 9) & 7) = res; |
32897 | POST_IO |
32898 | RET(16) |
32899 | } |
32900 | |
32901 | // ANDaD |
32902 | OPCODE(0xC03A) |
32903 | { |
32904 | u32 adr, res; |
32905 | u32 src, dst; |
32906 | |
32907 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32908 | PC++; |
32909 | PRE_IO |
32910 | READ_BYTE_F(adr, src) |
32911 | res = DREGu8((Opcode >> 9) & 7); |
32912 | res &= src; |
32913 | flag_C = 0; |
32914 | flag_V = 0; |
32915 | flag_NotZ = res; |
32916 | flag_N = res; |
32917 | DREGu8((Opcode >> 9) & 7) = res; |
32918 | POST_IO |
32919 | RET(12) |
32920 | } |
32921 | |
32922 | // ANDaD |
32923 | OPCODE(0xC03B) |
32924 | { |
32925 | u32 adr, res; |
32926 | u32 src, dst; |
32927 | |
32928 | adr = (u32)(PC) - BasePC; |
32929 | DECODE_EXT_WORD |
32930 | PRE_IO |
32931 | READ_BYTE_F(adr, src) |
32932 | res = DREGu8((Opcode >> 9) & 7); |
32933 | res &= src; |
32934 | flag_C = 0; |
32935 | flag_V = 0; |
32936 | flag_NotZ = res; |
32937 | flag_N = res; |
32938 | DREGu8((Opcode >> 9) & 7) = res; |
32939 | POST_IO |
32940 | RET(14) |
32941 | } |
32942 | |
32943 | // ANDaD |
32944 | OPCODE(0xC03C) |
32945 | { |
32946 | u32 adr, res; |
32947 | u32 src, dst; |
32948 | |
32949 | FETCH_BYTE(src); |
32950 | res = DREGu8((Opcode >> 9) & 7); |
32951 | res &= src; |
32952 | flag_C = 0; |
32953 | flag_V = 0; |
32954 | flag_NotZ = res; |
32955 | flag_N = res; |
32956 | DREGu8((Opcode >> 9) & 7) = res; |
32957 | RET(8) |
32958 | } |
32959 | |
32960 | // ANDaD |
32961 | OPCODE(0xC01F) |
32962 | { |
32963 | u32 adr, res; |
32964 | u32 src, dst; |
32965 | |
32966 | adr = AREG(7); |
32967 | AREG(7) += 2; |
32968 | PRE_IO |
32969 | READ_BYTE_F(adr, src) |
32970 | res = DREGu8((Opcode >> 9) & 7); |
32971 | res &= src; |
32972 | flag_C = 0; |
32973 | flag_V = 0; |
32974 | flag_NotZ = res; |
32975 | flag_N = res; |
32976 | DREGu8((Opcode >> 9) & 7) = res; |
32977 | POST_IO |
32978 | RET(8) |
32979 | } |
32980 | |
32981 | // ANDaD |
32982 | OPCODE(0xC027) |
32983 | { |
32984 | u32 adr, res; |
32985 | u32 src, dst; |
32986 | |
32987 | adr = AREG(7) - 2; |
32988 | AREG(7) = adr; |
32989 | PRE_IO |
32990 | READ_BYTE_F(adr, src) |
32991 | res = DREGu8((Opcode >> 9) & 7); |
32992 | res &= src; |
32993 | flag_C = 0; |
32994 | flag_V = 0; |
32995 | flag_NotZ = res; |
32996 | flag_N = res; |
32997 | DREGu8((Opcode >> 9) & 7) = res; |
32998 | POST_IO |
32999 | RET(10) |
33000 | } |
33001 | |
33002 | // ANDaD |
33003 | OPCODE(0xC040) |
33004 | { |
33005 | u32 adr, res; |
33006 | u32 src, dst; |
33007 | |
33008 | src = DREGu16((Opcode >> 0) & 7); |
33009 | res = DREGu16((Opcode >> 9) & 7); |
33010 | res &= src; |
33011 | flag_C = 0; |
33012 | flag_V = 0; |
33013 | flag_NotZ = res; |
33014 | flag_N = res >> 8; |
33015 | DREGu16((Opcode >> 9) & 7) = res; |
33016 | RET(4) |
33017 | } |
33018 | |
33019 | // ANDaD |
33020 | OPCODE(0xC050) |
33021 | { |
33022 | u32 adr, res; |
33023 | u32 src, dst; |
33024 | |
33025 | adr = AREG((Opcode >> 0) & 7); |
33026 | PRE_IO |
33027 | READ_WORD_F(adr, src) |
33028 | res = DREGu16((Opcode >> 9) & 7); |
33029 | res &= src; |
33030 | flag_C = 0; |
33031 | flag_V = 0; |
33032 | flag_NotZ = res; |
33033 | flag_N = res >> 8; |
33034 | DREGu16((Opcode >> 9) & 7) = res; |
33035 | POST_IO |
33036 | RET(8) |
33037 | } |
33038 | |
33039 | // ANDaD |
33040 | OPCODE(0xC058) |
33041 | { |
33042 | u32 adr, res; |
33043 | u32 src, dst; |
33044 | |
33045 | adr = AREG((Opcode >> 0) & 7); |
33046 | AREG((Opcode >> 0) & 7) += 2; |
33047 | PRE_IO |
33048 | READ_WORD_F(adr, src) |
33049 | res = DREGu16((Opcode >> 9) & 7); |
33050 | res &= src; |
33051 | flag_C = 0; |
33052 | flag_V = 0; |
33053 | flag_NotZ = res; |
33054 | flag_N = res >> 8; |
33055 | DREGu16((Opcode >> 9) & 7) = res; |
33056 | POST_IO |
33057 | RET(8) |
33058 | } |
33059 | |
33060 | // ANDaD |
33061 | OPCODE(0xC060) |
33062 | { |
33063 | u32 adr, res; |
33064 | u32 src, dst; |
33065 | |
33066 | adr = AREG((Opcode >> 0) & 7) - 2; |
33067 | AREG((Opcode >> 0) & 7) = adr; |
33068 | PRE_IO |
33069 | READ_WORD_F(adr, src) |
33070 | res = DREGu16((Opcode >> 9) & 7); |
33071 | res &= src; |
33072 | flag_C = 0; |
33073 | flag_V = 0; |
33074 | flag_NotZ = res; |
33075 | flag_N = res >> 8; |
33076 | DREGu16((Opcode >> 9) & 7) = res; |
33077 | POST_IO |
33078 | RET(10) |
33079 | } |
33080 | |
33081 | // ANDaD |
33082 | OPCODE(0xC068) |
33083 | { |
33084 | u32 adr, res; |
33085 | u32 src, dst; |
33086 | |
33087 | FETCH_SWORD(adr); |
33088 | adr += AREG((Opcode >> 0) & 7); |
33089 | PRE_IO |
33090 | READ_WORD_F(adr, src) |
33091 | res = DREGu16((Opcode >> 9) & 7); |
33092 | res &= src; |
33093 | flag_C = 0; |
33094 | flag_V = 0; |
33095 | flag_NotZ = res; |
33096 | flag_N = res >> 8; |
33097 | DREGu16((Opcode >> 9) & 7) = res; |
33098 | POST_IO |
33099 | RET(12) |
33100 | } |
33101 | |
33102 | // ANDaD |
33103 | OPCODE(0xC070) |
33104 | { |
33105 | u32 adr, res; |
33106 | u32 src, dst; |
33107 | |
33108 | adr = AREG((Opcode >> 0) & 7); |
33109 | DECODE_EXT_WORD |
33110 | PRE_IO |
33111 | READ_WORD_F(adr, src) |
33112 | res = DREGu16((Opcode >> 9) & 7); |
33113 | res &= src; |
33114 | flag_C = 0; |
33115 | flag_V = 0; |
33116 | flag_NotZ = res; |
33117 | flag_N = res >> 8; |
33118 | DREGu16((Opcode >> 9) & 7) = res; |
33119 | POST_IO |
33120 | RET(14) |
33121 | } |
33122 | |
33123 | // ANDaD |
33124 | OPCODE(0xC078) |
33125 | { |
33126 | u32 adr, res; |
33127 | u32 src, dst; |
33128 | |
33129 | FETCH_SWORD(adr); |
33130 | PRE_IO |
33131 | READ_WORD_F(adr, src) |
33132 | res = DREGu16((Opcode >> 9) & 7); |
33133 | res &= src; |
33134 | flag_C = 0; |
33135 | flag_V = 0; |
33136 | flag_NotZ = res; |
33137 | flag_N = res >> 8; |
33138 | DREGu16((Opcode >> 9) & 7) = res; |
33139 | POST_IO |
33140 | RET(12) |
33141 | } |
33142 | |
33143 | // ANDaD |
33144 | OPCODE(0xC079) |
33145 | { |
33146 | u32 adr, res; |
33147 | u32 src, dst; |
33148 | |
33149 | FETCH_LONG(adr); |
33150 | PRE_IO |
33151 | READ_WORD_F(adr, src) |
33152 | res = DREGu16((Opcode >> 9) & 7); |
33153 | res &= src; |
33154 | flag_C = 0; |
33155 | flag_V = 0; |
33156 | flag_NotZ = res; |
33157 | flag_N = res >> 8; |
33158 | DREGu16((Opcode >> 9) & 7) = res; |
33159 | POST_IO |
33160 | RET(16) |
33161 | } |
33162 | |
33163 | // ANDaD |
33164 | OPCODE(0xC07A) |
33165 | { |
33166 | u32 adr, res; |
33167 | u32 src, dst; |
33168 | |
33169 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
33170 | PC++; |
33171 | PRE_IO |
33172 | READ_WORD_F(adr, src) |
33173 | res = DREGu16((Opcode >> 9) & 7); |
33174 | res &= src; |
33175 | flag_C = 0; |
33176 | flag_V = 0; |
33177 | flag_NotZ = res; |
33178 | flag_N = res >> 8; |
33179 | DREGu16((Opcode >> 9) & 7) = res; |
33180 | POST_IO |
33181 | RET(12) |
33182 | } |
33183 | |
33184 | // ANDaD |
33185 | OPCODE(0xC07B) |
33186 | { |
33187 | u32 adr, res; |
33188 | u32 src, dst; |
33189 | |
33190 | adr = (u32)(PC) - BasePC; |
33191 | DECODE_EXT_WORD |
33192 | PRE_IO |
33193 | READ_WORD_F(adr, src) |
33194 | res = DREGu16((Opcode >> 9) & 7); |
33195 | res &= src; |
33196 | flag_C = 0; |
33197 | flag_V = 0; |
33198 | flag_NotZ = res; |
33199 | flag_N = res >> 8; |
33200 | DREGu16((Opcode >> 9) & 7) = res; |
33201 | POST_IO |
33202 | RET(14) |
33203 | } |
33204 | |
33205 | // ANDaD |
33206 | OPCODE(0xC07C) |
33207 | { |
33208 | u32 adr, res; |
33209 | u32 src, dst; |
33210 | |
33211 | FETCH_WORD(src); |
33212 | res = DREGu16((Opcode >> 9) & 7); |
33213 | res &= src; |
33214 | flag_C = 0; |
33215 | flag_V = 0; |
33216 | flag_NotZ = res; |
33217 | flag_N = res >> 8; |
33218 | DREGu16((Opcode >> 9) & 7) = res; |
33219 | RET(8) |
33220 | } |
33221 | |
33222 | // ANDaD |
33223 | OPCODE(0xC05F) |
33224 | { |
33225 | u32 adr, res; |
33226 | u32 src, dst; |
33227 | |
33228 | adr = AREG(7); |
33229 | AREG(7) += 2; |
33230 | PRE_IO |
33231 | READ_WORD_F(adr, src) |
33232 | res = DREGu16((Opcode >> 9) & 7); |
33233 | res &= src; |
33234 | flag_C = 0; |
33235 | flag_V = 0; |
33236 | flag_NotZ = res; |
33237 | flag_N = res >> 8; |
33238 | DREGu16((Opcode >> 9) & 7) = res; |
33239 | POST_IO |
33240 | RET(8) |
33241 | } |
33242 | |
33243 | // ANDaD |
33244 | OPCODE(0xC067) |
33245 | { |
33246 | u32 adr, res; |
33247 | u32 src, dst; |
33248 | |
33249 | adr = AREG(7) - 2; |
33250 | AREG(7) = adr; |
33251 | PRE_IO |
33252 | READ_WORD_F(adr, src) |
33253 | res = DREGu16((Opcode >> 9) & 7); |
33254 | res &= src; |
33255 | flag_C = 0; |
33256 | flag_V = 0; |
33257 | flag_NotZ = res; |
33258 | flag_N = res >> 8; |
33259 | DREGu16((Opcode >> 9) & 7) = res; |
33260 | POST_IO |
33261 | RET(10) |
33262 | } |
33263 | |
33264 | // ANDaD |
33265 | OPCODE(0xC080) |
33266 | { |
33267 | u32 adr, res; |
33268 | u32 src, dst; |
33269 | |
33270 | src = DREGu32((Opcode >> 0) & 7); |
33271 | res = DREGu32((Opcode >> 9) & 7); |
33272 | res &= src; |
33273 | flag_C = 0; |
33274 | flag_V = 0; |
33275 | flag_NotZ = res; |
33276 | flag_N = res >> 24; |
33277 | DREGu32((Opcode >> 9) & 7) = res; |
33278 | RET(8) |
33279 | } |
33280 | |
33281 | // ANDaD |
33282 | OPCODE(0xC090) |
33283 | { |
33284 | u32 adr, res; |
33285 | u32 src, dst; |
33286 | |
33287 | adr = AREG((Opcode >> 0) & 7); |
33288 | PRE_IO |
33289 | READ_LONG_F(adr, src) |
33290 | res = DREGu32((Opcode >> 9) & 7); |
33291 | res &= src; |
33292 | flag_C = 0; |
33293 | flag_V = 0; |
33294 | flag_NotZ = res; |
33295 | flag_N = res >> 24; |
33296 | DREGu32((Opcode >> 9) & 7) = res; |
33297 | POST_IO |
33298 | RET(14) |
33299 | } |
33300 | |
33301 | // ANDaD |
33302 | OPCODE(0xC098) |
33303 | { |
33304 | u32 adr, res; |
33305 | u32 src, dst; |
33306 | |
33307 | adr = AREG((Opcode >> 0) & 7); |
33308 | AREG((Opcode >> 0) & 7) += 4; |
33309 | PRE_IO |
33310 | READ_LONG_F(adr, src) |
33311 | res = DREGu32((Opcode >> 9) & 7); |
33312 | res &= src; |
33313 | flag_C = 0; |
33314 | flag_V = 0; |
33315 | flag_NotZ = res; |
33316 | flag_N = res >> 24; |
33317 | DREGu32((Opcode >> 9) & 7) = res; |
33318 | POST_IO |
33319 | RET(14) |
33320 | } |
33321 | |
33322 | // ANDaD |
33323 | OPCODE(0xC0A0) |
33324 | { |
33325 | u32 adr, res; |
33326 | u32 src, dst; |
33327 | |
33328 | adr = AREG((Opcode >> 0) & 7) - 4; |
33329 | AREG((Opcode >> 0) & 7) = adr; |
33330 | PRE_IO |
33331 | READ_LONG_F(adr, src) |
33332 | res = DREGu32((Opcode >> 9) & 7); |
33333 | res &= src; |
33334 | flag_C = 0; |
33335 | flag_V = 0; |
33336 | flag_NotZ = res; |
33337 | flag_N = res >> 24; |
33338 | DREGu32((Opcode >> 9) & 7) = res; |
33339 | POST_IO |
33340 | RET(16) |
33341 | } |
33342 | |
33343 | // ANDaD |
33344 | OPCODE(0xC0A8) |
33345 | { |
33346 | u32 adr, res; |
33347 | u32 src, dst; |
33348 | |
33349 | FETCH_SWORD(adr); |
33350 | adr += AREG((Opcode >> 0) & 7); |
33351 | PRE_IO |
33352 | READ_LONG_F(adr, src) |
33353 | res = DREGu32((Opcode >> 9) & 7); |
33354 | res &= src; |
33355 | flag_C = 0; |
33356 | flag_V = 0; |
33357 | flag_NotZ = res; |
33358 | flag_N = res >> 24; |
33359 | DREGu32((Opcode >> 9) & 7) = res; |
33360 | POST_IO |
33361 | RET(18) |
33362 | } |
33363 | |
33364 | // ANDaD |
33365 | OPCODE(0xC0B0) |
33366 | { |
33367 | u32 adr, res; |
33368 | u32 src, dst; |
33369 | |
33370 | adr = AREG((Opcode >> 0) & 7); |
33371 | DECODE_EXT_WORD |
33372 | PRE_IO |
33373 | READ_LONG_F(adr, src) |
33374 | res = DREGu32((Opcode >> 9) & 7); |
33375 | res &= src; |
33376 | flag_C = 0; |
33377 | flag_V = 0; |
33378 | flag_NotZ = res; |
33379 | flag_N = res >> 24; |
33380 | DREGu32((Opcode >> 9) & 7) = res; |
33381 | POST_IO |
33382 | RET(20) |
33383 | } |
33384 | |
33385 | // ANDaD |
33386 | OPCODE(0xC0B8) |
33387 | { |
33388 | u32 adr, res; |
33389 | u32 src, dst; |
33390 | |
33391 | FETCH_SWORD(adr); |
33392 | PRE_IO |
33393 | READ_LONG_F(adr, src) |
33394 | res = DREGu32((Opcode >> 9) & 7); |
33395 | res &= src; |
33396 | flag_C = 0; |
33397 | flag_V = 0; |
33398 | flag_NotZ = res; |
33399 | flag_N = res >> 24; |
33400 | DREGu32((Opcode >> 9) & 7) = res; |
33401 | POST_IO |
33402 | RET(18) |
33403 | } |
33404 | |
33405 | // ANDaD |
33406 | OPCODE(0xC0B9) |
33407 | { |
33408 | u32 adr, res; |
33409 | u32 src, dst; |
33410 | |
33411 | FETCH_LONG(adr); |
33412 | PRE_IO |
33413 | READ_LONG_F(adr, src) |
33414 | res = DREGu32((Opcode >> 9) & 7); |
33415 | res &= src; |
33416 | flag_C = 0; |
33417 | flag_V = 0; |
33418 | flag_NotZ = res; |
33419 | flag_N = res >> 24; |
33420 | DREGu32((Opcode >> 9) & 7) = res; |
33421 | POST_IO |
33422 | RET(22) |
33423 | } |
33424 | |
33425 | // ANDaD |
33426 | OPCODE(0xC0BA) |
33427 | { |
33428 | u32 adr, res; |
33429 | u32 src, dst; |
33430 | |
33431 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
33432 | PC++; |
33433 | PRE_IO |
33434 | READ_LONG_F(adr, src) |
33435 | res = DREGu32((Opcode >> 9) & 7); |
33436 | res &= src; |
33437 | flag_C = 0; |
33438 | flag_V = 0; |
33439 | flag_NotZ = res; |
33440 | flag_N = res >> 24; |
33441 | DREGu32((Opcode >> 9) & 7) = res; |
33442 | POST_IO |
33443 | RET(18) |
33444 | } |
33445 | |
33446 | // ANDaD |
33447 | OPCODE(0xC0BB) |
33448 | { |
33449 | u32 adr, res; |
33450 | u32 src, dst; |
33451 | |
33452 | adr = (u32)(PC) - BasePC; |
33453 | DECODE_EXT_WORD |
33454 | PRE_IO |
33455 | READ_LONG_F(adr, src) |
33456 | res = DREGu32((Opcode >> 9) & 7); |
33457 | res &= src; |
33458 | flag_C = 0; |
33459 | flag_V = 0; |
33460 | flag_NotZ = res; |
33461 | flag_N = res >> 24; |
33462 | DREGu32((Opcode >> 9) & 7) = res; |
33463 | POST_IO |
33464 | RET(20) |
33465 | } |
33466 | |
33467 | // ANDaD |
33468 | OPCODE(0xC0BC) |
33469 | { |
33470 | u32 adr, res; |
33471 | u32 src, dst; |
33472 | |
33473 | FETCH_LONG(src); |
33474 | res = DREGu32((Opcode >> 9) & 7); |
33475 | res &= src; |
33476 | flag_C = 0; |
33477 | flag_V = 0; |
33478 | flag_NotZ = res; |
33479 | flag_N = res >> 24; |
33480 | DREGu32((Opcode >> 9) & 7) = res; |
33481 | RET(16) |
33482 | } |
33483 | |
33484 | // ANDaD |
33485 | OPCODE(0xC09F) |
33486 | { |
33487 | u32 adr, res; |
33488 | u32 src, dst; |
33489 | |
33490 | adr = AREG(7); |
33491 | AREG(7) += 4; |
33492 | PRE_IO |
33493 | READ_LONG_F(adr, src) |
33494 | res = DREGu32((Opcode >> 9) & 7); |
33495 | res &= src; |
33496 | flag_C = 0; |
33497 | flag_V = 0; |
33498 | flag_NotZ = res; |
33499 | flag_N = res >> 24; |
33500 | DREGu32((Opcode >> 9) & 7) = res; |
33501 | POST_IO |
33502 | RET(14) |
33503 | } |
33504 | |
33505 | // ANDaD |
33506 | OPCODE(0xC0A7) |
33507 | { |
33508 | u32 adr, res; |
33509 | u32 src, dst; |
33510 | |
33511 | adr = AREG(7) - 4; |
33512 | AREG(7) = adr; |
33513 | PRE_IO |
33514 | READ_LONG_F(adr, src) |
33515 | res = DREGu32((Opcode >> 9) & 7); |
33516 | res &= src; |
33517 | flag_C = 0; |
33518 | flag_V = 0; |
33519 | flag_NotZ = res; |
33520 | flag_N = res >> 24; |
33521 | DREGu32((Opcode >> 9) & 7) = res; |
33522 | POST_IO |
33523 | RET(16) |
33524 | } |
33525 | |
33526 | // ANDDa |
33527 | OPCODE(0xC110) |
33528 | { |
33529 | u32 adr, res; |
33530 | u32 src, dst; |
33531 | |
33532 | src = DREGu8((Opcode >> 9) & 7); |
33533 | adr = AREG((Opcode >> 0) & 7); |
33534 | PRE_IO |
33535 | READ_BYTE_F(adr, res) |
33536 | res &= src; |
33537 | flag_C = 0; |
33538 | flag_V = 0; |
33539 | flag_NotZ = res; |
33540 | flag_N = res; |
33541 | WRITE_BYTE_F(adr, res) |
33542 | POST_IO |
33543 | RET(12) |
33544 | } |
33545 | |
33546 | // ANDDa |
33547 | OPCODE(0xC118) |
33548 | { |
33549 | u32 adr, res; |
33550 | u32 src, dst; |
33551 | |
33552 | src = DREGu8((Opcode >> 9) & 7); |
33553 | adr = AREG((Opcode >> 0) & 7); |
33554 | AREG((Opcode >> 0) & 7) += 1; |
33555 | PRE_IO |
33556 | READ_BYTE_F(adr, res) |
33557 | res &= src; |
33558 | flag_C = 0; |
33559 | flag_V = 0; |
33560 | flag_NotZ = res; |
33561 | flag_N = res; |
33562 | WRITE_BYTE_F(adr, res) |
33563 | POST_IO |
33564 | RET(12) |
33565 | } |
33566 | |
33567 | // ANDDa |
33568 | OPCODE(0xC120) |
33569 | { |
33570 | u32 adr, res; |
33571 | u32 src, dst; |
33572 | |
33573 | src = DREGu8((Opcode >> 9) & 7); |
33574 | adr = AREG((Opcode >> 0) & 7) - 1; |
33575 | AREG((Opcode >> 0) & 7) = adr; |
33576 | PRE_IO |
33577 | READ_BYTE_F(adr, res) |
33578 | res &= src; |
33579 | flag_C = 0; |
33580 | flag_V = 0; |
33581 | flag_NotZ = res; |
33582 | flag_N = res; |
33583 | WRITE_BYTE_F(adr, res) |
33584 | POST_IO |
33585 | RET(14) |
33586 | } |
33587 | |
33588 | // ANDDa |
33589 | OPCODE(0xC128) |
33590 | { |
33591 | u32 adr, res; |
33592 | u32 src, dst; |
33593 | |
33594 | src = DREGu8((Opcode >> 9) & 7); |
33595 | FETCH_SWORD(adr); |
33596 | adr += AREG((Opcode >> 0) & 7); |
33597 | PRE_IO |
33598 | READ_BYTE_F(adr, res) |
33599 | res &= src; |
33600 | flag_C = 0; |
33601 | flag_V = 0; |
33602 | flag_NotZ = res; |
33603 | flag_N = res; |
33604 | WRITE_BYTE_F(adr, res) |
33605 | POST_IO |
33606 | RET(16) |
33607 | } |
33608 | |
33609 | // ANDDa |
33610 | OPCODE(0xC130) |
33611 | { |
33612 | u32 adr, res; |
33613 | u32 src, dst; |
33614 | |
33615 | src = DREGu8((Opcode >> 9) & 7); |
33616 | adr = AREG((Opcode >> 0) & 7); |
33617 | DECODE_EXT_WORD |
33618 | PRE_IO |
33619 | READ_BYTE_F(adr, res) |
33620 | res &= src; |
33621 | flag_C = 0; |
33622 | flag_V = 0; |
33623 | flag_NotZ = res; |
33624 | flag_N = res; |
33625 | WRITE_BYTE_F(adr, res) |
33626 | POST_IO |
33627 | RET(18) |
33628 | } |
33629 | |
33630 | // ANDDa |
33631 | OPCODE(0xC138) |
33632 | { |
33633 | u32 adr, res; |
33634 | u32 src, dst; |
33635 | |
33636 | src = DREGu8((Opcode >> 9) & 7); |
33637 | FETCH_SWORD(adr); |
33638 | PRE_IO |
33639 | READ_BYTE_F(adr, res) |
33640 | res &= src; |
33641 | flag_C = 0; |
33642 | flag_V = 0; |
33643 | flag_NotZ = res; |
33644 | flag_N = res; |
33645 | WRITE_BYTE_F(adr, res) |
33646 | POST_IO |
33647 | RET(16) |
33648 | } |
33649 | |
33650 | // ANDDa |
33651 | OPCODE(0xC139) |
33652 | { |
33653 | u32 adr, res; |
33654 | u32 src, dst; |
33655 | |
33656 | src = DREGu8((Opcode >> 9) & 7); |
33657 | FETCH_LONG(adr); |
33658 | PRE_IO |
33659 | READ_BYTE_F(adr, res) |
33660 | res &= src; |
33661 | flag_C = 0; |
33662 | flag_V = 0; |
33663 | flag_NotZ = res; |
33664 | flag_N = res; |
33665 | WRITE_BYTE_F(adr, res) |
33666 | POST_IO |
33667 | RET(20) |
33668 | } |
33669 | |
33670 | // ANDDa |
33671 | OPCODE(0xC11F) |
33672 | { |
33673 | u32 adr, res; |
33674 | u32 src, dst; |
33675 | |
33676 | src = DREGu8((Opcode >> 9) & 7); |
33677 | adr = AREG(7); |
33678 | AREG(7) += 2; |
33679 | PRE_IO |
33680 | READ_BYTE_F(adr, res) |
33681 | res &= src; |
33682 | flag_C = 0; |
33683 | flag_V = 0; |
33684 | flag_NotZ = res; |
33685 | flag_N = res; |
33686 | WRITE_BYTE_F(adr, res) |
33687 | POST_IO |
33688 | RET(12) |
33689 | } |
33690 | |
33691 | // ANDDa |
33692 | OPCODE(0xC127) |
33693 | { |
33694 | u32 adr, res; |
33695 | u32 src, dst; |
33696 | |
33697 | src = DREGu8((Opcode >> 9) & 7); |
33698 | adr = AREG(7) - 2; |
33699 | AREG(7) = adr; |
33700 | PRE_IO |
33701 | READ_BYTE_F(adr, res) |
33702 | res &= src; |
33703 | flag_C = 0; |
33704 | flag_V = 0; |
33705 | flag_NotZ = res; |
33706 | flag_N = res; |
33707 | WRITE_BYTE_F(adr, res) |
33708 | POST_IO |
33709 | RET(14) |
33710 | } |
33711 | |
33712 | // ANDDa |
33713 | OPCODE(0xC150) |
33714 | { |
33715 | u32 adr, res; |
33716 | u32 src, dst; |
33717 | |
33718 | src = DREGu16((Opcode >> 9) & 7); |
33719 | adr = AREG((Opcode >> 0) & 7); |
33720 | PRE_IO |
33721 | READ_WORD_F(adr, res) |
33722 | res &= src; |
33723 | flag_C = 0; |
33724 | flag_V = 0; |
33725 | flag_NotZ = res; |
33726 | flag_N = res >> 8; |
33727 | WRITE_WORD_F(adr, res) |
33728 | POST_IO |
33729 | RET(12) |
33730 | } |
33731 | |
33732 | // ANDDa |
33733 | OPCODE(0xC158) |
33734 | { |
33735 | u32 adr, res; |
33736 | u32 src, dst; |
33737 | |
33738 | src = DREGu16((Opcode >> 9) & 7); |
33739 | adr = AREG((Opcode >> 0) & 7); |
33740 | AREG((Opcode >> 0) & 7) += 2; |
33741 | PRE_IO |
33742 | READ_WORD_F(adr, res) |
33743 | res &= src; |
33744 | flag_C = 0; |
33745 | flag_V = 0; |
33746 | flag_NotZ = res; |
33747 | flag_N = res >> 8; |
33748 | WRITE_WORD_F(adr, res) |
33749 | POST_IO |
33750 | RET(12) |
33751 | } |
33752 | |
33753 | // ANDDa |
33754 | OPCODE(0xC160) |
33755 | { |
33756 | u32 adr, res; |
33757 | u32 src, dst; |
33758 | |
33759 | src = DREGu16((Opcode >> 9) & 7); |
33760 | adr = AREG((Opcode >> 0) & 7) - 2; |
33761 | AREG((Opcode >> 0) & 7) = adr; |
33762 | PRE_IO |
33763 | READ_WORD_F(adr, res) |
33764 | res &= src; |
33765 | flag_C = 0; |
33766 | flag_V = 0; |
33767 | flag_NotZ = res; |
33768 | flag_N = res >> 8; |
33769 | WRITE_WORD_F(adr, res) |
33770 | POST_IO |
33771 | RET(14) |
33772 | } |
33773 | |
33774 | // ANDDa |
33775 | OPCODE(0xC168) |
33776 | { |
33777 | u32 adr, res; |
33778 | u32 src, dst; |
33779 | |
33780 | src = DREGu16((Opcode >> 9) & 7); |
33781 | FETCH_SWORD(adr); |
33782 | adr += AREG((Opcode >> 0) & 7); |
33783 | PRE_IO |
33784 | READ_WORD_F(adr, res) |
33785 | res &= src; |
33786 | flag_C = 0; |
33787 | flag_V = 0; |
33788 | flag_NotZ = res; |
33789 | flag_N = res >> 8; |
33790 | WRITE_WORD_F(adr, res) |
33791 | POST_IO |
33792 | RET(16) |
33793 | } |
33794 | |
33795 | // ANDDa |
33796 | OPCODE(0xC170) |
33797 | { |
33798 | u32 adr, res; |
33799 | u32 src, dst; |
33800 | |
33801 | src = DREGu16((Opcode >> 9) & 7); |
33802 | adr = AREG((Opcode >> 0) & 7); |
33803 | DECODE_EXT_WORD |
33804 | PRE_IO |
33805 | READ_WORD_F(adr, res) |
33806 | res &= src; |
33807 | flag_C = 0; |
33808 | flag_V = 0; |
33809 | flag_NotZ = res; |
33810 | flag_N = res >> 8; |
33811 | WRITE_WORD_F(adr, res) |
33812 | POST_IO |
33813 | RET(18) |
33814 | } |
33815 | |
33816 | // ANDDa |
33817 | OPCODE(0xC178) |
33818 | { |
33819 | u32 adr, res; |
33820 | u32 src, dst; |
33821 | |
33822 | src = DREGu16((Opcode >> 9) & 7); |
33823 | FETCH_SWORD(adr); |
33824 | PRE_IO |
33825 | READ_WORD_F(adr, res) |
33826 | res &= src; |
33827 | flag_C = 0; |
33828 | flag_V = 0; |
33829 | flag_NotZ = res; |
33830 | flag_N = res >> 8; |
33831 | WRITE_WORD_F(adr, res) |
33832 | POST_IO |
33833 | RET(16) |
33834 | } |
33835 | |
33836 | // ANDDa |
33837 | OPCODE(0xC179) |
33838 | { |
33839 | u32 adr, res; |
33840 | u32 src, dst; |
33841 | |
33842 | src = DREGu16((Opcode >> 9) & 7); |
33843 | FETCH_LONG(adr); |
33844 | PRE_IO |
33845 | READ_WORD_F(adr, res) |
33846 | res &= src; |
33847 | flag_C = 0; |
33848 | flag_V = 0; |
33849 | flag_NotZ = res; |
33850 | flag_N = res >> 8; |
33851 | WRITE_WORD_F(adr, res) |
33852 | POST_IO |
33853 | RET(20) |
33854 | } |
33855 | |
33856 | // ANDDa |
33857 | OPCODE(0xC15F) |
33858 | { |
33859 | u32 adr, res; |
33860 | u32 src, dst; |
33861 | |
33862 | src = DREGu16((Opcode >> 9) & 7); |
33863 | adr = AREG(7); |
33864 | AREG(7) += 2; |
33865 | PRE_IO |
33866 | READ_WORD_F(adr, res) |
33867 | res &= src; |
33868 | flag_C = 0; |
33869 | flag_V = 0; |
33870 | flag_NotZ = res; |
33871 | flag_N = res >> 8; |
33872 | WRITE_WORD_F(adr, res) |
33873 | POST_IO |
33874 | RET(12) |
33875 | } |
33876 | |
33877 | // ANDDa |
33878 | OPCODE(0xC167) |
33879 | { |
33880 | u32 adr, res; |
33881 | u32 src, dst; |
33882 | |
33883 | src = DREGu16((Opcode >> 9) & 7); |
33884 | adr = AREG(7) - 2; |
33885 | AREG(7) = adr; |
33886 | PRE_IO |
33887 | READ_WORD_F(adr, res) |
33888 | res &= src; |
33889 | flag_C = 0; |
33890 | flag_V = 0; |
33891 | flag_NotZ = res; |
33892 | flag_N = res >> 8; |
33893 | WRITE_WORD_F(adr, res) |
33894 | POST_IO |
33895 | RET(14) |
33896 | } |
33897 | |
33898 | // ANDDa |
33899 | OPCODE(0xC190) |
33900 | { |
33901 | u32 adr, res; |
33902 | u32 src, dst; |
33903 | |
33904 | src = DREGu32((Opcode >> 9) & 7); |
33905 | adr = AREG((Opcode >> 0) & 7); |
33906 | PRE_IO |
33907 | READ_LONG_F(adr, res) |
33908 | res &= src; |
33909 | flag_C = 0; |
33910 | flag_V = 0; |
33911 | flag_NotZ = res; |
33912 | flag_N = res >> 24; |
33913 | WRITE_LONG_F(adr, res) |
33914 | POST_IO |
33915 | RET(20) |
33916 | } |
33917 | |
33918 | // ANDDa |
33919 | OPCODE(0xC198) |
33920 | { |
33921 | u32 adr, res; |
33922 | u32 src, dst; |
33923 | |
33924 | src = DREGu32((Opcode >> 9) & 7); |
33925 | adr = AREG((Opcode >> 0) & 7); |
33926 | AREG((Opcode >> 0) & 7) += 4; |
33927 | PRE_IO |
33928 | READ_LONG_F(adr, res) |
33929 | res &= src; |
33930 | flag_C = 0; |
33931 | flag_V = 0; |
33932 | flag_NotZ = res; |
33933 | flag_N = res >> 24; |
33934 | WRITE_LONG_F(adr, res) |
33935 | POST_IO |
33936 | RET(20) |
33937 | } |
33938 | |
33939 | // ANDDa |
33940 | OPCODE(0xC1A0) |
33941 | { |
33942 | u32 adr, res; |
33943 | u32 src, dst; |
33944 | |
33945 | src = DREGu32((Opcode >> 9) & 7); |
33946 | adr = AREG((Opcode >> 0) & 7) - 4; |
33947 | AREG((Opcode >> 0) & 7) = adr; |
33948 | PRE_IO |
33949 | READ_LONG_F(adr, res) |
33950 | res &= src; |
33951 | flag_C = 0; |
33952 | flag_V = 0; |
33953 | flag_NotZ = res; |
33954 | flag_N = res >> 24; |
33955 | WRITE_LONG_F(adr, res) |
33956 | POST_IO |
33957 | RET(22) |
33958 | } |
33959 | |
33960 | // ANDDa |
33961 | OPCODE(0xC1A8) |
33962 | { |
33963 | u32 adr, res; |
33964 | u32 src, dst; |
33965 | |
33966 | src = DREGu32((Opcode >> 9) & 7); |
33967 | FETCH_SWORD(adr); |
33968 | adr += AREG((Opcode >> 0) & 7); |
33969 | PRE_IO |
33970 | READ_LONG_F(adr, res) |
33971 | res &= src; |
33972 | flag_C = 0; |
33973 | flag_V = 0; |
33974 | flag_NotZ = res; |
33975 | flag_N = res >> 24; |
33976 | WRITE_LONG_F(adr, res) |
33977 | POST_IO |
33978 | RET(24) |
33979 | } |
33980 | |
33981 | // ANDDa |
33982 | OPCODE(0xC1B0) |
33983 | { |
33984 | u32 adr, res; |
33985 | u32 src, dst; |
33986 | |
33987 | src = DREGu32((Opcode >> 9) & 7); |
33988 | adr = AREG((Opcode >> 0) & 7); |
33989 | DECODE_EXT_WORD |
33990 | PRE_IO |
33991 | READ_LONG_F(adr, res) |
33992 | res &= src; |
33993 | flag_C = 0; |
33994 | flag_V = 0; |
33995 | flag_NotZ = res; |
33996 | flag_N = res >> 24; |
33997 | WRITE_LONG_F(adr, res) |
33998 | POST_IO |
33999 | RET(26) |
34000 | } |
34001 | |
34002 | // ANDDa |
34003 | OPCODE(0xC1B8) |
34004 | { |
34005 | u32 adr, res; |
34006 | u32 src, dst; |
34007 | |
34008 | src = DREGu32((Opcode >> 9) & 7); |
34009 | FETCH_SWORD(adr); |
34010 | PRE_IO |
34011 | READ_LONG_F(adr, res) |
34012 | res &= src; |
34013 | flag_C = 0; |
34014 | flag_V = 0; |
34015 | flag_NotZ = res; |
34016 | flag_N = res >> 24; |
34017 | WRITE_LONG_F(adr, res) |
34018 | POST_IO |
34019 | RET(24) |
34020 | } |
34021 | |
34022 | // ANDDa |
34023 | OPCODE(0xC1B9) |
34024 | { |
34025 | u32 adr, res; |
34026 | u32 src, dst; |
34027 | |
34028 | src = DREGu32((Opcode >> 9) & 7); |
34029 | FETCH_LONG(adr); |
34030 | PRE_IO |
34031 | READ_LONG_F(adr, res) |
34032 | res &= src; |
34033 | flag_C = 0; |
34034 | flag_V = 0; |
34035 | flag_NotZ = res; |
34036 | flag_N = res >> 24; |
34037 | WRITE_LONG_F(adr, res) |
34038 | POST_IO |
34039 | RET(28) |
34040 | } |
34041 | |
34042 | // ANDDa |
34043 | OPCODE(0xC19F) |
34044 | { |
34045 | u32 adr, res; |
34046 | u32 src, dst; |
34047 | |
34048 | src = DREGu32((Opcode >> 9) & 7); |
34049 | adr = AREG(7); |
34050 | AREG(7) += 4; |
34051 | PRE_IO |
34052 | READ_LONG_F(adr, res) |
34053 | res &= src; |
34054 | flag_C = 0; |
34055 | flag_V = 0; |
34056 | flag_NotZ = res; |
34057 | flag_N = res >> 24; |
34058 | WRITE_LONG_F(adr, res) |
34059 | POST_IO |
34060 | RET(20) |
34061 | } |
34062 | |
34063 | // ANDDa |
34064 | OPCODE(0xC1A7) |
34065 | { |
34066 | u32 adr, res; |
34067 | u32 src, dst; |
34068 | |
34069 | src = DREGu32((Opcode >> 9) & 7); |
34070 | adr = AREG(7) - 4; |
34071 | AREG(7) = adr; |
34072 | PRE_IO |
34073 | READ_LONG_F(adr, res) |
34074 | res &= src; |
34075 | flag_C = 0; |
34076 | flag_V = 0; |
34077 | flag_NotZ = res; |
34078 | flag_N = res >> 24; |
34079 | WRITE_LONG_F(adr, res) |
34080 | POST_IO |
34081 | RET(22) |
34082 | } |
34083 | |
34084 | // ABCD |
34085 | OPCODE(0xC100) |
34086 | { |
34087 | u32 adr, res; |
34088 | u32 src, dst; |
34089 | |
34090 | src = DREGu8((Opcode >> 0) & 7); |
34091 | dst = DREGu8((Opcode >> 9) & 7); |
34092 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34093 | if (res > 9) res += 6; |
34094 | res += (dst & 0xF0) + (src & 0xF0); |
34095 | if (res > 0x99) |
34096 | { |
34097 | res -= 0xA0; |
34098 | flag_X = flag_C = M68K_SR_C; |
34099 | } |
34100 | else flag_X = flag_C = 0; |
34101 | flag_NotZ |= res & 0xFF; |
34102 | flag_N = res; |
34103 | DREGu8((Opcode >> 9) & 7) = res; |
34104 | RET(6) |
34105 | } |
34106 | |
34107 | // ABCDM |
34108 | OPCODE(0xC108) |
34109 | { |
34110 | u32 adr, res; |
34111 | u32 src, dst; |
34112 | |
34113 | adr = AREG((Opcode >> 0) & 7) - 1; |
34114 | AREG((Opcode >> 0) & 7) = adr; |
34115 | PRE_IO |
34116 | READ_BYTE_F(adr, src) |
34117 | adr = AREG((Opcode >> 9) & 7) - 1; |
34118 | AREG((Opcode >> 9) & 7) = adr; |
34119 | READ_BYTE_F(adr, dst) |
34120 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34121 | if (res > 9) res += 6; |
34122 | res += (dst & 0xF0) + (src & 0xF0); |
34123 | if (res > 0x99) |
34124 | { |
34125 | res -= 0xA0; |
34126 | flag_X = flag_C = M68K_SR_C; |
34127 | } |
34128 | else flag_X = flag_C = 0; |
34129 | flag_NotZ |= res & 0xFF; |
34130 | flag_N = res; |
34131 | WRITE_BYTE_F(adr, res) |
34132 | POST_IO |
34133 | RET(18) |
34134 | } |
34135 | |
34136 | // ABCD7M |
34137 | OPCODE(0xC10F) |
34138 | { |
34139 | u32 adr, res; |
34140 | u32 src, dst; |
34141 | |
34142 | adr = AREG(7) - 2; |
34143 | AREG(7) = adr; |
34144 | PRE_IO |
34145 | READ_BYTE_F(adr, src) |
34146 | adr = AREG((Opcode >> 9) & 7) - 1; |
34147 | AREG((Opcode >> 9) & 7) = adr; |
34148 | READ_BYTE_F(adr, dst) |
34149 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34150 | if (res > 9) res += 6; |
34151 | res += (dst & 0xF0) + (src & 0xF0); |
34152 | if (res > 0x99) |
34153 | { |
34154 | res -= 0xA0; |
34155 | flag_X = flag_C = M68K_SR_C; |
34156 | } |
34157 | else flag_X = flag_C = 0; |
34158 | flag_NotZ |= res & 0xFF; |
34159 | flag_N = res; |
34160 | WRITE_BYTE_F(adr, res) |
34161 | POST_IO |
34162 | RET(18) |
34163 | } |
34164 | |
34165 | // ABCDM7 |
34166 | OPCODE(0xCF08) |
34167 | { |
34168 | u32 adr, res; |
34169 | u32 src, dst; |
34170 | |
34171 | adr = AREG((Opcode >> 0) & 7) - 1; |
34172 | AREG((Opcode >> 0) & 7) = adr; |
34173 | PRE_IO |
34174 | READ_BYTE_F(adr, src) |
34175 | adr = AREG(7) - 2; |
34176 | AREG(7) = adr; |
34177 | READ_BYTE_F(adr, dst) |
34178 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34179 | if (res > 9) res += 6; |
34180 | res += (dst & 0xF0) + (src & 0xF0); |
34181 | if (res > 0x99) |
34182 | { |
34183 | res -= 0xA0; |
34184 | flag_X = flag_C = M68K_SR_C; |
34185 | } |
34186 | else flag_X = flag_C = 0; |
34187 | flag_NotZ |= res & 0xFF; |
34188 | flag_N = res; |
34189 | WRITE_BYTE_F(adr, res) |
34190 | POST_IO |
34191 | RET(18) |
34192 | } |
34193 | |
34194 | // ABCD7M7 |
34195 | OPCODE(0xCF0F) |
34196 | { |
34197 | u32 adr, res; |
34198 | u32 src, dst; |
34199 | |
34200 | adr = AREG(7) - 2; |
34201 | AREG(7) = adr; |
34202 | PRE_IO |
34203 | READ_BYTE_F(adr, src) |
34204 | adr = AREG(7) - 2; |
34205 | AREG(7) = adr; |
34206 | READ_BYTE_F(adr, dst) |
34207 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34208 | if (res > 9) res += 6; |
34209 | res += (dst & 0xF0) + (src & 0xF0); |
34210 | if (res > 0x99) |
34211 | { |
34212 | res -= 0xA0; |
34213 | flag_X = flag_C = M68K_SR_C; |
34214 | } |
34215 | else flag_X = flag_C = 0; |
34216 | flag_NotZ |= res & 0xFF; |
34217 | flag_N = res; |
34218 | WRITE_BYTE_F(adr, res) |
34219 | POST_IO |
34220 | RET(18) |
34221 | } |
34222 | |
34223 | // MULU |
34224 | OPCODE(0xC0C0) |
34225 | { |
34226 | u32 adr, res; |
34227 | u32 src, dst; |
34228 | |
34229 | src = DREGu16((Opcode >> 0) & 7); |
34230 | res = DREGu16((Opcode >> 9) & 7); |
34231 | res *= src; |
34232 | flag_N = res >> 24; |
34233 | flag_NotZ = res; |
34234 | flag_V = flag_C = 0; |
34235 | DREGu32((Opcode >> 9) & 7) = res; |
34236 | #ifdef USE_CYCLONE_TIMING |
34237 | RET(54) |
34238 | #else |
34239 | RET(50) |
34240 | #endif |
34241 | } |
34242 | |
34243 | // MULU |
34244 | OPCODE(0xC0D0) |
34245 | { |
34246 | u32 adr, res; |
34247 | u32 src, dst; |
34248 | |
34249 | adr = AREG((Opcode >> 0) & 7); |
34250 | PRE_IO |
34251 | READ_WORD_F(adr, src) |
34252 | res = DREGu16((Opcode >> 9) & 7); |
34253 | res *= src; |
34254 | flag_N = res >> 24; |
34255 | flag_NotZ = res; |
34256 | flag_V = flag_C = 0; |
34257 | DREGu32((Opcode >> 9) & 7) = res; |
34258 | POST_IO |
34259 | #ifdef USE_CYCLONE_TIMING |
34260 | RET(58) |
34261 | #else |
34262 | RET(54) |
34263 | #endif |
34264 | } |
34265 | |
34266 | // MULU |
34267 | OPCODE(0xC0D8) |
34268 | { |
34269 | u32 adr, res; |
34270 | u32 src, dst; |
34271 | |
34272 | adr = AREG((Opcode >> 0) & 7); |
34273 | AREG((Opcode >> 0) & 7) += 2; |
34274 | PRE_IO |
34275 | READ_WORD_F(adr, src) |
34276 | res = DREGu16((Opcode >> 9) & 7); |
34277 | res *= src; |
34278 | flag_N = res >> 24; |
34279 | flag_NotZ = res; |
34280 | flag_V = flag_C = 0; |
34281 | DREGu32((Opcode >> 9) & 7) = res; |
34282 | POST_IO |
34283 | #ifdef USE_CYCLONE_TIMING |
34284 | RET(58) |
34285 | #else |
34286 | RET(54) |
34287 | #endif |
34288 | } |
34289 | |
34290 | // MULU |
34291 | OPCODE(0xC0E0) |
34292 | { |
34293 | u32 adr, res; |
34294 | u32 src, dst; |
34295 | |
34296 | adr = AREG((Opcode >> 0) & 7) - 2; |
34297 | AREG((Opcode >> 0) & 7) = adr; |
34298 | PRE_IO |
34299 | READ_WORD_F(adr, src) |
34300 | res = DREGu16((Opcode >> 9) & 7); |
34301 | res *= src; |
34302 | flag_N = res >> 24; |
34303 | flag_NotZ = res; |
34304 | flag_V = flag_C = 0; |
34305 | DREGu32((Opcode >> 9) & 7) = res; |
34306 | POST_IO |
34307 | #ifdef USE_CYCLONE_TIMING |
34308 | RET(60) |
34309 | #else |
34310 | RET(56) |
34311 | #endif |
34312 | } |
34313 | |
34314 | // MULU |
34315 | OPCODE(0xC0E8) |
34316 | { |
34317 | u32 adr, res; |
34318 | u32 src, dst; |
34319 | |
34320 | FETCH_SWORD(adr); |
34321 | adr += AREG((Opcode >> 0) & 7); |
34322 | PRE_IO |
34323 | READ_WORD_F(adr, src) |
34324 | res = DREGu16((Opcode >> 9) & 7); |
34325 | res *= src; |
34326 | flag_N = res >> 24; |
34327 | flag_NotZ = res; |
34328 | flag_V = flag_C = 0; |
34329 | DREGu32((Opcode >> 9) & 7) = res; |
34330 | POST_IO |
34331 | #ifdef USE_CYCLONE_TIMING |
34332 | RET(62) |
34333 | #else |
34334 | RET(58) |
34335 | #endif |
34336 | } |
34337 | |
34338 | // MULU |
34339 | OPCODE(0xC0F0) |
34340 | { |
34341 | u32 adr, res; |
34342 | u32 src, dst; |
34343 | |
34344 | adr = AREG((Opcode >> 0) & 7); |
34345 | DECODE_EXT_WORD |
34346 | PRE_IO |
34347 | READ_WORD_F(adr, src) |
34348 | res = DREGu16((Opcode >> 9) & 7); |
34349 | res *= src; |
34350 | flag_N = res >> 24; |
34351 | flag_NotZ = res; |
34352 | flag_V = flag_C = 0; |
34353 | DREGu32((Opcode >> 9) & 7) = res; |
34354 | POST_IO |
34355 | #ifdef USE_CYCLONE_TIMING |
34356 | RET(64) |
34357 | #else |
34358 | RET(60) |
34359 | #endif |
34360 | } |
34361 | |
34362 | // MULU |
34363 | OPCODE(0xC0F8) |
34364 | { |
34365 | u32 adr, res; |
34366 | u32 src, dst; |
34367 | |
34368 | FETCH_SWORD(adr); |
34369 | PRE_IO |
34370 | READ_WORD_F(adr, src) |
34371 | res = DREGu16((Opcode >> 9) & 7); |
34372 | res *= src; |
34373 | flag_N = res >> 24; |
34374 | flag_NotZ = res; |
34375 | flag_V = flag_C = 0; |
34376 | DREGu32((Opcode >> 9) & 7) = res; |
34377 | POST_IO |
34378 | #ifdef USE_CYCLONE_TIMING |
34379 | RET(62) |
34380 | #else |
34381 | RET(58) |
34382 | #endif |
34383 | } |
34384 | |
34385 | // MULU |
34386 | OPCODE(0xC0F9) |
34387 | { |
34388 | u32 adr, res; |
34389 | u32 src, dst; |
34390 | |
34391 | FETCH_LONG(adr); |
34392 | PRE_IO |
34393 | READ_WORD_F(adr, src) |
34394 | res = DREGu16((Opcode >> 9) & 7); |
34395 | res *= src; |
34396 | flag_N = res >> 24; |
34397 | flag_NotZ = res; |
34398 | flag_V = flag_C = 0; |
34399 | DREGu32((Opcode >> 9) & 7) = res; |
34400 | POST_IO |
34401 | #ifdef USE_CYCLONE_TIMING |
34402 | RET(66) |
34403 | #else |
34404 | RET(62) |
34405 | #endif |
34406 | } |
34407 | |
34408 | // MULU |
34409 | OPCODE(0xC0FA) |
34410 | { |
34411 | u32 adr, res; |
34412 | u32 src, dst; |
34413 | |
34414 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34415 | PC++; |
34416 | PRE_IO |
34417 | READ_WORD_F(adr, src) |
34418 | res = DREGu16((Opcode >> 9) & 7); |
34419 | res *= src; |
34420 | flag_N = res >> 24; |
34421 | flag_NotZ = res; |
34422 | flag_V = flag_C = 0; |
34423 | DREGu32((Opcode >> 9) & 7) = res; |
34424 | POST_IO |
34425 | #ifdef USE_CYCLONE_TIMING |
34426 | RET(62) |
34427 | #else |
34428 | RET(58) |
34429 | #endif |
34430 | } |
34431 | |
34432 | // MULU |
34433 | OPCODE(0xC0FB) |
34434 | { |
34435 | u32 adr, res; |
34436 | u32 src, dst; |
34437 | |
34438 | adr = (u32)(PC) - BasePC; |
34439 | DECODE_EXT_WORD |
34440 | PRE_IO |
34441 | READ_WORD_F(adr, src) |
34442 | res = DREGu16((Opcode >> 9) & 7); |
34443 | res *= src; |
34444 | flag_N = res >> 24; |
34445 | flag_NotZ = res; |
34446 | flag_V = flag_C = 0; |
34447 | DREGu32((Opcode >> 9) & 7) = res; |
34448 | POST_IO |
34449 | #ifdef USE_CYCLONE_TIMING |
34450 | RET(64) |
34451 | #else |
34452 | RET(60) |
34453 | #endif |
34454 | } |
34455 | |
34456 | // MULU |
34457 | OPCODE(0xC0FC) |
34458 | { |
34459 | u32 adr, res; |
34460 | u32 src, dst; |
34461 | |
34462 | FETCH_WORD(src); |
34463 | res = DREGu16((Opcode >> 9) & 7); |
34464 | res *= src; |
34465 | flag_N = res >> 24; |
34466 | flag_NotZ = res; |
34467 | flag_V = flag_C = 0; |
34468 | DREGu32((Opcode >> 9) & 7) = res; |
34469 | #ifdef USE_CYCLONE_TIMING |
34470 | RET(58) |
34471 | #else |
34472 | RET(54) |
34473 | #endif |
34474 | } |
34475 | |
34476 | // MULU |
34477 | OPCODE(0xC0DF) |
34478 | { |
34479 | u32 adr, res; |
34480 | u32 src, dst; |
34481 | |
34482 | adr = AREG(7); |
34483 | AREG(7) += 2; |
34484 | PRE_IO |
34485 | READ_WORD_F(adr, src) |
34486 | res = DREGu16((Opcode >> 9) & 7); |
34487 | res *= src; |
34488 | flag_N = res >> 24; |
34489 | flag_NotZ = res; |
34490 | flag_V = flag_C = 0; |
34491 | DREGu32((Opcode >> 9) & 7) = res; |
34492 | POST_IO |
34493 | #ifdef USE_CYCLONE_TIMING |
34494 | RET(58) |
34495 | #else |
34496 | RET(54) |
34497 | #endif |
34498 | } |
34499 | |
34500 | // MULU |
34501 | OPCODE(0xC0E7) |
34502 | { |
34503 | u32 adr, res; |
34504 | u32 src, dst; |
34505 | |
34506 | adr = AREG(7) - 2; |
34507 | AREG(7) = adr; |
34508 | PRE_IO |
34509 | READ_WORD_F(adr, src) |
34510 | res = DREGu16((Opcode >> 9) & 7); |
34511 | res *= src; |
34512 | flag_N = res >> 24; |
34513 | flag_NotZ = res; |
34514 | flag_V = flag_C = 0; |
34515 | DREGu32((Opcode >> 9) & 7) = res; |
34516 | POST_IO |
34517 | #ifdef USE_CYCLONE_TIMING |
34518 | RET(60) |
34519 | #else |
34520 | RET(56) |
34521 | #endif |
34522 | } |
34523 | |
34524 | // MULS |
34525 | OPCODE(0xC1C0) |
34526 | { |
34527 | u32 adr, res; |
34528 | u32 src, dst; |
34529 | |
34530 | src = (s32)DREGs16((Opcode >> 0) & 7); |
34531 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34532 | res = ((s32)res) * ((s32)src); |
34533 | flag_N = res >> 24; |
34534 | flag_NotZ = res; |
34535 | flag_V = flag_C = 0; |
34536 | DREGu32((Opcode >> 9) & 7) = res; |
34537 | #ifdef USE_CYCLONE_TIMING |
34538 | RET(54) |
34539 | #else |
34540 | RET(50) |
34541 | #endif |
34542 | } |
34543 | |
34544 | // MULS |
34545 | OPCODE(0xC1D0) |
34546 | { |
34547 | u32 adr, res; |
34548 | u32 src, dst; |
34549 | |
34550 | adr = AREG((Opcode >> 0) & 7); |
34551 | PRE_IO |
34552 | READSX_WORD_F(adr, src) |
34553 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34554 | res = ((s32)res) * ((s32)src); |
34555 | flag_N = res >> 24; |
34556 | flag_NotZ = res; |
34557 | flag_V = flag_C = 0; |
34558 | DREGu32((Opcode >> 9) & 7) = res; |
34559 | POST_IO |
34560 | #ifdef USE_CYCLONE_TIMING |
34561 | RET(58) |
34562 | #else |
34563 | RET(54) |
34564 | #endif |
34565 | } |
34566 | |
34567 | // MULS |
34568 | OPCODE(0xC1D8) |
34569 | { |
34570 | u32 adr, res; |
34571 | u32 src, dst; |
34572 | |
34573 | adr = AREG((Opcode >> 0) & 7); |
34574 | AREG((Opcode >> 0) & 7) += 2; |
34575 | PRE_IO |
34576 | READSX_WORD_F(adr, src) |
34577 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34578 | res = ((s32)res) * ((s32)src); |
34579 | flag_N = res >> 24; |
34580 | flag_NotZ = res; |
34581 | flag_V = flag_C = 0; |
34582 | DREGu32((Opcode >> 9) & 7) = res; |
34583 | POST_IO |
34584 | #ifdef USE_CYCLONE_TIMING |
34585 | RET(58) |
34586 | #else |
34587 | RET(54) |
34588 | #endif |
34589 | } |
34590 | |
34591 | // MULS |
34592 | OPCODE(0xC1E0) |
34593 | { |
34594 | u32 adr, res; |
34595 | u32 src, dst; |
34596 | |
34597 | adr = AREG((Opcode >> 0) & 7) - 2; |
34598 | AREG((Opcode >> 0) & 7) = adr; |
34599 | PRE_IO |
34600 | READSX_WORD_F(adr, src) |
34601 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34602 | res = ((s32)res) * ((s32)src); |
34603 | flag_N = res >> 24; |
34604 | flag_NotZ = res; |
34605 | flag_V = flag_C = 0; |
34606 | DREGu32((Opcode >> 9) & 7) = res; |
34607 | POST_IO |
34608 | #ifdef USE_CYCLONE_TIMING |
34609 | RET(60) |
34610 | #else |
34611 | RET(56) |
34612 | #endif |
34613 | } |
34614 | |
34615 | // MULS |
34616 | OPCODE(0xC1E8) |
34617 | { |
34618 | u32 adr, res; |
34619 | u32 src, dst; |
34620 | |
34621 | FETCH_SWORD(adr); |
34622 | adr += AREG((Opcode >> 0) & 7); |
34623 | PRE_IO |
34624 | READSX_WORD_F(adr, src) |
34625 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34626 | res = ((s32)res) * ((s32)src); |
34627 | flag_N = res >> 24; |
34628 | flag_NotZ = res; |
34629 | flag_V = flag_C = 0; |
34630 | DREGu32((Opcode >> 9) & 7) = res; |
34631 | POST_IO |
34632 | #ifdef USE_CYCLONE_TIMING |
34633 | RET(62) |
34634 | #else |
34635 | RET(58) |
34636 | #endif |
34637 | } |
34638 | |
34639 | // MULS |
34640 | OPCODE(0xC1F0) |
34641 | { |
34642 | u32 adr, res; |
34643 | u32 src, dst; |
34644 | |
34645 | adr = AREG((Opcode >> 0) & 7); |
34646 | DECODE_EXT_WORD |
34647 | PRE_IO |
34648 | READSX_WORD_F(adr, src) |
34649 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34650 | res = ((s32)res) * ((s32)src); |
34651 | flag_N = res >> 24; |
34652 | flag_NotZ = res; |
34653 | flag_V = flag_C = 0; |
34654 | DREGu32((Opcode >> 9) & 7) = res; |
34655 | POST_IO |
34656 | #ifdef USE_CYCLONE_TIMING |
34657 | RET(64) |
34658 | #else |
34659 | RET(60) |
34660 | #endif |
34661 | } |
34662 | |
34663 | // MULS |
34664 | OPCODE(0xC1F8) |
34665 | { |
34666 | u32 adr, res; |
34667 | u32 src, dst; |
34668 | |
34669 | FETCH_SWORD(adr); |
34670 | PRE_IO |
34671 | READSX_WORD_F(adr, src) |
34672 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34673 | res = ((s32)res) * ((s32)src); |
34674 | flag_N = res >> 24; |
34675 | flag_NotZ = res; |
34676 | flag_V = flag_C = 0; |
34677 | DREGu32((Opcode >> 9) & 7) = res; |
34678 | POST_IO |
34679 | #ifdef USE_CYCLONE_TIMING |
34680 | RET(62) |
34681 | #else |
34682 | RET(58) |
34683 | #endif |
34684 | } |
34685 | |
34686 | // MULS |
34687 | OPCODE(0xC1F9) |
34688 | { |
34689 | u32 adr, res; |
34690 | u32 src, dst; |
34691 | |
34692 | FETCH_LONG(adr); |
34693 | PRE_IO |
34694 | READSX_WORD_F(adr, src) |
34695 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34696 | res = ((s32)res) * ((s32)src); |
34697 | flag_N = res >> 24; |
34698 | flag_NotZ = res; |
34699 | flag_V = flag_C = 0; |
34700 | DREGu32((Opcode >> 9) & 7) = res; |
34701 | POST_IO |
34702 | #ifdef USE_CYCLONE_TIMING |
34703 | RET(66) |
34704 | #else |
34705 | RET(62) |
34706 | #endif |
34707 | } |
34708 | |
34709 | // MULS |
34710 | OPCODE(0xC1FA) |
34711 | { |
34712 | u32 adr, res; |
34713 | u32 src, dst; |
34714 | |
34715 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34716 | PC++; |
34717 | PRE_IO |
34718 | READSX_WORD_F(adr, src) |
34719 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34720 | res = ((s32)res) * ((s32)src); |
34721 | flag_N = res >> 24; |
34722 | flag_NotZ = res; |
34723 | flag_V = flag_C = 0; |
34724 | DREGu32((Opcode >> 9) & 7) = res; |
34725 | POST_IO |
34726 | #ifdef USE_CYCLONE_TIMING |
34727 | RET(62) |
34728 | #else |
34729 | RET(58) |
34730 | #endif |
34731 | } |
34732 | |
34733 | // MULS |
34734 | OPCODE(0xC1FB) |
34735 | { |
34736 | u32 adr, res; |
34737 | u32 src, dst; |
34738 | |
34739 | adr = (u32)(PC) - BasePC; |
34740 | DECODE_EXT_WORD |
34741 | PRE_IO |
34742 | READSX_WORD_F(adr, src) |
34743 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34744 | res = ((s32)res) * ((s32)src); |
34745 | flag_N = res >> 24; |
34746 | flag_NotZ = res; |
34747 | flag_V = flag_C = 0; |
34748 | DREGu32((Opcode >> 9) & 7) = res; |
34749 | POST_IO |
34750 | #ifdef USE_CYCLONE_TIMING |
34751 | RET(64) |
34752 | #else |
34753 | RET(60) |
34754 | #endif |
34755 | } |
34756 | |
34757 | // MULS |
34758 | OPCODE(0xC1FC) |
34759 | { |
34760 | u32 adr, res; |
34761 | u32 src, dst; |
34762 | |
34763 | FETCH_SWORD(src); |
34764 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34765 | res = ((s32)res) * ((s32)src); |
34766 | flag_N = res >> 24; |
34767 | flag_NotZ = res; |
34768 | flag_V = flag_C = 0; |
34769 | DREGu32((Opcode >> 9) & 7) = res; |
34770 | #ifdef USE_CYCLONE_TIMING |
34771 | RET(58) |
34772 | #else |
34773 | RET(54) |
34774 | #endif |
34775 | } |
34776 | |
34777 | // MULS |
34778 | OPCODE(0xC1DF) |
34779 | { |
34780 | u32 adr, res; |
34781 | u32 src, dst; |
34782 | |
34783 | adr = AREG(7); |
34784 | AREG(7) += 2; |
34785 | PRE_IO |
34786 | READSX_WORD_F(adr, src) |
34787 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34788 | res = ((s32)res) * ((s32)src); |
34789 | flag_N = res >> 24; |
34790 | flag_NotZ = res; |
34791 | flag_V = flag_C = 0; |
34792 | DREGu32((Opcode >> 9) & 7) = res; |
34793 | POST_IO |
34794 | #ifdef USE_CYCLONE_TIMING |
34795 | RET(58) |
34796 | #else |
34797 | RET(54) |
34798 | #endif |
34799 | } |
34800 | |
34801 | // MULS |
34802 | OPCODE(0xC1E7) |
34803 | { |
34804 | u32 adr, res; |
34805 | u32 src, dst; |
34806 | |
34807 | adr = AREG(7) - 2; |
34808 | AREG(7) = adr; |
34809 | PRE_IO |
34810 | READSX_WORD_F(adr, src) |
34811 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34812 | res = ((s32)res) * ((s32)src); |
34813 | flag_N = res >> 24; |
34814 | flag_NotZ = res; |
34815 | flag_V = flag_C = 0; |
34816 | DREGu32((Opcode >> 9) & 7) = res; |
34817 | POST_IO |
34818 | #ifdef USE_CYCLONE_TIMING |
34819 | RET(60) |
34820 | #else |
34821 | RET(56) |
34822 | #endif |
34823 | } |
34824 | |
34825 | // EXGDD |
34826 | OPCODE(0xC140) |
34827 | { |
34828 | u32 adr, res; |
34829 | u32 src, dst; |
34830 | |
34831 | res = DREGu32((Opcode >> 0) & 7); |
34832 | src = DREGu32((Opcode >> 9) & 7); |
34833 | DREGu32((Opcode >> 9) & 7) = res; |
34834 | res = src; |
34835 | DREGu32((Opcode >> 0) & 7) = res; |
34836 | RET(6) |
34837 | } |
34838 | |
34839 | // EXGAA |
34840 | OPCODE(0xC148) |
34841 | { |
34842 | u32 adr, res; |
34843 | u32 src, dst; |
34844 | |
34845 | res = AREGu32((Opcode >> 0) & 7); |
34846 | src = AREGu32((Opcode >> 9) & 7); |
34847 | AREG((Opcode >> 9) & 7) = res; |
34848 | res = src; |
34849 | AREG((Opcode >> 0) & 7) = res; |
34850 | RET(6) |
34851 | } |
34852 | |
34853 | // EXGAD |
34854 | OPCODE(0xC188) |
34855 | { |
34856 | u32 adr, res; |
34857 | u32 src, dst; |
34858 | |
34859 | res = AREGu32((Opcode >> 0) & 7); |
34860 | src = DREGu32((Opcode >> 9) & 7); |
34861 | DREGu32((Opcode >> 9) & 7) = res; |
34862 | res = src; |
34863 | AREG((Opcode >> 0) & 7) = res; |
34864 | RET(6) |
34865 | } |
34866 | |
34867 | // ADDaD |
34868 | OPCODE(0xD000) |
34869 | { |
34870 | u32 adr, res; |
34871 | u32 src, dst; |
34872 | |
34873 | src = DREGu8((Opcode >> 0) & 7); |
34874 | dst = DREGu8((Opcode >> 9) & 7); |
34875 | res = dst + src; |
34876 | flag_N = flag_X = flag_C = res; |
34877 | flag_V = (src ^ res) & (dst ^ res); |
34878 | flag_NotZ = res & 0xFF; |
34879 | DREGu8((Opcode >> 9) & 7) = res; |
34880 | RET(4) |
34881 | } |
34882 | |
34883 | // ADDaD |
03e4f2a3 |
34884 | #if 0 |
70357ce5 |
34885 | OPCODE(0xD008) |
34886 | { |
34887 | u32 adr, res; |
34888 | u32 src, dst; |
34889 | |
34890 | // can't read byte from Ax registers ! |
34891 | m68kcontext.execinfo |= M68K_FAULTED; |
34892 | m68kcontext.io_cycle_counter = 0; |
34893 | /* |
34894 | goto famec_Exec_End; |
34895 | dst = DREGu8((Opcode >> 9) & 7); |
34896 | res = dst + src; |
34897 | flag_N = flag_X = flag_C = res; |
34898 | flag_V = (src ^ res) & (dst ^ res); |
34899 | flag_NotZ = res & 0xFF; |
34900 | DREGu8((Opcode >> 9) & 7) = res; |
34901 | */ |
34902 | RET(4) |
34903 | } |
03e4f2a3 |
34904 | #endif |
70357ce5 |
34905 | |
34906 | // ADDaD |
34907 | OPCODE(0xD010) |
34908 | { |
34909 | u32 adr, res; |
34910 | u32 src, dst; |
34911 | |
34912 | adr = AREG((Opcode >> 0) & 7); |
34913 | PRE_IO |
34914 | READ_BYTE_F(adr, src) |
34915 | dst = DREGu8((Opcode >> 9) & 7); |
34916 | res = dst + src; |
34917 | flag_N = flag_X = flag_C = res; |
34918 | flag_V = (src ^ res) & (dst ^ res); |
34919 | flag_NotZ = res & 0xFF; |
34920 | DREGu8((Opcode >> 9) & 7) = res; |
34921 | POST_IO |
34922 | RET(8) |
34923 | } |
34924 | |
34925 | // ADDaD |
34926 | OPCODE(0xD018) |
34927 | { |
34928 | u32 adr, res; |
34929 | u32 src, dst; |
34930 | |
34931 | adr = AREG((Opcode >> 0) & 7); |
34932 | AREG((Opcode >> 0) & 7) += 1; |
34933 | PRE_IO |
34934 | READ_BYTE_F(adr, src) |
34935 | dst = DREGu8((Opcode >> 9) & 7); |
34936 | res = dst + src; |
34937 | flag_N = flag_X = flag_C = res; |
34938 | flag_V = (src ^ res) & (dst ^ res); |
34939 | flag_NotZ = res & 0xFF; |
34940 | DREGu8((Opcode >> 9) & 7) = res; |
34941 | POST_IO |
34942 | RET(8) |
34943 | } |
34944 | |
34945 | // ADDaD |
34946 | OPCODE(0xD020) |
34947 | { |
34948 | u32 adr, res; |
34949 | u32 src, dst; |
34950 | |
34951 | adr = AREG((Opcode >> 0) & 7) - 1; |
34952 | AREG((Opcode >> 0) & 7) = adr; |
34953 | PRE_IO |
34954 | READ_BYTE_F(adr, src) |
34955 | dst = DREGu8((Opcode >> 9) & 7); |
34956 | res = dst + src; |
34957 | flag_N = flag_X = flag_C = res; |
34958 | flag_V = (src ^ res) & (dst ^ res); |
34959 | flag_NotZ = res & 0xFF; |
34960 | DREGu8((Opcode >> 9) & 7) = res; |
34961 | POST_IO |
34962 | RET(10) |
34963 | } |
34964 | |
34965 | // ADDaD |
34966 | OPCODE(0xD028) |
34967 | { |
34968 | u32 adr, res; |
34969 | u32 src, dst; |
34970 | |
34971 | FETCH_SWORD(adr); |
34972 | adr += AREG((Opcode >> 0) & 7); |
34973 | PRE_IO |
34974 | READ_BYTE_F(adr, src) |
34975 | dst = DREGu8((Opcode >> 9) & 7); |
34976 | res = dst + src; |
34977 | flag_N = flag_X = flag_C = res; |
34978 | flag_V = (src ^ res) & (dst ^ res); |
34979 | flag_NotZ = res & 0xFF; |
34980 | DREGu8((Opcode >> 9) & 7) = res; |
34981 | POST_IO |
34982 | RET(12) |
34983 | } |
34984 | |
34985 | // ADDaD |
34986 | OPCODE(0xD030) |
34987 | { |
34988 | u32 adr, res; |
34989 | u32 src, dst; |
34990 | |
34991 | adr = AREG((Opcode >> 0) & 7); |
34992 | DECODE_EXT_WORD |
34993 | PRE_IO |
34994 | READ_BYTE_F(adr, src) |
34995 | dst = DREGu8((Opcode >> 9) & 7); |
34996 | res = dst + src; |
34997 | flag_N = flag_X = flag_C = res; |
34998 | flag_V = (src ^ res) & (dst ^ res); |
34999 | flag_NotZ = res & 0xFF; |
35000 | DREGu8((Opcode >> 9) & 7) = res; |
35001 | POST_IO |
35002 | RET(14) |
35003 | } |
35004 | |
35005 | // ADDaD |
35006 | OPCODE(0xD038) |
35007 | { |
35008 | u32 adr, res; |
35009 | u32 src, dst; |
35010 | |
35011 | FETCH_SWORD(adr); |
35012 | PRE_IO |
35013 | READ_BYTE_F(adr, src) |
35014 | dst = DREGu8((Opcode >> 9) & 7); |
35015 | res = dst + src; |
35016 | flag_N = flag_X = flag_C = res; |
35017 | flag_V = (src ^ res) & (dst ^ res); |
35018 | flag_NotZ = res & 0xFF; |
35019 | DREGu8((Opcode >> 9) & 7) = res; |
35020 | POST_IO |
35021 | RET(12) |
35022 | } |
35023 | |
35024 | // ADDaD |
35025 | OPCODE(0xD039) |
35026 | { |
35027 | u32 adr, res; |
35028 | u32 src, dst; |
35029 | |
35030 | FETCH_LONG(adr); |
35031 | PRE_IO |
35032 | READ_BYTE_F(adr, src) |
35033 | dst = DREGu8((Opcode >> 9) & 7); |
35034 | res = dst + src; |
35035 | flag_N = flag_X = flag_C = res; |
35036 | flag_V = (src ^ res) & (dst ^ res); |
35037 | flag_NotZ = res & 0xFF; |
35038 | DREGu8((Opcode >> 9) & 7) = res; |
35039 | POST_IO |
35040 | RET(16) |
35041 | } |
35042 | |
35043 | // ADDaD |
35044 | OPCODE(0xD03A) |
35045 | { |
35046 | u32 adr, res; |
35047 | u32 src, dst; |
35048 | |
35049 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
35050 | PC++; |
35051 | PRE_IO |
35052 | READ_BYTE_F(adr, src) |
35053 | dst = DREGu8((Opcode >> 9) & 7); |
35054 | res = dst + src; |
35055 | flag_N = flag_X = flag_C = res; |
35056 | flag_V = (src ^ res) & (dst ^ res); |
35057 | flag_NotZ = res & 0xFF; |
35058 | DREGu8((Opcode >> 9) & 7) = res; |
35059 | POST_IO |
35060 | RET(12) |
35061 | } |
35062 | |
35063 | // ADDaD |
35064 | OPCODE(0xD03B) |
35065 | { |
35066 | u32 adr, res; |
35067 | u32 src, dst; |
35068 | |
35069 | adr = (u32)(PC) - BasePC; |
35070 | DECODE_EXT_WORD |
35071 | PRE_IO |
35072 | READ_BYTE_F(adr, src) |
35073 | dst = DREGu8((Opcode >> 9) & 7); |
35074 | res = dst + src; |
35075 | flag_N = flag_X = flag_C = res; |
35076 | flag_V = (src ^ res) & (dst ^ res); |
35077 | flag_NotZ = res & 0xFF; |
35078 | DREGu8((Opcode >> 9) & 7) = res; |
35079 | POST_IO |
35080 | RET(14) |
35081 | } |
35082 | |
35083 | // ADDaD |
35084 | OPCODE(0xD03C) |
35085 | { |
35086 | u32 adr, res; |
35087 | u32 src, dst; |
35088 | |
35089 | FETCH_BYTE(src); |
35090 | dst = DREGu8((Opcode >> 9) & 7); |
35091 | res = dst + src; |
35092 | flag_N = flag_X = flag_C = res; |
35093 | flag_V = (src ^ res) & (dst ^ res); |
35094 | flag_NotZ = res & 0xFF; |
35095 | DREGu8((Opcode >> 9) & 7) = res; |
35096 | RET(8) |
35097 | } |
35098 | |
35099 | // ADDaD |
35100 | OPCODE(0xD01F) |
35101 | { |
35102 | u32 adr, res; |
35103 | u32 src, dst; |
35104 | |
35105 | adr = AREG(7); |
35106 | AREG(7) += 2; |
35107 | PRE_IO |
35108 | READ_BYTE_F(adr, src) |
35109 | dst = DREGu8((Opcode >> 9) & 7); |
35110 | res = dst + src; |
35111 | flag_N = flag_X = flag_C = res; |
35112 | flag_V = (src ^ res) & (dst ^ res); |
35113 | flag_NotZ = res & 0xFF; |
35114 | DREGu8((Opcode >> 9) & 7) = res; |
35115 | POST_IO |
35116 | RET(8) |
35117 | } |
35118 | |
35119 | // ADDaD |
35120 | OPCODE(0xD027) |
35121 | { |
35122 | u32 adr, res; |
35123 | u32 src, dst; |
35124 | |
35125 | adr = AREG(7) - 2; |
35126 | AREG(7) = adr; |
35127 | PRE_IO |
35128 | READ_BYTE_F(adr, src) |
35129 | dst = DREGu8((Opcode >> 9) & 7); |
35130 | res = dst + src; |
35131 | flag_N = flag_X = flag_C = res; |
35132 | flag_V = (src ^ res) & (dst ^ res); |
35133 | flag_NotZ = res & 0xFF; |
35134 | DREGu8((Opcode >> 9) & 7) = res; |
35135 | POST_IO |
35136 | RET(10) |
35137 | } |
35138 | |
35139 | // ADDaD |
35140 | OPCODE(0xD040) |
35141 | { |
35142 | u32 adr, res; |
35143 | u32 src, dst; |
35144 | |
35145 | src = DREGu16((Opcode >> 0) & 7); |
35146 | dst = DREGu16((Opcode >> 9) & 7); |
35147 | res = dst + src; |
35148 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35149 | flag_N = flag_X = flag_C = res >> 8; |
35150 | flag_NotZ = res & 0xFFFF; |
35151 | DREGu16((Opcode >> 9) & 7) = res; |
35152 | RET(4) |
35153 | } |
35154 | |
35155 | // ADDaD |
35156 | OPCODE(0xD048) |
35157 | { |
35158 | u32 adr, res; |
35159 | u32 src, dst; |
35160 | |
35161 | src = AREGu16((Opcode >> 0) & 7); |
35162 | dst = DREGu16((Opcode >> 9) & 7); |
35163 | res = dst + src; |
35164 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35165 | flag_N = flag_X = flag_C = res >> 8; |
35166 | flag_NotZ = res & 0xFFFF; |
35167 | DREGu16((Opcode >> 9) & 7) = res; |
35168 | RET(4) |
35169 | } |
35170 | |
35171 | // ADDaD |
35172 | OPCODE(0xD050) |
35173 | { |
35174 | u32 adr, res; |
35175 | u32 src, dst; |
35176 | |
35177 | adr = AREG((Opcode >> 0) & 7); |
35178 | PRE_IO |
35179 | READ_WORD_F(adr, src) |
35180 | dst = DREGu16((Opcode >> 9) & 7); |
35181 | res = dst + src; |
35182 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35183 | flag_N = flag_X = flag_C = res >> 8; |
35184 | flag_NotZ = res & 0xFFFF; |
35185 | DREGu16((Opcode >> 9) & 7) = res; |
35186 | POST_IO |
35187 | RET(8) |
35188 | } |
35189 | |
35190 | // ADDaD |
35191 | OPCODE(0xD058) |
35192 | { |
35193 | u32 adr, res; |
35194 | u32 src, dst; |
35195 | |
35196 | adr = AREG((Opcode >> 0) & 7); |
35197 | AREG((Opcode >> 0) & 7) += 2; |
35198 | PRE_IO |
35199 | READ_WORD_F(adr, src) |
35200 | dst = DREGu16((Opcode >> 9) & 7); |
35201 | res = dst + src; |
35202 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35203 | flag_N = flag_X = flag_C = res >> 8; |
35204 | flag_NotZ = res & 0xFFFF; |
35205 | DREGu16((Opcode >> 9) & 7) = res; |
35206 | POST_IO |
35207 | RET(8) |
35208 | } |
35209 | |
35210 | // ADDaD |
35211 | OPCODE(0xD060) |
35212 | { |
35213 | u32 adr, res; |
35214 | u32 src, dst; |
35215 | |
35216 | adr = AREG((Opcode >> 0) & 7) - 2; |
35217 | AREG((Opcode >> 0) & 7) = adr; |
35218 | PRE_IO |
35219 | READ_WORD_F(adr, src) |
35220 | dst = DREGu16((Opcode >> 9) & 7); |
35221 | res = dst + src; |
35222 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35223 | flag_N = flag_X = flag_C = res >> 8; |
35224 | flag_NotZ = res & 0xFFFF; |
35225 | DREGu16((Opcode >> 9) & 7) = res; |
35226 | POST_IO |
35227 | RET(10) |
35228 | } |
35229 | |
35230 | // ADDaD |
35231 | OPCODE(0xD068) |
35232 | { |
35233 | u32 adr, res; |
35234 | u32 src, dst; |
35235 | |
35236 | FETCH_SWORD(adr); |
35237 | adr += AREG((Opcode >> 0) & 7); |
35238 | PRE_IO |
35239 | READ_WORD_F(adr, src) |
35240 | dst = DREGu16((Opcode >> 9) & 7); |
35241 | res = dst + src; |
35242 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35243 | flag_N = flag_X = flag_C = res >> 8; |
35244 | flag_NotZ = res & 0xFFFF; |
35245 | DREGu16((Opcode >> 9) & 7) = res; |
35246 | POST_IO |
35247 | RET(12) |
35248 | } |
35249 | |
35250 | // ADDaD |
35251 | OPCODE(0xD070) |
35252 | { |
35253 | u32 adr, res; |
35254 | u32 src, dst; |
35255 | |
35256 | adr = AREG((Opcode >> 0) & 7); |
35257 | DECODE_EXT_WORD |
35258 | PRE_IO |
35259 | READ_WORD_F(adr, src) |
35260 | dst = DREGu16((Opcode >> 9) & 7); |
35261 | res = dst + src; |
35262 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35263 | flag_N = flag_X = flag_C = res >> 8; |
35264 | flag_NotZ = res & 0xFFFF; |
35265 | DREGu16((Opcode >> 9) & 7) = res; |
35266 | POST_IO |
35267 | RET(14) |
35268 | } |
35269 | |
35270 | // ADDaD |
35271 | OPCODE(0xD078) |
35272 | { |
35273 | u32 adr, res; |
35274 | u32 src, dst; |
35275 | |
35276 | FETCH_SWORD(adr); |
35277 | PRE_IO |
35278 | READ_WORD_F(adr, src) |
35279 | dst = DREGu16((Opcode >> 9) & 7); |
35280 | res = dst + src; |
35281 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35282 | flag_N = flag_X = flag_C = res >> 8; |
35283 | flag_NotZ = res & 0xFFFF; |
35284 | DREGu16((Opcode >> 9) & 7) = res; |
35285 | POST_IO |
35286 | RET(12) |
35287 | } |
35288 | |
35289 | // ADDaD |
35290 | OPCODE(0xD079) |
35291 | { |
35292 | u32 adr, res; |
35293 | u32 src, dst; |
35294 | |
35295 | FETCH_LONG(adr); |
35296 | PRE_IO |
35297 | READ_WORD_F(adr, src) |
35298 | dst = DREGu16((Opcode >> 9) & 7); |
35299 | res = dst + src; |
35300 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35301 | flag_N = flag_X = flag_C = res >> 8; |
35302 | flag_NotZ = res & 0xFFFF; |
35303 | DREGu16((Opcode >> 9) & 7) = res; |
35304 | POST_IO |
35305 | RET(16) |
35306 | } |
35307 | |
35308 | // ADDaD |
35309 | OPCODE(0xD07A) |
35310 | { |
35311 | u32 adr, res; |
35312 | u32 src, dst; |
35313 | |
35314 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
35315 | PC++; |
35316 | PRE_IO |
35317 | READ_WORD_F(adr, src) |
35318 | dst = DREGu16((Opcode >> 9) & 7); |
35319 | res = dst + src; |
35320 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35321 | flag_N = flag_X = flag_C = res >> 8; |
35322 | flag_NotZ = res & 0xFFFF; |
35323 | DREGu16((Opcode >> 9) & 7) = res; |
35324 | POST_IO |
35325 | RET(12) |
35326 | } |
35327 | |
35328 | // ADDaD |
35329 | OPCODE(0xD07B) |
35330 | { |
35331 | u32 adr, res; |
35332 | u32 src, dst; |
35333 | |
35334 | adr = (u32)(PC) - BasePC; |
35335 | DECODE_EXT_WORD |
35336 | PRE_IO |
35337 | READ_WORD_F(adr, src) |
35338 | dst = DREGu16((Opcode >> 9) & 7); |
35339 | res = dst + src; |
35340 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35341 | flag_N = flag_X = flag_C = res >> 8; |
35342 | flag_NotZ = res & 0xFFFF; |
35343 | DREGu16((Opcode >> 9) & 7) = res; |
35344 | POST_IO |
35345 | RET(14) |
35346 | } |
35347 | |
35348 | // ADDaD |
35349 | OPCODE(0xD07C) |
35350 | { |
35351 | u32 adr, res; |
35352 | u32 src, dst; |
35353 | |
35354 | FETCH_WORD(src); |
35355 | dst = DREGu16((Opcode >> 9) & 7); |
35356 | res = dst + src; |
35357 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35358 | flag_N = flag_X = flag_C = res >> 8; |
35359 | flag_NotZ = res & 0xFFFF; |
35360 | DREGu16((Opcode >> 9) & 7) = res; |
35361 | RET(8) |
35362 | } |
35363 | |
35364 | // ADDaD |
35365 | OPCODE(0xD05F) |
35366 | { |
35367 | u32 adr, res; |
35368 | u32 src, dst; |
35369 | |
35370 | adr = AREG(7); |
35371 | AREG(7) += 2; |
35372 | PRE_IO |
35373 | READ_WORD_F(adr, src) |
35374 | dst = DREGu16((Opcode >> 9) & 7); |
35375 | res = dst + src; |
35376 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35377 | flag_N = flag_X = flag_C = res >> 8; |
35378 | flag_NotZ = res & 0xFFFF; |
35379 | DREGu16((Opcode >> 9) & 7) = res; |
35380 | POST_IO |
35381 | RET(8) |
35382 | } |
35383 | |
35384 | // ADDaD |
35385 | OPCODE(0xD067) |
35386 | { |
35387 | u32 adr, res; |
35388 | u32 src, dst; |
35389 | |
35390 | adr = AREG(7) - 2; |
35391 | AREG(7) = adr; |
35392 | PRE_IO |
35393 | READ_WORD_F(adr, src) |
35394 | dst = DREGu16((Opcode >> 9) & 7); |
35395 | res = dst + src; |
35396 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35397 | flag_N = flag_X = flag_C = res >> 8; |
35398 | flag_NotZ = res & 0xFFFF; |
35399 | DREGu16((Opcode >> 9) & 7) = res; |
35400 | POST_IO |
35401 | RET(10) |
35402 | } |
35403 | |
35404 | // ADDaD |
35405 | OPCODE(0xD080) |
35406 | { |
35407 | u32 adr, res; |
35408 | u32 src, dst; |
35409 | |
35410 | src = DREGu32((Opcode >> 0) & 7); |
35411 | dst = DREGu32((Opcode >> 9) & 7); |
35412 | res = dst + src; |
35413 | flag_NotZ = res; |
35414 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35415 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35416 | flag_N = res >> 24; |
35417 | DREGu32((Opcode >> 9) & 7) = res; |
35418 | RET(8) |
35419 | } |
35420 | |
35421 | // ADDaD |
35422 | OPCODE(0xD088) |
35423 | { |
35424 | u32 adr, res; |
35425 | u32 src, dst; |
35426 | |
35427 | src = AREGu32((Opcode >> 0) & 7); |
35428 | dst = DREGu32((Opcode >> 9) & 7); |
35429 | res = dst + src; |
35430 | flag_NotZ = res; |
35431 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35432 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35433 | flag_N = res >> 24; |
35434 | DREGu32((Opcode >> 9) & 7) = res; |
35435 | RET(8) |
35436 | } |
35437 | |
35438 | // ADDaD |
35439 | OPCODE(0xD090) |
35440 | { |
35441 | u32 adr, res; |
35442 | u32 src, dst; |
35443 | |
35444 | adr = AREG((Opcode >> 0) & 7); |
35445 | PRE_IO |
35446 | READ_LONG_F(adr, src) |
35447 | dst = DREGu32((Opcode >> 9) & 7); |
35448 | res = dst + src; |
35449 | flag_NotZ = res; |
35450 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35451 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35452 | flag_N = res >> 24; |
35453 | DREGu32((Opcode >> 9) & 7) = res; |
35454 | POST_IO |
35455 | RET(14) |
35456 | } |
35457 | |
35458 | // ADDaD |
35459 | OPCODE(0xD098) |
35460 | { |
35461 | u32 adr, res; |
35462 | u32 src, dst; |
35463 | |
35464 | adr = AREG((Opcode >> 0) & 7); |
35465 | AREG((Opcode >> 0) & 7) += 4; |
35466 | PRE_IO |
35467 | READ_LONG_F(adr, src) |
35468 | dst = DREGu32((Opcode >> 9) & 7); |
35469 | res = dst + src; |
35470 | flag_NotZ = res; |
35471 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35472 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35473 | flag_N = res >> 24; |
35474 | DREGu32((Opcode >> 9) & 7) = res; |
35475 | POST_IO |
35476 | RET(14) |
35477 | } |
35478 | |
35479 | // ADDaD |
35480 | OPCODE(0xD0A0) |
35481 | { |
35482 | u32 adr, res; |
35483 | u32 src, dst; |
35484 | |
35485 | adr = AREG((Opcode >> 0) & 7) - 4; |
35486 | AREG((Opcode >> 0) & 7) = adr; |
35487 | PRE_IO |
35488 | READ_LONG_F(adr, src) |
35489 | dst = DREGu32((Opcode >> 9) & 7); |
35490 | res = dst + src; |
35491 | flag_NotZ = res; |
35492 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35493 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35494 | flag_N = res >> 24; |
35495 | DREGu32((Opcode >> 9) & 7) = res; |
35496 | POST_IO |
35497 | RET(16) |
35498 | } |
35499 | |
35500 | // ADDaD |
35501 | OPCODE(0xD0A8) |
35502 | { |
35503 | u32 adr, res; |
35504 | u32 src, dst; |
35505 | |
35506 | FETCH_SWORD(adr); |
35507 | adr += AREG((Opcode >> 0) & 7); |
35508 | PRE_IO |
35509 | READ_LONG_F(adr, src) |
35510 | dst = DREGu32((Opcode >> 9) & 7); |
35511 | res = dst + src; |
35512 | flag_NotZ = res; |
35513 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35514 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35515 | flag_N = res >> 24; |
35516 | DREGu32((Opcode >> 9) & 7) = res; |
35517 | POST_IO |
35518 | RET(18) |
35519 | } |
35520 | |
35521 | // ADDaD |
35522 | OPCODE(0xD0B0) |
35523 | { |
35524 | u32 adr, res; |
35525 | u32 src, dst; |
35526 | |
35527 | adr = AREG((Opcode >> 0) & 7); |
35528 | DECODE_EXT_WORD |
35529 | PRE_IO |
35530 | READ_LONG_F(adr, src) |
35531 | dst = DREGu32((Opcode >> 9) & 7); |
35532 | res = dst + src; |
35533 | flag_NotZ = res; |
35534 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35535 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35536 | flag_N = res >> 24; |
35537 | DREGu32((Opcode >> 9) & 7) = res; |
35538 | POST_IO |
35539 | RET(20) |
35540 | } |
35541 | |
35542 | // ADDaD |
35543 | OPCODE(0xD0B8) |
35544 | { |
35545 | u32 adr, res; |
35546 | u32 src, dst; |
35547 | |
35548 | FETCH_SWORD(adr); |
35549 | PRE_IO |
35550 | READ_LONG_F(adr, src) |
35551 | dst = DREGu32((Opcode >> 9) & 7); |
35552 | res = dst + src; |
35553 | flag_NotZ = res; |
35554 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35555 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35556 | flag_N = res >> 24; |
35557 | DREGu32((Opcode >> 9) & 7) = res; |
35558 | POST_IO |
35559 | RET(18) |
35560 | } |
35561 | |
35562 | // ADDaD |
35563 | OPCODE(0xD0B9) |
35564 | { |
35565 | u32 adr, res; |
35566 | u32 src, dst; |
35567 | |
35568 | FETCH_LONG(adr); |
35569 | PRE_IO |
35570 | READ_LONG_F(adr, src) |
35571 | dst = DREGu32((Opcode >> 9) & 7); |
35572 | res = dst + src; |
35573 | flag_NotZ = res; |
35574 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35575 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35576 | flag_N = res >> 24; |
35577 | DREGu32((Opcode >> 9) & 7) = res; |
35578 | POST_IO |
35579 | RET(22) |
35580 | } |
35581 | |
35582 | // ADDaD |
35583 | OPCODE(0xD0BA) |
35584 | { |
35585 | u32 adr, res; |
35586 | u32 src, dst; |
35587 | |
35588 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
35589 | PC++; |
35590 | PRE_IO |
35591 | READ_LONG_F(adr, src) |
35592 | dst = DREGu32((Opcode >> 9) & 7); |
35593 | res = dst + src; |
35594 | flag_NotZ = res; |
35595 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35596 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35597 | flag_N = res >> 24; |
35598 | DREGu32((Opcode >> 9) & 7) = res; |
35599 | POST_IO |
35600 | RET(18) |
35601 | } |
35602 | |
35603 | // ADDaD |
35604 | OPCODE(0xD0BB) |
35605 | { |
35606 | u32 adr, res; |
35607 | u32 src, dst; |
35608 | |
35609 | adr = (u32)(PC) - BasePC; |
35610 | DECODE_EXT_WORD |
35611 | PRE_IO |
35612 | READ_LONG_F(adr, src) |
35613 | dst = DREGu32((Opcode >> 9) & 7); |
35614 | res = dst + src; |
35615 | flag_NotZ = res; |
35616 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35617 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35618 | flag_N = res >> 24; |
35619 | DREGu32((Opcode >> 9) & 7) = res; |
35620 | POST_IO |
35621 | RET(20) |
35622 | } |
35623 | |
35624 | // ADDaD |
35625 | OPCODE(0xD0BC) |
35626 | { |
35627 | u32 adr, res; |
35628 | u32 src, dst; |
35629 | |
35630 | FETCH_LONG(src); |
35631 | dst = DREGu32((Opcode >> 9) & 7); |
35632 | res = dst + src; |
35633 | flag_NotZ = res; |
35634 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35635 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35636 | flag_N = res >> 24; |
35637 | DREGu32((Opcode >> 9) & 7) = res; |
35638 | RET(16) |
35639 | } |
35640 | |
35641 | // ADDaD |
35642 | OPCODE(0xD09F) |
35643 | { |
35644 | u32 adr, res; |
35645 | u32 src, dst; |
35646 | |
35647 | adr = AREG(7); |
35648 | AREG(7) += 4; |
35649 | PRE_IO |
35650 | READ_LONG_F(adr, src) |
35651 | dst = DREGu32((Opcode >> 9) & 7); |
35652 | res = dst + src; |
35653 | flag_NotZ = res; |
35654 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35655 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35656 | flag_N = res >> 24; |
35657 | DREGu32((Opcode >> 9) & 7) = res; |
35658 | POST_IO |
35659 | RET(14) |
35660 | } |
35661 | |
35662 | // ADDaD |
35663 | OPCODE(0xD0A7) |
35664 | { |
35665 | u32 adr, res; |
35666 | u32 src, dst; |
35667 | |
35668 | adr = AREG(7) - 4; |
35669 | AREG(7) = adr; |
35670 | PRE_IO |
35671 | READ_LONG_F(adr, src) |
35672 | dst = DREGu32((Opcode >> 9) & 7); |
35673 | res = dst + src; |
35674 | flag_NotZ = res; |
35675 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35676 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35677 | flag_N = res >> 24; |
35678 | DREGu32((Opcode >> 9) & 7) = res; |
35679 | POST_IO |
35680 | RET(16) |
35681 | } |
35682 | |
35683 | // ADDDa |
35684 | OPCODE(0xD110) |
35685 | { |
35686 | u32 adr, res; |
35687 | u32 src, dst; |
35688 | |
35689 | src = DREGu8((Opcode >> 9) & 7); |
35690 | adr = AREG((Opcode >> 0) & 7); |
35691 | PRE_IO |
35692 | READ_BYTE_F(adr, dst) |
35693 | res = dst + src; |
35694 | flag_N = flag_X = flag_C = res; |
35695 | flag_V = (src ^ res) & (dst ^ res); |
35696 | flag_NotZ = res & 0xFF; |
35697 | WRITE_BYTE_F(adr, res) |
35698 | POST_IO |
35699 | RET(12) |
35700 | } |
35701 | |
35702 | // ADDDa |
35703 | OPCODE(0xD118) |
35704 | { |
35705 | u32 adr, res; |
35706 | u32 src, dst; |
35707 | |
35708 | src = DREGu8((Opcode >> 9) & 7); |
35709 | adr = AREG((Opcode >> 0) & 7); |
35710 | AREG((Opcode >> 0) & 7) += 1; |
35711 | PRE_IO |
35712 | READ_BYTE_F(adr, dst) |
35713 | res = dst + src; |
35714 | flag_N = flag_X = flag_C = res; |
35715 | flag_V = (src ^ res) & (dst ^ res); |
35716 | flag_NotZ = res & 0xFF; |
35717 | WRITE_BYTE_F(adr, res) |
35718 | POST_IO |
35719 | RET(12) |
35720 | } |
35721 | |
35722 | // ADDDa |
35723 | OPCODE(0xD120) |
35724 | { |
35725 | u32 adr, res; |
35726 | u32 src, dst; |
35727 | |
35728 | src = DREGu8((Opcode >> 9) & 7); |
35729 | adr = AREG((Opcode >> 0) & 7) - 1; |
35730 | AREG((Opcode >> 0) & 7) = adr; |
35731 | PRE_IO |
35732 | READ_BYTE_F(adr, dst) |
35733 | res = dst + src; |
35734 | flag_N = flag_X = flag_C = res; |
35735 | flag_V = (src ^ res) & (dst ^ res); |
35736 | flag_NotZ = res & 0xFF; |
35737 | WRITE_BYTE_F(adr, res) |
35738 | POST_IO |
35739 | RET(14) |
35740 | } |
35741 | |
35742 | // ADDDa |
35743 | OPCODE(0xD128) |
35744 | { |
35745 | u32 adr, res; |
35746 | u32 src, dst; |
35747 | |
35748 | src = DREGu8((Opcode >> 9) & 7); |
35749 | FETCH_SWORD(adr); |
35750 | adr += AREG((Opcode >> 0) & 7); |
35751 | PRE_IO |
35752 | READ_BYTE_F(adr, dst) |
35753 | res = dst + src; |
35754 | flag_N = flag_X = flag_C = res; |
35755 | flag_V = (src ^ res) & (dst ^ res); |
35756 | flag_NotZ = res & 0xFF; |
35757 | WRITE_BYTE_F(adr, res) |
35758 | POST_IO |
35759 | RET(16) |
35760 | } |
35761 | |
35762 | // ADDDa |
35763 | OPCODE(0xD130) |
35764 | { |
35765 | u32 adr, res; |
35766 | u32 src, dst; |
35767 | |
35768 | src = DREGu8((Opcode >> 9) & 7); |
35769 | adr = AREG((Opcode >> 0) & 7); |
35770 | DECODE_EXT_WORD |
35771 | PRE_IO |
35772 | READ_BYTE_F(adr, dst) |
35773 | res = dst + src; |
35774 | flag_N = flag_X = flag_C = res; |
35775 | flag_V = (src ^ res) & (dst ^ res); |
35776 | flag_NotZ = res & 0xFF; |
35777 | WRITE_BYTE_F(adr, res) |
35778 | POST_IO |
35779 | RET(18) |
35780 | } |
35781 | |
35782 | // ADDDa |
35783 | OPCODE(0xD138) |
35784 | { |
35785 | u32 adr, res; |
35786 | u32 src, dst; |
35787 | |
35788 | src = DREGu8((Opcode >> 9) & 7); |
35789 | FETCH_SWORD(adr); |
35790 | PRE_IO |
35791 | READ_BYTE_F(adr, dst) |
35792 | res = dst + src; |
35793 | flag_N = flag_X = flag_C = res; |
35794 | flag_V = (src ^ res) & (dst ^ res); |
35795 | flag_NotZ = res & 0xFF; |
35796 | WRITE_BYTE_F(adr, res) |
35797 | POST_IO |
35798 | RET(16) |
35799 | } |
35800 | |
35801 | // ADDDa |
35802 | OPCODE(0xD139) |
35803 | { |
35804 | u32 adr, res; |
35805 | u32 src, dst; |
35806 | |
35807 | src = DREGu8((Opcode >> 9) & 7); |
35808 | FETCH_LONG(adr); |
35809 | PRE_IO |
35810 | READ_BYTE_F(adr, dst) |
35811 | res = dst + src; |
35812 | flag_N = flag_X = flag_C = res; |
35813 | flag_V = (src ^ res) & (dst ^ res); |
35814 | flag_NotZ = res & 0xFF; |
35815 | WRITE_BYTE_F(adr, res) |
35816 | POST_IO |
35817 | RET(20) |
35818 | } |
35819 | |
35820 | // ADDDa |
35821 | OPCODE(0xD11F) |
35822 | { |
35823 | u32 adr, res; |
35824 | u32 src, dst; |
35825 | |
35826 | src = DREGu8((Opcode >> 9) & 7); |
35827 | adr = AREG(7); |
35828 | AREG(7) += 2; |
35829 | PRE_IO |
35830 | READ_BYTE_F(adr, dst) |
35831 | res = dst + src; |
35832 | flag_N = flag_X = flag_C = res; |
35833 | flag_V = (src ^ res) & (dst ^ res); |
35834 | flag_NotZ = res & 0xFF; |
35835 | WRITE_BYTE_F(adr, res) |
35836 | POST_IO |
35837 | RET(12) |
35838 | } |
35839 | |
35840 | // ADDDa |
35841 | OPCODE(0xD127) |
35842 | { |
35843 | u32 adr, res; |
35844 | u32 src, dst; |
35845 | |
35846 | src = DREGu8((Opcode >> 9) & 7); |
35847 | adr = AREG(7) - 2; |
35848 | AREG(7) = adr; |
35849 | PRE_IO |
35850 | READ_BYTE_F(adr, dst) |
35851 | res = dst + src; |
35852 | flag_N = flag_X = flag_C = res; |
35853 | flag_V = (src ^ res) & (dst ^ res); |
35854 | flag_NotZ = res & 0xFF; |
35855 | WRITE_BYTE_F(adr, res) |
35856 | POST_IO |
35857 | RET(14) |
35858 | } |
35859 | |
35860 | // ADDDa |
35861 | OPCODE(0xD150) |
35862 | { |
35863 | u32 adr, res; |
35864 | u32 src, dst; |
35865 | |
35866 | src = DREGu16((Opcode >> 9) & 7); |
35867 | adr = AREG((Opcode >> 0) & 7); |
35868 | PRE_IO |
35869 | READ_WORD_F(adr, dst) |
35870 | res = dst + src; |
35871 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35872 | flag_N = flag_X = flag_C = res >> 8; |
35873 | flag_NotZ = res & 0xFFFF; |
35874 | WRITE_WORD_F(adr, res) |
35875 | POST_IO |
35876 | RET(12) |
35877 | } |
35878 | |
35879 | // ADDDa |
35880 | OPCODE(0xD158) |
35881 | { |
35882 | u32 adr, res; |
35883 | u32 src, dst; |
35884 | |
35885 | src = DREGu16((Opcode >> 9) & 7); |
35886 | adr = AREG((Opcode >> 0) & 7); |
35887 | AREG((Opcode >> 0) & 7) += 2; |
35888 | PRE_IO |
35889 | READ_WORD_F(adr, dst) |
35890 | res = dst + src; |
35891 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35892 | flag_N = flag_X = flag_C = res >> 8; |
35893 | flag_NotZ = res & 0xFFFF; |
35894 | WRITE_WORD_F(adr, res) |
35895 | POST_IO |
35896 | RET(12) |
35897 | } |
35898 | |
35899 | // ADDDa |
35900 | OPCODE(0xD160) |
35901 | { |
35902 | u32 adr, res; |
35903 | u32 src, dst; |
35904 | |
35905 | src = DREGu16((Opcode >> 9) & 7); |
35906 | adr = AREG((Opcode >> 0) & 7) - 2; |
35907 | AREG((Opcode >> 0) & 7) = adr; |
35908 | PRE_IO |
35909 | READ_WORD_F(adr, dst) |
35910 | res = dst + src; |
35911 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35912 | flag_N = flag_X = flag_C = res >> 8; |
35913 | flag_NotZ = res & 0xFFFF; |
35914 | WRITE_WORD_F(adr, res) |
35915 | POST_IO |
35916 | RET(14) |
35917 | } |
35918 | |
35919 | // ADDDa |
35920 | OPCODE(0xD168) |
35921 | { |
35922 | u32 adr, res; |
35923 | u32 src, dst; |
35924 | |
35925 | src = DREGu16((Opcode >> 9) & 7); |
35926 | FETCH_SWORD(adr); |
35927 | adr += AREG((Opcode >> 0) & 7); |
35928 | PRE_IO |
35929 | READ_WORD_F(adr, dst) |
35930 | res = dst + src; |
35931 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35932 | flag_N = flag_X = flag_C = res >> 8; |
35933 | flag_NotZ = res & 0xFFFF; |
35934 | WRITE_WORD_F(adr, res) |
35935 | POST_IO |
35936 | RET(16) |
35937 | } |
35938 | |
35939 | // ADDDa |
35940 | OPCODE(0xD170) |
35941 | { |
35942 | u32 adr, res; |
35943 | u32 src, dst; |
35944 | |
35945 | src = DREGu16((Opcode >> 9) & 7); |
35946 | adr = AREG((Opcode >> 0) & 7); |
35947 | DECODE_EXT_WORD |
35948 | PRE_IO |
35949 | READ_WORD_F(adr, dst) |
35950 | res = dst + src; |
35951 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35952 | flag_N = flag_X = flag_C = res >> 8; |
35953 | flag_NotZ = res & 0xFFFF; |
35954 | WRITE_WORD_F(adr, res) |
35955 | POST_IO |
35956 | RET(18) |
35957 | } |
35958 | |
35959 | // ADDDa |
35960 | OPCODE(0xD178) |
35961 | { |
35962 | u32 adr, res; |
35963 | u32 src, dst; |
35964 | |
35965 | src = DREGu16((Opcode >> 9) & 7); |
35966 | FETCH_SWORD(adr); |
35967 | PRE_IO |
35968 | READ_WORD_F(adr, dst) |
35969 | res = dst + src; |
35970 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35971 | flag_N = flag_X = flag_C = res >> 8; |
35972 | flag_NotZ = res & 0xFFFF; |
35973 | WRITE_WORD_F(adr, res) |
35974 | POST_IO |
35975 | RET(16) |
35976 | } |
35977 | |
35978 | // ADDDa |
35979 | OPCODE(0xD179) |
35980 | { |
35981 | u32 adr, res; |
35982 | u32 src, dst; |
35983 | |
35984 | src = DREGu16((Opcode >> 9) & 7); |
35985 | FETCH_LONG(adr); |
35986 | PRE_IO |
35987 | READ_WORD_F(adr, dst) |
35988 | res = dst + src; |
35989 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35990 | flag_N = flag_X = flag_C = res >> 8; |
35991 | flag_NotZ = res & 0xFFFF; |
35992 | WRITE_WORD_F(adr, res) |
35993 | POST_IO |
35994 | RET(20) |
35995 | } |
35996 | |
35997 | // ADDDa |
35998 | OPCODE(0xD15F) |
35999 | { |
36000 | u32 adr, res; |
36001 | u32 src, dst; |
36002 | |
36003 | src = DREGu16((Opcode >> 9) & 7); |
36004 | adr = AREG(7); |
36005 | AREG(7) += 2; |
36006 | PRE_IO |
36007 | READ_WORD_F(adr, dst) |
36008 | res = dst + src; |
36009 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36010 | flag_N = flag_X = flag_C = res >> 8; |
36011 | flag_NotZ = res & 0xFFFF; |
36012 | WRITE_WORD_F(adr, res) |
36013 | POST_IO |
36014 | RET(12) |
36015 | } |
36016 | |
36017 | // ADDDa |
36018 | OPCODE(0xD167) |
36019 | { |
36020 | u32 adr, res; |
36021 | u32 src, dst; |
36022 | |
36023 | src = DREGu16((Opcode >> 9) & 7); |
36024 | adr = AREG(7) - 2; |
36025 | AREG(7) = adr; |
36026 | PRE_IO |
36027 | READ_WORD_F(adr, dst) |
36028 | res = dst + src; |
36029 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36030 | flag_N = flag_X = flag_C = res >> 8; |
36031 | flag_NotZ = res & 0xFFFF; |
36032 | WRITE_WORD_F(adr, res) |
36033 | POST_IO |
36034 | RET(14) |
36035 | } |
36036 | |
36037 | // ADDDa |
36038 | OPCODE(0xD190) |
36039 | { |
36040 | u32 adr, res; |
36041 | u32 src, dst; |
36042 | |
36043 | src = DREGu32((Opcode >> 9) & 7); |
36044 | adr = AREG((Opcode >> 0) & 7); |
36045 | PRE_IO |
36046 | READ_LONG_F(adr, dst) |
36047 | res = dst + src; |
36048 | flag_NotZ = res; |
36049 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36050 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36051 | flag_N = res >> 24; |
36052 | WRITE_LONG_F(adr, res) |
36053 | POST_IO |
36054 | RET(20) |
36055 | } |
36056 | |
36057 | // ADDDa |
36058 | OPCODE(0xD198) |
36059 | { |
36060 | u32 adr, res; |
36061 | u32 src, dst; |
36062 | |
36063 | src = DREGu32((Opcode >> 9) & 7); |
36064 | adr = AREG((Opcode >> 0) & 7); |
36065 | AREG((Opcode >> 0) & 7) += 4; |
36066 | PRE_IO |
36067 | READ_LONG_F(adr, dst) |
36068 | res = dst + src; |
36069 | flag_NotZ = res; |
36070 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36071 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36072 | flag_N = res >> 24; |
36073 | WRITE_LONG_F(adr, res) |
36074 | POST_IO |
36075 | RET(20) |
36076 | } |
36077 | |
36078 | // ADDDa |
36079 | OPCODE(0xD1A0) |
36080 | { |
36081 | u32 adr, res; |
36082 | u32 src, dst; |
36083 | |
36084 | src = DREGu32((Opcode >> 9) & 7); |
36085 | adr = AREG((Opcode >> 0) & 7) - 4; |
36086 | AREG((Opcode >> 0) & 7) = adr; |
36087 | PRE_IO |
36088 | READ_LONG_F(adr, dst) |
36089 | res = dst + src; |
36090 | flag_NotZ = res; |
36091 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36092 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36093 | flag_N = res >> 24; |
36094 | WRITE_LONG_F(adr, res) |
36095 | POST_IO |
36096 | RET(22) |
36097 | } |
36098 | |
36099 | // ADDDa |
36100 | OPCODE(0xD1A8) |
36101 | { |
36102 | u32 adr, res; |
36103 | u32 src, dst; |
36104 | |
36105 | src = DREGu32((Opcode >> 9) & 7); |
36106 | FETCH_SWORD(adr); |
36107 | adr += AREG((Opcode >> 0) & 7); |
36108 | PRE_IO |
36109 | READ_LONG_F(adr, dst) |
36110 | res = dst + src; |
36111 | flag_NotZ = res; |
36112 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36113 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36114 | flag_N = res >> 24; |
36115 | WRITE_LONG_F(adr, res) |
36116 | POST_IO |
36117 | RET(24) |
36118 | } |
36119 | |
36120 | // ADDDa |
36121 | OPCODE(0xD1B0) |
36122 | { |
36123 | u32 adr, res; |
36124 | u32 src, dst; |
36125 | |
36126 | src = DREGu32((Opcode >> 9) & 7); |
36127 | adr = AREG((Opcode >> 0) & 7); |
36128 | DECODE_EXT_WORD |
36129 | PRE_IO |
36130 | READ_LONG_F(adr, dst) |
36131 | res = dst + src; |
36132 | flag_NotZ = res; |
36133 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36134 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36135 | flag_N = res >> 24; |
36136 | WRITE_LONG_F(adr, res) |
36137 | POST_IO |
36138 | RET(26) |
36139 | } |
36140 | |
36141 | // ADDDa |
36142 | OPCODE(0xD1B8) |
36143 | { |
36144 | u32 adr, res; |
36145 | u32 src, dst; |
36146 | |
36147 | src = DREGu32((Opcode >> 9) & 7); |
36148 | FETCH_SWORD(adr); |
36149 | PRE_IO |
36150 | READ_LONG_F(adr, dst) |
36151 | res = dst + src; |
36152 | flag_NotZ = res; |
36153 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36154 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36155 | flag_N = res >> 24; |
36156 | WRITE_LONG_F(adr, res) |
36157 | POST_IO |
36158 | RET(24) |
36159 | } |
36160 | |
36161 | // ADDDa |
36162 | OPCODE(0xD1B9) |
36163 | { |
36164 | u32 adr, res; |
36165 | u32 src, dst; |
36166 | |
36167 | src = DREGu32((Opcode >> 9) & 7); |
36168 | FETCH_LONG(adr); |
36169 | PRE_IO |
36170 | READ_LONG_F(adr, dst) |
36171 | res = dst + src; |
36172 | flag_NotZ = res; |
36173 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36174 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36175 | flag_N = res >> 24; |
36176 | WRITE_LONG_F(adr, res) |
36177 | POST_IO |
36178 | RET(28) |
36179 | } |
36180 | |
36181 | // ADDDa |
36182 | OPCODE(0xD19F) |
36183 | { |
36184 | u32 adr, res; |
36185 | u32 src, dst; |
36186 | |
36187 | src = DREGu32((Opcode >> 9) & 7); |
36188 | adr = AREG(7); |
36189 | AREG(7) += 4; |
36190 | PRE_IO |
36191 | READ_LONG_F(adr, dst) |
36192 | res = dst + src; |
36193 | flag_NotZ = res; |
36194 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36195 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36196 | flag_N = res >> 24; |
36197 | WRITE_LONG_F(adr, res) |
36198 | POST_IO |
36199 | RET(20) |
36200 | } |
36201 | |
36202 | // ADDDa |
36203 | OPCODE(0xD1A7) |
36204 | { |
36205 | u32 adr, res; |
36206 | u32 src, dst; |
36207 | |
36208 | src = DREGu32((Opcode >> 9) & 7); |
36209 | adr = AREG(7) - 4; |
36210 | AREG(7) = adr; |
36211 | PRE_IO |
36212 | READ_LONG_F(adr, dst) |
36213 | res = dst + src; |
36214 | flag_NotZ = res; |
36215 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36216 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36217 | flag_N = res >> 24; |
36218 | WRITE_LONG_F(adr, res) |
36219 | POST_IO |
36220 | RET(22) |
36221 | } |
36222 | |
36223 | // ADDX |
36224 | OPCODE(0xD100) |
36225 | { |
36226 | u32 adr, res; |
36227 | u32 src, dst; |
36228 | |
36229 | src = DREGu8((Opcode >> 0) & 7); |
36230 | dst = DREGu8((Opcode >> 9) & 7); |
36231 | res = dst + src + ((flag_X >> 8) & 1); |
36232 | flag_N = flag_X = flag_C = res; |
36233 | flag_V = (src ^ res) & (dst ^ res); |
36234 | flag_NotZ |= res & 0xFF; |
36235 | DREGu8((Opcode >> 9) & 7) = res; |
36236 | RET(4) |
36237 | } |
36238 | |
36239 | // ADDX |
36240 | OPCODE(0xD140) |
36241 | { |
36242 | u32 adr, res; |
36243 | u32 src, dst; |
36244 | |
36245 | src = DREGu16((Opcode >> 0) & 7); |
36246 | dst = DREGu16((Opcode >> 9) & 7); |
36247 | res = dst + src + ((flag_X >> 8) & 1); |
36248 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36249 | flag_N = flag_X = flag_C = res >> 8; |
36250 | flag_NotZ |= res & 0xFFFF; |
36251 | DREGu16((Opcode >> 9) & 7) = res; |
36252 | RET(4) |
36253 | } |
36254 | |
36255 | // ADDX |
36256 | OPCODE(0xD180) |
36257 | { |
36258 | u32 adr, res; |
36259 | u32 src, dst; |
36260 | |
36261 | src = DREGu32((Opcode >> 0) & 7); |
36262 | dst = DREGu32((Opcode >> 9) & 7); |
36263 | res = dst + src + ((flag_X >> 8) & 1); |
36264 | flag_NotZ |= res; |
36265 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36266 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36267 | flag_N = res >> 24; |
36268 | DREGu32((Opcode >> 9) & 7) = res; |
36269 | RET(8) |
36270 | } |
36271 | |
36272 | // ADDXM |
36273 | OPCODE(0xD108) |
36274 | { |
36275 | u32 adr, res; |
36276 | u32 src, dst; |
36277 | |
36278 | adr = AREG((Opcode >> 0) & 7) - 1; |
36279 | AREG((Opcode >> 0) & 7) = adr; |
36280 | PRE_IO |
36281 | READ_BYTE_F(adr, src) |
36282 | adr = AREG((Opcode >> 9) & 7) - 1; |
36283 | AREG((Opcode >> 9) & 7) = adr; |
36284 | READ_BYTE_F(adr, dst) |
36285 | res = dst + src + ((flag_X >> 8) & 1); |
36286 | flag_N = flag_X = flag_C = res; |
36287 | flag_V = (src ^ res) & (dst ^ res); |
36288 | flag_NotZ |= res & 0xFF; |
36289 | WRITE_BYTE_F(adr, res) |
36290 | POST_IO |
36291 | RET(18) |
36292 | } |
36293 | |
36294 | // ADDXM |
36295 | OPCODE(0xD148) |
36296 | { |
36297 | u32 adr, res; |
36298 | u32 src, dst; |
36299 | |
36300 | adr = AREG((Opcode >> 0) & 7) - 2; |
36301 | AREG((Opcode >> 0) & 7) = adr; |
36302 | PRE_IO |
36303 | READ_WORD_F(adr, src) |
36304 | adr = AREG((Opcode >> 9) & 7) - 2; |
36305 | AREG((Opcode >> 9) & 7) = adr; |
36306 | READ_WORD_F(adr, dst) |
36307 | res = dst + src + ((flag_X >> 8) & 1); |
36308 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36309 | flag_N = flag_X = flag_C = res >> 8; |
36310 | flag_NotZ |= res & 0xFFFF; |
36311 | WRITE_WORD_F(adr, res) |
36312 | POST_IO |
36313 | RET(18) |
36314 | } |
36315 | |
36316 | // ADDXM |
36317 | OPCODE(0xD188) |
36318 | { |
36319 | u32 adr, res; |
36320 | u32 src, dst; |
36321 | |
36322 | adr = AREG((Opcode >> 0) & 7) - 4; |
36323 | AREG((Opcode >> 0) & 7) = adr; |
36324 | PRE_IO |
36325 | READ_LONG_F(adr, src) |
36326 | adr = AREG((Opcode >> 9) & 7) - 4; |
36327 | AREG((Opcode >> 9) & 7) = adr; |
36328 | READ_LONG_F(adr, dst) |
36329 | res = dst + src + ((flag_X >> 8) & 1); |
36330 | flag_NotZ |= res; |
36331 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36332 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36333 | flag_N = res >> 24; |
36334 | WRITE_LONG_F(adr, res) |
36335 | POST_IO |
36336 | RET(30) |
36337 | } |
36338 | |
36339 | // ADDX7M |
36340 | OPCODE(0xD10F) |
36341 | { |
36342 | u32 adr, res; |
36343 | u32 src, dst; |
36344 | |
36345 | adr = AREG(7) - 2; |
36346 | AREG(7) = adr; |
36347 | PRE_IO |
36348 | READ_BYTE_F(adr, src) |
36349 | adr = AREG((Opcode >> 9) & 7) - 1; |
36350 | AREG((Opcode >> 9) & 7) = adr; |
36351 | READ_BYTE_F(adr, dst) |
36352 | res = dst + src + ((flag_X >> 8) & 1); |
36353 | flag_N = flag_X = flag_C = res; |
36354 | flag_V = (src ^ res) & (dst ^ res); |
36355 | flag_NotZ |= res & 0xFF; |
36356 | WRITE_BYTE_F(adr, res) |
36357 | POST_IO |
36358 | RET(18) |
36359 | } |
36360 | |
36361 | // ADDX7M |
36362 | OPCODE(0xD14F) |
36363 | { |
36364 | u32 adr, res; |
36365 | u32 src, dst; |
36366 | |
36367 | adr = AREG(7) - 2; |
36368 | AREG(7) = adr; |
36369 | PRE_IO |
36370 | READ_WORD_F(adr, src) |
36371 | adr = AREG((Opcode >> 9) & 7) - 2; |
36372 | AREG((Opcode >> 9) & 7) = adr; |
36373 | READ_WORD_F(adr, dst) |
36374 | res = dst + src + ((flag_X >> 8) & 1); |
36375 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36376 | flag_N = flag_X = flag_C = res >> 8; |
36377 | flag_NotZ |= res & 0xFFFF; |
36378 | WRITE_WORD_F(adr, res) |
36379 | POST_IO |
36380 | RET(18) |
36381 | } |
36382 | |
36383 | // ADDX7M |
36384 | OPCODE(0xD18F) |
36385 | { |
36386 | u32 adr, res; |
36387 | u32 src, dst; |
36388 | |
36389 | adr = AREG(7) - 4; |
36390 | AREG(7) = adr; |
36391 | PRE_IO |
36392 | READ_LONG_F(adr, src) |
36393 | adr = AREG((Opcode >> 9) & 7) - 4; |
36394 | AREG((Opcode >> 9) & 7) = adr; |
36395 | READ_LONG_F(adr, dst) |
36396 | res = dst + src + ((flag_X >> 8) & 1); |
36397 | flag_NotZ |= res; |
36398 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36399 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36400 | flag_N = res >> 24; |
36401 | WRITE_LONG_F(adr, res) |
36402 | POST_IO |
36403 | RET(30) |
36404 | } |
36405 | |
36406 | // ADDXM7 |
36407 | OPCODE(0xDF08) |
36408 | { |
36409 | u32 adr, res; |
36410 | u32 src, dst; |
36411 | |
36412 | adr = AREG((Opcode >> 0) & 7) - 1; |
36413 | AREG((Opcode >> 0) & 7) = adr; |
36414 | PRE_IO |
36415 | READ_BYTE_F(adr, src) |
36416 | adr = AREG(7) - 2; |
36417 | AREG(7) = adr; |
36418 | READ_BYTE_F(adr, dst) |
36419 | res = dst + src + ((flag_X >> 8) & 1); |
36420 | flag_N = flag_X = flag_C = res; |
36421 | flag_V = (src ^ res) & (dst ^ res); |
36422 | flag_NotZ |= res & 0xFF; |
36423 | WRITE_BYTE_F(adr, res) |
36424 | POST_IO |
36425 | RET(18) |
36426 | } |
36427 | |
36428 | // ADDXM7 |
36429 | OPCODE(0xDF48) |
36430 | { |
36431 | u32 adr, res; |
36432 | u32 src, dst; |
36433 | |
36434 | adr = AREG((Opcode >> 0) & 7) - 2; |
36435 | AREG((Opcode >> 0) & 7) = adr; |
36436 | PRE_IO |
36437 | READ_WORD_F(adr, src) |
36438 | adr = AREG(7) - 2; |
36439 | AREG(7) = adr; |
36440 | READ_WORD_F(adr, dst) |
36441 | res = dst + src + ((flag_X >> 8) & 1); |
36442 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36443 | flag_N = flag_X = flag_C = res >> 8; |
36444 | flag_NotZ |= res & 0xFFFF; |
36445 | WRITE_WORD_F(adr, res) |
36446 | POST_IO |
36447 | RET(18) |
36448 | } |
36449 | |
36450 | // ADDXM7 |
36451 | OPCODE(0xDF88) |
36452 | { |
36453 | u32 adr, res; |
36454 | u32 src, dst; |
36455 | |
36456 | adr = AREG((Opcode >> 0) & 7) - 4; |
36457 | AREG((Opcode >> 0) & 7) = adr; |
36458 | PRE_IO |
36459 | READ_LONG_F(adr, src) |
36460 | adr = AREG(7) - 4; |
36461 | AREG(7) = adr; |
36462 | READ_LONG_F(adr, dst) |
36463 | res = dst + src + ((flag_X >> 8) & 1); |
36464 | flag_NotZ |= res; |
36465 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36466 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36467 | flag_N = res >> 24; |
36468 | WRITE_LONG_F(adr, res) |
36469 | POST_IO |
36470 | RET(30) |
36471 | } |
36472 | |
36473 | // ADDX7M7 |
36474 | OPCODE(0xDF0F) |
36475 | { |
36476 | u32 adr, res; |
36477 | u32 src, dst; |
36478 | |
36479 | adr = AREG(7) - 2; |
36480 | AREG(7) = adr; |
36481 | PRE_IO |
36482 | READ_BYTE_F(adr, src) |
36483 | adr = AREG(7) - 2; |
36484 | AREG(7) = adr; |
36485 | READ_BYTE_F(adr, dst) |
36486 | res = dst + src + ((flag_X >> 8) & 1); |
36487 | flag_N = flag_X = flag_C = res; |
36488 | flag_V = (src ^ res) & (dst ^ res); |
36489 | flag_NotZ |= res & 0xFF; |
36490 | WRITE_BYTE_F(adr, res) |
36491 | POST_IO |
36492 | RET(18) |
36493 | } |
36494 | |
36495 | // ADDX7M7 |
36496 | OPCODE(0xDF4F) |
36497 | { |
36498 | u32 adr, res; |
36499 | u32 src, dst; |
36500 | |
36501 | adr = AREG(7) - 2; |
36502 | AREG(7) = adr; |
36503 | PRE_IO |
36504 | READ_WORD_F(adr, src) |
36505 | adr = AREG(7) - 2; |
36506 | AREG(7) = adr; |
36507 | READ_WORD_F(adr, dst) |
36508 | res = dst + src + ((flag_X >> 8) & 1); |
36509 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36510 | flag_N = flag_X = flag_C = res >> 8; |
36511 | flag_NotZ |= res & 0xFFFF; |
36512 | WRITE_WORD_F(adr, res) |
36513 | POST_IO |
36514 | RET(18) |
36515 | } |
36516 | |
36517 | // ADDX7M7 |
36518 | OPCODE(0xDF8F) |
36519 | { |
36520 | u32 adr, res; |
36521 | u32 src, dst; |
36522 | |
36523 | adr = AREG(7) - 4; |
36524 | AREG(7) = adr; |
36525 | PRE_IO |
36526 | READ_LONG_F(adr, src) |
36527 | adr = AREG(7) - 4; |
36528 | AREG(7) = adr; |
36529 | READ_LONG_F(adr, dst) |
36530 | res = dst + src + ((flag_X >> 8) & 1); |
36531 | flag_NotZ |= res; |
36532 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36533 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36534 | flag_N = res >> 24; |
36535 | WRITE_LONG_F(adr, res) |
36536 | POST_IO |
36537 | RET(30) |
36538 | } |
36539 | |
36540 | // ADDA |
36541 | OPCODE(0xD0C0) |
36542 | { |
36543 | u32 adr, res; |
36544 | u32 src, dst; |
36545 | |
36546 | src = (s32)DREGs16((Opcode >> 0) & 7); |
36547 | dst = AREGu32((Opcode >> 9) & 7); |
36548 | res = dst + src; |
36549 | AREG((Opcode >> 9) & 7) = res; |
36550 | RET(8) |
36551 | } |
36552 | |
36553 | // ADDA |
36554 | OPCODE(0xD0C8) |
36555 | { |
36556 | u32 adr, res; |
36557 | u32 src, dst; |
36558 | |
36559 | src = (s32)AREGs16((Opcode >> 0) & 7); |
36560 | dst = AREGu32((Opcode >> 9) & 7); |
36561 | res = dst + src; |
36562 | AREG((Opcode >> 9) & 7) = res; |
36563 | RET(8) |
36564 | } |
36565 | |
36566 | // ADDA |
36567 | OPCODE(0xD0D0) |
36568 | { |
36569 | u32 adr, res; |
36570 | u32 src, dst; |
36571 | |
36572 | adr = AREG((Opcode >> 0) & 7); |
36573 | PRE_IO |
36574 | READSX_WORD_F(adr, src) |
36575 | dst = AREGu32((Opcode >> 9) & 7); |
36576 | res = dst + src; |
36577 | AREG((Opcode >> 9) & 7) = res; |
36578 | POST_IO |
03e4f2a3 |
36579 | #ifdef USE_CYCLONE_TIMING |
36580 | RET(12) |
36581 | #else |
70357ce5 |
36582 | RET(10) |
03e4f2a3 |
36583 | #endif |
70357ce5 |
36584 | } |
36585 | |
36586 | // ADDA |
36587 | OPCODE(0xD0D8) |
36588 | { |
36589 | u32 adr, res; |
36590 | u32 src, dst; |
36591 | |
36592 | adr = AREG((Opcode >> 0) & 7); |
36593 | AREG((Opcode >> 0) & 7) += 2; |
36594 | PRE_IO |
36595 | READSX_WORD_F(adr, src) |
36596 | dst = AREGu32((Opcode >> 9) & 7); |
36597 | res = dst + src; |
36598 | AREG((Opcode >> 9) & 7) = res; |
36599 | POST_IO |
03e4f2a3 |
36600 | #ifdef USE_CYCLONE_TIMING |
36601 | RET(12) |
36602 | #else |
70357ce5 |
36603 | RET(10) |
03e4f2a3 |
36604 | #endif |
70357ce5 |
36605 | } |
36606 | |
36607 | // ADDA |
36608 | OPCODE(0xD0E0) |
36609 | { |
36610 | u32 adr, res; |
36611 | u32 src, dst; |
36612 | |
36613 | adr = AREG((Opcode >> 0) & 7) - 2; |
36614 | AREG((Opcode >> 0) & 7) = adr; |
36615 | PRE_IO |
36616 | READSX_WORD_F(adr, src) |
36617 | dst = AREGu32((Opcode >> 9) & 7); |
36618 | res = dst + src; |
36619 | AREG((Opcode >> 9) & 7) = res; |
36620 | POST_IO |
03e4f2a3 |
36621 | #ifdef USE_CYCLONE_TIMING |
36622 | RET(14) |
36623 | #else |
70357ce5 |
36624 | RET(12) |
03e4f2a3 |
36625 | #endif |
70357ce5 |
36626 | } |
36627 | |
36628 | // ADDA |
36629 | OPCODE(0xD0E8) |
36630 | { |
36631 | u32 adr, res; |
36632 | u32 src, dst; |
36633 | |
36634 | FETCH_SWORD(adr); |
36635 | adr += AREG((Opcode >> 0) & 7); |
36636 | PRE_IO |
36637 | READSX_WORD_F(adr, src) |
36638 | dst = AREGu32((Opcode >> 9) & 7); |
36639 | res = dst + src; |
36640 | AREG((Opcode >> 9) & 7) = res; |
36641 | POST_IO |
03e4f2a3 |
36642 | #ifdef USE_CYCLONE_TIMING |
36643 | RET(16) |
36644 | #else |
70357ce5 |
36645 | RET(14) |
03e4f2a3 |
36646 | #endif |
70357ce5 |
36647 | } |
36648 | |
36649 | // ADDA |
36650 | OPCODE(0xD0F0) |
36651 | { |
36652 | u32 adr, res; |
36653 | u32 src, dst; |
36654 | |
36655 | adr = AREG((Opcode >> 0) & 7); |
36656 | DECODE_EXT_WORD |
36657 | PRE_IO |
36658 | READSX_WORD_F(adr, src) |
36659 | dst = AREGu32((Opcode >> 9) & 7); |
36660 | res = dst + src; |
36661 | AREG((Opcode >> 9) & 7) = res; |
36662 | POST_IO |
03e4f2a3 |
36663 | #ifdef USE_CYCLONE_TIMING |
36664 | RET(18) |
36665 | #else |
70357ce5 |
36666 | RET(16) |
03e4f2a3 |
36667 | #endif |
70357ce5 |
36668 | } |
36669 | |
36670 | // ADDA |
36671 | OPCODE(0xD0F8) |
36672 | { |
36673 | u32 adr, res; |
36674 | u32 src, dst; |
36675 | |
36676 | FETCH_SWORD(adr); |
36677 | PRE_IO |
36678 | READSX_WORD_F(adr, src) |
36679 | dst = AREGu32((Opcode >> 9) & 7); |
36680 | res = dst + src; |
36681 | AREG((Opcode >> 9) & 7) = res; |
36682 | POST_IO |
03e4f2a3 |
36683 | #ifdef USE_CYCLONE_TIMING |
36684 | RET(16) |
36685 | #else |
70357ce5 |
36686 | RET(14) |
03e4f2a3 |
36687 | #endif |
70357ce5 |
36688 | } |
36689 | |
36690 | // ADDA |
36691 | OPCODE(0xD0F9) |
36692 | { |
36693 | u32 adr, res; |
36694 | u32 src, dst; |
36695 | |
36696 | FETCH_LONG(adr); |
36697 | PRE_IO |
36698 | READSX_WORD_F(adr, src) |
36699 | dst = AREGu32((Opcode >> 9) & 7); |
36700 | res = dst + src; |
36701 | AREG((Opcode >> 9) & 7) = res; |
36702 | POST_IO |
03e4f2a3 |
36703 | #ifdef USE_CYCLONE_TIMING |
36704 | RET(20) |
36705 | #else |
70357ce5 |
36706 | RET(18) |
03e4f2a3 |
36707 | #endif |
70357ce5 |
36708 | } |
36709 | |
36710 | // ADDA |
36711 | OPCODE(0xD0FA) |
36712 | { |
36713 | u32 adr, res; |
36714 | u32 src, dst; |
36715 | |
36716 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
36717 | PC++; |
36718 | PRE_IO |
36719 | READSX_WORD_F(adr, src) |
36720 | dst = AREGu32((Opcode >> 9) & 7); |
36721 | res = dst + src; |
36722 | AREG((Opcode >> 9) & 7) = res; |
36723 | POST_IO |
03e4f2a3 |
36724 | #ifdef USE_CYCLONE_TIMING |
36725 | RET(16) |
36726 | #else |
70357ce5 |
36727 | RET(14) |
03e4f2a3 |
36728 | #endif |
70357ce5 |
36729 | } |
36730 | |
36731 | // ADDA |
36732 | OPCODE(0xD0FB) |
36733 | { |
36734 | u32 adr, res; |
36735 | u32 src, dst; |
36736 | |
36737 | adr = (u32)(PC) - BasePC; |
36738 | DECODE_EXT_WORD |
36739 | PRE_IO |
36740 | READSX_WORD_F(adr, src) |
36741 | dst = AREGu32((Opcode >> 9) & 7); |
36742 | res = dst + src; |
36743 | AREG((Opcode >> 9) & 7) = res; |
36744 | POST_IO |
03e4f2a3 |
36745 | #ifdef USE_CYCLONE_TIMING |
36746 | RET(18) |
36747 | #else |
70357ce5 |
36748 | RET(16) |
03e4f2a3 |
36749 | #endif |
70357ce5 |
36750 | } |
36751 | |
36752 | // ADDA |
36753 | OPCODE(0xD0FC) |
36754 | { |
36755 | u32 adr, res; |
36756 | u32 src, dst; |
36757 | |
36758 | FETCH_SWORD(src); |
36759 | dst = AREGu32((Opcode >> 9) & 7); |
36760 | res = dst + src; |
36761 | AREG((Opcode >> 9) & 7) = res; |
36762 | RET(12) |
36763 | } |
36764 | |
36765 | // ADDA |
36766 | OPCODE(0xD0DF) |
36767 | { |
36768 | u32 adr, res; |
36769 | u32 src, dst; |
36770 | |
36771 | adr = AREG(7); |
36772 | AREG(7) += 2; |
36773 | PRE_IO |
36774 | READSX_WORD_F(adr, src) |
36775 | dst = AREGu32((Opcode >> 9) & 7); |
36776 | res = dst + src; |
36777 | AREG((Opcode >> 9) & 7) = res; |
36778 | POST_IO |
03e4f2a3 |
36779 | #ifdef USE_CYCLONE_TIMING |
36780 | RET(12) |
36781 | #else |
70357ce5 |
36782 | RET(10) |
03e4f2a3 |
36783 | #endif |
70357ce5 |
36784 | } |
36785 | |
36786 | // ADDA |
36787 | OPCODE(0xD0E7) |
36788 | { |
36789 | u32 adr, res; |
36790 | u32 src, dst; |
36791 | |
36792 | adr = AREG(7) - 2; |
36793 | AREG(7) = adr; |
36794 | PRE_IO |
36795 | READSX_WORD_F(adr, src) |
36796 | dst = AREGu32((Opcode >> 9) & 7); |
36797 | res = dst + src; |
36798 | AREG((Opcode >> 9) & 7) = res; |
36799 | POST_IO |
03e4f2a3 |
36800 | #ifdef USE_CYCLONE_TIMING |
36801 | RET(14) |
36802 | #else |
70357ce5 |
36803 | RET(12) |
03e4f2a3 |
36804 | #endif |
70357ce5 |
36805 | } |
36806 | |
36807 | // ADDA |
36808 | OPCODE(0xD1C0) |
36809 | { |
36810 | u32 adr, res; |
36811 | u32 src, dst; |
36812 | |
36813 | src = (s32)DREGs32((Opcode >> 0) & 7); |
36814 | dst = AREGu32((Opcode >> 9) & 7); |
36815 | res = dst + src; |
36816 | AREG((Opcode >> 9) & 7) = res; |
36817 | #ifdef USE_CYCLONE_TIMING |
36818 | RET(8) |
36819 | #else |
36820 | RET(6) |
36821 | #endif |
36822 | } |
36823 | |
36824 | // ADDA |
36825 | OPCODE(0xD1C8) |
36826 | { |
36827 | u32 adr, res; |
36828 | u32 src, dst; |
36829 | |
36830 | src = (s32)AREGs32((Opcode >> 0) & 7); |
36831 | dst = AREGu32((Opcode >> 9) & 7); |
36832 | res = dst + src; |
36833 | AREG((Opcode >> 9) & 7) = res; |
36834 | #ifdef USE_CYCLONE_TIMING |
36835 | RET(8) |
36836 | #else |
36837 | RET(6) |
36838 | #endif |
36839 | } |
36840 | |
36841 | // ADDA |
36842 | OPCODE(0xD1D0) |
36843 | { |
36844 | u32 adr, res; |
36845 | u32 src, dst; |
36846 | |
36847 | adr = AREG((Opcode >> 0) & 7); |
36848 | PRE_IO |
36849 | READSX_LONG_F(adr, src) |
36850 | dst = AREGu32((Opcode >> 9) & 7); |
36851 | res = dst + src; |
36852 | AREG((Opcode >> 9) & 7) = res; |
36853 | POST_IO |
36854 | RET(14) |
36855 | } |
36856 | |
36857 | // ADDA |
36858 | OPCODE(0xD1D8) |
36859 | { |
36860 | u32 adr, res; |
36861 | u32 src, dst; |
36862 | |
36863 | adr = AREG((Opcode >> 0) & 7); |
36864 | AREG((Opcode >> 0) & 7) += 4; |
36865 | PRE_IO |
36866 | READSX_LONG_F(adr, src) |
36867 | dst = AREGu32((Opcode >> 9) & 7); |
36868 | res = dst + src; |
36869 | AREG((Opcode >> 9) & 7) = res; |
36870 | POST_IO |
36871 | RET(14) |
36872 | } |
36873 | |
36874 | // ADDA |
36875 | OPCODE(0xD1E0) |
36876 | { |
36877 | u32 adr, res; |
36878 | u32 src, dst; |
36879 | |
36880 | adr = AREG((Opcode >> 0) & 7) - 4; |
36881 | AREG((Opcode >> 0) & 7) = adr; |
36882 | PRE_IO |
36883 | READSX_LONG_F(adr, src) |
36884 | dst = AREGu32((Opcode >> 9) & 7); |
36885 | res = dst + src; |
36886 | AREG((Opcode >> 9) & 7) = res; |
36887 | POST_IO |
36888 | RET(16) |
36889 | } |
36890 | |
36891 | // ADDA |
36892 | OPCODE(0xD1E8) |
36893 | { |
36894 | u32 adr, res; |
36895 | u32 src, dst; |
36896 | |
36897 | FETCH_SWORD(adr); |
36898 | adr += AREG((Opcode >> 0) & 7); |
36899 | PRE_IO |
36900 | READSX_LONG_F(adr, src) |
36901 | dst = AREGu32((Opcode >> 9) & 7); |
36902 | res = dst + src; |
36903 | AREG((Opcode >> 9) & 7) = res; |
36904 | POST_IO |
36905 | RET(18) |
36906 | } |
36907 | |
36908 | // ADDA |
36909 | OPCODE(0xD1F0) |
36910 | { |
36911 | u32 adr, res; |
36912 | u32 src, dst; |
36913 | |
36914 | adr = AREG((Opcode >> 0) & 7); |
36915 | DECODE_EXT_WORD |
36916 | PRE_IO |
36917 | READSX_LONG_F(adr, src) |
36918 | dst = AREGu32((Opcode >> 9) & 7); |
36919 | res = dst + src; |
36920 | AREG((Opcode >> 9) & 7) = res; |
36921 | POST_IO |
36922 | RET(20) |
36923 | } |
36924 | |
36925 | // ADDA |
36926 | OPCODE(0xD1F8) |
36927 | { |
36928 | u32 adr, res; |
36929 | u32 src, dst; |
36930 | |
36931 | FETCH_SWORD(adr); |
36932 | PRE_IO |
36933 | READSX_LONG_F(adr, src) |
36934 | dst = AREGu32((Opcode >> 9) & 7); |
36935 | res = dst + src; |
36936 | AREG((Opcode >> 9) & 7) = res; |
36937 | POST_IO |
36938 | RET(18) |
36939 | } |
36940 | |
36941 | // ADDA |
36942 | OPCODE(0xD1F9) |
36943 | { |
36944 | u32 adr, res; |
36945 | u32 src, dst; |
36946 | |
36947 | FETCH_LONG(adr); |
36948 | PRE_IO |
36949 | READSX_LONG_F(adr, src) |
36950 | dst = AREGu32((Opcode >> 9) & 7); |
36951 | res = dst + src; |
36952 | AREG((Opcode >> 9) & 7) = res; |
36953 | POST_IO |
36954 | RET(22) |
36955 | } |
36956 | |
36957 | // ADDA |
36958 | OPCODE(0xD1FA) |
36959 | { |
36960 | u32 adr, res; |
36961 | u32 src, dst; |
36962 | |
36963 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
36964 | PC++; |
36965 | PRE_IO |
36966 | READSX_LONG_F(adr, src) |
36967 | dst = AREGu32((Opcode >> 9) & 7); |
36968 | res = dst + src; |
36969 | AREG((Opcode >> 9) & 7) = res; |
36970 | POST_IO |
36971 | RET(18) |
36972 | } |
36973 | |
36974 | // ADDA |
36975 | OPCODE(0xD1FB) |
36976 | { |
36977 | u32 adr, res; |
36978 | u32 src, dst; |
36979 | |
36980 | adr = (u32)(PC) - BasePC; |
36981 | DECODE_EXT_WORD |
36982 | PRE_IO |
36983 | READSX_LONG_F(adr, src) |
36984 | dst = AREGu32((Opcode >> 9) & 7); |
36985 | res = dst + src; |
36986 | AREG((Opcode >> 9) & 7) = res; |
36987 | POST_IO |
36988 | RET(20) |
36989 | } |
36990 | |
36991 | // ADDA |
36992 | OPCODE(0xD1FC) |
36993 | { |
36994 | u32 adr, res; |
36995 | u32 src, dst; |
36996 | |
36997 | FETCH_LONG(src); |
36998 | dst = AREGu32((Opcode >> 9) & 7); |
36999 | res = dst + src; |
37000 | AREG((Opcode >> 9) & 7) = res; |
37001 | #ifdef USE_CYCLONE_TIMING |
37002 | RET(16) |
37003 | #else |
37004 | RET(14) |
37005 | #endif |
37006 | } |
37007 | |
37008 | // ADDA |
37009 | OPCODE(0xD1DF) |
37010 | { |
37011 | u32 adr, res; |
37012 | u32 src, dst; |
37013 | |
37014 | adr = AREG(7); |
37015 | AREG(7) += 4; |
37016 | PRE_IO |
37017 | READSX_LONG_F(adr, src) |
37018 | dst = AREGu32((Opcode >> 9) & 7); |
37019 | res = dst + src; |
37020 | AREG((Opcode >> 9) & 7) = res; |
37021 | POST_IO |
37022 | RET(14) |
37023 | } |
37024 | |
37025 | // ADDA |
37026 | OPCODE(0xD1E7) |
37027 | { |
37028 | u32 adr, res; |
37029 | u32 src, dst; |
37030 | |
37031 | adr = AREG(7) - 4; |
37032 | AREG(7) = adr; |
37033 | PRE_IO |
37034 | READSX_LONG_F(adr, src) |
37035 | dst = AREGu32((Opcode >> 9) & 7); |
37036 | res = dst + src; |
37037 | AREG((Opcode >> 9) & 7) = res; |
37038 | POST_IO |
37039 | RET(16) |
37040 | } |
37041 | |
37042 | // ASRk |
37043 | OPCODE(0xE000) |
37044 | { |
37045 | u32 adr, res; |
37046 | u32 src, dst; |
37047 | |
37048 | u32 sft; |
37049 | |
37050 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37051 | m68kcontext.io_cycle_counter -= sft * 2; |
37052 | src = (s32)DREGs8((Opcode >> 0) & 7); |
37053 | flag_V = 0; |
37054 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37055 | res = ((s32)src) >> sft; |
37056 | flag_N = res >> 0; |
37057 | flag_NotZ = res; |
37058 | DREGu8((Opcode >> 0) & 7) = res; |
37059 | RET(6) |
37060 | } |
37061 | |
37062 | // ASRk |
37063 | OPCODE(0xE040) |
37064 | { |
37065 | u32 adr, res; |
37066 | u32 src, dst; |
37067 | |
37068 | u32 sft; |
37069 | |
37070 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37071 | m68kcontext.io_cycle_counter -= sft * 2; |
37072 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37073 | flag_V = 0; |
37074 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37075 | res = ((s32)src) >> sft; |
37076 | flag_N = res >> 8; |
37077 | flag_NotZ = res; |
37078 | DREGu16((Opcode >> 0) & 7) = res; |
37079 | RET(6) |
37080 | } |
37081 | |
37082 | // ASRk |
37083 | OPCODE(0xE080) |
37084 | { |
37085 | u32 adr, res; |
37086 | u32 src, dst; |
37087 | |
37088 | u32 sft; |
37089 | |
37090 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37091 | m68kcontext.io_cycle_counter -= sft * 2; |
37092 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37093 | flag_V = 0; |
37094 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37095 | res = ((s32)src) >> sft; |
37096 | flag_N = res >> 24; |
37097 | flag_NotZ = res; |
37098 | DREGu32((Opcode >> 0) & 7) = res; |
37099 | RET(8) |
37100 | } |
37101 | |
37102 | // LSRk |
37103 | OPCODE(0xE008) |
37104 | { |
37105 | u32 adr, res; |
37106 | u32 src, dst; |
37107 | |
37108 | u32 sft; |
37109 | |
37110 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37111 | m68kcontext.io_cycle_counter -= sft * 2; |
37112 | src = DREGu8((Opcode >> 0) & 7); |
37113 | flag_N = flag_V = 0; |
37114 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37115 | res = src >> sft; |
37116 | flag_NotZ = res; |
37117 | DREGu8((Opcode >> 0) & 7) = res; |
37118 | RET(6) |
37119 | } |
37120 | |
37121 | // LSRk |
37122 | OPCODE(0xE048) |
37123 | { |
37124 | u32 adr, res; |
37125 | u32 src, dst; |
37126 | |
37127 | u32 sft; |
37128 | |
37129 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37130 | m68kcontext.io_cycle_counter -= sft * 2; |
37131 | src = DREGu16((Opcode >> 0) & 7); |
37132 | flag_N = flag_V = 0; |
37133 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37134 | res = src >> sft; |
37135 | flag_NotZ = res; |
37136 | DREGu16((Opcode >> 0) & 7) = res; |
37137 | RET(6) |
37138 | } |
37139 | |
37140 | // LSRk |
37141 | OPCODE(0xE088) |
37142 | { |
37143 | u32 adr, res; |
37144 | u32 src, dst; |
37145 | |
37146 | u32 sft; |
37147 | |
37148 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37149 | m68kcontext.io_cycle_counter -= sft * 2; |
37150 | src = DREGu32((Opcode >> 0) & 7); |
37151 | flag_N = flag_V = 0; |
37152 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37153 | res = src >> sft; |
37154 | flag_NotZ = res; |
37155 | DREGu32((Opcode >> 0) & 7) = res; |
37156 | RET(8) |
37157 | } |
37158 | |
37159 | // ROXRk |
37160 | OPCODE(0xE010) |
37161 | { |
37162 | u32 adr, res; |
37163 | u32 src, dst; |
37164 | |
37165 | u32 sft; |
37166 | |
37167 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37168 | m68kcontext.io_cycle_counter -= sft * 2; |
37169 | src = DREGu8((Opcode >> 0) & 7); |
37170 | src |= (flag_X & M68K_SR_X) << 0; |
37171 | res = (src >> sft) | (src << (9 - sft)); |
37172 | flag_X = flag_C = res >> 0; |
37173 | flag_V = 0; |
37174 | flag_N = res >> 0; |
37175 | flag_NotZ = res & 0x000000FF; |
37176 | DREGu8((Opcode >> 0) & 7) = res; |
37177 | RET(6) |
37178 | } |
37179 | |
37180 | // ROXRk |
37181 | OPCODE(0xE050) |
37182 | { |
37183 | u32 adr, res; |
37184 | u32 src, dst; |
37185 | |
37186 | u32 sft; |
37187 | |
37188 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37189 | m68kcontext.io_cycle_counter -= sft * 2; |
37190 | src = DREGu16((Opcode >> 0) & 7); |
37191 | src |= (flag_X & M68K_SR_X) << 8; |
37192 | res = (src >> sft) | (src << (17 - sft)); |
37193 | flag_X = flag_C = res >> 8; |
37194 | flag_V = 0; |
37195 | flag_N = res >> 8; |
37196 | flag_NotZ = res & 0x0000FFFF; |
37197 | DREGu16((Opcode >> 0) & 7) = res; |
37198 | RET(6) |
37199 | } |
37200 | |
37201 | // ROXRk |
37202 | OPCODE(0xE090) |
37203 | { |
37204 | u32 adr, res; |
37205 | u32 src, dst; |
37206 | |
37207 | u32 sft; |
37208 | |
37209 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37210 | m68kcontext.io_cycle_counter -= sft * 2; |
37211 | src = DREGu32((Opcode >> 0) & 7); |
37212 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37213 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37214 | else res = (src >> sft) | (src << (33 - sft)) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + sft))); |
37215 | flag_X = flag_C; |
37216 | flag_V = 0; |
37217 | flag_N = res >> 24; |
37218 | flag_NotZ = res; |
37219 | DREGu32((Opcode >> 0) & 7) = res; |
37220 | RET(8) |
37221 | } |
37222 | |
37223 | // RORk |
37224 | OPCODE(0xE018) |
37225 | { |
37226 | u32 adr, res; |
37227 | u32 src, dst; |
37228 | |
37229 | u32 sft; |
37230 | |
37231 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37232 | m68kcontext.io_cycle_counter -= sft * 2; |
37233 | src = DREGu8((Opcode >> 0) & 7); |
37234 | flag_V = 0; |
37235 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37236 | res = (src >> sft) | (src << (8 - sft)); |
37237 | flag_N = res >> 0; |
37238 | flag_NotZ = res & 0x000000FF; |
37239 | DREGu8((Opcode >> 0) & 7) = res; |
37240 | RET(6) |
37241 | } |
37242 | |
37243 | // RORk |
37244 | OPCODE(0xE058) |
37245 | { |
37246 | u32 adr, res; |
37247 | u32 src, dst; |
37248 | |
37249 | u32 sft; |
37250 | |
37251 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37252 | m68kcontext.io_cycle_counter -= sft * 2; |
37253 | src = DREGu16((Opcode >> 0) & 7); |
37254 | flag_V = 0; |
37255 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37256 | res = (src >> sft) | (src << (16 - sft)); |
37257 | flag_N = res >> 8; |
37258 | flag_NotZ = res & 0x0000FFFF; |
37259 | DREGu16((Opcode >> 0) & 7) = res; |
37260 | RET(6) |
37261 | } |
37262 | |
37263 | // RORk |
37264 | OPCODE(0xE098) |
37265 | { |
37266 | u32 adr, res; |
37267 | u32 src, dst; |
37268 | |
37269 | u32 sft; |
37270 | |
37271 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37272 | m68kcontext.io_cycle_counter -= sft * 2; |
37273 | src = DREGu32((Opcode >> 0) & 7); |
37274 | flag_V = 0; |
37275 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37276 | res = (src >> sft) | (src << (32 - sft)); |
37277 | flag_N = res >> 24; |
37278 | flag_NotZ = res; |
37279 | DREGu32((Opcode >> 0) & 7) = res; |
37280 | RET(8) |
37281 | } |
37282 | |
37283 | // ASLk |
37284 | OPCODE(0xE100) |
37285 | { |
37286 | u32 adr, res; |
37287 | u32 src, dst; |
37288 | |
37289 | u32 sft; |
37290 | |
37291 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37292 | m68kcontext.io_cycle_counter -= sft * 2; |
37293 | src = DREGu8((Opcode >> 0) & 7); |
37294 | if (sft < 8) |
37295 | { |
37296 | flag_X = flag_C = src << (0 + sft); |
37297 | res = src << sft; |
37298 | flag_N = res >> 0; |
37299 | flag_NotZ = res & 0x000000FF; |
37300 | DREGu8((Opcode >> 0) & 7) = res; |
37301 | flag_V = 0; |
37302 | if ((sft > 7) && (src)) flag_V = M68K_SR_V; |
37303 | else |
37304 | { |
37305 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
37306 | src &= msk; |
37307 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37308 | } |
37309 | RET(6) |
37310 | } |
37311 | |
37312 | if (src) flag_V = M68K_SR_V; |
37313 | else flag_V = 0; |
37314 | flag_X = flag_C = src << M68K_SR_C_SFT; |
37315 | res = 0; |
37316 | DREGu8((Opcode >> 0) & 7) = res; |
37317 | flag_N = 0; |
37318 | flag_NotZ = 0; |
37319 | RET(6) |
37320 | } |
37321 | |
37322 | // ASLk |
37323 | OPCODE(0xE140) |
37324 | { |
37325 | u32 adr, res; |
37326 | u32 src, dst; |
37327 | |
37328 | u32 sft; |
37329 | |
37330 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37331 | m68kcontext.io_cycle_counter -= sft * 2; |
37332 | src = DREGu16((Opcode >> 0) & 7); |
37333 | flag_X = flag_C = src >> (8 - sft); |
37334 | res = src << sft; |
37335 | flag_N = res >> 8; |
37336 | flag_NotZ = res & 0x0000FFFF; |
37337 | DREGu16((Opcode >> 0) & 7) = res; |
37338 | flag_V = 0; |
37339 | { |
37340 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
37341 | src &= msk; |
37342 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37343 | } |
37344 | RET(6) |
37345 | } |
37346 | |
37347 | // ASLk |
37348 | OPCODE(0xE180) |
37349 | { |
37350 | u32 adr, res; |
37351 | u32 src, dst; |
37352 | |
37353 | u32 sft; |
37354 | |
37355 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37356 | m68kcontext.io_cycle_counter -= sft * 2; |
37357 | src = DREGu32((Opcode >> 0) & 7); |
37358 | flag_X = flag_C = src >> (24 - sft); |
37359 | res = src << sft; |
37360 | flag_N = res >> 24; |
37361 | flag_NotZ = res & 0xFFFFFFFF; |
37362 | DREGu32((Opcode >> 0) & 7) = res; |
37363 | flag_V = 0; |
37364 | { |
37365 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
37366 | src &= msk; |
37367 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37368 | } |
37369 | RET(8) |
37370 | } |
37371 | |
37372 | // LSLk |
37373 | OPCODE(0xE108) |
37374 | { |
37375 | u32 adr, res; |
37376 | u32 src, dst; |
37377 | |
37378 | u32 sft; |
37379 | |
37380 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37381 | m68kcontext.io_cycle_counter -= sft * 2; |
37382 | src = DREGu8((Opcode >> 0) & 7); |
37383 | flag_V = 0; |
37384 | flag_X = flag_C = src << (0 + sft); |
37385 | res = src << sft; |
37386 | flag_N = res >> 0; |
37387 | flag_NotZ = res & 0x000000FF; |
37388 | DREGu8((Opcode >> 0) & 7) = res; |
37389 | RET(6) |
37390 | } |
37391 | |
37392 | // LSLk |
37393 | OPCODE(0xE148) |
37394 | { |
37395 | u32 adr, res; |
37396 | u32 src, dst; |
37397 | |
37398 | u32 sft; |
37399 | |
37400 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37401 | m68kcontext.io_cycle_counter -= sft * 2; |
37402 | src = DREGu16((Opcode >> 0) & 7); |
37403 | flag_V = 0; |
37404 | flag_X = flag_C = src >> (8 - sft); |
37405 | res = src << sft; |
37406 | flag_N = res >> 8; |
37407 | flag_NotZ = res & 0x0000FFFF; |
37408 | DREGu16((Opcode >> 0) & 7) = res; |
37409 | RET(6) |
37410 | } |
37411 | |
37412 | // LSLk |
37413 | OPCODE(0xE188) |
37414 | { |
37415 | u32 adr, res; |
37416 | u32 src, dst; |
37417 | |
37418 | u32 sft; |
37419 | |
37420 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37421 | m68kcontext.io_cycle_counter -= sft * 2; |
37422 | src = DREGu32((Opcode >> 0) & 7); |
37423 | flag_V = 0; |
37424 | flag_X = flag_C = src >> (24 - sft); |
37425 | res = src << sft; |
37426 | flag_N = res >> 24; |
37427 | flag_NotZ = res & 0xFFFFFFFF; |
37428 | DREGu32((Opcode >> 0) & 7) = res; |
37429 | RET(8) |
37430 | } |
37431 | |
37432 | // ROXLk |
37433 | OPCODE(0xE110) |
37434 | { |
37435 | u32 adr, res; |
37436 | u32 src, dst; |
37437 | |
37438 | u32 sft; |
37439 | |
37440 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37441 | m68kcontext.io_cycle_counter -= sft * 2; |
37442 | src = DREGu8((Opcode >> 0) & 7); |
37443 | src |= (flag_X & M68K_SR_X) << 0; |
37444 | res = (src << sft) | (src >> (9 - sft)); |
37445 | flag_X = flag_C = res >> 0; |
37446 | flag_V = 0; |
37447 | flag_N = res >> 0; |
37448 | flag_NotZ = res & 0x000000FF; |
37449 | DREGu8((Opcode >> 0) & 7) = res; |
37450 | RET(6) |
37451 | } |
37452 | |
37453 | // ROXLk |
37454 | OPCODE(0xE150) |
37455 | { |
37456 | u32 adr, res; |
37457 | u32 src, dst; |
37458 | |
37459 | u32 sft; |
37460 | |
37461 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37462 | m68kcontext.io_cycle_counter -= sft * 2; |
37463 | src = DREGu16((Opcode >> 0) & 7); |
37464 | src |= (flag_X & M68K_SR_X) << 8; |
37465 | res = (src << sft) | (src >> (17 - sft)); |
37466 | flag_X = flag_C = res >> 8; |
37467 | flag_V = 0; |
37468 | flag_N = res >> 8; |
37469 | flag_NotZ = res & 0x0000FFFF; |
37470 | DREGu16((Opcode >> 0) & 7) = res; |
37471 | RET(6) |
37472 | } |
37473 | |
37474 | // ROXLk |
37475 | OPCODE(0xE190) |
37476 | { |
37477 | u32 adr, res; |
37478 | u32 src, dst; |
37479 | |
37480 | u32 sft; |
37481 | |
37482 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37483 | m68kcontext.io_cycle_counter -= sft * 2; |
37484 | src = DREGu32((Opcode >> 0) & 7); |
37485 | flag_C = src >> ((32 - M68K_SR_C_SFT) - sft); |
37486 | if (sft == 1) res = (src << 1) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - 1)); |
37487 | else res = (src << sft) | (src >> (33 - sft)) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - sft)); |
37488 | flag_X = flag_C; |
37489 | flag_V = 0; |
37490 | flag_N = res >> 24; |
37491 | flag_NotZ = res; |
37492 | DREGu32((Opcode >> 0) & 7) = res; |
37493 | RET(8) |
37494 | } |
37495 | |
37496 | // ROLk |
37497 | OPCODE(0xE118) |
37498 | { |
37499 | u32 adr, res; |
37500 | u32 src, dst; |
37501 | |
37502 | u32 sft; |
37503 | |
37504 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37505 | m68kcontext.io_cycle_counter -= sft * 2; |
37506 | src = DREGu8((Opcode >> 0) & 7); |
37507 | flag_V = 0; |
37508 | flag_C = src << (0 + sft); |
37509 | res = (src << sft) | (src >> (8 - sft)); |
37510 | flag_N = res >> 0; |
37511 | flag_NotZ = res & 0x000000FF; |
37512 | DREGu8((Opcode >> 0) & 7) = res; |
37513 | RET(6) |
37514 | } |
37515 | |
37516 | // ROLk |
37517 | OPCODE(0xE158) |
37518 | { |
37519 | u32 adr, res; |
37520 | u32 src, dst; |
37521 | |
37522 | u32 sft; |
37523 | |
37524 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37525 | m68kcontext.io_cycle_counter -= sft * 2; |
37526 | src = DREGu16((Opcode >> 0) & 7); |
37527 | flag_V = 0; |
37528 | flag_C = src >> (8 - sft); |
37529 | res = (src << sft) | (src >> (16 - sft)); |
37530 | flag_N = res >> 8; |
37531 | flag_NotZ = res & 0x0000FFFF; |
37532 | DREGu16((Opcode >> 0) & 7) = res; |
37533 | RET(6) |
37534 | } |
37535 | |
37536 | // ROLk |
37537 | OPCODE(0xE198) |
37538 | { |
37539 | u32 adr, res; |
37540 | u32 src, dst; |
37541 | |
37542 | u32 sft; |
37543 | |
37544 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37545 | m68kcontext.io_cycle_counter -= sft * 2; |
37546 | src = DREGu32((Opcode >> 0) & 7); |
37547 | flag_V = 0; |
37548 | flag_C = src >> (24 - sft); |
37549 | res = (src << sft) | (src >> (32 - sft)); |
37550 | flag_N = res >> 24; |
37551 | flag_NotZ = res; |
37552 | DREGu32((Opcode >> 0) & 7) = res; |
37553 | RET(8) |
37554 | } |
37555 | |
37556 | // ASRD |
37557 | OPCODE(0xE020) |
37558 | { |
37559 | u32 adr, res; |
37560 | u32 src, dst; |
37561 | |
37562 | u32 sft; |
37563 | |
37564 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37565 | src = (s32)DREGs8((Opcode >> 0) & 7); |
37566 | if (sft) |
37567 | { |
37568 | m68kcontext.io_cycle_counter -= sft * 2; |
37569 | if (sft < 8) |
37570 | { |
37571 | flag_V = 0; |
37572 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37573 | res = ((s32)src) >> sft; |
37574 | flag_N = res >> 0; |
37575 | flag_NotZ = res; |
37576 | DREGu8((Opcode >> 0) & 7) = res; |
37577 | RET(6) |
37578 | } |
37579 | |
37580 | if (src & (1 << 7)) |
37581 | { |
37582 | flag_N = M68K_SR_N; |
37583 | flag_NotZ = 1; |
37584 | flag_V = 0; |
37585 | flag_C = M68K_SR_C; |
37586 | flag_X = M68K_SR_X; |
37587 | res = 0x000000FF; |
37588 | DREGu8((Opcode >> 0) & 7) = res; |
37589 | RET(6) |
37590 | } |
37591 | |
37592 | flag_N = 0; |
37593 | flag_NotZ = 0; |
37594 | flag_V = 0; |
37595 | flag_C = 0; |
37596 | flag_X = 0; |
37597 | res = 0; |
37598 | DREGu8((Opcode >> 0) & 7) = res; |
37599 | RET(6) |
37600 | } |
37601 | |
37602 | flag_V = 0; |
37603 | flag_C = 0; |
37604 | flag_N = src >> 0; |
37605 | flag_NotZ = src; |
37606 | RET(6) |
37607 | } |
37608 | |
37609 | // ASRD |
37610 | OPCODE(0xE060) |
37611 | { |
37612 | u32 adr, res; |
37613 | u32 src, dst; |
37614 | |
37615 | u32 sft; |
37616 | |
37617 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37618 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37619 | if (sft) |
37620 | { |
37621 | m68kcontext.io_cycle_counter -= sft * 2; |
37622 | if (sft < 16) |
37623 | { |
37624 | flag_V = 0; |
37625 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37626 | res = ((s32)src) >> sft; |
37627 | flag_N = res >> 8; |
37628 | flag_NotZ = res; |
37629 | DREGu16((Opcode >> 0) & 7) = res; |
37630 | RET(6) |
37631 | } |
37632 | |
37633 | if (src & (1 << 15)) |
37634 | { |
37635 | flag_N = M68K_SR_N; |
37636 | flag_NotZ = 1; |
37637 | flag_V = 0; |
37638 | flag_C = M68K_SR_C; |
37639 | flag_X = M68K_SR_X; |
37640 | res = 0x0000FFFF; |
37641 | DREGu16((Opcode >> 0) & 7) = res; |
37642 | RET(6) |
37643 | } |
37644 | |
37645 | flag_N = 0; |
37646 | flag_NotZ = 0; |
37647 | flag_V = 0; |
37648 | flag_C = 0; |
37649 | flag_X = 0; |
37650 | res = 0; |
37651 | DREGu16((Opcode >> 0) & 7) = res; |
37652 | RET(6) |
37653 | } |
37654 | |
37655 | flag_V = 0; |
37656 | flag_C = 0; |
37657 | flag_N = src >> 8; |
37658 | flag_NotZ = src; |
37659 | RET(6) |
37660 | } |
37661 | |
37662 | // ASRD |
37663 | OPCODE(0xE0A0) |
37664 | { |
37665 | #ifdef USE_CYCLONE_TIMING |
37666 | #define CYC 8 |
37667 | #else |
37668 | #define CYC 6 |
37669 | #endif |
37670 | u32 adr, res; |
37671 | u32 src, dst; |
37672 | |
37673 | u32 sft; |
37674 | |
37675 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37676 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37677 | if (sft) |
37678 | { |
37679 | m68kcontext.io_cycle_counter -= sft * 2; |
37680 | if (sft < 32) |
37681 | { |
37682 | flag_V = 0; |
37683 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37684 | res = ((s32)src) >> sft; |
37685 | flag_N = res >> 24; |
37686 | flag_NotZ = res; |
37687 | DREGu32((Opcode >> 0) & 7) = res; |
37688 | RET(CYC) |
37689 | } |
37690 | |
37691 | if (src & (1 << 31)) |
37692 | { |
37693 | flag_N = M68K_SR_N; |
37694 | flag_NotZ = 1; |
37695 | flag_V = 0; |
37696 | flag_C = M68K_SR_C; |
37697 | flag_X = M68K_SR_X; |
37698 | res = 0xFFFFFFFF; |
37699 | DREGu32((Opcode >> 0) & 7) = res; |
37700 | RET(CYC) |
37701 | } |
37702 | |
37703 | flag_N = 0; |
37704 | flag_NotZ = 0; |
37705 | flag_V = 0; |
37706 | flag_C = 0; |
37707 | flag_X = 0; |
37708 | res = 0; |
37709 | DREGu32((Opcode >> 0) & 7) = res; |
37710 | RET(CYC) |
37711 | } |
37712 | |
37713 | flag_V = 0; |
37714 | flag_C = 0; |
37715 | flag_N = src >> 24; |
37716 | flag_NotZ = src; |
37717 | RET(CYC) |
37718 | #undef CYC |
37719 | } |
37720 | |
37721 | // LSRD |
37722 | OPCODE(0xE028) |
37723 | { |
37724 | u32 adr, res; |
37725 | u32 src, dst; |
37726 | |
37727 | u32 sft; |
37728 | |
37729 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37730 | src = DREGu8((Opcode >> 0) & 7); |
37731 | if (sft) |
37732 | { |
37733 | m68kcontext.io_cycle_counter -= sft * 2; |
37734 | if (sft <= 8) |
37735 | { |
37736 | flag_N = flag_V = 0; |
37737 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37738 | res = src >> sft; |
37739 | flag_NotZ = res; |
37740 | DREGu8((Opcode >> 0) & 7) = res; |
37741 | RET(6) |
37742 | } |
37743 | |
37744 | flag_X = flag_C = 0; |
37745 | flag_N = 0; |
37746 | flag_NotZ = 0; |
37747 | flag_V = 0; |
37748 | res = 0; |
37749 | DREGu8((Opcode >> 0) & 7) = res; |
37750 | RET(6) |
37751 | } |
37752 | |
37753 | flag_V = 0; |
37754 | flag_C = 0; |
37755 | flag_N = src >> 0; |
37756 | flag_NotZ = src; |
37757 | RET(6) |
37758 | } |
37759 | |
37760 | // LSRD |
37761 | OPCODE(0xE068) |
37762 | { |
37763 | u32 adr, res; |
37764 | u32 src, dst; |
37765 | |
37766 | u32 sft; |
37767 | |
37768 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37769 | src = DREGu16((Opcode >> 0) & 7); |
37770 | if (sft) |
37771 | { |
37772 | m68kcontext.io_cycle_counter -= sft * 2; |
37773 | if (sft <= 16) |
37774 | { |
37775 | flag_N = flag_V = 0; |
37776 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37777 | res = src >> sft; |
37778 | flag_NotZ = res; |
37779 | DREGu16((Opcode >> 0) & 7) = res; |
37780 | RET(6) |
37781 | } |
37782 | |
37783 | flag_X = flag_C = 0; |
37784 | flag_N = 0; |
37785 | flag_NotZ = 0; |
37786 | flag_V = 0; |
37787 | res = 0; |
37788 | DREGu16((Opcode >> 0) & 7) = res; |
37789 | RET(6) |
37790 | } |
37791 | |
37792 | flag_V = 0; |
37793 | flag_C = 0; |
37794 | flag_N = src >> 8; |
37795 | flag_NotZ = src; |
37796 | RET(6) |
37797 | } |
37798 | |
37799 | // LSRD |
37800 | OPCODE(0xE0A8) |
37801 | { |
37802 | #ifdef USE_CYCLONE_TIMING |
37803 | #define CYC 8 |
37804 | #else |
37805 | #define CYC 6 |
37806 | #endif |
37807 | u32 adr, res; |
37808 | u32 src, dst; |
37809 | |
37810 | u32 sft; |
37811 | |
37812 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37813 | src = DREGu32((Opcode >> 0) & 7); |
37814 | if (sft) |
37815 | { |
37816 | m68kcontext.io_cycle_counter -= sft * 2; |
37817 | if (sft < 32) |
37818 | { |
37819 | flag_N = flag_V = 0; |
37820 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37821 | res = src >> sft; |
37822 | flag_NotZ = res; |
37823 | DREGu32((Opcode >> 0) & 7) = res; |
37824 | RET(CYC) |
37825 | } |
37826 | |
37827 | if (sft == 32) flag_C = src >> (31 - M68K_SR_C_SFT); |
37828 | else flag_C = 0; |
37829 | flag_X = flag_C; |
37830 | flag_N = 0; |
37831 | flag_NotZ = 0; |
37832 | flag_V = 0; |
37833 | res = 0; |
37834 | DREGu32((Opcode >> 0) & 7) = res; |
37835 | RET(CYC) |
37836 | } |
37837 | |
37838 | flag_V = 0; |
37839 | flag_C = 0; |
37840 | flag_N = src >> 24; |
37841 | flag_NotZ = src; |
37842 | RET(CYC) |
37843 | #undef CYC |
37844 | } |
37845 | |
37846 | // ROXRD |
37847 | OPCODE(0xE030) |
37848 | { |
37849 | u32 adr, res; |
37850 | u32 src, dst; |
37851 | |
37852 | u32 sft; |
37853 | |
37854 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37855 | src = DREGu8((Opcode >> 0) & 7); |
37856 | if (sft) |
37857 | { |
37858 | m68kcontext.io_cycle_counter -= sft * 2; |
37859 | sft %= 9; |
37860 | |
37861 | src |= (flag_X & M68K_SR_X) << 0; |
37862 | res = (src >> sft) | (src << (9 - sft)); |
37863 | flag_X = flag_C = res >> 0; |
37864 | flag_V = 0; |
37865 | flag_N = res >> 0; |
37866 | flag_NotZ = res & 0x000000FF; |
37867 | DREGu8((Opcode >> 0) & 7) = res; |
37868 | RET(6) |
37869 | } |
37870 | |
37871 | flag_V = 0; |
37872 | flag_C = flag_X; |
37873 | flag_N = src >> 0; |
37874 | flag_NotZ = src; |
37875 | RET(6) |
37876 | } |
37877 | |
37878 | // ROXRD |
37879 | OPCODE(0xE070) |
37880 | { |
37881 | u32 adr, res; |
37882 | u32 src, dst; |
37883 | |
37884 | u32 sft; |
37885 | |
37886 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37887 | src = DREGu16((Opcode >> 0) & 7); |
37888 | if (sft) |
37889 | { |
37890 | m68kcontext.io_cycle_counter -= sft * 2; |
37891 | sft %= 17; |
37892 | |
37893 | src |= (flag_X & M68K_SR_X) << 8; |
37894 | res = (src >> sft) | (src << (17 - sft)); |
37895 | flag_X = flag_C = res >> 8; |
37896 | flag_V = 0; |
37897 | flag_N = res >> 8; |
37898 | flag_NotZ = res & 0x0000FFFF; |
37899 | DREGu16((Opcode >> 0) & 7) = res; |
37900 | RET(6) |
37901 | } |
37902 | |
37903 | flag_V = 0; |
37904 | flag_C = flag_X; |
37905 | flag_N = src >> 8; |
37906 | flag_NotZ = src; |
37907 | RET(6) |
37908 | } |
37909 | |
37910 | // ROXRD |
37911 | OPCODE(0xE0B0) |
37912 | { |
37913 | #ifdef USE_CYCLONE_TIMING |
37914 | #define CYC 8 |
37915 | #else |
37916 | #define CYC 6 |
37917 | #endif |
37918 | u32 adr, res; |
37919 | u32 src, dst; |
37920 | |
37921 | u32 sft; |
37922 | |
37923 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37924 | src = DREGu32((Opcode >> 0) & 7); |
37925 | if (sft) |
37926 | { |
37927 | m68kcontext.io_cycle_counter -= sft * 2; |
37928 | sft %= 33; |
37929 | |
37930 | if (sft != 0) |
37931 | { |
37932 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37933 | else res = (src >> sft) | (src << (33 - sft)) | (((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))) >> (sft - 1)); |
37934 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
37935 | } |
37936 | else res = src; |
37937 | flag_C = flag_X; |
37938 | flag_V = 0; |
37939 | flag_N = res >> 24; |
37940 | flag_NotZ = res; |
37941 | DREGu32((Opcode >> 0) & 7) = res; |
37942 | RET(CYC) |
37943 | } |
37944 | |
37945 | flag_V = 0; |
37946 | flag_C = flag_X; |
37947 | flag_N = src >> 24; |
37948 | flag_NotZ = src; |
37949 | RET(CYC) |
37950 | #undef CYC |
37951 | } |
37952 | |
37953 | // RORD |
37954 | OPCODE(0xE038) |
37955 | { |
37956 | u32 adr, res; |
37957 | u32 src, dst; |
37958 | |
37959 | u32 sft; |
37960 | |
37961 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37962 | src = DREGu8((Opcode >> 0) & 7); |
37963 | if (sft) |
37964 | { |
37965 | m68kcontext.io_cycle_counter -= sft * 2; |
37966 | sft &= 0x07; |
37967 | |
37968 | flag_C = src << (M68K_SR_C_SFT - ((sft - 1) & 7)); |
37969 | res = (src >> sft) | (src << (8 - sft)); |
37970 | flag_V = 0; |
37971 | flag_N = res >> 0; |
37972 | flag_NotZ = res & 0x000000FF; |
37973 | DREGu8((Opcode >> 0) & 7) = res; |
37974 | RET(6) |
37975 | } |
37976 | |
37977 | flag_V = 0; |
37978 | flag_C = 0; |
37979 | flag_N = src >> 0; |
37980 | flag_NotZ = src; |
37981 | RET(6) |
37982 | } |
37983 | |
37984 | // RORD |
37985 | OPCODE(0xE078) |
37986 | { |
37987 | u32 adr, res; |
37988 | u32 src, dst; |
37989 | |
37990 | u32 sft; |
37991 | |
37992 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37993 | src = DREGu16((Opcode >> 0) & 7); |
37994 | if (sft) |
37995 | { |
37996 | m68kcontext.io_cycle_counter -= sft * 2; |
37997 | sft &= 0x0F; |
37998 | |
37999 | flag_C = (src >> ((sft - 1) & 15)) << M68K_SR_C_SFT; |
38000 | res = (src >> sft) | (src << (16 - sft)); |
38001 | flag_V = 0; |
38002 | flag_N = res >> 8; |
38003 | flag_NotZ = res & 0x0000FFFF; |
38004 | DREGu16((Opcode >> 0) & 7) = res; |
38005 | RET(6) |
38006 | } |
38007 | |
38008 | flag_V = 0; |
38009 | flag_C = 0; |
38010 | flag_N = src >> 8; |
38011 | flag_NotZ = src; |
38012 | RET(6) |
38013 | } |
38014 | |
38015 | // RORD |
38016 | OPCODE(0xE0B8) |
38017 | { |
38018 | #ifdef USE_CYCLONE_TIMING |
38019 | #define CYC 8 |
38020 | #else |
38021 | #define CYC 6 |
38022 | #endif |
38023 | u32 adr, res; |
38024 | u32 src, dst; |
38025 | |
38026 | u32 sft; |
38027 | |
38028 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38029 | src = DREGu32((Opcode >> 0) & 7); |
38030 | if (sft) |
38031 | { |
38032 | m68kcontext.io_cycle_counter -= sft * 2; |
38033 | sft &= 0x1F; |
38034 | |
38035 | flag_C = (src >> ((sft - 1) & 31)) << M68K_SR_C_SFT; |
38036 | res = (src >> sft) | (src << (32 - sft)); |
38037 | flag_V = 0; |
38038 | flag_N = res >> 24; |
38039 | flag_NotZ = res; |
38040 | DREGu32((Opcode >> 0) & 7) = res; |
38041 | RET(CYC) |
38042 | } |
38043 | |
38044 | flag_V = 0; |
38045 | flag_C = 0; |
38046 | flag_N = src >> 24; |
38047 | flag_NotZ = src; |
38048 | RET(CYC) |
38049 | #undef CYC |
38050 | } |
38051 | |
38052 | // ASLD |
38053 | OPCODE(0xE120) |
38054 | { |
38055 | u32 adr, res; |
38056 | u32 src, dst; |
38057 | |
38058 | u32 sft; |
38059 | |
38060 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38061 | src = DREGu8((Opcode >> 0) & 7); |
38062 | if (sft) |
38063 | { |
38064 | m68kcontext.io_cycle_counter -= sft * 2; |
38065 | if (sft < 8) |
38066 | { |
38067 | flag_X = flag_C = (src << sft) >> 0; |
38068 | res = (src << sft) & 0x000000FF; |
38069 | flag_N = res >> 0; |
38070 | flag_NotZ = res; |
38071 | DREGu8((Opcode >> 0) & 7) = res; |
38072 | flag_V = 0; |
38073 | { |
38074 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
38075 | src &= msk; |
38076 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38077 | } |
38078 | RET(6) |
38079 | } |
38080 | |
38081 | if (sft == 256) flag_C = src << M68K_SR_C_SFT; |
38082 | else flag_C = 0; |
38083 | flag_X = flag_C; |
38084 | if (src) flag_V = M68K_SR_V; |
38085 | else flag_V = 0; |
38086 | res = 0; |
38087 | DREGu8((Opcode >> 0) & 7) = res; |
38088 | flag_N = 0; |
38089 | flag_NotZ = 0; |
38090 | RET(6) |
38091 | } |
38092 | |
38093 | flag_V = 0; |
38094 | flag_C = 0; |
38095 | flag_N = src >> 0; |
38096 | flag_NotZ = src; |
38097 | RET(6) |
38098 | } |
38099 | |
38100 | // ASLD |
38101 | OPCODE(0xE160) |
38102 | { |
38103 | u32 adr, res; |
38104 | u32 src, dst; |
38105 | |
38106 | u32 sft; |
38107 | |
38108 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38109 | src = DREGu16((Opcode >> 0) & 7); |
38110 | if (sft) |
38111 | { |
38112 | m68kcontext.io_cycle_counter -= sft * 2; |
38113 | if (sft < 16) |
38114 | { |
38115 | flag_X = flag_C = (src << sft) >> 8; |
38116 | res = (src << sft) & 0x0000FFFF; |
38117 | flag_N = res >> 8; |
38118 | flag_NotZ = res; |
38119 | DREGu16((Opcode >> 0) & 7) = res; |
38120 | flag_V = 0; |
38121 | { |
38122 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
38123 | src &= msk; |
38124 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38125 | } |
38126 | RET(6) |
38127 | } |
38128 | |
38129 | if (sft == 65536) flag_C = src << M68K_SR_C_SFT; |
38130 | else flag_C = 0; |
38131 | flag_X = flag_C; |
38132 | if (src) flag_V = M68K_SR_V; |
38133 | else flag_V = 0; |
38134 | res = 0; |
38135 | DREGu16((Opcode >> 0) & 7) = res; |
38136 | flag_N = 0; |
38137 | flag_NotZ = 0; |
38138 | RET(6) |
38139 | } |
38140 | |
38141 | flag_V = 0; |
38142 | flag_C = 0; |
38143 | flag_N = src >> 8; |
38144 | flag_NotZ = src; |
38145 | RET(6) |
38146 | } |
38147 | |
38148 | // ASLD |
38149 | OPCODE(0xE1A0) |
38150 | { |
38151 | #ifdef USE_CYCLONE_TIMING |
38152 | #define CYC 8 |
38153 | #else |
38154 | #define CYC 6 |
38155 | #endif |
38156 | u32 adr, res; |
38157 | u32 src, dst; |
38158 | |
38159 | u32 sft; |
38160 | |
38161 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38162 | src = DREGu32((Opcode >> 0) & 7); |
38163 | if (sft) |
38164 | { |
38165 | m68kcontext.io_cycle_counter -= sft * 2; |
38166 | if (sft < 32) |
38167 | { |
38168 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38169 | res = src << sft; |
38170 | flag_N = res >> 24; |
38171 | flag_NotZ = res; |
38172 | DREGu32((Opcode >> 0) & 7) = res; |
38173 | flag_V = 0; |
38174 | { |
38175 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
38176 | src &= msk; |
38177 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38178 | } |
38179 | RET(CYC) |
38180 | } |
38181 | |
38182 | if (sft == 0) flag_C = src << M68K_SR_C_SFT; |
38183 | else flag_C = 0; |
38184 | flag_X = flag_C; |
38185 | if (src) flag_V = M68K_SR_V; |
38186 | else flag_V = 0; |
38187 | res = 0; |
38188 | DREGu32((Opcode >> 0) & 7) = res; |
38189 | flag_N = 0; |
38190 | flag_NotZ = 0; |
38191 | RET(CYC) |
38192 | } |
38193 | |
38194 | flag_V = 0; |
38195 | flag_C = 0; |
38196 | flag_N = src >> 24; |
38197 | flag_NotZ = src; |
38198 | RET(CYC) |
38199 | #undef CYC |
38200 | } |
38201 | |
38202 | // LSLD |
38203 | OPCODE(0xE128) |
38204 | { |
38205 | u32 adr, res; |
38206 | u32 src, dst; |
38207 | |
38208 | u32 sft; |
38209 | |
38210 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38211 | src = DREGu8((Opcode >> 0) & 7); |
38212 | if (sft) |
38213 | { |
38214 | m68kcontext.io_cycle_counter -= sft * 2; |
38215 | if (sft <= 8) |
38216 | { |
38217 | flag_X = flag_C = (src << sft) >> 0; |
38218 | res = (src << sft) & 0x000000FF; |
38219 | flag_V = 0; |
38220 | flag_N = res >> 0; |
38221 | flag_NotZ = res; |
38222 | DREGu8((Opcode >> 0) & 7) = res; |
38223 | RET(6) |
38224 | } |
38225 | |
38226 | flag_X = flag_C = 0; |
38227 | flag_N = 0; |
38228 | flag_NotZ = 0; |
38229 | flag_V = 0; |
38230 | res = 0; |
38231 | DREGu8((Opcode >> 0) & 7) = res; |
38232 | RET(6) |
38233 | } |
38234 | |
38235 | flag_V = 0; |
38236 | flag_C = 0; |
38237 | flag_N = src >> 0; |
38238 | flag_NotZ = src; |
38239 | RET(6) |
38240 | } |
38241 | |
38242 | // LSLD |
38243 | OPCODE(0xE168) |
38244 | { |
38245 | u32 adr, res; |
38246 | u32 src, dst; |
38247 | |
38248 | u32 sft; |
38249 | |
38250 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38251 | src = DREGu16((Opcode >> 0) & 7); |
38252 | if (sft) |
38253 | { |
38254 | m68kcontext.io_cycle_counter -= sft * 2; |
38255 | if (sft <= 16) |
38256 | { |
38257 | flag_X = flag_C = (src << sft) >> 8; |
38258 | res = (src << sft) & 0x0000FFFF; |
38259 | flag_V = 0; |
38260 | flag_N = res >> 8; |
38261 | flag_NotZ = res; |
38262 | DREGu16((Opcode >> 0) & 7) = res; |
38263 | RET(6) |
38264 | } |
38265 | |
38266 | flag_X = flag_C = 0; |
38267 | flag_N = 0; |
38268 | flag_NotZ = 0; |
38269 | flag_V = 0; |
38270 | res = 0; |
38271 | DREGu16((Opcode >> 0) & 7) = res; |
38272 | RET(6) |
38273 | } |
38274 | |
38275 | flag_V = 0; |
38276 | flag_C = 0; |
38277 | flag_N = src >> 8; |
38278 | flag_NotZ = src; |
38279 | RET(6) |
38280 | } |
38281 | |
38282 | // LSLD |
38283 | OPCODE(0xE1A8) |
38284 | { |
38285 | #ifdef USE_CYCLONE_TIMING |
38286 | #define CYC 8 |
38287 | #else |
38288 | #define CYC 6 |
38289 | #endif |
38290 | u32 adr, res; |
38291 | u32 src, dst; |
38292 | |
38293 | u32 sft; |
38294 | |
38295 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38296 | src = DREGu32((Opcode >> 0) & 7); |
38297 | if (sft) |
38298 | { |
38299 | m68kcontext.io_cycle_counter -= sft * 2; |
38300 | if (sft < 32) |
38301 | { |
38302 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38303 | res = src << sft; |
38304 | flag_V = 0; |
38305 | flag_N = res >> 24; |
38306 | flag_NotZ = res; |
38307 | DREGu32((Opcode >> 0) & 7) = res; |
38308 | RET(CYC) |
38309 | } |
38310 | |
38311 | if (sft == 32) flag_C = src << M68K_SR_C_SFT; |
38312 | else flag_C = 0; |
38313 | flag_X = flag_C; |
38314 | flag_N = 0; |
38315 | flag_NotZ = 0; |
38316 | flag_V = 0; |
38317 | res = 0; |
38318 | DREGu32((Opcode >> 0) & 7) = res; |
38319 | RET(CYC) |
38320 | } |
38321 | |
38322 | flag_V = 0; |
38323 | flag_C = 0; |
38324 | flag_N = src >> 24; |
38325 | flag_NotZ = src; |
38326 | RET(CYC) |
38327 | #undef CYC |
38328 | } |
38329 | |
38330 | // ROXLD |
38331 | OPCODE(0xE130) |
38332 | { |
38333 | u32 adr, res; |
38334 | u32 src, dst; |
38335 | |
38336 | u32 sft; |
38337 | |
38338 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38339 | src = DREGu8((Opcode >> 0) & 7); |
38340 | if (sft) |
38341 | { |
38342 | m68kcontext.io_cycle_counter -= sft * 2; |
38343 | sft %= 9; |
38344 | |
38345 | src |= (flag_X & M68K_SR_X) << 0; |
38346 | res = (src << sft) | (src >> (9 - sft)); |
38347 | flag_X = flag_C = res >> 0; |
38348 | flag_V = 0; |
38349 | flag_N = res >> 0; |
38350 | flag_NotZ = res & 0x000000FF; |
38351 | DREGu8((Opcode >> 0) & 7) = res; |
38352 | RET(6) |
38353 | } |
38354 | |
38355 | flag_V = 0; |
38356 | flag_C = flag_X; |
38357 | flag_N = src >> 0; |
38358 | flag_NotZ = src; |
38359 | RET(6) |
38360 | } |
38361 | |
38362 | // ROXLD |
38363 | OPCODE(0xE170) |
38364 | { |
38365 | u32 adr, res; |
38366 | u32 src, dst; |
38367 | |
38368 | u32 sft; |
38369 | |
38370 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38371 | src = DREGu16((Opcode >> 0) & 7); |
38372 | if (sft) |
38373 | { |
38374 | m68kcontext.io_cycle_counter -= sft * 2; |
38375 | sft %= 17; |
38376 | |
38377 | src |= (flag_X & M68K_SR_X) << 8; |
38378 | res = (src << sft) | (src >> (17 - sft)); |
38379 | flag_X = flag_C = res >> 8; |
38380 | flag_V = 0; |
38381 | flag_N = res >> 8; |
38382 | flag_NotZ = res & 0x0000FFFF; |
38383 | DREGu16((Opcode >> 0) & 7) = res; |
38384 | RET(6) |
38385 | } |
38386 | |
38387 | flag_V = 0; |
38388 | flag_C = flag_X; |
38389 | flag_N = src >> 8; |
38390 | flag_NotZ = src; |
38391 | RET(6) |
38392 | } |
38393 | |
38394 | // ROXLD |
38395 | OPCODE(0xE1B0) |
38396 | { |
38397 | #ifdef USE_CYCLONE_TIMING |
38398 | #define CYC 8 |
38399 | #else |
38400 | #define CYC 6 |
38401 | #endif |
38402 | u32 adr, res; |
38403 | u32 src, dst; |
38404 | |
38405 | u32 sft; |
38406 | |
38407 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38408 | src = DREGu32((Opcode >> 0) & 7); |
38409 | if (sft) |
38410 | { |
38411 | m68kcontext.io_cycle_counter -= sft * 2; |
38412 | sft %= 33; |
38413 | |
38414 | if (sft != 0) |
38415 | { |
38416 | if (sft == 1) res = (src << 1) | ((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1); |
38417 | else res = (src << sft) | (src >> (33 - sft)) | (((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1) << (sft - 1)); |
38418 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
38419 | } |
38420 | else res = src; |
38421 | flag_C = flag_X; |
38422 | flag_V = 0; |
38423 | flag_N = res >> 24; |
38424 | flag_NotZ = res; |
38425 | DREGu32((Opcode >> 0) & 7) = res; |
38426 | RET(CYC) |
38427 | } |
38428 | |
38429 | flag_V = 0; |
38430 | flag_C = flag_X; |
38431 | flag_N = src >> 24; |
38432 | flag_NotZ = src; |
38433 | RET(CYC) |
38434 | #undef CYC |
38435 | } |
38436 | |
38437 | // ROLD |
38438 | OPCODE(0xE138) |
38439 | { |
38440 | u32 adr, res; |
38441 | u32 src, dst; |
38442 | |
38443 | u32 sft; |
38444 | |
38445 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38446 | src = DREGu8((Opcode >> 0) & 7); |
38447 | if (sft) |
38448 | { |
38449 | m68kcontext.io_cycle_counter -= sft * 2; |
38450 | if (sft &= 0x07) |
38451 | { |
38452 | flag_C = (src << sft) >> 0; |
38453 | res = ((src << sft) | (src >> (8 - sft))) & 0x000000FF; |
38454 | flag_V = 0; |
38455 | flag_N = res >> 0; |
38456 | flag_NotZ = res; |
38457 | DREGu8((Opcode >> 0) & 7) = res; |
38458 | RET(6) |
38459 | } |
38460 | |
38461 | flag_V = 0; |
38462 | flag_C = src << M68K_SR_C_SFT; |
38463 | flag_N = src >> 0; |
38464 | flag_NotZ = src; |
38465 | RET(6) |
38466 | } |
38467 | |
38468 | flag_V = 0; |
38469 | flag_C = 0; |
38470 | flag_N = src >> 0; |
38471 | flag_NotZ = src; |
38472 | RET(6) |
38473 | } |
38474 | |
38475 | // ROLD |
38476 | OPCODE(0xE178) |
38477 | { |
38478 | u32 adr, res; |
38479 | u32 src, dst; |
38480 | |
38481 | u32 sft; |
38482 | |
38483 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38484 | src = DREGu16((Opcode >> 0) & 7); |
38485 | if (sft) |
38486 | { |
38487 | m68kcontext.io_cycle_counter -= sft * 2; |
38488 | if (sft &= 0x0F) |
38489 | { |
38490 | flag_C = (src << sft) >> 8; |
38491 | res = ((src << sft) | (src >> (16 - sft))) & 0x0000FFFF; |
38492 | flag_V = 0; |
38493 | flag_N = res >> 8; |
38494 | flag_NotZ = res; |
38495 | DREGu16((Opcode >> 0) & 7) = res; |
38496 | RET(6) |
38497 | } |
38498 | |
38499 | flag_V = 0; |
38500 | flag_C = src << M68K_SR_C_SFT; |
38501 | flag_N = src >> 8; |
38502 | flag_NotZ = src; |
38503 | RET(6) |
38504 | } |
38505 | |
38506 | flag_V = 0; |
38507 | flag_C = 0; |
38508 | flag_N = src >> 8; |
38509 | flag_NotZ = src; |
38510 | RET(6) |
38511 | } |
38512 | |
38513 | // ROLD |
38514 | OPCODE(0xE1B8) |
38515 | { |
38516 | #ifdef USE_CYCLONE_TIMING |
38517 | #define CYC 8 |
38518 | #else |
38519 | #define CYC 6 |
38520 | #endif |
38521 | u32 adr, res; |
38522 | u32 src, dst; |
38523 | |
38524 | u32 sft; |
38525 | |
38526 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38527 | src = DREGu32((Opcode >> 0) & 7); |
38528 | if (sft) |
38529 | { |
38530 | m68kcontext.io_cycle_counter -= sft * 2; |
38531 | if (sft &= 0x1F) |
38532 | { |
38533 | flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38534 | res = (src << sft) | (src >> (32 - sft)); |
38535 | flag_V = 0; |
38536 | flag_N = res >> 24; |
38537 | flag_NotZ = res; |
38538 | DREGu32((Opcode >> 0) & 7) = res; |
38539 | RET(CYC) |
38540 | } |
38541 | |
38542 | flag_V = 0; |
38543 | flag_C = src << M68K_SR_C_SFT; |
38544 | flag_N = src >> 24; |
38545 | flag_NotZ = src; |
38546 | RET(CYC) |
38547 | } |
38548 | |
38549 | flag_V = 0; |
38550 | flag_C = 0; |
38551 | flag_N = src >> 24; |
38552 | flag_NotZ = src; |
38553 | RET(CYC) |
38554 | #undef CYC |
38555 | } |
38556 | |
38557 | // ASR |
38558 | OPCODE(0xE0D0) |
38559 | { |
38560 | u32 adr, res; |
38561 | u32 src, dst; |
38562 | |
38563 | adr = AREG((Opcode >> 0) & 7); |
38564 | PRE_IO |
38565 | READ_WORD_F(adr, src) |
38566 | flag_V = 0; |
38567 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38568 | res = (src >> 1) | (src & (1 << 15)); |
38569 | flag_N = res >> 8; |
38570 | flag_NotZ = res; |
38571 | WRITE_WORD_F(adr, res) |
38572 | POST_IO |
38573 | RET(12) |
38574 | } |
38575 | |
38576 | // ASR |
38577 | OPCODE(0xE0D8) |
38578 | { |
38579 | u32 adr, res; |
38580 | u32 src, dst; |
38581 | |
38582 | adr = AREG((Opcode >> 0) & 7); |
38583 | AREG((Opcode >> 0) & 7) += 2; |
38584 | PRE_IO |
38585 | READ_WORD_F(adr, src) |
38586 | flag_V = 0; |
38587 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38588 | res = (src >> 1) | (src & (1 << 15)); |
38589 | flag_N = res >> 8; |
38590 | flag_NotZ = res; |
38591 | WRITE_WORD_F(adr, res) |
38592 | POST_IO |
38593 | RET(12) |
38594 | } |
38595 | |
38596 | // ASR |
38597 | OPCODE(0xE0E0) |
38598 | { |
38599 | u32 adr, res; |
38600 | u32 src, dst; |
38601 | |
38602 | adr = AREG((Opcode >> 0) & 7) - 2; |
38603 | AREG((Opcode >> 0) & 7) = adr; |
38604 | PRE_IO |
38605 | READ_WORD_F(adr, src) |
38606 | flag_V = 0; |
38607 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38608 | res = (src >> 1) | (src & (1 << 15)); |
38609 | flag_N = res >> 8; |
38610 | flag_NotZ = res; |
38611 | WRITE_WORD_F(adr, res) |
38612 | POST_IO |
38613 | RET(14) |
38614 | } |
38615 | |
38616 | // ASR |
38617 | OPCODE(0xE0E8) |
38618 | { |
38619 | u32 adr, res; |
38620 | u32 src, dst; |
38621 | |
38622 | FETCH_SWORD(adr); |
38623 | adr += AREG((Opcode >> 0) & 7); |
38624 | PRE_IO |
38625 | READ_WORD_F(adr, src) |
38626 | flag_V = 0; |
38627 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38628 | res = (src >> 1) | (src & (1 << 15)); |
38629 | flag_N = res >> 8; |
38630 | flag_NotZ = res; |
38631 | WRITE_WORD_F(adr, res) |
38632 | POST_IO |
38633 | RET(16) |
38634 | } |
38635 | |
38636 | // ASR |
38637 | OPCODE(0xE0F0) |
38638 | { |
38639 | u32 adr, res; |
38640 | u32 src, dst; |
38641 | |
38642 | adr = AREG((Opcode >> 0) & 7); |
38643 | DECODE_EXT_WORD |
38644 | PRE_IO |
38645 | READ_WORD_F(adr, src) |
38646 | flag_V = 0; |
38647 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38648 | res = (src >> 1) | (src & (1 << 15)); |
38649 | flag_N = res >> 8; |
38650 | flag_NotZ = res; |
38651 | WRITE_WORD_F(adr, res) |
38652 | POST_IO |
38653 | RET(18) |
38654 | } |
38655 | |
38656 | // ASR |
38657 | OPCODE(0xE0F8) |
38658 | { |
38659 | u32 adr, res; |
38660 | u32 src, dst; |
38661 | |
38662 | FETCH_SWORD(adr); |
38663 | PRE_IO |
38664 | READ_WORD_F(adr, src) |
38665 | flag_V = 0; |
38666 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38667 | res = (src >> 1) | (src & (1 << 15)); |
38668 | flag_N = res >> 8; |
38669 | flag_NotZ = res; |
38670 | WRITE_WORD_F(adr, res) |
38671 | POST_IO |
38672 | RET(16) |
38673 | } |
38674 | |
38675 | // ASR |
38676 | OPCODE(0xE0F9) |
38677 | { |
38678 | u32 adr, res; |
38679 | u32 src, dst; |
38680 | |
38681 | FETCH_LONG(adr); |
38682 | PRE_IO |
38683 | READ_WORD_F(adr, src) |
38684 | flag_V = 0; |
38685 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38686 | res = (src >> 1) | (src & (1 << 15)); |
38687 | flag_N = res >> 8; |
38688 | flag_NotZ = res; |
38689 | WRITE_WORD_F(adr, res) |
38690 | POST_IO |
38691 | RET(20) |
38692 | } |
38693 | |
38694 | // ASR |
38695 | OPCODE(0xE0DF) |
38696 | { |
38697 | u32 adr, res; |
38698 | u32 src, dst; |
38699 | |
38700 | adr = AREG(7); |
38701 | AREG(7) += 2; |
38702 | PRE_IO |
38703 | READ_WORD_F(adr, src) |
38704 | flag_V = 0; |
38705 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38706 | res = (src >> 1) | (src & (1 << 15)); |
38707 | flag_N = res >> 8; |
38708 | flag_NotZ = res; |
38709 | WRITE_WORD_F(adr, res) |
38710 | POST_IO |
38711 | RET(12) |
38712 | } |
38713 | |
38714 | // ASR |
38715 | OPCODE(0xE0E7) |
38716 | { |
38717 | u32 adr, res; |
38718 | u32 src, dst; |
38719 | |
38720 | adr = AREG(7) - 2; |
38721 | AREG(7) = adr; |
38722 | PRE_IO |
38723 | READ_WORD_F(adr, src) |
38724 | flag_V = 0; |
38725 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38726 | res = (src >> 1) | (src & (1 << 15)); |
38727 | flag_N = res >> 8; |
38728 | flag_NotZ = res; |
38729 | WRITE_WORD_F(adr, res) |
38730 | POST_IO |
38731 | RET(14) |
38732 | } |
38733 | |
38734 | // LSR |
38735 | OPCODE(0xE2D0) |
38736 | { |
38737 | u32 adr, res; |
38738 | u32 src, dst; |
38739 | |
38740 | adr = AREG((Opcode >> 0) & 7); |
38741 | PRE_IO |
38742 | READ_WORD_F(adr, src) |
38743 | flag_N = flag_V = 0; |
38744 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38745 | res = src >> 1; |
38746 | flag_NotZ = res; |
38747 | WRITE_WORD_F(adr, res) |
38748 | POST_IO |
38749 | RET(12) |
38750 | } |
38751 | |
38752 | // LSR |
38753 | OPCODE(0xE2D8) |
38754 | { |
38755 | u32 adr, res; |
38756 | u32 src, dst; |
38757 | |
38758 | adr = AREG((Opcode >> 0) & 7); |
38759 | AREG((Opcode >> 0) & 7) += 2; |
38760 | PRE_IO |
38761 | READ_WORD_F(adr, src) |
38762 | flag_N = flag_V = 0; |
38763 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38764 | res = src >> 1; |
38765 | flag_NotZ = res; |
38766 | WRITE_WORD_F(adr, res) |
38767 | POST_IO |
38768 | RET(12) |
38769 | } |
38770 | |
38771 | // LSR |
38772 | OPCODE(0xE2E0) |
38773 | { |
38774 | u32 adr, res; |
38775 | u32 src, dst; |
38776 | |
38777 | adr = AREG((Opcode >> 0) & 7) - 2; |
38778 | AREG((Opcode >> 0) & 7) = adr; |
38779 | PRE_IO |
38780 | READ_WORD_F(adr, src) |
38781 | flag_N = flag_V = 0; |
38782 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38783 | res = src >> 1; |
38784 | flag_NotZ = res; |
38785 | WRITE_WORD_F(adr, res) |
38786 | POST_IO |
38787 | RET(14) |
38788 | } |
38789 | |
38790 | // LSR |
38791 | OPCODE(0xE2E8) |
38792 | { |
38793 | u32 adr, res; |
38794 | u32 src, dst; |
38795 | |
38796 | FETCH_SWORD(adr); |
38797 | adr += AREG((Opcode >> 0) & 7); |
38798 | PRE_IO |
38799 | READ_WORD_F(adr, src) |
38800 | flag_N = flag_V = 0; |
38801 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38802 | res = src >> 1; |
38803 | flag_NotZ = res; |
38804 | WRITE_WORD_F(adr, res) |
38805 | POST_IO |
38806 | RET(16) |
38807 | } |
38808 | |
38809 | // LSR |
38810 | OPCODE(0xE2F0) |
38811 | { |
38812 | u32 adr, res; |
38813 | u32 src, dst; |
38814 | |
38815 | adr = AREG((Opcode >> 0) & 7); |
38816 | DECODE_EXT_WORD |
38817 | PRE_IO |
38818 | READ_WORD_F(adr, src) |
38819 | flag_N = flag_V = 0; |
38820 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38821 | res = src >> 1; |
38822 | flag_NotZ = res; |
38823 | WRITE_WORD_F(adr, res) |
38824 | POST_IO |
38825 | RET(18) |
38826 | } |
38827 | |
38828 | // LSR |
38829 | OPCODE(0xE2F8) |
38830 | { |
38831 | u32 adr, res; |
38832 | u32 src, dst; |
38833 | |
38834 | FETCH_SWORD(adr); |
38835 | PRE_IO |
38836 | READ_WORD_F(adr, src) |
38837 | flag_N = flag_V = 0; |
38838 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38839 | res = src >> 1; |
38840 | flag_NotZ = res; |
38841 | WRITE_WORD_F(adr, res) |
38842 | POST_IO |
38843 | RET(16) |
38844 | } |
38845 | |
38846 | // LSR |
38847 | OPCODE(0xE2F9) |
38848 | { |
38849 | u32 adr, res; |
38850 | u32 src, dst; |
38851 | |
38852 | FETCH_LONG(adr); |
38853 | PRE_IO |
38854 | READ_WORD_F(adr, src) |
38855 | flag_N = flag_V = 0; |
38856 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38857 | res = src >> 1; |
38858 | flag_NotZ = res; |
38859 | WRITE_WORD_F(adr, res) |
38860 | POST_IO |
38861 | RET(20) |
38862 | } |
38863 | |
38864 | // LSR |
38865 | OPCODE(0xE2DF) |
38866 | { |
38867 | u32 adr, res; |
38868 | u32 src, dst; |
38869 | |
38870 | adr = AREG(7); |
38871 | AREG(7) += 2; |
38872 | PRE_IO |
38873 | READ_WORD_F(adr, src) |
38874 | flag_N = flag_V = 0; |
38875 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38876 | res = src >> 1; |
38877 | flag_NotZ = res; |
38878 | WRITE_WORD_F(adr, res) |
38879 | POST_IO |
38880 | RET(12) |
38881 | } |
38882 | |
38883 | // LSR |
38884 | OPCODE(0xE2E7) |
38885 | { |
38886 | u32 adr, res; |
38887 | u32 src, dst; |
38888 | |
38889 | adr = AREG(7) - 2; |
38890 | AREG(7) = adr; |
38891 | PRE_IO |
38892 | READ_WORD_F(adr, src) |
38893 | flag_N = flag_V = 0; |
38894 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38895 | res = src >> 1; |
38896 | flag_NotZ = res; |
38897 | WRITE_WORD_F(adr, res) |
38898 | POST_IO |
38899 | RET(14) |
38900 | } |
38901 | |
38902 | // ROXR |
38903 | OPCODE(0xE4D0) |
38904 | { |
38905 | u32 adr, res; |
38906 | u32 src, dst; |
38907 | |
38908 | adr = AREG((Opcode >> 0) & 7); |
38909 | PRE_IO |
38910 | READ_WORD_F(adr, src) |
38911 | flag_V = 0; |
38912 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38913 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38914 | flag_N = res >> 8; |
38915 | flag_NotZ = res; |
38916 | WRITE_WORD_F(adr, res) |
38917 | POST_IO |
38918 | RET(12) |
38919 | } |
38920 | |
38921 | // ROXR |
38922 | OPCODE(0xE4D8) |
38923 | { |
38924 | u32 adr, res; |
38925 | u32 src, dst; |
38926 | |
38927 | adr = AREG((Opcode >> 0) & 7); |
38928 | AREG((Opcode >> 0) & 7) += 2; |
38929 | PRE_IO |
38930 | READ_WORD_F(adr, src) |
38931 | flag_V = 0; |
38932 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38933 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38934 | flag_N = res >> 8; |
38935 | flag_NotZ = res; |
38936 | WRITE_WORD_F(adr, res) |
38937 | POST_IO |
38938 | RET(12) |
38939 | } |
38940 | |
38941 | // ROXR |
38942 | OPCODE(0xE4E0) |
38943 | { |
38944 | u32 adr, res; |
38945 | u32 src, dst; |
38946 | |
38947 | adr = AREG((Opcode >> 0) & 7) - 2; |
38948 | AREG((Opcode >> 0) & 7) = adr; |
38949 | PRE_IO |
38950 | READ_WORD_F(adr, src) |
38951 | flag_V = 0; |
38952 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38953 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38954 | flag_N = res >> 8; |
38955 | flag_NotZ = res; |
38956 | WRITE_WORD_F(adr, res) |
38957 | POST_IO |
38958 | RET(14) |
38959 | } |
38960 | |
38961 | // ROXR |
38962 | OPCODE(0xE4E8) |
38963 | { |
38964 | u32 adr, res; |
38965 | u32 src, dst; |
38966 | |
38967 | FETCH_SWORD(adr); |
38968 | adr += AREG((Opcode >> 0) & 7); |
38969 | PRE_IO |
38970 | READ_WORD_F(adr, src) |
38971 | flag_V = 0; |
38972 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38973 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38974 | flag_N = res >> 8; |
38975 | flag_NotZ = res; |
38976 | WRITE_WORD_F(adr, res) |
38977 | POST_IO |
38978 | RET(16) |
38979 | } |
38980 | |
38981 | // ROXR |
38982 | OPCODE(0xE4F0) |
38983 | { |
38984 | u32 adr, res; |
38985 | u32 src, dst; |
38986 | |
38987 | adr = AREG((Opcode >> 0) & 7); |
38988 | DECODE_EXT_WORD |
38989 | PRE_IO |
38990 | READ_WORD_F(adr, src) |
38991 | flag_V = 0; |
38992 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38993 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38994 | flag_N = res >> 8; |
38995 | flag_NotZ = res; |
38996 | WRITE_WORD_F(adr, res) |
38997 | POST_IO |
38998 | RET(18) |
38999 | } |
39000 | |
39001 | // ROXR |
39002 | OPCODE(0xE4F8) |
39003 | { |
39004 | u32 adr, res; |
39005 | u32 src, dst; |
39006 | |
39007 | FETCH_SWORD(adr); |
39008 | PRE_IO |
39009 | READ_WORD_F(adr, src) |
39010 | flag_V = 0; |
39011 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39012 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39013 | flag_N = res >> 8; |
39014 | flag_NotZ = res; |
39015 | WRITE_WORD_F(adr, res) |
39016 | POST_IO |
39017 | RET(16) |
39018 | } |
39019 | |
39020 | // ROXR |
39021 | OPCODE(0xE4F9) |
39022 | { |
39023 | u32 adr, res; |
39024 | u32 src, dst; |
39025 | |
39026 | FETCH_LONG(adr); |
39027 | PRE_IO |
39028 | READ_WORD_F(adr, src) |
39029 | flag_V = 0; |
39030 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39031 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39032 | flag_N = res >> 8; |
39033 | flag_NotZ = res; |
39034 | WRITE_WORD_F(adr, res) |
39035 | POST_IO |
39036 | RET(20) |
39037 | } |
39038 | |
39039 | // ROXR |
39040 | OPCODE(0xE4DF) |
39041 | { |
39042 | u32 adr, res; |
39043 | u32 src, dst; |
39044 | |
39045 | adr = AREG(7); |
39046 | AREG(7) += 2; |
39047 | PRE_IO |
39048 | READ_WORD_F(adr, src) |
39049 | flag_V = 0; |
39050 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39051 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39052 | flag_N = res >> 8; |
39053 | flag_NotZ = res; |
39054 | WRITE_WORD_F(adr, res) |
39055 | POST_IO |
39056 | RET(12) |
39057 | } |
39058 | |
39059 | // ROXR |
39060 | OPCODE(0xE4E7) |
39061 | { |
39062 | u32 adr, res; |
39063 | u32 src, dst; |
39064 | |
39065 | adr = AREG(7) - 2; |
39066 | AREG(7) = adr; |
39067 | PRE_IO |
39068 | READ_WORD_F(adr, src) |
39069 | flag_V = 0; |
39070 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39071 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39072 | flag_N = res >> 8; |
39073 | flag_NotZ = res; |
39074 | WRITE_WORD_F(adr, res) |
39075 | POST_IO |
39076 | RET(14) |
39077 | } |
39078 | |
39079 | // ROR |
39080 | OPCODE(0xE6D0) |
39081 | { |
39082 | u32 adr, res; |
39083 | u32 src, dst; |
39084 | |
39085 | adr = AREG((Opcode >> 0) & 7); |
39086 | PRE_IO |
39087 | READ_WORD_F(adr, src) |
39088 | flag_V = 0; |
39089 | flag_C = src << M68K_SR_C_SFT; |
39090 | res = (src >> 1) | (src << 15); |
39091 | flag_N = res >> 8; |
39092 | flag_NotZ = res & 0x0000FFFF; |
39093 | WRITE_WORD_F(adr, res) |
39094 | POST_IO |
39095 | RET(12) |
39096 | } |
39097 | |
39098 | // ROR |
39099 | OPCODE(0xE6D8) |
39100 | { |
39101 | u32 adr, res; |
39102 | u32 src, dst; |
39103 | |
39104 | adr = AREG((Opcode >> 0) & 7); |
39105 | AREG((Opcode >> 0) & 7) += 2; |
39106 | PRE_IO |
39107 | READ_WORD_F(adr, src) |
39108 | flag_V = 0; |
39109 | flag_C = src << M68K_SR_C_SFT; |
39110 | res = (src >> 1) | (src << 15); |
39111 | flag_N = res >> 8; |
39112 | flag_NotZ = res & 0x0000FFFF; |
39113 | WRITE_WORD_F(adr, res) |
39114 | POST_IO |
39115 | RET(12) |
39116 | } |
39117 | |
39118 | // ROR |
39119 | OPCODE(0xE6E0) |
39120 | { |
39121 | u32 adr, res; |
39122 | u32 src, dst; |
39123 | |
39124 | adr = AREG((Opcode >> 0) & 7) - 2; |
39125 | AREG((Opcode >> 0) & 7) = adr; |
39126 | PRE_IO |
39127 | READ_WORD_F(adr, src) |
39128 | flag_V = 0; |
39129 | flag_C = src << M68K_SR_C_SFT; |
39130 | res = (src >> 1) | (src << 15); |
39131 | flag_N = res >> 8; |
39132 | flag_NotZ = res & 0x0000FFFF; |
39133 | WRITE_WORD_F(adr, res) |
39134 | POST_IO |
39135 | RET(14) |
39136 | } |
39137 | |
39138 | // ROR |
39139 | OPCODE(0xE6E8) |
39140 | { |
39141 | u32 adr, res; |
39142 | u32 src, dst; |
39143 | |
39144 | FETCH_SWORD(adr); |
39145 | adr += AREG((Opcode >> 0) & 7); |
39146 | PRE_IO |
39147 | READ_WORD_F(adr, src) |
39148 | flag_V = 0; |
39149 | flag_C = src << M68K_SR_C_SFT; |
39150 | res = (src >> 1) | (src << 15); |
39151 | flag_N = res >> 8; |
39152 | flag_NotZ = res & 0x0000FFFF; |
39153 | WRITE_WORD_F(adr, res) |
39154 | POST_IO |
39155 | RET(16) |
39156 | } |
39157 | |
39158 | // ROR |
39159 | OPCODE(0xE6F0) |
39160 | { |
39161 | u32 adr, res; |
39162 | u32 src, dst; |
39163 | |
39164 | adr = AREG((Opcode >> 0) & 7); |
39165 | DECODE_EXT_WORD |
39166 | PRE_IO |
39167 | READ_WORD_F(adr, src) |
39168 | flag_V = 0; |
39169 | flag_C = src << M68K_SR_C_SFT; |
39170 | res = (src >> 1) | (src << 15); |
39171 | flag_N = res >> 8; |
39172 | flag_NotZ = res & 0x0000FFFF; |
39173 | WRITE_WORD_F(adr, res) |
39174 | POST_IO |
39175 | RET(18) |
39176 | } |
39177 | |
39178 | // ROR |
39179 | OPCODE(0xE6F8) |
39180 | { |
39181 | u32 adr, res; |
39182 | u32 src, dst; |
39183 | |
39184 | FETCH_SWORD(adr); |
39185 | PRE_IO |
39186 | READ_WORD_F(adr, src) |
39187 | flag_V = 0; |
39188 | flag_C = src << M68K_SR_C_SFT; |
39189 | res = (src >> 1) | (src << 15); |
39190 | flag_N = res >> 8; |
39191 | flag_NotZ = res & 0x0000FFFF; |
39192 | WRITE_WORD_F(adr, res) |
39193 | POST_IO |
39194 | RET(16) |
39195 | } |
39196 | |
39197 | // ROR |
39198 | OPCODE(0xE6F9) |
39199 | { |
39200 | u32 adr, res; |
39201 | u32 src, dst; |
39202 | |
39203 | FETCH_LONG(adr); |
39204 | PRE_IO |
39205 | READ_WORD_F(adr, src) |
39206 | flag_V = 0; |
39207 | flag_C = src << M68K_SR_C_SFT; |
39208 | res = (src >> 1) | (src << 15); |
39209 | flag_N = res >> 8; |
39210 | flag_NotZ = res & 0x0000FFFF; |
39211 | WRITE_WORD_F(adr, res) |
39212 | POST_IO |
39213 | RET(20) |
39214 | } |
39215 | |
39216 | // ROR |
39217 | OPCODE(0xE6DF) |
39218 | { |
39219 | u32 adr, res; |
39220 | u32 src, dst; |
39221 | |
39222 | adr = AREG(7); |
39223 | AREG(7) += 2; |
39224 | PRE_IO |
39225 | READ_WORD_F(adr, src) |
39226 | flag_V = 0; |
39227 | flag_C = src << M68K_SR_C_SFT; |
39228 | res = (src >> 1) | (src << 15); |
39229 | flag_N = res >> 8; |
39230 | flag_NotZ = res & 0x0000FFFF; |
39231 | WRITE_WORD_F(adr, res) |
39232 | POST_IO |
39233 | RET(12) |
39234 | } |
39235 | |
39236 | // ROR |
39237 | OPCODE(0xE6E7) |
39238 | { |
39239 | u32 adr, res; |
39240 | u32 src, dst; |
39241 | |
39242 | adr = AREG(7) - 2; |
39243 | AREG(7) = adr; |
39244 | PRE_IO |
39245 | READ_WORD_F(adr, src) |
39246 | flag_V = 0; |
39247 | flag_C = src << M68K_SR_C_SFT; |
39248 | res = (src >> 1) | (src << 15); |
39249 | flag_N = res >> 8; |
39250 | flag_NotZ = res & 0x0000FFFF; |
39251 | WRITE_WORD_F(adr, res) |
39252 | POST_IO |
39253 | RET(14) |
39254 | } |
39255 | |
39256 | // ASL |
39257 | OPCODE(0xE1D0) |
39258 | { |
39259 | u32 adr, res; |
39260 | u32 src, dst; |
39261 | |
39262 | adr = AREG((Opcode >> 0) & 7); |
39263 | PRE_IO |
39264 | READ_WORD_F(adr, src) |
39265 | flag_X = flag_C = src >> 7; |
39266 | res = src << 1; |
39267 | flag_V = (src ^ res) >> 8; |
39268 | flag_N = res >> 8; |
39269 | flag_NotZ = res & 0x0000FFFF; |
39270 | WRITE_WORD_F(adr, res) |
39271 | POST_IO |
39272 | RET(12) |
39273 | } |
39274 | |
39275 | // ASL |
39276 | OPCODE(0xE1D8) |
39277 | { |
39278 | u32 adr, res; |
39279 | u32 src, dst; |
39280 | |
39281 | adr = AREG((Opcode >> 0) & 7); |
39282 | AREG((Opcode >> 0) & 7) += 2; |
39283 | PRE_IO |
39284 | READ_WORD_F(adr, src) |
39285 | flag_X = flag_C = src >> 7; |
39286 | res = src << 1; |
39287 | flag_V = (src ^ res) >> 8; |
39288 | flag_N = res >> 8; |
39289 | flag_NotZ = res & 0x0000FFFF; |
39290 | WRITE_WORD_F(adr, res) |
39291 | POST_IO |
39292 | RET(12) |
39293 | } |
39294 | |
39295 | // ASL |
39296 | OPCODE(0xE1E0) |
39297 | { |
39298 | u32 adr, res; |
39299 | u32 src, dst; |
39300 | |
39301 | adr = AREG((Opcode >> 0) & 7) - 2; |
39302 | AREG((Opcode >> 0) & 7) = adr; |
39303 | PRE_IO |
39304 | READ_WORD_F(adr, src) |
39305 | flag_X = flag_C = src >> 7; |
39306 | res = src << 1; |
39307 | flag_V = (src ^ res) >> 8; |
39308 | flag_N = res >> 8; |
39309 | flag_NotZ = res & 0x0000FFFF; |
39310 | WRITE_WORD_F(adr, res) |
39311 | POST_IO |
39312 | RET(14) |
39313 | } |
39314 | |
39315 | // ASL |
39316 | OPCODE(0xE1E8) |
39317 | { |
39318 | u32 adr, res; |
39319 | u32 src, dst; |
39320 | |
39321 | FETCH_SWORD(adr); |
39322 | adr += AREG((Opcode >> 0) & 7); |
39323 | PRE_IO |
39324 | READ_WORD_F(adr, src) |
39325 | flag_X = flag_C = src >> 7; |
39326 | res = src << 1; |
39327 | flag_V = (src ^ res) >> 8; |
39328 | flag_N = res >> 8; |
39329 | flag_NotZ = res & 0x0000FFFF; |
39330 | WRITE_WORD_F(adr, res) |
39331 | POST_IO |
39332 | RET(16) |
39333 | } |
39334 | |
39335 | // ASL |
39336 | OPCODE(0xE1F0) |
39337 | { |
39338 | u32 adr, res; |
39339 | u32 src, dst; |
39340 | |
39341 | adr = AREG((Opcode >> 0) & 7); |
39342 | DECODE_EXT_WORD |
39343 | PRE_IO |
39344 | READ_WORD_F(adr, src) |
39345 | flag_X = flag_C = src >> 7; |
39346 | res = src << 1; |
39347 | flag_V = (src ^ res) >> 8; |
39348 | flag_N = res >> 8; |
39349 | flag_NotZ = res & 0x0000FFFF; |
39350 | WRITE_WORD_F(adr, res) |
39351 | POST_IO |
39352 | RET(18) |
39353 | } |
39354 | |
39355 | // ASL |
39356 | OPCODE(0xE1F8) |
39357 | { |
39358 | u32 adr, res; |
39359 | u32 src, dst; |
39360 | |
39361 | FETCH_SWORD(adr); |
39362 | PRE_IO |
39363 | READ_WORD_F(adr, src) |
39364 | flag_X = flag_C = src >> 7; |
39365 | res = src << 1; |
39366 | flag_V = (src ^ res) >> 8; |
39367 | flag_N = res >> 8; |
39368 | flag_NotZ = res & 0x0000FFFF; |
39369 | WRITE_WORD_F(adr, res) |
39370 | POST_IO |
39371 | RET(16) |
39372 | } |
39373 | |
39374 | // ASL |
39375 | OPCODE(0xE1F9) |
39376 | { |
39377 | u32 adr, res; |
39378 | u32 src, dst; |
39379 | |
39380 | FETCH_LONG(adr); |
39381 | PRE_IO |
39382 | READ_WORD_F(adr, src) |
39383 | flag_X = flag_C = src >> 7; |
39384 | res = src << 1; |
39385 | flag_V = (src ^ res) >> 8; |
39386 | flag_N = res >> 8; |
39387 | flag_NotZ = res & 0x0000FFFF; |
39388 | WRITE_WORD_F(adr, res) |
39389 | POST_IO |
39390 | RET(20) |
39391 | } |
39392 | |
39393 | // ASL |
39394 | OPCODE(0xE1DF) |
39395 | { |
39396 | u32 adr, res; |
39397 | u32 src, dst; |
39398 | |
39399 | adr = AREG(7); |
39400 | AREG(7) += 2; |
39401 | PRE_IO |
39402 | READ_WORD_F(adr, src) |
39403 | flag_X = flag_C = src >> 7; |
39404 | res = src << 1; |
39405 | flag_V = (src ^ res) >> 8; |
39406 | flag_N = res >> 8; |
39407 | flag_NotZ = res & 0x0000FFFF; |
39408 | WRITE_WORD_F(adr, res) |
39409 | POST_IO |
39410 | RET(12) |
39411 | } |
39412 | |
39413 | // ASL |
39414 | OPCODE(0xE1E7) |
39415 | { |
39416 | u32 adr, res; |
39417 | u32 src, dst; |
39418 | |
39419 | adr = AREG(7) - 2; |
39420 | AREG(7) = adr; |
39421 | PRE_IO |
39422 | READ_WORD_F(adr, src) |
39423 | flag_X = flag_C = src >> 7; |
39424 | res = src << 1; |
39425 | flag_V = (src ^ res) >> 8; |
39426 | flag_N = res >> 8; |
39427 | flag_NotZ = res & 0x0000FFFF; |
39428 | WRITE_WORD_F(adr, res) |
39429 | POST_IO |
39430 | RET(14) |
39431 | } |
39432 | |
39433 | // LSL |
39434 | OPCODE(0xE3D0) |
39435 | { |
39436 | u32 adr, res; |
39437 | u32 src, dst; |
39438 | |
39439 | adr = AREG((Opcode >> 0) & 7); |
39440 | PRE_IO |
39441 | READ_WORD_F(adr, src) |
39442 | flag_V = 0; |
39443 | flag_X = flag_C = src >> 7; |
39444 | res = src << 1; |
39445 | flag_N = res >> 8; |
39446 | flag_NotZ = res & 0x0000FFFF; |
39447 | WRITE_WORD_F(adr, res) |
39448 | POST_IO |
39449 | RET(12) |
39450 | } |
39451 | |
39452 | // LSL |
39453 | OPCODE(0xE3D8) |
39454 | { |
39455 | u32 adr, res; |
39456 | u32 src, dst; |
39457 | |
39458 | adr = AREG((Opcode >> 0) & 7); |
39459 | AREG((Opcode >> 0) & 7) += 2; |
39460 | PRE_IO |
39461 | READ_WORD_F(adr, src) |
39462 | flag_V = 0; |
39463 | flag_X = flag_C = src >> 7; |
39464 | res = src << 1; |
39465 | flag_N = res >> 8; |
39466 | flag_NotZ = res & 0x0000FFFF; |
39467 | WRITE_WORD_F(adr, res) |
39468 | POST_IO |
39469 | RET(12) |
39470 | } |
39471 | |
39472 | // LSL |
39473 | OPCODE(0xE3E0) |
39474 | { |
39475 | u32 adr, res; |
39476 | u32 src, dst; |
39477 | |
39478 | adr = AREG((Opcode >> 0) & 7) - 2; |
39479 | AREG((Opcode >> 0) & 7) = adr; |
39480 | PRE_IO |
39481 | READ_WORD_F(adr, src) |
39482 | flag_V = 0; |
39483 | flag_X = flag_C = src >> 7; |
39484 | res = src << 1; |
39485 | flag_N = res >> 8; |
39486 | flag_NotZ = res & 0x0000FFFF; |
39487 | WRITE_WORD_F(adr, res) |
39488 | POST_IO |
39489 | RET(14) |
39490 | } |
39491 | |
39492 | // LSL |
39493 | OPCODE(0xE3E8) |
39494 | { |
39495 | u32 adr, res; |
39496 | u32 src, dst; |
39497 | |
39498 | FETCH_SWORD(adr); |
39499 | adr += AREG((Opcode >> 0) & 7); |
39500 | PRE_IO |
39501 | READ_WORD_F(adr, src) |
39502 | flag_V = 0; |
39503 | flag_X = flag_C = src >> 7; |
39504 | res = src << 1; |
39505 | flag_N = res >> 8; |
39506 | flag_NotZ = res & 0x0000FFFF; |
39507 | WRITE_WORD_F(adr, res) |
39508 | POST_IO |
39509 | RET(16) |
39510 | } |
39511 | |
39512 | // LSL |
39513 | OPCODE(0xE3F0) |
39514 | { |
39515 | u32 adr, res; |
39516 | u32 src, dst; |
39517 | |
39518 | adr = AREG((Opcode >> 0) & 7); |
39519 | DECODE_EXT_WORD |
39520 | PRE_IO |
39521 | READ_WORD_F(adr, src) |
39522 | flag_V = 0; |
39523 | flag_X = flag_C = src >> 7; |
39524 | res = src << 1; |
39525 | flag_N = res >> 8; |
39526 | flag_NotZ = res & 0x0000FFFF; |
39527 | WRITE_WORD_F(adr, res) |
39528 | POST_IO |
39529 | RET(18) |
39530 | } |
39531 | |
39532 | // LSL |
39533 | OPCODE(0xE3F8) |
39534 | { |
39535 | u32 adr, res; |
39536 | u32 src, dst; |
39537 | |
39538 | FETCH_SWORD(adr); |
39539 | PRE_IO |
39540 | READ_WORD_F(adr, src) |
39541 | flag_V = 0; |
39542 | flag_X = flag_C = src >> 7; |
39543 | res = src << 1; |
39544 | flag_N = res >> 8; |
39545 | flag_NotZ = res & 0x0000FFFF; |
39546 | WRITE_WORD_F(adr, res) |
39547 | POST_IO |
39548 | RET(16) |
39549 | } |
39550 | |
39551 | // LSL |
39552 | OPCODE(0xE3F9) |
39553 | { |
39554 | u32 adr, res; |
39555 | u32 src, dst; |
39556 | |
39557 | FETCH_LONG(adr); |
39558 | PRE_IO |
39559 | READ_WORD_F(adr, src) |
39560 | flag_V = 0; |
39561 | flag_X = flag_C = src >> 7; |
39562 | res = src << 1; |
39563 | flag_N = res >> 8; |
39564 | flag_NotZ = res & 0x0000FFFF; |
39565 | WRITE_WORD_F(adr, res) |
39566 | POST_IO |
39567 | RET(20) |
39568 | } |
39569 | |
39570 | // LSL |
39571 | OPCODE(0xE3DF) |
39572 | { |
39573 | u32 adr, res; |
39574 | u32 src, dst; |
39575 | |
39576 | adr = AREG(7); |
39577 | AREG(7) += 2; |
39578 | PRE_IO |
39579 | READ_WORD_F(adr, src) |
39580 | flag_V = 0; |
39581 | flag_X = flag_C = src >> 7; |
39582 | res = src << 1; |
39583 | flag_N = res >> 8; |
39584 | flag_NotZ = res & 0x0000FFFF; |
39585 | WRITE_WORD_F(adr, res) |
39586 | POST_IO |
39587 | RET(12) |
39588 | } |
39589 | |
39590 | // LSL |
39591 | OPCODE(0xE3E7) |
39592 | { |
39593 | u32 adr, res; |
39594 | u32 src, dst; |
39595 | |
39596 | adr = AREG(7) - 2; |
39597 | AREG(7) = adr; |
39598 | PRE_IO |
39599 | READ_WORD_F(adr, src) |
39600 | flag_V = 0; |
39601 | flag_X = flag_C = src >> 7; |
39602 | res = src << 1; |
39603 | flag_N = res >> 8; |
39604 | flag_NotZ = res & 0x0000FFFF; |
39605 | WRITE_WORD_F(adr, res) |
39606 | POST_IO |
39607 | RET(14) |
39608 | } |
39609 | |
39610 | // ROXL |
39611 | OPCODE(0xE5D0) |
39612 | { |
39613 | u32 adr, res; |
39614 | u32 src, dst; |
39615 | |
39616 | adr = AREG((Opcode >> 0) & 7); |
39617 | PRE_IO |
39618 | READ_WORD_F(adr, src) |
39619 | flag_V = 0; |
39620 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39621 | flag_X = flag_C = src >> 7; |
39622 | flag_N = res >> 8; |
39623 | flag_NotZ = res & 0x0000FFFF; |
39624 | WRITE_WORD_F(adr, res) |
39625 | POST_IO |
39626 | RET(12) |
39627 | } |
39628 | |
39629 | // ROXL |
39630 | OPCODE(0xE5D8) |
39631 | { |
39632 | u32 adr, res; |
39633 | u32 src, dst; |
39634 | |
39635 | adr = AREG((Opcode >> 0) & 7); |
39636 | AREG((Opcode >> 0) & 7) += 2; |
39637 | PRE_IO |
39638 | READ_WORD_F(adr, src) |
39639 | flag_V = 0; |
39640 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39641 | flag_X = flag_C = src >> 7; |
39642 | flag_N = res >> 8; |
39643 | flag_NotZ = res & 0x0000FFFF; |
39644 | WRITE_WORD_F(adr, res) |
39645 | POST_IO |
39646 | RET(12) |
39647 | } |
39648 | |
39649 | // ROXL |
39650 | OPCODE(0xE5E0) |
39651 | { |
39652 | u32 adr, res; |
39653 | u32 src, dst; |
39654 | |
39655 | adr = AREG((Opcode >> 0) & 7) - 2; |
39656 | AREG((Opcode >> 0) & 7) = adr; |
39657 | PRE_IO |
39658 | READ_WORD_F(adr, src) |
39659 | flag_V = 0; |
39660 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39661 | flag_X = flag_C = src >> 7; |
39662 | flag_N = res >> 8; |
39663 | flag_NotZ = res & 0x0000FFFF; |
39664 | WRITE_WORD_F(adr, res) |
39665 | POST_IO |
39666 | RET(14) |
39667 | } |
39668 | |
39669 | // ROXL |
39670 | OPCODE(0xE5E8) |
39671 | { |
39672 | u32 adr, res; |
39673 | u32 src, dst; |
39674 | |
39675 | FETCH_SWORD(adr); |
39676 | adr += AREG((Opcode >> 0) & 7); |
39677 | PRE_IO |
39678 | READ_WORD_F(adr, src) |
39679 | flag_V = 0; |
39680 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39681 | flag_X = flag_C = src >> 7; |
39682 | flag_N = res >> 8; |
39683 | flag_NotZ = res & 0x0000FFFF; |
39684 | WRITE_WORD_F(adr, res) |
39685 | POST_IO |
39686 | RET(16) |
39687 | } |
39688 | |
39689 | // ROXL |
39690 | OPCODE(0xE5F0) |
39691 | { |
39692 | u32 adr, res; |
39693 | u32 src, dst; |
39694 | |
39695 | adr = AREG((Opcode >> 0) & 7); |
39696 | DECODE_EXT_WORD |
39697 | PRE_IO |
39698 | READ_WORD_F(adr, src) |
39699 | flag_V = 0; |
39700 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39701 | flag_X = flag_C = src >> 7; |
39702 | flag_N = res >> 8; |
39703 | flag_NotZ = res & 0x0000FFFF; |
39704 | WRITE_WORD_F(adr, res) |
39705 | POST_IO |
39706 | RET(18) |
39707 | } |
39708 | |
39709 | // ROXL |
39710 | OPCODE(0xE5F8) |
39711 | { |
39712 | u32 adr, res; |
39713 | u32 src, dst; |
39714 | |
39715 | FETCH_SWORD(adr); |
39716 | PRE_IO |
39717 | READ_WORD_F(adr, src) |
39718 | flag_V = 0; |
39719 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39720 | flag_X = flag_C = src >> 7; |
39721 | flag_N = res >> 8; |
39722 | flag_NotZ = res & 0x0000FFFF; |
39723 | WRITE_WORD_F(adr, res) |
39724 | POST_IO |
39725 | RET(16) |
39726 | } |
39727 | |
39728 | // ROXL |
39729 | OPCODE(0xE5F9) |
39730 | { |
39731 | u32 adr, res; |
39732 | u32 src, dst; |
39733 | |
39734 | FETCH_LONG(adr); |
39735 | PRE_IO |
39736 | READ_WORD_F(adr, src) |
39737 | flag_V = 0; |
39738 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39739 | flag_X = flag_C = src >> 7; |
39740 | flag_N = res >> 8; |
39741 | flag_NotZ = res & 0x0000FFFF; |
39742 | WRITE_WORD_F(adr, res) |
39743 | POST_IO |
39744 | RET(20) |
39745 | } |
39746 | |
39747 | // ROXL |
39748 | OPCODE(0xE5DF) |
39749 | { |
39750 | u32 adr, res; |
39751 | u32 src, dst; |
39752 | |
39753 | adr = AREG(7); |
39754 | AREG(7) += 2; |
39755 | PRE_IO |
39756 | READ_WORD_F(adr, src) |
39757 | flag_V = 0; |
39758 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39759 | flag_X = flag_C = src >> 7; |
39760 | flag_N = res >> 8; |
39761 | flag_NotZ = res & 0x0000FFFF; |
39762 | WRITE_WORD_F(adr, res) |
39763 | POST_IO |
39764 | RET(12) |
39765 | } |
39766 | |
39767 | // ROXL |
39768 | OPCODE(0xE5E7) |
39769 | { |
39770 | u32 adr, res; |
39771 | u32 src, dst; |
39772 | |
39773 | adr = AREG(7) - 2; |
39774 | AREG(7) = adr; |
39775 | PRE_IO |
39776 | READ_WORD_F(adr, src) |
39777 | flag_V = 0; |
39778 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39779 | flag_X = flag_C = src >> 7; |
39780 | flag_N = res >> 8; |
39781 | flag_NotZ = res & 0x0000FFFF; |
39782 | WRITE_WORD_F(adr, res) |
39783 | POST_IO |
39784 | RET(14) |
39785 | } |
39786 | |
39787 | // ROL |
39788 | OPCODE(0xE7D0) |
39789 | { |
39790 | u32 adr, res; |
39791 | u32 src, dst; |
39792 | |
39793 | adr = AREG((Opcode >> 0) & 7); |
39794 | PRE_IO |
39795 | READ_WORD_F(adr, src) |
39796 | flag_V = 0; |
39797 | flag_C = src >> 7; |
39798 | res = (src << 1) | (src >> 15); |
39799 | flag_N = res >> 8; |
39800 | flag_NotZ = res & 0x0000FFFF; |
39801 | WRITE_WORD_F(adr, res) |
39802 | POST_IO |
39803 | RET(12) |
39804 | } |
39805 | |
39806 | // ROL |
39807 | OPCODE(0xE7D8) |
39808 | { |
39809 | u32 adr, res; |
39810 | u32 src, dst; |
39811 | |
39812 | adr = AREG((Opcode >> 0) & 7); |
39813 | AREG((Opcode >> 0) & 7) += 2; |
39814 | PRE_IO |
39815 | READ_WORD_F(adr, src) |
39816 | flag_V = 0; |
39817 | flag_C = src >> 7; |
39818 | res = (src << 1) | (src >> 15); |
39819 | flag_N = res >> 8; |
39820 | flag_NotZ = res & 0x0000FFFF; |
39821 | WRITE_WORD_F(adr, res) |
39822 | POST_IO |
39823 | RET(12) |
39824 | } |
39825 | |
39826 | // ROL |
39827 | OPCODE(0xE7E0) |
39828 | { |
39829 | u32 adr, res; |
39830 | u32 src, dst; |
39831 | |
39832 | adr = AREG((Opcode >> 0) & 7) - 2; |
39833 | AREG((Opcode >> 0) & 7) = adr; |
39834 | PRE_IO |
39835 | READ_WORD_F(adr, src) |
39836 | flag_V = 0; |
39837 | flag_C = src >> 7; |
39838 | res = (src << 1) | (src >> 15); |
39839 | flag_N = res >> 8; |
39840 | flag_NotZ = res & 0x0000FFFF; |
39841 | WRITE_WORD_F(adr, res) |
39842 | POST_IO |
39843 | RET(14) |
39844 | } |
39845 | |
39846 | // ROL |
39847 | OPCODE(0xE7E8) |
39848 | { |
39849 | u32 adr, res; |
39850 | u32 src, dst; |
39851 | |
39852 | FETCH_SWORD(adr); |
39853 | adr += AREG((Opcode >> 0) & 7); |
39854 | PRE_IO |
39855 | READ_WORD_F(adr, src) |
39856 | flag_V = 0; |
39857 | flag_C = src >> 7; |
39858 | res = (src << 1) | (src >> 15); |
39859 | flag_N = res >> 8; |
39860 | flag_NotZ = res & 0x0000FFFF; |
39861 | WRITE_WORD_F(adr, res) |
39862 | POST_IO |
39863 | RET(16) |
39864 | } |
39865 | |
39866 | // ROL |
39867 | OPCODE(0xE7F0) |
39868 | { |
39869 | u32 adr, res; |
39870 | u32 src, dst; |
39871 | |
39872 | adr = AREG((Opcode >> 0) & 7); |
39873 | DECODE_EXT_WORD |
39874 | PRE_IO |
39875 | READ_WORD_F(adr, src) |
39876 | flag_V = 0; |
39877 | flag_C = src >> 7; |
39878 | res = (src << 1) | (src >> 15); |
39879 | flag_N = res >> 8; |
39880 | flag_NotZ = res & 0x0000FFFF; |
39881 | WRITE_WORD_F(adr, res) |
39882 | POST_IO |
39883 | RET(18) |
39884 | } |
39885 | |
39886 | // ROL |
39887 | OPCODE(0xE7F8) |
39888 | { |
39889 | u32 adr, res; |
39890 | u32 src, dst; |
39891 | |
39892 | FETCH_SWORD(adr); |
39893 | PRE_IO |
39894 | READ_WORD_F(adr, src) |
39895 | flag_V = 0; |
39896 | flag_C = src >> 7; |
39897 | res = (src << 1) | (src >> 15); |
39898 | flag_N = res >> 8; |
39899 | flag_NotZ = res & 0x0000FFFF; |
39900 | WRITE_WORD_F(adr, res) |
39901 | POST_IO |
39902 | RET(16) |
39903 | } |
39904 | |
39905 | // ROL |
39906 | OPCODE(0xE7F9) |
39907 | { |
39908 | u32 adr, res; |
39909 | u32 src, dst; |
39910 | |
39911 | FETCH_LONG(adr); |
39912 | PRE_IO |
39913 | READ_WORD_F(adr, src) |
39914 | flag_V = 0; |
39915 | flag_C = src >> 7; |
39916 | res = (src << 1) | (src >> 15); |
39917 | flag_N = res >> 8; |
39918 | flag_NotZ = res & 0x0000FFFF; |
39919 | WRITE_WORD_F(adr, res) |
39920 | POST_IO |
39921 | RET(20) |
39922 | } |
39923 | |
39924 | // ROL |
39925 | OPCODE(0xE7DF) |
39926 | { |
39927 | u32 adr, res; |
39928 | u32 src, dst; |
39929 | |
39930 | adr = AREG(7); |
39931 | AREG(7) += 2; |
39932 | PRE_IO |
39933 | READ_WORD_F(adr, src) |
39934 | flag_V = 0; |
39935 | flag_C = src >> 7; |
39936 | res = (src << 1) | (src >> 15); |
39937 | flag_N = res >> 8; |
39938 | flag_NotZ = res & 0x0000FFFF; |
39939 | WRITE_WORD_F(adr, res) |
39940 | POST_IO |
39941 | RET(12) |
39942 | } |
39943 | |
39944 | // ROL |
39945 | OPCODE(0xE7E7) |
39946 | { |
39947 | u32 adr, res; |
39948 | u32 src, dst; |
39949 | |
39950 | adr = AREG(7) - 2; |
39951 | AREG(7) = adr; |
39952 | PRE_IO |
39953 | READ_WORD_F(adr, src) |
39954 | flag_V = 0; |
39955 | flag_C = src >> 7; |
39956 | res = (src << 1) | (src >> 15); |
39957 | flag_N = res >> 8; |
39958 | flag_NotZ = res & 0x0000FFFF; |
39959 | WRITE_WORD_F(adr, res) |
39960 | POST_IO |
39961 | RET(14) |
39962 | } |
39963 | |
c060a9ab |
39964 | #ifdef PICODRIVE_HACK |
8187ba84 |
39965 | #if 0 |
39966 | #define UPDATE_IDLE_COUNT { \ |
39967 | extern int idle_hit_counter; \ |
39968 | idle_hit_counter++; \ |
39969 | } |
39970 | #else |
39971 | #define UPDATE_IDLE_COUNT |
39972 | #endif |
39973 | |
c060a9ab |
39974 | // BRA |
39975 | OPCODE(0x6001_idle) |
39976 | { |
39977 | #ifdef FAMEC_CHECK_BRANCHES |
39978 | u32 newPC = (u32)(PC) - BasePC; |
39979 | s8 offs=Opcode; |
39980 | newPC += offs; |
39981 | SET_PC(newPC); |
39982 | CHECK_BRANCH_EXCEPTION(offs) |
39983 | #else |
39984 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
39985 | #endif |
8187ba84 |
39986 | UPDATE_IDLE_COUNT |
c060a9ab |
39987 | m68kcontext.io_cycle_counter = 10; |
39988 | RET(10) |
39989 | } |
39990 | |
39991 | // BCC |
39992 | OPCODE(0x6601_idle) |
39993 | { |
39994 | if (flag_NotZ) |
39995 | { |
8187ba84 |
39996 | UPDATE_IDLE_COUNT |
c060a9ab |
39997 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
39998 | m68kcontext.io_cycle_counter = 8; |
39999 | } |
40000 | RET(8) |
40001 | } |
40002 | |
40003 | OPCODE(0x6701_idle) |
40004 | { |
40005 | if (!flag_NotZ) |
40006 | { |
8187ba84 |
40007 | UPDATE_IDLE_COUNT |
c060a9ab |
40008 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
40009 | m68kcontext.io_cycle_counter = 8; |
40010 | } |
40011 | RET(8) |
40012 | } |
40013 | |
40014 | |
40015 | extern int SekIsIdleCode(unsigned short *dst, int bytes); |
40016 | extern int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop); |
40017 | |
40018 | OPCODE(idle_detector_bcc8) |
40019 | { |
40020 | extern int idledet_start_frame; |
40021 | extern char Pico[]; |
40022 | int frame_count, cond_true, bytes, ret, newop; |
40023 | u16 *dest_pc; |
40024 | |
40025 | dest_pc = PC + (((s8)(Opcode & 0xFE)) >> 1); |
40026 | |
40027 | frame_count = *(int *)(Pico+0x22208+0x1c); // Pico.m.frame_count |
40028 | if (frame_count < idledet_start_frame) |
40029 | goto end; |
40030 | |
40031 | bytes = 0 - (s8)(Opcode & 0xFE) - 2; |
40032 | ret = SekIsIdleCode(dest_pc, bytes); |
40033 | newop = (Opcode & 0xfe) | 0x7100; |
40034 | if (!ret) newop |= 0x200; |
40035 | if (Opcode & 0x0100) newop |= 0x400; // beq |
40036 | |
40037 | ret = SekRegisterIdlePatch(GET_PC - 2, Opcode, newop); |
40038 | switch (ret) |
40039 | { |
40040 | case 0: PC[-1] = newop; break; |
40041 | case 1: break; |
40042 | case 2: JumpTable[Opcode] = (Opcode & 0x0100) ? CAST_OP(0x6701) : CAST_OP(0x6601); break; |
40043 | } |
40044 | |
40045 | end: |
40046 | cond_true = (Opcode & 0x0100) ? !flag_NotZ : flag_NotZ; // beq? |
40047 | if (cond_true) |
40048 | { |
40049 | PC = dest_pc; |
40050 | m68kcontext.io_cycle_counter -= 2; |
40051 | } |
40052 | RET(8) |
40053 | } |
40054 | |
40055 | OPCODE(idle_detector_dead) |
40056 | { |
40057 | // patch without further questions |
40058 | int newop = 0x7d00 | (Opcode & 0xff); |
40059 | PC[-1] = newop; |
40060 | SekRegisterIdlePatch(GET_PC - 2, Opcode, newop); |
40061 | |
40062 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
40063 | RET(10) |
40064 | } |
40065 | #endif // PICODRIVE_HACK |