70357ce5 |
1 | |
2 | // ORI |
3 | OPCODE(0x0000) |
4 | { |
5 | u32 adr, res; |
6 | u32 src, dst; |
7 | |
8 | FETCH_BYTE(src); |
9 | res = DREGu8((Opcode >> 0) & 7); |
10 | res |= src; |
11 | flag_C = 0; |
12 | flag_V = 0; |
13 | flag_NotZ = res; |
14 | flag_N = res; |
15 | DREGu8((Opcode >> 0) & 7) = res; |
16 | RET(8) |
17 | } |
18 | |
19 | // ORI |
20 | OPCODE(0x0010) |
21 | { |
22 | u32 adr, res; |
23 | u32 src, dst; |
24 | |
25 | FETCH_BYTE(src); |
26 | adr = AREG((Opcode >> 0) & 7); |
27 | PRE_IO |
28 | READ_BYTE_F(adr, res) |
29 | res |= src; |
30 | flag_C = 0; |
31 | flag_V = 0; |
32 | flag_NotZ = res; |
33 | flag_N = res; |
34 | WRITE_BYTE_F(adr, res) |
35 | POST_IO |
36 | RET(16) |
37 | } |
38 | |
39 | // ORI |
40 | OPCODE(0x0018) |
41 | { |
42 | u32 adr, res; |
43 | u32 src, dst; |
44 | |
45 | FETCH_BYTE(src); |
46 | adr = AREG((Opcode >> 0) & 7); |
47 | AREG((Opcode >> 0) & 7) += 1; |
48 | PRE_IO |
49 | READ_BYTE_F(adr, res) |
50 | res |= src; |
51 | flag_C = 0; |
52 | flag_V = 0; |
53 | flag_NotZ = res; |
54 | flag_N = res; |
55 | WRITE_BYTE_F(adr, res) |
56 | POST_IO |
57 | RET(16) |
58 | } |
59 | |
60 | // ORI |
61 | OPCODE(0x0020) |
62 | { |
63 | u32 adr, res; |
64 | u32 src, dst; |
65 | |
66 | FETCH_BYTE(src); |
67 | adr = AREG((Opcode >> 0) & 7) - 1; |
68 | AREG((Opcode >> 0) & 7) = adr; |
69 | PRE_IO |
70 | READ_BYTE_F(adr, res) |
71 | res |= src; |
72 | flag_C = 0; |
73 | flag_V = 0; |
74 | flag_NotZ = res; |
75 | flag_N = res; |
76 | WRITE_BYTE_F(adr, res) |
77 | POST_IO |
78 | RET(18) |
79 | } |
80 | |
81 | // ORI |
82 | OPCODE(0x0028) |
83 | { |
84 | u32 adr, res; |
85 | u32 src, dst; |
86 | |
87 | FETCH_BYTE(src); |
88 | FETCH_SWORD(adr); |
89 | adr += AREG((Opcode >> 0) & 7); |
90 | PRE_IO |
91 | READ_BYTE_F(adr, res) |
92 | res |= src; |
93 | flag_C = 0; |
94 | flag_V = 0; |
95 | flag_NotZ = res; |
96 | flag_N = res; |
97 | WRITE_BYTE_F(adr, res) |
98 | POST_IO |
99 | RET(20) |
100 | } |
101 | |
102 | // ORI |
103 | OPCODE(0x0030) |
104 | { |
105 | u32 adr, res; |
106 | u32 src, dst; |
107 | |
108 | FETCH_BYTE(src); |
109 | adr = AREG((Opcode >> 0) & 7); |
110 | DECODE_EXT_WORD |
111 | PRE_IO |
112 | READ_BYTE_F(adr, res) |
113 | res |= src; |
114 | flag_C = 0; |
115 | flag_V = 0; |
116 | flag_NotZ = res; |
117 | flag_N = res; |
118 | WRITE_BYTE_F(adr, res) |
119 | POST_IO |
120 | RET(22) |
121 | } |
122 | |
123 | // ORI |
124 | OPCODE(0x0038) |
125 | { |
126 | u32 adr, res; |
127 | u32 src, dst; |
128 | |
129 | FETCH_BYTE(src); |
130 | FETCH_SWORD(adr); |
131 | PRE_IO |
132 | READ_BYTE_F(adr, res) |
133 | res |= src; |
134 | flag_C = 0; |
135 | flag_V = 0; |
136 | flag_NotZ = res; |
137 | flag_N = res; |
138 | WRITE_BYTE_F(adr, res) |
139 | POST_IO |
140 | RET(20) |
141 | } |
142 | |
143 | // ORI |
144 | OPCODE(0x0039) |
145 | { |
146 | u32 adr, res; |
147 | u32 src, dst; |
148 | |
149 | FETCH_BYTE(src); |
150 | FETCH_LONG(adr); |
151 | PRE_IO |
152 | READ_BYTE_F(adr, res) |
153 | res |= src; |
154 | flag_C = 0; |
155 | flag_V = 0; |
156 | flag_NotZ = res; |
157 | flag_N = res; |
158 | WRITE_BYTE_F(adr, res) |
159 | POST_IO |
160 | RET(24) |
161 | } |
162 | |
163 | // ORI |
164 | OPCODE(0x001F) |
165 | { |
166 | u32 adr, res; |
167 | u32 src, dst; |
168 | |
169 | FETCH_BYTE(src); |
170 | adr = AREG(7); |
171 | AREG(7) += 2; |
172 | PRE_IO |
173 | READ_BYTE_F(adr, res) |
174 | res |= src; |
175 | flag_C = 0; |
176 | flag_V = 0; |
177 | flag_NotZ = res; |
178 | flag_N = res; |
179 | WRITE_BYTE_F(adr, res) |
180 | POST_IO |
181 | RET(16) |
182 | } |
183 | |
184 | // ORI |
185 | OPCODE(0x0027) |
186 | { |
187 | u32 adr, res; |
188 | u32 src, dst; |
189 | |
190 | FETCH_BYTE(src); |
191 | adr = AREG(7) - 2; |
192 | AREG(7) = adr; |
193 | PRE_IO |
194 | READ_BYTE_F(adr, res) |
195 | res |= src; |
196 | flag_C = 0; |
197 | flag_V = 0; |
198 | flag_NotZ = res; |
199 | flag_N = res; |
200 | WRITE_BYTE_F(adr, res) |
201 | POST_IO |
202 | RET(18) |
203 | } |
204 | |
205 | // ORI |
206 | OPCODE(0x0040) |
207 | { |
208 | u32 adr, res; |
209 | u32 src, dst; |
210 | |
211 | FETCH_WORD(src); |
212 | res = DREGu16((Opcode >> 0) & 7); |
213 | res |= src; |
214 | flag_C = 0; |
215 | flag_V = 0; |
216 | flag_NotZ = res; |
217 | flag_N = res >> 8; |
218 | DREGu16((Opcode >> 0) & 7) = res; |
219 | RET(8) |
220 | } |
221 | |
222 | // ORI |
223 | OPCODE(0x0050) |
224 | { |
225 | u32 adr, res; |
226 | u32 src, dst; |
227 | |
228 | FETCH_WORD(src); |
229 | adr = AREG((Opcode >> 0) & 7); |
230 | PRE_IO |
231 | READ_WORD_F(adr, res) |
232 | res |= src; |
233 | flag_C = 0; |
234 | flag_V = 0; |
235 | flag_NotZ = res; |
236 | flag_N = res >> 8; |
237 | WRITE_WORD_F(adr, res) |
238 | POST_IO |
239 | RET(16) |
240 | } |
241 | |
242 | // ORI |
243 | OPCODE(0x0058) |
244 | { |
245 | u32 adr, res; |
246 | u32 src, dst; |
247 | |
248 | FETCH_WORD(src); |
249 | adr = AREG((Opcode >> 0) & 7); |
250 | AREG((Opcode >> 0) & 7) += 2; |
251 | PRE_IO |
252 | READ_WORD_F(adr, res) |
253 | res |= src; |
254 | flag_C = 0; |
255 | flag_V = 0; |
256 | flag_NotZ = res; |
257 | flag_N = res >> 8; |
258 | WRITE_WORD_F(adr, res) |
259 | POST_IO |
260 | RET(16) |
261 | } |
262 | |
263 | // ORI |
264 | OPCODE(0x0060) |
265 | { |
266 | u32 adr, res; |
267 | u32 src, dst; |
268 | |
269 | FETCH_WORD(src); |
270 | adr = AREG((Opcode >> 0) & 7) - 2; |
271 | AREG((Opcode >> 0) & 7) = adr; |
272 | PRE_IO |
273 | READ_WORD_F(adr, res) |
274 | res |= src; |
275 | flag_C = 0; |
276 | flag_V = 0; |
277 | flag_NotZ = res; |
278 | flag_N = res >> 8; |
279 | WRITE_WORD_F(adr, res) |
280 | POST_IO |
281 | RET(18) |
282 | } |
283 | |
284 | // ORI |
285 | OPCODE(0x0068) |
286 | { |
287 | u32 adr, res; |
288 | u32 src, dst; |
289 | |
290 | FETCH_WORD(src); |
291 | FETCH_SWORD(adr); |
292 | adr += AREG((Opcode >> 0) & 7); |
293 | PRE_IO |
294 | READ_WORD_F(adr, res) |
295 | res |= src; |
296 | flag_C = 0; |
297 | flag_V = 0; |
298 | flag_NotZ = res; |
299 | flag_N = res >> 8; |
300 | WRITE_WORD_F(adr, res) |
301 | POST_IO |
302 | RET(20) |
303 | } |
304 | |
305 | // ORI |
306 | OPCODE(0x0070) |
307 | { |
308 | u32 adr, res; |
309 | u32 src, dst; |
310 | |
311 | FETCH_WORD(src); |
312 | adr = AREG((Opcode >> 0) & 7); |
313 | DECODE_EXT_WORD |
314 | PRE_IO |
315 | READ_WORD_F(adr, res) |
316 | res |= src; |
317 | flag_C = 0; |
318 | flag_V = 0; |
319 | flag_NotZ = res; |
320 | flag_N = res >> 8; |
321 | WRITE_WORD_F(adr, res) |
322 | POST_IO |
323 | RET(22) |
324 | } |
325 | |
326 | // ORI |
327 | OPCODE(0x0078) |
328 | { |
329 | u32 adr, res; |
330 | u32 src, dst; |
331 | |
332 | FETCH_WORD(src); |
333 | FETCH_SWORD(adr); |
334 | PRE_IO |
335 | READ_WORD_F(adr, res) |
336 | res |= src; |
337 | flag_C = 0; |
338 | flag_V = 0; |
339 | flag_NotZ = res; |
340 | flag_N = res >> 8; |
341 | WRITE_WORD_F(adr, res) |
342 | POST_IO |
343 | RET(20) |
344 | } |
345 | |
346 | // ORI |
347 | OPCODE(0x0079) |
348 | { |
349 | u32 adr, res; |
350 | u32 src, dst; |
351 | |
352 | FETCH_WORD(src); |
353 | FETCH_LONG(adr); |
354 | PRE_IO |
355 | READ_WORD_F(adr, res) |
356 | res |= src; |
357 | flag_C = 0; |
358 | flag_V = 0; |
359 | flag_NotZ = res; |
360 | flag_N = res >> 8; |
361 | WRITE_WORD_F(adr, res) |
362 | POST_IO |
363 | RET(24) |
364 | } |
365 | |
366 | // ORI |
367 | OPCODE(0x005F) |
368 | { |
369 | u32 adr, res; |
370 | u32 src, dst; |
371 | |
372 | FETCH_WORD(src); |
373 | adr = AREG(7); |
374 | AREG(7) += 2; |
375 | PRE_IO |
376 | READ_WORD_F(adr, res) |
377 | res |= src; |
378 | flag_C = 0; |
379 | flag_V = 0; |
380 | flag_NotZ = res; |
381 | flag_N = res >> 8; |
382 | WRITE_WORD_F(adr, res) |
383 | POST_IO |
384 | RET(16) |
385 | } |
386 | |
387 | // ORI |
388 | OPCODE(0x0067) |
389 | { |
390 | u32 adr, res; |
391 | u32 src, dst; |
392 | |
393 | FETCH_WORD(src); |
394 | adr = AREG(7) - 2; |
395 | AREG(7) = adr; |
396 | PRE_IO |
397 | READ_WORD_F(adr, res) |
398 | res |= src; |
399 | flag_C = 0; |
400 | flag_V = 0; |
401 | flag_NotZ = res; |
402 | flag_N = res >> 8; |
403 | WRITE_WORD_F(adr, res) |
404 | POST_IO |
405 | RET(18) |
406 | } |
407 | |
408 | // ORI |
409 | OPCODE(0x0080) |
410 | { |
411 | u32 adr, res; |
412 | u32 src, dst; |
413 | |
414 | FETCH_LONG(src); |
415 | res = DREGu32((Opcode >> 0) & 7); |
416 | res |= src; |
417 | flag_C = 0; |
418 | flag_V = 0; |
419 | flag_NotZ = res; |
420 | flag_N = res >> 24; |
421 | DREGu32((Opcode >> 0) & 7) = res; |
422 | RET(16) |
423 | } |
424 | |
425 | // ORI |
426 | OPCODE(0x0090) |
427 | { |
428 | u32 adr, res; |
429 | u32 src, dst; |
430 | |
431 | FETCH_LONG(src); |
432 | adr = AREG((Opcode >> 0) & 7); |
433 | PRE_IO |
434 | READ_LONG_F(adr, res) |
435 | res |= src; |
436 | flag_C = 0; |
437 | flag_V = 0; |
438 | flag_NotZ = res; |
439 | flag_N = res >> 24; |
440 | WRITE_LONG_F(adr, res) |
441 | POST_IO |
442 | RET(28) |
443 | } |
444 | |
445 | // ORI |
446 | OPCODE(0x0098) |
447 | { |
448 | u32 adr, res; |
449 | u32 src, dst; |
450 | |
451 | FETCH_LONG(src); |
452 | adr = AREG((Opcode >> 0) & 7); |
453 | AREG((Opcode >> 0) & 7) += 4; |
454 | PRE_IO |
455 | READ_LONG_F(adr, res) |
456 | res |= src; |
457 | flag_C = 0; |
458 | flag_V = 0; |
459 | flag_NotZ = res; |
460 | flag_N = res >> 24; |
461 | WRITE_LONG_F(adr, res) |
462 | POST_IO |
463 | RET(28) |
464 | } |
465 | |
466 | // ORI |
467 | OPCODE(0x00A0) |
468 | { |
469 | u32 adr, res; |
470 | u32 src, dst; |
471 | |
472 | FETCH_LONG(src); |
473 | adr = AREG((Opcode >> 0) & 7) - 4; |
474 | AREG((Opcode >> 0) & 7) = adr; |
475 | PRE_IO |
476 | READ_LONG_F(adr, res) |
477 | res |= src; |
478 | flag_C = 0; |
479 | flag_V = 0; |
480 | flag_NotZ = res; |
481 | flag_N = res >> 24; |
482 | WRITE_LONG_F(adr, res) |
483 | POST_IO |
484 | RET(30) |
485 | } |
486 | |
487 | // ORI |
488 | OPCODE(0x00A8) |
489 | { |
490 | u32 adr, res; |
491 | u32 src, dst; |
492 | |
493 | FETCH_LONG(src); |
494 | FETCH_SWORD(adr); |
495 | adr += AREG((Opcode >> 0) & 7); |
496 | PRE_IO |
497 | READ_LONG_F(adr, res) |
498 | res |= src; |
499 | flag_C = 0; |
500 | flag_V = 0; |
501 | flag_NotZ = res; |
502 | flag_N = res >> 24; |
503 | WRITE_LONG_F(adr, res) |
504 | POST_IO |
505 | RET(32) |
506 | } |
507 | |
508 | // ORI |
509 | OPCODE(0x00B0) |
510 | { |
511 | u32 adr, res; |
512 | u32 src, dst; |
513 | |
514 | FETCH_LONG(src); |
515 | adr = AREG((Opcode >> 0) & 7); |
516 | DECODE_EXT_WORD |
517 | PRE_IO |
518 | READ_LONG_F(adr, res) |
519 | res |= src; |
520 | flag_C = 0; |
521 | flag_V = 0; |
522 | flag_NotZ = res; |
523 | flag_N = res >> 24; |
524 | WRITE_LONG_F(adr, res) |
525 | POST_IO |
526 | RET(34) |
527 | } |
528 | |
529 | // ORI |
530 | OPCODE(0x00B8) |
531 | { |
532 | u32 adr, res; |
533 | u32 src, dst; |
534 | |
535 | FETCH_LONG(src); |
536 | FETCH_SWORD(adr); |
537 | PRE_IO |
538 | READ_LONG_F(adr, res) |
539 | res |= src; |
540 | flag_C = 0; |
541 | flag_V = 0; |
542 | flag_NotZ = res; |
543 | flag_N = res >> 24; |
544 | WRITE_LONG_F(adr, res) |
545 | POST_IO |
546 | RET(32) |
547 | } |
548 | |
549 | // ORI |
550 | OPCODE(0x00B9) |
551 | { |
552 | u32 adr, res; |
553 | u32 src, dst; |
554 | |
555 | FETCH_LONG(src); |
556 | FETCH_LONG(adr); |
557 | PRE_IO |
558 | READ_LONG_F(adr, res) |
559 | res |= src; |
560 | flag_C = 0; |
561 | flag_V = 0; |
562 | flag_NotZ = res; |
563 | flag_N = res >> 24; |
564 | WRITE_LONG_F(adr, res) |
565 | POST_IO |
566 | RET(36) |
567 | } |
568 | |
569 | // ORI |
570 | OPCODE(0x009F) |
571 | { |
572 | u32 adr, res; |
573 | u32 src, dst; |
574 | |
575 | FETCH_LONG(src); |
576 | adr = AREG(7); |
577 | AREG(7) += 4; |
578 | PRE_IO |
579 | READ_LONG_F(adr, res) |
580 | res |= src; |
581 | flag_C = 0; |
582 | flag_V = 0; |
583 | flag_NotZ = res; |
584 | flag_N = res >> 24; |
585 | WRITE_LONG_F(adr, res) |
586 | POST_IO |
587 | RET(28) |
588 | } |
589 | |
590 | // ORI |
591 | OPCODE(0x00A7) |
592 | { |
593 | u32 adr, res; |
594 | u32 src, dst; |
595 | |
596 | FETCH_LONG(src); |
597 | adr = AREG(7) - 4; |
598 | AREG(7) = adr; |
599 | PRE_IO |
600 | READ_LONG_F(adr, res) |
601 | res |= src; |
602 | flag_C = 0; |
603 | flag_V = 0; |
604 | flag_NotZ = res; |
605 | flag_N = res >> 24; |
606 | WRITE_LONG_F(adr, res) |
607 | POST_IO |
608 | RET(30) |
609 | } |
610 | |
611 | // ORICCR |
612 | OPCODE(0x003C) |
613 | { |
614 | u32 adr, res; |
615 | u32 src, dst; |
616 | |
617 | FETCH_BYTE(res); |
618 | res &= M68K_CCR_MASK; |
619 | res |= GET_CCR; |
620 | SET_CCR(res) |
621 | RET(20) |
622 | } |
623 | |
624 | // ORISR |
625 | OPCODE(0x007C) |
626 | { |
627 | u32 adr, res; |
628 | u32 src, dst; |
629 | |
630 | if (flag_S) |
631 | { |
632 | u32 res; |
633 | FETCH_WORD(res); |
634 | res &= M68K_SR_MASK; |
635 | res |= GET_SR; |
636 | SET_SR(res) |
637 | CHECK_INT_TO_JUMP(20) |
638 | } |
639 | else |
640 | { |
641 | u32 newPC = (u32)(PC) - BasePC; |
642 | SET_PC(newPC-2); |
643 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
644 | #ifdef USE_CYCLONE_TIMING |
645 | RET(0) |
646 | #else |
647 | RET(4) |
648 | #endif |
649 | } |
650 | RET(20) |
651 | } |
652 | |
653 | // ANDI |
654 | OPCODE(0x0200) |
655 | { |
656 | u32 adr, res; |
657 | u32 src, dst; |
658 | |
659 | FETCH_BYTE(src); |
660 | res = DREGu8((Opcode >> 0) & 7); |
661 | res &= src; |
662 | flag_C = 0; |
663 | flag_V = 0; |
664 | flag_NotZ = res; |
665 | flag_N = res; |
666 | DREGu8((Opcode >> 0) & 7) = res; |
667 | RET(8) |
668 | } |
669 | |
670 | // ANDI |
671 | OPCODE(0x0210) |
672 | { |
673 | u32 adr, res; |
674 | u32 src, dst; |
675 | |
676 | FETCH_BYTE(src); |
677 | adr = AREG((Opcode >> 0) & 7); |
678 | PRE_IO |
679 | READ_BYTE_F(adr, res) |
680 | res &= src; |
681 | flag_C = 0; |
682 | flag_V = 0; |
683 | flag_NotZ = res; |
684 | flag_N = res; |
685 | WRITE_BYTE_F(adr, res) |
686 | POST_IO |
687 | RET(16) |
688 | } |
689 | |
690 | // ANDI |
691 | OPCODE(0x0218) |
692 | { |
693 | u32 adr, res; |
694 | u32 src, dst; |
695 | |
696 | FETCH_BYTE(src); |
697 | adr = AREG((Opcode >> 0) & 7); |
698 | AREG((Opcode >> 0) & 7) += 1; |
699 | PRE_IO |
700 | READ_BYTE_F(adr, res) |
701 | res &= src; |
702 | flag_C = 0; |
703 | flag_V = 0; |
704 | flag_NotZ = res; |
705 | flag_N = res; |
706 | WRITE_BYTE_F(adr, res) |
707 | POST_IO |
708 | RET(16) |
709 | } |
710 | |
711 | // ANDI |
712 | OPCODE(0x0220) |
713 | { |
714 | u32 adr, res; |
715 | u32 src, dst; |
716 | |
717 | FETCH_BYTE(src); |
718 | adr = AREG((Opcode >> 0) & 7) - 1; |
719 | AREG((Opcode >> 0) & 7) = adr; |
720 | PRE_IO |
721 | READ_BYTE_F(adr, res) |
722 | res &= src; |
723 | flag_C = 0; |
724 | flag_V = 0; |
725 | flag_NotZ = res; |
726 | flag_N = res; |
727 | WRITE_BYTE_F(adr, res) |
728 | POST_IO |
729 | RET(18) |
730 | } |
731 | |
732 | // ANDI |
733 | OPCODE(0x0228) |
734 | { |
735 | u32 adr, res; |
736 | u32 src, dst; |
737 | |
738 | FETCH_BYTE(src); |
739 | FETCH_SWORD(adr); |
740 | adr += AREG((Opcode >> 0) & 7); |
741 | PRE_IO |
742 | READ_BYTE_F(adr, res) |
743 | res &= src; |
744 | flag_C = 0; |
745 | flag_V = 0; |
746 | flag_NotZ = res; |
747 | flag_N = res; |
748 | WRITE_BYTE_F(adr, res) |
749 | POST_IO |
750 | RET(20) |
751 | } |
752 | |
753 | // ANDI |
754 | OPCODE(0x0230) |
755 | { |
756 | u32 adr, res; |
757 | u32 src, dst; |
758 | |
759 | FETCH_BYTE(src); |
760 | adr = AREG((Opcode >> 0) & 7); |
761 | DECODE_EXT_WORD |
762 | PRE_IO |
763 | READ_BYTE_F(adr, res) |
764 | res &= src; |
765 | flag_C = 0; |
766 | flag_V = 0; |
767 | flag_NotZ = res; |
768 | flag_N = res; |
769 | WRITE_BYTE_F(adr, res) |
770 | POST_IO |
771 | RET(22) |
772 | } |
773 | |
774 | // ANDI |
775 | OPCODE(0x0238) |
776 | { |
777 | u32 adr, res; |
778 | u32 src, dst; |
779 | |
780 | FETCH_BYTE(src); |
781 | FETCH_SWORD(adr); |
782 | PRE_IO |
783 | READ_BYTE_F(adr, res) |
784 | res &= src; |
785 | flag_C = 0; |
786 | flag_V = 0; |
787 | flag_NotZ = res; |
788 | flag_N = res; |
789 | WRITE_BYTE_F(adr, res) |
790 | POST_IO |
791 | RET(20) |
792 | } |
793 | |
794 | // ANDI |
795 | OPCODE(0x0239) |
796 | { |
797 | u32 adr, res; |
798 | u32 src, dst; |
799 | |
800 | FETCH_BYTE(src); |
801 | FETCH_LONG(adr); |
802 | PRE_IO |
803 | READ_BYTE_F(adr, res) |
804 | res &= src; |
805 | flag_C = 0; |
806 | flag_V = 0; |
807 | flag_NotZ = res; |
808 | flag_N = res; |
809 | WRITE_BYTE_F(adr, res) |
810 | POST_IO |
811 | RET(24) |
812 | } |
813 | |
814 | // ANDI |
815 | OPCODE(0x021F) |
816 | { |
817 | u32 adr, res; |
818 | u32 src, dst; |
819 | |
820 | FETCH_BYTE(src); |
821 | adr = AREG(7); |
822 | AREG(7) += 2; |
823 | PRE_IO |
824 | READ_BYTE_F(adr, res) |
825 | res &= src; |
826 | flag_C = 0; |
827 | flag_V = 0; |
828 | flag_NotZ = res; |
829 | flag_N = res; |
830 | WRITE_BYTE_F(adr, res) |
831 | POST_IO |
832 | RET(16) |
833 | } |
834 | |
835 | // ANDI |
836 | OPCODE(0x0227) |
837 | { |
838 | u32 adr, res; |
839 | u32 src, dst; |
840 | |
841 | FETCH_BYTE(src); |
842 | adr = AREG(7) - 2; |
843 | AREG(7) = adr; |
844 | PRE_IO |
845 | READ_BYTE_F(adr, res) |
846 | res &= src; |
847 | flag_C = 0; |
848 | flag_V = 0; |
849 | flag_NotZ = res; |
850 | flag_N = res; |
851 | WRITE_BYTE_F(adr, res) |
852 | POST_IO |
853 | RET(18) |
854 | } |
855 | |
856 | // ANDI |
857 | OPCODE(0x0240) |
858 | { |
859 | u32 adr, res; |
860 | u32 src, dst; |
861 | |
862 | FETCH_WORD(src); |
863 | res = DREGu16((Opcode >> 0) & 7); |
864 | res &= src; |
865 | flag_C = 0; |
866 | flag_V = 0; |
867 | flag_NotZ = res; |
868 | flag_N = res >> 8; |
869 | DREGu16((Opcode >> 0) & 7) = res; |
870 | RET(8) |
871 | } |
872 | |
873 | // ANDI |
874 | OPCODE(0x0250) |
875 | { |
876 | u32 adr, res; |
877 | u32 src, dst; |
878 | |
879 | FETCH_WORD(src); |
880 | adr = AREG((Opcode >> 0) & 7); |
881 | PRE_IO |
882 | READ_WORD_F(adr, res) |
883 | res &= src; |
884 | flag_C = 0; |
885 | flag_V = 0; |
886 | flag_NotZ = res; |
887 | flag_N = res >> 8; |
888 | WRITE_WORD_F(adr, res) |
889 | POST_IO |
890 | RET(16) |
891 | } |
892 | |
893 | // ANDI |
894 | OPCODE(0x0258) |
895 | { |
896 | u32 adr, res; |
897 | u32 src, dst; |
898 | |
899 | FETCH_WORD(src); |
900 | adr = AREG((Opcode >> 0) & 7); |
901 | AREG((Opcode >> 0) & 7) += 2; |
902 | PRE_IO |
903 | READ_WORD_F(adr, res) |
904 | res &= src; |
905 | flag_C = 0; |
906 | flag_V = 0; |
907 | flag_NotZ = res; |
908 | flag_N = res >> 8; |
909 | WRITE_WORD_F(adr, res) |
910 | POST_IO |
911 | RET(16) |
912 | } |
913 | |
914 | // ANDI |
915 | OPCODE(0x0260) |
916 | { |
917 | u32 adr, res; |
918 | u32 src, dst; |
919 | |
920 | FETCH_WORD(src); |
921 | adr = AREG((Opcode >> 0) & 7) - 2; |
922 | AREG((Opcode >> 0) & 7) = adr; |
923 | PRE_IO |
924 | READ_WORD_F(adr, res) |
925 | res &= src; |
926 | flag_C = 0; |
927 | flag_V = 0; |
928 | flag_NotZ = res; |
929 | flag_N = res >> 8; |
930 | WRITE_WORD_F(adr, res) |
931 | POST_IO |
932 | RET(18) |
933 | } |
934 | |
935 | // ANDI |
936 | OPCODE(0x0268) |
937 | { |
938 | u32 adr, res; |
939 | u32 src, dst; |
940 | |
941 | FETCH_WORD(src); |
942 | FETCH_SWORD(adr); |
943 | adr += AREG((Opcode >> 0) & 7); |
944 | PRE_IO |
945 | READ_WORD_F(adr, res) |
946 | res &= src; |
947 | flag_C = 0; |
948 | flag_V = 0; |
949 | flag_NotZ = res; |
950 | flag_N = res >> 8; |
951 | WRITE_WORD_F(adr, res) |
952 | POST_IO |
953 | RET(20) |
954 | } |
955 | |
956 | // ANDI |
957 | OPCODE(0x0270) |
958 | { |
959 | u32 adr, res; |
960 | u32 src, dst; |
961 | |
962 | FETCH_WORD(src); |
963 | adr = AREG((Opcode >> 0) & 7); |
964 | DECODE_EXT_WORD |
965 | PRE_IO |
966 | READ_WORD_F(adr, res) |
967 | res &= src; |
968 | flag_C = 0; |
969 | flag_V = 0; |
970 | flag_NotZ = res; |
971 | flag_N = res >> 8; |
972 | WRITE_WORD_F(adr, res) |
973 | POST_IO |
974 | RET(22) |
975 | } |
976 | |
977 | // ANDI |
978 | OPCODE(0x0278) |
979 | { |
980 | u32 adr, res; |
981 | u32 src, dst; |
982 | |
983 | FETCH_WORD(src); |
984 | FETCH_SWORD(adr); |
985 | PRE_IO |
986 | READ_WORD_F(adr, res) |
987 | res &= src; |
988 | flag_C = 0; |
989 | flag_V = 0; |
990 | flag_NotZ = res; |
991 | flag_N = res >> 8; |
992 | WRITE_WORD_F(adr, res) |
993 | POST_IO |
994 | RET(20) |
995 | } |
996 | |
997 | // ANDI |
998 | OPCODE(0x0279) |
999 | { |
1000 | u32 adr, res; |
1001 | u32 src, dst; |
1002 | |
1003 | FETCH_WORD(src); |
1004 | FETCH_LONG(adr); |
1005 | PRE_IO |
1006 | READ_WORD_F(adr, res) |
1007 | res &= src; |
1008 | flag_C = 0; |
1009 | flag_V = 0; |
1010 | flag_NotZ = res; |
1011 | flag_N = res >> 8; |
1012 | WRITE_WORD_F(adr, res) |
1013 | POST_IO |
1014 | RET(24) |
1015 | } |
1016 | |
1017 | // ANDI |
1018 | OPCODE(0x025F) |
1019 | { |
1020 | u32 adr, res; |
1021 | u32 src, dst; |
1022 | |
1023 | FETCH_WORD(src); |
1024 | adr = AREG(7); |
1025 | AREG(7) += 2; |
1026 | PRE_IO |
1027 | READ_WORD_F(adr, res) |
1028 | res &= src; |
1029 | flag_C = 0; |
1030 | flag_V = 0; |
1031 | flag_NotZ = res; |
1032 | flag_N = res >> 8; |
1033 | WRITE_WORD_F(adr, res) |
1034 | POST_IO |
1035 | RET(16) |
1036 | } |
1037 | |
1038 | // ANDI |
1039 | OPCODE(0x0267) |
1040 | { |
1041 | u32 adr, res; |
1042 | u32 src, dst; |
1043 | |
1044 | FETCH_WORD(src); |
1045 | adr = AREG(7) - 2; |
1046 | AREG(7) = adr; |
1047 | PRE_IO |
1048 | READ_WORD_F(adr, res) |
1049 | res &= src; |
1050 | flag_C = 0; |
1051 | flag_V = 0; |
1052 | flag_NotZ = res; |
1053 | flag_N = res >> 8; |
1054 | WRITE_WORD_F(adr, res) |
1055 | POST_IO |
1056 | RET(18) |
1057 | } |
1058 | |
1059 | // ANDI |
1060 | OPCODE(0x0280) |
1061 | { |
1062 | u32 adr, res; |
1063 | u32 src, dst; |
1064 | |
1065 | FETCH_LONG(src); |
1066 | res = DREGu32((Opcode >> 0) & 7); |
1067 | res &= src; |
1068 | flag_C = 0; |
1069 | flag_V = 0; |
1070 | flag_NotZ = res; |
1071 | flag_N = res >> 24; |
1072 | DREGu32((Opcode >> 0) & 7) = res; |
1073 | #ifdef USE_CYCLONE_TIMING |
1074 | RET(14) |
1075 | #else |
1076 | RET(16) |
1077 | #endif |
1078 | } |
1079 | |
1080 | // ANDI |
1081 | OPCODE(0x0290) |
1082 | { |
1083 | u32 adr, res; |
1084 | u32 src, dst; |
1085 | |
1086 | FETCH_LONG(src); |
1087 | adr = AREG((Opcode >> 0) & 7); |
1088 | PRE_IO |
1089 | READ_LONG_F(adr, res) |
1090 | res &= src; |
1091 | flag_C = 0; |
1092 | flag_V = 0; |
1093 | flag_NotZ = res; |
1094 | flag_N = res >> 24; |
1095 | WRITE_LONG_F(adr, res) |
1096 | POST_IO |
1097 | RET(28) |
1098 | } |
1099 | |
1100 | // ANDI |
1101 | OPCODE(0x0298) |
1102 | { |
1103 | u32 adr, res; |
1104 | u32 src, dst; |
1105 | |
1106 | FETCH_LONG(src); |
1107 | adr = AREG((Opcode >> 0) & 7); |
1108 | AREG((Opcode >> 0) & 7) += 4; |
1109 | PRE_IO |
1110 | READ_LONG_F(adr, res) |
1111 | res &= src; |
1112 | flag_C = 0; |
1113 | flag_V = 0; |
1114 | flag_NotZ = res; |
1115 | flag_N = res >> 24; |
1116 | WRITE_LONG_F(adr, res) |
1117 | POST_IO |
1118 | RET(28) |
1119 | } |
1120 | |
1121 | // ANDI |
1122 | OPCODE(0x02A0) |
1123 | { |
1124 | u32 adr, res; |
1125 | u32 src, dst; |
1126 | |
1127 | FETCH_LONG(src); |
1128 | adr = AREG((Opcode >> 0) & 7) - 4; |
1129 | AREG((Opcode >> 0) & 7) = adr; |
1130 | PRE_IO |
1131 | READ_LONG_F(adr, res) |
1132 | res &= src; |
1133 | flag_C = 0; |
1134 | flag_V = 0; |
1135 | flag_NotZ = res; |
1136 | flag_N = res >> 24; |
1137 | WRITE_LONG_F(adr, res) |
1138 | POST_IO |
1139 | RET(30) |
1140 | } |
1141 | |
1142 | // ANDI |
1143 | OPCODE(0x02A8) |
1144 | { |
1145 | u32 adr, res; |
1146 | u32 src, dst; |
1147 | |
1148 | FETCH_LONG(src); |
1149 | FETCH_SWORD(adr); |
1150 | adr += AREG((Opcode >> 0) & 7); |
1151 | PRE_IO |
1152 | READ_LONG_F(adr, res) |
1153 | res &= src; |
1154 | flag_C = 0; |
1155 | flag_V = 0; |
1156 | flag_NotZ = res; |
1157 | flag_N = res >> 24; |
1158 | WRITE_LONG_F(adr, res) |
1159 | POST_IO |
1160 | RET(32) |
1161 | } |
1162 | |
1163 | // ANDI |
1164 | OPCODE(0x02B0) |
1165 | { |
1166 | u32 adr, res; |
1167 | u32 src, dst; |
1168 | |
1169 | FETCH_LONG(src); |
1170 | adr = AREG((Opcode >> 0) & 7); |
1171 | DECODE_EXT_WORD |
1172 | PRE_IO |
1173 | READ_LONG_F(adr, res) |
1174 | res &= src; |
1175 | flag_C = 0; |
1176 | flag_V = 0; |
1177 | flag_NotZ = res; |
1178 | flag_N = res >> 24; |
1179 | WRITE_LONG_F(adr, res) |
1180 | POST_IO |
1181 | RET(34) |
1182 | } |
1183 | |
1184 | // ANDI |
1185 | OPCODE(0x02B8) |
1186 | { |
1187 | u32 adr, res; |
1188 | u32 src, dst; |
1189 | |
1190 | FETCH_LONG(src); |
1191 | FETCH_SWORD(adr); |
1192 | PRE_IO |
1193 | READ_LONG_F(adr, res) |
1194 | res &= src; |
1195 | flag_C = 0; |
1196 | flag_V = 0; |
1197 | flag_NotZ = res; |
1198 | flag_N = res >> 24; |
1199 | WRITE_LONG_F(adr, res) |
1200 | POST_IO |
1201 | RET(32) |
1202 | } |
1203 | |
1204 | // ANDI |
1205 | OPCODE(0x02B9) |
1206 | { |
1207 | u32 adr, res; |
1208 | u32 src, dst; |
1209 | |
1210 | FETCH_LONG(src); |
1211 | FETCH_LONG(adr); |
1212 | PRE_IO |
1213 | READ_LONG_F(adr, res) |
1214 | res &= src; |
1215 | flag_C = 0; |
1216 | flag_V = 0; |
1217 | flag_NotZ = res; |
1218 | flag_N = res >> 24; |
1219 | WRITE_LONG_F(adr, res) |
1220 | POST_IO |
1221 | RET(36) |
1222 | } |
1223 | |
1224 | // ANDI |
1225 | OPCODE(0x029F) |
1226 | { |
1227 | u32 adr, res; |
1228 | u32 src, dst; |
1229 | |
1230 | FETCH_LONG(src); |
1231 | adr = AREG(7); |
1232 | AREG(7) += 4; |
1233 | PRE_IO |
1234 | READ_LONG_F(adr, res) |
1235 | res &= src; |
1236 | flag_C = 0; |
1237 | flag_V = 0; |
1238 | flag_NotZ = res; |
1239 | flag_N = res >> 24; |
1240 | WRITE_LONG_F(adr, res) |
1241 | POST_IO |
1242 | RET(28) |
1243 | } |
1244 | |
1245 | // ANDI |
1246 | OPCODE(0x02A7) |
1247 | { |
1248 | u32 adr, res; |
1249 | u32 src, dst; |
1250 | |
1251 | FETCH_LONG(src); |
1252 | adr = AREG(7) - 4; |
1253 | AREG(7) = adr; |
1254 | PRE_IO |
1255 | READ_LONG_F(adr, res) |
1256 | res &= src; |
1257 | flag_C = 0; |
1258 | flag_V = 0; |
1259 | flag_NotZ = res; |
1260 | flag_N = res >> 24; |
1261 | WRITE_LONG_F(adr, res) |
1262 | POST_IO |
1263 | RET(30) |
1264 | } |
1265 | |
1266 | // ANDICCR |
1267 | OPCODE(0x023C) |
1268 | { |
1269 | u32 adr, res; |
1270 | u32 src, dst; |
1271 | |
1272 | FETCH_BYTE(res); |
1273 | res &= M68K_CCR_MASK; |
1274 | res &= GET_CCR; |
1275 | SET_CCR(res) |
1276 | RET(20) |
1277 | } |
1278 | |
1279 | // ANDISR |
1280 | OPCODE(0x027C) |
1281 | { |
1282 | u32 adr, res; |
1283 | u32 src, dst; |
1284 | |
1285 | if (flag_S) |
1286 | { |
1287 | FETCH_WORD(res); |
1288 | res &= M68K_SR_MASK; |
1289 | res &= GET_SR; |
1290 | SET_SR(res) |
1291 | if (!flag_S) |
1292 | { |
1293 | res = AREG(7); |
1294 | AREG(7) = ASP; |
1295 | ASP = res; |
1296 | } |
1297 | CHECK_INT_TO_JUMP(20) |
1298 | } |
1299 | else |
1300 | { |
1301 | u32 newPC = (u32)(PC) - BasePC; |
1302 | SET_PC(newPC-2); |
1303 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
1304 | RET(4) |
1305 | } |
1306 | RET(20) |
1307 | } |
1308 | |
1309 | // EORI |
1310 | OPCODE(0x0A00) |
1311 | { |
1312 | u32 adr, res; |
1313 | u32 src, dst; |
1314 | |
1315 | FETCH_BYTE(src); |
1316 | res = DREGu8((Opcode >> 0) & 7); |
1317 | res ^= src; |
1318 | flag_C = 0; |
1319 | flag_V = 0; |
1320 | flag_NotZ = res; |
1321 | flag_N = res; |
1322 | DREGu8((Opcode >> 0) & 7) = res; |
1323 | RET(8) |
1324 | } |
1325 | |
1326 | // EORI |
1327 | OPCODE(0x0A10) |
1328 | { |
1329 | u32 adr, res; |
1330 | u32 src, dst; |
1331 | |
1332 | FETCH_BYTE(src); |
1333 | adr = AREG((Opcode >> 0) & 7); |
1334 | PRE_IO |
1335 | READ_BYTE_F(adr, res) |
1336 | res ^= src; |
1337 | flag_C = 0; |
1338 | flag_V = 0; |
1339 | flag_NotZ = res; |
1340 | flag_N = res; |
1341 | WRITE_BYTE_F(adr, res) |
1342 | POST_IO |
1343 | RET(16) |
1344 | } |
1345 | |
1346 | // EORI |
1347 | OPCODE(0x0A18) |
1348 | { |
1349 | u32 adr, res; |
1350 | u32 src, dst; |
1351 | |
1352 | FETCH_BYTE(src); |
1353 | adr = AREG((Opcode >> 0) & 7); |
1354 | AREG((Opcode >> 0) & 7) += 1; |
1355 | PRE_IO |
1356 | READ_BYTE_F(adr, res) |
1357 | res ^= src; |
1358 | flag_C = 0; |
1359 | flag_V = 0; |
1360 | flag_NotZ = res; |
1361 | flag_N = res; |
1362 | WRITE_BYTE_F(adr, res) |
1363 | POST_IO |
1364 | RET(16) |
1365 | } |
1366 | |
1367 | // EORI |
1368 | OPCODE(0x0A20) |
1369 | { |
1370 | u32 adr, res; |
1371 | u32 src, dst; |
1372 | |
1373 | FETCH_BYTE(src); |
1374 | adr = AREG((Opcode >> 0) & 7) - 1; |
1375 | AREG((Opcode >> 0) & 7) = adr; |
1376 | PRE_IO |
1377 | READ_BYTE_F(adr, res) |
1378 | res ^= src; |
1379 | flag_C = 0; |
1380 | flag_V = 0; |
1381 | flag_NotZ = res; |
1382 | flag_N = res; |
1383 | WRITE_BYTE_F(adr, res) |
1384 | POST_IO |
1385 | RET(18) |
1386 | } |
1387 | |
1388 | // EORI |
1389 | OPCODE(0x0A28) |
1390 | { |
1391 | u32 adr, res; |
1392 | u32 src, dst; |
1393 | |
1394 | FETCH_BYTE(src); |
1395 | FETCH_SWORD(adr); |
1396 | adr += AREG((Opcode >> 0) & 7); |
1397 | PRE_IO |
1398 | READ_BYTE_F(adr, res) |
1399 | res ^= src; |
1400 | flag_C = 0; |
1401 | flag_V = 0; |
1402 | flag_NotZ = res; |
1403 | flag_N = res; |
1404 | WRITE_BYTE_F(adr, res) |
1405 | POST_IO |
1406 | RET(20) |
1407 | } |
1408 | |
1409 | // EORI |
1410 | OPCODE(0x0A30) |
1411 | { |
1412 | u32 adr, res; |
1413 | u32 src, dst; |
1414 | |
1415 | FETCH_BYTE(src); |
1416 | adr = AREG((Opcode >> 0) & 7); |
1417 | DECODE_EXT_WORD |
1418 | PRE_IO |
1419 | READ_BYTE_F(adr, res) |
1420 | res ^= src; |
1421 | flag_C = 0; |
1422 | flag_V = 0; |
1423 | flag_NotZ = res; |
1424 | flag_N = res; |
1425 | WRITE_BYTE_F(adr, res) |
1426 | POST_IO |
1427 | RET(22) |
1428 | } |
1429 | |
1430 | // EORI |
1431 | OPCODE(0x0A38) |
1432 | { |
1433 | u32 adr, res; |
1434 | u32 src, dst; |
1435 | |
1436 | FETCH_BYTE(src); |
1437 | FETCH_SWORD(adr); |
1438 | PRE_IO |
1439 | READ_BYTE_F(adr, res) |
1440 | res ^= src; |
1441 | flag_C = 0; |
1442 | flag_V = 0; |
1443 | flag_NotZ = res; |
1444 | flag_N = res; |
1445 | WRITE_BYTE_F(adr, res) |
1446 | POST_IO |
1447 | RET(20) |
1448 | } |
1449 | |
1450 | // EORI |
1451 | OPCODE(0x0A39) |
1452 | { |
1453 | u32 adr, res; |
1454 | u32 src, dst; |
1455 | |
1456 | FETCH_BYTE(src); |
1457 | FETCH_LONG(adr); |
1458 | PRE_IO |
1459 | READ_BYTE_F(adr, res) |
1460 | res ^= src; |
1461 | flag_C = 0; |
1462 | flag_V = 0; |
1463 | flag_NotZ = res; |
1464 | flag_N = res; |
1465 | WRITE_BYTE_F(adr, res) |
1466 | POST_IO |
1467 | RET(24) |
1468 | } |
1469 | |
1470 | // EORI |
1471 | OPCODE(0x0A1F) |
1472 | { |
1473 | u32 adr, res; |
1474 | u32 src, dst; |
1475 | |
1476 | FETCH_BYTE(src); |
1477 | adr = AREG(7); |
1478 | AREG(7) += 2; |
1479 | PRE_IO |
1480 | READ_BYTE_F(adr, res) |
1481 | res ^= src; |
1482 | flag_C = 0; |
1483 | flag_V = 0; |
1484 | flag_NotZ = res; |
1485 | flag_N = res; |
1486 | WRITE_BYTE_F(adr, res) |
1487 | POST_IO |
1488 | RET(16) |
1489 | } |
1490 | |
1491 | // EORI |
1492 | OPCODE(0x0A27) |
1493 | { |
1494 | u32 adr, res; |
1495 | u32 src, dst; |
1496 | |
1497 | FETCH_BYTE(src); |
1498 | adr = AREG(7) - 2; |
1499 | AREG(7) = adr; |
1500 | PRE_IO |
1501 | READ_BYTE_F(adr, res) |
1502 | res ^= src; |
1503 | flag_C = 0; |
1504 | flag_V = 0; |
1505 | flag_NotZ = res; |
1506 | flag_N = res; |
1507 | WRITE_BYTE_F(adr, res) |
1508 | POST_IO |
1509 | RET(18) |
1510 | } |
1511 | |
1512 | // EORI |
1513 | OPCODE(0x0A40) |
1514 | { |
1515 | u32 adr, res; |
1516 | u32 src, dst; |
1517 | |
1518 | FETCH_WORD(src); |
1519 | res = DREGu16((Opcode >> 0) & 7); |
1520 | res ^= src; |
1521 | flag_C = 0; |
1522 | flag_V = 0; |
1523 | flag_NotZ = res; |
1524 | flag_N = res >> 8; |
1525 | DREGu16((Opcode >> 0) & 7) = res; |
1526 | RET(8) |
1527 | } |
1528 | |
1529 | // EORI |
1530 | OPCODE(0x0A50) |
1531 | { |
1532 | u32 adr, res; |
1533 | u32 src, dst; |
1534 | |
1535 | FETCH_WORD(src); |
1536 | adr = AREG((Opcode >> 0) & 7); |
1537 | PRE_IO |
1538 | READ_WORD_F(adr, res) |
1539 | res ^= src; |
1540 | flag_C = 0; |
1541 | flag_V = 0; |
1542 | flag_NotZ = res; |
1543 | flag_N = res >> 8; |
1544 | WRITE_WORD_F(adr, res) |
1545 | POST_IO |
1546 | RET(16) |
1547 | } |
1548 | |
1549 | // EORI |
1550 | OPCODE(0x0A58) |
1551 | { |
1552 | u32 adr, res; |
1553 | u32 src, dst; |
1554 | |
1555 | FETCH_WORD(src); |
1556 | adr = AREG((Opcode >> 0) & 7); |
1557 | AREG((Opcode >> 0) & 7) += 2; |
1558 | PRE_IO |
1559 | READ_WORD_F(adr, res) |
1560 | res ^= src; |
1561 | flag_C = 0; |
1562 | flag_V = 0; |
1563 | flag_NotZ = res; |
1564 | flag_N = res >> 8; |
1565 | WRITE_WORD_F(adr, res) |
1566 | POST_IO |
1567 | RET(16) |
1568 | } |
1569 | |
1570 | // EORI |
1571 | OPCODE(0x0A60) |
1572 | { |
1573 | u32 adr, res; |
1574 | u32 src, dst; |
1575 | |
1576 | FETCH_WORD(src); |
1577 | adr = AREG((Opcode >> 0) & 7) - 2; |
1578 | AREG((Opcode >> 0) & 7) = adr; |
1579 | PRE_IO |
1580 | READ_WORD_F(adr, res) |
1581 | res ^= src; |
1582 | flag_C = 0; |
1583 | flag_V = 0; |
1584 | flag_NotZ = res; |
1585 | flag_N = res >> 8; |
1586 | WRITE_WORD_F(adr, res) |
1587 | POST_IO |
1588 | RET(18) |
1589 | } |
1590 | |
1591 | // EORI |
1592 | OPCODE(0x0A68) |
1593 | { |
1594 | u32 adr, res; |
1595 | u32 src, dst; |
1596 | |
1597 | FETCH_WORD(src); |
1598 | FETCH_SWORD(adr); |
1599 | adr += AREG((Opcode >> 0) & 7); |
1600 | PRE_IO |
1601 | READ_WORD_F(adr, res) |
1602 | res ^= src; |
1603 | flag_C = 0; |
1604 | flag_V = 0; |
1605 | flag_NotZ = res; |
1606 | flag_N = res >> 8; |
1607 | WRITE_WORD_F(adr, res) |
1608 | POST_IO |
1609 | RET(20) |
1610 | } |
1611 | |
1612 | // EORI |
1613 | OPCODE(0x0A70) |
1614 | { |
1615 | u32 adr, res; |
1616 | u32 src, dst; |
1617 | |
1618 | FETCH_WORD(src); |
1619 | adr = AREG((Opcode >> 0) & 7); |
1620 | DECODE_EXT_WORD |
1621 | PRE_IO |
1622 | READ_WORD_F(adr, res) |
1623 | res ^= src; |
1624 | flag_C = 0; |
1625 | flag_V = 0; |
1626 | flag_NotZ = res; |
1627 | flag_N = res >> 8; |
1628 | WRITE_WORD_F(adr, res) |
1629 | POST_IO |
1630 | RET(22) |
1631 | } |
1632 | |
1633 | // EORI |
1634 | OPCODE(0x0A78) |
1635 | { |
1636 | u32 adr, res; |
1637 | u32 src, dst; |
1638 | |
1639 | FETCH_WORD(src); |
1640 | FETCH_SWORD(adr); |
1641 | PRE_IO |
1642 | READ_WORD_F(adr, res) |
1643 | res ^= src; |
1644 | flag_C = 0; |
1645 | flag_V = 0; |
1646 | flag_NotZ = res; |
1647 | flag_N = res >> 8; |
1648 | WRITE_WORD_F(adr, res) |
1649 | POST_IO |
1650 | RET(20) |
1651 | } |
1652 | |
1653 | // EORI |
1654 | OPCODE(0x0A79) |
1655 | { |
1656 | u32 adr, res; |
1657 | u32 src, dst; |
1658 | |
1659 | FETCH_WORD(src); |
1660 | FETCH_LONG(adr); |
1661 | PRE_IO |
1662 | READ_WORD_F(adr, res) |
1663 | res ^= src; |
1664 | flag_C = 0; |
1665 | flag_V = 0; |
1666 | flag_NotZ = res; |
1667 | flag_N = res >> 8; |
1668 | WRITE_WORD_F(adr, res) |
1669 | POST_IO |
1670 | RET(24) |
1671 | } |
1672 | |
1673 | // EORI |
1674 | OPCODE(0x0A5F) |
1675 | { |
1676 | u32 adr, res; |
1677 | u32 src, dst; |
1678 | |
1679 | FETCH_WORD(src); |
1680 | adr = AREG(7); |
1681 | AREG(7) += 2; |
1682 | PRE_IO |
1683 | READ_WORD_F(adr, res) |
1684 | res ^= src; |
1685 | flag_C = 0; |
1686 | flag_V = 0; |
1687 | flag_NotZ = res; |
1688 | flag_N = res >> 8; |
1689 | WRITE_WORD_F(adr, res) |
1690 | POST_IO |
1691 | RET(16) |
1692 | } |
1693 | |
1694 | // EORI |
1695 | OPCODE(0x0A67) |
1696 | { |
1697 | u32 adr, res; |
1698 | u32 src, dst; |
1699 | |
1700 | FETCH_WORD(src); |
1701 | adr = AREG(7) - 2; |
1702 | AREG(7) = adr; |
1703 | PRE_IO |
1704 | READ_WORD_F(adr, res) |
1705 | res ^= src; |
1706 | flag_C = 0; |
1707 | flag_V = 0; |
1708 | flag_NotZ = res; |
1709 | flag_N = res >> 8; |
1710 | WRITE_WORD_F(adr, res) |
1711 | POST_IO |
1712 | RET(18) |
1713 | } |
1714 | |
1715 | // EORI |
1716 | OPCODE(0x0A80) |
1717 | { |
1718 | u32 adr, res; |
1719 | u32 src, dst; |
1720 | |
1721 | FETCH_LONG(src); |
1722 | res = DREGu32((Opcode >> 0) & 7); |
1723 | res ^= src; |
1724 | flag_C = 0; |
1725 | flag_V = 0; |
1726 | flag_NotZ = res; |
1727 | flag_N = res >> 24; |
1728 | DREGu32((Opcode >> 0) & 7) = res; |
1729 | RET(16) |
1730 | } |
1731 | |
1732 | // EORI |
1733 | OPCODE(0x0A90) |
1734 | { |
1735 | u32 adr, res; |
1736 | u32 src, dst; |
1737 | |
1738 | FETCH_LONG(src); |
1739 | adr = AREG((Opcode >> 0) & 7); |
1740 | PRE_IO |
1741 | READ_LONG_F(adr, res) |
1742 | res ^= src; |
1743 | flag_C = 0; |
1744 | flag_V = 0; |
1745 | flag_NotZ = res; |
1746 | flag_N = res >> 24; |
1747 | WRITE_LONG_F(adr, res) |
1748 | POST_IO |
1749 | RET(28) |
1750 | } |
1751 | |
1752 | // EORI |
1753 | OPCODE(0x0A98) |
1754 | { |
1755 | u32 adr, res; |
1756 | u32 src, dst; |
1757 | |
1758 | FETCH_LONG(src); |
1759 | adr = AREG((Opcode >> 0) & 7); |
1760 | AREG((Opcode >> 0) & 7) += 4; |
1761 | PRE_IO |
1762 | READ_LONG_F(adr, res) |
1763 | res ^= src; |
1764 | flag_C = 0; |
1765 | flag_V = 0; |
1766 | flag_NotZ = res; |
1767 | flag_N = res >> 24; |
1768 | WRITE_LONG_F(adr, res) |
1769 | POST_IO |
1770 | RET(28) |
1771 | } |
1772 | |
1773 | // EORI |
1774 | OPCODE(0x0AA0) |
1775 | { |
1776 | u32 adr, res; |
1777 | u32 src, dst; |
1778 | |
1779 | FETCH_LONG(src); |
1780 | adr = AREG((Opcode >> 0) & 7) - 4; |
1781 | AREG((Opcode >> 0) & 7) = adr; |
1782 | PRE_IO |
1783 | READ_LONG_F(adr, res) |
1784 | res ^= src; |
1785 | flag_C = 0; |
1786 | flag_V = 0; |
1787 | flag_NotZ = res; |
1788 | flag_N = res >> 24; |
1789 | WRITE_LONG_F(adr, res) |
1790 | POST_IO |
1791 | RET(30) |
1792 | } |
1793 | |
1794 | // EORI |
1795 | OPCODE(0x0AA8) |
1796 | { |
1797 | u32 adr, res; |
1798 | u32 src, dst; |
1799 | |
1800 | FETCH_LONG(src); |
1801 | FETCH_SWORD(adr); |
1802 | adr += AREG((Opcode >> 0) & 7); |
1803 | PRE_IO |
1804 | READ_LONG_F(adr, res) |
1805 | res ^= src; |
1806 | flag_C = 0; |
1807 | flag_V = 0; |
1808 | flag_NotZ = res; |
1809 | flag_N = res >> 24; |
1810 | WRITE_LONG_F(adr, res) |
1811 | POST_IO |
1812 | RET(32) |
1813 | } |
1814 | |
1815 | // EORI |
1816 | OPCODE(0x0AB0) |
1817 | { |
1818 | u32 adr, res; |
1819 | u32 src, dst; |
1820 | |
1821 | FETCH_LONG(src); |
1822 | adr = AREG((Opcode >> 0) & 7); |
1823 | DECODE_EXT_WORD |
1824 | PRE_IO |
1825 | READ_LONG_F(adr, res) |
1826 | res ^= src; |
1827 | flag_C = 0; |
1828 | flag_V = 0; |
1829 | flag_NotZ = res; |
1830 | flag_N = res >> 24; |
1831 | WRITE_LONG_F(adr, res) |
1832 | POST_IO |
1833 | RET(34) |
1834 | } |
1835 | |
1836 | // EORI |
1837 | OPCODE(0x0AB8) |
1838 | { |
1839 | u32 adr, res; |
1840 | u32 src, dst; |
1841 | |
1842 | FETCH_LONG(src); |
1843 | FETCH_SWORD(adr); |
1844 | PRE_IO |
1845 | READ_LONG_F(adr, res) |
1846 | res ^= src; |
1847 | flag_C = 0; |
1848 | flag_V = 0; |
1849 | flag_NotZ = res; |
1850 | flag_N = res >> 24; |
1851 | WRITE_LONG_F(adr, res) |
1852 | POST_IO |
1853 | RET(32) |
1854 | } |
1855 | |
1856 | // EORI |
1857 | OPCODE(0x0AB9) |
1858 | { |
1859 | u32 adr, res; |
1860 | u32 src, dst; |
1861 | |
1862 | FETCH_LONG(src); |
1863 | FETCH_LONG(adr); |
1864 | PRE_IO |
1865 | READ_LONG_F(adr, res) |
1866 | res ^= src; |
1867 | flag_C = 0; |
1868 | flag_V = 0; |
1869 | flag_NotZ = res; |
1870 | flag_N = res >> 24; |
1871 | WRITE_LONG_F(adr, res) |
1872 | POST_IO |
1873 | RET(36) |
1874 | } |
1875 | |
1876 | // EORI |
1877 | OPCODE(0x0A9F) |
1878 | { |
1879 | u32 adr, res; |
1880 | u32 src, dst; |
1881 | |
1882 | FETCH_LONG(src); |
1883 | adr = AREG(7); |
1884 | AREG(7) += 4; |
1885 | PRE_IO |
1886 | READ_LONG_F(adr, res) |
1887 | res ^= src; |
1888 | flag_C = 0; |
1889 | flag_V = 0; |
1890 | flag_NotZ = res; |
1891 | flag_N = res >> 24; |
1892 | WRITE_LONG_F(adr, res) |
1893 | POST_IO |
1894 | RET(28) |
1895 | } |
1896 | |
1897 | // EORI |
1898 | OPCODE(0x0AA7) |
1899 | { |
1900 | u32 adr, res; |
1901 | u32 src, dst; |
1902 | |
1903 | FETCH_LONG(src); |
1904 | adr = AREG(7) - 4; |
1905 | AREG(7) = adr; |
1906 | PRE_IO |
1907 | READ_LONG_F(adr, res) |
1908 | res ^= src; |
1909 | flag_C = 0; |
1910 | flag_V = 0; |
1911 | flag_NotZ = res; |
1912 | flag_N = res >> 24; |
1913 | WRITE_LONG_F(adr, res) |
1914 | POST_IO |
1915 | RET(30) |
1916 | } |
1917 | |
1918 | // EORICCR |
1919 | OPCODE(0x0A3C) |
1920 | { |
1921 | u32 adr, res; |
1922 | u32 src, dst; |
1923 | |
1924 | FETCH_BYTE(res); |
1925 | res &= M68K_CCR_MASK; |
1926 | res ^= GET_CCR; |
1927 | SET_CCR(res) |
1928 | RET(20) |
1929 | } |
1930 | |
1931 | // EORISR |
1932 | OPCODE(0x0A7C) |
1933 | { |
1934 | u32 adr, res; |
1935 | u32 src, dst; |
1936 | |
1937 | if (flag_S) |
1938 | { |
1939 | FETCH_WORD(res); |
1940 | res &= M68K_SR_MASK; |
1941 | res ^= GET_SR; |
1942 | SET_SR(res) |
1943 | if (!flag_S) |
1944 | { |
1945 | res = AREG(7); |
1946 | AREG(7) = ASP; |
1947 | ASP = res; |
1948 | } |
1949 | CHECK_INT_TO_JUMP(20) |
1950 | } |
1951 | else |
1952 | { |
1953 | u32 newPC = (u32)(PC) - BasePC; |
1954 | SET_PC(newPC-2); |
1955 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
03e4f2a3 |
1956 | RET(0) |
70357ce5 |
1957 | } |
1958 | RET(20) |
1959 | } |
1960 | |
1961 | // SUBI |
1962 | OPCODE(0x0400) |
1963 | { |
1964 | u32 adr, res; |
1965 | u32 src, dst; |
1966 | |
1967 | FETCH_BYTE(src); |
1968 | dst = DREGu8((Opcode >> 0) & 7); |
1969 | res = dst - src; |
1970 | flag_N = flag_X = flag_C = res; |
1971 | flag_V = (src ^ dst) & (res ^ dst); |
1972 | flag_NotZ = res & 0xFF; |
1973 | DREGu8((Opcode >> 0) & 7) = res; |
1974 | RET(8) |
1975 | } |
1976 | |
1977 | // SUBI |
1978 | OPCODE(0x0410) |
1979 | { |
1980 | u32 adr, res; |
1981 | u32 src, dst; |
1982 | |
1983 | FETCH_BYTE(src); |
1984 | adr = AREG((Opcode >> 0) & 7); |
1985 | PRE_IO |
1986 | READ_BYTE_F(adr, dst) |
1987 | res = dst - src; |
1988 | flag_N = flag_X = flag_C = res; |
1989 | flag_V = (src ^ dst) & (res ^ dst); |
1990 | flag_NotZ = res & 0xFF; |
1991 | WRITE_BYTE_F(adr, res) |
1992 | POST_IO |
1993 | RET(16) |
1994 | } |
1995 | |
1996 | // SUBI |
1997 | OPCODE(0x0418) |
1998 | { |
1999 | u32 adr, res; |
2000 | u32 src, dst; |
2001 | |
2002 | FETCH_BYTE(src); |
2003 | adr = AREG((Opcode >> 0) & 7); |
2004 | AREG((Opcode >> 0) & 7) += 1; |
2005 | PRE_IO |
2006 | READ_BYTE_F(adr, dst) |
2007 | res = dst - src; |
2008 | flag_N = flag_X = flag_C = res; |
2009 | flag_V = (src ^ dst) & (res ^ dst); |
2010 | flag_NotZ = res & 0xFF; |
2011 | WRITE_BYTE_F(adr, res) |
2012 | POST_IO |
2013 | RET(16) |
2014 | } |
2015 | |
2016 | // SUBI |
2017 | OPCODE(0x0420) |
2018 | { |
2019 | u32 adr, res; |
2020 | u32 src, dst; |
2021 | |
2022 | FETCH_BYTE(src); |
2023 | adr = AREG((Opcode >> 0) & 7) - 1; |
2024 | AREG((Opcode >> 0) & 7) = adr; |
2025 | PRE_IO |
2026 | READ_BYTE_F(adr, dst) |
2027 | res = dst - src; |
2028 | flag_N = flag_X = flag_C = res; |
2029 | flag_V = (src ^ dst) & (res ^ dst); |
2030 | flag_NotZ = res & 0xFF; |
2031 | WRITE_BYTE_F(adr, res) |
2032 | POST_IO |
2033 | RET(18) |
2034 | } |
2035 | |
2036 | // SUBI |
2037 | OPCODE(0x0428) |
2038 | { |
2039 | u32 adr, res; |
2040 | u32 src, dst; |
2041 | |
2042 | FETCH_BYTE(src); |
2043 | FETCH_SWORD(adr); |
2044 | adr += AREG((Opcode >> 0) & 7); |
2045 | PRE_IO |
2046 | READ_BYTE_F(adr, dst) |
2047 | res = dst - src; |
2048 | flag_N = flag_X = flag_C = res; |
2049 | flag_V = (src ^ dst) & (res ^ dst); |
2050 | flag_NotZ = res & 0xFF; |
2051 | WRITE_BYTE_F(adr, res) |
2052 | POST_IO |
2053 | RET(20) |
2054 | } |
2055 | |
2056 | // SUBI |
2057 | OPCODE(0x0430) |
2058 | { |
2059 | u32 adr, res; |
2060 | u32 src, dst; |
2061 | |
2062 | FETCH_BYTE(src); |
2063 | adr = AREG((Opcode >> 0) & 7); |
2064 | DECODE_EXT_WORD |
2065 | PRE_IO |
2066 | READ_BYTE_F(adr, dst) |
2067 | res = dst - src; |
2068 | flag_N = flag_X = flag_C = res; |
2069 | flag_V = (src ^ dst) & (res ^ dst); |
2070 | flag_NotZ = res & 0xFF; |
2071 | WRITE_BYTE_F(adr, res) |
2072 | POST_IO |
2073 | RET(22) |
2074 | } |
2075 | |
2076 | // SUBI |
2077 | OPCODE(0x0438) |
2078 | { |
2079 | u32 adr, res; |
2080 | u32 src, dst; |
2081 | |
2082 | FETCH_BYTE(src); |
2083 | FETCH_SWORD(adr); |
2084 | PRE_IO |
2085 | READ_BYTE_F(adr, dst) |
2086 | res = dst - src; |
2087 | flag_N = flag_X = flag_C = res; |
2088 | flag_V = (src ^ dst) & (res ^ dst); |
2089 | flag_NotZ = res & 0xFF; |
2090 | WRITE_BYTE_F(adr, res) |
2091 | POST_IO |
2092 | RET(20) |
2093 | } |
2094 | |
2095 | // SUBI |
2096 | OPCODE(0x0439) |
2097 | { |
2098 | u32 adr, res; |
2099 | u32 src, dst; |
2100 | |
2101 | FETCH_BYTE(src); |
2102 | FETCH_LONG(adr); |
2103 | PRE_IO |
2104 | READ_BYTE_F(adr, dst) |
2105 | res = dst - src; |
2106 | flag_N = flag_X = flag_C = res; |
2107 | flag_V = (src ^ dst) & (res ^ dst); |
2108 | flag_NotZ = res & 0xFF; |
2109 | WRITE_BYTE_F(adr, res) |
2110 | POST_IO |
2111 | RET(24) |
2112 | } |
2113 | |
2114 | // SUBI |
2115 | OPCODE(0x041F) |
2116 | { |
2117 | u32 adr, res; |
2118 | u32 src, dst; |
2119 | |
2120 | FETCH_BYTE(src); |
2121 | adr = AREG(7); |
2122 | AREG(7) += 2; |
2123 | PRE_IO |
2124 | READ_BYTE_F(adr, dst) |
2125 | res = dst - src; |
2126 | flag_N = flag_X = flag_C = res; |
2127 | flag_V = (src ^ dst) & (res ^ dst); |
2128 | flag_NotZ = res & 0xFF; |
2129 | WRITE_BYTE_F(adr, res) |
2130 | POST_IO |
2131 | RET(16) |
2132 | } |
2133 | |
2134 | // SUBI |
2135 | OPCODE(0x0427) |
2136 | { |
2137 | u32 adr, res; |
2138 | u32 src, dst; |
2139 | |
2140 | FETCH_BYTE(src); |
2141 | adr = AREG(7) - 2; |
2142 | AREG(7) = adr; |
2143 | PRE_IO |
2144 | READ_BYTE_F(adr, dst) |
2145 | res = dst - src; |
2146 | flag_N = flag_X = flag_C = res; |
2147 | flag_V = (src ^ dst) & (res ^ dst); |
2148 | flag_NotZ = res & 0xFF; |
2149 | WRITE_BYTE_F(adr, res) |
2150 | POST_IO |
2151 | RET(18) |
2152 | } |
2153 | |
2154 | // SUBI |
2155 | OPCODE(0x0440) |
2156 | { |
2157 | u32 adr, res; |
2158 | u32 src, dst; |
2159 | |
2160 | FETCH_WORD(src); |
2161 | dst = DREGu16((Opcode >> 0) & 7); |
2162 | res = dst - src; |
2163 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2164 | flag_N = flag_X = flag_C = res >> 8; |
2165 | flag_NotZ = res & 0xFFFF; |
2166 | DREGu16((Opcode >> 0) & 7) = res; |
2167 | RET(8) |
2168 | } |
2169 | |
2170 | // SUBI |
2171 | OPCODE(0x0450) |
2172 | { |
2173 | u32 adr, res; |
2174 | u32 src, dst; |
2175 | |
2176 | FETCH_WORD(src); |
2177 | adr = AREG((Opcode >> 0) & 7); |
2178 | PRE_IO |
2179 | READ_WORD_F(adr, dst) |
2180 | res = dst - src; |
2181 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2182 | flag_N = flag_X = flag_C = res >> 8; |
2183 | flag_NotZ = res & 0xFFFF; |
2184 | WRITE_WORD_F(adr, res) |
2185 | POST_IO |
2186 | RET(16) |
2187 | } |
2188 | |
2189 | // SUBI |
2190 | OPCODE(0x0458) |
2191 | { |
2192 | u32 adr, res; |
2193 | u32 src, dst; |
2194 | |
2195 | FETCH_WORD(src); |
2196 | adr = AREG((Opcode >> 0) & 7); |
2197 | AREG((Opcode >> 0) & 7) += 2; |
2198 | PRE_IO |
2199 | READ_WORD_F(adr, dst) |
2200 | res = dst - src; |
2201 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2202 | flag_N = flag_X = flag_C = res >> 8; |
2203 | flag_NotZ = res & 0xFFFF; |
2204 | WRITE_WORD_F(adr, res) |
2205 | POST_IO |
2206 | RET(16) |
2207 | } |
2208 | |
2209 | // SUBI |
2210 | OPCODE(0x0460) |
2211 | { |
2212 | u32 adr, res; |
2213 | u32 src, dst; |
2214 | |
2215 | FETCH_WORD(src); |
2216 | adr = AREG((Opcode >> 0) & 7) - 2; |
2217 | AREG((Opcode >> 0) & 7) = adr; |
2218 | PRE_IO |
2219 | READ_WORD_F(adr, dst) |
2220 | res = dst - src; |
2221 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2222 | flag_N = flag_X = flag_C = res >> 8; |
2223 | flag_NotZ = res & 0xFFFF; |
2224 | WRITE_WORD_F(adr, res) |
2225 | POST_IO |
2226 | RET(18) |
2227 | } |
2228 | |
2229 | // SUBI |
2230 | OPCODE(0x0468) |
2231 | { |
2232 | u32 adr, res; |
2233 | u32 src, dst; |
2234 | |
2235 | FETCH_WORD(src); |
2236 | FETCH_SWORD(adr); |
2237 | adr += AREG((Opcode >> 0) & 7); |
2238 | PRE_IO |
2239 | READ_WORD_F(adr, dst) |
2240 | res = dst - src; |
2241 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2242 | flag_N = flag_X = flag_C = res >> 8; |
2243 | flag_NotZ = res & 0xFFFF; |
2244 | WRITE_WORD_F(adr, res) |
2245 | POST_IO |
2246 | RET(20) |
2247 | } |
2248 | |
2249 | // SUBI |
2250 | OPCODE(0x0470) |
2251 | { |
2252 | u32 adr, res; |
2253 | u32 src, dst; |
2254 | |
2255 | FETCH_WORD(src); |
2256 | adr = AREG((Opcode >> 0) & 7); |
2257 | DECODE_EXT_WORD |
2258 | PRE_IO |
2259 | READ_WORD_F(adr, dst) |
2260 | res = dst - src; |
2261 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2262 | flag_N = flag_X = flag_C = res >> 8; |
2263 | flag_NotZ = res & 0xFFFF; |
2264 | WRITE_WORD_F(adr, res) |
2265 | POST_IO |
2266 | RET(22) |
2267 | } |
2268 | |
2269 | // SUBI |
2270 | OPCODE(0x0478) |
2271 | { |
2272 | u32 adr, res; |
2273 | u32 src, dst; |
2274 | |
2275 | FETCH_WORD(src); |
2276 | FETCH_SWORD(adr); |
2277 | PRE_IO |
2278 | READ_WORD_F(adr, dst) |
2279 | res = dst - src; |
2280 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2281 | flag_N = flag_X = flag_C = res >> 8; |
2282 | flag_NotZ = res & 0xFFFF; |
2283 | WRITE_WORD_F(adr, res) |
2284 | POST_IO |
2285 | RET(20) |
2286 | } |
2287 | |
2288 | // SUBI |
2289 | OPCODE(0x0479) |
2290 | { |
2291 | u32 adr, res; |
2292 | u32 src, dst; |
2293 | |
2294 | FETCH_WORD(src); |
2295 | FETCH_LONG(adr); |
2296 | PRE_IO |
2297 | READ_WORD_F(adr, dst) |
2298 | res = dst - src; |
2299 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2300 | flag_N = flag_X = flag_C = res >> 8; |
2301 | flag_NotZ = res & 0xFFFF; |
2302 | WRITE_WORD_F(adr, res) |
2303 | POST_IO |
2304 | RET(24) |
2305 | } |
2306 | |
2307 | // SUBI |
2308 | OPCODE(0x045F) |
2309 | { |
2310 | u32 adr, res; |
2311 | u32 src, dst; |
2312 | |
2313 | FETCH_WORD(src); |
2314 | adr = AREG(7); |
2315 | AREG(7) += 2; |
2316 | PRE_IO |
2317 | READ_WORD_F(adr, dst) |
2318 | res = dst - src; |
2319 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2320 | flag_N = flag_X = flag_C = res >> 8; |
2321 | flag_NotZ = res & 0xFFFF; |
2322 | WRITE_WORD_F(adr, res) |
2323 | POST_IO |
2324 | RET(16) |
2325 | } |
2326 | |
2327 | // SUBI |
2328 | OPCODE(0x0467) |
2329 | { |
2330 | u32 adr, res; |
2331 | u32 src, dst; |
2332 | |
2333 | FETCH_WORD(src); |
2334 | adr = AREG(7) - 2; |
2335 | AREG(7) = adr; |
2336 | PRE_IO |
2337 | READ_WORD_F(adr, dst) |
2338 | res = dst - src; |
2339 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2340 | flag_N = flag_X = flag_C = res >> 8; |
2341 | flag_NotZ = res & 0xFFFF; |
2342 | WRITE_WORD_F(adr, res) |
2343 | POST_IO |
2344 | RET(18) |
2345 | } |
2346 | |
2347 | // SUBI |
2348 | OPCODE(0x0480) |
2349 | { |
2350 | u32 adr, res; |
2351 | u32 src, dst; |
2352 | |
2353 | FETCH_LONG(src); |
2354 | dst = DREGu32((Opcode >> 0) & 7); |
2355 | res = dst - src; |
2356 | flag_NotZ = res; |
2357 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2358 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2359 | flag_N = res >> 24; |
2360 | DREGu32((Opcode >> 0) & 7) = res; |
2361 | RET(16) |
2362 | } |
2363 | |
2364 | // SUBI |
2365 | OPCODE(0x0490) |
2366 | { |
2367 | u32 adr, res; |
2368 | u32 src, dst; |
2369 | |
2370 | FETCH_LONG(src); |
2371 | adr = AREG((Opcode >> 0) & 7); |
2372 | PRE_IO |
2373 | READ_LONG_F(adr, dst) |
2374 | res = dst - src; |
2375 | flag_NotZ = res; |
2376 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2377 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2378 | flag_N = res >> 24; |
2379 | WRITE_LONG_F(adr, res) |
2380 | POST_IO |
2381 | RET(28) |
2382 | } |
2383 | |
2384 | // SUBI |
2385 | OPCODE(0x0498) |
2386 | { |
2387 | u32 adr, res; |
2388 | u32 src, dst; |
2389 | |
2390 | FETCH_LONG(src); |
2391 | adr = AREG((Opcode >> 0) & 7); |
2392 | AREG((Opcode >> 0) & 7) += 4; |
2393 | PRE_IO |
2394 | READ_LONG_F(adr, dst) |
2395 | res = dst - src; |
2396 | flag_NotZ = res; |
2397 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2398 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2399 | flag_N = res >> 24; |
2400 | WRITE_LONG_F(adr, res) |
2401 | POST_IO |
2402 | RET(28) |
2403 | } |
2404 | |
2405 | // SUBI |
2406 | OPCODE(0x04A0) |
2407 | { |
2408 | u32 adr, res; |
2409 | u32 src, dst; |
2410 | |
2411 | FETCH_LONG(src); |
2412 | adr = AREG((Opcode >> 0) & 7) - 4; |
2413 | AREG((Opcode >> 0) & 7) = adr; |
2414 | PRE_IO |
2415 | READ_LONG_F(adr, dst) |
2416 | res = dst - src; |
2417 | flag_NotZ = res; |
2418 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2419 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2420 | flag_N = res >> 24; |
2421 | WRITE_LONG_F(adr, res) |
2422 | POST_IO |
2423 | RET(30) |
2424 | } |
2425 | |
2426 | // SUBI |
2427 | OPCODE(0x04A8) |
2428 | { |
2429 | u32 adr, res; |
2430 | u32 src, dst; |
2431 | |
2432 | FETCH_LONG(src); |
2433 | FETCH_SWORD(adr); |
2434 | adr += AREG((Opcode >> 0) & 7); |
2435 | PRE_IO |
2436 | READ_LONG_F(adr, dst) |
2437 | res = dst - src; |
2438 | flag_NotZ = res; |
2439 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2440 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2441 | flag_N = res >> 24; |
2442 | WRITE_LONG_F(adr, res) |
2443 | POST_IO |
2444 | RET(32) |
2445 | } |
2446 | |
2447 | // SUBI |
2448 | OPCODE(0x04B0) |
2449 | { |
2450 | u32 adr, res; |
2451 | u32 src, dst; |
2452 | |
2453 | FETCH_LONG(src); |
2454 | adr = AREG((Opcode >> 0) & 7); |
2455 | DECODE_EXT_WORD |
2456 | PRE_IO |
2457 | READ_LONG_F(adr, dst) |
2458 | res = dst - src; |
2459 | flag_NotZ = res; |
2460 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2461 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2462 | flag_N = res >> 24; |
2463 | WRITE_LONG_F(adr, res) |
2464 | POST_IO |
2465 | RET(34) |
2466 | } |
2467 | |
2468 | // SUBI |
2469 | OPCODE(0x04B8) |
2470 | { |
2471 | u32 adr, res; |
2472 | u32 src, dst; |
2473 | |
2474 | FETCH_LONG(src); |
2475 | FETCH_SWORD(adr); |
2476 | PRE_IO |
2477 | READ_LONG_F(adr, dst) |
2478 | res = dst - src; |
2479 | flag_NotZ = res; |
2480 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2481 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2482 | flag_N = res >> 24; |
2483 | WRITE_LONG_F(adr, res) |
2484 | POST_IO |
2485 | RET(32) |
2486 | } |
2487 | |
2488 | // SUBI |
2489 | OPCODE(0x04B9) |
2490 | { |
2491 | u32 adr, res; |
2492 | u32 src, dst; |
2493 | |
2494 | FETCH_LONG(src); |
2495 | FETCH_LONG(adr); |
2496 | PRE_IO |
2497 | READ_LONG_F(adr, dst) |
2498 | res = dst - src; |
2499 | flag_NotZ = res; |
2500 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2501 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2502 | flag_N = res >> 24; |
2503 | WRITE_LONG_F(adr, res) |
2504 | POST_IO |
2505 | RET(36) |
2506 | } |
2507 | |
2508 | // SUBI |
2509 | OPCODE(0x049F) |
2510 | { |
2511 | u32 adr, res; |
2512 | u32 src, dst; |
2513 | |
2514 | FETCH_LONG(src); |
2515 | adr = AREG(7); |
2516 | AREG(7) += 4; |
2517 | PRE_IO |
2518 | READ_LONG_F(adr, dst) |
2519 | res = dst - src; |
2520 | flag_NotZ = res; |
2521 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2522 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2523 | flag_N = res >> 24; |
2524 | WRITE_LONG_F(adr, res) |
2525 | POST_IO |
2526 | RET(28) |
2527 | } |
2528 | |
2529 | // SUBI |
2530 | OPCODE(0x04A7) |
2531 | { |
2532 | u32 adr, res; |
2533 | u32 src, dst; |
2534 | |
2535 | FETCH_LONG(src); |
2536 | adr = AREG(7) - 4; |
2537 | AREG(7) = adr; |
2538 | PRE_IO |
2539 | READ_LONG_F(adr, dst) |
2540 | res = dst - src; |
2541 | flag_NotZ = res; |
2542 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2543 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2544 | flag_N = res >> 24; |
2545 | WRITE_LONG_F(adr, res) |
2546 | POST_IO |
2547 | RET(30) |
2548 | } |
2549 | |
2550 | // ADDI |
2551 | OPCODE(0x0600) |
2552 | { |
2553 | u32 adr, res; |
2554 | u32 src, dst; |
2555 | |
2556 | FETCH_BYTE(src); |
2557 | dst = DREGu8((Opcode >> 0) & 7); |
2558 | res = dst + src; |
2559 | flag_N = flag_X = flag_C = res; |
2560 | flag_V = (src ^ res) & (dst ^ res); |
2561 | flag_NotZ = res & 0xFF; |
2562 | DREGu8((Opcode >> 0) & 7) = res; |
2563 | RET(8) |
2564 | } |
2565 | |
2566 | // ADDI |
2567 | OPCODE(0x0610) |
2568 | { |
2569 | u32 adr, res; |
2570 | u32 src, dst; |
2571 | |
2572 | FETCH_BYTE(src); |
2573 | adr = AREG((Opcode >> 0) & 7); |
2574 | PRE_IO |
2575 | READ_BYTE_F(adr, dst) |
2576 | res = dst + src; |
2577 | flag_N = flag_X = flag_C = res; |
2578 | flag_V = (src ^ res) & (dst ^ res); |
2579 | flag_NotZ = res & 0xFF; |
2580 | WRITE_BYTE_F(adr, res) |
2581 | POST_IO |
2582 | RET(16) |
2583 | } |
2584 | |
2585 | // ADDI |
2586 | OPCODE(0x0618) |
2587 | { |
2588 | u32 adr, res; |
2589 | u32 src, dst; |
2590 | |
2591 | FETCH_BYTE(src); |
2592 | adr = AREG((Opcode >> 0) & 7); |
2593 | AREG((Opcode >> 0) & 7) += 1; |
2594 | PRE_IO |
2595 | READ_BYTE_F(adr, dst) |
2596 | res = dst + src; |
2597 | flag_N = flag_X = flag_C = res; |
2598 | flag_V = (src ^ res) & (dst ^ res); |
2599 | flag_NotZ = res & 0xFF; |
2600 | WRITE_BYTE_F(adr, res) |
2601 | POST_IO |
2602 | RET(16) |
2603 | } |
2604 | |
2605 | // ADDI |
2606 | OPCODE(0x0620) |
2607 | { |
2608 | u32 adr, res; |
2609 | u32 src, dst; |
2610 | |
2611 | FETCH_BYTE(src); |
2612 | adr = AREG((Opcode >> 0) & 7) - 1; |
2613 | AREG((Opcode >> 0) & 7) = adr; |
2614 | PRE_IO |
2615 | READ_BYTE_F(adr, dst) |
2616 | res = dst + src; |
2617 | flag_N = flag_X = flag_C = res; |
2618 | flag_V = (src ^ res) & (dst ^ res); |
2619 | flag_NotZ = res & 0xFF; |
2620 | WRITE_BYTE_F(adr, res) |
2621 | POST_IO |
2622 | RET(18) |
2623 | } |
2624 | |
2625 | // ADDI |
2626 | OPCODE(0x0628) |
2627 | { |
2628 | u32 adr, res; |
2629 | u32 src, dst; |
2630 | |
2631 | FETCH_BYTE(src); |
2632 | FETCH_SWORD(adr); |
2633 | adr += AREG((Opcode >> 0) & 7); |
2634 | PRE_IO |
2635 | READ_BYTE_F(adr, dst) |
2636 | res = dst + src; |
2637 | flag_N = flag_X = flag_C = res; |
2638 | flag_V = (src ^ res) & (dst ^ res); |
2639 | flag_NotZ = res & 0xFF; |
2640 | WRITE_BYTE_F(adr, res) |
2641 | POST_IO |
2642 | RET(20) |
2643 | } |
2644 | |
2645 | // ADDI |
2646 | OPCODE(0x0630) |
2647 | { |
2648 | u32 adr, res; |
2649 | u32 src, dst; |
2650 | |
2651 | FETCH_BYTE(src); |
2652 | adr = AREG((Opcode >> 0) & 7); |
2653 | DECODE_EXT_WORD |
2654 | PRE_IO |
2655 | READ_BYTE_F(adr, dst) |
2656 | res = dst + src; |
2657 | flag_N = flag_X = flag_C = res; |
2658 | flag_V = (src ^ res) & (dst ^ res); |
2659 | flag_NotZ = res & 0xFF; |
2660 | WRITE_BYTE_F(adr, res) |
2661 | POST_IO |
2662 | RET(22) |
2663 | } |
2664 | |
2665 | // ADDI |
2666 | OPCODE(0x0638) |
2667 | { |
2668 | u32 adr, res; |
2669 | u32 src, dst; |
2670 | |
2671 | FETCH_BYTE(src); |
2672 | FETCH_SWORD(adr); |
2673 | PRE_IO |
2674 | READ_BYTE_F(adr, dst) |
2675 | res = dst + src; |
2676 | flag_N = flag_X = flag_C = res; |
2677 | flag_V = (src ^ res) & (dst ^ res); |
2678 | flag_NotZ = res & 0xFF; |
2679 | WRITE_BYTE_F(adr, res) |
2680 | POST_IO |
2681 | RET(20) |
2682 | } |
2683 | |
2684 | // ADDI |
2685 | OPCODE(0x0639) |
2686 | { |
2687 | u32 adr, res; |
2688 | u32 src, dst; |
2689 | |
2690 | FETCH_BYTE(src); |
2691 | FETCH_LONG(adr); |
2692 | PRE_IO |
2693 | READ_BYTE_F(adr, dst) |
2694 | res = dst + src; |
2695 | flag_N = flag_X = flag_C = res; |
2696 | flag_V = (src ^ res) & (dst ^ res); |
2697 | flag_NotZ = res & 0xFF; |
2698 | WRITE_BYTE_F(adr, res) |
2699 | POST_IO |
2700 | RET(24) |
2701 | } |
2702 | |
2703 | // ADDI |
2704 | OPCODE(0x061F) |
2705 | { |
2706 | u32 adr, res; |
2707 | u32 src, dst; |
2708 | |
2709 | FETCH_BYTE(src); |
2710 | adr = AREG(7); |
2711 | AREG(7) += 2; |
2712 | PRE_IO |
2713 | READ_BYTE_F(adr, dst) |
2714 | res = dst + src; |
2715 | flag_N = flag_X = flag_C = res; |
2716 | flag_V = (src ^ res) & (dst ^ res); |
2717 | flag_NotZ = res & 0xFF; |
2718 | WRITE_BYTE_F(adr, res) |
2719 | POST_IO |
2720 | RET(16) |
2721 | } |
2722 | |
2723 | // ADDI |
2724 | OPCODE(0x0627) |
2725 | { |
2726 | u32 adr, res; |
2727 | u32 src, dst; |
2728 | |
2729 | FETCH_BYTE(src); |
2730 | adr = AREG(7) - 2; |
2731 | AREG(7) = adr; |
2732 | PRE_IO |
2733 | READ_BYTE_F(adr, dst) |
2734 | res = dst + src; |
2735 | flag_N = flag_X = flag_C = res; |
2736 | flag_V = (src ^ res) & (dst ^ res); |
2737 | flag_NotZ = res & 0xFF; |
2738 | WRITE_BYTE_F(adr, res) |
2739 | POST_IO |
2740 | RET(18) |
2741 | } |
2742 | |
2743 | // ADDI |
2744 | OPCODE(0x0640) |
2745 | { |
2746 | u32 adr, res; |
2747 | u32 src, dst; |
2748 | |
2749 | FETCH_WORD(src); |
2750 | dst = DREGu16((Opcode >> 0) & 7); |
2751 | res = dst + src; |
2752 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2753 | flag_N = flag_X = flag_C = res >> 8; |
2754 | flag_NotZ = res & 0xFFFF; |
2755 | DREGu16((Opcode >> 0) & 7) = res; |
2756 | RET(8) |
2757 | } |
2758 | |
2759 | // ADDI |
2760 | OPCODE(0x0650) |
2761 | { |
2762 | u32 adr, res; |
2763 | u32 src, dst; |
2764 | |
2765 | FETCH_WORD(src); |
2766 | adr = AREG((Opcode >> 0) & 7); |
2767 | PRE_IO |
2768 | READ_WORD_F(adr, dst) |
2769 | res = dst + src; |
2770 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2771 | flag_N = flag_X = flag_C = res >> 8; |
2772 | flag_NotZ = res & 0xFFFF; |
2773 | WRITE_WORD_F(adr, res) |
2774 | POST_IO |
2775 | RET(16) |
2776 | } |
2777 | |
2778 | // ADDI |
2779 | OPCODE(0x0658) |
2780 | { |
2781 | u32 adr, res; |
2782 | u32 src, dst; |
2783 | |
2784 | FETCH_WORD(src); |
2785 | adr = AREG((Opcode >> 0) & 7); |
2786 | AREG((Opcode >> 0) & 7) += 2; |
2787 | PRE_IO |
2788 | READ_WORD_F(adr, dst) |
2789 | res = dst + src; |
2790 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2791 | flag_N = flag_X = flag_C = res >> 8; |
2792 | flag_NotZ = res & 0xFFFF; |
2793 | WRITE_WORD_F(adr, res) |
2794 | POST_IO |
2795 | RET(16) |
2796 | } |
2797 | |
2798 | // ADDI |
2799 | OPCODE(0x0660) |
2800 | { |
2801 | u32 adr, res; |
2802 | u32 src, dst; |
2803 | |
2804 | FETCH_WORD(src); |
2805 | adr = AREG((Opcode >> 0) & 7) - 2; |
2806 | AREG((Opcode >> 0) & 7) = adr; |
2807 | PRE_IO |
2808 | READ_WORD_F(adr, dst) |
2809 | res = dst + src; |
2810 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2811 | flag_N = flag_X = flag_C = res >> 8; |
2812 | flag_NotZ = res & 0xFFFF; |
2813 | WRITE_WORD_F(adr, res) |
2814 | POST_IO |
2815 | RET(18) |
2816 | } |
2817 | |
2818 | // ADDI |
2819 | OPCODE(0x0668) |
2820 | { |
2821 | u32 adr, res; |
2822 | u32 src, dst; |
2823 | |
2824 | FETCH_WORD(src); |
2825 | FETCH_SWORD(adr); |
2826 | adr += AREG((Opcode >> 0) & 7); |
2827 | PRE_IO |
2828 | READ_WORD_F(adr, dst) |
2829 | res = dst + src; |
2830 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2831 | flag_N = flag_X = flag_C = res >> 8; |
2832 | flag_NotZ = res & 0xFFFF; |
2833 | WRITE_WORD_F(adr, res) |
2834 | POST_IO |
2835 | RET(20) |
2836 | } |
2837 | |
2838 | // ADDI |
2839 | OPCODE(0x0670) |
2840 | { |
2841 | u32 adr, res; |
2842 | u32 src, dst; |
2843 | |
2844 | FETCH_WORD(src); |
2845 | adr = AREG((Opcode >> 0) & 7); |
2846 | DECODE_EXT_WORD |
2847 | PRE_IO |
2848 | READ_WORD_F(adr, dst) |
2849 | res = dst + src; |
2850 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2851 | flag_N = flag_X = flag_C = res >> 8; |
2852 | flag_NotZ = res & 0xFFFF; |
2853 | WRITE_WORD_F(adr, res) |
2854 | POST_IO |
2855 | RET(22) |
2856 | } |
2857 | |
2858 | // ADDI |
2859 | OPCODE(0x0678) |
2860 | { |
2861 | u32 adr, res; |
2862 | u32 src, dst; |
2863 | |
2864 | FETCH_WORD(src); |
2865 | FETCH_SWORD(adr); |
2866 | PRE_IO |
2867 | READ_WORD_F(adr, dst) |
2868 | res = dst + src; |
2869 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2870 | flag_N = flag_X = flag_C = res >> 8; |
2871 | flag_NotZ = res & 0xFFFF; |
2872 | WRITE_WORD_F(adr, res) |
2873 | POST_IO |
2874 | RET(20) |
2875 | } |
2876 | |
2877 | // ADDI |
2878 | OPCODE(0x0679) |
2879 | { |
2880 | u32 adr, res; |
2881 | u32 src, dst; |
2882 | |
2883 | FETCH_WORD(src); |
2884 | FETCH_LONG(adr); |
2885 | PRE_IO |
2886 | READ_WORD_F(adr, dst) |
2887 | res = dst + src; |
2888 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2889 | flag_N = flag_X = flag_C = res >> 8; |
2890 | flag_NotZ = res & 0xFFFF; |
2891 | WRITE_WORD_F(adr, res) |
2892 | POST_IO |
2893 | RET(24) |
2894 | } |
2895 | |
2896 | // ADDI |
2897 | OPCODE(0x065F) |
2898 | { |
2899 | u32 adr, res; |
2900 | u32 src, dst; |
2901 | |
2902 | FETCH_WORD(src); |
2903 | adr = AREG(7); |
2904 | AREG(7) += 2; |
2905 | PRE_IO |
2906 | READ_WORD_F(adr, dst) |
2907 | res = dst + src; |
2908 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2909 | flag_N = flag_X = flag_C = res >> 8; |
2910 | flag_NotZ = res & 0xFFFF; |
2911 | WRITE_WORD_F(adr, res) |
2912 | POST_IO |
2913 | RET(16) |
2914 | } |
2915 | |
2916 | // ADDI |
2917 | OPCODE(0x0667) |
2918 | { |
2919 | u32 adr, res; |
2920 | u32 src, dst; |
2921 | |
2922 | FETCH_WORD(src); |
2923 | adr = AREG(7) - 2; |
2924 | AREG(7) = adr; |
2925 | PRE_IO |
2926 | READ_WORD_F(adr, dst) |
2927 | res = dst + src; |
2928 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2929 | flag_N = flag_X = flag_C = res >> 8; |
2930 | flag_NotZ = res & 0xFFFF; |
2931 | WRITE_WORD_F(adr, res) |
2932 | POST_IO |
2933 | RET(18) |
2934 | } |
2935 | |
2936 | // ADDI |
2937 | OPCODE(0x0680) |
2938 | { |
2939 | u32 adr, res; |
2940 | u32 src, dst; |
2941 | |
2942 | FETCH_LONG(src); |
2943 | dst = DREGu32((Opcode >> 0) & 7); |
2944 | res = dst + src; |
2945 | flag_NotZ = res; |
2946 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2947 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2948 | flag_N = res >> 24; |
2949 | DREGu32((Opcode >> 0) & 7) = res; |
2950 | RET(16) |
2951 | } |
2952 | |
2953 | // ADDI |
2954 | OPCODE(0x0690) |
2955 | { |
2956 | u32 adr, res; |
2957 | u32 src, dst; |
2958 | |
2959 | FETCH_LONG(src); |
2960 | adr = AREG((Opcode >> 0) & 7); |
2961 | PRE_IO |
2962 | READ_LONG_F(adr, dst) |
2963 | res = dst + src; |
2964 | flag_NotZ = res; |
2965 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2966 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2967 | flag_N = res >> 24; |
2968 | WRITE_LONG_F(adr, res) |
2969 | POST_IO |
2970 | RET(28) |
2971 | } |
2972 | |
2973 | // ADDI |
2974 | OPCODE(0x0698) |
2975 | { |
2976 | u32 adr, res; |
2977 | u32 src, dst; |
2978 | |
2979 | FETCH_LONG(src); |
2980 | adr = AREG((Opcode >> 0) & 7); |
2981 | AREG((Opcode >> 0) & 7) += 4; |
2982 | PRE_IO |
2983 | READ_LONG_F(adr, dst) |
2984 | res = dst + src; |
2985 | flag_NotZ = res; |
2986 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2987 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2988 | flag_N = res >> 24; |
2989 | WRITE_LONG_F(adr, res) |
2990 | POST_IO |
2991 | RET(28) |
2992 | } |
2993 | |
2994 | // ADDI |
2995 | OPCODE(0x06A0) |
2996 | { |
2997 | u32 adr, res; |
2998 | u32 src, dst; |
2999 | |
3000 | FETCH_LONG(src); |
3001 | adr = AREG((Opcode >> 0) & 7) - 4; |
3002 | AREG((Opcode >> 0) & 7) = adr; |
3003 | PRE_IO |
3004 | READ_LONG_F(adr, dst) |
3005 | res = dst + src; |
3006 | flag_NotZ = res; |
3007 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3008 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3009 | flag_N = res >> 24; |
3010 | WRITE_LONG_F(adr, res) |
3011 | POST_IO |
3012 | RET(30) |
3013 | } |
3014 | |
3015 | // ADDI |
3016 | OPCODE(0x06A8) |
3017 | { |
3018 | u32 adr, res; |
3019 | u32 src, dst; |
3020 | |
3021 | FETCH_LONG(src); |
3022 | FETCH_SWORD(adr); |
3023 | adr += AREG((Opcode >> 0) & 7); |
3024 | PRE_IO |
3025 | READ_LONG_F(adr, dst) |
3026 | res = dst + src; |
3027 | flag_NotZ = res; |
3028 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3029 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3030 | flag_N = res >> 24; |
3031 | WRITE_LONG_F(adr, res) |
3032 | POST_IO |
3033 | RET(32) |
3034 | } |
3035 | |
3036 | // ADDI |
3037 | OPCODE(0x06B0) |
3038 | { |
3039 | u32 adr, res; |
3040 | u32 src, dst; |
3041 | |
3042 | FETCH_LONG(src); |
3043 | adr = AREG((Opcode >> 0) & 7); |
3044 | DECODE_EXT_WORD |
3045 | PRE_IO |
3046 | READ_LONG_F(adr, dst) |
3047 | res = dst + src; |
3048 | flag_NotZ = res; |
3049 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3050 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3051 | flag_N = res >> 24; |
3052 | WRITE_LONG_F(adr, res) |
3053 | POST_IO |
3054 | RET(34) |
3055 | } |
3056 | |
3057 | // ADDI |
3058 | OPCODE(0x06B8) |
3059 | { |
3060 | u32 adr, res; |
3061 | u32 src, dst; |
3062 | |
3063 | FETCH_LONG(src); |
3064 | FETCH_SWORD(adr); |
3065 | PRE_IO |
3066 | READ_LONG_F(adr, dst) |
3067 | res = dst + src; |
3068 | flag_NotZ = res; |
3069 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3070 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3071 | flag_N = res >> 24; |
3072 | WRITE_LONG_F(adr, res) |
3073 | POST_IO |
3074 | RET(32) |
3075 | } |
3076 | |
3077 | // ADDI |
3078 | OPCODE(0x06B9) |
3079 | { |
3080 | u32 adr, res; |
3081 | u32 src, dst; |
3082 | |
3083 | FETCH_LONG(src); |
3084 | FETCH_LONG(adr); |
3085 | PRE_IO |
3086 | READ_LONG_F(adr, dst) |
3087 | res = dst + src; |
3088 | flag_NotZ = res; |
3089 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3090 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3091 | flag_N = res >> 24; |
3092 | WRITE_LONG_F(adr, res) |
3093 | POST_IO |
3094 | RET(36) |
3095 | } |
3096 | |
3097 | // ADDI |
3098 | OPCODE(0x069F) |
3099 | { |
3100 | u32 adr, res; |
3101 | u32 src, dst; |
3102 | |
3103 | FETCH_LONG(src); |
3104 | adr = AREG(7); |
3105 | AREG(7) += 4; |
3106 | PRE_IO |
3107 | READ_LONG_F(adr, dst) |
3108 | res = dst + src; |
3109 | flag_NotZ = res; |
3110 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3111 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3112 | flag_N = res >> 24; |
3113 | WRITE_LONG_F(adr, res) |
3114 | POST_IO |
3115 | RET(28) |
3116 | } |
3117 | |
3118 | // ADDI |
3119 | OPCODE(0x06A7) |
3120 | { |
3121 | u32 adr, res; |
3122 | u32 src, dst; |
3123 | |
3124 | FETCH_LONG(src); |
3125 | adr = AREG(7) - 4; |
3126 | AREG(7) = adr; |
3127 | PRE_IO |
3128 | READ_LONG_F(adr, dst) |
3129 | res = dst + src; |
3130 | flag_NotZ = res; |
3131 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3132 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3133 | flag_N = res >> 24; |
3134 | WRITE_LONG_F(adr, res) |
3135 | POST_IO |
3136 | RET(30) |
3137 | } |
3138 | |
3139 | // CMPI |
3140 | OPCODE(0x0C00) |
3141 | { |
3142 | u32 adr, res; |
3143 | u32 src, dst; |
3144 | |
3145 | FETCH_BYTE(src); |
3146 | dst = DREGu8((Opcode >> 0) & 7); |
3147 | res = dst - src; |
3148 | flag_N = flag_C = res; |
3149 | flag_V = (src ^ dst) & (res ^ dst); |
3150 | flag_NotZ = res & 0xFF; |
3151 | RET(8) |
3152 | } |
3153 | |
3154 | // CMPI |
3155 | OPCODE(0x0C10) |
3156 | { |
3157 | u32 adr, res; |
3158 | u32 src, dst; |
3159 | |
3160 | FETCH_BYTE(src); |
3161 | adr = AREG((Opcode >> 0) & 7); |
3162 | PRE_IO |
3163 | READ_BYTE_F(adr, dst) |
3164 | res = dst - src; |
3165 | flag_N = flag_C = res; |
3166 | flag_V = (src ^ dst) & (res ^ dst); |
3167 | flag_NotZ = res & 0xFF; |
3168 | POST_IO |
3169 | RET(12) |
3170 | } |
3171 | |
3172 | // CMPI |
3173 | OPCODE(0x0C18) |
3174 | { |
3175 | u32 adr, res; |
3176 | u32 src, dst; |
3177 | |
3178 | FETCH_BYTE(src); |
3179 | adr = AREG((Opcode >> 0) & 7); |
3180 | AREG((Opcode >> 0) & 7) += 1; |
3181 | PRE_IO |
3182 | READ_BYTE_F(adr, dst) |
3183 | res = dst - src; |
3184 | flag_N = flag_C = res; |
3185 | flag_V = (src ^ dst) & (res ^ dst); |
3186 | flag_NotZ = res & 0xFF; |
3187 | POST_IO |
3188 | RET(12) |
3189 | } |
3190 | |
3191 | // CMPI |
3192 | OPCODE(0x0C20) |
3193 | { |
3194 | u32 adr, res; |
3195 | u32 src, dst; |
3196 | |
3197 | FETCH_BYTE(src); |
3198 | adr = AREG((Opcode >> 0) & 7) - 1; |
3199 | AREG((Opcode >> 0) & 7) = adr; |
3200 | PRE_IO |
3201 | READ_BYTE_F(adr, dst) |
3202 | res = dst - src; |
3203 | flag_N = flag_C = res; |
3204 | flag_V = (src ^ dst) & (res ^ dst); |
3205 | flag_NotZ = res & 0xFF; |
3206 | POST_IO |
3207 | RET(14) |
3208 | } |
3209 | |
3210 | // CMPI |
3211 | OPCODE(0x0C28) |
3212 | { |
3213 | u32 adr, res; |
3214 | u32 src, dst; |
3215 | |
3216 | FETCH_BYTE(src); |
3217 | FETCH_SWORD(adr); |
3218 | adr += AREG((Opcode >> 0) & 7); |
3219 | PRE_IO |
3220 | READ_BYTE_F(adr, dst) |
3221 | res = dst - src; |
3222 | flag_N = flag_C = res; |
3223 | flag_V = (src ^ dst) & (res ^ dst); |
3224 | flag_NotZ = res & 0xFF; |
3225 | POST_IO |
3226 | RET(16) |
3227 | } |
3228 | |
3229 | // CMPI |
3230 | OPCODE(0x0C30) |
3231 | { |
3232 | u32 adr, res; |
3233 | u32 src, dst; |
3234 | |
3235 | FETCH_BYTE(src); |
3236 | adr = AREG((Opcode >> 0) & 7); |
3237 | DECODE_EXT_WORD |
3238 | PRE_IO |
3239 | READ_BYTE_F(adr, dst) |
3240 | res = dst - src; |
3241 | flag_N = flag_C = res; |
3242 | flag_V = (src ^ dst) & (res ^ dst); |
3243 | flag_NotZ = res & 0xFF; |
3244 | POST_IO |
3245 | RET(18) |
3246 | } |
3247 | |
3248 | // CMPI |
3249 | OPCODE(0x0C38) |
3250 | { |
3251 | u32 adr, res; |
3252 | u32 src, dst; |
3253 | |
3254 | FETCH_BYTE(src); |
3255 | FETCH_SWORD(adr); |
3256 | PRE_IO |
3257 | READ_BYTE_F(adr, dst) |
3258 | res = dst - src; |
3259 | flag_N = flag_C = res; |
3260 | flag_V = (src ^ dst) & (res ^ dst); |
3261 | flag_NotZ = res & 0xFF; |
3262 | POST_IO |
3263 | RET(16) |
3264 | } |
3265 | |
3266 | // CMPI |
3267 | OPCODE(0x0C39) |
3268 | { |
3269 | u32 adr, res; |
3270 | u32 src, dst; |
3271 | |
3272 | FETCH_BYTE(src); |
3273 | FETCH_LONG(adr); |
3274 | PRE_IO |
3275 | READ_BYTE_F(adr, dst) |
3276 | res = dst - src; |
3277 | flag_N = flag_C = res; |
3278 | flag_V = (src ^ dst) & (res ^ dst); |
3279 | flag_NotZ = res & 0xFF; |
3280 | POST_IO |
3281 | RET(20) |
3282 | } |
3283 | |
3284 | // CMPI |
3285 | OPCODE(0x0C1F) |
3286 | { |
3287 | u32 adr, res; |
3288 | u32 src, dst; |
3289 | |
3290 | FETCH_BYTE(src); |
3291 | adr = AREG(7); |
3292 | AREG(7) += 2; |
3293 | PRE_IO |
3294 | READ_BYTE_F(adr, dst) |
3295 | res = dst - src; |
3296 | flag_N = flag_C = res; |
3297 | flag_V = (src ^ dst) & (res ^ dst); |
3298 | flag_NotZ = res & 0xFF; |
3299 | POST_IO |
3300 | RET(12) |
3301 | } |
3302 | |
3303 | // CMPI |
3304 | OPCODE(0x0C27) |
3305 | { |
3306 | u32 adr, res; |
3307 | u32 src, dst; |
3308 | |
3309 | FETCH_BYTE(src); |
3310 | adr = AREG(7) - 2; |
3311 | AREG(7) = adr; |
3312 | PRE_IO |
3313 | READ_BYTE_F(adr, dst) |
3314 | res = dst - src; |
3315 | flag_N = flag_C = res; |
3316 | flag_V = (src ^ dst) & (res ^ dst); |
3317 | flag_NotZ = res & 0xFF; |
3318 | POST_IO |
3319 | RET(14) |
3320 | } |
3321 | |
3322 | // CMPI |
3323 | OPCODE(0x0C40) |
3324 | { |
3325 | u32 adr, res; |
3326 | u32 src, dst; |
3327 | |
3328 | FETCH_WORD(src); |
3329 | dst = DREGu16((Opcode >> 0) & 7); |
3330 | res = dst - src; |
3331 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3332 | flag_N = flag_C = res >> 8; |
3333 | flag_NotZ = res & 0xFFFF; |
3334 | RET(8) |
3335 | } |
3336 | |
3337 | // CMPI |
3338 | OPCODE(0x0C50) |
3339 | { |
3340 | u32 adr, res; |
3341 | u32 src, dst; |
3342 | |
3343 | FETCH_WORD(src); |
3344 | adr = AREG((Opcode >> 0) & 7); |
3345 | PRE_IO |
3346 | READ_WORD_F(adr, dst) |
3347 | res = dst - src; |
3348 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3349 | flag_N = flag_C = res >> 8; |
3350 | flag_NotZ = res & 0xFFFF; |
3351 | POST_IO |
3352 | RET(12) |
3353 | } |
3354 | |
3355 | // CMPI |
3356 | OPCODE(0x0C58) |
3357 | { |
3358 | u32 adr, res; |
3359 | u32 src, dst; |
3360 | |
3361 | FETCH_WORD(src); |
3362 | adr = AREG((Opcode >> 0) & 7); |
3363 | AREG((Opcode >> 0) & 7) += 2; |
3364 | PRE_IO |
3365 | READ_WORD_F(adr, dst) |
3366 | res = dst - src; |
3367 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3368 | flag_N = flag_C = res >> 8; |
3369 | flag_NotZ = res & 0xFFFF; |
3370 | POST_IO |
3371 | RET(12) |
3372 | } |
3373 | |
3374 | // CMPI |
3375 | OPCODE(0x0C60) |
3376 | { |
3377 | u32 adr, res; |
3378 | u32 src, dst; |
3379 | |
3380 | FETCH_WORD(src); |
3381 | adr = AREG((Opcode >> 0) & 7) - 2; |
3382 | AREG((Opcode >> 0) & 7) = adr; |
3383 | PRE_IO |
3384 | READ_WORD_F(adr, dst) |
3385 | res = dst - src; |
3386 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3387 | flag_N = flag_C = res >> 8; |
3388 | flag_NotZ = res & 0xFFFF; |
3389 | POST_IO |
3390 | RET(14) |
3391 | } |
3392 | |
3393 | // CMPI |
3394 | OPCODE(0x0C68) |
3395 | { |
3396 | u32 adr, res; |
3397 | u32 src, dst; |
3398 | |
3399 | FETCH_WORD(src); |
3400 | FETCH_SWORD(adr); |
3401 | adr += AREG((Opcode >> 0) & 7); |
3402 | PRE_IO |
3403 | READ_WORD_F(adr, dst) |
3404 | res = dst - src; |
3405 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3406 | flag_N = flag_C = res >> 8; |
3407 | flag_NotZ = res & 0xFFFF; |
3408 | POST_IO |
3409 | RET(16) |
3410 | } |
3411 | |
3412 | // CMPI |
3413 | OPCODE(0x0C70) |
3414 | { |
3415 | u32 adr, res; |
3416 | u32 src, dst; |
3417 | |
3418 | FETCH_WORD(src); |
3419 | adr = AREG((Opcode >> 0) & 7); |
3420 | DECODE_EXT_WORD |
3421 | PRE_IO |
3422 | READ_WORD_F(adr, dst) |
3423 | res = dst - src; |
3424 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3425 | flag_N = flag_C = res >> 8; |
3426 | flag_NotZ = res & 0xFFFF; |
3427 | POST_IO |
3428 | RET(18) |
3429 | } |
3430 | |
3431 | // CMPI |
3432 | OPCODE(0x0C78) |
3433 | { |
3434 | u32 adr, res; |
3435 | u32 src, dst; |
3436 | |
3437 | FETCH_WORD(src); |
3438 | FETCH_SWORD(adr); |
3439 | PRE_IO |
3440 | READ_WORD_F(adr, dst) |
3441 | res = dst - src; |
3442 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3443 | flag_N = flag_C = res >> 8; |
3444 | flag_NotZ = res & 0xFFFF; |
3445 | POST_IO |
3446 | RET(16) |
3447 | } |
3448 | |
3449 | // CMPI |
3450 | OPCODE(0x0C79) |
3451 | { |
3452 | u32 adr, res; |
3453 | u32 src, dst; |
3454 | |
3455 | FETCH_WORD(src); |
3456 | FETCH_LONG(adr); |
3457 | PRE_IO |
3458 | READ_WORD_F(adr, dst) |
3459 | res = dst - src; |
3460 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3461 | flag_N = flag_C = res >> 8; |
3462 | flag_NotZ = res & 0xFFFF; |
3463 | POST_IO |
3464 | RET(20) |
3465 | } |
3466 | |
3467 | // CMPI |
3468 | OPCODE(0x0C5F) |
3469 | { |
3470 | u32 adr, res; |
3471 | u32 src, dst; |
3472 | |
3473 | FETCH_WORD(src); |
3474 | adr = AREG(7); |
3475 | AREG(7) += 2; |
3476 | PRE_IO |
3477 | READ_WORD_F(adr, dst) |
3478 | res = dst - src; |
3479 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3480 | flag_N = flag_C = res >> 8; |
3481 | flag_NotZ = res & 0xFFFF; |
3482 | POST_IO |
3483 | RET(12) |
3484 | } |
3485 | |
3486 | // CMPI |
3487 | OPCODE(0x0C67) |
3488 | { |
3489 | u32 adr, res; |
3490 | u32 src, dst; |
3491 | |
3492 | FETCH_WORD(src); |
3493 | adr = AREG(7) - 2; |
3494 | AREG(7) = adr; |
3495 | PRE_IO |
3496 | READ_WORD_F(adr, dst) |
3497 | res = dst - src; |
3498 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3499 | flag_N = flag_C = res >> 8; |
3500 | flag_NotZ = res & 0xFFFF; |
3501 | POST_IO |
3502 | RET(14) |
3503 | } |
3504 | |
3505 | // CMPI |
3506 | OPCODE(0x0C80) |
3507 | { |
3508 | u32 adr, res; |
3509 | u32 src, dst; |
3510 | |
3511 | FETCH_LONG(src); |
3512 | dst = DREGu32((Opcode >> 0) & 7); |
3513 | res = dst - src; |
3514 | flag_NotZ = res; |
3515 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3516 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3517 | flag_N = res >> 24; |
3518 | RET(14) |
3519 | } |
3520 | |
3521 | // CMPI |
3522 | OPCODE(0x0C90) |
3523 | { |
3524 | u32 adr, res; |
3525 | u32 src, dst; |
3526 | |
3527 | FETCH_LONG(src); |
3528 | adr = AREG((Opcode >> 0) & 7); |
3529 | PRE_IO |
3530 | READ_LONG_F(adr, dst) |
3531 | res = dst - src; |
3532 | flag_NotZ = res; |
3533 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3534 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3535 | flag_N = res >> 24; |
3536 | POST_IO |
3537 | RET(20) |
3538 | } |
3539 | |
3540 | // CMPI |
3541 | OPCODE(0x0C98) |
3542 | { |
3543 | u32 adr, res; |
3544 | u32 src, dst; |
3545 | |
3546 | FETCH_LONG(src); |
3547 | adr = AREG((Opcode >> 0) & 7); |
3548 | AREG((Opcode >> 0) & 7) += 4; |
3549 | PRE_IO |
3550 | READ_LONG_F(adr, dst) |
3551 | res = dst - src; |
3552 | flag_NotZ = res; |
3553 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3554 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3555 | flag_N = res >> 24; |
3556 | POST_IO |
3557 | RET(20) |
3558 | } |
3559 | |
3560 | // CMPI |
3561 | OPCODE(0x0CA0) |
3562 | { |
3563 | u32 adr, res; |
3564 | u32 src, dst; |
3565 | |
3566 | FETCH_LONG(src); |
3567 | adr = AREG((Opcode >> 0) & 7) - 4; |
3568 | AREG((Opcode >> 0) & 7) = adr; |
3569 | PRE_IO |
3570 | READ_LONG_F(adr, dst) |
3571 | res = dst - src; |
3572 | flag_NotZ = res; |
3573 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3574 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3575 | flag_N = res >> 24; |
3576 | POST_IO |
3577 | RET(22) |
3578 | } |
3579 | |
3580 | // CMPI |
3581 | OPCODE(0x0CA8) |
3582 | { |
3583 | u32 adr, res; |
3584 | u32 src, dst; |
3585 | |
3586 | FETCH_LONG(src); |
3587 | FETCH_SWORD(adr); |
3588 | adr += AREG((Opcode >> 0) & 7); |
3589 | PRE_IO |
3590 | READ_LONG_F(adr, dst) |
3591 | res = dst - src; |
3592 | flag_NotZ = res; |
3593 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3594 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3595 | flag_N = res >> 24; |
3596 | POST_IO |
3597 | RET(24) |
3598 | } |
3599 | |
3600 | // CMPI |
3601 | OPCODE(0x0CB0) |
3602 | { |
3603 | u32 adr, res; |
3604 | u32 src, dst; |
3605 | |
3606 | FETCH_LONG(src); |
3607 | adr = AREG((Opcode >> 0) & 7); |
3608 | DECODE_EXT_WORD |
3609 | PRE_IO |
3610 | READ_LONG_F(adr, dst) |
3611 | res = dst - src; |
3612 | flag_NotZ = res; |
3613 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3614 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3615 | flag_N = res >> 24; |
3616 | POST_IO |
3617 | RET(26) |
3618 | } |
3619 | |
3620 | // CMPI |
3621 | OPCODE(0x0CB8) |
3622 | { |
3623 | u32 adr, res; |
3624 | u32 src, dst; |
3625 | |
3626 | FETCH_LONG(src); |
3627 | FETCH_SWORD(adr); |
3628 | PRE_IO |
3629 | READ_LONG_F(adr, dst) |
3630 | res = dst - src; |
3631 | flag_NotZ = res; |
3632 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3633 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3634 | flag_N = res >> 24; |
3635 | POST_IO |
3636 | RET(24) |
3637 | } |
3638 | |
3639 | // CMPI |
3640 | OPCODE(0x0CB9) |
3641 | { |
3642 | u32 adr, res; |
3643 | u32 src, dst; |
3644 | |
3645 | FETCH_LONG(src); |
3646 | FETCH_LONG(adr); |
3647 | PRE_IO |
3648 | READ_LONG_F(adr, dst) |
3649 | res = dst - src; |
3650 | flag_NotZ = res; |
3651 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3652 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3653 | flag_N = res >> 24; |
3654 | POST_IO |
3655 | RET(28) |
3656 | } |
3657 | |
3658 | // CMPI |
3659 | OPCODE(0x0C9F) |
3660 | { |
3661 | u32 adr, res; |
3662 | u32 src, dst; |
3663 | |
3664 | FETCH_LONG(src); |
3665 | adr = AREG(7); |
3666 | AREG(7) += 4; |
3667 | PRE_IO |
3668 | READ_LONG_F(adr, dst) |
3669 | res = dst - src; |
3670 | flag_NotZ = res; |
3671 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3672 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3673 | flag_N = res >> 24; |
3674 | POST_IO |
3675 | RET(20) |
3676 | } |
3677 | |
3678 | // CMPI |
3679 | OPCODE(0x0CA7) |
3680 | { |
3681 | u32 adr, res; |
3682 | u32 src, dst; |
3683 | |
3684 | FETCH_LONG(src); |
3685 | adr = AREG(7) - 4; |
3686 | AREG(7) = adr; |
3687 | PRE_IO |
3688 | READ_LONG_F(adr, dst) |
3689 | res = dst - src; |
3690 | flag_NotZ = res; |
3691 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3692 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3693 | flag_N = res >> 24; |
3694 | POST_IO |
3695 | RET(22) |
3696 | } |
3697 | |
3698 | // BTSTn |
3699 | OPCODE(0x0800) |
3700 | { |
3701 | u32 adr, res; |
3702 | u32 src, dst; |
3703 | |
3704 | FETCH_BYTE(src); |
3705 | src = 1 << (src & 31); |
3706 | res = DREGu32((Opcode >> 0) & 7); |
3707 | flag_NotZ = res & src; |
3708 | RET(10) |
3709 | } |
3710 | |
3711 | // BTSTn |
3712 | OPCODE(0x0810) |
3713 | { |
3714 | u32 adr, res; |
3715 | u32 src, dst; |
3716 | |
3717 | FETCH_BYTE(src); |
3718 | src = 1 << (src & 7); |
3719 | adr = AREG((Opcode >> 0) & 7); |
3720 | PRE_IO |
3721 | READ_BYTE_F(adr, res) |
3722 | flag_NotZ = res & src; |
3723 | POST_IO |
3724 | RET(12) |
3725 | } |
3726 | |
3727 | // BTSTn |
3728 | OPCODE(0x0818) |
3729 | { |
3730 | u32 adr, res; |
3731 | u32 src, dst; |
3732 | |
3733 | FETCH_BYTE(src); |
3734 | src = 1 << (src & 7); |
3735 | adr = AREG((Opcode >> 0) & 7); |
3736 | AREG((Opcode >> 0) & 7) += 1; |
3737 | PRE_IO |
3738 | READ_BYTE_F(adr, res) |
3739 | flag_NotZ = res & src; |
3740 | POST_IO |
3741 | RET(12) |
3742 | } |
3743 | |
3744 | // BTSTn |
3745 | OPCODE(0x0820) |
3746 | { |
3747 | u32 adr, res; |
3748 | u32 src, dst; |
3749 | |
3750 | FETCH_BYTE(src); |
3751 | src = 1 << (src & 7); |
3752 | adr = AREG((Opcode >> 0) & 7) - 1; |
3753 | AREG((Opcode >> 0) & 7) = adr; |
3754 | PRE_IO |
3755 | READ_BYTE_F(adr, res) |
3756 | flag_NotZ = res & src; |
3757 | POST_IO |
3758 | RET(14) |
3759 | } |
3760 | |
3761 | // BTSTn |
3762 | OPCODE(0x0828) |
3763 | { |
3764 | u32 adr, res; |
3765 | u32 src, dst; |
3766 | |
3767 | FETCH_BYTE(src); |
3768 | src = 1 << (src & 7); |
3769 | FETCH_SWORD(adr); |
3770 | adr += AREG((Opcode >> 0) & 7); |
3771 | PRE_IO |
3772 | READ_BYTE_F(adr, res) |
3773 | flag_NotZ = res & src; |
3774 | POST_IO |
3775 | RET(16) |
3776 | } |
3777 | |
3778 | // BTSTn |
3779 | OPCODE(0x0830) |
3780 | { |
3781 | u32 adr, res; |
3782 | u32 src, dst; |
3783 | |
3784 | FETCH_BYTE(src); |
3785 | src = 1 << (src & 7); |
3786 | adr = AREG((Opcode >> 0) & 7); |
3787 | DECODE_EXT_WORD |
3788 | PRE_IO |
3789 | READ_BYTE_F(adr, res) |
3790 | flag_NotZ = res & src; |
3791 | POST_IO |
3792 | RET(18) |
3793 | } |
3794 | |
3795 | // BTSTn |
3796 | OPCODE(0x0838) |
3797 | { |
3798 | u32 adr, res; |
3799 | u32 src, dst; |
3800 | |
3801 | FETCH_BYTE(src); |
3802 | src = 1 << (src & 7); |
3803 | FETCH_SWORD(adr); |
3804 | PRE_IO |
3805 | READ_BYTE_F(adr, res) |
3806 | flag_NotZ = res & src; |
3807 | POST_IO |
3808 | RET(16) |
3809 | } |
3810 | |
3811 | // BTSTn |
3812 | OPCODE(0x0839) |
3813 | { |
3814 | u32 adr, res; |
3815 | u32 src, dst; |
3816 | |
3817 | FETCH_BYTE(src); |
3818 | src = 1 << (src & 7); |
3819 | FETCH_LONG(adr); |
3820 | PRE_IO |
3821 | READ_BYTE_F(adr, res) |
3822 | flag_NotZ = res & src; |
3823 | POST_IO |
3824 | RET(20) |
3825 | } |
3826 | |
3827 | // BTSTn |
3828 | OPCODE(0x083A) |
3829 | { |
3830 | u32 adr, res; |
3831 | u32 src, dst; |
3832 | |
3833 | FETCH_BYTE(src); |
3834 | src = 1 << (src & 7); |
3835 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
3836 | PC++; |
3837 | PRE_IO |
3838 | READ_BYTE_F(adr, res) |
3839 | flag_NotZ = res & src; |
3840 | POST_IO |
3841 | RET(16) |
3842 | } |
3843 | |
3844 | // BTSTn |
3845 | OPCODE(0x083B) |
3846 | { |
3847 | u32 adr, res; |
3848 | u32 src, dst; |
3849 | |
3850 | FETCH_BYTE(src); |
3851 | src = 1 << (src & 7); |
3852 | adr = (u32)(PC) - BasePC; |
3853 | DECODE_EXT_WORD |
3854 | PRE_IO |
3855 | READ_BYTE_F(adr, res) |
3856 | flag_NotZ = res & src; |
3857 | POST_IO |
3858 | RET(18) |
3859 | } |
3860 | |
3861 | // BTSTn |
3862 | OPCODE(0x081F) |
3863 | { |
3864 | u32 adr, res; |
3865 | u32 src, dst; |
3866 | |
3867 | FETCH_BYTE(src); |
3868 | src = 1 << (src & 7); |
3869 | adr = AREG(7); |
3870 | AREG(7) += 2; |
3871 | PRE_IO |
3872 | READ_BYTE_F(adr, res) |
3873 | flag_NotZ = res & src; |
3874 | POST_IO |
3875 | RET(12) |
3876 | } |
3877 | |
3878 | // BTSTn |
3879 | OPCODE(0x0827) |
3880 | { |
3881 | u32 adr, res; |
3882 | u32 src, dst; |
3883 | |
3884 | FETCH_BYTE(src); |
3885 | src = 1 << (src & 7); |
3886 | adr = AREG(7) - 2; |
3887 | AREG(7) = adr; |
3888 | PRE_IO |
3889 | READ_BYTE_F(adr, res) |
3890 | flag_NotZ = res & src; |
3891 | POST_IO |
3892 | RET(14) |
3893 | } |
3894 | |
3895 | // BCHGn |
3896 | OPCODE(0x0840) |
3897 | { |
3898 | u32 adr, res; |
3899 | u32 src, dst; |
3900 | |
3901 | FETCH_BYTE(src); |
3902 | src = 1 << (src & 31); |
3903 | res = DREGu32((Opcode >> 0) & 7); |
3904 | flag_NotZ = res & src; |
3905 | res ^= src; |
3906 | DREGu32((Opcode >> 0) & 7) = res; |
3907 | RET(12) |
3908 | } |
3909 | |
3910 | // BCHGn |
3911 | OPCODE(0x0850) |
3912 | { |
3913 | u32 adr, res; |
3914 | u32 src, dst; |
3915 | |
3916 | FETCH_BYTE(src); |
3917 | src = 1 << (src & 7); |
3918 | adr = AREG((Opcode >> 0) & 7); |
3919 | PRE_IO |
3920 | READ_BYTE_F(adr, res) |
3921 | flag_NotZ = res & src; |
3922 | res ^= src; |
3923 | WRITE_BYTE_F(adr, res) |
3924 | POST_IO |
3925 | RET(16) |
3926 | } |
3927 | |
3928 | // BCHGn |
3929 | OPCODE(0x0858) |
3930 | { |
3931 | u32 adr, res; |
3932 | u32 src, dst; |
3933 | |
3934 | FETCH_BYTE(src); |
3935 | src = 1 << (src & 7); |
3936 | adr = AREG((Opcode >> 0) & 7); |
3937 | AREG((Opcode >> 0) & 7) += 1; |
3938 | PRE_IO |
3939 | READ_BYTE_F(adr, res) |
3940 | flag_NotZ = res & src; |
3941 | res ^= src; |
3942 | WRITE_BYTE_F(adr, res) |
3943 | POST_IO |
3944 | RET(16) |
3945 | } |
3946 | |
3947 | // BCHGn |
3948 | OPCODE(0x0860) |
3949 | { |
3950 | u32 adr, res; |
3951 | u32 src, dst; |
3952 | |
3953 | FETCH_BYTE(src); |
3954 | src = 1 << (src & 7); |
3955 | adr = AREG((Opcode >> 0) & 7) - 1; |
3956 | AREG((Opcode >> 0) & 7) = adr; |
3957 | PRE_IO |
3958 | READ_BYTE_F(adr, res) |
3959 | flag_NotZ = res & src; |
3960 | res ^= src; |
3961 | WRITE_BYTE_F(adr, res) |
3962 | POST_IO |
3963 | RET(18) |
3964 | } |
3965 | |
3966 | // BCHGn |
3967 | OPCODE(0x0868) |
3968 | { |
3969 | u32 adr, res; |
3970 | u32 src, dst; |
3971 | |
3972 | FETCH_BYTE(src); |
3973 | src = 1 << (src & 7); |
3974 | FETCH_SWORD(adr); |
3975 | adr += AREG((Opcode >> 0) & 7); |
3976 | PRE_IO |
3977 | READ_BYTE_F(adr, res) |
3978 | flag_NotZ = res & src; |
3979 | res ^= src; |
3980 | WRITE_BYTE_F(adr, res) |
3981 | POST_IO |
3982 | RET(20) |
3983 | } |
3984 | |
3985 | // BCHGn |
3986 | OPCODE(0x0870) |
3987 | { |
3988 | u32 adr, res; |
3989 | u32 src, dst; |
3990 | |
3991 | FETCH_BYTE(src); |
3992 | src = 1 << (src & 7); |
3993 | adr = AREG((Opcode >> 0) & 7); |
3994 | DECODE_EXT_WORD |
3995 | PRE_IO |
3996 | READ_BYTE_F(adr, res) |
3997 | flag_NotZ = res & src; |
3998 | res ^= src; |
3999 | WRITE_BYTE_F(adr, res) |
4000 | POST_IO |
4001 | RET(22) |
4002 | } |
4003 | |
4004 | // BCHGn |
4005 | OPCODE(0x0878) |
4006 | { |
4007 | u32 adr, res; |
4008 | u32 src, dst; |
4009 | |
4010 | FETCH_BYTE(src); |
4011 | src = 1 << (src & 7); |
4012 | FETCH_SWORD(adr); |
4013 | PRE_IO |
4014 | READ_BYTE_F(adr, res) |
4015 | flag_NotZ = res & src; |
4016 | res ^= src; |
4017 | WRITE_BYTE_F(adr, res) |
4018 | POST_IO |
4019 | RET(20) |
4020 | } |
4021 | |
4022 | // BCHGn |
4023 | OPCODE(0x0879) |
4024 | { |
4025 | u32 adr, res; |
4026 | u32 src, dst; |
4027 | |
4028 | FETCH_BYTE(src); |
4029 | src = 1 << (src & 7); |
4030 | FETCH_LONG(adr); |
4031 | PRE_IO |
4032 | READ_BYTE_F(adr, res) |
4033 | flag_NotZ = res & src; |
4034 | res ^= src; |
4035 | WRITE_BYTE_F(adr, res) |
4036 | POST_IO |
4037 | RET(24) |
4038 | } |
4039 | |
4040 | // BCHGn |
4041 | OPCODE(0x085F) |
4042 | { |
4043 | u32 adr, res; |
4044 | u32 src, dst; |
4045 | |
4046 | FETCH_BYTE(src); |
4047 | src = 1 << (src & 7); |
4048 | adr = AREG(7); |
4049 | AREG(7) += 2; |
4050 | PRE_IO |
4051 | READ_BYTE_F(adr, res) |
4052 | flag_NotZ = res & src; |
4053 | res ^= src; |
4054 | WRITE_BYTE_F(adr, res) |
4055 | POST_IO |
4056 | RET(16) |
4057 | } |
4058 | |
4059 | // BCHGn |
4060 | OPCODE(0x0867) |
4061 | { |
4062 | u32 adr, res; |
4063 | u32 src, dst; |
4064 | |
4065 | FETCH_BYTE(src); |
4066 | src = 1 << (src & 7); |
4067 | adr = AREG(7) - 2; |
4068 | AREG(7) = adr; |
4069 | PRE_IO |
4070 | READ_BYTE_F(adr, res) |
4071 | flag_NotZ = res & src; |
4072 | res ^= src; |
4073 | WRITE_BYTE_F(adr, res) |
4074 | POST_IO |
4075 | RET(18) |
4076 | } |
4077 | |
4078 | // BCLRn |
4079 | OPCODE(0x0880) |
4080 | { |
4081 | u32 adr, res; |
4082 | u32 src, dst; |
4083 | |
4084 | FETCH_BYTE(src); |
4085 | src = 1 << (src & 31); |
4086 | res = DREGu32((Opcode >> 0) & 7); |
4087 | flag_NotZ = res & src; |
4088 | res &= ~src; |
4089 | DREGu32((Opcode >> 0) & 7) = res; |
4090 | RET(14) |
4091 | } |
4092 | |
4093 | // BCLRn |
4094 | OPCODE(0x0890) |
4095 | { |
4096 | u32 adr, res; |
4097 | u32 src, dst; |
4098 | |
4099 | FETCH_BYTE(src); |
4100 | src = 1 << (src & 7); |
4101 | adr = AREG((Opcode >> 0) & 7); |
4102 | PRE_IO |
4103 | READ_BYTE_F(adr, res) |
4104 | flag_NotZ = res & src; |
4105 | res &= ~src; |
4106 | WRITE_BYTE_F(adr, res) |
4107 | POST_IO |
4108 | RET(16) |
4109 | } |
4110 | |
4111 | // BCLRn |
4112 | OPCODE(0x0898) |
4113 | { |
4114 | u32 adr, res; |
4115 | u32 src, dst; |
4116 | |
4117 | FETCH_BYTE(src); |
4118 | src = 1 << (src & 7); |
4119 | adr = AREG((Opcode >> 0) & 7); |
4120 | AREG((Opcode >> 0) & 7) += 1; |
4121 | PRE_IO |
4122 | READ_BYTE_F(adr, res) |
4123 | flag_NotZ = res & src; |
4124 | res &= ~src; |
4125 | WRITE_BYTE_F(adr, res) |
4126 | POST_IO |
4127 | RET(16) |
4128 | } |
4129 | |
4130 | // BCLRn |
4131 | OPCODE(0x08A0) |
4132 | { |
4133 | u32 adr, res; |
4134 | u32 src, dst; |
4135 | |
4136 | FETCH_BYTE(src); |
4137 | src = 1 << (src & 7); |
4138 | adr = AREG((Opcode >> 0) & 7) - 1; |
4139 | AREG((Opcode >> 0) & 7) = adr; |
4140 | PRE_IO |
4141 | READ_BYTE_F(adr, res) |
4142 | flag_NotZ = res & src; |
4143 | res &= ~src; |
4144 | WRITE_BYTE_F(adr, res) |
4145 | POST_IO |
4146 | RET(18) |
4147 | } |
4148 | |
4149 | // BCLRn |
4150 | OPCODE(0x08A8) |
4151 | { |
4152 | u32 adr, res; |
4153 | u32 src, dst; |
4154 | |
4155 | FETCH_BYTE(src); |
4156 | src = 1 << (src & 7); |
4157 | FETCH_SWORD(adr); |
4158 | adr += AREG((Opcode >> 0) & 7); |
4159 | PRE_IO |
4160 | READ_BYTE_F(adr, res) |
4161 | flag_NotZ = res & src; |
4162 | res &= ~src; |
4163 | WRITE_BYTE_F(adr, res) |
4164 | POST_IO |
4165 | RET(20) |
4166 | } |
4167 | |
4168 | // BCLRn |
4169 | OPCODE(0x08B0) |
4170 | { |
4171 | u32 adr, res; |
4172 | u32 src, dst; |
4173 | |
4174 | FETCH_BYTE(src); |
4175 | src = 1 << (src & 7); |
4176 | adr = AREG((Opcode >> 0) & 7); |
4177 | DECODE_EXT_WORD |
4178 | PRE_IO |
4179 | READ_BYTE_F(adr, res) |
4180 | flag_NotZ = res & src; |
4181 | res &= ~src; |
4182 | WRITE_BYTE_F(adr, res) |
4183 | POST_IO |
4184 | RET(22) |
4185 | } |
4186 | |
4187 | // BCLRn |
4188 | OPCODE(0x08B8) |
4189 | { |
4190 | u32 adr, res; |
4191 | u32 src, dst; |
4192 | |
4193 | FETCH_BYTE(src); |
4194 | src = 1 << (src & 7); |
4195 | FETCH_SWORD(adr); |
4196 | PRE_IO |
4197 | READ_BYTE_F(adr, res) |
4198 | flag_NotZ = res & src; |
4199 | res &= ~src; |
4200 | WRITE_BYTE_F(adr, res) |
4201 | POST_IO |
4202 | RET(20) |
4203 | } |
4204 | |
4205 | // BCLRn |
4206 | OPCODE(0x08B9) |
4207 | { |
4208 | u32 adr, res; |
4209 | u32 src, dst; |
4210 | |
4211 | FETCH_BYTE(src); |
4212 | src = 1 << (src & 7); |
4213 | FETCH_LONG(adr); |
4214 | PRE_IO |
4215 | READ_BYTE_F(adr, res) |
4216 | flag_NotZ = res & src; |
4217 | res &= ~src; |
4218 | WRITE_BYTE_F(adr, res) |
4219 | POST_IO |
4220 | RET(24) |
4221 | } |
4222 | |
4223 | // BCLRn |
4224 | OPCODE(0x089F) |
4225 | { |
4226 | u32 adr, res; |
4227 | u32 src, dst; |
4228 | |
4229 | FETCH_BYTE(src); |
4230 | src = 1 << (src & 7); |
4231 | adr = AREG(7); |
4232 | AREG(7) += 2; |
4233 | PRE_IO |
4234 | READ_BYTE_F(adr, res) |
4235 | flag_NotZ = res & src; |
4236 | res &= ~src; |
4237 | WRITE_BYTE_F(adr, res) |
4238 | POST_IO |
4239 | RET(16) |
4240 | } |
4241 | |
4242 | // BCLRn |
4243 | OPCODE(0x08A7) |
4244 | { |
4245 | u32 adr, res; |
4246 | u32 src, dst; |
4247 | |
4248 | FETCH_BYTE(src); |
4249 | src = 1 << (src & 7); |
4250 | adr = AREG(7) - 2; |
4251 | AREG(7) = adr; |
4252 | PRE_IO |
4253 | READ_BYTE_F(adr, res) |
4254 | flag_NotZ = res & src; |
4255 | res &= ~src; |
4256 | WRITE_BYTE_F(adr, res) |
4257 | POST_IO |
4258 | RET(18) |
4259 | } |
4260 | |
4261 | // BSETn |
4262 | OPCODE(0x08C0) |
4263 | { |
4264 | u32 adr, res; |
4265 | u32 src, dst; |
4266 | |
4267 | FETCH_BYTE(src); |
4268 | src = 1 << (src & 31); |
4269 | res = DREGu32((Opcode >> 0) & 7); |
4270 | flag_NotZ = res & src; |
4271 | res |= src; |
4272 | DREGu32((Opcode >> 0) & 7) = res; |
4273 | RET(12) |
4274 | } |
4275 | |
4276 | // BSETn |
4277 | OPCODE(0x08D0) |
4278 | { |
4279 | u32 adr, res; |
4280 | u32 src, dst; |
4281 | |
4282 | FETCH_BYTE(src); |
4283 | src = 1 << (src & 7); |
4284 | adr = AREG((Opcode >> 0) & 7); |
4285 | PRE_IO |
4286 | READ_BYTE_F(adr, res) |
4287 | flag_NotZ = res & src; |
4288 | res |= src; |
4289 | WRITE_BYTE_F(adr, res) |
4290 | POST_IO |
4291 | RET(16) |
4292 | } |
4293 | |
4294 | // BSETn |
4295 | OPCODE(0x08D8) |
4296 | { |
4297 | u32 adr, res; |
4298 | u32 src, dst; |
4299 | |
4300 | FETCH_BYTE(src); |
4301 | src = 1 << (src & 7); |
4302 | adr = AREG((Opcode >> 0) & 7); |
4303 | AREG((Opcode >> 0) & 7) += 1; |
4304 | PRE_IO |
4305 | READ_BYTE_F(adr, res) |
4306 | flag_NotZ = res & src; |
4307 | res |= src; |
4308 | WRITE_BYTE_F(adr, res) |
4309 | POST_IO |
4310 | RET(16) |
4311 | } |
4312 | |
4313 | // BSETn |
4314 | OPCODE(0x08E0) |
4315 | { |
4316 | u32 adr, res; |
4317 | u32 src, dst; |
4318 | |
4319 | FETCH_BYTE(src); |
4320 | src = 1 << (src & 7); |
4321 | adr = AREG((Opcode >> 0) & 7) - 1; |
4322 | AREG((Opcode >> 0) & 7) = adr; |
4323 | PRE_IO |
4324 | READ_BYTE_F(adr, res) |
4325 | flag_NotZ = res & src; |
4326 | res |= src; |
4327 | WRITE_BYTE_F(adr, res) |
4328 | POST_IO |
4329 | RET(18) |
4330 | } |
4331 | |
4332 | // BSETn |
4333 | OPCODE(0x08E8) |
4334 | { |
4335 | u32 adr, res; |
4336 | u32 src, dst; |
4337 | |
4338 | FETCH_BYTE(src); |
4339 | src = 1 << (src & 7); |
4340 | FETCH_SWORD(adr); |
4341 | adr += AREG((Opcode >> 0) & 7); |
4342 | PRE_IO |
4343 | READ_BYTE_F(adr, res) |
4344 | flag_NotZ = res & src; |
4345 | res |= src; |
4346 | WRITE_BYTE_F(adr, res) |
4347 | POST_IO |
4348 | RET(20) |
4349 | } |
4350 | |
4351 | // BSETn |
4352 | OPCODE(0x08F0) |
4353 | { |
4354 | u32 adr, res; |
4355 | u32 src, dst; |
4356 | |
4357 | FETCH_BYTE(src); |
4358 | src = 1 << (src & 7); |
4359 | adr = AREG((Opcode >> 0) & 7); |
4360 | DECODE_EXT_WORD |
4361 | PRE_IO |
4362 | READ_BYTE_F(adr, res) |
4363 | flag_NotZ = res & src; |
4364 | res |= src; |
4365 | WRITE_BYTE_F(adr, res) |
4366 | POST_IO |
4367 | RET(22) |
4368 | } |
4369 | |
4370 | // BSETn |
4371 | OPCODE(0x08F8) |
4372 | { |
4373 | u32 adr, res; |
4374 | u32 src, dst; |
4375 | |
4376 | FETCH_BYTE(src); |
4377 | src = 1 << (src & 7); |
4378 | FETCH_SWORD(adr); |
4379 | PRE_IO |
4380 | READ_BYTE_F(adr, res) |
4381 | flag_NotZ = res & src; |
4382 | res |= src; |
4383 | WRITE_BYTE_F(adr, res) |
4384 | POST_IO |
4385 | RET(20) |
4386 | } |
4387 | |
4388 | // BSETn |
4389 | OPCODE(0x08F9) |
4390 | { |
4391 | u32 adr, res; |
4392 | u32 src, dst; |
4393 | |
4394 | FETCH_BYTE(src); |
4395 | src = 1 << (src & 7); |
4396 | FETCH_LONG(adr); |
4397 | PRE_IO |
4398 | READ_BYTE_F(adr, res) |
4399 | flag_NotZ = res & src; |
4400 | res |= src; |
4401 | WRITE_BYTE_F(adr, res) |
4402 | POST_IO |
4403 | RET(24) |
4404 | } |
4405 | |
4406 | // BSETn |
4407 | OPCODE(0x08DF) |
4408 | { |
4409 | u32 adr, res; |
4410 | u32 src, dst; |
4411 | |
4412 | FETCH_BYTE(src); |
4413 | src = 1 << (src & 7); |
4414 | adr = AREG(7); |
4415 | AREG(7) += 2; |
4416 | PRE_IO |
4417 | READ_BYTE_F(adr, res) |
4418 | flag_NotZ = res & src; |
4419 | res |= src; |
4420 | WRITE_BYTE_F(adr, res) |
4421 | POST_IO |
4422 | RET(16) |
4423 | } |
4424 | |
4425 | // BSETn |
4426 | OPCODE(0x08E7) |
4427 | { |
4428 | u32 adr, res; |
4429 | u32 src, dst; |
4430 | |
4431 | FETCH_BYTE(src); |
4432 | src = 1 << (src & 7); |
4433 | adr = AREG(7) - 2; |
4434 | AREG(7) = adr; |
4435 | PRE_IO |
4436 | READ_BYTE_F(adr, res) |
4437 | flag_NotZ = res & src; |
4438 | res |= src; |
4439 | WRITE_BYTE_F(adr, res) |
4440 | POST_IO |
4441 | RET(18) |
4442 | } |
4443 | |
4444 | // BTST |
4445 | OPCODE(0x0100) |
4446 | { |
4447 | u32 adr, res; |
4448 | u32 src, dst; |
4449 | |
4450 | src = DREGu32((Opcode >> 9) & 7); |
4451 | src = 1 << (src & 31); |
4452 | res = DREGu32((Opcode >> 0) & 7); |
4453 | flag_NotZ = res & src; |
4454 | RET(6) |
4455 | } |
4456 | |
4457 | // BTST |
4458 | OPCODE(0x0110) |
4459 | { |
4460 | u32 adr, res; |
4461 | u32 src, dst; |
4462 | |
4463 | src = DREGu8((Opcode >> 9) & 7); |
4464 | src = 1 << (src & 7); |
4465 | adr = AREG((Opcode >> 0) & 7); |
4466 | PRE_IO |
4467 | READ_BYTE_F(adr, res) |
4468 | flag_NotZ = res & src; |
4469 | POST_IO |
4470 | RET(8) |
4471 | } |
4472 | |
4473 | // BTST |
4474 | OPCODE(0x0118) |
4475 | { |
4476 | u32 adr, res; |
4477 | u32 src, dst; |
4478 | |
4479 | src = DREGu8((Opcode >> 9) & 7); |
4480 | src = 1 << (src & 7); |
4481 | adr = AREG((Opcode >> 0) & 7); |
4482 | AREG((Opcode >> 0) & 7) += 1; |
4483 | PRE_IO |
4484 | READ_BYTE_F(adr, res) |
4485 | flag_NotZ = res & src; |
4486 | POST_IO |
4487 | RET(8) |
4488 | } |
4489 | |
4490 | // BTST |
4491 | OPCODE(0x0120) |
4492 | { |
4493 | u32 adr, res; |
4494 | u32 src, dst; |
4495 | |
4496 | src = DREGu8((Opcode >> 9) & 7); |
4497 | src = 1 << (src & 7); |
4498 | adr = AREG((Opcode >> 0) & 7) - 1; |
4499 | AREG((Opcode >> 0) & 7) = adr; |
4500 | PRE_IO |
4501 | READ_BYTE_F(adr, res) |
4502 | flag_NotZ = res & src; |
4503 | POST_IO |
4504 | RET(10) |
4505 | } |
4506 | |
4507 | // BTST |
4508 | OPCODE(0x0128) |
4509 | { |
4510 | u32 adr, res; |
4511 | u32 src, dst; |
4512 | |
4513 | src = DREGu8((Opcode >> 9) & 7); |
4514 | src = 1 << (src & 7); |
4515 | FETCH_SWORD(adr); |
4516 | adr += AREG((Opcode >> 0) & 7); |
4517 | PRE_IO |
4518 | READ_BYTE_F(adr, res) |
4519 | flag_NotZ = res & src; |
4520 | POST_IO |
4521 | RET(12) |
4522 | } |
4523 | |
4524 | // BTST |
4525 | OPCODE(0x0130) |
4526 | { |
4527 | u32 adr, res; |
4528 | u32 src, dst; |
4529 | |
4530 | src = DREGu8((Opcode >> 9) & 7); |
4531 | src = 1 << (src & 7); |
4532 | adr = AREG((Opcode >> 0) & 7); |
4533 | DECODE_EXT_WORD |
4534 | PRE_IO |
4535 | READ_BYTE_F(adr, res) |
4536 | flag_NotZ = res & src; |
4537 | POST_IO |
4538 | RET(14) |
4539 | } |
4540 | |
4541 | // BTST |
4542 | OPCODE(0x0138) |
4543 | { |
4544 | u32 adr, res; |
4545 | u32 src, dst; |
4546 | |
4547 | src = DREGu8((Opcode >> 9) & 7); |
4548 | src = 1 << (src & 7); |
4549 | FETCH_SWORD(adr); |
4550 | PRE_IO |
4551 | READ_BYTE_F(adr, res) |
4552 | flag_NotZ = res & src; |
4553 | POST_IO |
4554 | RET(12) |
4555 | } |
4556 | |
4557 | // BTST |
4558 | OPCODE(0x0139) |
4559 | { |
4560 | u32 adr, res; |
4561 | u32 src, dst; |
4562 | |
4563 | src = DREGu8((Opcode >> 9) & 7); |
4564 | src = 1 << (src & 7); |
4565 | FETCH_LONG(adr); |
4566 | PRE_IO |
4567 | READ_BYTE_F(adr, res) |
4568 | flag_NotZ = res & src; |
4569 | POST_IO |
4570 | RET(16) |
4571 | } |
4572 | |
4573 | // BTST |
4574 | OPCODE(0x013A) |
4575 | { |
4576 | u32 adr, res; |
4577 | u32 src, dst; |
4578 | |
4579 | src = DREGu8((Opcode >> 9) & 7); |
4580 | src = 1 << (src & 7); |
4581 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
4582 | PC++; |
4583 | PRE_IO |
4584 | READ_BYTE_F(adr, res) |
4585 | flag_NotZ = res & src; |
4586 | POST_IO |
4587 | RET(12) |
4588 | } |
4589 | |
4590 | // BTST |
4591 | OPCODE(0x013B) |
4592 | { |
4593 | u32 adr, res; |
4594 | u32 src, dst; |
4595 | |
4596 | src = DREGu8((Opcode >> 9) & 7); |
4597 | src = 1 << (src & 7); |
4598 | adr = (u32)(PC) - BasePC; |
4599 | DECODE_EXT_WORD |
4600 | PRE_IO |
4601 | READ_BYTE_F(adr, res) |
4602 | flag_NotZ = res & src; |
4603 | POST_IO |
4604 | RET(14) |
4605 | } |
4606 | |
4607 | // BTST |
4608 | OPCODE(0x013C) |
4609 | { |
4610 | u32 adr, res; |
4611 | u32 src, dst; |
4612 | |
4613 | src = DREGu8((Opcode >> 9) & 7); |
4614 | src = 1 << (src & 7); |
4615 | FETCH_BYTE(res); |
4616 | flag_NotZ = res & src; |
4617 | RET(8) |
4618 | } |
4619 | |
4620 | // BTST |
4621 | OPCODE(0x011F) |
4622 | { |
4623 | u32 adr, res; |
4624 | u32 src, dst; |
4625 | |
4626 | src = DREGu8((Opcode >> 9) & 7); |
4627 | src = 1 << (src & 7); |
4628 | adr = AREG(7); |
4629 | AREG(7) += 2; |
4630 | PRE_IO |
4631 | READ_BYTE_F(adr, res) |
4632 | flag_NotZ = res & src; |
4633 | POST_IO |
4634 | RET(8) |
4635 | } |
4636 | |
4637 | // BTST |
4638 | OPCODE(0x0127) |
4639 | { |
4640 | u32 adr, res; |
4641 | u32 src, dst; |
4642 | |
4643 | src = DREGu8((Opcode >> 9) & 7); |
4644 | src = 1 << (src & 7); |
4645 | adr = AREG(7) - 2; |
4646 | AREG(7) = adr; |
4647 | PRE_IO |
4648 | READ_BYTE_F(adr, res) |
4649 | flag_NotZ = res & src; |
4650 | POST_IO |
4651 | RET(10) |
4652 | } |
4653 | |
4654 | // BCHG |
4655 | OPCODE(0x0140) |
4656 | { |
4657 | u32 adr, res; |
4658 | u32 src, dst; |
4659 | |
4660 | src = DREGu32((Opcode >> 9) & 7); |
4661 | src = 1 << (src & 31); |
4662 | res = DREGu32((Opcode >> 0) & 7); |
4663 | flag_NotZ = res & src; |
4664 | res ^= src; |
4665 | DREGu32((Opcode >> 0) & 7) = res; |
4666 | RET(8) |
4667 | } |
4668 | |
4669 | // BCHG |
4670 | OPCODE(0x0150) |
4671 | { |
4672 | u32 adr, res; |
4673 | u32 src, dst; |
4674 | |
4675 | src = DREGu8((Opcode >> 9) & 7); |
4676 | src = 1 << (src & 7); |
4677 | adr = AREG((Opcode >> 0) & 7); |
4678 | PRE_IO |
4679 | READ_BYTE_F(adr, res) |
4680 | flag_NotZ = res & src; |
4681 | res ^= src; |
4682 | WRITE_BYTE_F(adr, res) |
4683 | POST_IO |
4684 | RET(12) |
4685 | } |
4686 | |
4687 | // BCHG |
4688 | OPCODE(0x0158) |
4689 | { |
4690 | u32 adr, res; |
4691 | u32 src, dst; |
4692 | |
4693 | src = DREGu8((Opcode >> 9) & 7); |
4694 | src = 1 << (src & 7); |
4695 | adr = AREG((Opcode >> 0) & 7); |
4696 | AREG((Opcode >> 0) & 7) += 1; |
4697 | PRE_IO |
4698 | READ_BYTE_F(adr, res) |
4699 | flag_NotZ = res & src; |
4700 | res ^= src; |
4701 | WRITE_BYTE_F(adr, res) |
4702 | POST_IO |
4703 | RET(12) |
4704 | } |
4705 | |
4706 | // BCHG |
4707 | OPCODE(0x0160) |
4708 | { |
4709 | u32 adr, res; |
4710 | u32 src, dst; |
4711 | |
4712 | src = DREGu8((Opcode >> 9) & 7); |
4713 | src = 1 << (src & 7); |
4714 | adr = AREG((Opcode >> 0) & 7) - 1; |
4715 | AREG((Opcode >> 0) & 7) = adr; |
4716 | PRE_IO |
4717 | READ_BYTE_F(adr, res) |
4718 | flag_NotZ = res & src; |
4719 | res ^= src; |
4720 | WRITE_BYTE_F(adr, res) |
4721 | POST_IO |
4722 | RET(14) |
4723 | } |
4724 | |
4725 | // BCHG |
4726 | OPCODE(0x0168) |
4727 | { |
4728 | u32 adr, res; |
4729 | u32 src, dst; |
4730 | |
4731 | src = DREGu8((Opcode >> 9) & 7); |
4732 | src = 1 << (src & 7); |
4733 | FETCH_SWORD(adr); |
4734 | adr += AREG((Opcode >> 0) & 7); |
4735 | PRE_IO |
4736 | READ_BYTE_F(adr, res) |
4737 | flag_NotZ = res & src; |
4738 | res ^= src; |
4739 | WRITE_BYTE_F(adr, res) |
4740 | POST_IO |
4741 | RET(16) |
4742 | } |
4743 | |
4744 | // BCHG |
4745 | OPCODE(0x0170) |
4746 | { |
4747 | u32 adr, res; |
4748 | u32 src, dst; |
4749 | |
4750 | src = DREGu8((Opcode >> 9) & 7); |
4751 | src = 1 << (src & 7); |
4752 | adr = AREG((Opcode >> 0) & 7); |
4753 | DECODE_EXT_WORD |
4754 | PRE_IO |
4755 | READ_BYTE_F(adr, res) |
4756 | flag_NotZ = res & src; |
4757 | res ^= src; |
4758 | WRITE_BYTE_F(adr, res) |
4759 | POST_IO |
4760 | RET(18) |
4761 | } |
4762 | |
4763 | // BCHG |
4764 | OPCODE(0x0178) |
4765 | { |
4766 | u32 adr, res; |
4767 | u32 src, dst; |
4768 | |
4769 | src = DREGu8((Opcode >> 9) & 7); |
4770 | src = 1 << (src & 7); |
4771 | FETCH_SWORD(adr); |
4772 | PRE_IO |
4773 | READ_BYTE_F(adr, res) |
4774 | flag_NotZ = res & src; |
4775 | res ^= src; |
4776 | WRITE_BYTE_F(adr, res) |
4777 | POST_IO |
4778 | RET(16) |
4779 | } |
4780 | |
4781 | // BCHG |
4782 | OPCODE(0x0179) |
4783 | { |
4784 | u32 adr, res; |
4785 | u32 src, dst; |
4786 | |
4787 | src = DREGu8((Opcode >> 9) & 7); |
4788 | src = 1 << (src & 7); |
4789 | FETCH_LONG(adr); |
4790 | PRE_IO |
4791 | READ_BYTE_F(adr, res) |
4792 | flag_NotZ = res & src; |
4793 | res ^= src; |
4794 | WRITE_BYTE_F(adr, res) |
4795 | POST_IO |
4796 | RET(20) |
4797 | } |
4798 | |
4799 | // BCHG |
4800 | OPCODE(0x015F) |
4801 | { |
4802 | u32 adr, res; |
4803 | u32 src, dst; |
4804 | |
4805 | src = DREGu8((Opcode >> 9) & 7); |
4806 | src = 1 << (src & 7); |
4807 | adr = AREG(7); |
4808 | AREG(7) += 2; |
4809 | PRE_IO |
4810 | READ_BYTE_F(adr, res) |
4811 | flag_NotZ = res & src; |
4812 | res ^= src; |
4813 | WRITE_BYTE_F(adr, res) |
4814 | POST_IO |
4815 | RET(12) |
4816 | } |
4817 | |
4818 | // BCHG |
4819 | OPCODE(0x0167) |
4820 | { |
4821 | u32 adr, res; |
4822 | u32 src, dst; |
4823 | |
4824 | src = DREGu8((Opcode >> 9) & 7); |
4825 | src = 1 << (src & 7); |
4826 | adr = AREG(7) - 2; |
4827 | AREG(7) = adr; |
4828 | PRE_IO |
4829 | READ_BYTE_F(adr, res) |
4830 | flag_NotZ = res & src; |
4831 | res ^= src; |
4832 | WRITE_BYTE_F(adr, res) |
4833 | POST_IO |
4834 | RET(14) |
4835 | } |
4836 | |
4837 | // BCLR |
4838 | OPCODE(0x0180) |
4839 | { |
4840 | u32 adr, res; |
4841 | u32 src, dst; |
4842 | |
4843 | src = DREGu32((Opcode >> 9) & 7); |
4844 | src = 1 << (src & 31); |
4845 | res = DREGu32((Opcode >> 0) & 7); |
4846 | flag_NotZ = res & src; |
4847 | res &= ~src; |
4848 | DREGu32((Opcode >> 0) & 7) = res; |
4849 | RET(10) |
4850 | } |
4851 | |
4852 | // BCLR |
4853 | OPCODE(0x0190) |
4854 | { |
4855 | u32 adr, res; |
4856 | u32 src, dst; |
4857 | |
4858 | src = DREGu8((Opcode >> 9) & 7); |
4859 | src = 1 << (src & 7); |
4860 | adr = AREG((Opcode >> 0) & 7); |
4861 | PRE_IO |
4862 | READ_BYTE_F(adr, res) |
4863 | flag_NotZ = res & src; |
4864 | res &= ~src; |
4865 | WRITE_BYTE_F(adr, res) |
4866 | POST_IO |
4867 | RET(12) |
4868 | } |
4869 | |
4870 | // BCLR |
4871 | OPCODE(0x0198) |
4872 | { |
4873 | u32 adr, res; |
4874 | u32 src, dst; |
4875 | |
4876 | src = DREGu8((Opcode >> 9) & 7); |
4877 | src = 1 << (src & 7); |
4878 | adr = AREG((Opcode >> 0) & 7); |
4879 | AREG((Opcode >> 0) & 7) += 1; |
4880 | PRE_IO |
4881 | READ_BYTE_F(adr, res) |
4882 | flag_NotZ = res & src; |
4883 | res &= ~src; |
4884 | WRITE_BYTE_F(adr, res) |
4885 | POST_IO |
4886 | RET(12) |
4887 | } |
4888 | |
4889 | // BCLR |
4890 | OPCODE(0x01A0) |
4891 | { |
4892 | u32 adr, res; |
4893 | u32 src, dst; |
4894 | |
4895 | src = DREGu8((Opcode >> 9) & 7); |
4896 | src = 1 << (src & 7); |
4897 | adr = AREG((Opcode >> 0) & 7) - 1; |
4898 | AREG((Opcode >> 0) & 7) = adr; |
4899 | PRE_IO |
4900 | READ_BYTE_F(adr, res) |
4901 | flag_NotZ = res & src; |
4902 | res &= ~src; |
4903 | WRITE_BYTE_F(adr, res) |
4904 | POST_IO |
4905 | RET(14) |
4906 | } |
4907 | |
4908 | // BCLR |
4909 | OPCODE(0x01A8) |
4910 | { |
4911 | u32 adr, res; |
4912 | u32 src, dst; |
4913 | |
4914 | src = DREGu8((Opcode >> 9) & 7); |
4915 | src = 1 << (src & 7); |
4916 | FETCH_SWORD(adr); |
4917 | adr += AREG((Opcode >> 0) & 7); |
4918 | PRE_IO |
4919 | READ_BYTE_F(adr, res) |
4920 | flag_NotZ = res & src; |
4921 | res &= ~src; |
4922 | WRITE_BYTE_F(adr, res) |
4923 | POST_IO |
4924 | RET(16) |
4925 | } |
4926 | |
4927 | // BCLR |
4928 | OPCODE(0x01B0) |
4929 | { |
4930 | u32 adr, res; |
4931 | u32 src, dst; |
4932 | |
4933 | src = DREGu8((Opcode >> 9) & 7); |
4934 | src = 1 << (src & 7); |
4935 | adr = AREG((Opcode >> 0) & 7); |
4936 | DECODE_EXT_WORD |
4937 | PRE_IO |
4938 | READ_BYTE_F(adr, res) |
4939 | flag_NotZ = res & src; |
4940 | res &= ~src; |
4941 | WRITE_BYTE_F(adr, res) |
4942 | POST_IO |
4943 | RET(18) |
4944 | } |
4945 | |
4946 | // BCLR |
4947 | OPCODE(0x01B8) |
4948 | { |
4949 | u32 adr, res; |
4950 | u32 src, dst; |
4951 | |
4952 | src = DREGu8((Opcode >> 9) & 7); |
4953 | src = 1 << (src & 7); |
4954 | FETCH_SWORD(adr); |
4955 | PRE_IO |
4956 | READ_BYTE_F(adr, res) |
4957 | flag_NotZ = res & src; |
4958 | res &= ~src; |
4959 | WRITE_BYTE_F(adr, res) |
4960 | POST_IO |
4961 | RET(16) |
4962 | } |
4963 | |
4964 | // BCLR |
4965 | OPCODE(0x01B9) |
4966 | { |
4967 | u32 adr, res; |
4968 | u32 src, dst; |
4969 | |
4970 | src = DREGu8((Opcode >> 9) & 7); |
4971 | src = 1 << (src & 7); |
4972 | FETCH_LONG(adr); |
4973 | PRE_IO |
4974 | READ_BYTE_F(adr, res) |
4975 | flag_NotZ = res & src; |
4976 | res &= ~src; |
4977 | WRITE_BYTE_F(adr, res) |
4978 | POST_IO |
4979 | RET(20) |
4980 | } |
4981 | |
4982 | // BCLR |
4983 | OPCODE(0x019F) |
4984 | { |
4985 | u32 adr, res; |
4986 | u32 src, dst; |
4987 | |
4988 | src = DREGu8((Opcode >> 9) & 7); |
4989 | src = 1 << (src & 7); |
4990 | adr = AREG(7); |
4991 | AREG(7) += 2; |
4992 | PRE_IO |
4993 | READ_BYTE_F(adr, res) |
4994 | flag_NotZ = res & src; |
4995 | res &= ~src; |
4996 | WRITE_BYTE_F(adr, res) |
4997 | POST_IO |
4998 | RET(12) |
4999 | } |
5000 | |
5001 | // BCLR |
5002 | OPCODE(0x01A7) |
5003 | { |
5004 | u32 adr, res; |
5005 | u32 src, dst; |
5006 | |
5007 | src = DREGu8((Opcode >> 9) & 7); |
5008 | src = 1 << (src & 7); |
5009 | adr = AREG(7) - 2; |
5010 | AREG(7) = adr; |
5011 | PRE_IO |
5012 | READ_BYTE_F(adr, res) |
5013 | flag_NotZ = res & src; |
5014 | res &= ~src; |
5015 | WRITE_BYTE_F(adr, res) |
5016 | POST_IO |
5017 | RET(14) |
5018 | } |
5019 | |
5020 | // BSET |
5021 | OPCODE(0x01C0) |
5022 | { |
5023 | u32 adr, res; |
5024 | u32 src, dst; |
5025 | |
5026 | src = DREGu32((Opcode >> 9) & 7); |
5027 | src = 1 << (src & 31); |
5028 | res = DREGu32((Opcode >> 0) & 7); |
5029 | flag_NotZ = res & src; |
5030 | res |= src; |
5031 | DREGu32((Opcode >> 0) & 7) = res; |
5032 | RET(8) |
5033 | } |
5034 | |
5035 | // BSET |
5036 | OPCODE(0x01D0) |
5037 | { |
5038 | u32 adr, res; |
5039 | u32 src, dst; |
5040 | |
5041 | src = DREGu8((Opcode >> 9) & 7); |
5042 | src = 1 << (src & 7); |
5043 | adr = AREG((Opcode >> 0) & 7); |
5044 | PRE_IO |
5045 | READ_BYTE_F(adr, res) |
5046 | flag_NotZ = res & src; |
5047 | res |= src; |
5048 | WRITE_BYTE_F(adr, res) |
5049 | POST_IO |
5050 | RET(12) |
5051 | } |
5052 | |
5053 | // BSET |
5054 | OPCODE(0x01D8) |
5055 | { |
5056 | u32 adr, res; |
5057 | u32 src, dst; |
5058 | |
5059 | src = DREGu8((Opcode >> 9) & 7); |
5060 | src = 1 << (src & 7); |
5061 | adr = AREG((Opcode >> 0) & 7); |
5062 | AREG((Opcode >> 0) & 7) += 1; |
5063 | PRE_IO |
5064 | READ_BYTE_F(adr, res) |
5065 | flag_NotZ = res & src; |
5066 | res |= src; |
5067 | WRITE_BYTE_F(adr, res) |
5068 | POST_IO |
5069 | RET(12) |
5070 | } |
5071 | |
5072 | // BSET |
5073 | OPCODE(0x01E0) |
5074 | { |
5075 | u32 adr, res; |
5076 | u32 src, dst; |
5077 | |
5078 | src = DREGu8((Opcode >> 9) & 7); |
5079 | src = 1 << (src & 7); |
5080 | adr = AREG((Opcode >> 0) & 7) - 1; |
5081 | AREG((Opcode >> 0) & 7) = adr; |
5082 | PRE_IO |
5083 | READ_BYTE_F(adr, res) |
5084 | flag_NotZ = res & src; |
5085 | res |= src; |
5086 | WRITE_BYTE_F(adr, res) |
5087 | POST_IO |
5088 | RET(14) |
5089 | } |
5090 | |
5091 | // BSET |
5092 | OPCODE(0x01E8) |
5093 | { |
5094 | u32 adr, res; |
5095 | u32 src, dst; |
5096 | |
5097 | src = DREGu8((Opcode >> 9) & 7); |
5098 | src = 1 << (src & 7); |
5099 | FETCH_SWORD(adr); |
5100 | adr += AREG((Opcode >> 0) & 7); |
5101 | PRE_IO |
5102 | READ_BYTE_F(adr, res) |
5103 | flag_NotZ = res & src; |
5104 | res |= src; |
5105 | WRITE_BYTE_F(adr, res) |
5106 | POST_IO |
5107 | RET(16) |
5108 | } |
5109 | |
5110 | // BSET |
5111 | OPCODE(0x01F0) |
5112 | { |
5113 | u32 adr, res; |
5114 | u32 src, dst; |
5115 | |
5116 | src = DREGu8((Opcode >> 9) & 7); |
5117 | src = 1 << (src & 7); |
5118 | adr = AREG((Opcode >> 0) & 7); |
5119 | DECODE_EXT_WORD |
5120 | PRE_IO |
5121 | READ_BYTE_F(adr, res) |
5122 | flag_NotZ = res & src; |
5123 | res |= src; |
5124 | WRITE_BYTE_F(adr, res) |
5125 | POST_IO |
5126 | RET(18) |
5127 | } |
5128 | |
5129 | // BSET |
5130 | OPCODE(0x01F8) |
5131 | { |
5132 | u32 adr, res; |
5133 | u32 src, dst; |
5134 | |
5135 | src = DREGu8((Opcode >> 9) & 7); |
5136 | src = 1 << (src & 7); |
5137 | FETCH_SWORD(adr); |
5138 | PRE_IO |
5139 | READ_BYTE_F(adr, res) |
5140 | flag_NotZ = res & src; |
5141 | res |= src; |
5142 | WRITE_BYTE_F(adr, res) |
5143 | POST_IO |
5144 | RET(16) |
5145 | } |
5146 | |
5147 | // BSET |
5148 | OPCODE(0x01F9) |
5149 | { |
5150 | u32 adr, res; |
5151 | u32 src, dst; |
5152 | |
5153 | src = DREGu8((Opcode >> 9) & 7); |
5154 | src = 1 << (src & 7); |
5155 | FETCH_LONG(adr); |
5156 | PRE_IO |
5157 | READ_BYTE_F(adr, res) |
5158 | flag_NotZ = res & src; |
5159 | res |= src; |
5160 | WRITE_BYTE_F(adr, res) |
5161 | POST_IO |
5162 | RET(20) |
5163 | } |
5164 | |
5165 | // BSET |
5166 | OPCODE(0x01DF) |
5167 | { |
5168 | u32 adr, res; |
5169 | u32 src, dst; |
5170 | |
5171 | src = DREGu8((Opcode >> 9) & 7); |
5172 | src = 1 << (src & 7); |
5173 | adr = AREG(7); |
5174 | AREG(7) += 2; |
5175 | PRE_IO |
5176 | READ_BYTE_F(adr, res) |
5177 | flag_NotZ = res & src; |
5178 | res |= src; |
5179 | WRITE_BYTE_F(adr, res) |
5180 | POST_IO |
5181 | RET(12) |
5182 | } |
5183 | |
5184 | // BSET |
5185 | OPCODE(0x01E7) |
5186 | { |
5187 | u32 adr, res; |
5188 | u32 src, dst; |
5189 | |
5190 | src = DREGu8((Opcode >> 9) & 7); |
5191 | src = 1 << (src & 7); |
5192 | adr = AREG(7) - 2; |
5193 | AREG(7) = adr; |
5194 | PRE_IO |
5195 | READ_BYTE_F(adr, res) |
5196 | flag_NotZ = res & src; |
5197 | res |= src; |
5198 | WRITE_BYTE_F(adr, res) |
5199 | POST_IO |
5200 | RET(14) |
5201 | } |
5202 | |
5203 | // MOVEPWaD |
5204 | OPCODE(0x0108) |
5205 | { |
5206 | u32 adr, res; |
5207 | u32 src, dst; |
5208 | |
5209 | FETCH_SWORD(adr); |
5210 | adr += AREG((Opcode >> 0) & 7); |
5211 | PRE_IO |
5212 | READ_BYTE_F(adr + 0, res) |
5213 | READ_BYTE_F(adr + 2, src) |
5214 | DREGu16((Opcode >> 9) & 7) = (res << 8) | src; |
5215 | POST_IO |
03e4f2a3 |
5216 | #ifdef USE_CYCLONE_TIMING |
5217 | RET(16) |
5218 | #else |
70357ce5 |
5219 | RET(24) |
03e4f2a3 |
5220 | #endif |
70357ce5 |
5221 | } |
5222 | |
5223 | // MOVEPLaD |
5224 | OPCODE(0x0148) |
5225 | { |
5226 | u32 adr, res; |
5227 | u32 src, dst; |
5228 | |
5229 | FETCH_SWORD(adr); |
5230 | adr += AREG((Opcode >> 0) & 7); |
5231 | PRE_IO |
5232 | READ_BYTE_F(adr, res) |
5233 | res <<= 24; |
5234 | adr += 2; |
5235 | READ_BYTE_F(adr, src) |
5236 | res |= src << 16; |
5237 | adr += 2; |
5238 | READ_BYTE_F(adr, src) |
5239 | res |= src << 8; |
5240 | adr += 2; |
5241 | READ_BYTE_F(adr, src) |
5242 | DREG((Opcode >> 9) & 7) = res | src; |
5243 | POST_IO |
03e4f2a3 |
5244 | #ifdef USE_CYCLONE_TIMING |
5245 | RET(24) |
5246 | #else |
70357ce5 |
5247 | RET(32) |
03e4f2a3 |
5248 | #endif |
70357ce5 |
5249 | } |
5250 | |
5251 | // MOVEPWDa |
5252 | OPCODE(0x0188) |
5253 | { |
5254 | u32 adr, res; |
5255 | u32 src, dst; |
5256 | |
5257 | res = DREGu32((Opcode >> 9) & 7); |
5258 | FETCH_SWORD(adr); |
5259 | adr += AREG((Opcode >> 0) & 7); |
5260 | PRE_IO |
5261 | WRITE_BYTE_F(adr + 0, res >> 8) |
5262 | WRITE_BYTE_F(adr + 2, res >> 0) |
5263 | POST_IO |
03e4f2a3 |
5264 | #ifdef USE_CYCLONE_TIMING |
5265 | RET(16) |
5266 | #else |
70357ce5 |
5267 | RET(24) |
03e4f2a3 |
5268 | #endif |
70357ce5 |
5269 | } |
5270 | |
5271 | // MOVEPLDa |
5272 | OPCODE(0x01C8) |
5273 | { |
5274 | u32 adr, res; |
5275 | u32 src, dst; |
5276 | |
5277 | res = DREGu32((Opcode >> 9) & 7); |
5278 | FETCH_SWORD(adr); |
5279 | adr += AREG((Opcode >> 0) & 7); |
5280 | PRE_IO |
5281 | WRITE_BYTE_F(adr, res >> 24) |
5282 | adr += 2; |
5283 | WRITE_BYTE_F(adr, res >> 16) |
5284 | adr += 2; |
5285 | WRITE_BYTE_F(adr, res >> 8) |
5286 | adr += 2; |
5287 | WRITE_BYTE_F(adr, res >> 0) |
5288 | POST_IO |
03e4f2a3 |
5289 | #ifdef USE_CYCLONE_TIMING |
5290 | RET(24) |
5291 | #else |
70357ce5 |
5292 | RET(32) |
03e4f2a3 |
5293 | #endif |
70357ce5 |
5294 | } |
5295 | |
5296 | // MOVEB |
5297 | OPCODE(0x1000) |
5298 | { |
5299 | u32 adr, res; |
5300 | u32 src, dst; |
5301 | |
5302 | res = DREGu8((Opcode >> 0) & 7); |
5303 | flag_C = 0; |
5304 | flag_V = 0; |
5305 | flag_NotZ = res; |
5306 | flag_N = res; |
5307 | DREGu8((Opcode >> 9) & 7) = res; |
5308 | RET(4) |
5309 | } |
5310 | |
5311 | // MOVEB |
5312 | OPCODE(0x1080) |
5313 | { |
5314 | u32 adr, res; |
5315 | u32 src, dst; |
5316 | |
5317 | res = DREGu8((Opcode >> 0) & 7); |
5318 | flag_C = 0; |
5319 | flag_V = 0; |
5320 | flag_NotZ = res; |
5321 | flag_N = res; |
5322 | adr = AREG((Opcode >> 9) & 7); |
5323 | PRE_IO |
5324 | WRITE_BYTE_F(adr, res) |
5325 | POST_IO |
5326 | RET(8) |
5327 | } |
5328 | |
5329 | // MOVEB |
5330 | OPCODE(0x10C0) |
5331 | { |
5332 | u32 adr, res; |
5333 | u32 src, dst; |
5334 | |
5335 | res = DREGu8((Opcode >> 0) & 7); |
5336 | flag_C = 0; |
5337 | flag_V = 0; |
5338 | flag_NotZ = res; |
5339 | flag_N = res; |
5340 | adr = AREG((Opcode >> 9) & 7); |
5341 | AREG((Opcode >> 9) & 7) += 1; |
5342 | PRE_IO |
5343 | WRITE_BYTE_F(adr, res) |
5344 | POST_IO |
5345 | RET(8) |
5346 | } |
5347 | |
5348 | // MOVEB |
5349 | OPCODE(0x1100) |
5350 | { |
5351 | u32 adr, res; |
5352 | u32 src, dst; |
5353 | |
5354 | res = DREGu8((Opcode >> 0) & 7); |
5355 | flag_C = 0; |
5356 | flag_V = 0; |
5357 | flag_NotZ = res; |
5358 | flag_N = res; |
5359 | adr = AREG((Opcode >> 9) & 7) - 1; |
5360 | AREG((Opcode >> 9) & 7) = adr; |
5361 | PRE_IO |
5362 | WRITE_BYTE_F(adr, res) |
5363 | POST_IO |
5364 | RET(8) |
5365 | } |
5366 | |
5367 | // MOVEB |
5368 | OPCODE(0x1140) |
5369 | { |
5370 | u32 adr, res; |
5371 | u32 src, dst; |
5372 | |
5373 | res = DREGu8((Opcode >> 0) & 7); |
5374 | flag_C = 0; |
5375 | flag_V = 0; |
5376 | flag_NotZ = res; |
5377 | flag_N = res; |
5378 | FETCH_SWORD(adr); |
5379 | adr += AREG((Opcode >> 9) & 7); |
5380 | PRE_IO |
5381 | WRITE_BYTE_F(adr, res) |
5382 | POST_IO |
5383 | RET(12) |
5384 | } |
5385 | |
5386 | // MOVEB |
5387 | OPCODE(0x1180) |
5388 | { |
5389 | u32 adr, res; |
5390 | u32 src, dst; |
5391 | |
5392 | res = DREGu8((Opcode >> 0) & 7); |
5393 | flag_C = 0; |
5394 | flag_V = 0; |
5395 | flag_NotZ = res; |
5396 | flag_N = res; |
5397 | adr = AREG((Opcode >> 9) & 7); |
5398 | DECODE_EXT_WORD |
5399 | PRE_IO |
5400 | WRITE_BYTE_F(adr, res) |
5401 | POST_IO |
5402 | RET(14) |
5403 | } |
5404 | |
5405 | // MOVEB |
5406 | OPCODE(0x11C0) |
5407 | { |
5408 | u32 adr, res; |
5409 | u32 src, dst; |
5410 | |
5411 | res = DREGu8((Opcode >> 0) & 7); |
5412 | flag_C = 0; |
5413 | flag_V = 0; |
5414 | flag_NotZ = res; |
5415 | flag_N = res; |
5416 | FETCH_SWORD(adr); |
5417 | PRE_IO |
5418 | WRITE_BYTE_F(adr, res) |
5419 | POST_IO |
5420 | RET(12) |
5421 | } |
5422 | |
5423 | // MOVEB |
5424 | OPCODE(0x13C0) |
5425 | { |
5426 | u32 adr, res; |
5427 | u32 src, dst; |
5428 | |
5429 | res = DREGu8((Opcode >> 0) & 7); |
5430 | flag_C = 0; |
5431 | flag_V = 0; |
5432 | flag_NotZ = res; |
5433 | flag_N = res; |
5434 | FETCH_LONG(adr); |
5435 | PRE_IO |
5436 | WRITE_BYTE_F(adr, res) |
5437 | POST_IO |
5438 | RET(16) |
5439 | } |
5440 | |
5441 | // MOVEB |
5442 | OPCODE(0x1EC0) |
5443 | { |
5444 | u32 adr, res; |
5445 | u32 src, dst; |
5446 | |
5447 | res = DREGu8((Opcode >> 0) & 7); |
5448 | flag_C = 0; |
5449 | flag_V = 0; |
5450 | flag_NotZ = res; |
5451 | flag_N = res; |
5452 | adr = AREG(7); |
5453 | AREG(7) += 2; |
5454 | PRE_IO |
5455 | WRITE_BYTE_F(adr, res) |
5456 | POST_IO |
5457 | RET(8) |
5458 | } |
5459 | |
5460 | // MOVEB |
5461 | OPCODE(0x1F00) |
5462 | { |
5463 | u32 adr, res; |
5464 | u32 src, dst; |
5465 | |
5466 | res = DREGu8((Opcode >> 0) & 7); |
5467 | flag_C = 0; |
5468 | flag_V = 0; |
5469 | flag_NotZ = res; |
5470 | flag_N = res; |
5471 | adr = AREG(7) - 2; |
5472 | AREG(7) = adr; |
5473 | PRE_IO |
5474 | WRITE_BYTE_F(adr, res) |
5475 | POST_IO |
5476 | RET(8) |
5477 | } |
5478 | |
03e4f2a3 |
5479 | #if 0 |
70357ce5 |
5480 | // MOVEB |
5481 | OPCODE(0x1008) |
5482 | { |
5483 | u32 adr, res; |
5484 | u32 src, dst; |
5485 | |
5486 | // can't read byte from Ax registers ! |
5487 | m68kcontext.execinfo |= M68K_FAULTED; |
5488 | m68kcontext.io_cycle_counter = 0; |
5489 | /* |
5490 | goto famec_Exec_End; |
5491 | flag_C = 0; |
5492 | flag_V = 0; |
5493 | flag_NotZ = res; |
5494 | flag_N = res; |
5495 | DREGu8((Opcode >> 9) & 7) = res; |
5496 | */ |
5497 | RET(4) |
5498 | } |
5499 | |
5500 | // MOVEB |
5501 | OPCODE(0x1088) |
5502 | { |
5503 | u32 adr, res; |
5504 | u32 src, dst; |
5505 | |
5506 | // can't read byte from Ax registers ! |
5507 | m68kcontext.execinfo |= M68K_FAULTED; |
5508 | m68kcontext.io_cycle_counter = 0; |
5509 | /* |
5510 | goto famec_Exec_End; |
5511 | flag_C = 0; |
5512 | flag_V = 0; |
5513 | flag_NotZ = res; |
5514 | flag_N = res; |
5515 | adr = AREG((Opcode >> 9) & 7); |
5516 | PRE_IO |
5517 | WRITE_BYTE_F(adr, res) |
5518 | POST_IO |
5519 | */ |
5520 | RET(8) |
5521 | } |
5522 | |
5523 | // MOVEB |
5524 | OPCODE(0x10C8) |
5525 | { |
5526 | u32 adr, res; |
5527 | u32 src, dst; |
5528 | |
5529 | // can't read byte from Ax registers ! |
5530 | m68kcontext.execinfo |= M68K_FAULTED; |
5531 | m68kcontext.io_cycle_counter = 0; |
5532 | /* |
5533 | goto famec_Exec_End; |
5534 | flag_C = 0; |
5535 | flag_V = 0; |
5536 | flag_NotZ = res; |
5537 | flag_N = res; |
5538 | adr = AREG((Opcode >> 9) & 7); |
5539 | AREG((Opcode >> 9) & 7) += 1; |
5540 | PRE_IO |
5541 | WRITE_BYTE_F(adr, res) |
5542 | POST_IO |
5543 | */ |
5544 | RET(8) |
5545 | } |
5546 | |
5547 | // MOVEB |
5548 | OPCODE(0x1108) |
5549 | { |
5550 | u32 adr, res; |
5551 | u32 src, dst; |
5552 | |
5553 | // can't read byte from Ax registers ! |
5554 | m68kcontext.execinfo |= M68K_FAULTED; |
5555 | m68kcontext.io_cycle_counter = 0; |
5556 | /* |
5557 | goto famec_Exec_End; |
5558 | flag_C = 0; |
5559 | flag_V = 0; |
5560 | flag_NotZ = res; |
5561 | flag_N = res; |
5562 | adr = AREG((Opcode >> 9) & 7) - 1; |
5563 | AREG((Opcode >> 9) & 7) = adr; |
5564 | PRE_IO |
5565 | WRITE_BYTE_F(adr, res) |
5566 | POST_IO |
5567 | */ |
5568 | RET(8) |
5569 | } |
5570 | |
5571 | // MOVEB |
5572 | OPCODE(0x1148) |
5573 | { |
5574 | u32 adr, res; |
5575 | u32 src, dst; |
5576 | |
5577 | // can't read byte from Ax registers ! |
5578 | m68kcontext.execinfo |= M68K_FAULTED; |
5579 | m68kcontext.io_cycle_counter = 0; |
5580 | /* |
5581 | goto famec_Exec_End; |
5582 | flag_C = 0; |
5583 | flag_V = 0; |
5584 | flag_NotZ = res; |
5585 | flag_N = res; |
5586 | FETCH_SWORD(adr); |
5587 | adr += AREG((Opcode >> 9) & 7); |
5588 | PRE_IO |
5589 | WRITE_BYTE_F(adr, res) |
5590 | POST_IO |
5591 | */ |
5592 | RET(12) |
5593 | } |
5594 | |
5595 | // MOVEB |
5596 | OPCODE(0x1188) |
5597 | { |
5598 | u32 adr, res; |
5599 | u32 src, dst; |
5600 | |
5601 | // can't read byte from Ax registers ! |
5602 | m68kcontext.execinfo |= M68K_FAULTED; |
5603 | m68kcontext.io_cycle_counter = 0; |
5604 | /* |
5605 | goto famec_Exec_End; |
5606 | flag_C = 0; |
5607 | flag_V = 0; |
5608 | flag_NotZ = res; |
5609 | flag_N = res; |
5610 | adr = AREG((Opcode >> 9) & 7); |
5611 | DECODE_EXT_WORD |
5612 | PRE_IO |
5613 | WRITE_BYTE_F(adr, res) |
5614 | POST_IO |
5615 | */ |
5616 | RET(14) |
5617 | } |
5618 | |
5619 | // MOVEB |
5620 | OPCODE(0x11C8) |
5621 | { |
5622 | u32 adr, res; |
5623 | u32 src, dst; |
5624 | |
5625 | // can't read byte from Ax registers ! |
5626 | m68kcontext.execinfo |= M68K_FAULTED; |
5627 | m68kcontext.io_cycle_counter = 0; |
5628 | /* |
5629 | goto famec_Exec_End; |
5630 | flag_C = 0; |
5631 | flag_V = 0; |
5632 | flag_NotZ = res; |
5633 | flag_N = res; |
5634 | FETCH_SWORD(adr); |
5635 | PRE_IO |
5636 | WRITE_BYTE_F(adr, res) |
5637 | POST_IO |
5638 | */ |
5639 | RET(12) |
5640 | } |
5641 | |
5642 | // MOVEB |
5643 | OPCODE(0x13C8) |
5644 | { |
5645 | u32 adr, res; |
5646 | u32 src, dst; |
5647 | |
5648 | // can't read byte from Ax registers ! |
5649 | m68kcontext.execinfo |= M68K_FAULTED; |
5650 | m68kcontext.io_cycle_counter = 0; |
5651 | /* |
5652 | goto famec_Exec_End; |
5653 | flag_C = 0; |
5654 | flag_V = 0; |
5655 | flag_NotZ = res; |
5656 | flag_N = res; |
5657 | FETCH_LONG(adr); |
5658 | PRE_IO |
5659 | WRITE_BYTE_F(adr, res) |
5660 | POST_IO |
5661 | */ |
5662 | RET(16) |
5663 | } |
5664 | |
5665 | // MOVEB |
5666 | OPCODE(0x1EC8) |
5667 | { |
5668 | u32 adr, res; |
5669 | u32 src, dst; |
5670 | |
5671 | // can't read byte from Ax registers ! |
5672 | m68kcontext.execinfo |= M68K_FAULTED; |
5673 | m68kcontext.io_cycle_counter = 0; |
5674 | /* |
5675 | goto famec_Exec_End; |
5676 | flag_C = 0; |
5677 | flag_V = 0; |
5678 | flag_NotZ = res; |
5679 | flag_N = res; |
5680 | adr = AREG(7); |
5681 | AREG(7) += 2; |
5682 | PRE_IO |
5683 | WRITE_BYTE_F(adr, res) |
5684 | POST_IO |
5685 | */ |
5686 | RET(8) |
5687 | } |
5688 | |
5689 | // MOVEB |
5690 | OPCODE(0x1F08) |
5691 | { |
5692 | u32 adr, res; |
5693 | u32 src, dst; |
5694 | |
5695 | // can't read byte from Ax registers ! |
5696 | m68kcontext.execinfo |= M68K_FAULTED; |
5697 | m68kcontext.io_cycle_counter = 0; |
5698 | /* |
5699 | goto famec_Exec_End; |
5700 | flag_C = 0; |
5701 | flag_V = 0; |
5702 | flag_NotZ = res; |
5703 | flag_N = res; |
5704 | adr = AREG(7) - 2; |
5705 | AREG(7) = adr; |
5706 | PRE_IO |
5707 | WRITE_BYTE_F(adr, res) |
5708 | POST_IO |
5709 | */ |
5710 | RET(8) |
5711 | } |
03e4f2a3 |
5712 | #endif |
70357ce5 |
5713 | |
5714 | // MOVEB |
5715 | OPCODE(0x1010) |
5716 | { |
5717 | u32 adr, res; |
5718 | u32 src, dst; |
5719 | |
5720 | adr = AREG((Opcode >> 0) & 7); |
5721 | PRE_IO |
5722 | READ_BYTE_F(adr, res) |
5723 | flag_C = 0; |
5724 | flag_V = 0; |
5725 | flag_NotZ = res; |
5726 | flag_N = res; |
5727 | DREGu8((Opcode >> 9) & 7) = res; |
5728 | POST_IO |
5729 | RET(8) |
5730 | } |
5731 | |
5732 | // MOVEB |
5733 | OPCODE(0x1090) |
5734 | { |
5735 | u32 adr, res; |
5736 | u32 src, dst; |
5737 | |
5738 | adr = AREG((Opcode >> 0) & 7); |
5739 | PRE_IO |
5740 | READ_BYTE_F(adr, res) |
5741 | flag_C = 0; |
5742 | flag_V = 0; |
5743 | flag_NotZ = res; |
5744 | flag_N = res; |
5745 | adr = AREG((Opcode >> 9) & 7); |
5746 | WRITE_BYTE_F(adr, res) |
5747 | POST_IO |
5748 | RET(12) |
5749 | } |
5750 | |
5751 | // MOVEB |
5752 | OPCODE(0x10D0) |
5753 | { |
5754 | u32 adr, res; |
5755 | u32 src, dst; |
5756 | |
5757 | adr = AREG((Opcode >> 0) & 7); |
5758 | PRE_IO |
5759 | READ_BYTE_F(adr, res) |
5760 | flag_C = 0; |
5761 | flag_V = 0; |
5762 | flag_NotZ = res; |
5763 | flag_N = res; |
5764 | adr = AREG((Opcode >> 9) & 7); |
5765 | AREG((Opcode >> 9) & 7) += 1; |
5766 | WRITE_BYTE_F(adr, res) |
5767 | POST_IO |
5768 | RET(12) |
5769 | } |
5770 | |
5771 | // MOVEB |
5772 | OPCODE(0x1110) |
5773 | { |
5774 | u32 adr, res; |
5775 | u32 src, dst; |
5776 | |
5777 | adr = AREG((Opcode >> 0) & 7); |
5778 | PRE_IO |
5779 | READ_BYTE_F(adr, res) |
5780 | flag_C = 0; |
5781 | flag_V = 0; |
5782 | flag_NotZ = res; |
5783 | flag_N = res; |
5784 | adr = AREG((Opcode >> 9) & 7) - 1; |
5785 | AREG((Opcode >> 9) & 7) = adr; |
5786 | WRITE_BYTE_F(adr, res) |
5787 | POST_IO |
5788 | RET(12) |
5789 | } |
5790 | |
5791 | // MOVEB |
5792 | OPCODE(0x1150) |
5793 | { |
5794 | u32 adr, res; |
5795 | u32 src, dst; |
5796 | |
5797 | adr = AREG((Opcode >> 0) & 7); |
5798 | PRE_IO |
5799 | READ_BYTE_F(adr, res) |
5800 | flag_C = 0; |
5801 | flag_V = 0; |
5802 | flag_NotZ = res; |
5803 | flag_N = res; |
5804 | FETCH_SWORD(adr); |
5805 | adr += AREG((Opcode >> 9) & 7); |
5806 | WRITE_BYTE_F(adr, res) |
5807 | POST_IO |
5808 | RET(16) |
5809 | } |
5810 | |
5811 | // MOVEB |
5812 | OPCODE(0x1190) |
5813 | { |
5814 | u32 adr, res; |
5815 | u32 src, dst; |
5816 | |
5817 | adr = AREG((Opcode >> 0) & 7); |
5818 | PRE_IO |
5819 | READ_BYTE_F(adr, res) |
5820 | flag_C = 0; |
5821 | flag_V = 0; |
5822 | flag_NotZ = res; |
5823 | flag_N = res; |
5824 | adr = AREG((Opcode >> 9) & 7); |
5825 | DECODE_EXT_WORD |
5826 | WRITE_BYTE_F(adr, res) |
5827 | POST_IO |
5828 | RET(18) |
5829 | } |
5830 | |
5831 | // MOVEB |
5832 | OPCODE(0x11D0) |
5833 | { |
5834 | u32 adr, res; |
5835 | u32 src, dst; |
5836 | |
5837 | adr = AREG((Opcode >> 0) & 7); |
5838 | PRE_IO |
5839 | READ_BYTE_F(adr, res) |
5840 | flag_C = 0; |
5841 | flag_V = 0; |
5842 | flag_NotZ = res; |
5843 | flag_N = res; |
5844 | FETCH_SWORD(adr); |
5845 | WRITE_BYTE_F(adr, res) |
5846 | POST_IO |
5847 | RET(16) |
5848 | } |
5849 | |
5850 | // MOVEB |
5851 | OPCODE(0x13D0) |
5852 | { |
5853 | u32 adr, res; |
5854 | u32 src, dst; |
5855 | |
5856 | adr = AREG((Opcode >> 0) & 7); |
5857 | PRE_IO |
5858 | READ_BYTE_F(adr, res) |
5859 | flag_C = 0; |
5860 | flag_V = 0; |
5861 | flag_NotZ = res; |
5862 | flag_N = res; |
5863 | FETCH_LONG(adr); |
5864 | WRITE_BYTE_F(adr, res) |
5865 | POST_IO |
5866 | RET(20) |
5867 | } |
5868 | |
5869 | // MOVEB |
5870 | OPCODE(0x1ED0) |
5871 | { |
5872 | u32 adr, res; |
5873 | u32 src, dst; |
5874 | |
5875 | adr = AREG((Opcode >> 0) & 7); |
5876 | PRE_IO |
5877 | READ_BYTE_F(adr, res) |
5878 | flag_C = 0; |
5879 | flag_V = 0; |
5880 | flag_NotZ = res; |
5881 | flag_N = res; |
5882 | adr = AREG(7); |
5883 | AREG(7) += 2; |
5884 | WRITE_BYTE_F(adr, res) |
5885 | POST_IO |
5886 | RET(12) |
5887 | } |
5888 | |
5889 | // MOVEB |
5890 | OPCODE(0x1F10) |
5891 | { |
5892 | u32 adr, res; |
5893 | u32 src, dst; |
5894 | |
5895 | adr = AREG((Opcode >> 0) & 7); |
5896 | PRE_IO |
5897 | READ_BYTE_F(adr, res) |
5898 | flag_C = 0; |
5899 | flag_V = 0; |
5900 | flag_NotZ = res; |
5901 | flag_N = res; |
5902 | adr = AREG(7) - 2; |
5903 | AREG(7) = adr; |
5904 | WRITE_BYTE_F(adr, res) |
5905 | POST_IO |
5906 | RET(12) |
5907 | } |
5908 | |
5909 | // MOVEB |
5910 | OPCODE(0x1018) |
5911 | { |
5912 | u32 adr, res; |
5913 | u32 src, dst; |
5914 | |
5915 | adr = AREG((Opcode >> 0) & 7); |
5916 | AREG((Opcode >> 0) & 7) += 1; |
5917 | PRE_IO |
5918 | READ_BYTE_F(adr, res) |
5919 | flag_C = 0; |
5920 | flag_V = 0; |
5921 | flag_NotZ = res; |
5922 | flag_N = res; |
5923 | DREGu8((Opcode >> 9) & 7) = res; |
5924 | POST_IO |
5925 | RET(8) |
5926 | } |
5927 | |
5928 | // MOVEB |
5929 | OPCODE(0x1098) |
5930 | { |
5931 | u32 adr, res; |
5932 | u32 src, dst; |
5933 | |
5934 | adr = AREG((Opcode >> 0) & 7); |
5935 | AREG((Opcode >> 0) & 7) += 1; |
5936 | PRE_IO |
5937 | READ_BYTE_F(adr, res) |
5938 | flag_C = 0; |
5939 | flag_V = 0; |
5940 | flag_NotZ = res; |
5941 | flag_N = res; |
5942 | adr = AREG((Opcode >> 9) & 7); |
5943 | WRITE_BYTE_F(adr, res) |
5944 | POST_IO |
5945 | RET(12) |
5946 | } |
5947 | |
5948 | // MOVEB |
5949 | OPCODE(0x10D8) |
5950 | { |
5951 | u32 adr, res; |
5952 | u32 src, dst; |
5953 | |
5954 | adr = AREG((Opcode >> 0) & 7); |
5955 | AREG((Opcode >> 0) & 7) += 1; |
5956 | PRE_IO |
5957 | READ_BYTE_F(adr, res) |
5958 | flag_C = 0; |
5959 | flag_V = 0; |
5960 | flag_NotZ = res; |
5961 | flag_N = res; |
5962 | adr = AREG((Opcode >> 9) & 7); |
5963 | AREG((Opcode >> 9) & 7) += 1; |
5964 | WRITE_BYTE_F(adr, res) |
5965 | POST_IO |
5966 | RET(12) |
5967 | } |
5968 | |
5969 | // MOVEB |
5970 | OPCODE(0x1118) |
5971 | { |
5972 | u32 adr, res; |
5973 | u32 src, dst; |
5974 | |
5975 | adr = AREG((Opcode >> 0) & 7); |
5976 | AREG((Opcode >> 0) & 7) += 1; |
5977 | PRE_IO |
5978 | READ_BYTE_F(adr, res) |
5979 | flag_C = 0; |
5980 | flag_V = 0; |
5981 | flag_NotZ = res; |
5982 | flag_N = res; |
5983 | adr = AREG((Opcode >> 9) & 7) - 1; |
5984 | AREG((Opcode >> 9) & 7) = adr; |
5985 | WRITE_BYTE_F(adr, res) |
5986 | POST_IO |
5987 | RET(12) |
5988 | } |
5989 | |
5990 | // MOVEB |
5991 | OPCODE(0x1158) |
5992 | { |
5993 | u32 adr, res; |
5994 | u32 src, dst; |
5995 | |
5996 | adr = AREG((Opcode >> 0) & 7); |
5997 | AREG((Opcode >> 0) & 7) += 1; |
5998 | PRE_IO |
5999 | READ_BYTE_F(adr, res) |
6000 | flag_C = 0; |
6001 | flag_V = 0; |
6002 | flag_NotZ = res; |
6003 | flag_N = res; |
6004 | FETCH_SWORD(adr); |
6005 | adr += AREG((Opcode >> 9) & 7); |
6006 | WRITE_BYTE_F(adr, res) |
6007 | POST_IO |
6008 | RET(16) |
6009 | } |
6010 | |
6011 | // MOVEB |
6012 | OPCODE(0x1198) |
6013 | { |
6014 | u32 adr, res; |
6015 | u32 src, dst; |
6016 | |
6017 | adr = AREG((Opcode >> 0) & 7); |
6018 | AREG((Opcode >> 0) & 7) += 1; |
6019 | PRE_IO |
6020 | READ_BYTE_F(adr, res) |
6021 | flag_C = 0; |
6022 | flag_V = 0; |
6023 | flag_NotZ = res; |
6024 | flag_N = res; |
6025 | adr = AREG((Opcode >> 9) & 7); |
6026 | DECODE_EXT_WORD |
6027 | WRITE_BYTE_F(adr, res) |
6028 | POST_IO |
6029 | RET(18) |
6030 | } |
6031 | |
6032 | // MOVEB |
6033 | OPCODE(0x11D8) |
6034 | { |
6035 | u32 adr, res; |
6036 | u32 src, dst; |
6037 | |
6038 | adr = AREG((Opcode >> 0) & 7); |
6039 | AREG((Opcode >> 0) & 7) += 1; |
6040 | PRE_IO |
6041 | READ_BYTE_F(adr, res) |
6042 | flag_C = 0; |
6043 | flag_V = 0; |
6044 | flag_NotZ = res; |
6045 | flag_N = res; |
6046 | FETCH_SWORD(adr); |
6047 | WRITE_BYTE_F(adr, res) |
6048 | POST_IO |
6049 | RET(16) |
6050 | } |
6051 | |
6052 | // MOVEB |
6053 | OPCODE(0x13D8) |
6054 | { |
6055 | u32 adr, res; |
6056 | u32 src, dst; |
6057 | |
6058 | adr = AREG((Opcode >> 0) & 7); |
6059 | AREG((Opcode >> 0) & 7) += 1; |
6060 | PRE_IO |
6061 | READ_BYTE_F(adr, res) |
6062 | flag_C = 0; |
6063 | flag_V = 0; |
6064 | flag_NotZ = res; |
6065 | flag_N = res; |
6066 | FETCH_LONG(adr); |
6067 | WRITE_BYTE_F(adr, res) |
6068 | POST_IO |
6069 | RET(20) |
6070 | } |
6071 | |
6072 | // MOVEB |
6073 | OPCODE(0x1ED8) |
6074 | { |
6075 | u32 adr, res; |
6076 | u32 src, dst; |
6077 | |
6078 | adr = AREG((Opcode >> 0) & 7); |
6079 | AREG((Opcode >> 0) & 7) += 1; |
6080 | PRE_IO |
6081 | READ_BYTE_F(adr, res) |
6082 | flag_C = 0; |
6083 | flag_V = 0; |
6084 | flag_NotZ = res; |
6085 | flag_N = res; |
6086 | adr = AREG(7); |
6087 | AREG(7) += 2; |
6088 | WRITE_BYTE_F(adr, res) |
6089 | POST_IO |
6090 | RET(12) |
6091 | } |
6092 | |
6093 | // MOVEB |
6094 | OPCODE(0x1F18) |
6095 | { |
6096 | u32 adr, res; |
6097 | u32 src, dst; |
6098 | |
6099 | adr = AREG((Opcode >> 0) & 7); |
6100 | AREG((Opcode >> 0) & 7) += 1; |
6101 | PRE_IO |
6102 | READ_BYTE_F(adr, res) |
6103 | flag_C = 0; |
6104 | flag_V = 0; |
6105 | flag_NotZ = res; |
6106 | flag_N = res; |
6107 | adr = AREG(7) - 2; |
6108 | AREG(7) = adr; |
6109 | WRITE_BYTE_F(adr, res) |
6110 | POST_IO |
6111 | RET(12) |
6112 | } |
6113 | |
6114 | // MOVEB |
6115 | OPCODE(0x1020) |
6116 | { |
6117 | u32 adr, res; |
6118 | u32 src, dst; |
6119 | |
6120 | adr = AREG((Opcode >> 0) & 7) - 1; |
6121 | AREG((Opcode >> 0) & 7) = adr; |
6122 | PRE_IO |
6123 | READ_BYTE_F(adr, res) |
6124 | flag_C = 0; |
6125 | flag_V = 0; |
6126 | flag_NotZ = res; |
6127 | flag_N = res; |
6128 | DREGu8((Opcode >> 9) & 7) = res; |
6129 | POST_IO |
6130 | RET(10) |
6131 | } |
6132 | |
6133 | // MOVEB |
6134 | OPCODE(0x10A0) |
6135 | { |
6136 | u32 adr, res; |
6137 | u32 src, dst; |
6138 | |
6139 | adr = AREG((Opcode >> 0) & 7) - 1; |
6140 | AREG((Opcode >> 0) & 7) = adr; |
6141 | PRE_IO |
6142 | READ_BYTE_F(adr, res) |
6143 | flag_C = 0; |
6144 | flag_V = 0; |
6145 | flag_NotZ = res; |
6146 | flag_N = res; |
6147 | adr = AREG((Opcode >> 9) & 7); |
6148 | WRITE_BYTE_F(adr, res) |
6149 | POST_IO |
6150 | RET(14) |
6151 | } |
6152 | |
6153 | // MOVEB |
6154 | OPCODE(0x10E0) |
6155 | { |
6156 | u32 adr, res; |
6157 | u32 src, dst; |
6158 | |
6159 | adr = AREG((Opcode >> 0) & 7) - 1; |
6160 | AREG((Opcode >> 0) & 7) = adr; |
6161 | PRE_IO |
6162 | READ_BYTE_F(adr, res) |
6163 | flag_C = 0; |
6164 | flag_V = 0; |
6165 | flag_NotZ = res; |
6166 | flag_N = res; |
6167 | adr = AREG((Opcode >> 9) & 7); |
6168 | AREG((Opcode >> 9) & 7) += 1; |
6169 | WRITE_BYTE_F(adr, res) |
6170 | POST_IO |
6171 | RET(14) |
6172 | } |
6173 | |
6174 | // MOVEB |
6175 | OPCODE(0x1120) |
6176 | { |
6177 | u32 adr, res; |
6178 | u32 src, dst; |
6179 | |
6180 | adr = AREG((Opcode >> 0) & 7) - 1; |
6181 | AREG((Opcode >> 0) & 7) = adr; |
6182 | PRE_IO |
6183 | READ_BYTE_F(adr, res) |
6184 | flag_C = 0; |
6185 | flag_V = 0; |
6186 | flag_NotZ = res; |
6187 | flag_N = res; |
6188 | adr = AREG((Opcode >> 9) & 7) - 1; |
6189 | AREG((Opcode >> 9) & 7) = adr; |
6190 | WRITE_BYTE_F(adr, res) |
6191 | POST_IO |
6192 | RET(14) |
6193 | } |
6194 | |
6195 | // MOVEB |
6196 | OPCODE(0x1160) |
6197 | { |
6198 | u32 adr, res; |
6199 | u32 src, dst; |
6200 | |
6201 | adr = AREG((Opcode >> 0) & 7) - 1; |
6202 | AREG((Opcode >> 0) & 7) = adr; |
6203 | PRE_IO |
6204 | READ_BYTE_F(adr, res) |
6205 | flag_C = 0; |
6206 | flag_V = 0; |
6207 | flag_NotZ = res; |
6208 | flag_N = res; |
6209 | FETCH_SWORD(adr); |
6210 | adr += AREG((Opcode >> 9) & 7); |
6211 | WRITE_BYTE_F(adr, res) |
6212 | POST_IO |
6213 | RET(18) |
6214 | } |
6215 | |
6216 | // MOVEB |
6217 | OPCODE(0x11A0) |
6218 | { |
6219 | u32 adr, res; |
6220 | u32 src, dst; |
6221 | |
6222 | adr = AREG((Opcode >> 0) & 7) - 1; |
6223 | AREG((Opcode >> 0) & 7) = adr; |
6224 | PRE_IO |
6225 | READ_BYTE_F(adr, res) |
6226 | flag_C = 0; |
6227 | flag_V = 0; |
6228 | flag_NotZ = res; |
6229 | flag_N = res; |
6230 | adr = AREG((Opcode >> 9) & 7); |
6231 | DECODE_EXT_WORD |
6232 | WRITE_BYTE_F(adr, res) |
6233 | POST_IO |
6234 | RET(20) |
6235 | } |
6236 | |
6237 | // MOVEB |
6238 | OPCODE(0x11E0) |
6239 | { |
6240 | u32 adr, res; |
6241 | u32 src, dst; |
6242 | |
6243 | adr = AREG((Opcode >> 0) & 7) - 1; |
6244 | AREG((Opcode >> 0) & 7) = adr; |
6245 | PRE_IO |
6246 | READ_BYTE_F(adr, res) |
6247 | flag_C = 0; |
6248 | flag_V = 0; |
6249 | flag_NotZ = res; |
6250 | flag_N = res; |
6251 | FETCH_SWORD(adr); |
6252 | WRITE_BYTE_F(adr, res) |
6253 | POST_IO |
6254 | RET(18) |
6255 | } |
6256 | |
6257 | // MOVEB |
6258 | OPCODE(0x13E0) |
6259 | { |
6260 | u32 adr, res; |
6261 | u32 src, dst; |
6262 | |
6263 | adr = AREG((Opcode >> 0) & 7) - 1; |
6264 | AREG((Opcode >> 0) & 7) = adr; |
6265 | PRE_IO |
6266 | READ_BYTE_F(adr, res) |
6267 | flag_C = 0; |
6268 | flag_V = 0; |
6269 | flag_NotZ = res; |
6270 | flag_N = res; |
6271 | FETCH_LONG(adr); |
6272 | WRITE_BYTE_F(adr, res) |
6273 | POST_IO |
6274 | RET(22) |
6275 | } |
6276 | |
6277 | // MOVEB |
6278 | OPCODE(0x1EE0) |
6279 | { |
6280 | u32 adr, res; |
6281 | u32 src, dst; |
6282 | |
6283 | adr = AREG((Opcode >> 0) & 7) - 1; |
6284 | AREG((Opcode >> 0) & 7) = adr; |
6285 | PRE_IO |
6286 | READ_BYTE_F(adr, res) |
6287 | flag_C = 0; |
6288 | flag_V = 0; |
6289 | flag_NotZ = res; |
6290 | flag_N = res; |
6291 | adr = AREG(7); |
6292 | AREG(7) += 2; |
6293 | WRITE_BYTE_F(adr, res) |
6294 | POST_IO |
6295 | RET(14) |
6296 | } |
6297 | |
6298 | // MOVEB |
6299 | OPCODE(0x1F20) |
6300 | { |
6301 | u32 adr, res; |
6302 | u32 src, dst; |
6303 | |
6304 | adr = AREG((Opcode >> 0) & 7) - 1; |
6305 | AREG((Opcode >> 0) & 7) = adr; |
6306 | PRE_IO |
6307 | READ_BYTE_F(adr, res) |
6308 | flag_C = 0; |
6309 | flag_V = 0; |
6310 | flag_NotZ = res; |
6311 | flag_N = res; |
6312 | adr = AREG(7) - 2; |
6313 | AREG(7) = adr; |
6314 | WRITE_BYTE_F(adr, res) |
6315 | POST_IO |
6316 | RET(14) |
6317 | } |
6318 | |
6319 | // MOVEB |
6320 | OPCODE(0x1028) |
6321 | { |
6322 | u32 adr, res; |
6323 | u32 src, dst; |
6324 | |
6325 | FETCH_SWORD(adr); |
6326 | adr += AREG((Opcode >> 0) & 7); |
6327 | PRE_IO |
6328 | READ_BYTE_F(adr, res) |
6329 | flag_C = 0; |
6330 | flag_V = 0; |
6331 | flag_NotZ = res; |
6332 | flag_N = res; |
6333 | DREGu8((Opcode >> 9) & 7) = res; |
6334 | POST_IO |
6335 | RET(12) |
6336 | } |
6337 | |
6338 | // MOVEB |
6339 | OPCODE(0x10A8) |
6340 | { |
6341 | u32 adr, res; |
6342 | u32 src, dst; |
6343 | |
6344 | FETCH_SWORD(adr); |
6345 | adr += AREG((Opcode >> 0) & 7); |
6346 | PRE_IO |
6347 | READ_BYTE_F(adr, res) |
6348 | flag_C = 0; |
6349 | flag_V = 0; |
6350 | flag_NotZ = res; |
6351 | flag_N = res; |
6352 | adr = AREG((Opcode >> 9) & 7); |
6353 | WRITE_BYTE_F(adr, res) |
6354 | POST_IO |
6355 | RET(16) |
6356 | } |
6357 | |
6358 | // MOVEB |
6359 | OPCODE(0x10E8) |
6360 | { |
6361 | u32 adr, res; |
6362 | u32 src, dst; |
6363 | |
6364 | FETCH_SWORD(adr); |
6365 | adr += AREG((Opcode >> 0) & 7); |
6366 | PRE_IO |
6367 | READ_BYTE_F(adr, res) |
6368 | flag_C = 0; |
6369 | flag_V = 0; |
6370 | flag_NotZ = res; |
6371 | flag_N = res; |
6372 | adr = AREG((Opcode >> 9) & 7); |
6373 | AREG((Opcode >> 9) & 7) += 1; |
6374 | WRITE_BYTE_F(adr, res) |
6375 | POST_IO |
6376 | RET(16) |
6377 | } |
6378 | |
6379 | // MOVEB |
6380 | OPCODE(0x1128) |
6381 | { |
6382 | u32 adr, res; |
6383 | u32 src, dst; |
6384 | |
6385 | FETCH_SWORD(adr); |
6386 | adr += AREG((Opcode >> 0) & 7); |
6387 | PRE_IO |
6388 | READ_BYTE_F(adr, res) |
6389 | flag_C = 0; |
6390 | flag_V = 0; |
6391 | flag_NotZ = res; |
6392 | flag_N = res; |
6393 | adr = AREG((Opcode >> 9) & 7) - 1; |
6394 | AREG((Opcode >> 9) & 7) = adr; |
6395 | WRITE_BYTE_F(adr, res) |
6396 | POST_IO |
6397 | RET(16) |
6398 | } |
6399 | |
6400 | // MOVEB |
6401 | OPCODE(0x1168) |
6402 | { |
6403 | u32 adr, res; |
6404 | u32 src, dst; |
6405 | |
6406 | FETCH_SWORD(adr); |
6407 | adr += AREG((Opcode >> 0) & 7); |
6408 | PRE_IO |
6409 | READ_BYTE_F(adr, res) |
6410 | flag_C = 0; |
6411 | flag_V = 0; |
6412 | flag_NotZ = res; |
6413 | flag_N = res; |
6414 | FETCH_SWORD(adr); |
6415 | adr += AREG((Opcode >> 9) & 7); |
6416 | WRITE_BYTE_F(adr, res) |
6417 | POST_IO |
6418 | RET(20) |
6419 | } |
6420 | |
6421 | // MOVEB |
6422 | OPCODE(0x11A8) |
6423 | { |
6424 | u32 adr, res; |
6425 | u32 src, dst; |
6426 | |
6427 | FETCH_SWORD(adr); |
6428 | adr += AREG((Opcode >> 0) & 7); |
6429 | PRE_IO |
6430 | READ_BYTE_F(adr, res) |
6431 | flag_C = 0; |
6432 | flag_V = 0; |
6433 | flag_NotZ = res; |
6434 | flag_N = res; |
6435 | adr = AREG((Opcode >> 9) & 7); |
6436 | DECODE_EXT_WORD |
6437 | WRITE_BYTE_F(adr, res) |
6438 | POST_IO |
6439 | RET(22) |
6440 | } |
6441 | |
6442 | // MOVEB |
6443 | OPCODE(0x11E8) |
6444 | { |
6445 | u32 adr, res; |
6446 | u32 src, dst; |
6447 | |
6448 | FETCH_SWORD(adr); |
6449 | adr += AREG((Opcode >> 0) & 7); |
6450 | PRE_IO |
6451 | READ_BYTE_F(adr, res) |
6452 | flag_C = 0; |
6453 | flag_V = 0; |
6454 | flag_NotZ = res; |
6455 | flag_N = res; |
6456 | FETCH_SWORD(adr); |
6457 | WRITE_BYTE_F(adr, res) |
6458 | POST_IO |
6459 | RET(20) |
6460 | } |
6461 | |
6462 | // MOVEB |
6463 | OPCODE(0x13E8) |
6464 | { |
6465 | u32 adr, res; |
6466 | u32 src, dst; |
6467 | |
6468 | FETCH_SWORD(adr); |
6469 | adr += AREG((Opcode >> 0) & 7); |
6470 | PRE_IO |
6471 | READ_BYTE_F(adr, res) |
6472 | flag_C = 0; |
6473 | flag_V = 0; |
6474 | flag_NotZ = res; |
6475 | flag_N = res; |
6476 | FETCH_LONG(adr); |
6477 | WRITE_BYTE_F(adr, res) |
6478 | POST_IO |
6479 | RET(24) |
6480 | } |
6481 | |
6482 | // MOVEB |
6483 | OPCODE(0x1EE8) |
6484 | { |
6485 | u32 adr, res; |
6486 | u32 src, dst; |
6487 | |
6488 | FETCH_SWORD(adr); |
6489 | adr += AREG((Opcode >> 0) & 7); |
6490 | PRE_IO |
6491 | READ_BYTE_F(adr, res) |
6492 | flag_C = 0; |
6493 | flag_V = 0; |
6494 | flag_NotZ = res; |
6495 | flag_N = res; |
6496 | adr = AREG(7); |
6497 | AREG(7) += 2; |
6498 | WRITE_BYTE_F(adr, res) |
6499 | POST_IO |
6500 | RET(16) |
6501 | } |
6502 | |
6503 | // MOVEB |
6504 | OPCODE(0x1F28) |
6505 | { |
6506 | u32 adr, res; |
6507 | u32 src, dst; |
6508 | |
6509 | FETCH_SWORD(adr); |
6510 | adr += AREG((Opcode >> 0) & 7); |
6511 | PRE_IO |
6512 | READ_BYTE_F(adr, res) |
6513 | flag_C = 0; |
6514 | flag_V = 0; |
6515 | flag_NotZ = res; |
6516 | flag_N = res; |
6517 | adr = AREG(7) - 2; |
6518 | AREG(7) = adr; |
6519 | WRITE_BYTE_F(adr, res) |
6520 | POST_IO |
6521 | RET(16) |
6522 | } |
6523 | |
6524 | // MOVEB |
6525 | OPCODE(0x1030) |
6526 | { |
6527 | u32 adr, res; |
6528 | u32 src, dst; |
6529 | |
6530 | adr = AREG((Opcode >> 0) & 7); |
6531 | DECODE_EXT_WORD |
6532 | PRE_IO |
6533 | READ_BYTE_F(adr, res) |
6534 | flag_C = 0; |
6535 | flag_V = 0; |
6536 | flag_NotZ = res; |
6537 | flag_N = res; |
6538 | DREGu8((Opcode >> 9) & 7) = res; |
6539 | POST_IO |
6540 | RET(14) |
6541 | } |
6542 | |
6543 | // MOVEB |
6544 | OPCODE(0x10B0) |
6545 | { |
6546 | u32 adr, res; |
6547 | u32 src, dst; |
6548 | |
6549 | adr = AREG((Opcode >> 0) & 7); |
6550 | DECODE_EXT_WORD |
6551 | PRE_IO |
6552 | READ_BYTE_F(adr, res) |
6553 | flag_C = 0; |
6554 | flag_V = 0; |
6555 | flag_NotZ = res; |
6556 | flag_N = res; |
6557 | adr = AREG((Opcode >> 9) & 7); |
6558 | WRITE_BYTE_F(adr, res) |
6559 | POST_IO |
6560 | RET(18) |
6561 | } |
6562 | |
6563 | // MOVEB |
6564 | OPCODE(0x10F0) |
6565 | { |
6566 | u32 adr, res; |
6567 | u32 src, dst; |
6568 | |
6569 | adr = AREG((Opcode >> 0) & 7); |
6570 | DECODE_EXT_WORD |
6571 | PRE_IO |
6572 | READ_BYTE_F(adr, res) |
6573 | flag_C = 0; |
6574 | flag_V = 0; |
6575 | flag_NotZ = res; |
6576 | flag_N = res; |
6577 | adr = AREG((Opcode >> 9) & 7); |
6578 | AREG((Opcode >> 9) & 7) += 1; |
6579 | WRITE_BYTE_F(adr, res) |
6580 | POST_IO |
6581 | RET(18) |
6582 | } |
6583 | |
6584 | // MOVEB |
6585 | OPCODE(0x1130) |
6586 | { |
6587 | u32 adr, res; |
6588 | u32 src, dst; |
6589 | |
6590 | adr = AREG((Opcode >> 0) & 7); |
6591 | DECODE_EXT_WORD |
6592 | PRE_IO |
6593 | READ_BYTE_F(adr, res) |
6594 | flag_C = 0; |
6595 | flag_V = 0; |
6596 | flag_NotZ = res; |
6597 | flag_N = res; |
6598 | adr = AREG((Opcode >> 9) & 7) - 1; |
6599 | AREG((Opcode >> 9) & 7) = adr; |
6600 | WRITE_BYTE_F(adr, res) |
6601 | POST_IO |
6602 | RET(18) |
6603 | } |
6604 | |
6605 | // MOVEB |
6606 | OPCODE(0x1170) |
6607 | { |
6608 | u32 adr, res; |
6609 | u32 src, dst; |
6610 | |
6611 | adr = AREG((Opcode >> 0) & 7); |
6612 | DECODE_EXT_WORD |
6613 | PRE_IO |
6614 | READ_BYTE_F(adr, res) |
6615 | flag_C = 0; |
6616 | flag_V = 0; |
6617 | flag_NotZ = res; |
6618 | flag_N = res; |
6619 | FETCH_SWORD(adr); |
6620 | adr += AREG((Opcode >> 9) & 7); |
6621 | WRITE_BYTE_F(adr, res) |
6622 | POST_IO |
6623 | RET(22) |
6624 | } |
6625 | |
6626 | // MOVEB |
6627 | OPCODE(0x11B0) |
6628 | { |
6629 | u32 adr, res; |
6630 | u32 src, dst; |
6631 | |
6632 | adr = AREG((Opcode >> 0) & 7); |
6633 | DECODE_EXT_WORD |
6634 | PRE_IO |
6635 | READ_BYTE_F(adr, res) |
6636 | flag_C = 0; |
6637 | flag_V = 0; |
6638 | flag_NotZ = res; |
6639 | flag_N = res; |
6640 | adr = AREG((Opcode >> 9) & 7); |
6641 | DECODE_EXT_WORD |
6642 | WRITE_BYTE_F(adr, res) |
6643 | POST_IO |
6644 | RET(24) |
6645 | } |
6646 | |
6647 | // MOVEB |
6648 | OPCODE(0x11F0) |
6649 | { |
6650 | u32 adr, res; |
6651 | u32 src, dst; |
6652 | |
6653 | adr = AREG((Opcode >> 0) & 7); |
6654 | DECODE_EXT_WORD |
6655 | PRE_IO |
6656 | READ_BYTE_F(adr, res) |
6657 | flag_C = 0; |
6658 | flag_V = 0; |
6659 | flag_NotZ = res; |
6660 | flag_N = res; |
6661 | FETCH_SWORD(adr); |
6662 | WRITE_BYTE_F(adr, res) |
6663 | POST_IO |
6664 | RET(22) |
6665 | } |
6666 | |
6667 | // MOVEB |
6668 | OPCODE(0x13F0) |
6669 | { |
6670 | u32 adr, res; |
6671 | u32 src, dst; |
6672 | |
6673 | adr = AREG((Opcode >> 0) & 7); |
6674 | DECODE_EXT_WORD |
6675 | PRE_IO |
6676 | READ_BYTE_F(adr, res) |
6677 | flag_C = 0; |
6678 | flag_V = 0; |
6679 | flag_NotZ = res; |
6680 | flag_N = res; |
6681 | FETCH_LONG(adr); |
6682 | WRITE_BYTE_F(adr, res) |
6683 | POST_IO |
6684 | RET(26) |
6685 | } |
6686 | |
6687 | // MOVEB |
6688 | OPCODE(0x1EF0) |
6689 | { |
6690 | u32 adr, res; |
6691 | u32 src, dst; |
6692 | |
6693 | adr = AREG((Opcode >> 0) & 7); |
6694 | DECODE_EXT_WORD |
6695 | PRE_IO |
6696 | READ_BYTE_F(adr, res) |
6697 | flag_C = 0; |
6698 | flag_V = 0; |
6699 | flag_NotZ = res; |
6700 | flag_N = res; |
6701 | adr = AREG(7); |
6702 | AREG(7) += 2; |
6703 | WRITE_BYTE_F(adr, res) |
6704 | POST_IO |
6705 | RET(18) |
6706 | } |
6707 | |
6708 | // MOVEB |
6709 | OPCODE(0x1F30) |
6710 | { |
6711 | u32 adr, res; |
6712 | u32 src, dst; |
6713 | |
6714 | adr = AREG((Opcode >> 0) & 7); |
6715 | DECODE_EXT_WORD |
6716 | PRE_IO |
6717 | READ_BYTE_F(adr, res) |
6718 | flag_C = 0; |
6719 | flag_V = 0; |
6720 | flag_NotZ = res; |
6721 | flag_N = res; |
6722 | adr = AREG(7) - 2; |
6723 | AREG(7) = adr; |
6724 | WRITE_BYTE_F(adr, res) |
6725 | POST_IO |
6726 | RET(18) |
6727 | } |
6728 | |
6729 | // MOVEB |
6730 | OPCODE(0x1038) |
6731 | { |
6732 | u32 adr, res; |
6733 | u32 src, dst; |
6734 | |
6735 | FETCH_SWORD(adr); |
6736 | PRE_IO |
6737 | READ_BYTE_F(adr, res) |
6738 | flag_C = 0; |
6739 | flag_V = 0; |
6740 | flag_NotZ = res; |
6741 | flag_N = res; |
6742 | DREGu8((Opcode >> 9) & 7) = res; |
6743 | POST_IO |
6744 | RET(12) |
6745 | } |
6746 | |
6747 | // MOVEB |
6748 | OPCODE(0x10B8) |
6749 | { |
6750 | u32 adr, res; |
6751 | u32 src, dst; |
6752 | |
6753 | FETCH_SWORD(adr); |
6754 | PRE_IO |
6755 | READ_BYTE_F(adr, res) |
6756 | flag_C = 0; |
6757 | flag_V = 0; |
6758 | flag_NotZ = res; |
6759 | flag_N = res; |
6760 | adr = AREG((Opcode >> 9) & 7); |
6761 | WRITE_BYTE_F(adr, res) |
6762 | POST_IO |
6763 | RET(16) |
6764 | } |
6765 | |
6766 | // MOVEB |
6767 | OPCODE(0x10F8) |
6768 | { |
6769 | u32 adr, res; |
6770 | u32 src, dst; |
6771 | |
6772 | FETCH_SWORD(adr); |
6773 | PRE_IO |
6774 | READ_BYTE_F(adr, res) |
6775 | flag_C = 0; |
6776 | flag_V = 0; |
6777 | flag_NotZ = res; |
6778 | flag_N = res; |
6779 | adr = AREG((Opcode >> 9) & 7); |
6780 | AREG((Opcode >> 9) & 7) += 1; |
6781 | WRITE_BYTE_F(adr, res) |
6782 | POST_IO |
6783 | RET(16) |
6784 | } |
6785 | |
6786 | // MOVEB |
6787 | OPCODE(0x1138) |
6788 | { |
6789 | u32 adr, res; |
6790 | u32 src, dst; |
6791 | |
6792 | FETCH_SWORD(adr); |
6793 | PRE_IO |
6794 | READ_BYTE_F(adr, res) |
6795 | flag_C = 0; |
6796 | flag_V = 0; |
6797 | flag_NotZ = res; |
6798 | flag_N = res; |
6799 | adr = AREG((Opcode >> 9) & 7) - 1; |
6800 | AREG((Opcode >> 9) & 7) = adr; |
6801 | WRITE_BYTE_F(adr, res) |
6802 | POST_IO |
6803 | RET(16) |
6804 | } |
6805 | |
6806 | // MOVEB |
6807 | OPCODE(0x1178) |
6808 | { |
6809 | u32 adr, res; |
6810 | u32 src, dst; |
6811 | |
6812 | FETCH_SWORD(adr); |
6813 | PRE_IO |
6814 | READ_BYTE_F(adr, res) |
6815 | flag_C = 0; |
6816 | flag_V = 0; |
6817 | flag_NotZ = res; |
6818 | flag_N = res; |
6819 | FETCH_SWORD(adr); |
6820 | adr += AREG((Opcode >> 9) & 7); |
6821 | WRITE_BYTE_F(adr, res) |
6822 | POST_IO |
6823 | RET(20) |
6824 | } |
6825 | |
6826 | // MOVEB |
6827 | OPCODE(0x11B8) |
6828 | { |
6829 | u32 adr, res; |
6830 | u32 src, dst; |
6831 | |
6832 | FETCH_SWORD(adr); |
6833 | PRE_IO |
6834 | READ_BYTE_F(adr, res) |
6835 | flag_C = 0; |
6836 | flag_V = 0; |
6837 | flag_NotZ = res; |
6838 | flag_N = res; |
6839 | adr = AREG((Opcode >> 9) & 7); |
6840 | DECODE_EXT_WORD |
6841 | WRITE_BYTE_F(adr, res) |
6842 | POST_IO |
6843 | RET(22) |
6844 | } |
6845 | |
6846 | // MOVEB |
6847 | OPCODE(0x11F8) |
6848 | { |
6849 | u32 adr, res; |
6850 | u32 src, dst; |
6851 | |
6852 | FETCH_SWORD(adr); |
6853 | PRE_IO |
6854 | READ_BYTE_F(adr, res) |
6855 | flag_C = 0; |
6856 | flag_V = 0; |
6857 | flag_NotZ = res; |
6858 | flag_N = res; |
6859 | FETCH_SWORD(adr); |
6860 | WRITE_BYTE_F(adr, res) |
6861 | POST_IO |
6862 | RET(20) |
6863 | } |
6864 | |
6865 | // MOVEB |
6866 | OPCODE(0x13F8) |
6867 | { |
6868 | u32 adr, res; |
6869 | u32 src, dst; |
6870 | |
6871 | FETCH_SWORD(adr); |
6872 | PRE_IO |
6873 | READ_BYTE_F(adr, res) |
6874 | flag_C = 0; |
6875 | flag_V = 0; |
6876 | flag_NotZ = res; |
6877 | flag_N = res; |
6878 | FETCH_LONG(adr); |
6879 | WRITE_BYTE_F(adr, res) |
6880 | POST_IO |
6881 | RET(24) |
6882 | } |
6883 | |
6884 | // MOVEB |
6885 | OPCODE(0x1EF8) |
6886 | { |
6887 | u32 adr, res; |
6888 | u32 src, dst; |
6889 | |
6890 | FETCH_SWORD(adr); |
6891 | PRE_IO |
6892 | READ_BYTE_F(adr, res) |
6893 | flag_C = 0; |
6894 | flag_V = 0; |
6895 | flag_NotZ = res; |
6896 | flag_N = res; |
6897 | adr = AREG(7); |
6898 | AREG(7) += 2; |
6899 | WRITE_BYTE_F(adr, res) |
6900 | POST_IO |
6901 | RET(16) |
6902 | } |
6903 | |
6904 | // MOVEB |
6905 | OPCODE(0x1F38) |
6906 | { |
6907 | u32 adr, res; |
6908 | u32 src, dst; |
6909 | |
6910 | FETCH_SWORD(adr); |
6911 | PRE_IO |
6912 | READ_BYTE_F(adr, res) |
6913 | flag_C = 0; |
6914 | flag_V = 0; |
6915 | flag_NotZ = res; |
6916 | flag_N = res; |
6917 | adr = AREG(7) - 2; |
6918 | AREG(7) = adr; |
6919 | WRITE_BYTE_F(adr, res) |
6920 | POST_IO |
6921 | RET(16) |
6922 | } |
6923 | |
6924 | // MOVEB |
6925 | OPCODE(0x1039) |
6926 | { |
6927 | u32 adr, res; |
6928 | u32 src, dst; |
6929 | |
6930 | FETCH_LONG(adr); |
6931 | PRE_IO |
6932 | READ_BYTE_F(adr, res) |
6933 | flag_C = 0; |
6934 | flag_V = 0; |
6935 | flag_NotZ = res; |
6936 | flag_N = res; |
6937 | DREGu8((Opcode >> 9) & 7) = res; |
6938 | POST_IO |
6939 | RET(16) |
6940 | } |
6941 | |
6942 | // MOVEB |
6943 | OPCODE(0x10B9) |
6944 | { |
6945 | u32 adr, res; |
6946 | u32 src, dst; |
6947 | |
6948 | FETCH_LONG(adr); |
6949 | PRE_IO |
6950 | READ_BYTE_F(adr, res) |
6951 | flag_C = 0; |
6952 | flag_V = 0; |
6953 | flag_NotZ = res; |
6954 | flag_N = res; |
6955 | adr = AREG((Opcode >> 9) & 7); |
6956 | WRITE_BYTE_F(adr, res) |
6957 | POST_IO |
6958 | RET(20) |
6959 | } |
6960 | |
6961 | // MOVEB |
6962 | OPCODE(0x10F9) |
6963 | { |
6964 | u32 adr, res; |
6965 | u32 src, dst; |
6966 | |
6967 | FETCH_LONG(adr); |
6968 | PRE_IO |
6969 | READ_BYTE_F(adr, res) |
6970 | flag_C = 0; |
6971 | flag_V = 0; |
6972 | flag_NotZ = res; |
6973 | flag_N = res; |
6974 | adr = AREG((Opcode >> 9) & 7); |
6975 | AREG((Opcode >> 9) & 7) += 1; |
6976 | WRITE_BYTE_F(adr, res) |
6977 | POST_IO |
6978 | RET(20) |
6979 | } |
6980 | |
6981 | // MOVEB |
6982 | OPCODE(0x1139) |
6983 | { |
6984 | u32 adr, res; |
6985 | u32 src, dst; |
6986 | |
6987 | FETCH_LONG(adr); |
6988 | PRE_IO |
6989 | READ_BYTE_F(adr, res) |
6990 | flag_C = 0; |
6991 | flag_V = 0; |
6992 | flag_NotZ = res; |
6993 | flag_N = res; |
6994 | adr = AREG((Opcode >> 9) & 7) - 1; |
6995 | AREG((Opcode >> 9) & 7) = adr; |
6996 | WRITE_BYTE_F(adr, res) |
6997 | POST_IO |
6998 | RET(20) |
6999 | } |
7000 | |
7001 | // MOVEB |
7002 | OPCODE(0x1179) |
7003 | { |
7004 | u32 adr, res; |
7005 | u32 src, dst; |
7006 | |
7007 | FETCH_LONG(adr); |
7008 | PRE_IO |
7009 | READ_BYTE_F(adr, res) |
7010 | flag_C = 0; |
7011 | flag_V = 0; |
7012 | flag_NotZ = res; |
7013 | flag_N = res; |
7014 | FETCH_SWORD(adr); |
7015 | adr += AREG((Opcode >> 9) & 7); |
7016 | WRITE_BYTE_F(adr, res) |
7017 | POST_IO |
7018 | RET(24) |
7019 | } |
7020 | |
7021 | // MOVEB |
7022 | OPCODE(0x11B9) |
7023 | { |
7024 | u32 adr, res; |
7025 | u32 src, dst; |
7026 | |
7027 | FETCH_LONG(adr); |
7028 | PRE_IO |
7029 | READ_BYTE_F(adr, res) |
7030 | flag_C = 0; |
7031 | flag_V = 0; |
7032 | flag_NotZ = res; |
7033 | flag_N = res; |
7034 | adr = AREG((Opcode >> 9) & 7); |
7035 | DECODE_EXT_WORD |
7036 | WRITE_BYTE_F(adr, res) |
7037 | POST_IO |
7038 | RET(26) |
7039 | } |
7040 | |
7041 | // MOVEB |
7042 | OPCODE(0x11F9) |
7043 | { |
7044 | u32 adr, res; |
7045 | u32 src, dst; |
7046 | |
7047 | FETCH_LONG(adr); |
7048 | PRE_IO |
7049 | READ_BYTE_F(adr, res) |
7050 | flag_C = 0; |
7051 | flag_V = 0; |
7052 | flag_NotZ = res; |
7053 | flag_N = res; |
7054 | FETCH_SWORD(adr); |
7055 | WRITE_BYTE_F(adr, res) |
7056 | POST_IO |
7057 | RET(24) |
7058 | } |
7059 | |
7060 | // MOVEB |
7061 | OPCODE(0x13F9) |
7062 | { |
7063 | u32 adr, res; |
7064 | u32 src, dst; |
7065 | |
7066 | FETCH_LONG(adr); |
7067 | PRE_IO |
7068 | READ_BYTE_F(adr, res) |
7069 | flag_C = 0; |
7070 | flag_V = 0; |
7071 | flag_NotZ = res; |
7072 | flag_N = res; |
7073 | FETCH_LONG(adr); |
7074 | WRITE_BYTE_F(adr, res) |
7075 | POST_IO |
7076 | RET(28) |
7077 | } |
7078 | |
7079 | // MOVEB |
7080 | OPCODE(0x1EF9) |
7081 | { |
7082 | u32 adr, res; |
7083 | u32 src, dst; |
7084 | |
7085 | FETCH_LONG(adr); |
7086 | PRE_IO |
7087 | READ_BYTE_F(adr, res) |
7088 | flag_C = 0; |
7089 | flag_V = 0; |
7090 | flag_NotZ = res; |
7091 | flag_N = res; |
7092 | adr = AREG(7); |
7093 | AREG(7) += 2; |
7094 | WRITE_BYTE_F(adr, res) |
7095 | POST_IO |
7096 | RET(20) |
7097 | } |
7098 | |
7099 | // MOVEB |
7100 | OPCODE(0x1F39) |
7101 | { |
7102 | u32 adr, res; |
7103 | u32 src, dst; |
7104 | |
7105 | FETCH_LONG(adr); |
7106 | PRE_IO |
7107 | READ_BYTE_F(adr, res) |
7108 | flag_C = 0; |
7109 | flag_V = 0; |
7110 | flag_NotZ = res; |
7111 | flag_N = res; |
7112 | adr = AREG(7) - 2; |
7113 | AREG(7) = adr; |
7114 | WRITE_BYTE_F(adr, res) |
7115 | POST_IO |
7116 | RET(20) |
7117 | } |
7118 | |
7119 | // MOVEB |
7120 | OPCODE(0x103A) |
7121 | { |
7122 | u32 adr, res; |
7123 | u32 src, dst; |
7124 | |
7125 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7126 | PC++; |
7127 | PRE_IO |
7128 | READ_BYTE_F(adr, res) |
7129 | flag_C = 0; |
7130 | flag_V = 0; |
7131 | flag_NotZ = res; |
7132 | flag_N = res; |
7133 | DREGu8((Opcode >> 9) & 7) = res; |
7134 | POST_IO |
7135 | RET(12) |
7136 | } |
7137 | |
7138 | // MOVEB |
7139 | OPCODE(0x10BA) |
7140 | { |
7141 | u32 adr, res; |
7142 | u32 src, dst; |
7143 | |
7144 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7145 | PC++; |
7146 | PRE_IO |
7147 | READ_BYTE_F(adr, res) |
7148 | flag_C = 0; |
7149 | flag_V = 0; |
7150 | flag_NotZ = res; |
7151 | flag_N = res; |
7152 | adr = AREG((Opcode >> 9) & 7); |
7153 | WRITE_BYTE_F(adr, res) |
7154 | POST_IO |
7155 | RET(16) |
7156 | } |
7157 | |
7158 | // MOVEB |
7159 | OPCODE(0x10FA) |
7160 | { |
7161 | u32 adr, res; |
7162 | u32 src, dst; |
7163 | |
7164 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7165 | PC++; |
7166 | PRE_IO |
7167 | READ_BYTE_F(adr, res) |
7168 | flag_C = 0; |
7169 | flag_V = 0; |
7170 | flag_NotZ = res; |
7171 | flag_N = res; |
7172 | adr = AREG((Opcode >> 9) & 7); |
7173 | AREG((Opcode >> 9) & 7) += 1; |
7174 | WRITE_BYTE_F(adr, res) |
7175 | POST_IO |
7176 | RET(16) |
7177 | } |
7178 | |
7179 | // MOVEB |
7180 | OPCODE(0x113A) |
7181 | { |
7182 | u32 adr, res; |
7183 | u32 src, dst; |
7184 | |
7185 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7186 | PC++; |
7187 | PRE_IO |
7188 | READ_BYTE_F(adr, res) |
7189 | flag_C = 0; |
7190 | flag_V = 0; |
7191 | flag_NotZ = res; |
7192 | flag_N = res; |
7193 | adr = AREG((Opcode >> 9) & 7) - 1; |
7194 | AREG((Opcode >> 9) & 7) = adr; |
7195 | WRITE_BYTE_F(adr, res) |
7196 | POST_IO |
7197 | RET(16) |
7198 | } |
7199 | |
7200 | // MOVEB |
7201 | OPCODE(0x117A) |
7202 | { |
7203 | u32 adr, res; |
7204 | u32 src, dst; |
7205 | |
7206 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7207 | PC++; |
7208 | PRE_IO |
7209 | READ_BYTE_F(adr, res) |
7210 | flag_C = 0; |
7211 | flag_V = 0; |
7212 | flag_NotZ = res; |
7213 | flag_N = res; |
7214 | FETCH_SWORD(adr); |
7215 | adr += AREG((Opcode >> 9) & 7); |
7216 | WRITE_BYTE_F(adr, res) |
7217 | POST_IO |
7218 | RET(20) |
7219 | } |
7220 | |
7221 | // MOVEB |
7222 | OPCODE(0x11BA) |
7223 | { |
7224 | u32 adr, res; |
7225 | u32 src, dst; |
7226 | |
7227 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7228 | PC++; |
7229 | PRE_IO |
7230 | READ_BYTE_F(adr, res) |
7231 | flag_C = 0; |
7232 | flag_V = 0; |
7233 | flag_NotZ = res; |
7234 | flag_N = res; |
7235 | adr = AREG((Opcode >> 9) & 7); |
7236 | DECODE_EXT_WORD |
7237 | WRITE_BYTE_F(adr, res) |
7238 | POST_IO |
7239 | RET(22) |
7240 | } |
7241 | |
7242 | // MOVEB |
7243 | OPCODE(0x11FA) |
7244 | { |
7245 | u32 adr, res; |
7246 | u32 src, dst; |
7247 | |
7248 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7249 | PC++; |
7250 | PRE_IO |
7251 | READ_BYTE_F(adr, res) |
7252 | flag_C = 0; |
7253 | flag_V = 0; |
7254 | flag_NotZ = res; |
7255 | flag_N = res; |
7256 | FETCH_SWORD(adr); |
7257 | WRITE_BYTE_F(adr, res) |
7258 | POST_IO |
7259 | RET(20) |
7260 | } |
7261 | |
7262 | // MOVEB |
7263 | OPCODE(0x13FA) |
7264 | { |
7265 | u32 adr, res; |
7266 | u32 src, dst; |
7267 | |
7268 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7269 | PC++; |
7270 | PRE_IO |
7271 | READ_BYTE_F(adr, res) |
7272 | flag_C = 0; |
7273 | flag_V = 0; |
7274 | flag_NotZ = res; |
7275 | flag_N = res; |
7276 | FETCH_LONG(adr); |
7277 | WRITE_BYTE_F(adr, res) |
7278 | POST_IO |
7279 | RET(24) |
7280 | } |
7281 | |
7282 | // MOVEB |
7283 | OPCODE(0x1EFA) |
7284 | { |
7285 | u32 adr, res; |
7286 | u32 src, dst; |
7287 | |
7288 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7289 | PC++; |
7290 | PRE_IO |
7291 | READ_BYTE_F(adr, res) |
7292 | flag_C = 0; |
7293 | flag_V = 0; |
7294 | flag_NotZ = res; |
7295 | flag_N = res; |
7296 | adr = AREG(7); |
7297 | AREG(7) += 2; |
7298 | WRITE_BYTE_F(adr, res) |
7299 | POST_IO |
7300 | RET(16) |
7301 | } |
7302 | |
7303 | // MOVEB |
7304 | OPCODE(0x1F3A) |
7305 | { |
7306 | u32 adr, res; |
7307 | u32 src, dst; |
7308 | |
7309 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7310 | PC++; |
7311 | PRE_IO |
7312 | READ_BYTE_F(adr, res) |
7313 | flag_C = 0; |
7314 | flag_V = 0; |
7315 | flag_NotZ = res; |
7316 | flag_N = res; |
7317 | adr = AREG(7) - 2; |
7318 | AREG(7) = adr; |
7319 | WRITE_BYTE_F(adr, res) |
7320 | POST_IO |
7321 | RET(16) |
7322 | } |
7323 | |
7324 | // MOVEB |
7325 | OPCODE(0x103B) |
7326 | { |
7327 | u32 adr, res; |
7328 | u32 src, dst; |
7329 | |
7330 | adr = (u32)(PC) - BasePC; |
7331 | DECODE_EXT_WORD |
7332 | PRE_IO |
7333 | READ_BYTE_F(adr, res) |
7334 | flag_C = 0; |
7335 | flag_V = 0; |
7336 | flag_NotZ = res; |
7337 | flag_N = res; |
7338 | DREGu8((Opcode >> 9) & 7) = res; |
7339 | POST_IO |
7340 | RET(14) |
7341 | } |
7342 | |
7343 | // MOVEB |
7344 | OPCODE(0x10BB) |
7345 | { |
7346 | u32 adr, res; |
7347 | u32 src, dst; |
7348 | |
7349 | adr = (u32)(PC) - BasePC; |
7350 | DECODE_EXT_WORD |
7351 | PRE_IO |
7352 | READ_BYTE_F(adr, res) |
7353 | flag_C = 0; |
7354 | flag_V = 0; |
7355 | flag_NotZ = res; |
7356 | flag_N = res; |
7357 | adr = AREG((Opcode >> 9) & 7); |
7358 | WRITE_BYTE_F(adr, res) |
7359 | POST_IO |
7360 | RET(18) |
7361 | } |
7362 | |
7363 | // MOVEB |
7364 | OPCODE(0x10FB) |
7365 | { |
7366 | u32 adr, res; |
7367 | u32 src, dst; |
7368 | |
7369 | adr = (u32)(PC) - BasePC; |
7370 | DECODE_EXT_WORD |
7371 | PRE_IO |
7372 | READ_BYTE_F(adr, res) |
7373 | flag_C = 0; |
7374 | flag_V = 0; |
7375 | flag_NotZ = res; |
7376 | flag_N = res; |
7377 | adr = AREG((Opcode >> 9) & 7); |
7378 | AREG((Opcode >> 9) & 7) += 1; |
7379 | WRITE_BYTE_F(adr, res) |
7380 | POST_IO |
7381 | RET(18) |
7382 | } |
7383 | |
7384 | // MOVEB |
7385 | OPCODE(0x113B) |
7386 | { |
7387 | u32 adr, res; |
7388 | u32 src, dst; |
7389 | |
7390 | adr = (u32)(PC) - BasePC; |
7391 | DECODE_EXT_WORD |
7392 | PRE_IO |
7393 | READ_BYTE_F(adr, res) |
7394 | flag_C = 0; |
7395 | flag_V = 0; |
7396 | flag_NotZ = res; |
7397 | flag_N = res; |
7398 | adr = AREG((Opcode >> 9) & 7) - 1; |
7399 | AREG((Opcode >> 9) & 7) = adr; |
7400 | WRITE_BYTE_F(adr, res) |
7401 | POST_IO |
7402 | RET(18) |
7403 | } |
7404 | |
7405 | // MOVEB |
7406 | OPCODE(0x117B) |
7407 | { |
7408 | u32 adr, res; |
7409 | u32 src, dst; |
7410 | |
7411 | adr = (u32)(PC) - BasePC; |
7412 | DECODE_EXT_WORD |
7413 | PRE_IO |
7414 | READ_BYTE_F(adr, res) |
7415 | flag_C = 0; |
7416 | flag_V = 0; |
7417 | flag_NotZ = res; |
7418 | flag_N = res; |
7419 | FETCH_SWORD(adr); |
7420 | adr += AREG((Opcode >> 9) & 7); |
7421 | WRITE_BYTE_F(adr, res) |
7422 | POST_IO |
7423 | RET(22) |
7424 | } |
7425 | |
7426 | // MOVEB |
7427 | OPCODE(0x11BB) |
7428 | { |
7429 | u32 adr, res; |
7430 | u32 src, dst; |
7431 | |
7432 | adr = (u32)(PC) - BasePC; |
7433 | DECODE_EXT_WORD |
7434 | PRE_IO |
7435 | READ_BYTE_F(adr, res) |
7436 | flag_C = 0; |
7437 | flag_V = 0; |
7438 | flag_NotZ = res; |
7439 | flag_N = res; |
7440 | adr = AREG((Opcode >> 9) & 7); |
7441 | DECODE_EXT_WORD |
7442 | WRITE_BYTE_F(adr, res) |
7443 | POST_IO |
7444 | RET(24) |
7445 | } |
7446 | |
7447 | // MOVEB |
7448 | OPCODE(0x11FB) |
7449 | { |
7450 | u32 adr, res; |
7451 | u32 src, dst; |
7452 | |
7453 | adr = (u32)(PC) - BasePC; |
7454 | DECODE_EXT_WORD |
7455 | PRE_IO |
7456 | READ_BYTE_F(adr, res) |
7457 | flag_C = 0; |
7458 | flag_V = 0; |
7459 | flag_NotZ = res; |
7460 | flag_N = res; |
7461 | FETCH_SWORD(adr); |
7462 | WRITE_BYTE_F(adr, res) |
7463 | POST_IO |
7464 | RET(22) |
7465 | } |
7466 | |
7467 | // MOVEB |
7468 | OPCODE(0x13FB) |
7469 | { |
7470 | u32 adr, res; |
7471 | u32 src, dst; |
7472 | |
7473 | adr = (u32)(PC) - BasePC; |
7474 | DECODE_EXT_WORD |
7475 | PRE_IO |
7476 | READ_BYTE_F(adr, res) |
7477 | flag_C = 0; |
7478 | flag_V = 0; |
7479 | flag_NotZ = res; |
7480 | flag_N = res; |
7481 | FETCH_LONG(adr); |
7482 | WRITE_BYTE_F(adr, res) |
7483 | POST_IO |
7484 | RET(26) |
7485 | } |
7486 | |
7487 | // MOVEB |
7488 | OPCODE(0x1EFB) |
7489 | { |
7490 | u32 adr, res; |
7491 | u32 src, dst; |
7492 | |
7493 | adr = (u32)(PC) - BasePC; |
7494 | DECODE_EXT_WORD |
7495 | PRE_IO |
7496 | READ_BYTE_F(adr, res) |
7497 | flag_C = 0; |
7498 | flag_V = 0; |
7499 | flag_NotZ = res; |
7500 | flag_N = res; |
7501 | adr = AREG(7); |
7502 | AREG(7) += 2; |
7503 | WRITE_BYTE_F(adr, res) |
7504 | POST_IO |
7505 | RET(18) |
7506 | } |
7507 | |
7508 | // MOVEB |
7509 | OPCODE(0x1F3B) |
7510 | { |
7511 | u32 adr, res; |
7512 | u32 src, dst; |
7513 | |
7514 | adr = (u32)(PC) - BasePC; |
7515 | DECODE_EXT_WORD |
7516 | PRE_IO |
7517 | READ_BYTE_F(adr, res) |
7518 | flag_C = 0; |
7519 | flag_V = 0; |
7520 | flag_NotZ = res; |
7521 | flag_N = res; |
7522 | adr = AREG(7) - 2; |
7523 | AREG(7) = adr; |
7524 | WRITE_BYTE_F(adr, res) |
7525 | POST_IO |
7526 | RET(18) |
7527 | } |
7528 | |
7529 | // MOVEB |
7530 | OPCODE(0x103C) |
7531 | { |
7532 | u32 adr, res; |
7533 | u32 src, dst; |
7534 | |
7535 | FETCH_BYTE(res); |
7536 | flag_C = 0; |
7537 | flag_V = 0; |
7538 | flag_NotZ = res; |
7539 | flag_N = res; |
7540 | DREGu8((Opcode >> 9) & 7) = res; |
7541 | RET(8) |
7542 | } |
7543 | |
7544 | // MOVEB |
7545 | OPCODE(0x10BC) |
7546 | { |
7547 | u32 adr, res; |
7548 | u32 src, dst; |
7549 | |
7550 | FETCH_BYTE(res); |
7551 | flag_C = 0; |
7552 | flag_V = 0; |
7553 | flag_NotZ = res; |
7554 | flag_N = res; |
7555 | adr = AREG((Opcode >> 9) & 7); |
7556 | PRE_IO |
7557 | WRITE_BYTE_F(adr, res) |
7558 | POST_IO |
7559 | RET(12) |
7560 | } |
7561 | |
7562 | // MOVEB |
7563 | OPCODE(0x10FC) |
7564 | { |
7565 | u32 adr, res; |
7566 | u32 src, dst; |
7567 | |
7568 | FETCH_BYTE(res); |
7569 | flag_C = 0; |
7570 | flag_V = 0; |
7571 | flag_NotZ = res; |
7572 | flag_N = res; |
7573 | adr = AREG((Opcode >> 9) & 7); |
7574 | AREG((Opcode >> 9) & 7) += 1; |
7575 | PRE_IO |
7576 | WRITE_BYTE_F(adr, res) |
7577 | POST_IO |
7578 | RET(12) |
7579 | } |
7580 | |
7581 | // MOVEB |
7582 | OPCODE(0x113C) |
7583 | { |
7584 | u32 adr, res; |
7585 | u32 src, dst; |
7586 | |
7587 | FETCH_BYTE(res); |
7588 | flag_C = 0; |
7589 | flag_V = 0; |
7590 | flag_NotZ = res; |
7591 | flag_N = res; |
7592 | adr = AREG((Opcode >> 9) & 7) - 1; |
7593 | AREG((Opcode >> 9) & 7) = adr; |
7594 | PRE_IO |
7595 | WRITE_BYTE_F(adr, res) |
7596 | POST_IO |
7597 | RET(12) |
7598 | } |
7599 | |
7600 | // MOVEB |
7601 | OPCODE(0x117C) |
7602 | { |
7603 | u32 adr, res; |
7604 | u32 src, dst; |
7605 | |
7606 | FETCH_BYTE(res); |
7607 | flag_C = 0; |
7608 | flag_V = 0; |
7609 | flag_NotZ = res; |
7610 | flag_N = res; |
7611 | FETCH_SWORD(adr); |
7612 | adr += AREG((Opcode >> 9) & 7); |
7613 | PRE_IO |
7614 | WRITE_BYTE_F(adr, res) |
7615 | POST_IO |
7616 | RET(16) |
7617 | } |
7618 | |
7619 | // MOVEB |
7620 | OPCODE(0x11BC) |
7621 | { |
7622 | u32 adr, res; |
7623 | u32 src, dst; |
7624 | |
7625 | FETCH_BYTE(res); |
7626 | flag_C = 0; |
7627 | flag_V = 0; |
7628 | flag_NotZ = res; |
7629 | flag_N = res; |
7630 | adr = AREG((Opcode >> 9) & 7); |
7631 | DECODE_EXT_WORD |
7632 | PRE_IO |
7633 | WRITE_BYTE_F(adr, res) |
7634 | POST_IO |
7635 | RET(18) |
7636 | } |
7637 | |
7638 | // MOVEB |
7639 | OPCODE(0x11FC) |
7640 | { |
7641 | u32 adr, res; |
7642 | u32 src, dst; |
7643 | |
7644 | FETCH_BYTE(res); |
7645 | flag_C = 0; |
7646 | flag_V = 0; |
7647 | flag_NotZ = res; |
7648 | flag_N = res; |
7649 | FETCH_SWORD(adr); |
7650 | PRE_IO |
7651 | WRITE_BYTE_F(adr, res) |
7652 | POST_IO |
7653 | RET(16) |
7654 | } |
7655 | |
7656 | // MOVEB |
7657 | OPCODE(0x13FC) |
7658 | { |
7659 | u32 adr, res; |
7660 | u32 src, dst; |
7661 | |
7662 | FETCH_BYTE(res); |
7663 | flag_C = 0; |
7664 | flag_V = 0; |
7665 | flag_NotZ = res; |
7666 | flag_N = res; |
7667 | FETCH_LONG(adr); |
7668 | PRE_IO |
7669 | WRITE_BYTE_F(adr, res) |
7670 | POST_IO |
7671 | RET(20) |
7672 | } |
7673 | |
7674 | // MOVEB |
7675 | OPCODE(0x1EFC) |
7676 | { |
7677 | u32 adr, res; |
7678 | u32 src, dst; |
7679 | |
7680 | FETCH_BYTE(res); |
7681 | flag_C = 0; |
7682 | flag_V = 0; |
7683 | flag_NotZ = res; |
7684 | flag_N = res; |
7685 | adr = AREG(7); |
7686 | AREG(7) += 2; |
7687 | PRE_IO |
7688 | WRITE_BYTE_F(adr, res) |
7689 | POST_IO |
7690 | RET(12) |
7691 | } |
7692 | |
7693 | // MOVEB |
7694 | OPCODE(0x1F3C) |
7695 | { |
7696 | u32 adr, res; |
7697 | u32 src, dst; |
7698 | |
7699 | FETCH_BYTE(res); |
7700 | flag_C = 0; |
7701 | flag_V = 0; |
7702 | flag_NotZ = res; |
7703 | flag_N = res; |
7704 | adr = AREG(7) - 2; |
7705 | AREG(7) = adr; |
7706 | PRE_IO |
7707 | WRITE_BYTE_F(adr, res) |
7708 | POST_IO |
7709 | RET(12) |
7710 | } |
7711 | |
7712 | // MOVEB |
7713 | OPCODE(0x101F) |
7714 | { |
7715 | u32 adr, res; |
7716 | u32 src, dst; |
7717 | |
7718 | adr = AREG(7); |
7719 | AREG(7) += 2; |
7720 | PRE_IO |
7721 | READ_BYTE_F(adr, res) |
7722 | flag_C = 0; |
7723 | flag_V = 0; |
7724 | flag_NotZ = res; |
7725 | flag_N = res; |
7726 | DREGu8((Opcode >> 9) & 7) = res; |
7727 | POST_IO |
7728 | RET(8) |
7729 | } |
7730 | |
7731 | // MOVEB |
7732 | OPCODE(0x109F) |
7733 | { |
7734 | u32 adr, res; |
7735 | u32 src, dst; |
7736 | |
7737 | adr = AREG(7); |
7738 | AREG(7) += 2; |
7739 | PRE_IO |
7740 | READ_BYTE_F(adr, res) |
7741 | flag_C = 0; |
7742 | flag_V = 0; |
7743 | flag_NotZ = res; |
7744 | flag_N = res; |
7745 | adr = AREG((Opcode >> 9) & 7); |
7746 | WRITE_BYTE_F(adr, res) |
7747 | POST_IO |
7748 | RET(12) |
7749 | } |
7750 | |
7751 | // MOVEB |
7752 | OPCODE(0x10DF) |
7753 | { |
7754 | u32 adr, res; |
7755 | u32 src, dst; |
7756 | |
7757 | adr = AREG(7); |
7758 | AREG(7) += 2; |
7759 | PRE_IO |
7760 | READ_BYTE_F(adr, res) |
7761 | flag_C = 0; |
7762 | flag_V = 0; |
7763 | flag_NotZ = res; |
7764 | flag_N = res; |
7765 | adr = AREG((Opcode >> 9) & 7); |
7766 | AREG((Opcode >> 9) & 7) += 1; |
7767 | WRITE_BYTE_F(adr, res) |
7768 | POST_IO |
7769 | RET(12) |
7770 | } |
7771 | |
7772 | // MOVEB |
7773 | OPCODE(0x111F) |
7774 | { |
7775 | u32 adr, res; |
7776 | u32 src, dst; |
7777 | |
7778 | adr = AREG(7); |
7779 | AREG(7) += 2; |
7780 | PRE_IO |
7781 | READ_BYTE_F(adr, res) |
7782 | flag_C = 0; |
7783 | flag_V = 0; |
7784 | flag_NotZ = res; |
7785 | flag_N = res; |
7786 | adr = AREG((Opcode >> 9) & 7) - 1; |
7787 | AREG((Opcode >> 9) & 7) = adr; |
7788 | WRITE_BYTE_F(adr, res) |
7789 | POST_IO |
7790 | RET(12) |
7791 | } |
7792 | |
7793 | // MOVEB |
7794 | OPCODE(0x115F) |
7795 | { |
7796 | u32 adr, res; |
7797 | u32 src, dst; |
7798 | |
7799 | adr = AREG(7); |
7800 | AREG(7) += 2; |
7801 | PRE_IO |
7802 | READ_BYTE_F(adr, res) |
7803 | flag_C = 0; |
7804 | flag_V = 0; |
7805 | flag_NotZ = res; |
7806 | flag_N = res; |
7807 | FETCH_SWORD(adr); |
7808 | adr += AREG((Opcode >> 9) & 7); |
7809 | WRITE_BYTE_F(adr, res) |
7810 | POST_IO |
7811 | RET(16) |
7812 | } |
7813 | |
7814 | // MOVEB |
7815 | OPCODE(0x119F) |
7816 | { |
7817 | u32 adr, res; |
7818 | u32 src, dst; |
7819 | |
7820 | adr = AREG(7); |
7821 | AREG(7) += 2; |
7822 | PRE_IO |
7823 | READ_BYTE_F(adr, res) |
7824 | flag_C = 0; |
7825 | flag_V = 0; |
7826 | flag_NotZ = res; |
7827 | flag_N = res; |
7828 | adr = AREG((Opcode >> 9) & 7); |
7829 | DECODE_EXT_WORD |
7830 | WRITE_BYTE_F(adr, res) |
7831 | POST_IO |
7832 | RET(18) |
7833 | } |
7834 | |
7835 | // MOVEB |
7836 | OPCODE(0x11DF) |
7837 | { |
7838 | u32 adr, res; |
7839 | u32 src, dst; |
7840 | |
7841 | adr = AREG(7); |
7842 | AREG(7) += 2; |
7843 | PRE_IO |
7844 | READ_BYTE_F(adr, res) |
7845 | flag_C = 0; |
7846 | flag_V = 0; |
7847 | flag_NotZ = res; |
7848 | flag_N = res; |
7849 | FETCH_SWORD(adr); |
7850 | WRITE_BYTE_F(adr, res) |
7851 | POST_IO |
7852 | RET(16) |
7853 | } |
7854 | |
7855 | // MOVEB |
7856 | OPCODE(0x13DF) |
7857 | { |
7858 | u32 adr, res; |
7859 | u32 src, dst; |
7860 | |
7861 | adr = AREG(7); |
7862 | AREG(7) += 2; |
7863 | PRE_IO |
7864 | READ_BYTE_F(adr, res) |
7865 | flag_C = 0; |
7866 | flag_V = 0; |
7867 | flag_NotZ = res; |
7868 | flag_N = res; |
7869 | FETCH_LONG(adr); |
7870 | WRITE_BYTE_F(adr, res) |
7871 | POST_IO |
7872 | RET(20) |
7873 | } |
7874 | |
7875 | // MOVEB |
7876 | OPCODE(0x1EDF) |
7877 | { |
7878 | u32 adr, res; |
7879 | u32 src, dst; |
7880 | |
7881 | adr = AREG(7); |
7882 | AREG(7) += 2; |
7883 | PRE_IO |
7884 | READ_BYTE_F(adr, res) |
7885 | flag_C = 0; |
7886 | flag_V = 0; |
7887 | flag_NotZ = res; |
7888 | flag_N = res; |
7889 | adr = AREG(7); |
7890 | AREG(7) += 2; |
7891 | WRITE_BYTE_F(adr, res) |
7892 | POST_IO |
7893 | RET(12) |
7894 | } |
7895 | |
7896 | // MOVEB |
7897 | OPCODE(0x1F1F) |
7898 | { |
7899 | u32 adr, res; |
7900 | u32 src, dst; |
7901 | |
7902 | adr = AREG(7); |
7903 | AREG(7) += 2; |
7904 | PRE_IO |
7905 | READ_BYTE_F(adr, res) |
7906 | flag_C = 0; |
7907 | flag_V = 0; |
7908 | flag_NotZ = res; |
7909 | flag_N = res; |
7910 | adr = AREG(7) - 2; |
7911 | AREG(7) = adr; |
7912 | WRITE_BYTE_F(adr, res) |
7913 | POST_IO |
7914 | RET(12) |
7915 | } |
7916 | |
7917 | // MOVEB |
7918 | OPCODE(0x1027) |
7919 | { |
7920 | u32 adr, res; |
7921 | u32 src, dst; |
7922 | |
7923 | adr = AREG(7) - 2; |
7924 | AREG(7) = adr; |
7925 | PRE_IO |
7926 | READ_BYTE_F(adr, res) |
7927 | flag_C = 0; |
7928 | flag_V = 0; |
7929 | flag_NotZ = res; |
7930 | flag_N = res; |
7931 | DREGu8((Opcode >> 9) & 7) = res; |
7932 | POST_IO |
7933 | RET(10) |
7934 | } |
7935 | |
7936 | // MOVEB |
7937 | OPCODE(0x10A7) |
7938 | { |
7939 | u32 adr, res; |
7940 | u32 src, dst; |
7941 | |
7942 | adr = AREG(7) - 2; |
7943 | AREG(7) = adr; |
7944 | PRE_IO |
7945 | READ_BYTE_F(adr, res) |
7946 | flag_C = 0; |
7947 | flag_V = 0; |
7948 | flag_NotZ = res; |
7949 | flag_N = res; |
7950 | adr = AREG((Opcode >> 9) & 7); |
7951 | WRITE_BYTE_F(adr, res) |
7952 | POST_IO |
7953 | RET(14) |
7954 | } |
7955 | |
7956 | // MOVEB |
7957 | OPCODE(0x10E7) |
7958 | { |
7959 | u32 adr, res; |
7960 | u32 src, dst; |
7961 | |
7962 | adr = AREG(7) - 2; |
7963 | AREG(7) = adr; |
7964 | PRE_IO |
7965 | READ_BYTE_F(adr, res) |
7966 | flag_C = 0; |
7967 | flag_V = 0; |
7968 | flag_NotZ = res; |
7969 | flag_N = res; |
7970 | adr = AREG((Opcode >> 9) & 7); |
7971 | AREG((Opcode >> 9) & 7) += 1; |
7972 | WRITE_BYTE_F(adr, res) |
7973 | POST_IO |
7974 | RET(14) |
7975 | } |
7976 | |
7977 | // MOVEB |
7978 | OPCODE(0x1127) |
7979 | { |
7980 | u32 adr, res; |
7981 | u32 src, dst; |
7982 | |
7983 | adr = AREG(7) - 2; |
7984 | AREG(7) = adr; |
7985 | PRE_IO |
7986 | READ_BYTE_F(adr, res) |
7987 | flag_C = 0; |
7988 | flag_V = 0; |
7989 | flag_NotZ = res; |
7990 | flag_N = res; |
7991 | adr = AREG((Opcode >> 9) & 7) - 1; |
7992 | AREG((Opcode >> 9) & 7) = adr; |
7993 | WRITE_BYTE_F(adr, res) |
7994 | POST_IO |
7995 | RET(14) |
7996 | } |
7997 | |
7998 | // MOVEB |
7999 | OPCODE(0x1167) |
8000 | { |
8001 | u32 adr, res; |
8002 | u32 src, dst; |
8003 | |
8004 | adr = AREG(7) - 2; |
8005 | AREG(7) = adr; |
8006 | PRE_IO |
8007 | READ_BYTE_F(adr, res) |
8008 | flag_C = 0; |
8009 | flag_V = 0; |
8010 | flag_NotZ = res; |
8011 | flag_N = res; |
8012 | FETCH_SWORD(adr); |
8013 | adr += AREG((Opcode >> 9) & 7); |
8014 | WRITE_BYTE_F(adr, res) |
8015 | POST_IO |
8016 | RET(18) |
8017 | } |
8018 | |
8019 | // MOVEB |
8020 | OPCODE(0x11A7) |
8021 | { |
8022 | u32 adr, res; |
8023 | u32 src, dst; |
8024 | |
8025 | adr = AREG(7) - 2; |
8026 | AREG(7) = adr; |
8027 | PRE_IO |
8028 | READ_BYTE_F(adr, res) |
8029 | flag_C = 0; |
8030 | flag_V = 0; |
8031 | flag_NotZ = res; |
8032 | flag_N = res; |
8033 | adr = AREG((Opcode >> 9) & 7); |
8034 | DECODE_EXT_WORD |
8035 | WRITE_BYTE_F(adr, res) |
8036 | POST_IO |
8037 | RET(20) |
8038 | } |
8039 | |
8040 | // MOVEB |
8041 | OPCODE(0x11E7) |
8042 | { |
8043 | u32 adr, res; |
8044 | u32 src, dst; |
8045 | |
8046 | adr = AREG(7) - 2; |
8047 | AREG(7) = adr; |
8048 | PRE_IO |
8049 | READ_BYTE_F(adr, res) |
8050 | flag_C = 0; |
8051 | flag_V = 0; |
8052 | flag_NotZ = res; |
8053 | flag_N = res; |
8054 | FETCH_SWORD(adr); |
8055 | WRITE_BYTE_F(adr, res) |
8056 | POST_IO |
8057 | RET(18) |
8058 | } |
8059 | |
8060 | // MOVEB |
8061 | OPCODE(0x13E7) |
8062 | { |
8063 | u32 adr, res; |
8064 | u32 src, dst; |
8065 | |
8066 | adr = AREG(7) - 2; |
8067 | AREG(7) = adr; |
8068 | PRE_IO |
8069 | READ_BYTE_F(adr, res) |
8070 | flag_C = 0; |
8071 | flag_V = 0; |
8072 | flag_NotZ = res; |
8073 | flag_N = res; |
8074 | FETCH_LONG(adr); |
8075 | WRITE_BYTE_F(adr, res) |
8076 | POST_IO |
8077 | RET(22) |
8078 | } |
8079 | |
8080 | // MOVEB |
8081 | OPCODE(0x1EE7) |
8082 | { |
8083 | u32 adr, res; |
8084 | u32 src, dst; |
8085 | |
8086 | adr = AREG(7) - 2; |
8087 | AREG(7) = adr; |
8088 | PRE_IO |
8089 | READ_BYTE_F(adr, res) |
8090 | flag_C = 0; |
8091 | flag_V = 0; |
8092 | flag_NotZ = res; |
8093 | flag_N = res; |
8094 | adr = AREG(7); |
8095 | AREG(7) += 2; |
8096 | WRITE_BYTE_F(adr, res) |
8097 | POST_IO |
8098 | RET(14) |
8099 | } |
8100 | |
8101 | // MOVEB |
8102 | OPCODE(0x1F27) |
8103 | { |
8104 | u32 adr, res; |
8105 | u32 src, dst; |
8106 | |
8107 | adr = AREG(7) - 2; |
8108 | AREG(7) = adr; |
8109 | PRE_IO |
8110 | READ_BYTE_F(adr, res) |
8111 | flag_C = 0; |
8112 | flag_V = 0; |
8113 | flag_NotZ = res; |
8114 | flag_N = res; |
8115 | adr = AREG(7) - 2; |
8116 | AREG(7) = adr; |
8117 | WRITE_BYTE_F(adr, res) |
8118 | POST_IO |
8119 | RET(14) |
8120 | } |
8121 | |
8122 | // MOVEL |
8123 | OPCODE(0x2000) |
8124 | { |
8125 | u32 adr, res; |
8126 | u32 src, dst; |
8127 | |
8128 | res = DREGu32((Opcode >> 0) & 7); |
8129 | flag_C = 0; |
8130 | flag_V = 0; |
8131 | flag_NotZ = res; |
8132 | flag_N = res >> 24; |
8133 | DREGu32((Opcode >> 9) & 7) = res; |
8134 | RET(4) |
8135 | } |
8136 | |
8137 | // MOVEL |
8138 | OPCODE(0x2080) |
8139 | { |
8140 | u32 adr, res; |
8141 | u32 src, dst; |
8142 | |
8143 | res = DREGu32((Opcode >> 0) & 7); |
8144 | flag_C = 0; |
8145 | flag_V = 0; |
8146 | flag_NotZ = res; |
8147 | flag_N = res >> 24; |
8148 | adr = AREG((Opcode >> 9) & 7); |
8149 | PRE_IO |
8150 | WRITE_LONG_F(adr, res) |
8151 | POST_IO |
8152 | RET(12) |
8153 | } |
8154 | |
8155 | // MOVEL |
8156 | OPCODE(0x20C0) |
8157 | { |
8158 | u32 adr, res; |
8159 | u32 src, dst; |
8160 | |
8161 | res = DREGu32((Opcode >> 0) & 7); |
8162 | flag_C = 0; |
8163 | flag_V = 0; |
8164 | flag_NotZ = res; |
8165 | flag_N = res >> 24; |
8166 | adr = AREG((Opcode >> 9) & 7); |
8167 | AREG((Opcode >> 9) & 7) += 4; |
8168 | PRE_IO |
8169 | WRITE_LONG_F(adr, res) |
8170 | POST_IO |
8171 | RET(12) |
8172 | } |
8173 | |
8174 | // MOVEL |
8175 | OPCODE(0x2100) |
8176 | { |
8177 | u32 adr, res; |
8178 | u32 src, dst; |
8179 | |
8180 | res = DREGu32((Opcode >> 0) & 7); |
8181 | flag_C = 0; |
8182 | flag_V = 0; |
8183 | flag_NotZ = res; |
8184 | flag_N = res >> 24; |
8185 | adr = AREG((Opcode >> 9) & 7) - 4; |
8186 | AREG((Opcode >> 9) & 7) = adr; |
8187 | PRE_IO |
80db4442 |
8188 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8189 | POST_IO |
8190 | RET(12) |
8191 | } |
8192 | |
8193 | // MOVEL |
8194 | OPCODE(0x2140) |
8195 | { |
8196 | u32 adr, res; |
8197 | u32 src, dst; |
8198 | |
8199 | res = DREGu32((Opcode >> 0) & 7); |
8200 | flag_C = 0; |
8201 | flag_V = 0; |
8202 | flag_NotZ = res; |
8203 | flag_N = res >> 24; |
8204 | FETCH_SWORD(adr); |
8205 | adr += AREG((Opcode >> 9) & 7); |
8206 | PRE_IO |
8207 | WRITE_LONG_F(adr, res) |
8208 | POST_IO |
8209 | RET(16) |
8210 | } |
8211 | |
8212 | // MOVEL |
8213 | OPCODE(0x2180) |
8214 | { |
8215 | u32 adr, res; |
8216 | u32 src, dst; |
8217 | |
8218 | res = DREGu32((Opcode >> 0) & 7); |
8219 | flag_C = 0; |
8220 | flag_V = 0; |
8221 | flag_NotZ = res; |
8222 | flag_N = res >> 24; |
8223 | adr = AREG((Opcode >> 9) & 7); |
8224 | DECODE_EXT_WORD |
8225 | PRE_IO |
8226 | WRITE_LONG_F(adr, res) |
8227 | POST_IO |
8228 | RET(18) |
8229 | } |
8230 | |
8231 | // MOVEL |
8232 | OPCODE(0x21C0) |
8233 | { |
8234 | u32 adr, res; |
8235 | u32 src, dst; |
8236 | |
8237 | res = DREGu32((Opcode >> 0) & 7); |
8238 | flag_C = 0; |
8239 | flag_V = 0; |
8240 | flag_NotZ = res; |
8241 | flag_N = res >> 24; |
8242 | FETCH_SWORD(adr); |
8243 | PRE_IO |
8244 | WRITE_LONG_F(adr, res) |
8245 | POST_IO |
8246 | RET(16) |
8247 | } |
8248 | |
8249 | // MOVEL |
8250 | OPCODE(0x23C0) |
8251 | { |
8252 | u32 adr, res; |
8253 | u32 src, dst; |
8254 | |
8255 | res = DREGu32((Opcode >> 0) & 7); |
8256 | flag_C = 0; |
8257 | flag_V = 0; |
8258 | flag_NotZ = res; |
8259 | flag_N = res >> 24; |
8260 | FETCH_LONG(adr); |
8261 | PRE_IO |
8262 | WRITE_LONG_F(adr, res) |
8263 | POST_IO |
8264 | RET(20) |
8265 | } |
8266 | |
8267 | // MOVEL |
8268 | OPCODE(0x2EC0) |
8269 | { |
8270 | u32 adr, res; |
8271 | u32 src, dst; |
8272 | |
8273 | res = DREGu32((Opcode >> 0) & 7); |
8274 | flag_C = 0; |
8275 | flag_V = 0; |
8276 | flag_NotZ = res; |
8277 | flag_N = res >> 24; |
8278 | adr = AREG(7); |
8279 | AREG(7) += 4; |
8280 | PRE_IO |
8281 | WRITE_LONG_F(adr, res) |
8282 | POST_IO |
8283 | RET(12) |
8284 | } |
8285 | |
8286 | // MOVEL |
8287 | OPCODE(0x2F00) |
8288 | { |
8289 | u32 adr, res; |
8290 | u32 src, dst; |
8291 | |
8292 | res = DREGu32((Opcode >> 0) & 7); |
8293 | flag_C = 0; |
8294 | flag_V = 0; |
8295 | flag_NotZ = res; |
8296 | flag_N = res >> 24; |
8297 | adr = AREG(7) - 4; |
8298 | AREG(7) = adr; |
8299 | PRE_IO |
03e4f2a3 |
8300 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8301 | POST_IO |
8302 | RET(12) |
8303 | } |
8304 | |
8305 | // MOVEL |
8306 | OPCODE(0x2008) |
8307 | { |
8308 | u32 adr, res; |
8309 | u32 src, dst; |
8310 | |
8311 | res = AREGu32((Opcode >> 0) & 7); |
8312 | flag_C = 0; |
8313 | flag_V = 0; |
8314 | flag_NotZ = res; |
8315 | flag_N = res >> 24; |
8316 | DREGu32((Opcode >> 9) & 7) = res; |
8317 | RET(4) |
8318 | } |
8319 | |
8320 | // MOVEL |
8321 | OPCODE(0x2088) |
8322 | { |
8323 | u32 adr, res; |
8324 | u32 src, dst; |
8325 | |
8326 | res = AREGu32((Opcode >> 0) & 7); |
8327 | flag_C = 0; |
8328 | flag_V = 0; |
8329 | flag_NotZ = res; |
8330 | flag_N = res >> 24; |
8331 | adr = AREG((Opcode >> 9) & 7); |
8332 | PRE_IO |
8333 | WRITE_LONG_F(adr, res) |
8334 | POST_IO |
8335 | RET(12) |
8336 | } |
8337 | |
8338 | // MOVEL |
8339 | OPCODE(0x20C8) |
8340 | { |
8341 | u32 adr, res; |
8342 | u32 src, dst; |
8343 | |
8344 | res = AREGu32((Opcode >> 0) & 7); |
8345 | flag_C = 0; |
8346 | flag_V = 0; |
8347 | flag_NotZ = res; |
8348 | flag_N = res >> 24; |
8349 | adr = AREG((Opcode >> 9) & 7); |
8350 | AREG((Opcode >> 9) & 7) += 4; |
8351 | PRE_IO |
8352 | WRITE_LONG_F(adr, res) |
8353 | POST_IO |
8354 | RET(12) |
8355 | } |
8356 | |
8357 | // MOVEL |
8358 | OPCODE(0x2108) |
8359 | { |
8360 | u32 adr, res; |
8361 | u32 src, dst; |
8362 | |
8363 | res = AREGu32((Opcode >> 0) & 7); |
8364 | flag_C = 0; |
8365 | flag_V = 0; |
8366 | flag_NotZ = res; |
8367 | flag_N = res >> 24; |
8368 | adr = AREG((Opcode >> 9) & 7) - 4; |
8369 | AREG((Opcode >> 9) & 7) = adr; |
8370 | PRE_IO |
80db4442 |
8371 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8372 | POST_IO |
8373 | RET(12) |
8374 | } |
8375 | |
8376 | // MOVEL |
8377 | OPCODE(0x2148) |
8378 | { |
8379 | u32 adr, res; |
8380 | u32 src, dst; |
8381 | |
8382 | res = AREGu32((Opcode >> 0) & 7); |
8383 | flag_C = 0; |
8384 | flag_V = 0; |
8385 | flag_NotZ = res; |
8386 | flag_N = res >> 24; |
8387 | FETCH_SWORD(adr); |
8388 | adr += AREG((Opcode >> 9) & 7); |
8389 | PRE_IO |
8390 | WRITE_LONG_F(adr, res) |
8391 | POST_IO |
8392 | RET(16) |
8393 | } |
8394 | |
8395 | // MOVEL |
8396 | OPCODE(0x2188) |
8397 | { |
8398 | u32 adr, res; |
8399 | u32 src, dst; |
8400 | |
8401 | res = AREGu32((Opcode >> 0) & 7); |
8402 | flag_C = 0; |
8403 | flag_V = 0; |
8404 | flag_NotZ = res; |
8405 | flag_N = res >> 24; |
8406 | adr = AREG((Opcode >> 9) & 7); |
8407 | DECODE_EXT_WORD |
8408 | PRE_IO |
8409 | WRITE_LONG_F(adr, res) |
8410 | POST_IO |
8411 | RET(18) |
8412 | } |
8413 | |
8414 | // MOVEL |
8415 | OPCODE(0x21C8) |
8416 | { |
8417 | u32 adr, res; |
8418 | u32 src, dst; |
8419 | |
8420 | res = AREGu32((Opcode >> 0) & 7); |
8421 | flag_C = 0; |
8422 | flag_V = 0; |
8423 | flag_NotZ = res; |
8424 | flag_N = res >> 24; |
8425 | FETCH_SWORD(adr); |
8426 | PRE_IO |
8427 | WRITE_LONG_F(adr, res) |
8428 | POST_IO |
8429 | RET(16) |
8430 | } |
8431 | |
8432 | // MOVEL |
8433 | OPCODE(0x23C8) |
8434 | { |
8435 | u32 adr, res; |
8436 | u32 src, dst; |
8437 | |
8438 | res = AREGu32((Opcode >> 0) & 7); |
8439 | flag_C = 0; |
8440 | flag_V = 0; |
8441 | flag_NotZ = res; |
8442 | flag_N = res >> 24; |
8443 | FETCH_LONG(adr); |
8444 | PRE_IO |
8445 | WRITE_LONG_F(adr, res) |
8446 | POST_IO |
8447 | RET(20) |
8448 | } |
8449 | |
8450 | // MOVEL |
8451 | OPCODE(0x2EC8) |
8452 | { |
8453 | u32 adr, res; |
8454 | u32 src, dst; |
8455 | |
8456 | res = AREGu32((Opcode >> 0) & 7); |
8457 | flag_C = 0; |
8458 | flag_V = 0; |
8459 | flag_NotZ = res; |
8460 | flag_N = res >> 24; |
8461 | adr = AREG(7); |
8462 | AREG(7) += 4; |
8463 | PRE_IO |
8464 | WRITE_LONG_F(adr, res) |
8465 | POST_IO |
8466 | RET(12) |
8467 | } |
8468 | |
8469 | // MOVEL |
8470 | OPCODE(0x2F08) |
8471 | { |
8472 | u32 adr, res; |
8473 | u32 src, dst; |
8474 | |
8475 | res = AREGu32((Opcode >> 0) & 7); |
8476 | flag_C = 0; |
8477 | flag_V = 0; |
8478 | flag_NotZ = res; |
8479 | flag_N = res >> 24; |
8480 | adr = AREG(7) - 4; |
8481 | AREG(7) = adr; |
8482 | PRE_IO |
03e4f2a3 |
8483 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8484 | POST_IO |
8485 | RET(12) |
8486 | } |
8487 | |
8488 | // MOVEL |
8489 | OPCODE(0x2010) |
8490 | { |
8491 | u32 adr, res; |
8492 | u32 src, dst; |
8493 | |
8494 | adr = AREG((Opcode >> 0) & 7); |
8495 | PRE_IO |
8496 | READ_LONG_F(adr, res) |
8497 | flag_C = 0; |
8498 | flag_V = 0; |
8499 | flag_NotZ = res; |
8500 | flag_N = res >> 24; |
8501 | DREGu32((Opcode >> 9) & 7) = res; |
8502 | POST_IO |
8503 | RET(12) |
8504 | } |
8505 | |
8506 | // MOVEL |
8507 | OPCODE(0x2090) |
8508 | { |
8509 | u32 adr, res; |
8510 | u32 src, dst; |
8511 | |
8512 | adr = AREG((Opcode >> 0) & 7); |
8513 | PRE_IO |
8514 | READ_LONG_F(adr, res) |
8515 | flag_C = 0; |
8516 | flag_V = 0; |
8517 | flag_NotZ = res; |
8518 | flag_N = res >> 24; |
8519 | adr = AREG((Opcode >> 9) & 7); |
8520 | WRITE_LONG_F(adr, res) |
8521 | POST_IO |
8522 | RET(20) |
8523 | } |
8524 | |
8525 | // MOVEL |
8526 | OPCODE(0x20D0) |
8527 | { |
8528 | u32 adr, res; |
8529 | u32 src, dst; |
8530 | |
8531 | adr = AREG((Opcode >> 0) & 7); |
8532 | PRE_IO |
8533 | READ_LONG_F(adr, res) |
8534 | flag_C = 0; |
8535 | flag_V = 0; |
8536 | flag_NotZ = res; |
8537 | flag_N = res >> 24; |
8538 | adr = AREG((Opcode >> 9) & 7); |
8539 | AREG((Opcode >> 9) & 7) += 4; |
8540 | WRITE_LONG_F(adr, res) |
8541 | POST_IO |
8542 | RET(20) |
8543 | } |
8544 | |
8545 | // MOVEL |
8546 | OPCODE(0x2110) |
8547 | { |
8548 | u32 adr, res; |
8549 | u32 src, dst; |
8550 | |
8551 | adr = AREG((Opcode >> 0) & 7); |
8552 | PRE_IO |
8553 | READ_LONG_F(adr, res) |
8554 | flag_C = 0; |
8555 | flag_V = 0; |
8556 | flag_NotZ = res; |
8557 | flag_N = res >> 24; |
8558 | adr = AREG((Opcode >> 9) & 7) - 4; |
8559 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8560 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8561 | POST_IO |
8562 | RET(20) |
8563 | } |
8564 | |
8565 | // MOVEL |
8566 | OPCODE(0x2150) |
8567 | { |
8568 | u32 adr, res; |
8569 | u32 src, dst; |
8570 | |
8571 | adr = AREG((Opcode >> 0) & 7); |
8572 | PRE_IO |
8573 | READ_LONG_F(adr, res) |
8574 | flag_C = 0; |
8575 | flag_V = 0; |
8576 | flag_NotZ = res; |
8577 | flag_N = res >> 24; |
8578 | FETCH_SWORD(adr); |
8579 | adr += AREG((Opcode >> 9) & 7); |
8580 | WRITE_LONG_F(adr, res) |
8581 | POST_IO |
8582 | RET(24) |
8583 | } |
8584 | |
8585 | // MOVEL |
8586 | OPCODE(0x2190) |
8587 | { |
8588 | u32 adr, res; |
8589 | u32 src, dst; |
8590 | |
8591 | adr = AREG((Opcode >> 0) & 7); |
8592 | PRE_IO |
8593 | READ_LONG_F(adr, res) |
8594 | flag_C = 0; |
8595 | flag_V = 0; |
8596 | flag_NotZ = res; |
8597 | flag_N = res >> 24; |
8598 | adr = AREG((Opcode >> 9) & 7); |
8599 | DECODE_EXT_WORD |
8600 | WRITE_LONG_F(adr, res) |
8601 | POST_IO |
8602 | RET(26) |
8603 | } |
8604 | |
8605 | // MOVEL |
8606 | OPCODE(0x21D0) |
8607 | { |
8608 | u32 adr, res; |
8609 | u32 src, dst; |
8610 | |
8611 | adr = AREG((Opcode >> 0) & 7); |
8612 | PRE_IO |
8613 | READ_LONG_F(adr, res) |
8614 | flag_C = 0; |
8615 | flag_V = 0; |
8616 | flag_NotZ = res; |
8617 | flag_N = res >> 24; |
8618 | FETCH_SWORD(adr); |
8619 | WRITE_LONG_F(adr, res) |
8620 | POST_IO |
8621 | RET(24) |
8622 | } |
8623 | |
8624 | // MOVEL |
8625 | OPCODE(0x23D0) |
8626 | { |
8627 | u32 adr, res; |
8628 | u32 src, dst; |
8629 | |
8630 | adr = AREG((Opcode >> 0) & 7); |
8631 | PRE_IO |
8632 | READ_LONG_F(adr, res) |
8633 | flag_C = 0; |
8634 | flag_V = 0; |
8635 | flag_NotZ = res; |
8636 | flag_N = res >> 24; |
8637 | FETCH_LONG(adr); |
8638 | WRITE_LONG_F(adr, res) |
8639 | POST_IO |
8640 | RET(28) |
8641 | } |
8642 | |
8643 | // MOVEL |
8644 | OPCODE(0x2ED0) |
8645 | { |
8646 | u32 adr, res; |
8647 | u32 src, dst; |
8648 | |
8649 | adr = AREG((Opcode >> 0) & 7); |
8650 | PRE_IO |
8651 | READ_LONG_F(adr, res) |
8652 | flag_C = 0; |
8653 | flag_V = 0; |
8654 | flag_NotZ = res; |
8655 | flag_N = res >> 24; |
8656 | adr = AREG(7); |
8657 | AREG(7) += 4; |
8658 | WRITE_LONG_F(adr, res) |
8659 | POST_IO |
8660 | RET(20) |
8661 | } |
8662 | |
8663 | // MOVEL |
8664 | OPCODE(0x2F10) |
8665 | { |
8666 | u32 adr, res; |
8667 | u32 src, dst; |
8668 | |
8669 | adr = AREG((Opcode >> 0) & 7); |
8670 | PRE_IO |
8671 | READ_LONG_F(adr, res) |
8672 | flag_C = 0; |
8673 | flag_V = 0; |
8674 | flag_NotZ = res; |
8675 | flag_N = res >> 24; |
8676 | adr = AREG(7) - 4; |
8677 | AREG(7) = adr; |
03e4f2a3 |
8678 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8679 | POST_IO |
8680 | RET(20) |
8681 | } |
8682 | |
8683 | // MOVEL |
8684 | OPCODE(0x2018) |
8685 | { |
8686 | u32 adr, res; |
8687 | u32 src, dst; |
8688 | |
8689 | adr = AREG((Opcode >> 0) & 7); |
8690 | AREG((Opcode >> 0) & 7) += 4; |
8691 | PRE_IO |
8692 | READ_LONG_F(adr, res) |
8693 | flag_C = 0; |
8694 | flag_V = 0; |
8695 | flag_NotZ = res; |
8696 | flag_N = res >> 24; |
8697 | DREGu32((Opcode >> 9) & 7) = res; |
8698 | POST_IO |
8699 | RET(12) |
8700 | } |
8701 | |
8702 | // MOVEL |
8703 | OPCODE(0x2098) |
8704 | { |
8705 | u32 adr, res; |
8706 | u32 src, dst; |
8707 | |
8708 | adr = AREG((Opcode >> 0) & 7); |
8709 | AREG((Opcode >> 0) & 7) += 4; |
8710 | PRE_IO |
8711 | READ_LONG_F(adr, res) |
8712 | flag_C = 0; |
8713 | flag_V = 0; |
8714 | flag_NotZ = res; |
8715 | flag_N = res >> 24; |
8716 | adr = AREG((Opcode >> 9) & 7); |
8717 | WRITE_LONG_F(adr, res) |
8718 | POST_IO |
8719 | RET(20) |
8720 | } |
8721 | |
8722 | // MOVEL |
8723 | OPCODE(0x20D8) |
8724 | { |
8725 | u32 adr, res; |
8726 | u32 src, dst; |
8727 | |
8728 | adr = AREG((Opcode >> 0) & 7); |
8729 | AREG((Opcode >> 0) & 7) += 4; |
8730 | PRE_IO |
8731 | READ_LONG_F(adr, res) |
8732 | flag_C = 0; |
8733 | flag_V = 0; |
8734 | flag_NotZ = res; |
8735 | flag_N = res >> 24; |
8736 | adr = AREG((Opcode >> 9) & 7); |
8737 | AREG((Opcode >> 9) & 7) += 4; |
8738 | WRITE_LONG_F(adr, res) |
8739 | POST_IO |
8740 | RET(20) |
8741 | } |
8742 | |
8743 | // MOVEL |
8744 | OPCODE(0x2118) |
8745 | { |
8746 | u32 adr, res; |
8747 | u32 src, dst; |
8748 | |
8749 | adr = AREG((Opcode >> 0) & 7); |
8750 | AREG((Opcode >> 0) & 7) += 4; |
8751 | PRE_IO |
8752 | READ_LONG_F(adr, res) |
8753 | flag_C = 0; |
8754 | flag_V = 0; |
8755 | flag_NotZ = res; |
8756 | flag_N = res >> 24; |
8757 | adr = AREG((Opcode >> 9) & 7) - 4; |
8758 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8759 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8760 | POST_IO |
8761 | RET(20) |
8762 | } |
8763 | |
8764 | // MOVEL |
8765 | OPCODE(0x2158) |
8766 | { |
8767 | u32 adr, res; |
8768 | u32 src, dst; |
8769 | |
8770 | adr = AREG((Opcode >> 0) & 7); |
8771 | AREG((Opcode >> 0) & 7) += 4; |
8772 | PRE_IO |
8773 | READ_LONG_F(adr, res) |
8774 | flag_C = 0; |
8775 | flag_V = 0; |
8776 | flag_NotZ = res; |
8777 | flag_N = res >> 24; |
8778 | FETCH_SWORD(adr); |
8779 | adr += AREG((Opcode >> 9) & 7); |
8780 | WRITE_LONG_F(adr, res) |
8781 | POST_IO |
8782 | RET(24) |
8783 | } |
8784 | |
8785 | // MOVEL |
8786 | OPCODE(0x2198) |
8787 | { |
8788 | u32 adr, res; |
8789 | u32 src, dst; |
8790 | |
8791 | adr = AREG((Opcode >> 0) & 7); |
8792 | AREG((Opcode >> 0) & 7) += 4; |
8793 | PRE_IO |
8794 | READ_LONG_F(adr, res) |
8795 | flag_C = 0; |
8796 | flag_V = 0; |
8797 | flag_NotZ = res; |
8798 | flag_N = res >> 24; |
8799 | adr = AREG((Opcode >> 9) & 7); |
8800 | DECODE_EXT_WORD |
8801 | WRITE_LONG_F(adr, res) |
8802 | POST_IO |
8803 | RET(26) |
8804 | } |
8805 | |
8806 | // MOVEL |
8807 | OPCODE(0x21D8) |
8808 | { |
8809 | u32 adr, res; |
8810 | u32 src, dst; |
8811 | |
8812 | adr = AREG((Opcode >> 0) & 7); |
8813 | AREG((Opcode >> 0) & 7) += 4; |
8814 | PRE_IO |
8815 | READ_LONG_F(adr, res) |
8816 | flag_C = 0; |
8817 | flag_V = 0; |
8818 | flag_NotZ = res; |
8819 | flag_N = res >> 24; |
8820 | FETCH_SWORD(adr); |
8821 | WRITE_LONG_F(adr, res) |
8822 | POST_IO |
8823 | RET(24) |
8824 | } |
8825 | |
8826 | // MOVEL |
8827 | OPCODE(0x23D8) |
8828 | { |
8829 | u32 adr, res; |
8830 | u32 src, dst; |
8831 | |
8832 | adr = AREG((Opcode >> 0) & 7); |
8833 | AREG((Opcode >> 0) & 7) += 4; |
8834 | PRE_IO |
8835 | READ_LONG_F(adr, res) |
8836 | flag_C = 0; |
8837 | flag_V = 0; |
8838 | flag_NotZ = res; |
8839 | flag_N = res >> 24; |
8840 | FETCH_LONG(adr); |
8841 | WRITE_LONG_F(adr, res) |
8842 | POST_IO |
8843 | RET(28) |
8844 | } |
8845 | |
8846 | // MOVEL |
8847 | OPCODE(0x2ED8) |
8848 | { |
8849 | u32 adr, res; |
8850 | u32 src, dst; |
8851 | |
8852 | adr = AREG((Opcode >> 0) & 7); |
8853 | AREG((Opcode >> 0) & 7) += 4; |
8854 | PRE_IO |
8855 | READ_LONG_F(adr, res) |
8856 | flag_C = 0; |
8857 | flag_V = 0; |
8858 | flag_NotZ = res; |
8859 | flag_N = res >> 24; |
8860 | adr = AREG(7); |
8861 | AREG(7) += 4; |
8862 | WRITE_LONG_F(adr, res) |
8863 | POST_IO |
8864 | RET(20) |
8865 | } |
8866 | |
8867 | // MOVEL |
8868 | OPCODE(0x2F18) |
8869 | { |
8870 | u32 adr, res; |
8871 | u32 src, dst; |
8872 | |
8873 | adr = AREG((Opcode >> 0) & 7); |
8874 | AREG((Opcode >> 0) & 7) += 4; |
8875 | PRE_IO |
8876 | READ_LONG_F(adr, res) |
8877 | flag_C = 0; |
8878 | flag_V = 0; |
8879 | flag_NotZ = res; |
8880 | flag_N = res >> 24; |
8881 | adr = AREG(7) - 4; |
8882 | AREG(7) = adr; |
03e4f2a3 |
8883 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8884 | POST_IO |
8885 | RET(20) |
8886 | } |
8887 | |
8888 | // MOVEL |
8889 | OPCODE(0x2020) |
8890 | { |
8891 | u32 adr, res; |
8892 | u32 src, dst; |
8893 | |
8894 | adr = AREG((Opcode >> 0) & 7) - 4; |
8895 | AREG((Opcode >> 0) & 7) = adr; |
8896 | PRE_IO |
8897 | READ_LONG_F(adr, res) |
8898 | flag_C = 0; |
8899 | flag_V = 0; |
8900 | flag_NotZ = res; |
8901 | flag_N = res >> 24; |
8902 | DREGu32((Opcode >> 9) & 7) = res; |
8903 | POST_IO |
8904 | RET(14) |
8905 | } |
8906 | |
8907 | // MOVEL |
8908 | OPCODE(0x20A0) |
8909 | { |
8910 | u32 adr, res; |
8911 | u32 src, dst; |
8912 | |
8913 | adr = AREG((Opcode >> 0) & 7) - 4; |
8914 | AREG((Opcode >> 0) & 7) = adr; |
8915 | PRE_IO |
8916 | READ_LONG_F(adr, res) |
8917 | flag_C = 0; |
8918 | flag_V = 0; |
8919 | flag_NotZ = res; |
8920 | flag_N = res >> 24; |
8921 | adr = AREG((Opcode >> 9) & 7); |
8922 | WRITE_LONG_F(adr, res) |
8923 | POST_IO |
8924 | RET(22) |
8925 | } |
8926 | |
8927 | // MOVEL |
8928 | OPCODE(0x20E0) |
8929 | { |
8930 | u32 adr, res; |
8931 | u32 src, dst; |
8932 | |
8933 | adr = AREG((Opcode >> 0) & 7) - 4; |
8934 | AREG((Opcode >> 0) & 7) = adr; |
8935 | PRE_IO |
8936 | READ_LONG_F(adr, res) |
8937 | flag_C = 0; |
8938 | flag_V = 0; |
8939 | flag_NotZ = res; |
8940 | flag_N = res >> 24; |
8941 | adr = AREG((Opcode >> 9) & 7); |
8942 | AREG((Opcode >> 9) & 7) += 4; |
8943 | WRITE_LONG_F(adr, res) |
8944 | POST_IO |
8945 | RET(22) |
8946 | } |
8947 | |
8948 | // MOVEL |
8949 | OPCODE(0x2120) |
8950 | { |
8951 | u32 adr, res; |
8952 | u32 src, dst; |
8953 | |
8954 | adr = AREG((Opcode >> 0) & 7) - 4; |
8955 | AREG((Opcode >> 0) & 7) = adr; |
8956 | PRE_IO |
8957 | READ_LONG_F(adr, res) |
8958 | flag_C = 0; |
8959 | flag_V = 0; |
8960 | flag_NotZ = res; |
8961 | flag_N = res >> 24; |
8962 | adr = AREG((Opcode >> 9) & 7) - 4; |
8963 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8964 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8965 | POST_IO |
8966 | RET(22) |
8967 | } |
8968 | |
8969 | // MOVEL |
8970 | OPCODE(0x2160) |
8971 | { |
8972 | u32 adr, res; |
8973 | u32 src, dst; |
8974 | |
8975 | adr = AREG((Opcode >> 0) & 7) - 4; |
8976 | AREG((Opcode >> 0) & 7) = adr; |
8977 | PRE_IO |
8978 | READ_LONG_F(adr, res) |
8979 | flag_C = 0; |
8980 | flag_V = 0; |
8981 | flag_NotZ = res; |
8982 | flag_N = res >> 24; |
8983 | FETCH_SWORD(adr); |
8984 | adr += AREG((Opcode >> 9) & 7); |
8985 | WRITE_LONG_F(adr, res) |
8986 | POST_IO |
8987 | RET(26) |
8988 | } |
8989 | |
8990 | // MOVEL |
8991 | OPCODE(0x21A0) |
8992 | { |
8993 | u32 adr, res; |
8994 | u32 src, dst; |
8995 | |
8996 | adr = AREG((Opcode >> 0) & 7) - 4; |
8997 | AREG((Opcode >> 0) & 7) = adr; |
8998 | PRE_IO |
8999 | READ_LONG_F(adr, res) |
9000 | flag_C = 0; |
9001 | flag_V = 0; |
9002 | flag_NotZ = res; |
9003 | flag_N = res >> 24; |
9004 | adr = AREG((Opcode >> 9) & 7); |
9005 | DECODE_EXT_WORD |
9006 | WRITE_LONG_F(adr, res) |
9007 | POST_IO |
9008 | RET(28) |
9009 | } |
9010 | |
9011 | // MOVEL |
9012 | OPCODE(0x21E0) |
9013 | { |
9014 | u32 adr, res; |
9015 | u32 src, dst; |
9016 | |
9017 | adr = AREG((Opcode >> 0) & 7) - 4; |
9018 | AREG((Opcode >> 0) & 7) = adr; |
9019 | PRE_IO |
9020 | READ_LONG_F(adr, res) |
9021 | flag_C = 0; |
9022 | flag_V = 0; |
9023 | flag_NotZ = res; |
9024 | flag_N = res >> 24; |
9025 | FETCH_SWORD(adr); |
9026 | WRITE_LONG_F(adr, res) |
9027 | POST_IO |
9028 | RET(26) |
9029 | } |
9030 | |
9031 | // MOVEL |
9032 | OPCODE(0x23E0) |
9033 | { |
9034 | u32 adr, res; |
9035 | u32 src, dst; |
9036 | |
9037 | adr = AREG((Opcode >> 0) & 7) - 4; |
9038 | AREG((Opcode >> 0) & 7) = adr; |
9039 | PRE_IO |
9040 | READ_LONG_F(adr, res) |
9041 | flag_C = 0; |
9042 | flag_V = 0; |
9043 | flag_NotZ = res; |
9044 | flag_N = res >> 24; |
9045 | FETCH_LONG(adr); |
9046 | WRITE_LONG_F(adr, res) |
9047 | POST_IO |
9048 | RET(30) |
9049 | } |
9050 | |
9051 | // MOVEL |
9052 | OPCODE(0x2EE0) |
9053 | { |
9054 | u32 adr, res; |
9055 | u32 src, dst; |
9056 | |
9057 | adr = AREG((Opcode >> 0) & 7) - 4; |
9058 | AREG((Opcode >> 0) & 7) = adr; |
9059 | PRE_IO |
9060 | READ_LONG_F(adr, res) |
9061 | flag_C = 0; |
9062 | flag_V = 0; |
9063 | flag_NotZ = res; |
9064 | flag_N = res >> 24; |
9065 | adr = AREG(7); |
9066 | AREG(7) += 4; |
9067 | WRITE_LONG_F(adr, res) |
9068 | POST_IO |
9069 | RET(22) |
9070 | } |
9071 | |
9072 | // MOVEL |
9073 | OPCODE(0x2F20) |
9074 | { |
9075 | u32 adr, res; |
9076 | u32 src, dst; |
9077 | |
9078 | adr = AREG((Opcode >> 0) & 7) - 4; |
9079 | AREG((Opcode >> 0) & 7) = adr; |
9080 | PRE_IO |
9081 | READ_LONG_F(adr, res) |
9082 | flag_C = 0; |
9083 | flag_V = 0; |
9084 | flag_NotZ = res; |
9085 | flag_N = res >> 24; |
9086 | adr = AREG(7) - 4; |
9087 | AREG(7) = adr; |
03e4f2a3 |
9088 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9089 | POST_IO |
9090 | RET(22) |
9091 | } |
9092 | |
9093 | // MOVEL |
9094 | OPCODE(0x2028) |
9095 | { |
9096 | u32 adr, res; |
9097 | u32 src, dst; |
9098 | |
9099 | FETCH_SWORD(adr); |
9100 | adr += AREG((Opcode >> 0) & 7); |
9101 | PRE_IO |
9102 | READ_LONG_F(adr, res) |
9103 | flag_C = 0; |
9104 | flag_V = 0; |
9105 | flag_NotZ = res; |
9106 | flag_N = res >> 24; |
9107 | DREGu32((Opcode >> 9) & 7) = res; |
9108 | POST_IO |
9109 | RET(16) |
9110 | } |
9111 | |
9112 | // MOVEL |
9113 | OPCODE(0x20A8) |
9114 | { |
9115 | u32 adr, res; |
9116 | u32 src, dst; |
9117 | |
9118 | FETCH_SWORD(adr); |
9119 | adr += AREG((Opcode >> 0) & 7); |
9120 | PRE_IO |
9121 | READ_LONG_F(adr, res) |
9122 | flag_C = 0; |
9123 | flag_V = 0; |
9124 | flag_NotZ = res; |
9125 | flag_N = res >> 24; |
9126 | adr = AREG((Opcode >> 9) & 7); |
9127 | WRITE_LONG_F(adr, res) |
9128 | POST_IO |
9129 | RET(24) |
9130 | } |
9131 | |
9132 | // MOVEL |
9133 | OPCODE(0x20E8) |
9134 | { |
9135 | u32 adr, res; |
9136 | u32 src, dst; |
9137 | |
9138 | FETCH_SWORD(adr); |
9139 | adr += AREG((Opcode >> 0) & 7); |
9140 | PRE_IO |
9141 | READ_LONG_F(adr, res) |
9142 | flag_C = 0; |
9143 | flag_V = 0; |
9144 | flag_NotZ = res; |
9145 | flag_N = res >> 24; |
9146 | adr = AREG((Opcode >> 9) & 7); |
9147 | AREG((Opcode >> 9) & 7) += 4; |
9148 | WRITE_LONG_F(adr, res) |
9149 | POST_IO |
9150 | RET(24) |
9151 | } |
9152 | |
9153 | // MOVEL |
9154 | OPCODE(0x2128) |
9155 | { |
9156 | u32 adr, res; |
9157 | u32 src, dst; |
9158 | |
9159 | FETCH_SWORD(adr); |
9160 | adr += AREG((Opcode >> 0) & 7); |
9161 | PRE_IO |
9162 | READ_LONG_F(adr, res) |
9163 | flag_C = 0; |
9164 | flag_V = 0; |
9165 | flag_NotZ = res; |
9166 | flag_N = res >> 24; |
9167 | adr = AREG((Opcode >> 9) & 7) - 4; |
9168 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9169 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9170 | POST_IO |
9171 | RET(24) |
9172 | } |
9173 | |
9174 | // MOVEL |
9175 | OPCODE(0x2168) |
9176 | { |
9177 | u32 adr, res; |
9178 | u32 src, dst; |
9179 | |
9180 | FETCH_SWORD(adr); |
9181 | adr += AREG((Opcode >> 0) & 7); |
9182 | PRE_IO |
9183 | READ_LONG_F(adr, res) |
9184 | flag_C = 0; |
9185 | flag_V = 0; |
9186 | flag_NotZ = res; |
9187 | flag_N = res >> 24; |
9188 | FETCH_SWORD(adr); |
9189 | adr += AREG((Opcode >> 9) & 7); |
9190 | WRITE_LONG_F(adr, res) |
9191 | POST_IO |
9192 | RET(28) |
9193 | } |
9194 | |
9195 | // MOVEL |
9196 | OPCODE(0x21A8) |
9197 | { |
9198 | u32 adr, res; |
9199 | u32 src, dst; |
9200 | |
9201 | FETCH_SWORD(adr); |
9202 | adr += AREG((Opcode >> 0) & 7); |
9203 | PRE_IO |
9204 | READ_LONG_F(adr, res) |
9205 | flag_C = 0; |
9206 | flag_V = 0; |
9207 | flag_NotZ = res; |
9208 | flag_N = res >> 24; |
9209 | adr = AREG((Opcode >> 9) & 7); |
9210 | DECODE_EXT_WORD |
9211 | WRITE_LONG_F(adr, res) |
9212 | POST_IO |
9213 | RET(30) |
9214 | } |
9215 | |
9216 | // MOVEL |
9217 | OPCODE(0x21E8) |
9218 | { |
9219 | u32 adr, res; |
9220 | u32 src, dst; |
9221 | |
9222 | FETCH_SWORD(adr); |
9223 | adr += AREG((Opcode >> 0) & 7); |
9224 | PRE_IO |
9225 | READ_LONG_F(adr, res) |
9226 | flag_C = 0; |
9227 | flag_V = 0; |
9228 | flag_NotZ = res; |
9229 | flag_N = res >> 24; |
9230 | FETCH_SWORD(adr); |
9231 | WRITE_LONG_F(adr, res) |
9232 | POST_IO |
9233 | RET(28) |
9234 | } |
9235 | |
9236 | // MOVEL |
9237 | OPCODE(0x23E8) |
9238 | { |
9239 | u32 adr, res; |
9240 | u32 src, dst; |
9241 | |
9242 | FETCH_SWORD(adr); |
9243 | adr += AREG((Opcode >> 0) & 7); |
9244 | PRE_IO |
9245 | READ_LONG_F(adr, res) |
9246 | flag_C = 0; |
9247 | flag_V = 0; |
9248 | flag_NotZ = res; |
9249 | flag_N = res >> 24; |
9250 | FETCH_LONG(adr); |
9251 | WRITE_LONG_F(adr, res) |
9252 | POST_IO |
9253 | RET(32) |
9254 | } |
9255 | |
9256 | // MOVEL |
9257 | OPCODE(0x2EE8) |
9258 | { |
9259 | u32 adr, res; |
9260 | u32 src, dst; |
9261 | |
9262 | FETCH_SWORD(adr); |
9263 | adr += AREG((Opcode >> 0) & 7); |
9264 | PRE_IO |
9265 | READ_LONG_F(adr, res) |
9266 | flag_C = 0; |
9267 | flag_V = 0; |
9268 | flag_NotZ = res; |
9269 | flag_N = res >> 24; |
9270 | adr = AREG(7); |
9271 | AREG(7) += 4; |
9272 | WRITE_LONG_F(adr, res) |
9273 | POST_IO |
9274 | RET(24) |
9275 | } |
9276 | |
9277 | // MOVEL |
9278 | OPCODE(0x2F28) |
9279 | { |
9280 | u32 adr, res; |
9281 | u32 src, dst; |
9282 | |
9283 | FETCH_SWORD(adr); |
9284 | adr += AREG((Opcode >> 0) & 7); |
9285 | PRE_IO |
9286 | READ_LONG_F(adr, res) |
9287 | flag_C = 0; |
9288 | flag_V = 0; |
9289 | flag_NotZ = res; |
9290 | flag_N = res >> 24; |
9291 | adr = AREG(7) - 4; |
9292 | AREG(7) = adr; |
03e4f2a3 |
9293 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9294 | POST_IO |
9295 | RET(24) |
9296 | } |
9297 | |
9298 | // MOVEL |
9299 | OPCODE(0x2030) |
9300 | { |
9301 | u32 adr, res; |
9302 | u32 src, dst; |
9303 | |
9304 | adr = AREG((Opcode >> 0) & 7); |
9305 | DECODE_EXT_WORD |
9306 | PRE_IO |
9307 | READ_LONG_F(adr, res) |
9308 | flag_C = 0; |
9309 | flag_V = 0; |
9310 | flag_NotZ = res; |
9311 | flag_N = res >> 24; |
9312 | DREGu32((Opcode >> 9) & 7) = res; |
9313 | POST_IO |
9314 | RET(18) |
9315 | } |
9316 | |
9317 | // MOVEL |
9318 | OPCODE(0x20B0) |
9319 | { |
9320 | u32 adr, res; |
9321 | u32 src, dst; |
9322 | |
9323 | adr = AREG((Opcode >> 0) & 7); |
9324 | DECODE_EXT_WORD |
9325 | PRE_IO |
9326 | READ_LONG_F(adr, res) |
9327 | flag_C = 0; |
9328 | flag_V = 0; |
9329 | flag_NotZ = res; |
9330 | flag_N = res >> 24; |
9331 | adr = AREG((Opcode >> 9) & 7); |
9332 | WRITE_LONG_F(adr, res) |
9333 | POST_IO |
9334 | RET(26) |
9335 | } |
9336 | |
9337 | // MOVEL |
9338 | OPCODE(0x20F0) |
9339 | { |
9340 | u32 adr, res; |
9341 | u32 src, dst; |
9342 | |
9343 | adr = AREG((Opcode >> 0) & 7); |
9344 | DECODE_EXT_WORD |
9345 | PRE_IO |
9346 | READ_LONG_F(adr, res) |
9347 | flag_C = 0; |
9348 | flag_V = 0; |
9349 | flag_NotZ = res; |
9350 | flag_N = res >> 24; |
9351 | adr = AREG((Opcode >> 9) & 7); |
9352 | AREG((Opcode >> 9) & 7) += 4; |
9353 | WRITE_LONG_F(adr, res) |
9354 | POST_IO |
9355 | RET(26) |
9356 | } |
9357 | |
9358 | // MOVEL |
9359 | OPCODE(0x2130) |
9360 | { |
9361 | u32 adr, res; |
9362 | u32 src, dst; |
9363 | |
9364 | adr = AREG((Opcode >> 0) & 7); |
9365 | DECODE_EXT_WORD |
9366 | PRE_IO |
9367 | READ_LONG_F(adr, res) |
9368 | flag_C = 0; |
9369 | flag_V = 0; |
9370 | flag_NotZ = res; |
9371 | flag_N = res >> 24; |
9372 | adr = AREG((Opcode >> 9) & 7) - 4; |
9373 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9374 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9375 | POST_IO |
9376 | RET(26) |
9377 | } |
9378 | |
9379 | // MOVEL |
9380 | OPCODE(0x2170) |
9381 | { |
9382 | u32 adr, res; |
9383 | u32 src, dst; |
9384 | |
9385 | adr = AREG((Opcode >> 0) & 7); |
9386 | DECODE_EXT_WORD |
9387 | PRE_IO |
9388 | READ_LONG_F(adr, res) |
9389 | flag_C = 0; |
9390 | flag_V = 0; |
9391 | flag_NotZ = res; |
9392 | flag_N = res >> 24; |
9393 | FETCH_SWORD(adr); |
9394 | adr += AREG((Opcode >> 9) & 7); |
9395 | WRITE_LONG_F(adr, res) |
9396 | POST_IO |
9397 | RET(30) |
9398 | } |
9399 | |
9400 | // MOVEL |
9401 | OPCODE(0x21B0) |
9402 | { |
9403 | u32 adr, res; |
9404 | u32 src, dst; |
9405 | |
9406 | adr = AREG((Opcode >> 0) & 7); |
9407 | DECODE_EXT_WORD |
9408 | PRE_IO |
9409 | READ_LONG_F(adr, res) |
9410 | flag_C = 0; |
9411 | flag_V = 0; |
9412 | flag_NotZ = res; |
9413 | flag_N = res >> 24; |
9414 | adr = AREG((Opcode >> 9) & 7); |
9415 | DECODE_EXT_WORD |
9416 | WRITE_LONG_F(adr, res) |
9417 | POST_IO |
9418 | RET(32) |
9419 | } |
9420 | |
9421 | // MOVEL |
9422 | OPCODE(0x21F0) |
9423 | { |
9424 | u32 adr, res; |
9425 | u32 src, dst; |
9426 | |
9427 | adr = AREG((Opcode >> 0) & 7); |
9428 | DECODE_EXT_WORD |
9429 | PRE_IO |
9430 | READ_LONG_F(adr, res) |
9431 | flag_C = 0; |
9432 | flag_V = 0; |
9433 | flag_NotZ = res; |
9434 | flag_N = res >> 24; |
9435 | FETCH_SWORD(adr); |
9436 | WRITE_LONG_F(adr, res) |
9437 | POST_IO |
9438 | RET(30) |
9439 | } |
9440 | |
9441 | // MOVEL |
9442 | OPCODE(0x23F0) |
9443 | { |
9444 | u32 adr, res; |
9445 | u32 src, dst; |
9446 | |
9447 | adr = AREG((Opcode >> 0) & 7); |
9448 | DECODE_EXT_WORD |
9449 | PRE_IO |
9450 | READ_LONG_F(adr, res) |
9451 | flag_C = 0; |
9452 | flag_V = 0; |
9453 | flag_NotZ = res; |
9454 | flag_N = res >> 24; |
9455 | FETCH_LONG(adr); |
9456 | WRITE_LONG_F(adr, res) |
9457 | POST_IO |
9458 | RET(34) |
9459 | } |
9460 | |
9461 | // MOVEL |
9462 | OPCODE(0x2EF0) |
9463 | { |
9464 | u32 adr, res; |
9465 | u32 src, dst; |
9466 | |
9467 | adr = AREG((Opcode >> 0) & 7); |
9468 | DECODE_EXT_WORD |
9469 | PRE_IO |
9470 | READ_LONG_F(adr, res) |
9471 | flag_C = 0; |
9472 | flag_V = 0; |
9473 | flag_NotZ = res; |
9474 | flag_N = res >> 24; |
9475 | adr = AREG(7); |
9476 | AREG(7) += 4; |
9477 | WRITE_LONG_F(adr, res) |
9478 | POST_IO |
9479 | RET(26) |
9480 | } |
9481 | |
9482 | // MOVEL |
9483 | OPCODE(0x2F30) |
9484 | { |
9485 | u32 adr, res; |
9486 | u32 src, dst; |
9487 | |
9488 | adr = AREG((Opcode >> 0) & 7); |
9489 | DECODE_EXT_WORD |
9490 | PRE_IO |
9491 | READ_LONG_F(adr, res) |
9492 | flag_C = 0; |
9493 | flag_V = 0; |
9494 | flag_NotZ = res; |
9495 | flag_N = res >> 24; |
9496 | adr = AREG(7) - 4; |
9497 | AREG(7) = adr; |
03e4f2a3 |
9498 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9499 | POST_IO |
9500 | RET(26) |
9501 | } |
9502 | |
9503 | // MOVEL |
9504 | OPCODE(0x2038) |
9505 | { |
9506 | u32 adr, res; |
9507 | u32 src, dst; |
9508 | |
9509 | FETCH_SWORD(adr); |
9510 | PRE_IO |
9511 | READ_LONG_F(adr, res) |
9512 | flag_C = 0; |
9513 | flag_V = 0; |
9514 | flag_NotZ = res; |
9515 | flag_N = res >> 24; |
9516 | DREGu32((Opcode >> 9) & 7) = res; |
9517 | POST_IO |
9518 | RET(16) |
9519 | } |
9520 | |
9521 | // MOVEL |
9522 | OPCODE(0x20B8) |
9523 | { |
9524 | u32 adr, res; |
9525 | u32 src, dst; |
9526 | |
9527 | FETCH_SWORD(adr); |
9528 | PRE_IO |
9529 | READ_LONG_F(adr, res) |
9530 | flag_C = 0; |
9531 | flag_V = 0; |
9532 | flag_NotZ = res; |
9533 | flag_N = res >> 24; |
9534 | adr = AREG((Opcode >> 9) & 7); |
9535 | WRITE_LONG_F(adr, res) |
9536 | POST_IO |
9537 | RET(24) |
9538 | } |
9539 | |
9540 | // MOVEL |
9541 | OPCODE(0x20F8) |
9542 | { |
9543 | u32 adr, res; |
9544 | u32 src, dst; |
9545 | |
9546 | FETCH_SWORD(adr); |
9547 | PRE_IO |
9548 | READ_LONG_F(adr, res) |
9549 | flag_C = 0; |
9550 | flag_V = 0; |
9551 | flag_NotZ = res; |
9552 | flag_N = res >> 24; |
9553 | adr = AREG((Opcode >> 9) & 7); |
9554 | AREG((Opcode >> 9) & 7) += 4; |
9555 | WRITE_LONG_F(adr, res) |
9556 | POST_IO |
9557 | RET(24) |
9558 | } |
9559 | |
9560 | // MOVEL |
9561 | OPCODE(0x2138) |
9562 | { |
9563 | u32 adr, res; |
9564 | u32 src, dst; |
9565 | |
9566 | FETCH_SWORD(adr); |
9567 | PRE_IO |
9568 | READ_LONG_F(adr, res) |
9569 | flag_C = 0; |
9570 | flag_V = 0; |
9571 | flag_NotZ = res; |
9572 | flag_N = res >> 24; |
9573 | adr = AREG((Opcode >> 9) & 7) - 4; |
9574 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9575 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9576 | POST_IO |
9577 | RET(24) |
9578 | } |
9579 | |
9580 | // MOVEL |
9581 | OPCODE(0x2178) |
9582 | { |
9583 | u32 adr, res; |
9584 | u32 src, dst; |
9585 | |
9586 | FETCH_SWORD(adr); |
9587 | PRE_IO |
9588 | READ_LONG_F(adr, res) |
9589 | flag_C = 0; |
9590 | flag_V = 0; |
9591 | flag_NotZ = res; |
9592 | flag_N = res >> 24; |
9593 | FETCH_SWORD(adr); |
9594 | adr += AREG((Opcode >> 9) & 7); |
9595 | WRITE_LONG_F(adr, res) |
9596 | POST_IO |
9597 | RET(28) |
9598 | } |
9599 | |
9600 | // MOVEL |
9601 | OPCODE(0x21B8) |
9602 | { |
9603 | u32 adr, res; |
9604 | u32 src, dst; |
9605 | |
9606 | FETCH_SWORD(adr); |
9607 | PRE_IO |
9608 | READ_LONG_F(adr, res) |
9609 | flag_C = 0; |
9610 | flag_V = 0; |
9611 | flag_NotZ = res; |
9612 | flag_N = res >> 24; |
9613 | adr = AREG((Opcode >> 9) & 7); |
9614 | DECODE_EXT_WORD |
9615 | WRITE_LONG_F(adr, res) |
9616 | POST_IO |
9617 | RET(30) |
9618 | } |
9619 | |
9620 | // MOVEL |
9621 | OPCODE(0x21F8) |
9622 | { |
9623 | u32 adr, res; |
9624 | u32 src, dst; |
9625 | |
9626 | FETCH_SWORD(adr); |
9627 | PRE_IO |
9628 | READ_LONG_F(adr, res) |
9629 | flag_C = 0; |
9630 | flag_V = 0; |
9631 | flag_NotZ = res; |
9632 | flag_N = res >> 24; |
9633 | FETCH_SWORD(adr); |
9634 | WRITE_LONG_F(adr, res) |
9635 | POST_IO |
9636 | RET(28) |
9637 | } |
9638 | |
9639 | // MOVEL |
9640 | OPCODE(0x23F8) |
9641 | { |
9642 | u32 adr, res; |
9643 | u32 src, dst; |
9644 | |
9645 | FETCH_SWORD(adr); |
9646 | PRE_IO |
9647 | READ_LONG_F(adr, res) |
9648 | flag_C = 0; |
9649 | flag_V = 0; |
9650 | flag_NotZ = res; |
9651 | flag_N = res >> 24; |
9652 | FETCH_LONG(adr); |
9653 | WRITE_LONG_F(adr, res) |
9654 | POST_IO |
9655 | RET(32) |
9656 | } |
9657 | |
9658 | // MOVEL |
9659 | OPCODE(0x2EF8) |
9660 | { |
9661 | u32 adr, res; |
9662 | u32 src, dst; |
9663 | |
9664 | FETCH_SWORD(adr); |
9665 | PRE_IO |
9666 | READ_LONG_F(adr, res) |
9667 | flag_C = 0; |
9668 | flag_V = 0; |
9669 | flag_NotZ = res; |
9670 | flag_N = res >> 24; |
9671 | adr = AREG(7); |
9672 | AREG(7) += 4; |
9673 | WRITE_LONG_F(adr, res) |
9674 | POST_IO |
9675 | RET(24) |
9676 | } |
9677 | |
9678 | // MOVEL |
9679 | OPCODE(0x2F38) |
9680 | { |
9681 | u32 adr, res; |
9682 | u32 src, dst; |
9683 | |
9684 | FETCH_SWORD(adr); |
9685 | PRE_IO |
9686 | READ_LONG_F(adr, res) |
9687 | flag_C = 0; |
9688 | flag_V = 0; |
9689 | flag_NotZ = res; |
9690 | flag_N = res >> 24; |
9691 | adr = AREG(7) - 4; |
9692 | AREG(7) = adr; |
03e4f2a3 |
9693 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9694 | POST_IO |
9695 | RET(24) |
9696 | } |
9697 | |
9698 | // MOVEL |
9699 | OPCODE(0x2039) |
9700 | { |
9701 | u32 adr, res; |
9702 | u32 src, dst; |
9703 | |
9704 | FETCH_LONG(adr); |
9705 | PRE_IO |
9706 | READ_LONG_F(adr, res) |
9707 | flag_C = 0; |
9708 | flag_V = 0; |
9709 | flag_NotZ = res; |
9710 | flag_N = res >> 24; |
9711 | DREGu32((Opcode >> 9) & 7) = res; |
9712 | POST_IO |
9713 | RET(20) |
9714 | } |
9715 | |
9716 | // MOVEL |
9717 | OPCODE(0x20B9) |
9718 | { |
9719 | u32 adr, res; |
9720 | u32 src, dst; |
9721 | |
9722 | FETCH_LONG(adr); |
9723 | PRE_IO |
9724 | READ_LONG_F(adr, res) |
9725 | flag_C = 0; |
9726 | flag_V = 0; |
9727 | flag_NotZ = res; |
9728 | flag_N = res >> 24; |
9729 | adr = AREG((Opcode >> 9) & 7); |
9730 | WRITE_LONG_F(adr, res) |
9731 | POST_IO |
9732 | RET(28) |
9733 | } |
9734 | |
9735 | // MOVEL |
9736 | OPCODE(0x20F9) |
9737 | { |
9738 | u32 adr, res; |
9739 | u32 src, dst; |
9740 | |
9741 | FETCH_LONG(adr); |
9742 | PRE_IO |
9743 | READ_LONG_F(adr, res) |
9744 | flag_C = 0; |
9745 | flag_V = 0; |
9746 | flag_NotZ = res; |
9747 | flag_N = res >> 24; |
9748 | adr = AREG((Opcode >> 9) & 7); |
9749 | AREG((Opcode >> 9) & 7) += 4; |
9750 | WRITE_LONG_F(adr, res) |
9751 | POST_IO |
9752 | RET(28) |
9753 | } |
9754 | |
9755 | // MOVEL |
9756 | OPCODE(0x2139) |
9757 | { |
9758 | u32 adr, res; |
9759 | u32 src, dst; |
9760 | |
9761 | FETCH_LONG(adr); |
9762 | PRE_IO |
9763 | READ_LONG_F(adr, res) |
9764 | flag_C = 0; |
9765 | flag_V = 0; |
9766 | flag_NotZ = res; |
9767 | flag_N = res >> 24; |
9768 | adr = AREG((Opcode >> 9) & 7) - 4; |
9769 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9770 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9771 | POST_IO |
9772 | RET(28) |
9773 | } |
9774 | |
9775 | // MOVEL |
9776 | OPCODE(0x2179) |
9777 | { |
9778 | u32 adr, res; |
9779 | u32 src, dst; |
9780 | |
9781 | FETCH_LONG(adr); |
9782 | PRE_IO |
9783 | READ_LONG_F(adr, res) |
9784 | flag_C = 0; |
9785 | flag_V = 0; |
9786 | flag_NotZ = res; |
9787 | flag_N = res >> 24; |
9788 | FETCH_SWORD(adr); |
9789 | adr += AREG((Opcode >> 9) & 7); |
9790 | WRITE_LONG_F(adr, res) |
9791 | POST_IO |
9792 | RET(32) |
9793 | } |
9794 | |
9795 | // MOVEL |
9796 | OPCODE(0x21B9) |
9797 | { |
9798 | u32 adr, res; |
9799 | u32 src, dst; |
9800 | |
9801 | FETCH_LONG(adr); |
9802 | PRE_IO |
9803 | READ_LONG_F(adr, res) |
9804 | flag_C = 0; |
9805 | flag_V = 0; |
9806 | flag_NotZ = res; |
9807 | flag_N = res >> 24; |
9808 | adr = AREG((Opcode >> 9) & 7); |
9809 | DECODE_EXT_WORD |
9810 | WRITE_LONG_F(adr, res) |
9811 | POST_IO |
9812 | RET(34) |
9813 | } |
9814 | |
9815 | // MOVEL |
9816 | OPCODE(0x21F9) |
9817 | { |
9818 | u32 adr, res; |
9819 | u32 src, dst; |
9820 | |
9821 | FETCH_LONG(adr); |
9822 | PRE_IO |
9823 | READ_LONG_F(adr, res) |
9824 | flag_C = 0; |
9825 | flag_V = 0; |
9826 | flag_NotZ = res; |
9827 | flag_N = res >> 24; |
9828 | FETCH_SWORD(adr); |
9829 | WRITE_LONG_F(adr, res) |
9830 | POST_IO |
9831 | RET(32) |
9832 | } |
9833 | |
9834 | // MOVEL |
9835 | OPCODE(0x23F9) |
9836 | { |
9837 | u32 adr, res; |
9838 | u32 src, dst; |
9839 | |
9840 | FETCH_LONG(adr); |
9841 | PRE_IO |
9842 | READ_LONG_F(adr, res) |
9843 | flag_C = 0; |
9844 | flag_V = 0; |
9845 | flag_NotZ = res; |
9846 | flag_N = res >> 24; |
9847 | FETCH_LONG(adr); |
9848 | WRITE_LONG_F(adr, res) |
9849 | POST_IO |
9850 | RET(36) |
9851 | } |
9852 | |
9853 | // MOVEL |
9854 | OPCODE(0x2EF9) |
9855 | { |
9856 | u32 adr, res; |
9857 | u32 src, dst; |
9858 | |
9859 | FETCH_LONG(adr); |
9860 | PRE_IO |
9861 | READ_LONG_F(adr, res) |
9862 | flag_C = 0; |
9863 | flag_V = 0; |
9864 | flag_NotZ = res; |
9865 | flag_N = res >> 24; |
9866 | adr = AREG(7); |
9867 | AREG(7) += 4; |
9868 | WRITE_LONG_F(adr, res) |
9869 | POST_IO |
9870 | RET(28) |
9871 | } |
9872 | |
9873 | // MOVEL |
9874 | OPCODE(0x2F39) |
9875 | { |
9876 | u32 adr, res; |
9877 | u32 src, dst; |
9878 | |
9879 | FETCH_LONG(adr); |
9880 | PRE_IO |
9881 | READ_LONG_F(adr, res) |
9882 | flag_C = 0; |
9883 | flag_V = 0; |
9884 | flag_NotZ = res; |
9885 | flag_N = res >> 24; |
9886 | adr = AREG(7) - 4; |
9887 | AREG(7) = adr; |
03e4f2a3 |
9888 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9889 | POST_IO |
9890 | RET(28) |
9891 | } |
9892 | |
9893 | // MOVEL |
9894 | OPCODE(0x203A) |
9895 | { |
9896 | u32 adr, res; |
9897 | u32 src, dst; |
9898 | |
9899 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9900 | PC++; |
9901 | PRE_IO |
9902 | READ_LONG_F(adr, res) |
9903 | flag_C = 0; |
9904 | flag_V = 0; |
9905 | flag_NotZ = res; |
9906 | flag_N = res >> 24; |
9907 | DREGu32((Opcode >> 9) & 7) = res; |
9908 | POST_IO |
9909 | RET(16) |
9910 | } |
9911 | |
9912 | // MOVEL |
9913 | OPCODE(0x20BA) |
9914 | { |
9915 | u32 adr, res; |
9916 | u32 src, dst; |
9917 | |
9918 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9919 | PC++; |
9920 | PRE_IO |
9921 | READ_LONG_F(adr, res) |
9922 | flag_C = 0; |
9923 | flag_V = 0; |
9924 | flag_NotZ = res; |
9925 | flag_N = res >> 24; |
9926 | adr = AREG((Opcode >> 9) & 7); |
9927 | WRITE_LONG_F(adr, res) |
9928 | POST_IO |
9929 | RET(24) |
9930 | } |
9931 | |
9932 | // MOVEL |
9933 | OPCODE(0x20FA) |
9934 | { |
9935 | u32 adr, res; |
9936 | u32 src, dst; |
9937 | |
9938 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9939 | PC++; |
9940 | PRE_IO |
9941 | READ_LONG_F(adr, res) |
9942 | flag_C = 0; |
9943 | flag_V = 0; |
9944 | flag_NotZ = res; |
9945 | flag_N = res >> 24; |
9946 | adr = AREG((Opcode >> 9) & 7); |
9947 | AREG((Opcode >> 9) & 7) += 4; |
9948 | WRITE_LONG_F(adr, res) |
9949 | POST_IO |
9950 | RET(24) |
9951 | } |
9952 | |
9953 | // MOVEL |
9954 | OPCODE(0x213A) |
9955 | { |
9956 | u32 adr, res; |
9957 | u32 src, dst; |
9958 | |
9959 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9960 | PC++; |
9961 | PRE_IO |
9962 | READ_LONG_F(adr, res) |
9963 | flag_C = 0; |
9964 | flag_V = 0; |
9965 | flag_NotZ = res; |
9966 | flag_N = res >> 24; |
9967 | adr = AREG((Opcode >> 9) & 7) - 4; |
9968 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9969 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9970 | POST_IO |
9971 | RET(24) |
9972 | } |
9973 | |
9974 | // MOVEL |
9975 | OPCODE(0x217A) |
9976 | { |
9977 | u32 adr, res; |
9978 | u32 src, dst; |
9979 | |
9980 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9981 | PC++; |
9982 | PRE_IO |
9983 | READ_LONG_F(adr, res) |
9984 | flag_C = 0; |
9985 | flag_V = 0; |
9986 | flag_NotZ = res; |
9987 | flag_N = res >> 24; |
9988 | FETCH_SWORD(adr); |
9989 | adr += AREG((Opcode >> 9) & 7); |
9990 | WRITE_LONG_F(adr, res) |
9991 | POST_IO |
9992 | RET(28) |
9993 | } |
9994 | |
9995 | // MOVEL |
9996 | OPCODE(0x21BA) |
9997 | { |
9998 | u32 adr, res; |
9999 | u32 src, dst; |
10000 | |
10001 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10002 | PC++; |
10003 | PRE_IO |
10004 | READ_LONG_F(adr, res) |
10005 | flag_C = 0; |
10006 | flag_V = 0; |
10007 | flag_NotZ = res; |
10008 | flag_N = res >> 24; |
10009 | adr = AREG((Opcode >> 9) & 7); |
10010 | DECODE_EXT_WORD |
10011 | WRITE_LONG_F(adr, res) |
10012 | POST_IO |
10013 | RET(30) |
10014 | } |
10015 | |
10016 | // MOVEL |
10017 | OPCODE(0x21FA) |
10018 | { |
10019 | u32 adr, res; |
10020 | u32 src, dst; |
10021 | |
10022 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10023 | PC++; |
10024 | PRE_IO |
10025 | READ_LONG_F(adr, res) |
10026 | flag_C = 0; |
10027 | flag_V = 0; |
10028 | flag_NotZ = res; |
10029 | flag_N = res >> 24; |
10030 | FETCH_SWORD(adr); |
10031 | WRITE_LONG_F(adr, res) |
10032 | POST_IO |
10033 | RET(28) |
10034 | } |
10035 | |
10036 | // MOVEL |
10037 | OPCODE(0x23FA) |
10038 | { |
10039 | u32 adr, res; |
10040 | u32 src, dst; |
10041 | |
10042 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10043 | PC++; |
10044 | PRE_IO |
10045 | READ_LONG_F(adr, res) |
10046 | flag_C = 0; |
10047 | flag_V = 0; |
10048 | flag_NotZ = res; |
10049 | flag_N = res >> 24; |
10050 | FETCH_LONG(adr); |
10051 | WRITE_LONG_F(adr, res) |
10052 | POST_IO |
10053 | RET(32) |
10054 | } |
10055 | |
10056 | // MOVEL |
10057 | OPCODE(0x2EFA) |
10058 | { |
10059 | u32 adr, res; |
10060 | u32 src, dst; |
10061 | |
10062 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10063 | PC++; |
10064 | PRE_IO |
10065 | READ_LONG_F(adr, res) |
10066 | flag_C = 0; |
10067 | flag_V = 0; |
10068 | flag_NotZ = res; |
10069 | flag_N = res >> 24; |
10070 | adr = AREG(7); |
10071 | AREG(7) += 4; |
10072 | WRITE_LONG_F(adr, res) |
10073 | POST_IO |
10074 | RET(24) |
10075 | } |
10076 | |
10077 | // MOVEL |
10078 | OPCODE(0x2F3A) |
10079 | { |
10080 | u32 adr, res; |
10081 | u32 src, dst; |
10082 | |
10083 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10084 | PC++; |
10085 | PRE_IO |
10086 | READ_LONG_F(adr, res) |
10087 | flag_C = 0; |
10088 | flag_V = 0; |
10089 | flag_NotZ = res; |
10090 | flag_N = res >> 24; |
10091 | adr = AREG(7) - 4; |
10092 | AREG(7) = adr; |
03e4f2a3 |
10093 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10094 | POST_IO |
10095 | RET(24) |
10096 | } |
10097 | |
10098 | // MOVEL |
10099 | OPCODE(0x203B) |
10100 | { |
10101 | u32 adr, res; |
10102 | u32 src, dst; |
10103 | |
10104 | adr = (u32)(PC) - BasePC; |
10105 | DECODE_EXT_WORD |
10106 | PRE_IO |
10107 | READ_LONG_F(adr, res) |
10108 | flag_C = 0; |
10109 | flag_V = 0; |
10110 | flag_NotZ = res; |
10111 | flag_N = res >> 24; |
10112 | DREGu32((Opcode >> 9) & 7) = res; |
10113 | POST_IO |
10114 | RET(18) |
10115 | } |
10116 | |
10117 | // MOVEL |
10118 | OPCODE(0x20BB) |
10119 | { |
10120 | u32 adr, res; |
10121 | u32 src, dst; |
10122 | |
10123 | adr = (u32)(PC) - BasePC; |
10124 | DECODE_EXT_WORD |
10125 | PRE_IO |
10126 | READ_LONG_F(adr, res) |
10127 | flag_C = 0; |
10128 | flag_V = 0; |
10129 | flag_NotZ = res; |
10130 | flag_N = res >> 24; |
10131 | adr = AREG((Opcode >> 9) & 7); |
10132 | WRITE_LONG_F(adr, res) |
10133 | POST_IO |
10134 | RET(26) |
10135 | } |
10136 | |
10137 | // MOVEL |
10138 | OPCODE(0x20FB) |
10139 | { |
10140 | u32 adr, res; |
10141 | u32 src, dst; |
10142 | |
10143 | adr = (u32)(PC) - BasePC; |
10144 | DECODE_EXT_WORD |
10145 | PRE_IO |
10146 | READ_LONG_F(adr, res) |
10147 | flag_C = 0; |
10148 | flag_V = 0; |
10149 | flag_NotZ = res; |
10150 | flag_N = res >> 24; |
10151 | adr = AREG((Opcode >> 9) & 7); |
10152 | AREG((Opcode >> 9) & 7) += 4; |
10153 | WRITE_LONG_F(adr, res) |
10154 | POST_IO |
10155 | RET(26) |
10156 | } |
10157 | |
10158 | // MOVEL |
10159 | OPCODE(0x213B) |
10160 | { |
10161 | u32 adr, res; |
10162 | u32 src, dst; |
10163 | |
10164 | adr = (u32)(PC) - BasePC; |
10165 | DECODE_EXT_WORD |
10166 | PRE_IO |
10167 | READ_LONG_F(adr, res) |
10168 | flag_C = 0; |
10169 | flag_V = 0; |
10170 | flag_NotZ = res; |
10171 | flag_N = res >> 24; |
10172 | adr = AREG((Opcode >> 9) & 7) - 4; |
10173 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10174 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10175 | POST_IO |
10176 | RET(26) |
10177 | } |
10178 | |
10179 | // MOVEL |
10180 | OPCODE(0x217B) |
10181 | { |
10182 | u32 adr, res; |
10183 | u32 src, dst; |
10184 | |
10185 | adr = (u32)(PC) - BasePC; |
10186 | DECODE_EXT_WORD |
10187 | PRE_IO |
10188 | READ_LONG_F(adr, res) |
10189 | flag_C = 0; |
10190 | flag_V = 0; |
10191 | flag_NotZ = res; |
10192 | flag_N = res >> 24; |
10193 | FETCH_SWORD(adr); |
10194 | adr += AREG((Opcode >> 9) & 7); |
10195 | WRITE_LONG_F(adr, res) |
10196 | POST_IO |
10197 | RET(30) |
10198 | } |
10199 | |
10200 | // MOVEL |
10201 | OPCODE(0x21BB) |
10202 | { |
10203 | u32 adr, res; |
10204 | u32 src, dst; |
10205 | |
10206 | adr = (u32)(PC) - BasePC; |
10207 | DECODE_EXT_WORD |
10208 | PRE_IO |
10209 | READ_LONG_F(adr, res) |
10210 | flag_C = 0; |
10211 | flag_V = 0; |
10212 | flag_NotZ = res; |
10213 | flag_N = res >> 24; |
10214 | adr = AREG((Opcode >> 9) & 7); |
10215 | DECODE_EXT_WORD |
10216 | WRITE_LONG_F(adr, res) |
10217 | POST_IO |
10218 | RET(32) |
10219 | } |
10220 | |
10221 | // MOVEL |
10222 | OPCODE(0x21FB) |
10223 | { |
10224 | u32 adr, res; |
10225 | u32 src, dst; |
10226 | |
10227 | adr = (u32)(PC) - BasePC; |
10228 | DECODE_EXT_WORD |
10229 | PRE_IO |
10230 | READ_LONG_F(adr, res) |
10231 | flag_C = 0; |
10232 | flag_V = 0; |
10233 | flag_NotZ = res; |
10234 | flag_N = res >> 24; |
10235 | FETCH_SWORD(adr); |
10236 | WRITE_LONG_F(adr, res) |
10237 | POST_IO |
10238 | RET(30) |
10239 | } |
10240 | |
10241 | // MOVEL |
10242 | OPCODE(0x23FB) |
10243 | { |
10244 | u32 adr, res; |
10245 | u32 src, dst; |
10246 | |
10247 | adr = (u32)(PC) - BasePC; |
10248 | DECODE_EXT_WORD |
10249 | PRE_IO |
10250 | READ_LONG_F(adr, res) |
10251 | flag_C = 0; |
10252 | flag_V = 0; |
10253 | flag_NotZ = res; |
10254 | flag_N = res >> 24; |
10255 | FETCH_LONG(adr); |
10256 | WRITE_LONG_F(adr, res) |
10257 | POST_IO |
10258 | RET(34) |
10259 | } |
10260 | |
10261 | // MOVEL |
10262 | OPCODE(0x2EFB) |
10263 | { |
10264 | u32 adr, res; |
10265 | u32 src, dst; |
10266 | |
10267 | adr = (u32)(PC) - BasePC; |
10268 | DECODE_EXT_WORD |
10269 | PRE_IO |
10270 | READ_LONG_F(adr, res) |
10271 | flag_C = 0; |
10272 | flag_V = 0; |
10273 | flag_NotZ = res; |
10274 | flag_N = res >> 24; |
10275 | adr = AREG(7); |
10276 | AREG(7) += 4; |
10277 | WRITE_LONG_F(adr, res) |
10278 | POST_IO |
10279 | RET(26) |
10280 | } |
10281 | |
10282 | // MOVEL |
10283 | OPCODE(0x2F3B) |
10284 | { |
10285 | u32 adr, res; |
10286 | u32 src, dst; |
10287 | |
10288 | adr = (u32)(PC) - BasePC; |
10289 | DECODE_EXT_WORD |
10290 | PRE_IO |
10291 | READ_LONG_F(adr, res) |
10292 | flag_C = 0; |
10293 | flag_V = 0; |
10294 | flag_NotZ = res; |
10295 | flag_N = res >> 24; |
10296 | adr = AREG(7) - 4; |
10297 | AREG(7) = adr; |
03e4f2a3 |
10298 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10299 | POST_IO |
10300 | RET(26) |
10301 | } |
10302 | |
10303 | // MOVEL |
10304 | OPCODE(0x203C) |
10305 | { |
10306 | u32 adr, res; |
10307 | u32 src, dst; |
10308 | |
10309 | FETCH_LONG(res); |
10310 | flag_C = 0; |
10311 | flag_V = 0; |
10312 | flag_NotZ = res; |
10313 | flag_N = res >> 24; |
10314 | DREGu32((Opcode >> 9) & 7) = res; |
10315 | RET(12) |
10316 | } |
10317 | |
10318 | // MOVEL |
10319 | OPCODE(0x20BC) |
10320 | { |
10321 | u32 adr, res; |
10322 | u32 src, dst; |
10323 | |
10324 | FETCH_LONG(res); |
10325 | flag_C = 0; |
10326 | flag_V = 0; |
10327 | flag_NotZ = res; |
10328 | flag_N = res >> 24; |
10329 | adr = AREG((Opcode >> 9) & 7); |
10330 | PRE_IO |
10331 | WRITE_LONG_F(adr, res) |
10332 | POST_IO |
10333 | RET(20) |
10334 | } |
10335 | |
10336 | // MOVEL |
10337 | OPCODE(0x20FC) |
10338 | { |
10339 | u32 adr, res; |
10340 | u32 src, dst; |
10341 | |
10342 | FETCH_LONG(res); |
10343 | flag_C = 0; |
10344 | flag_V = 0; |
10345 | flag_NotZ = res; |
10346 | flag_N = res >> 24; |
10347 | adr = AREG((Opcode >> 9) & 7); |
10348 | AREG((Opcode >> 9) & 7) += 4; |
10349 | PRE_IO |
10350 | WRITE_LONG_F(adr, res) |
10351 | POST_IO |
10352 | RET(20) |
10353 | } |
10354 | |
10355 | // MOVEL |
10356 | OPCODE(0x213C) |
10357 | { |
10358 | u32 adr, res; |
10359 | u32 src, dst; |
10360 | |
10361 | FETCH_LONG(res); |
10362 | flag_C = 0; |
10363 | flag_V = 0; |
10364 | flag_NotZ = res; |
10365 | flag_N = res >> 24; |
10366 | adr = AREG((Opcode >> 9) & 7) - 4; |
10367 | AREG((Opcode >> 9) & 7) = adr; |
10368 | PRE_IO |
80db4442 |
10369 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10370 | POST_IO |
10371 | RET(20) |
10372 | } |
10373 | |
10374 | // MOVEL |
10375 | OPCODE(0x217C) |
10376 | { |
10377 | u32 adr, res; |
10378 | u32 src, dst; |
10379 | |
10380 | FETCH_LONG(res); |
10381 | flag_C = 0; |
10382 | flag_V = 0; |
10383 | flag_NotZ = res; |
10384 | flag_N = res >> 24; |
10385 | FETCH_SWORD(adr); |
10386 | adr += AREG((Opcode >> 9) & 7); |
10387 | PRE_IO |
10388 | WRITE_LONG_F(adr, res) |
10389 | POST_IO |
10390 | RET(24) |
10391 | } |
10392 | |
10393 | // MOVEL |
10394 | OPCODE(0x21BC) |
10395 | { |
10396 | u32 adr, res; |
10397 | u32 src, dst; |
10398 | |
10399 | FETCH_LONG(res); |
10400 | flag_C = 0; |
10401 | flag_V = 0; |
10402 | flag_NotZ = res; |
10403 | flag_N = res >> 24; |
10404 | adr = AREG((Opcode >> 9) & 7); |
10405 | DECODE_EXT_WORD |
10406 | PRE_IO |
10407 | WRITE_LONG_F(adr, res) |
10408 | POST_IO |
10409 | RET(26) |
10410 | } |
10411 | |
10412 | // MOVEL |
10413 | OPCODE(0x21FC) |
10414 | { |
10415 | u32 adr, res; |
10416 | u32 src, dst; |
10417 | |
10418 | FETCH_LONG(res); |
10419 | flag_C = 0; |
10420 | flag_V = 0; |
10421 | flag_NotZ = res; |
10422 | flag_N = res >> 24; |
10423 | FETCH_SWORD(adr); |
10424 | PRE_IO |
10425 | WRITE_LONG_F(adr, res) |
10426 | POST_IO |
10427 | RET(24) |
10428 | } |
10429 | |
10430 | // MOVEL |
10431 | OPCODE(0x23FC) |
10432 | { |
10433 | u32 adr, res; |
10434 | u32 src, dst; |
10435 | |
10436 | FETCH_LONG(res); |
10437 | flag_C = 0; |
10438 | flag_V = 0; |
10439 | flag_NotZ = res; |
10440 | flag_N = res >> 24; |
10441 | FETCH_LONG(adr); |
10442 | PRE_IO |
10443 | WRITE_LONG_F(adr, res) |
10444 | POST_IO |
10445 | RET(28) |
10446 | } |
10447 | |
10448 | // MOVEL |
10449 | OPCODE(0x2EFC) |
10450 | { |
10451 | u32 adr, res; |
10452 | u32 src, dst; |
10453 | |
10454 | FETCH_LONG(res); |
10455 | flag_C = 0; |
10456 | flag_V = 0; |
10457 | flag_NotZ = res; |
10458 | flag_N = res >> 24; |
10459 | adr = AREG(7); |
10460 | AREG(7) += 4; |
10461 | PRE_IO |
10462 | WRITE_LONG_F(adr, res) |
10463 | POST_IO |
10464 | RET(20) |
10465 | } |
10466 | |
10467 | // MOVEL |
10468 | OPCODE(0x2F3C) |
10469 | { |
10470 | u32 adr, res; |
10471 | u32 src, dst; |
10472 | |
10473 | FETCH_LONG(res); |
10474 | flag_C = 0; |
10475 | flag_V = 0; |
10476 | flag_NotZ = res; |
10477 | flag_N = res >> 24; |
10478 | adr = AREG(7) - 4; |
10479 | AREG(7) = adr; |
10480 | PRE_IO |
03e4f2a3 |
10481 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10482 | POST_IO |
10483 | RET(20) |
10484 | } |
10485 | |
10486 | // MOVEL |
10487 | OPCODE(0x201F) |
10488 | { |
10489 | u32 adr, res; |
10490 | u32 src, dst; |
10491 | |
10492 | adr = AREG(7); |
10493 | AREG(7) += 4; |
10494 | PRE_IO |
10495 | READ_LONG_F(adr, res) |
10496 | flag_C = 0; |
10497 | flag_V = 0; |
10498 | flag_NotZ = res; |
10499 | flag_N = res >> 24; |
10500 | DREGu32((Opcode >> 9) & 7) = res; |
10501 | POST_IO |
10502 | RET(12) |
10503 | } |
10504 | |
10505 | // MOVEL |
10506 | OPCODE(0x209F) |
10507 | { |
10508 | u32 adr, res; |
10509 | u32 src, dst; |
10510 | |
10511 | adr = AREG(7); |
10512 | AREG(7) += 4; |
10513 | PRE_IO |
10514 | READ_LONG_F(adr, res) |
10515 | flag_C = 0; |
10516 | flag_V = 0; |
10517 | flag_NotZ = res; |
10518 | flag_N = res >> 24; |
10519 | adr = AREG((Opcode >> 9) & 7); |
10520 | WRITE_LONG_F(adr, res) |
10521 | POST_IO |
10522 | RET(20) |
10523 | } |
10524 | |
10525 | // MOVEL |
10526 | OPCODE(0x20DF) |
10527 | { |
10528 | u32 adr, res; |
10529 | u32 src, dst; |
10530 | |
10531 | adr = AREG(7); |
10532 | AREG(7) += 4; |
10533 | PRE_IO |
10534 | READ_LONG_F(adr, res) |
10535 | flag_C = 0; |
10536 | flag_V = 0; |
10537 | flag_NotZ = res; |
10538 | flag_N = res >> 24; |
10539 | adr = AREG((Opcode >> 9) & 7); |
10540 | AREG((Opcode >> 9) & 7) += 4; |
10541 | WRITE_LONG_F(adr, res) |
10542 | POST_IO |
10543 | RET(20) |
10544 | } |
10545 | |
10546 | // MOVEL |
10547 | OPCODE(0x211F) |
10548 | { |
10549 | u32 adr, res; |
10550 | u32 src, dst; |
10551 | |
10552 | adr = AREG(7); |
10553 | AREG(7) += 4; |
10554 | PRE_IO |
10555 | READ_LONG_F(adr, res) |
10556 | flag_C = 0; |
10557 | flag_V = 0; |
10558 | flag_NotZ = res; |
10559 | flag_N = res >> 24; |
10560 | adr = AREG((Opcode >> 9) & 7) - 4; |
10561 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10562 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10563 | POST_IO |
10564 | RET(20) |
10565 | } |
10566 | |
10567 | // MOVEL |
10568 | OPCODE(0x215F) |
10569 | { |
10570 | u32 adr, res; |
10571 | u32 src, dst; |
10572 | |
10573 | adr = AREG(7); |
10574 | AREG(7) += 4; |
10575 | PRE_IO |
10576 | READ_LONG_F(adr, res) |
10577 | flag_C = 0; |
10578 | flag_V = 0; |
10579 | flag_NotZ = res; |
10580 | flag_N = res >> 24; |
10581 | FETCH_SWORD(adr); |
10582 | adr += AREG((Opcode >> 9) & 7); |
10583 | WRITE_LONG_F(adr, res) |
10584 | POST_IO |
10585 | RET(24) |
10586 | } |
10587 | |
10588 | // MOVEL |
10589 | OPCODE(0x219F) |
10590 | { |
10591 | u32 adr, res; |
10592 | u32 src, dst; |
10593 | |
10594 | adr = AREG(7); |
10595 | AREG(7) += 4; |
10596 | PRE_IO |
10597 | READ_LONG_F(adr, res) |
10598 | flag_C = 0; |
10599 | flag_V = 0; |
10600 | flag_NotZ = res; |
10601 | flag_N = res >> 24; |
10602 | adr = AREG((Opcode >> 9) & 7); |
10603 | DECODE_EXT_WORD |
10604 | WRITE_LONG_F(adr, res) |
10605 | POST_IO |
10606 | RET(26) |
10607 | } |
10608 | |
10609 | // MOVEL |
10610 | OPCODE(0x21DF) |
10611 | { |
10612 | u32 adr, res; |
10613 | u32 src, dst; |
10614 | |
10615 | adr = AREG(7); |
10616 | AREG(7) += 4; |
10617 | PRE_IO |
10618 | READ_LONG_F(adr, res) |
10619 | flag_C = 0; |
10620 | flag_V = 0; |
10621 | flag_NotZ = res; |
10622 | flag_N = res >> 24; |
10623 | FETCH_SWORD(adr); |
10624 | WRITE_LONG_F(adr, res) |
10625 | POST_IO |
10626 | RET(24) |
10627 | } |
10628 | |
10629 | // MOVEL |
10630 | OPCODE(0x23DF) |
10631 | { |
10632 | u32 adr, res; |
10633 | u32 src, dst; |
10634 | |
10635 | adr = AREG(7); |
10636 | AREG(7) += 4; |
10637 | PRE_IO |
10638 | READ_LONG_F(adr, res) |
10639 | flag_C = 0; |
10640 | flag_V = 0; |
10641 | flag_NotZ = res; |
10642 | flag_N = res >> 24; |
10643 | FETCH_LONG(adr); |
10644 | WRITE_LONG_F(adr, res) |
10645 | POST_IO |
10646 | RET(28) |
10647 | } |
10648 | |
10649 | // MOVEL |
10650 | OPCODE(0x2EDF) |
10651 | { |
10652 | u32 adr, res; |
10653 | u32 src, dst; |
10654 | |
10655 | adr = AREG(7); |
10656 | AREG(7) += 4; |
10657 | PRE_IO |
10658 | READ_LONG_F(adr, res) |
10659 | flag_C = 0; |
10660 | flag_V = 0; |
10661 | flag_NotZ = res; |
10662 | flag_N = res >> 24; |
10663 | adr = AREG(7); |
10664 | AREG(7) += 4; |
10665 | WRITE_LONG_F(adr, res) |
10666 | POST_IO |
10667 | RET(20) |
10668 | } |
10669 | |
10670 | // MOVEL |
10671 | OPCODE(0x2F1F) |
10672 | { |
10673 | u32 adr, res; |
10674 | u32 src, dst; |
10675 | |
10676 | adr = AREG(7); |
10677 | AREG(7) += 4; |
10678 | PRE_IO |
10679 | READ_LONG_F(adr, res) |
10680 | flag_C = 0; |
10681 | flag_V = 0; |
10682 | flag_NotZ = res; |
10683 | flag_N = res >> 24; |
10684 | adr = AREG(7) - 4; |
10685 | AREG(7) = adr; |
03e4f2a3 |
10686 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10687 | POST_IO |
10688 | RET(20) |
10689 | } |
10690 | |
10691 | // MOVEL |
10692 | OPCODE(0x2027) |
10693 | { |
10694 | u32 adr, res; |
10695 | u32 src, dst; |
10696 | |
10697 | adr = AREG(7) - 4; |
10698 | AREG(7) = adr; |
10699 | PRE_IO |
10700 | READ_LONG_F(adr, res) |
10701 | flag_C = 0; |
10702 | flag_V = 0; |
10703 | flag_NotZ = res; |
10704 | flag_N = res >> 24; |
10705 | DREGu32((Opcode >> 9) & 7) = res; |
10706 | POST_IO |
10707 | RET(14) |
10708 | } |
10709 | |
10710 | // MOVEL |
10711 | OPCODE(0x20A7) |
10712 | { |
10713 | u32 adr, res; |
10714 | u32 src, dst; |
10715 | |
10716 | adr = AREG(7) - 4; |
10717 | AREG(7) = adr; |
10718 | PRE_IO |
10719 | READ_LONG_F(adr, res) |
10720 | flag_C = 0; |
10721 | flag_V = 0; |
10722 | flag_NotZ = res; |
10723 | flag_N = res >> 24; |
10724 | adr = AREG((Opcode >> 9) & 7); |
10725 | WRITE_LONG_F(adr, res) |
10726 | POST_IO |
10727 | RET(22) |
10728 | } |
10729 | |
10730 | // MOVEL |
10731 | OPCODE(0x20E7) |
10732 | { |
10733 | u32 adr, res; |
10734 | u32 src, dst; |
10735 | |
10736 | adr = AREG(7) - 4; |
10737 | AREG(7) = adr; |
10738 | PRE_IO |
10739 | READ_LONG_F(adr, res) |
10740 | flag_C = 0; |
10741 | flag_V = 0; |
10742 | flag_NotZ = res; |
10743 | flag_N = res >> 24; |
10744 | adr = AREG((Opcode >> 9) & 7); |
10745 | AREG((Opcode >> 9) & 7) += 4; |
10746 | WRITE_LONG_F(adr, res) |
10747 | POST_IO |
10748 | RET(22) |
10749 | } |
10750 | |
10751 | // MOVEL |
10752 | OPCODE(0x2127) |
10753 | { |
10754 | u32 adr, res; |
10755 | u32 src, dst; |
10756 | |
10757 | adr = AREG(7) - 4; |
10758 | AREG(7) = adr; |
10759 | PRE_IO |
10760 | READ_LONG_F(adr, res) |
10761 | flag_C = 0; |
10762 | flag_V = 0; |
10763 | flag_NotZ = res; |
10764 | flag_N = res >> 24; |
10765 | adr = AREG((Opcode >> 9) & 7) - 4; |
10766 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10767 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10768 | POST_IO |
10769 | RET(22) |
10770 | } |
10771 | |
10772 | // MOVEL |
10773 | OPCODE(0x2167) |
10774 | { |
10775 | u32 adr, res; |
10776 | u32 src, dst; |
10777 | |
10778 | adr = AREG(7) - 4; |
10779 | AREG(7) = adr; |
10780 | PRE_IO |
10781 | READ_LONG_F(adr, res) |
10782 | flag_C = 0; |
10783 | flag_V = 0; |
10784 | flag_NotZ = res; |
10785 | flag_N = res >> 24; |
10786 | FETCH_SWORD(adr); |
10787 | adr += AREG((Opcode >> 9) & 7); |
10788 | WRITE_LONG_F(adr, res) |
10789 | POST_IO |
10790 | RET(26) |
10791 | } |
10792 | |
10793 | // MOVEL |
10794 | OPCODE(0x21A7) |
10795 | { |
10796 | u32 adr, res; |
10797 | u32 src, dst; |
10798 | |
10799 | adr = AREG(7) - 4; |
10800 | AREG(7) = adr; |
10801 | PRE_IO |
10802 | READ_LONG_F(adr, res) |
10803 | flag_C = 0; |
10804 | flag_V = 0; |
10805 | flag_NotZ = res; |
10806 | flag_N = res >> 24; |
10807 | adr = AREG((Opcode >> 9) & 7); |
10808 | DECODE_EXT_WORD |
10809 | WRITE_LONG_F(adr, res) |
10810 | POST_IO |
10811 | RET(28) |
10812 | } |
10813 | |
10814 | // MOVEL |
10815 | OPCODE(0x21E7) |
10816 | { |
10817 | u32 adr, res; |
10818 | u32 src, dst; |
10819 | |
10820 | adr = AREG(7) - 4; |
10821 | AREG(7) = adr; |
10822 | PRE_IO |
10823 | READ_LONG_F(adr, res) |
10824 | flag_C = 0; |
10825 | flag_V = 0; |
10826 | flag_NotZ = res; |
10827 | flag_N = res >> 24; |
10828 | FETCH_SWORD(adr); |
10829 | WRITE_LONG_F(adr, res) |
10830 | POST_IO |
10831 | RET(26) |
10832 | } |
10833 | |
10834 | // MOVEL |
10835 | OPCODE(0x23E7) |
10836 | { |
10837 | u32 adr, res; |
10838 | u32 src, dst; |
10839 | |
10840 | adr = AREG(7) - 4; |
10841 | AREG(7) = adr; |
10842 | PRE_IO |
10843 | READ_LONG_F(adr, res) |
10844 | flag_C = 0; |
10845 | flag_V = 0; |
10846 | flag_NotZ = res; |
10847 | flag_N = res >> 24; |
10848 | FETCH_LONG(adr); |
10849 | WRITE_LONG_F(adr, res) |
10850 | POST_IO |
10851 | RET(30) |
10852 | } |
10853 | |
10854 | // MOVEL |
10855 | OPCODE(0x2EE7) |
10856 | { |
10857 | u32 adr, res; |
10858 | u32 src, dst; |
10859 | |
10860 | adr = AREG(7) - 4; |
10861 | AREG(7) = adr; |
10862 | PRE_IO |
10863 | READ_LONG_F(adr, res) |
10864 | flag_C = 0; |
10865 | flag_V = 0; |
10866 | flag_NotZ = res; |
10867 | flag_N = res >> 24; |
10868 | adr = AREG(7); |
10869 | AREG(7) += 4; |
10870 | WRITE_LONG_F(adr, res) |
10871 | POST_IO |
10872 | RET(22) |
10873 | } |
10874 | |
10875 | // MOVEL |
10876 | OPCODE(0x2F27) |
10877 | { |
10878 | u32 adr, res; |
10879 | u32 src, dst; |
10880 | |
10881 | adr = AREG(7) - 4; |
10882 | AREG(7) = adr; |
10883 | PRE_IO |
10884 | READ_LONG_F(adr, res) |
10885 | flag_C = 0; |
10886 | flag_V = 0; |
10887 | flag_NotZ = res; |
10888 | flag_N = res >> 24; |
10889 | adr = AREG(7) - 4; |
10890 | AREG(7) = adr; |
03e4f2a3 |
10891 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10892 | POST_IO |
10893 | RET(22) |
10894 | } |
10895 | |
10896 | // MOVEAL |
10897 | OPCODE(0x2040) |
10898 | { |
10899 | u32 adr, res; |
10900 | u32 src, dst; |
10901 | |
10902 | res = (s32)DREGs32((Opcode >> 0) & 7); |
10903 | AREG((Opcode >> 9) & 7) = res; |
10904 | RET(4) |
10905 | } |
10906 | |
10907 | // MOVEAL |
10908 | OPCODE(0x2048) |
10909 | { |
10910 | u32 adr, res; |
10911 | u32 src, dst; |
10912 | |
10913 | res = (s32)AREGs32((Opcode >> 0) & 7); |
10914 | AREG((Opcode >> 9) & 7) = res; |
10915 | RET(4) |
10916 | } |
10917 | |
10918 | // MOVEAL |
10919 | OPCODE(0x2050) |
10920 | { |
10921 | u32 adr, res; |
10922 | u32 src, dst; |
10923 | |
10924 | adr = AREG((Opcode >> 0) & 7); |
10925 | PRE_IO |
10926 | READSX_LONG_F(adr, res) |
10927 | AREG((Opcode >> 9) & 7) = res; |
10928 | POST_IO |
10929 | RET(12) |
10930 | } |
10931 | |
10932 | // MOVEAL |
10933 | OPCODE(0x2058) |
10934 | { |
10935 | u32 adr, res; |
10936 | u32 src, dst; |
10937 | |
10938 | adr = AREG((Opcode >> 0) & 7); |
10939 | AREG((Opcode >> 0) & 7) += 4; |
10940 | PRE_IO |
10941 | READSX_LONG_F(adr, res) |
10942 | AREG((Opcode >> 9) & 7) = res; |
10943 | POST_IO |
10944 | RET(12) |
10945 | } |
10946 | |
10947 | // MOVEAL |
10948 | OPCODE(0x2060) |
10949 | { |
10950 | u32 adr, res; |
10951 | u32 src, dst; |
10952 | |
10953 | adr = AREG((Opcode >> 0) & 7) - 4; |
10954 | AREG((Opcode >> 0) & 7) = adr; |
10955 | PRE_IO |
10956 | READSX_LONG_F(adr, res) |
10957 | AREG((Opcode >> 9) & 7) = res; |
10958 | POST_IO |
10959 | RET(14) |
10960 | } |
10961 | |
10962 | // MOVEAL |
10963 | OPCODE(0x2068) |
10964 | { |
10965 | u32 adr, res; |
10966 | u32 src, dst; |
10967 | |
10968 | FETCH_SWORD(adr); |
10969 | adr += AREG((Opcode >> 0) & 7); |
10970 | PRE_IO |
10971 | READSX_LONG_F(adr, res) |
10972 | AREG((Opcode >> 9) & 7) = res; |
10973 | POST_IO |
10974 | RET(16) |
10975 | } |
10976 | |
10977 | // MOVEAL |
10978 | OPCODE(0x2070) |
10979 | { |
10980 | u32 adr, res; |
10981 | u32 src, dst; |
10982 | |
10983 | adr = AREG((Opcode >> 0) & 7); |
10984 | DECODE_EXT_WORD |
10985 | PRE_IO |
10986 | READSX_LONG_F(adr, res) |
10987 | AREG((Opcode >> 9) & 7) = res; |
10988 | POST_IO |
10989 | RET(18) |
10990 | } |
10991 | |
10992 | // MOVEAL |
10993 | OPCODE(0x2078) |
10994 | { |
10995 | u32 adr, res; |
10996 | u32 src, dst; |
10997 | |
10998 | FETCH_SWORD(adr); |
10999 | PRE_IO |
11000 | READSX_LONG_F(adr, res) |
11001 | AREG((Opcode >> 9) & 7) = res; |
11002 | POST_IO |
11003 | RET(16) |
11004 | } |
11005 | |
11006 | // MOVEAL |
11007 | OPCODE(0x2079) |
11008 | { |
11009 | u32 adr, res; |
11010 | u32 src, dst; |
11011 | |
11012 | FETCH_LONG(adr); |
11013 | PRE_IO |
11014 | READSX_LONG_F(adr, res) |
11015 | AREG((Opcode >> 9) & 7) = res; |
11016 | POST_IO |
11017 | RET(20) |
11018 | } |
11019 | |
11020 | // MOVEAL |
11021 | OPCODE(0x207A) |
11022 | { |
11023 | u32 adr, res; |
11024 | u32 src, dst; |
11025 | |
11026 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
11027 | PC++; |
11028 | PRE_IO |
11029 | READSX_LONG_F(adr, res) |
11030 | AREG((Opcode >> 9) & 7) = res; |
11031 | POST_IO |
11032 | RET(16) |
11033 | } |
11034 | |
11035 | // MOVEAL |
11036 | OPCODE(0x207B) |
11037 | { |
11038 | u32 adr, res; |
11039 | u32 src, dst; |
11040 | |
11041 | adr = (u32)(PC) - BasePC; |
11042 | DECODE_EXT_WORD |
11043 | PRE_IO |
11044 | READSX_LONG_F(adr, res) |
11045 | AREG((Opcode >> 9) & 7) = res; |
11046 | POST_IO |
11047 | RET(18) |
11048 | } |
11049 | |
11050 | // MOVEAL |
11051 | OPCODE(0x207C) |
11052 | { |
11053 | u32 adr, res; |
11054 | u32 src, dst; |
11055 | |
11056 | FETCH_LONG(res); |
11057 | AREG((Opcode >> 9) & 7) = res; |
11058 | RET(12) |
11059 | } |
11060 | |
11061 | // MOVEAL |
11062 | OPCODE(0x205F) |
11063 | { |
11064 | u32 adr, res; |
11065 | u32 src, dst; |
11066 | |
11067 | adr = AREG(7); |
11068 | AREG(7) += 4; |
11069 | PRE_IO |
11070 | READSX_LONG_F(adr, res) |
11071 | AREG((Opcode >> 9) & 7) = res; |
11072 | POST_IO |
11073 | RET(12) |
11074 | } |
11075 | |
11076 | // MOVEAL |
11077 | OPCODE(0x2067) |
11078 | { |
11079 | u32 adr, res; |
11080 | u32 src, dst; |
11081 | |
11082 | adr = AREG(7) - 4; |
11083 | AREG(7) = adr; |
11084 | PRE_IO |
11085 | READSX_LONG_F(adr, res) |
11086 | AREG((Opcode >> 9) & 7) = res; |
11087 | POST_IO |
11088 | RET(14) |
11089 | } |
11090 | |
11091 | // MOVEW |
11092 | OPCODE(0x3000) |
11093 | { |
11094 | u32 adr, res; |
11095 | u32 src, dst; |
11096 | |
11097 | res = DREGu16((Opcode >> 0) & 7); |
11098 | flag_C = 0; |
11099 | flag_V = 0; |
11100 | flag_NotZ = res; |
11101 | flag_N = res >> 8; |
11102 | DREGu16((Opcode >> 9) & 7) = res; |
11103 | RET(4) |
11104 | } |
11105 | |
11106 | // MOVEW |
11107 | OPCODE(0x3080) |
11108 | { |
11109 | u32 adr, res; |
11110 | u32 src, dst; |
11111 | |
11112 | res = DREGu16((Opcode >> 0) & 7); |
11113 | flag_C = 0; |
11114 | flag_V = 0; |
11115 | flag_NotZ = res; |
11116 | flag_N = res >> 8; |
11117 | adr = AREG((Opcode >> 9) & 7); |
11118 | PRE_IO |
11119 | WRITE_WORD_F(adr, res) |
11120 | POST_IO |
11121 | RET(8) |
11122 | } |
11123 | |
11124 | // MOVEW |
11125 | OPCODE(0x30C0) |
11126 | { |
11127 | u32 adr, res; |
11128 | u32 src, dst; |
11129 | |
11130 | res = DREGu16((Opcode >> 0) & 7); |
11131 | flag_C = 0; |
11132 | flag_V = 0; |
11133 | flag_NotZ = res; |
11134 | flag_N = res >> 8; |
11135 | adr = AREG((Opcode >> 9) & 7); |
11136 | AREG((Opcode >> 9) & 7) += 2; |
11137 | PRE_IO |
11138 | WRITE_WORD_F(adr, res) |
11139 | POST_IO |
11140 | RET(8) |
11141 | } |
11142 | |
11143 | // MOVEW |
11144 | OPCODE(0x3100) |
11145 | { |
11146 | u32 adr, res; |
11147 | u32 src, dst; |
11148 | |
11149 | res = DREGu16((Opcode >> 0) & 7); |
11150 | flag_C = 0; |
11151 | flag_V = 0; |
11152 | flag_NotZ = res; |
11153 | flag_N = res >> 8; |
11154 | adr = AREG((Opcode >> 9) & 7) - 2; |
11155 | AREG((Opcode >> 9) & 7) = adr; |
11156 | PRE_IO |
11157 | WRITE_WORD_F(adr, res) |
11158 | POST_IO |
11159 | RET(8) |
11160 | } |
11161 | |
11162 | // MOVEW |
11163 | OPCODE(0x3140) |
11164 | { |
11165 | u32 adr, res; |
11166 | u32 src, dst; |
11167 | |
11168 | res = DREGu16((Opcode >> 0) & 7); |
11169 | flag_C = 0; |
11170 | flag_V = 0; |
11171 | flag_NotZ = res; |
11172 | flag_N = res >> 8; |
11173 | FETCH_SWORD(adr); |
11174 | adr += AREG((Opcode >> 9) & 7); |
11175 | PRE_IO |
11176 | WRITE_WORD_F(adr, res) |
11177 | POST_IO |
11178 | RET(12) |
11179 | } |
11180 | |
11181 | // MOVEW |
11182 | OPCODE(0x3180) |
11183 | { |
11184 | u32 adr, res; |
11185 | u32 src, dst; |
11186 | |
11187 | res = DREGu16((Opcode >> 0) & 7); |
11188 | flag_C = 0; |
11189 | flag_V = 0; |
11190 | flag_NotZ = res; |
11191 | flag_N = res >> 8; |
11192 | adr = AREG((Opcode >> 9) & 7); |
11193 | DECODE_EXT_WORD |
11194 | PRE_IO |
11195 | WRITE_WORD_F(adr, res) |
11196 | POST_IO |
11197 | RET(14) |
11198 | } |
11199 | |
11200 | // MOVEW |
11201 | OPCODE(0x31C0) |
11202 | { |
11203 | u32 adr, res; |
11204 | u32 src, dst; |
11205 | |
11206 | res = DREGu16((Opcode >> 0) & 7); |
11207 | flag_C = 0; |
11208 | flag_V = 0; |
11209 | flag_NotZ = res; |
11210 | flag_N = res >> 8; |
11211 | FETCH_SWORD(adr); |
11212 | PRE_IO |
11213 | WRITE_WORD_F(adr, res) |
11214 | POST_IO |
11215 | RET(12) |
11216 | } |
11217 | |
11218 | // MOVEW |
11219 | OPCODE(0x33C0) |
11220 | { |
11221 | u32 adr, res; |
11222 | u32 src, dst; |
11223 | |
11224 | res = DREGu16((Opcode >> 0) & 7); |
11225 | flag_C = 0; |
11226 | flag_V = 0; |
11227 | flag_NotZ = res; |
11228 | flag_N = res >> 8; |
11229 | FETCH_LONG(adr); |
11230 | PRE_IO |
11231 | WRITE_WORD_F(adr, res) |
11232 | POST_IO |
11233 | RET(16) |
11234 | } |
11235 | |
11236 | // MOVEW |
11237 | OPCODE(0x3EC0) |
11238 | { |
11239 | u32 adr, res; |
11240 | u32 src, dst; |
11241 | |
11242 | res = DREGu16((Opcode >> 0) & 7); |
11243 | flag_C = 0; |
11244 | flag_V = 0; |
11245 | flag_NotZ = res; |
11246 | flag_N = res >> 8; |
11247 | adr = AREG(7); |
11248 | AREG(7) += 2; |
11249 | PRE_IO |
11250 | WRITE_WORD_F(adr, res) |
11251 | POST_IO |
11252 | RET(8) |
11253 | } |
11254 | |
11255 | // MOVEW |
11256 | OPCODE(0x3F00) |
11257 | { |
11258 | u32 adr, res; |
11259 | u32 src, dst; |
11260 | |
11261 | res = DREGu16((Opcode >> 0) & 7); |
11262 | flag_C = 0; |
11263 | flag_V = 0; |
11264 | flag_NotZ = res; |
11265 | flag_N = res >> 8; |
11266 | adr = AREG(7) - 2; |
11267 | AREG(7) = adr; |
11268 | PRE_IO |
11269 | WRITE_WORD_F(adr, res) |
11270 | POST_IO |
11271 | RET(8) |
11272 | } |
11273 | |
11274 | // MOVEW |
11275 | OPCODE(0x3008) |
11276 | { |
11277 | u32 adr, res; |
11278 | u32 src, dst; |
11279 | |
11280 | res = AREGu16((Opcode >> 0) & 7); |
11281 | flag_C = 0; |
11282 | flag_V = 0; |
11283 | flag_NotZ = res; |
11284 | flag_N = res >> 8; |
11285 | DREGu16((Opcode >> 9) & 7) = res; |
11286 | RET(4) |
11287 | } |
11288 | |
11289 | // MOVEW |
11290 | OPCODE(0x3088) |
11291 | { |
11292 | u32 adr, res; |
11293 | u32 src, dst; |
11294 | |
11295 | res = AREGu16((Opcode >> 0) & 7); |
11296 | flag_C = 0; |
11297 | flag_V = 0; |
11298 | flag_NotZ = res; |
11299 | flag_N = res >> 8; |
11300 | adr = AREG((Opcode >> 9) & 7); |
11301 | PRE_IO |
11302 | WRITE_WORD_F(adr, res) |
11303 | POST_IO |
11304 | RET(8) |
11305 | } |
11306 | |
11307 | // MOVEW |
11308 | OPCODE(0x30C8) |
11309 | { |
11310 | u32 adr, res; |
11311 | u32 src, dst; |
11312 | |
11313 | res = AREGu16((Opcode >> 0) & 7); |
11314 | flag_C = 0; |
11315 | flag_V = 0; |
11316 | flag_NotZ = res; |
11317 | flag_N = res >> 8; |
11318 | adr = AREG((Opcode >> 9) & 7); |
11319 | AREG((Opcode >> 9) & 7) += 2; |
11320 | PRE_IO |
11321 | WRITE_WORD_F(adr, res) |
11322 | POST_IO |
11323 | RET(8) |
11324 | } |
11325 | |
11326 | // MOVEW |
11327 | OPCODE(0x3108) |
11328 | { |
11329 | u32 adr, res; |
11330 | u32 src, dst; |
11331 | |
11332 | res = AREGu16((Opcode >> 0) & 7); |
11333 | flag_C = 0; |
11334 | flag_V = 0; |
11335 | flag_NotZ = res; |
11336 | flag_N = res >> 8; |
11337 | adr = AREG((Opcode >> 9) & 7) - 2; |
11338 | AREG((Opcode >> 9) & 7) = adr; |
11339 | PRE_IO |
11340 | WRITE_WORD_F(adr, res) |
11341 | POST_IO |
11342 | RET(8) |
11343 | } |
11344 | |
11345 | // MOVEW |
11346 | OPCODE(0x3148) |
11347 | { |
11348 | u32 adr, res; |
11349 | u32 src, dst; |
11350 | |
11351 | res = AREGu16((Opcode >> 0) & 7); |
11352 | flag_C = 0; |
11353 | flag_V = 0; |
11354 | flag_NotZ = res; |
11355 | flag_N = res >> 8; |
11356 | FETCH_SWORD(adr); |
11357 | adr += AREG((Opcode >> 9) & 7); |
11358 | PRE_IO |
11359 | WRITE_WORD_F(adr, res) |
11360 | POST_IO |
11361 | RET(12) |
11362 | } |
11363 | |
11364 | // MOVEW |
11365 | OPCODE(0x3188) |
11366 | { |
11367 | u32 adr, res; |
11368 | u32 src, dst; |
11369 | |
11370 | res = AREGu16((Opcode >> 0) & 7); |
11371 | flag_C = 0; |
11372 | flag_V = 0; |
11373 | flag_NotZ = res; |
11374 | flag_N = res >> 8; |
11375 | adr = AREG((Opcode >> 9) & 7); |
11376 | DECODE_EXT_WORD |
11377 | PRE_IO |
11378 | WRITE_WORD_F(adr, res) |
11379 | POST_IO |
11380 | RET(14) |
11381 | } |
11382 | |
11383 | // MOVEW |
11384 | OPCODE(0x31C8) |
11385 | { |
11386 | u32 adr, res; |
11387 | u32 src, dst; |
11388 | |
11389 | res = AREGu16((Opcode >> 0) & 7); |
11390 | flag_C = 0; |
11391 | flag_V = 0; |
11392 | flag_NotZ = res; |
11393 | flag_N = res >> 8; |
11394 | FETCH_SWORD(adr); |
11395 | PRE_IO |
11396 | WRITE_WORD_F(adr, res) |
11397 | POST_IO |
11398 | RET(12) |
11399 | } |
11400 | |
11401 | // MOVEW |
11402 | OPCODE(0x33C8) |
11403 | { |
11404 | u32 adr, res; |
11405 | u32 src, dst; |
11406 | |
11407 | res = AREGu16((Opcode >> 0) & 7); |
11408 | flag_C = 0; |
11409 | flag_V = 0; |
11410 | flag_NotZ = res; |
11411 | flag_N = res >> 8; |
11412 | FETCH_LONG(adr); |
11413 | PRE_IO |
11414 | WRITE_WORD_F(adr, res) |
11415 | POST_IO |
11416 | RET(16) |
11417 | } |
11418 | |
11419 | // MOVEW |
11420 | OPCODE(0x3EC8) |
11421 | { |
11422 | u32 adr, res; |
11423 | u32 src, dst; |
11424 | |
11425 | res = AREGu16((Opcode >> 0) & 7); |
11426 | flag_C = 0; |
11427 | flag_V = 0; |
11428 | flag_NotZ = res; |
11429 | flag_N = res >> 8; |
11430 | adr = AREG(7); |
11431 | AREG(7) += 2; |
11432 | PRE_IO |
11433 | WRITE_WORD_F(adr, res) |
11434 | POST_IO |
11435 | RET(8) |
11436 | } |
11437 | |
11438 | // MOVEW |
11439 | OPCODE(0x3F08) |
11440 | { |
11441 | u32 adr, res; |
11442 | u32 src, dst; |
11443 | |
11444 | res = AREGu16((Opcode >> 0) & 7); |
11445 | flag_C = 0; |
11446 | flag_V = 0; |
11447 | flag_NotZ = res; |
11448 | flag_N = res >> 8; |
11449 | adr = AREG(7) - 2; |
11450 | AREG(7) = adr; |
11451 | PRE_IO |
11452 | WRITE_WORD_F(adr, res) |
11453 | POST_IO |
11454 | RET(8) |
11455 | } |
11456 | |
11457 | // MOVEW |
11458 | OPCODE(0x3010) |
11459 | { |
11460 | u32 adr, res; |
11461 | u32 src, dst; |
11462 | |
11463 | adr = AREG((Opcode >> 0) & 7); |
11464 | PRE_IO |
11465 | READ_WORD_F(adr, res) |
11466 | flag_C = 0; |
11467 | flag_V = 0; |
11468 | flag_NotZ = res; |
11469 | flag_N = res >> 8; |
11470 | DREGu16((Opcode >> 9) & 7) = res; |
11471 | POST_IO |
11472 | RET(8) |
11473 | } |
11474 | |
11475 | // MOVEW |
11476 | OPCODE(0x3090) |
11477 | { |
11478 | u32 adr, res; |
11479 | u32 src, dst; |
11480 | |
11481 | adr = AREG((Opcode >> 0) & 7); |
11482 | PRE_IO |
11483 | READ_WORD_F(adr, res) |
11484 | flag_C = 0; |
11485 | flag_V = 0; |
11486 | flag_NotZ = res; |
11487 | flag_N = res >> 8; |
11488 | adr = AREG((Opcode >> 9) & 7); |
11489 | WRITE_WORD_F(adr, res) |
11490 | POST_IO |
11491 | RET(12) |
11492 | } |
11493 | |
11494 | // MOVEW |
11495 | OPCODE(0x30D0) |
11496 | { |
11497 | u32 adr, res; |
11498 | u32 src, dst; |
11499 | |
11500 | adr = AREG((Opcode >> 0) & 7); |
11501 | PRE_IO |
11502 | READ_WORD_F(adr, res) |
11503 | flag_C = 0; |
11504 | flag_V = 0; |
11505 | flag_NotZ = res; |
11506 | flag_N = res >> 8; |
11507 | adr = AREG((Opcode >> 9) & 7); |
11508 | AREG((Opcode >> 9) & 7) += 2; |
11509 | WRITE_WORD_F(adr, res) |
11510 | POST_IO |
11511 | RET(12) |
11512 | } |
11513 | |
11514 | // MOVEW |
11515 | OPCODE(0x3110) |
11516 | { |
11517 | u32 adr, res; |
11518 | u32 src, dst; |
11519 | |
11520 | adr = AREG((Opcode >> 0) & 7); |
11521 | PRE_IO |
11522 | READ_WORD_F(adr, res) |
11523 | flag_C = 0; |
11524 | flag_V = 0; |
11525 | flag_NotZ = res; |
11526 | flag_N = res >> 8; |
11527 | adr = AREG((Opcode >> 9) & 7) - 2; |
11528 | AREG((Opcode >> 9) & 7) = adr; |
11529 | WRITE_WORD_F(adr, res) |
11530 | POST_IO |
11531 | RET(12) |
11532 | } |
11533 | |
11534 | // MOVEW |
11535 | OPCODE(0x3150) |
11536 | { |
11537 | u32 adr, res; |
11538 | u32 src, dst; |
11539 | |
11540 | adr = AREG((Opcode >> 0) & 7); |
11541 | PRE_IO |
11542 | READ_WORD_F(adr, res) |
11543 | flag_C = 0; |
11544 | flag_V = 0; |
11545 | flag_NotZ = res; |
11546 | flag_N = res >> 8; |
11547 | FETCH_SWORD(adr); |
11548 | adr += AREG((Opcode >> 9) & 7); |
11549 | WRITE_WORD_F(adr, res) |
11550 | POST_IO |
11551 | RET(16) |
11552 | } |
11553 | |
11554 | // MOVEW |
11555 | OPCODE(0x3190) |
11556 | { |
11557 | u32 adr, res; |
11558 | u32 src, dst; |
11559 | |
11560 | adr = AREG((Opcode >> 0) & 7); |
11561 | PRE_IO |
11562 | READ_WORD_F(adr, res) |
11563 | flag_C = 0; |
11564 | flag_V = 0; |
11565 | flag_NotZ = res; |
11566 | flag_N = res >> 8; |
11567 | adr = AREG((Opcode >> 9) & 7); |
11568 | DECODE_EXT_WORD |
11569 | WRITE_WORD_F(adr, res) |
11570 | POST_IO |
11571 | RET(18) |
11572 | } |
11573 | |
11574 | // MOVEW |
11575 | OPCODE(0x31D0) |
11576 | { |
11577 | u32 adr, res; |
11578 | u32 src, dst; |
11579 | |
11580 | adr = AREG((Opcode >> 0) & 7); |
11581 | PRE_IO |
11582 | READ_WORD_F(adr, res) |
11583 | flag_C = 0; |
11584 | flag_V = 0; |
11585 | flag_NotZ = res; |
11586 | flag_N = res >> 8; |
11587 | FETCH_SWORD(adr); |
11588 | WRITE_WORD_F(adr, res) |
11589 | POST_IO |
11590 | RET(16) |
11591 | } |
11592 | |
11593 | // MOVEW |
11594 | OPCODE(0x33D0) |
11595 | { |
11596 | u32 adr, res; |
11597 | u32 src, dst; |
11598 | |
11599 | adr = AREG((Opcode >> 0) & 7); |
11600 | PRE_IO |
11601 | READ_WORD_F(adr, res) |
11602 | flag_C = 0; |
11603 | flag_V = 0; |
11604 | flag_NotZ = res; |
11605 | flag_N = res >> 8; |
11606 | FETCH_LONG(adr); |
11607 | WRITE_WORD_F(adr, res) |
11608 | POST_IO |
11609 | RET(20) |
11610 | } |
11611 | |
11612 | // MOVEW |
11613 | OPCODE(0x3ED0) |
11614 | { |
11615 | u32 adr, res; |
11616 | u32 src, dst; |
11617 | |
11618 | adr = AREG((Opcode >> 0) & 7); |
11619 | PRE_IO |
11620 | READ_WORD_F(adr, res) |
11621 | flag_C = 0; |
11622 | flag_V = 0; |
11623 | flag_NotZ = res; |
11624 | flag_N = res >> 8; |
11625 | adr = AREG(7); |
11626 | AREG(7) += 2; |
11627 | WRITE_WORD_F(adr, res) |
11628 | POST_IO |
11629 | RET(12) |
11630 | } |
11631 | |
11632 | // MOVEW |
11633 | OPCODE(0x3F10) |
11634 | { |
11635 | u32 adr, res; |
11636 | u32 src, dst; |
11637 | |
11638 | adr = AREG((Opcode >> 0) & 7); |
11639 | PRE_IO |
11640 | READ_WORD_F(adr, res) |
11641 | flag_C = 0; |
11642 | flag_V = 0; |
11643 | flag_NotZ = res; |
11644 | flag_N = res >> 8; |
11645 | adr = AREG(7) - 2; |
11646 | AREG(7) = adr; |
11647 | WRITE_WORD_F(adr, res) |
11648 | POST_IO |
11649 | RET(12) |
11650 | } |
11651 | |
11652 | // MOVEW |
11653 | OPCODE(0x3018) |
11654 | { |
11655 | u32 adr, res; |
11656 | u32 src, dst; |
11657 | |
11658 | adr = AREG((Opcode >> 0) & 7); |
11659 | AREG((Opcode >> 0) & 7) += 2; |
11660 | PRE_IO |
11661 | READ_WORD_F(adr, res) |
11662 | flag_C = 0; |
11663 | flag_V = 0; |
11664 | flag_NotZ = res; |
11665 | flag_N = res >> 8; |
11666 | DREGu16((Opcode >> 9) & 7) = res; |
11667 | POST_IO |
11668 | RET(8) |
11669 | } |
11670 | |
11671 | // MOVEW |
11672 | OPCODE(0x3098) |
11673 | { |
11674 | u32 adr, res; |
11675 | u32 src, dst; |
11676 | |
11677 | adr = AREG((Opcode >> 0) & 7); |
11678 | AREG((Opcode >> 0) & 7) += 2; |
11679 | PRE_IO |
11680 | READ_WORD_F(adr, res) |
11681 | flag_C = 0; |
11682 | flag_V = 0; |
11683 | flag_NotZ = res; |
11684 | flag_N = res >> 8; |
11685 | adr = AREG((Opcode >> 9) & 7); |
11686 | WRITE_WORD_F(adr, res) |
11687 | POST_IO |
11688 | RET(12) |
11689 | } |
11690 | |
11691 | // MOVEW |
11692 | OPCODE(0x30D8) |
11693 | { |
11694 | u32 adr, res; |
11695 | u32 src, dst; |
11696 | |
11697 | adr = AREG((Opcode >> 0) & 7); |
11698 | AREG((Opcode >> 0) & 7) += 2; |
11699 | PRE_IO |
11700 | READ_WORD_F(adr, res) |
11701 | flag_C = 0; |
11702 | flag_V = 0; |
11703 | flag_NotZ = res; |
11704 | flag_N = res >> 8; |
11705 | adr = AREG((Opcode >> 9) & 7); |
11706 | AREG((Opcode >> 9) & 7) += 2; |
11707 | WRITE_WORD_F(adr, res) |
11708 | POST_IO |
11709 | RET(12) |
11710 | } |
11711 | |
11712 | // MOVEW |
11713 | OPCODE(0x3118) |
11714 | { |
11715 | u32 adr, res; |
11716 | u32 src, dst; |
11717 | |
11718 | adr = AREG((Opcode >> 0) & 7); |
11719 | AREG((Opcode >> 0) & 7) += 2; |
11720 | PRE_IO |
11721 | READ_WORD_F(adr, res) |
11722 | flag_C = 0; |
11723 | flag_V = 0; |
11724 | flag_NotZ = res; |
11725 | flag_N = res >> 8; |
11726 | adr = AREG((Opcode >> 9) & 7) - 2; |
11727 | AREG((Opcode >> 9) & 7) = adr; |
11728 | WRITE_WORD_F(adr, res) |
11729 | POST_IO |
11730 | RET(12) |
11731 | } |
11732 | |
11733 | // MOVEW |
11734 | OPCODE(0x3158) |
11735 | { |
11736 | u32 adr, res; |
11737 | u32 src, dst; |
11738 | |
11739 | adr = AREG((Opcode >> 0) & 7); |
11740 | AREG((Opcode >> 0) & 7) += 2; |
11741 | PRE_IO |
11742 | READ_WORD_F(adr, res) |
11743 | flag_C = 0; |
11744 | flag_V = 0; |
11745 | flag_NotZ = res; |
11746 | flag_N = res >> 8; |
11747 | FETCH_SWORD(adr); |
11748 | adr += AREG((Opcode >> 9) & 7); |
11749 | WRITE_WORD_F(adr, res) |
11750 | POST_IO |
11751 | RET(16) |
11752 | } |
11753 | |
11754 | // MOVEW |
11755 | OPCODE(0x3198) |
11756 | { |
11757 | u32 adr, res; |
11758 | u32 src, dst; |
11759 | |
11760 | adr = AREG((Opcode >> 0) & 7); |
11761 | AREG((Opcode >> 0) & 7) += 2; |
11762 | PRE_IO |
11763 | READ_WORD_F(adr, res) |
11764 | flag_C = 0; |
11765 | flag_V = 0; |
11766 | flag_NotZ = res; |
11767 | flag_N = res >> 8; |
11768 | adr = AREG((Opcode >> 9) & 7); |
11769 | DECODE_EXT_WORD |
11770 | WRITE_WORD_F(adr, res) |
11771 | POST_IO |
11772 | RET(18) |
11773 | } |
11774 | |
11775 | // MOVEW |
11776 | OPCODE(0x31D8) |
11777 | { |
11778 | u32 adr, res; |
11779 | u32 src, dst; |
11780 | |
11781 | adr = AREG((Opcode >> 0) & 7); |
11782 | AREG((Opcode >> 0) & 7) += 2; |
11783 | PRE_IO |
11784 | READ_WORD_F(adr, res) |
11785 | flag_C = 0; |
11786 | flag_V = 0; |
11787 | flag_NotZ = res; |
11788 | flag_N = res >> 8; |
11789 | FETCH_SWORD(adr); |
11790 | WRITE_WORD_F(adr, res) |
11791 | POST_IO |
11792 | RET(16) |
11793 | } |
11794 | |
11795 | // MOVEW |
11796 | OPCODE(0x33D8) |
11797 | { |
11798 | u32 adr, res; |
11799 | u32 src, dst; |
11800 | |
11801 | adr = AREG((Opcode >> 0) & 7); |
11802 | AREG((Opcode >> 0) & 7) += 2; |
11803 | PRE_IO |
11804 | READ_WORD_F(adr, res) |
11805 | flag_C = 0; |
11806 | flag_V = 0; |
11807 | flag_NotZ = res; |
11808 | flag_N = res >> 8; |
11809 | FETCH_LONG(adr); |
11810 | WRITE_WORD_F(adr, res) |
11811 | POST_IO |
11812 | RET(20) |
11813 | } |
11814 | |
11815 | // MOVEW |
11816 | OPCODE(0x3ED8) |
11817 | { |
11818 | u32 adr, res; |
11819 | u32 src, dst; |
11820 | |
11821 | adr = AREG((Opcode >> 0) & 7); |
11822 | AREG((Opcode >> 0) & 7) += 2; |
11823 | PRE_IO |
11824 | READ_WORD_F(adr, res) |
11825 | flag_C = 0; |
11826 | flag_V = 0; |
11827 | flag_NotZ = res; |
11828 | flag_N = res >> 8; |
11829 | adr = AREG(7); |
11830 | AREG(7) += 2; |
11831 | WRITE_WORD_F(adr, res) |
11832 | POST_IO |
11833 | RET(12) |
11834 | } |
11835 | |
11836 | // MOVEW |
11837 | OPCODE(0x3F18) |
11838 | { |
11839 | u32 adr, res; |
11840 | u32 src, dst; |
11841 | |
11842 | adr = AREG((Opcode >> 0) & 7); |
11843 | AREG((Opcode >> 0) & 7) += 2; |
11844 | PRE_IO |
11845 | READ_WORD_F(adr, res) |
11846 | flag_C = 0; |
11847 | flag_V = 0; |
11848 | flag_NotZ = res; |
11849 | flag_N = res >> 8; |
11850 | adr = AREG(7) - 2; |
11851 | AREG(7) = adr; |
11852 | WRITE_WORD_F(adr, res) |
11853 | POST_IO |
11854 | RET(12) |
11855 | } |
11856 | |
11857 | // MOVEW |
11858 | OPCODE(0x3020) |
11859 | { |
11860 | u32 adr, res; |
11861 | u32 src, dst; |
11862 | |
11863 | adr = AREG((Opcode >> 0) & 7) - 2; |
11864 | AREG((Opcode >> 0) & 7) = adr; |
11865 | PRE_IO |
11866 | READ_WORD_F(adr, res) |
11867 | flag_C = 0; |
11868 | flag_V = 0; |
11869 | flag_NotZ = res; |
11870 | flag_N = res >> 8; |
11871 | DREGu16((Opcode >> 9) & 7) = res; |
11872 | POST_IO |
11873 | RET(10) |
11874 | } |
11875 | |
11876 | // MOVEW |
11877 | OPCODE(0x30A0) |
11878 | { |
11879 | u32 adr, res; |
11880 | u32 src, dst; |
11881 | |
11882 | adr = AREG((Opcode >> 0) & 7) - 2; |
11883 | AREG((Opcode >> 0) & 7) = adr; |
11884 | PRE_IO |
11885 | READ_WORD_F(adr, res) |
11886 | flag_C = 0; |
11887 | flag_V = 0; |
11888 | flag_NotZ = res; |
11889 | flag_N = res >> 8; |
11890 | adr = AREG((Opcode >> 9) & 7); |
11891 | WRITE_WORD_F(adr, res) |
11892 | POST_IO |
11893 | RET(14) |
11894 | } |
11895 | |
11896 | // MOVEW |
11897 | OPCODE(0x30E0) |
11898 | { |
11899 | u32 adr, res; |
11900 | u32 src, dst; |
11901 | |
11902 | adr = AREG((Opcode >> 0) & 7) - 2; |
11903 | AREG((Opcode >> 0) & 7) = adr; |
11904 | PRE_IO |
11905 | READ_WORD_F(adr, res) |
11906 | flag_C = 0; |
11907 | flag_V = 0; |
11908 | flag_NotZ = res; |
11909 | flag_N = res >> 8; |
11910 | adr = AREG((Opcode >> 9) & 7); |
11911 | AREG((Opcode >> 9) & 7) += 2; |
11912 | WRITE_WORD_F(adr, res) |
11913 | POST_IO |
11914 | RET(14) |
11915 | } |
11916 | |
11917 | // MOVEW |
11918 | OPCODE(0x3120) |
11919 | { |
11920 | u32 adr, res; |
11921 | u32 src, dst; |
11922 | |
11923 | adr = AREG((Opcode >> 0) & 7) - 2; |
11924 | AREG((Opcode >> 0) & 7) = adr; |
11925 | PRE_IO |
11926 | READ_WORD_F(adr, res) |
11927 | flag_C = 0; |
11928 | flag_V = 0; |
11929 | flag_NotZ = res; |
11930 | flag_N = res >> 8; |
11931 | adr = AREG((Opcode >> 9) & 7) - 2; |
11932 | AREG((Opcode >> 9) & 7) = adr; |
11933 | WRITE_WORD_F(adr, res) |
11934 | POST_IO |
11935 | RET(14) |
11936 | } |
11937 | |
11938 | // MOVEW |
11939 | OPCODE(0x3160) |
11940 | { |
11941 | u32 adr, res; |
11942 | u32 src, dst; |
11943 | |
11944 | adr = AREG((Opcode >> 0) & 7) - 2; |
11945 | AREG((Opcode >> 0) & 7) = adr; |
11946 | PRE_IO |
11947 | READ_WORD_F(adr, res) |
11948 | flag_C = 0; |
11949 | flag_V = 0; |
11950 | flag_NotZ = res; |
11951 | flag_N = res >> 8; |
11952 | FETCH_SWORD(adr); |
11953 | adr += AREG((Opcode >> 9) & 7); |
11954 | WRITE_WORD_F(adr, res) |
11955 | POST_IO |
11956 | RET(18) |
11957 | } |
11958 | |
11959 | // MOVEW |
11960 | OPCODE(0x31A0) |
11961 | { |
11962 | u32 adr, res; |
11963 | u32 src, dst; |
11964 | |
11965 | adr = AREG((Opcode >> 0) & 7) - 2; |
11966 | AREG((Opcode >> 0) & 7) = adr; |
11967 | PRE_IO |
11968 | READ_WORD_F(adr, res) |
11969 | flag_C = 0; |
11970 | flag_V = 0; |
11971 | flag_NotZ = res; |
11972 | flag_N = res >> 8; |
11973 | adr = AREG((Opcode >> 9) & 7); |
11974 | DECODE_EXT_WORD |
11975 | WRITE_WORD_F(adr, res) |
11976 | POST_IO |
11977 | RET(20) |
11978 | } |
11979 | |
11980 | // MOVEW |
11981 | OPCODE(0x31E0) |
11982 | { |
11983 | u32 adr, res; |
11984 | u32 src, dst; |
11985 | |
11986 | adr = AREG((Opcode >> 0) & 7) - 2; |
11987 | AREG((Opcode >> 0) & 7) = adr; |
11988 | PRE_IO |
11989 | READ_WORD_F(adr, res) |
11990 | flag_C = 0; |
11991 | flag_V = 0; |
11992 | flag_NotZ = res; |
11993 | flag_N = res >> 8; |
11994 | FETCH_SWORD(adr); |
11995 | WRITE_WORD_F(adr, res) |
11996 | POST_IO |
11997 | RET(18) |
11998 | } |
11999 | |
12000 | // MOVEW |
12001 | OPCODE(0x33E0) |
12002 | { |
12003 | u32 adr, res; |
12004 | u32 src, dst; |
12005 | |
12006 | adr = AREG((Opcode >> 0) & 7) - 2; |
12007 | AREG((Opcode >> 0) & 7) = adr; |
12008 | PRE_IO |
12009 | READ_WORD_F(adr, res) |
12010 | flag_C = 0; |
12011 | flag_V = 0; |
12012 | flag_NotZ = res; |
12013 | flag_N = res >> 8; |
12014 | FETCH_LONG(adr); |
12015 | WRITE_WORD_F(adr, res) |
12016 | POST_IO |
12017 | RET(22) |
12018 | } |
12019 | |
12020 | // MOVEW |
12021 | OPCODE(0x3EE0) |
12022 | { |
12023 | u32 adr, res; |
12024 | u32 src, dst; |
12025 | |
12026 | adr = AREG((Opcode >> 0) & 7) - 2; |
12027 | AREG((Opcode >> 0) & 7) = adr; |
12028 | PRE_IO |
12029 | READ_WORD_F(adr, res) |
12030 | flag_C = 0; |
12031 | flag_V = 0; |
12032 | flag_NotZ = res; |
12033 | flag_N = res >> 8; |
12034 | adr = AREG(7); |
12035 | AREG(7) += 2; |
12036 | WRITE_WORD_F(adr, res) |
12037 | POST_IO |
12038 | RET(14) |
12039 | } |
12040 | |
12041 | // MOVEW |
12042 | OPCODE(0x3F20) |
12043 | { |
12044 | u32 adr, res; |
12045 | u32 src, dst; |
12046 | |
12047 | adr = AREG((Opcode >> 0) & 7) - 2; |
12048 | AREG((Opcode >> 0) & 7) = adr; |
12049 | PRE_IO |
12050 | READ_WORD_F(adr, res) |
12051 | flag_C = 0; |
12052 | flag_V = 0; |
12053 | flag_NotZ = res; |
12054 | flag_N = res >> 8; |
12055 | adr = AREG(7) - 2; |
12056 | AREG(7) = adr; |
12057 | WRITE_WORD_F(adr, res) |
12058 | POST_IO |
12059 | RET(14) |
12060 | } |
12061 | |
12062 | // MOVEW |
12063 | OPCODE(0x3028) |
12064 | { |
12065 | u32 adr, res; |
12066 | u32 src, dst; |
12067 | |
12068 | FETCH_SWORD(adr); |
12069 | adr += AREG((Opcode >> 0) & 7); |
12070 | PRE_IO |
12071 | READ_WORD_F(adr, res) |
12072 | flag_C = 0; |
12073 | flag_V = 0; |
12074 | flag_NotZ = res; |
12075 | flag_N = res >> 8; |
12076 | DREGu16((Opcode >> 9) & 7) = res; |
12077 | POST_IO |
12078 | RET(12) |
12079 | } |
12080 | |
12081 | // MOVEW |
12082 | OPCODE(0x30A8) |
12083 | { |
12084 | u32 adr, res; |
12085 | u32 src, dst; |
12086 | |
12087 | FETCH_SWORD(adr); |
12088 | adr += AREG((Opcode >> 0) & 7); |
12089 | PRE_IO |
12090 | READ_WORD_F(adr, res) |
12091 | flag_C = 0; |
12092 | flag_V = 0; |
12093 | flag_NotZ = res; |
12094 | flag_N = res >> 8; |
12095 | adr = AREG((Opcode >> 9) & 7); |
12096 | WRITE_WORD_F(adr, res) |
12097 | POST_IO |
12098 | RET(16) |
12099 | } |
12100 | |
12101 | // MOVEW |
12102 | OPCODE(0x30E8) |
12103 | { |
12104 | u32 adr, res; |
12105 | u32 src, dst; |
12106 | |
12107 | FETCH_SWORD(adr); |
12108 | adr += AREG((Opcode >> 0) & 7); |
12109 | PRE_IO |
12110 | READ_WORD_F(adr, res) |
12111 | flag_C = 0; |
12112 | flag_V = 0; |
12113 | flag_NotZ = res; |
12114 | flag_N = res >> 8; |
12115 | adr = AREG((Opcode >> 9) & 7); |
12116 | AREG((Opcode >> 9) & 7) += 2; |
12117 | WRITE_WORD_F(adr, res) |
12118 | POST_IO |
12119 | RET(16) |
12120 | } |
12121 | |
12122 | // MOVEW |
12123 | OPCODE(0x3128) |
12124 | { |
12125 | u32 adr, res; |
12126 | u32 src, dst; |
12127 | |
12128 | FETCH_SWORD(adr); |
12129 | adr += AREG((Opcode >> 0) & 7); |
12130 | PRE_IO |
12131 | READ_WORD_F(adr, res) |
12132 | flag_C = 0; |
12133 | flag_V = 0; |
12134 | flag_NotZ = res; |
12135 | flag_N = res >> 8; |
12136 | adr = AREG((Opcode >> 9) & 7) - 2; |
12137 | AREG((Opcode >> 9) & 7) = adr; |
12138 | WRITE_WORD_F(adr, res) |
12139 | POST_IO |
12140 | RET(16) |
12141 | } |
12142 | |
12143 | // MOVEW |
12144 | OPCODE(0x3168) |
12145 | { |
12146 | u32 adr, res; |
12147 | u32 src, dst; |
12148 | |
12149 | FETCH_SWORD(adr); |
12150 | adr += AREG((Opcode >> 0) & 7); |
12151 | PRE_IO |
12152 | READ_WORD_F(adr, res) |
12153 | flag_C = 0; |
12154 | flag_V = 0; |
12155 | flag_NotZ = res; |
12156 | flag_N = res >> 8; |
12157 | FETCH_SWORD(adr); |
12158 | adr += AREG((Opcode >> 9) & 7); |
12159 | WRITE_WORD_F(adr, res) |
12160 | POST_IO |
12161 | RET(20) |
12162 | } |
12163 | |
12164 | // MOVEW |
12165 | OPCODE(0x31A8) |
12166 | { |
12167 | u32 adr, res; |
12168 | u32 src, dst; |
12169 | |
12170 | FETCH_SWORD(adr); |
12171 | adr += AREG((Opcode >> 0) & 7); |
12172 | PRE_IO |
12173 | READ_WORD_F(adr, res) |
12174 | flag_C = 0; |
12175 | flag_V = 0; |
12176 | flag_NotZ = res; |
12177 | flag_N = res >> 8; |
12178 | adr = AREG((Opcode >> 9) & 7); |
12179 | DECODE_EXT_WORD |
12180 | WRITE_WORD_F(adr, res) |
12181 | POST_IO |
12182 | RET(22) |
12183 | } |
12184 | |
12185 | // MOVEW |
12186 | OPCODE(0x31E8) |
12187 | { |
12188 | u32 adr, res; |
12189 | u32 src, dst; |
12190 | |
12191 | FETCH_SWORD(adr); |
12192 | adr += AREG((Opcode >> 0) & 7); |
12193 | PRE_IO |
12194 | READ_WORD_F(adr, res) |
12195 | flag_C = 0; |
12196 | flag_V = 0; |
12197 | flag_NotZ = res; |
12198 | flag_N = res >> 8; |
12199 | FETCH_SWORD(adr); |
12200 | WRITE_WORD_F(adr, res) |
12201 | POST_IO |
12202 | RET(20) |
12203 | } |
12204 | |
12205 | // MOVEW |
12206 | OPCODE(0x33E8) |
12207 | { |
12208 | u32 adr, res; |
12209 | u32 src, dst; |
12210 | |
12211 | FETCH_SWORD(adr); |
12212 | adr += AREG((Opcode >> 0) & 7); |
12213 | PRE_IO |
12214 | READ_WORD_F(adr, res) |
12215 | flag_C = 0; |
12216 | flag_V = 0; |
12217 | flag_NotZ = res; |
12218 | flag_N = res >> 8; |
12219 | FETCH_LONG(adr); |
12220 | WRITE_WORD_F(adr, res) |
12221 | POST_IO |
12222 | RET(24) |
12223 | } |
12224 | |
12225 | // MOVEW |
12226 | OPCODE(0x3EE8) |
12227 | { |
12228 | u32 adr, res; |
12229 | u32 src, dst; |
12230 | |
12231 | FETCH_SWORD(adr); |
12232 | adr += AREG((Opcode >> 0) & 7); |
12233 | PRE_IO |
12234 | READ_WORD_F(adr, res) |
12235 | flag_C = 0; |
12236 | flag_V = 0; |
12237 | flag_NotZ = res; |
12238 | flag_N = res >> 8; |
12239 | adr = AREG(7); |
12240 | AREG(7) += 2; |
12241 | WRITE_WORD_F(adr, res) |
12242 | POST_IO |
12243 | RET(16) |
12244 | } |
12245 | |
12246 | // MOVEW |
12247 | OPCODE(0x3F28) |
12248 | { |
12249 | u32 adr, res; |
12250 | u32 src, dst; |
12251 | |
12252 | FETCH_SWORD(adr); |
12253 | adr += AREG((Opcode >> 0) & 7); |
12254 | PRE_IO |
12255 | READ_WORD_F(adr, res) |
12256 | flag_C = 0; |
12257 | flag_V = 0; |
12258 | flag_NotZ = res; |
12259 | flag_N = res >> 8; |
12260 | adr = AREG(7) - 2; |
12261 | AREG(7) = adr; |
12262 | WRITE_WORD_F(adr, res) |
12263 | POST_IO |
12264 | RET(16) |
12265 | } |
12266 | |
12267 | // MOVEW |
12268 | OPCODE(0x3030) |
12269 | { |
12270 | u32 adr, res; |
12271 | u32 src, dst; |
12272 | |
12273 | adr = AREG((Opcode >> 0) & 7); |
12274 | DECODE_EXT_WORD |
12275 | PRE_IO |
12276 | READ_WORD_F(adr, res) |
12277 | flag_C = 0; |
12278 | flag_V = 0; |
12279 | flag_NotZ = res; |
12280 | flag_N = res >> 8; |
12281 | DREGu16((Opcode >> 9) & 7) = res; |
12282 | POST_IO |
12283 | RET(14) |
12284 | } |
12285 | |
12286 | // MOVEW |
12287 | OPCODE(0x30B0) |
12288 | { |
12289 | u32 adr, res; |
12290 | u32 src, dst; |
12291 | |
12292 | adr = AREG((Opcode >> 0) & 7); |
12293 | DECODE_EXT_WORD |
12294 | PRE_IO |
12295 | READ_WORD_F(adr, res) |
12296 | flag_C = 0; |
12297 | flag_V = 0; |
12298 | flag_NotZ = res; |
12299 | flag_N = res >> 8; |
12300 | adr = AREG((Opcode >> 9) & 7); |
12301 | WRITE_WORD_F(adr, res) |
12302 | POST_IO |
12303 | RET(18) |
12304 | } |
12305 | |
12306 | // MOVEW |
12307 | OPCODE(0x30F0) |
12308 | { |
12309 | u32 adr, res; |
12310 | u32 src, dst; |
12311 | |
12312 | adr = AREG((Opcode >> 0) & 7); |
12313 | DECODE_EXT_WORD |
12314 | PRE_IO |
12315 | READ_WORD_F(adr, res) |
12316 | flag_C = 0; |
12317 | flag_V = 0; |
12318 | flag_NotZ = res; |
12319 | flag_N = res >> 8; |
12320 | adr = AREG((Opcode >> 9) & 7); |
12321 | AREG((Opcode >> 9) & 7) += 2; |
12322 | WRITE_WORD_F(adr, res) |
12323 | POST_IO |
12324 | RET(18) |
12325 | } |
12326 | |
12327 | // MOVEW |
12328 | OPCODE(0x3130) |
12329 | { |
12330 | u32 adr, res; |
12331 | u32 src, dst; |
12332 | |
12333 | adr = AREG((Opcode >> 0) & 7); |
12334 | DECODE_EXT_WORD |
12335 | PRE_IO |
12336 | READ_WORD_F(adr, res) |
12337 | flag_C = 0; |
12338 | flag_V = 0; |
12339 | flag_NotZ = res; |
12340 | flag_N = res >> 8; |
12341 | adr = AREG((Opcode >> 9) & 7) - 2; |
12342 | AREG((Opcode >> 9) & 7) = adr; |
12343 | WRITE_WORD_F(adr, res) |
12344 | POST_IO |
12345 | RET(18) |
12346 | } |
12347 | |
12348 | // MOVEW |
12349 | OPCODE(0x3170) |
12350 | { |
12351 | u32 adr, res; |
12352 | u32 src, dst; |
12353 | |
12354 | adr = AREG((Opcode >> 0) & 7); |
12355 | DECODE_EXT_WORD |
12356 | PRE_IO |
12357 | READ_WORD_F(adr, res) |
12358 | flag_C = 0; |
12359 | flag_V = 0; |
12360 | flag_NotZ = res; |
12361 | flag_N = res >> 8; |
12362 | FETCH_SWORD(adr); |
12363 | adr += AREG((Opcode >> 9) & 7); |
12364 | WRITE_WORD_F(adr, res) |
12365 | POST_IO |
12366 | RET(22) |
12367 | } |
12368 | |
12369 | // MOVEW |
12370 | OPCODE(0x31B0) |
12371 | { |
12372 | u32 adr, res; |
12373 | u32 src, dst; |
12374 | |
12375 | adr = AREG((Opcode >> 0) & 7); |
12376 | DECODE_EXT_WORD |
12377 | PRE_IO |
12378 | READ_WORD_F(adr, res) |
12379 | flag_C = 0; |
12380 | flag_V = 0; |
12381 | flag_NotZ = res; |
12382 | flag_N = res >> 8; |
12383 | adr = AREG((Opcode >> 9) & 7); |
12384 | DECODE_EXT_WORD |
12385 | WRITE_WORD_F(adr, res) |
12386 | POST_IO |
12387 | RET(24) |
12388 | } |
12389 | |
12390 | // MOVEW |
12391 | OPCODE(0x31F0) |
12392 | { |
12393 | u32 adr, res; |
12394 | u32 src, dst; |
12395 | |
12396 | adr = AREG((Opcode >> 0) & 7); |
12397 | DECODE_EXT_WORD |
12398 | PRE_IO |
12399 | READ_WORD_F(adr, res) |
12400 | flag_C = 0; |
12401 | flag_V = 0; |
12402 | flag_NotZ = res; |
12403 | flag_N = res >> 8; |
12404 | FETCH_SWORD(adr); |
12405 | WRITE_WORD_F(adr, res) |
12406 | POST_IO |
12407 | RET(22) |
12408 | } |
12409 | |
12410 | // MOVEW |
12411 | OPCODE(0x33F0) |
12412 | { |
12413 | u32 adr, res; |
12414 | u32 src, dst; |
12415 | |
12416 | adr = AREG((Opcode >> 0) & 7); |
12417 | DECODE_EXT_WORD |
12418 | PRE_IO |
12419 | READ_WORD_F(adr, res) |
12420 | flag_C = 0; |
12421 | flag_V = 0; |
12422 | flag_NotZ = res; |
12423 | flag_N = res >> 8; |
12424 | FETCH_LONG(adr); |
12425 | WRITE_WORD_F(adr, res) |
12426 | POST_IO |
12427 | RET(26) |
12428 | } |
12429 | |
12430 | // MOVEW |
12431 | OPCODE(0x3EF0) |
12432 | { |
12433 | u32 adr, res; |
12434 | u32 src, dst; |
12435 | |
12436 | adr = AREG((Opcode >> 0) & 7); |
12437 | DECODE_EXT_WORD |
12438 | PRE_IO |
12439 | READ_WORD_F(adr, res) |
12440 | flag_C = 0; |
12441 | flag_V = 0; |
12442 | flag_NotZ = res; |
12443 | flag_N = res >> 8; |
12444 | adr = AREG(7); |
12445 | AREG(7) += 2; |
12446 | WRITE_WORD_F(adr, res) |
12447 | POST_IO |
12448 | RET(18) |
12449 | } |
12450 | |
12451 | // MOVEW |
12452 | OPCODE(0x3F30) |
12453 | { |
12454 | u32 adr, res; |
12455 | u32 src, dst; |
12456 | |
12457 | adr = AREG((Opcode >> 0) & 7); |
12458 | DECODE_EXT_WORD |
12459 | PRE_IO |
12460 | READ_WORD_F(adr, res) |
12461 | flag_C = 0; |
12462 | flag_V = 0; |
12463 | flag_NotZ = res; |
12464 | flag_N = res >> 8; |
12465 | adr = AREG(7) - 2; |
12466 | AREG(7) = adr; |
12467 | WRITE_WORD_F(adr, res) |
12468 | POST_IO |
12469 | RET(18) |
12470 | } |
12471 | |
12472 | // MOVEW |
12473 | OPCODE(0x3038) |
12474 | { |
12475 | u32 adr, res; |
12476 | u32 src, dst; |
12477 | |
12478 | FETCH_SWORD(adr); |
12479 | PRE_IO |
12480 | READ_WORD_F(adr, res) |
12481 | flag_C = 0; |
12482 | flag_V = 0; |
12483 | flag_NotZ = res; |
12484 | flag_N = res >> 8; |
12485 | DREGu16((Opcode >> 9) & 7) = res; |
12486 | POST_IO |
12487 | RET(12) |
12488 | } |
12489 | |
12490 | // MOVEW |
12491 | OPCODE(0x30B8) |
12492 | { |
12493 | u32 adr, res; |
12494 | u32 src, dst; |
12495 | |
12496 | FETCH_SWORD(adr); |
12497 | PRE_IO |
12498 | READ_WORD_F(adr, res) |
12499 | flag_C = 0; |
12500 | flag_V = 0; |
12501 | flag_NotZ = res; |
12502 | flag_N = res >> 8; |
12503 | adr = AREG((Opcode >> 9) & 7); |
12504 | WRITE_WORD_F(adr, res) |
12505 | POST_IO |
12506 | RET(16) |
12507 | } |
12508 | |
12509 | // MOVEW |
12510 | OPCODE(0x30F8) |
12511 | { |
12512 | u32 adr, res; |
12513 | u32 src, dst; |
12514 | |
12515 | FETCH_SWORD(adr); |
12516 | PRE_IO |
12517 | READ_WORD_F(adr, res) |
12518 | flag_C = 0; |
12519 | flag_V = 0; |
12520 | flag_NotZ = res; |
12521 | flag_N = res >> 8; |
12522 | adr = AREG((Opcode >> 9) & 7); |
12523 | AREG((Opcode >> 9) & 7) += 2; |
12524 | WRITE_WORD_F(adr, res) |
12525 | POST_IO |
12526 | RET(16) |
12527 | } |
12528 | |
12529 | // MOVEW |
12530 | OPCODE(0x3138) |
12531 | { |
12532 | u32 adr, res; |
12533 | u32 src, dst; |
12534 | |
12535 | FETCH_SWORD(adr); |
12536 | PRE_IO |
12537 | READ_WORD_F(adr, res) |
12538 | flag_C = 0; |
12539 | flag_V = 0; |
12540 | flag_NotZ = res; |
12541 | flag_N = res >> 8; |
12542 | adr = AREG((Opcode >> 9) & 7) - 2; |
12543 | AREG((Opcode >> 9) & 7) = adr; |
12544 | WRITE_WORD_F(adr, res) |
12545 | POST_IO |
12546 | RET(16) |
12547 | } |
12548 | |
12549 | // MOVEW |
12550 | OPCODE(0x3178) |
12551 | { |
12552 | u32 adr, res; |
12553 | u32 src, dst; |
12554 | |
12555 | FETCH_SWORD(adr); |
12556 | PRE_IO |
12557 | READ_WORD_F(adr, res) |
12558 | flag_C = 0; |
12559 | flag_V = 0; |
12560 | flag_NotZ = res; |
12561 | flag_N = res >> 8; |
12562 | FETCH_SWORD(adr); |
12563 | adr += AREG((Opcode >> 9) & 7); |
12564 | WRITE_WORD_F(adr, res) |
12565 | POST_IO |
12566 | RET(20) |
12567 | } |
12568 | |
12569 | // MOVEW |
12570 | OPCODE(0x31B8) |
12571 | { |
12572 | u32 adr, res; |
12573 | u32 src, dst; |
12574 | |
12575 | FETCH_SWORD(adr); |
12576 | PRE_IO |
12577 | READ_WORD_F(adr, res) |
12578 | flag_C = 0; |
12579 | flag_V = 0; |
12580 | flag_NotZ = res; |
12581 | flag_N = res >> 8; |
12582 | adr = AREG((Opcode >> 9) & 7); |
12583 | DECODE_EXT_WORD |
12584 | WRITE_WORD_F(adr, res) |
12585 | POST_IO |
12586 | RET(22) |
12587 | } |
12588 | |
12589 | // MOVEW |
12590 | OPCODE(0x31F8) |
12591 | { |
12592 | u32 adr, res; |
12593 | u32 src, dst; |
12594 | |
12595 | FETCH_SWORD(adr); |
12596 | PRE_IO |
12597 | READ_WORD_F(adr, res) |
12598 | flag_C = 0; |
12599 | flag_V = 0; |
12600 | flag_NotZ = res; |
12601 | flag_N = res >> 8; |
12602 | FETCH_SWORD(adr); |
12603 | WRITE_WORD_F(adr, res) |
12604 | POST_IO |
12605 | RET(20) |
12606 | } |
12607 | |
12608 | // MOVEW |
12609 | OPCODE(0x33F8) |
12610 | { |
12611 | u32 adr, res; |
12612 | u32 src, dst; |
12613 | |
12614 | FETCH_SWORD(adr); |
12615 | PRE_IO |
12616 | READ_WORD_F(adr, res) |
12617 | flag_C = 0; |
12618 | flag_V = 0; |
12619 | flag_NotZ = res; |
12620 | flag_N = res >> 8; |
12621 | FETCH_LONG(adr); |
12622 | WRITE_WORD_F(adr, res) |
12623 | POST_IO |
12624 | RET(24) |
12625 | } |
12626 | |
12627 | // MOVEW |
12628 | OPCODE(0x3EF8) |
12629 | { |
12630 | u32 adr, res; |
12631 | u32 src, dst; |
12632 | |
12633 | FETCH_SWORD(adr); |
12634 | PRE_IO |
12635 | READ_WORD_F(adr, res) |
12636 | flag_C = 0; |
12637 | flag_V = 0; |
12638 | flag_NotZ = res; |
12639 | flag_N = res >> 8; |
12640 | adr = AREG(7); |
12641 | AREG(7) += 2; |
12642 | WRITE_WORD_F(adr, res) |
12643 | POST_IO |
12644 | RET(16) |
12645 | } |
12646 | |
12647 | // MOVEW |
12648 | OPCODE(0x3F38) |
12649 | { |
12650 | u32 adr, res; |
12651 | u32 src, dst; |
12652 | |
12653 | FETCH_SWORD(adr); |
12654 | PRE_IO |
12655 | READ_WORD_F(adr, res) |
12656 | flag_C = 0; |
12657 | flag_V = 0; |
12658 | flag_NotZ = res; |
12659 | flag_N = res >> 8; |
12660 | adr = AREG(7) - 2; |
12661 | AREG(7) = adr; |
12662 | WRITE_WORD_F(adr, res) |
12663 | POST_IO |
12664 | RET(16) |
12665 | } |
12666 | |
12667 | // MOVEW |
12668 | OPCODE(0x3039) |
12669 | { |
12670 | u32 adr, res; |
12671 | u32 src, dst; |
12672 | |
12673 | FETCH_LONG(adr); |
12674 | PRE_IO |
12675 | READ_WORD_F(adr, res) |
12676 | flag_C = 0; |
12677 | flag_V = 0; |
12678 | flag_NotZ = res; |
12679 | flag_N = res >> 8; |
12680 | DREGu16((Opcode >> 9) & 7) = res; |
12681 | POST_IO |
12682 | RET(16) |
12683 | } |
12684 | |
12685 | // MOVEW |
12686 | OPCODE(0x30B9) |
12687 | { |
12688 | u32 adr, res; |
12689 | u32 src, dst; |
12690 | |
12691 | FETCH_LONG(adr); |
12692 | PRE_IO |
12693 | READ_WORD_F(adr, res) |
12694 | flag_C = 0; |
12695 | flag_V = 0; |
12696 | flag_NotZ = res; |
12697 | flag_N = res >> 8; |
12698 | adr = AREG((Opcode >> 9) & 7); |
12699 | WRITE_WORD_F(adr, res) |
12700 | POST_IO |
12701 | RET(20) |
12702 | } |
12703 | |
12704 | // MOVEW |
12705 | OPCODE(0x30F9) |
12706 | { |
12707 | u32 adr, res; |
12708 | u32 src, dst; |
12709 | |
12710 | FETCH_LONG(adr); |
12711 | PRE_IO |
12712 | READ_WORD_F(adr, res) |
12713 | flag_C = 0; |
12714 | flag_V = 0; |
12715 | flag_NotZ = res; |
12716 | flag_N = res >> 8; |
12717 | adr = AREG((Opcode >> 9) & 7); |
12718 | AREG((Opcode >> 9) & 7) += 2; |
12719 | WRITE_WORD_F(adr, res) |
12720 | POST_IO |
12721 | RET(20) |
12722 | } |
12723 | |
12724 | // MOVEW |
12725 | OPCODE(0x3139) |
12726 | { |
12727 | u32 adr, res; |
12728 | u32 src, dst; |
12729 | |
12730 | FETCH_LONG(adr); |
12731 | PRE_IO |
12732 | READ_WORD_F(adr, res) |
12733 | flag_C = 0; |
12734 | flag_V = 0; |
12735 | flag_NotZ = res; |
12736 | flag_N = res >> 8; |
12737 | adr = AREG((Opcode >> 9) & 7) - 2; |
12738 | AREG((Opcode >> 9) & 7) = adr; |
12739 | WRITE_WORD_F(adr, res) |
12740 | POST_IO |
12741 | RET(20) |
12742 | } |
12743 | |
12744 | // MOVEW |
12745 | OPCODE(0x3179) |
12746 | { |
12747 | u32 adr, res; |
12748 | u32 src, dst; |
12749 | |
12750 | FETCH_LONG(adr); |
12751 | PRE_IO |
12752 | READ_WORD_F(adr, res) |
12753 | flag_C = 0; |
12754 | flag_V = 0; |
12755 | flag_NotZ = res; |
12756 | flag_N = res >> 8; |
12757 | FETCH_SWORD(adr); |
12758 | adr += AREG((Opcode >> 9) & 7); |
12759 | WRITE_WORD_F(adr, res) |
12760 | POST_IO |
12761 | RET(24) |
12762 | } |
12763 | |
12764 | // MOVEW |
12765 | OPCODE(0x31B9) |
12766 | { |
12767 | u32 adr, res; |
12768 | u32 src, dst; |
12769 | |
12770 | FETCH_LONG(adr); |
12771 | PRE_IO |
12772 | READ_WORD_F(adr, res) |
12773 | flag_C = 0; |
12774 | flag_V = 0; |
12775 | flag_NotZ = res; |
12776 | flag_N = res >> 8; |
12777 | adr = AREG((Opcode >> 9) & 7); |
12778 | DECODE_EXT_WORD |
12779 | WRITE_WORD_F(adr, res) |
12780 | POST_IO |
12781 | RET(26) |
12782 | } |
12783 | |
12784 | // MOVEW |
12785 | OPCODE(0x31F9) |
12786 | { |
12787 | u32 adr, res; |
12788 | u32 src, dst; |
12789 | |
12790 | FETCH_LONG(adr); |
12791 | PRE_IO |
12792 | READ_WORD_F(adr, res) |
12793 | flag_C = 0; |
12794 | flag_V = 0; |
12795 | flag_NotZ = res; |
12796 | flag_N = res >> 8; |
12797 | FETCH_SWORD(adr); |
12798 | WRITE_WORD_F(adr, res) |
12799 | POST_IO |
12800 | RET(24) |
12801 | } |
12802 | |
12803 | // MOVEW |
12804 | OPCODE(0x33F9) |
12805 | { |
12806 | u32 adr, res; |
12807 | u32 src, dst; |
12808 | |
12809 | FETCH_LONG(adr); |
12810 | PRE_IO |
12811 | READ_WORD_F(adr, res) |
12812 | flag_C = 0; |
12813 | flag_V = 0; |
12814 | flag_NotZ = res; |
12815 | flag_N = res >> 8; |
12816 | FETCH_LONG(adr); |
12817 | WRITE_WORD_F(adr, res) |
12818 | POST_IO |
12819 | RET(28) |
12820 | } |
12821 | |
12822 | // MOVEW |
12823 | OPCODE(0x3EF9) |
12824 | { |
12825 | u32 adr, res; |
12826 | u32 src, dst; |
12827 | |
12828 | FETCH_LONG(adr); |
12829 | PRE_IO |
12830 | READ_WORD_F(adr, res) |
12831 | flag_C = 0; |
12832 | flag_V = 0; |
12833 | flag_NotZ = res; |
12834 | flag_N = res >> 8; |
12835 | adr = AREG(7); |
12836 | AREG(7) += 2; |
12837 | WRITE_WORD_F(adr, res) |
12838 | POST_IO |
12839 | RET(20) |
12840 | } |
12841 | |
12842 | // MOVEW |
12843 | OPCODE(0x3F39) |
12844 | { |
12845 | u32 adr, res; |
12846 | u32 src, dst; |
12847 | |
12848 | FETCH_LONG(adr); |
12849 | PRE_IO |
12850 | READ_WORD_F(adr, res) |
12851 | flag_C = 0; |
12852 | flag_V = 0; |
12853 | flag_NotZ = res; |
12854 | flag_N = res >> 8; |
12855 | adr = AREG(7) - 2; |
12856 | AREG(7) = adr; |
12857 | WRITE_WORD_F(adr, res) |
12858 | POST_IO |
12859 | RET(20) |
12860 | } |
12861 | |
12862 | // MOVEW |
12863 | OPCODE(0x303A) |
12864 | { |
12865 | u32 adr, res; |
12866 | u32 src, dst; |
12867 | |
12868 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12869 | PC++; |
12870 | PRE_IO |
12871 | READ_WORD_F(adr, res) |
12872 | flag_C = 0; |
12873 | flag_V = 0; |
12874 | flag_NotZ = res; |
12875 | flag_N = res >> 8; |
12876 | DREGu16((Opcode >> 9) & 7) = res; |
12877 | POST_IO |
12878 | RET(12) |
12879 | } |
12880 | |
12881 | // MOVEW |
12882 | OPCODE(0x30BA) |
12883 | { |
12884 | u32 adr, res; |
12885 | u32 src, dst; |
12886 | |
12887 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12888 | PC++; |
12889 | PRE_IO |
12890 | READ_WORD_F(adr, res) |
12891 | flag_C = 0; |
12892 | flag_V = 0; |
12893 | flag_NotZ = res; |
12894 | flag_N = res >> 8; |
12895 | adr = AREG((Opcode >> 9) & 7); |
12896 | WRITE_WORD_F(adr, res) |
12897 | POST_IO |
12898 | RET(16) |
12899 | } |
12900 | |
12901 | // MOVEW |
12902 | OPCODE(0x30FA) |
12903 | { |
12904 | u32 adr, res; |
12905 | u32 src, dst; |
12906 | |
12907 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12908 | PC++; |
12909 | PRE_IO |
12910 | READ_WORD_F(adr, res) |
12911 | flag_C = 0; |
12912 | flag_V = 0; |
12913 | flag_NotZ = res; |
12914 | flag_N = res >> 8; |
12915 | adr = AREG((Opcode >> 9) & 7); |
12916 | AREG((Opcode >> 9) & 7) += 2; |
12917 | WRITE_WORD_F(adr, res) |
12918 | POST_IO |
12919 | RET(16) |
12920 | } |
12921 | |
12922 | // MOVEW |
12923 | OPCODE(0x313A) |
12924 | { |
12925 | u32 adr, res; |
12926 | u32 src, dst; |
12927 | |
12928 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12929 | PC++; |
12930 | PRE_IO |
12931 | READ_WORD_F(adr, res) |
12932 | flag_C = 0; |
12933 | flag_V = 0; |
12934 | flag_NotZ = res; |
12935 | flag_N = res >> 8; |
12936 | adr = AREG((Opcode >> 9) & 7) - 2; |
12937 | AREG((Opcode >> 9) & 7) = adr; |
12938 | WRITE_WORD_F(adr, res) |
12939 | POST_IO |
12940 | RET(16) |
12941 | } |
12942 | |
12943 | // MOVEW |
12944 | OPCODE(0x317A) |
12945 | { |
12946 | u32 adr, res; |
12947 | u32 src, dst; |
12948 | |
12949 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12950 | PC++; |
12951 | PRE_IO |
12952 | READ_WORD_F(adr, res) |
12953 | flag_C = 0; |
12954 | flag_V = 0; |
12955 | flag_NotZ = res; |
12956 | flag_N = res >> 8; |
12957 | FETCH_SWORD(adr); |
12958 | adr += AREG((Opcode >> 9) & 7); |
12959 | WRITE_WORD_F(adr, res) |
12960 | POST_IO |
12961 | RET(20) |
12962 | } |
12963 | |
12964 | // MOVEW |
12965 | OPCODE(0x31BA) |
12966 | { |
12967 | u32 adr, res; |
12968 | u32 src, dst; |
12969 | |
12970 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12971 | PC++; |
12972 | PRE_IO |
12973 | READ_WORD_F(adr, res) |
12974 | flag_C = 0; |
12975 | flag_V = 0; |
12976 | flag_NotZ = res; |
12977 | flag_N = res >> 8; |
12978 | adr = AREG((Opcode >> 9) & 7); |
12979 | DECODE_EXT_WORD |
12980 | WRITE_WORD_F(adr, res) |
12981 | POST_IO |
12982 | RET(22) |
12983 | } |
12984 | |
12985 | // MOVEW |
12986 | OPCODE(0x31FA) |
12987 | { |
12988 | u32 adr, res; |
12989 | u32 src, dst; |
12990 | |
12991 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12992 | PC++; |
12993 | PRE_IO |
12994 | READ_WORD_F(adr, res) |
12995 | flag_C = 0; |
12996 | flag_V = 0; |
12997 | flag_NotZ = res; |
12998 | flag_N = res >> 8; |
12999 | FETCH_SWORD(adr); |
13000 | WRITE_WORD_F(adr, res) |
13001 | POST_IO |
13002 | RET(20) |
13003 | } |
13004 | |
13005 | // MOVEW |
13006 | OPCODE(0x33FA) |
13007 | { |
13008 | u32 adr, res; |
13009 | u32 src, dst; |
13010 | |
13011 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13012 | PC++; |
13013 | PRE_IO |
13014 | READ_WORD_F(adr, res) |
13015 | flag_C = 0; |
13016 | flag_V = 0; |
13017 | flag_NotZ = res; |
13018 | flag_N = res >> 8; |
13019 | FETCH_LONG(adr); |
13020 | WRITE_WORD_F(adr, res) |
13021 | POST_IO |
13022 | RET(24) |
13023 | } |
13024 | |
13025 | // MOVEW |
13026 | OPCODE(0x3EFA) |
13027 | { |
13028 | u32 adr, res; |
13029 | u32 src, dst; |
13030 | |
13031 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13032 | PC++; |
13033 | PRE_IO |
13034 | READ_WORD_F(adr, res) |
13035 | flag_C = 0; |
13036 | flag_V = 0; |
13037 | flag_NotZ = res; |
13038 | flag_N = res >> 8; |
13039 | adr = AREG(7); |
13040 | AREG(7) += 2; |
13041 | WRITE_WORD_F(adr, res) |
13042 | POST_IO |
13043 | RET(16) |
13044 | } |
13045 | |
13046 | // MOVEW |
13047 | OPCODE(0x3F3A) |
13048 | { |
13049 | u32 adr, res; |
13050 | u32 src, dst; |
13051 | |
13052 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13053 | PC++; |
13054 | PRE_IO |
13055 | READ_WORD_F(adr, res) |
13056 | flag_C = 0; |
13057 | flag_V = 0; |
13058 | flag_NotZ = res; |
13059 | flag_N = res >> 8; |
13060 | adr = AREG(7) - 2; |
13061 | AREG(7) = adr; |
13062 | WRITE_WORD_F(adr, res) |
13063 | POST_IO |
13064 | RET(16) |
13065 | } |
13066 | |
13067 | // MOVEW |
13068 | OPCODE(0x303B) |
13069 | { |
13070 | u32 adr, res; |
13071 | u32 src, dst; |
13072 | |
13073 | adr = (u32)(PC) - BasePC; |
13074 | DECODE_EXT_WORD |
13075 | PRE_IO |
13076 | READ_WORD_F(adr, res) |
13077 | flag_C = 0; |
13078 | flag_V = 0; |
13079 | flag_NotZ = res; |
13080 | flag_N = res >> 8; |
13081 | DREGu16((Opcode >> 9) & 7) = res; |
13082 | POST_IO |
13083 | RET(14) |
13084 | } |
13085 | |
13086 | // MOVEW |
13087 | OPCODE(0x30BB) |
13088 | { |
13089 | u32 adr, res; |
13090 | u32 src, dst; |
13091 | |
13092 | adr = (u32)(PC) - BasePC; |
13093 | DECODE_EXT_WORD |
13094 | PRE_IO |
13095 | READ_WORD_F(adr, res) |
13096 | flag_C = 0; |
13097 | flag_V = 0; |
13098 | flag_NotZ = res; |
13099 | flag_N = res >> 8; |
13100 | adr = AREG((Opcode >> 9) & 7); |
13101 | WRITE_WORD_F(adr, res) |
13102 | POST_IO |
13103 | RET(18) |
13104 | } |
13105 | |
13106 | // MOVEW |
13107 | OPCODE(0x30FB) |
13108 | { |
13109 | u32 adr, res; |
13110 | u32 src, dst; |
13111 | |
13112 | adr = (u32)(PC) - BasePC; |
13113 | DECODE_EXT_WORD |
13114 | PRE_IO |
13115 | READ_WORD_F(adr, res) |
13116 | flag_C = 0; |
13117 | flag_V = 0; |
13118 | flag_NotZ = res; |
13119 | flag_N = res >> 8; |
13120 | adr = AREG((Opcode >> 9) & 7); |
13121 | AREG((Opcode >> 9) & 7) += 2; |
13122 | WRITE_WORD_F(adr, res) |
13123 | POST_IO |
13124 | RET(18) |
13125 | } |
13126 | |
13127 | // MOVEW |
13128 | OPCODE(0x313B) |
13129 | { |
13130 | u32 adr, res; |
13131 | u32 src, dst; |
13132 | |
13133 | adr = (u32)(PC) - BasePC; |
13134 | DECODE_EXT_WORD |
13135 | PRE_IO |
13136 | READ_WORD_F(adr, res) |
13137 | flag_C = 0; |
13138 | flag_V = 0; |
13139 | flag_NotZ = res; |
13140 | flag_N = res >> 8; |
13141 | adr = AREG((Opcode >> 9) & 7) - 2; |
13142 | AREG((Opcode >> 9) & 7) = adr; |
13143 | WRITE_WORD_F(adr, res) |
13144 | POST_IO |
13145 | RET(18) |
13146 | } |
13147 | |
13148 | // MOVEW |
13149 | OPCODE(0x317B) |
13150 | { |
13151 | u32 adr, res; |
13152 | u32 src, dst; |
13153 | |
13154 | adr = (u32)(PC) - BasePC; |
13155 | DECODE_EXT_WORD |
13156 | PRE_IO |
13157 | READ_WORD_F(adr, res) |
13158 | flag_C = 0; |
13159 | flag_V = 0; |
13160 | flag_NotZ = res; |
13161 | flag_N = res >> 8; |
13162 | FETCH_SWORD(adr); |
13163 | adr += AREG((Opcode >> 9) & 7); |
13164 | WRITE_WORD_F(adr, res) |
13165 | POST_IO |
13166 | RET(22) |
13167 | } |
13168 | |
13169 | // MOVEW |
13170 | OPCODE(0x31BB) |
13171 | { |
13172 | u32 adr, res; |
13173 | u32 src, dst; |
13174 | |
13175 | adr = (u32)(PC) - BasePC; |
13176 | DECODE_EXT_WORD |
13177 | PRE_IO |
13178 | READ_WORD_F(adr, res) |
13179 | flag_C = 0; |
13180 | flag_V = 0; |
13181 | flag_NotZ = res; |
13182 | flag_N = res >> 8; |
13183 | adr = AREG((Opcode >> 9) & 7); |
13184 | DECODE_EXT_WORD |
13185 | WRITE_WORD_F(adr, res) |
13186 | POST_IO |
13187 | RET(24) |
13188 | } |
13189 | |
13190 | // MOVEW |
13191 | OPCODE(0x31FB) |
13192 | { |
13193 | u32 adr, res; |
13194 | u32 src, dst; |
13195 | |
13196 | adr = (u32)(PC) - BasePC; |
13197 | DECODE_EXT_WORD |
13198 | PRE_IO |
13199 | READ_WORD_F(adr, res) |
13200 | flag_C = 0; |
13201 | flag_V = 0; |
13202 | flag_NotZ = res; |
13203 | flag_N = res >> 8; |
13204 | FETCH_SWORD(adr); |
13205 | WRITE_WORD_F(adr, res) |
13206 | POST_IO |
13207 | RET(22) |
13208 | } |
13209 | |
13210 | // MOVEW |
13211 | OPCODE(0x33FB) |
13212 | { |
13213 | u32 adr, res; |
13214 | u32 src, dst; |
13215 | |
13216 | adr = (u32)(PC) - BasePC; |
13217 | DECODE_EXT_WORD |
13218 | PRE_IO |
13219 | READ_WORD_F(adr, res) |
13220 | flag_C = 0; |
13221 | flag_V = 0; |
13222 | flag_NotZ = res; |
13223 | flag_N = res >> 8; |
13224 | FETCH_LONG(adr); |
13225 | WRITE_WORD_F(adr, res) |
13226 | POST_IO |
13227 | RET(26) |
13228 | } |
13229 | |
13230 | // MOVEW |
13231 | OPCODE(0x3EFB) |
13232 | { |
13233 | u32 adr, res; |
13234 | u32 src, dst; |
13235 | |
13236 | adr = (u32)(PC) - BasePC; |
13237 | DECODE_EXT_WORD |
13238 | PRE_IO |
13239 | READ_WORD_F(adr, res) |
13240 | flag_C = 0; |
13241 | flag_V = 0; |
13242 | flag_NotZ = res; |
13243 | flag_N = res >> 8; |
13244 | adr = AREG(7); |
13245 | AREG(7) += 2; |
13246 | WRITE_WORD_F(adr, res) |
13247 | POST_IO |
13248 | RET(18) |
13249 | } |
13250 | |
13251 | // MOVEW |
13252 | OPCODE(0x3F3B) |
13253 | { |
13254 | u32 adr, res; |
13255 | u32 src, dst; |
13256 | |
13257 | adr = (u32)(PC) - BasePC; |
13258 | DECODE_EXT_WORD |
13259 | PRE_IO |
13260 | READ_WORD_F(adr, res) |
13261 | flag_C = 0; |
13262 | flag_V = 0; |
13263 | flag_NotZ = res; |
13264 | flag_N = res >> 8; |
13265 | adr = AREG(7) - 2; |
13266 | AREG(7) = adr; |
13267 | WRITE_WORD_F(adr, res) |
13268 | POST_IO |
13269 | RET(18) |
13270 | } |
13271 | |
13272 | // MOVEW |
13273 | OPCODE(0x303C) |
13274 | { |
13275 | u32 adr, res; |
13276 | u32 src, dst; |
13277 | |
13278 | FETCH_WORD(res); |
13279 | flag_C = 0; |
13280 | flag_V = 0; |
13281 | flag_NotZ = res; |
13282 | flag_N = res >> 8; |
13283 | DREGu16((Opcode >> 9) & 7) = res; |
13284 | RET(8) |
13285 | } |
13286 | |
13287 | // MOVEW |
13288 | OPCODE(0x30BC) |
13289 | { |
13290 | u32 adr, res; |
13291 | u32 src, dst; |
13292 | |
13293 | FETCH_WORD(res); |
13294 | flag_C = 0; |
13295 | flag_V = 0; |
13296 | flag_NotZ = res; |
13297 | flag_N = res >> 8; |
13298 | adr = AREG((Opcode >> 9) & 7); |
13299 | PRE_IO |
13300 | WRITE_WORD_F(adr, res) |
13301 | POST_IO |
13302 | RET(12) |
13303 | } |
13304 | |
13305 | // MOVEW |
13306 | OPCODE(0x30FC) |
13307 | { |
13308 | u32 adr, res; |
13309 | u32 src, dst; |
13310 | |
13311 | FETCH_WORD(res); |
13312 | flag_C = 0; |
13313 | flag_V = 0; |
13314 | flag_NotZ = res; |
13315 | flag_N = res >> 8; |
13316 | adr = AREG((Opcode >> 9) & 7); |
13317 | AREG((Opcode >> 9) & 7) += 2; |
13318 | PRE_IO |
13319 | WRITE_WORD_F(adr, res) |
13320 | POST_IO |
13321 | RET(12) |
13322 | } |
13323 | |
13324 | // MOVEW |
13325 | OPCODE(0x313C) |
13326 | { |
13327 | u32 adr, res; |
13328 | u32 src, dst; |
13329 | |
13330 | FETCH_WORD(res); |
13331 | flag_C = 0; |
13332 | flag_V = 0; |
13333 | flag_NotZ = res; |
13334 | flag_N = res >> 8; |
13335 | adr = AREG((Opcode >> 9) & 7) - 2; |
13336 | AREG((Opcode >> 9) & 7) = adr; |
13337 | PRE_IO |
13338 | WRITE_WORD_F(adr, res) |
13339 | POST_IO |
13340 | RET(12) |
13341 | } |
13342 | |
13343 | // MOVEW |
13344 | OPCODE(0x317C) |
13345 | { |
13346 | u32 adr, res; |
13347 | u32 src, dst; |
13348 | |
13349 | FETCH_WORD(res); |
13350 | flag_C = 0; |
13351 | flag_V = 0; |
13352 | flag_NotZ = res; |
13353 | flag_N = res >> 8; |
13354 | FETCH_SWORD(adr); |
13355 | adr += AREG((Opcode >> 9) & 7); |
13356 | PRE_IO |
13357 | WRITE_WORD_F(adr, res) |
13358 | POST_IO |
13359 | RET(16) |
13360 | } |
13361 | |
13362 | // MOVEW |
13363 | OPCODE(0x31BC) |
13364 | { |
13365 | u32 adr, res; |
13366 | u32 src, dst; |
13367 | |
13368 | FETCH_WORD(res); |
13369 | flag_C = 0; |
13370 | flag_V = 0; |
13371 | flag_NotZ = res; |
13372 | flag_N = res >> 8; |
13373 | adr = AREG((Opcode >> 9) & 7); |
13374 | DECODE_EXT_WORD |
13375 | PRE_IO |
13376 | WRITE_WORD_F(adr, res) |
13377 | POST_IO |
13378 | RET(18) |
13379 | } |
13380 | |
13381 | // MOVEW |
13382 | OPCODE(0x31FC) |
13383 | { |
13384 | u32 adr, res; |
13385 | u32 src, dst; |
13386 | |
13387 | FETCH_WORD(res); |
13388 | flag_C = 0; |
13389 | flag_V = 0; |
13390 | flag_NotZ = res; |
13391 | flag_N = res >> 8; |
13392 | FETCH_SWORD(adr); |
13393 | PRE_IO |
13394 | WRITE_WORD_F(adr, res) |
13395 | POST_IO |
13396 | RET(16) |
13397 | } |
13398 | |
13399 | // MOVEW |
13400 | OPCODE(0x33FC) |
13401 | { |
13402 | u32 adr, res; |
13403 | u32 src, dst; |
13404 | |
13405 | FETCH_WORD(res); |
13406 | flag_C = 0; |
13407 | flag_V = 0; |
13408 | flag_NotZ = res; |
13409 | flag_N = res >> 8; |
13410 | FETCH_LONG(adr); |
13411 | PRE_IO |
13412 | WRITE_WORD_F(adr, res) |
13413 | POST_IO |
13414 | RET(20) |
13415 | } |
13416 | |
13417 | // MOVEW |
13418 | OPCODE(0x3EFC) |
13419 | { |
13420 | u32 adr, res; |
13421 | u32 src, dst; |
13422 | |
13423 | FETCH_WORD(res); |
13424 | flag_C = 0; |
13425 | flag_V = 0; |
13426 | flag_NotZ = res; |
13427 | flag_N = res >> 8; |
13428 | adr = AREG(7); |
13429 | AREG(7) += 2; |
13430 | PRE_IO |
13431 | WRITE_WORD_F(adr, res) |
13432 | POST_IO |
13433 | RET(12) |
13434 | } |
13435 | |
13436 | // MOVEW |
13437 | OPCODE(0x3F3C) |
13438 | { |
13439 | u32 adr, res; |
13440 | u32 src, dst; |
13441 | |
13442 | FETCH_WORD(res); |
13443 | flag_C = 0; |
13444 | flag_V = 0; |
13445 | flag_NotZ = res; |
13446 | flag_N = res >> 8; |
13447 | adr = AREG(7) - 2; |
13448 | AREG(7) = adr; |
13449 | PRE_IO |
13450 | WRITE_WORD_F(adr, res) |
13451 | POST_IO |
13452 | RET(12) |
13453 | } |
13454 | |
13455 | // MOVEW |
13456 | OPCODE(0x301F) |
13457 | { |
13458 | u32 adr, res; |
13459 | u32 src, dst; |
13460 | |
13461 | adr = AREG(7); |
13462 | AREG(7) += 2; |
13463 | PRE_IO |
13464 | READ_WORD_F(adr, res) |
13465 | flag_C = 0; |
13466 | flag_V = 0; |
13467 | flag_NotZ = res; |
13468 | flag_N = res >> 8; |
13469 | DREGu16((Opcode >> 9) & 7) = res; |
13470 | POST_IO |
13471 | RET(8) |
13472 | } |
13473 | |
13474 | // MOVEW |
13475 | OPCODE(0x309F) |
13476 | { |
13477 | u32 adr, res; |
13478 | u32 src, dst; |
13479 | |
13480 | adr = AREG(7); |
13481 | AREG(7) += 2; |
13482 | PRE_IO |
13483 | READ_WORD_F(adr, res) |
13484 | flag_C = 0; |
13485 | flag_V = 0; |
13486 | flag_NotZ = res; |
13487 | flag_N = res >> 8; |
13488 | adr = AREG((Opcode >> 9) & 7); |
13489 | WRITE_WORD_F(adr, res) |
13490 | POST_IO |
13491 | RET(12) |
13492 | } |
13493 | |
13494 | // MOVEW |
13495 | OPCODE(0x30DF) |
13496 | { |
13497 | u32 adr, res; |
13498 | u32 src, dst; |
13499 | |
13500 | adr = AREG(7); |
13501 | AREG(7) += 2; |
13502 | PRE_IO |
13503 | READ_WORD_F(adr, res) |
13504 | flag_C = 0; |
13505 | flag_V = 0; |
13506 | flag_NotZ = res; |
13507 | flag_N = res >> 8; |
13508 | adr = AREG((Opcode >> 9) & 7); |
13509 | AREG((Opcode >> 9) & 7) += 2; |
13510 | WRITE_WORD_F(adr, res) |
13511 | POST_IO |
13512 | RET(12) |
13513 | } |
13514 | |
13515 | // MOVEW |
13516 | OPCODE(0x311F) |
13517 | { |
13518 | u32 adr, res; |
13519 | u32 src, dst; |
13520 | |
13521 | adr = AREG(7); |
13522 | AREG(7) += 2; |
13523 | PRE_IO |
13524 | READ_WORD_F(adr, res) |
13525 | flag_C = 0; |
13526 | flag_V = 0; |
13527 | flag_NotZ = res; |
13528 | flag_N = res >> 8; |
13529 | adr = AREG((Opcode >> 9) & 7) - 2; |
13530 | AREG((Opcode >> 9) & 7) = adr; |
13531 | WRITE_WORD_F(adr, res) |
13532 | POST_IO |
13533 | RET(12) |
13534 | } |
13535 | |
13536 | // MOVEW |
13537 | OPCODE(0x315F) |
13538 | { |
13539 | u32 adr, res; |
13540 | u32 src, dst; |
13541 | |
13542 | adr = AREG(7); |
13543 | AREG(7) += 2; |
13544 | PRE_IO |
13545 | READ_WORD_F(adr, res) |
13546 | flag_C = 0; |
13547 | flag_V = 0; |
13548 | flag_NotZ = res; |
13549 | flag_N = res >> 8; |
13550 | FETCH_SWORD(adr); |
13551 | adr += AREG((Opcode >> 9) & 7); |
13552 | WRITE_WORD_F(adr, res) |
13553 | POST_IO |
13554 | RET(16) |
13555 | } |
13556 | |
13557 | // MOVEW |
13558 | OPCODE(0x319F) |
13559 | { |
13560 | u32 adr, res; |
13561 | u32 src, dst; |
13562 | |
13563 | adr = AREG(7); |
13564 | AREG(7) += 2; |
13565 | PRE_IO |
13566 | READ_WORD_F(adr, res) |
13567 | flag_C = 0; |
13568 | flag_V = 0; |
13569 | flag_NotZ = res; |
13570 | flag_N = res >> 8; |
13571 | adr = AREG((Opcode >> 9) & 7); |
13572 | DECODE_EXT_WORD |
13573 | WRITE_WORD_F(adr, res) |
13574 | POST_IO |
13575 | RET(18) |
13576 | } |
13577 | |
13578 | // MOVEW |
13579 | OPCODE(0x31DF) |
13580 | { |
13581 | u32 adr, res; |
13582 | u32 src, dst; |
13583 | |
13584 | adr = AREG(7); |
13585 | AREG(7) += 2; |
13586 | PRE_IO |
13587 | READ_WORD_F(adr, res) |
13588 | flag_C = 0; |
13589 | flag_V = 0; |
13590 | flag_NotZ = res; |
13591 | flag_N = res >> 8; |
13592 | FETCH_SWORD(adr); |
13593 | WRITE_WORD_F(adr, res) |
13594 | POST_IO |
13595 | RET(16) |
13596 | } |
13597 | |
13598 | // MOVEW |
13599 | OPCODE(0x33DF) |
13600 | { |
13601 | u32 adr, res; |
13602 | u32 src, dst; |
13603 | |
13604 | adr = AREG(7); |
13605 | AREG(7) += 2; |
13606 | PRE_IO |
13607 | READ_WORD_F(adr, res) |
13608 | flag_C = 0; |
13609 | flag_V = 0; |
13610 | flag_NotZ = res; |
13611 | flag_N = res >> 8; |
13612 | FETCH_LONG(adr); |
13613 | WRITE_WORD_F(adr, res) |
13614 | POST_IO |
13615 | RET(20) |
13616 | } |
13617 | |
13618 | // MOVEW |
13619 | OPCODE(0x3EDF) |
13620 | { |
13621 | u32 adr, res; |
13622 | u32 src, dst; |
13623 | |
13624 | adr = AREG(7); |
13625 | AREG(7) += 2; |
13626 | PRE_IO |
13627 | READ_WORD_F(adr, res) |
13628 | flag_C = 0; |
13629 | flag_V = 0; |
13630 | flag_NotZ = res; |
13631 | flag_N = res >> 8; |
13632 | adr = AREG(7); |
13633 | AREG(7) += 2; |
13634 | WRITE_WORD_F(adr, res) |
13635 | POST_IO |
13636 | RET(12) |
13637 | } |
13638 | |
13639 | // MOVEW |
13640 | OPCODE(0x3F1F) |
13641 | { |
13642 | u32 adr, res; |
13643 | u32 src, dst; |
13644 | |
13645 | adr = AREG(7); |
13646 | AREG(7) += 2; |
13647 | PRE_IO |
13648 | READ_WORD_F(adr, res) |
13649 | flag_C = 0; |
13650 | flag_V = 0; |
13651 | flag_NotZ = res; |
13652 | flag_N = res >> 8; |
13653 | adr = AREG(7) - 2; |
13654 | AREG(7) = adr; |
13655 | WRITE_WORD_F(adr, res) |
13656 | POST_IO |
13657 | RET(12) |
13658 | } |
13659 | |
13660 | // MOVEW |
13661 | OPCODE(0x3027) |
13662 | { |
13663 | u32 adr, res; |
13664 | u32 src, dst; |
13665 | |
13666 | adr = AREG(7) - 2; |
13667 | AREG(7) = adr; |
13668 | PRE_IO |
13669 | READ_WORD_F(adr, res) |
13670 | flag_C = 0; |
13671 | flag_V = 0; |
13672 | flag_NotZ = res; |
13673 | flag_N = res >> 8; |
13674 | DREGu16((Opcode >> 9) & 7) = res; |
13675 | POST_IO |
13676 | RET(10) |
13677 | } |
13678 | |
13679 | // MOVEW |
13680 | OPCODE(0x30A7) |
13681 | { |
13682 | u32 adr, res; |
13683 | u32 src, dst; |
13684 | |
13685 | adr = AREG(7) - 2; |
13686 | AREG(7) = adr; |
13687 | PRE_IO |
13688 | READ_WORD_F(adr, res) |
13689 | flag_C = 0; |
13690 | flag_V = 0; |
13691 | flag_NotZ = res; |
13692 | flag_N = res >> 8; |
13693 | adr = AREG((Opcode >> 9) & 7); |
13694 | WRITE_WORD_F(adr, res) |
13695 | POST_IO |
13696 | RET(14) |
13697 | } |
13698 | |
13699 | // MOVEW |
13700 | OPCODE(0x30E7) |
13701 | { |
13702 | u32 adr, res; |
13703 | u32 src, dst; |
13704 | |
13705 | adr = AREG(7) - 2; |
13706 | AREG(7) = adr; |
13707 | PRE_IO |
13708 | READ_WORD_F(adr, res) |
13709 | flag_C = 0; |
13710 | flag_V = 0; |
13711 | flag_NotZ = res; |
13712 | flag_N = res >> 8; |
13713 | adr = AREG((Opcode >> 9) & 7); |
13714 | AREG((Opcode >> 9) & 7) += 2; |
13715 | WRITE_WORD_F(adr, res) |
13716 | POST_IO |
13717 | RET(14) |
13718 | } |
13719 | |
13720 | // MOVEW |
13721 | OPCODE(0x3127) |
13722 | { |
13723 | u32 adr, res; |
13724 | u32 src, dst; |
13725 | |
13726 | adr = AREG(7) - 2; |
13727 | AREG(7) = adr; |
13728 | PRE_IO |
13729 | READ_WORD_F(adr, res) |
13730 | flag_C = 0; |
13731 | flag_V = 0; |
13732 | flag_NotZ = res; |
13733 | flag_N = res >> 8; |
13734 | adr = AREG((Opcode >> 9) & 7) - 2; |
13735 | AREG((Opcode >> 9) & 7) = adr; |
13736 | WRITE_WORD_F(adr, res) |
13737 | POST_IO |
13738 | RET(14) |
13739 | } |
13740 | |
13741 | // MOVEW |
13742 | OPCODE(0x3167) |
13743 | { |
13744 | u32 adr, res; |
13745 | u32 src, dst; |
13746 | |
13747 | adr = AREG(7) - 2; |
13748 | AREG(7) = adr; |
13749 | PRE_IO |
13750 | READ_WORD_F(adr, res) |
13751 | flag_C = 0; |
13752 | flag_V = 0; |
13753 | flag_NotZ = res; |
13754 | flag_N = res >> 8; |
13755 | FETCH_SWORD(adr); |
13756 | adr += AREG((Opcode >> 9) & 7); |
13757 | WRITE_WORD_F(adr, res) |
13758 | POST_IO |
13759 | RET(18) |
13760 | } |
13761 | |
13762 | // MOVEW |
13763 | OPCODE(0x31A7) |
13764 | { |
13765 | u32 adr, res; |
13766 | u32 src, dst; |
13767 | |
13768 | adr = AREG(7) - 2; |
13769 | AREG(7) = adr; |
13770 | PRE_IO |
13771 | READ_WORD_F(adr, res) |
13772 | flag_C = 0; |
13773 | flag_V = 0; |
13774 | flag_NotZ = res; |
13775 | flag_N = res >> 8; |
13776 | adr = AREG((Opcode >> 9) & 7); |
13777 | DECODE_EXT_WORD |
13778 | WRITE_WORD_F(adr, res) |
13779 | POST_IO |
13780 | RET(20) |
13781 | } |
13782 | |
13783 | // MOVEW |
13784 | OPCODE(0x31E7) |
13785 | { |
13786 | u32 adr, res; |
13787 | u32 src, dst; |
13788 | |
13789 | adr = AREG(7) - 2; |
13790 | AREG(7) = adr; |
13791 | PRE_IO |
13792 | READ_WORD_F(adr, res) |
13793 | flag_C = 0; |
13794 | flag_V = 0; |
13795 | flag_NotZ = res; |
13796 | flag_N = res >> 8; |
13797 | FETCH_SWORD(adr); |
13798 | WRITE_WORD_F(adr, res) |
13799 | POST_IO |
13800 | RET(18) |
13801 | } |
13802 | |
13803 | // MOVEW |
13804 | OPCODE(0x33E7) |
13805 | { |
13806 | u32 adr, res; |
13807 | u32 src, dst; |
13808 | |
13809 | adr = AREG(7) - 2; |
13810 | AREG(7) = adr; |
13811 | PRE_IO |
13812 | READ_WORD_F(adr, res) |
13813 | flag_C = 0; |
13814 | flag_V = 0; |
13815 | flag_NotZ = res; |
13816 | flag_N = res >> 8; |
13817 | FETCH_LONG(adr); |
13818 | WRITE_WORD_F(adr, res) |
13819 | POST_IO |
13820 | RET(22) |
13821 | } |
13822 | |
13823 | // MOVEW |
13824 | OPCODE(0x3EE7) |
13825 | { |
13826 | u32 adr, res; |
13827 | u32 src, dst; |
13828 | |
13829 | adr = AREG(7) - 2; |
13830 | AREG(7) = adr; |
13831 | PRE_IO |
13832 | READ_WORD_F(adr, res) |
13833 | flag_C = 0; |
13834 | flag_V = 0; |
13835 | flag_NotZ = res; |
13836 | flag_N = res >> 8; |
13837 | adr = AREG(7); |
13838 | AREG(7) += 2; |
13839 | WRITE_WORD_F(adr, res) |
13840 | POST_IO |
13841 | RET(14) |
13842 | } |
13843 | |
13844 | // MOVEW |
13845 | OPCODE(0x3F27) |
13846 | { |
13847 | u32 adr, res; |
13848 | u32 src, dst; |
13849 | |
13850 | adr = AREG(7) - 2; |
13851 | AREG(7) = adr; |
13852 | PRE_IO |
13853 | READ_WORD_F(adr, res) |
13854 | flag_C = 0; |
13855 | flag_V = 0; |
13856 | flag_NotZ = res; |
13857 | flag_N = res >> 8; |
13858 | adr = AREG(7) - 2; |
13859 | AREG(7) = adr; |
13860 | WRITE_WORD_F(adr, res) |
13861 | POST_IO |
13862 | RET(14) |
13863 | } |
13864 | |
13865 | // MOVEAW |
13866 | OPCODE(0x3040) |
13867 | { |
13868 | u32 adr, res; |
13869 | u32 src, dst; |
13870 | |
13871 | res = (s32)DREGs16((Opcode >> 0) & 7); |
13872 | AREG((Opcode >> 9) & 7) = res; |
13873 | RET(4) |
13874 | } |
13875 | |
13876 | // MOVEAW |
13877 | OPCODE(0x3048) |
13878 | { |
13879 | u32 adr, res; |
13880 | u32 src, dst; |
13881 | |
13882 | res = (s32)AREGs16((Opcode >> 0) & 7); |
13883 | AREG((Opcode >> 9) & 7) = res; |
13884 | RET(4) |
13885 | } |
13886 | |
13887 | // MOVEAW |
13888 | OPCODE(0x3050) |
13889 | { |
13890 | u32 adr, res; |
13891 | u32 src, dst; |
13892 | |
13893 | adr = AREG((Opcode >> 0) & 7); |
13894 | PRE_IO |
13895 | READSX_WORD_F(adr, res) |
13896 | AREG((Opcode >> 9) & 7) = res; |
13897 | POST_IO |
13898 | RET(8) |
13899 | } |
13900 | |
13901 | // MOVEAW |
13902 | OPCODE(0x3058) |
13903 | { |
13904 | u32 adr, res; |
13905 | u32 src, dst; |
13906 | |
13907 | adr = AREG((Opcode >> 0) & 7); |
13908 | AREG((Opcode >> 0) & 7) += 2; |
13909 | PRE_IO |
13910 | READSX_WORD_F(adr, res) |
13911 | AREG((Opcode >> 9) & 7) = res; |
13912 | POST_IO |
13913 | RET(8) |
13914 | } |
13915 | |
13916 | // MOVEAW |
13917 | OPCODE(0x3060) |
13918 | { |
13919 | u32 adr, res; |
13920 | u32 src, dst; |
13921 | |
13922 | adr = AREG((Opcode >> 0) & 7) - 2; |
13923 | AREG((Opcode >> 0) & 7) = adr; |
13924 | PRE_IO |
13925 | READSX_WORD_F(adr, res) |
13926 | AREG((Opcode >> 9) & 7) = res; |
13927 | POST_IO |
13928 | RET(10) |
13929 | } |
13930 | |
13931 | // MOVEAW |
13932 | OPCODE(0x3068) |
13933 | { |
13934 | u32 adr, res; |
13935 | u32 src, dst; |
13936 | |
13937 | FETCH_SWORD(adr); |
13938 | adr += AREG((Opcode >> 0) & 7); |
13939 | PRE_IO |
13940 | READSX_WORD_F(adr, res) |
13941 | AREG((Opcode >> 9) & 7) = res; |
13942 | POST_IO |
13943 | RET(12) |
13944 | } |
13945 | |
13946 | // MOVEAW |
13947 | OPCODE(0x3070) |
13948 | { |
13949 | u32 adr, res; |
13950 | u32 src, dst; |
13951 | |
13952 | adr = AREG((Opcode >> 0) & 7); |
13953 | DECODE_EXT_WORD |
13954 | PRE_IO |
13955 | READSX_WORD_F(adr, res) |
13956 | AREG((Opcode >> 9) & 7) = res; |
13957 | POST_IO |
13958 | RET(14) |
13959 | } |
13960 | |
13961 | // MOVEAW |
13962 | OPCODE(0x3078) |
13963 | { |
13964 | u32 adr, res; |
13965 | u32 src, dst; |
13966 | |
13967 | FETCH_SWORD(adr); |
13968 | PRE_IO |
13969 | READSX_WORD_F(adr, res) |
13970 | AREG((Opcode >> 9) & 7) = res; |
13971 | POST_IO |
13972 | RET(12) |
13973 | } |
13974 | |
13975 | // MOVEAW |
13976 | OPCODE(0x3079) |
13977 | { |
13978 | u32 adr, res; |
13979 | u32 src, dst; |
13980 | |
13981 | FETCH_LONG(adr); |
13982 | PRE_IO |
13983 | READSX_WORD_F(adr, res) |
13984 | AREG((Opcode >> 9) & 7) = res; |
13985 | POST_IO |
13986 | RET(16) |
13987 | } |
13988 | |
13989 | // MOVEAW |
13990 | OPCODE(0x307A) |
13991 | { |
13992 | u32 adr, res; |
13993 | u32 src, dst; |
13994 | |
13995 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13996 | PC++; |
13997 | PRE_IO |
13998 | READSX_WORD_F(adr, res) |
13999 | AREG((Opcode >> 9) & 7) = res; |
14000 | POST_IO |
14001 | RET(12) |
14002 | } |
14003 | |
14004 | // MOVEAW |
14005 | OPCODE(0x307B) |
14006 | { |
14007 | u32 adr, res; |
14008 | u32 src, dst; |
14009 | |
14010 | adr = (u32)(PC) - BasePC; |
14011 | DECODE_EXT_WORD |
14012 | PRE_IO |
14013 | READSX_WORD_F(adr, res) |
14014 | AREG((Opcode >> 9) & 7) = res; |
14015 | POST_IO |
14016 | RET(14) |
14017 | } |
14018 | |
14019 | // MOVEAW |
14020 | OPCODE(0x307C) |
14021 | { |
14022 | u32 adr, res; |
14023 | u32 src, dst; |
14024 | |
14025 | FETCH_SWORD(res); |
14026 | AREG((Opcode >> 9) & 7) = res; |
14027 | RET(8) |
14028 | } |
14029 | |
14030 | // MOVEAW |
14031 | OPCODE(0x305F) |
14032 | { |
14033 | u32 adr, res; |
14034 | u32 src, dst; |
14035 | |
14036 | adr = AREG(7); |
14037 | AREG(7) += 2; |
14038 | PRE_IO |
14039 | READSX_WORD_F(adr, res) |
14040 | AREG((Opcode >> 9) & 7) = res; |
14041 | POST_IO |
14042 | RET(8) |
14043 | } |
14044 | |
14045 | // MOVEAW |
14046 | OPCODE(0x3067) |
14047 | { |
14048 | u32 adr, res; |
14049 | u32 src, dst; |
14050 | |
14051 | adr = AREG(7) - 2; |
14052 | AREG(7) = adr; |
14053 | PRE_IO |
14054 | READSX_WORD_F(adr, res) |
14055 | AREG((Opcode >> 9) & 7) = res; |
14056 | POST_IO |
14057 | RET(10) |
14058 | } |
14059 | |
14060 | // NEGX |
14061 | OPCODE(0x4000) |
14062 | { |
14063 | u32 adr, res; |
14064 | u32 src, dst; |
14065 | |
14066 | src = DREGu8((Opcode >> 0) & 7); |
14067 | res = -src - ((flag_X >> 8) & 1); |
14068 | flag_V = res & src; |
14069 | flag_N = flag_X = flag_C = res; |
14070 | flag_NotZ |= res & 0xFF; |
14071 | DREGu8((Opcode >> 0) & 7) = res; |
14072 | RET(4) |
14073 | } |
14074 | |
14075 | // NEGX |
14076 | OPCODE(0x4010) |
14077 | { |
14078 | u32 adr, res; |
14079 | u32 src, dst; |
14080 | |
14081 | adr = AREG((Opcode >> 0) & 7); |
14082 | PRE_IO |
14083 | READ_BYTE_F(adr, src) |
14084 | res = -src - ((flag_X >> 8) & 1); |
14085 | flag_V = res & src; |
14086 | flag_N = flag_X = flag_C = res; |
14087 | flag_NotZ |= res & 0xFF; |
14088 | WRITE_BYTE_F(adr, res) |
14089 | POST_IO |
14090 | RET(12) |
14091 | } |
14092 | |
14093 | // NEGX |
14094 | OPCODE(0x4018) |
14095 | { |
14096 | u32 adr, res; |
14097 | u32 src, dst; |
14098 | |
14099 | adr = AREG((Opcode >> 0) & 7); |
14100 | AREG((Opcode >> 0) & 7) += 1; |
14101 | PRE_IO |
14102 | READ_BYTE_F(adr, src) |
14103 | res = -src - ((flag_X >> 8) & 1); |
14104 | flag_V = res & src; |
14105 | flag_N = flag_X = flag_C = res; |
14106 | flag_NotZ |= res & 0xFF; |
14107 | WRITE_BYTE_F(adr, res) |
14108 | POST_IO |
14109 | RET(12) |
14110 | } |
14111 | |
14112 | // NEGX |
14113 | OPCODE(0x4020) |
14114 | { |
14115 | u32 adr, res; |
14116 | u32 src, dst; |
14117 | |
14118 | adr = AREG((Opcode >> 0) & 7) - 1; |
14119 | AREG((Opcode >> 0) & 7) = adr; |
14120 | PRE_IO |
14121 | READ_BYTE_F(adr, src) |
14122 | res = -src - ((flag_X >> 8) & 1); |
14123 | flag_V = res & src; |
14124 | flag_N = flag_X = flag_C = res; |
14125 | flag_NotZ |= res & 0xFF; |
14126 | WRITE_BYTE_F(adr, res) |
14127 | POST_IO |
14128 | RET(14) |
14129 | } |
14130 | |
14131 | // NEGX |
14132 | OPCODE(0x4028) |
14133 | { |
14134 | u32 adr, res; |
14135 | u32 src, dst; |
14136 | |
14137 | FETCH_SWORD(adr); |
14138 | adr += AREG((Opcode >> 0) & 7); |
14139 | PRE_IO |
14140 | READ_BYTE_F(adr, src) |
14141 | res = -src - ((flag_X >> 8) & 1); |
14142 | flag_V = res & src; |
14143 | flag_N = flag_X = flag_C = res; |
14144 | flag_NotZ |= res & 0xFF; |
14145 | WRITE_BYTE_F(adr, res) |
14146 | POST_IO |
14147 | RET(16) |
14148 | } |
14149 | |
14150 | // NEGX |
14151 | OPCODE(0x4030) |
14152 | { |
14153 | u32 adr, res; |
14154 | u32 src, dst; |
14155 | |
14156 | adr = AREG((Opcode >> 0) & 7); |
14157 | DECODE_EXT_WORD |
14158 | PRE_IO |
14159 | READ_BYTE_F(adr, src) |
14160 | res = -src - ((flag_X >> 8) & 1); |
14161 | flag_V = res & src; |
14162 | flag_N = flag_X = flag_C = res; |
14163 | flag_NotZ |= res & 0xFF; |
14164 | WRITE_BYTE_F(adr, res) |
14165 | POST_IO |
14166 | RET(18) |
14167 | } |
14168 | |
14169 | // NEGX |
14170 | OPCODE(0x4038) |
14171 | { |
14172 | u32 adr, res; |
14173 | u32 src, dst; |
14174 | |
14175 | FETCH_SWORD(adr); |
14176 | PRE_IO |
14177 | READ_BYTE_F(adr, src) |
14178 | res = -src - ((flag_X >> 8) & 1); |
14179 | flag_V = res & src; |
14180 | flag_N = flag_X = flag_C = res; |
14181 | flag_NotZ |= res & 0xFF; |
14182 | WRITE_BYTE_F(adr, res) |
14183 | POST_IO |
14184 | RET(16) |
14185 | } |
14186 | |
14187 | // NEGX |
14188 | OPCODE(0x4039) |
14189 | { |
14190 | u32 adr, res; |
14191 | u32 src, dst; |
14192 | |
14193 | FETCH_LONG(adr); |
14194 | PRE_IO |
14195 | READ_BYTE_F(adr, src) |
14196 | res = -src - ((flag_X >> 8) & 1); |
14197 | flag_V = res & src; |
14198 | flag_N = flag_X = flag_C = res; |
14199 | flag_NotZ |= res & 0xFF; |
14200 | WRITE_BYTE_F(adr, res) |
14201 | POST_IO |
14202 | RET(20) |
14203 | } |
14204 | |
14205 | // NEGX |
14206 | OPCODE(0x401F) |
14207 | { |
14208 | u32 adr, res; |
14209 | u32 src, dst; |
14210 | |
14211 | adr = AREG(7); |
14212 | AREG(7) += 2; |
14213 | PRE_IO |
14214 | READ_BYTE_F(adr, src) |
14215 | res = -src - ((flag_X >> 8) & 1); |
14216 | flag_V = res & src; |
14217 | flag_N = flag_X = flag_C = res; |
14218 | flag_NotZ |= res & 0xFF; |
14219 | WRITE_BYTE_F(adr, res) |
14220 | POST_IO |
14221 | RET(12) |
14222 | } |
14223 | |
14224 | // NEGX |
14225 | OPCODE(0x4027) |
14226 | { |
14227 | u32 adr, res; |
14228 | u32 src, dst; |
14229 | |
14230 | adr = AREG(7) - 2; |
14231 | AREG(7) = adr; |
14232 | PRE_IO |
14233 | READ_BYTE_F(adr, src) |
14234 | res = -src - ((flag_X >> 8) & 1); |
14235 | flag_V = res & src; |
14236 | flag_N = flag_X = flag_C = res; |
14237 | flag_NotZ |= res & 0xFF; |
14238 | WRITE_BYTE_F(adr, res) |
14239 | POST_IO |
14240 | RET(14) |
14241 | } |
14242 | |
14243 | // NEGX |
14244 | OPCODE(0x4040) |
14245 | { |
14246 | u32 adr, res; |
14247 | u32 src, dst; |
14248 | |
14249 | src = DREGu16((Opcode >> 0) & 7); |
14250 | res = -src - ((flag_X >> 8) & 1); |
14251 | flag_V = (res & src) >> 8; |
14252 | flag_N = flag_X = flag_C = res >> 8; |
14253 | flag_NotZ |= res & 0xFFFF; |
14254 | DREGu16((Opcode >> 0) & 7) = res; |
14255 | RET(4) |
14256 | } |
14257 | |
14258 | // NEGX |
14259 | OPCODE(0x4050) |
14260 | { |
14261 | u32 adr, res; |
14262 | u32 src, dst; |
14263 | |
14264 | adr = AREG((Opcode >> 0) & 7); |
14265 | PRE_IO |
14266 | READ_WORD_F(adr, src) |
14267 | res = -src - ((flag_X >> 8) & 1); |
14268 | flag_V = (res & src) >> 8; |
14269 | flag_N = flag_X = flag_C = res >> 8; |
14270 | flag_NotZ |= res & 0xFFFF; |
14271 | WRITE_WORD_F(adr, res) |
14272 | POST_IO |
14273 | RET(12) |
14274 | } |
14275 | |
14276 | // NEGX |
14277 | OPCODE(0x4058) |
14278 | { |
14279 | u32 adr, res; |
14280 | u32 src, dst; |
14281 | |
14282 | adr = AREG((Opcode >> 0) & 7); |
14283 | AREG((Opcode >> 0) & 7) += 2; |
14284 | PRE_IO |
14285 | READ_WORD_F(adr, src) |
14286 | res = -src - ((flag_X >> 8) & 1); |
14287 | flag_V = (res & src) >> 8; |
14288 | flag_N = flag_X = flag_C = res >> 8; |
14289 | flag_NotZ |= res & 0xFFFF; |
14290 | WRITE_WORD_F(adr, res) |
14291 | POST_IO |
14292 | RET(12) |
14293 | } |
14294 | |
14295 | // NEGX |
14296 | OPCODE(0x4060) |
14297 | { |
14298 | u32 adr, res; |
14299 | u32 src, dst; |
14300 | |
14301 | adr = AREG((Opcode >> 0) & 7) - 2; |
14302 | AREG((Opcode >> 0) & 7) = adr; |
14303 | PRE_IO |
14304 | READ_WORD_F(adr, src) |
14305 | res = -src - ((flag_X >> 8) & 1); |
14306 | flag_V = (res & src) >> 8; |
14307 | flag_N = flag_X = flag_C = res >> 8; |
14308 | flag_NotZ |= res & 0xFFFF; |
14309 | WRITE_WORD_F(adr, res) |
14310 | POST_IO |
14311 | RET(14) |
14312 | } |
14313 | |
14314 | // NEGX |
14315 | OPCODE(0x4068) |
14316 | { |
14317 | u32 adr, res; |
14318 | u32 src, dst; |
14319 | |
14320 | FETCH_SWORD(adr); |
14321 | adr += AREG((Opcode >> 0) & 7); |
14322 | PRE_IO |
14323 | READ_WORD_F(adr, src) |
14324 | res = -src - ((flag_X >> 8) & 1); |
14325 | flag_V = (res & src) >> 8; |
14326 | flag_N = flag_X = flag_C = res >> 8; |
14327 | flag_NotZ |= res & 0xFFFF; |
14328 | WRITE_WORD_F(adr, res) |
14329 | POST_IO |
14330 | RET(16) |
14331 | } |
14332 | |
14333 | // NEGX |
14334 | OPCODE(0x4070) |
14335 | { |
14336 | u32 adr, res; |
14337 | u32 src, dst; |
14338 | |
14339 | adr = AREG((Opcode >> 0) & 7); |
14340 | DECODE_EXT_WORD |
14341 | PRE_IO |
14342 | READ_WORD_F(adr, src) |
14343 | res = -src - ((flag_X >> 8) & 1); |
14344 | flag_V = (res & src) >> 8; |
14345 | flag_N = flag_X = flag_C = res >> 8; |
14346 | flag_NotZ |= res & 0xFFFF; |
14347 | WRITE_WORD_F(adr, res) |
14348 | POST_IO |
14349 | RET(18) |
14350 | } |
14351 | |
14352 | // NEGX |
14353 | OPCODE(0x4078) |
14354 | { |
14355 | u32 adr, res; |
14356 | u32 src, dst; |
14357 | |
14358 | FETCH_SWORD(adr); |
14359 | PRE_IO |
14360 | READ_WORD_F(adr, src) |
14361 | res = -src - ((flag_X >> 8) & 1); |
14362 | flag_V = (res & src) >> 8; |
14363 | flag_N = flag_X = flag_C = res >> 8; |
14364 | flag_NotZ |= res & 0xFFFF; |
14365 | WRITE_WORD_F(adr, res) |
14366 | POST_IO |
14367 | RET(16) |
14368 | } |
14369 | |
14370 | // NEGX |
14371 | OPCODE(0x4079) |
14372 | { |
14373 | u32 adr, res; |
14374 | u32 src, dst; |
14375 | |
14376 | FETCH_LONG(adr); |
14377 | PRE_IO |
14378 | READ_WORD_F(adr, src) |
14379 | res = -src - ((flag_X >> 8) & 1); |
14380 | flag_V = (res & src) >> 8; |
14381 | flag_N = flag_X = flag_C = res >> 8; |
14382 | flag_NotZ |= res & 0xFFFF; |
14383 | WRITE_WORD_F(adr, res) |
14384 | POST_IO |
14385 | RET(20) |
14386 | } |
14387 | |
14388 | // NEGX |
14389 | OPCODE(0x405F) |
14390 | { |
14391 | u32 adr, res; |
14392 | u32 src, dst; |
14393 | |
14394 | adr = AREG(7); |
14395 | AREG(7) += 2; |
14396 | PRE_IO |
14397 | READ_WORD_F(adr, src) |
14398 | res = -src - ((flag_X >> 8) & 1); |
14399 | flag_V = (res & src) >> 8; |
14400 | flag_N = flag_X = flag_C = res >> 8; |
14401 | flag_NotZ |= res & 0xFFFF; |
14402 | WRITE_WORD_F(adr, res) |
14403 | POST_IO |
14404 | RET(12) |
14405 | } |
14406 | |
14407 | // NEGX |
14408 | OPCODE(0x4067) |
14409 | { |
14410 | u32 adr, res; |
14411 | u32 src, dst; |
14412 | |
14413 | adr = AREG(7) - 2; |
14414 | AREG(7) = adr; |
14415 | PRE_IO |
14416 | READ_WORD_F(adr, src) |
14417 | res = -src - ((flag_X >> 8) & 1); |
14418 | flag_V = (res & src) >> 8; |
14419 | flag_N = flag_X = flag_C = res >> 8; |
14420 | flag_NotZ |= res & 0xFFFF; |
14421 | WRITE_WORD_F(adr, res) |
14422 | POST_IO |
14423 | RET(14) |
14424 | } |
14425 | |
14426 | // NEGX |
14427 | OPCODE(0x4080) |
14428 | { |
14429 | u32 adr, res; |
14430 | u32 src, dst; |
14431 | |
14432 | src = DREGu32((Opcode >> 0) & 7); |
14433 | res = -src - ((flag_X >> 8) & 1); |
14434 | flag_NotZ |= res; |
14435 | flag_V = (res & src) >> 24; |
14436 | flag_X = flag_C = (res?1:0)<<8; |
14437 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14438 | flag_N = res >> 24; |
14439 | DREGu32((Opcode >> 0) & 7) = res; |
14440 | RET(6) |
14441 | } |
14442 | |
14443 | // NEGX |
14444 | OPCODE(0x4090) |
14445 | { |
14446 | u32 adr, res; |
14447 | u32 src, dst; |
14448 | |
14449 | adr = AREG((Opcode >> 0) & 7); |
14450 | PRE_IO |
14451 | READ_LONG_F(adr, src) |
14452 | res = -src - ((flag_X >> 8) & 1); |
14453 | flag_NotZ |= res; |
14454 | flag_V = (res & src) >> 24; |
14455 | flag_X = flag_C = (res?1:0)<<8; |
14456 | // flag_X = flag_C = ((src & res & 1) | (src >> 1) | (res >> 1)) >> 23; |
14457 | flag_N = res >> 24; |
14458 | WRITE_LONG_F(adr, res) |
14459 | POST_IO |
14460 | RET(20) |
14461 | } |
14462 | |
14463 | // NEGX |
14464 | OPCODE(0x4098) |
14465 | { |
14466 | u32 adr, res; |
14467 | u32 src, dst; |
14468 | |
14469 | adr = AREG((Opcode >> 0) & 7); |
14470 | AREG((Opcode >> 0) & 7) += 4; |
14471 | PRE_IO |
14472 | READ_LONG_F(adr, src) |
14473 | res = -src - ((flag_X >> 8) & 1); |
14474 | flag_NotZ |= res; |
14475 | flag_V = (res & src) >> 24; |
14476 | flag_X = flag_C = (res?1:0)<<8; |
14477 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14478 | flag_N = res >> 24; |
14479 | WRITE_LONG_F(adr, res) |
14480 | POST_IO |
14481 | RET(20) |
14482 | } |
14483 | |
14484 | // NEGX |
14485 | OPCODE(0x40A0) |
14486 | { |
14487 | u32 adr, res; |
14488 | u32 src, dst; |
14489 | |
14490 | adr = AREG((Opcode >> 0) & 7) - 4; |
14491 | AREG((Opcode >> 0) & 7) = adr; |
14492 | PRE_IO |
14493 | READ_LONG_F(adr, src) |
14494 | res = -src - ((flag_X >> 8) & 1); |
14495 | flag_NotZ |= res; |
14496 | flag_V = (res & src) >> 24; |
14497 | flag_X = flag_C = (res?1:0)<<8; |
14498 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14499 | flag_N = res >> 24; |
14500 | WRITE_LONG_F(adr, res) |
14501 | POST_IO |
14502 | RET(22) |
14503 | } |
14504 | |
14505 | // NEGX |
14506 | OPCODE(0x40A8) |
14507 | { |
14508 | u32 adr, res; |
14509 | u32 src, dst; |
14510 | |
14511 | FETCH_SWORD(adr); |
14512 | adr += AREG((Opcode >> 0) & 7); |
14513 | PRE_IO |
14514 | READ_LONG_F(adr, src) |
14515 | res = -src - ((flag_X >> 8) & 1); |
14516 | flag_NotZ |= res; |
14517 | flag_V = (res & src) >> 24; |
14518 | flag_X = flag_C = (res?1:0)<<8; |
14519 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14520 | flag_N = res >> 24; |
14521 | WRITE_LONG_F(adr, res) |
14522 | POST_IO |
14523 | RET(24) |
14524 | } |
14525 | |
14526 | // NEGX |
14527 | OPCODE(0x40B0) |
14528 | { |
14529 | u32 adr, res; |
14530 | u32 src, dst; |
14531 | |
14532 | adr = AREG((Opcode >> 0) & 7); |
14533 | DECODE_EXT_WORD |
14534 | PRE_IO |
14535 | READ_LONG_F(adr, src) |
14536 | res = -src - ((flag_X >> 8) & 1); |
14537 | flag_NotZ |= res; |
14538 | flag_V = (res & src) >> 24; |
14539 | flag_X = flag_C = (res?1:0)<<8; |
14540 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14541 | flag_N = res >> 24; |
14542 | WRITE_LONG_F(adr, res) |
14543 | POST_IO |
14544 | RET(26) |
14545 | } |
14546 | |
14547 | // NEGX |
14548 | OPCODE(0x40B8) |
14549 | { |
14550 | u32 adr, res; |
14551 | u32 src, dst; |
14552 | |
14553 | FETCH_SWORD(adr); |
14554 | PRE_IO |
14555 | READ_LONG_F(adr, src) |
14556 | res = -src - ((flag_X >> 8) & 1); |
14557 | flag_NotZ |= res; |
14558 | flag_V = (res & src) >> 24; |
14559 | flag_X = flag_C = (res?1:0)<<8; |
14560 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14561 | flag_N = res >> 24; |
14562 | WRITE_LONG_F(adr, res) |
14563 | POST_IO |
14564 | RET(24) |
14565 | } |
14566 | |
14567 | // NEGX |
14568 | OPCODE(0x40B9) |
14569 | { |
14570 | u32 adr, res; |
14571 | u32 src, dst; |
14572 | |
14573 | FETCH_LONG(adr); |
14574 | PRE_IO |
14575 | READ_LONG_F(adr, src) |
14576 | res = -src - ((flag_X >> 8) & 1); |
14577 | flag_NotZ |= res; |
14578 | flag_V = (res & src) >> 24; |
14579 | flag_X = flag_C = (res?1:0)<<8; |
14580 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14581 | flag_N = res >> 24; |
14582 | WRITE_LONG_F(adr, res) |
14583 | POST_IO |
14584 | RET(28) |
14585 | } |
14586 | |
14587 | // NEGX |
14588 | OPCODE(0x409F) |
14589 | { |
14590 | u32 adr, res; |
14591 | u32 src, dst; |
14592 | |
14593 | adr = AREG(7); |
14594 | AREG(7) += 4; |
14595 | PRE_IO |
14596 | READ_LONG_F(adr, src) |
14597 | res = -src - ((flag_X >> 8) & 1); |
14598 | flag_NotZ |= res; |
14599 | flag_V = (res & src) >> 24; |
14600 | flag_X = flag_C = (res?1:0)<<8; |
14601 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14602 | flag_N = res >> 24; |
14603 | WRITE_LONG_F(adr, res) |
14604 | POST_IO |
14605 | RET(20) |
14606 | } |
14607 | |
14608 | // NEGX |
14609 | OPCODE(0x40A7) |
14610 | { |
14611 | u32 adr, res; |
14612 | u32 src, dst; |
14613 | |
14614 | adr = AREG(7) - 4; |
14615 | AREG(7) = adr; |
14616 | PRE_IO |
14617 | READ_LONG_F(adr, src) |
14618 | res = -src - ((flag_X >> 8) & 1); |
14619 | flag_NotZ |= res; |
14620 | flag_V = (res & src) >> 24; |
14621 | flag_X = flag_C = (res?1:0)<<8; |
14622 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14623 | flag_N = res >> 24; |
14624 | WRITE_LONG_F(adr, res) |
14625 | POST_IO |
14626 | RET(22) |
14627 | } |
14628 | |
14629 | // CLR |
14630 | OPCODE(0x4200) |
14631 | { |
14632 | u32 adr, res; |
14633 | u32 src, dst; |
14634 | |
14635 | res = 0; |
14636 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14637 | DREGu8((Opcode >> 0) & 7) = res; |
14638 | RET(4) |
14639 | } |
14640 | |
14641 | // CLR |
14642 | OPCODE(0x4210) |
14643 | { |
14644 | u32 adr, res; |
14645 | u32 src, dst; |
14646 | |
14647 | adr = AREG((Opcode >> 0) & 7); |
14648 | res = 0; |
14649 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14650 | PRE_IO |
14651 | WRITE_BYTE_F(adr, res) |
14652 | POST_IO |
14653 | RET(12) |
14654 | } |
14655 | |
14656 | // CLR |
14657 | OPCODE(0x4218) |
14658 | { |
14659 | u32 adr, res; |
14660 | u32 src, dst; |
14661 | |
14662 | adr = AREG((Opcode >> 0) & 7); |
14663 | AREG((Opcode >> 0) & 7) += 1; |
14664 | res = 0; |
14665 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14666 | PRE_IO |
14667 | WRITE_BYTE_F(adr, res) |
14668 | POST_IO |
14669 | RET(12) |
14670 | } |
14671 | |
14672 | // CLR |
14673 | OPCODE(0x4220) |
14674 | { |
14675 | u32 adr, res; |
14676 | u32 src, dst; |
14677 | |
14678 | adr = AREG((Opcode >> 0) & 7) - 1; |
14679 | AREG((Opcode >> 0) & 7) = adr; |
14680 | res = 0; |
14681 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14682 | PRE_IO |
14683 | WRITE_BYTE_F(adr, res) |
14684 | POST_IO |
14685 | RET(14) |
14686 | } |
14687 | |
14688 | // CLR |
14689 | OPCODE(0x4228) |
14690 | { |
14691 | u32 adr, res; |
14692 | u32 src, dst; |
14693 | |
14694 | FETCH_SWORD(adr); |
14695 | adr += AREG((Opcode >> 0) & 7); |
14696 | res = 0; |
14697 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14698 | PRE_IO |
14699 | WRITE_BYTE_F(adr, res) |
14700 | POST_IO |
14701 | RET(16) |
14702 | } |
14703 | |
14704 | // CLR |
14705 | OPCODE(0x4230) |
14706 | { |
14707 | u32 adr, res; |
14708 | u32 src, dst; |
14709 | |
14710 | adr = AREG((Opcode >> 0) & 7); |
14711 | DECODE_EXT_WORD |
14712 | res = 0; |
14713 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14714 | PRE_IO |
14715 | WRITE_BYTE_F(adr, res) |
14716 | POST_IO |
14717 | RET(18) |
14718 | } |
14719 | |
14720 | // CLR |
14721 | OPCODE(0x4238) |
14722 | { |
14723 | u32 adr, res; |
14724 | u32 src, dst; |
14725 | |
14726 | FETCH_SWORD(adr); |
14727 | res = 0; |
14728 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14729 | PRE_IO |
14730 | WRITE_BYTE_F(adr, res) |
14731 | POST_IO |
14732 | RET(16) |
14733 | } |
14734 | |
14735 | // CLR |
14736 | OPCODE(0x4239) |
14737 | { |
14738 | u32 adr, res; |
14739 | u32 src, dst; |
14740 | |
14741 | FETCH_LONG(adr); |
14742 | res = 0; |
14743 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14744 | PRE_IO |
14745 | WRITE_BYTE_F(adr, res) |
14746 | POST_IO |
14747 | RET(20) |
14748 | } |
14749 | |
14750 | // CLR |
14751 | OPCODE(0x421F) |
14752 | { |
14753 | u32 adr, res; |
14754 | u32 src, dst; |
14755 | |
14756 | adr = AREG(7); |
14757 | AREG(7) += 2; |
14758 | res = 0; |
14759 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14760 | PRE_IO |
14761 | WRITE_BYTE_F(adr, res) |
14762 | POST_IO |
14763 | RET(12) |
14764 | } |
14765 | |
14766 | // CLR |
14767 | OPCODE(0x4227) |
14768 | { |
14769 | u32 adr, res; |
14770 | u32 src, dst; |
14771 | |
14772 | adr = AREG(7) - 2; |
14773 | AREG(7) = adr; |
14774 | res = 0; |
14775 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14776 | PRE_IO |
14777 | WRITE_BYTE_F(adr, res) |
14778 | POST_IO |
14779 | RET(14) |
14780 | } |
14781 | |
14782 | // CLR |
14783 | OPCODE(0x4240) |
14784 | { |
14785 | u32 adr, res; |
14786 | u32 src, dst; |
14787 | |
14788 | res = 0; |
14789 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14790 | DREGu16((Opcode >> 0) & 7) = res; |
14791 | RET(4) |
14792 | } |
14793 | |
14794 | // CLR |
14795 | OPCODE(0x4250) |
14796 | { |
14797 | u32 adr, res; |
14798 | u32 src, dst; |
14799 | |
14800 | adr = AREG((Opcode >> 0) & 7); |
14801 | res = 0; |
14802 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14803 | PRE_IO |
14804 | WRITE_WORD_F(adr, res) |
14805 | POST_IO |
14806 | RET(12) |
14807 | } |
14808 | |
14809 | // CLR |
14810 | OPCODE(0x4258) |
14811 | { |
14812 | u32 adr, res; |
14813 | u32 src, dst; |
14814 | |
14815 | adr = AREG((Opcode >> 0) & 7); |
14816 | AREG((Opcode >> 0) & 7) += 2; |
14817 | res = 0; |
14818 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14819 | PRE_IO |
14820 | WRITE_WORD_F(adr, res) |
14821 | POST_IO |
14822 | RET(12) |
14823 | } |
14824 | |
14825 | // CLR |
14826 | OPCODE(0x4260) |
14827 | { |
14828 | u32 adr, res; |
14829 | u32 src, dst; |
14830 | |
14831 | adr = AREG((Opcode >> 0) & 7) - 2; |
14832 | AREG((Opcode >> 0) & 7) = adr; |
14833 | res = 0; |
14834 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14835 | PRE_IO |
14836 | WRITE_WORD_F(adr, res) |
14837 | POST_IO |
14838 | RET(14) |
14839 | } |
14840 | |
14841 | // CLR |
14842 | OPCODE(0x4268) |
14843 | { |
14844 | u32 adr, res; |
14845 | u32 src, dst; |
14846 | |
14847 | FETCH_SWORD(adr); |
14848 | adr += AREG((Opcode >> 0) & 7); |
14849 | res = 0; |
14850 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14851 | PRE_IO |
14852 | WRITE_WORD_F(adr, res) |
14853 | POST_IO |
14854 | RET(16) |
14855 | } |
14856 | |
14857 | // CLR |
14858 | OPCODE(0x4270) |
14859 | { |
14860 | u32 adr, res; |
14861 | u32 src, dst; |
14862 | |
14863 | adr = AREG((Opcode >> 0) & 7); |
14864 | DECODE_EXT_WORD |
14865 | res = 0; |
14866 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14867 | PRE_IO |
14868 | WRITE_WORD_F(adr, res) |
14869 | POST_IO |
14870 | RET(18) |
14871 | } |
14872 | |
14873 | // CLR |
14874 | OPCODE(0x4278) |
14875 | { |
14876 | u32 adr, res; |
14877 | u32 src, dst; |
14878 | |
14879 | FETCH_SWORD(adr); |
14880 | res = 0; |
14881 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14882 | PRE_IO |
14883 | WRITE_WORD_F(adr, res) |
14884 | POST_IO |
14885 | RET(16) |
14886 | } |
14887 | |
14888 | // CLR |
14889 | OPCODE(0x4279) |
14890 | { |
14891 | u32 adr, res; |
14892 | u32 src, dst; |
14893 | |
14894 | FETCH_LONG(adr); |
14895 | res = 0; |
14896 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14897 | PRE_IO |
14898 | WRITE_WORD_F(adr, res) |
14899 | POST_IO |
14900 | RET(20) |
14901 | } |
14902 | |
14903 | // CLR |
14904 | OPCODE(0x425F) |
14905 | { |
14906 | u32 adr, res; |
14907 | u32 src, dst; |
14908 | |
14909 | adr = AREG(7); |
14910 | AREG(7) += 2; |
14911 | res = 0; |
14912 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14913 | PRE_IO |
14914 | WRITE_WORD_F(adr, res) |
14915 | POST_IO |
14916 | RET(12) |
14917 | } |
14918 | |
14919 | // CLR |
14920 | OPCODE(0x4267) |
14921 | { |
14922 | u32 adr, res; |
14923 | u32 src, dst; |
14924 | |
14925 | adr = AREG(7) - 2; |
14926 | AREG(7) = adr; |
14927 | res = 0; |
14928 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14929 | PRE_IO |
14930 | WRITE_WORD_F(adr, res) |
14931 | POST_IO |
14932 | RET(14) |
14933 | } |
14934 | |
14935 | // CLR |
14936 | OPCODE(0x4280) |
14937 | { |
14938 | u32 adr, res; |
14939 | u32 src, dst; |
14940 | |
14941 | res = 0; |
14942 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14943 | DREGu32((Opcode >> 0) & 7) = res; |
14944 | RET(6) |
14945 | } |
14946 | |
14947 | // CLR |
14948 | OPCODE(0x4290) |
14949 | { |
14950 | u32 adr, res; |
14951 | u32 src, dst; |
14952 | |
14953 | adr = AREG((Opcode >> 0) & 7); |
14954 | res = 0; |
14955 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14956 | PRE_IO |
14957 | WRITE_LONG_F(adr, res) |
14958 | POST_IO |
14959 | RET(20) |
14960 | } |
14961 | |
14962 | // CLR |
14963 | OPCODE(0x4298) |
14964 | { |
14965 | u32 adr, res; |
14966 | u32 src, dst; |
14967 | |
14968 | adr = AREG((Opcode >> 0) & 7); |
14969 | AREG((Opcode >> 0) & 7) += 4; |
14970 | res = 0; |
14971 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14972 | PRE_IO |
14973 | WRITE_LONG_F(adr, res) |
14974 | POST_IO |
14975 | RET(20) |
14976 | } |
14977 | |
14978 | // CLR |
14979 | OPCODE(0x42A0) |
14980 | { |
14981 | u32 adr, res; |
14982 | u32 src, dst; |
14983 | |
14984 | adr = AREG((Opcode >> 0) & 7) - 4; |
14985 | AREG((Opcode >> 0) & 7) = adr; |
14986 | res = 0; |
14987 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14988 | PRE_IO |
14989 | WRITE_LONG_F(adr, res) |
14990 | POST_IO |
14991 | RET(22) |
14992 | } |
14993 | |
14994 | // CLR |
14995 | OPCODE(0x42A8) |
14996 | { |
14997 | u32 adr, res; |
14998 | u32 src, dst; |
14999 | |
15000 | FETCH_SWORD(adr); |
15001 | adr += AREG((Opcode >> 0) & 7); |
15002 | res = 0; |
15003 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15004 | PRE_IO |
15005 | WRITE_LONG_F(adr, res) |
15006 | POST_IO |
15007 | RET(24) |
15008 | } |
15009 | |
15010 | // CLR |
15011 | OPCODE(0x42B0) |
15012 | { |
15013 | u32 adr, res; |
15014 | u32 src, dst; |
15015 | |
15016 | adr = AREG((Opcode >> 0) & 7); |
15017 | DECODE_EXT_WORD |
15018 | res = 0; |
15019 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15020 | PRE_IO |
15021 | WRITE_LONG_F(adr, res) |
15022 | POST_IO |
15023 | RET(26) |
15024 | } |
15025 | |
15026 | // CLR |
15027 | OPCODE(0x42B8) |
15028 | { |
15029 | u32 adr, res; |
15030 | u32 src, dst; |
15031 | |
15032 | FETCH_SWORD(adr); |
15033 | res = 0; |
15034 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15035 | PRE_IO |
15036 | WRITE_LONG_F(adr, res) |
15037 | POST_IO |
15038 | RET(24) |
15039 | } |
15040 | |
15041 | // CLR |
15042 | OPCODE(0x42B9) |
15043 | { |
15044 | u32 adr, res; |
15045 | u32 src, dst; |
15046 | |
15047 | FETCH_LONG(adr); |
15048 | res = 0; |
15049 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15050 | PRE_IO |
15051 | WRITE_LONG_F(adr, res) |
15052 | POST_IO |
15053 | RET(28) |
15054 | } |
15055 | |
15056 | // CLR |
15057 | OPCODE(0x429F) |
15058 | { |
15059 | u32 adr, res; |
15060 | u32 src, dst; |
15061 | |
15062 | adr = AREG(7); |
15063 | AREG(7) += 4; |
15064 | res = 0; |
15065 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15066 | PRE_IO |
15067 | WRITE_LONG_F(adr, res) |
15068 | POST_IO |
15069 | RET(20) |
15070 | } |
15071 | |
15072 | // CLR |
15073 | OPCODE(0x42A7) |
15074 | { |
15075 | u32 adr, res; |
15076 | u32 src, dst; |
15077 | |
15078 | adr = AREG(7) - 4; |
15079 | AREG(7) = adr; |
15080 | res = 0; |
15081 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15082 | PRE_IO |
15083 | WRITE_LONG_F(adr, res) |
15084 | POST_IO |
15085 | RET(22) |
15086 | } |
15087 | |
15088 | // NEG |
15089 | OPCODE(0x4400) |
15090 | { |
15091 | u32 adr, res; |
15092 | u32 src, dst; |
15093 | |
15094 | src = DREGu8((Opcode >> 0) & 7); |
15095 | res = -src; |
15096 | flag_V = res & src; |
15097 | flag_N = flag_X = flag_C = res; |
15098 | flag_NotZ = res & 0xFF; |
15099 | DREGu8((Opcode >> 0) & 7) = res; |
15100 | RET(4) |
15101 | } |
15102 | |
15103 | // NEG |
15104 | OPCODE(0x4410) |
15105 | { |
15106 | u32 adr, res; |
15107 | u32 src, dst; |
15108 | |
15109 | adr = AREG((Opcode >> 0) & 7); |
15110 | PRE_IO |
15111 | READ_BYTE_F(adr, src) |
15112 | res = -src; |
15113 | flag_V = res & src; |
15114 | flag_N = flag_X = flag_C = res; |
15115 | flag_NotZ = res & 0xFF; |
15116 | WRITE_BYTE_F(adr, res) |
15117 | POST_IO |
15118 | RET(12) |
15119 | } |
15120 | |
15121 | // NEG |
15122 | OPCODE(0x4418) |
15123 | { |
15124 | u32 adr, res; |
15125 | u32 src, dst; |
15126 | |
15127 | adr = AREG((Opcode >> 0) & 7); |
15128 | AREG((Opcode >> 0) & 7) += 1; |
15129 | PRE_IO |
15130 | READ_BYTE_F(adr, src) |
15131 | res = -src; |
15132 | flag_V = res & src; |
15133 | flag_N = flag_X = flag_C = res; |
15134 | flag_NotZ = res & 0xFF; |
15135 | WRITE_BYTE_F(adr, res) |
15136 | POST_IO |
15137 | RET(12) |
15138 | } |
15139 | |
15140 | // NEG |
15141 | OPCODE(0x4420) |
15142 | { |
15143 | u32 adr, res; |
15144 | u32 src, dst; |
15145 | |
15146 | adr = AREG((Opcode >> 0) & 7) - 1; |
15147 | AREG((Opcode >> 0) & 7) = adr; |
15148 | PRE_IO |
15149 | READ_BYTE_F(adr, src) |
15150 | res = -src; |
15151 | flag_V = res & src; |
15152 | flag_N = flag_X = flag_C = res; |
15153 | flag_NotZ = res & 0xFF; |
15154 | WRITE_BYTE_F(adr, res) |
15155 | POST_IO |
15156 | RET(14) |
15157 | } |
15158 | |
15159 | // NEG |
15160 | OPCODE(0x4428) |
15161 | { |
15162 | u32 adr, res; |
15163 | u32 src, dst; |
15164 | |
15165 | FETCH_SWORD(adr); |
15166 | adr += AREG((Opcode >> 0) & 7); |
15167 | PRE_IO |
15168 | READ_BYTE_F(adr, src) |
15169 | res = -src; |
15170 | flag_V = res & src; |
15171 | flag_N = flag_X = flag_C = res; |
15172 | flag_NotZ = res & 0xFF; |
15173 | WRITE_BYTE_F(adr, res) |
15174 | POST_IO |
15175 | RET(16) |
15176 | } |
15177 | |
15178 | // NEG |
15179 | OPCODE(0x4430) |
15180 | { |
15181 | u32 adr, res; |
15182 | u32 src, dst; |
15183 | |
15184 | adr = AREG((Opcode >> 0) & 7); |
15185 | DECODE_EXT_WORD |
15186 | PRE_IO |
15187 | READ_BYTE_F(adr, src) |
15188 | res = -src; |
15189 | flag_V = res & src; |
15190 | flag_N = flag_X = flag_C = res; |
15191 | flag_NotZ = res & 0xFF; |
15192 | WRITE_BYTE_F(adr, res) |
15193 | POST_IO |
15194 | RET(18) |
15195 | } |
15196 | |
15197 | // NEG |
15198 | OPCODE(0x4438) |
15199 | { |
15200 | u32 adr, res; |
15201 | u32 src, dst; |
15202 | |
15203 | FETCH_SWORD(adr); |
15204 | PRE_IO |
15205 | READ_BYTE_F(adr, src) |
15206 | res = -src; |
15207 | flag_V = res & src; |
15208 | flag_N = flag_X = flag_C = res; |
15209 | flag_NotZ = res & 0xFF; |
15210 | WRITE_BYTE_F(adr, res) |
15211 | POST_IO |
15212 | RET(16) |
15213 | } |
15214 | |
15215 | // NEG |
15216 | OPCODE(0x4439) |
15217 | { |
15218 | u32 adr, res; |
15219 | u32 src, dst; |
15220 | |
15221 | FETCH_LONG(adr); |
15222 | PRE_IO |
15223 | READ_BYTE_F(adr, src) |
15224 | res = -src; |
15225 | flag_V = res & src; |
15226 | flag_N = flag_X = flag_C = res; |
15227 | flag_NotZ = res & 0xFF; |
15228 | WRITE_BYTE_F(adr, res) |
15229 | POST_IO |
15230 | RET(20) |
15231 | } |
15232 | |
15233 | // NEG |
15234 | OPCODE(0x441F) |
15235 | { |
15236 | u32 adr, res; |
15237 | u32 src, dst; |
15238 | |
15239 | adr = AREG(7); |
15240 | AREG(7) += 2; |
15241 | PRE_IO |
15242 | READ_BYTE_F(adr, src) |
15243 | res = -src; |
15244 | flag_V = res & src; |
15245 | flag_N = flag_X = flag_C = res; |
15246 | flag_NotZ = res & 0xFF; |
15247 | WRITE_BYTE_F(adr, res) |
15248 | POST_IO |
15249 | RET(12) |
15250 | } |
15251 | |
15252 | // NEG |
15253 | OPCODE(0x4427) |
15254 | { |
15255 | u32 adr, res; |
15256 | u32 src, dst; |
15257 | |
15258 | adr = AREG(7) - 2; |
15259 | AREG(7) = adr; |
15260 | PRE_IO |
15261 | READ_BYTE_F(adr, src) |
15262 | res = -src; |
15263 | flag_V = res & src; |
15264 | flag_N = flag_X = flag_C = res; |
15265 | flag_NotZ = res & 0xFF; |
15266 | WRITE_BYTE_F(adr, res) |
15267 | POST_IO |
15268 | RET(14) |
15269 | } |
15270 | |
15271 | // NEG |
15272 | OPCODE(0x4440) |
15273 | { |
15274 | u32 adr, res; |
15275 | u32 src, dst; |
15276 | |
15277 | src = DREGu16((Opcode >> 0) & 7); |
15278 | res = -src; |
15279 | flag_V = (res & src) >> 8; |
15280 | flag_N = flag_X = flag_C = res >> 8; |
15281 | flag_NotZ = res & 0xFFFF; |
15282 | DREGu16((Opcode >> 0) & 7) = res; |
15283 | RET(4) |
15284 | } |
15285 | |
15286 | // NEG |
15287 | OPCODE(0x4450) |
15288 | { |
15289 | u32 adr, res; |
15290 | u32 src, dst; |
15291 | |
15292 | adr = AREG((Opcode >> 0) & 7); |
15293 | PRE_IO |
15294 | READ_WORD_F(adr, src) |
15295 | res = -src; |
15296 | flag_V = (res & src) >> 8; |
15297 | flag_N = flag_X = flag_C = res >> 8; |
15298 | flag_NotZ = res & 0xFFFF; |
15299 | WRITE_WORD_F(adr, res) |
15300 | POST_IO |
15301 | RET(12) |
15302 | } |
15303 | |
15304 | // NEG |
15305 | OPCODE(0x4458) |
15306 | { |
15307 | u32 adr, res; |
15308 | u32 src, dst; |
15309 | |
15310 | adr = AREG((Opcode >> 0) & 7); |
15311 | AREG((Opcode >> 0) & 7) += 2; |
15312 | PRE_IO |
15313 | READ_WORD_F(adr, src) |
15314 | res = -src; |
15315 | flag_V = (res & src) >> 8; |
15316 | flag_N = flag_X = flag_C = res >> 8; |
15317 | flag_NotZ = res & 0xFFFF; |
15318 | WRITE_WORD_F(adr, res) |
15319 | POST_IO |
15320 | RET(12) |
15321 | } |
15322 | |
15323 | // NEG |
15324 | OPCODE(0x4460) |
15325 | { |
15326 | u32 adr, res; |
15327 | u32 src, dst; |
15328 | |
15329 | adr = AREG((Opcode >> 0) & 7) - 2; |
15330 | AREG((Opcode >> 0) & 7) = adr; |
15331 | PRE_IO |
15332 | READ_WORD_F(adr, src) |
15333 | res = -src; |
15334 | flag_V = (res & src) >> 8; |
15335 | flag_N = flag_X = flag_C = res >> 8; |
15336 | flag_NotZ = res & 0xFFFF; |
15337 | WRITE_WORD_F(adr, res) |
15338 | POST_IO |
15339 | RET(14) |
15340 | } |
15341 | |
15342 | // NEG |
15343 | OPCODE(0x4468) |
15344 | { |
15345 | u32 adr, res; |
15346 | u32 src, dst; |
15347 | |
15348 | FETCH_SWORD(adr); |
15349 | adr += AREG((Opcode >> 0) & 7); |
15350 | PRE_IO |
15351 | READ_WORD_F(adr, src) |
15352 | res = -src; |
15353 | flag_V = (res & src) >> 8; |
15354 | flag_N = flag_X = flag_C = res >> 8; |
15355 | flag_NotZ = res & 0xFFFF; |
15356 | WRITE_WORD_F(adr, res) |
15357 | POST_IO |
15358 | RET(16) |
15359 | } |
15360 | |
15361 | // NEG |
15362 | OPCODE(0x4470) |
15363 | { |
15364 | u32 adr, res; |
15365 | u32 src, dst; |
15366 | |
15367 | adr = AREG((Opcode >> 0) & 7); |
15368 | DECODE_EXT_WORD |
15369 | PRE_IO |
15370 | READ_WORD_F(adr, src) |
15371 | res = -src; |
15372 | flag_V = (res & src) >> 8; |
15373 | flag_N = flag_X = flag_C = res >> 8; |
15374 | flag_NotZ = res & 0xFFFF; |
15375 | WRITE_WORD_F(adr, res) |
15376 | POST_IO |
15377 | RET(18) |
15378 | } |
15379 | |
15380 | // NEG |
15381 | OPCODE(0x4478) |
15382 | { |
15383 | u32 adr, res; |
15384 | u32 src, dst; |
15385 | |
15386 | FETCH_SWORD(adr); |
15387 | PRE_IO |
15388 | READ_WORD_F(adr, src) |
15389 | res = -src; |
15390 | flag_V = (res & src) >> 8; |
15391 | flag_N = flag_X = flag_C = res >> 8; |
15392 | flag_NotZ = res & 0xFFFF; |
15393 | WRITE_WORD_F(adr, res) |
15394 | POST_IO |
15395 | RET(16) |
15396 | } |
15397 | |
15398 | // NEG |
15399 | OPCODE(0x4479) |
15400 | { |
15401 | u32 adr, res; |
15402 | u32 src, dst; |
15403 | |
15404 | FETCH_LONG(adr); |
15405 | PRE_IO |
15406 | READ_WORD_F(adr, src) |
15407 | res = -src; |
15408 | flag_V = (res & src) >> 8; |
15409 | flag_N = flag_X = flag_C = res >> 8; |
15410 | flag_NotZ = res & 0xFFFF; |
15411 | WRITE_WORD_F(adr, res) |
15412 | POST_IO |
15413 | RET(20) |
15414 | } |
15415 | |
15416 | // NEG |
15417 | OPCODE(0x445F) |
15418 | { |
15419 | u32 adr, res; |
15420 | u32 src, dst; |
15421 | |
15422 | adr = AREG(7); |
15423 | AREG(7) += 2; |
15424 | PRE_IO |
15425 | READ_WORD_F(adr, src) |
15426 | res = -src; |
15427 | flag_V = (res & src) >> 8; |
15428 | flag_N = flag_X = flag_C = res >> 8; |
15429 | flag_NotZ = res & 0xFFFF; |
15430 | WRITE_WORD_F(adr, res) |
15431 | POST_IO |
15432 | RET(12) |
15433 | } |
15434 | |
15435 | // NEG |
15436 | OPCODE(0x4467) |
15437 | { |
15438 | u32 adr, res; |
15439 | u32 src, dst; |
15440 | |
15441 | adr = AREG(7) - 2; |
15442 | AREG(7) = adr; |
15443 | PRE_IO |
15444 | READ_WORD_F(adr, src) |
15445 | res = -src; |
15446 | flag_V = (res & src) >> 8; |
15447 | flag_N = flag_X = flag_C = res >> 8; |
15448 | flag_NotZ = res & 0xFFFF; |
15449 | WRITE_WORD_F(adr, res) |
15450 | POST_IO |
15451 | RET(14) |
15452 | } |
15453 | |
15454 | // NEG |
15455 | OPCODE(0x4480) |
15456 | { |
15457 | u32 adr, res; |
15458 | u32 src, dst; |
15459 | |
15460 | src = DREGu32((Opcode >> 0) & 7); |
15461 | res = -src; |
15462 | flag_NotZ = res; |
15463 | flag_V = (res & src) >> 24; |
15464 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15465 | flag_N = res >> 24; |
15466 | DREGu32((Opcode >> 0) & 7) = res; |
15467 | RET(6) |
15468 | } |
15469 | |
15470 | // NEG |
15471 | OPCODE(0x4490) |
15472 | { |
15473 | u32 adr, res; |
15474 | u32 src, dst; |
15475 | |
15476 | adr = AREG((Opcode >> 0) & 7); |
15477 | PRE_IO |
15478 | READ_LONG_F(adr, src) |
15479 | res = -src; |
15480 | flag_NotZ = res; |
15481 | flag_V = (res & src) >> 24; |
15482 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15483 | flag_N = res >> 24; |
15484 | WRITE_LONG_F(adr, res) |
15485 | POST_IO |
15486 | RET(20) |
15487 | } |
15488 | |
15489 | // NEG |
15490 | OPCODE(0x4498) |
15491 | { |
15492 | u32 adr, res; |
15493 | u32 src, dst; |
15494 | |
15495 | adr = AREG((Opcode >> 0) & 7); |
15496 | AREG((Opcode >> 0) & 7) += 4; |
15497 | PRE_IO |
15498 | READ_LONG_F(adr, src) |
15499 | res = -src; |
15500 | flag_NotZ = res; |
15501 | flag_V = (res & src) >> 24; |
15502 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15503 | flag_N = res >> 24; |
15504 | WRITE_LONG_F(adr, res) |
15505 | POST_IO |
15506 | RET(20) |
15507 | } |
15508 | |
15509 | // NEG |
15510 | OPCODE(0x44A0) |
15511 | { |
15512 | u32 adr, res; |
15513 | u32 src, dst; |
15514 | |
15515 | adr = AREG((Opcode >> 0) & 7) - 4; |
15516 | AREG((Opcode >> 0) & 7) = adr; |
15517 | PRE_IO |
15518 | READ_LONG_F(adr, src) |
15519 | res = -src; |
15520 | flag_NotZ = res; |
15521 | flag_V = (res & src) >> 24; |
15522 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15523 | flag_N = res >> 24; |
15524 | WRITE_LONG_F(adr, res) |
15525 | POST_IO |
15526 | RET(22) |
15527 | } |
15528 | |
15529 | // NEG |
15530 | OPCODE(0x44A8) |
15531 | { |
15532 | u32 adr, res; |
15533 | u32 src, dst; |
15534 | |
15535 | FETCH_SWORD(adr); |
15536 | adr += AREG((Opcode >> 0) & 7); |
15537 | PRE_IO |
15538 | READ_LONG_F(adr, src) |
15539 | res = -src; |
15540 | flag_NotZ = res; |
15541 | flag_V = (res & src) >> 24; |
15542 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15543 | flag_N = res >> 24; |
15544 | WRITE_LONG_F(adr, res) |
15545 | POST_IO |
15546 | RET(24) |
15547 | } |
15548 | |
15549 | // NEG |
15550 | OPCODE(0x44B0) |
15551 | { |
15552 | u32 adr, res; |
15553 | u32 src, dst; |
15554 | |
15555 | adr = AREG((Opcode >> 0) & 7); |
15556 | DECODE_EXT_WORD |
15557 | PRE_IO |
15558 | READ_LONG_F(adr, src) |
15559 | res = -src; |
15560 | flag_NotZ = res; |
15561 | flag_V = (res & src) >> 24; |
15562 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15563 | flag_N = res >> 24; |
15564 | WRITE_LONG_F(adr, res) |
15565 | POST_IO |
15566 | RET(26) |
15567 | } |
15568 | |
15569 | // NEG |
15570 | OPCODE(0x44B8) |
15571 | { |
15572 | u32 adr, res; |
15573 | u32 src, dst; |
15574 | |
15575 | FETCH_SWORD(adr); |
15576 | PRE_IO |
15577 | READ_LONG_F(adr, src) |
15578 | res = -src; |
15579 | flag_NotZ = res; |
15580 | flag_V = (res & src) >> 24; |
15581 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15582 | flag_N = res >> 24; |
15583 | WRITE_LONG_F(adr, res) |
15584 | POST_IO |
15585 | RET(24) |
15586 | } |
15587 | |
15588 | // NEG |
15589 | OPCODE(0x44B9) |
15590 | { |
15591 | u32 adr, res; |
15592 | u32 src, dst; |
15593 | |
15594 | FETCH_LONG(adr); |
15595 | PRE_IO |
15596 | READ_LONG_F(adr, src) |
15597 | res = -src; |
15598 | flag_NotZ = res; |
15599 | flag_V = (res & src) >> 24; |
15600 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15601 | flag_N = res >> 24; |
15602 | WRITE_LONG_F(adr, res) |
15603 | POST_IO |
15604 | RET(28) |
15605 | } |
15606 | |
15607 | // NEG |
15608 | OPCODE(0x449F) |
15609 | { |
15610 | u32 adr, res; |
15611 | u32 src, dst; |
15612 | |
15613 | adr = AREG(7); |
15614 | AREG(7) += 4; |
15615 | PRE_IO |
15616 | READ_LONG_F(adr, src) |
15617 | res = -src; |
15618 | flag_NotZ = res; |
15619 | flag_V = (res & src) >> 24; |
15620 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15621 | flag_N = res >> 24; |
15622 | WRITE_LONG_F(adr, res) |
15623 | POST_IO |
15624 | RET(20) |
15625 | } |
15626 | |
15627 | // NEG |
15628 | OPCODE(0x44A7) |
15629 | { |
15630 | u32 adr, res; |
15631 | u32 src, dst; |
15632 | |
15633 | adr = AREG(7) - 4; |
15634 | AREG(7) = adr; |
15635 | PRE_IO |
15636 | READ_LONG_F(adr, src) |
15637 | res = -src; |
15638 | flag_NotZ = res; |
15639 | flag_V = (res & src) >> 24; |
15640 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15641 | flag_N = res >> 24; |
15642 | WRITE_LONG_F(adr, res) |
15643 | POST_IO |
15644 | RET(22) |
15645 | } |
15646 | |
15647 | // NOT |
15648 | OPCODE(0x4600) |
15649 | { |
15650 | u32 adr, res; |
15651 | u32 src, dst; |
15652 | |
15653 | src = DREGu8((Opcode >> 0) & 7); |
15654 | res = ~src; |
15655 | flag_C = 0; |
15656 | flag_V = 0; |
15657 | flag_N = res; |
15658 | flag_NotZ = res & 0xFF; |
15659 | DREGu8((Opcode >> 0) & 7) = res; |
15660 | RET(4) |
15661 | } |
15662 | |
15663 | // NOT |
15664 | OPCODE(0x4610) |
15665 | { |
15666 | u32 adr, res; |
15667 | u32 src, dst; |
15668 | |
15669 | adr = AREG((Opcode >> 0) & 7); |
15670 | PRE_IO |
15671 | READ_BYTE_F(adr, src) |
15672 | res = ~src; |
15673 | flag_C = 0; |
15674 | flag_V = 0; |
15675 | flag_N = res; |
15676 | flag_NotZ = res & 0xFF; |
15677 | WRITE_BYTE_F(adr, res) |
15678 | POST_IO |
15679 | RET(12) |
15680 | } |
15681 | |
15682 | // NOT |
15683 | OPCODE(0x4618) |
15684 | { |
15685 | u32 adr, res; |
15686 | u32 src, dst; |
15687 | |
15688 | adr = AREG((Opcode >> 0) & 7); |
15689 | AREG((Opcode >> 0) & 7) += 1; |
15690 | PRE_IO |
15691 | READ_BYTE_F(adr, src) |
15692 | res = ~src; |
15693 | flag_C = 0; |
15694 | flag_V = 0; |
15695 | flag_N = res; |
15696 | flag_NotZ = res & 0xFF; |
15697 | WRITE_BYTE_F(adr, res) |
15698 | POST_IO |
15699 | RET(12) |
15700 | } |
15701 | |
15702 | // NOT |
15703 | OPCODE(0x4620) |
15704 | { |
15705 | u32 adr, res; |
15706 | u32 src, dst; |
15707 | |
15708 | adr = AREG((Opcode >> 0) & 7) - 1; |
15709 | AREG((Opcode >> 0) & 7) = adr; |
15710 | PRE_IO |
15711 | READ_BYTE_F(adr, src) |
15712 | res = ~src; |
15713 | flag_C = 0; |
15714 | flag_V = 0; |
15715 | flag_N = res; |
15716 | flag_NotZ = res & 0xFF; |
15717 | WRITE_BYTE_F(adr, res) |
15718 | POST_IO |
15719 | RET(14) |
15720 | } |
15721 | |
15722 | // NOT |
15723 | OPCODE(0x4628) |
15724 | { |
15725 | u32 adr, res; |
15726 | u32 src, dst; |
15727 | |
15728 | FETCH_SWORD(adr); |
15729 | adr += AREG((Opcode >> 0) & 7); |
15730 | PRE_IO |
15731 | READ_BYTE_F(adr, src) |
15732 | res = ~src; |
15733 | flag_C = 0; |
15734 | flag_V = 0; |
15735 | flag_N = res; |
15736 | flag_NotZ = res & 0xFF; |
15737 | WRITE_BYTE_F(adr, res) |
15738 | POST_IO |
15739 | RET(16) |
15740 | } |
15741 | |
15742 | // NOT |
15743 | OPCODE(0x4630) |
15744 | { |
15745 | u32 adr, res; |
15746 | u32 src, dst; |
15747 | |
15748 | adr = AREG((Opcode >> 0) & 7); |
15749 | DECODE_EXT_WORD |
15750 | PRE_IO |
15751 | READ_BYTE_F(adr, src) |
15752 | res = ~src; |
15753 | flag_C = 0; |
15754 | flag_V = 0; |
15755 | flag_N = res; |
15756 | flag_NotZ = res & 0xFF; |
15757 | WRITE_BYTE_F(adr, res) |
15758 | POST_IO |
15759 | RET(18) |
15760 | } |
15761 | |
15762 | // NOT |
15763 | OPCODE(0x4638) |
15764 | { |
15765 | u32 adr, res; |
15766 | u32 src, dst; |
15767 | |
15768 | FETCH_SWORD(adr); |
15769 | PRE_IO |
15770 | READ_BYTE_F(adr, src) |
15771 | res = ~src; |
15772 | flag_C = 0; |
15773 | flag_V = 0; |
15774 | flag_N = res; |
15775 | flag_NotZ = res & 0xFF; |
15776 | WRITE_BYTE_F(adr, res) |
15777 | POST_IO |
15778 | RET(16) |
15779 | } |
15780 | |
15781 | // NOT |
15782 | OPCODE(0x4639) |
15783 | { |
15784 | u32 adr, res; |
15785 | u32 src, dst; |
15786 | |
15787 | FETCH_LONG(adr); |
15788 | PRE_IO |
15789 | READ_BYTE_F(adr, src) |
15790 | res = ~src; |
15791 | flag_C = 0; |
15792 | flag_V = 0; |
15793 | flag_N = res; |
15794 | flag_NotZ = res & 0xFF; |
15795 | WRITE_BYTE_F(adr, res) |
15796 | POST_IO |
15797 | RET(20) |
15798 | } |
15799 | |
15800 | // NOT |
15801 | OPCODE(0x461F) |
15802 | { |
15803 | u32 adr, res; |
15804 | u32 src, dst; |
15805 | |
15806 | adr = AREG(7); |
15807 | AREG(7) += 2; |
15808 | PRE_IO |
15809 | READ_BYTE_F(adr, src) |
15810 | res = ~src; |
15811 | flag_C = 0; |
15812 | flag_V = 0; |
15813 | flag_N = res; |
15814 | flag_NotZ = res & 0xFF; |
15815 | WRITE_BYTE_F(adr, res) |
15816 | POST_IO |
15817 | RET(12) |
15818 | } |
15819 | |
15820 | // NOT |
15821 | OPCODE(0x4627) |
15822 | { |
15823 | u32 adr, res; |
15824 | u32 src, dst; |
15825 | |
15826 | adr = AREG(7) - 2; |
15827 | AREG(7) = adr; |
15828 | PRE_IO |
15829 | READ_BYTE_F(adr, src) |
15830 | res = ~src; |
15831 | flag_C = 0; |
15832 | flag_V = 0; |
15833 | flag_N = res; |
15834 | flag_NotZ = res & 0xFF; |
15835 | WRITE_BYTE_F(adr, res) |
15836 | POST_IO |
15837 | RET(14) |
15838 | } |
15839 | |
15840 | // NOT |
15841 | OPCODE(0x4640) |
15842 | { |
15843 | u32 adr, res; |
15844 | u32 src, dst; |
15845 | |
15846 | src = DREGu16((Opcode >> 0) & 7); |
15847 | res = ~src; |
15848 | flag_C = 0; |
15849 | flag_V = 0; |
15850 | flag_NotZ = res & 0xFFFF; |
15851 | flag_N = res >> 8; |
15852 | DREGu16((Opcode >> 0) & 7) = res; |
15853 | RET(4) |
15854 | } |
15855 | |
15856 | // NOT |
15857 | OPCODE(0x4650) |
15858 | { |
15859 | u32 adr, res; |
15860 | u32 src, dst; |
15861 | |
15862 | adr = AREG((Opcode >> 0) & 7); |
15863 | PRE_IO |
15864 | READ_WORD_F(adr, src) |
15865 | res = ~src; |
15866 | flag_C = 0; |
15867 | flag_V = 0; |
15868 | flag_NotZ = res & 0xFFFF; |
15869 | flag_N = res >> 8; |
15870 | WRITE_WORD_F(adr, res) |
15871 | POST_IO |
15872 | RET(12) |
15873 | } |
15874 | |
15875 | // NOT |
15876 | OPCODE(0x4658) |
15877 | { |
15878 | u32 adr, res; |
15879 | u32 src, dst; |
15880 | |
15881 | adr = AREG((Opcode >> 0) & 7); |
15882 | AREG((Opcode >> 0) & 7) += 2; |
15883 | PRE_IO |
15884 | READ_WORD_F(adr, src) |
15885 | res = ~src; |
15886 | flag_C = 0; |
15887 | flag_V = 0; |
15888 | flag_NotZ = res & 0xFFFF; |
15889 | flag_N = res >> 8; |
15890 | WRITE_WORD_F(adr, res) |
15891 | POST_IO |
15892 | RET(12) |
15893 | } |
15894 | |
15895 | // NOT |
15896 | OPCODE(0x4660) |
15897 | { |
15898 | u32 adr, res; |
15899 | u32 src, dst; |
15900 | |
15901 | adr = AREG((Opcode >> 0) & 7) - 2; |
15902 | AREG((Opcode >> 0) & 7) = adr; |
15903 | PRE_IO |
15904 | READ_WORD_F(adr, src) |
15905 | res = ~src; |
15906 | flag_C = 0; |
15907 | flag_V = 0; |
15908 | flag_NotZ = res & 0xFFFF; |
15909 | flag_N = res >> 8; |
15910 | WRITE_WORD_F(adr, res) |
15911 | POST_IO |
15912 | RET(14) |
15913 | } |
15914 | |
15915 | // NOT |
15916 | OPCODE(0x4668) |
15917 | { |
15918 | u32 adr, res; |
15919 | u32 src, dst; |
15920 | |
15921 | FETCH_SWORD(adr); |
15922 | adr += AREG((Opcode >> 0) & 7); |
15923 | PRE_IO |
15924 | READ_WORD_F(adr, src) |
15925 | res = ~src; |
15926 | flag_C = 0; |
15927 | flag_V = 0; |
15928 | flag_NotZ = res & 0xFFFF; |
15929 | flag_N = res >> 8; |
15930 | WRITE_WORD_F(adr, res) |
15931 | POST_IO |
15932 | RET(16) |
15933 | } |
15934 | |
15935 | // NOT |
15936 | OPCODE(0x4670) |
15937 | { |
15938 | u32 adr, res; |
15939 | u32 src, dst; |
15940 | |
15941 | adr = AREG((Opcode >> 0) & 7); |
15942 | DECODE_EXT_WORD |
15943 | PRE_IO |
15944 | READ_WORD_F(adr, src) |
15945 | res = ~src; |
15946 | flag_C = 0; |
15947 | flag_V = 0; |
15948 | flag_NotZ = res & 0xFFFF; |
15949 | flag_N = res >> 8; |
15950 | WRITE_WORD_F(adr, res) |
15951 | POST_IO |
15952 | RET(18) |
15953 | } |
15954 | |
15955 | // NOT |
15956 | OPCODE(0x4678) |
15957 | { |
15958 | u32 adr, res; |
15959 | u32 src, dst; |
15960 | |
15961 | FETCH_SWORD(adr); |
15962 | PRE_IO |
15963 | READ_WORD_F(adr, src) |
15964 | res = ~src; |
15965 | flag_C = 0; |
15966 | flag_V = 0; |
15967 | flag_NotZ = res & 0xFFFF; |
15968 | flag_N = res >> 8; |
15969 | WRITE_WORD_F(adr, res) |
15970 | POST_IO |
15971 | RET(16) |
15972 | } |
15973 | |
15974 | // NOT |
15975 | OPCODE(0x4679) |
15976 | { |
15977 | u32 adr, res; |
15978 | u32 src, dst; |
15979 | |
15980 | FETCH_LONG(adr); |
15981 | PRE_IO |
15982 | READ_WORD_F(adr, src) |
15983 | res = ~src; |
15984 | flag_C = 0; |
15985 | flag_V = 0; |
15986 | flag_NotZ = res & 0xFFFF; |
15987 | flag_N = res >> 8; |
15988 | WRITE_WORD_F(adr, res) |
15989 | POST_IO |
15990 | RET(20) |
15991 | } |
15992 | |
15993 | // NOT |
15994 | OPCODE(0x465F) |
15995 | { |
15996 | u32 adr, res; |
15997 | u32 src, dst; |
15998 | |
15999 | adr = AREG(7); |
16000 | AREG(7) += 2; |
16001 | PRE_IO |
16002 | READ_WORD_F(adr, src) |
16003 | res = ~src; |
16004 | flag_C = 0; |
16005 | flag_V = 0; |
16006 | flag_NotZ = res & 0xFFFF; |
16007 | flag_N = res >> 8; |
16008 | WRITE_WORD_F(adr, res) |
16009 | POST_IO |
16010 | RET(12) |
16011 | } |
16012 | |
16013 | // NOT |
16014 | OPCODE(0x4667) |
16015 | { |
16016 | u32 adr, res; |
16017 | u32 src, dst; |
16018 | |
16019 | adr = AREG(7) - 2; |
16020 | AREG(7) = adr; |
16021 | PRE_IO |
16022 | READ_WORD_F(adr, src) |
16023 | res = ~src; |
16024 | flag_C = 0; |
16025 | flag_V = 0; |
16026 | flag_NotZ = res & 0xFFFF; |
16027 | flag_N = res >> 8; |
16028 | WRITE_WORD_F(adr, res) |
16029 | POST_IO |
16030 | RET(14) |
16031 | } |
16032 | |
16033 | // NOT |
16034 | OPCODE(0x4680) |
16035 | { |
16036 | u32 adr, res; |
16037 | u32 src, dst; |
16038 | |
16039 | src = DREGu32((Opcode >> 0) & 7); |
16040 | res = ~src; |
16041 | flag_C = 0; |
16042 | flag_V = 0; |
16043 | flag_NotZ = res; |
16044 | flag_N = res >> 24; |
16045 | DREGu32((Opcode >> 0) & 7) = res; |
16046 | RET(6) |
16047 | } |
16048 | |
16049 | // NOT |
16050 | OPCODE(0x4690) |
16051 | { |
16052 | u32 adr, res; |
16053 | u32 src, dst; |
16054 | |
16055 | adr = AREG((Opcode >> 0) & 7); |
16056 | PRE_IO |
16057 | READ_LONG_F(adr, src) |
16058 | res = ~src; |
16059 | flag_C = 0; |
16060 | flag_V = 0; |
16061 | flag_NotZ = res; |
16062 | flag_N = res >> 24; |
16063 | WRITE_LONG_F(adr, res) |
16064 | POST_IO |
16065 | RET(20) |
16066 | } |
16067 | |
16068 | // NOT |
16069 | OPCODE(0x4698) |
16070 | { |
16071 | u32 adr, res; |
16072 | u32 src, dst; |
16073 | |
16074 | adr = AREG((Opcode >> 0) & 7); |
16075 | AREG((Opcode >> 0) & 7) += 4; |
16076 | PRE_IO |
16077 | READ_LONG_F(adr, src) |
16078 | res = ~src; |
16079 | flag_C = 0; |
16080 | flag_V = 0; |
16081 | flag_NotZ = res; |
16082 | flag_N = res >> 24; |
16083 | WRITE_LONG_F(adr, res) |
16084 | POST_IO |
16085 | RET(20) |
16086 | } |
16087 | |
16088 | // NOT |
16089 | OPCODE(0x46A0) |
16090 | { |
16091 | u32 adr, res; |
16092 | u32 src, dst; |
16093 | |
16094 | adr = AREG((Opcode >> 0) & 7) - 4; |
16095 | AREG((Opcode >> 0) & 7) = adr; |
16096 | PRE_IO |
16097 | READ_LONG_F(adr, src) |
16098 | res = ~src; |
16099 | flag_C = 0; |
16100 | flag_V = 0; |
16101 | flag_NotZ = res; |
16102 | flag_N = res >> 24; |
16103 | WRITE_LONG_F(adr, res) |
16104 | POST_IO |
16105 | RET(22) |
16106 | } |
16107 | |
16108 | // NOT |
16109 | OPCODE(0x46A8) |
16110 | { |
16111 | u32 adr, res; |
16112 | u32 src, dst; |
16113 | |
16114 | FETCH_SWORD(adr); |
16115 | adr += AREG((Opcode >> 0) & 7); |
16116 | PRE_IO |
16117 | READ_LONG_F(adr, src) |
16118 | res = ~src; |
16119 | flag_C = 0; |
16120 | flag_V = 0; |
16121 | flag_NotZ = res; |
16122 | flag_N = res >> 24; |
16123 | WRITE_LONG_F(adr, res) |
16124 | POST_IO |
16125 | RET(24) |
16126 | } |
16127 | |
16128 | // NOT |
16129 | OPCODE(0x46B0) |
16130 | { |
16131 | u32 adr, res; |
16132 | u32 src, dst; |
16133 | |
16134 | adr = AREG((Opcode >> 0) & 7); |
16135 | DECODE_EXT_WORD |
16136 | PRE_IO |
16137 | READ_LONG_F(adr, src) |
16138 | res = ~src; |
16139 | flag_C = 0; |
16140 | flag_V = 0; |
16141 | flag_NotZ = res; |
16142 | flag_N = res >> 24; |
16143 | WRITE_LONG_F(adr, res) |
16144 | POST_IO |
16145 | RET(26) |
16146 | } |
16147 | |
16148 | // NOT |
16149 | OPCODE(0x46B8) |
16150 | { |
16151 | u32 adr, res; |
16152 | u32 src, dst; |
16153 | |
16154 | FETCH_SWORD(adr); |
16155 | PRE_IO |
16156 | READ_LONG_F(adr, src) |
16157 | res = ~src; |
16158 | flag_C = 0; |
16159 | flag_V = 0; |
16160 | flag_NotZ = res; |
16161 | flag_N = res >> 24; |
16162 | WRITE_LONG_F(adr, res) |
16163 | POST_IO |
16164 | RET(24) |
16165 | } |
16166 | |
16167 | // NOT |
16168 | OPCODE(0x46B9) |
16169 | { |
16170 | u32 adr, res; |
16171 | u32 src, dst; |
16172 | |
16173 | FETCH_LONG(adr); |
16174 | PRE_IO |
16175 | READ_LONG_F(adr, src) |
16176 | res = ~src; |
16177 | flag_C = 0; |
16178 | flag_V = 0; |
16179 | flag_NotZ = res; |
16180 | flag_N = res >> 24; |
16181 | WRITE_LONG_F(adr, res) |
16182 | POST_IO |
16183 | RET(28) |
16184 | } |
16185 | |
16186 | // NOT |
16187 | OPCODE(0x469F) |
16188 | { |
16189 | u32 adr, res; |
16190 | u32 src, dst; |
16191 | |
16192 | adr = AREG(7); |
16193 | AREG(7) += 4; |
16194 | PRE_IO |
16195 | READ_LONG_F(adr, src) |
16196 | res = ~src; |
16197 | flag_C = 0; |
16198 | flag_V = 0; |
16199 | flag_NotZ = res; |
16200 | flag_N = res >> 24; |
16201 | WRITE_LONG_F(adr, res) |
16202 | POST_IO |
16203 | RET(20) |
16204 | } |
16205 | |
16206 | // NOT |
16207 | OPCODE(0x46A7) |
16208 | { |
16209 | u32 adr, res; |
16210 | u32 src, dst; |
16211 | |
16212 | adr = AREG(7) - 4; |
16213 | AREG(7) = adr; |
16214 | PRE_IO |
16215 | READ_LONG_F(adr, src) |
16216 | res = ~src; |
16217 | flag_C = 0; |
16218 | flag_V = 0; |
16219 | flag_NotZ = res; |
16220 | flag_N = res >> 24; |
16221 | WRITE_LONG_F(adr, res) |
16222 | POST_IO |
16223 | RET(22) |
16224 | } |
16225 | |
16226 | // MOVESRa |
16227 | OPCODE(0x40C0) |
16228 | { |
16229 | u32 adr, res; |
16230 | u32 src, dst; |
16231 | |
16232 | res = GET_SR; |
16233 | DREGu16((Opcode >> 0) & 7) = res; |
16234 | RET(6) |
16235 | } |
16236 | |
16237 | // MOVESRa |
16238 | OPCODE(0x40D0) |
16239 | { |
16240 | u32 adr, res; |
16241 | u32 src, dst; |
16242 | |
16243 | res = GET_SR; |
16244 | adr = AREG((Opcode >> 0) & 7); |
16245 | PRE_IO |
16246 | WRITE_WORD_F(adr, res) |
16247 | POST_IO |
16248 | RET(12) |
16249 | } |
16250 | |
16251 | // MOVESRa |
16252 | OPCODE(0x40D8) |
16253 | { |
16254 | u32 adr, res; |
16255 | u32 src, dst; |
16256 | |
16257 | res = GET_SR; |
16258 | adr = AREG((Opcode >> 0) & 7); |
16259 | AREG((Opcode >> 0) & 7) += 2; |
16260 | PRE_IO |
16261 | WRITE_WORD_F(adr, res) |
16262 | POST_IO |
16263 | RET(12) |
16264 | } |
16265 | |
16266 | // MOVESRa |
16267 | OPCODE(0x40E0) |
16268 | { |
16269 | u32 adr, res; |
16270 | u32 src, dst; |
16271 | |
16272 | res = GET_SR; |
16273 | adr = AREG((Opcode >> 0) & 7) - 2; |
16274 | AREG((Opcode >> 0) & 7) = adr; |
16275 | PRE_IO |
16276 | WRITE_WORD_F(adr, res) |
16277 | POST_IO |
16278 | RET(14) |
16279 | } |
16280 | |
16281 | // MOVESRa |
16282 | OPCODE(0x40E8) |
16283 | { |
16284 | u32 adr, res; |
16285 | u32 src, dst; |
16286 | |
16287 | res = GET_SR; |
16288 | FETCH_SWORD(adr); |
16289 | adr += AREG((Opcode >> 0) & 7); |
16290 | PRE_IO |
16291 | WRITE_WORD_F(adr, res) |
16292 | POST_IO |
16293 | RET(16) |
16294 | } |
16295 | |
16296 | // MOVESRa |
16297 | OPCODE(0x40F0) |
16298 | { |
16299 | u32 adr, res; |
16300 | u32 src, dst; |
16301 | |
16302 | res = GET_SR; |
16303 | adr = AREG((Opcode >> 0) & 7); |
16304 | DECODE_EXT_WORD |
16305 | PRE_IO |
16306 | WRITE_WORD_F(adr, res) |
16307 | POST_IO |
16308 | RET(18) |
16309 | } |
16310 | |
16311 | // MOVESRa |
16312 | OPCODE(0x40F8) |
16313 | { |
16314 | u32 adr, res; |
16315 | u32 src, dst; |
16316 | |
16317 | res = GET_SR; |
16318 | FETCH_SWORD(adr); |
16319 | PRE_IO |
16320 | WRITE_WORD_F(adr, res) |
16321 | POST_IO |
16322 | RET(16) |
16323 | } |
16324 | |
16325 | // MOVESRa |
16326 | OPCODE(0x40F9) |
16327 | { |
16328 | u32 adr, res; |
16329 | u32 src, dst; |
16330 | |
16331 | res = GET_SR; |
16332 | FETCH_LONG(adr); |
16333 | PRE_IO |
16334 | WRITE_WORD_F(adr, res) |
16335 | POST_IO |
16336 | RET(20) |
16337 | } |
16338 | |
16339 | // MOVESRa |
16340 | OPCODE(0x40DF) |
16341 | { |
16342 | u32 adr, res; |
16343 | u32 src, dst; |
16344 | |
16345 | res = GET_SR; |
16346 | adr = AREG(7); |
16347 | AREG(7) += 2; |
16348 | PRE_IO |
16349 | WRITE_WORD_F(adr, res) |
16350 | POST_IO |
16351 | RET(12) |
16352 | } |
16353 | |
16354 | // MOVESRa |
16355 | OPCODE(0x40E7) |
16356 | { |
16357 | u32 adr, res; |
16358 | u32 src, dst; |
16359 | |
16360 | res = GET_SR; |
16361 | adr = AREG(7) - 2; |
16362 | AREG(7) = adr; |
16363 | PRE_IO |
16364 | WRITE_WORD_F(adr, res) |
16365 | POST_IO |
16366 | RET(14) |
16367 | } |
16368 | |
16369 | // MOVEaCCR |
16370 | OPCODE(0x44C0) |
16371 | { |
16372 | u32 adr, res; |
16373 | u32 src, dst; |
16374 | |
16375 | res = DREGu16((Opcode >> 0) & 7); |
16376 | SET_CCR(res) |
16377 | RET(12) |
16378 | } |
16379 | |
16380 | // MOVEaCCR |
16381 | OPCODE(0x44D0) |
16382 | { |
16383 | u32 adr, res; |
16384 | u32 src, dst; |
16385 | |
16386 | adr = AREG((Opcode >> 0) & 7); |
16387 | PRE_IO |
16388 | READ_WORD_F(adr, res) |
16389 | SET_CCR(res) |
16390 | POST_IO |
16391 | RET(16) |
16392 | } |
16393 | |
16394 | // MOVEaCCR |
16395 | OPCODE(0x44D8) |
16396 | { |
16397 | u32 adr, res; |
16398 | u32 src, dst; |
16399 | |
16400 | adr = AREG((Opcode >> 0) & 7); |
16401 | AREG((Opcode >> 0) & 7) += 2; |
16402 | PRE_IO |
16403 | READ_WORD_F(adr, res) |
16404 | SET_CCR(res) |
16405 | POST_IO |
16406 | RET(16) |
16407 | } |
16408 | |
16409 | // MOVEaCCR |
16410 | OPCODE(0x44E0) |
16411 | { |
16412 | u32 adr, res; |
16413 | u32 src, dst; |
16414 | |
16415 | adr = AREG((Opcode >> 0) & 7) - 2; |
16416 | AREG((Opcode >> 0) & 7) = adr; |
16417 | PRE_IO |
16418 | READ_WORD_F(adr, res) |
16419 | SET_CCR(res) |
16420 | POST_IO |
16421 | RET(18) |
16422 | } |
16423 | |
16424 | // MOVEaCCR |
16425 | OPCODE(0x44E8) |
16426 | { |
16427 | u32 adr, res; |
16428 | u32 src, dst; |
16429 | |
16430 | FETCH_SWORD(adr); |
16431 | adr += AREG((Opcode >> 0) & 7); |
16432 | PRE_IO |
16433 | READ_WORD_F(adr, res) |
16434 | SET_CCR(res) |
16435 | POST_IO |
16436 | RET(20) |
16437 | } |
16438 | |
16439 | // MOVEaCCR |
16440 | OPCODE(0x44F0) |
16441 | { |
16442 | u32 adr, res; |
16443 | u32 src, dst; |
16444 | |
16445 | adr = AREG((Opcode >> 0) & 7); |
16446 | DECODE_EXT_WORD |
16447 | PRE_IO |
16448 | READ_WORD_F(adr, res) |
16449 | SET_CCR(res) |
16450 | POST_IO |
16451 | RET(22) |
16452 | } |
16453 | |
16454 | // MOVEaCCR |
16455 | OPCODE(0x44F8) |
16456 | { |
16457 | u32 adr, res; |
16458 | u32 src, dst; |
16459 | |
16460 | FETCH_SWORD(adr); |
16461 | PRE_IO |
16462 | READ_WORD_F(adr, res) |
16463 | SET_CCR(res) |
16464 | POST_IO |
16465 | RET(20) |
16466 | } |
16467 | |
16468 | // MOVEaCCR |
16469 | OPCODE(0x44F9) |
16470 | { |
16471 | u32 adr, res; |
16472 | u32 src, dst; |
16473 | |
16474 | FETCH_LONG(adr); |
16475 | PRE_IO |
16476 | READ_WORD_F(adr, res) |
16477 | SET_CCR(res) |
16478 | POST_IO |
16479 | RET(24) |
16480 | } |
16481 | |
16482 | // MOVEaCCR |
16483 | OPCODE(0x44FA) |
16484 | { |
16485 | u32 adr, res; |
16486 | u32 src, dst; |
16487 | |
16488 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
16489 | PC++; |
16490 | PRE_IO |
16491 | READ_WORD_F(adr, res) |
16492 | SET_CCR(res) |
16493 | POST_IO |
16494 | RET(20) |
16495 | } |
16496 | |
16497 | // MOVEaCCR |
16498 | OPCODE(0x44FB) |
16499 | { |
16500 | u32 adr, res; |
16501 | u32 src, dst; |
16502 | |
16503 | adr = (u32)(PC) - BasePC; |
16504 | DECODE_EXT_WORD |
16505 | PRE_IO |
16506 | READ_WORD_F(adr, res) |
16507 | SET_CCR(res) |
16508 | POST_IO |
16509 | RET(22) |
16510 | } |
16511 | |
16512 | // MOVEaCCR |
16513 | OPCODE(0x44FC) |
16514 | { |
16515 | u32 adr, res; |
16516 | u32 src, dst; |
16517 | |
16518 | FETCH_WORD(res); |
16519 | SET_CCR(res) |
16520 | RET(16) |
16521 | } |
16522 | |
16523 | // MOVEaCCR |
16524 | OPCODE(0x44DF) |
16525 | { |
16526 | u32 adr, res; |
16527 | u32 src, dst; |
16528 | |
16529 | adr = AREG(7); |
16530 | AREG(7) += 2; |
16531 | PRE_IO |
16532 | READ_WORD_F(adr, res) |
16533 | SET_CCR(res) |
16534 | POST_IO |
16535 | RET(16) |
16536 | } |
16537 | |
16538 | // MOVEaCCR |
16539 | OPCODE(0x44E7) |
16540 | { |
16541 | u32 adr, res; |
16542 | u32 src, dst; |
16543 | |
16544 | adr = AREG(7) - 2; |
16545 | AREG(7) = adr; |
16546 | PRE_IO |
16547 | READ_WORD_F(adr, res) |
16548 | SET_CCR(res) |
16549 | POST_IO |
16550 | RET(18) |
16551 | } |
16552 | |
16553 | // MOVEaSR |
16554 | OPCODE(0x46C0) |
16555 | { |
16556 | u32 adr, res; |
16557 | u32 src, dst; |
16558 | |
16559 | if (flag_S) |
16560 | { |
16561 | res = DREGu16((Opcode >> 0) & 7); |
16562 | SET_SR(res) |
16563 | if (!flag_S) |
16564 | { |
16565 | res = AREG(7); |
16566 | AREG(7) = ASP; |
16567 | ASP = res; |
16568 | } |
16569 | CHECK_INT_TO_JUMP(12) |
16570 | } |
16571 | else |
16572 | { |
16573 | u32 oldPC=GET_PC; |
16574 | SET_PC(oldPC-2) |
16575 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16576 | RET(4) |
16577 | } |
16578 | RET(12) |
16579 | } |
16580 | |
16581 | // MOVEaSR |
16582 | OPCODE(0x46D0) |
16583 | { |
16584 | u32 adr, res; |
16585 | u32 src, dst; |
16586 | |
16587 | if (flag_S) |
16588 | { |
16589 | adr = AREG((Opcode >> 0) & 7); |
16590 | PRE_IO |
16591 | READ_WORD_F(adr, res) |
16592 | SET_SR(res) |
16593 | if (!flag_S) |
16594 | { |
16595 | res = AREG(7); |
16596 | AREG(7) = ASP; |
16597 | ASP = res; |
16598 | } |
16599 | POST_IO |
16600 | CHECK_INT_TO_JUMP(16) |
16601 | } |
16602 | else |
16603 | { |
16604 | u32 oldPC=GET_PC; |
16605 | SET_PC(oldPC-2) |
16606 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16607 | RET(4) |
16608 | } |
16609 | RET(16) |
16610 | } |
16611 | |
16612 | // MOVEaSR |
16613 | OPCODE(0x46D8) |
16614 | { |
16615 | u32 adr, res; |
16616 | u32 src, dst; |
16617 | |
16618 | if (flag_S) |
16619 | { |
16620 | adr = AREG((Opcode >> 0) & 7); |
16621 | AREG((Opcode >> 0) & 7) += 2; |
16622 | PRE_IO |
16623 | READ_WORD_F(adr, res) |
16624 | SET_SR(res) |
16625 | if (!flag_S) |
16626 | { |
16627 | res = AREG(7); |
16628 | AREG(7) = ASP; |
16629 | ASP = res; |
16630 | } |
16631 | POST_IO |
16632 | CHECK_INT_TO_JUMP(16) |
16633 | } |
16634 | else |
16635 | { |
16636 | u32 oldPC=GET_PC; |
16637 | SET_PC(oldPC-2) |
16638 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16639 | RET(4) |
16640 | } |
16641 | RET(16) |
16642 | } |
16643 | |
16644 | // MOVEaSR |
16645 | OPCODE(0x46E0) |
16646 | { |
16647 | u32 adr, res; |
16648 | u32 src, dst; |
16649 | |
16650 | if (flag_S) |
16651 | { |
16652 | adr = AREG((Opcode >> 0) & 7) - 2; |
16653 | AREG((Opcode >> 0) & 7) = adr; |
16654 | PRE_IO |
16655 | READ_WORD_F(adr, res) |
16656 | SET_SR(res) |
16657 | if (!flag_S) |
16658 | { |
16659 | res = AREG(7); |
16660 | AREG(7) = ASP; |
16661 | ASP = res; |
16662 | } |
16663 | POST_IO |
16664 | CHECK_INT_TO_JUMP(18) |
16665 | } |
16666 | else |
16667 | { |
16668 | u32 oldPC=GET_PC; |
16669 | SET_PC(oldPC-2) |
16670 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16671 | RET(4) |
16672 | } |
16673 | RET(18) |
16674 | } |
16675 | |
16676 | // MOVEaSR |
16677 | OPCODE(0x46E8) |
16678 | { |
16679 | u32 adr, res; |
16680 | u32 src, dst; |
16681 | |
16682 | if (flag_S) |
16683 | { |
16684 | FETCH_SWORD(adr); |
16685 | adr += AREG((Opcode >> 0) & 7); |
16686 | PRE_IO |
16687 | READ_WORD_F(adr, res) |
16688 | SET_SR(res) |
16689 | if (!flag_S) |
16690 | { |
16691 | res = AREG(7); |
16692 | AREG(7) = ASP; |
16693 | ASP = res; |
16694 | } |
16695 | POST_IO |
16696 | CHECK_INT_TO_JUMP(20) |
16697 | } |
16698 | else |
16699 | { |
16700 | u32 oldPC=GET_PC; |
16701 | SET_PC(oldPC-2) |
16702 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16703 | RET(4) |
16704 | } |
16705 | RET(20) |
16706 | } |
16707 | |
16708 | // MOVEaSR |
16709 | OPCODE(0x46F0) |
16710 | { |
16711 | u32 adr, res; |
16712 | u32 src, dst; |
16713 | |
16714 | if (flag_S) |
16715 | { |
16716 | adr = AREG((Opcode >> 0) & 7); |
16717 | DECODE_EXT_WORD |
16718 | PRE_IO |
16719 | READ_WORD_F(adr, res) |
16720 | SET_SR(res) |
16721 | if (!flag_S) |
16722 | { |
16723 | res = AREG(7); |
16724 | AREG(7) = ASP; |
16725 | ASP = res; |
16726 | } |
16727 | POST_IO |
16728 | CHECK_INT_TO_JUMP(22) |
16729 | } |
16730 | else |
16731 | { |
16732 | u32 oldPC=GET_PC; |
16733 | SET_PC(oldPC-2) |
16734 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16735 | RET(4) |
16736 | } |
16737 | RET(22) |
16738 | } |
16739 | |
16740 | |
16741 | // MOVEaSR |
16742 | OPCODE(0x46F8) |
16743 | { |
16744 | u32 adr, res; |
16745 | u32 src, dst; |
16746 | |
16747 | if (flag_S) |
16748 | { |
16749 | FETCH_SWORD(adr); |
16750 | PRE_IO |
16751 | READ_WORD_F(adr, res) |
16752 | SET_SR(res) |
16753 | if (!flag_S) |
16754 | { |
16755 | res = AREG(7); |
16756 | AREG(7) = ASP; |
16757 | ASP = res; |
16758 | } |
16759 | POST_IO |
16760 | CHECK_INT_TO_JUMP(20) |
16761 | } |
16762 | else |
16763 | { |
16764 | u32 oldPC=GET_PC; |
16765 | SET_PC(oldPC-2) |
16766 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16767 | RET(4) |
16768 | } |
16769 | RET(20) |
16770 | } |
16771 | |
16772 | // MOVEaSR |
16773 | OPCODE(0x46F9) |
16774 | { |
16775 | u32 adr, res; |
16776 | u32 src, dst; |
16777 | |
16778 | if (flag_S) |
16779 | { |
16780 | FETCH_LONG(adr); |
16781 | PRE_IO |
16782 | READ_WORD_F(adr, res) |
16783 | SET_SR(res) |
16784 | if (!flag_S) |
16785 | { |
16786 | res = AREG(7); |
16787 | AREG(7) = ASP; |
16788 | ASP = res; |
16789 | } |
16790 | POST_IO |
16791 | CHECK_INT_TO_JUMP(24) |
16792 | } |
16793 | else |
16794 | { |
16795 | u32 oldPC=GET_PC; |
16796 | SET_PC(oldPC-2) |
16797 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16798 | RET(4) |
16799 | } |
16800 | RET(24) |
16801 | } |
16802 | |
16803 | // MOVEaSR |
16804 | OPCODE(0x46FA) |
16805 | { |
16806 | u32 adr, res; |
16807 | u32 src, dst; |
16808 | |
16809 | if (flag_S) |
16810 | { |
16811 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
16812 | PC++; |
16813 | PRE_IO |
16814 | READ_WORD_F(adr, res) |
16815 | SET_SR(res) |
16816 | if (!flag_S) |
16817 | { |
16818 | res = AREG(7); |
16819 | AREG(7) = ASP; |
16820 | ASP = res; |
16821 | } |
16822 | POST_IO |
16823 | CHECK_INT_TO_JUMP(24) |
16824 | } |
16825 | else |
16826 | { |
16827 | u32 oldPC=GET_PC; |
16828 | SET_PC(oldPC-2) |
16829 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16830 | RET(4) |
16831 | } |
16832 | RET(20) |
16833 | } |
16834 | |
16835 | // MOVEaSR |
16836 | OPCODE(0x46FB) |
16837 | { |
16838 | u32 adr, res; |
16839 | u32 src, dst; |
16840 | |
16841 | if (flag_S) |
16842 | { |
16843 | adr = (u32)(PC) - BasePC; |
16844 | DECODE_EXT_WORD |
16845 | PRE_IO |
16846 | READ_WORD_F(adr, res) |
16847 | SET_SR(res) |
16848 | if (!flag_S) |
16849 | { |
16850 | res = AREG(7); |
16851 | AREG(7) = ASP; |
16852 | ASP = res; |
16853 | } |
16854 | POST_IO |
16855 | CHECK_INT_TO_JUMP(22) |
16856 | } |
16857 | else |
16858 | { |
16859 | u32 oldPC=GET_PC; |
16860 | SET_PC(oldPC-2) |
16861 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16862 | RET(4) |
16863 | } |
16864 | RET(22) |
16865 | } |
16866 | |
16867 | // MOVEaSR |
16868 | OPCODE(0x46FC) |
16869 | { |
16870 | u32 adr, res; |
16871 | u32 src, dst; |
16872 | |
16873 | if (flag_S) |
16874 | { |
16875 | FETCH_WORD(res); |
16876 | SET_SR(res) |
16877 | if (!flag_S) |
16878 | { |
16879 | res = AREG(7); |
16880 | AREG(7) = ASP; |
16881 | ASP = res; |
16882 | } |
16883 | CHECK_INT_TO_JUMP(16) |
16884 | } |
16885 | else |
16886 | { |
16887 | u32 oldPC=GET_PC; |
16888 | SET_PC(oldPC-2) |
16889 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16890 | RET(4) |
16891 | } |
16892 | RET(16) |
16893 | } |
16894 | |
16895 | // MOVEaSR |
16896 | OPCODE(0x46DF) |
16897 | { |
16898 | u32 adr, res; |
16899 | u32 src, dst; |
16900 | |
16901 | if (flag_S) |
16902 | { |
16903 | adr = AREG(7); |
16904 | AREG(7) += 2; |
16905 | PRE_IO |
16906 | READ_WORD_F(adr, res) |
16907 | SET_SR(res) |
16908 | if (!flag_S) |
16909 | { |
16910 | res = AREG(7); |
16911 | AREG(7) = ASP; |
16912 | ASP = res; |
16913 | } |
16914 | POST_IO |
16915 | CHECK_INT_TO_JUMP(16) |
16916 | } |
16917 | else |
16918 | { |
16919 | u32 oldPC=GET_PC; |
16920 | SET_PC(oldPC-2) |
16921 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16922 | RET(4) |
16923 | } |
16924 | RET(16) |
16925 | } |
16926 | |
16927 | // MOVEaSR |
16928 | OPCODE(0x46E7) |
16929 | { |
16930 | u32 adr, res; |
16931 | u32 src, dst; |
16932 | |
16933 | if (flag_S) |
16934 | { |
16935 | adr = AREG(7) - 2; |
16936 | AREG(7) = adr; |
16937 | PRE_IO |
16938 | READ_WORD_F(adr, res) |
16939 | SET_SR(res) |
16940 | if (!flag_S) |
16941 | { |
16942 | res = AREG(7); |
16943 | AREG(7) = ASP; |
16944 | ASP = res; |
16945 | } |
16946 | POST_IO |
16947 | CHECK_INT_TO_JUMP(18) |
16948 | } |
16949 | else |
16950 | { |
16951 | u32 oldPC=GET_PC; |
16952 | SET_PC(oldPC-2) |
16953 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16954 | RET(4) |
16955 | } |
16956 | RET(18) |
16957 | } |
16958 | |
16959 | // NBCD |
16960 | OPCODE(0x4800) |
16961 | { |
16962 | u32 adr, res; |
16963 | u32 src, dst; |
16964 | |
16965 | res = DREGu8((Opcode >> 0) & 7); |
16966 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16967 | |
16968 | if (res != 0x9a) |
16969 | { |
16970 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16971 | res &= 0xFF; |
16972 | DREGu8((Opcode >> 0) & 7) = res; |
16973 | flag_NotZ |= res; |
16974 | flag_X = flag_C = M68K_SR_C; |
16975 | } |
16976 | else flag_X = flag_C = 0; |
16977 | flag_N = res; |
16978 | RET(6) |
16979 | } |
16980 | |
16981 | // NBCD |
16982 | OPCODE(0x4810) |
16983 | { |
16984 | u32 adr, res; |
16985 | u32 src, dst; |
16986 | |
16987 | adr = AREG((Opcode >> 0) & 7); |
16988 | PRE_IO |
16989 | READ_BYTE_F(adr, res) |
16990 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16991 | |
16992 | if (res != 0x9a) |
16993 | { |
16994 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16995 | res &= 0xFF; |
16996 | WRITE_BYTE_F(adr, res) |
16997 | flag_NotZ |= res; |
16998 | flag_X = flag_C = M68K_SR_C; |
16999 | } |
17000 | else flag_X = flag_C = 0; |
17001 | flag_N = res; |
17002 | POST_IO |
17003 | RET(12) |
17004 | } |
17005 | |
17006 | // NBCD |
17007 | OPCODE(0x4818) |
17008 | { |
17009 | u32 adr, res; |
17010 | u32 src, dst; |
17011 | |
17012 | adr = AREG((Opcode >> 0) & 7); |
17013 | AREG((Opcode >> 0) & 7) += 1; |
17014 | PRE_IO |
17015 | READ_BYTE_F(adr, res) |
17016 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17017 | |
17018 | if (res != 0x9a) |
17019 | { |
17020 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17021 | res &= 0xFF; |
17022 | WRITE_BYTE_F(adr, res) |
17023 | flag_NotZ |= res; |
17024 | flag_X = flag_C = M68K_SR_C; |
17025 | } |
17026 | else flag_X = flag_C = 0; |
17027 | flag_N = res; |
17028 | POST_IO |
17029 | RET(12) |
17030 | } |
17031 | |
17032 | // NBCD |
17033 | OPCODE(0x4820) |
17034 | { |
17035 | u32 adr, res; |
17036 | u32 src, dst; |
17037 | |
17038 | adr = AREG((Opcode >> 0) & 7) - 1; |
17039 | AREG((Opcode >> 0) & 7) = adr; |
17040 | PRE_IO |
17041 | READ_BYTE_F(adr, res) |
17042 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17043 | |
17044 | if (res != 0x9a) |
17045 | { |
17046 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17047 | res &= 0xFF; |
17048 | WRITE_BYTE_F(adr, res) |
17049 | flag_NotZ |= res; |
17050 | flag_X = flag_C = M68K_SR_C; |
17051 | } |
17052 | else flag_X = flag_C = 0; |
17053 | flag_N = res; |
17054 | POST_IO |
17055 | RET(14) |
17056 | } |
17057 | |
17058 | // NBCD |
17059 | OPCODE(0x4828) |
17060 | { |
17061 | u32 adr, res; |
17062 | u32 src, dst; |
17063 | |
17064 | FETCH_SWORD(adr); |
17065 | adr += AREG((Opcode >> 0) & 7); |
17066 | PRE_IO |
17067 | READ_BYTE_F(adr, res) |
17068 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17069 | |
17070 | if (res != 0x9a) |
17071 | { |
17072 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17073 | res &= 0xFF; |
17074 | WRITE_BYTE_F(adr, res) |
17075 | flag_NotZ |= res; |
17076 | flag_X = flag_C = M68K_SR_C; |
17077 | } |
17078 | else flag_X = flag_C = 0; |
17079 | flag_N = res; |
17080 | POST_IO |
17081 | RET(16) |
17082 | } |
17083 | |
17084 | // NBCD |
17085 | OPCODE(0x4830) |
17086 | { |
17087 | u32 adr, res; |
17088 | u32 src, dst; |
17089 | |
17090 | adr = AREG((Opcode >> 0) & 7); |
17091 | DECODE_EXT_WORD |
17092 | PRE_IO |
17093 | READ_BYTE_F(adr, res) |
17094 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17095 | |
17096 | if (res != 0x9a) |
17097 | { |
17098 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17099 | res &= 0xFF; |
17100 | WRITE_BYTE_F(adr, res) |
17101 | flag_NotZ |= res; |
17102 | flag_X = flag_C = M68K_SR_C; |
17103 | } |
17104 | else flag_X = flag_C = 0; |
17105 | flag_N = res; |
17106 | POST_IO |
17107 | RET(18) |
17108 | } |
17109 | |
17110 | // NBCD |
17111 | OPCODE(0x4838) |
17112 | { |
17113 | u32 adr, res; |
17114 | u32 src, dst; |
17115 | |
17116 | FETCH_SWORD(adr); |
17117 | PRE_IO |
17118 | READ_BYTE_F(adr, res) |
17119 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17120 | |
17121 | if (res != 0x9a) |
17122 | { |
17123 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17124 | res &= 0xFF; |
17125 | WRITE_BYTE_F(adr, res) |
17126 | flag_NotZ |= res; |
17127 | flag_X = flag_C = M68K_SR_C; |
17128 | } |
17129 | else flag_X = flag_C = 0; |
17130 | flag_N = res; |
17131 | POST_IO |
17132 | RET(16) |
17133 | } |
17134 | |
17135 | // NBCD |
17136 | OPCODE(0x4839) |
17137 | { |
17138 | u32 adr, res; |
17139 | u32 src, dst; |
17140 | |
17141 | FETCH_LONG(adr); |
17142 | PRE_IO |
17143 | READ_BYTE_F(adr, res) |
17144 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17145 | |
17146 | if (res != 0x9a) |
17147 | { |
17148 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17149 | res &= 0xFF; |
17150 | WRITE_BYTE_F(adr, res) |
17151 | flag_NotZ |= res; |
17152 | flag_X = flag_C = M68K_SR_C; |
17153 | } |
17154 | else flag_X = flag_C = 0; |
17155 | flag_N = res; |
17156 | POST_IO |
17157 | RET(20) |
17158 | } |
17159 | |
17160 | // NBCD |
17161 | OPCODE(0x481F) |
17162 | { |
17163 | u32 adr, res; |
17164 | u32 src, dst; |
17165 | |
17166 | adr = AREG(7); |
17167 | AREG(7) += 2; |
17168 | PRE_IO |
17169 | READ_BYTE_F(adr, res) |
17170 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17171 | |
17172 | if (res != 0x9a) |
17173 | { |
17174 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17175 | res &= 0xFF; |
17176 | WRITE_BYTE_F(adr, res) |
17177 | flag_NotZ |= res; |
17178 | flag_X = flag_C = M68K_SR_C; |
17179 | } |
17180 | else flag_X = flag_C = 0; |
17181 | flag_N = res; |
17182 | POST_IO |
17183 | RET(12) |
17184 | } |
17185 | |
17186 | // NBCD |
17187 | OPCODE(0x4827) |
17188 | { |
17189 | u32 adr, res; |
17190 | u32 src, dst; |
17191 | |
17192 | adr = AREG(7) - 2; |
17193 | AREG(7) = adr; |
17194 | PRE_IO |
17195 | READ_BYTE_F(adr, res) |
17196 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17197 | |
17198 | if (res != 0x9a) |
17199 | { |
17200 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17201 | res &= 0xFF; |
17202 | WRITE_BYTE_F(adr, res) |
17203 | flag_NotZ |= res; |
17204 | flag_X = flag_C = M68K_SR_C; |
17205 | } |
17206 | else flag_X = flag_C = 0; |
17207 | flag_N = res; |
17208 | POST_IO |
17209 | RET(14) |
17210 | } |
17211 | |
17212 | // PEA |
17213 | OPCODE(0x4850) |
17214 | { |
17215 | u32 adr, res; |
17216 | u32 src, dst; |
17217 | |
17218 | adr = AREG((Opcode >> 0) & 7); |
17219 | PRE_IO |
17220 | PUSH_32_F(adr) |
17221 | POST_IO |
17222 | RET(12) |
17223 | } |
17224 | |
17225 | // PEA |
17226 | OPCODE(0x4868) |
17227 | { |
17228 | u32 adr, res; |
17229 | u32 src, dst; |
17230 | |
17231 | FETCH_SWORD(adr); |
17232 | adr += AREG((Opcode >> 0) & 7); |
17233 | PRE_IO |
17234 | PUSH_32_F(adr) |
17235 | POST_IO |
17236 | RET(16) |
17237 | } |
17238 | |
17239 | // PEA |
17240 | OPCODE(0x4870) |
17241 | { |
17242 | u32 adr, res; |
17243 | u32 src, dst; |
17244 | |
17245 | adr = AREG((Opcode >> 0) & 7); |
17246 | DECODE_EXT_WORD |
17247 | PRE_IO |
17248 | PUSH_32_F(adr) |
17249 | POST_IO |
17250 | RET(20) |
17251 | } |
17252 | |
17253 | // PEA |
17254 | OPCODE(0x4878) |
17255 | { |
17256 | u32 adr, res; |
17257 | u32 src, dst; |
17258 | |
17259 | FETCH_SWORD(adr); |
17260 | PRE_IO |
17261 | PUSH_32_F(adr) |
17262 | POST_IO |
17263 | RET(16) |
17264 | } |
17265 | |
17266 | // PEA |
17267 | OPCODE(0x4879) |
17268 | { |
17269 | u32 adr, res; |
17270 | u32 src, dst; |
17271 | |
17272 | FETCH_LONG(adr); |
17273 | PRE_IO |
17274 | PUSH_32_F(adr) |
17275 | POST_IO |
17276 | RET(20) |
17277 | } |
17278 | |
17279 | // PEA |
17280 | OPCODE(0x487A) |
17281 | { |
17282 | u32 adr, res; |
17283 | u32 src, dst; |
17284 | |
17285 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
17286 | PC++; |
17287 | PRE_IO |
17288 | PUSH_32_F(adr) |
17289 | POST_IO |
17290 | RET(16) |
17291 | } |
17292 | |
17293 | // PEA |
17294 | OPCODE(0x487B) |
17295 | { |
17296 | u32 adr, res; |
17297 | u32 src, dst; |
17298 | |
17299 | adr = (u32)(PC) - BasePC; |
17300 | DECODE_EXT_WORD |
17301 | PRE_IO |
17302 | PUSH_32_F(adr) |
17303 | POST_IO |
17304 | RET(20) |
17305 | } |
17306 | |
17307 | // SWAP |
17308 | OPCODE(0x4840) |
17309 | { |
17310 | u32 adr, res; |
17311 | u32 src, dst; |
17312 | |
17313 | res = DREGu32((Opcode >> 0) & 7); |
17314 | res = (res >> 16) | (res << 16); |
17315 | flag_C = 0; |
17316 | flag_V = 0; |
17317 | flag_NotZ = res; |
17318 | flag_N = res >> 24; |
17319 | DREGu32((Opcode >> 0) & 7) = res; |
17320 | RET(4) |
17321 | } |
17322 | |
17323 | // MOVEMRa |
17324 | OPCODE(0x4890) |
17325 | { |
17326 | u32 adr, res; |
17327 | u32 src, dst; |
17328 | |
17329 | u32 *psrc; |
17330 | |
17331 | FETCH_WORD(res); |
17332 | adr = AREG((Opcode >> 0) & 7); |
17333 | psrc = &DREGu32(0); |
17334 | dst = adr; |
17335 | PRE_IO |
17336 | do |
17337 | { |
17338 | if (res & 1) |
17339 | { |
17340 | WRITE_WORD_F(adr, *psrc) |
17341 | adr += 2; |
17342 | } |
17343 | psrc++; |
17344 | } while (res >>= 1); |
17345 | POST_IO |
17346 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17347 | #ifdef USE_CYCLONE_TIMING |
17348 | RET(8) |
17349 | #else |
17350 | RET(12) |
17351 | #endif |
17352 | } |
17353 | |
17354 | // MOVEMRa |
17355 | OPCODE(0x48A0) |
17356 | { |
17357 | u32 adr, res; |
17358 | u32 src, dst; |
17359 | |
17360 | u32 *psrc; |
17361 | |
17362 | FETCH_WORD(res); |
17363 | adr = AREG((Opcode >> 0) & 7); |
17364 | psrc = &AREGu32(7); |
17365 | dst = adr; |
17366 | PRE_IO |
17367 | do |
17368 | { |
17369 | if (res & 1) |
17370 | { |
17371 | adr -= 2; |
17372 | WRITE_WORD_F(adr, *psrc) |
17373 | } |
17374 | psrc--; |
17375 | } while (res >>= 1); |
17376 | AREG((Opcode >> 0) & 7) = adr; |
17377 | POST_IO |
17378 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17379 | RET(8) |
17380 | } |
17381 | |
17382 | // MOVEMRa |
17383 | OPCODE(0x48A8) |
17384 | { |
17385 | u32 adr, res; |
17386 | u32 src, dst; |
17387 | |
17388 | u32 *psrc; |
17389 | |
17390 | FETCH_WORD(res); |
17391 | FETCH_SWORD(adr); |
17392 | adr += AREG((Opcode >> 0) & 7); |
17393 | psrc = &DREGu32(0); |
17394 | dst = adr; |
17395 | PRE_IO |
17396 | do |
17397 | { |
17398 | if (res & 1) |
17399 | { |
17400 | WRITE_WORD_F(adr, *psrc) |
17401 | adr += 2; |
17402 | } |
17403 | psrc++; |
17404 | } while (res >>= 1); |
17405 | POST_IO |
17406 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17407 | #ifdef USE_CYCLONE_TIMING |
17408 | RET(12) |
17409 | #else |
17410 | RET(20) |
17411 | #endif |
17412 | } |
17413 | |
17414 | // MOVEMRa |
17415 | OPCODE(0x48B0) |
17416 | { |
17417 | u32 adr, res; |
17418 | u32 src, dst; |
17419 | |
17420 | u32 *psrc; |
17421 | |
17422 | FETCH_WORD(res); |
17423 | adr = AREG((Opcode >> 0) & 7); |
17424 | DECODE_EXT_WORD |
17425 | psrc = &DREGu32(0); |
17426 | dst = adr; |
17427 | PRE_IO |
17428 | do |
17429 | { |
17430 | if (res & 1) |
17431 | { |
17432 | WRITE_WORD_F(adr, *psrc) |
17433 | adr += 2; |
17434 | } |
17435 | psrc++; |
17436 | } while (res >>= 1); |
17437 | POST_IO |
17438 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17439 | #ifdef USE_CYCLONE_TIMING |
17440 | RET(14) |
17441 | #else |
17442 | RET(24) |
17443 | #endif |
17444 | } |
17445 | |
17446 | // MOVEMRa |
17447 | OPCODE(0x48B8) |
17448 | { |
17449 | u32 adr, res; |
17450 | u32 src, dst; |
17451 | |
17452 | u32 *psrc; |
17453 | |
17454 | FETCH_WORD(res); |
17455 | FETCH_SWORD(adr); |
17456 | psrc = &DREGu32(0); |
17457 | dst = adr; |
17458 | PRE_IO |
17459 | do |
17460 | { |
17461 | if (res & 1) |
17462 | { |
17463 | WRITE_WORD_F(adr, *psrc) |
17464 | adr += 2; |
17465 | } |
17466 | psrc++; |
17467 | } while (res >>= 1); |
17468 | POST_IO |
17469 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17470 | #ifdef USE_CYCLONE_TIMING |
17471 | RET(12) |
17472 | #else |
17473 | RET(20) |
17474 | #endif |
17475 | } |
17476 | |
17477 | // MOVEMRa |
17478 | OPCODE(0x48B9) |
17479 | { |
17480 | u32 adr, res; |
17481 | u32 src, dst; |
17482 | |
17483 | u32 *psrc; |
17484 | |
17485 | FETCH_WORD(res); |
17486 | FETCH_LONG(adr); |
17487 | psrc = &DREGu32(0); |
17488 | dst = adr; |
17489 | PRE_IO |
17490 | do |
17491 | { |
17492 | if (res & 1) |
17493 | { |
17494 | WRITE_WORD_F(adr, *psrc) |
17495 | adr += 2; |
17496 | } |
17497 | psrc++; |
17498 | } while (res >>= 1); |
17499 | POST_IO |
17500 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17501 | #ifdef USE_CYCLONE_TIMING |
17502 | RET(16) |
17503 | #else |
17504 | RET(28) |
17505 | #endif |
17506 | } |
17507 | |
17508 | // MOVEMRa |
17509 | OPCODE(0x48A7) |
17510 | { |
17511 | u32 adr, res; |
17512 | u32 src, dst; |
17513 | |
17514 | u32 *psrc; |
17515 | |
17516 | FETCH_WORD(res); |
17517 | adr = AREG(7); |
17518 | psrc = &AREGu32(7); |
17519 | dst = adr; |
17520 | PRE_IO |
17521 | do |
17522 | { |
17523 | if (res & 1) |
17524 | { |
17525 | adr -= 2; |
17526 | WRITE_WORD_F(adr, *psrc) |
17527 | } |
17528 | psrc--; |
17529 | } while (res >>= 1); |
17530 | AREG(7) = adr; |
17531 | POST_IO |
17532 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17533 | RET(8) |
17534 | } |
17535 | |
17536 | // MOVEMRa |
17537 | OPCODE(0x48D0) |
17538 | { |
17539 | u32 adr, res; |
17540 | u32 src, dst; |
17541 | |
17542 | u32 *psrc; |
17543 | |
17544 | FETCH_WORD(res); |
17545 | adr = AREG((Opcode >> 0) & 7); |
17546 | psrc = &DREGu32(0); |
17547 | dst = adr; |
17548 | PRE_IO |
17549 | do |
17550 | { |
17551 | if (res & 1) |
17552 | { |
17553 | WRITE_LONG_F(adr, *psrc) |
17554 | adr += 4; |
17555 | } |
17556 | psrc++; |
17557 | } while (res >>= 1); |
17558 | POST_IO |
17559 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17560 | #ifdef USE_CYCLONE_TIMING |
17561 | RET(8) |
17562 | #else |
17563 | RET(16) |
17564 | #endif |
17565 | } |
17566 | |
17567 | // MOVEMRa |
17568 | OPCODE(0x48E0) |
17569 | { |
17570 | u32 adr, res; |
17571 | u32 src, dst; |
17572 | |
17573 | u32 *psrc; |
17574 | |
17575 | FETCH_WORD(res); |
17576 | adr = AREG((Opcode >> 0) & 7); |
17577 | psrc = &AREGu32(7); |
17578 | dst = adr; |
17579 | PRE_IO |
17580 | do |
17581 | { |
17582 | if (res & 1) |
17583 | { |
17584 | adr -= 4; |
17585 | WRITE_LONG_DEC_F(adr, *psrc) |
17586 | } |
17587 | psrc--; |
17588 | } while (res >>= 1); |
17589 | AREG((Opcode >> 0) & 7) = adr; |
17590 | POST_IO |
17591 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17592 | RET(8) |
17593 | } |
17594 | |
17595 | // MOVEMRa |
17596 | OPCODE(0x48E8) |
17597 | { |
17598 | u32 adr, res; |
17599 | u32 src, dst; |
17600 | |
17601 | u32 *psrc; |
17602 | |
17603 | FETCH_WORD(res); |
17604 | FETCH_SWORD(adr); |
17605 | adr += AREG((Opcode >> 0) & 7); |
17606 | psrc = &DREGu32(0); |
17607 | dst = adr; |
17608 | PRE_IO |
17609 | do |
17610 | { |
17611 | if (res & 1) |
17612 | { |
17613 | WRITE_LONG_F(adr, *psrc) |
17614 | adr += 4; |
17615 | } |
17616 | psrc++; |
17617 | } while (res >>= 1); |
17618 | POST_IO |
17619 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17620 | #ifdef USE_CYCLONE_TIMING |
17621 | RET(12) |
17622 | #else |
17623 | RET(24) |
17624 | #endif |
17625 | } |
17626 | |
17627 | // MOVEMRa |
17628 | OPCODE(0x48F0) |
17629 | { |
17630 | u32 adr, res; |
17631 | u32 src, dst; |
17632 | |
17633 | u32 *psrc; |
17634 | |
17635 | FETCH_WORD(res); |
17636 | adr = AREG((Opcode >> 0) & 7); |
17637 | DECODE_EXT_WORD |
17638 | psrc = &DREGu32(0); |
17639 | dst = adr; |
17640 | PRE_IO |
17641 | do |
17642 | { |
17643 | if (res & 1) |
17644 | { |
17645 | WRITE_LONG_F(adr, *psrc) |
17646 | adr += 4; |
17647 | } |
17648 | psrc++; |
17649 | } while (res >>= 1); |
17650 | POST_IO |
17651 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17652 | #ifdef USE_CYCLONE_TIMING |
17653 | RET(14) |
17654 | #else |
17655 | RET(28) |
17656 | #endif |
17657 | } |
17658 | |
17659 | // MOVEMRa |
17660 | OPCODE(0x48F8) |
17661 | { |
17662 | u32 adr, res; |
17663 | u32 src, dst; |
17664 | |
17665 | u32 *psrc; |
17666 | |
17667 | FETCH_WORD(res); |
17668 | FETCH_SWORD(adr); |
17669 | psrc = &DREGu32(0); |
17670 | dst = adr; |
17671 | PRE_IO |
17672 | do |
17673 | { |
17674 | if (res & 1) |
17675 | { |
17676 | WRITE_LONG_F(adr, *psrc) |
17677 | adr += 4; |
17678 | } |
17679 | psrc++; |
17680 | } while (res >>= 1); |
17681 | POST_IO |
17682 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17683 | #ifdef USE_CYCLONE_TIMING |
17684 | RET(12) |
17685 | #else |
17686 | RET(24) |
17687 | #endif |
17688 | } |
17689 | |
17690 | // MOVEMRa |
17691 | OPCODE(0x48F9) |
17692 | { |
17693 | u32 adr, res; |
17694 | u32 src, dst; |
17695 | |
17696 | u32 *psrc; |
17697 | |
17698 | FETCH_WORD(res); |
17699 | FETCH_LONG(adr); |
17700 | psrc = &DREGu32(0); |
17701 | dst = adr; |
17702 | PRE_IO |
17703 | do |
17704 | { |
17705 | if (res & 1) |
17706 | { |
17707 | WRITE_LONG_F(adr, *psrc) |
17708 | adr += 4; |
17709 | } |
17710 | psrc++; |
17711 | } while (res >>= 1); |
17712 | POST_IO |
17713 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17714 | #ifdef USE_CYCLONE_TIMING |
17715 | RET(16) |
17716 | #else |
17717 | RET(32) |
17718 | #endif |
17719 | } |
17720 | |
17721 | // MOVEMRa |
17722 | OPCODE(0x48E7) |
17723 | { |
17724 | u32 adr, res; |
17725 | u32 src, dst; |
17726 | |
17727 | u32 *psrc; |
17728 | |
17729 | FETCH_WORD(res); |
17730 | adr = AREG(7); |
17731 | psrc = &AREGu32(7); |
17732 | dst = adr; |
17733 | PRE_IO |
17734 | do |
17735 | { |
17736 | if (res & 1) |
17737 | { |
17738 | adr -= 4; |
17739 | WRITE_LONG_DEC_F(adr, *psrc) |
17740 | } |
17741 | psrc--; |
17742 | } while (res >>= 1); |
17743 | AREG(7) = adr; |
17744 | POST_IO |
17745 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17746 | RET(8) |
17747 | } |
17748 | |
17749 | // EXT |
17750 | OPCODE(0x4880) |
17751 | { |
17752 | u32 adr, res; |
17753 | u32 src, dst; |
17754 | |
17755 | res = (s32)DREGs8((Opcode >> 0) & 7); |
17756 | flag_C = 0; |
17757 | flag_V = 0; |
17758 | flag_NotZ = res; |
17759 | flag_N = res; |
17760 | DREGu16((Opcode >> 0) & 7) = res; |
17761 | RET(4) |
17762 | } |
17763 | |
17764 | // EXT |
17765 | OPCODE(0x48C0) |
17766 | { |
17767 | u32 adr, res; |
17768 | u32 src, dst; |
17769 | |
17770 | res = (s32)DREGs16((Opcode >> 0) & 7); |
17771 | flag_C = 0; |
17772 | flag_V = 0; |
17773 | flag_NotZ = res; |
17774 | flag_N = res >> 8; |
17775 | DREGu32((Opcode >> 0) & 7) = res; |
17776 | RET(4) |
17777 | } |
17778 | |
17779 | // TST |
17780 | OPCODE(0x4A00) |
17781 | { |
17782 | u32 adr, res; |
17783 | u32 src, dst; |
17784 | |
17785 | res = DREGu8((Opcode >> 0) & 7); |
17786 | flag_C = 0; |
17787 | flag_V = 0; |
17788 | flag_NotZ = res; |
17789 | flag_N = res; |
17790 | RET(4) |
17791 | } |
17792 | |
17793 | // TST |
17794 | OPCODE(0x4A10) |
17795 | { |
17796 | u32 adr, res; |
17797 | u32 src, dst; |
17798 | |
17799 | adr = AREG((Opcode >> 0) & 7); |
17800 | PRE_IO |
17801 | READ_BYTE_F(adr, res) |
17802 | flag_C = 0; |
17803 | flag_V = 0; |
17804 | flag_NotZ = res; |
17805 | flag_N = res; |
17806 | POST_IO |
17807 | RET(8) |
17808 | } |
17809 | |
17810 | // TST |
17811 | OPCODE(0x4A18) |
17812 | { |
17813 | u32 adr, res; |
17814 | u32 src, dst; |
17815 | |
17816 | adr = AREG((Opcode >> 0) & 7); |
17817 | AREG((Opcode >> 0) & 7) += 1; |
17818 | PRE_IO |
17819 | READ_BYTE_F(adr, res) |
17820 | flag_C = 0; |
17821 | flag_V = 0; |
17822 | flag_NotZ = res; |
17823 | flag_N = res; |
17824 | POST_IO |
17825 | RET(8) |
17826 | } |
17827 | |
17828 | // TST |
17829 | OPCODE(0x4A20) |
17830 | { |
17831 | u32 adr, res; |
17832 | u32 src, dst; |
17833 | |
17834 | adr = AREG((Opcode >> 0) & 7) - 1; |
17835 | AREG((Opcode >> 0) & 7) = adr; |
17836 | PRE_IO |
17837 | READ_BYTE_F(adr, res) |
17838 | flag_C = 0; |
17839 | flag_V = 0; |
17840 | flag_NotZ = res; |
17841 | flag_N = res; |
17842 | POST_IO |
17843 | RET(10) |
17844 | } |
17845 | |
17846 | // TST |
17847 | OPCODE(0x4A28) |
17848 | { |
17849 | u32 adr, res; |
17850 | u32 src, dst; |
17851 | |
17852 | FETCH_SWORD(adr); |
17853 | adr += AREG((Opcode >> 0) & 7); |
17854 | PRE_IO |
17855 | READ_BYTE_F(adr, res) |
17856 | flag_C = 0; |
17857 | flag_V = 0; |
17858 | flag_NotZ = res; |
17859 | flag_N = res; |
17860 | POST_IO |
17861 | RET(12) |
17862 | } |
17863 | |
17864 | // TST |
17865 | OPCODE(0x4A30) |
17866 | { |
17867 | u32 adr, res; |
17868 | u32 src, dst; |
17869 | |
17870 | adr = AREG((Opcode >> 0) & 7); |
17871 | DECODE_EXT_WORD |
17872 | PRE_IO |
17873 | READ_BYTE_F(adr, res) |
17874 | flag_C = 0; |
17875 | flag_V = 0; |
17876 | flag_NotZ = res; |
17877 | flag_N = res; |
17878 | POST_IO |
17879 | RET(14) |
17880 | } |
17881 | |
17882 | // TST |
17883 | OPCODE(0x4A38) |
17884 | { |
17885 | u32 adr, res; |
17886 | u32 src, dst; |
17887 | |
17888 | FETCH_SWORD(adr); |
17889 | PRE_IO |
17890 | READ_BYTE_F(adr, res) |
17891 | flag_C = 0; |
17892 | flag_V = 0; |
17893 | flag_NotZ = res; |
17894 | flag_N = res; |
17895 | POST_IO |
17896 | RET(12) |
17897 | } |
17898 | |
17899 | // TST |
17900 | OPCODE(0x4A39) |
17901 | { |
17902 | u32 adr, res; |
17903 | u32 src, dst; |
17904 | |
17905 | FETCH_LONG(adr); |
17906 | PRE_IO |
17907 | READ_BYTE_F(adr, res) |
17908 | flag_C = 0; |
17909 | flag_V = 0; |
17910 | flag_NotZ = res; |
17911 | flag_N = res; |
17912 | POST_IO |
17913 | RET(16) |
17914 | } |
17915 | |
17916 | // TST |
17917 | OPCODE(0x4A1F) |
17918 | { |
17919 | u32 adr, res; |
17920 | u32 src, dst; |
17921 | |
17922 | adr = AREG(7); |
17923 | AREG(7) += 2; |
17924 | PRE_IO |
17925 | READ_BYTE_F(adr, res) |
17926 | flag_C = 0; |
17927 | flag_V = 0; |
17928 | flag_NotZ = res; |
17929 | flag_N = res; |
17930 | POST_IO |
17931 | RET(8) |
17932 | } |
17933 | |
17934 | // TST |
17935 | OPCODE(0x4A27) |
17936 | { |
17937 | u32 adr, res; |
17938 | u32 src, dst; |
17939 | |
17940 | adr = AREG(7) - 2; |
17941 | AREG(7) = adr; |
17942 | PRE_IO |
17943 | READ_BYTE_F(adr, res) |
17944 | flag_C = 0; |
17945 | flag_V = 0; |
17946 | flag_NotZ = res; |
17947 | flag_N = res; |
17948 | POST_IO |
17949 | RET(10) |
17950 | } |
17951 | |
17952 | // TST |
17953 | OPCODE(0x4A40) |
17954 | { |
17955 | u32 adr, res; |
17956 | u32 src, dst; |
17957 | |
17958 | res = DREGu16((Opcode >> 0) & 7); |
17959 | flag_C = 0; |
17960 | flag_V = 0; |
17961 | flag_NotZ = res; |
17962 | flag_N = res >> 8; |
17963 | RET(4) |
17964 | } |
17965 | |
17966 | // TST |
17967 | OPCODE(0x4A50) |
17968 | { |
17969 | u32 adr, res; |
17970 | u32 src, dst; |
17971 | |
17972 | adr = AREG((Opcode >> 0) & 7); |
17973 | PRE_IO |
17974 | READ_WORD_F(adr, res) |
17975 | flag_C = 0; |
17976 | flag_V = 0; |
17977 | flag_NotZ = res; |
17978 | flag_N = res >> 8; |
17979 | POST_IO |
17980 | RET(8) |
17981 | } |
17982 | |
17983 | // TST |
17984 | OPCODE(0x4A58) |
17985 | { |
17986 | u32 adr, res; |
17987 | u32 src, dst; |
17988 | |
17989 | adr = AREG((Opcode >> 0) & 7); |
17990 | AREG((Opcode >> 0) & 7) += 2; |
17991 | PRE_IO |
17992 | READ_WORD_F(adr, res) |
17993 | flag_C = 0; |
17994 | flag_V = 0; |
17995 | flag_NotZ = res; |
17996 | flag_N = res >> 8; |
17997 | POST_IO |
17998 | RET(8) |
17999 | } |
18000 | |
18001 | // TST |
18002 | OPCODE(0x4A60) |
18003 | { |
18004 | u32 adr, res; |
18005 | u32 src, dst; |
18006 | |
18007 | adr = AREG((Opcode >> 0) & 7) - 2; |
18008 | AREG((Opcode >> 0) & 7) = adr; |
18009 | PRE_IO |
18010 | READ_WORD_F(adr, res) |
18011 | flag_C = 0; |
18012 | flag_V = 0; |
18013 | flag_NotZ = res; |
18014 | flag_N = res >> 8; |
18015 | POST_IO |
18016 | RET(10) |
18017 | } |
18018 | |
18019 | // TST |
18020 | OPCODE(0x4A68) |
18021 | { |
18022 | u32 adr, res; |
18023 | u32 src, dst; |
18024 | |
18025 | FETCH_SWORD(adr); |
18026 | adr += AREG((Opcode >> 0) & 7); |
18027 | PRE_IO |
18028 | READ_WORD_F(adr, res) |
18029 | flag_C = 0; |
18030 | flag_V = 0; |
18031 | flag_NotZ = res; |
18032 | flag_N = res >> 8; |
18033 | POST_IO |
18034 | RET(12) |
18035 | } |
18036 | |
18037 | // TST |
18038 | OPCODE(0x4A70) |
18039 | { |
18040 | u32 adr, res; |
18041 | u32 src, dst; |
18042 | |
18043 | adr = AREG((Opcode >> 0) & 7); |
18044 | DECODE_EXT_WORD |
18045 | PRE_IO |
18046 | READ_WORD_F(adr, res) |
18047 | flag_C = 0; |
18048 | flag_V = 0; |
18049 | flag_NotZ = res; |
18050 | flag_N = res >> 8; |
18051 | POST_IO |
18052 | RET(14) |
18053 | } |
18054 | |
18055 | // TST |
18056 | OPCODE(0x4A78) |
18057 | { |
18058 | u32 adr, res; |
18059 | u32 src, dst; |
18060 | |
18061 | FETCH_SWORD(adr); |
18062 | PRE_IO |
18063 | READ_WORD_F(adr, res) |
18064 | flag_C = 0; |
18065 | flag_V = 0; |
18066 | flag_NotZ = res; |
18067 | flag_N = res >> 8; |
18068 | POST_IO |
18069 | RET(12) |
18070 | } |
18071 | |
18072 | // TST |
18073 | OPCODE(0x4A79) |
18074 | { |
18075 | u32 adr, res; |
18076 | u32 src, dst; |
18077 | |
18078 | FETCH_LONG(adr); |
18079 | PRE_IO |
18080 | READ_WORD_F(adr, res) |
18081 | flag_C = 0; |
18082 | flag_V = 0; |
18083 | flag_NotZ = res; |
18084 | flag_N = res >> 8; |
18085 | POST_IO |
18086 | RET(16) |
18087 | } |
18088 | |
18089 | // TST |
18090 | OPCODE(0x4A5F) |
18091 | { |
18092 | u32 adr, res; |
18093 | u32 src, dst; |
18094 | |
18095 | adr = AREG(7); |
18096 | AREG(7) += 2; |
18097 | PRE_IO |
18098 | READ_WORD_F(adr, res) |
18099 | flag_C = 0; |
18100 | flag_V = 0; |
18101 | flag_NotZ = res; |
18102 | flag_N = res >> 8; |
18103 | POST_IO |
18104 | RET(8) |
18105 | } |
18106 | |
18107 | // TST |
18108 | OPCODE(0x4A67) |
18109 | { |
18110 | u32 adr, res; |
18111 | u32 src, dst; |
18112 | |
18113 | adr = AREG(7) - 2; |
18114 | AREG(7) = adr; |
18115 | PRE_IO |
18116 | READ_WORD_F(adr, res) |
18117 | flag_C = 0; |
18118 | flag_V = 0; |
18119 | flag_NotZ = res; |
18120 | flag_N = res >> 8; |
18121 | POST_IO |
18122 | RET(10) |
18123 | } |
18124 | |
18125 | // TST |
18126 | OPCODE(0x4A80) |
18127 | { |
18128 | u32 adr, res; |
18129 | u32 src, dst; |
18130 | |
18131 | res = DREGu32((Opcode >> 0) & 7); |
18132 | flag_C = 0; |
18133 | flag_V = 0; |
18134 | flag_NotZ = res; |
18135 | flag_N = res >> 24; |
18136 | RET(4) |
18137 | } |
18138 | |
18139 | // TST |
18140 | OPCODE(0x4A90) |
18141 | { |
18142 | u32 adr, res; |
18143 | u32 src, dst; |
18144 | |
18145 | adr = AREG((Opcode >> 0) & 7); |
18146 | PRE_IO |
18147 | READ_LONG_F(adr, res) |
18148 | flag_C = 0; |
18149 | flag_V = 0; |
18150 | flag_NotZ = res; |
18151 | flag_N = res >> 24; |
18152 | POST_IO |
18153 | RET(12) |
18154 | } |
18155 | |
18156 | // TST |
18157 | OPCODE(0x4A98) |
18158 | { |
18159 | u32 adr, res; |
18160 | u32 src, dst; |
18161 | |
18162 | adr = AREG((Opcode >> 0) & 7); |
18163 | AREG((Opcode >> 0) & 7) += 4; |
18164 | PRE_IO |
18165 | READ_LONG_F(adr, res) |
18166 | flag_C = 0; |
18167 | flag_V = 0; |
18168 | flag_NotZ = res; |
18169 | flag_N = res >> 24; |
18170 | POST_IO |
18171 | RET(12) |
18172 | } |
18173 | |
18174 | // TST |
18175 | OPCODE(0x4AA0) |
18176 | { |
18177 | u32 adr, res; |
18178 | u32 src, dst; |
18179 | |
18180 | adr = AREG((Opcode >> 0) & 7) - 4; |
18181 | AREG((Opcode >> 0) & 7) = adr; |
18182 | PRE_IO |
18183 | READ_LONG_F(adr, res) |
18184 | flag_C = 0; |
18185 | flag_V = 0; |
18186 | flag_NotZ = res; |
18187 | flag_N = res >> 24; |
18188 | POST_IO |
18189 | RET(14) |
18190 | } |
18191 | |
18192 | // TST |
18193 | OPCODE(0x4AA8) |
18194 | { |
18195 | u32 adr, res; |
18196 | u32 src, dst; |
18197 | |
18198 | FETCH_SWORD(adr); |
18199 | adr += AREG((Opcode >> 0) & 7); |
18200 | PRE_IO |
18201 | READ_LONG_F(adr, res) |
18202 | flag_C = 0; |
18203 | flag_V = 0; |
18204 | flag_NotZ = res; |
18205 | flag_N = res >> 24; |
18206 | POST_IO |
18207 | RET(16) |
18208 | } |
18209 | |
18210 | // TST |
18211 | OPCODE(0x4AB0) |
18212 | { |
18213 | u32 adr, res; |
18214 | u32 src, dst; |
18215 | |
18216 | adr = AREG((Opcode >> 0) & 7); |
18217 | DECODE_EXT_WORD |
18218 | PRE_IO |
18219 | READ_LONG_F(adr, res) |
18220 | flag_C = 0; |
18221 | flag_V = 0; |
18222 | flag_NotZ = res; |
18223 | flag_N = res >> 24; |
18224 | POST_IO |
18225 | RET(18) |
18226 | } |
18227 | |
18228 | // TST |
18229 | OPCODE(0x4AB8) |
18230 | { |
18231 | u32 adr, res; |
18232 | u32 src, dst; |
18233 | |
18234 | FETCH_SWORD(adr); |
18235 | PRE_IO |
18236 | READ_LONG_F(adr, res) |
18237 | flag_C = 0; |
18238 | flag_V = 0; |
18239 | flag_NotZ = res; |
18240 | flag_N = res >> 24; |
18241 | POST_IO |
18242 | RET(16) |
18243 | } |
18244 | |
18245 | // TST |
18246 | OPCODE(0x4AB9) |
18247 | { |
18248 | u32 adr, res; |
18249 | u32 src, dst; |
18250 | |
18251 | FETCH_LONG(adr); |
18252 | PRE_IO |
18253 | READ_LONG_F(adr, res) |
18254 | flag_C = 0; |
18255 | flag_V = 0; |
18256 | flag_NotZ = res; |
18257 | flag_N = res >> 24; |
18258 | POST_IO |
18259 | RET(20) |
18260 | } |
18261 | |
18262 | // TST |
18263 | OPCODE(0x4A9F) |
18264 | { |
18265 | u32 adr, res; |
18266 | u32 src, dst; |
18267 | |
18268 | adr = AREG(7); |
18269 | AREG(7) += 4; |
18270 | PRE_IO |
18271 | READ_LONG_F(adr, res) |
18272 | flag_C = 0; |
18273 | flag_V = 0; |
18274 | flag_NotZ = res; |
18275 | flag_N = res >> 24; |
18276 | POST_IO |
18277 | RET(12) |
18278 | } |
18279 | |
18280 | // TST |
18281 | OPCODE(0x4AA7) |
18282 | { |
18283 | u32 adr, res; |
18284 | u32 src, dst; |
18285 | |
18286 | adr = AREG(7) - 4; |
18287 | AREG(7) = adr; |
18288 | PRE_IO |
18289 | READ_LONG_F(adr, res) |
18290 | flag_C = 0; |
18291 | flag_V = 0; |
18292 | flag_NotZ = res; |
18293 | flag_N = res >> 24; |
18294 | POST_IO |
18295 | RET(14) |
18296 | } |
18297 | |
18298 | // TAS |
18299 | OPCODE(0x4AC0) |
18300 | { |
18301 | u32 adr, res; |
18302 | u32 src, dst; |
18303 | |
18304 | res = DREGu8((Opcode >> 0) & 7); |
18305 | flag_C = 0; |
18306 | flag_V = 0; |
18307 | flag_NotZ = res; |
18308 | flag_N = res; |
18309 | res |= 0x80; |
18310 | DREGu8((Opcode >> 0) & 7) = res; |
18311 | RET(4) |
18312 | } |
18313 | |
18314 | // TAS |
18315 | OPCODE(0x4AD0) |
18316 | { |
18317 | u32 adr, res; |
18318 | u32 src, dst; |
18319 | |
18320 | adr = AREG((Opcode >> 0) & 7); |
18321 | PRE_IO |
18322 | READ_BYTE_F(adr, res) |
18323 | flag_C = 0; |
18324 | flag_V = 0; |
18325 | flag_NotZ = res; |
18326 | flag_N = res; |
18327 | POST_IO |
18328 | RET(8) |
18329 | } |
18330 | |
18331 | // TAS |
18332 | OPCODE(0x4AD8) |
18333 | { |
18334 | u32 adr, res; |
18335 | u32 src, dst; |
18336 | |
18337 | adr = AREG((Opcode >> 0) & 7); |
18338 | AREG((Opcode >> 0) & 7) += 1; |
18339 | PRE_IO |
18340 | READ_BYTE_F(adr, res) |
18341 | flag_C = 0; |
18342 | flag_V = 0; |
18343 | flag_NotZ = res; |
18344 | flag_N = res; |
18345 | POST_IO |
18346 | RET(8) |
18347 | } |
18348 | |
18349 | // TAS |
18350 | OPCODE(0x4AE0) |
18351 | { |
18352 | u32 adr, res; |
18353 | u32 src, dst; |
18354 | |
18355 | adr = AREG((Opcode >> 0) & 7) - 1; |
18356 | AREG((Opcode >> 0) & 7) = adr; |
18357 | PRE_IO |
18358 | READ_BYTE_F(adr, res) |
18359 | flag_C = 0; |
18360 | flag_V = 0; |
18361 | flag_NotZ = res; |
18362 | flag_N = res; |
18363 | POST_IO |
18364 | RET(10) |
18365 | } |
18366 | |
18367 | // TAS |
18368 | OPCODE(0x4AE8) |
18369 | { |
18370 | u32 adr, res; |
18371 | u32 src, dst; |
18372 | |
18373 | FETCH_SWORD(adr); |
18374 | adr += AREG((Opcode >> 0) & 7); |
18375 | PRE_IO |
18376 | READ_BYTE_F(adr, res) |
18377 | flag_C = 0; |
18378 | flag_V = 0; |
18379 | flag_NotZ = res; |
18380 | flag_N = res; |
18381 | POST_IO |
18382 | RET(12) |
18383 | } |
18384 | |
18385 | // TAS |
18386 | OPCODE(0x4AF0) |
18387 | { |
18388 | u32 adr, res; |
18389 | u32 src, dst; |
18390 | |
18391 | adr = AREG((Opcode >> 0) & 7); |
18392 | DECODE_EXT_WORD |
18393 | PRE_IO |
18394 | READ_BYTE_F(adr, res) |
18395 | flag_C = 0; |
18396 | flag_V = 0; |
18397 | flag_NotZ = res; |
18398 | flag_N = res; |
18399 | POST_IO |
18400 | RET(14) |
18401 | } |
18402 | |
18403 | // TAS |
18404 | OPCODE(0x4AF8) |
18405 | { |
18406 | u32 adr, res; |
18407 | u32 src, dst; |
18408 | |
18409 | FETCH_SWORD(adr); |
18410 | PRE_IO |
18411 | READ_BYTE_F(adr, res) |
18412 | flag_C = 0; |
18413 | flag_V = 0; |
18414 | flag_NotZ = res; |
18415 | flag_N = res; |
18416 | POST_IO |
18417 | RET(12) |
18418 | } |
18419 | |
18420 | // TAS |
18421 | OPCODE(0x4AF9) |
18422 | { |
18423 | u32 adr, res; |
18424 | u32 src, dst; |
18425 | |
18426 | FETCH_LONG(adr); |
18427 | PRE_IO |
18428 | READ_BYTE_F(adr, res) |
18429 | flag_C = 0; |
18430 | flag_V = 0; |
18431 | flag_NotZ = res; |
18432 | flag_N = res; |
18433 | POST_IO |
18434 | RET(16) |
18435 | } |
18436 | |
18437 | // TAS |
18438 | OPCODE(0x4ADF) |
18439 | { |
18440 | u32 adr, res; |
18441 | u32 src, dst; |
18442 | |
18443 | adr = AREG(7); |
18444 | AREG(7) += 2; |
18445 | PRE_IO |
18446 | READ_BYTE_F(adr, res) |
18447 | flag_C = 0; |
18448 | flag_V = 0; |
18449 | flag_NotZ = res; |
18450 | flag_N = res; |
18451 | POST_IO |
18452 | RET(8) |
18453 | } |
18454 | |
18455 | // TAS |
18456 | OPCODE(0x4AE7) |
18457 | { |
18458 | u32 adr, res; |
18459 | u32 src, dst; |
18460 | |
18461 | adr = AREG(7) - 2; |
18462 | AREG(7) = adr; |
18463 | PRE_IO |
18464 | READ_BYTE_F(adr, res) |
18465 | flag_C = 0; |
18466 | flag_V = 0; |
18467 | flag_NotZ = res; |
18468 | flag_N = res; |
18469 | POST_IO |
18470 | RET(10) |
18471 | } |
18472 | |
18473 | // ILLEGAL |
18474 | OPCODE(0x4AFC) |
18475 | { |
18476 | u32 oldPC=GET_PC; |
18477 | SET_PC(oldPC-2) |
18478 | execute_exception(M68K_ILLEGAL_INSTRUCTION_EX); |
03e4f2a3 |
18479 | RET(0) |
70357ce5 |
18480 | } |
18481 | |
18482 | // ILLEGAL A000-AFFF |
18483 | OPCODE(0xA000) |
18484 | { |
18485 | u32 oldPC=GET_PC; |
18486 | SET_PC(oldPC-2) |
18487 | execute_exception(M68K_1010_EX); |
03e4f2a3 |
18488 | RET(0) |
70357ce5 |
18489 | } |
18490 | |
18491 | // ILLEGAL F000-FFFF |
18492 | OPCODE(0xF000) |
18493 | { |
18494 | u32 oldPC=GET_PC; |
18495 | SET_PC(oldPC-2) |
18496 | execute_exception(M68K_1111_EX); |
03e4f2a3 |
18497 | RET(0) // 4 already taken by exc. handler |
70357ce5 |
18498 | } |
18499 | |
18500 | // MOVEMaR |
18501 | OPCODE(0x4C90) |
18502 | { |
18503 | u32 adr, res; |
18504 | u32 src, dst; |
18505 | |
18506 | s32 *psrc; |
18507 | |
18508 | FETCH_WORD(res); |
18509 | adr = AREG((Opcode >> 0) & 7); |
18510 | psrc = &DREGs32(0); |
18511 | dst = adr; |
18512 | PRE_IO |
18513 | do |
18514 | { |
18515 | if (res & 1) |
18516 | { |
18517 | READSX_WORD_F(adr, *psrc) |
18518 | adr += 2; |
18519 | } |
18520 | psrc++; |
18521 | } while (res >>= 1); |
18522 | POST_IO |
18523 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18524 | #ifdef USE_CYCLONE_TIMING |
18525 | RET(12) |
18526 | #else |
18527 | RET(16) |
18528 | #endif |
18529 | } |
18530 | |
18531 | // MOVEMaR |
18532 | OPCODE(0x4C98) |
18533 | { |
18534 | u32 adr, res; |
18535 | u32 src, dst; |
18536 | |
18537 | s32 *psrc; |
18538 | |
18539 | FETCH_WORD(res); |
18540 | adr = AREG((Opcode >> 0) & 7); |
18541 | psrc = &DREGs32(0); |
18542 | dst = adr; |
18543 | PRE_IO |
18544 | do |
18545 | { |
18546 | if (res & 1) |
18547 | { |
18548 | READSX_WORD_F(adr, *psrc) |
18549 | adr += 2; |
18550 | } |
18551 | psrc++; |
18552 | } while (res >>= 1); |
18553 | AREG((Opcode >> 0) & 7) = adr; |
18554 | POST_IO |
18555 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18556 | RET(12) |
18557 | } |
18558 | |
18559 | // MOVEMaR |
18560 | OPCODE(0x4CA8) |
18561 | { |
18562 | u32 adr, res; |
18563 | u32 src, dst; |
18564 | |
18565 | s32 *psrc; |
18566 | |
18567 | FETCH_WORD(res); |
18568 | FETCH_SWORD(adr); |
18569 | adr += AREG((Opcode >> 0) & 7); |
18570 | psrc = &DREGs32(0); |
18571 | dst = adr; |
18572 | PRE_IO |
18573 | do |
18574 | { |
18575 | if (res & 1) |
18576 | { |
18577 | READSX_WORD_F(adr, *psrc) |
18578 | adr += 2; |
18579 | } |
18580 | psrc++; |
18581 | } while (res >>= 1); |
18582 | POST_IO |
18583 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18584 | #ifdef USE_CYCLONE_TIMING |
18585 | RET(16) |
18586 | #else |
18587 | RET(24) |
18588 | #endif |
18589 | } |
18590 | |
18591 | // MOVEMaR |
18592 | OPCODE(0x4CB0) |
18593 | { |
18594 | u32 adr, res; |
18595 | u32 src, dst; |
18596 | |
18597 | s32 *psrc; |
18598 | |
18599 | FETCH_WORD(res); |
18600 | adr = AREG((Opcode >> 0) & 7); |
18601 | DECODE_EXT_WORD |
18602 | psrc = &DREGs32(0); |
18603 | dst = adr; |
18604 | PRE_IO |
18605 | do |
18606 | { |
18607 | if (res & 1) |
18608 | { |
18609 | READSX_WORD_F(adr, *psrc) |
18610 | adr += 2; |
18611 | } |
18612 | psrc++; |
18613 | } while (res >>= 1); |
18614 | POST_IO |
18615 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18616 | #ifdef USE_CYCLONE_TIMING |
18617 | RET(18) |
18618 | #else |
18619 | RET(28) |
18620 | #endif |
18621 | } |
18622 | |
18623 | // MOVEMaR |
18624 | OPCODE(0x4CB8) |
18625 | { |
18626 | u32 adr, res; |
18627 | u32 src, dst; |
18628 | |
18629 | s32 *psrc; |
18630 | |
18631 | FETCH_WORD(res); |
18632 | FETCH_SWORD(adr); |
18633 | psrc = &DREGs32(0); |
18634 | dst = adr; |
18635 | PRE_IO |
18636 | do |
18637 | { |
18638 | if (res & 1) |
18639 | { |
18640 | READSX_WORD_F(adr, *psrc) |
18641 | adr += 2; |
18642 | } |
18643 | psrc++; |
18644 | } while (res >>= 1); |
18645 | POST_IO |
18646 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18647 | #ifdef USE_CYCLONE_TIMING |
18648 | RET(16) |
18649 | #else |
18650 | RET(24) |
18651 | #endif |
18652 | } |
18653 | |
18654 | // MOVEMaR |
18655 | OPCODE(0x4CB9) |
18656 | { |
18657 | u32 adr, res; |
18658 | u32 src, dst; |
18659 | |
18660 | s32 *psrc; |
18661 | |
18662 | FETCH_WORD(res); |
18663 | FETCH_LONG(adr); |
18664 | psrc = &DREGs32(0); |
18665 | dst = adr; |
18666 | PRE_IO |
18667 | do |
18668 | { |
18669 | if (res & 1) |
18670 | { |
18671 | READSX_WORD_F(adr, *psrc) |
18672 | adr += 2; |
18673 | } |
18674 | psrc++; |
18675 | } while (res >>= 1); |
18676 | POST_IO |
18677 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18678 | #ifdef USE_CYCLONE_TIMING |
18679 | RET(20) |
18680 | #else |
18681 | RET(32) |
18682 | #endif |
18683 | } |
18684 | |
18685 | // MOVEMaR |
18686 | OPCODE(0x4CBA) |
18687 | { |
18688 | u32 adr, res; |
18689 | u32 src, dst; |
18690 | |
18691 | s32 *psrc; |
18692 | |
18693 | FETCH_WORD(res); |
18694 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
18695 | PC++; |
18696 | psrc = &DREGs32(0); |
18697 | dst = adr; |
18698 | PRE_IO |
18699 | do |
18700 | { |
18701 | if (res & 1) |
18702 | { |
18703 | READSX_WORD_F(adr, *psrc) |
18704 | adr += 2; |
18705 | } |
18706 | psrc++; |
18707 | } while (res >>= 1); |
18708 | POST_IO |
18709 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18710 | #ifdef USE_CYCLONE_TIMING |
18711 | RET(16) |
18712 | #else |
18713 | RET(24) |
18714 | #endif |
18715 | } |
18716 | |
18717 | // MOVEMaR |
18718 | OPCODE(0x4CBB) |
18719 | { |
18720 | u32 adr, res; |
18721 | u32 src, dst; |
18722 | |
18723 | s32 *psrc; |
18724 | |
18725 | FETCH_WORD(res); |
18726 | adr = (u32)(PC) - BasePC; |
18727 | DECODE_EXT_WORD |
18728 | psrc = &DREGs32(0); |
18729 | dst = adr; |
18730 | PRE_IO |
18731 | do |
18732 | { |
18733 | if (res & 1) |
18734 | { |
18735 | READSX_WORD_F(adr, *psrc) |
18736 | adr += 2; |
18737 | } |
18738 | psrc++; |
18739 | } while (res >>= 1); |
18740 | POST_IO |
18741 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18742 | #ifdef USE_CYCLONE_TIMING |
18743 | RET(18) |
18744 | #else |
18745 | RET(28) |
18746 | #endif |
18747 | } |
18748 | |
18749 | // MOVEMaR |
18750 | OPCODE(0x4C9F) |
18751 | { |
18752 | u32 adr, res; |
18753 | u32 src, dst; |
18754 | |
18755 | s32 *psrc; |
18756 | |
18757 | FETCH_WORD(res); |
18758 | adr = AREG(7); |
18759 | psrc = &DREGs32(0); |
18760 | dst = adr; |
18761 | PRE_IO |
18762 | do |
18763 | { |
18764 | if (res & 1) |
18765 | { |
18766 | READSX_WORD_F(adr, *psrc) |
18767 | adr += 2; |
18768 | } |
18769 | psrc++; |
18770 | } while (res >>= 1); |
18771 | AREG(7) = adr; |
18772 | POST_IO |
18773 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18774 | RET(12) |
18775 | } |
18776 | |
18777 | // MOVEMaR |
18778 | OPCODE(0x4CD0) |
18779 | { |
18780 | u32 adr, res; |
18781 | u32 src, dst; |
18782 | |
18783 | u32 *psrc; |
18784 | |
18785 | FETCH_WORD(res); |
18786 | adr = AREG((Opcode >> 0) & 7); |
18787 | psrc = &DREGu32(0); |
18788 | dst = adr; |
18789 | PRE_IO |
18790 | do |
18791 | { |
18792 | if (res & 1) |
18793 | { |
18794 | READ_LONG_F(adr, *psrc) |
18795 | adr += 4; |
18796 | } |
18797 | psrc++; |
18798 | } while (res >>= 1); |
18799 | POST_IO |
18800 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18801 | #ifdef USE_CYCLONE_TIMING |
18802 | RET(12) |
18803 | #else |
18804 | RET(20) |
18805 | #endif |
18806 | } |
18807 | |
18808 | // MOVEMaR |
18809 | OPCODE(0x4CD8) |
18810 | { |
18811 | u32 adr, res; |
18812 | u32 src, dst; |
18813 | |
18814 | u32 *psrc; |
18815 | |
18816 | FETCH_WORD(res); |
18817 | adr = AREG((Opcode >> 0) & 7); |
18818 | psrc = &DREGu32(0); |
18819 | dst = adr; |
18820 | PRE_IO |
18821 | do |
18822 | { |
18823 | if (res & 1) |
18824 | { |
18825 | READ_LONG_F(adr, *psrc) |
18826 | adr += 4; |
18827 | } |
18828 | psrc++; |
18829 | } while (res >>= 1); |
18830 | AREG((Opcode >> 0) & 7) = adr; |
18831 | POST_IO |
18832 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18833 | RET(12) |
18834 | } |
18835 | |
18836 | // MOVEMaR |
18837 | OPCODE(0x4CE8) |
18838 | { |
18839 | u32 adr, res; |
18840 | u32 src, dst; |
18841 | |
18842 | u32 *psrc; |
18843 | |
18844 | FETCH_WORD(res); |
18845 | FETCH_SWORD(adr); |
18846 | adr += AREG((Opcode >> 0) & 7); |
18847 | psrc = &DREGu32(0); |
18848 | dst = adr; |
18849 | PRE_IO |
18850 | do |
18851 | { |
18852 | if (res & 1) |
18853 | { |
18854 | READ_LONG_F(adr, *psrc) |
18855 | adr += 4; |
18856 | } |
18857 | psrc++; |
18858 | } while (res >>= 1); |
18859 | POST_IO |
18860 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18861 | #ifdef USE_CYCLONE_TIMING |
18862 | RET(16) |
18863 | #else |
18864 | RET(28) |
18865 | #endif |
18866 | } |
18867 | |
18868 | // MOVEMaR |
18869 | OPCODE(0x4CF0) |
18870 | { |
18871 | u32 adr, res; |
18872 | u32 src, dst; |
18873 | |
18874 | u32 *psrc; |
18875 | |
18876 | FETCH_WORD(res); |
18877 | adr = AREG((Opcode >> 0) & 7); |
18878 | DECODE_EXT_WORD |
18879 | psrc = &DREGu32(0); |
18880 | dst = adr; |
18881 | PRE_IO |
18882 | do |
18883 | { |
18884 | if (res & 1) |
18885 | { |
18886 | READ_LONG_F(adr, *psrc) |
18887 | adr += 4; |
18888 | } |
18889 | psrc++; |
18890 | } while (res >>= 1); |
18891 | POST_IO |
18892 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18893 | #ifdef USE_CYCLONE_TIMING |
18894 | RET(18) |
18895 | #else |
18896 | RET(32) |
18897 | #endif |
18898 | } |
18899 | |
18900 | // MOVEMaR |
18901 | OPCODE(0x4CF8) |
18902 | { |
18903 | u32 adr, res; |
18904 | u32 src, dst; |
18905 | |
18906 | u32 *psrc; |
18907 | |
18908 | FETCH_WORD(res); |
18909 | FETCH_SWORD(adr); |
18910 | psrc = &DREGu32(0); |
18911 | dst = adr; |
18912 | PRE_IO |
18913 | do |
18914 | { |
18915 | if (res & 1) |
18916 | { |
18917 | READ_LONG_F(adr, *psrc) |
18918 | adr += 4; |
18919 | } |
18920 | psrc++; |
18921 | } while (res >>= 1); |
18922 | POST_IO |
18923 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18924 | #ifdef USE_CYCLONE_TIMING |
18925 | RET(16) |
18926 | #else |
18927 | RET(28) |
18928 | #endif |
18929 | } |
18930 | |
18931 | // MOVEMaR |
18932 | OPCODE(0x4CF9) |
18933 | { |
18934 | u32 adr, res; |
18935 | u32 src, dst; |
18936 | |
18937 | u32 *psrc; |
18938 | |
18939 | FETCH_WORD(res); |
18940 | FETCH_LONG(adr); |
18941 | psrc = &DREGu32(0); |
18942 | dst = adr; |
18943 | PRE_IO |
18944 | do |
18945 | { |
18946 | if (res & 1) |
18947 | { |
18948 | READ_LONG_F(adr, *psrc) |
18949 | adr += 4; |
18950 | } |
18951 | psrc++; |
18952 | } while (res >>= 1); |
18953 | POST_IO |
18954 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18955 | #ifdef USE_CYCLONE_TIMING |
18956 | RET(20) |
18957 | #else |
18958 | RET(36) |
18959 | #endif |
18960 | } |
18961 | |
18962 | // MOVEMaR |
18963 | OPCODE(0x4CFA) |
18964 | { |
18965 | u32 adr, res; |
18966 | u32 src, dst; |
18967 | |
18968 | u32 *psrc; |
18969 | |
18970 | FETCH_WORD(res); |
18971 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
18972 | PC++; |
18973 | psrc = &DREGu32(0); |
18974 | dst = adr; |
18975 | PRE_IO |
18976 | do |
18977 | { |
18978 | if (res & 1) |
18979 | { |
18980 | READ_LONG_F(adr, *psrc) |
18981 | adr += 4; |
18982 | } |
18983 | psrc++; |
18984 | } while (res >>= 1); |
18985 | POST_IO |
18986 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18987 | #ifdef USE_CYCLONE_TIMING |
18988 | RET(16) |
18989 | #else |
18990 | RET(28) |
18991 | #endif |
18992 | } |
18993 | |
18994 | // MOVEMaR |
18995 | OPCODE(0x4CFB) |
18996 | { |
18997 | u32 adr, res; |
18998 | u32 src, dst; |
18999 | |
19000 | u32 *psrc; |
19001 | |
19002 | FETCH_WORD(res); |
19003 | adr = (u32)(PC) - BasePC; |
19004 | DECODE_EXT_WORD |
19005 | psrc = &DREGu32(0); |
19006 | dst = adr; |
19007 | PRE_IO |
19008 | do |
19009 | { |
19010 | if (res & 1) |
19011 | { |
19012 | READ_LONG_F(adr, *psrc) |
19013 | adr += 4; |
19014 | } |
19015 | psrc++; |
19016 | } while (res >>= 1); |
19017 | POST_IO |
19018 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19019 | #ifdef USE_CYCLONE_TIMING |
19020 | RET(18) |
19021 | #else |
19022 | RET(32) |
19023 | #endif |
19024 | } |
19025 | |
19026 | // MOVEMaR |
19027 | OPCODE(0x4CDF) |
19028 | { |
19029 | u32 adr, res; |
19030 | u32 src, dst; |
19031 | |
19032 | u32 *psrc; |
19033 | |
19034 | FETCH_WORD(res); |
19035 | adr = AREG(7); |
19036 | psrc = &DREGu32(0); |
19037 | dst = adr; |
19038 | PRE_IO |
19039 | do |
19040 | { |
19041 | if (res & 1) |
19042 | { |
19043 | READ_LONG_F(adr, *psrc) |
19044 | adr += 4; |
19045 | } |
19046 | psrc++; |
19047 | } while (res >>= 1); |
19048 | AREG(7) = adr; |
19049 | POST_IO |
19050 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19051 | RET(12) |
19052 | } |
19053 | |
19054 | // TRAP |
19055 | OPCODE(0x4E40) |
19056 | { |
19057 | execute_exception(M68K_TRAP_BASE_EX + (Opcode & 0xF)); |
19058 | RET(4) |
19059 | } |
19060 | |
19061 | // LINK |
19062 | OPCODE(0x4E50) |
19063 | { |
19064 | u32 adr, res; |
19065 | u32 src, dst; |
19066 | |
19067 | res = AREGu32((Opcode >> 0) & 7); |
19068 | PRE_IO |
19069 | PUSH_32_F(res) |
19070 | res = AREG(7); |
19071 | AREG((Opcode >> 0) & 7) = res; |
19072 | FETCH_SWORD(res); |
19073 | AREG(7) += res; |
19074 | POST_IO |
19075 | RET(16) |
19076 | } |
19077 | |
19078 | // LINKA7 |
19079 | OPCODE(0x4E57) |
19080 | { |
19081 | u32 adr, res; |
19082 | u32 src, dst; |
19083 | |
19084 | AREG(7) -= 4; |
19085 | PRE_IO |
19086 | WRITE_LONG_DEC_F(AREG(7), AREG(7)) |
19087 | FETCH_SWORD(res); |
19088 | AREG(7) += res; |
19089 | POST_IO |
19090 | RET(16) |
19091 | } |
19092 | |
19093 | // ULNK |
19094 | OPCODE(0x4E58) |
19095 | { |
19096 | u32 adr, res; |
19097 | u32 src, dst; |
19098 | |
19099 | src = AREGu32((Opcode >> 0) & 7); |
19100 | AREG(7) = src + 4; |
19101 | PRE_IO |
19102 | READ_LONG_F(src, res) |
19103 | AREG((Opcode >> 0) & 7) = res; |
19104 | POST_IO |
19105 | RET(12) |
19106 | } |
19107 | |
19108 | // ULNKA7 |
19109 | OPCODE(0x4E5F) |
19110 | { |
19111 | u32 adr, res; |
19112 | u32 src, dst; |
19113 | |
19114 | PRE_IO |
19115 | READ_LONG_F(AREG(7), AREG(7)) |
19116 | POST_IO |
19117 | RET(12) |
19118 | } |
19119 | |
19120 | // MOVEAUSP |
19121 | OPCODE(0x4E60) |
19122 | { |
19123 | u32 adr, res; |
19124 | u32 src, dst; |
19125 | |
19126 | if (!flag_S) |
19127 | { |
19128 | u32 oldPC=GET_PC; |
19129 | SET_PC(oldPC-2) |
19130 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19131 | RET(4) |
19132 | } |
19133 | res = AREGu32((Opcode >> 0) & 7); |
19134 | ASP = res; |
19135 | RET(4) |
19136 | } |
19137 | |
19138 | // MOVEUSPA |
19139 | OPCODE(0x4E68) |
19140 | { |
19141 | u32 adr, res; |
19142 | u32 src, dst; |
19143 | |
19144 | if (!flag_S) |
19145 | { |
19146 | u32 oldPC=GET_PC; |
19147 | SET_PC(oldPC-2) |
19148 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19149 | RET(4) |
19150 | } |
19151 | res = ASP; |
19152 | AREG((Opcode >> 0) & 7) = res; |
19153 | RET(4) |
19154 | } |
19155 | |
19156 | // RESET |
19157 | OPCODE(0x4E70) |
19158 | { |
19159 | u32 adr, res; |
19160 | u32 src, dst; |
19161 | |
19162 | if (!flag_S) |
19163 | { |
19164 | u32 oldPC=GET_PC; |
19165 | SET_PC(oldPC-2) |
19166 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19167 | RET(4) |
19168 | } |
19169 | PRE_IO |
19170 | if (m68kcontext.reset_handler) m68kcontext.reset_handler(); |
19171 | // CPU->Reset_CallBack(); |
19172 | POST_IO |
19173 | RET(132) |
19174 | } |
19175 | |
19176 | // NOP |
19177 | OPCODE(0x4E71) |
19178 | { |
19179 | RET(4) |
19180 | } |
19181 | |
19182 | // STOP |
19183 | OPCODE(0x4E72) |
19184 | { |
19185 | u32 adr, res; |
19186 | u32 src, dst; |
19187 | |
19188 | if (!flag_S) |
19189 | { |
19190 | u32 oldPC=GET_PC; |
19191 | SET_PC(oldPC-2) |
19192 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19193 | RET(4) |
19194 | } |
19195 | FETCH_WORD(res); |
19196 | res &= M68K_SR_MASK; |
19197 | SET_SR(res) |
19198 | if (!flag_S) |
19199 | { |
19200 | res = AREG(7); |
19201 | AREG(7) = ASP; |
19202 | ASP = res; |
19203 | } |
03e4f2a3 |
19204 | m68kcontext.execinfo |= FM68K_HALTED; |
70357ce5 |
19205 | m68kcontext.io_cycle_counter = 0; |
19206 | RET(4) |
19207 | } |
19208 | |
19209 | // RTE |
19210 | OPCODE(0x4E73) |
19211 | { |
19212 | u32 adr, res; |
19213 | u32 src, dst; |
19214 | |
19215 | if (!flag_S) |
19216 | { |
19217 | u32 oldPC=GET_PC; |
19218 | SET_PC(oldPC-2) |
19219 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19220 | RET(4) |
19221 | } |
19222 | PRE_IO |
19223 | POP_16_F(res) |
19224 | SET_SR(res) |
19225 | POP_32_F(res) |
19226 | SET_PC(res) |
19227 | if (!flag_S) |
19228 | { |
19229 | res = AREG(7); |
19230 | AREG(7) = ASP; |
19231 | ASP = res; |
19232 | } |
19233 | POST_IO |
03e4f2a3 |
19234 | m68kcontext.execinfo &= ~(FM68K_EMULATE_GROUP_0|FM68K_EMULATE_TRACE|FM68K_DO_TRACE); |
70357ce5 |
19235 | CHECK_INT_TO_JUMP(20) |
19236 | RET(20) |
19237 | } |
19238 | |
19239 | // RTS |
19240 | OPCODE(0x4E75) |
19241 | { |
19242 | u32 adr, res; |
19243 | u32 src, dst; |
19244 | |
19245 | PRE_IO |
19246 | POP_32_F(res) |
19247 | SET_PC(res) |
19248 | CHECK_BRANCH_EXCEPTION(res) |
19249 | POST_IO |
19250 | RET(16) |
19251 | } |
19252 | |
19253 | // TRAPV |
19254 | OPCODE(0x4E76) |
19255 | { |
19256 | if (flag_V & 0x80) |
19257 | execute_exception(M68K_TRAPV_EX); |
19258 | RET(4) |
19259 | } |
19260 | |
19261 | // RTR |
19262 | OPCODE(0x4E77) |
19263 | { |
19264 | u32 adr, res; |
19265 | u32 src, dst; |
19266 | |
19267 | PRE_IO |
19268 | POP_16_F(res) |
19269 | SET_CCR(res) |
19270 | POP_32_F(res) |
19271 | SET_PC(res) |
19272 | CHECK_BRANCH_EXCEPTION(res) |
19273 | POST_IO |
19274 | RET(20) |
19275 | } |
19276 | |
19277 | // JSR |
19278 | OPCODE(0x4E90) |
19279 | { |
19280 | u32 adr, res; |
19281 | u32 src, dst; |
19282 | |
19283 | adr = AREG((Opcode >> 0) & 7); |
19284 | { |
19285 | u32 oldPC; |
19286 | |
19287 | oldPC = (u32)(PC) - BasePC; |
19288 | PRE_IO |
19289 | PUSH_32_F(oldPC) |
19290 | } |
19291 | SET_PC(adr) |
19292 | CHECK_BRANCH_EXCEPTION(adr) |
19293 | POST_IO |
19294 | RET(16) |
19295 | } |
19296 | |
19297 | // JSR |
19298 | OPCODE(0x4EA8) |
19299 | { |
19300 | u32 adr, res; |
19301 | u32 src, dst; |
19302 | |
19303 | FETCH_SWORD(adr); |
19304 | adr += AREG((Opcode >> 0) & 7); |
19305 | { |
19306 | u32 oldPC; |
19307 | |
19308 | oldPC = (u32)(PC) - BasePC; |
19309 | PRE_IO |
19310 | PUSH_32_F(oldPC) |
19311 | } |
19312 | SET_PC(adr) |
19313 | CHECK_BRANCH_EXCEPTION(adr) |
19314 | POST_IO |
19315 | RET(18) |
19316 | } |
19317 | |
19318 | // JSR |
19319 | OPCODE(0x4EB0) |
19320 | { |
19321 | u32 adr, res; |
19322 | u32 src, dst; |
19323 | |
19324 | adr = AREG((Opcode >> 0) & 7); |
19325 | DECODE_EXT_WORD |
19326 | { |
19327 | u32 oldPC; |
19328 | |
19329 | oldPC = (u32)(PC) - BasePC; |
19330 | PRE_IO |
19331 | PUSH_32_F(oldPC) |
19332 | } |
19333 | SET_PC(adr) |
19334 | CHECK_BRANCH_EXCEPTION(adr) |
19335 | POST_IO |
19336 | RET(22) |
19337 | } |
19338 | |
19339 | // JSR |
19340 | OPCODE(0x4EB8) |
19341 | { |
19342 | u32 adr, res; |
19343 | u32 src, dst; |
19344 | |
19345 | FETCH_SWORD(adr); |
19346 | { |
19347 | u32 oldPC; |
19348 | |
19349 | oldPC = (u32)(PC) - BasePC; |
19350 | PRE_IO |
19351 | PUSH_32_F(oldPC) |
19352 | } |
19353 | SET_PC(adr) |
19354 | CHECK_BRANCH_EXCEPTION(adr) |
19355 | POST_IO |
19356 | RET(18) |
19357 | } |
19358 | |
19359 | // JSR |
19360 | OPCODE(0x4EB9) |
19361 | { |
19362 | u32 adr, res; |
19363 | u32 src, dst; |
19364 | |
19365 | FETCH_LONG(adr); |
19366 | { |
19367 | u32 oldPC; |
19368 | |
19369 | oldPC = (u32)(PC) - BasePC; |
19370 | PRE_IO |
19371 | PUSH_32_F(oldPC) |
19372 | } |
19373 | SET_PC(adr) |
19374 | CHECK_BRANCH_EXCEPTION(adr) |
19375 | POST_IO |
19376 | RET(20) |
19377 | } |
19378 | |
19379 | // JSR |
19380 | OPCODE(0x4EBA) |
19381 | { |
19382 | u32 adr, res; |
19383 | u32 src, dst; |
19384 | |
19385 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19386 | PC++; |
19387 | { |
19388 | u32 oldPC; |
19389 | |
19390 | oldPC = (u32)(PC) - BasePC; |
19391 | PRE_IO |
19392 | PUSH_32_F(oldPC) |
19393 | } |
19394 | SET_PC(adr) |
19395 | CHECK_BRANCH_EXCEPTION(adr) |
19396 | POST_IO |
19397 | RET(18) |
19398 | } |
19399 | |
19400 | // JSR |
19401 | OPCODE(0x4EBB) |
19402 | { |
19403 | u32 adr, res; |
19404 | u32 src, dst; |
19405 | |
19406 | adr = (u32)(PC) - BasePC; |
19407 | DECODE_EXT_WORD |
19408 | { |
19409 | u32 oldPC; |
19410 | |
19411 | oldPC = (u32)(PC) - BasePC; |
19412 | PRE_IO |
19413 | PUSH_32_F(oldPC) |
19414 | } |
19415 | SET_PC(adr) |
19416 | CHECK_BRANCH_EXCEPTION(adr) |
19417 | POST_IO |
19418 | RET(22) |
19419 | } |
19420 | |
19421 | // JMP |
19422 | OPCODE(0x4ED0) |
19423 | { |
19424 | u32 adr, res; |
19425 | u32 src, dst; |
19426 | |
19427 | adr = AREG((Opcode >> 0) & 7); |
19428 | SET_PC(adr) |
19429 | CHECK_BRANCH_EXCEPTION(adr) |
19430 | RET(8) |
19431 | } |
19432 | |
19433 | // JMP |
19434 | OPCODE(0x4EE8) |
19435 | { |
19436 | u32 adr, res; |
19437 | u32 src, dst; |
19438 | |
19439 | FETCH_SWORD(adr); |
19440 | adr += AREG((Opcode >> 0) & 7); |
19441 | SET_PC(adr) |
19442 | CHECK_BRANCH_EXCEPTION(adr) |
19443 | RET(10) |
19444 | } |
19445 | |
19446 | // JMP |
19447 | OPCODE(0x4EF0) |
19448 | { |
19449 | u32 adr, res; |
19450 | u32 src, dst; |
19451 | |
19452 | adr = AREG((Opcode >> 0) & 7); |
19453 | DECODE_EXT_WORD |
19454 | SET_PC(adr) |
19455 | CHECK_BRANCH_EXCEPTION(adr) |
19456 | RET(14) |
19457 | } |
19458 | |
19459 | // JMP |
19460 | OPCODE(0x4EF8) |
19461 | { |
19462 | u32 adr, res; |
19463 | u32 src, dst; |
19464 | |
19465 | FETCH_SWORD(adr); |
19466 | SET_PC(adr) |
19467 | CHECK_BRANCH_EXCEPTION(adr) |
19468 | RET(10) |
19469 | } |
19470 | |
19471 | // JMP |
19472 | OPCODE(0x4EF9) |
19473 | { |
19474 | u32 adr, res; |
19475 | u32 src, dst; |
19476 | |
19477 | FETCH_LONG(adr); |
19478 | SET_PC(adr) |
19479 | CHECK_BRANCH_EXCEPTION(adr) |
19480 | RET(12) |
19481 | } |
19482 | |
19483 | // JMP |
19484 | OPCODE(0x4EFA) |
19485 | { |
19486 | u32 adr, res; |
19487 | u32 src, dst; |
19488 | |
19489 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19490 | PC++; |
19491 | SET_PC(adr) |
19492 | CHECK_BRANCH_EXCEPTION(adr) |
19493 | RET(10) |
19494 | } |
19495 | |
19496 | // JMP |
19497 | OPCODE(0x4EFB) |
19498 | { |
19499 | u32 adr, res; |
19500 | u32 src, dst; |
19501 | |
19502 | adr = (u32)(PC) - BasePC; |
19503 | DECODE_EXT_WORD |
19504 | SET_PC(adr) |
19505 | CHECK_BRANCH_EXCEPTION(adr) |
19506 | RET(14) |
19507 | } |
19508 | |
19509 | // CHK |
19510 | OPCODE(0x4180) |
19511 | { |
19512 | u32 adr, res; |
19513 | u32 src, dst; |
19514 | |
19515 | src = DREGu16((Opcode >> 0) & 7); |
19516 | res = DREGu16((Opcode >> 9) & 7); |
19517 | if (((s32)res < 0) || (res > src)) |
19518 | { |
19519 | flag_N = res >> 8; |
19520 | execute_exception(M68K_CHK_EX); |
19521 | } |
19522 | RET(10) |
19523 | } |
19524 | |
19525 | // CHK |
19526 | OPCODE(0x4190) |
19527 | { |
19528 | u32 adr, res; |
19529 | u32 src, dst; |
19530 | |
19531 | adr = AREG((Opcode >> 0) & 7); |
19532 | PRE_IO |
19533 | READ_WORD_F(adr, src) |
19534 | res = DREGu16((Opcode >> 9) & 7); |
19535 | if (((s32)res < 0) || (res > src)) |
19536 | { |
19537 | flag_N = res >> 8; |
19538 | execute_exception(M68K_CHK_EX); |
19539 | } |
19540 | POST_IO |
19541 | RET(14) |
19542 | } |
19543 | |
19544 | // CHK |
19545 | OPCODE(0x4198) |
19546 | { |
19547 | u32 adr, res; |
19548 | u32 src, dst; |
19549 | |
19550 | adr = AREG((Opcode >> 0) & 7); |
19551 | AREG((Opcode >> 0) & 7) += 2; |
19552 | PRE_IO |
19553 | READ_WORD_F(adr, src) |
19554 | res = DREGu16((Opcode >> 9) & 7); |
19555 | if (((s32)res < 0) || (res > src)) |
19556 | { |
19557 | flag_N = res >> 8; |
19558 | execute_exception(M68K_CHK_EX); |
19559 | } |
19560 | POST_IO |
19561 | RET(14) |
19562 | } |
19563 | |
19564 | // CHK |
19565 | OPCODE(0x41A0) |
19566 | { |
19567 | u32 adr, res; |
19568 | u32 src, dst; |
19569 | |
19570 | adr = AREG((Opcode >> 0) & 7) - 2; |
19571 | AREG((Opcode >> 0) & 7) = adr; |
19572 | PRE_IO |
19573 | READ_WORD_F(adr, src) |
19574 | res = DREGu16((Opcode >> 9) & 7); |
19575 | if (((s32)res < 0) || (res > src)) |
19576 | { |
19577 | flag_N = res >> 8; |
19578 | execute_exception(M68K_CHK_EX); |
19579 | } |
19580 | POST_IO |
19581 | RET(16) |
19582 | } |
19583 | |
19584 | // CHK |
19585 | OPCODE(0x41A8) |
19586 | { |
19587 | u32 adr, res; |
19588 | u32 src, dst; |
19589 | |
19590 | FETCH_SWORD(adr); |
19591 | adr += AREG((Opcode >> 0) & 7); |
19592 | PRE_IO |
19593 | READ_WORD_F(adr, src) |
19594 | res = DREGu16((Opcode >> 9) & 7); |
19595 | if (((s32)res < 0) || (res > src)) |
19596 | { |
19597 | flag_N = res >> 8; |
19598 | execute_exception(M68K_CHK_EX); |
19599 | } |
19600 | POST_IO |
19601 | RET(18) |
19602 | } |
19603 | |
19604 | // CHK |
19605 | OPCODE(0x41B0) |
19606 | { |
19607 | u32 adr, res; |
19608 | u32 src, dst; |
19609 | |
19610 | adr = AREG((Opcode >> 0) & 7); |
19611 | DECODE_EXT_WORD |
19612 | PRE_IO |
19613 | READ_WORD_F(adr, src) |
19614 | res = DREGu16((Opcode >> 9) & 7); |
19615 | if (((s32)res < 0) || (res > src)) |
19616 | { |
19617 | flag_N = res >> 8; |
19618 | execute_exception(M68K_CHK_EX); |
19619 | } |
19620 | POST_IO |
19621 | RET(20) |
19622 | } |
19623 | |
19624 | // CHK |
19625 | OPCODE(0x41B8) |
19626 | { |
19627 | u32 adr, res; |
19628 | u32 src, dst; |
19629 | |
19630 | FETCH_SWORD(adr); |
19631 | PRE_IO |
19632 | READ_WORD_F(adr, src) |
19633 | res = DREGu16((Opcode >> 9) & 7); |
19634 | if (((s32)res < 0) || (res > src)) |
19635 | { |
19636 | flag_N = res >> 8; |
19637 | execute_exception(M68K_CHK_EX); |
19638 | } |
19639 | POST_IO |
19640 | RET(18) |
19641 | } |
19642 | |
19643 | // CHK |
19644 | OPCODE(0x41B9) |
19645 | { |
19646 | u32 adr, res; |
19647 | u32 src, dst; |
19648 | |
19649 | FETCH_LONG(adr); |
19650 | PRE_IO |
19651 | READ_WORD_F(adr, src) |
19652 | res = DREGu16((Opcode >> 9) & 7); |
19653 | if (((s32)res < 0) || (res > src)) |
19654 | { |
19655 | flag_N = res >> 8; |
19656 | execute_exception(M68K_CHK_EX); |
19657 | } |
19658 | POST_IO |
19659 | RET(22) |
19660 | } |
19661 | |
19662 | // CHK |
19663 | OPCODE(0x41BA) |
19664 | { |
19665 | u32 adr, res; |
19666 | u32 src, dst; |
19667 | |
19668 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19669 | PC++; |
19670 | PRE_IO |
19671 | READ_WORD_F(adr, src) |
19672 | res = DREGu16((Opcode >> 9) & 7); |
19673 | if (((s32)res < 0) || (res > src)) |
19674 | { |
19675 | flag_N = res >> 8; |
19676 | execute_exception(M68K_CHK_EX); |
19677 | } |
19678 | POST_IO |
19679 | RET(18) |
19680 | } |
19681 | |
19682 | // CHK |
19683 | OPCODE(0x41BB) |
19684 | { |
19685 | u32 adr, res; |
19686 | u32 src, dst; |
19687 | |
19688 | adr = (u32)(PC) - BasePC; |
19689 | DECODE_EXT_WORD |
19690 | PRE_IO |
19691 | READ_WORD_F(adr, src) |
19692 | res = DREGu16((Opcode >> 9) & 7); |
19693 | if (((s32)res < 0) || (res > src)) |
19694 | { |
19695 | flag_N = res >> 8; |
19696 | execute_exception(M68K_CHK_EX); |
19697 | } |
19698 | POST_IO |
19699 | RET(20) |
19700 | } |
19701 | |
19702 | // CHK |
19703 | OPCODE(0x41BC) |
19704 | { |
19705 | u32 adr, res; |
19706 | u32 src, dst; |
19707 | |
19708 | FETCH_WORD(src); |
19709 | res = DREGu16((Opcode >> 9) & 7); |
19710 | if (((s32)res < 0) || (res > src)) |
19711 | { |
19712 | flag_N = res >> 8; |
19713 | execute_exception(M68K_CHK_EX); |
19714 | } |
19715 | POST_IO |
19716 | RET(14) |
19717 | } |
19718 | |
19719 | // CHK |
19720 | OPCODE(0x419F) |
19721 | { |
19722 | u32 adr, res; |
19723 | u32 src, dst; |
19724 | |
19725 | adr = AREG(7); |
19726 | AREG(7) += 2; |
19727 | PRE_IO |
19728 | READ_WORD_F(adr, src) |
19729 | res = DREGu16((Opcode >> 9) & 7); |
19730 | if (((s32)res < 0) || (res > src)) |
19731 | { |
19732 | flag_N = res >> 8; |
19733 | execute_exception(M68K_CHK_EX); |
19734 | } |
19735 | POST_IO |
19736 | RET(14) |
19737 | } |
19738 | |
19739 | // CHK |
19740 | OPCODE(0x41A7) |
19741 | { |
19742 | u32 adr, res; |
19743 | u32 src, dst; |
19744 | |
19745 | adr = AREG(7) - 2; |
19746 | AREG(7) = adr; |
19747 | PRE_IO |
19748 | READ_WORD_F(adr, src) |
19749 | res = DREGu16((Opcode >> 9) & 7); |
19750 | if (((s32)res < 0) || (res > src)) |
19751 | { |
19752 | flag_N = res >> 8; |
19753 | execute_exception(M68K_CHK_EX); |
19754 | } |
19755 | POST_IO |
19756 | RET(16) |
19757 | } |
19758 | |
19759 | // LEA |
19760 | OPCODE(0x41D0) |
19761 | { |
19762 | u32 adr, res; |
19763 | u32 src, dst; |
19764 | |
19765 | adr = AREG((Opcode >> 0) & 7); |
19766 | res = adr; |
19767 | AREG((Opcode >> 9) & 7) = res; |
19768 | RET(4) |
19769 | } |
19770 | |
19771 | // LEA |
19772 | OPCODE(0x41E8) |
19773 | { |
19774 | u32 adr, res; |
19775 | u32 src, dst; |
19776 | |
19777 | FETCH_SWORD(adr); |
19778 | adr += AREG((Opcode >> 0) & 7); |
19779 | res = adr; |
19780 | AREG((Opcode >> 9) & 7) = res; |
19781 | RET(8) |
19782 | } |
19783 | |
19784 | // LEA |
19785 | OPCODE(0x41F0) |
19786 | { |
19787 | u32 adr, res; |
19788 | u32 src, dst; |
19789 | |
19790 | adr = AREG((Opcode >> 0) & 7); |
19791 | DECODE_EXT_WORD |
19792 | res = adr; |
19793 | AREG((Opcode >> 9) & 7) = res; |
19794 | RET(12) |
19795 | } |
19796 | |
19797 | // LEA |
19798 | OPCODE(0x41F8) |
19799 | { |
19800 | u32 adr, res; |
19801 | u32 src, dst; |
19802 | |
19803 | FETCH_SWORD(adr); |
19804 | res = adr; |
19805 | AREG((Opcode >> 9) & 7) = res; |
19806 | RET(8) |
19807 | } |
19808 | |
19809 | // LEA |
19810 | OPCODE(0x41F9) |
19811 | { |
19812 | u32 adr, res; |
19813 | u32 src, dst; |
19814 | |
19815 | FETCH_LONG(adr); |
19816 | res = adr; |
19817 | AREG((Opcode >> 9) & 7) = res; |
19818 | RET(12) |
19819 | } |
19820 | |
19821 | // LEA |
19822 | OPCODE(0x41FA) |
19823 | { |
19824 | u32 adr, res; |
19825 | u32 src, dst; |
19826 | |
19827 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19828 | PC++; |
19829 | res = adr; |
19830 | AREG((Opcode >> 9) & 7) = res; |
19831 | RET(8) |
19832 | } |
19833 | |
19834 | // LEA |
19835 | OPCODE(0x41FB) |
19836 | { |
19837 | u32 adr, res; |
19838 | u32 src, dst; |
19839 | |
19840 | adr = (u32)(PC) - BasePC; |
19841 | DECODE_EXT_WORD |
19842 | res = adr; |
19843 | AREG((Opcode >> 9) & 7) = res; |
19844 | RET(12) |
19845 | } |
19846 | |
19847 | // STCC |
19848 | OPCODE(0x50C0) |
19849 | { |
19850 | u32 adr, res; |
19851 | u32 src, dst; |
19852 | |
19853 | res = 0xFF; |
19854 | DREGu8((Opcode >> 0) & 7) = res; |
19855 | RET(6) |
19856 | } |
19857 | |
19858 | // STCC |
19859 | OPCODE(0x51C0) |
19860 | { |
19861 | u32 adr, res; |
19862 | u32 src, dst; |
19863 | |
19864 | res = 0; |
19865 | DREGu8((Opcode >> 0) & 7) = res; |
19866 | RET(4) |
19867 | } |
19868 | |
19869 | // STCC |
19870 | OPCODE(0x52C0) |
19871 | { |
19872 | u32 adr, res; |
19873 | u32 src, dst; |
19874 | |
19875 | if (flag_NotZ && (!(flag_C & 0x100))) |
19876 | { |
19877 | res = 0xFF; |
19878 | DREGu8((Opcode >> 0) & 7) = res; |
19879 | RET(6) |
19880 | } |
19881 | res = 0; |
19882 | DREGu8((Opcode >> 0) & 7) = res; |
19883 | RET(4) |
19884 | } |
19885 | |
19886 | // STCC |
19887 | OPCODE(0x53C0) |
19888 | { |
19889 | u32 adr, res; |
19890 | u32 src, dst; |
19891 | |
19892 | if ((!flag_NotZ) || (flag_C & 0x100)) |
19893 | { |
19894 | res = 0xFF; |
19895 | DREGu8((Opcode >> 0) & 7) = res; |
19896 | RET(6) |
19897 | } |
19898 | res = 0; |
19899 | DREGu8((Opcode >> 0) & 7) = res; |
19900 | RET(4) |
19901 | } |
19902 | |
19903 | // STCC |
19904 | OPCODE(0x54C0) |
19905 | { |
19906 | u32 adr, res; |
19907 | u32 src, dst; |
19908 | |
19909 | if (!(flag_C & 0x100)) |
19910 | { |
19911 | res = 0xFF; |
19912 | DREGu8((Opcode >> 0) & 7) = res; |
19913 | RET(6) |
19914 | } |
19915 | res = 0; |
19916 | DREGu8((Opcode >> 0) & 7) = res; |
19917 | RET(4) |
19918 | } |
19919 | |
19920 | // STCC |
19921 | OPCODE(0x55C0) |
19922 | { |
19923 | u32 adr, res; |
19924 | u32 src, dst; |
19925 | |
19926 | if (flag_C & 0x100) |
19927 | { |
19928 | res = 0xFF; |
19929 | DREGu8((Opcode >> 0) & 7) = res; |
19930 | RET(6) |
19931 | } |
19932 | res = 0; |
19933 | DREGu8((Opcode >> 0) & 7) = res; |
19934 | RET(4) |
19935 | } |
19936 | |
19937 | // STCC |
19938 | OPCODE(0x56C0) |
19939 | { |
19940 | u32 adr, res; |
19941 | u32 src, dst; |
19942 | |
19943 | if (flag_NotZ) |
19944 | { |
19945 | res = 0xFF; |
19946 | DREGu8((Opcode >> 0) & 7) = res; |
19947 | RET(6) |
19948 | } |
19949 | res = 0; |
19950 | DREGu8((Opcode >> 0) & 7) = res; |
19951 | RET(4) |
19952 | } |
19953 | |
19954 | // STCC |
19955 | OPCODE(0x57C0) |
19956 | { |
19957 | u32 adr, res; |
19958 | u32 src, dst; |
19959 | |
19960 | if (!flag_NotZ) |
19961 | { |
19962 | res = 0xFF; |
19963 | DREGu8((Opcode >> 0) & 7) = res; |
19964 | RET(6) |
19965 | } |
19966 | res = 0; |
19967 | DREGu8((Opcode >> 0) & 7) = res; |
19968 | RET(4) |
19969 | } |
19970 | |
19971 | // STCC |
19972 | OPCODE(0x58C0) |
19973 | { |
19974 | u32 adr, res; |
19975 | u32 src, dst; |
19976 | |
19977 | if (!(flag_V & 0x80)) |
19978 | { |
19979 | res = 0xFF; |
19980 | DREGu8((Opcode >> 0) & 7) = res; |
19981 | RET(6) |
19982 | } |
19983 | res = 0; |
19984 | DREGu8((Opcode >> 0) & 7) = res; |
19985 | RET(4) |
19986 | } |
19987 | |
19988 | // STCC |
19989 | OPCODE(0x59C0) |
19990 | { |
19991 | u32 adr, res; |
19992 | u32 src, dst; |
19993 | |
19994 | if (flag_V & 0x80) |
19995 | { |
19996 | res = 0xFF; |
19997 | DREGu8((Opcode >> 0) & 7) = res; |
19998 | RET(6) |
19999 | } |
20000 | res = 0; |
20001 | DREGu8((Opcode >> 0) & 7) = res; |
20002 | RET(4) |
20003 | } |
20004 | |
20005 | // STCC |
20006 | OPCODE(0x5AC0) |
20007 | { |
20008 | u32 adr, res; |
20009 | u32 src, dst; |
20010 | |
20011 | if (!(flag_N & 0x80)) |
20012 | { |
20013 | res = 0xFF; |
20014 | DREGu8((Opcode >> 0) & 7) = res; |
20015 | RET(6) |
20016 | } |
20017 | res = 0; |
20018 | DREGu8((Opcode >> 0) & 7) = res; |
20019 | RET(4) |
20020 | } |
20021 | |
20022 | // STCC |
20023 | OPCODE(0x5BC0) |
20024 | { |
20025 | u32 adr, res; |
20026 | u32 src, dst; |
20027 | |
20028 | if (flag_N & 0x80) |
20029 | { |
20030 | res = 0xFF; |
20031 | DREGu8((Opcode >> 0) & 7) = res; |
20032 | RET(6) |
20033 | } |
20034 | res = 0; |
20035 | DREGu8((Opcode >> 0) & 7) = res; |
20036 | RET(4) |
20037 | } |
20038 | |
20039 | // STCC |
20040 | OPCODE(0x5CC0) |
20041 | { |
20042 | u32 adr, res; |
20043 | u32 src, dst; |
20044 | |
20045 | if (!((flag_N ^ flag_V) & 0x80)) |
20046 | { |
20047 | res = 0xFF; |
20048 | DREGu8((Opcode >> 0) & 7) = res; |
20049 | RET(6) |
20050 | } |
20051 | res = 0; |
20052 | DREGu8((Opcode >> 0) & 7) = res; |
20053 | RET(4) |
20054 | } |
20055 | |
20056 | // STCC |
20057 | OPCODE(0x5DC0) |
20058 | { |
20059 | u32 adr, res; |
20060 | u32 src, dst; |
20061 | |
20062 | if ((flag_N ^ flag_V) & 0x80) |
20063 | { |
20064 | res = 0xFF; |
20065 | DREGu8((Opcode >> 0) & 7) = res; |
20066 | RET(6) |
20067 | } |
20068 | res = 0; |
20069 | DREGu8((Opcode >> 0) & 7) = res; |
20070 | RET(4) |
20071 | } |
20072 | |
20073 | // STCC |
20074 | OPCODE(0x5EC0) |
20075 | { |
20076 | u32 adr, res; |
20077 | u32 src, dst; |
20078 | |
20079 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20080 | { |
20081 | res = 0xFF; |
20082 | DREGu8((Opcode >> 0) & 7) = res; |
20083 | RET(6) |
20084 | } |
20085 | res = 0; |
20086 | DREGu8((Opcode >> 0) & 7) = res; |
20087 | RET(4) |
20088 | } |
20089 | |
20090 | // STCC |
20091 | OPCODE(0x5FC0) |
20092 | { |
20093 | u32 adr, res; |
20094 | u32 src, dst; |
20095 | |
20096 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20097 | { |
20098 | res = 0xFF; |
20099 | DREGu8((Opcode >> 0) & 7) = res; |
20100 | RET(6) |
20101 | } |
20102 | res = 0; |
20103 | DREGu8((Opcode >> 0) & 7) = res; |
20104 | RET(4) |
20105 | } |
20106 | |
20107 | // STCC |
20108 | OPCODE(0x50D0) |
20109 | { |
20110 | u32 adr, res; |
20111 | u32 src, dst; |
20112 | |
20113 | adr = AREG((Opcode >> 0) & 7); |
20114 | res = 0xFF; |
20115 | PRE_IO |
20116 | WRITE_BYTE_F(adr, res) |
20117 | POST_IO |
20118 | RET(12) |
20119 | } |
20120 | |
20121 | // STCC |
20122 | OPCODE(0x51D0) |
20123 | { |
20124 | u32 adr, res; |
20125 | u32 src, dst; |
20126 | |
20127 | adr = AREG((Opcode >> 0) & 7); |
20128 | res = 0; |
20129 | PRE_IO |
20130 | WRITE_BYTE_F(adr, res) |
20131 | POST_IO |
20132 | RET(12) |
20133 | } |
20134 | |
20135 | // STCC |
20136 | OPCODE(0x52D0) |
20137 | { |
20138 | u32 adr, res; |
20139 | u32 src, dst; |
20140 | |
20141 | adr = AREG((Opcode >> 0) & 7); |
20142 | if (flag_NotZ && (!(flag_C & 0x100))) |
20143 | { |
20144 | res = 0xFF; |
20145 | PRE_IO |
20146 | WRITE_BYTE_F(adr, res) |
20147 | POST_IO |
20148 | RET(12) |
20149 | } |
20150 | res = 0; |
20151 | PRE_IO |
20152 | WRITE_BYTE_F(adr, res) |
20153 | POST_IO |
20154 | RET(12) |
20155 | } |
20156 | |
20157 | // STCC |
20158 | OPCODE(0x53D0) |
20159 | { |
20160 | u32 adr, res; |
20161 | u32 src, dst; |
20162 | |
20163 | adr = AREG((Opcode >> 0) & 7); |
20164 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20165 | { |
20166 | res = 0xFF; |
20167 | PRE_IO |
20168 | WRITE_BYTE_F(adr, res) |
20169 | POST_IO |
20170 | RET(12) |
20171 | } |
20172 | res = 0; |
20173 | PRE_IO |
20174 | WRITE_BYTE_F(adr, res) |
20175 | POST_IO |
20176 | RET(12) |
20177 | } |
20178 | |
20179 | // STCC |
20180 | OPCODE(0x54D0) |
20181 | { |
20182 | u32 adr, res; |
20183 | u32 src, dst; |
20184 | |
20185 | adr = AREG((Opcode >> 0) & 7); |
20186 | if (!(flag_C & 0x100)) |
20187 | { |
20188 | res = 0xFF; |
20189 | PRE_IO |
20190 | WRITE_BYTE_F(adr, res) |
20191 | POST_IO |
20192 | RET(12) |
20193 | } |
20194 | res = 0; |
20195 | PRE_IO |
20196 | WRITE_BYTE_F(adr, res) |
20197 | POST_IO |
20198 | RET(12) |
20199 | } |
20200 | |
20201 | // STCC |
20202 | OPCODE(0x55D0) |
20203 | { |
20204 | u32 adr, res; |
20205 | u32 src, dst; |
20206 | |
20207 | adr = AREG((Opcode >> 0) & 7); |
20208 | if (flag_C & 0x100) |
20209 | { |
20210 | res = 0xFF; |
20211 | PRE_IO |
20212 | WRITE_BYTE_F(adr, res) |
20213 | POST_IO |
20214 | RET(12) |
20215 | } |
20216 | res = 0; |
20217 | PRE_IO |
20218 | WRITE_BYTE_F(adr, res) |
20219 | POST_IO |
20220 | RET(12) |
20221 | } |
20222 | |
20223 | // STCC |
20224 | OPCODE(0x56D0) |
20225 | { |
20226 | u32 adr, res; |
20227 | u32 src, dst; |
20228 | |
20229 | adr = AREG((Opcode >> 0) & 7); |
20230 | if (flag_NotZ) |
20231 | { |
20232 | res = 0xFF; |
20233 | PRE_IO |
20234 | WRITE_BYTE_F(adr, res) |
20235 | POST_IO |
20236 | RET(12) |
20237 | } |
20238 | res = 0; |
20239 | PRE_IO |
20240 | WRITE_BYTE_F(adr, res) |
20241 | POST_IO |
20242 | RET(12) |
20243 | } |
20244 | |
20245 | // STCC |
20246 | OPCODE(0x57D0) |
20247 | { |
20248 | u32 adr, res; |
20249 | u32 src, dst; |
20250 | |
20251 | adr = AREG((Opcode >> 0) & 7); |
20252 | if (!flag_NotZ) |
20253 | { |
20254 | res = 0xFF; |
20255 | PRE_IO |
20256 | WRITE_BYTE_F(adr, res) |
20257 | POST_IO |
20258 | RET(12) |
20259 | } |
20260 | res = 0; |
20261 | PRE_IO |
20262 | WRITE_BYTE_F(adr, res) |
20263 | POST_IO |
20264 | RET(12) |
20265 | } |
20266 | |
20267 | // STCC |
20268 | OPCODE(0x58D0) |
20269 | { |
20270 | u32 adr, res; |
20271 | u32 src, dst; |
20272 | |
20273 | adr = AREG((Opcode >> 0) & 7); |
20274 | if (!(flag_V & 0x80)) |
20275 | { |
20276 | res = 0xFF; |
20277 | PRE_IO |
20278 | WRITE_BYTE_F(adr, res) |
20279 | POST_IO |
20280 | RET(12) |
20281 | } |
20282 | res = 0; |
20283 | PRE_IO |
20284 | WRITE_BYTE_F(adr, res) |
20285 | POST_IO |
20286 | RET(12) |
20287 | } |
20288 | |
20289 | // STCC |
20290 | OPCODE(0x59D0) |
20291 | { |
20292 | u32 adr, res; |
20293 | u32 src, dst; |
20294 | |
20295 | adr = AREG((Opcode >> 0) & 7); |
20296 | if (flag_V & 0x80) |
20297 | { |
20298 | res = 0xFF; |
20299 | PRE_IO |
20300 | WRITE_BYTE_F(adr, res) |
20301 | POST_IO |
20302 | RET(12) |
20303 | } |
20304 | res = 0; |
20305 | PRE_IO |
20306 | WRITE_BYTE_F(adr, res) |
20307 | POST_IO |
20308 | RET(12) |
20309 | } |
20310 | |
20311 | // STCC |
20312 | OPCODE(0x5AD0) |
20313 | { |
20314 | u32 adr, res; |
20315 | u32 src, dst; |
20316 | |
20317 | adr = AREG((Opcode >> 0) & 7); |
20318 | if (!(flag_N & 0x80)) |
20319 | { |
20320 | res = 0xFF; |
20321 | PRE_IO |
20322 | WRITE_BYTE_F(adr, res) |
20323 | POST_IO |
20324 | RET(12) |
20325 | } |
20326 | res = 0; |
20327 | PRE_IO |
20328 | WRITE_BYTE_F(adr, res) |
20329 | POST_IO |
20330 | RET(12) |
20331 | } |
20332 | |
20333 | // STCC |
20334 | OPCODE(0x5BD0) |
20335 | { |
20336 | u32 adr, res; |
20337 | u32 src, dst; |
20338 | |
20339 | adr = AREG((Opcode >> 0) & 7); |
20340 | if (flag_N & 0x80) |
20341 | { |
20342 | res = 0xFF; |
20343 | PRE_IO |
20344 | WRITE_BYTE_F(adr, res) |
20345 | POST_IO |
20346 | RET(12) |
20347 | } |
20348 | res = 0; |
20349 | PRE_IO |
20350 | WRITE_BYTE_F(adr, res) |
20351 | POST_IO |
20352 | RET(12) |
20353 | } |
20354 | |
20355 | // STCC |
20356 | OPCODE(0x5CD0) |
20357 | { |
20358 | u32 adr, res; |
20359 | u32 src, dst; |
20360 | |
20361 | adr = AREG((Opcode >> 0) & 7); |
20362 | if (!((flag_N ^ flag_V) & 0x80)) |
20363 | { |
20364 | res = 0xFF; |
20365 | PRE_IO |
20366 | WRITE_BYTE_F(adr, res) |
20367 | POST_IO |
20368 | RET(12) |
20369 | } |
20370 | res = 0; |
20371 | PRE_IO |
20372 | WRITE_BYTE_F(adr, res) |
20373 | POST_IO |
20374 | RET(12) |
20375 | } |
20376 | |
20377 | // STCC |
20378 | OPCODE(0x5DD0) |
20379 | { |
20380 | u32 adr, res; |
20381 | u32 src, dst; |
20382 | |
20383 | adr = AREG((Opcode >> 0) & 7); |
20384 | if ((flag_N ^ flag_V) & 0x80) |
20385 | { |
20386 | res = 0xFF; |
20387 | PRE_IO |
20388 | WRITE_BYTE_F(adr, res) |
20389 | POST_IO |
20390 | RET(12) |
20391 | } |
20392 | res = 0; |
20393 | PRE_IO |
20394 | WRITE_BYTE_F(adr, res) |
20395 | POST_IO |
20396 | RET(12) |
20397 | } |
20398 | |
20399 | // STCC |
20400 | OPCODE(0x5ED0) |
20401 | { |
20402 | u32 adr, res; |
20403 | u32 src, dst; |
20404 | |
20405 | adr = AREG((Opcode >> 0) & 7); |
20406 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20407 | { |
20408 | res = 0xFF; |
20409 | PRE_IO |
20410 | WRITE_BYTE_F(adr, res) |
20411 | POST_IO |
20412 | RET(12) |
20413 | } |
20414 | res = 0; |
20415 | PRE_IO |
20416 | WRITE_BYTE_F(adr, res) |
20417 | POST_IO |
20418 | RET(12) |
20419 | } |
20420 | |
20421 | // STCC |
20422 | OPCODE(0x5FD0) |
20423 | { |
20424 | u32 adr, res; |
20425 | u32 src, dst; |
20426 | |
20427 | adr = AREG((Opcode >> 0) & 7); |
20428 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20429 | { |
20430 | res = 0xFF; |
20431 | PRE_IO |
20432 | WRITE_BYTE_F(adr, res) |
20433 | POST_IO |
20434 | RET(12) |
20435 | } |
20436 | res = 0; |
20437 | PRE_IO |
20438 | WRITE_BYTE_F(adr, res) |
20439 | POST_IO |
20440 | RET(12) |
20441 | } |
20442 | |
20443 | // STCC |
20444 | OPCODE(0x50D8) |
20445 | { |
20446 | u32 adr, res; |
20447 | u32 src, dst; |
20448 | |
20449 | adr = AREG((Opcode >> 0) & 7); |
20450 | AREG((Opcode >> 0) & 7) += 1; |
20451 | res = 0xFF; |
20452 | PRE_IO |
20453 | WRITE_BYTE_F(adr, res) |
20454 | POST_IO |
20455 | RET(12) |
20456 | } |
20457 | |
20458 | // STCC |
20459 | OPCODE(0x51D8) |
20460 | { |
20461 | u32 adr, res; |
20462 | u32 src, dst; |
20463 | |
20464 | adr = AREG((Opcode >> 0) & 7); |
20465 | AREG((Opcode >> 0) & 7) += 1; |
20466 | res = 0; |
20467 | PRE_IO |
20468 | WRITE_BYTE_F(adr, res) |
20469 | POST_IO |
20470 | RET(12) |
20471 | } |
20472 | |
20473 | // STCC |
20474 | OPCODE(0x52D8) |
20475 | { |
20476 | u32 adr, res; |
20477 | u32 src, dst; |
20478 | |
20479 | adr = AREG((Opcode >> 0) & 7); |
20480 | AREG((Opcode >> 0) & 7) += 1; |
20481 | if (flag_NotZ && (!(flag_C & 0x100))) |
20482 | { |
20483 | res = 0xFF; |
20484 | PRE_IO |
20485 | WRITE_BYTE_F(adr, res) |
20486 | POST_IO |
20487 | RET(12) |
20488 | } |
20489 | res = 0; |
20490 | PRE_IO |
20491 | WRITE_BYTE_F(adr, res) |
20492 | POST_IO |
20493 | RET(12) |
20494 | } |
20495 | |
20496 | // STCC |
20497 | OPCODE(0x53D8) |
20498 | { |
20499 | u32 adr, res; |
20500 | u32 src, dst; |
20501 | |
20502 | adr = AREG((Opcode >> 0) & 7); |
20503 | AREG((Opcode >> 0) & 7) += 1; |
20504 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20505 | { |
20506 | res = 0xFF; |
20507 | PRE_IO |
20508 | WRITE_BYTE_F(adr, res) |
20509 | POST_IO |
20510 | RET(12) |
20511 | } |
20512 | res = 0; |
20513 | PRE_IO |
20514 | WRITE_BYTE_F(adr, res) |
20515 | POST_IO |
20516 | RET(12) |
20517 | } |
20518 | |
20519 | // STCC |
20520 | OPCODE(0x54D8) |
20521 | { |
20522 | u32 adr, res; |
20523 | u32 src, dst; |
20524 | |
20525 | adr = AREG((Opcode >> 0) & 7); |
20526 | AREG((Opcode >> 0) & 7) += 1; |
20527 | if (!(flag_C & 0x100)) |
20528 | { |
20529 | res = 0xFF; |
20530 | PRE_IO |
20531 | WRITE_BYTE_F(adr, res) |
20532 | POST_IO |
20533 | RET(12) |
20534 | } |
20535 | res = 0; |
20536 | PRE_IO |
20537 | WRITE_BYTE_F(adr, res) |
20538 | POST_IO |
20539 | RET(12) |
20540 | } |
20541 | |
20542 | // STCC |
20543 | OPCODE(0x55D8) |
20544 | { |
20545 | u32 adr, res; |
20546 | u32 src, dst; |
20547 | |
20548 | adr = AREG((Opcode >> 0) & 7); |
20549 | AREG((Opcode >> 0) & 7) += 1; |
20550 | if (flag_C & 0x100) |
20551 | { |
20552 | res = 0xFF; |
20553 | PRE_IO |
20554 | WRITE_BYTE_F(adr, res) |
20555 | POST_IO |
20556 | RET(12) |
20557 | } |
20558 | res = 0; |
20559 | PRE_IO |
20560 | WRITE_BYTE_F(adr, res) |
20561 | POST_IO |
20562 | RET(12) |
20563 | } |
20564 | |
20565 | // STCC |
20566 | OPCODE(0x56D8) |
20567 | { |
20568 | u32 adr, res; |
20569 | u32 src, dst; |
20570 | |
20571 | adr = AREG((Opcode >> 0) & 7); |
20572 | AREG((Opcode >> 0) & 7) += 1; |
20573 | if (flag_NotZ) |
20574 | { |
20575 | res = 0xFF; |
20576 | PRE_IO |
20577 | WRITE_BYTE_F(adr, res) |
20578 | POST_IO |
20579 | RET(12) |
20580 | } |
20581 | res = 0; |
20582 | PRE_IO |
20583 | WRITE_BYTE_F(adr, res) |
20584 | POST_IO |
20585 | RET(12) |
20586 | } |
20587 | |
20588 | // STCC |
20589 | OPCODE(0x57D8) |
20590 | { |
20591 | u32 adr, res; |
20592 | u32 src, dst; |
20593 | |
20594 | adr = AREG((Opcode >> 0) & 7); |
20595 | AREG((Opcode >> 0) & 7) += 1; |
20596 | if (!flag_NotZ) |
20597 | { |
20598 | res = 0xFF; |
20599 | PRE_IO |
20600 | WRITE_BYTE_F(adr, res) |
20601 | POST_IO |
20602 | RET(12) |
20603 | } |
20604 | res = 0; |
20605 | PRE_IO |
20606 | WRITE_BYTE_F(adr, res) |
20607 | POST_IO |
20608 | RET(12) |
20609 | } |
20610 | |
20611 | // STCC |
20612 | OPCODE(0x58D8) |
20613 | { |
20614 | u32 adr, res; |
20615 | u32 src, dst; |
20616 | |
20617 | adr = AREG((Opcode >> 0) & 7); |
20618 | AREG((Opcode >> 0) & 7) += 1; |
20619 | if (!(flag_V & 0x80)) |
20620 | { |
20621 | res = 0xFF; |
20622 | PRE_IO |
20623 | WRITE_BYTE_F(adr, res) |
20624 | POST_IO |
20625 | RET(12) |
20626 | } |
20627 | res = 0; |
20628 | PRE_IO |
20629 | WRITE_BYTE_F(adr, res) |
20630 | POST_IO |
20631 | RET(12) |
20632 | } |
20633 | |
20634 | // STCC |
20635 | OPCODE(0x59D8) |
20636 | { |
20637 | u32 adr, res; |
20638 | u32 src, dst; |
20639 | |
20640 | adr = AREG((Opcode >> 0) & 7); |
20641 | AREG((Opcode >> 0) & 7) += 1; |
20642 | if (flag_V & 0x80) |
20643 | { |
20644 | res = 0xFF; |
20645 | PRE_IO |
20646 | WRITE_BYTE_F(adr, res) |
20647 | POST_IO |
20648 | RET(12) |
20649 | } |
20650 | res = 0; |
20651 | PRE_IO |
20652 | WRITE_BYTE_F(adr, res) |
20653 | POST_IO |
20654 | RET(12) |
20655 | } |
20656 | |
20657 | // STCC |
20658 | OPCODE(0x5AD8) |
20659 | { |
20660 | u32 adr, res; |
20661 | u32 src, dst; |
20662 | |
20663 | adr = AREG((Opcode >> 0) & 7); |
20664 | AREG((Opcode >> 0) & 7) += 1; |
20665 | if (!(flag_N & 0x80)) |
20666 | { |
20667 | res = 0xFF; |
20668 | PRE_IO |
20669 | WRITE_BYTE_F(adr, res) |
20670 | POST_IO |
20671 | RET(12) |
20672 | } |
20673 | res = 0; |
20674 | PRE_IO |
20675 | WRITE_BYTE_F(adr, res) |
20676 | POST_IO |
20677 | RET(12) |
20678 | } |
20679 | |
20680 | // STCC |
20681 | OPCODE(0x5BD8) |
20682 | { |
20683 | u32 adr, res; |
20684 | u32 src, dst; |
20685 | |
20686 | adr = AREG((Opcode >> 0) & 7); |
20687 | AREG((Opcode >> 0) & 7) += 1; |
20688 | if (flag_N & 0x80) |
20689 | { |
20690 | res = 0xFF; |
20691 | PRE_IO |
20692 | WRITE_BYTE_F(adr, res) |
20693 | POST_IO |
20694 | RET(12) |
20695 | } |
20696 | res = 0; |
20697 | PRE_IO |
20698 | WRITE_BYTE_F(adr, res) |
20699 | POST_IO |
20700 | RET(12) |
20701 | } |
20702 | |
20703 | // STCC |
20704 | OPCODE(0x5CD8) |
20705 | { |
20706 | u32 adr, res; |
20707 | u32 src, dst; |
20708 | |
20709 | adr = AREG((Opcode >> 0) & 7); |
20710 | AREG((Opcode >> 0) & 7) += 1; |
20711 | if (!((flag_N ^ flag_V) & 0x80)) |
20712 | { |
20713 | res = 0xFF; |
20714 | PRE_IO |
20715 | WRITE_BYTE_F(adr, res) |
20716 | POST_IO |
20717 | RET(12) |
20718 | } |
20719 | res = 0; |
20720 | PRE_IO |
20721 | WRITE_BYTE_F(adr, res) |
20722 | POST_IO |
20723 | RET(12) |
20724 | } |
20725 | |
20726 | // STCC |
20727 | OPCODE(0x5DD8) |
20728 | { |
20729 | u32 adr, res; |
20730 | u32 src, dst; |
20731 | |
20732 | adr = AREG((Opcode >> 0) & 7); |
20733 | AREG((Opcode >> 0) & 7) += 1; |
20734 | if ((flag_N ^ flag_V) & 0x80) |
20735 | { |
20736 | res = 0xFF; |
20737 | PRE_IO |
20738 | WRITE_BYTE_F(adr, res) |
20739 | POST_IO |
20740 | RET(12) |
20741 | } |
20742 | res = 0; |
20743 | PRE_IO |
20744 | WRITE_BYTE_F(adr, res) |
20745 | POST_IO |
20746 | RET(12) |
20747 | } |
20748 | |
20749 | // STCC |
20750 | OPCODE(0x5ED8) |
20751 | { |
20752 | u32 adr, res; |
20753 | u32 src, dst; |
20754 | |
20755 | adr = AREG((Opcode >> 0) & 7); |
20756 | AREG((Opcode >> 0) & 7) += 1; |
20757 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20758 | { |
20759 | res = 0xFF; |
20760 | PRE_IO |
20761 | WRITE_BYTE_F(adr, res) |
20762 | POST_IO |
20763 | RET(12) |
20764 | } |
20765 | res = 0; |
20766 | PRE_IO |
20767 | WRITE_BYTE_F(adr, res) |
20768 | POST_IO |
20769 | RET(12) |
20770 | } |
20771 | |
20772 | // STCC |
20773 | OPCODE(0x5FD8) |
20774 | { |
20775 | u32 adr, res; |
20776 | u32 src, dst; |
20777 | |
20778 | adr = AREG((Opcode >> 0) & 7); |
20779 | AREG((Opcode >> 0) & 7) += 1; |
20780 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20781 | { |
20782 | res = 0xFF; |
20783 | PRE_IO |
20784 | WRITE_BYTE_F(adr, res) |
20785 | POST_IO |
20786 | RET(12) |
20787 | } |
20788 | res = 0; |
20789 | PRE_IO |
20790 | WRITE_BYTE_F(adr, res) |
20791 | POST_IO |
20792 | RET(12) |
20793 | } |
20794 | |
20795 | // STCC |
20796 | OPCODE(0x50E0) |
20797 | { |
20798 | u32 adr, res; |
20799 | u32 src, dst; |
20800 | |
20801 | adr = AREG((Opcode >> 0) & 7) - 1; |
20802 | AREG((Opcode >> 0) & 7) = adr; |
20803 | res = 0xFF; |
20804 | PRE_IO |
20805 | WRITE_BYTE_F(adr, res) |
20806 | POST_IO |
20807 | RET(14) |
20808 | } |
20809 | |
20810 | // STCC |
20811 | OPCODE(0x51E0) |
20812 | { |
20813 | u32 adr, res; |
20814 | u32 src, dst; |
20815 | |
20816 | adr = AREG((Opcode >> 0) & 7) - 1; |
20817 | AREG((Opcode >> 0) & 7) = adr; |
20818 | res = 0; |
20819 | PRE_IO |
20820 | WRITE_BYTE_F(adr, res) |
20821 | POST_IO |
20822 | RET(14) |
20823 | } |
20824 | |
20825 | // STCC |
20826 | OPCODE(0x52E0) |
20827 | { |
20828 | u32 adr, res; |
20829 | u32 src, dst; |
20830 | |
20831 | adr = AREG((Opcode >> 0) & 7) - 1; |
20832 | AREG((Opcode >> 0) & 7) = adr; |
20833 | if (flag_NotZ && (!(flag_C & 0x100))) |
20834 | { |
20835 | res = 0xFF; |
20836 | PRE_IO |
20837 | WRITE_BYTE_F(adr, res) |
20838 | POST_IO |
20839 | RET(14) |
20840 | } |
20841 | res = 0; |
20842 | PRE_IO |
20843 | WRITE_BYTE_F(adr, res) |
20844 | POST_IO |
20845 | RET(14) |
20846 | } |
20847 | |
20848 | // STCC |
20849 | OPCODE(0x53E0) |
20850 | { |
20851 | u32 adr, res; |
20852 | u32 src, dst; |
20853 | |
20854 | adr = AREG((Opcode >> 0) & 7) - 1; |
20855 | AREG((Opcode >> 0) & 7) = adr; |
20856 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20857 | { |
20858 | res = 0xFF; |
20859 | PRE_IO |
20860 | WRITE_BYTE_F(adr, res) |
20861 | POST_IO |
20862 | RET(14) |
20863 | } |
20864 | res = 0; |
20865 | PRE_IO |
20866 | WRITE_BYTE_F(adr, res) |
20867 | POST_IO |
20868 | RET(14) |
20869 | } |
20870 | |
20871 | // STCC |
20872 | OPCODE(0x54E0) |
20873 | { |
20874 | u32 adr, res; |
20875 | u32 src, dst; |
20876 | |
20877 | adr = AREG((Opcode >> 0) & 7) - 1; |
20878 | AREG((Opcode >> 0) & 7) = adr; |
20879 | if (!(flag_C & 0x100)) |
20880 | { |
20881 | res = 0xFF; |
20882 | PRE_IO |
20883 | WRITE_BYTE_F(adr, res) |
20884 | POST_IO |
20885 | RET(14) |
20886 | } |
20887 | res = 0; |
20888 | PRE_IO |
20889 | WRITE_BYTE_F(adr, res) |
20890 | POST_IO |
20891 | RET(14) |
20892 | } |
20893 | |
20894 | // STCC |
20895 | OPCODE(0x55E0) |
20896 | { |
20897 | u32 adr, res; |
20898 | u32 src, dst; |
20899 | |
20900 | adr = AREG((Opcode >> 0) & 7) - 1; |
20901 | AREG((Opcode >> 0) & 7) = adr; |
20902 | if (flag_C & 0x100) |
20903 | { |
20904 | res = 0xFF; |
20905 | PRE_IO |
20906 | WRITE_BYTE_F(adr, res) |
20907 | POST_IO |
20908 | RET(14) |
20909 | } |
20910 | res = 0; |
20911 | PRE_IO |
20912 | WRITE_BYTE_F(adr, res) |
20913 | POST_IO |
20914 | RET(14) |
20915 | } |
20916 | |
20917 | // STCC |
20918 | OPCODE(0x56E0) |
20919 | { |
20920 | u32 adr, res; |
20921 | u32 src, dst; |
20922 | |
20923 | adr = AREG((Opcode >> 0) & 7) - 1; |
20924 | AREG((Opcode >> 0) & 7) = adr; |
20925 | if (flag_NotZ) |
20926 | { |
20927 | res = 0xFF; |
20928 | PRE_IO |
20929 | WRITE_BYTE_F(adr, res) |
20930 | POST_IO |
20931 | RET(14) |
20932 | } |
20933 | res = 0; |
20934 | PRE_IO |
20935 | WRITE_BYTE_F(adr, res) |
20936 | POST_IO |
20937 | RET(14) |
20938 | } |
20939 | |
20940 | // STCC |
20941 | OPCODE(0x57E0) |
20942 | { |
20943 | u32 adr, res; |
20944 | u32 src, dst; |
20945 | |
20946 | adr = AREG((Opcode >> 0) & 7) - 1; |
20947 | AREG((Opcode >> 0) & 7) = adr; |
20948 | if (!flag_NotZ) |
20949 | { |
20950 | res = 0xFF; |
20951 | PRE_IO |
20952 | WRITE_BYTE_F(adr, res) |
20953 | POST_IO |
20954 | RET(14) |
20955 | } |
20956 | res = 0; |
20957 | PRE_IO |
20958 | WRITE_BYTE_F(adr, res) |
20959 | POST_IO |
20960 | RET(14) |
20961 | } |
20962 | |
20963 | // STCC |
20964 | OPCODE(0x58E0) |
20965 | { |
20966 | u32 adr, res; |
20967 | u32 src, dst; |
20968 | |
20969 | adr = AREG((Opcode >> 0) & 7) - 1; |
20970 | AREG((Opcode >> 0) & 7) = adr; |
20971 | if (!(flag_V & 0x80)) |
20972 | { |
20973 | res = 0xFF; |
20974 | PRE_IO |
20975 | WRITE_BYTE_F(adr, res) |
20976 | POST_IO |
20977 | RET(14) |
20978 | } |
20979 | res = 0; |
20980 | PRE_IO |
20981 | WRITE_BYTE_F(adr, res) |
20982 | POST_IO |
20983 | RET(14) |
20984 | } |
20985 | |
20986 | // STCC |
20987 | OPCODE(0x59E0) |
20988 | { |
20989 | u32 adr, res; |
20990 | u32 src, dst; |
20991 | |
20992 | adr = AREG((Opcode >> 0) & 7) - 1; |
20993 | AREG((Opcode >> 0) & 7) = adr; |
20994 | if (flag_V & 0x80) |
20995 | { |
20996 | res = 0xFF; |
20997 | PRE_IO |
20998 | WRITE_BYTE_F(adr, res) |
20999 | POST_IO |
21000 | RET(14) |
21001 | } |
21002 | res = 0; |
21003 | PRE_IO |
21004 | WRITE_BYTE_F(adr, res) |
21005 | POST_IO |
21006 | RET(14) |
21007 | } |
21008 | |
21009 | // STCC |
21010 | OPCODE(0x5AE0) |
21011 | { |
21012 | u32 adr, res; |
21013 | u32 src, dst; |
21014 | |
21015 | adr = AREG((Opcode >> 0) & 7) - 1; |
21016 | AREG((Opcode >> 0) & 7) = adr; |
21017 | if (!(flag_N & 0x80)) |
21018 | { |
21019 | res = 0xFF; |
21020 | PRE_IO |
21021 | WRITE_BYTE_F(adr, res) |
21022 | POST_IO |
21023 | RET(14) |
21024 | } |
21025 | res = 0; |
21026 | PRE_IO |
21027 | WRITE_BYTE_F(adr, res) |
21028 | POST_IO |
21029 | RET(14) |
21030 | } |
21031 | |
21032 | // STCC |
21033 | OPCODE(0x5BE0) |
21034 | { |
21035 | u32 adr, res; |
21036 | u32 src, dst; |
21037 | |
21038 | adr = AREG((Opcode >> 0) & 7) - 1; |
21039 | AREG((Opcode >> 0) & 7) = adr; |
21040 | if (flag_N & 0x80) |
21041 | { |
21042 | res = 0xFF; |
21043 | PRE_IO |
21044 | WRITE_BYTE_F(adr, res) |
21045 | POST_IO |
21046 | RET(14) |
21047 | } |
21048 | res = 0; |
21049 | PRE_IO |
21050 | WRITE_BYTE_F(adr, res) |
21051 | POST_IO |
21052 | RET(14) |
21053 | } |
21054 | |
21055 | // STCC |
21056 | OPCODE(0x5CE0) |
21057 | { |
21058 | u32 adr, res; |
21059 | u32 src, dst; |
21060 | |
21061 | adr = AREG((Opcode >> 0) & 7) - 1; |
21062 | AREG((Opcode >> 0) & 7) = adr; |
21063 | if (!((flag_N ^ flag_V) & 0x80)) |
21064 | { |
21065 | res = 0xFF; |
21066 | PRE_IO |
21067 | WRITE_BYTE_F(adr, res) |
21068 | POST_IO |
21069 | RET(14) |
21070 | } |
21071 | res = 0; |
21072 | PRE_IO |
21073 | WRITE_BYTE_F(adr, res) |
21074 | POST_IO |
21075 | RET(14) |
21076 | } |
21077 | |
21078 | // STCC |
21079 | OPCODE(0x5DE0) |
21080 | { |
21081 | u32 adr, res; |
21082 | u32 src, dst; |
21083 | |
21084 | adr = AREG((Opcode >> 0) & 7) - 1; |
21085 | AREG((Opcode >> 0) & 7) = adr; |
21086 | if ((flag_N ^ flag_V) & 0x80) |
21087 | { |
21088 | res = 0xFF; |
21089 | PRE_IO |
21090 | WRITE_BYTE_F(adr, res) |
21091 | POST_IO |
21092 | RET(14) |
21093 | } |
21094 | res = 0; |
21095 | PRE_IO |
21096 | WRITE_BYTE_F(adr, res) |
21097 | POST_IO |
21098 | RET(14) |
21099 | } |
21100 | |
21101 | // STCC |
21102 | OPCODE(0x5EE0) |
21103 | { |
21104 | u32 adr, res; |
21105 | u32 src, dst; |
21106 | |
21107 | adr = AREG((Opcode >> 0) & 7) - 1; |
21108 | AREG((Opcode >> 0) & 7) = adr; |
21109 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21110 | { |
21111 | res = 0xFF; |
21112 | PRE_IO |
21113 | WRITE_BYTE_F(adr, res) |
21114 | POST_IO |
21115 | RET(14) |
21116 | } |
21117 | res = 0; |
21118 | PRE_IO |
21119 | WRITE_BYTE_F(adr, res) |
21120 | POST_IO |
21121 | RET(14) |
21122 | } |
21123 | |
21124 | // STCC |
21125 | OPCODE(0x5FE0) |
21126 | { |
21127 | u32 adr, res; |
21128 | u32 src, dst; |
21129 | |
21130 | adr = AREG((Opcode >> 0) & 7) - 1; |
21131 | AREG((Opcode >> 0) & 7) = adr; |
21132 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21133 | { |
21134 | res = 0xFF; |
21135 | PRE_IO |
21136 | WRITE_BYTE_F(adr, res) |
21137 | POST_IO |
21138 | RET(14) |
21139 | } |
21140 | res = 0; |
21141 | PRE_IO |
21142 | WRITE_BYTE_F(adr, res) |
21143 | POST_IO |
21144 | RET(14) |
21145 | } |
21146 | |
21147 | // STCC |
21148 | OPCODE(0x50E8) |
21149 | { |
21150 | u32 adr, res; |
21151 | u32 src, dst; |
21152 | |
21153 | FETCH_SWORD(adr); |
21154 | adr += AREG((Opcode >> 0) & 7); |
21155 | res = 0xFF; |
21156 | PRE_IO |
21157 | WRITE_BYTE_F(adr, res) |
21158 | POST_IO |
21159 | RET(16) |
21160 | } |
21161 | |
21162 | // STCC |
21163 | OPCODE(0x51E8) |
21164 | { |
21165 | u32 adr, res; |
21166 | u32 src, dst; |
21167 | |
21168 | FETCH_SWORD(adr); |
21169 | adr += AREG((Opcode >> 0) & 7); |
21170 | res = 0; |
21171 | PRE_IO |
21172 | WRITE_BYTE_F(adr, res) |
21173 | POST_IO |
21174 | RET(16) |
21175 | } |
21176 | |
21177 | // STCC |
21178 | OPCODE(0x52E8) |
21179 | { |
21180 | u32 adr, res; |
21181 | u32 src, dst; |
21182 | |
21183 | FETCH_SWORD(adr); |
21184 | adr += AREG((Opcode >> 0) & 7); |
21185 | if (flag_NotZ && (!(flag_C & 0x100))) |
21186 | { |
21187 | res = 0xFF; |
21188 | PRE_IO |
21189 | WRITE_BYTE_F(adr, res) |
21190 | POST_IO |
21191 | RET(16) |
21192 | } |
21193 | res = 0; |
21194 | PRE_IO |
21195 | WRITE_BYTE_F(adr, res) |
21196 | POST_IO |
21197 | RET(16) |
21198 | } |
21199 | |
21200 | // STCC |
21201 | OPCODE(0x53E8) |
21202 | { |
21203 | u32 adr, res; |
21204 | u32 src, dst; |
21205 | |
21206 | FETCH_SWORD(adr); |
21207 | adr += AREG((Opcode >> 0) & 7); |
21208 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21209 | { |
21210 | res = 0xFF; |
21211 | PRE_IO |
21212 | WRITE_BYTE_F(adr, res) |
21213 | POST_IO |
21214 | RET(16) |
21215 | } |
21216 | res = 0; |
21217 | PRE_IO |
21218 | WRITE_BYTE_F(adr, res) |
21219 | POST_IO |
21220 | RET(16) |
21221 | } |
21222 | |
21223 | // STCC |
21224 | OPCODE(0x54E8) |
21225 | { |
21226 | u32 adr, res; |
21227 | u32 src, dst; |
21228 | |
21229 | FETCH_SWORD(adr); |
21230 | adr += AREG((Opcode >> 0) & 7); |
21231 | if (!(flag_C & 0x100)) |
21232 | { |
21233 | res = 0xFF; |
21234 | PRE_IO |
21235 | WRITE_BYTE_F(adr, res) |
21236 | POST_IO |
21237 | RET(16) |
21238 | } |
21239 | res = 0; |
21240 | PRE_IO |
21241 | WRITE_BYTE_F(adr, res) |
21242 | POST_IO |
21243 | RET(16) |
21244 | } |
21245 | |
21246 | // STCC |
21247 | OPCODE(0x55E8) |
21248 | { |
21249 | u32 adr, res; |
21250 | u32 src, dst; |
21251 | |
21252 | FETCH_SWORD(adr); |
21253 | adr += AREG((Opcode >> 0) & 7); |
21254 | if (flag_C & 0x100) |
21255 | { |
21256 | res = 0xFF; |
21257 | PRE_IO |
21258 | WRITE_BYTE_F(adr, res) |
21259 | POST_IO |
21260 | RET(16) |
21261 | } |
21262 | res = 0; |
21263 | PRE_IO |
21264 | WRITE_BYTE_F(adr, res) |
21265 | POST_IO |
21266 | RET(16) |
21267 | } |
21268 | |
21269 | // STCC |
21270 | OPCODE(0x56E8) |
21271 | { |
21272 | u32 adr, res; |
21273 | u32 src, dst; |
21274 | |
21275 | FETCH_SWORD(adr); |
21276 | adr += AREG((Opcode >> 0) & 7); |
21277 | if (flag_NotZ) |
21278 | { |
21279 | res = 0xFF; |
21280 | PRE_IO |
21281 | WRITE_BYTE_F(adr, res) |
21282 | POST_IO |
21283 | RET(16) |
21284 | } |
21285 | res = 0; |
21286 | PRE_IO |
21287 | WRITE_BYTE_F(adr, res) |
21288 | POST_IO |
21289 | RET(16) |
21290 | } |
21291 | |
21292 | // STCC |
21293 | OPCODE(0x57E8) |
21294 | { |
21295 | u32 adr, res; |
21296 | u32 src, dst; |
21297 | |
21298 | FETCH_SWORD(adr); |
21299 | adr += AREG((Opcode >> 0) & 7); |
21300 | if (!flag_NotZ) |
21301 | { |
21302 | res = 0xFF; |
21303 | PRE_IO |
21304 | WRITE_BYTE_F(adr, res) |
21305 | POST_IO |
21306 | RET(16) |
21307 | } |
21308 | res = 0; |
21309 | PRE_IO |
21310 | WRITE_BYTE_F(adr, res) |
21311 | POST_IO |
21312 | RET(16) |
21313 | } |
21314 | |
21315 | // STCC |
21316 | OPCODE(0x58E8) |
21317 | { |
21318 | u32 adr, res; |
21319 | u32 src, dst; |
21320 | |
21321 | FETCH_SWORD(adr); |
21322 | adr += AREG((Opcode >> 0) & 7); |
21323 | if (!(flag_V & 0x80)) |
21324 | { |
21325 | res = 0xFF; |
21326 | PRE_IO |
21327 | WRITE_BYTE_F(adr, res) |
21328 | POST_IO |
21329 | RET(16) |
21330 | } |
21331 | res = 0; |
21332 | PRE_IO |
21333 | WRITE_BYTE_F(adr, res) |
21334 | POST_IO |
21335 | RET(16) |
21336 | } |
21337 | |
21338 | // STCC |
21339 | OPCODE(0x59E8) |
21340 | { |
21341 | u32 adr, res; |
21342 | u32 src, dst; |
21343 | |
21344 | FETCH_SWORD(adr); |
21345 | adr += AREG((Opcode >> 0) & 7); |
21346 | if (flag_V & 0x80) |
21347 | { |
21348 | res = 0xFF; |
21349 | PRE_IO |
21350 | WRITE_BYTE_F(adr, res) |
21351 | POST_IO |
21352 | RET(16) |
21353 | } |
21354 | res = 0; |
21355 | PRE_IO |
21356 | WRITE_BYTE_F(adr, res) |
21357 | POST_IO |
21358 | RET(16) |
21359 | } |
21360 | |
21361 | // STCC |
21362 | OPCODE(0x5AE8) |
21363 | { |
21364 | u32 adr, res; |
21365 | u32 src, dst; |
21366 | |
21367 | FETCH_SWORD(adr); |
21368 | adr += AREG((Opcode >> 0) & 7); |
21369 | if (!(flag_N & 0x80)) |
21370 | { |
21371 | res = 0xFF; |
21372 | PRE_IO |
21373 | WRITE_BYTE_F(adr, res) |
21374 | POST_IO |
21375 | RET(16) |
21376 | } |
21377 | res = 0; |
21378 | PRE_IO |
21379 | WRITE_BYTE_F(adr, res) |
21380 | POST_IO |
21381 | RET(16) |
21382 | } |
21383 | |
21384 | // STCC |
21385 | OPCODE(0x5BE8) |
21386 | { |
21387 | u32 adr, res; |
21388 | u32 src, dst; |
21389 | |
21390 | FETCH_SWORD(adr); |
21391 | adr += AREG((Opcode >> 0) & 7); |
21392 | if (flag_N & 0x80) |
21393 | { |
21394 | res = 0xFF; |
21395 | PRE_IO |
21396 | WRITE_BYTE_F(adr, res) |
21397 | POST_IO |
21398 | RET(16) |
21399 | } |
21400 | res = 0; |
21401 | PRE_IO |
21402 | WRITE_BYTE_F(adr, res) |
21403 | POST_IO |
21404 | RET(16) |
21405 | } |
21406 | |
21407 | // STCC |
21408 | OPCODE(0x5CE8) |
21409 | { |
21410 | u32 adr, res; |
21411 | u32 src, dst; |
21412 | |
21413 | FETCH_SWORD(adr); |
21414 | adr += AREG((Opcode >> 0) & 7); |
21415 | if (!((flag_N ^ flag_V) & 0x80)) |
21416 | { |
21417 | res = 0xFF; |
21418 | PRE_IO |
21419 | WRITE_BYTE_F(adr, res) |
21420 | POST_IO |
21421 | RET(16) |
21422 | } |
21423 | res = 0; |
21424 | PRE_IO |
21425 | WRITE_BYTE_F(adr, res) |
21426 | POST_IO |
21427 | RET(16) |
21428 | } |
21429 | |
21430 | // STCC |
21431 | OPCODE(0x5DE8) |
21432 | { |
21433 | u32 adr, res; |
21434 | u32 src, dst; |
21435 | |
21436 | FETCH_SWORD(adr); |
21437 | adr += AREG((Opcode >> 0) & 7); |
21438 | if ((flag_N ^ flag_V) & 0x80) |
21439 | { |
21440 | res = 0xFF; |
21441 | PRE_IO |
21442 | WRITE_BYTE_F(adr, res) |
21443 | POST_IO |
21444 | RET(16) |
21445 | } |
21446 | res = 0; |
21447 | PRE_IO |
21448 | WRITE_BYTE_F(adr, res) |
21449 | POST_IO |
21450 | RET(16) |
21451 | } |
21452 | |
21453 | // STCC |
21454 | OPCODE(0x5EE8) |
21455 | { |
21456 | u32 adr, res; |
21457 | u32 src, dst; |
21458 | |
21459 | FETCH_SWORD(adr); |
21460 | adr += AREG((Opcode >> 0) & 7); |
21461 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21462 | { |
21463 | res = 0xFF; |
21464 | PRE_IO |
21465 | WRITE_BYTE_F(adr, res) |
21466 | POST_IO |
21467 | RET(16) |
21468 | } |
21469 | res = 0; |
21470 | PRE_IO |
21471 | WRITE_BYTE_F(adr, res) |
21472 | POST_IO |
21473 | RET(16) |
21474 | } |
21475 | |
21476 | // STCC |
21477 | OPCODE(0x5FE8) |
21478 | { |
21479 | u32 adr, res; |
21480 | u32 src, dst; |
21481 | |
21482 | FETCH_SWORD(adr); |
21483 | adr += AREG((Opcode >> 0) & 7); |
21484 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21485 | { |
21486 | res = 0xFF; |
21487 | PRE_IO |
21488 | WRITE_BYTE_F(adr, res) |
21489 | POST_IO |
21490 | RET(16) |
21491 | } |
21492 | res = 0; |
21493 | PRE_IO |
21494 | WRITE_BYTE_F(adr, res) |
21495 | POST_IO |
21496 | RET(16) |
21497 | } |
21498 | |
21499 | // STCC |
21500 | OPCODE(0x50F0) |
21501 | { |
21502 | u32 adr, res; |
21503 | u32 src, dst; |
21504 | |
21505 | adr = AREG((Opcode >> 0) & 7); |
21506 | DECODE_EXT_WORD |
21507 | res = 0xFF; |
21508 | PRE_IO |
21509 | WRITE_BYTE_F(adr, res) |
21510 | POST_IO |
21511 | RET(18) |
21512 | } |
21513 | |
21514 | // STCC |
21515 | OPCODE(0x51F0) |
21516 | { |
21517 | u32 adr, res; |
21518 | u32 src, dst; |
21519 | |
21520 | adr = AREG((Opcode >> 0) & 7); |
21521 | DECODE_EXT_WORD |
21522 | res = 0; |
21523 | PRE_IO |
21524 | WRITE_BYTE_F(adr, res) |
21525 | POST_IO |
21526 | RET(18) |
21527 | } |
21528 | |
21529 | // STCC |
21530 | OPCODE(0x52F0) |
21531 | { |
21532 | u32 adr, res; |
21533 | u32 src, dst; |
21534 | |
21535 | adr = AREG((Opcode >> 0) & 7); |
21536 | DECODE_EXT_WORD |
21537 | if (flag_NotZ && (!(flag_C & 0x100))) |
21538 | { |
21539 | res = 0xFF; |
21540 | PRE_IO |
21541 | WRITE_BYTE_F(adr, res) |
21542 | POST_IO |
21543 | RET(18) |
21544 | } |
21545 | res = 0; |
21546 | PRE_IO |
21547 | WRITE_BYTE_F(adr, res) |
21548 | POST_IO |
21549 | RET(18) |
21550 | } |
21551 | |
21552 | // STCC |
21553 | OPCODE(0x53F0) |
21554 | { |
21555 | u32 adr, res; |
21556 | u32 src, dst; |
21557 | |
21558 | adr = AREG((Opcode >> 0) & 7); |
21559 | DECODE_EXT_WORD |
21560 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21561 | { |
21562 | res = 0xFF; |
21563 | PRE_IO |
21564 | WRITE_BYTE_F(adr, res) |
21565 | POST_IO |
21566 | RET(18) |
21567 | } |
21568 | res = 0; |
21569 | PRE_IO |
21570 | WRITE_BYTE_F(adr, res) |
21571 | POST_IO |
21572 | RET(18) |
21573 | } |
21574 | |
21575 | // STCC |
21576 | OPCODE(0x54F0) |
21577 | { |
21578 | u32 adr, res; |
21579 | u32 src, dst; |
21580 | |
21581 | adr = AREG((Opcode >> 0) & 7); |
21582 | DECODE_EXT_WORD |
21583 | if (!(flag_C & 0x100)) |
21584 | { |
21585 | res = 0xFF; |
21586 | PRE_IO |
21587 | WRITE_BYTE_F(adr, res) |
21588 | POST_IO |
21589 | RET(18) |
21590 | } |
21591 | res = 0; |
21592 | PRE_IO |
21593 | WRITE_BYTE_F(adr, res) |
21594 | POST_IO |
21595 | RET(18) |
21596 | } |
21597 | |
21598 | // STCC |
21599 | OPCODE(0x55F0) |
21600 | { |
21601 | u32 adr, res; |
21602 | u32 src, dst; |
21603 | |
21604 | adr = AREG((Opcode >> 0) & 7); |
21605 | DECODE_EXT_WORD |
21606 | if (flag_C & 0x100) |
21607 | { |
21608 | res = 0xFF; |
21609 | PRE_IO |
21610 | WRITE_BYTE_F(adr, res) |
21611 | POST_IO |
21612 | RET(18) |
21613 | } |
21614 | res = 0; |
21615 | PRE_IO |
21616 | WRITE_BYTE_F(adr, res) |
21617 | POST_IO |
21618 | RET(18) |
21619 | } |
21620 | |
21621 | // STCC |
21622 | OPCODE(0x56F0) |
21623 | { |
21624 | u32 adr, res; |
21625 | u32 src, dst; |
21626 | |
21627 | adr = AREG((Opcode >> 0) & 7); |
21628 | DECODE_EXT_WORD |
21629 | if (flag_NotZ) |
21630 | { |
21631 | res = 0xFF; |
21632 | PRE_IO |
21633 | WRITE_BYTE_F(adr, res) |
21634 | POST_IO |
21635 | RET(18) |
21636 | } |
21637 | res = 0; |
21638 | PRE_IO |
21639 | WRITE_BYTE_F(adr, res) |
21640 | POST_IO |
21641 | RET(18) |
21642 | } |
21643 | |
21644 | // STCC |
21645 | OPCODE(0x57F0) |
21646 | { |
21647 | u32 adr, res; |
21648 | u32 src, dst; |
21649 | |
21650 | adr = AREG((Opcode >> 0) & 7); |
21651 | DECODE_EXT_WORD |
21652 | if (!flag_NotZ) |
21653 | { |
21654 | res = 0xFF; |
21655 | PRE_IO |
21656 | WRITE_BYTE_F(adr, res) |
21657 | POST_IO |
21658 | RET(18) |
21659 | } |
21660 | res = 0; |
21661 | PRE_IO |
21662 | WRITE_BYTE_F(adr, res) |
21663 | POST_IO |
21664 | RET(18) |
21665 | } |
21666 | |
21667 | // STCC |
21668 | OPCODE(0x58F0) |
21669 | { |
21670 | u32 adr, res; |
21671 | u32 src, dst; |
21672 | |
21673 | adr = AREG((Opcode >> 0) & 7); |
21674 | DECODE_EXT_WORD |
21675 | if (!(flag_V & 0x80)) |
21676 | { |
21677 | res = 0xFF; |
21678 | PRE_IO |
21679 | WRITE_BYTE_F(adr, res) |
21680 | POST_IO |
21681 | RET(18) |
21682 | } |
21683 | res = 0; |
21684 | PRE_IO |
21685 | WRITE_BYTE_F(adr, res) |
21686 | POST_IO |
21687 | RET(18) |
21688 | } |
21689 | |
21690 | // STCC |
21691 | OPCODE(0x59F0) |
21692 | { |
21693 | u32 adr, res; |
21694 | u32 src, dst; |
21695 | |
21696 | adr = AREG((Opcode >> 0) & 7); |
21697 | DECODE_EXT_WORD |
21698 | if (flag_V & 0x80) |
21699 | { |
21700 | res = 0xFF; |
21701 | PRE_IO |
21702 | WRITE_BYTE_F(adr, res) |
21703 | POST_IO |
21704 | RET(18) |
21705 | } |
21706 | res = 0; |
21707 | PRE_IO |
21708 | WRITE_BYTE_F(adr, res) |
21709 | POST_IO |
21710 | RET(18) |
21711 | } |
21712 | |
21713 | // STCC |
21714 | OPCODE(0x5AF0) |
21715 | { |
21716 | u32 adr, res; |
21717 | u32 src, dst; |
21718 | |
21719 | adr = AREG((Opcode >> 0) & 7); |
21720 | DECODE_EXT_WORD |
21721 | if (!(flag_N & 0x80)) |
21722 | { |
21723 | res = 0xFF; |
21724 | PRE_IO |
21725 | WRITE_BYTE_F(adr, res) |
21726 | POST_IO |
21727 | RET(18) |
21728 | } |
21729 | res = 0; |
21730 | PRE_IO |
21731 | WRITE_BYTE_F(adr, res) |
21732 | POST_IO |
21733 | RET(18) |
21734 | } |
21735 | |
21736 | // STCC |
21737 | OPCODE(0x5BF0) |
21738 | { |
21739 | u32 adr, res; |
21740 | u32 src, dst; |
21741 | |
21742 | adr = AREG((Opcode >> 0) & 7); |
21743 | DECODE_EXT_WORD |
21744 | if (flag_N & 0x80) |
21745 | { |
21746 | res = 0xFF; |
21747 | PRE_IO |
21748 | WRITE_BYTE_F(adr, res) |
21749 | POST_IO |
21750 | RET(18) |
21751 | } |
21752 | res = 0; |
21753 | PRE_IO |
21754 | WRITE_BYTE_F(adr, res) |
21755 | POST_IO |
21756 | RET(18) |
21757 | } |
21758 | |
21759 | // STCC |
21760 | OPCODE(0x5CF0) |
21761 | { |
21762 | u32 adr, res; |
21763 | u32 src, dst; |
21764 | |
21765 | adr = AREG((Opcode >> 0) & 7); |
21766 | DECODE_EXT_WORD |
21767 | if (!((flag_N ^ flag_V) & 0x80)) |
21768 | { |
21769 | res = 0xFF; |
21770 | PRE_IO |
21771 | WRITE_BYTE_F(adr, res) |
21772 | POST_IO |
21773 | RET(18) |
21774 | } |
21775 | res = 0; |
21776 | PRE_IO |
21777 | WRITE_BYTE_F(adr, res) |
21778 | POST_IO |
21779 | RET(18) |
21780 | } |
21781 | |
21782 | // STCC |
21783 | OPCODE(0x5DF0) |
21784 | { |
21785 | u32 adr, res; |
21786 | u32 src, dst; |
21787 | |
21788 | adr = AREG((Opcode >> 0) & 7); |
21789 | DECODE_EXT_WORD |
21790 | if ((flag_N ^ flag_V) & 0x80) |
21791 | { |
21792 | res = 0xFF; |
21793 | PRE_IO |
21794 | WRITE_BYTE_F(adr, res) |
21795 | POST_IO |
21796 | RET(18) |
21797 | } |
21798 | res = 0; |
21799 | PRE_IO |
21800 | WRITE_BYTE_F(adr, res) |
21801 | POST_IO |
21802 | RET(18) |
21803 | } |
21804 | |
21805 | // STCC |
21806 | OPCODE(0x5EF0) |
21807 | { |
21808 | u32 adr, res; |
21809 | u32 src, dst; |
21810 | |
21811 | adr = AREG((Opcode >> 0) & 7); |
21812 | DECODE_EXT_WORD |
21813 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21814 | { |
21815 | res = 0xFF; |
21816 | PRE_IO |
21817 | WRITE_BYTE_F(adr, res) |
21818 | POST_IO |
21819 | RET(18) |
21820 | } |
21821 | res = 0; |
21822 | PRE_IO |
21823 | WRITE_BYTE_F(adr, res) |
21824 | POST_IO |
21825 | RET(18) |
21826 | } |
21827 | |
21828 | // STCC |
21829 | OPCODE(0x5FF0) |
21830 | { |
21831 | u32 adr, res; |
21832 | u32 src, dst; |
21833 | |
21834 | adr = AREG((Opcode >> 0) & 7); |
21835 | DECODE_EXT_WORD |
21836 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21837 | { |
21838 | res = 0xFF; |
21839 | PRE_IO |
21840 | WRITE_BYTE_F(adr, res) |
21841 | POST_IO |
21842 | RET(18) |
21843 | } |
21844 | res = 0; |
21845 | PRE_IO |
21846 | WRITE_BYTE_F(adr, res) |
21847 | POST_IO |
21848 | RET(18) |
21849 | } |
21850 | |
21851 | // STCC |
21852 | OPCODE(0x50F8) |
21853 | { |
21854 | u32 adr, res; |
21855 | u32 src, dst; |
21856 | |
21857 | FETCH_SWORD(adr); |
21858 | res = 0xFF; |
21859 | PRE_IO |
21860 | WRITE_BYTE_F(adr, res) |
21861 | POST_IO |
21862 | RET(16) |
21863 | } |
21864 | |
21865 | // STCC |
21866 | OPCODE(0x51F8) |
21867 | { |
21868 | u32 adr, res; |
21869 | u32 src, dst; |
21870 | |
21871 | FETCH_SWORD(adr); |
21872 | res = 0; |
21873 | PRE_IO |
21874 | WRITE_BYTE_F(adr, res) |
21875 | POST_IO |
21876 | RET(16) |
21877 | } |
21878 | |
21879 | // STCC |
21880 | OPCODE(0x52F8) |
21881 | { |
21882 | u32 adr, res; |
21883 | u32 src, dst; |
21884 | |
21885 | FETCH_SWORD(adr); |
21886 | if (flag_NotZ && (!(flag_C & 0x100))) |
21887 | { |
21888 | res = 0xFF; |
21889 | PRE_IO |
21890 | WRITE_BYTE_F(adr, res) |
21891 | POST_IO |
21892 | RET(16) |
21893 | } |
21894 | res = 0; |
21895 | PRE_IO |
21896 | WRITE_BYTE_F(adr, res) |
21897 | POST_IO |
21898 | RET(16) |
21899 | } |
21900 | |
21901 | // STCC |
21902 | OPCODE(0x53F8) |
21903 | { |
21904 | u32 adr, res; |
21905 | u32 src, dst; |
21906 | |
21907 | FETCH_SWORD(adr); |
21908 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21909 | { |
21910 | res = 0xFF; |
21911 | PRE_IO |
21912 | WRITE_BYTE_F(adr, res) |
21913 | POST_IO |
21914 | RET(16) |
21915 | } |
21916 | res = 0; |
21917 | PRE_IO |
21918 | WRITE_BYTE_F(adr, res) |
21919 | POST_IO |
21920 | RET(16) |
21921 | } |
21922 | |
21923 | // STCC |
21924 | OPCODE(0x54F8) |
21925 | { |
21926 | u32 adr, res; |
21927 | u32 src, dst; |
21928 | |
21929 | FETCH_SWORD(adr); |
21930 | if (!(flag_C & 0x100)) |
21931 | { |
21932 | res = 0xFF; |
21933 | PRE_IO |
21934 | WRITE_BYTE_F(adr, res) |
21935 | POST_IO |
21936 | RET(16) |
21937 | } |
21938 | res = 0; |
21939 | PRE_IO |
21940 | WRITE_BYTE_F(adr, res) |
21941 | POST_IO |
21942 | RET(16) |
21943 | } |
21944 | |
21945 | // STCC |
21946 | OPCODE(0x55F8) |
21947 | { |
21948 | u32 adr, res; |
21949 | u32 src, dst; |
21950 | |
21951 | FETCH_SWORD(adr); |
21952 | if (flag_C & 0x100) |
21953 | { |
21954 | res = 0xFF; |
21955 | PRE_IO |
21956 | WRITE_BYTE_F(adr, res) |
21957 | POST_IO |
21958 | RET(16) |
21959 | } |
21960 | res = 0; |
21961 | PRE_IO |
21962 | WRITE_BYTE_F(adr, res) |
21963 | POST_IO |
21964 | RET(16) |
21965 | } |
21966 | |
21967 | // STCC |
21968 | OPCODE(0x56F8) |
21969 | { |
21970 | u32 adr, res; |
21971 | u32 src, dst; |
21972 | |
21973 | FETCH_SWORD(adr); |
21974 | if (flag_NotZ) |
21975 | { |
21976 | res = 0xFF; |
21977 | PRE_IO |
21978 | WRITE_BYTE_F(adr, res) |
21979 | POST_IO |
21980 | RET(16) |
21981 | } |
21982 | res = 0; |
21983 | PRE_IO |
21984 | WRITE_BYTE_F(adr, res) |
21985 | POST_IO |
21986 | RET(16) |
21987 | } |
21988 | |
21989 | // STCC |
21990 | OPCODE(0x57F8) |
21991 | { |
21992 | u32 adr, res; |
21993 | u32 src, dst; |
21994 | |
21995 | FETCH_SWORD(adr); |
21996 | if (!flag_NotZ) |
21997 | { |
21998 | res = 0xFF; |
21999 | PRE_IO |
22000 | WRITE_BYTE_F(adr, res) |
22001 | POST_IO |
22002 | RET(16) |
22003 | } |
22004 | res = 0; |
22005 | PRE_IO |
22006 | WRITE_BYTE_F(adr, res) |
22007 | POST_IO |
22008 | RET(16) |
22009 | } |
22010 | |
22011 | // STCC |
22012 | OPCODE(0x58F8) |
22013 | { |
22014 | u32 adr, res; |
22015 | u32 src, dst; |
22016 | |
22017 | FETCH_SWORD(adr); |
22018 | if (!(flag_V & 0x80)) |
22019 | { |
22020 | res = 0xFF; |
22021 | PRE_IO |
22022 | WRITE_BYTE_F(adr, res) |
22023 | POST_IO |
22024 | RET(16) |
22025 | } |
22026 | res = 0; |
22027 | PRE_IO |
22028 | WRITE_BYTE_F(adr, res) |
22029 | POST_IO |
22030 | RET(16) |
22031 | } |
22032 | |
22033 | // STCC |
22034 | OPCODE(0x59F8) |
22035 | { |
22036 | u32 adr, res; |
22037 | u32 src, dst; |
22038 | |
22039 | FETCH_SWORD(adr); |
22040 | if (flag_V & 0x80) |
22041 | { |
22042 | res = 0xFF; |
22043 | PRE_IO |
22044 | WRITE_BYTE_F(adr, res) |
22045 | POST_IO |
22046 | RET(16) |
22047 | } |
22048 | res = 0; |
22049 | PRE_IO |
22050 | WRITE_BYTE_F(adr, res) |
22051 | POST_IO |
22052 | RET(16) |
22053 | } |
22054 | |
22055 | // STCC |
22056 | OPCODE(0x5AF8) |
22057 | { |
22058 | u32 adr, res; |
22059 | u32 src, dst; |
22060 | |
22061 | FETCH_SWORD(adr); |
22062 | if (!(flag_N & 0x80)) |
22063 | { |
22064 | res = 0xFF; |
22065 | PRE_IO |
22066 | WRITE_BYTE_F(adr, res) |
22067 | POST_IO |
22068 | RET(16) |
22069 | } |
22070 | res = 0; |
22071 | PRE_IO |
22072 | WRITE_BYTE_F(adr, res) |
22073 | POST_IO |
22074 | RET(16) |
22075 | } |
22076 | |
22077 | // STCC |
22078 | OPCODE(0x5BF8) |
22079 | { |
22080 | u32 adr, res; |
22081 | u32 src, dst; |
22082 | |
22083 | FETCH_SWORD(adr); |
22084 | if (flag_N & 0x80) |
22085 | { |
22086 | res = 0xFF; |
22087 | PRE_IO |
22088 | WRITE_BYTE_F(adr, res) |
22089 | POST_IO |
22090 | RET(16) |
22091 | } |
22092 | res = 0; |
22093 | PRE_IO |
22094 | WRITE_BYTE_F(adr, res) |
22095 | POST_IO |
22096 | RET(16) |
22097 | } |
22098 | |
22099 | // STCC |
22100 | OPCODE(0x5CF8) |
22101 | { |
22102 | u32 adr, res; |
22103 | u32 src, dst; |
22104 | |
22105 | FETCH_SWORD(adr); |
22106 | if (!((flag_N ^ flag_V) & 0x80)) |
22107 | { |
22108 | res = 0xFF; |
22109 | PRE_IO |
22110 | WRITE_BYTE_F(adr, res) |
22111 | POST_IO |
22112 | RET(16) |
22113 | } |
22114 | res = 0; |
22115 | PRE_IO |
22116 | WRITE_BYTE_F(adr, res) |
22117 | POST_IO |
22118 | RET(16) |
22119 | } |
22120 | |
22121 | // STCC |
22122 | OPCODE(0x5DF8) |
22123 | { |
22124 | u32 adr, res; |
22125 | u32 src, dst; |
22126 | |
22127 | FETCH_SWORD(adr); |
22128 | if ((flag_N ^ flag_V) & 0x80) |
22129 | { |
22130 | res = 0xFF; |
22131 | PRE_IO |
22132 | WRITE_BYTE_F(adr, res) |
22133 | POST_IO |
22134 | RET(16) |
22135 | } |
22136 | res = 0; |
22137 | PRE_IO |
22138 | WRITE_BYTE_F(adr, res) |
22139 | POST_IO |
22140 | RET(16) |
22141 | } |
22142 | |
22143 | // STCC |
22144 | OPCODE(0x5EF8) |
22145 | { |
22146 | u32 adr, res; |
22147 | u32 src, dst; |
22148 | |
22149 | FETCH_SWORD(adr); |
22150 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22151 | { |
22152 | res = 0xFF; |
22153 | PRE_IO |
22154 | WRITE_BYTE_F(adr, res) |
22155 | POST_IO |
22156 | RET(16) |
22157 | } |
22158 | res = 0; |
22159 | PRE_IO |
22160 | WRITE_BYTE_F(adr, res) |
22161 | POST_IO |
22162 | RET(16) |
22163 | } |
22164 | |
22165 | // STCC |
22166 | OPCODE(0x5FF8) |
22167 | { |
22168 | u32 adr, res; |
22169 | u32 src, dst; |
22170 | |
22171 | FETCH_SWORD(adr); |
22172 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22173 | { |
22174 | res = 0xFF; |
22175 | PRE_IO |
22176 | WRITE_BYTE_F(adr, res) |
22177 | POST_IO |
22178 | RET(16) |
22179 | } |
22180 | res = 0; |
22181 | PRE_IO |
22182 | WRITE_BYTE_F(adr, res) |
22183 | POST_IO |
22184 | RET(16) |
22185 | } |
22186 | |
22187 | // STCC |
22188 | OPCODE(0x50F9) |
22189 | { |
22190 | u32 adr, res; |
22191 | u32 src, dst; |
22192 | |
22193 | FETCH_LONG(adr); |
22194 | res = 0xFF; |
22195 | PRE_IO |
22196 | WRITE_BYTE_F(adr, res) |
22197 | POST_IO |
22198 | RET(20) |
22199 | } |
22200 | |
22201 | // STCC |
22202 | OPCODE(0x51F9) |
22203 | { |
22204 | u32 adr, res; |
22205 | u32 src, dst; |
22206 | |
22207 | FETCH_LONG(adr); |
22208 | res = 0; |
22209 | PRE_IO |
22210 | WRITE_BYTE_F(adr, res) |
22211 | POST_IO |
22212 | RET(20) |
22213 | } |
22214 | |
22215 | // STCC |
22216 | OPCODE(0x52F9) |
22217 | { |
22218 | u32 adr, res; |
22219 | u32 src, dst; |
22220 | |
22221 | FETCH_LONG(adr); |
22222 | if (flag_NotZ && (!(flag_C & 0x100))) |
22223 | { |
22224 | res = 0xFF; |
22225 | PRE_IO |
22226 | WRITE_BYTE_F(adr, res) |
22227 | POST_IO |
22228 | RET(20) |
22229 | } |
22230 | res = 0; |
22231 | PRE_IO |
22232 | WRITE_BYTE_F(adr, res) |
22233 | POST_IO |
22234 | RET(20) |
22235 | } |
22236 | |
22237 | // STCC |
22238 | OPCODE(0x53F9) |
22239 | { |
22240 | u32 adr, res; |
22241 | u32 src, dst; |
22242 | |
22243 | FETCH_LONG(adr); |
22244 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22245 | { |
22246 | res = 0xFF; |
22247 | PRE_IO |
22248 | WRITE_BYTE_F(adr, res) |
22249 | POST_IO |
22250 | RET(20) |
22251 | } |
22252 | res = 0; |
22253 | PRE_IO |
22254 | WRITE_BYTE_F(adr, res) |
22255 | POST_IO |
22256 | RET(20) |
22257 | } |
22258 | |
22259 | // STCC |
22260 | OPCODE(0x54F9) |
22261 | { |
22262 | u32 adr, res; |
22263 | u32 src, dst; |
22264 | |
22265 | FETCH_LONG(adr); |
22266 | if (!(flag_C & 0x100)) |
22267 | { |
22268 | res = 0xFF; |
22269 | PRE_IO |
22270 | WRITE_BYTE_F(adr, res) |
22271 | POST_IO |
22272 | RET(20) |
22273 | } |
22274 | res = 0; |
22275 | PRE_IO |
22276 | WRITE_BYTE_F(adr, res) |
22277 | POST_IO |
22278 | RET(20) |
22279 | } |
22280 | |
22281 | // STCC |
22282 | OPCODE(0x55F9) |
22283 | { |
22284 | u32 adr, res; |
22285 | u32 src, dst; |
22286 | |
22287 | FETCH_LONG(adr); |
22288 | if (flag_C & 0x100) |
22289 | { |
22290 | res = 0xFF; |
22291 | PRE_IO |
22292 | WRITE_BYTE_F(adr, res) |
22293 | POST_IO |
22294 | RET(20) |
22295 | } |
22296 | res = 0; |
22297 | PRE_IO |
22298 | WRITE_BYTE_F(adr, res) |
22299 | POST_IO |
22300 | RET(20) |
22301 | } |
22302 | |
22303 | // STCC |
22304 | OPCODE(0x56F9) |
22305 | { |
22306 | u32 adr, res; |
22307 | u32 src, dst; |
22308 | |
22309 | FETCH_LONG(adr); |
22310 | if (flag_NotZ) |
22311 | { |
22312 | res = 0xFF; |
22313 | PRE_IO |
22314 | WRITE_BYTE_F(adr, res) |
22315 | POST_IO |
22316 | RET(20) |
22317 | } |
22318 | res = 0; |
22319 | PRE_IO |
22320 | WRITE_BYTE_F(adr, res) |
22321 | POST_IO |
22322 | RET(20) |
22323 | } |
22324 | |
22325 | // STCC |
22326 | OPCODE(0x57F9) |
22327 | { |
22328 | u32 adr, res; |
22329 | u32 src, dst; |
22330 | |
22331 | FETCH_LONG(adr); |
22332 | if (!flag_NotZ) |
22333 | { |
22334 | res = 0xFF; |
22335 | PRE_IO |
22336 | WRITE_BYTE_F(adr, res) |
22337 | POST_IO |
22338 | RET(20) |
22339 | } |
22340 | res = 0; |
22341 | PRE_IO |
22342 | WRITE_BYTE_F(adr, res) |
22343 | POST_IO |
22344 | RET(20) |
22345 | } |
22346 | |
22347 | // STCC |
22348 | OPCODE(0x58F9) |
22349 | { |
22350 | u32 adr, res; |
22351 | u32 src, dst; |
22352 | |
22353 | FETCH_LONG(adr); |
22354 | if (!(flag_V & 0x80)) |
22355 | { |
22356 | res = 0xFF; |
22357 | PRE_IO |
22358 | WRITE_BYTE_F(adr, res) |
22359 | POST_IO |
22360 | RET(20) |
22361 | } |
22362 | res = 0; |
22363 | PRE_IO |
22364 | WRITE_BYTE_F(adr, res) |
22365 | POST_IO |
22366 | RET(20) |
22367 | } |
22368 | |
22369 | // STCC |
22370 | OPCODE(0x59F9) |
22371 | { |
22372 | u32 adr, res; |
22373 | u32 src, dst; |
22374 | |
22375 | FETCH_LONG(adr); |
22376 | if (flag_V & 0x80) |
22377 | { |
22378 | res = 0xFF; |
22379 | PRE_IO |
22380 | WRITE_BYTE_F(adr, res) |
22381 | POST_IO |
22382 | RET(20) |
22383 | } |
22384 | res = 0; |
22385 | PRE_IO |
22386 | WRITE_BYTE_F(adr, res) |
22387 | POST_IO |
22388 | RET(20) |
22389 | } |
22390 | |
22391 | // STCC |
22392 | OPCODE(0x5AF9) |
22393 | { |
22394 | u32 adr, res; |
22395 | u32 src, dst; |
22396 | |
22397 | FETCH_LONG(adr); |
22398 | if (!(flag_N & 0x80)) |
22399 | { |
22400 | res = 0xFF; |
22401 | PRE_IO |
22402 | WRITE_BYTE_F(adr, res) |
22403 | POST_IO |
22404 | RET(20) |
22405 | } |
22406 | res = 0; |
22407 | PRE_IO |
22408 | WRITE_BYTE_F(adr, res) |
22409 | POST_IO |
22410 | RET(20) |
22411 | } |
22412 | |
22413 | // STCC |
22414 | OPCODE(0x5BF9) |
22415 | { |
22416 | u32 adr, res; |
22417 | u32 src, dst; |
22418 | |
22419 | FETCH_LONG(adr); |
22420 | if (flag_N & 0x80) |
22421 | { |
22422 | res = 0xFF; |
22423 | PRE_IO |
22424 | WRITE_BYTE_F(adr, res) |
22425 | POST_IO |
22426 | RET(20) |
22427 | } |
22428 | res = 0; |
22429 | PRE_IO |
22430 | WRITE_BYTE_F(adr, res) |
22431 | POST_IO |
22432 | RET(20) |
22433 | } |
22434 | |
22435 | // STCC |
22436 | OPCODE(0x5CF9) |
22437 | { |
22438 | u32 adr, res; |
22439 | u32 src, dst; |
22440 | |
22441 | FETCH_LONG(adr); |
22442 | if (!((flag_N ^ flag_V) & 0x80)) |
22443 | { |
22444 | res = 0xFF; |
22445 | PRE_IO |
22446 | WRITE_BYTE_F(adr, res) |
22447 | POST_IO |
22448 | RET(20) |
22449 | } |
22450 | res = 0; |
22451 | PRE_IO |
22452 | WRITE_BYTE_F(adr, res) |
22453 | POST_IO |
22454 | RET(20) |
22455 | } |
22456 | |
22457 | // STCC |
22458 | OPCODE(0x5DF9) |
22459 | { |
22460 | u32 adr, res; |
22461 | u32 src, dst; |
22462 | |
22463 | FETCH_LONG(adr); |
22464 | if ((flag_N ^ flag_V) & 0x80) |
22465 | { |
22466 | res = 0xFF; |
22467 | PRE_IO |
22468 | WRITE_BYTE_F(adr, res) |
22469 | POST_IO |
22470 | RET(20) |
22471 | } |
22472 | res = 0; |
22473 | PRE_IO |
22474 | WRITE_BYTE_F(adr, res) |
22475 | POST_IO |
22476 | RET(20) |
22477 | } |
22478 | |
22479 | // STCC |
22480 | OPCODE(0x5EF9) |
22481 | { |
22482 | u32 adr, res; |
22483 | u32 src, dst; |
22484 | |
22485 | FETCH_LONG(adr); |
22486 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22487 | { |
22488 | res = 0xFF; |
22489 | PRE_IO |
22490 | WRITE_BYTE_F(adr, res) |
22491 | POST_IO |
22492 | RET(20) |
22493 | } |
22494 | res = 0; |
22495 | PRE_IO |
22496 | WRITE_BYTE_F(adr, res) |
22497 | POST_IO |
22498 | RET(20) |
22499 | } |
22500 | |
22501 | // STCC |
22502 | OPCODE(0x5FF9) |
22503 | { |
22504 | u32 adr, res; |
22505 | u32 src, dst; |
22506 | |
22507 | FETCH_LONG(adr); |
22508 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22509 | { |
22510 | res = 0xFF; |
22511 | PRE_IO |
22512 | WRITE_BYTE_F(adr, res) |
22513 | POST_IO |
22514 | RET(20) |
22515 | } |
22516 | res = 0; |
22517 | PRE_IO |
22518 | WRITE_BYTE_F(adr, res) |
22519 | POST_IO |
22520 | RET(20) |
22521 | } |
22522 | |
22523 | // STCC |
22524 | OPCODE(0x50DF) |
22525 | { |
22526 | u32 adr, res; |
22527 | u32 src, dst; |
22528 | |
22529 | adr = AREG(7); |
22530 | AREG(7) += 2; |
22531 | res = 0xFF; |
22532 | PRE_IO |
22533 | WRITE_BYTE_F(adr, res) |
22534 | POST_IO |
22535 | RET(12) |
22536 | } |
22537 | |
22538 | // STCC |
22539 | OPCODE(0x51DF) |
22540 | { |
22541 | u32 adr, res; |
22542 | u32 src, dst; |
22543 | |
22544 | adr = AREG(7); |
22545 | AREG(7) += 2; |
22546 | res = 0; |
22547 | PRE_IO |
22548 | WRITE_BYTE_F(adr, res) |
22549 | POST_IO |
22550 | RET(12) |
22551 | } |
22552 | |
22553 | // STCC |
22554 | OPCODE(0x52DF) |
22555 | { |
22556 | u32 adr, res; |
22557 | u32 src, dst; |
22558 | |
22559 | adr = AREG(7); |
22560 | AREG(7) += 2; |
22561 | if (flag_NotZ && (!(flag_C & 0x100))) |
22562 | { |
22563 | res = 0xFF; |
22564 | PRE_IO |
22565 | WRITE_BYTE_F(adr, res) |
22566 | POST_IO |
22567 | RET(12) |
22568 | } |
22569 | res = 0; |
22570 | PRE_IO |
22571 | WRITE_BYTE_F(adr, res) |
22572 | POST_IO |
22573 | RET(12) |
22574 | } |
22575 | |
22576 | // STCC |
22577 | OPCODE(0x53DF) |
22578 | { |
22579 | u32 adr, res; |
22580 | u32 src, dst; |
22581 | |
22582 | adr = AREG(7); |
22583 | AREG(7) += 2; |
22584 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22585 | { |
22586 | res = 0xFF; |
22587 | PRE_IO |
22588 | WRITE_BYTE_F(adr, res) |
22589 | POST_IO |
22590 | RET(12) |
22591 | } |
22592 | res = 0; |
22593 | PRE_IO |
22594 | WRITE_BYTE_F(adr, res) |
22595 | POST_IO |
22596 | RET(12) |
22597 | } |
22598 | |
22599 | // STCC |
22600 | OPCODE(0x54DF) |
22601 | { |
22602 | u32 adr, res; |
22603 | u32 src, dst; |
22604 | |
22605 | adr = AREG(7); |
22606 | AREG(7) += 2; |
22607 | if (!(flag_C & 0x100)) |
22608 | { |
22609 | res = 0xFF; |
22610 | PRE_IO |
22611 | WRITE_BYTE_F(adr, res) |
22612 | POST_IO |
22613 | RET(12) |
22614 | } |
22615 | res = 0; |
22616 | PRE_IO |
22617 | WRITE_BYTE_F(adr, res) |
22618 | POST_IO |
22619 | RET(12) |
22620 | } |
22621 | |
22622 | // STCC |
22623 | OPCODE(0x55DF) |
22624 | { |
22625 | u32 adr, res; |
22626 | u32 src, dst; |
22627 | |
22628 | adr = AREG(7); |
22629 | AREG(7) += 2; |
22630 | if (flag_C & 0x100) |
22631 | { |
22632 | res = 0xFF; |
22633 | PRE_IO |
22634 | WRITE_BYTE_F(adr, res) |
22635 | POST_IO |
22636 | RET(12) |
22637 | } |
22638 | res = 0; |
22639 | PRE_IO |
22640 | WRITE_BYTE_F(adr, res) |
22641 | POST_IO |
22642 | RET(12) |
22643 | } |
22644 | |
22645 | // STCC |
22646 | OPCODE(0x56DF) |
22647 | { |
22648 | u32 adr, res; |
22649 | u32 src, dst; |
22650 | |
22651 | adr = AREG(7); |
22652 | AREG(7) += 2; |
22653 | if (flag_NotZ) |
22654 | { |
22655 | res = 0xFF; |
22656 | PRE_IO |
22657 | WRITE_BYTE_F(adr, res) |
22658 | POST_IO |
22659 | RET(12) |
22660 | } |
22661 | res = 0; |
22662 | PRE_IO |
22663 | WRITE_BYTE_F(adr, res) |
22664 | POST_IO |
22665 | RET(12) |
22666 | } |
22667 | |
22668 | // STCC |
22669 | OPCODE(0x57DF) |
22670 | { |
22671 | u32 adr, res; |
22672 | u32 src, dst; |
22673 | |
22674 | adr = AREG(7); |
22675 | AREG(7) += 2; |
22676 | if (!flag_NotZ) |
22677 | { |
22678 | res = 0xFF; |
22679 | PRE_IO |
22680 | WRITE_BYTE_F(adr, res) |
22681 | POST_IO |
22682 | RET(12) |
22683 | } |
22684 | res = 0; |
22685 | PRE_IO |
22686 | WRITE_BYTE_F(adr, res) |
22687 | POST_IO |
22688 | RET(12) |
22689 | } |
22690 | |
22691 | // STCC |
22692 | OPCODE(0x58DF) |
22693 | { |
22694 | u32 adr, res; |
22695 | u32 src, dst; |
22696 | |
22697 | adr = AREG(7); |
22698 | AREG(7) += 2; |
22699 | if (!(flag_V & 0x80)) |
22700 | { |
22701 | res = 0xFF; |
22702 | PRE_IO |
22703 | WRITE_BYTE_F(adr, res) |
22704 | POST_IO |
22705 | RET(12) |
22706 | } |
22707 | res = 0; |
22708 | PRE_IO |
22709 | WRITE_BYTE_F(adr, res) |
22710 | POST_IO |
22711 | RET(12) |
22712 | } |
22713 | |
22714 | // STCC |
22715 | OPCODE(0x59DF) |
22716 | { |
22717 | u32 adr, res; |
22718 | u32 src, dst; |
22719 | |
22720 | adr = AREG(7); |
22721 | AREG(7) += 2; |
22722 | if (flag_V & 0x80) |
22723 | { |
22724 | res = 0xFF; |
22725 | PRE_IO |
22726 | WRITE_BYTE_F(adr, res) |
22727 | POST_IO |
22728 | RET(12) |
22729 | } |
22730 | res = 0; |
22731 | PRE_IO |
22732 | WRITE_BYTE_F(adr, res) |
22733 | POST_IO |
22734 | RET(12) |
22735 | } |
22736 | |
22737 | // STCC |
22738 | OPCODE(0x5ADF) |
22739 | { |
22740 | u32 adr, res; |
22741 | u32 src, dst; |
22742 | |
22743 | adr = AREG(7); |
22744 | AREG(7) += 2; |
22745 | if (!(flag_N & 0x80)) |
22746 | { |
22747 | res = 0xFF; |
22748 | PRE_IO |
22749 | WRITE_BYTE_F(adr, res) |
22750 | POST_IO |
22751 | RET(12) |
22752 | } |
22753 | res = 0; |
22754 | PRE_IO |
22755 | WRITE_BYTE_F(adr, res) |
22756 | POST_IO |
22757 | RET(12) |
22758 | } |
22759 | |
22760 | // STCC |
22761 | OPCODE(0x5BDF) |
22762 | { |
22763 | u32 adr, res; |
22764 | u32 src, dst; |
22765 | |
22766 | adr = AREG(7); |
22767 | AREG(7) += 2; |
22768 | if (flag_N & 0x80) |
22769 | { |
22770 | res = 0xFF; |
22771 | PRE_IO |
22772 | WRITE_BYTE_F(adr, res) |
22773 | POST_IO |
22774 | RET(12) |
22775 | } |
22776 | res = 0; |
22777 | PRE_IO |
22778 | WRITE_BYTE_F(adr, res) |
22779 | POST_IO |
22780 | RET(12) |
22781 | } |
22782 | |
22783 | // STCC |
22784 | OPCODE(0x5CDF) |
22785 | { |
22786 | u32 adr, res; |
22787 | u32 src, dst; |
22788 | |
22789 | adr = AREG(7); |
22790 | AREG(7) += 2; |
22791 | if (!((flag_N ^ flag_V) & 0x80)) |
22792 | { |
22793 | res = 0xFF; |
22794 | PRE_IO |
22795 | WRITE_BYTE_F(adr, res) |
22796 | POST_IO |
22797 | RET(12) |
22798 | } |
22799 | res = 0; |
22800 | PRE_IO |
22801 | WRITE_BYTE_F(adr, res) |
22802 | POST_IO |
22803 | RET(12) |
22804 | } |
22805 | |
22806 | // STCC |
22807 | OPCODE(0x5DDF) |
22808 | { |
22809 | u32 adr, res; |
22810 | u32 src, dst; |
22811 | |
22812 | adr = AREG(7); |
22813 | AREG(7) += 2; |
22814 | if ((flag_N ^ flag_V) & 0x80) |
22815 | { |
22816 | res = 0xFF; |
22817 | PRE_IO |
22818 | WRITE_BYTE_F(adr, res) |
22819 | POST_IO |
22820 | RET(12) |
22821 | } |
22822 | res = 0; |
22823 | PRE_IO |
22824 | WRITE_BYTE_F(adr, res) |
22825 | POST_IO |
22826 | RET(12) |
22827 | } |
22828 | |
22829 | // STCC |
22830 | OPCODE(0x5EDF) |
22831 | { |
22832 | u32 adr, res; |
22833 | u32 src, dst; |
22834 | |
22835 | adr = AREG(7); |
22836 | AREG(7) += 2; |
22837 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22838 | { |
22839 | res = 0xFF; |
22840 | PRE_IO |
22841 | WRITE_BYTE_F(adr, res) |
22842 | POST_IO |
22843 | RET(12) |
22844 | } |
22845 | res = 0; |
22846 | PRE_IO |
22847 | WRITE_BYTE_F(adr, res) |
22848 | POST_IO |
22849 | RET(12) |
22850 | } |
22851 | |
22852 | // STCC |
22853 | OPCODE(0x5FDF) |
22854 | { |
22855 | u32 adr, res; |
22856 | u32 src, dst; |
22857 | |
22858 | adr = AREG(7); |
22859 | AREG(7) += 2; |
22860 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22861 | { |
22862 | res = 0xFF; |
22863 | PRE_IO |
22864 | WRITE_BYTE_F(adr, res) |
22865 | POST_IO |
22866 | RET(12) |
22867 | } |
22868 | res = 0; |
22869 | PRE_IO |
22870 | WRITE_BYTE_F(adr, res) |
22871 | POST_IO |
22872 | RET(12) |
22873 | } |
22874 | |
22875 | // STCC |
22876 | OPCODE(0x50E7) |
22877 | { |
22878 | u32 adr, res; |
22879 | u32 src, dst; |
22880 | |
22881 | adr = AREG(7) - 2; |
22882 | AREG(7) = adr; |
22883 | res = 0xFF; |
22884 | PRE_IO |
22885 | WRITE_BYTE_F(adr, res) |
22886 | POST_IO |
22887 | RET(14) |
22888 | } |
22889 | |
22890 | // STCC |
22891 | OPCODE(0x51E7) |
22892 | { |
22893 | u32 adr, res; |
22894 | u32 src, dst; |
22895 | |
22896 | adr = AREG(7) - 2; |
22897 | AREG(7) = adr; |
22898 | res = 0; |
22899 | PRE_IO |
22900 | WRITE_BYTE_F(adr, res) |
22901 | POST_IO |
22902 | RET(14) |
22903 | } |
22904 | |
22905 | // STCC |
22906 | OPCODE(0x52E7) |
22907 | { |
22908 | u32 adr, res; |
22909 | u32 src, dst; |
22910 | |
22911 | adr = AREG(7) - 2; |
22912 | AREG(7) = adr; |
22913 | if (flag_NotZ && (!(flag_C & 0x100))) |
22914 | { |
22915 | res = 0xFF; |
22916 | PRE_IO |
22917 | WRITE_BYTE_F(adr, res) |
22918 | POST_IO |
22919 | RET(14) |
22920 | } |
22921 | res = 0; |
22922 | PRE_IO |
22923 | WRITE_BYTE_F(adr, res) |
22924 | POST_IO |
22925 | RET(14) |
22926 | } |
22927 | |
22928 | // STCC |
22929 | OPCODE(0x53E7) |
22930 | { |
22931 | u32 adr, res; |
22932 | u32 src, dst; |
22933 | |
22934 | adr = AREG(7) - 2; |
22935 | AREG(7) = adr; |
22936 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22937 | { |
22938 | res = 0xFF; |
22939 | PRE_IO |
22940 | WRITE_BYTE_F(adr, res) |
22941 | POST_IO |
22942 | RET(14) |
22943 | } |
22944 | res = 0; |
22945 | PRE_IO |
22946 | WRITE_BYTE_F(adr, res) |
22947 | POST_IO |
22948 | RET(14) |
22949 | } |
22950 | |
22951 | // STCC |
22952 | OPCODE(0x54E7) |
22953 | { |
22954 | u32 adr, res; |
22955 | u32 src, dst; |
22956 | |
22957 | adr = AREG(7) - 2; |
22958 | AREG(7) = adr; |
22959 | if (!(flag_C & 0x100)) |
22960 | { |
22961 | res = 0xFF; |
22962 | PRE_IO |
22963 | WRITE_BYTE_F(adr, res) |
22964 | POST_IO |
22965 | RET(14) |
22966 | } |
22967 | res = 0; |
22968 | PRE_IO |
22969 | WRITE_BYTE_F(adr, res) |
22970 | POST_IO |
22971 | RET(14) |
22972 | } |
22973 | |
22974 | // STCC |
22975 | OPCODE(0x55E7) |
22976 | { |
22977 | u32 adr, res; |
22978 | u32 src, dst; |
22979 | |
22980 | adr = AREG(7) - 2; |
22981 | AREG(7) = adr; |
22982 | if (flag_C & 0x100) |
22983 | { |
22984 | res = 0xFF; |
22985 | PRE_IO |
22986 | WRITE_BYTE_F(adr, res) |
22987 | POST_IO |
22988 | RET(14) |
22989 | } |
22990 | res = 0; |
22991 | PRE_IO |
22992 | WRITE_BYTE_F(adr, res) |
22993 | POST_IO |
22994 | RET(14) |
22995 | } |
22996 | |
22997 | // STCC |
22998 | OPCODE(0x56E7) |
22999 | { |
23000 | u32 adr, res; |
23001 | u32 src, dst; |
23002 | |
23003 | adr = AREG(7) - 2; |
23004 | AREG(7) = adr; |
23005 | if (flag_NotZ) |
23006 | { |
23007 | res = 0xFF; |
23008 | PRE_IO |
23009 | WRITE_BYTE_F(adr, res) |
23010 | POST_IO |
23011 | RET(14) |
23012 | } |
23013 | res = 0; |
23014 | PRE_IO |
23015 | WRITE_BYTE_F(adr, res) |
23016 | POST_IO |
23017 | RET(14) |
23018 | } |
23019 | |
23020 | // STCC |
23021 | OPCODE(0x57E7) |
23022 | { |
23023 | u32 adr, res; |
23024 | u32 src, dst; |
23025 | |
23026 | adr = AREG(7) - 2; |
23027 | AREG(7) = adr; |
23028 | if (!flag_NotZ) |
23029 | { |
23030 | res = 0xFF; |
23031 | PRE_IO |
23032 | WRITE_BYTE_F(adr, res) |
23033 | POST_IO |
23034 | RET(14) |
23035 | } |
23036 | res = 0; |
23037 | PRE_IO |
23038 | WRITE_BYTE_F(adr, res) |
23039 | POST_IO |
23040 | RET(14) |
23041 | } |
23042 | |
23043 | // STCC |
23044 | OPCODE(0x58E7) |
23045 | { |
23046 | u32 adr, res; |
23047 | u32 src, dst; |
23048 | |
23049 | adr = AREG(7) - 2; |
23050 | AREG(7) = adr; |
23051 | if (!(flag_V & 0x80)) |
23052 | { |
23053 | res = 0xFF; |
23054 | PRE_IO |
23055 | WRITE_BYTE_F(adr, res) |
23056 | POST_IO |
23057 | RET(14) |
23058 | } |
23059 | res = 0; |
23060 | PRE_IO |
23061 | WRITE_BYTE_F(adr, res) |
23062 | POST_IO |
23063 | RET(14) |
23064 | } |
23065 | |
23066 | // STCC |
23067 | OPCODE(0x59E7) |
23068 | { |
23069 | u32 adr, res; |
23070 | u32 src, dst; |
23071 | |
23072 | adr = AREG(7) - 2; |
23073 | AREG(7) = adr; |
23074 | if (flag_V & 0x80) |
23075 | { |
23076 | res = 0xFF; |
23077 | PRE_IO |
23078 | WRITE_BYTE_F(adr, res) |
23079 | POST_IO |
23080 | RET(14) |
23081 | } |
23082 | res = 0; |
23083 | PRE_IO |
23084 | WRITE_BYTE_F(adr, res) |
23085 | POST_IO |
23086 | RET(14) |
23087 | } |
23088 | |
23089 | // STCC |
23090 | OPCODE(0x5AE7) |
23091 | { |
23092 | u32 adr, res; |
23093 | u32 src, dst; |
23094 | |
23095 | adr = AREG(7) - 2; |
23096 | AREG(7) = adr; |
23097 | if (!(flag_N & 0x80)) |
23098 | { |
23099 | res = 0xFF; |
23100 | PRE_IO |
23101 | WRITE_BYTE_F(adr, res) |
23102 | POST_IO |
23103 | RET(14) |
23104 | } |
23105 | res = 0; |
23106 | PRE_IO |
23107 | WRITE_BYTE_F(adr, res) |
23108 | POST_IO |
23109 | RET(14) |
23110 | } |
23111 | |
23112 | // STCC |
23113 | OPCODE(0x5BE7) |
23114 | { |
23115 | u32 adr, res; |
23116 | u32 src, dst; |
23117 | |
23118 | adr = AREG(7) - 2; |
23119 | AREG(7) = adr; |
23120 | if (flag_N & 0x80) |
23121 | { |
23122 | res = 0xFF; |
23123 | PRE_IO |
23124 | WRITE_BYTE_F(adr, res) |
23125 | POST_IO |
23126 | RET(14) |
23127 | } |
23128 | res = 0; |
23129 | PRE_IO |
23130 | WRITE_BYTE_F(adr, res) |
23131 | POST_IO |
23132 | RET(14) |
23133 | } |
23134 | |
23135 | // STCC |
23136 | OPCODE(0x5CE7) |
23137 | { |
23138 | u32 adr, res; |
23139 | u32 src, dst; |
23140 | |
23141 | adr = AREG(7) - 2; |
23142 | AREG(7) = adr; |
23143 | if (!((flag_N ^ flag_V) & 0x80)) |
23144 | { |
23145 | res = 0xFF; |
23146 | PRE_IO |
23147 | WRITE_BYTE_F(adr, res) |
23148 | POST_IO |
23149 | RET(14) |
23150 | } |
23151 | res = 0; |
23152 | PRE_IO |
23153 | WRITE_BYTE_F(adr, res) |
23154 | POST_IO |
23155 | RET(14) |
23156 | } |
23157 | |
23158 | // STCC |
23159 | OPCODE(0x5DE7) |
23160 | { |
23161 | u32 adr, res; |
23162 | u32 src, dst; |
23163 | |
23164 | adr = AREG(7) - 2; |
23165 | AREG(7) = adr; |
23166 | if ((flag_N ^ flag_V) & 0x80) |
23167 | { |
23168 | res = 0xFF; |
23169 | PRE_IO |
23170 | WRITE_BYTE_F(adr, res) |
23171 | POST_IO |
23172 | RET(14) |
23173 | } |
23174 | res = 0; |
23175 | PRE_IO |
23176 | WRITE_BYTE_F(adr, res) |
23177 | POST_IO |
23178 | RET(14) |
23179 | } |
23180 | |
23181 | // STCC |
23182 | OPCODE(0x5EE7) |
23183 | { |
23184 | u32 adr, res; |
23185 | u32 src, dst; |
23186 | |
23187 | adr = AREG(7) - 2; |
23188 | AREG(7) = adr; |
23189 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23190 | { |
23191 | res = 0xFF; |
23192 | PRE_IO |
23193 | WRITE_BYTE_F(adr, res) |
23194 | POST_IO |
23195 | RET(14) |
23196 | } |
23197 | res = 0; |
23198 | PRE_IO |
23199 | WRITE_BYTE_F(adr, res) |
23200 | POST_IO |
23201 | RET(14) |
23202 | } |
23203 | |
23204 | // STCC |
23205 | OPCODE(0x5FE7) |
23206 | { |
23207 | u32 adr, res; |
23208 | u32 src, dst; |
23209 | |
23210 | adr = AREG(7) - 2; |
23211 | AREG(7) = adr; |
23212 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23213 | { |
23214 | res = 0xFF; |
23215 | PRE_IO |
23216 | WRITE_BYTE_F(adr, res) |
23217 | POST_IO |
23218 | RET(14) |
23219 | } |
23220 | res = 0; |
23221 | PRE_IO |
23222 | WRITE_BYTE_F(adr, res) |
23223 | POST_IO |
23224 | RET(14) |
23225 | } |
23226 | |
23227 | // DBCC |
23228 | OPCODE(0x50C8) |
23229 | { |
23230 | u32 adr, res; |
23231 | u32 src, dst; |
23232 | |
23233 | PC++; |
23234 | RET(12) |
23235 | } |
23236 | |
23237 | // DBCC |
23238 | OPCODE(0x51C8) |
23239 | { |
23240 | u32 adr, res; |
23241 | u32 src, dst; |
23242 | |
23243 | res = DREGu16((Opcode >> 0) & 7); |
23244 | res--; |
23245 | DREGu16((Opcode >> 0) & 7) = res; |
23246 | if ((s32)res != -1) |
23247 | { |
23248 | u32 newPC; |
23249 | |
23250 | newPC = (u32)(PC) - BasePC; |
23251 | newPC += GET_SWORD; |
23252 | SET_PC(newPC); |
23253 | CHECK_BRANCH_EXCEPTION(newPC) |
23254 | RET(10) |
23255 | } |
23256 | PC++; |
23257 | RET(14) |
23258 | } |
23259 | |
23260 | // DBCC |
23261 | OPCODE(0x52C8) |
23262 | { |
23263 | u32 adr, res; |
23264 | u32 src, dst; |
23265 | |
23266 | if ((!flag_NotZ) || (flag_C & 0x100)) |
23267 | { |
23268 | res = DREGu16((Opcode >> 0) & 7); |
23269 | res--; |
23270 | DREGu16((Opcode >> 0) & 7) = res; |
23271 | if ((s32)res != -1) |
23272 | { |
23273 | u32 newPC; |
23274 | |
23275 | newPC = (u32)(PC) - BasePC; |
23276 | newPC += GET_SWORD; |
23277 | SET_PC(newPC); |
23278 | CHECK_BRANCH_EXCEPTION(newPC) |
23279 | RET(10) |
23280 | } |
23281 | } |
23282 | else |
23283 | { |
23284 | PC++; |
23285 | RET(12) |
23286 | } |
23287 | PC++; |
23288 | RET(14) |
23289 | } |
23290 | |
23291 | // DBCC |
23292 | OPCODE(0x53C8) |
23293 | { |
23294 | u32 adr, res; |
23295 | u32 src, dst; |
23296 | |
23297 | if (flag_NotZ && (!(flag_C & 0x100))) |
23298 | { |
23299 | res = DREGu16((Opcode >> 0) & 7); |
23300 | res--; |
23301 | DREGu16((Opcode >> 0) & 7) = res; |
23302 | if ((s32)res != -1) |
23303 | { |
23304 | u32 newPC; |
23305 | |
23306 | newPC = (u32)(PC) - BasePC; |
23307 | newPC += GET_SWORD; |
23308 | SET_PC(newPC); |
23309 | CHECK_BRANCH_EXCEPTION(newPC) |
23310 | RET(10) |
23311 | } |
23312 | } |
23313 | else |
23314 | { |
23315 | PC++; |
23316 | RET(12) |
23317 | } |
23318 | PC++; |
23319 | RET(14) |
23320 | } |
23321 | |
23322 | // DBCC |
23323 | OPCODE(0x54C8) |
23324 | { |
23325 | u32 adr, res; |
23326 | u32 src, dst; |
23327 | |
23328 | if (flag_C & 0x100) |
23329 | { |
23330 | res = DREGu16((Opcode >> 0) & 7); |
23331 | res--; |
23332 | DREGu16((Opcode >> 0) & 7) = res; |
23333 | if ((s32)res != -1) |
23334 | { |
23335 | u32 newPC; |
23336 | |
23337 | newPC = (u32)(PC) - BasePC; |
23338 | newPC += GET_SWORD; |
23339 | SET_PC(newPC); |
23340 | CHECK_BRANCH_EXCEPTION(newPC) |
23341 | RET(10) |
23342 | } |
23343 | } |
23344 | else |
23345 | { |
23346 | PC++; |
23347 | RET(12) |
23348 | } |
23349 | PC++; |
23350 | RET(14) |
23351 | } |
23352 | |
23353 | // DBCC |
23354 | OPCODE(0x55C8) |
23355 | { |
23356 | u32 adr, res; |
23357 | u32 src, dst; |
23358 | |
23359 | if (!(flag_C & 0x100)) |
23360 | { |
23361 | res = DREGu16((Opcode >> 0) & 7); |
23362 | res--; |
23363 | DREGu16((Opcode >> 0) & 7) = res; |
23364 | if ((s32)res != -1) |
23365 | { |
23366 | u32 newPC; |
23367 | |
23368 | newPC = (u32)(PC) - BasePC; |
23369 | newPC += GET_SWORD; |
23370 | SET_PC(newPC); |
23371 | CHECK_BRANCH_EXCEPTION(newPC) |
23372 | RET(10) |
23373 | } |
23374 | } |
23375 | else |
23376 | { |
23377 | PC++; |
23378 | RET(12) |
23379 | } |
23380 | PC++; |
23381 | RET(14) |
23382 | } |
23383 | |
23384 | // DBCC |
23385 | OPCODE(0x56C8) |
23386 | { |
23387 | u32 adr, res; |
23388 | u32 src, dst; |
23389 | |
23390 | if (!flag_NotZ) |
23391 | { |
23392 | res = DREGu16((Opcode >> 0) & 7); |
23393 | res--; |
23394 | DREGu16((Opcode >> 0) & 7) = res; |
23395 | if ((s32)res != -1) |
23396 | { |
23397 | u32 newPC; |
23398 | |
23399 | newPC = (u32)(PC) - BasePC; |
23400 | newPC += GET_SWORD; |
23401 | SET_PC(newPC); |
23402 | CHECK_BRANCH_EXCEPTION(newPC) |
23403 | RET(10) |
23404 | } |
23405 | } |
23406 | else |
23407 | { |
23408 | PC++; |
23409 | RET(12) |
23410 | } |
23411 | PC++; |
23412 | RET(14) |
23413 | } |
23414 | |
23415 | // DBCC |
23416 | OPCODE(0x57C8) |
23417 | { |
23418 | u32 adr, res; |
23419 | u32 src, dst; |
23420 | |
23421 | if (flag_NotZ) |
23422 | { |
23423 | res = DREGu16((Opcode >> 0) & 7); |
23424 | res--; |
23425 | DREGu16((Opcode >> 0) & 7) = res; |
23426 | if ((s32)res != -1) |
23427 | { |
23428 | u32 newPC; |
23429 | |
23430 | newPC = (u32)(PC) - BasePC; |
23431 | newPC += GET_SWORD; |
23432 | SET_PC(newPC); |
23433 | CHECK_BRANCH_EXCEPTION(newPC) |
23434 | RET(10) |
23435 | } |
23436 | } |
23437 | else |
23438 | { |
23439 | PC++; |
23440 | RET(12) |
23441 | } |
23442 | PC++; |
23443 | RET(14) |
23444 | } |
23445 | |
23446 | // DBCC |
23447 | OPCODE(0x58C8) |
23448 | { |
23449 | u32 adr, res; |
23450 | u32 src, dst; |
23451 | |
23452 | if (flag_V & 0x80) |
23453 | { |
23454 | res = DREGu16((Opcode >> 0) & 7); |
23455 | res--; |
23456 | DREGu16((Opcode >> 0) & 7) = res; |
23457 | if ((s32)res != -1) |
23458 | { |
23459 | u32 newPC; |
23460 | |
23461 | newPC = (u32)(PC) - BasePC; |
23462 | newPC += GET_SWORD; |
23463 | SET_PC(newPC); |
23464 | CHECK_BRANCH_EXCEPTION(newPC) |
23465 | RET(10) |
23466 | } |
23467 | } |
23468 | else |
23469 | { |
23470 | PC++; |
23471 | RET(12) |
23472 | } |
23473 | PC++; |
23474 | RET(14) |
23475 | } |
23476 | |
23477 | // DBCC |
23478 | OPCODE(0x59C8) |
23479 | { |
23480 | u32 adr, res; |
23481 | u32 src, dst; |
23482 | |
23483 | if (!(flag_V & 0x80)) |
23484 | { |
23485 | res = DREGu16((Opcode >> 0) & 7); |
23486 | res--; |
23487 | DREGu16((Opcode >> 0) & 7) = res; |
23488 | if ((s32)res != -1) |
23489 | { |
23490 | u32 newPC; |
23491 | |
23492 | newPC = (u32)(PC) - BasePC; |
23493 | newPC += GET_SWORD; |
23494 | SET_PC(newPC); |
23495 | CHECK_BRANCH_EXCEPTION(newPC) |
23496 | RET(10) |
23497 | } |
23498 | } |
23499 | else |
23500 | { |
23501 | PC++; |
23502 | RET(12) |
23503 | } |
23504 | PC++; |
23505 | RET(14) |
23506 | } |
23507 | |
23508 | // DBCC |
23509 | OPCODE(0x5AC8) |
23510 | { |
23511 | u32 adr, res; |
23512 | u32 src, dst; |
23513 | |
23514 | if (flag_N & 0x80) |
23515 | { |
23516 | res = DREGu16((Opcode >> 0) & 7); |
23517 | res--; |
23518 | DREGu16((Opcode >> 0) & 7) = res; |
23519 | if ((s32)res != -1) |
23520 | { |
23521 | u32 newPC; |
23522 | |
23523 | newPC = (u32)(PC) - BasePC; |
23524 | newPC += GET_SWORD; |
23525 | SET_PC(newPC); |
23526 | CHECK_BRANCH_EXCEPTION(newPC) |
23527 | RET(10) |
23528 | } |
23529 | } |
23530 | else |
23531 | { |
23532 | PC++; |
23533 | RET(12) |
23534 | } |
23535 | PC++; |
23536 | RET(14) |
23537 | } |
23538 | |
23539 | // DBCC |
23540 | OPCODE(0x5BC8) |
23541 | { |
23542 | u32 adr, res; |
23543 | u32 src, dst; |
23544 | |
23545 | if (!(flag_N & 0x80)) |
23546 | { |
23547 | res = DREGu16((Opcode >> 0) & 7); |
23548 | res--; |
23549 | DREGu16((Opcode >> 0) & 7) = res; |
23550 | if ((s32)res != -1) |
23551 | { |
23552 | u32 newPC; |
23553 | |
23554 | newPC = (u32)(PC) - BasePC; |
23555 | newPC += GET_SWORD; |
23556 | SET_PC(newPC); |
23557 | CHECK_BRANCH_EXCEPTION(newPC) |
23558 | RET(10) |
23559 | } |
23560 | } |
23561 | else |
23562 | { |
23563 | PC++; |
23564 | RET(12) |
23565 | } |
23566 | PC++; |
23567 | RET(14) |
23568 | } |
23569 | |
23570 | // DBCC |
23571 | OPCODE(0x5CC8) |
23572 | { |
23573 | u32 adr, res; |
23574 | u32 src, dst; |
23575 | |
23576 | if ((flag_N ^ flag_V) & 0x80) |
23577 | { |
23578 | res = DREGu16((Opcode >> 0) & 7); |
23579 | res--; |
23580 | DREGu16((Opcode >> 0) & 7) = res; |
23581 | if ((s32)res != -1) |
23582 | { |
23583 | u32 newPC; |
23584 | |
23585 | newPC = (u32)(PC) - BasePC; |
23586 | newPC += GET_SWORD; |
23587 | SET_PC(newPC); |
23588 | CHECK_BRANCH_EXCEPTION(newPC) |
23589 | RET(10) |
23590 | } |
23591 | } |
23592 | else |
23593 | { |
23594 | PC++; |
23595 | RET(12) |
23596 | } |
23597 | PC++; |
23598 | RET(14) |
23599 | } |
23600 | |
23601 | // DBCC |
23602 | OPCODE(0x5DC8) |
23603 | { |
23604 | u32 adr, res; |
23605 | u32 src, dst; |
23606 | |
23607 | if (!((flag_N ^ flag_V) & 0x80)) |
23608 | { |
23609 | res = DREGu16((Opcode >> 0) & 7); |
23610 | res--; |
23611 | DREGu16((Opcode >> 0) & 7) = res; |
23612 | if ((s32)res != -1) |
23613 | { |
23614 | u32 newPC; |
23615 | |
23616 | newPC = (u32)(PC) - BasePC; |
23617 | newPC += GET_SWORD; |
23618 | SET_PC(newPC); |
23619 | CHECK_BRANCH_EXCEPTION(newPC) |
23620 | RET(10) |
23621 | } |
23622 | } |
23623 | else |
23624 | { |
23625 | PC++; |
23626 | RET(12) |
23627 | } |
23628 | PC++; |
23629 | RET(14) |
23630 | } |
23631 | |
23632 | // DBCC |
23633 | OPCODE(0x5EC8) |
23634 | { |
23635 | u32 adr, res; |
23636 | u32 src, dst; |
23637 | |
23638 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23639 | { |
23640 | res = DREGu16((Opcode >> 0) & 7); |
23641 | res--; |
23642 | DREGu16((Opcode >> 0) & 7) = res; |
23643 | if ((s32)res != -1) |
23644 | { |
23645 | u32 newPC; |
23646 | |
23647 | newPC = (u32)(PC) - BasePC; |
23648 | newPC += GET_SWORD; |
23649 | SET_PC(newPC); |
23650 | CHECK_BRANCH_EXCEPTION(newPC) |
23651 | RET(10) |
23652 | } |
23653 | } |
23654 | else |
23655 | { |
23656 | PC++; |
23657 | RET(12) |
23658 | } |
23659 | PC++; |
23660 | RET(14) |
23661 | } |
23662 | |
23663 | // DBCC |
23664 | OPCODE(0x5FC8) |
23665 | { |
23666 | u32 adr, res; |
23667 | u32 src, dst; |
23668 | |
23669 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23670 | { |
23671 | res = DREGu16((Opcode >> 0) & 7); |
23672 | res--; |
23673 | DREGu16((Opcode >> 0) & 7) = res; |
23674 | if ((s32)res != -1) |
23675 | { |
23676 | u32 newPC; |
23677 | |
23678 | newPC = (u32)(PC) - BasePC; |
23679 | newPC += GET_SWORD; |
23680 | SET_PC(newPC); |
23681 | CHECK_BRANCH_EXCEPTION(newPC) |
23682 | RET(10) |
23683 | } |
23684 | } |
23685 | else |
23686 | { |
23687 | PC++; |
23688 | RET(12) |
23689 | } |
23690 | PC++; |
23691 | RET(14) |
23692 | } |
23693 | |
23694 | // ADDQ |
23695 | OPCODE(0x5000) |
23696 | { |
23697 | u32 adr, res; |
23698 | u32 src, dst; |
23699 | |
23700 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23701 | dst = DREGu8((Opcode >> 0) & 7); |
23702 | res = dst + src; |
23703 | flag_N = flag_X = flag_C = res; |
23704 | flag_V = (src ^ res) & (dst ^ res); |
23705 | flag_NotZ = res & 0xFF; |
23706 | DREGu8((Opcode >> 0) & 7) = res; |
23707 | RET(4) |
23708 | } |
23709 | |
23710 | // ADDQ |
23711 | OPCODE(0x5010) |
23712 | { |
23713 | u32 adr, res; |
23714 | u32 src, dst; |
23715 | |
23716 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23717 | adr = AREG((Opcode >> 0) & 7); |
23718 | PRE_IO |
23719 | READ_BYTE_F(adr, dst) |
23720 | res = dst + src; |
23721 | flag_N = flag_X = flag_C = res; |
23722 | flag_V = (src ^ res) & (dst ^ res); |
23723 | flag_NotZ = res & 0xFF; |
23724 | WRITE_BYTE_F(adr, res) |
23725 | POST_IO |
23726 | RET(12) |
23727 | } |
23728 | |
23729 | // ADDQ |
23730 | OPCODE(0x5018) |
23731 | { |
23732 | u32 adr, res; |
23733 | u32 src, dst; |
23734 | |
23735 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23736 | adr = AREG((Opcode >> 0) & 7); |
23737 | AREG((Opcode >> 0) & 7) += 1; |
23738 | PRE_IO |
23739 | READ_BYTE_F(adr, dst) |
23740 | res = dst + src; |
23741 | flag_N = flag_X = flag_C = res; |
23742 | flag_V = (src ^ res) & (dst ^ res); |
23743 | flag_NotZ = res & 0xFF; |
23744 | WRITE_BYTE_F(adr, res) |
23745 | POST_IO |
23746 | RET(12) |
23747 | } |
23748 | |
23749 | // ADDQ |
23750 | OPCODE(0x5020) |
23751 | { |
23752 | u32 adr, res; |
23753 | u32 src, dst; |
23754 | |
23755 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23756 | adr = AREG((Opcode >> 0) & 7) - 1; |
23757 | AREG((Opcode >> 0) & 7) = adr; |
23758 | PRE_IO |
23759 | READ_BYTE_F(adr, dst) |
23760 | res = dst + src; |
23761 | flag_N = flag_X = flag_C = res; |
23762 | flag_V = (src ^ res) & (dst ^ res); |
23763 | flag_NotZ = res & 0xFF; |
23764 | WRITE_BYTE_F(adr, res) |
23765 | POST_IO |
23766 | RET(14) |
23767 | } |
23768 | |
23769 | // ADDQ |
23770 | OPCODE(0x5028) |
23771 | { |
23772 | u32 adr, res; |
23773 | u32 src, dst; |
23774 | |
23775 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23776 | FETCH_SWORD(adr); |
23777 | adr += AREG((Opcode >> 0) & 7); |
23778 | PRE_IO |
23779 | READ_BYTE_F(adr, dst) |
23780 | res = dst + src; |
23781 | flag_N = flag_X = flag_C = res; |
23782 | flag_V = (src ^ res) & (dst ^ res); |
23783 | flag_NotZ = res & 0xFF; |
23784 | WRITE_BYTE_F(adr, res) |
23785 | POST_IO |
23786 | RET(16) |
23787 | } |
23788 | |
23789 | // ADDQ |
23790 | OPCODE(0x5030) |
23791 | { |
23792 | u32 adr, res; |
23793 | u32 src, dst; |
23794 | |
23795 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23796 | adr = AREG((Opcode >> 0) & 7); |
23797 | DECODE_EXT_WORD |
23798 | PRE_IO |
23799 | READ_BYTE_F(adr, dst) |
23800 | res = dst + src; |
23801 | flag_N = flag_X = flag_C = res; |
23802 | flag_V = (src ^ res) & (dst ^ res); |
23803 | flag_NotZ = res & 0xFF; |
23804 | WRITE_BYTE_F(adr, res) |
23805 | POST_IO |
23806 | RET(18) |
23807 | } |
23808 | |
23809 | // ADDQ |
23810 | OPCODE(0x5038) |
23811 | { |
23812 | u32 adr, res; |
23813 | u32 src, dst; |
23814 | |
23815 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23816 | FETCH_SWORD(adr); |
23817 | PRE_IO |
23818 | READ_BYTE_F(adr, dst) |
23819 | res = dst + src; |
23820 | flag_N = flag_X = flag_C = res; |
23821 | flag_V = (src ^ res) & (dst ^ res); |
23822 | flag_NotZ = res & 0xFF; |
23823 | WRITE_BYTE_F(adr, res) |
23824 | POST_IO |
23825 | RET(16) |
23826 | } |
23827 | |
23828 | // ADDQ |
23829 | OPCODE(0x5039) |
23830 | { |
23831 | u32 adr, res; |
23832 | u32 src, dst; |
23833 | |
23834 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23835 | FETCH_LONG(adr); |
23836 | PRE_IO |
23837 | READ_BYTE_F(adr, dst) |
23838 | res = dst + src; |
23839 | flag_N = flag_X = flag_C = res; |
23840 | flag_V = (src ^ res) & (dst ^ res); |
23841 | flag_NotZ = res & 0xFF; |
23842 | WRITE_BYTE_F(adr, res) |
23843 | POST_IO |
23844 | RET(20) |
23845 | } |
23846 | |
23847 | // ADDQ |
23848 | OPCODE(0x501F) |
23849 | { |
23850 | u32 adr, res; |
23851 | u32 src, dst; |
23852 | |
23853 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23854 | adr = AREG(7); |
23855 | AREG(7) += 2; |
23856 | PRE_IO |
23857 | READ_BYTE_F(adr, dst) |
23858 | res = dst + src; |
23859 | flag_N = flag_X = flag_C = res; |
23860 | flag_V = (src ^ res) & (dst ^ res); |
23861 | flag_NotZ = res & 0xFF; |
23862 | WRITE_BYTE_F(adr, res) |
23863 | POST_IO |
23864 | RET(12) |
23865 | } |
23866 | |
23867 | // ADDQ |
23868 | OPCODE(0x5027) |
23869 | { |
23870 | u32 adr, res; |
23871 | u32 src, dst; |
23872 | |
23873 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23874 | adr = AREG(7) - 2; |
23875 | AREG(7) = adr; |
23876 | PRE_IO |
23877 | READ_BYTE_F(adr, dst) |
23878 | res = dst + src; |
23879 | flag_N = flag_X = flag_C = res; |
23880 | flag_V = (src ^ res) & (dst ^ res); |
23881 | flag_NotZ = res & 0xFF; |
23882 | WRITE_BYTE_F(adr, res) |
23883 | POST_IO |
23884 | RET(14) |
23885 | } |
23886 | |
23887 | // ADDQ |
23888 | OPCODE(0x5040) |
23889 | { |
23890 | u32 adr, res; |
23891 | u32 src, dst; |
23892 | |
23893 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23894 | dst = DREGu16((Opcode >> 0) & 7); |
23895 | res = dst + src; |
23896 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23897 | flag_N = flag_X = flag_C = res >> 8; |
23898 | flag_NotZ = res & 0xFFFF; |
23899 | DREGu16((Opcode >> 0) & 7) = res; |
23900 | RET(4) |
23901 | } |
23902 | |
23903 | // ADDQ |
23904 | OPCODE(0x5048) |
23905 | { |
23906 | u32 adr, res; |
23907 | u32 src, dst; |
23908 | |
23909 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23910 | dst = AREGu32((Opcode >> 0) & 7); |
23911 | res = dst + src; |
23912 | AREG((Opcode >> 0) & 7) = res; |
03e4f2a3 |
23913 | #ifdef USE_CYCLONE_TIMING |
70357ce5 |
23914 | RET(4) |
23915 | #else |
23916 | RET(8) |
23917 | #endif |
23918 | } |
23919 | |
23920 | // ADDQ |
23921 | OPCODE(0x5050) |
23922 | { |
23923 | u32 adr, res; |
23924 | u32 src, dst; |
23925 | |
23926 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23927 | adr = AREG((Opcode >> 0) & 7); |
23928 | PRE_IO |
23929 | READ_WORD_F(adr, dst) |
23930 | res = dst + src; |
23931 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23932 | flag_N = flag_X = flag_C = res >> 8; |
23933 | flag_NotZ = res & 0xFFFF; |
23934 | WRITE_WORD_F(adr, res) |
23935 | POST_IO |
23936 | RET(12) |
23937 | } |
23938 | |
23939 | // ADDQ |
23940 | OPCODE(0x5058) |
23941 | { |
23942 | u32 adr, res; |
23943 | u32 src, dst; |
23944 | |
23945 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23946 | adr = AREG((Opcode >> 0) & 7); |
23947 | AREG((Opcode >> 0) & 7) += 2; |
23948 | PRE_IO |
23949 | READ_WORD_F(adr, dst) |
23950 | res = dst + src; |
23951 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23952 | flag_N = flag_X = flag_C = res >> 8; |
23953 | flag_NotZ = res & 0xFFFF; |
23954 | WRITE_WORD_F(adr, res) |
23955 | POST_IO |
23956 | RET(12) |
23957 | } |
23958 | |
23959 | // ADDQ |
23960 | OPCODE(0x5060) |
23961 | { |
23962 | u32 adr, res; |
23963 | u32 src, dst; |
23964 | |
23965 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23966 | adr = AREG((Opcode >> 0) & 7) - 2; |
23967 | AREG((Opcode >> 0) & 7) = adr; |
23968 | PRE_IO |
23969 | READ_WORD_F(adr, dst) |
23970 | res = dst + src; |
23971 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23972 | flag_N = flag_X = flag_C = res >> 8; |
23973 | flag_NotZ = res & 0xFFFF; |
23974 | WRITE_WORD_F(adr, res) |
23975 | POST_IO |
23976 | RET(14) |
23977 | } |
23978 | |
23979 | // ADDQ |
23980 | OPCODE(0x5068) |
23981 | { |
23982 | u32 adr, res; |
23983 | u32 src, dst; |
23984 | |
23985 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23986 | FETCH_SWORD(adr); |
23987 | adr += AREG((Opcode >> 0) & 7); |
23988 | PRE_IO |
23989 | READ_WORD_F(adr, dst) |
23990 | res = dst + src; |
23991 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23992 | flag_N = flag_X = flag_C = res >> 8; |
23993 | flag_NotZ = res & 0xFFFF; |
23994 | WRITE_WORD_F(adr, res) |
23995 | POST_IO |
23996 | RET(16) |
23997 | } |
23998 | |
23999 | // ADDQ |
24000 | OPCODE(0x5070) |
24001 | { |
24002 | u32 adr, res; |
24003 | u32 src, dst; |
24004 | |
24005 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24006 | adr = AREG((Opcode >> 0) & 7); |
24007 | DECODE_EXT_WORD |
24008 | PRE_IO |
24009 | READ_WORD_F(adr, dst) |
24010 | res = dst + src; |
24011 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24012 | flag_N = flag_X = flag_C = res >> 8; |
24013 | flag_NotZ = res & 0xFFFF; |
24014 | WRITE_WORD_F(adr, res) |
24015 | POST_IO |
24016 | RET(18) |
24017 | } |
24018 | |
24019 | // ADDQ |
24020 | OPCODE(0x5078) |
24021 | { |
24022 | u32 adr, res; |
24023 | u32 src, dst; |
24024 | |
24025 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24026 | FETCH_SWORD(adr); |
24027 | PRE_IO |
24028 | READ_WORD_F(adr, dst) |
24029 | res = dst + src; |
24030 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24031 | flag_N = flag_X = flag_C = res >> 8; |
24032 | flag_NotZ = res & 0xFFFF; |
24033 | WRITE_WORD_F(adr, res) |
24034 | POST_IO |
24035 | RET(16) |
24036 | } |
24037 | |
24038 | // ADDQ |
24039 | OPCODE(0x5079) |
24040 | { |
24041 | u32 adr, res; |
24042 | u32 src, dst; |
24043 | |
24044 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24045 | FETCH_LONG(adr); |
24046 | PRE_IO |
24047 | READ_WORD_F(adr, dst) |
24048 | res = dst + src; |
24049 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24050 | flag_N = flag_X = flag_C = res >> 8; |
24051 | flag_NotZ = res & 0xFFFF; |
24052 | WRITE_WORD_F(adr, res) |
24053 | POST_IO |
24054 | RET(20) |
24055 | } |
24056 | |
24057 | // ADDQ |
24058 | OPCODE(0x505F) |
24059 | { |
24060 | u32 adr, res; |
24061 | u32 src, dst; |
24062 | |
24063 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24064 | adr = AREG(7); |
24065 | AREG(7) += 2; |
24066 | PRE_IO |
24067 | READ_WORD_F(adr, dst) |
24068 | res = dst + src; |
24069 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24070 | flag_N = flag_X = flag_C = res >> 8; |
24071 | flag_NotZ = res & 0xFFFF; |
24072 | WRITE_WORD_F(adr, res) |
24073 | POST_IO |
24074 | RET(12) |
24075 | } |
24076 | |
24077 | // ADDQ |
24078 | OPCODE(0x5067) |
24079 | { |
24080 | u32 adr, res; |
24081 | u32 src, dst; |
24082 | |
24083 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24084 | adr = AREG(7) - 2; |
24085 | AREG(7) = adr; |
24086 | PRE_IO |
24087 | READ_WORD_F(adr, dst) |
24088 | res = dst + src; |
24089 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24090 | flag_N = flag_X = flag_C = res >> 8; |
24091 | flag_NotZ = res & 0xFFFF; |
24092 | WRITE_WORD_F(adr, res) |
24093 | POST_IO |
24094 | RET(14) |
24095 | } |
24096 | |
24097 | // ADDQ |
24098 | OPCODE(0x5080) |
24099 | { |
24100 | u32 adr, res; |
24101 | u32 src, dst; |
24102 | |
24103 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24104 | dst = DREGu32((Opcode >> 0) & 7); |
24105 | res = dst + src; |
24106 | flag_NotZ = res; |
24107 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24108 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24109 | flag_N = res >> 24; |
24110 | DREGu32((Opcode >> 0) & 7) = res; |
24111 | RET(8) |
24112 | } |
24113 | |
24114 | // ADDQ |
24115 | OPCODE(0x5088) |
24116 | { |
24117 | u32 adr, res; |
24118 | u32 src, dst; |
24119 | |
24120 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24121 | dst = AREGu32((Opcode >> 0) & 7); |
24122 | res = dst + src; |
24123 | AREG((Opcode >> 0) & 7) = res; |
24124 | RET(8) |
24125 | } |
24126 | |
24127 | // ADDQ |
24128 | OPCODE(0x5090) |
24129 | { |
24130 | u32 adr, res; |
24131 | u32 src, dst; |
24132 | |
24133 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24134 | adr = AREG((Opcode >> 0) & 7); |
24135 | PRE_IO |
24136 | READ_LONG_F(adr, dst) |
24137 | res = dst + src; |
24138 | flag_NotZ = res; |
24139 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24140 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24141 | flag_N = res >> 24; |
24142 | WRITE_LONG_F(adr, res) |
24143 | POST_IO |
24144 | RET(20) |
24145 | } |
24146 | |
24147 | // ADDQ |
24148 | OPCODE(0x5098) |
24149 | { |
24150 | u32 adr, res; |
24151 | u32 src, dst; |
24152 | |
24153 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24154 | adr = AREG((Opcode >> 0) & 7); |
24155 | AREG((Opcode >> 0) & 7) += 4; |
24156 | PRE_IO |
24157 | READ_LONG_F(adr, dst) |
24158 | res = dst + src; |
24159 | flag_NotZ = res; |
24160 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24161 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24162 | flag_N = res >> 24; |
24163 | WRITE_LONG_F(adr, res) |
24164 | POST_IO |
24165 | RET(20) |
24166 | } |
24167 | |
24168 | // ADDQ |
24169 | OPCODE(0x50A0) |
24170 | { |
24171 | u32 adr, res; |
24172 | u32 src, dst; |
24173 | |
24174 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24175 | adr = AREG((Opcode >> 0) & 7) - 4; |
24176 | AREG((Opcode >> 0) & 7) = adr; |
24177 | PRE_IO |
24178 | READ_LONG_F(adr, dst) |
24179 | res = dst + src; |
24180 | flag_NotZ = res; |
24181 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24182 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24183 | flag_N = res >> 24; |
24184 | WRITE_LONG_F(adr, res) |
24185 | POST_IO |
24186 | RET(22) |
24187 | } |
24188 | |
24189 | // ADDQ |
24190 | OPCODE(0x50A8) |
24191 | { |
24192 | u32 adr, res; |
24193 | u32 src, dst; |
24194 | |
24195 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24196 | FETCH_SWORD(adr); |
24197 | adr += AREG((Opcode >> 0) & 7); |
24198 | PRE_IO |
24199 | READ_LONG_F(adr, dst) |
24200 | res = dst + src; |
24201 | flag_NotZ = res; |
24202 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24203 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24204 | flag_N = res >> 24; |
24205 | WRITE_LONG_F(adr, res) |
24206 | POST_IO |
24207 | RET(24) |
24208 | } |
24209 | |
24210 | // ADDQ |
24211 | OPCODE(0x50B0) |
24212 | { |
24213 | u32 adr, res; |
24214 | u32 src, dst; |
24215 | |
24216 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24217 | adr = AREG((Opcode >> 0) & 7); |
24218 | DECODE_EXT_WORD |
24219 | PRE_IO |
24220 | READ_LONG_F(adr, dst) |
24221 | res = dst + src; |
24222 | flag_NotZ = res; |
24223 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24224 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24225 | flag_N = res >> 24; |
24226 | WRITE_LONG_F(adr, res) |
24227 | POST_IO |
24228 | RET(26) |
24229 | } |
24230 | |
24231 | // ADDQ |
24232 | OPCODE(0x50B8) |
24233 | { |
24234 | u32 adr, res; |
24235 | u32 src, dst; |
24236 | |
24237 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24238 | FETCH_SWORD(adr); |
24239 | PRE_IO |
24240 | READ_LONG_F(adr, dst) |
24241 | res = dst + src; |
24242 | flag_NotZ = res; |
24243 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24244 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24245 | flag_N = res >> 24; |
24246 | WRITE_LONG_F(adr, res) |
24247 | POST_IO |
24248 | RET(24) |
24249 | } |
24250 | |
24251 | // ADDQ |
24252 | OPCODE(0x50B9) |
24253 | { |
24254 | u32 adr, res; |
24255 | u32 src, dst; |
24256 | |
24257 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24258 | FETCH_LONG(adr); |
24259 | PRE_IO |
24260 | READ_LONG_F(adr, dst) |
24261 | res = dst + src; |
24262 | flag_NotZ = res; |
24263 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24264 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24265 | flag_N = res >> 24; |
24266 | WRITE_LONG_F(adr, res) |
24267 | POST_IO |
24268 | RET(28) |
24269 | } |
24270 | |
24271 | // ADDQ |
24272 | OPCODE(0x509F) |
24273 | { |
24274 | u32 adr, res; |
24275 | u32 src, dst; |
24276 | |
24277 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24278 | adr = AREG(7); |
24279 | AREG(7) += 4; |
24280 | PRE_IO |
24281 | READ_LONG_F(adr, dst) |
24282 | res = dst + src; |
24283 | flag_NotZ = res; |
24284 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24285 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24286 | flag_N = res >> 24; |
24287 | WRITE_LONG_F(adr, res) |
24288 | POST_IO |
24289 | RET(20) |
24290 | } |
24291 | |
24292 | // ADDQ |
24293 | OPCODE(0x50A7) |
24294 | { |
24295 | u32 adr, res; |
24296 | u32 src, dst; |
24297 | |
24298 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24299 | adr = AREG(7) - 4; |
24300 | AREG(7) = adr; |
24301 | PRE_IO |
24302 | READ_LONG_F(adr, dst) |
24303 | res = dst + src; |
24304 | flag_NotZ = res; |
24305 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24306 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24307 | flag_N = res >> 24; |
24308 | WRITE_LONG_F(adr, res) |
24309 | POST_IO |
24310 | RET(22) |
24311 | } |
24312 | |
24313 | // SUBQ |
24314 | OPCODE(0x5100) |
24315 | { |
24316 | u32 adr, res; |
24317 | u32 src, dst; |
24318 | |
24319 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24320 | dst = DREGu8((Opcode >> 0) & 7); |
24321 | res = dst - src; |
24322 | flag_N = flag_X = flag_C = res; |
24323 | flag_V = (src ^ dst) & (res ^ dst); |
24324 | flag_NotZ = res & 0xFF; |
24325 | DREGu8((Opcode >> 0) & 7) = res; |
24326 | RET(4) |
24327 | } |
24328 | |
24329 | // SUBQ |
24330 | OPCODE(0x5110) |
24331 | { |
24332 | u32 adr, res; |
24333 | u32 src, dst; |
24334 | |
24335 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24336 | adr = AREG((Opcode >> 0) & 7); |
24337 | PRE_IO |
24338 | READ_BYTE_F(adr, dst) |
24339 | res = dst - src; |
24340 | flag_N = flag_X = flag_C = res; |
24341 | flag_V = (src ^ dst) & (res ^ dst); |
24342 | flag_NotZ = res & 0xFF; |
24343 | WRITE_BYTE_F(adr, res) |
24344 | POST_IO |
24345 | RET(12) |
24346 | } |
24347 | |
24348 | // SUBQ |
24349 | OPCODE(0x5118) |
24350 | { |
24351 | u32 adr, res; |
24352 | u32 src, dst; |
24353 | |
24354 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24355 | adr = AREG((Opcode >> 0) & 7); |
24356 | AREG((Opcode >> 0) & 7) += 1; |
24357 | PRE_IO |
24358 | READ_BYTE_F(adr, dst) |
24359 | res = dst - src; |
24360 | flag_N = flag_X = flag_C = res; |
24361 | flag_V = (src ^ dst) & (res ^ dst); |
24362 | flag_NotZ = res & 0xFF; |
24363 | WRITE_BYTE_F(adr, res) |
24364 | POST_IO |
24365 | RET(12) |
24366 | } |
24367 | |
24368 | // SUBQ |
24369 | OPCODE(0x5120) |
24370 | { |
24371 | u32 adr, res; |
24372 | u32 src, dst; |
24373 | |
24374 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24375 | adr = AREG((Opcode >> 0) & 7) - 1; |
24376 | AREG((Opcode >> 0) & 7) = adr; |
24377 | PRE_IO |
24378 | READ_BYTE_F(adr, dst) |
24379 | res = dst - src; |
24380 | flag_N = flag_X = flag_C = res; |
24381 | flag_V = (src ^ dst) & (res ^ dst); |
24382 | flag_NotZ = res & 0xFF; |
24383 | WRITE_BYTE_F(adr, res) |
24384 | POST_IO |
24385 | RET(14) |
24386 | } |
24387 | |
24388 | // SUBQ |
24389 | OPCODE(0x5128) |
24390 | { |
24391 | u32 adr, res; |
24392 | u32 src, dst; |
24393 | |
24394 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24395 | FETCH_SWORD(adr); |
24396 | adr += AREG((Opcode >> 0) & 7); |
24397 | PRE_IO |
24398 | READ_BYTE_F(adr, dst) |
24399 | res = dst - src; |
24400 | flag_N = flag_X = flag_C = res; |
24401 | flag_V = (src ^ dst) & (res ^ dst); |
24402 | flag_NotZ = res & 0xFF; |
24403 | WRITE_BYTE_F(adr, res) |
24404 | POST_IO |
24405 | RET(16) |
24406 | } |
24407 | |
24408 | // SUBQ |
24409 | OPCODE(0x5130) |
24410 | { |
24411 | u32 adr, res; |
24412 | u32 src, dst; |
24413 | |
24414 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24415 | adr = AREG((Opcode >> 0) & 7); |
24416 | DECODE_EXT_WORD |
24417 | PRE_IO |
24418 | READ_BYTE_F(adr, dst) |
24419 | res = dst - src; |
24420 | flag_N = flag_X = flag_C = res; |
24421 | flag_V = (src ^ dst) & (res ^ dst); |
24422 | flag_NotZ = res & 0xFF; |
24423 | WRITE_BYTE_F(adr, res) |
24424 | POST_IO |
24425 | RET(18) |
24426 | } |
24427 | |
24428 | // SUBQ |
24429 | OPCODE(0x5138) |
24430 | { |
24431 | u32 adr, res; |
24432 | u32 src, dst; |
24433 | |
24434 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24435 | FETCH_SWORD(adr); |
24436 | PRE_IO |
24437 | READ_BYTE_F(adr, dst) |
24438 | res = dst - src; |
24439 | flag_N = flag_X = flag_C = res; |
24440 | flag_V = (src ^ dst) & (res ^ dst); |
24441 | flag_NotZ = res & 0xFF; |
24442 | WRITE_BYTE_F(adr, res) |
24443 | POST_IO |
24444 | RET(16) |
24445 | } |
24446 | |
24447 | // SUBQ |
24448 | OPCODE(0x5139) |
24449 | { |
24450 | u32 adr, res; |
24451 | u32 src, dst; |
24452 | |
24453 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24454 | FETCH_LONG(adr); |
24455 | PRE_IO |
24456 | READ_BYTE_F(adr, dst) |
24457 | res = dst - src; |
24458 | flag_N = flag_X = flag_C = res; |
24459 | flag_V = (src ^ dst) & (res ^ dst); |
24460 | flag_NotZ = res & 0xFF; |
24461 | WRITE_BYTE_F(adr, res) |
24462 | POST_IO |
24463 | RET(20) |
24464 | } |
24465 | |
24466 | // SUBQ |
24467 | OPCODE(0x511F) |
24468 | { |
24469 | u32 adr, res; |
24470 | u32 src, dst; |
24471 | |
24472 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24473 | adr = AREG(7); |
24474 | AREG(7) += 2; |
24475 | PRE_IO |
24476 | READ_BYTE_F(adr, dst) |
24477 | res = dst - src; |
24478 | flag_N = flag_X = flag_C = res; |
24479 | flag_V = (src ^ dst) & (res ^ dst); |
24480 | flag_NotZ = res & 0xFF; |
24481 | WRITE_BYTE_F(adr, res) |
24482 | POST_IO |
24483 | RET(12) |
24484 | } |
24485 | |
24486 | // SUBQ |
24487 | OPCODE(0x5127) |
24488 | { |
24489 | u32 adr, res; |
24490 | u32 src, dst; |
24491 | |
24492 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24493 | adr = AREG(7) - 2; |
24494 | AREG(7) = adr; |
24495 | PRE_IO |
24496 | READ_BYTE_F(adr, dst) |
24497 | res = dst - src; |
24498 | flag_N = flag_X = flag_C = res; |
24499 | flag_V = (src ^ dst) & (res ^ dst); |
24500 | flag_NotZ = res & 0xFF; |
24501 | WRITE_BYTE_F(adr, res) |
24502 | POST_IO |
24503 | RET(14) |
24504 | } |
24505 | |
24506 | // SUBQ |
24507 | OPCODE(0x5140) |
24508 | { |
24509 | u32 adr, res; |
24510 | u32 src, dst; |
24511 | |
24512 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24513 | dst = DREGu16((Opcode >> 0) & 7); |
24514 | res = dst - src; |
24515 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24516 | flag_N = flag_X = flag_C = res >> 8; |
24517 | flag_NotZ = res & 0xFFFF; |
24518 | DREGu16((Opcode >> 0) & 7) = res; |
24519 | RET(4) |
24520 | } |
24521 | |
24522 | // SUBQ |
24523 | OPCODE(0x5148) |
24524 | { |
24525 | u32 adr, res; |
24526 | u32 src, dst; |
24527 | |
24528 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24529 | dst = AREGu32((Opcode >> 0) & 7); |
24530 | res = dst - src; |
24531 | AREG((Opcode >> 0) & 7) = res; |
24532 | RET(8) |
24533 | } |
24534 | |
24535 | // SUBQ |
24536 | OPCODE(0x5150) |
24537 | { |
24538 | u32 adr, res; |
24539 | u32 src, dst; |
24540 | |
24541 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24542 | adr = AREG((Opcode >> 0) & 7); |
24543 | PRE_IO |
24544 | READ_WORD_F(adr, dst) |
24545 | res = dst - src; |
24546 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24547 | flag_N = flag_X = flag_C = res >> 8; |
24548 | flag_NotZ = res & 0xFFFF; |
24549 | WRITE_WORD_F(adr, res) |
24550 | POST_IO |
24551 | RET(12) |
24552 | } |
24553 | |
24554 | // SUBQ |
24555 | OPCODE(0x5158) |
24556 | { |
24557 | u32 adr, res; |
24558 | u32 src, dst; |
24559 | |
24560 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24561 | adr = AREG((Opcode >> 0) & 7); |
24562 | AREG((Opcode >> 0) & 7) += 2; |
24563 | PRE_IO |
24564 | READ_WORD_F(adr, dst) |
24565 | res = dst - src; |
24566 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24567 | flag_N = flag_X = flag_C = res >> 8; |
24568 | flag_NotZ = res & 0xFFFF; |
24569 | WRITE_WORD_F(adr, res) |
24570 | POST_IO |
24571 | RET(12) |
24572 | } |
24573 | |
24574 | // SUBQ |
24575 | OPCODE(0x5160) |
24576 | { |
24577 | u32 adr, res; |
24578 | u32 src, dst; |
24579 | |
24580 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24581 | adr = AREG((Opcode >> 0) & 7) - 2; |
24582 | AREG((Opcode >> 0) & 7) = adr; |
24583 | PRE_IO |
24584 | READ_WORD_F(adr, dst) |
24585 | res = dst - src; |
24586 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24587 | flag_N = flag_X = flag_C = res >> 8; |
24588 | flag_NotZ = res & 0xFFFF; |
24589 | WRITE_WORD_F(adr, res) |
24590 | POST_IO |
24591 | RET(14) |
24592 | } |
24593 | |
24594 | // SUBQ |
24595 | OPCODE(0x5168) |
24596 | { |
24597 | u32 adr, res; |
24598 | u32 src, dst; |
24599 | |
24600 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24601 | FETCH_SWORD(adr); |
24602 | adr += AREG((Opcode >> 0) & 7); |
24603 | PRE_IO |
24604 | READ_WORD_F(adr, dst) |
24605 | res = dst - src; |
24606 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24607 | flag_N = flag_X = flag_C = res >> 8; |
24608 | flag_NotZ = res & 0xFFFF; |
24609 | WRITE_WORD_F(adr, res) |
24610 | POST_IO |
24611 | RET(16) |
24612 | } |
24613 | |
24614 | // SUBQ |
24615 | OPCODE(0x5170) |
24616 | { |
24617 | u32 adr, res; |
24618 | u32 src, dst; |
24619 | |
24620 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24621 | adr = AREG((Opcode >> 0) & 7); |
24622 | DECODE_EXT_WORD |
24623 | PRE_IO |
24624 | READ_WORD_F(adr, dst) |
24625 | res = dst - src; |
24626 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24627 | flag_N = flag_X = flag_C = res >> 8; |
24628 | flag_NotZ = res & 0xFFFF; |
24629 | WRITE_WORD_F(adr, res) |
24630 | POST_IO |
24631 | RET(18) |
24632 | } |
24633 | |
24634 | // SUBQ |
24635 | OPCODE(0x5178) |
24636 | { |
24637 | u32 adr, res; |
24638 | u32 src, dst; |
24639 | |
24640 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24641 | FETCH_SWORD(adr); |
24642 | PRE_IO |
24643 | READ_WORD_F(adr, dst) |
24644 | res = dst - src; |
24645 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24646 | flag_N = flag_X = flag_C = res >> 8; |
24647 | flag_NotZ = res & 0xFFFF; |
24648 | WRITE_WORD_F(adr, res) |
24649 | POST_IO |
24650 | RET(16) |
24651 | } |
24652 | |
24653 | // SUBQ |
24654 | OPCODE(0x5179) |
24655 | { |
24656 | u32 adr, res; |
24657 | u32 src, dst; |
24658 | |
24659 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24660 | FETCH_LONG(adr); |
24661 | PRE_IO |
24662 | READ_WORD_F(adr, dst) |
24663 | res = dst - src; |
24664 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24665 | flag_N = flag_X = flag_C = res >> 8; |
24666 | flag_NotZ = res & 0xFFFF; |
24667 | WRITE_WORD_F(adr, res) |
24668 | POST_IO |
24669 | RET(20) |
24670 | } |
24671 | |
24672 | // SUBQ |
24673 | OPCODE(0x515F) |
24674 | { |
24675 | u32 adr, res; |
24676 | u32 src, dst; |
24677 | |
24678 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24679 | adr = AREG(7); |
24680 | AREG(7) += 2; |
24681 | PRE_IO |
24682 | READ_WORD_F(adr, dst) |
24683 | res = dst - src; |
24684 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24685 | flag_N = flag_X = flag_C = res >> 8; |
24686 | flag_NotZ = res & 0xFFFF; |
24687 | WRITE_WORD_F(adr, res) |
24688 | POST_IO |
24689 | RET(12) |
24690 | } |
24691 | |
24692 | // SUBQ |
24693 | OPCODE(0x5167) |
24694 | { |
24695 | u32 adr, res; |
24696 | u32 src, dst; |
24697 | |
24698 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24699 | adr = AREG(7) - 2; |
24700 | AREG(7) = adr; |
24701 | PRE_IO |
24702 | READ_WORD_F(adr, dst) |
24703 | res = dst - src; |
24704 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24705 | flag_N = flag_X = flag_C = res >> 8; |
24706 | flag_NotZ = res & 0xFFFF; |
24707 | WRITE_WORD_F(adr, res) |
24708 | POST_IO |
24709 | RET(14) |
24710 | } |
24711 | |
24712 | // SUBQ |
24713 | OPCODE(0x5180) |
24714 | { |
24715 | u32 adr, res; |
24716 | u32 src, dst; |
24717 | |
24718 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24719 | dst = DREGu32((Opcode >> 0) & 7); |
24720 | res = dst - src; |
24721 | flag_NotZ = res; |
24722 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24723 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24724 | flag_N = res >> 24; |
24725 | DREGu32((Opcode >> 0) & 7) = res; |
24726 | RET(8) |
24727 | } |
24728 | |
24729 | // SUBQ |
24730 | OPCODE(0x5188) |
24731 | { |
24732 | u32 adr, res; |
24733 | u32 src, dst; |
24734 | |
24735 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24736 | dst = AREGu32((Opcode >> 0) & 7); |
24737 | res = dst - src; |
24738 | AREG((Opcode >> 0) & 7) = res; |
24739 | RET(8) |
24740 | } |
24741 | |
24742 | // SUBQ |
24743 | OPCODE(0x5190) |
24744 | { |
24745 | u32 adr, res; |
24746 | u32 src, dst; |
24747 | |
24748 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24749 | adr = AREG((Opcode >> 0) & 7); |
24750 | PRE_IO |
24751 | READ_LONG_F(adr, dst) |
24752 | res = dst - src; |
24753 | flag_NotZ = res; |
24754 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24755 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24756 | flag_N = res >> 24; |
24757 | WRITE_LONG_F(adr, res) |
24758 | POST_IO |
24759 | RET(20) |
24760 | } |
24761 | |
24762 | // SUBQ |
24763 | OPCODE(0x5198) |
24764 | { |
24765 | u32 adr, res; |
24766 | u32 src, dst; |
24767 | |
24768 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24769 | adr = AREG((Opcode >> 0) & 7); |
24770 | AREG((Opcode >> 0) & 7) += 4; |
24771 | PRE_IO |
24772 | READ_LONG_F(adr, dst) |
24773 | res = dst - src; |
24774 | flag_NotZ = res; |
24775 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24776 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24777 | flag_N = res >> 24; |
24778 | WRITE_LONG_F(adr, res) |
24779 | POST_IO |
24780 | RET(20) |
24781 | } |
24782 | |
24783 | // SUBQ |
24784 | OPCODE(0x51A0) |
24785 | { |
24786 | u32 adr, res; |
24787 | u32 src, dst; |
24788 | |
24789 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24790 | adr = AREG((Opcode >> 0) & 7) - 4; |
24791 | AREG((Opcode >> 0) & 7) = adr; |
24792 | PRE_IO |
24793 | READ_LONG_F(adr, dst) |
24794 | res = dst - src; |
24795 | flag_NotZ = res; |
24796 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24797 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24798 | flag_N = res >> 24; |
24799 | WRITE_LONG_F(adr, res) |
24800 | POST_IO |
24801 | RET(22) |
24802 | } |
24803 | |
24804 | // SUBQ |
24805 | OPCODE(0x51A8) |
24806 | { |
24807 | u32 adr, res; |
24808 | u32 src, dst; |
24809 | |
24810 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24811 | FETCH_SWORD(adr); |
24812 | adr += AREG((Opcode >> 0) & 7); |
24813 | PRE_IO |
24814 | READ_LONG_F(adr, dst) |
24815 | res = dst - src; |
24816 | flag_NotZ = res; |
24817 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24818 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24819 | flag_N = res >> 24; |
24820 | WRITE_LONG_F(adr, res) |
24821 | POST_IO |
24822 | RET(24) |
24823 | } |
24824 | |
24825 | // SUBQ |
24826 | OPCODE(0x51B0) |
24827 | { |
24828 | u32 adr, res; |
24829 | u32 src, dst; |
24830 | |
24831 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24832 | adr = AREG((Opcode >> 0) & 7); |
24833 | DECODE_EXT_WORD |
24834 | PRE_IO |
24835 | READ_LONG_F(adr, dst) |
24836 | res = dst - src; |
24837 | flag_NotZ = res; |
24838 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24839 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24840 | flag_N = res >> 24; |
24841 | WRITE_LONG_F(adr, res) |
24842 | POST_IO |
24843 | RET(26) |
24844 | } |
24845 | |
24846 | // SUBQ |
24847 | OPCODE(0x51B8) |
24848 | { |
24849 | u32 adr, res; |
24850 | u32 src, dst; |
24851 | |
24852 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24853 | FETCH_SWORD(adr); |
24854 | PRE_IO |
24855 | READ_LONG_F(adr, dst) |
24856 | res = dst - src; |
24857 | flag_NotZ = res; |
24858 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24859 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24860 | flag_N = res >> 24; |
24861 | WRITE_LONG_F(adr, res) |
24862 | POST_IO |
24863 | RET(24) |
24864 | } |
24865 | |
24866 | // SUBQ |
24867 | OPCODE(0x51B9) |
24868 | { |
24869 | u32 adr, res; |
24870 | u32 src, dst; |
24871 | |
24872 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24873 | FETCH_LONG(adr); |
24874 | PRE_IO |
24875 | READ_LONG_F(adr, dst) |
24876 | res = dst - src; |
24877 | flag_NotZ = res; |
24878 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24879 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24880 | flag_N = res >> 24; |
24881 | WRITE_LONG_F(adr, res) |
24882 | POST_IO |
24883 | RET(28) |
24884 | } |
24885 | |
24886 | // SUBQ |
24887 | OPCODE(0x519F) |
24888 | { |
24889 | u32 adr, res; |
24890 | u32 src, dst; |
24891 | |
24892 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24893 | adr = AREG(7); |
24894 | AREG(7) += 4; |
24895 | PRE_IO |
24896 | READ_LONG_F(adr, dst) |
24897 | res = dst - src; |
24898 | flag_NotZ = res; |
24899 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24900 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24901 | flag_N = res >> 24; |
24902 | WRITE_LONG_F(adr, res) |
24903 | POST_IO |
24904 | RET(20) |
24905 | } |
24906 | |
24907 | // SUBQ |
24908 | OPCODE(0x51A7) |
24909 | { |
24910 | u32 adr, res; |
24911 | u32 src, dst; |
24912 | |
24913 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24914 | adr = AREG(7) - 4; |
24915 | AREG(7) = adr; |
24916 | PRE_IO |
24917 | READ_LONG_F(adr, dst) |
24918 | res = dst - src; |
24919 | flag_NotZ = res; |
24920 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24921 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24922 | flag_N = res >> 24; |
24923 | WRITE_LONG_F(adr, res) |
24924 | POST_IO |
24925 | RET(22) |
24926 | } |
24927 | |
24928 | // BCC |
24929 | OPCODE(0x6201) |
24930 | { |
24931 | u32 adr, res; |
24932 | u32 src, dst; |
24933 | |
24934 | if (flag_NotZ && (!(flag_C & 0x100))) |
24935 | { |
24936 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24937 | m68kcontext.io_cycle_counter -= 2; |
24938 | } |
24939 | RET(8) |
24940 | } |
24941 | |
24942 | // BCC |
24943 | OPCODE(0x6301) |
24944 | { |
24945 | u32 adr, res; |
24946 | u32 src, dst; |
24947 | |
24948 | if ((!flag_NotZ) || (flag_C & 0x100)) |
24949 | { |
24950 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24951 | m68kcontext.io_cycle_counter -= 2; |
24952 | } |
24953 | RET(8) |
24954 | } |
24955 | |
24956 | // BCC |
24957 | OPCODE(0x6401) |
24958 | { |
24959 | u32 adr, res; |
24960 | u32 src, dst; |
24961 | |
24962 | if (!(flag_C & 0x100)) |
24963 | { |
24964 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24965 | m68kcontext.io_cycle_counter -= 2; |
24966 | } |
24967 | RET(8) |
24968 | } |
24969 | |
24970 | // BCC |
24971 | OPCODE(0x6501) |
24972 | { |
24973 | u32 adr, res; |
24974 | u32 src, dst; |
24975 | |
24976 | if (flag_C & 0x100) |
24977 | { |
24978 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24979 | m68kcontext.io_cycle_counter -= 2; |
24980 | } |
24981 | RET(8) |
24982 | } |
24983 | |
24984 | // BCC |
24985 | OPCODE(0x6601) |
24986 | { |
24987 | u32 adr, res; |
24988 | u32 src, dst; |
24989 | |
24990 | if (flag_NotZ) |
24991 | { |
24992 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24993 | m68kcontext.io_cycle_counter -= 2; |
24994 | } |
24995 | RET(8) |
24996 | } |
24997 | |
24998 | // BCC |
24999 | OPCODE(0x6701) |
25000 | { |
25001 | u32 adr, res; |
25002 | u32 src, dst; |
25003 | |
25004 | if (!flag_NotZ) |
25005 | { |
25006 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25007 | m68kcontext.io_cycle_counter -= 2; |
25008 | } |
25009 | RET(8) |
25010 | } |
25011 | |
25012 | // BCC |
25013 | OPCODE(0x6801) |
25014 | { |
25015 | u32 adr, res; |
25016 | u32 src, dst; |
25017 | |
25018 | if (!(flag_V & 0x80)) |
25019 | { |
25020 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25021 | m68kcontext.io_cycle_counter -= 2; |
25022 | } |
25023 | RET(8) |
25024 | } |
25025 | |
25026 | // BCC |
25027 | OPCODE(0x6901) |
25028 | { |
25029 | u32 adr, res; |
25030 | u32 src, dst; |
25031 | |
25032 | if (flag_V & 0x80) |
25033 | { |
25034 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25035 | m68kcontext.io_cycle_counter -= 2; |
25036 | } |
25037 | RET(8) |
25038 | } |
25039 | |
25040 | // BCC |
25041 | OPCODE(0x6A01) |
25042 | { |
25043 | u32 adr, res; |
25044 | u32 src, dst; |
25045 | |
25046 | if (!(flag_N & 0x80)) |
25047 | { |
25048 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25049 | m68kcontext.io_cycle_counter -= 2; |
25050 | } |
25051 | RET(8) |
25052 | } |
25053 | |
25054 | // BCC |
25055 | OPCODE(0x6B01) |
25056 | { |
25057 | u32 adr, res; |
25058 | u32 src, dst; |
25059 | |
25060 | if (flag_N & 0x80) |
25061 | { |
25062 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25063 | m68kcontext.io_cycle_counter -= 2; |
25064 | } |
25065 | RET(8) |
25066 | } |
25067 | |
25068 | // BCC |
25069 | OPCODE(0x6C01) |
25070 | { |
25071 | u32 adr, res; |
25072 | u32 src, dst; |
25073 | |
25074 | if (!((flag_N ^ flag_V) & 0x80)) |
25075 | { |
25076 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25077 | m68kcontext.io_cycle_counter -= 2; |
25078 | } |
25079 | RET(8) |
25080 | } |
25081 | |
25082 | // BCC |
25083 | OPCODE(0x6D01) |
25084 | { |
25085 | u32 adr, res; |
25086 | u32 src, dst; |
25087 | |
25088 | if ((flag_N ^ flag_V) & 0x80) |
25089 | { |
25090 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25091 | m68kcontext.io_cycle_counter -= 2; |
25092 | } |
25093 | RET(8) |
25094 | } |
25095 | |
25096 | // BCC |
25097 | OPCODE(0x6E01) |
25098 | { |
25099 | u32 adr, res; |
25100 | u32 src, dst; |
25101 | |
25102 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25103 | { |
25104 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25105 | m68kcontext.io_cycle_counter -= 2; |
25106 | } |
25107 | RET(8) |
25108 | } |
25109 | |
25110 | // BCC |
25111 | OPCODE(0x6F01) |
25112 | { |
25113 | u32 adr, res; |
25114 | u32 src, dst; |
25115 | |
25116 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25117 | { |
25118 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25119 | m68kcontext.io_cycle_counter -= 2; |
25120 | } |
25121 | RET(8) |
25122 | } |
25123 | |
25124 | // BCC16 |
25125 | OPCODE(0x6200) |
25126 | { |
25127 | u32 adr, res; |
25128 | u32 src, dst; |
25129 | |
25130 | if (flag_NotZ && (!(flag_C & 0x100))) |
25131 | { |
25132 | u32 newPC; |
25133 | |
25134 | newPC = (u32)(PC) - BasePC; |
25135 | newPC += GET_SWORD; |
25136 | SET_PC(newPC); |
25137 | CHECK_BRANCH_EXCEPTION(newPC) |
25138 | RET(10) |
25139 | } |
25140 | PC++; |
25141 | RET(12) |
25142 | } |
25143 | |
25144 | // BCC16 |
25145 | OPCODE(0x6300) |
25146 | { |
25147 | u32 adr, res; |
25148 | u32 src, dst; |
25149 | |
25150 | if ((!flag_NotZ) || (flag_C & 0x100)) |
25151 | { |
25152 | u32 newPC; |
25153 | |
25154 | newPC = (u32)(PC) - BasePC; |
25155 | newPC += GET_SWORD; |
25156 | SET_PC(newPC); |
25157 | CHECK_BRANCH_EXCEPTION(newPC) |
25158 | RET(10) |
25159 | } |
25160 | PC++; |
25161 | RET(12) |
25162 | } |
25163 | |
25164 | // BCC16 |
25165 | OPCODE(0x6400) |
25166 | { |
25167 | u32 adr, res; |
25168 | u32 src, dst; |
25169 | |
25170 | if (!(flag_C & 0x100)) |
25171 | { |
25172 | u32 newPC; |
25173 | |
25174 | newPC = (u32)(PC) - BasePC; |
25175 | newPC += GET_SWORD; |
25176 | SET_PC(newPC); |
25177 | CHECK_BRANCH_EXCEPTION(newPC) |
25178 | RET(10) |
25179 | } |
25180 | PC++; |
25181 | RET(12) |
25182 | } |
25183 | |
25184 | // BCC16 |
25185 | OPCODE(0x6500) |
25186 | { |
25187 | u32 adr, res; |
25188 | u32 src, dst; |
25189 | |
25190 | if (flag_C & 0x100) |
25191 | { |
25192 | u32 newPC; |
25193 | |
25194 | newPC = (u32)(PC) - BasePC; |
25195 | newPC += GET_SWORD; |
25196 | SET_PC(newPC); |
25197 | CHECK_BRANCH_EXCEPTION(newPC) |
25198 | RET(10) |
25199 | } |
25200 | PC++; |
25201 | RET(12) |
25202 | } |
25203 | |
25204 | // BCC16 |
25205 | OPCODE(0x6600) |
25206 | { |
25207 | u32 adr, res; |
25208 | u32 src, dst; |
25209 | |
25210 | if (flag_NotZ) |
25211 | { |
25212 | u32 newPC; |
25213 | |
25214 | newPC = (u32)(PC) - BasePC; |
25215 | newPC += GET_SWORD; |
25216 | SET_PC(newPC); |
25217 | CHECK_BRANCH_EXCEPTION(newPC) |
25218 | RET(10) |
25219 | } |
25220 | PC++; |
25221 | RET(12) |
25222 | } |
25223 | |
25224 | // BCC16 |
25225 | OPCODE(0x6700) |
25226 | { |
25227 | u32 adr, res; |
25228 | u32 src, dst; |
25229 | |
25230 | if (!flag_NotZ) |
25231 | { |
25232 | u32 newPC; |
25233 | |
25234 | newPC = (u32)(PC) - BasePC; |
25235 | newPC += GET_SWORD; |
25236 | SET_PC(newPC); |
25237 | CHECK_BRANCH_EXCEPTION(newPC) |
25238 | RET(10) |
25239 | } |
25240 | PC++; |
25241 | RET(12) |
25242 | } |
25243 | |
25244 | // BCC16 |
25245 | OPCODE(0x6800) |
25246 | { |
25247 | u32 adr, res; |
25248 | u32 src, dst; |
25249 | |
25250 | if (!(flag_V & 0x80)) |
25251 | { |
25252 | u32 newPC; |
25253 | |
25254 | newPC = (u32)(PC) - BasePC; |
25255 | newPC += GET_SWORD; |
25256 | SET_PC(newPC); |
25257 | CHECK_BRANCH_EXCEPTION(newPC) |
25258 | RET(10) |
25259 | } |
25260 | PC++; |
25261 | RET(12) |
25262 | } |
25263 | |
25264 | // BCC16 |
25265 | OPCODE(0x6900) |
25266 | { |
25267 | u32 adr, res; |
25268 | u32 src, dst; |
25269 | |
25270 | if (flag_V & 0x80) |
25271 | { |
25272 | u32 newPC; |
25273 | |
25274 | newPC = (u32)(PC) - BasePC; |
25275 | newPC += GET_SWORD; |
25276 | SET_PC(newPC); |
25277 | CHECK_BRANCH_EXCEPTION(newPC) |
25278 | RET(10) |
25279 | } |
25280 | PC++; |
25281 | RET(12) |
25282 | } |
25283 | |
25284 | // BCC16 |
25285 | OPCODE(0x6A00) |
25286 | { |
25287 | u32 adr, res; |
25288 | u32 src, dst; |
25289 | |
25290 | if (!(flag_N & 0x80)) |
25291 | { |
25292 | u32 newPC; |
25293 | |
25294 | newPC = (u32)(PC) - BasePC; |
25295 | newPC += GET_SWORD; |
25296 | SET_PC(newPC); |
25297 | CHECK_BRANCH_EXCEPTION(newPC) |
25298 | RET(10) |
25299 | } |
25300 | PC++; |
25301 | RET(12) |
25302 | } |
25303 | |
25304 | // BCC16 |
25305 | OPCODE(0x6B00) |
25306 | { |
25307 | u32 adr, res; |
25308 | u32 src, dst; |
25309 | |
25310 | if (flag_N & 0x80) |
25311 | { |
25312 | u32 newPC; |
25313 | |
25314 | newPC = (u32)(PC) - BasePC; |
25315 | newPC += GET_SWORD; |
25316 | SET_PC(newPC); |
25317 | CHECK_BRANCH_EXCEPTION(newPC) |
25318 | RET(10) |
25319 | } |
25320 | PC++; |
25321 | RET(12) |
25322 | } |
25323 | |
25324 | // BCC16 |
25325 | OPCODE(0x6C00) |
25326 | { |
25327 | u32 adr, res; |
25328 | u32 src, dst; |
25329 | |
25330 | if (!((flag_N ^ flag_V) & 0x80)) |
25331 | { |
25332 | u32 newPC; |
25333 | |
25334 | newPC = (u32)(PC) - BasePC; |
25335 | newPC += GET_SWORD; |
25336 | SET_PC(newPC); |
25337 | CHECK_BRANCH_EXCEPTION(newPC) |
25338 | RET(10) |
25339 | } |
25340 | PC++; |
25341 | RET(12) |
25342 | } |
25343 | |
25344 | // BCC16 |
25345 | OPCODE(0x6D00) |
25346 | { |
25347 | u32 adr, res; |
25348 | u32 src, dst; |
25349 | |
25350 | if ((flag_N ^ flag_V) & 0x80) |
25351 | { |
25352 | u32 newPC; |
25353 | |
25354 | newPC = (u32)(PC) - BasePC; |
25355 | newPC += GET_SWORD; |
25356 | SET_PC(newPC); |
25357 | CHECK_BRANCH_EXCEPTION(newPC) |
25358 | RET(10) |
25359 | } |
25360 | PC++; |
25361 | RET(12) |
25362 | } |
25363 | |
25364 | // BCC16 |
25365 | OPCODE(0x6E00) |
25366 | { |
25367 | u32 adr, res; |
25368 | u32 src, dst; |
25369 | |
25370 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25371 | { |
25372 | u32 newPC; |
25373 | |
25374 | newPC = (u32)(PC) - BasePC; |
25375 | newPC += GET_SWORD; |
25376 | SET_PC(newPC); |
25377 | CHECK_BRANCH_EXCEPTION(newPC) |
25378 | RET(10) |
25379 | } |
25380 | PC++; |
25381 | RET(12) |
25382 | } |
25383 | |
25384 | // BCC16 |
25385 | OPCODE(0x6F00) |
25386 | { |
25387 | u32 adr, res; |
25388 | u32 src, dst; |
25389 | |
25390 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25391 | { |
25392 | u32 newPC; |
25393 | |
25394 | newPC = (u32)(PC) - BasePC; |
25395 | newPC += GET_SWORD; |
25396 | SET_PC(newPC); |
25397 | CHECK_BRANCH_EXCEPTION(newPC) |
25398 | RET(10) |
25399 | } |
25400 | PC++; |
25401 | RET(12) |
25402 | } |
25403 | |
25404 | // BRA |
25405 | OPCODE(0x6001) |
25406 | { |
25407 | #ifdef FAMEC_CHECK_BRANCHES |
25408 | u32 newPC = (u32)(PC) - BasePC; |
25409 | s8 offs=Opcode; |
25410 | newPC += offs; |
25411 | SET_PC(newPC); |
25412 | CHECK_BRANCH_EXCEPTION(offs) |
25413 | #else |
25414 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25415 | #endif |
25416 | RET(10) |
25417 | } |
25418 | |
25419 | // BRA16 |
25420 | OPCODE(0x6000) |
25421 | { |
25422 | u32 adr, res; |
25423 | u32 src, dst; |
25424 | |
25425 | { |
25426 | u32 newPC; |
25427 | |
25428 | newPC = (u32)(PC) - BasePC; |
25429 | newPC += GET_SWORD; |
25430 | SET_PC(newPC); |
25431 | CHECK_BRANCH_EXCEPTION(newPC) |
25432 | } |
25433 | RET(10) |
25434 | } |
25435 | |
25436 | // BSR |
25437 | OPCODE(0x6101) |
25438 | { |
25439 | u32 adr, res; |
25440 | u32 src, dst; |
25441 | u32 oldPC; |
25442 | s8 offs; |
25443 | |
25444 | PRE_IO |
25445 | |
25446 | oldPC = (u32)(PC) - BasePC; |
25447 | PUSH_32_F(oldPC) |
25448 | #ifdef FAMEC_CHECK_BRANCHES |
25449 | offs = Opcode; |
25450 | oldPC += offs; |
25451 | SET_PC(oldPC); |
25452 | CHECK_BRANCH_EXCEPTION(offs) |
25453 | #else |
25454 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25455 | #endif |
25456 | POST_IO |
25457 | RET(18) |
25458 | } |
25459 | |
25460 | // BSR16 |
25461 | OPCODE(0x6100) |
25462 | { |
25463 | u32 adr, res; |
25464 | u32 src, dst; |
25465 | |
25466 | PRE_IO |
25467 | { |
25468 | u32 oldPC, newPC; |
25469 | |
25470 | newPC = (u32)(PC) - BasePC; |
25471 | oldPC = newPC + 2; |
25472 | PUSH_32_F(oldPC) |
25473 | newPC += GET_SWORD; |
25474 | SET_PC(newPC); |
25475 | CHECK_BRANCH_EXCEPTION(newPC) |
25476 | } |
25477 | POST_IO |
25478 | RET(18) |
25479 | } |
25480 | |
25481 | // MOVEQ |
25482 | OPCODE(0x7000) |
25483 | { |
25484 | u32 adr, res; |
25485 | u32 src, dst; |
25486 | |
25487 | res = (s32)(s8)Opcode; |
25488 | flag_C = flag_V = 0; |
25489 | flag_N = flag_NotZ = res; |
25490 | DREGu32((Opcode >> 9) & 7) = res; |
25491 | RET(4) |
25492 | } |
25493 | |
25494 | // ORaD |
25495 | OPCODE(0x8000) |
25496 | { |
25497 | u32 adr, res; |
25498 | u32 src, dst; |
25499 | |
25500 | src = DREGu8((Opcode >> 0) & 7); |
25501 | res = DREGu8((Opcode >> 9) & 7); |
25502 | res |= src; |
25503 | flag_C = 0; |
25504 | flag_V = 0; |
25505 | flag_NotZ = res; |
25506 | flag_N = res; |
25507 | DREGu8((Opcode >> 9) & 7) = res; |
25508 | RET(4) |
25509 | } |
25510 | |
25511 | // ORaD |
25512 | OPCODE(0x8010) |
25513 | { |
25514 | u32 adr, res; |
25515 | u32 src, dst; |
25516 | |
25517 | adr = AREG((Opcode >> 0) & 7); |
25518 | PRE_IO |
25519 | READ_BYTE_F(adr, src) |
25520 | res = DREGu8((Opcode >> 9) & 7); |
25521 | res |= src; |
25522 | flag_C = 0; |
25523 | flag_V = 0; |
25524 | flag_NotZ = res; |
25525 | flag_N = res; |
25526 | DREGu8((Opcode >> 9) & 7) = res; |
25527 | POST_IO |
25528 | RET(8) |
25529 | } |
25530 | |
25531 | // ORaD |
25532 | OPCODE(0x8018) |
25533 | { |
25534 | u32 adr, res; |
25535 | u32 src, dst; |
25536 | |
25537 | adr = AREG((Opcode >> 0) & 7); |
25538 | AREG((Opcode >> 0) & 7) += 1; |
25539 | PRE_IO |
25540 | READ_BYTE_F(adr, src) |
25541 | res = DREGu8((Opcode >> 9) & 7); |
25542 | res |= src; |
25543 | flag_C = 0; |
25544 | flag_V = 0; |
25545 | flag_NotZ = res; |
25546 | flag_N = res; |
25547 | DREGu8((Opcode >> 9) & 7) = res; |
25548 | POST_IO |
25549 | RET(8) |
25550 | } |
25551 | |
25552 | // ORaD |
25553 | OPCODE(0x8020) |
25554 | { |
25555 | u32 adr, res; |
25556 | u32 src, dst; |
25557 | |
25558 | adr = AREG((Opcode >> 0) & 7) - 1; |
25559 | AREG((Opcode >> 0) & 7) = adr; |
25560 | PRE_IO |
25561 | READ_BYTE_F(adr, src) |
25562 | res = DREGu8((Opcode >> 9) & 7); |
25563 | res |= src; |
25564 | flag_C = 0; |
25565 | flag_V = 0; |
25566 | flag_NotZ = res; |
25567 | flag_N = res; |
25568 | DREGu8((Opcode >> 9) & 7) = res; |
25569 | POST_IO |
25570 | RET(10) |
25571 | } |
25572 | |
25573 | // ORaD |
25574 | OPCODE(0x8028) |
25575 | { |
25576 | u32 adr, res; |
25577 | u32 src, dst; |
25578 | |
25579 | FETCH_SWORD(adr); |
25580 | adr += AREG((Opcode >> 0) & 7); |
25581 | PRE_IO |
25582 | READ_BYTE_F(adr, src) |
25583 | res = DREGu8((Opcode >> 9) & 7); |
25584 | res |= src; |
25585 | flag_C = 0; |
25586 | flag_V = 0; |
25587 | flag_NotZ = res; |
25588 | flag_N = res; |
25589 | DREGu8((Opcode >> 9) & 7) = res; |
25590 | POST_IO |
25591 | RET(12) |
25592 | } |
25593 | |
25594 | // ORaD |
25595 | OPCODE(0x8030) |
25596 | { |
25597 | u32 adr, res; |
25598 | u32 src, dst; |
25599 | |
25600 | adr = AREG((Opcode >> 0) & 7); |
25601 | DECODE_EXT_WORD |
25602 | PRE_IO |
25603 | READ_BYTE_F(adr, src) |
25604 | res = DREGu8((Opcode >> 9) & 7); |
25605 | res |= src; |
25606 | flag_C = 0; |
25607 | flag_V = 0; |
25608 | flag_NotZ = res; |
25609 | flag_N = res; |
25610 | DREGu8((Opcode >> 9) & 7) = res; |
25611 | POST_IO |
25612 | RET(14) |
25613 | } |
25614 | |
25615 | // ORaD |
25616 | OPCODE(0x8038) |
25617 | { |
25618 | u32 adr, res; |
25619 | u32 src, dst; |
25620 | |
25621 | FETCH_SWORD(adr); |
25622 | PRE_IO |
25623 | READ_BYTE_F(adr, src) |
25624 | res = DREGu8((Opcode >> 9) & 7); |
25625 | res |= src; |
25626 | flag_C = 0; |
25627 | flag_V = 0; |
25628 | flag_NotZ = res; |
25629 | flag_N = res; |
25630 | DREGu8((Opcode >> 9) & 7) = res; |
25631 | POST_IO |
25632 | RET(12) |
25633 | } |
25634 | |
25635 | // ORaD |
25636 | OPCODE(0x8039) |
25637 | { |
25638 | u32 adr, res; |
25639 | u32 src, dst; |
25640 | |
25641 | FETCH_LONG(adr); |
25642 | PRE_IO |
25643 | READ_BYTE_F(adr, src) |
25644 | res = DREGu8((Opcode >> 9) & 7); |
25645 | res |= src; |
25646 | flag_C = 0; |
25647 | flag_V = 0; |
25648 | flag_NotZ = res; |
25649 | flag_N = res; |
25650 | DREGu8((Opcode >> 9) & 7) = res; |
25651 | POST_IO |
25652 | RET(16) |
25653 | } |
25654 | |
25655 | // ORaD |
25656 | OPCODE(0x803A) |
25657 | { |
25658 | u32 adr, res; |
25659 | u32 src, dst; |
25660 | |
25661 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
25662 | PC++; |
25663 | PRE_IO |
25664 | READ_BYTE_F(adr, src) |
25665 | res = DREGu8((Opcode >> 9) & 7); |
25666 | res |= src; |
25667 | flag_C = 0; |
25668 | flag_V = 0; |
25669 | flag_NotZ = res; |
25670 | flag_N = res; |
25671 | DREGu8((Opcode >> 9) & 7) = res; |
25672 | POST_IO |
25673 | RET(12) |
25674 | } |
25675 | |
25676 | // ORaD |
25677 | OPCODE(0x803B) |
25678 | { |
25679 | u32 adr, res; |
25680 | u32 src, dst; |
25681 | |
25682 | adr = (u32)(PC) - BasePC; |
25683 | DECODE_EXT_WORD |
25684 | PRE_IO |
25685 | READ_BYTE_F(adr, src) |
25686 | res = DREGu8((Opcode >> 9) & 7); |
25687 | res |= src; |
25688 | flag_C = 0; |
25689 | flag_V = 0; |
25690 | flag_NotZ = res; |
25691 | flag_N = res; |
25692 | DREGu8((Opcode >> 9) & 7) = res; |
25693 | POST_IO |
25694 | RET(14) |
25695 | } |
25696 | |
25697 | // ORaD |
25698 | OPCODE(0x803C) |
25699 | { |
25700 | u32 adr, res; |
25701 | u32 src, dst; |
25702 | |
25703 | FETCH_BYTE(src); |
25704 | res = DREGu8((Opcode >> 9) & 7); |
25705 | res |= src; |
25706 | flag_C = 0; |
25707 | flag_V = 0; |
25708 | flag_NotZ = res; |
25709 | flag_N = res; |
25710 | DREGu8((Opcode >> 9) & 7) = res; |
25711 | RET(8) |
25712 | } |
25713 | |
25714 | // ORaD |
25715 | OPCODE(0x801F) |
25716 | { |
25717 | u32 adr, res; |
25718 | u32 src, dst; |
25719 | |
25720 | adr = AREG(7); |
25721 | AREG(7) += 2; |
25722 | PRE_IO |
25723 | READ_BYTE_F(adr, src) |
25724 | res = DREGu8((Opcode >> 9) & 7); |
25725 | res |= src; |
25726 | flag_C = 0; |
25727 | flag_V = 0; |
25728 | flag_NotZ = res; |
25729 | flag_N = res; |
25730 | DREGu8((Opcode >> 9) & 7) = res; |
25731 | POST_IO |
25732 | RET(8) |
25733 | } |
25734 | |
25735 | // ORaD |
25736 | OPCODE(0x8027) |
25737 | { |
25738 | u32 adr, res; |
25739 | u32 src, dst; |
25740 | |
25741 | adr = AREG(7) - 2; |
25742 | AREG(7) = adr; |
25743 | PRE_IO |
25744 | READ_BYTE_F(adr, src) |
25745 | res = DREGu8((Opcode >> 9) & 7); |
25746 | res |= src; |
25747 | flag_C = 0; |
25748 | flag_V = 0; |
25749 | flag_NotZ = res; |
25750 | flag_N = res; |
25751 | DREGu8((Opcode >> 9) & 7) = res; |
25752 | POST_IO |
25753 | RET(10) |
25754 | } |
25755 | |
25756 | // ORaD |
25757 | OPCODE(0x8040) |
25758 | { |
25759 | u32 adr, res; |
25760 | u32 src, dst; |
25761 | |
25762 | src = DREGu16((Opcode >> 0) & 7); |
25763 | res = DREGu16((Opcode >> 9) & 7); |
25764 | res |= src; |
25765 | flag_C = 0; |
25766 | flag_V = 0; |
25767 | flag_NotZ = res; |
25768 | flag_N = res >> 8; |
25769 | DREGu16((Opcode >> 9) & 7) = res; |
25770 | RET(4) |
25771 | } |
25772 | |
25773 | // ORaD |
25774 | OPCODE(0x8050) |
25775 | { |
25776 | u32 adr, res; |
25777 | u32 src, dst; |
25778 | |
25779 | adr = AREG((Opcode >> 0) & 7); |
25780 | PRE_IO |
25781 | READ_WORD_F(adr, src) |
25782 | res = DREGu16((Opcode >> 9) & 7); |
25783 | res |= src; |
25784 | flag_C = 0; |
25785 | flag_V = 0; |
25786 | flag_NotZ = res; |
25787 | flag_N = res >> 8; |
25788 | DREGu16((Opcode >> 9) & 7) = res; |
25789 | POST_IO |
25790 | RET(8) |
25791 | } |
25792 | |
25793 | // ORaD |
25794 | OPCODE(0x8058) |
25795 | { |
25796 | u32 adr, res; |
25797 | u32 src, dst; |
25798 | |
25799 | adr = AREG((Opcode >> 0) & 7); |
25800 | AREG((Opcode >> 0) & 7) += 2; |
25801 | PRE_IO |
25802 | READ_WORD_F(adr, src) |
25803 | res = DREGu16((Opcode >> 9) & 7); |
25804 | res |= src; |
25805 | flag_C = 0; |
25806 | flag_V = 0; |
25807 | flag_NotZ = res; |
25808 | flag_N = res >> 8; |
25809 | DREGu16((Opcode >> 9) & 7) = res; |
25810 | POST_IO |
25811 | RET(8) |
25812 | } |
25813 | |
25814 | // ORaD |
25815 | OPCODE(0x8060) |
25816 | { |
25817 | u32 adr, res; |
25818 | u32 src, dst; |
25819 | |
25820 | adr = AREG((Opcode >> 0) & 7) - 2; |
25821 | AREG((Opcode >> 0) & 7) = adr; |
25822 | PRE_IO |
25823 | READ_WORD_F(adr, src) |
25824 | res = DREGu16((Opcode >> 9) & 7); |
25825 | res |= src; |
25826 | flag_C = 0; |
25827 | flag_V = 0; |
25828 | flag_NotZ = res; |
25829 | flag_N = res >> 8; |
25830 | DREGu16((Opcode >> 9) & 7) = res; |
25831 | POST_IO |
25832 | RET(10) |
25833 | } |
25834 | |
25835 | // ORaD |
25836 | OPCODE(0x8068) |
25837 | { |
25838 | u32 adr, res; |
25839 | u32 src, dst; |
25840 | |
25841 | FETCH_SWORD(adr); |
25842 | adr += AREG((Opcode >> 0) & 7); |
25843 | PRE_IO |
25844 | READ_WORD_F(adr, src) |
25845 | res = DREGu16((Opcode >> 9) & 7); |
25846 | res |= src; |
25847 | flag_C = 0; |
25848 | flag_V = 0; |
25849 | flag_NotZ = res; |
25850 | flag_N = res >> 8; |
25851 | DREGu16((Opcode >> 9) & 7) = res; |
25852 | POST_IO |
25853 | RET(12) |
25854 | } |
25855 | |
25856 | // ORaD |
25857 | OPCODE(0x8070) |
25858 | { |
25859 | u32 adr, res; |
25860 | u32 src, dst; |
25861 | |
25862 | adr = AREG((Opcode >> 0) & 7); |
25863 | DECODE_EXT_WORD |
25864 | PRE_IO |
25865 | READ_WORD_F(adr, src) |
25866 | res = DREGu16((Opcode >> 9) & 7); |
25867 | res |= src; |
25868 | flag_C = 0; |
25869 | flag_V = 0; |
25870 | flag_NotZ = res; |
25871 | flag_N = res >> 8; |
25872 | DREGu16((Opcode >> 9) & 7) = res; |
25873 | POST_IO |
25874 | RET(14) |
25875 | } |
25876 | |
25877 | // ORaD |
25878 | OPCODE(0x8078) |
25879 | { |
25880 | u32 adr, res; |
25881 | u32 src, dst; |
25882 | |
25883 | FETCH_SWORD(adr); |
25884 | PRE_IO |
25885 | READ_WORD_F(adr, src) |
25886 | res = DREGu16((Opcode >> 9) & 7); |
25887 | res |= src; |
25888 | flag_C = 0; |
25889 | flag_V = 0; |
25890 | flag_NotZ = res; |
25891 | flag_N = res >> 8; |
25892 | DREGu16((Opcode >> 9) & 7) = res; |
25893 | POST_IO |
25894 | RET(12) |
25895 | } |
25896 | |
25897 | // ORaD |
25898 | OPCODE(0x8079) |
25899 | { |
25900 | u32 adr, res; |
25901 | u32 src, dst; |
25902 | |
25903 | FETCH_LONG(adr); |
25904 | PRE_IO |
25905 | READ_WORD_F(adr, src) |
25906 | res = DREGu16((Opcode >> 9) & 7); |
25907 | res |= src; |
25908 | flag_C = 0; |
25909 | flag_V = 0; |
25910 | flag_NotZ = res; |
25911 | flag_N = res >> 8; |
25912 | DREGu16((Opcode >> 9) & 7) = res; |
25913 | POST_IO |
25914 | RET(16) |
25915 | } |
25916 | |
25917 | // ORaD |
25918 | OPCODE(0x807A) |
25919 | { |
25920 | u32 adr, res; |
25921 | u32 src, dst; |
25922 | |
25923 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
25924 | PC++; |
25925 | PRE_IO |
25926 | READ_WORD_F(adr, src) |
25927 | res = DREGu16((Opcode >> 9) & 7); |
25928 | res |= src; |
25929 | flag_C = 0; |
25930 | flag_V = 0; |
25931 | flag_NotZ = res; |
25932 | flag_N = res >> 8; |
25933 | DREGu16((Opcode >> 9) & 7) = res; |
25934 | POST_IO |
25935 | RET(12) |
25936 | } |
25937 | |
25938 | // ORaD |
25939 | OPCODE(0x807B) |
25940 | { |
25941 | u32 adr, res; |
25942 | u32 src, dst; |
25943 | |
25944 | adr = (u32)(PC) - BasePC; |
25945 | DECODE_EXT_WORD |
25946 | PRE_IO |
25947 | READ_WORD_F(adr, src) |
25948 | res = DREGu16((Opcode >> 9) & 7); |
25949 | res |= src; |
25950 | flag_C = 0; |
25951 | flag_V = 0; |
25952 | flag_NotZ = res; |
25953 | flag_N = res >> 8; |
25954 | DREGu16((Opcode >> 9) & 7) = res; |
25955 | POST_IO |
25956 | RET(14) |
25957 | } |
25958 | |
25959 | // ORaD |
25960 | OPCODE(0x807C) |
25961 | { |
25962 | u32 adr, res; |
25963 | u32 src, dst; |
25964 | |
25965 | FETCH_WORD(src); |
25966 | res = DREGu16((Opcode >> 9) & 7); |
25967 | res |= src; |
25968 | flag_C = 0; |
25969 | flag_V = 0; |
25970 | flag_NotZ = res; |
25971 | flag_N = res >> 8; |
25972 | DREGu16((Opcode >> 9) & 7) = res; |
25973 | RET(8) |
25974 | } |
25975 | |
25976 | // ORaD |
25977 | OPCODE(0x805F) |
25978 | { |
25979 | u32 adr, res; |
25980 | u32 src, dst; |
25981 | |
25982 | adr = AREG(7); |
25983 | AREG(7) += 2; |
25984 | PRE_IO |
25985 | READ_WORD_F(adr, src) |
25986 | res = DREGu16((Opcode >> 9) & 7); |
25987 | res |= src; |
25988 | flag_C = 0; |
25989 | flag_V = 0; |
25990 | flag_NotZ = res; |
25991 | flag_N = res >> 8; |
25992 | DREGu16((Opcode >> 9) & 7) = res; |
25993 | POST_IO |
25994 | RET(8) |
25995 | } |
25996 | |
25997 | // ORaD |
25998 | OPCODE(0x8067) |
25999 | { |
26000 | u32 adr, res; |
26001 | u32 src, dst; |
26002 | |
26003 | adr = AREG(7) - 2; |
26004 | AREG(7) = adr; |
26005 | PRE_IO |
26006 | READ_WORD_F(adr, src) |
26007 | res = DREGu16((Opcode >> 9) & 7); |
26008 | res |= src; |
26009 | flag_C = 0; |
26010 | flag_V = 0; |
26011 | flag_NotZ = res; |
26012 | flag_N = res >> 8; |
26013 | DREGu16((Opcode >> 9) & 7) = res; |
26014 | POST_IO |
26015 | RET(10) |
26016 | } |
26017 | |
26018 | // ORaD |
26019 | OPCODE(0x8080) |
26020 | { |
26021 | u32 adr, res; |
26022 | u32 src, dst; |
26023 | |
26024 | src = DREGu32((Opcode >> 0) & 7); |
26025 | res = DREGu32((Opcode >> 9) & 7); |
26026 | res |= src; |
26027 | flag_C = 0; |
26028 | flag_V = 0; |
26029 | flag_NotZ = res; |
26030 | flag_N = res >> 24; |
26031 | DREGu32((Opcode >> 9) & 7) = res; |
26032 | RET(8) |
26033 | } |
26034 | |
26035 | // ORaD |
26036 | OPCODE(0x8090) |
26037 | { |
26038 | u32 adr, res; |
26039 | u32 src, dst; |
26040 | |
26041 | adr = AREG((Opcode >> 0) & 7); |
26042 | PRE_IO |
26043 | READ_LONG_F(adr, src) |
26044 | res = DREGu32((Opcode >> 9) & 7); |
26045 | res |= src; |
26046 | flag_C = 0; |
26047 | flag_V = 0; |
26048 | flag_NotZ = res; |
26049 | flag_N = res >> 24; |
26050 | DREGu32((Opcode >> 9) & 7) = res; |
26051 | POST_IO |
26052 | RET(14) |
26053 | } |
26054 | |
26055 | // ORaD |
26056 | OPCODE(0x8098) |
26057 | { |
26058 | u32 adr, res; |
26059 | u32 src, dst; |
26060 | |
26061 | adr = AREG((Opcode >> 0) & 7); |
26062 | AREG((Opcode >> 0) & 7) += 4; |
26063 | PRE_IO |
26064 | READ_LONG_F(adr, src) |
26065 | res = DREGu32((Opcode >> 9) & 7); |
26066 | res |= src; |
26067 | flag_C = 0; |
26068 | flag_V = 0; |
26069 | flag_NotZ = res; |
26070 | flag_N = res >> 24; |
26071 | DREGu32((Opcode >> 9) & 7) = res; |
26072 | POST_IO |
26073 | RET(14) |
26074 | } |
26075 | |
26076 | // ORaD |
26077 | OPCODE(0x80A0) |
26078 | { |
26079 | u32 adr, res; |
26080 | u32 src, dst; |
26081 | |
26082 | adr = AREG((Opcode >> 0) & 7) - 4; |
26083 | AREG((Opcode >> 0) & 7) = adr; |
26084 | PRE_IO |
26085 | READ_LONG_F(adr, src) |
26086 | res = DREGu32((Opcode >> 9) & 7); |
26087 | res |= src; |
26088 | flag_C = 0; |
26089 | flag_V = 0; |
26090 | flag_NotZ = res; |
26091 | flag_N = res >> 24; |
26092 | DREGu32((Opcode >> 9) & 7) = res; |
26093 | POST_IO |
26094 | RET(16) |
26095 | } |
26096 | |
26097 | // ORaD |
26098 | OPCODE(0x80A8) |
26099 | { |
26100 | u32 adr, res; |
26101 | u32 src, dst; |
26102 | |
26103 | FETCH_SWORD(adr); |
26104 | adr += AREG((Opcode >> 0) & 7); |
26105 | PRE_IO |
26106 | READ_LONG_F(adr, src) |
26107 | res = DREGu32((Opcode >> 9) & 7); |
26108 | res |= src; |
26109 | flag_C = 0; |
26110 | flag_V = 0; |
26111 | flag_NotZ = res; |
26112 | flag_N = res >> 24; |
26113 | DREGu32((Opcode >> 9) & 7) = res; |
26114 | POST_IO |
26115 | RET(18) |
26116 | } |
26117 | |
26118 | // ORaD |
26119 | OPCODE(0x80B0) |
26120 | { |
26121 | u32 adr, res; |
26122 | u32 src, dst; |
26123 | |
26124 | adr = AREG((Opcode >> 0) & 7); |
26125 | DECODE_EXT_WORD |
26126 | PRE_IO |
26127 | READ_LONG_F(adr, src) |
26128 | res = DREGu32((Opcode >> 9) & 7); |
26129 | res |= src; |
26130 | flag_C = 0; |
26131 | flag_V = 0; |
26132 | flag_NotZ = res; |
26133 | flag_N = res >> 24; |
26134 | DREGu32((Opcode >> 9) & 7) = res; |
26135 | POST_IO |
26136 | RET(20) |
26137 | } |
26138 | |
26139 | // ORaD |
26140 | OPCODE(0x80B8) |
26141 | { |
26142 | u32 adr, res; |
26143 | u32 src, dst; |
26144 | |
26145 | FETCH_SWORD(adr); |
26146 | PRE_IO |
26147 | READ_LONG_F(adr, src) |
26148 | res = DREGu32((Opcode >> 9) & 7); |
26149 | res |= src; |
26150 | flag_C = 0; |
26151 | flag_V = 0; |
26152 | flag_NotZ = res; |
26153 | flag_N = res >> 24; |
26154 | DREGu32((Opcode >> 9) & 7) = res; |
26155 | POST_IO |
26156 | RET(18) |
26157 | } |
26158 | |
26159 | // ORaD |
26160 | OPCODE(0x80B9) |
26161 | { |
26162 | u32 adr, res; |
26163 | u32 src, dst; |
26164 | |
26165 | FETCH_LONG(adr); |
26166 | PRE_IO |
26167 | READ_LONG_F(adr, src) |
26168 | res = DREGu32((Opcode >> 9) & 7); |
26169 | res |= src; |
26170 | flag_C = 0; |
26171 | flag_V = 0; |
26172 | flag_NotZ = res; |
26173 | flag_N = res >> 24; |
26174 | DREGu32((Opcode >> 9) & 7) = res; |
26175 | POST_IO |
26176 | RET(22) |
26177 | } |
26178 | |
26179 | // ORaD |
26180 | OPCODE(0x80BA) |
26181 | { |
26182 | u32 adr, res; |
26183 | u32 src, dst; |
26184 | |
26185 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
26186 | PC++; |
26187 | PRE_IO |
26188 | READ_LONG_F(adr, src) |
26189 | res = DREGu32((Opcode >> 9) & 7); |
26190 | res |= src; |
26191 | flag_C = 0; |
26192 | flag_V = 0; |
26193 | flag_NotZ = res; |
26194 | flag_N = res >> 24; |
26195 | DREGu32((Opcode >> 9) & 7) = res; |
26196 | POST_IO |
26197 | RET(18) |
26198 | } |
26199 | |
26200 | // ORaD |
26201 | OPCODE(0x80BB) |
26202 | { |
26203 | u32 adr, res; |
26204 | u32 src, dst; |
26205 | |
26206 | adr = (u32)(PC) - BasePC; |
26207 | DECODE_EXT_WORD |
26208 | PRE_IO |
26209 | READ_LONG_F(adr, src) |
26210 | res = DREGu32((Opcode >> 9) & 7); |
26211 | res |= src; |
26212 | flag_C = 0; |
26213 | flag_V = 0; |
26214 | flag_NotZ = res; |
26215 | flag_N = res >> 24; |
26216 | DREGu32((Opcode >> 9) & 7) = res; |
26217 | POST_IO |
26218 | RET(20) |
26219 | } |
26220 | |
26221 | // ORaD |
26222 | OPCODE(0x80BC) |
26223 | { |
26224 | u32 adr, res; |
26225 | u32 src, dst; |
26226 | |
26227 | FETCH_LONG(src); |
26228 | res = DREGu32((Opcode >> 9) & 7); |
26229 | res |= src; |
26230 | flag_C = 0; |
26231 | flag_V = 0; |
26232 | flag_NotZ = res; |
26233 | flag_N = res >> 24; |
26234 | DREGu32((Opcode >> 9) & 7) = res; |
26235 | RET(16) |
26236 | } |
26237 | |
26238 | // ORaD |
26239 | OPCODE(0x809F) |
26240 | { |
26241 | u32 adr, res; |
26242 | u32 src, dst; |
26243 | |
26244 | adr = AREG(7); |
26245 | AREG(7) += 4; |
26246 | PRE_IO |
26247 | READ_LONG_F(adr, src) |
26248 | res = DREGu32((Opcode >> 9) & 7); |
26249 | res |= src; |
26250 | flag_C = 0; |
26251 | flag_V = 0; |
26252 | flag_NotZ = res; |
26253 | flag_N = res >> 24; |
26254 | DREGu32((Opcode >> 9) & 7) = res; |
26255 | POST_IO |
26256 | RET(14) |
26257 | } |
26258 | |
26259 | // ORaD |
26260 | OPCODE(0x80A7) |
26261 | { |
26262 | u32 adr, res; |
26263 | u32 src, dst; |
26264 | |
26265 | adr = AREG(7) - 4; |
26266 | AREG(7) = adr; |
26267 | PRE_IO |
26268 | READ_LONG_F(adr, src) |
26269 | res = DREGu32((Opcode >> 9) & 7); |
26270 | res |= src; |
26271 | flag_C = 0; |
26272 | flag_V = 0; |
26273 | flag_NotZ = res; |
26274 | flag_N = res >> 24; |
26275 | DREGu32((Opcode >> 9) & 7) = res; |
26276 | POST_IO |
26277 | RET(16) |
26278 | } |
26279 | |
26280 | // ORDa |
26281 | OPCODE(0x8110) |
26282 | { |
26283 | u32 adr, res; |
26284 | u32 src, dst; |
26285 | |
26286 | src = DREGu8((Opcode >> 9) & 7); |
26287 | adr = AREG((Opcode >> 0) & 7); |
26288 | PRE_IO |
26289 | READ_BYTE_F(adr, res) |
26290 | res |= src; |
26291 | flag_C = 0; |
26292 | flag_V = 0; |
26293 | flag_NotZ = res; |
26294 | flag_N = res; |
26295 | WRITE_BYTE_F(adr, res) |
26296 | POST_IO |
26297 | RET(12) |
26298 | } |
26299 | |
26300 | // ORDa |
26301 | OPCODE(0x8118) |
26302 | { |
26303 | u32 adr, res; |
26304 | u32 src, dst; |
26305 | |
26306 | src = DREGu8((Opcode >> 9) & 7); |
26307 | adr = AREG((Opcode >> 0) & 7); |
26308 | AREG((Opcode >> 0) & 7) += 1; |
26309 | PRE_IO |
26310 | READ_BYTE_F(adr, res) |
26311 | res |= src; |
26312 | flag_C = 0; |
26313 | flag_V = 0; |
26314 | flag_NotZ = res; |
26315 | flag_N = res; |
26316 | WRITE_BYTE_F(adr, res) |
26317 | POST_IO |
26318 | RET(12) |
26319 | } |
26320 | |
26321 | // ORDa |
26322 | OPCODE(0x8120) |
26323 | { |
26324 | u32 adr, res; |
26325 | u32 src, dst; |
26326 | |
26327 | src = DREGu8((Opcode >> 9) & 7); |
26328 | adr = AREG((Opcode >> 0) & 7) - 1; |
26329 | AREG((Opcode >> 0) & 7) = adr; |
26330 | PRE_IO |
26331 | READ_BYTE_F(adr, res) |
26332 | res |= src; |
26333 | flag_C = 0; |
26334 | flag_V = 0; |
26335 | flag_NotZ = res; |
26336 | flag_N = res; |
26337 | WRITE_BYTE_F(adr, res) |
26338 | POST_IO |
26339 | RET(14) |
26340 | } |
26341 | |
26342 | // ORDa |
26343 | OPCODE(0x8128) |
26344 | { |
26345 | u32 adr, res; |
26346 | u32 src, dst; |
26347 | |
26348 | src = DREGu8((Opcode >> 9) & 7); |
26349 | FETCH_SWORD(adr); |
26350 | adr += AREG((Opcode >> 0) & 7); |
26351 | PRE_IO |
26352 | READ_BYTE_F(adr, res) |
26353 | res |= src; |
26354 | flag_C = 0; |
26355 | flag_V = 0; |
26356 | flag_NotZ = res; |
26357 | flag_N = res; |
26358 | WRITE_BYTE_F(adr, res) |
26359 | POST_IO |
26360 | RET(16) |
26361 | } |
26362 | |
26363 | // ORDa |
26364 | OPCODE(0x8130) |
26365 | { |
26366 | u32 adr, res; |
26367 | u32 src, dst; |
26368 | |
26369 | src = DREGu8((Opcode >> 9) & 7); |
26370 | adr = AREG((Opcode >> 0) & 7); |
26371 | DECODE_EXT_WORD |
26372 | PRE_IO |
26373 | READ_BYTE_F(adr, res) |
26374 | res |= src; |
26375 | flag_C = 0; |
26376 | flag_V = 0; |
26377 | flag_NotZ = res; |
26378 | flag_N = res; |
26379 | WRITE_BYTE_F(adr, res) |
26380 | POST_IO |
26381 | RET(18) |
26382 | } |
26383 | |
26384 | // ORDa |
26385 | OPCODE(0x8138) |
26386 | { |
26387 | u32 adr, res; |
26388 | u32 src, dst; |
26389 | |
26390 | src = DREGu8((Opcode >> 9) & 7); |
26391 | FETCH_SWORD(adr); |
26392 | PRE_IO |
26393 | READ_BYTE_F(adr, res) |
26394 | res |= src; |
26395 | flag_C = 0; |
26396 | flag_V = 0; |
26397 | flag_NotZ = res; |
26398 | flag_N = res; |
26399 | WRITE_BYTE_F(adr, res) |
26400 | POST_IO |
26401 | RET(16) |
26402 | } |
26403 | |
26404 | // ORDa |
26405 | OPCODE(0x8139) |
26406 | { |
26407 | u32 adr, res; |
26408 | u32 src, dst; |
26409 | |
26410 | src = DREGu8((Opcode >> 9) & 7); |
26411 | FETCH_LONG(adr); |
26412 | PRE_IO |
26413 | READ_BYTE_F(adr, res) |
26414 | res |= src; |
26415 | flag_C = 0; |
26416 | flag_V = 0; |
26417 | flag_NotZ = res; |
26418 | flag_N = res; |
26419 | WRITE_BYTE_F(adr, res) |
26420 | POST_IO |
26421 | RET(20) |
26422 | } |
26423 | |
26424 | // ORDa |
26425 | OPCODE(0x811F) |
26426 | { |
26427 | u32 adr, res; |
26428 | u32 src, dst; |
26429 | |
26430 | src = DREGu8((Opcode >> 9) & 7); |
26431 | adr = AREG(7); |
26432 | AREG(7) += 2; |
26433 | PRE_IO |
26434 | READ_BYTE_F(adr, res) |
26435 | res |= src; |
26436 | flag_C = 0; |
26437 | flag_V = 0; |
26438 | flag_NotZ = res; |
26439 | flag_N = res; |
26440 | WRITE_BYTE_F(adr, res) |
26441 | POST_IO |
26442 | RET(12) |
26443 | } |
26444 | |
26445 | // ORDa |
26446 | OPCODE(0x8127) |
26447 | { |
26448 | u32 adr, res; |
26449 | u32 src, dst; |
26450 | |
26451 | src = DREGu8((Opcode >> 9) & 7); |
26452 | adr = AREG(7) - 2; |
26453 | AREG(7) = adr; |
26454 | PRE_IO |
26455 | READ_BYTE_F(adr, res) |
26456 | res |= src; |
26457 | flag_C = 0; |
26458 | flag_V = 0; |
26459 | flag_NotZ = res; |
26460 | flag_N = res; |
26461 | WRITE_BYTE_F(adr, res) |
26462 | POST_IO |
26463 | RET(14) |
26464 | } |
26465 | |
26466 | // ORDa |
26467 | OPCODE(0x8150) |
26468 | { |
26469 | u32 adr, res; |
26470 | u32 src, dst; |
26471 | |
26472 | src = DREGu16((Opcode >> 9) & 7); |
26473 | adr = AREG((Opcode >> 0) & 7); |
26474 | PRE_IO |
26475 | READ_WORD_F(adr, res) |
26476 | res |= src; |
26477 | flag_C = 0; |
26478 | flag_V = 0; |
26479 | flag_NotZ = res; |
26480 | flag_N = res >> 8; |
26481 | WRITE_WORD_F(adr, res) |
26482 | POST_IO |
26483 | RET(12) |
26484 | } |
26485 | |
26486 | // ORDa |
26487 | OPCODE(0x8158) |
26488 | { |
26489 | u32 adr, res; |
26490 | u32 src, dst; |
26491 | |
26492 | src = DREGu16((Opcode >> 9) & 7); |
26493 | adr = AREG((Opcode >> 0) & 7); |
26494 | AREG((Opcode >> 0) & 7) += 2; |
26495 | PRE_IO |
26496 | READ_WORD_F(adr, res) |
26497 | res |= src; |
26498 | flag_C = 0; |
26499 | flag_V = 0; |
26500 | flag_NotZ = res; |
26501 | flag_N = res >> 8; |
26502 | WRITE_WORD_F(adr, res) |
26503 | POST_IO |
26504 | RET(12) |
26505 | } |
26506 | |
26507 | // ORDa |
26508 | OPCODE(0x8160) |
26509 | { |
26510 | u32 adr, res; |
26511 | u32 src, dst; |
26512 | |
26513 | src = DREGu16((Opcode >> 9) & 7); |
26514 | adr = AREG((Opcode >> 0) & 7) - 2; |
26515 | AREG((Opcode >> 0) & 7) = adr; |
26516 | PRE_IO |
26517 | READ_WORD_F(adr, res) |
26518 | res |= src; |
26519 | flag_C = 0; |
26520 | flag_V = 0; |
26521 | flag_NotZ = res; |
26522 | flag_N = res >> 8; |
26523 | WRITE_WORD_F(adr, res) |
26524 | POST_IO |
26525 | RET(14) |
26526 | } |
26527 | |
26528 | // ORDa |
26529 | OPCODE(0x8168) |
26530 | { |
26531 | u32 adr, res; |
26532 | u32 src, dst; |
26533 | |
26534 | src = DREGu16((Opcode >> 9) & 7); |
26535 | FETCH_SWORD(adr); |
26536 | adr += AREG((Opcode >> 0) & 7); |
26537 | PRE_IO |
26538 | READ_WORD_F(adr, res) |
26539 | res |= src; |
26540 | flag_C = 0; |
26541 | flag_V = 0; |
26542 | flag_NotZ = res; |
26543 | flag_N = res >> 8; |
26544 | WRITE_WORD_F(adr, res) |
26545 | POST_IO |
26546 | RET(16) |
26547 | } |
26548 | |
26549 | // ORDa |
26550 | OPCODE(0x8170) |
26551 | { |
26552 | u32 adr, res; |
26553 | u32 src, dst; |
26554 | |
26555 | src = DREGu16((Opcode >> 9) & 7); |
26556 | adr = AREG((Opcode >> 0) & 7); |
26557 | DECODE_EXT_WORD |
26558 | PRE_IO |
26559 | READ_WORD_F(adr, res) |
26560 | res |= src; |
26561 | flag_C = 0; |
26562 | flag_V = 0; |
26563 | flag_NotZ = res; |
26564 | flag_N = res >> 8; |
26565 | WRITE_WORD_F(adr, res) |
26566 | POST_IO |
26567 | RET(18) |
26568 | } |
26569 | |
26570 | // ORDa |
26571 | OPCODE(0x8178) |
26572 | { |
26573 | u32 adr, res; |
26574 | u32 src, dst; |
26575 | |
26576 | src = DREGu16((Opcode >> 9) & 7); |
26577 | FETCH_SWORD(adr); |
26578 | PRE_IO |
26579 | READ_WORD_F(adr, res) |
26580 | res |= src; |
26581 | flag_C = 0; |
26582 | flag_V = 0; |
26583 | flag_NotZ = res; |
26584 | flag_N = res >> 8; |
26585 | WRITE_WORD_F(adr, res) |
26586 | POST_IO |
26587 | RET(16) |
26588 | } |
26589 | |
26590 | // ORDa |
26591 | OPCODE(0x8179) |
26592 | { |
26593 | u32 adr, res; |
26594 | u32 src, dst; |
26595 | |
26596 | src = DREGu16((Opcode >> 9) & 7); |
26597 | FETCH_LONG(adr); |
26598 | PRE_IO |
26599 | READ_WORD_F(adr, res) |
26600 | res |= src; |
26601 | flag_C = 0; |
26602 | flag_V = 0; |
26603 | flag_NotZ = res; |
26604 | flag_N = res >> 8; |
26605 | WRITE_WORD_F(adr, res) |
26606 | POST_IO |
26607 | RET(20) |
26608 | } |
26609 | |
26610 | // ORDa |
26611 | OPCODE(0x815F) |
26612 | { |
26613 | u32 adr, res; |
26614 | u32 src, dst; |
26615 | |
26616 | src = DREGu16((Opcode >> 9) & 7); |
26617 | adr = AREG(7); |
26618 | AREG(7) += 2; |
26619 | PRE_IO |
26620 | READ_WORD_F(adr, res) |
26621 | res |= src; |
26622 | flag_C = 0; |
26623 | flag_V = 0; |
26624 | flag_NotZ = res; |
26625 | flag_N = res >> 8; |
26626 | WRITE_WORD_F(adr, res) |
26627 | POST_IO |
26628 | RET(12) |
26629 | } |
26630 | |
26631 | // ORDa |
26632 | OPCODE(0x8167) |
26633 | { |
26634 | u32 adr, res; |
26635 | u32 src, dst; |
26636 | |
26637 | src = DREGu16((Opcode >> 9) & 7); |
26638 | adr = AREG(7) - 2; |
26639 | AREG(7) = adr; |
26640 | PRE_IO |
26641 | READ_WORD_F(adr, res) |
26642 | res |= src; |
26643 | flag_C = 0; |
26644 | flag_V = 0; |
26645 | flag_NotZ = res; |
26646 | flag_N = res >> 8; |
26647 | WRITE_WORD_F(adr, res) |
26648 | POST_IO |
26649 | RET(14) |
26650 | } |
26651 | |
26652 | // ORDa |
26653 | OPCODE(0x8190) |
26654 | { |
26655 | u32 adr, res; |
26656 | u32 src, dst; |
26657 | |
26658 | src = DREGu32((Opcode >> 9) & 7); |
26659 | adr = AREG((Opcode >> 0) & 7); |
26660 | PRE_IO |
26661 | READ_LONG_F(adr, res) |
26662 | res |= src; |
26663 | flag_C = 0; |
26664 | flag_V = 0; |
26665 | flag_NotZ = res; |
26666 | flag_N = res >> 24; |
26667 | WRITE_LONG_F(adr, res) |
26668 | POST_IO |
26669 | RET(20) |
26670 | } |
26671 | |
26672 | // ORDa |
26673 | OPCODE(0x8198) |
26674 | { |
26675 | u32 adr, res; |
26676 | u32 src, dst; |
26677 | |
26678 | src = DREGu32((Opcode >> 9) & 7); |
26679 | adr = AREG((Opcode >> 0) & 7); |
26680 | AREG((Opcode >> 0) & 7) += 4; |
26681 | PRE_IO |
26682 | READ_LONG_F(adr, res) |
26683 | res |= src; |
26684 | flag_C = 0; |
26685 | flag_V = 0; |
26686 | flag_NotZ = res; |
26687 | flag_N = res >> 24; |
26688 | WRITE_LONG_F(adr, res) |
26689 | POST_IO |
26690 | RET(20) |
26691 | } |
26692 | |
26693 | // ORDa |
26694 | OPCODE(0x81A0) |
26695 | { |
26696 | u32 adr, res; |
26697 | u32 src, dst; |
26698 | |
26699 | src = DREGu32((Opcode >> 9) & 7); |
26700 | adr = AREG((Opcode >> 0) & 7) - 4; |
26701 | AREG((Opcode >> 0) & 7) = adr; |
26702 | PRE_IO |
26703 | READ_LONG_F(adr, res) |
26704 | res |= src; |
26705 | flag_C = 0; |
26706 | flag_V = 0; |
26707 | flag_NotZ = res; |
26708 | flag_N = res >> 24; |
26709 | WRITE_LONG_F(adr, res) |
26710 | POST_IO |
26711 | RET(22) |
26712 | } |
26713 | |
26714 | // ORDa |
26715 | OPCODE(0x81A8) |
26716 | { |
26717 | u32 adr, res; |
26718 | u32 src, dst; |
26719 | |
26720 | src = DREGu32((Opcode >> 9) & 7); |
26721 | FETCH_SWORD(adr); |
26722 | adr += AREG((Opcode >> 0) & 7); |
26723 | PRE_IO |
26724 | READ_LONG_F(adr, res) |
26725 | res |= src; |
26726 | flag_C = 0; |
26727 | flag_V = 0; |
26728 | flag_NotZ = res; |
26729 | flag_N = res >> 24; |
26730 | WRITE_LONG_F(adr, res) |
26731 | POST_IO |
26732 | RET(24) |
26733 | } |
26734 | |
26735 | // ORDa |
26736 | OPCODE(0x81B0) |
26737 | { |
26738 | u32 adr, res; |
26739 | u32 src, dst; |
26740 | |
26741 | src = DREGu32((Opcode >> 9) & 7); |
26742 | adr = AREG((Opcode >> 0) & 7); |
26743 | DECODE_EXT_WORD |
26744 | PRE_IO |
26745 | READ_LONG_F(adr, res) |
26746 | res |= src; |
26747 | flag_C = 0; |
26748 | flag_V = 0; |
26749 | flag_NotZ = res; |
26750 | flag_N = res >> 24; |
26751 | WRITE_LONG_F(adr, res) |
26752 | POST_IO |
26753 | RET(26) |
26754 | } |
26755 | |
26756 | // ORDa |
26757 | OPCODE(0x81B8) |
26758 | { |
26759 | u32 adr, res; |
26760 | u32 src, dst; |
26761 | |
26762 | src = DREGu32((Opcode >> 9) & 7); |
26763 | FETCH_SWORD(adr); |
26764 | PRE_IO |
26765 | READ_LONG_F(adr, res) |
26766 | res |= src; |
26767 | flag_C = 0; |
26768 | flag_V = 0; |
26769 | flag_NotZ = res; |
26770 | flag_N = res >> 24; |
26771 | WRITE_LONG_F(adr, res) |
26772 | POST_IO |
26773 | RET(24) |
26774 | } |
26775 | |
26776 | // ORDa |
26777 | OPCODE(0x81B9) |
26778 | { |
26779 | u32 adr, res; |
26780 | u32 src, dst; |
26781 | |
26782 | src = DREGu32((Opcode >> 9) & 7); |
26783 | FETCH_LONG(adr); |
26784 | PRE_IO |
26785 | READ_LONG_F(adr, res) |
26786 | res |= src; |
26787 | flag_C = 0; |
26788 | flag_V = 0; |
26789 | flag_NotZ = res; |
26790 | flag_N = res >> 24; |
26791 | WRITE_LONG_F(adr, res) |
26792 | POST_IO |
26793 | RET(28) |
26794 | } |
26795 | |
26796 | // ORDa |
26797 | OPCODE(0x819F) |
26798 | { |
26799 | u32 adr, res; |
26800 | u32 src, dst; |
26801 | |
26802 | src = DREGu32((Opcode >> 9) & 7); |
26803 | adr = AREG(7); |
26804 | AREG(7) += 4; |
26805 | PRE_IO |
26806 | READ_LONG_F(adr, res) |
26807 | res |= src; |
26808 | flag_C = 0; |
26809 | flag_V = 0; |
26810 | flag_NotZ = res; |
26811 | flag_N = res >> 24; |
26812 | WRITE_LONG_F(adr, res) |
26813 | POST_IO |
26814 | RET(20) |
26815 | } |
26816 | |
26817 | // ORDa |
26818 | OPCODE(0x81A7) |
26819 | { |
26820 | u32 adr, res; |
26821 | u32 src, dst; |
26822 | |
26823 | src = DREGu32((Opcode >> 9) & 7); |
26824 | adr = AREG(7) - 4; |
26825 | AREG(7) = adr; |
26826 | PRE_IO |
26827 | READ_LONG_F(adr, res) |
26828 | res |= src; |
26829 | flag_C = 0; |
26830 | flag_V = 0; |
26831 | flag_NotZ = res; |
26832 | flag_N = res >> 24; |
26833 | WRITE_LONG_F(adr, res) |
26834 | POST_IO |
26835 | RET(22) |
26836 | } |
26837 | |
26838 | // SBCD |
26839 | OPCODE(0x8100) |
26840 | { |
26841 | u32 adr, res; |
26842 | u32 src, dst; |
26843 | |
26844 | src = DREGu8((Opcode >> 0) & 7); |
26845 | dst = DREGu8((Opcode >> 9) & 7); |
26846 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26847 | if (res > 9) res -= 6; |
26848 | res += (dst & 0xF0) - (src & 0xF0); |
26849 | if (res > 0x99) |
26850 | { |
26851 | res += 0xA0; |
26852 | flag_X = flag_C = M68K_SR_C; |
26853 | } |
26854 | else flag_X = flag_C = 0; |
26855 | flag_NotZ |= res & 0xFF; |
26856 | flag_N = res; |
26857 | DREGu8((Opcode >> 9) & 7) = res; |
26858 | RET(6) |
26859 | } |
26860 | |
26861 | // SBCDM |
26862 | OPCODE(0x8108) |
26863 | { |
26864 | u32 adr, res; |
26865 | u32 src, dst; |
26866 | |
26867 | adr = AREG((Opcode >> 0) & 7) - 1; |
26868 | AREG((Opcode >> 0) & 7) = adr; |
26869 | PRE_IO |
26870 | READ_BYTE_F(adr, src) |
26871 | adr = AREG((Opcode >> 9) & 7) - 1; |
26872 | AREG((Opcode >> 9) & 7) = adr; |
26873 | READ_BYTE_F(adr, dst) |
26874 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26875 | if (res > 9) res -= 6; |
26876 | res += (dst & 0xF0) - (src & 0xF0); |
26877 | if (res > 0x99) |
26878 | { |
26879 | res += 0xA0; |
26880 | flag_X = flag_C = M68K_SR_C; |
26881 | } |
26882 | else flag_X = flag_C = 0; |
26883 | flag_NotZ |= res & 0xFF; |
26884 | flag_N = res; |
26885 | WRITE_BYTE_F(adr, res) |
26886 | POST_IO |
26887 | RET(18) |
26888 | } |
26889 | |
26890 | // SBCD7M |
26891 | OPCODE(0x810F) |
26892 | { |
26893 | u32 adr, res; |
26894 | u32 src, dst; |
26895 | |
26896 | adr = AREG(7) - 2; |
26897 | AREG(7) = adr; |
26898 | PRE_IO |
26899 | READ_BYTE_F(adr, src) |
26900 | adr = AREG((Opcode >> 9) & 7) - 1; |
26901 | AREG((Opcode >> 9) & 7) = adr; |
26902 | READ_BYTE_F(adr, dst) |
26903 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26904 | if (res > 9) res -= 6; |
26905 | res += (dst & 0xF0) - (src & 0xF0); |
26906 | if (res > 0x99) |
26907 | { |
26908 | res += 0xA0; |
26909 | flag_X = flag_C = M68K_SR_C; |
26910 | } |
26911 | else flag_X = flag_C = 0; |
26912 | flag_NotZ |= res & 0xFF; |
26913 | flag_N = res; |
26914 | WRITE_BYTE_F(adr, res) |
26915 | POST_IO |
26916 | RET(18) |
26917 | } |
26918 | |
26919 | // SBCDM7 |
26920 | OPCODE(0x8F08) |
26921 | { |
26922 | u32 adr, res; |
26923 | u32 src, dst; |
26924 | |
26925 | adr = AREG((Opcode >> 0) & 7) - 1; |
26926 | AREG((Opcode >> 0) & 7) = adr; |
26927 | PRE_IO |
26928 | READ_BYTE_F(adr, src) |
26929 | adr = AREG(7) - 2; |
26930 | AREG(7) = adr; |
26931 | READ_BYTE_F(adr, dst) |
26932 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26933 | if (res > 9) res -= 6; |
26934 | res += (dst & 0xF0) - (src & 0xF0); |
26935 | if (res > 0x99) |
26936 | { |
26937 | res += 0xA0; |
26938 | flag_X = flag_C = M68K_SR_C; |
26939 | } |
26940 | else flag_X = flag_C = 0; |
26941 | flag_NotZ |= res & 0xFF; |
26942 | flag_N = res; |
26943 | WRITE_BYTE_F(adr, res) |
26944 | POST_IO |
26945 | RET(18) |
26946 | } |
26947 | |
26948 | // SBCD7M7 |
26949 | OPCODE(0x8F0F) |
26950 | { |
26951 | u32 adr, res; |
26952 | u32 src, dst; |
26953 | |
26954 | adr = AREG(7) - 2; |
26955 | AREG(7) = adr; |
26956 | PRE_IO |
26957 | READ_BYTE_F(adr, src) |
26958 | adr = AREG(7) - 2; |
26959 | AREG(7) = adr; |
26960 | READ_BYTE_F(adr, dst) |
26961 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26962 | if (res > 9) res -= 6; |
26963 | res += (dst & 0xF0) - (src & 0xF0); |
26964 | if (res > 0x99) |
26965 | { |
26966 | res += 0xA0; |
26967 | flag_X = flag_C = M68K_SR_C; |
26968 | } |
26969 | else flag_X = flag_C = 0; |
26970 | flag_NotZ |= res & 0xFF; |
26971 | flag_N = res; |
26972 | WRITE_BYTE_F(adr, res) |
26973 | POST_IO |
26974 | RET(18) |
26975 | } |
26976 | |
26977 | // DIVU |
26978 | OPCODE(0x80C0) |
26979 | { |
26980 | u32 adr, res; |
26981 | u32 src, dst; |
26982 | |
26983 | src = DREGu16((Opcode >> 0) & 7); |
26984 | if (src == 0) |
26985 | { |
26986 | execute_exception(M68K_ZERO_DIVIDE_EX); |
26987 | #ifdef USE_CYCLONE_TIMING_DIV |
26988 | RET(140) |
26989 | #else |
26990 | RET(10) |
26991 | #endif |
26992 | } |
26993 | dst = DREGu32((Opcode >> 9) & 7); |
26994 | { |
26995 | u32 q, r; |
26996 | |
26997 | q = dst / src; |
26998 | r = dst % src; |
26999 | |
27000 | if (q & 0xFFFF0000) |
27001 | { |
27002 | flag_V = M68K_SR_V; |
27003 | #ifdef USE_CYCLONE_TIMING_DIV |
27004 | RET(140) |
27005 | #else |
27006 | RET(70) |
27007 | #endif |
27008 | } |
27009 | q &= 0x0000FFFF; |
27010 | flag_NotZ = q; |
27011 | flag_N = q >> 8; |
27012 | flag_V = flag_C = 0; |
27013 | res = q | (r << 16); |
27014 | DREGu32((Opcode >> 9) & 7) = res; |
27015 | } |
27016 | #ifdef USE_CYCLONE_TIMING_DIV |
27017 | RET(140) |
27018 | #else |
27019 | RET(90) |
27020 | #endif |
27021 | } |
27022 | |
27023 | // DIVU |
27024 | OPCODE(0x80D0) |
27025 | { |
27026 | u32 adr, res; |
27027 | u32 src, dst; |
27028 | |
27029 | adr = AREG((Opcode >> 0) & 7); |
27030 | PRE_IO |
27031 | READ_WORD_F(adr, src) |
27032 | if (src == 0) |
27033 | { |
27034 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27035 | #ifdef USE_CYCLONE_TIMING_DIV |
27036 | RET(144) |
27037 | #else |
27038 | RET(14) |
27039 | #endif |
27040 | } |
27041 | dst = DREGu32((Opcode >> 9) & 7); |
27042 | { |
27043 | u32 q, r; |
27044 | |
27045 | q = dst / src; |
27046 | r = dst % src; |
27047 | |
27048 | if (q & 0xFFFF0000) |
27049 | { |
27050 | flag_V = M68K_SR_V; |
27051 | #ifdef USE_CYCLONE_TIMING_DIV |
27052 | RET(144) |
27053 | #else |
27054 | RET(74) |
27055 | #endif |
27056 | } |
27057 | q &= 0x0000FFFF; |
27058 | flag_NotZ = q; |
27059 | flag_N = q >> 8; |
27060 | flag_V = flag_C = 0; |
27061 | res = q | (r << 16); |
27062 | DREGu32((Opcode >> 9) & 7) = res; |
27063 | } |
27064 | #ifdef USE_CYCLONE_TIMING_DIV |
27065 | RET(144) |
27066 | #else |
27067 | RET(94) |
27068 | #endif |
27069 | } |
27070 | |
27071 | // DIVU |
27072 | OPCODE(0x80D8) |
27073 | { |
27074 | u32 adr, res; |
27075 | u32 src, dst; |
27076 | |
27077 | adr = AREG((Opcode >> 0) & 7); |
27078 | AREG((Opcode >> 0) & 7) += 2; |
27079 | PRE_IO |
27080 | READ_WORD_F(adr, src) |
27081 | if (src == 0) |
27082 | { |
27083 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27084 | #ifdef USE_CYCLONE_TIMING_DIV |
27085 | RET(144) |
27086 | #else |
27087 | RET(14) |
27088 | #endif |
27089 | } |
27090 | dst = DREGu32((Opcode >> 9) & 7); |
27091 | { |
27092 | u32 q, r; |
27093 | |
27094 | q = dst / src; |
27095 | r = dst % src; |
27096 | |
27097 | if (q & 0xFFFF0000) |
27098 | { |
27099 | flag_V = M68K_SR_V; |
27100 | #ifdef USE_CYCLONE_TIMING_DIV |
27101 | RET(144) |
27102 | #else |
27103 | RET(74) |
27104 | #endif |
27105 | } |
27106 | q &= 0x0000FFFF; |
27107 | flag_NotZ = q; |
27108 | flag_N = q >> 8; |
27109 | flag_V = flag_C = 0; |
27110 | res = q | (r << 16); |
27111 | DREGu32((Opcode >> 9) & 7) = res; |
27112 | } |
27113 | #ifdef USE_CYCLONE_TIMING_DIV |
27114 | RET(144) |
27115 | #else |
27116 | RET(94) |
27117 | #endif |
27118 | } |
27119 | |
27120 | // DIVU |
27121 | OPCODE(0x80E0) |
27122 | { |
27123 | u32 adr, res; |
27124 | u32 src, dst; |
27125 | |
27126 | adr = AREG((Opcode >> 0) & 7) - 2; |
27127 | AREG((Opcode >> 0) & 7) = adr; |
27128 | PRE_IO |
27129 | READ_WORD_F(adr, src) |
27130 | if (src == 0) |
27131 | { |
27132 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27133 | #ifdef USE_CYCLONE_TIMING_DIV |
27134 | RET(146) |
27135 | #else |
27136 | RET(16) |
27137 | #endif |
27138 | } |
27139 | dst = DREGu32((Opcode >> 9) & 7); |
27140 | { |
27141 | u32 q, r; |
27142 | |
27143 | q = dst / src; |
27144 | r = dst % src; |
27145 | |
27146 | if (q & 0xFFFF0000) |
27147 | { |
27148 | flag_V = M68K_SR_V; |
27149 | #ifdef USE_CYCLONE_TIMING_DIV |
27150 | RET(146) |
27151 | #else |
27152 | RET(76) |
27153 | #endif |
27154 | } |
27155 | q &= 0x0000FFFF; |
27156 | flag_NotZ = q; |
27157 | flag_N = q >> 8; |
27158 | flag_V = flag_C = 0; |
27159 | res = q | (r << 16); |
27160 | DREGu32((Opcode >> 9) & 7) = res; |
27161 | } |
27162 | #ifdef USE_CYCLONE_TIMING_DIV |
27163 | RET(146) |
27164 | #else |
27165 | RET(96) |
27166 | #endif |
27167 | } |
27168 | |
27169 | // DIVU |
27170 | OPCODE(0x80E8) |
27171 | { |
27172 | u32 adr, res; |
27173 | u32 src, dst; |
27174 | |
27175 | FETCH_SWORD(adr); |
27176 | adr += AREG((Opcode >> 0) & 7); |
27177 | PRE_IO |
27178 | READ_WORD_F(adr, src) |
27179 | if (src == 0) |
27180 | { |
27181 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27182 | #ifdef USE_CYCLONE_TIMING_DIV |
27183 | RET(148) |
27184 | #else |
27185 | RET(18) |
27186 | #endif |
27187 | } |
27188 | dst = DREGu32((Opcode >> 9) & 7); |
27189 | { |
27190 | u32 q, r; |
27191 | |
27192 | q = dst / src; |
27193 | r = dst % src; |
27194 | |
27195 | if (q & 0xFFFF0000) |
27196 | { |
27197 | flag_V = M68K_SR_V; |
27198 | #ifdef USE_CYCLONE_TIMING_DIV |
27199 | RET(148) |
27200 | #else |
27201 | RET(78) |
27202 | #endif |
27203 | } |
27204 | q &= 0x0000FFFF; |
27205 | flag_NotZ = q; |
27206 | flag_N = q >> 8; |
27207 | flag_V = flag_C = 0; |
27208 | res = q | (r << 16); |
27209 | DREGu32((Opcode >> 9) & 7) = res; |
27210 | } |
27211 | #ifdef USE_CYCLONE_TIMING_DIV |
27212 | RET(148) |
27213 | #else |
27214 | RET(98) |
27215 | #endif |
27216 | } |
27217 | |
27218 | // DIVU |
27219 | OPCODE(0x80F0) |
27220 | { |
27221 | u32 adr, res; |
27222 | u32 src, dst; |
27223 | |
27224 | adr = AREG((Opcode >> 0) & 7); |
27225 | DECODE_EXT_WORD |
27226 | PRE_IO |
27227 | READ_WORD_F(adr, src) |
27228 | if (src == 0) |
27229 | { |
27230 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27231 | #ifdef USE_CYCLONE_TIMING_DIV |
27232 | RET(150) |
27233 | #else |
27234 | RET(20) |
27235 | #endif |
27236 | } |
27237 | dst = DREGu32((Opcode >> 9) & 7); |
27238 | { |
27239 | u32 q, r; |
27240 | |
27241 | q = dst / src; |
27242 | r = dst % src; |
27243 | |
27244 | if (q & 0xFFFF0000) |
27245 | { |
27246 | flag_V = M68K_SR_V; |
27247 | #ifdef USE_CYCLONE_TIMING_DIV |
27248 | RET(150) |
27249 | #else |
27250 | RET(80) |
27251 | #endif |
27252 | } |
27253 | q &= 0x0000FFFF; |
27254 | flag_NotZ = q; |
27255 | flag_N = q >> 8; |
27256 | flag_V = flag_C = 0; |
27257 | res = q | (r << 16); |
27258 | DREGu32((Opcode >> 9) & 7) = res; |
27259 | } |
27260 | #ifdef USE_CYCLONE_TIMING_DIV |
27261 | RET(150) |
27262 | #else |
27263 | RET(100) |
27264 | #endif |
27265 | } |
27266 | |
27267 | // DIVU |
27268 | OPCODE(0x80F8) |
27269 | { |
27270 | u32 adr, res; |
27271 | u32 src, dst; |
27272 | |
27273 | FETCH_SWORD(adr); |
27274 | PRE_IO |
27275 | READ_WORD_F(adr, src) |
27276 | if (src == 0) |
27277 | { |
27278 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27279 | #ifdef USE_CYCLONE_TIMING_DIV |
27280 | RET(148) |
27281 | #else |
27282 | RET(18) |
27283 | #endif |
27284 | } |
27285 | dst = DREGu32((Opcode >> 9) & 7); |
27286 | { |
27287 | u32 q, r; |
27288 | |
27289 | q = dst / src; |
27290 | r = dst % src; |
27291 | |
27292 | if (q & 0xFFFF0000) |
27293 | { |
27294 | flag_V = M68K_SR_V; |
27295 | #ifdef USE_CYCLONE_TIMING_DIV |
27296 | RET(148) |
27297 | #else |
27298 | RET(78) |
27299 | #endif |
27300 | } |
27301 | q &= 0x0000FFFF; |
27302 | flag_NotZ = q; |
27303 | flag_N = q >> 8; |
27304 | flag_V = flag_C = 0; |
27305 | res = q | (r << 16); |
27306 | DREGu32((Opcode >> 9) & 7) = res; |
27307 | } |
27308 | #ifdef USE_CYCLONE_TIMING_DIV |
27309 | RET(148) |
27310 | #else |
27311 | RET(98) |
27312 | #endif |
27313 | } |
27314 | |
27315 | // DIVU |
27316 | OPCODE(0x80F9) |
27317 | { |
27318 | u32 adr, res; |
27319 | u32 src, dst; |
27320 | |
27321 | FETCH_LONG(adr); |
27322 | PRE_IO |
27323 | READ_WORD_F(adr, src) |
27324 | if (src == 0) |
27325 | { |
27326 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27327 | #ifdef USE_CYCLONE_TIMING_DIV |
27328 | RET(162) |
27329 | #else |
27330 | RET(22) |
27331 | #endif |
27332 | } |
27333 | dst = DREGu32((Opcode >> 9) & 7); |
27334 | { |
27335 | u32 q, r; |
27336 | |
27337 | q = dst / src; |
27338 | r = dst % src; |
27339 | |
27340 | if (q & 0xFFFF0000) |
27341 | { |
27342 | flag_V = M68K_SR_V; |
27343 | #ifdef USE_CYCLONE_TIMING_DIV |
27344 | RET(162) |
27345 | #else |
27346 | RET(82) |
27347 | #endif |
27348 | } |
27349 | q &= 0x0000FFFF; |
27350 | flag_NotZ = q; |
27351 | flag_N = q >> 8; |
27352 | flag_V = flag_C = 0; |
27353 | res = q | (r << 16); |
27354 | DREGu32((Opcode >> 9) & 7) = res; |
27355 | } |
27356 | #ifdef USE_CYCLONE_TIMING_DIV |
27357 | RET(162) |
27358 | #else |
27359 | RET(102) |
27360 | #endif |
27361 | } |
27362 | |
27363 | // DIVU |
27364 | OPCODE(0x80FA) |
27365 | { |
27366 | u32 adr, res; |
27367 | u32 src, dst; |
27368 | |
27369 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
27370 | PC++; |
27371 | PRE_IO |
27372 | READ_WORD_F(adr, src) |
27373 | if (src == 0) |
27374 | { |
27375 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27376 | #ifdef USE_CYCLONE_TIMING_DIV |
27377 | RET(148) |
27378 | #else |
27379 | RET(18) |
27380 | #endif |
27381 | } |
27382 | dst = DREGu32((Opcode >> 9) & 7); |
27383 | { |
27384 | u32 q, r; |
27385 | |
27386 | q = dst / src; |
27387 | r = dst % src; |
27388 | |
27389 | if (q & 0xFFFF0000) |
27390 | { |
27391 | flag_V = M68K_SR_V; |
27392 | #ifdef USE_CYCLONE_TIMING_DIV |
27393 | RET(148) |
27394 | #else |
27395 | RET(78) |
27396 | #endif |
27397 | } |
27398 | q &= 0x0000FFFF; |
27399 | flag_NotZ = q; |
27400 | flag_N = q >> 8; |
27401 | flag_V = flag_C = 0; |
27402 | res = q | (r << 16); |
27403 | DREGu32((Opcode >> 9) & 7) = res; |
27404 | } |
27405 | #ifdef USE_CYCLONE_TIMING_DIV |
27406 | RET(148) |
27407 | #else |
27408 | RET(98) |
27409 | #endif |
27410 | } |
27411 | |
27412 | // DIVU |
27413 | OPCODE(0x80FB) |
27414 | { |
27415 | u32 adr, res; |
27416 | u32 src, dst; |
27417 | |
27418 | adr = (u32)(PC) - BasePC; |
27419 | DECODE_EXT_WORD |
27420 | PRE_IO |
27421 | READ_WORD_F(adr, src) |
27422 | if (src == 0) |
27423 | { |
27424 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27425 | #ifdef USE_CYCLONE_TIMING_DIV |
27426 | RET(160) |
27427 | #else |
27428 | RET(20) |
27429 | #endif |
27430 | } |
27431 | dst = DREGu32((Opcode >> 9) & 7); |
27432 | { |
27433 | u32 q, r; |
27434 | |
27435 | q = dst / src; |
27436 | r = dst % src; |
27437 | |
27438 | if (q & 0xFFFF0000) |
27439 | { |
27440 | flag_V = M68K_SR_V; |
27441 | #ifdef USE_CYCLONE_TIMING_DIV |
27442 | RET(160) |
27443 | #else |
27444 | RET(80) |
27445 | #endif |
27446 | } |
27447 | q &= 0x0000FFFF; |
27448 | flag_NotZ = q; |
27449 | flag_N = q >> 8; |
27450 | flag_V = flag_C = 0; |
27451 | res = q | (r << 16); |
27452 | DREGu32((Opcode >> 9) & 7) = res; |
27453 | } |
27454 | #ifdef USE_CYCLONE_TIMING_DIV |
27455 | RET(160) |
27456 | #else |
27457 | RET(100) |
27458 | #endif |
27459 | } |
27460 | |
27461 | // DIVU |
27462 | OPCODE(0x80FC) |
27463 | { |
27464 | u32 adr, res; |
27465 | u32 src, dst; |
27466 | |
27467 | FETCH_WORD(src); |
27468 | if (src == 0) |
27469 | { |
27470 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27471 | #ifdef USE_CYCLONE_TIMING_DIV |
27472 | RET(144) |
27473 | #else |
27474 | RET(14) |
27475 | #endif |
27476 | } |
27477 | dst = DREGu32((Opcode >> 9) & 7); |
27478 | { |
27479 | u32 q, r; |
27480 | |
27481 | q = dst / src; |
27482 | r = dst % src; |
27483 | |
27484 | if (q & 0xFFFF0000) |
27485 | { |
27486 | flag_V = M68K_SR_V; |
27487 | #ifdef USE_CYCLONE_TIMING_DIV |
27488 | RET(144) |
27489 | #else |
27490 | RET(74) |
27491 | #endif |
27492 | } |
27493 | q &= 0x0000FFFF; |
27494 | flag_NotZ = q; |
27495 | flag_N = q >> 8; |
27496 | flag_V = flag_C = 0; |
27497 | res = q | (r << 16); |
27498 | DREGu32((Opcode >> 9) & 7) = res; |
27499 | } |
27500 | #ifdef USE_CYCLONE_TIMING_DIV |
27501 | RET(144) |
27502 | #else |
27503 | RET(94) |
27504 | #endif |
27505 | } |
27506 | |
27507 | // DIVU |
27508 | OPCODE(0x80DF) |
27509 | { |
27510 | u32 adr, res; |
27511 | u32 src, dst; |
27512 | |
27513 | adr = AREG(7); |
27514 | AREG(7) += 2; |
27515 | PRE_IO |
27516 | READ_WORD_F(adr, src) |
27517 | if (src == 0) |
27518 | { |
27519 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27520 | #ifdef USE_CYCLONE_TIMING_DIV |
27521 | RET(144) |
27522 | #else |
27523 | RET(14) |
27524 | #endif |
27525 | } |
27526 | dst = DREGu32((Opcode >> 9) & 7); |
27527 | { |
27528 | u32 q, r; |
27529 | |
27530 | q = dst / src; |
27531 | r = dst % src; |
27532 | |
27533 | if (q & 0xFFFF0000) |
27534 | { |
27535 | flag_V = M68K_SR_V; |
27536 | #ifdef USE_CYCLONE_TIMING_DIV |
27537 | RET(144) |
27538 | #else |
27539 | RET(74) |
27540 | #endif |
27541 | } |
27542 | q &= 0x0000FFFF; |
27543 | flag_NotZ = q; |
27544 | flag_N = q >> 8; |
27545 | flag_V = flag_C = 0; |
27546 | res = q | (r << 16); |
27547 | DREGu32((Opcode >> 9) & 7) = res; |
27548 | } |
27549 | #ifdef USE_CYCLONE_TIMING_DIV |
27550 | RET(144) |
27551 | #else |
27552 | RET(94) |
27553 | #endif |
27554 | } |
27555 | |
27556 | // DIVU |
27557 | OPCODE(0x80E7) |
27558 | { |
27559 | u32 adr, res; |
27560 | u32 src, dst; |
27561 | |
27562 | adr = AREG(7) - 2; |
27563 | AREG(7) = adr; |
27564 | PRE_IO |
27565 | READ_WORD_F(adr, src) |
27566 | if (src == 0) |
27567 | { |
27568 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27569 | #ifdef USE_CYCLONE_TIMING_DIV |
27570 | RET(146) |
27571 | #else |
27572 | RET(16) |
27573 | #endif |
27574 | } |
27575 | dst = DREGu32((Opcode >> 9) & 7); |
27576 | { |
27577 | u32 q, r; |
27578 | |
27579 | q = dst / src; |
27580 | r = dst % src; |
27581 | |
27582 | if (q & 0xFFFF0000) |
27583 | { |
27584 | flag_V = M68K_SR_V; |
27585 | #ifdef USE_CYCLONE_TIMING_DIV |
27586 | RET(146) |
27587 | #else |
27588 | RET(76) |
27589 | #endif |
27590 | } |
27591 | q &= 0x0000FFFF; |
27592 | flag_NotZ = q; |
27593 | flag_N = q >> 8; |
27594 | flag_V = flag_C = 0; |
27595 | res = q | (r << 16); |
27596 | DREGu32((Opcode >> 9) & 7) = res; |
27597 | } |
27598 | #ifdef USE_CYCLONE_TIMING_DIV |
27599 | RET(146) |
27600 | #else |
27601 | RET(96) |
27602 | #endif |
27603 | } |
27604 | |
27605 | // DIVS |
27606 | OPCODE(0x81C0) |
27607 | { |
27608 | u32 adr, res; |
27609 | u32 src, dst; |
27610 | |
27611 | src = (s32)DREGs16((Opcode >> 0) & 7); |
27612 | if (src == 0) |
27613 | { |
27614 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27615 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27616 | goto end81C0; |
70357ce5 |
27617 | #endif |
27618 | RET(10) |
27619 | } |
27620 | dst = DREGu32((Opcode >> 9) & 7); |
27621 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27622 | { |
27623 | flag_NotZ = flag_N = 0; |
27624 | flag_V = flag_C = 0; |
27625 | res = 0; |
27626 | DREGu32((Opcode >> 9) & 7) = res; |
27627 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27628 | goto end81C0; |
70357ce5 |
27629 | #endif |
27630 | RET(50) |
27631 | } |
27632 | { |
27633 | s32 q, r; |
27634 | |
27635 | q = (s32)dst / (s32)src; |
27636 | r = (s32)dst % (s32)src; |
27637 | |
27638 | if ((q > 0x7FFF) || (q < -0x8000)) |
27639 | { |
27640 | flag_V = M68K_SR_V; |
27641 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27642 | goto end81C0; |
70357ce5 |
27643 | #endif |
27644 | RET(80) |
27645 | } |
27646 | q &= 0x0000FFFF; |
27647 | flag_NotZ = q; |
27648 | flag_N = q >> 8; |
27649 | flag_V = flag_C = 0; |
27650 | res = q | (r << 16); |
27651 | DREGu32((Opcode >> 9) & 7) = res; |
27652 | } |
27653 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27654 | end81C0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27655 | #endif |
27656 | RET(108) |
27657 | } |
27658 | |
27659 | // DIVS |
27660 | OPCODE(0x81D0) |
27661 | { |
27662 | u32 adr, res; |
27663 | u32 src, dst; |
27664 | |
27665 | adr = AREG((Opcode >> 0) & 7); |
27666 | PRE_IO |
27667 | READSX_WORD_F(adr, src) |
27668 | if (src == 0) |
27669 | { |
27670 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27671 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27672 | goto end81D0; |
70357ce5 |
27673 | #endif |
27674 | RET(14) |
27675 | } |
27676 | dst = DREGu32((Opcode >> 9) & 7); |
27677 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27678 | { |
27679 | flag_NotZ = flag_N = 0; |
27680 | flag_V = flag_C = 0; |
27681 | res = 0; |
27682 | DREGu32((Opcode >> 9) & 7) = res; |
27683 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27684 | goto end81D0; |
70357ce5 |
27685 | #endif |
27686 | RET(54) |
27687 | } |
27688 | { |
27689 | s32 q, r; |
27690 | |
27691 | q = (s32)dst / (s32)src; |
27692 | r = (s32)dst % (s32)src; |
27693 | |
27694 | if ((q > 0x7FFF) || (q < -0x8000)) |
27695 | { |
27696 | flag_V = M68K_SR_V; |
27697 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27698 | goto end81D0; |
70357ce5 |
27699 | #endif |
27700 | RET(84) |
27701 | } |
27702 | q &= 0x0000FFFF; |
27703 | flag_NotZ = q; |
27704 | flag_N = q >> 8; |
27705 | flag_V = flag_C = 0; |
27706 | res = q | (r << 16); |
27707 | DREGu32((Opcode >> 9) & 7) = res; |
27708 | } |
27709 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27710 | end81D0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27711 | #endif |
27712 | RET(112) |
27713 | } |
27714 | |
27715 | // DIVS |
27716 | OPCODE(0x81D8) |
27717 | { |
27718 | u32 adr, res; |
27719 | u32 src, dst; |
27720 | |
27721 | adr = AREG((Opcode >> 0) & 7); |
27722 | AREG((Opcode >> 0) & 7) += 2; |
27723 | PRE_IO |
27724 | READSX_WORD_F(adr, src) |
27725 | if (src == 0) |
27726 | { |
27727 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27728 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27729 | goto end81D8; |
70357ce5 |
27730 | #endif |
27731 | RET(14) |
27732 | } |
27733 | dst = DREGu32((Opcode >> 9) & 7); |
27734 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27735 | { |
27736 | flag_NotZ = flag_N = 0; |
27737 | flag_V = flag_C = 0; |
27738 | res = 0; |
27739 | DREGu32((Opcode >> 9) & 7) = res; |
27740 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27741 | goto end81D8; |
70357ce5 |
27742 | #endif |
27743 | RET(54) |
27744 | } |
27745 | { |
27746 | s32 q, r; |
27747 | |
27748 | q = (s32)dst / (s32)src; |
27749 | r = (s32)dst % (s32)src; |
27750 | |
27751 | if ((q > 0x7FFF) || (q < -0x8000)) |
27752 | { |
27753 | flag_V = M68K_SR_V; |
27754 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27755 | goto end81D8; |
70357ce5 |
27756 | #endif |
27757 | RET(84) |
27758 | } |
27759 | q &= 0x0000FFFF; |
27760 | flag_NotZ = q; |
27761 | flag_N = q >> 8; |
27762 | flag_V = flag_C = 0; |
27763 | res = q | (r << 16); |
27764 | DREGu32((Opcode >> 9) & 7) = res; |
27765 | } |
27766 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27767 | end81D8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27768 | #endif |
27769 | RET(112) |
27770 | } |
27771 | |
27772 | // DIVS |
27773 | OPCODE(0x81E0) |
27774 | { |
27775 | u32 adr, res; |
27776 | u32 src, dst; |
27777 | |
27778 | adr = AREG((Opcode >> 0) & 7) - 2; |
27779 | AREG((Opcode >> 0) & 7) = adr; |
27780 | PRE_IO |
27781 | READSX_WORD_F(adr, src) |
27782 | if (src == 0) |
27783 | { |
27784 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27785 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27786 | goto end81E0; |
70357ce5 |
27787 | #endif |
27788 | RET(16) |
27789 | } |
27790 | dst = DREGu32((Opcode >> 9) & 7); |
27791 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27792 | { |
27793 | flag_NotZ = flag_N = 0; |
27794 | flag_V = flag_C = 0; |
27795 | res = 0; |
27796 | DREGu32((Opcode >> 9) & 7) = res; |
27797 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27798 | goto end81E0; |
70357ce5 |
27799 | #endif |
27800 | RET(56) |
27801 | } |
27802 | { |
27803 | s32 q, r; |
27804 | |
27805 | q = (s32)dst / (s32)src; |
27806 | r = (s32)dst % (s32)src; |
27807 | |
27808 | if ((q > 0x7FFF) || (q < -0x8000)) |
27809 | { |
27810 | flag_V = M68K_SR_V; |
27811 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27812 | goto end81E0; |
70357ce5 |
27813 | #endif |
27814 | RET(86) |
27815 | } |
27816 | q &= 0x0000FFFF; |
27817 | flag_NotZ = q; |
27818 | flag_N = q >> 8; |
27819 | flag_V = flag_C = 0; |
27820 | res = q | (r << 16); |
27821 | DREGu32((Opcode >> 9) & 7) = res; |
27822 | } |
27823 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27824 | end81E0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27825 | #endif |
27826 | RET(114) |
27827 | } |
27828 | |
27829 | // DIVS |
27830 | OPCODE(0x81E8) |
27831 | { |
27832 | u32 adr, res; |
27833 | u32 src, dst; |
27834 | |
27835 | FETCH_SWORD(adr); |
27836 | adr += AREG((Opcode >> 0) & 7); |
27837 | PRE_IO |
27838 | READSX_WORD_F(adr, src) |
27839 | if (src == 0) |
27840 | { |
27841 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27842 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27843 | goto end81E8; |
70357ce5 |
27844 | #endif |
27845 | RET(18) |
27846 | } |
27847 | dst = DREGu32((Opcode >> 9) & 7); |
27848 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27849 | { |
27850 | flag_NotZ = flag_N = 0; |
27851 | flag_V = flag_C = 0; |
27852 | res = 0; |
27853 | DREGu32((Opcode >> 9) & 7) = res; |
27854 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27855 | goto end81E8; |
70357ce5 |
27856 | #endif |
27857 | RET(58) |
27858 | } |
27859 | { |
27860 | s32 q, r; |
27861 | |
27862 | q = (s32)dst / (s32)src; |
27863 | r = (s32)dst % (s32)src; |
27864 | |
27865 | if ((q > 0x7FFF) || (q < -0x8000)) |
27866 | { |
27867 | flag_V = M68K_SR_V; |
27868 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27869 | goto end81E8; |
70357ce5 |
27870 | #endif |
27871 | RET(88) |
27872 | } |
27873 | q &= 0x0000FFFF; |
27874 | flag_NotZ = q; |
27875 | flag_N = q >> 8; |
27876 | flag_V = flag_C = 0; |
27877 | res = q | (r << 16); |
27878 | DREGu32((Opcode >> 9) & 7) = res; |
27879 | } |
27880 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27881 | end81E8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27882 | #endif |
27883 | RET(116) |
27884 | } |
27885 | |
27886 | // DIVS |
27887 | OPCODE(0x81F0) |
27888 | { |
27889 | u32 adr, res; |
27890 | u32 src, dst; |
27891 | |
27892 | adr = AREG((Opcode >> 0) & 7); |
27893 | DECODE_EXT_WORD |
27894 | PRE_IO |
27895 | READSX_WORD_F(adr, src) |
27896 | if (src == 0) |
27897 | { |
27898 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27899 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27900 | goto end81F0; |
70357ce5 |
27901 | #endif |
27902 | RET(20) |
27903 | } |
27904 | dst = DREGu32((Opcode >> 9) & 7); |
27905 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27906 | { |
27907 | flag_NotZ = flag_N = 0; |
27908 | flag_V = flag_C = 0; |
27909 | res = 0; |
27910 | DREGu32((Opcode >> 9) & 7) = res; |
27911 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27912 | goto end81F0; |
70357ce5 |
27913 | #endif |
27914 | RET(60) |
27915 | } |
27916 | { |
27917 | s32 q, r; |
27918 | |
27919 | q = (s32)dst / (s32)src; |
27920 | r = (s32)dst % (s32)src; |
27921 | |
27922 | if ((q > 0x7FFF) || (q < -0x8000)) |
27923 | { |
27924 | flag_V = M68K_SR_V; |
27925 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27926 | goto end81F0; |
70357ce5 |
27927 | #endif |
27928 | RET(90) |
27929 | } |
27930 | q &= 0x0000FFFF; |
27931 | flag_NotZ = q; |
27932 | flag_N = q >> 8; |
27933 | flag_V = flag_C = 0; |
27934 | res = q | (r << 16); |
27935 | DREGu32((Opcode >> 9) & 7) = res; |
27936 | } |
27937 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27938 | end81F0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27939 | #endif |
27940 | RET(118) |
27941 | } |
27942 | |
27943 | // DIVS |
27944 | OPCODE(0x81F8) |
27945 | { |
27946 | u32 adr, res; |
27947 | u32 src, dst; |
27948 | |
27949 | FETCH_SWORD(adr); |
27950 | PRE_IO |
27951 | READSX_WORD_F(adr, src) |
27952 | if (src == 0) |
27953 | { |
27954 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27955 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27956 | goto end81F8; |
70357ce5 |
27957 | #endif |
27958 | RET(18) |
27959 | } |
27960 | dst = DREGu32((Opcode >> 9) & 7); |
27961 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27962 | { |
27963 | flag_NotZ = flag_N = 0; |
27964 | flag_V = flag_C = 0; |
27965 | res = 0; |
27966 | DREGu32((Opcode >> 9) & 7) = res; |
27967 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27968 | goto end81F8; |
70357ce5 |
27969 | #endif |
27970 | RET(58) |
27971 | } |
27972 | { |
27973 | s32 q, r; |
27974 | |
27975 | q = (s32)dst / (s32)src; |
27976 | r = (s32)dst % (s32)src; |
27977 | |
27978 | if ((q > 0x7FFF) || (q < -0x8000)) |
27979 | { |
27980 | flag_V = M68K_SR_V; |
27981 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27982 | goto end81F8; |
70357ce5 |
27983 | #endif |
27984 | RET(88) |
27985 | } |
27986 | q &= 0x0000FFFF; |
27987 | flag_NotZ = q; |
27988 | flag_N = q >> 8; |
27989 | flag_V = flag_C = 0; |
27990 | res = q | (r << 16); |
27991 | DREGu32((Opcode >> 9) & 7) = res; |
27992 | } |
27993 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27994 | end81F8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27995 | #endif |
27996 | RET(116) |
27997 | } |
27998 | |
27999 | // DIVS |
28000 | OPCODE(0x81F9) |
28001 | { |
28002 | u32 adr, res; |
28003 | u32 src, dst; |
28004 | |
28005 | FETCH_LONG(adr); |
28006 | PRE_IO |
28007 | READSX_WORD_F(adr, src) |
28008 | if (src == 0) |
28009 | { |
28010 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28011 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28012 | goto end81F9; |
70357ce5 |
28013 | #endif |
28014 | RET(22) |
28015 | } |
28016 | dst = DREGu32((Opcode >> 9) & 7); |
28017 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28018 | { |
28019 | flag_NotZ = flag_N = 0; |
28020 | flag_V = flag_C = 0; |
28021 | res = 0; |
28022 | DREGu32((Opcode >> 9) & 7) = res; |
28023 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28024 | goto end81F9; |
70357ce5 |
28025 | #endif |
28026 | RET(62) |
28027 | } |
28028 | { |
28029 | s32 q, r; |
28030 | |
28031 | q = (s32)dst / (s32)src; |
28032 | r = (s32)dst % (s32)src; |
28033 | |
28034 | if ((q > 0x7FFF) || (q < -0x8000)) |
28035 | { |
28036 | flag_V = M68K_SR_V; |
28037 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28038 | goto end81F9; |
70357ce5 |
28039 | #endif |
28040 | RET(92) |
28041 | } |
28042 | q &= 0x0000FFFF; |
28043 | flag_NotZ = q; |
28044 | flag_N = q >> 8; |
28045 | flag_V = flag_C = 0; |
28046 | res = q | (r << 16); |
28047 | DREGu32((Opcode >> 9) & 7) = res; |
28048 | } |
28049 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28050 | end81F9: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28051 | #endif |
28052 | RET(120) |
28053 | } |
28054 | |
28055 | // DIVS |
28056 | OPCODE(0x81FA) |
28057 | { |
28058 | u32 adr, res; |
28059 | u32 src, dst; |
28060 | |
28061 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28062 | PC++; |
28063 | PRE_IO |
28064 | READSX_WORD_F(adr, src) |
28065 | if (src == 0) |
28066 | { |
28067 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28068 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28069 | goto end81FA; |
70357ce5 |
28070 | #endif |
28071 | RET(18) |
28072 | } |
28073 | dst = DREGu32((Opcode >> 9) & 7); |
28074 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28075 | { |
28076 | flag_NotZ = flag_N = 0; |
28077 | flag_V = flag_C = 0; |
28078 | res = 0; |
28079 | DREGu32((Opcode >> 9) & 7) = res; |
28080 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28081 | goto end81FA; |
70357ce5 |
28082 | #endif |
28083 | RET(58) |
28084 | } |
28085 | { |
28086 | s32 q, r; |
28087 | |
28088 | q = (s32)dst / (s32)src; |
28089 | r = (s32)dst % (s32)src; |
28090 | |
28091 | if ((q > 0x7FFF) || (q < -0x8000)) |
28092 | { |
28093 | flag_V = M68K_SR_V; |
28094 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28095 | goto end81FA; |
70357ce5 |
28096 | #endif |
28097 | RET(88) |
28098 | } |
28099 | q &= 0x0000FFFF; |
28100 | flag_NotZ = q; |
28101 | flag_N = q >> 8; |
28102 | flag_V = flag_C = 0; |
28103 | res = q | (r << 16); |
28104 | DREGu32((Opcode >> 9) & 7) = res; |
28105 | } |
28106 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28107 | end81FA: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28108 | #endif |
28109 | RET(116) |
28110 | } |
28111 | |
28112 | // DIVS |
28113 | OPCODE(0x81FB) |
28114 | { |
28115 | u32 adr, res; |
28116 | u32 src, dst; |
28117 | |
28118 | adr = (u32)(PC) - BasePC; |
28119 | DECODE_EXT_WORD |
28120 | PRE_IO |
28121 | READSX_WORD_F(adr, src) |
28122 | if (src == 0) |
28123 | { |
28124 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28125 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28126 | goto end81FB; |
70357ce5 |
28127 | #endif |
28128 | RET(20) |
28129 | } |
28130 | dst = DREGu32((Opcode >> 9) & 7); |
28131 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28132 | { |
28133 | flag_NotZ = flag_N = 0; |
28134 | flag_V = flag_C = 0; |
28135 | res = 0; |
28136 | DREGu32((Opcode >> 9) & 7) = res; |
28137 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28138 | goto end81FB; |
70357ce5 |
28139 | #endif |
28140 | RET(60) |
28141 | } |
28142 | { |
28143 | s32 q, r; |
28144 | |
28145 | q = (s32)dst / (s32)src; |
28146 | r = (s32)dst % (s32)src; |
28147 | |
28148 | if ((q > 0x7FFF) || (q < -0x8000)) |
28149 | { |
28150 | flag_V = M68K_SR_V; |
28151 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28152 | goto end81FB; |
70357ce5 |
28153 | #endif |
28154 | RET(90) |
28155 | } |
28156 | q &= 0x0000FFFF; |
28157 | flag_NotZ = q; |
28158 | flag_N = q >> 8; |
28159 | flag_V = flag_C = 0; |
28160 | res = q | (r << 16); |
28161 | DREGu32((Opcode >> 9) & 7) = res; |
28162 | } |
28163 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28164 | end81FB: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28165 | #endif |
28166 | RET(118) |
28167 | } |
28168 | |
28169 | // DIVS |
28170 | OPCODE(0x81FC) |
28171 | { |
28172 | u32 adr, res; |
28173 | u32 src, dst; |
28174 | |
28175 | FETCH_SWORD(src); |
28176 | if (src == 0) |
28177 | { |
28178 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28179 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28180 | goto end81FC; |
70357ce5 |
28181 | #endif |
28182 | RET(14) |
28183 | } |
28184 | dst = DREGu32((Opcode >> 9) & 7); |
28185 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28186 | { |
28187 | flag_NotZ = flag_N = 0; |
28188 | flag_V = flag_C = 0; |
28189 | res = 0; |
28190 | DREGu32((Opcode >> 9) & 7) = res; |
28191 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28192 | goto end81FC; |
70357ce5 |
28193 | #endif |
28194 | RET(54) |
28195 | } |
28196 | { |
28197 | s32 q, r; |
28198 | |
28199 | q = (s32)dst / (s32)src; |
28200 | r = (s32)dst % (s32)src; |
28201 | |
28202 | if ((q > 0x7FFF) || (q < -0x8000)) |
28203 | { |
28204 | flag_V = M68K_SR_V; |
28205 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28206 | goto end81FC; |
70357ce5 |
28207 | #endif |
28208 | RET(84) |
28209 | } |
28210 | q &= 0x0000FFFF; |
28211 | flag_NotZ = q; |
28212 | flag_N = q >> 8; |
28213 | flag_V = flag_C = 0; |
28214 | res = q | (r << 16); |
28215 | DREGu32((Opcode >> 9) & 7) = res; |
28216 | } |
28217 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28218 | end81FC: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28219 | #endif |
28220 | RET(112) |
28221 | } |
28222 | |
28223 | // DIVS |
28224 | OPCODE(0x81DF) |
28225 | { |
28226 | u32 adr, res; |
28227 | u32 src, dst; |
28228 | |
28229 | adr = AREG(7); |
28230 | AREG(7) += 2; |
28231 | PRE_IO |
28232 | READSX_WORD_F(adr, src) |
28233 | if (src == 0) |
28234 | { |
28235 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28236 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28237 | goto end81DF; |
70357ce5 |
28238 | #endif |
28239 | RET(14) |
28240 | } |
28241 | dst = DREGu32((Opcode >> 9) & 7); |
28242 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28243 | { |
28244 | flag_NotZ = flag_N = 0; |
28245 | flag_V = flag_C = 0; |
28246 | res = 0; |
28247 | DREGu32((Opcode >> 9) & 7) = res; |
28248 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28249 | goto end81DF; |
70357ce5 |
28250 | #endif |
28251 | RET(54) |
28252 | } |
28253 | { |
28254 | s32 q, r; |
28255 | |
28256 | q = (s32)dst / (s32)src; |
28257 | r = (s32)dst % (s32)src; |
28258 | |
28259 | if ((q > 0x7FFF) || (q < -0x8000)) |
28260 | { |
28261 | flag_V = M68K_SR_V; |
28262 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28263 | goto end81DF; |
70357ce5 |
28264 | #endif |
28265 | RET(84) |
28266 | } |
28267 | q &= 0x0000FFFF; |
28268 | flag_NotZ = q; |
28269 | flag_N = q >> 8; |
28270 | flag_V = flag_C = 0; |
28271 | res = q | (r << 16); |
28272 | DREGu32((Opcode >> 9) & 7) = res; |
28273 | } |
28274 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28275 | end81DF: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28276 | #endif |
28277 | RET(112) |
28278 | } |
28279 | |
28280 | // DIVS |
28281 | OPCODE(0x81E7) |
28282 | { |
28283 | u32 adr, res; |
28284 | u32 src, dst; |
28285 | |
28286 | adr = AREG(7) - 2; |
28287 | AREG(7) = adr; |
28288 | PRE_IO |
28289 | READSX_WORD_F(adr, src) |
28290 | if (src == 0) |
28291 | { |
28292 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28293 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28294 | goto end81E7; |
70357ce5 |
28295 | #endif |
28296 | RET(16) |
28297 | } |
28298 | dst = DREGu32((Opcode >> 9) & 7); |
28299 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28300 | { |
28301 | flag_NotZ = flag_N = 0; |
28302 | flag_V = flag_C = 0; |
28303 | res = 0; |
28304 | DREGu32((Opcode >> 9) & 7) = res; |
28305 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28306 | goto end81E7; |
70357ce5 |
28307 | #endif |
28308 | RET(56) |
28309 | } |
28310 | { |
28311 | s32 q, r; |
28312 | |
28313 | q = (s32)dst / (s32)src; |
28314 | r = (s32)dst % (s32)src; |
28315 | |
28316 | if ((q > 0x7FFF) || (q < -0x8000)) |
28317 | { |
28318 | flag_V = M68K_SR_V; |
28319 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28320 | goto end81E7; |
70357ce5 |
28321 | #endif |
28322 | RET(86) |
28323 | } |
28324 | q &= 0x0000FFFF; |
28325 | flag_NotZ = q; |
28326 | flag_N = q >> 8; |
28327 | flag_V = flag_C = 0; |
28328 | res = q | (r << 16); |
28329 | DREGu32((Opcode >> 9) & 7) = res; |
28330 | } |
28331 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28332 | end81E7: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28333 | #endif |
28334 | RET(114) |
28335 | } |
28336 | |
28337 | // SUBaD |
28338 | OPCODE(0x9000) |
28339 | { |
28340 | u32 adr, res; |
28341 | u32 src, dst; |
28342 | |
28343 | src = DREGu8((Opcode >> 0) & 7); |
28344 | dst = DREGu8((Opcode >> 9) & 7); |
28345 | res = dst - src; |
28346 | flag_N = flag_X = flag_C = res; |
28347 | flag_V = (src ^ dst) & (res ^ dst); |
28348 | flag_NotZ = res & 0xFF; |
28349 | DREGu8((Opcode >> 9) & 7) = res; |
28350 | RET(4) |
28351 | } |
28352 | |
28353 | // SUBaD |
03e4f2a3 |
28354 | #if 0 |
70357ce5 |
28355 | OPCODE(0x9008) |
28356 | { |
28357 | u32 adr, res; |
28358 | u32 src, dst; |
28359 | |
28360 | // can't read byte from Ax registers ! |
28361 | m68kcontext.execinfo |= M68K_FAULTED; |
28362 | m68kcontext.io_cycle_counter = 0; |
28363 | /* |
28364 | goto famec_Exec_End; |
28365 | dst = DREGu8((Opcode >> 9) & 7); |
28366 | res = dst - src; |
28367 | flag_N = flag_X = flag_C = res; |
28368 | flag_V = (src ^ dst) & (res ^ dst); |
28369 | flag_NotZ = res & 0xFF; |
28370 | DREGu8((Opcode >> 9) & 7) = res; |
28371 | */ |
28372 | RET(4) |
28373 | } |
03e4f2a3 |
28374 | #endif |
70357ce5 |
28375 | |
28376 | // SUBaD |
28377 | OPCODE(0x9010) |
28378 | { |
28379 | u32 adr, res; |
28380 | u32 src, dst; |
28381 | |
28382 | adr = AREG((Opcode >> 0) & 7); |
28383 | PRE_IO |
28384 | READ_BYTE_F(adr, src) |
28385 | dst = DREGu8((Opcode >> 9) & 7); |
28386 | res = dst - src; |
28387 | flag_N = flag_X = flag_C = res; |
28388 | flag_V = (src ^ dst) & (res ^ dst); |
28389 | flag_NotZ = res & 0xFF; |
28390 | DREGu8((Opcode >> 9) & 7) = res; |
28391 | POST_IO |
28392 | RET(8) |
28393 | } |
28394 | |
28395 | // SUBaD |
28396 | OPCODE(0x9018) |
28397 | { |
28398 | u32 adr, res; |
28399 | u32 src, dst; |
28400 | |
28401 | adr = AREG((Opcode >> 0) & 7); |
28402 | AREG((Opcode >> 0) & 7) += 1; |
28403 | PRE_IO |
28404 | READ_BYTE_F(adr, src) |
28405 | dst = DREGu8((Opcode >> 9) & 7); |
28406 | res = dst - src; |
28407 | flag_N = flag_X = flag_C = res; |
28408 | flag_V = (src ^ dst) & (res ^ dst); |
28409 | flag_NotZ = res & 0xFF; |
28410 | DREGu8((Opcode >> 9) & 7) = res; |
28411 | POST_IO |
28412 | RET(8) |
28413 | } |
28414 | |
28415 | // SUBaD |
28416 | OPCODE(0x9020) |
28417 | { |
28418 | u32 adr, res; |
28419 | u32 src, dst; |
28420 | |
28421 | adr = AREG((Opcode >> 0) & 7) - 1; |
28422 | AREG((Opcode >> 0) & 7) = adr; |
28423 | PRE_IO |
28424 | READ_BYTE_F(adr, src) |
28425 | dst = DREGu8((Opcode >> 9) & 7); |
28426 | res = dst - src; |
28427 | flag_N = flag_X = flag_C = res; |
28428 | flag_V = (src ^ dst) & (res ^ dst); |
28429 | flag_NotZ = res & 0xFF; |
28430 | DREGu8((Opcode >> 9) & 7) = res; |
28431 | POST_IO |
28432 | RET(10) |
28433 | } |
28434 | |
28435 | // SUBaD |
28436 | OPCODE(0x9028) |
28437 | { |
28438 | u32 adr, res; |
28439 | u32 src, dst; |
28440 | |
28441 | FETCH_SWORD(adr); |
28442 | adr += AREG((Opcode >> 0) & 7); |
28443 | PRE_IO |
28444 | READ_BYTE_F(adr, src) |
28445 | dst = DREGu8((Opcode >> 9) & 7); |
28446 | res = dst - src; |
28447 | flag_N = flag_X = flag_C = res; |
28448 | flag_V = (src ^ dst) & (res ^ dst); |
28449 | flag_NotZ = res & 0xFF; |
28450 | DREGu8((Opcode >> 9) & 7) = res; |
28451 | POST_IO |
28452 | RET(12) |
28453 | } |
28454 | |
28455 | // SUBaD |
28456 | OPCODE(0x9030) |
28457 | { |
28458 | u32 adr, res; |
28459 | u32 src, dst; |
28460 | |
28461 | adr = AREG((Opcode >> 0) & 7); |
28462 | DECODE_EXT_WORD |
28463 | PRE_IO |
28464 | READ_BYTE_F(adr, src) |
28465 | dst = DREGu8((Opcode >> 9) & 7); |
28466 | res = dst - src; |
28467 | flag_N = flag_X = flag_C = res; |
28468 | flag_V = (src ^ dst) & (res ^ dst); |
28469 | flag_NotZ = res & 0xFF; |
28470 | DREGu8((Opcode >> 9) & 7) = res; |
28471 | POST_IO |
28472 | RET(14) |
28473 | } |
28474 | |
28475 | // SUBaD |
28476 | OPCODE(0x9038) |
28477 | { |
28478 | u32 adr, res; |
28479 | u32 src, dst; |
28480 | |
28481 | FETCH_SWORD(adr); |
28482 | PRE_IO |
28483 | READ_BYTE_F(adr, src) |
28484 | dst = DREGu8((Opcode >> 9) & 7); |
28485 | res = dst - src; |
28486 | flag_N = flag_X = flag_C = res; |
28487 | flag_V = (src ^ dst) & (res ^ dst); |
28488 | flag_NotZ = res & 0xFF; |
28489 | DREGu8((Opcode >> 9) & 7) = res; |
28490 | POST_IO |
28491 | RET(12) |
28492 | } |
28493 | |
28494 | // SUBaD |
28495 | OPCODE(0x9039) |
28496 | { |
28497 | u32 adr, res; |
28498 | u32 src, dst; |
28499 | |
28500 | FETCH_LONG(adr); |
28501 | PRE_IO |
28502 | READ_BYTE_F(adr, src) |
28503 | dst = DREGu8((Opcode >> 9) & 7); |
28504 | res = dst - src; |
28505 | flag_N = flag_X = flag_C = res; |
28506 | flag_V = (src ^ dst) & (res ^ dst); |
28507 | flag_NotZ = res & 0xFF; |
28508 | DREGu8((Opcode >> 9) & 7) = res; |
28509 | POST_IO |
28510 | RET(16) |
28511 | } |
28512 | |
28513 | // SUBaD |
28514 | OPCODE(0x903A) |
28515 | { |
28516 | u32 adr, res; |
28517 | u32 src, dst; |
28518 | |
28519 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28520 | PC++; |
28521 | PRE_IO |
28522 | READ_BYTE_F(adr, src) |
28523 | dst = DREGu8((Opcode >> 9) & 7); |
28524 | res = dst - src; |
28525 | flag_N = flag_X = flag_C = res; |
28526 | flag_V = (src ^ dst) & (res ^ dst); |
28527 | flag_NotZ = res & 0xFF; |
28528 | DREGu8((Opcode >> 9) & 7) = res; |
28529 | POST_IO |
28530 | RET(12) |
28531 | } |
28532 | |
28533 | // SUBaD |
28534 | OPCODE(0x903B) |
28535 | { |
28536 | u32 adr, res; |
28537 | u32 src, dst; |
28538 | |
28539 | adr = (u32)(PC) - BasePC; |
28540 | DECODE_EXT_WORD |
28541 | PRE_IO |
28542 | READ_BYTE_F(adr, src) |
28543 | dst = DREGu8((Opcode >> 9) & 7); |
28544 | res = dst - src; |
28545 | flag_N = flag_X = flag_C = res; |
28546 | flag_V = (src ^ dst) & (res ^ dst); |
28547 | flag_NotZ = res & 0xFF; |
28548 | DREGu8((Opcode >> 9) & 7) = res; |
28549 | POST_IO |
28550 | RET(14) |
28551 | } |
28552 | |
28553 | // SUBaD |
28554 | OPCODE(0x903C) |
28555 | { |
28556 | u32 adr, res; |
28557 | u32 src, dst; |
28558 | |
28559 | FETCH_BYTE(src); |
28560 | dst = DREGu8((Opcode >> 9) & 7); |
28561 | res = dst - src; |
28562 | flag_N = flag_X = flag_C = res; |
28563 | flag_V = (src ^ dst) & (res ^ dst); |
28564 | flag_NotZ = res & 0xFF; |
28565 | DREGu8((Opcode >> 9) & 7) = res; |
28566 | RET(8) |
28567 | } |
28568 | |
28569 | // SUBaD |
28570 | OPCODE(0x901F) |
28571 | { |
28572 | u32 adr, res; |
28573 | u32 src, dst; |
28574 | |
28575 | adr = AREG(7); |
28576 | AREG(7) += 2; |
28577 | PRE_IO |
28578 | READ_BYTE_F(adr, src) |
28579 | dst = DREGu8((Opcode >> 9) & 7); |
28580 | res = dst - src; |
28581 | flag_N = flag_X = flag_C = res; |
28582 | flag_V = (src ^ dst) & (res ^ dst); |
28583 | flag_NotZ = res & 0xFF; |
28584 | DREGu8((Opcode >> 9) & 7) = res; |
28585 | POST_IO |
28586 | RET(8) |
28587 | } |
28588 | |
28589 | // SUBaD |
28590 | OPCODE(0x9027) |
28591 | { |
28592 | u32 adr, res; |
28593 | u32 src, dst; |
28594 | |
28595 | adr = AREG(7) - 2; |
28596 | AREG(7) = adr; |
28597 | PRE_IO |
28598 | READ_BYTE_F(adr, src) |
28599 | dst = DREGu8((Opcode >> 9) & 7); |
28600 | res = dst - src; |
28601 | flag_N = flag_X = flag_C = res; |
28602 | flag_V = (src ^ dst) & (res ^ dst); |
28603 | flag_NotZ = res & 0xFF; |
28604 | DREGu8((Opcode >> 9) & 7) = res; |
28605 | POST_IO |
28606 | RET(10) |
28607 | } |
28608 | |
28609 | // SUBaD |
28610 | OPCODE(0x9040) |
28611 | { |
28612 | u32 adr, res; |
28613 | u32 src, dst; |
28614 | |
28615 | src = DREGu16((Opcode >> 0) & 7); |
28616 | dst = DREGu16((Opcode >> 9) & 7); |
28617 | res = dst - src; |
28618 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28619 | flag_N = flag_X = flag_C = res >> 8; |
28620 | flag_NotZ = res & 0xFFFF; |
28621 | DREGu16((Opcode >> 9) & 7) = res; |
28622 | RET(4) |
28623 | } |
28624 | |
28625 | // SUBaD |
28626 | OPCODE(0x9048) |
28627 | { |
28628 | u32 adr, res; |
28629 | u32 src, dst; |
28630 | |
28631 | src = AREGu16((Opcode >> 0) & 7); |
28632 | dst = DREGu16((Opcode >> 9) & 7); |
28633 | res = dst - src; |
28634 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28635 | flag_N = flag_X = flag_C = res >> 8; |
28636 | flag_NotZ = res & 0xFFFF; |
28637 | DREGu16((Opcode >> 9) & 7) = res; |
28638 | RET(4) |
28639 | } |
28640 | |
28641 | // SUBaD |
28642 | OPCODE(0x9050) |
28643 | { |
28644 | u32 adr, res; |
28645 | u32 src, dst; |
28646 | |
28647 | adr = AREG((Opcode >> 0) & 7); |
28648 | PRE_IO |
28649 | READ_WORD_F(adr, src) |
28650 | dst = DREGu16((Opcode >> 9) & 7); |
28651 | res = dst - src; |
28652 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28653 | flag_N = flag_X = flag_C = res >> 8; |
28654 | flag_NotZ = res & 0xFFFF; |
28655 | DREGu16((Opcode >> 9) & 7) = res; |
28656 | POST_IO |
28657 | RET(8) |
28658 | } |
28659 | |
28660 | // SUBaD |
28661 | OPCODE(0x9058) |
28662 | { |
28663 | u32 adr, res; |
28664 | u32 src, dst; |
28665 | |
28666 | adr = AREG((Opcode >> 0) & 7); |
28667 | AREG((Opcode >> 0) & 7) += 2; |
28668 | PRE_IO |
28669 | READ_WORD_F(adr, src) |
28670 | dst = DREGu16((Opcode >> 9) & 7); |
28671 | res = dst - src; |
28672 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28673 | flag_N = flag_X = flag_C = res >> 8; |
28674 | flag_NotZ = res & 0xFFFF; |
28675 | DREGu16((Opcode >> 9) & 7) = res; |
28676 | POST_IO |
28677 | RET(8) |
28678 | } |
28679 | |
28680 | // SUBaD |
28681 | OPCODE(0x9060) |
28682 | { |
28683 | u32 adr, res; |
28684 | u32 src, dst; |
28685 | |
28686 | adr = AREG((Opcode >> 0) & 7) - 2; |
28687 | AREG((Opcode >> 0) & 7) = adr; |
28688 | PRE_IO |
28689 | READ_WORD_F(adr, src) |
28690 | dst = DREGu16((Opcode >> 9) & 7); |
28691 | res = dst - src; |
28692 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28693 | flag_N = flag_X = flag_C = res >> 8; |
28694 | flag_NotZ = res & 0xFFFF; |
28695 | DREGu16((Opcode >> 9) & 7) = res; |
28696 | POST_IO |
28697 | RET(10) |
28698 | } |
28699 | |
28700 | // SUBaD |
28701 | OPCODE(0x9068) |
28702 | { |
28703 | u32 adr, res; |
28704 | u32 src, dst; |
28705 | |
28706 | FETCH_SWORD(adr); |
28707 | adr += AREG((Opcode >> 0) & 7); |
28708 | PRE_IO |
28709 | READ_WORD_F(adr, src) |
28710 | dst = DREGu16((Opcode >> 9) & 7); |
28711 | res = dst - src; |
28712 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28713 | flag_N = flag_X = flag_C = res >> 8; |
28714 | flag_NotZ = res & 0xFFFF; |
28715 | DREGu16((Opcode >> 9) & 7) = res; |
28716 | POST_IO |
28717 | RET(12) |
28718 | } |
28719 | |
28720 | // SUBaD |
28721 | OPCODE(0x9070) |
28722 | { |
28723 | u32 adr, res; |
28724 | u32 src, dst; |
28725 | |
28726 | adr = AREG((Opcode >> 0) & 7); |
28727 | DECODE_EXT_WORD |
28728 | PRE_IO |
28729 | READ_WORD_F(adr, src) |
28730 | dst = DREGu16((Opcode >> 9) & 7); |
28731 | res = dst - src; |
28732 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28733 | flag_N = flag_X = flag_C = res >> 8; |
28734 | flag_NotZ = res & 0xFFFF; |
28735 | DREGu16((Opcode >> 9) & 7) = res; |
28736 | POST_IO |
28737 | RET(14) |
28738 | } |
28739 | |
28740 | // SUBaD |
28741 | OPCODE(0x9078) |
28742 | { |
28743 | u32 adr, res; |
28744 | u32 src, dst; |
28745 | |
28746 | FETCH_SWORD(adr); |
28747 | PRE_IO |
28748 | READ_WORD_F(adr, src) |
28749 | dst = DREGu16((Opcode >> 9) & 7); |
28750 | res = dst - src; |
28751 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28752 | flag_N = flag_X = flag_C = res >> 8; |
28753 | flag_NotZ = res & 0xFFFF; |
28754 | DREGu16((Opcode >> 9) & 7) = res; |
28755 | POST_IO |
28756 | RET(12) |
28757 | } |
28758 | |
28759 | // SUBaD |
28760 | OPCODE(0x9079) |
28761 | { |
28762 | u32 adr, res; |
28763 | u32 src, dst; |
28764 | |
28765 | FETCH_LONG(adr); |
28766 | PRE_IO |
28767 | READ_WORD_F(adr, src) |
28768 | dst = DREGu16((Opcode >> 9) & 7); |
28769 | res = dst - src; |
28770 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28771 | flag_N = flag_X = flag_C = res >> 8; |
28772 | flag_NotZ = res & 0xFFFF; |
28773 | DREGu16((Opcode >> 9) & 7) = res; |
28774 | POST_IO |
28775 | RET(16) |
28776 | } |
28777 | |
28778 | // SUBaD |
28779 | OPCODE(0x907A) |
28780 | { |
28781 | u32 adr, res; |
28782 | u32 src, dst; |
28783 | |
28784 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28785 | PC++; |
28786 | PRE_IO |
28787 | READ_WORD_F(adr, src) |
28788 | dst = DREGu16((Opcode >> 9) & 7); |
28789 | res = dst - src; |
28790 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28791 | flag_N = flag_X = flag_C = res >> 8; |
28792 | flag_NotZ = res & 0xFFFF; |
28793 | DREGu16((Opcode >> 9) & 7) = res; |
28794 | POST_IO |
28795 | RET(12) |
28796 | } |
28797 | |
28798 | // SUBaD |
28799 | OPCODE(0x907B) |
28800 | { |
28801 | u32 adr, res; |
28802 | u32 src, dst; |
28803 | |
28804 | adr = (u32)(PC) - BasePC; |
28805 | DECODE_EXT_WORD |
28806 | PRE_IO |
28807 | READ_WORD_F(adr, src) |
28808 | dst = DREGu16((Opcode >> 9) & 7); |
28809 | res = dst - src; |
28810 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28811 | flag_N = flag_X = flag_C = res >> 8; |
28812 | flag_NotZ = res & 0xFFFF; |
28813 | DREGu16((Opcode >> 9) & 7) = res; |
28814 | POST_IO |
28815 | RET(14) |
28816 | } |
28817 | |
28818 | // SUBaD |
28819 | OPCODE(0x907C) |
28820 | { |
28821 | u32 adr, res; |
28822 | u32 src, dst; |
28823 | |
28824 | FETCH_WORD(src); |
28825 | dst = DREGu16((Opcode >> 9) & 7); |
28826 | res = dst - src; |
28827 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28828 | flag_N = flag_X = flag_C = res >> 8; |
28829 | flag_NotZ = res & 0xFFFF; |
28830 | DREGu16((Opcode >> 9) & 7) = res; |
28831 | RET(8) |
28832 | } |
28833 | |
28834 | // SUBaD |
28835 | OPCODE(0x905F) |
28836 | { |
28837 | u32 adr, res; |
28838 | u32 src, dst; |
28839 | |
28840 | adr = AREG(7); |
28841 | AREG(7) += 2; |
28842 | PRE_IO |
28843 | READ_WORD_F(adr, src) |
28844 | dst = DREGu16((Opcode >> 9) & 7); |
28845 | res = dst - src; |
28846 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28847 | flag_N = flag_X = flag_C = res >> 8; |
28848 | flag_NotZ = res & 0xFFFF; |
28849 | DREGu16((Opcode >> 9) & 7) = res; |
28850 | POST_IO |
28851 | RET(8) |
28852 | } |
28853 | |
28854 | // SUBaD |
28855 | OPCODE(0x9067) |
28856 | { |
28857 | u32 adr, res; |
28858 | u32 src, dst; |
28859 | |
28860 | adr = AREG(7) - 2; |
28861 | AREG(7) = adr; |
28862 | PRE_IO |
28863 | READ_WORD_F(adr, src) |
28864 | dst = DREGu16((Opcode >> 9) & 7); |
28865 | res = dst - src; |
28866 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28867 | flag_N = flag_X = flag_C = res >> 8; |
28868 | flag_NotZ = res & 0xFFFF; |
28869 | DREGu16((Opcode >> 9) & 7) = res; |
28870 | POST_IO |
28871 | RET(10) |
28872 | } |
28873 | |
28874 | // SUBaD |
28875 | OPCODE(0x9080) |
28876 | { |
28877 | u32 adr, res; |
28878 | u32 src, dst; |
28879 | |
28880 | src = DREGu32((Opcode >> 0) & 7); |
28881 | dst = DREGu32((Opcode >> 9) & 7); |
28882 | res = dst - src; |
28883 | flag_NotZ = res; |
28884 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28885 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28886 | flag_N = res >> 24; |
28887 | DREGu32((Opcode >> 9) & 7) = res; |
28888 | RET(8) |
28889 | } |
28890 | |
28891 | // SUBaD |
28892 | OPCODE(0x9088) |
28893 | { |
28894 | u32 adr, res; |
28895 | u32 src, dst; |
28896 | |
28897 | src = AREGu32((Opcode >> 0) & 7); |
28898 | dst = DREGu32((Opcode >> 9) & 7); |
28899 | res = dst - src; |
28900 | flag_NotZ = res; |
28901 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28902 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28903 | flag_N = res >> 24; |
28904 | DREGu32((Opcode >> 9) & 7) = res; |
28905 | RET(8) |
28906 | } |
28907 | |
28908 | // SUBaD |
28909 | OPCODE(0x9090) |
28910 | { |
28911 | u32 adr, res; |
28912 | u32 src, dst; |
28913 | |
28914 | adr = AREG((Opcode >> 0) & 7); |
28915 | PRE_IO |
28916 | READ_LONG_F(adr, src) |
28917 | dst = DREGu32((Opcode >> 9) & 7); |
28918 | res = dst - src; |
28919 | flag_NotZ = res; |
28920 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28921 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28922 | flag_N = res >> 24; |
28923 | DREGu32((Opcode >> 9) & 7) = res; |
28924 | POST_IO |
28925 | RET(14) |
28926 | } |
28927 | |
28928 | // SUBaD |
28929 | OPCODE(0x9098) |
28930 | { |
28931 | u32 adr, res; |
28932 | u32 src, dst; |
28933 | |
28934 | adr = AREG((Opcode >> 0) & 7); |
28935 | AREG((Opcode >> 0) & 7) += 4; |
28936 | PRE_IO |
28937 | READ_LONG_F(adr, src) |
28938 | dst = DREGu32((Opcode >> 9) & 7); |
28939 | res = dst - src; |
28940 | flag_NotZ = res; |
28941 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28942 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28943 | flag_N = res >> 24; |
28944 | DREGu32((Opcode >> 9) & 7) = res; |
28945 | POST_IO |
28946 | RET(14) |
28947 | } |
28948 | |
28949 | // SUBaD |
28950 | OPCODE(0x90A0) |
28951 | { |
28952 | u32 adr, res; |
28953 | u32 src, dst; |
28954 | |
28955 | adr = AREG((Opcode >> 0) & 7) - 4; |
28956 | AREG((Opcode >> 0) & 7) = adr; |
28957 | PRE_IO |
28958 | READ_LONG_F(adr, src) |
28959 | dst = DREGu32((Opcode >> 9) & 7); |
28960 | res = dst - src; |
28961 | flag_NotZ = res; |
28962 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28963 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28964 | flag_N = res >> 24; |
28965 | DREGu32((Opcode >> 9) & 7) = res; |
28966 | POST_IO |
28967 | RET(16) |
28968 | } |
28969 | |
28970 | // SUBaD |
28971 | OPCODE(0x90A8) |
28972 | { |
28973 | u32 adr, res; |
28974 | u32 src, dst; |
28975 | |
28976 | FETCH_SWORD(adr); |
28977 | adr += AREG((Opcode >> 0) & 7); |
28978 | PRE_IO |
28979 | READ_LONG_F(adr, src) |
28980 | dst = DREGu32((Opcode >> 9) & 7); |
28981 | res = dst - src; |
28982 | flag_NotZ = res; |
28983 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28984 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28985 | flag_N = res >> 24; |
28986 | DREGu32((Opcode >> 9) & 7) = res; |
28987 | POST_IO |
28988 | RET(18) |
28989 | } |
28990 | |
28991 | // SUBaD |
28992 | OPCODE(0x90B0) |
28993 | { |
28994 | u32 adr, res; |
28995 | u32 src, dst; |
28996 | |
28997 | adr = AREG((Opcode >> 0) & 7); |
28998 | DECODE_EXT_WORD |
28999 | PRE_IO |
29000 | READ_LONG_F(adr, src) |
29001 | dst = DREGu32((Opcode >> 9) & 7); |
29002 | res = dst - src; |
29003 | flag_NotZ = res; |
29004 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29005 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29006 | flag_N = res >> 24; |
29007 | DREGu32((Opcode >> 9) & 7) = res; |
29008 | POST_IO |
29009 | RET(20) |
29010 | } |
29011 | |
29012 | // SUBaD |
29013 | OPCODE(0x90B8) |
29014 | { |
29015 | u32 adr, res; |
29016 | u32 src, dst; |
29017 | |
29018 | FETCH_SWORD(adr); |
29019 | PRE_IO |
29020 | READ_LONG_F(adr, src) |
29021 | dst = DREGu32((Opcode >> 9) & 7); |
29022 | res = dst - src; |
29023 | flag_NotZ = res; |
29024 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29025 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29026 | flag_N = res >> 24; |
29027 | DREGu32((Opcode >> 9) & 7) = res; |
29028 | POST_IO |
29029 | RET(18) |
29030 | } |
29031 | |
29032 | // SUBaD |
29033 | OPCODE(0x90B9) |
29034 | { |
29035 | u32 adr, res; |
29036 | u32 src, dst; |
29037 | |
29038 | FETCH_LONG(adr); |
29039 | PRE_IO |
29040 | READ_LONG_F(adr, src) |
29041 | dst = DREGu32((Opcode >> 9) & 7); |
29042 | res = dst - src; |
29043 | flag_NotZ = res; |
29044 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29045 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29046 | flag_N = res >> 24; |
29047 | DREGu32((Opcode >> 9) & 7) = res; |
29048 | POST_IO |
29049 | RET(22) |
29050 | } |
29051 | |
29052 | // SUBaD |
29053 | OPCODE(0x90BA) |
29054 | { |
29055 | u32 adr, res; |
29056 | u32 src, dst; |
29057 | |
29058 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
29059 | PC++; |
29060 | PRE_IO |
29061 | READ_LONG_F(adr, src) |
29062 | dst = DREGu32((Opcode >> 9) & 7); |
29063 | res = dst - src; |
29064 | flag_NotZ = res; |
29065 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29066 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29067 | flag_N = res >> 24; |
29068 | DREGu32((Opcode >> 9) & 7) = res; |
29069 | POST_IO |
29070 | RET(18) |
29071 | } |
29072 | |
29073 | // SUBaD |
29074 | OPCODE(0x90BB) |
29075 | { |
29076 | u32 adr, res; |
29077 | u32 src, dst; |
29078 | |
29079 | adr = (u32)(PC) - BasePC; |
29080 | DECODE_EXT_WORD |
29081 | PRE_IO |
29082 | READ_LONG_F(adr, src) |
29083 | dst = DREGu32((Opcode >> 9) & 7); |
29084 | res = dst - src; |
29085 | flag_NotZ = res; |
29086 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29087 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29088 | flag_N = res >> 24; |
29089 | DREGu32((Opcode >> 9) & 7) = res; |
29090 | POST_IO |
29091 | RET(20) |
29092 | } |
29093 | |
29094 | // SUBaD |
29095 | OPCODE(0x90BC) |
29096 | { |
29097 | u32 adr, res; |
29098 | u32 src, dst; |
29099 | |
29100 | FETCH_LONG(src); |
29101 | dst = DREGu32((Opcode >> 9) & 7); |
29102 | res = dst - src; |
29103 | flag_NotZ = res; |
29104 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29105 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29106 | flag_N = res >> 24; |
29107 | DREGu32((Opcode >> 9) & 7) = res; |
29108 | RET(16) |
29109 | } |
29110 | |
29111 | // SUBaD |
29112 | OPCODE(0x909F) |
29113 | { |
29114 | u32 adr, res; |
29115 | u32 src, dst; |
29116 | |
29117 | adr = AREG(7); |
29118 | AREG(7) += 4; |
29119 | PRE_IO |
29120 | READ_LONG_F(adr, src) |
29121 | dst = DREGu32((Opcode >> 9) & 7); |
29122 | res = dst - src; |
29123 | flag_NotZ = res; |
29124 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29125 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29126 | flag_N = res >> 24; |
29127 | DREGu32((Opcode >> 9) & 7) = res; |
29128 | POST_IO |
29129 | RET(14) |
29130 | } |
29131 | |
29132 | // SUBaD |
29133 | OPCODE(0x90A7) |
29134 | { |
29135 | u32 adr, res; |
29136 | u32 src, dst; |
29137 | |
29138 | adr = AREG(7) - 4; |
29139 | AREG(7) = adr; |
29140 | PRE_IO |
29141 | READ_LONG_F(adr, src) |
29142 | dst = DREGu32((Opcode >> 9) & 7); |
29143 | res = dst - src; |
29144 | flag_NotZ = res; |
29145 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29146 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29147 | flag_N = res >> 24; |
29148 | DREGu32((Opcode >> 9) & 7) = res; |
29149 | POST_IO |
29150 | RET(16) |
29151 | } |
29152 | |
29153 | // SUBDa |
29154 | OPCODE(0x9110) |
29155 | { |
29156 | u32 adr, res; |
29157 | u32 src, dst; |
29158 | |
29159 | src = DREGu8((Opcode >> 9) & 7); |
29160 | adr = AREG((Opcode >> 0) & 7); |
29161 | PRE_IO |
29162 | READ_BYTE_F(adr, dst) |
29163 | res = dst - src; |
29164 | flag_N = flag_X = flag_C = res; |
29165 | flag_V = (src ^ dst) & (res ^ dst); |
29166 | flag_NotZ = res & 0xFF; |
29167 | WRITE_BYTE_F(adr, res) |
29168 | POST_IO |
29169 | RET(12) |
29170 | } |
29171 | |
29172 | // SUBDa |
29173 | OPCODE(0x9118) |
29174 | { |
29175 | u32 adr, res; |
29176 | u32 src, dst; |
29177 | |
29178 | src = DREGu8((Opcode >> 9) & 7); |
29179 | adr = AREG((Opcode >> 0) & 7); |
29180 | AREG((Opcode >> 0) & 7) += 1; |
29181 | PRE_IO |
29182 | READ_BYTE_F(adr, dst) |
29183 | res = dst - src; |
29184 | flag_N = flag_X = flag_C = res; |
29185 | flag_V = (src ^ dst) & (res ^ dst); |
29186 | flag_NotZ = res & 0xFF; |
29187 | WRITE_BYTE_F(adr, res) |
29188 | POST_IO |
29189 | RET(12) |
29190 | } |
29191 | |
29192 | // SUBDa |
29193 | OPCODE(0x9120) |
29194 | { |
29195 | u32 adr, res; |
29196 | u32 src, dst; |
29197 | |
29198 | src = DREGu8((Opcode >> 9) & 7); |
29199 | adr = AREG((Opcode >> 0) & 7) - 1; |
29200 | AREG((Opcode >> 0) & 7) = adr; |
29201 | PRE_IO |
29202 | READ_BYTE_F(adr, dst) |
29203 | res = dst - src; |
29204 | flag_N = flag_X = flag_C = res; |
29205 | flag_V = (src ^ dst) & (res ^ dst); |
29206 | flag_NotZ = res & 0xFF; |
29207 | WRITE_BYTE_F(adr, res) |
29208 | POST_IO |
29209 | RET(14) |
29210 | } |
29211 | |
29212 | // SUBDa |
29213 | OPCODE(0x9128) |
29214 | { |
29215 | u32 adr, res; |
29216 | u32 src, dst; |
29217 | |
29218 | src = DREGu8((Opcode >> 9) & 7); |
29219 | FETCH_SWORD(adr); |
29220 | adr += AREG((Opcode >> 0) & 7); |
29221 | PRE_IO |
29222 | READ_BYTE_F(adr, dst) |
29223 | res = dst - src; |
29224 | flag_N = flag_X = flag_C = res; |
29225 | flag_V = (src ^ dst) & (res ^ dst); |
29226 | flag_NotZ = res & 0xFF; |
29227 | WRITE_BYTE_F(adr, res) |
29228 | POST_IO |
29229 | RET(16) |
29230 | } |
29231 | |
29232 | // SUBDa |
29233 | OPCODE(0x9130) |
29234 | { |
29235 | u32 adr, res; |
29236 | u32 src, dst; |
29237 | |
29238 | src = DREGu8((Opcode >> 9) & 7); |
29239 | adr = AREG((Opcode >> 0) & 7); |
29240 | DECODE_EXT_WORD |
29241 | PRE_IO |
29242 | READ_BYTE_F(adr, dst) |
29243 | res = dst - src; |
29244 | flag_N = flag_X = flag_C = res; |
29245 | flag_V = (src ^ dst) & (res ^ dst); |
29246 | flag_NotZ = res & 0xFF; |
29247 | WRITE_BYTE_F(adr, res) |
29248 | POST_IO |
29249 | RET(18) |
29250 | } |
29251 | |
29252 | // SUBDa |
29253 | OPCODE(0x9138) |
29254 | { |
29255 | u32 adr, res; |
29256 | u32 src, dst; |
29257 | |
29258 | src = DREGu8((Opcode >> 9) & 7); |
29259 | FETCH_SWORD(adr); |
29260 | PRE_IO |
29261 | READ_BYTE_F(adr, dst) |
29262 | res = dst - src; |
29263 | flag_N = flag_X = flag_C = res; |
29264 | flag_V = (src ^ dst) & (res ^ dst); |
29265 | flag_NotZ = res & 0xFF; |
29266 | WRITE_BYTE_F(adr, res) |
29267 | POST_IO |
29268 | RET(16) |
29269 | } |
29270 | |
29271 | // SUBDa |
29272 | OPCODE(0x9139) |
29273 | { |
29274 | u32 adr, res; |
29275 | u32 src, dst; |
29276 | |
29277 | src = DREGu8((Opcode >> 9) & 7); |
29278 | FETCH_LONG(adr); |
29279 | PRE_IO |
29280 | READ_BYTE_F(adr, dst) |
29281 | res = dst - src; |
29282 | flag_N = flag_X = flag_C = res; |
29283 | flag_V = (src ^ dst) & (res ^ dst); |
29284 | flag_NotZ = res & 0xFF; |
29285 | WRITE_BYTE_F(adr, res) |
29286 | POST_IO |
29287 | RET(20) |
29288 | } |
29289 | |
29290 | // SUBDa |
29291 | OPCODE(0x911F) |
29292 | { |
29293 | u32 adr, res; |
29294 | u32 src, dst; |
29295 | |
29296 | src = DREGu8((Opcode >> 9) & 7); |
29297 | adr = AREG(7); |
29298 | AREG(7) += 2; |
29299 | PRE_IO |
29300 | READ_BYTE_F(adr, dst) |
29301 | res = dst - src; |
29302 | flag_N = flag_X = flag_C = res; |
29303 | flag_V = (src ^ dst) & (res ^ dst); |
29304 | flag_NotZ = res & 0xFF; |
29305 | WRITE_BYTE_F(adr, res) |
29306 | POST_IO |
29307 | RET(12) |
29308 | } |
29309 | |
29310 | // SUBDa |
29311 | OPCODE(0x9127) |
29312 | { |
29313 | u32 adr, res; |
29314 | u32 src, dst; |
29315 | |
29316 | src = DREGu8((Opcode >> 9) & 7); |
29317 | adr = AREG(7) - 2; |
29318 | AREG(7) = adr; |
29319 | PRE_IO |
29320 | READ_BYTE_F(adr, dst) |
29321 | res = dst - src; |
29322 | flag_N = flag_X = flag_C = res; |
29323 | flag_V = (src ^ dst) & (res ^ dst); |
29324 | flag_NotZ = res & 0xFF; |
29325 | WRITE_BYTE_F(adr, res) |
29326 | POST_IO |
29327 | RET(14) |
29328 | } |
29329 | |
29330 | // SUBDa |
29331 | OPCODE(0x9150) |
29332 | { |
29333 | u32 adr, res; |
29334 | u32 src, dst; |
29335 | |
29336 | src = DREGu16((Opcode >> 9) & 7); |
29337 | adr = AREG((Opcode >> 0) & 7); |
29338 | PRE_IO |
29339 | READ_WORD_F(adr, dst) |
29340 | res = dst - src; |
29341 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29342 | flag_N = flag_X = flag_C = res >> 8; |
29343 | flag_NotZ = res & 0xFFFF; |
29344 | WRITE_WORD_F(adr, res) |
29345 | POST_IO |
29346 | RET(12) |
29347 | } |
29348 | |
29349 | // SUBDa |
29350 | OPCODE(0x9158) |
29351 | { |
29352 | u32 adr, res; |
29353 | u32 src, dst; |
29354 | |
29355 | src = DREGu16((Opcode >> 9) & 7); |
29356 | adr = AREG((Opcode >> 0) & 7); |
29357 | AREG((Opcode >> 0) & 7) += 2; |
29358 | PRE_IO |
29359 | READ_WORD_F(adr, dst) |
29360 | res = dst - src; |
29361 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29362 | flag_N = flag_X = flag_C = res >> 8; |
29363 | flag_NotZ = res & 0xFFFF; |
29364 | WRITE_WORD_F(adr, res) |
29365 | POST_IO |
29366 | RET(12) |
29367 | } |
29368 | |
29369 | // SUBDa |
29370 | OPCODE(0x9160) |
29371 | { |
29372 | u32 adr, res; |
29373 | u32 src, dst; |
29374 | |
29375 | src = DREGu16((Opcode >> 9) & 7); |
29376 | adr = AREG((Opcode >> 0) & 7) - 2; |
29377 | AREG((Opcode >> 0) & 7) = adr; |
29378 | PRE_IO |
29379 | READ_WORD_F(adr, dst) |
29380 | res = dst - src; |
29381 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29382 | flag_N = flag_X = flag_C = res >> 8; |
29383 | flag_NotZ = res & 0xFFFF; |
29384 | WRITE_WORD_F(adr, res) |
29385 | POST_IO |
29386 | RET(14) |
29387 | } |
29388 | |
29389 | // SUBDa |
29390 | OPCODE(0x9168) |
29391 | { |
29392 | u32 adr, res; |
29393 | u32 src, dst; |
29394 | |
29395 | src = DREGu16((Opcode >> 9) & 7); |
29396 | FETCH_SWORD(adr); |
29397 | adr += AREG((Opcode >> 0) & 7); |
29398 | PRE_IO |
29399 | READ_WORD_F(adr, dst) |
29400 | res = dst - src; |
29401 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29402 | flag_N = flag_X = flag_C = res >> 8; |
29403 | flag_NotZ = res & 0xFFFF; |
29404 | WRITE_WORD_F(adr, res) |
29405 | POST_IO |
29406 | RET(16) |
29407 | } |
29408 | |
29409 | // SUBDa |
29410 | OPCODE(0x9170) |
29411 | { |
29412 | u32 adr, res; |
29413 | u32 src, dst; |
29414 | |
29415 | src = DREGu16((Opcode >> 9) & 7); |
29416 | adr = AREG((Opcode >> 0) & 7); |
29417 | DECODE_EXT_WORD |
29418 | PRE_IO |
29419 | READ_WORD_F(adr, dst) |
29420 | res = dst - src; |
29421 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29422 | flag_N = flag_X = flag_C = res >> 8; |
29423 | flag_NotZ = res & 0xFFFF; |
29424 | WRITE_WORD_F(adr, res) |
29425 | POST_IO |
29426 | RET(18) |
29427 | } |
29428 | |
29429 | // SUBDa |
29430 | OPCODE(0x9178) |
29431 | { |
29432 | u32 adr, res; |
29433 | u32 src, dst; |
29434 | |
29435 | src = DREGu16((Opcode >> 9) & 7); |
29436 | FETCH_SWORD(adr); |
29437 | PRE_IO |
29438 | READ_WORD_F(adr, dst) |
29439 | res = dst - src; |
29440 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29441 | flag_N = flag_X = flag_C = res >> 8; |
29442 | flag_NotZ = res & 0xFFFF; |
29443 | WRITE_WORD_F(adr, res) |
29444 | POST_IO |
29445 | RET(16) |
29446 | } |
29447 | |
29448 | // SUBDa |
29449 | OPCODE(0x9179) |
29450 | { |
29451 | u32 adr, res; |
29452 | u32 src, dst; |
29453 | |
29454 | src = DREGu16((Opcode >> 9) & 7); |
29455 | FETCH_LONG(adr); |
29456 | PRE_IO |
29457 | READ_WORD_F(adr, dst) |
29458 | res = dst - src; |
29459 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29460 | flag_N = flag_X = flag_C = res >> 8; |
29461 | flag_NotZ = res & 0xFFFF; |
29462 | WRITE_WORD_F(adr, res) |
29463 | POST_IO |
29464 | RET(20) |
29465 | } |
29466 | |
29467 | // SUBDa |
29468 | OPCODE(0x915F) |
29469 | { |
29470 | u32 adr, res; |
29471 | u32 src, dst; |
29472 | |
29473 | src = DREGu16((Opcode >> 9) & 7); |
29474 | adr = AREG(7); |
29475 | AREG(7) += 2; |
29476 | PRE_IO |
29477 | READ_WORD_F(adr, dst) |
29478 | res = dst - src; |
29479 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29480 | flag_N = flag_X = flag_C = res >> 8; |
29481 | flag_NotZ = res & 0xFFFF; |
29482 | WRITE_WORD_F(adr, res) |
29483 | POST_IO |
29484 | RET(12) |
29485 | } |
29486 | |
29487 | // SUBDa |
29488 | OPCODE(0x9167) |
29489 | { |
29490 | u32 adr, res; |
29491 | u32 src, dst; |
29492 | |
29493 | src = DREGu16((Opcode >> 9) & 7); |
29494 | adr = AREG(7) - 2; |
29495 | AREG(7) = adr; |
29496 | PRE_IO |
29497 | READ_WORD_F(adr, dst) |
29498 | res = dst - src; |
29499 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29500 | flag_N = flag_X = flag_C = res >> 8; |
29501 | flag_NotZ = res & 0xFFFF; |
29502 | WRITE_WORD_F(adr, res) |
29503 | POST_IO |
29504 | RET(14) |
29505 | } |
29506 | |
29507 | // SUBDa |
29508 | OPCODE(0x9190) |
29509 | { |
29510 | u32 adr, res; |
29511 | u32 src, dst; |
29512 | |
29513 | src = DREGu32((Opcode >> 9) & 7); |
29514 | adr = AREG((Opcode >> 0) & 7); |
29515 | PRE_IO |
29516 | READ_LONG_F(adr, dst) |
29517 | res = dst - src; |
29518 | flag_NotZ = res; |
29519 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29520 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29521 | flag_N = res >> 24; |
29522 | WRITE_LONG_F(adr, res) |
29523 | POST_IO |
29524 | RET(20) |
29525 | } |
29526 | |
29527 | // SUBDa |
29528 | OPCODE(0x9198) |
29529 | { |
29530 | u32 adr, res; |
29531 | u32 src, dst; |
29532 | |
29533 | src = DREGu32((Opcode >> 9) & 7); |
29534 | adr = AREG((Opcode >> 0) & 7); |
29535 | AREG((Opcode >> 0) & 7) += 4; |
29536 | PRE_IO |
29537 | READ_LONG_F(adr, dst) |
29538 | res = dst - src; |
29539 | flag_NotZ = res; |
29540 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29541 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29542 | flag_N = res >> 24; |
29543 | WRITE_LONG_F(adr, res) |
29544 | POST_IO |
29545 | RET(20) |
29546 | } |
29547 | |
29548 | // SUBDa |
29549 | OPCODE(0x91A0) |
29550 | { |
29551 | u32 adr, res; |
29552 | u32 src, dst; |
29553 | |
29554 | src = DREGu32((Opcode >> 9) & 7); |
29555 | adr = AREG((Opcode >> 0) & 7) - 4; |
29556 | AREG((Opcode >> 0) & 7) = adr; |
29557 | PRE_IO |
29558 | READ_LONG_F(adr, dst) |
29559 | res = dst - src; |
29560 | flag_NotZ = res; |
29561 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29562 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29563 | flag_N = res >> 24; |
29564 | WRITE_LONG_F(adr, res) |
29565 | POST_IO |
29566 | RET(22) |
29567 | } |
29568 | |
29569 | // SUBDa |
29570 | OPCODE(0x91A8) |
29571 | { |
29572 | u32 adr, res; |
29573 | u32 src, dst; |
29574 | |
29575 | src = DREGu32((Opcode >> 9) & 7); |
29576 | FETCH_SWORD(adr); |
29577 | adr += AREG((Opcode >> 0) & 7); |
29578 | PRE_IO |
29579 | READ_LONG_F(adr, dst) |
29580 | res = dst - src; |
29581 | flag_NotZ = res; |
29582 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29583 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29584 | flag_N = res >> 24; |
29585 | WRITE_LONG_F(adr, res) |
29586 | POST_IO |
29587 | RET(24) |
29588 | } |
29589 | |
29590 | // SUBDa |
29591 | OPCODE(0x91B0) |
29592 | { |
29593 | u32 adr, res; |
29594 | u32 src, dst; |
29595 | |
29596 | src = DREGu32((Opcode >> 9) & 7); |
29597 | adr = AREG((Opcode >> 0) & 7); |
29598 | DECODE_EXT_WORD |
29599 | PRE_IO |
29600 | READ_LONG_F(adr, dst) |
29601 | res = dst - src; |
29602 | flag_NotZ = res; |
29603 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29604 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29605 | flag_N = res >> 24; |
29606 | WRITE_LONG_F(adr, res) |
29607 | POST_IO |
29608 | RET(26) |
29609 | } |
29610 | |
29611 | // SUBDa |
29612 | OPCODE(0x91B8) |
29613 | { |
29614 | u32 adr, res; |
29615 | u32 src, dst; |
29616 | |
29617 | src = DREGu32((Opcode >> 9) & 7); |
29618 | FETCH_SWORD(adr); |
29619 | PRE_IO |
29620 | READ_LONG_F(adr, dst) |
29621 | res = dst - src; |
29622 | flag_NotZ = res; |
29623 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29624 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29625 | flag_N = res >> 24; |
29626 | WRITE_LONG_F(adr, res) |
29627 | POST_IO |
29628 | RET(24) |
29629 | } |
29630 | |
29631 | // SUBDa |
29632 | OPCODE(0x91B9) |
29633 | { |
29634 | u32 adr, res; |
29635 | u32 src, dst; |
29636 | |
29637 | src = DREGu32((Opcode >> 9) & 7); |
29638 | FETCH_LONG(adr); |
29639 | PRE_IO |
29640 | READ_LONG_F(adr, dst) |
29641 | res = dst - src; |
29642 | flag_NotZ = res; |
29643 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29644 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29645 | flag_N = res >> 24; |
29646 | WRITE_LONG_F(adr, res) |
29647 | POST_IO |
29648 | RET(28) |
29649 | } |
29650 | |
29651 | // SUBDa |
29652 | OPCODE(0x919F) |
29653 | { |
29654 | u32 adr, res; |
29655 | u32 src, dst; |
29656 | |
29657 | src = DREGu32((Opcode >> 9) & 7); |
29658 | adr = AREG(7); |
29659 | AREG(7) += 4; |
29660 | PRE_IO |
29661 | READ_LONG_F(adr, dst) |
29662 | res = dst - src; |
29663 | flag_NotZ = res; |
29664 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29665 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29666 | flag_N = res >> 24; |
29667 | WRITE_LONG_F(adr, res) |
29668 | POST_IO |
29669 | RET(20) |
29670 | } |
29671 | |
29672 | // SUBDa |
29673 | OPCODE(0x91A7) |
29674 | { |
29675 | u32 adr, res; |
29676 | u32 src, dst; |
29677 | |
29678 | src = DREGu32((Opcode >> 9) & 7); |
29679 | adr = AREG(7) - 4; |
29680 | AREG(7) = adr; |
29681 | PRE_IO |
29682 | READ_LONG_F(adr, dst) |
29683 | res = dst - src; |
29684 | flag_NotZ = res; |
29685 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29686 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29687 | flag_N = res >> 24; |
29688 | WRITE_LONG_F(adr, res) |
29689 | POST_IO |
29690 | RET(22) |
29691 | } |
29692 | |
29693 | // SUBX |
29694 | OPCODE(0x9100) |
29695 | { |
29696 | u32 adr, res; |
29697 | u32 src, dst; |
29698 | |
29699 | src = DREGu8((Opcode >> 0) & 7); |
29700 | dst = DREGu8((Opcode >> 9) & 7); |
29701 | res = dst - src - ((flag_X >> 8) & 1); |
29702 | flag_N = flag_X = flag_C = res; |
29703 | flag_V = (src ^ dst) & (res ^ dst); |
29704 | flag_NotZ |= res & 0xFF; |
29705 | DREGu8((Opcode >> 9) & 7) = res; |
29706 | RET(4) |
29707 | } |
29708 | |
29709 | // SUBX |
29710 | OPCODE(0x9140) |
29711 | { |
29712 | u32 adr, res; |
29713 | u32 src, dst; |
29714 | |
29715 | src = DREGu16((Opcode >> 0) & 7); |
29716 | dst = DREGu16((Opcode >> 9) & 7); |
29717 | res = dst - src - ((flag_X >> 8) & 1); |
29718 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29719 | flag_N = flag_X = flag_C = res >> 8; |
29720 | flag_NotZ |= res & 0xFFFF; |
29721 | DREGu16((Opcode >> 9) & 7) = res; |
29722 | RET(4) |
29723 | } |
29724 | |
29725 | // SUBX |
29726 | OPCODE(0x9180) |
29727 | { |
29728 | u32 adr, res; |
29729 | u32 src, dst; |
29730 | |
29731 | src = DREGu32((Opcode >> 0) & 7); |
29732 | dst = DREGu32((Opcode >> 9) & 7); |
29733 | res = dst - src - ((flag_X >> 8) & 1); |
29734 | flag_NotZ |= res; |
29735 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29736 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29737 | flag_N = res >> 24; |
29738 | DREGu32((Opcode >> 9) & 7) = res; |
29739 | RET(8) |
29740 | } |
29741 | |
29742 | // SUBXM |
29743 | OPCODE(0x9108) |
29744 | { |
29745 | u32 adr, res; |
29746 | u32 src, dst; |
29747 | |
29748 | adr = AREG((Opcode >> 0) & 7) - 1; |
29749 | AREG((Opcode >> 0) & 7) = adr; |
29750 | PRE_IO |
29751 | READ_BYTE_F(adr, src) |
29752 | adr = AREG((Opcode >> 9) & 7) - 1; |
29753 | AREG((Opcode >> 9) & 7) = adr; |
29754 | READ_BYTE_F(adr, dst) |
29755 | res = dst - src - ((flag_X >> 8) & 1); |
29756 | flag_N = flag_X = flag_C = res; |
29757 | flag_V = (src ^ dst) & (res ^ dst); |
29758 | flag_NotZ |= res & 0xFF; |
29759 | WRITE_BYTE_F(adr, res) |
29760 | POST_IO |
29761 | RET(18) |
29762 | } |
29763 | |
29764 | // SUBXM |
29765 | OPCODE(0x9148) |
29766 | { |
29767 | u32 adr, res; |
29768 | u32 src, dst; |
29769 | |
29770 | adr = AREG((Opcode >> 0) & 7) - 2; |
29771 | AREG((Opcode >> 0) & 7) = adr; |
29772 | PRE_IO |
29773 | READ_WORD_F(adr, src) |
29774 | adr = AREG((Opcode >> 9) & 7) - 2; |
29775 | AREG((Opcode >> 9) & 7) = adr; |
29776 | READ_WORD_F(adr, dst) |
29777 | res = dst - src - ((flag_X >> 8) & 1); |
29778 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29779 | flag_N = flag_X = flag_C = res >> 8; |
29780 | flag_NotZ |= res & 0xFFFF; |
29781 | WRITE_WORD_F(adr, res) |
29782 | POST_IO |
29783 | RET(18) |
29784 | } |
29785 | |
29786 | // SUBXM |
29787 | OPCODE(0x9188) |
29788 | { |
29789 | u32 adr, res; |
29790 | u32 src, dst; |
29791 | |
29792 | adr = AREG((Opcode >> 0) & 7) - 4; |
29793 | AREG((Opcode >> 0) & 7) = adr; |
29794 | PRE_IO |
29795 | READ_LONG_F(adr, src) |
29796 | adr = AREG((Opcode >> 9) & 7) - 4; |
29797 | AREG((Opcode >> 9) & 7) = adr; |
29798 | READ_LONG_F(adr, dst) |
29799 | res = dst - src - ((flag_X >> 8) & 1); |
29800 | flag_NotZ |= res; |
29801 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29802 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29803 | flag_N = res >> 24; |
29804 | WRITE_LONG_F(adr, res) |
29805 | POST_IO |
29806 | RET(30) |
29807 | } |
29808 | |
29809 | // SUBX7M |
29810 | OPCODE(0x910F) |
29811 | { |
29812 | u32 adr, res; |
29813 | u32 src, dst; |
29814 | |
29815 | adr = AREG(7) - 2; |
29816 | AREG(7) = adr; |
29817 | PRE_IO |
29818 | READ_BYTE_F(adr, src) |
29819 | adr = AREG((Opcode >> 9) & 7) - 1; |
29820 | AREG((Opcode >> 9) & 7) = adr; |
29821 | READ_BYTE_F(adr, dst) |
29822 | res = dst - src - ((flag_X >> 8) & 1); |
29823 | flag_N = flag_X = flag_C = res; |
29824 | flag_V = (src ^ dst) & (res ^ dst); |
29825 | flag_NotZ |= res & 0xFF; |
29826 | WRITE_BYTE_F(adr, res) |
29827 | POST_IO |
29828 | RET(18) |
29829 | } |
29830 | |
29831 | // SUBX7M |
29832 | OPCODE(0x914F) |
29833 | { |
29834 | u32 adr, res; |
29835 | u32 src, dst; |
29836 | |
29837 | adr = AREG(7) - 2; |
29838 | AREG(7) = adr; |
29839 | PRE_IO |
29840 | READ_WORD_F(adr, src) |
29841 | adr = AREG((Opcode >> 9) & 7) - 2; |
29842 | AREG((Opcode >> 9) & 7) = adr; |
29843 | READ_WORD_F(adr, dst) |
29844 | res = dst - src - ((flag_X >> 8) & 1); |
29845 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29846 | flag_N = flag_X = flag_C = res >> 8; |
29847 | flag_NotZ |= res & 0xFFFF; |
29848 | WRITE_WORD_F(adr, res) |
29849 | POST_IO |
29850 | RET(18) |
29851 | } |
29852 | |
29853 | // SUBX7M |
29854 | OPCODE(0x918F) |
29855 | { |
29856 | u32 adr, res; |
29857 | u32 src, dst; |
29858 | |
29859 | adr = AREG(7) - 4; |
29860 | AREG(7) = adr; |
29861 | PRE_IO |
29862 | READ_LONG_F(adr, src) |
29863 | adr = AREG((Opcode >> 9) & 7) - 4; |
29864 | AREG((Opcode >> 9) & 7) = adr; |
29865 | READ_LONG_F(adr, dst) |
29866 | res = dst - src - ((flag_X >> 8) & 1); |
29867 | flag_NotZ |= res; |
29868 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29869 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29870 | flag_N = res >> 24; |
29871 | WRITE_LONG_F(adr, res) |
29872 | POST_IO |
29873 | RET(30) |
29874 | } |
29875 | |
29876 | // SUBXM7 |
29877 | OPCODE(0x9F08) |
29878 | { |
29879 | u32 adr, res; |
29880 | u32 src, dst; |
29881 | |
29882 | adr = AREG((Opcode >> 0) & 7) - 1; |
29883 | AREG((Opcode >> 0) & 7) = adr; |
29884 | PRE_IO |
29885 | READ_BYTE_F(adr, src) |
29886 | adr = AREG(7) - 2; |
29887 | AREG(7) = adr; |
29888 | READ_BYTE_F(adr, dst) |
29889 | res = dst - src - ((flag_X >> 8) & 1); |
29890 | flag_N = flag_X = flag_C = res; |
29891 | flag_V = (src ^ dst) & (res ^ dst); |
29892 | flag_NotZ |= res & 0xFF; |
29893 | WRITE_BYTE_F(adr, res) |
29894 | POST_IO |
29895 | RET(18) |
29896 | } |
29897 | |
29898 | // SUBXM7 |
29899 | OPCODE(0x9F48) |
29900 | { |
29901 | u32 adr, res; |
29902 | u32 src, dst; |
29903 | |
29904 | adr = AREG((Opcode >> 0) & 7) - 2; |
29905 | AREG((Opcode >> 0) & 7) = adr; |
29906 | PRE_IO |
29907 | READ_WORD_F(adr, src) |
29908 | adr = AREG(7) - 2; |
29909 | AREG(7) = adr; |
29910 | READ_WORD_F(adr, dst) |
29911 | res = dst - src - ((flag_X >> 8) & 1); |
29912 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29913 | flag_N = flag_X = flag_C = res >> 8; |
29914 | flag_NotZ |= res & 0xFFFF; |
29915 | WRITE_WORD_F(adr, res) |
29916 | POST_IO |
29917 | RET(18) |
29918 | } |
29919 | |
29920 | // SUBXM7 |
29921 | OPCODE(0x9F88) |
29922 | { |
29923 | u32 adr, res; |
29924 | u32 src, dst; |
29925 | |
29926 | adr = AREG((Opcode >> 0) & 7) - 4; |
29927 | AREG((Opcode >> 0) & 7) = adr; |
29928 | PRE_IO |
29929 | READ_LONG_F(adr, src) |
29930 | adr = AREG(7) - 4; |
29931 | AREG(7) = adr; |
29932 | READ_LONG_F(adr, dst) |
29933 | res = dst - src - ((flag_X >> 8) & 1); |
29934 | flag_NotZ |= res; |
29935 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29936 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29937 | flag_N = res >> 24; |
29938 | WRITE_LONG_F(adr, res) |
29939 | POST_IO |
29940 | RET(30) |
29941 | } |
29942 | |
29943 | // SUBX7M7 |
29944 | OPCODE(0x9F0F) |
29945 | { |
29946 | u32 adr, res; |
29947 | u32 src, dst; |
29948 | |
29949 | adr = AREG(7) - 2; |
29950 | AREG(7) = adr; |
29951 | PRE_IO |
29952 | READ_BYTE_F(adr, src) |
29953 | adr = AREG(7) - 2; |
29954 | AREG(7) = adr; |
29955 | READ_BYTE_F(adr, dst) |
29956 | res = dst - src - ((flag_X >> 8) & 1); |
29957 | flag_N = flag_X = flag_C = res; |
29958 | flag_V = (src ^ dst) & (res ^ dst); |
29959 | flag_NotZ |= res & 0xFF; |
29960 | WRITE_BYTE_F(adr, res) |
29961 | POST_IO |
29962 | RET(18) |
29963 | } |
29964 | |
29965 | // SUBX7M7 |
29966 | OPCODE(0x9F4F) |
29967 | { |
29968 | u32 adr, res; |
29969 | u32 src, dst; |
29970 | |
29971 | adr = AREG(7) - 2; |
29972 | AREG(7) = adr; |
29973 | PRE_IO |
29974 | READ_WORD_F(adr, src) |
29975 | adr = AREG(7) - 2; |
29976 | AREG(7) = adr; |
29977 | READ_WORD_F(adr, dst) |
29978 | res = dst - src - ((flag_X >> 8) & 1); |
29979 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29980 | flag_N = flag_X = flag_C = res >> 8; |
29981 | flag_NotZ |= res & 0xFFFF; |
29982 | WRITE_WORD_F(adr, res) |
29983 | POST_IO |
29984 | RET(18) |
29985 | } |
29986 | |
29987 | // SUBX7M7 |
29988 | OPCODE(0x9F8F) |
29989 | { |
29990 | u32 adr, res; |
29991 | u32 src, dst; |
29992 | |
29993 | adr = AREG(7) - 4; |
29994 | AREG(7) = adr; |
29995 | PRE_IO |
29996 | READ_LONG_F(adr, src) |
29997 | adr = AREG(7) - 4; |
29998 | AREG(7) = adr; |
29999 | READ_LONG_F(adr, dst) |
30000 | res = dst - src - ((flag_X >> 8) & 1); |
30001 | flag_NotZ |= res; |
30002 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30003 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30004 | flag_N = res >> 24; |
30005 | WRITE_LONG_F(adr, res) |
30006 | POST_IO |
30007 | RET(30) |
30008 | } |
30009 | |
30010 | // SUBA |
30011 | OPCODE(0x90C0) |
30012 | { |
30013 | u32 adr, res; |
30014 | u32 src, dst; |
30015 | |
30016 | src = (s32)DREGs16((Opcode >> 0) & 7); |
30017 | dst = AREGu32((Opcode >> 9) & 7); |
30018 | res = dst - src; |
30019 | AREG((Opcode >> 9) & 7) = res; |
30020 | RET(8) |
30021 | } |
30022 | |
30023 | // SUBA |
30024 | OPCODE(0x90C8) |
30025 | { |
30026 | u32 adr, res; |
30027 | u32 src, dst; |
30028 | |
30029 | src = (s32)AREGs16((Opcode >> 0) & 7); |
30030 | dst = AREGu32((Opcode >> 9) & 7); |
30031 | res = dst - src; |
30032 | AREG((Opcode >> 9) & 7) = res; |
30033 | RET(8) |
30034 | } |
30035 | |
30036 | // SUBA |
30037 | OPCODE(0x90D0) |
30038 | { |
30039 | u32 adr, res; |
30040 | u32 src, dst; |
30041 | |
30042 | adr = AREG((Opcode >> 0) & 7); |
30043 | PRE_IO |
30044 | READSX_WORD_F(adr, src) |
30045 | dst = AREGu32((Opcode >> 9) & 7); |
30046 | res = dst - src; |
30047 | AREG((Opcode >> 9) & 7) = res; |
30048 | POST_IO |
9d917eea |
30049 | #ifdef USE_CYCLONE_TIMING |
30050 | RET(12) |
30051 | #else |
70357ce5 |
30052 | RET(10) |
9d917eea |
30053 | #endif |
70357ce5 |
30054 | } |
30055 | |
30056 | // SUBA |
30057 | OPCODE(0x90D8) |
30058 | { |
30059 | u32 adr, res; |
30060 | u32 src, dst; |
30061 | |
30062 | adr = AREG((Opcode >> 0) & 7); |
30063 | AREG((Opcode >> 0) & 7) += 2; |
30064 | PRE_IO |
30065 | READSX_WORD_F(adr, src) |
30066 | dst = AREGu32((Opcode >> 9) & 7); |
30067 | res = dst - src; |
30068 | AREG((Opcode >> 9) & 7) = res; |
30069 | POST_IO |
9d917eea |
30070 | #ifdef USE_CYCLONE_TIMING |
30071 | RET(12) |
30072 | #else |
70357ce5 |
30073 | RET(10) |
9d917eea |
30074 | #endif |
70357ce5 |
30075 | } |
30076 | |
30077 | // SUBA |
30078 | OPCODE(0x90E0) |
30079 | { |
30080 | u32 adr, res; |
30081 | u32 src, dst; |
30082 | |
30083 | adr = AREG((Opcode >> 0) & 7) - 2; |
30084 | AREG((Opcode >> 0) & 7) = adr; |
30085 | PRE_IO |
30086 | READSX_WORD_F(adr, src) |
30087 | dst = AREGu32((Opcode >> 9) & 7); |
30088 | res = dst - src; |
30089 | AREG((Opcode >> 9) & 7) = res; |
30090 | POST_IO |
9d917eea |
30091 | #ifdef USE_CYCLONE_TIMING |
30092 | RET(14) |
30093 | #else |
70357ce5 |
30094 | RET(12) |
9d917eea |
30095 | #endif |
70357ce5 |
30096 | } |
30097 | |
30098 | // SUBA |
30099 | OPCODE(0x90E8) |
30100 | { |
30101 | u32 adr, res; |
30102 | u32 src, dst; |
30103 | |
30104 | FETCH_SWORD(adr); |
30105 | adr += AREG((Opcode >> 0) & 7); |
30106 | PRE_IO |
30107 | READSX_WORD_F(adr, src) |
30108 | dst = AREGu32((Opcode >> 9) & 7); |
30109 | res = dst - src; |
30110 | AREG((Opcode >> 9) & 7) = res; |
30111 | POST_IO |
9d917eea |
30112 | #ifdef USE_CYCLONE_TIMING |
30113 | RET(16) |
30114 | #else |
70357ce5 |
30115 | RET(14) |
9d917eea |
30116 | #endif |
70357ce5 |
30117 | } |
30118 | |
30119 | // SUBA |
30120 | OPCODE(0x90F0) |
30121 | { |
30122 | u32 adr, res; |
30123 | u32 src, dst; |
30124 | |
30125 | adr = AREG((Opcode >> 0) & 7); |
30126 | DECODE_EXT_WORD |
30127 | PRE_IO |
30128 | READSX_WORD_F(adr, src) |
30129 | dst = AREGu32((Opcode >> 9) & 7); |
30130 | res = dst - src; |
30131 | AREG((Opcode >> 9) & 7) = res; |
30132 | POST_IO |
9d917eea |
30133 | #ifdef USE_CYCLONE_TIMING |
30134 | RET(18) |
30135 | #else |
70357ce5 |
30136 | RET(16) |
9d917eea |
30137 | #endif |
70357ce5 |
30138 | } |
30139 | |
30140 | // SUBA |
30141 | OPCODE(0x90F8) |
30142 | { |
30143 | u32 adr, res; |
30144 | u32 src, dst; |
30145 | |
30146 | FETCH_SWORD(adr); |
30147 | PRE_IO |
30148 | READSX_WORD_F(adr, src) |
30149 | dst = AREGu32((Opcode >> 9) & 7); |
30150 | res = dst - src; |
30151 | AREG((Opcode >> 9) & 7) = res; |
30152 | POST_IO |
9d917eea |
30153 | #ifdef USE_CYCLONE_TIMING |
30154 | RET(16) |
30155 | #else |
70357ce5 |
30156 | RET(14) |
9d917eea |
30157 | #endif |
70357ce5 |
30158 | } |
30159 | |
30160 | // SUBA |
30161 | OPCODE(0x90F9) |
30162 | { |
30163 | u32 adr, res; |
30164 | u32 src, dst; |
30165 | |
30166 | FETCH_LONG(adr); |
30167 | PRE_IO |
30168 | READSX_WORD_F(adr, src) |
30169 | dst = AREGu32((Opcode >> 9) & 7); |
30170 | res = dst - src; |
30171 | AREG((Opcode >> 9) & 7) = res; |
30172 | POST_IO |
9d917eea |
30173 | #ifdef USE_CYCLONE_TIMING |
30174 | RET(20) |
30175 | #else |
70357ce5 |
30176 | RET(18) |
9d917eea |
30177 | #endif |
70357ce5 |
30178 | } |
30179 | |
30180 | // SUBA |
30181 | OPCODE(0x90FA) |
30182 | { |
30183 | u32 adr, res; |
30184 | u32 src, dst; |
30185 | |
30186 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30187 | PC++; |
30188 | PRE_IO |
30189 | READSX_WORD_F(adr, src) |
30190 | dst = AREGu32((Opcode >> 9) & 7); |
30191 | res = dst - src; |
30192 | AREG((Opcode >> 9) & 7) = res; |
30193 | POST_IO |
9d917eea |
30194 | #ifdef USE_CYCLONE_TIMING |
30195 | RET(16) |
30196 | #else |
70357ce5 |
30197 | RET(14) |
9d917eea |
30198 | #endif |
70357ce5 |
30199 | } |
30200 | |
30201 | // SUBA |
30202 | OPCODE(0x90FB) |
30203 | { |
30204 | u32 adr, res; |
30205 | u32 src, dst; |
30206 | |
30207 | adr = (u32)(PC) - BasePC; |
30208 | DECODE_EXT_WORD |
30209 | PRE_IO |
30210 | READSX_WORD_F(adr, src) |
30211 | dst = AREGu32((Opcode >> 9) & 7); |
30212 | res = dst - src; |
30213 | AREG((Opcode >> 9) & 7) = res; |
30214 | POST_IO |
9d917eea |
30215 | #ifdef USE_CYCLONE_TIMING |
30216 | RET(18) |
30217 | #else |
70357ce5 |
30218 | RET(16) |
9d917eea |
30219 | #endif |
70357ce5 |
30220 | } |
30221 | |
30222 | // SUBA |
30223 | OPCODE(0x90FC) |
30224 | { |
30225 | u32 adr, res; |
30226 | u32 src, dst; |
30227 | |
30228 | FETCH_SWORD(src); |
30229 | dst = AREGu32((Opcode >> 9) & 7); |
30230 | res = dst - src; |
30231 | AREG((Opcode >> 9) & 7) = res; |
30232 | RET(12) |
30233 | } |
30234 | |
30235 | // SUBA |
30236 | OPCODE(0x90DF) |
30237 | { |
30238 | u32 adr, res; |
30239 | u32 src, dst; |
30240 | |
30241 | adr = AREG(7); |
30242 | AREG(7) += 2; |
30243 | PRE_IO |
30244 | READSX_WORD_F(adr, src) |
30245 | dst = AREGu32((Opcode >> 9) & 7); |
30246 | res = dst - src; |
30247 | AREG((Opcode >> 9) & 7) = res; |
30248 | POST_IO |
9d917eea |
30249 | #ifdef USE_CYCLONE_TIMING |
30250 | RET(12) |
30251 | #else |
70357ce5 |
30252 | RET(10) |
9d917eea |
30253 | #endif |
70357ce5 |
30254 | } |
30255 | |
30256 | // SUBA |
30257 | OPCODE(0x90E7) |
30258 | { |
30259 | u32 adr, res; |
30260 | u32 src, dst; |
30261 | |
30262 | adr = AREG(7) - 2; |
30263 | AREG(7) = adr; |
30264 | PRE_IO |
30265 | READSX_WORD_F(adr, src) |
30266 | dst = AREGu32((Opcode >> 9) & 7); |
30267 | res = dst - src; |
30268 | AREG((Opcode >> 9) & 7) = res; |
30269 | POST_IO |
9d917eea |
30270 | #ifdef USE_CYCLONE_TIMING |
30271 | RET(14) |
30272 | #else |
70357ce5 |
30273 | RET(12) |
9d917eea |
30274 | #endif |
70357ce5 |
30275 | } |
30276 | |
30277 | // SUBA |
30278 | OPCODE(0x91C0) |
30279 | { |
30280 | u32 adr, res; |
30281 | u32 src, dst; |
30282 | |
30283 | src = (s32)DREGs32((Opcode >> 0) & 7); |
30284 | dst = AREGu32((Opcode >> 9) & 7); |
30285 | res = dst - src; |
30286 | AREG((Opcode >> 9) & 7) = res; |
30287 | #ifdef USE_CYCLONE_TIMING |
30288 | RET(8) |
30289 | #else |
30290 | RET(6) |
30291 | #endif |
30292 | } |
30293 | |
30294 | // SUBA |
30295 | OPCODE(0x91C8) |
30296 | { |
30297 | u32 adr, res; |
30298 | u32 src, dst; |
30299 | |
30300 | src = (s32)AREGs32((Opcode >> 0) & 7); |
30301 | dst = AREGu32((Opcode >> 9) & 7); |
30302 | res = dst - src; |
30303 | AREG((Opcode >> 9) & 7) = res; |
30304 | #ifdef USE_CYCLONE_TIMING |
30305 | RET(8) |
30306 | #else |
30307 | RET(6) |
30308 | #endif |
30309 | } |
30310 | |
30311 | // SUBA |
30312 | OPCODE(0x91D0) |
30313 | { |
30314 | u32 adr, res; |
30315 | u32 src, dst; |
30316 | |
30317 | adr = AREG((Opcode >> 0) & 7); |
30318 | PRE_IO |
30319 | READSX_LONG_F(adr, src) |
30320 | dst = AREGu32((Opcode >> 9) & 7); |
30321 | res = dst - src; |
30322 | AREG((Opcode >> 9) & 7) = res; |
30323 | POST_IO |
30324 | RET(14) |
30325 | } |
30326 | |
30327 | // SUBA |
30328 | OPCODE(0x91D8) |
30329 | { |
30330 | u32 adr, res; |
30331 | u32 src, dst; |
30332 | |
30333 | adr = AREG((Opcode >> 0) & 7); |
30334 | AREG((Opcode >> 0) & 7) += 4; |
30335 | PRE_IO |
30336 | READSX_LONG_F(adr, src) |
30337 | dst = AREGu32((Opcode >> 9) & 7); |
30338 | res = dst - src; |
30339 | AREG((Opcode >> 9) & 7) = res; |
30340 | POST_IO |
30341 | RET(14) |
30342 | } |
30343 | |
30344 | // SUBA |
30345 | OPCODE(0x91E0) |
30346 | { |
30347 | u32 adr, res; |
30348 | u32 src, dst; |
30349 | |
30350 | adr = AREG((Opcode >> 0) & 7) - 4; |
30351 | AREG((Opcode >> 0) & 7) = adr; |
30352 | PRE_IO |
30353 | READSX_LONG_F(adr, src) |
30354 | dst = AREGu32((Opcode >> 9) & 7); |
30355 | res = dst - src; |
30356 | AREG((Opcode >> 9) & 7) = res; |
30357 | POST_IO |
30358 | RET(16) |
30359 | } |
30360 | |
30361 | // SUBA |
30362 | OPCODE(0x91E8) |
30363 | { |
30364 | u32 adr, res; |
30365 | u32 src, dst; |
30366 | |
30367 | FETCH_SWORD(adr); |
30368 | adr += AREG((Opcode >> 0) & 7); |
30369 | PRE_IO |
30370 | READSX_LONG_F(adr, src) |
30371 | dst = AREGu32((Opcode >> 9) & 7); |
30372 | res = dst - src; |
30373 | AREG((Opcode >> 9) & 7) = res; |
30374 | POST_IO |
30375 | RET(18) |
30376 | } |
30377 | |
30378 | // SUBA |
30379 | OPCODE(0x91F0) |
30380 | { |
30381 | u32 adr, res; |
30382 | u32 src, dst; |
30383 | |
30384 | adr = AREG((Opcode >> 0) & 7); |
30385 | DECODE_EXT_WORD |
30386 | PRE_IO |
30387 | READSX_LONG_F(adr, src) |
30388 | dst = AREGu32((Opcode >> 9) & 7); |
30389 | res = dst - src; |
30390 | AREG((Opcode >> 9) & 7) = res; |
30391 | POST_IO |
30392 | RET(20) |
30393 | } |
30394 | |
30395 | // SUBA |
30396 | OPCODE(0x91F8) |
30397 | { |
30398 | u32 adr, res; |
30399 | u32 src, dst; |
30400 | |
30401 | FETCH_SWORD(adr); |
30402 | PRE_IO |
30403 | READSX_LONG_F(adr, src) |
30404 | dst = AREGu32((Opcode >> 9) & 7); |
30405 | res = dst - src; |
30406 | AREG((Opcode >> 9) & 7) = res; |
30407 | POST_IO |
30408 | RET(18) |
30409 | } |
30410 | |
30411 | // SUBA |
30412 | OPCODE(0x91F9) |
30413 | { |
30414 | u32 adr, res; |
30415 | u32 src, dst; |
30416 | |
30417 | FETCH_LONG(adr); |
30418 | PRE_IO |
30419 | READSX_LONG_F(adr, src) |
30420 | dst = AREGu32((Opcode >> 9) & 7); |
30421 | res = dst - src; |
30422 | AREG((Opcode >> 9) & 7) = res; |
30423 | POST_IO |
30424 | RET(22) |
30425 | } |
30426 | |
30427 | // SUBA |
30428 | OPCODE(0x91FA) |
30429 | { |
30430 | u32 adr, res; |
30431 | u32 src, dst; |
30432 | |
30433 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30434 | PC++; |
30435 | PRE_IO |
30436 | READSX_LONG_F(adr, src) |
30437 | dst = AREGu32((Opcode >> 9) & 7); |
30438 | res = dst - src; |
30439 | AREG((Opcode >> 9) & 7) = res; |
30440 | POST_IO |
30441 | RET(18) |
30442 | } |
30443 | |
30444 | // SUBA |
30445 | OPCODE(0x91FB) |
30446 | { |
30447 | u32 adr, res; |
30448 | u32 src, dst; |
30449 | |
30450 | adr = (u32)(PC) - BasePC; |
30451 | DECODE_EXT_WORD |
30452 | PRE_IO |
30453 | READSX_LONG_F(adr, src) |
30454 | dst = AREGu32((Opcode >> 9) & 7); |
30455 | res = dst - src; |
30456 | AREG((Opcode >> 9) & 7) = res; |
30457 | POST_IO |
30458 | RET(20) |
30459 | } |
30460 | |
30461 | // SUBA |
30462 | OPCODE(0x91FC) |
30463 | { |
30464 | u32 adr, res; |
30465 | u32 src, dst; |
30466 | |
30467 | FETCH_LONG(src); |
30468 | dst = AREGu32((Opcode >> 9) & 7); |
30469 | res = dst - src; |
30470 | AREG((Opcode >> 9) & 7) = res; |
30471 | #ifdef USE_CYCLONE_TIMING |
30472 | RET(16) |
30473 | #else |
30474 | RET(14) |
30475 | #endif |
30476 | } |
30477 | |
30478 | // SUBA |
30479 | OPCODE(0x91DF) |
30480 | { |
30481 | u32 adr, res; |
30482 | u32 src, dst; |
30483 | |
30484 | adr = AREG(7); |
30485 | AREG(7) += 4; |
30486 | PRE_IO |
30487 | READSX_LONG_F(adr, src) |
30488 | dst = AREGu32((Opcode >> 9) & 7); |
30489 | res = dst - src; |
30490 | AREG((Opcode >> 9) & 7) = res; |
30491 | POST_IO |
30492 | RET(14) |
30493 | } |
30494 | |
30495 | // SUBA |
30496 | OPCODE(0x91E7) |
30497 | { |
30498 | u32 adr, res; |
30499 | u32 src, dst; |
30500 | |
30501 | adr = AREG(7) - 4; |
30502 | AREG(7) = adr; |
30503 | PRE_IO |
30504 | READSX_LONG_F(adr, src) |
30505 | dst = AREGu32((Opcode >> 9) & 7); |
30506 | res = dst - src; |
30507 | AREG((Opcode >> 9) & 7) = res; |
30508 | POST_IO |
30509 | RET(16) |
30510 | } |
30511 | |
30512 | // CMP |
30513 | OPCODE(0xB000) |
30514 | { |
30515 | u32 adr, res; |
30516 | u32 src, dst; |
30517 | |
30518 | src = DREGu8((Opcode >> 0) & 7); |
30519 | dst = DREGu8((Opcode >> 9) & 7); |
30520 | res = dst - src; |
30521 | flag_N = flag_C = res; |
30522 | flag_V = (src ^ dst) & (res ^ dst); |
30523 | flag_NotZ = res & 0xFF; |
30524 | RET(4) |
30525 | } |
30526 | |
30527 | // CMP |
03e4f2a3 |
30528 | #if 0 |
70357ce5 |
30529 | OPCODE(0xB008) |
30530 | { |
30531 | u32 adr, res; |
30532 | u32 src, dst; |
30533 | |
30534 | // can't read byte from Ax registers ! |
30535 | m68kcontext.execinfo |= M68K_FAULTED; |
30536 | m68kcontext.io_cycle_counter = 0; |
30537 | /* |
30538 | goto famec_Exec_End; |
30539 | dst = DREGu8((Opcode >> 9) & 7); |
30540 | res = dst - src; |
30541 | flag_N = flag_C = res; |
30542 | flag_V = (src ^ dst) & (res ^ dst); |
30543 | flag_NotZ = res & 0xFF; |
30544 | */ |
30545 | RET(4) |
30546 | } |
03e4f2a3 |
30547 | #endif |
70357ce5 |
30548 | |
30549 | // CMP |
30550 | OPCODE(0xB010) |
30551 | { |
30552 | u32 adr, res; |
30553 | u32 src, dst; |
30554 | |
30555 | adr = AREG((Opcode >> 0) & 7); |
30556 | PRE_IO |
30557 | READ_BYTE_F(adr, src) |
30558 | dst = DREGu8((Opcode >> 9) & 7); |
30559 | res = dst - src; |
30560 | flag_N = flag_C = res; |
30561 | flag_V = (src ^ dst) & (res ^ dst); |
30562 | flag_NotZ = res & 0xFF; |
30563 | POST_IO |
30564 | RET(8) |
30565 | } |
30566 | |
30567 | // CMP |
30568 | OPCODE(0xB018) |
30569 | { |
30570 | u32 adr, res; |
30571 | u32 src, dst; |
30572 | |
30573 | adr = AREG((Opcode >> 0) & 7); |
30574 | AREG((Opcode >> 0) & 7) += 1; |
30575 | PRE_IO |
30576 | READ_BYTE_F(adr, src) |
30577 | dst = DREGu8((Opcode >> 9) & 7); |
30578 | res = dst - src; |
30579 | flag_N = flag_C = res; |
30580 | flag_V = (src ^ dst) & (res ^ dst); |
30581 | flag_NotZ = res & 0xFF; |
30582 | POST_IO |
30583 | RET(8) |
30584 | } |
30585 | |
30586 | // CMP |
30587 | OPCODE(0xB020) |
30588 | { |
30589 | u32 adr, res; |
30590 | u32 src, dst; |
30591 | |
30592 | adr = AREG((Opcode >> 0) & 7) - 1; |
30593 | AREG((Opcode >> 0) & 7) = adr; |
30594 | PRE_IO |
30595 | READ_BYTE_F(adr, src) |
30596 | dst = DREGu8((Opcode >> 9) & 7); |
30597 | res = dst - src; |
30598 | flag_N = flag_C = res; |
30599 | flag_V = (src ^ dst) & (res ^ dst); |
30600 | flag_NotZ = res & 0xFF; |
30601 | POST_IO |
30602 | RET(10) |
30603 | } |
30604 | |
30605 | // CMP |
30606 | OPCODE(0xB028) |
30607 | { |
30608 | u32 adr, res; |
30609 | u32 src, dst; |
30610 | |
30611 | FETCH_SWORD(adr); |
30612 | adr += AREG((Opcode >> 0) & 7); |
30613 | PRE_IO |
30614 | READ_BYTE_F(adr, src) |
30615 | dst = DREGu8((Opcode >> 9) & 7); |
30616 | res = dst - src; |
30617 | flag_N = flag_C = res; |
30618 | flag_V = (src ^ dst) & (res ^ dst); |
30619 | flag_NotZ = res & 0xFF; |
30620 | POST_IO |
30621 | RET(12) |
30622 | } |
30623 | |
30624 | // CMP |
30625 | OPCODE(0xB030) |
30626 | { |
30627 | u32 adr, res; |
30628 | u32 src, dst; |
30629 | |
30630 | adr = AREG((Opcode >> 0) & 7); |
30631 | DECODE_EXT_WORD |
30632 | PRE_IO |
30633 | READ_BYTE_F(adr, src) |
30634 | dst = DREGu8((Opcode >> 9) & 7); |
30635 | res = dst - src; |
30636 | flag_N = flag_C = res; |
30637 | flag_V = (src ^ dst) & (res ^ dst); |
30638 | flag_NotZ = res & 0xFF; |
30639 | POST_IO |
30640 | RET(14) |
30641 | } |
30642 | |
30643 | // CMP |
30644 | OPCODE(0xB038) |
30645 | { |
30646 | u32 adr, res; |
30647 | u32 src, dst; |
30648 | |
30649 | FETCH_SWORD(adr); |
30650 | PRE_IO |
30651 | READ_BYTE_F(adr, src) |
30652 | dst = DREGu8((Opcode >> 9) & 7); |
30653 | res = dst - src; |
30654 | flag_N = flag_C = res; |
30655 | flag_V = (src ^ dst) & (res ^ dst); |
30656 | flag_NotZ = res & 0xFF; |
30657 | POST_IO |
30658 | RET(12) |
30659 | } |
30660 | |
30661 | // CMP |
30662 | OPCODE(0xB039) |
30663 | { |
30664 | u32 adr, res; |
30665 | u32 src, dst; |
30666 | |
30667 | FETCH_LONG(adr); |
30668 | PRE_IO |
30669 | READ_BYTE_F(adr, src) |
30670 | dst = DREGu8((Opcode >> 9) & 7); |
30671 | res = dst - src; |
30672 | flag_N = flag_C = res; |
30673 | flag_V = (src ^ dst) & (res ^ dst); |
30674 | flag_NotZ = res & 0xFF; |
30675 | POST_IO |
30676 | RET(16) |
30677 | } |
30678 | |
30679 | // CMP |
30680 | OPCODE(0xB03A) |
30681 | { |
30682 | u32 adr, res; |
30683 | u32 src, dst; |
30684 | |
30685 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30686 | PC++; |
30687 | PRE_IO |
30688 | READ_BYTE_F(adr, src) |
30689 | dst = DREGu8((Opcode >> 9) & 7); |
30690 | res = dst - src; |
30691 | flag_N = flag_C = res; |
30692 | flag_V = (src ^ dst) & (res ^ dst); |
30693 | flag_NotZ = res & 0xFF; |
30694 | POST_IO |
30695 | RET(12) |
30696 | } |
30697 | |
30698 | // CMP |
30699 | OPCODE(0xB03B) |
30700 | { |
30701 | u32 adr, res; |
30702 | u32 src, dst; |
30703 | |
30704 | adr = (u32)(PC) - BasePC; |
30705 | DECODE_EXT_WORD |
30706 | PRE_IO |
30707 | READ_BYTE_F(adr, src) |
30708 | dst = DREGu8((Opcode >> 9) & 7); |
30709 | res = dst - src; |
30710 | flag_N = flag_C = res; |
30711 | flag_V = (src ^ dst) & (res ^ dst); |
30712 | flag_NotZ = res & 0xFF; |
30713 | POST_IO |
30714 | RET(14) |
30715 | } |
30716 | |
30717 | // CMP |
30718 | OPCODE(0xB03C) |
30719 | { |
30720 | u32 adr, res; |
30721 | u32 src, dst; |
30722 | |
30723 | FETCH_BYTE(src); |
30724 | dst = DREGu8((Opcode >> 9) & 7); |
30725 | res = dst - src; |
30726 | flag_N = flag_C = res; |
30727 | flag_V = (src ^ dst) & (res ^ dst); |
30728 | flag_NotZ = res & 0xFF; |
30729 | RET(8) |
30730 | } |
30731 | |
30732 | // CMP |
30733 | OPCODE(0xB01F) |
30734 | { |
30735 | u32 adr, res; |
30736 | u32 src, dst; |
30737 | |
30738 | adr = AREG(7); |
30739 | AREG(7) += 2; |
30740 | PRE_IO |
30741 | READ_BYTE_F(adr, src) |
30742 | dst = DREGu8((Opcode >> 9) & 7); |
30743 | res = dst - src; |
30744 | flag_N = flag_C = res; |
30745 | flag_V = (src ^ dst) & (res ^ dst); |
30746 | flag_NotZ = res & 0xFF; |
30747 | POST_IO |
30748 | RET(8) |
30749 | } |
30750 | |
30751 | // CMP |
30752 | OPCODE(0xB027) |
30753 | { |
30754 | u32 adr, res; |
30755 | u32 src, dst; |
30756 | |
30757 | adr = AREG(7) - 2; |
30758 | AREG(7) = adr; |
30759 | PRE_IO |
30760 | READ_BYTE_F(adr, src) |
30761 | dst = DREGu8((Opcode >> 9) & 7); |
30762 | res = dst - src; |
30763 | flag_N = flag_C = res; |
30764 | flag_V = (src ^ dst) & (res ^ dst); |
30765 | flag_NotZ = res & 0xFF; |
30766 | POST_IO |
30767 | RET(10) |
30768 | } |
30769 | |
30770 | // CMP |
30771 | OPCODE(0xB040) |
30772 | { |
30773 | u32 adr, res; |
30774 | u32 src, dst; |
30775 | |
30776 | src = DREGu16((Opcode >> 0) & 7); |
30777 | dst = DREGu16((Opcode >> 9) & 7); |
30778 | res = dst - src; |
30779 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30780 | flag_N = flag_C = res >> 8; |
30781 | flag_NotZ = res & 0xFFFF; |
30782 | RET(4) |
30783 | } |
30784 | |
30785 | // CMP |
30786 | OPCODE(0xB048) |
30787 | { |
30788 | u32 adr, res; |
30789 | u32 src, dst; |
30790 | |
30791 | src = AREGu16((Opcode >> 0) & 7); |
30792 | dst = DREGu16((Opcode >> 9) & 7); |
30793 | res = dst - src; |
30794 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30795 | flag_N = flag_C = res >> 8; |
30796 | flag_NotZ = res & 0xFFFF; |
30797 | RET(4) |
30798 | } |
30799 | |
30800 | // CMP |
30801 | OPCODE(0xB050) |
30802 | { |
30803 | u32 adr, res; |
30804 | u32 src, dst; |
30805 | |
30806 | adr = AREG((Opcode >> 0) & 7); |
30807 | PRE_IO |
30808 | READ_WORD_F(adr, src) |
30809 | dst = DREGu16((Opcode >> 9) & 7); |
30810 | res = dst - src; |
30811 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30812 | flag_N = flag_C = res >> 8; |
30813 | flag_NotZ = res & 0xFFFF; |
30814 | POST_IO |
30815 | RET(8) |
30816 | } |
30817 | |
30818 | // CMP |
30819 | OPCODE(0xB058) |
30820 | { |
30821 | u32 adr, res; |
30822 | u32 src, dst; |
30823 | |
30824 | adr = AREG((Opcode >> 0) & 7); |
30825 | AREG((Opcode >> 0) & 7) += 2; |
30826 | PRE_IO |
30827 | READ_WORD_F(adr, src) |
30828 | dst = DREGu16((Opcode >> 9) & 7); |
30829 | res = dst - src; |
30830 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30831 | flag_N = flag_C = res >> 8; |
30832 | flag_NotZ = res & 0xFFFF; |
30833 | POST_IO |
30834 | RET(8) |
30835 | } |
30836 | |
30837 | // CMP |
30838 | OPCODE(0xB060) |
30839 | { |
30840 | u32 adr, res; |
30841 | u32 src, dst; |
30842 | |
30843 | adr = AREG((Opcode >> 0) & 7) - 2; |
30844 | AREG((Opcode >> 0) & 7) = adr; |
30845 | PRE_IO |
30846 | READ_WORD_F(adr, src) |
30847 | dst = DREGu16((Opcode >> 9) & 7); |
30848 | res = dst - src; |
30849 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30850 | flag_N = flag_C = res >> 8; |
30851 | flag_NotZ = res & 0xFFFF; |
30852 | POST_IO |
30853 | RET(10) |
30854 | } |
30855 | |
30856 | // CMP |
30857 | OPCODE(0xB068) |
30858 | { |
30859 | u32 adr, res; |
30860 | u32 src, dst; |
30861 | |
30862 | FETCH_SWORD(adr); |
30863 | adr += AREG((Opcode >> 0) & 7); |
30864 | PRE_IO |
30865 | READ_WORD_F(adr, src) |
30866 | dst = DREGu16((Opcode >> 9) & 7); |
30867 | res = dst - src; |
30868 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30869 | flag_N = flag_C = res >> 8; |
30870 | flag_NotZ = res & 0xFFFF; |
30871 | POST_IO |
30872 | RET(12) |
30873 | } |
30874 | |
30875 | // CMP |
30876 | OPCODE(0xB070) |
30877 | { |
30878 | u32 adr, res; |
30879 | u32 src, dst; |
30880 | |
30881 | adr = AREG((Opcode >> 0) & 7); |
30882 | DECODE_EXT_WORD |
30883 | PRE_IO |
30884 | READ_WORD_F(adr, src) |
30885 | dst = DREGu16((Opcode >> 9) & 7); |
30886 | res = dst - src; |
30887 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30888 | flag_N = flag_C = res >> 8; |
30889 | flag_NotZ = res & 0xFFFF; |
30890 | POST_IO |
30891 | RET(14) |
30892 | } |
30893 | |
30894 | // CMP |
30895 | OPCODE(0xB078) |
30896 | { |
30897 | u32 adr, res; |
30898 | u32 src, dst; |
30899 | |
30900 | FETCH_SWORD(adr); |
30901 | PRE_IO |
30902 | READ_WORD_F(adr, src) |
30903 | dst = DREGu16((Opcode >> 9) & 7); |
30904 | res = dst - src; |
30905 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30906 | flag_N = flag_C = res >> 8; |
30907 | flag_NotZ = res & 0xFFFF; |
30908 | POST_IO |
30909 | RET(12) |
30910 | } |
30911 | |
30912 | // CMP |
30913 | OPCODE(0xB079) |
30914 | { |
30915 | u32 adr, res; |
30916 | u32 src, dst; |
30917 | |
30918 | FETCH_LONG(adr); |
30919 | PRE_IO |
30920 | READ_WORD_F(adr, src) |
30921 | dst = DREGu16((Opcode >> 9) & 7); |
30922 | res = dst - src; |
30923 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30924 | flag_N = flag_C = res >> 8; |
30925 | flag_NotZ = res & 0xFFFF; |
30926 | POST_IO |
30927 | RET(16) |
30928 | } |
30929 | |
30930 | // CMP |
30931 | OPCODE(0xB07A) |
30932 | { |
30933 | u32 adr, res; |
30934 | u32 src, dst; |
30935 | |
30936 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30937 | PC++; |
30938 | PRE_IO |
30939 | READ_WORD_F(adr, src) |
30940 | dst = DREGu16((Opcode >> 9) & 7); |
30941 | res = dst - src; |
30942 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30943 | flag_N = flag_C = res >> 8; |
30944 | flag_NotZ = res & 0xFFFF; |
30945 | POST_IO |
30946 | RET(12) |
30947 | } |
30948 | |
30949 | // CMP |
30950 | OPCODE(0xB07B) |
30951 | { |
30952 | u32 adr, res; |
30953 | u32 src, dst; |
30954 | |
30955 | adr = (u32)(PC) - BasePC; |
30956 | DECODE_EXT_WORD |
30957 | PRE_IO |
30958 | READ_WORD_F(adr, src) |
30959 | dst = DREGu16((Opcode >> 9) & 7); |
30960 | res = dst - src; |
30961 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30962 | flag_N = flag_C = res >> 8; |
30963 | flag_NotZ = res & 0xFFFF; |
30964 | POST_IO |
30965 | RET(14) |
30966 | } |
30967 | |
30968 | // CMP |
30969 | OPCODE(0xB07C) |
30970 | { |
30971 | u32 adr, res; |
30972 | u32 src, dst; |
30973 | |
30974 | FETCH_WORD(src); |
30975 | dst = DREGu16((Opcode >> 9) & 7); |
30976 | res = dst - src; |
30977 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30978 | flag_N = flag_C = res >> 8; |
30979 | flag_NotZ = res & 0xFFFF; |
30980 | RET(8) |
30981 | } |
30982 | |
30983 | // CMP |
30984 | OPCODE(0xB05F) |
30985 | { |
30986 | u32 adr, res; |
30987 | u32 src, dst; |
30988 | |
30989 | adr = AREG(7); |
30990 | AREG(7) += 2; |
30991 | PRE_IO |
30992 | READ_WORD_F(adr, src) |
30993 | dst = DREGu16((Opcode >> 9) & 7); |
30994 | res = dst - src; |
30995 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30996 | flag_N = flag_C = res >> 8; |
30997 | flag_NotZ = res & 0xFFFF; |
30998 | POST_IO |
30999 | RET(8) |
31000 | } |
31001 | |
31002 | // CMP |
31003 | OPCODE(0xB067) |
31004 | { |
31005 | u32 adr, res; |
31006 | u32 src, dst; |
31007 | |
31008 | adr = AREG(7) - 2; |
31009 | AREG(7) = adr; |
31010 | PRE_IO |
31011 | READ_WORD_F(adr, src) |
31012 | dst = DREGu16((Opcode >> 9) & 7); |
31013 | res = dst - src; |
31014 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31015 | flag_N = flag_C = res >> 8; |
31016 | flag_NotZ = res & 0xFFFF; |
31017 | POST_IO |
31018 | RET(10) |
31019 | } |
31020 | |
31021 | // CMP |
31022 | OPCODE(0xB080) |
31023 | { |
31024 | u32 adr, res; |
31025 | u32 src, dst; |
31026 | |
31027 | src = DREGu32((Opcode >> 0) & 7); |
31028 | dst = DREGu32((Opcode >> 9) & 7); |
31029 | res = dst - src; |
31030 | flag_NotZ = res; |
31031 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31032 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31033 | flag_N = res >> 24; |
31034 | RET(6) |
31035 | } |
31036 | |
31037 | // CMP |
31038 | OPCODE(0xB088) |
31039 | { |
31040 | u32 adr, res; |
31041 | u32 src, dst; |
31042 | |
31043 | src = AREGu32((Opcode >> 0) & 7); |
31044 | dst = DREGu32((Opcode >> 9) & 7); |
31045 | res = dst - src; |
31046 | flag_NotZ = res; |
31047 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31048 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31049 | flag_N = res >> 24; |
31050 | RET(6) |
31051 | } |
31052 | |
31053 | // CMP |
31054 | OPCODE(0xB090) |
31055 | { |
31056 | u32 adr, res; |
31057 | u32 src, dst; |
31058 | |
31059 | adr = AREG((Opcode >> 0) & 7); |
31060 | PRE_IO |
31061 | READ_LONG_F(adr, src) |
31062 | dst = DREGu32((Opcode >> 9) & 7); |
31063 | res = dst - src; |
31064 | flag_NotZ = res; |
31065 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31066 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31067 | flag_N = res >> 24; |
31068 | POST_IO |
31069 | RET(14) |
31070 | } |
31071 | |
31072 | // CMP |
31073 | OPCODE(0xB098) |
31074 | { |
31075 | u32 adr, res; |
31076 | u32 src, dst; |
31077 | |
31078 | adr = AREG((Opcode >> 0) & 7); |
31079 | AREG((Opcode >> 0) & 7) += 4; |
31080 | PRE_IO |
31081 | READ_LONG_F(adr, src) |
31082 | dst = DREGu32((Opcode >> 9) & 7); |
31083 | res = dst - src; |
31084 | flag_NotZ = res; |
31085 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31086 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31087 | flag_N = res >> 24; |
31088 | POST_IO |
31089 | RET(14) |
31090 | } |
31091 | |
31092 | // CMP |
31093 | OPCODE(0xB0A0) |
31094 | { |
31095 | u32 adr, res; |
31096 | u32 src, dst; |
31097 | |
31098 | adr = AREG((Opcode >> 0) & 7) - 4; |
31099 | AREG((Opcode >> 0) & 7) = adr; |
31100 | PRE_IO |
31101 | READ_LONG_F(adr, src) |
31102 | dst = DREGu32((Opcode >> 9) & 7); |
31103 | res = dst - src; |
31104 | flag_NotZ = res; |
31105 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31106 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31107 | flag_N = res >> 24; |
31108 | POST_IO |
31109 | RET(16) |
31110 | } |
31111 | |
31112 | // CMP |
31113 | OPCODE(0xB0A8) |
31114 | { |
31115 | u32 adr, res; |
31116 | u32 src, dst; |
31117 | |
31118 | FETCH_SWORD(adr); |
31119 | adr += AREG((Opcode >> 0) & 7); |
31120 | PRE_IO |
31121 | READ_LONG_F(adr, src) |
31122 | dst = DREGu32((Opcode >> 9) & 7); |
31123 | res = dst - src; |
31124 | flag_NotZ = res; |
31125 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31126 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31127 | flag_N = res >> 24; |
31128 | POST_IO |
31129 | RET(18) |
31130 | } |
31131 | |
31132 | // CMP |
31133 | OPCODE(0xB0B0) |
31134 | { |
31135 | u32 adr, res; |
31136 | u32 src, dst; |
31137 | |
31138 | adr = AREG((Opcode >> 0) & 7); |
31139 | DECODE_EXT_WORD |
31140 | PRE_IO |
31141 | READ_LONG_F(adr, src) |
31142 | dst = DREGu32((Opcode >> 9) & 7); |
31143 | res = dst - src; |
31144 | flag_NotZ = res; |
31145 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31146 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31147 | flag_N = res >> 24; |
31148 | POST_IO |
31149 | RET(20) |
31150 | } |
31151 | |
31152 | // CMP |
31153 | OPCODE(0xB0B8) |
31154 | { |
31155 | u32 adr, res; |
31156 | u32 src, dst; |
31157 | |
31158 | FETCH_SWORD(adr); |
31159 | PRE_IO |
31160 | READ_LONG_F(adr, src) |
31161 | dst = DREGu32((Opcode >> 9) & 7); |
31162 | res = dst - src; |
31163 | flag_NotZ = res; |
31164 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31165 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31166 | flag_N = res >> 24; |
31167 | POST_IO |
31168 | RET(18) |
31169 | } |
31170 | |
31171 | // CMP |
31172 | OPCODE(0xB0B9) |
31173 | { |
31174 | u32 adr, res; |
31175 | u32 src, dst; |
31176 | |
31177 | FETCH_LONG(adr); |
31178 | PRE_IO |
31179 | READ_LONG_F(adr, src) |
31180 | dst = DREGu32((Opcode >> 9) & 7); |
31181 | res = dst - src; |
31182 | flag_NotZ = res; |
31183 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31184 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31185 | flag_N = res >> 24; |
31186 | POST_IO |
31187 | RET(22) |
31188 | } |
31189 | |
31190 | // CMP |
31191 | OPCODE(0xB0BA) |
31192 | { |
31193 | u32 adr, res; |
31194 | u32 src, dst; |
31195 | |
31196 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
31197 | PC++; |
31198 | PRE_IO |
31199 | READ_LONG_F(adr, src) |
31200 | dst = DREGu32((Opcode >> 9) & 7); |
31201 | res = dst - src; |
31202 | flag_NotZ = res; |
31203 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31204 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31205 | flag_N = res >> 24; |
31206 | POST_IO |
31207 | RET(18) |
31208 | } |
31209 | |
31210 | // CMP |
31211 | OPCODE(0xB0BB) |
31212 | { |
31213 | u32 adr, res; |
31214 | u32 src, dst; |
31215 | |
31216 | adr = (u32)(PC) - BasePC; |
31217 | DECODE_EXT_WORD |
31218 | PRE_IO |
31219 | READ_LONG_F(adr, src) |
31220 | dst = DREGu32((Opcode >> 9) & 7); |
31221 | res = dst - src; |
31222 | flag_NotZ = res; |
31223 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31224 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31225 | flag_N = res >> 24; |
31226 | POST_IO |
31227 | RET(20) |
31228 | } |
31229 | |
31230 | // CMP |
31231 | OPCODE(0xB0BC) |
31232 | { |
31233 | u32 adr, res; |
31234 | u32 src, dst; |
31235 | |
31236 | FETCH_LONG(src); |
31237 | dst = DREGu32((Opcode >> 9) & 7); |
31238 | res = dst - src; |
31239 | flag_NotZ = res; |
31240 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31241 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31242 | flag_N = res >> 24; |
31243 | RET(14) |
31244 | } |
31245 | |
31246 | // CMP |
31247 | OPCODE(0xB09F) |
31248 | { |
31249 | u32 adr, res; |
31250 | u32 src, dst; |
31251 | |
31252 | adr = AREG(7); |
31253 | AREG(7) += 4; |
31254 | PRE_IO |
31255 | READ_LONG_F(adr, src) |
31256 | dst = DREGu32((Opcode >> 9) & 7); |
31257 | res = dst - src; |
31258 | flag_NotZ = res; |
31259 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31260 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31261 | flag_N = res >> 24; |
31262 | POST_IO |
31263 | RET(14) |
31264 | } |
31265 | |
31266 | // CMP |
31267 | OPCODE(0xB0A7) |
31268 | { |
31269 | u32 adr, res; |
31270 | u32 src, dst; |
31271 | |
31272 | adr = AREG(7) - 4; |
31273 | AREG(7) = adr; |
31274 | PRE_IO |
31275 | READ_LONG_F(adr, src) |
31276 | dst = DREGu32((Opcode >> 9) & 7); |
31277 | res = dst - src; |
31278 | flag_NotZ = res; |
31279 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31280 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31281 | flag_N = res >> 24; |
31282 | POST_IO |
31283 | RET(16) |
31284 | } |
31285 | |
31286 | // CMPM |
31287 | OPCODE(0xB108) |
31288 | { |
31289 | u32 adr, res; |
31290 | u32 src, dst; |
31291 | |
31292 | adr = AREG((Opcode >> 0) & 7); |
31293 | AREG((Opcode >> 0) & 7) += 1; |
31294 | PRE_IO |
31295 | READ_BYTE_F(adr, src) |
31296 | adr = AREG((Opcode >> 9) & 7); |
31297 | AREG((Opcode >> 9) & 7) += 1; |
31298 | READ_BYTE_F(adr, dst) |
31299 | res = dst - src; |
31300 | flag_N = flag_C = res; |
31301 | flag_V = (src ^ dst) & (res ^ dst); |
31302 | flag_NotZ = res & 0xFF; |
31303 | POST_IO |
31304 | RET(12) |
31305 | } |
31306 | |
31307 | // CMPM |
31308 | OPCODE(0xB148) |
31309 | { |
31310 | u32 adr, res; |
31311 | u32 src, dst; |
31312 | |
31313 | adr = AREG((Opcode >> 0) & 7); |
31314 | AREG((Opcode >> 0) & 7) += 2; |
31315 | PRE_IO |
31316 | READ_WORD_F(adr, src) |
31317 | adr = AREG((Opcode >> 9) & 7); |
31318 | AREG((Opcode >> 9) & 7) += 2; |
31319 | READ_WORD_F(adr, dst) |
31320 | res = dst - src; |
31321 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31322 | flag_N = flag_C = res >> 8; |
31323 | flag_NotZ = res & 0xFFFF; |
31324 | POST_IO |
31325 | RET(12) |
31326 | } |
31327 | |
31328 | // CMPM |
31329 | OPCODE(0xB188) |
31330 | { |
31331 | u32 adr, res; |
31332 | u32 src, dst; |
31333 | |
31334 | adr = AREG((Opcode >> 0) & 7); |
31335 | AREG((Opcode >> 0) & 7) += 4; |
31336 | PRE_IO |
31337 | READ_LONG_F(adr, src) |
31338 | adr = AREG((Opcode >> 9) & 7); |
31339 | AREG((Opcode >> 9) & 7) += 4; |
31340 | READ_LONG_F(adr, dst) |
31341 | res = dst - src; |
31342 | flag_NotZ = res; |
31343 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31344 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31345 | flag_N = res >> 24; |
31346 | POST_IO |
31347 | RET(20) |
31348 | } |
31349 | |
31350 | // CMP7M |
31351 | OPCODE(0xB10F) |
31352 | { |
31353 | u32 adr, res; |
31354 | u32 src, dst; |
31355 | |
31356 | adr = AREG(7); |
31357 | AREG(7) += 2; |
31358 | PRE_IO |
31359 | READ_BYTE_F(adr, src) |
31360 | adr = AREG((Opcode >> 9) & 7); |
31361 | AREG((Opcode >> 9) & 7) += 1; |
31362 | READ_BYTE_F(adr, dst) |
31363 | res = dst - src; |
31364 | flag_N = flag_C = res; |
31365 | flag_V = (src ^ dst) & (res ^ dst); |
31366 | flag_NotZ = res & 0xFF; |
31367 | POST_IO |
31368 | RET(12) |
31369 | } |
31370 | |
31371 | // CMP7M |
31372 | OPCODE(0xB14F) |
31373 | { |
31374 | u32 adr, res; |
31375 | u32 src, dst; |
31376 | |
31377 | adr = AREG(7); |
31378 | AREG(7) += 2; |
31379 | PRE_IO |
31380 | READ_WORD_F(adr, src) |
31381 | adr = AREG((Opcode >> 9) & 7); |
31382 | AREG((Opcode >> 9) & 7) += 2; |
31383 | READ_WORD_F(adr, dst) |
31384 | res = dst - src; |
31385 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31386 | flag_N = flag_C = res >> 8; |
31387 | flag_NotZ = res & 0xFFFF; |
31388 | POST_IO |
31389 | RET(12) |
31390 | } |
31391 | |
31392 | // CMP7M |
31393 | OPCODE(0xB18F) |
31394 | { |
31395 | u32 adr, res; |
31396 | u32 src, dst; |
31397 | |
31398 | adr = AREG(7); |
31399 | AREG(7) += 4; |
31400 | PRE_IO |
31401 | READ_LONG_F(adr, src) |
31402 | adr = AREG((Opcode >> 9) & 7); |
31403 | AREG((Opcode >> 9) & 7) += 4; |
31404 | READ_LONG_F(adr, dst) |
31405 | res = dst - src; |
31406 | flag_NotZ = res; |
31407 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31408 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31409 | flag_N = res >> 24; |
31410 | POST_IO |
31411 | RET(20) |
31412 | } |
31413 | |
31414 | // CMPM7 |
31415 | OPCODE(0xBF08) |
31416 | { |
31417 | u32 adr, res; |
31418 | u32 src, dst; |
31419 | |
31420 | adr = AREG((Opcode >> 0) & 7); |
31421 | AREG((Opcode >> 0) & 7) += 1; |
31422 | PRE_IO |
31423 | READ_BYTE_F(adr, src) |
31424 | adr = AREG(7); |
31425 | AREG(7) += 2; |
31426 | READ_BYTE_F(adr, dst) |
31427 | res = dst - src; |
31428 | flag_N = flag_C = res; |
31429 | flag_V = (src ^ dst) & (res ^ dst); |
31430 | flag_NotZ = res & 0xFF; |
31431 | POST_IO |
31432 | RET(12) |
31433 | } |
31434 | |
31435 | // CMPM7 |
31436 | OPCODE(0xBF48) |
31437 | { |
31438 | u32 adr, res; |
31439 | u32 src, dst; |
31440 | |
31441 | adr = AREG((Opcode >> 0) & 7); |
31442 | AREG((Opcode >> 0) & 7) += 2; |
31443 | PRE_IO |
31444 | READ_WORD_F(adr, src) |
31445 | adr = AREG(7); |
31446 | AREG(7) += 2; |
31447 | READ_WORD_F(adr, dst) |
31448 | res = dst - src; |
31449 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31450 | flag_N = flag_C = res >> 8; |
31451 | flag_NotZ = res & 0xFFFF; |
31452 | POST_IO |
31453 | RET(12) |
31454 | } |
31455 | |
31456 | // CMPM7 |
31457 | OPCODE(0xBF88) |
31458 | { |
31459 | u32 adr, res; |
31460 | u32 src, dst; |
31461 | |
31462 | adr = AREG((Opcode >> 0) & 7); |
31463 | AREG((Opcode >> 0) & 7) += 4; |
31464 | PRE_IO |
31465 | READ_LONG_F(adr, src) |
31466 | adr = AREG(7); |
31467 | AREG(7) += 4; |
31468 | READ_LONG_F(adr, dst) |
31469 | res = dst - src; |
31470 | flag_NotZ = res; |
31471 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31472 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31473 | flag_N = res >> 24; |
31474 | POST_IO |
31475 | RET(20) |
31476 | } |
31477 | |
31478 | // CMP7M7 |
31479 | OPCODE(0xBF0F) |
31480 | { |
31481 | u32 adr, res; |
31482 | u32 src, dst; |
31483 | |
31484 | adr = AREG(7); |
31485 | AREG(7) += 2; |
31486 | PRE_IO |
31487 | READ_BYTE_F(adr, src) |
31488 | adr = AREG(7); |
31489 | AREG(7) += 2; |
31490 | READ_BYTE_F(adr, dst) |
31491 | res = dst - src; |
31492 | flag_N = flag_C = res; |
31493 | flag_V = (src ^ dst) & (res ^ dst); |
31494 | flag_NotZ = res & 0xFF; |
31495 | POST_IO |
31496 | RET(12) |
31497 | } |
31498 | |
31499 | // CMP7M7 |
31500 | OPCODE(0xBF4F) |
31501 | { |
31502 | u32 adr, res; |
31503 | u32 src, dst; |
31504 | |
31505 | adr = AREG(7); |
31506 | AREG(7) += 2; |
31507 | PRE_IO |
31508 | READ_WORD_F(adr, src) |
31509 | adr = AREG(7); |
31510 | AREG(7) += 2; |
31511 | READ_WORD_F(adr, dst) |
31512 | res = dst - src; |
31513 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31514 | flag_N = flag_C = res >> 8; |
31515 | flag_NotZ = res & 0xFFFF; |
31516 | POST_IO |
31517 | RET(12) |
31518 | } |
31519 | |
31520 | // CMP7M7 |
31521 | OPCODE(0xBF8F) |
31522 | { |
31523 | u32 adr, res; |
31524 | u32 src, dst; |
31525 | |
31526 | adr = AREG(7); |
31527 | AREG(7) += 4; |
31528 | PRE_IO |
31529 | READ_LONG_F(adr, src) |
31530 | adr = AREG(7); |
31531 | AREG(7) += 4; |
31532 | READ_LONG_F(adr, dst) |
31533 | res = dst - src; |
31534 | flag_NotZ = res; |
31535 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31536 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31537 | flag_N = res >> 24; |
31538 | POST_IO |
31539 | RET(20) |
31540 | } |
31541 | |
31542 | // EORDa |
31543 | OPCODE(0xB100) |
31544 | { |
31545 | u32 adr, res; |
31546 | u32 src, dst; |
31547 | |
31548 | src = DREGu8((Opcode >> 9) & 7); |
31549 | res = DREGu8((Opcode >> 0) & 7); |
31550 | res ^= src; |
31551 | flag_C = 0; |
31552 | flag_V = 0; |
31553 | flag_NotZ = res; |
31554 | flag_N = res; |
31555 | DREGu8((Opcode >> 0) & 7) = res; |
31556 | RET(4) |
31557 | } |
31558 | |
31559 | // EORDa |
31560 | OPCODE(0xB110) |
31561 | { |
31562 | u32 adr, res; |
31563 | u32 src, dst; |
31564 | |
31565 | src = DREGu8((Opcode >> 9) & 7); |
31566 | adr = AREG((Opcode >> 0) & 7); |
31567 | PRE_IO |
31568 | READ_BYTE_F(adr, res) |
31569 | res ^= src; |
31570 | flag_C = 0; |
31571 | flag_V = 0; |
31572 | flag_NotZ = res; |
31573 | flag_N = res; |
31574 | WRITE_BYTE_F(adr, res) |
31575 | POST_IO |
31576 | RET(12) |
31577 | } |
31578 | |
31579 | // EORDa |
31580 | OPCODE(0xB118) |
31581 | { |
31582 | u32 adr, res; |
31583 | u32 src, dst; |
31584 | |
31585 | src = DREGu8((Opcode >> 9) & 7); |
31586 | adr = AREG((Opcode >> 0) & 7); |
31587 | AREG((Opcode >> 0) & 7) += 1; |
31588 | PRE_IO |
31589 | READ_BYTE_F(adr, res) |
31590 | res ^= src; |
31591 | flag_C = 0; |
31592 | flag_V = 0; |
31593 | flag_NotZ = res; |
31594 | flag_N = res; |
31595 | WRITE_BYTE_F(adr, res) |
31596 | POST_IO |
31597 | RET(12) |
31598 | } |
31599 | |
31600 | // EORDa |
31601 | OPCODE(0xB120) |
31602 | { |
31603 | u32 adr, res; |
31604 | u32 src, dst; |
31605 | |
31606 | src = DREGu8((Opcode >> 9) & 7); |
31607 | adr = AREG((Opcode >> 0) & 7) - 1; |
31608 | AREG((Opcode >> 0) & 7) = adr; |
31609 | PRE_IO |
31610 | READ_BYTE_F(adr, res) |
31611 | res ^= src; |
31612 | flag_C = 0; |
31613 | flag_V = 0; |
31614 | flag_NotZ = res; |
31615 | flag_N = res; |
31616 | WRITE_BYTE_F(adr, res) |
31617 | POST_IO |
31618 | RET(14) |
31619 | } |
31620 | |
31621 | // EORDa |
31622 | OPCODE(0xB128) |
31623 | { |
31624 | u32 adr, res; |
31625 | u32 src, dst; |
31626 | |
31627 | src = DREGu8((Opcode >> 9) & 7); |
31628 | FETCH_SWORD(adr); |
31629 | adr += AREG((Opcode >> 0) & 7); |
31630 | PRE_IO |
31631 | READ_BYTE_F(adr, res) |
31632 | res ^= src; |
31633 | flag_C = 0; |
31634 | flag_V = 0; |
31635 | flag_NotZ = res; |
31636 | flag_N = res; |
31637 | WRITE_BYTE_F(adr, res) |
31638 | POST_IO |
31639 | RET(16) |
31640 | } |
31641 | |
31642 | // EORDa |
31643 | OPCODE(0xB130) |
31644 | { |
31645 | u32 adr, res; |
31646 | u32 src, dst; |
31647 | |
31648 | src = DREGu8((Opcode >> 9) & 7); |
31649 | adr = AREG((Opcode >> 0) & 7); |
31650 | DECODE_EXT_WORD |
31651 | PRE_IO |
31652 | READ_BYTE_F(adr, res) |
31653 | res ^= src; |
31654 | flag_C = 0; |
31655 | flag_V = 0; |
31656 | flag_NotZ = res; |
31657 | flag_N = res; |
31658 | WRITE_BYTE_F(adr, res) |
31659 | POST_IO |
31660 | RET(18) |
31661 | } |
31662 | |
31663 | // EORDa |
31664 | OPCODE(0xB138) |
31665 | { |
31666 | u32 adr, res; |
31667 | u32 src, dst; |
31668 | |
31669 | src = DREGu8((Opcode >> 9) & 7); |
31670 | FETCH_SWORD(adr); |
31671 | PRE_IO |
31672 | READ_BYTE_F(adr, res) |
31673 | res ^= src; |
31674 | flag_C = 0; |
31675 | flag_V = 0; |
31676 | flag_NotZ = res; |
31677 | flag_N = res; |
31678 | WRITE_BYTE_F(adr, res) |
31679 | POST_IO |
31680 | RET(16) |
31681 | } |
31682 | |
31683 | // EORDa |
31684 | OPCODE(0xB139) |
31685 | { |
31686 | u32 adr, res; |
31687 | u32 src, dst; |
31688 | |
31689 | src = DREGu8((Opcode >> 9) & 7); |
31690 | FETCH_LONG(adr); |
31691 | PRE_IO |
31692 | READ_BYTE_F(adr, res) |
31693 | res ^= src; |
31694 | flag_C = 0; |
31695 | flag_V = 0; |
31696 | flag_NotZ = res; |
31697 | flag_N = res; |
31698 | WRITE_BYTE_F(adr, res) |
31699 | POST_IO |
31700 | RET(20) |
31701 | } |
31702 | |
31703 | // EORDa |
31704 | OPCODE(0xB11F) |
31705 | { |
31706 | u32 adr, res; |
31707 | u32 src, dst; |
31708 | |
31709 | src = DREGu8((Opcode >> 9) & 7); |
31710 | adr = AREG(7); |
31711 | AREG(7) += 2; |
31712 | PRE_IO |
31713 | READ_BYTE_F(adr, res) |
31714 | res ^= src; |
31715 | flag_C = 0; |
31716 | flag_V = 0; |
31717 | flag_NotZ = res; |
31718 | flag_N = res; |
31719 | WRITE_BYTE_F(adr, res) |
31720 | POST_IO |
31721 | RET(12) |
31722 | } |
31723 | |
31724 | // EORDa |
31725 | OPCODE(0xB127) |
31726 | { |
31727 | u32 adr, res; |
31728 | u32 src, dst; |
31729 | |
31730 | src = DREGu8((Opcode >> 9) & 7); |
31731 | adr = AREG(7) - 2; |
31732 | AREG(7) = adr; |
31733 | PRE_IO |
31734 | READ_BYTE_F(adr, res) |
31735 | res ^= src; |
31736 | flag_C = 0; |
31737 | flag_V = 0; |
31738 | flag_NotZ = res; |
31739 | flag_N = res; |
31740 | WRITE_BYTE_F(adr, res) |
31741 | POST_IO |
31742 | RET(14) |
31743 | } |
31744 | |
31745 | // EORDa |
31746 | OPCODE(0xB140) |
31747 | { |
31748 | u32 adr, res; |
31749 | u32 src, dst; |
31750 | |
31751 | src = DREGu16((Opcode >> 9) & 7); |
31752 | res = DREGu16((Opcode >> 0) & 7); |
31753 | res ^= src; |
31754 | flag_C = 0; |
31755 | flag_V = 0; |
31756 | flag_NotZ = res; |
31757 | flag_N = res >> 8; |
31758 | DREGu16((Opcode >> 0) & 7) = res; |
31759 | RET(4) |
31760 | } |
31761 | |
31762 | // EORDa |
31763 | OPCODE(0xB150) |
31764 | { |
31765 | u32 adr, res; |
31766 | u32 src, dst; |
31767 | |
31768 | src = DREGu16((Opcode >> 9) & 7); |
31769 | adr = AREG((Opcode >> 0) & 7); |
31770 | PRE_IO |
31771 | READ_WORD_F(adr, res) |
31772 | res ^= src; |
31773 | flag_C = 0; |
31774 | flag_V = 0; |
31775 | flag_NotZ = res; |
31776 | flag_N = res >> 8; |
31777 | WRITE_WORD_F(adr, res) |
31778 | POST_IO |
31779 | RET(12) |
31780 | } |
31781 | |
31782 | // EORDa |
31783 | OPCODE(0xB158) |
31784 | { |
31785 | u32 adr, res; |
31786 | u32 src, dst; |
31787 | |
31788 | src = DREGu16((Opcode >> 9) & 7); |
31789 | adr = AREG((Opcode >> 0) & 7); |
31790 | AREG((Opcode >> 0) & 7) += 2; |
31791 | PRE_IO |
31792 | READ_WORD_F(adr, res) |
31793 | res ^= src; |
31794 | flag_C = 0; |
31795 | flag_V = 0; |
31796 | flag_NotZ = res; |
31797 | flag_N = res >> 8; |
31798 | WRITE_WORD_F(adr, res) |
31799 | POST_IO |
31800 | RET(12) |
31801 | } |
31802 | |
31803 | // EORDa |
31804 | OPCODE(0xB160) |
31805 | { |
31806 | u32 adr, res; |
31807 | u32 src, dst; |
31808 | |
31809 | src = DREGu16((Opcode >> 9) & 7); |
31810 | adr = AREG((Opcode >> 0) & 7) - 2; |
31811 | AREG((Opcode >> 0) & 7) = adr; |
31812 | PRE_IO |
31813 | READ_WORD_F(adr, res) |
31814 | res ^= src; |
31815 | flag_C = 0; |
31816 | flag_V = 0; |
31817 | flag_NotZ = res; |
31818 | flag_N = res >> 8; |
31819 | WRITE_WORD_F(adr, res) |
31820 | POST_IO |
31821 | RET(14) |
31822 | } |
31823 | |
31824 | // EORDa |
31825 | OPCODE(0xB168) |
31826 | { |
31827 | u32 adr, res; |
31828 | u32 src, dst; |
31829 | |
31830 | src = DREGu16((Opcode >> 9) & 7); |
31831 | FETCH_SWORD(adr); |
31832 | adr += AREG((Opcode >> 0) & 7); |
31833 | PRE_IO |
31834 | READ_WORD_F(adr, res) |
31835 | res ^= src; |
31836 | flag_C = 0; |
31837 | flag_V = 0; |
31838 | flag_NotZ = res; |
31839 | flag_N = res >> 8; |
31840 | WRITE_WORD_F(adr, res) |
31841 | POST_IO |
31842 | RET(16) |
31843 | } |
31844 | |
31845 | // EORDa |
31846 | OPCODE(0xB170) |
31847 | { |
31848 | u32 adr, res; |
31849 | u32 src, dst; |
31850 | |
31851 | src = DREGu16((Opcode >> 9) & 7); |
31852 | adr = AREG((Opcode >> 0) & 7); |
31853 | DECODE_EXT_WORD |
31854 | PRE_IO |
31855 | READ_WORD_F(adr, res) |
31856 | res ^= src; |
31857 | flag_C = 0; |
31858 | flag_V = 0; |
31859 | flag_NotZ = res; |
31860 | flag_N = res >> 8; |
31861 | WRITE_WORD_F(adr, res) |
31862 | POST_IO |
31863 | RET(18) |
31864 | } |
31865 | |
31866 | // EORDa |
31867 | OPCODE(0xB178) |
31868 | { |
31869 | u32 adr, res; |
31870 | u32 src, dst; |
31871 | |
31872 | src = DREGu16((Opcode >> 9) & 7); |
31873 | FETCH_SWORD(adr); |
31874 | PRE_IO |
31875 | READ_WORD_F(adr, res) |
31876 | res ^= src; |
31877 | flag_C = 0; |
31878 | flag_V = 0; |
31879 | flag_NotZ = res; |
31880 | flag_N = res >> 8; |
31881 | WRITE_WORD_F(adr, res) |
31882 | POST_IO |
31883 | RET(16) |
31884 | } |
31885 | |
31886 | // EORDa |
31887 | OPCODE(0xB179) |
31888 | { |
31889 | u32 adr, res; |
31890 | u32 src, dst; |
31891 | |
31892 | src = DREGu16((Opcode >> 9) & 7); |
31893 | FETCH_LONG(adr); |
31894 | PRE_IO |
31895 | READ_WORD_F(adr, res) |
31896 | res ^= src; |
31897 | flag_C = 0; |
31898 | flag_V = 0; |
31899 | flag_NotZ = res; |
31900 | flag_N = res >> 8; |
31901 | WRITE_WORD_F(adr, res) |
31902 | POST_IO |
31903 | RET(20) |
31904 | } |
31905 | |
31906 | // EORDa |
31907 | OPCODE(0xB15F) |
31908 | { |
31909 | u32 adr, res; |
31910 | u32 src, dst; |
31911 | |
31912 | src = DREGu16((Opcode >> 9) & 7); |
31913 | adr = AREG(7); |
31914 | AREG(7) += 2; |
31915 | PRE_IO |
31916 | READ_WORD_F(adr, res) |
31917 | res ^= src; |
31918 | flag_C = 0; |
31919 | flag_V = 0; |
31920 | flag_NotZ = res; |
31921 | flag_N = res >> 8; |
31922 | WRITE_WORD_F(adr, res) |
31923 | POST_IO |
31924 | RET(12) |
31925 | } |
31926 | |
31927 | // EORDa |
31928 | OPCODE(0xB167) |
31929 | { |
31930 | u32 adr, res; |
31931 | u32 src, dst; |
31932 | |
31933 | src = DREGu16((Opcode >> 9) & 7); |
31934 | adr = AREG(7) - 2; |
31935 | AREG(7) = adr; |
31936 | PRE_IO |
31937 | READ_WORD_F(adr, res) |
31938 | res ^= src; |
31939 | flag_C = 0; |
31940 | flag_V = 0; |
31941 | flag_NotZ = res; |
31942 | flag_N = res >> 8; |
31943 | WRITE_WORD_F(adr, res) |
31944 | POST_IO |
31945 | RET(14) |
31946 | } |
31947 | |
31948 | // EORDa |
31949 | OPCODE(0xB180) |
31950 | { |
31951 | u32 adr, res; |
31952 | u32 src, dst; |
31953 | |
31954 | src = DREGu32((Opcode >> 9) & 7); |
31955 | res = DREGu32((Opcode >> 0) & 7); |
31956 | res ^= src; |
31957 | flag_C = 0; |
31958 | flag_V = 0; |
31959 | flag_NotZ = res; |
31960 | flag_N = res >> 24; |
31961 | DREGu32((Opcode >> 0) & 7) = res; |
31962 | RET(8) |
31963 | } |
31964 | |
31965 | // EORDa |
31966 | OPCODE(0xB190) |
31967 | { |
31968 | u32 adr, res; |
31969 | u32 src, dst; |
31970 | |
31971 | src = DREGu32((Opcode >> 9) & 7); |
31972 | adr = AREG((Opcode >> 0) & 7); |
31973 | PRE_IO |
31974 | READ_LONG_F(adr, res) |
31975 | res ^= src; |
31976 | flag_C = 0; |
31977 | flag_V = 0; |
31978 | flag_NotZ = res; |
31979 | flag_N = res >> 24; |
31980 | WRITE_LONG_F(adr, res) |
31981 | POST_IO |
31982 | RET(20) |
31983 | } |
31984 | |
31985 | // EORDa |
31986 | OPCODE(0xB198) |
31987 | { |
31988 | u32 adr, res; |
31989 | u32 src, dst; |
31990 | |
31991 | src = DREGu32((Opcode >> 9) & 7); |
31992 | adr = AREG((Opcode >> 0) & 7); |
31993 | AREG((Opcode >> 0) & 7) += 4; |
31994 | PRE_IO |
31995 | READ_LONG_F(adr, res) |
31996 | res ^= src; |
31997 | flag_C = 0; |
31998 | flag_V = 0; |
31999 | flag_NotZ = res; |
32000 | flag_N = res >> 24; |
32001 | WRITE_LONG_F(adr, res) |
32002 | POST_IO |
32003 | RET(20) |
32004 | } |
32005 | |
32006 | // EORDa |
32007 | OPCODE(0xB1A0) |
32008 | { |
32009 | u32 adr, res; |
32010 | u32 src, dst; |
32011 | |
32012 | src = DREGu32((Opcode >> 9) & 7); |
32013 | adr = AREG((Opcode >> 0) & 7) - 4; |
32014 | AREG((Opcode >> 0) & 7) = adr; |
32015 | PRE_IO |
32016 | READ_LONG_F(adr, res) |
32017 | res ^= src; |
32018 | flag_C = 0; |
32019 | flag_V = 0; |
32020 | flag_NotZ = res; |
32021 | flag_N = res >> 24; |
32022 | WRITE_LONG_F(adr, res) |
32023 | POST_IO |
32024 | RET(22) |
32025 | } |
32026 | |
32027 | // EORDa |
32028 | OPCODE(0xB1A8) |
32029 | { |
32030 | u32 adr, res; |
32031 | u32 src, dst; |
32032 | |
32033 | src = DREGu32((Opcode >> 9) & 7); |
32034 | FETCH_SWORD(adr); |
32035 | adr += AREG((Opcode >> 0) & 7); |
32036 | PRE_IO |
32037 | READ_LONG_F(adr, res) |
32038 | res ^= src; |
32039 | flag_C = 0; |
32040 | flag_V = 0; |
32041 | flag_NotZ = res; |
32042 | flag_N = res >> 24; |
32043 | WRITE_LONG_F(adr, res) |
32044 | POST_IO |
32045 | RET(24) |
32046 | } |
32047 | |
32048 | // EORDa |
32049 | OPCODE(0xB1B0) |
32050 | { |
32051 | u32 adr, res; |
32052 | u32 src, dst; |
32053 | |
32054 | src = DREGu32((Opcode >> 9) & 7); |
32055 | adr = AREG((Opcode >> 0) & 7); |
32056 | DECODE_EXT_WORD |
32057 | PRE_IO |
32058 | READ_LONG_F(adr, res) |
32059 | res ^= src; |
32060 | flag_C = 0; |
32061 | flag_V = 0; |
32062 | flag_NotZ = res; |
32063 | flag_N = res >> 24; |
32064 | WRITE_LONG_F(adr, res) |
32065 | POST_IO |
32066 | RET(26) |
32067 | } |
32068 | |
32069 | // EORDa |
32070 | OPCODE(0xB1B8) |
32071 | { |
32072 | u32 adr, res; |
32073 | u32 src, dst; |
32074 | |
32075 | src = DREGu32((Opcode >> 9) & 7); |
32076 | FETCH_SWORD(adr); |
32077 | PRE_IO |
32078 | READ_LONG_F(adr, res) |
32079 | res ^= src; |
32080 | flag_C = 0; |
32081 | flag_V = 0; |
32082 | flag_NotZ = res; |
32083 | flag_N = res >> 24; |
32084 | WRITE_LONG_F(adr, res) |
32085 | POST_IO |
32086 | RET(24) |
32087 | } |
32088 | |
32089 | // EORDa |
32090 | OPCODE(0xB1B9) |
32091 | { |
32092 | u32 adr, res; |
32093 | u32 src, dst; |
32094 | |
32095 | src = DREGu32((Opcode >> 9) & 7); |
32096 | FETCH_LONG(adr); |
32097 | PRE_IO |
32098 | READ_LONG_F(adr, res) |
32099 | res ^= src; |
32100 | flag_C = 0; |
32101 | flag_V = 0; |
32102 | flag_NotZ = res; |
32103 | flag_N = res >> 24; |
32104 | WRITE_LONG_F(adr, res) |
32105 | POST_IO |
32106 | RET(28) |
32107 | } |
32108 | |
32109 | // EORDa |
32110 | OPCODE(0xB19F) |
32111 | { |
32112 | u32 adr, res; |
32113 | u32 src, dst; |
32114 | |
32115 | src = DREGu32((Opcode >> 9) & 7); |
32116 | adr = AREG(7); |
32117 | AREG(7) += 4; |
32118 | PRE_IO |
32119 | READ_LONG_F(adr, res) |
32120 | res ^= src; |
32121 | flag_C = 0; |
32122 | flag_V = 0; |
32123 | flag_NotZ = res; |
32124 | flag_N = res >> 24; |
32125 | WRITE_LONG_F(adr, res) |
32126 | POST_IO |
32127 | RET(20) |
32128 | } |
32129 | |
32130 | // EORDa |
32131 | OPCODE(0xB1A7) |
32132 | { |
32133 | u32 adr, res; |
32134 | u32 src, dst; |
32135 | |
32136 | src = DREGu32((Opcode >> 9) & 7); |
32137 | adr = AREG(7) - 4; |
32138 | AREG(7) = adr; |
32139 | PRE_IO |
32140 | READ_LONG_F(adr, res) |
32141 | res ^= src; |
32142 | flag_C = 0; |
32143 | flag_V = 0; |
32144 | flag_NotZ = res; |
32145 | flag_N = res >> 24; |
32146 | WRITE_LONG_F(adr, res) |
32147 | POST_IO |
32148 | RET(22) |
32149 | } |
32150 | |
32151 | // CMPA |
32152 | OPCODE(0xB0C0) |
32153 | { |
32154 | u32 adr, res; |
32155 | u32 src, dst; |
32156 | |
32157 | src = (s32)DREGs16((Opcode >> 0) & 7); |
32158 | dst = AREGu32((Opcode >> 9) & 7); |
32159 | res = dst - src; |
32160 | flag_NotZ = res; |
32161 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32162 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32163 | flag_N = res >> 24; |
32164 | RET(6) |
32165 | } |
32166 | |
32167 | // CMPA |
32168 | OPCODE(0xB0C8) |
32169 | { |
32170 | u32 adr, res; |
32171 | u32 src, dst; |
32172 | |
32173 | src = (s32)AREGs16((Opcode >> 0) & 7); |
32174 | dst = AREGu32((Opcode >> 9) & 7); |
32175 | res = dst - src; |
32176 | flag_NotZ = res; |
32177 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32178 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32179 | flag_N = res >> 24; |
32180 | RET(6) |
32181 | } |
32182 | |
32183 | // CMPA |
32184 | OPCODE(0xB0D0) |
32185 | { |
32186 | u32 adr, res; |
32187 | u32 src, dst; |
32188 | |
32189 | adr = AREG((Opcode >> 0) & 7); |
32190 | PRE_IO |
32191 | READSX_WORD_F(adr, src) |
32192 | dst = AREGu32((Opcode >> 9) & 7); |
32193 | res = dst - src; |
32194 | flag_NotZ = res; |
32195 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32196 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32197 | flag_N = res >> 24; |
32198 | POST_IO |
32199 | RET(10) |
32200 | } |
32201 | |
32202 | // CMPA |
32203 | OPCODE(0xB0D8) |
32204 | { |
32205 | u32 adr, res; |
32206 | u32 src, dst; |
32207 | |
32208 | adr = AREG((Opcode >> 0) & 7); |
32209 | AREG((Opcode >> 0) & 7) += 2; |
32210 | PRE_IO |
32211 | READSX_WORD_F(adr, src) |
32212 | dst = AREGu32((Opcode >> 9) & 7); |
32213 | res = dst - src; |
32214 | flag_NotZ = res; |
32215 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32216 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32217 | flag_N = res >> 24; |
32218 | POST_IO |
32219 | RET(10) |
32220 | } |
32221 | |
32222 | // CMPA |
32223 | OPCODE(0xB0E0) |
32224 | { |
32225 | u32 adr, res; |
32226 | u32 src, dst; |
32227 | |
32228 | adr = AREG((Opcode >> 0) & 7) - 2; |
32229 | AREG((Opcode >> 0) & 7) = adr; |
32230 | PRE_IO |
32231 | READSX_WORD_F(adr, src) |
32232 | dst = AREGu32((Opcode >> 9) & 7); |
32233 | res = dst - src; |
32234 | flag_NotZ = res; |
32235 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32236 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32237 | flag_N = res >> 24; |
32238 | POST_IO |
32239 | RET(12) |
32240 | } |
32241 | |
32242 | // CMPA |
32243 | OPCODE(0xB0E8) |
32244 | { |
32245 | u32 adr, res; |
32246 | u32 src, dst; |
32247 | |
32248 | FETCH_SWORD(adr); |
32249 | adr += AREG((Opcode >> 0) & 7); |
32250 | PRE_IO |
32251 | READSX_WORD_F(adr, src) |
32252 | dst = AREGu32((Opcode >> 9) & 7); |
32253 | res = dst - src; |
32254 | flag_NotZ = res; |
32255 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32256 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32257 | flag_N = res >> 24; |
32258 | POST_IO |
32259 | RET(14) |
32260 | } |
32261 | |
32262 | // CMPA |
32263 | OPCODE(0xB0F0) |
32264 | { |
32265 | u32 adr, res; |
32266 | u32 src, dst; |
32267 | |
32268 | adr = AREG((Opcode >> 0) & 7); |
32269 | DECODE_EXT_WORD |
32270 | PRE_IO |
32271 | READSX_WORD_F(adr, src) |
32272 | dst = AREGu32((Opcode >> 9) & 7); |
32273 | res = dst - src; |
32274 | flag_NotZ = res; |
32275 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32276 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32277 | flag_N = res >> 24; |
32278 | POST_IO |
32279 | RET(16) |
32280 | } |
32281 | |
32282 | // CMPA |
32283 | OPCODE(0xB0F8) |
32284 | { |
32285 | u32 adr, res; |
32286 | u32 src, dst; |
32287 | |
32288 | FETCH_SWORD(adr); |
32289 | PRE_IO |
32290 | READSX_WORD_F(adr, src) |
32291 | dst = AREGu32((Opcode >> 9) & 7); |
32292 | res = dst - src; |
32293 | flag_NotZ = res; |
32294 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32295 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32296 | flag_N = res >> 24; |
32297 | POST_IO |
32298 | RET(14) |
32299 | } |
32300 | |
32301 | // CMPA |
32302 | OPCODE(0xB0F9) |
32303 | { |
32304 | u32 adr, res; |
32305 | u32 src, dst; |
32306 | |
32307 | FETCH_LONG(adr); |
32308 | PRE_IO |
32309 | READSX_WORD_F(adr, src) |
32310 | dst = AREGu32((Opcode >> 9) & 7); |
32311 | res = dst - src; |
32312 | flag_NotZ = res; |
32313 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32314 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32315 | flag_N = res >> 24; |
32316 | POST_IO |
32317 | RET(18) |
32318 | } |
32319 | |
32320 | // CMPA |
32321 | OPCODE(0xB0FA) |
32322 | { |
32323 | u32 adr, res; |
32324 | u32 src, dst; |
32325 | |
32326 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32327 | PC++; |
32328 | PRE_IO |
32329 | READSX_WORD_F(adr, src) |
32330 | dst = AREGu32((Opcode >> 9) & 7); |
32331 | res = dst - src; |
32332 | flag_NotZ = res; |
32333 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32334 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32335 | flag_N = res >> 24; |
32336 | POST_IO |
32337 | RET(14) |
32338 | } |
32339 | |
32340 | // CMPA |
32341 | OPCODE(0xB0FB) |
32342 | { |
32343 | u32 adr, res; |
32344 | u32 src, dst; |
32345 | |
32346 | adr = (u32)(PC) - BasePC; |
32347 | DECODE_EXT_WORD |
32348 | PRE_IO |
32349 | READSX_WORD_F(adr, src) |
32350 | dst = AREGu32((Opcode >> 9) & 7); |
32351 | res = dst - src; |
32352 | flag_NotZ = res; |
32353 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32354 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32355 | flag_N = res >> 24; |
32356 | POST_IO |
32357 | RET(16) |
32358 | } |
32359 | |
32360 | // CMPA |
32361 | OPCODE(0xB0FC) |
32362 | { |
32363 | u32 adr, res; |
32364 | u32 src, dst; |
32365 | |
32366 | FETCH_SWORD(src); |
32367 | dst = AREGu32((Opcode >> 9) & 7); |
32368 | res = dst - src; |
32369 | flag_NotZ = res; |
32370 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32371 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32372 | flag_N = res >> 24; |
32373 | RET(10) |
32374 | } |
32375 | |
32376 | // CMPA |
32377 | OPCODE(0xB0DF) |
32378 | { |
32379 | u32 adr, res; |
32380 | u32 src, dst; |
32381 | |
32382 | adr = AREG(7); |
32383 | AREG(7) += 2; |
32384 | PRE_IO |
32385 | READSX_WORD_F(adr, src) |
32386 | dst = AREGu32((Opcode >> 9) & 7); |
32387 | res = dst - src; |
32388 | flag_NotZ = res; |
32389 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32390 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32391 | flag_N = res >> 24; |
32392 | POST_IO |
32393 | RET(10) |
32394 | } |
32395 | |
32396 | // CMPA |
32397 | OPCODE(0xB0E7) |
32398 | { |
32399 | u32 adr, res; |
32400 | u32 src, dst; |
32401 | |
32402 | adr = AREG(7) - 2; |
32403 | AREG(7) = adr; |
32404 | PRE_IO |
32405 | READSX_WORD_F(adr, src) |
32406 | dst = AREGu32((Opcode >> 9) & 7); |
32407 | res = dst - src; |
32408 | flag_NotZ = res; |
32409 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32410 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32411 | flag_N = res >> 24; |
32412 | POST_IO |
32413 | RET(12) |
32414 | } |
32415 | |
32416 | // CMPA |
32417 | OPCODE(0xB1C0) |
32418 | { |
32419 | u32 adr, res; |
32420 | u32 src, dst; |
32421 | |
32422 | src = (s32)DREGs32((Opcode >> 0) & 7); |
32423 | dst = AREGu32((Opcode >> 9) & 7); |
32424 | res = dst - src; |
32425 | flag_NotZ = res; |
32426 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32427 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32428 | flag_N = res >> 24; |
32429 | RET(6) |
32430 | } |
32431 | |
32432 | // CMPA |
32433 | OPCODE(0xB1C8) |
32434 | { |
32435 | u32 adr, res; |
32436 | u32 src, dst; |
32437 | |
32438 | src = (s32)AREGs32((Opcode >> 0) & 7); |
32439 | dst = AREGu32((Opcode >> 9) & 7); |
32440 | res = dst - src; |
32441 | flag_NotZ = res; |
32442 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32443 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32444 | flag_N = res >> 24; |
32445 | RET(6) |
32446 | } |
32447 | |
32448 | // CMPA |
32449 | OPCODE(0xB1D0) |
32450 | { |
32451 | u32 adr, res; |
32452 | u32 src, dst; |
32453 | |
32454 | adr = AREG((Opcode >> 0) & 7); |
32455 | PRE_IO |
32456 | READSX_LONG_F(adr, src) |
32457 | dst = AREGu32((Opcode >> 9) & 7); |
32458 | res = dst - src; |
32459 | flag_NotZ = res; |
32460 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32461 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32462 | flag_N = res >> 24; |
32463 | POST_IO |
32464 | RET(14) |
32465 | } |
32466 | |
32467 | // CMPA |
32468 | OPCODE(0xB1D8) |
32469 | { |
32470 | u32 adr, res; |
32471 | u32 src, dst; |
32472 | |
32473 | adr = AREG((Opcode >> 0) & 7); |
32474 | AREG((Opcode >> 0) & 7) += 4; |
32475 | PRE_IO |
32476 | READSX_LONG_F(adr, src) |
32477 | dst = AREGu32((Opcode >> 9) & 7); |
32478 | res = dst - src; |
32479 | flag_NotZ = res; |
32480 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32481 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32482 | flag_N = res >> 24; |
32483 | POST_IO |
32484 | RET(14) |
32485 | } |
32486 | |
32487 | // CMPA |
32488 | OPCODE(0xB1E0) |
32489 | { |
32490 | u32 adr, res; |
32491 | u32 src, dst; |
32492 | |
32493 | adr = AREG((Opcode >> 0) & 7) - 4; |
32494 | AREG((Opcode >> 0) & 7) = adr; |
32495 | PRE_IO |
32496 | READSX_LONG_F(adr, src) |
32497 | dst = AREGu32((Opcode >> 9) & 7); |
32498 | res = dst - src; |
32499 | flag_NotZ = res; |
32500 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32501 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32502 | flag_N = res >> 24; |
32503 | POST_IO |
32504 | RET(16) |
32505 | } |
32506 | |
32507 | // CMPA |
32508 | OPCODE(0xB1E8) |
32509 | { |
32510 | u32 adr, res; |
32511 | u32 src, dst; |
32512 | |
32513 | FETCH_SWORD(adr); |
32514 | adr += AREG((Opcode >> 0) & 7); |
32515 | PRE_IO |
32516 | READSX_LONG_F(adr, src) |
32517 | dst = AREGu32((Opcode >> 9) & 7); |
32518 | res = dst - src; |
32519 | flag_NotZ = res; |
32520 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32521 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32522 | flag_N = res >> 24; |
32523 | POST_IO |
32524 | RET(18) |
32525 | } |
32526 | |
32527 | // CMPA |
32528 | OPCODE(0xB1F0) |
32529 | { |
32530 | u32 adr, res; |
32531 | u32 src, dst; |
32532 | |
32533 | adr = AREG((Opcode >> 0) & 7); |
32534 | DECODE_EXT_WORD |
32535 | PRE_IO |
32536 | READSX_LONG_F(adr, src) |
32537 | dst = AREGu32((Opcode >> 9) & 7); |
32538 | res = dst - src; |
32539 | flag_NotZ = res; |
32540 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32541 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32542 | flag_N = res >> 24; |
32543 | POST_IO |
32544 | RET(20) |
32545 | } |
32546 | |
32547 | // CMPA |
32548 | OPCODE(0xB1F8) |
32549 | { |
32550 | u32 adr, res; |
32551 | u32 src, dst; |
32552 | |
32553 | FETCH_SWORD(adr); |
32554 | PRE_IO |
32555 | READSX_LONG_F(adr, src) |
32556 | dst = AREGu32((Opcode >> 9) & 7); |
32557 | res = dst - src; |
32558 | flag_NotZ = res; |
32559 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32560 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32561 | flag_N = res >> 24; |
32562 | POST_IO |
32563 | RET(18) |
32564 | } |
32565 | |
32566 | // CMPA |
32567 | OPCODE(0xB1F9) |
32568 | { |
32569 | u32 adr, res; |
32570 | u32 src, dst; |
32571 | |
32572 | FETCH_LONG(adr); |
32573 | PRE_IO |
32574 | READSX_LONG_F(adr, src) |
32575 | dst = AREGu32((Opcode >> 9) & 7); |
32576 | res = dst - src; |
32577 | flag_NotZ = res; |
32578 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32579 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32580 | flag_N = res >> 24; |
32581 | POST_IO |
32582 | RET(22) |
32583 | } |
32584 | |
32585 | // CMPA |
32586 | OPCODE(0xB1FA) |
32587 | { |
32588 | u32 adr, res; |
32589 | u32 src, dst; |
32590 | |
32591 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32592 | PC++; |
32593 | PRE_IO |
32594 | READSX_LONG_F(adr, src) |
32595 | dst = AREGu32((Opcode >> 9) & 7); |
32596 | res = dst - src; |
32597 | flag_NotZ = res; |
32598 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32599 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32600 | flag_N = res >> 24; |
32601 | POST_IO |
32602 | RET(18) |
32603 | } |
32604 | |
32605 | // CMPA |
32606 | OPCODE(0xB1FB) |
32607 | { |
32608 | u32 adr, res; |
32609 | u32 src, dst; |
32610 | |
32611 | adr = (u32)(PC) - BasePC; |
32612 | DECODE_EXT_WORD |
32613 | PRE_IO |
32614 | READSX_LONG_F(adr, src) |
32615 | dst = AREGu32((Opcode >> 9) & 7); |
32616 | res = dst - src; |
32617 | flag_NotZ = res; |
32618 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32619 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32620 | flag_N = res >> 24; |
32621 | POST_IO |
32622 | RET(20) |
32623 | } |
32624 | |
32625 | // CMPA |
32626 | OPCODE(0xB1FC) |
32627 | { |
32628 | u32 adr, res; |
32629 | u32 src, dst; |
32630 | |
32631 | FETCH_LONG(src); |
32632 | dst = AREGu32((Opcode >> 9) & 7); |
32633 | res = dst - src; |
32634 | flag_NotZ = res; |
32635 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32636 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32637 | flag_N = res >> 24; |
32638 | RET(14) |
32639 | } |
32640 | |
32641 | // CMPA |
32642 | OPCODE(0xB1DF) |
32643 | { |
32644 | u32 adr, res; |
32645 | u32 src, dst; |
32646 | |
32647 | adr = AREG(7); |
32648 | AREG(7) += 4; |
32649 | PRE_IO |
32650 | READSX_LONG_F(adr, src) |
32651 | dst = AREGu32((Opcode >> 9) & 7); |
32652 | res = dst - src; |
32653 | flag_NotZ = res; |
32654 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32655 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32656 | flag_N = res >> 24; |
32657 | POST_IO |
32658 | RET(14) |
32659 | } |
32660 | |
32661 | // CMPA |
32662 | OPCODE(0xB1E7) |
32663 | { |
32664 | u32 adr, res; |
32665 | u32 src, dst; |
32666 | |
32667 | adr = AREG(7) - 4; |
32668 | AREG(7) = adr; |
32669 | PRE_IO |
32670 | READSX_LONG_F(adr, src) |
32671 | dst = AREGu32((Opcode >> 9) & 7); |
32672 | res = dst - src; |
32673 | flag_NotZ = res; |
32674 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32675 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32676 | flag_N = res >> 24; |
32677 | POST_IO |
32678 | RET(16) |
32679 | } |
32680 | |
32681 | // ANDaD |
32682 | OPCODE(0xC000) |
32683 | { |
32684 | u32 adr, res; |
32685 | u32 src, dst; |
32686 | |
32687 | src = DREGu8((Opcode >> 0) & 7); |
32688 | res = DREGu8((Opcode >> 9) & 7); |
32689 | res &= src; |
32690 | flag_C = 0; |
32691 | flag_V = 0; |
32692 | flag_NotZ = res; |
32693 | flag_N = res; |
32694 | DREGu8((Opcode >> 9) & 7) = res; |
32695 | RET(4) |
32696 | } |
32697 | |
32698 | // ANDaD |
32699 | OPCODE(0xC010) |
32700 | { |
32701 | u32 adr, res; |
32702 | u32 src, dst; |
32703 | |
32704 | adr = AREG((Opcode >> 0) & 7); |
32705 | PRE_IO |
32706 | READ_BYTE_F(adr, src) |
32707 | res = DREGu8((Opcode >> 9) & 7); |
32708 | res &= src; |
32709 | flag_C = 0; |
32710 | flag_V = 0; |
32711 | flag_NotZ = res; |
32712 | flag_N = res; |
32713 | DREGu8((Opcode >> 9) & 7) = res; |
32714 | POST_IO |
32715 | RET(8) |
32716 | } |
32717 | |
32718 | // ANDaD |
32719 | OPCODE(0xC018) |
32720 | { |
32721 | u32 adr, res; |
32722 | u32 src, dst; |
32723 | |
32724 | adr = AREG((Opcode >> 0) & 7); |
32725 | AREG((Opcode >> 0) & 7) += 1; |
32726 | PRE_IO |
32727 | READ_BYTE_F(adr, src) |
32728 | res = DREGu8((Opcode >> 9) & 7); |
32729 | res &= src; |
32730 | flag_C = 0; |
32731 | flag_V = 0; |
32732 | flag_NotZ = res; |
32733 | flag_N = res; |
32734 | DREGu8((Opcode >> 9) & 7) = res; |
32735 | POST_IO |
32736 | RET(8) |
32737 | } |
32738 | |
32739 | // ANDaD |
32740 | OPCODE(0xC020) |
32741 | { |
32742 | u32 adr, res; |
32743 | u32 src, dst; |
32744 | |
32745 | adr = AREG((Opcode >> 0) & 7) - 1; |
32746 | AREG((Opcode >> 0) & 7) = adr; |
32747 | PRE_IO |
32748 | READ_BYTE_F(adr, src) |
32749 | res = DREGu8((Opcode >> 9) & 7); |
32750 | res &= src; |
32751 | flag_C = 0; |
32752 | flag_V = 0; |
32753 | flag_NotZ = res; |
32754 | flag_N = res; |
32755 | DREGu8((Opcode >> 9) & 7) = res; |
32756 | POST_IO |
32757 | RET(10) |
32758 | } |
32759 | |
32760 | // ANDaD |
32761 | OPCODE(0xC028) |
32762 | { |
32763 | u32 adr, res; |
32764 | u32 src, dst; |
32765 | |
32766 | FETCH_SWORD(adr); |
32767 | adr += AREG((Opcode >> 0) & 7); |
32768 | PRE_IO |
32769 | READ_BYTE_F(adr, src) |
32770 | res = DREGu8((Opcode >> 9) & 7); |
32771 | res &= src; |
32772 | flag_C = 0; |
32773 | flag_V = 0; |
32774 | flag_NotZ = res; |
32775 | flag_N = res; |
32776 | DREGu8((Opcode >> 9) & 7) = res; |
32777 | POST_IO |
32778 | RET(12) |
32779 | } |
32780 | |
32781 | // ANDaD |
32782 | OPCODE(0xC030) |
32783 | { |
32784 | u32 adr, res; |
32785 | u32 src, dst; |
32786 | |
32787 | adr = AREG((Opcode >> 0) & 7); |
32788 | DECODE_EXT_WORD |
32789 | PRE_IO |
32790 | READ_BYTE_F(adr, src) |
32791 | res = DREGu8((Opcode >> 9) & 7); |
32792 | res &= src; |
32793 | flag_C = 0; |
32794 | flag_V = 0; |
32795 | flag_NotZ = res; |
32796 | flag_N = res; |
32797 | DREGu8((Opcode >> 9) & 7) = res; |
32798 | POST_IO |
32799 | RET(14) |
32800 | } |
32801 | |
32802 | // ANDaD |
32803 | OPCODE(0xC038) |
32804 | { |
32805 | u32 adr, res; |
32806 | u32 src, dst; |
32807 | |
32808 | FETCH_SWORD(adr); |
32809 | PRE_IO |
32810 | READ_BYTE_F(adr, src) |
32811 | res = DREGu8((Opcode >> 9) & 7); |
32812 | res &= src; |
32813 | flag_C = 0; |
32814 | flag_V = 0; |
32815 | flag_NotZ = res; |
32816 | flag_N = res; |
32817 | DREGu8((Opcode >> 9) & 7) = res; |
32818 | POST_IO |
32819 | RET(12) |
32820 | } |
32821 | |
32822 | // ANDaD |
32823 | OPCODE(0xC039) |
32824 | { |
32825 | u32 adr, res; |
32826 | u32 src, dst; |
32827 | |
32828 | FETCH_LONG(adr); |
32829 | PRE_IO |
32830 | READ_BYTE_F(adr, src) |
32831 | res = DREGu8((Opcode >> 9) & 7); |
32832 | res &= src; |
32833 | flag_C = 0; |
32834 | flag_V = 0; |
32835 | flag_NotZ = res; |
32836 | flag_N = res; |
32837 | DREGu8((Opcode >> 9) & 7) = res; |
32838 | POST_IO |
32839 | RET(16) |
32840 | } |
32841 | |
32842 | // ANDaD |
32843 | OPCODE(0xC03A) |
32844 | { |
32845 | u32 adr, res; |
32846 | u32 src, dst; |
32847 | |
32848 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32849 | PC++; |
32850 | PRE_IO |
32851 | READ_BYTE_F(adr, src) |
32852 | res = DREGu8((Opcode >> 9) & 7); |
32853 | res &= src; |
32854 | flag_C = 0; |
32855 | flag_V = 0; |
32856 | flag_NotZ = res; |
32857 | flag_N = res; |
32858 | DREGu8((Opcode >> 9) & 7) = res; |
32859 | POST_IO |
32860 | RET(12) |
32861 | } |
32862 | |
32863 | // ANDaD |
32864 | OPCODE(0xC03B) |
32865 | { |
32866 | u32 adr, res; |
32867 | u32 src, dst; |
32868 | |
32869 | adr = (u32)(PC) - BasePC; |
32870 | DECODE_EXT_WORD |
32871 | PRE_IO |
32872 | READ_BYTE_F(adr, src) |
32873 | res = DREGu8((Opcode >> 9) & 7); |
32874 | res &= src; |
32875 | flag_C = 0; |
32876 | flag_V = 0; |
32877 | flag_NotZ = res; |
32878 | flag_N = res; |
32879 | DREGu8((Opcode >> 9) & 7) = res; |
32880 | POST_IO |
32881 | RET(14) |
32882 | } |
32883 | |
32884 | // ANDaD |
32885 | OPCODE(0xC03C) |
32886 | { |
32887 | u32 adr, res; |
32888 | u32 src, dst; |
32889 | |
32890 | FETCH_BYTE(src); |
32891 | res = DREGu8((Opcode >> 9) & 7); |
32892 | res &= src; |
32893 | flag_C = 0; |
32894 | flag_V = 0; |
32895 | flag_NotZ = res; |
32896 | flag_N = res; |
32897 | DREGu8((Opcode >> 9) & 7) = res; |
32898 | RET(8) |
32899 | } |
32900 | |
32901 | // ANDaD |
32902 | OPCODE(0xC01F) |
32903 | { |
32904 | u32 adr, res; |
32905 | u32 src, dst; |
32906 | |
32907 | adr = AREG(7); |
32908 | AREG(7) += 2; |
32909 | PRE_IO |
32910 | READ_BYTE_F(adr, src) |
32911 | res = DREGu8((Opcode >> 9) & 7); |
32912 | res &= src; |
32913 | flag_C = 0; |
32914 | flag_V = 0; |
32915 | flag_NotZ = res; |
32916 | flag_N = res; |
32917 | DREGu8((Opcode >> 9) & 7) = res; |
32918 | POST_IO |
32919 | RET(8) |
32920 | } |
32921 | |
32922 | // ANDaD |
32923 | OPCODE(0xC027) |
32924 | { |
32925 | u32 adr, res; |
32926 | u32 src, dst; |
32927 | |
32928 | adr = AREG(7) - 2; |
32929 | AREG(7) = adr; |
32930 | PRE_IO |
32931 | READ_BYTE_F(adr, src) |
32932 | res = DREGu8((Opcode >> 9) & 7); |
32933 | res &= src; |
32934 | flag_C = 0; |
32935 | flag_V = 0; |
32936 | flag_NotZ = res; |
32937 | flag_N = res; |
32938 | DREGu8((Opcode >> 9) & 7) = res; |
32939 | POST_IO |
32940 | RET(10) |
32941 | } |
32942 | |
32943 | // ANDaD |
32944 | OPCODE(0xC040) |
32945 | { |
32946 | u32 adr, res; |
32947 | u32 src, dst; |
32948 | |
32949 | src = DREGu16((Opcode >> 0) & 7); |
32950 | res = DREGu16((Opcode >> 9) & 7); |
32951 | res &= src; |
32952 | flag_C = 0; |
32953 | flag_V = 0; |
32954 | flag_NotZ = res; |
32955 | flag_N = res >> 8; |
32956 | DREGu16((Opcode >> 9) & 7) = res; |
32957 | RET(4) |
32958 | } |
32959 | |
32960 | // ANDaD |
32961 | OPCODE(0xC050) |
32962 | { |
32963 | u32 adr, res; |
32964 | u32 src, dst; |
32965 | |
32966 | adr = AREG((Opcode >> 0) & 7); |
32967 | PRE_IO |
32968 | READ_WORD_F(adr, src) |
32969 | res = DREGu16((Opcode >> 9) & 7); |
32970 | res &= src; |
32971 | flag_C = 0; |
32972 | flag_V = 0; |
32973 | flag_NotZ = res; |
32974 | flag_N = res >> 8; |
32975 | DREGu16((Opcode >> 9) & 7) = res; |
32976 | POST_IO |
32977 | RET(8) |
32978 | } |
32979 | |
32980 | // ANDaD |
32981 | OPCODE(0xC058) |
32982 | { |
32983 | u32 adr, res; |
32984 | u32 src, dst; |
32985 | |
32986 | adr = AREG((Opcode >> 0) & 7); |
32987 | AREG((Opcode >> 0) & 7) += 2; |
32988 | PRE_IO |
32989 | READ_WORD_F(adr, src) |
32990 | res = DREGu16((Opcode >> 9) & 7); |
32991 | res &= src; |
32992 | flag_C = 0; |
32993 | flag_V = 0; |
32994 | flag_NotZ = res; |
32995 | flag_N = res >> 8; |
32996 | DREGu16((Opcode >> 9) & 7) = res; |
32997 | POST_IO |
32998 | RET(8) |
32999 | } |
33000 | |
33001 | // ANDaD |
33002 | OPCODE(0xC060) |
33003 | { |
33004 | u32 adr, res; |
33005 | u32 src, dst; |
33006 | |
33007 | adr = AREG((Opcode >> 0) & 7) - 2; |
33008 | AREG((Opcode >> 0) & 7) = adr; |
33009 | PRE_IO |
33010 | READ_WORD_F(adr, src) |
33011 | res = DREGu16((Opcode >> 9) & 7); |
33012 | res &= src; |
33013 | flag_C = 0; |
33014 | flag_V = 0; |
33015 | flag_NotZ = res; |
33016 | flag_N = res >> 8; |
33017 | DREGu16((Opcode >> 9) & 7) = res; |
33018 | POST_IO |
33019 | RET(10) |
33020 | } |
33021 | |
33022 | // ANDaD |
33023 | OPCODE(0xC068) |
33024 | { |
33025 | u32 adr, res; |
33026 | u32 src, dst; |
33027 | |
33028 | FETCH_SWORD(adr); |
33029 | adr += AREG((Opcode >> 0) & 7); |
33030 | PRE_IO |
33031 | READ_WORD_F(adr, src) |
33032 | res = DREGu16((Opcode >> 9) & 7); |
33033 | res &= src; |
33034 | flag_C = 0; |
33035 | flag_V = 0; |
33036 | flag_NotZ = res; |
33037 | flag_N = res >> 8; |
33038 | DREGu16((Opcode >> 9) & 7) = res; |
33039 | POST_IO |
33040 | RET(12) |
33041 | } |
33042 | |
33043 | // ANDaD |
33044 | OPCODE(0xC070) |
33045 | { |
33046 | u32 adr, res; |
33047 | u32 src, dst; |
33048 | |
33049 | adr = AREG((Opcode >> 0) & 7); |
33050 | DECODE_EXT_WORD |
33051 | PRE_IO |
33052 | READ_WORD_F(adr, src) |
33053 | res = DREGu16((Opcode >> 9) & 7); |
33054 | res &= src; |
33055 | flag_C = 0; |
33056 | flag_V = 0; |
33057 | flag_NotZ = res; |
33058 | flag_N = res >> 8; |
33059 | DREGu16((Opcode >> 9) & 7) = res; |
33060 | POST_IO |
33061 | RET(14) |
33062 | } |
33063 | |
33064 | // ANDaD |
33065 | OPCODE(0xC078) |
33066 | { |
33067 | u32 adr, res; |
33068 | u32 src, dst; |
33069 | |
33070 | FETCH_SWORD(adr); |
33071 | PRE_IO |
33072 | READ_WORD_F(adr, src) |
33073 | res = DREGu16((Opcode >> 9) & 7); |
33074 | res &= src; |
33075 | flag_C = 0; |
33076 | flag_V = 0; |
33077 | flag_NotZ = res; |
33078 | flag_N = res >> 8; |
33079 | DREGu16((Opcode >> 9) & 7) = res; |
33080 | POST_IO |
33081 | RET(12) |
33082 | } |
33083 | |
33084 | // ANDaD |
33085 | OPCODE(0xC079) |
33086 | { |
33087 | u32 adr, res; |
33088 | u32 src, dst; |
33089 | |
33090 | FETCH_LONG(adr); |
33091 | PRE_IO |
33092 | READ_WORD_F(adr, src) |
33093 | res = DREGu16((Opcode >> 9) & 7); |
33094 | res &= src; |
33095 | flag_C = 0; |
33096 | flag_V = 0; |
33097 | flag_NotZ = res; |
33098 | flag_N = res >> 8; |
33099 | DREGu16((Opcode >> 9) & 7) = res; |
33100 | POST_IO |
33101 | RET(16) |
33102 | } |
33103 | |
33104 | // ANDaD |
33105 | OPCODE(0xC07A) |
33106 | { |
33107 | u32 adr, res; |
33108 | u32 src, dst; |
33109 | |
33110 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
33111 | PC++; |
33112 | PRE_IO |
33113 | READ_WORD_F(adr, src) |
33114 | res = DREGu16((Opcode >> 9) & 7); |
33115 | res &= src; |
33116 | flag_C = 0; |
33117 | flag_V = 0; |
33118 | flag_NotZ = res; |
33119 | flag_N = res >> 8; |
33120 | DREGu16((Opcode >> 9) & 7) = res; |
33121 | POST_IO |
33122 | RET(12) |
33123 | } |
33124 | |
33125 | // ANDaD |
33126 | OPCODE(0xC07B) |
33127 | { |
33128 | u32 adr, res; |
33129 | u32 src, dst; |
33130 | |
33131 | adr = (u32)(PC) - BasePC; |
33132 | DECODE_EXT_WORD |
33133 | PRE_IO |
33134 | READ_WORD_F(adr, src) |
33135 | res = DREGu16((Opcode >> 9) & 7); |
33136 | res &= src; |
33137 | flag_C = 0; |
33138 | flag_V = 0; |
33139 | flag_NotZ = res; |
33140 | flag_N = res >> 8; |
33141 | DREGu16((Opcode >> 9) & 7) = res; |
33142 | POST_IO |
33143 | RET(14) |
33144 | } |
33145 | |
33146 | // ANDaD |
33147 | OPCODE(0xC07C) |
33148 | { |
33149 | u32 adr, res; |
33150 | u32 src, dst; |
33151 | |
33152 | FETCH_WORD(src); |
33153 | res = DREGu16((Opcode >> 9) & 7); |
33154 | res &= src; |
33155 | flag_C = 0; |
33156 | flag_V = 0; |
33157 | flag_NotZ = res; |
33158 | flag_N = res >> 8; |
33159 | DREGu16((Opcode >> 9) & 7) = res; |
33160 | RET(8) |
33161 | } |
33162 | |
33163 | // ANDaD |
33164 | OPCODE(0xC05F) |
33165 | { |
33166 | u32 adr, res; |
33167 | u32 src, dst; |
33168 | |
33169 | adr = AREG(7); |
33170 | AREG(7) += 2; |
33171 | PRE_IO |
33172 | READ_WORD_F(adr, src) |
33173 | res = DREGu16((Opcode >> 9) & 7); |
33174 | res &= src; |
33175 | flag_C = 0; |
33176 | flag_V = 0; |
33177 | flag_NotZ = res; |
33178 | flag_N = res >> 8; |
33179 | DREGu16((Opcode >> 9) & 7) = res; |
33180 | POST_IO |
33181 | RET(8) |
33182 | } |
33183 | |
33184 | // ANDaD |
33185 | OPCODE(0xC067) |
33186 | { |
33187 | u32 adr, res; |
33188 | u32 src, dst; |
33189 | |
33190 | adr = AREG(7) - 2; |
33191 | AREG(7) = adr; |
33192 | PRE_IO |
33193 | READ_WORD_F(adr, src) |
33194 | res = DREGu16((Opcode >> 9) & 7); |
33195 | res &= src; |
33196 | flag_C = 0; |
33197 | flag_V = 0; |
33198 | flag_NotZ = res; |
33199 | flag_N = res >> 8; |
33200 | DREGu16((Opcode >> 9) & 7) = res; |
33201 | POST_IO |
33202 | RET(10) |
33203 | } |
33204 | |
33205 | // ANDaD |
33206 | OPCODE(0xC080) |
33207 | { |
33208 | u32 adr, res; |
33209 | u32 src, dst; |
33210 | |
33211 | src = DREGu32((Opcode >> 0) & 7); |
33212 | res = DREGu32((Opcode >> 9) & 7); |
33213 | res &= src; |
33214 | flag_C = 0; |
33215 | flag_V = 0; |
33216 | flag_NotZ = res; |
33217 | flag_N = res >> 24; |
33218 | DREGu32((Opcode >> 9) & 7) = res; |
33219 | RET(8) |
33220 | } |
33221 | |
33222 | // ANDaD |
33223 | OPCODE(0xC090) |
33224 | { |
33225 | u32 adr, res; |
33226 | u32 src, dst; |
33227 | |
33228 | adr = AREG((Opcode >> 0) & 7); |
33229 | PRE_IO |
33230 | READ_LONG_F(adr, src) |
33231 | res = DREGu32((Opcode >> 9) & 7); |
33232 | res &= src; |
33233 | flag_C = 0; |
33234 | flag_V = 0; |
33235 | flag_NotZ = res; |
33236 | flag_N = res >> 24; |
33237 | DREGu32((Opcode >> 9) & 7) = res; |
33238 | POST_IO |
33239 | RET(14) |
33240 | } |
33241 | |
33242 | // ANDaD |
33243 | OPCODE(0xC098) |
33244 | { |
33245 | u32 adr, res; |
33246 | u32 src, dst; |
33247 | |
33248 | adr = AREG((Opcode >> 0) & 7); |
33249 | AREG((Opcode >> 0) & 7) += 4; |
33250 | PRE_IO |
33251 | READ_LONG_F(adr, src) |
33252 | res = DREGu32((Opcode >> 9) & 7); |
33253 | res &= src; |
33254 | flag_C = 0; |
33255 | flag_V = 0; |
33256 | flag_NotZ = res; |
33257 | flag_N = res >> 24; |
33258 | DREGu32((Opcode >> 9) & 7) = res; |
33259 | POST_IO |
33260 | RET(14) |
33261 | } |
33262 | |
33263 | // ANDaD |
33264 | OPCODE(0xC0A0) |
33265 | { |
33266 | u32 adr, res; |
33267 | u32 src, dst; |
33268 | |
33269 | adr = AREG((Opcode >> 0) & 7) - 4; |
33270 | AREG((Opcode >> 0) & 7) = adr; |
33271 | PRE_IO |
33272 | READ_LONG_F(adr, src) |
33273 | res = DREGu32((Opcode >> 9) & 7); |
33274 | res &= src; |
33275 | flag_C = 0; |
33276 | flag_V = 0; |
33277 | flag_NotZ = res; |
33278 | flag_N = res >> 24; |
33279 | DREGu32((Opcode >> 9) & 7) = res; |
33280 | POST_IO |
33281 | RET(16) |
33282 | } |
33283 | |
33284 | // ANDaD |
33285 | OPCODE(0xC0A8) |
33286 | { |
33287 | u32 adr, res; |
33288 | u32 src, dst; |
33289 | |
33290 | FETCH_SWORD(adr); |
33291 | adr += AREG((Opcode >> 0) & 7); |
33292 | PRE_IO |
33293 | READ_LONG_F(adr, src) |
33294 | res = DREGu32((Opcode >> 9) & 7); |
33295 | res &= src; |
33296 | flag_C = 0; |
33297 | flag_V = 0; |
33298 | flag_NotZ = res; |
33299 | flag_N = res >> 24; |
33300 | DREGu32((Opcode >> 9) & 7) = res; |
33301 | POST_IO |
33302 | RET(18) |
33303 | } |
33304 | |
33305 | // ANDaD |
33306 | OPCODE(0xC0B0) |
33307 | { |
33308 | u32 adr, res; |
33309 | u32 src, dst; |
33310 | |
33311 | adr = AREG((Opcode >> 0) & 7); |
33312 | DECODE_EXT_WORD |
33313 | PRE_IO |
33314 | READ_LONG_F(adr, src) |
33315 | res = DREGu32((Opcode >> 9) & 7); |
33316 | res &= src; |
33317 | flag_C = 0; |
33318 | flag_V = 0; |
33319 | flag_NotZ = res; |
33320 | flag_N = res >> 24; |
33321 | DREGu32((Opcode >> 9) & 7) = res; |
33322 | POST_IO |
33323 | RET(20) |
33324 | } |
33325 | |
33326 | // ANDaD |
33327 | OPCODE(0xC0B8) |
33328 | { |
33329 | u32 adr, res; |
33330 | u32 src, dst; |
33331 | |
33332 | FETCH_SWORD(adr); |
33333 | PRE_IO |
33334 | READ_LONG_F(adr, src) |
33335 | res = DREGu32((Opcode >> 9) & 7); |
33336 | res &= src; |
33337 | flag_C = 0; |
33338 | flag_V = 0; |
33339 | flag_NotZ = res; |
33340 | flag_N = res >> 24; |
33341 | DREGu32((Opcode >> 9) & 7) = res; |
33342 | POST_IO |
33343 | RET(18) |
33344 | } |
33345 | |
33346 | // ANDaD |
33347 | OPCODE(0xC0B9) |
33348 | { |
33349 | u32 adr, res; |
33350 | u32 src, dst; |
33351 | |
33352 | FETCH_LONG(adr); |
33353 | PRE_IO |
33354 | READ_LONG_F(adr, src) |
33355 | res = DREGu32((Opcode >> 9) & 7); |
33356 | res &= src; |
33357 | flag_C = 0; |
33358 | flag_V = 0; |
33359 | flag_NotZ = res; |
33360 | flag_N = res >> 24; |
33361 | DREGu32((Opcode >> 9) & 7) = res; |
33362 | POST_IO |
33363 | RET(22) |
33364 | } |
33365 | |
33366 | // ANDaD |
33367 | OPCODE(0xC0BA) |
33368 | { |
33369 | u32 adr, res; |
33370 | u32 src, dst; |
33371 | |
33372 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
33373 | PC++; |
33374 | PRE_IO |
33375 | READ_LONG_F(adr, src) |
33376 | res = DREGu32((Opcode >> 9) & 7); |
33377 | res &= src; |
33378 | flag_C = 0; |
33379 | flag_V = 0; |
33380 | flag_NotZ = res; |
33381 | flag_N = res >> 24; |
33382 | DREGu32((Opcode >> 9) & 7) = res; |
33383 | POST_IO |
33384 | RET(18) |
33385 | } |
33386 | |
33387 | // ANDaD |
33388 | OPCODE(0xC0BB) |
33389 | { |
33390 | u32 adr, res; |
33391 | u32 src, dst; |
33392 | |
33393 | adr = (u32)(PC) - BasePC; |
33394 | DECODE_EXT_WORD |
33395 | PRE_IO |
33396 | READ_LONG_F(adr, src) |
33397 | res = DREGu32((Opcode >> 9) & 7); |
33398 | res &= src; |
33399 | flag_C = 0; |
33400 | flag_V = 0; |
33401 | flag_NotZ = res; |
33402 | flag_N = res >> 24; |
33403 | DREGu32((Opcode >> 9) & 7) = res; |
33404 | POST_IO |
33405 | RET(20) |
33406 | } |
33407 | |
33408 | // ANDaD |
33409 | OPCODE(0xC0BC) |
33410 | { |
33411 | u32 adr, res; |
33412 | u32 src, dst; |
33413 | |
33414 | FETCH_LONG(src); |
33415 | res = DREGu32((Opcode >> 9) & 7); |
33416 | res &= src; |
33417 | flag_C = 0; |
33418 | flag_V = 0; |
33419 | flag_NotZ = res; |
33420 | flag_N = res >> 24; |
33421 | DREGu32((Opcode >> 9) & 7) = res; |
33422 | RET(16) |
33423 | } |
33424 | |
33425 | // ANDaD |
33426 | OPCODE(0xC09F) |
33427 | { |
33428 | u32 adr, res; |
33429 | u32 src, dst; |
33430 | |
33431 | adr = AREG(7); |
33432 | AREG(7) += 4; |
33433 | PRE_IO |
33434 | READ_LONG_F(adr, src) |
33435 | res = DREGu32((Opcode >> 9) & 7); |
33436 | res &= src; |
33437 | flag_C = 0; |
33438 | flag_V = 0; |
33439 | flag_NotZ = res; |
33440 | flag_N = res >> 24; |
33441 | DREGu32((Opcode >> 9) & 7) = res; |
33442 | POST_IO |
33443 | RET(14) |
33444 | } |
33445 | |
33446 | // ANDaD |
33447 | OPCODE(0xC0A7) |
33448 | { |
33449 | u32 adr, res; |
33450 | u32 src, dst; |
33451 | |
33452 | adr = AREG(7) - 4; |
33453 | AREG(7) = adr; |
33454 | PRE_IO |
33455 | READ_LONG_F(adr, src) |
33456 | res = DREGu32((Opcode >> 9) & 7); |
33457 | res &= src; |
33458 | flag_C = 0; |
33459 | flag_V = 0; |
33460 | flag_NotZ = res; |
33461 | flag_N = res >> 24; |
33462 | DREGu32((Opcode >> 9) & 7) = res; |
33463 | POST_IO |
33464 | RET(16) |
33465 | } |
33466 | |
33467 | // ANDDa |
33468 | OPCODE(0xC110) |
33469 | { |
33470 | u32 adr, res; |
33471 | u32 src, dst; |
33472 | |
33473 | src = DREGu8((Opcode >> 9) & 7); |
33474 | adr = AREG((Opcode >> 0) & 7); |
33475 | PRE_IO |
33476 | READ_BYTE_F(adr, res) |
33477 | res &= src; |
33478 | flag_C = 0; |
33479 | flag_V = 0; |
33480 | flag_NotZ = res; |
33481 | flag_N = res; |
33482 | WRITE_BYTE_F(adr, res) |
33483 | POST_IO |
33484 | RET(12) |
33485 | } |
33486 | |
33487 | // ANDDa |
33488 | OPCODE(0xC118) |
33489 | { |
33490 | u32 adr, res; |
33491 | u32 src, dst; |
33492 | |
33493 | src = DREGu8((Opcode >> 9) & 7); |
33494 | adr = AREG((Opcode >> 0) & 7); |
33495 | AREG((Opcode >> 0) & 7) += 1; |
33496 | PRE_IO |
33497 | READ_BYTE_F(adr, res) |
33498 | res &= src; |
33499 | flag_C = 0; |
33500 | flag_V = 0; |
33501 | flag_NotZ = res; |
33502 | flag_N = res; |
33503 | WRITE_BYTE_F(adr, res) |
33504 | POST_IO |
33505 | RET(12) |
33506 | } |
33507 | |
33508 | // ANDDa |
33509 | OPCODE(0xC120) |
33510 | { |
33511 | u32 adr, res; |
33512 | u32 src, dst; |
33513 | |
33514 | src = DREGu8((Opcode >> 9) & 7); |
33515 | adr = AREG((Opcode >> 0) & 7) - 1; |
33516 | AREG((Opcode >> 0) & 7) = adr; |
33517 | PRE_IO |
33518 | READ_BYTE_F(adr, res) |
33519 | res &= src; |
33520 | flag_C = 0; |
33521 | flag_V = 0; |
33522 | flag_NotZ = res; |
33523 | flag_N = res; |
33524 | WRITE_BYTE_F(adr, res) |
33525 | POST_IO |
33526 | RET(14) |
33527 | } |
33528 | |
33529 | // ANDDa |
33530 | OPCODE(0xC128) |
33531 | { |
33532 | u32 adr, res; |
33533 | u32 src, dst; |
33534 | |
33535 | src = DREGu8((Opcode >> 9) & 7); |
33536 | FETCH_SWORD(adr); |
33537 | adr += AREG((Opcode >> 0) & 7); |
33538 | PRE_IO |
33539 | READ_BYTE_F(adr, res) |
33540 | res &= src; |
33541 | flag_C = 0; |
33542 | flag_V = 0; |
33543 | flag_NotZ = res; |
33544 | flag_N = res; |
33545 | WRITE_BYTE_F(adr, res) |
33546 | POST_IO |
33547 | RET(16) |
33548 | } |
33549 | |
33550 | // ANDDa |
33551 | OPCODE(0xC130) |
33552 | { |
33553 | u32 adr, res; |
33554 | u32 src, dst; |
33555 | |
33556 | src = DREGu8((Opcode >> 9) & 7); |
33557 | adr = AREG((Opcode >> 0) & 7); |
33558 | DECODE_EXT_WORD |
33559 | PRE_IO |
33560 | READ_BYTE_F(adr, res) |
33561 | res &= src; |
33562 | flag_C = 0; |
33563 | flag_V = 0; |
33564 | flag_NotZ = res; |
33565 | flag_N = res; |
33566 | WRITE_BYTE_F(adr, res) |
33567 | POST_IO |
33568 | RET(18) |
33569 | } |
33570 | |
33571 | // ANDDa |
33572 | OPCODE(0xC138) |
33573 | { |
33574 | u32 adr, res; |
33575 | u32 src, dst; |
33576 | |
33577 | src = DREGu8((Opcode >> 9) & 7); |
33578 | FETCH_SWORD(adr); |
33579 | PRE_IO |
33580 | READ_BYTE_F(adr, res) |
33581 | res &= src; |
33582 | flag_C = 0; |
33583 | flag_V = 0; |
33584 | flag_NotZ = res; |
33585 | flag_N = res; |
33586 | WRITE_BYTE_F(adr, res) |
33587 | POST_IO |
33588 | RET(16) |
33589 | } |
33590 | |
33591 | // ANDDa |
33592 | OPCODE(0xC139) |
33593 | { |
33594 | u32 adr, res; |
33595 | u32 src, dst; |
33596 | |
33597 | src = DREGu8((Opcode >> 9) & 7); |
33598 | FETCH_LONG(adr); |
33599 | PRE_IO |
33600 | READ_BYTE_F(adr, res) |
33601 | res &= src; |
33602 | flag_C = 0; |
33603 | flag_V = 0; |
33604 | flag_NotZ = res; |
33605 | flag_N = res; |
33606 | WRITE_BYTE_F(adr, res) |
33607 | POST_IO |
33608 | RET(20) |
33609 | } |
33610 | |
33611 | // ANDDa |
33612 | OPCODE(0xC11F) |
33613 | { |
33614 | u32 adr, res; |
33615 | u32 src, dst; |
33616 | |
33617 | src = DREGu8((Opcode >> 9) & 7); |
33618 | adr = AREG(7); |
33619 | AREG(7) += 2; |
33620 | PRE_IO |
33621 | READ_BYTE_F(adr, res) |
33622 | res &= src; |
33623 | flag_C = 0; |
33624 | flag_V = 0; |
33625 | flag_NotZ = res; |
33626 | flag_N = res; |
33627 | WRITE_BYTE_F(adr, res) |
33628 | POST_IO |
33629 | RET(12) |
33630 | } |
33631 | |
33632 | // ANDDa |
33633 | OPCODE(0xC127) |
33634 | { |
33635 | u32 adr, res; |
33636 | u32 src, dst; |
33637 | |
33638 | src = DREGu8((Opcode >> 9) & 7); |
33639 | adr = AREG(7) - 2; |
33640 | AREG(7) = adr; |
33641 | PRE_IO |
33642 | READ_BYTE_F(adr, res) |
33643 | res &= src; |
33644 | flag_C = 0; |
33645 | flag_V = 0; |
33646 | flag_NotZ = res; |
33647 | flag_N = res; |
33648 | WRITE_BYTE_F(adr, res) |
33649 | POST_IO |
33650 | RET(14) |
33651 | } |
33652 | |
33653 | // ANDDa |
33654 | OPCODE(0xC150) |
33655 | { |
33656 | u32 adr, res; |
33657 | u32 src, dst; |
33658 | |
33659 | src = DREGu16((Opcode >> 9) & 7); |
33660 | adr = AREG((Opcode >> 0) & 7); |
33661 | PRE_IO |
33662 | READ_WORD_F(adr, res) |
33663 | res &= src; |
33664 | flag_C = 0; |
33665 | flag_V = 0; |
33666 | flag_NotZ = res; |
33667 | flag_N = res >> 8; |
33668 | WRITE_WORD_F(adr, res) |
33669 | POST_IO |
33670 | RET(12) |
33671 | } |
33672 | |
33673 | // ANDDa |
33674 | OPCODE(0xC158) |
33675 | { |
33676 | u32 adr, res; |
33677 | u32 src, dst; |
33678 | |
33679 | src = DREGu16((Opcode >> 9) & 7); |
33680 | adr = AREG((Opcode >> 0) & 7); |
33681 | AREG((Opcode >> 0) & 7) += 2; |
33682 | PRE_IO |
33683 | READ_WORD_F(adr, res) |
33684 | res &= src; |
33685 | flag_C = 0; |
33686 | flag_V = 0; |
33687 | flag_NotZ = res; |
33688 | flag_N = res >> 8; |
33689 | WRITE_WORD_F(adr, res) |
33690 | POST_IO |
33691 | RET(12) |
33692 | } |
33693 | |
33694 | // ANDDa |
33695 | OPCODE(0xC160) |
33696 | { |
33697 | u32 adr, res; |
33698 | u32 src, dst; |
33699 | |
33700 | src = DREGu16((Opcode >> 9) & 7); |
33701 | adr = AREG((Opcode >> 0) & 7) - 2; |
33702 | AREG((Opcode >> 0) & 7) = adr; |
33703 | PRE_IO |
33704 | READ_WORD_F(adr, res) |
33705 | res &= src; |
33706 | flag_C = 0; |
33707 | flag_V = 0; |
33708 | flag_NotZ = res; |
33709 | flag_N = res >> 8; |
33710 | WRITE_WORD_F(adr, res) |
33711 | POST_IO |
33712 | RET(14) |
33713 | } |
33714 | |
33715 | // ANDDa |
33716 | OPCODE(0xC168) |
33717 | { |
33718 | u32 adr, res; |
33719 | u32 src, dst; |
33720 | |
33721 | src = DREGu16((Opcode >> 9) & 7); |
33722 | FETCH_SWORD(adr); |
33723 | adr += AREG((Opcode >> 0) & 7); |
33724 | PRE_IO |
33725 | READ_WORD_F(adr, res) |
33726 | res &= src; |
33727 | flag_C = 0; |
33728 | flag_V = 0; |
33729 | flag_NotZ = res; |
33730 | flag_N = res >> 8; |
33731 | WRITE_WORD_F(adr, res) |
33732 | POST_IO |
33733 | RET(16) |
33734 | } |
33735 | |
33736 | // ANDDa |
33737 | OPCODE(0xC170) |
33738 | { |
33739 | u32 adr, res; |
33740 | u32 src, dst; |
33741 | |
33742 | src = DREGu16((Opcode >> 9) & 7); |
33743 | adr = AREG((Opcode >> 0) & 7); |
33744 | DECODE_EXT_WORD |
33745 | PRE_IO |
33746 | READ_WORD_F(adr, res) |
33747 | res &= src; |
33748 | flag_C = 0; |
33749 | flag_V = 0; |
33750 | flag_NotZ = res; |
33751 | flag_N = res >> 8; |
33752 | WRITE_WORD_F(adr, res) |
33753 | POST_IO |
33754 | RET(18) |
33755 | } |
33756 | |
33757 | // ANDDa |
33758 | OPCODE(0xC178) |
33759 | { |
33760 | u32 adr, res; |
33761 | u32 src, dst; |
33762 | |
33763 | src = DREGu16((Opcode >> 9) & 7); |
33764 | FETCH_SWORD(adr); |
33765 | PRE_IO |
33766 | READ_WORD_F(adr, res) |
33767 | res &= src; |
33768 | flag_C = 0; |
33769 | flag_V = 0; |
33770 | flag_NotZ = res; |
33771 | flag_N = res >> 8; |
33772 | WRITE_WORD_F(adr, res) |
33773 | POST_IO |
33774 | RET(16) |
33775 | } |
33776 | |
33777 | // ANDDa |
33778 | OPCODE(0xC179) |
33779 | { |
33780 | u32 adr, res; |
33781 | u32 src, dst; |
33782 | |
33783 | src = DREGu16((Opcode >> 9) & 7); |
33784 | FETCH_LONG(adr); |
33785 | PRE_IO |
33786 | READ_WORD_F(adr, res) |
33787 | res &= src; |
33788 | flag_C = 0; |
33789 | flag_V = 0; |
33790 | flag_NotZ = res; |
33791 | flag_N = res >> 8; |
33792 | WRITE_WORD_F(adr, res) |
33793 | POST_IO |
33794 | RET(20) |
33795 | } |
33796 | |
33797 | // ANDDa |
33798 | OPCODE(0xC15F) |
33799 | { |
33800 | u32 adr, res; |
33801 | u32 src, dst; |
33802 | |
33803 | src = DREGu16((Opcode >> 9) & 7); |
33804 | adr = AREG(7); |
33805 | AREG(7) += 2; |
33806 | PRE_IO |
33807 | READ_WORD_F(adr, res) |
33808 | res &= src; |
33809 | flag_C = 0; |
33810 | flag_V = 0; |
33811 | flag_NotZ = res; |
33812 | flag_N = res >> 8; |
33813 | WRITE_WORD_F(adr, res) |
33814 | POST_IO |
33815 | RET(12) |
33816 | } |
33817 | |
33818 | // ANDDa |
33819 | OPCODE(0xC167) |
33820 | { |
33821 | u32 adr, res; |
33822 | u32 src, dst; |
33823 | |
33824 | src = DREGu16((Opcode >> 9) & 7); |
33825 | adr = AREG(7) - 2; |
33826 | AREG(7) = adr; |
33827 | PRE_IO |
33828 | READ_WORD_F(adr, res) |
33829 | res &= src; |
33830 | flag_C = 0; |
33831 | flag_V = 0; |
33832 | flag_NotZ = res; |
33833 | flag_N = res >> 8; |
33834 | WRITE_WORD_F(adr, res) |
33835 | POST_IO |
33836 | RET(14) |
33837 | } |
33838 | |
33839 | // ANDDa |
33840 | OPCODE(0xC190) |
33841 | { |
33842 | u32 adr, res; |
33843 | u32 src, dst; |
33844 | |
33845 | src = DREGu32((Opcode >> 9) & 7); |
33846 | adr = AREG((Opcode >> 0) & 7); |
33847 | PRE_IO |
33848 | READ_LONG_F(adr, res) |
33849 | res &= src; |
33850 | flag_C = 0; |
33851 | flag_V = 0; |
33852 | flag_NotZ = res; |
33853 | flag_N = res >> 24; |
33854 | WRITE_LONG_F(adr, res) |
33855 | POST_IO |
33856 | RET(20) |
33857 | } |
33858 | |
33859 | // ANDDa |
33860 | OPCODE(0xC198) |
33861 | { |
33862 | u32 adr, res; |
33863 | u32 src, dst; |
33864 | |
33865 | src = DREGu32((Opcode >> 9) & 7); |
33866 | adr = AREG((Opcode >> 0) & 7); |
33867 | AREG((Opcode >> 0) & 7) += 4; |
33868 | PRE_IO |
33869 | READ_LONG_F(adr, res) |
33870 | res &= src; |
33871 | flag_C = 0; |
33872 | flag_V = 0; |
33873 | flag_NotZ = res; |
33874 | flag_N = res >> 24; |
33875 | WRITE_LONG_F(adr, res) |
33876 | POST_IO |
33877 | RET(20) |
33878 | } |
33879 | |
33880 | // ANDDa |
33881 | OPCODE(0xC1A0) |
33882 | { |
33883 | u32 adr, res; |
33884 | u32 src, dst; |
33885 | |
33886 | src = DREGu32((Opcode >> 9) & 7); |
33887 | adr = AREG((Opcode >> 0) & 7) - 4; |
33888 | AREG((Opcode >> 0) & 7) = adr; |
33889 | PRE_IO |
33890 | READ_LONG_F(adr, res) |
33891 | res &= src; |
33892 | flag_C = 0; |
33893 | flag_V = 0; |
33894 | flag_NotZ = res; |
33895 | flag_N = res >> 24; |
33896 | WRITE_LONG_F(adr, res) |
33897 | POST_IO |
33898 | RET(22) |
33899 | } |
33900 | |
33901 | // ANDDa |
33902 | OPCODE(0xC1A8) |
33903 | { |
33904 | u32 adr, res; |
33905 | u32 src, dst; |
33906 | |
33907 | src = DREGu32((Opcode >> 9) & 7); |
33908 | FETCH_SWORD(adr); |
33909 | adr += AREG((Opcode >> 0) & 7); |
33910 | PRE_IO |
33911 | READ_LONG_F(adr, res) |
33912 | res &= src; |
33913 | flag_C = 0; |
33914 | flag_V = 0; |
33915 | flag_NotZ = res; |
33916 | flag_N = res >> 24; |
33917 | WRITE_LONG_F(adr, res) |
33918 | POST_IO |
33919 | RET(24) |
33920 | } |
33921 | |
33922 | // ANDDa |
33923 | OPCODE(0xC1B0) |
33924 | { |
33925 | u32 adr, res; |
33926 | u32 src, dst; |
33927 | |
33928 | src = DREGu32((Opcode >> 9) & 7); |
33929 | adr = AREG((Opcode >> 0) & 7); |
33930 | DECODE_EXT_WORD |
33931 | PRE_IO |
33932 | READ_LONG_F(adr, res) |
33933 | res &= src; |
33934 | flag_C = 0; |
33935 | flag_V = 0; |
33936 | flag_NotZ = res; |
33937 | flag_N = res >> 24; |
33938 | WRITE_LONG_F(adr, res) |
33939 | POST_IO |
33940 | RET(26) |
33941 | } |
33942 | |
33943 | // ANDDa |
33944 | OPCODE(0xC1B8) |
33945 | { |
33946 | u32 adr, res; |
33947 | u32 src, dst; |
33948 | |
33949 | src = DREGu32((Opcode >> 9) & 7); |
33950 | FETCH_SWORD(adr); |
33951 | PRE_IO |
33952 | READ_LONG_F(adr, res) |
33953 | res &= src; |
33954 | flag_C = 0; |
33955 | flag_V = 0; |
33956 | flag_NotZ = res; |
33957 | flag_N = res >> 24; |
33958 | WRITE_LONG_F(adr, res) |
33959 | POST_IO |
33960 | RET(24) |
33961 | } |
33962 | |
33963 | // ANDDa |
33964 | OPCODE(0xC1B9) |
33965 | { |
33966 | u32 adr, res; |
33967 | u32 src, dst; |
33968 | |
33969 | src = DREGu32((Opcode >> 9) & 7); |
33970 | FETCH_LONG(adr); |
33971 | PRE_IO |
33972 | READ_LONG_F(adr, res) |
33973 | res &= src; |
33974 | flag_C = 0; |
33975 | flag_V = 0; |
33976 | flag_NotZ = res; |
33977 | flag_N = res >> 24; |
33978 | WRITE_LONG_F(adr, res) |
33979 | POST_IO |
33980 | RET(28) |
33981 | } |
33982 | |
33983 | // ANDDa |
33984 | OPCODE(0xC19F) |
33985 | { |
33986 | u32 adr, res; |
33987 | u32 src, dst; |
33988 | |
33989 | src = DREGu32((Opcode >> 9) & 7); |
33990 | adr = AREG(7); |
33991 | AREG(7) += 4; |
33992 | PRE_IO |
33993 | READ_LONG_F(adr, res) |
33994 | res &= src; |
33995 | flag_C = 0; |
33996 | flag_V = 0; |
33997 | flag_NotZ = res; |
33998 | flag_N = res >> 24; |
33999 | WRITE_LONG_F(adr, res) |
34000 | POST_IO |
34001 | RET(20) |
34002 | } |
34003 | |
34004 | // ANDDa |
34005 | OPCODE(0xC1A7) |
34006 | { |
34007 | u32 adr, res; |
34008 | u32 src, dst; |
34009 | |
34010 | src = DREGu32((Opcode >> 9) & 7); |
34011 | adr = AREG(7) - 4; |
34012 | AREG(7) = adr; |
34013 | PRE_IO |
34014 | READ_LONG_F(adr, res) |
34015 | res &= src; |
34016 | flag_C = 0; |
34017 | flag_V = 0; |
34018 | flag_NotZ = res; |
34019 | flag_N = res >> 24; |
34020 | WRITE_LONG_F(adr, res) |
34021 | POST_IO |
34022 | RET(22) |
34023 | } |
34024 | |
34025 | // ABCD |
34026 | OPCODE(0xC100) |
34027 | { |
34028 | u32 adr, res; |
34029 | u32 src, dst; |
34030 | |
34031 | src = DREGu8((Opcode >> 0) & 7); |
34032 | dst = DREGu8((Opcode >> 9) & 7); |
34033 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34034 | if (res > 9) res += 6; |
34035 | res += (dst & 0xF0) + (src & 0xF0); |
34036 | if (res > 0x99) |
34037 | { |
34038 | res -= 0xA0; |
34039 | flag_X = flag_C = M68K_SR_C; |
34040 | } |
34041 | else flag_X = flag_C = 0; |
34042 | flag_NotZ |= res & 0xFF; |
34043 | flag_N = res; |
34044 | DREGu8((Opcode >> 9) & 7) = res; |
34045 | RET(6) |
34046 | } |
34047 | |
34048 | // ABCDM |
34049 | OPCODE(0xC108) |
34050 | { |
34051 | u32 adr, res; |
34052 | u32 src, dst; |
34053 | |
34054 | adr = AREG((Opcode >> 0) & 7) - 1; |
34055 | AREG((Opcode >> 0) & 7) = adr; |
34056 | PRE_IO |
34057 | READ_BYTE_F(adr, src) |
34058 | adr = AREG((Opcode >> 9) & 7) - 1; |
34059 | AREG((Opcode >> 9) & 7) = adr; |
34060 | READ_BYTE_F(adr, dst) |
34061 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34062 | if (res > 9) res += 6; |
34063 | res += (dst & 0xF0) + (src & 0xF0); |
34064 | if (res > 0x99) |
34065 | { |
34066 | res -= 0xA0; |
34067 | flag_X = flag_C = M68K_SR_C; |
34068 | } |
34069 | else flag_X = flag_C = 0; |
34070 | flag_NotZ |= res & 0xFF; |
34071 | flag_N = res; |
34072 | WRITE_BYTE_F(adr, res) |
34073 | POST_IO |
34074 | RET(18) |
34075 | } |
34076 | |
34077 | // ABCD7M |
34078 | OPCODE(0xC10F) |
34079 | { |
34080 | u32 adr, res; |
34081 | u32 src, dst; |
34082 | |
34083 | adr = AREG(7) - 2; |
34084 | AREG(7) = adr; |
34085 | PRE_IO |
34086 | READ_BYTE_F(adr, src) |
34087 | adr = AREG((Opcode >> 9) & 7) - 1; |
34088 | AREG((Opcode >> 9) & 7) = adr; |
34089 | READ_BYTE_F(adr, dst) |
34090 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34091 | if (res > 9) res += 6; |
34092 | res += (dst & 0xF0) + (src & 0xF0); |
34093 | if (res > 0x99) |
34094 | { |
34095 | res -= 0xA0; |
34096 | flag_X = flag_C = M68K_SR_C; |
34097 | } |
34098 | else flag_X = flag_C = 0; |
34099 | flag_NotZ |= res & 0xFF; |
34100 | flag_N = res; |
34101 | WRITE_BYTE_F(adr, res) |
34102 | POST_IO |
34103 | RET(18) |
34104 | } |
34105 | |
34106 | // ABCDM7 |
34107 | OPCODE(0xCF08) |
34108 | { |
34109 | u32 adr, res; |
34110 | u32 src, dst; |
34111 | |
34112 | adr = AREG((Opcode >> 0) & 7) - 1; |
34113 | AREG((Opcode >> 0) & 7) = adr; |
34114 | PRE_IO |
34115 | READ_BYTE_F(adr, src) |
34116 | adr = AREG(7) - 2; |
34117 | AREG(7) = adr; |
34118 | READ_BYTE_F(adr, dst) |
34119 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34120 | if (res > 9) res += 6; |
34121 | res += (dst & 0xF0) + (src & 0xF0); |
34122 | if (res > 0x99) |
34123 | { |
34124 | res -= 0xA0; |
34125 | flag_X = flag_C = M68K_SR_C; |
34126 | } |
34127 | else flag_X = flag_C = 0; |
34128 | flag_NotZ |= res & 0xFF; |
34129 | flag_N = res; |
34130 | WRITE_BYTE_F(adr, res) |
34131 | POST_IO |
34132 | RET(18) |
34133 | } |
34134 | |
34135 | // ABCD7M7 |
34136 | OPCODE(0xCF0F) |
34137 | { |
34138 | u32 adr, res; |
34139 | u32 src, dst; |
34140 | |
34141 | adr = AREG(7) - 2; |
34142 | AREG(7) = adr; |
34143 | PRE_IO |
34144 | READ_BYTE_F(adr, src) |
34145 | adr = AREG(7) - 2; |
34146 | AREG(7) = adr; |
34147 | READ_BYTE_F(adr, dst) |
34148 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34149 | if (res > 9) res += 6; |
34150 | res += (dst & 0xF0) + (src & 0xF0); |
34151 | if (res > 0x99) |
34152 | { |
34153 | res -= 0xA0; |
34154 | flag_X = flag_C = M68K_SR_C; |
34155 | } |
34156 | else flag_X = flag_C = 0; |
34157 | flag_NotZ |= res & 0xFF; |
34158 | flag_N = res; |
34159 | WRITE_BYTE_F(adr, res) |
34160 | POST_IO |
34161 | RET(18) |
34162 | } |
34163 | |
34164 | // MULU |
34165 | OPCODE(0xC0C0) |
34166 | { |
34167 | u32 adr, res; |
34168 | u32 src, dst; |
34169 | |
34170 | src = DREGu16((Opcode >> 0) & 7); |
34171 | res = DREGu16((Opcode >> 9) & 7); |
34172 | res *= src; |
34173 | flag_N = res >> 24; |
34174 | flag_NotZ = res; |
34175 | flag_V = flag_C = 0; |
34176 | DREGu32((Opcode >> 9) & 7) = res; |
34177 | #ifdef USE_CYCLONE_TIMING |
34178 | RET(54) |
34179 | #else |
34180 | RET(50) |
34181 | #endif |
34182 | } |
34183 | |
34184 | // MULU |
34185 | OPCODE(0xC0D0) |
34186 | { |
34187 | u32 adr, res; |
34188 | u32 src, dst; |
34189 | |
34190 | adr = AREG((Opcode >> 0) & 7); |
34191 | PRE_IO |
34192 | READ_WORD_F(adr, src) |
34193 | res = DREGu16((Opcode >> 9) & 7); |
34194 | res *= src; |
34195 | flag_N = res >> 24; |
34196 | flag_NotZ = res; |
34197 | flag_V = flag_C = 0; |
34198 | DREGu32((Opcode >> 9) & 7) = res; |
34199 | POST_IO |
34200 | #ifdef USE_CYCLONE_TIMING |
34201 | RET(58) |
34202 | #else |
34203 | RET(54) |
34204 | #endif |
34205 | } |
34206 | |
34207 | // MULU |
34208 | OPCODE(0xC0D8) |
34209 | { |
34210 | u32 adr, res; |
34211 | u32 src, dst; |
34212 | |
34213 | adr = AREG((Opcode >> 0) & 7); |
34214 | AREG((Opcode >> 0) & 7) += 2; |
34215 | PRE_IO |
34216 | READ_WORD_F(adr, src) |
34217 | res = DREGu16((Opcode >> 9) & 7); |
34218 | res *= src; |
34219 | flag_N = res >> 24; |
34220 | flag_NotZ = res; |
34221 | flag_V = flag_C = 0; |
34222 | DREGu32((Opcode >> 9) & 7) = res; |
34223 | POST_IO |
34224 | #ifdef USE_CYCLONE_TIMING |
34225 | RET(58) |
34226 | #else |
34227 | RET(54) |
34228 | #endif |
34229 | } |
34230 | |
34231 | // MULU |
34232 | OPCODE(0xC0E0) |
34233 | { |
34234 | u32 adr, res; |
34235 | u32 src, dst; |
34236 | |
34237 | adr = AREG((Opcode >> 0) & 7) - 2; |
34238 | AREG((Opcode >> 0) & 7) = adr; |
34239 | PRE_IO |
34240 | READ_WORD_F(adr, src) |
34241 | res = DREGu16((Opcode >> 9) & 7); |
34242 | res *= src; |
34243 | flag_N = res >> 24; |
34244 | flag_NotZ = res; |
34245 | flag_V = flag_C = 0; |
34246 | DREGu32((Opcode >> 9) & 7) = res; |
34247 | POST_IO |
34248 | #ifdef USE_CYCLONE_TIMING |
34249 | RET(60) |
34250 | #else |
34251 | RET(56) |
34252 | #endif |
34253 | } |
34254 | |
34255 | // MULU |
34256 | OPCODE(0xC0E8) |
34257 | { |
34258 | u32 adr, res; |
34259 | u32 src, dst; |
34260 | |
34261 | FETCH_SWORD(adr); |
34262 | adr += AREG((Opcode >> 0) & 7); |
34263 | PRE_IO |
34264 | READ_WORD_F(adr, src) |
34265 | res = DREGu16((Opcode >> 9) & 7); |
34266 | res *= src; |
34267 | flag_N = res >> 24; |
34268 | flag_NotZ = res; |
34269 | flag_V = flag_C = 0; |
34270 | DREGu32((Opcode >> 9) & 7) = res; |
34271 | POST_IO |
34272 | #ifdef USE_CYCLONE_TIMING |
34273 | RET(62) |
34274 | #else |
34275 | RET(58) |
34276 | #endif |
34277 | } |
34278 | |
34279 | // MULU |
34280 | OPCODE(0xC0F0) |
34281 | { |
34282 | u32 adr, res; |
34283 | u32 src, dst; |
34284 | |
34285 | adr = AREG((Opcode >> 0) & 7); |
34286 | DECODE_EXT_WORD |
34287 | PRE_IO |
34288 | READ_WORD_F(adr, src) |
34289 | res = DREGu16((Opcode >> 9) & 7); |
34290 | res *= src; |
34291 | flag_N = res >> 24; |
34292 | flag_NotZ = res; |
34293 | flag_V = flag_C = 0; |
34294 | DREGu32((Opcode >> 9) & 7) = res; |
34295 | POST_IO |
34296 | #ifdef USE_CYCLONE_TIMING |
34297 | RET(64) |
34298 | #else |
34299 | RET(60) |
34300 | #endif |
34301 | } |
34302 | |
34303 | // MULU |
34304 | OPCODE(0xC0F8) |
34305 | { |
34306 | u32 adr, res; |
34307 | u32 src, dst; |
34308 | |
34309 | FETCH_SWORD(adr); |
34310 | PRE_IO |
34311 | READ_WORD_F(adr, src) |
34312 | res = DREGu16((Opcode >> 9) & 7); |
34313 | res *= src; |
34314 | flag_N = res >> 24; |
34315 | flag_NotZ = res; |
34316 | flag_V = flag_C = 0; |
34317 | DREGu32((Opcode >> 9) & 7) = res; |
34318 | POST_IO |
34319 | #ifdef USE_CYCLONE_TIMING |
34320 | RET(62) |
34321 | #else |
34322 | RET(58) |
34323 | #endif |
34324 | } |
34325 | |
34326 | // MULU |
34327 | OPCODE(0xC0F9) |
34328 | { |
34329 | u32 adr, res; |
34330 | u32 src, dst; |
34331 | |
34332 | FETCH_LONG(adr); |
34333 | PRE_IO |
34334 | READ_WORD_F(adr, src) |
34335 | res = DREGu16((Opcode >> 9) & 7); |
34336 | res *= src; |
34337 | flag_N = res >> 24; |
34338 | flag_NotZ = res; |
34339 | flag_V = flag_C = 0; |
34340 | DREGu32((Opcode >> 9) & 7) = res; |
34341 | POST_IO |
34342 | #ifdef USE_CYCLONE_TIMING |
34343 | RET(66) |
34344 | #else |
34345 | RET(62) |
34346 | #endif |
34347 | } |
34348 | |
34349 | // MULU |
34350 | OPCODE(0xC0FA) |
34351 | { |
34352 | u32 adr, res; |
34353 | u32 src, dst; |
34354 | |
34355 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34356 | PC++; |
34357 | PRE_IO |
34358 | READ_WORD_F(adr, src) |
34359 | res = DREGu16((Opcode >> 9) & 7); |
34360 | res *= src; |
34361 | flag_N = res >> 24; |
34362 | flag_NotZ = res; |
34363 | flag_V = flag_C = 0; |
34364 | DREGu32((Opcode >> 9) & 7) = res; |
34365 | POST_IO |
34366 | #ifdef USE_CYCLONE_TIMING |
34367 | RET(62) |
34368 | #else |
34369 | RET(58) |
34370 | #endif |
34371 | } |
34372 | |
34373 | // MULU |
34374 | OPCODE(0xC0FB) |
34375 | { |
34376 | u32 adr, res; |
34377 | u32 src, dst; |
34378 | |
34379 | adr = (u32)(PC) - BasePC; |
34380 | DECODE_EXT_WORD |
34381 | PRE_IO |
34382 | READ_WORD_F(adr, src) |
34383 | res = DREGu16((Opcode >> 9) & 7); |
34384 | res *= src; |
34385 | flag_N = res >> 24; |
34386 | flag_NotZ = res; |
34387 | flag_V = flag_C = 0; |
34388 | DREGu32((Opcode >> 9) & 7) = res; |
34389 | POST_IO |
34390 | #ifdef USE_CYCLONE_TIMING |
34391 | RET(64) |
34392 | #else |
34393 | RET(60) |
34394 | #endif |
34395 | } |
34396 | |
34397 | // MULU |
34398 | OPCODE(0xC0FC) |
34399 | { |
34400 | u32 adr, res; |
34401 | u32 src, dst; |
34402 | |
34403 | FETCH_WORD(src); |
34404 | res = DREGu16((Opcode >> 9) & 7); |
34405 | res *= src; |
34406 | flag_N = res >> 24; |
34407 | flag_NotZ = res; |
34408 | flag_V = flag_C = 0; |
34409 | DREGu32((Opcode >> 9) & 7) = res; |
34410 | #ifdef USE_CYCLONE_TIMING |
34411 | RET(58) |
34412 | #else |
34413 | RET(54) |
34414 | #endif |
34415 | } |
34416 | |
34417 | // MULU |
34418 | OPCODE(0xC0DF) |
34419 | { |
34420 | u32 adr, res; |
34421 | u32 src, dst; |
34422 | |
34423 | adr = AREG(7); |
34424 | AREG(7) += 2; |
34425 | PRE_IO |
34426 | READ_WORD_F(adr, src) |
34427 | res = DREGu16((Opcode >> 9) & 7); |
34428 | res *= src; |
34429 | flag_N = res >> 24; |
34430 | flag_NotZ = res; |
34431 | flag_V = flag_C = 0; |
34432 | DREGu32((Opcode >> 9) & 7) = res; |
34433 | POST_IO |
34434 | #ifdef USE_CYCLONE_TIMING |
34435 | RET(58) |
34436 | #else |
34437 | RET(54) |
34438 | #endif |
34439 | } |
34440 | |
34441 | // MULU |
34442 | OPCODE(0xC0E7) |
34443 | { |
34444 | u32 adr, res; |
34445 | u32 src, dst; |
34446 | |
34447 | adr = AREG(7) - 2; |
34448 | AREG(7) = adr; |
34449 | PRE_IO |
34450 | READ_WORD_F(adr, src) |
34451 | res = DREGu16((Opcode >> 9) & 7); |
34452 | res *= src; |
34453 | flag_N = res >> 24; |
34454 | flag_NotZ = res; |
34455 | flag_V = flag_C = 0; |
34456 | DREGu32((Opcode >> 9) & 7) = res; |
34457 | POST_IO |
34458 | #ifdef USE_CYCLONE_TIMING |
34459 | RET(60) |
34460 | #else |
34461 | RET(56) |
34462 | #endif |
34463 | } |
34464 | |
34465 | // MULS |
34466 | OPCODE(0xC1C0) |
34467 | { |
34468 | u32 adr, res; |
34469 | u32 src, dst; |
34470 | |
34471 | src = (s32)DREGs16((Opcode >> 0) & 7); |
34472 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34473 | res = ((s32)res) * ((s32)src); |
34474 | flag_N = res >> 24; |
34475 | flag_NotZ = res; |
34476 | flag_V = flag_C = 0; |
34477 | DREGu32((Opcode >> 9) & 7) = res; |
34478 | #ifdef USE_CYCLONE_TIMING |
34479 | RET(54) |
34480 | #else |
34481 | RET(50) |
34482 | #endif |
34483 | } |
34484 | |
34485 | // MULS |
34486 | OPCODE(0xC1D0) |
34487 | { |
34488 | u32 adr, res; |
34489 | u32 src, dst; |
34490 | |
34491 | adr = AREG((Opcode >> 0) & 7); |
34492 | PRE_IO |
34493 | READSX_WORD_F(adr, src) |
34494 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34495 | res = ((s32)res) * ((s32)src); |
34496 | flag_N = res >> 24; |
34497 | flag_NotZ = res; |
34498 | flag_V = flag_C = 0; |
34499 | DREGu32((Opcode >> 9) & 7) = res; |
34500 | POST_IO |
34501 | #ifdef USE_CYCLONE_TIMING |
34502 | RET(58) |
34503 | #else |
34504 | RET(54) |
34505 | #endif |
34506 | } |
34507 | |
34508 | // MULS |
34509 | OPCODE(0xC1D8) |
34510 | { |
34511 | u32 adr, res; |
34512 | u32 src, dst; |
34513 | |
34514 | adr = AREG((Opcode >> 0) & 7); |
34515 | AREG((Opcode >> 0) & 7) += 2; |
34516 | PRE_IO |
34517 | READSX_WORD_F(adr, src) |
34518 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34519 | res = ((s32)res) * ((s32)src); |
34520 | flag_N = res >> 24; |
34521 | flag_NotZ = res; |
34522 | flag_V = flag_C = 0; |
34523 | DREGu32((Opcode >> 9) & 7) = res; |
34524 | POST_IO |
34525 | #ifdef USE_CYCLONE_TIMING |
34526 | RET(58) |
34527 | #else |
34528 | RET(54) |
34529 | #endif |
34530 | } |
34531 | |
34532 | // MULS |
34533 | OPCODE(0xC1E0) |
34534 | { |
34535 | u32 adr, res; |
34536 | u32 src, dst; |
34537 | |
34538 | adr = AREG((Opcode >> 0) & 7) - 2; |
34539 | AREG((Opcode >> 0) & 7) = adr; |
34540 | PRE_IO |
34541 | READSX_WORD_F(adr, src) |
34542 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34543 | res = ((s32)res) * ((s32)src); |
34544 | flag_N = res >> 24; |
34545 | flag_NotZ = res; |
34546 | flag_V = flag_C = 0; |
34547 | DREGu32((Opcode >> 9) & 7) = res; |
34548 | POST_IO |
34549 | #ifdef USE_CYCLONE_TIMING |
34550 | RET(60) |
34551 | #else |
34552 | RET(56) |
34553 | #endif |
34554 | } |
34555 | |
34556 | // MULS |
34557 | OPCODE(0xC1E8) |
34558 | { |
34559 | u32 adr, res; |
34560 | u32 src, dst; |
34561 | |
34562 | FETCH_SWORD(adr); |
34563 | adr += AREG((Opcode >> 0) & 7); |
34564 | PRE_IO |
34565 | READSX_WORD_F(adr, src) |
34566 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34567 | res = ((s32)res) * ((s32)src); |
34568 | flag_N = res >> 24; |
34569 | flag_NotZ = res; |
34570 | flag_V = flag_C = 0; |
34571 | DREGu32((Opcode >> 9) & 7) = res; |
34572 | POST_IO |
34573 | #ifdef USE_CYCLONE_TIMING |
34574 | RET(62) |
34575 | #else |
34576 | RET(58) |
34577 | #endif |
34578 | } |
34579 | |
34580 | // MULS |
34581 | OPCODE(0xC1F0) |
34582 | { |
34583 | u32 adr, res; |
34584 | u32 src, dst; |
34585 | |
34586 | adr = AREG((Opcode >> 0) & 7); |
34587 | DECODE_EXT_WORD |
34588 | PRE_IO |
34589 | READSX_WORD_F(adr, src) |
34590 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34591 | res = ((s32)res) * ((s32)src); |
34592 | flag_N = res >> 24; |
34593 | flag_NotZ = res; |
34594 | flag_V = flag_C = 0; |
34595 | DREGu32((Opcode >> 9) & 7) = res; |
34596 | POST_IO |
34597 | #ifdef USE_CYCLONE_TIMING |
34598 | RET(64) |
34599 | #else |
34600 | RET(60) |
34601 | #endif |
34602 | } |
34603 | |
34604 | // MULS |
34605 | OPCODE(0xC1F8) |
34606 | { |
34607 | u32 adr, res; |
34608 | u32 src, dst; |
34609 | |
34610 | FETCH_SWORD(adr); |
34611 | PRE_IO |
34612 | READSX_WORD_F(adr, src) |
34613 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34614 | res = ((s32)res) * ((s32)src); |
34615 | flag_N = res >> 24; |
34616 | flag_NotZ = res; |
34617 | flag_V = flag_C = 0; |
34618 | DREGu32((Opcode >> 9) & 7) = res; |
34619 | POST_IO |
34620 | #ifdef USE_CYCLONE_TIMING |
34621 | RET(62) |
34622 | #else |
34623 | RET(58) |
34624 | #endif |
34625 | } |
34626 | |
34627 | // MULS |
34628 | OPCODE(0xC1F9) |
34629 | { |
34630 | u32 adr, res; |
34631 | u32 src, dst; |
34632 | |
34633 | FETCH_LONG(adr); |
34634 | PRE_IO |
34635 | READSX_WORD_F(adr, src) |
34636 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34637 | res = ((s32)res) * ((s32)src); |
34638 | flag_N = res >> 24; |
34639 | flag_NotZ = res; |
34640 | flag_V = flag_C = 0; |
34641 | DREGu32((Opcode >> 9) & 7) = res; |
34642 | POST_IO |
34643 | #ifdef USE_CYCLONE_TIMING |
34644 | RET(66) |
34645 | #else |
34646 | RET(62) |
34647 | #endif |
34648 | } |
34649 | |
34650 | // MULS |
34651 | OPCODE(0xC1FA) |
34652 | { |
34653 | u32 adr, res; |
34654 | u32 src, dst; |
34655 | |
34656 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34657 | PC++; |
34658 | PRE_IO |
34659 | READSX_WORD_F(adr, src) |
34660 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34661 | res = ((s32)res) * ((s32)src); |
34662 | flag_N = res >> 24; |
34663 | flag_NotZ = res; |
34664 | flag_V = flag_C = 0; |
34665 | DREGu32((Opcode >> 9) & 7) = res; |
34666 | POST_IO |
34667 | #ifdef USE_CYCLONE_TIMING |
34668 | RET(62) |
34669 | #else |
34670 | RET(58) |
34671 | #endif |
34672 | } |
34673 | |
34674 | // MULS |
34675 | OPCODE(0xC1FB) |
34676 | { |
34677 | u32 adr, res; |
34678 | u32 src, dst; |
34679 | |
34680 | adr = (u32)(PC) - BasePC; |
34681 | DECODE_EXT_WORD |
34682 | PRE_IO |
34683 | READSX_WORD_F(adr, src) |
34684 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34685 | res = ((s32)res) * ((s32)src); |
34686 | flag_N = res >> 24; |
34687 | flag_NotZ = res; |
34688 | flag_V = flag_C = 0; |
34689 | DREGu32((Opcode >> 9) & 7) = res; |
34690 | POST_IO |
34691 | #ifdef USE_CYCLONE_TIMING |
34692 | RET(64) |
34693 | #else |
34694 | RET(60) |
34695 | #endif |
34696 | } |
34697 | |
34698 | // MULS |
34699 | OPCODE(0xC1FC) |
34700 | { |
34701 | u32 adr, res; |
34702 | u32 src, dst; |
34703 | |
34704 | FETCH_SWORD(src); |
34705 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34706 | res = ((s32)res) * ((s32)src); |
34707 | flag_N = res >> 24; |
34708 | flag_NotZ = res; |
34709 | flag_V = flag_C = 0; |
34710 | DREGu32((Opcode >> 9) & 7) = res; |
34711 | #ifdef USE_CYCLONE_TIMING |
34712 | RET(58) |
34713 | #else |
34714 | RET(54) |
34715 | #endif |
34716 | } |
34717 | |
34718 | // MULS |
34719 | OPCODE(0xC1DF) |
34720 | { |
34721 | u32 adr, res; |
34722 | u32 src, dst; |
34723 | |
34724 | adr = AREG(7); |
34725 | AREG(7) += 2; |
34726 | PRE_IO |
34727 | READSX_WORD_F(adr, src) |
34728 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34729 | res = ((s32)res) * ((s32)src); |
34730 | flag_N = res >> 24; |
34731 | flag_NotZ = res; |
34732 | flag_V = flag_C = 0; |
34733 | DREGu32((Opcode >> 9) & 7) = res; |
34734 | POST_IO |
34735 | #ifdef USE_CYCLONE_TIMING |
34736 | RET(58) |
34737 | #else |
34738 | RET(54) |
34739 | #endif |
34740 | } |
34741 | |
34742 | // MULS |
34743 | OPCODE(0xC1E7) |
34744 | { |
34745 | u32 adr, res; |
34746 | u32 src, dst; |
34747 | |
34748 | adr = AREG(7) - 2; |
34749 | AREG(7) = adr; |
34750 | PRE_IO |
34751 | READSX_WORD_F(adr, src) |
34752 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34753 | res = ((s32)res) * ((s32)src); |
34754 | flag_N = res >> 24; |
34755 | flag_NotZ = res; |
34756 | flag_V = flag_C = 0; |
34757 | DREGu32((Opcode >> 9) & 7) = res; |
34758 | POST_IO |
34759 | #ifdef USE_CYCLONE_TIMING |
34760 | RET(60) |
34761 | #else |
34762 | RET(56) |
34763 | #endif |
34764 | } |
34765 | |
34766 | // EXGDD |
34767 | OPCODE(0xC140) |
34768 | { |
34769 | u32 adr, res; |
34770 | u32 src, dst; |
34771 | |
34772 | res = DREGu32((Opcode >> 0) & 7); |
34773 | src = DREGu32((Opcode >> 9) & 7); |
34774 | DREGu32((Opcode >> 9) & 7) = res; |
34775 | res = src; |
34776 | DREGu32((Opcode >> 0) & 7) = res; |
34777 | RET(6) |
34778 | } |
34779 | |
34780 | // EXGAA |
34781 | OPCODE(0xC148) |
34782 | { |
34783 | u32 adr, res; |
34784 | u32 src, dst; |
34785 | |
34786 | res = AREGu32((Opcode >> 0) & 7); |
34787 | src = AREGu32((Opcode >> 9) & 7); |
34788 | AREG((Opcode >> 9) & 7) = res; |
34789 | res = src; |
34790 | AREG((Opcode >> 0) & 7) = res; |
34791 | RET(6) |
34792 | } |
34793 | |
34794 | // EXGAD |
34795 | OPCODE(0xC188) |
34796 | { |
34797 | u32 adr, res; |
34798 | u32 src, dst; |
34799 | |
34800 | res = AREGu32((Opcode >> 0) & 7); |
34801 | src = DREGu32((Opcode >> 9) & 7); |
34802 | DREGu32((Opcode >> 9) & 7) = res; |
34803 | res = src; |
34804 | AREG((Opcode >> 0) & 7) = res; |
34805 | RET(6) |
34806 | } |
34807 | |
34808 | // ADDaD |
34809 | OPCODE(0xD000) |
34810 | { |
34811 | u32 adr, res; |
34812 | u32 src, dst; |
34813 | |
34814 | src = DREGu8((Opcode >> 0) & 7); |
34815 | dst = DREGu8((Opcode >> 9) & 7); |
34816 | res = dst + src; |
34817 | flag_N = flag_X = flag_C = res; |
34818 | flag_V = (src ^ res) & (dst ^ res); |
34819 | flag_NotZ = res & 0xFF; |
34820 | DREGu8((Opcode >> 9) & 7) = res; |
34821 | RET(4) |
34822 | } |
34823 | |
34824 | // ADDaD |
03e4f2a3 |
34825 | #if 0 |
70357ce5 |
34826 | OPCODE(0xD008) |
34827 | { |
34828 | u32 adr, res; |
34829 | u32 src, dst; |
34830 | |
34831 | // can't read byte from Ax registers ! |
34832 | m68kcontext.execinfo |= M68K_FAULTED; |
34833 | m68kcontext.io_cycle_counter = 0; |
34834 | /* |
34835 | goto famec_Exec_End; |
34836 | dst = DREGu8((Opcode >> 9) & 7); |
34837 | res = dst + src; |
34838 | flag_N = flag_X = flag_C = res; |
34839 | flag_V = (src ^ res) & (dst ^ res); |
34840 | flag_NotZ = res & 0xFF; |
34841 | DREGu8((Opcode >> 9) & 7) = res; |
34842 | */ |
34843 | RET(4) |
34844 | } |
03e4f2a3 |
34845 | #endif |
70357ce5 |
34846 | |
34847 | // ADDaD |
34848 | OPCODE(0xD010) |
34849 | { |
34850 | u32 adr, res; |
34851 | u32 src, dst; |
34852 | |
34853 | adr = AREG((Opcode >> 0) & 7); |
34854 | PRE_IO |
34855 | READ_BYTE_F(adr, src) |
34856 | dst = DREGu8((Opcode >> 9) & 7); |
34857 | res = dst + src; |
34858 | flag_N = flag_X = flag_C = res; |
34859 | flag_V = (src ^ res) & (dst ^ res); |
34860 | flag_NotZ = res & 0xFF; |
34861 | DREGu8((Opcode >> 9) & 7) = res; |
34862 | POST_IO |
34863 | RET(8) |
34864 | } |
34865 | |
34866 | // ADDaD |
34867 | OPCODE(0xD018) |
34868 | { |
34869 | u32 adr, res; |
34870 | u32 src, dst; |
34871 | |
34872 | adr = AREG((Opcode >> 0) & 7); |
34873 | AREG((Opcode >> 0) & 7) += 1; |
34874 | PRE_IO |
34875 | READ_BYTE_F(adr, src) |
34876 | dst = DREGu8((Opcode >> 9) & 7); |
34877 | res = dst + src; |
34878 | flag_N = flag_X = flag_C = res; |
34879 | flag_V = (src ^ res) & (dst ^ res); |
34880 | flag_NotZ = res & 0xFF; |
34881 | DREGu8((Opcode >> 9) & 7) = res; |
34882 | POST_IO |
34883 | RET(8) |
34884 | } |
34885 | |
34886 | // ADDaD |
34887 | OPCODE(0xD020) |
34888 | { |
34889 | u32 adr, res; |
34890 | u32 src, dst; |
34891 | |
34892 | adr = AREG((Opcode >> 0) & 7) - 1; |
34893 | AREG((Opcode >> 0) & 7) = adr; |
34894 | PRE_IO |
34895 | READ_BYTE_F(adr, src) |
34896 | dst = DREGu8((Opcode >> 9) & 7); |
34897 | res = dst + src; |
34898 | flag_N = flag_X = flag_C = res; |
34899 | flag_V = (src ^ res) & (dst ^ res); |
34900 | flag_NotZ = res & 0xFF; |
34901 | DREGu8((Opcode >> 9) & 7) = res; |
34902 | POST_IO |
34903 | RET(10) |
34904 | } |
34905 | |
34906 | // ADDaD |
34907 | OPCODE(0xD028) |
34908 | { |
34909 | u32 adr, res; |
34910 | u32 src, dst; |
34911 | |
34912 | FETCH_SWORD(adr); |
34913 | adr += AREG((Opcode >> 0) & 7); |
34914 | PRE_IO |
34915 | READ_BYTE_F(adr, src) |
34916 | dst = DREGu8((Opcode >> 9) & 7); |
34917 | res = dst + src; |
34918 | flag_N = flag_X = flag_C = res; |
34919 | flag_V = (src ^ res) & (dst ^ res); |
34920 | flag_NotZ = res & 0xFF; |
34921 | DREGu8((Opcode >> 9) & 7) = res; |
34922 | POST_IO |
34923 | RET(12) |
34924 | } |
34925 | |
34926 | // ADDaD |
34927 | OPCODE(0xD030) |
34928 | { |
34929 | u32 adr, res; |
34930 | u32 src, dst; |
34931 | |
34932 | adr = AREG((Opcode >> 0) & 7); |
34933 | DECODE_EXT_WORD |
34934 | PRE_IO |
34935 | READ_BYTE_F(adr, src) |
34936 | dst = DREGu8((Opcode >> 9) & 7); |
34937 | res = dst + src; |
34938 | flag_N = flag_X = flag_C = res; |
34939 | flag_V = (src ^ res) & (dst ^ res); |
34940 | flag_NotZ = res & 0xFF; |
34941 | DREGu8((Opcode >> 9) & 7) = res; |
34942 | POST_IO |
34943 | RET(14) |
34944 | } |
34945 | |
34946 | // ADDaD |
34947 | OPCODE(0xD038) |
34948 | { |
34949 | u32 adr, res; |
34950 | u32 src, dst; |
34951 | |
34952 | FETCH_SWORD(adr); |
34953 | PRE_IO |
34954 | READ_BYTE_F(adr, src) |
34955 | dst = DREGu8((Opcode >> 9) & 7); |
34956 | res = dst + src; |
34957 | flag_N = flag_X = flag_C = res; |
34958 | flag_V = (src ^ res) & (dst ^ res); |
34959 | flag_NotZ = res & 0xFF; |
34960 | DREGu8((Opcode >> 9) & 7) = res; |
34961 | POST_IO |
34962 | RET(12) |
34963 | } |
34964 | |
34965 | // ADDaD |
34966 | OPCODE(0xD039) |
34967 | { |
34968 | u32 adr, res; |
34969 | u32 src, dst; |
34970 | |
34971 | FETCH_LONG(adr); |
34972 | PRE_IO |
34973 | READ_BYTE_F(adr, src) |
34974 | dst = DREGu8((Opcode >> 9) & 7); |
34975 | res = dst + src; |
34976 | flag_N = flag_X = flag_C = res; |
34977 | flag_V = (src ^ res) & (dst ^ res); |
34978 | flag_NotZ = res & 0xFF; |
34979 | DREGu8((Opcode >> 9) & 7) = res; |
34980 | POST_IO |
34981 | RET(16) |
34982 | } |
34983 | |
34984 | // ADDaD |
34985 | OPCODE(0xD03A) |
34986 | { |
34987 | u32 adr, res; |
34988 | u32 src, dst; |
34989 | |
34990 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34991 | PC++; |
34992 | PRE_IO |
34993 | READ_BYTE_F(adr, src) |
34994 | dst = DREGu8((Opcode >> 9) & 7); |
34995 | res = dst + src; |
34996 | flag_N = flag_X = flag_C = res; |
34997 | flag_V = (src ^ res) & (dst ^ res); |
34998 | flag_NotZ = res & 0xFF; |
34999 | DREGu8((Opcode >> 9) & 7) = res; |
35000 | POST_IO |
35001 | RET(12) |
35002 | } |
35003 | |
35004 | // ADDaD |
35005 | OPCODE(0xD03B) |
35006 | { |
35007 | u32 adr, res; |
35008 | u32 src, dst; |
35009 | |
35010 | adr = (u32)(PC) - BasePC; |
35011 | DECODE_EXT_WORD |
35012 | PRE_IO |
35013 | READ_BYTE_F(adr, src) |
35014 | dst = DREGu8((Opcode >> 9) & 7); |
35015 | res = dst + src; |
35016 | flag_N = flag_X = flag_C = res; |
35017 | flag_V = (src ^ res) & (dst ^ res); |
35018 | flag_NotZ = res & 0xFF; |
35019 | DREGu8((Opcode >> 9) & 7) = res; |
35020 | POST_IO |
35021 | RET(14) |
35022 | } |
35023 | |
35024 | // ADDaD |
35025 | OPCODE(0xD03C) |
35026 | { |
35027 | u32 adr, res; |
35028 | u32 src, dst; |
35029 | |
35030 | FETCH_BYTE(src); |
35031 | dst = DREGu8((Opcode >> 9) & 7); |
35032 | res = dst + src; |
35033 | flag_N = flag_X = flag_C = res; |
35034 | flag_V = (src ^ res) & (dst ^ res); |
35035 | flag_NotZ = res & 0xFF; |
35036 | DREGu8((Opcode >> 9) & 7) = res; |
35037 | RET(8) |
35038 | } |
35039 | |
35040 | // ADDaD |
35041 | OPCODE(0xD01F) |
35042 | { |
35043 | u32 adr, res; |
35044 | u32 src, dst; |
35045 | |
35046 | adr = AREG(7); |
35047 | AREG(7) += 2; |
35048 | PRE_IO |
35049 | READ_BYTE_F(adr, src) |
35050 | dst = DREGu8((Opcode >> 9) & 7); |
35051 | res = dst + src; |
35052 | flag_N = flag_X = flag_C = res; |
35053 | flag_V = (src ^ res) & (dst ^ res); |
35054 | flag_NotZ = res & 0xFF; |
35055 | DREGu8((Opcode >> 9) & 7) = res; |
35056 | POST_IO |
35057 | RET(8) |
35058 | } |
35059 | |
35060 | // ADDaD |
35061 | OPCODE(0xD027) |
35062 | { |
35063 | u32 adr, res; |
35064 | u32 src, dst; |
35065 | |
35066 | adr = AREG(7) - 2; |
35067 | AREG(7) = adr; |
35068 | PRE_IO |
35069 | READ_BYTE_F(adr, src) |
35070 | dst = DREGu8((Opcode >> 9) & 7); |
35071 | res = dst + src; |
35072 | flag_N = flag_X = flag_C = res; |
35073 | flag_V = (src ^ res) & (dst ^ res); |
35074 | flag_NotZ = res & 0xFF; |
35075 | DREGu8((Opcode >> 9) & 7) = res; |
35076 | POST_IO |
35077 | RET(10) |
35078 | } |
35079 | |
35080 | // ADDaD |
35081 | OPCODE(0xD040) |
35082 | { |
35083 | u32 adr, res; |
35084 | u32 src, dst; |
35085 | |
35086 | src = DREGu16((Opcode >> 0) & 7); |
35087 | dst = DREGu16((Opcode >> 9) & 7); |
35088 | res = dst + src; |
35089 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35090 | flag_N = flag_X = flag_C = res >> 8; |
35091 | flag_NotZ = res & 0xFFFF; |
35092 | DREGu16((Opcode >> 9) & 7) = res; |
35093 | RET(4) |
35094 | } |
35095 | |
35096 | // ADDaD |
35097 | OPCODE(0xD048) |
35098 | { |
35099 | u32 adr, res; |
35100 | u32 src, dst; |
35101 | |
35102 | src = AREGu16((Opcode >> 0) & 7); |
35103 | dst = DREGu16((Opcode >> 9) & 7); |
35104 | res = dst + src; |
35105 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35106 | flag_N = flag_X = flag_C = res >> 8; |
35107 | flag_NotZ = res & 0xFFFF; |
35108 | DREGu16((Opcode >> 9) & 7) = res; |
35109 | RET(4) |
35110 | } |
35111 | |
35112 | // ADDaD |
35113 | OPCODE(0xD050) |
35114 | { |
35115 | u32 adr, res; |
35116 | u32 src, dst; |
35117 | |
35118 | adr = AREG((Opcode >> 0) & 7); |
35119 | PRE_IO |
35120 | READ_WORD_F(adr, src) |
35121 | dst = DREGu16((Opcode >> 9) & 7); |
35122 | res = dst + src; |
35123 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35124 | flag_N = flag_X = flag_C = res >> 8; |
35125 | flag_NotZ = res & 0xFFFF; |
35126 | DREGu16((Opcode >> 9) & 7) = res; |
35127 | POST_IO |
35128 | RET(8) |
35129 | } |
35130 | |
35131 | // ADDaD |
35132 | OPCODE(0xD058) |
35133 | { |
35134 | u32 adr, res; |
35135 | u32 src, dst; |
35136 | |
35137 | adr = AREG((Opcode >> 0) & 7); |
35138 | AREG((Opcode >> 0) & 7) += 2; |
35139 | PRE_IO |
35140 | READ_WORD_F(adr, src) |
35141 | dst = DREGu16((Opcode >> 9) & 7); |
35142 | res = dst + src; |
35143 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35144 | flag_N = flag_X = flag_C = res >> 8; |
35145 | flag_NotZ = res & 0xFFFF; |
35146 | DREGu16((Opcode >> 9) & 7) = res; |
35147 | POST_IO |
35148 | RET(8) |
35149 | } |
35150 | |
35151 | // ADDaD |
35152 | OPCODE(0xD060) |
35153 | { |
35154 | u32 adr, res; |
35155 | u32 src, dst; |
35156 | |
35157 | adr = AREG((Opcode >> 0) & 7) - 2; |
35158 | AREG((Opcode >> 0) & 7) = adr; |
35159 | PRE_IO |
35160 | READ_WORD_F(adr, src) |
35161 | dst = DREGu16((Opcode >> 9) & 7); |
35162 | res = dst + src; |
35163 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35164 | flag_N = flag_X = flag_C = res >> 8; |
35165 | flag_NotZ = res & 0xFFFF; |
35166 | DREGu16((Opcode >> 9) & 7) = res; |
35167 | POST_IO |
35168 | RET(10) |
35169 | } |
35170 | |
35171 | // ADDaD |
35172 | OPCODE(0xD068) |
35173 | { |
35174 | u32 adr, res; |
35175 | u32 src, dst; |
35176 | |
35177 | FETCH_SWORD(adr); |
35178 | adr += AREG((Opcode >> 0) & 7); |
35179 | PRE_IO |
35180 | READ_WORD_F(adr, src) |
35181 | dst = DREGu16((Opcode >> 9) & 7); |
35182 | res = dst + src; |
35183 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35184 | flag_N = flag_X = flag_C = res >> 8; |
35185 | flag_NotZ = res & 0xFFFF; |
35186 | DREGu16((Opcode >> 9) & 7) = res; |
35187 | POST_IO |
35188 | RET(12) |
35189 | } |
35190 | |
35191 | // ADDaD |
35192 | OPCODE(0xD070) |
35193 | { |
35194 | u32 adr, res; |
35195 | u32 src, dst; |
35196 | |
35197 | adr = AREG((Opcode >> 0) & 7); |
35198 | DECODE_EXT_WORD |
35199 | PRE_IO |
35200 | READ_WORD_F(adr, src) |
35201 | dst = DREGu16((Opcode >> 9) & 7); |
35202 | res = dst + src; |
35203 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35204 | flag_N = flag_X = flag_C = res >> 8; |
35205 | flag_NotZ = res & 0xFFFF; |
35206 | DREGu16((Opcode >> 9) & 7) = res; |
35207 | POST_IO |
35208 | RET(14) |
35209 | } |
35210 | |
35211 | // ADDaD |
35212 | OPCODE(0xD078) |
35213 | { |
35214 | u32 adr, res; |
35215 | u32 src, dst; |
35216 | |
35217 | FETCH_SWORD(adr); |
35218 | PRE_IO |
35219 | READ_WORD_F(adr, src) |
35220 | dst = DREGu16((Opcode >> 9) & 7); |
35221 | res = dst + src; |
35222 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35223 | flag_N = flag_X = flag_C = res >> 8; |
35224 | flag_NotZ = res & 0xFFFF; |
35225 | DREGu16((Opcode >> 9) & 7) = res; |
35226 | POST_IO |
35227 | RET(12) |
35228 | } |
35229 | |
35230 | // ADDaD |
35231 | OPCODE(0xD079) |
35232 | { |
35233 | u32 adr, res; |
35234 | u32 src, dst; |
35235 | |
35236 | FETCH_LONG(adr); |
35237 | PRE_IO |
35238 | READ_WORD_F(adr, src) |
35239 | dst = DREGu16((Opcode >> 9) & 7); |
35240 | res = dst + src; |
35241 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35242 | flag_N = flag_X = flag_C = res >> 8; |
35243 | flag_NotZ = res & 0xFFFF; |
35244 | DREGu16((Opcode >> 9) & 7) = res; |
35245 | POST_IO |
35246 | RET(16) |
35247 | } |
35248 | |
35249 | // ADDaD |
35250 | OPCODE(0xD07A) |
35251 | { |
35252 | u32 adr, res; |
35253 | u32 src, dst; |
35254 | |
35255 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
35256 | PC++; |
35257 | PRE_IO |
35258 | READ_WORD_F(adr, src) |
35259 | dst = DREGu16((Opcode >> 9) & 7); |
35260 | res = dst + src; |
35261 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35262 | flag_N = flag_X = flag_C = res >> 8; |
35263 | flag_NotZ = res & 0xFFFF; |
35264 | DREGu16((Opcode >> 9) & 7) = res; |
35265 | POST_IO |
35266 | RET(12) |
35267 | } |
35268 | |
35269 | // ADDaD |
35270 | OPCODE(0xD07B) |
35271 | { |
35272 | u32 adr, res; |
35273 | u32 src, dst; |
35274 | |
35275 | adr = (u32)(PC) - BasePC; |
35276 | DECODE_EXT_WORD |
35277 | PRE_IO |
35278 | READ_WORD_F(adr, src) |
35279 | dst = DREGu16((Opcode >> 9) & 7); |
35280 | res = dst + src; |
35281 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35282 | flag_N = flag_X = flag_C = res >> 8; |
35283 | flag_NotZ = res & 0xFFFF; |
35284 | DREGu16((Opcode >> 9) & 7) = res; |
35285 | POST_IO |
35286 | RET(14) |
35287 | } |
35288 | |
35289 | // ADDaD |
35290 | OPCODE(0xD07C) |
35291 | { |
35292 | u32 adr, res; |
35293 | u32 src, dst; |
35294 | |
35295 | FETCH_WORD(src); |
35296 | dst = DREGu16((Opcode >> 9) & 7); |
35297 | res = dst + src; |
35298 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35299 | flag_N = flag_X = flag_C = res >> 8; |
35300 | flag_NotZ = res & 0xFFFF; |
35301 | DREGu16((Opcode >> 9) & 7) = res; |
35302 | RET(8) |
35303 | } |
35304 | |
35305 | // ADDaD |
35306 | OPCODE(0xD05F) |
35307 | { |
35308 | u32 adr, res; |
35309 | u32 src, dst; |
35310 | |
35311 | adr = AREG(7); |
35312 | AREG(7) += 2; |
35313 | PRE_IO |
35314 | READ_WORD_F(adr, src) |
35315 | dst = DREGu16((Opcode >> 9) & 7); |
35316 | res = dst + src; |
35317 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35318 | flag_N = flag_X = flag_C = res >> 8; |
35319 | flag_NotZ = res & 0xFFFF; |
35320 | DREGu16((Opcode >> 9) & 7) = res; |
35321 | POST_IO |
35322 | RET(8) |
35323 | } |
35324 | |
35325 | // ADDaD |
35326 | OPCODE(0xD067) |
35327 | { |
35328 | u32 adr, res; |
35329 | u32 src, dst; |
35330 | |
35331 | adr = AREG(7) - 2; |
35332 | AREG(7) = adr; |
35333 | PRE_IO |
35334 | READ_WORD_F(adr, src) |
35335 | dst = DREGu16((Opcode >> 9) & 7); |
35336 | res = dst + src; |
35337 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35338 | flag_N = flag_X = flag_C = res >> 8; |
35339 | flag_NotZ = res & 0xFFFF; |
35340 | DREGu16((Opcode >> 9) & 7) = res; |
35341 | POST_IO |
35342 | RET(10) |
35343 | } |
35344 | |
35345 | // ADDaD |
35346 | OPCODE(0xD080) |
35347 | { |
35348 | u32 adr, res; |
35349 | u32 src, dst; |
35350 | |
35351 | src = DREGu32((Opcode >> 0) & 7); |
35352 | dst = DREGu32((Opcode >> 9) & 7); |
35353 | res = dst + src; |
35354 | flag_NotZ = res; |
35355 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35356 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35357 | flag_N = res >> 24; |
35358 | DREGu32((Opcode >> 9) & 7) = res; |
35359 | RET(8) |
35360 | } |
35361 | |
35362 | // ADDaD |
35363 | OPCODE(0xD088) |
35364 | { |
35365 | u32 adr, res; |
35366 | u32 src, dst; |
35367 | |
35368 | src = AREGu32((Opcode >> 0) & 7); |
35369 | dst = DREGu32((Opcode >> 9) & 7); |
35370 | res = dst + src; |
35371 | flag_NotZ = res; |
35372 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35373 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35374 | flag_N = res >> 24; |
35375 | DREGu32((Opcode >> 9) & 7) = res; |
35376 | RET(8) |
35377 | } |
35378 | |
35379 | // ADDaD |
35380 | OPCODE(0xD090) |
35381 | { |
35382 | u32 adr, res; |
35383 | u32 src, dst; |
35384 | |
35385 | adr = AREG((Opcode >> 0) & 7); |
35386 | PRE_IO |
35387 | READ_LONG_F(adr, src) |
35388 | dst = DREGu32((Opcode >> 9) & 7); |
35389 | res = dst + src; |
35390 | flag_NotZ = res; |
35391 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35392 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35393 | flag_N = res >> 24; |
35394 | DREGu32((Opcode >> 9) & 7) = res; |
35395 | POST_IO |
35396 | RET(14) |
35397 | } |
35398 | |
35399 | // ADDaD |
35400 | OPCODE(0xD098) |
35401 | { |
35402 | u32 adr, res; |
35403 | u32 src, dst; |
35404 | |
35405 | adr = AREG((Opcode >> 0) & 7); |
35406 | AREG((Opcode >> 0) & 7) += 4; |
35407 | PRE_IO |
35408 | READ_LONG_F(adr, src) |
35409 | dst = DREGu32((Opcode >> 9) & 7); |
35410 | res = dst + src; |
35411 | flag_NotZ = res; |
35412 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35413 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35414 | flag_N = res >> 24; |
35415 | DREGu32((Opcode >> 9) & 7) = res; |
35416 | POST_IO |
35417 | RET(14) |
35418 | } |
35419 | |
35420 | // ADDaD |
35421 | OPCODE(0xD0A0) |
35422 | { |
35423 | u32 adr, res; |
35424 | u32 src, dst; |
35425 | |
35426 | adr = AREG((Opcode >> 0) & 7) - 4; |
35427 | AREG((Opcode >> 0) & 7) = adr; |
35428 | PRE_IO |
35429 | READ_LONG_F(adr, src) |
35430 | dst = DREGu32((Opcode >> 9) & 7); |
35431 | res = dst + src; |
35432 | flag_NotZ = res; |
35433 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35434 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35435 | flag_N = res >> 24; |
35436 | DREGu32((Opcode >> 9) & 7) = res; |
35437 | POST_IO |
35438 | RET(16) |
35439 | } |
35440 | |
35441 | // ADDaD |
35442 | OPCODE(0xD0A8) |
35443 | { |
35444 | u32 adr, res; |
35445 | u32 src, dst; |
35446 | |
35447 | FETCH_SWORD(adr); |
35448 | adr += AREG((Opcode >> 0) & 7); |
35449 | PRE_IO |
35450 | READ_LONG_F(adr, src) |
35451 | dst = DREGu32((Opcode >> 9) & 7); |
35452 | res = dst + src; |
35453 | flag_NotZ = res; |
35454 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35455 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35456 | flag_N = res >> 24; |
35457 | DREGu32((Opcode >> 9) & 7) = res; |
35458 | POST_IO |
35459 | RET(18) |
35460 | } |
35461 | |
35462 | // ADDaD |
35463 | OPCODE(0xD0B0) |
35464 | { |
35465 | u32 adr, res; |
35466 | u32 src, dst; |
35467 | |
35468 | adr = AREG((Opcode >> 0) & 7); |
35469 | DECODE_EXT_WORD |
35470 | PRE_IO |
35471 | READ_LONG_F(adr, src) |
35472 | dst = DREGu32((Opcode >> 9) & 7); |
35473 | res = dst + src; |
35474 | flag_NotZ = res; |
35475 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35476 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35477 | flag_N = res >> 24; |
35478 | DREGu32((Opcode >> 9) & 7) = res; |
35479 | POST_IO |
35480 | RET(20) |
35481 | } |
35482 | |
35483 | // ADDaD |
35484 | OPCODE(0xD0B8) |
35485 | { |
35486 | u32 adr, res; |
35487 | u32 src, dst; |
35488 | |
35489 | FETCH_SWORD(adr); |
35490 | PRE_IO |
35491 | READ_LONG_F(adr, src) |
35492 | dst = DREGu32((Opcode >> 9) & 7); |
35493 | res = dst + src; |
35494 | flag_NotZ = res; |
35495 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35496 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35497 | flag_N = res >> 24; |
35498 | DREGu32((Opcode >> 9) & 7) = res; |
35499 | POST_IO |
35500 | RET(18) |
35501 | } |
35502 | |
35503 | // ADDaD |
35504 | OPCODE(0xD0B9) |
35505 | { |
35506 | u32 adr, res; |
35507 | u32 src, dst; |
35508 | |
35509 | FETCH_LONG(adr); |
35510 | PRE_IO |
35511 | READ_LONG_F(adr, src) |
35512 | dst = DREGu32((Opcode >> 9) & 7); |
35513 | res = dst + src; |
35514 | flag_NotZ = res; |
35515 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35516 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35517 | flag_N = res >> 24; |
35518 | DREGu32((Opcode >> 9) & 7) = res; |
35519 | POST_IO |
35520 | RET(22) |
35521 | } |
35522 | |
35523 | // ADDaD |
35524 | OPCODE(0xD0BA) |
35525 | { |
35526 | u32 adr, res; |
35527 | u32 src, dst; |
35528 | |
35529 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
35530 | PC++; |
35531 | PRE_IO |
35532 | READ_LONG_F(adr, src) |
35533 | dst = DREGu32((Opcode >> 9) & 7); |
35534 | res = dst + src; |
35535 | flag_NotZ = res; |
35536 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35537 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35538 | flag_N = res >> 24; |
35539 | DREGu32((Opcode >> 9) & 7) = res; |
35540 | POST_IO |
35541 | RET(18) |
35542 | } |
35543 | |
35544 | // ADDaD |
35545 | OPCODE(0xD0BB) |
35546 | { |
35547 | u32 adr, res; |
35548 | u32 src, dst; |
35549 | |
35550 | adr = (u32)(PC) - BasePC; |
35551 | DECODE_EXT_WORD |
35552 | PRE_IO |
35553 | READ_LONG_F(adr, src) |
35554 | dst = DREGu32((Opcode >> 9) & 7); |
35555 | res = dst + src; |
35556 | flag_NotZ = res; |
35557 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35558 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35559 | flag_N = res >> 24; |
35560 | DREGu32((Opcode >> 9) & 7) = res; |
35561 | POST_IO |
35562 | RET(20) |
35563 | } |
35564 | |
35565 | // ADDaD |
35566 | OPCODE(0xD0BC) |
35567 | { |
35568 | u32 adr, res; |
35569 | u32 src, dst; |
35570 | |
35571 | FETCH_LONG(src); |
35572 | dst = DREGu32((Opcode >> 9) & 7); |
35573 | res = dst + src; |
35574 | flag_NotZ = res; |
35575 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35576 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35577 | flag_N = res >> 24; |
35578 | DREGu32((Opcode >> 9) & 7) = res; |
35579 | RET(16) |
35580 | } |
35581 | |
35582 | // ADDaD |
35583 | OPCODE(0xD09F) |
35584 | { |
35585 | u32 adr, res; |
35586 | u32 src, dst; |
35587 | |
35588 | adr = AREG(7); |
35589 | AREG(7) += 4; |
35590 | PRE_IO |
35591 | READ_LONG_F(adr, src) |
35592 | dst = DREGu32((Opcode >> 9) & 7); |
35593 | res = dst + src; |
35594 | flag_NotZ = res; |
35595 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35596 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35597 | flag_N = res >> 24; |
35598 | DREGu32((Opcode >> 9) & 7) = res; |
35599 | POST_IO |
35600 | RET(14) |
35601 | } |
35602 | |
35603 | // ADDaD |
35604 | OPCODE(0xD0A7) |
35605 | { |
35606 | u32 adr, res; |
35607 | u32 src, dst; |
35608 | |
35609 | adr = AREG(7) - 4; |
35610 | AREG(7) = adr; |
35611 | PRE_IO |
35612 | READ_LONG_F(adr, src) |
35613 | dst = DREGu32((Opcode >> 9) & 7); |
35614 | res = dst + src; |
35615 | flag_NotZ = res; |
35616 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35617 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35618 | flag_N = res >> 24; |
35619 | DREGu32((Opcode >> 9) & 7) = res; |
35620 | POST_IO |
35621 | RET(16) |
35622 | } |
35623 | |
35624 | // ADDDa |
35625 | OPCODE(0xD110) |
35626 | { |
35627 | u32 adr, res; |
35628 | u32 src, dst; |
35629 | |
35630 | src = DREGu8((Opcode >> 9) & 7); |
35631 | adr = AREG((Opcode >> 0) & 7); |
35632 | PRE_IO |
35633 | READ_BYTE_F(adr, dst) |
35634 | res = dst + src; |
35635 | flag_N = flag_X = flag_C = res; |
35636 | flag_V = (src ^ res) & (dst ^ res); |
35637 | flag_NotZ = res & 0xFF; |
35638 | WRITE_BYTE_F(adr, res) |
35639 | POST_IO |
35640 | RET(12) |
35641 | } |
35642 | |
35643 | // ADDDa |
35644 | OPCODE(0xD118) |
35645 | { |
35646 | u32 adr, res; |
35647 | u32 src, dst; |
35648 | |
35649 | src = DREGu8((Opcode >> 9) & 7); |
35650 | adr = AREG((Opcode >> 0) & 7); |
35651 | AREG((Opcode >> 0) & 7) += 1; |
35652 | PRE_IO |
35653 | READ_BYTE_F(adr, dst) |
35654 | res = dst + src; |
35655 | flag_N = flag_X = flag_C = res; |
35656 | flag_V = (src ^ res) & (dst ^ res); |
35657 | flag_NotZ = res & 0xFF; |
35658 | WRITE_BYTE_F(adr, res) |
35659 | POST_IO |
35660 | RET(12) |
35661 | } |
35662 | |
35663 | // ADDDa |
35664 | OPCODE(0xD120) |
35665 | { |
35666 | u32 adr, res; |
35667 | u32 src, dst; |
35668 | |
35669 | src = DREGu8((Opcode >> 9) & 7); |
35670 | adr = AREG((Opcode >> 0) & 7) - 1; |
35671 | AREG((Opcode >> 0) & 7) = adr; |
35672 | PRE_IO |
35673 | READ_BYTE_F(adr, dst) |
35674 | res = dst + src; |
35675 | flag_N = flag_X = flag_C = res; |
35676 | flag_V = (src ^ res) & (dst ^ res); |
35677 | flag_NotZ = res & 0xFF; |
35678 | WRITE_BYTE_F(adr, res) |
35679 | POST_IO |
35680 | RET(14) |
35681 | } |
35682 | |
35683 | // ADDDa |
35684 | OPCODE(0xD128) |
35685 | { |
35686 | u32 adr, res; |
35687 | u32 src, dst; |
35688 | |
35689 | src = DREGu8((Opcode >> 9) & 7); |
35690 | FETCH_SWORD(adr); |
35691 | adr += AREG((Opcode >> 0) & 7); |
35692 | PRE_IO |
35693 | READ_BYTE_F(adr, dst) |
35694 | res = dst + src; |
35695 | flag_N = flag_X = flag_C = res; |
35696 | flag_V = (src ^ res) & (dst ^ res); |
35697 | flag_NotZ = res & 0xFF; |
35698 | WRITE_BYTE_F(adr, res) |
35699 | POST_IO |
35700 | RET(16) |
35701 | } |
35702 | |
35703 | // ADDDa |
35704 | OPCODE(0xD130) |
35705 | { |
35706 | u32 adr, res; |
35707 | u32 src, dst; |
35708 | |
35709 | src = DREGu8((Opcode >> 9) & 7); |
35710 | adr = AREG((Opcode >> 0) & 7); |
35711 | DECODE_EXT_WORD |
35712 | PRE_IO |
35713 | READ_BYTE_F(adr, dst) |
35714 | res = dst + src; |
35715 | flag_N = flag_X = flag_C = res; |
35716 | flag_V = (src ^ res) & (dst ^ res); |
35717 | flag_NotZ = res & 0xFF; |
35718 | WRITE_BYTE_F(adr, res) |
35719 | POST_IO |
35720 | RET(18) |
35721 | } |
35722 | |
35723 | // ADDDa |
35724 | OPCODE(0xD138) |
35725 | { |
35726 | u32 adr, res; |
35727 | u32 src, dst; |
35728 | |
35729 | src = DREGu8((Opcode >> 9) & 7); |
35730 | FETCH_SWORD(adr); |
35731 | PRE_IO |
35732 | READ_BYTE_F(adr, dst) |
35733 | res = dst + src; |
35734 | flag_N = flag_X = flag_C = res; |
35735 | flag_V = (src ^ res) & (dst ^ res); |
35736 | flag_NotZ = res & 0xFF; |
35737 | WRITE_BYTE_F(adr, res) |
35738 | POST_IO |
35739 | RET(16) |
35740 | } |
35741 | |
35742 | // ADDDa |
35743 | OPCODE(0xD139) |
35744 | { |
35745 | u32 adr, res; |
35746 | u32 src, dst; |
35747 | |
35748 | src = DREGu8((Opcode >> 9) & 7); |
35749 | FETCH_LONG(adr); |
35750 | PRE_IO |
35751 | READ_BYTE_F(adr, dst) |
35752 | res = dst + src; |
35753 | flag_N = flag_X = flag_C = res; |
35754 | flag_V = (src ^ res) & (dst ^ res); |
35755 | flag_NotZ = res & 0xFF; |
35756 | WRITE_BYTE_F(adr, res) |
35757 | POST_IO |
35758 | RET(20) |
35759 | } |
35760 | |
35761 | // ADDDa |
35762 | OPCODE(0xD11F) |
35763 | { |
35764 | u32 adr, res; |
35765 | u32 src, dst; |
35766 | |
35767 | src = DREGu8((Opcode >> 9) & 7); |
35768 | adr = AREG(7); |
35769 | AREG(7) += 2; |
35770 | PRE_IO |
35771 | READ_BYTE_F(adr, dst) |
35772 | res = dst + src; |
35773 | flag_N = flag_X = flag_C = res; |
35774 | flag_V = (src ^ res) & (dst ^ res); |
35775 | flag_NotZ = res & 0xFF; |
35776 | WRITE_BYTE_F(adr, res) |
35777 | POST_IO |
35778 | RET(12) |
35779 | } |
35780 | |
35781 | // ADDDa |
35782 | OPCODE(0xD127) |
35783 | { |
35784 | u32 adr, res; |
35785 | u32 src, dst; |
35786 | |
35787 | src = DREGu8((Opcode >> 9) & 7); |
35788 | adr = AREG(7) - 2; |
35789 | AREG(7) = adr; |
35790 | PRE_IO |
35791 | READ_BYTE_F(adr, dst) |
35792 | res = dst + src; |
35793 | flag_N = flag_X = flag_C = res; |
35794 | flag_V = (src ^ res) & (dst ^ res); |
35795 | flag_NotZ = res & 0xFF; |
35796 | WRITE_BYTE_F(adr, res) |
35797 | POST_IO |
35798 | RET(14) |
35799 | } |
35800 | |
35801 | // ADDDa |
35802 | OPCODE(0xD150) |
35803 | { |
35804 | u32 adr, res; |
35805 | u32 src, dst; |
35806 | |
35807 | src = DREGu16((Opcode >> 9) & 7); |
35808 | adr = AREG((Opcode >> 0) & 7); |
35809 | PRE_IO |
35810 | READ_WORD_F(adr, dst) |
35811 | res = dst + src; |
35812 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35813 | flag_N = flag_X = flag_C = res >> 8; |
35814 | flag_NotZ = res & 0xFFFF; |
35815 | WRITE_WORD_F(adr, res) |
35816 | POST_IO |
35817 | RET(12) |
35818 | } |
35819 | |
35820 | // ADDDa |
35821 | OPCODE(0xD158) |
35822 | { |
35823 | u32 adr, res; |
35824 | u32 src, dst; |
35825 | |
35826 | src = DREGu16((Opcode >> 9) & 7); |
35827 | adr = AREG((Opcode >> 0) & 7); |
35828 | AREG((Opcode >> 0) & 7) += 2; |
35829 | PRE_IO |
35830 | READ_WORD_F(adr, dst) |
35831 | res = dst + src; |
35832 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35833 | flag_N = flag_X = flag_C = res >> 8; |
35834 | flag_NotZ = res & 0xFFFF; |
35835 | WRITE_WORD_F(adr, res) |
35836 | POST_IO |
35837 | RET(12) |
35838 | } |
35839 | |
35840 | // ADDDa |
35841 | OPCODE(0xD160) |
35842 | { |
35843 | u32 adr, res; |
35844 | u32 src, dst; |
35845 | |
35846 | src = DREGu16((Opcode >> 9) & 7); |
35847 | adr = AREG((Opcode >> 0) & 7) - 2; |
35848 | AREG((Opcode >> 0) & 7) = adr; |
35849 | PRE_IO |
35850 | READ_WORD_F(adr, dst) |
35851 | res = dst + src; |
35852 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35853 | flag_N = flag_X = flag_C = res >> 8; |
35854 | flag_NotZ = res & 0xFFFF; |
35855 | WRITE_WORD_F(adr, res) |
35856 | POST_IO |
35857 | RET(14) |
35858 | } |
35859 | |
35860 | // ADDDa |
35861 | OPCODE(0xD168) |
35862 | { |
35863 | u32 adr, res; |
35864 | u32 src, dst; |
35865 | |
35866 | src = DREGu16((Opcode >> 9) & 7); |
35867 | FETCH_SWORD(adr); |
35868 | adr += AREG((Opcode >> 0) & 7); |
35869 | PRE_IO |
35870 | READ_WORD_F(adr, dst) |
35871 | res = dst + src; |
35872 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35873 | flag_N = flag_X = flag_C = res >> 8; |
35874 | flag_NotZ = res & 0xFFFF; |
35875 | WRITE_WORD_F(adr, res) |
35876 | POST_IO |
35877 | RET(16) |
35878 | } |
35879 | |
35880 | // ADDDa |
35881 | OPCODE(0xD170) |
35882 | { |
35883 | u32 adr, res; |
35884 | u32 src, dst; |
35885 | |
35886 | src = DREGu16((Opcode >> 9) & 7); |
35887 | adr = AREG((Opcode >> 0) & 7); |
35888 | DECODE_EXT_WORD |
35889 | PRE_IO |
35890 | READ_WORD_F(adr, dst) |
35891 | res = dst + src; |
35892 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35893 | flag_N = flag_X = flag_C = res >> 8; |
35894 | flag_NotZ = res & 0xFFFF; |
35895 | WRITE_WORD_F(adr, res) |
35896 | POST_IO |
35897 | RET(18) |
35898 | } |
35899 | |
35900 | // ADDDa |
35901 | OPCODE(0xD178) |
35902 | { |
35903 | u32 adr, res; |
35904 | u32 src, dst; |
35905 | |
35906 | src = DREGu16((Opcode >> 9) & 7); |
35907 | FETCH_SWORD(adr); |
35908 | PRE_IO |
35909 | READ_WORD_F(adr, dst) |
35910 | res = dst + src; |
35911 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35912 | flag_N = flag_X = flag_C = res >> 8; |
35913 | flag_NotZ = res & 0xFFFF; |
35914 | WRITE_WORD_F(adr, res) |
35915 | POST_IO |
35916 | RET(16) |
35917 | } |
35918 | |
35919 | // ADDDa |
35920 | OPCODE(0xD179) |
35921 | { |
35922 | u32 adr, res; |
35923 | u32 src, dst; |
35924 | |
35925 | src = DREGu16((Opcode >> 9) & 7); |
35926 | FETCH_LONG(adr); |
35927 | PRE_IO |
35928 | READ_WORD_F(adr, dst) |
35929 | res = dst + src; |
35930 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35931 | flag_N = flag_X = flag_C = res >> 8; |
35932 | flag_NotZ = res & 0xFFFF; |
35933 | WRITE_WORD_F(adr, res) |
35934 | POST_IO |
35935 | RET(20) |
35936 | } |
35937 | |
35938 | // ADDDa |
35939 | OPCODE(0xD15F) |
35940 | { |
35941 | u32 adr, res; |
35942 | u32 src, dst; |
35943 | |
35944 | src = DREGu16((Opcode >> 9) & 7); |
35945 | adr = AREG(7); |
35946 | AREG(7) += 2; |
35947 | PRE_IO |
35948 | READ_WORD_F(adr, dst) |
35949 | res = dst + src; |
35950 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35951 | flag_N = flag_X = flag_C = res >> 8; |
35952 | flag_NotZ = res & 0xFFFF; |
35953 | WRITE_WORD_F(adr, res) |
35954 | POST_IO |
35955 | RET(12) |
35956 | } |
35957 | |
35958 | // ADDDa |
35959 | OPCODE(0xD167) |
35960 | { |
35961 | u32 adr, res; |
35962 | u32 src, dst; |
35963 | |
35964 | src = DREGu16((Opcode >> 9) & 7); |
35965 | adr = AREG(7) - 2; |
35966 | AREG(7) = adr; |
35967 | PRE_IO |
35968 | READ_WORD_F(adr, dst) |
35969 | res = dst + src; |
35970 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35971 | flag_N = flag_X = flag_C = res >> 8; |
35972 | flag_NotZ = res & 0xFFFF; |
35973 | WRITE_WORD_F(adr, res) |
35974 | POST_IO |
35975 | RET(14) |
35976 | } |
35977 | |
35978 | // ADDDa |
35979 | OPCODE(0xD190) |
35980 | { |
35981 | u32 adr, res; |
35982 | u32 src, dst; |
35983 | |
35984 | src = DREGu32((Opcode >> 9) & 7); |
35985 | adr = AREG((Opcode >> 0) & 7); |
35986 | PRE_IO |
35987 | READ_LONG_F(adr, dst) |
35988 | res = dst + src; |
35989 | flag_NotZ = res; |
35990 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35991 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35992 | flag_N = res >> 24; |
35993 | WRITE_LONG_F(adr, res) |
35994 | POST_IO |
35995 | RET(20) |
35996 | } |
35997 | |
35998 | // ADDDa |
35999 | OPCODE(0xD198) |
36000 | { |
36001 | u32 adr, res; |
36002 | u32 src, dst; |
36003 | |
36004 | src = DREGu32((Opcode >> 9) & 7); |
36005 | adr = AREG((Opcode >> 0) & 7); |
36006 | AREG((Opcode >> 0) & 7) += 4; |
36007 | PRE_IO |
36008 | READ_LONG_F(adr, dst) |
36009 | res = dst + src; |
36010 | flag_NotZ = res; |
36011 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36012 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36013 | flag_N = res >> 24; |
36014 | WRITE_LONG_F(adr, res) |
36015 | POST_IO |
36016 | RET(20) |
36017 | } |
36018 | |
36019 | // ADDDa |
36020 | OPCODE(0xD1A0) |
36021 | { |
36022 | u32 adr, res; |
36023 | u32 src, dst; |
36024 | |
36025 | src = DREGu32((Opcode >> 9) & 7); |
36026 | adr = AREG((Opcode >> 0) & 7) - 4; |
36027 | AREG((Opcode >> 0) & 7) = adr; |
36028 | PRE_IO |
36029 | READ_LONG_F(adr, dst) |
36030 | res = dst + src; |
36031 | flag_NotZ = res; |
36032 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36033 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36034 | flag_N = res >> 24; |
36035 | WRITE_LONG_F(adr, res) |
36036 | POST_IO |
36037 | RET(22) |
36038 | } |
36039 | |
36040 | // ADDDa |
36041 | OPCODE(0xD1A8) |
36042 | { |
36043 | u32 adr, res; |
36044 | u32 src, dst; |
36045 | |
36046 | src = DREGu32((Opcode >> 9) & 7); |
36047 | FETCH_SWORD(adr); |
36048 | adr += AREG((Opcode >> 0) & 7); |
36049 | PRE_IO |
36050 | READ_LONG_F(adr, dst) |
36051 | res = dst + src; |
36052 | flag_NotZ = res; |
36053 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36054 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36055 | flag_N = res >> 24; |
36056 | WRITE_LONG_F(adr, res) |
36057 | POST_IO |
36058 | RET(24) |
36059 | } |
36060 | |
36061 | // ADDDa |
36062 | OPCODE(0xD1B0) |
36063 | { |
36064 | u32 adr, res; |
36065 | u32 src, dst; |
36066 | |
36067 | src = DREGu32((Opcode >> 9) & 7); |
36068 | adr = AREG((Opcode >> 0) & 7); |
36069 | DECODE_EXT_WORD |
36070 | PRE_IO |
36071 | READ_LONG_F(adr, dst) |
36072 | res = dst + src; |
36073 | flag_NotZ = res; |
36074 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36075 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36076 | flag_N = res >> 24; |
36077 | WRITE_LONG_F(adr, res) |
36078 | POST_IO |
36079 | RET(26) |
36080 | } |
36081 | |
36082 | // ADDDa |
36083 | OPCODE(0xD1B8) |
36084 | { |
36085 | u32 adr, res; |
36086 | u32 src, dst; |
36087 | |
36088 | src = DREGu32((Opcode >> 9) & 7); |
36089 | FETCH_SWORD(adr); |
36090 | PRE_IO |
36091 | READ_LONG_F(adr, dst) |
36092 | res = dst + src; |
36093 | flag_NotZ = res; |
36094 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36095 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36096 | flag_N = res >> 24; |
36097 | WRITE_LONG_F(adr, res) |
36098 | POST_IO |
36099 | RET(24) |
36100 | } |
36101 | |
36102 | // ADDDa |
36103 | OPCODE(0xD1B9) |
36104 | { |
36105 | u32 adr, res; |
36106 | u32 src, dst; |
36107 | |
36108 | src = DREGu32((Opcode >> 9) & 7); |
36109 | FETCH_LONG(adr); |
36110 | PRE_IO |
36111 | READ_LONG_F(adr, dst) |
36112 | res = dst + src; |
36113 | flag_NotZ = res; |
36114 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36115 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36116 | flag_N = res >> 24; |
36117 | WRITE_LONG_F(adr, res) |
36118 | POST_IO |
36119 | RET(28) |
36120 | } |
36121 | |
36122 | // ADDDa |
36123 | OPCODE(0xD19F) |
36124 | { |
36125 | u32 adr, res; |
36126 | u32 src, dst; |
36127 | |
36128 | src = DREGu32((Opcode >> 9) & 7); |
36129 | adr = AREG(7); |
36130 | AREG(7) += 4; |
36131 | PRE_IO |
36132 | READ_LONG_F(adr, dst) |
36133 | res = dst + src; |
36134 | flag_NotZ = res; |
36135 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36136 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36137 | flag_N = res >> 24; |
36138 | WRITE_LONG_F(adr, res) |
36139 | POST_IO |
36140 | RET(20) |
36141 | } |
36142 | |
36143 | // ADDDa |
36144 | OPCODE(0xD1A7) |
36145 | { |
36146 | u32 adr, res; |
36147 | u32 src, dst; |
36148 | |
36149 | src = DREGu32((Opcode >> 9) & 7); |
36150 | adr = AREG(7) - 4; |
36151 | AREG(7) = adr; |
36152 | PRE_IO |
36153 | READ_LONG_F(adr, dst) |
36154 | res = dst + src; |
36155 | flag_NotZ = res; |
36156 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36157 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36158 | flag_N = res >> 24; |
36159 | WRITE_LONG_F(adr, res) |
36160 | POST_IO |
36161 | RET(22) |
36162 | } |
36163 | |
36164 | // ADDX |
36165 | OPCODE(0xD100) |
36166 | { |
36167 | u32 adr, res; |
36168 | u32 src, dst; |
36169 | |
36170 | src = DREGu8((Opcode >> 0) & 7); |
36171 | dst = DREGu8((Opcode >> 9) & 7); |
36172 | res = dst + src + ((flag_X >> 8) & 1); |
36173 | flag_N = flag_X = flag_C = res; |
36174 | flag_V = (src ^ res) & (dst ^ res); |
36175 | flag_NotZ |= res & 0xFF; |
36176 | DREGu8((Opcode >> 9) & 7) = res; |
36177 | RET(4) |
36178 | } |
36179 | |
36180 | // ADDX |
36181 | OPCODE(0xD140) |
36182 | { |
36183 | u32 adr, res; |
36184 | u32 src, dst; |
36185 | |
36186 | src = DREGu16((Opcode >> 0) & 7); |
36187 | dst = DREGu16((Opcode >> 9) & 7); |
36188 | res = dst + src + ((flag_X >> 8) & 1); |
36189 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36190 | flag_N = flag_X = flag_C = res >> 8; |
36191 | flag_NotZ |= res & 0xFFFF; |
36192 | DREGu16((Opcode >> 9) & 7) = res; |
36193 | RET(4) |
36194 | } |
36195 | |
36196 | // ADDX |
36197 | OPCODE(0xD180) |
36198 | { |
36199 | u32 adr, res; |
36200 | u32 src, dst; |
36201 | |
36202 | src = DREGu32((Opcode >> 0) & 7); |
36203 | dst = DREGu32((Opcode >> 9) & 7); |
36204 | res = dst + src + ((flag_X >> 8) & 1); |
36205 | flag_NotZ |= res; |
36206 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36207 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36208 | flag_N = res >> 24; |
36209 | DREGu32((Opcode >> 9) & 7) = res; |
36210 | RET(8) |
36211 | } |
36212 | |
36213 | // ADDXM |
36214 | OPCODE(0xD108) |
36215 | { |
36216 | u32 adr, res; |
36217 | u32 src, dst; |
36218 | |
36219 | adr = AREG((Opcode >> 0) & 7) - 1; |
36220 | AREG((Opcode >> 0) & 7) = adr; |
36221 | PRE_IO |
36222 | READ_BYTE_F(adr, src) |
36223 | adr = AREG((Opcode >> 9) & 7) - 1; |
36224 | AREG((Opcode >> 9) & 7) = adr; |
36225 | READ_BYTE_F(adr, dst) |
36226 | res = dst + src + ((flag_X >> 8) & 1); |
36227 | flag_N = flag_X = flag_C = res; |
36228 | flag_V = (src ^ res) & (dst ^ res); |
36229 | flag_NotZ |= res & 0xFF; |
36230 | WRITE_BYTE_F(adr, res) |
36231 | POST_IO |
36232 | RET(18) |
36233 | } |
36234 | |
36235 | // ADDXM |
36236 | OPCODE(0xD148) |
36237 | { |
36238 | u32 adr, res; |
36239 | u32 src, dst; |
36240 | |
36241 | adr = AREG((Opcode >> 0) & 7) - 2; |
36242 | AREG((Opcode >> 0) & 7) = adr; |
36243 | PRE_IO |
36244 | READ_WORD_F(adr, src) |
36245 | adr = AREG((Opcode >> 9) & 7) - 2; |
36246 | AREG((Opcode >> 9) & 7) = adr; |
36247 | READ_WORD_F(adr, dst) |
36248 | res = dst + src + ((flag_X >> 8) & 1); |
36249 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36250 | flag_N = flag_X = flag_C = res >> 8; |
36251 | flag_NotZ |= res & 0xFFFF; |
36252 | WRITE_WORD_F(adr, res) |
36253 | POST_IO |
36254 | RET(18) |
36255 | } |
36256 | |
36257 | // ADDXM |
36258 | OPCODE(0xD188) |
36259 | { |
36260 | u32 adr, res; |
36261 | u32 src, dst; |
36262 | |
36263 | adr = AREG((Opcode >> 0) & 7) - 4; |
36264 | AREG((Opcode >> 0) & 7) = adr; |
36265 | PRE_IO |
36266 | READ_LONG_F(adr, src) |
36267 | adr = AREG((Opcode >> 9) & 7) - 4; |
36268 | AREG((Opcode >> 9) & 7) = adr; |
36269 | READ_LONG_F(adr, dst) |
36270 | res = dst + src + ((flag_X >> 8) & 1); |
36271 | flag_NotZ |= res; |
36272 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36273 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36274 | flag_N = res >> 24; |
36275 | WRITE_LONG_F(adr, res) |
36276 | POST_IO |
36277 | RET(30) |
36278 | } |
36279 | |
36280 | // ADDX7M |
36281 | OPCODE(0xD10F) |
36282 | { |
36283 | u32 adr, res; |
36284 | u32 src, dst; |
36285 | |
36286 | adr = AREG(7) - 2; |
36287 | AREG(7) = adr; |
36288 | PRE_IO |
36289 | READ_BYTE_F(adr, src) |
36290 | adr = AREG((Opcode >> 9) & 7) - 1; |
36291 | AREG((Opcode >> 9) & 7) = adr; |
36292 | READ_BYTE_F(adr, dst) |
36293 | res = dst + src + ((flag_X >> 8) & 1); |
36294 | flag_N = flag_X = flag_C = res; |
36295 | flag_V = (src ^ res) & (dst ^ res); |
36296 | flag_NotZ |= res & 0xFF; |
36297 | WRITE_BYTE_F(adr, res) |
36298 | POST_IO |
36299 | RET(18) |
36300 | } |
36301 | |
36302 | // ADDX7M |
36303 | OPCODE(0xD14F) |
36304 | { |
36305 | u32 adr, res; |
36306 | u32 src, dst; |
36307 | |
36308 | adr = AREG(7) - 2; |
36309 | AREG(7) = adr; |
36310 | PRE_IO |
36311 | READ_WORD_F(adr, src) |
36312 | adr = AREG((Opcode >> 9) & 7) - 2; |
36313 | AREG((Opcode >> 9) & 7) = adr; |
36314 | READ_WORD_F(adr, dst) |
36315 | res = dst + src + ((flag_X >> 8) & 1); |
36316 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36317 | flag_N = flag_X = flag_C = res >> 8; |
36318 | flag_NotZ |= res & 0xFFFF; |
36319 | WRITE_WORD_F(adr, res) |
36320 | POST_IO |
36321 | RET(18) |
36322 | } |
36323 | |
36324 | // ADDX7M |
36325 | OPCODE(0xD18F) |
36326 | { |
36327 | u32 adr, res; |
36328 | u32 src, dst; |
36329 | |
36330 | adr = AREG(7) - 4; |
36331 | AREG(7) = adr; |
36332 | PRE_IO |
36333 | READ_LONG_F(adr, src) |
36334 | adr = AREG((Opcode >> 9) & 7) - 4; |
36335 | AREG((Opcode >> 9) & 7) = adr; |
36336 | READ_LONG_F(adr, dst) |
36337 | res = dst + src + ((flag_X >> 8) & 1); |
36338 | flag_NotZ |= res; |
36339 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36340 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36341 | flag_N = res >> 24; |
36342 | WRITE_LONG_F(adr, res) |
36343 | POST_IO |
36344 | RET(30) |
36345 | } |
36346 | |
36347 | // ADDXM7 |
36348 | OPCODE(0xDF08) |
36349 | { |
36350 | u32 adr, res; |
36351 | u32 src, dst; |
36352 | |
36353 | adr = AREG((Opcode >> 0) & 7) - 1; |
36354 | AREG((Opcode >> 0) & 7) = adr; |
36355 | PRE_IO |
36356 | READ_BYTE_F(adr, src) |
36357 | adr = AREG(7) - 2; |
36358 | AREG(7) = adr; |
36359 | READ_BYTE_F(adr, dst) |
36360 | res = dst + src + ((flag_X >> 8) & 1); |
36361 | flag_N = flag_X = flag_C = res; |
36362 | flag_V = (src ^ res) & (dst ^ res); |
36363 | flag_NotZ |= res & 0xFF; |
36364 | WRITE_BYTE_F(adr, res) |
36365 | POST_IO |
36366 | RET(18) |
36367 | } |
36368 | |
36369 | // ADDXM7 |
36370 | OPCODE(0xDF48) |
36371 | { |
36372 | u32 adr, res; |
36373 | u32 src, dst; |
36374 | |
36375 | adr = AREG((Opcode >> 0) & 7) - 2; |
36376 | AREG((Opcode >> 0) & 7) = adr; |
36377 | PRE_IO |
36378 | READ_WORD_F(adr, src) |
36379 | adr = AREG(7) - 2; |
36380 | AREG(7) = adr; |
36381 | READ_WORD_F(adr, dst) |
36382 | res = dst + src + ((flag_X >> 8) & 1); |
36383 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36384 | flag_N = flag_X = flag_C = res >> 8; |
36385 | flag_NotZ |= res & 0xFFFF; |
36386 | WRITE_WORD_F(adr, res) |
36387 | POST_IO |
36388 | RET(18) |
36389 | } |
36390 | |
36391 | // ADDXM7 |
36392 | OPCODE(0xDF88) |
36393 | { |
36394 | u32 adr, res; |
36395 | u32 src, dst; |
36396 | |
36397 | adr = AREG((Opcode >> 0) & 7) - 4; |
36398 | AREG((Opcode >> 0) & 7) = adr; |
36399 | PRE_IO |
36400 | READ_LONG_F(adr, src) |
36401 | adr = AREG(7) - 4; |
36402 | AREG(7) = adr; |
36403 | READ_LONG_F(adr, dst) |
36404 | res = dst + src + ((flag_X >> 8) & 1); |
36405 | flag_NotZ |= res; |
36406 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36407 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36408 | flag_N = res >> 24; |
36409 | WRITE_LONG_F(adr, res) |
36410 | POST_IO |
36411 | RET(30) |
36412 | } |
36413 | |
36414 | // ADDX7M7 |
36415 | OPCODE(0xDF0F) |
36416 | { |
36417 | u32 adr, res; |
36418 | u32 src, dst; |
36419 | |
36420 | adr = AREG(7) - 2; |
36421 | AREG(7) = adr; |
36422 | PRE_IO |
36423 | READ_BYTE_F(adr, src) |
36424 | adr = AREG(7) - 2; |
36425 | AREG(7) = adr; |
36426 | READ_BYTE_F(adr, dst) |
36427 | res = dst + src + ((flag_X >> 8) & 1); |
36428 | flag_N = flag_X = flag_C = res; |
36429 | flag_V = (src ^ res) & (dst ^ res); |
36430 | flag_NotZ |= res & 0xFF; |
36431 | WRITE_BYTE_F(adr, res) |
36432 | POST_IO |
36433 | RET(18) |
36434 | } |
36435 | |
36436 | // ADDX7M7 |
36437 | OPCODE(0xDF4F) |
36438 | { |
36439 | u32 adr, res; |
36440 | u32 src, dst; |
36441 | |
36442 | adr = AREG(7) - 2; |
36443 | AREG(7) = adr; |
36444 | PRE_IO |
36445 | READ_WORD_F(adr, src) |
36446 | adr = AREG(7) - 2; |
36447 | AREG(7) = adr; |
36448 | READ_WORD_F(adr, dst) |
36449 | res = dst + src + ((flag_X >> 8) & 1); |
36450 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36451 | flag_N = flag_X = flag_C = res >> 8; |
36452 | flag_NotZ |= res & 0xFFFF; |
36453 | WRITE_WORD_F(adr, res) |
36454 | POST_IO |
36455 | RET(18) |
36456 | } |
36457 | |
36458 | // ADDX7M7 |
36459 | OPCODE(0xDF8F) |
36460 | { |
36461 | u32 adr, res; |
36462 | u32 src, dst; |
36463 | |
36464 | adr = AREG(7) - 4; |
36465 | AREG(7) = adr; |
36466 | PRE_IO |
36467 | READ_LONG_F(adr, src) |
36468 | adr = AREG(7) - 4; |
36469 | AREG(7) = adr; |
36470 | READ_LONG_F(adr, dst) |
36471 | res = dst + src + ((flag_X >> 8) & 1); |
36472 | flag_NotZ |= res; |
36473 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36474 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36475 | flag_N = res >> 24; |
36476 | WRITE_LONG_F(adr, res) |
36477 | POST_IO |
36478 | RET(30) |
36479 | } |
36480 | |
36481 | // ADDA |
36482 | OPCODE(0xD0C0) |
36483 | { |
36484 | u32 adr, res; |
36485 | u32 src, dst; |
36486 | |
36487 | src = (s32)DREGs16((Opcode >> 0) & 7); |
36488 | dst = AREGu32((Opcode >> 9) & 7); |
36489 | res = dst + src; |
36490 | AREG((Opcode >> 9) & 7) = res; |
36491 | RET(8) |
36492 | } |
36493 | |
36494 | // ADDA |
36495 | OPCODE(0xD0C8) |
36496 | { |
36497 | u32 adr, res; |
36498 | u32 src, dst; |
36499 | |
36500 | src = (s32)AREGs16((Opcode >> 0) & 7); |
36501 | dst = AREGu32((Opcode >> 9) & 7); |
36502 | res = dst + src; |
36503 | AREG((Opcode >> 9) & 7) = res; |
36504 | RET(8) |
36505 | } |
36506 | |
36507 | // ADDA |
36508 | OPCODE(0xD0D0) |
36509 | { |
36510 | u32 adr, res; |
36511 | u32 src, dst; |
36512 | |
36513 | adr = AREG((Opcode >> 0) & 7); |
36514 | PRE_IO |
36515 | READSX_WORD_F(adr, src) |
36516 | dst = AREGu32((Opcode >> 9) & 7); |
36517 | res = dst + src; |
36518 | AREG((Opcode >> 9) & 7) = res; |
36519 | POST_IO |
03e4f2a3 |
36520 | #ifdef USE_CYCLONE_TIMING |
36521 | RET(12) |
36522 | #else |
70357ce5 |
36523 | RET(10) |
03e4f2a3 |
36524 | #endif |
70357ce5 |
36525 | } |
36526 | |
36527 | // ADDA |
36528 | OPCODE(0xD0D8) |
36529 | { |
36530 | u32 adr, res; |
36531 | u32 src, dst; |
36532 | |
36533 | adr = AREG((Opcode >> 0) & 7); |
36534 | AREG((Opcode >> 0) & 7) += 2; |
36535 | PRE_IO |
36536 | READSX_WORD_F(adr, src) |
36537 | dst = AREGu32((Opcode >> 9) & 7); |
36538 | res = dst + src; |
36539 | AREG((Opcode >> 9) & 7) = res; |
36540 | POST_IO |
03e4f2a3 |
36541 | #ifdef USE_CYCLONE_TIMING |
36542 | RET(12) |
36543 | #else |
70357ce5 |
36544 | RET(10) |
03e4f2a3 |
36545 | #endif |
70357ce5 |
36546 | } |
36547 | |
36548 | // ADDA |
36549 | OPCODE(0xD0E0) |
36550 | { |
36551 | u32 adr, res; |
36552 | u32 src, dst; |
36553 | |
36554 | adr = AREG((Opcode >> 0) & 7) - 2; |
36555 | AREG((Opcode >> 0) & 7) = adr; |
36556 | PRE_IO |
36557 | READSX_WORD_F(adr, src) |
36558 | dst = AREGu32((Opcode >> 9) & 7); |
36559 | res = dst + src; |
36560 | AREG((Opcode >> 9) & 7) = res; |
36561 | POST_IO |
03e4f2a3 |
36562 | #ifdef USE_CYCLONE_TIMING |
36563 | RET(14) |
36564 | #else |
70357ce5 |
36565 | RET(12) |
03e4f2a3 |
36566 | #endif |
70357ce5 |
36567 | } |
36568 | |
36569 | // ADDA |
36570 | OPCODE(0xD0E8) |
36571 | { |
36572 | u32 adr, res; |
36573 | u32 src, dst; |
36574 | |
36575 | FETCH_SWORD(adr); |
36576 | adr += AREG((Opcode >> 0) & 7); |
36577 | PRE_IO |
36578 | READSX_WORD_F(adr, src) |
36579 | dst = AREGu32((Opcode >> 9) & 7); |
36580 | res = dst + src; |
36581 | AREG((Opcode >> 9) & 7) = res; |
36582 | POST_IO |
03e4f2a3 |
36583 | #ifdef USE_CYCLONE_TIMING |
36584 | RET(16) |
36585 | #else |
70357ce5 |
36586 | RET(14) |
03e4f2a3 |
36587 | #endif |
70357ce5 |
36588 | } |
36589 | |
36590 | // ADDA |
36591 | OPCODE(0xD0F0) |
36592 | { |
36593 | u32 adr, res; |
36594 | u32 src, dst; |
36595 | |
36596 | adr = AREG((Opcode >> 0) & 7); |
36597 | DECODE_EXT_WORD |
36598 | PRE_IO |
36599 | READSX_WORD_F(adr, src) |
36600 | dst = AREGu32((Opcode >> 9) & 7); |
36601 | res = dst + src; |
36602 | AREG((Opcode >> 9) & 7) = res; |
36603 | POST_IO |
03e4f2a3 |
36604 | #ifdef USE_CYCLONE_TIMING |
36605 | RET(18) |
36606 | #else |
70357ce5 |
36607 | RET(16) |
03e4f2a3 |
36608 | #endif |
70357ce5 |
36609 | } |
36610 | |
36611 | // ADDA |
36612 | OPCODE(0xD0F8) |
36613 | { |
36614 | u32 adr, res; |
36615 | u32 src, dst; |
36616 | |
36617 | FETCH_SWORD(adr); |
36618 | PRE_IO |
36619 | READSX_WORD_F(adr, src) |
36620 | dst = AREGu32((Opcode >> 9) & 7); |
36621 | res = dst + src; |
36622 | AREG((Opcode >> 9) & 7) = res; |
36623 | POST_IO |
03e4f2a3 |
36624 | #ifdef USE_CYCLONE_TIMING |
36625 | RET(16) |
36626 | #else |
70357ce5 |
36627 | RET(14) |
03e4f2a3 |
36628 | #endif |
70357ce5 |
36629 | } |
36630 | |
36631 | // ADDA |
36632 | OPCODE(0xD0F9) |
36633 | { |
36634 | u32 adr, res; |
36635 | u32 src, dst; |
36636 | |
36637 | FETCH_LONG(adr); |
36638 | PRE_IO |
36639 | READSX_WORD_F(adr, src) |
36640 | dst = AREGu32((Opcode >> 9) & 7); |
36641 | res = dst + src; |
36642 | AREG((Opcode >> 9) & 7) = res; |
36643 | POST_IO |
03e4f2a3 |
36644 | #ifdef USE_CYCLONE_TIMING |
36645 | RET(20) |
36646 | #else |
70357ce5 |
36647 | RET(18) |
03e4f2a3 |
36648 | #endif |
70357ce5 |
36649 | } |
36650 | |
36651 | // ADDA |
36652 | OPCODE(0xD0FA) |
36653 | { |
36654 | u32 adr, res; |
36655 | u32 src, dst; |
36656 | |
36657 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
36658 | PC++; |
36659 | PRE_IO |
36660 | READSX_WORD_F(adr, src) |
36661 | dst = AREGu32((Opcode >> 9) & 7); |
36662 | res = dst + src; |
36663 | AREG((Opcode >> 9) & 7) = res; |
36664 | POST_IO |
03e4f2a3 |
36665 | #ifdef USE_CYCLONE_TIMING |
36666 | RET(16) |
36667 | #else |
70357ce5 |
36668 | RET(14) |
03e4f2a3 |
36669 | #endif |
70357ce5 |
36670 | } |
36671 | |
36672 | // ADDA |
36673 | OPCODE(0xD0FB) |
36674 | { |
36675 | u32 adr, res; |
36676 | u32 src, dst; |
36677 | |
36678 | adr = (u32)(PC) - BasePC; |
36679 | DECODE_EXT_WORD |
36680 | PRE_IO |
36681 | READSX_WORD_F(adr, src) |
36682 | dst = AREGu32((Opcode >> 9) & 7); |
36683 | res = dst + src; |
36684 | AREG((Opcode >> 9) & 7) = res; |
36685 | POST_IO |
03e4f2a3 |
36686 | #ifdef USE_CYCLONE_TIMING |
36687 | RET(18) |
36688 | #else |
70357ce5 |
36689 | RET(16) |
03e4f2a3 |
36690 | #endif |
70357ce5 |
36691 | } |
36692 | |
36693 | // ADDA |
36694 | OPCODE(0xD0FC) |
36695 | { |
36696 | u32 adr, res; |
36697 | u32 src, dst; |
36698 | |
36699 | FETCH_SWORD(src); |
36700 | dst = AREGu32((Opcode >> 9) & 7); |
36701 | res = dst + src; |
36702 | AREG((Opcode >> 9) & 7) = res; |
36703 | RET(12) |
36704 | } |
36705 | |
36706 | // ADDA |
36707 | OPCODE(0xD0DF) |
36708 | { |
36709 | u32 adr, res; |
36710 | u32 src, dst; |
36711 | |
36712 | adr = AREG(7); |
36713 | AREG(7) += 2; |
36714 | PRE_IO |
36715 | READSX_WORD_F(adr, src) |
36716 | dst = AREGu32((Opcode >> 9) & 7); |
36717 | res = dst + src; |
36718 | AREG((Opcode >> 9) & 7) = res; |
36719 | POST_IO |
03e4f2a3 |
36720 | #ifdef USE_CYCLONE_TIMING |
36721 | RET(12) |
36722 | #else |
70357ce5 |
36723 | RET(10) |
03e4f2a3 |
36724 | #endif |
70357ce5 |
36725 | } |
36726 | |
36727 | // ADDA |
36728 | OPCODE(0xD0E7) |
36729 | { |
36730 | u32 adr, res; |
36731 | u32 src, dst; |
36732 | |
36733 | adr = AREG(7) - 2; |
36734 | AREG(7) = adr; |
36735 | PRE_IO |
36736 | READSX_WORD_F(adr, src) |
36737 | dst = AREGu32((Opcode >> 9) & 7); |
36738 | res = dst + src; |
36739 | AREG((Opcode >> 9) & 7) = res; |
36740 | POST_IO |
03e4f2a3 |
36741 | #ifdef USE_CYCLONE_TIMING |
36742 | RET(14) |
36743 | #else |
70357ce5 |
36744 | RET(12) |
03e4f2a3 |
36745 | #endif |
70357ce5 |
36746 | } |
36747 | |
36748 | // ADDA |
36749 | OPCODE(0xD1C0) |
36750 | { |
36751 | u32 adr, res; |
36752 | u32 src, dst; |
36753 | |
36754 | src = (s32)DREGs32((Opcode >> 0) & 7); |
36755 | dst = AREGu32((Opcode >> 9) & 7); |
36756 | res = dst + src; |
36757 | AREG((Opcode >> 9) & 7) = res; |
36758 | #ifdef USE_CYCLONE_TIMING |
36759 | RET(8) |
36760 | #else |
36761 | RET(6) |
36762 | #endif |
36763 | } |
36764 | |
36765 | // ADDA |
36766 | OPCODE(0xD1C8) |
36767 | { |
36768 | u32 adr, res; |
36769 | u32 src, dst; |
36770 | |
36771 | src = (s32)AREGs32((Opcode >> 0) & 7); |
36772 | dst = AREGu32((Opcode >> 9) & 7); |
36773 | res = dst + src; |
36774 | AREG((Opcode >> 9) & 7) = res; |
36775 | #ifdef USE_CYCLONE_TIMING |
36776 | RET(8) |
36777 | #else |
36778 | RET(6) |
36779 | #endif |
36780 | } |
36781 | |
36782 | // ADDA |
36783 | OPCODE(0xD1D0) |
36784 | { |
36785 | u32 adr, res; |
36786 | u32 src, dst; |
36787 | |
36788 | adr = AREG((Opcode >> 0) & 7); |
36789 | PRE_IO |
36790 | READSX_LONG_F(adr, src) |
36791 | dst = AREGu32((Opcode >> 9) & 7); |
36792 | res = dst + src; |
36793 | AREG((Opcode >> 9) & 7) = res; |
36794 | POST_IO |
36795 | RET(14) |
36796 | } |
36797 | |
36798 | // ADDA |
36799 | OPCODE(0xD1D8) |
36800 | { |
36801 | u32 adr, res; |
36802 | u32 src, dst; |
36803 | |
36804 | adr = AREG((Opcode >> 0) & 7); |
36805 | AREG((Opcode >> 0) & 7) += 4; |
36806 | PRE_IO |
36807 | READSX_LONG_F(adr, src) |
36808 | dst = AREGu32((Opcode >> 9) & 7); |
36809 | res = dst + src; |
36810 | AREG((Opcode >> 9) & 7) = res; |
36811 | POST_IO |
36812 | RET(14) |
36813 | } |
36814 | |
36815 | // ADDA |
36816 | OPCODE(0xD1E0) |
36817 | { |
36818 | u32 adr, res; |
36819 | u32 src, dst; |
36820 | |
36821 | adr = AREG((Opcode >> 0) & 7) - 4; |
36822 | AREG((Opcode >> 0) & 7) = adr; |
36823 | PRE_IO |
36824 | READSX_LONG_F(adr, src) |
36825 | dst = AREGu32((Opcode >> 9) & 7); |
36826 | res = dst + src; |
36827 | AREG((Opcode >> 9) & 7) = res; |
36828 | POST_IO |
36829 | RET(16) |
36830 | } |
36831 | |
36832 | // ADDA |
36833 | OPCODE(0xD1E8) |
36834 | { |
36835 | u32 adr, res; |
36836 | u32 src, dst; |
36837 | |
36838 | FETCH_SWORD(adr); |
36839 | adr += AREG((Opcode >> 0) & 7); |
36840 | PRE_IO |
36841 | READSX_LONG_F(adr, src) |
36842 | dst = AREGu32((Opcode >> 9) & 7); |
36843 | res = dst + src; |
36844 | AREG((Opcode >> 9) & 7) = res; |
36845 | POST_IO |
36846 | RET(18) |
36847 | } |
36848 | |
36849 | // ADDA |
36850 | OPCODE(0xD1F0) |
36851 | { |
36852 | u32 adr, res; |
36853 | u32 src, dst; |
36854 | |
36855 | adr = AREG((Opcode >> 0) & 7); |
36856 | DECODE_EXT_WORD |
36857 | PRE_IO |
36858 | READSX_LONG_F(adr, src) |
36859 | dst = AREGu32((Opcode >> 9) & 7); |
36860 | res = dst + src; |
36861 | AREG((Opcode >> 9) & 7) = res; |
36862 | POST_IO |
36863 | RET(20) |
36864 | } |
36865 | |
36866 | // ADDA |
36867 | OPCODE(0xD1F8) |
36868 | { |
36869 | u32 adr, res; |
36870 | u32 src, dst; |
36871 | |
36872 | FETCH_SWORD(adr); |
36873 | PRE_IO |
36874 | READSX_LONG_F(adr, src) |
36875 | dst = AREGu32((Opcode >> 9) & 7); |
36876 | res = dst + src; |
36877 | AREG((Opcode >> 9) & 7) = res; |
36878 | POST_IO |
36879 | RET(18) |
36880 | } |
36881 | |
36882 | // ADDA |
36883 | OPCODE(0xD1F9) |
36884 | { |
36885 | u32 adr, res; |
36886 | u32 src, dst; |
36887 | |
36888 | FETCH_LONG(adr); |
36889 | PRE_IO |
36890 | READSX_LONG_F(adr, src) |
36891 | dst = AREGu32((Opcode >> 9) & 7); |
36892 | res = dst + src; |
36893 | AREG((Opcode >> 9) & 7) = res; |
36894 | POST_IO |
36895 | RET(22) |
36896 | } |
36897 | |
36898 | // ADDA |
36899 | OPCODE(0xD1FA) |
36900 | { |
36901 | u32 adr, res; |
36902 | u32 src, dst; |
36903 | |
36904 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
36905 | PC++; |
36906 | PRE_IO |
36907 | READSX_LONG_F(adr, src) |
36908 | dst = AREGu32((Opcode >> 9) & 7); |
36909 | res = dst + src; |
36910 | AREG((Opcode >> 9) & 7) = res; |
36911 | POST_IO |
36912 | RET(18) |
36913 | } |
36914 | |
36915 | // ADDA |
36916 | OPCODE(0xD1FB) |
36917 | { |
36918 | u32 adr, res; |
36919 | u32 src, dst; |
36920 | |
36921 | adr = (u32)(PC) - BasePC; |
36922 | DECODE_EXT_WORD |
36923 | PRE_IO |
36924 | READSX_LONG_F(adr, src) |
36925 | dst = AREGu32((Opcode >> 9) & 7); |
36926 | res = dst + src; |
36927 | AREG((Opcode >> 9) & 7) = res; |
36928 | POST_IO |
36929 | RET(20) |
36930 | } |
36931 | |
36932 | // ADDA |
36933 | OPCODE(0xD1FC) |
36934 | { |
36935 | u32 adr, res; |
36936 | u32 src, dst; |
36937 | |
36938 | FETCH_LONG(src); |
36939 | dst = AREGu32((Opcode >> 9) & 7); |
36940 | res = dst + src; |
36941 | AREG((Opcode >> 9) & 7) = res; |
36942 | #ifdef USE_CYCLONE_TIMING |
36943 | RET(16) |
36944 | #else |
36945 | RET(14) |
36946 | #endif |
36947 | } |
36948 | |
36949 | // ADDA |
36950 | OPCODE(0xD1DF) |
36951 | { |
36952 | u32 adr, res; |
36953 | u32 src, dst; |
36954 | |
36955 | adr = AREG(7); |
36956 | AREG(7) += 4; |
36957 | PRE_IO |
36958 | READSX_LONG_F(adr, src) |
36959 | dst = AREGu32((Opcode >> 9) & 7); |
36960 | res = dst + src; |
36961 | AREG((Opcode >> 9) & 7) = res; |
36962 | POST_IO |
36963 | RET(14) |
36964 | } |
36965 | |
36966 | // ADDA |
36967 | OPCODE(0xD1E7) |
36968 | { |
36969 | u32 adr, res; |
36970 | u32 src, dst; |
36971 | |
36972 | adr = AREG(7) - 4; |
36973 | AREG(7) = adr; |
36974 | PRE_IO |
36975 | READSX_LONG_F(adr, src) |
36976 | dst = AREGu32((Opcode >> 9) & 7); |
36977 | res = dst + src; |
36978 | AREG((Opcode >> 9) & 7) = res; |
36979 | POST_IO |
36980 | RET(16) |
36981 | } |
36982 | |
36983 | // ASRk |
36984 | OPCODE(0xE000) |
36985 | { |
36986 | u32 adr, res; |
36987 | u32 src, dst; |
36988 | |
36989 | u32 sft; |
36990 | |
36991 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36992 | m68kcontext.io_cycle_counter -= sft * 2; |
36993 | src = (s32)DREGs8((Opcode >> 0) & 7); |
36994 | flag_V = 0; |
36995 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36996 | res = ((s32)src) >> sft; |
36997 | flag_N = res >> 0; |
36998 | flag_NotZ = res; |
36999 | DREGu8((Opcode >> 0) & 7) = res; |
37000 | RET(6) |
37001 | } |
37002 | |
37003 | // ASRk |
37004 | OPCODE(0xE040) |
37005 | { |
37006 | u32 adr, res; |
37007 | u32 src, dst; |
37008 | |
37009 | u32 sft; |
37010 | |
37011 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37012 | m68kcontext.io_cycle_counter -= sft * 2; |
37013 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37014 | flag_V = 0; |
37015 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37016 | res = ((s32)src) >> sft; |
37017 | flag_N = res >> 8; |
37018 | flag_NotZ = res; |
37019 | DREGu16((Opcode >> 0) & 7) = res; |
37020 | RET(6) |
37021 | } |
37022 | |
37023 | // ASRk |
37024 | OPCODE(0xE080) |
37025 | { |
37026 | u32 adr, res; |
37027 | u32 src, dst; |
37028 | |
37029 | u32 sft; |
37030 | |
37031 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37032 | m68kcontext.io_cycle_counter -= sft * 2; |
37033 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37034 | flag_V = 0; |
37035 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37036 | res = ((s32)src) >> sft; |
37037 | flag_N = res >> 24; |
37038 | flag_NotZ = res; |
37039 | DREGu32((Opcode >> 0) & 7) = res; |
37040 | RET(8) |
37041 | } |
37042 | |
37043 | // LSRk |
37044 | OPCODE(0xE008) |
37045 | { |
37046 | u32 adr, res; |
37047 | u32 src, dst; |
37048 | |
37049 | u32 sft; |
37050 | |
37051 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37052 | m68kcontext.io_cycle_counter -= sft * 2; |
37053 | src = DREGu8((Opcode >> 0) & 7); |
37054 | flag_N = flag_V = 0; |
37055 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37056 | res = src >> sft; |
37057 | flag_NotZ = res; |
37058 | DREGu8((Opcode >> 0) & 7) = res; |
37059 | RET(6) |
37060 | } |
37061 | |
37062 | // LSRk |
37063 | OPCODE(0xE048) |
37064 | { |
37065 | u32 adr, res; |
37066 | u32 src, dst; |
37067 | |
37068 | u32 sft; |
37069 | |
37070 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37071 | m68kcontext.io_cycle_counter -= sft * 2; |
37072 | src = DREGu16((Opcode >> 0) & 7); |
37073 | flag_N = flag_V = 0; |
37074 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37075 | res = src >> sft; |
37076 | flag_NotZ = res; |
37077 | DREGu16((Opcode >> 0) & 7) = res; |
37078 | RET(6) |
37079 | } |
37080 | |
37081 | // LSRk |
37082 | OPCODE(0xE088) |
37083 | { |
37084 | u32 adr, res; |
37085 | u32 src, dst; |
37086 | |
37087 | u32 sft; |
37088 | |
37089 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37090 | m68kcontext.io_cycle_counter -= sft * 2; |
37091 | src = DREGu32((Opcode >> 0) & 7); |
37092 | flag_N = flag_V = 0; |
37093 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37094 | res = src >> sft; |
37095 | flag_NotZ = res; |
37096 | DREGu32((Opcode >> 0) & 7) = res; |
37097 | RET(8) |
37098 | } |
37099 | |
37100 | // ROXRk |
37101 | OPCODE(0xE010) |
37102 | { |
37103 | u32 adr, res; |
37104 | u32 src, dst; |
37105 | |
37106 | u32 sft; |
37107 | |
37108 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37109 | m68kcontext.io_cycle_counter -= sft * 2; |
37110 | src = DREGu8((Opcode >> 0) & 7); |
37111 | src |= (flag_X & M68K_SR_X) << 0; |
37112 | res = (src >> sft) | (src << (9 - sft)); |
37113 | flag_X = flag_C = res >> 0; |
37114 | flag_V = 0; |
37115 | flag_N = res >> 0; |
37116 | flag_NotZ = res & 0x000000FF; |
37117 | DREGu8((Opcode >> 0) & 7) = res; |
37118 | RET(6) |
37119 | } |
37120 | |
37121 | // ROXRk |
37122 | OPCODE(0xE050) |
37123 | { |
37124 | u32 adr, res; |
37125 | u32 src, dst; |
37126 | |
37127 | u32 sft; |
37128 | |
37129 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37130 | m68kcontext.io_cycle_counter -= sft * 2; |
37131 | src = DREGu16((Opcode >> 0) & 7); |
37132 | src |= (flag_X & M68K_SR_X) << 8; |
37133 | res = (src >> sft) | (src << (17 - sft)); |
37134 | flag_X = flag_C = res >> 8; |
37135 | flag_V = 0; |
37136 | flag_N = res >> 8; |
37137 | flag_NotZ = res & 0x0000FFFF; |
37138 | DREGu16((Opcode >> 0) & 7) = res; |
37139 | RET(6) |
37140 | } |
37141 | |
37142 | // ROXRk |
37143 | OPCODE(0xE090) |
37144 | { |
37145 | u32 adr, res; |
37146 | u32 src, dst; |
37147 | |
37148 | u32 sft; |
37149 | |
37150 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37151 | m68kcontext.io_cycle_counter -= sft * 2; |
37152 | src = DREGu32((Opcode >> 0) & 7); |
37153 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37154 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37155 | else res = (src >> sft) | (src << (33 - sft)) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + sft))); |
37156 | flag_X = flag_C; |
37157 | flag_V = 0; |
37158 | flag_N = res >> 24; |
37159 | flag_NotZ = res; |
37160 | DREGu32((Opcode >> 0) & 7) = res; |
37161 | RET(8) |
37162 | } |
37163 | |
37164 | // RORk |
37165 | OPCODE(0xE018) |
37166 | { |
37167 | u32 adr, res; |
37168 | u32 src, dst; |
37169 | |
37170 | u32 sft; |
37171 | |
37172 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37173 | m68kcontext.io_cycle_counter -= sft * 2; |
37174 | src = DREGu8((Opcode >> 0) & 7); |
37175 | flag_V = 0; |
37176 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37177 | res = (src >> sft) | (src << (8 - sft)); |
37178 | flag_N = res >> 0; |
37179 | flag_NotZ = res & 0x000000FF; |
37180 | DREGu8((Opcode >> 0) & 7) = res; |
37181 | RET(6) |
37182 | } |
37183 | |
37184 | // RORk |
37185 | OPCODE(0xE058) |
37186 | { |
37187 | u32 adr, res; |
37188 | u32 src, dst; |
37189 | |
37190 | u32 sft; |
37191 | |
37192 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37193 | m68kcontext.io_cycle_counter -= sft * 2; |
37194 | src = DREGu16((Opcode >> 0) & 7); |
37195 | flag_V = 0; |
37196 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37197 | res = (src >> sft) | (src << (16 - sft)); |
37198 | flag_N = res >> 8; |
37199 | flag_NotZ = res & 0x0000FFFF; |
37200 | DREGu16((Opcode >> 0) & 7) = res; |
37201 | RET(6) |
37202 | } |
37203 | |
37204 | // RORk |
37205 | OPCODE(0xE098) |
37206 | { |
37207 | u32 adr, res; |
37208 | u32 src, dst; |
37209 | |
37210 | u32 sft; |
37211 | |
37212 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37213 | m68kcontext.io_cycle_counter -= sft * 2; |
37214 | src = DREGu32((Opcode >> 0) & 7); |
37215 | flag_V = 0; |
37216 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37217 | res = (src >> sft) | (src << (32 - sft)); |
37218 | flag_N = res >> 24; |
37219 | flag_NotZ = res; |
37220 | DREGu32((Opcode >> 0) & 7) = res; |
37221 | RET(8) |
37222 | } |
37223 | |
37224 | // ASLk |
37225 | OPCODE(0xE100) |
37226 | { |
37227 | u32 adr, res; |
37228 | u32 src, dst; |
37229 | |
37230 | u32 sft; |
37231 | |
37232 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37233 | m68kcontext.io_cycle_counter -= sft * 2; |
37234 | src = DREGu8((Opcode >> 0) & 7); |
37235 | if (sft < 8) |
37236 | { |
37237 | flag_X = flag_C = src << (0 + sft); |
37238 | res = src << sft; |
37239 | flag_N = res >> 0; |
37240 | flag_NotZ = res & 0x000000FF; |
37241 | DREGu8((Opcode >> 0) & 7) = res; |
37242 | flag_V = 0; |
37243 | if ((sft > 7) && (src)) flag_V = M68K_SR_V; |
37244 | else |
37245 | { |
37246 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
37247 | src &= msk; |
37248 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37249 | } |
37250 | RET(6) |
37251 | } |
37252 | |
37253 | if (src) flag_V = M68K_SR_V; |
37254 | else flag_V = 0; |
37255 | flag_X = flag_C = src << M68K_SR_C_SFT; |
37256 | res = 0; |
37257 | DREGu8((Opcode >> 0) & 7) = res; |
37258 | flag_N = 0; |
37259 | flag_NotZ = 0; |
37260 | RET(6) |
37261 | } |
37262 | |
37263 | // ASLk |
37264 | OPCODE(0xE140) |
37265 | { |
37266 | u32 adr, res; |
37267 | u32 src, dst; |
37268 | |
37269 | u32 sft; |
37270 | |
37271 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37272 | m68kcontext.io_cycle_counter -= sft * 2; |
37273 | src = DREGu16((Opcode >> 0) & 7); |
37274 | flag_X = flag_C = src >> (8 - sft); |
37275 | res = src << sft; |
37276 | flag_N = res >> 8; |
37277 | flag_NotZ = res & 0x0000FFFF; |
37278 | DREGu16((Opcode >> 0) & 7) = res; |
37279 | flag_V = 0; |
37280 | { |
37281 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
37282 | src &= msk; |
37283 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37284 | } |
37285 | RET(6) |
37286 | } |
37287 | |
37288 | // ASLk |
37289 | OPCODE(0xE180) |
37290 | { |
37291 | u32 adr, res; |
37292 | u32 src, dst; |
37293 | |
37294 | u32 sft; |
37295 | |
37296 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37297 | m68kcontext.io_cycle_counter -= sft * 2; |
37298 | src = DREGu32((Opcode >> 0) & 7); |
37299 | flag_X = flag_C = src >> (24 - sft); |
37300 | res = src << sft; |
37301 | flag_N = res >> 24; |
37302 | flag_NotZ = res & 0xFFFFFFFF; |
37303 | DREGu32((Opcode >> 0) & 7) = res; |
37304 | flag_V = 0; |
37305 | { |
37306 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
37307 | src &= msk; |
37308 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37309 | } |
37310 | RET(8) |
37311 | } |
37312 | |
37313 | // LSLk |
37314 | OPCODE(0xE108) |
37315 | { |
37316 | u32 adr, res; |
37317 | u32 src, dst; |
37318 | |
37319 | u32 sft; |
37320 | |
37321 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37322 | m68kcontext.io_cycle_counter -= sft * 2; |
37323 | src = DREGu8((Opcode >> 0) & 7); |
37324 | flag_V = 0; |
37325 | flag_X = flag_C = src << (0 + sft); |
37326 | res = src << sft; |
37327 | flag_N = res >> 0; |
37328 | flag_NotZ = res & 0x000000FF; |
37329 | DREGu8((Opcode >> 0) & 7) = res; |
37330 | RET(6) |
37331 | } |
37332 | |
37333 | // LSLk |
37334 | OPCODE(0xE148) |
37335 | { |
37336 | u32 adr, res; |
37337 | u32 src, dst; |
37338 | |
37339 | u32 sft; |
37340 | |
37341 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37342 | m68kcontext.io_cycle_counter -= sft * 2; |
37343 | src = DREGu16((Opcode >> 0) & 7); |
37344 | flag_V = 0; |
37345 | flag_X = flag_C = src >> (8 - sft); |
37346 | res = src << sft; |
37347 | flag_N = res >> 8; |
37348 | flag_NotZ = res & 0x0000FFFF; |
37349 | DREGu16((Opcode >> 0) & 7) = res; |
37350 | RET(6) |
37351 | } |
37352 | |
37353 | // LSLk |
37354 | OPCODE(0xE188) |
37355 | { |
37356 | u32 adr, res; |
37357 | u32 src, dst; |
37358 | |
37359 | u32 sft; |
37360 | |
37361 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37362 | m68kcontext.io_cycle_counter -= sft * 2; |
37363 | src = DREGu32((Opcode >> 0) & 7); |
37364 | flag_V = 0; |
37365 | flag_X = flag_C = src >> (24 - sft); |
37366 | res = src << sft; |
37367 | flag_N = res >> 24; |
37368 | flag_NotZ = res & 0xFFFFFFFF; |
37369 | DREGu32((Opcode >> 0) & 7) = res; |
37370 | RET(8) |
37371 | } |
37372 | |
37373 | // ROXLk |
37374 | OPCODE(0xE110) |
37375 | { |
37376 | u32 adr, res; |
37377 | u32 src, dst; |
37378 | |
37379 | u32 sft; |
37380 | |
37381 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37382 | m68kcontext.io_cycle_counter -= sft * 2; |
37383 | src = DREGu8((Opcode >> 0) & 7); |
37384 | src |= (flag_X & M68K_SR_X) << 0; |
37385 | res = (src << sft) | (src >> (9 - sft)); |
37386 | flag_X = flag_C = res >> 0; |
37387 | flag_V = 0; |
37388 | flag_N = res >> 0; |
37389 | flag_NotZ = res & 0x000000FF; |
37390 | DREGu8((Opcode >> 0) & 7) = res; |
37391 | RET(6) |
37392 | } |
37393 | |
37394 | // ROXLk |
37395 | OPCODE(0xE150) |
37396 | { |
37397 | u32 adr, res; |
37398 | u32 src, dst; |
37399 | |
37400 | u32 sft; |
37401 | |
37402 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37403 | m68kcontext.io_cycle_counter -= sft * 2; |
37404 | src = DREGu16((Opcode >> 0) & 7); |
37405 | src |= (flag_X & M68K_SR_X) << 8; |
37406 | res = (src << sft) | (src >> (17 - sft)); |
37407 | flag_X = flag_C = res >> 8; |
37408 | flag_V = 0; |
37409 | flag_N = res >> 8; |
37410 | flag_NotZ = res & 0x0000FFFF; |
37411 | DREGu16((Opcode >> 0) & 7) = res; |
37412 | RET(6) |
37413 | } |
37414 | |
37415 | // ROXLk |
37416 | OPCODE(0xE190) |
37417 | { |
37418 | u32 adr, res; |
37419 | u32 src, dst; |
37420 | |
37421 | u32 sft; |
37422 | |
37423 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37424 | m68kcontext.io_cycle_counter -= sft * 2; |
37425 | src = DREGu32((Opcode >> 0) & 7); |
37426 | flag_C = src >> ((32 - M68K_SR_C_SFT) - sft); |
37427 | if (sft == 1) res = (src << 1) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - 1)); |
37428 | else res = (src << sft) | (src >> (33 - sft)) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - sft)); |
37429 | flag_X = flag_C; |
37430 | flag_V = 0; |
37431 | flag_N = res >> 24; |
37432 | flag_NotZ = res; |
37433 | DREGu32((Opcode >> 0) & 7) = res; |
37434 | RET(8) |
37435 | } |
37436 | |
37437 | // ROLk |
37438 | OPCODE(0xE118) |
37439 | { |
37440 | u32 adr, res; |
37441 | u32 src, dst; |
37442 | |
37443 | u32 sft; |
37444 | |
37445 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37446 | m68kcontext.io_cycle_counter -= sft * 2; |
37447 | src = DREGu8((Opcode >> 0) & 7); |
37448 | flag_V = 0; |
37449 | flag_C = src << (0 + sft); |
37450 | res = (src << sft) | (src >> (8 - sft)); |
37451 | flag_N = res >> 0; |
37452 | flag_NotZ = res & 0x000000FF; |
37453 | DREGu8((Opcode >> 0) & 7) = res; |
37454 | RET(6) |
37455 | } |
37456 | |
37457 | // ROLk |
37458 | OPCODE(0xE158) |
37459 | { |
37460 | u32 adr, res; |
37461 | u32 src, dst; |
37462 | |
37463 | u32 sft; |
37464 | |
37465 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37466 | m68kcontext.io_cycle_counter -= sft * 2; |
37467 | src = DREGu16((Opcode >> 0) & 7); |
37468 | flag_V = 0; |
37469 | flag_C = src >> (8 - sft); |
37470 | res = (src << sft) | (src >> (16 - sft)); |
37471 | flag_N = res >> 8; |
37472 | flag_NotZ = res & 0x0000FFFF; |
37473 | DREGu16((Opcode >> 0) & 7) = res; |
37474 | RET(6) |
37475 | } |
37476 | |
37477 | // ROLk |
37478 | OPCODE(0xE198) |
37479 | { |
37480 | u32 adr, res; |
37481 | u32 src, dst; |
37482 | |
37483 | u32 sft; |
37484 | |
37485 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37486 | m68kcontext.io_cycle_counter -= sft * 2; |
37487 | src = DREGu32((Opcode >> 0) & 7); |
37488 | flag_V = 0; |
37489 | flag_C = src >> (24 - sft); |
37490 | res = (src << sft) | (src >> (32 - sft)); |
37491 | flag_N = res >> 24; |
37492 | flag_NotZ = res; |
37493 | DREGu32((Opcode >> 0) & 7) = res; |
37494 | RET(8) |
37495 | } |
37496 | |
37497 | // ASRD |
37498 | OPCODE(0xE020) |
37499 | { |
37500 | u32 adr, res; |
37501 | u32 src, dst; |
37502 | |
37503 | u32 sft; |
37504 | |
37505 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37506 | src = (s32)DREGs8((Opcode >> 0) & 7); |
37507 | if (sft) |
37508 | { |
37509 | m68kcontext.io_cycle_counter -= sft * 2; |
37510 | if (sft < 8) |
37511 | { |
37512 | flag_V = 0; |
37513 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37514 | res = ((s32)src) >> sft; |
37515 | flag_N = res >> 0; |
37516 | flag_NotZ = res; |
37517 | DREGu8((Opcode >> 0) & 7) = res; |
37518 | RET(6) |
37519 | } |
37520 | |
37521 | if (src & (1 << 7)) |
37522 | { |
37523 | flag_N = M68K_SR_N; |
37524 | flag_NotZ = 1; |
37525 | flag_V = 0; |
37526 | flag_C = M68K_SR_C; |
37527 | flag_X = M68K_SR_X; |
37528 | res = 0x000000FF; |
37529 | DREGu8((Opcode >> 0) & 7) = res; |
37530 | RET(6) |
37531 | } |
37532 | |
37533 | flag_N = 0; |
37534 | flag_NotZ = 0; |
37535 | flag_V = 0; |
37536 | flag_C = 0; |
37537 | flag_X = 0; |
37538 | res = 0; |
37539 | DREGu8((Opcode >> 0) & 7) = res; |
37540 | RET(6) |
37541 | } |
37542 | |
37543 | flag_V = 0; |
37544 | flag_C = 0; |
37545 | flag_N = src >> 0; |
37546 | flag_NotZ = src; |
37547 | RET(6) |
37548 | } |
37549 | |
37550 | // ASRD |
37551 | OPCODE(0xE060) |
37552 | { |
37553 | u32 adr, res; |
37554 | u32 src, dst; |
37555 | |
37556 | u32 sft; |
37557 | |
37558 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37559 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37560 | if (sft) |
37561 | { |
37562 | m68kcontext.io_cycle_counter -= sft * 2; |
37563 | if (sft < 16) |
37564 | { |
37565 | flag_V = 0; |
37566 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37567 | res = ((s32)src) >> sft; |
37568 | flag_N = res >> 8; |
37569 | flag_NotZ = res; |
37570 | DREGu16((Opcode >> 0) & 7) = res; |
37571 | RET(6) |
37572 | } |
37573 | |
37574 | if (src & (1 << 15)) |
37575 | { |
37576 | flag_N = M68K_SR_N; |
37577 | flag_NotZ = 1; |
37578 | flag_V = 0; |
37579 | flag_C = M68K_SR_C; |
37580 | flag_X = M68K_SR_X; |
37581 | res = 0x0000FFFF; |
37582 | DREGu16((Opcode >> 0) & 7) = res; |
37583 | RET(6) |
37584 | } |
37585 | |
37586 | flag_N = 0; |
37587 | flag_NotZ = 0; |
37588 | flag_V = 0; |
37589 | flag_C = 0; |
37590 | flag_X = 0; |
37591 | res = 0; |
37592 | DREGu16((Opcode >> 0) & 7) = res; |
37593 | RET(6) |
37594 | } |
37595 | |
37596 | flag_V = 0; |
37597 | flag_C = 0; |
37598 | flag_N = src >> 8; |
37599 | flag_NotZ = src; |
37600 | RET(6) |
37601 | } |
37602 | |
37603 | // ASRD |
37604 | OPCODE(0xE0A0) |
37605 | { |
37606 | #ifdef USE_CYCLONE_TIMING |
37607 | #define CYC 8 |
37608 | #else |
37609 | #define CYC 6 |
37610 | #endif |
37611 | u32 adr, res; |
37612 | u32 src, dst; |
37613 | |
37614 | u32 sft; |
37615 | |
37616 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37617 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37618 | if (sft) |
37619 | { |
37620 | m68kcontext.io_cycle_counter -= sft * 2; |
37621 | if (sft < 32) |
37622 | { |
37623 | flag_V = 0; |
37624 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37625 | res = ((s32)src) >> sft; |
37626 | flag_N = res >> 24; |
37627 | flag_NotZ = res; |
37628 | DREGu32((Opcode >> 0) & 7) = res; |
37629 | RET(CYC) |
37630 | } |
37631 | |
37632 | if (src & (1 << 31)) |
37633 | { |
37634 | flag_N = M68K_SR_N; |
37635 | flag_NotZ = 1; |
37636 | flag_V = 0; |
37637 | flag_C = M68K_SR_C; |
37638 | flag_X = M68K_SR_X; |
37639 | res = 0xFFFFFFFF; |
37640 | DREGu32((Opcode >> 0) & 7) = res; |
37641 | RET(CYC) |
37642 | } |
37643 | |
37644 | flag_N = 0; |
37645 | flag_NotZ = 0; |
37646 | flag_V = 0; |
37647 | flag_C = 0; |
37648 | flag_X = 0; |
37649 | res = 0; |
37650 | DREGu32((Opcode >> 0) & 7) = res; |
37651 | RET(CYC) |
37652 | } |
37653 | |
37654 | flag_V = 0; |
37655 | flag_C = 0; |
37656 | flag_N = src >> 24; |
37657 | flag_NotZ = src; |
37658 | RET(CYC) |
37659 | #undef CYC |
37660 | } |
37661 | |
37662 | // LSRD |
37663 | OPCODE(0xE028) |
37664 | { |
37665 | u32 adr, res; |
37666 | u32 src, dst; |
37667 | |
37668 | u32 sft; |
37669 | |
37670 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37671 | src = DREGu8((Opcode >> 0) & 7); |
37672 | if (sft) |
37673 | { |
37674 | m68kcontext.io_cycle_counter -= sft * 2; |
37675 | if (sft <= 8) |
37676 | { |
37677 | flag_N = flag_V = 0; |
37678 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37679 | res = src >> sft; |
37680 | flag_NotZ = res; |
37681 | DREGu8((Opcode >> 0) & 7) = res; |
37682 | RET(6) |
37683 | } |
37684 | |
37685 | flag_X = flag_C = 0; |
37686 | flag_N = 0; |
37687 | flag_NotZ = 0; |
37688 | flag_V = 0; |
37689 | res = 0; |
37690 | DREGu8((Opcode >> 0) & 7) = res; |
37691 | RET(6) |
37692 | } |
37693 | |
37694 | flag_V = 0; |
37695 | flag_C = 0; |
37696 | flag_N = src >> 0; |
37697 | flag_NotZ = src; |
37698 | RET(6) |
37699 | } |
37700 | |
37701 | // LSRD |
37702 | OPCODE(0xE068) |
37703 | { |
37704 | u32 adr, res; |
37705 | u32 src, dst; |
37706 | |
37707 | u32 sft; |
37708 | |
37709 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37710 | src = DREGu16((Opcode >> 0) & 7); |
37711 | if (sft) |
37712 | { |
37713 | m68kcontext.io_cycle_counter -= sft * 2; |
37714 | if (sft <= 16) |
37715 | { |
37716 | flag_N = flag_V = 0; |
37717 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37718 | res = src >> sft; |
37719 | flag_NotZ = res; |
37720 | DREGu16((Opcode >> 0) & 7) = res; |
37721 | RET(6) |
37722 | } |
37723 | |
37724 | flag_X = flag_C = 0; |
37725 | flag_N = 0; |
37726 | flag_NotZ = 0; |
37727 | flag_V = 0; |
37728 | res = 0; |
37729 | DREGu16((Opcode >> 0) & 7) = res; |
37730 | RET(6) |
37731 | } |
37732 | |
37733 | flag_V = 0; |
37734 | flag_C = 0; |
37735 | flag_N = src >> 8; |
37736 | flag_NotZ = src; |
37737 | RET(6) |
37738 | } |
37739 | |
37740 | // LSRD |
37741 | OPCODE(0xE0A8) |
37742 | { |
37743 | #ifdef USE_CYCLONE_TIMING |
37744 | #define CYC 8 |
37745 | #else |
37746 | #define CYC 6 |
37747 | #endif |
37748 | u32 adr, res; |
37749 | u32 src, dst; |
37750 | |
37751 | u32 sft; |
37752 | |
37753 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37754 | src = DREGu32((Opcode >> 0) & 7); |
37755 | if (sft) |
37756 | { |
37757 | m68kcontext.io_cycle_counter -= sft * 2; |
37758 | if (sft < 32) |
37759 | { |
37760 | flag_N = flag_V = 0; |
37761 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37762 | res = src >> sft; |
37763 | flag_NotZ = res; |
37764 | DREGu32((Opcode >> 0) & 7) = res; |
37765 | RET(CYC) |
37766 | } |
37767 | |
37768 | if (sft == 32) flag_C = src >> (31 - M68K_SR_C_SFT); |
37769 | else flag_C = 0; |
37770 | flag_X = flag_C; |
37771 | flag_N = 0; |
37772 | flag_NotZ = 0; |
37773 | flag_V = 0; |
37774 | res = 0; |
37775 | DREGu32((Opcode >> 0) & 7) = res; |
37776 | RET(CYC) |
37777 | } |
37778 | |
37779 | flag_V = 0; |
37780 | flag_C = 0; |
37781 | flag_N = src >> 24; |
37782 | flag_NotZ = src; |
37783 | RET(CYC) |
37784 | #undef CYC |
37785 | } |
37786 | |
37787 | // ROXRD |
37788 | OPCODE(0xE030) |
37789 | { |
37790 | u32 adr, res; |
37791 | u32 src, dst; |
37792 | |
37793 | u32 sft; |
37794 | |
37795 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37796 | src = DREGu8((Opcode >> 0) & 7); |
37797 | if (sft) |
37798 | { |
37799 | m68kcontext.io_cycle_counter -= sft * 2; |
37800 | sft %= 9; |
37801 | |
37802 | src |= (flag_X & M68K_SR_X) << 0; |
37803 | res = (src >> sft) | (src << (9 - sft)); |
37804 | flag_X = flag_C = res >> 0; |
37805 | flag_V = 0; |
37806 | flag_N = res >> 0; |
37807 | flag_NotZ = res & 0x000000FF; |
37808 | DREGu8((Opcode >> 0) & 7) = res; |
37809 | RET(6) |
37810 | } |
37811 | |
37812 | flag_V = 0; |
37813 | flag_C = flag_X; |
37814 | flag_N = src >> 0; |
37815 | flag_NotZ = src; |
37816 | RET(6) |
37817 | } |
37818 | |
37819 | // ROXRD |
37820 | OPCODE(0xE070) |
37821 | { |
37822 | u32 adr, res; |
37823 | u32 src, dst; |
37824 | |
37825 | u32 sft; |
37826 | |
37827 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37828 | src = DREGu16((Opcode >> 0) & 7); |
37829 | if (sft) |
37830 | { |
37831 | m68kcontext.io_cycle_counter -= sft * 2; |
37832 | sft %= 17; |
37833 | |
37834 | src |= (flag_X & M68K_SR_X) << 8; |
37835 | res = (src >> sft) | (src << (17 - sft)); |
37836 | flag_X = flag_C = res >> 8; |
37837 | flag_V = 0; |
37838 | flag_N = res >> 8; |
37839 | flag_NotZ = res & 0x0000FFFF; |
37840 | DREGu16((Opcode >> 0) & 7) = res; |
37841 | RET(6) |
37842 | } |
37843 | |
37844 | flag_V = 0; |
37845 | flag_C = flag_X; |
37846 | flag_N = src >> 8; |
37847 | flag_NotZ = src; |
37848 | RET(6) |
37849 | } |
37850 | |
37851 | // ROXRD |
37852 | OPCODE(0xE0B0) |
37853 | { |
37854 | #ifdef USE_CYCLONE_TIMING |
37855 | #define CYC 8 |
37856 | #else |
37857 | #define CYC 6 |
37858 | #endif |
37859 | u32 adr, res; |
37860 | u32 src, dst; |
37861 | |
37862 | u32 sft; |
37863 | |
37864 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37865 | src = DREGu32((Opcode >> 0) & 7); |
37866 | if (sft) |
37867 | { |
37868 | m68kcontext.io_cycle_counter -= sft * 2; |
37869 | sft %= 33; |
37870 | |
37871 | if (sft != 0) |
37872 | { |
37873 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37874 | else res = (src >> sft) | (src << (33 - sft)) | (((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))) >> (sft - 1)); |
37875 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
37876 | } |
37877 | else res = src; |
37878 | flag_C = flag_X; |
37879 | flag_V = 0; |
37880 | flag_N = res >> 24; |
37881 | flag_NotZ = res; |
37882 | DREGu32((Opcode >> 0) & 7) = res; |
37883 | RET(CYC) |
37884 | } |
37885 | |
37886 | flag_V = 0; |
37887 | flag_C = flag_X; |
37888 | flag_N = src >> 24; |
37889 | flag_NotZ = src; |
37890 | RET(CYC) |
37891 | #undef CYC |
37892 | } |
37893 | |
37894 | // RORD |
37895 | OPCODE(0xE038) |
37896 | { |
37897 | u32 adr, res; |
37898 | u32 src, dst; |
37899 | |
37900 | u32 sft; |
37901 | |
37902 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37903 | src = DREGu8((Opcode >> 0) & 7); |
37904 | if (sft) |
37905 | { |
37906 | m68kcontext.io_cycle_counter -= sft * 2; |
37907 | sft &= 0x07; |
37908 | |
37909 | flag_C = src << (M68K_SR_C_SFT - ((sft - 1) & 7)); |
37910 | res = (src >> sft) | (src << (8 - sft)); |
37911 | flag_V = 0; |
37912 | flag_N = res >> 0; |
37913 | flag_NotZ = res & 0x000000FF; |
37914 | DREGu8((Opcode >> 0) & 7) = res; |
37915 | RET(6) |
37916 | } |
37917 | |
37918 | flag_V = 0; |
37919 | flag_C = 0; |
37920 | flag_N = src >> 0; |
37921 | flag_NotZ = src; |
37922 | RET(6) |
37923 | } |
37924 | |
37925 | // RORD |
37926 | OPCODE(0xE078) |
37927 | { |
37928 | u32 adr, res; |
37929 | u32 src, dst; |
37930 | |
37931 | u32 sft; |
37932 | |
37933 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37934 | src = DREGu16((Opcode >> 0) & 7); |
37935 | if (sft) |
37936 | { |
37937 | m68kcontext.io_cycle_counter -= sft * 2; |
37938 | sft &= 0x0F; |
37939 | |
37940 | flag_C = (src >> ((sft - 1) & 15)) << M68K_SR_C_SFT; |
37941 | res = (src >> sft) | (src << (16 - sft)); |
37942 | flag_V = 0; |
37943 | flag_N = res >> 8; |
37944 | flag_NotZ = res & 0x0000FFFF; |
37945 | DREGu16((Opcode >> 0) & 7) = res; |
37946 | RET(6) |
37947 | } |
37948 | |
37949 | flag_V = 0; |
37950 | flag_C = 0; |
37951 | flag_N = src >> 8; |
37952 | flag_NotZ = src; |
37953 | RET(6) |
37954 | } |
37955 | |
37956 | // RORD |
37957 | OPCODE(0xE0B8) |
37958 | { |
37959 | #ifdef USE_CYCLONE_TIMING |
37960 | #define CYC 8 |
37961 | #else |
37962 | #define CYC 6 |
37963 | #endif |
37964 | u32 adr, res; |
37965 | u32 src, dst; |
37966 | |
37967 | u32 sft; |
37968 | |
37969 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37970 | src = DREGu32((Opcode >> 0) & 7); |
37971 | if (sft) |
37972 | { |
37973 | m68kcontext.io_cycle_counter -= sft * 2; |
37974 | sft &= 0x1F; |
37975 | |
37976 | flag_C = (src >> ((sft - 1) & 31)) << M68K_SR_C_SFT; |
37977 | res = (src >> sft) | (src << (32 - sft)); |
37978 | flag_V = 0; |
37979 | flag_N = res >> 24; |
37980 | flag_NotZ = res; |
37981 | DREGu32((Opcode >> 0) & 7) = res; |
37982 | RET(CYC) |
37983 | } |
37984 | |
37985 | flag_V = 0; |
37986 | flag_C = 0; |
37987 | flag_N = src >> 24; |
37988 | flag_NotZ = src; |
37989 | RET(CYC) |
37990 | #undef CYC |
37991 | } |
37992 | |
37993 | // ASLD |
37994 | OPCODE(0xE120) |
37995 | { |
37996 | u32 adr, res; |
37997 | u32 src, dst; |
37998 | |
37999 | u32 sft; |
38000 | |
38001 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38002 | src = DREGu8((Opcode >> 0) & 7); |
38003 | if (sft) |
38004 | { |
38005 | m68kcontext.io_cycle_counter -= sft * 2; |
38006 | if (sft < 8) |
38007 | { |
38008 | flag_X = flag_C = (src << sft) >> 0; |
38009 | res = (src << sft) & 0x000000FF; |
38010 | flag_N = res >> 0; |
38011 | flag_NotZ = res; |
38012 | DREGu8((Opcode >> 0) & 7) = res; |
38013 | flag_V = 0; |
38014 | { |
38015 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
38016 | src &= msk; |
38017 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38018 | } |
38019 | RET(6) |
38020 | } |
38021 | |
38022 | if (sft == 256) flag_C = src << M68K_SR_C_SFT; |
38023 | else flag_C = 0; |
38024 | flag_X = flag_C; |
38025 | if (src) flag_V = M68K_SR_V; |
38026 | else flag_V = 0; |
38027 | res = 0; |
38028 | DREGu8((Opcode >> 0) & 7) = res; |
38029 | flag_N = 0; |
38030 | flag_NotZ = 0; |
38031 | RET(6) |
38032 | } |
38033 | |
38034 | flag_V = 0; |
38035 | flag_C = 0; |
38036 | flag_N = src >> 0; |
38037 | flag_NotZ = src; |
38038 | RET(6) |
38039 | } |
38040 | |
38041 | // ASLD |
38042 | OPCODE(0xE160) |
38043 | { |
38044 | u32 adr, res; |
38045 | u32 src, dst; |
38046 | |
38047 | u32 sft; |
38048 | |
38049 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38050 | src = DREGu16((Opcode >> 0) & 7); |
38051 | if (sft) |
38052 | { |
38053 | m68kcontext.io_cycle_counter -= sft * 2; |
38054 | if (sft < 16) |
38055 | { |
38056 | flag_X = flag_C = (src << sft) >> 8; |
38057 | res = (src << sft) & 0x0000FFFF; |
38058 | flag_N = res >> 8; |
38059 | flag_NotZ = res; |
38060 | DREGu16((Opcode >> 0) & 7) = res; |
38061 | flag_V = 0; |
38062 | { |
38063 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
38064 | src &= msk; |
38065 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38066 | } |
38067 | RET(6) |
38068 | } |
38069 | |
38070 | if (sft == 65536) flag_C = src << M68K_SR_C_SFT; |
38071 | else flag_C = 0; |
38072 | flag_X = flag_C; |
38073 | if (src) flag_V = M68K_SR_V; |
38074 | else flag_V = 0; |
38075 | res = 0; |
38076 | DREGu16((Opcode >> 0) & 7) = res; |
38077 | flag_N = 0; |
38078 | flag_NotZ = 0; |
38079 | RET(6) |
38080 | } |
38081 | |
38082 | flag_V = 0; |
38083 | flag_C = 0; |
38084 | flag_N = src >> 8; |
38085 | flag_NotZ = src; |
38086 | RET(6) |
38087 | } |
38088 | |
38089 | // ASLD |
38090 | OPCODE(0xE1A0) |
38091 | { |
38092 | #ifdef USE_CYCLONE_TIMING |
38093 | #define CYC 8 |
38094 | #else |
38095 | #define CYC 6 |
38096 | #endif |
38097 | u32 adr, res; |
38098 | u32 src, dst; |
38099 | |
38100 | u32 sft; |
38101 | |
38102 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38103 | src = DREGu32((Opcode >> 0) & 7); |
38104 | if (sft) |
38105 | { |
38106 | m68kcontext.io_cycle_counter -= sft * 2; |
38107 | if (sft < 32) |
38108 | { |
38109 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38110 | res = src << sft; |
38111 | flag_N = res >> 24; |
38112 | flag_NotZ = res; |
38113 | DREGu32((Opcode >> 0) & 7) = res; |
38114 | flag_V = 0; |
38115 | { |
38116 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
38117 | src &= msk; |
38118 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38119 | } |
38120 | RET(CYC) |
38121 | } |
38122 | |
38123 | if (sft == 0) flag_C = src << M68K_SR_C_SFT; |
38124 | else flag_C = 0; |
38125 | flag_X = flag_C; |
38126 | if (src) flag_V = M68K_SR_V; |
38127 | else flag_V = 0; |
38128 | res = 0; |
38129 | DREGu32((Opcode >> 0) & 7) = res; |
38130 | flag_N = 0; |
38131 | flag_NotZ = 0; |
38132 | RET(CYC) |
38133 | } |
38134 | |
38135 | flag_V = 0; |
38136 | flag_C = 0; |
38137 | flag_N = src >> 24; |
38138 | flag_NotZ = src; |
38139 | RET(CYC) |
38140 | #undef CYC |
38141 | } |
38142 | |
38143 | // LSLD |
38144 | OPCODE(0xE128) |
38145 | { |
38146 | u32 adr, res; |
38147 | u32 src, dst; |
38148 | |
38149 | u32 sft; |
38150 | |
38151 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38152 | src = DREGu8((Opcode >> 0) & 7); |
38153 | if (sft) |
38154 | { |
38155 | m68kcontext.io_cycle_counter -= sft * 2; |
38156 | if (sft <= 8) |
38157 | { |
38158 | flag_X = flag_C = (src << sft) >> 0; |
38159 | res = (src << sft) & 0x000000FF; |
38160 | flag_V = 0; |
38161 | flag_N = res >> 0; |
38162 | flag_NotZ = res; |
38163 | DREGu8((Opcode >> 0) & 7) = res; |
38164 | RET(6) |
38165 | } |
38166 | |
38167 | flag_X = flag_C = 0; |
38168 | flag_N = 0; |
38169 | flag_NotZ = 0; |
38170 | flag_V = 0; |
38171 | res = 0; |
38172 | DREGu8((Opcode >> 0) & 7) = res; |
38173 | RET(6) |
38174 | } |
38175 | |
38176 | flag_V = 0; |
38177 | flag_C = 0; |
38178 | flag_N = src >> 0; |
38179 | flag_NotZ = src; |
38180 | RET(6) |
38181 | } |
38182 | |
38183 | // LSLD |
38184 | OPCODE(0xE168) |
38185 | { |
38186 | u32 adr, res; |
38187 | u32 src, dst; |
38188 | |
38189 | u32 sft; |
38190 | |
38191 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38192 | src = DREGu16((Opcode >> 0) & 7); |
38193 | if (sft) |
38194 | { |
38195 | m68kcontext.io_cycle_counter -= sft * 2; |
38196 | if (sft <= 16) |
38197 | { |
38198 | flag_X = flag_C = (src << sft) >> 8; |
38199 | res = (src << sft) & 0x0000FFFF; |
38200 | flag_V = 0; |
38201 | flag_N = res >> 8; |
38202 | flag_NotZ = res; |
38203 | DREGu16((Opcode >> 0) & 7) = res; |
38204 | RET(6) |
38205 | } |
38206 | |
38207 | flag_X = flag_C = 0; |
38208 | flag_N = 0; |
38209 | flag_NotZ = 0; |
38210 | flag_V = 0; |
38211 | res = 0; |
38212 | DREGu16((Opcode >> 0) & 7) = res; |
38213 | RET(6) |
38214 | } |
38215 | |
38216 | flag_V = 0; |
38217 | flag_C = 0; |
38218 | flag_N = src >> 8; |
38219 | flag_NotZ = src; |
38220 | RET(6) |
38221 | } |
38222 | |
38223 | // LSLD |
38224 | OPCODE(0xE1A8) |
38225 | { |
38226 | #ifdef USE_CYCLONE_TIMING |
38227 | #define CYC 8 |
38228 | #else |
38229 | #define CYC 6 |
38230 | #endif |
38231 | u32 adr, res; |
38232 | u32 src, dst; |
38233 | |
38234 | u32 sft; |
38235 | |
38236 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38237 | src = DREGu32((Opcode >> 0) & 7); |
38238 | if (sft) |
38239 | { |
38240 | m68kcontext.io_cycle_counter -= sft * 2; |
38241 | if (sft < 32) |
38242 | { |
38243 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38244 | res = src << sft; |
38245 | flag_V = 0; |
38246 | flag_N = res >> 24; |
38247 | flag_NotZ = res; |
38248 | DREGu32((Opcode >> 0) & 7) = res; |
38249 | RET(CYC) |
38250 | } |
38251 | |
38252 | if (sft == 32) flag_C = src << M68K_SR_C_SFT; |
38253 | else flag_C = 0; |
38254 | flag_X = flag_C; |
38255 | flag_N = 0; |
38256 | flag_NotZ = 0; |
38257 | flag_V = 0; |
38258 | res = 0; |
38259 | DREGu32((Opcode >> 0) & 7) = res; |
38260 | RET(CYC) |
38261 | } |
38262 | |
38263 | flag_V = 0; |
38264 | flag_C = 0; |
38265 | flag_N = src >> 24; |
38266 | flag_NotZ = src; |
38267 | RET(CYC) |
38268 | #undef CYC |
38269 | } |
38270 | |
38271 | // ROXLD |
38272 | OPCODE(0xE130) |
38273 | { |
38274 | u32 adr, res; |
38275 | u32 src, dst; |
38276 | |
38277 | u32 sft; |
38278 | |
38279 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38280 | src = DREGu8((Opcode >> 0) & 7); |
38281 | if (sft) |
38282 | { |
38283 | m68kcontext.io_cycle_counter -= sft * 2; |
38284 | sft %= 9; |
38285 | |
38286 | src |= (flag_X & M68K_SR_X) << 0; |
38287 | res = (src << sft) | (src >> (9 - sft)); |
38288 | flag_X = flag_C = res >> 0; |
38289 | flag_V = 0; |
38290 | flag_N = res >> 0; |
38291 | flag_NotZ = res & 0x000000FF; |
38292 | DREGu8((Opcode >> 0) & 7) = res; |
38293 | RET(6) |
38294 | } |
38295 | |
38296 | flag_V = 0; |
38297 | flag_C = flag_X; |
38298 | flag_N = src >> 0; |
38299 | flag_NotZ = src; |
38300 | RET(6) |
38301 | } |
38302 | |
38303 | // ROXLD |
38304 | OPCODE(0xE170) |
38305 | { |
38306 | u32 adr, res; |
38307 | u32 src, dst; |
38308 | |
38309 | u32 sft; |
38310 | |
38311 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38312 | src = DREGu16((Opcode >> 0) & 7); |
38313 | if (sft) |
38314 | { |
38315 | m68kcontext.io_cycle_counter -= sft * 2; |
38316 | sft %= 17; |
38317 | |
38318 | src |= (flag_X & M68K_SR_X) << 8; |
38319 | res = (src << sft) | (src >> (17 - sft)); |
38320 | flag_X = flag_C = res >> 8; |
38321 | flag_V = 0; |
38322 | flag_N = res >> 8; |
38323 | flag_NotZ = res & 0x0000FFFF; |
38324 | DREGu16((Opcode >> 0) & 7) = res; |
38325 | RET(6) |
38326 | } |
38327 | |
38328 | flag_V = 0; |
38329 | flag_C = flag_X; |
38330 | flag_N = src >> 8; |
38331 | flag_NotZ = src; |
38332 | RET(6) |
38333 | } |
38334 | |
38335 | // ROXLD |
38336 | OPCODE(0xE1B0) |
38337 | { |
38338 | #ifdef USE_CYCLONE_TIMING |
38339 | #define CYC 8 |
38340 | #else |
38341 | #define CYC 6 |
38342 | #endif |
38343 | u32 adr, res; |
38344 | u32 src, dst; |
38345 | |
38346 | u32 sft; |
38347 | |
38348 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38349 | src = DREGu32((Opcode >> 0) & 7); |
38350 | if (sft) |
38351 | { |
38352 | m68kcontext.io_cycle_counter -= sft * 2; |
38353 | sft %= 33; |
38354 | |
38355 | if (sft != 0) |
38356 | { |
38357 | if (sft == 1) res = (src << 1) | ((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1); |
38358 | else res = (src << sft) | (src >> (33 - sft)) | (((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1) << (sft - 1)); |
38359 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
38360 | } |
38361 | else res = src; |
38362 | flag_C = flag_X; |
38363 | flag_V = 0; |
38364 | flag_N = res >> 24; |
38365 | flag_NotZ = res; |
38366 | DREGu32((Opcode >> 0) & 7) = res; |
38367 | RET(CYC) |
38368 | } |
38369 | |
38370 | flag_V = 0; |
38371 | flag_C = flag_X; |
38372 | flag_N = src >> 24; |
38373 | flag_NotZ = src; |
38374 | RET(CYC) |
38375 | #undef CYC |
38376 | } |
38377 | |
38378 | // ROLD |
38379 | OPCODE(0xE138) |
38380 | { |
38381 | u32 adr, res; |
38382 | u32 src, dst; |
38383 | |
38384 | u32 sft; |
38385 | |
38386 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38387 | src = DREGu8((Opcode >> 0) & 7); |
38388 | if (sft) |
38389 | { |
38390 | m68kcontext.io_cycle_counter -= sft * 2; |
38391 | if (sft &= 0x07) |
38392 | { |
38393 | flag_C = (src << sft) >> 0; |
38394 | res = ((src << sft) | (src >> (8 - sft))) & 0x000000FF; |
38395 | flag_V = 0; |
38396 | flag_N = res >> 0; |
38397 | flag_NotZ = res; |
38398 | DREGu8((Opcode >> 0) & 7) = res; |
38399 | RET(6) |
38400 | } |
38401 | |
38402 | flag_V = 0; |
38403 | flag_C = src << M68K_SR_C_SFT; |
38404 | flag_N = src >> 0; |
38405 | flag_NotZ = src; |
38406 | RET(6) |
38407 | } |
38408 | |
38409 | flag_V = 0; |
38410 | flag_C = 0; |
38411 | flag_N = src >> 0; |
38412 | flag_NotZ = src; |
38413 | RET(6) |
38414 | } |
38415 | |
38416 | // ROLD |
38417 | OPCODE(0xE178) |
38418 | { |
38419 | u32 adr, res; |
38420 | u32 src, dst; |
38421 | |
38422 | u32 sft; |
38423 | |
38424 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38425 | src = DREGu16((Opcode >> 0) & 7); |
38426 | if (sft) |
38427 | { |
38428 | m68kcontext.io_cycle_counter -= sft * 2; |
38429 | if (sft &= 0x0F) |
38430 | { |
38431 | flag_C = (src << sft) >> 8; |
38432 | res = ((src << sft) | (src >> (16 - sft))) & 0x0000FFFF; |
38433 | flag_V = 0; |
38434 | flag_N = res >> 8; |
38435 | flag_NotZ = res; |
38436 | DREGu16((Opcode >> 0) & 7) = res; |
38437 | RET(6) |
38438 | } |
38439 | |
38440 | flag_V = 0; |
38441 | flag_C = src << M68K_SR_C_SFT; |
38442 | flag_N = src >> 8; |
38443 | flag_NotZ = src; |
38444 | RET(6) |
38445 | } |
38446 | |
38447 | flag_V = 0; |
38448 | flag_C = 0; |
38449 | flag_N = src >> 8; |
38450 | flag_NotZ = src; |
38451 | RET(6) |
38452 | } |
38453 | |
38454 | // ROLD |
38455 | OPCODE(0xE1B8) |
38456 | { |
38457 | #ifdef USE_CYCLONE_TIMING |
38458 | #define CYC 8 |
38459 | #else |
38460 | #define CYC 6 |
38461 | #endif |
38462 | u32 adr, res; |
38463 | u32 src, dst; |
38464 | |
38465 | u32 sft; |
38466 | |
38467 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38468 | src = DREGu32((Opcode >> 0) & 7); |
38469 | if (sft) |
38470 | { |
38471 | m68kcontext.io_cycle_counter -= sft * 2; |
38472 | if (sft &= 0x1F) |
38473 | { |
38474 | flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38475 | res = (src << sft) | (src >> (32 - sft)); |
38476 | flag_V = 0; |
38477 | flag_N = res >> 24; |
38478 | flag_NotZ = res; |
38479 | DREGu32((Opcode >> 0) & 7) = res; |
38480 | RET(CYC) |
38481 | } |
38482 | |
38483 | flag_V = 0; |
38484 | flag_C = src << M68K_SR_C_SFT; |
38485 | flag_N = src >> 24; |
38486 | flag_NotZ = src; |
38487 | RET(CYC) |
38488 | } |
38489 | |
38490 | flag_V = 0; |
38491 | flag_C = 0; |
38492 | flag_N = src >> 24; |
38493 | flag_NotZ = src; |
38494 | RET(CYC) |
38495 | #undef CYC |
38496 | } |
38497 | |
38498 | // ASR |
38499 | OPCODE(0xE0D0) |
38500 | { |
38501 | u32 adr, res; |
38502 | u32 src, dst; |
38503 | |
38504 | adr = AREG((Opcode >> 0) & 7); |
38505 | PRE_IO |
38506 | READ_WORD_F(adr, src) |
38507 | flag_V = 0; |
38508 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38509 | res = (src >> 1) | (src & (1 << 15)); |
38510 | flag_N = res >> 8; |
38511 | flag_NotZ = res; |
38512 | WRITE_WORD_F(adr, res) |
38513 | POST_IO |
38514 | RET(12) |
38515 | } |
38516 | |
38517 | // ASR |
38518 | OPCODE(0xE0D8) |
38519 | { |
38520 | u32 adr, res; |
38521 | u32 src, dst; |
38522 | |
38523 | adr = AREG((Opcode >> 0) & 7); |
38524 | AREG((Opcode >> 0) & 7) += 2; |
38525 | PRE_IO |
38526 | READ_WORD_F(adr, src) |
38527 | flag_V = 0; |
38528 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38529 | res = (src >> 1) | (src & (1 << 15)); |
38530 | flag_N = res >> 8; |
38531 | flag_NotZ = res; |
38532 | WRITE_WORD_F(adr, res) |
38533 | POST_IO |
38534 | RET(12) |
38535 | } |
38536 | |
38537 | // ASR |
38538 | OPCODE(0xE0E0) |
38539 | { |
38540 | u32 adr, res; |
38541 | u32 src, dst; |
38542 | |
38543 | adr = AREG((Opcode >> 0) & 7) - 2; |
38544 | AREG((Opcode >> 0) & 7) = adr; |
38545 | PRE_IO |
38546 | READ_WORD_F(adr, src) |
38547 | flag_V = 0; |
38548 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38549 | res = (src >> 1) | (src & (1 << 15)); |
38550 | flag_N = res >> 8; |
38551 | flag_NotZ = res; |
38552 | WRITE_WORD_F(adr, res) |
38553 | POST_IO |
38554 | RET(14) |
38555 | } |
38556 | |
38557 | // ASR |
38558 | OPCODE(0xE0E8) |
38559 | { |
38560 | u32 adr, res; |
38561 | u32 src, dst; |
38562 | |
38563 | FETCH_SWORD(adr); |
38564 | adr += AREG((Opcode >> 0) & 7); |
38565 | PRE_IO |
38566 | READ_WORD_F(adr, src) |
38567 | flag_V = 0; |
38568 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38569 | res = (src >> 1) | (src & (1 << 15)); |
38570 | flag_N = res >> 8; |
38571 | flag_NotZ = res; |
38572 | WRITE_WORD_F(adr, res) |
38573 | POST_IO |
38574 | RET(16) |
38575 | } |
38576 | |
38577 | // ASR |
38578 | OPCODE(0xE0F0) |
38579 | { |
38580 | u32 adr, res; |
38581 | u32 src, dst; |
38582 | |
38583 | adr = AREG((Opcode >> 0) & 7); |
38584 | DECODE_EXT_WORD |
38585 | PRE_IO |
38586 | READ_WORD_F(adr, src) |
38587 | flag_V = 0; |
38588 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38589 | res = (src >> 1) | (src & (1 << 15)); |
38590 | flag_N = res >> 8; |
38591 | flag_NotZ = res; |
38592 | WRITE_WORD_F(adr, res) |
38593 | POST_IO |
38594 | RET(18) |
38595 | } |
38596 | |
38597 | // ASR |
38598 | OPCODE(0xE0F8) |
38599 | { |
38600 | u32 adr, res; |
38601 | u32 src, dst; |
38602 | |
38603 | FETCH_SWORD(adr); |
38604 | PRE_IO |
38605 | READ_WORD_F(adr, src) |
38606 | flag_V = 0; |
38607 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38608 | res = (src >> 1) | (src & (1 << 15)); |
38609 | flag_N = res >> 8; |
38610 | flag_NotZ = res; |
38611 | WRITE_WORD_F(adr, res) |
38612 | POST_IO |
38613 | RET(16) |
38614 | } |
38615 | |
38616 | // ASR |
38617 | OPCODE(0xE0F9) |
38618 | { |
38619 | u32 adr, res; |
38620 | u32 src, dst; |
38621 | |
38622 | FETCH_LONG(adr); |
38623 | PRE_IO |
38624 | READ_WORD_F(adr, src) |
38625 | flag_V = 0; |
38626 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38627 | res = (src >> 1) | (src & (1 << 15)); |
38628 | flag_N = res >> 8; |
38629 | flag_NotZ = res; |
38630 | WRITE_WORD_F(adr, res) |
38631 | POST_IO |
38632 | RET(20) |
38633 | } |
38634 | |
38635 | // ASR |
38636 | OPCODE(0xE0DF) |
38637 | { |
38638 | u32 adr, res; |
38639 | u32 src, dst; |
38640 | |
38641 | adr = AREG(7); |
38642 | AREG(7) += 2; |
38643 | PRE_IO |
38644 | READ_WORD_F(adr, src) |
38645 | flag_V = 0; |
38646 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38647 | res = (src >> 1) | (src & (1 << 15)); |
38648 | flag_N = res >> 8; |
38649 | flag_NotZ = res; |
38650 | WRITE_WORD_F(adr, res) |
38651 | POST_IO |
38652 | RET(12) |
38653 | } |
38654 | |
38655 | // ASR |
38656 | OPCODE(0xE0E7) |
38657 | { |
38658 | u32 adr, res; |
38659 | u32 src, dst; |
38660 | |
38661 | adr = AREG(7) - 2; |
38662 | AREG(7) = adr; |
38663 | PRE_IO |
38664 | READ_WORD_F(adr, src) |
38665 | flag_V = 0; |
38666 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38667 | res = (src >> 1) | (src & (1 << 15)); |
38668 | flag_N = res >> 8; |
38669 | flag_NotZ = res; |
38670 | WRITE_WORD_F(adr, res) |
38671 | POST_IO |
38672 | RET(14) |
38673 | } |
38674 | |
38675 | // LSR |
38676 | OPCODE(0xE2D0) |
38677 | { |
38678 | u32 adr, res; |
38679 | u32 src, dst; |
38680 | |
38681 | adr = AREG((Opcode >> 0) & 7); |
38682 | PRE_IO |
38683 | READ_WORD_F(adr, src) |
38684 | flag_N = flag_V = 0; |
38685 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38686 | res = src >> 1; |
38687 | flag_NotZ = res; |
38688 | WRITE_WORD_F(adr, res) |
38689 | POST_IO |
38690 | RET(12) |
38691 | } |
38692 | |
38693 | // LSR |
38694 | OPCODE(0xE2D8) |
38695 | { |
38696 | u32 adr, res; |
38697 | u32 src, dst; |
38698 | |
38699 | adr = AREG((Opcode >> 0) & 7); |
38700 | AREG((Opcode >> 0) & 7) += 2; |
38701 | PRE_IO |
38702 | READ_WORD_F(adr, src) |
38703 | flag_N = flag_V = 0; |
38704 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38705 | res = src >> 1; |
38706 | flag_NotZ = res; |
38707 | WRITE_WORD_F(adr, res) |
38708 | POST_IO |
38709 | RET(12) |
38710 | } |
38711 | |
38712 | // LSR |
38713 | OPCODE(0xE2E0) |
38714 | { |
38715 | u32 adr, res; |
38716 | u32 src, dst; |
38717 | |
38718 | adr = AREG((Opcode >> 0) & 7) - 2; |
38719 | AREG((Opcode >> 0) & 7) = adr; |
38720 | PRE_IO |
38721 | READ_WORD_F(adr, src) |
38722 | flag_N = flag_V = 0; |
38723 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38724 | res = src >> 1; |
38725 | flag_NotZ = res; |
38726 | WRITE_WORD_F(adr, res) |
38727 | POST_IO |
38728 | RET(14) |
38729 | } |
38730 | |
38731 | // LSR |
38732 | OPCODE(0xE2E8) |
38733 | { |
38734 | u32 adr, res; |
38735 | u32 src, dst; |
38736 | |
38737 | FETCH_SWORD(adr); |
38738 | adr += AREG((Opcode >> 0) & 7); |
38739 | PRE_IO |
38740 | READ_WORD_F(adr, src) |
38741 | flag_N = flag_V = 0; |
38742 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38743 | res = src >> 1; |
38744 | flag_NotZ = res; |
38745 | WRITE_WORD_F(adr, res) |
38746 | POST_IO |
38747 | RET(16) |
38748 | } |
38749 | |
38750 | // LSR |
38751 | OPCODE(0xE2F0) |
38752 | { |
38753 | u32 adr, res; |
38754 | u32 src, dst; |
38755 | |
38756 | adr = AREG((Opcode >> 0) & 7); |
38757 | DECODE_EXT_WORD |
38758 | PRE_IO |
38759 | READ_WORD_F(adr, src) |
38760 | flag_N = flag_V = 0; |
38761 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38762 | res = src >> 1; |
38763 | flag_NotZ = res; |
38764 | WRITE_WORD_F(adr, res) |
38765 | POST_IO |
38766 | RET(18) |
38767 | } |
38768 | |
38769 | // LSR |
38770 | OPCODE(0xE2F8) |
38771 | { |
38772 | u32 adr, res; |
38773 | u32 src, dst; |
38774 | |
38775 | FETCH_SWORD(adr); |
38776 | PRE_IO |
38777 | READ_WORD_F(adr, src) |
38778 | flag_N = flag_V = 0; |
38779 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38780 | res = src >> 1; |
38781 | flag_NotZ = res; |
38782 | WRITE_WORD_F(adr, res) |
38783 | POST_IO |
38784 | RET(16) |
38785 | } |
38786 | |
38787 | // LSR |
38788 | OPCODE(0xE2F9) |
38789 | { |
38790 | u32 adr, res; |
38791 | u32 src, dst; |
38792 | |
38793 | FETCH_LONG(adr); |
38794 | PRE_IO |
38795 | READ_WORD_F(adr, src) |
38796 | flag_N = flag_V = 0; |
38797 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38798 | res = src >> 1; |
38799 | flag_NotZ = res; |
38800 | WRITE_WORD_F(adr, res) |
38801 | POST_IO |
38802 | RET(20) |
38803 | } |
38804 | |
38805 | // LSR |
38806 | OPCODE(0xE2DF) |
38807 | { |
38808 | u32 adr, res; |
38809 | u32 src, dst; |
38810 | |
38811 | adr = AREG(7); |
38812 | AREG(7) += 2; |
38813 | PRE_IO |
38814 | READ_WORD_F(adr, src) |
38815 | flag_N = flag_V = 0; |
38816 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38817 | res = src >> 1; |
38818 | flag_NotZ = res; |
38819 | WRITE_WORD_F(adr, res) |
38820 | POST_IO |
38821 | RET(12) |
38822 | } |
38823 | |
38824 | // LSR |
38825 | OPCODE(0xE2E7) |
38826 | { |
38827 | u32 adr, res; |
38828 | u32 src, dst; |
38829 | |
38830 | adr = AREG(7) - 2; |
38831 | AREG(7) = adr; |
38832 | PRE_IO |
38833 | READ_WORD_F(adr, src) |
38834 | flag_N = flag_V = 0; |
38835 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38836 | res = src >> 1; |
38837 | flag_NotZ = res; |
38838 | WRITE_WORD_F(adr, res) |
38839 | POST_IO |
38840 | RET(14) |
38841 | } |
38842 | |
38843 | // ROXR |
38844 | OPCODE(0xE4D0) |
38845 | { |
38846 | u32 adr, res; |
38847 | u32 src, dst; |
38848 | |
38849 | adr = AREG((Opcode >> 0) & 7); |
38850 | PRE_IO |
38851 | READ_WORD_F(adr, src) |
38852 | flag_V = 0; |
38853 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38854 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38855 | flag_N = res >> 8; |
38856 | flag_NotZ = res; |
38857 | WRITE_WORD_F(adr, res) |
38858 | POST_IO |
38859 | RET(12) |
38860 | } |
38861 | |
38862 | // ROXR |
38863 | OPCODE(0xE4D8) |
38864 | { |
38865 | u32 adr, res; |
38866 | u32 src, dst; |
38867 | |
38868 | adr = AREG((Opcode >> 0) & 7); |
38869 | AREG((Opcode >> 0) & 7) += 2; |
38870 | PRE_IO |
38871 | READ_WORD_F(adr, src) |
38872 | flag_V = 0; |
38873 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38874 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38875 | flag_N = res >> 8; |
38876 | flag_NotZ = res; |
38877 | WRITE_WORD_F(adr, res) |
38878 | POST_IO |
38879 | RET(12) |
38880 | } |
38881 | |
38882 | // ROXR |
38883 | OPCODE(0xE4E0) |
38884 | { |
38885 | u32 adr, res; |
38886 | u32 src, dst; |
38887 | |
38888 | adr = AREG((Opcode >> 0) & 7) - 2; |
38889 | AREG((Opcode >> 0) & 7) = adr; |
38890 | PRE_IO |
38891 | READ_WORD_F(adr, src) |
38892 | flag_V = 0; |
38893 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38894 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38895 | flag_N = res >> 8; |
38896 | flag_NotZ = res; |
38897 | WRITE_WORD_F(adr, res) |
38898 | POST_IO |
38899 | RET(14) |
38900 | } |
38901 | |
38902 | // ROXR |
38903 | OPCODE(0xE4E8) |
38904 | { |
38905 | u32 adr, res; |
38906 | u32 src, dst; |
38907 | |
38908 | FETCH_SWORD(adr); |
38909 | adr += AREG((Opcode >> 0) & 7); |
38910 | PRE_IO |
38911 | READ_WORD_F(adr, src) |
38912 | flag_V = 0; |
38913 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38914 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38915 | flag_N = res >> 8; |
38916 | flag_NotZ = res; |
38917 | WRITE_WORD_F(adr, res) |
38918 | POST_IO |
38919 | RET(16) |
38920 | } |
38921 | |
38922 | // ROXR |
38923 | OPCODE(0xE4F0) |
38924 | { |
38925 | u32 adr, res; |
38926 | u32 src, dst; |
38927 | |
38928 | adr = AREG((Opcode >> 0) & 7); |
38929 | DECODE_EXT_WORD |
38930 | PRE_IO |
38931 | READ_WORD_F(adr, src) |
38932 | flag_V = 0; |
38933 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38934 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38935 | flag_N = res >> 8; |
38936 | flag_NotZ = res; |
38937 | WRITE_WORD_F(adr, res) |
38938 | POST_IO |
38939 | RET(18) |
38940 | } |
38941 | |
38942 | // ROXR |
38943 | OPCODE(0xE4F8) |
38944 | { |
38945 | u32 adr, res; |
38946 | u32 src, dst; |
38947 | |
38948 | FETCH_SWORD(adr); |
38949 | PRE_IO |
38950 | READ_WORD_F(adr, src) |
38951 | flag_V = 0; |
38952 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38953 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38954 | flag_N = res >> 8; |
38955 | flag_NotZ = res; |
38956 | WRITE_WORD_F(adr, res) |
38957 | POST_IO |
38958 | RET(16) |
38959 | } |
38960 | |
38961 | // ROXR |
38962 | OPCODE(0xE4F9) |
38963 | { |
38964 | u32 adr, res; |
38965 | u32 src, dst; |
38966 | |
38967 | FETCH_LONG(adr); |
38968 | PRE_IO |
38969 | READ_WORD_F(adr, src) |
38970 | flag_V = 0; |
38971 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38972 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38973 | flag_N = res >> 8; |
38974 | flag_NotZ = res; |
38975 | WRITE_WORD_F(adr, res) |
38976 | POST_IO |
38977 | RET(20) |
38978 | } |
38979 | |
38980 | // ROXR |
38981 | OPCODE(0xE4DF) |
38982 | { |
38983 | u32 adr, res; |
38984 | u32 src, dst; |
38985 | |
38986 | adr = AREG(7); |
38987 | AREG(7) += 2; |
38988 | PRE_IO |
38989 | READ_WORD_F(adr, src) |
38990 | flag_V = 0; |
38991 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38992 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38993 | flag_N = res >> 8; |
38994 | flag_NotZ = res; |
38995 | WRITE_WORD_F(adr, res) |
38996 | POST_IO |
38997 | RET(12) |
38998 | } |
38999 | |
39000 | // ROXR |
39001 | OPCODE(0xE4E7) |
39002 | { |
39003 | u32 adr, res; |
39004 | u32 src, dst; |
39005 | |
39006 | adr = AREG(7) - 2; |
39007 | AREG(7) = adr; |
39008 | PRE_IO |
39009 | READ_WORD_F(adr, src) |
39010 | flag_V = 0; |
39011 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39012 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39013 | flag_N = res >> 8; |
39014 | flag_NotZ = res; |
39015 | WRITE_WORD_F(adr, res) |
39016 | POST_IO |
39017 | RET(14) |
39018 | } |
39019 | |
39020 | // ROR |
39021 | OPCODE(0xE6D0) |
39022 | { |
39023 | u32 adr, res; |
39024 | u32 src, dst; |
39025 | |
39026 | adr = AREG((Opcode >> 0) & 7); |
39027 | PRE_IO |
39028 | READ_WORD_F(adr, src) |
39029 | flag_V = 0; |
39030 | flag_C = src << M68K_SR_C_SFT; |
39031 | res = (src >> 1) | (src << 15); |
39032 | flag_N = res >> 8; |
39033 | flag_NotZ = res & 0x0000FFFF; |
39034 | WRITE_WORD_F(adr, res) |
39035 | POST_IO |
39036 | RET(12) |
39037 | } |
39038 | |
39039 | // ROR |
39040 | OPCODE(0xE6D8) |
39041 | { |
39042 | u32 adr, res; |
39043 | u32 src, dst; |
39044 | |
39045 | adr = AREG((Opcode >> 0) & 7); |
39046 | AREG((Opcode >> 0) & 7) += 2; |
39047 | PRE_IO |
39048 | READ_WORD_F(adr, src) |
39049 | flag_V = 0; |
39050 | flag_C = src << M68K_SR_C_SFT; |
39051 | res = (src >> 1) | (src << 15); |
39052 | flag_N = res >> 8; |
39053 | flag_NotZ = res & 0x0000FFFF; |
39054 | WRITE_WORD_F(adr, res) |
39055 | POST_IO |
39056 | RET(12) |
39057 | } |
39058 | |
39059 | // ROR |
39060 | OPCODE(0xE6E0) |
39061 | { |
39062 | u32 adr, res; |
39063 | u32 src, dst; |
39064 | |
39065 | adr = AREG((Opcode >> 0) & 7) - 2; |
39066 | AREG((Opcode >> 0) & 7) = adr; |
39067 | PRE_IO |
39068 | READ_WORD_F(adr, src) |
39069 | flag_V = 0; |
39070 | flag_C = src << M68K_SR_C_SFT; |
39071 | res = (src >> 1) | (src << 15); |
39072 | flag_N = res >> 8; |
39073 | flag_NotZ = res & 0x0000FFFF; |
39074 | WRITE_WORD_F(adr, res) |
39075 | POST_IO |
39076 | RET(14) |
39077 | } |
39078 | |
39079 | // ROR |
39080 | OPCODE(0xE6E8) |
39081 | { |
39082 | u32 adr, res; |
39083 | u32 src, dst; |
39084 | |
39085 | FETCH_SWORD(adr); |
39086 | adr += AREG((Opcode >> 0) & 7); |
39087 | PRE_IO |
39088 | READ_WORD_F(adr, src) |
39089 | flag_V = 0; |
39090 | flag_C = src << M68K_SR_C_SFT; |
39091 | res = (src >> 1) | (src << 15); |
39092 | flag_N = res >> 8; |
39093 | flag_NotZ = res & 0x0000FFFF; |
39094 | WRITE_WORD_F(adr, res) |
39095 | POST_IO |
39096 | RET(16) |
39097 | } |
39098 | |
39099 | // ROR |
39100 | OPCODE(0xE6F0) |
39101 | { |
39102 | u32 adr, res; |
39103 | u32 src, dst; |
39104 | |
39105 | adr = AREG((Opcode >> 0) & 7); |
39106 | DECODE_EXT_WORD |
39107 | PRE_IO |
39108 | READ_WORD_F(adr, src) |
39109 | flag_V = 0; |
39110 | flag_C = src << M68K_SR_C_SFT; |
39111 | res = (src >> 1) | (src << 15); |
39112 | flag_N = res >> 8; |
39113 | flag_NotZ = res & 0x0000FFFF; |
39114 | WRITE_WORD_F(adr, res) |
39115 | POST_IO |
39116 | RET(18) |
39117 | } |
39118 | |
39119 | // ROR |
39120 | OPCODE(0xE6F8) |
39121 | { |
39122 | u32 adr, res; |
39123 | u32 src, dst; |
39124 | |
39125 | FETCH_SWORD(adr); |
39126 | PRE_IO |
39127 | READ_WORD_F(adr, src) |
39128 | flag_V = 0; |
39129 | flag_C = src << M68K_SR_C_SFT; |
39130 | res = (src >> 1) | (src << 15); |
39131 | flag_N = res >> 8; |
39132 | flag_NotZ = res & 0x0000FFFF; |
39133 | WRITE_WORD_F(adr, res) |
39134 | POST_IO |
39135 | RET(16) |
39136 | } |
39137 | |
39138 | // ROR |
39139 | OPCODE(0xE6F9) |
39140 | { |
39141 | u32 adr, res; |
39142 | u32 src, dst; |
39143 | |
39144 | FETCH_LONG(adr); |
39145 | PRE_IO |
39146 | READ_WORD_F(adr, src) |
39147 | flag_V = 0; |
39148 | flag_C = src << M68K_SR_C_SFT; |
39149 | res = (src >> 1) | (src << 15); |
39150 | flag_N = res >> 8; |
39151 | flag_NotZ = res & 0x0000FFFF; |
39152 | WRITE_WORD_F(adr, res) |
39153 | POST_IO |
39154 | RET(20) |
39155 | } |
39156 | |
39157 | // ROR |
39158 | OPCODE(0xE6DF) |
39159 | { |
39160 | u32 adr, res; |
39161 | u32 src, dst; |
39162 | |
39163 | adr = AREG(7); |
39164 | AREG(7) += 2; |
39165 | PRE_IO |
39166 | READ_WORD_F(adr, src) |
39167 | flag_V = 0; |
39168 | flag_C = src << M68K_SR_C_SFT; |
39169 | res = (src >> 1) | (src << 15); |
39170 | flag_N = res >> 8; |
39171 | flag_NotZ = res & 0x0000FFFF; |
39172 | WRITE_WORD_F(adr, res) |
39173 | POST_IO |
39174 | RET(12) |
39175 | } |
39176 | |
39177 | // ROR |
39178 | OPCODE(0xE6E7) |
39179 | { |
39180 | u32 adr, res; |
39181 | u32 src, dst; |
39182 | |
39183 | adr = AREG(7) - 2; |
39184 | AREG(7) = adr; |
39185 | PRE_IO |
39186 | READ_WORD_F(adr, src) |
39187 | flag_V = 0; |
39188 | flag_C = src << M68K_SR_C_SFT; |
39189 | res = (src >> 1) | (src << 15); |
39190 | flag_N = res >> 8; |
39191 | flag_NotZ = res & 0x0000FFFF; |
39192 | WRITE_WORD_F(adr, res) |
39193 | POST_IO |
39194 | RET(14) |
39195 | } |
39196 | |
39197 | // ASL |
39198 | OPCODE(0xE1D0) |
39199 | { |
39200 | u32 adr, res; |
39201 | u32 src, dst; |
39202 | |
39203 | adr = AREG((Opcode >> 0) & 7); |
39204 | PRE_IO |
39205 | READ_WORD_F(adr, src) |
39206 | flag_X = flag_C = src >> 7; |
39207 | res = src << 1; |
39208 | flag_V = (src ^ res) >> 8; |
39209 | flag_N = res >> 8; |
39210 | flag_NotZ = res & 0x0000FFFF; |
39211 | WRITE_WORD_F(adr, res) |
39212 | POST_IO |
39213 | RET(12) |
39214 | } |
39215 | |
39216 | // ASL |
39217 | OPCODE(0xE1D8) |
39218 | { |
39219 | u32 adr, res; |
39220 | u32 src, dst; |
39221 | |
39222 | adr = AREG((Opcode >> 0) & 7); |
39223 | AREG((Opcode >> 0) & 7) += 2; |
39224 | PRE_IO |
39225 | READ_WORD_F(adr, src) |
39226 | flag_X = flag_C = src >> 7; |
39227 | res = src << 1; |
39228 | flag_V = (src ^ res) >> 8; |
39229 | flag_N = res >> 8; |
39230 | flag_NotZ = res & 0x0000FFFF; |
39231 | WRITE_WORD_F(adr, res) |
39232 | POST_IO |
39233 | RET(12) |
39234 | } |
39235 | |
39236 | // ASL |
39237 | OPCODE(0xE1E0) |
39238 | { |
39239 | u32 adr, res; |
39240 | u32 src, dst; |
39241 | |
39242 | adr = AREG((Opcode >> 0) & 7) - 2; |
39243 | AREG((Opcode >> 0) & 7) = adr; |
39244 | PRE_IO |
39245 | READ_WORD_F(adr, src) |
39246 | flag_X = flag_C = src >> 7; |
39247 | res = src << 1; |
39248 | flag_V = (src ^ res) >> 8; |
39249 | flag_N = res >> 8; |
39250 | flag_NotZ = res & 0x0000FFFF; |
39251 | WRITE_WORD_F(adr, res) |
39252 | POST_IO |
39253 | RET(14) |
39254 | } |
39255 | |
39256 | // ASL |
39257 | OPCODE(0xE1E8) |
39258 | { |
39259 | u32 adr, res; |
39260 | u32 src, dst; |
39261 | |
39262 | FETCH_SWORD(adr); |
39263 | adr += AREG((Opcode >> 0) & 7); |
39264 | PRE_IO |
39265 | READ_WORD_F(adr, src) |
39266 | flag_X = flag_C = src >> 7; |
39267 | res = src << 1; |
39268 | flag_V = (src ^ res) >> 8; |
39269 | flag_N = res >> 8; |
39270 | flag_NotZ = res & 0x0000FFFF; |
39271 | WRITE_WORD_F(adr, res) |
39272 | POST_IO |
39273 | RET(16) |
39274 | } |
39275 | |
39276 | // ASL |
39277 | OPCODE(0xE1F0) |
39278 | { |
39279 | u32 adr, res; |
39280 | u32 src, dst; |
39281 | |
39282 | adr = AREG((Opcode >> 0) & 7); |
39283 | DECODE_EXT_WORD |
39284 | PRE_IO |
39285 | READ_WORD_F(adr, src) |
39286 | flag_X = flag_C = src >> 7; |
39287 | res = src << 1; |
39288 | flag_V = (src ^ res) >> 8; |
39289 | flag_N = res >> 8; |
39290 | flag_NotZ = res & 0x0000FFFF; |
39291 | WRITE_WORD_F(adr, res) |
39292 | POST_IO |
39293 | RET(18) |
39294 | } |
39295 | |
39296 | // ASL |
39297 | OPCODE(0xE1F8) |
39298 | { |
39299 | u32 adr, res; |
39300 | u32 src, dst; |
39301 | |
39302 | FETCH_SWORD(adr); |
39303 | PRE_IO |
39304 | READ_WORD_F(adr, src) |
39305 | flag_X = flag_C = src >> 7; |
39306 | res = src << 1; |
39307 | flag_V = (src ^ res) >> 8; |
39308 | flag_N = res >> 8; |
39309 | flag_NotZ = res & 0x0000FFFF; |
39310 | WRITE_WORD_F(adr, res) |
39311 | POST_IO |
39312 | RET(16) |
39313 | } |
39314 | |
39315 | // ASL |
39316 | OPCODE(0xE1F9) |
39317 | { |
39318 | u32 adr, res; |
39319 | u32 src, dst; |
39320 | |
39321 | FETCH_LONG(adr); |
39322 | PRE_IO |
39323 | READ_WORD_F(adr, src) |
39324 | flag_X = flag_C = src >> 7; |
39325 | res = src << 1; |
39326 | flag_V = (src ^ res) >> 8; |
39327 | flag_N = res >> 8; |
39328 | flag_NotZ = res & 0x0000FFFF; |
39329 | WRITE_WORD_F(adr, res) |
39330 | POST_IO |
39331 | RET(20) |
39332 | } |
39333 | |
39334 | // ASL |
39335 | OPCODE(0xE1DF) |
39336 | { |
39337 | u32 adr, res; |
39338 | u32 src, dst; |
39339 | |
39340 | adr = AREG(7); |
39341 | AREG(7) += 2; |
39342 | PRE_IO |
39343 | READ_WORD_F(adr, src) |
39344 | flag_X = flag_C = src >> 7; |
39345 | res = src << 1; |
39346 | flag_V = (src ^ res) >> 8; |
39347 | flag_N = res >> 8; |
39348 | flag_NotZ = res & 0x0000FFFF; |
39349 | WRITE_WORD_F(adr, res) |
39350 | POST_IO |
39351 | RET(12) |
39352 | } |
39353 | |
39354 | // ASL |
39355 | OPCODE(0xE1E7) |
39356 | { |
39357 | u32 adr, res; |
39358 | u32 src, dst; |
39359 | |
39360 | adr = AREG(7) - 2; |
39361 | AREG(7) = adr; |
39362 | PRE_IO |
39363 | READ_WORD_F(adr, src) |
39364 | flag_X = flag_C = src >> 7; |
39365 | res = src << 1; |
39366 | flag_V = (src ^ res) >> 8; |
39367 | flag_N = res >> 8; |
39368 | flag_NotZ = res & 0x0000FFFF; |
39369 | WRITE_WORD_F(adr, res) |
39370 | POST_IO |
39371 | RET(14) |
39372 | } |
39373 | |
39374 | // LSL |
39375 | OPCODE(0xE3D0) |
39376 | { |
39377 | u32 adr, res; |
39378 | u32 src, dst; |
39379 | |
39380 | adr = AREG((Opcode >> 0) & 7); |
39381 | PRE_IO |
39382 | READ_WORD_F(adr, src) |
39383 | flag_V = 0; |
39384 | flag_X = flag_C = src >> 7; |
39385 | res = src << 1; |
39386 | flag_N = res >> 8; |
39387 | flag_NotZ = res & 0x0000FFFF; |
39388 | WRITE_WORD_F(adr, res) |
39389 | POST_IO |
39390 | RET(12) |
39391 | } |
39392 | |
39393 | // LSL |
39394 | OPCODE(0xE3D8) |
39395 | { |
39396 | u32 adr, res; |
39397 | u32 src, dst; |
39398 | |
39399 | adr = AREG((Opcode >> 0) & 7); |
39400 | AREG((Opcode >> 0) & 7) += 2; |
39401 | PRE_IO |
39402 | READ_WORD_F(adr, src) |
39403 | flag_V = 0; |
39404 | flag_X = flag_C = src >> 7; |
39405 | res = src << 1; |
39406 | flag_N = res >> 8; |
39407 | flag_NotZ = res & 0x0000FFFF; |
39408 | WRITE_WORD_F(adr, res) |
39409 | POST_IO |
39410 | RET(12) |
39411 | } |
39412 | |
39413 | // LSL |
39414 | OPCODE(0xE3E0) |
39415 | { |
39416 | u32 adr, res; |
39417 | u32 src, dst; |
39418 | |
39419 | adr = AREG((Opcode >> 0) & 7) - 2; |
39420 | AREG((Opcode >> 0) & 7) = adr; |
39421 | PRE_IO |
39422 | READ_WORD_F(adr, src) |
39423 | flag_V = 0; |
39424 | flag_X = flag_C = src >> 7; |
39425 | res = src << 1; |
39426 | flag_N = res >> 8; |
39427 | flag_NotZ = res & 0x0000FFFF; |
39428 | WRITE_WORD_F(adr, res) |
39429 | POST_IO |
39430 | RET(14) |
39431 | } |
39432 | |
39433 | // LSL |
39434 | OPCODE(0xE3E8) |
39435 | { |
39436 | u32 adr, res; |
39437 | u32 src, dst; |
39438 | |
39439 | FETCH_SWORD(adr); |
39440 | adr += AREG((Opcode >> 0) & 7); |
39441 | PRE_IO |
39442 | READ_WORD_F(adr, src) |
39443 | flag_V = 0; |
39444 | flag_X = flag_C = src >> 7; |
39445 | res = src << 1; |
39446 | flag_N = res >> 8; |
39447 | flag_NotZ = res & 0x0000FFFF; |
39448 | WRITE_WORD_F(adr, res) |
39449 | POST_IO |
39450 | RET(16) |
39451 | } |
39452 | |
39453 | // LSL |
39454 | OPCODE(0xE3F0) |
39455 | { |
39456 | u32 adr, res; |
39457 | u32 src, dst; |
39458 | |
39459 | adr = AREG((Opcode >> 0) & 7); |
39460 | DECODE_EXT_WORD |
39461 | PRE_IO |
39462 | READ_WORD_F(adr, src) |
39463 | flag_V = 0; |
39464 | flag_X = flag_C = src >> 7; |
39465 | res = src << 1; |
39466 | flag_N = res >> 8; |
39467 | flag_NotZ = res & 0x0000FFFF; |
39468 | WRITE_WORD_F(adr, res) |
39469 | POST_IO |
39470 | RET(18) |
39471 | } |
39472 | |
39473 | // LSL |
39474 | OPCODE(0xE3F8) |
39475 | { |
39476 | u32 adr, res; |
39477 | u32 src, dst; |
39478 | |
39479 | FETCH_SWORD(adr); |
39480 | PRE_IO |
39481 | READ_WORD_F(adr, src) |
39482 | flag_V = 0; |
39483 | flag_X = flag_C = src >> 7; |
39484 | res = src << 1; |
39485 | flag_N = res >> 8; |
39486 | flag_NotZ = res & 0x0000FFFF; |
39487 | WRITE_WORD_F(adr, res) |
39488 | POST_IO |
39489 | RET(16) |
39490 | } |
39491 | |
39492 | // LSL |
39493 | OPCODE(0xE3F9) |
39494 | { |
39495 | u32 adr, res; |
39496 | u32 src, dst; |
39497 | |
39498 | FETCH_LONG(adr); |
39499 | PRE_IO |
39500 | READ_WORD_F(adr, src) |
39501 | flag_V = 0; |
39502 | flag_X = flag_C = src >> 7; |
39503 | res = src << 1; |
39504 | flag_N = res >> 8; |
39505 | flag_NotZ = res & 0x0000FFFF; |
39506 | WRITE_WORD_F(adr, res) |
39507 | POST_IO |
39508 | RET(20) |
39509 | } |
39510 | |
39511 | // LSL |
39512 | OPCODE(0xE3DF) |
39513 | { |
39514 | u32 adr, res; |
39515 | u32 src, dst; |
39516 | |
39517 | adr = AREG(7); |
39518 | AREG(7) += 2; |
39519 | PRE_IO |
39520 | READ_WORD_F(adr, src) |
39521 | flag_V = 0; |
39522 | flag_X = flag_C = src >> 7; |
39523 | res = src << 1; |
39524 | flag_N = res >> 8; |
39525 | flag_NotZ = res & 0x0000FFFF; |
39526 | WRITE_WORD_F(adr, res) |
39527 | POST_IO |
39528 | RET(12) |
39529 | } |
39530 | |
39531 | // LSL |
39532 | OPCODE(0xE3E7) |
39533 | { |
39534 | u32 adr, res; |
39535 | u32 src, dst; |
39536 | |
39537 | adr = AREG(7) - 2; |
39538 | AREG(7) = adr; |
39539 | PRE_IO |
39540 | READ_WORD_F(adr, src) |
39541 | flag_V = 0; |
39542 | flag_X = flag_C = src >> 7; |
39543 | res = src << 1; |
39544 | flag_N = res >> 8; |
39545 | flag_NotZ = res & 0x0000FFFF; |
39546 | WRITE_WORD_F(adr, res) |
39547 | POST_IO |
39548 | RET(14) |
39549 | } |
39550 | |
39551 | // ROXL |
39552 | OPCODE(0xE5D0) |
39553 | { |
39554 | u32 adr, res; |
39555 | u32 src, dst; |
39556 | |
39557 | adr = AREG((Opcode >> 0) & 7); |
39558 | PRE_IO |
39559 | READ_WORD_F(adr, src) |
39560 | flag_V = 0; |
39561 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39562 | flag_X = flag_C = src >> 7; |
39563 | flag_N = res >> 8; |
39564 | flag_NotZ = res & 0x0000FFFF; |
39565 | WRITE_WORD_F(adr, res) |
39566 | POST_IO |
39567 | RET(12) |
39568 | } |
39569 | |
39570 | // ROXL |
39571 | OPCODE(0xE5D8) |
39572 | { |
39573 | u32 adr, res; |
39574 | u32 src, dst; |
39575 | |
39576 | adr = AREG((Opcode >> 0) & 7); |
39577 | AREG((Opcode >> 0) & 7) += 2; |
39578 | PRE_IO |
39579 | READ_WORD_F(adr, src) |
39580 | flag_V = 0; |
39581 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39582 | flag_X = flag_C = src >> 7; |
39583 | flag_N = res >> 8; |
39584 | flag_NotZ = res & 0x0000FFFF; |
39585 | WRITE_WORD_F(adr, res) |
39586 | POST_IO |
39587 | RET(12) |
39588 | } |
39589 | |
39590 | // ROXL |
39591 | OPCODE(0xE5E0) |
39592 | { |
39593 | u32 adr, res; |
39594 | u32 src, dst; |
39595 | |
39596 | adr = AREG((Opcode >> 0) & 7) - 2; |
39597 | AREG((Opcode >> 0) & 7) = adr; |
39598 | PRE_IO |
39599 | READ_WORD_F(adr, src) |
39600 | flag_V = 0; |
39601 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39602 | flag_X = flag_C = src >> 7; |
39603 | flag_N = res >> 8; |
39604 | flag_NotZ = res & 0x0000FFFF; |
39605 | WRITE_WORD_F(adr, res) |
39606 | POST_IO |
39607 | RET(14) |
39608 | } |
39609 | |
39610 | // ROXL |
39611 | OPCODE(0xE5E8) |
39612 | { |
39613 | u32 adr, res; |
39614 | u32 src, dst; |
39615 | |
39616 | FETCH_SWORD(adr); |
39617 | adr += AREG((Opcode >> 0) & 7); |
39618 | PRE_IO |
39619 | READ_WORD_F(adr, src) |
39620 | flag_V = 0; |
39621 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39622 | flag_X = flag_C = src >> 7; |
39623 | flag_N = res >> 8; |
39624 | flag_NotZ = res & 0x0000FFFF; |
39625 | WRITE_WORD_F(adr, res) |
39626 | POST_IO |
39627 | RET(16) |
39628 | } |
39629 | |
39630 | // ROXL |
39631 | OPCODE(0xE5F0) |
39632 | { |
39633 | u32 adr, res; |
39634 | u32 src, dst; |
39635 | |
39636 | adr = AREG((Opcode >> 0) & 7); |
39637 | DECODE_EXT_WORD |
39638 | PRE_IO |
39639 | READ_WORD_F(adr, src) |
39640 | flag_V = 0; |
39641 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39642 | flag_X = flag_C = src >> 7; |
39643 | flag_N = res >> 8; |
39644 | flag_NotZ = res & 0x0000FFFF; |
39645 | WRITE_WORD_F(adr, res) |
39646 | POST_IO |
39647 | RET(18) |
39648 | } |
39649 | |
39650 | // ROXL |
39651 | OPCODE(0xE5F8) |
39652 | { |
39653 | u32 adr, res; |
39654 | u32 src, dst; |
39655 | |
39656 | FETCH_SWORD(adr); |
39657 | PRE_IO |
39658 | READ_WORD_F(adr, src) |
39659 | flag_V = 0; |
39660 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39661 | flag_X = flag_C = src >> 7; |
39662 | flag_N = res >> 8; |
39663 | flag_NotZ = res & 0x0000FFFF; |
39664 | WRITE_WORD_F(adr, res) |
39665 | POST_IO |
39666 | RET(16) |
39667 | } |
39668 | |
39669 | // ROXL |
39670 | OPCODE(0xE5F9) |
39671 | { |
39672 | u32 adr, res; |
39673 | u32 src, dst; |
39674 | |
39675 | FETCH_LONG(adr); |
39676 | PRE_IO |
39677 | READ_WORD_F(adr, src) |
39678 | flag_V = 0; |
39679 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39680 | flag_X = flag_C = src >> 7; |
39681 | flag_N = res >> 8; |
39682 | flag_NotZ = res & 0x0000FFFF; |
39683 | WRITE_WORD_F(adr, res) |
39684 | POST_IO |
39685 | RET(20) |
39686 | } |
39687 | |
39688 | // ROXL |
39689 | OPCODE(0xE5DF) |
39690 | { |
39691 | u32 adr, res; |
39692 | u32 src, dst; |
39693 | |
39694 | adr = AREG(7); |
39695 | AREG(7) += 2; |
39696 | PRE_IO |
39697 | READ_WORD_F(adr, src) |
39698 | flag_V = 0; |
39699 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39700 | flag_X = flag_C = src >> 7; |
39701 | flag_N = res >> 8; |
39702 | flag_NotZ = res & 0x0000FFFF; |
39703 | WRITE_WORD_F(adr, res) |
39704 | POST_IO |
39705 | RET(12) |
39706 | } |
39707 | |
39708 | // ROXL |
39709 | OPCODE(0xE5E7) |
39710 | { |
39711 | u32 adr, res; |
39712 | u32 src, dst; |
39713 | |
39714 | adr = AREG(7) - 2; |
39715 | AREG(7) = adr; |
39716 | PRE_IO |
39717 | READ_WORD_F(adr, src) |
39718 | flag_V = 0; |
39719 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39720 | flag_X = flag_C = src >> 7; |
39721 | flag_N = res >> 8; |
39722 | flag_NotZ = res & 0x0000FFFF; |
39723 | WRITE_WORD_F(adr, res) |
39724 | POST_IO |
39725 | RET(14) |
39726 | } |
39727 | |
39728 | // ROL |
39729 | OPCODE(0xE7D0) |
39730 | { |
39731 | u32 adr, res; |
39732 | u32 src, dst; |
39733 | |
39734 | adr = AREG((Opcode >> 0) & 7); |
39735 | PRE_IO |
39736 | READ_WORD_F(adr, src) |
39737 | flag_V = 0; |
39738 | flag_C = src >> 7; |
39739 | res = (src << 1) | (src >> 15); |
39740 | flag_N = res >> 8; |
39741 | flag_NotZ = res & 0x0000FFFF; |
39742 | WRITE_WORD_F(adr, res) |
39743 | POST_IO |
39744 | RET(12) |
39745 | } |
39746 | |
39747 | // ROL |
39748 | OPCODE(0xE7D8) |
39749 | { |
39750 | u32 adr, res; |
39751 | u32 src, dst; |
39752 | |
39753 | adr = AREG((Opcode >> 0) & 7); |
39754 | AREG((Opcode >> 0) & 7) += 2; |
39755 | PRE_IO |
39756 | READ_WORD_F(adr, src) |
39757 | flag_V = 0; |
39758 | flag_C = src >> 7; |
39759 | res = (src << 1) | (src >> 15); |
39760 | flag_N = res >> 8; |
39761 | flag_NotZ = res & 0x0000FFFF; |
39762 | WRITE_WORD_F(adr, res) |
39763 | POST_IO |
39764 | RET(12) |
39765 | } |
39766 | |
39767 | // ROL |
39768 | OPCODE(0xE7E0) |
39769 | { |
39770 | u32 adr, res; |
39771 | u32 src, dst; |
39772 | |
39773 | adr = AREG((Opcode >> 0) & 7) - 2; |
39774 | AREG((Opcode >> 0) & 7) = adr; |
39775 | PRE_IO |
39776 | READ_WORD_F(adr, src) |
39777 | flag_V = 0; |
39778 | flag_C = src >> 7; |
39779 | res = (src << 1) | (src >> 15); |
39780 | flag_N = res >> 8; |
39781 | flag_NotZ = res & 0x0000FFFF; |
39782 | WRITE_WORD_F(adr, res) |
39783 | POST_IO |
39784 | RET(14) |
39785 | } |
39786 | |
39787 | // ROL |
39788 | OPCODE(0xE7E8) |
39789 | { |
39790 | u32 adr, res; |
39791 | u32 src, dst; |
39792 | |
39793 | FETCH_SWORD(adr); |
39794 | adr += AREG((Opcode >> 0) & 7); |
39795 | PRE_IO |
39796 | READ_WORD_F(adr, src) |
39797 | flag_V = 0; |
39798 | flag_C = src >> 7; |
39799 | res = (src << 1) | (src >> 15); |
39800 | flag_N = res >> 8; |
39801 | flag_NotZ = res & 0x0000FFFF; |
39802 | WRITE_WORD_F(adr, res) |
39803 | POST_IO |
39804 | RET(16) |
39805 | } |
39806 | |
39807 | // ROL |
39808 | OPCODE(0xE7F0) |
39809 | { |
39810 | u32 adr, res; |
39811 | u32 src, dst; |
39812 | |
39813 | adr = AREG((Opcode >> 0) & 7); |
39814 | DECODE_EXT_WORD |
39815 | PRE_IO |
39816 | READ_WORD_F(adr, src) |
39817 | flag_V = 0; |
39818 | flag_C = src >> 7; |
39819 | res = (src << 1) | (src >> 15); |
39820 | flag_N = res >> 8; |
39821 | flag_NotZ = res & 0x0000FFFF; |
39822 | WRITE_WORD_F(adr, res) |
39823 | POST_IO |
39824 | RET(18) |
39825 | } |
39826 | |
39827 | // ROL |
39828 | OPCODE(0xE7F8) |
39829 | { |
39830 | u32 adr, res; |
39831 | u32 src, dst; |
39832 | |
39833 | FETCH_SWORD(adr); |
39834 | PRE_IO |
39835 | READ_WORD_F(adr, src) |
39836 | flag_V = 0; |
39837 | flag_C = src >> 7; |
39838 | res = (src << 1) | (src >> 15); |
39839 | flag_N = res >> 8; |
39840 | flag_NotZ = res & 0x0000FFFF; |
39841 | WRITE_WORD_F(adr, res) |
39842 | POST_IO |
39843 | RET(16) |
39844 | } |
39845 | |
39846 | // ROL |
39847 | OPCODE(0xE7F9) |
39848 | { |
39849 | u32 adr, res; |
39850 | u32 src, dst; |
39851 | |
39852 | FETCH_LONG(adr); |
39853 | PRE_IO |
39854 | READ_WORD_F(adr, src) |
39855 | flag_V = 0; |
39856 | flag_C = src >> 7; |
39857 | res = (src << 1) | (src >> 15); |
39858 | flag_N = res >> 8; |
39859 | flag_NotZ = res & 0x0000FFFF; |
39860 | WRITE_WORD_F(adr, res) |
39861 | POST_IO |
39862 | RET(20) |
39863 | } |
39864 | |
39865 | // ROL |
39866 | OPCODE(0xE7DF) |
39867 | { |
39868 | u32 adr, res; |
39869 | u32 src, dst; |
39870 | |
39871 | adr = AREG(7); |
39872 | AREG(7) += 2; |
39873 | PRE_IO |
39874 | READ_WORD_F(adr, src) |
39875 | flag_V = 0; |
39876 | flag_C = src >> 7; |
39877 | res = (src << 1) | (src >> 15); |
39878 | flag_N = res >> 8; |
39879 | flag_NotZ = res & 0x0000FFFF; |
39880 | WRITE_WORD_F(adr, res) |
39881 | POST_IO |
39882 | RET(12) |
39883 | } |
39884 | |
39885 | // ROL |
39886 | OPCODE(0xE7E7) |
39887 | { |
39888 | u32 adr, res; |
39889 | u32 src, dst; |
39890 | |
39891 | adr = AREG(7) - 2; |
39892 | AREG(7) = adr; |
39893 | PRE_IO |
39894 | READ_WORD_F(adr, src) |
39895 | flag_V = 0; |
39896 | flag_C = src >> 7; |
39897 | res = (src << 1) | (src >> 15); |
39898 | flag_N = res >> 8; |
39899 | flag_NotZ = res & 0x0000FFFF; |
39900 | WRITE_WORD_F(adr, res) |
39901 | POST_IO |
39902 | RET(14) |
39903 | } |
39904 | |