70357ce5 |
1 | |
ecc8036e |
2 | #ifdef PICODRIVE_HACK |
3 | #define NOT_POLLING g_m68kcontext->not_polling = 1; |
4 | #else |
5 | #define NOT_POLLING |
6 | #endif |
7 | |
70357ce5 |
8 | // ORI |
9 | OPCODE(0x0000) |
10 | { |
11 | u32 adr, res; |
12 | u32 src, dst; |
13 | |
14 | FETCH_BYTE(src); |
15 | res = DREGu8((Opcode >> 0) & 7); |
16 | res |= src; |
17 | flag_C = 0; |
18 | flag_V = 0; |
19 | flag_NotZ = res; |
20 | flag_N = res; |
21 | DREGu8((Opcode >> 0) & 7) = res; |
22 | RET(8) |
23 | } |
24 | |
25 | // ORI |
26 | OPCODE(0x0010) |
27 | { |
28 | u32 adr, res; |
29 | u32 src, dst; |
30 | |
31 | FETCH_BYTE(src); |
32 | adr = AREG((Opcode >> 0) & 7); |
33 | PRE_IO |
34 | READ_BYTE_F(adr, res) |
35 | res |= src; |
36 | flag_C = 0; |
37 | flag_V = 0; |
38 | flag_NotZ = res; |
39 | flag_N = res; |
40 | WRITE_BYTE_F(adr, res) |
41 | POST_IO |
42 | RET(16) |
43 | } |
44 | |
45 | // ORI |
46 | OPCODE(0x0018) |
47 | { |
48 | u32 adr, res; |
49 | u32 src, dst; |
50 | |
51 | FETCH_BYTE(src); |
52 | adr = AREG((Opcode >> 0) & 7); |
53 | AREG((Opcode >> 0) & 7) += 1; |
54 | PRE_IO |
55 | READ_BYTE_F(adr, res) |
56 | res |= src; |
57 | flag_C = 0; |
58 | flag_V = 0; |
59 | flag_NotZ = res; |
60 | flag_N = res; |
61 | WRITE_BYTE_F(adr, res) |
62 | POST_IO |
63 | RET(16) |
64 | } |
65 | |
66 | // ORI |
67 | OPCODE(0x0020) |
68 | { |
69 | u32 adr, res; |
70 | u32 src, dst; |
71 | |
72 | FETCH_BYTE(src); |
73 | adr = AREG((Opcode >> 0) & 7) - 1; |
74 | AREG((Opcode >> 0) & 7) = adr; |
75 | PRE_IO |
76 | READ_BYTE_F(adr, res) |
77 | res |= src; |
78 | flag_C = 0; |
79 | flag_V = 0; |
80 | flag_NotZ = res; |
81 | flag_N = res; |
82 | WRITE_BYTE_F(adr, res) |
83 | POST_IO |
84 | RET(18) |
85 | } |
86 | |
87 | // ORI |
88 | OPCODE(0x0028) |
89 | { |
90 | u32 adr, res; |
91 | u32 src, dst; |
92 | |
93 | FETCH_BYTE(src); |
94 | FETCH_SWORD(adr); |
95 | adr += AREG((Opcode >> 0) & 7); |
96 | PRE_IO |
97 | READ_BYTE_F(adr, res) |
98 | res |= src; |
99 | flag_C = 0; |
100 | flag_V = 0; |
101 | flag_NotZ = res; |
102 | flag_N = res; |
103 | WRITE_BYTE_F(adr, res) |
104 | POST_IO |
105 | RET(20) |
106 | } |
107 | |
108 | // ORI |
109 | OPCODE(0x0030) |
110 | { |
111 | u32 adr, res; |
112 | u32 src, dst; |
113 | |
114 | FETCH_BYTE(src); |
115 | adr = AREG((Opcode >> 0) & 7); |
116 | DECODE_EXT_WORD |
117 | PRE_IO |
118 | READ_BYTE_F(adr, res) |
119 | res |= src; |
120 | flag_C = 0; |
121 | flag_V = 0; |
122 | flag_NotZ = res; |
123 | flag_N = res; |
124 | WRITE_BYTE_F(adr, res) |
125 | POST_IO |
126 | RET(22) |
127 | } |
128 | |
129 | // ORI |
130 | OPCODE(0x0038) |
131 | { |
132 | u32 adr, res; |
133 | u32 src, dst; |
134 | |
135 | FETCH_BYTE(src); |
136 | FETCH_SWORD(adr); |
137 | PRE_IO |
138 | READ_BYTE_F(adr, res) |
139 | res |= src; |
140 | flag_C = 0; |
141 | flag_V = 0; |
142 | flag_NotZ = res; |
143 | flag_N = res; |
144 | WRITE_BYTE_F(adr, res) |
145 | POST_IO |
146 | RET(20) |
147 | } |
148 | |
149 | // ORI |
150 | OPCODE(0x0039) |
151 | { |
152 | u32 adr, res; |
153 | u32 src, dst; |
154 | |
155 | FETCH_BYTE(src); |
156 | FETCH_LONG(adr); |
157 | PRE_IO |
158 | READ_BYTE_F(adr, res) |
159 | res |= src; |
160 | flag_C = 0; |
161 | flag_V = 0; |
162 | flag_NotZ = res; |
163 | flag_N = res; |
164 | WRITE_BYTE_F(adr, res) |
165 | POST_IO |
166 | RET(24) |
167 | } |
168 | |
169 | // ORI |
170 | OPCODE(0x001F) |
171 | { |
172 | u32 adr, res; |
173 | u32 src, dst; |
174 | |
175 | FETCH_BYTE(src); |
176 | adr = AREG(7); |
177 | AREG(7) += 2; |
178 | PRE_IO |
179 | READ_BYTE_F(adr, res) |
180 | res |= src; |
181 | flag_C = 0; |
182 | flag_V = 0; |
183 | flag_NotZ = res; |
184 | flag_N = res; |
185 | WRITE_BYTE_F(adr, res) |
186 | POST_IO |
187 | RET(16) |
188 | } |
189 | |
190 | // ORI |
191 | OPCODE(0x0027) |
192 | { |
193 | u32 adr, res; |
194 | u32 src, dst; |
195 | |
196 | FETCH_BYTE(src); |
197 | adr = AREG(7) - 2; |
198 | AREG(7) = adr; |
199 | PRE_IO |
200 | READ_BYTE_F(adr, res) |
201 | res |= src; |
202 | flag_C = 0; |
203 | flag_V = 0; |
204 | flag_NotZ = res; |
205 | flag_N = res; |
206 | WRITE_BYTE_F(adr, res) |
207 | POST_IO |
208 | RET(18) |
209 | } |
210 | |
211 | // ORI |
212 | OPCODE(0x0040) |
213 | { |
214 | u32 adr, res; |
215 | u32 src, dst; |
216 | |
217 | FETCH_WORD(src); |
218 | res = DREGu16((Opcode >> 0) & 7); |
219 | res |= src; |
220 | flag_C = 0; |
221 | flag_V = 0; |
222 | flag_NotZ = res; |
223 | flag_N = res >> 8; |
224 | DREGu16((Opcode >> 0) & 7) = res; |
225 | RET(8) |
226 | } |
227 | |
228 | // ORI |
229 | OPCODE(0x0050) |
230 | { |
231 | u32 adr, res; |
232 | u32 src, dst; |
233 | |
234 | FETCH_WORD(src); |
235 | adr = AREG((Opcode >> 0) & 7); |
236 | PRE_IO |
237 | READ_WORD_F(adr, res) |
238 | res |= src; |
239 | flag_C = 0; |
240 | flag_V = 0; |
241 | flag_NotZ = res; |
242 | flag_N = res >> 8; |
243 | WRITE_WORD_F(adr, res) |
244 | POST_IO |
245 | RET(16) |
246 | } |
247 | |
248 | // ORI |
249 | OPCODE(0x0058) |
250 | { |
251 | u32 adr, res; |
252 | u32 src, dst; |
253 | |
254 | FETCH_WORD(src); |
255 | adr = AREG((Opcode >> 0) & 7); |
256 | AREG((Opcode >> 0) & 7) += 2; |
257 | PRE_IO |
258 | READ_WORD_F(adr, res) |
259 | res |= src; |
260 | flag_C = 0; |
261 | flag_V = 0; |
262 | flag_NotZ = res; |
263 | flag_N = res >> 8; |
264 | WRITE_WORD_F(adr, res) |
265 | POST_IO |
266 | RET(16) |
267 | } |
268 | |
269 | // ORI |
270 | OPCODE(0x0060) |
271 | { |
272 | u32 adr, res; |
273 | u32 src, dst; |
274 | |
275 | FETCH_WORD(src); |
276 | adr = AREG((Opcode >> 0) & 7) - 2; |
277 | AREG((Opcode >> 0) & 7) = adr; |
278 | PRE_IO |
279 | READ_WORD_F(adr, res) |
280 | res |= src; |
281 | flag_C = 0; |
282 | flag_V = 0; |
283 | flag_NotZ = res; |
284 | flag_N = res >> 8; |
285 | WRITE_WORD_F(adr, res) |
286 | POST_IO |
287 | RET(18) |
288 | } |
289 | |
290 | // ORI |
291 | OPCODE(0x0068) |
292 | { |
293 | u32 adr, res; |
294 | u32 src, dst; |
295 | |
296 | FETCH_WORD(src); |
297 | FETCH_SWORD(adr); |
298 | adr += AREG((Opcode >> 0) & 7); |
299 | PRE_IO |
300 | READ_WORD_F(adr, res) |
301 | res |= src; |
302 | flag_C = 0; |
303 | flag_V = 0; |
304 | flag_NotZ = res; |
305 | flag_N = res >> 8; |
306 | WRITE_WORD_F(adr, res) |
307 | POST_IO |
308 | RET(20) |
309 | } |
310 | |
311 | // ORI |
312 | OPCODE(0x0070) |
313 | { |
314 | u32 adr, res; |
315 | u32 src, dst; |
316 | |
317 | FETCH_WORD(src); |
318 | adr = AREG((Opcode >> 0) & 7); |
319 | DECODE_EXT_WORD |
320 | PRE_IO |
321 | READ_WORD_F(adr, res) |
322 | res |= src; |
323 | flag_C = 0; |
324 | flag_V = 0; |
325 | flag_NotZ = res; |
326 | flag_N = res >> 8; |
327 | WRITE_WORD_F(adr, res) |
328 | POST_IO |
329 | RET(22) |
330 | } |
331 | |
332 | // ORI |
333 | OPCODE(0x0078) |
334 | { |
335 | u32 adr, res; |
336 | u32 src, dst; |
337 | |
338 | FETCH_WORD(src); |
339 | FETCH_SWORD(adr); |
340 | PRE_IO |
341 | READ_WORD_F(adr, res) |
342 | res |= src; |
343 | flag_C = 0; |
344 | flag_V = 0; |
345 | flag_NotZ = res; |
346 | flag_N = res >> 8; |
347 | WRITE_WORD_F(adr, res) |
348 | POST_IO |
349 | RET(20) |
350 | } |
351 | |
352 | // ORI |
353 | OPCODE(0x0079) |
354 | { |
355 | u32 adr, res; |
356 | u32 src, dst; |
357 | |
358 | FETCH_WORD(src); |
359 | FETCH_LONG(adr); |
360 | PRE_IO |
361 | READ_WORD_F(adr, res) |
362 | res |= src; |
363 | flag_C = 0; |
364 | flag_V = 0; |
365 | flag_NotZ = res; |
366 | flag_N = res >> 8; |
367 | WRITE_WORD_F(adr, res) |
368 | POST_IO |
369 | RET(24) |
370 | } |
371 | |
372 | // ORI |
373 | OPCODE(0x005F) |
374 | { |
375 | u32 adr, res; |
376 | u32 src, dst; |
377 | |
378 | FETCH_WORD(src); |
379 | adr = AREG(7); |
380 | AREG(7) += 2; |
381 | PRE_IO |
382 | READ_WORD_F(adr, res) |
383 | res |= src; |
384 | flag_C = 0; |
385 | flag_V = 0; |
386 | flag_NotZ = res; |
387 | flag_N = res >> 8; |
388 | WRITE_WORD_F(adr, res) |
389 | POST_IO |
390 | RET(16) |
391 | } |
392 | |
393 | // ORI |
394 | OPCODE(0x0067) |
395 | { |
396 | u32 adr, res; |
397 | u32 src, dst; |
398 | |
399 | FETCH_WORD(src); |
400 | adr = AREG(7) - 2; |
401 | AREG(7) = adr; |
402 | PRE_IO |
403 | READ_WORD_F(adr, res) |
404 | res |= src; |
405 | flag_C = 0; |
406 | flag_V = 0; |
407 | flag_NotZ = res; |
408 | flag_N = res >> 8; |
409 | WRITE_WORD_F(adr, res) |
410 | POST_IO |
411 | RET(18) |
412 | } |
413 | |
414 | // ORI |
415 | OPCODE(0x0080) |
416 | { |
417 | u32 adr, res; |
418 | u32 src, dst; |
419 | |
420 | FETCH_LONG(src); |
421 | res = DREGu32((Opcode >> 0) & 7); |
422 | res |= src; |
423 | flag_C = 0; |
424 | flag_V = 0; |
425 | flag_NotZ = res; |
426 | flag_N = res >> 24; |
427 | DREGu32((Opcode >> 0) & 7) = res; |
428 | RET(16) |
429 | } |
430 | |
431 | // ORI |
432 | OPCODE(0x0090) |
433 | { |
434 | u32 adr, res; |
435 | u32 src, dst; |
436 | |
437 | FETCH_LONG(src); |
438 | adr = AREG((Opcode >> 0) & 7); |
439 | PRE_IO |
440 | READ_LONG_F(adr, res) |
441 | res |= src; |
442 | flag_C = 0; |
443 | flag_V = 0; |
444 | flag_NotZ = res; |
445 | flag_N = res >> 24; |
446 | WRITE_LONG_F(adr, res) |
447 | POST_IO |
448 | RET(28) |
449 | } |
450 | |
451 | // ORI |
452 | OPCODE(0x0098) |
453 | { |
454 | u32 adr, res; |
455 | u32 src, dst; |
456 | |
457 | FETCH_LONG(src); |
458 | adr = AREG((Opcode >> 0) & 7); |
459 | AREG((Opcode >> 0) & 7) += 4; |
460 | PRE_IO |
461 | READ_LONG_F(adr, res) |
462 | res |= src; |
463 | flag_C = 0; |
464 | flag_V = 0; |
465 | flag_NotZ = res; |
466 | flag_N = res >> 24; |
467 | WRITE_LONG_F(adr, res) |
468 | POST_IO |
469 | RET(28) |
470 | } |
471 | |
472 | // ORI |
473 | OPCODE(0x00A0) |
474 | { |
475 | u32 adr, res; |
476 | u32 src, dst; |
477 | |
478 | FETCH_LONG(src); |
479 | adr = AREG((Opcode >> 0) & 7) - 4; |
480 | AREG((Opcode >> 0) & 7) = adr; |
481 | PRE_IO |
482 | READ_LONG_F(adr, res) |
483 | res |= src; |
484 | flag_C = 0; |
485 | flag_V = 0; |
486 | flag_NotZ = res; |
487 | flag_N = res >> 24; |
488 | WRITE_LONG_F(adr, res) |
489 | POST_IO |
490 | RET(30) |
491 | } |
492 | |
493 | // ORI |
494 | OPCODE(0x00A8) |
495 | { |
496 | u32 adr, res; |
497 | u32 src, dst; |
498 | |
499 | FETCH_LONG(src); |
500 | FETCH_SWORD(adr); |
501 | adr += AREG((Opcode >> 0) & 7); |
502 | PRE_IO |
503 | READ_LONG_F(adr, res) |
504 | res |= src; |
505 | flag_C = 0; |
506 | flag_V = 0; |
507 | flag_NotZ = res; |
508 | flag_N = res >> 24; |
509 | WRITE_LONG_F(adr, res) |
510 | POST_IO |
511 | RET(32) |
512 | } |
513 | |
514 | // ORI |
515 | OPCODE(0x00B0) |
516 | { |
517 | u32 adr, res; |
518 | u32 src, dst; |
519 | |
520 | FETCH_LONG(src); |
521 | adr = AREG((Opcode >> 0) & 7); |
522 | DECODE_EXT_WORD |
523 | PRE_IO |
524 | READ_LONG_F(adr, res) |
525 | res |= src; |
526 | flag_C = 0; |
527 | flag_V = 0; |
528 | flag_NotZ = res; |
529 | flag_N = res >> 24; |
530 | WRITE_LONG_F(adr, res) |
531 | POST_IO |
532 | RET(34) |
533 | } |
534 | |
535 | // ORI |
536 | OPCODE(0x00B8) |
537 | { |
538 | u32 adr, res; |
539 | u32 src, dst; |
540 | |
541 | FETCH_LONG(src); |
542 | FETCH_SWORD(adr); |
543 | PRE_IO |
544 | READ_LONG_F(adr, res) |
545 | res |= src; |
546 | flag_C = 0; |
547 | flag_V = 0; |
548 | flag_NotZ = res; |
549 | flag_N = res >> 24; |
550 | WRITE_LONG_F(adr, res) |
551 | POST_IO |
552 | RET(32) |
553 | } |
554 | |
555 | // ORI |
556 | OPCODE(0x00B9) |
557 | { |
558 | u32 adr, res; |
559 | u32 src, dst; |
560 | |
561 | FETCH_LONG(src); |
562 | FETCH_LONG(adr); |
563 | PRE_IO |
564 | READ_LONG_F(adr, res) |
565 | res |= src; |
566 | flag_C = 0; |
567 | flag_V = 0; |
568 | flag_NotZ = res; |
569 | flag_N = res >> 24; |
570 | WRITE_LONG_F(adr, res) |
571 | POST_IO |
572 | RET(36) |
573 | } |
574 | |
575 | // ORI |
576 | OPCODE(0x009F) |
577 | { |
578 | u32 adr, res; |
579 | u32 src, dst; |
580 | |
581 | FETCH_LONG(src); |
582 | adr = AREG(7); |
583 | AREG(7) += 4; |
584 | PRE_IO |
585 | READ_LONG_F(adr, res) |
586 | res |= src; |
587 | flag_C = 0; |
588 | flag_V = 0; |
589 | flag_NotZ = res; |
590 | flag_N = res >> 24; |
591 | WRITE_LONG_F(adr, res) |
592 | POST_IO |
593 | RET(28) |
594 | } |
595 | |
596 | // ORI |
597 | OPCODE(0x00A7) |
598 | { |
599 | u32 adr, res; |
600 | u32 src, dst; |
601 | |
602 | FETCH_LONG(src); |
603 | adr = AREG(7) - 4; |
604 | AREG(7) = adr; |
605 | PRE_IO |
606 | READ_LONG_F(adr, res) |
607 | res |= src; |
608 | flag_C = 0; |
609 | flag_V = 0; |
610 | flag_NotZ = res; |
611 | flag_N = res >> 24; |
612 | WRITE_LONG_F(adr, res) |
613 | POST_IO |
614 | RET(30) |
615 | } |
616 | |
617 | // ORICCR |
618 | OPCODE(0x003C) |
619 | { |
620 | u32 adr, res; |
621 | u32 src, dst; |
622 | |
623 | FETCH_BYTE(res); |
624 | res &= M68K_CCR_MASK; |
625 | res |= GET_CCR; |
626 | SET_CCR(res) |
627 | RET(20) |
628 | } |
629 | |
630 | // ORISR |
631 | OPCODE(0x007C) |
632 | { |
633 | u32 adr, res; |
634 | u32 src, dst; |
635 | |
636 | if (flag_S) |
637 | { |
638 | u32 res; |
639 | FETCH_WORD(res); |
640 | res &= M68K_SR_MASK; |
641 | res |= GET_SR; |
642 | SET_SR(res) |
643 | CHECK_INT_TO_JUMP(20) |
644 | } |
645 | else |
646 | { |
d0ae0cb4 |
647 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
648 | #ifdef USE_CYCLONE_TIMING |
649 | RET(0) |
650 | #else |
651 | RET(4) |
652 | #endif |
653 | } |
654 | RET(20) |
655 | } |
656 | |
657 | // ANDI |
658 | OPCODE(0x0200) |
659 | { |
660 | u32 adr, res; |
661 | u32 src, dst; |
662 | |
663 | FETCH_BYTE(src); |
664 | res = DREGu8((Opcode >> 0) & 7); |
665 | res &= src; |
666 | flag_C = 0; |
667 | flag_V = 0; |
668 | flag_NotZ = res; |
669 | flag_N = res; |
670 | DREGu8((Opcode >> 0) & 7) = res; |
671 | RET(8) |
672 | } |
673 | |
674 | // ANDI |
675 | OPCODE(0x0210) |
676 | { |
677 | u32 adr, res; |
678 | u32 src, dst; |
679 | |
680 | FETCH_BYTE(src); |
681 | adr = AREG((Opcode >> 0) & 7); |
682 | PRE_IO |
683 | READ_BYTE_F(adr, res) |
684 | res &= src; |
685 | flag_C = 0; |
686 | flag_V = 0; |
687 | flag_NotZ = res; |
688 | flag_N = res; |
689 | WRITE_BYTE_F(adr, res) |
690 | POST_IO |
691 | RET(16) |
692 | } |
693 | |
694 | // ANDI |
695 | OPCODE(0x0218) |
696 | { |
697 | u32 adr, res; |
698 | u32 src, dst; |
699 | |
700 | FETCH_BYTE(src); |
701 | adr = AREG((Opcode >> 0) & 7); |
702 | AREG((Opcode >> 0) & 7) += 1; |
703 | PRE_IO |
704 | READ_BYTE_F(adr, res) |
705 | res &= src; |
706 | flag_C = 0; |
707 | flag_V = 0; |
708 | flag_NotZ = res; |
709 | flag_N = res; |
710 | WRITE_BYTE_F(adr, res) |
711 | POST_IO |
712 | RET(16) |
713 | } |
714 | |
715 | // ANDI |
716 | OPCODE(0x0220) |
717 | { |
718 | u32 adr, res; |
719 | u32 src, dst; |
720 | |
721 | FETCH_BYTE(src); |
722 | adr = AREG((Opcode >> 0) & 7) - 1; |
723 | AREG((Opcode >> 0) & 7) = adr; |
724 | PRE_IO |
725 | READ_BYTE_F(adr, res) |
726 | res &= src; |
727 | flag_C = 0; |
728 | flag_V = 0; |
729 | flag_NotZ = res; |
730 | flag_N = res; |
731 | WRITE_BYTE_F(adr, res) |
732 | POST_IO |
733 | RET(18) |
734 | } |
735 | |
736 | // ANDI |
737 | OPCODE(0x0228) |
738 | { |
739 | u32 adr, res; |
740 | u32 src, dst; |
741 | |
742 | FETCH_BYTE(src); |
743 | FETCH_SWORD(adr); |
744 | adr += AREG((Opcode >> 0) & 7); |
745 | PRE_IO |
746 | READ_BYTE_F(adr, res) |
747 | res &= src; |
748 | flag_C = 0; |
749 | flag_V = 0; |
750 | flag_NotZ = res; |
751 | flag_N = res; |
752 | WRITE_BYTE_F(adr, res) |
753 | POST_IO |
754 | RET(20) |
755 | } |
756 | |
757 | // ANDI |
758 | OPCODE(0x0230) |
759 | { |
760 | u32 adr, res; |
761 | u32 src, dst; |
762 | |
763 | FETCH_BYTE(src); |
764 | adr = AREG((Opcode >> 0) & 7); |
765 | DECODE_EXT_WORD |
766 | PRE_IO |
767 | READ_BYTE_F(adr, res) |
768 | res &= src; |
769 | flag_C = 0; |
770 | flag_V = 0; |
771 | flag_NotZ = res; |
772 | flag_N = res; |
773 | WRITE_BYTE_F(adr, res) |
774 | POST_IO |
775 | RET(22) |
776 | } |
777 | |
778 | // ANDI |
779 | OPCODE(0x0238) |
780 | { |
781 | u32 adr, res; |
782 | u32 src, dst; |
783 | |
784 | FETCH_BYTE(src); |
785 | FETCH_SWORD(adr); |
786 | PRE_IO |
787 | READ_BYTE_F(adr, res) |
788 | res &= src; |
789 | flag_C = 0; |
790 | flag_V = 0; |
791 | flag_NotZ = res; |
792 | flag_N = res; |
793 | WRITE_BYTE_F(adr, res) |
794 | POST_IO |
795 | RET(20) |
796 | } |
797 | |
798 | // ANDI |
799 | OPCODE(0x0239) |
800 | { |
801 | u32 adr, res; |
802 | u32 src, dst; |
803 | |
804 | FETCH_BYTE(src); |
805 | FETCH_LONG(adr); |
806 | PRE_IO |
807 | READ_BYTE_F(adr, res) |
808 | res &= src; |
809 | flag_C = 0; |
810 | flag_V = 0; |
811 | flag_NotZ = res; |
812 | flag_N = res; |
813 | WRITE_BYTE_F(adr, res) |
814 | POST_IO |
815 | RET(24) |
816 | } |
817 | |
818 | // ANDI |
819 | OPCODE(0x021F) |
820 | { |
821 | u32 adr, res; |
822 | u32 src, dst; |
823 | |
824 | FETCH_BYTE(src); |
825 | adr = AREG(7); |
826 | AREG(7) += 2; |
827 | PRE_IO |
828 | READ_BYTE_F(adr, res) |
829 | res &= src; |
830 | flag_C = 0; |
831 | flag_V = 0; |
832 | flag_NotZ = res; |
833 | flag_N = res; |
834 | WRITE_BYTE_F(adr, res) |
835 | POST_IO |
836 | RET(16) |
837 | } |
838 | |
839 | // ANDI |
840 | OPCODE(0x0227) |
841 | { |
842 | u32 adr, res; |
843 | u32 src, dst; |
844 | |
845 | FETCH_BYTE(src); |
846 | adr = AREG(7) - 2; |
847 | AREG(7) = adr; |
848 | PRE_IO |
849 | READ_BYTE_F(adr, res) |
850 | res &= src; |
851 | flag_C = 0; |
852 | flag_V = 0; |
853 | flag_NotZ = res; |
854 | flag_N = res; |
855 | WRITE_BYTE_F(adr, res) |
856 | POST_IO |
857 | RET(18) |
858 | } |
859 | |
860 | // ANDI |
861 | OPCODE(0x0240) |
862 | { |
863 | u32 adr, res; |
864 | u32 src, dst; |
865 | |
866 | FETCH_WORD(src); |
867 | res = DREGu16((Opcode >> 0) & 7); |
868 | res &= src; |
869 | flag_C = 0; |
870 | flag_V = 0; |
871 | flag_NotZ = res; |
872 | flag_N = res >> 8; |
873 | DREGu16((Opcode >> 0) & 7) = res; |
874 | RET(8) |
875 | } |
876 | |
877 | // ANDI |
878 | OPCODE(0x0250) |
879 | { |
880 | u32 adr, res; |
881 | u32 src, dst; |
882 | |
883 | FETCH_WORD(src); |
884 | adr = AREG((Opcode >> 0) & 7); |
885 | PRE_IO |
886 | READ_WORD_F(adr, res) |
887 | res &= src; |
888 | flag_C = 0; |
889 | flag_V = 0; |
890 | flag_NotZ = res; |
891 | flag_N = res >> 8; |
892 | WRITE_WORD_F(adr, res) |
893 | POST_IO |
894 | RET(16) |
895 | } |
896 | |
897 | // ANDI |
898 | OPCODE(0x0258) |
899 | { |
900 | u32 adr, res; |
901 | u32 src, dst; |
902 | |
903 | FETCH_WORD(src); |
904 | adr = AREG((Opcode >> 0) & 7); |
905 | AREG((Opcode >> 0) & 7) += 2; |
906 | PRE_IO |
907 | READ_WORD_F(adr, res) |
908 | res &= src; |
909 | flag_C = 0; |
910 | flag_V = 0; |
911 | flag_NotZ = res; |
912 | flag_N = res >> 8; |
913 | WRITE_WORD_F(adr, res) |
914 | POST_IO |
915 | RET(16) |
916 | } |
917 | |
918 | // ANDI |
919 | OPCODE(0x0260) |
920 | { |
921 | u32 adr, res; |
922 | u32 src, dst; |
923 | |
924 | FETCH_WORD(src); |
925 | adr = AREG((Opcode >> 0) & 7) - 2; |
926 | AREG((Opcode >> 0) & 7) = adr; |
927 | PRE_IO |
928 | READ_WORD_F(adr, res) |
929 | res &= src; |
930 | flag_C = 0; |
931 | flag_V = 0; |
932 | flag_NotZ = res; |
933 | flag_N = res >> 8; |
934 | WRITE_WORD_F(adr, res) |
935 | POST_IO |
936 | RET(18) |
937 | } |
938 | |
939 | // ANDI |
940 | OPCODE(0x0268) |
941 | { |
942 | u32 adr, res; |
943 | u32 src, dst; |
944 | |
945 | FETCH_WORD(src); |
946 | FETCH_SWORD(adr); |
947 | adr += AREG((Opcode >> 0) & 7); |
948 | PRE_IO |
949 | READ_WORD_F(adr, res) |
950 | res &= src; |
951 | flag_C = 0; |
952 | flag_V = 0; |
953 | flag_NotZ = res; |
954 | flag_N = res >> 8; |
955 | WRITE_WORD_F(adr, res) |
956 | POST_IO |
957 | RET(20) |
958 | } |
959 | |
960 | // ANDI |
961 | OPCODE(0x0270) |
962 | { |
963 | u32 adr, res; |
964 | u32 src, dst; |
965 | |
966 | FETCH_WORD(src); |
967 | adr = AREG((Opcode >> 0) & 7); |
968 | DECODE_EXT_WORD |
969 | PRE_IO |
970 | READ_WORD_F(adr, res) |
971 | res &= src; |
972 | flag_C = 0; |
973 | flag_V = 0; |
974 | flag_NotZ = res; |
975 | flag_N = res >> 8; |
976 | WRITE_WORD_F(adr, res) |
977 | POST_IO |
978 | RET(22) |
979 | } |
980 | |
981 | // ANDI |
982 | OPCODE(0x0278) |
983 | { |
984 | u32 adr, res; |
985 | u32 src, dst; |
986 | |
987 | FETCH_WORD(src); |
988 | FETCH_SWORD(adr); |
989 | PRE_IO |
990 | READ_WORD_F(adr, res) |
991 | res &= src; |
992 | flag_C = 0; |
993 | flag_V = 0; |
994 | flag_NotZ = res; |
995 | flag_N = res >> 8; |
996 | WRITE_WORD_F(adr, res) |
997 | POST_IO |
998 | RET(20) |
999 | } |
1000 | |
1001 | // ANDI |
1002 | OPCODE(0x0279) |
1003 | { |
1004 | u32 adr, res; |
1005 | u32 src, dst; |
1006 | |
1007 | FETCH_WORD(src); |
1008 | FETCH_LONG(adr); |
1009 | PRE_IO |
1010 | READ_WORD_F(adr, res) |
1011 | res &= src; |
1012 | flag_C = 0; |
1013 | flag_V = 0; |
1014 | flag_NotZ = res; |
1015 | flag_N = res >> 8; |
1016 | WRITE_WORD_F(adr, res) |
1017 | POST_IO |
1018 | RET(24) |
1019 | } |
1020 | |
1021 | // ANDI |
1022 | OPCODE(0x025F) |
1023 | { |
1024 | u32 adr, res; |
1025 | u32 src, dst; |
1026 | |
1027 | FETCH_WORD(src); |
1028 | adr = AREG(7); |
1029 | AREG(7) += 2; |
1030 | PRE_IO |
1031 | READ_WORD_F(adr, res) |
1032 | res &= src; |
1033 | flag_C = 0; |
1034 | flag_V = 0; |
1035 | flag_NotZ = res; |
1036 | flag_N = res >> 8; |
1037 | WRITE_WORD_F(adr, res) |
1038 | POST_IO |
1039 | RET(16) |
1040 | } |
1041 | |
1042 | // ANDI |
1043 | OPCODE(0x0267) |
1044 | { |
1045 | u32 adr, res; |
1046 | u32 src, dst; |
1047 | |
1048 | FETCH_WORD(src); |
1049 | adr = AREG(7) - 2; |
1050 | AREG(7) = adr; |
1051 | PRE_IO |
1052 | READ_WORD_F(adr, res) |
1053 | res &= src; |
1054 | flag_C = 0; |
1055 | flag_V = 0; |
1056 | flag_NotZ = res; |
1057 | flag_N = res >> 8; |
1058 | WRITE_WORD_F(adr, res) |
1059 | POST_IO |
1060 | RET(18) |
1061 | } |
1062 | |
1063 | // ANDI |
1064 | OPCODE(0x0280) |
1065 | { |
1066 | u32 adr, res; |
1067 | u32 src, dst; |
1068 | |
1069 | FETCH_LONG(src); |
1070 | res = DREGu32((Opcode >> 0) & 7); |
1071 | res &= src; |
1072 | flag_C = 0; |
1073 | flag_V = 0; |
1074 | flag_NotZ = res; |
1075 | flag_N = res >> 24; |
1076 | DREGu32((Opcode >> 0) & 7) = res; |
1077 | #ifdef USE_CYCLONE_TIMING |
1078 | RET(14) |
1079 | #else |
1080 | RET(16) |
1081 | #endif |
1082 | } |
1083 | |
1084 | // ANDI |
1085 | OPCODE(0x0290) |
1086 | { |
1087 | u32 adr, res; |
1088 | u32 src, dst; |
1089 | |
1090 | FETCH_LONG(src); |
1091 | adr = AREG((Opcode >> 0) & 7); |
1092 | PRE_IO |
1093 | READ_LONG_F(adr, res) |
1094 | res &= src; |
1095 | flag_C = 0; |
1096 | flag_V = 0; |
1097 | flag_NotZ = res; |
1098 | flag_N = res >> 24; |
1099 | WRITE_LONG_F(adr, res) |
1100 | POST_IO |
1101 | RET(28) |
1102 | } |
1103 | |
1104 | // ANDI |
1105 | OPCODE(0x0298) |
1106 | { |
1107 | u32 adr, res; |
1108 | u32 src, dst; |
1109 | |
1110 | FETCH_LONG(src); |
1111 | adr = AREG((Opcode >> 0) & 7); |
1112 | AREG((Opcode >> 0) & 7) += 4; |
1113 | PRE_IO |
1114 | READ_LONG_F(adr, res) |
1115 | res &= src; |
1116 | flag_C = 0; |
1117 | flag_V = 0; |
1118 | flag_NotZ = res; |
1119 | flag_N = res >> 24; |
1120 | WRITE_LONG_F(adr, res) |
1121 | POST_IO |
1122 | RET(28) |
1123 | } |
1124 | |
1125 | // ANDI |
1126 | OPCODE(0x02A0) |
1127 | { |
1128 | u32 adr, res; |
1129 | u32 src, dst; |
1130 | |
1131 | FETCH_LONG(src); |
1132 | adr = AREG((Opcode >> 0) & 7) - 4; |
1133 | AREG((Opcode >> 0) & 7) = adr; |
1134 | PRE_IO |
1135 | READ_LONG_F(adr, res) |
1136 | res &= src; |
1137 | flag_C = 0; |
1138 | flag_V = 0; |
1139 | flag_NotZ = res; |
1140 | flag_N = res >> 24; |
1141 | WRITE_LONG_F(adr, res) |
1142 | POST_IO |
1143 | RET(30) |
1144 | } |
1145 | |
1146 | // ANDI |
1147 | OPCODE(0x02A8) |
1148 | { |
1149 | u32 adr, res; |
1150 | u32 src, dst; |
1151 | |
1152 | FETCH_LONG(src); |
1153 | FETCH_SWORD(adr); |
1154 | adr += AREG((Opcode >> 0) & 7); |
1155 | PRE_IO |
1156 | READ_LONG_F(adr, res) |
1157 | res &= src; |
1158 | flag_C = 0; |
1159 | flag_V = 0; |
1160 | flag_NotZ = res; |
1161 | flag_N = res >> 24; |
1162 | WRITE_LONG_F(adr, res) |
1163 | POST_IO |
1164 | RET(32) |
1165 | } |
1166 | |
1167 | // ANDI |
1168 | OPCODE(0x02B0) |
1169 | { |
1170 | u32 adr, res; |
1171 | u32 src, dst; |
1172 | |
1173 | FETCH_LONG(src); |
1174 | adr = AREG((Opcode >> 0) & 7); |
1175 | DECODE_EXT_WORD |
1176 | PRE_IO |
1177 | READ_LONG_F(adr, res) |
1178 | res &= src; |
1179 | flag_C = 0; |
1180 | flag_V = 0; |
1181 | flag_NotZ = res; |
1182 | flag_N = res >> 24; |
1183 | WRITE_LONG_F(adr, res) |
1184 | POST_IO |
1185 | RET(34) |
1186 | } |
1187 | |
1188 | // ANDI |
1189 | OPCODE(0x02B8) |
1190 | { |
1191 | u32 adr, res; |
1192 | u32 src, dst; |
1193 | |
1194 | FETCH_LONG(src); |
1195 | FETCH_SWORD(adr); |
1196 | PRE_IO |
1197 | READ_LONG_F(adr, res) |
1198 | res &= src; |
1199 | flag_C = 0; |
1200 | flag_V = 0; |
1201 | flag_NotZ = res; |
1202 | flag_N = res >> 24; |
1203 | WRITE_LONG_F(adr, res) |
1204 | POST_IO |
1205 | RET(32) |
1206 | } |
1207 | |
1208 | // ANDI |
1209 | OPCODE(0x02B9) |
1210 | { |
1211 | u32 adr, res; |
1212 | u32 src, dst; |
1213 | |
1214 | FETCH_LONG(src); |
1215 | FETCH_LONG(adr); |
1216 | PRE_IO |
1217 | READ_LONG_F(adr, res) |
1218 | res &= src; |
1219 | flag_C = 0; |
1220 | flag_V = 0; |
1221 | flag_NotZ = res; |
1222 | flag_N = res >> 24; |
1223 | WRITE_LONG_F(adr, res) |
1224 | POST_IO |
1225 | RET(36) |
1226 | } |
1227 | |
1228 | // ANDI |
1229 | OPCODE(0x029F) |
1230 | { |
1231 | u32 adr, res; |
1232 | u32 src, dst; |
1233 | |
1234 | FETCH_LONG(src); |
1235 | adr = AREG(7); |
1236 | AREG(7) += 4; |
1237 | PRE_IO |
1238 | READ_LONG_F(adr, res) |
1239 | res &= src; |
1240 | flag_C = 0; |
1241 | flag_V = 0; |
1242 | flag_NotZ = res; |
1243 | flag_N = res >> 24; |
1244 | WRITE_LONG_F(adr, res) |
1245 | POST_IO |
1246 | RET(28) |
1247 | } |
1248 | |
1249 | // ANDI |
1250 | OPCODE(0x02A7) |
1251 | { |
1252 | u32 adr, res; |
1253 | u32 src, dst; |
1254 | |
1255 | FETCH_LONG(src); |
1256 | adr = AREG(7) - 4; |
1257 | AREG(7) = adr; |
1258 | PRE_IO |
1259 | READ_LONG_F(adr, res) |
1260 | res &= src; |
1261 | flag_C = 0; |
1262 | flag_V = 0; |
1263 | flag_NotZ = res; |
1264 | flag_N = res >> 24; |
1265 | WRITE_LONG_F(adr, res) |
1266 | POST_IO |
1267 | RET(30) |
1268 | } |
1269 | |
1270 | // ANDICCR |
1271 | OPCODE(0x023C) |
1272 | { |
1273 | u32 adr, res; |
1274 | u32 src, dst; |
1275 | |
1276 | FETCH_BYTE(res); |
1277 | res &= M68K_CCR_MASK; |
1278 | res &= GET_CCR; |
1279 | SET_CCR(res) |
1280 | RET(20) |
1281 | } |
1282 | |
1283 | // ANDISR |
1284 | OPCODE(0x027C) |
1285 | { |
1286 | u32 adr, res; |
1287 | u32 src, dst; |
1288 | |
1289 | if (flag_S) |
1290 | { |
1291 | FETCH_WORD(res); |
1292 | res &= M68K_SR_MASK; |
1293 | res &= GET_SR; |
1294 | SET_SR(res) |
1295 | if (!flag_S) |
1296 | { |
1297 | res = AREG(7); |
1298 | AREG(7) = ASP; |
1299 | ASP = res; |
1300 | } |
1301 | CHECK_INT_TO_JUMP(20) |
1302 | } |
1303 | else |
1304 | { |
d0ae0cb4 |
1305 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
1306 | RET(4) |
1307 | } |
1308 | RET(20) |
1309 | } |
1310 | |
1311 | // EORI |
1312 | OPCODE(0x0A00) |
1313 | { |
1314 | u32 adr, res; |
1315 | u32 src, dst; |
1316 | |
1317 | FETCH_BYTE(src); |
1318 | res = DREGu8((Opcode >> 0) & 7); |
1319 | res ^= src; |
1320 | flag_C = 0; |
1321 | flag_V = 0; |
1322 | flag_NotZ = res; |
1323 | flag_N = res; |
1324 | DREGu8((Opcode >> 0) & 7) = res; |
1325 | RET(8) |
1326 | } |
1327 | |
1328 | // EORI |
1329 | OPCODE(0x0A10) |
1330 | { |
1331 | u32 adr, res; |
1332 | u32 src, dst; |
1333 | |
1334 | FETCH_BYTE(src); |
1335 | adr = AREG((Opcode >> 0) & 7); |
1336 | PRE_IO |
1337 | READ_BYTE_F(adr, res) |
1338 | res ^= src; |
1339 | flag_C = 0; |
1340 | flag_V = 0; |
1341 | flag_NotZ = res; |
1342 | flag_N = res; |
1343 | WRITE_BYTE_F(adr, res) |
1344 | POST_IO |
1345 | RET(16) |
1346 | } |
1347 | |
1348 | // EORI |
1349 | OPCODE(0x0A18) |
1350 | { |
1351 | u32 adr, res; |
1352 | u32 src, dst; |
1353 | |
1354 | FETCH_BYTE(src); |
1355 | adr = AREG((Opcode >> 0) & 7); |
1356 | AREG((Opcode >> 0) & 7) += 1; |
1357 | PRE_IO |
1358 | READ_BYTE_F(adr, res) |
1359 | res ^= src; |
1360 | flag_C = 0; |
1361 | flag_V = 0; |
1362 | flag_NotZ = res; |
1363 | flag_N = res; |
1364 | WRITE_BYTE_F(adr, res) |
1365 | POST_IO |
1366 | RET(16) |
1367 | } |
1368 | |
1369 | // EORI |
1370 | OPCODE(0x0A20) |
1371 | { |
1372 | u32 adr, res; |
1373 | u32 src, dst; |
1374 | |
1375 | FETCH_BYTE(src); |
1376 | adr = AREG((Opcode >> 0) & 7) - 1; |
1377 | AREG((Opcode >> 0) & 7) = adr; |
1378 | PRE_IO |
1379 | READ_BYTE_F(adr, res) |
1380 | res ^= src; |
1381 | flag_C = 0; |
1382 | flag_V = 0; |
1383 | flag_NotZ = res; |
1384 | flag_N = res; |
1385 | WRITE_BYTE_F(adr, res) |
1386 | POST_IO |
1387 | RET(18) |
1388 | } |
1389 | |
1390 | // EORI |
1391 | OPCODE(0x0A28) |
1392 | { |
1393 | u32 adr, res; |
1394 | u32 src, dst; |
1395 | |
1396 | FETCH_BYTE(src); |
1397 | FETCH_SWORD(adr); |
1398 | adr += AREG((Opcode >> 0) & 7); |
1399 | PRE_IO |
1400 | READ_BYTE_F(adr, res) |
1401 | res ^= src; |
1402 | flag_C = 0; |
1403 | flag_V = 0; |
1404 | flag_NotZ = res; |
1405 | flag_N = res; |
1406 | WRITE_BYTE_F(adr, res) |
1407 | POST_IO |
1408 | RET(20) |
1409 | } |
1410 | |
1411 | // EORI |
1412 | OPCODE(0x0A30) |
1413 | { |
1414 | u32 adr, res; |
1415 | u32 src, dst; |
1416 | |
1417 | FETCH_BYTE(src); |
1418 | adr = AREG((Opcode >> 0) & 7); |
1419 | DECODE_EXT_WORD |
1420 | PRE_IO |
1421 | READ_BYTE_F(adr, res) |
1422 | res ^= src; |
1423 | flag_C = 0; |
1424 | flag_V = 0; |
1425 | flag_NotZ = res; |
1426 | flag_N = res; |
1427 | WRITE_BYTE_F(adr, res) |
1428 | POST_IO |
1429 | RET(22) |
1430 | } |
1431 | |
1432 | // EORI |
1433 | OPCODE(0x0A38) |
1434 | { |
1435 | u32 adr, res; |
1436 | u32 src, dst; |
1437 | |
1438 | FETCH_BYTE(src); |
1439 | FETCH_SWORD(adr); |
1440 | PRE_IO |
1441 | READ_BYTE_F(adr, res) |
1442 | res ^= src; |
1443 | flag_C = 0; |
1444 | flag_V = 0; |
1445 | flag_NotZ = res; |
1446 | flag_N = res; |
1447 | WRITE_BYTE_F(adr, res) |
1448 | POST_IO |
1449 | RET(20) |
1450 | } |
1451 | |
1452 | // EORI |
1453 | OPCODE(0x0A39) |
1454 | { |
1455 | u32 adr, res; |
1456 | u32 src, dst; |
1457 | |
1458 | FETCH_BYTE(src); |
1459 | FETCH_LONG(adr); |
1460 | PRE_IO |
1461 | READ_BYTE_F(adr, res) |
1462 | res ^= src; |
1463 | flag_C = 0; |
1464 | flag_V = 0; |
1465 | flag_NotZ = res; |
1466 | flag_N = res; |
1467 | WRITE_BYTE_F(adr, res) |
1468 | POST_IO |
1469 | RET(24) |
1470 | } |
1471 | |
1472 | // EORI |
1473 | OPCODE(0x0A1F) |
1474 | { |
1475 | u32 adr, res; |
1476 | u32 src, dst; |
1477 | |
1478 | FETCH_BYTE(src); |
1479 | adr = AREG(7); |
1480 | AREG(7) += 2; |
1481 | PRE_IO |
1482 | READ_BYTE_F(adr, res) |
1483 | res ^= src; |
1484 | flag_C = 0; |
1485 | flag_V = 0; |
1486 | flag_NotZ = res; |
1487 | flag_N = res; |
1488 | WRITE_BYTE_F(adr, res) |
1489 | POST_IO |
1490 | RET(16) |
1491 | } |
1492 | |
1493 | // EORI |
1494 | OPCODE(0x0A27) |
1495 | { |
1496 | u32 adr, res; |
1497 | u32 src, dst; |
1498 | |
1499 | FETCH_BYTE(src); |
1500 | adr = AREG(7) - 2; |
1501 | AREG(7) = adr; |
1502 | PRE_IO |
1503 | READ_BYTE_F(adr, res) |
1504 | res ^= src; |
1505 | flag_C = 0; |
1506 | flag_V = 0; |
1507 | flag_NotZ = res; |
1508 | flag_N = res; |
1509 | WRITE_BYTE_F(adr, res) |
1510 | POST_IO |
1511 | RET(18) |
1512 | } |
1513 | |
1514 | // EORI |
1515 | OPCODE(0x0A40) |
1516 | { |
1517 | u32 adr, res; |
1518 | u32 src, dst; |
1519 | |
1520 | FETCH_WORD(src); |
1521 | res = DREGu16((Opcode >> 0) & 7); |
1522 | res ^= src; |
1523 | flag_C = 0; |
1524 | flag_V = 0; |
1525 | flag_NotZ = res; |
1526 | flag_N = res >> 8; |
1527 | DREGu16((Opcode >> 0) & 7) = res; |
1528 | RET(8) |
1529 | } |
1530 | |
1531 | // EORI |
1532 | OPCODE(0x0A50) |
1533 | { |
1534 | u32 adr, res; |
1535 | u32 src, dst; |
1536 | |
1537 | FETCH_WORD(src); |
1538 | adr = AREG((Opcode >> 0) & 7); |
1539 | PRE_IO |
1540 | READ_WORD_F(adr, res) |
1541 | res ^= src; |
1542 | flag_C = 0; |
1543 | flag_V = 0; |
1544 | flag_NotZ = res; |
1545 | flag_N = res >> 8; |
1546 | WRITE_WORD_F(adr, res) |
1547 | POST_IO |
1548 | RET(16) |
1549 | } |
1550 | |
1551 | // EORI |
1552 | OPCODE(0x0A58) |
1553 | { |
1554 | u32 adr, res; |
1555 | u32 src, dst; |
1556 | |
1557 | FETCH_WORD(src); |
1558 | adr = AREG((Opcode >> 0) & 7); |
1559 | AREG((Opcode >> 0) & 7) += 2; |
1560 | PRE_IO |
1561 | READ_WORD_F(adr, res) |
1562 | res ^= src; |
1563 | flag_C = 0; |
1564 | flag_V = 0; |
1565 | flag_NotZ = res; |
1566 | flag_N = res >> 8; |
1567 | WRITE_WORD_F(adr, res) |
1568 | POST_IO |
1569 | RET(16) |
1570 | } |
1571 | |
1572 | // EORI |
1573 | OPCODE(0x0A60) |
1574 | { |
1575 | u32 adr, res; |
1576 | u32 src, dst; |
1577 | |
1578 | FETCH_WORD(src); |
1579 | adr = AREG((Opcode >> 0) & 7) - 2; |
1580 | AREG((Opcode >> 0) & 7) = adr; |
1581 | PRE_IO |
1582 | READ_WORD_F(adr, res) |
1583 | res ^= src; |
1584 | flag_C = 0; |
1585 | flag_V = 0; |
1586 | flag_NotZ = res; |
1587 | flag_N = res >> 8; |
1588 | WRITE_WORD_F(adr, res) |
1589 | POST_IO |
1590 | RET(18) |
1591 | } |
1592 | |
1593 | // EORI |
1594 | OPCODE(0x0A68) |
1595 | { |
1596 | u32 adr, res; |
1597 | u32 src, dst; |
1598 | |
1599 | FETCH_WORD(src); |
1600 | FETCH_SWORD(adr); |
1601 | adr += AREG((Opcode >> 0) & 7); |
1602 | PRE_IO |
1603 | READ_WORD_F(adr, res) |
1604 | res ^= src; |
1605 | flag_C = 0; |
1606 | flag_V = 0; |
1607 | flag_NotZ = res; |
1608 | flag_N = res >> 8; |
1609 | WRITE_WORD_F(adr, res) |
1610 | POST_IO |
1611 | RET(20) |
1612 | } |
1613 | |
1614 | // EORI |
1615 | OPCODE(0x0A70) |
1616 | { |
1617 | u32 adr, res; |
1618 | u32 src, dst; |
1619 | |
1620 | FETCH_WORD(src); |
1621 | adr = AREG((Opcode >> 0) & 7); |
1622 | DECODE_EXT_WORD |
1623 | PRE_IO |
1624 | READ_WORD_F(adr, res) |
1625 | res ^= src; |
1626 | flag_C = 0; |
1627 | flag_V = 0; |
1628 | flag_NotZ = res; |
1629 | flag_N = res >> 8; |
1630 | WRITE_WORD_F(adr, res) |
1631 | POST_IO |
1632 | RET(22) |
1633 | } |
1634 | |
1635 | // EORI |
1636 | OPCODE(0x0A78) |
1637 | { |
1638 | u32 adr, res; |
1639 | u32 src, dst; |
1640 | |
1641 | FETCH_WORD(src); |
1642 | FETCH_SWORD(adr); |
1643 | PRE_IO |
1644 | READ_WORD_F(adr, res) |
1645 | res ^= src; |
1646 | flag_C = 0; |
1647 | flag_V = 0; |
1648 | flag_NotZ = res; |
1649 | flag_N = res >> 8; |
1650 | WRITE_WORD_F(adr, res) |
1651 | POST_IO |
1652 | RET(20) |
1653 | } |
1654 | |
1655 | // EORI |
1656 | OPCODE(0x0A79) |
1657 | { |
1658 | u32 adr, res; |
1659 | u32 src, dst; |
1660 | |
1661 | FETCH_WORD(src); |
1662 | FETCH_LONG(adr); |
1663 | PRE_IO |
1664 | READ_WORD_F(adr, res) |
1665 | res ^= src; |
1666 | flag_C = 0; |
1667 | flag_V = 0; |
1668 | flag_NotZ = res; |
1669 | flag_N = res >> 8; |
1670 | WRITE_WORD_F(adr, res) |
1671 | POST_IO |
1672 | RET(24) |
1673 | } |
1674 | |
1675 | // EORI |
1676 | OPCODE(0x0A5F) |
1677 | { |
1678 | u32 adr, res; |
1679 | u32 src, dst; |
1680 | |
1681 | FETCH_WORD(src); |
1682 | adr = AREG(7); |
1683 | AREG(7) += 2; |
1684 | PRE_IO |
1685 | READ_WORD_F(adr, res) |
1686 | res ^= src; |
1687 | flag_C = 0; |
1688 | flag_V = 0; |
1689 | flag_NotZ = res; |
1690 | flag_N = res >> 8; |
1691 | WRITE_WORD_F(adr, res) |
1692 | POST_IO |
1693 | RET(16) |
1694 | } |
1695 | |
1696 | // EORI |
1697 | OPCODE(0x0A67) |
1698 | { |
1699 | u32 adr, res; |
1700 | u32 src, dst; |
1701 | |
1702 | FETCH_WORD(src); |
1703 | adr = AREG(7) - 2; |
1704 | AREG(7) = adr; |
1705 | PRE_IO |
1706 | READ_WORD_F(adr, res) |
1707 | res ^= src; |
1708 | flag_C = 0; |
1709 | flag_V = 0; |
1710 | flag_NotZ = res; |
1711 | flag_N = res >> 8; |
1712 | WRITE_WORD_F(adr, res) |
1713 | POST_IO |
1714 | RET(18) |
1715 | } |
1716 | |
1717 | // EORI |
1718 | OPCODE(0x0A80) |
1719 | { |
1720 | u32 adr, res; |
1721 | u32 src, dst; |
1722 | |
1723 | FETCH_LONG(src); |
1724 | res = DREGu32((Opcode >> 0) & 7); |
1725 | res ^= src; |
1726 | flag_C = 0; |
1727 | flag_V = 0; |
1728 | flag_NotZ = res; |
1729 | flag_N = res >> 24; |
1730 | DREGu32((Opcode >> 0) & 7) = res; |
1731 | RET(16) |
1732 | } |
1733 | |
1734 | // EORI |
1735 | OPCODE(0x0A90) |
1736 | { |
1737 | u32 adr, res; |
1738 | u32 src, dst; |
1739 | |
1740 | FETCH_LONG(src); |
1741 | adr = AREG((Opcode >> 0) & 7); |
1742 | PRE_IO |
1743 | READ_LONG_F(adr, res) |
1744 | res ^= src; |
1745 | flag_C = 0; |
1746 | flag_V = 0; |
1747 | flag_NotZ = res; |
1748 | flag_N = res >> 24; |
1749 | WRITE_LONG_F(adr, res) |
1750 | POST_IO |
1751 | RET(28) |
1752 | } |
1753 | |
1754 | // EORI |
1755 | OPCODE(0x0A98) |
1756 | { |
1757 | u32 adr, res; |
1758 | u32 src, dst; |
1759 | |
1760 | FETCH_LONG(src); |
1761 | adr = AREG((Opcode >> 0) & 7); |
1762 | AREG((Opcode >> 0) & 7) += 4; |
1763 | PRE_IO |
1764 | READ_LONG_F(adr, res) |
1765 | res ^= src; |
1766 | flag_C = 0; |
1767 | flag_V = 0; |
1768 | flag_NotZ = res; |
1769 | flag_N = res >> 24; |
1770 | WRITE_LONG_F(adr, res) |
1771 | POST_IO |
1772 | RET(28) |
1773 | } |
1774 | |
1775 | // EORI |
1776 | OPCODE(0x0AA0) |
1777 | { |
1778 | u32 adr, res; |
1779 | u32 src, dst; |
1780 | |
1781 | FETCH_LONG(src); |
1782 | adr = AREG((Opcode >> 0) & 7) - 4; |
1783 | AREG((Opcode >> 0) & 7) = adr; |
1784 | PRE_IO |
1785 | READ_LONG_F(adr, res) |
1786 | res ^= src; |
1787 | flag_C = 0; |
1788 | flag_V = 0; |
1789 | flag_NotZ = res; |
1790 | flag_N = res >> 24; |
1791 | WRITE_LONG_F(adr, res) |
1792 | POST_IO |
1793 | RET(30) |
1794 | } |
1795 | |
1796 | // EORI |
1797 | OPCODE(0x0AA8) |
1798 | { |
1799 | u32 adr, res; |
1800 | u32 src, dst; |
1801 | |
1802 | FETCH_LONG(src); |
1803 | FETCH_SWORD(adr); |
1804 | adr += AREG((Opcode >> 0) & 7); |
1805 | PRE_IO |
1806 | READ_LONG_F(adr, res) |
1807 | res ^= src; |
1808 | flag_C = 0; |
1809 | flag_V = 0; |
1810 | flag_NotZ = res; |
1811 | flag_N = res >> 24; |
1812 | WRITE_LONG_F(adr, res) |
1813 | POST_IO |
1814 | RET(32) |
1815 | } |
1816 | |
1817 | // EORI |
1818 | OPCODE(0x0AB0) |
1819 | { |
1820 | u32 adr, res; |
1821 | u32 src, dst; |
1822 | |
1823 | FETCH_LONG(src); |
1824 | adr = AREG((Opcode >> 0) & 7); |
1825 | DECODE_EXT_WORD |
1826 | PRE_IO |
1827 | READ_LONG_F(adr, res) |
1828 | res ^= src; |
1829 | flag_C = 0; |
1830 | flag_V = 0; |
1831 | flag_NotZ = res; |
1832 | flag_N = res >> 24; |
1833 | WRITE_LONG_F(adr, res) |
1834 | POST_IO |
1835 | RET(34) |
1836 | } |
1837 | |
1838 | // EORI |
1839 | OPCODE(0x0AB8) |
1840 | { |
1841 | u32 adr, res; |
1842 | u32 src, dst; |
1843 | |
1844 | FETCH_LONG(src); |
1845 | FETCH_SWORD(adr); |
1846 | PRE_IO |
1847 | READ_LONG_F(adr, res) |
1848 | res ^= src; |
1849 | flag_C = 0; |
1850 | flag_V = 0; |
1851 | flag_NotZ = res; |
1852 | flag_N = res >> 24; |
1853 | WRITE_LONG_F(adr, res) |
1854 | POST_IO |
1855 | RET(32) |
1856 | } |
1857 | |
1858 | // EORI |
1859 | OPCODE(0x0AB9) |
1860 | { |
1861 | u32 adr, res; |
1862 | u32 src, dst; |
1863 | |
1864 | FETCH_LONG(src); |
1865 | FETCH_LONG(adr); |
1866 | PRE_IO |
1867 | READ_LONG_F(adr, res) |
1868 | res ^= src; |
1869 | flag_C = 0; |
1870 | flag_V = 0; |
1871 | flag_NotZ = res; |
1872 | flag_N = res >> 24; |
1873 | WRITE_LONG_F(adr, res) |
1874 | POST_IO |
1875 | RET(36) |
1876 | } |
1877 | |
1878 | // EORI |
1879 | OPCODE(0x0A9F) |
1880 | { |
1881 | u32 adr, res; |
1882 | u32 src, dst; |
1883 | |
1884 | FETCH_LONG(src); |
1885 | adr = AREG(7); |
1886 | AREG(7) += 4; |
1887 | PRE_IO |
1888 | READ_LONG_F(adr, res) |
1889 | res ^= src; |
1890 | flag_C = 0; |
1891 | flag_V = 0; |
1892 | flag_NotZ = res; |
1893 | flag_N = res >> 24; |
1894 | WRITE_LONG_F(adr, res) |
1895 | POST_IO |
1896 | RET(28) |
1897 | } |
1898 | |
1899 | // EORI |
1900 | OPCODE(0x0AA7) |
1901 | { |
1902 | u32 adr, res; |
1903 | u32 src, dst; |
1904 | |
1905 | FETCH_LONG(src); |
1906 | adr = AREG(7) - 4; |
1907 | AREG(7) = adr; |
1908 | PRE_IO |
1909 | READ_LONG_F(adr, res) |
1910 | res ^= src; |
1911 | flag_C = 0; |
1912 | flag_V = 0; |
1913 | flag_NotZ = res; |
1914 | flag_N = res >> 24; |
1915 | WRITE_LONG_F(adr, res) |
1916 | POST_IO |
1917 | RET(30) |
1918 | } |
1919 | |
1920 | // EORICCR |
1921 | OPCODE(0x0A3C) |
1922 | { |
1923 | u32 adr, res; |
1924 | u32 src, dst; |
1925 | |
1926 | FETCH_BYTE(res); |
1927 | res &= M68K_CCR_MASK; |
1928 | res ^= GET_CCR; |
1929 | SET_CCR(res) |
1930 | RET(20) |
1931 | } |
1932 | |
1933 | // EORISR |
1934 | OPCODE(0x0A7C) |
1935 | { |
1936 | u32 adr, res; |
1937 | u32 src, dst; |
1938 | |
1939 | if (flag_S) |
1940 | { |
1941 | FETCH_WORD(res); |
1942 | res &= M68K_SR_MASK; |
1943 | res ^= GET_SR; |
1944 | SET_SR(res) |
1945 | if (!flag_S) |
1946 | { |
1947 | res = AREG(7); |
1948 | AREG(7) = ASP; |
1949 | ASP = res; |
1950 | } |
1951 | CHECK_INT_TO_JUMP(20) |
1952 | } |
1953 | else |
1954 | { |
d0ae0cb4 |
1955 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
1956 | RET(0) |
70357ce5 |
1957 | } |
1958 | RET(20) |
1959 | } |
1960 | |
1961 | // SUBI |
1962 | OPCODE(0x0400) |
1963 | { |
1964 | u32 adr, res; |
1965 | u32 src, dst; |
1966 | |
1967 | FETCH_BYTE(src); |
1968 | dst = DREGu8((Opcode >> 0) & 7); |
1969 | res = dst - src; |
1970 | flag_N = flag_X = flag_C = res; |
1971 | flag_V = (src ^ dst) & (res ^ dst); |
1972 | flag_NotZ = res & 0xFF; |
1973 | DREGu8((Opcode >> 0) & 7) = res; |
1974 | RET(8) |
1975 | } |
1976 | |
1977 | // SUBI |
1978 | OPCODE(0x0410) |
1979 | { |
1980 | u32 adr, res; |
1981 | u32 src, dst; |
1982 | |
1983 | FETCH_BYTE(src); |
1984 | adr = AREG((Opcode >> 0) & 7); |
1985 | PRE_IO |
1986 | READ_BYTE_F(adr, dst) |
1987 | res = dst - src; |
1988 | flag_N = flag_X = flag_C = res; |
1989 | flag_V = (src ^ dst) & (res ^ dst); |
1990 | flag_NotZ = res & 0xFF; |
1991 | WRITE_BYTE_F(adr, res) |
1992 | POST_IO |
1993 | RET(16) |
1994 | } |
1995 | |
1996 | // SUBI |
1997 | OPCODE(0x0418) |
1998 | { |
1999 | u32 adr, res; |
2000 | u32 src, dst; |
2001 | |
2002 | FETCH_BYTE(src); |
2003 | adr = AREG((Opcode >> 0) & 7); |
2004 | AREG((Opcode >> 0) & 7) += 1; |
2005 | PRE_IO |
2006 | READ_BYTE_F(adr, dst) |
2007 | res = dst - src; |
2008 | flag_N = flag_X = flag_C = res; |
2009 | flag_V = (src ^ dst) & (res ^ dst); |
2010 | flag_NotZ = res & 0xFF; |
2011 | WRITE_BYTE_F(adr, res) |
2012 | POST_IO |
2013 | RET(16) |
2014 | } |
2015 | |
2016 | // SUBI |
2017 | OPCODE(0x0420) |
2018 | { |
2019 | u32 adr, res; |
2020 | u32 src, dst; |
2021 | |
2022 | FETCH_BYTE(src); |
2023 | adr = AREG((Opcode >> 0) & 7) - 1; |
2024 | AREG((Opcode >> 0) & 7) = adr; |
2025 | PRE_IO |
2026 | READ_BYTE_F(adr, dst) |
2027 | res = dst - src; |
2028 | flag_N = flag_X = flag_C = res; |
2029 | flag_V = (src ^ dst) & (res ^ dst); |
2030 | flag_NotZ = res & 0xFF; |
2031 | WRITE_BYTE_F(adr, res) |
2032 | POST_IO |
2033 | RET(18) |
2034 | } |
2035 | |
2036 | // SUBI |
2037 | OPCODE(0x0428) |
2038 | { |
2039 | u32 adr, res; |
2040 | u32 src, dst; |
2041 | |
2042 | FETCH_BYTE(src); |
2043 | FETCH_SWORD(adr); |
2044 | adr += AREG((Opcode >> 0) & 7); |
2045 | PRE_IO |
2046 | READ_BYTE_F(adr, dst) |
2047 | res = dst - src; |
2048 | flag_N = flag_X = flag_C = res; |
2049 | flag_V = (src ^ dst) & (res ^ dst); |
2050 | flag_NotZ = res & 0xFF; |
2051 | WRITE_BYTE_F(adr, res) |
2052 | POST_IO |
2053 | RET(20) |
2054 | } |
2055 | |
2056 | // SUBI |
2057 | OPCODE(0x0430) |
2058 | { |
2059 | u32 adr, res; |
2060 | u32 src, dst; |
2061 | |
2062 | FETCH_BYTE(src); |
2063 | adr = AREG((Opcode >> 0) & 7); |
2064 | DECODE_EXT_WORD |
2065 | PRE_IO |
2066 | READ_BYTE_F(adr, dst) |
2067 | res = dst - src; |
2068 | flag_N = flag_X = flag_C = res; |
2069 | flag_V = (src ^ dst) & (res ^ dst); |
2070 | flag_NotZ = res & 0xFF; |
2071 | WRITE_BYTE_F(adr, res) |
2072 | POST_IO |
2073 | RET(22) |
2074 | } |
2075 | |
2076 | // SUBI |
2077 | OPCODE(0x0438) |
2078 | { |
2079 | u32 adr, res; |
2080 | u32 src, dst; |
2081 | |
2082 | FETCH_BYTE(src); |
2083 | FETCH_SWORD(adr); |
2084 | PRE_IO |
2085 | READ_BYTE_F(adr, dst) |
2086 | res = dst - src; |
2087 | flag_N = flag_X = flag_C = res; |
2088 | flag_V = (src ^ dst) & (res ^ dst); |
2089 | flag_NotZ = res & 0xFF; |
2090 | WRITE_BYTE_F(adr, res) |
2091 | POST_IO |
2092 | RET(20) |
2093 | } |
2094 | |
2095 | // SUBI |
2096 | OPCODE(0x0439) |
2097 | { |
2098 | u32 adr, res; |
2099 | u32 src, dst; |
2100 | |
2101 | FETCH_BYTE(src); |
2102 | FETCH_LONG(adr); |
2103 | PRE_IO |
2104 | READ_BYTE_F(adr, dst) |
2105 | res = dst - src; |
2106 | flag_N = flag_X = flag_C = res; |
2107 | flag_V = (src ^ dst) & (res ^ dst); |
2108 | flag_NotZ = res & 0xFF; |
2109 | WRITE_BYTE_F(adr, res) |
2110 | POST_IO |
2111 | RET(24) |
2112 | } |
2113 | |
2114 | // SUBI |
2115 | OPCODE(0x041F) |
2116 | { |
2117 | u32 adr, res; |
2118 | u32 src, dst; |
2119 | |
2120 | FETCH_BYTE(src); |
2121 | adr = AREG(7); |
2122 | AREG(7) += 2; |
2123 | PRE_IO |
2124 | READ_BYTE_F(adr, dst) |
2125 | res = dst - src; |
2126 | flag_N = flag_X = flag_C = res; |
2127 | flag_V = (src ^ dst) & (res ^ dst); |
2128 | flag_NotZ = res & 0xFF; |
2129 | WRITE_BYTE_F(adr, res) |
2130 | POST_IO |
2131 | RET(16) |
2132 | } |
2133 | |
2134 | // SUBI |
2135 | OPCODE(0x0427) |
2136 | { |
2137 | u32 adr, res; |
2138 | u32 src, dst; |
2139 | |
2140 | FETCH_BYTE(src); |
2141 | adr = AREG(7) - 2; |
2142 | AREG(7) = adr; |
2143 | PRE_IO |
2144 | READ_BYTE_F(adr, dst) |
2145 | res = dst - src; |
2146 | flag_N = flag_X = flag_C = res; |
2147 | flag_V = (src ^ dst) & (res ^ dst); |
2148 | flag_NotZ = res & 0xFF; |
2149 | WRITE_BYTE_F(adr, res) |
2150 | POST_IO |
2151 | RET(18) |
2152 | } |
2153 | |
2154 | // SUBI |
2155 | OPCODE(0x0440) |
2156 | { |
2157 | u32 adr, res; |
2158 | u32 src, dst; |
2159 | |
2160 | FETCH_WORD(src); |
2161 | dst = DREGu16((Opcode >> 0) & 7); |
2162 | res = dst - src; |
2163 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2164 | flag_N = flag_X = flag_C = res >> 8; |
2165 | flag_NotZ = res & 0xFFFF; |
2166 | DREGu16((Opcode >> 0) & 7) = res; |
2167 | RET(8) |
2168 | } |
2169 | |
2170 | // SUBI |
2171 | OPCODE(0x0450) |
2172 | { |
2173 | u32 adr, res; |
2174 | u32 src, dst; |
2175 | |
2176 | FETCH_WORD(src); |
2177 | adr = AREG((Opcode >> 0) & 7); |
2178 | PRE_IO |
2179 | READ_WORD_F(adr, dst) |
2180 | res = dst - src; |
2181 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2182 | flag_N = flag_X = flag_C = res >> 8; |
2183 | flag_NotZ = res & 0xFFFF; |
2184 | WRITE_WORD_F(adr, res) |
2185 | POST_IO |
2186 | RET(16) |
2187 | } |
2188 | |
2189 | // SUBI |
2190 | OPCODE(0x0458) |
2191 | { |
2192 | u32 adr, res; |
2193 | u32 src, dst; |
2194 | |
2195 | FETCH_WORD(src); |
2196 | adr = AREG((Opcode >> 0) & 7); |
2197 | AREG((Opcode >> 0) & 7) += 2; |
2198 | PRE_IO |
2199 | READ_WORD_F(adr, dst) |
2200 | res = dst - src; |
2201 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2202 | flag_N = flag_X = flag_C = res >> 8; |
2203 | flag_NotZ = res & 0xFFFF; |
2204 | WRITE_WORD_F(adr, res) |
2205 | POST_IO |
2206 | RET(16) |
2207 | } |
2208 | |
2209 | // SUBI |
2210 | OPCODE(0x0460) |
2211 | { |
2212 | u32 adr, res; |
2213 | u32 src, dst; |
2214 | |
2215 | FETCH_WORD(src); |
2216 | adr = AREG((Opcode >> 0) & 7) - 2; |
2217 | AREG((Opcode >> 0) & 7) = adr; |
2218 | PRE_IO |
2219 | READ_WORD_F(adr, dst) |
2220 | res = dst - src; |
2221 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2222 | flag_N = flag_X = flag_C = res >> 8; |
2223 | flag_NotZ = res & 0xFFFF; |
2224 | WRITE_WORD_F(adr, res) |
2225 | POST_IO |
2226 | RET(18) |
2227 | } |
2228 | |
2229 | // SUBI |
2230 | OPCODE(0x0468) |
2231 | { |
2232 | u32 adr, res; |
2233 | u32 src, dst; |
2234 | |
2235 | FETCH_WORD(src); |
2236 | FETCH_SWORD(adr); |
2237 | adr += AREG((Opcode >> 0) & 7); |
2238 | PRE_IO |
2239 | READ_WORD_F(adr, dst) |
2240 | res = dst - src; |
2241 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2242 | flag_N = flag_X = flag_C = res >> 8; |
2243 | flag_NotZ = res & 0xFFFF; |
2244 | WRITE_WORD_F(adr, res) |
2245 | POST_IO |
2246 | RET(20) |
2247 | } |
2248 | |
2249 | // SUBI |
2250 | OPCODE(0x0470) |
2251 | { |
2252 | u32 adr, res; |
2253 | u32 src, dst; |
2254 | |
2255 | FETCH_WORD(src); |
2256 | adr = AREG((Opcode >> 0) & 7); |
2257 | DECODE_EXT_WORD |
2258 | PRE_IO |
2259 | READ_WORD_F(adr, dst) |
2260 | res = dst - src; |
2261 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2262 | flag_N = flag_X = flag_C = res >> 8; |
2263 | flag_NotZ = res & 0xFFFF; |
2264 | WRITE_WORD_F(adr, res) |
2265 | POST_IO |
2266 | RET(22) |
2267 | } |
2268 | |
2269 | // SUBI |
2270 | OPCODE(0x0478) |
2271 | { |
2272 | u32 adr, res; |
2273 | u32 src, dst; |
2274 | |
2275 | FETCH_WORD(src); |
2276 | FETCH_SWORD(adr); |
2277 | PRE_IO |
2278 | READ_WORD_F(adr, dst) |
2279 | res = dst - src; |
2280 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2281 | flag_N = flag_X = flag_C = res >> 8; |
2282 | flag_NotZ = res & 0xFFFF; |
2283 | WRITE_WORD_F(adr, res) |
2284 | POST_IO |
2285 | RET(20) |
2286 | } |
2287 | |
2288 | // SUBI |
2289 | OPCODE(0x0479) |
2290 | { |
2291 | u32 adr, res; |
2292 | u32 src, dst; |
2293 | |
2294 | FETCH_WORD(src); |
2295 | FETCH_LONG(adr); |
2296 | PRE_IO |
2297 | READ_WORD_F(adr, dst) |
2298 | res = dst - src; |
2299 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2300 | flag_N = flag_X = flag_C = res >> 8; |
2301 | flag_NotZ = res & 0xFFFF; |
2302 | WRITE_WORD_F(adr, res) |
2303 | POST_IO |
2304 | RET(24) |
2305 | } |
2306 | |
2307 | // SUBI |
2308 | OPCODE(0x045F) |
2309 | { |
2310 | u32 adr, res; |
2311 | u32 src, dst; |
2312 | |
2313 | FETCH_WORD(src); |
2314 | adr = AREG(7); |
2315 | AREG(7) += 2; |
2316 | PRE_IO |
2317 | READ_WORD_F(adr, dst) |
2318 | res = dst - src; |
2319 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2320 | flag_N = flag_X = flag_C = res >> 8; |
2321 | flag_NotZ = res & 0xFFFF; |
2322 | WRITE_WORD_F(adr, res) |
2323 | POST_IO |
2324 | RET(16) |
2325 | } |
2326 | |
2327 | // SUBI |
2328 | OPCODE(0x0467) |
2329 | { |
2330 | u32 adr, res; |
2331 | u32 src, dst; |
2332 | |
2333 | FETCH_WORD(src); |
2334 | adr = AREG(7) - 2; |
2335 | AREG(7) = adr; |
2336 | PRE_IO |
2337 | READ_WORD_F(adr, dst) |
2338 | res = dst - src; |
2339 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2340 | flag_N = flag_X = flag_C = res >> 8; |
2341 | flag_NotZ = res & 0xFFFF; |
2342 | WRITE_WORD_F(adr, res) |
2343 | POST_IO |
2344 | RET(18) |
2345 | } |
2346 | |
2347 | // SUBI |
2348 | OPCODE(0x0480) |
2349 | { |
2350 | u32 adr, res; |
2351 | u32 src, dst; |
2352 | |
2353 | FETCH_LONG(src); |
2354 | dst = DREGu32((Opcode >> 0) & 7); |
2355 | res = dst - src; |
2356 | flag_NotZ = res; |
2357 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2358 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2359 | flag_N = res >> 24; |
2360 | DREGu32((Opcode >> 0) & 7) = res; |
2361 | RET(16) |
2362 | } |
2363 | |
2364 | // SUBI |
2365 | OPCODE(0x0490) |
2366 | { |
2367 | u32 adr, res; |
2368 | u32 src, dst; |
2369 | |
2370 | FETCH_LONG(src); |
2371 | adr = AREG((Opcode >> 0) & 7); |
2372 | PRE_IO |
2373 | READ_LONG_F(adr, dst) |
2374 | res = dst - src; |
2375 | flag_NotZ = res; |
2376 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2377 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2378 | flag_N = res >> 24; |
2379 | WRITE_LONG_F(adr, res) |
2380 | POST_IO |
2381 | RET(28) |
2382 | } |
2383 | |
2384 | // SUBI |
2385 | OPCODE(0x0498) |
2386 | { |
2387 | u32 adr, res; |
2388 | u32 src, dst; |
2389 | |
2390 | FETCH_LONG(src); |
2391 | adr = AREG((Opcode >> 0) & 7); |
2392 | AREG((Opcode >> 0) & 7) += 4; |
2393 | PRE_IO |
2394 | READ_LONG_F(adr, dst) |
2395 | res = dst - src; |
2396 | flag_NotZ = res; |
2397 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2398 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2399 | flag_N = res >> 24; |
2400 | WRITE_LONG_F(adr, res) |
2401 | POST_IO |
2402 | RET(28) |
2403 | } |
2404 | |
2405 | // SUBI |
2406 | OPCODE(0x04A0) |
2407 | { |
2408 | u32 adr, res; |
2409 | u32 src, dst; |
2410 | |
2411 | FETCH_LONG(src); |
2412 | adr = AREG((Opcode >> 0) & 7) - 4; |
2413 | AREG((Opcode >> 0) & 7) = adr; |
2414 | PRE_IO |
2415 | READ_LONG_F(adr, dst) |
2416 | res = dst - src; |
2417 | flag_NotZ = res; |
2418 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2419 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2420 | flag_N = res >> 24; |
2421 | WRITE_LONG_F(adr, res) |
2422 | POST_IO |
2423 | RET(30) |
2424 | } |
2425 | |
2426 | // SUBI |
2427 | OPCODE(0x04A8) |
2428 | { |
2429 | u32 adr, res; |
2430 | u32 src, dst; |
2431 | |
2432 | FETCH_LONG(src); |
2433 | FETCH_SWORD(adr); |
2434 | adr += AREG((Opcode >> 0) & 7); |
2435 | PRE_IO |
2436 | READ_LONG_F(adr, dst) |
2437 | res = dst - src; |
2438 | flag_NotZ = res; |
2439 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2440 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2441 | flag_N = res >> 24; |
2442 | WRITE_LONG_F(adr, res) |
2443 | POST_IO |
2444 | RET(32) |
2445 | } |
2446 | |
2447 | // SUBI |
2448 | OPCODE(0x04B0) |
2449 | { |
2450 | u32 adr, res; |
2451 | u32 src, dst; |
2452 | |
2453 | FETCH_LONG(src); |
2454 | adr = AREG((Opcode >> 0) & 7); |
2455 | DECODE_EXT_WORD |
2456 | PRE_IO |
2457 | READ_LONG_F(adr, dst) |
2458 | res = dst - src; |
2459 | flag_NotZ = res; |
2460 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2461 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2462 | flag_N = res >> 24; |
2463 | WRITE_LONG_F(adr, res) |
2464 | POST_IO |
2465 | RET(34) |
2466 | } |
2467 | |
2468 | // SUBI |
2469 | OPCODE(0x04B8) |
2470 | { |
2471 | u32 adr, res; |
2472 | u32 src, dst; |
2473 | |
2474 | FETCH_LONG(src); |
2475 | FETCH_SWORD(adr); |
2476 | PRE_IO |
2477 | READ_LONG_F(adr, dst) |
2478 | res = dst - src; |
2479 | flag_NotZ = res; |
2480 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2481 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2482 | flag_N = res >> 24; |
2483 | WRITE_LONG_F(adr, res) |
2484 | POST_IO |
2485 | RET(32) |
2486 | } |
2487 | |
2488 | // SUBI |
2489 | OPCODE(0x04B9) |
2490 | { |
2491 | u32 adr, res; |
2492 | u32 src, dst; |
2493 | |
2494 | FETCH_LONG(src); |
2495 | FETCH_LONG(adr); |
2496 | PRE_IO |
2497 | READ_LONG_F(adr, dst) |
2498 | res = dst - src; |
2499 | flag_NotZ = res; |
2500 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2501 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2502 | flag_N = res >> 24; |
2503 | WRITE_LONG_F(adr, res) |
2504 | POST_IO |
2505 | RET(36) |
2506 | } |
2507 | |
2508 | // SUBI |
2509 | OPCODE(0x049F) |
2510 | { |
2511 | u32 adr, res; |
2512 | u32 src, dst; |
2513 | |
2514 | FETCH_LONG(src); |
2515 | adr = AREG(7); |
2516 | AREG(7) += 4; |
2517 | PRE_IO |
2518 | READ_LONG_F(adr, dst) |
2519 | res = dst - src; |
2520 | flag_NotZ = res; |
2521 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2522 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2523 | flag_N = res >> 24; |
2524 | WRITE_LONG_F(adr, res) |
2525 | POST_IO |
2526 | RET(28) |
2527 | } |
2528 | |
2529 | // SUBI |
2530 | OPCODE(0x04A7) |
2531 | { |
2532 | u32 adr, res; |
2533 | u32 src, dst; |
2534 | |
2535 | FETCH_LONG(src); |
2536 | adr = AREG(7) - 4; |
2537 | AREG(7) = adr; |
2538 | PRE_IO |
2539 | READ_LONG_F(adr, dst) |
2540 | res = dst - src; |
2541 | flag_NotZ = res; |
2542 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2543 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2544 | flag_N = res >> 24; |
2545 | WRITE_LONG_F(adr, res) |
2546 | POST_IO |
2547 | RET(30) |
2548 | } |
2549 | |
2550 | // ADDI |
2551 | OPCODE(0x0600) |
2552 | { |
2553 | u32 adr, res; |
2554 | u32 src, dst; |
2555 | |
2556 | FETCH_BYTE(src); |
2557 | dst = DREGu8((Opcode >> 0) & 7); |
2558 | res = dst + src; |
2559 | flag_N = flag_X = flag_C = res; |
2560 | flag_V = (src ^ res) & (dst ^ res); |
2561 | flag_NotZ = res & 0xFF; |
2562 | DREGu8((Opcode >> 0) & 7) = res; |
2563 | RET(8) |
2564 | } |
2565 | |
2566 | // ADDI |
2567 | OPCODE(0x0610) |
2568 | { |
2569 | u32 adr, res; |
2570 | u32 src, dst; |
2571 | |
2572 | FETCH_BYTE(src); |
2573 | adr = AREG((Opcode >> 0) & 7); |
2574 | PRE_IO |
2575 | READ_BYTE_F(adr, dst) |
2576 | res = dst + src; |
2577 | flag_N = flag_X = flag_C = res; |
2578 | flag_V = (src ^ res) & (dst ^ res); |
2579 | flag_NotZ = res & 0xFF; |
2580 | WRITE_BYTE_F(adr, res) |
2581 | POST_IO |
2582 | RET(16) |
2583 | } |
2584 | |
2585 | // ADDI |
2586 | OPCODE(0x0618) |
2587 | { |
2588 | u32 adr, res; |
2589 | u32 src, dst; |
2590 | |
2591 | FETCH_BYTE(src); |
2592 | adr = AREG((Opcode >> 0) & 7); |
2593 | AREG((Opcode >> 0) & 7) += 1; |
2594 | PRE_IO |
2595 | READ_BYTE_F(adr, dst) |
2596 | res = dst + src; |
2597 | flag_N = flag_X = flag_C = res; |
2598 | flag_V = (src ^ res) & (dst ^ res); |
2599 | flag_NotZ = res & 0xFF; |
2600 | WRITE_BYTE_F(adr, res) |
2601 | POST_IO |
2602 | RET(16) |
2603 | } |
2604 | |
2605 | // ADDI |
2606 | OPCODE(0x0620) |
2607 | { |
2608 | u32 adr, res; |
2609 | u32 src, dst; |
2610 | |
2611 | FETCH_BYTE(src); |
2612 | adr = AREG((Opcode >> 0) & 7) - 1; |
2613 | AREG((Opcode >> 0) & 7) = adr; |
2614 | PRE_IO |
2615 | READ_BYTE_F(adr, dst) |
2616 | res = dst + src; |
2617 | flag_N = flag_X = flag_C = res; |
2618 | flag_V = (src ^ res) & (dst ^ res); |
2619 | flag_NotZ = res & 0xFF; |
2620 | WRITE_BYTE_F(adr, res) |
2621 | POST_IO |
2622 | RET(18) |
2623 | } |
2624 | |
2625 | // ADDI |
2626 | OPCODE(0x0628) |
2627 | { |
2628 | u32 adr, res; |
2629 | u32 src, dst; |
2630 | |
2631 | FETCH_BYTE(src); |
2632 | FETCH_SWORD(adr); |
2633 | adr += AREG((Opcode >> 0) & 7); |
2634 | PRE_IO |
2635 | READ_BYTE_F(adr, dst) |
2636 | res = dst + src; |
2637 | flag_N = flag_X = flag_C = res; |
2638 | flag_V = (src ^ res) & (dst ^ res); |
2639 | flag_NotZ = res & 0xFF; |
2640 | WRITE_BYTE_F(adr, res) |
2641 | POST_IO |
2642 | RET(20) |
2643 | } |
2644 | |
2645 | // ADDI |
2646 | OPCODE(0x0630) |
2647 | { |
2648 | u32 adr, res; |
2649 | u32 src, dst; |
2650 | |
2651 | FETCH_BYTE(src); |
2652 | adr = AREG((Opcode >> 0) & 7); |
2653 | DECODE_EXT_WORD |
2654 | PRE_IO |
2655 | READ_BYTE_F(adr, dst) |
2656 | res = dst + src; |
2657 | flag_N = flag_X = flag_C = res; |
2658 | flag_V = (src ^ res) & (dst ^ res); |
2659 | flag_NotZ = res & 0xFF; |
2660 | WRITE_BYTE_F(adr, res) |
2661 | POST_IO |
2662 | RET(22) |
2663 | } |
2664 | |
2665 | // ADDI |
2666 | OPCODE(0x0638) |
2667 | { |
2668 | u32 adr, res; |
2669 | u32 src, dst; |
2670 | |
2671 | FETCH_BYTE(src); |
2672 | FETCH_SWORD(adr); |
2673 | PRE_IO |
2674 | READ_BYTE_F(adr, dst) |
2675 | res = dst + src; |
2676 | flag_N = flag_X = flag_C = res; |
2677 | flag_V = (src ^ res) & (dst ^ res); |
2678 | flag_NotZ = res & 0xFF; |
2679 | WRITE_BYTE_F(adr, res) |
2680 | POST_IO |
2681 | RET(20) |
2682 | } |
2683 | |
2684 | // ADDI |
2685 | OPCODE(0x0639) |
2686 | { |
2687 | u32 adr, res; |
2688 | u32 src, dst; |
2689 | |
2690 | FETCH_BYTE(src); |
2691 | FETCH_LONG(adr); |
2692 | PRE_IO |
2693 | READ_BYTE_F(adr, dst) |
2694 | res = dst + src; |
2695 | flag_N = flag_X = flag_C = res; |
2696 | flag_V = (src ^ res) & (dst ^ res); |
2697 | flag_NotZ = res & 0xFF; |
2698 | WRITE_BYTE_F(adr, res) |
2699 | POST_IO |
2700 | RET(24) |
2701 | } |
2702 | |
2703 | // ADDI |
2704 | OPCODE(0x061F) |
2705 | { |
2706 | u32 adr, res; |
2707 | u32 src, dst; |
2708 | |
2709 | FETCH_BYTE(src); |
2710 | adr = AREG(7); |
2711 | AREG(7) += 2; |
2712 | PRE_IO |
2713 | READ_BYTE_F(adr, dst) |
2714 | res = dst + src; |
2715 | flag_N = flag_X = flag_C = res; |
2716 | flag_V = (src ^ res) & (dst ^ res); |
2717 | flag_NotZ = res & 0xFF; |
2718 | WRITE_BYTE_F(adr, res) |
2719 | POST_IO |
2720 | RET(16) |
2721 | } |
2722 | |
2723 | // ADDI |
2724 | OPCODE(0x0627) |
2725 | { |
2726 | u32 adr, res; |
2727 | u32 src, dst; |
2728 | |
2729 | FETCH_BYTE(src); |
2730 | adr = AREG(7) - 2; |
2731 | AREG(7) = adr; |
2732 | PRE_IO |
2733 | READ_BYTE_F(adr, dst) |
2734 | res = dst + src; |
2735 | flag_N = flag_X = flag_C = res; |
2736 | flag_V = (src ^ res) & (dst ^ res); |
2737 | flag_NotZ = res & 0xFF; |
2738 | WRITE_BYTE_F(adr, res) |
2739 | POST_IO |
2740 | RET(18) |
2741 | } |
2742 | |
2743 | // ADDI |
2744 | OPCODE(0x0640) |
2745 | { |
2746 | u32 adr, res; |
2747 | u32 src, dst; |
2748 | |
2749 | FETCH_WORD(src); |
2750 | dst = DREGu16((Opcode >> 0) & 7); |
2751 | res = dst + src; |
2752 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2753 | flag_N = flag_X = flag_C = res >> 8; |
2754 | flag_NotZ = res & 0xFFFF; |
2755 | DREGu16((Opcode >> 0) & 7) = res; |
2756 | RET(8) |
2757 | } |
2758 | |
2759 | // ADDI |
2760 | OPCODE(0x0650) |
2761 | { |
2762 | u32 adr, res; |
2763 | u32 src, dst; |
2764 | |
2765 | FETCH_WORD(src); |
2766 | adr = AREG((Opcode >> 0) & 7); |
2767 | PRE_IO |
2768 | READ_WORD_F(adr, dst) |
2769 | res = dst + src; |
2770 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2771 | flag_N = flag_X = flag_C = res >> 8; |
2772 | flag_NotZ = res & 0xFFFF; |
2773 | WRITE_WORD_F(adr, res) |
2774 | POST_IO |
2775 | RET(16) |
2776 | } |
2777 | |
2778 | // ADDI |
2779 | OPCODE(0x0658) |
2780 | { |
2781 | u32 adr, res; |
2782 | u32 src, dst; |
2783 | |
2784 | FETCH_WORD(src); |
2785 | adr = AREG((Opcode >> 0) & 7); |
2786 | AREG((Opcode >> 0) & 7) += 2; |
2787 | PRE_IO |
2788 | READ_WORD_F(adr, dst) |
2789 | res = dst + src; |
2790 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2791 | flag_N = flag_X = flag_C = res >> 8; |
2792 | flag_NotZ = res & 0xFFFF; |
2793 | WRITE_WORD_F(adr, res) |
2794 | POST_IO |
2795 | RET(16) |
2796 | } |
2797 | |
2798 | // ADDI |
2799 | OPCODE(0x0660) |
2800 | { |
2801 | u32 adr, res; |
2802 | u32 src, dst; |
2803 | |
2804 | FETCH_WORD(src); |
2805 | adr = AREG((Opcode >> 0) & 7) - 2; |
2806 | AREG((Opcode >> 0) & 7) = adr; |
2807 | PRE_IO |
2808 | READ_WORD_F(adr, dst) |
2809 | res = dst + src; |
2810 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2811 | flag_N = flag_X = flag_C = res >> 8; |
2812 | flag_NotZ = res & 0xFFFF; |
2813 | WRITE_WORD_F(adr, res) |
2814 | POST_IO |
2815 | RET(18) |
2816 | } |
2817 | |
2818 | // ADDI |
2819 | OPCODE(0x0668) |
2820 | { |
2821 | u32 adr, res; |
2822 | u32 src, dst; |
2823 | |
2824 | FETCH_WORD(src); |
2825 | FETCH_SWORD(adr); |
2826 | adr += AREG((Opcode >> 0) & 7); |
2827 | PRE_IO |
2828 | READ_WORD_F(adr, dst) |
2829 | res = dst + src; |
2830 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2831 | flag_N = flag_X = flag_C = res >> 8; |
2832 | flag_NotZ = res & 0xFFFF; |
2833 | WRITE_WORD_F(adr, res) |
2834 | POST_IO |
2835 | RET(20) |
2836 | } |
2837 | |
2838 | // ADDI |
2839 | OPCODE(0x0670) |
2840 | { |
2841 | u32 adr, res; |
2842 | u32 src, dst; |
2843 | |
2844 | FETCH_WORD(src); |
2845 | adr = AREG((Opcode >> 0) & 7); |
2846 | DECODE_EXT_WORD |
2847 | PRE_IO |
2848 | READ_WORD_F(adr, dst) |
2849 | res = dst + src; |
2850 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2851 | flag_N = flag_X = flag_C = res >> 8; |
2852 | flag_NotZ = res & 0xFFFF; |
2853 | WRITE_WORD_F(adr, res) |
2854 | POST_IO |
2855 | RET(22) |
2856 | } |
2857 | |
2858 | // ADDI |
2859 | OPCODE(0x0678) |
2860 | { |
2861 | u32 adr, res; |
2862 | u32 src, dst; |
2863 | |
2864 | FETCH_WORD(src); |
2865 | FETCH_SWORD(adr); |
2866 | PRE_IO |
2867 | READ_WORD_F(adr, dst) |
2868 | res = dst + src; |
2869 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2870 | flag_N = flag_X = flag_C = res >> 8; |
2871 | flag_NotZ = res & 0xFFFF; |
2872 | WRITE_WORD_F(adr, res) |
2873 | POST_IO |
2874 | RET(20) |
2875 | } |
2876 | |
2877 | // ADDI |
2878 | OPCODE(0x0679) |
2879 | { |
2880 | u32 adr, res; |
2881 | u32 src, dst; |
2882 | |
2883 | FETCH_WORD(src); |
2884 | FETCH_LONG(adr); |
2885 | PRE_IO |
2886 | READ_WORD_F(adr, dst) |
2887 | res = dst + src; |
2888 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2889 | flag_N = flag_X = flag_C = res >> 8; |
2890 | flag_NotZ = res & 0xFFFF; |
2891 | WRITE_WORD_F(adr, res) |
2892 | POST_IO |
2893 | RET(24) |
2894 | } |
2895 | |
2896 | // ADDI |
2897 | OPCODE(0x065F) |
2898 | { |
2899 | u32 adr, res; |
2900 | u32 src, dst; |
2901 | |
2902 | FETCH_WORD(src); |
2903 | adr = AREG(7); |
2904 | AREG(7) += 2; |
2905 | PRE_IO |
2906 | READ_WORD_F(adr, dst) |
2907 | res = dst + src; |
2908 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2909 | flag_N = flag_X = flag_C = res >> 8; |
2910 | flag_NotZ = res & 0xFFFF; |
2911 | WRITE_WORD_F(adr, res) |
2912 | POST_IO |
2913 | RET(16) |
2914 | } |
2915 | |
2916 | // ADDI |
2917 | OPCODE(0x0667) |
2918 | { |
2919 | u32 adr, res; |
2920 | u32 src, dst; |
2921 | |
2922 | FETCH_WORD(src); |
2923 | adr = AREG(7) - 2; |
2924 | AREG(7) = adr; |
2925 | PRE_IO |
2926 | READ_WORD_F(adr, dst) |
2927 | res = dst + src; |
2928 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2929 | flag_N = flag_X = flag_C = res >> 8; |
2930 | flag_NotZ = res & 0xFFFF; |
2931 | WRITE_WORD_F(adr, res) |
2932 | POST_IO |
2933 | RET(18) |
2934 | } |
2935 | |
2936 | // ADDI |
2937 | OPCODE(0x0680) |
2938 | { |
2939 | u32 adr, res; |
2940 | u32 src, dst; |
2941 | |
2942 | FETCH_LONG(src); |
2943 | dst = DREGu32((Opcode >> 0) & 7); |
2944 | res = dst + src; |
2945 | flag_NotZ = res; |
2946 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2947 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2948 | flag_N = res >> 24; |
2949 | DREGu32((Opcode >> 0) & 7) = res; |
2950 | RET(16) |
2951 | } |
2952 | |
2953 | // ADDI |
2954 | OPCODE(0x0690) |
2955 | { |
2956 | u32 adr, res; |
2957 | u32 src, dst; |
2958 | |
2959 | FETCH_LONG(src); |
2960 | adr = AREG((Opcode >> 0) & 7); |
2961 | PRE_IO |
2962 | READ_LONG_F(adr, dst) |
2963 | res = dst + src; |
2964 | flag_NotZ = res; |
2965 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2966 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2967 | flag_N = res >> 24; |
2968 | WRITE_LONG_F(adr, res) |
2969 | POST_IO |
2970 | RET(28) |
2971 | } |
2972 | |
2973 | // ADDI |
2974 | OPCODE(0x0698) |
2975 | { |
2976 | u32 adr, res; |
2977 | u32 src, dst; |
2978 | |
2979 | FETCH_LONG(src); |
2980 | adr = AREG((Opcode >> 0) & 7); |
2981 | AREG((Opcode >> 0) & 7) += 4; |
2982 | PRE_IO |
2983 | READ_LONG_F(adr, dst) |
2984 | res = dst + src; |
2985 | flag_NotZ = res; |
2986 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2987 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2988 | flag_N = res >> 24; |
2989 | WRITE_LONG_F(adr, res) |
2990 | POST_IO |
2991 | RET(28) |
2992 | } |
2993 | |
2994 | // ADDI |
2995 | OPCODE(0x06A0) |
2996 | { |
2997 | u32 adr, res; |
2998 | u32 src, dst; |
2999 | |
3000 | FETCH_LONG(src); |
3001 | adr = AREG((Opcode >> 0) & 7) - 4; |
3002 | AREG((Opcode >> 0) & 7) = adr; |
3003 | PRE_IO |
3004 | READ_LONG_F(adr, dst) |
3005 | res = dst + src; |
3006 | flag_NotZ = res; |
3007 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3008 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3009 | flag_N = res >> 24; |
3010 | WRITE_LONG_F(adr, res) |
3011 | POST_IO |
3012 | RET(30) |
3013 | } |
3014 | |
3015 | // ADDI |
3016 | OPCODE(0x06A8) |
3017 | { |
3018 | u32 adr, res; |
3019 | u32 src, dst; |
3020 | |
3021 | FETCH_LONG(src); |
3022 | FETCH_SWORD(adr); |
3023 | adr += AREG((Opcode >> 0) & 7); |
3024 | PRE_IO |
3025 | READ_LONG_F(adr, dst) |
3026 | res = dst + src; |
3027 | flag_NotZ = res; |
3028 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3029 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3030 | flag_N = res >> 24; |
3031 | WRITE_LONG_F(adr, res) |
3032 | POST_IO |
3033 | RET(32) |
3034 | } |
3035 | |
3036 | // ADDI |
3037 | OPCODE(0x06B0) |
3038 | { |
3039 | u32 adr, res; |
3040 | u32 src, dst; |
3041 | |
3042 | FETCH_LONG(src); |
3043 | adr = AREG((Opcode >> 0) & 7); |
3044 | DECODE_EXT_WORD |
3045 | PRE_IO |
3046 | READ_LONG_F(adr, dst) |
3047 | res = dst + src; |
3048 | flag_NotZ = res; |
3049 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3050 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3051 | flag_N = res >> 24; |
3052 | WRITE_LONG_F(adr, res) |
3053 | POST_IO |
3054 | RET(34) |
3055 | } |
3056 | |
3057 | // ADDI |
3058 | OPCODE(0x06B8) |
3059 | { |
3060 | u32 adr, res; |
3061 | u32 src, dst; |
3062 | |
3063 | FETCH_LONG(src); |
3064 | FETCH_SWORD(adr); |
3065 | PRE_IO |
3066 | READ_LONG_F(adr, dst) |
3067 | res = dst + src; |
3068 | flag_NotZ = res; |
3069 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3070 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3071 | flag_N = res >> 24; |
3072 | WRITE_LONG_F(adr, res) |
3073 | POST_IO |
3074 | RET(32) |
3075 | } |
3076 | |
3077 | // ADDI |
3078 | OPCODE(0x06B9) |
3079 | { |
3080 | u32 adr, res; |
3081 | u32 src, dst; |
3082 | |
3083 | FETCH_LONG(src); |
3084 | FETCH_LONG(adr); |
3085 | PRE_IO |
3086 | READ_LONG_F(adr, dst) |
3087 | res = dst + src; |
3088 | flag_NotZ = res; |
3089 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3090 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3091 | flag_N = res >> 24; |
3092 | WRITE_LONG_F(adr, res) |
3093 | POST_IO |
3094 | RET(36) |
3095 | } |
3096 | |
3097 | // ADDI |
3098 | OPCODE(0x069F) |
3099 | { |
3100 | u32 adr, res; |
3101 | u32 src, dst; |
3102 | |
3103 | FETCH_LONG(src); |
3104 | adr = AREG(7); |
3105 | AREG(7) += 4; |
3106 | PRE_IO |
3107 | READ_LONG_F(adr, dst) |
3108 | res = dst + src; |
3109 | flag_NotZ = res; |
3110 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3111 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3112 | flag_N = res >> 24; |
3113 | WRITE_LONG_F(adr, res) |
3114 | POST_IO |
3115 | RET(28) |
3116 | } |
3117 | |
3118 | // ADDI |
3119 | OPCODE(0x06A7) |
3120 | { |
3121 | u32 adr, res; |
3122 | u32 src, dst; |
3123 | |
3124 | FETCH_LONG(src); |
3125 | adr = AREG(7) - 4; |
3126 | AREG(7) = adr; |
3127 | PRE_IO |
3128 | READ_LONG_F(adr, dst) |
3129 | res = dst + src; |
3130 | flag_NotZ = res; |
3131 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3132 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3133 | flag_N = res >> 24; |
3134 | WRITE_LONG_F(adr, res) |
3135 | POST_IO |
3136 | RET(30) |
3137 | } |
3138 | |
3139 | // CMPI |
3140 | OPCODE(0x0C00) |
3141 | { |
3142 | u32 adr, res; |
3143 | u32 src, dst; |
3144 | |
3145 | FETCH_BYTE(src); |
3146 | dst = DREGu8((Opcode >> 0) & 7); |
3147 | res = dst - src; |
3148 | flag_N = flag_C = res; |
3149 | flag_V = (src ^ dst) & (res ^ dst); |
3150 | flag_NotZ = res & 0xFF; |
3151 | RET(8) |
3152 | } |
3153 | |
3154 | // CMPI |
3155 | OPCODE(0x0C10) |
3156 | { |
3157 | u32 adr, res; |
3158 | u32 src, dst; |
3159 | |
3160 | FETCH_BYTE(src); |
3161 | adr = AREG((Opcode >> 0) & 7); |
3162 | PRE_IO |
3163 | READ_BYTE_F(adr, dst) |
3164 | res = dst - src; |
3165 | flag_N = flag_C = res; |
3166 | flag_V = (src ^ dst) & (res ^ dst); |
3167 | flag_NotZ = res & 0xFF; |
3168 | POST_IO |
3169 | RET(12) |
3170 | } |
3171 | |
3172 | // CMPI |
3173 | OPCODE(0x0C18) |
3174 | { |
3175 | u32 adr, res; |
3176 | u32 src, dst; |
3177 | |
3178 | FETCH_BYTE(src); |
3179 | adr = AREG((Opcode >> 0) & 7); |
3180 | AREG((Opcode >> 0) & 7) += 1; |
3181 | PRE_IO |
3182 | READ_BYTE_F(adr, dst) |
3183 | res = dst - src; |
3184 | flag_N = flag_C = res; |
3185 | flag_V = (src ^ dst) & (res ^ dst); |
3186 | flag_NotZ = res & 0xFF; |
3187 | POST_IO |
3188 | RET(12) |
3189 | } |
3190 | |
3191 | // CMPI |
3192 | OPCODE(0x0C20) |
3193 | { |
3194 | u32 adr, res; |
3195 | u32 src, dst; |
3196 | |
3197 | FETCH_BYTE(src); |
3198 | adr = AREG((Opcode >> 0) & 7) - 1; |
3199 | AREG((Opcode >> 0) & 7) = adr; |
3200 | PRE_IO |
3201 | READ_BYTE_F(adr, dst) |
3202 | res = dst - src; |
3203 | flag_N = flag_C = res; |
3204 | flag_V = (src ^ dst) & (res ^ dst); |
3205 | flag_NotZ = res & 0xFF; |
3206 | POST_IO |
3207 | RET(14) |
3208 | } |
3209 | |
3210 | // CMPI |
3211 | OPCODE(0x0C28) |
3212 | { |
3213 | u32 adr, res; |
3214 | u32 src, dst; |
3215 | |
3216 | FETCH_BYTE(src); |
3217 | FETCH_SWORD(adr); |
3218 | adr += AREG((Opcode >> 0) & 7); |
3219 | PRE_IO |
3220 | READ_BYTE_F(adr, dst) |
3221 | res = dst - src; |
3222 | flag_N = flag_C = res; |
3223 | flag_V = (src ^ dst) & (res ^ dst); |
3224 | flag_NotZ = res & 0xFF; |
3225 | POST_IO |
3226 | RET(16) |
3227 | } |
3228 | |
3229 | // CMPI |
3230 | OPCODE(0x0C30) |
3231 | { |
3232 | u32 adr, res; |
3233 | u32 src, dst; |
3234 | |
3235 | FETCH_BYTE(src); |
3236 | adr = AREG((Opcode >> 0) & 7); |
3237 | DECODE_EXT_WORD |
3238 | PRE_IO |
3239 | READ_BYTE_F(adr, dst) |
3240 | res = dst - src; |
3241 | flag_N = flag_C = res; |
3242 | flag_V = (src ^ dst) & (res ^ dst); |
3243 | flag_NotZ = res & 0xFF; |
3244 | POST_IO |
3245 | RET(18) |
3246 | } |
3247 | |
3248 | // CMPI |
3249 | OPCODE(0x0C38) |
3250 | { |
3251 | u32 adr, res; |
3252 | u32 src, dst; |
3253 | |
3254 | FETCH_BYTE(src); |
3255 | FETCH_SWORD(adr); |
3256 | PRE_IO |
3257 | READ_BYTE_F(adr, dst) |
3258 | res = dst - src; |
3259 | flag_N = flag_C = res; |
3260 | flag_V = (src ^ dst) & (res ^ dst); |
3261 | flag_NotZ = res & 0xFF; |
3262 | POST_IO |
3263 | RET(16) |
3264 | } |
3265 | |
3266 | // CMPI |
3267 | OPCODE(0x0C39) |
3268 | { |
3269 | u32 adr, res; |
3270 | u32 src, dst; |
3271 | |
3272 | FETCH_BYTE(src); |
3273 | FETCH_LONG(adr); |
3274 | PRE_IO |
3275 | READ_BYTE_F(adr, dst) |
3276 | res = dst - src; |
3277 | flag_N = flag_C = res; |
3278 | flag_V = (src ^ dst) & (res ^ dst); |
3279 | flag_NotZ = res & 0xFF; |
3280 | POST_IO |
3281 | RET(20) |
3282 | } |
3283 | |
3284 | // CMPI |
3285 | OPCODE(0x0C1F) |
3286 | { |
3287 | u32 adr, res; |
3288 | u32 src, dst; |
3289 | |
3290 | FETCH_BYTE(src); |
3291 | adr = AREG(7); |
3292 | AREG(7) += 2; |
3293 | PRE_IO |
3294 | READ_BYTE_F(adr, dst) |
3295 | res = dst - src; |
3296 | flag_N = flag_C = res; |
3297 | flag_V = (src ^ dst) & (res ^ dst); |
3298 | flag_NotZ = res & 0xFF; |
3299 | POST_IO |
3300 | RET(12) |
3301 | } |
3302 | |
3303 | // CMPI |
3304 | OPCODE(0x0C27) |
3305 | { |
3306 | u32 adr, res; |
3307 | u32 src, dst; |
3308 | |
3309 | FETCH_BYTE(src); |
3310 | adr = AREG(7) - 2; |
3311 | AREG(7) = adr; |
3312 | PRE_IO |
3313 | READ_BYTE_F(adr, dst) |
3314 | res = dst - src; |
3315 | flag_N = flag_C = res; |
3316 | flag_V = (src ^ dst) & (res ^ dst); |
3317 | flag_NotZ = res & 0xFF; |
3318 | POST_IO |
3319 | RET(14) |
3320 | } |
3321 | |
3322 | // CMPI |
3323 | OPCODE(0x0C40) |
3324 | { |
3325 | u32 adr, res; |
3326 | u32 src, dst; |
3327 | |
3328 | FETCH_WORD(src); |
3329 | dst = DREGu16((Opcode >> 0) & 7); |
3330 | res = dst - src; |
3331 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3332 | flag_N = flag_C = res >> 8; |
3333 | flag_NotZ = res & 0xFFFF; |
3334 | RET(8) |
3335 | } |
3336 | |
3337 | // CMPI |
3338 | OPCODE(0x0C50) |
3339 | { |
3340 | u32 adr, res; |
3341 | u32 src, dst; |
3342 | |
3343 | FETCH_WORD(src); |
3344 | adr = AREG((Opcode >> 0) & 7); |
3345 | PRE_IO |
3346 | READ_WORD_F(adr, dst) |
3347 | res = dst - src; |
3348 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3349 | flag_N = flag_C = res >> 8; |
3350 | flag_NotZ = res & 0xFFFF; |
3351 | POST_IO |
3352 | RET(12) |
3353 | } |
3354 | |
3355 | // CMPI |
3356 | OPCODE(0x0C58) |
3357 | { |
3358 | u32 adr, res; |
3359 | u32 src, dst; |
3360 | |
3361 | FETCH_WORD(src); |
3362 | adr = AREG((Opcode >> 0) & 7); |
3363 | AREG((Opcode >> 0) & 7) += 2; |
3364 | PRE_IO |
3365 | READ_WORD_F(adr, dst) |
3366 | res = dst - src; |
3367 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3368 | flag_N = flag_C = res >> 8; |
3369 | flag_NotZ = res & 0xFFFF; |
3370 | POST_IO |
3371 | RET(12) |
3372 | } |
3373 | |
3374 | // CMPI |
3375 | OPCODE(0x0C60) |
3376 | { |
3377 | u32 adr, res; |
3378 | u32 src, dst; |
3379 | |
3380 | FETCH_WORD(src); |
3381 | adr = AREG((Opcode >> 0) & 7) - 2; |
3382 | AREG((Opcode >> 0) & 7) = adr; |
3383 | PRE_IO |
3384 | READ_WORD_F(adr, dst) |
3385 | res = dst - src; |
3386 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3387 | flag_N = flag_C = res >> 8; |
3388 | flag_NotZ = res & 0xFFFF; |
3389 | POST_IO |
3390 | RET(14) |
3391 | } |
3392 | |
3393 | // CMPI |
3394 | OPCODE(0x0C68) |
3395 | { |
3396 | u32 adr, res; |
3397 | u32 src, dst; |
3398 | |
3399 | FETCH_WORD(src); |
3400 | FETCH_SWORD(adr); |
3401 | adr += AREG((Opcode >> 0) & 7); |
3402 | PRE_IO |
3403 | READ_WORD_F(adr, dst) |
3404 | res = dst - src; |
3405 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3406 | flag_N = flag_C = res >> 8; |
3407 | flag_NotZ = res & 0xFFFF; |
3408 | POST_IO |
3409 | RET(16) |
3410 | } |
3411 | |
3412 | // CMPI |
3413 | OPCODE(0x0C70) |
3414 | { |
3415 | u32 adr, res; |
3416 | u32 src, dst; |
3417 | |
3418 | FETCH_WORD(src); |
3419 | adr = AREG((Opcode >> 0) & 7); |
3420 | DECODE_EXT_WORD |
3421 | PRE_IO |
3422 | READ_WORD_F(adr, dst) |
3423 | res = dst - src; |
3424 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3425 | flag_N = flag_C = res >> 8; |
3426 | flag_NotZ = res & 0xFFFF; |
3427 | POST_IO |
3428 | RET(18) |
3429 | } |
3430 | |
3431 | // CMPI |
3432 | OPCODE(0x0C78) |
3433 | { |
3434 | u32 adr, res; |
3435 | u32 src, dst; |
3436 | |
3437 | FETCH_WORD(src); |
3438 | FETCH_SWORD(adr); |
3439 | PRE_IO |
3440 | READ_WORD_F(adr, dst) |
3441 | res = dst - src; |
3442 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3443 | flag_N = flag_C = res >> 8; |
3444 | flag_NotZ = res & 0xFFFF; |
3445 | POST_IO |
3446 | RET(16) |
3447 | } |
3448 | |
3449 | // CMPI |
3450 | OPCODE(0x0C79) |
3451 | { |
3452 | u32 adr, res; |
3453 | u32 src, dst; |
3454 | |
3455 | FETCH_WORD(src); |
3456 | FETCH_LONG(adr); |
3457 | PRE_IO |
3458 | READ_WORD_F(adr, dst) |
3459 | res = dst - src; |
3460 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3461 | flag_N = flag_C = res >> 8; |
3462 | flag_NotZ = res & 0xFFFF; |
3463 | POST_IO |
3464 | RET(20) |
3465 | } |
3466 | |
3467 | // CMPI |
3468 | OPCODE(0x0C5F) |
3469 | { |
3470 | u32 adr, res; |
3471 | u32 src, dst; |
3472 | |
3473 | FETCH_WORD(src); |
3474 | adr = AREG(7); |
3475 | AREG(7) += 2; |
3476 | PRE_IO |
3477 | READ_WORD_F(adr, dst) |
3478 | res = dst - src; |
3479 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3480 | flag_N = flag_C = res >> 8; |
3481 | flag_NotZ = res & 0xFFFF; |
3482 | POST_IO |
3483 | RET(12) |
3484 | } |
3485 | |
3486 | // CMPI |
3487 | OPCODE(0x0C67) |
3488 | { |
3489 | u32 adr, res; |
3490 | u32 src, dst; |
3491 | |
3492 | FETCH_WORD(src); |
3493 | adr = AREG(7) - 2; |
3494 | AREG(7) = adr; |
3495 | PRE_IO |
3496 | READ_WORD_F(adr, dst) |
3497 | res = dst - src; |
3498 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3499 | flag_N = flag_C = res >> 8; |
3500 | flag_NotZ = res & 0xFFFF; |
3501 | POST_IO |
3502 | RET(14) |
3503 | } |
3504 | |
3505 | // CMPI |
3506 | OPCODE(0x0C80) |
3507 | { |
3508 | u32 adr, res; |
3509 | u32 src, dst; |
3510 | |
3511 | FETCH_LONG(src); |
3512 | dst = DREGu32((Opcode >> 0) & 7); |
3513 | res = dst - src; |
3514 | flag_NotZ = res; |
3515 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3516 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3517 | flag_N = res >> 24; |
3518 | RET(14) |
3519 | } |
3520 | |
3521 | // CMPI |
3522 | OPCODE(0x0C90) |
3523 | { |
3524 | u32 adr, res; |
3525 | u32 src, dst; |
3526 | |
3527 | FETCH_LONG(src); |
3528 | adr = AREG((Opcode >> 0) & 7); |
3529 | PRE_IO |
3530 | READ_LONG_F(adr, dst) |
3531 | res = dst - src; |
3532 | flag_NotZ = res; |
3533 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3534 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3535 | flag_N = res >> 24; |
3536 | POST_IO |
3537 | RET(20) |
3538 | } |
3539 | |
3540 | // CMPI |
3541 | OPCODE(0x0C98) |
3542 | { |
3543 | u32 adr, res; |
3544 | u32 src, dst; |
3545 | |
3546 | FETCH_LONG(src); |
3547 | adr = AREG((Opcode >> 0) & 7); |
3548 | AREG((Opcode >> 0) & 7) += 4; |
3549 | PRE_IO |
3550 | READ_LONG_F(adr, dst) |
3551 | res = dst - src; |
3552 | flag_NotZ = res; |
3553 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3554 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3555 | flag_N = res >> 24; |
3556 | POST_IO |
3557 | RET(20) |
3558 | } |
3559 | |
3560 | // CMPI |
3561 | OPCODE(0x0CA0) |
3562 | { |
3563 | u32 adr, res; |
3564 | u32 src, dst; |
3565 | |
3566 | FETCH_LONG(src); |
3567 | adr = AREG((Opcode >> 0) & 7) - 4; |
3568 | AREG((Opcode >> 0) & 7) = adr; |
3569 | PRE_IO |
3570 | READ_LONG_F(adr, dst) |
3571 | res = dst - src; |
3572 | flag_NotZ = res; |
3573 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3574 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3575 | flag_N = res >> 24; |
3576 | POST_IO |
3577 | RET(22) |
3578 | } |
3579 | |
3580 | // CMPI |
3581 | OPCODE(0x0CA8) |
3582 | { |
3583 | u32 adr, res; |
3584 | u32 src, dst; |
3585 | |
3586 | FETCH_LONG(src); |
3587 | FETCH_SWORD(adr); |
3588 | adr += AREG((Opcode >> 0) & 7); |
3589 | PRE_IO |
3590 | READ_LONG_F(adr, dst) |
3591 | res = dst - src; |
3592 | flag_NotZ = res; |
3593 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3594 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3595 | flag_N = res >> 24; |
3596 | POST_IO |
3597 | RET(24) |
3598 | } |
3599 | |
3600 | // CMPI |
3601 | OPCODE(0x0CB0) |
3602 | { |
3603 | u32 adr, res; |
3604 | u32 src, dst; |
3605 | |
3606 | FETCH_LONG(src); |
3607 | adr = AREG((Opcode >> 0) & 7); |
3608 | DECODE_EXT_WORD |
3609 | PRE_IO |
3610 | READ_LONG_F(adr, dst) |
3611 | res = dst - src; |
3612 | flag_NotZ = res; |
3613 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3614 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3615 | flag_N = res >> 24; |
3616 | POST_IO |
3617 | RET(26) |
3618 | } |
3619 | |
3620 | // CMPI |
3621 | OPCODE(0x0CB8) |
3622 | { |
3623 | u32 adr, res; |
3624 | u32 src, dst; |
3625 | |
3626 | FETCH_LONG(src); |
3627 | FETCH_SWORD(adr); |
3628 | PRE_IO |
3629 | READ_LONG_F(adr, dst) |
3630 | res = dst - src; |
3631 | flag_NotZ = res; |
3632 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3633 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3634 | flag_N = res >> 24; |
3635 | POST_IO |
3636 | RET(24) |
3637 | } |
3638 | |
3639 | // CMPI |
3640 | OPCODE(0x0CB9) |
3641 | { |
3642 | u32 adr, res; |
3643 | u32 src, dst; |
3644 | |
3645 | FETCH_LONG(src); |
3646 | FETCH_LONG(adr); |
3647 | PRE_IO |
3648 | READ_LONG_F(adr, dst) |
3649 | res = dst - src; |
3650 | flag_NotZ = res; |
3651 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3652 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3653 | flag_N = res >> 24; |
3654 | POST_IO |
3655 | RET(28) |
3656 | } |
3657 | |
3658 | // CMPI |
3659 | OPCODE(0x0C9F) |
3660 | { |
3661 | u32 adr, res; |
3662 | u32 src, dst; |
3663 | |
3664 | FETCH_LONG(src); |
3665 | adr = AREG(7); |
3666 | AREG(7) += 4; |
3667 | PRE_IO |
3668 | READ_LONG_F(adr, dst) |
3669 | res = dst - src; |
3670 | flag_NotZ = res; |
3671 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3672 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3673 | flag_N = res >> 24; |
3674 | POST_IO |
3675 | RET(20) |
3676 | } |
3677 | |
3678 | // CMPI |
3679 | OPCODE(0x0CA7) |
3680 | { |
3681 | u32 adr, res; |
3682 | u32 src, dst; |
3683 | |
3684 | FETCH_LONG(src); |
3685 | adr = AREG(7) - 4; |
3686 | AREG(7) = adr; |
3687 | PRE_IO |
3688 | READ_LONG_F(adr, dst) |
3689 | res = dst - src; |
3690 | flag_NotZ = res; |
3691 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3692 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3693 | flag_N = res >> 24; |
3694 | POST_IO |
3695 | RET(22) |
3696 | } |
3697 | |
3698 | // BTSTn |
3699 | OPCODE(0x0800) |
3700 | { |
3701 | u32 adr, res; |
3702 | u32 src, dst; |
3703 | |
3704 | FETCH_BYTE(src); |
3705 | src = 1 << (src & 31); |
3706 | res = DREGu32((Opcode >> 0) & 7); |
3707 | flag_NotZ = res & src; |
3708 | RET(10) |
3709 | } |
3710 | |
3711 | // BTSTn |
3712 | OPCODE(0x0810) |
3713 | { |
3714 | u32 adr, res; |
3715 | u32 src, dst; |
3716 | |
3717 | FETCH_BYTE(src); |
3718 | src = 1 << (src & 7); |
3719 | adr = AREG((Opcode >> 0) & 7); |
3720 | PRE_IO |
3721 | READ_BYTE_F(adr, res) |
3722 | flag_NotZ = res & src; |
3723 | POST_IO |
3724 | RET(12) |
3725 | } |
3726 | |
3727 | // BTSTn |
3728 | OPCODE(0x0818) |
3729 | { |
3730 | u32 adr, res; |
3731 | u32 src, dst; |
3732 | |
3733 | FETCH_BYTE(src); |
3734 | src = 1 << (src & 7); |
3735 | adr = AREG((Opcode >> 0) & 7); |
3736 | AREG((Opcode >> 0) & 7) += 1; |
3737 | PRE_IO |
3738 | READ_BYTE_F(adr, res) |
3739 | flag_NotZ = res & src; |
3740 | POST_IO |
3741 | RET(12) |
3742 | } |
3743 | |
3744 | // BTSTn |
3745 | OPCODE(0x0820) |
3746 | { |
3747 | u32 adr, res; |
3748 | u32 src, dst; |
3749 | |
3750 | FETCH_BYTE(src); |
3751 | src = 1 << (src & 7); |
3752 | adr = AREG((Opcode >> 0) & 7) - 1; |
3753 | AREG((Opcode >> 0) & 7) = adr; |
3754 | PRE_IO |
3755 | READ_BYTE_F(adr, res) |
3756 | flag_NotZ = res & src; |
3757 | POST_IO |
3758 | RET(14) |
3759 | } |
3760 | |
3761 | // BTSTn |
3762 | OPCODE(0x0828) |
3763 | { |
3764 | u32 adr, res; |
3765 | u32 src, dst; |
3766 | |
3767 | FETCH_BYTE(src); |
3768 | src = 1 << (src & 7); |
3769 | FETCH_SWORD(adr); |
3770 | adr += AREG((Opcode >> 0) & 7); |
3771 | PRE_IO |
3772 | READ_BYTE_F(adr, res) |
3773 | flag_NotZ = res & src; |
3774 | POST_IO |
3775 | RET(16) |
3776 | } |
3777 | |
3778 | // BTSTn |
3779 | OPCODE(0x0830) |
3780 | { |
3781 | u32 adr, res; |
3782 | u32 src, dst; |
3783 | |
3784 | FETCH_BYTE(src); |
3785 | src = 1 << (src & 7); |
3786 | adr = AREG((Opcode >> 0) & 7); |
3787 | DECODE_EXT_WORD |
3788 | PRE_IO |
3789 | READ_BYTE_F(adr, res) |
3790 | flag_NotZ = res & src; |
3791 | POST_IO |
3792 | RET(18) |
3793 | } |
3794 | |
3795 | // BTSTn |
3796 | OPCODE(0x0838) |
3797 | { |
3798 | u32 adr, res; |
3799 | u32 src, dst; |
3800 | |
3801 | FETCH_BYTE(src); |
3802 | src = 1 << (src & 7); |
3803 | FETCH_SWORD(adr); |
3804 | PRE_IO |
3805 | READ_BYTE_F(adr, res) |
3806 | flag_NotZ = res & src; |
3807 | POST_IO |
3808 | RET(16) |
3809 | } |
3810 | |
3811 | // BTSTn |
3812 | OPCODE(0x0839) |
3813 | { |
3814 | u32 adr, res; |
3815 | u32 src, dst; |
3816 | |
3817 | FETCH_BYTE(src); |
3818 | src = 1 << (src & 7); |
3819 | FETCH_LONG(adr); |
3820 | PRE_IO |
3821 | READ_BYTE_F(adr, res) |
3822 | flag_NotZ = res & src; |
3823 | POST_IO |
3824 | RET(20) |
3825 | } |
3826 | |
3827 | // BTSTn |
3828 | OPCODE(0x083A) |
3829 | { |
3830 | u32 adr, res; |
3831 | u32 src, dst; |
3832 | |
3833 | FETCH_BYTE(src); |
3834 | src = 1 << (src & 7); |
be26eb23 |
3835 | adr = GET_SWORD + GET_PC; |
70357ce5 |
3836 | PC++; |
3837 | PRE_IO |
3838 | READ_BYTE_F(adr, res) |
3839 | flag_NotZ = res & src; |
3840 | POST_IO |
3841 | RET(16) |
3842 | } |
3843 | |
3844 | // BTSTn |
3845 | OPCODE(0x083B) |
3846 | { |
3847 | u32 adr, res; |
3848 | u32 src, dst; |
3849 | |
3850 | FETCH_BYTE(src); |
3851 | src = 1 << (src & 7); |
be26eb23 |
3852 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
3853 | DECODE_EXT_WORD |
3854 | PRE_IO |
3855 | READ_BYTE_F(adr, res) |
3856 | flag_NotZ = res & src; |
3857 | POST_IO |
3858 | RET(18) |
3859 | } |
3860 | |
3861 | // BTSTn |
3862 | OPCODE(0x081F) |
3863 | { |
3864 | u32 adr, res; |
3865 | u32 src, dst; |
3866 | |
3867 | FETCH_BYTE(src); |
3868 | src = 1 << (src & 7); |
3869 | adr = AREG(7); |
3870 | AREG(7) += 2; |
3871 | PRE_IO |
3872 | READ_BYTE_F(adr, res) |
3873 | flag_NotZ = res & src; |
3874 | POST_IO |
3875 | RET(12) |
3876 | } |
3877 | |
3878 | // BTSTn |
3879 | OPCODE(0x0827) |
3880 | { |
3881 | u32 adr, res; |
3882 | u32 src, dst; |
3883 | |
3884 | FETCH_BYTE(src); |
3885 | src = 1 << (src & 7); |
3886 | adr = AREG(7) - 2; |
3887 | AREG(7) = adr; |
3888 | PRE_IO |
3889 | READ_BYTE_F(adr, res) |
3890 | flag_NotZ = res & src; |
3891 | POST_IO |
3892 | RET(14) |
3893 | } |
3894 | |
3895 | // BCHGn |
3896 | OPCODE(0x0840) |
3897 | { |
3898 | u32 adr, res; |
3899 | u32 src, dst; |
3900 | |
3901 | FETCH_BYTE(src); |
3902 | src = 1 << (src & 31); |
3903 | res = DREGu32((Opcode >> 0) & 7); |
3904 | flag_NotZ = res & src; |
3905 | res ^= src; |
3906 | DREGu32((Opcode >> 0) & 7) = res; |
3907 | RET(12) |
3908 | } |
3909 | |
3910 | // BCHGn |
3911 | OPCODE(0x0850) |
3912 | { |
3913 | u32 adr, res; |
3914 | u32 src, dst; |
3915 | |
3916 | FETCH_BYTE(src); |
3917 | src = 1 << (src & 7); |
3918 | adr = AREG((Opcode >> 0) & 7); |
3919 | PRE_IO |
3920 | READ_BYTE_F(adr, res) |
3921 | flag_NotZ = res & src; |
3922 | res ^= src; |
3923 | WRITE_BYTE_F(adr, res) |
3924 | POST_IO |
3925 | RET(16) |
3926 | } |
3927 | |
3928 | // BCHGn |
3929 | OPCODE(0x0858) |
3930 | { |
3931 | u32 adr, res; |
3932 | u32 src, dst; |
3933 | |
3934 | FETCH_BYTE(src); |
3935 | src = 1 << (src & 7); |
3936 | adr = AREG((Opcode >> 0) & 7); |
3937 | AREG((Opcode >> 0) & 7) += 1; |
3938 | PRE_IO |
3939 | READ_BYTE_F(adr, res) |
3940 | flag_NotZ = res & src; |
3941 | res ^= src; |
3942 | WRITE_BYTE_F(adr, res) |
3943 | POST_IO |
3944 | RET(16) |
3945 | } |
3946 | |
3947 | // BCHGn |
3948 | OPCODE(0x0860) |
3949 | { |
3950 | u32 adr, res; |
3951 | u32 src, dst; |
3952 | |
3953 | FETCH_BYTE(src); |
3954 | src = 1 << (src & 7); |
3955 | adr = AREG((Opcode >> 0) & 7) - 1; |
3956 | AREG((Opcode >> 0) & 7) = adr; |
3957 | PRE_IO |
3958 | READ_BYTE_F(adr, res) |
3959 | flag_NotZ = res & src; |
3960 | res ^= src; |
3961 | WRITE_BYTE_F(adr, res) |
3962 | POST_IO |
3963 | RET(18) |
3964 | } |
3965 | |
3966 | // BCHGn |
3967 | OPCODE(0x0868) |
3968 | { |
3969 | u32 adr, res; |
3970 | u32 src, dst; |
3971 | |
3972 | FETCH_BYTE(src); |
3973 | src = 1 << (src & 7); |
3974 | FETCH_SWORD(adr); |
3975 | adr += AREG((Opcode >> 0) & 7); |
3976 | PRE_IO |
3977 | READ_BYTE_F(adr, res) |
3978 | flag_NotZ = res & src; |
3979 | res ^= src; |
3980 | WRITE_BYTE_F(adr, res) |
3981 | POST_IO |
3982 | RET(20) |
3983 | } |
3984 | |
3985 | // BCHGn |
3986 | OPCODE(0x0870) |
3987 | { |
3988 | u32 adr, res; |
3989 | u32 src, dst; |
3990 | |
3991 | FETCH_BYTE(src); |
3992 | src = 1 << (src & 7); |
3993 | adr = AREG((Opcode >> 0) & 7); |
3994 | DECODE_EXT_WORD |
3995 | PRE_IO |
3996 | READ_BYTE_F(adr, res) |
3997 | flag_NotZ = res & src; |
3998 | res ^= src; |
3999 | WRITE_BYTE_F(adr, res) |
4000 | POST_IO |
4001 | RET(22) |
4002 | } |
4003 | |
4004 | // BCHGn |
4005 | OPCODE(0x0878) |
4006 | { |
4007 | u32 adr, res; |
4008 | u32 src, dst; |
4009 | |
4010 | FETCH_BYTE(src); |
4011 | src = 1 << (src & 7); |
4012 | FETCH_SWORD(adr); |
4013 | PRE_IO |
4014 | READ_BYTE_F(adr, res) |
4015 | flag_NotZ = res & src; |
4016 | res ^= src; |
4017 | WRITE_BYTE_F(adr, res) |
4018 | POST_IO |
4019 | RET(20) |
4020 | } |
4021 | |
4022 | // BCHGn |
4023 | OPCODE(0x0879) |
4024 | { |
4025 | u32 adr, res; |
4026 | u32 src, dst; |
4027 | |
4028 | FETCH_BYTE(src); |
4029 | src = 1 << (src & 7); |
4030 | FETCH_LONG(adr); |
4031 | PRE_IO |
4032 | READ_BYTE_F(adr, res) |
4033 | flag_NotZ = res & src; |
4034 | res ^= src; |
4035 | WRITE_BYTE_F(adr, res) |
4036 | POST_IO |
4037 | RET(24) |
4038 | } |
4039 | |
4040 | // BCHGn |
4041 | OPCODE(0x085F) |
4042 | { |
4043 | u32 adr, res; |
4044 | u32 src, dst; |
4045 | |
4046 | FETCH_BYTE(src); |
4047 | src = 1 << (src & 7); |
4048 | adr = AREG(7); |
4049 | AREG(7) += 2; |
4050 | PRE_IO |
4051 | READ_BYTE_F(adr, res) |
4052 | flag_NotZ = res & src; |
4053 | res ^= src; |
4054 | WRITE_BYTE_F(adr, res) |
4055 | POST_IO |
4056 | RET(16) |
4057 | } |
4058 | |
4059 | // BCHGn |
4060 | OPCODE(0x0867) |
4061 | { |
4062 | u32 adr, res; |
4063 | u32 src, dst; |
4064 | |
4065 | FETCH_BYTE(src); |
4066 | src = 1 << (src & 7); |
4067 | adr = AREG(7) - 2; |
4068 | AREG(7) = adr; |
4069 | PRE_IO |
4070 | READ_BYTE_F(adr, res) |
4071 | flag_NotZ = res & src; |
4072 | res ^= src; |
4073 | WRITE_BYTE_F(adr, res) |
4074 | POST_IO |
4075 | RET(18) |
4076 | } |
4077 | |
4078 | // BCLRn |
4079 | OPCODE(0x0880) |
4080 | { |
4081 | u32 adr, res; |
4082 | u32 src, dst; |
4083 | |
4084 | FETCH_BYTE(src); |
4085 | src = 1 << (src & 31); |
4086 | res = DREGu32((Opcode >> 0) & 7); |
4087 | flag_NotZ = res & src; |
4088 | res &= ~src; |
4089 | DREGu32((Opcode >> 0) & 7) = res; |
4090 | RET(14) |
4091 | } |
4092 | |
4093 | // BCLRn |
4094 | OPCODE(0x0890) |
4095 | { |
4096 | u32 adr, res; |
4097 | u32 src, dst; |
4098 | |
4099 | FETCH_BYTE(src); |
4100 | src = 1 << (src & 7); |
4101 | adr = AREG((Opcode >> 0) & 7); |
4102 | PRE_IO |
4103 | READ_BYTE_F(adr, res) |
4104 | flag_NotZ = res & src; |
4105 | res &= ~src; |
4106 | WRITE_BYTE_F(adr, res) |
4107 | POST_IO |
4108 | RET(16) |
4109 | } |
4110 | |
4111 | // BCLRn |
4112 | OPCODE(0x0898) |
4113 | { |
4114 | u32 adr, res; |
4115 | u32 src, dst; |
4116 | |
4117 | FETCH_BYTE(src); |
4118 | src = 1 << (src & 7); |
4119 | adr = AREG((Opcode >> 0) & 7); |
4120 | AREG((Opcode >> 0) & 7) += 1; |
4121 | PRE_IO |
4122 | READ_BYTE_F(adr, res) |
4123 | flag_NotZ = res & src; |
4124 | res &= ~src; |
4125 | WRITE_BYTE_F(adr, res) |
4126 | POST_IO |
4127 | RET(16) |
4128 | } |
4129 | |
4130 | // BCLRn |
4131 | OPCODE(0x08A0) |
4132 | { |
4133 | u32 adr, res; |
4134 | u32 src, dst; |
4135 | |
4136 | FETCH_BYTE(src); |
4137 | src = 1 << (src & 7); |
4138 | adr = AREG((Opcode >> 0) & 7) - 1; |
4139 | AREG((Opcode >> 0) & 7) = adr; |
4140 | PRE_IO |
4141 | READ_BYTE_F(adr, res) |
4142 | flag_NotZ = res & src; |
4143 | res &= ~src; |
4144 | WRITE_BYTE_F(adr, res) |
4145 | POST_IO |
4146 | RET(18) |
4147 | } |
4148 | |
4149 | // BCLRn |
4150 | OPCODE(0x08A8) |
4151 | { |
4152 | u32 adr, res; |
4153 | u32 src, dst; |
4154 | |
4155 | FETCH_BYTE(src); |
4156 | src = 1 << (src & 7); |
4157 | FETCH_SWORD(adr); |
4158 | adr += AREG((Opcode >> 0) & 7); |
4159 | PRE_IO |
4160 | READ_BYTE_F(adr, res) |
4161 | flag_NotZ = res & src; |
4162 | res &= ~src; |
4163 | WRITE_BYTE_F(adr, res) |
4164 | POST_IO |
4165 | RET(20) |
4166 | } |
4167 | |
4168 | // BCLRn |
4169 | OPCODE(0x08B0) |
4170 | { |
4171 | u32 adr, res; |
4172 | u32 src, dst; |
4173 | |
4174 | FETCH_BYTE(src); |
4175 | src = 1 << (src & 7); |
4176 | adr = AREG((Opcode >> 0) & 7); |
4177 | DECODE_EXT_WORD |
4178 | PRE_IO |
4179 | READ_BYTE_F(adr, res) |
4180 | flag_NotZ = res & src; |
4181 | res &= ~src; |
4182 | WRITE_BYTE_F(adr, res) |
4183 | POST_IO |
4184 | RET(22) |
4185 | } |
4186 | |
4187 | // BCLRn |
4188 | OPCODE(0x08B8) |
4189 | { |
4190 | u32 adr, res; |
4191 | u32 src, dst; |
4192 | |
4193 | FETCH_BYTE(src); |
4194 | src = 1 << (src & 7); |
4195 | FETCH_SWORD(adr); |
4196 | PRE_IO |
4197 | READ_BYTE_F(adr, res) |
4198 | flag_NotZ = res & src; |
4199 | res &= ~src; |
4200 | WRITE_BYTE_F(adr, res) |
4201 | POST_IO |
4202 | RET(20) |
4203 | } |
4204 | |
4205 | // BCLRn |
4206 | OPCODE(0x08B9) |
4207 | { |
4208 | u32 adr, res; |
4209 | u32 src, dst; |
4210 | |
4211 | FETCH_BYTE(src); |
4212 | src = 1 << (src & 7); |
4213 | FETCH_LONG(adr); |
4214 | PRE_IO |
4215 | READ_BYTE_F(adr, res) |
4216 | flag_NotZ = res & src; |
4217 | res &= ~src; |
4218 | WRITE_BYTE_F(adr, res) |
4219 | POST_IO |
4220 | RET(24) |
4221 | } |
4222 | |
4223 | // BCLRn |
4224 | OPCODE(0x089F) |
4225 | { |
4226 | u32 adr, res; |
4227 | u32 src, dst; |
4228 | |
4229 | FETCH_BYTE(src); |
4230 | src = 1 << (src & 7); |
4231 | adr = AREG(7); |
4232 | AREG(7) += 2; |
4233 | PRE_IO |
4234 | READ_BYTE_F(adr, res) |
4235 | flag_NotZ = res & src; |
4236 | res &= ~src; |
4237 | WRITE_BYTE_F(adr, res) |
4238 | POST_IO |
4239 | RET(16) |
4240 | } |
4241 | |
4242 | // BCLRn |
4243 | OPCODE(0x08A7) |
4244 | { |
4245 | u32 adr, res; |
4246 | u32 src, dst; |
4247 | |
4248 | FETCH_BYTE(src); |
4249 | src = 1 << (src & 7); |
4250 | adr = AREG(7) - 2; |
4251 | AREG(7) = adr; |
4252 | PRE_IO |
4253 | READ_BYTE_F(adr, res) |
4254 | flag_NotZ = res & src; |
4255 | res &= ~src; |
4256 | WRITE_BYTE_F(adr, res) |
4257 | POST_IO |
4258 | RET(18) |
4259 | } |
4260 | |
4261 | // BSETn |
4262 | OPCODE(0x08C0) |
4263 | { |
4264 | u32 adr, res; |
4265 | u32 src, dst; |
4266 | |
4267 | FETCH_BYTE(src); |
4268 | src = 1 << (src & 31); |
4269 | res = DREGu32((Opcode >> 0) & 7); |
4270 | flag_NotZ = res & src; |
4271 | res |= src; |
4272 | DREGu32((Opcode >> 0) & 7) = res; |
4273 | RET(12) |
4274 | } |
4275 | |
4276 | // BSETn |
4277 | OPCODE(0x08D0) |
4278 | { |
4279 | u32 adr, res; |
4280 | u32 src, dst; |
4281 | |
4282 | FETCH_BYTE(src); |
4283 | src = 1 << (src & 7); |
4284 | adr = AREG((Opcode >> 0) & 7); |
4285 | PRE_IO |
4286 | READ_BYTE_F(adr, res) |
4287 | flag_NotZ = res & src; |
4288 | res |= src; |
4289 | WRITE_BYTE_F(adr, res) |
4290 | POST_IO |
4291 | RET(16) |
4292 | } |
4293 | |
4294 | // BSETn |
4295 | OPCODE(0x08D8) |
4296 | { |
4297 | u32 adr, res; |
4298 | u32 src, dst; |
4299 | |
4300 | FETCH_BYTE(src); |
4301 | src = 1 << (src & 7); |
4302 | adr = AREG((Opcode >> 0) & 7); |
4303 | AREG((Opcode >> 0) & 7) += 1; |
4304 | PRE_IO |
4305 | READ_BYTE_F(adr, res) |
4306 | flag_NotZ = res & src; |
4307 | res |= src; |
4308 | WRITE_BYTE_F(adr, res) |
4309 | POST_IO |
4310 | RET(16) |
4311 | } |
4312 | |
4313 | // BSETn |
4314 | OPCODE(0x08E0) |
4315 | { |
4316 | u32 adr, res; |
4317 | u32 src, dst; |
4318 | |
4319 | FETCH_BYTE(src); |
4320 | src = 1 << (src & 7); |
4321 | adr = AREG((Opcode >> 0) & 7) - 1; |
4322 | AREG((Opcode >> 0) & 7) = adr; |
4323 | PRE_IO |
4324 | READ_BYTE_F(adr, res) |
4325 | flag_NotZ = res & src; |
4326 | res |= src; |
4327 | WRITE_BYTE_F(adr, res) |
4328 | POST_IO |
4329 | RET(18) |
4330 | } |
4331 | |
4332 | // BSETn |
4333 | OPCODE(0x08E8) |
4334 | { |
4335 | u32 adr, res; |
4336 | u32 src, dst; |
4337 | |
4338 | FETCH_BYTE(src); |
4339 | src = 1 << (src & 7); |
4340 | FETCH_SWORD(adr); |
4341 | adr += AREG((Opcode >> 0) & 7); |
4342 | PRE_IO |
4343 | READ_BYTE_F(adr, res) |
4344 | flag_NotZ = res & src; |
4345 | res |= src; |
4346 | WRITE_BYTE_F(adr, res) |
4347 | POST_IO |
4348 | RET(20) |
4349 | } |
4350 | |
4351 | // BSETn |
4352 | OPCODE(0x08F0) |
4353 | { |
4354 | u32 adr, res; |
4355 | u32 src, dst; |
4356 | |
4357 | FETCH_BYTE(src); |
4358 | src = 1 << (src & 7); |
4359 | adr = AREG((Opcode >> 0) & 7); |
4360 | DECODE_EXT_WORD |
4361 | PRE_IO |
4362 | READ_BYTE_F(adr, res) |
4363 | flag_NotZ = res & src; |
4364 | res |= src; |
4365 | WRITE_BYTE_F(adr, res) |
4366 | POST_IO |
4367 | RET(22) |
4368 | } |
4369 | |
4370 | // BSETn |
4371 | OPCODE(0x08F8) |
4372 | { |
4373 | u32 adr, res; |
4374 | u32 src, dst; |
4375 | |
4376 | FETCH_BYTE(src); |
4377 | src = 1 << (src & 7); |
4378 | FETCH_SWORD(adr); |
4379 | PRE_IO |
4380 | READ_BYTE_F(adr, res) |
4381 | flag_NotZ = res & src; |
4382 | res |= src; |
4383 | WRITE_BYTE_F(adr, res) |
4384 | POST_IO |
4385 | RET(20) |
4386 | } |
4387 | |
4388 | // BSETn |
4389 | OPCODE(0x08F9) |
4390 | { |
4391 | u32 adr, res; |
4392 | u32 src, dst; |
4393 | |
4394 | FETCH_BYTE(src); |
4395 | src = 1 << (src & 7); |
4396 | FETCH_LONG(adr); |
4397 | PRE_IO |
4398 | READ_BYTE_F(adr, res) |
4399 | flag_NotZ = res & src; |
4400 | res |= src; |
4401 | WRITE_BYTE_F(adr, res) |
4402 | POST_IO |
4403 | RET(24) |
4404 | } |
4405 | |
4406 | // BSETn |
4407 | OPCODE(0x08DF) |
4408 | { |
4409 | u32 adr, res; |
4410 | u32 src, dst; |
4411 | |
4412 | FETCH_BYTE(src); |
4413 | src = 1 << (src & 7); |
4414 | adr = AREG(7); |
4415 | AREG(7) += 2; |
4416 | PRE_IO |
4417 | READ_BYTE_F(adr, res) |
4418 | flag_NotZ = res & src; |
4419 | res |= src; |
4420 | WRITE_BYTE_F(adr, res) |
4421 | POST_IO |
4422 | RET(16) |
4423 | } |
4424 | |
4425 | // BSETn |
4426 | OPCODE(0x08E7) |
4427 | { |
4428 | u32 adr, res; |
4429 | u32 src, dst; |
4430 | |
4431 | FETCH_BYTE(src); |
4432 | src = 1 << (src & 7); |
4433 | adr = AREG(7) - 2; |
4434 | AREG(7) = adr; |
4435 | PRE_IO |
4436 | READ_BYTE_F(adr, res) |
4437 | flag_NotZ = res & src; |
4438 | res |= src; |
4439 | WRITE_BYTE_F(adr, res) |
4440 | POST_IO |
4441 | RET(18) |
4442 | } |
4443 | |
4444 | // BTST |
4445 | OPCODE(0x0100) |
4446 | { |
4447 | u32 adr, res; |
4448 | u32 src, dst; |
4449 | |
4450 | src = DREGu32((Opcode >> 9) & 7); |
4451 | src = 1 << (src & 31); |
4452 | res = DREGu32((Opcode >> 0) & 7); |
4453 | flag_NotZ = res & src; |
4454 | RET(6) |
4455 | } |
4456 | |
4457 | // BTST |
4458 | OPCODE(0x0110) |
4459 | { |
4460 | u32 adr, res; |
4461 | u32 src, dst; |
4462 | |
4463 | src = DREGu8((Opcode >> 9) & 7); |
4464 | src = 1 << (src & 7); |
4465 | adr = AREG((Opcode >> 0) & 7); |
4466 | PRE_IO |
4467 | READ_BYTE_F(adr, res) |
4468 | flag_NotZ = res & src; |
4469 | POST_IO |
4470 | RET(8) |
4471 | } |
4472 | |
4473 | // BTST |
4474 | OPCODE(0x0118) |
4475 | { |
4476 | u32 adr, res; |
4477 | u32 src, dst; |
4478 | |
4479 | src = DREGu8((Opcode >> 9) & 7); |
4480 | src = 1 << (src & 7); |
4481 | adr = AREG((Opcode >> 0) & 7); |
4482 | AREG((Opcode >> 0) & 7) += 1; |
4483 | PRE_IO |
4484 | READ_BYTE_F(adr, res) |
4485 | flag_NotZ = res & src; |
4486 | POST_IO |
4487 | RET(8) |
4488 | } |
4489 | |
4490 | // BTST |
4491 | OPCODE(0x0120) |
4492 | { |
4493 | u32 adr, res; |
4494 | u32 src, dst; |
4495 | |
4496 | src = DREGu8((Opcode >> 9) & 7); |
4497 | src = 1 << (src & 7); |
4498 | adr = AREG((Opcode >> 0) & 7) - 1; |
4499 | AREG((Opcode >> 0) & 7) = adr; |
4500 | PRE_IO |
4501 | READ_BYTE_F(adr, res) |
4502 | flag_NotZ = res & src; |
4503 | POST_IO |
4504 | RET(10) |
4505 | } |
4506 | |
4507 | // BTST |
4508 | OPCODE(0x0128) |
4509 | { |
4510 | u32 adr, res; |
4511 | u32 src, dst; |
4512 | |
4513 | src = DREGu8((Opcode >> 9) & 7); |
4514 | src = 1 << (src & 7); |
4515 | FETCH_SWORD(adr); |
4516 | adr += AREG((Opcode >> 0) & 7); |
4517 | PRE_IO |
4518 | READ_BYTE_F(adr, res) |
4519 | flag_NotZ = res & src; |
4520 | POST_IO |
4521 | RET(12) |
4522 | } |
4523 | |
4524 | // BTST |
4525 | OPCODE(0x0130) |
4526 | { |
4527 | u32 adr, res; |
4528 | u32 src, dst; |
4529 | |
4530 | src = DREGu8((Opcode >> 9) & 7); |
4531 | src = 1 << (src & 7); |
4532 | adr = AREG((Opcode >> 0) & 7); |
4533 | DECODE_EXT_WORD |
4534 | PRE_IO |
4535 | READ_BYTE_F(adr, res) |
4536 | flag_NotZ = res & src; |
4537 | POST_IO |
4538 | RET(14) |
4539 | } |
4540 | |
4541 | // BTST |
4542 | OPCODE(0x0138) |
4543 | { |
4544 | u32 adr, res; |
4545 | u32 src, dst; |
4546 | |
4547 | src = DREGu8((Opcode >> 9) & 7); |
4548 | src = 1 << (src & 7); |
4549 | FETCH_SWORD(adr); |
4550 | PRE_IO |
4551 | READ_BYTE_F(adr, res) |
4552 | flag_NotZ = res & src; |
4553 | POST_IO |
4554 | RET(12) |
4555 | } |
4556 | |
4557 | // BTST |
4558 | OPCODE(0x0139) |
4559 | { |
4560 | u32 adr, res; |
4561 | u32 src, dst; |
4562 | |
4563 | src = DREGu8((Opcode >> 9) & 7); |
4564 | src = 1 << (src & 7); |
4565 | FETCH_LONG(adr); |
4566 | PRE_IO |
4567 | READ_BYTE_F(adr, res) |
4568 | flag_NotZ = res & src; |
4569 | POST_IO |
4570 | RET(16) |
4571 | } |
4572 | |
4573 | // BTST |
4574 | OPCODE(0x013A) |
4575 | { |
4576 | u32 adr, res; |
4577 | u32 src, dst; |
4578 | |
4579 | src = DREGu8((Opcode >> 9) & 7); |
4580 | src = 1 << (src & 7); |
be26eb23 |
4581 | adr = GET_SWORD + GET_PC; |
70357ce5 |
4582 | PC++; |
4583 | PRE_IO |
4584 | READ_BYTE_F(adr, res) |
4585 | flag_NotZ = res & src; |
4586 | POST_IO |
4587 | RET(12) |
4588 | } |
4589 | |
4590 | // BTST |
4591 | OPCODE(0x013B) |
4592 | { |
4593 | u32 adr, res; |
4594 | u32 src, dst; |
4595 | |
4596 | src = DREGu8((Opcode >> 9) & 7); |
4597 | src = 1 << (src & 7); |
be26eb23 |
4598 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
4599 | DECODE_EXT_WORD |
4600 | PRE_IO |
4601 | READ_BYTE_F(adr, res) |
4602 | flag_NotZ = res & src; |
4603 | POST_IO |
4604 | RET(14) |
4605 | } |
4606 | |
4607 | // BTST |
4608 | OPCODE(0x013C) |
4609 | { |
4610 | u32 adr, res; |
4611 | u32 src, dst; |
4612 | |
4613 | src = DREGu8((Opcode >> 9) & 7); |
4614 | src = 1 << (src & 7); |
4615 | FETCH_BYTE(res); |
4616 | flag_NotZ = res & src; |
4617 | RET(8) |
4618 | } |
4619 | |
4620 | // BTST |
4621 | OPCODE(0x011F) |
4622 | { |
4623 | u32 adr, res; |
4624 | u32 src, dst; |
4625 | |
4626 | src = DREGu8((Opcode >> 9) & 7); |
4627 | src = 1 << (src & 7); |
4628 | adr = AREG(7); |
4629 | AREG(7) += 2; |
4630 | PRE_IO |
4631 | READ_BYTE_F(adr, res) |
4632 | flag_NotZ = res & src; |
4633 | POST_IO |
4634 | RET(8) |
4635 | } |
4636 | |
4637 | // BTST |
4638 | OPCODE(0x0127) |
4639 | { |
4640 | u32 adr, res; |
4641 | u32 src, dst; |
4642 | |
4643 | src = DREGu8((Opcode >> 9) & 7); |
4644 | src = 1 << (src & 7); |
4645 | adr = AREG(7) - 2; |
4646 | AREG(7) = adr; |
4647 | PRE_IO |
4648 | READ_BYTE_F(adr, res) |
4649 | flag_NotZ = res & src; |
4650 | POST_IO |
4651 | RET(10) |
4652 | } |
4653 | |
4654 | // BCHG |
4655 | OPCODE(0x0140) |
4656 | { |
4657 | u32 adr, res; |
4658 | u32 src, dst; |
4659 | |
4660 | src = DREGu32((Opcode >> 9) & 7); |
4661 | src = 1 << (src & 31); |
4662 | res = DREGu32((Opcode >> 0) & 7); |
4663 | flag_NotZ = res & src; |
4664 | res ^= src; |
4665 | DREGu32((Opcode >> 0) & 7) = res; |
4666 | RET(8) |
4667 | } |
4668 | |
4669 | // BCHG |
4670 | OPCODE(0x0150) |
4671 | { |
4672 | u32 adr, res; |
4673 | u32 src, dst; |
4674 | |
4675 | src = DREGu8((Opcode >> 9) & 7); |
4676 | src = 1 << (src & 7); |
4677 | adr = AREG((Opcode >> 0) & 7); |
4678 | PRE_IO |
4679 | READ_BYTE_F(adr, res) |
4680 | flag_NotZ = res & src; |
4681 | res ^= src; |
4682 | WRITE_BYTE_F(adr, res) |
4683 | POST_IO |
4684 | RET(12) |
4685 | } |
4686 | |
4687 | // BCHG |
4688 | OPCODE(0x0158) |
4689 | { |
4690 | u32 adr, res; |
4691 | u32 src, dst; |
4692 | |
4693 | src = DREGu8((Opcode >> 9) & 7); |
4694 | src = 1 << (src & 7); |
4695 | adr = AREG((Opcode >> 0) & 7); |
4696 | AREG((Opcode >> 0) & 7) += 1; |
4697 | PRE_IO |
4698 | READ_BYTE_F(adr, res) |
4699 | flag_NotZ = res & src; |
4700 | res ^= src; |
4701 | WRITE_BYTE_F(adr, res) |
4702 | POST_IO |
4703 | RET(12) |
4704 | } |
4705 | |
4706 | // BCHG |
4707 | OPCODE(0x0160) |
4708 | { |
4709 | u32 adr, res; |
4710 | u32 src, dst; |
4711 | |
4712 | src = DREGu8((Opcode >> 9) & 7); |
4713 | src = 1 << (src & 7); |
4714 | adr = AREG((Opcode >> 0) & 7) - 1; |
4715 | AREG((Opcode >> 0) & 7) = adr; |
4716 | PRE_IO |
4717 | READ_BYTE_F(adr, res) |
4718 | flag_NotZ = res & src; |
4719 | res ^= src; |
4720 | WRITE_BYTE_F(adr, res) |
4721 | POST_IO |
4722 | RET(14) |
4723 | } |
4724 | |
4725 | // BCHG |
4726 | OPCODE(0x0168) |
4727 | { |
4728 | u32 adr, res; |
4729 | u32 src, dst; |
4730 | |
4731 | src = DREGu8((Opcode >> 9) & 7); |
4732 | src = 1 << (src & 7); |
4733 | FETCH_SWORD(adr); |
4734 | adr += AREG((Opcode >> 0) & 7); |
4735 | PRE_IO |
4736 | READ_BYTE_F(adr, res) |
4737 | flag_NotZ = res & src; |
4738 | res ^= src; |
4739 | WRITE_BYTE_F(adr, res) |
4740 | POST_IO |
4741 | RET(16) |
4742 | } |
4743 | |
4744 | // BCHG |
4745 | OPCODE(0x0170) |
4746 | { |
4747 | u32 adr, res; |
4748 | u32 src, dst; |
4749 | |
4750 | src = DREGu8((Opcode >> 9) & 7); |
4751 | src = 1 << (src & 7); |
4752 | adr = AREG((Opcode >> 0) & 7); |
4753 | DECODE_EXT_WORD |
4754 | PRE_IO |
4755 | READ_BYTE_F(adr, res) |
4756 | flag_NotZ = res & src; |
4757 | res ^= src; |
4758 | WRITE_BYTE_F(adr, res) |
4759 | POST_IO |
4760 | RET(18) |
4761 | } |
4762 | |
4763 | // BCHG |
4764 | OPCODE(0x0178) |
4765 | { |
4766 | u32 adr, res; |
4767 | u32 src, dst; |
4768 | |
4769 | src = DREGu8((Opcode >> 9) & 7); |
4770 | src = 1 << (src & 7); |
4771 | FETCH_SWORD(adr); |
4772 | PRE_IO |
4773 | READ_BYTE_F(adr, res) |
4774 | flag_NotZ = res & src; |
4775 | res ^= src; |
4776 | WRITE_BYTE_F(adr, res) |
4777 | POST_IO |
4778 | RET(16) |
4779 | } |
4780 | |
4781 | // BCHG |
4782 | OPCODE(0x0179) |
4783 | { |
4784 | u32 adr, res; |
4785 | u32 src, dst; |
4786 | |
4787 | src = DREGu8((Opcode >> 9) & 7); |
4788 | src = 1 << (src & 7); |
4789 | FETCH_LONG(adr); |
4790 | PRE_IO |
4791 | READ_BYTE_F(adr, res) |
4792 | flag_NotZ = res & src; |
4793 | res ^= src; |
4794 | WRITE_BYTE_F(adr, res) |
4795 | POST_IO |
4796 | RET(20) |
4797 | } |
4798 | |
4799 | // BCHG |
4800 | OPCODE(0x015F) |
4801 | { |
4802 | u32 adr, res; |
4803 | u32 src, dst; |
4804 | |
4805 | src = DREGu8((Opcode >> 9) & 7); |
4806 | src = 1 << (src & 7); |
4807 | adr = AREG(7); |
4808 | AREG(7) += 2; |
4809 | PRE_IO |
4810 | READ_BYTE_F(adr, res) |
4811 | flag_NotZ = res & src; |
4812 | res ^= src; |
4813 | WRITE_BYTE_F(adr, res) |
4814 | POST_IO |
4815 | RET(12) |
4816 | } |
4817 | |
4818 | // BCHG |
4819 | OPCODE(0x0167) |
4820 | { |
4821 | u32 adr, res; |
4822 | u32 src, dst; |
4823 | |
4824 | src = DREGu8((Opcode >> 9) & 7); |
4825 | src = 1 << (src & 7); |
4826 | adr = AREG(7) - 2; |
4827 | AREG(7) = adr; |
4828 | PRE_IO |
4829 | READ_BYTE_F(adr, res) |
4830 | flag_NotZ = res & src; |
4831 | res ^= src; |
4832 | WRITE_BYTE_F(adr, res) |
4833 | POST_IO |
4834 | RET(14) |
4835 | } |
4836 | |
4837 | // BCLR |
4838 | OPCODE(0x0180) |
4839 | { |
4840 | u32 adr, res; |
4841 | u32 src, dst; |
4842 | |
4843 | src = DREGu32((Opcode >> 9) & 7); |
4844 | src = 1 << (src & 31); |
4845 | res = DREGu32((Opcode >> 0) & 7); |
4846 | flag_NotZ = res & src; |
4847 | res &= ~src; |
4848 | DREGu32((Opcode >> 0) & 7) = res; |
4849 | RET(10) |
4850 | } |
4851 | |
4852 | // BCLR |
4853 | OPCODE(0x0190) |
4854 | { |
4855 | u32 adr, res; |
4856 | u32 src, dst; |
4857 | |
4858 | src = DREGu8((Opcode >> 9) & 7); |
4859 | src = 1 << (src & 7); |
4860 | adr = AREG((Opcode >> 0) & 7); |
4861 | PRE_IO |
4862 | READ_BYTE_F(adr, res) |
4863 | flag_NotZ = res & src; |
4864 | res &= ~src; |
4865 | WRITE_BYTE_F(adr, res) |
4866 | POST_IO |
4867 | RET(12) |
4868 | } |
4869 | |
4870 | // BCLR |
4871 | OPCODE(0x0198) |
4872 | { |
4873 | u32 adr, res; |
4874 | u32 src, dst; |
4875 | |
4876 | src = DREGu8((Opcode >> 9) & 7); |
4877 | src = 1 << (src & 7); |
4878 | adr = AREG((Opcode >> 0) & 7); |
4879 | AREG((Opcode >> 0) & 7) += 1; |
4880 | PRE_IO |
4881 | READ_BYTE_F(adr, res) |
4882 | flag_NotZ = res & src; |
4883 | res &= ~src; |
4884 | WRITE_BYTE_F(adr, res) |
4885 | POST_IO |
4886 | RET(12) |
4887 | } |
4888 | |
4889 | // BCLR |
4890 | OPCODE(0x01A0) |
4891 | { |
4892 | u32 adr, res; |
4893 | u32 src, dst; |
4894 | |
4895 | src = DREGu8((Opcode >> 9) & 7); |
4896 | src = 1 << (src & 7); |
4897 | adr = AREG((Opcode >> 0) & 7) - 1; |
4898 | AREG((Opcode >> 0) & 7) = adr; |
4899 | PRE_IO |
4900 | READ_BYTE_F(adr, res) |
4901 | flag_NotZ = res & src; |
4902 | res &= ~src; |
4903 | WRITE_BYTE_F(adr, res) |
4904 | POST_IO |
4905 | RET(14) |
4906 | } |
4907 | |
4908 | // BCLR |
4909 | OPCODE(0x01A8) |
4910 | { |
4911 | u32 adr, res; |
4912 | u32 src, dst; |
4913 | |
4914 | src = DREGu8((Opcode >> 9) & 7); |
4915 | src = 1 << (src & 7); |
4916 | FETCH_SWORD(adr); |
4917 | adr += AREG((Opcode >> 0) & 7); |
4918 | PRE_IO |
4919 | READ_BYTE_F(adr, res) |
4920 | flag_NotZ = res & src; |
4921 | res &= ~src; |
4922 | WRITE_BYTE_F(adr, res) |
4923 | POST_IO |
4924 | RET(16) |
4925 | } |
4926 | |
4927 | // BCLR |
4928 | OPCODE(0x01B0) |
4929 | { |
4930 | u32 adr, res; |
4931 | u32 src, dst; |
4932 | |
4933 | src = DREGu8((Opcode >> 9) & 7); |
4934 | src = 1 << (src & 7); |
4935 | adr = AREG((Opcode >> 0) & 7); |
4936 | DECODE_EXT_WORD |
4937 | PRE_IO |
4938 | READ_BYTE_F(adr, res) |
4939 | flag_NotZ = res & src; |
4940 | res &= ~src; |
4941 | WRITE_BYTE_F(adr, res) |
4942 | POST_IO |
4943 | RET(18) |
4944 | } |
4945 | |
4946 | // BCLR |
4947 | OPCODE(0x01B8) |
4948 | { |
4949 | u32 adr, res; |
4950 | u32 src, dst; |
4951 | |
4952 | src = DREGu8((Opcode >> 9) & 7); |
4953 | src = 1 << (src & 7); |
4954 | FETCH_SWORD(adr); |
4955 | PRE_IO |
4956 | READ_BYTE_F(adr, res) |
4957 | flag_NotZ = res & src; |
4958 | res &= ~src; |
4959 | WRITE_BYTE_F(adr, res) |
4960 | POST_IO |
4961 | RET(16) |
4962 | } |
4963 | |
4964 | // BCLR |
4965 | OPCODE(0x01B9) |
4966 | { |
4967 | u32 adr, res; |
4968 | u32 src, dst; |
4969 | |
4970 | src = DREGu8((Opcode >> 9) & 7); |
4971 | src = 1 << (src & 7); |
4972 | FETCH_LONG(adr); |
4973 | PRE_IO |
4974 | READ_BYTE_F(adr, res) |
4975 | flag_NotZ = res & src; |
4976 | res &= ~src; |
4977 | WRITE_BYTE_F(adr, res) |
4978 | POST_IO |
4979 | RET(20) |
4980 | } |
4981 | |
4982 | // BCLR |
4983 | OPCODE(0x019F) |
4984 | { |
4985 | u32 adr, res; |
4986 | u32 src, dst; |
4987 | |
4988 | src = DREGu8((Opcode >> 9) & 7); |
4989 | src = 1 << (src & 7); |
4990 | adr = AREG(7); |
4991 | AREG(7) += 2; |
4992 | PRE_IO |
4993 | READ_BYTE_F(adr, res) |
4994 | flag_NotZ = res & src; |
4995 | res &= ~src; |
4996 | WRITE_BYTE_F(adr, res) |
4997 | POST_IO |
4998 | RET(12) |
4999 | } |
5000 | |
5001 | // BCLR |
5002 | OPCODE(0x01A7) |
5003 | { |
5004 | u32 adr, res; |
5005 | u32 src, dst; |
5006 | |
5007 | src = DREGu8((Opcode >> 9) & 7); |
5008 | src = 1 << (src & 7); |
5009 | adr = AREG(7) - 2; |
5010 | AREG(7) = adr; |
5011 | PRE_IO |
5012 | READ_BYTE_F(adr, res) |
5013 | flag_NotZ = res & src; |
5014 | res &= ~src; |
5015 | WRITE_BYTE_F(adr, res) |
5016 | POST_IO |
5017 | RET(14) |
5018 | } |
5019 | |
5020 | // BSET |
5021 | OPCODE(0x01C0) |
5022 | { |
5023 | u32 adr, res; |
5024 | u32 src, dst; |
5025 | |
5026 | src = DREGu32((Opcode >> 9) & 7); |
5027 | src = 1 << (src & 31); |
5028 | res = DREGu32((Opcode >> 0) & 7); |
5029 | flag_NotZ = res & src; |
5030 | res |= src; |
5031 | DREGu32((Opcode >> 0) & 7) = res; |
5032 | RET(8) |
5033 | } |
5034 | |
5035 | // BSET |
5036 | OPCODE(0x01D0) |
5037 | { |
5038 | u32 adr, res; |
5039 | u32 src, dst; |
5040 | |
5041 | src = DREGu8((Opcode >> 9) & 7); |
5042 | src = 1 << (src & 7); |
5043 | adr = AREG((Opcode >> 0) & 7); |
5044 | PRE_IO |
5045 | READ_BYTE_F(adr, res) |
5046 | flag_NotZ = res & src; |
5047 | res |= src; |
5048 | WRITE_BYTE_F(adr, res) |
5049 | POST_IO |
5050 | RET(12) |
5051 | } |
5052 | |
5053 | // BSET |
5054 | OPCODE(0x01D8) |
5055 | { |
5056 | u32 adr, res; |
5057 | u32 src, dst; |
5058 | |
5059 | src = DREGu8((Opcode >> 9) & 7); |
5060 | src = 1 << (src & 7); |
5061 | adr = AREG((Opcode >> 0) & 7); |
5062 | AREG((Opcode >> 0) & 7) += 1; |
5063 | PRE_IO |
5064 | READ_BYTE_F(adr, res) |
5065 | flag_NotZ = res & src; |
5066 | res |= src; |
5067 | WRITE_BYTE_F(adr, res) |
5068 | POST_IO |
5069 | RET(12) |
5070 | } |
5071 | |
5072 | // BSET |
5073 | OPCODE(0x01E0) |
5074 | { |
5075 | u32 adr, res; |
5076 | u32 src, dst; |
5077 | |
5078 | src = DREGu8((Opcode >> 9) & 7); |
5079 | src = 1 << (src & 7); |
5080 | adr = AREG((Opcode >> 0) & 7) - 1; |
5081 | AREG((Opcode >> 0) & 7) = adr; |
5082 | PRE_IO |
5083 | READ_BYTE_F(adr, res) |
5084 | flag_NotZ = res & src; |
5085 | res |= src; |
5086 | WRITE_BYTE_F(adr, res) |
5087 | POST_IO |
5088 | RET(14) |
5089 | } |
5090 | |
5091 | // BSET |
5092 | OPCODE(0x01E8) |
5093 | { |
5094 | u32 adr, res; |
5095 | u32 src, dst; |
5096 | |
5097 | src = DREGu8((Opcode >> 9) & 7); |
5098 | src = 1 << (src & 7); |
5099 | FETCH_SWORD(adr); |
5100 | adr += AREG((Opcode >> 0) & 7); |
5101 | PRE_IO |
5102 | READ_BYTE_F(adr, res) |
5103 | flag_NotZ = res & src; |
5104 | res |= src; |
5105 | WRITE_BYTE_F(adr, res) |
5106 | POST_IO |
5107 | RET(16) |
5108 | } |
5109 | |
5110 | // BSET |
5111 | OPCODE(0x01F0) |
5112 | { |
5113 | u32 adr, res; |
5114 | u32 src, dst; |
5115 | |
5116 | src = DREGu8((Opcode >> 9) & 7); |
5117 | src = 1 << (src & 7); |
5118 | adr = AREG((Opcode >> 0) & 7); |
5119 | DECODE_EXT_WORD |
5120 | PRE_IO |
5121 | READ_BYTE_F(adr, res) |
5122 | flag_NotZ = res & src; |
5123 | res |= src; |
5124 | WRITE_BYTE_F(adr, res) |
5125 | POST_IO |
5126 | RET(18) |
5127 | } |
5128 | |
5129 | // BSET |
5130 | OPCODE(0x01F8) |
5131 | { |
5132 | u32 adr, res; |
5133 | u32 src, dst; |
5134 | |
5135 | src = DREGu8((Opcode >> 9) & 7); |
5136 | src = 1 << (src & 7); |
5137 | FETCH_SWORD(adr); |
5138 | PRE_IO |
5139 | READ_BYTE_F(adr, res) |
5140 | flag_NotZ = res & src; |
5141 | res |= src; |
5142 | WRITE_BYTE_F(adr, res) |
5143 | POST_IO |
5144 | RET(16) |
5145 | } |
5146 | |
5147 | // BSET |
5148 | OPCODE(0x01F9) |
5149 | { |
5150 | u32 adr, res; |
5151 | u32 src, dst; |
5152 | |
5153 | src = DREGu8((Opcode >> 9) & 7); |
5154 | src = 1 << (src & 7); |
5155 | FETCH_LONG(adr); |
5156 | PRE_IO |
5157 | READ_BYTE_F(adr, res) |
5158 | flag_NotZ = res & src; |
5159 | res |= src; |
5160 | WRITE_BYTE_F(adr, res) |
5161 | POST_IO |
5162 | RET(20) |
5163 | } |
5164 | |
5165 | // BSET |
5166 | OPCODE(0x01DF) |
5167 | { |
5168 | u32 adr, res; |
5169 | u32 src, dst; |
5170 | |
5171 | src = DREGu8((Opcode >> 9) & 7); |
5172 | src = 1 << (src & 7); |
5173 | adr = AREG(7); |
5174 | AREG(7) += 2; |
5175 | PRE_IO |
5176 | READ_BYTE_F(adr, res) |
5177 | flag_NotZ = res & src; |
5178 | res |= src; |
5179 | WRITE_BYTE_F(adr, res) |
5180 | POST_IO |
5181 | RET(12) |
5182 | } |
5183 | |
5184 | // BSET |
5185 | OPCODE(0x01E7) |
5186 | { |
5187 | u32 adr, res; |
5188 | u32 src, dst; |
5189 | |
5190 | src = DREGu8((Opcode >> 9) & 7); |
5191 | src = 1 << (src & 7); |
5192 | adr = AREG(7) - 2; |
5193 | AREG(7) = adr; |
5194 | PRE_IO |
5195 | READ_BYTE_F(adr, res) |
5196 | flag_NotZ = res & src; |
5197 | res |= src; |
5198 | WRITE_BYTE_F(adr, res) |
5199 | POST_IO |
5200 | RET(14) |
5201 | } |
5202 | |
5203 | // MOVEPWaD |
5204 | OPCODE(0x0108) |
5205 | { |
5206 | u32 adr, res; |
5207 | u32 src, dst; |
5208 | |
5209 | FETCH_SWORD(adr); |
5210 | adr += AREG((Opcode >> 0) & 7); |
5211 | PRE_IO |
5212 | READ_BYTE_F(adr + 0, res) |
5213 | READ_BYTE_F(adr + 2, src) |
5214 | DREGu16((Opcode >> 9) & 7) = (res << 8) | src; |
5215 | POST_IO |
03e4f2a3 |
5216 | #ifdef USE_CYCLONE_TIMING |
5217 | RET(16) |
5218 | #else |
70357ce5 |
5219 | RET(24) |
03e4f2a3 |
5220 | #endif |
70357ce5 |
5221 | } |
5222 | |
5223 | // MOVEPLaD |
5224 | OPCODE(0x0148) |
5225 | { |
5226 | u32 adr, res; |
5227 | u32 src, dst; |
5228 | |
5229 | FETCH_SWORD(adr); |
5230 | adr += AREG((Opcode >> 0) & 7); |
5231 | PRE_IO |
5232 | READ_BYTE_F(adr, res) |
5233 | res <<= 24; |
5234 | adr += 2; |
5235 | READ_BYTE_F(adr, src) |
5236 | res |= src << 16; |
5237 | adr += 2; |
5238 | READ_BYTE_F(adr, src) |
5239 | res |= src << 8; |
5240 | adr += 2; |
5241 | READ_BYTE_F(adr, src) |
5242 | DREG((Opcode >> 9) & 7) = res | src; |
5243 | POST_IO |
03e4f2a3 |
5244 | #ifdef USE_CYCLONE_TIMING |
5245 | RET(24) |
5246 | #else |
70357ce5 |
5247 | RET(32) |
03e4f2a3 |
5248 | #endif |
70357ce5 |
5249 | } |
5250 | |
5251 | // MOVEPWDa |
5252 | OPCODE(0x0188) |
5253 | { |
5254 | u32 adr, res; |
5255 | u32 src, dst; |
5256 | |
5257 | res = DREGu32((Opcode >> 9) & 7); |
5258 | FETCH_SWORD(adr); |
5259 | adr += AREG((Opcode >> 0) & 7); |
5260 | PRE_IO |
5261 | WRITE_BYTE_F(adr + 0, res >> 8) |
5262 | WRITE_BYTE_F(adr + 2, res >> 0) |
5263 | POST_IO |
03e4f2a3 |
5264 | #ifdef USE_CYCLONE_TIMING |
5265 | RET(16) |
5266 | #else |
70357ce5 |
5267 | RET(24) |
03e4f2a3 |
5268 | #endif |
70357ce5 |
5269 | } |
5270 | |
5271 | // MOVEPLDa |
5272 | OPCODE(0x01C8) |
5273 | { |
5274 | u32 adr, res; |
5275 | u32 src, dst; |
5276 | |
5277 | res = DREGu32((Opcode >> 9) & 7); |
5278 | FETCH_SWORD(adr); |
5279 | adr += AREG((Opcode >> 0) & 7); |
5280 | PRE_IO |
5281 | WRITE_BYTE_F(adr, res >> 24) |
5282 | adr += 2; |
5283 | WRITE_BYTE_F(adr, res >> 16) |
5284 | adr += 2; |
5285 | WRITE_BYTE_F(adr, res >> 8) |
5286 | adr += 2; |
5287 | WRITE_BYTE_F(adr, res >> 0) |
5288 | POST_IO |
03e4f2a3 |
5289 | #ifdef USE_CYCLONE_TIMING |
5290 | RET(24) |
5291 | #else |
70357ce5 |
5292 | RET(32) |
03e4f2a3 |
5293 | #endif |
70357ce5 |
5294 | } |
5295 | |
5296 | // MOVEB |
5297 | OPCODE(0x1000) |
5298 | { |
5299 | u32 adr, res; |
5300 | u32 src, dst; |
5301 | |
5302 | res = DREGu8((Opcode >> 0) & 7); |
5303 | flag_C = 0; |
5304 | flag_V = 0; |
5305 | flag_NotZ = res; |
5306 | flag_N = res; |
5307 | DREGu8((Opcode >> 9) & 7) = res; |
5308 | RET(4) |
5309 | } |
5310 | |
5311 | // MOVEB |
5312 | OPCODE(0x1080) |
5313 | { |
5314 | u32 adr, res; |
5315 | u32 src, dst; |
5316 | |
5317 | res = DREGu8((Opcode >> 0) & 7); |
5318 | flag_C = 0; |
5319 | flag_V = 0; |
5320 | flag_NotZ = res; |
5321 | flag_N = res; |
5322 | adr = AREG((Opcode >> 9) & 7); |
5323 | PRE_IO |
5324 | WRITE_BYTE_F(adr, res) |
5325 | POST_IO |
5326 | RET(8) |
5327 | } |
5328 | |
5329 | // MOVEB |
5330 | OPCODE(0x10C0) |
5331 | { |
5332 | u32 adr, res; |
5333 | u32 src, dst; |
5334 | |
5335 | res = DREGu8((Opcode >> 0) & 7); |
5336 | flag_C = 0; |
5337 | flag_V = 0; |
5338 | flag_NotZ = res; |
5339 | flag_N = res; |
5340 | adr = AREG((Opcode >> 9) & 7); |
5341 | AREG((Opcode >> 9) & 7) += 1; |
5342 | PRE_IO |
5343 | WRITE_BYTE_F(adr, res) |
5344 | POST_IO |
5345 | RET(8) |
5346 | } |
5347 | |
5348 | // MOVEB |
5349 | OPCODE(0x1100) |
5350 | { |
5351 | u32 adr, res; |
5352 | u32 src, dst; |
5353 | |
5354 | res = DREGu8((Opcode >> 0) & 7); |
5355 | flag_C = 0; |
5356 | flag_V = 0; |
5357 | flag_NotZ = res; |
5358 | flag_N = res; |
5359 | adr = AREG((Opcode >> 9) & 7) - 1; |
5360 | AREG((Opcode >> 9) & 7) = adr; |
5361 | PRE_IO |
5362 | WRITE_BYTE_F(adr, res) |
5363 | POST_IO |
5364 | RET(8) |
5365 | } |
5366 | |
5367 | // MOVEB |
5368 | OPCODE(0x1140) |
5369 | { |
5370 | u32 adr, res; |
5371 | u32 src, dst; |
5372 | |
5373 | res = DREGu8((Opcode >> 0) & 7); |
5374 | flag_C = 0; |
5375 | flag_V = 0; |
5376 | flag_NotZ = res; |
5377 | flag_N = res; |
5378 | FETCH_SWORD(adr); |
5379 | adr += AREG((Opcode >> 9) & 7); |
5380 | PRE_IO |
5381 | WRITE_BYTE_F(adr, res) |
5382 | POST_IO |
5383 | RET(12) |
5384 | } |
5385 | |
5386 | // MOVEB |
5387 | OPCODE(0x1180) |
5388 | { |
5389 | u32 adr, res; |
5390 | u32 src, dst; |
5391 | |
5392 | res = DREGu8((Opcode >> 0) & 7); |
5393 | flag_C = 0; |
5394 | flag_V = 0; |
5395 | flag_NotZ = res; |
5396 | flag_N = res; |
5397 | adr = AREG((Opcode >> 9) & 7); |
5398 | DECODE_EXT_WORD |
5399 | PRE_IO |
5400 | WRITE_BYTE_F(adr, res) |
5401 | POST_IO |
5402 | RET(14) |
5403 | } |
5404 | |
5405 | // MOVEB |
5406 | OPCODE(0x11C0) |
5407 | { |
5408 | u32 adr, res; |
5409 | u32 src, dst; |
5410 | |
5411 | res = DREGu8((Opcode >> 0) & 7); |
5412 | flag_C = 0; |
5413 | flag_V = 0; |
5414 | flag_NotZ = res; |
5415 | flag_N = res; |
5416 | FETCH_SWORD(adr); |
5417 | PRE_IO |
5418 | WRITE_BYTE_F(adr, res) |
5419 | POST_IO |
5420 | RET(12) |
5421 | } |
5422 | |
5423 | // MOVEB |
5424 | OPCODE(0x13C0) |
5425 | { |
5426 | u32 adr, res; |
5427 | u32 src, dst; |
5428 | |
5429 | res = DREGu8((Opcode >> 0) & 7); |
5430 | flag_C = 0; |
5431 | flag_V = 0; |
5432 | flag_NotZ = res; |
5433 | flag_N = res; |
5434 | FETCH_LONG(adr); |
5435 | PRE_IO |
5436 | WRITE_BYTE_F(adr, res) |
5437 | POST_IO |
5438 | RET(16) |
5439 | } |
5440 | |
5441 | // MOVEB |
5442 | OPCODE(0x1EC0) |
5443 | { |
5444 | u32 adr, res; |
5445 | u32 src, dst; |
5446 | |
5447 | res = DREGu8((Opcode >> 0) & 7); |
5448 | flag_C = 0; |
5449 | flag_V = 0; |
5450 | flag_NotZ = res; |
5451 | flag_N = res; |
5452 | adr = AREG(7); |
5453 | AREG(7) += 2; |
5454 | PRE_IO |
5455 | WRITE_BYTE_F(adr, res) |
5456 | POST_IO |
5457 | RET(8) |
5458 | } |
5459 | |
5460 | // MOVEB |
5461 | OPCODE(0x1F00) |
5462 | { |
5463 | u32 adr, res; |
5464 | u32 src, dst; |
5465 | |
5466 | res = DREGu8((Opcode >> 0) & 7); |
5467 | flag_C = 0; |
5468 | flag_V = 0; |
5469 | flag_NotZ = res; |
5470 | flag_N = res; |
5471 | adr = AREG(7) - 2; |
5472 | AREG(7) = adr; |
5473 | PRE_IO |
5474 | WRITE_BYTE_F(adr, res) |
5475 | POST_IO |
5476 | RET(8) |
5477 | } |
5478 | |
03e4f2a3 |
5479 | #if 0 |
70357ce5 |
5480 | // MOVEB |
5481 | OPCODE(0x1008) |
5482 | { |
5483 | u32 adr, res; |
5484 | u32 src, dst; |
5485 | |
5486 | // can't read byte from Ax registers ! |
5487 | m68kcontext.execinfo |= M68K_FAULTED; |
5488 | m68kcontext.io_cycle_counter = 0; |
5489 | /* |
5490 | goto famec_Exec_End; |
5491 | flag_C = 0; |
5492 | flag_V = 0; |
5493 | flag_NotZ = res; |
5494 | flag_N = res; |
5495 | DREGu8((Opcode >> 9) & 7) = res; |
5496 | */ |
5497 | RET(4) |
5498 | } |
5499 | |
5500 | // MOVEB |
5501 | OPCODE(0x1088) |
5502 | { |
5503 | u32 adr, res; |
5504 | u32 src, dst; |
5505 | |
5506 | // can't read byte from Ax registers ! |
5507 | m68kcontext.execinfo |= M68K_FAULTED; |
5508 | m68kcontext.io_cycle_counter = 0; |
5509 | /* |
5510 | goto famec_Exec_End; |
5511 | flag_C = 0; |
5512 | flag_V = 0; |
5513 | flag_NotZ = res; |
5514 | flag_N = res; |
5515 | adr = AREG((Opcode >> 9) & 7); |
5516 | PRE_IO |
5517 | WRITE_BYTE_F(adr, res) |
5518 | POST_IO |
5519 | */ |
5520 | RET(8) |
5521 | } |
5522 | |
5523 | // MOVEB |
5524 | OPCODE(0x10C8) |
5525 | { |
5526 | u32 adr, res; |
5527 | u32 src, dst; |
5528 | |
5529 | // can't read byte from Ax registers ! |
5530 | m68kcontext.execinfo |= M68K_FAULTED; |
5531 | m68kcontext.io_cycle_counter = 0; |
5532 | /* |
5533 | goto famec_Exec_End; |
5534 | flag_C = 0; |
5535 | flag_V = 0; |
5536 | flag_NotZ = res; |
5537 | flag_N = res; |
5538 | adr = AREG((Opcode >> 9) & 7); |
5539 | AREG((Opcode >> 9) & 7) += 1; |
5540 | PRE_IO |
5541 | WRITE_BYTE_F(adr, res) |
5542 | POST_IO |
5543 | */ |
5544 | RET(8) |
5545 | } |
5546 | |
5547 | // MOVEB |
5548 | OPCODE(0x1108) |
5549 | { |
5550 | u32 adr, res; |
5551 | u32 src, dst; |
5552 | |
5553 | // can't read byte from Ax registers ! |
5554 | m68kcontext.execinfo |= M68K_FAULTED; |
5555 | m68kcontext.io_cycle_counter = 0; |
5556 | /* |
5557 | goto famec_Exec_End; |
5558 | flag_C = 0; |
5559 | flag_V = 0; |
5560 | flag_NotZ = res; |
5561 | flag_N = res; |
5562 | adr = AREG((Opcode >> 9) & 7) - 1; |
5563 | AREG((Opcode >> 9) & 7) = adr; |
5564 | PRE_IO |
5565 | WRITE_BYTE_F(adr, res) |
5566 | POST_IO |
5567 | */ |
5568 | RET(8) |
5569 | } |
5570 | |
5571 | // MOVEB |
5572 | OPCODE(0x1148) |
5573 | { |
5574 | u32 adr, res; |
5575 | u32 src, dst; |
5576 | |
5577 | // can't read byte from Ax registers ! |
5578 | m68kcontext.execinfo |= M68K_FAULTED; |
5579 | m68kcontext.io_cycle_counter = 0; |
5580 | /* |
5581 | goto famec_Exec_End; |
5582 | flag_C = 0; |
5583 | flag_V = 0; |
5584 | flag_NotZ = res; |
5585 | flag_N = res; |
5586 | FETCH_SWORD(adr); |
5587 | adr += AREG((Opcode >> 9) & 7); |
5588 | PRE_IO |
5589 | WRITE_BYTE_F(adr, res) |
5590 | POST_IO |
5591 | */ |
5592 | RET(12) |
5593 | } |
5594 | |
5595 | // MOVEB |
5596 | OPCODE(0x1188) |
5597 | { |
5598 | u32 adr, res; |
5599 | u32 src, dst; |
5600 | |
5601 | // can't read byte from Ax registers ! |
5602 | m68kcontext.execinfo |= M68K_FAULTED; |
5603 | m68kcontext.io_cycle_counter = 0; |
5604 | /* |
5605 | goto famec_Exec_End; |
5606 | flag_C = 0; |
5607 | flag_V = 0; |
5608 | flag_NotZ = res; |
5609 | flag_N = res; |
5610 | adr = AREG((Opcode >> 9) & 7); |
5611 | DECODE_EXT_WORD |
5612 | PRE_IO |
5613 | WRITE_BYTE_F(adr, res) |
5614 | POST_IO |
5615 | */ |
5616 | RET(14) |
5617 | } |
5618 | |
5619 | // MOVEB |
5620 | OPCODE(0x11C8) |
5621 | { |
5622 | u32 adr, res; |
5623 | u32 src, dst; |
5624 | |
5625 | // can't read byte from Ax registers ! |
5626 | m68kcontext.execinfo |= M68K_FAULTED; |
5627 | m68kcontext.io_cycle_counter = 0; |
5628 | /* |
5629 | goto famec_Exec_End; |
5630 | flag_C = 0; |
5631 | flag_V = 0; |
5632 | flag_NotZ = res; |
5633 | flag_N = res; |
5634 | FETCH_SWORD(adr); |
5635 | PRE_IO |
5636 | WRITE_BYTE_F(adr, res) |
5637 | POST_IO |
5638 | */ |
5639 | RET(12) |
5640 | } |
5641 | |
5642 | // MOVEB |
5643 | OPCODE(0x13C8) |
5644 | { |
5645 | u32 adr, res; |
5646 | u32 src, dst; |
5647 | |
5648 | // can't read byte from Ax registers ! |
5649 | m68kcontext.execinfo |= M68K_FAULTED; |
5650 | m68kcontext.io_cycle_counter = 0; |
5651 | /* |
5652 | goto famec_Exec_End; |
5653 | flag_C = 0; |
5654 | flag_V = 0; |
5655 | flag_NotZ = res; |
5656 | flag_N = res; |
5657 | FETCH_LONG(adr); |
5658 | PRE_IO |
5659 | WRITE_BYTE_F(adr, res) |
5660 | POST_IO |
5661 | */ |
5662 | RET(16) |
5663 | } |
5664 | |
5665 | // MOVEB |
5666 | OPCODE(0x1EC8) |
5667 | { |
5668 | u32 adr, res; |
5669 | u32 src, dst; |
5670 | |
5671 | // can't read byte from Ax registers ! |
5672 | m68kcontext.execinfo |= M68K_FAULTED; |
5673 | m68kcontext.io_cycle_counter = 0; |
5674 | /* |
5675 | goto famec_Exec_End; |
5676 | flag_C = 0; |
5677 | flag_V = 0; |
5678 | flag_NotZ = res; |
5679 | flag_N = res; |
5680 | adr = AREG(7); |
5681 | AREG(7) += 2; |
5682 | PRE_IO |
5683 | WRITE_BYTE_F(adr, res) |
5684 | POST_IO |
5685 | */ |
5686 | RET(8) |
5687 | } |
5688 | |
5689 | // MOVEB |
5690 | OPCODE(0x1F08) |
5691 | { |
5692 | u32 adr, res; |
5693 | u32 src, dst; |
5694 | |
5695 | // can't read byte from Ax registers ! |
5696 | m68kcontext.execinfo |= M68K_FAULTED; |
5697 | m68kcontext.io_cycle_counter = 0; |
5698 | /* |
5699 | goto famec_Exec_End; |
5700 | flag_C = 0; |
5701 | flag_V = 0; |
5702 | flag_NotZ = res; |
5703 | flag_N = res; |
5704 | adr = AREG(7) - 2; |
5705 | AREG(7) = adr; |
5706 | PRE_IO |
5707 | WRITE_BYTE_F(adr, res) |
5708 | POST_IO |
5709 | */ |
5710 | RET(8) |
5711 | } |
03e4f2a3 |
5712 | #endif |
70357ce5 |
5713 | |
5714 | // MOVEB |
5715 | OPCODE(0x1010) |
5716 | { |
5717 | u32 adr, res; |
5718 | u32 src, dst; |
5719 | |
5720 | adr = AREG((Opcode >> 0) & 7); |
5721 | PRE_IO |
5722 | READ_BYTE_F(adr, res) |
5723 | flag_C = 0; |
5724 | flag_V = 0; |
5725 | flag_NotZ = res; |
5726 | flag_N = res; |
5727 | DREGu8((Opcode >> 9) & 7) = res; |
5728 | POST_IO |
5729 | RET(8) |
5730 | } |
5731 | |
5732 | // MOVEB |
5733 | OPCODE(0x1090) |
5734 | { |
5735 | u32 adr, res; |
5736 | u32 src, dst; |
5737 | |
5738 | adr = AREG((Opcode >> 0) & 7); |
5739 | PRE_IO |
5740 | READ_BYTE_F(adr, res) |
5741 | flag_C = 0; |
5742 | flag_V = 0; |
5743 | flag_NotZ = res; |
5744 | flag_N = res; |
5745 | adr = AREG((Opcode >> 9) & 7); |
5746 | WRITE_BYTE_F(adr, res) |
5747 | POST_IO |
5748 | RET(12) |
5749 | } |
5750 | |
5751 | // MOVEB |
5752 | OPCODE(0x10D0) |
5753 | { |
5754 | u32 adr, res; |
5755 | u32 src, dst; |
5756 | |
5757 | adr = AREG((Opcode >> 0) & 7); |
5758 | PRE_IO |
5759 | READ_BYTE_F(adr, res) |
5760 | flag_C = 0; |
5761 | flag_V = 0; |
5762 | flag_NotZ = res; |
5763 | flag_N = res; |
5764 | adr = AREG((Opcode >> 9) & 7); |
5765 | AREG((Opcode >> 9) & 7) += 1; |
5766 | WRITE_BYTE_F(adr, res) |
5767 | POST_IO |
5768 | RET(12) |
5769 | } |
5770 | |
5771 | // MOVEB |
5772 | OPCODE(0x1110) |
5773 | { |
5774 | u32 adr, res; |
5775 | u32 src, dst; |
5776 | |
5777 | adr = AREG((Opcode >> 0) & 7); |
5778 | PRE_IO |
5779 | READ_BYTE_F(adr, res) |
5780 | flag_C = 0; |
5781 | flag_V = 0; |
5782 | flag_NotZ = res; |
5783 | flag_N = res; |
5784 | adr = AREG((Opcode >> 9) & 7) - 1; |
5785 | AREG((Opcode >> 9) & 7) = adr; |
5786 | WRITE_BYTE_F(adr, res) |
5787 | POST_IO |
5788 | RET(12) |
5789 | } |
5790 | |
5791 | // MOVEB |
5792 | OPCODE(0x1150) |
5793 | { |
5794 | u32 adr, res; |
5795 | u32 src, dst; |
5796 | |
5797 | adr = AREG((Opcode >> 0) & 7); |
5798 | PRE_IO |
5799 | READ_BYTE_F(adr, res) |
5800 | flag_C = 0; |
5801 | flag_V = 0; |
5802 | flag_NotZ = res; |
5803 | flag_N = res; |
5804 | FETCH_SWORD(adr); |
5805 | adr += AREG((Opcode >> 9) & 7); |
5806 | WRITE_BYTE_F(adr, res) |
5807 | POST_IO |
5808 | RET(16) |
5809 | } |
5810 | |
5811 | // MOVEB |
5812 | OPCODE(0x1190) |
5813 | { |
5814 | u32 adr, res; |
5815 | u32 src, dst; |
5816 | |
5817 | adr = AREG((Opcode >> 0) & 7); |
5818 | PRE_IO |
5819 | READ_BYTE_F(adr, res) |
5820 | flag_C = 0; |
5821 | flag_V = 0; |
5822 | flag_NotZ = res; |
5823 | flag_N = res; |
5824 | adr = AREG((Opcode >> 9) & 7); |
5825 | DECODE_EXT_WORD |
5826 | WRITE_BYTE_F(adr, res) |
5827 | POST_IO |
5828 | RET(18) |
5829 | } |
5830 | |
5831 | // MOVEB |
5832 | OPCODE(0x11D0) |
5833 | { |
5834 | u32 adr, res; |
5835 | u32 src, dst; |
5836 | |
5837 | adr = AREG((Opcode >> 0) & 7); |
5838 | PRE_IO |
5839 | READ_BYTE_F(adr, res) |
5840 | flag_C = 0; |
5841 | flag_V = 0; |
5842 | flag_NotZ = res; |
5843 | flag_N = res; |
5844 | FETCH_SWORD(adr); |
5845 | WRITE_BYTE_F(adr, res) |
5846 | POST_IO |
5847 | RET(16) |
5848 | } |
5849 | |
5850 | // MOVEB |
5851 | OPCODE(0x13D0) |
5852 | { |
5853 | u32 adr, res; |
5854 | u32 src, dst; |
5855 | |
5856 | adr = AREG((Opcode >> 0) & 7); |
5857 | PRE_IO |
5858 | READ_BYTE_F(adr, res) |
5859 | flag_C = 0; |
5860 | flag_V = 0; |
5861 | flag_NotZ = res; |
5862 | flag_N = res; |
5863 | FETCH_LONG(adr); |
5864 | WRITE_BYTE_F(adr, res) |
5865 | POST_IO |
5866 | RET(20) |
5867 | } |
5868 | |
5869 | // MOVEB |
5870 | OPCODE(0x1ED0) |
5871 | { |
5872 | u32 adr, res; |
5873 | u32 src, dst; |
5874 | |
5875 | adr = AREG((Opcode >> 0) & 7); |
5876 | PRE_IO |
5877 | READ_BYTE_F(adr, res) |
5878 | flag_C = 0; |
5879 | flag_V = 0; |
5880 | flag_NotZ = res; |
5881 | flag_N = res; |
5882 | adr = AREG(7); |
5883 | AREG(7) += 2; |
5884 | WRITE_BYTE_F(adr, res) |
5885 | POST_IO |
5886 | RET(12) |
5887 | } |
5888 | |
5889 | // MOVEB |
5890 | OPCODE(0x1F10) |
5891 | { |
5892 | u32 adr, res; |
5893 | u32 src, dst; |
5894 | |
5895 | adr = AREG((Opcode >> 0) & 7); |
5896 | PRE_IO |
5897 | READ_BYTE_F(adr, res) |
5898 | flag_C = 0; |
5899 | flag_V = 0; |
5900 | flag_NotZ = res; |
5901 | flag_N = res; |
5902 | adr = AREG(7) - 2; |
5903 | AREG(7) = adr; |
5904 | WRITE_BYTE_F(adr, res) |
5905 | POST_IO |
5906 | RET(12) |
5907 | } |
5908 | |
5909 | // MOVEB |
5910 | OPCODE(0x1018) |
5911 | { |
5912 | u32 adr, res; |
5913 | u32 src, dst; |
5914 | |
5915 | adr = AREG((Opcode >> 0) & 7); |
5916 | AREG((Opcode >> 0) & 7) += 1; |
5917 | PRE_IO |
5918 | READ_BYTE_F(adr, res) |
5919 | flag_C = 0; |
5920 | flag_V = 0; |
5921 | flag_NotZ = res; |
5922 | flag_N = res; |
5923 | DREGu8((Opcode >> 9) & 7) = res; |
5924 | POST_IO |
5925 | RET(8) |
5926 | } |
5927 | |
5928 | // MOVEB |
5929 | OPCODE(0x1098) |
5930 | { |
5931 | u32 adr, res; |
5932 | u32 src, dst; |
5933 | |
5934 | adr = AREG((Opcode >> 0) & 7); |
5935 | AREG((Opcode >> 0) & 7) += 1; |
5936 | PRE_IO |
5937 | READ_BYTE_F(adr, res) |
5938 | flag_C = 0; |
5939 | flag_V = 0; |
5940 | flag_NotZ = res; |
5941 | flag_N = res; |
5942 | adr = AREG((Opcode >> 9) & 7); |
5943 | WRITE_BYTE_F(adr, res) |
5944 | POST_IO |
5945 | RET(12) |
5946 | } |
5947 | |
5948 | // MOVEB |
5949 | OPCODE(0x10D8) |
5950 | { |
5951 | u32 adr, res; |
5952 | u32 src, dst; |
5953 | |
5954 | adr = AREG((Opcode >> 0) & 7); |
5955 | AREG((Opcode >> 0) & 7) += 1; |
5956 | PRE_IO |
5957 | READ_BYTE_F(adr, res) |
5958 | flag_C = 0; |
5959 | flag_V = 0; |
5960 | flag_NotZ = res; |
5961 | flag_N = res; |
5962 | adr = AREG((Opcode >> 9) & 7); |
5963 | AREG((Opcode >> 9) & 7) += 1; |
5964 | WRITE_BYTE_F(adr, res) |
5965 | POST_IO |
5966 | RET(12) |
5967 | } |
5968 | |
5969 | // MOVEB |
5970 | OPCODE(0x1118) |
5971 | { |
5972 | u32 adr, res; |
5973 | u32 src, dst; |
5974 | |
5975 | adr = AREG((Opcode >> 0) & 7); |
5976 | AREG((Opcode >> 0) & 7) += 1; |
5977 | PRE_IO |
5978 | READ_BYTE_F(adr, res) |
5979 | flag_C = 0; |
5980 | flag_V = 0; |
5981 | flag_NotZ = res; |
5982 | flag_N = res; |
5983 | adr = AREG((Opcode >> 9) & 7) - 1; |
5984 | AREG((Opcode >> 9) & 7) = adr; |
5985 | WRITE_BYTE_F(adr, res) |
5986 | POST_IO |
5987 | RET(12) |
5988 | } |
5989 | |
5990 | // MOVEB |
5991 | OPCODE(0x1158) |
5992 | { |
5993 | u32 adr, res; |
5994 | u32 src, dst; |
5995 | |
5996 | adr = AREG((Opcode >> 0) & 7); |
5997 | AREG((Opcode >> 0) & 7) += 1; |
5998 | PRE_IO |
5999 | READ_BYTE_F(adr, res) |
6000 | flag_C = 0; |
6001 | flag_V = 0; |
6002 | flag_NotZ = res; |
6003 | flag_N = res; |
6004 | FETCH_SWORD(adr); |
6005 | adr += AREG((Opcode >> 9) & 7); |
6006 | WRITE_BYTE_F(adr, res) |
6007 | POST_IO |
6008 | RET(16) |
6009 | } |
6010 | |
6011 | // MOVEB |
6012 | OPCODE(0x1198) |
6013 | { |
6014 | u32 adr, res; |
6015 | u32 src, dst; |
6016 | |
6017 | adr = AREG((Opcode >> 0) & 7); |
6018 | AREG((Opcode >> 0) & 7) += 1; |
6019 | PRE_IO |
6020 | READ_BYTE_F(adr, res) |
6021 | flag_C = 0; |
6022 | flag_V = 0; |
6023 | flag_NotZ = res; |
6024 | flag_N = res; |
6025 | adr = AREG((Opcode >> 9) & 7); |
6026 | DECODE_EXT_WORD |
6027 | WRITE_BYTE_F(adr, res) |
6028 | POST_IO |
6029 | RET(18) |
6030 | } |
6031 | |
6032 | // MOVEB |
6033 | OPCODE(0x11D8) |
6034 | { |
6035 | u32 adr, res; |
6036 | u32 src, dst; |
6037 | |
6038 | adr = AREG((Opcode >> 0) & 7); |
6039 | AREG((Opcode >> 0) & 7) += 1; |
6040 | PRE_IO |
6041 | READ_BYTE_F(adr, res) |
6042 | flag_C = 0; |
6043 | flag_V = 0; |
6044 | flag_NotZ = res; |
6045 | flag_N = res; |
6046 | FETCH_SWORD(adr); |
6047 | WRITE_BYTE_F(adr, res) |
6048 | POST_IO |
6049 | RET(16) |
6050 | } |
6051 | |
6052 | // MOVEB |
6053 | OPCODE(0x13D8) |
6054 | { |
6055 | u32 adr, res; |
6056 | u32 src, dst; |
6057 | |
6058 | adr = AREG((Opcode >> 0) & 7); |
6059 | AREG((Opcode >> 0) & 7) += 1; |
6060 | PRE_IO |
6061 | READ_BYTE_F(adr, res) |
6062 | flag_C = 0; |
6063 | flag_V = 0; |
6064 | flag_NotZ = res; |
6065 | flag_N = res; |
6066 | FETCH_LONG(adr); |
6067 | WRITE_BYTE_F(adr, res) |
6068 | POST_IO |
6069 | RET(20) |
6070 | } |
6071 | |
6072 | // MOVEB |
6073 | OPCODE(0x1ED8) |
6074 | { |
6075 | u32 adr, res; |
6076 | u32 src, dst; |
6077 | |
6078 | adr = AREG((Opcode >> 0) & 7); |
6079 | AREG((Opcode >> 0) & 7) += 1; |
6080 | PRE_IO |
6081 | READ_BYTE_F(adr, res) |
6082 | flag_C = 0; |
6083 | flag_V = 0; |
6084 | flag_NotZ = res; |
6085 | flag_N = res; |
6086 | adr = AREG(7); |
6087 | AREG(7) += 2; |
6088 | WRITE_BYTE_F(adr, res) |
6089 | POST_IO |
6090 | RET(12) |
6091 | } |
6092 | |
6093 | // MOVEB |
6094 | OPCODE(0x1F18) |
6095 | { |
6096 | u32 adr, res; |
6097 | u32 src, dst; |
6098 | |
6099 | adr = AREG((Opcode >> 0) & 7); |
6100 | AREG((Opcode >> 0) & 7) += 1; |
6101 | PRE_IO |
6102 | READ_BYTE_F(adr, res) |
6103 | flag_C = 0; |
6104 | flag_V = 0; |
6105 | flag_NotZ = res; |
6106 | flag_N = res; |
6107 | adr = AREG(7) - 2; |
6108 | AREG(7) = adr; |
6109 | WRITE_BYTE_F(adr, res) |
6110 | POST_IO |
6111 | RET(12) |
6112 | } |
6113 | |
6114 | // MOVEB |
6115 | OPCODE(0x1020) |
6116 | { |
6117 | u32 adr, res; |
6118 | u32 src, dst; |
6119 | |
6120 | adr = AREG((Opcode >> 0) & 7) - 1; |
6121 | AREG((Opcode >> 0) & 7) = adr; |
6122 | PRE_IO |
6123 | READ_BYTE_F(adr, res) |
6124 | flag_C = 0; |
6125 | flag_V = 0; |
6126 | flag_NotZ = res; |
6127 | flag_N = res; |
6128 | DREGu8((Opcode >> 9) & 7) = res; |
6129 | POST_IO |
6130 | RET(10) |
6131 | } |
6132 | |
6133 | // MOVEB |
6134 | OPCODE(0x10A0) |
6135 | { |
6136 | u32 adr, res; |
6137 | u32 src, dst; |
6138 | |
6139 | adr = AREG((Opcode >> 0) & 7) - 1; |
6140 | AREG((Opcode >> 0) & 7) = adr; |
6141 | PRE_IO |
6142 | READ_BYTE_F(adr, res) |
6143 | flag_C = 0; |
6144 | flag_V = 0; |
6145 | flag_NotZ = res; |
6146 | flag_N = res; |
6147 | adr = AREG((Opcode >> 9) & 7); |
6148 | WRITE_BYTE_F(adr, res) |
6149 | POST_IO |
6150 | RET(14) |
6151 | } |
6152 | |
6153 | // MOVEB |
6154 | OPCODE(0x10E0) |
6155 | { |
6156 | u32 adr, res; |
6157 | u32 src, dst; |
6158 | |
6159 | adr = AREG((Opcode >> 0) & 7) - 1; |
6160 | AREG((Opcode >> 0) & 7) = adr; |
6161 | PRE_IO |
6162 | READ_BYTE_F(adr, res) |
6163 | flag_C = 0; |
6164 | flag_V = 0; |
6165 | flag_NotZ = res; |
6166 | flag_N = res; |
6167 | adr = AREG((Opcode >> 9) & 7); |
6168 | AREG((Opcode >> 9) & 7) += 1; |
6169 | WRITE_BYTE_F(adr, res) |
6170 | POST_IO |
6171 | RET(14) |
6172 | } |
6173 | |
6174 | // MOVEB |
6175 | OPCODE(0x1120) |
6176 | { |
6177 | u32 adr, res; |
6178 | u32 src, dst; |
6179 | |
6180 | adr = AREG((Opcode >> 0) & 7) - 1; |
6181 | AREG((Opcode >> 0) & 7) = adr; |
6182 | PRE_IO |
6183 | READ_BYTE_F(adr, res) |
6184 | flag_C = 0; |
6185 | flag_V = 0; |
6186 | flag_NotZ = res; |
6187 | flag_N = res; |
6188 | adr = AREG((Opcode >> 9) & 7) - 1; |
6189 | AREG((Opcode >> 9) & 7) = adr; |
6190 | WRITE_BYTE_F(adr, res) |
6191 | POST_IO |
6192 | RET(14) |
6193 | } |
6194 | |
6195 | // MOVEB |
6196 | OPCODE(0x1160) |
6197 | { |
6198 | u32 adr, res; |
6199 | u32 src, dst; |
6200 | |
6201 | adr = AREG((Opcode >> 0) & 7) - 1; |
6202 | AREG((Opcode >> 0) & 7) = adr; |
6203 | PRE_IO |
6204 | READ_BYTE_F(adr, res) |
6205 | flag_C = 0; |
6206 | flag_V = 0; |
6207 | flag_NotZ = res; |
6208 | flag_N = res; |
6209 | FETCH_SWORD(adr); |
6210 | adr += AREG((Opcode >> 9) & 7); |
6211 | WRITE_BYTE_F(adr, res) |
6212 | POST_IO |
6213 | RET(18) |
6214 | } |
6215 | |
6216 | // MOVEB |
6217 | OPCODE(0x11A0) |
6218 | { |
6219 | u32 adr, res; |
6220 | u32 src, dst; |
6221 | |
6222 | adr = AREG((Opcode >> 0) & 7) - 1; |
6223 | AREG((Opcode >> 0) & 7) = adr; |
6224 | PRE_IO |
6225 | READ_BYTE_F(adr, res) |
6226 | flag_C = 0; |
6227 | flag_V = 0; |
6228 | flag_NotZ = res; |
6229 | flag_N = res; |
6230 | adr = AREG((Opcode >> 9) & 7); |
6231 | DECODE_EXT_WORD |
6232 | WRITE_BYTE_F(adr, res) |
6233 | POST_IO |
6234 | RET(20) |
6235 | } |
6236 | |
6237 | // MOVEB |
6238 | OPCODE(0x11E0) |
6239 | { |
6240 | u32 adr, res; |
6241 | u32 src, dst; |
6242 | |
6243 | adr = AREG((Opcode >> 0) & 7) - 1; |
6244 | AREG((Opcode >> 0) & 7) = adr; |
6245 | PRE_IO |
6246 | READ_BYTE_F(adr, res) |
6247 | flag_C = 0; |
6248 | flag_V = 0; |
6249 | flag_NotZ = res; |
6250 | flag_N = res; |
6251 | FETCH_SWORD(adr); |
6252 | WRITE_BYTE_F(adr, res) |
6253 | POST_IO |
6254 | RET(18) |
6255 | } |
6256 | |
6257 | // MOVEB |
6258 | OPCODE(0x13E0) |
6259 | { |
6260 | u32 adr, res; |
6261 | u32 src, dst; |
6262 | |
6263 | adr = AREG((Opcode >> 0) & 7) - 1; |
6264 | AREG((Opcode >> 0) & 7) = adr; |
6265 | PRE_IO |
6266 | READ_BYTE_F(adr, res) |
6267 | flag_C = 0; |
6268 | flag_V = 0; |
6269 | flag_NotZ = res; |
6270 | flag_N = res; |
6271 | FETCH_LONG(adr); |
6272 | WRITE_BYTE_F(adr, res) |
6273 | POST_IO |
6274 | RET(22) |
6275 | } |
6276 | |
6277 | // MOVEB |
6278 | OPCODE(0x1EE0) |
6279 | { |
6280 | u32 adr, res; |
6281 | u32 src, dst; |
6282 | |
6283 | adr = AREG((Opcode >> 0) & 7) - 1; |
6284 | AREG((Opcode >> 0) & 7) = adr; |
6285 | PRE_IO |
6286 | READ_BYTE_F(adr, res) |
6287 | flag_C = 0; |
6288 | flag_V = 0; |
6289 | flag_NotZ = res; |
6290 | flag_N = res; |
6291 | adr = AREG(7); |
6292 | AREG(7) += 2; |
6293 | WRITE_BYTE_F(adr, res) |
6294 | POST_IO |
6295 | RET(14) |
6296 | } |
6297 | |
6298 | // MOVEB |
6299 | OPCODE(0x1F20) |
6300 | { |
6301 | u32 adr, res; |
6302 | u32 src, dst; |
6303 | |
6304 | adr = AREG((Opcode >> 0) & 7) - 1; |
6305 | AREG((Opcode >> 0) & 7) = adr; |
6306 | PRE_IO |
6307 | READ_BYTE_F(adr, res) |
6308 | flag_C = 0; |
6309 | flag_V = 0; |
6310 | flag_NotZ = res; |
6311 | flag_N = res; |
6312 | adr = AREG(7) - 2; |
6313 | AREG(7) = adr; |
6314 | WRITE_BYTE_F(adr, res) |
6315 | POST_IO |
6316 | RET(14) |
6317 | } |
6318 | |
6319 | // MOVEB |
6320 | OPCODE(0x1028) |
6321 | { |
6322 | u32 adr, res; |
6323 | u32 src, dst; |
6324 | |
6325 | FETCH_SWORD(adr); |
6326 | adr += AREG((Opcode >> 0) & 7); |
6327 | PRE_IO |
6328 | READ_BYTE_F(adr, res) |
6329 | flag_C = 0; |
6330 | flag_V = 0; |
6331 | flag_NotZ = res; |
6332 | flag_N = res; |
6333 | DREGu8((Opcode >> 9) & 7) = res; |
6334 | POST_IO |
6335 | RET(12) |
6336 | } |
6337 | |
6338 | // MOVEB |
6339 | OPCODE(0x10A8) |
6340 | { |
6341 | u32 adr, res; |
6342 | u32 src, dst; |
6343 | |
6344 | FETCH_SWORD(adr); |
6345 | adr += AREG((Opcode >> 0) & 7); |
6346 | PRE_IO |
6347 | READ_BYTE_F(adr, res) |
6348 | flag_C = 0; |
6349 | flag_V = 0; |
6350 | flag_NotZ = res; |
6351 | flag_N = res; |
6352 | adr = AREG((Opcode >> 9) & 7); |
6353 | WRITE_BYTE_F(adr, res) |
6354 | POST_IO |
6355 | RET(16) |
6356 | } |
6357 | |
6358 | // MOVEB |
6359 | OPCODE(0x10E8) |
6360 | { |
6361 | u32 adr, res; |
6362 | u32 src, dst; |
6363 | |
6364 | FETCH_SWORD(adr); |
6365 | adr += AREG((Opcode >> 0) & 7); |
6366 | PRE_IO |
6367 | READ_BYTE_F(adr, res) |
6368 | flag_C = 0; |
6369 | flag_V = 0; |
6370 | flag_NotZ = res; |
6371 | flag_N = res; |
6372 | adr = AREG((Opcode >> 9) & 7); |
6373 | AREG((Opcode >> 9) & 7) += 1; |
6374 | WRITE_BYTE_F(adr, res) |
6375 | POST_IO |
6376 | RET(16) |
6377 | } |
6378 | |
6379 | // MOVEB |
6380 | OPCODE(0x1128) |
6381 | { |
6382 | u32 adr, res; |
6383 | u32 src, dst; |
6384 | |
6385 | FETCH_SWORD(adr); |
6386 | adr += AREG((Opcode >> 0) & 7); |
6387 | PRE_IO |
6388 | READ_BYTE_F(adr, res) |
6389 | flag_C = 0; |
6390 | flag_V = 0; |
6391 | flag_NotZ = res; |
6392 | flag_N = res; |
6393 | adr = AREG((Opcode >> 9) & 7) - 1; |
6394 | AREG((Opcode >> 9) & 7) = adr; |
6395 | WRITE_BYTE_F(adr, res) |
6396 | POST_IO |
6397 | RET(16) |
6398 | } |
6399 | |
6400 | // MOVEB |
6401 | OPCODE(0x1168) |
6402 | { |
6403 | u32 adr, res; |
6404 | u32 src, dst; |
6405 | |
6406 | FETCH_SWORD(adr); |
6407 | adr += AREG((Opcode >> 0) & 7); |
6408 | PRE_IO |
6409 | READ_BYTE_F(adr, res) |
6410 | flag_C = 0; |
6411 | flag_V = 0; |
6412 | flag_NotZ = res; |
6413 | flag_N = res; |
6414 | FETCH_SWORD(adr); |
6415 | adr += AREG((Opcode >> 9) & 7); |
6416 | WRITE_BYTE_F(adr, res) |
6417 | POST_IO |
6418 | RET(20) |
6419 | } |
6420 | |
6421 | // MOVEB |
6422 | OPCODE(0x11A8) |
6423 | { |
6424 | u32 adr, res; |
6425 | u32 src, dst; |
6426 | |
6427 | FETCH_SWORD(adr); |
6428 | adr += AREG((Opcode >> 0) & 7); |
6429 | PRE_IO |
6430 | READ_BYTE_F(adr, res) |
6431 | flag_C = 0; |
6432 | flag_V = 0; |
6433 | flag_NotZ = res; |
6434 | flag_N = res; |
6435 | adr = AREG((Opcode >> 9) & 7); |
6436 | DECODE_EXT_WORD |
6437 | WRITE_BYTE_F(adr, res) |
6438 | POST_IO |
6439 | RET(22) |
6440 | } |
6441 | |
6442 | // MOVEB |
6443 | OPCODE(0x11E8) |
6444 | { |
6445 | u32 adr, res; |
6446 | u32 src, dst; |
6447 | |
6448 | FETCH_SWORD(adr); |
6449 | adr += AREG((Opcode >> 0) & 7); |
6450 | PRE_IO |
6451 | READ_BYTE_F(adr, res) |
6452 | flag_C = 0; |
6453 | flag_V = 0; |
6454 | flag_NotZ = res; |
6455 | flag_N = res; |
6456 | FETCH_SWORD(adr); |
6457 | WRITE_BYTE_F(adr, res) |
6458 | POST_IO |
6459 | RET(20) |
6460 | } |
6461 | |
6462 | // MOVEB |
6463 | OPCODE(0x13E8) |
6464 | { |
6465 | u32 adr, res; |
6466 | u32 src, dst; |
6467 | |
6468 | FETCH_SWORD(adr); |
6469 | adr += AREG((Opcode >> 0) & 7); |
6470 | PRE_IO |
6471 | READ_BYTE_F(adr, res) |
6472 | flag_C = 0; |
6473 | flag_V = 0; |
6474 | flag_NotZ = res; |
6475 | flag_N = res; |
6476 | FETCH_LONG(adr); |
6477 | WRITE_BYTE_F(adr, res) |
6478 | POST_IO |
6479 | RET(24) |
6480 | } |
6481 | |
6482 | // MOVEB |
6483 | OPCODE(0x1EE8) |
6484 | { |
6485 | u32 adr, res; |
6486 | u32 src, dst; |
6487 | |
6488 | FETCH_SWORD(adr); |
6489 | adr += AREG((Opcode >> 0) & 7); |
6490 | PRE_IO |
6491 | READ_BYTE_F(adr, res) |
6492 | flag_C = 0; |
6493 | flag_V = 0; |
6494 | flag_NotZ = res; |
6495 | flag_N = res; |
6496 | adr = AREG(7); |
6497 | AREG(7) += 2; |
6498 | WRITE_BYTE_F(adr, res) |
6499 | POST_IO |
6500 | RET(16) |
6501 | } |
6502 | |
6503 | // MOVEB |
6504 | OPCODE(0x1F28) |
6505 | { |
6506 | u32 adr, res; |
6507 | u32 src, dst; |
6508 | |
6509 | FETCH_SWORD(adr); |
6510 | adr += AREG((Opcode >> 0) & 7); |
6511 | PRE_IO |
6512 | READ_BYTE_F(adr, res) |
6513 | flag_C = 0; |
6514 | flag_V = 0; |
6515 | flag_NotZ = res; |
6516 | flag_N = res; |
6517 | adr = AREG(7) - 2; |
6518 | AREG(7) = adr; |
6519 | WRITE_BYTE_F(adr, res) |
6520 | POST_IO |
6521 | RET(16) |
6522 | } |
6523 | |
6524 | // MOVEB |
6525 | OPCODE(0x1030) |
6526 | { |
6527 | u32 adr, res; |
6528 | u32 src, dst; |
6529 | |
6530 | adr = AREG((Opcode >> 0) & 7); |
6531 | DECODE_EXT_WORD |
6532 | PRE_IO |
6533 | READ_BYTE_F(adr, res) |
6534 | flag_C = 0; |
6535 | flag_V = 0; |
6536 | flag_NotZ = res; |
6537 | flag_N = res; |
6538 | DREGu8((Opcode >> 9) & 7) = res; |
6539 | POST_IO |
6540 | RET(14) |
6541 | } |
6542 | |
6543 | // MOVEB |
6544 | OPCODE(0x10B0) |
6545 | { |
6546 | u32 adr, res; |
6547 | u32 src, dst; |
6548 | |
6549 | adr = AREG((Opcode >> 0) & 7); |
6550 | DECODE_EXT_WORD |
6551 | PRE_IO |
6552 | READ_BYTE_F(adr, res) |
6553 | flag_C = 0; |
6554 | flag_V = 0; |
6555 | flag_NotZ = res; |
6556 | flag_N = res; |
6557 | adr = AREG((Opcode >> 9) & 7); |
6558 | WRITE_BYTE_F(adr, res) |
6559 | POST_IO |
6560 | RET(18) |
6561 | } |
6562 | |
6563 | // MOVEB |
6564 | OPCODE(0x10F0) |
6565 | { |
6566 | u32 adr, res; |
6567 | u32 src, dst; |
6568 | |
6569 | adr = AREG((Opcode >> 0) & 7); |
6570 | DECODE_EXT_WORD |
6571 | PRE_IO |
6572 | READ_BYTE_F(adr, res) |
6573 | flag_C = 0; |
6574 | flag_V = 0; |
6575 | flag_NotZ = res; |
6576 | flag_N = res; |
6577 | adr = AREG((Opcode >> 9) & 7); |
6578 | AREG((Opcode >> 9) & 7) += 1; |
6579 | WRITE_BYTE_F(adr, res) |
6580 | POST_IO |
6581 | RET(18) |
6582 | } |
6583 | |
6584 | // MOVEB |
6585 | OPCODE(0x1130) |
6586 | { |
6587 | u32 adr, res; |
6588 | u32 src, dst; |
6589 | |
6590 | adr = AREG((Opcode >> 0) & 7); |
6591 | DECODE_EXT_WORD |
6592 | PRE_IO |
6593 | READ_BYTE_F(adr, res) |
6594 | flag_C = 0; |
6595 | flag_V = 0; |
6596 | flag_NotZ = res; |
6597 | flag_N = res; |
6598 | adr = AREG((Opcode >> 9) & 7) - 1; |
6599 | AREG((Opcode >> 9) & 7) = adr; |
6600 | WRITE_BYTE_F(adr, res) |
6601 | POST_IO |
6602 | RET(18) |
6603 | } |
6604 | |
6605 | // MOVEB |
6606 | OPCODE(0x1170) |
6607 | { |
6608 | u32 adr, res; |
6609 | u32 src, dst; |
6610 | |
6611 | adr = AREG((Opcode >> 0) & 7); |
6612 | DECODE_EXT_WORD |
6613 | PRE_IO |
6614 | READ_BYTE_F(adr, res) |
6615 | flag_C = 0; |
6616 | flag_V = 0; |
6617 | flag_NotZ = res; |
6618 | flag_N = res; |
6619 | FETCH_SWORD(adr); |
6620 | adr += AREG((Opcode >> 9) & 7); |
6621 | WRITE_BYTE_F(adr, res) |
6622 | POST_IO |
6623 | RET(22) |
6624 | } |
6625 | |
6626 | // MOVEB |
6627 | OPCODE(0x11B0) |
6628 | { |
6629 | u32 adr, res; |
6630 | u32 src, dst; |
6631 | |
6632 | adr = AREG((Opcode >> 0) & 7); |
6633 | DECODE_EXT_WORD |
6634 | PRE_IO |
6635 | READ_BYTE_F(adr, res) |
6636 | flag_C = 0; |
6637 | flag_V = 0; |
6638 | flag_NotZ = res; |
6639 | flag_N = res; |
6640 | adr = AREG((Opcode >> 9) & 7); |
6641 | DECODE_EXT_WORD |
6642 | WRITE_BYTE_F(adr, res) |
6643 | POST_IO |
6644 | RET(24) |
6645 | } |
6646 | |
6647 | // MOVEB |
6648 | OPCODE(0x11F0) |
6649 | { |
6650 | u32 adr, res; |
6651 | u32 src, dst; |
6652 | |
6653 | adr = AREG((Opcode >> 0) & 7); |
6654 | DECODE_EXT_WORD |
6655 | PRE_IO |
6656 | READ_BYTE_F(adr, res) |
6657 | flag_C = 0; |
6658 | flag_V = 0; |
6659 | flag_NotZ = res; |
6660 | flag_N = res; |
6661 | FETCH_SWORD(adr); |
6662 | WRITE_BYTE_F(adr, res) |
6663 | POST_IO |
6664 | RET(22) |
6665 | } |
6666 | |
6667 | // MOVEB |
6668 | OPCODE(0x13F0) |
6669 | { |
6670 | u32 adr, res; |
6671 | u32 src, dst; |
6672 | |
6673 | adr = AREG((Opcode >> 0) & 7); |
6674 | DECODE_EXT_WORD |
6675 | PRE_IO |
6676 | READ_BYTE_F(adr, res) |
6677 | flag_C = 0; |
6678 | flag_V = 0; |
6679 | flag_NotZ = res; |
6680 | flag_N = res; |
6681 | FETCH_LONG(adr); |
6682 | WRITE_BYTE_F(adr, res) |
6683 | POST_IO |
6684 | RET(26) |
6685 | } |
6686 | |
6687 | // MOVEB |
6688 | OPCODE(0x1EF0) |
6689 | { |
6690 | u32 adr, res; |
6691 | u32 src, dst; |
6692 | |
6693 | adr = AREG((Opcode >> 0) & 7); |
6694 | DECODE_EXT_WORD |
6695 | PRE_IO |
6696 | READ_BYTE_F(adr, res) |
6697 | flag_C = 0; |
6698 | flag_V = 0; |
6699 | flag_NotZ = res; |
6700 | flag_N = res; |
6701 | adr = AREG(7); |
6702 | AREG(7) += 2; |
6703 | WRITE_BYTE_F(adr, res) |
6704 | POST_IO |
6705 | RET(18) |
6706 | } |
6707 | |
6708 | // MOVEB |
6709 | OPCODE(0x1F30) |
6710 | { |
6711 | u32 adr, res; |
6712 | u32 src, dst; |
6713 | |
6714 | adr = AREG((Opcode >> 0) & 7); |
6715 | DECODE_EXT_WORD |
6716 | PRE_IO |
6717 | READ_BYTE_F(adr, res) |
6718 | flag_C = 0; |
6719 | flag_V = 0; |
6720 | flag_NotZ = res; |
6721 | flag_N = res; |
6722 | adr = AREG(7) - 2; |
6723 | AREG(7) = adr; |
6724 | WRITE_BYTE_F(adr, res) |
6725 | POST_IO |
6726 | RET(18) |
6727 | } |
6728 | |
6729 | // MOVEB |
6730 | OPCODE(0x1038) |
6731 | { |
6732 | u32 adr, res; |
6733 | u32 src, dst; |
6734 | |
6735 | FETCH_SWORD(adr); |
6736 | PRE_IO |
6737 | READ_BYTE_F(adr, res) |
6738 | flag_C = 0; |
6739 | flag_V = 0; |
6740 | flag_NotZ = res; |
6741 | flag_N = res; |
6742 | DREGu8((Opcode >> 9) & 7) = res; |
6743 | POST_IO |
6744 | RET(12) |
6745 | } |
6746 | |
6747 | // MOVEB |
6748 | OPCODE(0x10B8) |
6749 | { |
6750 | u32 adr, res; |
6751 | u32 src, dst; |
6752 | |
6753 | FETCH_SWORD(adr); |
6754 | PRE_IO |
6755 | READ_BYTE_F(adr, res) |
6756 | flag_C = 0; |
6757 | flag_V = 0; |
6758 | flag_NotZ = res; |
6759 | flag_N = res; |
6760 | adr = AREG((Opcode >> 9) & 7); |
6761 | WRITE_BYTE_F(adr, res) |
6762 | POST_IO |
6763 | RET(16) |
6764 | } |
6765 | |
6766 | // MOVEB |
6767 | OPCODE(0x10F8) |
6768 | { |
6769 | u32 adr, res; |
6770 | u32 src, dst; |
6771 | |
6772 | FETCH_SWORD(adr); |
6773 | PRE_IO |
6774 | READ_BYTE_F(adr, res) |
6775 | flag_C = 0; |
6776 | flag_V = 0; |
6777 | flag_NotZ = res; |
6778 | flag_N = res; |
6779 | adr = AREG((Opcode >> 9) & 7); |
6780 | AREG((Opcode >> 9) & 7) += 1; |
6781 | WRITE_BYTE_F(adr, res) |
6782 | POST_IO |
6783 | RET(16) |
6784 | } |
6785 | |
6786 | // MOVEB |
6787 | OPCODE(0x1138) |
6788 | { |
6789 | u32 adr, res; |
6790 | u32 src, dst; |
6791 | |
6792 | FETCH_SWORD(adr); |
6793 | PRE_IO |
6794 | READ_BYTE_F(adr, res) |
6795 | flag_C = 0; |
6796 | flag_V = 0; |
6797 | flag_NotZ = res; |
6798 | flag_N = res; |
6799 | adr = AREG((Opcode >> 9) & 7) - 1; |
6800 | AREG((Opcode >> 9) & 7) = adr; |
6801 | WRITE_BYTE_F(adr, res) |
6802 | POST_IO |
6803 | RET(16) |
6804 | } |
6805 | |
6806 | // MOVEB |
6807 | OPCODE(0x1178) |
6808 | { |
6809 | u32 adr, res; |
6810 | u32 src, dst; |
6811 | |
6812 | FETCH_SWORD(adr); |
6813 | PRE_IO |
6814 | READ_BYTE_F(adr, res) |
6815 | flag_C = 0; |
6816 | flag_V = 0; |
6817 | flag_NotZ = res; |
6818 | flag_N = res; |
6819 | FETCH_SWORD(adr); |
6820 | adr += AREG((Opcode >> 9) & 7); |
6821 | WRITE_BYTE_F(adr, res) |
6822 | POST_IO |
6823 | RET(20) |
6824 | } |
6825 | |
6826 | // MOVEB |
6827 | OPCODE(0x11B8) |
6828 | { |
6829 | u32 adr, res; |
6830 | u32 src, dst; |
6831 | |
6832 | FETCH_SWORD(adr); |
6833 | PRE_IO |
6834 | READ_BYTE_F(adr, res) |
6835 | flag_C = 0; |
6836 | flag_V = 0; |
6837 | flag_NotZ = res; |
6838 | flag_N = res; |
6839 | adr = AREG((Opcode >> 9) & 7); |
6840 | DECODE_EXT_WORD |
6841 | WRITE_BYTE_F(adr, res) |
6842 | POST_IO |
6843 | RET(22) |
6844 | } |
6845 | |
6846 | // MOVEB |
6847 | OPCODE(0x11F8) |
6848 | { |
6849 | u32 adr, res; |
6850 | u32 src, dst; |
6851 | |
6852 | FETCH_SWORD(adr); |
6853 | PRE_IO |
6854 | READ_BYTE_F(adr, res) |
6855 | flag_C = 0; |
6856 | flag_V = 0; |
6857 | flag_NotZ = res; |
6858 | flag_N = res; |
6859 | FETCH_SWORD(adr); |
6860 | WRITE_BYTE_F(adr, res) |
6861 | POST_IO |
6862 | RET(20) |
6863 | } |
6864 | |
6865 | // MOVEB |
6866 | OPCODE(0x13F8) |
6867 | { |
6868 | u32 adr, res; |
6869 | u32 src, dst; |
6870 | |
6871 | FETCH_SWORD(adr); |
6872 | PRE_IO |
6873 | READ_BYTE_F(adr, res) |
6874 | flag_C = 0; |
6875 | flag_V = 0; |
6876 | flag_NotZ = res; |
6877 | flag_N = res; |
6878 | FETCH_LONG(adr); |
6879 | WRITE_BYTE_F(adr, res) |
6880 | POST_IO |
6881 | RET(24) |
6882 | } |
6883 | |
6884 | // MOVEB |
6885 | OPCODE(0x1EF8) |
6886 | { |
6887 | u32 adr, res; |
6888 | u32 src, dst; |
6889 | |
6890 | FETCH_SWORD(adr); |
6891 | PRE_IO |
6892 | READ_BYTE_F(adr, res) |
6893 | flag_C = 0; |
6894 | flag_V = 0; |
6895 | flag_NotZ = res; |
6896 | flag_N = res; |
6897 | adr = AREG(7); |
6898 | AREG(7) += 2; |
6899 | WRITE_BYTE_F(adr, res) |
6900 | POST_IO |
6901 | RET(16) |
6902 | } |
6903 | |
6904 | // MOVEB |
6905 | OPCODE(0x1F38) |
6906 | { |
6907 | u32 adr, res; |
6908 | u32 src, dst; |
6909 | |
6910 | FETCH_SWORD(adr); |
6911 | PRE_IO |
6912 | READ_BYTE_F(adr, res) |
6913 | flag_C = 0; |
6914 | flag_V = 0; |
6915 | flag_NotZ = res; |
6916 | flag_N = res; |
6917 | adr = AREG(7) - 2; |
6918 | AREG(7) = adr; |
6919 | WRITE_BYTE_F(adr, res) |
6920 | POST_IO |
6921 | RET(16) |
6922 | } |
6923 | |
6924 | // MOVEB |
6925 | OPCODE(0x1039) |
6926 | { |
6927 | u32 adr, res; |
6928 | u32 src, dst; |
6929 | |
6930 | FETCH_LONG(adr); |
6931 | PRE_IO |
6932 | READ_BYTE_F(adr, res) |
6933 | flag_C = 0; |
6934 | flag_V = 0; |
6935 | flag_NotZ = res; |
6936 | flag_N = res; |
6937 | DREGu8((Opcode >> 9) & 7) = res; |
6938 | POST_IO |
6939 | RET(16) |
6940 | } |
6941 | |
6942 | // MOVEB |
6943 | OPCODE(0x10B9) |
6944 | { |
6945 | u32 adr, res; |
6946 | u32 src, dst; |
6947 | |
6948 | FETCH_LONG(adr); |
6949 | PRE_IO |
6950 | READ_BYTE_F(adr, res) |
6951 | flag_C = 0; |
6952 | flag_V = 0; |
6953 | flag_NotZ = res; |
6954 | flag_N = res; |
6955 | adr = AREG((Opcode >> 9) & 7); |
6956 | WRITE_BYTE_F(adr, res) |
6957 | POST_IO |
6958 | RET(20) |
6959 | } |
6960 | |
6961 | // MOVEB |
6962 | OPCODE(0x10F9) |
6963 | { |
6964 | u32 adr, res; |
6965 | u32 src, dst; |
6966 | |
6967 | FETCH_LONG(adr); |
6968 | PRE_IO |
6969 | READ_BYTE_F(adr, res) |
6970 | flag_C = 0; |
6971 | flag_V = 0; |
6972 | flag_NotZ = res; |
6973 | flag_N = res; |
6974 | adr = AREG((Opcode >> 9) & 7); |
6975 | AREG((Opcode >> 9) & 7) += 1; |
6976 | WRITE_BYTE_F(adr, res) |
6977 | POST_IO |
6978 | RET(20) |
6979 | } |
6980 | |
6981 | // MOVEB |
6982 | OPCODE(0x1139) |
6983 | { |
6984 | u32 adr, res; |
6985 | u32 src, dst; |
6986 | |
6987 | FETCH_LONG(adr); |
6988 | PRE_IO |
6989 | READ_BYTE_F(adr, res) |
6990 | flag_C = 0; |
6991 | flag_V = 0; |
6992 | flag_NotZ = res; |
6993 | flag_N = res; |
6994 | adr = AREG((Opcode >> 9) & 7) - 1; |
6995 | AREG((Opcode >> 9) & 7) = adr; |
6996 | WRITE_BYTE_F(adr, res) |
6997 | POST_IO |
6998 | RET(20) |
6999 | } |
7000 | |
7001 | // MOVEB |
7002 | OPCODE(0x1179) |
7003 | { |
7004 | u32 adr, res; |
7005 | u32 src, dst; |
7006 | |
7007 | FETCH_LONG(adr); |
7008 | PRE_IO |
7009 | READ_BYTE_F(adr, res) |
7010 | flag_C = 0; |
7011 | flag_V = 0; |
7012 | flag_NotZ = res; |
7013 | flag_N = res; |
7014 | FETCH_SWORD(adr); |
7015 | adr += AREG((Opcode >> 9) & 7); |
7016 | WRITE_BYTE_F(adr, res) |
7017 | POST_IO |
7018 | RET(24) |
7019 | } |
7020 | |
7021 | // MOVEB |
7022 | OPCODE(0x11B9) |
7023 | { |
7024 | u32 adr, res; |
7025 | u32 src, dst; |
7026 | |
7027 | FETCH_LONG(adr); |
7028 | PRE_IO |
7029 | READ_BYTE_F(adr, res) |
7030 | flag_C = 0; |
7031 | flag_V = 0; |
7032 | flag_NotZ = res; |
7033 | flag_N = res; |
7034 | adr = AREG((Opcode >> 9) & 7); |
7035 | DECODE_EXT_WORD |
7036 | WRITE_BYTE_F(adr, res) |
7037 | POST_IO |
7038 | RET(26) |
7039 | } |
7040 | |
7041 | // MOVEB |
7042 | OPCODE(0x11F9) |
7043 | { |
7044 | u32 adr, res; |
7045 | u32 src, dst; |
7046 | |
7047 | FETCH_LONG(adr); |
7048 | PRE_IO |
7049 | READ_BYTE_F(adr, res) |
7050 | flag_C = 0; |
7051 | flag_V = 0; |
7052 | flag_NotZ = res; |
7053 | flag_N = res; |
7054 | FETCH_SWORD(adr); |
7055 | WRITE_BYTE_F(adr, res) |
7056 | POST_IO |
7057 | RET(24) |
7058 | } |
7059 | |
7060 | // MOVEB |
7061 | OPCODE(0x13F9) |
7062 | { |
7063 | u32 adr, res; |
7064 | u32 src, dst; |
7065 | |
7066 | FETCH_LONG(adr); |
7067 | PRE_IO |
7068 | READ_BYTE_F(adr, res) |
7069 | flag_C = 0; |
7070 | flag_V = 0; |
7071 | flag_NotZ = res; |
7072 | flag_N = res; |
7073 | FETCH_LONG(adr); |
7074 | WRITE_BYTE_F(adr, res) |
7075 | POST_IO |
7076 | RET(28) |
7077 | } |
7078 | |
7079 | // MOVEB |
7080 | OPCODE(0x1EF9) |
7081 | { |
7082 | u32 adr, res; |
7083 | u32 src, dst; |
7084 | |
7085 | FETCH_LONG(adr); |
7086 | PRE_IO |
7087 | READ_BYTE_F(adr, res) |
7088 | flag_C = 0; |
7089 | flag_V = 0; |
7090 | flag_NotZ = res; |
7091 | flag_N = res; |
7092 | adr = AREG(7); |
7093 | AREG(7) += 2; |
7094 | WRITE_BYTE_F(adr, res) |
7095 | POST_IO |
7096 | RET(20) |
7097 | } |
7098 | |
7099 | // MOVEB |
7100 | OPCODE(0x1F39) |
7101 | { |
7102 | u32 adr, res; |
7103 | u32 src, dst; |
7104 | |
7105 | FETCH_LONG(adr); |
7106 | PRE_IO |
7107 | READ_BYTE_F(adr, res) |
7108 | flag_C = 0; |
7109 | flag_V = 0; |
7110 | flag_NotZ = res; |
7111 | flag_N = res; |
7112 | adr = AREG(7) - 2; |
7113 | AREG(7) = adr; |
7114 | WRITE_BYTE_F(adr, res) |
7115 | POST_IO |
7116 | RET(20) |
7117 | } |
7118 | |
7119 | // MOVEB |
7120 | OPCODE(0x103A) |
7121 | { |
7122 | u32 adr, res; |
7123 | u32 src, dst; |
7124 | |
be26eb23 |
7125 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7126 | PC++; |
7127 | PRE_IO |
7128 | READ_BYTE_F(adr, res) |
7129 | flag_C = 0; |
7130 | flag_V = 0; |
7131 | flag_NotZ = res; |
7132 | flag_N = res; |
7133 | DREGu8((Opcode >> 9) & 7) = res; |
7134 | POST_IO |
7135 | RET(12) |
7136 | } |
7137 | |
7138 | // MOVEB |
7139 | OPCODE(0x10BA) |
7140 | { |
7141 | u32 adr, res; |
7142 | u32 src, dst; |
7143 | |
be26eb23 |
7144 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7145 | PC++; |
7146 | PRE_IO |
7147 | READ_BYTE_F(adr, res) |
7148 | flag_C = 0; |
7149 | flag_V = 0; |
7150 | flag_NotZ = res; |
7151 | flag_N = res; |
7152 | adr = AREG((Opcode >> 9) & 7); |
7153 | WRITE_BYTE_F(adr, res) |
7154 | POST_IO |
7155 | RET(16) |
7156 | } |
7157 | |
7158 | // MOVEB |
7159 | OPCODE(0x10FA) |
7160 | { |
7161 | u32 adr, res; |
7162 | u32 src, dst; |
7163 | |
be26eb23 |
7164 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7165 | PC++; |
7166 | PRE_IO |
7167 | READ_BYTE_F(adr, res) |
7168 | flag_C = 0; |
7169 | flag_V = 0; |
7170 | flag_NotZ = res; |
7171 | flag_N = res; |
7172 | adr = AREG((Opcode >> 9) & 7); |
7173 | AREG((Opcode >> 9) & 7) += 1; |
7174 | WRITE_BYTE_F(adr, res) |
7175 | POST_IO |
7176 | RET(16) |
7177 | } |
7178 | |
7179 | // MOVEB |
7180 | OPCODE(0x113A) |
7181 | { |
7182 | u32 adr, res; |
7183 | u32 src, dst; |
7184 | |
be26eb23 |
7185 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7186 | PC++; |
7187 | PRE_IO |
7188 | READ_BYTE_F(adr, res) |
7189 | flag_C = 0; |
7190 | flag_V = 0; |
7191 | flag_NotZ = res; |
7192 | flag_N = res; |
7193 | adr = AREG((Opcode >> 9) & 7) - 1; |
7194 | AREG((Opcode >> 9) & 7) = adr; |
7195 | WRITE_BYTE_F(adr, res) |
7196 | POST_IO |
7197 | RET(16) |
7198 | } |
7199 | |
7200 | // MOVEB |
7201 | OPCODE(0x117A) |
7202 | { |
7203 | u32 adr, res; |
7204 | u32 src, dst; |
7205 | |
be26eb23 |
7206 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7207 | PC++; |
7208 | PRE_IO |
7209 | READ_BYTE_F(adr, res) |
7210 | flag_C = 0; |
7211 | flag_V = 0; |
7212 | flag_NotZ = res; |
7213 | flag_N = res; |
7214 | FETCH_SWORD(adr); |
7215 | adr += AREG((Opcode >> 9) & 7); |
7216 | WRITE_BYTE_F(adr, res) |
7217 | POST_IO |
7218 | RET(20) |
7219 | } |
7220 | |
7221 | // MOVEB |
7222 | OPCODE(0x11BA) |
7223 | { |
7224 | u32 adr, res; |
7225 | u32 src, dst; |
7226 | |
be26eb23 |
7227 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7228 | PC++; |
7229 | PRE_IO |
7230 | READ_BYTE_F(adr, res) |
7231 | flag_C = 0; |
7232 | flag_V = 0; |
7233 | flag_NotZ = res; |
7234 | flag_N = res; |
7235 | adr = AREG((Opcode >> 9) & 7); |
7236 | DECODE_EXT_WORD |
7237 | WRITE_BYTE_F(adr, res) |
7238 | POST_IO |
7239 | RET(22) |
7240 | } |
7241 | |
7242 | // MOVEB |
7243 | OPCODE(0x11FA) |
7244 | { |
7245 | u32 adr, res; |
7246 | u32 src, dst; |
7247 | |
be26eb23 |
7248 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7249 | PC++; |
7250 | PRE_IO |
7251 | READ_BYTE_F(adr, res) |
7252 | flag_C = 0; |
7253 | flag_V = 0; |
7254 | flag_NotZ = res; |
7255 | flag_N = res; |
7256 | FETCH_SWORD(adr); |
7257 | WRITE_BYTE_F(adr, res) |
7258 | POST_IO |
7259 | RET(20) |
7260 | } |
7261 | |
7262 | // MOVEB |
7263 | OPCODE(0x13FA) |
7264 | { |
7265 | u32 adr, res; |
7266 | u32 src, dst; |
7267 | |
be26eb23 |
7268 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7269 | PC++; |
7270 | PRE_IO |
7271 | READ_BYTE_F(adr, res) |
7272 | flag_C = 0; |
7273 | flag_V = 0; |
7274 | flag_NotZ = res; |
7275 | flag_N = res; |
7276 | FETCH_LONG(adr); |
7277 | WRITE_BYTE_F(adr, res) |
7278 | POST_IO |
7279 | RET(24) |
7280 | } |
7281 | |
7282 | // MOVEB |
7283 | OPCODE(0x1EFA) |
7284 | { |
7285 | u32 adr, res; |
7286 | u32 src, dst; |
7287 | |
be26eb23 |
7288 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7289 | PC++; |
7290 | PRE_IO |
7291 | READ_BYTE_F(adr, res) |
7292 | flag_C = 0; |
7293 | flag_V = 0; |
7294 | flag_NotZ = res; |
7295 | flag_N = res; |
7296 | adr = AREG(7); |
7297 | AREG(7) += 2; |
7298 | WRITE_BYTE_F(adr, res) |
7299 | POST_IO |
7300 | RET(16) |
7301 | } |
7302 | |
7303 | // MOVEB |
7304 | OPCODE(0x1F3A) |
7305 | { |
7306 | u32 adr, res; |
7307 | u32 src, dst; |
7308 | |
be26eb23 |
7309 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7310 | PC++; |
7311 | PRE_IO |
7312 | READ_BYTE_F(adr, res) |
7313 | flag_C = 0; |
7314 | flag_V = 0; |
7315 | flag_NotZ = res; |
7316 | flag_N = res; |
7317 | adr = AREG(7) - 2; |
7318 | AREG(7) = adr; |
7319 | WRITE_BYTE_F(adr, res) |
7320 | POST_IO |
7321 | RET(16) |
7322 | } |
7323 | |
7324 | // MOVEB |
7325 | OPCODE(0x103B) |
7326 | { |
7327 | u32 adr, res; |
7328 | u32 src, dst; |
7329 | |
be26eb23 |
7330 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7331 | DECODE_EXT_WORD |
7332 | PRE_IO |
7333 | READ_BYTE_F(adr, res) |
7334 | flag_C = 0; |
7335 | flag_V = 0; |
7336 | flag_NotZ = res; |
7337 | flag_N = res; |
7338 | DREGu8((Opcode >> 9) & 7) = res; |
7339 | POST_IO |
7340 | RET(14) |
7341 | } |
7342 | |
7343 | // MOVEB |
7344 | OPCODE(0x10BB) |
7345 | { |
7346 | u32 adr, res; |
7347 | u32 src, dst; |
7348 | |
be26eb23 |
7349 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7350 | DECODE_EXT_WORD |
7351 | PRE_IO |
7352 | READ_BYTE_F(adr, res) |
7353 | flag_C = 0; |
7354 | flag_V = 0; |
7355 | flag_NotZ = res; |
7356 | flag_N = res; |
7357 | adr = AREG((Opcode >> 9) & 7); |
7358 | WRITE_BYTE_F(adr, res) |
7359 | POST_IO |
7360 | RET(18) |
7361 | } |
7362 | |
7363 | // MOVEB |
7364 | OPCODE(0x10FB) |
7365 | { |
7366 | u32 adr, res; |
7367 | u32 src, dst; |
7368 | |
be26eb23 |
7369 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7370 | DECODE_EXT_WORD |
7371 | PRE_IO |
7372 | READ_BYTE_F(adr, res) |
7373 | flag_C = 0; |
7374 | flag_V = 0; |
7375 | flag_NotZ = res; |
7376 | flag_N = res; |
7377 | adr = AREG((Opcode >> 9) & 7); |
7378 | AREG((Opcode >> 9) & 7) += 1; |
7379 | WRITE_BYTE_F(adr, res) |
7380 | POST_IO |
7381 | RET(18) |
7382 | } |
7383 | |
7384 | // MOVEB |
7385 | OPCODE(0x113B) |
7386 | { |
7387 | u32 adr, res; |
7388 | u32 src, dst; |
7389 | |
be26eb23 |
7390 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7391 | DECODE_EXT_WORD |
7392 | PRE_IO |
7393 | READ_BYTE_F(adr, res) |
7394 | flag_C = 0; |
7395 | flag_V = 0; |
7396 | flag_NotZ = res; |
7397 | flag_N = res; |
7398 | adr = AREG((Opcode >> 9) & 7) - 1; |
7399 | AREG((Opcode >> 9) & 7) = adr; |
7400 | WRITE_BYTE_F(adr, res) |
7401 | POST_IO |
7402 | RET(18) |
7403 | } |
7404 | |
7405 | // MOVEB |
7406 | OPCODE(0x117B) |
7407 | { |
7408 | u32 adr, res; |
7409 | u32 src, dst; |
7410 | |
be26eb23 |
7411 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7412 | DECODE_EXT_WORD |
7413 | PRE_IO |
7414 | READ_BYTE_F(adr, res) |
7415 | flag_C = 0; |
7416 | flag_V = 0; |
7417 | flag_NotZ = res; |
7418 | flag_N = res; |
7419 | FETCH_SWORD(adr); |
7420 | adr += AREG((Opcode >> 9) & 7); |
7421 | WRITE_BYTE_F(adr, res) |
7422 | POST_IO |
7423 | RET(22) |
7424 | } |
7425 | |
7426 | // MOVEB |
7427 | OPCODE(0x11BB) |
7428 | { |
7429 | u32 adr, res; |
7430 | u32 src, dst; |
7431 | |
be26eb23 |
7432 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7433 | DECODE_EXT_WORD |
7434 | PRE_IO |
7435 | READ_BYTE_F(adr, res) |
7436 | flag_C = 0; |
7437 | flag_V = 0; |
7438 | flag_NotZ = res; |
7439 | flag_N = res; |
7440 | adr = AREG((Opcode >> 9) & 7); |
7441 | DECODE_EXT_WORD |
7442 | WRITE_BYTE_F(adr, res) |
7443 | POST_IO |
7444 | RET(24) |
7445 | } |
7446 | |
7447 | // MOVEB |
7448 | OPCODE(0x11FB) |
7449 | { |
7450 | u32 adr, res; |
7451 | u32 src, dst; |
7452 | |
be26eb23 |
7453 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7454 | DECODE_EXT_WORD |
7455 | PRE_IO |
7456 | READ_BYTE_F(adr, res) |
7457 | flag_C = 0; |
7458 | flag_V = 0; |
7459 | flag_NotZ = res; |
7460 | flag_N = res; |
7461 | FETCH_SWORD(adr); |
7462 | WRITE_BYTE_F(adr, res) |
7463 | POST_IO |
7464 | RET(22) |
7465 | } |
7466 | |
7467 | // MOVEB |
7468 | OPCODE(0x13FB) |
7469 | { |
7470 | u32 adr, res; |
7471 | u32 src, dst; |
7472 | |
be26eb23 |
7473 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7474 | DECODE_EXT_WORD |
7475 | PRE_IO |
7476 | READ_BYTE_F(adr, res) |
7477 | flag_C = 0; |
7478 | flag_V = 0; |
7479 | flag_NotZ = res; |
7480 | flag_N = res; |
7481 | FETCH_LONG(adr); |
7482 | WRITE_BYTE_F(adr, res) |
7483 | POST_IO |
7484 | RET(26) |
7485 | } |
7486 | |
7487 | // MOVEB |
7488 | OPCODE(0x1EFB) |
7489 | { |
7490 | u32 adr, res; |
7491 | u32 src, dst; |
7492 | |
be26eb23 |
7493 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7494 | DECODE_EXT_WORD |
7495 | PRE_IO |
7496 | READ_BYTE_F(adr, res) |
7497 | flag_C = 0; |
7498 | flag_V = 0; |
7499 | flag_NotZ = res; |
7500 | flag_N = res; |
7501 | adr = AREG(7); |
7502 | AREG(7) += 2; |
7503 | WRITE_BYTE_F(adr, res) |
7504 | POST_IO |
7505 | RET(18) |
7506 | } |
7507 | |
7508 | // MOVEB |
7509 | OPCODE(0x1F3B) |
7510 | { |
7511 | u32 adr, res; |
7512 | u32 src, dst; |
7513 | |
be26eb23 |
7514 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7515 | DECODE_EXT_WORD |
7516 | PRE_IO |
7517 | READ_BYTE_F(adr, res) |
7518 | flag_C = 0; |
7519 | flag_V = 0; |
7520 | flag_NotZ = res; |
7521 | flag_N = res; |
7522 | adr = AREG(7) - 2; |
7523 | AREG(7) = adr; |
7524 | WRITE_BYTE_F(adr, res) |
7525 | POST_IO |
7526 | RET(18) |
7527 | } |
7528 | |
7529 | // MOVEB |
7530 | OPCODE(0x103C) |
7531 | { |
7532 | u32 adr, res; |
7533 | u32 src, dst; |
7534 | |
7535 | FETCH_BYTE(res); |
7536 | flag_C = 0; |
7537 | flag_V = 0; |
7538 | flag_NotZ = res; |
7539 | flag_N = res; |
7540 | DREGu8((Opcode >> 9) & 7) = res; |
7541 | RET(8) |
7542 | } |
7543 | |
7544 | // MOVEB |
7545 | OPCODE(0x10BC) |
7546 | { |
7547 | u32 adr, res; |
7548 | u32 src, dst; |
7549 | |
7550 | FETCH_BYTE(res); |
7551 | flag_C = 0; |
7552 | flag_V = 0; |
7553 | flag_NotZ = res; |
7554 | flag_N = res; |
7555 | adr = AREG((Opcode >> 9) & 7); |
7556 | PRE_IO |
7557 | WRITE_BYTE_F(adr, res) |
7558 | POST_IO |
7559 | RET(12) |
7560 | } |
7561 | |
7562 | // MOVEB |
7563 | OPCODE(0x10FC) |
7564 | { |
7565 | u32 adr, res; |
7566 | u32 src, dst; |
7567 | |
7568 | FETCH_BYTE(res); |
7569 | flag_C = 0; |
7570 | flag_V = 0; |
7571 | flag_NotZ = res; |
7572 | flag_N = res; |
7573 | adr = AREG((Opcode >> 9) & 7); |
7574 | AREG((Opcode >> 9) & 7) += 1; |
7575 | PRE_IO |
7576 | WRITE_BYTE_F(adr, res) |
7577 | POST_IO |
7578 | RET(12) |
7579 | } |
7580 | |
7581 | // MOVEB |
7582 | OPCODE(0x113C) |
7583 | { |
7584 | u32 adr, res; |
7585 | u32 src, dst; |
7586 | |
7587 | FETCH_BYTE(res); |
7588 | flag_C = 0; |
7589 | flag_V = 0; |
7590 | flag_NotZ = res; |
7591 | flag_N = res; |
7592 | adr = AREG((Opcode >> 9) & 7) - 1; |
7593 | AREG((Opcode >> 9) & 7) = adr; |
7594 | PRE_IO |
7595 | WRITE_BYTE_F(adr, res) |
7596 | POST_IO |
7597 | RET(12) |
7598 | } |
7599 | |
7600 | // MOVEB |
7601 | OPCODE(0x117C) |
7602 | { |
7603 | u32 adr, res; |
7604 | u32 src, dst; |
7605 | |
7606 | FETCH_BYTE(res); |
7607 | flag_C = 0; |
7608 | flag_V = 0; |
7609 | flag_NotZ = res; |
7610 | flag_N = res; |
7611 | FETCH_SWORD(adr); |
7612 | adr += AREG((Opcode >> 9) & 7); |
7613 | PRE_IO |
7614 | WRITE_BYTE_F(adr, res) |
7615 | POST_IO |
7616 | RET(16) |
7617 | } |
7618 | |
7619 | // MOVEB |
7620 | OPCODE(0x11BC) |
7621 | { |
7622 | u32 adr, res; |
7623 | u32 src, dst; |
7624 | |
7625 | FETCH_BYTE(res); |
7626 | flag_C = 0; |
7627 | flag_V = 0; |
7628 | flag_NotZ = res; |
7629 | flag_N = res; |
7630 | adr = AREG((Opcode >> 9) & 7); |
7631 | DECODE_EXT_WORD |
7632 | PRE_IO |
7633 | WRITE_BYTE_F(adr, res) |
7634 | POST_IO |
7635 | RET(18) |
7636 | } |
7637 | |
7638 | // MOVEB |
7639 | OPCODE(0x11FC) |
7640 | { |
7641 | u32 adr, res; |
7642 | u32 src, dst; |
7643 | |
7644 | FETCH_BYTE(res); |
7645 | flag_C = 0; |
7646 | flag_V = 0; |
7647 | flag_NotZ = res; |
7648 | flag_N = res; |
7649 | FETCH_SWORD(adr); |
7650 | PRE_IO |
7651 | WRITE_BYTE_F(adr, res) |
7652 | POST_IO |
7653 | RET(16) |
7654 | } |
7655 | |
7656 | // MOVEB |
7657 | OPCODE(0x13FC) |
7658 | { |
7659 | u32 adr, res; |
7660 | u32 src, dst; |
7661 | |
7662 | FETCH_BYTE(res); |
7663 | flag_C = 0; |
7664 | flag_V = 0; |
7665 | flag_NotZ = res; |
7666 | flag_N = res; |
7667 | FETCH_LONG(adr); |
7668 | PRE_IO |
7669 | WRITE_BYTE_F(adr, res) |
7670 | POST_IO |
7671 | RET(20) |
7672 | } |
7673 | |
7674 | // MOVEB |
7675 | OPCODE(0x1EFC) |
7676 | { |
7677 | u32 adr, res; |
7678 | u32 src, dst; |
7679 | |
7680 | FETCH_BYTE(res); |
7681 | flag_C = 0; |
7682 | flag_V = 0; |
7683 | flag_NotZ = res; |
7684 | flag_N = res; |
7685 | adr = AREG(7); |
7686 | AREG(7) += 2; |
7687 | PRE_IO |
7688 | WRITE_BYTE_F(adr, res) |
7689 | POST_IO |
7690 | RET(12) |
7691 | } |
7692 | |
7693 | // MOVEB |
7694 | OPCODE(0x1F3C) |
7695 | { |
7696 | u32 adr, res; |
7697 | u32 src, dst; |
7698 | |
7699 | FETCH_BYTE(res); |
7700 | flag_C = 0; |
7701 | flag_V = 0; |
7702 | flag_NotZ = res; |
7703 | flag_N = res; |
7704 | adr = AREG(7) - 2; |
7705 | AREG(7) = adr; |
7706 | PRE_IO |
7707 | WRITE_BYTE_F(adr, res) |
7708 | POST_IO |
7709 | RET(12) |
7710 | } |
7711 | |
7712 | // MOVEB |
7713 | OPCODE(0x101F) |
7714 | { |
7715 | u32 adr, res; |
7716 | u32 src, dst; |
7717 | |
7718 | adr = AREG(7); |
7719 | AREG(7) += 2; |
7720 | PRE_IO |
7721 | READ_BYTE_F(adr, res) |
7722 | flag_C = 0; |
7723 | flag_V = 0; |
7724 | flag_NotZ = res; |
7725 | flag_N = res; |
7726 | DREGu8((Opcode >> 9) & 7) = res; |
7727 | POST_IO |
7728 | RET(8) |
7729 | } |
7730 | |
7731 | // MOVEB |
7732 | OPCODE(0x109F) |
7733 | { |
7734 | u32 adr, res; |
7735 | u32 src, dst; |
7736 | |
7737 | adr = AREG(7); |
7738 | AREG(7) += 2; |
7739 | PRE_IO |
7740 | READ_BYTE_F(adr, res) |
7741 | flag_C = 0; |
7742 | flag_V = 0; |
7743 | flag_NotZ = res; |
7744 | flag_N = res; |
7745 | adr = AREG((Opcode >> 9) & 7); |
7746 | WRITE_BYTE_F(adr, res) |
7747 | POST_IO |
7748 | RET(12) |
7749 | } |
7750 | |
7751 | // MOVEB |
7752 | OPCODE(0x10DF) |
7753 | { |
7754 | u32 adr, res; |
7755 | u32 src, dst; |
7756 | |
7757 | adr = AREG(7); |
7758 | AREG(7) += 2; |
7759 | PRE_IO |
7760 | READ_BYTE_F(adr, res) |
7761 | flag_C = 0; |
7762 | flag_V = 0; |
7763 | flag_NotZ = res; |
7764 | flag_N = res; |
7765 | adr = AREG((Opcode >> 9) & 7); |
7766 | AREG((Opcode >> 9) & 7) += 1; |
7767 | WRITE_BYTE_F(adr, res) |
7768 | POST_IO |
7769 | RET(12) |
7770 | } |
7771 | |
7772 | // MOVEB |
7773 | OPCODE(0x111F) |
7774 | { |
7775 | u32 adr, res; |
7776 | u32 src, dst; |
7777 | |
7778 | adr = AREG(7); |
7779 | AREG(7) += 2; |
7780 | PRE_IO |
7781 | READ_BYTE_F(adr, res) |
7782 | flag_C = 0; |
7783 | flag_V = 0; |
7784 | flag_NotZ = res; |
7785 | flag_N = res; |
7786 | adr = AREG((Opcode >> 9) & 7) - 1; |
7787 | AREG((Opcode >> 9) & 7) = adr; |
7788 | WRITE_BYTE_F(adr, res) |
7789 | POST_IO |
7790 | RET(12) |
7791 | } |
7792 | |
7793 | // MOVEB |
7794 | OPCODE(0x115F) |
7795 | { |
7796 | u32 adr, res; |
7797 | u32 src, dst; |
7798 | |
7799 | adr = AREG(7); |
7800 | AREG(7) += 2; |
7801 | PRE_IO |
7802 | READ_BYTE_F(adr, res) |
7803 | flag_C = 0; |
7804 | flag_V = 0; |
7805 | flag_NotZ = res; |
7806 | flag_N = res; |
7807 | FETCH_SWORD(adr); |
7808 | adr += AREG((Opcode >> 9) & 7); |
7809 | WRITE_BYTE_F(adr, res) |
7810 | POST_IO |
7811 | RET(16) |
7812 | } |
7813 | |
7814 | // MOVEB |
7815 | OPCODE(0x119F) |
7816 | { |
7817 | u32 adr, res; |
7818 | u32 src, dst; |
7819 | |
7820 | adr = AREG(7); |
7821 | AREG(7) += 2; |
7822 | PRE_IO |
7823 | READ_BYTE_F(adr, res) |
7824 | flag_C = 0; |
7825 | flag_V = 0; |
7826 | flag_NotZ = res; |
7827 | flag_N = res; |
7828 | adr = AREG((Opcode >> 9) & 7); |
7829 | DECODE_EXT_WORD |
7830 | WRITE_BYTE_F(adr, res) |
7831 | POST_IO |
7832 | RET(18) |
7833 | } |
7834 | |
7835 | // MOVEB |
7836 | OPCODE(0x11DF) |
7837 | { |
7838 | u32 adr, res; |
7839 | u32 src, dst; |
7840 | |
7841 | adr = AREG(7); |
7842 | AREG(7) += 2; |
7843 | PRE_IO |
7844 | READ_BYTE_F(adr, res) |
7845 | flag_C = 0; |
7846 | flag_V = 0; |
7847 | flag_NotZ = res; |
7848 | flag_N = res; |
7849 | FETCH_SWORD(adr); |
7850 | WRITE_BYTE_F(adr, res) |
7851 | POST_IO |
7852 | RET(16) |
7853 | } |
7854 | |
7855 | // MOVEB |
7856 | OPCODE(0x13DF) |
7857 | { |
7858 | u32 adr, res; |
7859 | u32 src, dst; |
7860 | |
7861 | adr = AREG(7); |
7862 | AREG(7) += 2; |
7863 | PRE_IO |
7864 | READ_BYTE_F(adr, res) |
7865 | flag_C = 0; |
7866 | flag_V = 0; |
7867 | flag_NotZ = res; |
7868 | flag_N = res; |
7869 | FETCH_LONG(adr); |
7870 | WRITE_BYTE_F(adr, res) |
7871 | POST_IO |
7872 | RET(20) |
7873 | } |
7874 | |
7875 | // MOVEB |
7876 | OPCODE(0x1EDF) |
7877 | { |
7878 | u32 adr, res; |
7879 | u32 src, dst; |
7880 | |
7881 | adr = AREG(7); |
7882 | AREG(7) += 2; |
7883 | PRE_IO |
7884 | READ_BYTE_F(adr, res) |
7885 | flag_C = 0; |
7886 | flag_V = 0; |
7887 | flag_NotZ = res; |
7888 | flag_N = res; |
7889 | adr = AREG(7); |
7890 | AREG(7) += 2; |
7891 | WRITE_BYTE_F(adr, res) |
7892 | POST_IO |
7893 | RET(12) |
7894 | } |
7895 | |
7896 | // MOVEB |
7897 | OPCODE(0x1F1F) |
7898 | { |
7899 | u32 adr, res; |
7900 | u32 src, dst; |
7901 | |
7902 | adr = AREG(7); |
7903 | AREG(7) += 2; |
7904 | PRE_IO |
7905 | READ_BYTE_F(adr, res) |
7906 | flag_C = 0; |
7907 | flag_V = 0; |
7908 | flag_NotZ = res; |
7909 | flag_N = res; |
7910 | adr = AREG(7) - 2; |
7911 | AREG(7) = adr; |
7912 | WRITE_BYTE_F(adr, res) |
7913 | POST_IO |
7914 | RET(12) |
7915 | } |
7916 | |
7917 | // MOVEB |
7918 | OPCODE(0x1027) |
7919 | { |
7920 | u32 adr, res; |
7921 | u32 src, dst; |
7922 | |
7923 | adr = AREG(7) - 2; |
7924 | AREG(7) = adr; |
7925 | PRE_IO |
7926 | READ_BYTE_F(adr, res) |
7927 | flag_C = 0; |
7928 | flag_V = 0; |
7929 | flag_NotZ = res; |
7930 | flag_N = res; |
7931 | DREGu8((Opcode >> 9) & 7) = res; |
7932 | POST_IO |
7933 | RET(10) |
7934 | } |
7935 | |
7936 | // MOVEB |
7937 | OPCODE(0x10A7) |
7938 | { |
7939 | u32 adr, res; |
7940 | u32 src, dst; |
7941 | |
7942 | adr = AREG(7) - 2; |
7943 | AREG(7) = adr; |
7944 | PRE_IO |
7945 | READ_BYTE_F(adr, res) |
7946 | flag_C = 0; |
7947 | flag_V = 0; |
7948 | flag_NotZ = res; |
7949 | flag_N = res; |
7950 | adr = AREG((Opcode >> 9) & 7); |
7951 | WRITE_BYTE_F(adr, res) |
7952 | POST_IO |
7953 | RET(14) |
7954 | } |
7955 | |
7956 | // MOVEB |
7957 | OPCODE(0x10E7) |
7958 | { |
7959 | u32 adr, res; |
7960 | u32 src, dst; |
7961 | |
7962 | adr = AREG(7) - 2; |
7963 | AREG(7) = adr; |
7964 | PRE_IO |
7965 | READ_BYTE_F(adr, res) |
7966 | flag_C = 0; |
7967 | flag_V = 0; |
7968 | flag_NotZ = res; |
7969 | flag_N = res; |
7970 | adr = AREG((Opcode >> 9) & 7); |
7971 | AREG((Opcode >> 9) & 7) += 1; |
7972 | WRITE_BYTE_F(adr, res) |
7973 | POST_IO |
7974 | RET(14) |
7975 | } |
7976 | |
7977 | // MOVEB |
7978 | OPCODE(0x1127) |
7979 | { |
7980 | u32 adr, res; |
7981 | u32 src, dst; |
7982 | |
7983 | adr = AREG(7) - 2; |
7984 | AREG(7) = adr; |
7985 | PRE_IO |
7986 | READ_BYTE_F(adr, res) |
7987 | flag_C = 0; |
7988 | flag_V = 0; |
7989 | flag_NotZ = res; |
7990 | flag_N = res; |
7991 | adr = AREG((Opcode >> 9) & 7) - 1; |
7992 | AREG((Opcode >> 9) & 7) = adr; |
7993 | WRITE_BYTE_F(adr, res) |
7994 | POST_IO |
7995 | RET(14) |
7996 | } |
7997 | |
7998 | // MOVEB |
7999 | OPCODE(0x1167) |
8000 | { |
8001 | u32 adr, res; |
8002 | u32 src, dst; |
8003 | |
8004 | adr = AREG(7) - 2; |
8005 | AREG(7) = adr; |
8006 | PRE_IO |
8007 | READ_BYTE_F(adr, res) |
8008 | flag_C = 0; |
8009 | flag_V = 0; |
8010 | flag_NotZ = res; |
8011 | flag_N = res; |
8012 | FETCH_SWORD(adr); |
8013 | adr += AREG((Opcode >> 9) & 7); |
8014 | WRITE_BYTE_F(adr, res) |
8015 | POST_IO |
8016 | RET(18) |
8017 | } |
8018 | |
8019 | // MOVEB |
8020 | OPCODE(0x11A7) |
8021 | { |
8022 | u32 adr, res; |
8023 | u32 src, dst; |
8024 | |
8025 | adr = AREG(7) - 2; |
8026 | AREG(7) = adr; |
8027 | PRE_IO |
8028 | READ_BYTE_F(adr, res) |
8029 | flag_C = 0; |
8030 | flag_V = 0; |
8031 | flag_NotZ = res; |
8032 | flag_N = res; |
8033 | adr = AREG((Opcode >> 9) & 7); |
8034 | DECODE_EXT_WORD |
8035 | WRITE_BYTE_F(adr, res) |
8036 | POST_IO |
8037 | RET(20) |
8038 | } |
8039 | |
8040 | // MOVEB |
8041 | OPCODE(0x11E7) |
8042 | { |
8043 | u32 adr, res; |
8044 | u32 src, dst; |
8045 | |
8046 | adr = AREG(7) - 2; |
8047 | AREG(7) = adr; |
8048 | PRE_IO |
8049 | READ_BYTE_F(adr, res) |
8050 | flag_C = 0; |
8051 | flag_V = 0; |
8052 | flag_NotZ = res; |
8053 | flag_N = res; |
8054 | FETCH_SWORD(adr); |
8055 | WRITE_BYTE_F(adr, res) |
8056 | POST_IO |
8057 | RET(18) |
8058 | } |
8059 | |
8060 | // MOVEB |
8061 | OPCODE(0x13E7) |
8062 | { |
8063 | u32 adr, res; |
8064 | u32 src, dst; |
8065 | |
8066 | adr = AREG(7) - 2; |
8067 | AREG(7) = adr; |
8068 | PRE_IO |
8069 | READ_BYTE_F(adr, res) |
8070 | flag_C = 0; |
8071 | flag_V = 0; |
8072 | flag_NotZ = res; |
8073 | flag_N = res; |
8074 | FETCH_LONG(adr); |
8075 | WRITE_BYTE_F(adr, res) |
8076 | POST_IO |
8077 | RET(22) |
8078 | } |
8079 | |
8080 | // MOVEB |
8081 | OPCODE(0x1EE7) |
8082 | { |
8083 | u32 adr, res; |
8084 | u32 src, dst; |
8085 | |
8086 | adr = AREG(7) - 2; |
8087 | AREG(7) = adr; |
8088 | PRE_IO |
8089 | READ_BYTE_F(adr, res) |
8090 | flag_C = 0; |
8091 | flag_V = 0; |
8092 | flag_NotZ = res; |
8093 | flag_N = res; |
8094 | adr = AREG(7); |
8095 | AREG(7) += 2; |
8096 | WRITE_BYTE_F(adr, res) |
8097 | POST_IO |
8098 | RET(14) |
8099 | } |
8100 | |
8101 | // MOVEB |
8102 | OPCODE(0x1F27) |
8103 | { |
8104 | u32 adr, res; |
8105 | u32 src, dst; |
8106 | |
8107 | adr = AREG(7) - 2; |
8108 | AREG(7) = adr; |
8109 | PRE_IO |
8110 | READ_BYTE_F(adr, res) |
8111 | flag_C = 0; |
8112 | flag_V = 0; |
8113 | flag_NotZ = res; |
8114 | flag_N = res; |
8115 | adr = AREG(7) - 2; |
8116 | AREG(7) = adr; |
8117 | WRITE_BYTE_F(adr, res) |
8118 | POST_IO |
8119 | RET(14) |
8120 | } |
8121 | |
8122 | // MOVEL |
8123 | OPCODE(0x2000) |
8124 | { |
8125 | u32 adr, res; |
8126 | u32 src, dst; |
8127 | |
8128 | res = DREGu32((Opcode >> 0) & 7); |
8129 | flag_C = 0; |
8130 | flag_V = 0; |
8131 | flag_NotZ = res; |
8132 | flag_N = res >> 24; |
8133 | DREGu32((Opcode >> 9) & 7) = res; |
8134 | RET(4) |
8135 | } |
8136 | |
8137 | // MOVEL |
8138 | OPCODE(0x2080) |
8139 | { |
8140 | u32 adr, res; |
8141 | u32 src, dst; |
8142 | |
8143 | res = DREGu32((Opcode >> 0) & 7); |
8144 | flag_C = 0; |
8145 | flag_V = 0; |
8146 | flag_NotZ = res; |
8147 | flag_N = res >> 24; |
8148 | adr = AREG((Opcode >> 9) & 7); |
8149 | PRE_IO |
8150 | WRITE_LONG_F(adr, res) |
8151 | POST_IO |
8152 | RET(12) |
8153 | } |
8154 | |
8155 | // MOVEL |
8156 | OPCODE(0x20C0) |
8157 | { |
8158 | u32 adr, res; |
8159 | u32 src, dst; |
8160 | |
8161 | res = DREGu32((Opcode >> 0) & 7); |
8162 | flag_C = 0; |
8163 | flag_V = 0; |
8164 | flag_NotZ = res; |
8165 | flag_N = res >> 24; |
8166 | adr = AREG((Opcode >> 9) & 7); |
8167 | AREG((Opcode >> 9) & 7) += 4; |
8168 | PRE_IO |
8169 | WRITE_LONG_F(adr, res) |
8170 | POST_IO |
8171 | RET(12) |
8172 | } |
8173 | |
8174 | // MOVEL |
8175 | OPCODE(0x2100) |
8176 | { |
8177 | u32 adr, res; |
8178 | u32 src, dst; |
8179 | |
8180 | res = DREGu32((Opcode >> 0) & 7); |
8181 | flag_C = 0; |
8182 | flag_V = 0; |
8183 | flag_NotZ = res; |
8184 | flag_N = res >> 24; |
8185 | adr = AREG((Opcode >> 9) & 7) - 4; |
8186 | AREG((Opcode >> 9) & 7) = adr; |
8187 | PRE_IO |
80db4442 |
8188 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8189 | POST_IO |
8190 | RET(12) |
8191 | } |
8192 | |
8193 | // MOVEL |
8194 | OPCODE(0x2140) |
8195 | { |
8196 | u32 adr, res; |
8197 | u32 src, dst; |
8198 | |
8199 | res = DREGu32((Opcode >> 0) & 7); |
8200 | flag_C = 0; |
8201 | flag_V = 0; |
8202 | flag_NotZ = res; |
8203 | flag_N = res >> 24; |
8204 | FETCH_SWORD(adr); |
8205 | adr += AREG((Opcode >> 9) & 7); |
8206 | PRE_IO |
8207 | WRITE_LONG_F(adr, res) |
8208 | POST_IO |
8209 | RET(16) |
8210 | } |
8211 | |
8212 | // MOVEL |
8213 | OPCODE(0x2180) |
8214 | { |
8215 | u32 adr, res; |
8216 | u32 src, dst; |
8217 | |
8218 | res = DREGu32((Opcode >> 0) & 7); |
8219 | flag_C = 0; |
8220 | flag_V = 0; |
8221 | flag_NotZ = res; |
8222 | flag_N = res >> 24; |
8223 | adr = AREG((Opcode >> 9) & 7); |
8224 | DECODE_EXT_WORD |
8225 | PRE_IO |
8226 | WRITE_LONG_F(adr, res) |
8227 | POST_IO |
8228 | RET(18) |
8229 | } |
8230 | |
8231 | // MOVEL |
8232 | OPCODE(0x21C0) |
8233 | { |
8234 | u32 adr, res; |
8235 | u32 src, dst; |
8236 | |
8237 | res = DREGu32((Opcode >> 0) & 7); |
8238 | flag_C = 0; |
8239 | flag_V = 0; |
8240 | flag_NotZ = res; |
8241 | flag_N = res >> 24; |
8242 | FETCH_SWORD(adr); |
8243 | PRE_IO |
8244 | WRITE_LONG_F(adr, res) |
8245 | POST_IO |
8246 | RET(16) |
8247 | } |
8248 | |
8249 | // MOVEL |
8250 | OPCODE(0x23C0) |
8251 | { |
8252 | u32 adr, res; |
8253 | u32 src, dst; |
8254 | |
8255 | res = DREGu32((Opcode >> 0) & 7); |
8256 | flag_C = 0; |
8257 | flag_V = 0; |
8258 | flag_NotZ = res; |
8259 | flag_N = res >> 24; |
8260 | FETCH_LONG(adr); |
8261 | PRE_IO |
8262 | WRITE_LONG_F(adr, res) |
8263 | POST_IO |
8264 | RET(20) |
8265 | } |
8266 | |
8267 | // MOVEL |
8268 | OPCODE(0x2EC0) |
8269 | { |
8270 | u32 adr, res; |
8271 | u32 src, dst; |
8272 | |
8273 | res = DREGu32((Opcode >> 0) & 7); |
8274 | flag_C = 0; |
8275 | flag_V = 0; |
8276 | flag_NotZ = res; |
8277 | flag_N = res >> 24; |
8278 | adr = AREG(7); |
8279 | AREG(7) += 4; |
8280 | PRE_IO |
8281 | WRITE_LONG_F(adr, res) |
8282 | POST_IO |
8283 | RET(12) |
8284 | } |
8285 | |
8286 | // MOVEL |
8287 | OPCODE(0x2F00) |
8288 | { |
8289 | u32 adr, res; |
8290 | u32 src, dst; |
8291 | |
8292 | res = DREGu32((Opcode >> 0) & 7); |
8293 | flag_C = 0; |
8294 | flag_V = 0; |
8295 | flag_NotZ = res; |
8296 | flag_N = res >> 24; |
8297 | adr = AREG(7) - 4; |
8298 | AREG(7) = adr; |
8299 | PRE_IO |
03e4f2a3 |
8300 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8301 | POST_IO |
8302 | RET(12) |
8303 | } |
8304 | |
8305 | // MOVEL |
8306 | OPCODE(0x2008) |
8307 | { |
8308 | u32 adr, res; |
8309 | u32 src, dst; |
8310 | |
8311 | res = AREGu32((Opcode >> 0) & 7); |
8312 | flag_C = 0; |
8313 | flag_V = 0; |
8314 | flag_NotZ = res; |
8315 | flag_N = res >> 24; |
8316 | DREGu32((Opcode >> 9) & 7) = res; |
8317 | RET(4) |
8318 | } |
8319 | |
8320 | // MOVEL |
8321 | OPCODE(0x2088) |
8322 | { |
8323 | u32 adr, res; |
8324 | u32 src, dst; |
8325 | |
8326 | res = AREGu32((Opcode >> 0) & 7); |
8327 | flag_C = 0; |
8328 | flag_V = 0; |
8329 | flag_NotZ = res; |
8330 | flag_N = res >> 24; |
8331 | adr = AREG((Opcode >> 9) & 7); |
8332 | PRE_IO |
8333 | WRITE_LONG_F(adr, res) |
8334 | POST_IO |
8335 | RET(12) |
8336 | } |
8337 | |
8338 | // MOVEL |
8339 | OPCODE(0x20C8) |
8340 | { |
8341 | u32 adr, res; |
8342 | u32 src, dst; |
8343 | |
8344 | res = AREGu32((Opcode >> 0) & 7); |
8345 | flag_C = 0; |
8346 | flag_V = 0; |
8347 | flag_NotZ = res; |
8348 | flag_N = res >> 24; |
8349 | adr = AREG((Opcode >> 9) & 7); |
8350 | AREG((Opcode >> 9) & 7) += 4; |
8351 | PRE_IO |
8352 | WRITE_LONG_F(adr, res) |
8353 | POST_IO |
8354 | RET(12) |
8355 | } |
8356 | |
8357 | // MOVEL |
8358 | OPCODE(0x2108) |
8359 | { |
8360 | u32 adr, res; |
8361 | u32 src, dst; |
8362 | |
8363 | res = AREGu32((Opcode >> 0) & 7); |
8364 | flag_C = 0; |
8365 | flag_V = 0; |
8366 | flag_NotZ = res; |
8367 | flag_N = res >> 24; |
8368 | adr = AREG((Opcode >> 9) & 7) - 4; |
8369 | AREG((Opcode >> 9) & 7) = adr; |
8370 | PRE_IO |
80db4442 |
8371 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8372 | POST_IO |
8373 | RET(12) |
8374 | } |
8375 | |
8376 | // MOVEL |
8377 | OPCODE(0x2148) |
8378 | { |
8379 | u32 adr, res; |
8380 | u32 src, dst; |
8381 | |
8382 | res = AREGu32((Opcode >> 0) & 7); |
8383 | flag_C = 0; |
8384 | flag_V = 0; |
8385 | flag_NotZ = res; |
8386 | flag_N = res >> 24; |
8387 | FETCH_SWORD(adr); |
8388 | adr += AREG((Opcode >> 9) & 7); |
8389 | PRE_IO |
8390 | WRITE_LONG_F(adr, res) |
8391 | POST_IO |
8392 | RET(16) |
8393 | } |
8394 | |
8395 | // MOVEL |
8396 | OPCODE(0x2188) |
8397 | { |
8398 | u32 adr, res; |
8399 | u32 src, dst; |
8400 | |
8401 | res = AREGu32((Opcode >> 0) & 7); |
8402 | flag_C = 0; |
8403 | flag_V = 0; |
8404 | flag_NotZ = res; |
8405 | flag_N = res >> 24; |
8406 | adr = AREG((Opcode >> 9) & 7); |
8407 | DECODE_EXT_WORD |
8408 | PRE_IO |
8409 | WRITE_LONG_F(adr, res) |
8410 | POST_IO |
8411 | RET(18) |
8412 | } |
8413 | |
8414 | // MOVEL |
8415 | OPCODE(0x21C8) |
8416 | { |
8417 | u32 adr, res; |
8418 | u32 src, dst; |
8419 | |
8420 | res = AREGu32((Opcode >> 0) & 7); |
8421 | flag_C = 0; |
8422 | flag_V = 0; |
8423 | flag_NotZ = res; |
8424 | flag_N = res >> 24; |
8425 | FETCH_SWORD(adr); |
8426 | PRE_IO |
8427 | WRITE_LONG_F(adr, res) |
8428 | POST_IO |
8429 | RET(16) |
8430 | } |
8431 | |
8432 | // MOVEL |
8433 | OPCODE(0x23C8) |
8434 | { |
8435 | u32 adr, res; |
8436 | u32 src, dst; |
8437 | |
8438 | res = AREGu32((Opcode >> 0) & 7); |
8439 | flag_C = 0; |
8440 | flag_V = 0; |
8441 | flag_NotZ = res; |
8442 | flag_N = res >> 24; |
8443 | FETCH_LONG(adr); |
8444 | PRE_IO |
8445 | WRITE_LONG_F(adr, res) |
8446 | POST_IO |
8447 | RET(20) |
8448 | } |
8449 | |
8450 | // MOVEL |
8451 | OPCODE(0x2EC8) |
8452 | { |
8453 | u32 adr, res; |
8454 | u32 src, dst; |
8455 | |
8456 | res = AREGu32((Opcode >> 0) & 7); |
8457 | flag_C = 0; |
8458 | flag_V = 0; |
8459 | flag_NotZ = res; |
8460 | flag_N = res >> 24; |
8461 | adr = AREG(7); |
8462 | AREG(7) += 4; |
8463 | PRE_IO |
8464 | WRITE_LONG_F(adr, res) |
8465 | POST_IO |
8466 | RET(12) |
8467 | } |
8468 | |
8469 | // MOVEL |
8470 | OPCODE(0x2F08) |
8471 | { |
8472 | u32 adr, res; |
8473 | u32 src, dst; |
8474 | |
8475 | res = AREGu32((Opcode >> 0) & 7); |
8476 | flag_C = 0; |
8477 | flag_V = 0; |
8478 | flag_NotZ = res; |
8479 | flag_N = res >> 24; |
8480 | adr = AREG(7) - 4; |
8481 | AREG(7) = adr; |
8482 | PRE_IO |
03e4f2a3 |
8483 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8484 | POST_IO |
8485 | RET(12) |
8486 | } |
8487 | |
8488 | // MOVEL |
8489 | OPCODE(0x2010) |
8490 | { |
8491 | u32 adr, res; |
8492 | u32 src, dst; |
8493 | |
8494 | adr = AREG((Opcode >> 0) & 7); |
8495 | PRE_IO |
8496 | READ_LONG_F(adr, res) |
8497 | flag_C = 0; |
8498 | flag_V = 0; |
8499 | flag_NotZ = res; |
8500 | flag_N = res >> 24; |
8501 | DREGu32((Opcode >> 9) & 7) = res; |
8502 | POST_IO |
8503 | RET(12) |
8504 | } |
8505 | |
8506 | // MOVEL |
8507 | OPCODE(0x2090) |
8508 | { |
8509 | u32 adr, res; |
8510 | u32 src, dst; |
8511 | |
8512 | adr = AREG((Opcode >> 0) & 7); |
8513 | PRE_IO |
8514 | READ_LONG_F(adr, res) |
8515 | flag_C = 0; |
8516 | flag_V = 0; |
8517 | flag_NotZ = res; |
8518 | flag_N = res >> 24; |
8519 | adr = AREG((Opcode >> 9) & 7); |
8520 | WRITE_LONG_F(adr, res) |
8521 | POST_IO |
8522 | RET(20) |
8523 | } |
8524 | |
8525 | // MOVEL |
8526 | OPCODE(0x20D0) |
8527 | { |
8528 | u32 adr, res; |
8529 | u32 src, dst; |
8530 | |
8531 | adr = AREG((Opcode >> 0) & 7); |
8532 | PRE_IO |
8533 | READ_LONG_F(adr, res) |
8534 | flag_C = 0; |
8535 | flag_V = 0; |
8536 | flag_NotZ = res; |
8537 | flag_N = res >> 24; |
8538 | adr = AREG((Opcode >> 9) & 7); |
8539 | AREG((Opcode >> 9) & 7) += 4; |
8540 | WRITE_LONG_F(adr, res) |
8541 | POST_IO |
8542 | RET(20) |
8543 | } |
8544 | |
8545 | // MOVEL |
8546 | OPCODE(0x2110) |
8547 | { |
8548 | u32 adr, res; |
8549 | u32 src, dst; |
8550 | |
8551 | adr = AREG((Opcode >> 0) & 7); |
8552 | PRE_IO |
8553 | READ_LONG_F(adr, res) |
8554 | flag_C = 0; |
8555 | flag_V = 0; |
8556 | flag_NotZ = res; |
8557 | flag_N = res >> 24; |
8558 | adr = AREG((Opcode >> 9) & 7) - 4; |
8559 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8560 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8561 | POST_IO |
8562 | RET(20) |
8563 | } |
8564 | |
8565 | // MOVEL |
8566 | OPCODE(0x2150) |
8567 | { |
8568 | u32 adr, res; |
8569 | u32 src, dst; |
8570 | |
8571 | adr = AREG((Opcode >> 0) & 7); |
8572 | PRE_IO |
8573 | READ_LONG_F(adr, res) |
8574 | flag_C = 0; |
8575 | flag_V = 0; |
8576 | flag_NotZ = res; |
8577 | flag_N = res >> 24; |
8578 | FETCH_SWORD(adr); |
8579 | adr += AREG((Opcode >> 9) & 7); |
8580 | WRITE_LONG_F(adr, res) |
8581 | POST_IO |
8582 | RET(24) |
8583 | } |
8584 | |
8585 | // MOVEL |
8586 | OPCODE(0x2190) |
8587 | { |
8588 | u32 adr, res; |
8589 | u32 src, dst; |
8590 | |
8591 | adr = AREG((Opcode >> 0) & 7); |
8592 | PRE_IO |
8593 | READ_LONG_F(adr, res) |
8594 | flag_C = 0; |
8595 | flag_V = 0; |
8596 | flag_NotZ = res; |
8597 | flag_N = res >> 24; |
8598 | adr = AREG((Opcode >> 9) & 7); |
8599 | DECODE_EXT_WORD |
8600 | WRITE_LONG_F(adr, res) |
8601 | POST_IO |
8602 | RET(26) |
8603 | } |
8604 | |
8605 | // MOVEL |
8606 | OPCODE(0x21D0) |
8607 | { |
8608 | u32 adr, res; |
8609 | u32 src, dst; |
8610 | |
8611 | adr = AREG((Opcode >> 0) & 7); |
8612 | PRE_IO |
8613 | READ_LONG_F(adr, res) |
8614 | flag_C = 0; |
8615 | flag_V = 0; |
8616 | flag_NotZ = res; |
8617 | flag_N = res >> 24; |
8618 | FETCH_SWORD(adr); |
8619 | WRITE_LONG_F(adr, res) |
8620 | POST_IO |
8621 | RET(24) |
8622 | } |
8623 | |
8624 | // MOVEL |
8625 | OPCODE(0x23D0) |
8626 | { |
8627 | u32 adr, res; |
8628 | u32 src, dst; |
8629 | |
8630 | adr = AREG((Opcode >> 0) & 7); |
8631 | PRE_IO |
8632 | READ_LONG_F(adr, res) |
8633 | flag_C = 0; |
8634 | flag_V = 0; |
8635 | flag_NotZ = res; |
8636 | flag_N = res >> 24; |
8637 | FETCH_LONG(adr); |
8638 | WRITE_LONG_F(adr, res) |
8639 | POST_IO |
8640 | RET(28) |
8641 | } |
8642 | |
8643 | // MOVEL |
8644 | OPCODE(0x2ED0) |
8645 | { |
8646 | u32 adr, res; |
8647 | u32 src, dst; |
8648 | |
8649 | adr = AREG((Opcode >> 0) & 7); |
8650 | PRE_IO |
8651 | READ_LONG_F(adr, res) |
8652 | flag_C = 0; |
8653 | flag_V = 0; |
8654 | flag_NotZ = res; |
8655 | flag_N = res >> 24; |
8656 | adr = AREG(7); |
8657 | AREG(7) += 4; |
8658 | WRITE_LONG_F(adr, res) |
8659 | POST_IO |
8660 | RET(20) |
8661 | } |
8662 | |
8663 | // MOVEL |
8664 | OPCODE(0x2F10) |
8665 | { |
8666 | u32 adr, res; |
8667 | u32 src, dst; |
8668 | |
8669 | adr = AREG((Opcode >> 0) & 7); |
8670 | PRE_IO |
8671 | READ_LONG_F(adr, res) |
8672 | flag_C = 0; |
8673 | flag_V = 0; |
8674 | flag_NotZ = res; |
8675 | flag_N = res >> 24; |
8676 | adr = AREG(7) - 4; |
8677 | AREG(7) = adr; |
03e4f2a3 |
8678 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8679 | POST_IO |
8680 | RET(20) |
8681 | } |
8682 | |
8683 | // MOVEL |
8684 | OPCODE(0x2018) |
8685 | { |
8686 | u32 adr, res; |
8687 | u32 src, dst; |
8688 | |
8689 | adr = AREG((Opcode >> 0) & 7); |
8690 | AREG((Opcode >> 0) & 7) += 4; |
8691 | PRE_IO |
8692 | READ_LONG_F(adr, res) |
8693 | flag_C = 0; |
8694 | flag_V = 0; |
8695 | flag_NotZ = res; |
8696 | flag_N = res >> 24; |
8697 | DREGu32((Opcode >> 9) & 7) = res; |
8698 | POST_IO |
8699 | RET(12) |
8700 | } |
8701 | |
8702 | // MOVEL |
8703 | OPCODE(0x2098) |
8704 | { |
8705 | u32 adr, res; |
8706 | u32 src, dst; |
8707 | |
8708 | adr = AREG((Opcode >> 0) & 7); |
8709 | AREG((Opcode >> 0) & 7) += 4; |
8710 | PRE_IO |
8711 | READ_LONG_F(adr, res) |
8712 | flag_C = 0; |
8713 | flag_V = 0; |
8714 | flag_NotZ = res; |
8715 | flag_N = res >> 24; |
8716 | adr = AREG((Opcode >> 9) & 7); |
8717 | WRITE_LONG_F(adr, res) |
8718 | POST_IO |
8719 | RET(20) |
8720 | } |
8721 | |
8722 | // MOVEL |
8723 | OPCODE(0x20D8) |
8724 | { |
8725 | u32 adr, res; |
8726 | u32 src, dst; |
8727 | |
8728 | adr = AREG((Opcode >> 0) & 7); |
8729 | AREG((Opcode >> 0) & 7) += 4; |
8730 | PRE_IO |
8731 | READ_LONG_F(adr, res) |
8732 | flag_C = 0; |
8733 | flag_V = 0; |
8734 | flag_NotZ = res; |
8735 | flag_N = res >> 24; |
8736 | adr = AREG((Opcode >> 9) & 7); |
8737 | AREG((Opcode >> 9) & 7) += 4; |
8738 | WRITE_LONG_F(adr, res) |
8739 | POST_IO |
8740 | RET(20) |
8741 | } |
8742 | |
8743 | // MOVEL |
8744 | OPCODE(0x2118) |
8745 | { |
8746 | u32 adr, res; |
8747 | u32 src, dst; |
8748 | |
8749 | adr = AREG((Opcode >> 0) & 7); |
8750 | AREG((Opcode >> 0) & 7) += 4; |
8751 | PRE_IO |
8752 | READ_LONG_F(adr, res) |
8753 | flag_C = 0; |
8754 | flag_V = 0; |
8755 | flag_NotZ = res; |
8756 | flag_N = res >> 24; |
8757 | adr = AREG((Opcode >> 9) & 7) - 4; |
8758 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8759 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8760 | POST_IO |
8761 | RET(20) |
8762 | } |
8763 | |
8764 | // MOVEL |
8765 | OPCODE(0x2158) |
8766 | { |
8767 | u32 adr, res; |
8768 | u32 src, dst; |
8769 | |
8770 | adr = AREG((Opcode >> 0) & 7); |
8771 | AREG((Opcode >> 0) & 7) += 4; |
8772 | PRE_IO |
8773 | READ_LONG_F(adr, res) |
8774 | flag_C = 0; |
8775 | flag_V = 0; |
8776 | flag_NotZ = res; |
8777 | flag_N = res >> 24; |
8778 | FETCH_SWORD(adr); |
8779 | adr += AREG((Opcode >> 9) & 7); |
8780 | WRITE_LONG_F(adr, res) |
8781 | POST_IO |
8782 | RET(24) |
8783 | } |
8784 | |
8785 | // MOVEL |
8786 | OPCODE(0x2198) |
8787 | { |
8788 | u32 adr, res; |
8789 | u32 src, dst; |
8790 | |
8791 | adr = AREG((Opcode >> 0) & 7); |
8792 | AREG((Opcode >> 0) & 7) += 4; |
8793 | PRE_IO |
8794 | READ_LONG_F(adr, res) |
8795 | flag_C = 0; |
8796 | flag_V = 0; |
8797 | flag_NotZ = res; |
8798 | flag_N = res >> 24; |
8799 | adr = AREG((Opcode >> 9) & 7); |
8800 | DECODE_EXT_WORD |
8801 | WRITE_LONG_F(adr, res) |
8802 | POST_IO |
8803 | RET(26) |
8804 | } |
8805 | |
8806 | // MOVEL |
8807 | OPCODE(0x21D8) |
8808 | { |
8809 | u32 adr, res; |
8810 | u32 src, dst; |
8811 | |
8812 | adr = AREG((Opcode >> 0) & 7); |
8813 | AREG((Opcode >> 0) & 7) += 4; |
8814 | PRE_IO |
8815 | READ_LONG_F(adr, res) |
8816 | flag_C = 0; |
8817 | flag_V = 0; |
8818 | flag_NotZ = res; |
8819 | flag_N = res >> 24; |
8820 | FETCH_SWORD(adr); |
8821 | WRITE_LONG_F(adr, res) |
8822 | POST_IO |
8823 | RET(24) |
8824 | } |
8825 | |
8826 | // MOVEL |
8827 | OPCODE(0x23D8) |
8828 | { |
8829 | u32 adr, res; |
8830 | u32 src, dst; |
8831 | |
8832 | adr = AREG((Opcode >> 0) & 7); |
8833 | AREG((Opcode >> 0) & 7) += 4; |
8834 | PRE_IO |
8835 | READ_LONG_F(adr, res) |
8836 | flag_C = 0; |
8837 | flag_V = 0; |
8838 | flag_NotZ = res; |
8839 | flag_N = res >> 24; |
8840 | FETCH_LONG(adr); |
8841 | WRITE_LONG_F(adr, res) |
8842 | POST_IO |
8843 | RET(28) |
8844 | } |
8845 | |
8846 | // MOVEL |
8847 | OPCODE(0x2ED8) |
8848 | { |
8849 | u32 adr, res; |
8850 | u32 src, dst; |
8851 | |
8852 | adr = AREG((Opcode >> 0) & 7); |
8853 | AREG((Opcode >> 0) & 7) += 4; |
8854 | PRE_IO |
8855 | READ_LONG_F(adr, res) |
8856 | flag_C = 0; |
8857 | flag_V = 0; |
8858 | flag_NotZ = res; |
8859 | flag_N = res >> 24; |
8860 | adr = AREG(7); |
8861 | AREG(7) += 4; |
8862 | WRITE_LONG_F(adr, res) |
8863 | POST_IO |
8864 | RET(20) |
8865 | } |
8866 | |
8867 | // MOVEL |
8868 | OPCODE(0x2F18) |
8869 | { |
8870 | u32 adr, res; |
8871 | u32 src, dst; |
8872 | |
8873 | adr = AREG((Opcode >> 0) & 7); |
8874 | AREG((Opcode >> 0) & 7) += 4; |
8875 | PRE_IO |
8876 | READ_LONG_F(adr, res) |
8877 | flag_C = 0; |
8878 | flag_V = 0; |
8879 | flag_NotZ = res; |
8880 | flag_N = res >> 24; |
8881 | adr = AREG(7) - 4; |
8882 | AREG(7) = adr; |
03e4f2a3 |
8883 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8884 | POST_IO |
8885 | RET(20) |
8886 | } |
8887 | |
8888 | // MOVEL |
8889 | OPCODE(0x2020) |
8890 | { |
8891 | u32 adr, res; |
8892 | u32 src, dst; |
8893 | |
8894 | adr = AREG((Opcode >> 0) & 7) - 4; |
8895 | AREG((Opcode >> 0) & 7) = adr; |
8896 | PRE_IO |
8897 | READ_LONG_F(adr, res) |
8898 | flag_C = 0; |
8899 | flag_V = 0; |
8900 | flag_NotZ = res; |
8901 | flag_N = res >> 24; |
8902 | DREGu32((Opcode >> 9) & 7) = res; |
8903 | POST_IO |
8904 | RET(14) |
8905 | } |
8906 | |
8907 | // MOVEL |
8908 | OPCODE(0x20A0) |
8909 | { |
8910 | u32 adr, res; |
8911 | u32 src, dst; |
8912 | |
8913 | adr = AREG((Opcode >> 0) & 7) - 4; |
8914 | AREG((Opcode >> 0) & 7) = adr; |
8915 | PRE_IO |
8916 | READ_LONG_F(adr, res) |
8917 | flag_C = 0; |
8918 | flag_V = 0; |
8919 | flag_NotZ = res; |
8920 | flag_N = res >> 24; |
8921 | adr = AREG((Opcode >> 9) & 7); |
8922 | WRITE_LONG_F(adr, res) |
8923 | POST_IO |
8924 | RET(22) |
8925 | } |
8926 | |
8927 | // MOVEL |
8928 | OPCODE(0x20E0) |
8929 | { |
8930 | u32 adr, res; |
8931 | u32 src, dst; |
8932 | |
8933 | adr = AREG((Opcode >> 0) & 7) - 4; |
8934 | AREG((Opcode >> 0) & 7) = adr; |
8935 | PRE_IO |
8936 | READ_LONG_F(adr, res) |
8937 | flag_C = 0; |
8938 | flag_V = 0; |
8939 | flag_NotZ = res; |
8940 | flag_N = res >> 24; |
8941 | adr = AREG((Opcode >> 9) & 7); |
8942 | AREG((Opcode >> 9) & 7) += 4; |
8943 | WRITE_LONG_F(adr, res) |
8944 | POST_IO |
8945 | RET(22) |
8946 | } |
8947 | |
8948 | // MOVEL |
8949 | OPCODE(0x2120) |
8950 | { |
8951 | u32 adr, res; |
8952 | u32 src, dst; |
8953 | |
8954 | adr = AREG((Opcode >> 0) & 7) - 4; |
8955 | AREG((Opcode >> 0) & 7) = adr; |
8956 | PRE_IO |
8957 | READ_LONG_F(adr, res) |
8958 | flag_C = 0; |
8959 | flag_V = 0; |
8960 | flag_NotZ = res; |
8961 | flag_N = res >> 24; |
8962 | adr = AREG((Opcode >> 9) & 7) - 4; |
8963 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8964 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8965 | POST_IO |
8966 | RET(22) |
8967 | } |
8968 | |
8969 | // MOVEL |
8970 | OPCODE(0x2160) |
8971 | { |
8972 | u32 adr, res; |
8973 | u32 src, dst; |
8974 | |
8975 | adr = AREG((Opcode >> 0) & 7) - 4; |
8976 | AREG((Opcode >> 0) & 7) = adr; |
8977 | PRE_IO |
8978 | READ_LONG_F(adr, res) |
8979 | flag_C = 0; |
8980 | flag_V = 0; |
8981 | flag_NotZ = res; |
8982 | flag_N = res >> 24; |
8983 | FETCH_SWORD(adr); |
8984 | adr += AREG((Opcode >> 9) & 7); |
8985 | WRITE_LONG_F(adr, res) |
8986 | POST_IO |
8987 | RET(26) |
8988 | } |
8989 | |
8990 | // MOVEL |
8991 | OPCODE(0x21A0) |
8992 | { |
8993 | u32 adr, res; |
8994 | u32 src, dst; |
8995 | |
8996 | adr = AREG((Opcode >> 0) & 7) - 4; |
8997 | AREG((Opcode >> 0) & 7) = adr; |
8998 | PRE_IO |
8999 | READ_LONG_F(adr, res) |
9000 | flag_C = 0; |
9001 | flag_V = 0; |
9002 | flag_NotZ = res; |
9003 | flag_N = res >> 24; |
9004 | adr = AREG((Opcode >> 9) & 7); |
9005 | DECODE_EXT_WORD |
9006 | WRITE_LONG_F(adr, res) |
9007 | POST_IO |
9008 | RET(28) |
9009 | } |
9010 | |
9011 | // MOVEL |
9012 | OPCODE(0x21E0) |
9013 | { |
9014 | u32 adr, res; |
9015 | u32 src, dst; |
9016 | |
9017 | adr = AREG((Opcode >> 0) & 7) - 4; |
9018 | AREG((Opcode >> 0) & 7) = adr; |
9019 | PRE_IO |
9020 | READ_LONG_F(adr, res) |
9021 | flag_C = 0; |
9022 | flag_V = 0; |
9023 | flag_NotZ = res; |
9024 | flag_N = res >> 24; |
9025 | FETCH_SWORD(adr); |
9026 | WRITE_LONG_F(adr, res) |
9027 | POST_IO |
9028 | RET(26) |
9029 | } |
9030 | |
9031 | // MOVEL |
9032 | OPCODE(0x23E0) |
9033 | { |
9034 | u32 adr, res; |
9035 | u32 src, dst; |
9036 | |
9037 | adr = AREG((Opcode >> 0) & 7) - 4; |
9038 | AREG((Opcode >> 0) & 7) = adr; |
9039 | PRE_IO |
9040 | READ_LONG_F(adr, res) |
9041 | flag_C = 0; |
9042 | flag_V = 0; |
9043 | flag_NotZ = res; |
9044 | flag_N = res >> 24; |
9045 | FETCH_LONG(adr); |
9046 | WRITE_LONG_F(adr, res) |
9047 | POST_IO |
9048 | RET(30) |
9049 | } |
9050 | |
9051 | // MOVEL |
9052 | OPCODE(0x2EE0) |
9053 | { |
9054 | u32 adr, res; |
9055 | u32 src, dst; |
9056 | |
9057 | adr = AREG((Opcode >> 0) & 7) - 4; |
9058 | AREG((Opcode >> 0) & 7) = adr; |
9059 | PRE_IO |
9060 | READ_LONG_F(adr, res) |
9061 | flag_C = 0; |
9062 | flag_V = 0; |
9063 | flag_NotZ = res; |
9064 | flag_N = res >> 24; |
9065 | adr = AREG(7); |
9066 | AREG(7) += 4; |
9067 | WRITE_LONG_F(adr, res) |
9068 | POST_IO |
9069 | RET(22) |
9070 | } |
9071 | |
9072 | // MOVEL |
9073 | OPCODE(0x2F20) |
9074 | { |
9075 | u32 adr, res; |
9076 | u32 src, dst; |
9077 | |
9078 | adr = AREG((Opcode >> 0) & 7) - 4; |
9079 | AREG((Opcode >> 0) & 7) = adr; |
9080 | PRE_IO |
9081 | READ_LONG_F(adr, res) |
9082 | flag_C = 0; |
9083 | flag_V = 0; |
9084 | flag_NotZ = res; |
9085 | flag_N = res >> 24; |
9086 | adr = AREG(7) - 4; |
9087 | AREG(7) = adr; |
03e4f2a3 |
9088 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9089 | POST_IO |
9090 | RET(22) |
9091 | } |
9092 | |
9093 | // MOVEL |
9094 | OPCODE(0x2028) |
9095 | { |
9096 | u32 adr, res; |
9097 | u32 src, dst; |
9098 | |
9099 | FETCH_SWORD(adr); |
9100 | adr += AREG((Opcode >> 0) & 7); |
9101 | PRE_IO |
9102 | READ_LONG_F(adr, res) |
9103 | flag_C = 0; |
9104 | flag_V = 0; |
9105 | flag_NotZ = res; |
9106 | flag_N = res >> 24; |
9107 | DREGu32((Opcode >> 9) & 7) = res; |
9108 | POST_IO |
9109 | RET(16) |
9110 | } |
9111 | |
9112 | // MOVEL |
9113 | OPCODE(0x20A8) |
9114 | { |
9115 | u32 adr, res; |
9116 | u32 src, dst; |
9117 | |
9118 | FETCH_SWORD(adr); |
9119 | adr += AREG((Opcode >> 0) & 7); |
9120 | PRE_IO |
9121 | READ_LONG_F(adr, res) |
9122 | flag_C = 0; |
9123 | flag_V = 0; |
9124 | flag_NotZ = res; |
9125 | flag_N = res >> 24; |
9126 | adr = AREG((Opcode >> 9) & 7); |
9127 | WRITE_LONG_F(adr, res) |
9128 | POST_IO |
9129 | RET(24) |
9130 | } |
9131 | |
9132 | // MOVEL |
9133 | OPCODE(0x20E8) |
9134 | { |
9135 | u32 adr, res; |
9136 | u32 src, dst; |
9137 | |
9138 | FETCH_SWORD(adr); |
9139 | adr += AREG((Opcode >> 0) & 7); |
9140 | PRE_IO |
9141 | READ_LONG_F(adr, res) |
9142 | flag_C = 0; |
9143 | flag_V = 0; |
9144 | flag_NotZ = res; |
9145 | flag_N = res >> 24; |
9146 | adr = AREG((Opcode >> 9) & 7); |
9147 | AREG((Opcode >> 9) & 7) += 4; |
9148 | WRITE_LONG_F(adr, res) |
9149 | POST_IO |
9150 | RET(24) |
9151 | } |
9152 | |
9153 | // MOVEL |
9154 | OPCODE(0x2128) |
9155 | { |
9156 | u32 adr, res; |
9157 | u32 src, dst; |
9158 | |
9159 | FETCH_SWORD(adr); |
9160 | adr += AREG((Opcode >> 0) & 7); |
9161 | PRE_IO |
9162 | READ_LONG_F(adr, res) |
9163 | flag_C = 0; |
9164 | flag_V = 0; |
9165 | flag_NotZ = res; |
9166 | flag_N = res >> 24; |
9167 | adr = AREG((Opcode >> 9) & 7) - 4; |
9168 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9169 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9170 | POST_IO |
9171 | RET(24) |
9172 | } |
9173 | |
9174 | // MOVEL |
9175 | OPCODE(0x2168) |
9176 | { |
9177 | u32 adr, res; |
9178 | u32 src, dst; |
9179 | |
9180 | FETCH_SWORD(adr); |
9181 | adr += AREG((Opcode >> 0) & 7); |
9182 | PRE_IO |
9183 | READ_LONG_F(adr, res) |
9184 | flag_C = 0; |
9185 | flag_V = 0; |
9186 | flag_NotZ = res; |
9187 | flag_N = res >> 24; |
9188 | FETCH_SWORD(adr); |
9189 | adr += AREG((Opcode >> 9) & 7); |
9190 | WRITE_LONG_F(adr, res) |
9191 | POST_IO |
9192 | RET(28) |
9193 | } |
9194 | |
9195 | // MOVEL |
9196 | OPCODE(0x21A8) |
9197 | { |
9198 | u32 adr, res; |
9199 | u32 src, dst; |
9200 | |
9201 | FETCH_SWORD(adr); |
9202 | adr += AREG((Opcode >> 0) & 7); |
9203 | PRE_IO |
9204 | READ_LONG_F(adr, res) |
9205 | flag_C = 0; |
9206 | flag_V = 0; |
9207 | flag_NotZ = res; |
9208 | flag_N = res >> 24; |
9209 | adr = AREG((Opcode >> 9) & 7); |
9210 | DECODE_EXT_WORD |
9211 | WRITE_LONG_F(adr, res) |
9212 | POST_IO |
9213 | RET(30) |
9214 | } |
9215 | |
9216 | // MOVEL |
9217 | OPCODE(0x21E8) |
9218 | { |
9219 | u32 adr, res; |
9220 | u32 src, dst; |
9221 | |
9222 | FETCH_SWORD(adr); |
9223 | adr += AREG((Opcode >> 0) & 7); |
9224 | PRE_IO |
9225 | READ_LONG_F(adr, res) |
9226 | flag_C = 0; |
9227 | flag_V = 0; |
9228 | flag_NotZ = res; |
9229 | flag_N = res >> 24; |
9230 | FETCH_SWORD(adr); |
9231 | WRITE_LONG_F(adr, res) |
9232 | POST_IO |
9233 | RET(28) |
9234 | } |
9235 | |
9236 | // MOVEL |
9237 | OPCODE(0x23E8) |
9238 | { |
9239 | u32 adr, res; |
9240 | u32 src, dst; |
9241 | |
9242 | FETCH_SWORD(adr); |
9243 | adr += AREG((Opcode >> 0) & 7); |
9244 | PRE_IO |
9245 | READ_LONG_F(adr, res) |
9246 | flag_C = 0; |
9247 | flag_V = 0; |
9248 | flag_NotZ = res; |
9249 | flag_N = res >> 24; |
9250 | FETCH_LONG(adr); |
9251 | WRITE_LONG_F(adr, res) |
9252 | POST_IO |
9253 | RET(32) |
9254 | } |
9255 | |
9256 | // MOVEL |
9257 | OPCODE(0x2EE8) |
9258 | { |
9259 | u32 adr, res; |
9260 | u32 src, dst; |
9261 | |
9262 | FETCH_SWORD(adr); |
9263 | adr += AREG((Opcode >> 0) & 7); |
9264 | PRE_IO |
9265 | READ_LONG_F(adr, res) |
9266 | flag_C = 0; |
9267 | flag_V = 0; |
9268 | flag_NotZ = res; |
9269 | flag_N = res >> 24; |
9270 | adr = AREG(7); |
9271 | AREG(7) += 4; |
9272 | WRITE_LONG_F(adr, res) |
9273 | POST_IO |
9274 | RET(24) |
9275 | } |
9276 | |
9277 | // MOVEL |
9278 | OPCODE(0x2F28) |
9279 | { |
9280 | u32 adr, res; |
9281 | u32 src, dst; |
9282 | |
9283 | FETCH_SWORD(adr); |
9284 | adr += AREG((Opcode >> 0) & 7); |
9285 | PRE_IO |
9286 | READ_LONG_F(adr, res) |
9287 | flag_C = 0; |
9288 | flag_V = 0; |
9289 | flag_NotZ = res; |
9290 | flag_N = res >> 24; |
9291 | adr = AREG(7) - 4; |
9292 | AREG(7) = adr; |
03e4f2a3 |
9293 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9294 | POST_IO |
9295 | RET(24) |
9296 | } |
9297 | |
9298 | // MOVEL |
9299 | OPCODE(0x2030) |
9300 | { |
9301 | u32 adr, res; |
9302 | u32 src, dst; |
9303 | |
9304 | adr = AREG((Opcode >> 0) & 7); |
9305 | DECODE_EXT_WORD |
9306 | PRE_IO |
9307 | READ_LONG_F(adr, res) |
9308 | flag_C = 0; |
9309 | flag_V = 0; |
9310 | flag_NotZ = res; |
9311 | flag_N = res >> 24; |
9312 | DREGu32((Opcode >> 9) & 7) = res; |
9313 | POST_IO |
9314 | RET(18) |
9315 | } |
9316 | |
9317 | // MOVEL |
9318 | OPCODE(0x20B0) |
9319 | { |
9320 | u32 adr, res; |
9321 | u32 src, dst; |
9322 | |
9323 | adr = AREG((Opcode >> 0) & 7); |
9324 | DECODE_EXT_WORD |
9325 | PRE_IO |
9326 | READ_LONG_F(adr, res) |
9327 | flag_C = 0; |
9328 | flag_V = 0; |
9329 | flag_NotZ = res; |
9330 | flag_N = res >> 24; |
9331 | adr = AREG((Opcode >> 9) & 7); |
9332 | WRITE_LONG_F(adr, res) |
9333 | POST_IO |
9334 | RET(26) |
9335 | } |
9336 | |
9337 | // MOVEL |
9338 | OPCODE(0x20F0) |
9339 | { |
9340 | u32 adr, res; |
9341 | u32 src, dst; |
9342 | |
9343 | adr = AREG((Opcode >> 0) & 7); |
9344 | DECODE_EXT_WORD |
9345 | PRE_IO |
9346 | READ_LONG_F(adr, res) |
9347 | flag_C = 0; |
9348 | flag_V = 0; |
9349 | flag_NotZ = res; |
9350 | flag_N = res >> 24; |
9351 | adr = AREG((Opcode >> 9) & 7); |
9352 | AREG((Opcode >> 9) & 7) += 4; |
9353 | WRITE_LONG_F(adr, res) |
9354 | POST_IO |
9355 | RET(26) |
9356 | } |
9357 | |
9358 | // MOVEL |
9359 | OPCODE(0x2130) |
9360 | { |
9361 | u32 adr, res; |
9362 | u32 src, dst; |
9363 | |
9364 | adr = AREG((Opcode >> 0) & 7); |
9365 | DECODE_EXT_WORD |
9366 | PRE_IO |
9367 | READ_LONG_F(adr, res) |
9368 | flag_C = 0; |
9369 | flag_V = 0; |
9370 | flag_NotZ = res; |
9371 | flag_N = res >> 24; |
9372 | adr = AREG((Opcode >> 9) & 7) - 4; |
9373 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9374 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9375 | POST_IO |
9376 | RET(26) |
9377 | } |
9378 | |
9379 | // MOVEL |
9380 | OPCODE(0x2170) |
9381 | { |
9382 | u32 adr, res; |
9383 | u32 src, dst; |
9384 | |
9385 | adr = AREG((Opcode >> 0) & 7); |
9386 | DECODE_EXT_WORD |
9387 | PRE_IO |
9388 | READ_LONG_F(adr, res) |
9389 | flag_C = 0; |
9390 | flag_V = 0; |
9391 | flag_NotZ = res; |
9392 | flag_N = res >> 24; |
9393 | FETCH_SWORD(adr); |
9394 | adr += AREG((Opcode >> 9) & 7); |
9395 | WRITE_LONG_F(adr, res) |
9396 | POST_IO |
9397 | RET(30) |
9398 | } |
9399 | |
9400 | // MOVEL |
9401 | OPCODE(0x21B0) |
9402 | { |
9403 | u32 adr, res; |
9404 | u32 src, dst; |
9405 | |
9406 | adr = AREG((Opcode >> 0) & 7); |
9407 | DECODE_EXT_WORD |
9408 | PRE_IO |
9409 | READ_LONG_F(adr, res) |
9410 | flag_C = 0; |
9411 | flag_V = 0; |
9412 | flag_NotZ = res; |
9413 | flag_N = res >> 24; |
9414 | adr = AREG((Opcode >> 9) & 7); |
9415 | DECODE_EXT_WORD |
9416 | WRITE_LONG_F(adr, res) |
9417 | POST_IO |
9418 | RET(32) |
9419 | } |
9420 | |
9421 | // MOVEL |
9422 | OPCODE(0x21F0) |
9423 | { |
9424 | u32 adr, res; |
9425 | u32 src, dst; |
9426 | |
9427 | adr = AREG((Opcode >> 0) & 7); |
9428 | DECODE_EXT_WORD |
9429 | PRE_IO |
9430 | READ_LONG_F(adr, res) |
9431 | flag_C = 0; |
9432 | flag_V = 0; |
9433 | flag_NotZ = res; |
9434 | flag_N = res >> 24; |
9435 | FETCH_SWORD(adr); |
9436 | WRITE_LONG_F(adr, res) |
9437 | POST_IO |
9438 | RET(30) |
9439 | } |
9440 | |
9441 | // MOVEL |
9442 | OPCODE(0x23F0) |
9443 | { |
9444 | u32 adr, res; |
9445 | u32 src, dst; |
9446 | |
9447 | adr = AREG((Opcode >> 0) & 7); |
9448 | DECODE_EXT_WORD |
9449 | PRE_IO |
9450 | READ_LONG_F(adr, res) |
9451 | flag_C = 0; |
9452 | flag_V = 0; |
9453 | flag_NotZ = res; |
9454 | flag_N = res >> 24; |
9455 | FETCH_LONG(adr); |
9456 | WRITE_LONG_F(adr, res) |
9457 | POST_IO |
9458 | RET(34) |
9459 | } |
9460 | |
9461 | // MOVEL |
9462 | OPCODE(0x2EF0) |
9463 | { |
9464 | u32 adr, res; |
9465 | u32 src, dst; |
9466 | |
9467 | adr = AREG((Opcode >> 0) & 7); |
9468 | DECODE_EXT_WORD |
9469 | PRE_IO |
9470 | READ_LONG_F(adr, res) |
9471 | flag_C = 0; |
9472 | flag_V = 0; |
9473 | flag_NotZ = res; |
9474 | flag_N = res >> 24; |
9475 | adr = AREG(7); |
9476 | AREG(7) += 4; |
9477 | WRITE_LONG_F(adr, res) |
9478 | POST_IO |
9479 | RET(26) |
9480 | } |
9481 | |
9482 | // MOVEL |
9483 | OPCODE(0x2F30) |
9484 | { |
9485 | u32 adr, res; |
9486 | u32 src, dst; |
9487 | |
9488 | adr = AREG((Opcode >> 0) & 7); |
9489 | DECODE_EXT_WORD |
9490 | PRE_IO |
9491 | READ_LONG_F(adr, res) |
9492 | flag_C = 0; |
9493 | flag_V = 0; |
9494 | flag_NotZ = res; |
9495 | flag_N = res >> 24; |
9496 | adr = AREG(7) - 4; |
9497 | AREG(7) = adr; |
03e4f2a3 |
9498 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9499 | POST_IO |
9500 | RET(26) |
9501 | } |
9502 | |
9503 | // MOVEL |
9504 | OPCODE(0x2038) |
9505 | { |
9506 | u32 adr, res; |
9507 | u32 src, dst; |
9508 | |
9509 | FETCH_SWORD(adr); |
9510 | PRE_IO |
9511 | READ_LONG_F(adr, res) |
9512 | flag_C = 0; |
9513 | flag_V = 0; |
9514 | flag_NotZ = res; |
9515 | flag_N = res >> 24; |
9516 | DREGu32((Opcode >> 9) & 7) = res; |
9517 | POST_IO |
9518 | RET(16) |
9519 | } |
9520 | |
9521 | // MOVEL |
9522 | OPCODE(0x20B8) |
9523 | { |
9524 | u32 adr, res; |
9525 | u32 src, dst; |
9526 | |
9527 | FETCH_SWORD(adr); |
9528 | PRE_IO |
9529 | READ_LONG_F(adr, res) |
9530 | flag_C = 0; |
9531 | flag_V = 0; |
9532 | flag_NotZ = res; |
9533 | flag_N = res >> 24; |
9534 | adr = AREG((Opcode >> 9) & 7); |
9535 | WRITE_LONG_F(adr, res) |
9536 | POST_IO |
9537 | RET(24) |
9538 | } |
9539 | |
9540 | // MOVEL |
9541 | OPCODE(0x20F8) |
9542 | { |
9543 | u32 adr, res; |
9544 | u32 src, dst; |
9545 | |
9546 | FETCH_SWORD(adr); |
9547 | PRE_IO |
9548 | READ_LONG_F(adr, res) |
9549 | flag_C = 0; |
9550 | flag_V = 0; |
9551 | flag_NotZ = res; |
9552 | flag_N = res >> 24; |
9553 | adr = AREG((Opcode >> 9) & 7); |
9554 | AREG((Opcode >> 9) & 7) += 4; |
9555 | WRITE_LONG_F(adr, res) |
9556 | POST_IO |
9557 | RET(24) |
9558 | } |
9559 | |
9560 | // MOVEL |
9561 | OPCODE(0x2138) |
9562 | { |
9563 | u32 adr, res; |
9564 | u32 src, dst; |
9565 | |
9566 | FETCH_SWORD(adr); |
9567 | PRE_IO |
9568 | READ_LONG_F(adr, res) |
9569 | flag_C = 0; |
9570 | flag_V = 0; |
9571 | flag_NotZ = res; |
9572 | flag_N = res >> 24; |
9573 | adr = AREG((Opcode >> 9) & 7) - 4; |
9574 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9575 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9576 | POST_IO |
9577 | RET(24) |
9578 | } |
9579 | |
9580 | // MOVEL |
9581 | OPCODE(0x2178) |
9582 | { |
9583 | u32 adr, res; |
9584 | u32 src, dst; |
9585 | |
9586 | FETCH_SWORD(adr); |
9587 | PRE_IO |
9588 | READ_LONG_F(adr, res) |
9589 | flag_C = 0; |
9590 | flag_V = 0; |
9591 | flag_NotZ = res; |
9592 | flag_N = res >> 24; |
9593 | FETCH_SWORD(adr); |
9594 | adr += AREG((Opcode >> 9) & 7); |
9595 | WRITE_LONG_F(adr, res) |
9596 | POST_IO |
9597 | RET(28) |
9598 | } |
9599 | |
9600 | // MOVEL |
9601 | OPCODE(0x21B8) |
9602 | { |
9603 | u32 adr, res; |
9604 | u32 src, dst; |
9605 | |
9606 | FETCH_SWORD(adr); |
9607 | PRE_IO |
9608 | READ_LONG_F(adr, res) |
9609 | flag_C = 0; |
9610 | flag_V = 0; |
9611 | flag_NotZ = res; |
9612 | flag_N = res >> 24; |
9613 | adr = AREG((Opcode >> 9) & 7); |
9614 | DECODE_EXT_WORD |
9615 | WRITE_LONG_F(adr, res) |
9616 | POST_IO |
9617 | RET(30) |
9618 | } |
9619 | |
9620 | // MOVEL |
9621 | OPCODE(0x21F8) |
9622 | { |
9623 | u32 adr, res; |
9624 | u32 src, dst; |
9625 | |
9626 | FETCH_SWORD(adr); |
9627 | PRE_IO |
9628 | READ_LONG_F(adr, res) |
9629 | flag_C = 0; |
9630 | flag_V = 0; |
9631 | flag_NotZ = res; |
9632 | flag_N = res >> 24; |
9633 | FETCH_SWORD(adr); |
9634 | WRITE_LONG_F(adr, res) |
9635 | POST_IO |
9636 | RET(28) |
9637 | } |
9638 | |
9639 | // MOVEL |
9640 | OPCODE(0x23F8) |
9641 | { |
9642 | u32 adr, res; |
9643 | u32 src, dst; |
9644 | |
9645 | FETCH_SWORD(adr); |
9646 | PRE_IO |
9647 | READ_LONG_F(adr, res) |
9648 | flag_C = 0; |
9649 | flag_V = 0; |
9650 | flag_NotZ = res; |
9651 | flag_N = res >> 24; |
9652 | FETCH_LONG(adr); |
9653 | WRITE_LONG_F(adr, res) |
9654 | POST_IO |
9655 | RET(32) |
9656 | } |
9657 | |
9658 | // MOVEL |
9659 | OPCODE(0x2EF8) |
9660 | { |
9661 | u32 adr, res; |
9662 | u32 src, dst; |
9663 | |
9664 | FETCH_SWORD(adr); |
9665 | PRE_IO |
9666 | READ_LONG_F(adr, res) |
9667 | flag_C = 0; |
9668 | flag_V = 0; |
9669 | flag_NotZ = res; |
9670 | flag_N = res >> 24; |
9671 | adr = AREG(7); |
9672 | AREG(7) += 4; |
9673 | WRITE_LONG_F(adr, res) |
9674 | POST_IO |
9675 | RET(24) |
9676 | } |
9677 | |
9678 | // MOVEL |
9679 | OPCODE(0x2F38) |
9680 | { |
9681 | u32 adr, res; |
9682 | u32 src, dst; |
9683 | |
9684 | FETCH_SWORD(adr); |
9685 | PRE_IO |
9686 | READ_LONG_F(adr, res) |
9687 | flag_C = 0; |
9688 | flag_V = 0; |
9689 | flag_NotZ = res; |
9690 | flag_N = res >> 24; |
9691 | adr = AREG(7) - 4; |
9692 | AREG(7) = adr; |
03e4f2a3 |
9693 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9694 | POST_IO |
9695 | RET(24) |
9696 | } |
9697 | |
9698 | // MOVEL |
9699 | OPCODE(0x2039) |
9700 | { |
9701 | u32 adr, res; |
9702 | u32 src, dst; |
9703 | |
9704 | FETCH_LONG(adr); |
9705 | PRE_IO |
9706 | READ_LONG_F(adr, res) |
9707 | flag_C = 0; |
9708 | flag_V = 0; |
9709 | flag_NotZ = res; |
9710 | flag_N = res >> 24; |
9711 | DREGu32((Opcode >> 9) & 7) = res; |
9712 | POST_IO |
9713 | RET(20) |
9714 | } |
9715 | |
9716 | // MOVEL |
9717 | OPCODE(0x20B9) |
9718 | { |
9719 | u32 adr, res; |
9720 | u32 src, dst; |
9721 | |
9722 | FETCH_LONG(adr); |
9723 | PRE_IO |
9724 | READ_LONG_F(adr, res) |
9725 | flag_C = 0; |
9726 | flag_V = 0; |
9727 | flag_NotZ = res; |
9728 | flag_N = res >> 24; |
9729 | adr = AREG((Opcode >> 9) & 7); |
9730 | WRITE_LONG_F(adr, res) |
9731 | POST_IO |
9732 | RET(28) |
9733 | } |
9734 | |
9735 | // MOVEL |
9736 | OPCODE(0x20F9) |
9737 | { |
9738 | u32 adr, res; |
9739 | u32 src, dst; |
9740 | |
9741 | FETCH_LONG(adr); |
9742 | PRE_IO |
9743 | READ_LONG_F(adr, res) |
9744 | flag_C = 0; |
9745 | flag_V = 0; |
9746 | flag_NotZ = res; |
9747 | flag_N = res >> 24; |
9748 | adr = AREG((Opcode >> 9) & 7); |
9749 | AREG((Opcode >> 9) & 7) += 4; |
9750 | WRITE_LONG_F(adr, res) |
9751 | POST_IO |
9752 | RET(28) |
9753 | } |
9754 | |
9755 | // MOVEL |
9756 | OPCODE(0x2139) |
9757 | { |
9758 | u32 adr, res; |
9759 | u32 src, dst; |
9760 | |
9761 | FETCH_LONG(adr); |
9762 | PRE_IO |
9763 | READ_LONG_F(adr, res) |
9764 | flag_C = 0; |
9765 | flag_V = 0; |
9766 | flag_NotZ = res; |
9767 | flag_N = res >> 24; |
9768 | adr = AREG((Opcode >> 9) & 7) - 4; |
9769 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9770 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9771 | POST_IO |
9772 | RET(28) |
9773 | } |
9774 | |
9775 | // MOVEL |
9776 | OPCODE(0x2179) |
9777 | { |
9778 | u32 adr, res; |
9779 | u32 src, dst; |
9780 | |
9781 | FETCH_LONG(adr); |
9782 | PRE_IO |
9783 | READ_LONG_F(adr, res) |
9784 | flag_C = 0; |
9785 | flag_V = 0; |
9786 | flag_NotZ = res; |
9787 | flag_N = res >> 24; |
9788 | FETCH_SWORD(adr); |
9789 | adr += AREG((Opcode >> 9) & 7); |
9790 | WRITE_LONG_F(adr, res) |
9791 | POST_IO |
9792 | RET(32) |
9793 | } |
9794 | |
9795 | // MOVEL |
9796 | OPCODE(0x21B9) |
9797 | { |
9798 | u32 adr, res; |
9799 | u32 src, dst; |
9800 | |
9801 | FETCH_LONG(adr); |
9802 | PRE_IO |
9803 | READ_LONG_F(adr, res) |
9804 | flag_C = 0; |
9805 | flag_V = 0; |
9806 | flag_NotZ = res; |
9807 | flag_N = res >> 24; |
9808 | adr = AREG((Opcode >> 9) & 7); |
9809 | DECODE_EXT_WORD |
9810 | WRITE_LONG_F(adr, res) |
9811 | POST_IO |
9812 | RET(34) |
9813 | } |
9814 | |
9815 | // MOVEL |
9816 | OPCODE(0x21F9) |
9817 | { |
9818 | u32 adr, res; |
9819 | u32 src, dst; |
9820 | |
9821 | FETCH_LONG(adr); |
9822 | PRE_IO |
9823 | READ_LONG_F(adr, res) |
9824 | flag_C = 0; |
9825 | flag_V = 0; |
9826 | flag_NotZ = res; |
9827 | flag_N = res >> 24; |
9828 | FETCH_SWORD(adr); |
9829 | WRITE_LONG_F(adr, res) |
9830 | POST_IO |
9831 | RET(32) |
9832 | } |
9833 | |
9834 | // MOVEL |
9835 | OPCODE(0x23F9) |
9836 | { |
9837 | u32 adr, res; |
9838 | u32 src, dst; |
9839 | |
9840 | FETCH_LONG(adr); |
9841 | PRE_IO |
9842 | READ_LONG_F(adr, res) |
9843 | flag_C = 0; |
9844 | flag_V = 0; |
9845 | flag_NotZ = res; |
9846 | flag_N = res >> 24; |
9847 | FETCH_LONG(adr); |
9848 | WRITE_LONG_F(adr, res) |
9849 | POST_IO |
9850 | RET(36) |
9851 | } |
9852 | |
9853 | // MOVEL |
9854 | OPCODE(0x2EF9) |
9855 | { |
9856 | u32 adr, res; |
9857 | u32 src, dst; |
9858 | |
9859 | FETCH_LONG(adr); |
9860 | PRE_IO |
9861 | READ_LONG_F(adr, res) |
9862 | flag_C = 0; |
9863 | flag_V = 0; |
9864 | flag_NotZ = res; |
9865 | flag_N = res >> 24; |
9866 | adr = AREG(7); |
9867 | AREG(7) += 4; |
9868 | WRITE_LONG_F(adr, res) |
9869 | POST_IO |
9870 | RET(28) |
9871 | } |
9872 | |
9873 | // MOVEL |
9874 | OPCODE(0x2F39) |
9875 | { |
9876 | u32 adr, res; |
9877 | u32 src, dst; |
9878 | |
9879 | FETCH_LONG(adr); |
9880 | PRE_IO |
9881 | READ_LONG_F(adr, res) |
9882 | flag_C = 0; |
9883 | flag_V = 0; |
9884 | flag_NotZ = res; |
9885 | flag_N = res >> 24; |
9886 | adr = AREG(7) - 4; |
9887 | AREG(7) = adr; |
03e4f2a3 |
9888 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9889 | POST_IO |
9890 | RET(28) |
9891 | } |
9892 | |
9893 | // MOVEL |
9894 | OPCODE(0x203A) |
9895 | { |
9896 | u32 adr, res; |
9897 | u32 src, dst; |
9898 | |
be26eb23 |
9899 | adr = GET_SWORD + GET_PC; |
70357ce5 |
9900 | PC++; |
9901 | PRE_IO |
9902 | READ_LONG_F(adr, res) |
9903 | flag_C = 0; |
9904 | flag_V = 0; |
9905 | flag_NotZ = res; |
9906 | flag_N = res >> 24; |
9907 | DREGu32((Opcode >> 9) & 7) = res; |
9908 | POST_IO |
9909 | RET(16) |
9910 | } |
9911 | |
9912 | // MOVEL |
9913 | OPCODE(0x20BA) |
9914 | { |
9915 | u32 adr, res; |
9916 | u32 src, dst; |
9917 | |
be26eb23 |
9918 | adr = GET_SWORD + GET_PC; |
70357ce5 |
9919 | PC++; |
9920 | PRE_IO |
9921 | READ_LONG_F(adr, res) |
9922 | flag_C = 0; |
9923 | flag_V = 0; |
9924 | flag_NotZ = res; |
9925 | flag_N = res >> 24; |
9926 | adr = AREG((Opcode >> 9) & 7); |
9927 | WRITE_LONG_F(adr, res) |
9928 | POST_IO |
9929 | RET(24) |
9930 | } |
9931 | |
9932 | // MOVEL |
9933 | OPCODE(0x20FA) |
9934 | { |
9935 | u32 adr, res; |
9936 | u32 src, dst; |
9937 | |
be26eb23 |
9938 | adr = GET_SWORD + GET_PC; |
70357ce5 |
9939 | PC++; |
9940 | PRE_IO |
9941 | READ_LONG_F(adr, res) |
9942 | flag_C = 0; |
9943 | flag_V = 0; |
9944 | flag_NotZ = res; |
9945 | flag_N = res >> 24; |
9946 | adr = AREG((Opcode >> 9) & 7); |
9947 | AREG((Opcode >> 9) & 7) += 4; |
9948 | WRITE_LONG_F(adr, res) |
9949 | POST_IO |
9950 | RET(24) |
9951 | } |
9952 | |
9953 | // MOVEL |
9954 | OPCODE(0x213A) |
9955 | { |
9956 | u32 adr, res; |
9957 | u32 src, dst; |
9958 | |
be26eb23 |
9959 | adr = GET_SWORD + GET_PC; |
70357ce5 |
9960 | PC++; |
9961 | PRE_IO |
9962 | READ_LONG_F(adr, res) |
9963 | flag_C = 0; |
9964 | flag_V = 0; |
9965 | flag_NotZ = res; |
9966 | flag_N = res >> 24; |
9967 | adr = AREG((Opcode >> 9) & 7) - 4; |
9968 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9969 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9970 | POST_IO |
9971 | RET(24) |
9972 | } |
9973 | |
9974 | // MOVEL |
9975 | OPCODE(0x217A) |
9976 | { |
9977 | u32 adr, res; |
9978 | u32 src, dst; |
9979 | |
be26eb23 |
9980 | adr = GET_SWORD + GET_PC; |
70357ce5 |
9981 | PC++; |
9982 | PRE_IO |
9983 | READ_LONG_F(adr, res) |
9984 | flag_C = 0; |
9985 | flag_V = 0; |
9986 | flag_NotZ = res; |
9987 | flag_N = res >> 24; |
9988 | FETCH_SWORD(adr); |
9989 | adr += AREG((Opcode >> 9) & 7); |
9990 | WRITE_LONG_F(adr, res) |
9991 | POST_IO |
9992 | RET(28) |
9993 | } |
9994 | |
9995 | // MOVEL |
9996 | OPCODE(0x21BA) |
9997 | { |
9998 | u32 adr, res; |
9999 | u32 src, dst; |
10000 | |
be26eb23 |
10001 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10002 | PC++; |
10003 | PRE_IO |
10004 | READ_LONG_F(adr, res) |
10005 | flag_C = 0; |
10006 | flag_V = 0; |
10007 | flag_NotZ = res; |
10008 | flag_N = res >> 24; |
10009 | adr = AREG((Opcode >> 9) & 7); |
10010 | DECODE_EXT_WORD |
10011 | WRITE_LONG_F(adr, res) |
10012 | POST_IO |
10013 | RET(30) |
10014 | } |
10015 | |
10016 | // MOVEL |
10017 | OPCODE(0x21FA) |
10018 | { |
10019 | u32 adr, res; |
10020 | u32 src, dst; |
10021 | |
be26eb23 |
10022 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10023 | PC++; |
10024 | PRE_IO |
10025 | READ_LONG_F(adr, res) |
10026 | flag_C = 0; |
10027 | flag_V = 0; |
10028 | flag_NotZ = res; |
10029 | flag_N = res >> 24; |
10030 | FETCH_SWORD(adr); |
10031 | WRITE_LONG_F(adr, res) |
10032 | POST_IO |
10033 | RET(28) |
10034 | } |
10035 | |
10036 | // MOVEL |
10037 | OPCODE(0x23FA) |
10038 | { |
10039 | u32 adr, res; |
10040 | u32 src, dst; |
10041 | |
be26eb23 |
10042 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10043 | PC++; |
10044 | PRE_IO |
10045 | READ_LONG_F(adr, res) |
10046 | flag_C = 0; |
10047 | flag_V = 0; |
10048 | flag_NotZ = res; |
10049 | flag_N = res >> 24; |
10050 | FETCH_LONG(adr); |
10051 | WRITE_LONG_F(adr, res) |
10052 | POST_IO |
10053 | RET(32) |
10054 | } |
10055 | |
10056 | // MOVEL |
10057 | OPCODE(0x2EFA) |
10058 | { |
10059 | u32 adr, res; |
10060 | u32 src, dst; |
10061 | |
be26eb23 |
10062 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10063 | PC++; |
10064 | PRE_IO |
10065 | READ_LONG_F(adr, res) |
10066 | flag_C = 0; |
10067 | flag_V = 0; |
10068 | flag_NotZ = res; |
10069 | flag_N = res >> 24; |
10070 | adr = AREG(7); |
10071 | AREG(7) += 4; |
10072 | WRITE_LONG_F(adr, res) |
10073 | POST_IO |
10074 | RET(24) |
10075 | } |
10076 | |
10077 | // MOVEL |
10078 | OPCODE(0x2F3A) |
10079 | { |
10080 | u32 adr, res; |
10081 | u32 src, dst; |
10082 | |
be26eb23 |
10083 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10084 | PC++; |
10085 | PRE_IO |
10086 | READ_LONG_F(adr, res) |
10087 | flag_C = 0; |
10088 | flag_V = 0; |
10089 | flag_NotZ = res; |
10090 | flag_N = res >> 24; |
10091 | adr = AREG(7) - 4; |
10092 | AREG(7) = adr; |
03e4f2a3 |
10093 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10094 | POST_IO |
10095 | RET(24) |
10096 | } |
10097 | |
10098 | // MOVEL |
10099 | OPCODE(0x203B) |
10100 | { |
10101 | u32 adr, res; |
10102 | u32 src, dst; |
10103 | |
be26eb23 |
10104 | adr = GET_PC; |
70357ce5 |
10105 | DECODE_EXT_WORD |
10106 | PRE_IO |
10107 | READ_LONG_F(adr, res) |
10108 | flag_C = 0; |
10109 | flag_V = 0; |
10110 | flag_NotZ = res; |
10111 | flag_N = res >> 24; |
10112 | DREGu32((Opcode >> 9) & 7) = res; |
10113 | POST_IO |
10114 | RET(18) |
10115 | } |
10116 | |
10117 | // MOVEL |
10118 | OPCODE(0x20BB) |
10119 | { |
10120 | u32 adr, res; |
10121 | u32 src, dst; |
10122 | |
be26eb23 |
10123 | adr = GET_PC; |
70357ce5 |
10124 | DECODE_EXT_WORD |
10125 | PRE_IO |
10126 | READ_LONG_F(adr, res) |
10127 | flag_C = 0; |
10128 | flag_V = 0; |
10129 | flag_NotZ = res; |
10130 | flag_N = res >> 24; |
10131 | adr = AREG((Opcode >> 9) & 7); |
10132 | WRITE_LONG_F(adr, res) |
10133 | POST_IO |
10134 | RET(26) |
10135 | } |
10136 | |
10137 | // MOVEL |
10138 | OPCODE(0x20FB) |
10139 | { |
10140 | u32 adr, res; |
10141 | u32 src, dst; |
10142 | |
be26eb23 |
10143 | adr = GET_PC; |
70357ce5 |
10144 | DECODE_EXT_WORD |
10145 | PRE_IO |
10146 | READ_LONG_F(adr, res) |
10147 | flag_C = 0; |
10148 | flag_V = 0; |
10149 | flag_NotZ = res; |
10150 | flag_N = res >> 24; |
10151 | adr = AREG((Opcode >> 9) & 7); |
10152 | AREG((Opcode >> 9) & 7) += 4; |
10153 | WRITE_LONG_F(adr, res) |
10154 | POST_IO |
10155 | RET(26) |
10156 | } |
10157 | |
10158 | // MOVEL |
10159 | OPCODE(0x213B) |
10160 | { |
10161 | u32 adr, res; |
10162 | u32 src, dst; |
10163 | |
be26eb23 |
10164 | adr = GET_PC; |
70357ce5 |
10165 | DECODE_EXT_WORD |
10166 | PRE_IO |
10167 | READ_LONG_F(adr, res) |
10168 | flag_C = 0; |
10169 | flag_V = 0; |
10170 | flag_NotZ = res; |
10171 | flag_N = res >> 24; |
10172 | adr = AREG((Opcode >> 9) & 7) - 4; |
10173 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10174 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10175 | POST_IO |
10176 | RET(26) |
10177 | } |
10178 | |
10179 | // MOVEL |
10180 | OPCODE(0x217B) |
10181 | { |
10182 | u32 adr, res; |
10183 | u32 src, dst; |
10184 | |
be26eb23 |
10185 | adr = GET_PC; |
70357ce5 |
10186 | DECODE_EXT_WORD |
10187 | PRE_IO |
10188 | READ_LONG_F(adr, res) |
10189 | flag_C = 0; |
10190 | flag_V = 0; |
10191 | flag_NotZ = res; |
10192 | flag_N = res >> 24; |
10193 | FETCH_SWORD(adr); |
10194 | adr += AREG((Opcode >> 9) & 7); |
10195 | WRITE_LONG_F(adr, res) |
10196 | POST_IO |
10197 | RET(30) |
10198 | } |
10199 | |
10200 | // MOVEL |
10201 | OPCODE(0x21BB) |
10202 | { |
10203 | u32 adr, res; |
10204 | u32 src, dst; |
10205 | |
be26eb23 |
10206 | adr = GET_PC; |
70357ce5 |
10207 | DECODE_EXT_WORD |
10208 | PRE_IO |
10209 | READ_LONG_F(adr, res) |
10210 | flag_C = 0; |
10211 | flag_V = 0; |
10212 | flag_NotZ = res; |
10213 | flag_N = res >> 24; |
10214 | adr = AREG((Opcode >> 9) & 7); |
10215 | DECODE_EXT_WORD |
10216 | WRITE_LONG_F(adr, res) |
10217 | POST_IO |
10218 | RET(32) |
10219 | } |
10220 | |
10221 | // MOVEL |
10222 | OPCODE(0x21FB) |
10223 | { |
10224 | u32 adr, res; |
10225 | u32 src, dst; |
10226 | |
be26eb23 |
10227 | adr = GET_PC; |
70357ce5 |
10228 | DECODE_EXT_WORD |
10229 | PRE_IO |
10230 | READ_LONG_F(adr, res) |
10231 | flag_C = 0; |
10232 | flag_V = 0; |
10233 | flag_NotZ = res; |
10234 | flag_N = res >> 24; |
10235 | FETCH_SWORD(adr); |
10236 | WRITE_LONG_F(adr, res) |
10237 | POST_IO |
10238 | RET(30) |
10239 | } |
10240 | |
10241 | // MOVEL |
10242 | OPCODE(0x23FB) |
10243 | { |
10244 | u32 adr, res; |
10245 | u32 src, dst; |
10246 | |
be26eb23 |
10247 | adr = GET_PC; |
70357ce5 |
10248 | DECODE_EXT_WORD |
10249 | PRE_IO |
10250 | READ_LONG_F(adr, res) |
10251 | flag_C = 0; |
10252 | flag_V = 0; |
10253 | flag_NotZ = res; |
10254 | flag_N = res >> 24; |
10255 | FETCH_LONG(adr); |
10256 | WRITE_LONG_F(adr, res) |
10257 | POST_IO |
10258 | RET(34) |
10259 | } |
10260 | |
10261 | // MOVEL |
10262 | OPCODE(0x2EFB) |
10263 | { |
10264 | u32 adr, res; |
10265 | u32 src, dst; |
10266 | |
be26eb23 |
10267 | adr = GET_PC; |
70357ce5 |
10268 | DECODE_EXT_WORD |
10269 | PRE_IO |
10270 | READ_LONG_F(adr, res) |
10271 | flag_C = 0; |
10272 | flag_V = 0; |
10273 | flag_NotZ = res; |
10274 | flag_N = res >> 24; |
10275 | adr = AREG(7); |
10276 | AREG(7) += 4; |
10277 | WRITE_LONG_F(adr, res) |
10278 | POST_IO |
10279 | RET(26) |
10280 | } |
10281 | |
10282 | // MOVEL |
10283 | OPCODE(0x2F3B) |
10284 | { |
10285 | u32 adr, res; |
10286 | u32 src, dst; |
10287 | |
be26eb23 |
10288 | adr = GET_PC; |
70357ce5 |
10289 | DECODE_EXT_WORD |
10290 | PRE_IO |
10291 | READ_LONG_F(adr, res) |
10292 | flag_C = 0; |
10293 | flag_V = 0; |
10294 | flag_NotZ = res; |
10295 | flag_N = res >> 24; |
10296 | adr = AREG(7) - 4; |
10297 | AREG(7) = adr; |
03e4f2a3 |
10298 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10299 | POST_IO |
10300 | RET(26) |
10301 | } |
10302 | |
10303 | // MOVEL |
10304 | OPCODE(0x203C) |
10305 | { |
10306 | u32 adr, res; |
10307 | u32 src, dst; |
10308 | |
10309 | FETCH_LONG(res); |
10310 | flag_C = 0; |
10311 | flag_V = 0; |
10312 | flag_NotZ = res; |
10313 | flag_N = res >> 24; |
10314 | DREGu32((Opcode >> 9) & 7) = res; |
10315 | RET(12) |
10316 | } |
10317 | |
10318 | // MOVEL |
10319 | OPCODE(0x20BC) |
10320 | { |
10321 | u32 adr, res; |
10322 | u32 src, dst; |
10323 | |
10324 | FETCH_LONG(res); |
10325 | flag_C = 0; |
10326 | flag_V = 0; |
10327 | flag_NotZ = res; |
10328 | flag_N = res >> 24; |
10329 | adr = AREG((Opcode >> 9) & 7); |
10330 | PRE_IO |
10331 | WRITE_LONG_F(adr, res) |
10332 | POST_IO |
10333 | RET(20) |
10334 | } |
10335 | |
10336 | // MOVEL |
10337 | OPCODE(0x20FC) |
10338 | { |
10339 | u32 adr, res; |
10340 | u32 src, dst; |
10341 | |
10342 | FETCH_LONG(res); |
10343 | flag_C = 0; |
10344 | flag_V = 0; |
10345 | flag_NotZ = res; |
10346 | flag_N = res >> 24; |
10347 | adr = AREG((Opcode >> 9) & 7); |
10348 | AREG((Opcode >> 9) & 7) += 4; |
10349 | PRE_IO |
10350 | WRITE_LONG_F(adr, res) |
10351 | POST_IO |
10352 | RET(20) |
10353 | } |
10354 | |
10355 | // MOVEL |
10356 | OPCODE(0x213C) |
10357 | { |
10358 | u32 adr, res; |
10359 | u32 src, dst; |
10360 | |
10361 | FETCH_LONG(res); |
10362 | flag_C = 0; |
10363 | flag_V = 0; |
10364 | flag_NotZ = res; |
10365 | flag_N = res >> 24; |
10366 | adr = AREG((Opcode >> 9) & 7) - 4; |
10367 | AREG((Opcode >> 9) & 7) = adr; |
10368 | PRE_IO |
80db4442 |
10369 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10370 | POST_IO |
10371 | RET(20) |
10372 | } |
10373 | |
10374 | // MOVEL |
10375 | OPCODE(0x217C) |
10376 | { |
10377 | u32 adr, res; |
10378 | u32 src, dst; |
10379 | |
10380 | FETCH_LONG(res); |
10381 | flag_C = 0; |
10382 | flag_V = 0; |
10383 | flag_NotZ = res; |
10384 | flag_N = res >> 24; |
10385 | FETCH_SWORD(adr); |
10386 | adr += AREG((Opcode >> 9) & 7); |
10387 | PRE_IO |
10388 | WRITE_LONG_F(adr, res) |
10389 | POST_IO |
10390 | RET(24) |
10391 | } |
10392 | |
10393 | // MOVEL |
10394 | OPCODE(0x21BC) |
10395 | { |
10396 | u32 adr, res; |
10397 | u32 src, dst; |
10398 | |
10399 | FETCH_LONG(res); |
10400 | flag_C = 0; |
10401 | flag_V = 0; |
10402 | flag_NotZ = res; |
10403 | flag_N = res >> 24; |
10404 | adr = AREG((Opcode >> 9) & 7); |
10405 | DECODE_EXT_WORD |
10406 | PRE_IO |
10407 | WRITE_LONG_F(adr, res) |
10408 | POST_IO |
10409 | RET(26) |
10410 | } |
10411 | |
10412 | // MOVEL |
10413 | OPCODE(0x21FC) |
10414 | { |
10415 | u32 adr, res; |
10416 | u32 src, dst; |
10417 | |
10418 | FETCH_LONG(res); |
10419 | flag_C = 0; |
10420 | flag_V = 0; |
10421 | flag_NotZ = res; |
10422 | flag_N = res >> 24; |
10423 | FETCH_SWORD(adr); |
10424 | PRE_IO |
10425 | WRITE_LONG_F(adr, res) |
10426 | POST_IO |
10427 | RET(24) |
10428 | } |
10429 | |
10430 | // MOVEL |
10431 | OPCODE(0x23FC) |
10432 | { |
10433 | u32 adr, res; |
10434 | u32 src, dst; |
10435 | |
10436 | FETCH_LONG(res); |
10437 | flag_C = 0; |
10438 | flag_V = 0; |
10439 | flag_NotZ = res; |
10440 | flag_N = res >> 24; |
10441 | FETCH_LONG(adr); |
10442 | PRE_IO |
10443 | WRITE_LONG_F(adr, res) |
10444 | POST_IO |
10445 | RET(28) |
10446 | } |
10447 | |
10448 | // MOVEL |
10449 | OPCODE(0x2EFC) |
10450 | { |
10451 | u32 adr, res; |
10452 | u32 src, dst; |
10453 | |
10454 | FETCH_LONG(res); |
10455 | flag_C = 0; |
10456 | flag_V = 0; |
10457 | flag_NotZ = res; |
10458 | flag_N = res >> 24; |
10459 | adr = AREG(7); |
10460 | AREG(7) += 4; |
10461 | PRE_IO |
10462 | WRITE_LONG_F(adr, res) |
10463 | POST_IO |
10464 | RET(20) |
10465 | } |
10466 | |
10467 | // MOVEL |
10468 | OPCODE(0x2F3C) |
10469 | { |
10470 | u32 adr, res; |
10471 | u32 src, dst; |
10472 | |
10473 | FETCH_LONG(res); |
10474 | flag_C = 0; |
10475 | flag_V = 0; |
10476 | flag_NotZ = res; |
10477 | flag_N = res >> 24; |
10478 | adr = AREG(7) - 4; |
10479 | AREG(7) = adr; |
10480 | PRE_IO |
03e4f2a3 |
10481 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10482 | POST_IO |
10483 | RET(20) |
10484 | } |
10485 | |
10486 | // MOVEL |
10487 | OPCODE(0x201F) |
10488 | { |
10489 | u32 adr, res; |
10490 | u32 src, dst; |
10491 | |
10492 | adr = AREG(7); |
10493 | AREG(7) += 4; |
10494 | PRE_IO |
10495 | READ_LONG_F(adr, res) |
10496 | flag_C = 0; |
10497 | flag_V = 0; |
10498 | flag_NotZ = res; |
10499 | flag_N = res >> 24; |
10500 | DREGu32((Opcode >> 9) & 7) = res; |
10501 | POST_IO |
10502 | RET(12) |
10503 | } |
10504 | |
10505 | // MOVEL |
10506 | OPCODE(0x209F) |
10507 | { |
10508 | u32 adr, res; |
10509 | u32 src, dst; |
10510 | |
10511 | adr = AREG(7); |
10512 | AREG(7) += 4; |
10513 | PRE_IO |
10514 | READ_LONG_F(adr, res) |
10515 | flag_C = 0; |
10516 | flag_V = 0; |
10517 | flag_NotZ = res; |
10518 | flag_N = res >> 24; |
10519 | adr = AREG((Opcode >> 9) & 7); |
10520 | WRITE_LONG_F(adr, res) |
10521 | POST_IO |
10522 | RET(20) |
10523 | } |
10524 | |
10525 | // MOVEL |
10526 | OPCODE(0x20DF) |
10527 | { |
10528 | u32 adr, res; |
10529 | u32 src, dst; |
10530 | |
10531 | adr = AREG(7); |
10532 | AREG(7) += 4; |
10533 | PRE_IO |
10534 | READ_LONG_F(adr, res) |
10535 | flag_C = 0; |
10536 | flag_V = 0; |
10537 | flag_NotZ = res; |
10538 | flag_N = res >> 24; |
10539 | adr = AREG((Opcode >> 9) & 7); |
10540 | AREG((Opcode >> 9) & 7) += 4; |
10541 | WRITE_LONG_F(adr, res) |
10542 | POST_IO |
10543 | RET(20) |
10544 | } |
10545 | |
10546 | // MOVEL |
10547 | OPCODE(0x211F) |
10548 | { |
10549 | u32 adr, res; |
10550 | u32 src, dst; |
10551 | |
10552 | adr = AREG(7); |
10553 | AREG(7) += 4; |
10554 | PRE_IO |
10555 | READ_LONG_F(adr, res) |
10556 | flag_C = 0; |
10557 | flag_V = 0; |
10558 | flag_NotZ = res; |
10559 | flag_N = res >> 24; |
10560 | adr = AREG((Opcode >> 9) & 7) - 4; |
10561 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10562 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10563 | POST_IO |
10564 | RET(20) |
10565 | } |
10566 | |
10567 | // MOVEL |
10568 | OPCODE(0x215F) |
10569 | { |
10570 | u32 adr, res; |
10571 | u32 src, dst; |
10572 | |
10573 | adr = AREG(7); |
10574 | AREG(7) += 4; |
10575 | PRE_IO |
10576 | READ_LONG_F(adr, res) |
10577 | flag_C = 0; |
10578 | flag_V = 0; |
10579 | flag_NotZ = res; |
10580 | flag_N = res >> 24; |
10581 | FETCH_SWORD(adr); |
10582 | adr += AREG((Opcode >> 9) & 7); |
10583 | WRITE_LONG_F(adr, res) |
10584 | POST_IO |
10585 | RET(24) |
10586 | } |
10587 | |
10588 | // MOVEL |
10589 | OPCODE(0x219F) |
10590 | { |
10591 | u32 adr, res; |
10592 | u32 src, dst; |
10593 | |
10594 | adr = AREG(7); |
10595 | AREG(7) += 4; |
10596 | PRE_IO |
10597 | READ_LONG_F(adr, res) |
10598 | flag_C = 0; |
10599 | flag_V = 0; |
10600 | flag_NotZ = res; |
10601 | flag_N = res >> 24; |
10602 | adr = AREG((Opcode >> 9) & 7); |
10603 | DECODE_EXT_WORD |
10604 | WRITE_LONG_F(adr, res) |
10605 | POST_IO |
10606 | RET(26) |
10607 | } |
10608 | |
10609 | // MOVEL |
10610 | OPCODE(0x21DF) |
10611 | { |
10612 | u32 adr, res; |
10613 | u32 src, dst; |
10614 | |
10615 | adr = AREG(7); |
10616 | AREG(7) += 4; |
10617 | PRE_IO |
10618 | READ_LONG_F(adr, res) |
10619 | flag_C = 0; |
10620 | flag_V = 0; |
10621 | flag_NotZ = res; |
10622 | flag_N = res >> 24; |
10623 | FETCH_SWORD(adr); |
10624 | WRITE_LONG_F(adr, res) |
10625 | POST_IO |
10626 | RET(24) |
10627 | } |
10628 | |
10629 | // MOVEL |
10630 | OPCODE(0x23DF) |
10631 | { |
10632 | u32 adr, res; |
10633 | u32 src, dst; |
10634 | |
10635 | adr = AREG(7); |
10636 | AREG(7) += 4; |
10637 | PRE_IO |
10638 | READ_LONG_F(adr, res) |
10639 | flag_C = 0; |
10640 | flag_V = 0; |
10641 | flag_NotZ = res; |
10642 | flag_N = res >> 24; |
10643 | FETCH_LONG(adr); |
10644 | WRITE_LONG_F(adr, res) |
10645 | POST_IO |
10646 | RET(28) |
10647 | } |
10648 | |
10649 | // MOVEL |
10650 | OPCODE(0x2EDF) |
10651 | { |
10652 | u32 adr, res; |
10653 | u32 src, dst; |
10654 | |
10655 | adr = AREG(7); |
10656 | AREG(7) += 4; |
10657 | PRE_IO |
10658 | READ_LONG_F(adr, res) |
10659 | flag_C = 0; |
10660 | flag_V = 0; |
10661 | flag_NotZ = res; |
10662 | flag_N = res >> 24; |
10663 | adr = AREG(7); |
10664 | AREG(7) += 4; |
10665 | WRITE_LONG_F(adr, res) |
10666 | POST_IO |
10667 | RET(20) |
10668 | } |
10669 | |
10670 | // MOVEL |
10671 | OPCODE(0x2F1F) |
10672 | { |
10673 | u32 adr, res; |
10674 | u32 src, dst; |
10675 | |
10676 | adr = AREG(7); |
10677 | AREG(7) += 4; |
10678 | PRE_IO |
10679 | READ_LONG_F(adr, res) |
10680 | flag_C = 0; |
10681 | flag_V = 0; |
10682 | flag_NotZ = res; |
10683 | flag_N = res >> 24; |
10684 | adr = AREG(7) - 4; |
10685 | AREG(7) = adr; |
03e4f2a3 |
10686 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10687 | POST_IO |
10688 | RET(20) |
10689 | } |
10690 | |
10691 | // MOVEL |
10692 | OPCODE(0x2027) |
10693 | { |
10694 | u32 adr, res; |
10695 | u32 src, dst; |
10696 | |
10697 | adr = AREG(7) - 4; |
10698 | AREG(7) = adr; |
10699 | PRE_IO |
10700 | READ_LONG_F(adr, res) |
10701 | flag_C = 0; |
10702 | flag_V = 0; |
10703 | flag_NotZ = res; |
10704 | flag_N = res >> 24; |
10705 | DREGu32((Opcode >> 9) & 7) = res; |
10706 | POST_IO |
10707 | RET(14) |
10708 | } |
10709 | |
10710 | // MOVEL |
10711 | OPCODE(0x20A7) |
10712 | { |
10713 | u32 adr, res; |
10714 | u32 src, dst; |
10715 | |
10716 | adr = AREG(7) - 4; |
10717 | AREG(7) = adr; |
10718 | PRE_IO |
10719 | READ_LONG_F(adr, res) |
10720 | flag_C = 0; |
10721 | flag_V = 0; |
10722 | flag_NotZ = res; |
10723 | flag_N = res >> 24; |
10724 | adr = AREG((Opcode >> 9) & 7); |
10725 | WRITE_LONG_F(adr, res) |
10726 | POST_IO |
10727 | RET(22) |
10728 | } |
10729 | |
10730 | // MOVEL |
10731 | OPCODE(0x20E7) |
10732 | { |
10733 | u32 adr, res; |
10734 | u32 src, dst; |
10735 | |
10736 | adr = AREG(7) - 4; |
10737 | AREG(7) = adr; |
10738 | PRE_IO |
10739 | READ_LONG_F(adr, res) |
10740 | flag_C = 0; |
10741 | flag_V = 0; |
10742 | flag_NotZ = res; |
10743 | flag_N = res >> 24; |
10744 | adr = AREG((Opcode >> 9) & 7); |
10745 | AREG((Opcode >> 9) & 7) += 4; |
10746 | WRITE_LONG_F(adr, res) |
10747 | POST_IO |
10748 | RET(22) |
10749 | } |
10750 | |
10751 | // MOVEL |
10752 | OPCODE(0x2127) |
10753 | { |
10754 | u32 adr, res; |
10755 | u32 src, dst; |
10756 | |
10757 | adr = AREG(7) - 4; |
10758 | AREG(7) = adr; |
10759 | PRE_IO |
10760 | READ_LONG_F(adr, res) |
10761 | flag_C = 0; |
10762 | flag_V = 0; |
10763 | flag_NotZ = res; |
10764 | flag_N = res >> 24; |
10765 | adr = AREG((Opcode >> 9) & 7) - 4; |
10766 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10767 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10768 | POST_IO |
10769 | RET(22) |
10770 | } |
10771 | |
10772 | // MOVEL |
10773 | OPCODE(0x2167) |
10774 | { |
10775 | u32 adr, res; |
10776 | u32 src, dst; |
10777 | |
10778 | adr = AREG(7) - 4; |
10779 | AREG(7) = adr; |
10780 | PRE_IO |
10781 | READ_LONG_F(adr, res) |
10782 | flag_C = 0; |
10783 | flag_V = 0; |
10784 | flag_NotZ = res; |
10785 | flag_N = res >> 24; |
10786 | FETCH_SWORD(adr); |
10787 | adr += AREG((Opcode >> 9) & 7); |
10788 | WRITE_LONG_F(adr, res) |
10789 | POST_IO |
10790 | RET(26) |
10791 | } |
10792 | |
10793 | // MOVEL |
10794 | OPCODE(0x21A7) |
10795 | { |
10796 | u32 adr, res; |
10797 | u32 src, dst; |
10798 | |
10799 | adr = AREG(7) - 4; |
10800 | AREG(7) = adr; |
10801 | PRE_IO |
10802 | READ_LONG_F(adr, res) |
10803 | flag_C = 0; |
10804 | flag_V = 0; |
10805 | flag_NotZ = res; |
10806 | flag_N = res >> 24; |
10807 | adr = AREG((Opcode >> 9) & 7); |
10808 | DECODE_EXT_WORD |
10809 | WRITE_LONG_F(adr, res) |
10810 | POST_IO |
10811 | RET(28) |
10812 | } |
10813 | |
10814 | // MOVEL |
10815 | OPCODE(0x21E7) |
10816 | { |
10817 | u32 adr, res; |
10818 | u32 src, dst; |
10819 | |
10820 | adr = AREG(7) - 4; |
10821 | AREG(7) = adr; |
10822 | PRE_IO |
10823 | READ_LONG_F(adr, res) |
10824 | flag_C = 0; |
10825 | flag_V = 0; |
10826 | flag_NotZ = res; |
10827 | flag_N = res >> 24; |
10828 | FETCH_SWORD(adr); |
10829 | WRITE_LONG_F(adr, res) |
10830 | POST_IO |
10831 | RET(26) |
10832 | } |
10833 | |
10834 | // MOVEL |
10835 | OPCODE(0x23E7) |
10836 | { |
10837 | u32 adr, res; |
10838 | u32 src, dst; |
10839 | |
10840 | adr = AREG(7) - 4; |
10841 | AREG(7) = adr; |
10842 | PRE_IO |
10843 | READ_LONG_F(adr, res) |
10844 | flag_C = 0; |
10845 | flag_V = 0; |
10846 | flag_NotZ = res; |
10847 | flag_N = res >> 24; |
10848 | FETCH_LONG(adr); |
10849 | WRITE_LONG_F(adr, res) |
10850 | POST_IO |
10851 | RET(30) |
10852 | } |
10853 | |
10854 | // MOVEL |
10855 | OPCODE(0x2EE7) |
10856 | { |
10857 | u32 adr, res; |
10858 | u32 src, dst; |
10859 | |
10860 | adr = AREG(7) - 4; |
10861 | AREG(7) = adr; |
10862 | PRE_IO |
10863 | READ_LONG_F(adr, res) |
10864 | flag_C = 0; |
10865 | flag_V = 0; |
10866 | flag_NotZ = res; |
10867 | flag_N = res >> 24; |
10868 | adr = AREG(7); |
10869 | AREG(7) += 4; |
10870 | WRITE_LONG_F(adr, res) |
10871 | POST_IO |
10872 | RET(22) |
10873 | } |
10874 | |
10875 | // MOVEL |
10876 | OPCODE(0x2F27) |
10877 | { |
10878 | u32 adr, res; |
10879 | u32 src, dst; |
10880 | |
10881 | adr = AREG(7) - 4; |
10882 | AREG(7) = adr; |
10883 | PRE_IO |
10884 | READ_LONG_F(adr, res) |
10885 | flag_C = 0; |
10886 | flag_V = 0; |
10887 | flag_NotZ = res; |
10888 | flag_N = res >> 24; |
10889 | adr = AREG(7) - 4; |
10890 | AREG(7) = adr; |
03e4f2a3 |
10891 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10892 | POST_IO |
10893 | RET(22) |
10894 | } |
10895 | |
10896 | // MOVEAL |
10897 | OPCODE(0x2040) |
10898 | { |
10899 | u32 adr, res; |
10900 | u32 src, dst; |
10901 | |
10902 | res = (s32)DREGs32((Opcode >> 0) & 7); |
10903 | AREG((Opcode >> 9) & 7) = res; |
10904 | RET(4) |
10905 | } |
10906 | |
10907 | // MOVEAL |
10908 | OPCODE(0x2048) |
10909 | { |
10910 | u32 adr, res; |
10911 | u32 src, dst; |
10912 | |
10913 | res = (s32)AREGs32((Opcode >> 0) & 7); |
10914 | AREG((Opcode >> 9) & 7) = res; |
10915 | RET(4) |
10916 | } |
10917 | |
10918 | // MOVEAL |
10919 | OPCODE(0x2050) |
10920 | { |
10921 | u32 adr, res; |
10922 | u32 src, dst; |
10923 | |
10924 | adr = AREG((Opcode >> 0) & 7); |
10925 | PRE_IO |
10926 | READSX_LONG_F(adr, res) |
10927 | AREG((Opcode >> 9) & 7) = res; |
10928 | POST_IO |
10929 | RET(12) |
10930 | } |
10931 | |
10932 | // MOVEAL |
10933 | OPCODE(0x2058) |
10934 | { |
10935 | u32 adr, res; |
10936 | u32 src, dst; |
10937 | |
10938 | adr = AREG((Opcode >> 0) & 7); |
10939 | AREG((Opcode >> 0) & 7) += 4; |
10940 | PRE_IO |
10941 | READSX_LONG_F(adr, res) |
10942 | AREG((Opcode >> 9) & 7) = res; |
10943 | POST_IO |
10944 | RET(12) |
10945 | } |
10946 | |
10947 | // MOVEAL |
10948 | OPCODE(0x2060) |
10949 | { |
10950 | u32 adr, res; |
10951 | u32 src, dst; |
10952 | |
10953 | adr = AREG((Opcode >> 0) & 7) - 4; |
10954 | AREG((Opcode >> 0) & 7) = adr; |
10955 | PRE_IO |
10956 | READSX_LONG_F(adr, res) |
10957 | AREG((Opcode >> 9) & 7) = res; |
10958 | POST_IO |
10959 | RET(14) |
10960 | } |
10961 | |
10962 | // MOVEAL |
10963 | OPCODE(0x2068) |
10964 | { |
10965 | u32 adr, res; |
10966 | u32 src, dst; |
10967 | |
10968 | FETCH_SWORD(adr); |
10969 | adr += AREG((Opcode >> 0) & 7); |
10970 | PRE_IO |
10971 | READSX_LONG_F(adr, res) |
10972 | AREG((Opcode >> 9) & 7) = res; |
10973 | POST_IO |
10974 | RET(16) |
10975 | } |
10976 | |
10977 | // MOVEAL |
10978 | OPCODE(0x2070) |
10979 | { |
10980 | u32 adr, res; |
10981 | u32 src, dst; |
10982 | |
10983 | adr = AREG((Opcode >> 0) & 7); |
10984 | DECODE_EXT_WORD |
10985 | PRE_IO |
10986 | READSX_LONG_F(adr, res) |
10987 | AREG((Opcode >> 9) & 7) = res; |
10988 | POST_IO |
10989 | RET(18) |
10990 | } |
10991 | |
10992 | // MOVEAL |
10993 | OPCODE(0x2078) |
10994 | { |
10995 | u32 adr, res; |
10996 | u32 src, dst; |
10997 | |
10998 | FETCH_SWORD(adr); |
10999 | PRE_IO |
11000 | READSX_LONG_F(adr, res) |
11001 | AREG((Opcode >> 9) & 7) = res; |
11002 | POST_IO |
11003 | RET(16) |
11004 | } |
11005 | |
11006 | // MOVEAL |
11007 | OPCODE(0x2079) |
11008 | { |
11009 | u32 adr, res; |
11010 | u32 src, dst; |
11011 | |
11012 | FETCH_LONG(adr); |
11013 | PRE_IO |
11014 | READSX_LONG_F(adr, res) |
11015 | AREG((Opcode >> 9) & 7) = res; |
11016 | POST_IO |
11017 | RET(20) |
11018 | } |
11019 | |
11020 | // MOVEAL |
11021 | OPCODE(0x207A) |
11022 | { |
11023 | u32 adr, res; |
11024 | u32 src, dst; |
11025 | |
be26eb23 |
11026 | adr = GET_SWORD + GET_PC; |
70357ce5 |
11027 | PC++; |
11028 | PRE_IO |
11029 | READSX_LONG_F(adr, res) |
11030 | AREG((Opcode >> 9) & 7) = res; |
11031 | POST_IO |
11032 | RET(16) |
11033 | } |
11034 | |
11035 | // MOVEAL |
11036 | OPCODE(0x207B) |
11037 | { |
11038 | u32 adr, res; |
11039 | u32 src, dst; |
11040 | |
be26eb23 |
11041 | adr = GET_PC; |
70357ce5 |
11042 | DECODE_EXT_WORD |
11043 | PRE_IO |
11044 | READSX_LONG_F(adr, res) |
11045 | AREG((Opcode >> 9) & 7) = res; |
11046 | POST_IO |
11047 | RET(18) |
11048 | } |
11049 | |
11050 | // MOVEAL |
11051 | OPCODE(0x207C) |
11052 | { |
11053 | u32 adr, res; |
11054 | u32 src, dst; |
11055 | |
11056 | FETCH_LONG(res); |
11057 | AREG((Opcode >> 9) & 7) = res; |
11058 | RET(12) |
11059 | } |
11060 | |
11061 | // MOVEAL |
11062 | OPCODE(0x205F) |
11063 | { |
11064 | u32 adr, res; |
11065 | u32 src, dst; |
11066 | |
11067 | adr = AREG(7); |
11068 | AREG(7) += 4; |
11069 | PRE_IO |
11070 | READSX_LONG_F(adr, res) |
11071 | AREG((Opcode >> 9) & 7) = res; |
11072 | POST_IO |
11073 | RET(12) |
11074 | } |
11075 | |
11076 | // MOVEAL |
11077 | OPCODE(0x2067) |
11078 | { |
11079 | u32 adr, res; |
11080 | u32 src, dst; |
11081 | |
11082 | adr = AREG(7) - 4; |
11083 | AREG(7) = adr; |
11084 | PRE_IO |
11085 | READSX_LONG_F(adr, res) |
11086 | AREG((Opcode >> 9) & 7) = res; |
11087 | POST_IO |
11088 | RET(14) |
11089 | } |
11090 | |
11091 | // MOVEW |
11092 | OPCODE(0x3000) |
11093 | { |
11094 | u32 adr, res; |
11095 | u32 src, dst; |
11096 | |
11097 | res = DREGu16((Opcode >> 0) & 7); |
11098 | flag_C = 0; |
11099 | flag_V = 0; |
11100 | flag_NotZ = res; |
11101 | flag_N = res >> 8; |
11102 | DREGu16((Opcode >> 9) & 7) = res; |
11103 | RET(4) |
11104 | } |
11105 | |
11106 | // MOVEW |
11107 | OPCODE(0x3080) |
11108 | { |
11109 | u32 adr, res; |
11110 | u32 src, dst; |
11111 | |
11112 | res = DREGu16((Opcode >> 0) & 7); |
11113 | flag_C = 0; |
11114 | flag_V = 0; |
11115 | flag_NotZ = res; |
11116 | flag_N = res >> 8; |
11117 | adr = AREG((Opcode >> 9) & 7); |
11118 | PRE_IO |
11119 | WRITE_WORD_F(adr, res) |
11120 | POST_IO |
11121 | RET(8) |
11122 | } |
11123 | |
11124 | // MOVEW |
11125 | OPCODE(0x30C0) |
11126 | { |
11127 | u32 adr, res; |
11128 | u32 src, dst; |
11129 | |
11130 | res = DREGu16((Opcode >> 0) & 7); |
11131 | flag_C = 0; |
11132 | flag_V = 0; |
11133 | flag_NotZ = res; |
11134 | flag_N = res >> 8; |
11135 | adr = AREG((Opcode >> 9) & 7); |
11136 | AREG((Opcode >> 9) & 7) += 2; |
11137 | PRE_IO |
11138 | WRITE_WORD_F(adr, res) |
11139 | POST_IO |
11140 | RET(8) |
11141 | } |
11142 | |
11143 | // MOVEW |
11144 | OPCODE(0x3100) |
11145 | { |
11146 | u32 adr, res; |
11147 | u32 src, dst; |
11148 | |
11149 | res = DREGu16((Opcode >> 0) & 7); |
11150 | flag_C = 0; |
11151 | flag_V = 0; |
11152 | flag_NotZ = res; |
11153 | flag_N = res >> 8; |
11154 | adr = AREG((Opcode >> 9) & 7) - 2; |
11155 | AREG((Opcode >> 9) & 7) = adr; |
11156 | PRE_IO |
11157 | WRITE_WORD_F(adr, res) |
11158 | POST_IO |
11159 | RET(8) |
11160 | } |
11161 | |
11162 | // MOVEW |
11163 | OPCODE(0x3140) |
11164 | { |
11165 | u32 adr, res; |
11166 | u32 src, dst; |
11167 | |
11168 | res = DREGu16((Opcode >> 0) & 7); |
11169 | flag_C = 0; |
11170 | flag_V = 0; |
11171 | flag_NotZ = res; |
11172 | flag_N = res >> 8; |
11173 | FETCH_SWORD(adr); |
11174 | adr += AREG((Opcode >> 9) & 7); |
11175 | PRE_IO |
11176 | WRITE_WORD_F(adr, res) |
11177 | POST_IO |
11178 | RET(12) |
11179 | } |
11180 | |
11181 | // MOVEW |
11182 | OPCODE(0x3180) |
11183 | { |
11184 | u32 adr, res; |
11185 | u32 src, dst; |
11186 | |
11187 | res = DREGu16((Opcode >> 0) & 7); |
11188 | flag_C = 0; |
11189 | flag_V = 0; |
11190 | flag_NotZ = res; |
11191 | flag_N = res >> 8; |
11192 | adr = AREG((Opcode >> 9) & 7); |
11193 | DECODE_EXT_WORD |
11194 | PRE_IO |
11195 | WRITE_WORD_F(adr, res) |
11196 | POST_IO |
11197 | RET(14) |
11198 | } |
11199 | |
11200 | // MOVEW |
11201 | OPCODE(0x31C0) |
11202 | { |
11203 | u32 adr, res; |
11204 | u32 src, dst; |
11205 | |
11206 | res = DREGu16((Opcode >> 0) & 7); |
11207 | flag_C = 0; |
11208 | flag_V = 0; |
11209 | flag_NotZ = res; |
11210 | flag_N = res >> 8; |
11211 | FETCH_SWORD(adr); |
11212 | PRE_IO |
11213 | WRITE_WORD_F(adr, res) |
11214 | POST_IO |
11215 | RET(12) |
11216 | } |
11217 | |
11218 | // MOVEW |
11219 | OPCODE(0x33C0) |
11220 | { |
11221 | u32 adr, res; |
11222 | u32 src, dst; |
11223 | |
11224 | res = DREGu16((Opcode >> 0) & 7); |
11225 | flag_C = 0; |
11226 | flag_V = 0; |
11227 | flag_NotZ = res; |
11228 | flag_N = res >> 8; |
11229 | FETCH_LONG(adr); |
11230 | PRE_IO |
11231 | WRITE_WORD_F(adr, res) |
11232 | POST_IO |
11233 | RET(16) |
11234 | } |
11235 | |
11236 | // MOVEW |
11237 | OPCODE(0x3EC0) |
11238 | { |
11239 | u32 adr, res; |
11240 | u32 src, dst; |
11241 | |
11242 | res = DREGu16((Opcode >> 0) & 7); |
11243 | flag_C = 0; |
11244 | flag_V = 0; |
11245 | flag_NotZ = res; |
11246 | flag_N = res >> 8; |
11247 | adr = AREG(7); |
11248 | AREG(7) += 2; |
11249 | PRE_IO |
11250 | WRITE_WORD_F(adr, res) |
11251 | POST_IO |
11252 | RET(8) |
11253 | } |
11254 | |
11255 | // MOVEW |
11256 | OPCODE(0x3F00) |
11257 | { |
11258 | u32 adr, res; |
11259 | u32 src, dst; |
11260 | |
11261 | res = DREGu16((Opcode >> 0) & 7); |
11262 | flag_C = 0; |
11263 | flag_V = 0; |
11264 | flag_NotZ = res; |
11265 | flag_N = res >> 8; |
11266 | adr = AREG(7) - 2; |
11267 | AREG(7) = adr; |
11268 | PRE_IO |
11269 | WRITE_WORD_F(adr, res) |
11270 | POST_IO |
11271 | RET(8) |
11272 | } |
11273 | |
11274 | // MOVEW |
11275 | OPCODE(0x3008) |
11276 | { |
11277 | u32 adr, res; |
11278 | u32 src, dst; |
11279 | |
11280 | res = AREGu16((Opcode >> 0) & 7); |
11281 | flag_C = 0; |
11282 | flag_V = 0; |
11283 | flag_NotZ = res; |
11284 | flag_N = res >> 8; |
11285 | DREGu16((Opcode >> 9) & 7) = res; |
11286 | RET(4) |
11287 | } |
11288 | |
11289 | // MOVEW |
11290 | OPCODE(0x3088) |
11291 | { |
11292 | u32 adr, res; |
11293 | u32 src, dst; |
11294 | |
11295 | res = AREGu16((Opcode >> 0) & 7); |
11296 | flag_C = 0; |
11297 | flag_V = 0; |
11298 | flag_NotZ = res; |
11299 | flag_N = res >> 8; |
11300 | adr = AREG((Opcode >> 9) & 7); |
11301 | PRE_IO |
11302 | WRITE_WORD_F(adr, res) |
11303 | POST_IO |
11304 | RET(8) |
11305 | } |
11306 | |
11307 | // MOVEW |
11308 | OPCODE(0x30C8) |
11309 | { |
11310 | u32 adr, res; |
11311 | u32 src, dst; |
11312 | |
11313 | res = AREGu16((Opcode >> 0) & 7); |
11314 | flag_C = 0; |
11315 | flag_V = 0; |
11316 | flag_NotZ = res; |
11317 | flag_N = res >> 8; |
11318 | adr = AREG((Opcode >> 9) & 7); |
11319 | AREG((Opcode >> 9) & 7) += 2; |
11320 | PRE_IO |
11321 | WRITE_WORD_F(adr, res) |
11322 | POST_IO |
11323 | RET(8) |
11324 | } |
11325 | |
11326 | // MOVEW |
11327 | OPCODE(0x3108) |
11328 | { |
11329 | u32 adr, res; |
11330 | u32 src, dst; |
11331 | |
11332 | res = AREGu16((Opcode >> 0) & 7); |
11333 | flag_C = 0; |
11334 | flag_V = 0; |
11335 | flag_NotZ = res; |
11336 | flag_N = res >> 8; |
11337 | adr = AREG((Opcode >> 9) & 7) - 2; |
11338 | AREG((Opcode >> 9) & 7) = adr; |
11339 | PRE_IO |
11340 | WRITE_WORD_F(adr, res) |
11341 | POST_IO |
11342 | RET(8) |
11343 | } |
11344 | |
11345 | // MOVEW |
11346 | OPCODE(0x3148) |
11347 | { |
11348 | u32 adr, res; |
11349 | u32 src, dst; |
11350 | |
11351 | res = AREGu16((Opcode >> 0) & 7); |
11352 | flag_C = 0; |
11353 | flag_V = 0; |
11354 | flag_NotZ = res; |
11355 | flag_N = res >> 8; |
11356 | FETCH_SWORD(adr); |
11357 | adr += AREG((Opcode >> 9) & 7); |
11358 | PRE_IO |
11359 | WRITE_WORD_F(adr, res) |
11360 | POST_IO |
11361 | RET(12) |
11362 | } |
11363 | |
11364 | // MOVEW |
11365 | OPCODE(0x3188) |
11366 | { |
11367 | u32 adr, res; |
11368 | u32 src, dst; |
11369 | |
11370 | res = AREGu16((Opcode >> 0) & 7); |
11371 | flag_C = 0; |
11372 | flag_V = 0; |
11373 | flag_NotZ = res; |
11374 | flag_N = res >> 8; |
11375 | adr = AREG((Opcode >> 9) & 7); |
11376 | DECODE_EXT_WORD |
11377 | PRE_IO |
11378 | WRITE_WORD_F(adr, res) |
11379 | POST_IO |
11380 | RET(14) |
11381 | } |
11382 | |
11383 | // MOVEW |
11384 | OPCODE(0x31C8) |
11385 | { |
11386 | u32 adr, res; |
11387 | u32 src, dst; |
11388 | |
11389 | res = AREGu16((Opcode >> 0) & 7); |
11390 | flag_C = 0; |
11391 | flag_V = 0; |
11392 | flag_NotZ = res; |
11393 | flag_N = res >> 8; |
11394 | FETCH_SWORD(adr); |
11395 | PRE_IO |
11396 | WRITE_WORD_F(adr, res) |
11397 | POST_IO |
11398 | RET(12) |
11399 | } |
11400 | |
11401 | // MOVEW |
11402 | OPCODE(0x33C8) |
11403 | { |
11404 | u32 adr, res; |
11405 | u32 src, dst; |
11406 | |
11407 | res = AREGu16((Opcode >> 0) & 7); |
11408 | flag_C = 0; |
11409 | flag_V = 0; |
11410 | flag_NotZ = res; |
11411 | flag_N = res >> 8; |
11412 | FETCH_LONG(adr); |
11413 | PRE_IO |
11414 | WRITE_WORD_F(adr, res) |
11415 | POST_IO |
11416 | RET(16) |
11417 | } |
11418 | |
11419 | // MOVEW |
11420 | OPCODE(0x3EC8) |
11421 | { |
11422 | u32 adr, res; |
11423 | u32 src, dst; |
11424 | |
11425 | res = AREGu16((Opcode >> 0) & 7); |
11426 | flag_C = 0; |
11427 | flag_V = 0; |
11428 | flag_NotZ = res; |
11429 | flag_N = res >> 8; |
11430 | adr = AREG(7); |
11431 | AREG(7) += 2; |
11432 | PRE_IO |
11433 | WRITE_WORD_F(adr, res) |
11434 | POST_IO |
11435 | RET(8) |
11436 | } |
11437 | |
11438 | // MOVEW |
11439 | OPCODE(0x3F08) |
11440 | { |
11441 | u32 adr, res; |
11442 | u32 src, dst; |
11443 | |
11444 | res = AREGu16((Opcode >> 0) & 7); |
11445 | flag_C = 0; |
11446 | flag_V = 0; |
11447 | flag_NotZ = res; |
11448 | flag_N = res >> 8; |
11449 | adr = AREG(7) - 2; |
11450 | AREG(7) = adr; |
11451 | PRE_IO |
11452 | WRITE_WORD_F(adr, res) |
11453 | POST_IO |
11454 | RET(8) |
11455 | } |
11456 | |
11457 | // MOVEW |
11458 | OPCODE(0x3010) |
11459 | { |
11460 | u32 adr, res; |
11461 | u32 src, dst; |
11462 | |
11463 | adr = AREG((Opcode >> 0) & 7); |
11464 | PRE_IO |
11465 | READ_WORD_F(adr, res) |
11466 | flag_C = 0; |
11467 | flag_V = 0; |
11468 | flag_NotZ = res; |
11469 | flag_N = res >> 8; |
11470 | DREGu16((Opcode >> 9) & 7) = res; |
11471 | POST_IO |
11472 | RET(8) |
11473 | } |
11474 | |
11475 | // MOVEW |
11476 | OPCODE(0x3090) |
11477 | { |
11478 | u32 adr, res; |
11479 | u32 src, dst; |
11480 | |
11481 | adr = AREG((Opcode >> 0) & 7); |
11482 | PRE_IO |
11483 | READ_WORD_F(adr, res) |
11484 | flag_C = 0; |
11485 | flag_V = 0; |
11486 | flag_NotZ = res; |
11487 | flag_N = res >> 8; |
11488 | adr = AREG((Opcode >> 9) & 7); |
11489 | WRITE_WORD_F(adr, res) |
11490 | POST_IO |
11491 | RET(12) |
11492 | } |
11493 | |
11494 | // MOVEW |
11495 | OPCODE(0x30D0) |
11496 | { |
11497 | u32 adr, res; |
11498 | u32 src, dst; |
11499 | |
11500 | adr = AREG((Opcode >> 0) & 7); |
11501 | PRE_IO |
11502 | READ_WORD_F(adr, res) |
11503 | flag_C = 0; |
11504 | flag_V = 0; |
11505 | flag_NotZ = res; |
11506 | flag_N = res >> 8; |
11507 | adr = AREG((Opcode >> 9) & 7); |
11508 | AREG((Opcode >> 9) & 7) += 2; |
11509 | WRITE_WORD_F(adr, res) |
11510 | POST_IO |
11511 | RET(12) |
11512 | } |
11513 | |
11514 | // MOVEW |
11515 | OPCODE(0x3110) |
11516 | { |
11517 | u32 adr, res; |
11518 | u32 src, dst; |
11519 | |
11520 | adr = AREG((Opcode >> 0) & 7); |
11521 | PRE_IO |
11522 | READ_WORD_F(adr, res) |
11523 | flag_C = 0; |
11524 | flag_V = 0; |
11525 | flag_NotZ = res; |
11526 | flag_N = res >> 8; |
11527 | adr = AREG((Opcode >> 9) & 7) - 2; |
11528 | AREG((Opcode >> 9) & 7) = adr; |
11529 | WRITE_WORD_F(adr, res) |
11530 | POST_IO |
11531 | RET(12) |
11532 | } |
11533 | |
11534 | // MOVEW |
11535 | OPCODE(0x3150) |
11536 | { |
11537 | u32 adr, res; |
11538 | u32 src, dst; |
11539 | |
11540 | adr = AREG((Opcode >> 0) & 7); |
11541 | PRE_IO |
11542 | READ_WORD_F(adr, res) |
11543 | flag_C = 0; |
11544 | flag_V = 0; |
11545 | flag_NotZ = res; |
11546 | flag_N = res >> 8; |
11547 | FETCH_SWORD(adr); |
11548 | adr += AREG((Opcode >> 9) & 7); |
11549 | WRITE_WORD_F(adr, res) |
11550 | POST_IO |
11551 | RET(16) |
11552 | } |
11553 | |
11554 | // MOVEW |
11555 | OPCODE(0x3190) |
11556 | { |
11557 | u32 adr, res; |
11558 | u32 src, dst; |
11559 | |
11560 | adr = AREG((Opcode >> 0) & 7); |
11561 | PRE_IO |
11562 | READ_WORD_F(adr, res) |
11563 | flag_C = 0; |
11564 | flag_V = 0; |
11565 | flag_NotZ = res; |
11566 | flag_N = res >> 8; |
11567 | adr = AREG((Opcode >> 9) & 7); |
11568 | DECODE_EXT_WORD |
11569 | WRITE_WORD_F(adr, res) |
11570 | POST_IO |
11571 | RET(18) |
11572 | } |
11573 | |
11574 | // MOVEW |
11575 | OPCODE(0x31D0) |
11576 | { |
11577 | u32 adr, res; |
11578 | u32 src, dst; |
11579 | |
11580 | adr = AREG((Opcode >> 0) & 7); |
11581 | PRE_IO |
11582 | READ_WORD_F(adr, res) |
11583 | flag_C = 0; |
11584 | flag_V = 0; |
11585 | flag_NotZ = res; |
11586 | flag_N = res >> 8; |
11587 | FETCH_SWORD(adr); |
11588 | WRITE_WORD_F(adr, res) |
11589 | POST_IO |
11590 | RET(16) |
11591 | } |
11592 | |
11593 | // MOVEW |
11594 | OPCODE(0x33D0) |
11595 | { |
11596 | u32 adr, res; |
11597 | u32 src, dst; |
11598 | |
11599 | adr = AREG((Opcode >> 0) & 7); |
11600 | PRE_IO |
11601 | READ_WORD_F(adr, res) |
11602 | flag_C = 0; |
11603 | flag_V = 0; |
11604 | flag_NotZ = res; |
11605 | flag_N = res >> 8; |
11606 | FETCH_LONG(adr); |
11607 | WRITE_WORD_F(adr, res) |
11608 | POST_IO |
11609 | RET(20) |
11610 | } |
11611 | |
11612 | // MOVEW |
11613 | OPCODE(0x3ED0) |
11614 | { |
11615 | u32 adr, res; |
11616 | u32 src, dst; |
11617 | |
11618 | adr = AREG((Opcode >> 0) & 7); |
11619 | PRE_IO |
11620 | READ_WORD_F(adr, res) |
11621 | flag_C = 0; |
11622 | flag_V = 0; |
11623 | flag_NotZ = res; |
11624 | flag_N = res >> 8; |
11625 | adr = AREG(7); |
11626 | AREG(7) += 2; |
11627 | WRITE_WORD_F(adr, res) |
11628 | POST_IO |
11629 | RET(12) |
11630 | } |
11631 | |
11632 | // MOVEW |
11633 | OPCODE(0x3F10) |
11634 | { |
11635 | u32 adr, res; |
11636 | u32 src, dst; |
11637 | |
11638 | adr = AREG((Opcode >> 0) & 7); |
11639 | PRE_IO |
11640 | READ_WORD_F(adr, res) |
11641 | flag_C = 0; |
11642 | flag_V = 0; |
11643 | flag_NotZ = res; |
11644 | flag_N = res >> 8; |
11645 | adr = AREG(7) - 2; |
11646 | AREG(7) = adr; |
11647 | WRITE_WORD_F(adr, res) |
11648 | POST_IO |
11649 | RET(12) |
11650 | } |
11651 | |
11652 | // MOVEW |
11653 | OPCODE(0x3018) |
11654 | { |
11655 | u32 adr, res; |
11656 | u32 src, dst; |
11657 | |
11658 | adr = AREG((Opcode >> 0) & 7); |
11659 | AREG((Opcode >> 0) & 7) += 2; |
11660 | PRE_IO |
11661 | READ_WORD_F(adr, res) |
11662 | flag_C = 0; |
11663 | flag_V = 0; |
11664 | flag_NotZ = res; |
11665 | flag_N = res >> 8; |
11666 | DREGu16((Opcode >> 9) & 7) = res; |
11667 | POST_IO |
11668 | RET(8) |
11669 | } |
11670 | |
11671 | // MOVEW |
11672 | OPCODE(0x3098) |
11673 | { |
11674 | u32 adr, res; |
11675 | u32 src, dst; |
11676 | |
11677 | adr = AREG((Opcode >> 0) & 7); |
11678 | AREG((Opcode >> 0) & 7) += 2; |
11679 | PRE_IO |
11680 | READ_WORD_F(adr, res) |
11681 | flag_C = 0; |
11682 | flag_V = 0; |
11683 | flag_NotZ = res; |
11684 | flag_N = res >> 8; |
11685 | adr = AREG((Opcode >> 9) & 7); |
11686 | WRITE_WORD_F(adr, res) |
11687 | POST_IO |
11688 | RET(12) |
11689 | } |
11690 | |
11691 | // MOVEW |
11692 | OPCODE(0x30D8) |
11693 | { |
11694 | u32 adr, res; |
11695 | u32 src, dst; |
11696 | |
11697 | adr = AREG((Opcode >> 0) & 7); |
11698 | AREG((Opcode >> 0) & 7) += 2; |
11699 | PRE_IO |
11700 | READ_WORD_F(adr, res) |
11701 | flag_C = 0; |
11702 | flag_V = 0; |
11703 | flag_NotZ = res; |
11704 | flag_N = res >> 8; |
11705 | adr = AREG((Opcode >> 9) & 7); |
11706 | AREG((Opcode >> 9) & 7) += 2; |
11707 | WRITE_WORD_F(adr, res) |
11708 | POST_IO |
11709 | RET(12) |
11710 | } |
11711 | |
11712 | // MOVEW |
11713 | OPCODE(0x3118) |
11714 | { |
11715 | u32 adr, res; |
11716 | u32 src, dst; |
11717 | |
11718 | adr = AREG((Opcode >> 0) & 7); |
11719 | AREG((Opcode >> 0) & 7) += 2; |
11720 | PRE_IO |
11721 | READ_WORD_F(adr, res) |
11722 | flag_C = 0; |
11723 | flag_V = 0; |
11724 | flag_NotZ = res; |
11725 | flag_N = res >> 8; |
11726 | adr = AREG((Opcode >> 9) & 7) - 2; |
11727 | AREG((Opcode >> 9) & 7) = adr; |
11728 | WRITE_WORD_F(adr, res) |
11729 | POST_IO |
11730 | RET(12) |
11731 | } |
11732 | |
11733 | // MOVEW |
11734 | OPCODE(0x3158) |
11735 | { |
11736 | u32 adr, res; |
11737 | u32 src, dst; |
11738 | |
11739 | adr = AREG((Opcode >> 0) & 7); |
11740 | AREG((Opcode >> 0) & 7) += 2; |
11741 | PRE_IO |
11742 | READ_WORD_F(adr, res) |
11743 | flag_C = 0; |
11744 | flag_V = 0; |
11745 | flag_NotZ = res; |
11746 | flag_N = res >> 8; |
11747 | FETCH_SWORD(adr); |
11748 | adr += AREG((Opcode >> 9) & 7); |
11749 | WRITE_WORD_F(adr, res) |
11750 | POST_IO |
11751 | RET(16) |
11752 | } |
11753 | |
11754 | // MOVEW |
11755 | OPCODE(0x3198) |
11756 | { |
11757 | u32 adr, res; |
11758 | u32 src, dst; |
11759 | |
11760 | adr = AREG((Opcode >> 0) & 7); |
11761 | AREG((Opcode >> 0) & 7) += 2; |
11762 | PRE_IO |
11763 | READ_WORD_F(adr, res) |
11764 | flag_C = 0; |
11765 | flag_V = 0; |
11766 | flag_NotZ = res; |
11767 | flag_N = res >> 8; |
11768 | adr = AREG((Opcode >> 9) & 7); |
11769 | DECODE_EXT_WORD |
11770 | WRITE_WORD_F(adr, res) |
11771 | POST_IO |
11772 | RET(18) |
11773 | } |
11774 | |
11775 | // MOVEW |
11776 | OPCODE(0x31D8) |
11777 | { |
11778 | u32 adr, res; |
11779 | u32 src, dst; |
11780 | |
11781 | adr = AREG((Opcode >> 0) & 7); |
11782 | AREG((Opcode >> 0) & 7) += 2; |
11783 | PRE_IO |
11784 | READ_WORD_F(adr, res) |
11785 | flag_C = 0; |
11786 | flag_V = 0; |
11787 | flag_NotZ = res; |
11788 | flag_N = res >> 8; |
11789 | FETCH_SWORD(adr); |
11790 | WRITE_WORD_F(adr, res) |
11791 | POST_IO |
11792 | RET(16) |
11793 | } |
11794 | |
11795 | // MOVEW |
11796 | OPCODE(0x33D8) |
11797 | { |
11798 | u32 adr, res; |
11799 | u32 src, dst; |
11800 | |
11801 | adr = AREG((Opcode >> 0) & 7); |
11802 | AREG((Opcode >> 0) & 7) += 2; |
11803 | PRE_IO |
11804 | READ_WORD_F(adr, res) |
11805 | flag_C = 0; |
11806 | flag_V = 0; |
11807 | flag_NotZ = res; |
11808 | flag_N = res >> 8; |
11809 | FETCH_LONG(adr); |
11810 | WRITE_WORD_F(adr, res) |
11811 | POST_IO |
11812 | RET(20) |
11813 | } |
11814 | |
11815 | // MOVEW |
11816 | OPCODE(0x3ED8) |
11817 | { |
11818 | u32 adr, res; |
11819 | u32 src, dst; |
11820 | |
11821 | adr = AREG((Opcode >> 0) & 7); |
11822 | AREG((Opcode >> 0) & 7) += 2; |
11823 | PRE_IO |
11824 | READ_WORD_F(adr, res) |
11825 | flag_C = 0; |
11826 | flag_V = 0; |
11827 | flag_NotZ = res; |
11828 | flag_N = res >> 8; |
11829 | adr = AREG(7); |
11830 | AREG(7) += 2; |
11831 | WRITE_WORD_F(adr, res) |
11832 | POST_IO |
11833 | RET(12) |
11834 | } |
11835 | |
11836 | // MOVEW |
11837 | OPCODE(0x3F18) |
11838 | { |
11839 | u32 adr, res; |
11840 | u32 src, dst; |
11841 | |
11842 | adr = AREG((Opcode >> 0) & 7); |
11843 | AREG((Opcode >> 0) & 7) += 2; |
11844 | PRE_IO |
11845 | READ_WORD_F(adr, res) |
11846 | flag_C = 0; |
11847 | flag_V = 0; |
11848 | flag_NotZ = res; |
11849 | flag_N = res >> 8; |
11850 | adr = AREG(7) - 2; |
11851 | AREG(7) = adr; |
11852 | WRITE_WORD_F(adr, res) |
11853 | POST_IO |
11854 | RET(12) |
11855 | } |
11856 | |
11857 | // MOVEW |
11858 | OPCODE(0x3020) |
11859 | { |
11860 | u32 adr, res; |
11861 | u32 src, dst; |
11862 | |
11863 | adr = AREG((Opcode >> 0) & 7) - 2; |
11864 | AREG((Opcode >> 0) & 7) = adr; |
11865 | PRE_IO |
11866 | READ_WORD_F(adr, res) |
11867 | flag_C = 0; |
11868 | flag_V = 0; |
11869 | flag_NotZ = res; |
11870 | flag_N = res >> 8; |
11871 | DREGu16((Opcode >> 9) & 7) = res; |
11872 | POST_IO |
11873 | RET(10) |
11874 | } |
11875 | |
11876 | // MOVEW |
11877 | OPCODE(0x30A0) |
11878 | { |
11879 | u32 adr, res; |
11880 | u32 src, dst; |
11881 | |
11882 | adr = AREG((Opcode >> 0) & 7) - 2; |
11883 | AREG((Opcode >> 0) & 7) = adr; |
11884 | PRE_IO |
11885 | READ_WORD_F(adr, res) |
11886 | flag_C = 0; |
11887 | flag_V = 0; |
11888 | flag_NotZ = res; |
11889 | flag_N = res >> 8; |
11890 | adr = AREG((Opcode >> 9) & 7); |
11891 | WRITE_WORD_F(adr, res) |
11892 | POST_IO |
11893 | RET(14) |
11894 | } |
11895 | |
11896 | // MOVEW |
11897 | OPCODE(0x30E0) |
11898 | { |
11899 | u32 adr, res; |
11900 | u32 src, dst; |
11901 | |
11902 | adr = AREG((Opcode >> 0) & 7) - 2; |
11903 | AREG((Opcode >> 0) & 7) = adr; |
11904 | PRE_IO |
11905 | READ_WORD_F(adr, res) |
11906 | flag_C = 0; |
11907 | flag_V = 0; |
11908 | flag_NotZ = res; |
11909 | flag_N = res >> 8; |
11910 | adr = AREG((Opcode >> 9) & 7); |
11911 | AREG((Opcode >> 9) & 7) += 2; |
11912 | WRITE_WORD_F(adr, res) |
11913 | POST_IO |
11914 | RET(14) |
11915 | } |
11916 | |
11917 | // MOVEW |
11918 | OPCODE(0x3120) |
11919 | { |
11920 | u32 adr, res; |
11921 | u32 src, dst; |
11922 | |
11923 | adr = AREG((Opcode >> 0) & 7) - 2; |
11924 | AREG((Opcode >> 0) & 7) = adr; |
11925 | PRE_IO |
11926 | READ_WORD_F(adr, res) |
11927 | flag_C = 0; |
11928 | flag_V = 0; |
11929 | flag_NotZ = res; |
11930 | flag_N = res >> 8; |
11931 | adr = AREG((Opcode >> 9) & 7) - 2; |
11932 | AREG((Opcode >> 9) & 7) = adr; |
11933 | WRITE_WORD_F(adr, res) |
11934 | POST_IO |
11935 | RET(14) |
11936 | } |
11937 | |
11938 | // MOVEW |
11939 | OPCODE(0x3160) |
11940 | { |
11941 | u32 adr, res; |
11942 | u32 src, dst; |
11943 | |
11944 | adr = AREG((Opcode >> 0) & 7) - 2; |
11945 | AREG((Opcode >> 0) & 7) = adr; |
11946 | PRE_IO |
11947 | READ_WORD_F(adr, res) |
11948 | flag_C = 0; |
11949 | flag_V = 0; |
11950 | flag_NotZ = res; |
11951 | flag_N = res >> 8; |
11952 | FETCH_SWORD(adr); |
11953 | adr += AREG((Opcode >> 9) & 7); |
11954 | WRITE_WORD_F(adr, res) |
11955 | POST_IO |
11956 | RET(18) |
11957 | } |
11958 | |
11959 | // MOVEW |
11960 | OPCODE(0x31A0) |
11961 | { |
11962 | u32 adr, res; |
11963 | u32 src, dst; |
11964 | |
11965 | adr = AREG((Opcode >> 0) & 7) - 2; |
11966 | AREG((Opcode >> 0) & 7) = adr; |
11967 | PRE_IO |
11968 | READ_WORD_F(adr, res) |
11969 | flag_C = 0; |
11970 | flag_V = 0; |
11971 | flag_NotZ = res; |
11972 | flag_N = res >> 8; |
11973 | adr = AREG((Opcode >> 9) & 7); |
11974 | DECODE_EXT_WORD |
11975 | WRITE_WORD_F(adr, res) |
11976 | POST_IO |
11977 | RET(20) |
11978 | } |
11979 | |
11980 | // MOVEW |
11981 | OPCODE(0x31E0) |
11982 | { |
11983 | u32 adr, res; |
11984 | u32 src, dst; |
11985 | |
11986 | adr = AREG((Opcode >> 0) & 7) - 2; |
11987 | AREG((Opcode >> 0) & 7) = adr; |
11988 | PRE_IO |
11989 | READ_WORD_F(adr, res) |
11990 | flag_C = 0; |
11991 | flag_V = 0; |
11992 | flag_NotZ = res; |
11993 | flag_N = res >> 8; |
11994 | FETCH_SWORD(adr); |
11995 | WRITE_WORD_F(adr, res) |
11996 | POST_IO |
11997 | RET(18) |
11998 | } |
11999 | |
12000 | // MOVEW |
12001 | OPCODE(0x33E0) |
12002 | { |
12003 | u32 adr, res; |
12004 | u32 src, dst; |
12005 | |
12006 | adr = AREG((Opcode >> 0) & 7) - 2; |
12007 | AREG((Opcode >> 0) & 7) = adr; |
12008 | PRE_IO |
12009 | READ_WORD_F(adr, res) |
12010 | flag_C = 0; |
12011 | flag_V = 0; |
12012 | flag_NotZ = res; |
12013 | flag_N = res >> 8; |
12014 | FETCH_LONG(adr); |
12015 | WRITE_WORD_F(adr, res) |
12016 | POST_IO |
12017 | RET(22) |
12018 | } |
12019 | |
12020 | // MOVEW |
12021 | OPCODE(0x3EE0) |
12022 | { |
12023 | u32 adr, res; |
12024 | u32 src, dst; |
12025 | |
12026 | adr = AREG((Opcode >> 0) & 7) - 2; |
12027 | AREG((Opcode >> 0) & 7) = adr; |
12028 | PRE_IO |
12029 | READ_WORD_F(adr, res) |
12030 | flag_C = 0; |
12031 | flag_V = 0; |
12032 | flag_NotZ = res; |
12033 | flag_N = res >> 8; |
12034 | adr = AREG(7); |
12035 | AREG(7) += 2; |
12036 | WRITE_WORD_F(adr, res) |
12037 | POST_IO |
12038 | RET(14) |
12039 | } |
12040 | |
12041 | // MOVEW |
12042 | OPCODE(0x3F20) |
12043 | { |
12044 | u32 adr, res; |
12045 | u32 src, dst; |
12046 | |
12047 | adr = AREG((Opcode >> 0) & 7) - 2; |
12048 | AREG((Opcode >> 0) & 7) = adr; |
12049 | PRE_IO |
12050 | READ_WORD_F(adr, res) |
12051 | flag_C = 0; |
12052 | flag_V = 0; |
12053 | flag_NotZ = res; |
12054 | flag_N = res >> 8; |
12055 | adr = AREG(7) - 2; |
12056 | AREG(7) = adr; |
12057 | WRITE_WORD_F(adr, res) |
12058 | POST_IO |
12059 | RET(14) |
12060 | } |
12061 | |
12062 | // MOVEW |
12063 | OPCODE(0x3028) |
12064 | { |
12065 | u32 adr, res; |
12066 | u32 src, dst; |
12067 | |
12068 | FETCH_SWORD(adr); |
12069 | adr += AREG((Opcode >> 0) & 7); |
12070 | PRE_IO |
12071 | READ_WORD_F(adr, res) |
12072 | flag_C = 0; |
12073 | flag_V = 0; |
12074 | flag_NotZ = res; |
12075 | flag_N = res >> 8; |
12076 | DREGu16((Opcode >> 9) & 7) = res; |
12077 | POST_IO |
12078 | RET(12) |
12079 | } |
12080 | |
12081 | // MOVEW |
12082 | OPCODE(0x30A8) |
12083 | { |
12084 | u32 adr, res; |
12085 | u32 src, dst; |
12086 | |
12087 | FETCH_SWORD(adr); |
12088 | adr += AREG((Opcode >> 0) & 7); |
12089 | PRE_IO |
12090 | READ_WORD_F(adr, res) |
12091 | flag_C = 0; |
12092 | flag_V = 0; |
12093 | flag_NotZ = res; |
12094 | flag_N = res >> 8; |
12095 | adr = AREG((Opcode >> 9) & 7); |
12096 | WRITE_WORD_F(adr, res) |
12097 | POST_IO |
12098 | RET(16) |
12099 | } |
12100 | |
12101 | // MOVEW |
12102 | OPCODE(0x30E8) |
12103 | { |
12104 | u32 adr, res; |
12105 | u32 src, dst; |
12106 | |
12107 | FETCH_SWORD(adr); |
12108 | adr += AREG((Opcode >> 0) & 7); |
12109 | PRE_IO |
12110 | READ_WORD_F(adr, res) |
12111 | flag_C = 0; |
12112 | flag_V = 0; |
12113 | flag_NotZ = res; |
12114 | flag_N = res >> 8; |
12115 | adr = AREG((Opcode >> 9) & 7); |
12116 | AREG((Opcode >> 9) & 7) += 2; |
12117 | WRITE_WORD_F(adr, res) |
12118 | POST_IO |
12119 | RET(16) |
12120 | } |
12121 | |
12122 | // MOVEW |
12123 | OPCODE(0x3128) |
12124 | { |
12125 | u32 adr, res; |
12126 | u32 src, dst; |
12127 | |
12128 | FETCH_SWORD(adr); |
12129 | adr += AREG((Opcode >> 0) & 7); |
12130 | PRE_IO |
12131 | READ_WORD_F(adr, res) |
12132 | flag_C = 0; |
12133 | flag_V = 0; |
12134 | flag_NotZ = res; |
12135 | flag_N = res >> 8; |
12136 | adr = AREG((Opcode >> 9) & 7) - 2; |
12137 | AREG((Opcode >> 9) & 7) = adr; |
12138 | WRITE_WORD_F(adr, res) |
12139 | POST_IO |
12140 | RET(16) |
12141 | } |
12142 | |
12143 | // MOVEW |
12144 | OPCODE(0x3168) |
12145 | { |
12146 | u32 adr, res; |
12147 | u32 src, dst; |
12148 | |
12149 | FETCH_SWORD(adr); |
12150 | adr += AREG((Opcode >> 0) & 7); |
12151 | PRE_IO |
12152 | READ_WORD_F(adr, res) |
12153 | flag_C = 0; |
12154 | flag_V = 0; |
12155 | flag_NotZ = res; |
12156 | flag_N = res >> 8; |
12157 | FETCH_SWORD(adr); |
12158 | adr += AREG((Opcode >> 9) & 7); |
12159 | WRITE_WORD_F(adr, res) |
12160 | POST_IO |
12161 | RET(20) |
12162 | } |
12163 | |
12164 | // MOVEW |
12165 | OPCODE(0x31A8) |
12166 | { |
12167 | u32 adr, res; |
12168 | u32 src, dst; |
12169 | |
12170 | FETCH_SWORD(adr); |
12171 | adr += AREG((Opcode >> 0) & 7); |
12172 | PRE_IO |
12173 | READ_WORD_F(adr, res) |
12174 | flag_C = 0; |
12175 | flag_V = 0; |
12176 | flag_NotZ = res; |
12177 | flag_N = res >> 8; |
12178 | adr = AREG((Opcode >> 9) & 7); |
12179 | DECODE_EXT_WORD |
12180 | WRITE_WORD_F(adr, res) |
12181 | POST_IO |
12182 | RET(22) |
12183 | } |
12184 | |
12185 | // MOVEW |
12186 | OPCODE(0x31E8) |
12187 | { |
12188 | u32 adr, res; |
12189 | u32 src, dst; |
12190 | |
12191 | FETCH_SWORD(adr); |
12192 | adr += AREG((Opcode >> 0) & 7); |
12193 | PRE_IO |
12194 | READ_WORD_F(adr, res) |
12195 | flag_C = 0; |
12196 | flag_V = 0; |
12197 | flag_NotZ = res; |
12198 | flag_N = res >> 8; |
12199 | FETCH_SWORD(adr); |
12200 | WRITE_WORD_F(adr, res) |
12201 | POST_IO |
12202 | RET(20) |
12203 | } |
12204 | |
12205 | // MOVEW |
12206 | OPCODE(0x33E8) |
12207 | { |
12208 | u32 adr, res; |
12209 | u32 src, dst; |
12210 | |
12211 | FETCH_SWORD(adr); |
12212 | adr += AREG((Opcode >> 0) & 7); |
12213 | PRE_IO |
12214 | READ_WORD_F(adr, res) |
12215 | flag_C = 0; |
12216 | flag_V = 0; |
12217 | flag_NotZ = res; |
12218 | flag_N = res >> 8; |
12219 | FETCH_LONG(adr); |
12220 | WRITE_WORD_F(adr, res) |
12221 | POST_IO |
12222 | RET(24) |
12223 | } |
12224 | |
12225 | // MOVEW |
12226 | OPCODE(0x3EE8) |
12227 | { |
12228 | u32 adr, res; |
12229 | u32 src, dst; |
12230 | |
12231 | FETCH_SWORD(adr); |
12232 | adr += AREG((Opcode >> 0) & 7); |
12233 | PRE_IO |
12234 | READ_WORD_F(adr, res) |
12235 | flag_C = 0; |
12236 | flag_V = 0; |
12237 | flag_NotZ = res; |
12238 | flag_N = res >> 8; |
12239 | adr = AREG(7); |
12240 | AREG(7) += 2; |
12241 | WRITE_WORD_F(adr, res) |
12242 | POST_IO |
12243 | RET(16) |
12244 | } |
12245 | |
12246 | // MOVEW |
12247 | OPCODE(0x3F28) |
12248 | { |
12249 | u32 adr, res; |
12250 | u32 src, dst; |
12251 | |
12252 | FETCH_SWORD(adr); |
12253 | adr += AREG((Opcode >> 0) & 7); |
12254 | PRE_IO |
12255 | READ_WORD_F(adr, res) |
12256 | flag_C = 0; |
12257 | flag_V = 0; |
12258 | flag_NotZ = res; |
12259 | flag_N = res >> 8; |
12260 | adr = AREG(7) - 2; |
12261 | AREG(7) = adr; |
12262 | WRITE_WORD_F(adr, res) |
12263 | POST_IO |
12264 | RET(16) |
12265 | } |
12266 | |
12267 | // MOVEW |
12268 | OPCODE(0x3030) |
12269 | { |
12270 | u32 adr, res; |
12271 | u32 src, dst; |
12272 | |
12273 | adr = AREG((Opcode >> 0) & 7); |
12274 | DECODE_EXT_WORD |
12275 | PRE_IO |
12276 | READ_WORD_F(adr, res) |
12277 | flag_C = 0; |
12278 | flag_V = 0; |
12279 | flag_NotZ = res; |
12280 | flag_N = res >> 8; |
12281 | DREGu16((Opcode >> 9) & 7) = res; |
12282 | POST_IO |
12283 | RET(14) |
12284 | } |
12285 | |
12286 | // MOVEW |
12287 | OPCODE(0x30B0) |
12288 | { |
12289 | u32 adr, res; |
12290 | u32 src, dst; |
12291 | |
12292 | adr = AREG((Opcode >> 0) & 7); |
12293 | DECODE_EXT_WORD |
12294 | PRE_IO |
12295 | READ_WORD_F(adr, res) |
12296 | flag_C = 0; |
12297 | flag_V = 0; |
12298 | flag_NotZ = res; |
12299 | flag_N = res >> 8; |
12300 | adr = AREG((Opcode >> 9) & 7); |
12301 | WRITE_WORD_F(adr, res) |
12302 | POST_IO |
12303 | RET(18) |
12304 | } |
12305 | |
12306 | // MOVEW |
12307 | OPCODE(0x30F0) |
12308 | { |
12309 | u32 adr, res; |
12310 | u32 src, dst; |
12311 | |
12312 | adr = AREG((Opcode >> 0) & 7); |
12313 | DECODE_EXT_WORD |
12314 | PRE_IO |
12315 | READ_WORD_F(adr, res) |
12316 | flag_C = 0; |
12317 | flag_V = 0; |
12318 | flag_NotZ = res; |
12319 | flag_N = res >> 8; |
12320 | adr = AREG((Opcode >> 9) & 7); |
12321 | AREG((Opcode >> 9) & 7) += 2; |
12322 | WRITE_WORD_F(adr, res) |
12323 | POST_IO |
12324 | RET(18) |
12325 | } |
12326 | |
12327 | // MOVEW |
12328 | OPCODE(0x3130) |
12329 | { |
12330 | u32 adr, res; |
12331 | u32 src, dst; |
12332 | |
12333 | adr = AREG((Opcode >> 0) & 7); |
12334 | DECODE_EXT_WORD |
12335 | PRE_IO |
12336 | READ_WORD_F(adr, res) |
12337 | flag_C = 0; |
12338 | flag_V = 0; |
12339 | flag_NotZ = res; |
12340 | flag_N = res >> 8; |
12341 | adr = AREG((Opcode >> 9) & 7) - 2; |
12342 | AREG((Opcode >> 9) & 7) = adr; |
12343 | WRITE_WORD_F(adr, res) |
12344 | POST_IO |
12345 | RET(18) |
12346 | } |
12347 | |
12348 | // MOVEW |
12349 | OPCODE(0x3170) |
12350 | { |
12351 | u32 adr, res; |
12352 | u32 src, dst; |
12353 | |
12354 | adr = AREG((Opcode >> 0) & 7); |
12355 | DECODE_EXT_WORD |
12356 | PRE_IO |
12357 | READ_WORD_F(adr, res) |
12358 | flag_C = 0; |
12359 | flag_V = 0; |
12360 | flag_NotZ = res; |
12361 | flag_N = res >> 8; |
12362 | FETCH_SWORD(adr); |
12363 | adr += AREG((Opcode >> 9) & 7); |
12364 | WRITE_WORD_F(adr, res) |
12365 | POST_IO |
12366 | RET(22) |
12367 | } |
12368 | |
12369 | // MOVEW |
12370 | OPCODE(0x31B0) |
12371 | { |
12372 | u32 adr, res; |
12373 | u32 src, dst; |
12374 | |
12375 | adr = AREG((Opcode >> 0) & 7); |
12376 | DECODE_EXT_WORD |
12377 | PRE_IO |
12378 | READ_WORD_F(adr, res) |
12379 | flag_C = 0; |
12380 | flag_V = 0; |
12381 | flag_NotZ = res; |
12382 | flag_N = res >> 8; |
12383 | adr = AREG((Opcode >> 9) & 7); |
12384 | DECODE_EXT_WORD |
12385 | WRITE_WORD_F(adr, res) |
12386 | POST_IO |
12387 | RET(24) |
12388 | } |
12389 | |
12390 | // MOVEW |
12391 | OPCODE(0x31F0) |
12392 | { |
12393 | u32 adr, res; |
12394 | u32 src, dst; |
12395 | |
12396 | adr = AREG((Opcode >> 0) & 7); |
12397 | DECODE_EXT_WORD |
12398 | PRE_IO |
12399 | READ_WORD_F(adr, res) |
12400 | flag_C = 0; |
12401 | flag_V = 0; |
12402 | flag_NotZ = res; |
12403 | flag_N = res >> 8; |
12404 | FETCH_SWORD(adr); |
12405 | WRITE_WORD_F(adr, res) |
12406 | POST_IO |
12407 | RET(22) |
12408 | } |
12409 | |
12410 | // MOVEW |
12411 | OPCODE(0x33F0) |
12412 | { |
12413 | u32 adr, res; |
12414 | u32 src, dst; |
12415 | |
12416 | adr = AREG((Opcode >> 0) & 7); |
12417 | DECODE_EXT_WORD |
12418 | PRE_IO |
12419 | READ_WORD_F(adr, res) |
12420 | flag_C = 0; |
12421 | flag_V = 0; |
12422 | flag_NotZ = res; |
12423 | flag_N = res >> 8; |
12424 | FETCH_LONG(adr); |
12425 | WRITE_WORD_F(adr, res) |
12426 | POST_IO |
12427 | RET(26) |
12428 | } |
12429 | |
12430 | // MOVEW |
12431 | OPCODE(0x3EF0) |
12432 | { |
12433 | u32 adr, res; |
12434 | u32 src, dst; |
12435 | |
12436 | adr = AREG((Opcode >> 0) & 7); |
12437 | DECODE_EXT_WORD |
12438 | PRE_IO |
12439 | READ_WORD_F(adr, res) |
12440 | flag_C = 0; |
12441 | flag_V = 0; |
12442 | flag_NotZ = res; |
12443 | flag_N = res >> 8; |
12444 | adr = AREG(7); |
12445 | AREG(7) += 2; |
12446 | WRITE_WORD_F(adr, res) |
12447 | POST_IO |
12448 | RET(18) |
12449 | } |
12450 | |
12451 | // MOVEW |
12452 | OPCODE(0x3F30) |
12453 | { |
12454 | u32 adr, res; |
12455 | u32 src, dst; |
12456 | |
12457 | adr = AREG((Opcode >> 0) & 7); |
12458 | DECODE_EXT_WORD |
12459 | PRE_IO |
12460 | READ_WORD_F(adr, res) |
12461 | flag_C = 0; |
12462 | flag_V = 0; |
12463 | flag_NotZ = res; |
12464 | flag_N = res >> 8; |
12465 | adr = AREG(7) - 2; |
12466 | AREG(7) = adr; |
12467 | WRITE_WORD_F(adr, res) |
12468 | POST_IO |
12469 | RET(18) |
12470 | } |
12471 | |
12472 | // MOVEW |
12473 | OPCODE(0x3038) |
12474 | { |
12475 | u32 adr, res; |
12476 | u32 src, dst; |
12477 | |
12478 | FETCH_SWORD(adr); |
12479 | PRE_IO |
12480 | READ_WORD_F(adr, res) |
12481 | flag_C = 0; |
12482 | flag_V = 0; |
12483 | flag_NotZ = res; |
12484 | flag_N = res >> 8; |
12485 | DREGu16((Opcode >> 9) & 7) = res; |
12486 | POST_IO |
12487 | RET(12) |
12488 | } |
12489 | |
12490 | // MOVEW |
12491 | OPCODE(0x30B8) |
12492 | { |
12493 | u32 adr, res; |
12494 | u32 src, dst; |
12495 | |
12496 | FETCH_SWORD(adr); |
12497 | PRE_IO |
12498 | READ_WORD_F(adr, res) |
12499 | flag_C = 0; |
12500 | flag_V = 0; |
12501 | flag_NotZ = res; |
12502 | flag_N = res >> 8; |
12503 | adr = AREG((Opcode >> 9) & 7); |
12504 | WRITE_WORD_F(adr, res) |
12505 | POST_IO |
12506 | RET(16) |
12507 | } |
12508 | |
12509 | // MOVEW |
12510 | OPCODE(0x30F8) |
12511 | { |
12512 | u32 adr, res; |
12513 | u32 src, dst; |
12514 | |
12515 | FETCH_SWORD(adr); |
12516 | PRE_IO |
12517 | READ_WORD_F(adr, res) |
12518 | flag_C = 0; |
12519 | flag_V = 0; |
12520 | flag_NotZ = res; |
12521 | flag_N = res >> 8; |
12522 | adr = AREG((Opcode >> 9) & 7); |
12523 | AREG((Opcode >> 9) & 7) += 2; |
12524 | WRITE_WORD_F(adr, res) |
12525 | POST_IO |
12526 | RET(16) |
12527 | } |
12528 | |
12529 | // MOVEW |
12530 | OPCODE(0x3138) |
12531 | { |
12532 | u32 adr, res; |
12533 | u32 src, dst; |
12534 | |
12535 | FETCH_SWORD(adr); |
12536 | PRE_IO |
12537 | READ_WORD_F(adr, res) |
12538 | flag_C = 0; |
12539 | flag_V = 0; |
12540 | flag_NotZ = res; |
12541 | flag_N = res >> 8; |
12542 | adr = AREG((Opcode >> 9) & 7) - 2; |
12543 | AREG((Opcode >> 9) & 7) = adr; |
12544 | WRITE_WORD_F(adr, res) |
12545 | POST_IO |
12546 | RET(16) |
12547 | } |
12548 | |
12549 | // MOVEW |
12550 | OPCODE(0x3178) |
12551 | { |
12552 | u32 adr, res; |
12553 | u32 src, dst; |
12554 | |
12555 | FETCH_SWORD(adr); |
12556 | PRE_IO |
12557 | READ_WORD_F(adr, res) |
12558 | flag_C = 0; |
12559 | flag_V = 0; |
12560 | flag_NotZ = res; |
12561 | flag_N = res >> 8; |
12562 | FETCH_SWORD(adr); |
12563 | adr += AREG((Opcode >> 9) & 7); |
12564 | WRITE_WORD_F(adr, res) |
12565 | POST_IO |
12566 | RET(20) |
12567 | } |
12568 | |
12569 | // MOVEW |
12570 | OPCODE(0x31B8) |
12571 | { |
12572 | u32 adr, res; |
12573 | u32 src, dst; |
12574 | |
12575 | FETCH_SWORD(adr); |
12576 | PRE_IO |
12577 | READ_WORD_F(adr, res) |
12578 | flag_C = 0; |
12579 | flag_V = 0; |
12580 | flag_NotZ = res; |
12581 | flag_N = res >> 8; |
12582 | adr = AREG((Opcode >> 9) & 7); |
12583 | DECODE_EXT_WORD |
12584 | WRITE_WORD_F(adr, res) |
12585 | POST_IO |
12586 | RET(22) |
12587 | } |
12588 | |
12589 | // MOVEW |
12590 | OPCODE(0x31F8) |
12591 | { |
12592 | u32 adr, res; |
12593 | u32 src, dst; |
12594 | |
12595 | FETCH_SWORD(adr); |
12596 | PRE_IO |
12597 | READ_WORD_F(adr, res) |
12598 | flag_C = 0; |
12599 | flag_V = 0; |
12600 | flag_NotZ = res; |
12601 | flag_N = res >> 8; |
12602 | FETCH_SWORD(adr); |
12603 | WRITE_WORD_F(adr, res) |
12604 | POST_IO |
12605 | RET(20) |
12606 | } |
12607 | |
12608 | // MOVEW |
12609 | OPCODE(0x33F8) |
12610 | { |
12611 | u32 adr, res; |
12612 | u32 src, dst; |
12613 | |
12614 | FETCH_SWORD(adr); |
12615 | PRE_IO |
12616 | READ_WORD_F(adr, res) |
12617 | flag_C = 0; |
12618 | flag_V = 0; |
12619 | flag_NotZ = res; |
12620 | flag_N = res >> 8; |
12621 | FETCH_LONG(adr); |
12622 | WRITE_WORD_F(adr, res) |
12623 | POST_IO |
12624 | RET(24) |
12625 | } |
12626 | |
12627 | // MOVEW |
12628 | OPCODE(0x3EF8) |
12629 | { |
12630 | u32 adr, res; |
12631 | u32 src, dst; |
12632 | |
12633 | FETCH_SWORD(adr); |
12634 | PRE_IO |
12635 | READ_WORD_F(adr, res) |
12636 | flag_C = 0; |
12637 | flag_V = 0; |
12638 | flag_NotZ = res; |
12639 | flag_N = res >> 8; |
12640 | adr = AREG(7); |
12641 | AREG(7) += 2; |
12642 | WRITE_WORD_F(adr, res) |
12643 | POST_IO |
12644 | RET(16) |
12645 | } |
12646 | |
12647 | // MOVEW |
12648 | OPCODE(0x3F38) |
12649 | { |
12650 | u32 adr, res; |
12651 | u32 src, dst; |
12652 | |
12653 | FETCH_SWORD(adr); |
12654 | PRE_IO |
12655 | READ_WORD_F(adr, res) |
12656 | flag_C = 0; |
12657 | flag_V = 0; |
12658 | flag_NotZ = res; |
12659 | flag_N = res >> 8; |
12660 | adr = AREG(7) - 2; |
12661 | AREG(7) = adr; |
12662 | WRITE_WORD_F(adr, res) |
12663 | POST_IO |
12664 | RET(16) |
12665 | } |
12666 | |
12667 | // MOVEW |
12668 | OPCODE(0x3039) |
12669 | { |
12670 | u32 adr, res; |
12671 | u32 src, dst; |
12672 | |
12673 | FETCH_LONG(adr); |
12674 | PRE_IO |
12675 | READ_WORD_F(adr, res) |
12676 | flag_C = 0; |
12677 | flag_V = 0; |
12678 | flag_NotZ = res; |
12679 | flag_N = res >> 8; |
12680 | DREGu16((Opcode >> 9) & 7) = res; |
12681 | POST_IO |
12682 | RET(16) |
12683 | } |
12684 | |
12685 | // MOVEW |
12686 | OPCODE(0x30B9) |
12687 | { |
12688 | u32 adr, res; |
12689 | u32 src, dst; |
12690 | |
12691 | FETCH_LONG(adr); |
12692 | PRE_IO |
12693 | READ_WORD_F(adr, res) |
12694 | flag_C = 0; |
12695 | flag_V = 0; |
12696 | flag_NotZ = res; |
12697 | flag_N = res >> 8; |
12698 | adr = AREG((Opcode >> 9) & 7); |
12699 | WRITE_WORD_F(adr, res) |
12700 | POST_IO |
12701 | RET(20) |
12702 | } |
12703 | |
12704 | // MOVEW |
12705 | OPCODE(0x30F9) |
12706 | { |
12707 | u32 adr, res; |
12708 | u32 src, dst; |
12709 | |
12710 | FETCH_LONG(adr); |
12711 | PRE_IO |
12712 | READ_WORD_F(adr, res) |
12713 | flag_C = 0; |
12714 | flag_V = 0; |
12715 | flag_NotZ = res; |
12716 | flag_N = res >> 8; |
12717 | adr = AREG((Opcode >> 9) & 7); |
12718 | AREG((Opcode >> 9) & 7) += 2; |
12719 | WRITE_WORD_F(adr, res) |
12720 | POST_IO |
12721 | RET(20) |
12722 | } |
12723 | |
12724 | // MOVEW |
12725 | OPCODE(0x3139) |
12726 | { |
12727 | u32 adr, res; |
12728 | u32 src, dst; |
12729 | |
12730 | FETCH_LONG(adr); |
12731 | PRE_IO |
12732 | READ_WORD_F(adr, res) |
12733 | flag_C = 0; |
12734 | flag_V = 0; |
12735 | flag_NotZ = res; |
12736 | flag_N = res >> 8; |
12737 | adr = AREG((Opcode >> 9) & 7) - 2; |
12738 | AREG((Opcode >> 9) & 7) = adr; |
12739 | WRITE_WORD_F(adr, res) |
12740 | POST_IO |
12741 | RET(20) |
12742 | } |
12743 | |
12744 | // MOVEW |
12745 | OPCODE(0x3179) |
12746 | { |
12747 | u32 adr, res; |
12748 | u32 src, dst; |
12749 | |
12750 | FETCH_LONG(adr); |
12751 | PRE_IO |
12752 | READ_WORD_F(adr, res) |
12753 | flag_C = 0; |
12754 | flag_V = 0; |
12755 | flag_NotZ = res; |
12756 | flag_N = res >> 8; |
12757 | FETCH_SWORD(adr); |
12758 | adr += AREG((Opcode >> 9) & 7); |
12759 | WRITE_WORD_F(adr, res) |
12760 | POST_IO |
12761 | RET(24) |
12762 | } |
12763 | |
12764 | // MOVEW |
12765 | OPCODE(0x31B9) |
12766 | { |
12767 | u32 adr, res; |
12768 | u32 src, dst; |
12769 | |
12770 | FETCH_LONG(adr); |
12771 | PRE_IO |
12772 | READ_WORD_F(adr, res) |
12773 | flag_C = 0; |
12774 | flag_V = 0; |
12775 | flag_NotZ = res; |
12776 | flag_N = res >> 8; |
12777 | adr = AREG((Opcode >> 9) & 7); |
12778 | DECODE_EXT_WORD |
12779 | WRITE_WORD_F(adr, res) |
12780 | POST_IO |
12781 | RET(26) |
12782 | } |
12783 | |
12784 | // MOVEW |
12785 | OPCODE(0x31F9) |
12786 | { |
12787 | u32 adr, res; |
12788 | u32 src, dst; |
12789 | |
12790 | FETCH_LONG(adr); |
12791 | PRE_IO |
12792 | READ_WORD_F(adr, res) |
12793 | flag_C = 0; |
12794 | flag_V = 0; |
12795 | flag_NotZ = res; |
12796 | flag_N = res >> 8; |
12797 | FETCH_SWORD(adr); |
12798 | WRITE_WORD_F(adr, res) |
12799 | POST_IO |
12800 | RET(24) |
12801 | } |
12802 | |
12803 | // MOVEW |
12804 | OPCODE(0x33F9) |
12805 | { |
12806 | u32 adr, res; |
12807 | u32 src, dst; |
12808 | |
12809 | FETCH_LONG(adr); |
12810 | PRE_IO |
12811 | READ_WORD_F(adr, res) |
12812 | flag_C = 0; |
12813 | flag_V = 0; |
12814 | flag_NotZ = res; |
12815 | flag_N = res >> 8; |
12816 | FETCH_LONG(adr); |
12817 | WRITE_WORD_F(adr, res) |
12818 | POST_IO |
12819 | RET(28) |
12820 | } |
12821 | |
12822 | // MOVEW |
12823 | OPCODE(0x3EF9) |
12824 | { |
12825 | u32 adr, res; |
12826 | u32 src, dst; |
12827 | |
12828 | FETCH_LONG(adr); |
12829 | PRE_IO |
12830 | READ_WORD_F(adr, res) |
12831 | flag_C = 0; |
12832 | flag_V = 0; |
12833 | flag_NotZ = res; |
12834 | flag_N = res >> 8; |
12835 | adr = AREG(7); |
12836 | AREG(7) += 2; |
12837 | WRITE_WORD_F(adr, res) |
12838 | POST_IO |
12839 | RET(20) |
12840 | } |
12841 | |
12842 | // MOVEW |
12843 | OPCODE(0x3F39) |
12844 | { |
12845 | u32 adr, res; |
12846 | u32 src, dst; |
12847 | |
12848 | FETCH_LONG(adr); |
12849 | PRE_IO |
12850 | READ_WORD_F(adr, res) |
12851 | flag_C = 0; |
12852 | flag_V = 0; |
12853 | flag_NotZ = res; |
12854 | flag_N = res >> 8; |
12855 | adr = AREG(7) - 2; |
12856 | AREG(7) = adr; |
12857 | WRITE_WORD_F(adr, res) |
12858 | POST_IO |
12859 | RET(20) |
12860 | } |
12861 | |
12862 | // MOVEW |
12863 | OPCODE(0x303A) |
12864 | { |
12865 | u32 adr, res; |
12866 | u32 src, dst; |
12867 | |
be26eb23 |
12868 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12869 | PC++; |
12870 | PRE_IO |
12871 | READ_WORD_F(adr, res) |
12872 | flag_C = 0; |
12873 | flag_V = 0; |
12874 | flag_NotZ = res; |
12875 | flag_N = res >> 8; |
12876 | DREGu16((Opcode >> 9) & 7) = res; |
12877 | POST_IO |
12878 | RET(12) |
12879 | } |
12880 | |
12881 | // MOVEW |
12882 | OPCODE(0x30BA) |
12883 | { |
12884 | u32 adr, res; |
12885 | u32 src, dst; |
12886 | |
be26eb23 |
12887 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12888 | PC++; |
12889 | PRE_IO |
12890 | READ_WORD_F(adr, res) |
12891 | flag_C = 0; |
12892 | flag_V = 0; |
12893 | flag_NotZ = res; |
12894 | flag_N = res >> 8; |
12895 | adr = AREG((Opcode >> 9) & 7); |
12896 | WRITE_WORD_F(adr, res) |
12897 | POST_IO |
12898 | RET(16) |
12899 | } |
12900 | |
12901 | // MOVEW |
12902 | OPCODE(0x30FA) |
12903 | { |
12904 | u32 adr, res; |
12905 | u32 src, dst; |
12906 | |
be26eb23 |
12907 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12908 | PC++; |
12909 | PRE_IO |
12910 | READ_WORD_F(adr, res) |
12911 | flag_C = 0; |
12912 | flag_V = 0; |
12913 | flag_NotZ = res; |
12914 | flag_N = res >> 8; |
12915 | adr = AREG((Opcode >> 9) & 7); |
12916 | AREG((Opcode >> 9) & 7) += 2; |
12917 | WRITE_WORD_F(adr, res) |
12918 | POST_IO |
12919 | RET(16) |
12920 | } |
12921 | |
12922 | // MOVEW |
12923 | OPCODE(0x313A) |
12924 | { |
12925 | u32 adr, res; |
12926 | u32 src, dst; |
12927 | |
be26eb23 |
12928 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12929 | PC++; |
12930 | PRE_IO |
12931 | READ_WORD_F(adr, res) |
12932 | flag_C = 0; |
12933 | flag_V = 0; |
12934 | flag_NotZ = res; |
12935 | flag_N = res >> 8; |
12936 | adr = AREG((Opcode >> 9) & 7) - 2; |
12937 | AREG((Opcode >> 9) & 7) = adr; |
12938 | WRITE_WORD_F(adr, res) |
12939 | POST_IO |
12940 | RET(16) |
12941 | } |
12942 | |
12943 | // MOVEW |
12944 | OPCODE(0x317A) |
12945 | { |
12946 | u32 adr, res; |
12947 | u32 src, dst; |
12948 | |
be26eb23 |
12949 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12950 | PC++; |
12951 | PRE_IO |
12952 | READ_WORD_F(adr, res) |
12953 | flag_C = 0; |
12954 | flag_V = 0; |
12955 | flag_NotZ = res; |
12956 | flag_N = res >> 8; |
12957 | FETCH_SWORD(adr); |
12958 | adr += AREG((Opcode >> 9) & 7); |
12959 | WRITE_WORD_F(adr, res) |
12960 | POST_IO |
12961 | RET(20) |
12962 | } |
12963 | |
12964 | // MOVEW |
12965 | OPCODE(0x31BA) |
12966 | { |
12967 | u32 adr, res; |
12968 | u32 src, dst; |
12969 | |
be26eb23 |
12970 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12971 | PC++; |
12972 | PRE_IO |
12973 | READ_WORD_F(adr, res) |
12974 | flag_C = 0; |
12975 | flag_V = 0; |
12976 | flag_NotZ = res; |
12977 | flag_N = res >> 8; |
12978 | adr = AREG((Opcode >> 9) & 7); |
12979 | DECODE_EXT_WORD |
12980 | WRITE_WORD_F(adr, res) |
12981 | POST_IO |
12982 | RET(22) |
12983 | } |
12984 | |
12985 | // MOVEW |
12986 | OPCODE(0x31FA) |
12987 | { |
12988 | u32 adr, res; |
12989 | u32 src, dst; |
12990 | |
be26eb23 |
12991 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12992 | PC++; |
12993 | PRE_IO |
12994 | READ_WORD_F(adr, res) |
12995 | flag_C = 0; |
12996 | flag_V = 0; |
12997 | flag_NotZ = res; |
12998 | flag_N = res >> 8; |
12999 | FETCH_SWORD(adr); |
13000 | WRITE_WORD_F(adr, res) |
13001 | POST_IO |
13002 | RET(20) |
13003 | } |
13004 | |
13005 | // MOVEW |
13006 | OPCODE(0x33FA) |
13007 | { |
13008 | u32 adr, res; |
13009 | u32 src, dst; |
13010 | |
be26eb23 |
13011 | adr = GET_SWORD + GET_PC; |
70357ce5 |
13012 | PC++; |
13013 | PRE_IO |
13014 | READ_WORD_F(adr, res) |
13015 | flag_C = 0; |
13016 | flag_V = 0; |
13017 | flag_NotZ = res; |
13018 | flag_N = res >> 8; |
13019 | FETCH_LONG(adr); |
13020 | WRITE_WORD_F(adr, res) |
13021 | POST_IO |
13022 | RET(24) |
13023 | } |
13024 | |
13025 | // MOVEW |
13026 | OPCODE(0x3EFA) |
13027 | { |
13028 | u32 adr, res; |
13029 | u32 src, dst; |
13030 | |
be26eb23 |
13031 | adr = GET_SWORD + GET_PC; |
70357ce5 |
13032 | PC++; |
13033 | PRE_IO |
13034 | READ_WORD_F(adr, res) |
13035 | flag_C = 0; |
13036 | flag_V = 0; |
13037 | flag_NotZ = res; |
13038 | flag_N = res >> 8; |
13039 | adr = AREG(7); |
13040 | AREG(7) += 2; |
13041 | WRITE_WORD_F(adr, res) |
13042 | POST_IO |
13043 | RET(16) |
13044 | } |
13045 | |
13046 | // MOVEW |
13047 | OPCODE(0x3F3A) |
13048 | { |
13049 | u32 adr, res; |
13050 | u32 src, dst; |
13051 | |
be26eb23 |
13052 | adr = GET_SWORD + GET_PC; |
70357ce5 |
13053 | PC++; |
13054 | PRE_IO |
13055 | READ_WORD_F(adr, res) |
13056 | flag_C = 0; |
13057 | flag_V = 0; |
13058 | flag_NotZ = res; |
13059 | flag_N = res >> 8; |
13060 | adr = AREG(7) - 2; |
13061 | AREG(7) = adr; |
13062 | WRITE_WORD_F(adr, res) |
13063 | POST_IO |
13064 | RET(16) |
13065 | } |
13066 | |
13067 | // MOVEW |
13068 | OPCODE(0x303B) |
13069 | { |
13070 | u32 adr, res; |
13071 | u32 src, dst; |
13072 | |
be26eb23 |
13073 | adr = GET_PC; |
70357ce5 |
13074 | DECODE_EXT_WORD |
13075 | PRE_IO |
13076 | READ_WORD_F(adr, res) |
13077 | flag_C = 0; |
13078 | flag_V = 0; |
13079 | flag_NotZ = res; |
13080 | flag_N = res >> 8; |
13081 | DREGu16((Opcode >> 9) & 7) = res; |
13082 | POST_IO |
13083 | RET(14) |
13084 | } |
13085 | |
13086 | // MOVEW |
13087 | OPCODE(0x30BB) |
13088 | { |
13089 | u32 adr, res; |
13090 | u32 src, dst; |
13091 | |
be26eb23 |
13092 | adr = GET_PC; |
70357ce5 |
13093 | DECODE_EXT_WORD |
13094 | PRE_IO |
13095 | READ_WORD_F(adr, res) |
13096 | flag_C = 0; |
13097 | flag_V = 0; |
13098 | flag_NotZ = res; |
13099 | flag_N = res >> 8; |
13100 | adr = AREG((Opcode >> 9) & 7); |
13101 | WRITE_WORD_F(adr, res) |
13102 | POST_IO |
13103 | RET(18) |
13104 | } |
13105 | |
13106 | // MOVEW |
13107 | OPCODE(0x30FB) |
13108 | { |
13109 | u32 adr, res; |
13110 | u32 src, dst; |
13111 | |
be26eb23 |
13112 | adr = GET_PC; |
70357ce5 |
13113 | DECODE_EXT_WORD |
13114 | PRE_IO |
13115 | READ_WORD_F(adr, res) |
13116 | flag_C = 0; |
13117 | flag_V = 0; |
13118 | flag_NotZ = res; |
13119 | flag_N = res >> 8; |
13120 | adr = AREG((Opcode >> 9) & 7); |
13121 | AREG((Opcode >> 9) & 7) += 2; |
13122 | WRITE_WORD_F(adr, res) |
13123 | POST_IO |
13124 | RET(18) |
13125 | } |
13126 | |
13127 | // MOVEW |
13128 | OPCODE(0x313B) |
13129 | { |
13130 | u32 adr, res; |
13131 | u32 src, dst; |
13132 | |
be26eb23 |
13133 | adr = GET_PC; |
70357ce5 |
13134 | DECODE_EXT_WORD |
13135 | PRE_IO |
13136 | READ_WORD_F(adr, res) |
13137 | flag_C = 0; |
13138 | flag_V = 0; |
13139 | flag_NotZ = res; |
13140 | flag_N = res >> 8; |
13141 | adr = AREG((Opcode >> 9) & 7) - 2; |
13142 | AREG((Opcode >> 9) & 7) = adr; |
13143 | WRITE_WORD_F(adr, res) |
13144 | POST_IO |
13145 | RET(18) |
13146 | } |
13147 | |
13148 | // MOVEW |
13149 | OPCODE(0x317B) |
13150 | { |
13151 | u32 adr, res; |
13152 | u32 src, dst; |
13153 | |
be26eb23 |
13154 | adr = GET_PC; |
70357ce5 |
13155 | DECODE_EXT_WORD |
13156 | PRE_IO |
13157 | READ_WORD_F(adr, res) |
13158 | flag_C = 0; |
13159 | flag_V = 0; |
13160 | flag_NotZ = res; |
13161 | flag_N = res >> 8; |
13162 | FETCH_SWORD(adr); |
13163 | adr += AREG((Opcode >> 9) & 7); |
13164 | WRITE_WORD_F(adr, res) |
13165 | POST_IO |
13166 | RET(22) |
13167 | } |
13168 | |
13169 | // MOVEW |
13170 | OPCODE(0x31BB) |
13171 | { |
13172 | u32 adr, res; |
13173 | u32 src, dst; |
13174 | |
be26eb23 |
13175 | adr = GET_PC; |
70357ce5 |
13176 | DECODE_EXT_WORD |
13177 | PRE_IO |
13178 | READ_WORD_F(adr, res) |
13179 | flag_C = 0; |
13180 | flag_V = 0; |
13181 | flag_NotZ = res; |
13182 | flag_N = res >> 8; |
13183 | adr = AREG((Opcode >> 9) & 7); |
13184 | DECODE_EXT_WORD |
13185 | WRITE_WORD_F(adr, res) |
13186 | POST_IO |
13187 | RET(24) |
13188 | } |
13189 | |
13190 | // MOVEW |
13191 | OPCODE(0x31FB) |
13192 | { |
13193 | u32 adr, res; |
13194 | u32 src, dst; |
13195 | |
be26eb23 |
13196 | adr = GET_PC; |
70357ce5 |
13197 | DECODE_EXT_WORD |
13198 | PRE_IO |
13199 | READ_WORD_F(adr, res) |
13200 | flag_C = 0; |
13201 | flag_V = 0; |
13202 | flag_NotZ = res; |
13203 | flag_N = res >> 8; |
13204 | FETCH_SWORD(adr); |
13205 | WRITE_WORD_F(adr, res) |
13206 | POST_IO |
13207 | RET(22) |
13208 | } |
13209 | |
13210 | // MOVEW |
13211 | OPCODE(0x33FB) |
13212 | { |
13213 | u32 adr, res; |
13214 | u32 src, dst; |
13215 | |
be26eb23 |
13216 | adr = GET_PC; |
70357ce5 |
13217 | DECODE_EXT_WORD |
13218 | PRE_IO |
13219 | READ_WORD_F(adr, res) |
13220 | flag_C = 0; |
13221 | flag_V = 0; |
13222 | flag_NotZ = res; |
13223 | flag_N = res >> 8; |
13224 | FETCH_LONG(adr); |
13225 | WRITE_WORD_F(adr, res) |
13226 | POST_IO |
13227 | RET(26) |
13228 | } |
13229 | |
13230 | // MOVEW |
13231 | OPCODE(0x3EFB) |
13232 | { |
13233 | u32 adr, res; |
13234 | u32 src, dst; |
13235 | |
be26eb23 |
13236 | adr = GET_PC; |
70357ce5 |
13237 | DECODE_EXT_WORD |
13238 | PRE_IO |
13239 | READ_WORD_F(adr, res) |
13240 | flag_C = 0; |
13241 | flag_V = 0; |
13242 | flag_NotZ = res; |
13243 | flag_N = res >> 8; |
13244 | adr = AREG(7); |
13245 | AREG(7) += 2; |
13246 | WRITE_WORD_F(adr, res) |
13247 | POST_IO |
13248 | RET(18) |
13249 | } |
13250 | |
13251 | // MOVEW |
13252 | OPCODE(0x3F3B) |
13253 | { |
13254 | u32 adr, res; |
13255 | u32 src, dst; |
13256 | |
be26eb23 |
13257 | adr = GET_PC; |
70357ce5 |
13258 | DECODE_EXT_WORD |
13259 | PRE_IO |
13260 | READ_WORD_F(adr, res) |
13261 | flag_C = 0; |
13262 | flag_V = 0; |
13263 | flag_NotZ = res; |
13264 | flag_N = res >> 8; |
13265 | adr = AREG(7) - 2; |
13266 | AREG(7) = adr; |
13267 | WRITE_WORD_F(adr, res) |
13268 | POST_IO |
13269 | RET(18) |
13270 | } |
13271 | |
13272 | // MOVEW |
13273 | OPCODE(0x303C) |
13274 | { |
13275 | u32 adr, res; |
13276 | u32 src, dst; |
13277 | |
13278 | FETCH_WORD(res); |
13279 | flag_C = 0; |
13280 | flag_V = 0; |
13281 | flag_NotZ = res; |
13282 | flag_N = res >> 8; |
13283 | DREGu16((Opcode >> 9) & 7) = res; |
13284 | RET(8) |
13285 | } |
13286 | |
13287 | // MOVEW |
13288 | OPCODE(0x30BC) |
13289 | { |
13290 | u32 adr, res; |
13291 | u32 src, dst; |
13292 | |
13293 | FETCH_WORD(res); |
13294 | flag_C = 0; |
13295 | flag_V = 0; |
13296 | flag_NotZ = res; |
13297 | flag_N = res >> 8; |
13298 | adr = AREG((Opcode >> 9) & 7); |
13299 | PRE_IO |
13300 | WRITE_WORD_F(adr, res) |
13301 | POST_IO |
13302 | RET(12) |
13303 | } |
13304 | |
13305 | // MOVEW |
13306 | OPCODE(0x30FC) |
13307 | { |
13308 | u32 adr, res; |
13309 | u32 src, dst; |
13310 | |
13311 | FETCH_WORD(res); |
13312 | flag_C = 0; |
13313 | flag_V = 0; |
13314 | flag_NotZ = res; |
13315 | flag_N = res >> 8; |
13316 | adr = AREG((Opcode >> 9) & 7); |
13317 | AREG((Opcode >> 9) & 7) += 2; |
13318 | PRE_IO |
13319 | WRITE_WORD_F(adr, res) |
13320 | POST_IO |
13321 | RET(12) |
13322 | } |
13323 | |
13324 | // MOVEW |
13325 | OPCODE(0x313C) |
13326 | { |
13327 | u32 adr, res; |
13328 | u32 src, dst; |
13329 | |
13330 | FETCH_WORD(res); |
13331 | flag_C = 0; |
13332 | flag_V = 0; |
13333 | flag_NotZ = res; |
13334 | flag_N = res >> 8; |
13335 | adr = AREG((Opcode >> 9) & 7) - 2; |
13336 | AREG((Opcode >> 9) & 7) = adr; |
13337 | PRE_IO |
13338 | WRITE_WORD_F(adr, res) |
13339 | POST_IO |
13340 | RET(12) |
13341 | } |
13342 | |
13343 | // MOVEW |
13344 | OPCODE(0x317C) |
13345 | { |
13346 | u32 adr, res; |
13347 | u32 src, dst; |
13348 | |
13349 | FETCH_WORD(res); |
13350 | flag_C = 0; |
13351 | flag_V = 0; |
13352 | flag_NotZ = res; |
13353 | flag_N = res >> 8; |
13354 | FETCH_SWORD(adr); |
13355 | adr += AREG((Opcode >> 9) & 7); |
13356 | PRE_IO |
13357 | WRITE_WORD_F(adr, res) |
13358 | POST_IO |
13359 | RET(16) |
13360 | } |
13361 | |
13362 | // MOVEW |
13363 | OPCODE(0x31BC) |
13364 | { |
13365 | u32 adr, res; |
13366 | u32 src, dst; |
13367 | |
13368 | FETCH_WORD(res); |
13369 | flag_C = 0; |
13370 | flag_V = 0; |
13371 | flag_NotZ = res; |
13372 | flag_N = res >> 8; |
13373 | adr = AREG((Opcode >> 9) & 7); |
13374 | DECODE_EXT_WORD |
13375 | PRE_IO |
13376 | WRITE_WORD_F(adr, res) |
13377 | POST_IO |
13378 | RET(18) |
13379 | } |
13380 | |
13381 | // MOVEW |
13382 | OPCODE(0x31FC) |
13383 | { |
13384 | u32 adr, res; |
13385 | u32 src, dst; |
13386 | |
13387 | FETCH_WORD(res); |
13388 | flag_C = 0; |
13389 | flag_V = 0; |
13390 | flag_NotZ = res; |
13391 | flag_N = res >> 8; |
13392 | FETCH_SWORD(adr); |
13393 | PRE_IO |
13394 | WRITE_WORD_F(adr, res) |
13395 | POST_IO |
13396 | RET(16) |
13397 | } |
13398 | |
13399 | // MOVEW |
13400 | OPCODE(0x33FC) |
13401 | { |
13402 | u32 adr, res; |
13403 | u32 src, dst; |
13404 | |
13405 | FETCH_WORD(res); |
13406 | flag_C = 0; |
13407 | flag_V = 0; |
13408 | flag_NotZ = res; |
13409 | flag_N = res >> 8; |
13410 | FETCH_LONG(adr); |
13411 | PRE_IO |
13412 | WRITE_WORD_F(adr, res) |
13413 | POST_IO |
13414 | RET(20) |
13415 | } |
13416 | |
13417 | // MOVEW |
13418 | OPCODE(0x3EFC) |
13419 | { |
13420 | u32 adr, res; |
13421 | u32 src, dst; |
13422 | |
13423 | FETCH_WORD(res); |
13424 | flag_C = 0; |
13425 | flag_V = 0; |
13426 | flag_NotZ = res; |
13427 | flag_N = res >> 8; |
13428 | adr = AREG(7); |
13429 | AREG(7) += 2; |
13430 | PRE_IO |
13431 | WRITE_WORD_F(adr, res) |
13432 | POST_IO |
13433 | RET(12) |
13434 | } |
13435 | |
13436 | // MOVEW |
13437 | OPCODE(0x3F3C) |
13438 | { |
13439 | u32 adr, res; |
13440 | u32 src, dst; |
13441 | |
13442 | FETCH_WORD(res); |
13443 | flag_C = 0; |
13444 | flag_V = 0; |
13445 | flag_NotZ = res; |
13446 | flag_N = res >> 8; |
13447 | adr = AREG(7) - 2; |
13448 | AREG(7) = adr; |
13449 | PRE_IO |
13450 | WRITE_WORD_F(adr, res) |
13451 | POST_IO |
13452 | RET(12) |
13453 | } |
13454 | |
13455 | // MOVEW |
13456 | OPCODE(0x301F) |
13457 | { |
13458 | u32 adr, res; |
13459 | u32 src, dst; |
13460 | |
13461 | adr = AREG(7); |
13462 | AREG(7) += 2; |
13463 | PRE_IO |
13464 | READ_WORD_F(adr, res) |
13465 | flag_C = 0; |
13466 | flag_V = 0; |
13467 | flag_NotZ = res; |
13468 | flag_N = res >> 8; |
13469 | DREGu16((Opcode >> 9) & 7) = res; |
13470 | POST_IO |
13471 | RET(8) |
13472 | } |
13473 | |
13474 | // MOVEW |
13475 | OPCODE(0x309F) |
13476 | { |
13477 | u32 adr, res; |
13478 | u32 src, dst; |
13479 | |
13480 | adr = AREG(7); |
13481 | AREG(7) += 2; |
13482 | PRE_IO |
13483 | READ_WORD_F(adr, res) |
13484 | flag_C = 0; |
13485 | flag_V = 0; |
13486 | flag_NotZ = res; |
13487 | flag_N = res >> 8; |
13488 | adr = AREG((Opcode >> 9) & 7); |
13489 | WRITE_WORD_F(adr, res) |
13490 | POST_IO |
13491 | RET(12) |
13492 | } |
13493 | |
13494 | // MOVEW |
13495 | OPCODE(0x30DF) |
13496 | { |
13497 | u32 adr, res; |
13498 | u32 src, dst; |
13499 | |
13500 | adr = AREG(7); |
13501 | AREG(7) += 2; |
13502 | PRE_IO |
13503 | READ_WORD_F(adr, res) |
13504 | flag_C = 0; |
13505 | flag_V = 0; |
13506 | flag_NotZ = res; |
13507 | flag_N = res >> 8; |
13508 | adr = AREG((Opcode >> 9) & 7); |
13509 | AREG((Opcode >> 9) & 7) += 2; |
13510 | WRITE_WORD_F(adr, res) |
13511 | POST_IO |
13512 | RET(12) |
13513 | } |
13514 | |
13515 | // MOVEW |
13516 | OPCODE(0x311F) |
13517 | { |
13518 | u32 adr, res; |
13519 | u32 src, dst; |
13520 | |
13521 | adr = AREG(7); |
13522 | AREG(7) += 2; |
13523 | PRE_IO |
13524 | READ_WORD_F(adr, res) |
13525 | flag_C = 0; |
13526 | flag_V = 0; |
13527 | flag_NotZ = res; |
13528 | flag_N = res >> 8; |
13529 | adr = AREG((Opcode >> 9) & 7) - 2; |
13530 | AREG((Opcode >> 9) & 7) = adr; |
13531 | WRITE_WORD_F(adr, res) |
13532 | POST_IO |
13533 | RET(12) |
13534 | } |
13535 | |
13536 | // MOVEW |
13537 | OPCODE(0x315F) |
13538 | { |
13539 | u32 adr, res; |
13540 | u32 src, dst; |
13541 | |
13542 | adr = AREG(7); |
13543 | AREG(7) += 2; |
13544 | PRE_IO |
13545 | READ_WORD_F(adr, res) |
13546 | flag_C = 0; |
13547 | flag_V = 0; |
13548 | flag_NotZ = res; |
13549 | flag_N = res >> 8; |
13550 | FETCH_SWORD(adr); |
13551 | adr += AREG((Opcode >> 9) & 7); |
13552 | WRITE_WORD_F(adr, res) |
13553 | POST_IO |
13554 | RET(16) |
13555 | } |
13556 | |
13557 | // MOVEW |
13558 | OPCODE(0x319F) |
13559 | { |
13560 | u32 adr, res; |
13561 | u32 src, dst; |
13562 | |
13563 | adr = AREG(7); |
13564 | AREG(7) += 2; |
13565 | PRE_IO |
13566 | READ_WORD_F(adr, res) |
13567 | flag_C = 0; |
13568 | flag_V = 0; |
13569 | flag_NotZ = res; |
13570 | flag_N = res >> 8; |
13571 | adr = AREG((Opcode >> 9) & 7); |
13572 | DECODE_EXT_WORD |
13573 | WRITE_WORD_F(adr, res) |
13574 | POST_IO |
13575 | RET(18) |
13576 | } |
13577 | |
13578 | // MOVEW |
13579 | OPCODE(0x31DF) |
13580 | { |
13581 | u32 adr, res; |
13582 | u32 src, dst; |
13583 | |
13584 | adr = AREG(7); |
13585 | AREG(7) += 2; |
13586 | PRE_IO |
13587 | READ_WORD_F(adr, res) |
13588 | flag_C = 0; |
13589 | flag_V = 0; |
13590 | flag_NotZ = res; |
13591 | flag_N = res >> 8; |
13592 | FETCH_SWORD(adr); |
13593 | WRITE_WORD_F(adr, res) |
13594 | POST_IO |
13595 | RET(16) |
13596 | } |
13597 | |
13598 | // MOVEW |
13599 | OPCODE(0x33DF) |
13600 | { |
13601 | u32 adr, res; |
13602 | u32 src, dst; |
13603 | |
13604 | adr = AREG(7); |
13605 | AREG(7) += 2; |
13606 | PRE_IO |
13607 | READ_WORD_F(adr, res) |
13608 | flag_C = 0; |
13609 | flag_V = 0; |
13610 | flag_NotZ = res; |
13611 | flag_N = res >> 8; |
13612 | FETCH_LONG(adr); |
13613 | WRITE_WORD_F(adr, res) |
13614 | POST_IO |
13615 | RET(20) |
13616 | } |
13617 | |
13618 | // MOVEW |
13619 | OPCODE(0x3EDF) |
13620 | { |
13621 | u32 adr, res; |
13622 | u32 src, dst; |
13623 | |
13624 | adr = AREG(7); |
13625 | AREG(7) += 2; |
13626 | PRE_IO |
13627 | READ_WORD_F(adr, res) |
13628 | flag_C = 0; |
13629 | flag_V = 0; |
13630 | flag_NotZ = res; |
13631 | flag_N = res >> 8; |
13632 | adr = AREG(7); |
13633 | AREG(7) += 2; |
13634 | WRITE_WORD_F(adr, res) |
13635 | POST_IO |
13636 | RET(12) |
13637 | } |
13638 | |
13639 | // MOVEW |
13640 | OPCODE(0x3F1F) |
13641 | { |
13642 | u32 adr, res; |
13643 | u32 src, dst; |
13644 | |
13645 | adr = AREG(7); |
13646 | AREG(7) += 2; |
13647 | PRE_IO |
13648 | READ_WORD_F(adr, res) |
13649 | flag_C = 0; |
13650 | flag_V = 0; |
13651 | flag_NotZ = res; |
13652 | flag_N = res >> 8; |
13653 | adr = AREG(7) - 2; |
13654 | AREG(7) = adr; |
13655 | WRITE_WORD_F(adr, res) |
13656 | POST_IO |
13657 | RET(12) |
13658 | } |
13659 | |
13660 | // MOVEW |
13661 | OPCODE(0x3027) |
13662 | { |
13663 | u32 adr, res; |
13664 | u32 src, dst; |
13665 | |
13666 | adr = AREG(7) - 2; |
13667 | AREG(7) = adr; |
13668 | PRE_IO |
13669 | READ_WORD_F(adr, res) |
13670 | flag_C = 0; |
13671 | flag_V = 0; |
13672 | flag_NotZ = res; |
13673 | flag_N = res >> 8; |
13674 | DREGu16((Opcode >> 9) & 7) = res; |
13675 | POST_IO |
13676 | RET(10) |
13677 | } |
13678 | |
13679 | // MOVEW |
13680 | OPCODE(0x30A7) |
13681 | { |
13682 | u32 adr, res; |
13683 | u32 src, dst; |
13684 | |
13685 | adr = AREG(7) - 2; |
13686 | AREG(7) = adr; |
13687 | PRE_IO |
13688 | READ_WORD_F(adr, res) |
13689 | flag_C = 0; |
13690 | flag_V = 0; |
13691 | flag_NotZ = res; |
13692 | flag_N = res >> 8; |
13693 | adr = AREG((Opcode >> 9) & 7); |
13694 | WRITE_WORD_F(adr, res) |
13695 | POST_IO |
13696 | RET(14) |
13697 | } |
13698 | |
13699 | // MOVEW |
13700 | OPCODE(0x30E7) |
13701 | { |
13702 | u32 adr, res; |
13703 | u32 src, dst; |
13704 | |
13705 | adr = AREG(7) - 2; |
13706 | AREG(7) = adr; |
13707 | PRE_IO |
13708 | READ_WORD_F(adr, res) |
13709 | flag_C = 0; |
13710 | flag_V = 0; |
13711 | flag_NotZ = res; |
13712 | flag_N = res >> 8; |
13713 | adr = AREG((Opcode >> 9) & 7); |
13714 | AREG((Opcode >> 9) & 7) += 2; |
13715 | WRITE_WORD_F(adr, res) |
13716 | POST_IO |
13717 | RET(14) |
13718 | } |
13719 | |
13720 | // MOVEW |
13721 | OPCODE(0x3127) |
13722 | { |
13723 | u32 adr, res; |
13724 | u32 src, dst; |
13725 | |
13726 | adr = AREG(7) - 2; |
13727 | AREG(7) = adr; |
13728 | PRE_IO |
13729 | READ_WORD_F(adr, res) |
13730 | flag_C = 0; |
13731 | flag_V = 0; |
13732 | flag_NotZ = res; |
13733 | flag_N = res >> 8; |
13734 | adr = AREG((Opcode >> 9) & 7) - 2; |
13735 | AREG((Opcode >> 9) & 7) = adr; |
13736 | WRITE_WORD_F(adr, res) |
13737 | POST_IO |
13738 | RET(14) |
13739 | } |
13740 | |
13741 | // MOVEW |
13742 | OPCODE(0x3167) |
13743 | { |
13744 | u32 adr, res; |
13745 | u32 src, dst; |
13746 | |
13747 | adr = AREG(7) - 2; |
13748 | AREG(7) = adr; |
13749 | PRE_IO |
13750 | READ_WORD_F(adr, res) |
13751 | flag_C = 0; |
13752 | flag_V = 0; |
13753 | flag_NotZ = res; |
13754 | flag_N = res >> 8; |
13755 | FETCH_SWORD(adr); |
13756 | adr += AREG((Opcode >> 9) & 7); |
13757 | WRITE_WORD_F(adr, res) |
13758 | POST_IO |
13759 | RET(18) |
13760 | } |
13761 | |
13762 | // MOVEW |
13763 | OPCODE(0x31A7) |
13764 | { |
13765 | u32 adr, res; |
13766 | u32 src, dst; |
13767 | |
13768 | adr = AREG(7) - 2; |
13769 | AREG(7) = adr; |
13770 | PRE_IO |
13771 | READ_WORD_F(adr, res) |
13772 | flag_C = 0; |
13773 | flag_V = 0; |
13774 | flag_NotZ = res; |
13775 | flag_N = res >> 8; |
13776 | adr = AREG((Opcode >> 9) & 7); |
13777 | DECODE_EXT_WORD |
13778 | WRITE_WORD_F(adr, res) |
13779 | POST_IO |
13780 | RET(20) |
13781 | } |
13782 | |
13783 | // MOVEW |
13784 | OPCODE(0x31E7) |
13785 | { |
13786 | u32 adr, res; |
13787 | u32 src, dst; |
13788 | |
13789 | adr = AREG(7) - 2; |
13790 | AREG(7) = adr; |
13791 | PRE_IO |
13792 | READ_WORD_F(adr, res) |
13793 | flag_C = 0; |
13794 | flag_V = 0; |
13795 | flag_NotZ = res; |
13796 | flag_N = res >> 8; |
13797 | FETCH_SWORD(adr); |
13798 | WRITE_WORD_F(adr, res) |
13799 | POST_IO |
13800 | RET(18) |
13801 | } |
13802 | |
13803 | // MOVEW |
13804 | OPCODE(0x33E7) |
13805 | { |
13806 | u32 adr, res; |
13807 | u32 src, dst; |
13808 | |
13809 | adr = AREG(7) - 2; |
13810 | AREG(7) = adr; |
13811 | PRE_IO |
13812 | READ_WORD_F(adr, res) |
13813 | flag_C = 0; |
13814 | flag_V = 0; |
13815 | flag_NotZ = res; |
13816 | flag_N = res >> 8; |
13817 | FETCH_LONG(adr); |
13818 | WRITE_WORD_F(adr, res) |
13819 | POST_IO |
13820 | RET(22) |
13821 | } |
13822 | |
13823 | // MOVEW |
13824 | OPCODE(0x3EE7) |
13825 | { |
13826 | u32 adr, res; |
13827 | u32 src, dst; |
13828 | |
13829 | adr = AREG(7) - 2; |
13830 | AREG(7) = adr; |
13831 | PRE_IO |
13832 | READ_WORD_F(adr, res) |
13833 | flag_C = 0; |
13834 | flag_V = 0; |
13835 | flag_NotZ = res; |
13836 | flag_N = res >> 8; |
13837 | adr = AREG(7); |
13838 | AREG(7) += 2; |
13839 | WRITE_WORD_F(adr, res) |
13840 | POST_IO |
13841 | RET(14) |
13842 | } |
13843 | |
13844 | // MOVEW |
13845 | OPCODE(0x3F27) |
13846 | { |
13847 | u32 adr, res; |
13848 | u32 src, dst; |
13849 | |
13850 | adr = AREG(7) - 2; |
13851 | AREG(7) = adr; |
13852 | PRE_IO |
13853 | READ_WORD_F(adr, res) |
13854 | flag_C = 0; |
13855 | flag_V = 0; |
13856 | flag_NotZ = res; |
13857 | flag_N = res >> 8; |
13858 | adr = AREG(7) - 2; |
13859 | AREG(7) = adr; |
13860 | WRITE_WORD_F(adr, res) |
13861 | POST_IO |
13862 | RET(14) |
13863 | } |
13864 | |
13865 | // MOVEAW |
13866 | OPCODE(0x3040) |
13867 | { |
13868 | u32 adr, res; |
13869 | u32 src, dst; |
13870 | |
13871 | res = (s32)DREGs16((Opcode >> 0) & 7); |
13872 | AREG((Opcode >> 9) & 7) = res; |
13873 | RET(4) |
13874 | } |
13875 | |
13876 | // MOVEAW |
13877 | OPCODE(0x3048) |
13878 | { |
13879 | u32 adr, res; |
13880 | u32 src, dst; |
13881 | |
13882 | res = (s32)AREGs16((Opcode >> 0) & 7); |
13883 | AREG((Opcode >> 9) & 7) = res; |
13884 | RET(4) |
13885 | } |
13886 | |
13887 | // MOVEAW |
13888 | OPCODE(0x3050) |
13889 | { |
13890 | u32 adr, res; |
13891 | u32 src, dst; |
13892 | |
13893 | adr = AREG((Opcode >> 0) & 7); |
13894 | PRE_IO |
13895 | READSX_WORD_F(adr, res) |
13896 | AREG((Opcode >> 9) & 7) = res; |
13897 | POST_IO |
13898 | RET(8) |
13899 | } |
13900 | |
13901 | // MOVEAW |
13902 | OPCODE(0x3058) |
13903 | { |
13904 | u32 adr, res; |
13905 | u32 src, dst; |
13906 | |
13907 | adr = AREG((Opcode >> 0) & 7); |
13908 | AREG((Opcode >> 0) & 7) += 2; |
13909 | PRE_IO |
13910 | READSX_WORD_F(adr, res) |
13911 | AREG((Opcode >> 9) & 7) = res; |
13912 | POST_IO |
13913 | RET(8) |
13914 | } |
13915 | |
13916 | // MOVEAW |
13917 | OPCODE(0x3060) |
13918 | { |
13919 | u32 adr, res; |
13920 | u32 src, dst; |
13921 | |
13922 | adr = AREG((Opcode >> 0) & 7) - 2; |
13923 | AREG((Opcode >> 0) & 7) = adr; |
13924 | PRE_IO |
13925 | READSX_WORD_F(adr, res) |
13926 | AREG((Opcode >> 9) & 7) = res; |
13927 | POST_IO |
13928 | RET(10) |
13929 | } |
13930 | |
13931 | // MOVEAW |
13932 | OPCODE(0x3068) |
13933 | { |
13934 | u32 adr, res; |
13935 | u32 src, dst; |
13936 | |
13937 | FETCH_SWORD(adr); |
13938 | adr += AREG((Opcode >> 0) & 7); |
13939 | PRE_IO |
13940 | READSX_WORD_F(adr, res) |
13941 | AREG((Opcode >> 9) & 7) = res; |
13942 | POST_IO |
13943 | RET(12) |
13944 | } |
13945 | |
13946 | // MOVEAW |
13947 | OPCODE(0x3070) |
13948 | { |
13949 | u32 adr, res; |
13950 | u32 src, dst; |
13951 | |
13952 | adr = AREG((Opcode >> 0) & 7); |
13953 | DECODE_EXT_WORD |
13954 | PRE_IO |
13955 | READSX_WORD_F(adr, res) |
13956 | AREG((Opcode >> 9) & 7) = res; |
13957 | POST_IO |
13958 | RET(14) |
13959 | } |
13960 | |
13961 | // MOVEAW |
13962 | OPCODE(0x3078) |
13963 | { |
13964 | u32 adr, res; |
13965 | u32 src, dst; |
13966 | |
13967 | FETCH_SWORD(adr); |
13968 | PRE_IO |
13969 | READSX_WORD_F(adr, res) |
13970 | AREG((Opcode >> 9) & 7) = res; |
13971 | POST_IO |
13972 | RET(12) |
13973 | } |
13974 | |
13975 | // MOVEAW |
13976 | OPCODE(0x3079) |
13977 | { |
13978 | u32 adr, res; |
13979 | u32 src, dst; |
13980 | |
13981 | FETCH_LONG(adr); |
13982 | PRE_IO |
13983 | READSX_WORD_F(adr, res) |
13984 | AREG((Opcode >> 9) & 7) = res; |
13985 | POST_IO |
13986 | RET(16) |
13987 | } |
13988 | |
13989 | // MOVEAW |
13990 | OPCODE(0x307A) |
13991 | { |
13992 | u32 adr, res; |
13993 | u32 src, dst; |
13994 | |
be26eb23 |
13995 | adr = GET_SWORD + GET_PC; |
70357ce5 |
13996 | PC++; |
13997 | PRE_IO |
13998 | READSX_WORD_F(adr, res) |
13999 | AREG((Opcode >> 9) & 7) = res; |
14000 | POST_IO |
14001 | RET(12) |
14002 | } |
14003 | |
14004 | // MOVEAW |
14005 | OPCODE(0x307B) |
14006 | { |
14007 | u32 adr, res; |
14008 | u32 src, dst; |
14009 | |
be26eb23 |
14010 | adr = GET_PC; |
70357ce5 |
14011 | DECODE_EXT_WORD |
14012 | PRE_IO |
14013 | READSX_WORD_F(adr, res) |
14014 | AREG((Opcode >> 9) & 7) = res; |
14015 | POST_IO |
14016 | RET(14) |
14017 | } |
14018 | |
14019 | // MOVEAW |
14020 | OPCODE(0x307C) |
14021 | { |
14022 | u32 adr, res; |
14023 | u32 src, dst; |
14024 | |
14025 | FETCH_SWORD(res); |
14026 | AREG((Opcode >> 9) & 7) = res; |
14027 | RET(8) |
14028 | } |
14029 | |
14030 | // MOVEAW |
14031 | OPCODE(0x305F) |
14032 | { |
14033 | u32 adr, res; |
14034 | u32 src, dst; |
14035 | |
14036 | adr = AREG(7); |
14037 | AREG(7) += 2; |
14038 | PRE_IO |
14039 | READSX_WORD_F(adr, res) |
14040 | AREG((Opcode >> 9) & 7) = res; |
14041 | POST_IO |
14042 | RET(8) |
14043 | } |
14044 | |
14045 | // MOVEAW |
14046 | OPCODE(0x3067) |
14047 | { |
14048 | u32 adr, res; |
14049 | u32 src, dst; |
14050 | |
14051 | adr = AREG(7) - 2; |
14052 | AREG(7) = adr; |
14053 | PRE_IO |
14054 | READSX_WORD_F(adr, res) |
14055 | AREG((Opcode >> 9) & 7) = res; |
14056 | POST_IO |
14057 | RET(10) |
14058 | } |
14059 | |
14060 | // NEGX |
14061 | OPCODE(0x4000) |
14062 | { |
14063 | u32 adr, res; |
14064 | u32 src, dst; |
14065 | |
14066 | src = DREGu8((Opcode >> 0) & 7); |
14067 | res = -src - ((flag_X >> 8) & 1); |
14068 | flag_V = res & src; |
14069 | flag_N = flag_X = flag_C = res; |
14070 | flag_NotZ |= res & 0xFF; |
14071 | DREGu8((Opcode >> 0) & 7) = res; |
14072 | RET(4) |
14073 | } |
14074 | |
14075 | // NEGX |
14076 | OPCODE(0x4010) |
14077 | { |
14078 | u32 adr, res; |
14079 | u32 src, dst; |
14080 | |
14081 | adr = AREG((Opcode >> 0) & 7); |
14082 | PRE_IO |
14083 | READ_BYTE_F(adr, src) |
14084 | res = -src - ((flag_X >> 8) & 1); |
14085 | flag_V = res & src; |
14086 | flag_N = flag_X = flag_C = res; |
14087 | flag_NotZ |= res & 0xFF; |
14088 | WRITE_BYTE_F(adr, res) |
14089 | POST_IO |
14090 | RET(12) |
14091 | } |
14092 | |
14093 | // NEGX |
14094 | OPCODE(0x4018) |
14095 | { |
14096 | u32 adr, res; |
14097 | u32 src, dst; |
14098 | |
14099 | adr = AREG((Opcode >> 0) & 7); |
14100 | AREG((Opcode >> 0) & 7) += 1; |
14101 | PRE_IO |
14102 | READ_BYTE_F(adr, src) |
14103 | res = -src - ((flag_X >> 8) & 1); |
14104 | flag_V = res & src; |
14105 | flag_N = flag_X = flag_C = res; |
14106 | flag_NotZ |= res & 0xFF; |
14107 | WRITE_BYTE_F(adr, res) |
14108 | POST_IO |
14109 | RET(12) |
14110 | } |
14111 | |
14112 | // NEGX |
14113 | OPCODE(0x4020) |
14114 | { |
14115 | u32 adr, res; |
14116 | u32 src, dst; |
14117 | |
14118 | adr = AREG((Opcode >> 0) & 7) - 1; |
14119 | AREG((Opcode >> 0) & 7) = adr; |
14120 | PRE_IO |
14121 | READ_BYTE_F(adr, src) |
14122 | res = -src - ((flag_X >> 8) & 1); |
14123 | flag_V = res & src; |
14124 | flag_N = flag_X = flag_C = res; |
14125 | flag_NotZ |= res & 0xFF; |
14126 | WRITE_BYTE_F(adr, res) |
14127 | POST_IO |
14128 | RET(14) |
14129 | } |
14130 | |
14131 | // NEGX |
14132 | OPCODE(0x4028) |
14133 | { |
14134 | u32 adr, res; |
14135 | u32 src, dst; |
14136 | |
14137 | FETCH_SWORD(adr); |
14138 | adr += AREG((Opcode >> 0) & 7); |
14139 | PRE_IO |
14140 | READ_BYTE_F(adr, src) |
14141 | res = -src - ((flag_X >> 8) & 1); |
14142 | flag_V = res & src; |
14143 | flag_N = flag_X = flag_C = res; |
14144 | flag_NotZ |= res & 0xFF; |
14145 | WRITE_BYTE_F(adr, res) |
14146 | POST_IO |
14147 | RET(16) |
14148 | } |
14149 | |
14150 | // NEGX |
14151 | OPCODE(0x4030) |
14152 | { |
14153 | u32 adr, res; |
14154 | u32 src, dst; |
14155 | |
14156 | adr = AREG((Opcode >> 0) & 7); |
14157 | DECODE_EXT_WORD |
14158 | PRE_IO |
14159 | READ_BYTE_F(adr, src) |
14160 | res = -src - ((flag_X >> 8) & 1); |
14161 | flag_V = res & src; |
14162 | flag_N = flag_X = flag_C = res; |
14163 | flag_NotZ |= res & 0xFF; |
14164 | WRITE_BYTE_F(adr, res) |
14165 | POST_IO |
14166 | RET(18) |
14167 | } |
14168 | |
14169 | // NEGX |
14170 | OPCODE(0x4038) |
14171 | { |
14172 | u32 adr, res; |
14173 | u32 src, dst; |
14174 | |
14175 | FETCH_SWORD(adr); |
14176 | PRE_IO |
14177 | READ_BYTE_F(adr, src) |
14178 | res = -src - ((flag_X >> 8) & 1); |
14179 | flag_V = res & src; |
14180 | flag_N = flag_X = flag_C = res; |
14181 | flag_NotZ |= res & 0xFF; |
14182 | WRITE_BYTE_F(adr, res) |
14183 | POST_IO |
14184 | RET(16) |
14185 | } |
14186 | |
14187 | // NEGX |
14188 | OPCODE(0x4039) |
14189 | { |
14190 | u32 adr, res; |
14191 | u32 src, dst; |
14192 | |
14193 | FETCH_LONG(adr); |
14194 | PRE_IO |
14195 | READ_BYTE_F(adr, src) |
14196 | res = -src - ((flag_X >> 8) & 1); |
14197 | flag_V = res & src; |
14198 | flag_N = flag_X = flag_C = res; |
14199 | flag_NotZ |= res & 0xFF; |
14200 | WRITE_BYTE_F(adr, res) |
14201 | POST_IO |
14202 | RET(20) |
14203 | } |
14204 | |
14205 | // NEGX |
14206 | OPCODE(0x401F) |
14207 | { |
14208 | u32 adr, res; |
14209 | u32 src, dst; |
14210 | |
14211 | adr = AREG(7); |
14212 | AREG(7) += 2; |
14213 | PRE_IO |
14214 | READ_BYTE_F(adr, src) |
14215 | res = -src - ((flag_X >> 8) & 1); |
14216 | flag_V = res & src; |
14217 | flag_N = flag_X = flag_C = res; |
14218 | flag_NotZ |= res & 0xFF; |
14219 | WRITE_BYTE_F(adr, res) |
14220 | POST_IO |
14221 | RET(12) |
14222 | } |
14223 | |
14224 | // NEGX |
14225 | OPCODE(0x4027) |
14226 | { |
14227 | u32 adr, res; |
14228 | u32 src, dst; |
14229 | |
14230 | adr = AREG(7) - 2; |
14231 | AREG(7) = adr; |
14232 | PRE_IO |
14233 | READ_BYTE_F(adr, src) |
14234 | res = -src - ((flag_X >> 8) & 1); |
14235 | flag_V = res & src; |
14236 | flag_N = flag_X = flag_C = res; |
14237 | flag_NotZ |= res & 0xFF; |
14238 | WRITE_BYTE_F(adr, res) |
14239 | POST_IO |
14240 | RET(14) |
14241 | } |
14242 | |
14243 | // NEGX |
14244 | OPCODE(0x4040) |
14245 | { |
14246 | u32 adr, res; |
14247 | u32 src, dst; |
14248 | |
14249 | src = DREGu16((Opcode >> 0) & 7); |
14250 | res = -src - ((flag_X >> 8) & 1); |
14251 | flag_V = (res & src) >> 8; |
14252 | flag_N = flag_X = flag_C = res >> 8; |
14253 | flag_NotZ |= res & 0xFFFF; |
14254 | DREGu16((Opcode >> 0) & 7) = res; |
14255 | RET(4) |
14256 | } |
14257 | |
14258 | // NEGX |
14259 | OPCODE(0x4050) |
14260 | { |
14261 | u32 adr, res; |
14262 | u32 src, dst; |
14263 | |
14264 | adr = AREG((Opcode >> 0) & 7); |
14265 | PRE_IO |
14266 | READ_WORD_F(adr, src) |
14267 | res = -src - ((flag_X >> 8) & 1); |
14268 | flag_V = (res & src) >> 8; |
14269 | flag_N = flag_X = flag_C = res >> 8; |
14270 | flag_NotZ |= res & 0xFFFF; |
14271 | WRITE_WORD_F(adr, res) |
14272 | POST_IO |
14273 | RET(12) |
14274 | } |
14275 | |
14276 | // NEGX |
14277 | OPCODE(0x4058) |
14278 | { |
14279 | u32 adr, res; |
14280 | u32 src, dst; |
14281 | |
14282 | adr = AREG((Opcode >> 0) & 7); |
14283 | AREG((Opcode >> 0) & 7) += 2; |
14284 | PRE_IO |
14285 | READ_WORD_F(adr, src) |
14286 | res = -src - ((flag_X >> 8) & 1); |
14287 | flag_V = (res & src) >> 8; |
14288 | flag_N = flag_X = flag_C = res >> 8; |
14289 | flag_NotZ |= res & 0xFFFF; |
14290 | WRITE_WORD_F(adr, res) |
14291 | POST_IO |
14292 | RET(12) |
14293 | } |
14294 | |
14295 | // NEGX |
14296 | OPCODE(0x4060) |
14297 | { |
14298 | u32 adr, res; |
14299 | u32 src, dst; |
14300 | |
14301 | adr = AREG((Opcode >> 0) & 7) - 2; |
14302 | AREG((Opcode >> 0) & 7) = adr; |
14303 | PRE_IO |
14304 | READ_WORD_F(adr, src) |
14305 | res = -src - ((flag_X >> 8) & 1); |
14306 | flag_V = (res & src) >> 8; |
14307 | flag_N = flag_X = flag_C = res >> 8; |
14308 | flag_NotZ |= res & 0xFFFF; |
14309 | WRITE_WORD_F(adr, res) |
14310 | POST_IO |
14311 | RET(14) |
14312 | } |
14313 | |
14314 | // NEGX |
14315 | OPCODE(0x4068) |
14316 | { |
14317 | u32 adr, res; |
14318 | u32 src, dst; |
14319 | |
14320 | FETCH_SWORD(adr); |
14321 | adr += AREG((Opcode >> 0) & 7); |
14322 | PRE_IO |
14323 | READ_WORD_F(adr, src) |
14324 | res = -src - ((flag_X >> 8) & 1); |
14325 | flag_V = (res & src) >> 8; |
14326 | flag_N = flag_X = flag_C = res >> 8; |
14327 | flag_NotZ |= res & 0xFFFF; |
14328 | WRITE_WORD_F(adr, res) |
14329 | POST_IO |
14330 | RET(16) |
14331 | } |
14332 | |
14333 | // NEGX |
14334 | OPCODE(0x4070) |
14335 | { |
14336 | u32 adr, res; |
14337 | u32 src, dst; |
14338 | |
14339 | adr = AREG((Opcode >> 0) & 7); |
14340 | DECODE_EXT_WORD |
14341 | PRE_IO |
14342 | READ_WORD_F(adr, src) |
14343 | res = -src - ((flag_X >> 8) & 1); |
14344 | flag_V = (res & src) >> 8; |
14345 | flag_N = flag_X = flag_C = res >> 8; |
14346 | flag_NotZ |= res & 0xFFFF; |
14347 | WRITE_WORD_F(adr, res) |
14348 | POST_IO |
14349 | RET(18) |
14350 | } |
14351 | |
14352 | // NEGX |
14353 | OPCODE(0x4078) |
14354 | { |
14355 | u32 adr, res; |
14356 | u32 src, dst; |
14357 | |
14358 | FETCH_SWORD(adr); |
14359 | PRE_IO |
14360 | READ_WORD_F(adr, src) |
14361 | res = -src - ((flag_X >> 8) & 1); |
14362 | flag_V = (res & src) >> 8; |
14363 | flag_N = flag_X = flag_C = res >> 8; |
14364 | flag_NotZ |= res & 0xFFFF; |
14365 | WRITE_WORD_F(adr, res) |
14366 | POST_IO |
14367 | RET(16) |
14368 | } |
14369 | |
14370 | // NEGX |
14371 | OPCODE(0x4079) |
14372 | { |
14373 | u32 adr, res; |
14374 | u32 src, dst; |
14375 | |
14376 | FETCH_LONG(adr); |
14377 | PRE_IO |
14378 | READ_WORD_F(adr, src) |
14379 | res = -src - ((flag_X >> 8) & 1); |
14380 | flag_V = (res & src) >> 8; |
14381 | flag_N = flag_X = flag_C = res >> 8; |
14382 | flag_NotZ |= res & 0xFFFF; |
14383 | WRITE_WORD_F(adr, res) |
14384 | POST_IO |
14385 | RET(20) |
14386 | } |
14387 | |
14388 | // NEGX |
14389 | OPCODE(0x405F) |
14390 | { |
14391 | u32 adr, res; |
14392 | u32 src, dst; |
14393 | |
14394 | adr = AREG(7); |
14395 | AREG(7) += 2; |
14396 | PRE_IO |
14397 | READ_WORD_F(adr, src) |
14398 | res = -src - ((flag_X >> 8) & 1); |
14399 | flag_V = (res & src) >> 8; |
14400 | flag_N = flag_X = flag_C = res >> 8; |
14401 | flag_NotZ |= res & 0xFFFF; |
14402 | WRITE_WORD_F(adr, res) |
14403 | POST_IO |
14404 | RET(12) |
14405 | } |
14406 | |
14407 | // NEGX |
14408 | OPCODE(0x4067) |
14409 | { |
14410 | u32 adr, res; |
14411 | u32 src, dst; |
14412 | |
14413 | adr = AREG(7) - 2; |
14414 | AREG(7) = adr; |
14415 | PRE_IO |
14416 | READ_WORD_F(adr, src) |
14417 | res = -src - ((flag_X >> 8) & 1); |
14418 | flag_V = (res & src) >> 8; |
14419 | flag_N = flag_X = flag_C = res >> 8; |
14420 | flag_NotZ |= res & 0xFFFF; |
14421 | WRITE_WORD_F(adr, res) |
14422 | POST_IO |
14423 | RET(14) |
14424 | } |
14425 | |
14426 | // NEGX |
14427 | OPCODE(0x4080) |
14428 | { |
14429 | u32 adr, res; |
14430 | u32 src, dst; |
14431 | |
14432 | src = DREGu32((Opcode >> 0) & 7); |
14433 | res = -src - ((flag_X >> 8) & 1); |
14434 | flag_NotZ |= res; |
14435 | flag_V = (res & src) >> 24; |
14436 | flag_X = flag_C = (res?1:0)<<8; |
14437 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14438 | flag_N = res >> 24; |
14439 | DREGu32((Opcode >> 0) & 7) = res; |
14440 | RET(6) |
14441 | } |
14442 | |
14443 | // NEGX |
14444 | OPCODE(0x4090) |
14445 | { |
14446 | u32 adr, res; |
14447 | u32 src, dst; |
14448 | |
14449 | adr = AREG((Opcode >> 0) & 7); |
14450 | PRE_IO |
14451 | READ_LONG_F(adr, src) |
14452 | res = -src - ((flag_X >> 8) & 1); |
14453 | flag_NotZ |= res; |
14454 | flag_V = (res & src) >> 24; |
14455 | flag_X = flag_C = (res?1:0)<<8; |
14456 | // flag_X = flag_C = ((src & res & 1) | (src >> 1) | (res >> 1)) >> 23; |
14457 | flag_N = res >> 24; |
14458 | WRITE_LONG_F(adr, res) |
14459 | POST_IO |
14460 | RET(20) |
14461 | } |
14462 | |
14463 | // NEGX |
14464 | OPCODE(0x4098) |
14465 | { |
14466 | u32 adr, res; |
14467 | u32 src, dst; |
14468 | |
14469 | adr = AREG((Opcode >> 0) & 7); |
14470 | AREG((Opcode >> 0) & 7) += 4; |
14471 | PRE_IO |
14472 | READ_LONG_F(adr, src) |
14473 | res = -src - ((flag_X >> 8) & 1); |
14474 | flag_NotZ |= res; |
14475 | flag_V = (res & src) >> 24; |
14476 | flag_X = flag_C = (res?1:0)<<8; |
14477 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14478 | flag_N = res >> 24; |
14479 | WRITE_LONG_F(adr, res) |
14480 | POST_IO |
14481 | RET(20) |
14482 | } |
14483 | |
14484 | // NEGX |
14485 | OPCODE(0x40A0) |
14486 | { |
14487 | u32 adr, res; |
14488 | u32 src, dst; |
14489 | |
14490 | adr = AREG((Opcode >> 0) & 7) - 4; |
14491 | AREG((Opcode >> 0) & 7) = adr; |
14492 | PRE_IO |
14493 | READ_LONG_F(adr, src) |
14494 | res = -src - ((flag_X >> 8) & 1); |
14495 | flag_NotZ |= res; |
14496 | flag_V = (res & src) >> 24; |
14497 | flag_X = flag_C = (res?1:0)<<8; |
14498 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14499 | flag_N = res >> 24; |
14500 | WRITE_LONG_F(adr, res) |
14501 | POST_IO |
14502 | RET(22) |
14503 | } |
14504 | |
14505 | // NEGX |
14506 | OPCODE(0x40A8) |
14507 | { |
14508 | u32 adr, res; |
14509 | u32 src, dst; |
14510 | |
14511 | FETCH_SWORD(adr); |
14512 | adr += AREG((Opcode >> 0) & 7); |
14513 | PRE_IO |
14514 | READ_LONG_F(adr, src) |
14515 | res = -src - ((flag_X >> 8) & 1); |
14516 | flag_NotZ |= res; |
14517 | flag_V = (res & src) >> 24; |
14518 | flag_X = flag_C = (res?1:0)<<8; |
14519 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14520 | flag_N = res >> 24; |
14521 | WRITE_LONG_F(adr, res) |
14522 | POST_IO |
14523 | RET(24) |
14524 | } |
14525 | |
14526 | // NEGX |
14527 | OPCODE(0x40B0) |
14528 | { |
14529 | u32 adr, res; |
14530 | u32 src, dst; |
14531 | |
14532 | adr = AREG((Opcode >> 0) & 7); |
14533 | DECODE_EXT_WORD |
14534 | PRE_IO |
14535 | READ_LONG_F(adr, src) |
14536 | res = -src - ((flag_X >> 8) & 1); |
14537 | flag_NotZ |= res; |
14538 | flag_V = (res & src) >> 24; |
14539 | flag_X = flag_C = (res?1:0)<<8; |
14540 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14541 | flag_N = res >> 24; |
14542 | WRITE_LONG_F(adr, res) |
14543 | POST_IO |
14544 | RET(26) |
14545 | } |
14546 | |
14547 | // NEGX |
14548 | OPCODE(0x40B8) |
14549 | { |
14550 | u32 adr, res; |
14551 | u32 src, dst; |
14552 | |
14553 | FETCH_SWORD(adr); |
14554 | PRE_IO |
14555 | READ_LONG_F(adr, src) |
14556 | res = -src - ((flag_X >> 8) & 1); |
14557 | flag_NotZ |= res; |
14558 | flag_V = (res & src) >> 24; |
14559 | flag_X = flag_C = (res?1:0)<<8; |
14560 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14561 | flag_N = res >> 24; |
14562 | WRITE_LONG_F(adr, res) |
14563 | POST_IO |
14564 | RET(24) |
14565 | } |
14566 | |
14567 | // NEGX |
14568 | OPCODE(0x40B9) |
14569 | { |
14570 | u32 adr, res; |
14571 | u32 src, dst; |
14572 | |
14573 | FETCH_LONG(adr); |
14574 | PRE_IO |
14575 | READ_LONG_F(adr, src) |
14576 | res = -src - ((flag_X >> 8) & 1); |
14577 | flag_NotZ |= res; |
14578 | flag_V = (res & src) >> 24; |
14579 | flag_X = flag_C = (res?1:0)<<8; |
14580 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14581 | flag_N = res >> 24; |
14582 | WRITE_LONG_F(adr, res) |
14583 | POST_IO |
14584 | RET(28) |
14585 | } |
14586 | |
14587 | // NEGX |
14588 | OPCODE(0x409F) |
14589 | { |
14590 | u32 adr, res; |
14591 | u32 src, dst; |
14592 | |
14593 | adr = AREG(7); |
14594 | AREG(7) += 4; |
14595 | PRE_IO |
14596 | READ_LONG_F(adr, src) |
14597 | res = -src - ((flag_X >> 8) & 1); |
14598 | flag_NotZ |= res; |
14599 | flag_V = (res & src) >> 24; |
14600 | flag_X = flag_C = (res?1:0)<<8; |
14601 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14602 | flag_N = res >> 24; |
14603 | WRITE_LONG_F(adr, res) |
14604 | POST_IO |
14605 | RET(20) |
14606 | } |
14607 | |
14608 | // NEGX |
14609 | OPCODE(0x40A7) |
14610 | { |
14611 | u32 adr, res; |
14612 | u32 src, dst; |
14613 | |
14614 | adr = AREG(7) - 4; |
14615 | AREG(7) = adr; |
14616 | PRE_IO |
14617 | READ_LONG_F(adr, src) |
14618 | res = -src - ((flag_X >> 8) & 1); |
14619 | flag_NotZ |= res; |
14620 | flag_V = (res & src) >> 24; |
14621 | flag_X = flag_C = (res?1:0)<<8; |
14622 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14623 | flag_N = res >> 24; |
14624 | WRITE_LONG_F(adr, res) |
14625 | POST_IO |
14626 | RET(22) |
14627 | } |
14628 | |
14629 | // CLR |
14630 | OPCODE(0x4200) |
14631 | { |
14632 | u32 adr, res; |
14633 | u32 src, dst; |
14634 | |
14635 | res = 0; |
14636 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14637 | DREGu8((Opcode >> 0) & 7) = res; |
14638 | RET(4) |
14639 | } |
14640 | |
14641 | // CLR |
14642 | OPCODE(0x4210) |
14643 | { |
14644 | u32 adr, res; |
14645 | u32 src, dst; |
14646 | |
14647 | adr = AREG((Opcode >> 0) & 7); |
14648 | res = 0; |
14649 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14650 | PRE_IO |
14651 | WRITE_BYTE_F(adr, res) |
14652 | POST_IO |
14653 | RET(12) |
14654 | } |
14655 | |
14656 | // CLR |
14657 | OPCODE(0x4218) |
14658 | { |
14659 | u32 adr, res; |
14660 | u32 src, dst; |
14661 | |
14662 | adr = AREG((Opcode >> 0) & 7); |
14663 | AREG((Opcode >> 0) & 7) += 1; |
14664 | res = 0; |
14665 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14666 | PRE_IO |
14667 | WRITE_BYTE_F(adr, res) |
14668 | POST_IO |
14669 | RET(12) |
14670 | } |
14671 | |
14672 | // CLR |
14673 | OPCODE(0x4220) |
14674 | { |
14675 | u32 adr, res; |
14676 | u32 src, dst; |
14677 | |
14678 | adr = AREG((Opcode >> 0) & 7) - 1; |
14679 | AREG((Opcode >> 0) & 7) = adr; |
14680 | res = 0; |
14681 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14682 | PRE_IO |
14683 | WRITE_BYTE_F(adr, res) |
14684 | POST_IO |
14685 | RET(14) |
14686 | } |
14687 | |
14688 | // CLR |
14689 | OPCODE(0x4228) |
14690 | { |
14691 | u32 adr, res; |
14692 | u32 src, dst; |
14693 | |
14694 | FETCH_SWORD(adr); |
14695 | adr += AREG((Opcode >> 0) & 7); |
14696 | res = 0; |
14697 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14698 | PRE_IO |
14699 | WRITE_BYTE_F(adr, res) |
14700 | POST_IO |
14701 | RET(16) |
14702 | } |
14703 | |
14704 | // CLR |
14705 | OPCODE(0x4230) |
14706 | { |
14707 | u32 adr, res; |
14708 | u32 src, dst; |
14709 | |
14710 | adr = AREG((Opcode >> 0) & 7); |
14711 | DECODE_EXT_WORD |
14712 | res = 0; |
14713 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14714 | PRE_IO |
14715 | WRITE_BYTE_F(adr, res) |
14716 | POST_IO |
14717 | RET(18) |
14718 | } |
14719 | |
14720 | // CLR |
14721 | OPCODE(0x4238) |
14722 | { |
14723 | u32 adr, res; |
14724 | u32 src, dst; |
14725 | |
14726 | FETCH_SWORD(adr); |
14727 | res = 0; |
14728 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14729 | PRE_IO |
14730 | WRITE_BYTE_F(adr, res) |
14731 | POST_IO |
14732 | RET(16) |
14733 | } |
14734 | |
14735 | // CLR |
14736 | OPCODE(0x4239) |
14737 | { |
14738 | u32 adr, res; |
14739 | u32 src, dst; |
14740 | |
14741 | FETCH_LONG(adr); |
14742 | res = 0; |
14743 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14744 | PRE_IO |
14745 | WRITE_BYTE_F(adr, res) |
14746 | POST_IO |
14747 | RET(20) |
14748 | } |
14749 | |
14750 | // CLR |
14751 | OPCODE(0x421F) |
14752 | { |
14753 | u32 adr, res; |
14754 | u32 src, dst; |
14755 | |
14756 | adr = AREG(7); |
14757 | AREG(7) += 2; |
14758 | res = 0; |
14759 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14760 | PRE_IO |
14761 | WRITE_BYTE_F(adr, res) |
14762 | POST_IO |
14763 | RET(12) |
14764 | } |
14765 | |
14766 | // CLR |
14767 | OPCODE(0x4227) |
14768 | { |
14769 | u32 adr, res; |
14770 | u32 src, dst; |
14771 | |
14772 | adr = AREG(7) - 2; |
14773 | AREG(7) = adr; |
14774 | res = 0; |
14775 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14776 | PRE_IO |
14777 | WRITE_BYTE_F(adr, res) |
14778 | POST_IO |
14779 | RET(14) |
14780 | } |
14781 | |
14782 | // CLR |
14783 | OPCODE(0x4240) |
14784 | { |
14785 | u32 adr, res; |
14786 | u32 src, dst; |
14787 | |
14788 | res = 0; |
14789 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14790 | DREGu16((Opcode >> 0) & 7) = res; |
14791 | RET(4) |
14792 | } |
14793 | |
14794 | // CLR |
14795 | OPCODE(0x4250) |
14796 | { |
14797 | u32 adr, res; |
14798 | u32 src, dst; |
14799 | |
14800 | adr = AREG((Opcode >> 0) & 7); |
14801 | res = 0; |
14802 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14803 | PRE_IO |
14804 | WRITE_WORD_F(adr, res) |
14805 | POST_IO |
14806 | RET(12) |
14807 | } |
14808 | |
14809 | // CLR |
14810 | OPCODE(0x4258) |
14811 | { |
14812 | u32 adr, res; |
14813 | u32 src, dst; |
14814 | |
14815 | adr = AREG((Opcode >> 0) & 7); |
14816 | AREG((Opcode >> 0) & 7) += 2; |
14817 | res = 0; |
14818 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14819 | PRE_IO |
14820 | WRITE_WORD_F(adr, res) |
14821 | POST_IO |
14822 | RET(12) |
14823 | } |
14824 | |
14825 | // CLR |
14826 | OPCODE(0x4260) |
14827 | { |
14828 | u32 adr, res; |
14829 | u32 src, dst; |
14830 | |
14831 | adr = AREG((Opcode >> 0) & 7) - 2; |
14832 | AREG((Opcode >> 0) & 7) = adr; |
14833 | res = 0; |
14834 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14835 | PRE_IO |
14836 | WRITE_WORD_F(adr, res) |
14837 | POST_IO |
14838 | RET(14) |
14839 | } |
14840 | |
14841 | // CLR |
14842 | OPCODE(0x4268) |
14843 | { |
14844 | u32 adr, res; |
14845 | u32 src, dst; |
14846 | |
14847 | FETCH_SWORD(adr); |
14848 | adr += AREG((Opcode >> 0) & 7); |
14849 | res = 0; |
14850 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14851 | PRE_IO |
14852 | WRITE_WORD_F(adr, res) |
14853 | POST_IO |
14854 | RET(16) |
14855 | } |
14856 | |
14857 | // CLR |
14858 | OPCODE(0x4270) |
14859 | { |
14860 | u32 adr, res; |
14861 | u32 src, dst; |
14862 | |
14863 | adr = AREG((Opcode >> 0) & 7); |
14864 | DECODE_EXT_WORD |
14865 | res = 0; |
14866 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14867 | PRE_IO |
14868 | WRITE_WORD_F(adr, res) |
14869 | POST_IO |
14870 | RET(18) |
14871 | } |
14872 | |
14873 | // CLR |
14874 | OPCODE(0x4278) |
14875 | { |
14876 | u32 adr, res; |
14877 | u32 src, dst; |
14878 | |
14879 | FETCH_SWORD(adr); |
14880 | res = 0; |
14881 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14882 | PRE_IO |
14883 | WRITE_WORD_F(adr, res) |
14884 | POST_IO |
14885 | RET(16) |
14886 | } |
14887 | |
14888 | // CLR |
14889 | OPCODE(0x4279) |
14890 | { |
14891 | u32 adr, res; |
14892 | u32 src, dst; |
14893 | |
14894 | FETCH_LONG(adr); |
14895 | res = 0; |
14896 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14897 | PRE_IO |
14898 | WRITE_WORD_F(adr, res) |
14899 | POST_IO |
14900 | RET(20) |
14901 | } |
14902 | |
14903 | // CLR |
14904 | OPCODE(0x425F) |
14905 | { |
14906 | u32 adr, res; |
14907 | u32 src, dst; |
14908 | |
14909 | adr = AREG(7); |
14910 | AREG(7) += 2; |
14911 | res = 0; |
14912 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14913 | PRE_IO |
14914 | WRITE_WORD_F(adr, res) |
14915 | POST_IO |
14916 | RET(12) |
14917 | } |
14918 | |
14919 | // CLR |
14920 | OPCODE(0x4267) |
14921 | { |
14922 | u32 adr, res; |
14923 | u32 src, dst; |
14924 | |
14925 | adr = AREG(7) - 2; |
14926 | AREG(7) = adr; |
14927 | res = 0; |
14928 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14929 | PRE_IO |
14930 | WRITE_WORD_F(adr, res) |
14931 | POST_IO |
14932 | RET(14) |
14933 | } |
14934 | |
14935 | // CLR |
14936 | OPCODE(0x4280) |
14937 | { |
14938 | u32 adr, res; |
14939 | u32 src, dst; |
14940 | |
14941 | res = 0; |
14942 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14943 | DREGu32((Opcode >> 0) & 7) = res; |
14944 | RET(6) |
14945 | } |
14946 | |
14947 | // CLR |
14948 | OPCODE(0x4290) |
14949 | { |
14950 | u32 adr, res; |
14951 | u32 src, dst; |
14952 | |
14953 | adr = AREG((Opcode >> 0) & 7); |
14954 | res = 0; |
14955 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14956 | PRE_IO |
14957 | WRITE_LONG_F(adr, res) |
14958 | POST_IO |
14959 | RET(20) |
14960 | } |
14961 | |
14962 | // CLR |
14963 | OPCODE(0x4298) |
14964 | { |
14965 | u32 adr, res; |
14966 | u32 src, dst; |
14967 | |
14968 | adr = AREG((Opcode >> 0) & 7); |
14969 | AREG((Opcode >> 0) & 7) += 4; |
14970 | res = 0; |
14971 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14972 | PRE_IO |
14973 | WRITE_LONG_F(adr, res) |
14974 | POST_IO |
14975 | RET(20) |
14976 | } |
14977 | |
14978 | // CLR |
14979 | OPCODE(0x42A0) |
14980 | { |
14981 | u32 adr, res; |
14982 | u32 src, dst; |
14983 | |
14984 | adr = AREG((Opcode >> 0) & 7) - 4; |
14985 | AREG((Opcode >> 0) & 7) = adr; |
14986 | res = 0; |
14987 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14988 | PRE_IO |
14989 | WRITE_LONG_F(adr, res) |
14990 | POST_IO |
14991 | RET(22) |
14992 | } |
14993 | |
14994 | // CLR |
14995 | OPCODE(0x42A8) |
14996 | { |
14997 | u32 adr, res; |
14998 | u32 src, dst; |
14999 | |
15000 | FETCH_SWORD(adr); |
15001 | adr += AREG((Opcode >> 0) & 7); |
15002 | res = 0; |
15003 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15004 | PRE_IO |
15005 | WRITE_LONG_F(adr, res) |
15006 | POST_IO |
15007 | RET(24) |
15008 | } |
15009 | |
15010 | // CLR |
15011 | OPCODE(0x42B0) |
15012 | { |
15013 | u32 adr, res; |
15014 | u32 src, dst; |
15015 | |
15016 | adr = AREG((Opcode >> 0) & 7); |
15017 | DECODE_EXT_WORD |
15018 | res = 0; |
15019 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15020 | PRE_IO |
15021 | WRITE_LONG_F(adr, res) |
15022 | POST_IO |
15023 | RET(26) |
15024 | } |
15025 | |
15026 | // CLR |
15027 | OPCODE(0x42B8) |
15028 | { |
15029 | u32 adr, res; |
15030 | u32 src, dst; |
15031 | |
15032 | FETCH_SWORD(adr); |
15033 | res = 0; |
15034 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15035 | PRE_IO |
15036 | WRITE_LONG_F(adr, res) |
15037 | POST_IO |
15038 | RET(24) |
15039 | } |
15040 | |
15041 | // CLR |
15042 | OPCODE(0x42B9) |
15043 | { |
15044 | u32 adr, res; |
15045 | u32 src, dst; |
15046 | |
15047 | FETCH_LONG(adr); |
15048 | res = 0; |
15049 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15050 | PRE_IO |
15051 | WRITE_LONG_F(adr, res) |
15052 | POST_IO |
15053 | RET(28) |
15054 | } |
15055 | |
15056 | // CLR |
15057 | OPCODE(0x429F) |
15058 | { |
15059 | u32 adr, res; |
15060 | u32 src, dst; |
15061 | |
15062 | adr = AREG(7); |
15063 | AREG(7) += 4; |
15064 | res = 0; |
15065 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15066 | PRE_IO |
15067 | WRITE_LONG_F(adr, res) |
15068 | POST_IO |
15069 | RET(20) |
15070 | } |
15071 | |
15072 | // CLR |
15073 | OPCODE(0x42A7) |
15074 | { |
15075 | u32 adr, res; |
15076 | u32 src, dst; |
15077 | |
15078 | adr = AREG(7) - 4; |
15079 | AREG(7) = adr; |
15080 | res = 0; |
15081 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15082 | PRE_IO |
15083 | WRITE_LONG_F(adr, res) |
15084 | POST_IO |
15085 | RET(22) |
15086 | } |
15087 | |
15088 | // NEG |
15089 | OPCODE(0x4400) |
15090 | { |
15091 | u32 adr, res; |
15092 | u32 src, dst; |
15093 | |
15094 | src = DREGu8((Opcode >> 0) & 7); |
15095 | res = -src; |
15096 | flag_V = res & src; |
15097 | flag_N = flag_X = flag_C = res; |
15098 | flag_NotZ = res & 0xFF; |
15099 | DREGu8((Opcode >> 0) & 7) = res; |
15100 | RET(4) |
15101 | } |
15102 | |
15103 | // NEG |
15104 | OPCODE(0x4410) |
15105 | { |
15106 | u32 adr, res; |
15107 | u32 src, dst; |
15108 | |
15109 | adr = AREG((Opcode >> 0) & 7); |
15110 | PRE_IO |
15111 | READ_BYTE_F(adr, src) |
15112 | res = -src; |
15113 | flag_V = res & src; |
15114 | flag_N = flag_X = flag_C = res; |
15115 | flag_NotZ = res & 0xFF; |
15116 | WRITE_BYTE_F(adr, res) |
15117 | POST_IO |
15118 | RET(12) |
15119 | } |
15120 | |
15121 | // NEG |
15122 | OPCODE(0x4418) |
15123 | { |
15124 | u32 adr, res; |
15125 | u32 src, dst; |
15126 | |
15127 | adr = AREG((Opcode >> 0) & 7); |
15128 | AREG((Opcode >> 0) & 7) += 1; |
15129 | PRE_IO |
15130 | READ_BYTE_F(adr, src) |
15131 | res = -src; |
15132 | flag_V = res & src; |
15133 | flag_N = flag_X = flag_C = res; |
15134 | flag_NotZ = res & 0xFF; |
15135 | WRITE_BYTE_F(adr, res) |
15136 | POST_IO |
15137 | RET(12) |
15138 | } |
15139 | |
15140 | // NEG |
15141 | OPCODE(0x4420) |
15142 | { |
15143 | u32 adr, res; |
15144 | u32 src, dst; |
15145 | |
15146 | adr = AREG((Opcode >> 0) & 7) - 1; |
15147 | AREG((Opcode >> 0) & 7) = adr; |
15148 | PRE_IO |
15149 | READ_BYTE_F(adr, src) |
15150 | res = -src; |
15151 | flag_V = res & src; |
15152 | flag_N = flag_X = flag_C = res; |
15153 | flag_NotZ = res & 0xFF; |
15154 | WRITE_BYTE_F(adr, res) |
15155 | POST_IO |
15156 | RET(14) |
15157 | } |
15158 | |
15159 | // NEG |
15160 | OPCODE(0x4428) |
15161 | { |
15162 | u32 adr, res; |
15163 | u32 src, dst; |
15164 | |
15165 | FETCH_SWORD(adr); |
15166 | adr += AREG((Opcode >> 0) & 7); |
15167 | PRE_IO |
15168 | READ_BYTE_F(adr, src) |
15169 | res = -src; |
15170 | flag_V = res & src; |
15171 | flag_N = flag_X = flag_C = res; |
15172 | flag_NotZ = res & 0xFF; |
15173 | WRITE_BYTE_F(adr, res) |
15174 | POST_IO |
15175 | RET(16) |
15176 | } |
15177 | |
15178 | // NEG |
15179 | OPCODE(0x4430) |
15180 | { |
15181 | u32 adr, res; |
15182 | u32 src, dst; |
15183 | |
15184 | adr = AREG((Opcode >> 0) & 7); |
15185 | DECODE_EXT_WORD |
15186 | PRE_IO |
15187 | READ_BYTE_F(adr, src) |
15188 | res = -src; |
15189 | flag_V = res & src; |
15190 | flag_N = flag_X = flag_C = res; |
15191 | flag_NotZ = res & 0xFF; |
15192 | WRITE_BYTE_F(adr, res) |
15193 | POST_IO |
15194 | RET(18) |
15195 | } |
15196 | |
15197 | // NEG |
15198 | OPCODE(0x4438) |
15199 | { |
15200 | u32 adr, res; |
15201 | u32 src, dst; |
15202 | |
15203 | FETCH_SWORD(adr); |
15204 | PRE_IO |
15205 | READ_BYTE_F(adr, src) |
15206 | res = -src; |
15207 | flag_V = res & src; |
15208 | flag_N = flag_X = flag_C = res; |
15209 | flag_NotZ = res & 0xFF; |
15210 | WRITE_BYTE_F(adr, res) |
15211 | POST_IO |
15212 | RET(16) |
15213 | } |
15214 | |
15215 | // NEG |
15216 | OPCODE(0x4439) |
15217 | { |
15218 | u32 adr, res; |
15219 | u32 src, dst; |
15220 | |
15221 | FETCH_LONG(adr); |
15222 | PRE_IO |
15223 | READ_BYTE_F(adr, src) |
15224 | res = -src; |
15225 | flag_V = res & src; |
15226 | flag_N = flag_X = flag_C = res; |
15227 | flag_NotZ = res & 0xFF; |
15228 | WRITE_BYTE_F(adr, res) |
15229 | POST_IO |
15230 | RET(20) |
15231 | } |
15232 | |
15233 | // NEG |
15234 | OPCODE(0x441F) |
15235 | { |
15236 | u32 adr, res; |
15237 | u32 src, dst; |
15238 | |
15239 | adr = AREG(7); |
15240 | AREG(7) += 2; |
15241 | PRE_IO |
15242 | READ_BYTE_F(adr, src) |
15243 | res = -src; |
15244 | flag_V = res & src; |
15245 | flag_N = flag_X = flag_C = res; |
15246 | flag_NotZ = res & 0xFF; |
15247 | WRITE_BYTE_F(adr, res) |
15248 | POST_IO |
15249 | RET(12) |
15250 | } |
15251 | |
15252 | // NEG |
15253 | OPCODE(0x4427) |
15254 | { |
15255 | u32 adr, res; |
15256 | u32 src, dst; |
15257 | |
15258 | adr = AREG(7) - 2; |
15259 | AREG(7) = adr; |
15260 | PRE_IO |
15261 | READ_BYTE_F(adr, src) |
15262 | res = -src; |
15263 | flag_V = res & src; |
15264 | flag_N = flag_X = flag_C = res; |
15265 | flag_NotZ = res & 0xFF; |
15266 | WRITE_BYTE_F(adr, res) |
15267 | POST_IO |
15268 | RET(14) |
15269 | } |
15270 | |
15271 | // NEG |
15272 | OPCODE(0x4440) |
15273 | { |
15274 | u32 adr, res; |
15275 | u32 src, dst; |
15276 | |
15277 | src = DREGu16((Opcode >> 0) & 7); |
15278 | res = -src; |
15279 | flag_V = (res & src) >> 8; |
15280 | flag_N = flag_X = flag_C = res >> 8; |
15281 | flag_NotZ = res & 0xFFFF; |
15282 | DREGu16((Opcode >> 0) & 7) = res; |
15283 | RET(4) |
15284 | } |
15285 | |
15286 | // NEG |
15287 | OPCODE(0x4450) |
15288 | { |
15289 | u32 adr, res; |
15290 | u32 src, dst; |
15291 | |
15292 | adr = AREG((Opcode >> 0) & 7); |
15293 | PRE_IO |
15294 | READ_WORD_F(adr, src) |
15295 | res = -src; |
15296 | flag_V = (res & src) >> 8; |
15297 | flag_N = flag_X = flag_C = res >> 8; |
15298 | flag_NotZ = res & 0xFFFF; |
15299 | WRITE_WORD_F(adr, res) |
15300 | POST_IO |
15301 | RET(12) |
15302 | } |
15303 | |
15304 | // NEG |
15305 | OPCODE(0x4458) |
15306 | { |
15307 | u32 adr, res; |
15308 | u32 src, dst; |
15309 | |
15310 | adr = AREG((Opcode >> 0) & 7); |
15311 | AREG((Opcode >> 0) & 7) += 2; |
15312 | PRE_IO |
15313 | READ_WORD_F(adr, src) |
15314 | res = -src; |
15315 | flag_V = (res & src) >> 8; |
15316 | flag_N = flag_X = flag_C = res >> 8; |
15317 | flag_NotZ = res & 0xFFFF; |
15318 | WRITE_WORD_F(adr, res) |
15319 | POST_IO |
15320 | RET(12) |
15321 | } |
15322 | |
15323 | // NEG |
15324 | OPCODE(0x4460) |
15325 | { |
15326 | u32 adr, res; |
15327 | u32 src, dst; |
15328 | |
15329 | adr = AREG((Opcode >> 0) & 7) - 2; |
15330 | AREG((Opcode >> 0) & 7) = adr; |
15331 | PRE_IO |
15332 | READ_WORD_F(adr, src) |
15333 | res = -src; |
15334 | flag_V = (res & src) >> 8; |
15335 | flag_N = flag_X = flag_C = res >> 8; |
15336 | flag_NotZ = res & 0xFFFF; |
15337 | WRITE_WORD_F(adr, res) |
15338 | POST_IO |
15339 | RET(14) |
15340 | } |
15341 | |
15342 | // NEG |
15343 | OPCODE(0x4468) |
15344 | { |
15345 | u32 adr, res; |
15346 | u32 src, dst; |
15347 | |
15348 | FETCH_SWORD(adr); |
15349 | adr += AREG((Opcode >> 0) & 7); |
15350 | PRE_IO |
15351 | READ_WORD_F(adr, src) |
15352 | res = -src; |
15353 | flag_V = (res & src) >> 8; |
15354 | flag_N = flag_X = flag_C = res >> 8; |
15355 | flag_NotZ = res & 0xFFFF; |
15356 | WRITE_WORD_F(adr, res) |
15357 | POST_IO |
15358 | RET(16) |
15359 | } |
15360 | |
15361 | // NEG |
15362 | OPCODE(0x4470) |
15363 | { |
15364 | u32 adr, res; |
15365 | u32 src, dst; |
15366 | |
15367 | adr = AREG((Opcode >> 0) & 7); |
15368 | DECODE_EXT_WORD |
15369 | PRE_IO |
15370 | READ_WORD_F(adr, src) |
15371 | res = -src; |
15372 | flag_V = (res & src) >> 8; |
15373 | flag_N = flag_X = flag_C = res >> 8; |
15374 | flag_NotZ = res & 0xFFFF; |
15375 | WRITE_WORD_F(adr, res) |
15376 | POST_IO |
15377 | RET(18) |
15378 | } |
15379 | |
15380 | // NEG |
15381 | OPCODE(0x4478) |
15382 | { |
15383 | u32 adr, res; |
15384 | u32 src, dst; |
15385 | |
15386 | FETCH_SWORD(adr); |
15387 | PRE_IO |
15388 | READ_WORD_F(adr, src) |
15389 | res = -src; |
15390 | flag_V = (res & src) >> 8; |
15391 | flag_N = flag_X = flag_C = res >> 8; |
15392 | flag_NotZ = res & 0xFFFF; |
15393 | WRITE_WORD_F(adr, res) |
15394 | POST_IO |
15395 | RET(16) |
15396 | } |
15397 | |
15398 | // NEG |
15399 | OPCODE(0x4479) |
15400 | { |
15401 | u32 adr, res; |
15402 | u32 src, dst; |
15403 | |
15404 | FETCH_LONG(adr); |
15405 | PRE_IO |
15406 | READ_WORD_F(adr, src) |
15407 | res = -src; |
15408 | flag_V = (res & src) >> 8; |
15409 | flag_N = flag_X = flag_C = res >> 8; |
15410 | flag_NotZ = res & 0xFFFF; |
15411 | WRITE_WORD_F(adr, res) |
15412 | POST_IO |
15413 | RET(20) |
15414 | } |
15415 | |
15416 | // NEG |
15417 | OPCODE(0x445F) |
15418 | { |
15419 | u32 adr, res; |
15420 | u32 src, dst; |
15421 | |
15422 | adr = AREG(7); |
15423 | AREG(7) += 2; |
15424 | PRE_IO |
15425 | READ_WORD_F(adr, src) |
15426 | res = -src; |
15427 | flag_V = (res & src) >> 8; |
15428 | flag_N = flag_X = flag_C = res >> 8; |
15429 | flag_NotZ = res & 0xFFFF; |
15430 | WRITE_WORD_F(adr, res) |
15431 | POST_IO |
15432 | RET(12) |
15433 | } |
15434 | |
15435 | // NEG |
15436 | OPCODE(0x4467) |
15437 | { |
15438 | u32 adr, res; |
15439 | u32 src, dst; |
15440 | |
15441 | adr = AREG(7) - 2; |
15442 | AREG(7) = adr; |
15443 | PRE_IO |
15444 | READ_WORD_F(adr, src) |
15445 | res = -src; |
15446 | flag_V = (res & src) >> 8; |
15447 | flag_N = flag_X = flag_C = res >> 8; |
15448 | flag_NotZ = res & 0xFFFF; |
15449 | WRITE_WORD_F(adr, res) |
15450 | POST_IO |
15451 | RET(14) |
15452 | } |
15453 | |
15454 | // NEG |
15455 | OPCODE(0x4480) |
15456 | { |
15457 | u32 adr, res; |
15458 | u32 src, dst; |
15459 | |
15460 | src = DREGu32((Opcode >> 0) & 7); |
15461 | res = -src; |
15462 | flag_NotZ = res; |
15463 | flag_V = (res & src) >> 24; |
15464 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15465 | flag_N = res >> 24; |
15466 | DREGu32((Opcode >> 0) & 7) = res; |
15467 | RET(6) |
15468 | } |
15469 | |
15470 | // NEG |
15471 | OPCODE(0x4490) |
15472 | { |
15473 | u32 adr, res; |
15474 | u32 src, dst; |
15475 | |
15476 | adr = AREG((Opcode >> 0) & 7); |
15477 | PRE_IO |
15478 | READ_LONG_F(adr, src) |
15479 | res = -src; |
15480 | flag_NotZ = res; |
15481 | flag_V = (res & src) >> 24; |
15482 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15483 | flag_N = res >> 24; |
15484 | WRITE_LONG_F(adr, res) |
15485 | POST_IO |
15486 | RET(20) |
15487 | } |
15488 | |
15489 | // NEG |
15490 | OPCODE(0x4498) |
15491 | { |
15492 | u32 adr, res; |
15493 | u32 src, dst; |
15494 | |
15495 | adr = AREG((Opcode >> 0) & 7); |
15496 | AREG((Opcode >> 0) & 7) += 4; |
15497 | PRE_IO |
15498 | READ_LONG_F(adr, src) |
15499 | res = -src; |
15500 | flag_NotZ = res; |
15501 | flag_V = (res & src) >> 24; |
15502 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15503 | flag_N = res >> 24; |
15504 | WRITE_LONG_F(adr, res) |
15505 | POST_IO |
15506 | RET(20) |
15507 | } |
15508 | |
15509 | // NEG |
15510 | OPCODE(0x44A0) |
15511 | { |
15512 | u32 adr, res; |
15513 | u32 src, dst; |
15514 | |
15515 | adr = AREG((Opcode >> 0) & 7) - 4; |
15516 | AREG((Opcode >> 0) & 7) = adr; |
15517 | PRE_IO |
15518 | READ_LONG_F(adr, src) |
15519 | res = -src; |
15520 | flag_NotZ = res; |
15521 | flag_V = (res & src) >> 24; |
15522 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15523 | flag_N = res >> 24; |
15524 | WRITE_LONG_F(adr, res) |
15525 | POST_IO |
15526 | RET(22) |
15527 | } |
15528 | |
15529 | // NEG |
15530 | OPCODE(0x44A8) |
15531 | { |
15532 | u32 adr, res; |
15533 | u32 src, dst; |
15534 | |
15535 | FETCH_SWORD(adr); |
15536 | adr += AREG((Opcode >> 0) & 7); |
15537 | PRE_IO |
15538 | READ_LONG_F(adr, src) |
15539 | res = -src; |
15540 | flag_NotZ = res; |
15541 | flag_V = (res & src) >> 24; |
15542 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15543 | flag_N = res >> 24; |
15544 | WRITE_LONG_F(adr, res) |
15545 | POST_IO |
15546 | RET(24) |
15547 | } |
15548 | |
15549 | // NEG |
15550 | OPCODE(0x44B0) |
15551 | { |
15552 | u32 adr, res; |
15553 | u32 src, dst; |
15554 | |
15555 | adr = AREG((Opcode >> 0) & 7); |
15556 | DECODE_EXT_WORD |
15557 | PRE_IO |
15558 | READ_LONG_F(adr, src) |
15559 | res = -src; |
15560 | flag_NotZ = res; |
15561 | flag_V = (res & src) >> 24; |
15562 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15563 | flag_N = res >> 24; |
15564 | WRITE_LONG_F(adr, res) |
15565 | POST_IO |
15566 | RET(26) |
15567 | } |
15568 | |
15569 | // NEG |
15570 | OPCODE(0x44B8) |
15571 | { |
15572 | u32 adr, res; |
15573 | u32 src, dst; |
15574 | |
15575 | FETCH_SWORD(adr); |
15576 | PRE_IO |
15577 | READ_LONG_F(adr, src) |
15578 | res = -src; |
15579 | flag_NotZ = res; |
15580 | flag_V = (res & src) >> 24; |
15581 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15582 | flag_N = res >> 24; |
15583 | WRITE_LONG_F(adr, res) |
15584 | POST_IO |
15585 | RET(24) |
15586 | } |
15587 | |
15588 | // NEG |
15589 | OPCODE(0x44B9) |
15590 | { |
15591 | u32 adr, res; |
15592 | u32 src, dst; |
15593 | |
15594 | FETCH_LONG(adr); |
15595 | PRE_IO |
15596 | READ_LONG_F(adr, src) |
15597 | res = -src; |
15598 | flag_NotZ = res; |
15599 | flag_V = (res & src) >> 24; |
15600 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15601 | flag_N = res >> 24; |
15602 | WRITE_LONG_F(adr, res) |
15603 | POST_IO |
15604 | RET(28) |
15605 | } |
15606 | |
15607 | // NEG |
15608 | OPCODE(0x449F) |
15609 | { |
15610 | u32 adr, res; |
15611 | u32 src, dst; |
15612 | |
15613 | adr = AREG(7); |
15614 | AREG(7) += 4; |
15615 | PRE_IO |
15616 | READ_LONG_F(adr, src) |
15617 | res = -src; |
15618 | flag_NotZ = res; |
15619 | flag_V = (res & src) >> 24; |
15620 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15621 | flag_N = res >> 24; |
15622 | WRITE_LONG_F(adr, res) |
15623 | POST_IO |
15624 | RET(20) |
15625 | } |
15626 | |
15627 | // NEG |
15628 | OPCODE(0x44A7) |
15629 | { |
15630 | u32 adr, res; |
15631 | u32 src, dst; |
15632 | |
15633 | adr = AREG(7) - 4; |
15634 | AREG(7) = adr; |
15635 | PRE_IO |
15636 | READ_LONG_F(adr, src) |
15637 | res = -src; |
15638 | flag_NotZ = res; |
15639 | flag_V = (res & src) >> 24; |
15640 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15641 | flag_N = res >> 24; |
15642 | WRITE_LONG_F(adr, res) |
15643 | POST_IO |
15644 | RET(22) |
15645 | } |
15646 | |
15647 | // NOT |
15648 | OPCODE(0x4600) |
15649 | { |
15650 | u32 adr, res; |
15651 | u32 src, dst; |
15652 | |
15653 | src = DREGu8((Opcode >> 0) & 7); |
15654 | res = ~src; |
15655 | flag_C = 0; |
15656 | flag_V = 0; |
15657 | flag_N = res; |
15658 | flag_NotZ = res & 0xFF; |
15659 | DREGu8((Opcode >> 0) & 7) = res; |
15660 | RET(4) |
15661 | } |
15662 | |
15663 | // NOT |
15664 | OPCODE(0x4610) |
15665 | { |
15666 | u32 adr, res; |
15667 | u32 src, dst; |
15668 | |
15669 | adr = AREG((Opcode >> 0) & 7); |
15670 | PRE_IO |
15671 | READ_BYTE_F(adr, src) |
15672 | res = ~src; |
15673 | flag_C = 0; |
15674 | flag_V = 0; |
15675 | flag_N = res; |
15676 | flag_NotZ = res & 0xFF; |
15677 | WRITE_BYTE_F(adr, res) |
15678 | POST_IO |
15679 | RET(12) |
15680 | } |
15681 | |
15682 | // NOT |
15683 | OPCODE(0x4618) |
15684 | { |
15685 | u32 adr, res; |
15686 | u32 src, dst; |
15687 | |
15688 | adr = AREG((Opcode >> 0) & 7); |
15689 | AREG((Opcode >> 0) & 7) += 1; |
15690 | PRE_IO |
15691 | READ_BYTE_F(adr, src) |
15692 | res = ~src; |
15693 | flag_C = 0; |
15694 | flag_V = 0; |
15695 | flag_N = res; |
15696 | flag_NotZ = res & 0xFF; |
15697 | WRITE_BYTE_F(adr, res) |
15698 | POST_IO |
15699 | RET(12) |
15700 | } |
15701 | |
15702 | // NOT |
15703 | OPCODE(0x4620) |
15704 | { |
15705 | u32 adr, res; |
15706 | u32 src, dst; |
15707 | |
15708 | adr = AREG((Opcode >> 0) & 7) - 1; |
15709 | AREG((Opcode >> 0) & 7) = adr; |
15710 | PRE_IO |
15711 | READ_BYTE_F(adr, src) |
15712 | res = ~src; |
15713 | flag_C = 0; |
15714 | flag_V = 0; |
15715 | flag_N = res; |
15716 | flag_NotZ = res & 0xFF; |
15717 | WRITE_BYTE_F(adr, res) |
15718 | POST_IO |
15719 | RET(14) |
15720 | } |
15721 | |
15722 | // NOT |
15723 | OPCODE(0x4628) |
15724 | { |
15725 | u32 adr, res; |
15726 | u32 src, dst; |
15727 | |
15728 | FETCH_SWORD(adr); |
15729 | adr += AREG((Opcode >> 0) & 7); |
15730 | PRE_IO |
15731 | READ_BYTE_F(adr, src) |
15732 | res = ~src; |
15733 | flag_C = 0; |
15734 | flag_V = 0; |
15735 | flag_N = res; |
15736 | flag_NotZ = res & 0xFF; |
15737 | WRITE_BYTE_F(adr, res) |
15738 | POST_IO |
15739 | RET(16) |
15740 | } |
15741 | |
15742 | // NOT |
15743 | OPCODE(0x4630) |
15744 | { |
15745 | u32 adr, res; |
15746 | u32 src, dst; |
15747 | |
15748 | adr = AREG((Opcode >> 0) & 7); |
15749 | DECODE_EXT_WORD |
15750 | PRE_IO |
15751 | READ_BYTE_F(adr, src) |
15752 | res = ~src; |
15753 | flag_C = 0; |
15754 | flag_V = 0; |
15755 | flag_N = res; |
15756 | flag_NotZ = res & 0xFF; |
15757 | WRITE_BYTE_F(adr, res) |
15758 | POST_IO |
15759 | RET(18) |
15760 | } |
15761 | |
15762 | // NOT |
15763 | OPCODE(0x4638) |
15764 | { |
15765 | u32 adr, res; |
15766 | u32 src, dst; |
15767 | |
15768 | FETCH_SWORD(adr); |
15769 | PRE_IO |
15770 | READ_BYTE_F(adr, src) |
15771 | res = ~src; |
15772 | flag_C = 0; |
15773 | flag_V = 0; |
15774 | flag_N = res; |
15775 | flag_NotZ = res & 0xFF; |
15776 | WRITE_BYTE_F(adr, res) |
15777 | POST_IO |
15778 | RET(16) |
15779 | } |
15780 | |
15781 | // NOT |
15782 | OPCODE(0x4639) |
15783 | { |
15784 | u32 adr, res; |
15785 | u32 src, dst; |
15786 | |
15787 | FETCH_LONG(adr); |
15788 | PRE_IO |
15789 | READ_BYTE_F(adr, src) |
15790 | res = ~src; |
15791 | flag_C = 0; |
15792 | flag_V = 0; |
15793 | flag_N = res; |
15794 | flag_NotZ = res & 0xFF; |
15795 | WRITE_BYTE_F(adr, res) |
15796 | POST_IO |
15797 | RET(20) |
15798 | } |
15799 | |
15800 | // NOT |
15801 | OPCODE(0x461F) |
15802 | { |
15803 | u32 adr, res; |
15804 | u32 src, dst; |
15805 | |
15806 | adr = AREG(7); |
15807 | AREG(7) += 2; |
15808 | PRE_IO |
15809 | READ_BYTE_F(adr, src) |
15810 | res = ~src; |
15811 | flag_C = 0; |
15812 | flag_V = 0; |
15813 | flag_N = res; |
15814 | flag_NotZ = res & 0xFF; |
15815 | WRITE_BYTE_F(adr, res) |
15816 | POST_IO |
15817 | RET(12) |
15818 | } |
15819 | |
15820 | // NOT |
15821 | OPCODE(0x4627) |
15822 | { |
15823 | u32 adr, res; |
15824 | u32 src, dst; |
15825 | |
15826 | adr = AREG(7) - 2; |
15827 | AREG(7) = adr; |
15828 | PRE_IO |
15829 | READ_BYTE_F(adr, src) |
15830 | res = ~src; |
15831 | flag_C = 0; |
15832 | flag_V = 0; |
15833 | flag_N = res; |
15834 | flag_NotZ = res & 0xFF; |
15835 | WRITE_BYTE_F(adr, res) |
15836 | POST_IO |
15837 | RET(14) |
15838 | } |
15839 | |
15840 | // NOT |
15841 | OPCODE(0x4640) |
15842 | { |
15843 | u32 adr, res; |
15844 | u32 src, dst; |
15845 | |
15846 | src = DREGu16((Opcode >> 0) & 7); |
15847 | res = ~src; |
15848 | flag_C = 0; |
15849 | flag_V = 0; |
15850 | flag_NotZ = res & 0xFFFF; |
15851 | flag_N = res >> 8; |
15852 | DREGu16((Opcode >> 0) & 7) = res; |
15853 | RET(4) |
15854 | } |
15855 | |
15856 | // NOT |
15857 | OPCODE(0x4650) |
15858 | { |
15859 | u32 adr, res; |
15860 | u32 src, dst; |
15861 | |
15862 | adr = AREG((Opcode >> 0) & 7); |
15863 | PRE_IO |
15864 | READ_WORD_F(adr, src) |
15865 | res = ~src; |
15866 | flag_C = 0; |
15867 | flag_V = 0; |
15868 | flag_NotZ = res & 0xFFFF; |
15869 | flag_N = res >> 8; |
15870 | WRITE_WORD_F(adr, res) |
15871 | POST_IO |
15872 | RET(12) |
15873 | } |
15874 | |
15875 | // NOT |
15876 | OPCODE(0x4658) |
15877 | { |
15878 | u32 adr, res; |
15879 | u32 src, dst; |
15880 | |
15881 | adr = AREG((Opcode >> 0) & 7); |
15882 | AREG((Opcode >> 0) & 7) += 2; |
15883 | PRE_IO |
15884 | READ_WORD_F(adr, src) |
15885 | res = ~src; |
15886 | flag_C = 0; |
15887 | flag_V = 0; |
15888 | flag_NotZ = res & 0xFFFF; |
15889 | flag_N = res >> 8; |
15890 | WRITE_WORD_F(adr, res) |
15891 | POST_IO |
15892 | RET(12) |
15893 | } |
15894 | |
15895 | // NOT |
15896 | OPCODE(0x4660) |
15897 | { |
15898 | u32 adr, res; |
15899 | u32 src, dst; |
15900 | |
15901 | adr = AREG((Opcode >> 0) & 7) - 2; |
15902 | AREG((Opcode >> 0) & 7) = adr; |
15903 | PRE_IO |
15904 | READ_WORD_F(adr, src) |
15905 | res = ~src; |
15906 | flag_C = 0; |
15907 | flag_V = 0; |
15908 | flag_NotZ = res & 0xFFFF; |
15909 | flag_N = res >> 8; |
15910 | WRITE_WORD_F(adr, res) |
15911 | POST_IO |
15912 | RET(14) |
15913 | } |
15914 | |
15915 | // NOT |
15916 | OPCODE(0x4668) |
15917 | { |
15918 | u32 adr, res; |
15919 | u32 src, dst; |
15920 | |
15921 | FETCH_SWORD(adr); |
15922 | adr += AREG((Opcode >> 0) & 7); |
15923 | PRE_IO |
15924 | READ_WORD_F(adr, src) |
15925 | res = ~src; |
15926 | flag_C = 0; |
15927 | flag_V = 0; |
15928 | flag_NotZ = res & 0xFFFF; |
15929 | flag_N = res >> 8; |
15930 | WRITE_WORD_F(adr, res) |
15931 | POST_IO |
15932 | RET(16) |
15933 | } |
15934 | |
15935 | // NOT |
15936 | OPCODE(0x4670) |
15937 | { |
15938 | u32 adr, res; |
15939 | u32 src, dst; |
15940 | |
15941 | adr = AREG((Opcode >> 0) & 7); |
15942 | DECODE_EXT_WORD |
15943 | PRE_IO |
15944 | READ_WORD_F(adr, src) |
15945 | res = ~src; |
15946 | flag_C = 0; |
15947 | flag_V = 0; |
15948 | flag_NotZ = res & 0xFFFF; |
15949 | flag_N = res >> 8; |
15950 | WRITE_WORD_F(adr, res) |
15951 | POST_IO |
15952 | RET(18) |
15953 | } |
15954 | |
15955 | // NOT |
15956 | OPCODE(0x4678) |
15957 | { |
15958 | u32 adr, res; |
15959 | u32 src, dst; |
15960 | |
15961 | FETCH_SWORD(adr); |
15962 | PRE_IO |
15963 | READ_WORD_F(adr, src) |
15964 | res = ~src; |
15965 | flag_C = 0; |
15966 | flag_V = 0; |
15967 | flag_NotZ = res & 0xFFFF; |
15968 | flag_N = res >> 8; |
15969 | WRITE_WORD_F(adr, res) |
15970 | POST_IO |
15971 | RET(16) |
15972 | } |
15973 | |
15974 | // NOT |
15975 | OPCODE(0x4679) |
15976 | { |
15977 | u32 adr, res; |
15978 | u32 src, dst; |
15979 | |
15980 | FETCH_LONG(adr); |
15981 | PRE_IO |
15982 | READ_WORD_F(adr, src) |
15983 | res = ~src; |
15984 | flag_C = 0; |
15985 | flag_V = 0; |
15986 | flag_NotZ = res & 0xFFFF; |
15987 | flag_N = res >> 8; |
15988 | WRITE_WORD_F(adr, res) |
15989 | POST_IO |
15990 | RET(20) |
15991 | } |
15992 | |
15993 | // NOT |
15994 | OPCODE(0x465F) |
15995 | { |
15996 | u32 adr, res; |
15997 | u32 src, dst; |
15998 | |
15999 | adr = AREG(7); |
16000 | AREG(7) += 2; |
16001 | PRE_IO |
16002 | READ_WORD_F(adr, src) |
16003 | res = ~src; |
16004 | flag_C = 0; |
16005 | flag_V = 0; |
16006 | flag_NotZ = res & 0xFFFF; |
16007 | flag_N = res >> 8; |
16008 | WRITE_WORD_F(adr, res) |
16009 | POST_IO |
16010 | RET(12) |
16011 | } |
16012 | |
16013 | // NOT |
16014 | OPCODE(0x4667) |
16015 | { |
16016 | u32 adr, res; |
16017 | u32 src, dst; |
16018 | |
16019 | adr = AREG(7) - 2; |
16020 | AREG(7) = adr; |
16021 | PRE_IO |
16022 | READ_WORD_F(adr, src) |
16023 | res = ~src; |
16024 | flag_C = 0; |
16025 | flag_V = 0; |
16026 | flag_NotZ = res & 0xFFFF; |
16027 | flag_N = res >> 8; |
16028 | WRITE_WORD_F(adr, res) |
16029 | POST_IO |
16030 | RET(14) |
16031 | } |
16032 | |
16033 | // NOT |
16034 | OPCODE(0x4680) |
16035 | { |
16036 | u32 adr, res; |
16037 | u32 src, dst; |
16038 | |
16039 | src = DREGu32((Opcode >> 0) & 7); |
16040 | res = ~src; |
16041 | flag_C = 0; |
16042 | flag_V = 0; |
16043 | flag_NotZ = res; |
16044 | flag_N = res >> 24; |
16045 | DREGu32((Opcode >> 0) & 7) = res; |
16046 | RET(6) |
16047 | } |
16048 | |
16049 | // NOT |
16050 | OPCODE(0x4690) |
16051 | { |
16052 | u32 adr, res; |
16053 | u32 src, dst; |
16054 | |
16055 | adr = AREG((Opcode >> 0) & 7); |
16056 | PRE_IO |
16057 | READ_LONG_F(adr, src) |
16058 | res = ~src; |
16059 | flag_C = 0; |
16060 | flag_V = 0; |
16061 | flag_NotZ = res; |
16062 | flag_N = res >> 24; |
16063 | WRITE_LONG_F(adr, res) |
16064 | POST_IO |
16065 | RET(20) |
16066 | } |
16067 | |
16068 | // NOT |
16069 | OPCODE(0x4698) |
16070 | { |
16071 | u32 adr, res; |
16072 | u32 src, dst; |
16073 | |
16074 | adr = AREG((Opcode >> 0) & 7); |
16075 | AREG((Opcode >> 0) & 7) += 4; |
16076 | PRE_IO |
16077 | READ_LONG_F(adr, src) |
16078 | res = ~src; |
16079 | flag_C = 0; |
16080 | flag_V = 0; |
16081 | flag_NotZ = res; |
16082 | flag_N = res >> 24; |
16083 | WRITE_LONG_F(adr, res) |
16084 | POST_IO |
16085 | RET(20) |
16086 | } |
16087 | |
16088 | // NOT |
16089 | OPCODE(0x46A0) |
16090 | { |
16091 | u32 adr, res; |
16092 | u32 src, dst; |
16093 | |
16094 | adr = AREG((Opcode >> 0) & 7) - 4; |
16095 | AREG((Opcode >> 0) & 7) = adr; |
16096 | PRE_IO |
16097 | READ_LONG_F(adr, src) |
16098 | res = ~src; |
16099 | flag_C = 0; |
16100 | flag_V = 0; |
16101 | flag_NotZ = res; |
16102 | flag_N = res >> 24; |
16103 | WRITE_LONG_F(adr, res) |
16104 | POST_IO |
16105 | RET(22) |
16106 | } |
16107 | |
16108 | // NOT |
16109 | OPCODE(0x46A8) |
16110 | { |
16111 | u32 adr, res; |
16112 | u32 src, dst; |
16113 | |
16114 | FETCH_SWORD(adr); |
16115 | adr += AREG((Opcode >> 0) & 7); |
16116 | PRE_IO |
16117 | READ_LONG_F(adr, src) |
16118 | res = ~src; |
16119 | flag_C = 0; |
16120 | flag_V = 0; |
16121 | flag_NotZ = res; |
16122 | flag_N = res >> 24; |
16123 | WRITE_LONG_F(adr, res) |
16124 | POST_IO |
16125 | RET(24) |
16126 | } |
16127 | |
16128 | // NOT |
16129 | OPCODE(0x46B0) |
16130 | { |
16131 | u32 adr, res; |
16132 | u32 src, dst; |
16133 | |
16134 | adr = AREG((Opcode >> 0) & 7); |
16135 | DECODE_EXT_WORD |
16136 | PRE_IO |
16137 | READ_LONG_F(adr, src) |
16138 | res = ~src; |
16139 | flag_C = 0; |
16140 | flag_V = 0; |
16141 | flag_NotZ = res; |
16142 | flag_N = res >> 24; |
16143 | WRITE_LONG_F(adr, res) |
16144 | POST_IO |
16145 | RET(26) |
16146 | } |
16147 | |
16148 | // NOT |
16149 | OPCODE(0x46B8) |
16150 | { |
16151 | u32 adr, res; |
16152 | u32 src, dst; |
16153 | |
16154 | FETCH_SWORD(adr); |
16155 | PRE_IO |
16156 | READ_LONG_F(adr, src) |
16157 | res = ~src; |
16158 | flag_C = 0; |
16159 | flag_V = 0; |
16160 | flag_NotZ = res; |
16161 | flag_N = res >> 24; |
16162 | WRITE_LONG_F(adr, res) |
16163 | POST_IO |
16164 | RET(24) |
16165 | } |
16166 | |
16167 | // NOT |
16168 | OPCODE(0x46B9) |
16169 | { |
16170 | u32 adr, res; |
16171 | u32 src, dst; |
16172 | |
16173 | FETCH_LONG(adr); |
16174 | PRE_IO |
16175 | READ_LONG_F(adr, src) |
16176 | res = ~src; |
16177 | flag_C = 0; |
16178 | flag_V = 0; |
16179 | flag_NotZ = res; |
16180 | flag_N = res >> 24; |
16181 | WRITE_LONG_F(adr, res) |
16182 | POST_IO |
16183 | RET(28) |
16184 | } |
16185 | |
16186 | // NOT |
16187 | OPCODE(0x469F) |
16188 | { |
16189 | u32 adr, res; |
16190 | u32 src, dst; |
16191 | |
16192 | adr = AREG(7); |
16193 | AREG(7) += 4; |
16194 | PRE_IO |
16195 | READ_LONG_F(adr, src) |
16196 | res = ~src; |
16197 | flag_C = 0; |
16198 | flag_V = 0; |
16199 | flag_NotZ = res; |
16200 | flag_N = res >> 24; |
16201 | WRITE_LONG_F(adr, res) |
16202 | POST_IO |
16203 | RET(20) |
16204 | } |
16205 | |
16206 | // NOT |
16207 | OPCODE(0x46A7) |
16208 | { |
16209 | u32 adr, res; |
16210 | u32 src, dst; |
16211 | |
16212 | adr = AREG(7) - 4; |
16213 | AREG(7) = adr; |
16214 | PRE_IO |
16215 | READ_LONG_F(adr, src) |
16216 | res = ~src; |
16217 | flag_C = 0; |
16218 | flag_V = 0; |
16219 | flag_NotZ = res; |
16220 | flag_N = res >> 24; |
16221 | WRITE_LONG_F(adr, res) |
16222 | POST_IO |
16223 | RET(22) |
16224 | } |
16225 | |
16226 | // MOVESRa |
16227 | OPCODE(0x40C0) |
16228 | { |
16229 | u32 adr, res; |
16230 | u32 src, dst; |
16231 | |
16232 | res = GET_SR; |
16233 | DREGu16((Opcode >> 0) & 7) = res; |
16234 | RET(6) |
16235 | } |
16236 | |
16237 | // MOVESRa |
16238 | OPCODE(0x40D0) |
16239 | { |
16240 | u32 adr, res; |
16241 | u32 src, dst; |
16242 | |
16243 | res = GET_SR; |
16244 | adr = AREG((Opcode >> 0) & 7); |
16245 | PRE_IO |
16246 | WRITE_WORD_F(adr, res) |
16247 | POST_IO |
16248 | RET(12) |
16249 | } |
16250 | |
16251 | // MOVESRa |
16252 | OPCODE(0x40D8) |
16253 | { |
16254 | u32 adr, res; |
16255 | u32 src, dst; |
16256 | |
16257 | res = GET_SR; |
16258 | adr = AREG((Opcode >> 0) & 7); |
16259 | AREG((Opcode >> 0) & 7) += 2; |
16260 | PRE_IO |
16261 | WRITE_WORD_F(adr, res) |
16262 | POST_IO |
16263 | RET(12) |
16264 | } |
16265 | |
16266 | // MOVESRa |
16267 | OPCODE(0x40E0) |
16268 | { |
16269 | u32 adr, res; |
16270 | u32 src, dst; |
16271 | |
16272 | res = GET_SR; |
16273 | adr = AREG((Opcode >> 0) & 7) - 2; |
16274 | AREG((Opcode >> 0) & 7) = adr; |
16275 | PRE_IO |
16276 | WRITE_WORD_F(adr, res) |
16277 | POST_IO |
16278 | RET(14) |
16279 | } |
16280 | |
16281 | // MOVESRa |
16282 | OPCODE(0x40E8) |
16283 | { |
16284 | u32 adr, res; |
16285 | u32 src, dst; |
16286 | |
16287 | res = GET_SR; |
16288 | FETCH_SWORD(adr); |
16289 | adr += AREG((Opcode >> 0) & 7); |
16290 | PRE_IO |
16291 | WRITE_WORD_F(adr, res) |
16292 | POST_IO |
16293 | RET(16) |
16294 | } |
16295 | |
16296 | // MOVESRa |
16297 | OPCODE(0x40F0) |
16298 | { |
16299 | u32 adr, res; |
16300 | u32 src, dst; |
16301 | |
16302 | res = GET_SR; |
16303 | adr = AREG((Opcode >> 0) & 7); |
16304 | DECODE_EXT_WORD |
16305 | PRE_IO |
16306 | WRITE_WORD_F(adr, res) |
16307 | POST_IO |
16308 | RET(18) |
16309 | } |
16310 | |
16311 | // MOVESRa |
16312 | OPCODE(0x40F8) |
16313 | { |
16314 | u32 adr, res; |
16315 | u32 src, dst; |
16316 | |
16317 | res = GET_SR; |
16318 | FETCH_SWORD(adr); |
16319 | PRE_IO |
16320 | WRITE_WORD_F(adr, res) |
16321 | POST_IO |
16322 | RET(16) |
16323 | } |
16324 | |
16325 | // MOVESRa |
16326 | OPCODE(0x40F9) |
16327 | { |
16328 | u32 adr, res; |
16329 | u32 src, dst; |
16330 | |
16331 | res = GET_SR; |
16332 | FETCH_LONG(adr); |
16333 | PRE_IO |
16334 | WRITE_WORD_F(adr, res) |
16335 | POST_IO |
16336 | RET(20) |
16337 | } |
16338 | |
16339 | // MOVESRa |
16340 | OPCODE(0x40DF) |
16341 | { |
16342 | u32 adr, res; |
16343 | u32 src, dst; |
16344 | |
16345 | res = GET_SR; |
16346 | adr = AREG(7); |
16347 | AREG(7) += 2; |
16348 | PRE_IO |
16349 | WRITE_WORD_F(adr, res) |
16350 | POST_IO |
16351 | RET(12) |
16352 | } |
16353 | |
16354 | // MOVESRa |
16355 | OPCODE(0x40E7) |
16356 | { |
16357 | u32 adr, res; |
16358 | u32 src, dst; |
16359 | |
16360 | res = GET_SR; |
16361 | adr = AREG(7) - 2; |
16362 | AREG(7) = adr; |
16363 | PRE_IO |
16364 | WRITE_WORD_F(adr, res) |
16365 | POST_IO |
16366 | RET(14) |
16367 | } |
16368 | |
16369 | // MOVEaCCR |
16370 | OPCODE(0x44C0) |
16371 | { |
16372 | u32 adr, res; |
16373 | u32 src, dst; |
16374 | |
16375 | res = DREGu16((Opcode >> 0) & 7); |
16376 | SET_CCR(res) |
16377 | RET(12) |
16378 | } |
16379 | |
16380 | // MOVEaCCR |
16381 | OPCODE(0x44D0) |
16382 | { |
16383 | u32 adr, res; |
16384 | u32 src, dst; |
16385 | |
16386 | adr = AREG((Opcode >> 0) & 7); |
16387 | PRE_IO |
16388 | READ_WORD_F(adr, res) |
16389 | SET_CCR(res) |
16390 | POST_IO |
16391 | RET(16) |
16392 | } |
16393 | |
16394 | // MOVEaCCR |
16395 | OPCODE(0x44D8) |
16396 | { |
16397 | u32 adr, res; |
16398 | u32 src, dst; |
16399 | |
16400 | adr = AREG((Opcode >> 0) & 7); |
16401 | AREG((Opcode >> 0) & 7) += 2; |
16402 | PRE_IO |
16403 | READ_WORD_F(adr, res) |
16404 | SET_CCR(res) |
16405 | POST_IO |
16406 | RET(16) |
16407 | } |
16408 | |
16409 | // MOVEaCCR |
16410 | OPCODE(0x44E0) |
16411 | { |
16412 | u32 adr, res; |
16413 | u32 src, dst; |
16414 | |
16415 | adr = AREG((Opcode >> 0) & 7) - 2; |
16416 | AREG((Opcode >> 0) & 7) = adr; |
16417 | PRE_IO |
16418 | READ_WORD_F(adr, res) |
16419 | SET_CCR(res) |
16420 | POST_IO |
16421 | RET(18) |
16422 | } |
16423 | |
16424 | // MOVEaCCR |
16425 | OPCODE(0x44E8) |
16426 | { |
16427 | u32 adr, res; |
16428 | u32 src, dst; |
16429 | |
16430 | FETCH_SWORD(adr); |
16431 | adr += AREG((Opcode >> 0) & 7); |
16432 | PRE_IO |
16433 | READ_WORD_F(adr, res) |
16434 | SET_CCR(res) |
16435 | POST_IO |
16436 | RET(20) |
16437 | } |
16438 | |
16439 | // MOVEaCCR |
16440 | OPCODE(0x44F0) |
16441 | { |
16442 | u32 adr, res; |
16443 | u32 src, dst; |
16444 | |
16445 | adr = AREG((Opcode >> 0) & 7); |
16446 | DECODE_EXT_WORD |
16447 | PRE_IO |
16448 | READ_WORD_F(adr, res) |
16449 | SET_CCR(res) |
16450 | POST_IO |
16451 | RET(22) |
16452 | } |
16453 | |
16454 | // MOVEaCCR |
16455 | OPCODE(0x44F8) |
16456 | { |
16457 | u32 adr, res; |
16458 | u32 src, dst; |
16459 | |
16460 | FETCH_SWORD(adr); |
16461 | PRE_IO |
16462 | READ_WORD_F(adr, res) |
16463 | SET_CCR(res) |
16464 | POST_IO |
16465 | RET(20) |
16466 | } |
16467 | |
16468 | // MOVEaCCR |
16469 | OPCODE(0x44F9) |
16470 | { |
16471 | u32 adr, res; |
16472 | u32 src, dst; |
16473 | |
16474 | FETCH_LONG(adr); |
16475 | PRE_IO |
16476 | READ_WORD_F(adr, res) |
16477 | SET_CCR(res) |
16478 | POST_IO |
16479 | RET(24) |
16480 | } |
16481 | |
16482 | // MOVEaCCR |
16483 | OPCODE(0x44FA) |
16484 | { |
16485 | u32 adr, res; |
16486 | u32 src, dst; |
16487 | |
be26eb23 |
16488 | adr = GET_SWORD + GET_PC; |
70357ce5 |
16489 | PC++; |
16490 | PRE_IO |
16491 | READ_WORD_F(adr, res) |
16492 | SET_CCR(res) |
16493 | POST_IO |
16494 | RET(20) |
16495 | } |
16496 | |
16497 | // MOVEaCCR |
16498 | OPCODE(0x44FB) |
16499 | { |
16500 | u32 adr, res; |
16501 | u32 src, dst; |
16502 | |
be26eb23 |
16503 | adr = GET_PC; |
70357ce5 |
16504 | DECODE_EXT_WORD |
16505 | PRE_IO |
16506 | READ_WORD_F(adr, res) |
16507 | SET_CCR(res) |
16508 | POST_IO |
16509 | RET(22) |
16510 | } |
16511 | |
16512 | // MOVEaCCR |
16513 | OPCODE(0x44FC) |
16514 | { |
16515 | u32 adr, res; |
16516 | u32 src, dst; |
16517 | |
16518 | FETCH_WORD(res); |
16519 | SET_CCR(res) |
16520 | RET(16) |
16521 | } |
16522 | |
16523 | // MOVEaCCR |
16524 | OPCODE(0x44DF) |
16525 | { |
16526 | u32 adr, res; |
16527 | u32 src, dst; |
16528 | |
16529 | adr = AREG(7); |
16530 | AREG(7) += 2; |
16531 | PRE_IO |
16532 | READ_WORD_F(adr, res) |
16533 | SET_CCR(res) |
16534 | POST_IO |
16535 | RET(16) |
16536 | } |
16537 | |
16538 | // MOVEaCCR |
16539 | OPCODE(0x44E7) |
16540 | { |
16541 | u32 adr, res; |
16542 | u32 src, dst; |
16543 | |
16544 | adr = AREG(7) - 2; |
16545 | AREG(7) = adr; |
16546 | PRE_IO |
16547 | READ_WORD_F(adr, res) |
16548 | SET_CCR(res) |
16549 | POST_IO |
16550 | RET(18) |
16551 | } |
16552 | |
16553 | // MOVEaSR |
16554 | OPCODE(0x46C0) |
16555 | { |
16556 | u32 adr, res; |
16557 | u32 src, dst; |
16558 | |
16559 | if (flag_S) |
16560 | { |
16561 | res = DREGu16((Opcode >> 0) & 7); |
16562 | SET_SR(res) |
16563 | if (!flag_S) |
16564 | { |
16565 | res = AREG(7); |
16566 | AREG(7) = ASP; |
16567 | ASP = res; |
16568 | } |
16569 | CHECK_INT_TO_JUMP(12) |
16570 | } |
16571 | else |
16572 | { |
d0ae0cb4 |
16573 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16574 | RET(4) |
16575 | } |
16576 | RET(12) |
16577 | } |
16578 | |
16579 | // MOVEaSR |
16580 | OPCODE(0x46D0) |
16581 | { |
16582 | u32 adr, res; |
16583 | u32 src, dst; |
16584 | |
16585 | if (flag_S) |
16586 | { |
16587 | adr = AREG((Opcode >> 0) & 7); |
16588 | PRE_IO |
16589 | READ_WORD_F(adr, res) |
16590 | SET_SR(res) |
16591 | if (!flag_S) |
16592 | { |
16593 | res = AREG(7); |
16594 | AREG(7) = ASP; |
16595 | ASP = res; |
16596 | } |
16597 | POST_IO |
16598 | CHECK_INT_TO_JUMP(16) |
16599 | } |
16600 | else |
16601 | { |
d0ae0cb4 |
16602 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16603 | RET(4) |
16604 | } |
16605 | RET(16) |
16606 | } |
16607 | |
16608 | // MOVEaSR |
16609 | OPCODE(0x46D8) |
16610 | { |
16611 | u32 adr, res; |
16612 | u32 src, dst; |
16613 | |
16614 | if (flag_S) |
16615 | { |
16616 | adr = AREG((Opcode >> 0) & 7); |
16617 | AREG((Opcode >> 0) & 7) += 2; |
16618 | PRE_IO |
16619 | READ_WORD_F(adr, res) |
16620 | SET_SR(res) |
16621 | if (!flag_S) |
16622 | { |
16623 | res = AREG(7); |
16624 | AREG(7) = ASP; |
16625 | ASP = res; |
16626 | } |
16627 | POST_IO |
16628 | CHECK_INT_TO_JUMP(16) |
16629 | } |
16630 | else |
16631 | { |
d0ae0cb4 |
16632 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16633 | RET(4) |
16634 | } |
16635 | RET(16) |
16636 | } |
16637 | |
16638 | // MOVEaSR |
16639 | OPCODE(0x46E0) |
16640 | { |
16641 | u32 adr, res; |
16642 | u32 src, dst; |
16643 | |
16644 | if (flag_S) |
16645 | { |
16646 | adr = AREG((Opcode >> 0) & 7) - 2; |
16647 | AREG((Opcode >> 0) & 7) = adr; |
16648 | PRE_IO |
16649 | READ_WORD_F(adr, res) |
16650 | SET_SR(res) |
16651 | if (!flag_S) |
16652 | { |
16653 | res = AREG(7); |
16654 | AREG(7) = ASP; |
16655 | ASP = res; |
16656 | } |
16657 | POST_IO |
16658 | CHECK_INT_TO_JUMP(18) |
16659 | } |
16660 | else |
16661 | { |
d0ae0cb4 |
16662 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16663 | RET(4) |
16664 | } |
16665 | RET(18) |
16666 | } |
16667 | |
16668 | // MOVEaSR |
16669 | OPCODE(0x46E8) |
16670 | { |
16671 | u32 adr, res; |
16672 | u32 src, dst; |
16673 | |
16674 | if (flag_S) |
16675 | { |
16676 | FETCH_SWORD(adr); |
16677 | adr += AREG((Opcode >> 0) & 7); |
16678 | PRE_IO |
16679 | READ_WORD_F(adr, res) |
16680 | SET_SR(res) |
16681 | if (!flag_S) |
16682 | { |
16683 | res = AREG(7); |
16684 | AREG(7) = ASP; |
16685 | ASP = res; |
16686 | } |
16687 | POST_IO |
16688 | CHECK_INT_TO_JUMP(20) |
16689 | } |
16690 | else |
16691 | { |
d0ae0cb4 |
16692 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16693 | RET(4) |
16694 | } |
16695 | RET(20) |
16696 | } |
16697 | |
16698 | // MOVEaSR |
16699 | OPCODE(0x46F0) |
16700 | { |
16701 | u32 adr, res; |
16702 | u32 src, dst; |
16703 | |
16704 | if (flag_S) |
16705 | { |
16706 | adr = AREG((Opcode >> 0) & 7); |
16707 | DECODE_EXT_WORD |
16708 | PRE_IO |
16709 | READ_WORD_F(adr, res) |
16710 | SET_SR(res) |
16711 | if (!flag_S) |
16712 | { |
16713 | res = AREG(7); |
16714 | AREG(7) = ASP; |
16715 | ASP = res; |
16716 | } |
16717 | POST_IO |
16718 | CHECK_INT_TO_JUMP(22) |
16719 | } |
16720 | else |
16721 | { |
d0ae0cb4 |
16722 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16723 | RET(4) |
16724 | } |
16725 | RET(22) |
16726 | } |
16727 | |
16728 | |
16729 | // MOVEaSR |
16730 | OPCODE(0x46F8) |
16731 | { |
16732 | u32 adr, res; |
16733 | u32 src, dst; |
16734 | |
16735 | if (flag_S) |
16736 | { |
16737 | FETCH_SWORD(adr); |
16738 | PRE_IO |
16739 | READ_WORD_F(adr, res) |
16740 | SET_SR(res) |
16741 | if (!flag_S) |
16742 | { |
16743 | res = AREG(7); |
16744 | AREG(7) = ASP; |
16745 | ASP = res; |
16746 | } |
16747 | POST_IO |
16748 | CHECK_INT_TO_JUMP(20) |
16749 | } |
16750 | else |
16751 | { |
d0ae0cb4 |
16752 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16753 | RET(4) |
16754 | } |
16755 | RET(20) |
16756 | } |
16757 | |
16758 | // MOVEaSR |
16759 | OPCODE(0x46F9) |
16760 | { |
16761 | u32 adr, res; |
16762 | u32 src, dst; |
16763 | |
16764 | if (flag_S) |
16765 | { |
16766 | FETCH_LONG(adr); |
16767 | PRE_IO |
16768 | READ_WORD_F(adr, res) |
16769 | SET_SR(res) |
16770 | if (!flag_S) |
16771 | { |
16772 | res = AREG(7); |
16773 | AREG(7) = ASP; |
16774 | ASP = res; |
16775 | } |
16776 | POST_IO |
16777 | CHECK_INT_TO_JUMP(24) |
16778 | } |
16779 | else |
16780 | { |
d0ae0cb4 |
16781 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16782 | RET(4) |
16783 | } |
16784 | RET(24) |
16785 | } |
16786 | |
16787 | // MOVEaSR |
16788 | OPCODE(0x46FA) |
16789 | { |
16790 | u32 adr, res; |
16791 | u32 src, dst; |
16792 | |
16793 | if (flag_S) |
16794 | { |
be26eb23 |
16795 | adr = GET_SWORD + GET_PC; |
70357ce5 |
16796 | PC++; |
16797 | PRE_IO |
16798 | READ_WORD_F(adr, res) |
16799 | SET_SR(res) |
16800 | if (!flag_S) |
16801 | { |
16802 | res = AREG(7); |
16803 | AREG(7) = ASP; |
16804 | ASP = res; |
16805 | } |
16806 | POST_IO |
d0ae0cb4 |
16807 | CHECK_INT_TO_JUMP(20) |
70357ce5 |
16808 | } |
16809 | else |
16810 | { |
d0ae0cb4 |
16811 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16812 | RET(4) |
16813 | } |
16814 | RET(20) |
16815 | } |
16816 | |
16817 | // MOVEaSR |
16818 | OPCODE(0x46FB) |
16819 | { |
16820 | u32 adr, res; |
16821 | u32 src, dst; |
16822 | |
16823 | if (flag_S) |
16824 | { |
be26eb23 |
16825 | adr = GET_PC; |
70357ce5 |
16826 | DECODE_EXT_WORD |
16827 | PRE_IO |
16828 | READ_WORD_F(adr, res) |
16829 | SET_SR(res) |
16830 | if (!flag_S) |
16831 | { |
16832 | res = AREG(7); |
16833 | AREG(7) = ASP; |
16834 | ASP = res; |
16835 | } |
16836 | POST_IO |
16837 | CHECK_INT_TO_JUMP(22) |
16838 | } |
16839 | else |
16840 | { |
d0ae0cb4 |
16841 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16842 | RET(4) |
16843 | } |
16844 | RET(22) |
16845 | } |
16846 | |
16847 | // MOVEaSR |
16848 | OPCODE(0x46FC) |
16849 | { |
16850 | u32 adr, res; |
16851 | u32 src, dst; |
16852 | |
16853 | if (flag_S) |
16854 | { |
16855 | FETCH_WORD(res); |
16856 | SET_SR(res) |
16857 | if (!flag_S) |
16858 | { |
16859 | res = AREG(7); |
16860 | AREG(7) = ASP; |
16861 | ASP = res; |
16862 | } |
16863 | CHECK_INT_TO_JUMP(16) |
16864 | } |
16865 | else |
16866 | { |
d0ae0cb4 |
16867 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16868 | RET(4) |
16869 | } |
16870 | RET(16) |
16871 | } |
16872 | |
16873 | // MOVEaSR |
16874 | OPCODE(0x46DF) |
16875 | { |
16876 | u32 adr, res; |
16877 | u32 src, dst; |
16878 | |
16879 | if (flag_S) |
16880 | { |
16881 | adr = AREG(7); |
16882 | AREG(7) += 2; |
16883 | PRE_IO |
16884 | READ_WORD_F(adr, res) |
16885 | SET_SR(res) |
16886 | if (!flag_S) |
16887 | { |
16888 | res = AREG(7); |
16889 | AREG(7) = ASP; |
16890 | ASP = res; |
16891 | } |
16892 | POST_IO |
16893 | CHECK_INT_TO_JUMP(16) |
16894 | } |
16895 | else |
16896 | { |
d0ae0cb4 |
16897 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16898 | RET(4) |
16899 | } |
16900 | RET(16) |
16901 | } |
16902 | |
16903 | // MOVEaSR |
16904 | OPCODE(0x46E7) |
16905 | { |
16906 | u32 adr, res; |
16907 | u32 src, dst; |
16908 | |
16909 | if (flag_S) |
16910 | { |
16911 | adr = AREG(7) - 2; |
16912 | AREG(7) = adr; |
16913 | PRE_IO |
16914 | READ_WORD_F(adr, res) |
16915 | SET_SR(res) |
16916 | if (!flag_S) |
16917 | { |
16918 | res = AREG(7); |
16919 | AREG(7) = ASP; |
16920 | ASP = res; |
16921 | } |
16922 | POST_IO |
16923 | CHECK_INT_TO_JUMP(18) |
16924 | } |
16925 | else |
16926 | { |
d0ae0cb4 |
16927 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
16928 | RET(4) |
16929 | } |
16930 | RET(18) |
16931 | } |
16932 | |
16933 | // NBCD |
16934 | OPCODE(0x4800) |
16935 | { |
16936 | u32 adr, res; |
16937 | u32 src, dst; |
16938 | |
16939 | res = DREGu8((Opcode >> 0) & 7); |
16940 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16941 | |
16942 | if (res != 0x9a) |
16943 | { |
16944 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16945 | res &= 0xFF; |
16946 | DREGu8((Opcode >> 0) & 7) = res; |
16947 | flag_NotZ |= res; |
16948 | flag_X = flag_C = M68K_SR_C; |
16949 | } |
16950 | else flag_X = flag_C = 0; |
16951 | flag_N = res; |
16952 | RET(6) |
16953 | } |
16954 | |
16955 | // NBCD |
16956 | OPCODE(0x4810) |
16957 | { |
16958 | u32 adr, res; |
16959 | u32 src, dst; |
16960 | |
16961 | adr = AREG((Opcode >> 0) & 7); |
16962 | PRE_IO |
16963 | READ_BYTE_F(adr, res) |
16964 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16965 | |
16966 | if (res != 0x9a) |
16967 | { |
16968 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16969 | res &= 0xFF; |
16970 | WRITE_BYTE_F(adr, res) |
16971 | flag_NotZ |= res; |
16972 | flag_X = flag_C = M68K_SR_C; |
16973 | } |
16974 | else flag_X = flag_C = 0; |
16975 | flag_N = res; |
16976 | POST_IO |
16977 | RET(12) |
16978 | } |
16979 | |
16980 | // NBCD |
16981 | OPCODE(0x4818) |
16982 | { |
16983 | u32 adr, res; |
16984 | u32 src, dst; |
16985 | |
16986 | adr = AREG((Opcode >> 0) & 7); |
16987 | AREG((Opcode >> 0) & 7) += 1; |
16988 | PRE_IO |
16989 | READ_BYTE_F(adr, res) |
16990 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16991 | |
16992 | if (res != 0x9a) |
16993 | { |
16994 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16995 | res &= 0xFF; |
16996 | WRITE_BYTE_F(adr, res) |
16997 | flag_NotZ |= res; |
16998 | flag_X = flag_C = M68K_SR_C; |
16999 | } |
17000 | else flag_X = flag_C = 0; |
17001 | flag_N = res; |
17002 | POST_IO |
17003 | RET(12) |
17004 | } |
17005 | |
17006 | // NBCD |
17007 | OPCODE(0x4820) |
17008 | { |
17009 | u32 adr, res; |
17010 | u32 src, dst; |
17011 | |
17012 | adr = AREG((Opcode >> 0) & 7) - 1; |
17013 | AREG((Opcode >> 0) & 7) = adr; |
17014 | PRE_IO |
17015 | READ_BYTE_F(adr, res) |
17016 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17017 | |
17018 | if (res != 0x9a) |
17019 | { |
17020 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17021 | res &= 0xFF; |
17022 | WRITE_BYTE_F(adr, res) |
17023 | flag_NotZ |= res; |
17024 | flag_X = flag_C = M68K_SR_C; |
17025 | } |
17026 | else flag_X = flag_C = 0; |
17027 | flag_N = res; |
17028 | POST_IO |
17029 | RET(14) |
17030 | } |
17031 | |
17032 | // NBCD |
17033 | OPCODE(0x4828) |
17034 | { |
17035 | u32 adr, res; |
17036 | u32 src, dst; |
17037 | |
17038 | FETCH_SWORD(adr); |
17039 | adr += AREG((Opcode >> 0) & 7); |
17040 | PRE_IO |
17041 | READ_BYTE_F(adr, res) |
17042 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17043 | |
17044 | if (res != 0x9a) |
17045 | { |
17046 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17047 | res &= 0xFF; |
17048 | WRITE_BYTE_F(adr, res) |
17049 | flag_NotZ |= res; |
17050 | flag_X = flag_C = M68K_SR_C; |
17051 | } |
17052 | else flag_X = flag_C = 0; |
17053 | flag_N = res; |
17054 | POST_IO |
17055 | RET(16) |
17056 | } |
17057 | |
17058 | // NBCD |
17059 | OPCODE(0x4830) |
17060 | { |
17061 | u32 adr, res; |
17062 | u32 src, dst; |
17063 | |
17064 | adr = AREG((Opcode >> 0) & 7); |
17065 | DECODE_EXT_WORD |
17066 | PRE_IO |
17067 | READ_BYTE_F(adr, res) |
17068 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17069 | |
17070 | if (res != 0x9a) |
17071 | { |
17072 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17073 | res &= 0xFF; |
17074 | WRITE_BYTE_F(adr, res) |
17075 | flag_NotZ |= res; |
17076 | flag_X = flag_C = M68K_SR_C; |
17077 | } |
17078 | else flag_X = flag_C = 0; |
17079 | flag_N = res; |
17080 | POST_IO |
17081 | RET(18) |
17082 | } |
17083 | |
17084 | // NBCD |
17085 | OPCODE(0x4838) |
17086 | { |
17087 | u32 adr, res; |
17088 | u32 src, dst; |
17089 | |
17090 | FETCH_SWORD(adr); |
17091 | PRE_IO |
17092 | READ_BYTE_F(adr, res) |
17093 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17094 | |
17095 | if (res != 0x9a) |
17096 | { |
17097 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17098 | res &= 0xFF; |
17099 | WRITE_BYTE_F(adr, res) |
17100 | flag_NotZ |= res; |
17101 | flag_X = flag_C = M68K_SR_C; |
17102 | } |
17103 | else flag_X = flag_C = 0; |
17104 | flag_N = res; |
17105 | POST_IO |
17106 | RET(16) |
17107 | } |
17108 | |
17109 | // NBCD |
17110 | OPCODE(0x4839) |
17111 | { |
17112 | u32 adr, res; |
17113 | u32 src, dst; |
17114 | |
17115 | FETCH_LONG(adr); |
17116 | PRE_IO |
17117 | READ_BYTE_F(adr, res) |
17118 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17119 | |
17120 | if (res != 0x9a) |
17121 | { |
17122 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17123 | res &= 0xFF; |
17124 | WRITE_BYTE_F(adr, res) |
17125 | flag_NotZ |= res; |
17126 | flag_X = flag_C = M68K_SR_C; |
17127 | } |
17128 | else flag_X = flag_C = 0; |
17129 | flag_N = res; |
17130 | POST_IO |
17131 | RET(20) |
17132 | } |
17133 | |
17134 | // NBCD |
17135 | OPCODE(0x481F) |
17136 | { |
17137 | u32 adr, res; |
17138 | u32 src, dst; |
17139 | |
17140 | adr = AREG(7); |
17141 | AREG(7) += 2; |
17142 | PRE_IO |
17143 | READ_BYTE_F(adr, res) |
17144 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17145 | |
17146 | if (res != 0x9a) |
17147 | { |
17148 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17149 | res &= 0xFF; |
17150 | WRITE_BYTE_F(adr, res) |
17151 | flag_NotZ |= res; |
17152 | flag_X = flag_C = M68K_SR_C; |
17153 | } |
17154 | else flag_X = flag_C = 0; |
17155 | flag_N = res; |
17156 | POST_IO |
17157 | RET(12) |
17158 | } |
17159 | |
17160 | // NBCD |
17161 | OPCODE(0x4827) |
17162 | { |
17163 | u32 adr, res; |
17164 | u32 src, dst; |
17165 | |
17166 | adr = AREG(7) - 2; |
17167 | AREG(7) = adr; |
17168 | PRE_IO |
17169 | READ_BYTE_F(adr, res) |
17170 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17171 | |
17172 | if (res != 0x9a) |
17173 | { |
17174 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17175 | res &= 0xFF; |
17176 | WRITE_BYTE_F(adr, res) |
17177 | flag_NotZ |= res; |
17178 | flag_X = flag_C = M68K_SR_C; |
17179 | } |
17180 | else flag_X = flag_C = 0; |
17181 | flag_N = res; |
17182 | POST_IO |
17183 | RET(14) |
17184 | } |
17185 | |
17186 | // PEA |
17187 | OPCODE(0x4850) |
17188 | { |
17189 | u32 adr, res; |
17190 | u32 src, dst; |
17191 | |
17192 | adr = AREG((Opcode >> 0) & 7); |
17193 | PRE_IO |
17194 | PUSH_32_F(adr) |
17195 | POST_IO |
17196 | RET(12) |
17197 | } |
17198 | |
17199 | // PEA |
17200 | OPCODE(0x4868) |
17201 | { |
17202 | u32 adr, res; |
17203 | u32 src, dst; |
17204 | |
17205 | FETCH_SWORD(adr); |
17206 | adr += AREG((Opcode >> 0) & 7); |
17207 | PRE_IO |
17208 | PUSH_32_F(adr) |
17209 | POST_IO |
17210 | RET(16) |
17211 | } |
17212 | |
17213 | // PEA |
17214 | OPCODE(0x4870) |
17215 | { |
17216 | u32 adr, res; |
17217 | u32 src, dst; |
17218 | |
17219 | adr = AREG((Opcode >> 0) & 7); |
17220 | DECODE_EXT_WORD |
17221 | PRE_IO |
17222 | PUSH_32_F(adr) |
17223 | POST_IO |
17224 | RET(20) |
17225 | } |
17226 | |
17227 | // PEA |
17228 | OPCODE(0x4878) |
17229 | { |
17230 | u32 adr, res; |
17231 | u32 src, dst; |
17232 | |
17233 | FETCH_SWORD(adr); |
17234 | PRE_IO |
17235 | PUSH_32_F(adr) |
17236 | POST_IO |
17237 | RET(16) |
17238 | } |
17239 | |
17240 | // PEA |
17241 | OPCODE(0x4879) |
17242 | { |
17243 | u32 adr, res; |
17244 | u32 src, dst; |
17245 | |
17246 | FETCH_LONG(adr); |
17247 | PRE_IO |
17248 | PUSH_32_F(adr) |
17249 | POST_IO |
17250 | RET(20) |
17251 | } |
17252 | |
17253 | // PEA |
17254 | OPCODE(0x487A) |
17255 | { |
17256 | u32 adr, res; |
17257 | u32 src, dst; |
17258 | |
be26eb23 |
17259 | adr = GET_SWORD + GET_PC; |
70357ce5 |
17260 | PC++; |
17261 | PRE_IO |
17262 | PUSH_32_F(adr) |
17263 | POST_IO |
17264 | RET(16) |
17265 | } |
17266 | |
17267 | // PEA |
17268 | OPCODE(0x487B) |
17269 | { |
17270 | u32 adr, res; |
17271 | u32 src, dst; |
17272 | |
be26eb23 |
17273 | adr = GET_PC; |
70357ce5 |
17274 | DECODE_EXT_WORD |
17275 | PRE_IO |
17276 | PUSH_32_F(adr) |
17277 | POST_IO |
17278 | RET(20) |
17279 | } |
17280 | |
17281 | // SWAP |
17282 | OPCODE(0x4840) |
17283 | { |
17284 | u32 adr, res; |
17285 | u32 src, dst; |
17286 | |
17287 | res = DREGu32((Opcode >> 0) & 7); |
17288 | res = (res >> 16) | (res << 16); |
17289 | flag_C = 0; |
17290 | flag_V = 0; |
17291 | flag_NotZ = res; |
17292 | flag_N = res >> 24; |
17293 | DREGu32((Opcode >> 0) & 7) = res; |
17294 | RET(4) |
17295 | } |
17296 | |
17297 | // MOVEMRa |
17298 | OPCODE(0x4890) |
17299 | { |
17300 | u32 adr, res; |
17301 | u32 src, dst; |
17302 | |
17303 | u32 *psrc; |
17304 | |
17305 | FETCH_WORD(res); |
17306 | adr = AREG((Opcode >> 0) & 7); |
17307 | psrc = &DREGu32(0); |
17308 | dst = adr; |
17309 | PRE_IO |
17310 | do |
17311 | { |
17312 | if (res & 1) |
17313 | { |
17314 | WRITE_WORD_F(adr, *psrc) |
17315 | adr += 2; |
17316 | } |
17317 | psrc++; |
17318 | } while (res >>= 1); |
17319 | POST_IO |
17320 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17321 | #ifdef USE_CYCLONE_TIMING |
17322 | RET(8) |
17323 | #else |
17324 | RET(12) |
17325 | #endif |
17326 | } |
17327 | |
17328 | // MOVEMRa |
17329 | OPCODE(0x48A0) |
17330 | { |
17331 | u32 adr, res; |
17332 | u32 src, dst; |
17333 | |
17334 | u32 *psrc; |
17335 | |
17336 | FETCH_WORD(res); |
17337 | adr = AREG((Opcode >> 0) & 7); |
17338 | psrc = &AREGu32(7); |
17339 | dst = adr; |
17340 | PRE_IO |
17341 | do |
17342 | { |
17343 | if (res & 1) |
17344 | { |
17345 | adr -= 2; |
17346 | WRITE_WORD_F(adr, *psrc) |
17347 | } |
17348 | psrc--; |
17349 | } while (res >>= 1); |
17350 | AREG((Opcode >> 0) & 7) = adr; |
17351 | POST_IO |
17352 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17353 | RET(8) |
17354 | } |
17355 | |
17356 | // MOVEMRa |
17357 | OPCODE(0x48A8) |
17358 | { |
17359 | u32 adr, res; |
17360 | u32 src, dst; |
17361 | |
17362 | u32 *psrc; |
17363 | |
17364 | FETCH_WORD(res); |
17365 | FETCH_SWORD(adr); |
17366 | adr += AREG((Opcode >> 0) & 7); |
17367 | psrc = &DREGu32(0); |
17368 | dst = adr; |
17369 | PRE_IO |
17370 | do |
17371 | { |
17372 | if (res & 1) |
17373 | { |
17374 | WRITE_WORD_F(adr, *psrc) |
17375 | adr += 2; |
17376 | } |
17377 | psrc++; |
17378 | } while (res >>= 1); |
17379 | POST_IO |
17380 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17381 | #ifdef USE_CYCLONE_TIMING |
17382 | RET(12) |
17383 | #else |
17384 | RET(20) |
17385 | #endif |
17386 | } |
17387 | |
17388 | // MOVEMRa |
17389 | OPCODE(0x48B0) |
17390 | { |
17391 | u32 adr, res; |
17392 | u32 src, dst; |
17393 | |
17394 | u32 *psrc; |
17395 | |
17396 | FETCH_WORD(res); |
17397 | adr = AREG((Opcode >> 0) & 7); |
17398 | DECODE_EXT_WORD |
17399 | psrc = &DREGu32(0); |
17400 | dst = adr; |
17401 | PRE_IO |
17402 | do |
17403 | { |
17404 | if (res & 1) |
17405 | { |
17406 | WRITE_WORD_F(adr, *psrc) |
17407 | adr += 2; |
17408 | } |
17409 | psrc++; |
17410 | } while (res >>= 1); |
17411 | POST_IO |
17412 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17413 | #ifdef USE_CYCLONE_TIMING |
17414 | RET(14) |
17415 | #else |
17416 | RET(24) |
17417 | #endif |
17418 | } |
17419 | |
17420 | // MOVEMRa |
17421 | OPCODE(0x48B8) |
17422 | { |
17423 | u32 adr, res; |
17424 | u32 src, dst; |
17425 | |
17426 | u32 *psrc; |
17427 | |
17428 | FETCH_WORD(res); |
17429 | FETCH_SWORD(adr); |
17430 | psrc = &DREGu32(0); |
17431 | dst = adr; |
17432 | PRE_IO |
17433 | do |
17434 | { |
17435 | if (res & 1) |
17436 | { |
17437 | WRITE_WORD_F(adr, *psrc) |
17438 | adr += 2; |
17439 | } |
17440 | psrc++; |
17441 | } while (res >>= 1); |
17442 | POST_IO |
17443 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17444 | #ifdef USE_CYCLONE_TIMING |
17445 | RET(12) |
17446 | #else |
17447 | RET(20) |
17448 | #endif |
17449 | } |
17450 | |
17451 | // MOVEMRa |
17452 | OPCODE(0x48B9) |
17453 | { |
17454 | u32 adr, res; |
17455 | u32 src, dst; |
17456 | |
17457 | u32 *psrc; |
17458 | |
17459 | FETCH_WORD(res); |
17460 | FETCH_LONG(adr); |
17461 | psrc = &DREGu32(0); |
17462 | dst = adr; |
17463 | PRE_IO |
17464 | do |
17465 | { |
17466 | if (res & 1) |
17467 | { |
17468 | WRITE_WORD_F(adr, *psrc) |
17469 | adr += 2; |
17470 | } |
17471 | psrc++; |
17472 | } while (res >>= 1); |
17473 | POST_IO |
17474 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17475 | #ifdef USE_CYCLONE_TIMING |
17476 | RET(16) |
17477 | #else |
17478 | RET(28) |
17479 | #endif |
17480 | } |
17481 | |
17482 | // MOVEMRa |
17483 | OPCODE(0x48A7) |
17484 | { |
17485 | u32 adr, res; |
17486 | u32 src, dst; |
17487 | |
17488 | u32 *psrc; |
17489 | |
17490 | FETCH_WORD(res); |
17491 | adr = AREG(7); |
17492 | psrc = &AREGu32(7); |
17493 | dst = adr; |
17494 | PRE_IO |
17495 | do |
17496 | { |
17497 | if (res & 1) |
17498 | { |
17499 | adr -= 2; |
17500 | WRITE_WORD_F(adr, *psrc) |
17501 | } |
17502 | psrc--; |
17503 | } while (res >>= 1); |
17504 | AREG(7) = adr; |
17505 | POST_IO |
17506 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17507 | RET(8) |
17508 | } |
17509 | |
17510 | // MOVEMRa |
17511 | OPCODE(0x48D0) |
17512 | { |
17513 | u32 adr, res; |
17514 | u32 src, dst; |
17515 | |
17516 | u32 *psrc; |
17517 | |
17518 | FETCH_WORD(res); |
17519 | adr = AREG((Opcode >> 0) & 7); |
17520 | psrc = &DREGu32(0); |
17521 | dst = adr; |
17522 | PRE_IO |
17523 | do |
17524 | { |
17525 | if (res & 1) |
17526 | { |
17527 | WRITE_LONG_F(adr, *psrc) |
17528 | adr += 4; |
17529 | } |
17530 | psrc++; |
17531 | } while (res >>= 1); |
17532 | POST_IO |
17533 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17534 | #ifdef USE_CYCLONE_TIMING |
17535 | RET(8) |
17536 | #else |
17537 | RET(16) |
17538 | #endif |
17539 | } |
17540 | |
17541 | // MOVEMRa |
17542 | OPCODE(0x48E0) |
17543 | { |
17544 | u32 adr, res; |
17545 | u32 src, dst; |
17546 | |
17547 | u32 *psrc; |
17548 | |
17549 | FETCH_WORD(res); |
17550 | adr = AREG((Opcode >> 0) & 7); |
17551 | psrc = &AREGu32(7); |
17552 | dst = adr; |
17553 | PRE_IO |
17554 | do |
17555 | { |
17556 | if (res & 1) |
17557 | { |
17558 | adr -= 4; |
17559 | WRITE_LONG_DEC_F(adr, *psrc) |
17560 | } |
17561 | psrc--; |
17562 | } while (res >>= 1); |
17563 | AREG((Opcode >> 0) & 7) = adr; |
17564 | POST_IO |
17565 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17566 | RET(8) |
17567 | } |
17568 | |
17569 | // MOVEMRa |
17570 | OPCODE(0x48E8) |
17571 | { |
17572 | u32 adr, res; |
17573 | u32 src, dst; |
17574 | |
17575 | u32 *psrc; |
17576 | |
17577 | FETCH_WORD(res); |
17578 | FETCH_SWORD(adr); |
17579 | adr += AREG((Opcode >> 0) & 7); |
17580 | psrc = &DREGu32(0); |
17581 | dst = adr; |
17582 | PRE_IO |
17583 | do |
17584 | { |
17585 | if (res & 1) |
17586 | { |
17587 | WRITE_LONG_F(adr, *psrc) |
17588 | adr += 4; |
17589 | } |
17590 | psrc++; |
17591 | } while (res >>= 1); |
17592 | POST_IO |
17593 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17594 | #ifdef USE_CYCLONE_TIMING |
17595 | RET(12) |
17596 | #else |
17597 | RET(24) |
17598 | #endif |
17599 | } |
17600 | |
17601 | // MOVEMRa |
17602 | OPCODE(0x48F0) |
17603 | { |
17604 | u32 adr, res; |
17605 | u32 src, dst; |
17606 | |
17607 | u32 *psrc; |
17608 | |
17609 | FETCH_WORD(res); |
17610 | adr = AREG((Opcode >> 0) & 7); |
17611 | DECODE_EXT_WORD |
17612 | psrc = &DREGu32(0); |
17613 | dst = adr; |
17614 | PRE_IO |
17615 | do |
17616 | { |
17617 | if (res & 1) |
17618 | { |
17619 | WRITE_LONG_F(adr, *psrc) |
17620 | adr += 4; |
17621 | } |
17622 | psrc++; |
17623 | } while (res >>= 1); |
17624 | POST_IO |
17625 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17626 | #ifdef USE_CYCLONE_TIMING |
17627 | RET(14) |
17628 | #else |
17629 | RET(28) |
17630 | #endif |
17631 | } |
17632 | |
17633 | // MOVEMRa |
17634 | OPCODE(0x48F8) |
17635 | { |
17636 | u32 adr, res; |
17637 | u32 src, dst; |
17638 | |
17639 | u32 *psrc; |
17640 | |
17641 | FETCH_WORD(res); |
17642 | FETCH_SWORD(adr); |
17643 | psrc = &DREGu32(0); |
17644 | dst = adr; |
17645 | PRE_IO |
17646 | do |
17647 | { |
17648 | if (res & 1) |
17649 | { |
17650 | WRITE_LONG_F(adr, *psrc) |
17651 | adr += 4; |
17652 | } |
17653 | psrc++; |
17654 | } while (res >>= 1); |
17655 | POST_IO |
17656 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17657 | #ifdef USE_CYCLONE_TIMING |
17658 | RET(12) |
17659 | #else |
17660 | RET(24) |
17661 | #endif |
17662 | } |
17663 | |
17664 | // MOVEMRa |
17665 | OPCODE(0x48F9) |
17666 | { |
17667 | u32 adr, res; |
17668 | u32 src, dst; |
17669 | |
17670 | u32 *psrc; |
17671 | |
17672 | FETCH_WORD(res); |
17673 | FETCH_LONG(adr); |
17674 | psrc = &DREGu32(0); |
17675 | dst = adr; |
17676 | PRE_IO |
17677 | do |
17678 | { |
17679 | if (res & 1) |
17680 | { |
17681 | WRITE_LONG_F(adr, *psrc) |
17682 | adr += 4; |
17683 | } |
17684 | psrc++; |
17685 | } while (res >>= 1); |
17686 | POST_IO |
17687 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17688 | #ifdef USE_CYCLONE_TIMING |
17689 | RET(16) |
17690 | #else |
17691 | RET(32) |
17692 | #endif |
17693 | } |
17694 | |
17695 | // MOVEMRa |
17696 | OPCODE(0x48E7) |
17697 | { |
17698 | u32 adr, res; |
17699 | u32 src, dst; |
17700 | |
17701 | u32 *psrc; |
17702 | |
17703 | FETCH_WORD(res); |
17704 | adr = AREG(7); |
17705 | psrc = &AREGu32(7); |
17706 | dst = adr; |
17707 | PRE_IO |
17708 | do |
17709 | { |
17710 | if (res & 1) |
17711 | { |
17712 | adr -= 4; |
17713 | WRITE_LONG_DEC_F(adr, *psrc) |
17714 | } |
17715 | psrc--; |
17716 | } while (res >>= 1); |
17717 | AREG(7) = adr; |
17718 | POST_IO |
17719 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17720 | RET(8) |
17721 | } |
17722 | |
17723 | // EXT |
17724 | OPCODE(0x4880) |
17725 | { |
17726 | u32 adr, res; |
17727 | u32 src, dst; |
17728 | |
17729 | res = (s32)DREGs8((Opcode >> 0) & 7); |
17730 | flag_C = 0; |
17731 | flag_V = 0; |
17732 | flag_NotZ = res; |
17733 | flag_N = res; |
17734 | DREGu16((Opcode >> 0) & 7) = res; |
17735 | RET(4) |
17736 | } |
17737 | |
17738 | // EXT |
17739 | OPCODE(0x48C0) |
17740 | { |
17741 | u32 adr, res; |
17742 | u32 src, dst; |
17743 | |
17744 | res = (s32)DREGs16((Opcode >> 0) & 7); |
17745 | flag_C = 0; |
17746 | flag_V = 0; |
17747 | flag_NotZ = res; |
17748 | flag_N = res >> 8; |
17749 | DREGu32((Opcode >> 0) & 7) = res; |
17750 | RET(4) |
17751 | } |
17752 | |
17753 | // TST |
17754 | OPCODE(0x4A00) |
17755 | { |
17756 | u32 adr, res; |
17757 | u32 src, dst; |
17758 | |
17759 | res = DREGu8((Opcode >> 0) & 7); |
17760 | flag_C = 0; |
17761 | flag_V = 0; |
17762 | flag_NotZ = res; |
17763 | flag_N = res; |
17764 | RET(4) |
17765 | } |
17766 | |
17767 | // TST |
17768 | OPCODE(0x4A10) |
17769 | { |
17770 | u32 adr, res; |
17771 | u32 src, dst; |
17772 | |
17773 | adr = AREG((Opcode >> 0) & 7); |
17774 | PRE_IO |
17775 | READ_BYTE_F(adr, res) |
17776 | flag_C = 0; |
17777 | flag_V = 0; |
17778 | flag_NotZ = res; |
17779 | flag_N = res; |
17780 | POST_IO |
17781 | RET(8) |
17782 | } |
17783 | |
17784 | // TST |
17785 | OPCODE(0x4A18) |
17786 | { |
17787 | u32 adr, res; |
17788 | u32 src, dst; |
17789 | |
17790 | adr = AREG((Opcode >> 0) & 7); |
17791 | AREG((Opcode >> 0) & 7) += 1; |
17792 | PRE_IO |
17793 | READ_BYTE_F(adr, res) |
17794 | flag_C = 0; |
17795 | flag_V = 0; |
17796 | flag_NotZ = res; |
17797 | flag_N = res; |
17798 | POST_IO |
17799 | RET(8) |
17800 | } |
17801 | |
17802 | // TST |
17803 | OPCODE(0x4A20) |
17804 | { |
17805 | u32 adr, res; |
17806 | u32 src, dst; |
17807 | |
17808 | adr = AREG((Opcode >> 0) & 7) - 1; |
17809 | AREG((Opcode >> 0) & 7) = adr; |
17810 | PRE_IO |
17811 | READ_BYTE_F(adr, res) |
17812 | flag_C = 0; |
17813 | flag_V = 0; |
17814 | flag_NotZ = res; |
17815 | flag_N = res; |
17816 | POST_IO |
17817 | RET(10) |
17818 | } |
17819 | |
17820 | // TST |
17821 | OPCODE(0x4A28) |
17822 | { |
17823 | u32 adr, res; |
17824 | u32 src, dst; |
17825 | |
17826 | FETCH_SWORD(adr); |
17827 | adr += AREG((Opcode >> 0) & 7); |
17828 | PRE_IO |
17829 | READ_BYTE_F(adr, res) |
17830 | flag_C = 0; |
17831 | flag_V = 0; |
17832 | flag_NotZ = res; |
17833 | flag_N = res; |
17834 | POST_IO |
17835 | RET(12) |
17836 | } |
17837 | |
17838 | // TST |
17839 | OPCODE(0x4A30) |
17840 | { |
17841 | u32 adr, res; |
17842 | u32 src, dst; |
17843 | |
17844 | adr = AREG((Opcode >> 0) & 7); |
17845 | DECODE_EXT_WORD |
17846 | PRE_IO |
17847 | READ_BYTE_F(adr, res) |
17848 | flag_C = 0; |
17849 | flag_V = 0; |
17850 | flag_NotZ = res; |
17851 | flag_N = res; |
17852 | POST_IO |
17853 | RET(14) |
17854 | } |
17855 | |
17856 | // TST |
17857 | OPCODE(0x4A38) |
17858 | { |
17859 | u32 adr, res; |
17860 | u32 src, dst; |
17861 | |
17862 | FETCH_SWORD(adr); |
17863 | PRE_IO |
17864 | READ_BYTE_F(adr, res) |
17865 | flag_C = 0; |
17866 | flag_V = 0; |
17867 | flag_NotZ = res; |
17868 | flag_N = res; |
17869 | POST_IO |
17870 | RET(12) |
17871 | } |
17872 | |
17873 | // TST |
17874 | OPCODE(0x4A39) |
17875 | { |
17876 | u32 adr, res; |
17877 | u32 src, dst; |
17878 | |
17879 | FETCH_LONG(adr); |
17880 | PRE_IO |
17881 | READ_BYTE_F(adr, res) |
17882 | flag_C = 0; |
17883 | flag_V = 0; |
17884 | flag_NotZ = res; |
17885 | flag_N = res; |
17886 | POST_IO |
17887 | RET(16) |
17888 | } |
17889 | |
17890 | // TST |
17891 | OPCODE(0x4A1F) |
17892 | { |
17893 | u32 adr, res; |
17894 | u32 src, dst; |
17895 | |
17896 | adr = AREG(7); |
17897 | AREG(7) += 2; |
17898 | PRE_IO |
17899 | READ_BYTE_F(adr, res) |
17900 | flag_C = 0; |
17901 | flag_V = 0; |
17902 | flag_NotZ = res; |
17903 | flag_N = res; |
17904 | POST_IO |
17905 | RET(8) |
17906 | } |
17907 | |
17908 | // TST |
17909 | OPCODE(0x4A27) |
17910 | { |
17911 | u32 adr, res; |
17912 | u32 src, dst; |
17913 | |
17914 | adr = AREG(7) - 2; |
17915 | AREG(7) = adr; |
17916 | PRE_IO |
17917 | READ_BYTE_F(adr, res) |
17918 | flag_C = 0; |
17919 | flag_V = 0; |
17920 | flag_NotZ = res; |
17921 | flag_N = res; |
17922 | POST_IO |
17923 | RET(10) |
17924 | } |
17925 | |
17926 | // TST |
17927 | OPCODE(0x4A40) |
17928 | { |
17929 | u32 adr, res; |
17930 | u32 src, dst; |
17931 | |
17932 | res = DREGu16((Opcode >> 0) & 7); |
17933 | flag_C = 0; |
17934 | flag_V = 0; |
17935 | flag_NotZ = res; |
17936 | flag_N = res >> 8; |
17937 | RET(4) |
17938 | } |
17939 | |
17940 | // TST |
17941 | OPCODE(0x4A50) |
17942 | { |
17943 | u32 adr, res; |
17944 | u32 src, dst; |
17945 | |
17946 | adr = AREG((Opcode >> 0) & 7); |
17947 | PRE_IO |
17948 | READ_WORD_F(adr, res) |
17949 | flag_C = 0; |
17950 | flag_V = 0; |
17951 | flag_NotZ = res; |
17952 | flag_N = res >> 8; |
17953 | POST_IO |
17954 | RET(8) |
17955 | } |
17956 | |
17957 | // TST |
17958 | OPCODE(0x4A58) |
17959 | { |
17960 | u32 adr, res; |
17961 | u32 src, dst; |
17962 | |
17963 | adr = AREG((Opcode >> 0) & 7); |
17964 | AREG((Opcode >> 0) & 7) += 2; |
17965 | PRE_IO |
17966 | READ_WORD_F(adr, res) |
17967 | flag_C = 0; |
17968 | flag_V = 0; |
17969 | flag_NotZ = res; |
17970 | flag_N = res >> 8; |
17971 | POST_IO |
17972 | RET(8) |
17973 | } |
17974 | |
17975 | // TST |
17976 | OPCODE(0x4A60) |
17977 | { |
17978 | u32 adr, res; |
17979 | u32 src, dst; |
17980 | |
17981 | adr = AREG((Opcode >> 0) & 7) - 2; |
17982 | AREG((Opcode >> 0) & 7) = adr; |
17983 | PRE_IO |
17984 | READ_WORD_F(adr, res) |
17985 | flag_C = 0; |
17986 | flag_V = 0; |
17987 | flag_NotZ = res; |
17988 | flag_N = res >> 8; |
17989 | POST_IO |
17990 | RET(10) |
17991 | } |
17992 | |
17993 | // TST |
17994 | OPCODE(0x4A68) |
17995 | { |
17996 | u32 adr, res; |
17997 | u32 src, dst; |
17998 | |
17999 | FETCH_SWORD(adr); |
18000 | adr += AREG((Opcode >> 0) & 7); |
18001 | PRE_IO |
18002 | READ_WORD_F(adr, res) |
18003 | flag_C = 0; |
18004 | flag_V = 0; |
18005 | flag_NotZ = res; |
18006 | flag_N = res >> 8; |
18007 | POST_IO |
18008 | RET(12) |
18009 | } |
18010 | |
18011 | // TST |
18012 | OPCODE(0x4A70) |
18013 | { |
18014 | u32 adr, res; |
18015 | u32 src, dst; |
18016 | |
18017 | adr = AREG((Opcode >> 0) & 7); |
18018 | DECODE_EXT_WORD |
18019 | PRE_IO |
18020 | READ_WORD_F(adr, res) |
18021 | flag_C = 0; |
18022 | flag_V = 0; |
18023 | flag_NotZ = res; |
18024 | flag_N = res >> 8; |
18025 | POST_IO |
18026 | RET(14) |
18027 | } |
18028 | |
18029 | // TST |
18030 | OPCODE(0x4A78) |
18031 | { |
18032 | u32 adr, res; |
18033 | u32 src, dst; |
18034 | |
18035 | FETCH_SWORD(adr); |
18036 | PRE_IO |
18037 | READ_WORD_F(adr, res) |
18038 | flag_C = 0; |
18039 | flag_V = 0; |
18040 | flag_NotZ = res; |
18041 | flag_N = res >> 8; |
18042 | POST_IO |
18043 | RET(12) |
18044 | } |
18045 | |
18046 | // TST |
18047 | OPCODE(0x4A79) |
18048 | { |
18049 | u32 adr, res; |
18050 | u32 src, dst; |
18051 | |
18052 | FETCH_LONG(adr); |
18053 | PRE_IO |
18054 | READ_WORD_F(adr, res) |
18055 | flag_C = 0; |
18056 | flag_V = 0; |
18057 | flag_NotZ = res; |
18058 | flag_N = res >> 8; |
18059 | POST_IO |
18060 | RET(16) |
18061 | } |
18062 | |
18063 | // TST |
18064 | OPCODE(0x4A5F) |
18065 | { |
18066 | u32 adr, res; |
18067 | u32 src, dst; |
18068 | |
18069 | adr = AREG(7); |
18070 | AREG(7) += 2; |
18071 | PRE_IO |
18072 | READ_WORD_F(adr, res) |
18073 | flag_C = 0; |
18074 | flag_V = 0; |
18075 | flag_NotZ = res; |
18076 | flag_N = res >> 8; |
18077 | POST_IO |
18078 | RET(8) |
18079 | } |
18080 | |
18081 | // TST |
18082 | OPCODE(0x4A67) |
18083 | { |
18084 | u32 adr, res; |
18085 | u32 src, dst; |
18086 | |
18087 | adr = AREG(7) - 2; |
18088 | AREG(7) = adr; |
18089 | PRE_IO |
18090 | READ_WORD_F(adr, res) |
18091 | flag_C = 0; |
18092 | flag_V = 0; |
18093 | flag_NotZ = res; |
18094 | flag_N = res >> 8; |
18095 | POST_IO |
18096 | RET(10) |
18097 | } |
18098 | |
18099 | // TST |
18100 | OPCODE(0x4A80) |
18101 | { |
18102 | u32 adr, res; |
18103 | u32 src, dst; |
18104 | |
18105 | res = DREGu32((Opcode >> 0) & 7); |
18106 | flag_C = 0; |
18107 | flag_V = 0; |
18108 | flag_NotZ = res; |
18109 | flag_N = res >> 24; |
18110 | RET(4) |
18111 | } |
18112 | |
18113 | // TST |
18114 | OPCODE(0x4A90) |
18115 | { |
18116 | u32 adr, res; |
18117 | u32 src, dst; |
18118 | |
18119 | adr = AREG((Opcode >> 0) & 7); |
18120 | PRE_IO |
18121 | READ_LONG_F(adr, res) |
18122 | flag_C = 0; |
18123 | flag_V = 0; |
18124 | flag_NotZ = res; |
18125 | flag_N = res >> 24; |
18126 | POST_IO |
18127 | RET(12) |
18128 | } |
18129 | |
18130 | // TST |
18131 | OPCODE(0x4A98) |
18132 | { |
18133 | u32 adr, res; |
18134 | u32 src, dst; |
18135 | |
18136 | adr = AREG((Opcode >> 0) & 7); |
18137 | AREG((Opcode >> 0) & 7) += 4; |
18138 | PRE_IO |
18139 | READ_LONG_F(adr, res) |
18140 | flag_C = 0; |
18141 | flag_V = 0; |
18142 | flag_NotZ = res; |
18143 | flag_N = res >> 24; |
18144 | POST_IO |
18145 | RET(12) |
18146 | } |
18147 | |
18148 | // TST |
18149 | OPCODE(0x4AA0) |
18150 | { |
18151 | u32 adr, res; |
18152 | u32 src, dst; |
18153 | |
18154 | adr = AREG((Opcode >> 0) & 7) - 4; |
18155 | AREG((Opcode >> 0) & 7) = adr; |
18156 | PRE_IO |
18157 | READ_LONG_F(adr, res) |
18158 | flag_C = 0; |
18159 | flag_V = 0; |
18160 | flag_NotZ = res; |
18161 | flag_N = res >> 24; |
18162 | POST_IO |
18163 | RET(14) |
18164 | } |
18165 | |
18166 | // TST |
18167 | OPCODE(0x4AA8) |
18168 | { |
18169 | u32 adr, res; |
18170 | u32 src, dst; |
18171 | |
18172 | FETCH_SWORD(adr); |
18173 | adr += AREG((Opcode >> 0) & 7); |
18174 | PRE_IO |
18175 | READ_LONG_F(adr, res) |
18176 | flag_C = 0; |
18177 | flag_V = 0; |
18178 | flag_NotZ = res; |
18179 | flag_N = res >> 24; |
18180 | POST_IO |
18181 | RET(16) |
18182 | } |
18183 | |
18184 | // TST |
18185 | OPCODE(0x4AB0) |
18186 | { |
18187 | u32 adr, res; |
18188 | u32 src, dst; |
18189 | |
18190 | adr = AREG((Opcode >> 0) & 7); |
18191 | DECODE_EXT_WORD |
18192 | PRE_IO |
18193 | READ_LONG_F(adr, res) |
18194 | flag_C = 0; |
18195 | flag_V = 0; |
18196 | flag_NotZ = res; |
18197 | flag_N = res >> 24; |
18198 | POST_IO |
18199 | RET(18) |
18200 | } |
18201 | |
18202 | // TST |
18203 | OPCODE(0x4AB8) |
18204 | { |
18205 | u32 adr, res; |
18206 | u32 src, dst; |
18207 | |
18208 | FETCH_SWORD(adr); |
18209 | PRE_IO |
18210 | READ_LONG_F(adr, res) |
18211 | flag_C = 0; |
18212 | flag_V = 0; |
18213 | flag_NotZ = res; |
18214 | flag_N = res >> 24; |
18215 | POST_IO |
18216 | RET(16) |
18217 | } |
18218 | |
18219 | // TST |
18220 | OPCODE(0x4AB9) |
18221 | { |
18222 | u32 adr, res; |
18223 | u32 src, dst; |
18224 | |
18225 | FETCH_LONG(adr); |
18226 | PRE_IO |
18227 | READ_LONG_F(adr, res) |
18228 | flag_C = 0; |
18229 | flag_V = 0; |
18230 | flag_NotZ = res; |
18231 | flag_N = res >> 24; |
18232 | POST_IO |
18233 | RET(20) |
18234 | } |
18235 | |
18236 | // TST |
18237 | OPCODE(0x4A9F) |
18238 | { |
18239 | u32 adr, res; |
18240 | u32 src, dst; |
18241 | |
18242 | adr = AREG(7); |
18243 | AREG(7) += 4; |
18244 | PRE_IO |
18245 | READ_LONG_F(adr, res) |
18246 | flag_C = 0; |
18247 | flag_V = 0; |
18248 | flag_NotZ = res; |
18249 | flag_N = res >> 24; |
18250 | POST_IO |
18251 | RET(12) |
18252 | } |
18253 | |
18254 | // TST |
18255 | OPCODE(0x4AA7) |
18256 | { |
18257 | u32 adr, res; |
18258 | u32 src, dst; |
18259 | |
18260 | adr = AREG(7) - 4; |
18261 | AREG(7) = adr; |
18262 | PRE_IO |
18263 | READ_LONG_F(adr, res) |
18264 | flag_C = 0; |
18265 | flag_V = 0; |
18266 | flag_NotZ = res; |
18267 | flag_N = res >> 24; |
18268 | POST_IO |
18269 | RET(14) |
18270 | } |
18271 | |
18272 | // TAS |
18273 | OPCODE(0x4AC0) |
18274 | { |
18275 | u32 adr, res; |
18276 | u32 src, dst; |
18277 | |
18278 | res = DREGu8((Opcode >> 0) & 7); |
18279 | flag_C = 0; |
18280 | flag_V = 0; |
18281 | flag_NotZ = res; |
18282 | flag_N = res; |
18283 | res |= 0x80; |
18284 | DREGu8((Opcode >> 0) & 7) = res; |
18285 | RET(4) |
18286 | } |
18287 | |
18288 | // TAS |
18289 | OPCODE(0x4AD0) |
18290 | { |
18291 | u32 adr, res; |
18292 | u32 src, dst; |
18293 | |
18294 | adr = AREG((Opcode >> 0) & 7); |
18295 | PRE_IO |
18296 | READ_BYTE_F(adr, res) |
18297 | flag_C = 0; |
18298 | flag_V = 0; |
18299 | flag_NotZ = res; |
18300 | flag_N = res; |
b5e5172d |
18301 | #ifdef PICODRIVE_HACK |
18302 | if (g_m68kcontext == &PicoCpuFS68k) { |
18303 | res |= 0x80; |
18304 | WRITE_BYTE_F(adr, res); |
18305 | } |
18306 | #endif |
18307 | |
70357ce5 |
18308 | POST_IO |
b5e5172d |
18309 | #ifdef USE_CYCLONE_TIMING |
18310 | RET(18) |
18311 | #else |
70357ce5 |
18312 | RET(8) |
b5e5172d |
18313 | #endif |
70357ce5 |
18314 | } |
18315 | |
18316 | // TAS |
18317 | OPCODE(0x4AD8) |
18318 | { |
18319 | u32 adr, res; |
18320 | u32 src, dst; |
18321 | |
18322 | adr = AREG((Opcode >> 0) & 7); |
18323 | AREG((Opcode >> 0) & 7) += 1; |
18324 | PRE_IO |
18325 | READ_BYTE_F(adr, res) |
18326 | flag_C = 0; |
18327 | flag_V = 0; |
18328 | flag_NotZ = res; |
18329 | flag_N = res; |
b5e5172d |
18330 | |
18331 | #ifdef PICODRIVE_HACK |
18332 | if (g_m68kcontext == &PicoCpuFS68k) { |
18333 | res |= 0x80; |
18334 | WRITE_BYTE_F(adr, res); |
18335 | } |
18336 | #endif |
18337 | |
70357ce5 |
18338 | POST_IO |
b5e5172d |
18339 | #ifdef USE_CYCLONE_TIMING |
18340 | RET(18) |
18341 | #else |
70357ce5 |
18342 | RET(8) |
b5e5172d |
18343 | #endif |
70357ce5 |
18344 | } |
18345 | |
18346 | // TAS |
18347 | OPCODE(0x4AE0) |
18348 | { |
18349 | u32 adr, res; |
18350 | u32 src, dst; |
18351 | |
18352 | adr = AREG((Opcode >> 0) & 7) - 1; |
18353 | AREG((Opcode >> 0) & 7) = adr; |
18354 | PRE_IO |
18355 | READ_BYTE_F(adr, res) |
18356 | flag_C = 0; |
18357 | flag_V = 0; |
18358 | flag_NotZ = res; |
18359 | flag_N = res; |
b5e5172d |
18360 | |
18361 | #ifdef PICODRIVE_HACK |
18362 | if (g_m68kcontext == &PicoCpuFS68k) { |
18363 | res |= 0x80; |
18364 | WRITE_BYTE_F(adr, res); |
18365 | } |
18366 | #endif |
18367 | |
70357ce5 |
18368 | POST_IO |
b5e5172d |
18369 | #ifdef USE_CYCLONE_TIMING |
18370 | RET(20) |
18371 | #else |
70357ce5 |
18372 | RET(10) |
b5e5172d |
18373 | #endif |
70357ce5 |
18374 | } |
18375 | |
18376 | // TAS |
18377 | OPCODE(0x4AE8) |
18378 | { |
18379 | u32 adr, res; |
18380 | u32 src, dst; |
18381 | |
18382 | FETCH_SWORD(adr); |
18383 | adr += AREG((Opcode >> 0) & 7); |
18384 | PRE_IO |
18385 | READ_BYTE_F(adr, res) |
18386 | flag_C = 0; |
18387 | flag_V = 0; |
18388 | flag_NotZ = res; |
18389 | flag_N = res; |
b5e5172d |
18390 | |
18391 | #ifdef PICODRIVE_HACK |
18392 | if (g_m68kcontext == &PicoCpuFS68k) { |
18393 | res |= 0x80; |
18394 | WRITE_BYTE_F(adr, res); |
18395 | } |
18396 | #endif |
18397 | |
70357ce5 |
18398 | POST_IO |
b5e5172d |
18399 | #ifdef USE_CYCLONE_TIMING |
18400 | RET(22) |
18401 | #else |
70357ce5 |
18402 | RET(12) |
b5e5172d |
18403 | #endif |
70357ce5 |
18404 | } |
18405 | |
18406 | // TAS |
18407 | OPCODE(0x4AF0) |
18408 | { |
18409 | u32 adr, res; |
18410 | u32 src, dst; |
18411 | |
18412 | adr = AREG((Opcode >> 0) & 7); |
18413 | DECODE_EXT_WORD |
18414 | PRE_IO |
18415 | READ_BYTE_F(adr, res) |
18416 | flag_C = 0; |
18417 | flag_V = 0; |
18418 | flag_NotZ = res; |
18419 | flag_N = res; |
b5e5172d |
18420 | |
18421 | #ifdef PICODRIVE_HACK |
18422 | if (g_m68kcontext == &PicoCpuFS68k) { |
18423 | res |= 0x80; |
18424 | WRITE_BYTE_F(adr, res); |
18425 | } |
18426 | #endif |
18427 | |
70357ce5 |
18428 | POST_IO |
b5e5172d |
18429 | #ifdef USE_CYCLONE_TIMING |
18430 | RET(24) |
18431 | #else |
70357ce5 |
18432 | RET(14) |
b5e5172d |
18433 | #endif |
70357ce5 |
18434 | } |
18435 | |
18436 | // TAS |
18437 | OPCODE(0x4AF8) |
18438 | { |
18439 | u32 adr, res; |
18440 | u32 src, dst; |
18441 | |
18442 | FETCH_SWORD(adr); |
18443 | PRE_IO |
18444 | READ_BYTE_F(adr, res) |
18445 | flag_C = 0; |
18446 | flag_V = 0; |
18447 | flag_NotZ = res; |
18448 | flag_N = res; |
b5e5172d |
18449 | |
18450 | #ifdef PICODRIVE_HACK |
18451 | if (g_m68kcontext == &PicoCpuFS68k) { |
18452 | res |= 0x80; |
18453 | WRITE_BYTE_F(adr, res); |
18454 | } |
18455 | #endif |
18456 | |
70357ce5 |
18457 | POST_IO |
b5e5172d |
18458 | #ifdef USE_CYCLONE_TIMING |
18459 | RET(22) |
18460 | #else |
70357ce5 |
18461 | RET(12) |
b5e5172d |
18462 | #endif |
70357ce5 |
18463 | } |
18464 | |
18465 | // TAS |
18466 | OPCODE(0x4AF9) |
18467 | { |
18468 | u32 adr, res; |
18469 | u32 src, dst; |
18470 | |
18471 | FETCH_LONG(adr); |
18472 | PRE_IO |
18473 | READ_BYTE_F(adr, res) |
18474 | flag_C = 0; |
18475 | flag_V = 0; |
18476 | flag_NotZ = res; |
18477 | flag_N = res; |
b5e5172d |
18478 | |
18479 | #ifdef PICODRIVE_HACK |
18480 | if (g_m68kcontext == &PicoCpuFS68k) { |
18481 | res |= 0x80; |
18482 | WRITE_BYTE_F(adr, res); |
18483 | } |
18484 | #endif |
18485 | |
70357ce5 |
18486 | POST_IO |
b5e5172d |
18487 | #ifdef USE_CYCLONE_TIMING |
18488 | RET(26) |
18489 | #else |
70357ce5 |
18490 | RET(16) |
b5e5172d |
18491 | #endif |
70357ce5 |
18492 | } |
18493 | |
18494 | // TAS |
18495 | OPCODE(0x4ADF) |
18496 | { |
18497 | u32 adr, res; |
18498 | u32 src, dst; |
18499 | |
18500 | adr = AREG(7); |
18501 | AREG(7) += 2; |
18502 | PRE_IO |
18503 | READ_BYTE_F(adr, res) |
18504 | flag_C = 0; |
18505 | flag_V = 0; |
18506 | flag_NotZ = res; |
18507 | flag_N = res; |
b5e5172d |
18508 | |
18509 | #ifdef PICODRIVE_HACK |
18510 | if (g_m68kcontext == &PicoCpuFS68k) { |
18511 | res |= 0x80; |
18512 | WRITE_BYTE_F(adr, res); |
18513 | } |
18514 | #endif |
18515 | |
70357ce5 |
18516 | POST_IO |
b5e5172d |
18517 | #ifdef USE_CYCLONE_TIMING |
18518 | RET(18) |
18519 | #else |
70357ce5 |
18520 | RET(8) |
b5e5172d |
18521 | #endif |
70357ce5 |
18522 | } |
18523 | |
18524 | // TAS |
18525 | OPCODE(0x4AE7) |
18526 | { |
18527 | u32 adr, res; |
18528 | u32 src, dst; |
18529 | |
18530 | adr = AREG(7) - 2; |
18531 | AREG(7) = adr; |
18532 | PRE_IO |
18533 | READ_BYTE_F(adr, res) |
18534 | flag_C = 0; |
18535 | flag_V = 0; |
18536 | flag_NotZ = res; |
18537 | flag_N = res; |
b5e5172d |
18538 | |
18539 | #ifdef PICODRIVE_HACK |
18540 | if (g_m68kcontext == &PicoCpuFS68k) { |
18541 | res |= 0x80; |
18542 | WRITE_BYTE_F(adr, res); |
18543 | } |
18544 | #endif |
18545 | |
70357ce5 |
18546 | POST_IO |
b5e5172d |
18547 | #ifdef USE_CYCLONE_TIMING |
18548 | RET(20) |
18549 | #else |
18550 | RET(8) |
18551 | #endif |
70357ce5 |
18552 | } |
18553 | |
18554 | // ILLEGAL |
18555 | OPCODE(0x4AFC) |
18556 | { |
d0ae0cb4 |
18557 | SET_PC(execute_exception(M68K_ILLEGAL_INSTRUCTION_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18558 | RET(0) |
70357ce5 |
18559 | } |
18560 | |
18561 | // ILLEGAL A000-AFFF |
18562 | OPCODE(0xA000) |
18563 | { |
d0ae0cb4 |
18564 | SET_PC(execute_exception(M68K_1010_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18565 | RET(0) |
70357ce5 |
18566 | } |
18567 | |
18568 | // ILLEGAL F000-FFFF |
18569 | OPCODE(0xF000) |
18570 | { |
d0ae0cb4 |
18571 | SET_PC(execute_exception(M68K_1111_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18572 | RET(0) // 4 already taken by exc. handler |
70357ce5 |
18573 | } |
18574 | |
18575 | // MOVEMaR |
18576 | OPCODE(0x4C90) |
18577 | { |
18578 | u32 adr, res; |
18579 | u32 src, dst; |
18580 | |
18581 | s32 *psrc; |
18582 | |
18583 | FETCH_WORD(res); |
18584 | adr = AREG((Opcode >> 0) & 7); |
18585 | psrc = &DREGs32(0); |
18586 | dst = adr; |
18587 | PRE_IO |
18588 | do |
18589 | { |
18590 | if (res & 1) |
18591 | { |
18592 | READSX_WORD_F(adr, *psrc) |
18593 | adr += 2; |
18594 | } |
18595 | psrc++; |
18596 | } while (res >>= 1); |
18597 | POST_IO |
18598 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18599 | #ifdef USE_CYCLONE_TIMING |
18600 | RET(12) |
18601 | #else |
18602 | RET(16) |
18603 | #endif |
18604 | } |
18605 | |
18606 | // MOVEMaR |
18607 | OPCODE(0x4C98) |
18608 | { |
18609 | u32 adr, res; |
18610 | u32 src, dst; |
18611 | |
18612 | s32 *psrc; |
18613 | |
18614 | FETCH_WORD(res); |
18615 | adr = AREG((Opcode >> 0) & 7); |
18616 | psrc = &DREGs32(0); |
18617 | dst = adr; |
18618 | PRE_IO |
18619 | do |
18620 | { |
18621 | if (res & 1) |
18622 | { |
18623 | READSX_WORD_F(adr, *psrc) |
18624 | adr += 2; |
18625 | } |
18626 | psrc++; |
18627 | } while (res >>= 1); |
18628 | AREG((Opcode >> 0) & 7) = adr; |
18629 | POST_IO |
18630 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18631 | RET(12) |
18632 | } |
18633 | |
18634 | // MOVEMaR |
18635 | OPCODE(0x4CA8) |
18636 | { |
18637 | u32 adr, res; |
18638 | u32 src, dst; |
18639 | |
18640 | s32 *psrc; |
18641 | |
18642 | FETCH_WORD(res); |
18643 | FETCH_SWORD(adr); |
18644 | adr += AREG((Opcode >> 0) & 7); |
18645 | psrc = &DREGs32(0); |
18646 | dst = adr; |
18647 | PRE_IO |
18648 | do |
18649 | { |
18650 | if (res & 1) |
18651 | { |
18652 | READSX_WORD_F(adr, *psrc) |
18653 | adr += 2; |
18654 | } |
18655 | psrc++; |
18656 | } while (res >>= 1); |
18657 | POST_IO |
18658 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18659 | #ifdef USE_CYCLONE_TIMING |
18660 | RET(16) |
18661 | #else |
18662 | RET(24) |
18663 | #endif |
18664 | } |
18665 | |
18666 | // MOVEMaR |
18667 | OPCODE(0x4CB0) |
18668 | { |
18669 | u32 adr, res; |
18670 | u32 src, dst; |
18671 | |
18672 | s32 *psrc; |
18673 | |
18674 | FETCH_WORD(res); |
18675 | adr = AREG((Opcode >> 0) & 7); |
18676 | DECODE_EXT_WORD |
18677 | psrc = &DREGs32(0); |
18678 | dst = adr; |
18679 | PRE_IO |
18680 | do |
18681 | { |
18682 | if (res & 1) |
18683 | { |
18684 | READSX_WORD_F(adr, *psrc) |
18685 | adr += 2; |
18686 | } |
18687 | psrc++; |
18688 | } while (res >>= 1); |
18689 | POST_IO |
18690 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18691 | #ifdef USE_CYCLONE_TIMING |
18692 | RET(18) |
18693 | #else |
18694 | RET(28) |
18695 | #endif |
18696 | } |
18697 | |
18698 | // MOVEMaR |
18699 | OPCODE(0x4CB8) |
18700 | { |
18701 | u32 adr, res; |
18702 | u32 src, dst; |
18703 | |
18704 | s32 *psrc; |
18705 | |
18706 | FETCH_WORD(res); |
18707 | FETCH_SWORD(adr); |
18708 | psrc = &DREGs32(0); |
18709 | dst = adr; |
18710 | PRE_IO |
18711 | do |
18712 | { |
18713 | if (res & 1) |
18714 | { |
18715 | READSX_WORD_F(adr, *psrc) |
18716 | adr += 2; |
18717 | } |
18718 | psrc++; |
18719 | } while (res >>= 1); |
18720 | POST_IO |
18721 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18722 | #ifdef USE_CYCLONE_TIMING |
18723 | RET(16) |
18724 | #else |
18725 | RET(24) |
18726 | #endif |
18727 | } |
18728 | |
18729 | // MOVEMaR |
18730 | OPCODE(0x4CB9) |
18731 | { |
18732 | u32 adr, res; |
18733 | u32 src, dst; |
18734 | |
18735 | s32 *psrc; |
18736 | |
18737 | FETCH_WORD(res); |
18738 | FETCH_LONG(adr); |
18739 | psrc = &DREGs32(0); |
18740 | dst = adr; |
18741 | PRE_IO |
18742 | do |
18743 | { |
18744 | if (res & 1) |
18745 | { |
18746 | READSX_WORD_F(adr, *psrc) |
18747 | adr += 2; |
18748 | } |
18749 | psrc++; |
18750 | } while (res >>= 1); |
18751 | POST_IO |
18752 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18753 | #ifdef USE_CYCLONE_TIMING |
18754 | RET(20) |
18755 | #else |
18756 | RET(32) |
18757 | #endif |
18758 | } |
18759 | |
18760 | // MOVEMaR |
18761 | OPCODE(0x4CBA) |
18762 | { |
18763 | u32 adr, res; |
18764 | u32 src, dst; |
18765 | |
18766 | s32 *psrc; |
18767 | |
18768 | FETCH_WORD(res); |
be26eb23 |
18769 | adr = GET_SWORD + GET_PC; |
70357ce5 |
18770 | PC++; |
18771 | psrc = &DREGs32(0); |
18772 | dst = adr; |
18773 | PRE_IO |
18774 | do |
18775 | { |
18776 | if (res & 1) |
18777 | { |
18778 | READSX_WORD_F(adr, *psrc) |
18779 | adr += 2; |
18780 | } |
18781 | psrc++; |
18782 | } while (res >>= 1); |
18783 | POST_IO |
18784 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18785 | #ifdef USE_CYCLONE_TIMING |
18786 | RET(16) |
18787 | #else |
18788 | RET(24) |
18789 | #endif |
18790 | } |
18791 | |
18792 | // MOVEMaR |
18793 | OPCODE(0x4CBB) |
18794 | { |
18795 | u32 adr, res; |
18796 | u32 src, dst; |
18797 | |
18798 | s32 *psrc; |
18799 | |
18800 | FETCH_WORD(res); |
be26eb23 |
18801 | adr = GET_PC; |
70357ce5 |
18802 | DECODE_EXT_WORD |
18803 | psrc = &DREGs32(0); |
18804 | dst = adr; |
18805 | PRE_IO |
18806 | do |
18807 | { |
18808 | if (res & 1) |
18809 | { |
18810 | READSX_WORD_F(adr, *psrc) |
18811 | adr += 2; |
18812 | } |
18813 | psrc++; |
18814 | } while (res >>= 1); |
18815 | POST_IO |
18816 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18817 | #ifdef USE_CYCLONE_TIMING |
18818 | RET(18) |
18819 | #else |
18820 | RET(28) |
18821 | #endif |
18822 | } |
18823 | |
18824 | // MOVEMaR |
18825 | OPCODE(0x4C9F) |
18826 | { |
18827 | u32 adr, res; |
18828 | u32 src, dst; |
18829 | |
18830 | s32 *psrc; |
18831 | |
18832 | FETCH_WORD(res); |
18833 | adr = AREG(7); |
18834 | psrc = &DREGs32(0); |
18835 | dst = adr; |
18836 | PRE_IO |
18837 | do |
18838 | { |
18839 | if (res & 1) |
18840 | { |
18841 | READSX_WORD_F(adr, *psrc) |
18842 | adr += 2; |
18843 | } |
18844 | psrc++; |
18845 | } while (res >>= 1); |
18846 | AREG(7) = adr; |
18847 | POST_IO |
18848 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18849 | RET(12) |
18850 | } |
18851 | |
18852 | // MOVEMaR |
18853 | OPCODE(0x4CD0) |
18854 | { |
18855 | u32 adr, res; |
18856 | u32 src, dst; |
18857 | |
18858 | u32 *psrc; |
18859 | |
18860 | FETCH_WORD(res); |
18861 | adr = AREG((Opcode >> 0) & 7); |
18862 | psrc = &DREGu32(0); |
18863 | dst = adr; |
18864 | PRE_IO |
18865 | do |
18866 | { |
18867 | if (res & 1) |
18868 | { |
18869 | READ_LONG_F(adr, *psrc) |
18870 | adr += 4; |
18871 | } |
18872 | psrc++; |
18873 | } while (res >>= 1); |
18874 | POST_IO |
18875 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18876 | #ifdef USE_CYCLONE_TIMING |
18877 | RET(12) |
18878 | #else |
18879 | RET(20) |
18880 | #endif |
18881 | } |
18882 | |
18883 | // MOVEMaR |
18884 | OPCODE(0x4CD8) |
18885 | { |
18886 | u32 adr, res; |
18887 | u32 src, dst; |
18888 | |
18889 | u32 *psrc; |
18890 | |
18891 | FETCH_WORD(res); |
18892 | adr = AREG((Opcode >> 0) & 7); |
18893 | psrc = &DREGu32(0); |
18894 | dst = adr; |
18895 | PRE_IO |
18896 | do |
18897 | { |
18898 | if (res & 1) |
18899 | { |
18900 | READ_LONG_F(adr, *psrc) |
18901 | adr += 4; |
18902 | } |
18903 | psrc++; |
18904 | } while (res >>= 1); |
18905 | AREG((Opcode >> 0) & 7) = adr; |
18906 | POST_IO |
18907 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18908 | RET(12) |
18909 | } |
18910 | |
18911 | // MOVEMaR |
18912 | OPCODE(0x4CE8) |
18913 | { |
18914 | u32 adr, res; |
18915 | u32 src, dst; |
18916 | |
18917 | u32 *psrc; |
18918 | |
18919 | FETCH_WORD(res); |
18920 | FETCH_SWORD(adr); |
18921 | adr += AREG((Opcode >> 0) & 7); |
18922 | psrc = &DREGu32(0); |
18923 | dst = adr; |
18924 | PRE_IO |
18925 | do |
18926 | { |
18927 | if (res & 1) |
18928 | { |
18929 | READ_LONG_F(adr, *psrc) |
18930 | adr += 4; |
18931 | } |
18932 | psrc++; |
18933 | } while (res >>= 1); |
18934 | POST_IO |
18935 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18936 | #ifdef USE_CYCLONE_TIMING |
18937 | RET(16) |
18938 | #else |
18939 | RET(28) |
18940 | #endif |
18941 | } |
18942 | |
18943 | // MOVEMaR |
18944 | OPCODE(0x4CF0) |
18945 | { |
18946 | u32 adr, res; |
18947 | u32 src, dst; |
18948 | |
18949 | u32 *psrc; |
18950 | |
18951 | FETCH_WORD(res); |
18952 | adr = AREG((Opcode >> 0) & 7); |
18953 | DECODE_EXT_WORD |
18954 | psrc = &DREGu32(0); |
18955 | dst = adr; |
18956 | PRE_IO |
18957 | do |
18958 | { |
18959 | if (res & 1) |
18960 | { |
18961 | READ_LONG_F(adr, *psrc) |
18962 | adr += 4; |
18963 | } |
18964 | psrc++; |
18965 | } while (res >>= 1); |
18966 | POST_IO |
18967 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18968 | #ifdef USE_CYCLONE_TIMING |
18969 | RET(18) |
18970 | #else |
18971 | RET(32) |
18972 | #endif |
18973 | } |
18974 | |
18975 | // MOVEMaR |
18976 | OPCODE(0x4CF8) |
18977 | { |
18978 | u32 adr, res; |
18979 | u32 src, dst; |
18980 | |
18981 | u32 *psrc; |
18982 | |
18983 | FETCH_WORD(res); |
18984 | FETCH_SWORD(adr); |
18985 | psrc = &DREGu32(0); |
18986 | dst = adr; |
18987 | PRE_IO |
18988 | do |
18989 | { |
18990 | if (res & 1) |
18991 | { |
18992 | READ_LONG_F(adr, *psrc) |
18993 | adr += 4; |
18994 | } |
18995 | psrc++; |
18996 | } while (res >>= 1); |
18997 | POST_IO |
18998 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18999 | #ifdef USE_CYCLONE_TIMING |
19000 | RET(16) |
19001 | #else |
19002 | RET(28) |
19003 | #endif |
19004 | } |
19005 | |
19006 | // MOVEMaR |
19007 | OPCODE(0x4CF9) |
19008 | { |
19009 | u32 adr, res; |
19010 | u32 src, dst; |
19011 | |
19012 | u32 *psrc; |
19013 | |
19014 | FETCH_WORD(res); |
19015 | FETCH_LONG(adr); |
19016 | psrc = &DREGu32(0); |
19017 | dst = adr; |
19018 | PRE_IO |
19019 | do |
19020 | { |
19021 | if (res & 1) |
19022 | { |
19023 | READ_LONG_F(adr, *psrc) |
19024 | adr += 4; |
19025 | } |
19026 | psrc++; |
19027 | } while (res >>= 1); |
19028 | POST_IO |
19029 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19030 | #ifdef USE_CYCLONE_TIMING |
19031 | RET(20) |
19032 | #else |
19033 | RET(36) |
19034 | #endif |
19035 | } |
19036 | |
19037 | // MOVEMaR |
19038 | OPCODE(0x4CFA) |
19039 | { |
19040 | u32 adr, res; |
19041 | u32 src, dst; |
19042 | |
19043 | u32 *psrc; |
19044 | |
19045 | FETCH_WORD(res); |
be26eb23 |
19046 | adr = GET_SWORD + GET_PC; |
70357ce5 |
19047 | PC++; |
19048 | psrc = &DREGu32(0); |
19049 | dst = adr; |
19050 | PRE_IO |
19051 | do |
19052 | { |
19053 | if (res & 1) |
19054 | { |
19055 | READ_LONG_F(adr, *psrc) |
19056 | adr += 4; |
19057 | } |
19058 | psrc++; |
19059 | } while (res >>= 1); |
19060 | POST_IO |
19061 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19062 | #ifdef USE_CYCLONE_TIMING |
19063 | RET(16) |
19064 | #else |
19065 | RET(28) |
19066 | #endif |
19067 | } |
19068 | |
19069 | // MOVEMaR |
19070 | OPCODE(0x4CFB) |
19071 | { |
19072 | u32 adr, res; |
19073 | u32 src, dst; |
19074 | |
19075 | u32 *psrc; |
19076 | |
19077 | FETCH_WORD(res); |
be26eb23 |
19078 | adr = GET_PC; |
70357ce5 |
19079 | DECODE_EXT_WORD |
19080 | psrc = &DREGu32(0); |
19081 | dst = adr; |
19082 | PRE_IO |
19083 | do |
19084 | { |
19085 | if (res & 1) |
19086 | { |
19087 | READ_LONG_F(adr, *psrc) |
19088 | adr += 4; |
19089 | } |
19090 | psrc++; |
19091 | } while (res >>= 1); |
19092 | POST_IO |
19093 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19094 | #ifdef USE_CYCLONE_TIMING |
19095 | RET(18) |
19096 | #else |
19097 | RET(32) |
19098 | #endif |
19099 | } |
19100 | |
19101 | // MOVEMaR |
19102 | OPCODE(0x4CDF) |
19103 | { |
19104 | u32 adr, res; |
19105 | u32 src, dst; |
19106 | |
19107 | u32 *psrc; |
19108 | |
19109 | FETCH_WORD(res); |
19110 | adr = AREG(7); |
19111 | psrc = &DREGu32(0); |
19112 | dst = adr; |
19113 | PRE_IO |
19114 | do |
19115 | { |
19116 | if (res & 1) |
19117 | { |
19118 | READ_LONG_F(adr, *psrc) |
19119 | adr += 4; |
19120 | } |
19121 | psrc++; |
19122 | } while (res >>= 1); |
19123 | AREG(7) = adr; |
19124 | POST_IO |
19125 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19126 | RET(12) |
19127 | } |
19128 | |
19129 | // TRAP |
19130 | OPCODE(0x4E40) |
19131 | { |
d0ae0cb4 |
19132 | SET_PC(execute_exception(M68K_TRAP_BASE_EX + (Opcode & 0xF), GET_PC, GET_SR)); |
70357ce5 |
19133 | RET(4) |
19134 | } |
19135 | |
19136 | // LINK |
19137 | OPCODE(0x4E50) |
19138 | { |
19139 | u32 adr, res; |
19140 | u32 src, dst; |
19141 | |
19142 | res = AREGu32((Opcode >> 0) & 7); |
19143 | PRE_IO |
19144 | PUSH_32_F(res) |
19145 | res = AREG(7); |
19146 | AREG((Opcode >> 0) & 7) = res; |
19147 | FETCH_SWORD(res); |
19148 | AREG(7) += res; |
19149 | POST_IO |
19150 | RET(16) |
19151 | } |
19152 | |
19153 | // LINKA7 |
19154 | OPCODE(0x4E57) |
19155 | { |
19156 | u32 adr, res; |
19157 | u32 src, dst; |
19158 | |
19159 | AREG(7) -= 4; |
19160 | PRE_IO |
19161 | WRITE_LONG_DEC_F(AREG(7), AREG(7)) |
19162 | FETCH_SWORD(res); |
19163 | AREG(7) += res; |
19164 | POST_IO |
19165 | RET(16) |
19166 | } |
19167 | |
19168 | // ULNK |
19169 | OPCODE(0x4E58) |
19170 | { |
19171 | u32 adr, res; |
19172 | u32 src, dst; |
19173 | |
19174 | src = AREGu32((Opcode >> 0) & 7); |
19175 | AREG(7) = src + 4; |
19176 | PRE_IO |
19177 | READ_LONG_F(src, res) |
19178 | AREG((Opcode >> 0) & 7) = res; |
19179 | POST_IO |
19180 | RET(12) |
19181 | } |
19182 | |
19183 | // ULNKA7 |
19184 | OPCODE(0x4E5F) |
19185 | { |
19186 | u32 adr, res; |
19187 | u32 src, dst; |
19188 | |
19189 | PRE_IO |
19190 | READ_LONG_F(AREG(7), AREG(7)) |
19191 | POST_IO |
19192 | RET(12) |
19193 | } |
19194 | |
19195 | // MOVEAUSP |
19196 | OPCODE(0x4E60) |
19197 | { |
19198 | u32 adr, res; |
19199 | u32 src, dst; |
19200 | |
19201 | if (!flag_S) |
19202 | { |
d0ae0cb4 |
19203 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19204 | RET(4) |
19205 | } |
19206 | res = AREGu32((Opcode >> 0) & 7); |
19207 | ASP = res; |
19208 | RET(4) |
19209 | } |
19210 | |
19211 | // MOVEUSPA |
19212 | OPCODE(0x4E68) |
19213 | { |
19214 | u32 adr, res; |
19215 | u32 src, dst; |
19216 | |
19217 | if (!flag_S) |
19218 | { |
d0ae0cb4 |
19219 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19220 | RET(4) |
19221 | } |
19222 | res = ASP; |
19223 | AREG((Opcode >> 0) & 7) = res; |
19224 | RET(4) |
19225 | } |
19226 | |
19227 | // RESET |
19228 | OPCODE(0x4E70) |
19229 | { |
19230 | u32 adr, res; |
19231 | u32 src, dst; |
19232 | |
19233 | if (!flag_S) |
19234 | { |
d0ae0cb4 |
19235 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19236 | RET(4) |
19237 | } |
19238 | PRE_IO |
19239 | if (m68kcontext.reset_handler) m68kcontext.reset_handler(); |
19240 | // CPU->Reset_CallBack(); |
19241 | POST_IO |
19242 | RET(132) |
19243 | } |
19244 | |
19245 | // NOP |
19246 | OPCODE(0x4E71) |
19247 | { |
19248 | RET(4) |
19249 | } |
19250 | |
19251 | // STOP |
19252 | OPCODE(0x4E72) |
19253 | { |
19254 | u32 adr, res; |
19255 | u32 src, dst; |
19256 | |
19257 | if (!flag_S) |
19258 | { |
d0ae0cb4 |
19259 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19260 | RET(4) |
19261 | } |
19262 | FETCH_WORD(res); |
19263 | res &= M68K_SR_MASK; |
19264 | SET_SR(res) |
19265 | if (!flag_S) |
19266 | { |
19267 | res = AREG(7); |
19268 | AREG(7) = ASP; |
19269 | ASP = res; |
19270 | } |
03e4f2a3 |
19271 | m68kcontext.execinfo |= FM68K_HALTED; |
fcf94fcc |
19272 | RET0() |
70357ce5 |
19273 | } |
19274 | |
19275 | // RTE |
19276 | OPCODE(0x4E73) |
19277 | { |
19278 | u32 adr, res; |
19279 | u32 src, dst; |
19280 | |
19281 | if (!flag_S) |
19282 | { |
d0ae0cb4 |
19283 | SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
19284 | RET(4) |
19285 | } |
19286 | PRE_IO |
19287 | POP_16_F(res) |
19288 | SET_SR(res) |
19289 | POP_32_F(res) |
19290 | SET_PC(res) |
19291 | if (!flag_S) |
19292 | { |
19293 | res = AREG(7); |
19294 | AREG(7) = ASP; |
19295 | ASP = res; |
19296 | } |
19297 | POST_IO |
03e4f2a3 |
19298 | m68kcontext.execinfo &= ~(FM68K_EMULATE_GROUP_0|FM68K_EMULATE_TRACE|FM68K_DO_TRACE); |
70357ce5 |
19299 | CHECK_INT_TO_JUMP(20) |
19300 | RET(20) |
19301 | } |
19302 | |
19303 | // RTS |
19304 | OPCODE(0x4E75) |
19305 | { |
19306 | u32 adr, res; |
19307 | u32 src, dst; |
19308 | |
19309 | PRE_IO |
19310 | POP_32_F(res) |
19311 | SET_PC(res) |
19312 | CHECK_BRANCH_EXCEPTION(res) |
19313 | POST_IO |
19314 | RET(16) |
19315 | } |
19316 | |
19317 | // TRAPV |
19318 | OPCODE(0x4E76) |
19319 | { |
19320 | if (flag_V & 0x80) |
d0ae0cb4 |
19321 | SET_PC(execute_exception(M68K_TRAPV_EX, GET_PC, GET_SR)); |
70357ce5 |
19322 | RET(4) |
19323 | } |
19324 | |
19325 | // RTR |
19326 | OPCODE(0x4E77) |
19327 | { |
19328 | u32 adr, res; |
19329 | u32 src, dst; |
19330 | |
19331 | PRE_IO |
19332 | POP_16_F(res) |
19333 | SET_CCR(res) |
19334 | POP_32_F(res) |
19335 | SET_PC(res) |
19336 | CHECK_BRANCH_EXCEPTION(res) |
19337 | POST_IO |
19338 | RET(20) |
19339 | } |
19340 | |
19341 | // JSR |
19342 | OPCODE(0x4E90) |
19343 | { |
19344 | u32 adr, res; |
19345 | u32 src, dst; |
19346 | |
19347 | adr = AREG((Opcode >> 0) & 7); |
19348 | { |
19349 | u32 oldPC; |
19350 | |
be26eb23 |
19351 | oldPC = GET_PC; |
70357ce5 |
19352 | PRE_IO |
19353 | PUSH_32_F(oldPC) |
19354 | } |
19355 | SET_PC(adr) |
19356 | CHECK_BRANCH_EXCEPTION(adr) |
19357 | POST_IO |
19358 | RET(16) |
19359 | } |
19360 | |
19361 | // JSR |
19362 | OPCODE(0x4EA8) |
19363 | { |
19364 | u32 adr, res; |
19365 | u32 src, dst; |
19366 | |
19367 | FETCH_SWORD(adr); |
19368 | adr += AREG((Opcode >> 0) & 7); |
19369 | { |
19370 | u32 oldPC; |
19371 | |
be26eb23 |
19372 | oldPC = GET_PC; |
70357ce5 |
19373 | PRE_IO |
19374 | PUSH_32_F(oldPC) |
19375 | } |
19376 | SET_PC(adr) |
19377 | CHECK_BRANCH_EXCEPTION(adr) |
19378 | POST_IO |
19379 | RET(18) |
19380 | } |
19381 | |
19382 | // JSR |
19383 | OPCODE(0x4EB0) |
19384 | { |
19385 | u32 adr, res; |
19386 | u32 src, dst; |
19387 | |
19388 | adr = AREG((Opcode >> 0) & 7); |
19389 | DECODE_EXT_WORD |
19390 | { |
19391 | u32 oldPC; |
19392 | |
be26eb23 |
19393 | oldPC = GET_PC; |
70357ce5 |
19394 | PRE_IO |
19395 | PUSH_32_F(oldPC) |
19396 | } |
19397 | SET_PC(adr) |
19398 | CHECK_BRANCH_EXCEPTION(adr) |
19399 | POST_IO |
19400 | RET(22) |
19401 | } |
19402 | |
19403 | // JSR |
19404 | OPCODE(0x4EB8) |
19405 | { |
19406 | u32 adr, res; |
19407 | u32 src, dst; |
19408 | |
19409 | FETCH_SWORD(adr); |
19410 | { |
19411 | u32 oldPC; |
19412 | |
be26eb23 |
19413 | oldPC = GET_PC; |
70357ce5 |
19414 | PRE_IO |
19415 | PUSH_32_F(oldPC) |
19416 | } |
19417 | SET_PC(adr) |
19418 | CHECK_BRANCH_EXCEPTION(adr) |
19419 | POST_IO |
19420 | RET(18) |
19421 | } |
19422 | |
19423 | // JSR |
19424 | OPCODE(0x4EB9) |
19425 | { |
19426 | u32 adr, res; |
19427 | u32 src, dst; |
19428 | |
19429 | FETCH_LONG(adr); |
19430 | { |
19431 | u32 oldPC; |
19432 | |
be26eb23 |
19433 | oldPC = GET_PC; |
70357ce5 |
19434 | PRE_IO |
19435 | PUSH_32_F(oldPC) |
19436 | } |
19437 | SET_PC(adr) |
19438 | CHECK_BRANCH_EXCEPTION(adr) |
19439 | POST_IO |
19440 | RET(20) |
19441 | } |
19442 | |
19443 | // JSR |
19444 | OPCODE(0x4EBA) |
19445 | { |
19446 | u32 adr, res; |
19447 | u32 src, dst; |
19448 | |
be26eb23 |
19449 | adr = GET_SWORD + GET_PC; |
70357ce5 |
19450 | PC++; |
19451 | { |
19452 | u32 oldPC; |
19453 | |
be26eb23 |
19454 | oldPC = GET_PC; |
70357ce5 |
19455 | PRE_IO |
19456 | PUSH_32_F(oldPC) |
19457 | } |
19458 | SET_PC(adr) |
19459 | CHECK_BRANCH_EXCEPTION(adr) |
19460 | POST_IO |
19461 | RET(18) |
19462 | } |
19463 | |
19464 | // JSR |
19465 | OPCODE(0x4EBB) |
19466 | { |
19467 | u32 adr, res; |
19468 | u32 src, dst; |
19469 | |
be26eb23 |
19470 | adr = GET_PC; |
70357ce5 |
19471 | DECODE_EXT_WORD |
19472 | { |
19473 | u32 oldPC; |
19474 | |
be26eb23 |
19475 | oldPC = GET_PC; |
70357ce5 |
19476 | PRE_IO |
19477 | PUSH_32_F(oldPC) |
19478 | } |
19479 | SET_PC(adr) |
19480 | CHECK_BRANCH_EXCEPTION(adr) |
19481 | POST_IO |
19482 | RET(22) |
19483 | } |
19484 | |
19485 | // JMP |
19486 | OPCODE(0x4ED0) |
19487 | { |
19488 | u32 adr, res; |
19489 | u32 src, dst; |
19490 | |
19491 | adr = AREG((Opcode >> 0) & 7); |
19492 | SET_PC(adr) |
19493 | CHECK_BRANCH_EXCEPTION(adr) |
19494 | RET(8) |
19495 | } |
19496 | |
19497 | // JMP |
19498 | OPCODE(0x4EE8) |
19499 | { |
19500 | u32 adr, res; |
19501 | u32 src, dst; |
19502 | |
19503 | FETCH_SWORD(adr); |
19504 | adr += AREG((Opcode >> 0) & 7); |
19505 | SET_PC(adr) |
19506 | CHECK_BRANCH_EXCEPTION(adr) |
19507 | RET(10) |
19508 | } |
19509 | |
19510 | // JMP |
19511 | OPCODE(0x4EF0) |
19512 | { |
19513 | u32 adr, res; |
19514 | u32 src, dst; |
19515 | |
19516 | adr = AREG((Opcode >> 0) & 7); |
19517 | DECODE_EXT_WORD |
19518 | SET_PC(adr) |
19519 | CHECK_BRANCH_EXCEPTION(adr) |
19520 | RET(14) |
19521 | } |
19522 | |
19523 | // JMP |
19524 | OPCODE(0x4EF8) |
19525 | { |
19526 | u32 adr, res; |
19527 | u32 src, dst; |
19528 | |
19529 | FETCH_SWORD(adr); |
19530 | SET_PC(adr) |
19531 | CHECK_BRANCH_EXCEPTION(adr) |
19532 | RET(10) |
19533 | } |
19534 | |
19535 | // JMP |
19536 | OPCODE(0x4EF9) |
19537 | { |
19538 | u32 adr, res; |
19539 | u32 src, dst; |
19540 | |
19541 | FETCH_LONG(adr); |
19542 | SET_PC(adr) |
19543 | CHECK_BRANCH_EXCEPTION(adr) |
19544 | RET(12) |
19545 | } |
19546 | |
19547 | // JMP |
19548 | OPCODE(0x4EFA) |
19549 | { |
19550 | u32 adr, res; |
19551 | u32 src, dst; |
19552 | |
be26eb23 |
19553 | adr = GET_SWORD + GET_PC; |
70357ce5 |
19554 | PC++; |
19555 | SET_PC(adr) |
19556 | CHECK_BRANCH_EXCEPTION(adr) |
19557 | RET(10) |
19558 | } |
19559 | |
19560 | // JMP |
19561 | OPCODE(0x4EFB) |
19562 | { |
19563 | u32 adr, res; |
19564 | u32 src, dst; |
19565 | |
be26eb23 |
19566 | adr = GET_PC; |
70357ce5 |
19567 | DECODE_EXT_WORD |
19568 | SET_PC(adr) |
19569 | CHECK_BRANCH_EXCEPTION(adr) |
19570 | RET(14) |
19571 | } |
19572 | |
19573 | // CHK |
19574 | OPCODE(0x4180) |
19575 | { |
5c5d89ad |
19576 | s32 src, res; |
70357ce5 |
19577 | |
5c5d89ad |
19578 | src = DREGs16((Opcode >> 0) & 7); |
19579 | res = DREGs16((Opcode >> 9) & 7); |
19580 | if ((res < 0) || (res > src)) |
70357ce5 |
19581 | { |
19582 | flag_N = res >> 8; |
d0ae0cb4 |
19583 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19584 | } |
19585 | RET(10) |
19586 | } |
19587 | |
19588 | // CHK |
19589 | OPCODE(0x4190) |
19590 | { |
5c5d89ad |
19591 | s32 src, res; |
19592 | u32 adr; |
70357ce5 |
19593 | |
19594 | adr = AREG((Opcode >> 0) & 7); |
19595 | PRE_IO |
5c5d89ad |
19596 | READSX_WORD_F(adr, src) |
19597 | res = DREGs16((Opcode >> 9) & 7); |
19598 | if ((res < 0) || (res > src)) |
70357ce5 |
19599 | { |
19600 | flag_N = res >> 8; |
d0ae0cb4 |
19601 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19602 | } |
19603 | POST_IO |
19604 | RET(14) |
19605 | } |
19606 | |
19607 | // CHK |
19608 | OPCODE(0x4198) |
19609 | { |
5c5d89ad |
19610 | s32 src, res; |
19611 | u32 adr; |
70357ce5 |
19612 | |
19613 | adr = AREG((Opcode >> 0) & 7); |
19614 | AREG((Opcode >> 0) & 7) += 2; |
19615 | PRE_IO |
5c5d89ad |
19616 | READSX_WORD_F(adr, src) |
19617 | res = DREGs16((Opcode >> 9) & 7); |
19618 | if ((res < 0) || (res > src)) |
70357ce5 |
19619 | { |
19620 | flag_N = res >> 8; |
d0ae0cb4 |
19621 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19622 | } |
19623 | POST_IO |
19624 | RET(14) |
19625 | } |
19626 | |
19627 | // CHK |
19628 | OPCODE(0x41A0) |
19629 | { |
5c5d89ad |
19630 | s32 src, res; |
19631 | u32 adr; |
70357ce5 |
19632 | |
19633 | adr = AREG((Opcode >> 0) & 7) - 2; |
19634 | AREG((Opcode >> 0) & 7) = adr; |
19635 | PRE_IO |
5c5d89ad |
19636 | READSX_WORD_F(adr, src) |
19637 | res = DREGs16((Opcode >> 9) & 7); |
19638 | if ((res < 0) || (res > src)) |
70357ce5 |
19639 | { |
19640 | flag_N = res >> 8; |
d0ae0cb4 |
19641 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19642 | } |
19643 | POST_IO |
19644 | RET(16) |
19645 | } |
19646 | |
19647 | // CHK |
19648 | OPCODE(0x41A8) |
19649 | { |
5c5d89ad |
19650 | s32 src, res; |
19651 | u32 adr; |
70357ce5 |
19652 | |
19653 | FETCH_SWORD(adr); |
19654 | adr += AREG((Opcode >> 0) & 7); |
19655 | PRE_IO |
5c5d89ad |
19656 | READSX_WORD_F(adr, src) |
19657 | res = DREGs16((Opcode >> 9) & 7); |
19658 | if ((res < 0) || (res > src)) |
70357ce5 |
19659 | { |
19660 | flag_N = res >> 8; |
d0ae0cb4 |
19661 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19662 | } |
19663 | POST_IO |
19664 | RET(18) |
19665 | } |
19666 | |
19667 | // CHK |
19668 | OPCODE(0x41B0) |
19669 | { |
5c5d89ad |
19670 | s32 src, res; |
19671 | u32 adr; |
70357ce5 |
19672 | |
19673 | adr = AREG((Opcode >> 0) & 7); |
19674 | DECODE_EXT_WORD |
19675 | PRE_IO |
5c5d89ad |
19676 | READSX_WORD_F(adr, src) |
19677 | res = DREGs16((Opcode >> 9) & 7); |
19678 | if ((res < 0) || (res > src)) |
70357ce5 |
19679 | { |
19680 | flag_N = res >> 8; |
d0ae0cb4 |
19681 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19682 | } |
19683 | POST_IO |
19684 | RET(20) |
19685 | } |
19686 | |
19687 | // CHK |
19688 | OPCODE(0x41B8) |
19689 | { |
5c5d89ad |
19690 | s32 src, res; |
19691 | u32 adr; |
70357ce5 |
19692 | |
19693 | FETCH_SWORD(adr); |
19694 | PRE_IO |
5c5d89ad |
19695 | READSX_WORD_F(adr, src) |
19696 | res = DREGs16((Opcode >> 9) & 7); |
19697 | if ((res < 0) || (res > src)) |
70357ce5 |
19698 | { |
19699 | flag_N = res >> 8; |
d0ae0cb4 |
19700 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19701 | } |
19702 | POST_IO |
19703 | RET(18) |
19704 | } |
19705 | |
19706 | // CHK |
19707 | OPCODE(0x41B9) |
19708 | { |
5c5d89ad |
19709 | s32 src, res; |
19710 | u32 adr; |
70357ce5 |
19711 | |
19712 | FETCH_LONG(adr); |
19713 | PRE_IO |
5c5d89ad |
19714 | READSX_WORD_F(adr, src) |
19715 | res = DREGs16((Opcode >> 9) & 7); |
19716 | if ((res < 0) || (res > src)) |
70357ce5 |
19717 | { |
19718 | flag_N = res >> 8; |
d0ae0cb4 |
19719 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19720 | } |
19721 | POST_IO |
19722 | RET(22) |
19723 | } |
19724 | |
19725 | // CHK |
19726 | OPCODE(0x41BA) |
19727 | { |
5c5d89ad |
19728 | s32 src, res; |
19729 | u32 adr; |
70357ce5 |
19730 | |
be26eb23 |
19731 | adr = GET_SWORD + GET_PC; |
70357ce5 |
19732 | PC++; |
19733 | PRE_IO |
5c5d89ad |
19734 | READSX_WORD_F(adr, src) |
19735 | res = DREGs16((Opcode >> 9) & 7); |
19736 | if ((res < 0) || (res > src)) |
70357ce5 |
19737 | { |
19738 | flag_N = res >> 8; |
d0ae0cb4 |
19739 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19740 | } |
19741 | POST_IO |
19742 | RET(18) |
19743 | } |
19744 | |
19745 | // CHK |
19746 | OPCODE(0x41BB) |
19747 | { |
5c5d89ad |
19748 | s32 src, res; |
19749 | u32 adr; |
70357ce5 |
19750 | |
be26eb23 |
19751 | adr = GET_PC; |
70357ce5 |
19752 | DECODE_EXT_WORD |
19753 | PRE_IO |
5c5d89ad |
19754 | READSX_WORD_F(adr, src) |
19755 | res = DREGs16((Opcode >> 9) & 7); |
19756 | if ((res < 0) || (res > src)) |
70357ce5 |
19757 | { |
19758 | flag_N = res >> 8; |
d0ae0cb4 |
19759 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19760 | } |
19761 | POST_IO |
19762 | RET(20) |
19763 | } |
19764 | |
19765 | // CHK |
19766 | OPCODE(0x41BC) |
19767 | { |
5c5d89ad |
19768 | s32 src, res; |
19769 | u32 adr; |
70357ce5 |
19770 | |
5c5d89ad |
19771 | FETCH_SWORD(src); |
19772 | res = DREGs16((Opcode >> 9) & 7); |
19773 | if ((res < 0) || (res > src)) |
70357ce5 |
19774 | { |
19775 | flag_N = res >> 8; |
d0ae0cb4 |
19776 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19777 | } |
19778 | POST_IO |
19779 | RET(14) |
19780 | } |
19781 | |
19782 | // CHK |
19783 | OPCODE(0x419F) |
19784 | { |
5c5d89ad |
19785 | s32 src, res; |
19786 | u32 adr; |
70357ce5 |
19787 | |
19788 | adr = AREG(7); |
19789 | AREG(7) += 2; |
19790 | PRE_IO |
5c5d89ad |
19791 | READSX_WORD_F(adr, src) |
19792 | res = DREGs16((Opcode >> 9) & 7); |
19793 | if ((res < 0) || (res > src)) |
70357ce5 |
19794 | { |
19795 | flag_N = res >> 8; |
d0ae0cb4 |
19796 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19797 | } |
19798 | POST_IO |
19799 | RET(14) |
19800 | } |
19801 | |
19802 | // CHK |
19803 | OPCODE(0x41A7) |
19804 | { |
5c5d89ad |
19805 | s32 src, res; |
19806 | u32 adr; |
70357ce5 |
19807 | |
19808 | adr = AREG(7) - 2; |
19809 | AREG(7) = adr; |
19810 | PRE_IO |
5c5d89ad |
19811 | READSX_WORD_F(adr, src) |
19812 | res = DREGs16((Opcode >> 9) & 7); |
19813 | if ((res < 0) || (res > src)) |
70357ce5 |
19814 | { |
19815 | flag_N = res >> 8; |
d0ae0cb4 |
19816 | SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR)); |
70357ce5 |
19817 | } |
19818 | POST_IO |
19819 | RET(16) |
19820 | } |
19821 | |
19822 | // LEA |
19823 | OPCODE(0x41D0) |
19824 | { |
19825 | u32 adr, res; |
19826 | u32 src, dst; |
19827 | |
19828 | adr = AREG((Opcode >> 0) & 7); |
19829 | res = adr; |
19830 | AREG((Opcode >> 9) & 7) = res; |
19831 | RET(4) |
19832 | } |
19833 | |
19834 | // LEA |
19835 | OPCODE(0x41E8) |
19836 | { |
19837 | u32 adr, res; |
19838 | u32 src, dst; |
19839 | |
19840 | FETCH_SWORD(adr); |
19841 | adr += AREG((Opcode >> 0) & 7); |
19842 | res = adr; |
19843 | AREG((Opcode >> 9) & 7) = res; |
19844 | RET(8) |
19845 | } |
19846 | |
19847 | // LEA |
19848 | OPCODE(0x41F0) |
19849 | { |
19850 | u32 adr, res; |
19851 | u32 src, dst; |
19852 | |
19853 | adr = AREG((Opcode >> 0) & 7); |
19854 | DECODE_EXT_WORD |
19855 | res = adr; |
19856 | AREG((Opcode >> 9) & 7) = res; |
19857 | RET(12) |
19858 | } |
19859 | |
19860 | // LEA |
19861 | OPCODE(0x41F8) |
19862 | { |
19863 | u32 adr, res; |
19864 | u32 src, dst; |
19865 | |
19866 | FETCH_SWORD(adr); |
19867 | res = adr; |
19868 | AREG((Opcode >> 9) & 7) = res; |
19869 | RET(8) |
19870 | } |
19871 | |
19872 | // LEA |
19873 | OPCODE(0x41F9) |
19874 | { |
19875 | u32 adr, res; |
19876 | u32 src, dst; |
19877 | |
19878 | FETCH_LONG(adr); |
19879 | res = adr; |
19880 | AREG((Opcode >> 9) & 7) = res; |
19881 | RET(12) |
19882 | } |
19883 | |
19884 | // LEA |
19885 | OPCODE(0x41FA) |
19886 | { |
19887 | u32 adr, res; |
19888 | u32 src, dst; |
19889 | |
be26eb23 |
19890 | adr = GET_SWORD + GET_PC; |
70357ce5 |
19891 | PC++; |
19892 | res = adr; |
19893 | AREG((Opcode >> 9) & 7) = res; |
19894 | RET(8) |
19895 | } |
19896 | |
19897 | // LEA |
19898 | OPCODE(0x41FB) |
19899 | { |
19900 | u32 adr, res; |
19901 | u32 src, dst; |
19902 | |
be26eb23 |
19903 | adr = GET_PC; |
70357ce5 |
19904 | DECODE_EXT_WORD |
19905 | res = adr; |
19906 | AREG((Opcode >> 9) & 7) = res; |
19907 | RET(12) |
19908 | } |
19909 | |
19910 | // STCC |
19911 | OPCODE(0x50C0) |
19912 | { |
19913 | u32 adr, res; |
19914 | u32 src, dst; |
19915 | |
19916 | res = 0xFF; |
19917 | DREGu8((Opcode >> 0) & 7) = res; |
19918 | RET(6) |
19919 | } |
19920 | |
19921 | // STCC |
19922 | OPCODE(0x51C0) |
19923 | { |
19924 | u32 adr, res; |
19925 | u32 src, dst; |
19926 | |
19927 | res = 0; |
19928 | DREGu8((Opcode >> 0) & 7) = res; |
19929 | RET(4) |
19930 | } |
19931 | |
19932 | // STCC |
19933 | OPCODE(0x52C0) |
19934 | { |
19935 | u32 adr, res; |
19936 | u32 src, dst; |
19937 | |
19938 | if (flag_NotZ && (!(flag_C & 0x100))) |
19939 | { |
19940 | res = 0xFF; |
19941 | DREGu8((Opcode >> 0) & 7) = res; |
19942 | RET(6) |
19943 | } |
19944 | res = 0; |
19945 | DREGu8((Opcode >> 0) & 7) = res; |
19946 | RET(4) |
19947 | } |
19948 | |
19949 | // STCC |
19950 | OPCODE(0x53C0) |
19951 | { |
19952 | u32 adr, res; |
19953 | u32 src, dst; |
19954 | |
19955 | if ((!flag_NotZ) || (flag_C & 0x100)) |
19956 | { |
19957 | res = 0xFF; |
19958 | DREGu8((Opcode >> 0) & 7) = res; |
19959 | RET(6) |
19960 | } |
19961 | res = 0; |
19962 | DREGu8((Opcode >> 0) & 7) = res; |
19963 | RET(4) |
19964 | } |
19965 | |
19966 | // STCC |
19967 | OPCODE(0x54C0) |
19968 | { |
19969 | u32 adr, res; |
19970 | u32 src, dst; |
19971 | |
19972 | if (!(flag_C & 0x100)) |
19973 | { |
19974 | res = 0xFF; |
19975 | DREGu8((Opcode >> 0) & 7) = res; |
19976 | RET(6) |
19977 | } |
19978 | res = 0; |
19979 | DREGu8((Opcode >> 0) & 7) = res; |
19980 | RET(4) |
19981 | } |
19982 | |
19983 | // STCC |
19984 | OPCODE(0x55C0) |
19985 | { |
19986 | u32 adr, res; |
19987 | u32 src, dst; |
19988 | |
19989 | if (flag_C & 0x100) |
19990 | { |
19991 | res = 0xFF; |
19992 | DREGu8((Opcode >> 0) & 7) = res; |
19993 | RET(6) |
19994 | } |
19995 | res = 0; |
19996 | DREGu8((Opcode >> 0) & 7) = res; |
19997 | RET(4) |
19998 | } |
19999 | |
20000 | // STCC |
20001 | OPCODE(0x56C0) |
20002 | { |
20003 | u32 adr, res; |
20004 | u32 src, dst; |
20005 | |
20006 | if (flag_NotZ) |
20007 | { |
20008 | res = 0xFF; |
20009 | DREGu8((Opcode >> 0) & 7) = res; |
20010 | RET(6) |
20011 | } |
20012 | res = 0; |
20013 | DREGu8((Opcode >> 0) & 7) = res; |
20014 | RET(4) |
20015 | } |
20016 | |
20017 | // STCC |
20018 | OPCODE(0x57C0) |
20019 | { |
20020 | u32 adr, res; |
20021 | u32 src, dst; |
20022 | |
20023 | if (!flag_NotZ) |
20024 | { |
20025 | res = 0xFF; |
20026 | DREGu8((Opcode >> 0) & 7) = res; |
20027 | RET(6) |
20028 | } |
20029 | res = 0; |
20030 | DREGu8((Opcode >> 0) & 7) = res; |
20031 | RET(4) |
20032 | } |
20033 | |
20034 | // STCC |
20035 | OPCODE(0x58C0) |
20036 | { |
20037 | u32 adr, res; |
20038 | u32 src, dst; |
20039 | |
20040 | if (!(flag_V & 0x80)) |
20041 | { |
20042 | res = 0xFF; |
20043 | DREGu8((Opcode >> 0) & 7) = res; |
20044 | RET(6) |
20045 | } |
20046 | res = 0; |
20047 | DREGu8((Opcode >> 0) & 7) = res; |
20048 | RET(4) |
20049 | } |
20050 | |
20051 | // STCC |
20052 | OPCODE(0x59C0) |
20053 | { |
20054 | u32 adr, res; |
20055 | u32 src, dst; |
20056 | |
20057 | if (flag_V & 0x80) |
20058 | { |
20059 | res = 0xFF; |
20060 | DREGu8((Opcode >> 0) & 7) = res; |
20061 | RET(6) |
20062 | } |
20063 | res = 0; |
20064 | DREGu8((Opcode >> 0) & 7) = res; |
20065 | RET(4) |
20066 | } |
20067 | |
20068 | // STCC |
20069 | OPCODE(0x5AC0) |
20070 | { |
20071 | u32 adr, res; |
20072 | u32 src, dst; |
20073 | |
20074 | if (!(flag_N & 0x80)) |
20075 | { |
20076 | res = 0xFF; |
20077 | DREGu8((Opcode >> 0) & 7) = res; |
20078 | RET(6) |
20079 | } |
20080 | res = 0; |
20081 | DREGu8((Opcode >> 0) & 7) = res; |
20082 | RET(4) |
20083 | } |
20084 | |
20085 | // STCC |
20086 | OPCODE(0x5BC0) |
20087 | { |
20088 | u32 adr, res; |
20089 | u32 src, dst; |
20090 | |
20091 | if (flag_N & 0x80) |
20092 | { |
20093 | res = 0xFF; |
20094 | DREGu8((Opcode >> 0) & 7) = res; |
20095 | RET(6) |
20096 | } |
20097 | res = 0; |
20098 | DREGu8((Opcode >> 0) & 7) = res; |
20099 | RET(4) |
20100 | } |
20101 | |
20102 | // STCC |
20103 | OPCODE(0x5CC0) |
20104 | { |
20105 | u32 adr, res; |
20106 | u32 src, dst; |
20107 | |
20108 | if (!((flag_N ^ flag_V) & 0x80)) |
20109 | { |
20110 | res = 0xFF; |
20111 | DREGu8((Opcode >> 0) & 7) = res; |
20112 | RET(6) |
20113 | } |
20114 | res = 0; |
20115 | DREGu8((Opcode >> 0) & 7) = res; |
20116 | RET(4) |
20117 | } |
20118 | |
20119 | // STCC |
20120 | OPCODE(0x5DC0) |
20121 | { |
20122 | u32 adr, res; |
20123 | u32 src, dst; |
20124 | |
20125 | if ((flag_N ^ flag_V) & 0x80) |
20126 | { |
20127 | res = 0xFF; |
20128 | DREGu8((Opcode >> 0) & 7) = res; |
20129 | RET(6) |
20130 | } |
20131 | res = 0; |
20132 | DREGu8((Opcode >> 0) & 7) = res; |
20133 | RET(4) |
20134 | } |
20135 | |
20136 | // STCC |
20137 | OPCODE(0x5EC0) |
20138 | { |
20139 | u32 adr, res; |
20140 | u32 src, dst; |
20141 | |
20142 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20143 | { |
20144 | res = 0xFF; |
20145 | DREGu8((Opcode >> 0) & 7) = res; |
20146 | RET(6) |
20147 | } |
20148 | res = 0; |
20149 | DREGu8((Opcode >> 0) & 7) = res; |
20150 | RET(4) |
20151 | } |
20152 | |
20153 | // STCC |
20154 | OPCODE(0x5FC0) |
20155 | { |
20156 | u32 adr, res; |
20157 | u32 src, dst; |
20158 | |
20159 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20160 | { |
20161 | res = 0xFF; |
20162 | DREGu8((Opcode >> 0) & 7) = res; |
20163 | RET(6) |
20164 | } |
20165 | res = 0; |
20166 | DREGu8((Opcode >> 0) & 7) = res; |
20167 | RET(4) |
20168 | } |
20169 | |
20170 | // STCC |
20171 | OPCODE(0x50D0) |
20172 | { |
20173 | u32 adr, res; |
20174 | u32 src, dst; |
20175 | |
20176 | adr = AREG((Opcode >> 0) & 7); |
20177 | res = 0xFF; |
20178 | PRE_IO |
20179 | WRITE_BYTE_F(adr, res) |
20180 | POST_IO |
20181 | RET(12) |
20182 | } |
20183 | |
20184 | // STCC |
20185 | OPCODE(0x51D0) |
20186 | { |
20187 | u32 adr, res; |
20188 | u32 src, dst; |
20189 | |
20190 | adr = AREG((Opcode >> 0) & 7); |
20191 | res = 0; |
20192 | PRE_IO |
20193 | WRITE_BYTE_F(adr, res) |
20194 | POST_IO |
20195 | RET(12) |
20196 | } |
20197 | |
20198 | // STCC |
20199 | OPCODE(0x52D0) |
20200 | { |
20201 | u32 adr, res; |
20202 | u32 src, dst; |
20203 | |
20204 | adr = AREG((Opcode >> 0) & 7); |
20205 | if (flag_NotZ && (!(flag_C & 0x100))) |
20206 | { |
20207 | res = 0xFF; |
20208 | PRE_IO |
20209 | WRITE_BYTE_F(adr, res) |
20210 | POST_IO |
20211 | RET(12) |
20212 | } |
20213 | res = 0; |
20214 | PRE_IO |
20215 | WRITE_BYTE_F(adr, res) |
20216 | POST_IO |
20217 | RET(12) |
20218 | } |
20219 | |
20220 | // STCC |
20221 | OPCODE(0x53D0) |
20222 | { |
20223 | u32 adr, res; |
20224 | u32 src, dst; |
20225 | |
20226 | adr = AREG((Opcode >> 0) & 7); |
20227 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20228 | { |
20229 | res = 0xFF; |
20230 | PRE_IO |
20231 | WRITE_BYTE_F(adr, res) |
20232 | POST_IO |
20233 | RET(12) |
20234 | } |
20235 | res = 0; |
20236 | PRE_IO |
20237 | WRITE_BYTE_F(adr, res) |
20238 | POST_IO |
20239 | RET(12) |
20240 | } |
20241 | |
20242 | // STCC |
20243 | OPCODE(0x54D0) |
20244 | { |
20245 | u32 adr, res; |
20246 | u32 src, dst; |
20247 | |
20248 | adr = AREG((Opcode >> 0) & 7); |
20249 | if (!(flag_C & 0x100)) |
20250 | { |
20251 | res = 0xFF; |
20252 | PRE_IO |
20253 | WRITE_BYTE_F(adr, res) |
20254 | POST_IO |
20255 | RET(12) |
20256 | } |
20257 | res = 0; |
20258 | PRE_IO |
20259 | WRITE_BYTE_F(adr, res) |
20260 | POST_IO |
20261 | RET(12) |
20262 | } |
20263 | |
20264 | // STCC |
20265 | OPCODE(0x55D0) |
20266 | { |
20267 | u32 adr, res; |
20268 | u32 src, dst; |
20269 | |
20270 | adr = AREG((Opcode >> 0) & 7); |
20271 | if (flag_C & 0x100) |
20272 | { |
20273 | res = 0xFF; |
20274 | PRE_IO |
20275 | WRITE_BYTE_F(adr, res) |
20276 | POST_IO |
20277 | RET(12) |
20278 | } |
20279 | res = 0; |
20280 | PRE_IO |
20281 | WRITE_BYTE_F(adr, res) |
20282 | POST_IO |
20283 | RET(12) |
20284 | } |
20285 | |
20286 | // STCC |
20287 | OPCODE(0x56D0) |
20288 | { |
20289 | u32 adr, res; |
20290 | u32 src, dst; |
20291 | |
20292 | adr = AREG((Opcode >> 0) & 7); |
20293 | if (flag_NotZ) |
20294 | { |
20295 | res = 0xFF; |
20296 | PRE_IO |
20297 | WRITE_BYTE_F(adr, res) |
20298 | POST_IO |
20299 | RET(12) |
20300 | } |
20301 | res = 0; |
20302 | PRE_IO |
20303 | WRITE_BYTE_F(adr, res) |
20304 | POST_IO |
20305 | RET(12) |
20306 | } |
20307 | |
20308 | // STCC |
20309 | OPCODE(0x57D0) |
20310 | { |
20311 | u32 adr, res; |
20312 | u32 src, dst; |
20313 | |
20314 | adr = AREG((Opcode >> 0) & 7); |
20315 | if (!flag_NotZ) |
20316 | { |
20317 | res = 0xFF; |
20318 | PRE_IO |
20319 | WRITE_BYTE_F(adr, res) |
20320 | POST_IO |
20321 | RET(12) |
20322 | } |
20323 | res = 0; |
20324 | PRE_IO |
20325 | WRITE_BYTE_F(adr, res) |
20326 | POST_IO |
20327 | RET(12) |
20328 | } |
20329 | |
20330 | // STCC |
20331 | OPCODE(0x58D0) |
20332 | { |
20333 | u32 adr, res; |
20334 | u32 src, dst; |
20335 | |
20336 | adr = AREG((Opcode >> 0) & 7); |
20337 | if (!(flag_V & 0x80)) |
20338 | { |
20339 | res = 0xFF; |
20340 | PRE_IO |
20341 | WRITE_BYTE_F(adr, res) |
20342 | POST_IO |
20343 | RET(12) |
20344 | } |
20345 | res = 0; |
20346 | PRE_IO |
20347 | WRITE_BYTE_F(adr, res) |
20348 | POST_IO |
20349 | RET(12) |
20350 | } |
20351 | |
20352 | // STCC |
20353 | OPCODE(0x59D0) |
20354 | { |
20355 | u32 adr, res; |
20356 | u32 src, dst; |
20357 | |
20358 | adr = AREG((Opcode >> 0) & 7); |
20359 | if (flag_V & 0x80) |
20360 | { |
20361 | res = 0xFF; |
20362 | PRE_IO |
20363 | WRITE_BYTE_F(adr, res) |
20364 | POST_IO |
20365 | RET(12) |
20366 | } |
20367 | res = 0; |
20368 | PRE_IO |
20369 | WRITE_BYTE_F(adr, res) |
20370 | POST_IO |
20371 | RET(12) |
20372 | } |
20373 | |
20374 | // STCC |
20375 | OPCODE(0x5AD0) |
20376 | { |
20377 | u32 adr, res; |
20378 | u32 src, dst; |
20379 | |
20380 | adr = AREG((Opcode >> 0) & 7); |
20381 | if (!(flag_N & 0x80)) |
20382 | { |
20383 | res = 0xFF; |
20384 | PRE_IO |
20385 | WRITE_BYTE_F(adr, res) |
20386 | POST_IO |
20387 | RET(12) |
20388 | } |
20389 | res = 0; |
20390 | PRE_IO |
20391 | WRITE_BYTE_F(adr, res) |
20392 | POST_IO |
20393 | RET(12) |
20394 | } |
20395 | |
20396 | // STCC |
20397 | OPCODE(0x5BD0) |
20398 | { |
20399 | u32 adr, res; |
20400 | u32 src, dst; |
20401 | |
20402 | adr = AREG((Opcode >> 0) & 7); |
20403 | if (flag_N & 0x80) |
20404 | { |
20405 | res = 0xFF; |
20406 | PRE_IO |
20407 | WRITE_BYTE_F(adr, res) |
20408 | POST_IO |
20409 | RET(12) |
20410 | } |
20411 | res = 0; |
20412 | PRE_IO |
20413 | WRITE_BYTE_F(adr, res) |
20414 | POST_IO |
20415 | RET(12) |
20416 | } |
20417 | |
20418 | // STCC |
20419 | OPCODE(0x5CD0) |
20420 | { |
20421 | u32 adr, res; |
20422 | u32 src, dst; |
20423 | |
20424 | adr = AREG((Opcode >> 0) & 7); |
20425 | if (!((flag_N ^ flag_V) & 0x80)) |
20426 | { |
20427 | res = 0xFF; |
20428 | PRE_IO |
20429 | WRITE_BYTE_F(adr, res) |
20430 | POST_IO |
20431 | RET(12) |
20432 | } |
20433 | res = 0; |
20434 | PRE_IO |
20435 | WRITE_BYTE_F(adr, res) |
20436 | POST_IO |
20437 | RET(12) |
20438 | } |
20439 | |
20440 | // STCC |
20441 | OPCODE(0x5DD0) |
20442 | { |
20443 | u32 adr, res; |
20444 | u32 src, dst; |
20445 | |
20446 | adr = AREG((Opcode >> 0) & 7); |
20447 | if ((flag_N ^ flag_V) & 0x80) |
20448 | { |
20449 | res = 0xFF; |
20450 | PRE_IO |
20451 | WRITE_BYTE_F(adr, res) |
20452 | POST_IO |
20453 | RET(12) |
20454 | } |
20455 | res = 0; |
20456 | PRE_IO |
20457 | WRITE_BYTE_F(adr, res) |
20458 | POST_IO |
20459 | RET(12) |
20460 | } |
20461 | |
20462 | // STCC |
20463 | OPCODE(0x5ED0) |
20464 | { |
20465 | u32 adr, res; |
20466 | u32 src, dst; |
20467 | |
20468 | adr = AREG((Opcode >> 0) & 7); |
20469 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20470 | { |
20471 | res = 0xFF; |
20472 | PRE_IO |
20473 | WRITE_BYTE_F(adr, res) |
20474 | POST_IO |
20475 | RET(12) |
20476 | } |
20477 | res = 0; |
20478 | PRE_IO |
20479 | WRITE_BYTE_F(adr, res) |
20480 | POST_IO |
20481 | RET(12) |
20482 | } |
20483 | |
20484 | // STCC |
20485 | OPCODE(0x5FD0) |
20486 | { |
20487 | u32 adr, res; |
20488 | u32 src, dst; |
20489 | |
20490 | adr = AREG((Opcode >> 0) & 7); |
20491 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20492 | { |
20493 | res = 0xFF; |
20494 | PRE_IO |
20495 | WRITE_BYTE_F(adr, res) |
20496 | POST_IO |
20497 | RET(12) |
20498 | } |
20499 | res = 0; |
20500 | PRE_IO |
20501 | WRITE_BYTE_F(adr, res) |
20502 | POST_IO |
20503 | RET(12) |
20504 | } |
20505 | |
20506 | // STCC |
20507 | OPCODE(0x50D8) |
20508 | { |
20509 | u32 adr, res; |
20510 | u32 src, dst; |
20511 | |
20512 | adr = AREG((Opcode >> 0) & 7); |
20513 | AREG((Opcode >> 0) & 7) += 1; |
20514 | res = 0xFF; |
20515 | PRE_IO |
20516 | WRITE_BYTE_F(adr, res) |
20517 | POST_IO |
20518 | RET(12) |
20519 | } |
20520 | |
20521 | // STCC |
20522 | OPCODE(0x51D8) |
20523 | { |
20524 | u32 adr, res; |
20525 | u32 src, dst; |
20526 | |
20527 | adr = AREG((Opcode >> 0) & 7); |
20528 | AREG((Opcode >> 0) & 7) += 1; |
20529 | res = 0; |
20530 | PRE_IO |
20531 | WRITE_BYTE_F(adr, res) |
20532 | POST_IO |
20533 | RET(12) |
20534 | } |
20535 | |
20536 | // STCC |
20537 | OPCODE(0x52D8) |
20538 | { |
20539 | u32 adr, res; |
20540 | u32 src, dst; |
20541 | |
20542 | adr = AREG((Opcode >> 0) & 7); |
20543 | AREG((Opcode >> 0) & 7) += 1; |
20544 | if (flag_NotZ && (!(flag_C & 0x100))) |
20545 | { |
20546 | res = 0xFF; |
20547 | PRE_IO |
20548 | WRITE_BYTE_F(adr, res) |
20549 | POST_IO |
20550 | RET(12) |
20551 | } |
20552 | res = 0; |
20553 | PRE_IO |
20554 | WRITE_BYTE_F(adr, res) |
20555 | POST_IO |
20556 | RET(12) |
20557 | } |
20558 | |
20559 | // STCC |
20560 | OPCODE(0x53D8) |
20561 | { |
20562 | u32 adr, res; |
20563 | u32 src, dst; |
20564 | |
20565 | adr = AREG((Opcode >> 0) & 7); |
20566 | AREG((Opcode >> 0) & 7) += 1; |
20567 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20568 | { |
20569 | res = 0xFF; |
20570 | PRE_IO |
20571 | WRITE_BYTE_F(adr, res) |
20572 | POST_IO |
20573 | RET(12) |
20574 | } |
20575 | res = 0; |
20576 | PRE_IO |
20577 | WRITE_BYTE_F(adr, res) |
20578 | POST_IO |
20579 | RET(12) |
20580 | } |
20581 | |
20582 | // STCC |
20583 | OPCODE(0x54D8) |
20584 | { |
20585 | u32 adr, res; |
20586 | u32 src, dst; |
20587 | |
20588 | adr = AREG((Opcode >> 0) & 7); |
20589 | AREG((Opcode >> 0) & 7) += 1; |
20590 | if (!(flag_C & 0x100)) |
20591 | { |
20592 | res = 0xFF; |
20593 | PRE_IO |
20594 | WRITE_BYTE_F(adr, res) |
20595 | POST_IO |
20596 | RET(12) |
20597 | } |
20598 | res = 0; |
20599 | PRE_IO |
20600 | WRITE_BYTE_F(adr, res) |
20601 | POST_IO |
20602 | RET(12) |
20603 | } |
20604 | |
20605 | // STCC |
20606 | OPCODE(0x55D8) |
20607 | { |
20608 | u32 adr, res; |
20609 | u32 src, dst; |
20610 | |
20611 | adr = AREG((Opcode >> 0) & 7); |
20612 | AREG((Opcode >> 0) & 7) += 1; |
20613 | if (flag_C & 0x100) |
20614 | { |
20615 | res = 0xFF; |
20616 | PRE_IO |
20617 | WRITE_BYTE_F(adr, res) |
20618 | POST_IO |
20619 | RET(12) |
20620 | } |
20621 | res = 0; |
20622 | PRE_IO |
20623 | WRITE_BYTE_F(adr, res) |
20624 | POST_IO |
20625 | RET(12) |
20626 | } |
20627 | |
20628 | // STCC |
20629 | OPCODE(0x56D8) |
20630 | { |
20631 | u32 adr, res; |
20632 | u32 src, dst; |
20633 | |
20634 | adr = AREG((Opcode >> 0) & 7); |
20635 | AREG((Opcode >> 0) & 7) += 1; |
20636 | if (flag_NotZ) |
20637 | { |
20638 | res = 0xFF; |
20639 | PRE_IO |
20640 | WRITE_BYTE_F(adr, res) |
20641 | POST_IO |
20642 | RET(12) |
20643 | } |
20644 | res = 0; |
20645 | PRE_IO |
20646 | WRITE_BYTE_F(adr, res) |
20647 | POST_IO |
20648 | RET(12) |
20649 | } |
20650 | |
20651 | // STCC |
20652 | OPCODE(0x57D8) |
20653 | { |
20654 | u32 adr, res; |
20655 | u32 src, dst; |
20656 | |
20657 | adr = AREG((Opcode >> 0) & 7); |
20658 | AREG((Opcode >> 0) & 7) += 1; |
20659 | if (!flag_NotZ) |
20660 | { |
20661 | res = 0xFF; |
20662 | PRE_IO |
20663 | WRITE_BYTE_F(adr, res) |
20664 | POST_IO |
20665 | RET(12) |
20666 | } |
20667 | res = 0; |
20668 | PRE_IO |
20669 | WRITE_BYTE_F(adr, res) |
20670 | POST_IO |
20671 | RET(12) |
20672 | } |
20673 | |
20674 | // STCC |
20675 | OPCODE(0x58D8) |
20676 | { |
20677 | u32 adr, res; |
20678 | u32 src, dst; |
20679 | |
20680 | adr = AREG((Opcode >> 0) & 7); |
20681 | AREG((Opcode >> 0) & 7) += 1; |
20682 | if (!(flag_V & 0x80)) |
20683 | { |
20684 | res = 0xFF; |
20685 | PRE_IO |
20686 | WRITE_BYTE_F(adr, res) |
20687 | POST_IO |
20688 | RET(12) |
20689 | } |
20690 | res = 0; |
20691 | PRE_IO |
20692 | WRITE_BYTE_F(adr, res) |
20693 | POST_IO |
20694 | RET(12) |
20695 | } |
20696 | |
20697 | // STCC |
20698 | OPCODE(0x59D8) |
20699 | { |
20700 | u32 adr, res; |
20701 | u32 src, dst; |
20702 | |
20703 | adr = AREG((Opcode >> 0) & 7); |
20704 | AREG((Opcode >> 0) & 7) += 1; |
20705 | if (flag_V & 0x80) |
20706 | { |
20707 | res = 0xFF; |
20708 | PRE_IO |
20709 | WRITE_BYTE_F(adr, res) |
20710 | POST_IO |
20711 | RET(12) |
20712 | } |
20713 | res = 0; |
20714 | PRE_IO |
20715 | WRITE_BYTE_F(adr, res) |
20716 | POST_IO |
20717 | RET(12) |
20718 | } |
20719 | |
20720 | // STCC |
20721 | OPCODE(0x5AD8) |
20722 | { |
20723 | u32 adr, res; |
20724 | u32 src, dst; |
20725 | |
20726 | adr = AREG((Opcode >> 0) & 7); |
20727 | AREG((Opcode >> 0) & 7) += 1; |
20728 | if (!(flag_N & 0x80)) |
20729 | { |
20730 | res = 0xFF; |
20731 | PRE_IO |
20732 | WRITE_BYTE_F(adr, res) |
20733 | POST_IO |
20734 | RET(12) |
20735 | } |
20736 | res = 0; |
20737 | PRE_IO |
20738 | WRITE_BYTE_F(adr, res) |
20739 | POST_IO |
20740 | RET(12) |
20741 | } |
20742 | |
20743 | // STCC |
20744 | OPCODE(0x5BD8) |
20745 | { |
20746 | u32 adr, res; |
20747 | u32 src, dst; |
20748 | |
20749 | adr = AREG((Opcode >> 0) & 7); |
20750 | AREG((Opcode >> 0) & 7) += 1; |
20751 | if (flag_N & 0x80) |
20752 | { |
20753 | res = 0xFF; |
20754 | PRE_IO |
20755 | WRITE_BYTE_F(adr, res) |
20756 | POST_IO |
20757 | RET(12) |
20758 | } |
20759 | res = 0; |
20760 | PRE_IO |
20761 | WRITE_BYTE_F(adr, res) |
20762 | POST_IO |
20763 | RET(12) |
20764 | } |
20765 | |
20766 | // STCC |
20767 | OPCODE(0x5CD8) |
20768 | { |
20769 | u32 adr, res; |
20770 | u32 src, dst; |
20771 | |
20772 | adr = AREG((Opcode >> 0) & 7); |
20773 | AREG((Opcode >> 0) & 7) += 1; |
20774 | if (!((flag_N ^ flag_V) & 0x80)) |
20775 | { |
20776 | res = 0xFF; |
20777 | PRE_IO |
20778 | WRITE_BYTE_F(adr, res) |
20779 | POST_IO |
20780 | RET(12) |
20781 | } |
20782 | res = 0; |
20783 | PRE_IO |
20784 | WRITE_BYTE_F(adr, res) |
20785 | POST_IO |
20786 | RET(12) |
20787 | } |
20788 | |
20789 | // STCC |
20790 | OPCODE(0x5DD8) |
20791 | { |
20792 | u32 adr, res; |
20793 | u32 src, dst; |
20794 | |
20795 | adr = AREG((Opcode >> 0) & 7); |
20796 | AREG((Opcode >> 0) & 7) += 1; |
20797 | if ((flag_N ^ flag_V) & 0x80) |
20798 | { |
20799 | res = 0xFF; |
20800 | PRE_IO |
20801 | WRITE_BYTE_F(adr, res) |
20802 | POST_IO |
20803 | RET(12) |
20804 | } |
20805 | res = 0; |
20806 | PRE_IO |
20807 | WRITE_BYTE_F(adr, res) |
20808 | POST_IO |
20809 | RET(12) |
20810 | } |
20811 | |
20812 | // STCC |
20813 | OPCODE(0x5ED8) |
20814 | { |
20815 | u32 adr, res; |
20816 | u32 src, dst; |
20817 | |
20818 | adr = AREG((Opcode >> 0) & 7); |
20819 | AREG((Opcode >> 0) & 7) += 1; |
20820 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20821 | { |
20822 | res = 0xFF; |
20823 | PRE_IO |
20824 | WRITE_BYTE_F(adr, res) |
20825 | POST_IO |
20826 | RET(12) |
20827 | } |
20828 | res = 0; |
20829 | PRE_IO |
20830 | WRITE_BYTE_F(adr, res) |
20831 | POST_IO |
20832 | RET(12) |
20833 | } |
20834 | |
20835 | // STCC |
20836 | OPCODE(0x5FD8) |
20837 | { |
20838 | u32 adr, res; |
20839 | u32 src, dst; |
20840 | |
20841 | adr = AREG((Opcode >> 0) & 7); |
20842 | AREG((Opcode >> 0) & 7) += 1; |
20843 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20844 | { |
20845 | res = 0xFF; |
20846 | PRE_IO |
20847 | WRITE_BYTE_F(adr, res) |
20848 | POST_IO |
20849 | RET(12) |
20850 | } |
20851 | res = 0; |
20852 | PRE_IO |
20853 | WRITE_BYTE_F(adr, res) |
20854 | POST_IO |
20855 | RET(12) |
20856 | } |
20857 | |
20858 | // STCC |
20859 | OPCODE(0x50E0) |
20860 | { |
20861 | u32 adr, res; |
20862 | u32 src, dst; |
20863 | |
20864 | adr = AREG((Opcode >> 0) & 7) - 1; |
20865 | AREG((Opcode >> 0) & 7) = adr; |
20866 | res = 0xFF; |
20867 | PRE_IO |
20868 | WRITE_BYTE_F(adr, res) |
20869 | POST_IO |
20870 | RET(14) |
20871 | } |
20872 | |
20873 | // STCC |
20874 | OPCODE(0x51E0) |
20875 | { |
20876 | u32 adr, res; |
20877 | u32 src, dst; |
20878 | |
20879 | adr = AREG((Opcode >> 0) & 7) - 1; |
20880 | AREG((Opcode >> 0) & 7) = adr; |
20881 | res = 0; |
20882 | PRE_IO |
20883 | WRITE_BYTE_F(adr, res) |
20884 | POST_IO |
20885 | RET(14) |
20886 | } |
20887 | |
20888 | // STCC |
20889 | OPCODE(0x52E0) |
20890 | { |
20891 | u32 adr, res; |
20892 | u32 src, dst; |
20893 | |
20894 | adr = AREG((Opcode >> 0) & 7) - 1; |
20895 | AREG((Opcode >> 0) & 7) = adr; |
20896 | if (flag_NotZ && (!(flag_C & 0x100))) |
20897 | { |
20898 | res = 0xFF; |
20899 | PRE_IO |
20900 | WRITE_BYTE_F(adr, res) |
20901 | POST_IO |
20902 | RET(14) |
20903 | } |
20904 | res = 0; |
20905 | PRE_IO |
20906 | WRITE_BYTE_F(adr, res) |
20907 | POST_IO |
20908 | RET(14) |
20909 | } |
20910 | |
20911 | // STCC |
20912 | OPCODE(0x53E0) |
20913 | { |
20914 | u32 adr, res; |
20915 | u32 src, dst; |
20916 | |
20917 | adr = AREG((Opcode >> 0) & 7) - 1; |
20918 | AREG((Opcode >> 0) & 7) = adr; |
20919 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20920 | { |
20921 | res = 0xFF; |
20922 | PRE_IO |
20923 | WRITE_BYTE_F(adr, res) |
20924 | POST_IO |
20925 | RET(14) |
20926 | } |
20927 | res = 0; |
20928 | PRE_IO |
20929 | WRITE_BYTE_F(adr, res) |
20930 | POST_IO |
20931 | RET(14) |
20932 | } |
20933 | |
20934 | // STCC |
20935 | OPCODE(0x54E0) |
20936 | { |
20937 | u32 adr, res; |
20938 | u32 src, dst; |
20939 | |
20940 | adr = AREG((Opcode >> 0) & 7) - 1; |
20941 | AREG((Opcode >> 0) & 7) = adr; |
20942 | if (!(flag_C & 0x100)) |
20943 | { |
20944 | res = 0xFF; |
20945 | PRE_IO |
20946 | WRITE_BYTE_F(adr, res) |
20947 | POST_IO |
20948 | RET(14) |
20949 | } |
20950 | res = 0; |
20951 | PRE_IO |
20952 | WRITE_BYTE_F(adr, res) |
20953 | POST_IO |
20954 | RET(14) |
20955 | } |
20956 | |
20957 | // STCC |
20958 | OPCODE(0x55E0) |
20959 | { |
20960 | u32 adr, res; |
20961 | u32 src, dst; |
20962 | |
20963 | adr = AREG((Opcode >> 0) & 7) - 1; |
20964 | AREG((Opcode >> 0) & 7) = adr; |
20965 | if (flag_C & 0x100) |
20966 | { |
20967 | res = 0xFF; |
20968 | PRE_IO |
20969 | WRITE_BYTE_F(adr, res) |
20970 | POST_IO |
20971 | RET(14) |
20972 | } |
20973 | res = 0; |
20974 | PRE_IO |
20975 | WRITE_BYTE_F(adr, res) |
20976 | POST_IO |
20977 | RET(14) |
20978 | } |
20979 | |
20980 | // STCC |
20981 | OPCODE(0x56E0) |
20982 | { |
20983 | u32 adr, res; |
20984 | u32 src, dst; |
20985 | |
20986 | adr = AREG((Opcode >> 0) & 7) - 1; |
20987 | AREG((Opcode >> 0) & 7) = adr; |
20988 | if (flag_NotZ) |
20989 | { |
20990 | res = 0xFF; |
20991 | PRE_IO |
20992 | WRITE_BYTE_F(adr, res) |
20993 | POST_IO |
20994 | RET(14) |
20995 | } |
20996 | res = 0; |
20997 | PRE_IO |
20998 | WRITE_BYTE_F(adr, res) |
20999 | POST_IO |
21000 | RET(14) |
21001 | } |
21002 | |
21003 | // STCC |
21004 | OPCODE(0x57E0) |
21005 | { |
21006 | u32 adr, res; |
21007 | u32 src, dst; |
21008 | |
21009 | adr = AREG((Opcode >> 0) & 7) - 1; |
21010 | AREG((Opcode >> 0) & 7) = adr; |
21011 | if (!flag_NotZ) |
21012 | { |
21013 | res = 0xFF; |
21014 | PRE_IO |
21015 | WRITE_BYTE_F(adr, res) |
21016 | POST_IO |
21017 | RET(14) |
21018 | } |
21019 | res = 0; |
21020 | PRE_IO |
21021 | WRITE_BYTE_F(adr, res) |
21022 | POST_IO |
21023 | RET(14) |
21024 | } |
21025 | |
21026 | // STCC |
21027 | OPCODE(0x58E0) |
21028 | { |
21029 | u32 adr, res; |
21030 | u32 src, dst; |
21031 | |
21032 | adr = AREG((Opcode >> 0) & 7) - 1; |
21033 | AREG((Opcode >> 0) & 7) = adr; |
21034 | if (!(flag_V & 0x80)) |
21035 | { |
21036 | res = 0xFF; |
21037 | PRE_IO |
21038 | WRITE_BYTE_F(adr, res) |
21039 | POST_IO |
21040 | RET(14) |
21041 | } |
21042 | res = 0; |
21043 | PRE_IO |
21044 | WRITE_BYTE_F(adr, res) |
21045 | POST_IO |
21046 | RET(14) |
21047 | } |
21048 | |
21049 | // STCC |
21050 | OPCODE(0x59E0) |
21051 | { |
21052 | u32 adr, res; |
21053 | u32 src, dst; |
21054 | |
21055 | adr = AREG((Opcode >> 0) & 7) - 1; |
21056 | AREG((Opcode >> 0) & 7) = adr; |
21057 | if (flag_V & 0x80) |
21058 | { |
21059 | res = 0xFF; |
21060 | PRE_IO |
21061 | WRITE_BYTE_F(adr, res) |
21062 | POST_IO |
21063 | RET(14) |
21064 | } |
21065 | res = 0; |
21066 | PRE_IO |
21067 | WRITE_BYTE_F(adr, res) |
21068 | POST_IO |
21069 | RET(14) |
21070 | } |
21071 | |
21072 | // STCC |
21073 | OPCODE(0x5AE0) |
21074 | { |
21075 | u32 adr, res; |
21076 | u32 src, dst; |
21077 | |
21078 | adr = AREG((Opcode >> 0) & 7) - 1; |
21079 | AREG((Opcode >> 0) & 7) = adr; |
21080 | if (!(flag_N & 0x80)) |
21081 | { |
21082 | res = 0xFF; |
21083 | PRE_IO |
21084 | WRITE_BYTE_F(adr, res) |
21085 | POST_IO |
21086 | RET(14) |
21087 | } |
21088 | res = 0; |
21089 | PRE_IO |
21090 | WRITE_BYTE_F(adr, res) |
21091 | POST_IO |
21092 | RET(14) |
21093 | } |
21094 | |
21095 | // STCC |
21096 | OPCODE(0x5BE0) |
21097 | { |
21098 | u32 adr, res; |
21099 | u32 src, dst; |
21100 | |
21101 | adr = AREG((Opcode >> 0) & 7) - 1; |
21102 | AREG((Opcode >> 0) & 7) = adr; |
21103 | if (flag_N & 0x80) |
21104 | { |
21105 | res = 0xFF; |
21106 | PRE_IO |
21107 | WRITE_BYTE_F(adr, res) |
21108 | POST_IO |
21109 | RET(14) |
21110 | } |
21111 | res = 0; |
21112 | PRE_IO |
21113 | WRITE_BYTE_F(adr, res) |
21114 | POST_IO |
21115 | RET(14) |
21116 | } |
21117 | |
21118 | // STCC |
21119 | OPCODE(0x5CE0) |
21120 | { |
21121 | u32 adr, res; |
21122 | u32 src, dst; |
21123 | |
21124 | adr = AREG((Opcode >> 0) & 7) - 1; |
21125 | AREG((Opcode >> 0) & 7) = adr; |
21126 | if (!((flag_N ^ flag_V) & 0x80)) |
21127 | { |
21128 | res = 0xFF; |
21129 | PRE_IO |
21130 | WRITE_BYTE_F(adr, res) |
21131 | POST_IO |
21132 | RET(14) |
21133 | } |
21134 | res = 0; |
21135 | PRE_IO |
21136 | WRITE_BYTE_F(adr, res) |
21137 | POST_IO |
21138 | RET(14) |
21139 | } |
21140 | |
21141 | // STCC |
21142 | OPCODE(0x5DE0) |
21143 | { |
21144 | u32 adr, res; |
21145 | u32 src, dst; |
21146 | |
21147 | adr = AREG((Opcode >> 0) & 7) - 1; |
21148 | AREG((Opcode >> 0) & 7) = adr; |
21149 | if ((flag_N ^ flag_V) & 0x80) |
21150 | { |
21151 | res = 0xFF; |
21152 | PRE_IO |
21153 | WRITE_BYTE_F(adr, res) |
21154 | POST_IO |
21155 | RET(14) |
21156 | } |
21157 | res = 0; |
21158 | PRE_IO |
21159 | WRITE_BYTE_F(adr, res) |
21160 | POST_IO |
21161 | RET(14) |
21162 | } |
21163 | |
21164 | // STCC |
21165 | OPCODE(0x5EE0) |
21166 | { |
21167 | u32 adr, res; |
21168 | u32 src, dst; |
21169 | |
21170 | adr = AREG((Opcode >> 0) & 7) - 1; |
21171 | AREG((Opcode >> 0) & 7) = adr; |
21172 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21173 | { |
21174 | res = 0xFF; |
21175 | PRE_IO |
21176 | WRITE_BYTE_F(adr, res) |
21177 | POST_IO |
21178 | RET(14) |
21179 | } |
21180 | res = 0; |
21181 | PRE_IO |
21182 | WRITE_BYTE_F(adr, res) |
21183 | POST_IO |
21184 | RET(14) |
21185 | } |
21186 | |
21187 | // STCC |
21188 | OPCODE(0x5FE0) |
21189 | { |
21190 | u32 adr, res; |
21191 | u32 src, dst; |
21192 | |
21193 | adr = AREG((Opcode >> 0) & 7) - 1; |
21194 | AREG((Opcode >> 0) & 7) = adr; |
21195 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21196 | { |
21197 | res = 0xFF; |
21198 | PRE_IO |
21199 | WRITE_BYTE_F(adr, res) |
21200 | POST_IO |
21201 | RET(14) |
21202 | } |
21203 | res = 0; |
21204 | PRE_IO |
21205 | WRITE_BYTE_F(adr, res) |
21206 | POST_IO |
21207 | RET(14) |
21208 | } |
21209 | |
21210 | // STCC |
21211 | OPCODE(0x50E8) |
21212 | { |
21213 | u32 adr, res; |
21214 | u32 src, dst; |
21215 | |
21216 | FETCH_SWORD(adr); |
21217 | adr += AREG((Opcode >> 0) & 7); |
21218 | res = 0xFF; |
21219 | PRE_IO |
21220 | WRITE_BYTE_F(adr, res) |
21221 | POST_IO |
21222 | RET(16) |
21223 | } |
21224 | |
21225 | // STCC |
21226 | OPCODE(0x51E8) |
21227 | { |
21228 | u32 adr, res; |
21229 | u32 src, dst; |
21230 | |
21231 | FETCH_SWORD(adr); |
21232 | adr += AREG((Opcode >> 0) & 7); |
21233 | res = 0; |
21234 | PRE_IO |
21235 | WRITE_BYTE_F(adr, res) |
21236 | POST_IO |
21237 | RET(16) |
21238 | } |
21239 | |
21240 | // STCC |
21241 | OPCODE(0x52E8) |
21242 | { |
21243 | u32 adr, res; |
21244 | u32 src, dst; |
21245 | |
21246 | FETCH_SWORD(adr); |
21247 | adr += AREG((Opcode >> 0) & 7); |
21248 | if (flag_NotZ && (!(flag_C & 0x100))) |
21249 | { |
21250 | res = 0xFF; |
21251 | PRE_IO |
21252 | WRITE_BYTE_F(adr, res) |
21253 | POST_IO |
21254 | RET(16) |
21255 | } |
21256 | res = 0; |
21257 | PRE_IO |
21258 | WRITE_BYTE_F(adr, res) |
21259 | POST_IO |
21260 | RET(16) |
21261 | } |
21262 | |
21263 | // STCC |
21264 | OPCODE(0x53E8) |
21265 | { |
21266 | u32 adr, res; |
21267 | u32 src, dst; |
21268 | |
21269 | FETCH_SWORD(adr); |
21270 | adr += AREG((Opcode >> 0) & 7); |
21271 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21272 | { |
21273 | res = 0xFF; |
21274 | PRE_IO |
21275 | WRITE_BYTE_F(adr, res) |
21276 | POST_IO |
21277 | RET(16) |
21278 | } |
21279 | res = 0; |
21280 | PRE_IO |
21281 | WRITE_BYTE_F(adr, res) |
21282 | POST_IO |
21283 | RET(16) |
21284 | } |
21285 | |
21286 | // STCC |
21287 | OPCODE(0x54E8) |
21288 | { |
21289 | u32 adr, res; |
21290 | u32 src, dst; |
21291 | |
21292 | FETCH_SWORD(adr); |
21293 | adr += AREG((Opcode >> 0) & 7); |
21294 | if (!(flag_C & 0x100)) |
21295 | { |
21296 | res = 0xFF; |
21297 | PRE_IO |
21298 | WRITE_BYTE_F(adr, res) |
21299 | POST_IO |
21300 | RET(16) |
21301 | } |
21302 | res = 0; |
21303 | PRE_IO |
21304 | WRITE_BYTE_F(adr, res) |
21305 | POST_IO |
21306 | RET(16) |
21307 | } |
21308 | |
21309 | // STCC |
21310 | OPCODE(0x55E8) |
21311 | { |
21312 | u32 adr, res; |
21313 | u32 src, dst; |
21314 | |
21315 | FETCH_SWORD(adr); |
21316 | adr += AREG((Opcode >> 0) & 7); |
21317 | if (flag_C & 0x100) |
21318 | { |
21319 | res = 0xFF; |
21320 | PRE_IO |
21321 | WRITE_BYTE_F(adr, res) |
21322 | POST_IO |
21323 | RET(16) |
21324 | } |
21325 | res = 0; |
21326 | PRE_IO |
21327 | WRITE_BYTE_F(adr, res) |
21328 | POST_IO |
21329 | RET(16) |
21330 | } |
21331 | |
21332 | // STCC |
21333 | OPCODE(0x56E8) |
21334 | { |
21335 | u32 adr, res; |
21336 | u32 src, dst; |
21337 | |
21338 | FETCH_SWORD(adr); |
21339 | adr += AREG((Opcode >> 0) & 7); |
21340 | if (flag_NotZ) |
21341 | { |
21342 | res = 0xFF; |
21343 | PRE_IO |
21344 | WRITE_BYTE_F(adr, res) |
21345 | POST_IO |
21346 | RET(16) |
21347 | } |
21348 | res = 0; |
21349 | PRE_IO |
21350 | WRITE_BYTE_F(adr, res) |
21351 | POST_IO |
21352 | RET(16) |
21353 | } |
21354 | |
21355 | // STCC |
21356 | OPCODE(0x57E8) |
21357 | { |
21358 | u32 adr, res; |
21359 | u32 src, dst; |
21360 | |
21361 | FETCH_SWORD(adr); |
21362 | adr += AREG((Opcode >> 0) & 7); |
21363 | if (!flag_NotZ) |
21364 | { |
21365 | res = 0xFF; |
21366 | PRE_IO |
21367 | WRITE_BYTE_F(adr, res) |
21368 | POST_IO |
21369 | RET(16) |
21370 | } |
21371 | res = 0; |
21372 | PRE_IO |
21373 | WRITE_BYTE_F(adr, res) |
21374 | POST_IO |
21375 | RET(16) |
21376 | } |
21377 | |
21378 | // STCC |
21379 | OPCODE(0x58E8) |
21380 | { |
21381 | u32 adr, res; |
21382 | u32 src, dst; |
21383 | |
21384 | FETCH_SWORD(adr); |
21385 | adr += AREG((Opcode >> 0) & 7); |
21386 | if (!(flag_V & 0x80)) |
21387 | { |
21388 | res = 0xFF; |
21389 | PRE_IO |
21390 | WRITE_BYTE_F(adr, res) |
21391 | POST_IO |
21392 | RET(16) |
21393 | } |
21394 | res = 0; |
21395 | PRE_IO |
21396 | WRITE_BYTE_F(adr, res) |
21397 | POST_IO |
21398 | RET(16) |
21399 | } |
21400 | |
21401 | // STCC |
21402 | OPCODE(0x59E8) |
21403 | { |
21404 | u32 adr, res; |
21405 | u32 src, dst; |
21406 | |
21407 | FETCH_SWORD(adr); |
21408 | adr += AREG((Opcode >> 0) & 7); |
21409 | if (flag_V & 0x80) |
21410 | { |
21411 | res = 0xFF; |
21412 | PRE_IO |
21413 | WRITE_BYTE_F(adr, res) |
21414 | POST_IO |
21415 | RET(16) |
21416 | } |
21417 | res = 0; |
21418 | PRE_IO |
21419 | WRITE_BYTE_F(adr, res) |
21420 | POST_IO |
21421 | RET(16) |
21422 | } |
21423 | |
21424 | // STCC |
21425 | OPCODE(0x5AE8) |
21426 | { |
21427 | u32 adr, res; |
21428 | u32 src, dst; |
21429 | |
21430 | FETCH_SWORD(adr); |
21431 | adr += AREG((Opcode >> 0) & 7); |
21432 | if (!(flag_N & 0x80)) |
21433 | { |
21434 | res = 0xFF; |
21435 | PRE_IO |
21436 | WRITE_BYTE_F(adr, res) |
21437 | POST_IO |
21438 | RET(16) |
21439 | } |
21440 | res = 0; |
21441 | PRE_IO |
21442 | WRITE_BYTE_F(adr, res) |
21443 | POST_IO |
21444 | RET(16) |
21445 | } |
21446 | |
21447 | // STCC |
21448 | OPCODE(0x5BE8) |
21449 | { |
21450 | u32 adr, res; |
21451 | u32 src, dst; |
21452 | |
21453 | FETCH_SWORD(adr); |
21454 | adr += AREG((Opcode >> 0) & 7); |
21455 | if (flag_N & 0x80) |
21456 | { |
21457 | res = 0xFF; |
21458 | PRE_IO |
21459 | WRITE_BYTE_F(adr, res) |
21460 | POST_IO |
21461 | RET(16) |
21462 | } |
21463 | res = 0; |
21464 | PRE_IO |
21465 | WRITE_BYTE_F(adr, res) |
21466 | POST_IO |
21467 | RET(16) |
21468 | } |
21469 | |
21470 | // STCC |
21471 | OPCODE(0x5CE8) |
21472 | { |
21473 | u32 adr, res; |
21474 | u32 src, dst; |
21475 | |
21476 | FETCH_SWORD(adr); |
21477 | adr += AREG((Opcode >> 0) & 7); |
21478 | if (!((flag_N ^ flag_V) & 0x80)) |
21479 | { |
21480 | res = 0xFF; |
21481 | PRE_IO |
21482 | WRITE_BYTE_F(adr, res) |
21483 | POST_IO |
21484 | RET(16) |
21485 | } |
21486 | res = 0; |
21487 | PRE_IO |
21488 | WRITE_BYTE_F(adr, res) |
21489 | POST_IO |
21490 | RET(16) |
21491 | } |
21492 | |
21493 | // STCC |
21494 | OPCODE(0x5DE8) |
21495 | { |
21496 | u32 adr, res; |
21497 | u32 src, dst; |
21498 | |
21499 | FETCH_SWORD(adr); |
21500 | adr += AREG((Opcode >> 0) & 7); |
21501 | if ((flag_N ^ flag_V) & 0x80) |
21502 | { |
21503 | res = 0xFF; |
21504 | PRE_IO |
21505 | WRITE_BYTE_F(adr, res) |
21506 | POST_IO |
21507 | RET(16) |
21508 | } |
21509 | res = 0; |
21510 | PRE_IO |
21511 | WRITE_BYTE_F(adr, res) |
21512 | POST_IO |
21513 | RET(16) |
21514 | } |
21515 | |
21516 | // STCC |
21517 | OPCODE(0x5EE8) |
21518 | { |
21519 | u32 adr, res; |
21520 | u32 src, dst; |
21521 | |
21522 | FETCH_SWORD(adr); |
21523 | adr += AREG((Opcode >> 0) & 7); |
21524 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21525 | { |
21526 | res = 0xFF; |
21527 | PRE_IO |
21528 | WRITE_BYTE_F(adr, res) |
21529 | POST_IO |
21530 | RET(16) |
21531 | } |
21532 | res = 0; |
21533 | PRE_IO |
21534 | WRITE_BYTE_F(adr, res) |
21535 | POST_IO |
21536 | RET(16) |
21537 | } |
21538 | |
21539 | // STCC |
21540 | OPCODE(0x5FE8) |
21541 | { |
21542 | u32 adr, res; |
21543 | u32 src, dst; |
21544 | |
21545 | FETCH_SWORD(adr); |
21546 | adr += AREG((Opcode >> 0) & 7); |
21547 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21548 | { |
21549 | res = 0xFF; |
21550 | PRE_IO |
21551 | WRITE_BYTE_F(adr, res) |
21552 | POST_IO |
21553 | RET(16) |
21554 | } |
21555 | res = 0; |
21556 | PRE_IO |
21557 | WRITE_BYTE_F(adr, res) |
21558 | POST_IO |
21559 | RET(16) |
21560 | } |
21561 | |
21562 | // STCC |
21563 | OPCODE(0x50F0) |
21564 | { |
21565 | u32 adr, res; |
21566 | u32 src, dst; |
21567 | |
21568 | adr = AREG((Opcode >> 0) & 7); |
21569 | DECODE_EXT_WORD |
21570 | res = 0xFF; |
21571 | PRE_IO |
21572 | WRITE_BYTE_F(adr, res) |
21573 | POST_IO |
21574 | RET(18) |
21575 | } |
21576 | |
21577 | // STCC |
21578 | OPCODE(0x51F0) |
21579 | { |
21580 | u32 adr, res; |
21581 | u32 src, dst; |
21582 | |
21583 | adr = AREG((Opcode >> 0) & 7); |
21584 | DECODE_EXT_WORD |
21585 | res = 0; |
21586 | PRE_IO |
21587 | WRITE_BYTE_F(adr, res) |
21588 | POST_IO |
21589 | RET(18) |
21590 | } |
21591 | |
21592 | // STCC |
21593 | OPCODE(0x52F0) |
21594 | { |
21595 | u32 adr, res; |
21596 | u32 src, dst; |
21597 | |
21598 | adr = AREG((Opcode >> 0) & 7); |
21599 | DECODE_EXT_WORD |
21600 | if (flag_NotZ && (!(flag_C & 0x100))) |
21601 | { |
21602 | res = 0xFF; |
21603 | PRE_IO |
21604 | WRITE_BYTE_F(adr, res) |
21605 | POST_IO |
21606 | RET(18) |
21607 | } |
21608 | res = 0; |
21609 | PRE_IO |
21610 | WRITE_BYTE_F(adr, res) |
21611 | POST_IO |
21612 | RET(18) |
21613 | } |
21614 | |
21615 | // STCC |
21616 | OPCODE(0x53F0) |
21617 | { |
21618 | u32 adr, res; |
21619 | u32 src, dst; |
21620 | |
21621 | adr = AREG((Opcode >> 0) & 7); |
21622 | DECODE_EXT_WORD |
21623 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21624 | { |
21625 | res = 0xFF; |
21626 | PRE_IO |
21627 | WRITE_BYTE_F(adr, res) |
21628 | POST_IO |
21629 | RET(18) |
21630 | } |
21631 | res = 0; |
21632 | PRE_IO |
21633 | WRITE_BYTE_F(adr, res) |
21634 | POST_IO |
21635 | RET(18) |
21636 | } |
21637 | |
21638 | // STCC |
21639 | OPCODE(0x54F0) |
21640 | { |
21641 | u32 adr, res; |
21642 | u32 src, dst; |
21643 | |
21644 | adr = AREG((Opcode >> 0) & 7); |
21645 | DECODE_EXT_WORD |
21646 | if (!(flag_C & 0x100)) |
21647 | { |
21648 | res = 0xFF; |
21649 | PRE_IO |
21650 | WRITE_BYTE_F(adr, res) |
21651 | POST_IO |
21652 | RET(18) |
21653 | } |
21654 | res = 0; |
21655 | PRE_IO |
21656 | WRITE_BYTE_F(adr, res) |
21657 | POST_IO |
21658 | RET(18) |
21659 | } |
21660 | |
21661 | // STCC |
21662 | OPCODE(0x55F0) |
21663 | { |
21664 | u32 adr, res; |
21665 | u32 src, dst; |
21666 | |
21667 | adr = AREG((Opcode >> 0) & 7); |
21668 | DECODE_EXT_WORD |
21669 | if (flag_C & 0x100) |
21670 | { |
21671 | res = 0xFF; |
21672 | PRE_IO |
21673 | WRITE_BYTE_F(adr, res) |
21674 | POST_IO |
21675 | RET(18) |
21676 | } |
21677 | res = 0; |
21678 | PRE_IO |
21679 | WRITE_BYTE_F(adr, res) |
21680 | POST_IO |
21681 | RET(18) |
21682 | } |
21683 | |
21684 | // STCC |
21685 | OPCODE(0x56F0) |
21686 | { |
21687 | u32 adr, res; |
21688 | u32 src, dst; |
21689 | |
21690 | adr = AREG((Opcode >> 0) & 7); |
21691 | DECODE_EXT_WORD |
21692 | if (flag_NotZ) |
21693 | { |
21694 | res = 0xFF; |
21695 | PRE_IO |
21696 | WRITE_BYTE_F(adr, res) |
21697 | POST_IO |
21698 | RET(18) |
21699 | } |
21700 | res = 0; |
21701 | PRE_IO |
21702 | WRITE_BYTE_F(adr, res) |
21703 | POST_IO |
21704 | RET(18) |
21705 | } |
21706 | |
21707 | // STCC |
21708 | OPCODE(0x57F0) |
21709 | { |
21710 | u32 adr, res; |
21711 | u32 src, dst; |
21712 | |
21713 | adr = AREG((Opcode >> 0) & 7); |
21714 | DECODE_EXT_WORD |
21715 | if (!flag_NotZ) |
21716 | { |
21717 | res = 0xFF; |
21718 | PRE_IO |
21719 | WRITE_BYTE_F(adr, res) |
21720 | POST_IO |
21721 | RET(18) |
21722 | } |
21723 | res = 0; |
21724 | PRE_IO |
21725 | WRITE_BYTE_F(adr, res) |
21726 | POST_IO |
21727 | RET(18) |
21728 | } |
21729 | |
21730 | // STCC |
21731 | OPCODE(0x58F0) |
21732 | { |
21733 | u32 adr, res; |
21734 | u32 src, dst; |
21735 | |
21736 | adr = AREG((Opcode >> 0) & 7); |
21737 | DECODE_EXT_WORD |
21738 | if (!(flag_V & 0x80)) |
21739 | { |
21740 | res = 0xFF; |
21741 | PRE_IO |
21742 | WRITE_BYTE_F(adr, res) |
21743 | POST_IO |
21744 | RET(18) |
21745 | } |
21746 | res = 0; |
21747 | PRE_IO |
21748 | WRITE_BYTE_F(adr, res) |
21749 | POST_IO |
21750 | RET(18) |
21751 | } |
21752 | |
21753 | // STCC |
21754 | OPCODE(0x59F0) |
21755 | { |
21756 | u32 adr, res; |
21757 | u32 src, dst; |
21758 | |
21759 | adr = AREG((Opcode >> 0) & 7); |
21760 | DECODE_EXT_WORD |
21761 | if (flag_V & 0x80) |
21762 | { |
21763 | res = 0xFF; |
21764 | PRE_IO |
21765 | WRITE_BYTE_F(adr, res) |
21766 | POST_IO |
21767 | RET(18) |
21768 | } |
21769 | res = 0; |
21770 | PRE_IO |
21771 | WRITE_BYTE_F(adr, res) |
21772 | POST_IO |
21773 | RET(18) |
21774 | } |
21775 | |
21776 | // STCC |
21777 | OPCODE(0x5AF0) |
21778 | { |
21779 | u32 adr, res; |
21780 | u32 src, dst; |
21781 | |
21782 | adr = AREG((Opcode >> 0) & 7); |
21783 | DECODE_EXT_WORD |
21784 | if (!(flag_N & 0x80)) |
21785 | { |
21786 | res = 0xFF; |
21787 | PRE_IO |
21788 | WRITE_BYTE_F(adr, res) |
21789 | POST_IO |
21790 | RET(18) |
21791 | } |
21792 | res = 0; |
21793 | PRE_IO |
21794 | WRITE_BYTE_F(adr, res) |
21795 | POST_IO |
21796 | RET(18) |
21797 | } |
21798 | |
21799 | // STCC |
21800 | OPCODE(0x5BF0) |
21801 | { |
21802 | u32 adr, res; |
21803 | u32 src, dst; |
21804 | |
21805 | adr = AREG((Opcode >> 0) & 7); |
21806 | DECODE_EXT_WORD |
21807 | if (flag_N & 0x80) |
21808 | { |
21809 | res = 0xFF; |
21810 | PRE_IO |
21811 | WRITE_BYTE_F(adr, res) |
21812 | POST_IO |
21813 | RET(18) |
21814 | } |
21815 | res = 0; |
21816 | PRE_IO |
21817 | WRITE_BYTE_F(adr, res) |
21818 | POST_IO |
21819 | RET(18) |
21820 | } |
21821 | |
21822 | // STCC |
21823 | OPCODE(0x5CF0) |
21824 | { |
21825 | u32 adr, res; |
21826 | u32 src, dst; |
21827 | |
21828 | adr = AREG((Opcode >> 0) & 7); |
21829 | DECODE_EXT_WORD |
21830 | if (!((flag_N ^ flag_V) & 0x80)) |
21831 | { |
21832 | res = 0xFF; |
21833 | PRE_IO |
21834 | WRITE_BYTE_F(adr, res) |
21835 | POST_IO |
21836 | RET(18) |
21837 | } |
21838 | res = 0; |
21839 | PRE_IO |
21840 | WRITE_BYTE_F(adr, res) |
21841 | POST_IO |
21842 | RET(18) |
21843 | } |
21844 | |
21845 | // STCC |
21846 | OPCODE(0x5DF0) |
21847 | { |
21848 | u32 adr, res; |
21849 | u32 src, dst; |
21850 | |
21851 | adr = AREG((Opcode >> 0) & 7); |
21852 | DECODE_EXT_WORD |
21853 | if ((flag_N ^ flag_V) & 0x80) |
21854 | { |
21855 | res = 0xFF; |
21856 | PRE_IO |
21857 | WRITE_BYTE_F(adr, res) |
21858 | POST_IO |
21859 | RET(18) |
21860 | } |
21861 | res = 0; |
21862 | PRE_IO |
21863 | WRITE_BYTE_F(adr, res) |
21864 | POST_IO |
21865 | RET(18) |
21866 | } |
21867 | |
21868 | // STCC |
21869 | OPCODE(0x5EF0) |
21870 | { |
21871 | u32 adr, res; |
21872 | u32 src, dst; |
21873 | |
21874 | adr = AREG((Opcode >> 0) & 7); |
21875 | DECODE_EXT_WORD |
21876 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21877 | { |
21878 | res = 0xFF; |
21879 | PRE_IO |
21880 | WRITE_BYTE_F(adr, res) |
21881 | POST_IO |
21882 | RET(18) |
21883 | } |
21884 | res = 0; |
21885 | PRE_IO |
21886 | WRITE_BYTE_F(adr, res) |
21887 | POST_IO |
21888 | RET(18) |
21889 | } |
21890 | |
21891 | // STCC |
21892 | OPCODE(0x5FF0) |
21893 | { |
21894 | u32 adr, res; |
21895 | u32 src, dst; |
21896 | |
21897 | adr = AREG((Opcode >> 0) & 7); |
21898 | DECODE_EXT_WORD |
21899 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21900 | { |
21901 | res = 0xFF; |
21902 | PRE_IO |
21903 | WRITE_BYTE_F(adr, res) |
21904 | POST_IO |
21905 | RET(18) |
21906 | } |
21907 | res = 0; |
21908 | PRE_IO |
21909 | WRITE_BYTE_F(adr, res) |
21910 | POST_IO |
21911 | RET(18) |
21912 | } |
21913 | |
21914 | // STCC |
21915 | OPCODE(0x50F8) |
21916 | { |
21917 | u32 adr, res; |
21918 | u32 src, dst; |
21919 | |
21920 | FETCH_SWORD(adr); |
21921 | res = 0xFF; |
21922 | PRE_IO |
21923 | WRITE_BYTE_F(adr, res) |
21924 | POST_IO |
21925 | RET(16) |
21926 | } |
21927 | |
21928 | // STCC |
21929 | OPCODE(0x51F8) |
21930 | { |
21931 | u32 adr, res; |
21932 | u32 src, dst; |
21933 | |
21934 | FETCH_SWORD(adr); |
21935 | res = 0; |
21936 | PRE_IO |
21937 | WRITE_BYTE_F(adr, res) |
21938 | POST_IO |
21939 | RET(16) |
21940 | } |
21941 | |
21942 | // STCC |
21943 | OPCODE(0x52F8) |
21944 | { |
21945 | u32 adr, res; |
21946 | u32 src, dst; |
21947 | |
21948 | FETCH_SWORD(adr); |
21949 | if (flag_NotZ && (!(flag_C & 0x100))) |
21950 | { |
21951 | res = 0xFF; |
21952 | PRE_IO |
21953 | WRITE_BYTE_F(adr, res) |
21954 | POST_IO |
21955 | RET(16) |
21956 | } |
21957 | res = 0; |
21958 | PRE_IO |
21959 | WRITE_BYTE_F(adr, res) |
21960 | POST_IO |
21961 | RET(16) |
21962 | } |
21963 | |
21964 | // STCC |
21965 | OPCODE(0x53F8) |
21966 | { |
21967 | u32 adr, res; |
21968 | u32 src, dst; |
21969 | |
21970 | FETCH_SWORD(adr); |
21971 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21972 | { |
21973 | res = 0xFF; |
21974 | PRE_IO |
21975 | WRITE_BYTE_F(adr, res) |
21976 | POST_IO |
21977 | RET(16) |
21978 | } |
21979 | res = 0; |
21980 | PRE_IO |
21981 | WRITE_BYTE_F(adr, res) |
21982 | POST_IO |
21983 | RET(16) |
21984 | } |
21985 | |
21986 | // STCC |
21987 | OPCODE(0x54F8) |
21988 | { |
21989 | u32 adr, res; |
21990 | u32 src, dst; |
21991 | |
21992 | FETCH_SWORD(adr); |
21993 | if (!(flag_C & 0x100)) |
21994 | { |
21995 | res = 0xFF; |
21996 | PRE_IO |
21997 | WRITE_BYTE_F(adr, res) |
21998 | POST_IO |
21999 | RET(16) |
22000 | } |
22001 | res = 0; |
22002 | PRE_IO |
22003 | WRITE_BYTE_F(adr, res) |
22004 | POST_IO |
22005 | RET(16) |
22006 | } |
22007 | |
22008 | // STCC |
22009 | OPCODE(0x55F8) |
22010 | { |
22011 | u32 adr, res; |
22012 | u32 src, dst; |
22013 | |
22014 | FETCH_SWORD(adr); |
22015 | if (flag_C & 0x100) |
22016 | { |
22017 | res = 0xFF; |
22018 | PRE_IO |
22019 | WRITE_BYTE_F(adr, res) |
22020 | POST_IO |
22021 | RET(16) |
22022 | } |
22023 | res = 0; |
22024 | PRE_IO |
22025 | WRITE_BYTE_F(adr, res) |
22026 | POST_IO |
22027 | RET(16) |
22028 | } |
22029 | |
22030 | // STCC |
22031 | OPCODE(0x56F8) |
22032 | { |
22033 | u32 adr, res; |
22034 | u32 src, dst; |
22035 | |
22036 | FETCH_SWORD(adr); |
22037 | if (flag_NotZ) |
22038 | { |
22039 | res = 0xFF; |
22040 | PRE_IO |
22041 | WRITE_BYTE_F(adr, res) |
22042 | POST_IO |
22043 | RET(16) |
22044 | } |
22045 | res = 0; |
22046 | PRE_IO |
22047 | WRITE_BYTE_F(adr, res) |
22048 | POST_IO |
22049 | RET(16) |
22050 | } |
22051 | |
22052 | // STCC |
22053 | OPCODE(0x57F8) |
22054 | { |
22055 | u32 adr, res; |
22056 | u32 src, dst; |
22057 | |
22058 | FETCH_SWORD(adr); |
22059 | if (!flag_NotZ) |
22060 | { |
22061 | res = 0xFF; |
22062 | PRE_IO |
22063 | WRITE_BYTE_F(adr, res) |
22064 | POST_IO |
22065 | RET(16) |
22066 | } |
22067 | res = 0; |
22068 | PRE_IO |
22069 | WRITE_BYTE_F(adr, res) |
22070 | POST_IO |
22071 | RET(16) |
22072 | } |
22073 | |
22074 | // STCC |
22075 | OPCODE(0x58F8) |
22076 | { |
22077 | u32 adr, res; |
22078 | u32 src, dst; |
22079 | |
22080 | FETCH_SWORD(adr); |
22081 | if (!(flag_V & 0x80)) |
22082 | { |
22083 | res = 0xFF; |
22084 | PRE_IO |
22085 | WRITE_BYTE_F(adr, res) |
22086 | POST_IO |
22087 | RET(16) |
22088 | } |
22089 | res = 0; |
22090 | PRE_IO |
22091 | WRITE_BYTE_F(adr, res) |
22092 | POST_IO |
22093 | RET(16) |
22094 | } |
22095 | |
22096 | // STCC |
22097 | OPCODE(0x59F8) |
22098 | { |
22099 | u32 adr, res; |
22100 | u32 src, dst; |
22101 | |
22102 | FETCH_SWORD(adr); |
22103 | if (flag_V & 0x80) |
22104 | { |
22105 | res = 0xFF; |
22106 | PRE_IO |
22107 | WRITE_BYTE_F(adr, res) |
22108 | POST_IO |
22109 | RET(16) |
22110 | } |
22111 | res = 0; |
22112 | PRE_IO |
22113 | WRITE_BYTE_F(adr, res) |
22114 | POST_IO |
22115 | RET(16) |
22116 | } |
22117 | |
22118 | // STCC |
22119 | OPCODE(0x5AF8) |
22120 | { |
22121 | u32 adr, res; |
22122 | u32 src, dst; |
22123 | |
22124 | FETCH_SWORD(adr); |
22125 | if (!(flag_N & 0x80)) |
22126 | { |
22127 | res = 0xFF; |
22128 | PRE_IO |
22129 | WRITE_BYTE_F(adr, res) |
22130 | POST_IO |
22131 | RET(16) |
22132 | } |
22133 | res = 0; |
22134 | PRE_IO |
22135 | WRITE_BYTE_F(adr, res) |
22136 | POST_IO |
22137 | RET(16) |
22138 | } |
22139 | |
22140 | // STCC |
22141 | OPCODE(0x5BF8) |
22142 | { |
22143 | u32 adr, res; |
22144 | u32 src, dst; |
22145 | |
22146 | FETCH_SWORD(adr); |
22147 | if (flag_N & 0x80) |
22148 | { |
22149 | res = 0xFF; |
22150 | PRE_IO |
22151 | WRITE_BYTE_F(adr, res) |
22152 | POST_IO |
22153 | RET(16) |
22154 | } |
22155 | res = 0; |
22156 | PRE_IO |
22157 | WRITE_BYTE_F(adr, res) |
22158 | POST_IO |
22159 | RET(16) |
22160 | } |
22161 | |
22162 | // STCC |
22163 | OPCODE(0x5CF8) |
22164 | { |
22165 | u32 adr, res; |
22166 | u32 src, dst; |
22167 | |
22168 | FETCH_SWORD(adr); |
22169 | if (!((flag_N ^ flag_V) & 0x80)) |
22170 | { |
22171 | res = 0xFF; |
22172 | PRE_IO |
22173 | WRITE_BYTE_F(adr, res) |
22174 | POST_IO |
22175 | RET(16) |
22176 | } |
22177 | res = 0; |
22178 | PRE_IO |
22179 | WRITE_BYTE_F(adr, res) |
22180 | POST_IO |
22181 | RET(16) |
22182 | } |
22183 | |
22184 | // STCC |
22185 | OPCODE(0x5DF8) |
22186 | { |
22187 | u32 adr, res; |
22188 | u32 src, dst; |
22189 | |
22190 | FETCH_SWORD(adr); |
22191 | if ((flag_N ^ flag_V) & 0x80) |
22192 | { |
22193 | res = 0xFF; |
22194 | PRE_IO |
22195 | WRITE_BYTE_F(adr, res) |
22196 | POST_IO |
22197 | RET(16) |
22198 | } |
22199 | res = 0; |
22200 | PRE_IO |
22201 | WRITE_BYTE_F(adr, res) |
22202 | POST_IO |
22203 | RET(16) |
22204 | } |
22205 | |
22206 | // STCC |
22207 | OPCODE(0x5EF8) |
22208 | { |
22209 | u32 adr, res; |
22210 | u32 src, dst; |
22211 | |
22212 | FETCH_SWORD(adr); |
22213 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22214 | { |
22215 | res = 0xFF; |
22216 | PRE_IO |
22217 | WRITE_BYTE_F(adr, res) |
22218 | POST_IO |
22219 | RET(16) |
22220 | } |
22221 | res = 0; |
22222 | PRE_IO |
22223 | WRITE_BYTE_F(adr, res) |
22224 | POST_IO |
22225 | RET(16) |
22226 | } |
22227 | |
22228 | // STCC |
22229 | OPCODE(0x5FF8) |
22230 | { |
22231 | u32 adr, res; |
22232 | u32 src, dst; |
22233 | |
22234 | FETCH_SWORD(adr); |
22235 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22236 | { |
22237 | res = 0xFF; |
22238 | PRE_IO |
22239 | WRITE_BYTE_F(adr, res) |
22240 | POST_IO |
22241 | RET(16) |
22242 | } |
22243 | res = 0; |
22244 | PRE_IO |
22245 | WRITE_BYTE_F(adr, res) |
22246 | POST_IO |
22247 | RET(16) |
22248 | } |
22249 | |
22250 | // STCC |
22251 | OPCODE(0x50F9) |
22252 | { |
22253 | u32 adr, res; |
22254 | u32 src, dst; |
22255 | |
22256 | FETCH_LONG(adr); |
22257 | res = 0xFF; |
22258 | PRE_IO |
22259 | WRITE_BYTE_F(adr, res) |
22260 | POST_IO |
22261 | RET(20) |
22262 | } |
22263 | |
22264 | // STCC |
22265 | OPCODE(0x51F9) |
22266 | { |
22267 | u32 adr, res; |
22268 | u32 src, dst; |
22269 | |
22270 | FETCH_LONG(adr); |
22271 | res = 0; |
22272 | PRE_IO |
22273 | WRITE_BYTE_F(adr, res) |
22274 | POST_IO |
22275 | RET(20) |
22276 | } |
22277 | |
22278 | // STCC |
22279 | OPCODE(0x52F9) |
22280 | { |
22281 | u32 adr, res; |
22282 | u32 src, dst; |
22283 | |
22284 | FETCH_LONG(adr); |
22285 | if (flag_NotZ && (!(flag_C & 0x100))) |
22286 | { |
22287 | res = 0xFF; |
22288 | PRE_IO |
22289 | WRITE_BYTE_F(adr, res) |
22290 | POST_IO |
22291 | RET(20) |
22292 | } |
22293 | res = 0; |
22294 | PRE_IO |
22295 | WRITE_BYTE_F(adr, res) |
22296 | POST_IO |
22297 | RET(20) |
22298 | } |
22299 | |
22300 | // STCC |
22301 | OPCODE(0x53F9) |
22302 | { |
22303 | u32 adr, res; |
22304 | u32 src, dst; |
22305 | |
22306 | FETCH_LONG(adr); |
22307 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22308 | { |
22309 | res = 0xFF; |
22310 | PRE_IO |
22311 | WRITE_BYTE_F(adr, res) |
22312 | POST_IO |
22313 | RET(20) |
22314 | } |
22315 | res = 0; |
22316 | PRE_IO |
22317 | WRITE_BYTE_F(adr, res) |
22318 | POST_IO |
22319 | RET(20) |
22320 | } |
22321 | |
22322 | // STCC |
22323 | OPCODE(0x54F9) |
22324 | { |
22325 | u32 adr, res; |
22326 | u32 src, dst; |
22327 | |
22328 | FETCH_LONG(adr); |
22329 | if (!(flag_C & 0x100)) |
22330 | { |
22331 | res = 0xFF; |
22332 | PRE_IO |
22333 | WRITE_BYTE_F(adr, res) |
22334 | POST_IO |
22335 | RET(20) |
22336 | } |
22337 | res = 0; |
22338 | PRE_IO |
22339 | WRITE_BYTE_F(adr, res) |
22340 | POST_IO |
22341 | RET(20) |
22342 | } |
22343 | |
22344 | // STCC |
22345 | OPCODE(0x55F9) |
22346 | { |
22347 | u32 adr, res; |
22348 | u32 src, dst; |
22349 | |
22350 | FETCH_LONG(adr); |
22351 | if (flag_C & 0x100) |
22352 | { |
22353 | res = 0xFF; |
22354 | PRE_IO |
22355 | WRITE_BYTE_F(adr, res) |
22356 | POST_IO |
22357 | RET(20) |
22358 | } |
22359 | res = 0; |
22360 | PRE_IO |
22361 | WRITE_BYTE_F(adr, res) |
22362 | POST_IO |
22363 | RET(20) |
22364 | } |
22365 | |
22366 | // STCC |
22367 | OPCODE(0x56F9) |
22368 | { |
22369 | u32 adr, res; |
22370 | u32 src, dst; |
22371 | |
22372 | FETCH_LONG(adr); |
22373 | if (flag_NotZ) |
22374 | { |
22375 | res = 0xFF; |
22376 | PRE_IO |
22377 | WRITE_BYTE_F(adr, res) |
22378 | POST_IO |
22379 | RET(20) |
22380 | } |
22381 | res = 0; |
22382 | PRE_IO |
22383 | WRITE_BYTE_F(adr, res) |
22384 | POST_IO |
22385 | RET(20) |
22386 | } |
22387 | |
22388 | // STCC |
22389 | OPCODE(0x57F9) |
22390 | { |
22391 | u32 adr, res; |
22392 | u32 src, dst; |
22393 | |
22394 | FETCH_LONG(adr); |
22395 | if (!flag_NotZ) |
22396 | { |
22397 | res = 0xFF; |
22398 | PRE_IO |
22399 | WRITE_BYTE_F(adr, res) |
22400 | POST_IO |
22401 | RET(20) |
22402 | } |
22403 | res = 0; |
22404 | PRE_IO |
22405 | WRITE_BYTE_F(adr, res) |
22406 | POST_IO |
22407 | RET(20) |
22408 | } |
22409 | |
22410 | // STCC |
22411 | OPCODE(0x58F9) |
22412 | { |
22413 | u32 adr, res; |
22414 | u32 src, dst; |
22415 | |
22416 | FETCH_LONG(adr); |
22417 | if (!(flag_V & 0x80)) |
22418 | { |
22419 | res = 0xFF; |
22420 | PRE_IO |
22421 | WRITE_BYTE_F(adr, res) |
22422 | POST_IO |
22423 | RET(20) |
22424 | } |
22425 | res = 0; |
22426 | PRE_IO |
22427 | WRITE_BYTE_F(adr, res) |
22428 | POST_IO |
22429 | RET(20) |
22430 | } |
22431 | |
22432 | // STCC |
22433 | OPCODE(0x59F9) |
22434 | { |
22435 | u32 adr, res; |
22436 | u32 src, dst; |
22437 | |
22438 | FETCH_LONG(adr); |
22439 | if (flag_V & 0x80) |
22440 | { |
22441 | res = 0xFF; |
22442 | PRE_IO |
22443 | WRITE_BYTE_F(adr, res) |
22444 | POST_IO |
22445 | RET(20) |
22446 | } |
22447 | res = 0; |
22448 | PRE_IO |
22449 | WRITE_BYTE_F(adr, res) |
22450 | POST_IO |
22451 | RET(20) |
22452 | } |
22453 | |
22454 | // STCC |
22455 | OPCODE(0x5AF9) |
22456 | { |
22457 | u32 adr, res; |
22458 | u32 src, dst; |
22459 | |
22460 | FETCH_LONG(adr); |
22461 | if (!(flag_N & 0x80)) |
22462 | { |
22463 | res = 0xFF; |
22464 | PRE_IO |
22465 | WRITE_BYTE_F(adr, res) |
22466 | POST_IO |
22467 | RET(20) |
22468 | } |
22469 | res = 0; |
22470 | PRE_IO |
22471 | WRITE_BYTE_F(adr, res) |
22472 | POST_IO |
22473 | RET(20) |
22474 | } |
22475 | |
22476 | // STCC |
22477 | OPCODE(0x5BF9) |
22478 | { |
22479 | u32 adr, res; |
22480 | u32 src, dst; |
22481 | |
22482 | FETCH_LONG(adr); |
22483 | if (flag_N & 0x80) |
22484 | { |
22485 | res = 0xFF; |
22486 | PRE_IO |
22487 | WRITE_BYTE_F(adr, res) |
22488 | POST_IO |
22489 | RET(20) |
22490 | } |
22491 | res = 0; |
22492 | PRE_IO |
22493 | WRITE_BYTE_F(adr, res) |
22494 | POST_IO |
22495 | RET(20) |
22496 | } |
22497 | |
22498 | // STCC |
22499 | OPCODE(0x5CF9) |
22500 | { |
22501 | u32 adr, res; |
22502 | u32 src, dst; |
22503 | |
22504 | FETCH_LONG(adr); |
22505 | if (!((flag_N ^ flag_V) & 0x80)) |
22506 | { |
22507 | res = 0xFF; |
22508 | PRE_IO |
22509 | WRITE_BYTE_F(adr, res) |
22510 | POST_IO |
22511 | RET(20) |
22512 | } |
22513 | res = 0; |
22514 | PRE_IO |
22515 | WRITE_BYTE_F(adr, res) |
22516 | POST_IO |
22517 | RET(20) |
22518 | } |
22519 | |
22520 | // STCC |
22521 | OPCODE(0x5DF9) |
22522 | { |
22523 | u32 adr, res; |
22524 | u32 src, dst; |
22525 | |
22526 | FETCH_LONG(adr); |
22527 | if ((flag_N ^ flag_V) & 0x80) |
22528 | { |
22529 | res = 0xFF; |
22530 | PRE_IO |
22531 | WRITE_BYTE_F(adr, res) |
22532 | POST_IO |
22533 | RET(20) |
22534 | } |
22535 | res = 0; |
22536 | PRE_IO |
22537 | WRITE_BYTE_F(adr, res) |
22538 | POST_IO |
22539 | RET(20) |
22540 | } |
22541 | |
22542 | // STCC |
22543 | OPCODE(0x5EF9) |
22544 | { |
22545 | u32 adr, res; |
22546 | u32 src, dst; |
22547 | |
22548 | FETCH_LONG(adr); |
22549 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22550 | { |
22551 | res = 0xFF; |
22552 | PRE_IO |
22553 | WRITE_BYTE_F(adr, res) |
22554 | POST_IO |
22555 | RET(20) |
22556 | } |
22557 | res = 0; |
22558 | PRE_IO |
22559 | WRITE_BYTE_F(adr, res) |
22560 | POST_IO |
22561 | RET(20) |
22562 | } |
22563 | |
22564 | // STCC |
22565 | OPCODE(0x5FF9) |
22566 | { |
22567 | u32 adr, res; |
22568 | u32 src, dst; |
22569 | |
22570 | FETCH_LONG(adr); |
22571 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22572 | { |
22573 | res = 0xFF; |
22574 | PRE_IO |
22575 | WRITE_BYTE_F(adr, res) |
22576 | POST_IO |
22577 | RET(20) |
22578 | } |
22579 | res = 0; |
22580 | PRE_IO |
22581 | WRITE_BYTE_F(adr, res) |
22582 | POST_IO |
22583 | RET(20) |
22584 | } |
22585 | |
22586 | // STCC |
22587 | OPCODE(0x50DF) |
22588 | { |
22589 | u32 adr, res; |
22590 | u32 src, dst; |
22591 | |
22592 | adr = AREG(7); |
22593 | AREG(7) += 2; |
22594 | res = 0xFF; |
22595 | PRE_IO |
22596 | WRITE_BYTE_F(adr, res) |
22597 | POST_IO |
22598 | RET(12) |
22599 | } |
22600 | |
22601 | // STCC |
22602 | OPCODE(0x51DF) |
22603 | { |
22604 | u32 adr, res; |
22605 | u32 src, dst; |
22606 | |
22607 | adr = AREG(7); |
22608 | AREG(7) += 2; |
22609 | res = 0; |
22610 | PRE_IO |
22611 | WRITE_BYTE_F(adr, res) |
22612 | POST_IO |
22613 | RET(12) |
22614 | } |
22615 | |
22616 | // STCC |
22617 | OPCODE(0x52DF) |
22618 | { |
22619 | u32 adr, res; |
22620 | u32 src, dst; |
22621 | |
22622 | adr = AREG(7); |
22623 | AREG(7) += 2; |
22624 | if (flag_NotZ && (!(flag_C & 0x100))) |
22625 | { |
22626 | res = 0xFF; |
22627 | PRE_IO |
22628 | WRITE_BYTE_F(adr, res) |
22629 | POST_IO |
22630 | RET(12) |
22631 | } |
22632 | res = 0; |
22633 | PRE_IO |
22634 | WRITE_BYTE_F(adr, res) |
22635 | POST_IO |
22636 | RET(12) |
22637 | } |
22638 | |
22639 | // STCC |
22640 | OPCODE(0x53DF) |
22641 | { |
22642 | u32 adr, res; |
22643 | u32 src, dst; |
22644 | |
22645 | adr = AREG(7); |
22646 | AREG(7) += 2; |
22647 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22648 | { |
22649 | res = 0xFF; |
22650 | PRE_IO |
22651 | WRITE_BYTE_F(adr, res) |
22652 | POST_IO |
22653 | RET(12) |
22654 | } |
22655 | res = 0; |
22656 | PRE_IO |
22657 | WRITE_BYTE_F(adr, res) |
22658 | POST_IO |
22659 | RET(12) |
22660 | } |
22661 | |
22662 | // STCC |
22663 | OPCODE(0x54DF) |
22664 | { |
22665 | u32 adr, res; |
22666 | u32 src, dst; |
22667 | |
22668 | adr = AREG(7); |
22669 | AREG(7) += 2; |
22670 | if (!(flag_C & 0x100)) |
22671 | { |
22672 | res = 0xFF; |
22673 | PRE_IO |
22674 | WRITE_BYTE_F(adr, res) |
22675 | POST_IO |
22676 | RET(12) |
22677 | } |
22678 | res = 0; |
22679 | PRE_IO |
22680 | WRITE_BYTE_F(adr, res) |
22681 | POST_IO |
22682 | RET(12) |
22683 | } |
22684 | |
22685 | // STCC |
22686 | OPCODE(0x55DF) |
22687 | { |
22688 | u32 adr, res; |
22689 | u32 src, dst; |
22690 | |
22691 | adr = AREG(7); |
22692 | AREG(7) += 2; |
22693 | if (flag_C & 0x100) |
22694 | { |
22695 | res = 0xFF; |
22696 | PRE_IO |
22697 | WRITE_BYTE_F(adr, res) |
22698 | POST_IO |
22699 | RET(12) |
22700 | } |
22701 | res = 0; |
22702 | PRE_IO |
22703 | WRITE_BYTE_F(adr, res) |
22704 | POST_IO |
22705 | RET(12) |
22706 | } |
22707 | |
22708 | // STCC |
22709 | OPCODE(0x56DF) |
22710 | { |
22711 | u32 adr, res; |
22712 | u32 src, dst; |
22713 | |
22714 | adr = AREG(7); |
22715 | AREG(7) += 2; |
22716 | if (flag_NotZ) |
22717 | { |
22718 | res = 0xFF; |
22719 | PRE_IO |
22720 | WRITE_BYTE_F(adr, res) |
22721 | POST_IO |
22722 | RET(12) |
22723 | } |
22724 | res = 0; |
22725 | PRE_IO |
22726 | WRITE_BYTE_F(adr, res) |
22727 | POST_IO |
22728 | RET(12) |
22729 | } |
22730 | |
22731 | // STCC |
22732 | OPCODE(0x57DF) |
22733 | { |
22734 | u32 adr, res; |
22735 | u32 src, dst; |
22736 | |
22737 | adr = AREG(7); |
22738 | AREG(7) += 2; |
22739 | if (!flag_NotZ) |
22740 | { |
22741 | res = 0xFF; |
22742 | PRE_IO |
22743 | WRITE_BYTE_F(adr, res) |
22744 | POST_IO |
22745 | RET(12) |
22746 | } |
22747 | res = 0; |
22748 | PRE_IO |
22749 | WRITE_BYTE_F(adr, res) |
22750 | POST_IO |
22751 | RET(12) |
22752 | } |
22753 | |
22754 | // STCC |
22755 | OPCODE(0x58DF) |
22756 | { |
22757 | u32 adr, res; |
22758 | u32 src, dst; |
22759 | |
22760 | adr = AREG(7); |
22761 | AREG(7) += 2; |
22762 | if (!(flag_V & 0x80)) |
22763 | { |
22764 | res = 0xFF; |
22765 | PRE_IO |
22766 | WRITE_BYTE_F(adr, res) |
22767 | POST_IO |
22768 | RET(12) |
22769 | } |
22770 | res = 0; |
22771 | PRE_IO |
22772 | WRITE_BYTE_F(adr, res) |
22773 | POST_IO |
22774 | RET(12) |
22775 | } |
22776 | |
22777 | // STCC |
22778 | OPCODE(0x59DF) |
22779 | { |
22780 | u32 adr, res; |
22781 | u32 src, dst; |
22782 | |
22783 | adr = AREG(7); |
22784 | AREG(7) += 2; |
22785 | if (flag_V & 0x80) |
22786 | { |
22787 | res = 0xFF; |
22788 | PRE_IO |
22789 | WRITE_BYTE_F(adr, res) |
22790 | POST_IO |
22791 | RET(12) |
22792 | } |
22793 | res = 0; |
22794 | PRE_IO |
22795 | WRITE_BYTE_F(adr, res) |
22796 | POST_IO |
22797 | RET(12) |
22798 | } |
22799 | |
22800 | // STCC |
22801 | OPCODE(0x5ADF) |
22802 | { |
22803 | u32 adr, res; |
22804 | u32 src, dst; |
22805 | |
22806 | adr = AREG(7); |
22807 | AREG(7) += 2; |
22808 | if (!(flag_N & 0x80)) |
22809 | { |
22810 | res = 0xFF; |
22811 | PRE_IO |
22812 | WRITE_BYTE_F(adr, res) |
22813 | POST_IO |
22814 | RET(12) |
22815 | } |
22816 | res = 0; |
22817 | PRE_IO |
22818 | WRITE_BYTE_F(adr, res) |
22819 | POST_IO |
22820 | RET(12) |
22821 | } |
22822 | |
22823 | // STCC |
22824 | OPCODE(0x5BDF) |
22825 | { |
22826 | u32 adr, res; |
22827 | u32 src, dst; |
22828 | |
22829 | adr = AREG(7); |
22830 | AREG(7) += 2; |
22831 | if (flag_N & 0x80) |
22832 | { |
22833 | res = 0xFF; |
22834 | PRE_IO |
22835 | WRITE_BYTE_F(adr, res) |
22836 | POST_IO |
22837 | RET(12) |
22838 | } |
22839 | res = 0; |
22840 | PRE_IO |
22841 | WRITE_BYTE_F(adr, res) |
22842 | POST_IO |
22843 | RET(12) |
22844 | } |
22845 | |
22846 | // STCC |
22847 | OPCODE(0x5CDF) |
22848 | { |
22849 | u32 adr, res; |
22850 | u32 src, dst; |
22851 | |
22852 | adr = AREG(7); |
22853 | AREG(7) += 2; |
22854 | if (!((flag_N ^ flag_V) & 0x80)) |
22855 | { |
22856 | res = 0xFF; |
22857 | PRE_IO |
22858 | WRITE_BYTE_F(adr, res) |
22859 | POST_IO |
22860 | RET(12) |
22861 | } |
22862 | res = 0; |
22863 | PRE_IO |
22864 | WRITE_BYTE_F(adr, res) |
22865 | POST_IO |
22866 | RET(12) |
22867 | } |
22868 | |
22869 | // STCC |
22870 | OPCODE(0x5DDF) |
22871 | { |
22872 | u32 adr, res; |
22873 | u32 src, dst; |
22874 | |
22875 | adr = AREG(7); |
22876 | AREG(7) += 2; |
22877 | if ((flag_N ^ flag_V) & 0x80) |
22878 | { |
22879 | res = 0xFF; |
22880 | PRE_IO |
22881 | WRITE_BYTE_F(adr, res) |
22882 | POST_IO |
22883 | RET(12) |
22884 | } |
22885 | res = 0; |
22886 | PRE_IO |
22887 | WRITE_BYTE_F(adr, res) |
22888 | POST_IO |
22889 | RET(12) |
22890 | } |
22891 | |
22892 | // STCC |
22893 | OPCODE(0x5EDF) |
22894 | { |
22895 | u32 adr, res; |
22896 | u32 src, dst; |
22897 | |
22898 | adr = AREG(7); |
22899 | AREG(7) += 2; |
22900 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22901 | { |
22902 | res = 0xFF; |
22903 | PRE_IO |
22904 | WRITE_BYTE_F(adr, res) |
22905 | POST_IO |
22906 | RET(12) |
22907 | } |
22908 | res = 0; |
22909 | PRE_IO |
22910 | WRITE_BYTE_F(adr, res) |
22911 | POST_IO |
22912 | RET(12) |
22913 | } |
22914 | |
22915 | // STCC |
22916 | OPCODE(0x5FDF) |
22917 | { |
22918 | u32 adr, res; |
22919 | u32 src, dst; |
22920 | |
22921 | adr = AREG(7); |
22922 | AREG(7) += 2; |
22923 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22924 | { |
22925 | res = 0xFF; |
22926 | PRE_IO |
22927 | WRITE_BYTE_F(adr, res) |
22928 | POST_IO |
22929 | RET(12) |
22930 | } |
22931 | res = 0; |
22932 | PRE_IO |
22933 | WRITE_BYTE_F(adr, res) |
22934 | POST_IO |
22935 | RET(12) |
22936 | } |
22937 | |
22938 | // STCC |
22939 | OPCODE(0x50E7) |
22940 | { |
22941 | u32 adr, res; |
22942 | u32 src, dst; |
22943 | |
22944 | adr = AREG(7) - 2; |
22945 | AREG(7) = adr; |
22946 | res = 0xFF; |
22947 | PRE_IO |
22948 | WRITE_BYTE_F(adr, res) |
22949 | POST_IO |
22950 | RET(14) |
22951 | } |
22952 | |
22953 | // STCC |
22954 | OPCODE(0x51E7) |
22955 | { |
22956 | u32 adr, res; |
22957 | u32 src, dst; |
22958 | |
22959 | adr = AREG(7) - 2; |
22960 | AREG(7) = adr; |
22961 | res = 0; |
22962 | PRE_IO |
22963 | WRITE_BYTE_F(adr, res) |
22964 | POST_IO |
22965 | RET(14) |
22966 | } |
22967 | |
22968 | // STCC |
22969 | OPCODE(0x52E7) |
22970 | { |
22971 | u32 adr, res; |
22972 | u32 src, dst; |
22973 | |
22974 | adr = AREG(7) - 2; |
22975 | AREG(7) = adr; |
22976 | if (flag_NotZ && (!(flag_C & 0x100))) |
22977 | { |
22978 | res = 0xFF; |
22979 | PRE_IO |
22980 | WRITE_BYTE_F(adr, res) |
22981 | POST_IO |
22982 | RET(14) |
22983 | } |
22984 | res = 0; |
22985 | PRE_IO |
22986 | WRITE_BYTE_F(adr, res) |
22987 | POST_IO |
22988 | RET(14) |
22989 | } |
22990 | |
22991 | // STCC |
22992 | OPCODE(0x53E7) |
22993 | { |
22994 | u32 adr, res; |
22995 | u32 src, dst; |
22996 | |
22997 | adr = AREG(7) - 2; |
22998 | AREG(7) = adr; |
22999 | if ((!flag_NotZ) || (flag_C & 0x100)) |
23000 | { |
23001 | res = 0xFF; |
23002 | PRE_IO |
23003 | WRITE_BYTE_F(adr, res) |
23004 | POST_IO |
23005 | RET(14) |
23006 | } |
23007 | res = 0; |
23008 | PRE_IO |
23009 | WRITE_BYTE_F(adr, res) |
23010 | POST_IO |
23011 | RET(14) |
23012 | } |
23013 | |
23014 | // STCC |
23015 | OPCODE(0x54E7) |
23016 | { |
23017 | u32 adr, res; |
23018 | u32 src, dst; |
23019 | |
23020 | adr = AREG(7) - 2; |
23021 | AREG(7) = adr; |
23022 | if (!(flag_C & 0x100)) |
23023 | { |
23024 | res = 0xFF; |
23025 | PRE_IO |
23026 | WRITE_BYTE_F(adr, res) |
23027 | POST_IO |
23028 | RET(14) |
23029 | } |
23030 | res = 0; |
23031 | PRE_IO |
23032 | WRITE_BYTE_F(adr, res) |
23033 | POST_IO |
23034 | RET(14) |
23035 | } |
23036 | |
23037 | // STCC |
23038 | OPCODE(0x55E7) |
23039 | { |
23040 | u32 adr, res; |
23041 | u32 src, dst; |
23042 | |
23043 | adr = AREG(7) - 2; |
23044 | AREG(7) = adr; |
23045 | if (flag_C & 0x100) |
23046 | { |
23047 | res = 0xFF; |
23048 | PRE_IO |
23049 | WRITE_BYTE_F(adr, res) |
23050 | POST_IO |
23051 | RET(14) |
23052 | } |
23053 | res = 0; |
23054 | PRE_IO |
23055 | WRITE_BYTE_F(adr, res) |
23056 | POST_IO |
23057 | RET(14) |
23058 | } |
23059 | |
23060 | // STCC |
23061 | OPCODE(0x56E7) |
23062 | { |
23063 | u32 adr, res; |
23064 | u32 src, dst; |
23065 | |
23066 | adr = AREG(7) - 2; |
23067 | AREG(7) = adr; |
23068 | if (flag_NotZ) |
23069 | { |
23070 | res = 0xFF; |
23071 | PRE_IO |
23072 | WRITE_BYTE_F(adr, res) |
23073 | POST_IO |
23074 | RET(14) |
23075 | } |
23076 | res = 0; |
23077 | PRE_IO |
23078 | WRITE_BYTE_F(adr, res) |
23079 | POST_IO |
23080 | RET(14) |
23081 | } |
23082 | |
23083 | // STCC |
23084 | OPCODE(0x57E7) |
23085 | { |
23086 | u32 adr, res; |
23087 | u32 src, dst; |
23088 | |
23089 | adr = AREG(7) - 2; |
23090 | AREG(7) = adr; |
23091 | if (!flag_NotZ) |
23092 | { |
23093 | res = 0xFF; |
23094 | PRE_IO |
23095 | WRITE_BYTE_F(adr, res) |
23096 | POST_IO |
23097 | RET(14) |
23098 | } |
23099 | res = 0; |
23100 | PRE_IO |
23101 | WRITE_BYTE_F(adr, res) |
23102 | POST_IO |
23103 | RET(14) |
23104 | } |
23105 | |
23106 | // STCC |
23107 | OPCODE(0x58E7) |
23108 | { |
23109 | u32 adr, res; |
23110 | u32 src, dst; |
23111 | |
23112 | adr = AREG(7) - 2; |
23113 | AREG(7) = adr; |
23114 | if (!(flag_V & 0x80)) |
23115 | { |
23116 | res = 0xFF; |
23117 | PRE_IO |
23118 | WRITE_BYTE_F(adr, res) |
23119 | POST_IO |
23120 | RET(14) |
23121 | } |
23122 | res = 0; |
23123 | PRE_IO |
23124 | WRITE_BYTE_F(adr, res) |
23125 | POST_IO |
23126 | RET(14) |
23127 | } |
23128 | |
23129 | // STCC |
23130 | OPCODE(0x59E7) |
23131 | { |
23132 | u32 adr, res; |
23133 | u32 src, dst; |
23134 | |
23135 | adr = AREG(7) - 2; |
23136 | AREG(7) = adr; |
23137 | if (flag_V & 0x80) |
23138 | { |
23139 | res = 0xFF; |
23140 | PRE_IO |
23141 | WRITE_BYTE_F(adr, res) |
23142 | POST_IO |
23143 | RET(14) |
23144 | } |
23145 | res = 0; |
23146 | PRE_IO |
23147 | WRITE_BYTE_F(adr, res) |
23148 | POST_IO |
23149 | RET(14) |
23150 | } |
23151 | |
23152 | // STCC |
23153 | OPCODE(0x5AE7) |
23154 | { |
23155 | u32 adr, res; |
23156 | u32 src, dst; |
23157 | |
23158 | adr = AREG(7) - 2; |
23159 | AREG(7) = adr; |
23160 | if (!(flag_N & 0x80)) |
23161 | { |
23162 | res = 0xFF; |
23163 | PRE_IO |
23164 | WRITE_BYTE_F(adr, res) |
23165 | POST_IO |
23166 | RET(14) |
23167 | } |
23168 | res = 0; |
23169 | PRE_IO |
23170 | WRITE_BYTE_F(adr, res) |
23171 | POST_IO |
23172 | RET(14) |
23173 | } |
23174 | |
23175 | // STCC |
23176 | OPCODE(0x5BE7) |
23177 | { |
23178 | u32 adr, res; |
23179 | u32 src, dst; |
23180 | |
23181 | adr = AREG(7) - 2; |
23182 | AREG(7) = adr; |
23183 | if (flag_N & 0x80) |
23184 | { |
23185 | res = 0xFF; |
23186 | PRE_IO |
23187 | WRITE_BYTE_F(adr, res) |
23188 | POST_IO |
23189 | RET(14) |
23190 | } |
23191 | res = 0; |
23192 | PRE_IO |
23193 | WRITE_BYTE_F(adr, res) |
23194 | POST_IO |
23195 | RET(14) |
23196 | } |
23197 | |
23198 | // STCC |
23199 | OPCODE(0x5CE7) |
23200 | { |
23201 | u32 adr, res; |
23202 | u32 src, dst; |
23203 | |
23204 | adr = AREG(7) - 2; |
23205 | AREG(7) = adr; |
23206 | if (!((flag_N ^ flag_V) & 0x80)) |
23207 | { |
23208 | res = 0xFF; |
23209 | PRE_IO |
23210 | WRITE_BYTE_F(adr, res) |
23211 | POST_IO |
23212 | RET(14) |
23213 | } |
23214 | res = 0; |
23215 | PRE_IO |
23216 | WRITE_BYTE_F(adr, res) |
23217 | POST_IO |
23218 | RET(14) |
23219 | } |
23220 | |
23221 | // STCC |
23222 | OPCODE(0x5DE7) |
23223 | { |
23224 | u32 adr, res; |
23225 | u32 src, dst; |
23226 | |
23227 | adr = AREG(7) - 2; |
23228 | AREG(7) = adr; |
23229 | if ((flag_N ^ flag_V) & 0x80) |
23230 | { |
23231 | res = 0xFF; |
23232 | PRE_IO |
23233 | WRITE_BYTE_F(adr, res) |
23234 | POST_IO |
23235 | RET(14) |
23236 | } |
23237 | res = 0; |
23238 | PRE_IO |
23239 | WRITE_BYTE_F(adr, res) |
23240 | POST_IO |
23241 | RET(14) |
23242 | } |
23243 | |
23244 | // STCC |
23245 | OPCODE(0x5EE7) |
23246 | { |
23247 | u32 adr, res; |
23248 | u32 src, dst; |
23249 | |
23250 | adr = AREG(7) - 2; |
23251 | AREG(7) = adr; |
23252 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23253 | { |
23254 | res = 0xFF; |
23255 | PRE_IO |
23256 | WRITE_BYTE_F(adr, res) |
23257 | POST_IO |
23258 | RET(14) |
23259 | } |
23260 | res = 0; |
23261 | PRE_IO |
23262 | WRITE_BYTE_F(adr, res) |
23263 | POST_IO |
23264 | RET(14) |
23265 | } |
23266 | |
23267 | // STCC |
23268 | OPCODE(0x5FE7) |
23269 | { |
23270 | u32 adr, res; |
23271 | u32 src, dst; |
23272 | |
23273 | adr = AREG(7) - 2; |
23274 | AREG(7) = adr; |
23275 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23276 | { |
23277 | res = 0xFF; |
23278 | PRE_IO |
23279 | WRITE_BYTE_F(adr, res) |
23280 | POST_IO |
23281 | RET(14) |
23282 | } |
23283 | res = 0; |
23284 | PRE_IO |
23285 | WRITE_BYTE_F(adr, res) |
23286 | POST_IO |
23287 | RET(14) |
23288 | } |
23289 | |
23290 | // DBCC |
23291 | OPCODE(0x50C8) |
23292 | { |
23293 | u32 adr, res; |
23294 | u32 src, dst; |
23295 | |
23296 | PC++; |
23297 | RET(12) |
23298 | } |
23299 | |
23300 | // DBCC |
23301 | OPCODE(0x51C8) |
23302 | { |
23303 | u32 adr, res; |
23304 | u32 src, dst; |
23305 | |
ecc8036e |
23306 | NOT_POLLING |
23307 | |
70357ce5 |
23308 | res = DREGu16((Opcode >> 0) & 7); |
23309 | res--; |
23310 | DREGu16((Opcode >> 0) & 7) = res; |
23311 | if ((s32)res != -1) |
23312 | { |
23313 | u32 newPC; |
23314 | |
be26eb23 |
23315 | newPC = GET_PC; |
70357ce5 |
23316 | newPC += GET_SWORD; |
23317 | SET_PC(newPC); |
23318 | CHECK_BRANCH_EXCEPTION(newPC) |
23319 | RET(10) |
23320 | } |
23321 | PC++; |
23322 | RET(14) |
23323 | } |
23324 | |
23325 | // DBCC |
23326 | OPCODE(0x52C8) |
23327 | { |
23328 | u32 adr, res; |
23329 | u32 src, dst; |
23330 | |
ecc8036e |
23331 | NOT_POLLING |
23332 | |
70357ce5 |
23333 | if ((!flag_NotZ) || (flag_C & 0x100)) |
23334 | { |
23335 | res = DREGu16((Opcode >> 0) & 7); |
23336 | res--; |
23337 | DREGu16((Opcode >> 0) & 7) = res; |
23338 | if ((s32)res != -1) |
23339 | { |
23340 | u32 newPC; |
23341 | |
be26eb23 |
23342 | newPC = GET_PC; |
70357ce5 |
23343 | newPC += GET_SWORD; |
23344 | SET_PC(newPC); |
23345 | CHECK_BRANCH_EXCEPTION(newPC) |
23346 | RET(10) |
23347 | } |
23348 | } |
23349 | else |
23350 | { |
23351 | PC++; |
23352 | RET(12) |
23353 | } |
23354 | PC++; |
23355 | RET(14) |
23356 | } |
23357 | |
23358 | // DBCC |
23359 | OPCODE(0x53C8) |
23360 | { |
23361 | u32 adr, res; |
23362 | u32 src, dst; |
23363 | |
ecc8036e |
23364 | NOT_POLLING |
23365 | |
70357ce5 |
23366 | if (flag_NotZ && (!(flag_C & 0x100))) |
23367 | { |
23368 | res = DREGu16((Opcode >> 0) & 7); |
23369 | res--; |
23370 | DREGu16((Opcode >> 0) & 7) = res; |
23371 | if ((s32)res != -1) |
23372 | { |
23373 | u32 newPC; |
23374 | |
be26eb23 |
23375 | newPC = GET_PC; |
70357ce5 |
23376 | newPC += GET_SWORD; |
23377 | SET_PC(newPC); |
23378 | CHECK_BRANCH_EXCEPTION(newPC) |
23379 | RET(10) |
23380 | } |
23381 | } |
23382 | else |
23383 | { |
23384 | PC++; |
23385 | RET(12) |
23386 | } |
23387 | PC++; |
23388 | RET(14) |
23389 | } |
23390 | |
23391 | // DBCC |
23392 | OPCODE(0x54C8) |
23393 | { |
23394 | u32 adr, res; |
23395 | u32 src, dst; |
23396 | |
ecc8036e |
23397 | NOT_POLLING |
23398 | |
70357ce5 |
23399 | if (flag_C & 0x100) |
23400 | { |
23401 | res = DREGu16((Opcode >> 0) & 7); |
23402 | res--; |
23403 | DREGu16((Opcode >> 0) & 7) = res; |
23404 | if ((s32)res != -1) |
23405 | { |
23406 | u32 newPC; |
23407 | |
be26eb23 |
23408 | newPC = GET_PC; |
70357ce5 |
23409 | newPC += GET_SWORD; |
23410 | SET_PC(newPC); |
23411 | CHECK_BRANCH_EXCEPTION(newPC) |
23412 | RET(10) |
23413 | } |
23414 | } |
23415 | else |
23416 | { |
23417 | PC++; |
23418 | RET(12) |
23419 | } |
23420 | PC++; |
23421 | RET(14) |
23422 | } |
23423 | |
23424 | // DBCC |
23425 | OPCODE(0x55C8) |
23426 | { |
23427 | u32 adr, res; |
23428 | u32 src, dst; |
23429 | |
ecc8036e |
23430 | NOT_POLLING |
23431 | |
70357ce5 |
23432 | if (!(flag_C & 0x100)) |
23433 | { |
23434 | res = DREGu16((Opcode >> 0) & 7); |
23435 | res--; |
23436 | DREGu16((Opcode >> 0) & 7) = res; |
23437 | if ((s32)res != -1) |
23438 | { |
23439 | u32 newPC; |
23440 | |
be26eb23 |
23441 | newPC = GET_PC; |
70357ce5 |
23442 | newPC += GET_SWORD; |
23443 | SET_PC(newPC); |
23444 | CHECK_BRANCH_EXCEPTION(newPC) |
23445 | RET(10) |
23446 | } |
23447 | } |
23448 | else |
23449 | { |
23450 | PC++; |
23451 | RET(12) |
23452 | } |
23453 | PC++; |
23454 | RET(14) |
23455 | } |
23456 | |
23457 | // DBCC |
23458 | OPCODE(0x56C8) |
23459 | { |
23460 | u32 adr, res; |
23461 | u32 src, dst; |
23462 | |
ecc8036e |
23463 | NOT_POLLING |
23464 | |
70357ce5 |
23465 | if (!flag_NotZ) |
23466 | { |
23467 | res = DREGu16((Opcode >> 0) & 7); |
23468 | res--; |
23469 | DREGu16((Opcode >> 0) & 7) = res; |
23470 | if ((s32)res != -1) |
23471 | { |
23472 | u32 newPC; |
23473 | |
be26eb23 |
23474 | newPC = GET_PC; |
70357ce5 |
23475 | newPC += GET_SWORD; |
23476 | SET_PC(newPC); |
23477 | CHECK_BRANCH_EXCEPTION(newPC) |
23478 | RET(10) |
23479 | } |
23480 | } |
23481 | else |
23482 | { |
23483 | PC++; |
23484 | RET(12) |
23485 | } |
23486 | PC++; |
23487 | RET(14) |
23488 | } |
23489 | |
23490 | // DBCC |
23491 | OPCODE(0x57C8) |
23492 | { |
23493 | u32 adr, res; |
23494 | u32 src, dst; |
23495 | |
ecc8036e |
23496 | NOT_POLLING |
23497 | |
70357ce5 |
23498 | if (flag_NotZ) |
23499 | { |
23500 | res = DREGu16((Opcode >> 0) & 7); |
23501 | res--; |
23502 | DREGu16((Opcode >> 0) & 7) = res; |
23503 | if ((s32)res != -1) |
23504 | { |
23505 | u32 newPC; |
23506 | |
be26eb23 |
23507 | newPC = GET_PC; |
70357ce5 |
23508 | newPC += GET_SWORD; |
23509 | SET_PC(newPC); |
23510 | CHECK_BRANCH_EXCEPTION(newPC) |
23511 | RET(10) |
23512 | } |
23513 | } |
23514 | else |
23515 | { |
23516 | PC++; |
23517 | RET(12) |
23518 | } |
23519 | PC++; |
23520 | RET(14) |
23521 | } |
23522 | |
23523 | // DBCC |
23524 | OPCODE(0x58C8) |
23525 | { |
23526 | u32 adr, res; |
23527 | u32 src, dst; |
23528 | |
ecc8036e |
23529 | NOT_POLLING |
23530 | |
70357ce5 |
23531 | if (flag_V & 0x80) |
23532 | { |
23533 | res = DREGu16((Opcode >> 0) & 7); |
23534 | res--; |
23535 | DREGu16((Opcode >> 0) & 7) = res; |
23536 | if ((s32)res != -1) |
23537 | { |
23538 | u32 newPC; |
23539 | |
be26eb23 |
23540 | newPC = GET_PC; |
70357ce5 |
23541 | newPC += GET_SWORD; |
23542 | SET_PC(newPC); |
23543 | CHECK_BRANCH_EXCEPTION(newPC) |
23544 | RET(10) |
23545 | } |
23546 | } |
23547 | else |
23548 | { |
23549 | PC++; |
23550 | RET(12) |
23551 | } |
23552 | PC++; |
23553 | RET(14) |
23554 | } |
23555 | |
23556 | // DBCC |
23557 | OPCODE(0x59C8) |
23558 | { |
23559 | u32 adr, res; |
23560 | u32 src, dst; |
23561 | |
ecc8036e |
23562 | NOT_POLLING |
23563 | |
70357ce5 |
23564 | if (!(flag_V & 0x80)) |
23565 | { |
23566 | res = DREGu16((Opcode >> 0) & 7); |
23567 | res--; |
23568 | DREGu16((Opcode >> 0) & 7) = res; |
23569 | if ((s32)res != -1) |
23570 | { |
23571 | u32 newPC; |
23572 | |
be26eb23 |
23573 | newPC = GET_PC; |
70357ce5 |
23574 | newPC += GET_SWORD; |
23575 | SET_PC(newPC); |
23576 | CHECK_BRANCH_EXCEPTION(newPC) |
23577 | RET(10) |
23578 | } |
23579 | } |
23580 | else |
23581 | { |
23582 | PC++; |
23583 | RET(12) |
23584 | } |
23585 | PC++; |
23586 | RET(14) |
23587 | } |
23588 | |
23589 | // DBCC |
23590 | OPCODE(0x5AC8) |
23591 | { |
23592 | u32 adr, res; |
23593 | u32 src, dst; |
23594 | |
ecc8036e |
23595 | NOT_POLLING |
23596 | |
70357ce5 |
23597 | if (flag_N & 0x80) |
23598 | { |
23599 | res = DREGu16((Opcode >> 0) & 7); |
23600 | res--; |
23601 | DREGu16((Opcode >> 0) & 7) = res; |
23602 | if ((s32)res != -1) |
23603 | { |
23604 | u32 newPC; |
23605 | |
be26eb23 |
23606 | newPC = GET_PC; |
70357ce5 |
23607 | newPC += GET_SWORD; |
23608 | SET_PC(newPC); |
23609 | CHECK_BRANCH_EXCEPTION(newPC) |
23610 | RET(10) |
23611 | } |
23612 | } |
23613 | else |
23614 | { |
23615 | PC++; |
23616 | RET(12) |
23617 | } |
23618 | PC++; |
23619 | RET(14) |
23620 | } |
23621 | |
23622 | // DBCC |
23623 | OPCODE(0x5BC8) |
23624 | { |
23625 | u32 adr, res; |
23626 | u32 src, dst; |
23627 | |
ecc8036e |
23628 | NOT_POLLING |
23629 | |
70357ce5 |
23630 | if (!(flag_N & 0x80)) |
23631 | { |
23632 | res = DREGu16((Opcode >> 0) & 7); |
23633 | res--; |
23634 | DREGu16((Opcode >> 0) & 7) = res; |
23635 | if ((s32)res != -1) |
23636 | { |
23637 | u32 newPC; |
23638 | |
be26eb23 |
23639 | newPC = GET_PC; |
70357ce5 |
23640 | newPC += GET_SWORD; |
23641 | SET_PC(newPC); |
23642 | CHECK_BRANCH_EXCEPTION(newPC) |
23643 | RET(10) |
23644 | } |
23645 | } |
23646 | else |
23647 | { |
23648 | PC++; |
23649 | RET(12) |
23650 | } |
23651 | PC++; |
23652 | RET(14) |
23653 | } |
23654 | |
23655 | // DBCC |
23656 | OPCODE(0x5CC8) |
23657 | { |
23658 | u32 adr, res; |
23659 | u32 src, dst; |
23660 | |
ecc8036e |
23661 | NOT_POLLING |
23662 | |
70357ce5 |
23663 | if ((flag_N ^ flag_V) & 0x80) |
23664 | { |
23665 | res = DREGu16((Opcode >> 0) & 7); |
23666 | res--; |
23667 | DREGu16((Opcode >> 0) & 7) = res; |
23668 | if ((s32)res != -1) |
23669 | { |
23670 | u32 newPC; |
23671 | |
be26eb23 |
23672 | newPC = GET_PC; |
70357ce5 |
23673 | newPC += GET_SWORD; |
23674 | SET_PC(newPC); |
23675 | CHECK_BRANCH_EXCEPTION(newPC) |
23676 | RET(10) |
23677 | } |
23678 | } |
23679 | else |
23680 | { |
23681 | PC++; |
23682 | RET(12) |
23683 | } |
23684 | PC++; |
23685 | RET(14) |
23686 | } |
23687 | |
23688 | // DBCC |
23689 | OPCODE(0x5DC8) |
23690 | { |
23691 | u32 adr, res; |
23692 | u32 src, dst; |
23693 | |
ecc8036e |
23694 | NOT_POLLING |
23695 | |
70357ce5 |
23696 | if (!((flag_N ^ flag_V) & 0x80)) |
23697 | { |
23698 | res = DREGu16((Opcode >> 0) & 7); |
23699 | res--; |
23700 | DREGu16((Opcode >> 0) & 7) = res; |
23701 | if ((s32)res != -1) |
23702 | { |
23703 | u32 newPC; |
23704 | |
be26eb23 |
23705 | newPC = GET_PC; |
70357ce5 |
23706 | newPC += GET_SWORD; |
23707 | SET_PC(newPC); |
23708 | CHECK_BRANCH_EXCEPTION(newPC) |
23709 | RET(10) |
23710 | } |
23711 | } |
23712 | else |
23713 | { |
23714 | PC++; |
23715 | RET(12) |
23716 | } |
23717 | PC++; |
23718 | RET(14) |
23719 | } |
23720 | |
23721 | // DBCC |
23722 | OPCODE(0x5EC8) |
23723 | { |
23724 | u32 adr, res; |
23725 | u32 src, dst; |
23726 | |
ecc8036e |
23727 | NOT_POLLING |
23728 | |
70357ce5 |
23729 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23730 | { |
23731 | res = DREGu16((Opcode >> 0) & 7); |
23732 | res--; |
23733 | DREGu16((Opcode >> 0) & 7) = res; |
23734 | if ((s32)res != -1) |
23735 | { |
23736 | u32 newPC; |
23737 | |
be26eb23 |
23738 | newPC = GET_PC; |
70357ce5 |
23739 | newPC += GET_SWORD; |
23740 | SET_PC(newPC); |
23741 | CHECK_BRANCH_EXCEPTION(newPC) |
23742 | RET(10) |
23743 | } |
23744 | } |
23745 | else |
23746 | { |
23747 | PC++; |
23748 | RET(12) |
23749 | } |
23750 | PC++; |
23751 | RET(14) |
23752 | } |
23753 | |
23754 | // DBCC |
23755 | OPCODE(0x5FC8) |
23756 | { |
23757 | u32 adr, res; |
23758 | u32 src, dst; |
23759 | |
ecc8036e |
23760 | NOT_POLLING |
23761 | |
70357ce5 |
23762 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23763 | { |
23764 | res = DREGu16((Opcode >> 0) & 7); |
23765 | res--; |
23766 | DREGu16((Opcode >> 0) & 7) = res; |
23767 | if ((s32)res != -1) |
23768 | { |
23769 | u32 newPC; |
23770 | |
be26eb23 |
23771 | newPC = GET_PC; |
70357ce5 |
23772 | newPC += GET_SWORD; |
23773 | SET_PC(newPC); |
23774 | CHECK_BRANCH_EXCEPTION(newPC) |
23775 | RET(10) |
23776 | } |
23777 | } |
23778 | else |
23779 | { |
23780 | PC++; |
23781 | RET(12) |
23782 | } |
23783 | PC++; |
23784 | RET(14) |
23785 | } |
23786 | |
23787 | // ADDQ |
23788 | OPCODE(0x5000) |
23789 | { |
23790 | u32 adr, res; |
23791 | u32 src, dst; |
23792 | |
23793 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23794 | dst = DREGu8((Opcode >> 0) & 7); |
23795 | res = dst + src; |
23796 | flag_N = flag_X = flag_C = res; |
23797 | flag_V = (src ^ res) & (dst ^ res); |
23798 | flag_NotZ = res & 0xFF; |
23799 | DREGu8((Opcode >> 0) & 7) = res; |
23800 | RET(4) |
23801 | } |
23802 | |
23803 | // ADDQ |
23804 | OPCODE(0x5010) |
23805 | { |
23806 | u32 adr, res; |
23807 | u32 src, dst; |
23808 | |
23809 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23810 | adr = AREG((Opcode >> 0) & 7); |
23811 | PRE_IO |
23812 | READ_BYTE_F(adr, dst) |
23813 | res = dst + src; |
23814 | flag_N = flag_X = flag_C = res; |
23815 | flag_V = (src ^ res) & (dst ^ res); |
23816 | flag_NotZ = res & 0xFF; |
23817 | WRITE_BYTE_F(adr, res) |
23818 | POST_IO |
23819 | RET(12) |
23820 | } |
23821 | |
23822 | // ADDQ |
23823 | OPCODE(0x5018) |
23824 | { |
23825 | u32 adr, res; |
23826 | u32 src, dst; |
23827 | |
23828 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23829 | adr = AREG((Opcode >> 0) & 7); |
23830 | AREG((Opcode >> 0) & 7) += 1; |
23831 | PRE_IO |
23832 | READ_BYTE_F(adr, dst) |
23833 | res = dst + src; |
23834 | flag_N = flag_X = flag_C = res; |
23835 | flag_V = (src ^ res) & (dst ^ res); |
23836 | flag_NotZ = res & 0xFF; |
23837 | WRITE_BYTE_F(adr, res) |
23838 | POST_IO |
23839 | RET(12) |
23840 | } |
23841 | |
23842 | // ADDQ |
23843 | OPCODE(0x5020) |
23844 | { |
23845 | u32 adr, res; |
23846 | u32 src, dst; |
23847 | |
23848 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23849 | adr = AREG((Opcode >> 0) & 7) - 1; |
23850 | AREG((Opcode >> 0) & 7) = adr; |
23851 | PRE_IO |
23852 | READ_BYTE_F(adr, dst) |
23853 | res = dst + src; |
23854 | flag_N = flag_X = flag_C = res; |
23855 | flag_V = (src ^ res) & (dst ^ res); |
23856 | flag_NotZ = res & 0xFF; |
23857 | WRITE_BYTE_F(adr, res) |
23858 | POST_IO |
23859 | RET(14) |
23860 | } |
23861 | |
23862 | // ADDQ |
23863 | OPCODE(0x5028) |
23864 | { |
23865 | u32 adr, res; |
23866 | u32 src, dst; |
23867 | |
23868 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23869 | FETCH_SWORD(adr); |
23870 | adr += AREG((Opcode >> 0) & 7); |
23871 | PRE_IO |
23872 | READ_BYTE_F(adr, dst) |
23873 | res = dst + src; |
23874 | flag_N = flag_X = flag_C = res; |
23875 | flag_V = (src ^ res) & (dst ^ res); |
23876 | flag_NotZ = res & 0xFF; |
23877 | WRITE_BYTE_F(adr, res) |
23878 | POST_IO |
23879 | RET(16) |
23880 | } |
23881 | |
23882 | // ADDQ |
23883 | OPCODE(0x5030) |
23884 | { |
23885 | u32 adr, res; |
23886 | u32 src, dst; |
23887 | |
23888 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23889 | adr = AREG((Opcode >> 0) & 7); |
23890 | DECODE_EXT_WORD |
23891 | PRE_IO |
23892 | READ_BYTE_F(adr, dst) |
23893 | res = dst + src; |
23894 | flag_N = flag_X = flag_C = res; |
23895 | flag_V = (src ^ res) & (dst ^ res); |
23896 | flag_NotZ = res & 0xFF; |
23897 | WRITE_BYTE_F(adr, res) |
23898 | POST_IO |
23899 | RET(18) |
23900 | } |
23901 | |
23902 | // ADDQ |
23903 | OPCODE(0x5038) |
23904 | { |
23905 | u32 adr, res; |
23906 | u32 src, dst; |
23907 | |
23908 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23909 | FETCH_SWORD(adr); |
23910 | PRE_IO |
23911 | READ_BYTE_F(adr, dst) |
23912 | res = dst + src; |
23913 | flag_N = flag_X = flag_C = res; |
23914 | flag_V = (src ^ res) & (dst ^ res); |
23915 | flag_NotZ = res & 0xFF; |
23916 | WRITE_BYTE_F(adr, res) |
23917 | POST_IO |
23918 | RET(16) |
23919 | } |
23920 | |
23921 | // ADDQ |
23922 | OPCODE(0x5039) |
23923 | { |
23924 | u32 adr, res; |
23925 | u32 src, dst; |
23926 | |
23927 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23928 | FETCH_LONG(adr); |
23929 | PRE_IO |
23930 | READ_BYTE_F(adr, dst) |
23931 | res = dst + src; |
23932 | flag_N = flag_X = flag_C = res; |
23933 | flag_V = (src ^ res) & (dst ^ res); |
23934 | flag_NotZ = res & 0xFF; |
23935 | WRITE_BYTE_F(adr, res) |
23936 | POST_IO |
23937 | RET(20) |
23938 | } |
23939 | |
23940 | // ADDQ |
23941 | OPCODE(0x501F) |
23942 | { |
23943 | u32 adr, res; |
23944 | u32 src, dst; |
23945 | |
23946 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23947 | adr = AREG(7); |
23948 | AREG(7) += 2; |
23949 | PRE_IO |
23950 | READ_BYTE_F(adr, dst) |
23951 | res = dst + src; |
23952 | flag_N = flag_X = flag_C = res; |
23953 | flag_V = (src ^ res) & (dst ^ res); |
23954 | flag_NotZ = res & 0xFF; |
23955 | WRITE_BYTE_F(adr, res) |
23956 | POST_IO |
23957 | RET(12) |
23958 | } |
23959 | |
23960 | // ADDQ |
23961 | OPCODE(0x5027) |
23962 | { |
23963 | u32 adr, res; |
23964 | u32 src, dst; |
23965 | |
23966 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23967 | adr = AREG(7) - 2; |
23968 | AREG(7) = adr; |
23969 | PRE_IO |
23970 | READ_BYTE_F(adr, dst) |
23971 | res = dst + src; |
23972 | flag_N = flag_X = flag_C = res; |
23973 | flag_V = (src ^ res) & (dst ^ res); |
23974 | flag_NotZ = res & 0xFF; |
23975 | WRITE_BYTE_F(adr, res) |
23976 | POST_IO |
23977 | RET(14) |
23978 | } |
23979 | |
23980 | // ADDQ |
23981 | OPCODE(0x5040) |
23982 | { |
23983 | u32 adr, res; |
23984 | u32 src, dst; |
23985 | |
23986 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23987 | dst = DREGu16((Opcode >> 0) & 7); |
23988 | res = dst + src; |
23989 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23990 | flag_N = flag_X = flag_C = res >> 8; |
23991 | flag_NotZ = res & 0xFFFF; |
23992 | DREGu16((Opcode >> 0) & 7) = res; |
23993 | RET(4) |
23994 | } |
23995 | |
23996 | // ADDQ |
23997 | OPCODE(0x5048) |
23998 | { |
23999 | u32 adr, res; |
24000 | u32 src, dst; |
24001 | |
24002 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24003 | dst = AREGu32((Opcode >> 0) & 7); |
24004 | res = dst + src; |
24005 | AREG((Opcode >> 0) & 7) = res; |
03e4f2a3 |
24006 | #ifdef USE_CYCLONE_TIMING |
70357ce5 |
24007 | RET(4) |
24008 | #else |
24009 | RET(8) |
24010 | #endif |
24011 | } |
24012 | |
24013 | // ADDQ |
24014 | OPCODE(0x5050) |
24015 | { |
24016 | u32 adr, res; |
24017 | u32 src, dst; |
24018 | |
24019 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24020 | adr = AREG((Opcode >> 0) & 7); |
24021 | PRE_IO |
24022 | READ_WORD_F(adr, dst) |
24023 | res = dst + src; |
24024 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24025 | flag_N = flag_X = flag_C = res >> 8; |
24026 | flag_NotZ = res & 0xFFFF; |
24027 | WRITE_WORD_F(adr, res) |
24028 | POST_IO |
24029 | RET(12) |
24030 | } |
24031 | |
24032 | // ADDQ |
24033 | OPCODE(0x5058) |
24034 | { |
24035 | u32 adr, res; |
24036 | u32 src, dst; |
24037 | |
24038 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24039 | adr = AREG((Opcode >> 0) & 7); |
24040 | AREG((Opcode >> 0) & 7) += 2; |
24041 | PRE_IO |
24042 | READ_WORD_F(adr, dst) |
24043 | res = dst + src; |
24044 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24045 | flag_N = flag_X = flag_C = res >> 8; |
24046 | flag_NotZ = res & 0xFFFF; |
24047 | WRITE_WORD_F(adr, res) |
24048 | POST_IO |
24049 | RET(12) |
24050 | } |
24051 | |
24052 | // ADDQ |
24053 | OPCODE(0x5060) |
24054 | { |
24055 | u32 adr, res; |
24056 | u32 src, dst; |
24057 | |
24058 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24059 | adr = AREG((Opcode >> 0) & 7) - 2; |
24060 | AREG((Opcode >> 0) & 7) = adr; |
24061 | PRE_IO |
24062 | READ_WORD_F(adr, dst) |
24063 | res = dst + src; |
24064 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24065 | flag_N = flag_X = flag_C = res >> 8; |
24066 | flag_NotZ = res & 0xFFFF; |
24067 | WRITE_WORD_F(adr, res) |
24068 | POST_IO |
24069 | RET(14) |
24070 | } |
24071 | |
24072 | // ADDQ |
24073 | OPCODE(0x5068) |
24074 | { |
24075 | u32 adr, res; |
24076 | u32 src, dst; |
24077 | |
24078 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24079 | FETCH_SWORD(adr); |
24080 | adr += AREG((Opcode >> 0) & 7); |
24081 | PRE_IO |
24082 | READ_WORD_F(adr, dst) |
24083 | res = dst + src; |
24084 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24085 | flag_N = flag_X = flag_C = res >> 8; |
24086 | flag_NotZ = res & 0xFFFF; |
24087 | WRITE_WORD_F(adr, res) |
24088 | POST_IO |
24089 | RET(16) |
24090 | } |
24091 | |
24092 | // ADDQ |
24093 | OPCODE(0x5070) |
24094 | { |
24095 | u32 adr, res; |
24096 | u32 src, dst; |
24097 | |
24098 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24099 | adr = AREG((Opcode >> 0) & 7); |
24100 | DECODE_EXT_WORD |
24101 | PRE_IO |
24102 | READ_WORD_F(adr, dst) |
24103 | res = dst + src; |
24104 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24105 | flag_N = flag_X = flag_C = res >> 8; |
24106 | flag_NotZ = res & 0xFFFF; |
24107 | WRITE_WORD_F(adr, res) |
24108 | POST_IO |
24109 | RET(18) |
24110 | } |
24111 | |
24112 | // ADDQ |
24113 | OPCODE(0x5078) |
24114 | { |
24115 | u32 adr, res; |
24116 | u32 src, dst; |
24117 | |
24118 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24119 | FETCH_SWORD(adr); |
24120 | PRE_IO |
24121 | READ_WORD_F(adr, dst) |
24122 | res = dst + src; |
24123 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24124 | flag_N = flag_X = flag_C = res >> 8; |
24125 | flag_NotZ = res & 0xFFFF; |
24126 | WRITE_WORD_F(adr, res) |
24127 | POST_IO |
24128 | RET(16) |
24129 | } |
24130 | |
24131 | // ADDQ |
24132 | OPCODE(0x5079) |
24133 | { |
24134 | u32 adr, res; |
24135 | u32 src, dst; |
24136 | |
24137 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24138 | FETCH_LONG(adr); |
24139 | PRE_IO |
24140 | READ_WORD_F(adr, dst) |
24141 | res = dst + src; |
24142 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24143 | flag_N = flag_X = flag_C = res >> 8; |
24144 | flag_NotZ = res & 0xFFFF; |
24145 | WRITE_WORD_F(adr, res) |
24146 | POST_IO |
24147 | RET(20) |
24148 | } |
24149 | |
24150 | // ADDQ |
24151 | OPCODE(0x505F) |
24152 | { |
24153 | u32 adr, res; |
24154 | u32 src, dst; |
24155 | |
24156 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24157 | adr = AREG(7); |
24158 | AREG(7) += 2; |
24159 | PRE_IO |
24160 | READ_WORD_F(adr, dst) |
24161 | res = dst + src; |
24162 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24163 | flag_N = flag_X = flag_C = res >> 8; |
24164 | flag_NotZ = res & 0xFFFF; |
24165 | WRITE_WORD_F(adr, res) |
24166 | POST_IO |
24167 | RET(12) |
24168 | } |
24169 | |
24170 | // ADDQ |
24171 | OPCODE(0x5067) |
24172 | { |
24173 | u32 adr, res; |
24174 | u32 src, dst; |
24175 | |
24176 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24177 | adr = AREG(7) - 2; |
24178 | AREG(7) = adr; |
24179 | PRE_IO |
24180 | READ_WORD_F(adr, dst) |
24181 | res = dst + src; |
24182 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24183 | flag_N = flag_X = flag_C = res >> 8; |
24184 | flag_NotZ = res & 0xFFFF; |
24185 | WRITE_WORD_F(adr, res) |
24186 | POST_IO |
24187 | RET(14) |
24188 | } |
24189 | |
24190 | // ADDQ |
24191 | OPCODE(0x5080) |
24192 | { |
24193 | u32 adr, res; |
24194 | u32 src, dst; |
24195 | |
24196 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24197 | dst = DREGu32((Opcode >> 0) & 7); |
24198 | res = dst + src; |
24199 | flag_NotZ = res; |
24200 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24201 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24202 | flag_N = res >> 24; |
24203 | DREGu32((Opcode >> 0) & 7) = res; |
24204 | RET(8) |
24205 | } |
24206 | |
24207 | // ADDQ |
24208 | OPCODE(0x5088) |
24209 | { |
24210 | u32 adr, res; |
24211 | u32 src, dst; |
24212 | |
24213 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24214 | dst = AREGu32((Opcode >> 0) & 7); |
24215 | res = dst + src; |
24216 | AREG((Opcode >> 0) & 7) = res; |
24217 | RET(8) |
24218 | } |
24219 | |
24220 | // ADDQ |
24221 | OPCODE(0x5090) |
24222 | { |
24223 | u32 adr, res; |
24224 | u32 src, dst; |
24225 | |
24226 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24227 | adr = AREG((Opcode >> 0) & 7); |
24228 | PRE_IO |
24229 | READ_LONG_F(adr, dst) |
24230 | res = dst + src; |
24231 | flag_NotZ = res; |
24232 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24233 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24234 | flag_N = res >> 24; |
24235 | WRITE_LONG_F(adr, res) |
24236 | POST_IO |
24237 | RET(20) |
24238 | } |
24239 | |
24240 | // ADDQ |
24241 | OPCODE(0x5098) |
24242 | { |
24243 | u32 adr, res; |
24244 | u32 src, dst; |
24245 | |
24246 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24247 | adr = AREG((Opcode >> 0) & 7); |
24248 | AREG((Opcode >> 0) & 7) += 4; |
24249 | PRE_IO |
24250 | READ_LONG_F(adr, dst) |
24251 | res = dst + src; |
24252 | flag_NotZ = res; |
24253 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24254 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24255 | flag_N = res >> 24; |
24256 | WRITE_LONG_F(adr, res) |
24257 | POST_IO |
24258 | RET(20) |
24259 | } |
24260 | |
24261 | // ADDQ |
24262 | OPCODE(0x50A0) |
24263 | { |
24264 | u32 adr, res; |
24265 | u32 src, dst; |
24266 | |
24267 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24268 | adr = AREG((Opcode >> 0) & 7) - 4; |
24269 | AREG((Opcode >> 0) & 7) = adr; |
24270 | PRE_IO |
24271 | READ_LONG_F(adr, dst) |
24272 | res = dst + src; |
24273 | flag_NotZ = res; |
24274 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24275 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24276 | flag_N = res >> 24; |
24277 | WRITE_LONG_F(adr, res) |
24278 | POST_IO |
24279 | RET(22) |
24280 | } |
24281 | |
24282 | // ADDQ |
24283 | OPCODE(0x50A8) |
24284 | { |
24285 | u32 adr, res; |
24286 | u32 src, dst; |
24287 | |
24288 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24289 | FETCH_SWORD(adr); |
24290 | adr += AREG((Opcode >> 0) & 7); |
24291 | PRE_IO |
24292 | READ_LONG_F(adr, dst) |
24293 | res = dst + src; |
24294 | flag_NotZ = res; |
24295 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24296 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24297 | flag_N = res >> 24; |
24298 | WRITE_LONG_F(adr, res) |
24299 | POST_IO |
24300 | RET(24) |
24301 | } |
24302 | |
24303 | // ADDQ |
24304 | OPCODE(0x50B0) |
24305 | { |
24306 | u32 adr, res; |
24307 | u32 src, dst; |
24308 | |
24309 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24310 | adr = AREG((Opcode >> 0) & 7); |
24311 | DECODE_EXT_WORD |
24312 | PRE_IO |
24313 | READ_LONG_F(adr, dst) |
24314 | res = dst + src; |
24315 | flag_NotZ = res; |
24316 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24317 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24318 | flag_N = res >> 24; |
24319 | WRITE_LONG_F(adr, res) |
24320 | POST_IO |
24321 | RET(26) |
24322 | } |
24323 | |
24324 | // ADDQ |
24325 | OPCODE(0x50B8) |
24326 | { |
24327 | u32 adr, res; |
24328 | u32 src, dst; |
24329 | |
24330 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24331 | FETCH_SWORD(adr); |
24332 | PRE_IO |
24333 | READ_LONG_F(adr, dst) |
24334 | res = dst + src; |
24335 | flag_NotZ = res; |
24336 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24337 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24338 | flag_N = res >> 24; |
24339 | WRITE_LONG_F(adr, res) |
24340 | POST_IO |
24341 | RET(24) |
24342 | } |
24343 | |
24344 | // ADDQ |
24345 | OPCODE(0x50B9) |
24346 | { |
24347 | u32 adr, res; |
24348 | u32 src, dst; |
24349 | |
24350 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24351 | FETCH_LONG(adr); |
24352 | PRE_IO |
24353 | READ_LONG_F(adr, dst) |
24354 | res = dst + src; |
24355 | flag_NotZ = res; |
24356 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24357 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24358 | flag_N = res >> 24; |
24359 | WRITE_LONG_F(adr, res) |
24360 | POST_IO |
24361 | RET(28) |
24362 | } |
24363 | |
24364 | // ADDQ |
24365 | OPCODE(0x509F) |
24366 | { |
24367 | u32 adr, res; |
24368 | u32 src, dst; |
24369 | |
24370 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24371 | adr = AREG(7); |
24372 | AREG(7) += 4; |
24373 | PRE_IO |
24374 | READ_LONG_F(adr, dst) |
24375 | res = dst + src; |
24376 | flag_NotZ = res; |
24377 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24378 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24379 | flag_N = res >> 24; |
24380 | WRITE_LONG_F(adr, res) |
24381 | POST_IO |
24382 | RET(20) |
24383 | } |
24384 | |
24385 | // ADDQ |
24386 | OPCODE(0x50A7) |
24387 | { |
24388 | u32 adr, res; |
24389 | u32 src, dst; |
24390 | |
24391 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24392 | adr = AREG(7) - 4; |
24393 | AREG(7) = adr; |
24394 | PRE_IO |
24395 | READ_LONG_F(adr, dst) |
24396 | res = dst + src; |
24397 | flag_NotZ = res; |
24398 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24399 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24400 | flag_N = res >> 24; |
24401 | WRITE_LONG_F(adr, res) |
24402 | POST_IO |
24403 | RET(22) |
24404 | } |
24405 | |
24406 | // SUBQ |
24407 | OPCODE(0x5100) |
24408 | { |
24409 | u32 adr, res; |
24410 | u32 src, dst; |
24411 | |
24412 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24413 | dst = DREGu8((Opcode >> 0) & 7); |
24414 | res = dst - src; |
24415 | flag_N = flag_X = flag_C = res; |
24416 | flag_V = (src ^ dst) & (res ^ dst); |
24417 | flag_NotZ = res & 0xFF; |
24418 | DREGu8((Opcode >> 0) & 7) = res; |
24419 | RET(4) |
24420 | } |
24421 | |
24422 | // SUBQ |
24423 | OPCODE(0x5110) |
24424 | { |
24425 | u32 adr, res; |
24426 | u32 src, dst; |
24427 | |
24428 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24429 | adr = AREG((Opcode >> 0) & 7); |
24430 | PRE_IO |
24431 | READ_BYTE_F(adr, dst) |
24432 | res = dst - src; |
24433 | flag_N = flag_X = flag_C = res; |
24434 | flag_V = (src ^ dst) & (res ^ dst); |
24435 | flag_NotZ = res & 0xFF; |
24436 | WRITE_BYTE_F(adr, res) |
24437 | POST_IO |
24438 | RET(12) |
24439 | } |
24440 | |
24441 | // SUBQ |
24442 | OPCODE(0x5118) |
24443 | { |
24444 | u32 adr, res; |
24445 | u32 src, dst; |
24446 | |
24447 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24448 | adr = AREG((Opcode >> 0) & 7); |
24449 | AREG((Opcode >> 0) & 7) += 1; |
24450 | PRE_IO |
24451 | READ_BYTE_F(adr, dst) |
24452 | res = dst - src; |
24453 | flag_N = flag_X = flag_C = res; |
24454 | flag_V = (src ^ dst) & (res ^ dst); |
24455 | flag_NotZ = res & 0xFF; |
24456 | WRITE_BYTE_F(adr, res) |
24457 | POST_IO |
24458 | RET(12) |
24459 | } |
24460 | |
24461 | // SUBQ |
24462 | OPCODE(0x5120) |
24463 | { |
24464 | u32 adr, res; |
24465 | u32 src, dst; |
24466 | |
24467 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24468 | adr = AREG((Opcode >> 0) & 7) - 1; |
24469 | AREG((Opcode >> 0) & 7) = adr; |
24470 | PRE_IO |
24471 | READ_BYTE_F(adr, dst) |
24472 | res = dst - src; |
24473 | flag_N = flag_X = flag_C = res; |
24474 | flag_V = (src ^ dst) & (res ^ dst); |
24475 | flag_NotZ = res & 0xFF; |
24476 | WRITE_BYTE_F(adr, res) |
24477 | POST_IO |
24478 | RET(14) |
24479 | } |
24480 | |
24481 | // SUBQ |
24482 | OPCODE(0x5128) |
24483 | { |
24484 | u32 adr, res; |
24485 | u32 src, dst; |
24486 | |
24487 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24488 | FETCH_SWORD(adr); |
24489 | adr += AREG((Opcode >> 0) & 7); |
24490 | PRE_IO |
24491 | READ_BYTE_F(adr, dst) |
24492 | res = dst - src; |
24493 | flag_N = flag_X = flag_C = res; |
24494 | flag_V = (src ^ dst) & (res ^ dst); |
24495 | flag_NotZ = res & 0xFF; |
24496 | WRITE_BYTE_F(adr, res) |
24497 | POST_IO |
24498 | RET(16) |
24499 | } |
24500 | |
24501 | // SUBQ |
24502 | OPCODE(0x5130) |
24503 | { |
24504 | u32 adr, res; |
24505 | u32 src, dst; |
24506 | |
24507 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24508 | adr = AREG((Opcode >> 0) & 7); |
24509 | DECODE_EXT_WORD |
24510 | PRE_IO |
24511 | READ_BYTE_F(adr, dst) |
24512 | res = dst - src; |
24513 | flag_N = flag_X = flag_C = res; |
24514 | flag_V = (src ^ dst) & (res ^ dst); |
24515 | flag_NotZ = res & 0xFF; |
24516 | WRITE_BYTE_F(adr, res) |
24517 | POST_IO |
24518 | RET(18) |
24519 | } |
24520 | |
24521 | // SUBQ |
24522 | OPCODE(0x5138) |
24523 | { |
24524 | u32 adr, res; |
24525 | u32 src, dst; |
24526 | |
24527 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24528 | FETCH_SWORD(adr); |
24529 | PRE_IO |
24530 | READ_BYTE_F(adr, dst) |
24531 | res = dst - src; |
24532 | flag_N = flag_X = flag_C = res; |
24533 | flag_V = (src ^ dst) & (res ^ dst); |
24534 | flag_NotZ = res & 0xFF; |
24535 | WRITE_BYTE_F(adr, res) |
24536 | POST_IO |
24537 | RET(16) |
24538 | } |
24539 | |
24540 | // SUBQ |
24541 | OPCODE(0x5139) |
24542 | { |
24543 | u32 adr, res; |
24544 | u32 src, dst; |
24545 | |
24546 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24547 | FETCH_LONG(adr); |
24548 | PRE_IO |
24549 | READ_BYTE_F(adr, dst) |
24550 | res = dst - src; |
24551 | flag_N = flag_X = flag_C = res; |
24552 | flag_V = (src ^ dst) & (res ^ dst); |
24553 | flag_NotZ = res & 0xFF; |
24554 | WRITE_BYTE_F(adr, res) |
24555 | POST_IO |
24556 | RET(20) |
24557 | } |
24558 | |
24559 | // SUBQ |
24560 | OPCODE(0x511F) |
24561 | { |
24562 | u32 adr, res; |
24563 | u32 src, dst; |
24564 | |
24565 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24566 | adr = AREG(7); |
24567 | AREG(7) += 2; |
24568 | PRE_IO |
24569 | READ_BYTE_F(adr, dst) |
24570 | res = dst - src; |
24571 | flag_N = flag_X = flag_C = res; |
24572 | flag_V = (src ^ dst) & (res ^ dst); |
24573 | flag_NotZ = res & 0xFF; |
24574 | WRITE_BYTE_F(adr, res) |
24575 | POST_IO |
24576 | RET(12) |
24577 | } |
24578 | |
24579 | // SUBQ |
24580 | OPCODE(0x5127) |
24581 | { |
24582 | u32 adr, res; |
24583 | u32 src, dst; |
24584 | |
24585 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24586 | adr = AREG(7) - 2; |
24587 | AREG(7) = adr; |
24588 | PRE_IO |
24589 | READ_BYTE_F(adr, dst) |
24590 | res = dst - src; |
24591 | flag_N = flag_X = flag_C = res; |
24592 | flag_V = (src ^ dst) & (res ^ dst); |
24593 | flag_NotZ = res & 0xFF; |
24594 | WRITE_BYTE_F(adr, res) |
24595 | POST_IO |
24596 | RET(14) |
24597 | } |
24598 | |
24599 | // SUBQ |
24600 | OPCODE(0x5140) |
24601 | { |
24602 | u32 adr, res; |
24603 | u32 src, dst; |
24604 | |
24605 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24606 | dst = DREGu16((Opcode >> 0) & 7); |
24607 | res = dst - src; |
24608 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24609 | flag_N = flag_X = flag_C = res >> 8; |
24610 | flag_NotZ = res & 0xFFFF; |
24611 | DREGu16((Opcode >> 0) & 7) = res; |
24612 | RET(4) |
24613 | } |
24614 | |
24615 | // SUBQ |
24616 | OPCODE(0x5148) |
24617 | { |
24618 | u32 adr, res; |
24619 | u32 src, dst; |
24620 | |
24621 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24622 | dst = AREGu32((Opcode >> 0) & 7); |
24623 | res = dst - src; |
24624 | AREG((Opcode >> 0) & 7) = res; |
24625 | RET(8) |
24626 | } |
24627 | |
24628 | // SUBQ |
24629 | OPCODE(0x5150) |
24630 | { |
24631 | u32 adr, res; |
24632 | u32 src, dst; |
24633 | |
24634 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24635 | adr = AREG((Opcode >> 0) & 7); |
24636 | PRE_IO |
24637 | READ_WORD_F(adr, dst) |
24638 | res = dst - src; |
24639 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24640 | flag_N = flag_X = flag_C = res >> 8; |
24641 | flag_NotZ = res & 0xFFFF; |
24642 | WRITE_WORD_F(adr, res) |
24643 | POST_IO |
24644 | RET(12) |
24645 | } |
24646 | |
24647 | // SUBQ |
24648 | OPCODE(0x5158) |
24649 | { |
24650 | u32 adr, res; |
24651 | u32 src, dst; |
24652 | |
24653 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24654 | adr = AREG((Opcode >> 0) & 7); |
24655 | AREG((Opcode >> 0) & 7) += 2; |
24656 | PRE_IO |
24657 | READ_WORD_F(adr, dst) |
24658 | res = dst - src; |
24659 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24660 | flag_N = flag_X = flag_C = res >> 8; |
24661 | flag_NotZ = res & 0xFFFF; |
24662 | WRITE_WORD_F(adr, res) |
24663 | POST_IO |
24664 | RET(12) |
24665 | } |
24666 | |
24667 | // SUBQ |
24668 | OPCODE(0x5160) |
24669 | { |
24670 | u32 adr, res; |
24671 | u32 src, dst; |
24672 | |
24673 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24674 | adr = AREG((Opcode >> 0) & 7) - 2; |
24675 | AREG((Opcode >> 0) & 7) = adr; |
24676 | PRE_IO |
24677 | READ_WORD_F(adr, dst) |
24678 | res = dst - src; |
24679 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24680 | flag_N = flag_X = flag_C = res >> 8; |
24681 | flag_NotZ = res & 0xFFFF; |
24682 | WRITE_WORD_F(adr, res) |
24683 | POST_IO |
24684 | RET(14) |
24685 | } |
24686 | |
24687 | // SUBQ |
24688 | OPCODE(0x5168) |
24689 | { |
24690 | u32 adr, res; |
24691 | u32 src, dst; |
24692 | |
24693 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24694 | FETCH_SWORD(adr); |
24695 | adr += AREG((Opcode >> 0) & 7); |
24696 | PRE_IO |
24697 | READ_WORD_F(adr, dst) |
24698 | res = dst - src; |
24699 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24700 | flag_N = flag_X = flag_C = res >> 8; |
24701 | flag_NotZ = res & 0xFFFF; |
24702 | WRITE_WORD_F(adr, res) |
24703 | POST_IO |
24704 | RET(16) |
24705 | } |
24706 | |
24707 | // SUBQ |
24708 | OPCODE(0x5170) |
24709 | { |
24710 | u32 adr, res; |
24711 | u32 src, dst; |
24712 | |
24713 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24714 | adr = AREG((Opcode >> 0) & 7); |
24715 | DECODE_EXT_WORD |
24716 | PRE_IO |
24717 | READ_WORD_F(adr, dst) |
24718 | res = dst - src; |
24719 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24720 | flag_N = flag_X = flag_C = res >> 8; |
24721 | flag_NotZ = res & 0xFFFF; |
24722 | WRITE_WORD_F(adr, res) |
24723 | POST_IO |
24724 | RET(18) |
24725 | } |
24726 | |
24727 | // SUBQ |
24728 | OPCODE(0x5178) |
24729 | { |
24730 | u32 adr, res; |
24731 | u32 src, dst; |
24732 | |
24733 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24734 | FETCH_SWORD(adr); |
24735 | PRE_IO |
24736 | READ_WORD_F(adr, dst) |
24737 | res = dst - src; |
24738 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24739 | flag_N = flag_X = flag_C = res >> 8; |
24740 | flag_NotZ = res & 0xFFFF; |
24741 | WRITE_WORD_F(adr, res) |
24742 | POST_IO |
24743 | RET(16) |
24744 | } |
24745 | |
24746 | // SUBQ |
24747 | OPCODE(0x5179) |
24748 | { |
24749 | u32 adr, res; |
24750 | u32 src, dst; |
24751 | |
24752 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24753 | FETCH_LONG(adr); |
24754 | PRE_IO |
24755 | READ_WORD_F(adr, dst) |
24756 | res = dst - src; |
24757 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24758 | flag_N = flag_X = flag_C = res >> 8; |
24759 | flag_NotZ = res & 0xFFFF; |
24760 | WRITE_WORD_F(adr, res) |
24761 | POST_IO |
24762 | RET(20) |
24763 | } |
24764 | |
24765 | // SUBQ |
24766 | OPCODE(0x515F) |
24767 | { |
24768 | u32 adr, res; |
24769 | u32 src, dst; |
24770 | |
24771 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24772 | adr = AREG(7); |
24773 | AREG(7) += 2; |
24774 | PRE_IO |
24775 | READ_WORD_F(adr, dst) |
24776 | res = dst - src; |
24777 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24778 | flag_N = flag_X = flag_C = res >> 8; |
24779 | flag_NotZ = res & 0xFFFF; |
24780 | WRITE_WORD_F(adr, res) |
24781 | POST_IO |
24782 | RET(12) |
24783 | } |
24784 | |
24785 | // SUBQ |
24786 | OPCODE(0x5167) |
24787 | { |
24788 | u32 adr, res; |
24789 | u32 src, dst; |
24790 | |
24791 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24792 | adr = AREG(7) - 2; |
24793 | AREG(7) = adr; |
24794 | PRE_IO |
24795 | READ_WORD_F(adr, dst) |
24796 | res = dst - src; |
24797 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24798 | flag_N = flag_X = flag_C = res >> 8; |
24799 | flag_NotZ = res & 0xFFFF; |
24800 | WRITE_WORD_F(adr, res) |
24801 | POST_IO |
24802 | RET(14) |
24803 | } |
24804 | |
24805 | // SUBQ |
24806 | OPCODE(0x5180) |
24807 | { |
24808 | u32 adr, res; |
24809 | u32 src, dst; |
24810 | |
24811 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24812 | dst = DREGu32((Opcode >> 0) & 7); |
24813 | res = dst - src; |
24814 | flag_NotZ = res; |
24815 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24816 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24817 | flag_N = res >> 24; |
24818 | DREGu32((Opcode >> 0) & 7) = res; |
24819 | RET(8) |
24820 | } |
24821 | |
24822 | // SUBQ |
24823 | OPCODE(0x5188) |
24824 | { |
24825 | u32 adr, res; |
24826 | u32 src, dst; |
24827 | |
24828 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24829 | dst = AREGu32((Opcode >> 0) & 7); |
24830 | res = dst - src; |
24831 | AREG((Opcode >> 0) & 7) = res; |
24832 | RET(8) |
24833 | } |
24834 | |
24835 | // SUBQ |
24836 | OPCODE(0x5190) |
24837 | { |
24838 | u32 adr, res; |
24839 | u32 src, dst; |
24840 | |
24841 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24842 | adr = AREG((Opcode >> 0) & 7); |
24843 | PRE_IO |
24844 | READ_LONG_F(adr, dst) |
24845 | res = dst - src; |
24846 | flag_NotZ = res; |
24847 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24848 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24849 | flag_N = res >> 24; |
24850 | WRITE_LONG_F(adr, res) |
24851 | POST_IO |
24852 | RET(20) |
24853 | } |
24854 | |
24855 | // SUBQ |
24856 | OPCODE(0x5198) |
24857 | { |
24858 | u32 adr, res; |
24859 | u32 src, dst; |
24860 | |
24861 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24862 | adr = AREG((Opcode >> 0) & 7); |
24863 | AREG((Opcode >> 0) & 7) += 4; |
24864 | PRE_IO |
24865 | READ_LONG_F(adr, dst) |
24866 | res = dst - src; |
24867 | flag_NotZ = res; |
24868 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24869 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24870 | flag_N = res >> 24; |
24871 | WRITE_LONG_F(adr, res) |
24872 | POST_IO |
24873 | RET(20) |
24874 | } |
24875 | |
24876 | // SUBQ |
24877 | OPCODE(0x51A0) |
24878 | { |
24879 | u32 adr, res; |
24880 | u32 src, dst; |
24881 | |
24882 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24883 | adr = AREG((Opcode >> 0) & 7) - 4; |
24884 | AREG((Opcode >> 0) & 7) = adr; |
24885 | PRE_IO |
24886 | READ_LONG_F(adr, dst) |
24887 | res = dst - src; |
24888 | flag_NotZ = res; |
24889 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24890 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24891 | flag_N = res >> 24; |
24892 | WRITE_LONG_F(adr, res) |
24893 | POST_IO |
24894 | RET(22) |
24895 | } |
24896 | |
24897 | // SUBQ |
24898 | OPCODE(0x51A8) |
24899 | { |
24900 | u32 adr, res; |
24901 | u32 src, dst; |
24902 | |
24903 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24904 | FETCH_SWORD(adr); |
24905 | adr += AREG((Opcode >> 0) & 7); |
24906 | PRE_IO |
24907 | READ_LONG_F(adr, dst) |
24908 | res = dst - src; |
24909 | flag_NotZ = res; |
24910 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24911 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24912 | flag_N = res >> 24; |
24913 | WRITE_LONG_F(adr, res) |
24914 | POST_IO |
24915 | RET(24) |
24916 | } |
24917 | |
24918 | // SUBQ |
24919 | OPCODE(0x51B0) |
24920 | { |
24921 | u32 adr, res; |
24922 | u32 src, dst; |
24923 | |
24924 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24925 | adr = AREG((Opcode >> 0) & 7); |
24926 | DECODE_EXT_WORD |
24927 | PRE_IO |
24928 | READ_LONG_F(adr, dst) |
24929 | res = dst - src; |
24930 | flag_NotZ = res; |
24931 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24932 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24933 | flag_N = res >> 24; |
24934 | WRITE_LONG_F(adr, res) |
24935 | POST_IO |
24936 | RET(26) |
24937 | } |
24938 | |
24939 | // SUBQ |
24940 | OPCODE(0x51B8) |
24941 | { |
24942 | u32 adr, res; |
24943 | u32 src, dst; |
24944 | |
24945 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24946 | FETCH_SWORD(adr); |
24947 | PRE_IO |
24948 | READ_LONG_F(adr, dst) |
24949 | res = dst - src; |
24950 | flag_NotZ = res; |
24951 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24952 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24953 | flag_N = res >> 24; |
24954 | WRITE_LONG_F(adr, res) |
24955 | POST_IO |
24956 | RET(24) |
24957 | } |
24958 | |
24959 | // SUBQ |
24960 | OPCODE(0x51B9) |
24961 | { |
24962 | u32 adr, res; |
24963 | u32 src, dst; |
24964 | |
24965 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24966 | FETCH_LONG(adr); |
24967 | PRE_IO |
24968 | READ_LONG_F(adr, dst) |
24969 | res = dst - src; |
24970 | flag_NotZ = res; |
24971 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24972 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24973 | flag_N = res >> 24; |
24974 | WRITE_LONG_F(adr, res) |
24975 | POST_IO |
24976 | RET(28) |
24977 | } |
24978 | |
24979 | // SUBQ |
24980 | OPCODE(0x519F) |
24981 | { |
24982 | u32 adr, res; |
24983 | u32 src, dst; |
24984 | |
24985 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24986 | adr = AREG(7); |
24987 | AREG(7) += 4; |
24988 | PRE_IO |
24989 | READ_LONG_F(adr, dst) |
24990 | res = dst - src; |
24991 | flag_NotZ = res; |
24992 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24993 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24994 | flag_N = res >> 24; |
24995 | WRITE_LONG_F(adr, res) |
24996 | POST_IO |
24997 | RET(20) |
24998 | } |
24999 | |
25000 | // SUBQ |
25001 | OPCODE(0x51A7) |
25002 | { |
25003 | u32 adr, res; |
25004 | u32 src, dst; |
25005 | |
25006 | src = (((Opcode >> 9) - 1) & 7) + 1; |
25007 | adr = AREG(7) - 4; |
25008 | AREG(7) = adr; |
25009 | PRE_IO |
25010 | READ_LONG_F(adr, dst) |
25011 | res = dst - src; |
25012 | flag_NotZ = res; |
25013 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
25014 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
25015 | flag_N = res >> 24; |
25016 | WRITE_LONG_F(adr, res) |
25017 | POST_IO |
25018 | RET(22) |
25019 | } |
25020 | |
25021 | // BCC |
25022 | OPCODE(0x6201) |
25023 | { |
25024 | u32 adr, res; |
25025 | u32 src, dst; |
25026 | |
25027 | if (flag_NotZ && (!(flag_C & 0x100))) |
25028 | { |
25029 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25030 | m68kcontext.io_cycle_counter -= 2; |
25031 | } |
25032 | RET(8) |
25033 | } |
25034 | |
25035 | // BCC |
25036 | OPCODE(0x6301) |
25037 | { |
25038 | u32 adr, res; |
25039 | u32 src, dst; |
25040 | |
25041 | if ((!flag_NotZ) || (flag_C & 0x100)) |
25042 | { |
25043 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25044 | m68kcontext.io_cycle_counter -= 2; |
25045 | } |
25046 | RET(8) |
25047 | } |
25048 | |
25049 | // BCC |
25050 | OPCODE(0x6401) |
25051 | { |
25052 | u32 adr, res; |
25053 | u32 src, dst; |
25054 | |
25055 | if (!(flag_C & 0x100)) |
25056 | { |
25057 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25058 | m68kcontext.io_cycle_counter -= 2; |
25059 | } |
25060 | RET(8) |
25061 | } |
25062 | |
25063 | // BCC |
25064 | OPCODE(0x6501) |
25065 | { |
25066 | u32 adr, res; |
25067 | u32 src, dst; |
25068 | |
25069 | if (flag_C & 0x100) |
25070 | { |
25071 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25072 | m68kcontext.io_cycle_counter -= 2; |
25073 | } |
25074 | RET(8) |
25075 | } |
25076 | |
25077 | // BCC |
25078 | OPCODE(0x6601) |
25079 | { |
25080 | u32 adr, res; |
25081 | u32 src, dst; |
25082 | |
25083 | if (flag_NotZ) |
25084 | { |
25085 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25086 | m68kcontext.io_cycle_counter -= 2; |
25087 | } |
25088 | RET(8) |
25089 | } |
25090 | |
25091 | // BCC |
25092 | OPCODE(0x6701) |
25093 | { |
25094 | u32 adr, res; |
25095 | u32 src, dst; |
25096 | |
25097 | if (!flag_NotZ) |
25098 | { |
25099 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25100 | m68kcontext.io_cycle_counter -= 2; |
25101 | } |
25102 | RET(8) |
25103 | } |
25104 | |
25105 | // BCC |
25106 | OPCODE(0x6801) |
25107 | { |
25108 | u32 adr, res; |
25109 | u32 src, dst; |
25110 | |
25111 | if (!(flag_V & 0x80)) |
25112 | { |
25113 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25114 | m68kcontext.io_cycle_counter -= 2; |
25115 | } |
25116 | RET(8) |
25117 | } |
25118 | |
25119 | // BCC |
25120 | OPCODE(0x6901) |
25121 | { |
25122 | u32 adr, res; |
25123 | u32 src, dst; |
25124 | |
25125 | if (flag_V & 0x80) |
25126 | { |
25127 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25128 | m68kcontext.io_cycle_counter -= 2; |
25129 | } |
25130 | RET(8) |
25131 | } |
25132 | |
25133 | // BCC |
25134 | OPCODE(0x6A01) |
25135 | { |
25136 | u32 adr, res; |
25137 | u32 src, dst; |
25138 | |
25139 | if (!(flag_N & 0x80)) |
25140 | { |
25141 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25142 | m68kcontext.io_cycle_counter -= 2; |
25143 | } |
25144 | RET(8) |
25145 | } |
25146 | |
25147 | // BCC |
25148 | OPCODE(0x6B01) |
25149 | { |
25150 | u32 adr, res; |
25151 | u32 src, dst; |
25152 | |
25153 | if (flag_N & 0x80) |
25154 | { |
25155 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25156 | m68kcontext.io_cycle_counter -= 2; |
25157 | } |
25158 | RET(8) |
25159 | } |
25160 | |
25161 | // BCC |
25162 | OPCODE(0x6C01) |
25163 | { |
25164 | u32 adr, res; |
25165 | u32 src, dst; |
25166 | |
25167 | if (!((flag_N ^ flag_V) & 0x80)) |
25168 | { |
25169 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25170 | m68kcontext.io_cycle_counter -= 2; |
25171 | } |
25172 | RET(8) |
25173 | } |
25174 | |
25175 | // BCC |
25176 | OPCODE(0x6D01) |
25177 | { |
25178 | u32 adr, res; |
25179 | u32 src, dst; |
25180 | |
25181 | if ((flag_N ^ flag_V) & 0x80) |
25182 | { |
25183 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25184 | m68kcontext.io_cycle_counter -= 2; |
25185 | } |
25186 | RET(8) |
25187 | } |
25188 | |
25189 | // BCC |
25190 | OPCODE(0x6E01) |
25191 | { |
25192 | u32 adr, res; |
25193 | u32 src, dst; |
25194 | |
25195 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25196 | { |
25197 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25198 | m68kcontext.io_cycle_counter -= 2; |
25199 | } |
25200 | RET(8) |
25201 | } |
25202 | |
25203 | // BCC |
25204 | OPCODE(0x6F01) |
25205 | { |
25206 | u32 adr, res; |
25207 | u32 src, dst; |
25208 | |
25209 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25210 | { |
25211 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25212 | m68kcontext.io_cycle_counter -= 2; |
25213 | } |
25214 | RET(8) |
25215 | } |
25216 | |
25217 | // BCC16 |
25218 | OPCODE(0x6200) |
25219 | { |
25220 | u32 adr, res; |
25221 | u32 src, dst; |
25222 | |
25223 | if (flag_NotZ && (!(flag_C & 0x100))) |
25224 | { |
25225 | u32 newPC; |
25226 | |
be26eb23 |
25227 | newPC = GET_PC; |
70357ce5 |
25228 | newPC += GET_SWORD; |
25229 | SET_PC(newPC); |
25230 | CHECK_BRANCH_EXCEPTION(newPC) |
25231 | RET(10) |
25232 | } |
25233 | PC++; |
25234 | RET(12) |
25235 | } |
25236 | |
25237 | // BCC16 |
25238 | OPCODE(0x6300) |
25239 | { |
25240 | u32 adr, res; |
25241 | u32 src, dst; |
25242 | |
25243 | if ((!flag_NotZ) || (flag_C & 0x100)) |
25244 | { |
25245 | u32 newPC; |
25246 | |
be26eb23 |
25247 | newPC = GET_PC; |
70357ce5 |
25248 | newPC += GET_SWORD; |
25249 | SET_PC(newPC); |
25250 | CHECK_BRANCH_EXCEPTION(newPC) |
25251 | RET(10) |
25252 | } |
25253 | PC++; |
25254 | RET(12) |
25255 | } |
25256 | |
25257 | // BCC16 |
25258 | OPCODE(0x6400) |
25259 | { |
25260 | u32 adr, res; |
25261 | u32 src, dst; |
25262 | |
25263 | if (!(flag_C & 0x100)) |
25264 | { |
25265 | u32 newPC; |
25266 | |
be26eb23 |
25267 | newPC = GET_PC; |
70357ce5 |
25268 | newPC += GET_SWORD; |
25269 | SET_PC(newPC); |
25270 | CHECK_BRANCH_EXCEPTION(newPC) |
25271 | RET(10) |
25272 | } |
25273 | PC++; |
25274 | RET(12) |
25275 | } |
25276 | |
25277 | // BCC16 |
25278 | OPCODE(0x6500) |
25279 | { |
25280 | u32 adr, res; |
25281 | u32 src, dst; |
25282 | |
25283 | if (flag_C & 0x100) |
25284 | { |
25285 | u32 newPC; |
25286 | |
be26eb23 |
25287 | newPC = GET_PC; |
70357ce5 |
25288 | newPC += GET_SWORD; |
25289 | SET_PC(newPC); |
25290 | CHECK_BRANCH_EXCEPTION(newPC) |
25291 | RET(10) |
25292 | } |
25293 | PC++; |
25294 | RET(12) |
25295 | } |
25296 | |
25297 | // BCC16 |
25298 | OPCODE(0x6600) |
25299 | { |
25300 | u32 adr, res; |
25301 | u32 src, dst; |
25302 | |
25303 | if (flag_NotZ) |
25304 | { |
25305 | u32 newPC; |
25306 | |
be26eb23 |
25307 | newPC = GET_PC; |
70357ce5 |
25308 | newPC += GET_SWORD; |
25309 | SET_PC(newPC); |
25310 | CHECK_BRANCH_EXCEPTION(newPC) |
25311 | RET(10) |
25312 | } |
25313 | PC++; |
25314 | RET(12) |
25315 | } |
25316 | |
25317 | // BCC16 |
25318 | OPCODE(0x6700) |
25319 | { |
25320 | u32 adr, res; |
25321 | u32 src, dst; |
25322 | |
25323 | if (!flag_NotZ) |
25324 | { |
25325 | u32 newPC; |
25326 | |
be26eb23 |
25327 | newPC = GET_PC; |
70357ce5 |
25328 | newPC += GET_SWORD; |
25329 | SET_PC(newPC); |
25330 | CHECK_BRANCH_EXCEPTION(newPC) |
25331 | RET(10) |
25332 | } |
25333 | PC++; |
25334 | RET(12) |
25335 | } |
25336 | |
25337 | // BCC16 |
25338 | OPCODE(0x6800) |
25339 | { |
25340 | u32 adr, res; |
25341 | u32 src, dst; |
25342 | |
25343 | if (!(flag_V & 0x80)) |
25344 | { |
25345 | u32 newPC; |
25346 | |
be26eb23 |
25347 | newPC = GET_PC; |
70357ce5 |
25348 | newPC += GET_SWORD; |
25349 | SET_PC(newPC); |
25350 | CHECK_BRANCH_EXCEPTION(newPC) |
25351 | RET(10) |
25352 | } |
25353 | PC++; |
25354 | RET(12) |
25355 | } |
25356 | |
25357 | // BCC16 |
25358 | OPCODE(0x6900) |
25359 | { |
25360 | u32 adr, res; |
25361 | u32 src, dst; |
25362 | |
25363 | if (flag_V & 0x80) |
25364 | { |
25365 | u32 newPC; |
25366 | |
be26eb23 |
25367 | newPC = GET_PC; |
70357ce5 |
25368 | newPC += GET_SWORD; |
25369 | SET_PC(newPC); |
25370 | CHECK_BRANCH_EXCEPTION(newPC) |
25371 | RET(10) |
25372 | } |
25373 | PC++; |
25374 | RET(12) |
25375 | } |
25376 | |
25377 | // BCC16 |
25378 | OPCODE(0x6A00) |
25379 | { |
25380 | u32 adr, res; |
25381 | u32 src, dst; |
25382 | |
25383 | if (!(flag_N & 0x80)) |
25384 | { |
25385 | u32 newPC; |
25386 | |
be26eb23 |
25387 | newPC = GET_PC; |
70357ce5 |
25388 | newPC += GET_SWORD; |
25389 | SET_PC(newPC); |
25390 | CHECK_BRANCH_EXCEPTION(newPC) |
25391 | RET(10) |
25392 | } |
25393 | PC++; |
25394 | RET(12) |
25395 | } |
25396 | |
25397 | // BCC16 |
25398 | OPCODE(0x6B00) |
25399 | { |
25400 | u32 adr, res; |
25401 | u32 src, dst; |
25402 | |
25403 | if (flag_N & 0x80) |
25404 | { |
25405 | u32 newPC; |
25406 | |
be26eb23 |
25407 | newPC = GET_PC; |
70357ce5 |
25408 | newPC += GET_SWORD; |
25409 | SET_PC(newPC); |
25410 | CHECK_BRANCH_EXCEPTION(newPC) |
25411 | RET(10) |
25412 | } |
25413 | PC++; |
25414 | RET(12) |
25415 | } |
25416 | |
25417 | // BCC16 |
25418 | OPCODE(0x6C00) |
25419 | { |
25420 | u32 adr, res; |
25421 | u32 src, dst; |
25422 | |
25423 | if (!((flag_N ^ flag_V) & 0x80)) |
25424 | { |
25425 | u32 newPC; |
25426 | |
be26eb23 |
25427 | newPC = GET_PC; |
70357ce5 |
25428 | newPC += GET_SWORD; |
25429 | SET_PC(newPC); |
25430 | CHECK_BRANCH_EXCEPTION(newPC) |
25431 | RET(10) |
25432 | } |
25433 | PC++; |
25434 | RET(12) |
25435 | } |
25436 | |
25437 | // BCC16 |
25438 | OPCODE(0x6D00) |
25439 | { |
25440 | u32 adr, res; |
25441 | u32 src, dst; |
25442 | |
25443 | if ((flag_N ^ flag_V) & 0x80) |
25444 | { |
25445 | u32 newPC; |
25446 | |
be26eb23 |
25447 | newPC = GET_PC; |
70357ce5 |
25448 | newPC += GET_SWORD; |
25449 | SET_PC(newPC); |
25450 | CHECK_BRANCH_EXCEPTION(newPC) |
25451 | RET(10) |
25452 | } |
25453 | PC++; |
25454 | RET(12) |
25455 | } |
25456 | |
25457 | // BCC16 |
25458 | OPCODE(0x6E00) |
25459 | { |
25460 | u32 adr, res; |
25461 | u32 src, dst; |
25462 | |
25463 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25464 | { |
25465 | u32 newPC; |
25466 | |
be26eb23 |
25467 | newPC = GET_PC; |
70357ce5 |
25468 | newPC += GET_SWORD; |
25469 | SET_PC(newPC); |
25470 | CHECK_BRANCH_EXCEPTION(newPC) |
25471 | RET(10) |
25472 | } |
25473 | PC++; |
25474 | RET(12) |
25475 | } |
25476 | |
25477 | // BCC16 |
25478 | OPCODE(0x6F00) |
25479 | { |
25480 | u32 adr, res; |
25481 | u32 src, dst; |
25482 | |
25483 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25484 | { |
25485 | u32 newPC; |
25486 | |
be26eb23 |
25487 | newPC = GET_PC; |
70357ce5 |
25488 | newPC += GET_SWORD; |
25489 | SET_PC(newPC); |
25490 | CHECK_BRANCH_EXCEPTION(newPC) |
25491 | RET(10) |
25492 | } |
25493 | PC++; |
25494 | RET(12) |
25495 | } |
25496 | |
25497 | // BRA |
25498 | OPCODE(0x6001) |
25499 | { |
25500 | #ifdef FAMEC_CHECK_BRANCHES |
be26eb23 |
25501 | u32 newPC = GET_PC; |
70357ce5 |
25502 | s8 offs=Opcode; |
25503 | newPC += offs; |
25504 | SET_PC(newPC); |
25505 | CHECK_BRANCH_EXCEPTION(offs) |
25506 | #else |
25507 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25508 | #endif |
25509 | RET(10) |
25510 | } |
25511 | |
25512 | // BRA16 |
25513 | OPCODE(0x6000) |
25514 | { |
25515 | u32 adr, res; |
25516 | u32 src, dst; |
25517 | |
25518 | { |
25519 | u32 newPC; |
25520 | |
be26eb23 |
25521 | newPC = GET_PC; |
70357ce5 |
25522 | newPC += GET_SWORD; |
25523 | SET_PC(newPC); |
25524 | CHECK_BRANCH_EXCEPTION(newPC) |
25525 | } |
25526 | RET(10) |
25527 | } |
25528 | |
25529 | // BSR |
25530 | OPCODE(0x6101) |
25531 | { |
25532 | u32 adr, res; |
25533 | u32 src, dst; |
25534 | u32 oldPC; |
25535 | s8 offs; |
25536 | |
25537 | PRE_IO |
25538 | |
be26eb23 |
25539 | oldPC = GET_PC; |
70357ce5 |
25540 | PUSH_32_F(oldPC) |
25541 | #ifdef FAMEC_CHECK_BRANCHES |
25542 | offs = Opcode; |
25543 | oldPC += offs; |
25544 | SET_PC(oldPC); |
25545 | CHECK_BRANCH_EXCEPTION(offs) |
25546 | #else |
25547 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25548 | #endif |
25549 | POST_IO |
25550 | RET(18) |
25551 | } |
25552 | |
25553 | // BSR16 |
25554 | OPCODE(0x6100) |
25555 | { |
25556 | u32 adr, res; |
25557 | u32 src, dst; |
25558 | |
25559 | PRE_IO |
25560 | { |
25561 | u32 oldPC, newPC; |
25562 | |
be26eb23 |
25563 | newPC = GET_PC; |
70357ce5 |
25564 | oldPC = newPC + 2; |
25565 | PUSH_32_F(oldPC) |
25566 | newPC += GET_SWORD; |
25567 | SET_PC(newPC); |
25568 | CHECK_BRANCH_EXCEPTION(newPC) |
25569 | } |
25570 | POST_IO |
25571 | RET(18) |
25572 | } |
25573 | |
25574 | // MOVEQ |
25575 | OPCODE(0x7000) |
25576 | { |
25577 | u32 adr, res; |
25578 | u32 src, dst; |
25579 | |
25580 | res = (s32)(s8)Opcode; |
25581 | flag_C = flag_V = 0; |
25582 | flag_N = flag_NotZ = res; |
25583 | DREGu32((Opcode >> 9) & 7) = res; |
25584 | RET(4) |
25585 | } |
25586 | |
25587 | // ORaD |
25588 | OPCODE(0x8000) |
25589 | { |
25590 | u32 adr, res; |
25591 | u32 src, dst; |
25592 | |
25593 | src = DREGu8((Opcode >> 0) & 7); |
25594 | res = DREGu8((Opcode >> 9) & 7); |
25595 | res |= src; |
25596 | flag_C = 0; |
25597 | flag_V = 0; |
25598 | flag_NotZ = res; |
25599 | flag_N = res; |
25600 | DREGu8((Opcode >> 9) & 7) = res; |
25601 | RET(4) |
25602 | } |
25603 | |
25604 | // ORaD |
25605 | OPCODE(0x8010) |
25606 | { |
25607 | u32 adr, res; |
25608 | u32 src, dst; |
25609 | |
25610 | adr = AREG((Opcode >> 0) & 7); |
25611 | PRE_IO |
25612 | READ_BYTE_F(adr, src) |
25613 | res = DREGu8((Opcode >> 9) & 7); |
25614 | res |= src; |
25615 | flag_C = 0; |
25616 | flag_V = 0; |
25617 | flag_NotZ = res; |
25618 | flag_N = res; |
25619 | DREGu8((Opcode >> 9) & 7) = res; |
25620 | POST_IO |
25621 | RET(8) |
25622 | } |
25623 | |
25624 | // ORaD |
25625 | OPCODE(0x8018) |
25626 | { |
25627 | u32 adr, res; |
25628 | u32 src, dst; |
25629 | |
25630 | adr = AREG((Opcode >> 0) & 7); |
25631 | AREG((Opcode >> 0) & 7) += 1; |
25632 | PRE_IO |
25633 | READ_BYTE_F(adr, src) |
25634 | res = DREGu8((Opcode >> 9) & 7); |
25635 | res |= src; |
25636 | flag_C = 0; |
25637 | flag_V = 0; |
25638 | flag_NotZ = res; |
25639 | flag_N = res; |
25640 | DREGu8((Opcode >> 9) & 7) = res; |
25641 | POST_IO |
25642 | RET(8) |
25643 | } |
25644 | |
25645 | // ORaD |
25646 | OPCODE(0x8020) |
25647 | { |
25648 | u32 adr, res; |
25649 | u32 src, dst; |
25650 | |
25651 | adr = AREG((Opcode >> 0) & 7) - 1; |
25652 | AREG((Opcode >> 0) & 7) = adr; |
25653 | PRE_IO |
25654 | READ_BYTE_F(adr, src) |
25655 | res = DREGu8((Opcode >> 9) & 7); |
25656 | res |= src; |
25657 | flag_C = 0; |
25658 | flag_V = 0; |
25659 | flag_NotZ = res; |
25660 | flag_N = res; |
25661 | DREGu8((Opcode >> 9) & 7) = res; |
25662 | POST_IO |
25663 | RET(10) |
25664 | } |
25665 | |
25666 | // ORaD |
25667 | OPCODE(0x8028) |
25668 | { |
25669 | u32 adr, res; |
25670 | u32 src, dst; |
25671 | |
25672 | FETCH_SWORD(adr); |
25673 | adr += AREG((Opcode >> 0) & 7); |
25674 | PRE_IO |
25675 | READ_BYTE_F(adr, src) |
25676 | res = DREGu8((Opcode >> 9) & 7); |
25677 | res |= src; |
25678 | flag_C = 0; |
25679 | flag_V = 0; |
25680 | flag_NotZ = res; |
25681 | flag_N = res; |
25682 | DREGu8((Opcode >> 9) & 7) = res; |
25683 | POST_IO |
25684 | RET(12) |
25685 | } |
25686 | |
25687 | // ORaD |
25688 | OPCODE(0x8030) |
25689 | { |
25690 | u32 adr, res; |
25691 | u32 src, dst; |
25692 | |
25693 | adr = AREG((Opcode >> 0) & 7); |
25694 | DECODE_EXT_WORD |
25695 | PRE_IO |
25696 | READ_BYTE_F(adr, src) |
25697 | res = DREGu8((Opcode >> 9) & 7); |
25698 | res |= src; |
25699 | flag_C = 0; |
25700 | flag_V = 0; |
25701 | flag_NotZ = res; |
25702 | flag_N = res; |
25703 | DREGu8((Opcode >> 9) & 7) = res; |
25704 | POST_IO |
25705 | RET(14) |
25706 | } |
25707 | |
25708 | // ORaD |
25709 | OPCODE(0x8038) |
25710 | { |
25711 | u32 adr, res; |
25712 | u32 src, dst; |
25713 | |
25714 | FETCH_SWORD(adr); |
25715 | PRE_IO |
25716 | READ_BYTE_F(adr, src) |
25717 | res = DREGu8((Opcode >> 9) & 7); |
25718 | res |= src; |
25719 | flag_C = 0; |
25720 | flag_V = 0; |
25721 | flag_NotZ = res; |
25722 | flag_N = res; |
25723 | DREGu8((Opcode >> 9) & 7) = res; |
25724 | POST_IO |
25725 | RET(12) |
25726 | } |
25727 | |
25728 | // ORaD |
25729 | OPCODE(0x8039) |
25730 | { |
25731 | u32 adr, res; |
25732 | u32 src, dst; |
25733 | |
25734 | FETCH_LONG(adr); |
25735 | PRE_IO |
25736 | READ_BYTE_F(adr, src) |
25737 | res = DREGu8((Opcode >> 9) & 7); |
25738 | res |= src; |
25739 | flag_C = 0; |
25740 | flag_V = 0; |
25741 | flag_NotZ = res; |
25742 | flag_N = res; |
25743 | DREGu8((Opcode >> 9) & 7) = res; |
25744 | POST_IO |
25745 | RET(16) |
25746 | } |
25747 | |
25748 | // ORaD |
25749 | OPCODE(0x803A) |
25750 | { |
25751 | u32 adr, res; |
25752 | u32 src, dst; |
25753 | |
be26eb23 |
25754 | adr = GET_SWORD + GET_PC; |
70357ce5 |
25755 | PC++; |
25756 | PRE_IO |
25757 | READ_BYTE_F(adr, src) |
25758 | res = DREGu8((Opcode >> 9) & 7); |
25759 | res |= src; |
25760 | flag_C = 0; |
25761 | flag_V = 0; |
25762 | flag_NotZ = res; |
25763 | flag_N = res; |
25764 | DREGu8((Opcode >> 9) & 7) = res; |
25765 | POST_IO |
25766 | RET(12) |
25767 | } |
25768 | |
25769 | // ORaD |
25770 | OPCODE(0x803B) |
25771 | { |
25772 | u32 adr, res; |
25773 | u32 src, dst; |
25774 | |
be26eb23 |
25775 | adr = GET_PC; |
70357ce5 |
25776 | DECODE_EXT_WORD |
25777 | PRE_IO |
25778 | READ_BYTE_F(adr, src) |
25779 | res = DREGu8((Opcode >> 9) & 7); |
25780 | res |= src; |
25781 | flag_C = 0; |
25782 | flag_V = 0; |
25783 | flag_NotZ = res; |
25784 | flag_N = res; |
25785 | DREGu8((Opcode >> 9) & 7) = res; |
25786 | POST_IO |
25787 | RET(14) |
25788 | } |
25789 | |
25790 | // ORaD |
25791 | OPCODE(0x803C) |
25792 | { |
25793 | u32 adr, res; |
25794 | u32 src, dst; |
25795 | |
25796 | FETCH_BYTE(src); |
25797 | res = DREGu8((Opcode >> 9) & 7); |
25798 | res |= src; |
25799 | flag_C = 0; |
25800 | flag_V = 0; |
25801 | flag_NotZ = res; |
25802 | flag_N = res; |
25803 | DREGu8((Opcode >> 9) & 7) = res; |
25804 | RET(8) |
25805 | } |
25806 | |
25807 | // ORaD |
25808 | OPCODE(0x801F) |
25809 | { |
25810 | u32 adr, res; |
25811 | u32 src, dst; |
25812 | |
25813 | adr = AREG(7); |
25814 | AREG(7) += 2; |
25815 | PRE_IO |
25816 | READ_BYTE_F(adr, src) |
25817 | res = DREGu8((Opcode >> 9) & 7); |
25818 | res |= src; |
25819 | flag_C = 0; |
25820 | flag_V = 0; |
25821 | flag_NotZ = res; |
25822 | flag_N = res; |
25823 | DREGu8((Opcode >> 9) & 7) = res; |
25824 | POST_IO |
25825 | RET(8) |
25826 | } |
25827 | |
25828 | // ORaD |
25829 | OPCODE(0x8027) |
25830 | { |
25831 | u32 adr, res; |
25832 | u32 src, dst; |
25833 | |
25834 | adr = AREG(7) - 2; |
25835 | AREG(7) = adr; |
25836 | PRE_IO |
25837 | READ_BYTE_F(adr, src) |
25838 | res = DREGu8((Opcode >> 9) & 7); |
25839 | res |= src; |
25840 | flag_C = 0; |
25841 | flag_V = 0; |
25842 | flag_NotZ = res; |
25843 | flag_N = res; |
25844 | DREGu8((Opcode >> 9) & 7) = res; |
25845 | POST_IO |
25846 | RET(10) |
25847 | } |
25848 | |
25849 | // ORaD |
25850 | OPCODE(0x8040) |
25851 | { |
25852 | u32 adr, res; |
25853 | u32 src, dst; |
25854 | |
25855 | src = DREGu16((Opcode >> 0) & 7); |
25856 | res = DREGu16((Opcode >> 9) & 7); |
25857 | res |= src; |
25858 | flag_C = 0; |
25859 | flag_V = 0; |
25860 | flag_NotZ = res; |
25861 | flag_N = res >> 8; |
25862 | DREGu16((Opcode >> 9) & 7) = res; |
25863 | RET(4) |
25864 | } |
25865 | |
25866 | // ORaD |
25867 | OPCODE(0x8050) |
25868 | { |
25869 | u32 adr, res; |
25870 | u32 src, dst; |
25871 | |
25872 | adr = AREG((Opcode >> 0) & 7); |
25873 | PRE_IO |
25874 | READ_WORD_F(adr, src) |
25875 | res = DREGu16((Opcode >> 9) & 7); |
25876 | res |= src; |
25877 | flag_C = 0; |
25878 | flag_V = 0; |
25879 | flag_NotZ = res; |
25880 | flag_N = res >> 8; |
25881 | DREGu16((Opcode >> 9) & 7) = res; |
25882 | POST_IO |
25883 | RET(8) |
25884 | } |
25885 | |
25886 | // ORaD |
25887 | OPCODE(0x8058) |
25888 | { |
25889 | u32 adr, res; |
25890 | u32 src, dst; |
25891 | |
25892 | adr = AREG((Opcode >> 0) & 7); |
25893 | AREG((Opcode >> 0) & 7) += 2; |
25894 | PRE_IO |
25895 | READ_WORD_F(adr, src) |
25896 | res = DREGu16((Opcode >> 9) & 7); |
25897 | res |= src; |
25898 | flag_C = 0; |
25899 | flag_V = 0; |
25900 | flag_NotZ = res; |
25901 | flag_N = res >> 8; |
25902 | DREGu16((Opcode >> 9) & 7) = res; |
25903 | POST_IO |
25904 | RET(8) |
25905 | } |
25906 | |
25907 | // ORaD |
25908 | OPCODE(0x8060) |
25909 | { |
25910 | u32 adr, res; |
25911 | u32 src, dst; |
25912 | |
25913 | adr = AREG((Opcode >> 0) & 7) - 2; |
25914 | AREG((Opcode >> 0) & 7) = adr; |
25915 | PRE_IO |
25916 | READ_WORD_F(adr, src) |
25917 | res = DREGu16((Opcode >> 9) & 7); |
25918 | res |= src; |
25919 | flag_C = 0; |
25920 | flag_V = 0; |
25921 | flag_NotZ = res; |
25922 | flag_N = res >> 8; |
25923 | DREGu16((Opcode >> 9) & 7) = res; |
25924 | POST_IO |
25925 | RET(10) |
25926 | } |
25927 | |
25928 | // ORaD |
25929 | OPCODE(0x8068) |
25930 | { |
25931 | u32 adr, res; |
25932 | u32 src, dst; |
25933 | |
25934 | FETCH_SWORD(adr); |
25935 | adr += AREG((Opcode >> 0) & 7); |
25936 | PRE_IO |
25937 | READ_WORD_F(adr, src) |
25938 | res = DREGu16((Opcode >> 9) & 7); |
25939 | res |= src; |
25940 | flag_C = 0; |
25941 | flag_V = 0; |
25942 | flag_NotZ = res; |
25943 | flag_N = res >> 8; |
25944 | DREGu16((Opcode >> 9) & 7) = res; |
25945 | POST_IO |
25946 | RET(12) |
25947 | } |
25948 | |
25949 | // ORaD |
25950 | OPCODE(0x8070) |
25951 | { |
25952 | u32 adr, res; |
25953 | u32 src, dst; |
25954 | |
25955 | adr = AREG((Opcode >> 0) & 7); |
25956 | DECODE_EXT_WORD |
25957 | PRE_IO |
25958 | READ_WORD_F(adr, src) |
25959 | res = DREGu16((Opcode >> 9) & 7); |
25960 | res |= src; |
25961 | flag_C = 0; |
25962 | flag_V = 0; |
25963 | flag_NotZ = res; |
25964 | flag_N = res >> 8; |
25965 | DREGu16((Opcode >> 9) & 7) = res; |
25966 | POST_IO |
25967 | RET(14) |
25968 | } |
25969 | |
25970 | // ORaD |
25971 | OPCODE(0x8078) |
25972 | { |
25973 | u32 adr, res; |
25974 | u32 src, dst; |
25975 | |
25976 | FETCH_SWORD(adr); |
25977 | PRE_IO |
25978 | READ_WORD_F(adr, src) |
25979 | res = DREGu16((Opcode >> 9) & 7); |
25980 | res |= src; |
25981 | flag_C = 0; |
25982 | flag_V = 0; |
25983 | flag_NotZ = res; |
25984 | flag_N = res >> 8; |
25985 | DREGu16((Opcode >> 9) & 7) = res; |
25986 | POST_IO |
25987 | RET(12) |
25988 | } |
25989 | |
25990 | // ORaD |
25991 | OPCODE(0x8079) |
25992 | { |
25993 | u32 adr, res; |
25994 | u32 src, dst; |
25995 | |
25996 | FETCH_LONG(adr); |
25997 | PRE_IO |
25998 | READ_WORD_F(adr, src) |
25999 | res = DREGu16((Opcode >> 9) & 7); |
26000 | res |= src; |
26001 | flag_C = 0; |
26002 | flag_V = 0; |
26003 | flag_NotZ = res; |
26004 | flag_N = res >> 8; |
26005 | DREGu16((Opcode >> 9) & 7) = res; |
26006 | POST_IO |
26007 | RET(16) |
26008 | } |
26009 | |
26010 | // ORaD |
26011 | OPCODE(0x807A) |
26012 | { |
26013 | u32 adr, res; |
26014 | u32 src, dst; |
26015 | |
be26eb23 |
26016 | adr = GET_SWORD + GET_PC; |
70357ce5 |
26017 | PC++; |
26018 | PRE_IO |
26019 | READ_WORD_F(adr, src) |
26020 | res = DREGu16((Opcode >> 9) & 7); |
26021 | res |= src; |
26022 | flag_C = 0; |
26023 | flag_V = 0; |
26024 | flag_NotZ = res; |
26025 | flag_N = res >> 8; |
26026 | DREGu16((Opcode >> 9) & 7) = res; |
26027 | POST_IO |
26028 | RET(12) |
26029 | } |
26030 | |
26031 | // ORaD |
26032 | OPCODE(0x807B) |
26033 | { |
26034 | u32 adr, res; |
26035 | u32 src, dst; |
26036 | |
be26eb23 |
26037 | adr = GET_PC; |
70357ce5 |
26038 | DECODE_EXT_WORD |
26039 | PRE_IO |
26040 | READ_WORD_F(adr, src) |
26041 | res = DREGu16((Opcode >> 9) & 7); |
26042 | res |= src; |
26043 | flag_C = 0; |
26044 | flag_V = 0; |
26045 | flag_NotZ = res; |
26046 | flag_N = res >> 8; |
26047 | DREGu16((Opcode >> 9) & 7) = res; |
26048 | POST_IO |
26049 | RET(14) |
26050 | } |
26051 | |
26052 | // ORaD |
26053 | OPCODE(0x807C) |
26054 | { |
26055 | u32 adr, res; |
26056 | u32 src, dst; |
26057 | |
26058 | FETCH_WORD(src); |
26059 | res = DREGu16((Opcode >> 9) & 7); |
26060 | res |= src; |
26061 | flag_C = 0; |
26062 | flag_V = 0; |
26063 | flag_NotZ = res; |
26064 | flag_N = res >> 8; |
26065 | DREGu16((Opcode >> 9) & 7) = res; |
26066 | RET(8) |
26067 | } |
26068 | |
26069 | // ORaD |
26070 | OPCODE(0x805F) |
26071 | { |
26072 | u32 adr, res; |
26073 | u32 src, dst; |
26074 | |
26075 | adr = AREG(7); |
26076 | AREG(7) += 2; |
26077 | PRE_IO |
26078 | READ_WORD_F(adr, src) |
26079 | res = DREGu16((Opcode >> 9) & 7); |
26080 | res |= src; |
26081 | flag_C = 0; |
26082 | flag_V = 0; |
26083 | flag_NotZ = res; |
26084 | flag_N = res >> 8; |
26085 | DREGu16((Opcode >> 9) & 7) = res; |
26086 | POST_IO |
26087 | RET(8) |
26088 | } |
26089 | |
26090 | // ORaD |
26091 | OPCODE(0x8067) |
26092 | { |
26093 | u32 adr, res; |
26094 | u32 src, dst; |
26095 | |
26096 | adr = AREG(7) - 2; |
26097 | AREG(7) = adr; |
26098 | PRE_IO |
26099 | READ_WORD_F(adr, src) |
26100 | res = DREGu16((Opcode >> 9) & 7); |
26101 | res |= src; |
26102 | flag_C = 0; |
26103 | flag_V = 0; |
26104 | flag_NotZ = res; |
26105 | flag_N = res >> 8; |
26106 | DREGu16((Opcode >> 9) & 7) = res; |
26107 | POST_IO |
26108 | RET(10) |
26109 | } |
26110 | |
26111 | // ORaD |
26112 | OPCODE(0x8080) |
26113 | { |
26114 | u32 adr, res; |
26115 | u32 src, dst; |
26116 | |
26117 | src = DREGu32((Opcode >> 0) & 7); |
26118 | res = DREGu32((Opcode >> 9) & 7); |
26119 | res |= src; |
26120 | flag_C = 0; |
26121 | flag_V = 0; |
26122 | flag_NotZ = res; |
26123 | flag_N = res >> 24; |
26124 | DREGu32((Opcode >> 9) & 7) = res; |
26125 | RET(8) |
26126 | } |
26127 | |
26128 | // ORaD |
26129 | OPCODE(0x8090) |
26130 | { |
26131 | u32 adr, res; |
26132 | u32 src, dst; |
26133 | |
26134 | adr = AREG((Opcode >> 0) & 7); |
26135 | PRE_IO |
26136 | READ_LONG_F(adr, src) |
26137 | res = DREGu32((Opcode >> 9) & 7); |
26138 | res |= src; |
26139 | flag_C = 0; |
26140 | flag_V = 0; |
26141 | flag_NotZ = res; |
26142 | flag_N = res >> 24; |
26143 | DREGu32((Opcode >> 9) & 7) = res; |
26144 | POST_IO |
26145 | RET(14) |
26146 | } |
26147 | |
26148 | // ORaD |
26149 | OPCODE(0x8098) |
26150 | { |
26151 | u32 adr, res; |
26152 | u32 src, dst; |
26153 | |
26154 | adr = AREG((Opcode >> 0) & 7); |
26155 | AREG((Opcode >> 0) & 7) += 4; |
26156 | PRE_IO |
26157 | READ_LONG_F(adr, src) |
26158 | res = DREGu32((Opcode >> 9) & 7); |
26159 | res |= src; |
26160 | flag_C = 0; |
26161 | flag_V = 0; |
26162 | flag_NotZ = res; |
26163 | flag_N = res >> 24; |
26164 | DREGu32((Opcode >> 9) & 7) = res; |
26165 | POST_IO |
26166 | RET(14) |
26167 | } |
26168 | |
26169 | // ORaD |
26170 | OPCODE(0x80A0) |
26171 | { |
26172 | u32 adr, res; |
26173 | u32 src, dst; |
26174 | |
26175 | adr = AREG((Opcode >> 0) & 7) - 4; |
26176 | AREG((Opcode >> 0) & 7) = adr; |
26177 | PRE_IO |
26178 | READ_LONG_F(adr, src) |
26179 | res = DREGu32((Opcode >> 9) & 7); |
26180 | res |= src; |
26181 | flag_C = 0; |
26182 | flag_V = 0; |
26183 | flag_NotZ = res; |
26184 | flag_N = res >> 24; |
26185 | DREGu32((Opcode >> 9) & 7) = res; |
26186 | POST_IO |
26187 | RET(16) |
26188 | } |
26189 | |
26190 | // ORaD |
26191 | OPCODE(0x80A8) |
26192 | { |
26193 | u32 adr, res; |
26194 | u32 src, dst; |
26195 | |
26196 | FETCH_SWORD(adr); |
26197 | adr += AREG((Opcode >> 0) & 7); |
26198 | PRE_IO |
26199 | READ_LONG_F(adr, src) |
26200 | res = DREGu32((Opcode >> 9) & 7); |
26201 | res |= src; |
26202 | flag_C = 0; |
26203 | flag_V = 0; |
26204 | flag_NotZ = res; |
26205 | flag_N = res >> 24; |
26206 | DREGu32((Opcode >> 9) & 7) = res; |
26207 | POST_IO |
26208 | RET(18) |
26209 | } |
26210 | |
26211 | // ORaD |
26212 | OPCODE(0x80B0) |
26213 | { |
26214 | u32 adr, res; |
26215 | u32 src, dst; |
26216 | |
26217 | adr = AREG((Opcode >> 0) & 7); |
26218 | DECODE_EXT_WORD |
26219 | PRE_IO |
26220 | READ_LONG_F(adr, src) |
26221 | res = DREGu32((Opcode >> 9) & 7); |
26222 | res |= src; |
26223 | flag_C = 0; |
26224 | flag_V = 0; |
26225 | flag_NotZ = res; |
26226 | flag_N = res >> 24; |
26227 | DREGu32((Opcode >> 9) & 7) = res; |
26228 | POST_IO |
26229 | RET(20) |
26230 | } |
26231 | |
26232 | // ORaD |
26233 | OPCODE(0x80B8) |
26234 | { |
26235 | u32 adr, res; |
26236 | u32 src, dst; |
26237 | |
26238 | FETCH_SWORD(adr); |
26239 | PRE_IO |
26240 | READ_LONG_F(adr, src) |
26241 | res = DREGu32((Opcode >> 9) & 7); |
26242 | res |= src; |
26243 | flag_C = 0; |
26244 | flag_V = 0; |
26245 | flag_NotZ = res; |
26246 | flag_N = res >> 24; |
26247 | DREGu32((Opcode >> 9) & 7) = res; |
26248 | POST_IO |
26249 | RET(18) |
26250 | } |
26251 | |
26252 | // ORaD |
26253 | OPCODE(0x80B9) |
26254 | { |
26255 | u32 adr, res; |
26256 | u32 src, dst; |
26257 | |
26258 | FETCH_LONG(adr); |
26259 | PRE_IO |
26260 | READ_LONG_F(adr, src) |
26261 | res = DREGu32((Opcode >> 9) & 7); |
26262 | res |= src; |
26263 | flag_C = 0; |
26264 | flag_V = 0; |
26265 | flag_NotZ = res; |
26266 | flag_N = res >> 24; |
26267 | DREGu32((Opcode >> 9) & 7) = res; |
26268 | POST_IO |
26269 | RET(22) |
26270 | } |
26271 | |
26272 | // ORaD |
26273 | OPCODE(0x80BA) |
26274 | { |
26275 | u32 adr, res; |
26276 | u32 src, dst; |
26277 | |
be26eb23 |
26278 | adr = GET_SWORD + GET_PC; |
70357ce5 |
26279 | PC++; |
26280 | PRE_IO |
26281 | READ_LONG_F(adr, src) |
26282 | res = DREGu32((Opcode >> 9) & 7); |
26283 | res |= src; |
26284 | flag_C = 0; |
26285 | flag_V = 0; |
26286 | flag_NotZ = res; |
26287 | flag_N = res >> 24; |
26288 | DREGu32((Opcode >> 9) & 7) = res; |
26289 | POST_IO |
26290 | RET(18) |
26291 | } |
26292 | |
26293 | // ORaD |
26294 | OPCODE(0x80BB) |
26295 | { |
26296 | u32 adr, res; |
26297 | u32 src, dst; |
26298 | |
be26eb23 |
26299 | adr = GET_PC; |
70357ce5 |
26300 | DECODE_EXT_WORD |
26301 | PRE_IO |
26302 | READ_LONG_F(adr, src) |
26303 | res = DREGu32((Opcode >> 9) & 7); |
26304 | res |= src; |
26305 | flag_C = 0; |
26306 | flag_V = 0; |
26307 | flag_NotZ = res; |
26308 | flag_N = res >> 24; |
26309 | DREGu32((Opcode >> 9) & 7) = res; |
26310 | POST_IO |
26311 | RET(20) |
26312 | } |
26313 | |
26314 | // ORaD |
26315 | OPCODE(0x80BC) |
26316 | { |
26317 | u32 adr, res; |
26318 | u32 src, dst; |
26319 | |
26320 | FETCH_LONG(src); |
26321 | res = DREGu32((Opcode >> 9) & 7); |
26322 | res |= src; |
26323 | flag_C = 0; |
26324 | flag_V = 0; |
26325 | flag_NotZ = res; |
26326 | flag_N = res >> 24; |
26327 | DREGu32((Opcode >> 9) & 7) = res; |
26328 | RET(16) |
26329 | } |
26330 | |
26331 | // ORaD |
26332 | OPCODE(0x809F) |
26333 | { |
26334 | u32 adr, res; |
26335 | u32 src, dst; |
26336 | |
26337 | adr = AREG(7); |
26338 | AREG(7) += 4; |
26339 | PRE_IO |
26340 | READ_LONG_F(adr, src) |
26341 | res = DREGu32((Opcode >> 9) & 7); |
26342 | res |= src; |
26343 | flag_C = 0; |
26344 | flag_V = 0; |
26345 | flag_NotZ = res; |
26346 | flag_N = res >> 24; |
26347 | DREGu32((Opcode >> 9) & 7) = res; |
26348 | POST_IO |
26349 | RET(14) |
26350 | } |
26351 | |
26352 | // ORaD |
26353 | OPCODE(0x80A7) |
26354 | { |
26355 | u32 adr, res; |
26356 | u32 src, dst; |
26357 | |
26358 | adr = AREG(7) - 4; |
26359 | AREG(7) = adr; |
26360 | PRE_IO |
26361 | READ_LONG_F(adr, src) |
26362 | res = DREGu32((Opcode >> 9) & 7); |
26363 | res |= src; |
26364 | flag_C = 0; |
26365 | flag_V = 0; |
26366 | flag_NotZ = res; |
26367 | flag_N = res >> 24; |
26368 | DREGu32((Opcode >> 9) & 7) = res; |
26369 | POST_IO |
26370 | RET(16) |
26371 | } |
26372 | |
26373 | // ORDa |
26374 | OPCODE(0x8110) |
26375 | { |
26376 | u32 adr, res; |
26377 | u32 src, dst; |
26378 | |
26379 | src = DREGu8((Opcode >> 9) & 7); |
26380 | adr = AREG((Opcode >> 0) & 7); |
26381 | PRE_IO |
26382 | READ_BYTE_F(adr, res) |
26383 | res |= src; |
26384 | flag_C = 0; |
26385 | flag_V = 0; |
26386 | flag_NotZ = res; |
26387 | flag_N = res; |
26388 | WRITE_BYTE_F(adr, res) |
26389 | POST_IO |
26390 | RET(12) |
26391 | } |
26392 | |
26393 | // ORDa |
26394 | OPCODE(0x8118) |
26395 | { |
26396 | u32 adr, res; |
26397 | u32 src, dst; |
26398 | |
26399 | src = DREGu8((Opcode >> 9) & 7); |
26400 | adr = AREG((Opcode >> 0) & 7); |
26401 | AREG((Opcode >> 0) & 7) += 1; |
26402 | PRE_IO |
26403 | READ_BYTE_F(adr, res) |
26404 | res |= src; |
26405 | flag_C = 0; |
26406 | flag_V = 0; |
26407 | flag_NotZ = res; |
26408 | flag_N = res; |
26409 | WRITE_BYTE_F(adr, res) |
26410 | POST_IO |
26411 | RET(12) |
26412 | } |
26413 | |
26414 | // ORDa |
26415 | OPCODE(0x8120) |
26416 | { |
26417 | u32 adr, res; |
26418 | u32 src, dst; |
26419 | |
26420 | src = DREGu8((Opcode >> 9) & 7); |
26421 | adr = AREG((Opcode >> 0) & 7) - 1; |
26422 | AREG((Opcode >> 0) & 7) = adr; |
26423 | PRE_IO |
26424 | READ_BYTE_F(adr, res) |
26425 | res |= src; |
26426 | flag_C = 0; |
26427 | flag_V = 0; |
26428 | flag_NotZ = res; |
26429 | flag_N = res; |
26430 | WRITE_BYTE_F(adr, res) |
26431 | POST_IO |
26432 | RET(14) |
26433 | } |
26434 | |
26435 | // ORDa |
26436 | OPCODE(0x8128) |
26437 | { |
26438 | u32 adr, res; |
26439 | u32 src, dst; |
26440 | |
26441 | src = DREGu8((Opcode >> 9) & 7); |
26442 | FETCH_SWORD(adr); |
26443 | adr += AREG((Opcode >> 0) & 7); |
26444 | PRE_IO |
26445 | READ_BYTE_F(adr, res) |
26446 | res |= src; |
26447 | flag_C = 0; |
26448 | flag_V = 0; |
26449 | flag_NotZ = res; |
26450 | flag_N = res; |
26451 | WRITE_BYTE_F(adr, res) |
26452 | POST_IO |
26453 | RET(16) |
26454 | } |
26455 | |
26456 | // ORDa |
26457 | OPCODE(0x8130) |
26458 | { |
26459 | u32 adr, res; |
26460 | u32 src, dst; |
26461 | |
26462 | src = DREGu8((Opcode >> 9) & 7); |
26463 | adr = AREG((Opcode >> 0) & 7); |
26464 | DECODE_EXT_WORD |
26465 | PRE_IO |
26466 | READ_BYTE_F(adr, res) |
26467 | res |= src; |
26468 | flag_C = 0; |
26469 | flag_V = 0; |
26470 | flag_NotZ = res; |
26471 | flag_N = res; |
26472 | WRITE_BYTE_F(adr, res) |
26473 | POST_IO |
26474 | RET(18) |
26475 | } |
26476 | |
26477 | // ORDa |
26478 | OPCODE(0x8138) |
26479 | { |
26480 | u32 adr, res; |
26481 | u32 src, dst; |
26482 | |
26483 | src = DREGu8((Opcode >> 9) & 7); |
26484 | FETCH_SWORD(adr); |
26485 | PRE_IO |
26486 | READ_BYTE_F(adr, res) |
26487 | res |= src; |
26488 | flag_C = 0; |
26489 | flag_V = 0; |
26490 | flag_NotZ = res; |
26491 | flag_N = res; |
26492 | WRITE_BYTE_F(adr, res) |
26493 | POST_IO |
26494 | RET(16) |
26495 | } |
26496 | |
26497 | // ORDa |
26498 | OPCODE(0x8139) |
26499 | { |
26500 | u32 adr, res; |
26501 | u32 src, dst; |
26502 | |
26503 | src = DREGu8((Opcode >> 9) & 7); |
26504 | FETCH_LONG(adr); |
26505 | PRE_IO |
26506 | READ_BYTE_F(adr, res) |
26507 | res |= src; |
26508 | flag_C = 0; |
26509 | flag_V = 0; |
26510 | flag_NotZ = res; |
26511 | flag_N = res; |
26512 | WRITE_BYTE_F(adr, res) |
26513 | POST_IO |
26514 | RET(20) |
26515 | } |
26516 | |
26517 | // ORDa |
26518 | OPCODE(0x811F) |
26519 | { |
26520 | u32 adr, res; |
26521 | u32 src, dst; |
26522 | |
26523 | src = DREGu8((Opcode >> 9) & 7); |
26524 | adr = AREG(7); |
26525 | AREG(7) += 2; |
26526 | PRE_IO |
26527 | READ_BYTE_F(adr, res) |
26528 | res |= src; |
26529 | flag_C = 0; |
26530 | flag_V = 0; |
26531 | flag_NotZ = res; |
26532 | flag_N = res; |
26533 | WRITE_BYTE_F(adr, res) |
26534 | POST_IO |
26535 | RET(12) |
26536 | } |
26537 | |
26538 | // ORDa |
26539 | OPCODE(0x8127) |
26540 | { |
26541 | u32 adr, res; |
26542 | u32 src, dst; |
26543 | |
26544 | src = DREGu8((Opcode >> 9) & 7); |
26545 | adr = AREG(7) - 2; |
26546 | AREG(7) = adr; |
26547 | PRE_IO |
26548 | READ_BYTE_F(adr, res) |
26549 | res |= src; |
26550 | flag_C = 0; |
26551 | flag_V = 0; |
26552 | flag_NotZ = res; |
26553 | flag_N = res; |
26554 | WRITE_BYTE_F(adr, res) |
26555 | POST_IO |
26556 | RET(14) |
26557 | } |
26558 | |
26559 | // ORDa |
26560 | OPCODE(0x8150) |
26561 | { |
26562 | u32 adr, res; |
26563 | u32 src, dst; |
26564 | |
26565 | src = DREGu16((Opcode >> 9) & 7); |
26566 | adr = AREG((Opcode >> 0) & 7); |
26567 | PRE_IO |
26568 | READ_WORD_F(adr, res) |
26569 | res |= src; |
26570 | flag_C = 0; |
26571 | flag_V = 0; |
26572 | flag_NotZ = res; |
26573 | flag_N = res >> 8; |
26574 | WRITE_WORD_F(adr, res) |
26575 | POST_IO |
26576 | RET(12) |
26577 | } |
26578 | |
26579 | // ORDa |
26580 | OPCODE(0x8158) |
26581 | { |
26582 | u32 adr, res; |
26583 | u32 src, dst; |
26584 | |
26585 | src = DREGu16((Opcode >> 9) & 7); |
26586 | adr = AREG((Opcode >> 0) & 7); |
26587 | AREG((Opcode >> 0) & 7) += 2; |
26588 | PRE_IO |
26589 | READ_WORD_F(adr, res) |
26590 | res |= src; |
26591 | flag_C = 0; |
26592 | flag_V = 0; |
26593 | flag_NotZ = res; |
26594 | flag_N = res >> 8; |
26595 | WRITE_WORD_F(adr, res) |
26596 | POST_IO |
26597 | RET(12) |
26598 | } |
26599 | |
26600 | // ORDa |
26601 | OPCODE(0x8160) |
26602 | { |
26603 | u32 adr, res; |
26604 | u32 src, dst; |
26605 | |
26606 | src = DREGu16((Opcode >> 9) & 7); |
26607 | adr = AREG((Opcode >> 0) & 7) - 2; |
26608 | AREG((Opcode >> 0) & 7) = adr; |
26609 | PRE_IO |
26610 | READ_WORD_F(adr, res) |
26611 | res |= src; |
26612 | flag_C = 0; |
26613 | flag_V = 0; |
26614 | flag_NotZ = res; |
26615 | flag_N = res >> 8; |
26616 | WRITE_WORD_F(adr, res) |
26617 | POST_IO |
26618 | RET(14) |
26619 | } |
26620 | |
26621 | // ORDa |
26622 | OPCODE(0x8168) |
26623 | { |
26624 | u32 adr, res; |
26625 | u32 src, dst; |
26626 | |
26627 | src = DREGu16((Opcode >> 9) & 7); |
26628 | FETCH_SWORD(adr); |
26629 | adr += AREG((Opcode >> 0) & 7); |
26630 | PRE_IO |
26631 | READ_WORD_F(adr, res) |
26632 | res |= src; |
26633 | flag_C = 0; |
26634 | flag_V = 0; |
26635 | flag_NotZ = res; |
26636 | flag_N = res >> 8; |
26637 | WRITE_WORD_F(adr, res) |
26638 | POST_IO |
26639 | RET(16) |
26640 | } |
26641 | |
26642 | // ORDa |
26643 | OPCODE(0x8170) |
26644 | { |
26645 | u32 adr, res; |
26646 | u32 src, dst; |
26647 | |
26648 | src = DREGu16((Opcode >> 9) & 7); |
26649 | adr = AREG((Opcode >> 0) & 7); |
26650 | DECODE_EXT_WORD |
26651 | PRE_IO |
26652 | READ_WORD_F(adr, res) |
26653 | res |= src; |
26654 | flag_C = 0; |
26655 | flag_V = 0; |
26656 | flag_NotZ = res; |
26657 | flag_N = res >> 8; |
26658 | WRITE_WORD_F(adr, res) |
26659 | POST_IO |
26660 | RET(18) |
26661 | } |
26662 | |
26663 | // ORDa |
26664 | OPCODE(0x8178) |
26665 | { |
26666 | u32 adr, res; |
26667 | u32 src, dst; |
26668 | |
26669 | src = DREGu16((Opcode >> 9) & 7); |
26670 | FETCH_SWORD(adr); |
26671 | PRE_IO |
26672 | READ_WORD_F(adr, res) |
26673 | res |= src; |
26674 | flag_C = 0; |
26675 | flag_V = 0; |
26676 | flag_NotZ = res; |
26677 | flag_N = res >> 8; |
26678 | WRITE_WORD_F(adr, res) |
26679 | POST_IO |
26680 | RET(16) |
26681 | } |
26682 | |
26683 | // ORDa |
26684 | OPCODE(0x8179) |
26685 | { |
26686 | u32 adr, res; |
26687 | u32 src, dst; |
26688 | |
26689 | src = DREGu16((Opcode >> 9) & 7); |
26690 | FETCH_LONG(adr); |
26691 | PRE_IO |
26692 | READ_WORD_F(adr, res) |
26693 | res |= src; |
26694 | flag_C = 0; |
26695 | flag_V = 0; |
26696 | flag_NotZ = res; |
26697 | flag_N = res >> 8; |
26698 | WRITE_WORD_F(adr, res) |
26699 | POST_IO |
26700 | RET(20) |
26701 | } |
26702 | |
26703 | // ORDa |
26704 | OPCODE(0x815F) |
26705 | { |
26706 | u32 adr, res; |
26707 | u32 src, dst; |
26708 | |
26709 | src = DREGu16((Opcode >> 9) & 7); |
26710 | adr = AREG(7); |
26711 | AREG(7) += 2; |
26712 | PRE_IO |
26713 | READ_WORD_F(adr, res) |
26714 | res |= src; |
26715 | flag_C = 0; |
26716 | flag_V = 0; |
26717 | flag_NotZ = res; |
26718 | flag_N = res >> 8; |
26719 | WRITE_WORD_F(adr, res) |
26720 | POST_IO |
26721 | RET(12) |
26722 | } |
26723 | |
26724 | // ORDa |
26725 | OPCODE(0x8167) |
26726 | { |
26727 | u32 adr, res; |
26728 | u32 src, dst; |
26729 | |
26730 | src = DREGu16((Opcode >> 9) & 7); |
26731 | adr = AREG(7) - 2; |
26732 | AREG(7) = adr; |
26733 | PRE_IO |
26734 | READ_WORD_F(adr, res) |
26735 | res |= src; |
26736 | flag_C = 0; |
26737 | flag_V = 0; |
26738 | flag_NotZ = res; |
26739 | flag_N = res >> 8; |
26740 | WRITE_WORD_F(adr, res) |
26741 | POST_IO |
26742 | RET(14) |
26743 | } |
26744 | |
26745 | // ORDa |
26746 | OPCODE(0x8190) |
26747 | { |
26748 | u32 adr, res; |
26749 | u32 src, dst; |
26750 | |
26751 | src = DREGu32((Opcode >> 9) & 7); |
26752 | adr = AREG((Opcode >> 0) & 7); |
26753 | PRE_IO |
26754 | READ_LONG_F(adr, res) |
26755 | res |= src; |
26756 | flag_C = 0; |
26757 | flag_V = 0; |
26758 | flag_NotZ = res; |
26759 | flag_N = res >> 24; |
26760 | WRITE_LONG_F(adr, res) |
26761 | POST_IO |
26762 | RET(20) |
26763 | } |
26764 | |
26765 | // ORDa |
26766 | OPCODE(0x8198) |
26767 | { |
26768 | u32 adr, res; |
26769 | u32 src, dst; |
26770 | |
26771 | src = DREGu32((Opcode >> 9) & 7); |
26772 | adr = AREG((Opcode >> 0) & 7); |
26773 | AREG((Opcode >> 0) & 7) += 4; |
26774 | PRE_IO |
26775 | READ_LONG_F(adr, res) |
26776 | res |= src; |
26777 | flag_C = 0; |
26778 | flag_V = 0; |
26779 | flag_NotZ = res; |
26780 | flag_N = res >> 24; |
26781 | WRITE_LONG_F(adr, res) |
26782 | POST_IO |
26783 | RET(20) |
26784 | } |
26785 | |
26786 | // ORDa |
26787 | OPCODE(0x81A0) |
26788 | { |
26789 | u32 adr, res; |
26790 | u32 src, dst; |
26791 | |
26792 | src = DREGu32((Opcode >> 9) & 7); |
26793 | adr = AREG((Opcode >> 0) & 7) - 4; |
26794 | AREG((Opcode >> 0) & 7) = adr; |
26795 | PRE_IO |
26796 | READ_LONG_F(adr, res) |
26797 | res |= src; |
26798 | flag_C = 0; |
26799 | flag_V = 0; |
26800 | flag_NotZ = res; |
26801 | flag_N = res >> 24; |
26802 | WRITE_LONG_F(adr, res) |
26803 | POST_IO |
26804 | RET(22) |
26805 | } |
26806 | |
26807 | // ORDa |
26808 | OPCODE(0x81A8) |
26809 | { |
26810 | u32 adr, res; |
26811 | u32 src, dst; |
26812 | |
26813 | src = DREGu32((Opcode >> 9) & 7); |
26814 | FETCH_SWORD(adr); |
26815 | adr += AREG((Opcode >> 0) & 7); |
26816 | PRE_IO |
26817 | READ_LONG_F(adr, res) |
26818 | res |= src; |
26819 | flag_C = 0; |
26820 | flag_V = 0; |
26821 | flag_NotZ = res; |
26822 | flag_N = res >> 24; |
26823 | WRITE_LONG_F(adr, res) |
26824 | POST_IO |
26825 | RET(24) |
26826 | } |
26827 | |
26828 | // ORDa |
26829 | OPCODE(0x81B0) |
26830 | { |
26831 | u32 adr, res; |
26832 | u32 src, dst; |
26833 | |
26834 | src = DREGu32((Opcode >> 9) & 7); |
26835 | adr = AREG((Opcode >> 0) & 7); |
26836 | DECODE_EXT_WORD |
26837 | PRE_IO |
26838 | READ_LONG_F(adr, res) |
26839 | res |= src; |
26840 | flag_C = 0; |
26841 | flag_V = 0; |
26842 | flag_NotZ = res; |
26843 | flag_N = res >> 24; |
26844 | WRITE_LONG_F(adr, res) |
26845 | POST_IO |
26846 | RET(26) |
26847 | } |
26848 | |
26849 | // ORDa |
26850 | OPCODE(0x81B8) |
26851 | { |
26852 | u32 adr, res; |
26853 | u32 src, dst; |
26854 | |
26855 | src = DREGu32((Opcode >> 9) & 7); |
26856 | FETCH_SWORD(adr); |
26857 | PRE_IO |
26858 | READ_LONG_F(adr, res) |
26859 | res |= src; |
26860 | flag_C = 0; |
26861 | flag_V = 0; |
26862 | flag_NotZ = res; |
26863 | flag_N = res >> 24; |
26864 | WRITE_LONG_F(adr, res) |
26865 | POST_IO |
26866 | RET(24) |
26867 | } |
26868 | |
26869 | // ORDa |
26870 | OPCODE(0x81B9) |
26871 | { |
26872 | u32 adr, res; |
26873 | u32 src, dst; |
26874 | |
26875 | src = DREGu32((Opcode >> 9) & 7); |
26876 | FETCH_LONG(adr); |
26877 | PRE_IO |
26878 | READ_LONG_F(adr, res) |
26879 | res |= src; |
26880 | flag_C = 0; |
26881 | flag_V = 0; |
26882 | flag_NotZ = res; |
26883 | flag_N = res >> 24; |
26884 | WRITE_LONG_F(adr, res) |
26885 | POST_IO |
26886 | RET(28) |
26887 | } |
26888 | |
26889 | // ORDa |
26890 | OPCODE(0x819F) |
26891 | { |
26892 | u32 adr, res; |
26893 | u32 src, dst; |
26894 | |
26895 | src = DREGu32((Opcode >> 9) & 7); |
26896 | adr = AREG(7); |
26897 | AREG(7) += 4; |
26898 | PRE_IO |
26899 | READ_LONG_F(adr, res) |
26900 | res |= src; |
26901 | flag_C = 0; |
26902 | flag_V = 0; |
26903 | flag_NotZ = res; |
26904 | flag_N = res >> 24; |
26905 | WRITE_LONG_F(adr, res) |
26906 | POST_IO |
26907 | RET(20) |
26908 | } |
26909 | |
26910 | // ORDa |
26911 | OPCODE(0x81A7) |
26912 | { |
26913 | u32 adr, res; |
26914 | u32 src, dst; |
26915 | |
26916 | src = DREGu32((Opcode >> 9) & 7); |
26917 | adr = AREG(7) - 4; |
26918 | AREG(7) = adr; |
26919 | PRE_IO |
26920 | READ_LONG_F(adr, res) |
26921 | res |= src; |
26922 | flag_C = 0; |
26923 | flag_V = 0; |
26924 | flag_NotZ = res; |
26925 | flag_N = res >> 24; |
26926 | WRITE_LONG_F(adr, res) |
26927 | POST_IO |
26928 | RET(22) |
26929 | } |
26930 | |
26931 | // SBCD |
26932 | OPCODE(0x8100) |
26933 | { |
26934 | u32 adr, res; |
26935 | u32 src, dst; |
26936 | |
26937 | src = DREGu8((Opcode >> 0) & 7); |
26938 | dst = DREGu8((Opcode >> 9) & 7); |
26939 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26940 | if (res > 9) res -= 6; |
26941 | res += (dst & 0xF0) - (src & 0xF0); |
26942 | if (res > 0x99) |
26943 | { |
26944 | res += 0xA0; |
26945 | flag_X = flag_C = M68K_SR_C; |
26946 | } |
26947 | else flag_X = flag_C = 0; |
26948 | flag_NotZ |= res & 0xFF; |
26949 | flag_N = res; |
26950 | DREGu8((Opcode >> 9) & 7) = res; |
26951 | RET(6) |
26952 | } |
26953 | |
26954 | // SBCDM |
26955 | OPCODE(0x8108) |
26956 | { |
26957 | u32 adr, res; |
26958 | u32 src, dst; |
26959 | |
26960 | adr = AREG((Opcode >> 0) & 7) - 1; |
26961 | AREG((Opcode >> 0) & 7) = adr; |
26962 | PRE_IO |
26963 | READ_BYTE_F(adr, src) |
26964 | adr = AREG((Opcode >> 9) & 7) - 1; |
26965 | AREG((Opcode >> 9) & 7) = adr; |
26966 | READ_BYTE_F(adr, dst) |
26967 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26968 | if (res > 9) res -= 6; |
26969 | res += (dst & 0xF0) - (src & 0xF0); |
26970 | if (res > 0x99) |
26971 | { |
26972 | res += 0xA0; |
26973 | flag_X = flag_C = M68K_SR_C; |
26974 | } |
26975 | else flag_X = flag_C = 0; |
26976 | flag_NotZ |= res & 0xFF; |
26977 | flag_N = res; |
26978 | WRITE_BYTE_F(adr, res) |
26979 | POST_IO |
26980 | RET(18) |
26981 | } |
26982 | |
26983 | // SBCD7M |
26984 | OPCODE(0x810F) |
26985 | { |
26986 | u32 adr, res; |
26987 | u32 src, dst; |
26988 | |
26989 | adr = AREG(7) - 2; |
26990 | AREG(7) = adr; |
26991 | PRE_IO |
26992 | READ_BYTE_F(adr, src) |
26993 | adr = AREG((Opcode >> 9) & 7) - 1; |
26994 | AREG((Opcode >> 9) & 7) = adr; |
26995 | READ_BYTE_F(adr, dst) |
26996 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26997 | if (res > 9) res -= 6; |
26998 | res += (dst & 0xF0) - (src & 0xF0); |
26999 | if (res > 0x99) |
27000 | { |
27001 | res += 0xA0; |
27002 | flag_X = flag_C = M68K_SR_C; |
27003 | } |
27004 | else flag_X = flag_C = 0; |
27005 | flag_NotZ |= res & 0xFF; |
27006 | flag_N = res; |
27007 | WRITE_BYTE_F(adr, res) |
27008 | POST_IO |
27009 | RET(18) |
27010 | } |
27011 | |
27012 | // SBCDM7 |
27013 | OPCODE(0x8F08) |
27014 | { |
27015 | u32 adr, res; |
27016 | u32 src, dst; |
27017 | |
27018 | adr = AREG((Opcode >> 0) & 7) - 1; |
27019 | AREG((Opcode >> 0) & 7) = adr; |
27020 | PRE_IO |
27021 | READ_BYTE_F(adr, src) |
27022 | adr = AREG(7) - 2; |
27023 | AREG(7) = adr; |
27024 | READ_BYTE_F(adr, dst) |
27025 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
27026 | if (res > 9) res -= 6; |
27027 | res += (dst & 0xF0) - (src & 0xF0); |
27028 | if (res > 0x99) |
27029 | { |
27030 | res += 0xA0; |
27031 | flag_X = flag_C = M68K_SR_C; |
27032 | } |
27033 | else flag_X = flag_C = 0; |
27034 | flag_NotZ |= res & 0xFF; |
27035 | flag_N = res; |
27036 | WRITE_BYTE_F(adr, res) |
27037 | POST_IO |
27038 | RET(18) |
27039 | } |
27040 | |
27041 | // SBCD7M7 |
27042 | OPCODE(0x8F0F) |
27043 | { |
27044 | u32 adr, res; |
27045 | u32 src, dst; |
27046 | |
27047 | adr = AREG(7) - 2; |
27048 | AREG(7) = adr; |
27049 | PRE_IO |
27050 | READ_BYTE_F(adr, src) |
27051 | adr = AREG(7) - 2; |
27052 | AREG(7) = adr; |
27053 | READ_BYTE_F(adr, dst) |
27054 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
27055 | if (res > 9) res -= 6; |
27056 | res += (dst & 0xF0) - (src & 0xF0); |
27057 | if (res > 0x99) |
27058 | { |
27059 | res += 0xA0; |
27060 | flag_X = flag_C = M68K_SR_C; |
27061 | } |
27062 | else flag_X = flag_C = 0; |
27063 | flag_NotZ |= res & 0xFF; |
27064 | flag_N = res; |
27065 | WRITE_BYTE_F(adr, res) |
27066 | POST_IO |
27067 | RET(18) |
27068 | } |
27069 | |
27070 | // DIVU |
27071 | OPCODE(0x80C0) |
27072 | { |
27073 | u32 adr, res; |
27074 | u32 src, dst; |
27075 | |
27076 | src = DREGu16((Opcode >> 0) & 7); |
27077 | if (src == 0) |
27078 | { |
d0ae0cb4 |
27079 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27080 | #ifdef USE_CYCLONE_TIMING_DIV |
27081 | RET(140) |
27082 | #else |
27083 | RET(10) |
27084 | #endif |
27085 | } |
27086 | dst = DREGu32((Opcode >> 9) & 7); |
27087 | { |
27088 | u32 q, r; |
27089 | |
27090 | q = dst / src; |
27091 | r = dst % src; |
27092 | |
27093 | if (q & 0xFFFF0000) |
27094 | { |
27095 | flag_V = M68K_SR_V; |
27096 | #ifdef USE_CYCLONE_TIMING_DIV |
27097 | RET(140) |
27098 | #else |
27099 | RET(70) |
27100 | #endif |
27101 | } |
27102 | q &= 0x0000FFFF; |
27103 | flag_NotZ = q; |
27104 | flag_N = q >> 8; |
27105 | flag_V = flag_C = 0; |
27106 | res = q | (r << 16); |
27107 | DREGu32((Opcode >> 9) & 7) = res; |
27108 | } |
27109 | #ifdef USE_CYCLONE_TIMING_DIV |
27110 | RET(140) |
27111 | #else |
27112 | RET(90) |
27113 | #endif |
27114 | } |
27115 | |
27116 | // DIVU |
27117 | OPCODE(0x80D0) |
27118 | { |
27119 | u32 adr, res; |
27120 | u32 src, dst; |
27121 | |
27122 | adr = AREG((Opcode >> 0) & 7); |
27123 | PRE_IO |
27124 | READ_WORD_F(adr, src) |
27125 | if (src == 0) |
27126 | { |
d0ae0cb4 |
27127 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27128 | #ifdef USE_CYCLONE_TIMING_DIV |
27129 | RET(144) |
27130 | #else |
27131 | RET(14) |
27132 | #endif |
27133 | } |
27134 | dst = DREGu32((Opcode >> 9) & 7); |
27135 | { |
27136 | u32 q, r; |
27137 | |
27138 | q = dst / src; |
27139 | r = dst % src; |
27140 | |
27141 | if (q & 0xFFFF0000) |
27142 | { |
27143 | flag_V = M68K_SR_V; |
27144 | #ifdef USE_CYCLONE_TIMING_DIV |
27145 | RET(144) |
27146 | #else |
27147 | RET(74) |
27148 | #endif |
27149 | } |
27150 | q &= 0x0000FFFF; |
27151 | flag_NotZ = q; |
27152 | flag_N = q >> 8; |
27153 | flag_V = flag_C = 0; |
27154 | res = q | (r << 16); |
27155 | DREGu32((Opcode >> 9) & 7) = res; |
27156 | } |
27157 | #ifdef USE_CYCLONE_TIMING_DIV |
27158 | RET(144) |
27159 | #else |
27160 | RET(94) |
27161 | #endif |
27162 | } |
27163 | |
27164 | // DIVU |
27165 | OPCODE(0x80D8) |
27166 | { |
27167 | u32 adr, res; |
27168 | u32 src, dst; |
27169 | |
27170 | adr = AREG((Opcode >> 0) & 7); |
27171 | AREG((Opcode >> 0) & 7) += 2; |
27172 | PRE_IO |
27173 | READ_WORD_F(adr, src) |
27174 | if (src == 0) |
27175 | { |
d0ae0cb4 |
27176 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27177 | #ifdef USE_CYCLONE_TIMING_DIV |
27178 | RET(144) |
27179 | #else |
27180 | RET(14) |
27181 | #endif |
27182 | } |
27183 | dst = DREGu32((Opcode >> 9) & 7); |
27184 | { |
27185 | u32 q, r; |
27186 | |
27187 | q = dst / src; |
27188 | r = dst % src; |
27189 | |
27190 | if (q & 0xFFFF0000) |
27191 | { |
27192 | flag_V = M68K_SR_V; |
27193 | #ifdef USE_CYCLONE_TIMING_DIV |
27194 | RET(144) |
27195 | #else |
27196 | RET(74) |
27197 | #endif |
27198 | } |
27199 | q &= 0x0000FFFF; |
27200 | flag_NotZ = q; |
27201 | flag_N = q >> 8; |
27202 | flag_V = flag_C = 0; |
27203 | res = q | (r << 16); |
27204 | DREGu32((Opcode >> 9) & 7) = res; |
27205 | } |
27206 | #ifdef USE_CYCLONE_TIMING_DIV |
27207 | RET(144) |
27208 | #else |
27209 | RET(94) |
27210 | #endif |
27211 | } |
27212 | |
27213 | // DIVU |
27214 | OPCODE(0x80E0) |
27215 | { |
27216 | u32 adr, res; |
27217 | u32 src, dst; |
27218 | |
27219 | adr = AREG((Opcode >> 0) & 7) - 2; |
27220 | AREG((Opcode >> 0) & 7) = adr; |
27221 | PRE_IO |
27222 | READ_WORD_F(adr, src) |
27223 | if (src == 0) |
27224 | { |
d0ae0cb4 |
27225 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27226 | #ifdef USE_CYCLONE_TIMING_DIV |
27227 | RET(146) |
27228 | #else |
27229 | RET(16) |
27230 | #endif |
27231 | } |
27232 | dst = DREGu32((Opcode >> 9) & 7); |
27233 | { |
27234 | u32 q, r; |
27235 | |
27236 | q = dst / src; |
27237 | r = dst % src; |
27238 | |
27239 | if (q & 0xFFFF0000) |
27240 | { |
27241 | flag_V = M68K_SR_V; |
27242 | #ifdef USE_CYCLONE_TIMING_DIV |
27243 | RET(146) |
27244 | #else |
27245 | RET(76) |
27246 | #endif |
27247 | } |
27248 | q &= 0x0000FFFF; |
27249 | flag_NotZ = q; |
27250 | flag_N = q >> 8; |
27251 | flag_V = flag_C = 0; |
27252 | res = q | (r << 16); |
27253 | DREGu32((Opcode >> 9) & 7) = res; |
27254 | } |
27255 | #ifdef USE_CYCLONE_TIMING_DIV |
27256 | RET(146) |
27257 | #else |
27258 | RET(96) |
27259 | #endif |
27260 | } |
27261 | |
27262 | // DIVU |
27263 | OPCODE(0x80E8) |
27264 | { |
27265 | u32 adr, res; |
27266 | u32 src, dst; |
27267 | |
27268 | FETCH_SWORD(adr); |
27269 | adr += AREG((Opcode >> 0) & 7); |
27270 | PRE_IO |
27271 | READ_WORD_F(adr, src) |
27272 | if (src == 0) |
27273 | { |
d0ae0cb4 |
27274 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27275 | #ifdef USE_CYCLONE_TIMING_DIV |
27276 | RET(148) |
27277 | #else |
27278 | RET(18) |
27279 | #endif |
27280 | } |
27281 | dst = DREGu32((Opcode >> 9) & 7); |
27282 | { |
27283 | u32 q, r; |
27284 | |
27285 | q = dst / src; |
27286 | r = dst % src; |
27287 | |
27288 | if (q & 0xFFFF0000) |
27289 | { |
27290 | flag_V = M68K_SR_V; |
27291 | #ifdef USE_CYCLONE_TIMING_DIV |
27292 | RET(148) |
27293 | #else |
27294 | RET(78) |
27295 | #endif |
27296 | } |
27297 | q &= 0x0000FFFF; |
27298 | flag_NotZ = q; |
27299 | flag_N = q >> 8; |
27300 | flag_V = flag_C = 0; |
27301 | res = q | (r << 16); |
27302 | DREGu32((Opcode >> 9) & 7) = res; |
27303 | } |
27304 | #ifdef USE_CYCLONE_TIMING_DIV |
27305 | RET(148) |
27306 | #else |
27307 | RET(98) |
27308 | #endif |
27309 | } |
27310 | |
27311 | // DIVU |
27312 | OPCODE(0x80F0) |
27313 | { |
27314 | u32 adr, res; |
27315 | u32 src, dst; |
27316 | |
27317 | adr = AREG((Opcode >> 0) & 7); |
27318 | DECODE_EXT_WORD |
27319 | PRE_IO |
27320 | READ_WORD_F(adr, src) |
27321 | if (src == 0) |
27322 | { |
d0ae0cb4 |
27323 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27324 | #ifdef USE_CYCLONE_TIMING_DIV |
27325 | RET(150) |
27326 | #else |
27327 | RET(20) |
27328 | #endif |
27329 | } |
27330 | dst = DREGu32((Opcode >> 9) & 7); |
27331 | { |
27332 | u32 q, r; |
27333 | |
27334 | q = dst / src; |
27335 | r = dst % src; |
27336 | |
27337 | if (q & 0xFFFF0000) |
27338 | { |
27339 | flag_V = M68K_SR_V; |
27340 | #ifdef USE_CYCLONE_TIMING_DIV |
27341 | RET(150) |
27342 | #else |
27343 | RET(80) |
27344 | #endif |
27345 | } |
27346 | q &= 0x0000FFFF; |
27347 | flag_NotZ = q; |
27348 | flag_N = q >> 8; |
27349 | flag_V = flag_C = 0; |
27350 | res = q | (r << 16); |
27351 | DREGu32((Opcode >> 9) & 7) = res; |
27352 | } |
27353 | #ifdef USE_CYCLONE_TIMING_DIV |
27354 | RET(150) |
27355 | #else |
27356 | RET(100) |
27357 | #endif |
27358 | } |
27359 | |
27360 | // DIVU |
27361 | OPCODE(0x80F8) |
27362 | { |
27363 | u32 adr, res; |
27364 | u32 src, dst; |
27365 | |
27366 | FETCH_SWORD(adr); |
27367 | PRE_IO |
27368 | READ_WORD_F(adr, src) |
27369 | if (src == 0) |
27370 | { |
d0ae0cb4 |
27371 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27372 | #ifdef USE_CYCLONE_TIMING_DIV |
27373 | RET(148) |
27374 | #else |
27375 | RET(18) |
27376 | #endif |
27377 | } |
27378 | dst = DREGu32((Opcode >> 9) & 7); |
27379 | { |
27380 | u32 q, r; |
27381 | |
27382 | q = dst / src; |
27383 | r = dst % src; |
27384 | |
27385 | if (q & 0xFFFF0000) |
27386 | { |
27387 | flag_V = M68K_SR_V; |
27388 | #ifdef USE_CYCLONE_TIMING_DIV |
27389 | RET(148) |
27390 | #else |
27391 | RET(78) |
27392 | #endif |
27393 | } |
27394 | q &= 0x0000FFFF; |
27395 | flag_NotZ = q; |
27396 | flag_N = q >> 8; |
27397 | flag_V = flag_C = 0; |
27398 | res = q | (r << 16); |
27399 | DREGu32((Opcode >> 9) & 7) = res; |
27400 | } |
27401 | #ifdef USE_CYCLONE_TIMING_DIV |
27402 | RET(148) |
27403 | #else |
27404 | RET(98) |
27405 | #endif |
27406 | } |
27407 | |
27408 | // DIVU |
27409 | OPCODE(0x80F9) |
27410 | { |
27411 | u32 adr, res; |
27412 | u32 src, dst; |
27413 | |
27414 | FETCH_LONG(adr); |
27415 | PRE_IO |
27416 | READ_WORD_F(adr, src) |
27417 | if (src == 0) |
27418 | { |
d0ae0cb4 |
27419 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27420 | #ifdef USE_CYCLONE_TIMING_DIV |
27421 | RET(162) |
27422 | #else |
27423 | RET(22) |
27424 | #endif |
27425 | } |
27426 | dst = DREGu32((Opcode >> 9) & 7); |
27427 | { |
27428 | u32 q, r; |
27429 | |
27430 | q = dst / src; |
27431 | r = dst % src; |
27432 | |
27433 | if (q & 0xFFFF0000) |
27434 | { |
27435 | flag_V = M68K_SR_V; |
27436 | #ifdef USE_CYCLONE_TIMING_DIV |
27437 | RET(162) |
27438 | #else |
27439 | RET(82) |
27440 | #endif |
27441 | } |
27442 | q &= 0x0000FFFF; |
27443 | flag_NotZ = q; |
27444 | flag_N = q >> 8; |
27445 | flag_V = flag_C = 0; |
27446 | res = q | (r << 16); |
27447 | DREGu32((Opcode >> 9) & 7) = res; |
27448 | } |
27449 | #ifdef USE_CYCLONE_TIMING_DIV |
27450 | RET(162) |
27451 | #else |
27452 | RET(102) |
27453 | #endif |
27454 | } |
27455 | |
27456 | // DIVU |
27457 | OPCODE(0x80FA) |
27458 | { |
27459 | u32 adr, res; |
27460 | u32 src, dst; |
27461 | |
be26eb23 |
27462 | adr = GET_SWORD + GET_PC; |
70357ce5 |
27463 | PC++; |
27464 | PRE_IO |
27465 | READ_WORD_F(adr, src) |
27466 | if (src == 0) |
27467 | { |
d0ae0cb4 |
27468 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27469 | #ifdef USE_CYCLONE_TIMING_DIV |
27470 | RET(148) |
27471 | #else |
27472 | RET(18) |
27473 | #endif |
27474 | } |
27475 | dst = DREGu32((Opcode >> 9) & 7); |
27476 | { |
27477 | u32 q, r; |
27478 | |
27479 | q = dst / src; |
27480 | r = dst % src; |
27481 | |
27482 | if (q & 0xFFFF0000) |
27483 | { |
27484 | flag_V = M68K_SR_V; |
27485 | #ifdef USE_CYCLONE_TIMING_DIV |
27486 | RET(148) |
27487 | #else |
27488 | RET(78) |
27489 | #endif |
27490 | } |
27491 | q &= 0x0000FFFF; |
27492 | flag_NotZ = q; |
27493 | flag_N = q >> 8; |
27494 | flag_V = flag_C = 0; |
27495 | res = q | (r << 16); |
27496 | DREGu32((Opcode >> 9) & 7) = res; |
27497 | } |
27498 | #ifdef USE_CYCLONE_TIMING_DIV |
27499 | RET(148) |
27500 | #else |
27501 | RET(98) |
27502 | #endif |
27503 | } |
27504 | |
27505 | // DIVU |
27506 | OPCODE(0x80FB) |
27507 | { |
27508 | u32 adr, res; |
27509 | u32 src, dst; |
27510 | |
be26eb23 |
27511 | adr = GET_PC; |
70357ce5 |
27512 | DECODE_EXT_WORD |
27513 | PRE_IO |
27514 | READ_WORD_F(adr, src) |
27515 | if (src == 0) |
27516 | { |
d0ae0cb4 |
27517 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27518 | #ifdef USE_CYCLONE_TIMING_DIV |
27519 | RET(160) |
27520 | #else |
27521 | RET(20) |
27522 | #endif |
27523 | } |
27524 | dst = DREGu32((Opcode >> 9) & 7); |
27525 | { |
27526 | u32 q, r; |
27527 | |
27528 | q = dst / src; |
27529 | r = dst % src; |
27530 | |
27531 | if (q & 0xFFFF0000) |
27532 | { |
27533 | flag_V = M68K_SR_V; |
27534 | #ifdef USE_CYCLONE_TIMING_DIV |
27535 | RET(160) |
27536 | #else |
27537 | RET(80) |
27538 | #endif |
27539 | } |
27540 | q &= 0x0000FFFF; |
27541 | flag_NotZ = q; |
27542 | flag_N = q >> 8; |
27543 | flag_V = flag_C = 0; |
27544 | res = q | (r << 16); |
27545 | DREGu32((Opcode >> 9) & 7) = res; |
27546 | } |
27547 | #ifdef USE_CYCLONE_TIMING_DIV |
27548 | RET(160) |
27549 | #else |
27550 | RET(100) |
27551 | #endif |
27552 | } |
27553 | |
27554 | // DIVU |
27555 | OPCODE(0x80FC) |
27556 | { |
27557 | u32 adr, res; |
27558 | u32 src, dst; |
27559 | |
27560 | FETCH_WORD(src); |
27561 | if (src == 0) |
27562 | { |
d0ae0cb4 |
27563 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27564 | #ifdef USE_CYCLONE_TIMING_DIV |
27565 | RET(144) |
27566 | #else |
27567 | RET(14) |
27568 | #endif |
27569 | } |
27570 | dst = DREGu32((Opcode >> 9) & 7); |
27571 | { |
27572 | u32 q, r; |
27573 | |
27574 | q = dst / src; |
27575 | r = dst % src; |
27576 | |
27577 | if (q & 0xFFFF0000) |
27578 | { |
27579 | flag_V = M68K_SR_V; |
27580 | #ifdef USE_CYCLONE_TIMING_DIV |
27581 | RET(144) |
27582 | #else |
27583 | RET(74) |
27584 | #endif |
27585 | } |
27586 | q &= 0x0000FFFF; |
27587 | flag_NotZ = q; |
27588 | flag_N = q >> 8; |
27589 | flag_V = flag_C = 0; |
27590 | res = q | (r << 16); |
27591 | DREGu32((Opcode >> 9) & 7) = res; |
27592 | } |
27593 | #ifdef USE_CYCLONE_TIMING_DIV |
27594 | RET(144) |
27595 | #else |
27596 | RET(94) |
27597 | #endif |
27598 | } |
27599 | |
27600 | // DIVU |
27601 | OPCODE(0x80DF) |
27602 | { |
27603 | u32 adr, res; |
27604 | u32 src, dst; |
27605 | |
27606 | adr = AREG(7); |
27607 | AREG(7) += 2; |
27608 | PRE_IO |
27609 | READ_WORD_F(adr, src) |
27610 | if (src == 0) |
27611 | { |
d0ae0cb4 |
27612 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27613 | #ifdef USE_CYCLONE_TIMING_DIV |
27614 | RET(144) |
27615 | #else |
27616 | RET(14) |
27617 | #endif |
27618 | } |
27619 | dst = DREGu32((Opcode >> 9) & 7); |
27620 | { |
27621 | u32 q, r; |
27622 | |
27623 | q = dst / src; |
27624 | r = dst % src; |
27625 | |
27626 | if (q & 0xFFFF0000) |
27627 | { |
27628 | flag_V = M68K_SR_V; |
27629 | #ifdef USE_CYCLONE_TIMING_DIV |
27630 | RET(144) |
27631 | #else |
27632 | RET(74) |
27633 | #endif |
27634 | } |
27635 | q &= 0x0000FFFF; |
27636 | flag_NotZ = q; |
27637 | flag_N = q >> 8; |
27638 | flag_V = flag_C = 0; |
27639 | res = q | (r << 16); |
27640 | DREGu32((Opcode >> 9) & 7) = res; |
27641 | } |
27642 | #ifdef USE_CYCLONE_TIMING_DIV |
27643 | RET(144) |
27644 | #else |
27645 | RET(94) |
27646 | #endif |
27647 | } |
27648 | |
27649 | // DIVU |
27650 | OPCODE(0x80E7) |
27651 | { |
27652 | u32 adr, res; |
27653 | u32 src, dst; |
27654 | |
27655 | adr = AREG(7) - 2; |
27656 | AREG(7) = adr; |
27657 | PRE_IO |
27658 | READ_WORD_F(adr, src) |
27659 | if (src == 0) |
27660 | { |
d0ae0cb4 |
27661 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27662 | #ifdef USE_CYCLONE_TIMING_DIV |
27663 | RET(146) |
27664 | #else |
27665 | RET(16) |
27666 | #endif |
27667 | } |
27668 | dst = DREGu32((Opcode >> 9) & 7); |
27669 | { |
27670 | u32 q, r; |
27671 | |
27672 | q = dst / src; |
27673 | r = dst % src; |
27674 | |
27675 | if (q & 0xFFFF0000) |
27676 | { |
27677 | flag_V = M68K_SR_V; |
27678 | #ifdef USE_CYCLONE_TIMING_DIV |
27679 | RET(146) |
27680 | #else |
27681 | RET(76) |
27682 | #endif |
27683 | } |
27684 | q &= 0x0000FFFF; |
27685 | flag_NotZ = q; |
27686 | flag_N = q >> 8; |
27687 | flag_V = flag_C = 0; |
27688 | res = q | (r << 16); |
27689 | DREGu32((Opcode >> 9) & 7) = res; |
27690 | } |
27691 | #ifdef USE_CYCLONE_TIMING_DIV |
27692 | RET(146) |
27693 | #else |
27694 | RET(96) |
27695 | #endif |
27696 | } |
27697 | |
27698 | // DIVS |
27699 | OPCODE(0x81C0) |
27700 | { |
27701 | u32 adr, res; |
27702 | u32 src, dst; |
27703 | |
27704 | src = (s32)DREGs16((Opcode >> 0) & 7); |
27705 | if (src == 0) |
27706 | { |
d0ae0cb4 |
27707 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27708 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27709 | goto end81C0; |
70357ce5 |
27710 | #endif |
27711 | RET(10) |
27712 | } |
27713 | dst = DREGu32((Opcode >> 9) & 7); |
27714 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27715 | { |
27716 | flag_NotZ = flag_N = 0; |
27717 | flag_V = flag_C = 0; |
27718 | res = 0; |
27719 | DREGu32((Opcode >> 9) & 7) = res; |
27720 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27721 | goto end81C0; |
70357ce5 |
27722 | #endif |
27723 | RET(50) |
27724 | } |
27725 | { |
27726 | s32 q, r; |
27727 | |
27728 | q = (s32)dst / (s32)src; |
27729 | r = (s32)dst % (s32)src; |
27730 | |
27731 | if ((q > 0x7FFF) || (q < -0x8000)) |
27732 | { |
27733 | flag_V = M68K_SR_V; |
27734 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27735 | goto end81C0; |
70357ce5 |
27736 | #endif |
27737 | RET(80) |
27738 | } |
27739 | q &= 0x0000FFFF; |
27740 | flag_NotZ = q; |
27741 | flag_N = q >> 8; |
27742 | flag_V = flag_C = 0; |
27743 | res = q | (r << 16); |
27744 | DREGu32((Opcode >> 9) & 7) = res; |
27745 | } |
27746 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27747 | end81C0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27748 | #endif |
27749 | RET(108) |
27750 | } |
27751 | |
27752 | // DIVS |
27753 | OPCODE(0x81D0) |
27754 | { |
27755 | u32 adr, res; |
27756 | u32 src, dst; |
27757 | |
27758 | adr = AREG((Opcode >> 0) & 7); |
27759 | PRE_IO |
27760 | READSX_WORD_F(adr, src) |
27761 | if (src == 0) |
27762 | { |
d0ae0cb4 |
27763 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27764 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27765 | goto end81D0; |
70357ce5 |
27766 | #endif |
27767 | RET(14) |
27768 | } |
27769 | dst = DREGu32((Opcode >> 9) & 7); |
27770 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27771 | { |
27772 | flag_NotZ = flag_N = 0; |
27773 | flag_V = flag_C = 0; |
27774 | res = 0; |
27775 | DREGu32((Opcode >> 9) & 7) = res; |
27776 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27777 | goto end81D0; |
70357ce5 |
27778 | #endif |
27779 | RET(54) |
27780 | } |
27781 | { |
27782 | s32 q, r; |
27783 | |
27784 | q = (s32)dst / (s32)src; |
27785 | r = (s32)dst % (s32)src; |
27786 | |
27787 | if ((q > 0x7FFF) || (q < -0x8000)) |
27788 | { |
27789 | flag_V = M68K_SR_V; |
27790 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27791 | goto end81D0; |
70357ce5 |
27792 | #endif |
27793 | RET(84) |
27794 | } |
27795 | q &= 0x0000FFFF; |
27796 | flag_NotZ = q; |
27797 | flag_N = q >> 8; |
27798 | flag_V = flag_C = 0; |
27799 | res = q | (r << 16); |
27800 | DREGu32((Opcode >> 9) & 7) = res; |
27801 | } |
27802 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27803 | end81D0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27804 | #endif |
27805 | RET(112) |
27806 | } |
27807 | |
27808 | // DIVS |
27809 | OPCODE(0x81D8) |
27810 | { |
27811 | u32 adr, res; |
27812 | u32 src, dst; |
27813 | |
27814 | adr = AREG((Opcode >> 0) & 7); |
27815 | AREG((Opcode >> 0) & 7) += 2; |
27816 | PRE_IO |
27817 | READSX_WORD_F(adr, src) |
27818 | if (src == 0) |
27819 | { |
d0ae0cb4 |
27820 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27821 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27822 | goto end81D8; |
70357ce5 |
27823 | #endif |
27824 | RET(14) |
27825 | } |
27826 | dst = DREGu32((Opcode >> 9) & 7); |
27827 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27828 | { |
27829 | flag_NotZ = flag_N = 0; |
27830 | flag_V = flag_C = 0; |
27831 | res = 0; |
27832 | DREGu32((Opcode >> 9) & 7) = res; |
27833 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27834 | goto end81D8; |
70357ce5 |
27835 | #endif |
27836 | RET(54) |
27837 | } |
27838 | { |
27839 | s32 q, r; |
27840 | |
27841 | q = (s32)dst / (s32)src; |
27842 | r = (s32)dst % (s32)src; |
27843 | |
27844 | if ((q > 0x7FFF) || (q < -0x8000)) |
27845 | { |
27846 | flag_V = M68K_SR_V; |
27847 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27848 | goto end81D8; |
70357ce5 |
27849 | #endif |
27850 | RET(84) |
27851 | } |
27852 | q &= 0x0000FFFF; |
27853 | flag_NotZ = q; |
27854 | flag_N = q >> 8; |
27855 | flag_V = flag_C = 0; |
27856 | res = q | (r << 16); |
27857 | DREGu32((Opcode >> 9) & 7) = res; |
27858 | } |
27859 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27860 | end81D8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27861 | #endif |
27862 | RET(112) |
27863 | } |
27864 | |
27865 | // DIVS |
27866 | OPCODE(0x81E0) |
27867 | { |
27868 | u32 adr, res; |
27869 | u32 src, dst; |
27870 | |
27871 | adr = AREG((Opcode >> 0) & 7) - 2; |
27872 | AREG((Opcode >> 0) & 7) = adr; |
27873 | PRE_IO |
27874 | READSX_WORD_F(adr, src) |
27875 | if (src == 0) |
27876 | { |
d0ae0cb4 |
27877 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27878 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27879 | goto end81E0; |
70357ce5 |
27880 | #endif |
27881 | RET(16) |
27882 | } |
27883 | dst = DREGu32((Opcode >> 9) & 7); |
27884 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27885 | { |
27886 | flag_NotZ = flag_N = 0; |
27887 | flag_V = flag_C = 0; |
27888 | res = 0; |
27889 | DREGu32((Opcode >> 9) & 7) = res; |
27890 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27891 | goto end81E0; |
70357ce5 |
27892 | #endif |
27893 | RET(56) |
27894 | } |
27895 | { |
27896 | s32 q, r; |
27897 | |
27898 | q = (s32)dst / (s32)src; |
27899 | r = (s32)dst % (s32)src; |
27900 | |
27901 | if ((q > 0x7FFF) || (q < -0x8000)) |
27902 | { |
27903 | flag_V = M68K_SR_V; |
27904 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27905 | goto end81E0; |
70357ce5 |
27906 | #endif |
27907 | RET(86) |
27908 | } |
27909 | q &= 0x0000FFFF; |
27910 | flag_NotZ = q; |
27911 | flag_N = q >> 8; |
27912 | flag_V = flag_C = 0; |
27913 | res = q | (r << 16); |
27914 | DREGu32((Opcode >> 9) & 7) = res; |
27915 | } |
27916 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27917 | end81E0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27918 | #endif |
27919 | RET(114) |
27920 | } |
27921 | |
27922 | // DIVS |
27923 | OPCODE(0x81E8) |
27924 | { |
27925 | u32 adr, res; |
27926 | u32 src, dst; |
27927 | |
27928 | FETCH_SWORD(adr); |
27929 | adr += AREG((Opcode >> 0) & 7); |
27930 | PRE_IO |
27931 | READSX_WORD_F(adr, src) |
27932 | if (src == 0) |
27933 | { |
d0ae0cb4 |
27934 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27935 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27936 | goto end81E8; |
70357ce5 |
27937 | #endif |
27938 | RET(18) |
27939 | } |
27940 | dst = DREGu32((Opcode >> 9) & 7); |
27941 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27942 | { |
27943 | flag_NotZ = flag_N = 0; |
27944 | flag_V = flag_C = 0; |
27945 | res = 0; |
27946 | DREGu32((Opcode >> 9) & 7) = res; |
27947 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27948 | goto end81E8; |
70357ce5 |
27949 | #endif |
27950 | RET(58) |
27951 | } |
27952 | { |
27953 | s32 q, r; |
27954 | |
27955 | q = (s32)dst / (s32)src; |
27956 | r = (s32)dst % (s32)src; |
27957 | |
27958 | if ((q > 0x7FFF) || (q < -0x8000)) |
27959 | { |
27960 | flag_V = M68K_SR_V; |
27961 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27962 | goto end81E8; |
70357ce5 |
27963 | #endif |
27964 | RET(88) |
27965 | } |
27966 | q &= 0x0000FFFF; |
27967 | flag_NotZ = q; |
27968 | flag_N = q >> 8; |
27969 | flag_V = flag_C = 0; |
27970 | res = q | (r << 16); |
27971 | DREGu32((Opcode >> 9) & 7) = res; |
27972 | } |
27973 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27974 | end81E8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27975 | #endif |
27976 | RET(116) |
27977 | } |
27978 | |
27979 | // DIVS |
27980 | OPCODE(0x81F0) |
27981 | { |
27982 | u32 adr, res; |
27983 | u32 src, dst; |
27984 | |
27985 | adr = AREG((Opcode >> 0) & 7); |
27986 | DECODE_EXT_WORD |
27987 | PRE_IO |
27988 | READSX_WORD_F(adr, src) |
27989 | if (src == 0) |
27990 | { |
d0ae0cb4 |
27991 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27992 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27993 | goto end81F0; |
70357ce5 |
27994 | #endif |
27995 | RET(20) |
27996 | } |
27997 | dst = DREGu32((Opcode >> 9) & 7); |
27998 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27999 | { |
28000 | flag_NotZ = flag_N = 0; |
28001 | flag_V = flag_C = 0; |
28002 | res = 0; |
28003 | DREGu32((Opcode >> 9) & 7) = res; |
28004 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28005 | goto end81F0; |
70357ce5 |
28006 | #endif |
28007 | RET(60) |
28008 | } |
28009 | { |
28010 | s32 q, r; |
28011 | |
28012 | q = (s32)dst / (s32)src; |
28013 | r = (s32)dst % (s32)src; |
28014 | |
28015 | if ((q > 0x7FFF) || (q < -0x8000)) |
28016 | { |
28017 | flag_V = M68K_SR_V; |
28018 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28019 | goto end81F0; |
70357ce5 |
28020 | #endif |
28021 | RET(90) |
28022 | } |
28023 | q &= 0x0000FFFF; |
28024 | flag_NotZ = q; |
28025 | flag_N = q >> 8; |
28026 | flag_V = flag_C = 0; |
28027 | res = q | (r << 16); |
28028 | DREGu32((Opcode >> 9) & 7) = res; |
28029 | } |
28030 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28031 | end81F0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28032 | #endif |
28033 | RET(118) |
28034 | } |
28035 | |
28036 | // DIVS |
28037 | OPCODE(0x81F8) |
28038 | { |
28039 | u32 adr, res; |
28040 | u32 src, dst; |
28041 | |
28042 | FETCH_SWORD(adr); |
28043 | PRE_IO |
28044 | READSX_WORD_F(adr, src) |
28045 | if (src == 0) |
28046 | { |
d0ae0cb4 |
28047 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28048 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28049 | goto end81F8; |
70357ce5 |
28050 | #endif |
28051 | RET(18) |
28052 | } |
28053 | dst = DREGu32((Opcode >> 9) & 7); |
28054 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28055 | { |
28056 | flag_NotZ = flag_N = 0; |
28057 | flag_V = flag_C = 0; |
28058 | res = 0; |
28059 | DREGu32((Opcode >> 9) & 7) = res; |
28060 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28061 | goto end81F8; |
70357ce5 |
28062 | #endif |
28063 | RET(58) |
28064 | } |
28065 | { |
28066 | s32 q, r; |
28067 | |
28068 | q = (s32)dst / (s32)src; |
28069 | r = (s32)dst % (s32)src; |
28070 | |
28071 | if ((q > 0x7FFF) || (q < -0x8000)) |
28072 | { |
28073 | flag_V = M68K_SR_V; |
28074 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28075 | goto end81F8; |
70357ce5 |
28076 | #endif |
28077 | RET(88) |
28078 | } |
28079 | q &= 0x0000FFFF; |
28080 | flag_NotZ = q; |
28081 | flag_N = q >> 8; |
28082 | flag_V = flag_C = 0; |
28083 | res = q | (r << 16); |
28084 | DREGu32((Opcode >> 9) & 7) = res; |
28085 | } |
28086 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28087 | end81F8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28088 | #endif |
28089 | RET(116) |
28090 | } |
28091 | |
28092 | // DIVS |
28093 | OPCODE(0x81F9) |
28094 | { |
28095 | u32 adr, res; |
28096 | u32 src, dst; |
28097 | |
28098 | FETCH_LONG(adr); |
28099 | PRE_IO |
28100 | READSX_WORD_F(adr, src) |
28101 | if (src == 0) |
28102 | { |
d0ae0cb4 |
28103 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28104 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28105 | goto end81F9; |
70357ce5 |
28106 | #endif |
28107 | RET(22) |
28108 | } |
28109 | dst = DREGu32((Opcode >> 9) & 7); |
28110 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28111 | { |
28112 | flag_NotZ = flag_N = 0; |
28113 | flag_V = flag_C = 0; |
28114 | res = 0; |
28115 | DREGu32((Opcode >> 9) & 7) = res; |
28116 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28117 | goto end81F9; |
70357ce5 |
28118 | #endif |
28119 | RET(62) |
28120 | } |
28121 | { |
28122 | s32 q, r; |
28123 | |
28124 | q = (s32)dst / (s32)src; |
28125 | r = (s32)dst % (s32)src; |
28126 | |
28127 | if ((q > 0x7FFF) || (q < -0x8000)) |
28128 | { |
28129 | flag_V = M68K_SR_V; |
28130 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28131 | goto end81F9; |
70357ce5 |
28132 | #endif |
28133 | RET(92) |
28134 | } |
28135 | q &= 0x0000FFFF; |
28136 | flag_NotZ = q; |
28137 | flag_N = q >> 8; |
28138 | flag_V = flag_C = 0; |
28139 | res = q | (r << 16); |
28140 | DREGu32((Opcode >> 9) & 7) = res; |
28141 | } |
28142 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28143 | end81F9: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28144 | #endif |
28145 | RET(120) |
28146 | } |
28147 | |
28148 | // DIVS |
28149 | OPCODE(0x81FA) |
28150 | { |
28151 | u32 adr, res; |
28152 | u32 src, dst; |
28153 | |
be26eb23 |
28154 | adr = GET_SWORD + GET_PC; |
70357ce5 |
28155 | PC++; |
28156 | PRE_IO |
28157 | READSX_WORD_F(adr, src) |
28158 | if (src == 0) |
28159 | { |
d0ae0cb4 |
28160 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28161 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28162 | goto end81FA; |
70357ce5 |
28163 | #endif |
28164 | RET(18) |
28165 | } |
28166 | dst = DREGu32((Opcode >> 9) & 7); |
28167 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28168 | { |
28169 | flag_NotZ = flag_N = 0; |
28170 | flag_V = flag_C = 0; |
28171 | res = 0; |
28172 | DREGu32((Opcode >> 9) & 7) = res; |
28173 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28174 | goto end81FA; |
70357ce5 |
28175 | #endif |
28176 | RET(58) |
28177 | } |
28178 | { |
28179 | s32 q, r; |
28180 | |
28181 | q = (s32)dst / (s32)src; |
28182 | r = (s32)dst % (s32)src; |
28183 | |
28184 | if ((q > 0x7FFF) || (q < -0x8000)) |
28185 | { |
28186 | flag_V = M68K_SR_V; |
28187 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28188 | goto end81FA; |
70357ce5 |
28189 | #endif |
28190 | RET(88) |
28191 | } |
28192 | q &= 0x0000FFFF; |
28193 | flag_NotZ = q; |
28194 | flag_N = q >> 8; |
28195 | flag_V = flag_C = 0; |
28196 | res = q | (r << 16); |
28197 | DREGu32((Opcode >> 9) & 7) = res; |
28198 | } |
28199 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28200 | end81FA: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28201 | #endif |
28202 | RET(116) |
28203 | } |
28204 | |
28205 | // DIVS |
28206 | OPCODE(0x81FB) |
28207 | { |
28208 | u32 adr, res; |
28209 | u32 src, dst; |
28210 | |
be26eb23 |
28211 | adr = GET_PC; |
70357ce5 |
28212 | DECODE_EXT_WORD |
28213 | PRE_IO |
28214 | READSX_WORD_F(adr, src) |
28215 | if (src == 0) |
28216 | { |
d0ae0cb4 |
28217 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28218 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28219 | goto end81FB; |
70357ce5 |
28220 | #endif |
28221 | RET(20) |
28222 | } |
28223 | dst = DREGu32((Opcode >> 9) & 7); |
28224 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28225 | { |
28226 | flag_NotZ = flag_N = 0; |
28227 | flag_V = flag_C = 0; |
28228 | res = 0; |
28229 | DREGu32((Opcode >> 9) & 7) = res; |
28230 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28231 | goto end81FB; |
70357ce5 |
28232 | #endif |
28233 | RET(60) |
28234 | } |
28235 | { |
28236 | s32 q, r; |
28237 | |
28238 | q = (s32)dst / (s32)src; |
28239 | r = (s32)dst % (s32)src; |
28240 | |
28241 | if ((q > 0x7FFF) || (q < -0x8000)) |
28242 | { |
28243 | flag_V = M68K_SR_V; |
28244 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28245 | goto end81FB; |
70357ce5 |
28246 | #endif |
28247 | RET(90) |
28248 | } |
28249 | q &= 0x0000FFFF; |
28250 | flag_NotZ = q; |
28251 | flag_N = q >> 8; |
28252 | flag_V = flag_C = 0; |
28253 | res = q | (r << 16); |
28254 | DREGu32((Opcode >> 9) & 7) = res; |
28255 | } |
28256 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28257 | end81FB: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28258 | #endif |
28259 | RET(118) |
28260 | } |
28261 | |
28262 | // DIVS |
28263 | OPCODE(0x81FC) |
28264 | { |
28265 | u32 adr, res; |
28266 | u32 src, dst; |
28267 | |
28268 | FETCH_SWORD(src); |
28269 | if (src == 0) |
28270 | { |
d0ae0cb4 |
28271 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28272 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28273 | goto end81FC; |
70357ce5 |
28274 | #endif |
28275 | RET(14) |
28276 | } |
28277 | dst = DREGu32((Opcode >> 9) & 7); |
28278 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28279 | { |
28280 | flag_NotZ = flag_N = 0; |
28281 | flag_V = flag_C = 0; |
28282 | res = 0; |
28283 | DREGu32((Opcode >> 9) & 7) = res; |
28284 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28285 | goto end81FC; |
70357ce5 |
28286 | #endif |
28287 | RET(54) |
28288 | } |
28289 | { |
28290 | s32 q, r; |
28291 | |
28292 | q = (s32)dst / (s32)src; |
28293 | r = (s32)dst % (s32)src; |
28294 | |
28295 | if ((q > 0x7FFF) || (q < -0x8000)) |
28296 | { |
28297 | flag_V = M68K_SR_V; |
28298 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28299 | goto end81FC; |
70357ce5 |
28300 | #endif |
28301 | RET(84) |
28302 | } |
28303 | q &= 0x0000FFFF; |
28304 | flag_NotZ = q; |
28305 | flag_N = q >> 8; |
28306 | flag_V = flag_C = 0; |
28307 | res = q | (r << 16); |
28308 | DREGu32((Opcode >> 9) & 7) = res; |
28309 | } |
28310 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28311 | end81FC: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28312 | #endif |
28313 | RET(112) |
28314 | } |
28315 | |
28316 | // DIVS |
28317 | OPCODE(0x81DF) |
28318 | { |
28319 | u32 adr, res; |
28320 | u32 src, dst; |
28321 | |
28322 | adr = AREG(7); |
28323 | AREG(7) += 2; |
28324 | PRE_IO |
28325 | READSX_WORD_F(adr, src) |
28326 | if (src == 0) |
28327 | { |
d0ae0cb4 |
28328 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28329 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28330 | goto end81DF; |
70357ce5 |
28331 | #endif |
28332 | RET(14) |
28333 | } |
28334 | dst = DREGu32((Opcode >> 9) & 7); |
28335 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28336 | { |
28337 | flag_NotZ = flag_N = 0; |
28338 | flag_V = flag_C = 0; |
28339 | res = 0; |
28340 | DREGu32((Opcode >> 9) & 7) = res; |
28341 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28342 | goto end81DF; |
70357ce5 |
28343 | #endif |
28344 | RET(54) |
28345 | } |
28346 | { |
28347 | s32 q, r; |
28348 | |
28349 | q = (s32)dst / (s32)src; |
28350 | r = (s32)dst % (s32)src; |
28351 | |
28352 | if ((q > 0x7FFF) || (q < -0x8000)) |
28353 | { |
28354 | flag_V = M68K_SR_V; |
28355 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28356 | goto end81DF; |
70357ce5 |
28357 | #endif |
28358 | RET(84) |
28359 | } |
28360 | q &= 0x0000FFFF; |
28361 | flag_NotZ = q; |
28362 | flag_N = q >> 8; |
28363 | flag_V = flag_C = 0; |
28364 | res = q | (r << 16); |
28365 | DREGu32((Opcode >> 9) & 7) = res; |
28366 | } |
28367 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28368 | end81DF: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28369 | #endif |
28370 | RET(112) |
28371 | } |
28372 | |
28373 | // DIVS |
28374 | OPCODE(0x81E7) |
28375 | { |
28376 | u32 adr, res; |
28377 | u32 src, dst; |
28378 | |
28379 | adr = AREG(7) - 2; |
28380 | AREG(7) = adr; |
28381 | PRE_IO |
28382 | READSX_WORD_F(adr, src) |
28383 | if (src == 0) |
28384 | { |
d0ae0cb4 |
28385 | SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28386 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28387 | goto end81E7; |
70357ce5 |
28388 | #endif |
28389 | RET(16) |
28390 | } |
28391 | dst = DREGu32((Opcode >> 9) & 7); |
28392 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28393 | { |
28394 | flag_NotZ = flag_N = 0; |
28395 | flag_V = flag_C = 0; |
28396 | res = 0; |
28397 | DREGu32((Opcode >> 9) & 7) = res; |
28398 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28399 | goto end81E7; |
70357ce5 |
28400 | #endif |
28401 | RET(56) |
28402 | } |
28403 | { |
28404 | s32 q, r; |
28405 | |
28406 | q = (s32)dst / (s32)src; |
28407 | r = (s32)dst % (s32)src; |
28408 | |
28409 | if ((q > 0x7FFF) || (q < -0x8000)) |
28410 | { |
28411 | flag_V = M68K_SR_V; |
28412 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28413 | goto end81E7; |
70357ce5 |
28414 | #endif |
28415 | RET(86) |
28416 | } |
28417 | q &= 0x0000FFFF; |
28418 | flag_NotZ = q; |
28419 | flag_N = q >> 8; |
28420 | flag_V = flag_C = 0; |
28421 | res = q | (r << 16); |
28422 | DREGu32((Opcode >> 9) & 7) = res; |
28423 | } |
28424 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28425 | end81E7: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28426 | #endif |
28427 | RET(114) |
28428 | } |
28429 | |
28430 | // SUBaD |
28431 | OPCODE(0x9000) |
28432 | { |
28433 | u32 adr, res; |
28434 | u32 src, dst; |
28435 | |
28436 | src = DREGu8((Opcode >> 0) & 7); |
28437 | dst = DREGu8((Opcode >> 9) & 7); |
28438 | res = dst - src; |
28439 | flag_N = flag_X = flag_C = res; |
28440 | flag_V = (src ^ dst) & (res ^ dst); |
28441 | flag_NotZ = res & 0xFF; |
28442 | DREGu8((Opcode >> 9) & 7) = res; |
28443 | RET(4) |
28444 | } |
28445 | |
28446 | // SUBaD |
03e4f2a3 |
28447 | #if 0 |
70357ce5 |
28448 | OPCODE(0x9008) |
28449 | { |
28450 | u32 adr, res; |
28451 | u32 src, dst; |
28452 | |
28453 | // can't read byte from Ax registers ! |
28454 | m68kcontext.execinfo |= M68K_FAULTED; |
28455 | m68kcontext.io_cycle_counter = 0; |
28456 | /* |
28457 | goto famec_Exec_End; |
28458 | dst = DREGu8((Opcode >> 9) & 7); |
28459 | res = dst - src; |
28460 | flag_N = flag_X = flag_C = res; |
28461 | flag_V = (src ^ dst) & (res ^ dst); |
28462 | flag_NotZ = res & 0xFF; |
28463 | DREGu8((Opcode >> 9) & 7) = res; |
28464 | */ |
28465 | RET(4) |
28466 | } |
03e4f2a3 |
28467 | #endif |
70357ce5 |
28468 | |
28469 | // SUBaD |
28470 | OPCODE(0x9010) |
28471 | { |
28472 | u32 adr, res; |
28473 | u32 src, dst; |
28474 | |
28475 | adr = AREG((Opcode >> 0) & 7); |
28476 | PRE_IO |
28477 | READ_BYTE_F(adr, src) |
28478 | dst = DREGu8((Opcode >> 9) & 7); |
28479 | res = dst - src; |
28480 | flag_N = flag_X = flag_C = res; |
28481 | flag_V = (src ^ dst) & (res ^ dst); |
28482 | flag_NotZ = res & 0xFF; |
28483 | DREGu8((Opcode >> 9) & 7) = res; |
28484 | POST_IO |
28485 | RET(8) |
28486 | } |
28487 | |
28488 | // SUBaD |
28489 | OPCODE(0x9018) |
28490 | { |
28491 | u32 adr, res; |
28492 | u32 src, dst; |
28493 | |
28494 | adr = AREG((Opcode >> 0) & 7); |
28495 | AREG((Opcode >> 0) & 7) += 1; |
28496 | PRE_IO |
28497 | READ_BYTE_F(adr, src) |
28498 | dst = DREGu8((Opcode >> 9) & 7); |
28499 | res = dst - src; |
28500 | flag_N = flag_X = flag_C = res; |
28501 | flag_V = (src ^ dst) & (res ^ dst); |
28502 | flag_NotZ = res & 0xFF; |
28503 | DREGu8((Opcode >> 9) & 7) = res; |
28504 | POST_IO |
28505 | RET(8) |
28506 | } |
28507 | |
28508 | // SUBaD |
28509 | OPCODE(0x9020) |
28510 | { |
28511 | u32 adr, res; |
28512 | u32 src, dst; |
28513 | |
28514 | adr = AREG((Opcode >> 0) & 7) - 1; |
28515 | AREG((Opcode >> 0) & 7) = adr; |
28516 | PRE_IO |
28517 | READ_BYTE_F(adr, src) |
28518 | dst = DREGu8((Opcode >> 9) & 7); |
28519 | res = dst - src; |
28520 | flag_N = flag_X = flag_C = res; |
28521 | flag_V = (src ^ dst) & (res ^ dst); |
28522 | flag_NotZ = res & 0xFF; |
28523 | DREGu8((Opcode >> 9) & 7) = res; |
28524 | POST_IO |
28525 | RET(10) |
28526 | } |
28527 | |
28528 | // SUBaD |
28529 | OPCODE(0x9028) |
28530 | { |
28531 | u32 adr, res; |
28532 | u32 src, dst; |
28533 | |
28534 | FETCH_SWORD(adr); |
28535 | adr += AREG((Opcode >> 0) & 7); |
28536 | PRE_IO |
28537 | READ_BYTE_F(adr, src) |
28538 | dst = DREGu8((Opcode >> 9) & 7); |
28539 | res = dst - src; |
28540 | flag_N = flag_X = flag_C = res; |
28541 | flag_V = (src ^ dst) & (res ^ dst); |
28542 | flag_NotZ = res & 0xFF; |
28543 | DREGu8((Opcode >> 9) & 7) = res; |
28544 | POST_IO |
28545 | RET(12) |
28546 | } |
28547 | |
28548 | // SUBaD |
28549 | OPCODE(0x9030) |
28550 | { |
28551 | u32 adr, res; |
28552 | u32 src, dst; |
28553 | |
28554 | adr = AREG((Opcode >> 0) & 7); |
28555 | DECODE_EXT_WORD |
28556 | PRE_IO |
28557 | READ_BYTE_F(adr, src) |
28558 | dst = DREGu8((Opcode >> 9) & 7); |
28559 | res = dst - src; |
28560 | flag_N = flag_X = flag_C = res; |
28561 | flag_V = (src ^ dst) & (res ^ dst); |
28562 | flag_NotZ = res & 0xFF; |
28563 | DREGu8((Opcode >> 9) & 7) = res; |
28564 | POST_IO |
28565 | RET(14) |
28566 | } |
28567 | |
28568 | // SUBaD |
28569 | OPCODE(0x9038) |
28570 | { |
28571 | u32 adr, res; |
28572 | u32 src, dst; |
28573 | |
28574 | FETCH_SWORD(adr); |
28575 | PRE_IO |
28576 | READ_BYTE_F(adr, src) |
28577 | dst = DREGu8((Opcode >> 9) & 7); |
28578 | res = dst - src; |
28579 | flag_N = flag_X = flag_C = res; |
28580 | flag_V = (src ^ dst) & (res ^ dst); |
28581 | flag_NotZ = res & 0xFF; |
28582 | DREGu8((Opcode >> 9) & 7) = res; |
28583 | POST_IO |
28584 | RET(12) |
28585 | } |
28586 | |
28587 | // SUBaD |
28588 | OPCODE(0x9039) |
28589 | { |
28590 | u32 adr, res; |
28591 | u32 src, dst; |
28592 | |
28593 | FETCH_LONG(adr); |
28594 | PRE_IO |
28595 | READ_BYTE_F(adr, src) |
28596 | dst = DREGu8((Opcode >> 9) & 7); |
28597 | res = dst - src; |
28598 | flag_N = flag_X = flag_C = res; |
28599 | flag_V = (src ^ dst) & (res ^ dst); |
28600 | flag_NotZ = res & 0xFF; |
28601 | DREGu8((Opcode >> 9) & 7) = res; |
28602 | POST_IO |
28603 | RET(16) |
28604 | } |
28605 | |
28606 | // SUBaD |
28607 | OPCODE(0x903A) |
28608 | { |
28609 | u32 adr, res; |
28610 | u32 src, dst; |
28611 | |
be26eb23 |
28612 | adr = GET_SWORD + GET_PC; |
70357ce5 |
28613 | PC++; |
28614 | PRE_IO |
28615 | READ_BYTE_F(adr, src) |
28616 | dst = DREGu8((Opcode >> 9) & 7); |
28617 | res = dst - src; |
28618 | flag_N = flag_X = flag_C = res; |
28619 | flag_V = (src ^ dst) & (res ^ dst); |
28620 | flag_NotZ = res & 0xFF; |
28621 | DREGu8((Opcode >> 9) & 7) = res; |
28622 | POST_IO |
28623 | RET(12) |
28624 | } |
28625 | |
28626 | // SUBaD |
28627 | OPCODE(0x903B) |
28628 | { |
28629 | u32 adr, res; |
28630 | u32 src, dst; |
28631 | |
be26eb23 |
28632 | adr = GET_PC; |
70357ce5 |
28633 | DECODE_EXT_WORD |
28634 | PRE_IO |
28635 | READ_BYTE_F(adr, src) |
28636 | dst = DREGu8((Opcode >> 9) & 7); |
28637 | res = dst - src; |
28638 | flag_N = flag_X = flag_C = res; |
28639 | flag_V = (src ^ dst) & (res ^ dst); |
28640 | flag_NotZ = res & 0xFF; |
28641 | DREGu8((Opcode >> 9) & 7) = res; |
28642 | POST_IO |
28643 | RET(14) |
28644 | } |
28645 | |
28646 | // SUBaD |
28647 | OPCODE(0x903C) |
28648 | { |
28649 | u32 adr, res; |
28650 | u32 src, dst; |
28651 | |
28652 | FETCH_BYTE(src); |
28653 | dst = DREGu8((Opcode >> 9) & 7); |
28654 | res = dst - src; |
28655 | flag_N = flag_X = flag_C = res; |
28656 | flag_V = (src ^ dst) & (res ^ dst); |
28657 | flag_NotZ = res & 0xFF; |
28658 | DREGu8((Opcode >> 9) & 7) = res; |
28659 | RET(8) |
28660 | } |
28661 | |
28662 | // SUBaD |
28663 | OPCODE(0x901F) |
28664 | { |
28665 | u32 adr, res; |
28666 | u32 src, dst; |
28667 | |
28668 | adr = AREG(7); |
28669 | AREG(7) += 2; |
28670 | PRE_IO |
28671 | READ_BYTE_F(adr, src) |
28672 | dst = DREGu8((Opcode >> 9) & 7); |
28673 | res = dst - src; |
28674 | flag_N = flag_X = flag_C = res; |
28675 | flag_V = (src ^ dst) & (res ^ dst); |
28676 | flag_NotZ = res & 0xFF; |
28677 | DREGu8((Opcode >> 9) & 7) = res; |
28678 | POST_IO |
28679 | RET(8) |
28680 | } |
28681 | |
28682 | // SUBaD |
28683 | OPCODE(0x9027) |
28684 | { |
28685 | u32 adr, res; |
28686 | u32 src, dst; |
28687 | |
28688 | adr = AREG(7) - 2; |
28689 | AREG(7) = adr; |
28690 | PRE_IO |
28691 | READ_BYTE_F(adr, src) |
28692 | dst = DREGu8((Opcode >> 9) & 7); |
28693 | res = dst - src; |
28694 | flag_N = flag_X = flag_C = res; |
28695 | flag_V = (src ^ dst) & (res ^ dst); |
28696 | flag_NotZ = res & 0xFF; |
28697 | DREGu8((Opcode >> 9) & 7) = res; |
28698 | POST_IO |
28699 | RET(10) |
28700 | } |
28701 | |
28702 | // SUBaD |
28703 | OPCODE(0x9040) |
28704 | { |
28705 | u32 adr, res; |
28706 | u32 src, dst; |
28707 | |
28708 | src = DREGu16((Opcode >> 0) & 7); |
28709 | dst = DREGu16((Opcode >> 9) & 7); |
28710 | res = dst - src; |
28711 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28712 | flag_N = flag_X = flag_C = res >> 8; |
28713 | flag_NotZ = res & 0xFFFF; |
28714 | DREGu16((Opcode >> 9) & 7) = res; |
28715 | RET(4) |
28716 | } |
28717 | |
28718 | // SUBaD |
28719 | OPCODE(0x9048) |
28720 | { |
28721 | u32 adr, res; |
28722 | u32 src, dst; |
28723 | |
28724 | src = AREGu16((Opcode >> 0) & 7); |
28725 | dst = DREGu16((Opcode >> 9) & 7); |
28726 | res = dst - src; |
28727 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28728 | flag_N = flag_X = flag_C = res >> 8; |
28729 | flag_NotZ = res & 0xFFFF; |
28730 | DREGu16((Opcode >> 9) & 7) = res; |
28731 | RET(4) |
28732 | } |
28733 | |
28734 | // SUBaD |
28735 | OPCODE(0x9050) |
28736 | { |
28737 | u32 adr, res; |
28738 | u32 src, dst; |
28739 | |
28740 | adr = AREG((Opcode >> 0) & 7); |
28741 | PRE_IO |
28742 | READ_WORD_F(adr, src) |
28743 | dst = DREGu16((Opcode >> 9) & 7); |
28744 | res = dst - src; |
28745 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28746 | flag_N = flag_X = flag_C = res >> 8; |
28747 | flag_NotZ = res & 0xFFFF; |
28748 | DREGu16((Opcode >> 9) & 7) = res; |
28749 | POST_IO |
28750 | RET(8) |
28751 | } |
28752 | |
28753 | // SUBaD |
28754 | OPCODE(0x9058) |
28755 | { |
28756 | u32 adr, res; |
28757 | u32 src, dst; |
28758 | |
28759 | adr = AREG((Opcode >> 0) & 7); |
28760 | AREG((Opcode >> 0) & 7) += 2; |
28761 | PRE_IO |
28762 | READ_WORD_F(adr, src) |
28763 | dst = DREGu16((Opcode >> 9) & 7); |
28764 | res = dst - src; |
28765 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28766 | flag_N = flag_X = flag_C = res >> 8; |
28767 | flag_NotZ = res & 0xFFFF; |
28768 | DREGu16((Opcode >> 9) & 7) = res; |
28769 | POST_IO |
28770 | RET(8) |
28771 | } |
28772 | |
28773 | // SUBaD |
28774 | OPCODE(0x9060) |
28775 | { |
28776 | u32 adr, res; |
28777 | u32 src, dst; |
28778 | |
28779 | adr = AREG((Opcode >> 0) & 7) - 2; |
28780 | AREG((Opcode >> 0) & 7) = adr; |
28781 | PRE_IO |
28782 | READ_WORD_F(adr, src) |
28783 | dst = DREGu16((Opcode >> 9) & 7); |
28784 | res = dst - src; |
28785 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28786 | flag_N = flag_X = flag_C = res >> 8; |
28787 | flag_NotZ = res & 0xFFFF; |
28788 | DREGu16((Opcode >> 9) & 7) = res; |
28789 | POST_IO |
28790 | RET(10) |
28791 | } |
28792 | |
28793 | // SUBaD |
28794 | OPCODE(0x9068) |
28795 | { |
28796 | u32 adr, res; |
28797 | u32 src, dst; |
28798 | |
28799 | FETCH_SWORD(adr); |
28800 | adr += AREG((Opcode >> 0) & 7); |
28801 | PRE_IO |
28802 | READ_WORD_F(adr, src) |
28803 | dst = DREGu16((Opcode >> 9) & 7); |
28804 | res = dst - src; |
28805 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28806 | flag_N = flag_X = flag_C = res >> 8; |
28807 | flag_NotZ = res & 0xFFFF; |
28808 | DREGu16((Opcode >> 9) & 7) = res; |
28809 | POST_IO |
28810 | RET(12) |
28811 | } |
28812 | |
28813 | // SUBaD |
28814 | OPCODE(0x9070) |
28815 | { |
28816 | u32 adr, res; |
28817 | u32 src, dst; |
28818 | |
28819 | adr = AREG((Opcode >> 0) & 7); |
28820 | DECODE_EXT_WORD |
28821 | PRE_IO |
28822 | READ_WORD_F(adr, src) |
28823 | dst = DREGu16((Opcode >> 9) & 7); |
28824 | res = dst - src; |
28825 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28826 | flag_N = flag_X = flag_C = res >> 8; |
28827 | flag_NotZ = res & 0xFFFF; |
28828 | DREGu16((Opcode >> 9) & 7) = res; |
28829 | POST_IO |
28830 | RET(14) |
28831 | } |
28832 | |
28833 | // SUBaD |
28834 | OPCODE(0x9078) |
28835 | { |
28836 | u32 adr, res; |
28837 | u32 src, dst; |
28838 | |
28839 | FETCH_SWORD(adr); |
28840 | PRE_IO |
28841 | READ_WORD_F(adr, src) |
28842 | dst = DREGu16((Opcode >> 9) & 7); |
28843 | res = dst - src; |
28844 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28845 | flag_N = flag_X = flag_C = res >> 8; |
28846 | flag_NotZ = res & 0xFFFF; |
28847 | DREGu16((Opcode >> 9) & 7) = res; |
28848 | POST_IO |
28849 | RET(12) |
28850 | } |
28851 | |
28852 | // SUBaD |
28853 | OPCODE(0x9079) |
28854 | { |
28855 | u32 adr, res; |
28856 | u32 src, dst; |
28857 | |
28858 | FETCH_LONG(adr); |
28859 | PRE_IO |
28860 | READ_WORD_F(adr, src) |
28861 | dst = DREGu16((Opcode >> 9) & 7); |
28862 | res = dst - src; |
28863 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28864 | flag_N = flag_X = flag_C = res >> 8; |
28865 | flag_NotZ = res & 0xFFFF; |
28866 | DREGu16((Opcode >> 9) & 7) = res; |
28867 | POST_IO |
28868 | RET(16) |
28869 | } |
28870 | |
28871 | // SUBaD |
28872 | OPCODE(0x907A) |
28873 | { |
28874 | u32 adr, res; |
28875 | u32 src, dst; |
28876 | |
be26eb23 |
28877 | adr = GET_SWORD + GET_PC; |
70357ce5 |
28878 | PC++; |
28879 | PRE_IO |
28880 | READ_WORD_F(adr, src) |
28881 | dst = DREGu16((Opcode >> 9) & 7); |
28882 | res = dst - src; |
28883 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28884 | flag_N = flag_X = flag_C = res >> 8; |
28885 | flag_NotZ = res & 0xFFFF; |
28886 | DREGu16((Opcode >> 9) & 7) = res; |
28887 | POST_IO |
28888 | RET(12) |
28889 | } |
28890 | |
28891 | // SUBaD |
28892 | OPCODE(0x907B) |
28893 | { |
28894 | u32 adr, res; |
28895 | u32 src, dst; |
28896 | |
be26eb23 |
28897 | adr = GET_PC; |
70357ce5 |
28898 | DECODE_EXT_WORD |
28899 | PRE_IO |
28900 | READ_WORD_F(adr, src) |
28901 | dst = DREGu16((Opcode >> 9) & 7); |
28902 | res = dst - src; |
28903 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28904 | flag_N = flag_X = flag_C = res >> 8; |
28905 | flag_NotZ = res & 0xFFFF; |
28906 | DREGu16((Opcode >> 9) & 7) = res; |
28907 | POST_IO |
28908 | RET(14) |
28909 | } |
28910 | |
28911 | // SUBaD |
28912 | OPCODE(0x907C) |
28913 | { |
28914 | u32 adr, res; |
28915 | u32 src, dst; |
28916 | |
28917 | FETCH_WORD(src); |
28918 | dst = DREGu16((Opcode >> 9) & 7); |
28919 | res = dst - src; |
28920 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28921 | flag_N = flag_X = flag_C = res >> 8; |
28922 | flag_NotZ = res & 0xFFFF; |
28923 | DREGu16((Opcode >> 9) & 7) = res; |
28924 | RET(8) |
28925 | } |
28926 | |
28927 | // SUBaD |
28928 | OPCODE(0x905F) |
28929 | { |
28930 | u32 adr, res; |
28931 | u32 src, dst; |
28932 | |
28933 | adr = AREG(7); |
28934 | AREG(7) += 2; |
28935 | PRE_IO |
28936 | READ_WORD_F(adr, src) |
28937 | dst = DREGu16((Opcode >> 9) & 7); |
28938 | res = dst - src; |
28939 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28940 | flag_N = flag_X = flag_C = res >> 8; |
28941 | flag_NotZ = res & 0xFFFF; |
28942 | DREGu16((Opcode >> 9) & 7) = res; |
28943 | POST_IO |
28944 | RET(8) |
28945 | } |
28946 | |
28947 | // SUBaD |
28948 | OPCODE(0x9067) |
28949 | { |
28950 | u32 adr, res; |
28951 | u32 src, dst; |
28952 | |
28953 | adr = AREG(7) - 2; |
28954 | AREG(7) = adr; |
28955 | PRE_IO |
28956 | READ_WORD_F(adr, src) |
28957 | dst = DREGu16((Opcode >> 9) & 7); |
28958 | res = dst - src; |
28959 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28960 | flag_N = flag_X = flag_C = res >> 8; |
28961 | flag_NotZ = res & 0xFFFF; |
28962 | DREGu16((Opcode >> 9) & 7) = res; |
28963 | POST_IO |
28964 | RET(10) |
28965 | } |
28966 | |
28967 | // SUBaD |
28968 | OPCODE(0x9080) |
28969 | { |
28970 | u32 adr, res; |
28971 | u32 src, dst; |
28972 | |
28973 | src = DREGu32((Opcode >> 0) & 7); |
28974 | dst = DREGu32((Opcode >> 9) & 7); |
28975 | res = dst - src; |
28976 | flag_NotZ = res; |
28977 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28978 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28979 | flag_N = res >> 24; |
28980 | DREGu32((Opcode >> 9) & 7) = res; |
28981 | RET(8) |
28982 | } |
28983 | |
28984 | // SUBaD |
28985 | OPCODE(0x9088) |
28986 | { |
28987 | u32 adr, res; |
28988 | u32 src, dst; |
28989 | |
28990 | src = AREGu32((Opcode >> 0) & 7); |
28991 | dst = DREGu32((Opcode >> 9) & 7); |
28992 | res = dst - src; |
28993 | flag_NotZ = res; |
28994 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28995 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28996 | flag_N = res >> 24; |
28997 | DREGu32((Opcode >> 9) & 7) = res; |
28998 | RET(8) |
28999 | } |
29000 | |
29001 | // SUBaD |
29002 | OPCODE(0x9090) |
29003 | { |
29004 | u32 adr, res; |
29005 | u32 src, dst; |
29006 | |
29007 | adr = AREG((Opcode >> 0) & 7); |
29008 | PRE_IO |
29009 | READ_LONG_F(adr, src) |
29010 | dst = DREGu32((Opcode >> 9) & 7); |
29011 | res = dst - src; |
29012 | flag_NotZ = res; |
29013 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29014 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29015 | flag_N = res >> 24; |
29016 | DREGu32((Opcode >> 9) & 7) = res; |
29017 | POST_IO |
29018 | RET(14) |
29019 | } |
29020 | |
29021 | // SUBaD |
29022 | OPCODE(0x9098) |
29023 | { |
29024 | u32 adr, res; |
29025 | u32 src, dst; |
29026 | |
29027 | adr = AREG((Opcode >> 0) & 7); |
29028 | AREG((Opcode >> 0) & 7) += 4; |
29029 | PRE_IO |
29030 | READ_LONG_F(adr, src) |
29031 | dst = DREGu32((Opcode >> 9) & 7); |
29032 | res = dst - src; |
29033 | flag_NotZ = res; |
29034 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29035 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29036 | flag_N = res >> 24; |
29037 | DREGu32((Opcode >> 9) & 7) = res; |
29038 | POST_IO |
29039 | RET(14) |
29040 | } |
29041 | |
29042 | // SUBaD |
29043 | OPCODE(0x90A0) |
29044 | { |
29045 | u32 adr, res; |
29046 | u32 src, dst; |
29047 | |
29048 | adr = AREG((Opcode >> 0) & 7) - 4; |
29049 | AREG((Opcode >> 0) & 7) = adr; |
29050 | PRE_IO |
29051 | READ_LONG_F(adr, src) |
29052 | dst = DREGu32((Opcode >> 9) & 7); |
29053 | res = dst - src; |
29054 | flag_NotZ = res; |
29055 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29056 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29057 | flag_N = res >> 24; |
29058 | DREGu32((Opcode >> 9) & 7) = res; |
29059 | POST_IO |
29060 | RET(16) |
29061 | } |
29062 | |
29063 | // SUBaD |
29064 | OPCODE(0x90A8) |
29065 | { |
29066 | u32 adr, res; |
29067 | u32 src, dst; |
29068 | |
29069 | FETCH_SWORD(adr); |
29070 | adr += AREG((Opcode >> 0) & 7); |
29071 | PRE_IO |
29072 | READ_LONG_F(adr, src) |
29073 | dst = DREGu32((Opcode >> 9) & 7); |
29074 | res = dst - src; |
29075 | flag_NotZ = res; |
29076 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29077 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29078 | flag_N = res >> 24; |
29079 | DREGu32((Opcode >> 9) & 7) = res; |
29080 | POST_IO |
29081 | RET(18) |
29082 | } |
29083 | |
29084 | // SUBaD |
29085 | OPCODE(0x90B0) |
29086 | { |
29087 | u32 adr, res; |
29088 | u32 src, dst; |
29089 | |
29090 | adr = AREG((Opcode >> 0) & 7); |
29091 | DECODE_EXT_WORD |
29092 | PRE_IO |
29093 | READ_LONG_F(adr, src) |
29094 | dst = DREGu32((Opcode >> 9) & 7); |
29095 | res = dst - src; |
29096 | flag_NotZ = res; |
29097 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29098 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29099 | flag_N = res >> 24; |
29100 | DREGu32((Opcode >> 9) & 7) = res; |
29101 | POST_IO |
29102 | RET(20) |
29103 | } |
29104 | |
29105 | // SUBaD |
29106 | OPCODE(0x90B8) |
29107 | { |
29108 | u32 adr, res; |
29109 | u32 src, dst; |
29110 | |
29111 | FETCH_SWORD(adr); |
29112 | PRE_IO |
29113 | READ_LONG_F(adr, src) |
29114 | dst = DREGu32((Opcode >> 9) & 7); |
29115 | res = dst - src; |
29116 | flag_NotZ = res; |
29117 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29118 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29119 | flag_N = res >> 24; |
29120 | DREGu32((Opcode >> 9) & 7) = res; |
29121 | POST_IO |
29122 | RET(18) |
29123 | } |
29124 | |
29125 | // SUBaD |
29126 | OPCODE(0x90B9) |
29127 | { |
29128 | u32 adr, res; |
29129 | u32 src, dst; |
29130 | |
29131 | FETCH_LONG(adr); |
29132 | PRE_IO |
29133 | READ_LONG_F(adr, src) |
29134 | dst = DREGu32((Opcode >> 9) & 7); |
29135 | res = dst - src; |
29136 | flag_NotZ = res; |
29137 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29138 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29139 | flag_N = res >> 24; |
29140 | DREGu32((Opcode >> 9) & 7) = res; |
29141 | POST_IO |
29142 | RET(22) |
29143 | } |
29144 | |
29145 | // SUBaD |
29146 | OPCODE(0x90BA) |
29147 | { |
29148 | u32 adr, res; |
29149 | u32 src, dst; |
29150 | |
be26eb23 |
29151 | adr = GET_SWORD + GET_PC; |
70357ce5 |
29152 | PC++; |
29153 | PRE_IO |
29154 | READ_LONG_F(adr, src) |
29155 | dst = DREGu32((Opcode >> 9) & 7); |
29156 | res = dst - src; |
29157 | flag_NotZ = res; |
29158 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29159 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29160 | flag_N = res >> 24; |
29161 | DREGu32((Opcode >> 9) & 7) = res; |
29162 | POST_IO |
29163 | RET(18) |
29164 | } |
29165 | |
29166 | // SUBaD |
29167 | OPCODE(0x90BB) |
29168 | { |
29169 | u32 adr, res; |
29170 | u32 src, dst; |
29171 | |
be26eb23 |
29172 | adr = GET_PC; |
70357ce5 |
29173 | DECODE_EXT_WORD |
29174 | PRE_IO |
29175 | READ_LONG_F(adr, src) |
29176 | dst = DREGu32((Opcode >> 9) & 7); |
29177 | res = dst - src; |
29178 | flag_NotZ = res; |
29179 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29180 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29181 | flag_N = res >> 24; |
29182 | DREGu32((Opcode >> 9) & 7) = res; |
29183 | POST_IO |
29184 | RET(20) |
29185 | } |
29186 | |
29187 | // SUBaD |
29188 | OPCODE(0x90BC) |
29189 | { |
29190 | u32 adr, res; |
29191 | u32 src, dst; |
29192 | |
29193 | FETCH_LONG(src); |
29194 | dst = DREGu32((Opcode >> 9) & 7); |
29195 | res = dst - src; |
29196 | flag_NotZ = res; |
29197 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29198 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29199 | flag_N = res >> 24; |
29200 | DREGu32((Opcode >> 9) & 7) = res; |
29201 | RET(16) |
29202 | } |
29203 | |
29204 | // SUBaD |
29205 | OPCODE(0x909F) |
29206 | { |
29207 | u32 adr, res; |
29208 | u32 src, dst; |
29209 | |
29210 | adr = AREG(7); |
29211 | AREG(7) += 4; |
29212 | PRE_IO |
29213 | READ_LONG_F(adr, src) |
29214 | dst = DREGu32((Opcode >> 9) & 7); |
29215 | res = dst - src; |
29216 | flag_NotZ = res; |
29217 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29218 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29219 | flag_N = res >> 24; |
29220 | DREGu32((Opcode >> 9) & 7) = res; |
29221 | POST_IO |
29222 | RET(14) |
29223 | } |
29224 | |
29225 | // SUBaD |
29226 | OPCODE(0x90A7) |
29227 | { |
29228 | u32 adr, res; |
29229 | u32 src, dst; |
29230 | |
29231 | adr = AREG(7) - 4; |
29232 | AREG(7) = adr; |
29233 | PRE_IO |
29234 | READ_LONG_F(adr, src) |
29235 | dst = DREGu32((Opcode >> 9) & 7); |
29236 | res = dst - src; |
29237 | flag_NotZ = res; |
29238 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29239 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29240 | flag_N = res >> 24; |
29241 | DREGu32((Opcode >> 9) & 7) = res; |
29242 | POST_IO |
29243 | RET(16) |
29244 | } |
29245 | |
29246 | // SUBDa |
29247 | OPCODE(0x9110) |
29248 | { |
29249 | u32 adr, res; |
29250 | u32 src, dst; |
29251 | |
29252 | src = DREGu8((Opcode >> 9) & 7); |
29253 | adr = AREG((Opcode >> 0) & 7); |
29254 | PRE_IO |
29255 | READ_BYTE_F(adr, dst) |
29256 | res = dst - src; |
29257 | flag_N = flag_X = flag_C = res; |
29258 | flag_V = (src ^ dst) & (res ^ dst); |
29259 | flag_NotZ = res & 0xFF; |
29260 | WRITE_BYTE_F(adr, res) |
29261 | POST_IO |
29262 | RET(12) |
29263 | } |
29264 | |
29265 | // SUBDa |
29266 | OPCODE(0x9118) |
29267 | { |
29268 | u32 adr, res; |
29269 | u32 src, dst; |
29270 | |
29271 | src = DREGu8((Opcode >> 9) & 7); |
29272 | adr = AREG((Opcode >> 0) & 7); |
29273 | AREG((Opcode >> 0) & 7) += 1; |
29274 | PRE_IO |
29275 | READ_BYTE_F(adr, dst) |
29276 | res = dst - src; |
29277 | flag_N = flag_X = flag_C = res; |
29278 | flag_V = (src ^ dst) & (res ^ dst); |
29279 | flag_NotZ = res & 0xFF; |
29280 | WRITE_BYTE_F(adr, res) |
29281 | POST_IO |
29282 | RET(12) |
29283 | } |
29284 | |
29285 | // SUBDa |
29286 | OPCODE(0x9120) |
29287 | { |
29288 | u32 adr, res; |
29289 | u32 src, dst; |
29290 | |
29291 | src = DREGu8((Opcode >> 9) & 7); |
29292 | adr = AREG((Opcode >> 0) & 7) - 1; |
29293 | AREG((Opcode >> 0) & 7) = adr; |
29294 | PRE_IO |
29295 | READ_BYTE_F(adr, dst) |
29296 | res = dst - src; |
29297 | flag_N = flag_X = flag_C = res; |
29298 | flag_V = (src ^ dst) & (res ^ dst); |
29299 | flag_NotZ = res & 0xFF; |
29300 | WRITE_BYTE_F(adr, res) |
29301 | POST_IO |
29302 | RET(14) |
29303 | } |
29304 | |
29305 | // SUBDa |
29306 | OPCODE(0x9128) |
29307 | { |
29308 | u32 adr, res; |
29309 | u32 src, dst; |
29310 | |
29311 | src = DREGu8((Opcode >> 9) & 7); |
29312 | FETCH_SWORD(adr); |
29313 | adr += AREG((Opcode >> 0) & 7); |
29314 | PRE_IO |
29315 | READ_BYTE_F(adr, dst) |
29316 | res = dst - src; |
29317 | flag_N = flag_X = flag_C = res; |
29318 | flag_V = (src ^ dst) & (res ^ dst); |
29319 | flag_NotZ = res & 0xFF; |
29320 | WRITE_BYTE_F(adr, res) |
29321 | POST_IO |
29322 | RET(16) |
29323 | } |
29324 | |
29325 | // SUBDa |
29326 | OPCODE(0x9130) |
29327 | { |
29328 | u32 adr, res; |
29329 | u32 src, dst; |
29330 | |
29331 | src = DREGu8((Opcode >> 9) & 7); |
29332 | adr = AREG((Opcode >> 0) & 7); |
29333 | DECODE_EXT_WORD |
29334 | PRE_IO |
29335 | READ_BYTE_F(adr, dst) |
29336 | res = dst - src; |
29337 | flag_N = flag_X = flag_C = res; |
29338 | flag_V = (src ^ dst) & (res ^ dst); |
29339 | flag_NotZ = res & 0xFF; |
29340 | WRITE_BYTE_F(adr, res) |
29341 | POST_IO |
29342 | RET(18) |
29343 | } |
29344 | |
29345 | // SUBDa |
29346 | OPCODE(0x9138) |
29347 | { |
29348 | u32 adr, res; |
29349 | u32 src, dst; |
29350 | |
29351 | src = DREGu8((Opcode >> 9) & 7); |
29352 | FETCH_SWORD(adr); |
29353 | PRE_IO |
29354 | READ_BYTE_F(adr, dst) |
29355 | res = dst - src; |
29356 | flag_N = flag_X = flag_C = res; |
29357 | flag_V = (src ^ dst) & (res ^ dst); |
29358 | flag_NotZ = res & 0xFF; |
29359 | WRITE_BYTE_F(adr, res) |
29360 | POST_IO |
29361 | RET(16) |
29362 | } |
29363 | |
29364 | // SUBDa |
29365 | OPCODE(0x9139) |
29366 | { |
29367 | u32 adr, res; |
29368 | u32 src, dst; |
29369 | |
29370 | src = DREGu8((Opcode >> 9) & 7); |
29371 | FETCH_LONG(adr); |
29372 | PRE_IO |
29373 | READ_BYTE_F(adr, dst) |
29374 | res = dst - src; |
29375 | flag_N = flag_X = flag_C = res; |
29376 | flag_V = (src ^ dst) & (res ^ dst); |
29377 | flag_NotZ = res & 0xFF; |
29378 | WRITE_BYTE_F(adr, res) |
29379 | POST_IO |
29380 | RET(20) |
29381 | } |
29382 | |
29383 | // SUBDa |
29384 | OPCODE(0x911F) |
29385 | { |
29386 | u32 adr, res; |
29387 | u32 src, dst; |
29388 | |
29389 | src = DREGu8((Opcode >> 9) & 7); |
29390 | adr = AREG(7); |
29391 | AREG(7) += 2; |
29392 | PRE_IO |
29393 | READ_BYTE_F(adr, dst) |
29394 | res = dst - src; |
29395 | flag_N = flag_X = flag_C = res; |
29396 | flag_V = (src ^ dst) & (res ^ dst); |
29397 | flag_NotZ = res & 0xFF; |
29398 | WRITE_BYTE_F(adr, res) |
29399 | POST_IO |
29400 | RET(12) |
29401 | } |
29402 | |
29403 | // SUBDa |
29404 | OPCODE(0x9127) |
29405 | { |
29406 | u32 adr, res; |
29407 | u32 src, dst; |
29408 | |
29409 | src = DREGu8((Opcode >> 9) & 7); |
29410 | adr = AREG(7) - 2; |
29411 | AREG(7) = adr; |
29412 | PRE_IO |
29413 | READ_BYTE_F(adr, dst) |
29414 | res = dst - src; |
29415 | flag_N = flag_X = flag_C = res; |
29416 | flag_V = (src ^ dst) & (res ^ dst); |
29417 | flag_NotZ = res & 0xFF; |
29418 | WRITE_BYTE_F(adr, res) |
29419 | POST_IO |
29420 | RET(14) |
29421 | } |
29422 | |
29423 | // SUBDa |
29424 | OPCODE(0x9150) |
29425 | { |
29426 | u32 adr, res; |
29427 | u32 src, dst; |
29428 | |
29429 | src = DREGu16((Opcode >> 9) & 7); |
29430 | adr = AREG((Opcode >> 0) & 7); |
29431 | PRE_IO |
29432 | READ_WORD_F(adr, dst) |
29433 | res = dst - src; |
29434 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29435 | flag_N = flag_X = flag_C = res >> 8; |
29436 | flag_NotZ = res & 0xFFFF; |
29437 | WRITE_WORD_F(adr, res) |
29438 | POST_IO |
29439 | RET(12) |
29440 | } |
29441 | |
29442 | // SUBDa |
29443 | OPCODE(0x9158) |
29444 | { |
29445 | u32 adr, res; |
29446 | u32 src, dst; |
29447 | |
29448 | src = DREGu16((Opcode >> 9) & 7); |
29449 | adr = AREG((Opcode >> 0) & 7); |
29450 | AREG((Opcode >> 0) & 7) += 2; |
29451 | PRE_IO |
29452 | READ_WORD_F(adr, dst) |
29453 | res = dst - src; |
29454 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29455 | flag_N = flag_X = flag_C = res >> 8; |
29456 | flag_NotZ = res & 0xFFFF; |
29457 | WRITE_WORD_F(adr, res) |
29458 | POST_IO |
29459 | RET(12) |
29460 | } |
29461 | |
29462 | // SUBDa |
29463 | OPCODE(0x9160) |
29464 | { |
29465 | u32 adr, res; |
29466 | u32 src, dst; |
29467 | |
29468 | src = DREGu16((Opcode >> 9) & 7); |
29469 | adr = AREG((Opcode >> 0) & 7) - 2; |
29470 | AREG((Opcode >> 0) & 7) = adr; |
29471 | PRE_IO |
29472 | READ_WORD_F(adr, dst) |
29473 | res = dst - src; |
29474 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29475 | flag_N = flag_X = flag_C = res >> 8; |
29476 | flag_NotZ = res & 0xFFFF; |
29477 | WRITE_WORD_F(adr, res) |
29478 | POST_IO |
29479 | RET(14) |
29480 | } |
29481 | |
29482 | // SUBDa |
29483 | OPCODE(0x9168) |
29484 | { |
29485 | u32 adr, res; |
29486 | u32 src, dst; |
29487 | |
29488 | src = DREGu16((Opcode >> 9) & 7); |
29489 | FETCH_SWORD(adr); |
29490 | adr += AREG((Opcode >> 0) & 7); |
29491 | PRE_IO |
29492 | READ_WORD_F(adr, dst) |
29493 | res = dst - src; |
29494 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29495 | flag_N = flag_X = flag_C = res >> 8; |
29496 | flag_NotZ = res & 0xFFFF; |
29497 | WRITE_WORD_F(adr, res) |
29498 | POST_IO |
29499 | RET(16) |
29500 | } |
29501 | |
29502 | // SUBDa |
29503 | OPCODE(0x9170) |
29504 | { |
29505 | u32 adr, res; |
29506 | u32 src, dst; |
29507 | |
29508 | src = DREGu16((Opcode >> 9) & 7); |
29509 | adr = AREG((Opcode >> 0) & 7); |
29510 | DECODE_EXT_WORD |
29511 | PRE_IO |
29512 | READ_WORD_F(adr, dst) |
29513 | res = dst - src; |
29514 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29515 | flag_N = flag_X = flag_C = res >> 8; |
29516 | flag_NotZ = res & 0xFFFF; |
29517 | WRITE_WORD_F(adr, res) |
29518 | POST_IO |
29519 | RET(18) |
29520 | } |
29521 | |
29522 | // SUBDa |
29523 | OPCODE(0x9178) |
29524 | { |
29525 | u32 adr, res; |
29526 | u32 src, dst; |
29527 | |
29528 | src = DREGu16((Opcode >> 9) & 7); |
29529 | FETCH_SWORD(adr); |
29530 | PRE_IO |
29531 | READ_WORD_F(adr, dst) |
29532 | res = dst - src; |
29533 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29534 | flag_N = flag_X = flag_C = res >> 8; |
29535 | flag_NotZ = res & 0xFFFF; |
29536 | WRITE_WORD_F(adr, res) |
29537 | POST_IO |
29538 | RET(16) |
29539 | } |
29540 | |
29541 | // SUBDa |
29542 | OPCODE(0x9179) |
29543 | { |
29544 | u32 adr, res; |
29545 | u32 src, dst; |
29546 | |
29547 | src = DREGu16((Opcode >> 9) & 7); |
29548 | FETCH_LONG(adr); |
29549 | PRE_IO |
29550 | READ_WORD_F(adr, dst) |
29551 | res = dst - src; |
29552 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29553 | flag_N = flag_X = flag_C = res >> 8; |
29554 | flag_NotZ = res & 0xFFFF; |
29555 | WRITE_WORD_F(adr, res) |
29556 | POST_IO |
29557 | RET(20) |
29558 | } |
29559 | |
29560 | // SUBDa |
29561 | OPCODE(0x915F) |
29562 | { |
29563 | u32 adr, res; |
29564 | u32 src, dst; |
29565 | |
29566 | src = DREGu16((Opcode >> 9) & 7); |
29567 | adr = AREG(7); |
29568 | AREG(7) += 2; |
29569 | PRE_IO |
29570 | READ_WORD_F(adr, dst) |
29571 | res = dst - src; |
29572 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29573 | flag_N = flag_X = flag_C = res >> 8; |
29574 | flag_NotZ = res & 0xFFFF; |
29575 | WRITE_WORD_F(adr, res) |
29576 | POST_IO |
29577 | RET(12) |
29578 | } |
29579 | |
29580 | // SUBDa |
29581 | OPCODE(0x9167) |
29582 | { |
29583 | u32 adr, res; |
29584 | u32 src, dst; |
29585 | |
29586 | src = DREGu16((Opcode >> 9) & 7); |
29587 | adr = AREG(7) - 2; |
29588 | AREG(7) = adr; |
29589 | PRE_IO |
29590 | READ_WORD_F(adr, dst) |
29591 | res = dst - src; |
29592 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29593 | flag_N = flag_X = flag_C = res >> 8; |
29594 | flag_NotZ = res & 0xFFFF; |
29595 | WRITE_WORD_F(adr, res) |
29596 | POST_IO |
29597 | RET(14) |
29598 | } |
29599 | |
29600 | // SUBDa |
29601 | OPCODE(0x9190) |
29602 | { |
29603 | u32 adr, res; |
29604 | u32 src, dst; |
29605 | |
29606 | src = DREGu32((Opcode >> 9) & 7); |
29607 | adr = AREG((Opcode >> 0) & 7); |
29608 | PRE_IO |
29609 | READ_LONG_F(adr, dst) |
29610 | res = dst - src; |
29611 | flag_NotZ = res; |
29612 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29613 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29614 | flag_N = res >> 24; |
29615 | WRITE_LONG_F(adr, res) |
29616 | POST_IO |
29617 | RET(20) |
29618 | } |
29619 | |
29620 | // SUBDa |
29621 | OPCODE(0x9198) |
29622 | { |
29623 | u32 adr, res; |
29624 | u32 src, dst; |
29625 | |
29626 | src = DREGu32((Opcode >> 9) & 7); |
29627 | adr = AREG((Opcode >> 0) & 7); |
29628 | AREG((Opcode >> 0) & 7) += 4; |
29629 | PRE_IO |
29630 | READ_LONG_F(adr, dst) |
29631 | res = dst - src; |
29632 | flag_NotZ = res; |
29633 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29634 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29635 | flag_N = res >> 24; |
29636 | WRITE_LONG_F(adr, res) |
29637 | POST_IO |
29638 | RET(20) |
29639 | } |
29640 | |
29641 | // SUBDa |
29642 | OPCODE(0x91A0) |
29643 | { |
29644 | u32 adr, res; |
29645 | u32 src, dst; |
29646 | |
29647 | src = DREGu32((Opcode >> 9) & 7); |
29648 | adr = AREG((Opcode >> 0) & 7) - 4; |
29649 | AREG((Opcode >> 0) & 7) = adr; |
29650 | PRE_IO |
29651 | READ_LONG_F(adr, dst) |
29652 | res = dst - src; |
29653 | flag_NotZ = res; |
29654 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29655 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29656 | flag_N = res >> 24; |
29657 | WRITE_LONG_F(adr, res) |
29658 | POST_IO |
29659 | RET(22) |
29660 | } |
29661 | |
29662 | // SUBDa |
29663 | OPCODE(0x91A8) |
29664 | { |
29665 | u32 adr, res; |
29666 | u32 src, dst; |
29667 | |
29668 | src = DREGu32((Opcode >> 9) & 7); |
29669 | FETCH_SWORD(adr); |
29670 | adr += AREG((Opcode >> 0) & 7); |
29671 | PRE_IO |
29672 | READ_LONG_F(adr, dst) |
29673 | res = dst - src; |
29674 | flag_NotZ = res; |
29675 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29676 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29677 | flag_N = res >> 24; |
29678 | WRITE_LONG_F(adr, res) |
29679 | POST_IO |
29680 | RET(24) |
29681 | } |
29682 | |
29683 | // SUBDa |
29684 | OPCODE(0x91B0) |
29685 | { |
29686 | u32 adr, res; |
29687 | u32 src, dst; |
29688 | |
29689 | src = DREGu32((Opcode >> 9) & 7); |
29690 | adr = AREG((Opcode >> 0) & 7); |
29691 | DECODE_EXT_WORD |
29692 | PRE_IO |
29693 | READ_LONG_F(adr, dst) |
29694 | res = dst - src; |
29695 | flag_NotZ = res; |
29696 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29697 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29698 | flag_N = res >> 24; |
29699 | WRITE_LONG_F(adr, res) |
29700 | POST_IO |
29701 | RET(26) |
29702 | } |
29703 | |
29704 | // SUBDa |
29705 | OPCODE(0x91B8) |
29706 | { |
29707 | u32 adr, res; |
29708 | u32 src, dst; |
29709 | |
29710 | src = DREGu32((Opcode >> 9) & 7); |
29711 | FETCH_SWORD(adr); |
29712 | PRE_IO |
29713 | READ_LONG_F(adr, dst) |
29714 | res = dst - src; |
29715 | flag_NotZ = res; |
29716 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29717 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29718 | flag_N = res >> 24; |
29719 | WRITE_LONG_F(adr, res) |
29720 | POST_IO |
29721 | RET(24) |
29722 | } |
29723 | |
29724 | // SUBDa |
29725 | OPCODE(0x91B9) |
29726 | { |
29727 | u32 adr, res; |
29728 | u32 src, dst; |
29729 | |
29730 | src = DREGu32((Opcode >> 9) & 7); |
29731 | FETCH_LONG(adr); |
29732 | PRE_IO |
29733 | READ_LONG_F(adr, dst) |
29734 | res = dst - src; |
29735 | flag_NotZ = res; |
29736 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29737 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29738 | flag_N = res >> 24; |
29739 | WRITE_LONG_F(adr, res) |
29740 | POST_IO |
29741 | RET(28) |
29742 | } |
29743 | |
29744 | // SUBDa |
29745 | OPCODE(0x919F) |
29746 | { |
29747 | u32 adr, res; |
29748 | u32 src, dst; |
29749 | |
29750 | src = DREGu32((Opcode >> 9) & 7); |
29751 | adr = AREG(7); |
29752 | AREG(7) += 4; |
29753 | PRE_IO |
29754 | READ_LONG_F(adr, dst) |
29755 | res = dst - src; |
29756 | flag_NotZ = res; |
29757 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29758 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29759 | flag_N = res >> 24; |
29760 | WRITE_LONG_F(adr, res) |
29761 | POST_IO |
29762 | RET(20) |
29763 | } |
29764 | |
29765 | // SUBDa |
29766 | OPCODE(0x91A7) |
29767 | { |
29768 | u32 adr, res; |
29769 | u32 src, dst; |
29770 | |
29771 | src = DREGu32((Opcode >> 9) & 7); |
29772 | adr = AREG(7) - 4; |
29773 | AREG(7) = adr; |
29774 | PRE_IO |
29775 | READ_LONG_F(adr, dst) |
29776 | res = dst - src; |
29777 | flag_NotZ = res; |
29778 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29779 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29780 | flag_N = res >> 24; |
29781 | WRITE_LONG_F(adr, res) |
29782 | POST_IO |
29783 | RET(22) |
29784 | } |
29785 | |
29786 | // SUBX |
29787 | OPCODE(0x9100) |
29788 | { |
29789 | u32 adr, res; |
29790 | u32 src, dst; |
29791 | |
29792 | src = DREGu8((Opcode >> 0) & 7); |
29793 | dst = DREGu8((Opcode >> 9) & 7); |
29794 | res = dst - src - ((flag_X >> 8) & 1); |
29795 | flag_N = flag_X = flag_C = res; |
29796 | flag_V = (src ^ dst) & (res ^ dst); |
29797 | flag_NotZ |= res & 0xFF; |
29798 | DREGu8((Opcode >> 9) & 7) = res; |
29799 | RET(4) |
29800 | } |
29801 | |
29802 | // SUBX |
29803 | OPCODE(0x9140) |
29804 | { |
29805 | u32 adr, res; |
29806 | u32 src, dst; |
29807 | |
29808 | src = DREGu16((Opcode >> 0) & 7); |
29809 | dst = DREGu16((Opcode >> 9) & 7); |
29810 | res = dst - src - ((flag_X >> 8) & 1); |
29811 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29812 | flag_N = flag_X = flag_C = res >> 8; |
29813 | flag_NotZ |= res & 0xFFFF; |
29814 | DREGu16((Opcode >> 9) & 7) = res; |
29815 | RET(4) |
29816 | } |
29817 | |
29818 | // SUBX |
29819 | OPCODE(0x9180) |
29820 | { |
29821 | u32 adr, res; |
29822 | u32 src, dst; |
29823 | |
29824 | src = DREGu32((Opcode >> 0) & 7); |
29825 | dst = DREGu32((Opcode >> 9) & 7); |
29826 | res = dst - src - ((flag_X >> 8) & 1); |
29827 | flag_NotZ |= res; |
29828 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29829 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29830 | flag_N = res >> 24; |
29831 | DREGu32((Opcode >> 9) & 7) = res; |
29832 | RET(8) |
29833 | } |
29834 | |
29835 | // SUBXM |
29836 | OPCODE(0x9108) |
29837 | { |
29838 | u32 adr, res; |
29839 | u32 src, dst; |
29840 | |
29841 | adr = AREG((Opcode >> 0) & 7) - 1; |
29842 | AREG((Opcode >> 0) & 7) = adr; |
29843 | PRE_IO |
29844 | READ_BYTE_F(adr, src) |
29845 | adr = AREG((Opcode >> 9) & 7) - 1; |
29846 | AREG((Opcode >> 9) & 7) = adr; |
29847 | READ_BYTE_F(adr, dst) |
29848 | res = dst - src - ((flag_X >> 8) & 1); |
29849 | flag_N = flag_X = flag_C = res; |
29850 | flag_V = (src ^ dst) & (res ^ dst); |
29851 | flag_NotZ |= res & 0xFF; |
29852 | WRITE_BYTE_F(adr, res) |
29853 | POST_IO |
29854 | RET(18) |
29855 | } |
29856 | |
29857 | // SUBXM |
29858 | OPCODE(0x9148) |
29859 | { |
29860 | u32 adr, res; |
29861 | u32 src, dst; |
29862 | |
29863 | adr = AREG((Opcode >> 0) & 7) - 2; |
29864 | AREG((Opcode >> 0) & 7) = adr; |
29865 | PRE_IO |
29866 | READ_WORD_F(adr, src) |
29867 | adr = AREG((Opcode >> 9) & 7) - 2; |
29868 | AREG((Opcode >> 9) & 7) = adr; |
29869 | READ_WORD_F(adr, dst) |
29870 | res = dst - src - ((flag_X >> 8) & 1); |
29871 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29872 | flag_N = flag_X = flag_C = res >> 8; |
29873 | flag_NotZ |= res & 0xFFFF; |
29874 | WRITE_WORD_F(adr, res) |
29875 | POST_IO |
29876 | RET(18) |
29877 | } |
29878 | |
29879 | // SUBXM |
29880 | OPCODE(0x9188) |
29881 | { |
29882 | u32 adr, res; |
29883 | u32 src, dst; |
29884 | |
29885 | adr = AREG((Opcode >> 0) & 7) - 4; |
29886 | AREG((Opcode >> 0) & 7) = adr; |
29887 | PRE_IO |
29888 | READ_LONG_F(adr, src) |
29889 | adr = AREG((Opcode >> 9) & 7) - 4; |
29890 | AREG((Opcode >> 9) & 7) = adr; |
29891 | READ_LONG_F(adr, dst) |
29892 | res = dst - src - ((flag_X >> 8) & 1); |
29893 | flag_NotZ |= res; |
29894 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29895 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29896 | flag_N = res >> 24; |
29897 | WRITE_LONG_F(adr, res) |
29898 | POST_IO |
29899 | RET(30) |
29900 | } |
29901 | |
29902 | // SUBX7M |
29903 | OPCODE(0x910F) |
29904 | { |
29905 | u32 adr, res; |
29906 | u32 src, dst; |
29907 | |
29908 | adr = AREG(7) - 2; |
29909 | AREG(7) = adr; |
29910 | PRE_IO |
29911 | READ_BYTE_F(adr, src) |
29912 | adr = AREG((Opcode >> 9) & 7) - 1; |
29913 | AREG((Opcode >> 9) & 7) = adr; |
29914 | READ_BYTE_F(adr, dst) |
29915 | res = dst - src - ((flag_X >> 8) & 1); |
29916 | flag_N = flag_X = flag_C = res; |
29917 | flag_V = (src ^ dst) & (res ^ dst); |
29918 | flag_NotZ |= res & 0xFF; |
29919 | WRITE_BYTE_F(adr, res) |
29920 | POST_IO |
29921 | RET(18) |
29922 | } |
29923 | |
29924 | // SUBX7M |
29925 | OPCODE(0x914F) |
29926 | { |
29927 | u32 adr, res; |
29928 | u32 src, dst; |
29929 | |
29930 | adr = AREG(7) - 2; |
29931 | AREG(7) = adr; |
29932 | PRE_IO |
29933 | READ_WORD_F(adr, src) |
29934 | adr = AREG((Opcode >> 9) & 7) - 2; |
29935 | AREG((Opcode >> 9) & 7) = adr; |
29936 | READ_WORD_F(adr, dst) |
29937 | res = dst - src - ((flag_X >> 8) & 1); |
29938 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29939 | flag_N = flag_X = flag_C = res >> 8; |
29940 | flag_NotZ |= res & 0xFFFF; |
29941 | WRITE_WORD_F(adr, res) |
29942 | POST_IO |
29943 | RET(18) |
29944 | } |
29945 | |
29946 | // SUBX7M |
29947 | OPCODE(0x918F) |
29948 | { |
29949 | u32 adr, res; |
29950 | u32 src, dst; |
29951 | |
29952 | adr = AREG(7) - 4; |
29953 | AREG(7) = adr; |
29954 | PRE_IO |
29955 | READ_LONG_F(adr, src) |
29956 | adr = AREG((Opcode >> 9) & 7) - 4; |
29957 | AREG((Opcode >> 9) & 7) = adr; |
29958 | READ_LONG_F(adr, dst) |
29959 | res = dst - src - ((flag_X >> 8) & 1); |
29960 | flag_NotZ |= res; |
29961 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29962 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29963 | flag_N = res >> 24; |
29964 | WRITE_LONG_F(adr, res) |
29965 | POST_IO |
29966 | RET(30) |
29967 | } |
29968 | |
29969 | // SUBXM7 |
29970 | OPCODE(0x9F08) |
29971 | { |
29972 | u32 adr, res; |
29973 | u32 src, dst; |
29974 | |
29975 | adr = AREG((Opcode >> 0) & 7) - 1; |
29976 | AREG((Opcode >> 0) & 7) = adr; |
29977 | PRE_IO |
29978 | READ_BYTE_F(adr, src) |
29979 | adr = AREG(7) - 2; |
29980 | AREG(7) = adr; |
29981 | READ_BYTE_F(adr, dst) |
29982 | res = dst - src - ((flag_X >> 8) & 1); |
29983 | flag_N = flag_X = flag_C = res; |
29984 | flag_V = (src ^ dst) & (res ^ dst); |
29985 | flag_NotZ |= res & 0xFF; |
29986 | WRITE_BYTE_F(adr, res) |
29987 | POST_IO |
29988 | RET(18) |
29989 | } |
29990 | |
29991 | // SUBXM7 |
29992 | OPCODE(0x9F48) |
29993 | { |
29994 | u32 adr, res; |
29995 | u32 src, dst; |
29996 | |
29997 | adr = AREG((Opcode >> 0) & 7) - 2; |
29998 | AREG((Opcode >> 0) & 7) = adr; |
29999 | PRE_IO |
30000 | READ_WORD_F(adr, src) |
30001 | adr = AREG(7) - 2; |
30002 | AREG(7) = adr; |
30003 | READ_WORD_F(adr, dst) |
30004 | res = dst - src - ((flag_X >> 8) & 1); |
30005 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30006 | flag_N = flag_X = flag_C = res >> 8; |
30007 | flag_NotZ |= res & 0xFFFF; |
30008 | WRITE_WORD_F(adr, res) |
30009 | POST_IO |
30010 | RET(18) |
30011 | } |
30012 | |
30013 | // SUBXM7 |
30014 | OPCODE(0x9F88) |
30015 | { |
30016 | u32 adr, res; |
30017 | u32 src, dst; |
30018 | |
30019 | adr = AREG((Opcode >> 0) & 7) - 4; |
30020 | AREG((Opcode >> 0) & 7) = adr; |
30021 | PRE_IO |
30022 | READ_LONG_F(adr, src) |
30023 | adr = AREG(7) - 4; |
30024 | AREG(7) = adr; |
30025 | READ_LONG_F(adr, dst) |
30026 | res = dst - src - ((flag_X >> 8) & 1); |
30027 | flag_NotZ |= res; |
30028 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30029 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30030 | flag_N = res >> 24; |
30031 | WRITE_LONG_F(adr, res) |
30032 | POST_IO |
30033 | RET(30) |
30034 | } |
30035 | |
30036 | // SUBX7M7 |
30037 | OPCODE(0x9F0F) |
30038 | { |
30039 | u32 adr, res; |
30040 | u32 src, dst; |
30041 | |
30042 | adr = AREG(7) - 2; |
30043 | AREG(7) = adr; |
30044 | PRE_IO |
30045 | READ_BYTE_F(adr, src) |
30046 | adr = AREG(7) - 2; |
30047 | AREG(7) = adr; |
30048 | READ_BYTE_F(adr, dst) |
30049 | res = dst - src - ((flag_X >> 8) & 1); |
30050 | flag_N = flag_X = flag_C = res; |
30051 | flag_V = (src ^ dst) & (res ^ dst); |
30052 | flag_NotZ |= res & 0xFF; |
30053 | WRITE_BYTE_F(adr, res) |
30054 | POST_IO |
30055 | RET(18) |
30056 | } |
30057 | |
30058 | // SUBX7M7 |
30059 | OPCODE(0x9F4F) |
30060 | { |
30061 | u32 adr, res; |
30062 | u32 src, dst; |
30063 | |
30064 | adr = AREG(7) - 2; |
30065 | AREG(7) = adr; |
30066 | PRE_IO |
30067 | READ_WORD_F(adr, src) |
30068 | adr = AREG(7) - 2; |
30069 | AREG(7) = adr; |
30070 | READ_WORD_F(adr, dst) |
30071 | res = dst - src - ((flag_X >> 8) & 1); |
30072 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30073 | flag_N = flag_X = flag_C = res >> 8; |
30074 | flag_NotZ |= res & 0xFFFF; |
30075 | WRITE_WORD_F(adr, res) |
30076 | POST_IO |
30077 | RET(18) |
30078 | } |
30079 | |
30080 | // SUBX7M7 |
30081 | OPCODE(0x9F8F) |
30082 | { |
30083 | u32 adr, res; |
30084 | u32 src, dst; |
30085 | |
30086 | adr = AREG(7) - 4; |
30087 | AREG(7) = adr; |
30088 | PRE_IO |
30089 | READ_LONG_F(adr, src) |
30090 | adr = AREG(7) - 4; |
30091 | AREG(7) = adr; |
30092 | READ_LONG_F(adr, dst) |
30093 | res = dst - src - ((flag_X >> 8) & 1); |
30094 | flag_NotZ |= res; |
30095 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30096 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30097 | flag_N = res >> 24; |
30098 | WRITE_LONG_F(adr, res) |
30099 | POST_IO |
30100 | RET(30) |
30101 | } |
30102 | |
30103 | // SUBA |
30104 | OPCODE(0x90C0) |
30105 | { |
30106 | u32 adr, res; |
30107 | u32 src, dst; |
30108 | |
30109 | src = (s32)DREGs16((Opcode >> 0) & 7); |
30110 | dst = AREGu32((Opcode >> 9) & 7); |
30111 | res = dst - src; |
30112 | AREG((Opcode >> 9) & 7) = res; |
30113 | RET(8) |
30114 | } |
30115 | |
30116 | // SUBA |
30117 | OPCODE(0x90C8) |
30118 | { |
30119 | u32 adr, res; |
30120 | u32 src, dst; |
30121 | |
30122 | src = (s32)AREGs16((Opcode >> 0) & 7); |
30123 | dst = AREGu32((Opcode >> 9) & 7); |
30124 | res = dst - src; |
30125 | AREG((Opcode >> 9) & 7) = res; |
30126 | RET(8) |
30127 | } |
30128 | |
30129 | // SUBA |
30130 | OPCODE(0x90D0) |
30131 | { |
30132 | u32 adr, res; |
30133 | u32 src, dst; |
30134 | |
30135 | adr = AREG((Opcode >> 0) & 7); |
30136 | PRE_IO |
30137 | READSX_WORD_F(adr, src) |
30138 | dst = AREGu32((Opcode >> 9) & 7); |
30139 | res = dst - src; |
30140 | AREG((Opcode >> 9) & 7) = res; |
30141 | POST_IO |
9d917eea |
30142 | #ifdef USE_CYCLONE_TIMING |
30143 | RET(12) |
30144 | #else |
70357ce5 |
30145 | RET(10) |
9d917eea |
30146 | #endif |
70357ce5 |
30147 | } |
30148 | |
30149 | // SUBA |
30150 | OPCODE(0x90D8) |
30151 | { |
30152 | u32 adr, res; |
30153 | u32 src, dst; |
30154 | |
30155 | adr = AREG((Opcode >> 0) & 7); |
30156 | AREG((Opcode >> 0) & 7) += 2; |
30157 | PRE_IO |
30158 | READSX_WORD_F(adr, src) |
30159 | dst = AREGu32((Opcode >> 9) & 7); |
30160 | res = dst - src; |
30161 | AREG((Opcode >> 9) & 7) = res; |
30162 | POST_IO |
9d917eea |
30163 | #ifdef USE_CYCLONE_TIMING |
30164 | RET(12) |
30165 | #else |
70357ce5 |
30166 | RET(10) |
9d917eea |
30167 | #endif |
70357ce5 |
30168 | } |
30169 | |
30170 | // SUBA |
30171 | OPCODE(0x90E0) |
30172 | { |
30173 | u32 adr, res; |
30174 | u32 src, dst; |
30175 | |
30176 | adr = AREG((Opcode >> 0) & 7) - 2; |
30177 | AREG((Opcode >> 0) & 7) = adr; |
30178 | PRE_IO |
30179 | READSX_WORD_F(adr, src) |
30180 | dst = AREGu32((Opcode >> 9) & 7); |
30181 | res = dst - src; |
30182 | AREG((Opcode >> 9) & 7) = res; |
30183 | POST_IO |
9d917eea |
30184 | #ifdef USE_CYCLONE_TIMING |
30185 | RET(14) |
30186 | #else |
70357ce5 |
30187 | RET(12) |
9d917eea |
30188 | #endif |
70357ce5 |
30189 | } |
30190 | |
30191 | // SUBA |
30192 | OPCODE(0x90E8) |
30193 | { |
30194 | u32 adr, res; |
30195 | u32 src, dst; |
30196 | |
30197 | FETCH_SWORD(adr); |
30198 | adr += AREG((Opcode >> 0) & 7); |
30199 | PRE_IO |
30200 | READSX_WORD_F(adr, src) |
30201 | dst = AREGu32((Opcode >> 9) & 7); |
30202 | res = dst - src; |
30203 | AREG((Opcode >> 9) & 7) = res; |
30204 | POST_IO |
9d917eea |
30205 | #ifdef USE_CYCLONE_TIMING |
30206 | RET(16) |
30207 | #else |
70357ce5 |
30208 | RET(14) |
9d917eea |
30209 | #endif |
70357ce5 |
30210 | } |
30211 | |
30212 | // SUBA |
30213 | OPCODE(0x90F0) |
30214 | { |
30215 | u32 adr, res; |
30216 | u32 src, dst; |
30217 | |
30218 | adr = AREG((Opcode >> 0) & 7); |
30219 | DECODE_EXT_WORD |
30220 | PRE_IO |
30221 | READSX_WORD_F(adr, src) |
30222 | dst = AREGu32((Opcode >> 9) & 7); |
30223 | res = dst - src; |
30224 | AREG((Opcode >> 9) & 7) = res; |
30225 | POST_IO |
9d917eea |
30226 | #ifdef USE_CYCLONE_TIMING |
30227 | RET(18) |
30228 | #else |
70357ce5 |
30229 | RET(16) |
9d917eea |
30230 | #endif |
70357ce5 |
30231 | } |
30232 | |
30233 | // SUBA |
30234 | OPCODE(0x90F8) |
30235 | { |
30236 | u32 adr, res; |
30237 | u32 src, dst; |
30238 | |
30239 | FETCH_SWORD(adr); |
30240 | PRE_IO |
30241 | READSX_WORD_F(adr, src) |
30242 | dst = AREGu32((Opcode >> 9) & 7); |
30243 | res = dst - src; |
30244 | AREG((Opcode >> 9) & 7) = res; |
30245 | POST_IO |
9d917eea |
30246 | #ifdef USE_CYCLONE_TIMING |
30247 | RET(16) |
30248 | #else |
70357ce5 |
30249 | RET(14) |
9d917eea |
30250 | #endif |
70357ce5 |
30251 | } |
30252 | |
30253 | // SUBA |
30254 | OPCODE(0x90F9) |
30255 | { |
30256 | u32 adr, res; |
30257 | u32 src, dst; |
30258 | |
30259 | FETCH_LONG(adr); |
30260 | PRE_IO |
30261 | READSX_WORD_F(adr, src) |
30262 | dst = AREGu32((Opcode >> 9) & 7); |
30263 | res = dst - src; |
30264 | AREG((Opcode >> 9) & 7) = res; |
30265 | POST_IO |
9d917eea |
30266 | #ifdef USE_CYCLONE_TIMING |
30267 | RET(20) |
30268 | #else |
70357ce5 |
30269 | RET(18) |
9d917eea |
30270 | #endif |
70357ce5 |
30271 | } |
30272 | |
30273 | // SUBA |
30274 | OPCODE(0x90FA) |
30275 | { |
30276 | u32 adr, res; |
30277 | u32 src, dst; |
30278 | |
be26eb23 |
30279 | adr = GET_SWORD + GET_PC; |
70357ce5 |
30280 | PC++; |
30281 | PRE_IO |
30282 | READSX_WORD_F(adr, src) |
30283 | dst = AREGu32((Opcode >> 9) & 7); |
30284 | res = dst - src; |
30285 | AREG((Opcode >> 9) & 7) = res; |
30286 | POST_IO |
9d917eea |
30287 | #ifdef USE_CYCLONE_TIMING |
30288 | RET(16) |
30289 | #else |
70357ce5 |
30290 | RET(14) |
9d917eea |
30291 | #endif |
70357ce5 |
30292 | } |
30293 | |
30294 | // SUBA |
30295 | OPCODE(0x90FB) |
30296 | { |
30297 | u32 adr, res; |
30298 | u32 src, dst; |
30299 | |
be26eb23 |
30300 | adr = GET_PC; |
70357ce5 |
30301 | DECODE_EXT_WORD |
30302 | PRE_IO |
30303 | READSX_WORD_F(adr, src) |
30304 | dst = AREGu32((Opcode >> 9) & 7); |
30305 | res = dst - src; |
30306 | AREG((Opcode >> 9) & 7) = res; |
30307 | POST_IO |
9d917eea |
30308 | #ifdef USE_CYCLONE_TIMING |
30309 | RET(18) |
30310 | #else |
70357ce5 |
30311 | RET(16) |
9d917eea |
30312 | #endif |
70357ce5 |
30313 | } |
30314 | |
30315 | // SUBA |
30316 | OPCODE(0x90FC) |
30317 | { |
30318 | u32 adr, res; |
30319 | u32 src, dst; |
30320 | |
30321 | FETCH_SWORD(src); |
30322 | dst = AREGu32((Opcode >> 9) & 7); |
30323 | res = dst - src; |
30324 | AREG((Opcode >> 9) & 7) = res; |
30325 | RET(12) |
30326 | } |
30327 | |
30328 | // SUBA |
30329 | OPCODE(0x90DF) |
30330 | { |
30331 | u32 adr, res; |
30332 | u32 src, dst; |
30333 | |
30334 | adr = AREG(7); |
30335 | AREG(7) += 2; |
30336 | PRE_IO |
30337 | READSX_WORD_F(adr, src) |
30338 | dst = AREGu32((Opcode >> 9) & 7); |
30339 | res = dst - src; |
30340 | AREG((Opcode >> 9) & 7) = res; |
30341 | POST_IO |
9d917eea |
30342 | #ifdef USE_CYCLONE_TIMING |
30343 | RET(12) |
30344 | #else |
70357ce5 |
30345 | RET(10) |
9d917eea |
30346 | #endif |
70357ce5 |
30347 | } |
30348 | |
30349 | // SUBA |
30350 | OPCODE(0x90E7) |
30351 | { |
30352 | u32 adr, res; |
30353 | u32 src, dst; |
30354 | |
30355 | adr = AREG(7) - 2; |
30356 | AREG(7) = adr; |
30357 | PRE_IO |
30358 | READSX_WORD_F(adr, src) |
30359 | dst = AREGu32((Opcode >> 9) & 7); |
30360 | res = dst - src; |
30361 | AREG((Opcode >> 9) & 7) = res; |
30362 | POST_IO |
9d917eea |
30363 | #ifdef USE_CYCLONE_TIMING |
30364 | RET(14) |
30365 | #else |
70357ce5 |
30366 | RET(12) |
9d917eea |
30367 | #endif |
70357ce5 |
30368 | } |
30369 | |
30370 | // SUBA |
30371 | OPCODE(0x91C0) |
30372 | { |
30373 | u32 adr, res; |
30374 | u32 src, dst; |
30375 | |
30376 | src = (s32)DREGs32((Opcode >> 0) & 7); |
30377 | dst = AREGu32((Opcode >> 9) & 7); |
30378 | res = dst - src; |
30379 | AREG((Opcode >> 9) & 7) = res; |
30380 | #ifdef USE_CYCLONE_TIMING |
30381 | RET(8) |
30382 | #else |
30383 | RET(6) |
30384 | #endif |
30385 | } |
30386 | |
30387 | // SUBA |
30388 | OPCODE(0x91C8) |
30389 | { |
30390 | u32 adr, res; |
30391 | u32 src, dst; |
30392 | |
30393 | src = (s32)AREGs32((Opcode >> 0) & 7); |
30394 | dst = AREGu32((Opcode >> 9) & 7); |
30395 | res = dst - src; |
30396 | AREG((Opcode >> 9) & 7) = res; |
30397 | #ifdef USE_CYCLONE_TIMING |
30398 | RET(8) |
30399 | #else |
30400 | RET(6) |
30401 | #endif |
30402 | } |
30403 | |
30404 | // SUBA |
30405 | OPCODE(0x91D0) |
30406 | { |
30407 | u32 adr, res; |
30408 | u32 src, dst; |
30409 | |
30410 | adr = AREG((Opcode >> 0) & 7); |
30411 | PRE_IO |
30412 | READSX_LONG_F(adr, src) |
30413 | dst = AREGu32((Opcode >> 9) & 7); |
30414 | res = dst - src; |
30415 | AREG((Opcode >> 9) & 7) = res; |
30416 | POST_IO |
30417 | RET(14) |
30418 | } |
30419 | |
30420 | // SUBA |
30421 | OPCODE(0x91D8) |
30422 | { |
30423 | u32 adr, res; |
30424 | u32 src, dst; |
30425 | |
30426 | adr = AREG((Opcode >> 0) & 7); |
30427 | AREG((Opcode >> 0) & 7) += 4; |
30428 | PRE_IO |
30429 | READSX_LONG_F(adr, src) |
30430 | dst = AREGu32((Opcode >> 9) & 7); |
30431 | res = dst - src; |
30432 | AREG((Opcode >> 9) & 7) = res; |
30433 | POST_IO |
30434 | RET(14) |
30435 | } |
30436 | |
30437 | // SUBA |
30438 | OPCODE(0x91E0) |
30439 | { |
30440 | u32 adr, res; |
30441 | u32 src, dst; |
30442 | |
30443 | adr = AREG((Opcode >> 0) & 7) - 4; |
30444 | AREG((Opcode >> 0) & 7) = adr; |
30445 | PRE_IO |
30446 | READSX_LONG_F(adr, src) |
30447 | dst = AREGu32((Opcode >> 9) & 7); |
30448 | res = dst - src; |
30449 | AREG((Opcode >> 9) & 7) = res; |
30450 | POST_IO |
30451 | RET(16) |
30452 | } |
30453 | |
30454 | // SUBA |
30455 | OPCODE(0x91E8) |
30456 | { |
30457 | u32 adr, res; |
30458 | u32 src, dst; |
30459 | |
30460 | FETCH_SWORD(adr); |
30461 | adr += AREG((Opcode >> 0) & 7); |
30462 | PRE_IO |
30463 | READSX_LONG_F(adr, src) |
30464 | dst = AREGu32((Opcode >> 9) & 7); |
30465 | res = dst - src; |
30466 | AREG((Opcode >> 9) & 7) = res; |
30467 | POST_IO |
30468 | RET(18) |
30469 | } |
30470 | |
30471 | // SUBA |
30472 | OPCODE(0x91F0) |
30473 | { |
30474 | u32 adr, res; |
30475 | u32 src, dst; |
30476 | |
30477 | adr = AREG((Opcode >> 0) & 7); |
30478 | DECODE_EXT_WORD |
30479 | PRE_IO |
30480 | READSX_LONG_F(adr, src) |
30481 | dst = AREGu32((Opcode >> 9) & 7); |
30482 | res = dst - src; |
30483 | AREG((Opcode >> 9) & 7) = res; |
30484 | POST_IO |
30485 | RET(20) |
30486 | } |
30487 | |
30488 | // SUBA |
30489 | OPCODE(0x91F8) |
30490 | { |
30491 | u32 adr, res; |
30492 | u32 src, dst; |
30493 | |
30494 | FETCH_SWORD(adr); |
30495 | PRE_IO |
30496 | READSX_LONG_F(adr, src) |
30497 | dst = AREGu32((Opcode >> 9) & 7); |
30498 | res = dst - src; |
30499 | AREG((Opcode >> 9) & 7) = res; |
30500 | POST_IO |
30501 | RET(18) |
30502 | } |
30503 | |
30504 | // SUBA |
30505 | OPCODE(0x91F9) |
30506 | { |
30507 | u32 adr, res; |
30508 | u32 src, dst; |
30509 | |
30510 | FETCH_LONG(adr); |
30511 | PRE_IO |
30512 | READSX_LONG_F(adr, src) |
30513 | dst = AREGu32((Opcode >> 9) & 7); |
30514 | res = dst - src; |
30515 | AREG((Opcode >> 9) & 7) = res; |
30516 | POST_IO |
30517 | RET(22) |
30518 | } |
30519 | |
30520 | // SUBA |
30521 | OPCODE(0x91FA) |
30522 | { |
30523 | u32 adr, res; |
30524 | u32 src, dst; |
30525 | |
be26eb23 |
30526 | adr = GET_SWORD + GET_PC; |
70357ce5 |
30527 | PC++; |
30528 | PRE_IO |
30529 | READSX_LONG_F(adr, src) |
30530 | dst = AREGu32((Opcode >> 9) & 7); |
30531 | res = dst - src; |
30532 | AREG((Opcode >> 9) & 7) = res; |
30533 | POST_IO |
30534 | RET(18) |
30535 | } |
30536 | |
30537 | // SUBA |
30538 | OPCODE(0x91FB) |
30539 | { |
30540 | u32 adr, res; |
30541 | u32 src, dst; |
30542 | |
be26eb23 |
30543 | adr = GET_PC; |
70357ce5 |
30544 | DECODE_EXT_WORD |
30545 | PRE_IO |
30546 | READSX_LONG_F(adr, src) |
30547 | dst = AREGu32((Opcode >> 9) & 7); |
30548 | res = dst - src; |
30549 | AREG((Opcode >> 9) & 7) = res; |
30550 | POST_IO |
30551 | RET(20) |
30552 | } |
30553 | |
30554 | // SUBA |
30555 | OPCODE(0x91FC) |
30556 | { |
30557 | u32 adr, res; |
30558 | u32 src, dst; |
30559 | |
30560 | FETCH_LONG(src); |
30561 | dst = AREGu32((Opcode >> 9) & 7); |
30562 | res = dst - src; |
30563 | AREG((Opcode >> 9) & 7) = res; |
30564 | #ifdef USE_CYCLONE_TIMING |
30565 | RET(16) |
30566 | #else |
30567 | RET(14) |
30568 | #endif |
30569 | } |
30570 | |
30571 | // SUBA |
30572 | OPCODE(0x91DF) |
30573 | { |
30574 | u32 adr, res; |
30575 | u32 src, dst; |
30576 | |
30577 | adr = AREG(7); |
30578 | AREG(7) += 4; |
30579 | PRE_IO |
30580 | READSX_LONG_F(adr, src) |
30581 | dst = AREGu32((Opcode >> 9) & 7); |
30582 | res = dst - src; |
30583 | AREG((Opcode >> 9) & 7) = res; |
30584 | POST_IO |
30585 | RET(14) |
30586 | } |
30587 | |
30588 | // SUBA |
30589 | OPCODE(0x91E7) |
30590 | { |
30591 | u32 adr, res; |
30592 | u32 src, dst; |
30593 | |
30594 | adr = AREG(7) - 4; |
30595 | AREG(7) = adr; |
30596 | PRE_IO |
30597 | READSX_LONG_F(adr, src) |
30598 | dst = AREGu32((Opcode >> 9) & 7); |
30599 | res = dst - src; |
30600 | AREG((Opcode >> 9) & 7) = res; |
30601 | POST_IO |
30602 | RET(16) |
30603 | } |
30604 | |
30605 | // CMP |
30606 | OPCODE(0xB000) |
30607 | { |
30608 | u32 adr, res; |
30609 | u32 src, dst; |
30610 | |
30611 | src = DREGu8((Opcode >> 0) & 7); |
30612 | dst = DREGu8((Opcode >> 9) & 7); |
30613 | res = dst - src; |
30614 | flag_N = flag_C = res; |
30615 | flag_V = (src ^ dst) & (res ^ dst); |
30616 | flag_NotZ = res & 0xFF; |
30617 | RET(4) |
30618 | } |
30619 | |
30620 | // CMP |
03e4f2a3 |
30621 | #if 0 |
70357ce5 |
30622 | OPCODE(0xB008) |
30623 | { |
30624 | u32 adr, res; |
30625 | u32 src, dst; |
30626 | |
30627 | // can't read byte from Ax registers ! |
30628 | m68kcontext.execinfo |= M68K_FAULTED; |
30629 | m68kcontext.io_cycle_counter = 0; |
30630 | /* |
30631 | goto famec_Exec_End; |
30632 | dst = DREGu8((Opcode >> 9) & 7); |
30633 | res = dst - src; |
30634 | flag_N = flag_C = res; |
30635 | flag_V = (src ^ dst) & (res ^ dst); |
30636 | flag_NotZ = res & 0xFF; |
30637 | */ |
30638 | RET(4) |
30639 | } |
03e4f2a3 |
30640 | #endif |
70357ce5 |
30641 | |
30642 | // CMP |
30643 | OPCODE(0xB010) |
30644 | { |
30645 | u32 adr, res; |
30646 | u32 src, dst; |
30647 | |
30648 | adr = AREG((Opcode >> 0) & 7); |
30649 | PRE_IO |
30650 | READ_BYTE_F(adr, src) |
30651 | dst = DREGu8((Opcode >> 9) & 7); |
30652 | res = dst - src; |
30653 | flag_N = flag_C = res; |
30654 | flag_V = (src ^ dst) & (res ^ dst); |
30655 | flag_NotZ = res & 0xFF; |
30656 | POST_IO |
30657 | RET(8) |
30658 | } |
30659 | |
30660 | // CMP |
30661 | OPCODE(0xB018) |
30662 | { |
30663 | u32 adr, res; |
30664 | u32 src, dst; |
30665 | |
30666 | adr = AREG((Opcode >> 0) & 7); |
30667 | AREG((Opcode >> 0) & 7) += 1; |
30668 | PRE_IO |
30669 | READ_BYTE_F(adr, src) |
30670 | dst = DREGu8((Opcode >> 9) & 7); |
30671 | res = dst - src; |
30672 | flag_N = flag_C = res; |
30673 | flag_V = (src ^ dst) & (res ^ dst); |
30674 | flag_NotZ = res & 0xFF; |
30675 | POST_IO |
30676 | RET(8) |
30677 | } |
30678 | |
30679 | // CMP |
30680 | OPCODE(0xB020) |
30681 | { |
30682 | u32 adr, res; |
30683 | u32 src, dst; |
30684 | |
30685 | adr = AREG((Opcode >> 0) & 7) - 1; |
30686 | AREG((Opcode >> 0) & 7) = adr; |
30687 | PRE_IO |
30688 | READ_BYTE_F(adr, src) |
30689 | dst = DREGu8((Opcode >> 9) & 7); |
30690 | res = dst - src; |
30691 | flag_N = flag_C = res; |
30692 | flag_V = (src ^ dst) & (res ^ dst); |
30693 | flag_NotZ = res & 0xFF; |
30694 | POST_IO |
30695 | RET(10) |
30696 | } |
30697 | |
30698 | // CMP |
30699 | OPCODE(0xB028) |
30700 | { |
30701 | u32 adr, res; |
30702 | u32 src, dst; |
30703 | |
30704 | FETCH_SWORD(adr); |
30705 | adr += AREG((Opcode >> 0) & 7); |
30706 | PRE_IO |
30707 | READ_BYTE_F(adr, src) |
30708 | dst = DREGu8((Opcode >> 9) & 7); |
30709 | res = dst - src; |
30710 | flag_N = flag_C = res; |
30711 | flag_V = (src ^ dst) & (res ^ dst); |
30712 | flag_NotZ = res & 0xFF; |
30713 | POST_IO |
30714 | RET(12) |
30715 | } |
30716 | |
30717 | // CMP |
30718 | OPCODE(0xB030) |
30719 | { |
30720 | u32 adr, res; |
30721 | u32 src, dst; |
30722 | |
30723 | adr = AREG((Opcode >> 0) & 7); |
30724 | DECODE_EXT_WORD |
30725 | PRE_IO |
30726 | READ_BYTE_F(adr, src) |
30727 | dst = DREGu8((Opcode >> 9) & 7); |
30728 | res = dst - src; |
30729 | flag_N = flag_C = res; |
30730 | flag_V = (src ^ dst) & (res ^ dst); |
30731 | flag_NotZ = res & 0xFF; |
30732 | POST_IO |
30733 | RET(14) |
30734 | } |
30735 | |
30736 | // CMP |
30737 | OPCODE(0xB038) |
30738 | { |
30739 | u32 adr, res; |
30740 | u32 src, dst; |
30741 | |
30742 | FETCH_SWORD(adr); |
30743 | PRE_IO |
30744 | READ_BYTE_F(adr, src) |
30745 | dst = DREGu8((Opcode >> 9) & 7); |
30746 | res = dst - src; |
30747 | flag_N = flag_C = res; |
30748 | flag_V = (src ^ dst) & (res ^ dst); |
30749 | flag_NotZ = res & 0xFF; |
30750 | POST_IO |
30751 | RET(12) |
30752 | } |
30753 | |
30754 | // CMP |
30755 | OPCODE(0xB039) |
30756 | { |
30757 | u32 adr, res; |
30758 | u32 src, dst; |
30759 | |
30760 | FETCH_LONG(adr); |
30761 | PRE_IO |
30762 | READ_BYTE_F(adr, src) |
30763 | dst = DREGu8((Opcode >> 9) & 7); |
30764 | res = dst - src; |
30765 | flag_N = flag_C = res; |
30766 | flag_V = (src ^ dst) & (res ^ dst); |
30767 | flag_NotZ = res & 0xFF; |
30768 | POST_IO |
30769 | RET(16) |
30770 | } |
30771 | |
30772 | // CMP |
30773 | OPCODE(0xB03A) |
30774 | { |
30775 | u32 adr, res; |
30776 | u32 src, dst; |
30777 | |
be26eb23 |
30778 | adr = GET_SWORD + GET_PC; |
70357ce5 |
30779 | PC++; |
30780 | PRE_IO |
30781 | READ_BYTE_F(adr, src) |
30782 | dst = DREGu8((Opcode >> 9) & 7); |
30783 | res = dst - src; |
30784 | flag_N = flag_C = res; |
30785 | flag_V = (src ^ dst) & (res ^ dst); |
30786 | flag_NotZ = res & 0xFF; |
30787 | POST_IO |
30788 | RET(12) |
30789 | } |
30790 | |
30791 | // CMP |
30792 | OPCODE(0xB03B) |
30793 | { |
30794 | u32 adr, res; |
30795 | u32 src, dst; |
30796 | |
be26eb23 |
30797 | adr = GET_PC; |
70357ce5 |
30798 | DECODE_EXT_WORD |
30799 | PRE_IO |
30800 | READ_BYTE_F(adr, src) |
30801 | dst = DREGu8((Opcode >> 9) & 7); |
30802 | res = dst - src; |
30803 | flag_N = flag_C = res; |
30804 | flag_V = (src ^ dst) & (res ^ dst); |
30805 | flag_NotZ = res & 0xFF; |
30806 | POST_IO |
30807 | RET(14) |
30808 | } |
30809 | |
30810 | // CMP |
30811 | OPCODE(0xB03C) |
30812 | { |
30813 | u32 adr, res; |
30814 | u32 src, dst; |
30815 | |
30816 | FETCH_BYTE(src); |
30817 | dst = DREGu8((Opcode >> 9) & 7); |
30818 | res = dst - src; |
30819 | flag_N = flag_C = res; |
30820 | flag_V = (src ^ dst) & (res ^ dst); |
30821 | flag_NotZ = res & 0xFF; |
30822 | RET(8) |
30823 | } |
30824 | |
30825 | // CMP |
30826 | OPCODE(0xB01F) |
30827 | { |
30828 | u32 adr, res; |
30829 | u32 src, dst; |
30830 | |
30831 | adr = AREG(7); |
30832 | AREG(7) += 2; |
30833 | PRE_IO |
30834 | READ_BYTE_F(adr, src) |
30835 | dst = DREGu8((Opcode >> 9) & 7); |
30836 | res = dst - src; |
30837 | flag_N = flag_C = res; |
30838 | flag_V = (src ^ dst) & (res ^ dst); |
30839 | flag_NotZ = res & 0xFF; |
30840 | POST_IO |
30841 | RET(8) |
30842 | } |
30843 | |
30844 | // CMP |
30845 | OPCODE(0xB027) |
30846 | { |
30847 | u32 adr, res; |
30848 | u32 src, dst; |
30849 | |
30850 | adr = AREG(7) - 2; |
30851 | AREG(7) = adr; |
30852 | PRE_IO |
30853 | READ_BYTE_F(adr, src) |
30854 | dst = DREGu8((Opcode >> 9) & 7); |
30855 | res = dst - src; |
30856 | flag_N = flag_C = res; |
30857 | flag_V = (src ^ dst) & (res ^ dst); |
30858 | flag_NotZ = res & 0xFF; |
30859 | POST_IO |
30860 | RET(10) |
30861 | } |
30862 | |
30863 | // CMP |
30864 | OPCODE(0xB040) |
30865 | { |
30866 | u32 adr, res; |
30867 | u32 src, dst; |
30868 | |
30869 | src = DREGu16((Opcode >> 0) & 7); |
30870 | dst = DREGu16((Opcode >> 9) & 7); |
30871 | res = dst - src; |
30872 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30873 | flag_N = flag_C = res >> 8; |
30874 | flag_NotZ = res & 0xFFFF; |
30875 | RET(4) |
30876 | } |
30877 | |
30878 | // CMP |
30879 | OPCODE(0xB048) |
30880 | { |
30881 | u32 adr, res; |
30882 | u32 src, dst; |
30883 | |
30884 | src = AREGu16((Opcode >> 0) & 7); |
30885 | dst = DREGu16((Opcode >> 9) & 7); |
30886 | res = dst - src; |
30887 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30888 | flag_N = flag_C = res >> 8; |
30889 | flag_NotZ = res & 0xFFFF; |
30890 | RET(4) |
30891 | } |
30892 | |
30893 | // CMP |
30894 | OPCODE(0xB050) |
30895 | { |
30896 | u32 adr, res; |
30897 | u32 src, dst; |
30898 | |
30899 | adr = AREG((Opcode >> 0) & 7); |
30900 | PRE_IO |
30901 | READ_WORD_F(adr, src) |
30902 | dst = DREGu16((Opcode >> 9) & 7); |
30903 | res = dst - src; |
30904 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30905 | flag_N = flag_C = res >> 8; |
30906 | flag_NotZ = res & 0xFFFF; |
30907 | POST_IO |
30908 | RET(8) |
30909 | } |
30910 | |
30911 | // CMP |
30912 | OPCODE(0xB058) |
30913 | { |
30914 | u32 adr, res; |
30915 | u32 src, dst; |
30916 | |
30917 | adr = AREG((Opcode >> 0) & 7); |
30918 | AREG((Opcode >> 0) & 7) += 2; |
30919 | PRE_IO |
30920 | READ_WORD_F(adr, src) |
30921 | dst = DREGu16((Opcode >> 9) & 7); |
30922 | res = dst - src; |
30923 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30924 | flag_N = flag_C = res >> 8; |
30925 | flag_NotZ = res & 0xFFFF; |
30926 | POST_IO |
30927 | RET(8) |
30928 | } |
30929 | |
30930 | // CMP |
30931 | OPCODE(0xB060) |
30932 | { |
30933 | u32 adr, res; |
30934 | u32 src, dst; |
30935 | |
30936 | adr = AREG((Opcode >> 0) & 7) - 2; |
30937 | AREG((Opcode >> 0) & 7) = adr; |
30938 | PRE_IO |
30939 | READ_WORD_F(adr, src) |
30940 | dst = DREGu16((Opcode >> 9) & 7); |
30941 | res = dst - src; |
30942 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30943 | flag_N = flag_C = res >> 8; |
30944 | flag_NotZ = res & 0xFFFF; |
30945 | POST_IO |
30946 | RET(10) |
30947 | } |
30948 | |
30949 | // CMP |
30950 | OPCODE(0xB068) |
30951 | { |
30952 | u32 adr, res; |
30953 | u32 src, dst; |
30954 | |
30955 | FETCH_SWORD(adr); |
30956 | adr += AREG((Opcode >> 0) & 7); |
30957 | PRE_IO |
30958 | READ_WORD_F(adr, src) |
30959 | dst = DREGu16((Opcode >> 9) & 7); |
30960 | res = dst - src; |
30961 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30962 | flag_N = flag_C = res >> 8; |
30963 | flag_NotZ = res & 0xFFFF; |
30964 | POST_IO |
30965 | RET(12) |
30966 | } |
30967 | |
30968 | // CMP |
30969 | OPCODE(0xB070) |
30970 | { |
30971 | u32 adr, res; |
30972 | u32 src, dst; |
30973 | |
30974 | adr = AREG((Opcode >> 0) & 7); |
30975 | DECODE_EXT_WORD |
30976 | PRE_IO |
30977 | READ_WORD_F(adr, src) |
30978 | dst = DREGu16((Opcode >> 9) & 7); |
30979 | res = dst - src; |
30980 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30981 | flag_N = flag_C = res >> 8; |
30982 | flag_NotZ = res & 0xFFFF; |
30983 | POST_IO |
30984 | RET(14) |
30985 | } |
30986 | |
30987 | // CMP |
30988 | OPCODE(0xB078) |
30989 | { |
30990 | u32 adr, res; |
30991 | u32 src, dst; |
30992 | |
30993 | FETCH_SWORD(adr); |
30994 | PRE_IO |
30995 | READ_WORD_F(adr, src) |
30996 | dst = DREGu16((Opcode >> 9) & 7); |
30997 | res = dst - src; |
30998 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30999 | flag_N = flag_C = res >> 8; |
31000 | flag_NotZ = res & 0xFFFF; |
31001 | POST_IO |
31002 | RET(12) |
31003 | } |
31004 | |
31005 | // CMP |
31006 | OPCODE(0xB079) |
31007 | { |
31008 | u32 adr, res; |
31009 | u32 src, dst; |
31010 | |
31011 | FETCH_LONG(adr); |
31012 | PRE_IO |
31013 | READ_WORD_F(adr, src) |
31014 | dst = DREGu16((Opcode >> 9) & 7); |
31015 | res = dst - src; |
31016 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31017 | flag_N = flag_C = res >> 8; |
31018 | flag_NotZ = res & 0xFFFF; |
31019 | POST_IO |
31020 | RET(16) |
31021 | } |
31022 | |
31023 | // CMP |
31024 | OPCODE(0xB07A) |
31025 | { |
31026 | u32 adr, res; |
31027 | u32 src, dst; |
31028 | |
be26eb23 |
31029 | adr = GET_SWORD + GET_PC; |
70357ce5 |
31030 | PC++; |
31031 | PRE_IO |
31032 | READ_WORD_F(adr, src) |
31033 | dst = DREGu16((Opcode >> 9) & 7); |
31034 | res = dst - src; |
31035 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31036 | flag_N = flag_C = res >> 8; |
31037 | flag_NotZ = res & 0xFFFF; |
31038 | POST_IO |
31039 | RET(12) |
31040 | } |
31041 | |
31042 | // CMP |
31043 | OPCODE(0xB07B) |
31044 | { |
31045 | u32 adr, res; |
31046 | u32 src, dst; |
31047 | |
be26eb23 |
31048 | adr = GET_PC; |
70357ce5 |
31049 | DECODE_EXT_WORD |
31050 | PRE_IO |
31051 | READ_WORD_F(adr, src) |
31052 | dst = DREGu16((Opcode >> 9) & 7); |
31053 | res = dst - src; |
31054 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31055 | flag_N = flag_C = res >> 8; |
31056 | flag_NotZ = res & 0xFFFF; |
31057 | POST_IO |
31058 | RET(14) |
31059 | } |
31060 | |
31061 | // CMP |
31062 | OPCODE(0xB07C) |
31063 | { |
31064 | u32 adr, res; |
31065 | u32 src, dst; |
31066 | |
31067 | FETCH_WORD(src); |
31068 | dst = DREGu16((Opcode >> 9) & 7); |
31069 | res = dst - src; |
31070 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31071 | flag_N = flag_C = res >> 8; |
31072 | flag_NotZ = res & 0xFFFF; |
31073 | RET(8) |
31074 | } |
31075 | |
31076 | // CMP |
31077 | OPCODE(0xB05F) |
31078 | { |
31079 | u32 adr, res; |
31080 | u32 src, dst; |
31081 | |
31082 | adr = AREG(7); |
31083 | AREG(7) += 2; |
31084 | PRE_IO |
31085 | READ_WORD_F(adr, src) |
31086 | dst = DREGu16((Opcode >> 9) & 7); |
31087 | res = dst - src; |
31088 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31089 | flag_N = flag_C = res >> 8; |
31090 | flag_NotZ = res & 0xFFFF; |
31091 | POST_IO |
31092 | RET(8) |
31093 | } |
31094 | |
31095 | // CMP |
31096 | OPCODE(0xB067) |
31097 | { |
31098 | u32 adr, res; |
31099 | u32 src, dst; |
31100 | |
31101 | adr = AREG(7) - 2; |
31102 | AREG(7) = adr; |
31103 | PRE_IO |
31104 | READ_WORD_F(adr, src) |
31105 | dst = DREGu16((Opcode >> 9) & 7); |
31106 | res = dst - src; |
31107 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31108 | flag_N = flag_C = res >> 8; |
31109 | flag_NotZ = res & 0xFFFF; |
31110 | POST_IO |
31111 | RET(10) |
31112 | } |
31113 | |
31114 | // CMP |
31115 | OPCODE(0xB080) |
31116 | { |
31117 | u32 adr, res; |
31118 | u32 src, dst; |
31119 | |
31120 | src = DREGu32((Opcode >> 0) & 7); |
31121 | dst = DREGu32((Opcode >> 9) & 7); |
31122 | res = dst - src; |
31123 | flag_NotZ = res; |
31124 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31125 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31126 | flag_N = res >> 24; |
31127 | RET(6) |
31128 | } |
31129 | |
31130 | // CMP |
31131 | OPCODE(0xB088) |
31132 | { |
31133 | u32 adr, res; |
31134 | u32 src, dst; |
31135 | |
31136 | src = AREGu32((Opcode >> 0) & 7); |
31137 | dst = DREGu32((Opcode >> 9) & 7); |
31138 | res = dst - src; |
31139 | flag_NotZ = res; |
31140 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31141 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31142 | flag_N = res >> 24; |
31143 | RET(6) |
31144 | } |
31145 | |
31146 | // CMP |
31147 | OPCODE(0xB090) |
31148 | { |
31149 | u32 adr, res; |
31150 | u32 src, dst; |
31151 | |
31152 | adr = AREG((Opcode >> 0) & 7); |
31153 | PRE_IO |
31154 | READ_LONG_F(adr, src) |
31155 | dst = DREGu32((Opcode >> 9) & 7); |
31156 | res = dst - src; |
31157 | flag_NotZ = res; |
31158 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31159 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31160 | flag_N = res >> 24; |
31161 | POST_IO |
31162 | RET(14) |
31163 | } |
31164 | |
31165 | // CMP |
31166 | OPCODE(0xB098) |
31167 | { |
31168 | u32 adr, res; |
31169 | u32 src, dst; |
31170 | |
31171 | adr = AREG((Opcode >> 0) & 7); |
31172 | AREG((Opcode >> 0) & 7) += 4; |
31173 | PRE_IO |
31174 | READ_LONG_F(adr, src) |
31175 | dst = DREGu32((Opcode >> 9) & 7); |
31176 | res = dst - src; |
31177 | flag_NotZ = res; |
31178 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31179 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31180 | flag_N = res >> 24; |
31181 | POST_IO |
31182 | RET(14) |
31183 | } |
31184 | |
31185 | // CMP |
31186 | OPCODE(0xB0A0) |
31187 | { |
31188 | u32 adr, res; |
31189 | u32 src, dst; |
31190 | |
31191 | adr = AREG((Opcode >> 0) & 7) - 4; |
31192 | AREG((Opcode >> 0) & 7) = adr; |
31193 | PRE_IO |
31194 | READ_LONG_F(adr, src) |
31195 | dst = DREGu32((Opcode >> 9) & 7); |
31196 | res = dst - src; |
31197 | flag_NotZ = res; |
31198 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31199 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31200 | flag_N = res >> 24; |
31201 | POST_IO |
31202 | RET(16) |
31203 | } |
31204 | |
31205 | // CMP |
31206 | OPCODE(0xB0A8) |
31207 | { |
31208 | u32 adr, res; |
31209 | u32 src, dst; |
31210 | |
31211 | FETCH_SWORD(adr); |
31212 | adr += AREG((Opcode >> 0) & 7); |
31213 | PRE_IO |
31214 | READ_LONG_F(adr, src) |
31215 | dst = DREGu32((Opcode >> 9) & 7); |
31216 | res = dst - src; |
31217 | flag_NotZ = res; |
31218 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31219 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31220 | flag_N = res >> 24; |
31221 | POST_IO |
31222 | RET(18) |
31223 | } |
31224 | |
31225 | // CMP |
31226 | OPCODE(0xB0B0) |
31227 | { |
31228 | u32 adr, res; |
31229 | u32 src, dst; |
31230 | |
31231 | adr = AREG((Opcode >> 0) & 7); |
31232 | DECODE_EXT_WORD |
31233 | PRE_IO |
31234 | READ_LONG_F(adr, src) |
31235 | dst = DREGu32((Opcode >> 9) & 7); |
31236 | res = dst - src; |
31237 | flag_NotZ = res; |
31238 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31239 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31240 | flag_N = res >> 24; |
31241 | POST_IO |
31242 | RET(20) |
31243 | } |
31244 | |
31245 | // CMP |
31246 | OPCODE(0xB0B8) |
31247 | { |
31248 | u32 adr, res; |
31249 | u32 src, dst; |
31250 | |
31251 | FETCH_SWORD(adr); |
31252 | PRE_IO |
31253 | READ_LONG_F(adr, src) |
31254 | dst = DREGu32((Opcode >> 9) & 7); |
31255 | res = dst - src; |
31256 | flag_NotZ = res; |
31257 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31258 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31259 | flag_N = res >> 24; |
31260 | POST_IO |
31261 | RET(18) |
31262 | } |
31263 | |
31264 | // CMP |
31265 | OPCODE(0xB0B9) |
31266 | { |
31267 | u32 adr, res; |
31268 | u32 src, dst; |
31269 | |
31270 | FETCH_LONG(adr); |
31271 | PRE_IO |
31272 | READ_LONG_F(adr, src) |
31273 | dst = DREGu32((Opcode >> 9) & 7); |
31274 | res = dst - src; |
31275 | flag_NotZ = res; |
31276 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31277 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31278 | flag_N = res >> 24; |
31279 | POST_IO |
31280 | RET(22) |
31281 | } |
31282 | |
31283 | // CMP |
31284 | OPCODE(0xB0BA) |
31285 | { |
31286 | u32 adr, res; |
31287 | u32 src, dst; |
31288 | |
be26eb23 |
31289 | adr = GET_SWORD + GET_PC; |
70357ce5 |
31290 | PC++; |
31291 | PRE_IO |
31292 | READ_LONG_F(adr, src) |
31293 | dst = DREGu32((Opcode >> 9) & 7); |
31294 | res = dst - src; |
31295 | flag_NotZ = res; |
31296 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31297 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31298 | flag_N = res >> 24; |
31299 | POST_IO |
31300 | RET(18) |
31301 | } |
31302 | |
31303 | // CMP |
31304 | OPCODE(0xB0BB) |
31305 | { |
31306 | u32 adr, res; |
31307 | u32 src, dst; |
31308 | |
be26eb23 |
31309 | adr = GET_PC; |
70357ce5 |
31310 | DECODE_EXT_WORD |
31311 | PRE_IO |
31312 | READ_LONG_F(adr, src) |
31313 | dst = DREGu32((Opcode >> 9) & 7); |
31314 | res = dst - src; |
31315 | flag_NotZ = res; |
31316 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31317 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31318 | flag_N = res >> 24; |
31319 | POST_IO |
31320 | RET(20) |
31321 | } |
31322 | |
31323 | // CMP |
31324 | OPCODE(0xB0BC) |
31325 | { |
31326 | u32 adr, res; |
31327 | u32 src, dst; |
31328 | |
31329 | FETCH_LONG(src); |
31330 | dst = DREGu32((Opcode >> 9) & 7); |
31331 | res = dst - src; |
31332 | flag_NotZ = res; |
31333 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31334 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31335 | flag_N = res >> 24; |
31336 | RET(14) |
31337 | } |
31338 | |
31339 | // CMP |
31340 | OPCODE(0xB09F) |
31341 | { |
31342 | u32 adr, res; |
31343 | u32 src, dst; |
31344 | |
31345 | adr = AREG(7); |
31346 | AREG(7) += 4; |
31347 | PRE_IO |
31348 | READ_LONG_F(adr, src) |
31349 | dst = DREGu32((Opcode >> 9) & 7); |
31350 | res = dst - src; |
31351 | flag_NotZ = res; |
31352 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31353 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31354 | flag_N = res >> 24; |
31355 | POST_IO |
31356 | RET(14) |
31357 | } |
31358 | |
31359 | // CMP |
31360 | OPCODE(0xB0A7) |
31361 | { |
31362 | u32 adr, res; |
31363 | u32 src, dst; |
31364 | |
31365 | adr = AREG(7) - 4; |
31366 | AREG(7) = adr; |
31367 | PRE_IO |
31368 | READ_LONG_F(adr, src) |
31369 | dst = DREGu32((Opcode >> 9) & 7); |
31370 | res = dst - src; |
31371 | flag_NotZ = res; |
31372 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31373 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31374 | flag_N = res >> 24; |
31375 | POST_IO |
31376 | RET(16) |
31377 | } |
31378 | |
31379 | // CMPM |
31380 | OPCODE(0xB108) |
31381 | { |
31382 | u32 adr, res; |
31383 | u32 src, dst; |
31384 | |
31385 | adr = AREG((Opcode >> 0) & 7); |
31386 | AREG((Opcode >> 0) & 7) += 1; |
31387 | PRE_IO |
31388 | READ_BYTE_F(adr, src) |
31389 | adr = AREG((Opcode >> 9) & 7); |
31390 | AREG((Opcode >> 9) & 7) += 1; |
31391 | READ_BYTE_F(adr, dst) |
31392 | res = dst - src; |
31393 | flag_N = flag_C = res; |
31394 | flag_V = (src ^ dst) & (res ^ dst); |
31395 | flag_NotZ = res & 0xFF; |
31396 | POST_IO |
31397 | RET(12) |
31398 | } |
31399 | |
31400 | // CMPM |
31401 | OPCODE(0xB148) |
31402 | { |
31403 | u32 adr, res; |
31404 | u32 src, dst; |
31405 | |
31406 | adr = AREG((Opcode >> 0) & 7); |
31407 | AREG((Opcode >> 0) & 7) += 2; |
31408 | PRE_IO |
31409 | READ_WORD_F(adr, src) |
31410 | adr = AREG((Opcode >> 9) & 7); |
31411 | AREG((Opcode >> 9) & 7) += 2; |
31412 | READ_WORD_F(adr, dst) |
31413 | res = dst - src; |
31414 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31415 | flag_N = flag_C = res >> 8; |
31416 | flag_NotZ = res & 0xFFFF; |
31417 | POST_IO |
31418 | RET(12) |
31419 | } |
31420 | |
31421 | // CMPM |
31422 | OPCODE(0xB188) |
31423 | { |
31424 | u32 adr, res; |
31425 | u32 src, dst; |
31426 | |
31427 | adr = AREG((Opcode >> 0) & 7); |
31428 | AREG((Opcode >> 0) & 7) += 4; |
31429 | PRE_IO |
31430 | READ_LONG_F(adr, src) |
31431 | adr = AREG((Opcode >> 9) & 7); |
31432 | AREG((Opcode >> 9) & 7) += 4; |
31433 | READ_LONG_F(adr, dst) |
31434 | res = dst - src; |
31435 | flag_NotZ = res; |
31436 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31437 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31438 | flag_N = res >> 24; |
31439 | POST_IO |
31440 | RET(20) |
31441 | } |
31442 | |
31443 | // CMP7M |
31444 | OPCODE(0xB10F) |
31445 | { |
31446 | u32 adr, res; |
31447 | u32 src, dst; |
31448 | |
31449 | adr = AREG(7); |
31450 | AREG(7) += 2; |
31451 | PRE_IO |
31452 | READ_BYTE_F(adr, src) |
31453 | adr = AREG((Opcode >> 9) & 7); |
31454 | AREG((Opcode >> 9) & 7) += 1; |
31455 | READ_BYTE_F(adr, dst) |
31456 | res = dst - src; |
31457 | flag_N = flag_C = res; |
31458 | flag_V = (src ^ dst) & (res ^ dst); |
31459 | flag_NotZ = res & 0xFF; |
31460 | POST_IO |
31461 | RET(12) |
31462 | } |
31463 | |
31464 | // CMP7M |
31465 | OPCODE(0xB14F) |
31466 | { |
31467 | u32 adr, res; |
31468 | u32 src, dst; |
31469 | |
31470 | adr = AREG(7); |
31471 | AREG(7) += 2; |
31472 | PRE_IO |
31473 | READ_WORD_F(adr, src) |
31474 | adr = AREG((Opcode >> 9) & 7); |
31475 | AREG((Opcode >> 9) & 7) += 2; |
31476 | READ_WORD_F(adr, dst) |
31477 | res = dst - src; |
31478 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31479 | flag_N = flag_C = res >> 8; |
31480 | flag_NotZ = res & 0xFFFF; |
31481 | POST_IO |
31482 | RET(12) |
31483 | } |
31484 | |
31485 | // CMP7M |
31486 | OPCODE(0xB18F) |
31487 | { |
31488 | u32 adr, res; |
31489 | u32 src, dst; |
31490 | |
31491 | adr = AREG(7); |
31492 | AREG(7) += 4; |
31493 | PRE_IO |
31494 | READ_LONG_F(adr, src) |
31495 | adr = AREG((Opcode >> 9) & 7); |
31496 | AREG((Opcode >> 9) & 7) += 4; |
31497 | READ_LONG_F(adr, dst) |
31498 | res = dst - src; |
31499 | flag_NotZ = res; |
31500 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31501 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31502 | flag_N = res >> 24; |
31503 | POST_IO |
31504 | RET(20) |
31505 | } |
31506 | |
31507 | // CMPM7 |
31508 | OPCODE(0xBF08) |
31509 | { |
31510 | u32 adr, res; |
31511 | u32 src, dst; |
31512 | |
31513 | adr = AREG((Opcode >> 0) & 7); |
31514 | AREG((Opcode >> 0) & 7) += 1; |
31515 | PRE_IO |
31516 | READ_BYTE_F(adr, src) |
31517 | adr = AREG(7); |
31518 | AREG(7) += 2; |
31519 | READ_BYTE_F(adr, dst) |
31520 | res = dst - src; |
31521 | flag_N = flag_C = res; |
31522 | flag_V = (src ^ dst) & (res ^ dst); |
31523 | flag_NotZ = res & 0xFF; |
31524 | POST_IO |
31525 | RET(12) |
31526 | } |
31527 | |
31528 | // CMPM7 |
31529 | OPCODE(0xBF48) |
31530 | { |
31531 | u32 adr, res; |
31532 | u32 src, dst; |
31533 | |
31534 | adr = AREG((Opcode >> 0) & 7); |
31535 | AREG((Opcode >> 0) & 7) += 2; |
31536 | PRE_IO |
31537 | READ_WORD_F(adr, src) |
31538 | adr = AREG(7); |
31539 | AREG(7) += 2; |
31540 | READ_WORD_F(adr, dst) |
31541 | res = dst - src; |
31542 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31543 | flag_N = flag_C = res >> 8; |
31544 | flag_NotZ = res & 0xFFFF; |
31545 | POST_IO |
31546 | RET(12) |
31547 | } |
31548 | |
31549 | // CMPM7 |
31550 | OPCODE(0xBF88) |
31551 | { |
31552 | u32 adr, res; |
31553 | u32 src, dst; |
31554 | |
31555 | adr = AREG((Opcode >> 0) & 7); |
31556 | AREG((Opcode >> 0) & 7) += 4; |
31557 | PRE_IO |
31558 | READ_LONG_F(adr, src) |
31559 | adr = AREG(7); |
31560 | AREG(7) += 4; |
31561 | READ_LONG_F(adr, dst) |
31562 | res = dst - src; |
31563 | flag_NotZ = res; |
31564 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31565 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31566 | flag_N = res >> 24; |
31567 | POST_IO |
31568 | RET(20) |
31569 | } |
31570 | |
31571 | // CMP7M7 |
31572 | OPCODE(0xBF0F) |
31573 | { |
31574 | u32 adr, res; |
31575 | u32 src, dst; |
31576 | |
31577 | adr = AREG(7); |
31578 | AREG(7) += 2; |
31579 | PRE_IO |
31580 | READ_BYTE_F(adr, src) |
31581 | adr = AREG(7); |
31582 | AREG(7) += 2; |
31583 | READ_BYTE_F(adr, dst) |
31584 | res = dst - src; |
31585 | flag_N = flag_C = res; |
31586 | flag_V = (src ^ dst) & (res ^ dst); |
31587 | flag_NotZ = res & 0xFF; |
31588 | POST_IO |
31589 | RET(12) |
31590 | } |
31591 | |
31592 | // CMP7M7 |
31593 | OPCODE(0xBF4F) |
31594 | { |
31595 | u32 adr, res; |
31596 | u32 src, dst; |
31597 | |
31598 | adr = AREG(7); |
31599 | AREG(7) += 2; |
31600 | PRE_IO |
31601 | READ_WORD_F(adr, src) |
31602 | adr = AREG(7); |
31603 | AREG(7) += 2; |
31604 | READ_WORD_F(adr, dst) |
31605 | res = dst - src; |
31606 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31607 | flag_N = flag_C = res >> 8; |
31608 | flag_NotZ = res & 0xFFFF; |
31609 | POST_IO |
31610 | RET(12) |
31611 | } |
31612 | |
31613 | // CMP7M7 |
31614 | OPCODE(0xBF8F) |
31615 | { |
31616 | u32 adr, res; |
31617 | u32 src, dst; |
31618 | |
31619 | adr = AREG(7); |
31620 | AREG(7) += 4; |
31621 | PRE_IO |
31622 | READ_LONG_F(adr, src) |
31623 | adr = AREG(7); |
31624 | AREG(7) += 4; |
31625 | READ_LONG_F(adr, dst) |
31626 | res = dst - src; |
31627 | flag_NotZ = res; |
31628 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31629 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31630 | flag_N = res >> 24; |
31631 | POST_IO |
31632 | RET(20) |
31633 | } |
31634 | |
31635 | // EORDa |
31636 | OPCODE(0xB100) |
31637 | { |
31638 | u32 adr, res; |
31639 | u32 src, dst; |
31640 | |
31641 | src = DREGu8((Opcode >> 9) & 7); |
31642 | res = DREGu8((Opcode >> 0) & 7); |
31643 | res ^= src; |
31644 | flag_C = 0; |
31645 | flag_V = 0; |
31646 | flag_NotZ = res; |
31647 | flag_N = res; |
31648 | DREGu8((Opcode >> 0) & 7) = res; |
31649 | RET(4) |
31650 | } |
31651 | |
31652 | // EORDa |
31653 | OPCODE(0xB110) |
31654 | { |
31655 | u32 adr, res; |
31656 | u32 src, dst; |
31657 | |
31658 | src = DREGu8((Opcode >> 9) & 7); |
31659 | adr = AREG((Opcode >> 0) & 7); |
31660 | PRE_IO |
31661 | READ_BYTE_F(adr, res) |
31662 | res ^= src; |
31663 | flag_C = 0; |
31664 | flag_V = 0; |
31665 | flag_NotZ = res; |
31666 | flag_N = res; |
31667 | WRITE_BYTE_F(adr, res) |
31668 | POST_IO |
31669 | RET(12) |
31670 | } |
31671 | |
31672 | // EORDa |
31673 | OPCODE(0xB118) |
31674 | { |
31675 | u32 adr, res; |
31676 | u32 src, dst; |
31677 | |
31678 | src = DREGu8((Opcode >> 9) & 7); |
31679 | adr = AREG((Opcode >> 0) & 7); |
31680 | AREG((Opcode >> 0) & 7) += 1; |
31681 | PRE_IO |
31682 | READ_BYTE_F(adr, res) |
31683 | res ^= src; |
31684 | flag_C = 0; |
31685 | flag_V = 0; |
31686 | flag_NotZ = res; |
31687 | flag_N = res; |
31688 | WRITE_BYTE_F(adr, res) |
31689 | POST_IO |
31690 | RET(12) |
31691 | } |
31692 | |
31693 | // EORDa |
31694 | OPCODE(0xB120) |
31695 | { |
31696 | u32 adr, res; |
31697 | u32 src, dst; |
31698 | |
31699 | src = DREGu8((Opcode >> 9) & 7); |
31700 | adr = AREG((Opcode >> 0) & 7) - 1; |
31701 | AREG((Opcode >> 0) & 7) = adr; |
31702 | PRE_IO |
31703 | READ_BYTE_F(adr, res) |
31704 | res ^= src; |
31705 | flag_C = 0; |
31706 | flag_V = 0; |
31707 | flag_NotZ = res; |
31708 | flag_N = res; |
31709 | WRITE_BYTE_F(adr, res) |
31710 | POST_IO |
31711 | RET(14) |
31712 | } |
31713 | |
31714 | // EORDa |
31715 | OPCODE(0xB128) |
31716 | { |
31717 | u32 adr, res; |
31718 | u32 src, dst; |
31719 | |
31720 | src = DREGu8((Opcode >> 9) & 7); |
31721 | FETCH_SWORD(adr); |
31722 | adr += AREG((Opcode >> 0) & 7); |
31723 | PRE_IO |
31724 | READ_BYTE_F(adr, res) |
31725 | res ^= src; |
31726 | flag_C = 0; |
31727 | flag_V = 0; |
31728 | flag_NotZ = res; |
31729 | flag_N = res; |
31730 | WRITE_BYTE_F(adr, res) |
31731 | POST_IO |
31732 | RET(16) |
31733 | } |
31734 | |
31735 | // EORDa |
31736 | OPCODE(0xB130) |
31737 | { |
31738 | u32 adr, res; |
31739 | u32 src, dst; |
31740 | |
31741 | src = DREGu8((Opcode >> 9) & 7); |
31742 | adr = AREG((Opcode >> 0) & 7); |
31743 | DECODE_EXT_WORD |
31744 | PRE_IO |
31745 | READ_BYTE_F(adr, res) |
31746 | res ^= src; |
31747 | flag_C = 0; |
31748 | flag_V = 0; |
31749 | flag_NotZ = res; |
31750 | flag_N = res; |
31751 | WRITE_BYTE_F(adr, res) |
31752 | POST_IO |
31753 | RET(18) |
31754 | } |
31755 | |
31756 | // EORDa |
31757 | OPCODE(0xB138) |
31758 | { |
31759 | u32 adr, res; |
31760 | u32 src, dst; |
31761 | |
31762 | src = DREGu8((Opcode >> 9) & 7); |
31763 | FETCH_SWORD(adr); |
31764 | PRE_IO |
31765 | READ_BYTE_F(adr, res) |
31766 | res ^= src; |
31767 | flag_C = 0; |
31768 | flag_V = 0; |
31769 | flag_NotZ = res; |
31770 | flag_N = res; |
31771 | WRITE_BYTE_F(adr, res) |
31772 | POST_IO |
31773 | RET(16) |
31774 | } |
31775 | |
31776 | // EORDa |
31777 | OPCODE(0xB139) |
31778 | { |
31779 | u32 adr, res; |
31780 | u32 src, dst; |
31781 | |
31782 | src = DREGu8((Opcode >> 9) & 7); |
31783 | FETCH_LONG(adr); |
31784 | PRE_IO |
31785 | READ_BYTE_F(adr, res) |
31786 | res ^= src; |
31787 | flag_C = 0; |
31788 | flag_V = 0; |
31789 | flag_NotZ = res; |
31790 | flag_N = res; |
31791 | WRITE_BYTE_F(adr, res) |
31792 | POST_IO |
31793 | RET(20) |
31794 | } |
31795 | |
31796 | // EORDa |
31797 | OPCODE(0xB11F) |
31798 | { |
31799 | u32 adr, res; |
31800 | u32 src, dst; |
31801 | |
31802 | src = DREGu8((Opcode >> 9) & 7); |
31803 | adr = AREG(7); |
31804 | AREG(7) += 2; |
31805 | PRE_IO |
31806 | READ_BYTE_F(adr, res) |
31807 | res ^= src; |
31808 | flag_C = 0; |
31809 | flag_V = 0; |
31810 | flag_NotZ = res; |
31811 | flag_N = res; |
31812 | WRITE_BYTE_F(adr, res) |
31813 | POST_IO |
31814 | RET(12) |
31815 | } |
31816 | |
31817 | // EORDa |
31818 | OPCODE(0xB127) |
31819 | { |
31820 | u32 adr, res; |
31821 | u32 src, dst; |
31822 | |
31823 | src = DREGu8((Opcode >> 9) & 7); |
31824 | adr = AREG(7) - 2; |
31825 | AREG(7) = adr; |
31826 | PRE_IO |
31827 | READ_BYTE_F(adr, res) |
31828 | res ^= src; |
31829 | flag_C = 0; |
31830 | flag_V = 0; |
31831 | flag_NotZ = res; |
31832 | flag_N = res; |
31833 | WRITE_BYTE_F(adr, res) |
31834 | POST_IO |
31835 | RET(14) |
31836 | } |
31837 | |
31838 | // EORDa |
31839 | OPCODE(0xB140) |
31840 | { |
31841 | u32 adr, res; |
31842 | u32 src, dst; |
31843 | |
31844 | src = DREGu16((Opcode >> 9) & 7); |
31845 | res = DREGu16((Opcode >> 0) & 7); |
31846 | res ^= src; |
31847 | flag_C = 0; |
31848 | flag_V = 0; |
31849 | flag_NotZ = res; |
31850 | flag_N = res >> 8; |
31851 | DREGu16((Opcode >> 0) & 7) = res; |
31852 | RET(4) |
31853 | } |
31854 | |
31855 | // EORDa |
31856 | OPCODE(0xB150) |
31857 | { |
31858 | u32 adr, res; |
31859 | u32 src, dst; |
31860 | |
31861 | src = DREGu16((Opcode >> 9) & 7); |
31862 | adr = AREG((Opcode >> 0) & 7); |
31863 | PRE_IO |
31864 | READ_WORD_F(adr, res) |
31865 | res ^= src; |
31866 | flag_C = 0; |
31867 | flag_V = 0; |
31868 | flag_NotZ = res; |
31869 | flag_N = res >> 8; |
31870 | WRITE_WORD_F(adr, res) |
31871 | POST_IO |
31872 | RET(12) |
31873 | } |
31874 | |
31875 | // EORDa |
31876 | OPCODE(0xB158) |
31877 | { |
31878 | u32 adr, res; |
31879 | u32 src, dst; |
31880 | |
31881 | src = DREGu16((Opcode >> 9) & 7); |
31882 | adr = AREG((Opcode >> 0) & 7); |
31883 | AREG((Opcode >> 0) & 7) += 2; |
31884 | PRE_IO |
31885 | READ_WORD_F(adr, res) |
31886 | res ^= src; |
31887 | flag_C = 0; |
31888 | flag_V = 0; |
31889 | flag_NotZ = res; |
31890 | flag_N = res >> 8; |
31891 | WRITE_WORD_F(adr, res) |
31892 | POST_IO |
31893 | RET(12) |
31894 | } |
31895 | |
31896 | // EORDa |
31897 | OPCODE(0xB160) |
31898 | { |
31899 | u32 adr, res; |
31900 | u32 src, dst; |
31901 | |
31902 | src = DREGu16((Opcode >> 9) & 7); |
31903 | adr = AREG((Opcode >> 0) & 7) - 2; |
31904 | AREG((Opcode >> 0) & 7) = adr; |
31905 | PRE_IO |
31906 | READ_WORD_F(adr, res) |
31907 | res ^= src; |
31908 | flag_C = 0; |
31909 | flag_V = 0; |
31910 | flag_NotZ = res; |
31911 | flag_N = res >> 8; |
31912 | WRITE_WORD_F(adr, res) |
31913 | POST_IO |
31914 | RET(14) |
31915 | } |
31916 | |
31917 | // EORDa |
31918 | OPCODE(0xB168) |
31919 | { |
31920 | u32 adr, res; |
31921 | u32 src, dst; |
31922 | |
31923 | src = DREGu16((Opcode >> 9) & 7); |
31924 | FETCH_SWORD(adr); |
31925 | adr += AREG((Opcode >> 0) & 7); |
31926 | PRE_IO |
31927 | READ_WORD_F(adr, res) |
31928 | res ^= src; |
31929 | flag_C = 0; |
31930 | flag_V = 0; |
31931 | flag_NotZ = res; |
31932 | flag_N = res >> 8; |
31933 | WRITE_WORD_F(adr, res) |
31934 | POST_IO |
31935 | RET(16) |
31936 | } |
31937 | |
31938 | // EORDa |
31939 | OPCODE(0xB170) |
31940 | { |
31941 | u32 adr, res; |
31942 | u32 src, dst; |
31943 | |
31944 | src = DREGu16((Opcode >> 9) & 7); |
31945 | adr = AREG((Opcode >> 0) & 7); |
31946 | DECODE_EXT_WORD |
31947 | PRE_IO |
31948 | READ_WORD_F(adr, res) |
31949 | res ^= src; |
31950 | flag_C = 0; |
31951 | flag_V = 0; |
31952 | flag_NotZ = res; |
31953 | flag_N = res >> 8; |
31954 | WRITE_WORD_F(adr, res) |
31955 | POST_IO |
31956 | RET(18) |
31957 | } |
31958 | |
31959 | // EORDa |
31960 | OPCODE(0xB178) |
31961 | { |
31962 | u32 adr, res; |
31963 | u32 src, dst; |
31964 | |
31965 | src = DREGu16((Opcode >> 9) & 7); |
31966 | FETCH_SWORD(adr); |
31967 | PRE_IO |
31968 | READ_WORD_F(adr, res) |
31969 | res ^= src; |
31970 | flag_C = 0; |
31971 | flag_V = 0; |
31972 | flag_NotZ = res; |
31973 | flag_N = res >> 8; |
31974 | WRITE_WORD_F(adr, res) |
31975 | POST_IO |
31976 | RET(16) |
31977 | } |
31978 | |
31979 | // EORDa |
31980 | OPCODE(0xB179) |
31981 | { |
31982 | u32 adr, res; |
31983 | u32 src, dst; |
31984 | |
31985 | src = DREGu16((Opcode >> 9) & 7); |
31986 | FETCH_LONG(adr); |
31987 | PRE_IO |
31988 | READ_WORD_F(adr, res) |
31989 | res ^= src; |
31990 | flag_C = 0; |
31991 | flag_V = 0; |
31992 | flag_NotZ = res; |
31993 | flag_N = res >> 8; |
31994 | WRITE_WORD_F(adr, res) |
31995 | POST_IO |
31996 | RET(20) |
31997 | } |
31998 | |
31999 | // EORDa |
32000 | OPCODE(0xB15F) |
32001 | { |
32002 | u32 adr, res; |
32003 | u32 src, dst; |
32004 | |
32005 | src = DREGu16((Opcode >> 9) & 7); |
32006 | adr = AREG(7); |
32007 | AREG(7) += 2; |
32008 | PRE_IO |
32009 | READ_WORD_F(adr, res) |
32010 | res ^= src; |
32011 | flag_C = 0; |
32012 | flag_V = 0; |
32013 | flag_NotZ = res; |
32014 | flag_N = res >> 8; |
32015 | WRITE_WORD_F(adr, res) |
32016 | POST_IO |
32017 | RET(12) |
32018 | } |
32019 | |
32020 | // EORDa |
32021 | OPCODE(0xB167) |
32022 | { |
32023 | u32 adr, res; |
32024 | u32 src, dst; |
32025 | |
32026 | src = DREGu16((Opcode >> 9) & 7); |
32027 | adr = AREG(7) - 2; |
32028 | AREG(7) = adr; |
32029 | PRE_IO |
32030 | READ_WORD_F(adr, res) |
32031 | res ^= src; |
32032 | flag_C = 0; |
32033 | flag_V = 0; |
32034 | flag_NotZ = res; |
32035 | flag_N = res >> 8; |
32036 | WRITE_WORD_F(adr, res) |
32037 | POST_IO |
32038 | RET(14) |
32039 | } |
32040 | |
32041 | // EORDa |
32042 | OPCODE(0xB180) |
32043 | { |
32044 | u32 adr, res; |
32045 | u32 src, dst; |
32046 | |
32047 | src = DREGu32((Opcode >> 9) & 7); |
32048 | res = DREGu32((Opcode >> 0) & 7); |
32049 | res ^= src; |
32050 | flag_C = 0; |
32051 | flag_V = 0; |
32052 | flag_NotZ = res; |
32053 | flag_N = res >> 24; |
32054 | DREGu32((Opcode >> 0) & 7) = res; |
32055 | RET(8) |
32056 | } |
32057 | |
32058 | // EORDa |
32059 | OPCODE(0xB190) |
32060 | { |
32061 | u32 adr, res; |
32062 | u32 src, dst; |
32063 | |
32064 | src = DREGu32((Opcode >> 9) & 7); |
32065 | adr = AREG((Opcode >> 0) & 7); |
32066 | PRE_IO |
32067 | READ_LONG_F(adr, res) |
32068 | res ^= src; |
32069 | flag_C = 0; |
32070 | flag_V = 0; |
32071 | flag_NotZ = res; |
32072 | flag_N = res >> 24; |
32073 | WRITE_LONG_F(adr, res) |
32074 | POST_IO |
32075 | RET(20) |
32076 | } |
32077 | |
32078 | // EORDa |
32079 | OPCODE(0xB198) |
32080 | { |
32081 | u32 adr, res; |
32082 | u32 src, dst; |
32083 | |
32084 | src = DREGu32((Opcode >> 9) & 7); |
32085 | adr = AREG((Opcode >> 0) & 7); |
32086 | AREG((Opcode >> 0) & 7) += 4; |
32087 | PRE_IO |
32088 | READ_LONG_F(adr, res) |
32089 | res ^= src; |
32090 | flag_C = 0; |
32091 | flag_V = 0; |
32092 | flag_NotZ = res; |
32093 | flag_N = res >> 24; |
32094 | WRITE_LONG_F(adr, res) |
32095 | POST_IO |
32096 | RET(20) |
32097 | } |
32098 | |
32099 | // EORDa |
32100 | OPCODE(0xB1A0) |
32101 | { |
32102 | u32 adr, res; |
32103 | u32 src, dst; |
32104 | |
32105 | src = DREGu32((Opcode >> 9) & 7); |
32106 | adr = AREG((Opcode >> 0) & 7) - 4; |
32107 | AREG((Opcode >> 0) & 7) = adr; |
32108 | PRE_IO |
32109 | READ_LONG_F(adr, res) |
32110 | res ^= src; |
32111 | flag_C = 0; |
32112 | flag_V = 0; |
32113 | flag_NotZ = res; |
32114 | flag_N = res >> 24; |
32115 | WRITE_LONG_F(adr, res) |
32116 | POST_IO |
32117 | RET(22) |
32118 | } |
32119 | |
32120 | // EORDa |
32121 | OPCODE(0xB1A8) |
32122 | { |
32123 | u32 adr, res; |
32124 | u32 src, dst; |
32125 | |
32126 | src = DREGu32((Opcode >> 9) & 7); |
32127 | FETCH_SWORD(adr); |
32128 | adr += AREG((Opcode >> 0) & 7); |
32129 | PRE_IO |
32130 | READ_LONG_F(adr, res) |
32131 | res ^= src; |
32132 | flag_C = 0; |
32133 | flag_V = 0; |
32134 | flag_NotZ = res; |
32135 | flag_N = res >> 24; |
32136 | WRITE_LONG_F(adr, res) |
32137 | POST_IO |
32138 | RET(24) |
32139 | } |
32140 | |
32141 | // EORDa |
32142 | OPCODE(0xB1B0) |
32143 | { |
32144 | u32 adr, res; |
32145 | u32 src, dst; |
32146 | |
32147 | src = DREGu32((Opcode >> 9) & 7); |
32148 | adr = AREG((Opcode >> 0) & 7); |
32149 | DECODE_EXT_WORD |
32150 | PRE_IO |
32151 | READ_LONG_F(adr, res) |
32152 | res ^= src; |
32153 | flag_C = 0; |
32154 | flag_V = 0; |
32155 | flag_NotZ = res; |
32156 | flag_N = res >> 24; |
32157 | WRITE_LONG_F(adr, res) |
32158 | POST_IO |
32159 | RET(26) |
32160 | } |
32161 | |
32162 | // EORDa |
32163 | OPCODE(0xB1B8) |
32164 | { |
32165 | u32 adr, res; |
32166 | u32 src, dst; |
32167 | |
32168 | src = DREGu32((Opcode >> 9) & 7); |
32169 | FETCH_SWORD(adr); |
32170 | PRE_IO |
32171 | READ_LONG_F(adr, res) |
32172 | res ^= src; |
32173 | flag_C = 0; |
32174 | flag_V = 0; |
32175 | flag_NotZ = res; |
32176 | flag_N = res >> 24; |
32177 | WRITE_LONG_F(adr, res) |
32178 | POST_IO |
32179 | RET(24) |
32180 | } |
32181 | |
32182 | // EORDa |
32183 | OPCODE(0xB1B9) |
32184 | { |
32185 | u32 adr, res; |
32186 | u32 src, dst; |
32187 | |
32188 | src = DREGu32((Opcode >> 9) & 7); |
32189 | FETCH_LONG(adr); |
32190 | PRE_IO |
32191 | READ_LONG_F(adr, res) |
32192 | res ^= src; |
32193 | flag_C = 0; |
32194 | flag_V = 0; |
32195 | flag_NotZ = res; |
32196 | flag_N = res >> 24; |
32197 | WRITE_LONG_F(adr, res) |
32198 | POST_IO |
32199 | RET(28) |
32200 | } |
32201 | |
32202 | // EORDa |
32203 | OPCODE(0xB19F) |
32204 | { |
32205 | u32 adr, res; |
32206 | u32 src, dst; |
32207 | |
32208 | src = DREGu32((Opcode >> 9) & 7); |
32209 | adr = AREG(7); |
32210 | AREG(7) += 4; |
32211 | PRE_IO |
32212 | READ_LONG_F(adr, res) |
32213 | res ^= src; |
32214 | flag_C = 0; |
32215 | flag_V = 0; |
32216 | flag_NotZ = res; |
32217 | flag_N = res >> 24; |
32218 | WRITE_LONG_F(adr, res) |
32219 | POST_IO |
32220 | RET(20) |
32221 | } |
32222 | |
32223 | // EORDa |
32224 | OPCODE(0xB1A7) |
32225 | { |
32226 | u32 adr, res; |
32227 | u32 src, dst; |
32228 | |
32229 | src = DREGu32((Opcode >> 9) & 7); |
32230 | adr = AREG(7) - 4; |
32231 | AREG(7) = adr; |
32232 | PRE_IO |
32233 | READ_LONG_F(adr, res) |
32234 | res ^= src; |
32235 | flag_C = 0; |
32236 | flag_V = 0; |
32237 | flag_NotZ = res; |
32238 | flag_N = res >> 24; |
32239 | WRITE_LONG_F(adr, res) |
32240 | POST_IO |
32241 | RET(22) |
32242 | } |
32243 | |
32244 | // CMPA |
32245 | OPCODE(0xB0C0) |
32246 | { |
32247 | u32 adr, res; |
32248 | u32 src, dst; |
32249 | |
32250 | src = (s32)DREGs16((Opcode >> 0) & 7); |
32251 | dst = AREGu32((Opcode >> 9) & 7); |
32252 | res = dst - src; |
32253 | flag_NotZ = res; |
32254 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32255 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32256 | flag_N = res >> 24; |
32257 | RET(6) |
32258 | } |
32259 | |
32260 | // CMPA |
32261 | OPCODE(0xB0C8) |
32262 | { |
32263 | u32 adr, res; |
32264 | u32 src, dst; |
32265 | |
32266 | src = (s32)AREGs16((Opcode >> 0) & 7); |
32267 | dst = AREGu32((Opcode >> 9) & 7); |
32268 | res = dst - src; |
32269 | flag_NotZ = res; |
32270 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32271 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32272 | flag_N = res >> 24; |
32273 | RET(6) |
32274 | } |
32275 | |
32276 | // CMPA |
32277 | OPCODE(0xB0D0) |
32278 | { |
32279 | u32 adr, res; |
32280 | u32 src, dst; |
32281 | |
32282 | adr = AREG((Opcode >> 0) & 7); |
32283 | PRE_IO |
32284 | READSX_WORD_F(adr, src) |
32285 | dst = AREGu32((Opcode >> 9) & 7); |
32286 | res = dst - src; |
32287 | flag_NotZ = res; |
32288 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32289 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32290 | flag_N = res >> 24; |
32291 | POST_IO |
32292 | RET(10) |
32293 | } |
32294 | |
32295 | // CMPA |
32296 | OPCODE(0xB0D8) |
32297 | { |
32298 | u32 adr, res; |
32299 | u32 src, dst; |
32300 | |
32301 | adr = AREG((Opcode >> 0) & 7); |
32302 | AREG((Opcode >> 0) & 7) += 2; |
32303 | PRE_IO |
32304 | READSX_WORD_F(adr, src) |
32305 | dst = AREGu32((Opcode >> 9) & 7); |
32306 | res = dst - src; |
32307 | flag_NotZ = res; |
32308 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32309 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32310 | flag_N = res >> 24; |
32311 | POST_IO |
32312 | RET(10) |
32313 | } |
32314 | |
32315 | // CMPA |
32316 | OPCODE(0xB0E0) |
32317 | { |
32318 | u32 adr, res; |
32319 | u32 src, dst; |
32320 | |
32321 | adr = AREG((Opcode >> 0) & 7) - 2; |
32322 | AREG((Opcode >> 0) & 7) = adr; |
32323 | PRE_IO |
32324 | READSX_WORD_F(adr, src) |
32325 | dst = AREGu32((Opcode >> 9) & 7); |
32326 | res = dst - src; |
32327 | flag_NotZ = res; |
32328 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32329 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32330 | flag_N = res >> 24; |
32331 | POST_IO |
32332 | RET(12) |
32333 | } |
32334 | |
32335 | // CMPA |
32336 | OPCODE(0xB0E8) |
32337 | { |
32338 | u32 adr, res; |
32339 | u32 src, dst; |
32340 | |
32341 | FETCH_SWORD(adr); |
32342 | adr += AREG((Opcode >> 0) & 7); |
32343 | PRE_IO |
32344 | READSX_WORD_F(adr, src) |
32345 | dst = AREGu32((Opcode >> 9) & 7); |
32346 | res = dst - src; |
32347 | flag_NotZ = res; |
32348 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32349 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32350 | flag_N = res >> 24; |
32351 | POST_IO |
32352 | RET(14) |
32353 | } |
32354 | |
32355 | // CMPA |
32356 | OPCODE(0xB0F0) |
32357 | { |
32358 | u32 adr, res; |
32359 | u32 src, dst; |
32360 | |
32361 | adr = AREG((Opcode >> 0) & 7); |
32362 | DECODE_EXT_WORD |
32363 | PRE_IO |
32364 | READSX_WORD_F(adr, src) |
32365 | dst = AREGu32((Opcode >> 9) & 7); |
32366 | res = dst - src; |
32367 | flag_NotZ = res; |
32368 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32369 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32370 | flag_N = res >> 24; |
32371 | POST_IO |
32372 | RET(16) |
32373 | } |
32374 | |
32375 | // CMPA |
32376 | OPCODE(0xB0F8) |
32377 | { |
32378 | u32 adr, res; |
32379 | u32 src, dst; |
32380 | |
32381 | FETCH_SWORD(adr); |
32382 | PRE_IO |
32383 | READSX_WORD_F(adr, src) |
32384 | dst = AREGu32((Opcode >> 9) & 7); |
32385 | res = dst - src; |
32386 | flag_NotZ = res; |
32387 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32388 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32389 | flag_N = res >> 24; |
32390 | POST_IO |
32391 | RET(14) |
32392 | } |
32393 | |
32394 | // CMPA |
32395 | OPCODE(0xB0F9) |
32396 | { |
32397 | u32 adr, res; |
32398 | u32 src, dst; |
32399 | |
32400 | FETCH_LONG(adr); |
32401 | PRE_IO |
32402 | READSX_WORD_F(adr, src) |
32403 | dst = AREGu32((Opcode >> 9) & 7); |
32404 | res = dst - src; |
32405 | flag_NotZ = res; |
32406 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32407 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32408 | flag_N = res >> 24; |
32409 | POST_IO |
32410 | RET(18) |
32411 | } |
32412 | |
32413 | // CMPA |
32414 | OPCODE(0xB0FA) |
32415 | { |
32416 | u32 adr, res; |
32417 | u32 src, dst; |
32418 | |
be26eb23 |
32419 | adr = GET_SWORD + GET_PC; |
70357ce5 |
32420 | PC++; |
32421 | PRE_IO |
32422 | READSX_WORD_F(adr, src) |
32423 | dst = AREGu32((Opcode >> 9) & 7); |
32424 | res = dst - src; |
32425 | flag_NotZ = res; |
32426 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32427 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32428 | flag_N = res >> 24; |
32429 | POST_IO |
32430 | RET(14) |
32431 | } |
32432 | |
32433 | // CMPA |
32434 | OPCODE(0xB0FB) |
32435 | { |
32436 | u32 adr, res; |
32437 | u32 src, dst; |
32438 | |
be26eb23 |
32439 | adr = GET_PC; |
70357ce5 |
32440 | DECODE_EXT_WORD |
32441 | PRE_IO |
32442 | READSX_WORD_F(adr, src) |
32443 | dst = AREGu32((Opcode >> 9) & 7); |
32444 | res = dst - src; |
32445 | flag_NotZ = res; |
32446 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32447 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32448 | flag_N = res >> 24; |
32449 | POST_IO |
32450 | RET(16) |
32451 | } |
32452 | |
32453 | // CMPA |
32454 | OPCODE(0xB0FC) |
32455 | { |
32456 | u32 adr, res; |
32457 | u32 src, dst; |
32458 | |
32459 | FETCH_SWORD(src); |
32460 | dst = AREGu32((Opcode >> 9) & 7); |
32461 | res = dst - src; |
32462 | flag_NotZ = res; |
32463 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32464 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32465 | flag_N = res >> 24; |
32466 | RET(10) |
32467 | } |
32468 | |
32469 | // CMPA |
32470 | OPCODE(0xB0DF) |
32471 | { |
32472 | u32 adr, res; |
32473 | u32 src, dst; |
32474 | |
32475 | adr = AREG(7); |
32476 | AREG(7) += 2; |
32477 | PRE_IO |
32478 | READSX_WORD_F(adr, src) |
32479 | dst = AREGu32((Opcode >> 9) & 7); |
32480 | res = dst - src; |
32481 | flag_NotZ = res; |
32482 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32483 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32484 | flag_N = res >> 24; |
32485 | POST_IO |
32486 | RET(10) |
32487 | } |
32488 | |
32489 | // CMPA |
32490 | OPCODE(0xB0E7) |
32491 | { |
32492 | u32 adr, res; |
32493 | u32 src, dst; |
32494 | |
32495 | adr = AREG(7) - 2; |
32496 | AREG(7) = adr; |
32497 | PRE_IO |
32498 | READSX_WORD_F(adr, src) |
32499 | dst = AREGu32((Opcode >> 9) & 7); |
32500 | res = dst - src; |
32501 | flag_NotZ = res; |
32502 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32503 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32504 | flag_N = res >> 24; |
32505 | POST_IO |
32506 | RET(12) |
32507 | } |
32508 | |
32509 | // CMPA |
32510 | OPCODE(0xB1C0) |
32511 | { |
32512 | u32 adr, res; |
32513 | u32 src, dst; |
32514 | |
32515 | src = (s32)DREGs32((Opcode >> 0) & 7); |
32516 | dst = AREGu32((Opcode >> 9) & 7); |
32517 | res = dst - src; |
32518 | flag_NotZ = res; |
32519 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32520 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32521 | flag_N = res >> 24; |
32522 | RET(6) |
32523 | } |
32524 | |
32525 | // CMPA |
32526 | OPCODE(0xB1C8) |
32527 | { |
32528 | u32 adr, res; |
32529 | u32 src, dst; |
32530 | |
32531 | src = (s32)AREGs32((Opcode >> 0) & 7); |
32532 | dst = AREGu32((Opcode >> 9) & 7); |
32533 | res = dst - src; |
32534 | flag_NotZ = res; |
32535 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32536 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32537 | flag_N = res >> 24; |
32538 | RET(6) |
32539 | } |
32540 | |
32541 | // CMPA |
32542 | OPCODE(0xB1D0) |
32543 | { |
32544 | u32 adr, res; |
32545 | u32 src, dst; |
32546 | |
32547 | adr = AREG((Opcode >> 0) & 7); |
32548 | PRE_IO |
32549 | READSX_LONG_F(adr, src) |
32550 | dst = AREGu32((Opcode >> 9) & 7); |
32551 | res = dst - src; |
32552 | flag_NotZ = res; |
32553 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32554 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32555 | flag_N = res >> 24; |
32556 | POST_IO |
32557 | RET(14) |
32558 | } |
32559 | |
32560 | // CMPA |
32561 | OPCODE(0xB1D8) |
32562 | { |
32563 | u32 adr, res; |
32564 | u32 src, dst; |
32565 | |
32566 | adr = AREG((Opcode >> 0) & 7); |
32567 | AREG((Opcode >> 0) & 7) += 4; |
32568 | PRE_IO |
32569 | READSX_LONG_F(adr, src) |
32570 | dst = AREGu32((Opcode >> 9) & 7); |
32571 | res = dst - src; |
32572 | flag_NotZ = res; |
32573 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32574 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32575 | flag_N = res >> 24; |
32576 | POST_IO |
32577 | RET(14) |
32578 | } |
32579 | |
32580 | // CMPA |
32581 | OPCODE(0xB1E0) |
32582 | { |
32583 | u32 adr, res; |
32584 | u32 src, dst; |
32585 | |
32586 | adr = AREG((Opcode >> 0) & 7) - 4; |
32587 | AREG((Opcode >> 0) & 7) = adr; |
32588 | PRE_IO |
32589 | READSX_LONG_F(adr, src) |
32590 | dst = AREGu32((Opcode >> 9) & 7); |
32591 | res = dst - src; |
32592 | flag_NotZ = res; |
32593 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32594 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32595 | flag_N = res >> 24; |
32596 | POST_IO |
32597 | RET(16) |
32598 | } |
32599 | |
32600 | // CMPA |
32601 | OPCODE(0xB1E8) |
32602 | { |
32603 | u32 adr, res; |
32604 | u32 src, dst; |
32605 | |
32606 | FETCH_SWORD(adr); |
32607 | adr += AREG((Opcode >> 0) & 7); |
32608 | PRE_IO |
32609 | READSX_LONG_F(adr, src) |
32610 | dst = AREGu32((Opcode >> 9) & 7); |
32611 | res = dst - src; |
32612 | flag_NotZ = res; |
32613 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32614 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32615 | flag_N = res >> 24; |
32616 | POST_IO |
32617 | RET(18) |
32618 | } |
32619 | |
32620 | // CMPA |
32621 | OPCODE(0xB1F0) |
32622 | { |
32623 | u32 adr, res; |
32624 | u32 src, dst; |
32625 | |
32626 | adr = AREG((Opcode >> 0) & 7); |
32627 | DECODE_EXT_WORD |
32628 | PRE_IO |
32629 | READSX_LONG_F(adr, src) |
32630 | dst = AREGu32((Opcode >> 9) & 7); |
32631 | res = dst - src; |
32632 | flag_NotZ = res; |
32633 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32634 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32635 | flag_N = res >> 24; |
32636 | POST_IO |
32637 | RET(20) |
32638 | } |
32639 | |
32640 | // CMPA |
32641 | OPCODE(0xB1F8) |
32642 | { |
32643 | u32 adr, res; |
32644 | u32 src, dst; |
32645 | |
32646 | FETCH_SWORD(adr); |
32647 | PRE_IO |
32648 | READSX_LONG_F(adr, src) |
32649 | dst = AREGu32((Opcode >> 9) & 7); |
32650 | res = dst - src; |
32651 | flag_NotZ = res; |
32652 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32653 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32654 | flag_N = res >> 24; |
32655 | POST_IO |
32656 | RET(18) |
32657 | } |
32658 | |
32659 | // CMPA |
32660 | OPCODE(0xB1F9) |
32661 | { |
32662 | u32 adr, res; |
32663 | u32 src, dst; |
32664 | |
32665 | FETCH_LONG(adr); |
32666 | PRE_IO |
32667 | READSX_LONG_F(adr, src) |
32668 | dst = AREGu32((Opcode >> 9) & 7); |
32669 | res = dst - src; |
32670 | flag_NotZ = res; |
32671 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32672 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32673 | flag_N = res >> 24; |
32674 | POST_IO |
32675 | RET(22) |
32676 | } |
32677 | |
32678 | // CMPA |
32679 | OPCODE(0xB1FA) |
32680 | { |
32681 | u32 adr, res; |
32682 | u32 src, dst; |
32683 | |
be26eb23 |
32684 | adr = GET_SWORD + GET_PC; |
70357ce5 |
32685 | PC++; |
32686 | PRE_IO |
32687 | READSX_LONG_F(adr, src) |
32688 | dst = AREGu32((Opcode >> 9) & 7); |
32689 | res = dst - src; |
32690 | flag_NotZ = res; |
32691 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32692 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32693 | flag_N = res >> 24; |
32694 | POST_IO |
32695 | RET(18) |
32696 | } |
32697 | |
32698 | // CMPA |
32699 | OPCODE(0xB1FB) |
32700 | { |
32701 | u32 adr, res; |
32702 | u32 src, dst; |
32703 | |
be26eb23 |
32704 | adr = GET_PC; |
70357ce5 |
32705 | DECODE_EXT_WORD |
32706 | PRE_IO |
32707 | READSX_LONG_F(adr, src) |
32708 | dst = AREGu32((Opcode >> 9) & 7); |
32709 | res = dst - src; |
32710 | flag_NotZ = res; |
32711 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32712 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32713 | flag_N = res >> 24; |
32714 | POST_IO |
32715 | RET(20) |
32716 | } |
32717 | |
32718 | // CMPA |
32719 | OPCODE(0xB1FC) |
32720 | { |
32721 | u32 adr, res; |
32722 | u32 src, dst; |
32723 | |
32724 | FETCH_LONG(src); |
32725 | dst = AREGu32((Opcode >> 9) & 7); |
32726 | res = dst - src; |
32727 | flag_NotZ = res; |
32728 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32729 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32730 | flag_N = res >> 24; |
32731 | RET(14) |
32732 | } |
32733 | |
32734 | // CMPA |
32735 | OPCODE(0xB1DF) |
32736 | { |
32737 | u32 adr, res; |
32738 | u32 src, dst; |
32739 | |
32740 | adr = AREG(7); |
32741 | AREG(7) += 4; |
32742 | PRE_IO |
32743 | READSX_LONG_F(adr, src) |
32744 | dst = AREGu32((Opcode >> 9) & 7); |
32745 | res = dst - src; |
32746 | flag_NotZ = res; |
32747 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32748 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32749 | flag_N = res >> 24; |
32750 | POST_IO |
32751 | RET(14) |
32752 | } |
32753 | |
32754 | // CMPA |
32755 | OPCODE(0xB1E7) |
32756 | { |
32757 | u32 adr, res; |
32758 | u32 src, dst; |
32759 | |
32760 | adr = AREG(7) - 4; |
32761 | AREG(7) = adr; |
32762 | PRE_IO |
32763 | READSX_LONG_F(adr, src) |
32764 | dst = AREGu32((Opcode >> 9) & 7); |
32765 | res = dst - src; |
32766 | flag_NotZ = res; |
32767 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32768 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32769 | flag_N = res >> 24; |
32770 | POST_IO |
32771 | RET(16) |
32772 | } |
32773 | |
32774 | // ANDaD |
32775 | OPCODE(0xC000) |
32776 | { |
32777 | u32 adr, res; |
32778 | u32 src, dst; |
32779 | |
32780 | src = DREGu8((Opcode >> 0) & 7); |
32781 | res = DREGu8((Opcode >> 9) & 7); |
32782 | res &= src; |
32783 | flag_C = 0; |
32784 | flag_V = 0; |
32785 | flag_NotZ = res; |
32786 | flag_N = res; |
32787 | DREGu8((Opcode >> 9) & 7) = res; |
32788 | RET(4) |
32789 | } |
32790 | |
32791 | // ANDaD |
32792 | OPCODE(0xC010) |
32793 | { |
32794 | u32 adr, res; |
32795 | u32 src, dst; |
32796 | |
32797 | adr = AREG((Opcode >> 0) & 7); |
32798 | PRE_IO |
32799 | READ_BYTE_F(adr, src) |
32800 | res = DREGu8((Opcode >> 9) & 7); |
32801 | res &= src; |
32802 | flag_C = 0; |
32803 | flag_V = 0; |
32804 | flag_NotZ = res; |
32805 | flag_N = res; |
32806 | DREGu8((Opcode >> 9) & 7) = res; |
32807 | POST_IO |
32808 | RET(8) |
32809 | } |
32810 | |
32811 | // ANDaD |
32812 | OPCODE(0xC018) |
32813 | { |
32814 | u32 adr, res; |
32815 | u32 src, dst; |
32816 | |
32817 | adr = AREG((Opcode >> 0) & 7); |
32818 | AREG((Opcode >> 0) & 7) += 1; |
32819 | PRE_IO |
32820 | READ_BYTE_F(adr, src) |
32821 | res = DREGu8((Opcode >> 9) & 7); |
32822 | res &= src; |
32823 | flag_C = 0; |
32824 | flag_V = 0; |
32825 | flag_NotZ = res; |
32826 | flag_N = res; |
32827 | DREGu8((Opcode >> 9) & 7) = res; |
32828 | POST_IO |
32829 | RET(8) |
32830 | } |
32831 | |
32832 | // ANDaD |
32833 | OPCODE(0xC020) |
32834 | { |
32835 | u32 adr, res; |
32836 | u32 src, dst; |
32837 | |
32838 | adr = AREG((Opcode >> 0) & 7) - 1; |
32839 | AREG((Opcode >> 0) & 7) = adr; |
32840 | PRE_IO |
32841 | READ_BYTE_F(adr, src) |
32842 | res = DREGu8((Opcode >> 9) & 7); |
32843 | res &= src; |
32844 | flag_C = 0; |
32845 | flag_V = 0; |
32846 | flag_NotZ = res; |
32847 | flag_N = res; |
32848 | DREGu8((Opcode >> 9) & 7) = res; |
32849 | POST_IO |
32850 | RET(10) |
32851 | } |
32852 | |
32853 | // ANDaD |
32854 | OPCODE(0xC028) |
32855 | { |
32856 | u32 adr, res; |
32857 | u32 src, dst; |
32858 | |
32859 | FETCH_SWORD(adr); |
32860 | adr += AREG((Opcode >> 0) & 7); |
32861 | PRE_IO |
32862 | READ_BYTE_F(adr, src) |
32863 | res = DREGu8((Opcode >> 9) & 7); |
32864 | res &= src; |
32865 | flag_C = 0; |
32866 | flag_V = 0; |
32867 | flag_NotZ = res; |
32868 | flag_N = res; |
32869 | DREGu8((Opcode >> 9) & 7) = res; |
32870 | POST_IO |
32871 | RET(12) |
32872 | } |
32873 | |
32874 | // ANDaD |
32875 | OPCODE(0xC030) |
32876 | { |
32877 | u32 adr, res; |
32878 | u32 src, dst; |
32879 | |
32880 | adr = AREG((Opcode >> 0) & 7); |
32881 | DECODE_EXT_WORD |
32882 | PRE_IO |
32883 | READ_BYTE_F(adr, src) |
32884 | res = DREGu8((Opcode >> 9) & 7); |
32885 | res &= src; |
32886 | flag_C = 0; |
32887 | flag_V = 0; |
32888 | flag_NotZ = res; |
32889 | flag_N = res; |
32890 | DREGu8((Opcode >> 9) & 7) = res; |
32891 | POST_IO |
32892 | RET(14) |
32893 | } |
32894 | |
32895 | // ANDaD |
32896 | OPCODE(0xC038) |
32897 | { |
32898 | u32 adr, res; |
32899 | u32 src, dst; |
32900 | |
32901 | FETCH_SWORD(adr); |
32902 | PRE_IO |
32903 | READ_BYTE_F(adr, src) |
32904 | res = DREGu8((Opcode >> 9) & 7); |
32905 | res &= src; |
32906 | flag_C = 0; |
32907 | flag_V = 0; |
32908 | flag_NotZ = res; |
32909 | flag_N = res; |
32910 | DREGu8((Opcode >> 9) & 7) = res; |
32911 | POST_IO |
32912 | RET(12) |
32913 | } |
32914 | |
32915 | // ANDaD |
32916 | OPCODE(0xC039) |
32917 | { |
32918 | u32 adr, res; |
32919 | u32 src, dst; |
32920 | |
32921 | FETCH_LONG(adr); |
32922 | PRE_IO |
32923 | READ_BYTE_F(adr, src) |
32924 | res = DREGu8((Opcode >> 9) & 7); |
32925 | res &= src; |
32926 | flag_C = 0; |
32927 | flag_V = 0; |
32928 | flag_NotZ = res; |
32929 | flag_N = res; |
32930 | DREGu8((Opcode >> 9) & 7) = res; |
32931 | POST_IO |
32932 | RET(16) |
32933 | } |
32934 | |
32935 | // ANDaD |
32936 | OPCODE(0xC03A) |
32937 | { |
32938 | u32 adr, res; |
32939 | u32 src, dst; |
32940 | |
be26eb23 |
32941 | adr = GET_SWORD + GET_PC; |
70357ce5 |
32942 | PC++; |
32943 | PRE_IO |
32944 | READ_BYTE_F(adr, src) |
32945 | res = DREGu8((Opcode >> 9) & 7); |
32946 | res &= src; |
32947 | flag_C = 0; |
32948 | flag_V = 0; |
32949 | flag_NotZ = res; |
32950 | flag_N = res; |
32951 | DREGu8((Opcode >> 9) & 7) = res; |
32952 | POST_IO |
32953 | RET(12) |
32954 | } |
32955 | |
32956 | // ANDaD |
32957 | OPCODE(0xC03B) |
32958 | { |
32959 | u32 adr, res; |
32960 | u32 src, dst; |
32961 | |
be26eb23 |
32962 | adr = GET_PC; |
70357ce5 |
32963 | DECODE_EXT_WORD |
32964 | PRE_IO |
32965 | READ_BYTE_F(adr, src) |
32966 | res = DREGu8((Opcode >> 9) & 7); |
32967 | res &= src; |
32968 | flag_C = 0; |
32969 | flag_V = 0; |
32970 | flag_NotZ = res; |
32971 | flag_N = res; |
32972 | DREGu8((Opcode >> 9) & 7) = res; |
32973 | POST_IO |
32974 | RET(14) |
32975 | } |
32976 | |
32977 | // ANDaD |
32978 | OPCODE(0xC03C) |
32979 | { |
32980 | u32 adr, res; |
32981 | u32 src, dst; |
32982 | |
32983 | FETCH_BYTE(src); |
32984 | res = DREGu8((Opcode >> 9) & 7); |
32985 | res &= src; |
32986 | flag_C = 0; |
32987 | flag_V = 0; |
32988 | flag_NotZ = res; |
32989 | flag_N = res; |
32990 | DREGu8((Opcode >> 9) & 7) = res; |
32991 | RET(8) |
32992 | } |
32993 | |
32994 | // ANDaD |
32995 | OPCODE(0xC01F) |
32996 | { |
32997 | u32 adr, res; |
32998 | u32 src, dst; |
32999 | |
33000 | adr = AREG(7); |
33001 | AREG(7) += 2; |
33002 | PRE_IO |
33003 | READ_BYTE_F(adr, src) |
33004 | res = DREGu8((Opcode >> 9) & 7); |
33005 | res &= src; |
33006 | flag_C = 0; |
33007 | flag_V = 0; |
33008 | flag_NotZ = res; |
33009 | flag_N = res; |
33010 | DREGu8((Opcode >> 9) & 7) = res; |
33011 | POST_IO |
33012 | RET(8) |
33013 | } |
33014 | |
33015 | // ANDaD |
33016 | OPCODE(0xC027) |
33017 | { |
33018 | u32 adr, res; |
33019 | u32 src, dst; |
33020 | |
33021 | adr = AREG(7) - 2; |
33022 | AREG(7) = adr; |
33023 | PRE_IO |
33024 | READ_BYTE_F(adr, src) |
33025 | res = DREGu8((Opcode >> 9) & 7); |
33026 | res &= src; |
33027 | flag_C = 0; |
33028 | flag_V = 0; |
33029 | flag_NotZ = res; |
33030 | flag_N = res; |
33031 | DREGu8((Opcode >> 9) & 7) = res; |
33032 | POST_IO |
33033 | RET(10) |
33034 | } |
33035 | |
33036 | // ANDaD |
33037 | OPCODE(0xC040) |
33038 | { |
33039 | u32 adr, res; |
33040 | u32 src, dst; |
33041 | |
33042 | src = DREGu16((Opcode >> 0) & 7); |
33043 | res = DREGu16((Opcode >> 9) & 7); |
33044 | res &= src; |
33045 | flag_C = 0; |
33046 | flag_V = 0; |
33047 | flag_NotZ = res; |
33048 | flag_N = res >> 8; |
33049 | DREGu16((Opcode >> 9) & 7) = res; |
33050 | RET(4) |
33051 | } |
33052 | |
33053 | // ANDaD |
33054 | OPCODE(0xC050) |
33055 | { |
33056 | u32 adr, res; |
33057 | u32 src, dst; |
33058 | |
33059 | adr = AREG((Opcode >> 0) & 7); |
33060 | PRE_IO |
33061 | READ_WORD_F(adr, src) |
33062 | res = DREGu16((Opcode >> 9) & 7); |
33063 | res &= src; |
33064 | flag_C = 0; |
33065 | flag_V = 0; |
33066 | flag_NotZ = res; |
33067 | flag_N = res >> 8; |
33068 | DREGu16((Opcode >> 9) & 7) = res; |
33069 | POST_IO |
33070 | RET(8) |
33071 | } |
33072 | |
33073 | // ANDaD |
33074 | OPCODE(0xC058) |
33075 | { |
33076 | u32 adr, res; |
33077 | u32 src, dst; |
33078 | |
33079 | adr = AREG((Opcode >> 0) & 7); |
33080 | AREG((Opcode >> 0) & 7) += 2; |
33081 | PRE_IO |
33082 | READ_WORD_F(adr, src) |
33083 | res = DREGu16((Opcode >> 9) & 7); |
33084 | res &= src; |
33085 | flag_C = 0; |
33086 | flag_V = 0; |
33087 | flag_NotZ = res; |
33088 | flag_N = res >> 8; |
33089 | DREGu16((Opcode >> 9) & 7) = res; |
33090 | POST_IO |
33091 | RET(8) |
33092 | } |
33093 | |
33094 | // ANDaD |
33095 | OPCODE(0xC060) |
33096 | { |
33097 | u32 adr, res; |
33098 | u32 src, dst; |
33099 | |
33100 | adr = AREG((Opcode >> 0) & 7) - 2; |
33101 | AREG((Opcode >> 0) & 7) = adr; |
33102 | PRE_IO |
33103 | READ_WORD_F(adr, src) |
33104 | res = DREGu16((Opcode >> 9) & 7); |
33105 | res &= src; |
33106 | flag_C = 0; |
33107 | flag_V = 0; |
33108 | flag_NotZ = res; |
33109 | flag_N = res >> 8; |
33110 | DREGu16((Opcode >> 9) & 7) = res; |
33111 | POST_IO |
33112 | RET(10) |
33113 | } |
33114 | |
33115 | // ANDaD |
33116 | OPCODE(0xC068) |
33117 | { |
33118 | u32 adr, res; |
33119 | u32 src, dst; |
33120 | |
33121 | FETCH_SWORD(adr); |
33122 | adr += AREG((Opcode >> 0) & 7); |
33123 | PRE_IO |
33124 | READ_WORD_F(adr, src) |
33125 | res = DREGu16((Opcode >> 9) & 7); |
33126 | res &= src; |
33127 | flag_C = 0; |
33128 | flag_V = 0; |
33129 | flag_NotZ = res; |
33130 | flag_N = res >> 8; |
33131 | DREGu16((Opcode >> 9) & 7) = res; |
33132 | POST_IO |
33133 | RET(12) |
33134 | } |
33135 | |
33136 | // ANDaD |
33137 | OPCODE(0xC070) |
33138 | { |
33139 | u32 adr, res; |
33140 | u32 src, dst; |
33141 | |
33142 | adr = AREG((Opcode >> 0) & 7); |
33143 | DECODE_EXT_WORD |
33144 | PRE_IO |
33145 | READ_WORD_F(adr, src) |
33146 | res = DREGu16((Opcode >> 9) & 7); |
33147 | res &= src; |
33148 | flag_C = 0; |
33149 | flag_V = 0; |
33150 | flag_NotZ = res; |
33151 | flag_N = res >> 8; |
33152 | DREGu16((Opcode >> 9) & 7) = res; |
33153 | POST_IO |
33154 | RET(14) |
33155 | } |
33156 | |
33157 | // ANDaD |
33158 | OPCODE(0xC078) |
33159 | { |
33160 | u32 adr, res; |
33161 | u32 src, dst; |
33162 | |
33163 | FETCH_SWORD(adr); |
33164 | PRE_IO |
33165 | READ_WORD_F(adr, src) |
33166 | res = DREGu16((Opcode >> 9) & 7); |
33167 | res &= src; |
33168 | flag_C = 0; |
33169 | flag_V = 0; |
33170 | flag_NotZ = res; |
33171 | flag_N = res >> 8; |
33172 | DREGu16((Opcode >> 9) & 7) = res; |
33173 | POST_IO |
33174 | RET(12) |
33175 | } |
33176 | |
33177 | // ANDaD |
33178 | OPCODE(0xC079) |
33179 | { |
33180 | u32 adr, res; |
33181 | u32 src, dst; |
33182 | |
33183 | FETCH_LONG(adr); |
33184 | PRE_IO |
33185 | READ_WORD_F(adr, src) |
33186 | res = DREGu16((Opcode >> 9) & 7); |
33187 | res &= src; |
33188 | flag_C = 0; |
33189 | flag_V = 0; |
33190 | flag_NotZ = res; |
33191 | flag_N = res >> 8; |
33192 | DREGu16((Opcode >> 9) & 7) = res; |
33193 | POST_IO |
33194 | RET(16) |
33195 | } |
33196 | |
33197 | // ANDaD |
33198 | OPCODE(0xC07A) |
33199 | { |
33200 | u32 adr, res; |
33201 | u32 src, dst; |
33202 | |
be26eb23 |
33203 | adr = GET_SWORD + GET_PC; |
70357ce5 |
33204 | PC++; |
33205 | PRE_IO |
33206 | READ_WORD_F(adr, src) |
33207 | res = DREGu16((Opcode >> 9) & 7); |
33208 | res &= src; |
33209 | flag_C = 0; |
33210 | flag_V = 0; |
33211 | flag_NotZ = res; |
33212 | flag_N = res >> 8; |
33213 | DREGu16((Opcode >> 9) & 7) = res; |
33214 | POST_IO |
33215 | RET(12) |
33216 | } |
33217 | |
33218 | // ANDaD |
33219 | OPCODE(0xC07B) |
33220 | { |
33221 | u32 adr, res; |
33222 | u32 src, dst; |
33223 | |
be26eb23 |
33224 | adr = GET_PC; |
70357ce5 |
33225 | DECODE_EXT_WORD |
33226 | PRE_IO |
33227 | READ_WORD_F(adr, src) |
33228 | res = DREGu16((Opcode >> 9) & 7); |
33229 | res &= src; |
33230 | flag_C = 0; |
33231 | flag_V = 0; |
33232 | flag_NotZ = res; |
33233 | flag_N = res >> 8; |
33234 | DREGu16((Opcode >> 9) & 7) = res; |
33235 | POST_IO |
33236 | RET(14) |
33237 | } |
33238 | |
33239 | // ANDaD |
33240 | OPCODE(0xC07C) |
33241 | { |
33242 | u32 adr, res; |
33243 | u32 src, dst; |
33244 | |
33245 | FETCH_WORD(src); |
33246 | res = DREGu16((Opcode >> 9) & 7); |
33247 | res &= src; |
33248 | flag_C = 0; |
33249 | flag_V = 0; |
33250 | flag_NotZ = res; |
33251 | flag_N = res >> 8; |
33252 | DREGu16((Opcode >> 9) & 7) = res; |
33253 | RET(8) |
33254 | } |
33255 | |
33256 | // ANDaD |
33257 | OPCODE(0xC05F) |
33258 | { |
33259 | u32 adr, res; |
33260 | u32 src, dst; |
33261 | |
33262 | adr = AREG(7); |
33263 | AREG(7) += 2; |
33264 | PRE_IO |
33265 | READ_WORD_F(adr, src) |
33266 | res = DREGu16((Opcode >> 9) & 7); |
33267 | res &= src; |
33268 | flag_C = 0; |
33269 | flag_V = 0; |
33270 | flag_NotZ = res; |
33271 | flag_N = res >> 8; |
33272 | DREGu16((Opcode >> 9) & 7) = res; |
33273 | POST_IO |
33274 | RET(8) |
33275 | } |
33276 | |
33277 | // ANDaD |
33278 | OPCODE(0xC067) |
33279 | { |
33280 | u32 adr, res; |
33281 | u32 src, dst; |
33282 | |
33283 | adr = AREG(7) - 2; |
33284 | AREG(7) = adr; |
33285 | PRE_IO |
33286 | READ_WORD_F(adr, src) |
33287 | res = DREGu16((Opcode >> 9) & 7); |
33288 | res &= src; |
33289 | flag_C = 0; |
33290 | flag_V = 0; |
33291 | flag_NotZ = res; |
33292 | flag_N = res >> 8; |
33293 | DREGu16((Opcode >> 9) & 7) = res; |
33294 | POST_IO |
33295 | RET(10) |
33296 | } |
33297 | |
33298 | // ANDaD |
33299 | OPCODE(0xC080) |
33300 | { |
33301 | u32 adr, res; |
33302 | u32 src, dst; |
33303 | |
33304 | src = DREGu32((Opcode >> 0) & 7); |
33305 | res = DREGu32((Opcode >> 9) & 7); |
33306 | res &= src; |
33307 | flag_C = 0; |
33308 | flag_V = 0; |
33309 | flag_NotZ = res; |
33310 | flag_N = res >> 24; |
33311 | DREGu32((Opcode >> 9) & 7) = res; |
33312 | RET(8) |
33313 | } |
33314 | |
33315 | // ANDaD |
33316 | OPCODE(0xC090) |
33317 | { |
33318 | u32 adr, res; |
33319 | u32 src, dst; |
33320 | |
33321 | adr = AREG((Opcode >> 0) & 7); |
33322 | PRE_IO |
33323 | READ_LONG_F(adr, src) |
33324 | res = DREGu32((Opcode >> 9) & 7); |
33325 | res &= src; |
33326 | flag_C = 0; |
33327 | flag_V = 0; |
33328 | flag_NotZ = res; |
33329 | flag_N = res >> 24; |
33330 | DREGu32((Opcode >> 9) & 7) = res; |
33331 | POST_IO |
33332 | RET(14) |
33333 | } |
33334 | |
33335 | // ANDaD |
33336 | OPCODE(0xC098) |
33337 | { |
33338 | u32 adr, res; |
33339 | u32 src, dst; |
33340 | |
33341 | adr = AREG((Opcode >> 0) & 7); |
33342 | AREG((Opcode >> 0) & 7) += 4; |
33343 | PRE_IO |
33344 | READ_LONG_F(adr, src) |
33345 | res = DREGu32((Opcode >> 9) & 7); |
33346 | res &= src; |
33347 | flag_C = 0; |
33348 | flag_V = 0; |
33349 | flag_NotZ = res; |
33350 | flag_N = res >> 24; |
33351 | DREGu32((Opcode >> 9) & 7) = res; |
33352 | POST_IO |
33353 | RET(14) |
33354 | } |
33355 | |
33356 | // ANDaD |
33357 | OPCODE(0xC0A0) |
33358 | { |
33359 | u32 adr, res; |
33360 | u32 src, dst; |
33361 | |
33362 | adr = AREG((Opcode >> 0) & 7) - 4; |
33363 | AREG((Opcode >> 0) & 7) = adr; |
33364 | PRE_IO |
33365 | READ_LONG_F(adr, src) |
33366 | res = DREGu32((Opcode >> 9) & 7); |
33367 | res &= src; |
33368 | flag_C = 0; |
33369 | flag_V = 0; |
33370 | flag_NotZ = res; |
33371 | flag_N = res >> 24; |
33372 | DREGu32((Opcode >> 9) & 7) = res; |
33373 | POST_IO |
33374 | RET(16) |
33375 | } |
33376 | |
33377 | // ANDaD |
33378 | OPCODE(0xC0A8) |
33379 | { |
33380 | u32 adr, res; |
33381 | u32 src, dst; |
33382 | |
33383 | FETCH_SWORD(adr); |
33384 | adr += AREG((Opcode >> 0) & 7); |
33385 | PRE_IO |
33386 | READ_LONG_F(adr, src) |
33387 | res = DREGu32((Opcode >> 9) & 7); |
33388 | res &= src; |
33389 | flag_C = 0; |
33390 | flag_V = 0; |
33391 | flag_NotZ = res; |
33392 | flag_N = res >> 24; |
33393 | DREGu32((Opcode >> 9) & 7) = res; |
33394 | POST_IO |
33395 | RET(18) |
33396 | } |
33397 | |
33398 | // ANDaD |
33399 | OPCODE(0xC0B0) |
33400 | { |
33401 | u32 adr, res; |
33402 | u32 src, dst; |
33403 | |
33404 | adr = AREG((Opcode >> 0) & 7); |
33405 | DECODE_EXT_WORD |
33406 | PRE_IO |
33407 | READ_LONG_F(adr, src) |
33408 | res = DREGu32((Opcode >> 9) & 7); |
33409 | res &= src; |
33410 | flag_C = 0; |
33411 | flag_V = 0; |
33412 | flag_NotZ = res; |
33413 | flag_N = res >> 24; |
33414 | DREGu32((Opcode >> 9) & 7) = res; |
33415 | POST_IO |
33416 | RET(20) |
33417 | } |
33418 | |
33419 | // ANDaD |
33420 | OPCODE(0xC0B8) |
33421 | { |
33422 | u32 adr, res; |
33423 | u32 src, dst; |
33424 | |
33425 | FETCH_SWORD(adr); |
33426 | PRE_IO |
33427 | READ_LONG_F(adr, src) |
33428 | res = DREGu32((Opcode >> 9) & 7); |
33429 | res &= src; |
33430 | flag_C = 0; |
33431 | flag_V = 0; |
33432 | flag_NotZ = res; |
33433 | flag_N = res >> 24; |
33434 | DREGu32((Opcode >> 9) & 7) = res; |
33435 | POST_IO |
33436 | RET(18) |
33437 | } |
33438 | |
33439 | // ANDaD |
33440 | OPCODE(0xC0B9) |
33441 | { |
33442 | u32 adr, res; |
33443 | u32 src, dst; |
33444 | |
33445 | FETCH_LONG(adr); |
33446 | PRE_IO |
33447 | READ_LONG_F(adr, src) |
33448 | res = DREGu32((Opcode >> 9) & 7); |
33449 | res &= src; |
33450 | flag_C = 0; |
33451 | flag_V = 0; |
33452 | flag_NotZ = res; |
33453 | flag_N = res >> 24; |
33454 | DREGu32((Opcode >> 9) & 7) = res; |
33455 | POST_IO |
33456 | RET(22) |
33457 | } |
33458 | |
33459 | // ANDaD |
33460 | OPCODE(0xC0BA) |
33461 | { |
33462 | u32 adr, res; |
33463 | u32 src, dst; |
33464 | |
be26eb23 |
33465 | adr = GET_SWORD + GET_PC; |
70357ce5 |
33466 | PC++; |
33467 | PRE_IO |
33468 | READ_LONG_F(adr, src) |
33469 | res = DREGu32((Opcode >> 9) & 7); |
33470 | res &= src; |
33471 | flag_C = 0; |
33472 | flag_V = 0; |
33473 | flag_NotZ = res; |
33474 | flag_N = res >> 24; |
33475 | DREGu32((Opcode >> 9) & 7) = res; |
33476 | POST_IO |
33477 | RET(18) |
33478 | } |
33479 | |
33480 | // ANDaD |
33481 | OPCODE(0xC0BB) |
33482 | { |
33483 | u32 adr, res; |
33484 | u32 src, dst; |
33485 | |
be26eb23 |
33486 | adr = GET_PC; |
70357ce5 |
33487 | DECODE_EXT_WORD |
33488 | PRE_IO |
33489 | READ_LONG_F(adr, src) |
33490 | res = DREGu32((Opcode >> 9) & 7); |
33491 | res &= src; |
33492 | flag_C = 0; |
33493 | flag_V = 0; |
33494 | flag_NotZ = res; |
33495 | flag_N = res >> 24; |
33496 | DREGu32((Opcode >> 9) & 7) = res; |
33497 | POST_IO |
33498 | RET(20) |
33499 | } |
33500 | |
33501 | // ANDaD |
33502 | OPCODE(0xC0BC) |
33503 | { |
33504 | u32 adr, res; |
33505 | u32 src, dst; |
33506 | |
33507 | FETCH_LONG(src); |
33508 | res = DREGu32((Opcode >> 9) & 7); |
33509 | res &= src; |
33510 | flag_C = 0; |
33511 | flag_V = 0; |
33512 | flag_NotZ = res; |
33513 | flag_N = res >> 24; |
33514 | DREGu32((Opcode >> 9) & 7) = res; |
33515 | RET(16) |
33516 | } |
33517 | |
33518 | // ANDaD |
33519 | OPCODE(0xC09F) |
33520 | { |
33521 | u32 adr, res; |
33522 | u32 src, dst; |
33523 | |
33524 | adr = AREG(7); |
33525 | AREG(7) += 4; |
33526 | PRE_IO |
33527 | READ_LONG_F(adr, src) |
33528 | res = DREGu32((Opcode >> 9) & 7); |
33529 | res &= src; |
33530 | flag_C = 0; |
33531 | flag_V = 0; |
33532 | flag_NotZ = res; |
33533 | flag_N = res >> 24; |
33534 | DREGu32((Opcode >> 9) & 7) = res; |
33535 | POST_IO |
33536 | RET(14) |
33537 | } |
33538 | |
33539 | // ANDaD |
33540 | OPCODE(0xC0A7) |
33541 | { |
33542 | u32 adr, res; |
33543 | u32 src, dst; |
33544 | |
33545 | adr = AREG(7) - 4; |
33546 | AREG(7) = adr; |
33547 | PRE_IO |
33548 | READ_LONG_F(adr, src) |
33549 | res = DREGu32((Opcode >> 9) & 7); |
33550 | res &= src; |
33551 | flag_C = 0; |
33552 | flag_V = 0; |
33553 | flag_NotZ = res; |
33554 | flag_N = res >> 24; |
33555 | DREGu32((Opcode >> 9) & 7) = res; |
33556 | POST_IO |
33557 | RET(16) |
33558 | } |
33559 | |
33560 | // ANDDa |
33561 | OPCODE(0xC110) |
33562 | { |
33563 | u32 adr, res; |
33564 | u32 src, dst; |
33565 | |
33566 | src = DREGu8((Opcode >> 9) & 7); |
33567 | adr = AREG((Opcode >> 0) & 7); |
33568 | PRE_IO |
33569 | READ_BYTE_F(adr, res) |
33570 | res &= src; |
33571 | flag_C = 0; |
33572 | flag_V = 0; |
33573 | flag_NotZ = res; |
33574 | flag_N = res; |
33575 | WRITE_BYTE_F(adr, res) |
33576 | POST_IO |
33577 | RET(12) |
33578 | } |
33579 | |
33580 | // ANDDa |
33581 | OPCODE(0xC118) |
33582 | { |
33583 | u32 adr, res; |
33584 | u32 src, dst; |
33585 | |
33586 | src = DREGu8((Opcode >> 9) & 7); |
33587 | adr = AREG((Opcode >> 0) & 7); |
33588 | AREG((Opcode >> 0) & 7) += 1; |
33589 | PRE_IO |
33590 | READ_BYTE_F(adr, res) |
33591 | res &= src; |
33592 | flag_C = 0; |
33593 | flag_V = 0; |
33594 | flag_NotZ = res; |
33595 | flag_N = res; |
33596 | WRITE_BYTE_F(adr, res) |
33597 | POST_IO |
33598 | RET(12) |
33599 | } |
33600 | |
33601 | // ANDDa |
33602 | OPCODE(0xC120) |
33603 | { |
33604 | u32 adr, res; |
33605 | u32 src, dst; |
33606 | |
33607 | src = DREGu8((Opcode >> 9) & 7); |
33608 | adr = AREG((Opcode >> 0) & 7) - 1; |
33609 | AREG((Opcode >> 0) & 7) = adr; |
33610 | PRE_IO |
33611 | READ_BYTE_F(adr, res) |
33612 | res &= src; |
33613 | flag_C = 0; |
33614 | flag_V = 0; |
33615 | flag_NotZ = res; |
33616 | flag_N = res; |
33617 | WRITE_BYTE_F(adr, res) |
33618 | POST_IO |
33619 | RET(14) |
33620 | } |
33621 | |
33622 | // ANDDa |
33623 | OPCODE(0xC128) |
33624 | { |
33625 | u32 adr, res; |
33626 | u32 src, dst; |
33627 | |
33628 | src = DREGu8((Opcode >> 9) & 7); |
33629 | FETCH_SWORD(adr); |
33630 | adr += AREG((Opcode >> 0) & 7); |
33631 | PRE_IO |
33632 | READ_BYTE_F(adr, res) |
33633 | res &= src; |
33634 | flag_C = 0; |
33635 | flag_V = 0; |
33636 | flag_NotZ = res; |
33637 | flag_N = res; |
33638 | WRITE_BYTE_F(adr, res) |
33639 | POST_IO |
33640 | RET(16) |
33641 | } |
33642 | |
33643 | // ANDDa |
33644 | OPCODE(0xC130) |
33645 | { |
33646 | u32 adr, res; |
33647 | u32 src, dst; |
33648 | |
33649 | src = DREGu8((Opcode >> 9) & 7); |
33650 | adr = AREG((Opcode >> 0) & 7); |
33651 | DECODE_EXT_WORD |
33652 | PRE_IO |
33653 | READ_BYTE_F(adr, res) |
33654 | res &= src; |
33655 | flag_C = 0; |
33656 | flag_V = 0; |
33657 | flag_NotZ = res; |
33658 | flag_N = res; |
33659 | WRITE_BYTE_F(adr, res) |
33660 | POST_IO |
33661 | RET(18) |
33662 | } |
33663 | |
33664 | // ANDDa |
33665 | OPCODE(0xC138) |
33666 | { |
33667 | u32 adr, res; |
33668 | u32 src, dst; |
33669 | |
33670 | src = DREGu8((Opcode >> 9) & 7); |
33671 | FETCH_SWORD(adr); |
33672 | PRE_IO |
33673 | READ_BYTE_F(adr, res) |
33674 | res &= src; |
33675 | flag_C = 0; |
33676 | flag_V = 0; |
33677 | flag_NotZ = res; |
33678 | flag_N = res; |
33679 | WRITE_BYTE_F(adr, res) |
33680 | POST_IO |
33681 | RET(16) |
33682 | } |
33683 | |
33684 | // ANDDa |
33685 | OPCODE(0xC139) |
33686 | { |
33687 | u32 adr, res; |
33688 | u32 src, dst; |
33689 | |
33690 | src = DREGu8((Opcode >> 9) & 7); |
33691 | FETCH_LONG(adr); |
33692 | PRE_IO |
33693 | READ_BYTE_F(adr, res) |
33694 | res &= src; |
33695 | flag_C = 0; |
33696 | flag_V = 0; |
33697 | flag_NotZ = res; |
33698 | flag_N = res; |
33699 | WRITE_BYTE_F(adr, res) |
33700 | POST_IO |
33701 | RET(20) |
33702 | } |
33703 | |
33704 | // ANDDa |
33705 | OPCODE(0xC11F) |
33706 | { |
33707 | u32 adr, res; |
33708 | u32 src, dst; |
33709 | |
33710 | src = DREGu8((Opcode >> 9) & 7); |
33711 | adr = AREG(7); |
33712 | AREG(7) += 2; |
33713 | PRE_IO |
33714 | READ_BYTE_F(adr, res) |
33715 | res &= src; |
33716 | flag_C = 0; |
33717 | flag_V = 0; |
33718 | flag_NotZ = res; |
33719 | flag_N = res; |
33720 | WRITE_BYTE_F(adr, res) |
33721 | POST_IO |
33722 | RET(12) |
33723 | } |
33724 | |
33725 | // ANDDa |
33726 | OPCODE(0xC127) |
33727 | { |
33728 | u32 adr, res; |
33729 | u32 src, dst; |
33730 | |
33731 | src = DREGu8((Opcode >> 9) & 7); |
33732 | adr = AREG(7) - 2; |
33733 | AREG(7) = adr; |
33734 | PRE_IO |
33735 | READ_BYTE_F(adr, res) |
33736 | res &= src; |
33737 | flag_C = 0; |
33738 | flag_V = 0; |
33739 | flag_NotZ = res; |
33740 | flag_N = res; |
33741 | WRITE_BYTE_F(adr, res) |
33742 | POST_IO |
33743 | RET(14) |
33744 | } |
33745 | |
33746 | // ANDDa |
33747 | OPCODE(0xC150) |
33748 | { |
33749 | u32 adr, res; |
33750 | u32 src, dst; |
33751 | |
33752 | src = DREGu16((Opcode >> 9) & 7); |
33753 | adr = AREG((Opcode >> 0) & 7); |
33754 | PRE_IO |
33755 | READ_WORD_F(adr, res) |
33756 | res &= src; |
33757 | flag_C = 0; |
33758 | flag_V = 0; |
33759 | flag_NotZ = res; |
33760 | flag_N = res >> 8; |
33761 | WRITE_WORD_F(adr, res) |
33762 | POST_IO |
33763 | RET(12) |
33764 | } |
33765 | |
33766 | // ANDDa |
33767 | OPCODE(0xC158) |
33768 | { |
33769 | u32 adr, res; |
33770 | u32 src, dst; |
33771 | |
33772 | src = DREGu16((Opcode >> 9) & 7); |
33773 | adr = AREG((Opcode >> 0) & 7); |
33774 | AREG((Opcode >> 0) & 7) += 2; |
33775 | PRE_IO |
33776 | READ_WORD_F(adr, res) |
33777 | res &= src; |
33778 | flag_C = 0; |
33779 | flag_V = 0; |
33780 | flag_NotZ = res; |
33781 | flag_N = res >> 8; |
33782 | WRITE_WORD_F(adr, res) |
33783 | POST_IO |
33784 | RET(12) |
33785 | } |
33786 | |
33787 | // ANDDa |
33788 | OPCODE(0xC160) |
33789 | { |
33790 | u32 adr, res; |
33791 | u32 src, dst; |
33792 | |
33793 | src = DREGu16((Opcode >> 9) & 7); |
33794 | adr = AREG((Opcode >> 0) & 7) - 2; |
33795 | AREG((Opcode >> 0) & 7) = adr; |
33796 | PRE_IO |
33797 | READ_WORD_F(adr, res) |
33798 | res &= src; |
33799 | flag_C = 0; |
33800 | flag_V = 0; |
33801 | flag_NotZ = res; |
33802 | flag_N = res >> 8; |
33803 | WRITE_WORD_F(adr, res) |
33804 | POST_IO |
33805 | RET(14) |
33806 | } |
33807 | |
33808 | // ANDDa |
33809 | OPCODE(0xC168) |
33810 | { |
33811 | u32 adr, res; |
33812 | u32 src, dst; |
33813 | |
33814 | src = DREGu16((Opcode >> 9) & 7); |
33815 | FETCH_SWORD(adr); |
33816 | adr += AREG((Opcode >> 0) & 7); |
33817 | PRE_IO |
33818 | READ_WORD_F(adr, res) |
33819 | res &= src; |
33820 | flag_C = 0; |
33821 | flag_V = 0; |
33822 | flag_NotZ = res; |
33823 | flag_N = res >> 8; |
33824 | WRITE_WORD_F(adr, res) |
33825 | POST_IO |
33826 | RET(16) |
33827 | } |
33828 | |
33829 | // ANDDa |
33830 | OPCODE(0xC170) |
33831 | { |
33832 | u32 adr, res; |
33833 | u32 src, dst; |
33834 | |
33835 | src = DREGu16((Opcode >> 9) & 7); |
33836 | adr = AREG((Opcode >> 0) & 7); |
33837 | DECODE_EXT_WORD |
33838 | PRE_IO |
33839 | READ_WORD_F(adr, res) |
33840 | res &= src; |
33841 | flag_C = 0; |
33842 | flag_V = 0; |
33843 | flag_NotZ = res; |
33844 | flag_N = res >> 8; |
33845 | WRITE_WORD_F(adr, res) |
33846 | POST_IO |
33847 | RET(18) |
33848 | } |
33849 | |
33850 | // ANDDa |
33851 | OPCODE(0xC178) |
33852 | { |
33853 | u32 adr, res; |
33854 | u32 src, dst; |
33855 | |
33856 | src = DREGu16((Opcode >> 9) & 7); |
33857 | FETCH_SWORD(adr); |
33858 | PRE_IO |
33859 | READ_WORD_F(adr, res) |
33860 | res &= src; |
33861 | flag_C = 0; |
33862 | flag_V = 0; |
33863 | flag_NotZ = res; |
33864 | flag_N = res >> 8; |
33865 | WRITE_WORD_F(adr, res) |
33866 | POST_IO |
33867 | RET(16) |
33868 | } |
33869 | |
33870 | // ANDDa |
33871 | OPCODE(0xC179) |
33872 | { |
33873 | u32 adr, res; |
33874 | u32 src, dst; |
33875 | |
33876 | src = DREGu16((Opcode >> 9) & 7); |
33877 | FETCH_LONG(adr); |
33878 | PRE_IO |
33879 | READ_WORD_F(adr, res) |
33880 | res &= src; |
33881 | flag_C = 0; |
33882 | flag_V = 0; |
33883 | flag_NotZ = res; |
33884 | flag_N = res >> 8; |
33885 | WRITE_WORD_F(adr, res) |
33886 | POST_IO |
33887 | RET(20) |
33888 | } |
33889 | |
33890 | // ANDDa |
33891 | OPCODE(0xC15F) |
33892 | { |
33893 | u32 adr, res; |
33894 | u32 src, dst; |
33895 | |
33896 | src = DREGu16((Opcode >> 9) & 7); |
33897 | adr = AREG(7); |
33898 | AREG(7) += 2; |
33899 | PRE_IO |
33900 | READ_WORD_F(adr, res) |
33901 | res &= src; |
33902 | flag_C = 0; |
33903 | flag_V = 0; |
33904 | flag_NotZ = res; |
33905 | flag_N = res >> 8; |
33906 | WRITE_WORD_F(adr, res) |
33907 | POST_IO |
33908 | RET(12) |
33909 | } |
33910 | |
33911 | // ANDDa |
33912 | OPCODE(0xC167) |
33913 | { |
33914 | u32 adr, res; |
33915 | u32 src, dst; |
33916 | |
33917 | src = DREGu16((Opcode >> 9) & 7); |
33918 | adr = AREG(7) - 2; |
33919 | AREG(7) = adr; |
33920 | PRE_IO |
33921 | READ_WORD_F(adr, res) |
33922 | res &= src; |
33923 | flag_C = 0; |
33924 | flag_V = 0; |
33925 | flag_NotZ = res; |
33926 | flag_N = res >> 8; |
33927 | WRITE_WORD_F(adr, res) |
33928 | POST_IO |
33929 | RET(14) |
33930 | } |
33931 | |
33932 | // ANDDa |
33933 | OPCODE(0xC190) |
33934 | { |
33935 | u32 adr, res; |
33936 | u32 src, dst; |
33937 | |
33938 | src = DREGu32((Opcode >> 9) & 7); |
33939 | adr = AREG((Opcode >> 0) & 7); |
33940 | PRE_IO |
33941 | READ_LONG_F(adr, res) |
33942 | res &= src; |
33943 | flag_C = 0; |
33944 | flag_V = 0; |
33945 | flag_NotZ = res; |
33946 | flag_N = res >> 24; |
33947 | WRITE_LONG_F(adr, res) |
33948 | POST_IO |
33949 | RET(20) |
33950 | } |
33951 | |
33952 | // ANDDa |
33953 | OPCODE(0xC198) |
33954 | { |
33955 | u32 adr, res; |
33956 | u32 src, dst; |
33957 | |
33958 | src = DREGu32((Opcode >> 9) & 7); |
33959 | adr = AREG((Opcode >> 0) & 7); |
33960 | AREG((Opcode >> 0) & 7) += 4; |
33961 | PRE_IO |
33962 | READ_LONG_F(adr, res) |
33963 | res &= src; |
33964 | flag_C = 0; |
33965 | flag_V = 0; |
33966 | flag_NotZ = res; |
33967 | flag_N = res >> 24; |
33968 | WRITE_LONG_F(adr, res) |
33969 | POST_IO |
33970 | RET(20) |
33971 | } |
33972 | |
33973 | // ANDDa |
33974 | OPCODE(0xC1A0) |
33975 | { |
33976 | u32 adr, res; |
33977 | u32 src, dst; |
33978 | |
33979 | src = DREGu32((Opcode >> 9) & 7); |
33980 | adr = AREG((Opcode >> 0) & 7) - 4; |
33981 | AREG((Opcode >> 0) & 7) = adr; |
33982 | PRE_IO |
33983 | READ_LONG_F(adr, res) |
33984 | res &= src; |
33985 | flag_C = 0; |
33986 | flag_V = 0; |
33987 | flag_NotZ = res; |
33988 | flag_N = res >> 24; |
33989 | WRITE_LONG_F(adr, res) |
33990 | POST_IO |
33991 | RET(22) |
33992 | } |
33993 | |
33994 | // ANDDa |
33995 | OPCODE(0xC1A8) |
33996 | { |
33997 | u32 adr, res; |
33998 | u32 src, dst; |
33999 | |
34000 | src = DREGu32((Opcode >> 9) & 7); |
34001 | FETCH_SWORD(adr); |
34002 | adr += AREG((Opcode >> 0) & 7); |
34003 | PRE_IO |
34004 | READ_LONG_F(adr, res) |
34005 | res &= src; |
34006 | flag_C = 0; |
34007 | flag_V = 0; |
34008 | flag_NotZ = res; |
34009 | flag_N = res >> 24; |
34010 | WRITE_LONG_F(adr, res) |
34011 | POST_IO |
34012 | RET(24) |
34013 | } |
34014 | |
34015 | // ANDDa |
34016 | OPCODE(0xC1B0) |
34017 | { |
34018 | u32 adr, res; |
34019 | u32 src, dst; |
34020 | |
34021 | src = DREGu32((Opcode >> 9) & 7); |
34022 | adr = AREG((Opcode >> 0) & 7); |
34023 | DECODE_EXT_WORD |
34024 | PRE_IO |
34025 | READ_LONG_F(adr, res) |
34026 | res &= src; |
34027 | flag_C = 0; |
34028 | flag_V = 0; |
34029 | flag_NotZ = res; |
34030 | flag_N = res >> 24; |
34031 | WRITE_LONG_F(adr, res) |
34032 | POST_IO |
34033 | RET(26) |
34034 | } |
34035 | |
34036 | // ANDDa |
34037 | OPCODE(0xC1B8) |
34038 | { |
34039 | u32 adr, res; |
34040 | u32 src, dst; |
34041 | |
34042 | src = DREGu32((Opcode >> 9) & 7); |
34043 | FETCH_SWORD(adr); |
34044 | PRE_IO |
34045 | READ_LONG_F(adr, res) |
34046 | res &= src; |
34047 | flag_C = 0; |
34048 | flag_V = 0; |
34049 | flag_NotZ = res; |
34050 | flag_N = res >> 24; |
34051 | WRITE_LONG_F(adr, res) |
34052 | POST_IO |
34053 | RET(24) |
34054 | } |
34055 | |
34056 | // ANDDa |
34057 | OPCODE(0xC1B9) |
34058 | { |
34059 | u32 adr, res; |
34060 | u32 src, dst; |
34061 | |
34062 | src = DREGu32((Opcode >> 9) & 7); |
34063 | FETCH_LONG(adr); |
34064 | PRE_IO |
34065 | READ_LONG_F(adr, res) |
34066 | res &= src; |
34067 | flag_C = 0; |
34068 | flag_V = 0; |
34069 | flag_NotZ = res; |
34070 | flag_N = res >> 24; |
34071 | WRITE_LONG_F(adr, res) |
34072 | POST_IO |
34073 | RET(28) |
34074 | } |
34075 | |
34076 | // ANDDa |
34077 | OPCODE(0xC19F) |
34078 | { |
34079 | u32 adr, res; |
34080 | u32 src, dst; |
34081 | |
34082 | src = DREGu32((Opcode >> 9) & 7); |
34083 | adr = AREG(7); |
34084 | AREG(7) += 4; |
34085 | PRE_IO |
34086 | READ_LONG_F(adr, res) |
34087 | res &= src; |
34088 | flag_C = 0; |
34089 | flag_V = 0; |
34090 | flag_NotZ = res; |
34091 | flag_N = res >> 24; |
34092 | WRITE_LONG_F(adr, res) |
34093 | POST_IO |
34094 | RET(20) |
34095 | } |
34096 | |
34097 | // ANDDa |
34098 | OPCODE(0xC1A7) |
34099 | { |
34100 | u32 adr, res; |
34101 | u32 src, dst; |
34102 | |
34103 | src = DREGu32((Opcode >> 9) & 7); |
34104 | adr = AREG(7) - 4; |
34105 | AREG(7) = adr; |
34106 | PRE_IO |
34107 | READ_LONG_F(adr, res) |
34108 | res &= src; |
34109 | flag_C = 0; |
34110 | flag_V = 0; |
34111 | flag_NotZ = res; |
34112 | flag_N = res >> 24; |
34113 | WRITE_LONG_F(adr, res) |
34114 | POST_IO |
34115 | RET(22) |
34116 | } |
34117 | |
34118 | // ABCD |
34119 | OPCODE(0xC100) |
34120 | { |
34121 | u32 adr, res; |
34122 | u32 src, dst; |
34123 | |
34124 | src = DREGu8((Opcode >> 0) & 7); |
34125 | dst = DREGu8((Opcode >> 9) & 7); |
34126 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34127 | if (res > 9) res += 6; |
34128 | res += (dst & 0xF0) + (src & 0xF0); |
34129 | if (res > 0x99) |
34130 | { |
34131 | res -= 0xA0; |
34132 | flag_X = flag_C = M68K_SR_C; |
34133 | } |
34134 | else flag_X = flag_C = 0; |
34135 | flag_NotZ |= res & 0xFF; |
34136 | flag_N = res; |
34137 | DREGu8((Opcode >> 9) & 7) = res; |
34138 | RET(6) |
34139 | } |
34140 | |
34141 | // ABCDM |
34142 | OPCODE(0xC108) |
34143 | { |
34144 | u32 adr, res; |
34145 | u32 src, dst; |
34146 | |
34147 | adr = AREG((Opcode >> 0) & 7) - 1; |
34148 | AREG((Opcode >> 0) & 7) = adr; |
34149 | PRE_IO |
34150 | READ_BYTE_F(adr, src) |
34151 | adr = AREG((Opcode >> 9) & 7) - 1; |
34152 | AREG((Opcode >> 9) & 7) = adr; |
34153 | READ_BYTE_F(adr, dst) |
34154 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34155 | if (res > 9) res += 6; |
34156 | res += (dst & 0xF0) + (src & 0xF0); |
34157 | if (res > 0x99) |
34158 | { |
34159 | res -= 0xA0; |
34160 | flag_X = flag_C = M68K_SR_C; |
34161 | } |
34162 | else flag_X = flag_C = 0; |
34163 | flag_NotZ |= res & 0xFF; |
34164 | flag_N = res; |
34165 | WRITE_BYTE_F(adr, res) |
34166 | POST_IO |
34167 | RET(18) |
34168 | } |
34169 | |
34170 | // ABCD7M |
34171 | OPCODE(0xC10F) |
34172 | { |
34173 | u32 adr, res; |
34174 | u32 src, dst; |
34175 | |
34176 | adr = AREG(7) - 2; |
34177 | AREG(7) = adr; |
34178 | PRE_IO |
34179 | READ_BYTE_F(adr, src) |
34180 | adr = AREG((Opcode >> 9) & 7) - 1; |
34181 | AREG((Opcode >> 9) & 7) = adr; |
34182 | READ_BYTE_F(adr, dst) |
34183 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34184 | if (res > 9) res += 6; |
34185 | res += (dst & 0xF0) + (src & 0xF0); |
34186 | if (res > 0x99) |
34187 | { |
34188 | res -= 0xA0; |
34189 | flag_X = flag_C = M68K_SR_C; |
34190 | } |
34191 | else flag_X = flag_C = 0; |
34192 | flag_NotZ |= res & 0xFF; |
34193 | flag_N = res; |
34194 | WRITE_BYTE_F(adr, res) |
34195 | POST_IO |
34196 | RET(18) |
34197 | } |
34198 | |
34199 | // ABCDM7 |
34200 | OPCODE(0xCF08) |
34201 | { |
34202 | u32 adr, res; |
34203 | u32 src, dst; |
34204 | |
34205 | adr = AREG((Opcode >> 0) & 7) - 1; |
34206 | AREG((Opcode >> 0) & 7) = adr; |
34207 | PRE_IO |
34208 | READ_BYTE_F(adr, src) |
34209 | adr = AREG(7) - 2; |
34210 | AREG(7) = adr; |
34211 | READ_BYTE_F(adr, dst) |
34212 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34213 | if (res > 9) res += 6; |
34214 | res += (dst & 0xF0) + (src & 0xF0); |
34215 | if (res > 0x99) |
34216 | { |
34217 | res -= 0xA0; |
34218 | flag_X = flag_C = M68K_SR_C; |
34219 | } |
34220 | else flag_X = flag_C = 0; |
34221 | flag_NotZ |= res & 0xFF; |
34222 | flag_N = res; |
34223 | WRITE_BYTE_F(adr, res) |
34224 | POST_IO |
34225 | RET(18) |
34226 | } |
34227 | |
34228 | // ABCD7M7 |
34229 | OPCODE(0xCF0F) |
34230 | { |
34231 | u32 adr, res; |
34232 | u32 src, dst; |
34233 | |
34234 | adr = AREG(7) - 2; |
34235 | AREG(7) = adr; |
34236 | PRE_IO |
34237 | READ_BYTE_F(adr, src) |
34238 | adr = AREG(7) - 2; |
34239 | AREG(7) = adr; |
34240 | READ_BYTE_F(adr, dst) |
34241 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34242 | if (res > 9) res += 6; |
34243 | res += (dst & 0xF0) + (src & 0xF0); |
34244 | if (res > 0x99) |
34245 | { |
34246 | res -= 0xA0; |
34247 | flag_X = flag_C = M68K_SR_C; |
34248 | } |
34249 | else flag_X = flag_C = 0; |
34250 | flag_NotZ |= res & 0xFF; |
34251 | flag_N = res; |
34252 | WRITE_BYTE_F(adr, res) |
34253 | POST_IO |
34254 | RET(18) |
34255 | } |
34256 | |
34257 | // MULU |
34258 | OPCODE(0xC0C0) |
34259 | { |
34260 | u32 adr, res; |
34261 | u32 src, dst; |
34262 | |
34263 | src = DREGu16((Opcode >> 0) & 7); |
34264 | res = DREGu16((Opcode >> 9) & 7); |
34265 | res *= src; |
34266 | flag_N = res >> 24; |
34267 | flag_NotZ = res; |
34268 | flag_V = flag_C = 0; |
34269 | DREGu32((Opcode >> 9) & 7) = res; |
34270 | #ifdef USE_CYCLONE_TIMING |
34271 | RET(54) |
34272 | #else |
34273 | RET(50) |
34274 | #endif |
34275 | } |
34276 | |
34277 | // MULU |
34278 | OPCODE(0xC0D0) |
34279 | { |
34280 | u32 adr, res; |
34281 | u32 src, dst; |
34282 | |
34283 | adr = AREG((Opcode >> 0) & 7); |
34284 | PRE_IO |
34285 | READ_WORD_F(adr, src) |
34286 | res = DREGu16((Opcode >> 9) & 7); |
34287 | res *= src; |
34288 | flag_N = res >> 24; |
34289 | flag_NotZ = res; |
34290 | flag_V = flag_C = 0; |
34291 | DREGu32((Opcode >> 9) & 7) = res; |
34292 | POST_IO |
34293 | #ifdef USE_CYCLONE_TIMING |
34294 | RET(58) |
34295 | #else |
34296 | RET(54) |
34297 | #endif |
34298 | } |
34299 | |
34300 | // MULU |
34301 | OPCODE(0xC0D8) |
34302 | { |
34303 | u32 adr, res; |
34304 | u32 src, dst; |
34305 | |
34306 | adr = AREG((Opcode >> 0) & 7); |
34307 | AREG((Opcode >> 0) & 7) += 2; |
34308 | PRE_IO |
34309 | READ_WORD_F(adr, src) |
34310 | res = DREGu16((Opcode >> 9) & 7); |
34311 | res *= src; |
34312 | flag_N = res >> 24; |
34313 | flag_NotZ = res; |
34314 | flag_V = flag_C = 0; |
34315 | DREGu32((Opcode >> 9) & 7) = res; |
34316 | POST_IO |
34317 | #ifdef USE_CYCLONE_TIMING |
34318 | RET(58) |
34319 | #else |
34320 | RET(54) |
34321 | #endif |
34322 | } |
34323 | |
34324 | // MULU |
34325 | OPCODE(0xC0E0) |
34326 | { |
34327 | u32 adr, res; |
34328 | u32 src, dst; |
34329 | |
34330 | adr = AREG((Opcode >> 0) & 7) - 2; |
34331 | AREG((Opcode >> 0) & 7) = adr; |
34332 | PRE_IO |
34333 | READ_WORD_F(adr, src) |
34334 | res = DREGu16((Opcode >> 9) & 7); |
34335 | res *= src; |
34336 | flag_N = res >> 24; |
34337 | flag_NotZ = res; |
34338 | flag_V = flag_C = 0; |
34339 | DREGu32((Opcode >> 9) & 7) = res; |
34340 | POST_IO |
34341 | #ifdef USE_CYCLONE_TIMING |
34342 | RET(60) |
34343 | #else |
34344 | RET(56) |
34345 | #endif |
34346 | } |
34347 | |
34348 | // MULU |
34349 | OPCODE(0xC0E8) |
34350 | { |
34351 | u32 adr, res; |
34352 | u32 src, dst; |
34353 | |
34354 | FETCH_SWORD(adr); |
34355 | adr += AREG((Opcode >> 0) & 7); |
34356 | PRE_IO |
34357 | READ_WORD_F(adr, src) |
34358 | res = DREGu16((Opcode >> 9) & 7); |
34359 | res *= src; |
34360 | flag_N = res >> 24; |
34361 | flag_NotZ = res; |
34362 | flag_V = flag_C = 0; |
34363 | DREGu32((Opcode >> 9) & 7) = res; |
34364 | POST_IO |
34365 | #ifdef USE_CYCLONE_TIMING |
34366 | RET(62) |
34367 | #else |
34368 | RET(58) |
34369 | #endif |
34370 | } |
34371 | |
34372 | // MULU |
34373 | OPCODE(0xC0F0) |
34374 | { |
34375 | u32 adr, res; |
34376 | u32 src, dst; |
34377 | |
34378 | adr = AREG((Opcode >> 0) & 7); |
34379 | DECODE_EXT_WORD |
34380 | PRE_IO |
34381 | READ_WORD_F(adr, src) |
34382 | res = DREGu16((Opcode >> 9) & 7); |
34383 | res *= src; |
34384 | flag_N = res >> 24; |
34385 | flag_NotZ = res; |
34386 | flag_V = flag_C = 0; |
34387 | DREGu32((Opcode >> 9) & 7) = res; |
34388 | POST_IO |
34389 | #ifdef USE_CYCLONE_TIMING |
34390 | RET(64) |
34391 | #else |
34392 | RET(60) |
34393 | #endif |
34394 | } |
34395 | |
34396 | // MULU |
34397 | OPCODE(0xC0F8) |
34398 | { |
34399 | u32 adr, res; |
34400 | u32 src, dst; |
34401 | |
34402 | FETCH_SWORD(adr); |
34403 | PRE_IO |
34404 | READ_WORD_F(adr, src) |
34405 | res = DREGu16((Opcode >> 9) & 7); |
34406 | res *= src; |
34407 | flag_N = res >> 24; |
34408 | flag_NotZ = res; |
34409 | flag_V = flag_C = 0; |
34410 | DREGu32((Opcode >> 9) & 7) = res; |
34411 | POST_IO |
34412 | #ifdef USE_CYCLONE_TIMING |
34413 | RET(62) |
34414 | #else |
34415 | RET(58) |
34416 | #endif |
34417 | } |
34418 | |
34419 | // MULU |
34420 | OPCODE(0xC0F9) |
34421 | { |
34422 | u32 adr, res; |
34423 | u32 src, dst; |
34424 | |
34425 | FETCH_LONG(adr); |
34426 | PRE_IO |
34427 | READ_WORD_F(adr, src) |
34428 | res = DREGu16((Opcode >> 9) & 7); |
34429 | res *= src; |
34430 | flag_N = res >> 24; |
34431 | flag_NotZ = res; |
34432 | flag_V = flag_C = 0; |
34433 | DREGu32((Opcode >> 9) & 7) = res; |
34434 | POST_IO |
34435 | #ifdef USE_CYCLONE_TIMING |
34436 | RET(66) |
34437 | #else |
34438 | RET(62) |
34439 | #endif |
34440 | } |
34441 | |
34442 | // MULU |
34443 | OPCODE(0xC0FA) |
34444 | { |
34445 | u32 adr, res; |
34446 | u32 src, dst; |
34447 | |
be26eb23 |
34448 | adr = GET_SWORD + GET_PC; |
70357ce5 |
34449 | PC++; |
34450 | PRE_IO |
34451 | READ_WORD_F(adr, src) |
34452 | res = DREGu16((Opcode >> 9) & 7); |
34453 | res *= src; |
34454 | flag_N = res >> 24; |
34455 | flag_NotZ = res; |
34456 | flag_V = flag_C = 0; |
34457 | DREGu32((Opcode >> 9) & 7) = res; |
34458 | POST_IO |
34459 | #ifdef USE_CYCLONE_TIMING |
34460 | RET(62) |
34461 | #else |
34462 | RET(58) |
34463 | #endif |
34464 | } |
34465 | |
34466 | // MULU |
34467 | OPCODE(0xC0FB) |
34468 | { |
34469 | u32 adr, res; |
34470 | u32 src, dst; |
34471 | |
be26eb23 |
34472 | adr = GET_PC; |
70357ce5 |
34473 | DECODE_EXT_WORD |
34474 | PRE_IO |
34475 | READ_WORD_F(adr, src) |
34476 | res = DREGu16((Opcode >> 9) & 7); |
34477 | res *= src; |
34478 | flag_N = res >> 24; |
34479 | flag_NotZ = res; |
34480 | flag_V = flag_C = 0; |
34481 | DREGu32((Opcode >> 9) & 7) = res; |
34482 | POST_IO |
34483 | #ifdef USE_CYCLONE_TIMING |
34484 | RET(64) |
34485 | #else |
34486 | RET(60) |
34487 | #endif |
34488 | } |
34489 | |
34490 | // MULU |
34491 | OPCODE(0xC0FC) |
34492 | { |
34493 | u32 adr, res; |
34494 | u32 src, dst; |
34495 | |
34496 | FETCH_WORD(src); |
34497 | res = DREGu16((Opcode >> 9) & 7); |
34498 | res *= src; |
34499 | flag_N = res >> 24; |
34500 | flag_NotZ = res; |
34501 | flag_V = flag_C = 0; |
34502 | DREGu32((Opcode >> 9) & 7) = res; |
34503 | #ifdef USE_CYCLONE_TIMING |
34504 | RET(58) |
34505 | #else |
34506 | RET(54) |
34507 | #endif |
34508 | } |
34509 | |
34510 | // MULU |
34511 | OPCODE(0xC0DF) |
34512 | { |
34513 | u32 adr, res; |
34514 | u32 src, dst; |
34515 | |
34516 | adr = AREG(7); |
34517 | AREG(7) += 2; |
34518 | PRE_IO |
34519 | READ_WORD_F(adr, src) |
34520 | res = DREGu16((Opcode >> 9) & 7); |
34521 | res *= src; |
34522 | flag_N = res >> 24; |
34523 | flag_NotZ = res; |
34524 | flag_V = flag_C = 0; |
34525 | DREGu32((Opcode >> 9) & 7) = res; |
34526 | POST_IO |
34527 | #ifdef USE_CYCLONE_TIMING |
34528 | RET(58) |
34529 | #else |
34530 | RET(54) |
34531 | #endif |
34532 | } |
34533 | |
34534 | // MULU |
34535 | OPCODE(0xC0E7) |
34536 | { |
34537 | u32 adr, res; |
34538 | u32 src, dst; |
34539 | |
34540 | adr = AREG(7) - 2; |
34541 | AREG(7) = adr; |
34542 | PRE_IO |
34543 | READ_WORD_F(adr, src) |
34544 | res = DREGu16((Opcode >> 9) & 7); |
34545 | res *= src; |
34546 | flag_N = res >> 24; |
34547 | flag_NotZ = res; |
34548 | flag_V = flag_C = 0; |
34549 | DREGu32((Opcode >> 9) & 7) = res; |
34550 | POST_IO |
34551 | #ifdef USE_CYCLONE_TIMING |
34552 | RET(60) |
34553 | #else |
34554 | RET(56) |
34555 | #endif |
34556 | } |
34557 | |
34558 | // MULS |
34559 | OPCODE(0xC1C0) |
34560 | { |
34561 | u32 adr, res; |
34562 | u32 src, dst; |
34563 | |
34564 | src = (s32)DREGs16((Opcode >> 0) & 7); |
34565 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34566 | res = ((s32)res) * ((s32)src); |
34567 | flag_N = res >> 24; |
34568 | flag_NotZ = res; |
34569 | flag_V = flag_C = 0; |
34570 | DREGu32((Opcode >> 9) & 7) = res; |
34571 | #ifdef USE_CYCLONE_TIMING |
34572 | RET(54) |
34573 | #else |
34574 | RET(50) |
34575 | #endif |
34576 | } |
34577 | |
34578 | // MULS |
34579 | OPCODE(0xC1D0) |
34580 | { |
34581 | u32 adr, res; |
34582 | u32 src, dst; |
34583 | |
34584 | adr = AREG((Opcode >> 0) & 7); |
34585 | PRE_IO |
34586 | READSX_WORD_F(adr, src) |
34587 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34588 | res = ((s32)res) * ((s32)src); |
34589 | flag_N = res >> 24; |
34590 | flag_NotZ = res; |
34591 | flag_V = flag_C = 0; |
34592 | DREGu32((Opcode >> 9) & 7) = res; |
34593 | POST_IO |
34594 | #ifdef USE_CYCLONE_TIMING |
34595 | RET(58) |
34596 | #else |
34597 | RET(54) |
34598 | #endif |
34599 | } |
34600 | |
34601 | // MULS |
34602 | OPCODE(0xC1D8) |
34603 | { |
34604 | u32 adr, res; |
34605 | u32 src, dst; |
34606 | |
34607 | adr = AREG((Opcode >> 0) & 7); |
34608 | AREG((Opcode >> 0) & 7) += 2; |
34609 | PRE_IO |
34610 | READSX_WORD_F(adr, src) |
34611 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34612 | res = ((s32)res) * ((s32)src); |
34613 | flag_N = res >> 24; |
34614 | flag_NotZ = res; |
34615 | flag_V = flag_C = 0; |
34616 | DREGu32((Opcode >> 9) & 7) = res; |
34617 | POST_IO |
34618 | #ifdef USE_CYCLONE_TIMING |
34619 | RET(58) |
34620 | #else |
34621 | RET(54) |
34622 | #endif |
34623 | } |
34624 | |
34625 | // MULS |
34626 | OPCODE(0xC1E0) |
34627 | { |
34628 | u32 adr, res; |
34629 | u32 src, dst; |
34630 | |
34631 | adr = AREG((Opcode >> 0) & 7) - 2; |
34632 | AREG((Opcode >> 0) & 7) = adr; |
34633 | PRE_IO |
34634 | READSX_WORD_F(adr, src) |
34635 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34636 | res = ((s32)res) * ((s32)src); |
34637 | flag_N = res >> 24; |
34638 | flag_NotZ = res; |
34639 | flag_V = flag_C = 0; |
34640 | DREGu32((Opcode >> 9) & 7) = res; |
34641 | POST_IO |
34642 | #ifdef USE_CYCLONE_TIMING |
34643 | RET(60) |
34644 | #else |
34645 | RET(56) |
34646 | #endif |
34647 | } |
34648 | |
34649 | // MULS |
34650 | OPCODE(0xC1E8) |
34651 | { |
34652 | u32 adr, res; |
34653 | u32 src, dst; |
34654 | |
34655 | FETCH_SWORD(adr); |
34656 | adr += AREG((Opcode >> 0) & 7); |
34657 | PRE_IO |
34658 | READSX_WORD_F(adr, src) |
34659 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34660 | res = ((s32)res) * ((s32)src); |
34661 | flag_N = res >> 24; |
34662 | flag_NotZ = res; |
34663 | flag_V = flag_C = 0; |
34664 | DREGu32((Opcode >> 9) & 7) = res; |
34665 | POST_IO |
34666 | #ifdef USE_CYCLONE_TIMING |
34667 | RET(62) |
34668 | #else |
34669 | RET(58) |
34670 | #endif |
34671 | } |
34672 | |
34673 | // MULS |
34674 | OPCODE(0xC1F0) |
34675 | { |
34676 | u32 adr, res; |
34677 | u32 src, dst; |
34678 | |
34679 | adr = AREG((Opcode >> 0) & 7); |
34680 | DECODE_EXT_WORD |
34681 | PRE_IO |
34682 | READSX_WORD_F(adr, src) |
34683 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34684 | res = ((s32)res) * ((s32)src); |
34685 | flag_N = res >> 24; |
34686 | flag_NotZ = res; |
34687 | flag_V = flag_C = 0; |
34688 | DREGu32((Opcode >> 9) & 7) = res; |
34689 | POST_IO |
34690 | #ifdef USE_CYCLONE_TIMING |
34691 | RET(64) |
34692 | #else |
34693 | RET(60) |
34694 | #endif |
34695 | } |
34696 | |
34697 | // MULS |
34698 | OPCODE(0xC1F8) |
34699 | { |
34700 | u32 adr, res; |
34701 | u32 src, dst; |
34702 | |
34703 | FETCH_SWORD(adr); |
34704 | PRE_IO |
34705 | READSX_WORD_F(adr, src) |
34706 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34707 | res = ((s32)res) * ((s32)src); |
34708 | flag_N = res >> 24; |
34709 | flag_NotZ = res; |
34710 | flag_V = flag_C = 0; |
34711 | DREGu32((Opcode >> 9) & 7) = res; |
34712 | POST_IO |
34713 | #ifdef USE_CYCLONE_TIMING |
34714 | RET(62) |
34715 | #else |
34716 | RET(58) |
34717 | #endif |
34718 | } |
34719 | |
34720 | // MULS |
34721 | OPCODE(0xC1F9) |
34722 | { |
34723 | u32 adr, res; |
34724 | u32 src, dst; |
34725 | |
34726 | FETCH_LONG(adr); |
34727 | PRE_IO |
34728 | READSX_WORD_F(adr, src) |
34729 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34730 | res = ((s32)res) * ((s32)src); |
34731 | flag_N = res >> 24; |
34732 | flag_NotZ = res; |
34733 | flag_V = flag_C = 0; |
34734 | DREGu32((Opcode >> 9) & 7) = res; |
34735 | POST_IO |
34736 | #ifdef USE_CYCLONE_TIMING |
34737 | RET(66) |
34738 | #else |
34739 | RET(62) |
34740 | #endif |
34741 | } |
34742 | |
34743 | // MULS |
34744 | OPCODE(0xC1FA) |
34745 | { |
34746 | u32 adr, res; |
34747 | u32 src, dst; |
34748 | |
be26eb23 |
34749 | adr = GET_SWORD + GET_PC; |
70357ce5 |
34750 | PC++; |
34751 | PRE_IO |
34752 | READSX_WORD_F(adr, src) |
34753 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34754 | res = ((s32)res) * ((s32)src); |
34755 | flag_N = res >> 24; |
34756 | flag_NotZ = res; |
34757 | flag_V = flag_C = 0; |
34758 | DREGu32((Opcode >> 9) & 7) = res; |
34759 | POST_IO |
34760 | #ifdef USE_CYCLONE_TIMING |
34761 | RET(62) |
34762 | #else |
34763 | RET(58) |
34764 | #endif |
34765 | } |
34766 | |
34767 | // MULS |
34768 | OPCODE(0xC1FB) |
34769 | { |
34770 | u32 adr, res; |
34771 | u32 src, dst; |
34772 | |
be26eb23 |
34773 | adr = GET_PC; |
70357ce5 |
34774 | DECODE_EXT_WORD |
34775 | PRE_IO |
34776 | READSX_WORD_F(adr, src) |
34777 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34778 | res = ((s32)res) * ((s32)src); |
34779 | flag_N = res >> 24; |
34780 | flag_NotZ = res; |
34781 | flag_V = flag_C = 0; |
34782 | DREGu32((Opcode >> 9) & 7) = res; |
34783 | POST_IO |
34784 | #ifdef USE_CYCLONE_TIMING |
34785 | RET(64) |
34786 | #else |
34787 | RET(60) |
34788 | #endif |
34789 | } |
34790 | |
34791 | // MULS |
34792 | OPCODE(0xC1FC) |
34793 | { |
34794 | u32 adr, res; |
34795 | u32 src, dst; |
34796 | |
34797 | FETCH_SWORD(src); |
34798 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34799 | res = ((s32)res) * ((s32)src); |
34800 | flag_N = res >> 24; |
34801 | flag_NotZ = res; |
34802 | flag_V = flag_C = 0; |
34803 | DREGu32((Opcode >> 9) & 7) = res; |
34804 | #ifdef USE_CYCLONE_TIMING |
34805 | RET(58) |
34806 | #else |
34807 | RET(54) |
34808 | #endif |
34809 | } |
34810 | |
34811 | // MULS |
34812 | OPCODE(0xC1DF) |
34813 | { |
34814 | u32 adr, res; |
34815 | u32 src, dst; |
34816 | |
34817 | adr = AREG(7); |
34818 | AREG(7) += 2; |
34819 | PRE_IO |
34820 | READSX_WORD_F(adr, src) |
34821 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34822 | res = ((s32)res) * ((s32)src); |
34823 | flag_N = res >> 24; |
34824 | flag_NotZ = res; |
34825 | flag_V = flag_C = 0; |
34826 | DREGu32((Opcode >> 9) & 7) = res; |
34827 | POST_IO |
34828 | #ifdef USE_CYCLONE_TIMING |
34829 | RET(58) |
34830 | #else |
34831 | RET(54) |
34832 | #endif |
34833 | } |
34834 | |
34835 | // MULS |
34836 | OPCODE(0xC1E7) |
34837 | { |
34838 | u32 adr, res; |
34839 | u32 src, dst; |
34840 | |
34841 | adr = AREG(7) - 2; |
34842 | AREG(7) = adr; |
34843 | PRE_IO |
34844 | READSX_WORD_F(adr, src) |
34845 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34846 | res = ((s32)res) * ((s32)src); |
34847 | flag_N = res >> 24; |
34848 | flag_NotZ = res; |
34849 | flag_V = flag_C = 0; |
34850 | DREGu32((Opcode >> 9) & 7) = res; |
34851 | POST_IO |
34852 | #ifdef USE_CYCLONE_TIMING |
34853 | RET(60) |
34854 | #else |
34855 | RET(56) |
34856 | #endif |
34857 | } |
34858 | |
34859 | // EXGDD |
34860 | OPCODE(0xC140) |
34861 | { |
34862 | u32 adr, res; |
34863 | u32 src, dst; |
34864 | |
34865 | res = DREGu32((Opcode >> 0) & 7); |
34866 | src = DREGu32((Opcode >> 9) & 7); |
34867 | DREGu32((Opcode >> 9) & 7) = res; |
34868 | res = src; |
34869 | DREGu32((Opcode >> 0) & 7) = res; |
34870 | RET(6) |
34871 | } |
34872 | |
34873 | // EXGAA |
34874 | OPCODE(0xC148) |
34875 | { |
34876 | u32 adr, res; |
34877 | u32 src, dst; |
34878 | |
34879 | res = AREGu32((Opcode >> 0) & 7); |
34880 | src = AREGu32((Opcode >> 9) & 7); |
34881 | AREG((Opcode >> 9) & 7) = res; |
34882 | res = src; |
34883 | AREG((Opcode >> 0) & 7) = res; |
34884 | RET(6) |
34885 | } |
34886 | |
34887 | // EXGAD |
34888 | OPCODE(0xC188) |
34889 | { |
34890 | u32 adr, res; |
34891 | u32 src, dst; |
34892 | |
34893 | res = AREGu32((Opcode >> 0) & 7); |
34894 | src = DREGu32((Opcode >> 9) & 7); |
34895 | DREGu32((Opcode >> 9) & 7) = res; |
34896 | res = src; |
34897 | AREG((Opcode >> 0) & 7) = res; |
34898 | RET(6) |
34899 | } |
34900 | |
34901 | // ADDaD |
34902 | OPCODE(0xD000) |
34903 | { |
34904 | u32 adr, res; |
34905 | u32 src, dst; |
34906 | |
34907 | src = DREGu8((Opcode >> 0) & 7); |
34908 | dst = DREGu8((Opcode >> 9) & 7); |
34909 | res = dst + src; |
34910 | flag_N = flag_X = flag_C = res; |
34911 | flag_V = (src ^ res) & (dst ^ res); |
34912 | flag_NotZ = res & 0xFF; |
34913 | DREGu8((Opcode >> 9) & 7) = res; |
34914 | RET(4) |
34915 | } |
34916 | |
34917 | // ADDaD |
03e4f2a3 |
34918 | #if 0 |
70357ce5 |
34919 | OPCODE(0xD008) |
34920 | { |
34921 | u32 adr, res; |
34922 | u32 src, dst; |
34923 | |
34924 | // can't read byte from Ax registers ! |
34925 | m68kcontext.execinfo |= M68K_FAULTED; |
34926 | m68kcontext.io_cycle_counter = 0; |
34927 | /* |
34928 | goto famec_Exec_End; |
34929 | dst = DREGu8((Opcode >> 9) & 7); |
34930 | res = dst + src; |
34931 | flag_N = flag_X = flag_C = res; |
34932 | flag_V = (src ^ res) & (dst ^ res); |
34933 | flag_NotZ = res & 0xFF; |
34934 | DREGu8((Opcode >> 9) & 7) = res; |
34935 | */ |
34936 | RET(4) |
34937 | } |
03e4f2a3 |
34938 | #endif |
70357ce5 |
34939 | |
34940 | // ADDaD |
34941 | OPCODE(0xD010) |
34942 | { |
34943 | u32 adr, res; |
34944 | u32 src, dst; |
34945 | |
34946 | adr = AREG((Opcode >> 0) & 7); |
34947 | PRE_IO |
34948 | READ_BYTE_F(adr, src) |
34949 | dst = DREGu8((Opcode >> 9) & 7); |
34950 | res = dst + src; |
34951 | flag_N = flag_X = flag_C = res; |
34952 | flag_V = (src ^ res) & (dst ^ res); |
34953 | flag_NotZ = res & 0xFF; |
34954 | DREGu8((Opcode >> 9) & 7) = res; |
34955 | POST_IO |
34956 | RET(8) |
34957 | } |
34958 | |
34959 | // ADDaD |
34960 | OPCODE(0xD018) |
34961 | { |
34962 | u32 adr, res; |
34963 | u32 src, dst; |
34964 | |
34965 | adr = AREG((Opcode >> 0) & 7); |
34966 | AREG((Opcode >> 0) & 7) += 1; |
34967 | PRE_IO |
34968 | READ_BYTE_F(adr, src) |
34969 | dst = DREGu8((Opcode >> 9) & 7); |
34970 | res = dst + src; |
34971 | flag_N = flag_X = flag_C = res; |
34972 | flag_V = (src ^ res) & (dst ^ res); |
34973 | flag_NotZ = res & 0xFF; |
34974 | DREGu8((Opcode >> 9) & 7) = res; |
34975 | POST_IO |
34976 | RET(8) |
34977 | } |
34978 | |
34979 | // ADDaD |
34980 | OPCODE(0xD020) |
34981 | { |
34982 | u32 adr, res; |
34983 | u32 src, dst; |
34984 | |
34985 | adr = AREG((Opcode >> 0) & 7) - 1; |
34986 | AREG((Opcode >> 0) & 7) = adr; |
34987 | PRE_IO |
34988 | READ_BYTE_F(adr, src) |
34989 | dst = DREGu8((Opcode >> 9) & 7); |
34990 | res = dst + src; |
34991 | flag_N = flag_X = flag_C = res; |
34992 | flag_V = (src ^ res) & (dst ^ res); |
34993 | flag_NotZ = res & 0xFF; |
34994 | DREGu8((Opcode >> 9) & 7) = res; |
34995 | POST_IO |
34996 | RET(10) |
34997 | } |
34998 | |
34999 | // ADDaD |
35000 | OPCODE(0xD028) |
35001 | { |
35002 | u32 adr, res; |
35003 | u32 src, dst; |
35004 | |
35005 | FETCH_SWORD(adr); |
35006 | adr += AREG((Opcode >> 0) & 7); |
35007 | PRE_IO |
35008 | READ_BYTE_F(adr, src) |
35009 | dst = DREGu8((Opcode >> 9) & 7); |
35010 | res = dst + src; |
35011 | flag_N = flag_X = flag_C = res; |
35012 | flag_V = (src ^ res) & (dst ^ res); |
35013 | flag_NotZ = res & 0xFF; |
35014 | DREGu8((Opcode >> 9) & 7) = res; |
35015 | POST_IO |
35016 | RET(12) |
35017 | } |
35018 | |
35019 | // ADDaD |
35020 | OPCODE(0xD030) |
35021 | { |
35022 | u32 adr, res; |
35023 | u32 src, dst; |
35024 | |
35025 | adr = AREG((Opcode >> 0) & 7); |
35026 | DECODE_EXT_WORD |
35027 | PRE_IO |
35028 | READ_BYTE_F(adr, src) |
35029 | dst = DREGu8((Opcode >> 9) & 7); |
35030 | res = dst + src; |
35031 | flag_N = flag_X = flag_C = res; |
35032 | flag_V = (src ^ res) & (dst ^ res); |
35033 | flag_NotZ = res & 0xFF; |
35034 | DREGu8((Opcode >> 9) & 7) = res; |
35035 | POST_IO |
35036 | RET(14) |
35037 | } |
35038 | |
35039 | // ADDaD |
35040 | OPCODE(0xD038) |
35041 | { |
35042 | u32 adr, res; |
35043 | u32 src, dst; |
35044 | |
35045 | FETCH_SWORD(adr); |
35046 | PRE_IO |
35047 | READ_BYTE_F(adr, src) |
35048 | dst = DREGu8((Opcode >> 9) & 7); |
35049 | res = dst + src; |
35050 | flag_N = flag_X = flag_C = res; |
35051 | flag_V = (src ^ res) & (dst ^ res); |
35052 | flag_NotZ = res & 0xFF; |
35053 | DREGu8((Opcode >> 9) & 7) = res; |
35054 | POST_IO |
35055 | RET(12) |
35056 | } |
35057 | |
35058 | // ADDaD |
35059 | OPCODE(0xD039) |
35060 | { |
35061 | u32 adr, res; |
35062 | u32 src, dst; |
35063 | |
35064 | FETCH_LONG(adr); |
35065 | PRE_IO |
35066 | READ_BYTE_F(adr, src) |
35067 | dst = DREGu8((Opcode >> 9) & 7); |
35068 | res = dst + src; |
35069 | flag_N = flag_X = flag_C = res; |
35070 | flag_V = (src ^ res) & (dst ^ res); |
35071 | flag_NotZ = res & 0xFF; |
35072 | DREGu8((Opcode >> 9) & 7) = res; |
35073 | POST_IO |
35074 | RET(16) |
35075 | } |
35076 | |
35077 | // ADDaD |
35078 | OPCODE(0xD03A) |
35079 | { |
35080 | u32 adr, res; |
35081 | u32 src, dst; |
35082 | |
be26eb23 |
35083 | adr = GET_SWORD + GET_PC; |
70357ce5 |
35084 | PC++; |
35085 | PRE_IO |
35086 | READ_BYTE_F(adr, src) |
35087 | dst = DREGu8((Opcode >> 9) & 7); |
35088 | res = dst + src; |
35089 | flag_N = flag_X = flag_C = res; |
35090 | flag_V = (src ^ res) & (dst ^ res); |
35091 | flag_NotZ = res & 0xFF; |
35092 | DREGu8((Opcode >> 9) & 7) = res; |
35093 | POST_IO |
35094 | RET(12) |
35095 | } |
35096 | |
35097 | // ADDaD |
35098 | OPCODE(0xD03B) |
35099 | { |
35100 | u32 adr, res; |
35101 | u32 src, dst; |
35102 | |
be26eb23 |
35103 | adr = GET_PC; |
70357ce5 |
35104 | DECODE_EXT_WORD |
35105 | PRE_IO |
35106 | READ_BYTE_F(adr, src) |
35107 | dst = DREGu8((Opcode >> 9) & 7); |
35108 | res = dst + src; |
35109 | flag_N = flag_X = flag_C = res; |
35110 | flag_V = (src ^ res) & (dst ^ res); |
35111 | flag_NotZ = res & 0xFF; |
35112 | DREGu8((Opcode >> 9) & 7) = res; |
35113 | POST_IO |
35114 | RET(14) |
35115 | } |
35116 | |
35117 | // ADDaD |
35118 | OPCODE(0xD03C) |
35119 | { |
35120 | u32 adr, res; |
35121 | u32 src, dst; |
35122 | |
35123 | FETCH_BYTE(src); |
35124 | dst = DREGu8((Opcode >> 9) & 7); |
35125 | res = dst + src; |
35126 | flag_N = flag_X = flag_C = res; |
35127 | flag_V = (src ^ res) & (dst ^ res); |
35128 | flag_NotZ = res & 0xFF; |
35129 | DREGu8((Opcode >> 9) & 7) = res; |
35130 | RET(8) |
35131 | } |
35132 | |
35133 | // ADDaD |
35134 | OPCODE(0xD01F) |
35135 | { |
35136 | u32 adr, res; |
35137 | u32 src, dst; |
35138 | |
35139 | adr = AREG(7); |
35140 | AREG(7) += 2; |
35141 | PRE_IO |
35142 | READ_BYTE_F(adr, src) |
35143 | dst = DREGu8((Opcode >> 9) & 7); |
35144 | res = dst + src; |
35145 | flag_N = flag_X = flag_C = res; |
35146 | flag_V = (src ^ res) & (dst ^ res); |
35147 | flag_NotZ = res & 0xFF; |
35148 | DREGu8((Opcode >> 9) & 7) = res; |
35149 | POST_IO |
35150 | RET(8) |
35151 | } |
35152 | |
35153 | // ADDaD |
35154 | OPCODE(0xD027) |
35155 | { |
35156 | u32 adr, res; |
35157 | u32 src, dst; |
35158 | |
35159 | adr = AREG(7) - 2; |
35160 | AREG(7) = adr; |
35161 | PRE_IO |
35162 | READ_BYTE_F(adr, src) |
35163 | dst = DREGu8((Opcode >> 9) & 7); |
35164 | res = dst + src; |
35165 | flag_N = flag_X = flag_C = res; |
35166 | flag_V = (src ^ res) & (dst ^ res); |
35167 | flag_NotZ = res & 0xFF; |
35168 | DREGu8((Opcode >> 9) & 7) = res; |
35169 | POST_IO |
35170 | RET(10) |
35171 | } |
35172 | |
35173 | // ADDaD |
35174 | OPCODE(0xD040) |
35175 | { |
35176 | u32 adr, res; |
35177 | u32 src, dst; |
35178 | |
35179 | src = DREGu16((Opcode >> 0) & 7); |
35180 | dst = DREGu16((Opcode >> 9) & 7); |
35181 | res = dst + src; |
35182 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35183 | flag_N = flag_X = flag_C = res >> 8; |
35184 | flag_NotZ = res & 0xFFFF; |
35185 | DREGu16((Opcode >> 9) & 7) = res; |
35186 | RET(4) |
35187 | } |
35188 | |
35189 | // ADDaD |
35190 | OPCODE(0xD048) |
35191 | { |
35192 | u32 adr, res; |
35193 | u32 src, dst; |
35194 | |
35195 | src = AREGu16((Opcode >> 0) & 7); |
35196 | dst = DREGu16((Opcode >> 9) & 7); |
35197 | res = dst + src; |
35198 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35199 | flag_N = flag_X = flag_C = res >> 8; |
35200 | flag_NotZ = res & 0xFFFF; |
35201 | DREGu16((Opcode >> 9) & 7) = res; |
35202 | RET(4) |
35203 | } |
35204 | |
35205 | // ADDaD |
35206 | OPCODE(0xD050) |
35207 | { |
35208 | u32 adr, res; |
35209 | u32 src, dst; |
35210 | |
35211 | adr = AREG((Opcode >> 0) & 7); |
35212 | PRE_IO |
35213 | READ_WORD_F(adr, src) |
35214 | dst = DREGu16((Opcode >> 9) & 7); |
35215 | res = dst + src; |
35216 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35217 | flag_N = flag_X = flag_C = res >> 8; |
35218 | flag_NotZ = res & 0xFFFF; |
35219 | DREGu16((Opcode >> 9) & 7) = res; |
35220 | POST_IO |
35221 | RET(8) |
35222 | } |
35223 | |
35224 | // ADDaD |
35225 | OPCODE(0xD058) |
35226 | { |
35227 | u32 adr, res; |
35228 | u32 src, dst; |
35229 | |
35230 | adr = AREG((Opcode >> 0) & 7); |
35231 | AREG((Opcode >> 0) & 7) += 2; |
35232 | PRE_IO |
35233 | READ_WORD_F(adr, src) |
35234 | dst = DREGu16((Opcode >> 9) & 7); |
35235 | res = dst + src; |
35236 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35237 | flag_N = flag_X = flag_C = res >> 8; |
35238 | flag_NotZ = res & 0xFFFF; |
35239 | DREGu16((Opcode >> 9) & 7) = res; |
35240 | POST_IO |
35241 | RET(8) |
35242 | } |
35243 | |
35244 | // ADDaD |
35245 | OPCODE(0xD060) |
35246 | { |
35247 | u32 adr, res; |
35248 | u32 src, dst; |
35249 | |
35250 | adr = AREG((Opcode >> 0) & 7) - 2; |
35251 | AREG((Opcode >> 0) & 7) = adr; |
35252 | PRE_IO |
35253 | READ_WORD_F(adr, src) |
35254 | dst = DREGu16((Opcode >> 9) & 7); |
35255 | res = dst + src; |
35256 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35257 | flag_N = flag_X = flag_C = res >> 8; |
35258 | flag_NotZ = res & 0xFFFF; |
35259 | DREGu16((Opcode >> 9) & 7) = res; |
35260 | POST_IO |
35261 | RET(10) |
35262 | } |
35263 | |
35264 | // ADDaD |
35265 | OPCODE(0xD068) |
35266 | { |
35267 | u32 adr, res; |
35268 | u32 src, dst; |
35269 | |
35270 | FETCH_SWORD(adr); |
35271 | adr += AREG((Opcode >> 0) & 7); |
35272 | PRE_IO |
35273 | READ_WORD_F(adr, src) |
35274 | dst = DREGu16((Opcode >> 9) & 7); |
35275 | res = dst + src; |
35276 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35277 | flag_N = flag_X = flag_C = res >> 8; |
35278 | flag_NotZ = res & 0xFFFF; |
35279 | DREGu16((Opcode >> 9) & 7) = res; |
35280 | POST_IO |
35281 | RET(12) |
35282 | } |
35283 | |
35284 | // ADDaD |
35285 | OPCODE(0xD070) |
35286 | { |
35287 | u32 adr, res; |
35288 | u32 src, dst; |
35289 | |
35290 | adr = AREG((Opcode >> 0) & 7); |
35291 | DECODE_EXT_WORD |
35292 | PRE_IO |
35293 | READ_WORD_F(adr, src) |
35294 | dst = DREGu16((Opcode >> 9) & 7); |
35295 | res = dst + src; |
35296 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35297 | flag_N = flag_X = flag_C = res >> 8; |
35298 | flag_NotZ = res & 0xFFFF; |
35299 | DREGu16((Opcode >> 9) & 7) = res; |
35300 | POST_IO |
35301 | RET(14) |
35302 | } |
35303 | |
35304 | // ADDaD |
35305 | OPCODE(0xD078) |
35306 | { |
35307 | u32 adr, res; |
35308 | u32 src, dst; |
35309 | |
35310 | FETCH_SWORD(adr); |
35311 | PRE_IO |
35312 | READ_WORD_F(adr, src) |
35313 | dst = DREGu16((Opcode >> 9) & 7); |
35314 | res = dst + src; |
35315 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35316 | flag_N = flag_X = flag_C = res >> 8; |
35317 | flag_NotZ = res & 0xFFFF; |
35318 | DREGu16((Opcode >> 9) & 7) = res; |
35319 | POST_IO |
35320 | RET(12) |
35321 | } |
35322 | |
35323 | // ADDaD |
35324 | OPCODE(0xD079) |
35325 | { |
35326 | u32 adr, res; |
35327 | u32 src, dst; |
35328 | |
35329 | FETCH_LONG(adr); |
35330 | PRE_IO |
35331 | READ_WORD_F(adr, src) |
35332 | dst = DREGu16((Opcode >> 9) & 7); |
35333 | res = dst + src; |
35334 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35335 | flag_N = flag_X = flag_C = res >> 8; |
35336 | flag_NotZ = res & 0xFFFF; |
35337 | DREGu16((Opcode >> 9) & 7) = res; |
35338 | POST_IO |
35339 | RET(16) |
35340 | } |
35341 | |
35342 | // ADDaD |
35343 | OPCODE(0xD07A) |
35344 | { |
35345 | u32 adr, res; |
35346 | u32 src, dst; |
35347 | |
be26eb23 |
35348 | adr = GET_SWORD + GET_PC; |
70357ce5 |
35349 | PC++; |
35350 | PRE_IO |
35351 | READ_WORD_F(adr, src) |
35352 | dst = DREGu16((Opcode >> 9) & 7); |
35353 | res = dst + src; |
35354 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35355 | flag_N = flag_X = flag_C = res >> 8; |
35356 | flag_NotZ = res & 0xFFFF; |
35357 | DREGu16((Opcode >> 9) & 7) = res; |
35358 | POST_IO |
35359 | RET(12) |
35360 | } |
35361 | |
35362 | // ADDaD |
35363 | OPCODE(0xD07B) |
35364 | { |
35365 | u32 adr, res; |
35366 | u32 src, dst; |
35367 | |
be26eb23 |
35368 | adr = GET_PC; |
70357ce5 |
35369 | DECODE_EXT_WORD |
35370 | PRE_IO |
35371 | READ_WORD_F(adr, src) |
35372 | dst = DREGu16((Opcode >> 9) & 7); |
35373 | res = dst + src; |
35374 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35375 | flag_N = flag_X = flag_C = res >> 8; |
35376 | flag_NotZ = res & 0xFFFF; |
35377 | DREGu16((Opcode >> 9) & 7) = res; |
35378 | POST_IO |
35379 | RET(14) |
35380 | } |
35381 | |
35382 | // ADDaD |
35383 | OPCODE(0xD07C) |
35384 | { |
35385 | u32 adr, res; |
35386 | u32 src, dst; |
35387 | |
35388 | FETCH_WORD(src); |
35389 | dst = DREGu16((Opcode >> 9) & 7); |
35390 | res = dst + src; |
35391 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35392 | flag_N = flag_X = flag_C = res >> 8; |
35393 | flag_NotZ = res & 0xFFFF; |
35394 | DREGu16((Opcode >> 9) & 7) = res; |
35395 | RET(8) |
35396 | } |
35397 | |
35398 | // ADDaD |
35399 | OPCODE(0xD05F) |
35400 | { |
35401 | u32 adr, res; |
35402 | u32 src, dst; |
35403 | |
35404 | adr = AREG(7); |
35405 | AREG(7) += 2; |
35406 | PRE_IO |
35407 | READ_WORD_F(adr, src) |
35408 | dst = DREGu16((Opcode >> 9) & 7); |
35409 | res = dst + src; |
35410 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35411 | flag_N = flag_X = flag_C = res >> 8; |
35412 | flag_NotZ = res & 0xFFFF; |
35413 | DREGu16((Opcode >> 9) & 7) = res; |
35414 | POST_IO |
35415 | RET(8) |
35416 | } |
35417 | |
35418 | // ADDaD |
35419 | OPCODE(0xD067) |
35420 | { |
35421 | u32 adr, res; |
35422 | u32 src, dst; |
35423 | |
35424 | adr = AREG(7) - 2; |
35425 | AREG(7) = adr; |
35426 | PRE_IO |
35427 | READ_WORD_F(adr, src) |
35428 | dst = DREGu16((Opcode >> 9) & 7); |
35429 | res = dst + src; |
35430 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35431 | flag_N = flag_X = flag_C = res >> 8; |
35432 | flag_NotZ = res & 0xFFFF; |
35433 | DREGu16((Opcode >> 9) & 7) = res; |
35434 | POST_IO |
35435 | RET(10) |
35436 | } |
35437 | |
35438 | // ADDaD |
35439 | OPCODE(0xD080) |
35440 | { |
35441 | u32 adr, res; |
35442 | u32 src, dst; |
35443 | |
35444 | src = DREGu32((Opcode >> 0) & 7); |
35445 | dst = DREGu32((Opcode >> 9) & 7); |
35446 | res = dst + src; |
35447 | flag_NotZ = res; |
35448 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35449 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35450 | flag_N = res >> 24; |
35451 | DREGu32((Opcode >> 9) & 7) = res; |
35452 | RET(8) |
35453 | } |
35454 | |
35455 | // ADDaD |
35456 | OPCODE(0xD088) |
35457 | { |
35458 | u32 adr, res; |
35459 | u32 src, dst; |
35460 | |
35461 | src = AREGu32((Opcode >> 0) & 7); |
35462 | dst = DREGu32((Opcode >> 9) & 7); |
35463 | res = dst + src; |
35464 | flag_NotZ = res; |
35465 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35466 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35467 | flag_N = res >> 24; |
35468 | DREGu32((Opcode >> 9) & 7) = res; |
35469 | RET(8) |
35470 | } |
35471 | |
35472 | // ADDaD |
35473 | OPCODE(0xD090) |
35474 | { |
35475 | u32 adr, res; |
35476 | u32 src, dst; |
35477 | |
35478 | adr = AREG((Opcode >> 0) & 7); |
35479 | PRE_IO |
35480 | READ_LONG_F(adr, src) |
35481 | dst = DREGu32((Opcode >> 9) & 7); |
35482 | res = dst + src; |
35483 | flag_NotZ = res; |
35484 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35485 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35486 | flag_N = res >> 24; |
35487 | DREGu32((Opcode >> 9) & 7) = res; |
35488 | POST_IO |
35489 | RET(14) |
35490 | } |
35491 | |
35492 | // ADDaD |
35493 | OPCODE(0xD098) |
35494 | { |
35495 | u32 adr, res; |
35496 | u32 src, dst; |
35497 | |
35498 | adr = AREG((Opcode >> 0) & 7); |
35499 | AREG((Opcode >> 0) & 7) += 4; |
35500 | PRE_IO |
35501 | READ_LONG_F(adr, src) |
35502 | dst = DREGu32((Opcode >> 9) & 7); |
35503 | res = dst + src; |
35504 | flag_NotZ = res; |
35505 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35506 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35507 | flag_N = res >> 24; |
35508 | DREGu32((Opcode >> 9) & 7) = res; |
35509 | POST_IO |
35510 | RET(14) |
35511 | } |
35512 | |
35513 | // ADDaD |
35514 | OPCODE(0xD0A0) |
35515 | { |
35516 | u32 adr, res; |
35517 | u32 src, dst; |
35518 | |
35519 | adr = AREG((Opcode >> 0) & 7) - 4; |
35520 | AREG((Opcode >> 0) & 7) = adr; |
35521 | PRE_IO |
35522 | READ_LONG_F(adr, src) |
35523 | dst = DREGu32((Opcode >> 9) & 7); |
35524 | res = dst + src; |
35525 | flag_NotZ = res; |
35526 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35527 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35528 | flag_N = res >> 24; |
35529 | DREGu32((Opcode >> 9) & 7) = res; |
35530 | POST_IO |
35531 | RET(16) |
35532 | } |
35533 | |
35534 | // ADDaD |
35535 | OPCODE(0xD0A8) |
35536 | { |
35537 | u32 adr, res; |
35538 | u32 src, dst; |
35539 | |
35540 | FETCH_SWORD(adr); |
35541 | adr += AREG((Opcode >> 0) & 7); |
35542 | PRE_IO |
35543 | READ_LONG_F(adr, src) |
35544 | dst = DREGu32((Opcode >> 9) & 7); |
35545 | res = dst + src; |
35546 | flag_NotZ = res; |
35547 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35548 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35549 | flag_N = res >> 24; |
35550 | DREGu32((Opcode >> 9) & 7) = res; |
35551 | POST_IO |
35552 | RET(18) |
35553 | } |
35554 | |
35555 | // ADDaD |
35556 | OPCODE(0xD0B0) |
35557 | { |
35558 | u32 adr, res; |
35559 | u32 src, dst; |
35560 | |
35561 | adr = AREG((Opcode >> 0) & 7); |
35562 | DECODE_EXT_WORD |
35563 | PRE_IO |
35564 | READ_LONG_F(adr, src) |
35565 | dst = DREGu32((Opcode >> 9) & 7); |
35566 | res = dst + src; |
35567 | flag_NotZ = res; |
35568 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35569 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35570 | flag_N = res >> 24; |
35571 | DREGu32((Opcode >> 9) & 7) = res; |
35572 | POST_IO |
35573 | RET(20) |
35574 | } |
35575 | |
35576 | // ADDaD |
35577 | OPCODE(0xD0B8) |
35578 | { |
35579 | u32 adr, res; |
35580 | u32 src, dst; |
35581 | |
35582 | FETCH_SWORD(adr); |
35583 | PRE_IO |
35584 | READ_LONG_F(adr, src) |
35585 | dst = DREGu32((Opcode >> 9) & 7); |
35586 | res = dst + src; |
35587 | flag_NotZ = res; |
35588 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35589 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35590 | flag_N = res >> 24; |
35591 | DREGu32((Opcode >> 9) & 7) = res; |
35592 | POST_IO |
35593 | RET(18) |
35594 | } |
35595 | |
35596 | // ADDaD |
35597 | OPCODE(0xD0B9) |
35598 | { |
35599 | u32 adr, res; |
35600 | u32 src, dst; |
35601 | |
35602 | FETCH_LONG(adr); |
35603 | PRE_IO |
35604 | READ_LONG_F(adr, src) |
35605 | dst = DREGu32((Opcode >> 9) & 7); |
35606 | res = dst + src; |
35607 | flag_NotZ = res; |
35608 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35609 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35610 | flag_N = res >> 24; |
35611 | DREGu32((Opcode >> 9) & 7) = res; |
35612 | POST_IO |
35613 | RET(22) |
35614 | } |
35615 | |
35616 | // ADDaD |
35617 | OPCODE(0xD0BA) |
35618 | { |
35619 | u32 adr, res; |
35620 | u32 src, dst; |
35621 | |
be26eb23 |
35622 | adr = GET_SWORD + GET_PC; |
70357ce5 |
35623 | PC++; |
35624 | PRE_IO |
35625 | READ_LONG_F(adr, src) |
35626 | dst = DREGu32((Opcode >> 9) & 7); |
35627 | res = dst + src; |
35628 | flag_NotZ = res; |
35629 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35630 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35631 | flag_N = res >> 24; |
35632 | DREGu32((Opcode >> 9) & 7) = res; |
35633 | POST_IO |
35634 | RET(18) |
35635 | } |
35636 | |
35637 | // ADDaD |
35638 | OPCODE(0xD0BB) |
35639 | { |
35640 | u32 adr, res; |
35641 | u32 src, dst; |
35642 | |
be26eb23 |
35643 | adr = GET_PC; |
70357ce5 |
35644 | DECODE_EXT_WORD |
35645 | PRE_IO |
35646 | READ_LONG_F(adr, src) |
35647 | dst = DREGu32((Opcode >> 9) & 7); |
35648 | res = dst + src; |
35649 | flag_NotZ = res; |
35650 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35651 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35652 | flag_N = res >> 24; |
35653 | DREGu32((Opcode >> 9) & 7) = res; |
35654 | POST_IO |
35655 | RET(20) |
35656 | } |
35657 | |
35658 | // ADDaD |
35659 | OPCODE(0xD0BC) |
35660 | { |
35661 | u32 adr, res; |
35662 | u32 src, dst; |
35663 | |
35664 | FETCH_LONG(src); |
35665 | dst = DREGu32((Opcode >> 9) & 7); |
35666 | res = dst + src; |
35667 | flag_NotZ = res; |
35668 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35669 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35670 | flag_N = res >> 24; |
35671 | DREGu32((Opcode >> 9) & 7) = res; |
35672 | RET(16) |
35673 | } |
35674 | |
35675 | // ADDaD |
35676 | OPCODE(0xD09F) |
35677 | { |
35678 | u32 adr, res; |
35679 | u32 src, dst; |
35680 | |
35681 | adr = AREG(7); |
35682 | AREG(7) += 4; |
35683 | PRE_IO |
35684 | READ_LONG_F(adr, src) |
35685 | dst = DREGu32((Opcode >> 9) & 7); |
35686 | res = dst + src; |
35687 | flag_NotZ = res; |
35688 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35689 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35690 | flag_N = res >> 24; |
35691 | DREGu32((Opcode >> 9) & 7) = res; |
35692 | POST_IO |
35693 | RET(14) |
35694 | } |
35695 | |
35696 | // ADDaD |
35697 | OPCODE(0xD0A7) |
35698 | { |
35699 | u32 adr, res; |
35700 | u32 src, dst; |
35701 | |
35702 | adr = AREG(7) - 4; |
35703 | AREG(7) = adr; |
35704 | PRE_IO |
35705 | READ_LONG_F(adr, src) |
35706 | dst = DREGu32((Opcode >> 9) & 7); |
35707 | res = dst + src; |
35708 | flag_NotZ = res; |
35709 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35710 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35711 | flag_N = res >> 24; |
35712 | DREGu32((Opcode >> 9) & 7) = res; |
35713 | POST_IO |
35714 | RET(16) |
35715 | } |
35716 | |
35717 | // ADDDa |
35718 | OPCODE(0xD110) |
35719 | { |
35720 | u32 adr, res; |
35721 | u32 src, dst; |
35722 | |
35723 | src = DREGu8((Opcode >> 9) & 7); |
35724 | adr = AREG((Opcode >> 0) & 7); |
35725 | PRE_IO |
35726 | READ_BYTE_F(adr, dst) |
35727 | res = dst + src; |
35728 | flag_N = flag_X = flag_C = res; |
35729 | flag_V = (src ^ res) & (dst ^ res); |
35730 | flag_NotZ = res & 0xFF; |
35731 | WRITE_BYTE_F(adr, res) |
35732 | POST_IO |
35733 | RET(12) |
35734 | } |
35735 | |
35736 | // ADDDa |
35737 | OPCODE(0xD118) |
35738 | { |
35739 | u32 adr, res; |
35740 | u32 src, dst; |
35741 | |
35742 | src = DREGu8((Opcode >> 9) & 7); |
35743 | adr = AREG((Opcode >> 0) & 7); |
35744 | AREG((Opcode >> 0) & 7) += 1; |
35745 | PRE_IO |
35746 | READ_BYTE_F(adr, dst) |
35747 | res = dst + src; |
35748 | flag_N = flag_X = flag_C = res; |
35749 | flag_V = (src ^ res) & (dst ^ res); |
35750 | flag_NotZ = res & 0xFF; |
35751 | WRITE_BYTE_F(adr, res) |
35752 | POST_IO |
35753 | RET(12) |
35754 | } |
35755 | |
35756 | // ADDDa |
35757 | OPCODE(0xD120) |
35758 | { |
35759 | u32 adr, res; |
35760 | u32 src, dst; |
35761 | |
35762 | src = DREGu8((Opcode >> 9) & 7); |
35763 | adr = AREG((Opcode >> 0) & 7) - 1; |
35764 | AREG((Opcode >> 0) & 7) = adr; |
35765 | PRE_IO |
35766 | READ_BYTE_F(adr, dst) |
35767 | res = dst + src; |
35768 | flag_N = flag_X = flag_C = res; |
35769 | flag_V = (src ^ res) & (dst ^ res); |
35770 | flag_NotZ = res & 0xFF; |
35771 | WRITE_BYTE_F(adr, res) |
35772 | POST_IO |
35773 | RET(14) |
35774 | } |
35775 | |
35776 | // ADDDa |
35777 | OPCODE(0xD128) |
35778 | { |
35779 | u32 adr, res; |
35780 | u32 src, dst; |
35781 | |
35782 | src = DREGu8((Opcode >> 9) & 7); |
35783 | FETCH_SWORD(adr); |
35784 | adr += AREG((Opcode >> 0) & 7); |
35785 | PRE_IO |
35786 | READ_BYTE_F(adr, dst) |
35787 | res = dst + src; |
35788 | flag_N = flag_X = flag_C = res; |
35789 | flag_V = (src ^ res) & (dst ^ res); |
35790 | flag_NotZ = res & 0xFF; |
35791 | WRITE_BYTE_F(adr, res) |
35792 | POST_IO |
35793 | RET(16) |
35794 | } |
35795 | |
35796 | // ADDDa |
35797 | OPCODE(0xD130) |
35798 | { |
35799 | u32 adr, res; |
35800 | u32 src, dst; |
35801 | |
35802 | src = DREGu8((Opcode >> 9) & 7); |
35803 | adr = AREG((Opcode >> 0) & 7); |
35804 | DECODE_EXT_WORD |
35805 | PRE_IO |
35806 | READ_BYTE_F(adr, dst) |
35807 | res = dst + src; |
35808 | flag_N = flag_X = flag_C = res; |
35809 | flag_V = (src ^ res) & (dst ^ res); |
35810 | flag_NotZ = res & 0xFF; |
35811 | WRITE_BYTE_F(adr, res) |
35812 | POST_IO |
35813 | RET(18) |
35814 | } |
35815 | |
35816 | // ADDDa |
35817 | OPCODE(0xD138) |
35818 | { |
35819 | u32 adr, res; |
35820 | u32 src, dst; |
35821 | |
35822 | src = DREGu8((Opcode >> 9) & 7); |
35823 | FETCH_SWORD(adr); |
35824 | PRE_IO |
35825 | READ_BYTE_F(adr, dst) |
35826 | res = dst + src; |
35827 | flag_N = flag_X = flag_C = res; |
35828 | flag_V = (src ^ res) & (dst ^ res); |
35829 | flag_NotZ = res & 0xFF; |
35830 | WRITE_BYTE_F(adr, res) |
35831 | POST_IO |
35832 | RET(16) |
35833 | } |
35834 | |
35835 | // ADDDa |
35836 | OPCODE(0xD139) |
35837 | { |
35838 | u32 adr, res; |
35839 | u32 src, dst; |
35840 | |
35841 | src = DREGu8((Opcode >> 9) & 7); |
35842 | FETCH_LONG(adr); |
35843 | PRE_IO |
35844 | READ_BYTE_F(adr, dst) |
35845 | res = dst + src; |
35846 | flag_N = flag_X = flag_C = res; |
35847 | flag_V = (src ^ res) & (dst ^ res); |
35848 | flag_NotZ = res & 0xFF; |
35849 | WRITE_BYTE_F(adr, res) |
35850 | POST_IO |
35851 | RET(20) |
35852 | } |
35853 | |
35854 | // ADDDa |
35855 | OPCODE(0xD11F) |
35856 | { |
35857 | u32 adr, res; |
35858 | u32 src, dst; |
35859 | |
35860 | src = DREGu8((Opcode >> 9) & 7); |
35861 | adr = AREG(7); |
35862 | AREG(7) += 2; |
35863 | PRE_IO |
35864 | READ_BYTE_F(adr, dst) |
35865 | res = dst + src; |
35866 | flag_N = flag_X = flag_C = res; |
35867 | flag_V = (src ^ res) & (dst ^ res); |
35868 | flag_NotZ = res & 0xFF; |
35869 | WRITE_BYTE_F(adr, res) |
35870 | POST_IO |
35871 | RET(12) |
35872 | } |
35873 | |
35874 | // ADDDa |
35875 | OPCODE(0xD127) |
35876 | { |
35877 | u32 adr, res; |
35878 | u32 src, dst; |
35879 | |
35880 | src = DREGu8((Opcode >> 9) & 7); |
35881 | adr = AREG(7) - 2; |
35882 | AREG(7) = adr; |
35883 | PRE_IO |
35884 | READ_BYTE_F(adr, dst) |
35885 | res = dst + src; |
35886 | flag_N = flag_X = flag_C = res; |
35887 | flag_V = (src ^ res) & (dst ^ res); |
35888 | flag_NotZ = res & 0xFF; |
35889 | WRITE_BYTE_F(adr, res) |
35890 | POST_IO |
35891 | RET(14) |
35892 | } |
35893 | |
35894 | // ADDDa |
35895 | OPCODE(0xD150) |
35896 | { |
35897 | u32 adr, res; |
35898 | u32 src, dst; |
35899 | |
35900 | src = DREGu16((Opcode >> 9) & 7); |
35901 | adr = AREG((Opcode >> 0) & 7); |
35902 | PRE_IO |
35903 | READ_WORD_F(adr, dst) |
35904 | res = dst + src; |
35905 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35906 | flag_N = flag_X = flag_C = res >> 8; |
35907 | flag_NotZ = res & 0xFFFF; |
35908 | WRITE_WORD_F(adr, res) |
35909 | POST_IO |
35910 | RET(12) |
35911 | } |
35912 | |
35913 | // ADDDa |
35914 | OPCODE(0xD158) |
35915 | { |
35916 | u32 adr, res; |
35917 | u32 src, dst; |
35918 | |
35919 | src = DREGu16((Opcode >> 9) & 7); |
35920 | adr = AREG((Opcode >> 0) & 7); |
35921 | AREG((Opcode >> 0) & 7) += 2; |
35922 | PRE_IO |
35923 | READ_WORD_F(adr, dst) |
35924 | res = dst + src; |
35925 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35926 | flag_N = flag_X = flag_C = res >> 8; |
35927 | flag_NotZ = res & 0xFFFF; |
35928 | WRITE_WORD_F(adr, res) |
35929 | POST_IO |
35930 | RET(12) |
35931 | } |
35932 | |
35933 | // ADDDa |
35934 | OPCODE(0xD160) |
35935 | { |
35936 | u32 adr, res; |
35937 | u32 src, dst; |
35938 | |
35939 | src = DREGu16((Opcode >> 9) & 7); |
35940 | adr = AREG((Opcode >> 0) & 7) - 2; |
35941 | AREG((Opcode >> 0) & 7) = adr; |
35942 | PRE_IO |
35943 | READ_WORD_F(adr, dst) |
35944 | res = dst + src; |
35945 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35946 | flag_N = flag_X = flag_C = res >> 8; |
35947 | flag_NotZ = res & 0xFFFF; |
35948 | WRITE_WORD_F(adr, res) |
35949 | POST_IO |
35950 | RET(14) |
35951 | } |
35952 | |
35953 | // ADDDa |
35954 | OPCODE(0xD168) |
35955 | { |
35956 | u32 adr, res; |
35957 | u32 src, dst; |
35958 | |
35959 | src = DREGu16((Opcode >> 9) & 7); |
35960 | FETCH_SWORD(adr); |
35961 | adr += AREG((Opcode >> 0) & 7); |
35962 | PRE_IO |
35963 | READ_WORD_F(adr, dst) |
35964 | res = dst + src; |
35965 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35966 | flag_N = flag_X = flag_C = res >> 8; |
35967 | flag_NotZ = res & 0xFFFF; |
35968 | WRITE_WORD_F(adr, res) |
35969 | POST_IO |
35970 | RET(16) |
35971 | } |
35972 | |
35973 | // ADDDa |
35974 | OPCODE(0xD170) |
35975 | { |
35976 | u32 adr, res; |
35977 | u32 src, dst; |
35978 | |
35979 | src = DREGu16((Opcode >> 9) & 7); |
35980 | adr = AREG((Opcode >> 0) & 7); |
35981 | DECODE_EXT_WORD |
35982 | PRE_IO |
35983 | READ_WORD_F(adr, dst) |
35984 | res = dst + src; |
35985 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35986 | flag_N = flag_X = flag_C = res >> 8; |
35987 | flag_NotZ = res & 0xFFFF; |
35988 | WRITE_WORD_F(adr, res) |
35989 | POST_IO |
35990 | RET(18) |
35991 | } |
35992 | |
35993 | // ADDDa |
35994 | OPCODE(0xD178) |
35995 | { |
35996 | u32 adr, res; |
35997 | u32 src, dst; |
35998 | |
35999 | src = DREGu16((Opcode >> 9) & 7); |
36000 | FETCH_SWORD(adr); |
36001 | PRE_IO |
36002 | READ_WORD_F(adr, dst) |
36003 | res = dst + src; |
36004 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36005 | flag_N = flag_X = flag_C = res >> 8; |
36006 | flag_NotZ = res & 0xFFFF; |
36007 | WRITE_WORD_F(adr, res) |
36008 | POST_IO |
36009 | RET(16) |
36010 | } |
36011 | |
36012 | // ADDDa |
36013 | OPCODE(0xD179) |
36014 | { |
36015 | u32 adr, res; |
36016 | u32 src, dst; |
36017 | |
36018 | src = DREGu16((Opcode >> 9) & 7); |
36019 | FETCH_LONG(adr); |
36020 | PRE_IO |
36021 | READ_WORD_F(adr, dst) |
36022 | res = dst + src; |
36023 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36024 | flag_N = flag_X = flag_C = res >> 8; |
36025 | flag_NotZ = res & 0xFFFF; |
36026 | WRITE_WORD_F(adr, res) |
36027 | POST_IO |
36028 | RET(20) |
36029 | } |
36030 | |
36031 | // ADDDa |
36032 | OPCODE(0xD15F) |
36033 | { |
36034 | u32 adr, res; |
36035 | u32 src, dst; |
36036 | |
36037 | src = DREGu16((Opcode >> 9) & 7); |
36038 | adr = AREG(7); |
36039 | AREG(7) += 2; |
36040 | PRE_IO |
36041 | READ_WORD_F(adr, dst) |
36042 | res = dst + src; |
36043 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36044 | flag_N = flag_X = flag_C = res >> 8; |
36045 | flag_NotZ = res & 0xFFFF; |
36046 | WRITE_WORD_F(adr, res) |
36047 | POST_IO |
36048 | RET(12) |
36049 | } |
36050 | |
36051 | // ADDDa |
36052 | OPCODE(0xD167) |
36053 | { |
36054 | u32 adr, res; |
36055 | u32 src, dst; |
36056 | |
36057 | src = DREGu16((Opcode >> 9) & 7); |
36058 | adr = AREG(7) - 2; |
36059 | AREG(7) = adr; |
36060 | PRE_IO |
36061 | READ_WORD_F(adr, dst) |
36062 | res = dst + src; |
36063 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36064 | flag_N = flag_X = flag_C = res >> 8; |
36065 | flag_NotZ = res & 0xFFFF; |
36066 | WRITE_WORD_F(adr, res) |
36067 | POST_IO |
36068 | RET(14) |
36069 | } |
36070 | |
36071 | // ADDDa |
36072 | OPCODE(0xD190) |
36073 | { |
36074 | u32 adr, res; |
36075 | u32 src, dst; |
36076 | |
36077 | src = DREGu32((Opcode >> 9) & 7); |
36078 | adr = AREG((Opcode >> 0) & 7); |
36079 | PRE_IO |
36080 | READ_LONG_F(adr, dst) |
36081 | res = dst + src; |
36082 | flag_NotZ = res; |
36083 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36084 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36085 | flag_N = res >> 24; |
36086 | WRITE_LONG_F(adr, res) |
36087 | POST_IO |
36088 | RET(20) |
36089 | } |
36090 | |
36091 | // ADDDa |
36092 | OPCODE(0xD198) |
36093 | { |
36094 | u32 adr, res; |
36095 | u32 src, dst; |
36096 | |
36097 | src = DREGu32((Opcode >> 9) & 7); |
36098 | adr = AREG((Opcode >> 0) & 7); |
36099 | AREG((Opcode >> 0) & 7) += 4; |
36100 | PRE_IO |
36101 | READ_LONG_F(adr, dst) |
36102 | res = dst + src; |
36103 | flag_NotZ = res; |
36104 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36105 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36106 | flag_N = res >> 24; |
36107 | WRITE_LONG_F(adr, res) |
36108 | POST_IO |
36109 | RET(20) |
36110 | } |
36111 | |
36112 | // ADDDa |
36113 | OPCODE(0xD1A0) |
36114 | { |
36115 | u32 adr, res; |
36116 | u32 src, dst; |
36117 | |
36118 | src = DREGu32((Opcode >> 9) & 7); |
36119 | adr = AREG((Opcode >> 0) & 7) - 4; |
36120 | AREG((Opcode >> 0) & 7) = adr; |
36121 | PRE_IO |
36122 | READ_LONG_F(adr, dst) |
36123 | res = dst + src; |
36124 | flag_NotZ = res; |
36125 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36126 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36127 | flag_N = res >> 24; |
36128 | WRITE_LONG_F(adr, res) |
36129 | POST_IO |
36130 | RET(22) |
36131 | } |
36132 | |
36133 | // ADDDa |
36134 | OPCODE(0xD1A8) |
36135 | { |
36136 | u32 adr, res; |
36137 | u32 src, dst; |
36138 | |
36139 | src = DREGu32((Opcode >> 9) & 7); |
36140 | FETCH_SWORD(adr); |
36141 | adr += AREG((Opcode >> 0) & 7); |
36142 | PRE_IO |
36143 | READ_LONG_F(adr, dst) |
36144 | res = dst + src; |
36145 | flag_NotZ = res; |
36146 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36147 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36148 | flag_N = res >> 24; |
36149 | WRITE_LONG_F(adr, res) |
36150 | POST_IO |
36151 | RET(24) |
36152 | } |
36153 | |
36154 | // ADDDa |
36155 | OPCODE(0xD1B0) |
36156 | { |
36157 | u32 adr, res; |
36158 | u32 src, dst; |
36159 | |
36160 | src = DREGu32((Opcode >> 9) & 7); |
36161 | adr = AREG((Opcode >> 0) & 7); |
36162 | DECODE_EXT_WORD |
36163 | PRE_IO |
36164 | READ_LONG_F(adr, dst) |
36165 | res = dst + src; |
36166 | flag_NotZ = res; |
36167 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36168 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36169 | flag_N = res >> 24; |
36170 | WRITE_LONG_F(adr, res) |
36171 | POST_IO |
36172 | RET(26) |
36173 | } |
36174 | |
36175 | // ADDDa |
36176 | OPCODE(0xD1B8) |
36177 | { |
36178 | u32 adr, res; |
36179 | u32 src, dst; |
36180 | |
36181 | src = DREGu32((Opcode >> 9) & 7); |
36182 | FETCH_SWORD(adr); |
36183 | PRE_IO |
36184 | READ_LONG_F(adr, dst) |
36185 | res = dst + src; |
36186 | flag_NotZ = res; |
36187 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36188 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36189 | flag_N = res >> 24; |
36190 | WRITE_LONG_F(adr, res) |
36191 | POST_IO |
36192 | RET(24) |
36193 | } |
36194 | |
36195 | // ADDDa |
36196 | OPCODE(0xD1B9) |
36197 | { |
36198 | u32 adr, res; |
36199 | u32 src, dst; |
36200 | |
36201 | src = DREGu32((Opcode >> 9) & 7); |
36202 | FETCH_LONG(adr); |
36203 | PRE_IO |
36204 | READ_LONG_F(adr, dst) |
36205 | res = dst + src; |
36206 | flag_NotZ = res; |
36207 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36208 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36209 | flag_N = res >> 24; |
36210 | WRITE_LONG_F(adr, res) |
36211 | POST_IO |
36212 | RET(28) |
36213 | } |
36214 | |
36215 | // ADDDa |
36216 | OPCODE(0xD19F) |
36217 | { |
36218 | u32 adr, res; |
36219 | u32 src, dst; |
36220 | |
36221 | src = DREGu32((Opcode >> 9) & 7); |
36222 | adr = AREG(7); |
36223 | AREG(7) += 4; |
36224 | PRE_IO |
36225 | READ_LONG_F(adr, dst) |
36226 | res = dst + src; |
36227 | flag_NotZ = res; |
36228 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36229 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36230 | flag_N = res >> 24; |
36231 | WRITE_LONG_F(adr, res) |
36232 | POST_IO |
36233 | RET(20) |
36234 | } |
36235 | |
36236 | // ADDDa |
36237 | OPCODE(0xD1A7) |
36238 | { |
36239 | u32 adr, res; |
36240 | u32 src, dst; |
36241 | |
36242 | src = DREGu32((Opcode >> 9) & 7); |
36243 | adr = AREG(7) - 4; |
36244 | AREG(7) = adr; |
36245 | PRE_IO |
36246 | READ_LONG_F(adr, dst) |
36247 | res = dst + src; |
36248 | flag_NotZ = res; |
36249 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36250 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36251 | flag_N = res >> 24; |
36252 | WRITE_LONG_F(adr, res) |
36253 | POST_IO |
36254 | RET(22) |
36255 | } |
36256 | |
36257 | // ADDX |
36258 | OPCODE(0xD100) |
36259 | { |
36260 | u32 adr, res; |
36261 | u32 src, dst; |
36262 | |
36263 | src = DREGu8((Opcode >> 0) & 7); |
36264 | dst = DREGu8((Opcode >> 9) & 7); |
36265 | res = dst + src + ((flag_X >> 8) & 1); |
36266 | flag_N = flag_X = flag_C = res; |
36267 | flag_V = (src ^ res) & (dst ^ res); |
36268 | flag_NotZ |= res & 0xFF; |
36269 | DREGu8((Opcode >> 9) & 7) = res; |
36270 | RET(4) |
36271 | } |
36272 | |
36273 | // ADDX |
36274 | OPCODE(0xD140) |
36275 | { |
36276 | u32 adr, res; |
36277 | u32 src, dst; |
36278 | |
36279 | src = DREGu16((Opcode >> 0) & 7); |
36280 | dst = DREGu16((Opcode >> 9) & 7); |
36281 | res = dst + src + ((flag_X >> 8) & 1); |
36282 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36283 | flag_N = flag_X = flag_C = res >> 8; |
36284 | flag_NotZ |= res & 0xFFFF; |
36285 | DREGu16((Opcode >> 9) & 7) = res; |
36286 | RET(4) |
36287 | } |
36288 | |
36289 | // ADDX |
36290 | OPCODE(0xD180) |
36291 | { |
36292 | u32 adr, res; |
36293 | u32 src, dst; |
36294 | |
36295 | src = DREGu32((Opcode >> 0) & 7); |
36296 | dst = DREGu32((Opcode >> 9) & 7); |
36297 | res = dst + src + ((flag_X >> 8) & 1); |
36298 | flag_NotZ |= res; |
36299 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36300 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36301 | flag_N = res >> 24; |
36302 | DREGu32((Opcode >> 9) & 7) = res; |
36303 | RET(8) |
36304 | } |
36305 | |
36306 | // ADDXM |
36307 | OPCODE(0xD108) |
36308 | { |
36309 | u32 adr, res; |
36310 | u32 src, dst; |
36311 | |
36312 | adr = AREG((Opcode >> 0) & 7) - 1; |
36313 | AREG((Opcode >> 0) & 7) = adr; |
36314 | PRE_IO |
36315 | READ_BYTE_F(adr, src) |
36316 | adr = AREG((Opcode >> 9) & 7) - 1; |
36317 | AREG((Opcode >> 9) & 7) = adr; |
36318 | READ_BYTE_F(adr, dst) |
36319 | res = dst + src + ((flag_X >> 8) & 1); |
36320 | flag_N = flag_X = flag_C = res; |
36321 | flag_V = (src ^ res) & (dst ^ res); |
36322 | flag_NotZ |= res & 0xFF; |
36323 | WRITE_BYTE_F(adr, res) |
36324 | POST_IO |
36325 | RET(18) |
36326 | } |
36327 | |
36328 | // ADDXM |
36329 | OPCODE(0xD148) |
36330 | { |
36331 | u32 adr, res; |
36332 | u32 src, dst; |
36333 | |
36334 | adr = AREG((Opcode >> 0) & 7) - 2; |
36335 | AREG((Opcode >> 0) & 7) = adr; |
36336 | PRE_IO |
36337 | READ_WORD_F(adr, src) |
36338 | adr = AREG((Opcode >> 9) & 7) - 2; |
36339 | AREG((Opcode >> 9) & 7) = adr; |
36340 | READ_WORD_F(adr, dst) |
36341 | res = dst + src + ((flag_X >> 8) & 1); |
36342 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36343 | flag_N = flag_X = flag_C = res >> 8; |
36344 | flag_NotZ |= res & 0xFFFF; |
36345 | WRITE_WORD_F(adr, res) |
36346 | POST_IO |
36347 | RET(18) |
36348 | } |
36349 | |
36350 | // ADDXM |
36351 | OPCODE(0xD188) |
36352 | { |
36353 | u32 adr, res; |
36354 | u32 src, dst; |
36355 | |
36356 | adr = AREG((Opcode >> 0) & 7) - 4; |
36357 | AREG((Opcode >> 0) & 7) = adr; |
36358 | PRE_IO |
36359 | READ_LONG_F(adr, src) |
36360 | adr = AREG((Opcode >> 9) & 7) - 4; |
36361 | AREG((Opcode >> 9) & 7) = adr; |
36362 | READ_LONG_F(adr, dst) |
36363 | res = dst + src + ((flag_X >> 8) & 1); |
36364 | flag_NotZ |= res; |
36365 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36366 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36367 | flag_N = res >> 24; |
36368 | WRITE_LONG_F(adr, res) |
36369 | POST_IO |
36370 | RET(30) |
36371 | } |
36372 | |
36373 | // ADDX7M |
36374 | OPCODE(0xD10F) |
36375 | { |
36376 | u32 adr, res; |
36377 | u32 src, dst; |
36378 | |
36379 | adr = AREG(7) - 2; |
36380 | AREG(7) = adr; |
36381 | PRE_IO |
36382 | READ_BYTE_F(adr, src) |
36383 | adr = AREG((Opcode >> 9) & 7) - 1; |
36384 | AREG((Opcode >> 9) & 7) = adr; |
36385 | READ_BYTE_F(adr, dst) |
36386 | res = dst + src + ((flag_X >> 8) & 1); |
36387 | flag_N = flag_X = flag_C = res; |
36388 | flag_V = (src ^ res) & (dst ^ res); |
36389 | flag_NotZ |= res & 0xFF; |
36390 | WRITE_BYTE_F(adr, res) |
36391 | POST_IO |
36392 | RET(18) |
36393 | } |
36394 | |
36395 | // ADDX7M |
36396 | OPCODE(0xD14F) |
36397 | { |
36398 | u32 adr, res; |
36399 | u32 src, dst; |
36400 | |
36401 | adr = AREG(7) - 2; |
36402 | AREG(7) = adr; |
36403 | PRE_IO |
36404 | READ_WORD_F(adr, src) |
36405 | adr = AREG((Opcode >> 9) & 7) - 2; |
36406 | AREG((Opcode >> 9) & 7) = adr; |
36407 | READ_WORD_F(adr, dst) |
36408 | res = dst + src + ((flag_X >> 8) & 1); |
36409 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36410 | flag_N = flag_X = flag_C = res >> 8; |
36411 | flag_NotZ |= res & 0xFFFF; |
36412 | WRITE_WORD_F(adr, res) |
36413 | POST_IO |
36414 | RET(18) |
36415 | } |
36416 | |
36417 | // ADDX7M |
36418 | OPCODE(0xD18F) |
36419 | { |
36420 | u32 adr, res; |
36421 | u32 src, dst; |
36422 | |
36423 | adr = AREG(7) - 4; |
36424 | AREG(7) = adr; |
36425 | PRE_IO |
36426 | READ_LONG_F(adr, src) |
36427 | adr = AREG((Opcode >> 9) & 7) - 4; |
36428 | AREG((Opcode >> 9) & 7) = adr; |
36429 | READ_LONG_F(adr, dst) |
36430 | res = dst + src + ((flag_X >> 8) & 1); |
36431 | flag_NotZ |= res; |
36432 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36433 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36434 | flag_N = res >> 24; |
36435 | WRITE_LONG_F(adr, res) |
36436 | POST_IO |
36437 | RET(30) |
36438 | } |
36439 | |
36440 | // ADDXM7 |
36441 | OPCODE(0xDF08) |
36442 | { |
36443 | u32 adr, res; |
36444 | u32 src, dst; |
36445 | |
36446 | adr = AREG((Opcode >> 0) & 7) - 1; |
36447 | AREG((Opcode >> 0) & 7) = adr; |
36448 | PRE_IO |
36449 | READ_BYTE_F(adr, src) |
36450 | adr = AREG(7) - 2; |
36451 | AREG(7) = adr; |
36452 | READ_BYTE_F(adr, dst) |
36453 | res = dst + src + ((flag_X >> 8) & 1); |
36454 | flag_N = flag_X = flag_C = res; |
36455 | flag_V = (src ^ res) & (dst ^ res); |
36456 | flag_NotZ |= res & 0xFF; |
36457 | WRITE_BYTE_F(adr, res) |
36458 | POST_IO |
36459 | RET(18) |
36460 | } |
36461 | |
36462 | // ADDXM7 |
36463 | OPCODE(0xDF48) |
36464 | { |
36465 | u32 adr, res; |
36466 | u32 src, dst; |
36467 | |
36468 | adr = AREG((Opcode >> 0) & 7) - 2; |
36469 | AREG((Opcode >> 0) & 7) = adr; |
36470 | PRE_IO |
36471 | READ_WORD_F(adr, src) |
36472 | adr = AREG(7) - 2; |
36473 | AREG(7) = adr; |
36474 | READ_WORD_F(adr, dst) |
36475 | res = dst + src + ((flag_X >> 8) & 1); |
36476 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36477 | flag_N = flag_X = flag_C = res >> 8; |
36478 | flag_NotZ |= res & 0xFFFF; |
36479 | WRITE_WORD_F(adr, res) |
36480 | POST_IO |
36481 | RET(18) |
36482 | } |
36483 | |
36484 | // ADDXM7 |
36485 | OPCODE(0xDF88) |
36486 | { |
36487 | u32 adr, res; |
36488 | u32 src, dst; |
36489 | |
36490 | adr = AREG((Opcode >> 0) & 7) - 4; |
36491 | AREG((Opcode >> 0) & 7) = adr; |
36492 | PRE_IO |
36493 | READ_LONG_F(adr, src) |
36494 | adr = AREG(7) - 4; |
36495 | AREG(7) = adr; |
36496 | READ_LONG_F(adr, dst) |
36497 | res = dst + src + ((flag_X >> 8) & 1); |
36498 | flag_NotZ |= res; |
36499 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36500 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36501 | flag_N = res >> 24; |
36502 | WRITE_LONG_F(adr, res) |
36503 | POST_IO |
36504 | RET(30) |
36505 | } |
36506 | |
36507 | // ADDX7M7 |
36508 | OPCODE(0xDF0F) |
36509 | { |
36510 | u32 adr, res; |
36511 | u32 src, dst; |
36512 | |
36513 | adr = AREG(7) - 2; |
36514 | AREG(7) = adr; |
36515 | PRE_IO |
36516 | READ_BYTE_F(adr, src) |
36517 | adr = AREG(7) - 2; |
36518 | AREG(7) = adr; |
36519 | READ_BYTE_F(adr, dst) |
36520 | res = dst + src + ((flag_X >> 8) & 1); |
36521 | flag_N = flag_X = flag_C = res; |
36522 | flag_V = (src ^ res) & (dst ^ res); |
36523 | flag_NotZ |= res & 0xFF; |
36524 | WRITE_BYTE_F(adr, res) |
36525 | POST_IO |
36526 | RET(18) |
36527 | } |
36528 | |
36529 | // ADDX7M7 |
36530 | OPCODE(0xDF4F) |
36531 | { |
36532 | u32 adr, res; |
36533 | u32 src, dst; |
36534 | |
36535 | adr = AREG(7) - 2; |
36536 | AREG(7) = adr; |
36537 | PRE_IO |
36538 | READ_WORD_F(adr, src) |
36539 | adr = AREG(7) - 2; |
36540 | AREG(7) = adr; |
36541 | READ_WORD_F(adr, dst) |
36542 | res = dst + src + ((flag_X >> 8) & 1); |
36543 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36544 | flag_N = flag_X = flag_C = res >> 8; |
36545 | flag_NotZ |= res & 0xFFFF; |
36546 | WRITE_WORD_F(adr, res) |
36547 | POST_IO |
36548 | RET(18) |
36549 | } |
36550 | |
36551 | // ADDX7M7 |
36552 | OPCODE(0xDF8F) |
36553 | { |
36554 | u32 adr, res; |
36555 | u32 src, dst; |
36556 | |
36557 | adr = AREG(7) - 4; |
36558 | AREG(7) = adr; |
36559 | PRE_IO |
36560 | READ_LONG_F(adr, src) |
36561 | adr = AREG(7) - 4; |
36562 | AREG(7) = adr; |
36563 | READ_LONG_F(adr, dst) |
36564 | res = dst + src + ((flag_X >> 8) & 1); |
36565 | flag_NotZ |= res; |
36566 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36567 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36568 | flag_N = res >> 24; |
36569 | WRITE_LONG_F(adr, res) |
36570 | POST_IO |
36571 | RET(30) |
36572 | } |
36573 | |
36574 | // ADDA |
36575 | OPCODE(0xD0C0) |
36576 | { |
36577 | u32 adr, res; |
36578 | u32 src, dst; |
36579 | |
36580 | src = (s32)DREGs16((Opcode >> 0) & 7); |
36581 | dst = AREGu32((Opcode >> 9) & 7); |
36582 | res = dst + src; |
36583 | AREG((Opcode >> 9) & 7) = res; |
36584 | RET(8) |
36585 | } |
36586 | |
36587 | // ADDA |
36588 | OPCODE(0xD0C8) |
36589 | { |
36590 | u32 adr, res; |
36591 | u32 src, dst; |
36592 | |
36593 | src = (s32)AREGs16((Opcode >> 0) & 7); |
36594 | dst = AREGu32((Opcode >> 9) & 7); |
36595 | res = dst + src; |
36596 | AREG((Opcode >> 9) & 7) = res; |
36597 | RET(8) |
36598 | } |
36599 | |
36600 | // ADDA |
36601 | OPCODE(0xD0D0) |
36602 | { |
36603 | u32 adr, res; |
36604 | u32 src, dst; |
36605 | |
36606 | adr = AREG((Opcode >> 0) & 7); |
36607 | PRE_IO |
36608 | READSX_WORD_F(adr, src) |
36609 | dst = AREGu32((Opcode >> 9) & 7); |
36610 | res = dst + src; |
36611 | AREG((Opcode >> 9) & 7) = res; |
36612 | POST_IO |
03e4f2a3 |
36613 | #ifdef USE_CYCLONE_TIMING |
36614 | RET(12) |
36615 | #else |
70357ce5 |
36616 | RET(10) |
03e4f2a3 |
36617 | #endif |
70357ce5 |
36618 | } |
36619 | |
36620 | // ADDA |
36621 | OPCODE(0xD0D8) |
36622 | { |
36623 | u32 adr, res; |
36624 | u32 src, dst; |
36625 | |
36626 | adr = AREG((Opcode >> 0) & 7); |
36627 | AREG((Opcode >> 0) & 7) += 2; |
36628 | PRE_IO |
36629 | READSX_WORD_F(adr, src) |
36630 | dst = AREGu32((Opcode >> 9) & 7); |
36631 | res = dst + src; |
36632 | AREG((Opcode >> 9) & 7) = res; |
36633 | POST_IO |
03e4f2a3 |
36634 | #ifdef USE_CYCLONE_TIMING |
36635 | RET(12) |
36636 | #else |
70357ce5 |
36637 | RET(10) |
03e4f2a3 |
36638 | #endif |
70357ce5 |
36639 | } |
36640 | |
36641 | // ADDA |
36642 | OPCODE(0xD0E0) |
36643 | { |
36644 | u32 adr, res; |
36645 | u32 src, dst; |
36646 | |
36647 | adr = AREG((Opcode >> 0) & 7) - 2; |
36648 | AREG((Opcode >> 0) & 7) = adr; |
36649 | PRE_IO |
36650 | READSX_WORD_F(adr, src) |
36651 | dst = AREGu32((Opcode >> 9) & 7); |
36652 | res = dst + src; |
36653 | AREG((Opcode >> 9) & 7) = res; |
36654 | POST_IO |
03e4f2a3 |
36655 | #ifdef USE_CYCLONE_TIMING |
36656 | RET(14) |
36657 | #else |
70357ce5 |
36658 | RET(12) |
03e4f2a3 |
36659 | #endif |
70357ce5 |
36660 | } |
36661 | |
36662 | // ADDA |
36663 | OPCODE(0xD0E8) |
36664 | { |
36665 | u32 adr, res; |
36666 | u32 src, dst; |
36667 | |
36668 | FETCH_SWORD(adr); |
36669 | adr += AREG((Opcode >> 0) & 7); |
36670 | PRE_IO |
36671 | READSX_WORD_F(adr, src) |
36672 | dst = AREGu32((Opcode >> 9) & 7); |
36673 | res = dst + src; |
36674 | AREG((Opcode >> 9) & 7) = res; |
36675 | POST_IO |
03e4f2a3 |
36676 | #ifdef USE_CYCLONE_TIMING |
36677 | RET(16) |
36678 | #else |
70357ce5 |
36679 | RET(14) |
03e4f2a3 |
36680 | #endif |
70357ce5 |
36681 | } |
36682 | |
36683 | // ADDA |
36684 | OPCODE(0xD0F0) |
36685 | { |
36686 | u32 adr, res; |
36687 | u32 src, dst; |
36688 | |
36689 | adr = AREG((Opcode >> 0) & 7); |
36690 | DECODE_EXT_WORD |
36691 | PRE_IO |
36692 | READSX_WORD_F(adr, src) |
36693 | dst = AREGu32((Opcode >> 9) & 7); |
36694 | res = dst + src; |
36695 | AREG((Opcode >> 9) & 7) = res; |
36696 | POST_IO |
03e4f2a3 |
36697 | #ifdef USE_CYCLONE_TIMING |
36698 | RET(18) |
36699 | #else |
70357ce5 |
36700 | RET(16) |
03e4f2a3 |
36701 | #endif |
70357ce5 |
36702 | } |
36703 | |
36704 | // ADDA |
36705 | OPCODE(0xD0F8) |
36706 | { |
36707 | u32 adr, res; |
36708 | u32 src, dst; |
36709 | |
36710 | FETCH_SWORD(adr); |
36711 | PRE_IO |
36712 | READSX_WORD_F(adr, src) |
36713 | dst = AREGu32((Opcode >> 9) & 7); |
36714 | res = dst + src; |
36715 | AREG((Opcode >> 9) & 7) = res; |
36716 | POST_IO |
03e4f2a3 |
36717 | #ifdef USE_CYCLONE_TIMING |
36718 | RET(16) |
36719 | #else |
70357ce5 |
36720 | RET(14) |
03e4f2a3 |
36721 | #endif |
70357ce5 |
36722 | } |
36723 | |
36724 | // ADDA |
36725 | OPCODE(0xD0F9) |
36726 | { |
36727 | u32 adr, res; |
36728 | u32 src, dst; |
36729 | |
36730 | FETCH_LONG(adr); |
36731 | PRE_IO |
36732 | READSX_WORD_F(adr, src) |
36733 | dst = AREGu32((Opcode >> 9) & 7); |
36734 | res = dst + src; |
36735 | AREG((Opcode >> 9) & 7) = res; |
36736 | POST_IO |
03e4f2a3 |
36737 | #ifdef USE_CYCLONE_TIMING |
36738 | RET(20) |
36739 | #else |
70357ce5 |
36740 | RET(18) |
03e4f2a3 |
36741 | #endif |
70357ce5 |
36742 | } |
36743 | |
36744 | // ADDA |
36745 | OPCODE(0xD0FA) |
36746 | { |
36747 | u32 adr, res; |
36748 | u32 src, dst; |
36749 | |
be26eb23 |
36750 | adr = GET_SWORD + GET_PC; |
70357ce5 |
36751 | PC++; |
36752 | PRE_IO |
36753 | READSX_WORD_F(adr, src) |
36754 | dst = AREGu32((Opcode >> 9) & 7); |
36755 | res = dst + src; |
36756 | AREG((Opcode >> 9) & 7) = res; |
36757 | POST_IO |
03e4f2a3 |
36758 | #ifdef USE_CYCLONE_TIMING |
36759 | RET(16) |
36760 | #else |
70357ce5 |
36761 | RET(14) |
03e4f2a3 |
36762 | #endif |
70357ce5 |
36763 | } |
36764 | |
36765 | // ADDA |
36766 | OPCODE(0xD0FB) |
36767 | { |
36768 | u32 adr, res; |
36769 | u32 src, dst; |
36770 | |
be26eb23 |
36771 | adr = GET_PC; |
70357ce5 |
36772 | DECODE_EXT_WORD |
36773 | PRE_IO |
36774 | READSX_WORD_F(adr, src) |
36775 | dst = AREGu32((Opcode >> 9) & 7); |
36776 | res = dst + src; |
36777 | AREG((Opcode >> 9) & 7) = res; |
36778 | POST_IO |
03e4f2a3 |
36779 | #ifdef USE_CYCLONE_TIMING |
36780 | RET(18) |
36781 | #else |
70357ce5 |
36782 | RET(16) |
03e4f2a3 |
36783 | #endif |
70357ce5 |
36784 | } |
36785 | |
36786 | // ADDA |
36787 | OPCODE(0xD0FC) |
36788 | { |
36789 | u32 adr, res; |
36790 | u32 src, dst; |
36791 | |
36792 | FETCH_SWORD(src); |
36793 | dst = AREGu32((Opcode >> 9) & 7); |
36794 | res = dst + src; |
36795 | AREG((Opcode >> 9) & 7) = res; |
36796 | RET(12) |
36797 | } |
36798 | |
36799 | // ADDA |
36800 | OPCODE(0xD0DF) |
36801 | { |
36802 | u32 adr, res; |
36803 | u32 src, dst; |
36804 | |
36805 | adr = AREG(7); |
36806 | AREG(7) += 2; |
36807 | PRE_IO |
36808 | READSX_WORD_F(adr, src) |
36809 | dst = AREGu32((Opcode >> 9) & 7); |
36810 | res = dst + src; |
36811 | AREG((Opcode >> 9) & 7) = res; |
36812 | POST_IO |
03e4f2a3 |
36813 | #ifdef USE_CYCLONE_TIMING |
36814 | RET(12) |
36815 | #else |
70357ce5 |
36816 | RET(10) |
03e4f2a3 |
36817 | #endif |
70357ce5 |
36818 | } |
36819 | |
36820 | // ADDA |
36821 | OPCODE(0xD0E7) |
36822 | { |
36823 | u32 adr, res; |
36824 | u32 src, dst; |
36825 | |
36826 | adr = AREG(7) - 2; |
36827 | AREG(7) = adr; |
36828 | PRE_IO |
36829 | READSX_WORD_F(adr, src) |
36830 | dst = AREGu32((Opcode >> 9) & 7); |
36831 | res = dst + src; |
36832 | AREG((Opcode >> 9) & 7) = res; |
36833 | POST_IO |
03e4f2a3 |
36834 | #ifdef USE_CYCLONE_TIMING |
36835 | RET(14) |
36836 | #else |
70357ce5 |
36837 | RET(12) |
03e4f2a3 |
36838 | #endif |
70357ce5 |
36839 | } |
36840 | |
36841 | // ADDA |
36842 | OPCODE(0xD1C0) |
36843 | { |
36844 | u32 adr, res; |
36845 | u32 src, dst; |
36846 | |
36847 | src = (s32)DREGs32((Opcode >> 0) & 7); |
36848 | dst = AREGu32((Opcode >> 9) & 7); |
36849 | res = dst + src; |
36850 | AREG((Opcode >> 9) & 7) = res; |
36851 | #ifdef USE_CYCLONE_TIMING |
36852 | RET(8) |
36853 | #else |
36854 | RET(6) |
36855 | #endif |
36856 | } |
36857 | |
36858 | // ADDA |
36859 | OPCODE(0xD1C8) |
36860 | { |
36861 | u32 adr, res; |
36862 | u32 src, dst; |
36863 | |
36864 | src = (s32)AREGs32((Opcode >> 0) & 7); |
36865 | dst = AREGu32((Opcode >> 9) & 7); |
36866 | res = dst + src; |
36867 | AREG((Opcode >> 9) & 7) = res; |
36868 | #ifdef USE_CYCLONE_TIMING |
36869 | RET(8) |
36870 | #else |
36871 | RET(6) |
36872 | #endif |
36873 | } |
36874 | |
36875 | // ADDA |
36876 | OPCODE(0xD1D0) |
36877 | { |
36878 | u32 adr, res; |
36879 | u32 src, dst; |
36880 | |
36881 | adr = AREG((Opcode >> 0) & 7); |
36882 | PRE_IO |
36883 | READSX_LONG_F(adr, src) |
36884 | dst = AREGu32((Opcode >> 9) & 7); |
36885 | res = dst + src; |
36886 | AREG((Opcode >> 9) & 7) = res; |
36887 | POST_IO |
36888 | RET(14) |
36889 | } |
36890 | |
36891 | // ADDA |
36892 | OPCODE(0xD1D8) |
36893 | { |
36894 | u32 adr, res; |
36895 | u32 src, dst; |
36896 | |
36897 | adr = AREG((Opcode >> 0) & 7); |
36898 | AREG((Opcode >> 0) & 7) += 4; |
36899 | PRE_IO |
36900 | READSX_LONG_F(adr, src) |
36901 | dst = AREGu32((Opcode >> 9) & 7); |
36902 | res = dst + src; |
36903 | AREG((Opcode >> 9) & 7) = res; |
36904 | POST_IO |
36905 | RET(14) |
36906 | } |
36907 | |
36908 | // ADDA |
36909 | OPCODE(0xD1E0) |
36910 | { |
36911 | u32 adr, res; |
36912 | u32 src, dst; |
36913 | |
36914 | adr = AREG((Opcode >> 0) & 7) - 4; |
36915 | AREG((Opcode >> 0) & 7) = adr; |
36916 | PRE_IO |
36917 | READSX_LONG_F(adr, src) |
36918 | dst = AREGu32((Opcode >> 9) & 7); |
36919 | res = dst + src; |
36920 | AREG((Opcode >> 9) & 7) = res; |
36921 | POST_IO |
36922 | RET(16) |
36923 | } |
36924 | |
36925 | // ADDA |
36926 | OPCODE(0xD1E8) |
36927 | { |
36928 | u32 adr, res; |
36929 | u32 src, dst; |
36930 | |
36931 | FETCH_SWORD(adr); |
36932 | adr += AREG((Opcode >> 0) & 7); |
36933 | PRE_IO |
36934 | READSX_LONG_F(adr, src) |
36935 | dst = AREGu32((Opcode >> 9) & 7); |
36936 | res = dst + src; |
36937 | AREG((Opcode >> 9) & 7) = res; |
36938 | POST_IO |
36939 | RET(18) |
36940 | } |
36941 | |
36942 | // ADDA |
36943 | OPCODE(0xD1F0) |
36944 | { |
36945 | u32 adr, res; |
36946 | u32 src, dst; |
36947 | |
36948 | adr = AREG((Opcode >> 0) & 7); |
36949 | DECODE_EXT_WORD |
36950 | PRE_IO |
36951 | READSX_LONG_F(adr, src) |
36952 | dst = AREGu32((Opcode >> 9) & 7); |
36953 | res = dst + src; |
36954 | AREG((Opcode >> 9) & 7) = res; |
36955 | POST_IO |
36956 | RET(20) |
36957 | } |
36958 | |
36959 | // ADDA |
36960 | OPCODE(0xD1F8) |
36961 | { |
36962 | u32 adr, res; |
36963 | u32 src, dst; |
36964 | |
36965 | FETCH_SWORD(adr); |
36966 | PRE_IO |
36967 | READSX_LONG_F(adr, src) |
36968 | dst = AREGu32((Opcode >> 9) & 7); |
36969 | res = dst + src; |
36970 | AREG((Opcode >> 9) & 7) = res; |
36971 | POST_IO |
36972 | RET(18) |
36973 | } |
36974 | |
36975 | // ADDA |
36976 | OPCODE(0xD1F9) |
36977 | { |
36978 | u32 adr, res; |
36979 | u32 src, dst; |
36980 | |
36981 | FETCH_LONG(adr); |
36982 | PRE_IO |
36983 | READSX_LONG_F(adr, src) |
36984 | dst = AREGu32((Opcode >> 9) & 7); |
36985 | res = dst + src; |
36986 | AREG((Opcode >> 9) & 7) = res; |
36987 | POST_IO |
36988 | RET(22) |
36989 | } |
36990 | |
36991 | // ADDA |
36992 | OPCODE(0xD1FA) |
36993 | { |
36994 | u32 adr, res; |
36995 | u32 src, dst; |
36996 | |
be26eb23 |
36997 | adr = GET_SWORD + GET_PC; |
70357ce5 |
36998 | PC++; |
36999 | PRE_IO |
37000 | READSX_LONG_F(adr, src) |
37001 | dst = AREGu32((Opcode >> 9) & 7); |
37002 | res = dst + src; |
37003 | AREG((Opcode >> 9) & 7) = res; |
37004 | POST_IO |
37005 | RET(18) |
37006 | } |
37007 | |
37008 | // ADDA |
37009 | OPCODE(0xD1FB) |
37010 | { |
37011 | u32 adr, res; |
37012 | u32 src, dst; |
37013 | |
be26eb23 |
37014 | adr = GET_PC; |
70357ce5 |
37015 | DECODE_EXT_WORD |
37016 | PRE_IO |
37017 | READSX_LONG_F(adr, src) |
37018 | dst = AREGu32((Opcode >> 9) & 7); |
37019 | res = dst + src; |
37020 | AREG((Opcode >> 9) & 7) = res; |
37021 | POST_IO |
37022 | RET(20) |
37023 | } |
37024 | |
37025 | // ADDA |
37026 | OPCODE(0xD1FC) |
37027 | { |
37028 | u32 adr, res; |
37029 | u32 src, dst; |
37030 | |
37031 | FETCH_LONG(src); |
37032 | dst = AREGu32((Opcode >> 9) & 7); |
37033 | res = dst + src; |
37034 | AREG((Opcode >> 9) & 7) = res; |
37035 | #ifdef USE_CYCLONE_TIMING |
37036 | RET(16) |
37037 | #else |
37038 | RET(14) |
37039 | #endif |
37040 | } |
37041 | |
37042 | // ADDA |
37043 | OPCODE(0xD1DF) |
37044 | { |
37045 | u32 adr, res; |
37046 | u32 src, dst; |
37047 | |
37048 | adr = AREG(7); |
37049 | AREG(7) += 4; |
37050 | PRE_IO |
37051 | READSX_LONG_F(adr, src) |
37052 | dst = AREGu32((Opcode >> 9) & 7); |
37053 | res = dst + src; |
37054 | AREG((Opcode >> 9) & 7) = res; |
37055 | POST_IO |
37056 | RET(14) |
37057 | } |
37058 | |
37059 | // ADDA |
37060 | OPCODE(0xD1E7) |
37061 | { |
37062 | u32 adr, res; |
37063 | u32 src, dst; |
37064 | |
37065 | adr = AREG(7) - 4; |
37066 | AREG(7) = adr; |
37067 | PRE_IO |
37068 | READSX_LONG_F(adr, src) |
37069 | dst = AREGu32((Opcode >> 9) & 7); |
37070 | res = dst + src; |
37071 | AREG((Opcode >> 9) & 7) = res; |
37072 | POST_IO |
37073 | RET(16) |
37074 | } |
37075 | |
37076 | // ASRk |
37077 | OPCODE(0xE000) |
37078 | { |
37079 | u32 adr, res; |
37080 | u32 src, dst; |
37081 | |
37082 | u32 sft; |
37083 | |
37084 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37085 | m68kcontext.io_cycle_counter -= sft * 2; |
37086 | src = (s32)DREGs8((Opcode >> 0) & 7); |
37087 | flag_V = 0; |
37088 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37089 | res = ((s32)src) >> sft; |
37090 | flag_N = res >> 0; |
37091 | flag_NotZ = res; |
37092 | DREGu8((Opcode >> 0) & 7) = res; |
37093 | RET(6) |
37094 | } |
37095 | |
37096 | // ASRk |
37097 | OPCODE(0xE040) |
37098 | { |
37099 | u32 adr, res; |
37100 | u32 src, dst; |
37101 | |
37102 | u32 sft; |
37103 | |
37104 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37105 | m68kcontext.io_cycle_counter -= sft * 2; |
37106 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37107 | flag_V = 0; |
37108 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37109 | res = ((s32)src) >> sft; |
37110 | flag_N = res >> 8; |
37111 | flag_NotZ = res; |
37112 | DREGu16((Opcode >> 0) & 7) = res; |
37113 | RET(6) |
37114 | } |
37115 | |
37116 | // ASRk |
37117 | OPCODE(0xE080) |
37118 | { |
37119 | u32 adr, res; |
37120 | u32 src, dst; |
37121 | |
37122 | u32 sft; |
37123 | |
37124 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37125 | m68kcontext.io_cycle_counter -= sft * 2; |
37126 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37127 | flag_V = 0; |
37128 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37129 | res = ((s32)src) >> sft; |
37130 | flag_N = res >> 24; |
37131 | flag_NotZ = res; |
37132 | DREGu32((Opcode >> 0) & 7) = res; |
37133 | RET(8) |
37134 | } |
37135 | |
37136 | // LSRk |
37137 | OPCODE(0xE008) |
37138 | { |
37139 | u32 adr, res; |
37140 | u32 src, dst; |
37141 | |
37142 | u32 sft; |
37143 | |
37144 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37145 | m68kcontext.io_cycle_counter -= sft * 2; |
37146 | src = DREGu8((Opcode >> 0) & 7); |
37147 | flag_N = flag_V = 0; |
37148 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37149 | res = src >> sft; |
37150 | flag_NotZ = res; |
37151 | DREGu8((Opcode >> 0) & 7) = res; |
37152 | RET(6) |
37153 | } |
37154 | |
37155 | // LSRk |
37156 | OPCODE(0xE048) |
37157 | { |
37158 | u32 adr, res; |
37159 | u32 src, dst; |
37160 | |
37161 | u32 sft; |
37162 | |
37163 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37164 | m68kcontext.io_cycle_counter -= sft * 2; |
37165 | src = DREGu16((Opcode >> 0) & 7); |
37166 | flag_N = flag_V = 0; |
37167 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37168 | res = src >> sft; |
37169 | flag_NotZ = res; |
37170 | DREGu16((Opcode >> 0) & 7) = res; |
37171 | RET(6) |
37172 | } |
37173 | |
37174 | // LSRk |
37175 | OPCODE(0xE088) |
37176 | { |
37177 | u32 adr, res; |
37178 | u32 src, dst; |
37179 | |
37180 | u32 sft; |
37181 | |
37182 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37183 | m68kcontext.io_cycle_counter -= sft * 2; |
37184 | src = DREGu32((Opcode >> 0) & 7); |
37185 | flag_N = flag_V = 0; |
37186 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37187 | res = src >> sft; |
37188 | flag_NotZ = res; |
37189 | DREGu32((Opcode >> 0) & 7) = res; |
37190 | RET(8) |
37191 | } |
37192 | |
37193 | // ROXRk |
37194 | OPCODE(0xE010) |
37195 | { |
37196 | u32 adr, res; |
37197 | u32 src, dst; |
37198 | |
37199 | u32 sft; |
37200 | |
37201 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37202 | m68kcontext.io_cycle_counter -= sft * 2; |
37203 | src = DREGu8((Opcode >> 0) & 7); |
37204 | src |= (flag_X & M68K_SR_X) << 0; |
37205 | res = (src >> sft) | (src << (9 - sft)); |
37206 | flag_X = flag_C = res >> 0; |
37207 | flag_V = 0; |
37208 | flag_N = res >> 0; |
37209 | flag_NotZ = res & 0x000000FF; |
37210 | DREGu8((Opcode >> 0) & 7) = res; |
37211 | RET(6) |
37212 | } |
37213 | |
37214 | // ROXRk |
37215 | OPCODE(0xE050) |
37216 | { |
37217 | u32 adr, res; |
37218 | u32 src, dst; |
37219 | |
37220 | u32 sft; |
37221 | |
37222 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37223 | m68kcontext.io_cycle_counter -= sft * 2; |
37224 | src = DREGu16((Opcode >> 0) & 7); |
37225 | src |= (flag_X & M68K_SR_X) << 8; |
37226 | res = (src >> sft) | (src << (17 - sft)); |
37227 | flag_X = flag_C = res >> 8; |
37228 | flag_V = 0; |
37229 | flag_N = res >> 8; |
37230 | flag_NotZ = res & 0x0000FFFF; |
37231 | DREGu16((Opcode >> 0) & 7) = res; |
37232 | RET(6) |
37233 | } |
37234 | |
37235 | // ROXRk |
37236 | OPCODE(0xE090) |
37237 | { |
37238 | u32 adr, res; |
37239 | u32 src, dst; |
37240 | |
37241 | u32 sft; |
37242 | |
37243 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37244 | m68kcontext.io_cycle_counter -= sft * 2; |
37245 | src = DREGu32((Opcode >> 0) & 7); |
37246 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37247 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37248 | else res = (src >> sft) | (src << (33 - sft)) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + sft))); |
37249 | flag_X = flag_C; |
37250 | flag_V = 0; |
37251 | flag_N = res >> 24; |
37252 | flag_NotZ = res; |
37253 | DREGu32((Opcode >> 0) & 7) = res; |
37254 | RET(8) |
37255 | } |
37256 | |
37257 | // RORk |
37258 | OPCODE(0xE018) |
37259 | { |
37260 | u32 adr, res; |
37261 | u32 src, dst; |
37262 | |
37263 | u32 sft; |
37264 | |
37265 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37266 | m68kcontext.io_cycle_counter -= sft * 2; |
37267 | src = DREGu8((Opcode >> 0) & 7); |
37268 | flag_V = 0; |
37269 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37270 | res = (src >> sft) | (src << (8 - sft)); |
37271 | flag_N = res >> 0; |
37272 | flag_NotZ = res & 0x000000FF; |
37273 | DREGu8((Opcode >> 0) & 7) = res; |
37274 | RET(6) |
37275 | } |
37276 | |
37277 | // RORk |
37278 | OPCODE(0xE058) |
37279 | { |
37280 | u32 adr, res; |
37281 | u32 src, dst; |
37282 | |
37283 | u32 sft; |
37284 | |
37285 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37286 | m68kcontext.io_cycle_counter -= sft * 2; |
37287 | src = DREGu16((Opcode >> 0) & 7); |
37288 | flag_V = 0; |
37289 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37290 | res = (src >> sft) | (src << (16 - sft)); |
37291 | flag_N = res >> 8; |
37292 | flag_NotZ = res & 0x0000FFFF; |
37293 | DREGu16((Opcode >> 0) & 7) = res; |
37294 | RET(6) |
37295 | } |
37296 | |
37297 | // RORk |
37298 | OPCODE(0xE098) |
37299 | { |
37300 | u32 adr, res; |
37301 | u32 src, dst; |
37302 | |
37303 | u32 sft; |
37304 | |
37305 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37306 | m68kcontext.io_cycle_counter -= sft * 2; |
37307 | src = DREGu32((Opcode >> 0) & 7); |
37308 | flag_V = 0; |
37309 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37310 | res = (src >> sft) | (src << (32 - sft)); |
37311 | flag_N = res >> 24; |
37312 | flag_NotZ = res; |
37313 | DREGu32((Opcode >> 0) & 7) = res; |
37314 | RET(8) |
37315 | } |
37316 | |
37317 | // ASLk |
37318 | OPCODE(0xE100) |
37319 | { |
37320 | u32 adr, res; |
37321 | u32 src, dst; |
37322 | |
37323 | u32 sft; |
37324 | |
37325 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37326 | m68kcontext.io_cycle_counter -= sft * 2; |
37327 | src = DREGu8((Opcode >> 0) & 7); |
37328 | if (sft < 8) |
37329 | { |
37330 | flag_X = flag_C = src << (0 + sft); |
37331 | res = src << sft; |
37332 | flag_N = res >> 0; |
37333 | flag_NotZ = res & 0x000000FF; |
37334 | DREGu8((Opcode >> 0) & 7) = res; |
37335 | flag_V = 0; |
37336 | if ((sft > 7) && (src)) flag_V = M68K_SR_V; |
37337 | else |
37338 | { |
37339 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
37340 | src &= msk; |
37341 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37342 | } |
37343 | RET(6) |
37344 | } |
37345 | |
37346 | if (src) flag_V = M68K_SR_V; |
37347 | else flag_V = 0; |
37348 | flag_X = flag_C = src << M68K_SR_C_SFT; |
37349 | res = 0; |
37350 | DREGu8((Opcode >> 0) & 7) = res; |
37351 | flag_N = 0; |
37352 | flag_NotZ = 0; |
37353 | RET(6) |
37354 | } |
37355 | |
37356 | // ASLk |
37357 | OPCODE(0xE140) |
37358 | { |
37359 | u32 adr, res; |
37360 | u32 src, dst; |
37361 | |
37362 | u32 sft; |
37363 | |
37364 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37365 | m68kcontext.io_cycle_counter -= sft * 2; |
37366 | src = DREGu16((Opcode >> 0) & 7); |
37367 | flag_X = flag_C = src >> (8 - sft); |
37368 | res = src << sft; |
37369 | flag_N = res >> 8; |
37370 | flag_NotZ = res & 0x0000FFFF; |
37371 | DREGu16((Opcode >> 0) & 7) = res; |
37372 | flag_V = 0; |
37373 | { |
37374 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
37375 | src &= msk; |
37376 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37377 | } |
37378 | RET(6) |
37379 | } |
37380 | |
37381 | // ASLk |
37382 | OPCODE(0xE180) |
37383 | { |
37384 | u32 adr, res; |
37385 | u32 src, dst; |
37386 | |
37387 | u32 sft; |
37388 | |
37389 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37390 | m68kcontext.io_cycle_counter -= sft * 2; |
37391 | src = DREGu32((Opcode >> 0) & 7); |
37392 | flag_X = flag_C = src >> (24 - sft); |
37393 | res = src << sft; |
37394 | flag_N = res >> 24; |
37395 | flag_NotZ = res & 0xFFFFFFFF; |
37396 | DREGu32((Opcode >> 0) & 7) = res; |
37397 | flag_V = 0; |
37398 | { |
37399 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
37400 | src &= msk; |
37401 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37402 | } |
37403 | RET(8) |
37404 | } |
37405 | |
37406 | // LSLk |
37407 | OPCODE(0xE108) |
37408 | { |
37409 | u32 adr, res; |
37410 | u32 src, dst; |
37411 | |
37412 | u32 sft; |
37413 | |
37414 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37415 | m68kcontext.io_cycle_counter -= sft * 2; |
37416 | src = DREGu8((Opcode >> 0) & 7); |
37417 | flag_V = 0; |
37418 | flag_X = flag_C = src << (0 + sft); |
37419 | res = src << sft; |
37420 | flag_N = res >> 0; |
37421 | flag_NotZ = res & 0x000000FF; |
37422 | DREGu8((Opcode >> 0) & 7) = res; |
37423 | RET(6) |
37424 | } |
37425 | |
37426 | // LSLk |
37427 | OPCODE(0xE148) |
37428 | { |
37429 | u32 adr, res; |
37430 | u32 src, dst; |
37431 | |
37432 | u32 sft; |
37433 | |
37434 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37435 | m68kcontext.io_cycle_counter -= sft * 2; |
37436 | src = DREGu16((Opcode >> 0) & 7); |
37437 | flag_V = 0; |
37438 | flag_X = flag_C = src >> (8 - sft); |
37439 | res = src << sft; |
37440 | flag_N = res >> 8; |
37441 | flag_NotZ = res & 0x0000FFFF; |
37442 | DREGu16((Opcode >> 0) & 7) = res; |
37443 | RET(6) |
37444 | } |
37445 | |
37446 | // LSLk |
37447 | OPCODE(0xE188) |
37448 | { |
37449 | u32 adr, res; |
37450 | u32 src, dst; |
37451 | |
37452 | u32 sft; |
37453 | |
37454 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37455 | m68kcontext.io_cycle_counter -= sft * 2; |
37456 | src = DREGu32((Opcode >> 0) & 7); |
37457 | flag_V = 0; |
37458 | flag_X = flag_C = src >> (24 - sft); |
37459 | res = src << sft; |
37460 | flag_N = res >> 24; |
37461 | flag_NotZ = res & 0xFFFFFFFF; |
37462 | DREGu32((Opcode >> 0) & 7) = res; |
37463 | RET(8) |
37464 | } |
37465 | |
37466 | // ROXLk |
37467 | OPCODE(0xE110) |
37468 | { |
37469 | u32 adr, res; |
37470 | u32 src, dst; |
37471 | |
37472 | u32 sft; |
37473 | |
37474 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37475 | m68kcontext.io_cycle_counter -= sft * 2; |
37476 | src = DREGu8((Opcode >> 0) & 7); |
37477 | src |= (flag_X & M68K_SR_X) << 0; |
37478 | res = (src << sft) | (src >> (9 - sft)); |
37479 | flag_X = flag_C = res >> 0; |
37480 | flag_V = 0; |
37481 | flag_N = res >> 0; |
37482 | flag_NotZ = res & 0x000000FF; |
37483 | DREGu8((Opcode >> 0) & 7) = res; |
37484 | RET(6) |
37485 | } |
37486 | |
37487 | // ROXLk |
37488 | OPCODE(0xE150) |
37489 | { |
37490 | u32 adr, res; |
37491 | u32 src, dst; |
37492 | |
37493 | u32 sft; |
37494 | |
37495 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37496 | m68kcontext.io_cycle_counter -= sft * 2; |
37497 | src = DREGu16((Opcode >> 0) & 7); |
37498 | src |= (flag_X & M68K_SR_X) << 8; |
37499 | res = (src << sft) | (src >> (17 - sft)); |
37500 | flag_X = flag_C = res >> 8; |
37501 | flag_V = 0; |
37502 | flag_N = res >> 8; |
37503 | flag_NotZ = res & 0x0000FFFF; |
37504 | DREGu16((Opcode >> 0) & 7) = res; |
37505 | RET(6) |
37506 | } |
37507 | |
37508 | // ROXLk |
37509 | OPCODE(0xE190) |
37510 | { |
37511 | u32 adr, res; |
37512 | u32 src, dst; |
37513 | |
37514 | u32 sft; |
37515 | |
37516 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37517 | m68kcontext.io_cycle_counter -= sft * 2; |
37518 | src = DREGu32((Opcode >> 0) & 7); |
37519 | flag_C = src >> ((32 - M68K_SR_C_SFT) - sft); |
37520 | if (sft == 1) res = (src << 1) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - 1)); |
37521 | else res = (src << sft) | (src >> (33 - sft)) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - sft)); |
37522 | flag_X = flag_C; |
37523 | flag_V = 0; |
37524 | flag_N = res >> 24; |
37525 | flag_NotZ = res; |
37526 | DREGu32((Opcode >> 0) & 7) = res; |
37527 | RET(8) |
37528 | } |
37529 | |
37530 | // ROLk |
37531 | OPCODE(0xE118) |
37532 | { |
37533 | u32 adr, res; |
37534 | u32 src, dst; |
37535 | |
37536 | u32 sft; |
37537 | |
37538 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37539 | m68kcontext.io_cycle_counter -= sft * 2; |
37540 | src = DREGu8((Opcode >> 0) & 7); |
37541 | flag_V = 0; |
37542 | flag_C = src << (0 + sft); |
37543 | res = (src << sft) | (src >> (8 - sft)); |
37544 | flag_N = res >> 0; |
37545 | flag_NotZ = res & 0x000000FF; |
37546 | DREGu8((Opcode >> 0) & 7) = res; |
37547 | RET(6) |
37548 | } |
37549 | |
37550 | // ROLk |
37551 | OPCODE(0xE158) |
37552 | { |
37553 | u32 adr, res; |
37554 | u32 src, dst; |
37555 | |
37556 | u32 sft; |
37557 | |
37558 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37559 | m68kcontext.io_cycle_counter -= sft * 2; |
37560 | src = DREGu16((Opcode >> 0) & 7); |
37561 | flag_V = 0; |
37562 | flag_C = src >> (8 - sft); |
37563 | res = (src << sft) | (src >> (16 - sft)); |
37564 | flag_N = res >> 8; |
37565 | flag_NotZ = res & 0x0000FFFF; |
37566 | DREGu16((Opcode >> 0) & 7) = res; |
37567 | RET(6) |
37568 | } |
37569 | |
37570 | // ROLk |
37571 | OPCODE(0xE198) |
37572 | { |
37573 | u32 adr, res; |
37574 | u32 src, dst; |
37575 | |
37576 | u32 sft; |
37577 | |
37578 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37579 | m68kcontext.io_cycle_counter -= sft * 2; |
37580 | src = DREGu32((Opcode >> 0) & 7); |
37581 | flag_V = 0; |
37582 | flag_C = src >> (24 - sft); |
37583 | res = (src << sft) | (src >> (32 - sft)); |
37584 | flag_N = res >> 24; |
37585 | flag_NotZ = res; |
37586 | DREGu32((Opcode >> 0) & 7) = res; |
37587 | RET(8) |
37588 | } |
37589 | |
37590 | // ASRD |
37591 | OPCODE(0xE020) |
37592 | { |
37593 | u32 adr, res; |
37594 | u32 src, dst; |
37595 | |
37596 | u32 sft; |
37597 | |
37598 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37599 | src = (s32)DREGs8((Opcode >> 0) & 7); |
37600 | if (sft) |
37601 | { |
37602 | m68kcontext.io_cycle_counter -= sft * 2; |
37603 | if (sft < 8) |
37604 | { |
37605 | flag_V = 0; |
37606 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37607 | res = ((s32)src) >> sft; |
37608 | flag_N = res >> 0; |
37609 | flag_NotZ = res; |
37610 | DREGu8((Opcode >> 0) & 7) = res; |
37611 | RET(6) |
37612 | } |
37613 | |
37614 | if (src & (1 << 7)) |
37615 | { |
37616 | flag_N = M68K_SR_N; |
37617 | flag_NotZ = 1; |
37618 | flag_V = 0; |
37619 | flag_C = M68K_SR_C; |
37620 | flag_X = M68K_SR_X; |
37621 | res = 0x000000FF; |
37622 | DREGu8((Opcode >> 0) & 7) = res; |
37623 | RET(6) |
37624 | } |
37625 | |
37626 | flag_N = 0; |
37627 | flag_NotZ = 0; |
37628 | flag_V = 0; |
37629 | flag_C = 0; |
37630 | flag_X = 0; |
37631 | res = 0; |
37632 | DREGu8((Opcode >> 0) & 7) = res; |
37633 | RET(6) |
37634 | } |
37635 | |
37636 | flag_V = 0; |
37637 | flag_C = 0; |
37638 | flag_N = src >> 0; |
37639 | flag_NotZ = src; |
37640 | RET(6) |
37641 | } |
37642 | |
37643 | // ASRD |
37644 | OPCODE(0xE060) |
37645 | { |
37646 | u32 adr, res; |
37647 | u32 src, dst; |
37648 | |
37649 | u32 sft; |
37650 | |
37651 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37652 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37653 | if (sft) |
37654 | { |
37655 | m68kcontext.io_cycle_counter -= sft * 2; |
37656 | if (sft < 16) |
37657 | { |
37658 | flag_V = 0; |
37659 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37660 | res = ((s32)src) >> sft; |
37661 | flag_N = res >> 8; |
37662 | flag_NotZ = res; |
37663 | DREGu16((Opcode >> 0) & 7) = res; |
37664 | RET(6) |
37665 | } |
37666 | |
37667 | if (src & (1 << 15)) |
37668 | { |
37669 | flag_N = M68K_SR_N; |
37670 | flag_NotZ = 1; |
37671 | flag_V = 0; |
37672 | flag_C = M68K_SR_C; |
37673 | flag_X = M68K_SR_X; |
37674 | res = 0x0000FFFF; |
37675 | DREGu16((Opcode >> 0) & 7) = res; |
37676 | RET(6) |
37677 | } |
37678 | |
37679 | flag_N = 0; |
37680 | flag_NotZ = 0; |
37681 | flag_V = 0; |
37682 | flag_C = 0; |
37683 | flag_X = 0; |
37684 | res = 0; |
37685 | DREGu16((Opcode >> 0) & 7) = res; |
37686 | RET(6) |
37687 | } |
37688 | |
37689 | flag_V = 0; |
37690 | flag_C = 0; |
37691 | flag_N = src >> 8; |
37692 | flag_NotZ = src; |
37693 | RET(6) |
37694 | } |
37695 | |
37696 | // ASRD |
37697 | OPCODE(0xE0A0) |
37698 | { |
37699 | #ifdef USE_CYCLONE_TIMING |
37700 | #define CYC 8 |
37701 | #else |
37702 | #define CYC 6 |
37703 | #endif |
37704 | u32 adr, res; |
37705 | u32 src, dst; |
37706 | |
37707 | u32 sft; |
37708 | |
37709 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37710 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37711 | if (sft) |
37712 | { |
37713 | m68kcontext.io_cycle_counter -= sft * 2; |
37714 | if (sft < 32) |
37715 | { |
37716 | flag_V = 0; |
37717 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37718 | res = ((s32)src) >> sft; |
37719 | flag_N = res >> 24; |
37720 | flag_NotZ = res; |
37721 | DREGu32((Opcode >> 0) & 7) = res; |
37722 | RET(CYC) |
37723 | } |
37724 | |
37725 | if (src & (1 << 31)) |
37726 | { |
37727 | flag_N = M68K_SR_N; |
37728 | flag_NotZ = 1; |
37729 | flag_V = 0; |
37730 | flag_C = M68K_SR_C; |
37731 | flag_X = M68K_SR_X; |
37732 | res = 0xFFFFFFFF; |
37733 | DREGu32((Opcode >> 0) & 7) = res; |
37734 | RET(CYC) |
37735 | } |
37736 | |
37737 | flag_N = 0; |
37738 | flag_NotZ = 0; |
37739 | flag_V = 0; |
37740 | flag_C = 0; |
37741 | flag_X = 0; |
37742 | res = 0; |
37743 | DREGu32((Opcode >> 0) & 7) = res; |
37744 | RET(CYC) |
37745 | } |
37746 | |
37747 | flag_V = 0; |
37748 | flag_C = 0; |
37749 | flag_N = src >> 24; |
37750 | flag_NotZ = src; |
37751 | RET(CYC) |
37752 | #undef CYC |
37753 | } |
37754 | |
37755 | // LSRD |
37756 | OPCODE(0xE028) |
37757 | { |
37758 | u32 adr, res; |
37759 | u32 src, dst; |
37760 | |
37761 | u32 sft; |
37762 | |
37763 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37764 | src = DREGu8((Opcode >> 0) & 7); |
37765 | if (sft) |
37766 | { |
37767 | m68kcontext.io_cycle_counter -= sft * 2; |
37768 | if (sft <= 8) |
37769 | { |
37770 | flag_N = flag_V = 0; |
37771 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37772 | res = src >> sft; |
37773 | flag_NotZ = res; |
37774 | DREGu8((Opcode >> 0) & 7) = res; |
37775 | RET(6) |
37776 | } |
37777 | |
37778 | flag_X = flag_C = 0; |
37779 | flag_N = 0; |
37780 | flag_NotZ = 0; |
37781 | flag_V = 0; |
37782 | res = 0; |
37783 | DREGu8((Opcode >> 0) & 7) = res; |
37784 | RET(6) |
37785 | } |
37786 | |
37787 | flag_V = 0; |
37788 | flag_C = 0; |
37789 | flag_N = src >> 0; |
37790 | flag_NotZ = src; |
37791 | RET(6) |
37792 | } |
37793 | |
37794 | // LSRD |
37795 | OPCODE(0xE068) |
37796 | { |
37797 | u32 adr, res; |
37798 | u32 src, dst; |
37799 | |
37800 | u32 sft; |
37801 | |
37802 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37803 | src = DREGu16((Opcode >> 0) & 7); |
37804 | if (sft) |
37805 | { |
37806 | m68kcontext.io_cycle_counter -= sft * 2; |
37807 | if (sft <= 16) |
37808 | { |
37809 | flag_N = flag_V = 0; |
37810 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37811 | res = src >> sft; |
37812 | flag_NotZ = res; |
37813 | DREGu16((Opcode >> 0) & 7) = res; |
37814 | RET(6) |
37815 | } |
37816 | |
37817 | flag_X = flag_C = 0; |
37818 | flag_N = 0; |
37819 | flag_NotZ = 0; |
37820 | flag_V = 0; |
37821 | res = 0; |
37822 | DREGu16((Opcode >> 0) & 7) = res; |
37823 | RET(6) |
37824 | } |
37825 | |
37826 | flag_V = 0; |
37827 | flag_C = 0; |
37828 | flag_N = src >> 8; |
37829 | flag_NotZ = src; |
37830 | RET(6) |
37831 | } |
37832 | |
37833 | // LSRD |
37834 | OPCODE(0xE0A8) |
37835 | { |
37836 | #ifdef USE_CYCLONE_TIMING |
37837 | #define CYC 8 |
37838 | #else |
37839 | #define CYC 6 |
37840 | #endif |
37841 | u32 adr, res; |
37842 | u32 src, dst; |
37843 | |
37844 | u32 sft; |
37845 | |
37846 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37847 | src = DREGu32((Opcode >> 0) & 7); |
37848 | if (sft) |
37849 | { |
37850 | m68kcontext.io_cycle_counter -= sft * 2; |
37851 | if (sft < 32) |
37852 | { |
37853 | flag_N = flag_V = 0; |
37854 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37855 | res = src >> sft; |
37856 | flag_NotZ = res; |
37857 | DREGu32((Opcode >> 0) & 7) = res; |
37858 | RET(CYC) |
37859 | } |
37860 | |
37861 | if (sft == 32) flag_C = src >> (31 - M68K_SR_C_SFT); |
37862 | else flag_C = 0; |
37863 | flag_X = flag_C; |
37864 | flag_N = 0; |
37865 | flag_NotZ = 0; |
37866 | flag_V = 0; |
37867 | res = 0; |
37868 | DREGu32((Opcode >> 0) & 7) = res; |
37869 | RET(CYC) |
37870 | } |
37871 | |
37872 | flag_V = 0; |
37873 | flag_C = 0; |
37874 | flag_N = src >> 24; |
37875 | flag_NotZ = src; |
37876 | RET(CYC) |
37877 | #undef CYC |
37878 | } |
37879 | |
37880 | // ROXRD |
37881 | OPCODE(0xE030) |
37882 | { |
37883 | u32 adr, res; |
37884 | u32 src, dst; |
37885 | |
37886 | u32 sft; |
37887 | |
37888 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37889 | src = DREGu8((Opcode >> 0) & 7); |
37890 | if (sft) |
37891 | { |
37892 | m68kcontext.io_cycle_counter -= sft * 2; |
37893 | sft %= 9; |
37894 | |
37895 | src |= (flag_X & M68K_SR_X) << 0; |
37896 | res = (src >> sft) | (src << (9 - sft)); |
37897 | flag_X = flag_C = res >> 0; |
37898 | flag_V = 0; |
37899 | flag_N = res >> 0; |
37900 | flag_NotZ = res & 0x000000FF; |
37901 | DREGu8((Opcode >> 0) & 7) = res; |
37902 | RET(6) |
37903 | } |
37904 | |
37905 | flag_V = 0; |
37906 | flag_C = flag_X; |
37907 | flag_N = src >> 0; |
37908 | flag_NotZ = src; |
37909 | RET(6) |
37910 | } |
37911 | |
37912 | // ROXRD |
37913 | OPCODE(0xE070) |
37914 | { |
37915 | u32 adr, res; |
37916 | u32 src, dst; |
37917 | |
37918 | u32 sft; |
37919 | |
37920 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37921 | src = DREGu16((Opcode >> 0) & 7); |
37922 | if (sft) |
37923 | { |
37924 | m68kcontext.io_cycle_counter -= sft * 2; |
37925 | sft %= 17; |
37926 | |
37927 | src |= (flag_X & M68K_SR_X) << 8; |
37928 | res = (src >> sft) | (src << (17 - sft)); |
37929 | flag_X = flag_C = res >> 8; |
37930 | flag_V = 0; |
37931 | flag_N = res >> 8; |
37932 | flag_NotZ = res & 0x0000FFFF; |
37933 | DREGu16((Opcode >> 0) & 7) = res; |
37934 | RET(6) |
37935 | } |
37936 | |
37937 | flag_V = 0; |
37938 | flag_C = flag_X; |
37939 | flag_N = src >> 8; |
37940 | flag_NotZ = src; |
37941 | RET(6) |
37942 | } |
37943 | |
37944 | // ROXRD |
37945 | OPCODE(0xE0B0) |
37946 | { |
37947 | #ifdef USE_CYCLONE_TIMING |
37948 | #define CYC 8 |
37949 | #else |
37950 | #define CYC 6 |
37951 | #endif |
37952 | u32 adr, res; |
37953 | u32 src, dst; |
37954 | |
37955 | u32 sft; |
37956 | |
37957 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37958 | src = DREGu32((Opcode >> 0) & 7); |
37959 | if (sft) |
37960 | { |
37961 | m68kcontext.io_cycle_counter -= sft * 2; |
37962 | sft %= 33; |
37963 | |
37964 | if (sft != 0) |
37965 | { |
37966 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37967 | else res = (src >> sft) | (src << (33 - sft)) | (((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))) >> (sft - 1)); |
37968 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
37969 | } |
37970 | else res = src; |
37971 | flag_C = flag_X; |
37972 | flag_V = 0; |
37973 | flag_N = res >> 24; |
37974 | flag_NotZ = res; |
37975 | DREGu32((Opcode >> 0) & 7) = res; |
37976 | RET(CYC) |
37977 | } |
37978 | |
37979 | flag_V = 0; |
37980 | flag_C = flag_X; |
37981 | flag_N = src >> 24; |
37982 | flag_NotZ = src; |
37983 | RET(CYC) |
37984 | #undef CYC |
37985 | } |
37986 | |
37987 | // RORD |
37988 | OPCODE(0xE038) |
37989 | { |
37990 | u32 adr, res; |
37991 | u32 src, dst; |
37992 | |
37993 | u32 sft; |
37994 | |
37995 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37996 | src = DREGu8((Opcode >> 0) & 7); |
37997 | if (sft) |
37998 | { |
37999 | m68kcontext.io_cycle_counter -= sft * 2; |
38000 | sft &= 0x07; |
38001 | |
38002 | flag_C = src << (M68K_SR_C_SFT - ((sft - 1) & 7)); |
38003 | res = (src >> sft) | (src << (8 - sft)); |
38004 | flag_V = 0; |
38005 | flag_N = res >> 0; |
38006 | flag_NotZ = res & 0x000000FF; |
38007 | DREGu8((Opcode >> 0) & 7) = res; |
38008 | RET(6) |
38009 | } |
38010 | |
38011 | flag_V = 0; |
38012 | flag_C = 0; |
38013 | flag_N = src >> 0; |
38014 | flag_NotZ = src; |
38015 | RET(6) |
38016 | } |
38017 | |
38018 | // RORD |
38019 | OPCODE(0xE078) |
38020 | { |
38021 | u32 adr, res; |
38022 | u32 src, dst; |
38023 | |
38024 | u32 sft; |
38025 | |
38026 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38027 | src = DREGu16((Opcode >> 0) & 7); |
38028 | if (sft) |
38029 | { |
38030 | m68kcontext.io_cycle_counter -= sft * 2; |
38031 | sft &= 0x0F; |
38032 | |
38033 | flag_C = (src >> ((sft - 1) & 15)) << M68K_SR_C_SFT; |
38034 | res = (src >> sft) | (src << (16 - sft)); |
38035 | flag_V = 0; |
38036 | flag_N = res >> 8; |
38037 | flag_NotZ = res & 0x0000FFFF; |
38038 | DREGu16((Opcode >> 0) & 7) = res; |
38039 | RET(6) |
38040 | } |
38041 | |
38042 | flag_V = 0; |
38043 | flag_C = 0; |
38044 | flag_N = src >> 8; |
38045 | flag_NotZ = src; |
38046 | RET(6) |
38047 | } |
38048 | |
38049 | // RORD |
38050 | OPCODE(0xE0B8) |
38051 | { |
38052 | #ifdef USE_CYCLONE_TIMING |
38053 | #define CYC 8 |
38054 | #else |
38055 | #define CYC 6 |
38056 | #endif |
38057 | u32 adr, res; |
38058 | u32 src, dst; |
38059 | |
38060 | u32 sft; |
38061 | |
38062 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38063 | src = DREGu32((Opcode >> 0) & 7); |
38064 | if (sft) |
38065 | { |
38066 | m68kcontext.io_cycle_counter -= sft * 2; |
38067 | sft &= 0x1F; |
38068 | |
38069 | flag_C = (src >> ((sft - 1) & 31)) << M68K_SR_C_SFT; |
38070 | res = (src >> sft) | (src << (32 - sft)); |
38071 | flag_V = 0; |
38072 | flag_N = res >> 24; |
38073 | flag_NotZ = res; |
38074 | DREGu32((Opcode >> 0) & 7) = res; |
38075 | RET(CYC) |
38076 | } |
38077 | |
38078 | flag_V = 0; |
38079 | flag_C = 0; |
38080 | flag_N = src >> 24; |
38081 | flag_NotZ = src; |
38082 | RET(CYC) |
38083 | #undef CYC |
38084 | } |
38085 | |
38086 | // ASLD |
38087 | OPCODE(0xE120) |
38088 | { |
38089 | u32 adr, res; |
38090 | u32 src, dst; |
38091 | |
38092 | u32 sft; |
38093 | |
38094 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38095 | src = DREGu8((Opcode >> 0) & 7); |
38096 | if (sft) |
38097 | { |
38098 | m68kcontext.io_cycle_counter -= sft * 2; |
38099 | if (sft < 8) |
38100 | { |
38101 | flag_X = flag_C = (src << sft) >> 0; |
38102 | res = (src << sft) & 0x000000FF; |
38103 | flag_N = res >> 0; |
38104 | flag_NotZ = res; |
38105 | DREGu8((Opcode >> 0) & 7) = res; |
38106 | flag_V = 0; |
38107 | { |
38108 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
38109 | src &= msk; |
38110 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38111 | } |
38112 | RET(6) |
38113 | } |
38114 | |
38115 | if (sft == 256) flag_C = src << M68K_SR_C_SFT; |
38116 | else flag_C = 0; |
38117 | flag_X = flag_C; |
38118 | if (src) flag_V = M68K_SR_V; |
38119 | else flag_V = 0; |
38120 | res = 0; |
38121 | DREGu8((Opcode >> 0) & 7) = res; |
38122 | flag_N = 0; |
38123 | flag_NotZ = 0; |
38124 | RET(6) |
38125 | } |
38126 | |
38127 | flag_V = 0; |
38128 | flag_C = 0; |
38129 | flag_N = src >> 0; |
38130 | flag_NotZ = src; |
38131 | RET(6) |
38132 | } |
38133 | |
38134 | // ASLD |
38135 | OPCODE(0xE160) |
38136 | { |
38137 | u32 adr, res; |
38138 | u32 src, dst; |
38139 | |
38140 | u32 sft; |
38141 | |
38142 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38143 | src = DREGu16((Opcode >> 0) & 7); |
38144 | if (sft) |
38145 | { |
38146 | m68kcontext.io_cycle_counter -= sft * 2; |
38147 | if (sft < 16) |
38148 | { |
38149 | flag_X = flag_C = (src << sft) >> 8; |
38150 | res = (src << sft) & 0x0000FFFF; |
38151 | flag_N = res >> 8; |
38152 | flag_NotZ = res; |
38153 | DREGu16((Opcode >> 0) & 7) = res; |
38154 | flag_V = 0; |
38155 | { |
38156 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
38157 | src &= msk; |
38158 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38159 | } |
38160 | RET(6) |
38161 | } |
38162 | |
38163 | if (sft == 65536) flag_C = src << M68K_SR_C_SFT; |
38164 | else flag_C = 0; |
38165 | flag_X = flag_C; |
38166 | if (src) flag_V = M68K_SR_V; |
38167 | else flag_V = 0; |
38168 | res = 0; |
38169 | DREGu16((Opcode >> 0) & 7) = res; |
38170 | flag_N = 0; |
38171 | flag_NotZ = 0; |
38172 | RET(6) |
38173 | } |
38174 | |
38175 | flag_V = 0; |
38176 | flag_C = 0; |
38177 | flag_N = src >> 8; |
38178 | flag_NotZ = src; |
38179 | RET(6) |
38180 | } |
38181 | |
38182 | // ASLD |
38183 | OPCODE(0xE1A0) |
38184 | { |
38185 | #ifdef USE_CYCLONE_TIMING |
38186 | #define CYC 8 |
38187 | #else |
38188 | #define CYC 6 |
38189 | #endif |
38190 | u32 adr, res; |
38191 | u32 src, dst; |
38192 | |
38193 | u32 sft; |
38194 | |
38195 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38196 | src = DREGu32((Opcode >> 0) & 7); |
38197 | if (sft) |
38198 | { |
38199 | m68kcontext.io_cycle_counter -= sft * 2; |
38200 | if (sft < 32) |
38201 | { |
38202 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38203 | res = src << sft; |
38204 | flag_N = res >> 24; |
38205 | flag_NotZ = res; |
38206 | DREGu32((Opcode >> 0) & 7) = res; |
38207 | flag_V = 0; |
38208 | { |
38209 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
38210 | src &= msk; |
38211 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38212 | } |
38213 | RET(CYC) |
38214 | } |
38215 | |
38216 | if (sft == 0) flag_C = src << M68K_SR_C_SFT; |
38217 | else flag_C = 0; |
38218 | flag_X = flag_C; |
38219 | if (src) flag_V = M68K_SR_V; |
38220 | else flag_V = 0; |
38221 | res = 0; |
38222 | DREGu32((Opcode >> 0) & 7) = res; |
38223 | flag_N = 0; |
38224 | flag_NotZ = 0; |
38225 | RET(CYC) |
38226 | } |
38227 | |
38228 | flag_V = 0; |
38229 | flag_C = 0; |
38230 | flag_N = src >> 24; |
38231 | flag_NotZ = src; |
38232 | RET(CYC) |
38233 | #undef CYC |
38234 | } |
38235 | |
38236 | // LSLD |
38237 | OPCODE(0xE128) |
38238 | { |
38239 | u32 adr, res; |
38240 | u32 src, dst; |
38241 | |
38242 | u32 sft; |
38243 | |
38244 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38245 | src = DREGu8((Opcode >> 0) & 7); |
38246 | if (sft) |
38247 | { |
38248 | m68kcontext.io_cycle_counter -= sft * 2; |
38249 | if (sft <= 8) |
38250 | { |
38251 | flag_X = flag_C = (src << sft) >> 0; |
38252 | res = (src << sft) & 0x000000FF; |
38253 | flag_V = 0; |
38254 | flag_N = res >> 0; |
38255 | flag_NotZ = res; |
38256 | DREGu8((Opcode >> 0) & 7) = res; |
38257 | RET(6) |
38258 | } |
38259 | |
38260 | flag_X = flag_C = 0; |
38261 | flag_N = 0; |
38262 | flag_NotZ = 0; |
38263 | flag_V = 0; |
38264 | res = 0; |
38265 | DREGu8((Opcode >> 0) & 7) = res; |
38266 | RET(6) |
38267 | } |
38268 | |
38269 | flag_V = 0; |
38270 | flag_C = 0; |
38271 | flag_N = src >> 0; |
38272 | flag_NotZ = src; |
38273 | RET(6) |
38274 | } |
38275 | |
38276 | // LSLD |
38277 | OPCODE(0xE168) |
38278 | { |
38279 | u32 adr, res; |
38280 | u32 src, dst; |
38281 | |
38282 | u32 sft; |
38283 | |
38284 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38285 | src = DREGu16((Opcode >> 0) & 7); |
38286 | if (sft) |
38287 | { |
38288 | m68kcontext.io_cycle_counter -= sft * 2; |
38289 | if (sft <= 16) |
38290 | { |
38291 | flag_X = flag_C = (src << sft) >> 8; |
38292 | res = (src << sft) & 0x0000FFFF; |
38293 | flag_V = 0; |
38294 | flag_N = res >> 8; |
38295 | flag_NotZ = res; |
38296 | DREGu16((Opcode >> 0) & 7) = res; |
38297 | RET(6) |
38298 | } |
38299 | |
38300 | flag_X = flag_C = 0; |
38301 | flag_N = 0; |
38302 | flag_NotZ = 0; |
38303 | flag_V = 0; |
38304 | res = 0; |
38305 | DREGu16((Opcode >> 0) & 7) = res; |
38306 | RET(6) |
38307 | } |
38308 | |
38309 | flag_V = 0; |
38310 | flag_C = 0; |
38311 | flag_N = src >> 8; |
38312 | flag_NotZ = src; |
38313 | RET(6) |
38314 | } |
38315 | |
38316 | // LSLD |
38317 | OPCODE(0xE1A8) |
38318 | { |
38319 | #ifdef USE_CYCLONE_TIMING |
38320 | #define CYC 8 |
38321 | #else |
38322 | #define CYC 6 |
38323 | #endif |
38324 | u32 adr, res; |
38325 | u32 src, dst; |
38326 | |
38327 | u32 sft; |
38328 | |
38329 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38330 | src = DREGu32((Opcode >> 0) & 7); |
38331 | if (sft) |
38332 | { |
38333 | m68kcontext.io_cycle_counter -= sft * 2; |
38334 | if (sft < 32) |
38335 | { |
38336 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38337 | res = src << sft; |
38338 | flag_V = 0; |
38339 | flag_N = res >> 24; |
38340 | flag_NotZ = res; |
38341 | DREGu32((Opcode >> 0) & 7) = res; |
38342 | RET(CYC) |
38343 | } |
38344 | |
38345 | if (sft == 32) flag_C = src << M68K_SR_C_SFT; |
38346 | else flag_C = 0; |
38347 | flag_X = flag_C; |
38348 | flag_N = 0; |
38349 | flag_NotZ = 0; |
38350 | flag_V = 0; |
38351 | res = 0; |
38352 | DREGu32((Opcode >> 0) & 7) = res; |
38353 | RET(CYC) |
38354 | } |
38355 | |
38356 | flag_V = 0; |
38357 | flag_C = 0; |
38358 | flag_N = src >> 24; |
38359 | flag_NotZ = src; |
38360 | RET(CYC) |
38361 | #undef CYC |
38362 | } |
38363 | |
38364 | // ROXLD |
38365 | OPCODE(0xE130) |
38366 | { |
38367 | u32 adr, res; |
38368 | u32 src, dst; |
38369 | |
38370 | u32 sft; |
38371 | |
38372 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38373 | src = DREGu8((Opcode >> 0) & 7); |
38374 | if (sft) |
38375 | { |
38376 | m68kcontext.io_cycle_counter -= sft * 2; |
38377 | sft %= 9; |
38378 | |
38379 | src |= (flag_X & M68K_SR_X) << 0; |
38380 | res = (src << sft) | (src >> (9 - sft)); |
38381 | flag_X = flag_C = res >> 0; |
38382 | flag_V = 0; |
38383 | flag_N = res >> 0; |
38384 | flag_NotZ = res & 0x000000FF; |
38385 | DREGu8((Opcode >> 0) & 7) = res; |
38386 | RET(6) |
38387 | } |
38388 | |
38389 | flag_V = 0; |
38390 | flag_C = flag_X; |
38391 | flag_N = src >> 0; |
38392 | flag_NotZ = src; |
38393 | RET(6) |
38394 | } |
38395 | |
38396 | // ROXLD |
38397 | OPCODE(0xE170) |
38398 | { |
38399 | u32 adr, res; |
38400 | u32 src, dst; |
38401 | |
38402 | u32 sft; |
38403 | |
38404 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38405 | src = DREGu16((Opcode >> 0) & 7); |
38406 | if (sft) |
38407 | { |
38408 | m68kcontext.io_cycle_counter -= sft * 2; |
38409 | sft %= 17; |
38410 | |
38411 | src |= (flag_X & M68K_SR_X) << 8; |
38412 | res = (src << sft) | (src >> (17 - sft)); |
38413 | flag_X = flag_C = res >> 8; |
38414 | flag_V = 0; |
38415 | flag_N = res >> 8; |
38416 | flag_NotZ = res & 0x0000FFFF; |
38417 | DREGu16((Opcode >> 0) & 7) = res; |
38418 | RET(6) |
38419 | } |
38420 | |
38421 | flag_V = 0; |
38422 | flag_C = flag_X; |
38423 | flag_N = src >> 8; |
38424 | flag_NotZ = src; |
38425 | RET(6) |
38426 | } |
38427 | |
38428 | // ROXLD |
38429 | OPCODE(0xE1B0) |
38430 | { |
38431 | #ifdef USE_CYCLONE_TIMING |
38432 | #define CYC 8 |
38433 | #else |
38434 | #define CYC 6 |
38435 | #endif |
38436 | u32 adr, res; |
38437 | u32 src, dst; |
38438 | |
38439 | u32 sft; |
38440 | |
38441 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38442 | src = DREGu32((Opcode >> 0) & 7); |
38443 | if (sft) |
38444 | { |
38445 | m68kcontext.io_cycle_counter -= sft * 2; |
38446 | sft %= 33; |
38447 | |
38448 | if (sft != 0) |
38449 | { |
38450 | if (sft == 1) res = (src << 1) | ((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1); |
38451 | else res = (src << sft) | (src >> (33 - sft)) | (((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1) << (sft - 1)); |
38452 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
38453 | } |
38454 | else res = src; |
38455 | flag_C = flag_X; |
38456 | flag_V = 0; |
38457 | flag_N = res >> 24; |
38458 | flag_NotZ = res; |
38459 | DREGu32((Opcode >> 0) & 7) = res; |
38460 | RET(CYC) |
38461 | } |
38462 | |
38463 | flag_V = 0; |
38464 | flag_C = flag_X; |
38465 | flag_N = src >> 24; |
38466 | flag_NotZ = src; |
38467 | RET(CYC) |
38468 | #undef CYC |
38469 | } |
38470 | |
38471 | // ROLD |
38472 | OPCODE(0xE138) |
38473 | { |
38474 | u32 adr, res; |
38475 | u32 src, dst; |
38476 | |
38477 | u32 sft; |
38478 | |
38479 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38480 | src = DREGu8((Opcode >> 0) & 7); |
38481 | if (sft) |
38482 | { |
38483 | m68kcontext.io_cycle_counter -= sft * 2; |
38484 | if (sft &= 0x07) |
38485 | { |
38486 | flag_C = (src << sft) >> 0; |
38487 | res = ((src << sft) | (src >> (8 - sft))) & 0x000000FF; |
38488 | flag_V = 0; |
38489 | flag_N = res >> 0; |
38490 | flag_NotZ = res; |
38491 | DREGu8((Opcode >> 0) & 7) = res; |
38492 | RET(6) |
38493 | } |
38494 | |
38495 | flag_V = 0; |
38496 | flag_C = src << M68K_SR_C_SFT; |
38497 | flag_N = src >> 0; |
38498 | flag_NotZ = src; |
38499 | RET(6) |
38500 | } |
38501 | |
38502 | flag_V = 0; |
38503 | flag_C = 0; |
38504 | flag_N = src >> 0; |
38505 | flag_NotZ = src; |
38506 | RET(6) |
38507 | } |
38508 | |
38509 | // ROLD |
38510 | OPCODE(0xE178) |
38511 | { |
38512 | u32 adr, res; |
38513 | u32 src, dst; |
38514 | |
38515 | u32 sft; |
38516 | |
38517 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38518 | src = DREGu16((Opcode >> 0) & 7); |
38519 | if (sft) |
38520 | { |
38521 | m68kcontext.io_cycle_counter -= sft * 2; |
38522 | if (sft &= 0x0F) |
38523 | { |
38524 | flag_C = (src << sft) >> 8; |
38525 | res = ((src << sft) | (src >> (16 - sft))) & 0x0000FFFF; |
38526 | flag_V = 0; |
38527 | flag_N = res >> 8; |
38528 | flag_NotZ = res; |
38529 | DREGu16((Opcode >> 0) & 7) = res; |
38530 | RET(6) |
38531 | } |
38532 | |
38533 | flag_V = 0; |
38534 | flag_C = src << M68K_SR_C_SFT; |
38535 | flag_N = src >> 8; |
38536 | flag_NotZ = src; |
38537 | RET(6) |
38538 | } |
38539 | |
38540 | flag_V = 0; |
38541 | flag_C = 0; |
38542 | flag_N = src >> 8; |
38543 | flag_NotZ = src; |
38544 | RET(6) |
38545 | } |
38546 | |
38547 | // ROLD |
38548 | OPCODE(0xE1B8) |
38549 | { |
38550 | #ifdef USE_CYCLONE_TIMING |
38551 | #define CYC 8 |
38552 | #else |
38553 | #define CYC 6 |
38554 | #endif |
38555 | u32 adr, res; |
38556 | u32 src, dst; |
38557 | |
38558 | u32 sft; |
38559 | |
38560 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38561 | src = DREGu32((Opcode >> 0) & 7); |
38562 | if (sft) |
38563 | { |
38564 | m68kcontext.io_cycle_counter -= sft * 2; |
38565 | if (sft &= 0x1F) |
38566 | { |
38567 | flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38568 | res = (src << sft) | (src >> (32 - sft)); |
38569 | flag_V = 0; |
38570 | flag_N = res >> 24; |
38571 | flag_NotZ = res; |
38572 | DREGu32((Opcode >> 0) & 7) = res; |
38573 | RET(CYC) |
38574 | } |
38575 | |
38576 | flag_V = 0; |
38577 | flag_C = src << M68K_SR_C_SFT; |
38578 | flag_N = src >> 24; |
38579 | flag_NotZ = src; |
38580 | RET(CYC) |
38581 | } |
38582 | |
38583 | flag_V = 0; |
38584 | flag_C = 0; |
38585 | flag_N = src >> 24; |
38586 | flag_NotZ = src; |
38587 | RET(CYC) |
38588 | #undef CYC |
38589 | } |
38590 | |
38591 | // ASR |
38592 | OPCODE(0xE0D0) |
38593 | { |
38594 | u32 adr, res; |
38595 | u32 src, dst; |
38596 | |
38597 | adr = AREG((Opcode >> 0) & 7); |
38598 | PRE_IO |
38599 | READ_WORD_F(adr, src) |
38600 | flag_V = 0; |
38601 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38602 | res = (src >> 1) | (src & (1 << 15)); |
38603 | flag_N = res >> 8; |
38604 | flag_NotZ = res; |
38605 | WRITE_WORD_F(adr, res) |
38606 | POST_IO |
38607 | RET(12) |
38608 | } |
38609 | |
38610 | // ASR |
38611 | OPCODE(0xE0D8) |
38612 | { |
38613 | u32 adr, res; |
38614 | u32 src, dst; |
38615 | |
38616 | adr = AREG((Opcode >> 0) & 7); |
38617 | AREG((Opcode >> 0) & 7) += 2; |
38618 | PRE_IO |
38619 | READ_WORD_F(adr, src) |
38620 | flag_V = 0; |
38621 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38622 | res = (src >> 1) | (src & (1 << 15)); |
38623 | flag_N = res >> 8; |
38624 | flag_NotZ = res; |
38625 | WRITE_WORD_F(adr, res) |
38626 | POST_IO |
38627 | RET(12) |
38628 | } |
38629 | |
38630 | // ASR |
38631 | OPCODE(0xE0E0) |
38632 | { |
38633 | u32 adr, res; |
38634 | u32 src, dst; |
38635 | |
38636 | adr = AREG((Opcode >> 0) & 7) - 2; |
38637 | AREG((Opcode >> 0) & 7) = adr; |
38638 | PRE_IO |
38639 | READ_WORD_F(adr, src) |
38640 | flag_V = 0; |
38641 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38642 | res = (src >> 1) | (src & (1 << 15)); |
38643 | flag_N = res >> 8; |
38644 | flag_NotZ = res; |
38645 | WRITE_WORD_F(adr, res) |
38646 | POST_IO |
38647 | RET(14) |
38648 | } |
38649 | |
38650 | // ASR |
38651 | OPCODE(0xE0E8) |
38652 | { |
38653 | u32 adr, res; |
38654 | u32 src, dst; |
38655 | |
38656 | FETCH_SWORD(adr); |
38657 | adr += AREG((Opcode >> 0) & 7); |
38658 | PRE_IO |
38659 | READ_WORD_F(adr, src) |
38660 | flag_V = 0; |
38661 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38662 | res = (src >> 1) | (src & (1 << 15)); |
38663 | flag_N = res >> 8; |
38664 | flag_NotZ = res; |
38665 | WRITE_WORD_F(adr, res) |
38666 | POST_IO |
38667 | RET(16) |
38668 | } |
38669 | |
38670 | // ASR |
38671 | OPCODE(0xE0F0) |
38672 | { |
38673 | u32 adr, res; |
38674 | u32 src, dst; |
38675 | |
38676 | adr = AREG((Opcode >> 0) & 7); |
38677 | DECODE_EXT_WORD |
38678 | PRE_IO |
38679 | READ_WORD_F(adr, src) |
38680 | flag_V = 0; |
38681 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38682 | res = (src >> 1) | (src & (1 << 15)); |
38683 | flag_N = res >> 8; |
38684 | flag_NotZ = res; |
38685 | WRITE_WORD_F(adr, res) |
38686 | POST_IO |
38687 | RET(18) |
38688 | } |
38689 | |
38690 | // ASR |
38691 | OPCODE(0xE0F8) |
38692 | { |
38693 | u32 adr, res; |
38694 | u32 src, dst; |
38695 | |
38696 | FETCH_SWORD(adr); |
38697 | PRE_IO |
38698 | READ_WORD_F(adr, src) |
38699 | flag_V = 0; |
38700 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38701 | res = (src >> 1) | (src & (1 << 15)); |
38702 | flag_N = res >> 8; |
38703 | flag_NotZ = res; |
38704 | WRITE_WORD_F(adr, res) |
38705 | POST_IO |
38706 | RET(16) |
38707 | } |
38708 | |
38709 | // ASR |
38710 | OPCODE(0xE0F9) |
38711 | { |
38712 | u32 adr, res; |
38713 | u32 src, dst; |
38714 | |
38715 | FETCH_LONG(adr); |
38716 | PRE_IO |
38717 | READ_WORD_F(adr, src) |
38718 | flag_V = 0; |
38719 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38720 | res = (src >> 1) | (src & (1 << 15)); |
38721 | flag_N = res >> 8; |
38722 | flag_NotZ = res; |
38723 | WRITE_WORD_F(adr, res) |
38724 | POST_IO |
38725 | RET(20) |
38726 | } |
38727 | |
38728 | // ASR |
38729 | OPCODE(0xE0DF) |
38730 | { |
38731 | u32 adr, res; |
38732 | u32 src, dst; |
38733 | |
38734 | adr = AREG(7); |
38735 | AREG(7) += 2; |
38736 | PRE_IO |
38737 | READ_WORD_F(adr, src) |
38738 | flag_V = 0; |
38739 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38740 | res = (src >> 1) | (src & (1 << 15)); |
38741 | flag_N = res >> 8; |
38742 | flag_NotZ = res; |
38743 | WRITE_WORD_F(adr, res) |
38744 | POST_IO |
38745 | RET(12) |
38746 | } |
38747 | |
38748 | // ASR |
38749 | OPCODE(0xE0E7) |
38750 | { |
38751 | u32 adr, res; |
38752 | u32 src, dst; |
38753 | |
38754 | adr = AREG(7) - 2; |
38755 | AREG(7) = adr; |
38756 | PRE_IO |
38757 | READ_WORD_F(adr, src) |
38758 | flag_V = 0; |
38759 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38760 | res = (src >> 1) | (src & (1 << 15)); |
38761 | flag_N = res >> 8; |
38762 | flag_NotZ = res; |
38763 | WRITE_WORD_F(adr, res) |
38764 | POST_IO |
38765 | RET(14) |
38766 | } |
38767 | |
38768 | // LSR |
38769 | OPCODE(0xE2D0) |
38770 | { |
38771 | u32 adr, res; |
38772 | u32 src, dst; |
38773 | |
38774 | adr = AREG((Opcode >> 0) & 7); |
38775 | PRE_IO |
38776 | READ_WORD_F(adr, src) |
38777 | flag_N = flag_V = 0; |
38778 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38779 | res = src >> 1; |
38780 | flag_NotZ = res; |
38781 | WRITE_WORD_F(adr, res) |
38782 | POST_IO |
38783 | RET(12) |
38784 | } |
38785 | |
38786 | // LSR |
38787 | OPCODE(0xE2D8) |
38788 | { |
38789 | u32 adr, res; |
38790 | u32 src, dst; |
38791 | |
38792 | adr = AREG((Opcode >> 0) & 7); |
38793 | AREG((Opcode >> 0) & 7) += 2; |
38794 | PRE_IO |
38795 | READ_WORD_F(adr, src) |
38796 | flag_N = flag_V = 0; |
38797 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38798 | res = src >> 1; |
38799 | flag_NotZ = res; |
38800 | WRITE_WORD_F(adr, res) |
38801 | POST_IO |
38802 | RET(12) |
38803 | } |
38804 | |
38805 | // LSR |
38806 | OPCODE(0xE2E0) |
38807 | { |
38808 | u32 adr, res; |
38809 | u32 src, dst; |
38810 | |
38811 | adr = AREG((Opcode >> 0) & 7) - 2; |
38812 | AREG((Opcode >> 0) & 7) = adr; |
38813 | PRE_IO |
38814 | READ_WORD_F(adr, src) |
38815 | flag_N = flag_V = 0; |
38816 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38817 | res = src >> 1; |
38818 | flag_NotZ = res; |
38819 | WRITE_WORD_F(adr, res) |
38820 | POST_IO |
38821 | RET(14) |
38822 | } |
38823 | |
38824 | // LSR |
38825 | OPCODE(0xE2E8) |
38826 | { |
38827 | u32 adr, res; |
38828 | u32 src, dst; |
38829 | |
38830 | FETCH_SWORD(adr); |
38831 | adr += AREG((Opcode >> 0) & 7); |
38832 | PRE_IO |
38833 | READ_WORD_F(adr, src) |
38834 | flag_N = flag_V = 0; |
38835 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38836 | res = src >> 1; |
38837 | flag_NotZ = res; |
38838 | WRITE_WORD_F(adr, res) |
38839 | POST_IO |
38840 | RET(16) |
38841 | } |
38842 | |
38843 | // LSR |
38844 | OPCODE(0xE2F0) |
38845 | { |
38846 | u32 adr, res; |
38847 | u32 src, dst; |
38848 | |
38849 | adr = AREG((Opcode >> 0) & 7); |
38850 | DECODE_EXT_WORD |
38851 | PRE_IO |
38852 | READ_WORD_F(adr, src) |
38853 | flag_N = flag_V = 0; |
38854 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38855 | res = src >> 1; |
38856 | flag_NotZ = res; |
38857 | WRITE_WORD_F(adr, res) |
38858 | POST_IO |
38859 | RET(18) |
38860 | } |
38861 | |
38862 | // LSR |
38863 | OPCODE(0xE2F8) |
38864 | { |
38865 | u32 adr, res; |
38866 | u32 src, dst; |
38867 | |
38868 | FETCH_SWORD(adr); |
38869 | PRE_IO |
38870 | READ_WORD_F(adr, src) |
38871 | flag_N = flag_V = 0; |
38872 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38873 | res = src >> 1; |
38874 | flag_NotZ = res; |
38875 | WRITE_WORD_F(adr, res) |
38876 | POST_IO |
38877 | RET(16) |
38878 | } |
38879 | |
38880 | // LSR |
38881 | OPCODE(0xE2F9) |
38882 | { |
38883 | u32 adr, res; |
38884 | u32 src, dst; |
38885 | |
38886 | FETCH_LONG(adr); |
38887 | PRE_IO |
38888 | READ_WORD_F(adr, src) |
38889 | flag_N = flag_V = 0; |
38890 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38891 | res = src >> 1; |
38892 | flag_NotZ = res; |
38893 | WRITE_WORD_F(adr, res) |
38894 | POST_IO |
38895 | RET(20) |
38896 | } |
38897 | |
38898 | // LSR |
38899 | OPCODE(0xE2DF) |
38900 | { |
38901 | u32 adr, res; |
38902 | u32 src, dst; |
38903 | |
38904 | adr = AREG(7); |
38905 | AREG(7) += 2; |
38906 | PRE_IO |
38907 | READ_WORD_F(adr, src) |
38908 | flag_N = flag_V = 0; |
38909 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38910 | res = src >> 1; |
38911 | flag_NotZ = res; |
38912 | WRITE_WORD_F(adr, res) |
38913 | POST_IO |
38914 | RET(12) |
38915 | } |
38916 | |
38917 | // LSR |
38918 | OPCODE(0xE2E7) |
38919 | { |
38920 | u32 adr, res; |
38921 | u32 src, dst; |
38922 | |
38923 | adr = AREG(7) - 2; |
38924 | AREG(7) = adr; |
38925 | PRE_IO |
38926 | READ_WORD_F(adr, src) |
38927 | flag_N = flag_V = 0; |
38928 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38929 | res = src >> 1; |
38930 | flag_NotZ = res; |
38931 | WRITE_WORD_F(adr, res) |
38932 | POST_IO |
38933 | RET(14) |
38934 | } |
38935 | |
38936 | // ROXR |
38937 | OPCODE(0xE4D0) |
38938 | { |
38939 | u32 adr, res; |
38940 | u32 src, dst; |
38941 | |
38942 | adr = AREG((Opcode >> 0) & 7); |
38943 | PRE_IO |
38944 | READ_WORD_F(adr, src) |
38945 | flag_V = 0; |
38946 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38947 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38948 | flag_N = res >> 8; |
38949 | flag_NotZ = res; |
38950 | WRITE_WORD_F(adr, res) |
38951 | POST_IO |
38952 | RET(12) |
38953 | } |
38954 | |
38955 | // ROXR |
38956 | OPCODE(0xE4D8) |
38957 | { |
38958 | u32 adr, res; |
38959 | u32 src, dst; |
38960 | |
38961 | adr = AREG((Opcode >> 0) & 7); |
38962 | AREG((Opcode >> 0) & 7) += 2; |
38963 | PRE_IO |
38964 | READ_WORD_F(adr, src) |
38965 | flag_V = 0; |
38966 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38967 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38968 | flag_N = res >> 8; |
38969 | flag_NotZ = res; |
38970 | WRITE_WORD_F(adr, res) |
38971 | POST_IO |
38972 | RET(12) |
38973 | } |
38974 | |
38975 | // ROXR |
38976 | OPCODE(0xE4E0) |
38977 | { |
38978 | u32 adr, res; |
38979 | u32 src, dst; |
38980 | |
38981 | adr = AREG((Opcode >> 0) & 7) - 2; |
38982 | AREG((Opcode >> 0) & 7) = adr; |
38983 | PRE_IO |
38984 | READ_WORD_F(adr, src) |
38985 | flag_V = 0; |
38986 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38987 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38988 | flag_N = res >> 8; |
38989 | flag_NotZ = res; |
38990 | WRITE_WORD_F(adr, res) |
38991 | POST_IO |
38992 | RET(14) |
38993 | } |
38994 | |
38995 | // ROXR |
38996 | OPCODE(0xE4E8) |
38997 | { |
38998 | u32 adr, res; |
38999 | u32 src, dst; |
39000 | |
39001 | FETCH_SWORD(adr); |
39002 | adr += AREG((Opcode >> 0) & 7); |
39003 | PRE_IO |
39004 | READ_WORD_F(adr, src) |
39005 | flag_V = 0; |
39006 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39007 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39008 | flag_N = res >> 8; |
39009 | flag_NotZ = res; |
39010 | WRITE_WORD_F(adr, res) |
39011 | POST_IO |
39012 | RET(16) |
39013 | } |
39014 | |
39015 | // ROXR |
39016 | OPCODE(0xE4F0) |
39017 | { |
39018 | u32 adr, res; |
39019 | u32 src, dst; |
39020 | |
39021 | adr = AREG((Opcode >> 0) & 7); |
39022 | DECODE_EXT_WORD |
39023 | PRE_IO |
39024 | READ_WORD_F(adr, src) |
39025 | flag_V = 0; |
39026 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39027 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39028 | flag_N = res >> 8; |
39029 | flag_NotZ = res; |
39030 | WRITE_WORD_F(adr, res) |
39031 | POST_IO |
39032 | RET(18) |
39033 | } |
39034 | |
39035 | // ROXR |
39036 | OPCODE(0xE4F8) |
39037 | { |
39038 | u32 adr, res; |
39039 | u32 src, dst; |
39040 | |
39041 | FETCH_SWORD(adr); |
39042 | PRE_IO |
39043 | READ_WORD_F(adr, src) |
39044 | flag_V = 0; |
39045 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39046 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39047 | flag_N = res >> 8; |
39048 | flag_NotZ = res; |
39049 | WRITE_WORD_F(adr, res) |
39050 | POST_IO |
39051 | RET(16) |
39052 | } |
39053 | |
39054 | // ROXR |
39055 | OPCODE(0xE4F9) |
39056 | { |
39057 | u32 adr, res; |
39058 | u32 src, dst; |
39059 | |
39060 | FETCH_LONG(adr); |
39061 | PRE_IO |
39062 | READ_WORD_F(adr, src) |
39063 | flag_V = 0; |
39064 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39065 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39066 | flag_N = res >> 8; |
39067 | flag_NotZ = res; |
39068 | WRITE_WORD_F(adr, res) |
39069 | POST_IO |
39070 | RET(20) |
39071 | } |
39072 | |
39073 | // ROXR |
39074 | OPCODE(0xE4DF) |
39075 | { |
39076 | u32 adr, res; |
39077 | u32 src, dst; |
39078 | |
39079 | adr = AREG(7); |
39080 | AREG(7) += 2; |
39081 | PRE_IO |
39082 | READ_WORD_F(adr, src) |
39083 | flag_V = 0; |
39084 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39085 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39086 | flag_N = res >> 8; |
39087 | flag_NotZ = res; |
39088 | WRITE_WORD_F(adr, res) |
39089 | POST_IO |
39090 | RET(12) |
39091 | } |
39092 | |
39093 | // ROXR |
39094 | OPCODE(0xE4E7) |
39095 | { |
39096 | u32 adr, res; |
39097 | u32 src, dst; |
39098 | |
39099 | adr = AREG(7) - 2; |
39100 | AREG(7) = adr; |
39101 | PRE_IO |
39102 | READ_WORD_F(adr, src) |
39103 | flag_V = 0; |
39104 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39105 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39106 | flag_N = res >> 8; |
39107 | flag_NotZ = res; |
39108 | WRITE_WORD_F(adr, res) |
39109 | POST_IO |
39110 | RET(14) |
39111 | } |
39112 | |
39113 | // ROR |
39114 | OPCODE(0xE6D0) |
39115 | { |
39116 | u32 adr, res; |
39117 | u32 src, dst; |
39118 | |
39119 | adr = AREG((Opcode >> 0) & 7); |
39120 | PRE_IO |
39121 | READ_WORD_F(adr, src) |
39122 | flag_V = 0; |
39123 | flag_C = src << M68K_SR_C_SFT; |
39124 | res = (src >> 1) | (src << 15); |
39125 | flag_N = res >> 8; |
39126 | flag_NotZ = res & 0x0000FFFF; |
39127 | WRITE_WORD_F(adr, res) |
39128 | POST_IO |
39129 | RET(12) |
39130 | } |
39131 | |
39132 | // ROR |
39133 | OPCODE(0xE6D8) |
39134 | { |
39135 | u32 adr, res; |
39136 | u32 src, dst; |
39137 | |
39138 | adr = AREG((Opcode >> 0) & 7); |
39139 | AREG((Opcode >> 0) & 7) += 2; |
39140 | PRE_IO |
39141 | READ_WORD_F(adr, src) |
39142 | flag_V = 0; |
39143 | flag_C = src << M68K_SR_C_SFT; |
39144 | res = (src >> 1) | (src << 15); |
39145 | flag_N = res >> 8; |
39146 | flag_NotZ = res & 0x0000FFFF; |
39147 | WRITE_WORD_F(adr, res) |
39148 | POST_IO |
39149 | RET(12) |
39150 | } |
39151 | |
39152 | // ROR |
39153 | OPCODE(0xE6E0) |
39154 | { |
39155 | u32 adr, res; |
39156 | u32 src, dst; |
39157 | |
39158 | adr = AREG((Opcode >> 0) & 7) - 2; |
39159 | AREG((Opcode >> 0) & 7) = adr; |
39160 | PRE_IO |
39161 | READ_WORD_F(adr, src) |
39162 | flag_V = 0; |
39163 | flag_C = src << M68K_SR_C_SFT; |
39164 | res = (src >> 1) | (src << 15); |
39165 | flag_N = res >> 8; |
39166 | flag_NotZ = res & 0x0000FFFF; |
39167 | WRITE_WORD_F(adr, res) |
39168 | POST_IO |
39169 | RET(14) |
39170 | } |
39171 | |
39172 | // ROR |
39173 | OPCODE(0xE6E8) |
39174 | { |
39175 | u32 adr, res; |
39176 | u32 src, dst; |
39177 | |
39178 | FETCH_SWORD(adr); |
39179 | adr += AREG((Opcode >> 0) & 7); |
39180 | PRE_IO |
39181 | READ_WORD_F(adr, src) |
39182 | flag_V = 0; |
39183 | flag_C = src << M68K_SR_C_SFT; |
39184 | res = (src >> 1) | (src << 15); |
39185 | flag_N = res >> 8; |
39186 | flag_NotZ = res & 0x0000FFFF; |
39187 | WRITE_WORD_F(adr, res) |
39188 | POST_IO |
39189 | RET(16) |
39190 | } |
39191 | |
39192 | // ROR |
39193 | OPCODE(0xE6F0) |
39194 | { |
39195 | u32 adr, res; |
39196 | u32 src, dst; |
39197 | |
39198 | adr = AREG((Opcode >> 0) & 7); |
39199 | DECODE_EXT_WORD |
39200 | PRE_IO |
39201 | READ_WORD_F(adr, src) |
39202 | flag_V = 0; |
39203 | flag_C = src << M68K_SR_C_SFT; |
39204 | res = (src >> 1) | (src << 15); |
39205 | flag_N = res >> 8; |
39206 | flag_NotZ = res & 0x0000FFFF; |
39207 | WRITE_WORD_F(adr, res) |
39208 | POST_IO |
39209 | RET(18) |
39210 | } |
39211 | |
39212 | // ROR |
39213 | OPCODE(0xE6F8) |
39214 | { |
39215 | u32 adr, res; |
39216 | u32 src, dst; |
39217 | |
39218 | FETCH_SWORD(adr); |
39219 | PRE_IO |
39220 | READ_WORD_F(adr, src) |
39221 | flag_V = 0; |
39222 | flag_C = src << M68K_SR_C_SFT; |
39223 | res = (src >> 1) | (src << 15); |
39224 | flag_N = res >> 8; |
39225 | flag_NotZ = res & 0x0000FFFF; |
39226 | WRITE_WORD_F(adr, res) |
39227 | POST_IO |
39228 | RET(16) |
39229 | } |
39230 | |
39231 | // ROR |
39232 | OPCODE(0xE6F9) |
39233 | { |
39234 | u32 adr, res; |
39235 | u32 src, dst; |
39236 | |
39237 | FETCH_LONG(adr); |
39238 | PRE_IO |
39239 | READ_WORD_F(adr, src) |
39240 | flag_V = 0; |
39241 | flag_C = src << M68K_SR_C_SFT; |
39242 | res = (src >> 1) | (src << 15); |
39243 | flag_N = res >> 8; |
39244 | flag_NotZ = res & 0x0000FFFF; |
39245 | WRITE_WORD_F(adr, res) |
39246 | POST_IO |
39247 | RET(20) |
39248 | } |
39249 | |
39250 | // ROR |
39251 | OPCODE(0xE6DF) |
39252 | { |
39253 | u32 adr, res; |
39254 | u32 src, dst; |
39255 | |
39256 | adr = AREG(7); |
39257 | AREG(7) += 2; |
39258 | PRE_IO |
39259 | READ_WORD_F(adr, src) |
39260 | flag_V = 0; |
39261 | flag_C = src << M68K_SR_C_SFT; |
39262 | res = (src >> 1) | (src << 15); |
39263 | flag_N = res >> 8; |
39264 | flag_NotZ = res & 0x0000FFFF; |
39265 | WRITE_WORD_F(adr, res) |
39266 | POST_IO |
39267 | RET(12) |
39268 | } |
39269 | |
39270 | // ROR |
39271 | OPCODE(0xE6E7) |
39272 | { |
39273 | u32 adr, res; |
39274 | u32 src, dst; |
39275 | |
39276 | adr = AREG(7) - 2; |
39277 | AREG(7) = adr; |
39278 | PRE_IO |
39279 | READ_WORD_F(adr, src) |
39280 | flag_V = 0; |
39281 | flag_C = src << M68K_SR_C_SFT; |
39282 | res = (src >> 1) | (src << 15); |
39283 | flag_N = res >> 8; |
39284 | flag_NotZ = res & 0x0000FFFF; |
39285 | WRITE_WORD_F(adr, res) |
39286 | POST_IO |
39287 | RET(14) |
39288 | } |
39289 | |
39290 | // ASL |
39291 | OPCODE(0xE1D0) |
39292 | { |
39293 | u32 adr, res; |
39294 | u32 src, dst; |
39295 | |
39296 | adr = AREG((Opcode >> 0) & 7); |
39297 | PRE_IO |
39298 | READ_WORD_F(adr, src) |
39299 | flag_X = flag_C = src >> 7; |
39300 | res = src << 1; |
39301 | flag_V = (src ^ res) >> 8; |
39302 | flag_N = res >> 8; |
39303 | flag_NotZ = res & 0x0000FFFF; |
39304 | WRITE_WORD_F(adr, res) |
39305 | POST_IO |
39306 | RET(12) |
39307 | } |
39308 | |
39309 | // ASL |
39310 | OPCODE(0xE1D8) |
39311 | { |
39312 | u32 adr, res; |
39313 | u32 src, dst; |
39314 | |
39315 | adr = AREG((Opcode >> 0) & 7); |
39316 | AREG((Opcode >> 0) & 7) += 2; |
39317 | PRE_IO |
39318 | READ_WORD_F(adr, src) |
39319 | flag_X = flag_C = src >> 7; |
39320 | res = src << 1; |
39321 | flag_V = (src ^ res) >> 8; |
39322 | flag_N = res >> 8; |
39323 | flag_NotZ = res & 0x0000FFFF; |
39324 | WRITE_WORD_F(adr, res) |
39325 | POST_IO |
39326 | RET(12) |
39327 | } |
39328 | |
39329 | // ASL |
39330 | OPCODE(0xE1E0) |
39331 | { |
39332 | u32 adr, res; |
39333 | u32 src, dst; |
39334 | |
39335 | adr = AREG((Opcode >> 0) & 7) - 2; |
39336 | AREG((Opcode >> 0) & 7) = adr; |
39337 | PRE_IO |
39338 | READ_WORD_F(adr, src) |
39339 | flag_X = flag_C = src >> 7; |
39340 | res = src << 1; |
39341 | flag_V = (src ^ res) >> 8; |
39342 | flag_N = res >> 8; |
39343 | flag_NotZ = res & 0x0000FFFF; |
39344 | WRITE_WORD_F(adr, res) |
39345 | POST_IO |
39346 | RET(14) |
39347 | } |
39348 | |
39349 | // ASL |
39350 | OPCODE(0xE1E8) |
39351 | { |
39352 | u32 adr, res; |
39353 | u32 src, dst; |
39354 | |
39355 | FETCH_SWORD(adr); |
39356 | adr += AREG((Opcode >> 0) & 7); |
39357 | PRE_IO |
39358 | READ_WORD_F(adr, src) |
39359 | flag_X = flag_C = src >> 7; |
39360 | res = src << 1; |
39361 | flag_V = (src ^ res) >> 8; |
39362 | flag_N = res >> 8; |
39363 | flag_NotZ = res & 0x0000FFFF; |
39364 | WRITE_WORD_F(adr, res) |
39365 | POST_IO |
39366 | RET(16) |
39367 | } |
39368 | |
39369 | // ASL |
39370 | OPCODE(0xE1F0) |
39371 | { |
39372 | u32 adr, res; |
39373 | u32 src, dst; |
39374 | |
39375 | adr = AREG((Opcode >> 0) & 7); |
39376 | DECODE_EXT_WORD |
39377 | PRE_IO |
39378 | READ_WORD_F(adr, src) |
39379 | flag_X = flag_C = src >> 7; |
39380 | res = src << 1; |
39381 | flag_V = (src ^ res) >> 8; |
39382 | flag_N = res >> 8; |
39383 | flag_NotZ = res & 0x0000FFFF; |
39384 | WRITE_WORD_F(adr, res) |
39385 | POST_IO |
39386 | RET(18) |
39387 | } |
39388 | |
39389 | // ASL |
39390 | OPCODE(0xE1F8) |
39391 | { |
39392 | u32 adr, res; |
39393 | u32 src, dst; |
39394 | |
39395 | FETCH_SWORD(adr); |
39396 | PRE_IO |
39397 | READ_WORD_F(adr, src) |
39398 | flag_X = flag_C = src >> 7; |
39399 | res = src << 1; |
39400 | flag_V = (src ^ res) >> 8; |
39401 | flag_N = res >> 8; |
39402 | flag_NotZ = res & 0x0000FFFF; |
39403 | WRITE_WORD_F(adr, res) |
39404 | POST_IO |
39405 | RET(16) |
39406 | } |
39407 | |
39408 | // ASL |
39409 | OPCODE(0xE1F9) |
39410 | { |
39411 | u32 adr, res; |
39412 | u32 src, dst; |
39413 | |
39414 | FETCH_LONG(adr); |
39415 | PRE_IO |
39416 | READ_WORD_F(adr, src) |
39417 | flag_X = flag_C = src >> 7; |
39418 | res = src << 1; |
39419 | flag_V = (src ^ res) >> 8; |
39420 | flag_N = res >> 8; |
39421 | flag_NotZ = res & 0x0000FFFF; |
39422 | WRITE_WORD_F(adr, res) |
39423 | POST_IO |
39424 | RET(20) |
39425 | } |
39426 | |
39427 | // ASL |
39428 | OPCODE(0xE1DF) |
39429 | { |
39430 | u32 adr, res; |
39431 | u32 src, dst; |
39432 | |
39433 | adr = AREG(7); |
39434 | AREG(7) += 2; |
39435 | PRE_IO |
39436 | READ_WORD_F(adr, src) |
39437 | flag_X = flag_C = src >> 7; |
39438 | res = src << 1; |
39439 | flag_V = (src ^ res) >> 8; |
39440 | flag_N = res >> 8; |
39441 | flag_NotZ = res & 0x0000FFFF; |
39442 | WRITE_WORD_F(adr, res) |
39443 | POST_IO |
39444 | RET(12) |
39445 | } |
39446 | |
39447 | // ASL |
39448 | OPCODE(0xE1E7) |
39449 | { |
39450 | u32 adr, res; |
39451 | u32 src, dst; |
39452 | |
39453 | adr = AREG(7) - 2; |
39454 | AREG(7) = adr; |
39455 | PRE_IO |
39456 | READ_WORD_F(adr, src) |
39457 | flag_X = flag_C = src >> 7; |
39458 | res = src << 1; |
39459 | flag_V = (src ^ res) >> 8; |
39460 | flag_N = res >> 8; |
39461 | flag_NotZ = res & 0x0000FFFF; |
39462 | WRITE_WORD_F(adr, res) |
39463 | POST_IO |
39464 | RET(14) |
39465 | } |
39466 | |
39467 | // LSL |
39468 | OPCODE(0xE3D0) |
39469 | { |
39470 | u32 adr, res; |
39471 | u32 src, dst; |
39472 | |
39473 | adr = AREG((Opcode >> 0) & 7); |
39474 | PRE_IO |
39475 | READ_WORD_F(adr, src) |
39476 | flag_V = 0; |
39477 | flag_X = flag_C = src >> 7; |
39478 | res = src << 1; |
39479 | flag_N = res >> 8; |
39480 | flag_NotZ = res & 0x0000FFFF; |
39481 | WRITE_WORD_F(adr, res) |
39482 | POST_IO |
39483 | RET(12) |
39484 | } |
39485 | |
39486 | // LSL |
39487 | OPCODE(0xE3D8) |
39488 | { |
39489 | u32 adr, res; |
39490 | u32 src, dst; |
39491 | |
39492 | adr = AREG((Opcode >> 0) & 7); |
39493 | AREG((Opcode >> 0) & 7) += 2; |
39494 | PRE_IO |
39495 | READ_WORD_F(adr, src) |
39496 | flag_V = 0; |
39497 | flag_X = flag_C = src >> 7; |
39498 | res = src << 1; |
39499 | flag_N = res >> 8; |
39500 | flag_NotZ = res & 0x0000FFFF; |
39501 | WRITE_WORD_F(adr, res) |
39502 | POST_IO |
39503 | RET(12) |
39504 | } |
39505 | |
39506 | // LSL |
39507 | OPCODE(0xE3E0) |
39508 | { |
39509 | u32 adr, res; |
39510 | u32 src, dst; |
39511 | |
39512 | adr = AREG((Opcode >> 0) & 7) - 2; |
39513 | AREG((Opcode >> 0) & 7) = adr; |
39514 | PRE_IO |
39515 | READ_WORD_F(adr, src) |
39516 | flag_V = 0; |
39517 | flag_X = flag_C = src >> 7; |
39518 | res = src << 1; |
39519 | flag_N = res >> 8; |
39520 | flag_NotZ = res & 0x0000FFFF; |
39521 | WRITE_WORD_F(adr, res) |
39522 | POST_IO |
39523 | RET(14) |
39524 | } |
39525 | |
39526 | // LSL |
39527 | OPCODE(0xE3E8) |
39528 | { |
39529 | u32 adr, res; |
39530 | u32 src, dst; |
39531 | |
39532 | FETCH_SWORD(adr); |
39533 | adr += AREG((Opcode >> 0) & 7); |
39534 | PRE_IO |
39535 | READ_WORD_F(adr, src) |
39536 | flag_V = 0; |
39537 | flag_X = flag_C = src >> 7; |
39538 | res = src << 1; |
39539 | flag_N = res >> 8; |
39540 | flag_NotZ = res & 0x0000FFFF; |
39541 | WRITE_WORD_F(adr, res) |
39542 | POST_IO |
39543 | RET(16) |
39544 | } |
39545 | |
39546 | // LSL |
39547 | OPCODE(0xE3F0) |
39548 | { |
39549 | u32 adr, res; |
39550 | u32 src, dst; |
39551 | |
39552 | adr = AREG((Opcode >> 0) & 7); |
39553 | DECODE_EXT_WORD |
39554 | PRE_IO |
39555 | READ_WORD_F(adr, src) |
39556 | flag_V = 0; |
39557 | flag_X = flag_C = src >> 7; |
39558 | res = src << 1; |
39559 | flag_N = res >> 8; |
39560 | flag_NotZ = res & 0x0000FFFF; |
39561 | WRITE_WORD_F(adr, res) |
39562 | POST_IO |
39563 | RET(18) |
39564 | } |
39565 | |
39566 | // LSL |
39567 | OPCODE(0xE3F8) |
39568 | { |
39569 | u32 adr, res; |
39570 | u32 src, dst; |
39571 | |
39572 | FETCH_SWORD(adr); |
39573 | PRE_IO |
39574 | READ_WORD_F(adr, src) |
39575 | flag_V = 0; |
39576 | flag_X = flag_C = src >> 7; |
39577 | res = src << 1; |
39578 | flag_N = res >> 8; |
39579 | flag_NotZ = res & 0x0000FFFF; |
39580 | WRITE_WORD_F(adr, res) |
39581 | POST_IO |
39582 | RET(16) |
39583 | } |
39584 | |
39585 | // LSL |
39586 | OPCODE(0xE3F9) |
39587 | { |
39588 | u32 adr, res; |
39589 | u32 src, dst; |
39590 | |
39591 | FETCH_LONG(adr); |
39592 | PRE_IO |
39593 | READ_WORD_F(adr, src) |
39594 | flag_V = 0; |
39595 | flag_X = flag_C = src >> 7; |
39596 | res = src << 1; |
39597 | flag_N = res >> 8; |
39598 | flag_NotZ = res & 0x0000FFFF; |
39599 | WRITE_WORD_F(adr, res) |
39600 | POST_IO |
39601 | RET(20) |
39602 | } |
39603 | |
39604 | // LSL |
39605 | OPCODE(0xE3DF) |
39606 | { |
39607 | u32 adr, res; |
39608 | u32 src, dst; |
39609 | |
39610 | adr = AREG(7); |
39611 | AREG(7) += 2; |
39612 | PRE_IO |
39613 | READ_WORD_F(adr, src) |
39614 | flag_V = 0; |
39615 | flag_X = flag_C = src >> 7; |
39616 | res = src << 1; |
39617 | flag_N = res >> 8; |
39618 | flag_NotZ = res & 0x0000FFFF; |
39619 | WRITE_WORD_F(adr, res) |
39620 | POST_IO |
39621 | RET(12) |
39622 | } |
39623 | |
39624 | // LSL |
39625 | OPCODE(0xE3E7) |
39626 | { |
39627 | u32 adr, res; |
39628 | u32 src, dst; |
39629 | |
39630 | adr = AREG(7) - 2; |
39631 | AREG(7) = adr; |
39632 | PRE_IO |
39633 | READ_WORD_F(adr, src) |
39634 | flag_V = 0; |
39635 | flag_X = flag_C = src >> 7; |
39636 | res = src << 1; |
39637 | flag_N = res >> 8; |
39638 | flag_NotZ = res & 0x0000FFFF; |
39639 | WRITE_WORD_F(adr, res) |
39640 | POST_IO |
39641 | RET(14) |
39642 | } |
39643 | |
39644 | // ROXL |
39645 | OPCODE(0xE5D0) |
39646 | { |
39647 | u32 adr, res; |
39648 | u32 src, dst; |
39649 | |
39650 | adr = AREG((Opcode >> 0) & 7); |
39651 | PRE_IO |
39652 | READ_WORD_F(adr, src) |
39653 | flag_V = 0; |
39654 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39655 | flag_X = flag_C = src >> 7; |
39656 | flag_N = res >> 8; |
39657 | flag_NotZ = res & 0x0000FFFF; |
39658 | WRITE_WORD_F(adr, res) |
39659 | POST_IO |
39660 | RET(12) |
39661 | } |
39662 | |
39663 | // ROXL |
39664 | OPCODE(0xE5D8) |
39665 | { |
39666 | u32 adr, res; |
39667 | u32 src, dst; |
39668 | |
39669 | adr = AREG((Opcode >> 0) & 7); |
39670 | AREG((Opcode >> 0) & 7) += 2; |
39671 | PRE_IO |
39672 | READ_WORD_F(adr, src) |
39673 | flag_V = 0; |
39674 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39675 | flag_X = flag_C = src >> 7; |
39676 | flag_N = res >> 8; |
39677 | flag_NotZ = res & 0x0000FFFF; |
39678 | WRITE_WORD_F(adr, res) |
39679 | POST_IO |
39680 | RET(12) |
39681 | } |
39682 | |
39683 | // ROXL |
39684 | OPCODE(0xE5E0) |
39685 | { |
39686 | u32 adr, res; |
39687 | u32 src, dst; |
39688 | |
39689 | adr = AREG((Opcode >> 0) & 7) - 2; |
39690 | AREG((Opcode >> 0) & 7) = adr; |
39691 | PRE_IO |
39692 | READ_WORD_F(adr, src) |
39693 | flag_V = 0; |
39694 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39695 | flag_X = flag_C = src >> 7; |
39696 | flag_N = res >> 8; |
39697 | flag_NotZ = res & 0x0000FFFF; |
39698 | WRITE_WORD_F(adr, res) |
39699 | POST_IO |
39700 | RET(14) |
39701 | } |
39702 | |
39703 | // ROXL |
39704 | OPCODE(0xE5E8) |
39705 | { |
39706 | u32 adr, res; |
39707 | u32 src, dst; |
39708 | |
39709 | FETCH_SWORD(adr); |
39710 | adr += AREG((Opcode >> 0) & 7); |
39711 | PRE_IO |
39712 | READ_WORD_F(adr, src) |
39713 | flag_V = 0; |
39714 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39715 | flag_X = flag_C = src >> 7; |
39716 | flag_N = res >> 8; |
39717 | flag_NotZ = res & 0x0000FFFF; |
39718 | WRITE_WORD_F(adr, res) |
39719 | POST_IO |
39720 | RET(16) |
39721 | } |
39722 | |
39723 | // ROXL |
39724 | OPCODE(0xE5F0) |
39725 | { |
39726 | u32 adr, res; |
39727 | u32 src, dst; |
39728 | |
39729 | adr = AREG((Opcode >> 0) & 7); |
39730 | DECODE_EXT_WORD |
39731 | PRE_IO |
39732 | READ_WORD_F(adr, src) |
39733 | flag_V = 0; |
39734 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39735 | flag_X = flag_C = src >> 7; |
39736 | flag_N = res >> 8; |
39737 | flag_NotZ = res & 0x0000FFFF; |
39738 | WRITE_WORD_F(adr, res) |
39739 | POST_IO |
39740 | RET(18) |
39741 | } |
39742 | |
39743 | // ROXL |
39744 | OPCODE(0xE5F8) |
39745 | { |
39746 | u32 adr, res; |
39747 | u32 src, dst; |
39748 | |
39749 | FETCH_SWORD(adr); |
39750 | PRE_IO |
39751 | READ_WORD_F(adr, src) |
39752 | flag_V = 0; |
39753 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39754 | flag_X = flag_C = src >> 7; |
39755 | flag_N = res >> 8; |
39756 | flag_NotZ = res & 0x0000FFFF; |
39757 | WRITE_WORD_F(adr, res) |
39758 | POST_IO |
39759 | RET(16) |
39760 | } |
39761 | |
39762 | // ROXL |
39763 | OPCODE(0xE5F9) |
39764 | { |
39765 | u32 adr, res; |
39766 | u32 src, dst; |
39767 | |
39768 | FETCH_LONG(adr); |
39769 | PRE_IO |
39770 | READ_WORD_F(adr, src) |
39771 | flag_V = 0; |
39772 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39773 | flag_X = flag_C = src >> 7; |
39774 | flag_N = res >> 8; |
39775 | flag_NotZ = res & 0x0000FFFF; |
39776 | WRITE_WORD_F(adr, res) |
39777 | POST_IO |
39778 | RET(20) |
39779 | } |
39780 | |
39781 | // ROXL |
39782 | OPCODE(0xE5DF) |
39783 | { |
39784 | u32 adr, res; |
39785 | u32 src, dst; |
39786 | |
39787 | adr = AREG(7); |
39788 | AREG(7) += 2; |
39789 | PRE_IO |
39790 | READ_WORD_F(adr, src) |
39791 | flag_V = 0; |
39792 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39793 | flag_X = flag_C = src >> 7; |
39794 | flag_N = res >> 8; |
39795 | flag_NotZ = res & 0x0000FFFF; |
39796 | WRITE_WORD_F(adr, res) |
39797 | POST_IO |
39798 | RET(12) |
39799 | } |
39800 | |
39801 | // ROXL |
39802 | OPCODE(0xE5E7) |
39803 | { |
39804 | u32 adr, res; |
39805 | u32 src, dst; |
39806 | |
39807 | adr = AREG(7) - 2; |
39808 | AREG(7) = adr; |
39809 | PRE_IO |
39810 | READ_WORD_F(adr, src) |
39811 | flag_V = 0; |
39812 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39813 | flag_X = flag_C = src >> 7; |
39814 | flag_N = res >> 8; |
39815 | flag_NotZ = res & 0x0000FFFF; |
39816 | WRITE_WORD_F(adr, res) |
39817 | POST_IO |
39818 | RET(14) |
39819 | } |
39820 | |
39821 | // ROL |
39822 | OPCODE(0xE7D0) |
39823 | { |
39824 | u32 adr, res; |
39825 | u32 src, dst; |
39826 | |
39827 | adr = AREG((Opcode >> 0) & 7); |
39828 | PRE_IO |
39829 | READ_WORD_F(adr, src) |
39830 | flag_V = 0; |
39831 | flag_C = src >> 7; |
39832 | res = (src << 1) | (src >> 15); |
39833 | flag_N = res >> 8; |
39834 | flag_NotZ = res & 0x0000FFFF; |
39835 | WRITE_WORD_F(adr, res) |
39836 | POST_IO |
39837 | RET(12) |
39838 | } |
39839 | |
39840 | // ROL |
39841 | OPCODE(0xE7D8) |
39842 | { |
39843 | u32 adr, res; |
39844 | u32 src, dst; |
39845 | |
39846 | adr = AREG((Opcode >> 0) & 7); |
39847 | AREG((Opcode >> 0) & 7) += 2; |
39848 | PRE_IO |
39849 | READ_WORD_F(adr, src) |
39850 | flag_V = 0; |
39851 | flag_C = src >> 7; |
39852 | res = (src << 1) | (src >> 15); |
39853 | flag_N = res >> 8; |
39854 | flag_NotZ = res & 0x0000FFFF; |
39855 | WRITE_WORD_F(adr, res) |
39856 | POST_IO |
39857 | RET(12) |
39858 | } |
39859 | |
39860 | // ROL |
39861 | OPCODE(0xE7E0) |
39862 | { |
39863 | u32 adr, res; |
39864 | u32 src, dst; |
39865 | |
39866 | adr = AREG((Opcode >> 0) & 7) - 2; |
39867 | AREG((Opcode >> 0) & 7) = adr; |
39868 | PRE_IO |
39869 | READ_WORD_F(adr, src) |
39870 | flag_V = 0; |
39871 | flag_C = src >> 7; |
39872 | res = (src << 1) | (src >> 15); |
39873 | flag_N = res >> 8; |
39874 | flag_NotZ = res & 0x0000FFFF; |
39875 | WRITE_WORD_F(adr, res) |
39876 | POST_IO |
39877 | RET(14) |
39878 | } |
39879 | |
39880 | // ROL |
39881 | OPCODE(0xE7E8) |
39882 | { |
39883 | u32 adr, res; |
39884 | u32 src, dst; |
39885 | |
39886 | FETCH_SWORD(adr); |
39887 | adr += AREG((Opcode >> 0) & 7); |
39888 | PRE_IO |
39889 | READ_WORD_F(adr, src) |
39890 | flag_V = 0; |
39891 | flag_C = src >> 7; |
39892 | res = (src << 1) | (src >> 15); |
39893 | flag_N = res >> 8; |
39894 | flag_NotZ = res & 0x0000FFFF; |
39895 | WRITE_WORD_F(adr, res) |
39896 | POST_IO |
39897 | RET(16) |
39898 | } |
39899 | |
39900 | // ROL |
39901 | OPCODE(0xE7F0) |
39902 | { |
39903 | u32 adr, res; |
39904 | u32 src, dst; |
39905 | |
39906 | adr = AREG((Opcode >> 0) & 7); |
39907 | DECODE_EXT_WORD |
39908 | PRE_IO |
39909 | READ_WORD_F(adr, src) |
39910 | flag_V = 0; |
39911 | flag_C = src >> 7; |
39912 | res = (src << 1) | (src >> 15); |
39913 | flag_N = res >> 8; |
39914 | flag_NotZ = res & 0x0000FFFF; |
39915 | WRITE_WORD_F(adr, res) |
39916 | POST_IO |
39917 | RET(18) |
39918 | } |
39919 | |
39920 | // ROL |
39921 | OPCODE(0xE7F8) |
39922 | { |
39923 | u32 adr, res; |
39924 | u32 src, dst; |
39925 | |
39926 | FETCH_SWORD(adr); |
39927 | PRE_IO |
39928 | READ_WORD_F(adr, src) |
39929 | flag_V = 0; |
39930 | flag_C = src >> 7; |
39931 | res = (src << 1) | (src >> 15); |
39932 | flag_N = res >> 8; |
39933 | flag_NotZ = res & 0x0000FFFF; |
39934 | WRITE_WORD_F(adr, res) |
39935 | POST_IO |
39936 | RET(16) |
39937 | } |
39938 | |
39939 | // ROL |
39940 | OPCODE(0xE7F9) |
39941 | { |
39942 | u32 adr, res; |
39943 | u32 src, dst; |
39944 | |
39945 | FETCH_LONG(adr); |
39946 | PRE_IO |
39947 | READ_WORD_F(adr, src) |
39948 | flag_V = 0; |
39949 | flag_C = src >> 7; |
39950 | res = (src << 1) | (src >> 15); |
39951 | flag_N = res >> 8; |
39952 | flag_NotZ = res & 0x0000FFFF; |
39953 | WRITE_WORD_F(adr, res) |
39954 | POST_IO |
39955 | RET(20) |
39956 | } |
39957 | |
39958 | // ROL |
39959 | OPCODE(0xE7DF) |
39960 | { |
39961 | u32 adr, res; |
39962 | u32 src, dst; |
39963 | |
39964 | adr = AREG(7); |
39965 | AREG(7) += 2; |
39966 | PRE_IO |
39967 | READ_WORD_F(adr, src) |
39968 | flag_V = 0; |
39969 | flag_C = src >> 7; |
39970 | res = (src << 1) | (src >> 15); |
39971 | flag_N = res >> 8; |
39972 | flag_NotZ = res & 0x0000FFFF; |
39973 | WRITE_WORD_F(adr, res) |
39974 | POST_IO |
39975 | RET(12) |
39976 | } |
39977 | |
39978 | // ROL |
39979 | OPCODE(0xE7E7) |
39980 | { |
39981 | u32 adr, res; |
39982 | u32 src, dst; |
39983 | |
39984 | adr = AREG(7) - 2; |
39985 | AREG(7) = adr; |
39986 | PRE_IO |
39987 | READ_WORD_F(adr, src) |
39988 | flag_V = 0; |
39989 | flag_C = src >> 7; |
39990 | res = (src << 1) | (src >> 15); |
39991 | flag_N = res >> 8; |
39992 | flag_NotZ = res & 0x0000FFFF; |
39993 | WRITE_WORD_F(adr, res) |
39994 | POST_IO |
39995 | RET(14) |
39996 | } |
39997 | |
c060a9ab |
39998 | #ifdef PICODRIVE_HACK |
8187ba84 |
39999 | #if 0 |
40000 | #define UPDATE_IDLE_COUNT { \ |
40001 | extern int idle_hit_counter; \ |
40002 | idle_hit_counter++; \ |
40003 | } |
40004 | #else |
40005 | #define UPDATE_IDLE_COUNT |
40006 | #endif |
40007 | |
c060a9ab |
40008 | // BRA |
40009 | OPCODE(0x6001_idle) |
40010 | { |
40011 | #ifdef FAMEC_CHECK_BRANCHES |
be26eb23 |
40012 | u32 newPC = GET_PC; |
c060a9ab |
40013 | s8 offs=Opcode; |
40014 | newPC += offs; |
40015 | SET_PC(newPC); |
40016 | CHECK_BRANCH_EXCEPTION(offs) |
40017 | #else |
40018 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
40019 | #endif |
8187ba84 |
40020 | UPDATE_IDLE_COUNT |
fcf94fcc |
40021 | RET0() |
c060a9ab |
40022 | } |
40023 | |
40024 | // BCC |
40025 | OPCODE(0x6601_idle) |
40026 | { |
40027 | if (flag_NotZ) |
40028 | { |
8187ba84 |
40029 | UPDATE_IDLE_COUNT |
c060a9ab |
40030 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
fcf94fcc |
40031 | //if (idle_hit) |
40032 | RET0() |
c060a9ab |
40033 | } |
40034 | RET(8) |
40035 | } |
40036 | |
40037 | OPCODE(0x6701_idle) |
40038 | { |
40039 | if (!flag_NotZ) |
40040 | { |
8187ba84 |
40041 | UPDATE_IDLE_COUNT |
c060a9ab |
40042 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
fcf94fcc |
40043 | //if (idle_hit) |
40044 | RET0() |
c060a9ab |
40045 | } |
40046 | RET(8) |
40047 | } |
40048 | |
40049 | |
0219d379 |
40050 | extern int SekIsIdleReady(void); |
c060a9ab |
40051 | extern int SekIsIdleCode(unsigned short *dst, int bytes); |
5ed2a20e |
40052 | extern int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx); |
c060a9ab |
40053 | |
40054 | OPCODE(idle_detector_bcc8) |
40055 | { |
c060a9ab |
40056 | int frame_count, cond_true, bytes, ret, newop; |
40057 | u16 *dest_pc; |
40058 | |
40059 | dest_pc = PC + (((s8)(Opcode & 0xFE)) >> 1); |
40060 | |
0219d379 |
40061 | if (!SekIsIdleReady()) |
c060a9ab |
40062 | goto end; |
40063 | |
40064 | bytes = 0 - (s8)(Opcode & 0xFE) - 2; |
40065 | ret = SekIsIdleCode(dest_pc, bytes); |
40066 | newop = (Opcode & 0xfe) | 0x7100; |
40067 | if (!ret) newop |= 0x200; |
5ed2a20e |
40068 | if ( Opcode & 0x0100) newop |= 0x400; // beq |
40069 | if (!(Opcode & 0x0f00)) newop |= 0xc00; // bra |
c060a9ab |
40070 | |
5ed2a20e |
40071 | ret = SekRegisterIdlePatch(GET_PC - 2, Opcode, newop, &m68kcontext); |
c060a9ab |
40072 | switch (ret) |
40073 | { |
40074 | case 0: PC[-1] = newop; break; |
40075 | case 1: break; |
5ed2a20e |
40076 | case 2: JumpTable[Opcode] = (Opcode & 0x0f00) ? |
40077 | ((Opcode & 0x0100) ? CAST_OP(0x6701) : CAST_OP(0x6601)) : |
40078 | CAST_OP(0x6001); break; |
c060a9ab |
40079 | } |
40080 | |
40081 | end: |
5ed2a20e |
40082 | if ((Opcode & 0xff00) == 0x6000) cond_true = 1; |
40083 | else cond_true = (Opcode & 0x0100) ? !flag_NotZ : flag_NotZ; // beq? |
c060a9ab |
40084 | if (cond_true) |
40085 | { |
40086 | PC = dest_pc; |
40087 | m68kcontext.io_cycle_counter -= 2; |
40088 | } |
40089 | RET(8) |
40090 | } |
40091 | |
c060a9ab |
40092 | #endif // PICODRIVE_HACK |