70357ce5 |
1 | |
2 | // ORI |
3 | OPCODE(0x0000) |
4 | { |
5 | u32 adr, res; |
6 | u32 src, dst; |
7 | |
8 | FETCH_BYTE(src); |
9 | res = DREGu8((Opcode >> 0) & 7); |
10 | res |= src; |
11 | flag_C = 0; |
12 | flag_V = 0; |
13 | flag_NotZ = res; |
14 | flag_N = res; |
15 | DREGu8((Opcode >> 0) & 7) = res; |
16 | RET(8) |
17 | } |
18 | |
19 | // ORI |
20 | OPCODE(0x0010) |
21 | { |
22 | u32 adr, res; |
23 | u32 src, dst; |
24 | |
25 | FETCH_BYTE(src); |
26 | adr = AREG((Opcode >> 0) & 7); |
27 | PRE_IO |
28 | READ_BYTE_F(adr, res) |
29 | res |= src; |
30 | flag_C = 0; |
31 | flag_V = 0; |
32 | flag_NotZ = res; |
33 | flag_N = res; |
34 | WRITE_BYTE_F(adr, res) |
35 | POST_IO |
36 | RET(16) |
37 | } |
38 | |
39 | // ORI |
40 | OPCODE(0x0018) |
41 | { |
42 | u32 adr, res; |
43 | u32 src, dst; |
44 | |
45 | FETCH_BYTE(src); |
46 | adr = AREG((Opcode >> 0) & 7); |
47 | AREG((Opcode >> 0) & 7) += 1; |
48 | PRE_IO |
49 | READ_BYTE_F(adr, res) |
50 | res |= src; |
51 | flag_C = 0; |
52 | flag_V = 0; |
53 | flag_NotZ = res; |
54 | flag_N = res; |
55 | WRITE_BYTE_F(adr, res) |
56 | POST_IO |
57 | RET(16) |
58 | } |
59 | |
60 | // ORI |
61 | OPCODE(0x0020) |
62 | { |
63 | u32 adr, res; |
64 | u32 src, dst; |
65 | |
66 | FETCH_BYTE(src); |
67 | adr = AREG((Opcode >> 0) & 7) - 1; |
68 | AREG((Opcode >> 0) & 7) = adr; |
69 | PRE_IO |
70 | READ_BYTE_F(adr, res) |
71 | res |= src; |
72 | flag_C = 0; |
73 | flag_V = 0; |
74 | flag_NotZ = res; |
75 | flag_N = res; |
76 | WRITE_BYTE_F(adr, res) |
77 | POST_IO |
78 | RET(18) |
79 | } |
80 | |
81 | // ORI |
82 | OPCODE(0x0028) |
83 | { |
84 | u32 adr, res; |
85 | u32 src, dst; |
86 | |
87 | FETCH_BYTE(src); |
88 | FETCH_SWORD(adr); |
89 | adr += AREG((Opcode >> 0) & 7); |
90 | PRE_IO |
91 | READ_BYTE_F(adr, res) |
92 | res |= src; |
93 | flag_C = 0; |
94 | flag_V = 0; |
95 | flag_NotZ = res; |
96 | flag_N = res; |
97 | WRITE_BYTE_F(adr, res) |
98 | POST_IO |
99 | RET(20) |
100 | } |
101 | |
102 | // ORI |
103 | OPCODE(0x0030) |
104 | { |
105 | u32 adr, res; |
106 | u32 src, dst; |
107 | |
108 | FETCH_BYTE(src); |
109 | adr = AREG((Opcode >> 0) & 7); |
110 | DECODE_EXT_WORD |
111 | PRE_IO |
112 | READ_BYTE_F(adr, res) |
113 | res |= src; |
114 | flag_C = 0; |
115 | flag_V = 0; |
116 | flag_NotZ = res; |
117 | flag_N = res; |
118 | WRITE_BYTE_F(adr, res) |
119 | POST_IO |
120 | RET(22) |
121 | } |
122 | |
123 | // ORI |
124 | OPCODE(0x0038) |
125 | { |
126 | u32 adr, res; |
127 | u32 src, dst; |
128 | |
129 | FETCH_BYTE(src); |
130 | FETCH_SWORD(adr); |
131 | PRE_IO |
132 | READ_BYTE_F(adr, res) |
133 | res |= src; |
134 | flag_C = 0; |
135 | flag_V = 0; |
136 | flag_NotZ = res; |
137 | flag_N = res; |
138 | WRITE_BYTE_F(adr, res) |
139 | POST_IO |
140 | RET(20) |
141 | } |
142 | |
143 | // ORI |
144 | OPCODE(0x0039) |
145 | { |
146 | u32 adr, res; |
147 | u32 src, dst; |
148 | |
149 | FETCH_BYTE(src); |
150 | FETCH_LONG(adr); |
151 | PRE_IO |
152 | READ_BYTE_F(adr, res) |
153 | res |= src; |
154 | flag_C = 0; |
155 | flag_V = 0; |
156 | flag_NotZ = res; |
157 | flag_N = res; |
158 | WRITE_BYTE_F(adr, res) |
159 | POST_IO |
160 | RET(24) |
161 | } |
162 | |
163 | // ORI |
164 | OPCODE(0x001F) |
165 | { |
166 | u32 adr, res; |
167 | u32 src, dst; |
168 | |
169 | FETCH_BYTE(src); |
170 | adr = AREG(7); |
171 | AREG(7) += 2; |
172 | PRE_IO |
173 | READ_BYTE_F(adr, res) |
174 | res |= src; |
175 | flag_C = 0; |
176 | flag_V = 0; |
177 | flag_NotZ = res; |
178 | flag_N = res; |
179 | WRITE_BYTE_F(adr, res) |
180 | POST_IO |
181 | RET(16) |
182 | } |
183 | |
184 | // ORI |
185 | OPCODE(0x0027) |
186 | { |
187 | u32 adr, res; |
188 | u32 src, dst; |
189 | |
190 | FETCH_BYTE(src); |
191 | adr = AREG(7) - 2; |
192 | AREG(7) = adr; |
193 | PRE_IO |
194 | READ_BYTE_F(adr, res) |
195 | res |= src; |
196 | flag_C = 0; |
197 | flag_V = 0; |
198 | flag_NotZ = res; |
199 | flag_N = res; |
200 | WRITE_BYTE_F(adr, res) |
201 | POST_IO |
202 | RET(18) |
203 | } |
204 | |
205 | // ORI |
206 | OPCODE(0x0040) |
207 | { |
208 | u32 adr, res; |
209 | u32 src, dst; |
210 | |
211 | FETCH_WORD(src); |
212 | res = DREGu16((Opcode >> 0) & 7); |
213 | res |= src; |
214 | flag_C = 0; |
215 | flag_V = 0; |
216 | flag_NotZ = res; |
217 | flag_N = res >> 8; |
218 | DREGu16((Opcode >> 0) & 7) = res; |
219 | RET(8) |
220 | } |
221 | |
222 | // ORI |
223 | OPCODE(0x0050) |
224 | { |
225 | u32 adr, res; |
226 | u32 src, dst; |
227 | |
228 | FETCH_WORD(src); |
229 | adr = AREG((Opcode >> 0) & 7); |
230 | PRE_IO |
231 | READ_WORD_F(adr, res) |
232 | res |= src; |
233 | flag_C = 0; |
234 | flag_V = 0; |
235 | flag_NotZ = res; |
236 | flag_N = res >> 8; |
237 | WRITE_WORD_F(adr, res) |
238 | POST_IO |
239 | RET(16) |
240 | } |
241 | |
242 | // ORI |
243 | OPCODE(0x0058) |
244 | { |
245 | u32 adr, res; |
246 | u32 src, dst; |
247 | |
248 | FETCH_WORD(src); |
249 | adr = AREG((Opcode >> 0) & 7); |
250 | AREG((Opcode >> 0) & 7) += 2; |
251 | PRE_IO |
252 | READ_WORD_F(adr, res) |
253 | res |= src; |
254 | flag_C = 0; |
255 | flag_V = 0; |
256 | flag_NotZ = res; |
257 | flag_N = res >> 8; |
258 | WRITE_WORD_F(adr, res) |
259 | POST_IO |
260 | RET(16) |
261 | } |
262 | |
263 | // ORI |
264 | OPCODE(0x0060) |
265 | { |
266 | u32 adr, res; |
267 | u32 src, dst; |
268 | |
269 | FETCH_WORD(src); |
270 | adr = AREG((Opcode >> 0) & 7) - 2; |
271 | AREG((Opcode >> 0) & 7) = adr; |
272 | PRE_IO |
273 | READ_WORD_F(adr, res) |
274 | res |= src; |
275 | flag_C = 0; |
276 | flag_V = 0; |
277 | flag_NotZ = res; |
278 | flag_N = res >> 8; |
279 | WRITE_WORD_F(adr, res) |
280 | POST_IO |
281 | RET(18) |
282 | } |
283 | |
284 | // ORI |
285 | OPCODE(0x0068) |
286 | { |
287 | u32 adr, res; |
288 | u32 src, dst; |
289 | |
290 | FETCH_WORD(src); |
291 | FETCH_SWORD(adr); |
292 | adr += AREG((Opcode >> 0) & 7); |
293 | PRE_IO |
294 | READ_WORD_F(adr, res) |
295 | res |= src; |
296 | flag_C = 0; |
297 | flag_V = 0; |
298 | flag_NotZ = res; |
299 | flag_N = res >> 8; |
300 | WRITE_WORD_F(adr, res) |
301 | POST_IO |
302 | RET(20) |
303 | } |
304 | |
305 | // ORI |
306 | OPCODE(0x0070) |
307 | { |
308 | u32 adr, res; |
309 | u32 src, dst; |
310 | |
311 | FETCH_WORD(src); |
312 | adr = AREG((Opcode >> 0) & 7); |
313 | DECODE_EXT_WORD |
314 | PRE_IO |
315 | READ_WORD_F(adr, res) |
316 | res |= src; |
317 | flag_C = 0; |
318 | flag_V = 0; |
319 | flag_NotZ = res; |
320 | flag_N = res >> 8; |
321 | WRITE_WORD_F(adr, res) |
322 | POST_IO |
323 | RET(22) |
324 | } |
325 | |
326 | // ORI |
327 | OPCODE(0x0078) |
328 | { |
329 | u32 adr, res; |
330 | u32 src, dst; |
331 | |
332 | FETCH_WORD(src); |
333 | FETCH_SWORD(adr); |
334 | PRE_IO |
335 | READ_WORD_F(adr, res) |
336 | res |= src; |
337 | flag_C = 0; |
338 | flag_V = 0; |
339 | flag_NotZ = res; |
340 | flag_N = res >> 8; |
341 | WRITE_WORD_F(adr, res) |
342 | POST_IO |
343 | RET(20) |
344 | } |
345 | |
346 | // ORI |
347 | OPCODE(0x0079) |
348 | { |
349 | u32 adr, res; |
350 | u32 src, dst; |
351 | |
352 | FETCH_WORD(src); |
353 | FETCH_LONG(adr); |
354 | PRE_IO |
355 | READ_WORD_F(adr, res) |
356 | res |= src; |
357 | flag_C = 0; |
358 | flag_V = 0; |
359 | flag_NotZ = res; |
360 | flag_N = res >> 8; |
361 | WRITE_WORD_F(adr, res) |
362 | POST_IO |
363 | RET(24) |
364 | } |
365 | |
366 | // ORI |
367 | OPCODE(0x005F) |
368 | { |
369 | u32 adr, res; |
370 | u32 src, dst; |
371 | |
372 | FETCH_WORD(src); |
373 | adr = AREG(7); |
374 | AREG(7) += 2; |
375 | PRE_IO |
376 | READ_WORD_F(adr, res) |
377 | res |= src; |
378 | flag_C = 0; |
379 | flag_V = 0; |
380 | flag_NotZ = res; |
381 | flag_N = res >> 8; |
382 | WRITE_WORD_F(adr, res) |
383 | POST_IO |
384 | RET(16) |
385 | } |
386 | |
387 | // ORI |
388 | OPCODE(0x0067) |
389 | { |
390 | u32 adr, res; |
391 | u32 src, dst; |
392 | |
393 | FETCH_WORD(src); |
394 | adr = AREG(7) - 2; |
395 | AREG(7) = adr; |
396 | PRE_IO |
397 | READ_WORD_F(adr, res) |
398 | res |= src; |
399 | flag_C = 0; |
400 | flag_V = 0; |
401 | flag_NotZ = res; |
402 | flag_N = res >> 8; |
403 | WRITE_WORD_F(adr, res) |
404 | POST_IO |
405 | RET(18) |
406 | } |
407 | |
408 | // ORI |
409 | OPCODE(0x0080) |
410 | { |
411 | u32 adr, res; |
412 | u32 src, dst; |
413 | |
414 | FETCH_LONG(src); |
415 | res = DREGu32((Opcode >> 0) & 7); |
416 | res |= src; |
417 | flag_C = 0; |
418 | flag_V = 0; |
419 | flag_NotZ = res; |
420 | flag_N = res >> 24; |
421 | DREGu32((Opcode >> 0) & 7) = res; |
422 | RET(16) |
423 | } |
424 | |
425 | // ORI |
426 | OPCODE(0x0090) |
427 | { |
428 | u32 adr, res; |
429 | u32 src, dst; |
430 | |
431 | FETCH_LONG(src); |
432 | adr = AREG((Opcode >> 0) & 7); |
433 | PRE_IO |
434 | READ_LONG_F(adr, res) |
435 | res |= src; |
436 | flag_C = 0; |
437 | flag_V = 0; |
438 | flag_NotZ = res; |
439 | flag_N = res >> 24; |
440 | WRITE_LONG_F(adr, res) |
441 | POST_IO |
442 | RET(28) |
443 | } |
444 | |
445 | // ORI |
446 | OPCODE(0x0098) |
447 | { |
448 | u32 adr, res; |
449 | u32 src, dst; |
450 | |
451 | FETCH_LONG(src); |
452 | adr = AREG((Opcode >> 0) & 7); |
453 | AREG((Opcode >> 0) & 7) += 4; |
454 | PRE_IO |
455 | READ_LONG_F(adr, res) |
456 | res |= src; |
457 | flag_C = 0; |
458 | flag_V = 0; |
459 | flag_NotZ = res; |
460 | flag_N = res >> 24; |
461 | WRITE_LONG_F(adr, res) |
462 | POST_IO |
463 | RET(28) |
464 | } |
465 | |
466 | // ORI |
467 | OPCODE(0x00A0) |
468 | { |
469 | u32 adr, res; |
470 | u32 src, dst; |
471 | |
472 | FETCH_LONG(src); |
473 | adr = AREG((Opcode >> 0) & 7) - 4; |
474 | AREG((Opcode >> 0) & 7) = adr; |
475 | PRE_IO |
476 | READ_LONG_F(adr, res) |
477 | res |= src; |
478 | flag_C = 0; |
479 | flag_V = 0; |
480 | flag_NotZ = res; |
481 | flag_N = res >> 24; |
482 | WRITE_LONG_F(adr, res) |
483 | POST_IO |
484 | RET(30) |
485 | } |
486 | |
487 | // ORI |
488 | OPCODE(0x00A8) |
489 | { |
490 | u32 adr, res; |
491 | u32 src, dst; |
492 | |
493 | FETCH_LONG(src); |
494 | FETCH_SWORD(adr); |
495 | adr += AREG((Opcode >> 0) & 7); |
496 | PRE_IO |
497 | READ_LONG_F(adr, res) |
498 | res |= src; |
499 | flag_C = 0; |
500 | flag_V = 0; |
501 | flag_NotZ = res; |
502 | flag_N = res >> 24; |
503 | WRITE_LONG_F(adr, res) |
504 | POST_IO |
505 | RET(32) |
506 | } |
507 | |
508 | // ORI |
509 | OPCODE(0x00B0) |
510 | { |
511 | u32 adr, res; |
512 | u32 src, dst; |
513 | |
514 | FETCH_LONG(src); |
515 | adr = AREG((Opcode >> 0) & 7); |
516 | DECODE_EXT_WORD |
517 | PRE_IO |
518 | READ_LONG_F(adr, res) |
519 | res |= src; |
520 | flag_C = 0; |
521 | flag_V = 0; |
522 | flag_NotZ = res; |
523 | flag_N = res >> 24; |
524 | WRITE_LONG_F(adr, res) |
525 | POST_IO |
526 | RET(34) |
527 | } |
528 | |
529 | // ORI |
530 | OPCODE(0x00B8) |
531 | { |
532 | u32 adr, res; |
533 | u32 src, dst; |
534 | |
535 | FETCH_LONG(src); |
536 | FETCH_SWORD(adr); |
537 | PRE_IO |
538 | READ_LONG_F(adr, res) |
539 | res |= src; |
540 | flag_C = 0; |
541 | flag_V = 0; |
542 | flag_NotZ = res; |
543 | flag_N = res >> 24; |
544 | WRITE_LONG_F(adr, res) |
545 | POST_IO |
546 | RET(32) |
547 | } |
548 | |
549 | // ORI |
550 | OPCODE(0x00B9) |
551 | { |
552 | u32 adr, res; |
553 | u32 src, dst; |
554 | |
555 | FETCH_LONG(src); |
556 | FETCH_LONG(adr); |
557 | PRE_IO |
558 | READ_LONG_F(adr, res) |
559 | res |= src; |
560 | flag_C = 0; |
561 | flag_V = 0; |
562 | flag_NotZ = res; |
563 | flag_N = res >> 24; |
564 | WRITE_LONG_F(adr, res) |
565 | POST_IO |
566 | RET(36) |
567 | } |
568 | |
569 | // ORI |
570 | OPCODE(0x009F) |
571 | { |
572 | u32 adr, res; |
573 | u32 src, dst; |
574 | |
575 | FETCH_LONG(src); |
576 | adr = AREG(7); |
577 | AREG(7) += 4; |
578 | PRE_IO |
579 | READ_LONG_F(adr, res) |
580 | res |= src; |
581 | flag_C = 0; |
582 | flag_V = 0; |
583 | flag_NotZ = res; |
584 | flag_N = res >> 24; |
585 | WRITE_LONG_F(adr, res) |
586 | POST_IO |
587 | RET(28) |
588 | } |
589 | |
590 | // ORI |
591 | OPCODE(0x00A7) |
592 | { |
593 | u32 adr, res; |
594 | u32 src, dst; |
595 | |
596 | FETCH_LONG(src); |
597 | adr = AREG(7) - 4; |
598 | AREG(7) = adr; |
599 | PRE_IO |
600 | READ_LONG_F(adr, res) |
601 | res |= src; |
602 | flag_C = 0; |
603 | flag_V = 0; |
604 | flag_NotZ = res; |
605 | flag_N = res >> 24; |
606 | WRITE_LONG_F(adr, res) |
607 | POST_IO |
608 | RET(30) |
609 | } |
610 | |
611 | // ORICCR |
612 | OPCODE(0x003C) |
613 | { |
614 | u32 adr, res; |
615 | u32 src, dst; |
616 | |
617 | FETCH_BYTE(res); |
618 | res &= M68K_CCR_MASK; |
619 | res |= GET_CCR; |
620 | SET_CCR(res) |
621 | RET(20) |
622 | } |
623 | |
624 | // ORISR |
625 | OPCODE(0x007C) |
626 | { |
627 | u32 adr, res; |
628 | u32 src, dst; |
629 | |
630 | if (flag_S) |
631 | { |
632 | u32 res; |
633 | FETCH_WORD(res); |
634 | res &= M68K_SR_MASK; |
635 | res |= GET_SR; |
636 | SET_SR(res) |
637 | CHECK_INT_TO_JUMP(20) |
638 | } |
639 | else |
640 | { |
641 | u32 newPC = (u32)(PC) - BasePC; |
642 | SET_PC(newPC-2); |
643 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
644 | #ifdef USE_CYCLONE_TIMING |
645 | RET(0) |
646 | #else |
647 | RET(4) |
648 | #endif |
649 | } |
650 | RET(20) |
651 | } |
652 | |
653 | // ANDI |
654 | OPCODE(0x0200) |
655 | { |
656 | u32 adr, res; |
657 | u32 src, dst; |
658 | |
659 | FETCH_BYTE(src); |
660 | res = DREGu8((Opcode >> 0) & 7); |
661 | res &= src; |
662 | flag_C = 0; |
663 | flag_V = 0; |
664 | flag_NotZ = res; |
665 | flag_N = res; |
666 | DREGu8((Opcode >> 0) & 7) = res; |
667 | RET(8) |
668 | } |
669 | |
670 | // ANDI |
671 | OPCODE(0x0210) |
672 | { |
673 | u32 adr, res; |
674 | u32 src, dst; |
675 | |
676 | FETCH_BYTE(src); |
677 | adr = AREG((Opcode >> 0) & 7); |
678 | PRE_IO |
679 | READ_BYTE_F(adr, res) |
680 | res &= src; |
681 | flag_C = 0; |
682 | flag_V = 0; |
683 | flag_NotZ = res; |
684 | flag_N = res; |
685 | WRITE_BYTE_F(adr, res) |
686 | POST_IO |
687 | RET(16) |
688 | } |
689 | |
690 | // ANDI |
691 | OPCODE(0x0218) |
692 | { |
693 | u32 adr, res; |
694 | u32 src, dst; |
695 | |
696 | FETCH_BYTE(src); |
697 | adr = AREG((Opcode >> 0) & 7); |
698 | AREG((Opcode >> 0) & 7) += 1; |
699 | PRE_IO |
700 | READ_BYTE_F(adr, res) |
701 | res &= src; |
702 | flag_C = 0; |
703 | flag_V = 0; |
704 | flag_NotZ = res; |
705 | flag_N = res; |
706 | WRITE_BYTE_F(adr, res) |
707 | POST_IO |
708 | RET(16) |
709 | } |
710 | |
711 | // ANDI |
712 | OPCODE(0x0220) |
713 | { |
714 | u32 adr, res; |
715 | u32 src, dst; |
716 | |
717 | FETCH_BYTE(src); |
718 | adr = AREG((Opcode >> 0) & 7) - 1; |
719 | AREG((Opcode >> 0) & 7) = adr; |
720 | PRE_IO |
721 | READ_BYTE_F(adr, res) |
722 | res &= src; |
723 | flag_C = 0; |
724 | flag_V = 0; |
725 | flag_NotZ = res; |
726 | flag_N = res; |
727 | WRITE_BYTE_F(adr, res) |
728 | POST_IO |
729 | RET(18) |
730 | } |
731 | |
732 | // ANDI |
733 | OPCODE(0x0228) |
734 | { |
735 | u32 adr, res; |
736 | u32 src, dst; |
737 | |
738 | FETCH_BYTE(src); |
739 | FETCH_SWORD(adr); |
740 | adr += AREG((Opcode >> 0) & 7); |
741 | PRE_IO |
742 | READ_BYTE_F(adr, res) |
743 | res &= src; |
744 | flag_C = 0; |
745 | flag_V = 0; |
746 | flag_NotZ = res; |
747 | flag_N = res; |
748 | WRITE_BYTE_F(adr, res) |
749 | POST_IO |
750 | RET(20) |
751 | } |
752 | |
753 | // ANDI |
754 | OPCODE(0x0230) |
755 | { |
756 | u32 adr, res; |
757 | u32 src, dst; |
758 | |
759 | FETCH_BYTE(src); |
760 | adr = AREG((Opcode >> 0) & 7); |
761 | DECODE_EXT_WORD |
762 | PRE_IO |
763 | READ_BYTE_F(adr, res) |
764 | res &= src; |
765 | flag_C = 0; |
766 | flag_V = 0; |
767 | flag_NotZ = res; |
768 | flag_N = res; |
769 | WRITE_BYTE_F(adr, res) |
770 | POST_IO |
771 | RET(22) |
772 | } |
773 | |
774 | // ANDI |
775 | OPCODE(0x0238) |
776 | { |
777 | u32 adr, res; |
778 | u32 src, dst; |
779 | |
780 | FETCH_BYTE(src); |
781 | FETCH_SWORD(adr); |
782 | PRE_IO |
783 | READ_BYTE_F(adr, res) |
784 | res &= src; |
785 | flag_C = 0; |
786 | flag_V = 0; |
787 | flag_NotZ = res; |
788 | flag_N = res; |
789 | WRITE_BYTE_F(adr, res) |
790 | POST_IO |
791 | RET(20) |
792 | } |
793 | |
794 | // ANDI |
795 | OPCODE(0x0239) |
796 | { |
797 | u32 adr, res; |
798 | u32 src, dst; |
799 | |
800 | FETCH_BYTE(src); |
801 | FETCH_LONG(adr); |
802 | PRE_IO |
803 | READ_BYTE_F(adr, res) |
804 | res &= src; |
805 | flag_C = 0; |
806 | flag_V = 0; |
807 | flag_NotZ = res; |
808 | flag_N = res; |
809 | WRITE_BYTE_F(adr, res) |
810 | POST_IO |
811 | RET(24) |
812 | } |
813 | |
814 | // ANDI |
815 | OPCODE(0x021F) |
816 | { |
817 | u32 adr, res; |
818 | u32 src, dst; |
819 | |
820 | FETCH_BYTE(src); |
821 | adr = AREG(7); |
822 | AREG(7) += 2; |
823 | PRE_IO |
824 | READ_BYTE_F(adr, res) |
825 | res &= src; |
826 | flag_C = 0; |
827 | flag_V = 0; |
828 | flag_NotZ = res; |
829 | flag_N = res; |
830 | WRITE_BYTE_F(adr, res) |
831 | POST_IO |
832 | RET(16) |
833 | } |
834 | |
835 | // ANDI |
836 | OPCODE(0x0227) |
837 | { |
838 | u32 adr, res; |
839 | u32 src, dst; |
840 | |
841 | FETCH_BYTE(src); |
842 | adr = AREG(7) - 2; |
843 | AREG(7) = adr; |
844 | PRE_IO |
845 | READ_BYTE_F(adr, res) |
846 | res &= src; |
847 | flag_C = 0; |
848 | flag_V = 0; |
849 | flag_NotZ = res; |
850 | flag_N = res; |
851 | WRITE_BYTE_F(adr, res) |
852 | POST_IO |
853 | RET(18) |
854 | } |
855 | |
856 | // ANDI |
857 | OPCODE(0x0240) |
858 | { |
859 | u32 adr, res; |
860 | u32 src, dst; |
861 | |
862 | FETCH_WORD(src); |
863 | res = DREGu16((Opcode >> 0) & 7); |
864 | res &= src; |
865 | flag_C = 0; |
866 | flag_V = 0; |
867 | flag_NotZ = res; |
868 | flag_N = res >> 8; |
869 | DREGu16((Opcode >> 0) & 7) = res; |
870 | RET(8) |
871 | } |
872 | |
873 | // ANDI |
874 | OPCODE(0x0250) |
875 | { |
876 | u32 adr, res; |
877 | u32 src, dst; |
878 | |
879 | FETCH_WORD(src); |
880 | adr = AREG((Opcode >> 0) & 7); |
881 | PRE_IO |
882 | READ_WORD_F(adr, res) |
883 | res &= src; |
884 | flag_C = 0; |
885 | flag_V = 0; |
886 | flag_NotZ = res; |
887 | flag_N = res >> 8; |
888 | WRITE_WORD_F(adr, res) |
889 | POST_IO |
890 | RET(16) |
891 | } |
892 | |
893 | // ANDI |
894 | OPCODE(0x0258) |
895 | { |
896 | u32 adr, res; |
897 | u32 src, dst; |
898 | |
899 | FETCH_WORD(src); |
900 | adr = AREG((Opcode >> 0) & 7); |
901 | AREG((Opcode >> 0) & 7) += 2; |
902 | PRE_IO |
903 | READ_WORD_F(adr, res) |
904 | res &= src; |
905 | flag_C = 0; |
906 | flag_V = 0; |
907 | flag_NotZ = res; |
908 | flag_N = res >> 8; |
909 | WRITE_WORD_F(adr, res) |
910 | POST_IO |
911 | RET(16) |
912 | } |
913 | |
914 | // ANDI |
915 | OPCODE(0x0260) |
916 | { |
917 | u32 adr, res; |
918 | u32 src, dst; |
919 | |
920 | FETCH_WORD(src); |
921 | adr = AREG((Opcode >> 0) & 7) - 2; |
922 | AREG((Opcode >> 0) & 7) = adr; |
923 | PRE_IO |
924 | READ_WORD_F(adr, res) |
925 | res &= src; |
926 | flag_C = 0; |
927 | flag_V = 0; |
928 | flag_NotZ = res; |
929 | flag_N = res >> 8; |
930 | WRITE_WORD_F(adr, res) |
931 | POST_IO |
932 | RET(18) |
933 | } |
934 | |
935 | // ANDI |
936 | OPCODE(0x0268) |
937 | { |
938 | u32 adr, res; |
939 | u32 src, dst; |
940 | |
941 | FETCH_WORD(src); |
942 | FETCH_SWORD(adr); |
943 | adr += AREG((Opcode >> 0) & 7); |
944 | PRE_IO |
945 | READ_WORD_F(adr, res) |
946 | res &= src; |
947 | flag_C = 0; |
948 | flag_V = 0; |
949 | flag_NotZ = res; |
950 | flag_N = res >> 8; |
951 | WRITE_WORD_F(adr, res) |
952 | POST_IO |
953 | RET(20) |
954 | } |
955 | |
956 | // ANDI |
957 | OPCODE(0x0270) |
958 | { |
959 | u32 adr, res; |
960 | u32 src, dst; |
961 | |
962 | FETCH_WORD(src); |
963 | adr = AREG((Opcode >> 0) & 7); |
964 | DECODE_EXT_WORD |
965 | PRE_IO |
966 | READ_WORD_F(adr, res) |
967 | res &= src; |
968 | flag_C = 0; |
969 | flag_V = 0; |
970 | flag_NotZ = res; |
971 | flag_N = res >> 8; |
972 | WRITE_WORD_F(adr, res) |
973 | POST_IO |
974 | RET(22) |
975 | } |
976 | |
977 | // ANDI |
978 | OPCODE(0x0278) |
979 | { |
980 | u32 adr, res; |
981 | u32 src, dst; |
982 | |
983 | FETCH_WORD(src); |
984 | FETCH_SWORD(adr); |
985 | PRE_IO |
986 | READ_WORD_F(adr, res) |
987 | res &= src; |
988 | flag_C = 0; |
989 | flag_V = 0; |
990 | flag_NotZ = res; |
991 | flag_N = res >> 8; |
992 | WRITE_WORD_F(adr, res) |
993 | POST_IO |
994 | RET(20) |
995 | } |
996 | |
997 | // ANDI |
998 | OPCODE(0x0279) |
999 | { |
1000 | u32 adr, res; |
1001 | u32 src, dst; |
1002 | |
1003 | FETCH_WORD(src); |
1004 | FETCH_LONG(adr); |
1005 | PRE_IO |
1006 | READ_WORD_F(adr, res) |
1007 | res &= src; |
1008 | flag_C = 0; |
1009 | flag_V = 0; |
1010 | flag_NotZ = res; |
1011 | flag_N = res >> 8; |
1012 | WRITE_WORD_F(adr, res) |
1013 | POST_IO |
1014 | RET(24) |
1015 | } |
1016 | |
1017 | // ANDI |
1018 | OPCODE(0x025F) |
1019 | { |
1020 | u32 adr, res; |
1021 | u32 src, dst; |
1022 | |
1023 | FETCH_WORD(src); |
1024 | adr = AREG(7); |
1025 | AREG(7) += 2; |
1026 | PRE_IO |
1027 | READ_WORD_F(adr, res) |
1028 | res &= src; |
1029 | flag_C = 0; |
1030 | flag_V = 0; |
1031 | flag_NotZ = res; |
1032 | flag_N = res >> 8; |
1033 | WRITE_WORD_F(adr, res) |
1034 | POST_IO |
1035 | RET(16) |
1036 | } |
1037 | |
1038 | // ANDI |
1039 | OPCODE(0x0267) |
1040 | { |
1041 | u32 adr, res; |
1042 | u32 src, dst; |
1043 | |
1044 | FETCH_WORD(src); |
1045 | adr = AREG(7) - 2; |
1046 | AREG(7) = adr; |
1047 | PRE_IO |
1048 | READ_WORD_F(adr, res) |
1049 | res &= src; |
1050 | flag_C = 0; |
1051 | flag_V = 0; |
1052 | flag_NotZ = res; |
1053 | flag_N = res >> 8; |
1054 | WRITE_WORD_F(adr, res) |
1055 | POST_IO |
1056 | RET(18) |
1057 | } |
1058 | |
1059 | // ANDI |
1060 | OPCODE(0x0280) |
1061 | { |
1062 | u32 adr, res; |
1063 | u32 src, dst; |
1064 | |
1065 | FETCH_LONG(src); |
1066 | res = DREGu32((Opcode >> 0) & 7); |
1067 | res &= src; |
1068 | flag_C = 0; |
1069 | flag_V = 0; |
1070 | flag_NotZ = res; |
1071 | flag_N = res >> 24; |
1072 | DREGu32((Opcode >> 0) & 7) = res; |
1073 | #ifdef USE_CYCLONE_TIMING |
1074 | RET(14) |
1075 | #else |
1076 | RET(16) |
1077 | #endif |
1078 | } |
1079 | |
1080 | // ANDI |
1081 | OPCODE(0x0290) |
1082 | { |
1083 | u32 adr, res; |
1084 | u32 src, dst; |
1085 | |
1086 | FETCH_LONG(src); |
1087 | adr = AREG((Opcode >> 0) & 7); |
1088 | PRE_IO |
1089 | READ_LONG_F(adr, res) |
1090 | res &= src; |
1091 | flag_C = 0; |
1092 | flag_V = 0; |
1093 | flag_NotZ = res; |
1094 | flag_N = res >> 24; |
1095 | WRITE_LONG_F(adr, res) |
1096 | POST_IO |
1097 | RET(28) |
1098 | } |
1099 | |
1100 | // ANDI |
1101 | OPCODE(0x0298) |
1102 | { |
1103 | u32 adr, res; |
1104 | u32 src, dst; |
1105 | |
1106 | FETCH_LONG(src); |
1107 | adr = AREG((Opcode >> 0) & 7); |
1108 | AREG((Opcode >> 0) & 7) += 4; |
1109 | PRE_IO |
1110 | READ_LONG_F(adr, res) |
1111 | res &= src; |
1112 | flag_C = 0; |
1113 | flag_V = 0; |
1114 | flag_NotZ = res; |
1115 | flag_N = res >> 24; |
1116 | WRITE_LONG_F(adr, res) |
1117 | POST_IO |
1118 | RET(28) |
1119 | } |
1120 | |
1121 | // ANDI |
1122 | OPCODE(0x02A0) |
1123 | { |
1124 | u32 adr, res; |
1125 | u32 src, dst; |
1126 | |
1127 | FETCH_LONG(src); |
1128 | adr = AREG((Opcode >> 0) & 7) - 4; |
1129 | AREG((Opcode >> 0) & 7) = adr; |
1130 | PRE_IO |
1131 | READ_LONG_F(adr, res) |
1132 | res &= src; |
1133 | flag_C = 0; |
1134 | flag_V = 0; |
1135 | flag_NotZ = res; |
1136 | flag_N = res >> 24; |
1137 | WRITE_LONG_F(adr, res) |
1138 | POST_IO |
1139 | RET(30) |
1140 | } |
1141 | |
1142 | // ANDI |
1143 | OPCODE(0x02A8) |
1144 | { |
1145 | u32 adr, res; |
1146 | u32 src, dst; |
1147 | |
1148 | FETCH_LONG(src); |
1149 | FETCH_SWORD(adr); |
1150 | adr += AREG((Opcode >> 0) & 7); |
1151 | PRE_IO |
1152 | READ_LONG_F(adr, res) |
1153 | res &= src; |
1154 | flag_C = 0; |
1155 | flag_V = 0; |
1156 | flag_NotZ = res; |
1157 | flag_N = res >> 24; |
1158 | WRITE_LONG_F(adr, res) |
1159 | POST_IO |
1160 | RET(32) |
1161 | } |
1162 | |
1163 | // ANDI |
1164 | OPCODE(0x02B0) |
1165 | { |
1166 | u32 adr, res; |
1167 | u32 src, dst; |
1168 | |
1169 | FETCH_LONG(src); |
1170 | adr = AREG((Opcode >> 0) & 7); |
1171 | DECODE_EXT_WORD |
1172 | PRE_IO |
1173 | READ_LONG_F(adr, res) |
1174 | res &= src; |
1175 | flag_C = 0; |
1176 | flag_V = 0; |
1177 | flag_NotZ = res; |
1178 | flag_N = res >> 24; |
1179 | WRITE_LONG_F(adr, res) |
1180 | POST_IO |
1181 | RET(34) |
1182 | } |
1183 | |
1184 | // ANDI |
1185 | OPCODE(0x02B8) |
1186 | { |
1187 | u32 adr, res; |
1188 | u32 src, dst; |
1189 | |
1190 | FETCH_LONG(src); |
1191 | FETCH_SWORD(adr); |
1192 | PRE_IO |
1193 | READ_LONG_F(adr, res) |
1194 | res &= src; |
1195 | flag_C = 0; |
1196 | flag_V = 0; |
1197 | flag_NotZ = res; |
1198 | flag_N = res >> 24; |
1199 | WRITE_LONG_F(adr, res) |
1200 | POST_IO |
1201 | RET(32) |
1202 | } |
1203 | |
1204 | // ANDI |
1205 | OPCODE(0x02B9) |
1206 | { |
1207 | u32 adr, res; |
1208 | u32 src, dst; |
1209 | |
1210 | FETCH_LONG(src); |
1211 | FETCH_LONG(adr); |
1212 | PRE_IO |
1213 | READ_LONG_F(adr, res) |
1214 | res &= src; |
1215 | flag_C = 0; |
1216 | flag_V = 0; |
1217 | flag_NotZ = res; |
1218 | flag_N = res >> 24; |
1219 | WRITE_LONG_F(adr, res) |
1220 | POST_IO |
1221 | RET(36) |
1222 | } |
1223 | |
1224 | // ANDI |
1225 | OPCODE(0x029F) |
1226 | { |
1227 | u32 adr, res; |
1228 | u32 src, dst; |
1229 | |
1230 | FETCH_LONG(src); |
1231 | adr = AREG(7); |
1232 | AREG(7) += 4; |
1233 | PRE_IO |
1234 | READ_LONG_F(adr, res) |
1235 | res &= src; |
1236 | flag_C = 0; |
1237 | flag_V = 0; |
1238 | flag_NotZ = res; |
1239 | flag_N = res >> 24; |
1240 | WRITE_LONG_F(adr, res) |
1241 | POST_IO |
1242 | RET(28) |
1243 | } |
1244 | |
1245 | // ANDI |
1246 | OPCODE(0x02A7) |
1247 | { |
1248 | u32 adr, res; |
1249 | u32 src, dst; |
1250 | |
1251 | FETCH_LONG(src); |
1252 | adr = AREG(7) - 4; |
1253 | AREG(7) = adr; |
1254 | PRE_IO |
1255 | READ_LONG_F(adr, res) |
1256 | res &= src; |
1257 | flag_C = 0; |
1258 | flag_V = 0; |
1259 | flag_NotZ = res; |
1260 | flag_N = res >> 24; |
1261 | WRITE_LONG_F(adr, res) |
1262 | POST_IO |
1263 | RET(30) |
1264 | } |
1265 | |
1266 | // ANDICCR |
1267 | OPCODE(0x023C) |
1268 | { |
1269 | u32 adr, res; |
1270 | u32 src, dst; |
1271 | |
1272 | FETCH_BYTE(res); |
1273 | res &= M68K_CCR_MASK; |
1274 | res &= GET_CCR; |
1275 | SET_CCR(res) |
1276 | RET(20) |
1277 | } |
1278 | |
1279 | // ANDISR |
1280 | OPCODE(0x027C) |
1281 | { |
1282 | u32 adr, res; |
1283 | u32 src, dst; |
1284 | |
1285 | if (flag_S) |
1286 | { |
1287 | FETCH_WORD(res); |
1288 | res &= M68K_SR_MASK; |
1289 | res &= GET_SR; |
1290 | SET_SR(res) |
1291 | if (!flag_S) |
1292 | { |
1293 | res = AREG(7); |
1294 | AREG(7) = ASP; |
1295 | ASP = res; |
1296 | } |
1297 | CHECK_INT_TO_JUMP(20) |
1298 | } |
1299 | else |
1300 | { |
1301 | u32 newPC = (u32)(PC) - BasePC; |
1302 | SET_PC(newPC-2); |
1303 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
1304 | RET(4) |
1305 | } |
1306 | RET(20) |
1307 | } |
1308 | |
1309 | // EORI |
1310 | OPCODE(0x0A00) |
1311 | { |
1312 | u32 adr, res; |
1313 | u32 src, dst; |
1314 | |
1315 | FETCH_BYTE(src); |
1316 | res = DREGu8((Opcode >> 0) & 7); |
1317 | res ^= src; |
1318 | flag_C = 0; |
1319 | flag_V = 0; |
1320 | flag_NotZ = res; |
1321 | flag_N = res; |
1322 | DREGu8((Opcode >> 0) & 7) = res; |
1323 | RET(8) |
1324 | } |
1325 | |
1326 | // EORI |
1327 | OPCODE(0x0A10) |
1328 | { |
1329 | u32 adr, res; |
1330 | u32 src, dst; |
1331 | |
1332 | FETCH_BYTE(src); |
1333 | adr = AREG((Opcode >> 0) & 7); |
1334 | PRE_IO |
1335 | READ_BYTE_F(adr, res) |
1336 | res ^= src; |
1337 | flag_C = 0; |
1338 | flag_V = 0; |
1339 | flag_NotZ = res; |
1340 | flag_N = res; |
1341 | WRITE_BYTE_F(adr, res) |
1342 | POST_IO |
1343 | RET(16) |
1344 | } |
1345 | |
1346 | // EORI |
1347 | OPCODE(0x0A18) |
1348 | { |
1349 | u32 adr, res; |
1350 | u32 src, dst; |
1351 | |
1352 | FETCH_BYTE(src); |
1353 | adr = AREG((Opcode >> 0) & 7); |
1354 | AREG((Opcode >> 0) & 7) += 1; |
1355 | PRE_IO |
1356 | READ_BYTE_F(adr, res) |
1357 | res ^= src; |
1358 | flag_C = 0; |
1359 | flag_V = 0; |
1360 | flag_NotZ = res; |
1361 | flag_N = res; |
1362 | WRITE_BYTE_F(adr, res) |
1363 | POST_IO |
1364 | RET(16) |
1365 | } |
1366 | |
1367 | // EORI |
1368 | OPCODE(0x0A20) |
1369 | { |
1370 | u32 adr, res; |
1371 | u32 src, dst; |
1372 | |
1373 | FETCH_BYTE(src); |
1374 | adr = AREG((Opcode >> 0) & 7) - 1; |
1375 | AREG((Opcode >> 0) & 7) = adr; |
1376 | PRE_IO |
1377 | READ_BYTE_F(adr, res) |
1378 | res ^= src; |
1379 | flag_C = 0; |
1380 | flag_V = 0; |
1381 | flag_NotZ = res; |
1382 | flag_N = res; |
1383 | WRITE_BYTE_F(adr, res) |
1384 | POST_IO |
1385 | RET(18) |
1386 | } |
1387 | |
1388 | // EORI |
1389 | OPCODE(0x0A28) |
1390 | { |
1391 | u32 adr, res; |
1392 | u32 src, dst; |
1393 | |
1394 | FETCH_BYTE(src); |
1395 | FETCH_SWORD(adr); |
1396 | adr += AREG((Opcode >> 0) & 7); |
1397 | PRE_IO |
1398 | READ_BYTE_F(adr, res) |
1399 | res ^= src; |
1400 | flag_C = 0; |
1401 | flag_V = 0; |
1402 | flag_NotZ = res; |
1403 | flag_N = res; |
1404 | WRITE_BYTE_F(adr, res) |
1405 | POST_IO |
1406 | RET(20) |
1407 | } |
1408 | |
1409 | // EORI |
1410 | OPCODE(0x0A30) |
1411 | { |
1412 | u32 adr, res; |
1413 | u32 src, dst; |
1414 | |
1415 | FETCH_BYTE(src); |
1416 | adr = AREG((Opcode >> 0) & 7); |
1417 | DECODE_EXT_WORD |
1418 | PRE_IO |
1419 | READ_BYTE_F(adr, res) |
1420 | res ^= src; |
1421 | flag_C = 0; |
1422 | flag_V = 0; |
1423 | flag_NotZ = res; |
1424 | flag_N = res; |
1425 | WRITE_BYTE_F(adr, res) |
1426 | POST_IO |
1427 | RET(22) |
1428 | } |
1429 | |
1430 | // EORI |
1431 | OPCODE(0x0A38) |
1432 | { |
1433 | u32 adr, res; |
1434 | u32 src, dst; |
1435 | |
1436 | FETCH_BYTE(src); |
1437 | FETCH_SWORD(adr); |
1438 | PRE_IO |
1439 | READ_BYTE_F(adr, res) |
1440 | res ^= src; |
1441 | flag_C = 0; |
1442 | flag_V = 0; |
1443 | flag_NotZ = res; |
1444 | flag_N = res; |
1445 | WRITE_BYTE_F(adr, res) |
1446 | POST_IO |
1447 | RET(20) |
1448 | } |
1449 | |
1450 | // EORI |
1451 | OPCODE(0x0A39) |
1452 | { |
1453 | u32 adr, res; |
1454 | u32 src, dst; |
1455 | |
1456 | FETCH_BYTE(src); |
1457 | FETCH_LONG(adr); |
1458 | PRE_IO |
1459 | READ_BYTE_F(adr, res) |
1460 | res ^= src; |
1461 | flag_C = 0; |
1462 | flag_V = 0; |
1463 | flag_NotZ = res; |
1464 | flag_N = res; |
1465 | WRITE_BYTE_F(adr, res) |
1466 | POST_IO |
1467 | RET(24) |
1468 | } |
1469 | |
1470 | // EORI |
1471 | OPCODE(0x0A1F) |
1472 | { |
1473 | u32 adr, res; |
1474 | u32 src, dst; |
1475 | |
1476 | FETCH_BYTE(src); |
1477 | adr = AREG(7); |
1478 | AREG(7) += 2; |
1479 | PRE_IO |
1480 | READ_BYTE_F(adr, res) |
1481 | res ^= src; |
1482 | flag_C = 0; |
1483 | flag_V = 0; |
1484 | flag_NotZ = res; |
1485 | flag_N = res; |
1486 | WRITE_BYTE_F(adr, res) |
1487 | POST_IO |
1488 | RET(16) |
1489 | } |
1490 | |
1491 | // EORI |
1492 | OPCODE(0x0A27) |
1493 | { |
1494 | u32 adr, res; |
1495 | u32 src, dst; |
1496 | |
1497 | FETCH_BYTE(src); |
1498 | adr = AREG(7) - 2; |
1499 | AREG(7) = adr; |
1500 | PRE_IO |
1501 | READ_BYTE_F(adr, res) |
1502 | res ^= src; |
1503 | flag_C = 0; |
1504 | flag_V = 0; |
1505 | flag_NotZ = res; |
1506 | flag_N = res; |
1507 | WRITE_BYTE_F(adr, res) |
1508 | POST_IO |
1509 | RET(18) |
1510 | } |
1511 | |
1512 | // EORI |
1513 | OPCODE(0x0A40) |
1514 | { |
1515 | u32 adr, res; |
1516 | u32 src, dst; |
1517 | |
1518 | FETCH_WORD(src); |
1519 | res = DREGu16((Opcode >> 0) & 7); |
1520 | res ^= src; |
1521 | flag_C = 0; |
1522 | flag_V = 0; |
1523 | flag_NotZ = res; |
1524 | flag_N = res >> 8; |
1525 | DREGu16((Opcode >> 0) & 7) = res; |
1526 | RET(8) |
1527 | } |
1528 | |
1529 | // EORI |
1530 | OPCODE(0x0A50) |
1531 | { |
1532 | u32 adr, res; |
1533 | u32 src, dst; |
1534 | |
1535 | FETCH_WORD(src); |
1536 | adr = AREG((Opcode >> 0) & 7); |
1537 | PRE_IO |
1538 | READ_WORD_F(adr, res) |
1539 | res ^= src; |
1540 | flag_C = 0; |
1541 | flag_V = 0; |
1542 | flag_NotZ = res; |
1543 | flag_N = res >> 8; |
1544 | WRITE_WORD_F(adr, res) |
1545 | POST_IO |
1546 | RET(16) |
1547 | } |
1548 | |
1549 | // EORI |
1550 | OPCODE(0x0A58) |
1551 | { |
1552 | u32 adr, res; |
1553 | u32 src, dst; |
1554 | |
1555 | FETCH_WORD(src); |
1556 | adr = AREG((Opcode >> 0) & 7); |
1557 | AREG((Opcode >> 0) & 7) += 2; |
1558 | PRE_IO |
1559 | READ_WORD_F(adr, res) |
1560 | res ^= src; |
1561 | flag_C = 0; |
1562 | flag_V = 0; |
1563 | flag_NotZ = res; |
1564 | flag_N = res >> 8; |
1565 | WRITE_WORD_F(adr, res) |
1566 | POST_IO |
1567 | RET(16) |
1568 | } |
1569 | |
1570 | // EORI |
1571 | OPCODE(0x0A60) |
1572 | { |
1573 | u32 adr, res; |
1574 | u32 src, dst; |
1575 | |
1576 | FETCH_WORD(src); |
1577 | adr = AREG((Opcode >> 0) & 7) - 2; |
1578 | AREG((Opcode >> 0) & 7) = adr; |
1579 | PRE_IO |
1580 | READ_WORD_F(adr, res) |
1581 | res ^= src; |
1582 | flag_C = 0; |
1583 | flag_V = 0; |
1584 | flag_NotZ = res; |
1585 | flag_N = res >> 8; |
1586 | WRITE_WORD_F(adr, res) |
1587 | POST_IO |
1588 | RET(18) |
1589 | } |
1590 | |
1591 | // EORI |
1592 | OPCODE(0x0A68) |
1593 | { |
1594 | u32 adr, res; |
1595 | u32 src, dst; |
1596 | |
1597 | FETCH_WORD(src); |
1598 | FETCH_SWORD(adr); |
1599 | adr += AREG((Opcode >> 0) & 7); |
1600 | PRE_IO |
1601 | READ_WORD_F(adr, res) |
1602 | res ^= src; |
1603 | flag_C = 0; |
1604 | flag_V = 0; |
1605 | flag_NotZ = res; |
1606 | flag_N = res >> 8; |
1607 | WRITE_WORD_F(adr, res) |
1608 | POST_IO |
1609 | RET(20) |
1610 | } |
1611 | |
1612 | // EORI |
1613 | OPCODE(0x0A70) |
1614 | { |
1615 | u32 adr, res; |
1616 | u32 src, dst; |
1617 | |
1618 | FETCH_WORD(src); |
1619 | adr = AREG((Opcode >> 0) & 7); |
1620 | DECODE_EXT_WORD |
1621 | PRE_IO |
1622 | READ_WORD_F(adr, res) |
1623 | res ^= src; |
1624 | flag_C = 0; |
1625 | flag_V = 0; |
1626 | flag_NotZ = res; |
1627 | flag_N = res >> 8; |
1628 | WRITE_WORD_F(adr, res) |
1629 | POST_IO |
1630 | RET(22) |
1631 | } |
1632 | |
1633 | // EORI |
1634 | OPCODE(0x0A78) |
1635 | { |
1636 | u32 adr, res; |
1637 | u32 src, dst; |
1638 | |
1639 | FETCH_WORD(src); |
1640 | FETCH_SWORD(adr); |
1641 | PRE_IO |
1642 | READ_WORD_F(adr, res) |
1643 | res ^= src; |
1644 | flag_C = 0; |
1645 | flag_V = 0; |
1646 | flag_NotZ = res; |
1647 | flag_N = res >> 8; |
1648 | WRITE_WORD_F(adr, res) |
1649 | POST_IO |
1650 | RET(20) |
1651 | } |
1652 | |
1653 | // EORI |
1654 | OPCODE(0x0A79) |
1655 | { |
1656 | u32 adr, res; |
1657 | u32 src, dst; |
1658 | |
1659 | FETCH_WORD(src); |
1660 | FETCH_LONG(adr); |
1661 | PRE_IO |
1662 | READ_WORD_F(adr, res) |
1663 | res ^= src; |
1664 | flag_C = 0; |
1665 | flag_V = 0; |
1666 | flag_NotZ = res; |
1667 | flag_N = res >> 8; |
1668 | WRITE_WORD_F(adr, res) |
1669 | POST_IO |
1670 | RET(24) |
1671 | } |
1672 | |
1673 | // EORI |
1674 | OPCODE(0x0A5F) |
1675 | { |
1676 | u32 adr, res; |
1677 | u32 src, dst; |
1678 | |
1679 | FETCH_WORD(src); |
1680 | adr = AREG(7); |
1681 | AREG(7) += 2; |
1682 | PRE_IO |
1683 | READ_WORD_F(adr, res) |
1684 | res ^= src; |
1685 | flag_C = 0; |
1686 | flag_V = 0; |
1687 | flag_NotZ = res; |
1688 | flag_N = res >> 8; |
1689 | WRITE_WORD_F(adr, res) |
1690 | POST_IO |
1691 | RET(16) |
1692 | } |
1693 | |
1694 | // EORI |
1695 | OPCODE(0x0A67) |
1696 | { |
1697 | u32 adr, res; |
1698 | u32 src, dst; |
1699 | |
1700 | FETCH_WORD(src); |
1701 | adr = AREG(7) - 2; |
1702 | AREG(7) = adr; |
1703 | PRE_IO |
1704 | READ_WORD_F(adr, res) |
1705 | res ^= src; |
1706 | flag_C = 0; |
1707 | flag_V = 0; |
1708 | flag_NotZ = res; |
1709 | flag_N = res >> 8; |
1710 | WRITE_WORD_F(adr, res) |
1711 | POST_IO |
1712 | RET(18) |
1713 | } |
1714 | |
1715 | // EORI |
1716 | OPCODE(0x0A80) |
1717 | { |
1718 | u32 adr, res; |
1719 | u32 src, dst; |
1720 | |
1721 | FETCH_LONG(src); |
1722 | res = DREGu32((Opcode >> 0) & 7); |
1723 | res ^= src; |
1724 | flag_C = 0; |
1725 | flag_V = 0; |
1726 | flag_NotZ = res; |
1727 | flag_N = res >> 24; |
1728 | DREGu32((Opcode >> 0) & 7) = res; |
1729 | RET(16) |
1730 | } |
1731 | |
1732 | // EORI |
1733 | OPCODE(0x0A90) |
1734 | { |
1735 | u32 adr, res; |
1736 | u32 src, dst; |
1737 | |
1738 | FETCH_LONG(src); |
1739 | adr = AREG((Opcode >> 0) & 7); |
1740 | PRE_IO |
1741 | READ_LONG_F(adr, res) |
1742 | res ^= src; |
1743 | flag_C = 0; |
1744 | flag_V = 0; |
1745 | flag_NotZ = res; |
1746 | flag_N = res >> 24; |
1747 | WRITE_LONG_F(adr, res) |
1748 | POST_IO |
1749 | RET(28) |
1750 | } |
1751 | |
1752 | // EORI |
1753 | OPCODE(0x0A98) |
1754 | { |
1755 | u32 adr, res; |
1756 | u32 src, dst; |
1757 | |
1758 | FETCH_LONG(src); |
1759 | adr = AREG((Opcode >> 0) & 7); |
1760 | AREG((Opcode >> 0) & 7) += 4; |
1761 | PRE_IO |
1762 | READ_LONG_F(adr, res) |
1763 | res ^= src; |
1764 | flag_C = 0; |
1765 | flag_V = 0; |
1766 | flag_NotZ = res; |
1767 | flag_N = res >> 24; |
1768 | WRITE_LONG_F(adr, res) |
1769 | POST_IO |
1770 | RET(28) |
1771 | } |
1772 | |
1773 | // EORI |
1774 | OPCODE(0x0AA0) |
1775 | { |
1776 | u32 adr, res; |
1777 | u32 src, dst; |
1778 | |
1779 | FETCH_LONG(src); |
1780 | adr = AREG((Opcode >> 0) & 7) - 4; |
1781 | AREG((Opcode >> 0) & 7) = adr; |
1782 | PRE_IO |
1783 | READ_LONG_F(adr, res) |
1784 | res ^= src; |
1785 | flag_C = 0; |
1786 | flag_V = 0; |
1787 | flag_NotZ = res; |
1788 | flag_N = res >> 24; |
1789 | WRITE_LONG_F(adr, res) |
1790 | POST_IO |
1791 | RET(30) |
1792 | } |
1793 | |
1794 | // EORI |
1795 | OPCODE(0x0AA8) |
1796 | { |
1797 | u32 adr, res; |
1798 | u32 src, dst; |
1799 | |
1800 | FETCH_LONG(src); |
1801 | FETCH_SWORD(adr); |
1802 | adr += AREG((Opcode >> 0) & 7); |
1803 | PRE_IO |
1804 | READ_LONG_F(adr, res) |
1805 | res ^= src; |
1806 | flag_C = 0; |
1807 | flag_V = 0; |
1808 | flag_NotZ = res; |
1809 | flag_N = res >> 24; |
1810 | WRITE_LONG_F(adr, res) |
1811 | POST_IO |
1812 | RET(32) |
1813 | } |
1814 | |
1815 | // EORI |
1816 | OPCODE(0x0AB0) |
1817 | { |
1818 | u32 adr, res; |
1819 | u32 src, dst; |
1820 | |
1821 | FETCH_LONG(src); |
1822 | adr = AREG((Opcode >> 0) & 7); |
1823 | DECODE_EXT_WORD |
1824 | PRE_IO |
1825 | READ_LONG_F(adr, res) |
1826 | res ^= src; |
1827 | flag_C = 0; |
1828 | flag_V = 0; |
1829 | flag_NotZ = res; |
1830 | flag_N = res >> 24; |
1831 | WRITE_LONG_F(adr, res) |
1832 | POST_IO |
1833 | RET(34) |
1834 | } |
1835 | |
1836 | // EORI |
1837 | OPCODE(0x0AB8) |
1838 | { |
1839 | u32 adr, res; |
1840 | u32 src, dst; |
1841 | |
1842 | FETCH_LONG(src); |
1843 | FETCH_SWORD(adr); |
1844 | PRE_IO |
1845 | READ_LONG_F(adr, res) |
1846 | res ^= src; |
1847 | flag_C = 0; |
1848 | flag_V = 0; |
1849 | flag_NotZ = res; |
1850 | flag_N = res >> 24; |
1851 | WRITE_LONG_F(adr, res) |
1852 | POST_IO |
1853 | RET(32) |
1854 | } |
1855 | |
1856 | // EORI |
1857 | OPCODE(0x0AB9) |
1858 | { |
1859 | u32 adr, res; |
1860 | u32 src, dst; |
1861 | |
1862 | FETCH_LONG(src); |
1863 | FETCH_LONG(adr); |
1864 | PRE_IO |
1865 | READ_LONG_F(adr, res) |
1866 | res ^= src; |
1867 | flag_C = 0; |
1868 | flag_V = 0; |
1869 | flag_NotZ = res; |
1870 | flag_N = res >> 24; |
1871 | WRITE_LONG_F(adr, res) |
1872 | POST_IO |
1873 | RET(36) |
1874 | } |
1875 | |
1876 | // EORI |
1877 | OPCODE(0x0A9F) |
1878 | { |
1879 | u32 adr, res; |
1880 | u32 src, dst; |
1881 | |
1882 | FETCH_LONG(src); |
1883 | adr = AREG(7); |
1884 | AREG(7) += 4; |
1885 | PRE_IO |
1886 | READ_LONG_F(adr, res) |
1887 | res ^= src; |
1888 | flag_C = 0; |
1889 | flag_V = 0; |
1890 | flag_NotZ = res; |
1891 | flag_N = res >> 24; |
1892 | WRITE_LONG_F(adr, res) |
1893 | POST_IO |
1894 | RET(28) |
1895 | } |
1896 | |
1897 | // EORI |
1898 | OPCODE(0x0AA7) |
1899 | { |
1900 | u32 adr, res; |
1901 | u32 src, dst; |
1902 | |
1903 | FETCH_LONG(src); |
1904 | adr = AREG(7) - 4; |
1905 | AREG(7) = adr; |
1906 | PRE_IO |
1907 | READ_LONG_F(adr, res) |
1908 | res ^= src; |
1909 | flag_C = 0; |
1910 | flag_V = 0; |
1911 | flag_NotZ = res; |
1912 | flag_N = res >> 24; |
1913 | WRITE_LONG_F(adr, res) |
1914 | POST_IO |
1915 | RET(30) |
1916 | } |
1917 | |
1918 | // EORICCR |
1919 | OPCODE(0x0A3C) |
1920 | { |
1921 | u32 adr, res; |
1922 | u32 src, dst; |
1923 | |
1924 | FETCH_BYTE(res); |
1925 | res &= M68K_CCR_MASK; |
1926 | res ^= GET_CCR; |
1927 | SET_CCR(res) |
1928 | RET(20) |
1929 | } |
1930 | |
1931 | // EORISR |
1932 | OPCODE(0x0A7C) |
1933 | { |
1934 | u32 adr, res; |
1935 | u32 src, dst; |
1936 | |
1937 | if (flag_S) |
1938 | { |
1939 | FETCH_WORD(res); |
1940 | res &= M68K_SR_MASK; |
1941 | res ^= GET_SR; |
1942 | SET_SR(res) |
1943 | if (!flag_S) |
1944 | { |
1945 | res = AREG(7); |
1946 | AREG(7) = ASP; |
1947 | ASP = res; |
1948 | } |
1949 | CHECK_INT_TO_JUMP(20) |
1950 | } |
1951 | else |
1952 | { |
1953 | u32 newPC = (u32)(PC) - BasePC; |
1954 | SET_PC(newPC-2); |
1955 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
1956 | RET(4) |
1957 | } |
1958 | RET(20) |
1959 | } |
1960 | |
1961 | // SUBI |
1962 | OPCODE(0x0400) |
1963 | { |
1964 | u32 adr, res; |
1965 | u32 src, dst; |
1966 | |
1967 | FETCH_BYTE(src); |
1968 | dst = DREGu8((Opcode >> 0) & 7); |
1969 | res = dst - src; |
1970 | flag_N = flag_X = flag_C = res; |
1971 | flag_V = (src ^ dst) & (res ^ dst); |
1972 | flag_NotZ = res & 0xFF; |
1973 | DREGu8((Opcode >> 0) & 7) = res; |
1974 | RET(8) |
1975 | } |
1976 | |
1977 | // SUBI |
1978 | OPCODE(0x0410) |
1979 | { |
1980 | u32 adr, res; |
1981 | u32 src, dst; |
1982 | |
1983 | FETCH_BYTE(src); |
1984 | adr = AREG((Opcode >> 0) & 7); |
1985 | PRE_IO |
1986 | READ_BYTE_F(adr, dst) |
1987 | res = dst - src; |
1988 | flag_N = flag_X = flag_C = res; |
1989 | flag_V = (src ^ dst) & (res ^ dst); |
1990 | flag_NotZ = res & 0xFF; |
1991 | WRITE_BYTE_F(adr, res) |
1992 | POST_IO |
1993 | RET(16) |
1994 | } |
1995 | |
1996 | // SUBI |
1997 | OPCODE(0x0418) |
1998 | { |
1999 | u32 adr, res; |
2000 | u32 src, dst; |
2001 | |
2002 | FETCH_BYTE(src); |
2003 | adr = AREG((Opcode >> 0) & 7); |
2004 | AREG((Opcode >> 0) & 7) += 1; |
2005 | PRE_IO |
2006 | READ_BYTE_F(adr, dst) |
2007 | res = dst - src; |
2008 | flag_N = flag_X = flag_C = res; |
2009 | flag_V = (src ^ dst) & (res ^ dst); |
2010 | flag_NotZ = res & 0xFF; |
2011 | WRITE_BYTE_F(adr, res) |
2012 | POST_IO |
2013 | RET(16) |
2014 | } |
2015 | |
2016 | // SUBI |
2017 | OPCODE(0x0420) |
2018 | { |
2019 | u32 adr, res; |
2020 | u32 src, dst; |
2021 | |
2022 | FETCH_BYTE(src); |
2023 | adr = AREG((Opcode >> 0) & 7) - 1; |
2024 | AREG((Opcode >> 0) & 7) = adr; |
2025 | PRE_IO |
2026 | READ_BYTE_F(adr, dst) |
2027 | res = dst - src; |
2028 | flag_N = flag_X = flag_C = res; |
2029 | flag_V = (src ^ dst) & (res ^ dst); |
2030 | flag_NotZ = res & 0xFF; |
2031 | WRITE_BYTE_F(adr, res) |
2032 | POST_IO |
2033 | RET(18) |
2034 | } |
2035 | |
2036 | // SUBI |
2037 | OPCODE(0x0428) |
2038 | { |
2039 | u32 adr, res; |
2040 | u32 src, dst; |
2041 | |
2042 | FETCH_BYTE(src); |
2043 | FETCH_SWORD(adr); |
2044 | adr += AREG((Opcode >> 0) & 7); |
2045 | PRE_IO |
2046 | READ_BYTE_F(adr, dst) |
2047 | res = dst - src; |
2048 | flag_N = flag_X = flag_C = res; |
2049 | flag_V = (src ^ dst) & (res ^ dst); |
2050 | flag_NotZ = res & 0xFF; |
2051 | WRITE_BYTE_F(adr, res) |
2052 | POST_IO |
2053 | RET(20) |
2054 | } |
2055 | |
2056 | // SUBI |
2057 | OPCODE(0x0430) |
2058 | { |
2059 | u32 adr, res; |
2060 | u32 src, dst; |
2061 | |
2062 | FETCH_BYTE(src); |
2063 | adr = AREG((Opcode >> 0) & 7); |
2064 | DECODE_EXT_WORD |
2065 | PRE_IO |
2066 | READ_BYTE_F(adr, dst) |
2067 | res = dst - src; |
2068 | flag_N = flag_X = flag_C = res; |
2069 | flag_V = (src ^ dst) & (res ^ dst); |
2070 | flag_NotZ = res & 0xFF; |
2071 | WRITE_BYTE_F(adr, res) |
2072 | POST_IO |
2073 | RET(22) |
2074 | } |
2075 | |
2076 | // SUBI |
2077 | OPCODE(0x0438) |
2078 | { |
2079 | u32 adr, res; |
2080 | u32 src, dst; |
2081 | |
2082 | FETCH_BYTE(src); |
2083 | FETCH_SWORD(adr); |
2084 | PRE_IO |
2085 | READ_BYTE_F(adr, dst) |
2086 | res = dst - src; |
2087 | flag_N = flag_X = flag_C = res; |
2088 | flag_V = (src ^ dst) & (res ^ dst); |
2089 | flag_NotZ = res & 0xFF; |
2090 | WRITE_BYTE_F(adr, res) |
2091 | POST_IO |
2092 | RET(20) |
2093 | } |
2094 | |
2095 | // SUBI |
2096 | OPCODE(0x0439) |
2097 | { |
2098 | u32 adr, res; |
2099 | u32 src, dst; |
2100 | |
2101 | FETCH_BYTE(src); |
2102 | FETCH_LONG(adr); |
2103 | PRE_IO |
2104 | READ_BYTE_F(adr, dst) |
2105 | res = dst - src; |
2106 | flag_N = flag_X = flag_C = res; |
2107 | flag_V = (src ^ dst) & (res ^ dst); |
2108 | flag_NotZ = res & 0xFF; |
2109 | WRITE_BYTE_F(adr, res) |
2110 | POST_IO |
2111 | RET(24) |
2112 | } |
2113 | |
2114 | // SUBI |
2115 | OPCODE(0x041F) |
2116 | { |
2117 | u32 adr, res; |
2118 | u32 src, dst; |
2119 | |
2120 | FETCH_BYTE(src); |
2121 | adr = AREG(7); |
2122 | AREG(7) += 2; |
2123 | PRE_IO |
2124 | READ_BYTE_F(adr, dst) |
2125 | res = dst - src; |
2126 | flag_N = flag_X = flag_C = res; |
2127 | flag_V = (src ^ dst) & (res ^ dst); |
2128 | flag_NotZ = res & 0xFF; |
2129 | WRITE_BYTE_F(adr, res) |
2130 | POST_IO |
2131 | RET(16) |
2132 | } |
2133 | |
2134 | // SUBI |
2135 | OPCODE(0x0427) |
2136 | { |
2137 | u32 adr, res; |
2138 | u32 src, dst; |
2139 | |
2140 | FETCH_BYTE(src); |
2141 | adr = AREG(7) - 2; |
2142 | AREG(7) = adr; |
2143 | PRE_IO |
2144 | READ_BYTE_F(adr, dst) |
2145 | res = dst - src; |
2146 | flag_N = flag_X = flag_C = res; |
2147 | flag_V = (src ^ dst) & (res ^ dst); |
2148 | flag_NotZ = res & 0xFF; |
2149 | WRITE_BYTE_F(adr, res) |
2150 | POST_IO |
2151 | RET(18) |
2152 | } |
2153 | |
2154 | // SUBI |
2155 | OPCODE(0x0440) |
2156 | { |
2157 | u32 adr, res; |
2158 | u32 src, dst; |
2159 | |
2160 | FETCH_WORD(src); |
2161 | dst = DREGu16((Opcode >> 0) & 7); |
2162 | res = dst - src; |
2163 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2164 | flag_N = flag_X = flag_C = res >> 8; |
2165 | flag_NotZ = res & 0xFFFF; |
2166 | DREGu16((Opcode >> 0) & 7) = res; |
2167 | RET(8) |
2168 | } |
2169 | |
2170 | // SUBI |
2171 | OPCODE(0x0450) |
2172 | { |
2173 | u32 adr, res; |
2174 | u32 src, dst; |
2175 | |
2176 | FETCH_WORD(src); |
2177 | adr = AREG((Opcode >> 0) & 7); |
2178 | PRE_IO |
2179 | READ_WORD_F(adr, dst) |
2180 | res = dst - src; |
2181 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2182 | flag_N = flag_X = flag_C = res >> 8; |
2183 | flag_NotZ = res & 0xFFFF; |
2184 | WRITE_WORD_F(adr, res) |
2185 | POST_IO |
2186 | RET(16) |
2187 | } |
2188 | |
2189 | // SUBI |
2190 | OPCODE(0x0458) |
2191 | { |
2192 | u32 adr, res; |
2193 | u32 src, dst; |
2194 | |
2195 | FETCH_WORD(src); |
2196 | adr = AREG((Opcode >> 0) & 7); |
2197 | AREG((Opcode >> 0) & 7) += 2; |
2198 | PRE_IO |
2199 | READ_WORD_F(adr, dst) |
2200 | res = dst - src; |
2201 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2202 | flag_N = flag_X = flag_C = res >> 8; |
2203 | flag_NotZ = res & 0xFFFF; |
2204 | WRITE_WORD_F(adr, res) |
2205 | POST_IO |
2206 | RET(16) |
2207 | } |
2208 | |
2209 | // SUBI |
2210 | OPCODE(0x0460) |
2211 | { |
2212 | u32 adr, res; |
2213 | u32 src, dst; |
2214 | |
2215 | FETCH_WORD(src); |
2216 | adr = AREG((Opcode >> 0) & 7) - 2; |
2217 | AREG((Opcode >> 0) & 7) = adr; |
2218 | PRE_IO |
2219 | READ_WORD_F(adr, dst) |
2220 | res = dst - src; |
2221 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2222 | flag_N = flag_X = flag_C = res >> 8; |
2223 | flag_NotZ = res & 0xFFFF; |
2224 | WRITE_WORD_F(adr, res) |
2225 | POST_IO |
2226 | RET(18) |
2227 | } |
2228 | |
2229 | // SUBI |
2230 | OPCODE(0x0468) |
2231 | { |
2232 | u32 adr, res; |
2233 | u32 src, dst; |
2234 | |
2235 | FETCH_WORD(src); |
2236 | FETCH_SWORD(adr); |
2237 | adr += AREG((Opcode >> 0) & 7); |
2238 | PRE_IO |
2239 | READ_WORD_F(adr, dst) |
2240 | res = dst - src; |
2241 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2242 | flag_N = flag_X = flag_C = res >> 8; |
2243 | flag_NotZ = res & 0xFFFF; |
2244 | WRITE_WORD_F(adr, res) |
2245 | POST_IO |
2246 | RET(20) |
2247 | } |
2248 | |
2249 | // SUBI |
2250 | OPCODE(0x0470) |
2251 | { |
2252 | u32 adr, res; |
2253 | u32 src, dst; |
2254 | |
2255 | FETCH_WORD(src); |
2256 | adr = AREG((Opcode >> 0) & 7); |
2257 | DECODE_EXT_WORD |
2258 | PRE_IO |
2259 | READ_WORD_F(adr, dst) |
2260 | res = dst - src; |
2261 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2262 | flag_N = flag_X = flag_C = res >> 8; |
2263 | flag_NotZ = res & 0xFFFF; |
2264 | WRITE_WORD_F(adr, res) |
2265 | POST_IO |
2266 | RET(22) |
2267 | } |
2268 | |
2269 | // SUBI |
2270 | OPCODE(0x0478) |
2271 | { |
2272 | u32 adr, res; |
2273 | u32 src, dst; |
2274 | |
2275 | FETCH_WORD(src); |
2276 | FETCH_SWORD(adr); |
2277 | PRE_IO |
2278 | READ_WORD_F(adr, dst) |
2279 | res = dst - src; |
2280 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2281 | flag_N = flag_X = flag_C = res >> 8; |
2282 | flag_NotZ = res & 0xFFFF; |
2283 | WRITE_WORD_F(adr, res) |
2284 | POST_IO |
2285 | RET(20) |
2286 | } |
2287 | |
2288 | // SUBI |
2289 | OPCODE(0x0479) |
2290 | { |
2291 | u32 adr, res; |
2292 | u32 src, dst; |
2293 | |
2294 | FETCH_WORD(src); |
2295 | FETCH_LONG(adr); |
2296 | PRE_IO |
2297 | READ_WORD_F(adr, dst) |
2298 | res = dst - src; |
2299 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2300 | flag_N = flag_X = flag_C = res >> 8; |
2301 | flag_NotZ = res & 0xFFFF; |
2302 | WRITE_WORD_F(adr, res) |
2303 | POST_IO |
2304 | RET(24) |
2305 | } |
2306 | |
2307 | // SUBI |
2308 | OPCODE(0x045F) |
2309 | { |
2310 | u32 adr, res; |
2311 | u32 src, dst; |
2312 | |
2313 | FETCH_WORD(src); |
2314 | adr = AREG(7); |
2315 | AREG(7) += 2; |
2316 | PRE_IO |
2317 | READ_WORD_F(adr, dst) |
2318 | res = dst - src; |
2319 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2320 | flag_N = flag_X = flag_C = res >> 8; |
2321 | flag_NotZ = res & 0xFFFF; |
2322 | WRITE_WORD_F(adr, res) |
2323 | POST_IO |
2324 | RET(16) |
2325 | } |
2326 | |
2327 | // SUBI |
2328 | OPCODE(0x0467) |
2329 | { |
2330 | u32 adr, res; |
2331 | u32 src, dst; |
2332 | |
2333 | FETCH_WORD(src); |
2334 | adr = AREG(7) - 2; |
2335 | AREG(7) = adr; |
2336 | PRE_IO |
2337 | READ_WORD_F(adr, dst) |
2338 | res = dst - src; |
2339 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2340 | flag_N = flag_X = flag_C = res >> 8; |
2341 | flag_NotZ = res & 0xFFFF; |
2342 | WRITE_WORD_F(adr, res) |
2343 | POST_IO |
2344 | RET(18) |
2345 | } |
2346 | |
2347 | // SUBI |
2348 | OPCODE(0x0480) |
2349 | { |
2350 | u32 adr, res; |
2351 | u32 src, dst; |
2352 | |
2353 | FETCH_LONG(src); |
2354 | dst = DREGu32((Opcode >> 0) & 7); |
2355 | res = dst - src; |
2356 | flag_NotZ = res; |
2357 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2358 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2359 | flag_N = res >> 24; |
2360 | DREGu32((Opcode >> 0) & 7) = res; |
2361 | RET(16) |
2362 | } |
2363 | |
2364 | // SUBI |
2365 | OPCODE(0x0490) |
2366 | { |
2367 | u32 adr, res; |
2368 | u32 src, dst; |
2369 | |
2370 | FETCH_LONG(src); |
2371 | adr = AREG((Opcode >> 0) & 7); |
2372 | PRE_IO |
2373 | READ_LONG_F(adr, dst) |
2374 | res = dst - src; |
2375 | flag_NotZ = res; |
2376 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2377 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2378 | flag_N = res >> 24; |
2379 | WRITE_LONG_F(adr, res) |
2380 | POST_IO |
2381 | RET(28) |
2382 | } |
2383 | |
2384 | // SUBI |
2385 | OPCODE(0x0498) |
2386 | { |
2387 | u32 adr, res; |
2388 | u32 src, dst; |
2389 | |
2390 | FETCH_LONG(src); |
2391 | adr = AREG((Opcode >> 0) & 7); |
2392 | AREG((Opcode >> 0) & 7) += 4; |
2393 | PRE_IO |
2394 | READ_LONG_F(adr, dst) |
2395 | res = dst - src; |
2396 | flag_NotZ = res; |
2397 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2398 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2399 | flag_N = res >> 24; |
2400 | WRITE_LONG_F(adr, res) |
2401 | POST_IO |
2402 | RET(28) |
2403 | } |
2404 | |
2405 | // SUBI |
2406 | OPCODE(0x04A0) |
2407 | { |
2408 | u32 adr, res; |
2409 | u32 src, dst; |
2410 | |
2411 | FETCH_LONG(src); |
2412 | adr = AREG((Opcode >> 0) & 7) - 4; |
2413 | AREG((Opcode >> 0) & 7) = adr; |
2414 | PRE_IO |
2415 | READ_LONG_F(adr, dst) |
2416 | res = dst - src; |
2417 | flag_NotZ = res; |
2418 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2419 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2420 | flag_N = res >> 24; |
2421 | WRITE_LONG_F(adr, res) |
2422 | POST_IO |
2423 | RET(30) |
2424 | } |
2425 | |
2426 | // SUBI |
2427 | OPCODE(0x04A8) |
2428 | { |
2429 | u32 adr, res; |
2430 | u32 src, dst; |
2431 | |
2432 | FETCH_LONG(src); |
2433 | FETCH_SWORD(adr); |
2434 | adr += AREG((Opcode >> 0) & 7); |
2435 | PRE_IO |
2436 | READ_LONG_F(adr, dst) |
2437 | res = dst - src; |
2438 | flag_NotZ = res; |
2439 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2440 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2441 | flag_N = res >> 24; |
2442 | WRITE_LONG_F(adr, res) |
2443 | POST_IO |
2444 | RET(32) |
2445 | } |
2446 | |
2447 | // SUBI |
2448 | OPCODE(0x04B0) |
2449 | { |
2450 | u32 adr, res; |
2451 | u32 src, dst; |
2452 | |
2453 | FETCH_LONG(src); |
2454 | adr = AREG((Opcode >> 0) & 7); |
2455 | DECODE_EXT_WORD |
2456 | PRE_IO |
2457 | READ_LONG_F(adr, dst) |
2458 | res = dst - src; |
2459 | flag_NotZ = res; |
2460 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2461 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2462 | flag_N = res >> 24; |
2463 | WRITE_LONG_F(adr, res) |
2464 | POST_IO |
2465 | RET(34) |
2466 | } |
2467 | |
2468 | // SUBI |
2469 | OPCODE(0x04B8) |
2470 | { |
2471 | u32 adr, res; |
2472 | u32 src, dst; |
2473 | |
2474 | FETCH_LONG(src); |
2475 | FETCH_SWORD(adr); |
2476 | PRE_IO |
2477 | READ_LONG_F(adr, dst) |
2478 | res = dst - src; |
2479 | flag_NotZ = res; |
2480 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2481 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2482 | flag_N = res >> 24; |
2483 | WRITE_LONG_F(adr, res) |
2484 | POST_IO |
2485 | RET(32) |
2486 | } |
2487 | |
2488 | // SUBI |
2489 | OPCODE(0x04B9) |
2490 | { |
2491 | u32 adr, res; |
2492 | u32 src, dst; |
2493 | |
2494 | FETCH_LONG(src); |
2495 | FETCH_LONG(adr); |
2496 | PRE_IO |
2497 | READ_LONG_F(adr, dst) |
2498 | res = dst - src; |
2499 | flag_NotZ = res; |
2500 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2501 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2502 | flag_N = res >> 24; |
2503 | WRITE_LONG_F(adr, res) |
2504 | POST_IO |
2505 | RET(36) |
2506 | } |
2507 | |
2508 | // SUBI |
2509 | OPCODE(0x049F) |
2510 | { |
2511 | u32 adr, res; |
2512 | u32 src, dst; |
2513 | |
2514 | FETCH_LONG(src); |
2515 | adr = AREG(7); |
2516 | AREG(7) += 4; |
2517 | PRE_IO |
2518 | READ_LONG_F(adr, dst) |
2519 | res = dst - src; |
2520 | flag_NotZ = res; |
2521 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2522 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2523 | flag_N = res >> 24; |
2524 | WRITE_LONG_F(adr, res) |
2525 | POST_IO |
2526 | RET(28) |
2527 | } |
2528 | |
2529 | // SUBI |
2530 | OPCODE(0x04A7) |
2531 | { |
2532 | u32 adr, res; |
2533 | u32 src, dst; |
2534 | |
2535 | FETCH_LONG(src); |
2536 | adr = AREG(7) - 4; |
2537 | AREG(7) = adr; |
2538 | PRE_IO |
2539 | READ_LONG_F(adr, dst) |
2540 | res = dst - src; |
2541 | flag_NotZ = res; |
2542 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2543 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2544 | flag_N = res >> 24; |
2545 | WRITE_LONG_F(adr, res) |
2546 | POST_IO |
2547 | RET(30) |
2548 | } |
2549 | |
2550 | // ADDI |
2551 | OPCODE(0x0600) |
2552 | { |
2553 | u32 adr, res; |
2554 | u32 src, dst; |
2555 | |
2556 | FETCH_BYTE(src); |
2557 | dst = DREGu8((Opcode >> 0) & 7); |
2558 | res = dst + src; |
2559 | flag_N = flag_X = flag_C = res; |
2560 | flag_V = (src ^ res) & (dst ^ res); |
2561 | flag_NotZ = res & 0xFF; |
2562 | DREGu8((Opcode >> 0) & 7) = res; |
2563 | RET(8) |
2564 | } |
2565 | |
2566 | // ADDI |
2567 | OPCODE(0x0610) |
2568 | { |
2569 | u32 adr, res; |
2570 | u32 src, dst; |
2571 | |
2572 | FETCH_BYTE(src); |
2573 | adr = AREG((Opcode >> 0) & 7); |
2574 | PRE_IO |
2575 | READ_BYTE_F(adr, dst) |
2576 | res = dst + src; |
2577 | flag_N = flag_X = flag_C = res; |
2578 | flag_V = (src ^ res) & (dst ^ res); |
2579 | flag_NotZ = res & 0xFF; |
2580 | WRITE_BYTE_F(adr, res) |
2581 | POST_IO |
2582 | RET(16) |
2583 | } |
2584 | |
2585 | // ADDI |
2586 | OPCODE(0x0618) |
2587 | { |
2588 | u32 adr, res; |
2589 | u32 src, dst; |
2590 | |
2591 | FETCH_BYTE(src); |
2592 | adr = AREG((Opcode >> 0) & 7); |
2593 | AREG((Opcode >> 0) & 7) += 1; |
2594 | PRE_IO |
2595 | READ_BYTE_F(adr, dst) |
2596 | res = dst + src; |
2597 | flag_N = flag_X = flag_C = res; |
2598 | flag_V = (src ^ res) & (dst ^ res); |
2599 | flag_NotZ = res & 0xFF; |
2600 | WRITE_BYTE_F(adr, res) |
2601 | POST_IO |
2602 | RET(16) |
2603 | } |
2604 | |
2605 | // ADDI |
2606 | OPCODE(0x0620) |
2607 | { |
2608 | u32 adr, res; |
2609 | u32 src, dst; |
2610 | |
2611 | FETCH_BYTE(src); |
2612 | adr = AREG((Opcode >> 0) & 7) - 1; |
2613 | AREG((Opcode >> 0) & 7) = adr; |
2614 | PRE_IO |
2615 | READ_BYTE_F(adr, dst) |
2616 | res = dst + src; |
2617 | flag_N = flag_X = flag_C = res; |
2618 | flag_V = (src ^ res) & (dst ^ res); |
2619 | flag_NotZ = res & 0xFF; |
2620 | WRITE_BYTE_F(adr, res) |
2621 | POST_IO |
2622 | RET(18) |
2623 | } |
2624 | |
2625 | // ADDI |
2626 | OPCODE(0x0628) |
2627 | { |
2628 | u32 adr, res; |
2629 | u32 src, dst; |
2630 | |
2631 | FETCH_BYTE(src); |
2632 | FETCH_SWORD(adr); |
2633 | adr += AREG((Opcode >> 0) & 7); |
2634 | PRE_IO |
2635 | READ_BYTE_F(adr, dst) |
2636 | res = dst + src; |
2637 | flag_N = flag_X = flag_C = res; |
2638 | flag_V = (src ^ res) & (dst ^ res); |
2639 | flag_NotZ = res & 0xFF; |
2640 | WRITE_BYTE_F(adr, res) |
2641 | POST_IO |
2642 | RET(20) |
2643 | } |
2644 | |
2645 | // ADDI |
2646 | OPCODE(0x0630) |
2647 | { |
2648 | u32 adr, res; |
2649 | u32 src, dst; |
2650 | |
2651 | FETCH_BYTE(src); |
2652 | adr = AREG((Opcode >> 0) & 7); |
2653 | DECODE_EXT_WORD |
2654 | PRE_IO |
2655 | READ_BYTE_F(adr, dst) |
2656 | res = dst + src; |
2657 | flag_N = flag_X = flag_C = res; |
2658 | flag_V = (src ^ res) & (dst ^ res); |
2659 | flag_NotZ = res & 0xFF; |
2660 | WRITE_BYTE_F(adr, res) |
2661 | POST_IO |
2662 | RET(22) |
2663 | } |
2664 | |
2665 | // ADDI |
2666 | OPCODE(0x0638) |
2667 | { |
2668 | u32 adr, res; |
2669 | u32 src, dst; |
2670 | |
2671 | FETCH_BYTE(src); |
2672 | FETCH_SWORD(adr); |
2673 | PRE_IO |
2674 | READ_BYTE_F(adr, dst) |
2675 | res = dst + src; |
2676 | flag_N = flag_X = flag_C = res; |
2677 | flag_V = (src ^ res) & (dst ^ res); |
2678 | flag_NotZ = res & 0xFF; |
2679 | WRITE_BYTE_F(adr, res) |
2680 | POST_IO |
2681 | RET(20) |
2682 | } |
2683 | |
2684 | // ADDI |
2685 | OPCODE(0x0639) |
2686 | { |
2687 | u32 adr, res; |
2688 | u32 src, dst; |
2689 | |
2690 | FETCH_BYTE(src); |
2691 | FETCH_LONG(adr); |
2692 | PRE_IO |
2693 | READ_BYTE_F(adr, dst) |
2694 | res = dst + src; |
2695 | flag_N = flag_X = flag_C = res; |
2696 | flag_V = (src ^ res) & (dst ^ res); |
2697 | flag_NotZ = res & 0xFF; |
2698 | WRITE_BYTE_F(adr, res) |
2699 | POST_IO |
2700 | RET(24) |
2701 | } |
2702 | |
2703 | // ADDI |
2704 | OPCODE(0x061F) |
2705 | { |
2706 | u32 adr, res; |
2707 | u32 src, dst; |
2708 | |
2709 | FETCH_BYTE(src); |
2710 | adr = AREG(7); |
2711 | AREG(7) += 2; |
2712 | PRE_IO |
2713 | READ_BYTE_F(adr, dst) |
2714 | res = dst + src; |
2715 | flag_N = flag_X = flag_C = res; |
2716 | flag_V = (src ^ res) & (dst ^ res); |
2717 | flag_NotZ = res & 0xFF; |
2718 | WRITE_BYTE_F(adr, res) |
2719 | POST_IO |
2720 | RET(16) |
2721 | } |
2722 | |
2723 | // ADDI |
2724 | OPCODE(0x0627) |
2725 | { |
2726 | u32 adr, res; |
2727 | u32 src, dst; |
2728 | |
2729 | FETCH_BYTE(src); |
2730 | adr = AREG(7) - 2; |
2731 | AREG(7) = adr; |
2732 | PRE_IO |
2733 | READ_BYTE_F(adr, dst) |
2734 | res = dst + src; |
2735 | flag_N = flag_X = flag_C = res; |
2736 | flag_V = (src ^ res) & (dst ^ res); |
2737 | flag_NotZ = res & 0xFF; |
2738 | WRITE_BYTE_F(adr, res) |
2739 | POST_IO |
2740 | RET(18) |
2741 | } |
2742 | |
2743 | // ADDI |
2744 | OPCODE(0x0640) |
2745 | { |
2746 | u32 adr, res; |
2747 | u32 src, dst; |
2748 | |
2749 | FETCH_WORD(src); |
2750 | dst = DREGu16((Opcode >> 0) & 7); |
2751 | res = dst + src; |
2752 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2753 | flag_N = flag_X = flag_C = res >> 8; |
2754 | flag_NotZ = res & 0xFFFF; |
2755 | DREGu16((Opcode >> 0) & 7) = res; |
2756 | RET(8) |
2757 | } |
2758 | |
2759 | // ADDI |
2760 | OPCODE(0x0650) |
2761 | { |
2762 | u32 adr, res; |
2763 | u32 src, dst; |
2764 | |
2765 | FETCH_WORD(src); |
2766 | adr = AREG((Opcode >> 0) & 7); |
2767 | PRE_IO |
2768 | READ_WORD_F(adr, dst) |
2769 | res = dst + src; |
2770 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2771 | flag_N = flag_X = flag_C = res >> 8; |
2772 | flag_NotZ = res & 0xFFFF; |
2773 | WRITE_WORD_F(adr, res) |
2774 | POST_IO |
2775 | RET(16) |
2776 | } |
2777 | |
2778 | // ADDI |
2779 | OPCODE(0x0658) |
2780 | { |
2781 | u32 adr, res; |
2782 | u32 src, dst; |
2783 | |
2784 | FETCH_WORD(src); |
2785 | adr = AREG((Opcode >> 0) & 7); |
2786 | AREG((Opcode >> 0) & 7) += 2; |
2787 | PRE_IO |
2788 | READ_WORD_F(adr, dst) |
2789 | res = dst + src; |
2790 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2791 | flag_N = flag_X = flag_C = res >> 8; |
2792 | flag_NotZ = res & 0xFFFF; |
2793 | WRITE_WORD_F(adr, res) |
2794 | POST_IO |
2795 | RET(16) |
2796 | } |
2797 | |
2798 | // ADDI |
2799 | OPCODE(0x0660) |
2800 | { |
2801 | u32 adr, res; |
2802 | u32 src, dst; |
2803 | |
2804 | FETCH_WORD(src); |
2805 | adr = AREG((Opcode >> 0) & 7) - 2; |
2806 | AREG((Opcode >> 0) & 7) = adr; |
2807 | PRE_IO |
2808 | READ_WORD_F(adr, dst) |
2809 | res = dst + src; |
2810 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2811 | flag_N = flag_X = flag_C = res >> 8; |
2812 | flag_NotZ = res & 0xFFFF; |
2813 | WRITE_WORD_F(adr, res) |
2814 | POST_IO |
2815 | RET(18) |
2816 | } |
2817 | |
2818 | // ADDI |
2819 | OPCODE(0x0668) |
2820 | { |
2821 | u32 adr, res; |
2822 | u32 src, dst; |
2823 | |
2824 | FETCH_WORD(src); |
2825 | FETCH_SWORD(adr); |
2826 | adr += AREG((Opcode >> 0) & 7); |
2827 | PRE_IO |
2828 | READ_WORD_F(adr, dst) |
2829 | res = dst + src; |
2830 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2831 | flag_N = flag_X = flag_C = res >> 8; |
2832 | flag_NotZ = res & 0xFFFF; |
2833 | WRITE_WORD_F(adr, res) |
2834 | POST_IO |
2835 | RET(20) |
2836 | } |
2837 | |
2838 | // ADDI |
2839 | OPCODE(0x0670) |
2840 | { |
2841 | u32 adr, res; |
2842 | u32 src, dst; |
2843 | |
2844 | FETCH_WORD(src); |
2845 | adr = AREG((Opcode >> 0) & 7); |
2846 | DECODE_EXT_WORD |
2847 | PRE_IO |
2848 | READ_WORD_F(adr, dst) |
2849 | res = dst + src; |
2850 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2851 | flag_N = flag_X = flag_C = res >> 8; |
2852 | flag_NotZ = res & 0xFFFF; |
2853 | WRITE_WORD_F(adr, res) |
2854 | POST_IO |
2855 | RET(22) |
2856 | } |
2857 | |
2858 | // ADDI |
2859 | OPCODE(0x0678) |
2860 | { |
2861 | u32 adr, res; |
2862 | u32 src, dst; |
2863 | |
2864 | FETCH_WORD(src); |
2865 | FETCH_SWORD(adr); |
2866 | PRE_IO |
2867 | READ_WORD_F(adr, dst) |
2868 | res = dst + src; |
2869 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2870 | flag_N = flag_X = flag_C = res >> 8; |
2871 | flag_NotZ = res & 0xFFFF; |
2872 | WRITE_WORD_F(adr, res) |
2873 | POST_IO |
2874 | RET(20) |
2875 | } |
2876 | |
2877 | // ADDI |
2878 | OPCODE(0x0679) |
2879 | { |
2880 | u32 adr, res; |
2881 | u32 src, dst; |
2882 | |
2883 | FETCH_WORD(src); |
2884 | FETCH_LONG(adr); |
2885 | PRE_IO |
2886 | READ_WORD_F(adr, dst) |
2887 | res = dst + src; |
2888 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2889 | flag_N = flag_X = flag_C = res >> 8; |
2890 | flag_NotZ = res & 0xFFFF; |
2891 | WRITE_WORD_F(adr, res) |
2892 | POST_IO |
2893 | RET(24) |
2894 | } |
2895 | |
2896 | // ADDI |
2897 | OPCODE(0x065F) |
2898 | { |
2899 | u32 adr, res; |
2900 | u32 src, dst; |
2901 | |
2902 | FETCH_WORD(src); |
2903 | adr = AREG(7); |
2904 | AREG(7) += 2; |
2905 | PRE_IO |
2906 | READ_WORD_F(adr, dst) |
2907 | res = dst + src; |
2908 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2909 | flag_N = flag_X = flag_C = res >> 8; |
2910 | flag_NotZ = res & 0xFFFF; |
2911 | WRITE_WORD_F(adr, res) |
2912 | POST_IO |
2913 | RET(16) |
2914 | } |
2915 | |
2916 | // ADDI |
2917 | OPCODE(0x0667) |
2918 | { |
2919 | u32 adr, res; |
2920 | u32 src, dst; |
2921 | |
2922 | FETCH_WORD(src); |
2923 | adr = AREG(7) - 2; |
2924 | AREG(7) = adr; |
2925 | PRE_IO |
2926 | READ_WORD_F(adr, dst) |
2927 | res = dst + src; |
2928 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2929 | flag_N = flag_X = flag_C = res >> 8; |
2930 | flag_NotZ = res & 0xFFFF; |
2931 | WRITE_WORD_F(adr, res) |
2932 | POST_IO |
2933 | RET(18) |
2934 | } |
2935 | |
2936 | // ADDI |
2937 | OPCODE(0x0680) |
2938 | { |
2939 | u32 adr, res; |
2940 | u32 src, dst; |
2941 | |
2942 | FETCH_LONG(src); |
2943 | dst = DREGu32((Opcode >> 0) & 7); |
2944 | res = dst + src; |
2945 | flag_NotZ = res; |
2946 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2947 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2948 | flag_N = res >> 24; |
2949 | DREGu32((Opcode >> 0) & 7) = res; |
2950 | RET(16) |
2951 | } |
2952 | |
2953 | // ADDI |
2954 | OPCODE(0x0690) |
2955 | { |
2956 | u32 adr, res; |
2957 | u32 src, dst; |
2958 | |
2959 | FETCH_LONG(src); |
2960 | adr = AREG((Opcode >> 0) & 7); |
2961 | PRE_IO |
2962 | READ_LONG_F(adr, dst) |
2963 | res = dst + src; |
2964 | flag_NotZ = res; |
2965 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2966 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2967 | flag_N = res >> 24; |
2968 | WRITE_LONG_F(adr, res) |
2969 | POST_IO |
2970 | RET(28) |
2971 | } |
2972 | |
2973 | // ADDI |
2974 | OPCODE(0x0698) |
2975 | { |
2976 | u32 adr, res; |
2977 | u32 src, dst; |
2978 | |
2979 | FETCH_LONG(src); |
2980 | adr = AREG((Opcode >> 0) & 7); |
2981 | AREG((Opcode >> 0) & 7) += 4; |
2982 | PRE_IO |
2983 | READ_LONG_F(adr, dst) |
2984 | res = dst + src; |
2985 | flag_NotZ = res; |
2986 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2987 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2988 | flag_N = res >> 24; |
2989 | WRITE_LONG_F(adr, res) |
2990 | POST_IO |
2991 | RET(28) |
2992 | } |
2993 | |
2994 | // ADDI |
2995 | OPCODE(0x06A0) |
2996 | { |
2997 | u32 adr, res; |
2998 | u32 src, dst; |
2999 | |
3000 | FETCH_LONG(src); |
3001 | adr = AREG((Opcode >> 0) & 7) - 4; |
3002 | AREG((Opcode >> 0) & 7) = adr; |
3003 | PRE_IO |
3004 | READ_LONG_F(adr, dst) |
3005 | res = dst + src; |
3006 | flag_NotZ = res; |
3007 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3008 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3009 | flag_N = res >> 24; |
3010 | WRITE_LONG_F(adr, res) |
3011 | POST_IO |
3012 | RET(30) |
3013 | } |
3014 | |
3015 | // ADDI |
3016 | OPCODE(0x06A8) |
3017 | { |
3018 | u32 adr, res; |
3019 | u32 src, dst; |
3020 | |
3021 | FETCH_LONG(src); |
3022 | FETCH_SWORD(adr); |
3023 | adr += AREG((Opcode >> 0) & 7); |
3024 | PRE_IO |
3025 | READ_LONG_F(adr, dst) |
3026 | res = dst + src; |
3027 | flag_NotZ = res; |
3028 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3029 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3030 | flag_N = res >> 24; |
3031 | WRITE_LONG_F(adr, res) |
3032 | POST_IO |
3033 | RET(32) |
3034 | } |
3035 | |
3036 | // ADDI |
3037 | OPCODE(0x06B0) |
3038 | { |
3039 | u32 adr, res; |
3040 | u32 src, dst; |
3041 | |
3042 | FETCH_LONG(src); |
3043 | adr = AREG((Opcode >> 0) & 7); |
3044 | DECODE_EXT_WORD |
3045 | PRE_IO |
3046 | READ_LONG_F(adr, dst) |
3047 | res = dst + src; |
3048 | flag_NotZ = res; |
3049 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3050 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3051 | flag_N = res >> 24; |
3052 | WRITE_LONG_F(adr, res) |
3053 | POST_IO |
3054 | RET(34) |
3055 | } |
3056 | |
3057 | // ADDI |
3058 | OPCODE(0x06B8) |
3059 | { |
3060 | u32 adr, res; |
3061 | u32 src, dst; |
3062 | |
3063 | FETCH_LONG(src); |
3064 | FETCH_SWORD(adr); |
3065 | PRE_IO |
3066 | READ_LONG_F(adr, dst) |
3067 | res = dst + src; |
3068 | flag_NotZ = res; |
3069 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3070 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3071 | flag_N = res >> 24; |
3072 | WRITE_LONG_F(adr, res) |
3073 | POST_IO |
3074 | RET(32) |
3075 | } |
3076 | |
3077 | // ADDI |
3078 | OPCODE(0x06B9) |
3079 | { |
3080 | u32 adr, res; |
3081 | u32 src, dst; |
3082 | |
3083 | FETCH_LONG(src); |
3084 | FETCH_LONG(adr); |
3085 | PRE_IO |
3086 | READ_LONG_F(adr, dst) |
3087 | res = dst + src; |
3088 | flag_NotZ = res; |
3089 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3090 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3091 | flag_N = res >> 24; |
3092 | WRITE_LONG_F(adr, res) |
3093 | POST_IO |
3094 | RET(36) |
3095 | } |
3096 | |
3097 | // ADDI |
3098 | OPCODE(0x069F) |
3099 | { |
3100 | u32 adr, res; |
3101 | u32 src, dst; |
3102 | |
3103 | FETCH_LONG(src); |
3104 | adr = AREG(7); |
3105 | AREG(7) += 4; |
3106 | PRE_IO |
3107 | READ_LONG_F(adr, dst) |
3108 | res = dst + src; |
3109 | flag_NotZ = res; |
3110 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3111 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3112 | flag_N = res >> 24; |
3113 | WRITE_LONG_F(adr, res) |
3114 | POST_IO |
3115 | RET(28) |
3116 | } |
3117 | |
3118 | // ADDI |
3119 | OPCODE(0x06A7) |
3120 | { |
3121 | u32 adr, res; |
3122 | u32 src, dst; |
3123 | |
3124 | FETCH_LONG(src); |
3125 | adr = AREG(7) - 4; |
3126 | AREG(7) = adr; |
3127 | PRE_IO |
3128 | READ_LONG_F(adr, dst) |
3129 | res = dst + src; |
3130 | flag_NotZ = res; |
3131 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3132 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3133 | flag_N = res >> 24; |
3134 | WRITE_LONG_F(adr, res) |
3135 | POST_IO |
3136 | RET(30) |
3137 | } |
3138 | |
3139 | // CMPI |
3140 | OPCODE(0x0C00) |
3141 | { |
3142 | u32 adr, res; |
3143 | u32 src, dst; |
3144 | |
3145 | FETCH_BYTE(src); |
3146 | dst = DREGu8((Opcode >> 0) & 7); |
3147 | res = dst - src; |
3148 | flag_N = flag_C = res; |
3149 | flag_V = (src ^ dst) & (res ^ dst); |
3150 | flag_NotZ = res & 0xFF; |
3151 | RET(8) |
3152 | } |
3153 | |
3154 | // CMPI |
3155 | OPCODE(0x0C10) |
3156 | { |
3157 | u32 adr, res; |
3158 | u32 src, dst; |
3159 | |
3160 | FETCH_BYTE(src); |
3161 | adr = AREG((Opcode >> 0) & 7); |
3162 | PRE_IO |
3163 | READ_BYTE_F(adr, dst) |
3164 | res = dst - src; |
3165 | flag_N = flag_C = res; |
3166 | flag_V = (src ^ dst) & (res ^ dst); |
3167 | flag_NotZ = res & 0xFF; |
3168 | POST_IO |
3169 | RET(12) |
3170 | } |
3171 | |
3172 | // CMPI |
3173 | OPCODE(0x0C18) |
3174 | { |
3175 | u32 adr, res; |
3176 | u32 src, dst; |
3177 | |
3178 | FETCH_BYTE(src); |
3179 | adr = AREG((Opcode >> 0) & 7); |
3180 | AREG((Opcode >> 0) & 7) += 1; |
3181 | PRE_IO |
3182 | READ_BYTE_F(adr, dst) |
3183 | res = dst - src; |
3184 | flag_N = flag_C = res; |
3185 | flag_V = (src ^ dst) & (res ^ dst); |
3186 | flag_NotZ = res & 0xFF; |
3187 | POST_IO |
3188 | RET(12) |
3189 | } |
3190 | |
3191 | // CMPI |
3192 | OPCODE(0x0C20) |
3193 | { |
3194 | u32 adr, res; |
3195 | u32 src, dst; |
3196 | |
3197 | FETCH_BYTE(src); |
3198 | adr = AREG((Opcode >> 0) & 7) - 1; |
3199 | AREG((Opcode >> 0) & 7) = adr; |
3200 | PRE_IO |
3201 | READ_BYTE_F(adr, dst) |
3202 | res = dst - src; |
3203 | flag_N = flag_C = res; |
3204 | flag_V = (src ^ dst) & (res ^ dst); |
3205 | flag_NotZ = res & 0xFF; |
3206 | POST_IO |
3207 | RET(14) |
3208 | } |
3209 | |
3210 | // CMPI |
3211 | OPCODE(0x0C28) |
3212 | { |
3213 | u32 adr, res; |
3214 | u32 src, dst; |
3215 | |
3216 | FETCH_BYTE(src); |
3217 | FETCH_SWORD(adr); |
3218 | adr += AREG((Opcode >> 0) & 7); |
3219 | PRE_IO |
3220 | READ_BYTE_F(adr, dst) |
3221 | res = dst - src; |
3222 | flag_N = flag_C = res; |
3223 | flag_V = (src ^ dst) & (res ^ dst); |
3224 | flag_NotZ = res & 0xFF; |
3225 | POST_IO |
3226 | RET(16) |
3227 | } |
3228 | |
3229 | // CMPI |
3230 | OPCODE(0x0C30) |
3231 | { |
3232 | u32 adr, res; |
3233 | u32 src, dst; |
3234 | |
3235 | FETCH_BYTE(src); |
3236 | adr = AREG((Opcode >> 0) & 7); |
3237 | DECODE_EXT_WORD |
3238 | PRE_IO |
3239 | READ_BYTE_F(adr, dst) |
3240 | res = dst - src; |
3241 | flag_N = flag_C = res; |
3242 | flag_V = (src ^ dst) & (res ^ dst); |
3243 | flag_NotZ = res & 0xFF; |
3244 | POST_IO |
3245 | RET(18) |
3246 | } |
3247 | |
3248 | // CMPI |
3249 | OPCODE(0x0C38) |
3250 | { |
3251 | u32 adr, res; |
3252 | u32 src, dst; |
3253 | |
3254 | FETCH_BYTE(src); |
3255 | FETCH_SWORD(adr); |
3256 | PRE_IO |
3257 | READ_BYTE_F(adr, dst) |
3258 | res = dst - src; |
3259 | flag_N = flag_C = res; |
3260 | flag_V = (src ^ dst) & (res ^ dst); |
3261 | flag_NotZ = res & 0xFF; |
3262 | POST_IO |
3263 | RET(16) |
3264 | } |
3265 | |
3266 | // CMPI |
3267 | OPCODE(0x0C39) |
3268 | { |
3269 | u32 adr, res; |
3270 | u32 src, dst; |
3271 | |
3272 | FETCH_BYTE(src); |
3273 | FETCH_LONG(adr); |
3274 | PRE_IO |
3275 | READ_BYTE_F(adr, dst) |
3276 | res = dst - src; |
3277 | flag_N = flag_C = res; |
3278 | flag_V = (src ^ dst) & (res ^ dst); |
3279 | flag_NotZ = res & 0xFF; |
3280 | POST_IO |
3281 | RET(20) |
3282 | } |
3283 | |
3284 | // CMPI |
3285 | OPCODE(0x0C1F) |
3286 | { |
3287 | u32 adr, res; |
3288 | u32 src, dst; |
3289 | |
3290 | FETCH_BYTE(src); |
3291 | adr = AREG(7); |
3292 | AREG(7) += 2; |
3293 | PRE_IO |
3294 | READ_BYTE_F(adr, dst) |
3295 | res = dst - src; |
3296 | flag_N = flag_C = res; |
3297 | flag_V = (src ^ dst) & (res ^ dst); |
3298 | flag_NotZ = res & 0xFF; |
3299 | POST_IO |
3300 | RET(12) |
3301 | } |
3302 | |
3303 | // CMPI |
3304 | OPCODE(0x0C27) |
3305 | { |
3306 | u32 adr, res; |
3307 | u32 src, dst; |
3308 | |
3309 | FETCH_BYTE(src); |
3310 | adr = AREG(7) - 2; |
3311 | AREG(7) = adr; |
3312 | PRE_IO |
3313 | READ_BYTE_F(adr, dst) |
3314 | res = dst - src; |
3315 | flag_N = flag_C = res; |
3316 | flag_V = (src ^ dst) & (res ^ dst); |
3317 | flag_NotZ = res & 0xFF; |
3318 | POST_IO |
3319 | RET(14) |
3320 | } |
3321 | |
3322 | // CMPI |
3323 | OPCODE(0x0C40) |
3324 | { |
3325 | u32 adr, res; |
3326 | u32 src, dst; |
3327 | |
3328 | FETCH_WORD(src); |
3329 | dst = DREGu16((Opcode >> 0) & 7); |
3330 | res = dst - src; |
3331 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3332 | flag_N = flag_C = res >> 8; |
3333 | flag_NotZ = res & 0xFFFF; |
3334 | RET(8) |
3335 | } |
3336 | |
3337 | // CMPI |
3338 | OPCODE(0x0C50) |
3339 | { |
3340 | u32 adr, res; |
3341 | u32 src, dst; |
3342 | |
3343 | FETCH_WORD(src); |
3344 | adr = AREG((Opcode >> 0) & 7); |
3345 | PRE_IO |
3346 | READ_WORD_F(adr, dst) |
3347 | res = dst - src; |
3348 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3349 | flag_N = flag_C = res >> 8; |
3350 | flag_NotZ = res & 0xFFFF; |
3351 | POST_IO |
3352 | RET(12) |
3353 | } |
3354 | |
3355 | // CMPI |
3356 | OPCODE(0x0C58) |
3357 | { |
3358 | u32 adr, res; |
3359 | u32 src, dst; |
3360 | |
3361 | FETCH_WORD(src); |
3362 | adr = AREG((Opcode >> 0) & 7); |
3363 | AREG((Opcode >> 0) & 7) += 2; |
3364 | PRE_IO |
3365 | READ_WORD_F(adr, dst) |
3366 | res = dst - src; |
3367 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3368 | flag_N = flag_C = res >> 8; |
3369 | flag_NotZ = res & 0xFFFF; |
3370 | POST_IO |
3371 | RET(12) |
3372 | } |
3373 | |
3374 | // CMPI |
3375 | OPCODE(0x0C60) |
3376 | { |
3377 | u32 adr, res; |
3378 | u32 src, dst; |
3379 | |
3380 | FETCH_WORD(src); |
3381 | adr = AREG((Opcode >> 0) & 7) - 2; |
3382 | AREG((Opcode >> 0) & 7) = adr; |
3383 | PRE_IO |
3384 | READ_WORD_F(adr, dst) |
3385 | res = dst - src; |
3386 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3387 | flag_N = flag_C = res >> 8; |
3388 | flag_NotZ = res & 0xFFFF; |
3389 | POST_IO |
3390 | RET(14) |
3391 | } |
3392 | |
3393 | // CMPI |
3394 | OPCODE(0x0C68) |
3395 | { |
3396 | u32 adr, res; |
3397 | u32 src, dst; |
3398 | |
3399 | FETCH_WORD(src); |
3400 | FETCH_SWORD(adr); |
3401 | adr += AREG((Opcode >> 0) & 7); |
3402 | PRE_IO |
3403 | READ_WORD_F(adr, dst) |
3404 | res = dst - src; |
3405 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3406 | flag_N = flag_C = res >> 8; |
3407 | flag_NotZ = res & 0xFFFF; |
3408 | POST_IO |
3409 | RET(16) |
3410 | } |
3411 | |
3412 | // CMPI |
3413 | OPCODE(0x0C70) |
3414 | { |
3415 | u32 adr, res; |
3416 | u32 src, dst; |
3417 | |
3418 | FETCH_WORD(src); |
3419 | adr = AREG((Opcode >> 0) & 7); |
3420 | DECODE_EXT_WORD |
3421 | PRE_IO |
3422 | READ_WORD_F(adr, dst) |
3423 | res = dst - src; |
3424 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3425 | flag_N = flag_C = res >> 8; |
3426 | flag_NotZ = res & 0xFFFF; |
3427 | POST_IO |
3428 | RET(18) |
3429 | } |
3430 | |
3431 | // CMPI |
3432 | OPCODE(0x0C78) |
3433 | { |
3434 | u32 adr, res; |
3435 | u32 src, dst; |
3436 | |
3437 | FETCH_WORD(src); |
3438 | FETCH_SWORD(adr); |
3439 | PRE_IO |
3440 | READ_WORD_F(adr, dst) |
3441 | res = dst - src; |
3442 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3443 | flag_N = flag_C = res >> 8; |
3444 | flag_NotZ = res & 0xFFFF; |
3445 | POST_IO |
3446 | RET(16) |
3447 | } |
3448 | |
3449 | // CMPI |
3450 | OPCODE(0x0C79) |
3451 | { |
3452 | u32 adr, res; |
3453 | u32 src, dst; |
3454 | |
3455 | FETCH_WORD(src); |
3456 | FETCH_LONG(adr); |
3457 | PRE_IO |
3458 | READ_WORD_F(adr, dst) |
3459 | res = dst - src; |
3460 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3461 | flag_N = flag_C = res >> 8; |
3462 | flag_NotZ = res & 0xFFFF; |
3463 | POST_IO |
3464 | RET(20) |
3465 | } |
3466 | |
3467 | // CMPI |
3468 | OPCODE(0x0C5F) |
3469 | { |
3470 | u32 adr, res; |
3471 | u32 src, dst; |
3472 | |
3473 | FETCH_WORD(src); |
3474 | adr = AREG(7); |
3475 | AREG(7) += 2; |
3476 | PRE_IO |
3477 | READ_WORD_F(adr, dst) |
3478 | res = dst - src; |
3479 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3480 | flag_N = flag_C = res >> 8; |
3481 | flag_NotZ = res & 0xFFFF; |
3482 | POST_IO |
3483 | RET(12) |
3484 | } |
3485 | |
3486 | // CMPI |
3487 | OPCODE(0x0C67) |
3488 | { |
3489 | u32 adr, res; |
3490 | u32 src, dst; |
3491 | |
3492 | FETCH_WORD(src); |
3493 | adr = AREG(7) - 2; |
3494 | AREG(7) = adr; |
3495 | PRE_IO |
3496 | READ_WORD_F(adr, dst) |
3497 | res = dst - src; |
3498 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3499 | flag_N = flag_C = res >> 8; |
3500 | flag_NotZ = res & 0xFFFF; |
3501 | POST_IO |
3502 | RET(14) |
3503 | } |
3504 | |
3505 | // CMPI |
3506 | OPCODE(0x0C80) |
3507 | { |
3508 | u32 adr, res; |
3509 | u32 src, dst; |
3510 | |
3511 | FETCH_LONG(src); |
3512 | dst = DREGu32((Opcode >> 0) & 7); |
3513 | res = dst - src; |
3514 | flag_NotZ = res; |
3515 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3516 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3517 | flag_N = res >> 24; |
3518 | RET(14) |
3519 | } |
3520 | |
3521 | // CMPI |
3522 | OPCODE(0x0C90) |
3523 | { |
3524 | u32 adr, res; |
3525 | u32 src, dst; |
3526 | |
3527 | FETCH_LONG(src); |
3528 | adr = AREG((Opcode >> 0) & 7); |
3529 | PRE_IO |
3530 | READ_LONG_F(adr, dst) |
3531 | res = dst - src; |
3532 | flag_NotZ = res; |
3533 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3534 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3535 | flag_N = res >> 24; |
3536 | POST_IO |
3537 | RET(20) |
3538 | } |
3539 | |
3540 | // CMPI |
3541 | OPCODE(0x0C98) |
3542 | { |
3543 | u32 adr, res; |
3544 | u32 src, dst; |
3545 | |
3546 | FETCH_LONG(src); |
3547 | adr = AREG((Opcode >> 0) & 7); |
3548 | AREG((Opcode >> 0) & 7) += 4; |
3549 | PRE_IO |
3550 | READ_LONG_F(adr, dst) |
3551 | res = dst - src; |
3552 | flag_NotZ = res; |
3553 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3554 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3555 | flag_N = res >> 24; |
3556 | POST_IO |
3557 | RET(20) |
3558 | } |
3559 | |
3560 | // CMPI |
3561 | OPCODE(0x0CA0) |
3562 | { |
3563 | u32 adr, res; |
3564 | u32 src, dst; |
3565 | |
3566 | FETCH_LONG(src); |
3567 | adr = AREG((Opcode >> 0) & 7) - 4; |
3568 | AREG((Opcode >> 0) & 7) = adr; |
3569 | PRE_IO |
3570 | READ_LONG_F(adr, dst) |
3571 | res = dst - src; |
3572 | flag_NotZ = res; |
3573 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3574 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3575 | flag_N = res >> 24; |
3576 | POST_IO |
3577 | RET(22) |
3578 | } |
3579 | |
3580 | // CMPI |
3581 | OPCODE(0x0CA8) |
3582 | { |
3583 | u32 adr, res; |
3584 | u32 src, dst; |
3585 | |
3586 | FETCH_LONG(src); |
3587 | FETCH_SWORD(adr); |
3588 | adr += AREG((Opcode >> 0) & 7); |
3589 | PRE_IO |
3590 | READ_LONG_F(adr, dst) |
3591 | res = dst - src; |
3592 | flag_NotZ = res; |
3593 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3594 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3595 | flag_N = res >> 24; |
3596 | POST_IO |
3597 | RET(24) |
3598 | } |
3599 | |
3600 | // CMPI |
3601 | OPCODE(0x0CB0) |
3602 | { |
3603 | u32 adr, res; |
3604 | u32 src, dst; |
3605 | |
3606 | FETCH_LONG(src); |
3607 | adr = AREG((Opcode >> 0) & 7); |
3608 | DECODE_EXT_WORD |
3609 | PRE_IO |
3610 | READ_LONG_F(adr, dst) |
3611 | res = dst - src; |
3612 | flag_NotZ = res; |
3613 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3614 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3615 | flag_N = res >> 24; |
3616 | POST_IO |
3617 | RET(26) |
3618 | } |
3619 | |
3620 | // CMPI |
3621 | OPCODE(0x0CB8) |
3622 | { |
3623 | u32 adr, res; |
3624 | u32 src, dst; |
3625 | |
3626 | FETCH_LONG(src); |
3627 | FETCH_SWORD(adr); |
3628 | PRE_IO |
3629 | READ_LONG_F(adr, dst) |
3630 | res = dst - src; |
3631 | flag_NotZ = res; |
3632 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3633 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3634 | flag_N = res >> 24; |
3635 | POST_IO |
3636 | RET(24) |
3637 | } |
3638 | |
3639 | // CMPI |
3640 | OPCODE(0x0CB9) |
3641 | { |
3642 | u32 adr, res; |
3643 | u32 src, dst; |
3644 | |
3645 | FETCH_LONG(src); |
3646 | FETCH_LONG(adr); |
3647 | PRE_IO |
3648 | READ_LONG_F(adr, dst) |
3649 | res = dst - src; |
3650 | flag_NotZ = res; |
3651 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3652 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3653 | flag_N = res >> 24; |
3654 | POST_IO |
3655 | RET(28) |
3656 | } |
3657 | |
3658 | // CMPI |
3659 | OPCODE(0x0C9F) |
3660 | { |
3661 | u32 adr, res; |
3662 | u32 src, dst; |
3663 | |
3664 | FETCH_LONG(src); |
3665 | adr = AREG(7); |
3666 | AREG(7) += 4; |
3667 | PRE_IO |
3668 | READ_LONG_F(adr, dst) |
3669 | res = dst - src; |
3670 | flag_NotZ = res; |
3671 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3672 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3673 | flag_N = res >> 24; |
3674 | POST_IO |
3675 | RET(20) |
3676 | } |
3677 | |
3678 | // CMPI |
3679 | OPCODE(0x0CA7) |
3680 | { |
3681 | u32 adr, res; |
3682 | u32 src, dst; |
3683 | |
3684 | FETCH_LONG(src); |
3685 | adr = AREG(7) - 4; |
3686 | AREG(7) = adr; |
3687 | PRE_IO |
3688 | READ_LONG_F(adr, dst) |
3689 | res = dst - src; |
3690 | flag_NotZ = res; |
3691 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3692 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3693 | flag_N = res >> 24; |
3694 | POST_IO |
3695 | RET(22) |
3696 | } |
3697 | |
3698 | // BTSTn |
3699 | OPCODE(0x0800) |
3700 | { |
3701 | u32 adr, res; |
3702 | u32 src, dst; |
3703 | |
3704 | FETCH_BYTE(src); |
3705 | src = 1 << (src & 31); |
3706 | res = DREGu32((Opcode >> 0) & 7); |
3707 | flag_NotZ = res & src; |
3708 | RET(10) |
3709 | } |
3710 | |
3711 | // BTSTn |
3712 | OPCODE(0x0810) |
3713 | { |
3714 | u32 adr, res; |
3715 | u32 src, dst; |
3716 | |
3717 | FETCH_BYTE(src); |
3718 | src = 1 << (src & 7); |
3719 | adr = AREG((Opcode >> 0) & 7); |
3720 | PRE_IO |
3721 | READ_BYTE_F(adr, res) |
3722 | flag_NotZ = res & src; |
3723 | POST_IO |
3724 | RET(12) |
3725 | } |
3726 | |
3727 | // BTSTn |
3728 | OPCODE(0x0818) |
3729 | { |
3730 | u32 adr, res; |
3731 | u32 src, dst; |
3732 | |
3733 | FETCH_BYTE(src); |
3734 | src = 1 << (src & 7); |
3735 | adr = AREG((Opcode >> 0) & 7); |
3736 | AREG((Opcode >> 0) & 7) += 1; |
3737 | PRE_IO |
3738 | READ_BYTE_F(adr, res) |
3739 | flag_NotZ = res & src; |
3740 | POST_IO |
3741 | RET(12) |
3742 | } |
3743 | |
3744 | // BTSTn |
3745 | OPCODE(0x0820) |
3746 | { |
3747 | u32 adr, res; |
3748 | u32 src, dst; |
3749 | |
3750 | FETCH_BYTE(src); |
3751 | src = 1 << (src & 7); |
3752 | adr = AREG((Opcode >> 0) & 7) - 1; |
3753 | AREG((Opcode >> 0) & 7) = adr; |
3754 | PRE_IO |
3755 | READ_BYTE_F(adr, res) |
3756 | flag_NotZ = res & src; |
3757 | POST_IO |
3758 | RET(14) |
3759 | } |
3760 | |
3761 | // BTSTn |
3762 | OPCODE(0x0828) |
3763 | { |
3764 | u32 adr, res; |
3765 | u32 src, dst; |
3766 | |
3767 | FETCH_BYTE(src); |
3768 | src = 1 << (src & 7); |
3769 | FETCH_SWORD(adr); |
3770 | adr += AREG((Opcode >> 0) & 7); |
3771 | PRE_IO |
3772 | READ_BYTE_F(adr, res) |
3773 | flag_NotZ = res & src; |
3774 | POST_IO |
3775 | RET(16) |
3776 | } |
3777 | |
3778 | // BTSTn |
3779 | OPCODE(0x0830) |
3780 | { |
3781 | u32 adr, res; |
3782 | u32 src, dst; |
3783 | |
3784 | FETCH_BYTE(src); |
3785 | src = 1 << (src & 7); |
3786 | adr = AREG((Opcode >> 0) & 7); |
3787 | DECODE_EXT_WORD |
3788 | PRE_IO |
3789 | READ_BYTE_F(adr, res) |
3790 | flag_NotZ = res & src; |
3791 | POST_IO |
3792 | RET(18) |
3793 | } |
3794 | |
3795 | // BTSTn |
3796 | OPCODE(0x0838) |
3797 | { |
3798 | u32 adr, res; |
3799 | u32 src, dst; |
3800 | |
3801 | FETCH_BYTE(src); |
3802 | src = 1 << (src & 7); |
3803 | FETCH_SWORD(adr); |
3804 | PRE_IO |
3805 | READ_BYTE_F(adr, res) |
3806 | flag_NotZ = res & src; |
3807 | POST_IO |
3808 | RET(16) |
3809 | } |
3810 | |
3811 | // BTSTn |
3812 | OPCODE(0x0839) |
3813 | { |
3814 | u32 adr, res; |
3815 | u32 src, dst; |
3816 | |
3817 | FETCH_BYTE(src); |
3818 | src = 1 << (src & 7); |
3819 | FETCH_LONG(adr); |
3820 | PRE_IO |
3821 | READ_BYTE_F(adr, res) |
3822 | flag_NotZ = res & src; |
3823 | POST_IO |
3824 | RET(20) |
3825 | } |
3826 | |
3827 | // BTSTn |
3828 | OPCODE(0x083A) |
3829 | { |
3830 | u32 adr, res; |
3831 | u32 src, dst; |
3832 | |
3833 | FETCH_BYTE(src); |
3834 | src = 1 << (src & 7); |
3835 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
3836 | PC++; |
3837 | PRE_IO |
3838 | READ_BYTE_F(adr, res) |
3839 | flag_NotZ = res & src; |
3840 | POST_IO |
3841 | RET(16) |
3842 | } |
3843 | |
3844 | // BTSTn |
3845 | OPCODE(0x083B) |
3846 | { |
3847 | u32 adr, res; |
3848 | u32 src, dst; |
3849 | |
3850 | FETCH_BYTE(src); |
3851 | src = 1 << (src & 7); |
3852 | adr = (u32)(PC) - BasePC; |
3853 | DECODE_EXT_WORD |
3854 | PRE_IO |
3855 | READ_BYTE_F(adr, res) |
3856 | flag_NotZ = res & src; |
3857 | POST_IO |
3858 | RET(18) |
3859 | } |
3860 | |
3861 | // BTSTn |
3862 | OPCODE(0x081F) |
3863 | { |
3864 | u32 adr, res; |
3865 | u32 src, dst; |
3866 | |
3867 | FETCH_BYTE(src); |
3868 | src = 1 << (src & 7); |
3869 | adr = AREG(7); |
3870 | AREG(7) += 2; |
3871 | PRE_IO |
3872 | READ_BYTE_F(adr, res) |
3873 | flag_NotZ = res & src; |
3874 | POST_IO |
3875 | RET(12) |
3876 | } |
3877 | |
3878 | // BTSTn |
3879 | OPCODE(0x0827) |
3880 | { |
3881 | u32 adr, res; |
3882 | u32 src, dst; |
3883 | |
3884 | FETCH_BYTE(src); |
3885 | src = 1 << (src & 7); |
3886 | adr = AREG(7) - 2; |
3887 | AREG(7) = adr; |
3888 | PRE_IO |
3889 | READ_BYTE_F(adr, res) |
3890 | flag_NotZ = res & src; |
3891 | POST_IO |
3892 | RET(14) |
3893 | } |
3894 | |
3895 | // BCHGn |
3896 | OPCODE(0x0840) |
3897 | { |
3898 | u32 adr, res; |
3899 | u32 src, dst; |
3900 | |
3901 | FETCH_BYTE(src); |
3902 | src = 1 << (src & 31); |
3903 | res = DREGu32((Opcode >> 0) & 7); |
3904 | flag_NotZ = res & src; |
3905 | res ^= src; |
3906 | DREGu32((Opcode >> 0) & 7) = res; |
3907 | RET(12) |
3908 | } |
3909 | |
3910 | // BCHGn |
3911 | OPCODE(0x0850) |
3912 | { |
3913 | u32 adr, res; |
3914 | u32 src, dst; |
3915 | |
3916 | FETCH_BYTE(src); |
3917 | src = 1 << (src & 7); |
3918 | adr = AREG((Opcode >> 0) & 7); |
3919 | PRE_IO |
3920 | READ_BYTE_F(adr, res) |
3921 | flag_NotZ = res & src; |
3922 | res ^= src; |
3923 | WRITE_BYTE_F(adr, res) |
3924 | POST_IO |
3925 | RET(16) |
3926 | } |
3927 | |
3928 | // BCHGn |
3929 | OPCODE(0x0858) |
3930 | { |
3931 | u32 adr, res; |
3932 | u32 src, dst; |
3933 | |
3934 | FETCH_BYTE(src); |
3935 | src = 1 << (src & 7); |
3936 | adr = AREG((Opcode >> 0) & 7); |
3937 | AREG((Opcode >> 0) & 7) += 1; |
3938 | PRE_IO |
3939 | READ_BYTE_F(adr, res) |
3940 | flag_NotZ = res & src; |
3941 | res ^= src; |
3942 | WRITE_BYTE_F(adr, res) |
3943 | POST_IO |
3944 | RET(16) |
3945 | } |
3946 | |
3947 | // BCHGn |
3948 | OPCODE(0x0860) |
3949 | { |
3950 | u32 adr, res; |
3951 | u32 src, dst; |
3952 | |
3953 | FETCH_BYTE(src); |
3954 | src = 1 << (src & 7); |
3955 | adr = AREG((Opcode >> 0) & 7) - 1; |
3956 | AREG((Opcode >> 0) & 7) = adr; |
3957 | PRE_IO |
3958 | READ_BYTE_F(adr, res) |
3959 | flag_NotZ = res & src; |
3960 | res ^= src; |
3961 | WRITE_BYTE_F(adr, res) |
3962 | POST_IO |
3963 | RET(18) |
3964 | } |
3965 | |
3966 | // BCHGn |
3967 | OPCODE(0x0868) |
3968 | { |
3969 | u32 adr, res; |
3970 | u32 src, dst; |
3971 | |
3972 | FETCH_BYTE(src); |
3973 | src = 1 << (src & 7); |
3974 | FETCH_SWORD(adr); |
3975 | adr += AREG((Opcode >> 0) & 7); |
3976 | PRE_IO |
3977 | READ_BYTE_F(adr, res) |
3978 | flag_NotZ = res & src; |
3979 | res ^= src; |
3980 | WRITE_BYTE_F(adr, res) |
3981 | POST_IO |
3982 | RET(20) |
3983 | } |
3984 | |
3985 | // BCHGn |
3986 | OPCODE(0x0870) |
3987 | { |
3988 | u32 adr, res; |
3989 | u32 src, dst; |
3990 | |
3991 | FETCH_BYTE(src); |
3992 | src = 1 << (src & 7); |
3993 | adr = AREG((Opcode >> 0) & 7); |
3994 | DECODE_EXT_WORD |
3995 | PRE_IO |
3996 | READ_BYTE_F(adr, res) |
3997 | flag_NotZ = res & src; |
3998 | res ^= src; |
3999 | WRITE_BYTE_F(adr, res) |
4000 | POST_IO |
4001 | RET(22) |
4002 | } |
4003 | |
4004 | // BCHGn |
4005 | OPCODE(0x0878) |
4006 | { |
4007 | u32 adr, res; |
4008 | u32 src, dst; |
4009 | |
4010 | FETCH_BYTE(src); |
4011 | src = 1 << (src & 7); |
4012 | FETCH_SWORD(adr); |
4013 | PRE_IO |
4014 | READ_BYTE_F(adr, res) |
4015 | flag_NotZ = res & src; |
4016 | res ^= src; |
4017 | WRITE_BYTE_F(adr, res) |
4018 | POST_IO |
4019 | RET(20) |
4020 | } |
4021 | |
4022 | // BCHGn |
4023 | OPCODE(0x0879) |
4024 | { |
4025 | u32 adr, res; |
4026 | u32 src, dst; |
4027 | |
4028 | FETCH_BYTE(src); |
4029 | src = 1 << (src & 7); |
4030 | FETCH_LONG(adr); |
4031 | PRE_IO |
4032 | READ_BYTE_F(adr, res) |
4033 | flag_NotZ = res & src; |
4034 | res ^= src; |
4035 | WRITE_BYTE_F(adr, res) |
4036 | POST_IO |
4037 | RET(24) |
4038 | } |
4039 | |
4040 | // BCHGn |
4041 | OPCODE(0x085F) |
4042 | { |
4043 | u32 adr, res; |
4044 | u32 src, dst; |
4045 | |
4046 | FETCH_BYTE(src); |
4047 | src = 1 << (src & 7); |
4048 | adr = AREG(7); |
4049 | AREG(7) += 2; |
4050 | PRE_IO |
4051 | READ_BYTE_F(adr, res) |
4052 | flag_NotZ = res & src; |
4053 | res ^= src; |
4054 | WRITE_BYTE_F(adr, res) |
4055 | POST_IO |
4056 | RET(16) |
4057 | } |
4058 | |
4059 | // BCHGn |
4060 | OPCODE(0x0867) |
4061 | { |
4062 | u32 adr, res; |
4063 | u32 src, dst; |
4064 | |
4065 | FETCH_BYTE(src); |
4066 | src = 1 << (src & 7); |
4067 | adr = AREG(7) - 2; |
4068 | AREG(7) = adr; |
4069 | PRE_IO |
4070 | READ_BYTE_F(adr, res) |
4071 | flag_NotZ = res & src; |
4072 | res ^= src; |
4073 | WRITE_BYTE_F(adr, res) |
4074 | POST_IO |
4075 | RET(18) |
4076 | } |
4077 | |
4078 | // BCLRn |
4079 | OPCODE(0x0880) |
4080 | { |
4081 | u32 adr, res; |
4082 | u32 src, dst; |
4083 | |
4084 | FETCH_BYTE(src); |
4085 | src = 1 << (src & 31); |
4086 | res = DREGu32((Opcode >> 0) & 7); |
4087 | flag_NotZ = res & src; |
4088 | res &= ~src; |
4089 | DREGu32((Opcode >> 0) & 7) = res; |
4090 | RET(14) |
4091 | } |
4092 | |
4093 | // BCLRn |
4094 | OPCODE(0x0890) |
4095 | { |
4096 | u32 adr, res; |
4097 | u32 src, dst; |
4098 | |
4099 | FETCH_BYTE(src); |
4100 | src = 1 << (src & 7); |
4101 | adr = AREG((Opcode >> 0) & 7); |
4102 | PRE_IO |
4103 | READ_BYTE_F(adr, res) |
4104 | flag_NotZ = res & src; |
4105 | res &= ~src; |
4106 | WRITE_BYTE_F(adr, res) |
4107 | POST_IO |
4108 | RET(16) |
4109 | } |
4110 | |
4111 | // BCLRn |
4112 | OPCODE(0x0898) |
4113 | { |
4114 | u32 adr, res; |
4115 | u32 src, dst; |
4116 | |
4117 | FETCH_BYTE(src); |
4118 | src = 1 << (src & 7); |
4119 | adr = AREG((Opcode >> 0) & 7); |
4120 | AREG((Opcode >> 0) & 7) += 1; |
4121 | PRE_IO |
4122 | READ_BYTE_F(adr, res) |
4123 | flag_NotZ = res & src; |
4124 | res &= ~src; |
4125 | WRITE_BYTE_F(adr, res) |
4126 | POST_IO |
4127 | RET(16) |
4128 | } |
4129 | |
4130 | // BCLRn |
4131 | OPCODE(0x08A0) |
4132 | { |
4133 | u32 adr, res; |
4134 | u32 src, dst; |
4135 | |
4136 | FETCH_BYTE(src); |
4137 | src = 1 << (src & 7); |
4138 | adr = AREG((Opcode >> 0) & 7) - 1; |
4139 | AREG((Opcode >> 0) & 7) = adr; |
4140 | PRE_IO |
4141 | READ_BYTE_F(adr, res) |
4142 | flag_NotZ = res & src; |
4143 | res &= ~src; |
4144 | WRITE_BYTE_F(adr, res) |
4145 | POST_IO |
4146 | RET(18) |
4147 | } |
4148 | |
4149 | // BCLRn |
4150 | OPCODE(0x08A8) |
4151 | { |
4152 | u32 adr, res; |
4153 | u32 src, dst; |
4154 | |
4155 | FETCH_BYTE(src); |
4156 | src = 1 << (src & 7); |
4157 | FETCH_SWORD(adr); |
4158 | adr += AREG((Opcode >> 0) & 7); |
4159 | PRE_IO |
4160 | READ_BYTE_F(adr, res) |
4161 | flag_NotZ = res & src; |
4162 | res &= ~src; |
4163 | WRITE_BYTE_F(adr, res) |
4164 | POST_IO |
4165 | RET(20) |
4166 | } |
4167 | |
4168 | // BCLRn |
4169 | OPCODE(0x08B0) |
4170 | { |
4171 | u32 adr, res; |
4172 | u32 src, dst; |
4173 | |
4174 | FETCH_BYTE(src); |
4175 | src = 1 << (src & 7); |
4176 | adr = AREG((Opcode >> 0) & 7); |
4177 | DECODE_EXT_WORD |
4178 | PRE_IO |
4179 | READ_BYTE_F(adr, res) |
4180 | flag_NotZ = res & src; |
4181 | res &= ~src; |
4182 | WRITE_BYTE_F(adr, res) |
4183 | POST_IO |
4184 | RET(22) |
4185 | } |
4186 | |
4187 | // BCLRn |
4188 | OPCODE(0x08B8) |
4189 | { |
4190 | u32 adr, res; |
4191 | u32 src, dst; |
4192 | |
4193 | FETCH_BYTE(src); |
4194 | src = 1 << (src & 7); |
4195 | FETCH_SWORD(adr); |
4196 | PRE_IO |
4197 | READ_BYTE_F(adr, res) |
4198 | flag_NotZ = res & src; |
4199 | res &= ~src; |
4200 | WRITE_BYTE_F(adr, res) |
4201 | POST_IO |
4202 | RET(20) |
4203 | } |
4204 | |
4205 | // BCLRn |
4206 | OPCODE(0x08B9) |
4207 | { |
4208 | u32 adr, res; |
4209 | u32 src, dst; |
4210 | |
4211 | FETCH_BYTE(src); |
4212 | src = 1 << (src & 7); |
4213 | FETCH_LONG(adr); |
4214 | PRE_IO |
4215 | READ_BYTE_F(adr, res) |
4216 | flag_NotZ = res & src; |
4217 | res &= ~src; |
4218 | WRITE_BYTE_F(adr, res) |
4219 | POST_IO |
4220 | RET(24) |
4221 | } |
4222 | |
4223 | // BCLRn |
4224 | OPCODE(0x089F) |
4225 | { |
4226 | u32 adr, res; |
4227 | u32 src, dst; |
4228 | |
4229 | FETCH_BYTE(src); |
4230 | src = 1 << (src & 7); |
4231 | adr = AREG(7); |
4232 | AREG(7) += 2; |
4233 | PRE_IO |
4234 | READ_BYTE_F(adr, res) |
4235 | flag_NotZ = res & src; |
4236 | res &= ~src; |
4237 | WRITE_BYTE_F(adr, res) |
4238 | POST_IO |
4239 | RET(16) |
4240 | } |
4241 | |
4242 | // BCLRn |
4243 | OPCODE(0x08A7) |
4244 | { |
4245 | u32 adr, res; |
4246 | u32 src, dst; |
4247 | |
4248 | FETCH_BYTE(src); |
4249 | src = 1 << (src & 7); |
4250 | adr = AREG(7) - 2; |
4251 | AREG(7) = adr; |
4252 | PRE_IO |
4253 | READ_BYTE_F(adr, res) |
4254 | flag_NotZ = res & src; |
4255 | res &= ~src; |
4256 | WRITE_BYTE_F(adr, res) |
4257 | POST_IO |
4258 | RET(18) |
4259 | } |
4260 | |
4261 | // BSETn |
4262 | OPCODE(0x08C0) |
4263 | { |
4264 | u32 adr, res; |
4265 | u32 src, dst; |
4266 | |
4267 | FETCH_BYTE(src); |
4268 | src = 1 << (src & 31); |
4269 | res = DREGu32((Opcode >> 0) & 7); |
4270 | flag_NotZ = res & src; |
4271 | res |= src; |
4272 | DREGu32((Opcode >> 0) & 7) = res; |
4273 | RET(12) |
4274 | } |
4275 | |
4276 | // BSETn |
4277 | OPCODE(0x08D0) |
4278 | { |
4279 | u32 adr, res; |
4280 | u32 src, dst; |
4281 | |
4282 | FETCH_BYTE(src); |
4283 | src = 1 << (src & 7); |
4284 | adr = AREG((Opcode >> 0) & 7); |
4285 | PRE_IO |
4286 | READ_BYTE_F(adr, res) |
4287 | flag_NotZ = res & src; |
4288 | res |= src; |
4289 | WRITE_BYTE_F(adr, res) |
4290 | POST_IO |
4291 | RET(16) |
4292 | } |
4293 | |
4294 | // BSETn |
4295 | OPCODE(0x08D8) |
4296 | { |
4297 | u32 adr, res; |
4298 | u32 src, dst; |
4299 | |
4300 | FETCH_BYTE(src); |
4301 | src = 1 << (src & 7); |
4302 | adr = AREG((Opcode >> 0) & 7); |
4303 | AREG((Opcode >> 0) & 7) += 1; |
4304 | PRE_IO |
4305 | READ_BYTE_F(adr, res) |
4306 | flag_NotZ = res & src; |
4307 | res |= src; |
4308 | WRITE_BYTE_F(adr, res) |
4309 | POST_IO |
4310 | RET(16) |
4311 | } |
4312 | |
4313 | // BSETn |
4314 | OPCODE(0x08E0) |
4315 | { |
4316 | u32 adr, res; |
4317 | u32 src, dst; |
4318 | |
4319 | FETCH_BYTE(src); |
4320 | src = 1 << (src & 7); |
4321 | adr = AREG((Opcode >> 0) & 7) - 1; |
4322 | AREG((Opcode >> 0) & 7) = adr; |
4323 | PRE_IO |
4324 | READ_BYTE_F(adr, res) |
4325 | flag_NotZ = res & src; |
4326 | res |= src; |
4327 | WRITE_BYTE_F(adr, res) |
4328 | POST_IO |
4329 | RET(18) |
4330 | } |
4331 | |
4332 | // BSETn |
4333 | OPCODE(0x08E8) |
4334 | { |
4335 | u32 adr, res; |
4336 | u32 src, dst; |
4337 | |
4338 | FETCH_BYTE(src); |
4339 | src = 1 << (src & 7); |
4340 | FETCH_SWORD(adr); |
4341 | adr += AREG((Opcode >> 0) & 7); |
4342 | PRE_IO |
4343 | READ_BYTE_F(adr, res) |
4344 | flag_NotZ = res & src; |
4345 | res |= src; |
4346 | WRITE_BYTE_F(adr, res) |
4347 | POST_IO |
4348 | RET(20) |
4349 | } |
4350 | |
4351 | // BSETn |
4352 | OPCODE(0x08F0) |
4353 | { |
4354 | u32 adr, res; |
4355 | u32 src, dst; |
4356 | |
4357 | FETCH_BYTE(src); |
4358 | src = 1 << (src & 7); |
4359 | adr = AREG((Opcode >> 0) & 7); |
4360 | DECODE_EXT_WORD |
4361 | PRE_IO |
4362 | READ_BYTE_F(adr, res) |
4363 | flag_NotZ = res & src; |
4364 | res |= src; |
4365 | WRITE_BYTE_F(adr, res) |
4366 | POST_IO |
4367 | RET(22) |
4368 | } |
4369 | |
4370 | // BSETn |
4371 | OPCODE(0x08F8) |
4372 | { |
4373 | u32 adr, res; |
4374 | u32 src, dst; |
4375 | |
4376 | FETCH_BYTE(src); |
4377 | src = 1 << (src & 7); |
4378 | FETCH_SWORD(adr); |
4379 | PRE_IO |
4380 | READ_BYTE_F(adr, res) |
4381 | flag_NotZ = res & src; |
4382 | res |= src; |
4383 | WRITE_BYTE_F(adr, res) |
4384 | POST_IO |
4385 | RET(20) |
4386 | } |
4387 | |
4388 | // BSETn |
4389 | OPCODE(0x08F9) |
4390 | { |
4391 | u32 adr, res; |
4392 | u32 src, dst; |
4393 | |
4394 | FETCH_BYTE(src); |
4395 | src = 1 << (src & 7); |
4396 | FETCH_LONG(adr); |
4397 | PRE_IO |
4398 | READ_BYTE_F(adr, res) |
4399 | flag_NotZ = res & src; |
4400 | res |= src; |
4401 | WRITE_BYTE_F(adr, res) |
4402 | POST_IO |
4403 | RET(24) |
4404 | } |
4405 | |
4406 | // BSETn |
4407 | OPCODE(0x08DF) |
4408 | { |
4409 | u32 adr, res; |
4410 | u32 src, dst; |
4411 | |
4412 | FETCH_BYTE(src); |
4413 | src = 1 << (src & 7); |
4414 | adr = AREG(7); |
4415 | AREG(7) += 2; |
4416 | PRE_IO |
4417 | READ_BYTE_F(adr, res) |
4418 | flag_NotZ = res & src; |
4419 | res |= src; |
4420 | WRITE_BYTE_F(adr, res) |
4421 | POST_IO |
4422 | RET(16) |
4423 | } |
4424 | |
4425 | // BSETn |
4426 | OPCODE(0x08E7) |
4427 | { |
4428 | u32 adr, res; |
4429 | u32 src, dst; |
4430 | |
4431 | FETCH_BYTE(src); |
4432 | src = 1 << (src & 7); |
4433 | adr = AREG(7) - 2; |
4434 | AREG(7) = adr; |
4435 | PRE_IO |
4436 | READ_BYTE_F(adr, res) |
4437 | flag_NotZ = res & src; |
4438 | res |= src; |
4439 | WRITE_BYTE_F(adr, res) |
4440 | POST_IO |
4441 | RET(18) |
4442 | } |
4443 | |
4444 | // BTST |
4445 | OPCODE(0x0100) |
4446 | { |
4447 | u32 adr, res; |
4448 | u32 src, dst; |
4449 | |
4450 | src = DREGu32((Opcode >> 9) & 7); |
4451 | src = 1 << (src & 31); |
4452 | res = DREGu32((Opcode >> 0) & 7); |
4453 | flag_NotZ = res & src; |
4454 | RET(6) |
4455 | } |
4456 | |
4457 | // BTST |
4458 | OPCODE(0x0110) |
4459 | { |
4460 | u32 adr, res; |
4461 | u32 src, dst; |
4462 | |
4463 | src = DREGu8((Opcode >> 9) & 7); |
4464 | src = 1 << (src & 7); |
4465 | adr = AREG((Opcode >> 0) & 7); |
4466 | PRE_IO |
4467 | READ_BYTE_F(adr, res) |
4468 | flag_NotZ = res & src; |
4469 | POST_IO |
4470 | RET(8) |
4471 | } |
4472 | |
4473 | // BTST |
4474 | OPCODE(0x0118) |
4475 | { |
4476 | u32 adr, res; |
4477 | u32 src, dst; |
4478 | |
4479 | src = DREGu8((Opcode >> 9) & 7); |
4480 | src = 1 << (src & 7); |
4481 | adr = AREG((Opcode >> 0) & 7); |
4482 | AREG((Opcode >> 0) & 7) += 1; |
4483 | PRE_IO |
4484 | READ_BYTE_F(adr, res) |
4485 | flag_NotZ = res & src; |
4486 | POST_IO |
4487 | RET(8) |
4488 | } |
4489 | |
4490 | // BTST |
4491 | OPCODE(0x0120) |
4492 | { |
4493 | u32 adr, res; |
4494 | u32 src, dst; |
4495 | |
4496 | src = DREGu8((Opcode >> 9) & 7); |
4497 | src = 1 << (src & 7); |
4498 | adr = AREG((Opcode >> 0) & 7) - 1; |
4499 | AREG((Opcode >> 0) & 7) = adr; |
4500 | PRE_IO |
4501 | READ_BYTE_F(adr, res) |
4502 | flag_NotZ = res & src; |
4503 | POST_IO |
4504 | RET(10) |
4505 | } |
4506 | |
4507 | // BTST |
4508 | OPCODE(0x0128) |
4509 | { |
4510 | u32 adr, res; |
4511 | u32 src, dst; |
4512 | |
4513 | src = DREGu8((Opcode >> 9) & 7); |
4514 | src = 1 << (src & 7); |
4515 | FETCH_SWORD(adr); |
4516 | adr += AREG((Opcode >> 0) & 7); |
4517 | PRE_IO |
4518 | READ_BYTE_F(adr, res) |
4519 | flag_NotZ = res & src; |
4520 | POST_IO |
4521 | RET(12) |
4522 | } |
4523 | |
4524 | // BTST |
4525 | OPCODE(0x0130) |
4526 | { |
4527 | u32 adr, res; |
4528 | u32 src, dst; |
4529 | |
4530 | src = DREGu8((Opcode >> 9) & 7); |
4531 | src = 1 << (src & 7); |
4532 | adr = AREG((Opcode >> 0) & 7); |
4533 | DECODE_EXT_WORD |
4534 | PRE_IO |
4535 | READ_BYTE_F(adr, res) |
4536 | flag_NotZ = res & src; |
4537 | POST_IO |
4538 | RET(14) |
4539 | } |
4540 | |
4541 | // BTST |
4542 | OPCODE(0x0138) |
4543 | { |
4544 | u32 adr, res; |
4545 | u32 src, dst; |
4546 | |
4547 | src = DREGu8((Opcode >> 9) & 7); |
4548 | src = 1 << (src & 7); |
4549 | FETCH_SWORD(adr); |
4550 | PRE_IO |
4551 | READ_BYTE_F(adr, res) |
4552 | flag_NotZ = res & src; |
4553 | POST_IO |
4554 | RET(12) |
4555 | } |
4556 | |
4557 | // BTST |
4558 | OPCODE(0x0139) |
4559 | { |
4560 | u32 adr, res; |
4561 | u32 src, dst; |
4562 | |
4563 | src = DREGu8((Opcode >> 9) & 7); |
4564 | src = 1 << (src & 7); |
4565 | FETCH_LONG(adr); |
4566 | PRE_IO |
4567 | READ_BYTE_F(adr, res) |
4568 | flag_NotZ = res & src; |
4569 | POST_IO |
4570 | RET(16) |
4571 | } |
4572 | |
4573 | // BTST |
4574 | OPCODE(0x013A) |
4575 | { |
4576 | u32 adr, res; |
4577 | u32 src, dst; |
4578 | |
4579 | src = DREGu8((Opcode >> 9) & 7); |
4580 | src = 1 << (src & 7); |
4581 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
4582 | PC++; |
4583 | PRE_IO |
4584 | READ_BYTE_F(adr, res) |
4585 | flag_NotZ = res & src; |
4586 | POST_IO |
4587 | RET(12) |
4588 | } |
4589 | |
4590 | // BTST |
4591 | OPCODE(0x013B) |
4592 | { |
4593 | u32 adr, res; |
4594 | u32 src, dst; |
4595 | |
4596 | src = DREGu8((Opcode >> 9) & 7); |
4597 | src = 1 << (src & 7); |
4598 | adr = (u32)(PC) - BasePC; |
4599 | DECODE_EXT_WORD |
4600 | PRE_IO |
4601 | READ_BYTE_F(adr, res) |
4602 | flag_NotZ = res & src; |
4603 | POST_IO |
4604 | RET(14) |
4605 | } |
4606 | |
4607 | // BTST |
4608 | OPCODE(0x013C) |
4609 | { |
4610 | u32 adr, res; |
4611 | u32 src, dst; |
4612 | |
4613 | src = DREGu8((Opcode >> 9) & 7); |
4614 | src = 1 << (src & 7); |
4615 | FETCH_BYTE(res); |
4616 | flag_NotZ = res & src; |
4617 | RET(8) |
4618 | } |
4619 | |
4620 | // BTST |
4621 | OPCODE(0x011F) |
4622 | { |
4623 | u32 adr, res; |
4624 | u32 src, dst; |
4625 | |
4626 | src = DREGu8((Opcode >> 9) & 7); |
4627 | src = 1 << (src & 7); |
4628 | adr = AREG(7); |
4629 | AREG(7) += 2; |
4630 | PRE_IO |
4631 | READ_BYTE_F(adr, res) |
4632 | flag_NotZ = res & src; |
4633 | POST_IO |
4634 | RET(8) |
4635 | } |
4636 | |
4637 | // BTST |
4638 | OPCODE(0x0127) |
4639 | { |
4640 | u32 adr, res; |
4641 | u32 src, dst; |
4642 | |
4643 | src = DREGu8((Opcode >> 9) & 7); |
4644 | src = 1 << (src & 7); |
4645 | adr = AREG(7) - 2; |
4646 | AREG(7) = adr; |
4647 | PRE_IO |
4648 | READ_BYTE_F(adr, res) |
4649 | flag_NotZ = res & src; |
4650 | POST_IO |
4651 | RET(10) |
4652 | } |
4653 | |
4654 | // BCHG |
4655 | OPCODE(0x0140) |
4656 | { |
4657 | u32 adr, res; |
4658 | u32 src, dst; |
4659 | |
4660 | src = DREGu32((Opcode >> 9) & 7); |
4661 | src = 1 << (src & 31); |
4662 | res = DREGu32((Opcode >> 0) & 7); |
4663 | flag_NotZ = res & src; |
4664 | res ^= src; |
4665 | DREGu32((Opcode >> 0) & 7) = res; |
4666 | RET(8) |
4667 | } |
4668 | |
4669 | // BCHG |
4670 | OPCODE(0x0150) |
4671 | { |
4672 | u32 adr, res; |
4673 | u32 src, dst; |
4674 | |
4675 | src = DREGu8((Opcode >> 9) & 7); |
4676 | src = 1 << (src & 7); |
4677 | adr = AREG((Opcode >> 0) & 7); |
4678 | PRE_IO |
4679 | READ_BYTE_F(adr, res) |
4680 | flag_NotZ = res & src; |
4681 | res ^= src; |
4682 | WRITE_BYTE_F(adr, res) |
4683 | POST_IO |
4684 | RET(12) |
4685 | } |
4686 | |
4687 | // BCHG |
4688 | OPCODE(0x0158) |
4689 | { |
4690 | u32 adr, res; |
4691 | u32 src, dst; |
4692 | |
4693 | src = DREGu8((Opcode >> 9) & 7); |
4694 | src = 1 << (src & 7); |
4695 | adr = AREG((Opcode >> 0) & 7); |
4696 | AREG((Opcode >> 0) & 7) += 1; |
4697 | PRE_IO |
4698 | READ_BYTE_F(adr, res) |
4699 | flag_NotZ = res & src; |
4700 | res ^= src; |
4701 | WRITE_BYTE_F(adr, res) |
4702 | POST_IO |
4703 | RET(12) |
4704 | } |
4705 | |
4706 | // BCHG |
4707 | OPCODE(0x0160) |
4708 | { |
4709 | u32 adr, res; |
4710 | u32 src, dst; |
4711 | |
4712 | src = DREGu8((Opcode >> 9) & 7); |
4713 | src = 1 << (src & 7); |
4714 | adr = AREG((Opcode >> 0) & 7) - 1; |
4715 | AREG((Opcode >> 0) & 7) = adr; |
4716 | PRE_IO |
4717 | READ_BYTE_F(adr, res) |
4718 | flag_NotZ = res & src; |
4719 | res ^= src; |
4720 | WRITE_BYTE_F(adr, res) |
4721 | POST_IO |
4722 | RET(14) |
4723 | } |
4724 | |
4725 | // BCHG |
4726 | OPCODE(0x0168) |
4727 | { |
4728 | u32 adr, res; |
4729 | u32 src, dst; |
4730 | |
4731 | src = DREGu8((Opcode >> 9) & 7); |
4732 | src = 1 << (src & 7); |
4733 | FETCH_SWORD(adr); |
4734 | adr += AREG((Opcode >> 0) & 7); |
4735 | PRE_IO |
4736 | READ_BYTE_F(adr, res) |
4737 | flag_NotZ = res & src; |
4738 | res ^= src; |
4739 | WRITE_BYTE_F(adr, res) |
4740 | POST_IO |
4741 | RET(16) |
4742 | } |
4743 | |
4744 | // BCHG |
4745 | OPCODE(0x0170) |
4746 | { |
4747 | u32 adr, res; |
4748 | u32 src, dst; |
4749 | |
4750 | src = DREGu8((Opcode >> 9) & 7); |
4751 | src = 1 << (src & 7); |
4752 | adr = AREG((Opcode >> 0) & 7); |
4753 | DECODE_EXT_WORD |
4754 | PRE_IO |
4755 | READ_BYTE_F(adr, res) |
4756 | flag_NotZ = res & src; |
4757 | res ^= src; |
4758 | WRITE_BYTE_F(adr, res) |
4759 | POST_IO |
4760 | RET(18) |
4761 | } |
4762 | |
4763 | // BCHG |
4764 | OPCODE(0x0178) |
4765 | { |
4766 | u32 adr, res; |
4767 | u32 src, dst; |
4768 | |
4769 | src = DREGu8((Opcode >> 9) & 7); |
4770 | src = 1 << (src & 7); |
4771 | FETCH_SWORD(adr); |
4772 | PRE_IO |
4773 | READ_BYTE_F(adr, res) |
4774 | flag_NotZ = res & src; |
4775 | res ^= src; |
4776 | WRITE_BYTE_F(adr, res) |
4777 | POST_IO |
4778 | RET(16) |
4779 | } |
4780 | |
4781 | // BCHG |
4782 | OPCODE(0x0179) |
4783 | { |
4784 | u32 adr, res; |
4785 | u32 src, dst; |
4786 | |
4787 | src = DREGu8((Opcode >> 9) & 7); |
4788 | src = 1 << (src & 7); |
4789 | FETCH_LONG(adr); |
4790 | PRE_IO |
4791 | READ_BYTE_F(adr, res) |
4792 | flag_NotZ = res & src; |
4793 | res ^= src; |
4794 | WRITE_BYTE_F(adr, res) |
4795 | POST_IO |
4796 | RET(20) |
4797 | } |
4798 | |
4799 | // BCHG |
4800 | OPCODE(0x015F) |
4801 | { |
4802 | u32 adr, res; |
4803 | u32 src, dst; |
4804 | |
4805 | src = DREGu8((Opcode >> 9) & 7); |
4806 | src = 1 << (src & 7); |
4807 | adr = AREG(7); |
4808 | AREG(7) += 2; |
4809 | PRE_IO |
4810 | READ_BYTE_F(adr, res) |
4811 | flag_NotZ = res & src; |
4812 | res ^= src; |
4813 | WRITE_BYTE_F(adr, res) |
4814 | POST_IO |
4815 | RET(12) |
4816 | } |
4817 | |
4818 | // BCHG |
4819 | OPCODE(0x0167) |
4820 | { |
4821 | u32 adr, res; |
4822 | u32 src, dst; |
4823 | |
4824 | src = DREGu8((Opcode >> 9) & 7); |
4825 | src = 1 << (src & 7); |
4826 | adr = AREG(7) - 2; |
4827 | AREG(7) = adr; |
4828 | PRE_IO |
4829 | READ_BYTE_F(adr, res) |
4830 | flag_NotZ = res & src; |
4831 | res ^= src; |
4832 | WRITE_BYTE_F(adr, res) |
4833 | POST_IO |
4834 | RET(14) |
4835 | } |
4836 | |
4837 | // BCLR |
4838 | OPCODE(0x0180) |
4839 | { |
4840 | u32 adr, res; |
4841 | u32 src, dst; |
4842 | |
4843 | src = DREGu32((Opcode >> 9) & 7); |
4844 | src = 1 << (src & 31); |
4845 | res = DREGu32((Opcode >> 0) & 7); |
4846 | flag_NotZ = res & src; |
4847 | res &= ~src; |
4848 | DREGu32((Opcode >> 0) & 7) = res; |
4849 | RET(10) |
4850 | } |
4851 | |
4852 | // BCLR |
4853 | OPCODE(0x0190) |
4854 | { |
4855 | u32 adr, res; |
4856 | u32 src, dst; |
4857 | |
4858 | src = DREGu8((Opcode >> 9) & 7); |
4859 | src = 1 << (src & 7); |
4860 | adr = AREG((Opcode >> 0) & 7); |
4861 | PRE_IO |
4862 | READ_BYTE_F(adr, res) |
4863 | flag_NotZ = res & src; |
4864 | res &= ~src; |
4865 | WRITE_BYTE_F(adr, res) |
4866 | POST_IO |
4867 | RET(12) |
4868 | } |
4869 | |
4870 | // BCLR |
4871 | OPCODE(0x0198) |
4872 | { |
4873 | u32 adr, res; |
4874 | u32 src, dst; |
4875 | |
4876 | src = DREGu8((Opcode >> 9) & 7); |
4877 | src = 1 << (src & 7); |
4878 | adr = AREG((Opcode >> 0) & 7); |
4879 | AREG((Opcode >> 0) & 7) += 1; |
4880 | PRE_IO |
4881 | READ_BYTE_F(adr, res) |
4882 | flag_NotZ = res & src; |
4883 | res &= ~src; |
4884 | WRITE_BYTE_F(adr, res) |
4885 | POST_IO |
4886 | RET(12) |
4887 | } |
4888 | |
4889 | // BCLR |
4890 | OPCODE(0x01A0) |
4891 | { |
4892 | u32 adr, res; |
4893 | u32 src, dst; |
4894 | |
4895 | src = DREGu8((Opcode >> 9) & 7); |
4896 | src = 1 << (src & 7); |
4897 | adr = AREG((Opcode >> 0) & 7) - 1; |
4898 | AREG((Opcode >> 0) & 7) = adr; |
4899 | PRE_IO |
4900 | READ_BYTE_F(adr, res) |
4901 | flag_NotZ = res & src; |
4902 | res &= ~src; |
4903 | WRITE_BYTE_F(adr, res) |
4904 | POST_IO |
4905 | RET(14) |
4906 | } |
4907 | |
4908 | // BCLR |
4909 | OPCODE(0x01A8) |
4910 | { |
4911 | u32 adr, res; |
4912 | u32 src, dst; |
4913 | |
4914 | src = DREGu8((Opcode >> 9) & 7); |
4915 | src = 1 << (src & 7); |
4916 | FETCH_SWORD(adr); |
4917 | adr += AREG((Opcode >> 0) & 7); |
4918 | PRE_IO |
4919 | READ_BYTE_F(adr, res) |
4920 | flag_NotZ = res & src; |
4921 | res &= ~src; |
4922 | WRITE_BYTE_F(adr, res) |
4923 | POST_IO |
4924 | RET(16) |
4925 | } |
4926 | |
4927 | // BCLR |
4928 | OPCODE(0x01B0) |
4929 | { |
4930 | u32 adr, res; |
4931 | u32 src, dst; |
4932 | |
4933 | src = DREGu8((Opcode >> 9) & 7); |
4934 | src = 1 << (src & 7); |
4935 | adr = AREG((Opcode >> 0) & 7); |
4936 | DECODE_EXT_WORD |
4937 | PRE_IO |
4938 | READ_BYTE_F(adr, res) |
4939 | flag_NotZ = res & src; |
4940 | res &= ~src; |
4941 | WRITE_BYTE_F(adr, res) |
4942 | POST_IO |
4943 | RET(18) |
4944 | } |
4945 | |
4946 | // BCLR |
4947 | OPCODE(0x01B8) |
4948 | { |
4949 | u32 adr, res; |
4950 | u32 src, dst; |
4951 | |
4952 | src = DREGu8((Opcode >> 9) & 7); |
4953 | src = 1 << (src & 7); |
4954 | FETCH_SWORD(adr); |
4955 | PRE_IO |
4956 | READ_BYTE_F(adr, res) |
4957 | flag_NotZ = res & src; |
4958 | res &= ~src; |
4959 | WRITE_BYTE_F(adr, res) |
4960 | POST_IO |
4961 | RET(16) |
4962 | } |
4963 | |
4964 | // BCLR |
4965 | OPCODE(0x01B9) |
4966 | { |
4967 | u32 adr, res; |
4968 | u32 src, dst; |
4969 | |
4970 | src = DREGu8((Opcode >> 9) & 7); |
4971 | src = 1 << (src & 7); |
4972 | FETCH_LONG(adr); |
4973 | PRE_IO |
4974 | READ_BYTE_F(adr, res) |
4975 | flag_NotZ = res & src; |
4976 | res &= ~src; |
4977 | WRITE_BYTE_F(adr, res) |
4978 | POST_IO |
4979 | RET(20) |
4980 | } |
4981 | |
4982 | // BCLR |
4983 | OPCODE(0x019F) |
4984 | { |
4985 | u32 adr, res; |
4986 | u32 src, dst; |
4987 | |
4988 | src = DREGu8((Opcode >> 9) & 7); |
4989 | src = 1 << (src & 7); |
4990 | adr = AREG(7); |
4991 | AREG(7) += 2; |
4992 | PRE_IO |
4993 | READ_BYTE_F(adr, res) |
4994 | flag_NotZ = res & src; |
4995 | res &= ~src; |
4996 | WRITE_BYTE_F(adr, res) |
4997 | POST_IO |
4998 | RET(12) |
4999 | } |
5000 | |
5001 | // BCLR |
5002 | OPCODE(0x01A7) |
5003 | { |
5004 | u32 adr, res; |
5005 | u32 src, dst; |
5006 | |
5007 | src = DREGu8((Opcode >> 9) & 7); |
5008 | src = 1 << (src & 7); |
5009 | adr = AREG(7) - 2; |
5010 | AREG(7) = adr; |
5011 | PRE_IO |
5012 | READ_BYTE_F(adr, res) |
5013 | flag_NotZ = res & src; |
5014 | res &= ~src; |
5015 | WRITE_BYTE_F(adr, res) |
5016 | POST_IO |
5017 | RET(14) |
5018 | } |
5019 | |
5020 | // BSET |
5021 | OPCODE(0x01C0) |
5022 | { |
5023 | u32 adr, res; |
5024 | u32 src, dst; |
5025 | |
5026 | src = DREGu32((Opcode >> 9) & 7); |
5027 | src = 1 << (src & 31); |
5028 | res = DREGu32((Opcode >> 0) & 7); |
5029 | flag_NotZ = res & src; |
5030 | res |= src; |
5031 | DREGu32((Opcode >> 0) & 7) = res; |
5032 | RET(8) |
5033 | } |
5034 | |
5035 | // BSET |
5036 | OPCODE(0x01D0) |
5037 | { |
5038 | u32 adr, res; |
5039 | u32 src, dst; |
5040 | |
5041 | src = DREGu8((Opcode >> 9) & 7); |
5042 | src = 1 << (src & 7); |
5043 | adr = AREG((Opcode >> 0) & 7); |
5044 | PRE_IO |
5045 | READ_BYTE_F(adr, res) |
5046 | flag_NotZ = res & src; |
5047 | res |= src; |
5048 | WRITE_BYTE_F(adr, res) |
5049 | POST_IO |
5050 | RET(12) |
5051 | } |
5052 | |
5053 | // BSET |
5054 | OPCODE(0x01D8) |
5055 | { |
5056 | u32 adr, res; |
5057 | u32 src, dst; |
5058 | |
5059 | src = DREGu8((Opcode >> 9) & 7); |
5060 | src = 1 << (src & 7); |
5061 | adr = AREG((Opcode >> 0) & 7); |
5062 | AREG((Opcode >> 0) & 7) += 1; |
5063 | PRE_IO |
5064 | READ_BYTE_F(adr, res) |
5065 | flag_NotZ = res & src; |
5066 | res |= src; |
5067 | WRITE_BYTE_F(adr, res) |
5068 | POST_IO |
5069 | RET(12) |
5070 | } |
5071 | |
5072 | // BSET |
5073 | OPCODE(0x01E0) |
5074 | { |
5075 | u32 adr, res; |
5076 | u32 src, dst; |
5077 | |
5078 | src = DREGu8((Opcode >> 9) & 7); |
5079 | src = 1 << (src & 7); |
5080 | adr = AREG((Opcode >> 0) & 7) - 1; |
5081 | AREG((Opcode >> 0) & 7) = adr; |
5082 | PRE_IO |
5083 | READ_BYTE_F(adr, res) |
5084 | flag_NotZ = res & src; |
5085 | res |= src; |
5086 | WRITE_BYTE_F(adr, res) |
5087 | POST_IO |
5088 | RET(14) |
5089 | } |
5090 | |
5091 | // BSET |
5092 | OPCODE(0x01E8) |
5093 | { |
5094 | u32 adr, res; |
5095 | u32 src, dst; |
5096 | |
5097 | src = DREGu8((Opcode >> 9) & 7); |
5098 | src = 1 << (src & 7); |
5099 | FETCH_SWORD(adr); |
5100 | adr += AREG((Opcode >> 0) & 7); |
5101 | PRE_IO |
5102 | READ_BYTE_F(adr, res) |
5103 | flag_NotZ = res & src; |
5104 | res |= src; |
5105 | WRITE_BYTE_F(adr, res) |
5106 | POST_IO |
5107 | RET(16) |
5108 | } |
5109 | |
5110 | // BSET |
5111 | OPCODE(0x01F0) |
5112 | { |
5113 | u32 adr, res; |
5114 | u32 src, dst; |
5115 | |
5116 | src = DREGu8((Opcode >> 9) & 7); |
5117 | src = 1 << (src & 7); |
5118 | adr = AREG((Opcode >> 0) & 7); |
5119 | DECODE_EXT_WORD |
5120 | PRE_IO |
5121 | READ_BYTE_F(adr, res) |
5122 | flag_NotZ = res & src; |
5123 | res |= src; |
5124 | WRITE_BYTE_F(adr, res) |
5125 | POST_IO |
5126 | RET(18) |
5127 | } |
5128 | |
5129 | // BSET |
5130 | OPCODE(0x01F8) |
5131 | { |
5132 | u32 adr, res; |
5133 | u32 src, dst; |
5134 | |
5135 | src = DREGu8((Opcode >> 9) & 7); |
5136 | src = 1 << (src & 7); |
5137 | FETCH_SWORD(adr); |
5138 | PRE_IO |
5139 | READ_BYTE_F(adr, res) |
5140 | flag_NotZ = res & src; |
5141 | res |= src; |
5142 | WRITE_BYTE_F(adr, res) |
5143 | POST_IO |
5144 | RET(16) |
5145 | } |
5146 | |
5147 | // BSET |
5148 | OPCODE(0x01F9) |
5149 | { |
5150 | u32 adr, res; |
5151 | u32 src, dst; |
5152 | |
5153 | src = DREGu8((Opcode >> 9) & 7); |
5154 | src = 1 << (src & 7); |
5155 | FETCH_LONG(adr); |
5156 | PRE_IO |
5157 | READ_BYTE_F(adr, res) |
5158 | flag_NotZ = res & src; |
5159 | res |= src; |
5160 | WRITE_BYTE_F(adr, res) |
5161 | POST_IO |
5162 | RET(20) |
5163 | } |
5164 | |
5165 | // BSET |
5166 | OPCODE(0x01DF) |
5167 | { |
5168 | u32 adr, res; |
5169 | u32 src, dst; |
5170 | |
5171 | src = DREGu8((Opcode >> 9) & 7); |
5172 | src = 1 << (src & 7); |
5173 | adr = AREG(7); |
5174 | AREG(7) += 2; |
5175 | PRE_IO |
5176 | READ_BYTE_F(adr, res) |
5177 | flag_NotZ = res & src; |
5178 | res |= src; |
5179 | WRITE_BYTE_F(adr, res) |
5180 | POST_IO |
5181 | RET(12) |
5182 | } |
5183 | |
5184 | // BSET |
5185 | OPCODE(0x01E7) |
5186 | { |
5187 | u32 adr, res; |
5188 | u32 src, dst; |
5189 | |
5190 | src = DREGu8((Opcode >> 9) & 7); |
5191 | src = 1 << (src & 7); |
5192 | adr = AREG(7) - 2; |
5193 | AREG(7) = adr; |
5194 | PRE_IO |
5195 | READ_BYTE_F(adr, res) |
5196 | flag_NotZ = res & src; |
5197 | res |= src; |
5198 | WRITE_BYTE_F(adr, res) |
5199 | POST_IO |
5200 | RET(14) |
5201 | } |
5202 | |
5203 | // MOVEPWaD |
5204 | OPCODE(0x0108) |
5205 | { |
5206 | u32 adr, res; |
5207 | u32 src, dst; |
5208 | |
5209 | FETCH_SWORD(adr); |
5210 | adr += AREG((Opcode >> 0) & 7); |
5211 | PRE_IO |
5212 | READ_BYTE_F(adr + 0, res) |
5213 | READ_BYTE_F(adr + 2, src) |
5214 | DREGu16((Opcode >> 9) & 7) = (res << 8) | src; |
5215 | POST_IO |
5216 | RET(24) |
5217 | } |
5218 | |
5219 | // MOVEPLaD |
5220 | OPCODE(0x0148) |
5221 | { |
5222 | u32 adr, res; |
5223 | u32 src, dst; |
5224 | |
5225 | FETCH_SWORD(adr); |
5226 | adr += AREG((Opcode >> 0) & 7); |
5227 | PRE_IO |
5228 | READ_BYTE_F(adr, res) |
5229 | res <<= 24; |
5230 | adr += 2; |
5231 | READ_BYTE_F(adr, src) |
5232 | res |= src << 16; |
5233 | adr += 2; |
5234 | READ_BYTE_F(adr, src) |
5235 | res |= src << 8; |
5236 | adr += 2; |
5237 | READ_BYTE_F(adr, src) |
5238 | DREG((Opcode >> 9) & 7) = res | src; |
5239 | POST_IO |
5240 | RET(32) |
5241 | } |
5242 | |
5243 | // MOVEPWDa |
5244 | OPCODE(0x0188) |
5245 | { |
5246 | u32 adr, res; |
5247 | u32 src, dst; |
5248 | |
5249 | res = DREGu32((Opcode >> 9) & 7); |
5250 | FETCH_SWORD(adr); |
5251 | adr += AREG((Opcode >> 0) & 7); |
5252 | PRE_IO |
5253 | WRITE_BYTE_F(adr + 0, res >> 8) |
5254 | WRITE_BYTE_F(adr + 2, res >> 0) |
5255 | POST_IO |
5256 | RET(24) |
5257 | } |
5258 | |
5259 | // MOVEPLDa |
5260 | OPCODE(0x01C8) |
5261 | { |
5262 | u32 adr, res; |
5263 | u32 src, dst; |
5264 | |
5265 | res = DREGu32((Opcode >> 9) & 7); |
5266 | FETCH_SWORD(adr); |
5267 | adr += AREG((Opcode >> 0) & 7); |
5268 | PRE_IO |
5269 | WRITE_BYTE_F(adr, res >> 24) |
5270 | adr += 2; |
5271 | WRITE_BYTE_F(adr, res >> 16) |
5272 | adr += 2; |
5273 | WRITE_BYTE_F(adr, res >> 8) |
5274 | adr += 2; |
5275 | WRITE_BYTE_F(adr, res >> 0) |
5276 | POST_IO |
5277 | RET(32) |
5278 | } |
5279 | |
5280 | // MOVEB |
5281 | OPCODE(0x1000) |
5282 | { |
5283 | u32 adr, res; |
5284 | u32 src, dst; |
5285 | |
5286 | res = DREGu8((Opcode >> 0) & 7); |
5287 | flag_C = 0; |
5288 | flag_V = 0; |
5289 | flag_NotZ = res; |
5290 | flag_N = res; |
5291 | DREGu8((Opcode >> 9) & 7) = res; |
5292 | RET(4) |
5293 | } |
5294 | |
5295 | // MOVEB |
5296 | OPCODE(0x1080) |
5297 | { |
5298 | u32 adr, res; |
5299 | u32 src, dst; |
5300 | |
5301 | res = DREGu8((Opcode >> 0) & 7); |
5302 | flag_C = 0; |
5303 | flag_V = 0; |
5304 | flag_NotZ = res; |
5305 | flag_N = res; |
5306 | adr = AREG((Opcode >> 9) & 7); |
5307 | PRE_IO |
5308 | WRITE_BYTE_F(adr, res) |
5309 | POST_IO |
5310 | RET(8) |
5311 | } |
5312 | |
5313 | // MOVEB |
5314 | OPCODE(0x10C0) |
5315 | { |
5316 | u32 adr, res; |
5317 | u32 src, dst; |
5318 | |
5319 | res = DREGu8((Opcode >> 0) & 7); |
5320 | flag_C = 0; |
5321 | flag_V = 0; |
5322 | flag_NotZ = res; |
5323 | flag_N = res; |
5324 | adr = AREG((Opcode >> 9) & 7); |
5325 | AREG((Opcode >> 9) & 7) += 1; |
5326 | PRE_IO |
5327 | WRITE_BYTE_F(adr, res) |
5328 | POST_IO |
5329 | RET(8) |
5330 | } |
5331 | |
5332 | // MOVEB |
5333 | OPCODE(0x1100) |
5334 | { |
5335 | u32 adr, res; |
5336 | u32 src, dst; |
5337 | |
5338 | res = DREGu8((Opcode >> 0) & 7); |
5339 | flag_C = 0; |
5340 | flag_V = 0; |
5341 | flag_NotZ = res; |
5342 | flag_N = res; |
5343 | adr = AREG((Opcode >> 9) & 7) - 1; |
5344 | AREG((Opcode >> 9) & 7) = adr; |
5345 | PRE_IO |
5346 | WRITE_BYTE_F(adr, res) |
5347 | POST_IO |
5348 | RET(8) |
5349 | } |
5350 | |
5351 | // MOVEB |
5352 | OPCODE(0x1140) |
5353 | { |
5354 | u32 adr, res; |
5355 | u32 src, dst; |
5356 | |
5357 | res = DREGu8((Opcode >> 0) & 7); |
5358 | flag_C = 0; |
5359 | flag_V = 0; |
5360 | flag_NotZ = res; |
5361 | flag_N = res; |
5362 | FETCH_SWORD(adr); |
5363 | adr += AREG((Opcode >> 9) & 7); |
5364 | PRE_IO |
5365 | WRITE_BYTE_F(adr, res) |
5366 | POST_IO |
5367 | RET(12) |
5368 | } |
5369 | |
5370 | // MOVEB |
5371 | OPCODE(0x1180) |
5372 | { |
5373 | u32 adr, res; |
5374 | u32 src, dst; |
5375 | |
5376 | res = DREGu8((Opcode >> 0) & 7); |
5377 | flag_C = 0; |
5378 | flag_V = 0; |
5379 | flag_NotZ = res; |
5380 | flag_N = res; |
5381 | adr = AREG((Opcode >> 9) & 7); |
5382 | DECODE_EXT_WORD |
5383 | PRE_IO |
5384 | WRITE_BYTE_F(adr, res) |
5385 | POST_IO |
5386 | RET(14) |
5387 | } |
5388 | |
5389 | // MOVEB |
5390 | OPCODE(0x11C0) |
5391 | { |
5392 | u32 adr, res; |
5393 | u32 src, dst; |
5394 | |
5395 | res = DREGu8((Opcode >> 0) & 7); |
5396 | flag_C = 0; |
5397 | flag_V = 0; |
5398 | flag_NotZ = res; |
5399 | flag_N = res; |
5400 | FETCH_SWORD(adr); |
5401 | PRE_IO |
5402 | WRITE_BYTE_F(adr, res) |
5403 | POST_IO |
5404 | RET(12) |
5405 | } |
5406 | |
5407 | // MOVEB |
5408 | OPCODE(0x13C0) |
5409 | { |
5410 | u32 adr, res; |
5411 | u32 src, dst; |
5412 | |
5413 | res = DREGu8((Opcode >> 0) & 7); |
5414 | flag_C = 0; |
5415 | flag_V = 0; |
5416 | flag_NotZ = res; |
5417 | flag_N = res; |
5418 | FETCH_LONG(adr); |
5419 | PRE_IO |
5420 | WRITE_BYTE_F(adr, res) |
5421 | POST_IO |
5422 | RET(16) |
5423 | } |
5424 | |
5425 | // MOVEB |
5426 | OPCODE(0x1EC0) |
5427 | { |
5428 | u32 adr, res; |
5429 | u32 src, dst; |
5430 | |
5431 | res = DREGu8((Opcode >> 0) & 7); |
5432 | flag_C = 0; |
5433 | flag_V = 0; |
5434 | flag_NotZ = res; |
5435 | flag_N = res; |
5436 | adr = AREG(7); |
5437 | AREG(7) += 2; |
5438 | PRE_IO |
5439 | WRITE_BYTE_F(adr, res) |
5440 | POST_IO |
5441 | RET(8) |
5442 | } |
5443 | |
5444 | // MOVEB |
5445 | OPCODE(0x1F00) |
5446 | { |
5447 | u32 adr, res; |
5448 | u32 src, dst; |
5449 | |
5450 | res = DREGu8((Opcode >> 0) & 7); |
5451 | flag_C = 0; |
5452 | flag_V = 0; |
5453 | flag_NotZ = res; |
5454 | flag_N = res; |
5455 | adr = AREG(7) - 2; |
5456 | AREG(7) = adr; |
5457 | PRE_IO |
5458 | WRITE_BYTE_F(adr, res) |
5459 | POST_IO |
5460 | RET(8) |
5461 | } |
5462 | |
5463 | // MOVEB |
5464 | OPCODE(0x1008) |
5465 | { |
5466 | u32 adr, res; |
5467 | u32 src, dst; |
5468 | |
5469 | // can't read byte from Ax registers ! |
5470 | m68kcontext.execinfo |= M68K_FAULTED; |
5471 | m68kcontext.io_cycle_counter = 0; |
5472 | /* |
5473 | goto famec_Exec_End; |
5474 | flag_C = 0; |
5475 | flag_V = 0; |
5476 | flag_NotZ = res; |
5477 | flag_N = res; |
5478 | DREGu8((Opcode >> 9) & 7) = res; |
5479 | */ |
5480 | RET(4) |
5481 | } |
5482 | |
5483 | // MOVEB |
5484 | OPCODE(0x1088) |
5485 | { |
5486 | u32 adr, res; |
5487 | u32 src, dst; |
5488 | |
5489 | // can't read byte from Ax registers ! |
5490 | m68kcontext.execinfo |= M68K_FAULTED; |
5491 | m68kcontext.io_cycle_counter = 0; |
5492 | /* |
5493 | goto famec_Exec_End; |
5494 | flag_C = 0; |
5495 | flag_V = 0; |
5496 | flag_NotZ = res; |
5497 | flag_N = res; |
5498 | adr = AREG((Opcode >> 9) & 7); |
5499 | PRE_IO |
5500 | WRITE_BYTE_F(adr, res) |
5501 | POST_IO |
5502 | */ |
5503 | RET(8) |
5504 | } |
5505 | |
5506 | // MOVEB |
5507 | OPCODE(0x10C8) |
5508 | { |
5509 | u32 adr, res; |
5510 | u32 src, dst; |
5511 | |
5512 | // can't read byte from Ax registers ! |
5513 | m68kcontext.execinfo |= M68K_FAULTED; |
5514 | m68kcontext.io_cycle_counter = 0; |
5515 | /* |
5516 | goto famec_Exec_End; |
5517 | flag_C = 0; |
5518 | flag_V = 0; |
5519 | flag_NotZ = res; |
5520 | flag_N = res; |
5521 | adr = AREG((Opcode >> 9) & 7); |
5522 | AREG((Opcode >> 9) & 7) += 1; |
5523 | PRE_IO |
5524 | WRITE_BYTE_F(adr, res) |
5525 | POST_IO |
5526 | */ |
5527 | RET(8) |
5528 | } |
5529 | |
5530 | // MOVEB |
5531 | OPCODE(0x1108) |
5532 | { |
5533 | u32 adr, res; |
5534 | u32 src, dst; |
5535 | |
5536 | // can't read byte from Ax registers ! |
5537 | m68kcontext.execinfo |= M68K_FAULTED; |
5538 | m68kcontext.io_cycle_counter = 0; |
5539 | /* |
5540 | goto famec_Exec_End; |
5541 | flag_C = 0; |
5542 | flag_V = 0; |
5543 | flag_NotZ = res; |
5544 | flag_N = res; |
5545 | adr = AREG((Opcode >> 9) & 7) - 1; |
5546 | AREG((Opcode >> 9) & 7) = adr; |
5547 | PRE_IO |
5548 | WRITE_BYTE_F(adr, res) |
5549 | POST_IO |
5550 | */ |
5551 | RET(8) |
5552 | } |
5553 | |
5554 | // MOVEB |
5555 | OPCODE(0x1148) |
5556 | { |
5557 | u32 adr, res; |
5558 | u32 src, dst; |
5559 | |
5560 | // can't read byte from Ax registers ! |
5561 | m68kcontext.execinfo |= M68K_FAULTED; |
5562 | m68kcontext.io_cycle_counter = 0; |
5563 | /* |
5564 | goto famec_Exec_End; |
5565 | flag_C = 0; |
5566 | flag_V = 0; |
5567 | flag_NotZ = res; |
5568 | flag_N = res; |
5569 | FETCH_SWORD(adr); |
5570 | adr += AREG((Opcode >> 9) & 7); |
5571 | PRE_IO |
5572 | WRITE_BYTE_F(adr, res) |
5573 | POST_IO |
5574 | */ |
5575 | RET(12) |
5576 | } |
5577 | |
5578 | // MOVEB |
5579 | OPCODE(0x1188) |
5580 | { |
5581 | u32 adr, res; |
5582 | u32 src, dst; |
5583 | |
5584 | // can't read byte from Ax registers ! |
5585 | m68kcontext.execinfo |= M68K_FAULTED; |
5586 | m68kcontext.io_cycle_counter = 0; |
5587 | /* |
5588 | goto famec_Exec_End; |
5589 | flag_C = 0; |
5590 | flag_V = 0; |
5591 | flag_NotZ = res; |
5592 | flag_N = res; |
5593 | adr = AREG((Opcode >> 9) & 7); |
5594 | DECODE_EXT_WORD |
5595 | PRE_IO |
5596 | WRITE_BYTE_F(adr, res) |
5597 | POST_IO |
5598 | */ |
5599 | RET(14) |
5600 | } |
5601 | |
5602 | // MOVEB |
5603 | OPCODE(0x11C8) |
5604 | { |
5605 | u32 adr, res; |
5606 | u32 src, dst; |
5607 | |
5608 | // can't read byte from Ax registers ! |
5609 | m68kcontext.execinfo |= M68K_FAULTED; |
5610 | m68kcontext.io_cycle_counter = 0; |
5611 | /* |
5612 | goto famec_Exec_End; |
5613 | flag_C = 0; |
5614 | flag_V = 0; |
5615 | flag_NotZ = res; |
5616 | flag_N = res; |
5617 | FETCH_SWORD(adr); |
5618 | PRE_IO |
5619 | WRITE_BYTE_F(adr, res) |
5620 | POST_IO |
5621 | */ |
5622 | RET(12) |
5623 | } |
5624 | |
5625 | // MOVEB |
5626 | OPCODE(0x13C8) |
5627 | { |
5628 | u32 adr, res; |
5629 | u32 src, dst; |
5630 | |
5631 | // can't read byte from Ax registers ! |
5632 | m68kcontext.execinfo |= M68K_FAULTED; |
5633 | m68kcontext.io_cycle_counter = 0; |
5634 | /* |
5635 | goto famec_Exec_End; |
5636 | flag_C = 0; |
5637 | flag_V = 0; |
5638 | flag_NotZ = res; |
5639 | flag_N = res; |
5640 | FETCH_LONG(adr); |
5641 | PRE_IO |
5642 | WRITE_BYTE_F(adr, res) |
5643 | POST_IO |
5644 | */ |
5645 | RET(16) |
5646 | } |
5647 | |
5648 | // MOVEB |
5649 | OPCODE(0x1EC8) |
5650 | { |
5651 | u32 adr, res; |
5652 | u32 src, dst; |
5653 | |
5654 | // can't read byte from Ax registers ! |
5655 | m68kcontext.execinfo |= M68K_FAULTED; |
5656 | m68kcontext.io_cycle_counter = 0; |
5657 | /* |
5658 | goto famec_Exec_End; |
5659 | flag_C = 0; |
5660 | flag_V = 0; |
5661 | flag_NotZ = res; |
5662 | flag_N = res; |
5663 | adr = AREG(7); |
5664 | AREG(7) += 2; |
5665 | PRE_IO |
5666 | WRITE_BYTE_F(adr, res) |
5667 | POST_IO |
5668 | */ |
5669 | RET(8) |
5670 | } |
5671 | |
5672 | // MOVEB |
5673 | OPCODE(0x1F08) |
5674 | { |
5675 | u32 adr, res; |
5676 | u32 src, dst; |
5677 | |
5678 | // can't read byte from Ax registers ! |
5679 | m68kcontext.execinfo |= M68K_FAULTED; |
5680 | m68kcontext.io_cycle_counter = 0; |
5681 | /* |
5682 | goto famec_Exec_End; |
5683 | flag_C = 0; |
5684 | flag_V = 0; |
5685 | flag_NotZ = res; |
5686 | flag_N = res; |
5687 | adr = AREG(7) - 2; |
5688 | AREG(7) = adr; |
5689 | PRE_IO |
5690 | WRITE_BYTE_F(adr, res) |
5691 | POST_IO |
5692 | */ |
5693 | RET(8) |
5694 | } |
5695 | |
5696 | // MOVEB |
5697 | OPCODE(0x1010) |
5698 | { |
5699 | u32 adr, res; |
5700 | u32 src, dst; |
5701 | |
5702 | adr = AREG((Opcode >> 0) & 7); |
5703 | PRE_IO |
5704 | READ_BYTE_F(adr, res) |
5705 | flag_C = 0; |
5706 | flag_V = 0; |
5707 | flag_NotZ = res; |
5708 | flag_N = res; |
5709 | DREGu8((Opcode >> 9) & 7) = res; |
5710 | POST_IO |
5711 | RET(8) |
5712 | } |
5713 | |
5714 | // MOVEB |
5715 | OPCODE(0x1090) |
5716 | { |
5717 | u32 adr, res; |
5718 | u32 src, dst; |
5719 | |
5720 | adr = AREG((Opcode >> 0) & 7); |
5721 | PRE_IO |
5722 | READ_BYTE_F(adr, res) |
5723 | flag_C = 0; |
5724 | flag_V = 0; |
5725 | flag_NotZ = res; |
5726 | flag_N = res; |
5727 | adr = AREG((Opcode >> 9) & 7); |
5728 | WRITE_BYTE_F(adr, res) |
5729 | POST_IO |
5730 | RET(12) |
5731 | } |
5732 | |
5733 | // MOVEB |
5734 | OPCODE(0x10D0) |
5735 | { |
5736 | u32 adr, res; |
5737 | u32 src, dst; |
5738 | |
5739 | adr = AREG((Opcode >> 0) & 7); |
5740 | PRE_IO |
5741 | READ_BYTE_F(adr, res) |
5742 | flag_C = 0; |
5743 | flag_V = 0; |
5744 | flag_NotZ = res; |
5745 | flag_N = res; |
5746 | adr = AREG((Opcode >> 9) & 7); |
5747 | AREG((Opcode >> 9) & 7) += 1; |
5748 | WRITE_BYTE_F(adr, res) |
5749 | POST_IO |
5750 | RET(12) |
5751 | } |
5752 | |
5753 | // MOVEB |
5754 | OPCODE(0x1110) |
5755 | { |
5756 | u32 adr, res; |
5757 | u32 src, dst; |
5758 | |
5759 | adr = AREG((Opcode >> 0) & 7); |
5760 | PRE_IO |
5761 | READ_BYTE_F(adr, res) |
5762 | flag_C = 0; |
5763 | flag_V = 0; |
5764 | flag_NotZ = res; |
5765 | flag_N = res; |
5766 | adr = AREG((Opcode >> 9) & 7) - 1; |
5767 | AREG((Opcode >> 9) & 7) = adr; |
5768 | WRITE_BYTE_F(adr, res) |
5769 | POST_IO |
5770 | RET(12) |
5771 | } |
5772 | |
5773 | // MOVEB |
5774 | OPCODE(0x1150) |
5775 | { |
5776 | u32 adr, res; |
5777 | u32 src, dst; |
5778 | |
5779 | adr = AREG((Opcode >> 0) & 7); |
5780 | PRE_IO |
5781 | READ_BYTE_F(adr, res) |
5782 | flag_C = 0; |
5783 | flag_V = 0; |
5784 | flag_NotZ = res; |
5785 | flag_N = res; |
5786 | FETCH_SWORD(adr); |
5787 | adr += AREG((Opcode >> 9) & 7); |
5788 | WRITE_BYTE_F(adr, res) |
5789 | POST_IO |
5790 | RET(16) |
5791 | } |
5792 | |
5793 | // MOVEB |
5794 | OPCODE(0x1190) |
5795 | { |
5796 | u32 adr, res; |
5797 | u32 src, dst; |
5798 | |
5799 | adr = AREG((Opcode >> 0) & 7); |
5800 | PRE_IO |
5801 | READ_BYTE_F(adr, res) |
5802 | flag_C = 0; |
5803 | flag_V = 0; |
5804 | flag_NotZ = res; |
5805 | flag_N = res; |
5806 | adr = AREG((Opcode >> 9) & 7); |
5807 | DECODE_EXT_WORD |
5808 | WRITE_BYTE_F(adr, res) |
5809 | POST_IO |
5810 | RET(18) |
5811 | } |
5812 | |
5813 | // MOVEB |
5814 | OPCODE(0x11D0) |
5815 | { |
5816 | u32 adr, res; |
5817 | u32 src, dst; |
5818 | |
5819 | adr = AREG((Opcode >> 0) & 7); |
5820 | PRE_IO |
5821 | READ_BYTE_F(adr, res) |
5822 | flag_C = 0; |
5823 | flag_V = 0; |
5824 | flag_NotZ = res; |
5825 | flag_N = res; |
5826 | FETCH_SWORD(adr); |
5827 | WRITE_BYTE_F(adr, res) |
5828 | POST_IO |
5829 | RET(16) |
5830 | } |
5831 | |
5832 | // MOVEB |
5833 | OPCODE(0x13D0) |
5834 | { |
5835 | u32 adr, res; |
5836 | u32 src, dst; |
5837 | |
5838 | adr = AREG((Opcode >> 0) & 7); |
5839 | PRE_IO |
5840 | READ_BYTE_F(adr, res) |
5841 | flag_C = 0; |
5842 | flag_V = 0; |
5843 | flag_NotZ = res; |
5844 | flag_N = res; |
5845 | FETCH_LONG(adr); |
5846 | WRITE_BYTE_F(adr, res) |
5847 | POST_IO |
5848 | RET(20) |
5849 | } |
5850 | |
5851 | // MOVEB |
5852 | OPCODE(0x1ED0) |
5853 | { |
5854 | u32 adr, res; |
5855 | u32 src, dst; |
5856 | |
5857 | adr = AREG((Opcode >> 0) & 7); |
5858 | PRE_IO |
5859 | READ_BYTE_F(adr, res) |
5860 | flag_C = 0; |
5861 | flag_V = 0; |
5862 | flag_NotZ = res; |
5863 | flag_N = res; |
5864 | adr = AREG(7); |
5865 | AREG(7) += 2; |
5866 | WRITE_BYTE_F(adr, res) |
5867 | POST_IO |
5868 | RET(12) |
5869 | } |
5870 | |
5871 | // MOVEB |
5872 | OPCODE(0x1F10) |
5873 | { |
5874 | u32 adr, res; |
5875 | u32 src, dst; |
5876 | |
5877 | adr = AREG((Opcode >> 0) & 7); |
5878 | PRE_IO |
5879 | READ_BYTE_F(adr, res) |
5880 | flag_C = 0; |
5881 | flag_V = 0; |
5882 | flag_NotZ = res; |
5883 | flag_N = res; |
5884 | adr = AREG(7) - 2; |
5885 | AREG(7) = adr; |
5886 | WRITE_BYTE_F(adr, res) |
5887 | POST_IO |
5888 | RET(12) |
5889 | } |
5890 | |
5891 | // MOVEB |
5892 | OPCODE(0x1018) |
5893 | { |
5894 | u32 adr, res; |
5895 | u32 src, dst; |
5896 | |
5897 | adr = AREG((Opcode >> 0) & 7); |
5898 | AREG((Opcode >> 0) & 7) += 1; |
5899 | PRE_IO |
5900 | READ_BYTE_F(adr, res) |
5901 | flag_C = 0; |
5902 | flag_V = 0; |
5903 | flag_NotZ = res; |
5904 | flag_N = res; |
5905 | DREGu8((Opcode >> 9) & 7) = res; |
5906 | POST_IO |
5907 | RET(8) |
5908 | } |
5909 | |
5910 | // MOVEB |
5911 | OPCODE(0x1098) |
5912 | { |
5913 | u32 adr, res; |
5914 | u32 src, dst; |
5915 | |
5916 | adr = AREG((Opcode >> 0) & 7); |
5917 | AREG((Opcode >> 0) & 7) += 1; |
5918 | PRE_IO |
5919 | READ_BYTE_F(adr, res) |
5920 | flag_C = 0; |
5921 | flag_V = 0; |
5922 | flag_NotZ = res; |
5923 | flag_N = res; |
5924 | adr = AREG((Opcode >> 9) & 7); |
5925 | WRITE_BYTE_F(adr, res) |
5926 | POST_IO |
5927 | RET(12) |
5928 | } |
5929 | |
5930 | // MOVEB |
5931 | OPCODE(0x10D8) |
5932 | { |
5933 | u32 adr, res; |
5934 | u32 src, dst; |
5935 | |
5936 | adr = AREG((Opcode >> 0) & 7); |
5937 | AREG((Opcode >> 0) & 7) += 1; |
5938 | PRE_IO |
5939 | READ_BYTE_F(adr, res) |
5940 | flag_C = 0; |
5941 | flag_V = 0; |
5942 | flag_NotZ = res; |
5943 | flag_N = res; |
5944 | adr = AREG((Opcode >> 9) & 7); |
5945 | AREG((Opcode >> 9) & 7) += 1; |
5946 | WRITE_BYTE_F(adr, res) |
5947 | POST_IO |
5948 | RET(12) |
5949 | } |
5950 | |
5951 | // MOVEB |
5952 | OPCODE(0x1118) |
5953 | { |
5954 | u32 adr, res; |
5955 | u32 src, dst; |
5956 | |
5957 | adr = AREG((Opcode >> 0) & 7); |
5958 | AREG((Opcode >> 0) & 7) += 1; |
5959 | PRE_IO |
5960 | READ_BYTE_F(adr, res) |
5961 | flag_C = 0; |
5962 | flag_V = 0; |
5963 | flag_NotZ = res; |
5964 | flag_N = res; |
5965 | adr = AREG((Opcode >> 9) & 7) - 1; |
5966 | AREG((Opcode >> 9) & 7) = adr; |
5967 | WRITE_BYTE_F(adr, res) |
5968 | POST_IO |
5969 | RET(12) |
5970 | } |
5971 | |
5972 | // MOVEB |
5973 | OPCODE(0x1158) |
5974 | { |
5975 | u32 adr, res; |
5976 | u32 src, dst; |
5977 | |
5978 | adr = AREG((Opcode >> 0) & 7); |
5979 | AREG((Opcode >> 0) & 7) += 1; |
5980 | PRE_IO |
5981 | READ_BYTE_F(adr, res) |
5982 | flag_C = 0; |
5983 | flag_V = 0; |
5984 | flag_NotZ = res; |
5985 | flag_N = res; |
5986 | FETCH_SWORD(adr); |
5987 | adr += AREG((Opcode >> 9) & 7); |
5988 | WRITE_BYTE_F(adr, res) |
5989 | POST_IO |
5990 | RET(16) |
5991 | } |
5992 | |
5993 | // MOVEB |
5994 | OPCODE(0x1198) |
5995 | { |
5996 | u32 adr, res; |
5997 | u32 src, dst; |
5998 | |
5999 | adr = AREG((Opcode >> 0) & 7); |
6000 | AREG((Opcode >> 0) & 7) += 1; |
6001 | PRE_IO |
6002 | READ_BYTE_F(adr, res) |
6003 | flag_C = 0; |
6004 | flag_V = 0; |
6005 | flag_NotZ = res; |
6006 | flag_N = res; |
6007 | adr = AREG((Opcode >> 9) & 7); |
6008 | DECODE_EXT_WORD |
6009 | WRITE_BYTE_F(adr, res) |
6010 | POST_IO |
6011 | RET(18) |
6012 | } |
6013 | |
6014 | // MOVEB |
6015 | OPCODE(0x11D8) |
6016 | { |
6017 | u32 adr, res; |
6018 | u32 src, dst; |
6019 | |
6020 | adr = AREG((Opcode >> 0) & 7); |
6021 | AREG((Opcode >> 0) & 7) += 1; |
6022 | PRE_IO |
6023 | READ_BYTE_F(adr, res) |
6024 | flag_C = 0; |
6025 | flag_V = 0; |
6026 | flag_NotZ = res; |
6027 | flag_N = res; |
6028 | FETCH_SWORD(adr); |
6029 | WRITE_BYTE_F(adr, res) |
6030 | POST_IO |
6031 | RET(16) |
6032 | } |
6033 | |
6034 | // MOVEB |
6035 | OPCODE(0x13D8) |
6036 | { |
6037 | u32 adr, res; |
6038 | u32 src, dst; |
6039 | |
6040 | adr = AREG((Opcode >> 0) & 7); |
6041 | AREG((Opcode >> 0) & 7) += 1; |
6042 | PRE_IO |
6043 | READ_BYTE_F(adr, res) |
6044 | flag_C = 0; |
6045 | flag_V = 0; |
6046 | flag_NotZ = res; |
6047 | flag_N = res; |
6048 | FETCH_LONG(adr); |
6049 | WRITE_BYTE_F(adr, res) |
6050 | POST_IO |
6051 | RET(20) |
6052 | } |
6053 | |
6054 | // MOVEB |
6055 | OPCODE(0x1ED8) |
6056 | { |
6057 | u32 adr, res; |
6058 | u32 src, dst; |
6059 | |
6060 | adr = AREG((Opcode >> 0) & 7); |
6061 | AREG((Opcode >> 0) & 7) += 1; |
6062 | PRE_IO |
6063 | READ_BYTE_F(adr, res) |
6064 | flag_C = 0; |
6065 | flag_V = 0; |
6066 | flag_NotZ = res; |
6067 | flag_N = res; |
6068 | adr = AREG(7); |
6069 | AREG(7) += 2; |
6070 | WRITE_BYTE_F(adr, res) |
6071 | POST_IO |
6072 | RET(12) |
6073 | } |
6074 | |
6075 | // MOVEB |
6076 | OPCODE(0x1F18) |
6077 | { |
6078 | u32 adr, res; |
6079 | u32 src, dst; |
6080 | |
6081 | adr = AREG((Opcode >> 0) & 7); |
6082 | AREG((Opcode >> 0) & 7) += 1; |
6083 | PRE_IO |
6084 | READ_BYTE_F(adr, res) |
6085 | flag_C = 0; |
6086 | flag_V = 0; |
6087 | flag_NotZ = res; |
6088 | flag_N = res; |
6089 | adr = AREG(7) - 2; |
6090 | AREG(7) = adr; |
6091 | WRITE_BYTE_F(adr, res) |
6092 | POST_IO |
6093 | RET(12) |
6094 | } |
6095 | |
6096 | // MOVEB |
6097 | OPCODE(0x1020) |
6098 | { |
6099 | u32 adr, res; |
6100 | u32 src, dst; |
6101 | |
6102 | adr = AREG((Opcode >> 0) & 7) - 1; |
6103 | AREG((Opcode >> 0) & 7) = adr; |
6104 | PRE_IO |
6105 | READ_BYTE_F(adr, res) |
6106 | flag_C = 0; |
6107 | flag_V = 0; |
6108 | flag_NotZ = res; |
6109 | flag_N = res; |
6110 | DREGu8((Opcode >> 9) & 7) = res; |
6111 | POST_IO |
6112 | RET(10) |
6113 | } |
6114 | |
6115 | // MOVEB |
6116 | OPCODE(0x10A0) |
6117 | { |
6118 | u32 adr, res; |
6119 | u32 src, dst; |
6120 | |
6121 | adr = AREG((Opcode >> 0) & 7) - 1; |
6122 | AREG((Opcode >> 0) & 7) = adr; |
6123 | PRE_IO |
6124 | READ_BYTE_F(adr, res) |
6125 | flag_C = 0; |
6126 | flag_V = 0; |
6127 | flag_NotZ = res; |
6128 | flag_N = res; |
6129 | adr = AREG((Opcode >> 9) & 7); |
6130 | WRITE_BYTE_F(adr, res) |
6131 | POST_IO |
6132 | RET(14) |
6133 | } |
6134 | |
6135 | // MOVEB |
6136 | OPCODE(0x10E0) |
6137 | { |
6138 | u32 adr, res; |
6139 | u32 src, dst; |
6140 | |
6141 | adr = AREG((Opcode >> 0) & 7) - 1; |
6142 | AREG((Opcode >> 0) & 7) = adr; |
6143 | PRE_IO |
6144 | READ_BYTE_F(adr, res) |
6145 | flag_C = 0; |
6146 | flag_V = 0; |
6147 | flag_NotZ = res; |
6148 | flag_N = res; |
6149 | adr = AREG((Opcode >> 9) & 7); |
6150 | AREG((Opcode >> 9) & 7) += 1; |
6151 | WRITE_BYTE_F(adr, res) |
6152 | POST_IO |
6153 | RET(14) |
6154 | } |
6155 | |
6156 | // MOVEB |
6157 | OPCODE(0x1120) |
6158 | { |
6159 | u32 adr, res; |
6160 | u32 src, dst; |
6161 | |
6162 | adr = AREG((Opcode >> 0) & 7) - 1; |
6163 | AREG((Opcode >> 0) & 7) = adr; |
6164 | PRE_IO |
6165 | READ_BYTE_F(adr, res) |
6166 | flag_C = 0; |
6167 | flag_V = 0; |
6168 | flag_NotZ = res; |
6169 | flag_N = res; |
6170 | adr = AREG((Opcode >> 9) & 7) - 1; |
6171 | AREG((Opcode >> 9) & 7) = adr; |
6172 | WRITE_BYTE_F(adr, res) |
6173 | POST_IO |
6174 | RET(14) |
6175 | } |
6176 | |
6177 | // MOVEB |
6178 | OPCODE(0x1160) |
6179 | { |
6180 | u32 adr, res; |
6181 | u32 src, dst; |
6182 | |
6183 | adr = AREG((Opcode >> 0) & 7) - 1; |
6184 | AREG((Opcode >> 0) & 7) = adr; |
6185 | PRE_IO |
6186 | READ_BYTE_F(adr, res) |
6187 | flag_C = 0; |
6188 | flag_V = 0; |
6189 | flag_NotZ = res; |
6190 | flag_N = res; |
6191 | FETCH_SWORD(adr); |
6192 | adr += AREG((Opcode >> 9) & 7); |
6193 | WRITE_BYTE_F(adr, res) |
6194 | POST_IO |
6195 | RET(18) |
6196 | } |
6197 | |
6198 | // MOVEB |
6199 | OPCODE(0x11A0) |
6200 | { |
6201 | u32 adr, res; |
6202 | u32 src, dst; |
6203 | |
6204 | adr = AREG((Opcode >> 0) & 7) - 1; |
6205 | AREG((Opcode >> 0) & 7) = adr; |
6206 | PRE_IO |
6207 | READ_BYTE_F(adr, res) |
6208 | flag_C = 0; |
6209 | flag_V = 0; |
6210 | flag_NotZ = res; |
6211 | flag_N = res; |
6212 | adr = AREG((Opcode >> 9) & 7); |
6213 | DECODE_EXT_WORD |
6214 | WRITE_BYTE_F(adr, res) |
6215 | POST_IO |
6216 | RET(20) |
6217 | } |
6218 | |
6219 | // MOVEB |
6220 | OPCODE(0x11E0) |
6221 | { |
6222 | u32 adr, res; |
6223 | u32 src, dst; |
6224 | |
6225 | adr = AREG((Opcode >> 0) & 7) - 1; |
6226 | AREG((Opcode >> 0) & 7) = adr; |
6227 | PRE_IO |
6228 | READ_BYTE_F(adr, res) |
6229 | flag_C = 0; |
6230 | flag_V = 0; |
6231 | flag_NotZ = res; |
6232 | flag_N = res; |
6233 | FETCH_SWORD(adr); |
6234 | WRITE_BYTE_F(adr, res) |
6235 | POST_IO |
6236 | RET(18) |
6237 | } |
6238 | |
6239 | // MOVEB |
6240 | OPCODE(0x13E0) |
6241 | { |
6242 | u32 adr, res; |
6243 | u32 src, dst; |
6244 | |
6245 | adr = AREG((Opcode >> 0) & 7) - 1; |
6246 | AREG((Opcode >> 0) & 7) = adr; |
6247 | PRE_IO |
6248 | READ_BYTE_F(adr, res) |
6249 | flag_C = 0; |
6250 | flag_V = 0; |
6251 | flag_NotZ = res; |
6252 | flag_N = res; |
6253 | FETCH_LONG(adr); |
6254 | WRITE_BYTE_F(adr, res) |
6255 | POST_IO |
6256 | RET(22) |
6257 | } |
6258 | |
6259 | // MOVEB |
6260 | OPCODE(0x1EE0) |
6261 | { |
6262 | u32 adr, res; |
6263 | u32 src, dst; |
6264 | |
6265 | adr = AREG((Opcode >> 0) & 7) - 1; |
6266 | AREG((Opcode >> 0) & 7) = adr; |
6267 | PRE_IO |
6268 | READ_BYTE_F(adr, res) |
6269 | flag_C = 0; |
6270 | flag_V = 0; |
6271 | flag_NotZ = res; |
6272 | flag_N = res; |
6273 | adr = AREG(7); |
6274 | AREG(7) += 2; |
6275 | WRITE_BYTE_F(adr, res) |
6276 | POST_IO |
6277 | RET(14) |
6278 | } |
6279 | |
6280 | // MOVEB |
6281 | OPCODE(0x1F20) |
6282 | { |
6283 | u32 adr, res; |
6284 | u32 src, dst; |
6285 | |
6286 | adr = AREG((Opcode >> 0) & 7) - 1; |
6287 | AREG((Opcode >> 0) & 7) = adr; |
6288 | PRE_IO |
6289 | READ_BYTE_F(adr, res) |
6290 | flag_C = 0; |
6291 | flag_V = 0; |
6292 | flag_NotZ = res; |
6293 | flag_N = res; |
6294 | adr = AREG(7) - 2; |
6295 | AREG(7) = adr; |
6296 | WRITE_BYTE_F(adr, res) |
6297 | POST_IO |
6298 | RET(14) |
6299 | } |
6300 | |
6301 | // MOVEB |
6302 | OPCODE(0x1028) |
6303 | { |
6304 | u32 adr, res; |
6305 | u32 src, dst; |
6306 | |
6307 | FETCH_SWORD(adr); |
6308 | adr += AREG((Opcode >> 0) & 7); |
6309 | PRE_IO |
6310 | READ_BYTE_F(adr, res) |
6311 | flag_C = 0; |
6312 | flag_V = 0; |
6313 | flag_NotZ = res; |
6314 | flag_N = res; |
6315 | DREGu8((Opcode >> 9) & 7) = res; |
6316 | POST_IO |
6317 | RET(12) |
6318 | } |
6319 | |
6320 | // MOVEB |
6321 | OPCODE(0x10A8) |
6322 | { |
6323 | u32 adr, res; |
6324 | u32 src, dst; |
6325 | |
6326 | FETCH_SWORD(adr); |
6327 | adr += AREG((Opcode >> 0) & 7); |
6328 | PRE_IO |
6329 | READ_BYTE_F(adr, res) |
6330 | flag_C = 0; |
6331 | flag_V = 0; |
6332 | flag_NotZ = res; |
6333 | flag_N = res; |
6334 | adr = AREG((Opcode >> 9) & 7); |
6335 | WRITE_BYTE_F(adr, res) |
6336 | POST_IO |
6337 | RET(16) |
6338 | } |
6339 | |
6340 | // MOVEB |
6341 | OPCODE(0x10E8) |
6342 | { |
6343 | u32 adr, res; |
6344 | u32 src, dst; |
6345 | |
6346 | FETCH_SWORD(adr); |
6347 | adr += AREG((Opcode >> 0) & 7); |
6348 | PRE_IO |
6349 | READ_BYTE_F(adr, res) |
6350 | flag_C = 0; |
6351 | flag_V = 0; |
6352 | flag_NotZ = res; |
6353 | flag_N = res; |
6354 | adr = AREG((Opcode >> 9) & 7); |
6355 | AREG((Opcode >> 9) & 7) += 1; |
6356 | WRITE_BYTE_F(adr, res) |
6357 | POST_IO |
6358 | RET(16) |
6359 | } |
6360 | |
6361 | // MOVEB |
6362 | OPCODE(0x1128) |
6363 | { |
6364 | u32 adr, res; |
6365 | u32 src, dst; |
6366 | |
6367 | FETCH_SWORD(adr); |
6368 | adr += AREG((Opcode >> 0) & 7); |
6369 | PRE_IO |
6370 | READ_BYTE_F(adr, res) |
6371 | flag_C = 0; |
6372 | flag_V = 0; |
6373 | flag_NotZ = res; |
6374 | flag_N = res; |
6375 | adr = AREG((Opcode >> 9) & 7) - 1; |
6376 | AREG((Opcode >> 9) & 7) = adr; |
6377 | WRITE_BYTE_F(adr, res) |
6378 | POST_IO |
6379 | RET(16) |
6380 | } |
6381 | |
6382 | // MOVEB |
6383 | OPCODE(0x1168) |
6384 | { |
6385 | u32 adr, res; |
6386 | u32 src, dst; |
6387 | |
6388 | FETCH_SWORD(adr); |
6389 | adr += AREG((Opcode >> 0) & 7); |
6390 | PRE_IO |
6391 | READ_BYTE_F(adr, res) |
6392 | flag_C = 0; |
6393 | flag_V = 0; |
6394 | flag_NotZ = res; |
6395 | flag_N = res; |
6396 | FETCH_SWORD(adr); |
6397 | adr += AREG((Opcode >> 9) & 7); |
6398 | WRITE_BYTE_F(adr, res) |
6399 | POST_IO |
6400 | RET(20) |
6401 | } |
6402 | |
6403 | // MOVEB |
6404 | OPCODE(0x11A8) |
6405 | { |
6406 | u32 adr, res; |
6407 | u32 src, dst; |
6408 | |
6409 | FETCH_SWORD(adr); |
6410 | adr += AREG((Opcode >> 0) & 7); |
6411 | PRE_IO |
6412 | READ_BYTE_F(adr, res) |
6413 | flag_C = 0; |
6414 | flag_V = 0; |
6415 | flag_NotZ = res; |
6416 | flag_N = res; |
6417 | adr = AREG((Opcode >> 9) & 7); |
6418 | DECODE_EXT_WORD |
6419 | WRITE_BYTE_F(adr, res) |
6420 | POST_IO |
6421 | RET(22) |
6422 | } |
6423 | |
6424 | // MOVEB |
6425 | OPCODE(0x11E8) |
6426 | { |
6427 | u32 adr, res; |
6428 | u32 src, dst; |
6429 | |
6430 | FETCH_SWORD(adr); |
6431 | adr += AREG((Opcode >> 0) & 7); |
6432 | PRE_IO |
6433 | READ_BYTE_F(adr, res) |
6434 | flag_C = 0; |
6435 | flag_V = 0; |
6436 | flag_NotZ = res; |
6437 | flag_N = res; |
6438 | FETCH_SWORD(adr); |
6439 | WRITE_BYTE_F(adr, res) |
6440 | POST_IO |
6441 | RET(20) |
6442 | } |
6443 | |
6444 | // MOVEB |
6445 | OPCODE(0x13E8) |
6446 | { |
6447 | u32 adr, res; |
6448 | u32 src, dst; |
6449 | |
6450 | FETCH_SWORD(adr); |
6451 | adr += AREG((Opcode >> 0) & 7); |
6452 | PRE_IO |
6453 | READ_BYTE_F(adr, res) |
6454 | flag_C = 0; |
6455 | flag_V = 0; |
6456 | flag_NotZ = res; |
6457 | flag_N = res; |
6458 | FETCH_LONG(adr); |
6459 | WRITE_BYTE_F(adr, res) |
6460 | POST_IO |
6461 | RET(24) |
6462 | } |
6463 | |
6464 | // MOVEB |
6465 | OPCODE(0x1EE8) |
6466 | { |
6467 | u32 adr, res; |
6468 | u32 src, dst; |
6469 | |
6470 | FETCH_SWORD(adr); |
6471 | adr += AREG((Opcode >> 0) & 7); |
6472 | PRE_IO |
6473 | READ_BYTE_F(adr, res) |
6474 | flag_C = 0; |
6475 | flag_V = 0; |
6476 | flag_NotZ = res; |
6477 | flag_N = res; |
6478 | adr = AREG(7); |
6479 | AREG(7) += 2; |
6480 | WRITE_BYTE_F(adr, res) |
6481 | POST_IO |
6482 | RET(16) |
6483 | } |
6484 | |
6485 | // MOVEB |
6486 | OPCODE(0x1F28) |
6487 | { |
6488 | u32 adr, res; |
6489 | u32 src, dst; |
6490 | |
6491 | FETCH_SWORD(adr); |
6492 | adr += AREG((Opcode >> 0) & 7); |
6493 | PRE_IO |
6494 | READ_BYTE_F(adr, res) |
6495 | flag_C = 0; |
6496 | flag_V = 0; |
6497 | flag_NotZ = res; |
6498 | flag_N = res; |
6499 | adr = AREG(7) - 2; |
6500 | AREG(7) = adr; |
6501 | WRITE_BYTE_F(adr, res) |
6502 | POST_IO |
6503 | RET(16) |
6504 | } |
6505 | |
6506 | // MOVEB |
6507 | OPCODE(0x1030) |
6508 | { |
6509 | u32 adr, res; |
6510 | u32 src, dst; |
6511 | |
6512 | adr = AREG((Opcode >> 0) & 7); |
6513 | DECODE_EXT_WORD |
6514 | PRE_IO |
6515 | READ_BYTE_F(adr, res) |
6516 | flag_C = 0; |
6517 | flag_V = 0; |
6518 | flag_NotZ = res; |
6519 | flag_N = res; |
6520 | DREGu8((Opcode >> 9) & 7) = res; |
6521 | POST_IO |
6522 | RET(14) |
6523 | } |
6524 | |
6525 | // MOVEB |
6526 | OPCODE(0x10B0) |
6527 | { |
6528 | u32 adr, res; |
6529 | u32 src, dst; |
6530 | |
6531 | adr = AREG((Opcode >> 0) & 7); |
6532 | DECODE_EXT_WORD |
6533 | PRE_IO |
6534 | READ_BYTE_F(adr, res) |
6535 | flag_C = 0; |
6536 | flag_V = 0; |
6537 | flag_NotZ = res; |
6538 | flag_N = res; |
6539 | adr = AREG((Opcode >> 9) & 7); |
6540 | WRITE_BYTE_F(adr, res) |
6541 | POST_IO |
6542 | RET(18) |
6543 | } |
6544 | |
6545 | // MOVEB |
6546 | OPCODE(0x10F0) |
6547 | { |
6548 | u32 adr, res; |
6549 | u32 src, dst; |
6550 | |
6551 | adr = AREG((Opcode >> 0) & 7); |
6552 | DECODE_EXT_WORD |
6553 | PRE_IO |
6554 | READ_BYTE_F(adr, res) |
6555 | flag_C = 0; |
6556 | flag_V = 0; |
6557 | flag_NotZ = res; |
6558 | flag_N = res; |
6559 | adr = AREG((Opcode >> 9) & 7); |
6560 | AREG((Opcode >> 9) & 7) += 1; |
6561 | WRITE_BYTE_F(adr, res) |
6562 | POST_IO |
6563 | RET(18) |
6564 | } |
6565 | |
6566 | // MOVEB |
6567 | OPCODE(0x1130) |
6568 | { |
6569 | u32 adr, res; |
6570 | u32 src, dst; |
6571 | |
6572 | adr = AREG((Opcode >> 0) & 7); |
6573 | DECODE_EXT_WORD |
6574 | PRE_IO |
6575 | READ_BYTE_F(adr, res) |
6576 | flag_C = 0; |
6577 | flag_V = 0; |
6578 | flag_NotZ = res; |
6579 | flag_N = res; |
6580 | adr = AREG((Opcode >> 9) & 7) - 1; |
6581 | AREG((Opcode >> 9) & 7) = adr; |
6582 | WRITE_BYTE_F(adr, res) |
6583 | POST_IO |
6584 | RET(18) |
6585 | } |
6586 | |
6587 | // MOVEB |
6588 | OPCODE(0x1170) |
6589 | { |
6590 | u32 adr, res; |
6591 | u32 src, dst; |
6592 | |
6593 | adr = AREG((Opcode >> 0) & 7); |
6594 | DECODE_EXT_WORD |
6595 | PRE_IO |
6596 | READ_BYTE_F(adr, res) |
6597 | flag_C = 0; |
6598 | flag_V = 0; |
6599 | flag_NotZ = res; |
6600 | flag_N = res; |
6601 | FETCH_SWORD(adr); |
6602 | adr += AREG((Opcode >> 9) & 7); |
6603 | WRITE_BYTE_F(adr, res) |
6604 | POST_IO |
6605 | RET(22) |
6606 | } |
6607 | |
6608 | // MOVEB |
6609 | OPCODE(0x11B0) |
6610 | { |
6611 | u32 adr, res; |
6612 | u32 src, dst; |
6613 | |
6614 | adr = AREG((Opcode >> 0) & 7); |
6615 | DECODE_EXT_WORD |
6616 | PRE_IO |
6617 | READ_BYTE_F(adr, res) |
6618 | flag_C = 0; |
6619 | flag_V = 0; |
6620 | flag_NotZ = res; |
6621 | flag_N = res; |
6622 | adr = AREG((Opcode >> 9) & 7); |
6623 | DECODE_EXT_WORD |
6624 | WRITE_BYTE_F(adr, res) |
6625 | POST_IO |
6626 | RET(24) |
6627 | } |
6628 | |
6629 | // MOVEB |
6630 | OPCODE(0x11F0) |
6631 | { |
6632 | u32 adr, res; |
6633 | u32 src, dst; |
6634 | |
6635 | adr = AREG((Opcode >> 0) & 7); |
6636 | DECODE_EXT_WORD |
6637 | PRE_IO |
6638 | READ_BYTE_F(adr, res) |
6639 | flag_C = 0; |
6640 | flag_V = 0; |
6641 | flag_NotZ = res; |
6642 | flag_N = res; |
6643 | FETCH_SWORD(adr); |
6644 | WRITE_BYTE_F(adr, res) |
6645 | POST_IO |
6646 | RET(22) |
6647 | } |
6648 | |
6649 | // MOVEB |
6650 | OPCODE(0x13F0) |
6651 | { |
6652 | u32 adr, res; |
6653 | u32 src, dst; |
6654 | |
6655 | adr = AREG((Opcode >> 0) & 7); |
6656 | DECODE_EXT_WORD |
6657 | PRE_IO |
6658 | READ_BYTE_F(adr, res) |
6659 | flag_C = 0; |
6660 | flag_V = 0; |
6661 | flag_NotZ = res; |
6662 | flag_N = res; |
6663 | FETCH_LONG(adr); |
6664 | WRITE_BYTE_F(adr, res) |
6665 | POST_IO |
6666 | RET(26) |
6667 | } |
6668 | |
6669 | // MOVEB |
6670 | OPCODE(0x1EF0) |
6671 | { |
6672 | u32 adr, res; |
6673 | u32 src, dst; |
6674 | |
6675 | adr = AREG((Opcode >> 0) & 7); |
6676 | DECODE_EXT_WORD |
6677 | PRE_IO |
6678 | READ_BYTE_F(adr, res) |
6679 | flag_C = 0; |
6680 | flag_V = 0; |
6681 | flag_NotZ = res; |
6682 | flag_N = res; |
6683 | adr = AREG(7); |
6684 | AREG(7) += 2; |
6685 | WRITE_BYTE_F(adr, res) |
6686 | POST_IO |
6687 | RET(18) |
6688 | } |
6689 | |
6690 | // MOVEB |
6691 | OPCODE(0x1F30) |
6692 | { |
6693 | u32 adr, res; |
6694 | u32 src, dst; |
6695 | |
6696 | adr = AREG((Opcode >> 0) & 7); |
6697 | DECODE_EXT_WORD |
6698 | PRE_IO |
6699 | READ_BYTE_F(adr, res) |
6700 | flag_C = 0; |
6701 | flag_V = 0; |
6702 | flag_NotZ = res; |
6703 | flag_N = res; |
6704 | adr = AREG(7) - 2; |
6705 | AREG(7) = adr; |
6706 | WRITE_BYTE_F(adr, res) |
6707 | POST_IO |
6708 | RET(18) |
6709 | } |
6710 | |
6711 | // MOVEB |
6712 | OPCODE(0x1038) |
6713 | { |
6714 | u32 adr, res; |
6715 | u32 src, dst; |
6716 | |
6717 | FETCH_SWORD(adr); |
6718 | PRE_IO |
6719 | READ_BYTE_F(adr, res) |
6720 | flag_C = 0; |
6721 | flag_V = 0; |
6722 | flag_NotZ = res; |
6723 | flag_N = res; |
6724 | DREGu8((Opcode >> 9) & 7) = res; |
6725 | POST_IO |
6726 | RET(12) |
6727 | } |
6728 | |
6729 | // MOVEB |
6730 | OPCODE(0x10B8) |
6731 | { |
6732 | u32 adr, res; |
6733 | u32 src, dst; |
6734 | |
6735 | FETCH_SWORD(adr); |
6736 | PRE_IO |
6737 | READ_BYTE_F(adr, res) |
6738 | flag_C = 0; |
6739 | flag_V = 0; |
6740 | flag_NotZ = res; |
6741 | flag_N = res; |
6742 | adr = AREG((Opcode >> 9) & 7); |
6743 | WRITE_BYTE_F(adr, res) |
6744 | POST_IO |
6745 | RET(16) |
6746 | } |
6747 | |
6748 | // MOVEB |
6749 | OPCODE(0x10F8) |
6750 | { |
6751 | u32 adr, res; |
6752 | u32 src, dst; |
6753 | |
6754 | FETCH_SWORD(adr); |
6755 | PRE_IO |
6756 | READ_BYTE_F(adr, res) |
6757 | flag_C = 0; |
6758 | flag_V = 0; |
6759 | flag_NotZ = res; |
6760 | flag_N = res; |
6761 | adr = AREG((Opcode >> 9) & 7); |
6762 | AREG((Opcode >> 9) & 7) += 1; |
6763 | WRITE_BYTE_F(adr, res) |
6764 | POST_IO |
6765 | RET(16) |
6766 | } |
6767 | |
6768 | // MOVEB |
6769 | OPCODE(0x1138) |
6770 | { |
6771 | u32 adr, res; |
6772 | u32 src, dst; |
6773 | |
6774 | FETCH_SWORD(adr); |
6775 | PRE_IO |
6776 | READ_BYTE_F(adr, res) |
6777 | flag_C = 0; |
6778 | flag_V = 0; |
6779 | flag_NotZ = res; |
6780 | flag_N = res; |
6781 | adr = AREG((Opcode >> 9) & 7) - 1; |
6782 | AREG((Opcode >> 9) & 7) = adr; |
6783 | WRITE_BYTE_F(adr, res) |
6784 | POST_IO |
6785 | RET(16) |
6786 | } |
6787 | |
6788 | // MOVEB |
6789 | OPCODE(0x1178) |
6790 | { |
6791 | u32 adr, res; |
6792 | u32 src, dst; |
6793 | |
6794 | FETCH_SWORD(adr); |
6795 | PRE_IO |
6796 | READ_BYTE_F(adr, res) |
6797 | flag_C = 0; |
6798 | flag_V = 0; |
6799 | flag_NotZ = res; |
6800 | flag_N = res; |
6801 | FETCH_SWORD(adr); |
6802 | adr += AREG((Opcode >> 9) & 7); |
6803 | WRITE_BYTE_F(adr, res) |
6804 | POST_IO |
6805 | RET(20) |
6806 | } |
6807 | |
6808 | // MOVEB |
6809 | OPCODE(0x11B8) |
6810 | { |
6811 | u32 adr, res; |
6812 | u32 src, dst; |
6813 | |
6814 | FETCH_SWORD(adr); |
6815 | PRE_IO |
6816 | READ_BYTE_F(adr, res) |
6817 | flag_C = 0; |
6818 | flag_V = 0; |
6819 | flag_NotZ = res; |
6820 | flag_N = res; |
6821 | adr = AREG((Opcode >> 9) & 7); |
6822 | DECODE_EXT_WORD |
6823 | WRITE_BYTE_F(adr, res) |
6824 | POST_IO |
6825 | RET(22) |
6826 | } |
6827 | |
6828 | // MOVEB |
6829 | OPCODE(0x11F8) |
6830 | { |
6831 | u32 adr, res; |
6832 | u32 src, dst; |
6833 | |
6834 | FETCH_SWORD(adr); |
6835 | PRE_IO |
6836 | READ_BYTE_F(adr, res) |
6837 | flag_C = 0; |
6838 | flag_V = 0; |
6839 | flag_NotZ = res; |
6840 | flag_N = res; |
6841 | FETCH_SWORD(adr); |
6842 | WRITE_BYTE_F(adr, res) |
6843 | POST_IO |
6844 | RET(20) |
6845 | } |
6846 | |
6847 | // MOVEB |
6848 | OPCODE(0x13F8) |
6849 | { |
6850 | u32 adr, res; |
6851 | u32 src, dst; |
6852 | |
6853 | FETCH_SWORD(adr); |
6854 | PRE_IO |
6855 | READ_BYTE_F(adr, res) |
6856 | flag_C = 0; |
6857 | flag_V = 0; |
6858 | flag_NotZ = res; |
6859 | flag_N = res; |
6860 | FETCH_LONG(adr); |
6861 | WRITE_BYTE_F(adr, res) |
6862 | POST_IO |
6863 | RET(24) |
6864 | } |
6865 | |
6866 | // MOVEB |
6867 | OPCODE(0x1EF8) |
6868 | { |
6869 | u32 adr, res; |
6870 | u32 src, dst; |
6871 | |
6872 | FETCH_SWORD(adr); |
6873 | PRE_IO |
6874 | READ_BYTE_F(adr, res) |
6875 | flag_C = 0; |
6876 | flag_V = 0; |
6877 | flag_NotZ = res; |
6878 | flag_N = res; |
6879 | adr = AREG(7); |
6880 | AREG(7) += 2; |
6881 | WRITE_BYTE_F(adr, res) |
6882 | POST_IO |
6883 | RET(16) |
6884 | } |
6885 | |
6886 | // MOVEB |
6887 | OPCODE(0x1F38) |
6888 | { |
6889 | u32 adr, res; |
6890 | u32 src, dst; |
6891 | |
6892 | FETCH_SWORD(adr); |
6893 | PRE_IO |
6894 | READ_BYTE_F(adr, res) |
6895 | flag_C = 0; |
6896 | flag_V = 0; |
6897 | flag_NotZ = res; |
6898 | flag_N = res; |
6899 | adr = AREG(7) - 2; |
6900 | AREG(7) = adr; |
6901 | WRITE_BYTE_F(adr, res) |
6902 | POST_IO |
6903 | RET(16) |
6904 | } |
6905 | |
6906 | // MOVEB |
6907 | OPCODE(0x1039) |
6908 | { |
6909 | u32 adr, res; |
6910 | u32 src, dst; |
6911 | |
6912 | FETCH_LONG(adr); |
6913 | PRE_IO |
6914 | READ_BYTE_F(adr, res) |
6915 | flag_C = 0; |
6916 | flag_V = 0; |
6917 | flag_NotZ = res; |
6918 | flag_N = res; |
6919 | DREGu8((Opcode >> 9) & 7) = res; |
6920 | POST_IO |
6921 | RET(16) |
6922 | } |
6923 | |
6924 | // MOVEB |
6925 | OPCODE(0x10B9) |
6926 | { |
6927 | u32 adr, res; |
6928 | u32 src, dst; |
6929 | |
6930 | FETCH_LONG(adr); |
6931 | PRE_IO |
6932 | READ_BYTE_F(adr, res) |
6933 | flag_C = 0; |
6934 | flag_V = 0; |
6935 | flag_NotZ = res; |
6936 | flag_N = res; |
6937 | adr = AREG((Opcode >> 9) & 7); |
6938 | WRITE_BYTE_F(adr, res) |
6939 | POST_IO |
6940 | RET(20) |
6941 | } |
6942 | |
6943 | // MOVEB |
6944 | OPCODE(0x10F9) |
6945 | { |
6946 | u32 adr, res; |
6947 | u32 src, dst; |
6948 | |
6949 | FETCH_LONG(adr); |
6950 | PRE_IO |
6951 | READ_BYTE_F(adr, res) |
6952 | flag_C = 0; |
6953 | flag_V = 0; |
6954 | flag_NotZ = res; |
6955 | flag_N = res; |
6956 | adr = AREG((Opcode >> 9) & 7); |
6957 | AREG((Opcode >> 9) & 7) += 1; |
6958 | WRITE_BYTE_F(adr, res) |
6959 | POST_IO |
6960 | RET(20) |
6961 | } |
6962 | |
6963 | // MOVEB |
6964 | OPCODE(0x1139) |
6965 | { |
6966 | u32 adr, res; |
6967 | u32 src, dst; |
6968 | |
6969 | FETCH_LONG(adr); |
6970 | PRE_IO |
6971 | READ_BYTE_F(adr, res) |
6972 | flag_C = 0; |
6973 | flag_V = 0; |
6974 | flag_NotZ = res; |
6975 | flag_N = res; |
6976 | adr = AREG((Opcode >> 9) & 7) - 1; |
6977 | AREG((Opcode >> 9) & 7) = adr; |
6978 | WRITE_BYTE_F(adr, res) |
6979 | POST_IO |
6980 | RET(20) |
6981 | } |
6982 | |
6983 | // MOVEB |
6984 | OPCODE(0x1179) |
6985 | { |
6986 | u32 adr, res; |
6987 | u32 src, dst; |
6988 | |
6989 | FETCH_LONG(adr); |
6990 | PRE_IO |
6991 | READ_BYTE_F(adr, res) |
6992 | flag_C = 0; |
6993 | flag_V = 0; |
6994 | flag_NotZ = res; |
6995 | flag_N = res; |
6996 | FETCH_SWORD(adr); |
6997 | adr += AREG((Opcode >> 9) & 7); |
6998 | WRITE_BYTE_F(adr, res) |
6999 | POST_IO |
7000 | RET(24) |
7001 | } |
7002 | |
7003 | // MOVEB |
7004 | OPCODE(0x11B9) |
7005 | { |
7006 | u32 adr, res; |
7007 | u32 src, dst; |
7008 | |
7009 | FETCH_LONG(adr); |
7010 | PRE_IO |
7011 | READ_BYTE_F(adr, res) |
7012 | flag_C = 0; |
7013 | flag_V = 0; |
7014 | flag_NotZ = res; |
7015 | flag_N = res; |
7016 | adr = AREG((Opcode >> 9) & 7); |
7017 | DECODE_EXT_WORD |
7018 | WRITE_BYTE_F(adr, res) |
7019 | POST_IO |
7020 | RET(26) |
7021 | } |
7022 | |
7023 | // MOVEB |
7024 | OPCODE(0x11F9) |
7025 | { |
7026 | u32 adr, res; |
7027 | u32 src, dst; |
7028 | |
7029 | FETCH_LONG(adr); |
7030 | PRE_IO |
7031 | READ_BYTE_F(adr, res) |
7032 | flag_C = 0; |
7033 | flag_V = 0; |
7034 | flag_NotZ = res; |
7035 | flag_N = res; |
7036 | FETCH_SWORD(adr); |
7037 | WRITE_BYTE_F(adr, res) |
7038 | POST_IO |
7039 | RET(24) |
7040 | } |
7041 | |
7042 | // MOVEB |
7043 | OPCODE(0x13F9) |
7044 | { |
7045 | u32 adr, res; |
7046 | u32 src, dst; |
7047 | |
7048 | FETCH_LONG(adr); |
7049 | PRE_IO |
7050 | READ_BYTE_F(adr, res) |
7051 | flag_C = 0; |
7052 | flag_V = 0; |
7053 | flag_NotZ = res; |
7054 | flag_N = res; |
7055 | FETCH_LONG(adr); |
7056 | WRITE_BYTE_F(adr, res) |
7057 | POST_IO |
7058 | RET(28) |
7059 | } |
7060 | |
7061 | // MOVEB |
7062 | OPCODE(0x1EF9) |
7063 | { |
7064 | u32 adr, res; |
7065 | u32 src, dst; |
7066 | |
7067 | FETCH_LONG(adr); |
7068 | PRE_IO |
7069 | READ_BYTE_F(adr, res) |
7070 | flag_C = 0; |
7071 | flag_V = 0; |
7072 | flag_NotZ = res; |
7073 | flag_N = res; |
7074 | adr = AREG(7); |
7075 | AREG(7) += 2; |
7076 | WRITE_BYTE_F(adr, res) |
7077 | POST_IO |
7078 | RET(20) |
7079 | } |
7080 | |
7081 | // MOVEB |
7082 | OPCODE(0x1F39) |
7083 | { |
7084 | u32 adr, res; |
7085 | u32 src, dst; |
7086 | |
7087 | FETCH_LONG(adr); |
7088 | PRE_IO |
7089 | READ_BYTE_F(adr, res) |
7090 | flag_C = 0; |
7091 | flag_V = 0; |
7092 | flag_NotZ = res; |
7093 | flag_N = res; |
7094 | adr = AREG(7) - 2; |
7095 | AREG(7) = adr; |
7096 | WRITE_BYTE_F(adr, res) |
7097 | POST_IO |
7098 | RET(20) |
7099 | } |
7100 | |
7101 | // MOVEB |
7102 | OPCODE(0x103A) |
7103 | { |
7104 | u32 adr, res; |
7105 | u32 src, dst; |
7106 | |
7107 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7108 | PC++; |
7109 | PRE_IO |
7110 | READ_BYTE_F(adr, res) |
7111 | flag_C = 0; |
7112 | flag_V = 0; |
7113 | flag_NotZ = res; |
7114 | flag_N = res; |
7115 | DREGu8((Opcode >> 9) & 7) = res; |
7116 | POST_IO |
7117 | RET(12) |
7118 | } |
7119 | |
7120 | // MOVEB |
7121 | OPCODE(0x10BA) |
7122 | { |
7123 | u32 adr, res; |
7124 | u32 src, dst; |
7125 | |
7126 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7127 | PC++; |
7128 | PRE_IO |
7129 | READ_BYTE_F(adr, res) |
7130 | flag_C = 0; |
7131 | flag_V = 0; |
7132 | flag_NotZ = res; |
7133 | flag_N = res; |
7134 | adr = AREG((Opcode >> 9) & 7); |
7135 | WRITE_BYTE_F(adr, res) |
7136 | POST_IO |
7137 | RET(16) |
7138 | } |
7139 | |
7140 | // MOVEB |
7141 | OPCODE(0x10FA) |
7142 | { |
7143 | u32 adr, res; |
7144 | u32 src, dst; |
7145 | |
7146 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7147 | PC++; |
7148 | PRE_IO |
7149 | READ_BYTE_F(adr, res) |
7150 | flag_C = 0; |
7151 | flag_V = 0; |
7152 | flag_NotZ = res; |
7153 | flag_N = res; |
7154 | adr = AREG((Opcode >> 9) & 7); |
7155 | AREG((Opcode >> 9) & 7) += 1; |
7156 | WRITE_BYTE_F(adr, res) |
7157 | POST_IO |
7158 | RET(16) |
7159 | } |
7160 | |
7161 | // MOVEB |
7162 | OPCODE(0x113A) |
7163 | { |
7164 | u32 adr, res; |
7165 | u32 src, dst; |
7166 | |
7167 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7168 | PC++; |
7169 | PRE_IO |
7170 | READ_BYTE_F(adr, res) |
7171 | flag_C = 0; |
7172 | flag_V = 0; |
7173 | flag_NotZ = res; |
7174 | flag_N = res; |
7175 | adr = AREG((Opcode >> 9) & 7) - 1; |
7176 | AREG((Opcode >> 9) & 7) = adr; |
7177 | WRITE_BYTE_F(adr, res) |
7178 | POST_IO |
7179 | RET(16) |
7180 | } |
7181 | |
7182 | // MOVEB |
7183 | OPCODE(0x117A) |
7184 | { |
7185 | u32 adr, res; |
7186 | u32 src, dst; |
7187 | |
7188 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7189 | PC++; |
7190 | PRE_IO |
7191 | READ_BYTE_F(adr, res) |
7192 | flag_C = 0; |
7193 | flag_V = 0; |
7194 | flag_NotZ = res; |
7195 | flag_N = res; |
7196 | FETCH_SWORD(adr); |
7197 | adr += AREG((Opcode >> 9) & 7); |
7198 | WRITE_BYTE_F(adr, res) |
7199 | POST_IO |
7200 | RET(20) |
7201 | } |
7202 | |
7203 | // MOVEB |
7204 | OPCODE(0x11BA) |
7205 | { |
7206 | u32 adr, res; |
7207 | u32 src, dst; |
7208 | |
7209 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7210 | PC++; |
7211 | PRE_IO |
7212 | READ_BYTE_F(adr, res) |
7213 | flag_C = 0; |
7214 | flag_V = 0; |
7215 | flag_NotZ = res; |
7216 | flag_N = res; |
7217 | adr = AREG((Opcode >> 9) & 7); |
7218 | DECODE_EXT_WORD |
7219 | WRITE_BYTE_F(adr, res) |
7220 | POST_IO |
7221 | RET(22) |
7222 | } |
7223 | |
7224 | // MOVEB |
7225 | OPCODE(0x11FA) |
7226 | { |
7227 | u32 adr, res; |
7228 | u32 src, dst; |
7229 | |
7230 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7231 | PC++; |
7232 | PRE_IO |
7233 | READ_BYTE_F(adr, res) |
7234 | flag_C = 0; |
7235 | flag_V = 0; |
7236 | flag_NotZ = res; |
7237 | flag_N = res; |
7238 | FETCH_SWORD(adr); |
7239 | WRITE_BYTE_F(adr, res) |
7240 | POST_IO |
7241 | RET(20) |
7242 | } |
7243 | |
7244 | // MOVEB |
7245 | OPCODE(0x13FA) |
7246 | { |
7247 | u32 adr, res; |
7248 | u32 src, dst; |
7249 | |
7250 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7251 | PC++; |
7252 | PRE_IO |
7253 | READ_BYTE_F(adr, res) |
7254 | flag_C = 0; |
7255 | flag_V = 0; |
7256 | flag_NotZ = res; |
7257 | flag_N = res; |
7258 | FETCH_LONG(adr); |
7259 | WRITE_BYTE_F(adr, res) |
7260 | POST_IO |
7261 | RET(24) |
7262 | } |
7263 | |
7264 | // MOVEB |
7265 | OPCODE(0x1EFA) |
7266 | { |
7267 | u32 adr, res; |
7268 | u32 src, dst; |
7269 | |
7270 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7271 | PC++; |
7272 | PRE_IO |
7273 | READ_BYTE_F(adr, res) |
7274 | flag_C = 0; |
7275 | flag_V = 0; |
7276 | flag_NotZ = res; |
7277 | flag_N = res; |
7278 | adr = AREG(7); |
7279 | AREG(7) += 2; |
7280 | WRITE_BYTE_F(adr, res) |
7281 | POST_IO |
7282 | RET(16) |
7283 | } |
7284 | |
7285 | // MOVEB |
7286 | OPCODE(0x1F3A) |
7287 | { |
7288 | u32 adr, res; |
7289 | u32 src, dst; |
7290 | |
7291 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
7292 | PC++; |
7293 | PRE_IO |
7294 | READ_BYTE_F(adr, res) |
7295 | flag_C = 0; |
7296 | flag_V = 0; |
7297 | flag_NotZ = res; |
7298 | flag_N = res; |
7299 | adr = AREG(7) - 2; |
7300 | AREG(7) = adr; |
7301 | WRITE_BYTE_F(adr, res) |
7302 | POST_IO |
7303 | RET(16) |
7304 | } |
7305 | |
7306 | // MOVEB |
7307 | OPCODE(0x103B) |
7308 | { |
7309 | u32 adr, res; |
7310 | u32 src, dst; |
7311 | |
7312 | adr = (u32)(PC) - BasePC; |
7313 | DECODE_EXT_WORD |
7314 | PRE_IO |
7315 | READ_BYTE_F(adr, res) |
7316 | flag_C = 0; |
7317 | flag_V = 0; |
7318 | flag_NotZ = res; |
7319 | flag_N = res; |
7320 | DREGu8((Opcode >> 9) & 7) = res; |
7321 | POST_IO |
7322 | RET(14) |
7323 | } |
7324 | |
7325 | // MOVEB |
7326 | OPCODE(0x10BB) |
7327 | { |
7328 | u32 adr, res; |
7329 | u32 src, dst; |
7330 | |
7331 | adr = (u32)(PC) - BasePC; |
7332 | DECODE_EXT_WORD |
7333 | PRE_IO |
7334 | READ_BYTE_F(adr, res) |
7335 | flag_C = 0; |
7336 | flag_V = 0; |
7337 | flag_NotZ = res; |
7338 | flag_N = res; |
7339 | adr = AREG((Opcode >> 9) & 7); |
7340 | WRITE_BYTE_F(adr, res) |
7341 | POST_IO |
7342 | RET(18) |
7343 | } |
7344 | |
7345 | // MOVEB |
7346 | OPCODE(0x10FB) |
7347 | { |
7348 | u32 adr, res; |
7349 | u32 src, dst; |
7350 | |
7351 | adr = (u32)(PC) - BasePC; |
7352 | DECODE_EXT_WORD |
7353 | PRE_IO |
7354 | READ_BYTE_F(adr, res) |
7355 | flag_C = 0; |
7356 | flag_V = 0; |
7357 | flag_NotZ = res; |
7358 | flag_N = res; |
7359 | adr = AREG((Opcode >> 9) & 7); |
7360 | AREG((Opcode >> 9) & 7) += 1; |
7361 | WRITE_BYTE_F(adr, res) |
7362 | POST_IO |
7363 | RET(18) |
7364 | } |
7365 | |
7366 | // MOVEB |
7367 | OPCODE(0x113B) |
7368 | { |
7369 | u32 adr, res; |
7370 | u32 src, dst; |
7371 | |
7372 | adr = (u32)(PC) - BasePC; |
7373 | DECODE_EXT_WORD |
7374 | PRE_IO |
7375 | READ_BYTE_F(adr, res) |
7376 | flag_C = 0; |
7377 | flag_V = 0; |
7378 | flag_NotZ = res; |
7379 | flag_N = res; |
7380 | adr = AREG((Opcode >> 9) & 7) - 1; |
7381 | AREG((Opcode >> 9) & 7) = adr; |
7382 | WRITE_BYTE_F(adr, res) |
7383 | POST_IO |
7384 | RET(18) |
7385 | } |
7386 | |
7387 | // MOVEB |
7388 | OPCODE(0x117B) |
7389 | { |
7390 | u32 adr, res; |
7391 | u32 src, dst; |
7392 | |
7393 | adr = (u32)(PC) - BasePC; |
7394 | DECODE_EXT_WORD |
7395 | PRE_IO |
7396 | READ_BYTE_F(adr, res) |
7397 | flag_C = 0; |
7398 | flag_V = 0; |
7399 | flag_NotZ = res; |
7400 | flag_N = res; |
7401 | FETCH_SWORD(adr); |
7402 | adr += AREG((Opcode >> 9) & 7); |
7403 | WRITE_BYTE_F(adr, res) |
7404 | POST_IO |
7405 | RET(22) |
7406 | } |
7407 | |
7408 | // MOVEB |
7409 | OPCODE(0x11BB) |
7410 | { |
7411 | u32 adr, res; |
7412 | u32 src, dst; |
7413 | |
7414 | adr = (u32)(PC) - BasePC; |
7415 | DECODE_EXT_WORD |
7416 | PRE_IO |
7417 | READ_BYTE_F(adr, res) |
7418 | flag_C = 0; |
7419 | flag_V = 0; |
7420 | flag_NotZ = res; |
7421 | flag_N = res; |
7422 | adr = AREG((Opcode >> 9) & 7); |
7423 | DECODE_EXT_WORD |
7424 | WRITE_BYTE_F(adr, res) |
7425 | POST_IO |
7426 | RET(24) |
7427 | } |
7428 | |
7429 | // MOVEB |
7430 | OPCODE(0x11FB) |
7431 | { |
7432 | u32 adr, res; |
7433 | u32 src, dst; |
7434 | |
7435 | adr = (u32)(PC) - BasePC; |
7436 | DECODE_EXT_WORD |
7437 | PRE_IO |
7438 | READ_BYTE_F(adr, res) |
7439 | flag_C = 0; |
7440 | flag_V = 0; |
7441 | flag_NotZ = res; |
7442 | flag_N = res; |
7443 | FETCH_SWORD(adr); |
7444 | WRITE_BYTE_F(adr, res) |
7445 | POST_IO |
7446 | RET(22) |
7447 | } |
7448 | |
7449 | // MOVEB |
7450 | OPCODE(0x13FB) |
7451 | { |
7452 | u32 adr, res; |
7453 | u32 src, dst; |
7454 | |
7455 | adr = (u32)(PC) - BasePC; |
7456 | DECODE_EXT_WORD |
7457 | PRE_IO |
7458 | READ_BYTE_F(adr, res) |
7459 | flag_C = 0; |
7460 | flag_V = 0; |
7461 | flag_NotZ = res; |
7462 | flag_N = res; |
7463 | FETCH_LONG(adr); |
7464 | WRITE_BYTE_F(adr, res) |
7465 | POST_IO |
7466 | RET(26) |
7467 | } |
7468 | |
7469 | // MOVEB |
7470 | OPCODE(0x1EFB) |
7471 | { |
7472 | u32 adr, res; |
7473 | u32 src, dst; |
7474 | |
7475 | adr = (u32)(PC) - BasePC; |
7476 | DECODE_EXT_WORD |
7477 | PRE_IO |
7478 | READ_BYTE_F(adr, res) |
7479 | flag_C = 0; |
7480 | flag_V = 0; |
7481 | flag_NotZ = res; |
7482 | flag_N = res; |
7483 | adr = AREG(7); |
7484 | AREG(7) += 2; |
7485 | WRITE_BYTE_F(adr, res) |
7486 | POST_IO |
7487 | RET(18) |
7488 | } |
7489 | |
7490 | // MOVEB |
7491 | OPCODE(0x1F3B) |
7492 | { |
7493 | u32 adr, res; |
7494 | u32 src, dst; |
7495 | |
7496 | adr = (u32)(PC) - BasePC; |
7497 | DECODE_EXT_WORD |
7498 | PRE_IO |
7499 | READ_BYTE_F(adr, res) |
7500 | flag_C = 0; |
7501 | flag_V = 0; |
7502 | flag_NotZ = res; |
7503 | flag_N = res; |
7504 | adr = AREG(7) - 2; |
7505 | AREG(7) = adr; |
7506 | WRITE_BYTE_F(adr, res) |
7507 | POST_IO |
7508 | RET(18) |
7509 | } |
7510 | |
7511 | // MOVEB |
7512 | OPCODE(0x103C) |
7513 | { |
7514 | u32 adr, res; |
7515 | u32 src, dst; |
7516 | |
7517 | FETCH_BYTE(res); |
7518 | flag_C = 0; |
7519 | flag_V = 0; |
7520 | flag_NotZ = res; |
7521 | flag_N = res; |
7522 | DREGu8((Opcode >> 9) & 7) = res; |
7523 | RET(8) |
7524 | } |
7525 | |
7526 | // MOVEB |
7527 | OPCODE(0x10BC) |
7528 | { |
7529 | u32 adr, res; |
7530 | u32 src, dst; |
7531 | |
7532 | FETCH_BYTE(res); |
7533 | flag_C = 0; |
7534 | flag_V = 0; |
7535 | flag_NotZ = res; |
7536 | flag_N = res; |
7537 | adr = AREG((Opcode >> 9) & 7); |
7538 | PRE_IO |
7539 | WRITE_BYTE_F(adr, res) |
7540 | POST_IO |
7541 | RET(12) |
7542 | } |
7543 | |
7544 | // MOVEB |
7545 | OPCODE(0x10FC) |
7546 | { |
7547 | u32 adr, res; |
7548 | u32 src, dst; |
7549 | |
7550 | FETCH_BYTE(res); |
7551 | flag_C = 0; |
7552 | flag_V = 0; |
7553 | flag_NotZ = res; |
7554 | flag_N = res; |
7555 | adr = AREG((Opcode >> 9) & 7); |
7556 | AREG((Opcode >> 9) & 7) += 1; |
7557 | PRE_IO |
7558 | WRITE_BYTE_F(adr, res) |
7559 | POST_IO |
7560 | RET(12) |
7561 | } |
7562 | |
7563 | // MOVEB |
7564 | OPCODE(0x113C) |
7565 | { |
7566 | u32 adr, res; |
7567 | u32 src, dst; |
7568 | |
7569 | FETCH_BYTE(res); |
7570 | flag_C = 0; |
7571 | flag_V = 0; |
7572 | flag_NotZ = res; |
7573 | flag_N = res; |
7574 | adr = AREG((Opcode >> 9) & 7) - 1; |
7575 | AREG((Opcode >> 9) & 7) = adr; |
7576 | PRE_IO |
7577 | WRITE_BYTE_F(adr, res) |
7578 | POST_IO |
7579 | RET(12) |
7580 | } |
7581 | |
7582 | // MOVEB |
7583 | OPCODE(0x117C) |
7584 | { |
7585 | u32 adr, res; |
7586 | u32 src, dst; |
7587 | |
7588 | FETCH_BYTE(res); |
7589 | flag_C = 0; |
7590 | flag_V = 0; |
7591 | flag_NotZ = res; |
7592 | flag_N = res; |
7593 | FETCH_SWORD(adr); |
7594 | adr += AREG((Opcode >> 9) & 7); |
7595 | PRE_IO |
7596 | WRITE_BYTE_F(adr, res) |
7597 | POST_IO |
7598 | RET(16) |
7599 | } |
7600 | |
7601 | // MOVEB |
7602 | OPCODE(0x11BC) |
7603 | { |
7604 | u32 adr, res; |
7605 | u32 src, dst; |
7606 | |
7607 | FETCH_BYTE(res); |
7608 | flag_C = 0; |
7609 | flag_V = 0; |
7610 | flag_NotZ = res; |
7611 | flag_N = res; |
7612 | adr = AREG((Opcode >> 9) & 7); |
7613 | DECODE_EXT_WORD |
7614 | PRE_IO |
7615 | WRITE_BYTE_F(adr, res) |
7616 | POST_IO |
7617 | RET(18) |
7618 | } |
7619 | |
7620 | // MOVEB |
7621 | OPCODE(0x11FC) |
7622 | { |
7623 | u32 adr, res; |
7624 | u32 src, dst; |
7625 | |
7626 | FETCH_BYTE(res); |
7627 | flag_C = 0; |
7628 | flag_V = 0; |
7629 | flag_NotZ = res; |
7630 | flag_N = res; |
7631 | FETCH_SWORD(adr); |
7632 | PRE_IO |
7633 | WRITE_BYTE_F(adr, res) |
7634 | POST_IO |
7635 | RET(16) |
7636 | } |
7637 | |
7638 | // MOVEB |
7639 | OPCODE(0x13FC) |
7640 | { |
7641 | u32 adr, res; |
7642 | u32 src, dst; |
7643 | |
7644 | FETCH_BYTE(res); |
7645 | flag_C = 0; |
7646 | flag_V = 0; |
7647 | flag_NotZ = res; |
7648 | flag_N = res; |
7649 | FETCH_LONG(adr); |
7650 | PRE_IO |
7651 | WRITE_BYTE_F(adr, res) |
7652 | POST_IO |
7653 | RET(20) |
7654 | } |
7655 | |
7656 | // MOVEB |
7657 | OPCODE(0x1EFC) |
7658 | { |
7659 | u32 adr, res; |
7660 | u32 src, dst; |
7661 | |
7662 | FETCH_BYTE(res); |
7663 | flag_C = 0; |
7664 | flag_V = 0; |
7665 | flag_NotZ = res; |
7666 | flag_N = res; |
7667 | adr = AREG(7); |
7668 | AREG(7) += 2; |
7669 | PRE_IO |
7670 | WRITE_BYTE_F(adr, res) |
7671 | POST_IO |
7672 | RET(12) |
7673 | } |
7674 | |
7675 | // MOVEB |
7676 | OPCODE(0x1F3C) |
7677 | { |
7678 | u32 adr, res; |
7679 | u32 src, dst; |
7680 | |
7681 | FETCH_BYTE(res); |
7682 | flag_C = 0; |
7683 | flag_V = 0; |
7684 | flag_NotZ = res; |
7685 | flag_N = res; |
7686 | adr = AREG(7) - 2; |
7687 | AREG(7) = adr; |
7688 | PRE_IO |
7689 | WRITE_BYTE_F(adr, res) |
7690 | POST_IO |
7691 | RET(12) |
7692 | } |
7693 | |
7694 | // MOVEB |
7695 | OPCODE(0x101F) |
7696 | { |
7697 | u32 adr, res; |
7698 | u32 src, dst; |
7699 | |
7700 | adr = AREG(7); |
7701 | AREG(7) += 2; |
7702 | PRE_IO |
7703 | READ_BYTE_F(adr, res) |
7704 | flag_C = 0; |
7705 | flag_V = 0; |
7706 | flag_NotZ = res; |
7707 | flag_N = res; |
7708 | DREGu8((Opcode >> 9) & 7) = res; |
7709 | POST_IO |
7710 | RET(8) |
7711 | } |
7712 | |
7713 | // MOVEB |
7714 | OPCODE(0x109F) |
7715 | { |
7716 | u32 adr, res; |
7717 | u32 src, dst; |
7718 | |
7719 | adr = AREG(7); |
7720 | AREG(7) += 2; |
7721 | PRE_IO |
7722 | READ_BYTE_F(adr, res) |
7723 | flag_C = 0; |
7724 | flag_V = 0; |
7725 | flag_NotZ = res; |
7726 | flag_N = res; |
7727 | adr = AREG((Opcode >> 9) & 7); |
7728 | WRITE_BYTE_F(adr, res) |
7729 | POST_IO |
7730 | RET(12) |
7731 | } |
7732 | |
7733 | // MOVEB |
7734 | OPCODE(0x10DF) |
7735 | { |
7736 | u32 adr, res; |
7737 | u32 src, dst; |
7738 | |
7739 | adr = AREG(7); |
7740 | AREG(7) += 2; |
7741 | PRE_IO |
7742 | READ_BYTE_F(adr, res) |
7743 | flag_C = 0; |
7744 | flag_V = 0; |
7745 | flag_NotZ = res; |
7746 | flag_N = res; |
7747 | adr = AREG((Opcode >> 9) & 7); |
7748 | AREG((Opcode >> 9) & 7) += 1; |
7749 | WRITE_BYTE_F(adr, res) |
7750 | POST_IO |
7751 | RET(12) |
7752 | } |
7753 | |
7754 | // MOVEB |
7755 | OPCODE(0x111F) |
7756 | { |
7757 | u32 adr, res; |
7758 | u32 src, dst; |
7759 | |
7760 | adr = AREG(7); |
7761 | AREG(7) += 2; |
7762 | PRE_IO |
7763 | READ_BYTE_F(adr, res) |
7764 | flag_C = 0; |
7765 | flag_V = 0; |
7766 | flag_NotZ = res; |
7767 | flag_N = res; |
7768 | adr = AREG((Opcode >> 9) & 7) - 1; |
7769 | AREG((Opcode >> 9) & 7) = adr; |
7770 | WRITE_BYTE_F(adr, res) |
7771 | POST_IO |
7772 | RET(12) |
7773 | } |
7774 | |
7775 | // MOVEB |
7776 | OPCODE(0x115F) |
7777 | { |
7778 | u32 adr, res; |
7779 | u32 src, dst; |
7780 | |
7781 | adr = AREG(7); |
7782 | AREG(7) += 2; |
7783 | PRE_IO |
7784 | READ_BYTE_F(adr, res) |
7785 | flag_C = 0; |
7786 | flag_V = 0; |
7787 | flag_NotZ = res; |
7788 | flag_N = res; |
7789 | FETCH_SWORD(adr); |
7790 | adr += AREG((Opcode >> 9) & 7); |
7791 | WRITE_BYTE_F(adr, res) |
7792 | POST_IO |
7793 | RET(16) |
7794 | } |
7795 | |
7796 | // MOVEB |
7797 | OPCODE(0x119F) |
7798 | { |
7799 | u32 adr, res; |
7800 | u32 src, dst; |
7801 | |
7802 | adr = AREG(7); |
7803 | AREG(7) += 2; |
7804 | PRE_IO |
7805 | READ_BYTE_F(adr, res) |
7806 | flag_C = 0; |
7807 | flag_V = 0; |
7808 | flag_NotZ = res; |
7809 | flag_N = res; |
7810 | adr = AREG((Opcode >> 9) & 7); |
7811 | DECODE_EXT_WORD |
7812 | WRITE_BYTE_F(adr, res) |
7813 | POST_IO |
7814 | RET(18) |
7815 | } |
7816 | |
7817 | // MOVEB |
7818 | OPCODE(0x11DF) |
7819 | { |
7820 | u32 adr, res; |
7821 | u32 src, dst; |
7822 | |
7823 | adr = AREG(7); |
7824 | AREG(7) += 2; |
7825 | PRE_IO |
7826 | READ_BYTE_F(adr, res) |
7827 | flag_C = 0; |
7828 | flag_V = 0; |
7829 | flag_NotZ = res; |
7830 | flag_N = res; |
7831 | FETCH_SWORD(adr); |
7832 | WRITE_BYTE_F(adr, res) |
7833 | POST_IO |
7834 | RET(16) |
7835 | } |
7836 | |
7837 | // MOVEB |
7838 | OPCODE(0x13DF) |
7839 | { |
7840 | u32 adr, res; |
7841 | u32 src, dst; |
7842 | |
7843 | adr = AREG(7); |
7844 | AREG(7) += 2; |
7845 | PRE_IO |
7846 | READ_BYTE_F(adr, res) |
7847 | flag_C = 0; |
7848 | flag_V = 0; |
7849 | flag_NotZ = res; |
7850 | flag_N = res; |
7851 | FETCH_LONG(adr); |
7852 | WRITE_BYTE_F(adr, res) |
7853 | POST_IO |
7854 | RET(20) |
7855 | } |
7856 | |
7857 | // MOVEB |
7858 | OPCODE(0x1EDF) |
7859 | { |
7860 | u32 adr, res; |
7861 | u32 src, dst; |
7862 | |
7863 | adr = AREG(7); |
7864 | AREG(7) += 2; |
7865 | PRE_IO |
7866 | READ_BYTE_F(adr, res) |
7867 | flag_C = 0; |
7868 | flag_V = 0; |
7869 | flag_NotZ = res; |
7870 | flag_N = res; |
7871 | adr = AREG(7); |
7872 | AREG(7) += 2; |
7873 | WRITE_BYTE_F(adr, res) |
7874 | POST_IO |
7875 | RET(12) |
7876 | } |
7877 | |
7878 | // MOVEB |
7879 | OPCODE(0x1F1F) |
7880 | { |
7881 | u32 adr, res; |
7882 | u32 src, dst; |
7883 | |
7884 | adr = AREG(7); |
7885 | AREG(7) += 2; |
7886 | PRE_IO |
7887 | READ_BYTE_F(adr, res) |
7888 | flag_C = 0; |
7889 | flag_V = 0; |
7890 | flag_NotZ = res; |
7891 | flag_N = res; |
7892 | adr = AREG(7) - 2; |
7893 | AREG(7) = adr; |
7894 | WRITE_BYTE_F(adr, res) |
7895 | POST_IO |
7896 | RET(12) |
7897 | } |
7898 | |
7899 | // MOVEB |
7900 | OPCODE(0x1027) |
7901 | { |
7902 | u32 adr, res; |
7903 | u32 src, dst; |
7904 | |
7905 | adr = AREG(7) - 2; |
7906 | AREG(7) = adr; |
7907 | PRE_IO |
7908 | READ_BYTE_F(adr, res) |
7909 | flag_C = 0; |
7910 | flag_V = 0; |
7911 | flag_NotZ = res; |
7912 | flag_N = res; |
7913 | DREGu8((Opcode >> 9) & 7) = res; |
7914 | POST_IO |
7915 | RET(10) |
7916 | } |
7917 | |
7918 | // MOVEB |
7919 | OPCODE(0x10A7) |
7920 | { |
7921 | u32 adr, res; |
7922 | u32 src, dst; |
7923 | |
7924 | adr = AREG(7) - 2; |
7925 | AREG(7) = adr; |
7926 | PRE_IO |
7927 | READ_BYTE_F(adr, res) |
7928 | flag_C = 0; |
7929 | flag_V = 0; |
7930 | flag_NotZ = res; |
7931 | flag_N = res; |
7932 | adr = AREG((Opcode >> 9) & 7); |
7933 | WRITE_BYTE_F(adr, res) |
7934 | POST_IO |
7935 | RET(14) |
7936 | } |
7937 | |
7938 | // MOVEB |
7939 | OPCODE(0x10E7) |
7940 | { |
7941 | u32 adr, res; |
7942 | u32 src, dst; |
7943 | |
7944 | adr = AREG(7) - 2; |
7945 | AREG(7) = adr; |
7946 | PRE_IO |
7947 | READ_BYTE_F(adr, res) |
7948 | flag_C = 0; |
7949 | flag_V = 0; |
7950 | flag_NotZ = res; |
7951 | flag_N = res; |
7952 | adr = AREG((Opcode >> 9) & 7); |
7953 | AREG((Opcode >> 9) & 7) += 1; |
7954 | WRITE_BYTE_F(adr, res) |
7955 | POST_IO |
7956 | RET(14) |
7957 | } |
7958 | |
7959 | // MOVEB |
7960 | OPCODE(0x1127) |
7961 | { |
7962 | u32 adr, res; |
7963 | u32 src, dst; |
7964 | |
7965 | adr = AREG(7) - 2; |
7966 | AREG(7) = adr; |
7967 | PRE_IO |
7968 | READ_BYTE_F(adr, res) |
7969 | flag_C = 0; |
7970 | flag_V = 0; |
7971 | flag_NotZ = res; |
7972 | flag_N = res; |
7973 | adr = AREG((Opcode >> 9) & 7) - 1; |
7974 | AREG((Opcode >> 9) & 7) = adr; |
7975 | WRITE_BYTE_F(adr, res) |
7976 | POST_IO |
7977 | RET(14) |
7978 | } |
7979 | |
7980 | // MOVEB |
7981 | OPCODE(0x1167) |
7982 | { |
7983 | u32 adr, res; |
7984 | u32 src, dst; |
7985 | |
7986 | adr = AREG(7) - 2; |
7987 | AREG(7) = adr; |
7988 | PRE_IO |
7989 | READ_BYTE_F(adr, res) |
7990 | flag_C = 0; |
7991 | flag_V = 0; |
7992 | flag_NotZ = res; |
7993 | flag_N = res; |
7994 | FETCH_SWORD(adr); |
7995 | adr += AREG((Opcode >> 9) & 7); |
7996 | WRITE_BYTE_F(adr, res) |
7997 | POST_IO |
7998 | RET(18) |
7999 | } |
8000 | |
8001 | // MOVEB |
8002 | OPCODE(0x11A7) |
8003 | { |
8004 | u32 adr, res; |
8005 | u32 src, dst; |
8006 | |
8007 | adr = AREG(7) - 2; |
8008 | AREG(7) = adr; |
8009 | PRE_IO |
8010 | READ_BYTE_F(adr, res) |
8011 | flag_C = 0; |
8012 | flag_V = 0; |
8013 | flag_NotZ = res; |
8014 | flag_N = res; |
8015 | adr = AREG((Opcode >> 9) & 7); |
8016 | DECODE_EXT_WORD |
8017 | WRITE_BYTE_F(adr, res) |
8018 | POST_IO |
8019 | RET(20) |
8020 | } |
8021 | |
8022 | // MOVEB |
8023 | OPCODE(0x11E7) |
8024 | { |
8025 | u32 adr, res; |
8026 | u32 src, dst; |
8027 | |
8028 | adr = AREG(7) - 2; |
8029 | AREG(7) = adr; |
8030 | PRE_IO |
8031 | READ_BYTE_F(adr, res) |
8032 | flag_C = 0; |
8033 | flag_V = 0; |
8034 | flag_NotZ = res; |
8035 | flag_N = res; |
8036 | FETCH_SWORD(adr); |
8037 | WRITE_BYTE_F(adr, res) |
8038 | POST_IO |
8039 | RET(18) |
8040 | } |
8041 | |
8042 | // MOVEB |
8043 | OPCODE(0x13E7) |
8044 | { |
8045 | u32 adr, res; |
8046 | u32 src, dst; |
8047 | |
8048 | adr = AREG(7) - 2; |
8049 | AREG(7) = adr; |
8050 | PRE_IO |
8051 | READ_BYTE_F(adr, res) |
8052 | flag_C = 0; |
8053 | flag_V = 0; |
8054 | flag_NotZ = res; |
8055 | flag_N = res; |
8056 | FETCH_LONG(adr); |
8057 | WRITE_BYTE_F(adr, res) |
8058 | POST_IO |
8059 | RET(22) |
8060 | } |
8061 | |
8062 | // MOVEB |
8063 | OPCODE(0x1EE7) |
8064 | { |
8065 | u32 adr, res; |
8066 | u32 src, dst; |
8067 | |
8068 | adr = AREG(7) - 2; |
8069 | AREG(7) = adr; |
8070 | PRE_IO |
8071 | READ_BYTE_F(adr, res) |
8072 | flag_C = 0; |
8073 | flag_V = 0; |
8074 | flag_NotZ = res; |
8075 | flag_N = res; |
8076 | adr = AREG(7); |
8077 | AREG(7) += 2; |
8078 | WRITE_BYTE_F(adr, res) |
8079 | POST_IO |
8080 | RET(14) |
8081 | } |
8082 | |
8083 | // MOVEB |
8084 | OPCODE(0x1F27) |
8085 | { |
8086 | u32 adr, res; |
8087 | u32 src, dst; |
8088 | |
8089 | adr = AREG(7) - 2; |
8090 | AREG(7) = adr; |
8091 | PRE_IO |
8092 | READ_BYTE_F(adr, res) |
8093 | flag_C = 0; |
8094 | flag_V = 0; |
8095 | flag_NotZ = res; |
8096 | flag_N = res; |
8097 | adr = AREG(7) - 2; |
8098 | AREG(7) = adr; |
8099 | WRITE_BYTE_F(adr, res) |
8100 | POST_IO |
8101 | RET(14) |
8102 | } |
8103 | |
8104 | // MOVEL |
8105 | OPCODE(0x2000) |
8106 | { |
8107 | u32 adr, res; |
8108 | u32 src, dst; |
8109 | |
8110 | res = DREGu32((Opcode >> 0) & 7); |
8111 | flag_C = 0; |
8112 | flag_V = 0; |
8113 | flag_NotZ = res; |
8114 | flag_N = res >> 24; |
8115 | DREGu32((Opcode >> 9) & 7) = res; |
8116 | RET(4) |
8117 | } |
8118 | |
8119 | // MOVEL |
8120 | OPCODE(0x2080) |
8121 | { |
8122 | u32 adr, res; |
8123 | u32 src, dst; |
8124 | |
8125 | res = DREGu32((Opcode >> 0) & 7); |
8126 | flag_C = 0; |
8127 | flag_V = 0; |
8128 | flag_NotZ = res; |
8129 | flag_N = res >> 24; |
8130 | adr = AREG((Opcode >> 9) & 7); |
8131 | PRE_IO |
8132 | WRITE_LONG_F(adr, res) |
8133 | POST_IO |
8134 | RET(12) |
8135 | } |
8136 | |
8137 | // MOVEL |
8138 | OPCODE(0x20C0) |
8139 | { |
8140 | u32 adr, res; |
8141 | u32 src, dst; |
8142 | |
8143 | res = DREGu32((Opcode >> 0) & 7); |
8144 | flag_C = 0; |
8145 | flag_V = 0; |
8146 | flag_NotZ = res; |
8147 | flag_N = res >> 24; |
8148 | adr = AREG((Opcode >> 9) & 7); |
8149 | AREG((Opcode >> 9) & 7) += 4; |
8150 | PRE_IO |
8151 | WRITE_LONG_F(adr, res) |
8152 | POST_IO |
8153 | RET(12) |
8154 | } |
8155 | |
8156 | // MOVEL |
8157 | OPCODE(0x2100) |
8158 | { |
8159 | u32 adr, res; |
8160 | u32 src, dst; |
8161 | |
8162 | res = DREGu32((Opcode >> 0) & 7); |
8163 | flag_C = 0; |
8164 | flag_V = 0; |
8165 | flag_NotZ = res; |
8166 | flag_N = res >> 24; |
8167 | adr = AREG((Opcode >> 9) & 7) - 4; |
8168 | AREG((Opcode >> 9) & 7) = adr; |
8169 | PRE_IO |
8170 | WRITE_LONG_F(adr, res) |
8171 | POST_IO |
8172 | RET(12) |
8173 | } |
8174 | |
8175 | // MOVEL |
8176 | OPCODE(0x2140) |
8177 | { |
8178 | u32 adr, res; |
8179 | u32 src, dst; |
8180 | |
8181 | res = DREGu32((Opcode >> 0) & 7); |
8182 | flag_C = 0; |
8183 | flag_V = 0; |
8184 | flag_NotZ = res; |
8185 | flag_N = res >> 24; |
8186 | FETCH_SWORD(adr); |
8187 | adr += AREG((Opcode >> 9) & 7); |
8188 | PRE_IO |
8189 | WRITE_LONG_F(adr, res) |
8190 | POST_IO |
8191 | RET(16) |
8192 | } |
8193 | |
8194 | // MOVEL |
8195 | OPCODE(0x2180) |
8196 | { |
8197 | u32 adr, res; |
8198 | u32 src, dst; |
8199 | |
8200 | res = DREGu32((Opcode >> 0) & 7); |
8201 | flag_C = 0; |
8202 | flag_V = 0; |
8203 | flag_NotZ = res; |
8204 | flag_N = res >> 24; |
8205 | adr = AREG((Opcode >> 9) & 7); |
8206 | DECODE_EXT_WORD |
8207 | PRE_IO |
8208 | WRITE_LONG_F(adr, res) |
8209 | POST_IO |
8210 | RET(18) |
8211 | } |
8212 | |
8213 | // MOVEL |
8214 | OPCODE(0x21C0) |
8215 | { |
8216 | u32 adr, res; |
8217 | u32 src, dst; |
8218 | |
8219 | res = DREGu32((Opcode >> 0) & 7); |
8220 | flag_C = 0; |
8221 | flag_V = 0; |
8222 | flag_NotZ = res; |
8223 | flag_N = res >> 24; |
8224 | FETCH_SWORD(adr); |
8225 | PRE_IO |
8226 | WRITE_LONG_F(adr, res) |
8227 | POST_IO |
8228 | RET(16) |
8229 | } |
8230 | |
8231 | // MOVEL |
8232 | OPCODE(0x23C0) |
8233 | { |
8234 | u32 adr, res; |
8235 | u32 src, dst; |
8236 | |
8237 | res = DREGu32((Opcode >> 0) & 7); |
8238 | flag_C = 0; |
8239 | flag_V = 0; |
8240 | flag_NotZ = res; |
8241 | flag_N = res >> 24; |
8242 | FETCH_LONG(adr); |
8243 | PRE_IO |
8244 | WRITE_LONG_F(adr, res) |
8245 | POST_IO |
8246 | RET(20) |
8247 | } |
8248 | |
8249 | // MOVEL |
8250 | OPCODE(0x2EC0) |
8251 | { |
8252 | u32 adr, res; |
8253 | u32 src, dst; |
8254 | |
8255 | res = DREGu32((Opcode >> 0) & 7); |
8256 | flag_C = 0; |
8257 | flag_V = 0; |
8258 | flag_NotZ = res; |
8259 | flag_N = res >> 24; |
8260 | adr = AREG(7); |
8261 | AREG(7) += 4; |
8262 | PRE_IO |
8263 | WRITE_LONG_F(adr, res) |
8264 | POST_IO |
8265 | RET(12) |
8266 | } |
8267 | |
8268 | // MOVEL |
8269 | OPCODE(0x2F00) |
8270 | { |
8271 | u32 adr, res; |
8272 | u32 src, dst; |
8273 | |
8274 | res = DREGu32((Opcode >> 0) & 7); |
8275 | flag_C = 0; |
8276 | flag_V = 0; |
8277 | flag_NotZ = res; |
8278 | flag_N = res >> 24; |
8279 | adr = AREG(7) - 4; |
8280 | AREG(7) = adr; |
8281 | PRE_IO |
8282 | WRITE_LONG_F(adr, res) |
8283 | POST_IO |
8284 | RET(12) |
8285 | } |
8286 | |
8287 | // MOVEL |
8288 | OPCODE(0x2008) |
8289 | { |
8290 | u32 adr, res; |
8291 | u32 src, dst; |
8292 | |
8293 | res = AREGu32((Opcode >> 0) & 7); |
8294 | flag_C = 0; |
8295 | flag_V = 0; |
8296 | flag_NotZ = res; |
8297 | flag_N = res >> 24; |
8298 | DREGu32((Opcode >> 9) & 7) = res; |
8299 | RET(4) |
8300 | } |
8301 | |
8302 | // MOVEL |
8303 | OPCODE(0x2088) |
8304 | { |
8305 | u32 adr, res; |
8306 | u32 src, dst; |
8307 | |
8308 | res = AREGu32((Opcode >> 0) & 7); |
8309 | flag_C = 0; |
8310 | flag_V = 0; |
8311 | flag_NotZ = res; |
8312 | flag_N = res >> 24; |
8313 | adr = AREG((Opcode >> 9) & 7); |
8314 | PRE_IO |
8315 | WRITE_LONG_F(adr, res) |
8316 | POST_IO |
8317 | RET(12) |
8318 | } |
8319 | |
8320 | // MOVEL |
8321 | OPCODE(0x20C8) |
8322 | { |
8323 | u32 adr, res; |
8324 | u32 src, dst; |
8325 | |
8326 | res = AREGu32((Opcode >> 0) & 7); |
8327 | flag_C = 0; |
8328 | flag_V = 0; |
8329 | flag_NotZ = res; |
8330 | flag_N = res >> 24; |
8331 | adr = AREG((Opcode >> 9) & 7); |
8332 | AREG((Opcode >> 9) & 7) += 4; |
8333 | PRE_IO |
8334 | WRITE_LONG_F(adr, res) |
8335 | POST_IO |
8336 | RET(12) |
8337 | } |
8338 | |
8339 | // MOVEL |
8340 | OPCODE(0x2108) |
8341 | { |
8342 | u32 adr, res; |
8343 | u32 src, dst; |
8344 | |
8345 | res = AREGu32((Opcode >> 0) & 7); |
8346 | flag_C = 0; |
8347 | flag_V = 0; |
8348 | flag_NotZ = res; |
8349 | flag_N = res >> 24; |
8350 | adr = AREG((Opcode >> 9) & 7) - 4; |
8351 | AREG((Opcode >> 9) & 7) = adr; |
8352 | PRE_IO |
8353 | WRITE_LONG_F(adr, res) |
8354 | POST_IO |
8355 | RET(12) |
8356 | } |
8357 | |
8358 | // MOVEL |
8359 | OPCODE(0x2148) |
8360 | { |
8361 | u32 adr, res; |
8362 | u32 src, dst; |
8363 | |
8364 | res = AREGu32((Opcode >> 0) & 7); |
8365 | flag_C = 0; |
8366 | flag_V = 0; |
8367 | flag_NotZ = res; |
8368 | flag_N = res >> 24; |
8369 | FETCH_SWORD(adr); |
8370 | adr += AREG((Opcode >> 9) & 7); |
8371 | PRE_IO |
8372 | WRITE_LONG_F(adr, res) |
8373 | POST_IO |
8374 | RET(16) |
8375 | } |
8376 | |
8377 | // MOVEL |
8378 | OPCODE(0x2188) |
8379 | { |
8380 | u32 adr, res; |
8381 | u32 src, dst; |
8382 | |
8383 | res = AREGu32((Opcode >> 0) & 7); |
8384 | flag_C = 0; |
8385 | flag_V = 0; |
8386 | flag_NotZ = res; |
8387 | flag_N = res >> 24; |
8388 | adr = AREG((Opcode >> 9) & 7); |
8389 | DECODE_EXT_WORD |
8390 | PRE_IO |
8391 | WRITE_LONG_F(adr, res) |
8392 | POST_IO |
8393 | RET(18) |
8394 | } |
8395 | |
8396 | // MOVEL |
8397 | OPCODE(0x21C8) |
8398 | { |
8399 | u32 adr, res; |
8400 | u32 src, dst; |
8401 | |
8402 | res = AREGu32((Opcode >> 0) & 7); |
8403 | flag_C = 0; |
8404 | flag_V = 0; |
8405 | flag_NotZ = res; |
8406 | flag_N = res >> 24; |
8407 | FETCH_SWORD(adr); |
8408 | PRE_IO |
8409 | WRITE_LONG_F(adr, res) |
8410 | POST_IO |
8411 | RET(16) |
8412 | } |
8413 | |
8414 | // MOVEL |
8415 | OPCODE(0x23C8) |
8416 | { |
8417 | u32 adr, res; |
8418 | u32 src, dst; |
8419 | |
8420 | res = AREGu32((Opcode >> 0) & 7); |
8421 | flag_C = 0; |
8422 | flag_V = 0; |
8423 | flag_NotZ = res; |
8424 | flag_N = res >> 24; |
8425 | FETCH_LONG(adr); |
8426 | PRE_IO |
8427 | WRITE_LONG_F(adr, res) |
8428 | POST_IO |
8429 | RET(20) |
8430 | } |
8431 | |
8432 | // MOVEL |
8433 | OPCODE(0x2EC8) |
8434 | { |
8435 | u32 adr, res; |
8436 | u32 src, dst; |
8437 | |
8438 | res = AREGu32((Opcode >> 0) & 7); |
8439 | flag_C = 0; |
8440 | flag_V = 0; |
8441 | flag_NotZ = res; |
8442 | flag_N = res >> 24; |
8443 | adr = AREG(7); |
8444 | AREG(7) += 4; |
8445 | PRE_IO |
8446 | WRITE_LONG_F(adr, res) |
8447 | POST_IO |
8448 | RET(12) |
8449 | } |
8450 | |
8451 | // MOVEL |
8452 | OPCODE(0x2F08) |
8453 | { |
8454 | u32 adr, res; |
8455 | u32 src, dst; |
8456 | |
8457 | res = AREGu32((Opcode >> 0) & 7); |
8458 | flag_C = 0; |
8459 | flag_V = 0; |
8460 | flag_NotZ = res; |
8461 | flag_N = res >> 24; |
8462 | adr = AREG(7) - 4; |
8463 | AREG(7) = adr; |
8464 | PRE_IO |
8465 | WRITE_LONG_F(adr, res) |
8466 | POST_IO |
8467 | RET(12) |
8468 | } |
8469 | |
8470 | // MOVEL |
8471 | OPCODE(0x2010) |
8472 | { |
8473 | u32 adr, res; |
8474 | u32 src, dst; |
8475 | |
8476 | adr = AREG((Opcode >> 0) & 7); |
8477 | PRE_IO |
8478 | READ_LONG_F(adr, res) |
8479 | flag_C = 0; |
8480 | flag_V = 0; |
8481 | flag_NotZ = res; |
8482 | flag_N = res >> 24; |
8483 | DREGu32((Opcode >> 9) & 7) = res; |
8484 | POST_IO |
8485 | RET(12) |
8486 | } |
8487 | |
8488 | // MOVEL |
8489 | OPCODE(0x2090) |
8490 | { |
8491 | u32 adr, res; |
8492 | u32 src, dst; |
8493 | |
8494 | adr = AREG((Opcode >> 0) & 7); |
8495 | PRE_IO |
8496 | READ_LONG_F(adr, res) |
8497 | flag_C = 0; |
8498 | flag_V = 0; |
8499 | flag_NotZ = res; |
8500 | flag_N = res >> 24; |
8501 | adr = AREG((Opcode >> 9) & 7); |
8502 | WRITE_LONG_F(adr, res) |
8503 | POST_IO |
8504 | RET(20) |
8505 | } |
8506 | |
8507 | // MOVEL |
8508 | OPCODE(0x20D0) |
8509 | { |
8510 | u32 adr, res; |
8511 | u32 src, dst; |
8512 | |
8513 | adr = AREG((Opcode >> 0) & 7); |
8514 | PRE_IO |
8515 | READ_LONG_F(adr, res) |
8516 | flag_C = 0; |
8517 | flag_V = 0; |
8518 | flag_NotZ = res; |
8519 | flag_N = res >> 24; |
8520 | adr = AREG((Opcode >> 9) & 7); |
8521 | AREG((Opcode >> 9) & 7) += 4; |
8522 | WRITE_LONG_F(adr, res) |
8523 | POST_IO |
8524 | RET(20) |
8525 | } |
8526 | |
8527 | // MOVEL |
8528 | OPCODE(0x2110) |
8529 | { |
8530 | u32 adr, res; |
8531 | u32 src, dst; |
8532 | |
8533 | adr = AREG((Opcode >> 0) & 7); |
8534 | PRE_IO |
8535 | READ_LONG_F(adr, res) |
8536 | flag_C = 0; |
8537 | flag_V = 0; |
8538 | flag_NotZ = res; |
8539 | flag_N = res >> 24; |
8540 | adr = AREG((Opcode >> 9) & 7) - 4; |
8541 | AREG((Opcode >> 9) & 7) = adr; |
8542 | WRITE_LONG_F(adr, res) |
8543 | POST_IO |
8544 | RET(20) |
8545 | } |
8546 | |
8547 | // MOVEL |
8548 | OPCODE(0x2150) |
8549 | { |
8550 | u32 adr, res; |
8551 | u32 src, dst; |
8552 | |
8553 | adr = AREG((Opcode >> 0) & 7); |
8554 | PRE_IO |
8555 | READ_LONG_F(adr, res) |
8556 | flag_C = 0; |
8557 | flag_V = 0; |
8558 | flag_NotZ = res; |
8559 | flag_N = res >> 24; |
8560 | FETCH_SWORD(adr); |
8561 | adr += AREG((Opcode >> 9) & 7); |
8562 | WRITE_LONG_F(adr, res) |
8563 | POST_IO |
8564 | RET(24) |
8565 | } |
8566 | |
8567 | // MOVEL |
8568 | OPCODE(0x2190) |
8569 | { |
8570 | u32 adr, res; |
8571 | u32 src, dst; |
8572 | |
8573 | adr = AREG((Opcode >> 0) & 7); |
8574 | PRE_IO |
8575 | READ_LONG_F(adr, res) |
8576 | flag_C = 0; |
8577 | flag_V = 0; |
8578 | flag_NotZ = res; |
8579 | flag_N = res >> 24; |
8580 | adr = AREG((Opcode >> 9) & 7); |
8581 | DECODE_EXT_WORD |
8582 | WRITE_LONG_F(adr, res) |
8583 | POST_IO |
8584 | RET(26) |
8585 | } |
8586 | |
8587 | // MOVEL |
8588 | OPCODE(0x21D0) |
8589 | { |
8590 | u32 adr, res; |
8591 | u32 src, dst; |
8592 | |
8593 | adr = AREG((Opcode >> 0) & 7); |
8594 | PRE_IO |
8595 | READ_LONG_F(adr, res) |
8596 | flag_C = 0; |
8597 | flag_V = 0; |
8598 | flag_NotZ = res; |
8599 | flag_N = res >> 24; |
8600 | FETCH_SWORD(adr); |
8601 | WRITE_LONG_F(adr, res) |
8602 | POST_IO |
8603 | RET(24) |
8604 | } |
8605 | |
8606 | // MOVEL |
8607 | OPCODE(0x23D0) |
8608 | { |
8609 | u32 adr, res; |
8610 | u32 src, dst; |
8611 | |
8612 | adr = AREG((Opcode >> 0) & 7); |
8613 | PRE_IO |
8614 | READ_LONG_F(adr, res) |
8615 | flag_C = 0; |
8616 | flag_V = 0; |
8617 | flag_NotZ = res; |
8618 | flag_N = res >> 24; |
8619 | FETCH_LONG(adr); |
8620 | WRITE_LONG_F(adr, res) |
8621 | POST_IO |
8622 | RET(28) |
8623 | } |
8624 | |
8625 | // MOVEL |
8626 | OPCODE(0x2ED0) |
8627 | { |
8628 | u32 adr, res; |
8629 | u32 src, dst; |
8630 | |
8631 | adr = AREG((Opcode >> 0) & 7); |
8632 | PRE_IO |
8633 | READ_LONG_F(adr, res) |
8634 | flag_C = 0; |
8635 | flag_V = 0; |
8636 | flag_NotZ = res; |
8637 | flag_N = res >> 24; |
8638 | adr = AREG(7); |
8639 | AREG(7) += 4; |
8640 | WRITE_LONG_F(adr, res) |
8641 | POST_IO |
8642 | RET(20) |
8643 | } |
8644 | |
8645 | // MOVEL |
8646 | OPCODE(0x2F10) |
8647 | { |
8648 | u32 adr, res; |
8649 | u32 src, dst; |
8650 | |
8651 | adr = AREG((Opcode >> 0) & 7); |
8652 | PRE_IO |
8653 | READ_LONG_F(adr, res) |
8654 | flag_C = 0; |
8655 | flag_V = 0; |
8656 | flag_NotZ = res; |
8657 | flag_N = res >> 24; |
8658 | adr = AREG(7) - 4; |
8659 | AREG(7) = adr; |
8660 | WRITE_LONG_F(adr, res) |
8661 | POST_IO |
8662 | RET(20) |
8663 | } |
8664 | |
8665 | // MOVEL |
8666 | OPCODE(0x2018) |
8667 | { |
8668 | u32 adr, res; |
8669 | u32 src, dst; |
8670 | |
8671 | adr = AREG((Opcode >> 0) & 7); |
8672 | AREG((Opcode >> 0) & 7) += 4; |
8673 | PRE_IO |
8674 | READ_LONG_F(adr, res) |
8675 | flag_C = 0; |
8676 | flag_V = 0; |
8677 | flag_NotZ = res; |
8678 | flag_N = res >> 24; |
8679 | DREGu32((Opcode >> 9) & 7) = res; |
8680 | POST_IO |
8681 | RET(12) |
8682 | } |
8683 | |
8684 | // MOVEL |
8685 | OPCODE(0x2098) |
8686 | { |
8687 | u32 adr, res; |
8688 | u32 src, dst; |
8689 | |
8690 | adr = AREG((Opcode >> 0) & 7); |
8691 | AREG((Opcode >> 0) & 7) += 4; |
8692 | PRE_IO |
8693 | READ_LONG_F(adr, res) |
8694 | flag_C = 0; |
8695 | flag_V = 0; |
8696 | flag_NotZ = res; |
8697 | flag_N = res >> 24; |
8698 | adr = AREG((Opcode >> 9) & 7); |
8699 | WRITE_LONG_F(adr, res) |
8700 | POST_IO |
8701 | RET(20) |
8702 | } |
8703 | |
8704 | // MOVEL |
8705 | OPCODE(0x20D8) |
8706 | { |
8707 | u32 adr, res; |
8708 | u32 src, dst; |
8709 | |
8710 | adr = AREG((Opcode >> 0) & 7); |
8711 | AREG((Opcode >> 0) & 7) += 4; |
8712 | PRE_IO |
8713 | READ_LONG_F(adr, res) |
8714 | flag_C = 0; |
8715 | flag_V = 0; |
8716 | flag_NotZ = res; |
8717 | flag_N = res >> 24; |
8718 | adr = AREG((Opcode >> 9) & 7); |
8719 | AREG((Opcode >> 9) & 7) += 4; |
8720 | WRITE_LONG_F(adr, res) |
8721 | POST_IO |
8722 | RET(20) |
8723 | } |
8724 | |
8725 | // MOVEL |
8726 | OPCODE(0x2118) |
8727 | { |
8728 | u32 adr, res; |
8729 | u32 src, dst; |
8730 | |
8731 | adr = AREG((Opcode >> 0) & 7); |
8732 | AREG((Opcode >> 0) & 7) += 4; |
8733 | PRE_IO |
8734 | READ_LONG_F(adr, res) |
8735 | flag_C = 0; |
8736 | flag_V = 0; |
8737 | flag_NotZ = res; |
8738 | flag_N = res >> 24; |
8739 | adr = AREG((Opcode >> 9) & 7) - 4; |
8740 | AREG((Opcode >> 9) & 7) = adr; |
8741 | WRITE_LONG_F(adr, res) |
8742 | POST_IO |
8743 | RET(20) |
8744 | } |
8745 | |
8746 | // MOVEL |
8747 | OPCODE(0x2158) |
8748 | { |
8749 | u32 adr, res; |
8750 | u32 src, dst; |
8751 | |
8752 | adr = AREG((Opcode >> 0) & 7); |
8753 | AREG((Opcode >> 0) & 7) += 4; |
8754 | PRE_IO |
8755 | READ_LONG_F(adr, res) |
8756 | flag_C = 0; |
8757 | flag_V = 0; |
8758 | flag_NotZ = res; |
8759 | flag_N = res >> 24; |
8760 | FETCH_SWORD(adr); |
8761 | adr += AREG((Opcode >> 9) & 7); |
8762 | WRITE_LONG_F(adr, res) |
8763 | POST_IO |
8764 | RET(24) |
8765 | } |
8766 | |
8767 | // MOVEL |
8768 | OPCODE(0x2198) |
8769 | { |
8770 | u32 adr, res; |
8771 | u32 src, dst; |
8772 | |
8773 | adr = AREG((Opcode >> 0) & 7); |
8774 | AREG((Opcode >> 0) & 7) += 4; |
8775 | PRE_IO |
8776 | READ_LONG_F(adr, res) |
8777 | flag_C = 0; |
8778 | flag_V = 0; |
8779 | flag_NotZ = res; |
8780 | flag_N = res >> 24; |
8781 | adr = AREG((Opcode >> 9) & 7); |
8782 | DECODE_EXT_WORD |
8783 | WRITE_LONG_F(adr, res) |
8784 | POST_IO |
8785 | RET(26) |
8786 | } |
8787 | |
8788 | // MOVEL |
8789 | OPCODE(0x21D8) |
8790 | { |
8791 | u32 adr, res; |
8792 | u32 src, dst; |
8793 | |
8794 | adr = AREG((Opcode >> 0) & 7); |
8795 | AREG((Opcode >> 0) & 7) += 4; |
8796 | PRE_IO |
8797 | READ_LONG_F(adr, res) |
8798 | flag_C = 0; |
8799 | flag_V = 0; |
8800 | flag_NotZ = res; |
8801 | flag_N = res >> 24; |
8802 | FETCH_SWORD(adr); |
8803 | WRITE_LONG_F(adr, res) |
8804 | POST_IO |
8805 | RET(24) |
8806 | } |
8807 | |
8808 | // MOVEL |
8809 | OPCODE(0x23D8) |
8810 | { |
8811 | u32 adr, res; |
8812 | u32 src, dst; |
8813 | |
8814 | adr = AREG((Opcode >> 0) & 7); |
8815 | AREG((Opcode >> 0) & 7) += 4; |
8816 | PRE_IO |
8817 | READ_LONG_F(adr, res) |
8818 | flag_C = 0; |
8819 | flag_V = 0; |
8820 | flag_NotZ = res; |
8821 | flag_N = res >> 24; |
8822 | FETCH_LONG(adr); |
8823 | WRITE_LONG_F(adr, res) |
8824 | POST_IO |
8825 | RET(28) |
8826 | } |
8827 | |
8828 | // MOVEL |
8829 | OPCODE(0x2ED8) |
8830 | { |
8831 | u32 adr, res; |
8832 | u32 src, dst; |
8833 | |
8834 | adr = AREG((Opcode >> 0) & 7); |
8835 | AREG((Opcode >> 0) & 7) += 4; |
8836 | PRE_IO |
8837 | READ_LONG_F(adr, res) |
8838 | flag_C = 0; |
8839 | flag_V = 0; |
8840 | flag_NotZ = res; |
8841 | flag_N = res >> 24; |
8842 | adr = AREG(7); |
8843 | AREG(7) += 4; |
8844 | WRITE_LONG_F(adr, res) |
8845 | POST_IO |
8846 | RET(20) |
8847 | } |
8848 | |
8849 | // MOVEL |
8850 | OPCODE(0x2F18) |
8851 | { |
8852 | u32 adr, res; |
8853 | u32 src, dst; |
8854 | |
8855 | adr = AREG((Opcode >> 0) & 7); |
8856 | AREG((Opcode >> 0) & 7) += 4; |
8857 | PRE_IO |
8858 | READ_LONG_F(adr, res) |
8859 | flag_C = 0; |
8860 | flag_V = 0; |
8861 | flag_NotZ = res; |
8862 | flag_N = res >> 24; |
8863 | adr = AREG(7) - 4; |
8864 | AREG(7) = adr; |
8865 | WRITE_LONG_F(adr, res) |
8866 | POST_IO |
8867 | RET(20) |
8868 | } |
8869 | |
8870 | // MOVEL |
8871 | OPCODE(0x2020) |
8872 | { |
8873 | u32 adr, res; |
8874 | u32 src, dst; |
8875 | |
8876 | adr = AREG((Opcode >> 0) & 7) - 4; |
8877 | AREG((Opcode >> 0) & 7) = adr; |
8878 | PRE_IO |
8879 | READ_LONG_F(adr, res) |
8880 | flag_C = 0; |
8881 | flag_V = 0; |
8882 | flag_NotZ = res; |
8883 | flag_N = res >> 24; |
8884 | DREGu32((Opcode >> 9) & 7) = res; |
8885 | POST_IO |
8886 | RET(14) |
8887 | } |
8888 | |
8889 | // MOVEL |
8890 | OPCODE(0x20A0) |
8891 | { |
8892 | u32 adr, res; |
8893 | u32 src, dst; |
8894 | |
8895 | adr = AREG((Opcode >> 0) & 7) - 4; |
8896 | AREG((Opcode >> 0) & 7) = adr; |
8897 | PRE_IO |
8898 | READ_LONG_F(adr, res) |
8899 | flag_C = 0; |
8900 | flag_V = 0; |
8901 | flag_NotZ = res; |
8902 | flag_N = res >> 24; |
8903 | adr = AREG((Opcode >> 9) & 7); |
8904 | WRITE_LONG_F(adr, res) |
8905 | POST_IO |
8906 | RET(22) |
8907 | } |
8908 | |
8909 | // MOVEL |
8910 | OPCODE(0x20E0) |
8911 | { |
8912 | u32 adr, res; |
8913 | u32 src, dst; |
8914 | |
8915 | adr = AREG((Opcode >> 0) & 7) - 4; |
8916 | AREG((Opcode >> 0) & 7) = adr; |
8917 | PRE_IO |
8918 | READ_LONG_F(adr, res) |
8919 | flag_C = 0; |
8920 | flag_V = 0; |
8921 | flag_NotZ = res; |
8922 | flag_N = res >> 24; |
8923 | adr = AREG((Opcode >> 9) & 7); |
8924 | AREG((Opcode >> 9) & 7) += 4; |
8925 | WRITE_LONG_F(adr, res) |
8926 | POST_IO |
8927 | RET(22) |
8928 | } |
8929 | |
8930 | // MOVEL |
8931 | OPCODE(0x2120) |
8932 | { |
8933 | u32 adr, res; |
8934 | u32 src, dst; |
8935 | |
8936 | adr = AREG((Opcode >> 0) & 7) - 4; |
8937 | AREG((Opcode >> 0) & 7) = adr; |
8938 | PRE_IO |
8939 | READ_LONG_F(adr, res) |
8940 | flag_C = 0; |
8941 | flag_V = 0; |
8942 | flag_NotZ = res; |
8943 | flag_N = res >> 24; |
8944 | adr = AREG((Opcode >> 9) & 7) - 4; |
8945 | AREG((Opcode >> 9) & 7) = adr; |
8946 | WRITE_LONG_F(adr, res) |
8947 | POST_IO |
8948 | RET(22) |
8949 | } |
8950 | |
8951 | // MOVEL |
8952 | OPCODE(0x2160) |
8953 | { |
8954 | u32 adr, res; |
8955 | u32 src, dst; |
8956 | |
8957 | adr = AREG((Opcode >> 0) & 7) - 4; |
8958 | AREG((Opcode >> 0) & 7) = adr; |
8959 | PRE_IO |
8960 | READ_LONG_F(adr, res) |
8961 | flag_C = 0; |
8962 | flag_V = 0; |
8963 | flag_NotZ = res; |
8964 | flag_N = res >> 24; |
8965 | FETCH_SWORD(adr); |
8966 | adr += AREG((Opcode >> 9) & 7); |
8967 | WRITE_LONG_F(adr, res) |
8968 | POST_IO |
8969 | RET(26) |
8970 | } |
8971 | |
8972 | // MOVEL |
8973 | OPCODE(0x21A0) |
8974 | { |
8975 | u32 adr, res; |
8976 | u32 src, dst; |
8977 | |
8978 | adr = AREG((Opcode >> 0) & 7) - 4; |
8979 | AREG((Opcode >> 0) & 7) = adr; |
8980 | PRE_IO |
8981 | READ_LONG_F(adr, res) |
8982 | flag_C = 0; |
8983 | flag_V = 0; |
8984 | flag_NotZ = res; |
8985 | flag_N = res >> 24; |
8986 | adr = AREG((Opcode >> 9) & 7); |
8987 | DECODE_EXT_WORD |
8988 | WRITE_LONG_F(adr, res) |
8989 | POST_IO |
8990 | RET(28) |
8991 | } |
8992 | |
8993 | // MOVEL |
8994 | OPCODE(0x21E0) |
8995 | { |
8996 | u32 adr, res; |
8997 | u32 src, dst; |
8998 | |
8999 | adr = AREG((Opcode >> 0) & 7) - 4; |
9000 | AREG((Opcode >> 0) & 7) = adr; |
9001 | PRE_IO |
9002 | READ_LONG_F(adr, res) |
9003 | flag_C = 0; |
9004 | flag_V = 0; |
9005 | flag_NotZ = res; |
9006 | flag_N = res >> 24; |
9007 | FETCH_SWORD(adr); |
9008 | WRITE_LONG_F(adr, res) |
9009 | POST_IO |
9010 | RET(26) |
9011 | } |
9012 | |
9013 | // MOVEL |
9014 | OPCODE(0x23E0) |
9015 | { |
9016 | u32 adr, res; |
9017 | u32 src, dst; |
9018 | |
9019 | adr = AREG((Opcode >> 0) & 7) - 4; |
9020 | AREG((Opcode >> 0) & 7) = adr; |
9021 | PRE_IO |
9022 | READ_LONG_F(adr, res) |
9023 | flag_C = 0; |
9024 | flag_V = 0; |
9025 | flag_NotZ = res; |
9026 | flag_N = res >> 24; |
9027 | FETCH_LONG(adr); |
9028 | WRITE_LONG_F(adr, res) |
9029 | POST_IO |
9030 | RET(30) |
9031 | } |
9032 | |
9033 | // MOVEL |
9034 | OPCODE(0x2EE0) |
9035 | { |
9036 | u32 adr, res; |
9037 | u32 src, dst; |
9038 | |
9039 | adr = AREG((Opcode >> 0) & 7) - 4; |
9040 | AREG((Opcode >> 0) & 7) = adr; |
9041 | PRE_IO |
9042 | READ_LONG_F(adr, res) |
9043 | flag_C = 0; |
9044 | flag_V = 0; |
9045 | flag_NotZ = res; |
9046 | flag_N = res >> 24; |
9047 | adr = AREG(7); |
9048 | AREG(7) += 4; |
9049 | WRITE_LONG_F(adr, res) |
9050 | POST_IO |
9051 | RET(22) |
9052 | } |
9053 | |
9054 | // MOVEL |
9055 | OPCODE(0x2F20) |
9056 | { |
9057 | u32 adr, res; |
9058 | u32 src, dst; |
9059 | |
9060 | adr = AREG((Opcode >> 0) & 7) - 4; |
9061 | AREG((Opcode >> 0) & 7) = adr; |
9062 | PRE_IO |
9063 | READ_LONG_F(adr, res) |
9064 | flag_C = 0; |
9065 | flag_V = 0; |
9066 | flag_NotZ = res; |
9067 | flag_N = res >> 24; |
9068 | adr = AREG(7) - 4; |
9069 | AREG(7) = adr; |
9070 | WRITE_LONG_F(adr, res) |
9071 | POST_IO |
9072 | RET(22) |
9073 | } |
9074 | |
9075 | // MOVEL |
9076 | OPCODE(0x2028) |
9077 | { |
9078 | u32 adr, res; |
9079 | u32 src, dst; |
9080 | |
9081 | FETCH_SWORD(adr); |
9082 | adr += AREG((Opcode >> 0) & 7); |
9083 | PRE_IO |
9084 | READ_LONG_F(adr, res) |
9085 | flag_C = 0; |
9086 | flag_V = 0; |
9087 | flag_NotZ = res; |
9088 | flag_N = res >> 24; |
9089 | DREGu32((Opcode >> 9) & 7) = res; |
9090 | POST_IO |
9091 | RET(16) |
9092 | } |
9093 | |
9094 | // MOVEL |
9095 | OPCODE(0x20A8) |
9096 | { |
9097 | u32 adr, res; |
9098 | u32 src, dst; |
9099 | |
9100 | FETCH_SWORD(adr); |
9101 | adr += AREG((Opcode >> 0) & 7); |
9102 | PRE_IO |
9103 | READ_LONG_F(adr, res) |
9104 | flag_C = 0; |
9105 | flag_V = 0; |
9106 | flag_NotZ = res; |
9107 | flag_N = res >> 24; |
9108 | adr = AREG((Opcode >> 9) & 7); |
9109 | WRITE_LONG_F(adr, res) |
9110 | POST_IO |
9111 | RET(24) |
9112 | } |
9113 | |
9114 | // MOVEL |
9115 | OPCODE(0x20E8) |
9116 | { |
9117 | u32 adr, res; |
9118 | u32 src, dst; |
9119 | |
9120 | FETCH_SWORD(adr); |
9121 | adr += AREG((Opcode >> 0) & 7); |
9122 | PRE_IO |
9123 | READ_LONG_F(adr, res) |
9124 | flag_C = 0; |
9125 | flag_V = 0; |
9126 | flag_NotZ = res; |
9127 | flag_N = res >> 24; |
9128 | adr = AREG((Opcode >> 9) & 7); |
9129 | AREG((Opcode >> 9) & 7) += 4; |
9130 | WRITE_LONG_F(adr, res) |
9131 | POST_IO |
9132 | RET(24) |
9133 | } |
9134 | |
9135 | // MOVEL |
9136 | OPCODE(0x2128) |
9137 | { |
9138 | u32 adr, res; |
9139 | u32 src, dst; |
9140 | |
9141 | FETCH_SWORD(adr); |
9142 | adr += AREG((Opcode >> 0) & 7); |
9143 | PRE_IO |
9144 | READ_LONG_F(adr, res) |
9145 | flag_C = 0; |
9146 | flag_V = 0; |
9147 | flag_NotZ = res; |
9148 | flag_N = res >> 24; |
9149 | adr = AREG((Opcode >> 9) & 7) - 4; |
9150 | AREG((Opcode >> 9) & 7) = adr; |
9151 | WRITE_LONG_F(adr, res) |
9152 | POST_IO |
9153 | RET(24) |
9154 | } |
9155 | |
9156 | // MOVEL |
9157 | OPCODE(0x2168) |
9158 | { |
9159 | u32 adr, res; |
9160 | u32 src, dst; |
9161 | |
9162 | FETCH_SWORD(adr); |
9163 | adr += AREG((Opcode >> 0) & 7); |
9164 | PRE_IO |
9165 | READ_LONG_F(adr, res) |
9166 | flag_C = 0; |
9167 | flag_V = 0; |
9168 | flag_NotZ = res; |
9169 | flag_N = res >> 24; |
9170 | FETCH_SWORD(adr); |
9171 | adr += AREG((Opcode >> 9) & 7); |
9172 | WRITE_LONG_F(adr, res) |
9173 | POST_IO |
9174 | RET(28) |
9175 | } |
9176 | |
9177 | // MOVEL |
9178 | OPCODE(0x21A8) |
9179 | { |
9180 | u32 adr, res; |
9181 | u32 src, dst; |
9182 | |
9183 | FETCH_SWORD(adr); |
9184 | adr += AREG((Opcode >> 0) & 7); |
9185 | PRE_IO |
9186 | READ_LONG_F(adr, res) |
9187 | flag_C = 0; |
9188 | flag_V = 0; |
9189 | flag_NotZ = res; |
9190 | flag_N = res >> 24; |
9191 | adr = AREG((Opcode >> 9) & 7); |
9192 | DECODE_EXT_WORD |
9193 | WRITE_LONG_F(adr, res) |
9194 | POST_IO |
9195 | RET(30) |
9196 | } |
9197 | |
9198 | // MOVEL |
9199 | OPCODE(0x21E8) |
9200 | { |
9201 | u32 adr, res; |
9202 | u32 src, dst; |
9203 | |
9204 | FETCH_SWORD(adr); |
9205 | adr += AREG((Opcode >> 0) & 7); |
9206 | PRE_IO |
9207 | READ_LONG_F(adr, res) |
9208 | flag_C = 0; |
9209 | flag_V = 0; |
9210 | flag_NotZ = res; |
9211 | flag_N = res >> 24; |
9212 | FETCH_SWORD(adr); |
9213 | WRITE_LONG_F(adr, res) |
9214 | POST_IO |
9215 | RET(28) |
9216 | } |
9217 | |
9218 | // MOVEL |
9219 | OPCODE(0x23E8) |
9220 | { |
9221 | u32 adr, res; |
9222 | u32 src, dst; |
9223 | |
9224 | FETCH_SWORD(adr); |
9225 | adr += AREG((Opcode >> 0) & 7); |
9226 | PRE_IO |
9227 | READ_LONG_F(adr, res) |
9228 | flag_C = 0; |
9229 | flag_V = 0; |
9230 | flag_NotZ = res; |
9231 | flag_N = res >> 24; |
9232 | FETCH_LONG(adr); |
9233 | WRITE_LONG_F(adr, res) |
9234 | POST_IO |
9235 | RET(32) |
9236 | } |
9237 | |
9238 | // MOVEL |
9239 | OPCODE(0x2EE8) |
9240 | { |
9241 | u32 adr, res; |
9242 | u32 src, dst; |
9243 | |
9244 | FETCH_SWORD(adr); |
9245 | adr += AREG((Opcode >> 0) & 7); |
9246 | PRE_IO |
9247 | READ_LONG_F(adr, res) |
9248 | flag_C = 0; |
9249 | flag_V = 0; |
9250 | flag_NotZ = res; |
9251 | flag_N = res >> 24; |
9252 | adr = AREG(7); |
9253 | AREG(7) += 4; |
9254 | WRITE_LONG_F(adr, res) |
9255 | POST_IO |
9256 | RET(24) |
9257 | } |
9258 | |
9259 | // MOVEL |
9260 | OPCODE(0x2F28) |
9261 | { |
9262 | u32 adr, res; |
9263 | u32 src, dst; |
9264 | |
9265 | FETCH_SWORD(adr); |
9266 | adr += AREG((Opcode >> 0) & 7); |
9267 | PRE_IO |
9268 | READ_LONG_F(adr, res) |
9269 | flag_C = 0; |
9270 | flag_V = 0; |
9271 | flag_NotZ = res; |
9272 | flag_N = res >> 24; |
9273 | adr = AREG(7) - 4; |
9274 | AREG(7) = adr; |
9275 | WRITE_LONG_F(adr, res) |
9276 | POST_IO |
9277 | RET(24) |
9278 | } |
9279 | |
9280 | // MOVEL |
9281 | OPCODE(0x2030) |
9282 | { |
9283 | u32 adr, res; |
9284 | u32 src, dst; |
9285 | |
9286 | adr = AREG((Opcode >> 0) & 7); |
9287 | DECODE_EXT_WORD |
9288 | PRE_IO |
9289 | READ_LONG_F(adr, res) |
9290 | flag_C = 0; |
9291 | flag_V = 0; |
9292 | flag_NotZ = res; |
9293 | flag_N = res >> 24; |
9294 | DREGu32((Opcode >> 9) & 7) = res; |
9295 | POST_IO |
9296 | RET(18) |
9297 | } |
9298 | |
9299 | // MOVEL |
9300 | OPCODE(0x20B0) |
9301 | { |
9302 | u32 adr, res; |
9303 | u32 src, dst; |
9304 | |
9305 | adr = AREG((Opcode >> 0) & 7); |
9306 | DECODE_EXT_WORD |
9307 | PRE_IO |
9308 | READ_LONG_F(adr, res) |
9309 | flag_C = 0; |
9310 | flag_V = 0; |
9311 | flag_NotZ = res; |
9312 | flag_N = res >> 24; |
9313 | adr = AREG((Opcode >> 9) & 7); |
9314 | WRITE_LONG_F(adr, res) |
9315 | POST_IO |
9316 | RET(26) |
9317 | } |
9318 | |
9319 | // MOVEL |
9320 | OPCODE(0x20F0) |
9321 | { |
9322 | u32 adr, res; |
9323 | u32 src, dst; |
9324 | |
9325 | adr = AREG((Opcode >> 0) & 7); |
9326 | DECODE_EXT_WORD |
9327 | PRE_IO |
9328 | READ_LONG_F(adr, res) |
9329 | flag_C = 0; |
9330 | flag_V = 0; |
9331 | flag_NotZ = res; |
9332 | flag_N = res >> 24; |
9333 | adr = AREG((Opcode >> 9) & 7); |
9334 | AREG((Opcode >> 9) & 7) += 4; |
9335 | WRITE_LONG_F(adr, res) |
9336 | POST_IO |
9337 | RET(26) |
9338 | } |
9339 | |
9340 | // MOVEL |
9341 | OPCODE(0x2130) |
9342 | { |
9343 | u32 adr, res; |
9344 | u32 src, dst; |
9345 | |
9346 | adr = AREG((Opcode >> 0) & 7); |
9347 | DECODE_EXT_WORD |
9348 | PRE_IO |
9349 | READ_LONG_F(adr, res) |
9350 | flag_C = 0; |
9351 | flag_V = 0; |
9352 | flag_NotZ = res; |
9353 | flag_N = res >> 24; |
9354 | adr = AREG((Opcode >> 9) & 7) - 4; |
9355 | AREG((Opcode >> 9) & 7) = adr; |
9356 | WRITE_LONG_F(adr, res) |
9357 | POST_IO |
9358 | RET(26) |
9359 | } |
9360 | |
9361 | // MOVEL |
9362 | OPCODE(0x2170) |
9363 | { |
9364 | u32 adr, res; |
9365 | u32 src, dst; |
9366 | |
9367 | adr = AREG((Opcode >> 0) & 7); |
9368 | DECODE_EXT_WORD |
9369 | PRE_IO |
9370 | READ_LONG_F(adr, res) |
9371 | flag_C = 0; |
9372 | flag_V = 0; |
9373 | flag_NotZ = res; |
9374 | flag_N = res >> 24; |
9375 | FETCH_SWORD(adr); |
9376 | adr += AREG((Opcode >> 9) & 7); |
9377 | WRITE_LONG_F(adr, res) |
9378 | POST_IO |
9379 | RET(30) |
9380 | } |
9381 | |
9382 | // MOVEL |
9383 | OPCODE(0x21B0) |
9384 | { |
9385 | u32 adr, res; |
9386 | u32 src, dst; |
9387 | |
9388 | adr = AREG((Opcode >> 0) & 7); |
9389 | DECODE_EXT_WORD |
9390 | PRE_IO |
9391 | READ_LONG_F(adr, res) |
9392 | flag_C = 0; |
9393 | flag_V = 0; |
9394 | flag_NotZ = res; |
9395 | flag_N = res >> 24; |
9396 | adr = AREG((Opcode >> 9) & 7); |
9397 | DECODE_EXT_WORD |
9398 | WRITE_LONG_F(adr, res) |
9399 | POST_IO |
9400 | RET(32) |
9401 | } |
9402 | |
9403 | // MOVEL |
9404 | OPCODE(0x21F0) |
9405 | { |
9406 | u32 adr, res; |
9407 | u32 src, dst; |
9408 | |
9409 | adr = AREG((Opcode >> 0) & 7); |
9410 | DECODE_EXT_WORD |
9411 | PRE_IO |
9412 | READ_LONG_F(adr, res) |
9413 | flag_C = 0; |
9414 | flag_V = 0; |
9415 | flag_NotZ = res; |
9416 | flag_N = res >> 24; |
9417 | FETCH_SWORD(adr); |
9418 | WRITE_LONG_F(adr, res) |
9419 | POST_IO |
9420 | RET(30) |
9421 | } |
9422 | |
9423 | // MOVEL |
9424 | OPCODE(0x23F0) |
9425 | { |
9426 | u32 adr, res; |
9427 | u32 src, dst; |
9428 | |
9429 | adr = AREG((Opcode >> 0) & 7); |
9430 | DECODE_EXT_WORD |
9431 | PRE_IO |
9432 | READ_LONG_F(adr, res) |
9433 | flag_C = 0; |
9434 | flag_V = 0; |
9435 | flag_NotZ = res; |
9436 | flag_N = res >> 24; |
9437 | FETCH_LONG(adr); |
9438 | WRITE_LONG_F(adr, res) |
9439 | POST_IO |
9440 | RET(34) |
9441 | } |
9442 | |
9443 | // MOVEL |
9444 | OPCODE(0x2EF0) |
9445 | { |
9446 | u32 adr, res; |
9447 | u32 src, dst; |
9448 | |
9449 | adr = AREG((Opcode >> 0) & 7); |
9450 | DECODE_EXT_WORD |
9451 | PRE_IO |
9452 | READ_LONG_F(adr, res) |
9453 | flag_C = 0; |
9454 | flag_V = 0; |
9455 | flag_NotZ = res; |
9456 | flag_N = res >> 24; |
9457 | adr = AREG(7); |
9458 | AREG(7) += 4; |
9459 | WRITE_LONG_F(adr, res) |
9460 | POST_IO |
9461 | RET(26) |
9462 | } |
9463 | |
9464 | // MOVEL |
9465 | OPCODE(0x2F30) |
9466 | { |
9467 | u32 adr, res; |
9468 | u32 src, dst; |
9469 | |
9470 | adr = AREG((Opcode >> 0) & 7); |
9471 | DECODE_EXT_WORD |
9472 | PRE_IO |
9473 | READ_LONG_F(adr, res) |
9474 | flag_C = 0; |
9475 | flag_V = 0; |
9476 | flag_NotZ = res; |
9477 | flag_N = res >> 24; |
9478 | adr = AREG(7) - 4; |
9479 | AREG(7) = adr; |
9480 | WRITE_LONG_F(adr, res) |
9481 | POST_IO |
9482 | RET(26) |
9483 | } |
9484 | |
9485 | // MOVEL |
9486 | OPCODE(0x2038) |
9487 | { |
9488 | u32 adr, res; |
9489 | u32 src, dst; |
9490 | |
9491 | FETCH_SWORD(adr); |
9492 | PRE_IO |
9493 | READ_LONG_F(adr, res) |
9494 | flag_C = 0; |
9495 | flag_V = 0; |
9496 | flag_NotZ = res; |
9497 | flag_N = res >> 24; |
9498 | DREGu32((Opcode >> 9) & 7) = res; |
9499 | POST_IO |
9500 | RET(16) |
9501 | } |
9502 | |
9503 | // MOVEL |
9504 | OPCODE(0x20B8) |
9505 | { |
9506 | u32 adr, res; |
9507 | u32 src, dst; |
9508 | |
9509 | FETCH_SWORD(adr); |
9510 | PRE_IO |
9511 | READ_LONG_F(adr, res) |
9512 | flag_C = 0; |
9513 | flag_V = 0; |
9514 | flag_NotZ = res; |
9515 | flag_N = res >> 24; |
9516 | adr = AREG((Opcode >> 9) & 7); |
9517 | WRITE_LONG_F(adr, res) |
9518 | POST_IO |
9519 | RET(24) |
9520 | } |
9521 | |
9522 | // MOVEL |
9523 | OPCODE(0x20F8) |
9524 | { |
9525 | u32 adr, res; |
9526 | u32 src, dst; |
9527 | |
9528 | FETCH_SWORD(adr); |
9529 | PRE_IO |
9530 | READ_LONG_F(adr, res) |
9531 | flag_C = 0; |
9532 | flag_V = 0; |
9533 | flag_NotZ = res; |
9534 | flag_N = res >> 24; |
9535 | adr = AREG((Opcode >> 9) & 7); |
9536 | AREG((Opcode >> 9) & 7) += 4; |
9537 | WRITE_LONG_F(adr, res) |
9538 | POST_IO |
9539 | RET(24) |
9540 | } |
9541 | |
9542 | // MOVEL |
9543 | OPCODE(0x2138) |
9544 | { |
9545 | u32 adr, res; |
9546 | u32 src, dst; |
9547 | |
9548 | FETCH_SWORD(adr); |
9549 | PRE_IO |
9550 | READ_LONG_F(adr, res) |
9551 | flag_C = 0; |
9552 | flag_V = 0; |
9553 | flag_NotZ = res; |
9554 | flag_N = res >> 24; |
9555 | adr = AREG((Opcode >> 9) & 7) - 4; |
9556 | AREG((Opcode >> 9) & 7) = adr; |
9557 | WRITE_LONG_F(adr, res) |
9558 | POST_IO |
9559 | RET(24) |
9560 | } |
9561 | |
9562 | // MOVEL |
9563 | OPCODE(0x2178) |
9564 | { |
9565 | u32 adr, res; |
9566 | u32 src, dst; |
9567 | |
9568 | FETCH_SWORD(adr); |
9569 | PRE_IO |
9570 | READ_LONG_F(adr, res) |
9571 | flag_C = 0; |
9572 | flag_V = 0; |
9573 | flag_NotZ = res; |
9574 | flag_N = res >> 24; |
9575 | FETCH_SWORD(adr); |
9576 | adr += AREG((Opcode >> 9) & 7); |
9577 | WRITE_LONG_F(adr, res) |
9578 | POST_IO |
9579 | RET(28) |
9580 | } |
9581 | |
9582 | // MOVEL |
9583 | OPCODE(0x21B8) |
9584 | { |
9585 | u32 adr, res; |
9586 | u32 src, dst; |
9587 | |
9588 | FETCH_SWORD(adr); |
9589 | PRE_IO |
9590 | READ_LONG_F(adr, res) |
9591 | flag_C = 0; |
9592 | flag_V = 0; |
9593 | flag_NotZ = res; |
9594 | flag_N = res >> 24; |
9595 | adr = AREG((Opcode >> 9) & 7); |
9596 | DECODE_EXT_WORD |
9597 | WRITE_LONG_F(adr, res) |
9598 | POST_IO |
9599 | RET(30) |
9600 | } |
9601 | |
9602 | // MOVEL |
9603 | OPCODE(0x21F8) |
9604 | { |
9605 | u32 adr, res; |
9606 | u32 src, dst; |
9607 | |
9608 | FETCH_SWORD(adr); |
9609 | PRE_IO |
9610 | READ_LONG_F(adr, res) |
9611 | flag_C = 0; |
9612 | flag_V = 0; |
9613 | flag_NotZ = res; |
9614 | flag_N = res >> 24; |
9615 | FETCH_SWORD(adr); |
9616 | WRITE_LONG_F(adr, res) |
9617 | POST_IO |
9618 | RET(28) |
9619 | } |
9620 | |
9621 | // MOVEL |
9622 | OPCODE(0x23F8) |
9623 | { |
9624 | u32 adr, res; |
9625 | u32 src, dst; |
9626 | |
9627 | FETCH_SWORD(adr); |
9628 | PRE_IO |
9629 | READ_LONG_F(adr, res) |
9630 | flag_C = 0; |
9631 | flag_V = 0; |
9632 | flag_NotZ = res; |
9633 | flag_N = res >> 24; |
9634 | FETCH_LONG(adr); |
9635 | WRITE_LONG_F(adr, res) |
9636 | POST_IO |
9637 | RET(32) |
9638 | } |
9639 | |
9640 | // MOVEL |
9641 | OPCODE(0x2EF8) |
9642 | { |
9643 | u32 adr, res; |
9644 | u32 src, dst; |
9645 | |
9646 | FETCH_SWORD(adr); |
9647 | PRE_IO |
9648 | READ_LONG_F(adr, res) |
9649 | flag_C = 0; |
9650 | flag_V = 0; |
9651 | flag_NotZ = res; |
9652 | flag_N = res >> 24; |
9653 | adr = AREG(7); |
9654 | AREG(7) += 4; |
9655 | WRITE_LONG_F(adr, res) |
9656 | POST_IO |
9657 | RET(24) |
9658 | } |
9659 | |
9660 | // MOVEL |
9661 | OPCODE(0x2F38) |
9662 | { |
9663 | u32 adr, res; |
9664 | u32 src, dst; |
9665 | |
9666 | FETCH_SWORD(adr); |
9667 | PRE_IO |
9668 | READ_LONG_F(adr, res) |
9669 | flag_C = 0; |
9670 | flag_V = 0; |
9671 | flag_NotZ = res; |
9672 | flag_N = res >> 24; |
9673 | adr = AREG(7) - 4; |
9674 | AREG(7) = adr; |
9675 | WRITE_LONG_F(adr, res) |
9676 | POST_IO |
9677 | RET(24) |
9678 | } |
9679 | |
9680 | // MOVEL |
9681 | OPCODE(0x2039) |
9682 | { |
9683 | u32 adr, res; |
9684 | u32 src, dst; |
9685 | |
9686 | FETCH_LONG(adr); |
9687 | PRE_IO |
9688 | READ_LONG_F(adr, res) |
9689 | flag_C = 0; |
9690 | flag_V = 0; |
9691 | flag_NotZ = res; |
9692 | flag_N = res >> 24; |
9693 | DREGu32((Opcode >> 9) & 7) = res; |
9694 | POST_IO |
9695 | RET(20) |
9696 | } |
9697 | |
9698 | // MOVEL |
9699 | OPCODE(0x20B9) |
9700 | { |
9701 | u32 adr, res; |
9702 | u32 src, dst; |
9703 | |
9704 | FETCH_LONG(adr); |
9705 | PRE_IO |
9706 | READ_LONG_F(adr, res) |
9707 | flag_C = 0; |
9708 | flag_V = 0; |
9709 | flag_NotZ = res; |
9710 | flag_N = res >> 24; |
9711 | adr = AREG((Opcode >> 9) & 7); |
9712 | WRITE_LONG_F(adr, res) |
9713 | POST_IO |
9714 | RET(28) |
9715 | } |
9716 | |
9717 | // MOVEL |
9718 | OPCODE(0x20F9) |
9719 | { |
9720 | u32 adr, res; |
9721 | u32 src, dst; |
9722 | |
9723 | FETCH_LONG(adr); |
9724 | PRE_IO |
9725 | READ_LONG_F(adr, res) |
9726 | flag_C = 0; |
9727 | flag_V = 0; |
9728 | flag_NotZ = res; |
9729 | flag_N = res >> 24; |
9730 | adr = AREG((Opcode >> 9) & 7); |
9731 | AREG((Opcode >> 9) & 7) += 4; |
9732 | WRITE_LONG_F(adr, res) |
9733 | POST_IO |
9734 | RET(28) |
9735 | } |
9736 | |
9737 | // MOVEL |
9738 | OPCODE(0x2139) |
9739 | { |
9740 | u32 adr, res; |
9741 | u32 src, dst; |
9742 | |
9743 | FETCH_LONG(adr); |
9744 | PRE_IO |
9745 | READ_LONG_F(adr, res) |
9746 | flag_C = 0; |
9747 | flag_V = 0; |
9748 | flag_NotZ = res; |
9749 | flag_N = res >> 24; |
9750 | adr = AREG((Opcode >> 9) & 7) - 4; |
9751 | AREG((Opcode >> 9) & 7) = adr; |
9752 | WRITE_LONG_F(adr, res) |
9753 | POST_IO |
9754 | RET(28) |
9755 | } |
9756 | |
9757 | // MOVEL |
9758 | OPCODE(0x2179) |
9759 | { |
9760 | u32 adr, res; |
9761 | u32 src, dst; |
9762 | |
9763 | FETCH_LONG(adr); |
9764 | PRE_IO |
9765 | READ_LONG_F(adr, res) |
9766 | flag_C = 0; |
9767 | flag_V = 0; |
9768 | flag_NotZ = res; |
9769 | flag_N = res >> 24; |
9770 | FETCH_SWORD(adr); |
9771 | adr += AREG((Opcode >> 9) & 7); |
9772 | WRITE_LONG_F(adr, res) |
9773 | POST_IO |
9774 | RET(32) |
9775 | } |
9776 | |
9777 | // MOVEL |
9778 | OPCODE(0x21B9) |
9779 | { |
9780 | u32 adr, res; |
9781 | u32 src, dst; |
9782 | |
9783 | FETCH_LONG(adr); |
9784 | PRE_IO |
9785 | READ_LONG_F(adr, res) |
9786 | flag_C = 0; |
9787 | flag_V = 0; |
9788 | flag_NotZ = res; |
9789 | flag_N = res >> 24; |
9790 | adr = AREG((Opcode >> 9) & 7); |
9791 | DECODE_EXT_WORD |
9792 | WRITE_LONG_F(adr, res) |
9793 | POST_IO |
9794 | RET(34) |
9795 | } |
9796 | |
9797 | // MOVEL |
9798 | OPCODE(0x21F9) |
9799 | { |
9800 | u32 adr, res; |
9801 | u32 src, dst; |
9802 | |
9803 | FETCH_LONG(adr); |
9804 | PRE_IO |
9805 | READ_LONG_F(adr, res) |
9806 | flag_C = 0; |
9807 | flag_V = 0; |
9808 | flag_NotZ = res; |
9809 | flag_N = res >> 24; |
9810 | FETCH_SWORD(adr); |
9811 | WRITE_LONG_F(adr, res) |
9812 | POST_IO |
9813 | RET(32) |
9814 | } |
9815 | |
9816 | // MOVEL |
9817 | OPCODE(0x23F9) |
9818 | { |
9819 | u32 adr, res; |
9820 | u32 src, dst; |
9821 | |
9822 | FETCH_LONG(adr); |
9823 | PRE_IO |
9824 | READ_LONG_F(adr, res) |
9825 | flag_C = 0; |
9826 | flag_V = 0; |
9827 | flag_NotZ = res; |
9828 | flag_N = res >> 24; |
9829 | FETCH_LONG(adr); |
9830 | WRITE_LONG_F(adr, res) |
9831 | POST_IO |
9832 | RET(36) |
9833 | } |
9834 | |
9835 | // MOVEL |
9836 | OPCODE(0x2EF9) |
9837 | { |
9838 | u32 adr, res; |
9839 | u32 src, dst; |
9840 | |
9841 | FETCH_LONG(adr); |
9842 | PRE_IO |
9843 | READ_LONG_F(adr, res) |
9844 | flag_C = 0; |
9845 | flag_V = 0; |
9846 | flag_NotZ = res; |
9847 | flag_N = res >> 24; |
9848 | adr = AREG(7); |
9849 | AREG(7) += 4; |
9850 | WRITE_LONG_F(adr, res) |
9851 | POST_IO |
9852 | RET(28) |
9853 | } |
9854 | |
9855 | // MOVEL |
9856 | OPCODE(0x2F39) |
9857 | { |
9858 | u32 adr, res; |
9859 | u32 src, dst; |
9860 | |
9861 | FETCH_LONG(adr); |
9862 | PRE_IO |
9863 | READ_LONG_F(adr, res) |
9864 | flag_C = 0; |
9865 | flag_V = 0; |
9866 | flag_NotZ = res; |
9867 | flag_N = res >> 24; |
9868 | adr = AREG(7) - 4; |
9869 | AREG(7) = adr; |
9870 | WRITE_LONG_F(adr, res) |
9871 | POST_IO |
9872 | RET(28) |
9873 | } |
9874 | |
9875 | // MOVEL |
9876 | OPCODE(0x203A) |
9877 | { |
9878 | u32 adr, res; |
9879 | u32 src, dst; |
9880 | |
9881 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9882 | PC++; |
9883 | PRE_IO |
9884 | READ_LONG_F(adr, res) |
9885 | flag_C = 0; |
9886 | flag_V = 0; |
9887 | flag_NotZ = res; |
9888 | flag_N = res >> 24; |
9889 | DREGu32((Opcode >> 9) & 7) = res; |
9890 | POST_IO |
9891 | RET(16) |
9892 | } |
9893 | |
9894 | // MOVEL |
9895 | OPCODE(0x20BA) |
9896 | { |
9897 | u32 adr, res; |
9898 | u32 src, dst; |
9899 | |
9900 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9901 | PC++; |
9902 | PRE_IO |
9903 | READ_LONG_F(adr, res) |
9904 | flag_C = 0; |
9905 | flag_V = 0; |
9906 | flag_NotZ = res; |
9907 | flag_N = res >> 24; |
9908 | adr = AREG((Opcode >> 9) & 7); |
9909 | WRITE_LONG_F(adr, res) |
9910 | POST_IO |
9911 | RET(24) |
9912 | } |
9913 | |
9914 | // MOVEL |
9915 | OPCODE(0x20FA) |
9916 | { |
9917 | u32 adr, res; |
9918 | u32 src, dst; |
9919 | |
9920 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9921 | PC++; |
9922 | PRE_IO |
9923 | READ_LONG_F(adr, res) |
9924 | flag_C = 0; |
9925 | flag_V = 0; |
9926 | flag_NotZ = res; |
9927 | flag_N = res >> 24; |
9928 | adr = AREG((Opcode >> 9) & 7); |
9929 | AREG((Opcode >> 9) & 7) += 4; |
9930 | WRITE_LONG_F(adr, res) |
9931 | POST_IO |
9932 | RET(24) |
9933 | } |
9934 | |
9935 | // MOVEL |
9936 | OPCODE(0x213A) |
9937 | { |
9938 | u32 adr, res; |
9939 | u32 src, dst; |
9940 | |
9941 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9942 | PC++; |
9943 | PRE_IO |
9944 | READ_LONG_F(adr, res) |
9945 | flag_C = 0; |
9946 | flag_V = 0; |
9947 | flag_NotZ = res; |
9948 | flag_N = res >> 24; |
9949 | adr = AREG((Opcode >> 9) & 7) - 4; |
9950 | AREG((Opcode >> 9) & 7) = adr; |
9951 | WRITE_LONG_F(adr, res) |
9952 | POST_IO |
9953 | RET(24) |
9954 | } |
9955 | |
9956 | // MOVEL |
9957 | OPCODE(0x217A) |
9958 | { |
9959 | u32 adr, res; |
9960 | u32 src, dst; |
9961 | |
9962 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9963 | PC++; |
9964 | PRE_IO |
9965 | READ_LONG_F(adr, res) |
9966 | flag_C = 0; |
9967 | flag_V = 0; |
9968 | flag_NotZ = res; |
9969 | flag_N = res >> 24; |
9970 | FETCH_SWORD(adr); |
9971 | adr += AREG((Opcode >> 9) & 7); |
9972 | WRITE_LONG_F(adr, res) |
9973 | POST_IO |
9974 | RET(28) |
9975 | } |
9976 | |
9977 | // MOVEL |
9978 | OPCODE(0x21BA) |
9979 | { |
9980 | u32 adr, res; |
9981 | u32 src, dst; |
9982 | |
9983 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
9984 | PC++; |
9985 | PRE_IO |
9986 | READ_LONG_F(adr, res) |
9987 | flag_C = 0; |
9988 | flag_V = 0; |
9989 | flag_NotZ = res; |
9990 | flag_N = res >> 24; |
9991 | adr = AREG((Opcode >> 9) & 7); |
9992 | DECODE_EXT_WORD |
9993 | WRITE_LONG_F(adr, res) |
9994 | POST_IO |
9995 | RET(30) |
9996 | } |
9997 | |
9998 | // MOVEL |
9999 | OPCODE(0x21FA) |
10000 | { |
10001 | u32 adr, res; |
10002 | u32 src, dst; |
10003 | |
10004 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10005 | PC++; |
10006 | PRE_IO |
10007 | READ_LONG_F(adr, res) |
10008 | flag_C = 0; |
10009 | flag_V = 0; |
10010 | flag_NotZ = res; |
10011 | flag_N = res >> 24; |
10012 | FETCH_SWORD(adr); |
10013 | WRITE_LONG_F(adr, res) |
10014 | POST_IO |
10015 | RET(28) |
10016 | } |
10017 | |
10018 | // MOVEL |
10019 | OPCODE(0x23FA) |
10020 | { |
10021 | u32 adr, res; |
10022 | u32 src, dst; |
10023 | |
10024 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10025 | PC++; |
10026 | PRE_IO |
10027 | READ_LONG_F(adr, res) |
10028 | flag_C = 0; |
10029 | flag_V = 0; |
10030 | flag_NotZ = res; |
10031 | flag_N = res >> 24; |
10032 | FETCH_LONG(adr); |
10033 | WRITE_LONG_F(adr, res) |
10034 | POST_IO |
10035 | RET(32) |
10036 | } |
10037 | |
10038 | // MOVEL |
10039 | OPCODE(0x2EFA) |
10040 | { |
10041 | u32 adr, res; |
10042 | u32 src, dst; |
10043 | |
10044 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10045 | PC++; |
10046 | PRE_IO |
10047 | READ_LONG_F(adr, res) |
10048 | flag_C = 0; |
10049 | flag_V = 0; |
10050 | flag_NotZ = res; |
10051 | flag_N = res >> 24; |
10052 | adr = AREG(7); |
10053 | AREG(7) += 4; |
10054 | WRITE_LONG_F(adr, res) |
10055 | POST_IO |
10056 | RET(24) |
10057 | } |
10058 | |
10059 | // MOVEL |
10060 | OPCODE(0x2F3A) |
10061 | { |
10062 | u32 adr, res; |
10063 | u32 src, dst; |
10064 | |
10065 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
10066 | PC++; |
10067 | PRE_IO |
10068 | READ_LONG_F(adr, res) |
10069 | flag_C = 0; |
10070 | flag_V = 0; |
10071 | flag_NotZ = res; |
10072 | flag_N = res >> 24; |
10073 | adr = AREG(7) - 4; |
10074 | AREG(7) = adr; |
10075 | WRITE_LONG_F(adr, res) |
10076 | POST_IO |
10077 | RET(24) |
10078 | } |
10079 | |
10080 | // MOVEL |
10081 | OPCODE(0x203B) |
10082 | { |
10083 | u32 adr, res; |
10084 | u32 src, dst; |
10085 | |
10086 | adr = (u32)(PC) - BasePC; |
10087 | DECODE_EXT_WORD |
10088 | PRE_IO |
10089 | READ_LONG_F(adr, res) |
10090 | flag_C = 0; |
10091 | flag_V = 0; |
10092 | flag_NotZ = res; |
10093 | flag_N = res >> 24; |
10094 | DREGu32((Opcode >> 9) & 7) = res; |
10095 | POST_IO |
10096 | RET(18) |
10097 | } |
10098 | |
10099 | // MOVEL |
10100 | OPCODE(0x20BB) |
10101 | { |
10102 | u32 adr, res; |
10103 | u32 src, dst; |
10104 | |
10105 | adr = (u32)(PC) - BasePC; |
10106 | DECODE_EXT_WORD |
10107 | PRE_IO |
10108 | READ_LONG_F(adr, res) |
10109 | flag_C = 0; |
10110 | flag_V = 0; |
10111 | flag_NotZ = res; |
10112 | flag_N = res >> 24; |
10113 | adr = AREG((Opcode >> 9) & 7); |
10114 | WRITE_LONG_F(adr, res) |
10115 | POST_IO |
10116 | RET(26) |
10117 | } |
10118 | |
10119 | // MOVEL |
10120 | OPCODE(0x20FB) |
10121 | { |
10122 | u32 adr, res; |
10123 | u32 src, dst; |
10124 | |
10125 | adr = (u32)(PC) - BasePC; |
10126 | DECODE_EXT_WORD |
10127 | PRE_IO |
10128 | READ_LONG_F(adr, res) |
10129 | flag_C = 0; |
10130 | flag_V = 0; |
10131 | flag_NotZ = res; |
10132 | flag_N = res >> 24; |
10133 | adr = AREG((Opcode >> 9) & 7); |
10134 | AREG((Opcode >> 9) & 7) += 4; |
10135 | WRITE_LONG_F(adr, res) |
10136 | POST_IO |
10137 | RET(26) |
10138 | } |
10139 | |
10140 | // MOVEL |
10141 | OPCODE(0x213B) |
10142 | { |
10143 | u32 adr, res; |
10144 | u32 src, dst; |
10145 | |
10146 | adr = (u32)(PC) - BasePC; |
10147 | DECODE_EXT_WORD |
10148 | PRE_IO |
10149 | READ_LONG_F(adr, res) |
10150 | flag_C = 0; |
10151 | flag_V = 0; |
10152 | flag_NotZ = res; |
10153 | flag_N = res >> 24; |
10154 | adr = AREG((Opcode >> 9) & 7) - 4; |
10155 | AREG((Opcode >> 9) & 7) = adr; |
10156 | WRITE_LONG_F(adr, res) |
10157 | POST_IO |
10158 | RET(26) |
10159 | } |
10160 | |
10161 | // MOVEL |
10162 | OPCODE(0x217B) |
10163 | { |
10164 | u32 adr, res; |
10165 | u32 src, dst; |
10166 | |
10167 | adr = (u32)(PC) - BasePC; |
10168 | DECODE_EXT_WORD |
10169 | PRE_IO |
10170 | READ_LONG_F(adr, res) |
10171 | flag_C = 0; |
10172 | flag_V = 0; |
10173 | flag_NotZ = res; |
10174 | flag_N = res >> 24; |
10175 | FETCH_SWORD(adr); |
10176 | adr += AREG((Opcode >> 9) & 7); |
10177 | WRITE_LONG_F(adr, res) |
10178 | POST_IO |
10179 | RET(30) |
10180 | } |
10181 | |
10182 | // MOVEL |
10183 | OPCODE(0x21BB) |
10184 | { |
10185 | u32 adr, res; |
10186 | u32 src, dst; |
10187 | |
10188 | adr = (u32)(PC) - BasePC; |
10189 | DECODE_EXT_WORD |
10190 | PRE_IO |
10191 | READ_LONG_F(adr, res) |
10192 | flag_C = 0; |
10193 | flag_V = 0; |
10194 | flag_NotZ = res; |
10195 | flag_N = res >> 24; |
10196 | adr = AREG((Opcode >> 9) & 7); |
10197 | DECODE_EXT_WORD |
10198 | WRITE_LONG_F(adr, res) |
10199 | POST_IO |
10200 | RET(32) |
10201 | } |
10202 | |
10203 | // MOVEL |
10204 | OPCODE(0x21FB) |
10205 | { |
10206 | u32 adr, res; |
10207 | u32 src, dst; |
10208 | |
10209 | adr = (u32)(PC) - BasePC; |
10210 | DECODE_EXT_WORD |
10211 | PRE_IO |
10212 | READ_LONG_F(adr, res) |
10213 | flag_C = 0; |
10214 | flag_V = 0; |
10215 | flag_NotZ = res; |
10216 | flag_N = res >> 24; |
10217 | FETCH_SWORD(adr); |
10218 | WRITE_LONG_F(adr, res) |
10219 | POST_IO |
10220 | RET(30) |
10221 | } |
10222 | |
10223 | // MOVEL |
10224 | OPCODE(0x23FB) |
10225 | { |
10226 | u32 adr, res; |
10227 | u32 src, dst; |
10228 | |
10229 | adr = (u32)(PC) - BasePC; |
10230 | DECODE_EXT_WORD |
10231 | PRE_IO |
10232 | READ_LONG_F(adr, res) |
10233 | flag_C = 0; |
10234 | flag_V = 0; |
10235 | flag_NotZ = res; |
10236 | flag_N = res >> 24; |
10237 | FETCH_LONG(adr); |
10238 | WRITE_LONG_F(adr, res) |
10239 | POST_IO |
10240 | RET(34) |
10241 | } |
10242 | |
10243 | // MOVEL |
10244 | OPCODE(0x2EFB) |
10245 | { |
10246 | u32 adr, res; |
10247 | u32 src, dst; |
10248 | |
10249 | adr = (u32)(PC) - BasePC; |
10250 | DECODE_EXT_WORD |
10251 | PRE_IO |
10252 | READ_LONG_F(adr, res) |
10253 | flag_C = 0; |
10254 | flag_V = 0; |
10255 | flag_NotZ = res; |
10256 | flag_N = res >> 24; |
10257 | adr = AREG(7); |
10258 | AREG(7) += 4; |
10259 | WRITE_LONG_F(adr, res) |
10260 | POST_IO |
10261 | RET(26) |
10262 | } |
10263 | |
10264 | // MOVEL |
10265 | OPCODE(0x2F3B) |
10266 | { |
10267 | u32 adr, res; |
10268 | u32 src, dst; |
10269 | |
10270 | adr = (u32)(PC) - BasePC; |
10271 | DECODE_EXT_WORD |
10272 | PRE_IO |
10273 | READ_LONG_F(adr, res) |
10274 | flag_C = 0; |
10275 | flag_V = 0; |
10276 | flag_NotZ = res; |
10277 | flag_N = res >> 24; |
10278 | adr = AREG(7) - 4; |
10279 | AREG(7) = adr; |
10280 | WRITE_LONG_F(adr, res) |
10281 | POST_IO |
10282 | RET(26) |
10283 | } |
10284 | |
10285 | // MOVEL |
10286 | OPCODE(0x203C) |
10287 | { |
10288 | u32 adr, res; |
10289 | u32 src, dst; |
10290 | |
10291 | FETCH_LONG(res); |
10292 | flag_C = 0; |
10293 | flag_V = 0; |
10294 | flag_NotZ = res; |
10295 | flag_N = res >> 24; |
10296 | DREGu32((Opcode >> 9) & 7) = res; |
10297 | RET(12) |
10298 | } |
10299 | |
10300 | // MOVEL |
10301 | OPCODE(0x20BC) |
10302 | { |
10303 | u32 adr, res; |
10304 | u32 src, dst; |
10305 | |
10306 | FETCH_LONG(res); |
10307 | flag_C = 0; |
10308 | flag_V = 0; |
10309 | flag_NotZ = res; |
10310 | flag_N = res >> 24; |
10311 | adr = AREG((Opcode >> 9) & 7); |
10312 | PRE_IO |
10313 | WRITE_LONG_F(adr, res) |
10314 | POST_IO |
10315 | RET(20) |
10316 | } |
10317 | |
10318 | // MOVEL |
10319 | OPCODE(0x20FC) |
10320 | { |
10321 | u32 adr, res; |
10322 | u32 src, dst; |
10323 | |
10324 | FETCH_LONG(res); |
10325 | flag_C = 0; |
10326 | flag_V = 0; |
10327 | flag_NotZ = res; |
10328 | flag_N = res >> 24; |
10329 | adr = AREG((Opcode >> 9) & 7); |
10330 | AREG((Opcode >> 9) & 7) += 4; |
10331 | PRE_IO |
10332 | WRITE_LONG_F(adr, res) |
10333 | POST_IO |
10334 | RET(20) |
10335 | } |
10336 | |
10337 | // MOVEL |
10338 | OPCODE(0x213C) |
10339 | { |
10340 | u32 adr, res; |
10341 | u32 src, dst; |
10342 | |
10343 | FETCH_LONG(res); |
10344 | flag_C = 0; |
10345 | flag_V = 0; |
10346 | flag_NotZ = res; |
10347 | flag_N = res >> 24; |
10348 | adr = AREG((Opcode >> 9) & 7) - 4; |
10349 | AREG((Opcode >> 9) & 7) = adr; |
10350 | PRE_IO |
10351 | WRITE_LONG_F(adr, res) |
10352 | POST_IO |
10353 | RET(20) |
10354 | } |
10355 | |
10356 | // MOVEL |
10357 | OPCODE(0x217C) |
10358 | { |
10359 | u32 adr, res; |
10360 | u32 src, dst; |
10361 | |
10362 | FETCH_LONG(res); |
10363 | flag_C = 0; |
10364 | flag_V = 0; |
10365 | flag_NotZ = res; |
10366 | flag_N = res >> 24; |
10367 | FETCH_SWORD(adr); |
10368 | adr += AREG((Opcode >> 9) & 7); |
10369 | PRE_IO |
10370 | WRITE_LONG_F(adr, res) |
10371 | POST_IO |
10372 | RET(24) |
10373 | } |
10374 | |
10375 | // MOVEL |
10376 | OPCODE(0x21BC) |
10377 | { |
10378 | u32 adr, res; |
10379 | u32 src, dst; |
10380 | |
10381 | FETCH_LONG(res); |
10382 | flag_C = 0; |
10383 | flag_V = 0; |
10384 | flag_NotZ = res; |
10385 | flag_N = res >> 24; |
10386 | adr = AREG((Opcode >> 9) & 7); |
10387 | DECODE_EXT_WORD |
10388 | PRE_IO |
10389 | WRITE_LONG_F(adr, res) |
10390 | POST_IO |
10391 | RET(26) |
10392 | } |
10393 | |
10394 | // MOVEL |
10395 | OPCODE(0x21FC) |
10396 | { |
10397 | u32 adr, res; |
10398 | u32 src, dst; |
10399 | |
10400 | FETCH_LONG(res); |
10401 | flag_C = 0; |
10402 | flag_V = 0; |
10403 | flag_NotZ = res; |
10404 | flag_N = res >> 24; |
10405 | FETCH_SWORD(adr); |
10406 | PRE_IO |
10407 | WRITE_LONG_F(adr, res) |
10408 | POST_IO |
10409 | RET(24) |
10410 | } |
10411 | |
10412 | // MOVEL |
10413 | OPCODE(0x23FC) |
10414 | { |
10415 | u32 adr, res; |
10416 | u32 src, dst; |
10417 | |
10418 | FETCH_LONG(res); |
10419 | flag_C = 0; |
10420 | flag_V = 0; |
10421 | flag_NotZ = res; |
10422 | flag_N = res >> 24; |
10423 | FETCH_LONG(adr); |
10424 | PRE_IO |
10425 | WRITE_LONG_F(adr, res) |
10426 | POST_IO |
10427 | RET(28) |
10428 | } |
10429 | |
10430 | // MOVEL |
10431 | OPCODE(0x2EFC) |
10432 | { |
10433 | u32 adr, res; |
10434 | u32 src, dst; |
10435 | |
10436 | FETCH_LONG(res); |
10437 | flag_C = 0; |
10438 | flag_V = 0; |
10439 | flag_NotZ = res; |
10440 | flag_N = res >> 24; |
10441 | adr = AREG(7); |
10442 | AREG(7) += 4; |
10443 | PRE_IO |
10444 | WRITE_LONG_F(adr, res) |
10445 | POST_IO |
10446 | RET(20) |
10447 | } |
10448 | |
10449 | // MOVEL |
10450 | OPCODE(0x2F3C) |
10451 | { |
10452 | u32 adr, res; |
10453 | u32 src, dst; |
10454 | |
10455 | FETCH_LONG(res); |
10456 | flag_C = 0; |
10457 | flag_V = 0; |
10458 | flag_NotZ = res; |
10459 | flag_N = res >> 24; |
10460 | adr = AREG(7) - 4; |
10461 | AREG(7) = adr; |
10462 | PRE_IO |
10463 | WRITE_LONG_F(adr, res) |
10464 | POST_IO |
10465 | RET(20) |
10466 | } |
10467 | |
10468 | // MOVEL |
10469 | OPCODE(0x201F) |
10470 | { |
10471 | u32 adr, res; |
10472 | u32 src, dst; |
10473 | |
10474 | adr = AREG(7); |
10475 | AREG(7) += 4; |
10476 | PRE_IO |
10477 | READ_LONG_F(adr, res) |
10478 | flag_C = 0; |
10479 | flag_V = 0; |
10480 | flag_NotZ = res; |
10481 | flag_N = res >> 24; |
10482 | DREGu32((Opcode >> 9) & 7) = res; |
10483 | POST_IO |
10484 | RET(12) |
10485 | } |
10486 | |
10487 | // MOVEL |
10488 | OPCODE(0x209F) |
10489 | { |
10490 | u32 adr, res; |
10491 | u32 src, dst; |
10492 | |
10493 | adr = AREG(7); |
10494 | AREG(7) += 4; |
10495 | PRE_IO |
10496 | READ_LONG_F(adr, res) |
10497 | flag_C = 0; |
10498 | flag_V = 0; |
10499 | flag_NotZ = res; |
10500 | flag_N = res >> 24; |
10501 | adr = AREG((Opcode >> 9) & 7); |
10502 | WRITE_LONG_F(adr, res) |
10503 | POST_IO |
10504 | RET(20) |
10505 | } |
10506 | |
10507 | // MOVEL |
10508 | OPCODE(0x20DF) |
10509 | { |
10510 | u32 adr, res; |
10511 | u32 src, dst; |
10512 | |
10513 | adr = AREG(7); |
10514 | AREG(7) += 4; |
10515 | PRE_IO |
10516 | READ_LONG_F(adr, res) |
10517 | flag_C = 0; |
10518 | flag_V = 0; |
10519 | flag_NotZ = res; |
10520 | flag_N = res >> 24; |
10521 | adr = AREG((Opcode >> 9) & 7); |
10522 | AREG((Opcode >> 9) & 7) += 4; |
10523 | WRITE_LONG_F(adr, res) |
10524 | POST_IO |
10525 | RET(20) |
10526 | } |
10527 | |
10528 | // MOVEL |
10529 | OPCODE(0x211F) |
10530 | { |
10531 | u32 adr, res; |
10532 | u32 src, dst; |
10533 | |
10534 | adr = AREG(7); |
10535 | AREG(7) += 4; |
10536 | PRE_IO |
10537 | READ_LONG_F(adr, res) |
10538 | flag_C = 0; |
10539 | flag_V = 0; |
10540 | flag_NotZ = res; |
10541 | flag_N = res >> 24; |
10542 | adr = AREG((Opcode >> 9) & 7) - 4; |
10543 | AREG((Opcode >> 9) & 7) = adr; |
10544 | WRITE_LONG_F(adr, res) |
10545 | POST_IO |
10546 | RET(20) |
10547 | } |
10548 | |
10549 | // MOVEL |
10550 | OPCODE(0x215F) |
10551 | { |
10552 | u32 adr, res; |
10553 | u32 src, dst; |
10554 | |
10555 | adr = AREG(7); |
10556 | AREG(7) += 4; |
10557 | PRE_IO |
10558 | READ_LONG_F(adr, res) |
10559 | flag_C = 0; |
10560 | flag_V = 0; |
10561 | flag_NotZ = res; |
10562 | flag_N = res >> 24; |
10563 | FETCH_SWORD(adr); |
10564 | adr += AREG((Opcode >> 9) & 7); |
10565 | WRITE_LONG_F(adr, res) |
10566 | POST_IO |
10567 | RET(24) |
10568 | } |
10569 | |
10570 | // MOVEL |
10571 | OPCODE(0x219F) |
10572 | { |
10573 | u32 adr, res; |
10574 | u32 src, dst; |
10575 | |
10576 | adr = AREG(7); |
10577 | AREG(7) += 4; |
10578 | PRE_IO |
10579 | READ_LONG_F(adr, res) |
10580 | flag_C = 0; |
10581 | flag_V = 0; |
10582 | flag_NotZ = res; |
10583 | flag_N = res >> 24; |
10584 | adr = AREG((Opcode >> 9) & 7); |
10585 | DECODE_EXT_WORD |
10586 | WRITE_LONG_F(adr, res) |
10587 | POST_IO |
10588 | RET(26) |
10589 | } |
10590 | |
10591 | // MOVEL |
10592 | OPCODE(0x21DF) |
10593 | { |
10594 | u32 adr, res; |
10595 | u32 src, dst; |
10596 | |
10597 | adr = AREG(7); |
10598 | AREG(7) += 4; |
10599 | PRE_IO |
10600 | READ_LONG_F(adr, res) |
10601 | flag_C = 0; |
10602 | flag_V = 0; |
10603 | flag_NotZ = res; |
10604 | flag_N = res >> 24; |
10605 | FETCH_SWORD(adr); |
10606 | WRITE_LONG_F(adr, res) |
10607 | POST_IO |
10608 | RET(24) |
10609 | } |
10610 | |
10611 | // MOVEL |
10612 | OPCODE(0x23DF) |
10613 | { |
10614 | u32 adr, res; |
10615 | u32 src, dst; |
10616 | |
10617 | adr = AREG(7); |
10618 | AREG(7) += 4; |
10619 | PRE_IO |
10620 | READ_LONG_F(adr, res) |
10621 | flag_C = 0; |
10622 | flag_V = 0; |
10623 | flag_NotZ = res; |
10624 | flag_N = res >> 24; |
10625 | FETCH_LONG(adr); |
10626 | WRITE_LONG_F(adr, res) |
10627 | POST_IO |
10628 | RET(28) |
10629 | } |
10630 | |
10631 | // MOVEL |
10632 | OPCODE(0x2EDF) |
10633 | { |
10634 | u32 adr, res; |
10635 | u32 src, dst; |
10636 | |
10637 | adr = AREG(7); |
10638 | AREG(7) += 4; |
10639 | PRE_IO |
10640 | READ_LONG_F(adr, res) |
10641 | flag_C = 0; |
10642 | flag_V = 0; |
10643 | flag_NotZ = res; |
10644 | flag_N = res >> 24; |
10645 | adr = AREG(7); |
10646 | AREG(7) += 4; |
10647 | WRITE_LONG_F(adr, res) |
10648 | POST_IO |
10649 | RET(20) |
10650 | } |
10651 | |
10652 | // MOVEL |
10653 | OPCODE(0x2F1F) |
10654 | { |
10655 | u32 adr, res; |
10656 | u32 src, dst; |
10657 | |
10658 | adr = AREG(7); |
10659 | AREG(7) += 4; |
10660 | PRE_IO |
10661 | READ_LONG_F(adr, res) |
10662 | flag_C = 0; |
10663 | flag_V = 0; |
10664 | flag_NotZ = res; |
10665 | flag_N = res >> 24; |
10666 | adr = AREG(7) - 4; |
10667 | AREG(7) = adr; |
10668 | WRITE_LONG_F(adr, res) |
10669 | POST_IO |
10670 | RET(20) |
10671 | } |
10672 | |
10673 | // MOVEL |
10674 | OPCODE(0x2027) |
10675 | { |
10676 | u32 adr, res; |
10677 | u32 src, dst; |
10678 | |
10679 | adr = AREG(7) - 4; |
10680 | AREG(7) = adr; |
10681 | PRE_IO |
10682 | READ_LONG_F(adr, res) |
10683 | flag_C = 0; |
10684 | flag_V = 0; |
10685 | flag_NotZ = res; |
10686 | flag_N = res >> 24; |
10687 | DREGu32((Opcode >> 9) & 7) = res; |
10688 | POST_IO |
10689 | RET(14) |
10690 | } |
10691 | |
10692 | // MOVEL |
10693 | OPCODE(0x20A7) |
10694 | { |
10695 | u32 adr, res; |
10696 | u32 src, dst; |
10697 | |
10698 | adr = AREG(7) - 4; |
10699 | AREG(7) = adr; |
10700 | PRE_IO |
10701 | READ_LONG_F(adr, res) |
10702 | flag_C = 0; |
10703 | flag_V = 0; |
10704 | flag_NotZ = res; |
10705 | flag_N = res >> 24; |
10706 | adr = AREG((Opcode >> 9) & 7); |
10707 | WRITE_LONG_F(adr, res) |
10708 | POST_IO |
10709 | RET(22) |
10710 | } |
10711 | |
10712 | // MOVEL |
10713 | OPCODE(0x20E7) |
10714 | { |
10715 | u32 adr, res; |
10716 | u32 src, dst; |
10717 | |
10718 | adr = AREG(7) - 4; |
10719 | AREG(7) = adr; |
10720 | PRE_IO |
10721 | READ_LONG_F(adr, res) |
10722 | flag_C = 0; |
10723 | flag_V = 0; |
10724 | flag_NotZ = res; |
10725 | flag_N = res >> 24; |
10726 | adr = AREG((Opcode >> 9) & 7); |
10727 | AREG((Opcode >> 9) & 7) += 4; |
10728 | WRITE_LONG_F(adr, res) |
10729 | POST_IO |
10730 | RET(22) |
10731 | } |
10732 | |
10733 | // MOVEL |
10734 | OPCODE(0x2127) |
10735 | { |
10736 | u32 adr, res; |
10737 | u32 src, dst; |
10738 | |
10739 | adr = AREG(7) - 4; |
10740 | AREG(7) = adr; |
10741 | PRE_IO |
10742 | READ_LONG_F(adr, res) |
10743 | flag_C = 0; |
10744 | flag_V = 0; |
10745 | flag_NotZ = res; |
10746 | flag_N = res >> 24; |
10747 | adr = AREG((Opcode >> 9) & 7) - 4; |
10748 | AREG((Opcode >> 9) & 7) = adr; |
10749 | WRITE_LONG_F(adr, res) |
10750 | POST_IO |
10751 | RET(22) |
10752 | } |
10753 | |
10754 | // MOVEL |
10755 | OPCODE(0x2167) |
10756 | { |
10757 | u32 adr, res; |
10758 | u32 src, dst; |
10759 | |
10760 | adr = AREG(7) - 4; |
10761 | AREG(7) = adr; |
10762 | PRE_IO |
10763 | READ_LONG_F(adr, res) |
10764 | flag_C = 0; |
10765 | flag_V = 0; |
10766 | flag_NotZ = res; |
10767 | flag_N = res >> 24; |
10768 | FETCH_SWORD(adr); |
10769 | adr += AREG((Opcode >> 9) & 7); |
10770 | WRITE_LONG_F(adr, res) |
10771 | POST_IO |
10772 | RET(26) |
10773 | } |
10774 | |
10775 | // MOVEL |
10776 | OPCODE(0x21A7) |
10777 | { |
10778 | u32 adr, res; |
10779 | u32 src, dst; |
10780 | |
10781 | adr = AREG(7) - 4; |
10782 | AREG(7) = adr; |
10783 | PRE_IO |
10784 | READ_LONG_F(adr, res) |
10785 | flag_C = 0; |
10786 | flag_V = 0; |
10787 | flag_NotZ = res; |
10788 | flag_N = res >> 24; |
10789 | adr = AREG((Opcode >> 9) & 7); |
10790 | DECODE_EXT_WORD |
10791 | WRITE_LONG_F(adr, res) |
10792 | POST_IO |
10793 | RET(28) |
10794 | } |
10795 | |
10796 | // MOVEL |
10797 | OPCODE(0x21E7) |
10798 | { |
10799 | u32 adr, res; |
10800 | u32 src, dst; |
10801 | |
10802 | adr = AREG(7) - 4; |
10803 | AREG(7) = adr; |
10804 | PRE_IO |
10805 | READ_LONG_F(adr, res) |
10806 | flag_C = 0; |
10807 | flag_V = 0; |
10808 | flag_NotZ = res; |
10809 | flag_N = res >> 24; |
10810 | FETCH_SWORD(adr); |
10811 | WRITE_LONG_F(adr, res) |
10812 | POST_IO |
10813 | RET(26) |
10814 | } |
10815 | |
10816 | // MOVEL |
10817 | OPCODE(0x23E7) |
10818 | { |
10819 | u32 adr, res; |
10820 | u32 src, dst; |
10821 | |
10822 | adr = AREG(7) - 4; |
10823 | AREG(7) = adr; |
10824 | PRE_IO |
10825 | READ_LONG_F(adr, res) |
10826 | flag_C = 0; |
10827 | flag_V = 0; |
10828 | flag_NotZ = res; |
10829 | flag_N = res >> 24; |
10830 | FETCH_LONG(adr); |
10831 | WRITE_LONG_F(adr, res) |
10832 | POST_IO |
10833 | RET(30) |
10834 | } |
10835 | |
10836 | // MOVEL |
10837 | OPCODE(0x2EE7) |
10838 | { |
10839 | u32 adr, res; |
10840 | u32 src, dst; |
10841 | |
10842 | adr = AREG(7) - 4; |
10843 | AREG(7) = adr; |
10844 | PRE_IO |
10845 | READ_LONG_F(adr, res) |
10846 | flag_C = 0; |
10847 | flag_V = 0; |
10848 | flag_NotZ = res; |
10849 | flag_N = res >> 24; |
10850 | adr = AREG(7); |
10851 | AREG(7) += 4; |
10852 | WRITE_LONG_F(adr, res) |
10853 | POST_IO |
10854 | RET(22) |
10855 | } |
10856 | |
10857 | // MOVEL |
10858 | OPCODE(0x2F27) |
10859 | { |
10860 | u32 adr, res; |
10861 | u32 src, dst; |
10862 | |
10863 | adr = AREG(7) - 4; |
10864 | AREG(7) = adr; |
10865 | PRE_IO |
10866 | READ_LONG_F(adr, res) |
10867 | flag_C = 0; |
10868 | flag_V = 0; |
10869 | flag_NotZ = res; |
10870 | flag_N = res >> 24; |
10871 | adr = AREG(7) - 4; |
10872 | AREG(7) = adr; |
10873 | WRITE_LONG_F(adr, res) |
10874 | POST_IO |
10875 | RET(22) |
10876 | } |
10877 | |
10878 | // MOVEAL |
10879 | OPCODE(0x2040) |
10880 | { |
10881 | u32 adr, res; |
10882 | u32 src, dst; |
10883 | |
10884 | res = (s32)DREGs32((Opcode >> 0) & 7); |
10885 | AREG((Opcode >> 9) & 7) = res; |
10886 | RET(4) |
10887 | } |
10888 | |
10889 | // MOVEAL |
10890 | OPCODE(0x2048) |
10891 | { |
10892 | u32 adr, res; |
10893 | u32 src, dst; |
10894 | |
10895 | res = (s32)AREGs32((Opcode >> 0) & 7); |
10896 | AREG((Opcode >> 9) & 7) = res; |
10897 | RET(4) |
10898 | } |
10899 | |
10900 | // MOVEAL |
10901 | OPCODE(0x2050) |
10902 | { |
10903 | u32 adr, res; |
10904 | u32 src, dst; |
10905 | |
10906 | adr = AREG((Opcode >> 0) & 7); |
10907 | PRE_IO |
10908 | READSX_LONG_F(adr, res) |
10909 | AREG((Opcode >> 9) & 7) = res; |
10910 | POST_IO |
10911 | RET(12) |
10912 | } |
10913 | |
10914 | // MOVEAL |
10915 | OPCODE(0x2058) |
10916 | { |
10917 | u32 adr, res; |
10918 | u32 src, dst; |
10919 | |
10920 | adr = AREG((Opcode >> 0) & 7); |
10921 | AREG((Opcode >> 0) & 7) += 4; |
10922 | PRE_IO |
10923 | READSX_LONG_F(adr, res) |
10924 | AREG((Opcode >> 9) & 7) = res; |
10925 | POST_IO |
10926 | RET(12) |
10927 | } |
10928 | |
10929 | // MOVEAL |
10930 | OPCODE(0x2060) |
10931 | { |
10932 | u32 adr, res; |
10933 | u32 src, dst; |
10934 | |
10935 | adr = AREG((Opcode >> 0) & 7) - 4; |
10936 | AREG((Opcode >> 0) & 7) = adr; |
10937 | PRE_IO |
10938 | READSX_LONG_F(adr, res) |
10939 | AREG((Opcode >> 9) & 7) = res; |
10940 | POST_IO |
10941 | RET(14) |
10942 | } |
10943 | |
10944 | // MOVEAL |
10945 | OPCODE(0x2068) |
10946 | { |
10947 | u32 adr, res; |
10948 | u32 src, dst; |
10949 | |
10950 | FETCH_SWORD(adr); |
10951 | adr += AREG((Opcode >> 0) & 7); |
10952 | PRE_IO |
10953 | READSX_LONG_F(adr, res) |
10954 | AREG((Opcode >> 9) & 7) = res; |
10955 | POST_IO |
10956 | RET(16) |
10957 | } |
10958 | |
10959 | // MOVEAL |
10960 | OPCODE(0x2070) |
10961 | { |
10962 | u32 adr, res; |
10963 | u32 src, dst; |
10964 | |
10965 | adr = AREG((Opcode >> 0) & 7); |
10966 | DECODE_EXT_WORD |
10967 | PRE_IO |
10968 | READSX_LONG_F(adr, res) |
10969 | AREG((Opcode >> 9) & 7) = res; |
10970 | POST_IO |
10971 | RET(18) |
10972 | } |
10973 | |
10974 | // MOVEAL |
10975 | OPCODE(0x2078) |
10976 | { |
10977 | u32 adr, res; |
10978 | u32 src, dst; |
10979 | |
10980 | FETCH_SWORD(adr); |
10981 | PRE_IO |
10982 | READSX_LONG_F(adr, res) |
10983 | AREG((Opcode >> 9) & 7) = res; |
10984 | POST_IO |
10985 | RET(16) |
10986 | } |
10987 | |
10988 | // MOVEAL |
10989 | OPCODE(0x2079) |
10990 | { |
10991 | u32 adr, res; |
10992 | u32 src, dst; |
10993 | |
10994 | FETCH_LONG(adr); |
10995 | PRE_IO |
10996 | READSX_LONG_F(adr, res) |
10997 | AREG((Opcode >> 9) & 7) = res; |
10998 | POST_IO |
10999 | RET(20) |
11000 | } |
11001 | |
11002 | // MOVEAL |
11003 | OPCODE(0x207A) |
11004 | { |
11005 | u32 adr, res; |
11006 | u32 src, dst; |
11007 | |
11008 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
11009 | PC++; |
11010 | PRE_IO |
11011 | READSX_LONG_F(adr, res) |
11012 | AREG((Opcode >> 9) & 7) = res; |
11013 | POST_IO |
11014 | RET(16) |
11015 | } |
11016 | |
11017 | // MOVEAL |
11018 | OPCODE(0x207B) |
11019 | { |
11020 | u32 adr, res; |
11021 | u32 src, dst; |
11022 | |
11023 | adr = (u32)(PC) - BasePC; |
11024 | DECODE_EXT_WORD |
11025 | PRE_IO |
11026 | READSX_LONG_F(adr, res) |
11027 | AREG((Opcode >> 9) & 7) = res; |
11028 | POST_IO |
11029 | RET(18) |
11030 | } |
11031 | |
11032 | // MOVEAL |
11033 | OPCODE(0x207C) |
11034 | { |
11035 | u32 adr, res; |
11036 | u32 src, dst; |
11037 | |
11038 | FETCH_LONG(res); |
11039 | AREG((Opcode >> 9) & 7) = res; |
11040 | RET(12) |
11041 | } |
11042 | |
11043 | // MOVEAL |
11044 | OPCODE(0x205F) |
11045 | { |
11046 | u32 adr, res; |
11047 | u32 src, dst; |
11048 | |
11049 | adr = AREG(7); |
11050 | AREG(7) += 4; |
11051 | PRE_IO |
11052 | READSX_LONG_F(adr, res) |
11053 | AREG((Opcode >> 9) & 7) = res; |
11054 | POST_IO |
11055 | RET(12) |
11056 | } |
11057 | |
11058 | // MOVEAL |
11059 | OPCODE(0x2067) |
11060 | { |
11061 | u32 adr, res; |
11062 | u32 src, dst; |
11063 | |
11064 | adr = AREG(7) - 4; |
11065 | AREG(7) = adr; |
11066 | PRE_IO |
11067 | READSX_LONG_F(adr, res) |
11068 | AREG((Opcode >> 9) & 7) = res; |
11069 | POST_IO |
11070 | RET(14) |
11071 | } |
11072 | |
11073 | // MOVEW |
11074 | OPCODE(0x3000) |
11075 | { |
11076 | u32 adr, res; |
11077 | u32 src, dst; |
11078 | |
11079 | res = DREGu16((Opcode >> 0) & 7); |
11080 | flag_C = 0; |
11081 | flag_V = 0; |
11082 | flag_NotZ = res; |
11083 | flag_N = res >> 8; |
11084 | DREGu16((Opcode >> 9) & 7) = res; |
11085 | RET(4) |
11086 | } |
11087 | |
11088 | // MOVEW |
11089 | OPCODE(0x3080) |
11090 | { |
11091 | u32 adr, res; |
11092 | u32 src, dst; |
11093 | |
11094 | res = DREGu16((Opcode >> 0) & 7); |
11095 | flag_C = 0; |
11096 | flag_V = 0; |
11097 | flag_NotZ = res; |
11098 | flag_N = res >> 8; |
11099 | adr = AREG((Opcode >> 9) & 7); |
11100 | PRE_IO |
11101 | WRITE_WORD_F(adr, res) |
11102 | POST_IO |
11103 | RET(8) |
11104 | } |
11105 | |
11106 | // MOVEW |
11107 | OPCODE(0x30C0) |
11108 | { |
11109 | u32 adr, res; |
11110 | u32 src, dst; |
11111 | |
11112 | res = DREGu16((Opcode >> 0) & 7); |
11113 | flag_C = 0; |
11114 | flag_V = 0; |
11115 | flag_NotZ = res; |
11116 | flag_N = res >> 8; |
11117 | adr = AREG((Opcode >> 9) & 7); |
11118 | AREG((Opcode >> 9) & 7) += 2; |
11119 | PRE_IO |
11120 | WRITE_WORD_F(adr, res) |
11121 | POST_IO |
11122 | RET(8) |
11123 | } |
11124 | |
11125 | // MOVEW |
11126 | OPCODE(0x3100) |
11127 | { |
11128 | u32 adr, res; |
11129 | u32 src, dst; |
11130 | |
11131 | res = DREGu16((Opcode >> 0) & 7); |
11132 | flag_C = 0; |
11133 | flag_V = 0; |
11134 | flag_NotZ = res; |
11135 | flag_N = res >> 8; |
11136 | adr = AREG((Opcode >> 9) & 7) - 2; |
11137 | AREG((Opcode >> 9) & 7) = adr; |
11138 | PRE_IO |
11139 | WRITE_WORD_F(adr, res) |
11140 | POST_IO |
11141 | RET(8) |
11142 | } |
11143 | |
11144 | // MOVEW |
11145 | OPCODE(0x3140) |
11146 | { |
11147 | u32 adr, res; |
11148 | u32 src, dst; |
11149 | |
11150 | res = DREGu16((Opcode >> 0) & 7); |
11151 | flag_C = 0; |
11152 | flag_V = 0; |
11153 | flag_NotZ = res; |
11154 | flag_N = res >> 8; |
11155 | FETCH_SWORD(adr); |
11156 | adr += AREG((Opcode >> 9) & 7); |
11157 | PRE_IO |
11158 | WRITE_WORD_F(adr, res) |
11159 | POST_IO |
11160 | RET(12) |
11161 | } |
11162 | |
11163 | // MOVEW |
11164 | OPCODE(0x3180) |
11165 | { |
11166 | u32 adr, res; |
11167 | u32 src, dst; |
11168 | |
11169 | res = DREGu16((Opcode >> 0) & 7); |
11170 | flag_C = 0; |
11171 | flag_V = 0; |
11172 | flag_NotZ = res; |
11173 | flag_N = res >> 8; |
11174 | adr = AREG((Opcode >> 9) & 7); |
11175 | DECODE_EXT_WORD |
11176 | PRE_IO |
11177 | WRITE_WORD_F(adr, res) |
11178 | POST_IO |
11179 | RET(14) |
11180 | } |
11181 | |
11182 | // MOVEW |
11183 | OPCODE(0x31C0) |
11184 | { |
11185 | u32 adr, res; |
11186 | u32 src, dst; |
11187 | |
11188 | res = DREGu16((Opcode >> 0) & 7); |
11189 | flag_C = 0; |
11190 | flag_V = 0; |
11191 | flag_NotZ = res; |
11192 | flag_N = res >> 8; |
11193 | FETCH_SWORD(adr); |
11194 | PRE_IO |
11195 | WRITE_WORD_F(adr, res) |
11196 | POST_IO |
11197 | RET(12) |
11198 | } |
11199 | |
11200 | // MOVEW |
11201 | OPCODE(0x33C0) |
11202 | { |
11203 | u32 adr, res; |
11204 | u32 src, dst; |
11205 | |
11206 | res = DREGu16((Opcode >> 0) & 7); |
11207 | flag_C = 0; |
11208 | flag_V = 0; |
11209 | flag_NotZ = res; |
11210 | flag_N = res >> 8; |
11211 | FETCH_LONG(adr); |
11212 | PRE_IO |
11213 | WRITE_WORD_F(adr, res) |
11214 | POST_IO |
11215 | RET(16) |
11216 | } |
11217 | |
11218 | // MOVEW |
11219 | OPCODE(0x3EC0) |
11220 | { |
11221 | u32 adr, res; |
11222 | u32 src, dst; |
11223 | |
11224 | res = DREGu16((Opcode >> 0) & 7); |
11225 | flag_C = 0; |
11226 | flag_V = 0; |
11227 | flag_NotZ = res; |
11228 | flag_N = res >> 8; |
11229 | adr = AREG(7); |
11230 | AREG(7) += 2; |
11231 | PRE_IO |
11232 | WRITE_WORD_F(adr, res) |
11233 | POST_IO |
11234 | RET(8) |
11235 | } |
11236 | |
11237 | // MOVEW |
11238 | OPCODE(0x3F00) |
11239 | { |
11240 | u32 adr, res; |
11241 | u32 src, dst; |
11242 | |
11243 | res = DREGu16((Opcode >> 0) & 7); |
11244 | flag_C = 0; |
11245 | flag_V = 0; |
11246 | flag_NotZ = res; |
11247 | flag_N = res >> 8; |
11248 | adr = AREG(7) - 2; |
11249 | AREG(7) = adr; |
11250 | PRE_IO |
11251 | WRITE_WORD_F(adr, res) |
11252 | POST_IO |
11253 | RET(8) |
11254 | } |
11255 | |
11256 | // MOVEW |
11257 | OPCODE(0x3008) |
11258 | { |
11259 | u32 adr, res; |
11260 | u32 src, dst; |
11261 | |
11262 | res = AREGu16((Opcode >> 0) & 7); |
11263 | flag_C = 0; |
11264 | flag_V = 0; |
11265 | flag_NotZ = res; |
11266 | flag_N = res >> 8; |
11267 | DREGu16((Opcode >> 9) & 7) = res; |
11268 | RET(4) |
11269 | } |
11270 | |
11271 | // MOVEW |
11272 | OPCODE(0x3088) |
11273 | { |
11274 | u32 adr, res; |
11275 | u32 src, dst; |
11276 | |
11277 | res = AREGu16((Opcode >> 0) & 7); |
11278 | flag_C = 0; |
11279 | flag_V = 0; |
11280 | flag_NotZ = res; |
11281 | flag_N = res >> 8; |
11282 | adr = AREG((Opcode >> 9) & 7); |
11283 | PRE_IO |
11284 | WRITE_WORD_F(adr, res) |
11285 | POST_IO |
11286 | RET(8) |
11287 | } |
11288 | |
11289 | // MOVEW |
11290 | OPCODE(0x30C8) |
11291 | { |
11292 | u32 adr, res; |
11293 | u32 src, dst; |
11294 | |
11295 | res = AREGu16((Opcode >> 0) & 7); |
11296 | flag_C = 0; |
11297 | flag_V = 0; |
11298 | flag_NotZ = res; |
11299 | flag_N = res >> 8; |
11300 | adr = AREG((Opcode >> 9) & 7); |
11301 | AREG((Opcode >> 9) & 7) += 2; |
11302 | PRE_IO |
11303 | WRITE_WORD_F(adr, res) |
11304 | POST_IO |
11305 | RET(8) |
11306 | } |
11307 | |
11308 | // MOVEW |
11309 | OPCODE(0x3108) |
11310 | { |
11311 | u32 adr, res; |
11312 | u32 src, dst; |
11313 | |
11314 | res = AREGu16((Opcode >> 0) & 7); |
11315 | flag_C = 0; |
11316 | flag_V = 0; |
11317 | flag_NotZ = res; |
11318 | flag_N = res >> 8; |
11319 | adr = AREG((Opcode >> 9) & 7) - 2; |
11320 | AREG((Opcode >> 9) & 7) = adr; |
11321 | PRE_IO |
11322 | WRITE_WORD_F(adr, res) |
11323 | POST_IO |
11324 | RET(8) |
11325 | } |
11326 | |
11327 | // MOVEW |
11328 | OPCODE(0x3148) |
11329 | { |
11330 | u32 adr, res; |
11331 | u32 src, dst; |
11332 | |
11333 | res = AREGu16((Opcode >> 0) & 7); |
11334 | flag_C = 0; |
11335 | flag_V = 0; |
11336 | flag_NotZ = res; |
11337 | flag_N = res >> 8; |
11338 | FETCH_SWORD(adr); |
11339 | adr += AREG((Opcode >> 9) & 7); |
11340 | PRE_IO |
11341 | WRITE_WORD_F(adr, res) |
11342 | POST_IO |
11343 | RET(12) |
11344 | } |
11345 | |
11346 | // MOVEW |
11347 | OPCODE(0x3188) |
11348 | { |
11349 | u32 adr, res; |
11350 | u32 src, dst; |
11351 | |
11352 | res = AREGu16((Opcode >> 0) & 7); |
11353 | flag_C = 0; |
11354 | flag_V = 0; |
11355 | flag_NotZ = res; |
11356 | flag_N = res >> 8; |
11357 | adr = AREG((Opcode >> 9) & 7); |
11358 | DECODE_EXT_WORD |
11359 | PRE_IO |
11360 | WRITE_WORD_F(adr, res) |
11361 | POST_IO |
11362 | RET(14) |
11363 | } |
11364 | |
11365 | // MOVEW |
11366 | OPCODE(0x31C8) |
11367 | { |
11368 | u32 adr, res; |
11369 | u32 src, dst; |
11370 | |
11371 | res = AREGu16((Opcode >> 0) & 7); |
11372 | flag_C = 0; |
11373 | flag_V = 0; |
11374 | flag_NotZ = res; |
11375 | flag_N = res >> 8; |
11376 | FETCH_SWORD(adr); |
11377 | PRE_IO |
11378 | WRITE_WORD_F(adr, res) |
11379 | POST_IO |
11380 | RET(12) |
11381 | } |
11382 | |
11383 | // MOVEW |
11384 | OPCODE(0x33C8) |
11385 | { |
11386 | u32 adr, res; |
11387 | u32 src, dst; |
11388 | |
11389 | res = AREGu16((Opcode >> 0) & 7); |
11390 | flag_C = 0; |
11391 | flag_V = 0; |
11392 | flag_NotZ = res; |
11393 | flag_N = res >> 8; |
11394 | FETCH_LONG(adr); |
11395 | PRE_IO |
11396 | WRITE_WORD_F(adr, res) |
11397 | POST_IO |
11398 | RET(16) |
11399 | } |
11400 | |
11401 | // MOVEW |
11402 | OPCODE(0x3EC8) |
11403 | { |
11404 | u32 adr, res; |
11405 | u32 src, dst; |
11406 | |
11407 | res = AREGu16((Opcode >> 0) & 7); |
11408 | flag_C = 0; |
11409 | flag_V = 0; |
11410 | flag_NotZ = res; |
11411 | flag_N = res >> 8; |
11412 | adr = AREG(7); |
11413 | AREG(7) += 2; |
11414 | PRE_IO |
11415 | WRITE_WORD_F(adr, res) |
11416 | POST_IO |
11417 | RET(8) |
11418 | } |
11419 | |
11420 | // MOVEW |
11421 | OPCODE(0x3F08) |
11422 | { |
11423 | u32 adr, res; |
11424 | u32 src, dst; |
11425 | |
11426 | res = AREGu16((Opcode >> 0) & 7); |
11427 | flag_C = 0; |
11428 | flag_V = 0; |
11429 | flag_NotZ = res; |
11430 | flag_N = res >> 8; |
11431 | adr = AREG(7) - 2; |
11432 | AREG(7) = adr; |
11433 | PRE_IO |
11434 | WRITE_WORD_F(adr, res) |
11435 | POST_IO |
11436 | RET(8) |
11437 | } |
11438 | |
11439 | // MOVEW |
11440 | OPCODE(0x3010) |
11441 | { |
11442 | u32 adr, res; |
11443 | u32 src, dst; |
11444 | |
11445 | adr = AREG((Opcode >> 0) & 7); |
11446 | PRE_IO |
11447 | READ_WORD_F(adr, res) |
11448 | flag_C = 0; |
11449 | flag_V = 0; |
11450 | flag_NotZ = res; |
11451 | flag_N = res >> 8; |
11452 | DREGu16((Opcode >> 9) & 7) = res; |
11453 | POST_IO |
11454 | RET(8) |
11455 | } |
11456 | |
11457 | // MOVEW |
11458 | OPCODE(0x3090) |
11459 | { |
11460 | u32 adr, res; |
11461 | u32 src, dst; |
11462 | |
11463 | adr = AREG((Opcode >> 0) & 7); |
11464 | PRE_IO |
11465 | READ_WORD_F(adr, res) |
11466 | flag_C = 0; |
11467 | flag_V = 0; |
11468 | flag_NotZ = res; |
11469 | flag_N = res >> 8; |
11470 | adr = AREG((Opcode >> 9) & 7); |
11471 | WRITE_WORD_F(adr, res) |
11472 | POST_IO |
11473 | RET(12) |
11474 | } |
11475 | |
11476 | // MOVEW |
11477 | OPCODE(0x30D0) |
11478 | { |
11479 | u32 adr, res; |
11480 | u32 src, dst; |
11481 | |
11482 | adr = AREG((Opcode >> 0) & 7); |
11483 | PRE_IO |
11484 | READ_WORD_F(adr, res) |
11485 | flag_C = 0; |
11486 | flag_V = 0; |
11487 | flag_NotZ = res; |
11488 | flag_N = res >> 8; |
11489 | adr = AREG((Opcode >> 9) & 7); |
11490 | AREG((Opcode >> 9) & 7) += 2; |
11491 | WRITE_WORD_F(adr, res) |
11492 | POST_IO |
11493 | RET(12) |
11494 | } |
11495 | |
11496 | // MOVEW |
11497 | OPCODE(0x3110) |
11498 | { |
11499 | u32 adr, res; |
11500 | u32 src, dst; |
11501 | |
11502 | adr = AREG((Opcode >> 0) & 7); |
11503 | PRE_IO |
11504 | READ_WORD_F(adr, res) |
11505 | flag_C = 0; |
11506 | flag_V = 0; |
11507 | flag_NotZ = res; |
11508 | flag_N = res >> 8; |
11509 | adr = AREG((Opcode >> 9) & 7) - 2; |
11510 | AREG((Opcode >> 9) & 7) = adr; |
11511 | WRITE_WORD_F(adr, res) |
11512 | POST_IO |
11513 | RET(12) |
11514 | } |
11515 | |
11516 | // MOVEW |
11517 | OPCODE(0x3150) |
11518 | { |
11519 | u32 adr, res; |
11520 | u32 src, dst; |
11521 | |
11522 | adr = AREG((Opcode >> 0) & 7); |
11523 | PRE_IO |
11524 | READ_WORD_F(adr, res) |
11525 | flag_C = 0; |
11526 | flag_V = 0; |
11527 | flag_NotZ = res; |
11528 | flag_N = res >> 8; |
11529 | FETCH_SWORD(adr); |
11530 | adr += AREG((Opcode >> 9) & 7); |
11531 | WRITE_WORD_F(adr, res) |
11532 | POST_IO |
11533 | RET(16) |
11534 | } |
11535 | |
11536 | // MOVEW |
11537 | OPCODE(0x3190) |
11538 | { |
11539 | u32 adr, res; |
11540 | u32 src, dst; |
11541 | |
11542 | adr = AREG((Opcode >> 0) & 7); |
11543 | PRE_IO |
11544 | READ_WORD_F(adr, res) |
11545 | flag_C = 0; |
11546 | flag_V = 0; |
11547 | flag_NotZ = res; |
11548 | flag_N = res >> 8; |
11549 | adr = AREG((Opcode >> 9) & 7); |
11550 | DECODE_EXT_WORD |
11551 | WRITE_WORD_F(adr, res) |
11552 | POST_IO |
11553 | RET(18) |
11554 | } |
11555 | |
11556 | // MOVEW |
11557 | OPCODE(0x31D0) |
11558 | { |
11559 | u32 adr, res; |
11560 | u32 src, dst; |
11561 | |
11562 | adr = AREG((Opcode >> 0) & 7); |
11563 | PRE_IO |
11564 | READ_WORD_F(adr, res) |
11565 | flag_C = 0; |
11566 | flag_V = 0; |
11567 | flag_NotZ = res; |
11568 | flag_N = res >> 8; |
11569 | FETCH_SWORD(adr); |
11570 | WRITE_WORD_F(adr, res) |
11571 | POST_IO |
11572 | RET(16) |
11573 | } |
11574 | |
11575 | // MOVEW |
11576 | OPCODE(0x33D0) |
11577 | { |
11578 | u32 adr, res; |
11579 | u32 src, dst; |
11580 | |
11581 | adr = AREG((Opcode >> 0) & 7); |
11582 | PRE_IO |
11583 | READ_WORD_F(adr, res) |
11584 | flag_C = 0; |
11585 | flag_V = 0; |
11586 | flag_NotZ = res; |
11587 | flag_N = res >> 8; |
11588 | FETCH_LONG(adr); |
11589 | WRITE_WORD_F(adr, res) |
11590 | POST_IO |
11591 | RET(20) |
11592 | } |
11593 | |
11594 | // MOVEW |
11595 | OPCODE(0x3ED0) |
11596 | { |
11597 | u32 adr, res; |
11598 | u32 src, dst; |
11599 | |
11600 | adr = AREG((Opcode >> 0) & 7); |
11601 | PRE_IO |
11602 | READ_WORD_F(adr, res) |
11603 | flag_C = 0; |
11604 | flag_V = 0; |
11605 | flag_NotZ = res; |
11606 | flag_N = res >> 8; |
11607 | adr = AREG(7); |
11608 | AREG(7) += 2; |
11609 | WRITE_WORD_F(adr, res) |
11610 | POST_IO |
11611 | RET(12) |
11612 | } |
11613 | |
11614 | // MOVEW |
11615 | OPCODE(0x3F10) |
11616 | { |
11617 | u32 adr, res; |
11618 | u32 src, dst; |
11619 | |
11620 | adr = AREG((Opcode >> 0) & 7); |
11621 | PRE_IO |
11622 | READ_WORD_F(adr, res) |
11623 | flag_C = 0; |
11624 | flag_V = 0; |
11625 | flag_NotZ = res; |
11626 | flag_N = res >> 8; |
11627 | adr = AREG(7) - 2; |
11628 | AREG(7) = adr; |
11629 | WRITE_WORD_F(adr, res) |
11630 | POST_IO |
11631 | RET(12) |
11632 | } |
11633 | |
11634 | // MOVEW |
11635 | OPCODE(0x3018) |
11636 | { |
11637 | u32 adr, res; |
11638 | u32 src, dst; |
11639 | |
11640 | adr = AREG((Opcode >> 0) & 7); |
11641 | AREG((Opcode >> 0) & 7) += 2; |
11642 | PRE_IO |
11643 | READ_WORD_F(adr, res) |
11644 | flag_C = 0; |
11645 | flag_V = 0; |
11646 | flag_NotZ = res; |
11647 | flag_N = res >> 8; |
11648 | DREGu16((Opcode >> 9) & 7) = res; |
11649 | POST_IO |
11650 | RET(8) |
11651 | } |
11652 | |
11653 | // MOVEW |
11654 | OPCODE(0x3098) |
11655 | { |
11656 | u32 adr, res; |
11657 | u32 src, dst; |
11658 | |
11659 | adr = AREG((Opcode >> 0) & 7); |
11660 | AREG((Opcode >> 0) & 7) += 2; |
11661 | PRE_IO |
11662 | READ_WORD_F(adr, res) |
11663 | flag_C = 0; |
11664 | flag_V = 0; |
11665 | flag_NotZ = res; |
11666 | flag_N = res >> 8; |
11667 | adr = AREG((Opcode >> 9) & 7); |
11668 | WRITE_WORD_F(adr, res) |
11669 | POST_IO |
11670 | RET(12) |
11671 | } |
11672 | |
11673 | // MOVEW |
11674 | OPCODE(0x30D8) |
11675 | { |
11676 | u32 adr, res; |
11677 | u32 src, dst; |
11678 | |
11679 | adr = AREG((Opcode >> 0) & 7); |
11680 | AREG((Opcode >> 0) & 7) += 2; |
11681 | PRE_IO |
11682 | READ_WORD_F(adr, res) |
11683 | flag_C = 0; |
11684 | flag_V = 0; |
11685 | flag_NotZ = res; |
11686 | flag_N = res >> 8; |
11687 | adr = AREG((Opcode >> 9) & 7); |
11688 | AREG((Opcode >> 9) & 7) += 2; |
11689 | WRITE_WORD_F(adr, res) |
11690 | POST_IO |
11691 | RET(12) |
11692 | } |
11693 | |
11694 | // MOVEW |
11695 | OPCODE(0x3118) |
11696 | { |
11697 | u32 adr, res; |
11698 | u32 src, dst; |
11699 | |
11700 | adr = AREG((Opcode >> 0) & 7); |
11701 | AREG((Opcode >> 0) & 7) += 2; |
11702 | PRE_IO |
11703 | READ_WORD_F(adr, res) |
11704 | flag_C = 0; |
11705 | flag_V = 0; |
11706 | flag_NotZ = res; |
11707 | flag_N = res >> 8; |
11708 | adr = AREG((Opcode >> 9) & 7) - 2; |
11709 | AREG((Opcode >> 9) & 7) = adr; |
11710 | WRITE_WORD_F(adr, res) |
11711 | POST_IO |
11712 | RET(12) |
11713 | } |
11714 | |
11715 | // MOVEW |
11716 | OPCODE(0x3158) |
11717 | { |
11718 | u32 adr, res; |
11719 | u32 src, dst; |
11720 | |
11721 | adr = AREG((Opcode >> 0) & 7); |
11722 | AREG((Opcode >> 0) & 7) += 2; |
11723 | PRE_IO |
11724 | READ_WORD_F(adr, res) |
11725 | flag_C = 0; |
11726 | flag_V = 0; |
11727 | flag_NotZ = res; |
11728 | flag_N = res >> 8; |
11729 | FETCH_SWORD(adr); |
11730 | adr += AREG((Opcode >> 9) & 7); |
11731 | WRITE_WORD_F(adr, res) |
11732 | POST_IO |
11733 | RET(16) |
11734 | } |
11735 | |
11736 | // MOVEW |
11737 | OPCODE(0x3198) |
11738 | { |
11739 | u32 adr, res; |
11740 | u32 src, dst; |
11741 | |
11742 | adr = AREG((Opcode >> 0) & 7); |
11743 | AREG((Opcode >> 0) & 7) += 2; |
11744 | PRE_IO |
11745 | READ_WORD_F(adr, res) |
11746 | flag_C = 0; |
11747 | flag_V = 0; |
11748 | flag_NotZ = res; |
11749 | flag_N = res >> 8; |
11750 | adr = AREG((Opcode >> 9) & 7); |
11751 | DECODE_EXT_WORD |
11752 | WRITE_WORD_F(adr, res) |
11753 | POST_IO |
11754 | RET(18) |
11755 | } |
11756 | |
11757 | // MOVEW |
11758 | OPCODE(0x31D8) |
11759 | { |
11760 | u32 adr, res; |
11761 | u32 src, dst; |
11762 | |
11763 | adr = AREG((Opcode >> 0) & 7); |
11764 | AREG((Opcode >> 0) & 7) += 2; |
11765 | PRE_IO |
11766 | READ_WORD_F(adr, res) |
11767 | flag_C = 0; |
11768 | flag_V = 0; |
11769 | flag_NotZ = res; |
11770 | flag_N = res >> 8; |
11771 | FETCH_SWORD(adr); |
11772 | WRITE_WORD_F(adr, res) |
11773 | POST_IO |
11774 | RET(16) |
11775 | } |
11776 | |
11777 | // MOVEW |
11778 | OPCODE(0x33D8) |
11779 | { |
11780 | u32 adr, res; |
11781 | u32 src, dst; |
11782 | |
11783 | adr = AREG((Opcode >> 0) & 7); |
11784 | AREG((Opcode >> 0) & 7) += 2; |
11785 | PRE_IO |
11786 | READ_WORD_F(adr, res) |
11787 | flag_C = 0; |
11788 | flag_V = 0; |
11789 | flag_NotZ = res; |
11790 | flag_N = res >> 8; |
11791 | FETCH_LONG(adr); |
11792 | WRITE_WORD_F(adr, res) |
11793 | POST_IO |
11794 | RET(20) |
11795 | } |
11796 | |
11797 | // MOVEW |
11798 | OPCODE(0x3ED8) |
11799 | { |
11800 | u32 adr, res; |
11801 | u32 src, dst; |
11802 | |
11803 | adr = AREG((Opcode >> 0) & 7); |
11804 | AREG((Opcode >> 0) & 7) += 2; |
11805 | PRE_IO |
11806 | READ_WORD_F(adr, res) |
11807 | flag_C = 0; |
11808 | flag_V = 0; |
11809 | flag_NotZ = res; |
11810 | flag_N = res >> 8; |
11811 | adr = AREG(7); |
11812 | AREG(7) += 2; |
11813 | WRITE_WORD_F(adr, res) |
11814 | POST_IO |
11815 | RET(12) |
11816 | } |
11817 | |
11818 | // MOVEW |
11819 | OPCODE(0x3F18) |
11820 | { |
11821 | u32 adr, res; |
11822 | u32 src, dst; |
11823 | |
11824 | adr = AREG((Opcode >> 0) & 7); |
11825 | AREG((Opcode >> 0) & 7) += 2; |
11826 | PRE_IO |
11827 | READ_WORD_F(adr, res) |
11828 | flag_C = 0; |
11829 | flag_V = 0; |
11830 | flag_NotZ = res; |
11831 | flag_N = res >> 8; |
11832 | adr = AREG(7) - 2; |
11833 | AREG(7) = adr; |
11834 | WRITE_WORD_F(adr, res) |
11835 | POST_IO |
11836 | RET(12) |
11837 | } |
11838 | |
11839 | // MOVEW |
11840 | OPCODE(0x3020) |
11841 | { |
11842 | u32 adr, res; |
11843 | u32 src, dst; |
11844 | |
11845 | adr = AREG((Opcode >> 0) & 7) - 2; |
11846 | AREG((Opcode >> 0) & 7) = adr; |
11847 | PRE_IO |
11848 | READ_WORD_F(adr, res) |
11849 | flag_C = 0; |
11850 | flag_V = 0; |
11851 | flag_NotZ = res; |
11852 | flag_N = res >> 8; |
11853 | DREGu16((Opcode >> 9) & 7) = res; |
11854 | POST_IO |
11855 | RET(10) |
11856 | } |
11857 | |
11858 | // MOVEW |
11859 | OPCODE(0x30A0) |
11860 | { |
11861 | u32 adr, res; |
11862 | u32 src, dst; |
11863 | |
11864 | adr = AREG((Opcode >> 0) & 7) - 2; |
11865 | AREG((Opcode >> 0) & 7) = adr; |
11866 | PRE_IO |
11867 | READ_WORD_F(adr, res) |
11868 | flag_C = 0; |
11869 | flag_V = 0; |
11870 | flag_NotZ = res; |
11871 | flag_N = res >> 8; |
11872 | adr = AREG((Opcode >> 9) & 7); |
11873 | WRITE_WORD_F(adr, res) |
11874 | POST_IO |
11875 | RET(14) |
11876 | } |
11877 | |
11878 | // MOVEW |
11879 | OPCODE(0x30E0) |
11880 | { |
11881 | u32 adr, res; |
11882 | u32 src, dst; |
11883 | |
11884 | adr = AREG((Opcode >> 0) & 7) - 2; |
11885 | AREG((Opcode >> 0) & 7) = adr; |
11886 | PRE_IO |
11887 | READ_WORD_F(adr, res) |
11888 | flag_C = 0; |
11889 | flag_V = 0; |
11890 | flag_NotZ = res; |
11891 | flag_N = res >> 8; |
11892 | adr = AREG((Opcode >> 9) & 7); |
11893 | AREG((Opcode >> 9) & 7) += 2; |
11894 | WRITE_WORD_F(adr, res) |
11895 | POST_IO |
11896 | RET(14) |
11897 | } |
11898 | |
11899 | // MOVEW |
11900 | OPCODE(0x3120) |
11901 | { |
11902 | u32 adr, res; |
11903 | u32 src, dst; |
11904 | |
11905 | adr = AREG((Opcode >> 0) & 7) - 2; |
11906 | AREG((Opcode >> 0) & 7) = adr; |
11907 | PRE_IO |
11908 | READ_WORD_F(adr, res) |
11909 | flag_C = 0; |
11910 | flag_V = 0; |
11911 | flag_NotZ = res; |
11912 | flag_N = res >> 8; |
11913 | adr = AREG((Opcode >> 9) & 7) - 2; |
11914 | AREG((Opcode >> 9) & 7) = adr; |
11915 | WRITE_WORD_F(adr, res) |
11916 | POST_IO |
11917 | RET(14) |
11918 | } |
11919 | |
11920 | // MOVEW |
11921 | OPCODE(0x3160) |
11922 | { |
11923 | u32 adr, res; |
11924 | u32 src, dst; |
11925 | |
11926 | adr = AREG((Opcode >> 0) & 7) - 2; |
11927 | AREG((Opcode >> 0) & 7) = adr; |
11928 | PRE_IO |
11929 | READ_WORD_F(adr, res) |
11930 | flag_C = 0; |
11931 | flag_V = 0; |
11932 | flag_NotZ = res; |
11933 | flag_N = res >> 8; |
11934 | FETCH_SWORD(adr); |
11935 | adr += AREG((Opcode >> 9) & 7); |
11936 | WRITE_WORD_F(adr, res) |
11937 | POST_IO |
11938 | RET(18) |
11939 | } |
11940 | |
11941 | // MOVEW |
11942 | OPCODE(0x31A0) |
11943 | { |
11944 | u32 adr, res; |
11945 | u32 src, dst; |
11946 | |
11947 | adr = AREG((Opcode >> 0) & 7) - 2; |
11948 | AREG((Opcode >> 0) & 7) = adr; |
11949 | PRE_IO |
11950 | READ_WORD_F(adr, res) |
11951 | flag_C = 0; |
11952 | flag_V = 0; |
11953 | flag_NotZ = res; |
11954 | flag_N = res >> 8; |
11955 | adr = AREG((Opcode >> 9) & 7); |
11956 | DECODE_EXT_WORD |
11957 | WRITE_WORD_F(adr, res) |
11958 | POST_IO |
11959 | RET(20) |
11960 | } |
11961 | |
11962 | // MOVEW |
11963 | OPCODE(0x31E0) |
11964 | { |
11965 | u32 adr, res; |
11966 | u32 src, dst; |
11967 | |
11968 | adr = AREG((Opcode >> 0) & 7) - 2; |
11969 | AREG((Opcode >> 0) & 7) = adr; |
11970 | PRE_IO |
11971 | READ_WORD_F(adr, res) |
11972 | flag_C = 0; |
11973 | flag_V = 0; |
11974 | flag_NotZ = res; |
11975 | flag_N = res >> 8; |
11976 | FETCH_SWORD(adr); |
11977 | WRITE_WORD_F(adr, res) |
11978 | POST_IO |
11979 | RET(18) |
11980 | } |
11981 | |
11982 | // MOVEW |
11983 | OPCODE(0x33E0) |
11984 | { |
11985 | u32 adr, res; |
11986 | u32 src, dst; |
11987 | |
11988 | adr = AREG((Opcode >> 0) & 7) - 2; |
11989 | AREG((Opcode >> 0) & 7) = adr; |
11990 | PRE_IO |
11991 | READ_WORD_F(adr, res) |
11992 | flag_C = 0; |
11993 | flag_V = 0; |
11994 | flag_NotZ = res; |
11995 | flag_N = res >> 8; |
11996 | FETCH_LONG(adr); |
11997 | WRITE_WORD_F(adr, res) |
11998 | POST_IO |
11999 | RET(22) |
12000 | } |
12001 | |
12002 | // MOVEW |
12003 | OPCODE(0x3EE0) |
12004 | { |
12005 | u32 adr, res; |
12006 | u32 src, dst; |
12007 | |
12008 | adr = AREG((Opcode >> 0) & 7) - 2; |
12009 | AREG((Opcode >> 0) & 7) = adr; |
12010 | PRE_IO |
12011 | READ_WORD_F(adr, res) |
12012 | flag_C = 0; |
12013 | flag_V = 0; |
12014 | flag_NotZ = res; |
12015 | flag_N = res >> 8; |
12016 | adr = AREG(7); |
12017 | AREG(7) += 2; |
12018 | WRITE_WORD_F(adr, res) |
12019 | POST_IO |
12020 | RET(14) |
12021 | } |
12022 | |
12023 | // MOVEW |
12024 | OPCODE(0x3F20) |
12025 | { |
12026 | u32 adr, res; |
12027 | u32 src, dst; |
12028 | |
12029 | adr = AREG((Opcode >> 0) & 7) - 2; |
12030 | AREG((Opcode >> 0) & 7) = adr; |
12031 | PRE_IO |
12032 | READ_WORD_F(adr, res) |
12033 | flag_C = 0; |
12034 | flag_V = 0; |
12035 | flag_NotZ = res; |
12036 | flag_N = res >> 8; |
12037 | adr = AREG(7) - 2; |
12038 | AREG(7) = adr; |
12039 | WRITE_WORD_F(adr, res) |
12040 | POST_IO |
12041 | RET(14) |
12042 | } |
12043 | |
12044 | // MOVEW |
12045 | OPCODE(0x3028) |
12046 | { |
12047 | u32 adr, res; |
12048 | u32 src, dst; |
12049 | |
12050 | FETCH_SWORD(adr); |
12051 | adr += AREG((Opcode >> 0) & 7); |
12052 | PRE_IO |
12053 | READ_WORD_F(adr, res) |
12054 | flag_C = 0; |
12055 | flag_V = 0; |
12056 | flag_NotZ = res; |
12057 | flag_N = res >> 8; |
12058 | DREGu16((Opcode >> 9) & 7) = res; |
12059 | POST_IO |
12060 | RET(12) |
12061 | } |
12062 | |
12063 | // MOVEW |
12064 | OPCODE(0x30A8) |
12065 | { |
12066 | u32 adr, res; |
12067 | u32 src, dst; |
12068 | |
12069 | FETCH_SWORD(adr); |
12070 | adr += AREG((Opcode >> 0) & 7); |
12071 | PRE_IO |
12072 | READ_WORD_F(adr, res) |
12073 | flag_C = 0; |
12074 | flag_V = 0; |
12075 | flag_NotZ = res; |
12076 | flag_N = res >> 8; |
12077 | adr = AREG((Opcode >> 9) & 7); |
12078 | WRITE_WORD_F(adr, res) |
12079 | POST_IO |
12080 | RET(16) |
12081 | } |
12082 | |
12083 | // MOVEW |
12084 | OPCODE(0x30E8) |
12085 | { |
12086 | u32 adr, res; |
12087 | u32 src, dst; |
12088 | |
12089 | FETCH_SWORD(adr); |
12090 | adr += AREG((Opcode >> 0) & 7); |
12091 | PRE_IO |
12092 | READ_WORD_F(adr, res) |
12093 | flag_C = 0; |
12094 | flag_V = 0; |
12095 | flag_NotZ = res; |
12096 | flag_N = res >> 8; |
12097 | adr = AREG((Opcode >> 9) & 7); |
12098 | AREG((Opcode >> 9) & 7) += 2; |
12099 | WRITE_WORD_F(adr, res) |
12100 | POST_IO |
12101 | RET(16) |
12102 | } |
12103 | |
12104 | // MOVEW |
12105 | OPCODE(0x3128) |
12106 | { |
12107 | u32 adr, res; |
12108 | u32 src, dst; |
12109 | |
12110 | FETCH_SWORD(adr); |
12111 | adr += AREG((Opcode >> 0) & 7); |
12112 | PRE_IO |
12113 | READ_WORD_F(adr, res) |
12114 | flag_C = 0; |
12115 | flag_V = 0; |
12116 | flag_NotZ = res; |
12117 | flag_N = res >> 8; |
12118 | adr = AREG((Opcode >> 9) & 7) - 2; |
12119 | AREG((Opcode >> 9) & 7) = adr; |
12120 | WRITE_WORD_F(adr, res) |
12121 | POST_IO |
12122 | RET(16) |
12123 | } |
12124 | |
12125 | // MOVEW |
12126 | OPCODE(0x3168) |
12127 | { |
12128 | u32 adr, res; |
12129 | u32 src, dst; |
12130 | |
12131 | FETCH_SWORD(adr); |
12132 | adr += AREG((Opcode >> 0) & 7); |
12133 | PRE_IO |
12134 | READ_WORD_F(adr, res) |
12135 | flag_C = 0; |
12136 | flag_V = 0; |
12137 | flag_NotZ = res; |
12138 | flag_N = res >> 8; |
12139 | FETCH_SWORD(adr); |
12140 | adr += AREG((Opcode >> 9) & 7); |
12141 | WRITE_WORD_F(adr, res) |
12142 | POST_IO |
12143 | RET(20) |
12144 | } |
12145 | |
12146 | // MOVEW |
12147 | OPCODE(0x31A8) |
12148 | { |
12149 | u32 adr, res; |
12150 | u32 src, dst; |
12151 | |
12152 | FETCH_SWORD(adr); |
12153 | adr += AREG((Opcode >> 0) & 7); |
12154 | PRE_IO |
12155 | READ_WORD_F(adr, res) |
12156 | flag_C = 0; |
12157 | flag_V = 0; |
12158 | flag_NotZ = res; |
12159 | flag_N = res >> 8; |
12160 | adr = AREG((Opcode >> 9) & 7); |
12161 | DECODE_EXT_WORD |
12162 | WRITE_WORD_F(adr, res) |
12163 | POST_IO |
12164 | RET(22) |
12165 | } |
12166 | |
12167 | // MOVEW |
12168 | OPCODE(0x31E8) |
12169 | { |
12170 | u32 adr, res; |
12171 | u32 src, dst; |
12172 | |
12173 | FETCH_SWORD(adr); |
12174 | adr += AREG((Opcode >> 0) & 7); |
12175 | PRE_IO |
12176 | READ_WORD_F(adr, res) |
12177 | flag_C = 0; |
12178 | flag_V = 0; |
12179 | flag_NotZ = res; |
12180 | flag_N = res >> 8; |
12181 | FETCH_SWORD(adr); |
12182 | WRITE_WORD_F(adr, res) |
12183 | POST_IO |
12184 | RET(20) |
12185 | } |
12186 | |
12187 | // MOVEW |
12188 | OPCODE(0x33E8) |
12189 | { |
12190 | u32 adr, res; |
12191 | u32 src, dst; |
12192 | |
12193 | FETCH_SWORD(adr); |
12194 | adr += AREG((Opcode >> 0) & 7); |
12195 | PRE_IO |
12196 | READ_WORD_F(adr, res) |
12197 | flag_C = 0; |
12198 | flag_V = 0; |
12199 | flag_NotZ = res; |
12200 | flag_N = res >> 8; |
12201 | FETCH_LONG(adr); |
12202 | WRITE_WORD_F(adr, res) |
12203 | POST_IO |
12204 | RET(24) |
12205 | } |
12206 | |
12207 | // MOVEW |
12208 | OPCODE(0x3EE8) |
12209 | { |
12210 | u32 adr, res; |
12211 | u32 src, dst; |
12212 | |
12213 | FETCH_SWORD(adr); |
12214 | adr += AREG((Opcode >> 0) & 7); |
12215 | PRE_IO |
12216 | READ_WORD_F(adr, res) |
12217 | flag_C = 0; |
12218 | flag_V = 0; |
12219 | flag_NotZ = res; |
12220 | flag_N = res >> 8; |
12221 | adr = AREG(7); |
12222 | AREG(7) += 2; |
12223 | WRITE_WORD_F(adr, res) |
12224 | POST_IO |
12225 | RET(16) |
12226 | } |
12227 | |
12228 | // MOVEW |
12229 | OPCODE(0x3F28) |
12230 | { |
12231 | u32 adr, res; |
12232 | u32 src, dst; |
12233 | |
12234 | FETCH_SWORD(adr); |
12235 | adr += AREG((Opcode >> 0) & 7); |
12236 | PRE_IO |
12237 | READ_WORD_F(adr, res) |
12238 | flag_C = 0; |
12239 | flag_V = 0; |
12240 | flag_NotZ = res; |
12241 | flag_N = res >> 8; |
12242 | adr = AREG(7) - 2; |
12243 | AREG(7) = adr; |
12244 | WRITE_WORD_F(adr, res) |
12245 | POST_IO |
12246 | RET(16) |
12247 | } |
12248 | |
12249 | // MOVEW |
12250 | OPCODE(0x3030) |
12251 | { |
12252 | u32 adr, res; |
12253 | u32 src, dst; |
12254 | |
12255 | adr = AREG((Opcode >> 0) & 7); |
12256 | DECODE_EXT_WORD |
12257 | PRE_IO |
12258 | READ_WORD_F(adr, res) |
12259 | flag_C = 0; |
12260 | flag_V = 0; |
12261 | flag_NotZ = res; |
12262 | flag_N = res >> 8; |
12263 | DREGu16((Opcode >> 9) & 7) = res; |
12264 | POST_IO |
12265 | RET(14) |
12266 | } |
12267 | |
12268 | // MOVEW |
12269 | OPCODE(0x30B0) |
12270 | { |
12271 | u32 adr, res; |
12272 | u32 src, dst; |
12273 | |
12274 | adr = AREG((Opcode >> 0) & 7); |
12275 | DECODE_EXT_WORD |
12276 | PRE_IO |
12277 | READ_WORD_F(adr, res) |
12278 | flag_C = 0; |
12279 | flag_V = 0; |
12280 | flag_NotZ = res; |
12281 | flag_N = res >> 8; |
12282 | adr = AREG((Opcode >> 9) & 7); |
12283 | WRITE_WORD_F(adr, res) |
12284 | POST_IO |
12285 | RET(18) |
12286 | } |
12287 | |
12288 | // MOVEW |
12289 | OPCODE(0x30F0) |
12290 | { |
12291 | u32 adr, res; |
12292 | u32 src, dst; |
12293 | |
12294 | adr = AREG((Opcode >> 0) & 7); |
12295 | DECODE_EXT_WORD |
12296 | PRE_IO |
12297 | READ_WORD_F(adr, res) |
12298 | flag_C = 0; |
12299 | flag_V = 0; |
12300 | flag_NotZ = res; |
12301 | flag_N = res >> 8; |
12302 | adr = AREG((Opcode >> 9) & 7); |
12303 | AREG((Opcode >> 9) & 7) += 2; |
12304 | WRITE_WORD_F(adr, res) |
12305 | POST_IO |
12306 | RET(18) |
12307 | } |
12308 | |
12309 | // MOVEW |
12310 | OPCODE(0x3130) |
12311 | { |
12312 | u32 adr, res; |
12313 | u32 src, dst; |
12314 | |
12315 | adr = AREG((Opcode >> 0) & 7); |
12316 | DECODE_EXT_WORD |
12317 | PRE_IO |
12318 | READ_WORD_F(adr, res) |
12319 | flag_C = 0; |
12320 | flag_V = 0; |
12321 | flag_NotZ = res; |
12322 | flag_N = res >> 8; |
12323 | adr = AREG((Opcode >> 9) & 7) - 2; |
12324 | AREG((Opcode >> 9) & 7) = adr; |
12325 | WRITE_WORD_F(adr, res) |
12326 | POST_IO |
12327 | RET(18) |
12328 | } |
12329 | |
12330 | // MOVEW |
12331 | OPCODE(0x3170) |
12332 | { |
12333 | u32 adr, res; |
12334 | u32 src, dst; |
12335 | |
12336 | adr = AREG((Opcode >> 0) & 7); |
12337 | DECODE_EXT_WORD |
12338 | PRE_IO |
12339 | READ_WORD_F(adr, res) |
12340 | flag_C = 0; |
12341 | flag_V = 0; |
12342 | flag_NotZ = res; |
12343 | flag_N = res >> 8; |
12344 | FETCH_SWORD(adr); |
12345 | adr += AREG((Opcode >> 9) & 7); |
12346 | WRITE_WORD_F(adr, res) |
12347 | POST_IO |
12348 | RET(22) |
12349 | } |
12350 | |
12351 | // MOVEW |
12352 | OPCODE(0x31B0) |
12353 | { |
12354 | u32 adr, res; |
12355 | u32 src, dst; |
12356 | |
12357 | adr = AREG((Opcode >> 0) & 7); |
12358 | DECODE_EXT_WORD |
12359 | PRE_IO |
12360 | READ_WORD_F(adr, res) |
12361 | flag_C = 0; |
12362 | flag_V = 0; |
12363 | flag_NotZ = res; |
12364 | flag_N = res >> 8; |
12365 | adr = AREG((Opcode >> 9) & 7); |
12366 | DECODE_EXT_WORD |
12367 | WRITE_WORD_F(adr, res) |
12368 | POST_IO |
12369 | RET(24) |
12370 | } |
12371 | |
12372 | // MOVEW |
12373 | OPCODE(0x31F0) |
12374 | { |
12375 | u32 adr, res; |
12376 | u32 src, dst; |
12377 | |
12378 | adr = AREG((Opcode >> 0) & 7); |
12379 | DECODE_EXT_WORD |
12380 | PRE_IO |
12381 | READ_WORD_F(adr, res) |
12382 | flag_C = 0; |
12383 | flag_V = 0; |
12384 | flag_NotZ = res; |
12385 | flag_N = res >> 8; |
12386 | FETCH_SWORD(adr); |
12387 | WRITE_WORD_F(adr, res) |
12388 | POST_IO |
12389 | RET(22) |
12390 | } |
12391 | |
12392 | // MOVEW |
12393 | OPCODE(0x33F0) |
12394 | { |
12395 | u32 adr, res; |
12396 | u32 src, dst; |
12397 | |
12398 | adr = AREG((Opcode >> 0) & 7); |
12399 | DECODE_EXT_WORD |
12400 | PRE_IO |
12401 | READ_WORD_F(adr, res) |
12402 | flag_C = 0; |
12403 | flag_V = 0; |
12404 | flag_NotZ = res; |
12405 | flag_N = res >> 8; |
12406 | FETCH_LONG(adr); |
12407 | WRITE_WORD_F(adr, res) |
12408 | POST_IO |
12409 | RET(26) |
12410 | } |
12411 | |
12412 | // MOVEW |
12413 | OPCODE(0x3EF0) |
12414 | { |
12415 | u32 adr, res; |
12416 | u32 src, dst; |
12417 | |
12418 | adr = AREG((Opcode >> 0) & 7); |
12419 | DECODE_EXT_WORD |
12420 | PRE_IO |
12421 | READ_WORD_F(adr, res) |
12422 | flag_C = 0; |
12423 | flag_V = 0; |
12424 | flag_NotZ = res; |
12425 | flag_N = res >> 8; |
12426 | adr = AREG(7); |
12427 | AREG(7) += 2; |
12428 | WRITE_WORD_F(adr, res) |
12429 | POST_IO |
12430 | RET(18) |
12431 | } |
12432 | |
12433 | // MOVEW |
12434 | OPCODE(0x3F30) |
12435 | { |
12436 | u32 adr, res; |
12437 | u32 src, dst; |
12438 | |
12439 | adr = AREG((Opcode >> 0) & 7); |
12440 | DECODE_EXT_WORD |
12441 | PRE_IO |
12442 | READ_WORD_F(adr, res) |
12443 | flag_C = 0; |
12444 | flag_V = 0; |
12445 | flag_NotZ = res; |
12446 | flag_N = res >> 8; |
12447 | adr = AREG(7) - 2; |
12448 | AREG(7) = adr; |
12449 | WRITE_WORD_F(adr, res) |
12450 | POST_IO |
12451 | RET(18) |
12452 | } |
12453 | |
12454 | // MOVEW |
12455 | OPCODE(0x3038) |
12456 | { |
12457 | u32 adr, res; |
12458 | u32 src, dst; |
12459 | |
12460 | FETCH_SWORD(adr); |
12461 | PRE_IO |
12462 | READ_WORD_F(adr, res) |
12463 | flag_C = 0; |
12464 | flag_V = 0; |
12465 | flag_NotZ = res; |
12466 | flag_N = res >> 8; |
12467 | DREGu16((Opcode >> 9) & 7) = res; |
12468 | POST_IO |
12469 | RET(12) |
12470 | } |
12471 | |
12472 | // MOVEW |
12473 | OPCODE(0x30B8) |
12474 | { |
12475 | u32 adr, res; |
12476 | u32 src, dst; |
12477 | |
12478 | FETCH_SWORD(adr); |
12479 | PRE_IO |
12480 | READ_WORD_F(adr, res) |
12481 | flag_C = 0; |
12482 | flag_V = 0; |
12483 | flag_NotZ = res; |
12484 | flag_N = res >> 8; |
12485 | adr = AREG((Opcode >> 9) & 7); |
12486 | WRITE_WORD_F(adr, res) |
12487 | POST_IO |
12488 | RET(16) |
12489 | } |
12490 | |
12491 | // MOVEW |
12492 | OPCODE(0x30F8) |
12493 | { |
12494 | u32 adr, res; |
12495 | u32 src, dst; |
12496 | |
12497 | FETCH_SWORD(adr); |
12498 | PRE_IO |
12499 | READ_WORD_F(adr, res) |
12500 | flag_C = 0; |
12501 | flag_V = 0; |
12502 | flag_NotZ = res; |
12503 | flag_N = res >> 8; |
12504 | adr = AREG((Opcode >> 9) & 7); |
12505 | AREG((Opcode >> 9) & 7) += 2; |
12506 | WRITE_WORD_F(adr, res) |
12507 | POST_IO |
12508 | RET(16) |
12509 | } |
12510 | |
12511 | // MOVEW |
12512 | OPCODE(0x3138) |
12513 | { |
12514 | u32 adr, res; |
12515 | u32 src, dst; |
12516 | |
12517 | FETCH_SWORD(adr); |
12518 | PRE_IO |
12519 | READ_WORD_F(adr, res) |
12520 | flag_C = 0; |
12521 | flag_V = 0; |
12522 | flag_NotZ = res; |
12523 | flag_N = res >> 8; |
12524 | adr = AREG((Opcode >> 9) & 7) - 2; |
12525 | AREG((Opcode >> 9) & 7) = adr; |
12526 | WRITE_WORD_F(adr, res) |
12527 | POST_IO |
12528 | RET(16) |
12529 | } |
12530 | |
12531 | // MOVEW |
12532 | OPCODE(0x3178) |
12533 | { |
12534 | u32 adr, res; |
12535 | u32 src, dst; |
12536 | |
12537 | FETCH_SWORD(adr); |
12538 | PRE_IO |
12539 | READ_WORD_F(adr, res) |
12540 | flag_C = 0; |
12541 | flag_V = 0; |
12542 | flag_NotZ = res; |
12543 | flag_N = res >> 8; |
12544 | FETCH_SWORD(adr); |
12545 | adr += AREG((Opcode >> 9) & 7); |
12546 | WRITE_WORD_F(adr, res) |
12547 | POST_IO |
12548 | RET(20) |
12549 | } |
12550 | |
12551 | // MOVEW |
12552 | OPCODE(0x31B8) |
12553 | { |
12554 | u32 adr, res; |
12555 | u32 src, dst; |
12556 | |
12557 | FETCH_SWORD(adr); |
12558 | PRE_IO |
12559 | READ_WORD_F(adr, res) |
12560 | flag_C = 0; |
12561 | flag_V = 0; |
12562 | flag_NotZ = res; |
12563 | flag_N = res >> 8; |
12564 | adr = AREG((Opcode >> 9) & 7); |
12565 | DECODE_EXT_WORD |
12566 | WRITE_WORD_F(adr, res) |
12567 | POST_IO |
12568 | RET(22) |
12569 | } |
12570 | |
12571 | // MOVEW |
12572 | OPCODE(0x31F8) |
12573 | { |
12574 | u32 adr, res; |
12575 | u32 src, dst; |
12576 | |
12577 | FETCH_SWORD(adr); |
12578 | PRE_IO |
12579 | READ_WORD_F(adr, res) |
12580 | flag_C = 0; |
12581 | flag_V = 0; |
12582 | flag_NotZ = res; |
12583 | flag_N = res >> 8; |
12584 | FETCH_SWORD(adr); |
12585 | WRITE_WORD_F(adr, res) |
12586 | POST_IO |
12587 | RET(20) |
12588 | } |
12589 | |
12590 | // MOVEW |
12591 | OPCODE(0x33F8) |
12592 | { |
12593 | u32 adr, res; |
12594 | u32 src, dst; |
12595 | |
12596 | FETCH_SWORD(adr); |
12597 | PRE_IO |
12598 | READ_WORD_F(adr, res) |
12599 | flag_C = 0; |
12600 | flag_V = 0; |
12601 | flag_NotZ = res; |
12602 | flag_N = res >> 8; |
12603 | FETCH_LONG(adr); |
12604 | WRITE_WORD_F(adr, res) |
12605 | POST_IO |
12606 | RET(24) |
12607 | } |
12608 | |
12609 | // MOVEW |
12610 | OPCODE(0x3EF8) |
12611 | { |
12612 | u32 adr, res; |
12613 | u32 src, dst; |
12614 | |
12615 | FETCH_SWORD(adr); |
12616 | PRE_IO |
12617 | READ_WORD_F(adr, res) |
12618 | flag_C = 0; |
12619 | flag_V = 0; |
12620 | flag_NotZ = res; |
12621 | flag_N = res >> 8; |
12622 | adr = AREG(7); |
12623 | AREG(7) += 2; |
12624 | WRITE_WORD_F(adr, res) |
12625 | POST_IO |
12626 | RET(16) |
12627 | } |
12628 | |
12629 | // MOVEW |
12630 | OPCODE(0x3F38) |
12631 | { |
12632 | u32 adr, res; |
12633 | u32 src, dst; |
12634 | |
12635 | FETCH_SWORD(adr); |
12636 | PRE_IO |
12637 | READ_WORD_F(adr, res) |
12638 | flag_C = 0; |
12639 | flag_V = 0; |
12640 | flag_NotZ = res; |
12641 | flag_N = res >> 8; |
12642 | adr = AREG(7) - 2; |
12643 | AREG(7) = adr; |
12644 | WRITE_WORD_F(adr, res) |
12645 | POST_IO |
12646 | RET(16) |
12647 | } |
12648 | |
12649 | // MOVEW |
12650 | OPCODE(0x3039) |
12651 | { |
12652 | u32 adr, res; |
12653 | u32 src, dst; |
12654 | |
12655 | FETCH_LONG(adr); |
12656 | PRE_IO |
12657 | READ_WORD_F(adr, res) |
12658 | flag_C = 0; |
12659 | flag_V = 0; |
12660 | flag_NotZ = res; |
12661 | flag_N = res >> 8; |
12662 | DREGu16((Opcode >> 9) & 7) = res; |
12663 | POST_IO |
12664 | RET(16) |
12665 | } |
12666 | |
12667 | // MOVEW |
12668 | OPCODE(0x30B9) |
12669 | { |
12670 | u32 adr, res; |
12671 | u32 src, dst; |
12672 | |
12673 | FETCH_LONG(adr); |
12674 | PRE_IO |
12675 | READ_WORD_F(adr, res) |
12676 | flag_C = 0; |
12677 | flag_V = 0; |
12678 | flag_NotZ = res; |
12679 | flag_N = res >> 8; |
12680 | adr = AREG((Opcode >> 9) & 7); |
12681 | WRITE_WORD_F(adr, res) |
12682 | POST_IO |
12683 | RET(20) |
12684 | } |
12685 | |
12686 | // MOVEW |
12687 | OPCODE(0x30F9) |
12688 | { |
12689 | u32 adr, res; |
12690 | u32 src, dst; |
12691 | |
12692 | FETCH_LONG(adr); |
12693 | PRE_IO |
12694 | READ_WORD_F(adr, res) |
12695 | flag_C = 0; |
12696 | flag_V = 0; |
12697 | flag_NotZ = res; |
12698 | flag_N = res >> 8; |
12699 | adr = AREG((Opcode >> 9) & 7); |
12700 | AREG((Opcode >> 9) & 7) += 2; |
12701 | WRITE_WORD_F(adr, res) |
12702 | POST_IO |
12703 | RET(20) |
12704 | } |
12705 | |
12706 | // MOVEW |
12707 | OPCODE(0x3139) |
12708 | { |
12709 | u32 adr, res; |
12710 | u32 src, dst; |
12711 | |
12712 | FETCH_LONG(adr); |
12713 | PRE_IO |
12714 | READ_WORD_F(adr, res) |
12715 | flag_C = 0; |
12716 | flag_V = 0; |
12717 | flag_NotZ = res; |
12718 | flag_N = res >> 8; |
12719 | adr = AREG((Opcode >> 9) & 7) - 2; |
12720 | AREG((Opcode >> 9) & 7) = adr; |
12721 | WRITE_WORD_F(adr, res) |
12722 | POST_IO |
12723 | RET(20) |
12724 | } |
12725 | |
12726 | // MOVEW |
12727 | OPCODE(0x3179) |
12728 | { |
12729 | u32 adr, res; |
12730 | u32 src, dst; |
12731 | |
12732 | FETCH_LONG(adr); |
12733 | PRE_IO |
12734 | READ_WORD_F(adr, res) |
12735 | flag_C = 0; |
12736 | flag_V = 0; |
12737 | flag_NotZ = res; |
12738 | flag_N = res >> 8; |
12739 | FETCH_SWORD(adr); |
12740 | adr += AREG((Opcode >> 9) & 7); |
12741 | WRITE_WORD_F(adr, res) |
12742 | POST_IO |
12743 | RET(24) |
12744 | } |
12745 | |
12746 | // MOVEW |
12747 | OPCODE(0x31B9) |
12748 | { |
12749 | u32 adr, res; |
12750 | u32 src, dst; |
12751 | |
12752 | FETCH_LONG(adr); |
12753 | PRE_IO |
12754 | READ_WORD_F(adr, res) |
12755 | flag_C = 0; |
12756 | flag_V = 0; |
12757 | flag_NotZ = res; |
12758 | flag_N = res >> 8; |
12759 | adr = AREG((Opcode >> 9) & 7); |
12760 | DECODE_EXT_WORD |
12761 | WRITE_WORD_F(adr, res) |
12762 | POST_IO |
12763 | RET(26) |
12764 | } |
12765 | |
12766 | // MOVEW |
12767 | OPCODE(0x31F9) |
12768 | { |
12769 | u32 adr, res; |
12770 | u32 src, dst; |
12771 | |
12772 | FETCH_LONG(adr); |
12773 | PRE_IO |
12774 | READ_WORD_F(adr, res) |
12775 | flag_C = 0; |
12776 | flag_V = 0; |
12777 | flag_NotZ = res; |
12778 | flag_N = res >> 8; |
12779 | FETCH_SWORD(adr); |
12780 | WRITE_WORD_F(adr, res) |
12781 | POST_IO |
12782 | RET(24) |
12783 | } |
12784 | |
12785 | // MOVEW |
12786 | OPCODE(0x33F9) |
12787 | { |
12788 | u32 adr, res; |
12789 | u32 src, dst; |
12790 | |
12791 | FETCH_LONG(adr); |
12792 | PRE_IO |
12793 | READ_WORD_F(adr, res) |
12794 | flag_C = 0; |
12795 | flag_V = 0; |
12796 | flag_NotZ = res; |
12797 | flag_N = res >> 8; |
12798 | FETCH_LONG(adr); |
12799 | WRITE_WORD_F(adr, res) |
12800 | POST_IO |
12801 | RET(28) |
12802 | } |
12803 | |
12804 | // MOVEW |
12805 | OPCODE(0x3EF9) |
12806 | { |
12807 | u32 adr, res; |
12808 | u32 src, dst; |
12809 | |
12810 | FETCH_LONG(adr); |
12811 | PRE_IO |
12812 | READ_WORD_F(adr, res) |
12813 | flag_C = 0; |
12814 | flag_V = 0; |
12815 | flag_NotZ = res; |
12816 | flag_N = res >> 8; |
12817 | adr = AREG(7); |
12818 | AREG(7) += 2; |
12819 | WRITE_WORD_F(adr, res) |
12820 | POST_IO |
12821 | RET(20) |
12822 | } |
12823 | |
12824 | // MOVEW |
12825 | OPCODE(0x3F39) |
12826 | { |
12827 | u32 adr, res; |
12828 | u32 src, dst; |
12829 | |
12830 | FETCH_LONG(adr); |
12831 | PRE_IO |
12832 | READ_WORD_F(adr, res) |
12833 | flag_C = 0; |
12834 | flag_V = 0; |
12835 | flag_NotZ = res; |
12836 | flag_N = res >> 8; |
12837 | adr = AREG(7) - 2; |
12838 | AREG(7) = adr; |
12839 | WRITE_WORD_F(adr, res) |
12840 | POST_IO |
12841 | RET(20) |
12842 | } |
12843 | |
12844 | // MOVEW |
12845 | OPCODE(0x303A) |
12846 | { |
12847 | u32 adr, res; |
12848 | u32 src, dst; |
12849 | |
12850 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12851 | PC++; |
12852 | PRE_IO |
12853 | READ_WORD_F(adr, res) |
12854 | flag_C = 0; |
12855 | flag_V = 0; |
12856 | flag_NotZ = res; |
12857 | flag_N = res >> 8; |
12858 | DREGu16((Opcode >> 9) & 7) = res; |
12859 | POST_IO |
12860 | RET(12) |
12861 | } |
12862 | |
12863 | // MOVEW |
12864 | OPCODE(0x30BA) |
12865 | { |
12866 | u32 adr, res; |
12867 | u32 src, dst; |
12868 | |
12869 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12870 | PC++; |
12871 | PRE_IO |
12872 | READ_WORD_F(adr, res) |
12873 | flag_C = 0; |
12874 | flag_V = 0; |
12875 | flag_NotZ = res; |
12876 | flag_N = res >> 8; |
12877 | adr = AREG((Opcode >> 9) & 7); |
12878 | WRITE_WORD_F(adr, res) |
12879 | POST_IO |
12880 | RET(16) |
12881 | } |
12882 | |
12883 | // MOVEW |
12884 | OPCODE(0x30FA) |
12885 | { |
12886 | u32 adr, res; |
12887 | u32 src, dst; |
12888 | |
12889 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12890 | PC++; |
12891 | PRE_IO |
12892 | READ_WORD_F(adr, res) |
12893 | flag_C = 0; |
12894 | flag_V = 0; |
12895 | flag_NotZ = res; |
12896 | flag_N = res >> 8; |
12897 | adr = AREG((Opcode >> 9) & 7); |
12898 | AREG((Opcode >> 9) & 7) += 2; |
12899 | WRITE_WORD_F(adr, res) |
12900 | POST_IO |
12901 | RET(16) |
12902 | } |
12903 | |
12904 | // MOVEW |
12905 | OPCODE(0x313A) |
12906 | { |
12907 | u32 adr, res; |
12908 | u32 src, dst; |
12909 | |
12910 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12911 | PC++; |
12912 | PRE_IO |
12913 | READ_WORD_F(adr, res) |
12914 | flag_C = 0; |
12915 | flag_V = 0; |
12916 | flag_NotZ = res; |
12917 | flag_N = res >> 8; |
12918 | adr = AREG((Opcode >> 9) & 7) - 2; |
12919 | AREG((Opcode >> 9) & 7) = adr; |
12920 | WRITE_WORD_F(adr, res) |
12921 | POST_IO |
12922 | RET(16) |
12923 | } |
12924 | |
12925 | // MOVEW |
12926 | OPCODE(0x317A) |
12927 | { |
12928 | u32 adr, res; |
12929 | u32 src, dst; |
12930 | |
12931 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12932 | PC++; |
12933 | PRE_IO |
12934 | READ_WORD_F(adr, res) |
12935 | flag_C = 0; |
12936 | flag_V = 0; |
12937 | flag_NotZ = res; |
12938 | flag_N = res >> 8; |
12939 | FETCH_SWORD(adr); |
12940 | adr += AREG((Opcode >> 9) & 7); |
12941 | WRITE_WORD_F(adr, res) |
12942 | POST_IO |
12943 | RET(20) |
12944 | } |
12945 | |
12946 | // MOVEW |
12947 | OPCODE(0x31BA) |
12948 | { |
12949 | u32 adr, res; |
12950 | u32 src, dst; |
12951 | |
12952 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12953 | PC++; |
12954 | PRE_IO |
12955 | READ_WORD_F(adr, res) |
12956 | flag_C = 0; |
12957 | flag_V = 0; |
12958 | flag_NotZ = res; |
12959 | flag_N = res >> 8; |
12960 | adr = AREG((Opcode >> 9) & 7); |
12961 | DECODE_EXT_WORD |
12962 | WRITE_WORD_F(adr, res) |
12963 | POST_IO |
12964 | RET(22) |
12965 | } |
12966 | |
12967 | // MOVEW |
12968 | OPCODE(0x31FA) |
12969 | { |
12970 | u32 adr, res; |
12971 | u32 src, dst; |
12972 | |
12973 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12974 | PC++; |
12975 | PRE_IO |
12976 | READ_WORD_F(adr, res) |
12977 | flag_C = 0; |
12978 | flag_V = 0; |
12979 | flag_NotZ = res; |
12980 | flag_N = res >> 8; |
12981 | FETCH_SWORD(adr); |
12982 | WRITE_WORD_F(adr, res) |
12983 | POST_IO |
12984 | RET(20) |
12985 | } |
12986 | |
12987 | // MOVEW |
12988 | OPCODE(0x33FA) |
12989 | { |
12990 | u32 adr, res; |
12991 | u32 src, dst; |
12992 | |
12993 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
12994 | PC++; |
12995 | PRE_IO |
12996 | READ_WORD_F(adr, res) |
12997 | flag_C = 0; |
12998 | flag_V = 0; |
12999 | flag_NotZ = res; |
13000 | flag_N = res >> 8; |
13001 | FETCH_LONG(adr); |
13002 | WRITE_WORD_F(adr, res) |
13003 | POST_IO |
13004 | RET(24) |
13005 | } |
13006 | |
13007 | // MOVEW |
13008 | OPCODE(0x3EFA) |
13009 | { |
13010 | u32 adr, res; |
13011 | u32 src, dst; |
13012 | |
13013 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13014 | PC++; |
13015 | PRE_IO |
13016 | READ_WORD_F(adr, res) |
13017 | flag_C = 0; |
13018 | flag_V = 0; |
13019 | flag_NotZ = res; |
13020 | flag_N = res >> 8; |
13021 | adr = AREG(7); |
13022 | AREG(7) += 2; |
13023 | WRITE_WORD_F(adr, res) |
13024 | POST_IO |
13025 | RET(16) |
13026 | } |
13027 | |
13028 | // MOVEW |
13029 | OPCODE(0x3F3A) |
13030 | { |
13031 | u32 adr, res; |
13032 | u32 src, dst; |
13033 | |
13034 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13035 | PC++; |
13036 | PRE_IO |
13037 | READ_WORD_F(adr, res) |
13038 | flag_C = 0; |
13039 | flag_V = 0; |
13040 | flag_NotZ = res; |
13041 | flag_N = res >> 8; |
13042 | adr = AREG(7) - 2; |
13043 | AREG(7) = adr; |
13044 | WRITE_WORD_F(adr, res) |
13045 | POST_IO |
13046 | RET(16) |
13047 | } |
13048 | |
13049 | // MOVEW |
13050 | OPCODE(0x303B) |
13051 | { |
13052 | u32 adr, res; |
13053 | u32 src, dst; |
13054 | |
13055 | adr = (u32)(PC) - BasePC; |
13056 | DECODE_EXT_WORD |
13057 | PRE_IO |
13058 | READ_WORD_F(adr, res) |
13059 | flag_C = 0; |
13060 | flag_V = 0; |
13061 | flag_NotZ = res; |
13062 | flag_N = res >> 8; |
13063 | DREGu16((Opcode >> 9) & 7) = res; |
13064 | POST_IO |
13065 | RET(14) |
13066 | } |
13067 | |
13068 | // MOVEW |
13069 | OPCODE(0x30BB) |
13070 | { |
13071 | u32 adr, res; |
13072 | u32 src, dst; |
13073 | |
13074 | adr = (u32)(PC) - BasePC; |
13075 | DECODE_EXT_WORD |
13076 | PRE_IO |
13077 | READ_WORD_F(adr, res) |
13078 | flag_C = 0; |
13079 | flag_V = 0; |
13080 | flag_NotZ = res; |
13081 | flag_N = res >> 8; |
13082 | adr = AREG((Opcode >> 9) & 7); |
13083 | WRITE_WORD_F(adr, res) |
13084 | POST_IO |
13085 | RET(18) |
13086 | } |
13087 | |
13088 | // MOVEW |
13089 | OPCODE(0x30FB) |
13090 | { |
13091 | u32 adr, res; |
13092 | u32 src, dst; |
13093 | |
13094 | adr = (u32)(PC) - BasePC; |
13095 | DECODE_EXT_WORD |
13096 | PRE_IO |
13097 | READ_WORD_F(adr, res) |
13098 | flag_C = 0; |
13099 | flag_V = 0; |
13100 | flag_NotZ = res; |
13101 | flag_N = res >> 8; |
13102 | adr = AREG((Opcode >> 9) & 7); |
13103 | AREG((Opcode >> 9) & 7) += 2; |
13104 | WRITE_WORD_F(adr, res) |
13105 | POST_IO |
13106 | RET(18) |
13107 | } |
13108 | |
13109 | // MOVEW |
13110 | OPCODE(0x313B) |
13111 | { |
13112 | u32 adr, res; |
13113 | u32 src, dst; |
13114 | |
13115 | adr = (u32)(PC) - BasePC; |
13116 | DECODE_EXT_WORD |
13117 | PRE_IO |
13118 | READ_WORD_F(adr, res) |
13119 | flag_C = 0; |
13120 | flag_V = 0; |
13121 | flag_NotZ = res; |
13122 | flag_N = res >> 8; |
13123 | adr = AREG((Opcode >> 9) & 7) - 2; |
13124 | AREG((Opcode >> 9) & 7) = adr; |
13125 | WRITE_WORD_F(adr, res) |
13126 | POST_IO |
13127 | RET(18) |
13128 | } |
13129 | |
13130 | // MOVEW |
13131 | OPCODE(0x317B) |
13132 | { |
13133 | u32 adr, res; |
13134 | u32 src, dst; |
13135 | |
13136 | adr = (u32)(PC) - BasePC; |
13137 | DECODE_EXT_WORD |
13138 | PRE_IO |
13139 | READ_WORD_F(adr, res) |
13140 | flag_C = 0; |
13141 | flag_V = 0; |
13142 | flag_NotZ = res; |
13143 | flag_N = res >> 8; |
13144 | FETCH_SWORD(adr); |
13145 | adr += AREG((Opcode >> 9) & 7); |
13146 | WRITE_WORD_F(adr, res) |
13147 | POST_IO |
13148 | RET(22) |
13149 | } |
13150 | |
13151 | // MOVEW |
13152 | OPCODE(0x31BB) |
13153 | { |
13154 | u32 adr, res; |
13155 | u32 src, dst; |
13156 | |
13157 | adr = (u32)(PC) - BasePC; |
13158 | DECODE_EXT_WORD |
13159 | PRE_IO |
13160 | READ_WORD_F(adr, res) |
13161 | flag_C = 0; |
13162 | flag_V = 0; |
13163 | flag_NotZ = res; |
13164 | flag_N = res >> 8; |
13165 | adr = AREG((Opcode >> 9) & 7); |
13166 | DECODE_EXT_WORD |
13167 | WRITE_WORD_F(adr, res) |
13168 | POST_IO |
13169 | RET(24) |
13170 | } |
13171 | |
13172 | // MOVEW |
13173 | OPCODE(0x31FB) |
13174 | { |
13175 | u32 adr, res; |
13176 | u32 src, dst; |
13177 | |
13178 | adr = (u32)(PC) - BasePC; |
13179 | DECODE_EXT_WORD |
13180 | PRE_IO |
13181 | READ_WORD_F(adr, res) |
13182 | flag_C = 0; |
13183 | flag_V = 0; |
13184 | flag_NotZ = res; |
13185 | flag_N = res >> 8; |
13186 | FETCH_SWORD(adr); |
13187 | WRITE_WORD_F(adr, res) |
13188 | POST_IO |
13189 | RET(22) |
13190 | } |
13191 | |
13192 | // MOVEW |
13193 | OPCODE(0x33FB) |
13194 | { |
13195 | u32 adr, res; |
13196 | u32 src, dst; |
13197 | |
13198 | adr = (u32)(PC) - BasePC; |
13199 | DECODE_EXT_WORD |
13200 | PRE_IO |
13201 | READ_WORD_F(adr, res) |
13202 | flag_C = 0; |
13203 | flag_V = 0; |
13204 | flag_NotZ = res; |
13205 | flag_N = res >> 8; |
13206 | FETCH_LONG(adr); |
13207 | WRITE_WORD_F(adr, res) |
13208 | POST_IO |
13209 | RET(26) |
13210 | } |
13211 | |
13212 | // MOVEW |
13213 | OPCODE(0x3EFB) |
13214 | { |
13215 | u32 adr, res; |
13216 | u32 src, dst; |
13217 | |
13218 | adr = (u32)(PC) - BasePC; |
13219 | DECODE_EXT_WORD |
13220 | PRE_IO |
13221 | READ_WORD_F(adr, res) |
13222 | flag_C = 0; |
13223 | flag_V = 0; |
13224 | flag_NotZ = res; |
13225 | flag_N = res >> 8; |
13226 | adr = AREG(7); |
13227 | AREG(7) += 2; |
13228 | WRITE_WORD_F(adr, res) |
13229 | POST_IO |
13230 | RET(18) |
13231 | } |
13232 | |
13233 | // MOVEW |
13234 | OPCODE(0x3F3B) |
13235 | { |
13236 | u32 adr, res; |
13237 | u32 src, dst; |
13238 | |
13239 | adr = (u32)(PC) - BasePC; |
13240 | DECODE_EXT_WORD |
13241 | PRE_IO |
13242 | READ_WORD_F(adr, res) |
13243 | flag_C = 0; |
13244 | flag_V = 0; |
13245 | flag_NotZ = res; |
13246 | flag_N = res >> 8; |
13247 | adr = AREG(7) - 2; |
13248 | AREG(7) = adr; |
13249 | WRITE_WORD_F(adr, res) |
13250 | POST_IO |
13251 | RET(18) |
13252 | } |
13253 | |
13254 | // MOVEW |
13255 | OPCODE(0x303C) |
13256 | { |
13257 | u32 adr, res; |
13258 | u32 src, dst; |
13259 | |
13260 | FETCH_WORD(res); |
13261 | flag_C = 0; |
13262 | flag_V = 0; |
13263 | flag_NotZ = res; |
13264 | flag_N = res >> 8; |
13265 | DREGu16((Opcode >> 9) & 7) = res; |
13266 | RET(8) |
13267 | } |
13268 | |
13269 | // MOVEW |
13270 | OPCODE(0x30BC) |
13271 | { |
13272 | u32 adr, res; |
13273 | u32 src, dst; |
13274 | |
13275 | FETCH_WORD(res); |
13276 | flag_C = 0; |
13277 | flag_V = 0; |
13278 | flag_NotZ = res; |
13279 | flag_N = res >> 8; |
13280 | adr = AREG((Opcode >> 9) & 7); |
13281 | PRE_IO |
13282 | WRITE_WORD_F(adr, res) |
13283 | POST_IO |
13284 | RET(12) |
13285 | } |
13286 | |
13287 | // MOVEW |
13288 | OPCODE(0x30FC) |
13289 | { |
13290 | u32 adr, res; |
13291 | u32 src, dst; |
13292 | |
13293 | FETCH_WORD(res); |
13294 | flag_C = 0; |
13295 | flag_V = 0; |
13296 | flag_NotZ = res; |
13297 | flag_N = res >> 8; |
13298 | adr = AREG((Opcode >> 9) & 7); |
13299 | AREG((Opcode >> 9) & 7) += 2; |
13300 | PRE_IO |
13301 | WRITE_WORD_F(adr, res) |
13302 | POST_IO |
13303 | RET(12) |
13304 | } |
13305 | |
13306 | // MOVEW |
13307 | OPCODE(0x313C) |
13308 | { |
13309 | u32 adr, res; |
13310 | u32 src, dst; |
13311 | |
13312 | FETCH_WORD(res); |
13313 | flag_C = 0; |
13314 | flag_V = 0; |
13315 | flag_NotZ = res; |
13316 | flag_N = res >> 8; |
13317 | adr = AREG((Opcode >> 9) & 7) - 2; |
13318 | AREG((Opcode >> 9) & 7) = adr; |
13319 | PRE_IO |
13320 | WRITE_WORD_F(adr, res) |
13321 | POST_IO |
13322 | RET(12) |
13323 | } |
13324 | |
13325 | // MOVEW |
13326 | OPCODE(0x317C) |
13327 | { |
13328 | u32 adr, res; |
13329 | u32 src, dst; |
13330 | |
13331 | FETCH_WORD(res); |
13332 | flag_C = 0; |
13333 | flag_V = 0; |
13334 | flag_NotZ = res; |
13335 | flag_N = res >> 8; |
13336 | FETCH_SWORD(adr); |
13337 | adr += AREG((Opcode >> 9) & 7); |
13338 | PRE_IO |
13339 | WRITE_WORD_F(adr, res) |
13340 | POST_IO |
13341 | RET(16) |
13342 | } |
13343 | |
13344 | // MOVEW |
13345 | OPCODE(0x31BC) |
13346 | { |
13347 | u32 adr, res; |
13348 | u32 src, dst; |
13349 | |
13350 | FETCH_WORD(res); |
13351 | flag_C = 0; |
13352 | flag_V = 0; |
13353 | flag_NotZ = res; |
13354 | flag_N = res >> 8; |
13355 | adr = AREG((Opcode >> 9) & 7); |
13356 | DECODE_EXT_WORD |
13357 | PRE_IO |
13358 | WRITE_WORD_F(adr, res) |
13359 | POST_IO |
13360 | RET(18) |
13361 | } |
13362 | |
13363 | // MOVEW |
13364 | OPCODE(0x31FC) |
13365 | { |
13366 | u32 adr, res; |
13367 | u32 src, dst; |
13368 | |
13369 | FETCH_WORD(res); |
13370 | flag_C = 0; |
13371 | flag_V = 0; |
13372 | flag_NotZ = res; |
13373 | flag_N = res >> 8; |
13374 | FETCH_SWORD(adr); |
13375 | PRE_IO |
13376 | WRITE_WORD_F(adr, res) |
13377 | POST_IO |
13378 | RET(16) |
13379 | } |
13380 | |
13381 | // MOVEW |
13382 | OPCODE(0x33FC) |
13383 | { |
13384 | u32 adr, res; |
13385 | u32 src, dst; |
13386 | |
13387 | FETCH_WORD(res); |
13388 | flag_C = 0; |
13389 | flag_V = 0; |
13390 | flag_NotZ = res; |
13391 | flag_N = res >> 8; |
13392 | FETCH_LONG(adr); |
13393 | PRE_IO |
13394 | WRITE_WORD_F(adr, res) |
13395 | POST_IO |
13396 | RET(20) |
13397 | } |
13398 | |
13399 | // MOVEW |
13400 | OPCODE(0x3EFC) |
13401 | { |
13402 | u32 adr, res; |
13403 | u32 src, dst; |
13404 | |
13405 | FETCH_WORD(res); |
13406 | flag_C = 0; |
13407 | flag_V = 0; |
13408 | flag_NotZ = res; |
13409 | flag_N = res >> 8; |
13410 | adr = AREG(7); |
13411 | AREG(7) += 2; |
13412 | PRE_IO |
13413 | WRITE_WORD_F(adr, res) |
13414 | POST_IO |
13415 | RET(12) |
13416 | } |
13417 | |
13418 | // MOVEW |
13419 | OPCODE(0x3F3C) |
13420 | { |
13421 | u32 adr, res; |
13422 | u32 src, dst; |
13423 | |
13424 | FETCH_WORD(res); |
13425 | flag_C = 0; |
13426 | flag_V = 0; |
13427 | flag_NotZ = res; |
13428 | flag_N = res >> 8; |
13429 | adr = AREG(7) - 2; |
13430 | AREG(7) = adr; |
13431 | PRE_IO |
13432 | WRITE_WORD_F(adr, res) |
13433 | POST_IO |
13434 | RET(12) |
13435 | } |
13436 | |
13437 | // MOVEW |
13438 | OPCODE(0x301F) |
13439 | { |
13440 | u32 adr, res; |
13441 | u32 src, dst; |
13442 | |
13443 | adr = AREG(7); |
13444 | AREG(7) += 2; |
13445 | PRE_IO |
13446 | READ_WORD_F(adr, res) |
13447 | flag_C = 0; |
13448 | flag_V = 0; |
13449 | flag_NotZ = res; |
13450 | flag_N = res >> 8; |
13451 | DREGu16((Opcode >> 9) & 7) = res; |
13452 | POST_IO |
13453 | RET(8) |
13454 | } |
13455 | |
13456 | // MOVEW |
13457 | OPCODE(0x309F) |
13458 | { |
13459 | u32 adr, res; |
13460 | u32 src, dst; |
13461 | |
13462 | adr = AREG(7); |
13463 | AREG(7) += 2; |
13464 | PRE_IO |
13465 | READ_WORD_F(adr, res) |
13466 | flag_C = 0; |
13467 | flag_V = 0; |
13468 | flag_NotZ = res; |
13469 | flag_N = res >> 8; |
13470 | adr = AREG((Opcode >> 9) & 7); |
13471 | WRITE_WORD_F(adr, res) |
13472 | POST_IO |
13473 | RET(12) |
13474 | } |
13475 | |
13476 | // MOVEW |
13477 | OPCODE(0x30DF) |
13478 | { |
13479 | u32 adr, res; |
13480 | u32 src, dst; |
13481 | |
13482 | adr = AREG(7); |
13483 | AREG(7) += 2; |
13484 | PRE_IO |
13485 | READ_WORD_F(adr, res) |
13486 | flag_C = 0; |
13487 | flag_V = 0; |
13488 | flag_NotZ = res; |
13489 | flag_N = res >> 8; |
13490 | adr = AREG((Opcode >> 9) & 7); |
13491 | AREG((Opcode >> 9) & 7) += 2; |
13492 | WRITE_WORD_F(adr, res) |
13493 | POST_IO |
13494 | RET(12) |
13495 | } |
13496 | |
13497 | // MOVEW |
13498 | OPCODE(0x311F) |
13499 | { |
13500 | u32 adr, res; |
13501 | u32 src, dst; |
13502 | |
13503 | adr = AREG(7); |
13504 | AREG(7) += 2; |
13505 | PRE_IO |
13506 | READ_WORD_F(adr, res) |
13507 | flag_C = 0; |
13508 | flag_V = 0; |
13509 | flag_NotZ = res; |
13510 | flag_N = res >> 8; |
13511 | adr = AREG((Opcode >> 9) & 7) - 2; |
13512 | AREG((Opcode >> 9) & 7) = adr; |
13513 | WRITE_WORD_F(adr, res) |
13514 | POST_IO |
13515 | RET(12) |
13516 | } |
13517 | |
13518 | // MOVEW |
13519 | OPCODE(0x315F) |
13520 | { |
13521 | u32 adr, res; |
13522 | u32 src, dst; |
13523 | |
13524 | adr = AREG(7); |
13525 | AREG(7) += 2; |
13526 | PRE_IO |
13527 | READ_WORD_F(adr, res) |
13528 | flag_C = 0; |
13529 | flag_V = 0; |
13530 | flag_NotZ = res; |
13531 | flag_N = res >> 8; |
13532 | FETCH_SWORD(adr); |
13533 | adr += AREG((Opcode >> 9) & 7); |
13534 | WRITE_WORD_F(adr, res) |
13535 | POST_IO |
13536 | RET(16) |
13537 | } |
13538 | |
13539 | // MOVEW |
13540 | OPCODE(0x319F) |
13541 | { |
13542 | u32 adr, res; |
13543 | u32 src, dst; |
13544 | |
13545 | adr = AREG(7); |
13546 | AREG(7) += 2; |
13547 | PRE_IO |
13548 | READ_WORD_F(adr, res) |
13549 | flag_C = 0; |
13550 | flag_V = 0; |
13551 | flag_NotZ = res; |
13552 | flag_N = res >> 8; |
13553 | adr = AREG((Opcode >> 9) & 7); |
13554 | DECODE_EXT_WORD |
13555 | WRITE_WORD_F(adr, res) |
13556 | POST_IO |
13557 | RET(18) |
13558 | } |
13559 | |
13560 | // MOVEW |
13561 | OPCODE(0x31DF) |
13562 | { |
13563 | u32 adr, res; |
13564 | u32 src, dst; |
13565 | |
13566 | adr = AREG(7); |
13567 | AREG(7) += 2; |
13568 | PRE_IO |
13569 | READ_WORD_F(adr, res) |
13570 | flag_C = 0; |
13571 | flag_V = 0; |
13572 | flag_NotZ = res; |
13573 | flag_N = res >> 8; |
13574 | FETCH_SWORD(adr); |
13575 | WRITE_WORD_F(adr, res) |
13576 | POST_IO |
13577 | RET(16) |
13578 | } |
13579 | |
13580 | // MOVEW |
13581 | OPCODE(0x33DF) |
13582 | { |
13583 | u32 adr, res; |
13584 | u32 src, dst; |
13585 | |
13586 | adr = AREG(7); |
13587 | AREG(7) += 2; |
13588 | PRE_IO |
13589 | READ_WORD_F(adr, res) |
13590 | flag_C = 0; |
13591 | flag_V = 0; |
13592 | flag_NotZ = res; |
13593 | flag_N = res >> 8; |
13594 | FETCH_LONG(adr); |
13595 | WRITE_WORD_F(adr, res) |
13596 | POST_IO |
13597 | RET(20) |
13598 | } |
13599 | |
13600 | // MOVEW |
13601 | OPCODE(0x3EDF) |
13602 | { |
13603 | u32 adr, res; |
13604 | u32 src, dst; |
13605 | |
13606 | adr = AREG(7); |
13607 | AREG(7) += 2; |
13608 | PRE_IO |
13609 | READ_WORD_F(adr, res) |
13610 | flag_C = 0; |
13611 | flag_V = 0; |
13612 | flag_NotZ = res; |
13613 | flag_N = res >> 8; |
13614 | adr = AREG(7); |
13615 | AREG(7) += 2; |
13616 | WRITE_WORD_F(adr, res) |
13617 | POST_IO |
13618 | RET(12) |
13619 | } |
13620 | |
13621 | // MOVEW |
13622 | OPCODE(0x3F1F) |
13623 | { |
13624 | u32 adr, res; |
13625 | u32 src, dst; |
13626 | |
13627 | adr = AREG(7); |
13628 | AREG(7) += 2; |
13629 | PRE_IO |
13630 | READ_WORD_F(adr, res) |
13631 | flag_C = 0; |
13632 | flag_V = 0; |
13633 | flag_NotZ = res; |
13634 | flag_N = res >> 8; |
13635 | adr = AREG(7) - 2; |
13636 | AREG(7) = adr; |
13637 | WRITE_WORD_F(adr, res) |
13638 | POST_IO |
13639 | RET(12) |
13640 | } |
13641 | |
13642 | // MOVEW |
13643 | OPCODE(0x3027) |
13644 | { |
13645 | u32 adr, res; |
13646 | u32 src, dst; |
13647 | |
13648 | adr = AREG(7) - 2; |
13649 | AREG(7) = adr; |
13650 | PRE_IO |
13651 | READ_WORD_F(adr, res) |
13652 | flag_C = 0; |
13653 | flag_V = 0; |
13654 | flag_NotZ = res; |
13655 | flag_N = res >> 8; |
13656 | DREGu16((Opcode >> 9) & 7) = res; |
13657 | POST_IO |
13658 | RET(10) |
13659 | } |
13660 | |
13661 | // MOVEW |
13662 | OPCODE(0x30A7) |
13663 | { |
13664 | u32 adr, res; |
13665 | u32 src, dst; |
13666 | |
13667 | adr = AREG(7) - 2; |
13668 | AREG(7) = adr; |
13669 | PRE_IO |
13670 | READ_WORD_F(adr, res) |
13671 | flag_C = 0; |
13672 | flag_V = 0; |
13673 | flag_NotZ = res; |
13674 | flag_N = res >> 8; |
13675 | adr = AREG((Opcode >> 9) & 7); |
13676 | WRITE_WORD_F(adr, res) |
13677 | POST_IO |
13678 | RET(14) |
13679 | } |
13680 | |
13681 | // MOVEW |
13682 | OPCODE(0x30E7) |
13683 | { |
13684 | u32 adr, res; |
13685 | u32 src, dst; |
13686 | |
13687 | adr = AREG(7) - 2; |
13688 | AREG(7) = adr; |
13689 | PRE_IO |
13690 | READ_WORD_F(adr, res) |
13691 | flag_C = 0; |
13692 | flag_V = 0; |
13693 | flag_NotZ = res; |
13694 | flag_N = res >> 8; |
13695 | adr = AREG((Opcode >> 9) & 7); |
13696 | AREG((Opcode >> 9) & 7) += 2; |
13697 | WRITE_WORD_F(adr, res) |
13698 | POST_IO |
13699 | RET(14) |
13700 | } |
13701 | |
13702 | // MOVEW |
13703 | OPCODE(0x3127) |
13704 | { |
13705 | u32 adr, res; |
13706 | u32 src, dst; |
13707 | |
13708 | adr = AREG(7) - 2; |
13709 | AREG(7) = adr; |
13710 | PRE_IO |
13711 | READ_WORD_F(adr, res) |
13712 | flag_C = 0; |
13713 | flag_V = 0; |
13714 | flag_NotZ = res; |
13715 | flag_N = res >> 8; |
13716 | adr = AREG((Opcode >> 9) & 7) - 2; |
13717 | AREG((Opcode >> 9) & 7) = adr; |
13718 | WRITE_WORD_F(adr, res) |
13719 | POST_IO |
13720 | RET(14) |
13721 | } |
13722 | |
13723 | // MOVEW |
13724 | OPCODE(0x3167) |
13725 | { |
13726 | u32 adr, res; |
13727 | u32 src, dst; |
13728 | |
13729 | adr = AREG(7) - 2; |
13730 | AREG(7) = adr; |
13731 | PRE_IO |
13732 | READ_WORD_F(adr, res) |
13733 | flag_C = 0; |
13734 | flag_V = 0; |
13735 | flag_NotZ = res; |
13736 | flag_N = res >> 8; |
13737 | FETCH_SWORD(adr); |
13738 | adr += AREG((Opcode >> 9) & 7); |
13739 | WRITE_WORD_F(adr, res) |
13740 | POST_IO |
13741 | RET(18) |
13742 | } |
13743 | |
13744 | // MOVEW |
13745 | OPCODE(0x31A7) |
13746 | { |
13747 | u32 adr, res; |
13748 | u32 src, dst; |
13749 | |
13750 | adr = AREG(7) - 2; |
13751 | AREG(7) = adr; |
13752 | PRE_IO |
13753 | READ_WORD_F(adr, res) |
13754 | flag_C = 0; |
13755 | flag_V = 0; |
13756 | flag_NotZ = res; |
13757 | flag_N = res >> 8; |
13758 | adr = AREG((Opcode >> 9) & 7); |
13759 | DECODE_EXT_WORD |
13760 | WRITE_WORD_F(adr, res) |
13761 | POST_IO |
13762 | RET(20) |
13763 | } |
13764 | |
13765 | // MOVEW |
13766 | OPCODE(0x31E7) |
13767 | { |
13768 | u32 adr, res; |
13769 | u32 src, dst; |
13770 | |
13771 | adr = AREG(7) - 2; |
13772 | AREG(7) = adr; |
13773 | PRE_IO |
13774 | READ_WORD_F(adr, res) |
13775 | flag_C = 0; |
13776 | flag_V = 0; |
13777 | flag_NotZ = res; |
13778 | flag_N = res >> 8; |
13779 | FETCH_SWORD(adr); |
13780 | WRITE_WORD_F(adr, res) |
13781 | POST_IO |
13782 | RET(18) |
13783 | } |
13784 | |
13785 | // MOVEW |
13786 | OPCODE(0x33E7) |
13787 | { |
13788 | u32 adr, res; |
13789 | u32 src, dst; |
13790 | |
13791 | adr = AREG(7) - 2; |
13792 | AREG(7) = adr; |
13793 | PRE_IO |
13794 | READ_WORD_F(adr, res) |
13795 | flag_C = 0; |
13796 | flag_V = 0; |
13797 | flag_NotZ = res; |
13798 | flag_N = res >> 8; |
13799 | FETCH_LONG(adr); |
13800 | WRITE_WORD_F(adr, res) |
13801 | POST_IO |
13802 | RET(22) |
13803 | } |
13804 | |
13805 | // MOVEW |
13806 | OPCODE(0x3EE7) |
13807 | { |
13808 | u32 adr, res; |
13809 | u32 src, dst; |
13810 | |
13811 | adr = AREG(7) - 2; |
13812 | AREG(7) = adr; |
13813 | PRE_IO |
13814 | READ_WORD_F(adr, res) |
13815 | flag_C = 0; |
13816 | flag_V = 0; |
13817 | flag_NotZ = res; |
13818 | flag_N = res >> 8; |
13819 | adr = AREG(7); |
13820 | AREG(7) += 2; |
13821 | WRITE_WORD_F(adr, res) |
13822 | POST_IO |
13823 | RET(14) |
13824 | } |
13825 | |
13826 | // MOVEW |
13827 | OPCODE(0x3F27) |
13828 | { |
13829 | u32 adr, res; |
13830 | u32 src, dst; |
13831 | |
13832 | adr = AREG(7) - 2; |
13833 | AREG(7) = adr; |
13834 | PRE_IO |
13835 | READ_WORD_F(adr, res) |
13836 | flag_C = 0; |
13837 | flag_V = 0; |
13838 | flag_NotZ = res; |
13839 | flag_N = res >> 8; |
13840 | adr = AREG(7) - 2; |
13841 | AREG(7) = adr; |
13842 | WRITE_WORD_F(adr, res) |
13843 | POST_IO |
13844 | RET(14) |
13845 | } |
13846 | |
13847 | // MOVEAW |
13848 | OPCODE(0x3040) |
13849 | { |
13850 | u32 adr, res; |
13851 | u32 src, dst; |
13852 | |
13853 | res = (s32)DREGs16((Opcode >> 0) & 7); |
13854 | AREG((Opcode >> 9) & 7) = res; |
13855 | RET(4) |
13856 | } |
13857 | |
13858 | // MOVEAW |
13859 | OPCODE(0x3048) |
13860 | { |
13861 | u32 adr, res; |
13862 | u32 src, dst; |
13863 | |
13864 | res = (s32)AREGs16((Opcode >> 0) & 7); |
13865 | AREG((Opcode >> 9) & 7) = res; |
13866 | RET(4) |
13867 | } |
13868 | |
13869 | // MOVEAW |
13870 | OPCODE(0x3050) |
13871 | { |
13872 | u32 adr, res; |
13873 | u32 src, dst; |
13874 | |
13875 | adr = AREG((Opcode >> 0) & 7); |
13876 | PRE_IO |
13877 | READSX_WORD_F(adr, res) |
13878 | AREG((Opcode >> 9) & 7) = res; |
13879 | POST_IO |
13880 | RET(8) |
13881 | } |
13882 | |
13883 | // MOVEAW |
13884 | OPCODE(0x3058) |
13885 | { |
13886 | u32 adr, res; |
13887 | u32 src, dst; |
13888 | |
13889 | adr = AREG((Opcode >> 0) & 7); |
13890 | AREG((Opcode >> 0) & 7) += 2; |
13891 | PRE_IO |
13892 | READSX_WORD_F(adr, res) |
13893 | AREG((Opcode >> 9) & 7) = res; |
13894 | POST_IO |
13895 | RET(8) |
13896 | } |
13897 | |
13898 | // MOVEAW |
13899 | OPCODE(0x3060) |
13900 | { |
13901 | u32 adr, res; |
13902 | u32 src, dst; |
13903 | |
13904 | adr = AREG((Opcode >> 0) & 7) - 2; |
13905 | AREG((Opcode >> 0) & 7) = adr; |
13906 | PRE_IO |
13907 | READSX_WORD_F(adr, res) |
13908 | AREG((Opcode >> 9) & 7) = res; |
13909 | POST_IO |
13910 | RET(10) |
13911 | } |
13912 | |
13913 | // MOVEAW |
13914 | OPCODE(0x3068) |
13915 | { |
13916 | u32 adr, res; |
13917 | u32 src, dst; |
13918 | |
13919 | FETCH_SWORD(adr); |
13920 | adr += AREG((Opcode >> 0) & 7); |
13921 | PRE_IO |
13922 | READSX_WORD_F(adr, res) |
13923 | AREG((Opcode >> 9) & 7) = res; |
13924 | POST_IO |
13925 | RET(12) |
13926 | } |
13927 | |
13928 | // MOVEAW |
13929 | OPCODE(0x3070) |
13930 | { |
13931 | u32 adr, res; |
13932 | u32 src, dst; |
13933 | |
13934 | adr = AREG((Opcode >> 0) & 7); |
13935 | DECODE_EXT_WORD |
13936 | PRE_IO |
13937 | READSX_WORD_F(adr, res) |
13938 | AREG((Opcode >> 9) & 7) = res; |
13939 | POST_IO |
13940 | RET(14) |
13941 | } |
13942 | |
13943 | // MOVEAW |
13944 | OPCODE(0x3078) |
13945 | { |
13946 | u32 adr, res; |
13947 | u32 src, dst; |
13948 | |
13949 | FETCH_SWORD(adr); |
13950 | PRE_IO |
13951 | READSX_WORD_F(adr, res) |
13952 | AREG((Opcode >> 9) & 7) = res; |
13953 | POST_IO |
13954 | RET(12) |
13955 | } |
13956 | |
13957 | // MOVEAW |
13958 | OPCODE(0x3079) |
13959 | { |
13960 | u32 adr, res; |
13961 | u32 src, dst; |
13962 | |
13963 | FETCH_LONG(adr); |
13964 | PRE_IO |
13965 | READSX_WORD_F(adr, res) |
13966 | AREG((Opcode >> 9) & 7) = res; |
13967 | POST_IO |
13968 | RET(16) |
13969 | } |
13970 | |
13971 | // MOVEAW |
13972 | OPCODE(0x307A) |
13973 | { |
13974 | u32 adr, res; |
13975 | u32 src, dst; |
13976 | |
13977 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
13978 | PC++; |
13979 | PRE_IO |
13980 | READSX_WORD_F(adr, res) |
13981 | AREG((Opcode >> 9) & 7) = res; |
13982 | POST_IO |
13983 | RET(12) |
13984 | } |
13985 | |
13986 | // MOVEAW |
13987 | OPCODE(0x307B) |
13988 | { |
13989 | u32 adr, res; |
13990 | u32 src, dst; |
13991 | |
13992 | adr = (u32)(PC) - BasePC; |
13993 | DECODE_EXT_WORD |
13994 | PRE_IO |
13995 | READSX_WORD_F(adr, res) |
13996 | AREG((Opcode >> 9) & 7) = res; |
13997 | POST_IO |
13998 | RET(14) |
13999 | } |
14000 | |
14001 | // MOVEAW |
14002 | OPCODE(0x307C) |
14003 | { |
14004 | u32 adr, res; |
14005 | u32 src, dst; |
14006 | |
14007 | FETCH_SWORD(res); |
14008 | AREG((Opcode >> 9) & 7) = res; |
14009 | RET(8) |
14010 | } |
14011 | |
14012 | // MOVEAW |
14013 | OPCODE(0x305F) |
14014 | { |
14015 | u32 adr, res; |
14016 | u32 src, dst; |
14017 | |
14018 | adr = AREG(7); |
14019 | AREG(7) += 2; |
14020 | PRE_IO |
14021 | READSX_WORD_F(adr, res) |
14022 | AREG((Opcode >> 9) & 7) = res; |
14023 | POST_IO |
14024 | RET(8) |
14025 | } |
14026 | |
14027 | // MOVEAW |
14028 | OPCODE(0x3067) |
14029 | { |
14030 | u32 adr, res; |
14031 | u32 src, dst; |
14032 | |
14033 | adr = AREG(7) - 2; |
14034 | AREG(7) = adr; |
14035 | PRE_IO |
14036 | READSX_WORD_F(adr, res) |
14037 | AREG((Opcode >> 9) & 7) = res; |
14038 | POST_IO |
14039 | RET(10) |
14040 | } |
14041 | |
14042 | // NEGX |
14043 | OPCODE(0x4000) |
14044 | { |
14045 | u32 adr, res; |
14046 | u32 src, dst; |
14047 | |
14048 | src = DREGu8((Opcode >> 0) & 7); |
14049 | res = -src - ((flag_X >> 8) & 1); |
14050 | flag_V = res & src; |
14051 | flag_N = flag_X = flag_C = res; |
14052 | flag_NotZ |= res & 0xFF; |
14053 | DREGu8((Opcode >> 0) & 7) = res; |
14054 | RET(4) |
14055 | } |
14056 | |
14057 | // NEGX |
14058 | OPCODE(0x4010) |
14059 | { |
14060 | u32 adr, res; |
14061 | u32 src, dst; |
14062 | |
14063 | adr = AREG((Opcode >> 0) & 7); |
14064 | PRE_IO |
14065 | READ_BYTE_F(adr, src) |
14066 | res = -src - ((flag_X >> 8) & 1); |
14067 | flag_V = res & src; |
14068 | flag_N = flag_X = flag_C = res; |
14069 | flag_NotZ |= res & 0xFF; |
14070 | WRITE_BYTE_F(adr, res) |
14071 | POST_IO |
14072 | RET(12) |
14073 | } |
14074 | |
14075 | // NEGX |
14076 | OPCODE(0x4018) |
14077 | { |
14078 | u32 adr, res; |
14079 | u32 src, dst; |
14080 | |
14081 | adr = AREG((Opcode >> 0) & 7); |
14082 | AREG((Opcode >> 0) & 7) += 1; |
14083 | PRE_IO |
14084 | READ_BYTE_F(adr, src) |
14085 | res = -src - ((flag_X >> 8) & 1); |
14086 | flag_V = res & src; |
14087 | flag_N = flag_X = flag_C = res; |
14088 | flag_NotZ |= res & 0xFF; |
14089 | WRITE_BYTE_F(adr, res) |
14090 | POST_IO |
14091 | RET(12) |
14092 | } |
14093 | |
14094 | // NEGX |
14095 | OPCODE(0x4020) |
14096 | { |
14097 | u32 adr, res; |
14098 | u32 src, dst; |
14099 | |
14100 | adr = AREG((Opcode >> 0) & 7) - 1; |
14101 | AREG((Opcode >> 0) & 7) = adr; |
14102 | PRE_IO |
14103 | READ_BYTE_F(adr, src) |
14104 | res = -src - ((flag_X >> 8) & 1); |
14105 | flag_V = res & src; |
14106 | flag_N = flag_X = flag_C = res; |
14107 | flag_NotZ |= res & 0xFF; |
14108 | WRITE_BYTE_F(adr, res) |
14109 | POST_IO |
14110 | RET(14) |
14111 | } |
14112 | |
14113 | // NEGX |
14114 | OPCODE(0x4028) |
14115 | { |
14116 | u32 adr, res; |
14117 | u32 src, dst; |
14118 | |
14119 | FETCH_SWORD(adr); |
14120 | adr += AREG((Opcode >> 0) & 7); |
14121 | PRE_IO |
14122 | READ_BYTE_F(adr, src) |
14123 | res = -src - ((flag_X >> 8) & 1); |
14124 | flag_V = res & src; |
14125 | flag_N = flag_X = flag_C = res; |
14126 | flag_NotZ |= res & 0xFF; |
14127 | WRITE_BYTE_F(adr, res) |
14128 | POST_IO |
14129 | RET(16) |
14130 | } |
14131 | |
14132 | // NEGX |
14133 | OPCODE(0x4030) |
14134 | { |
14135 | u32 adr, res; |
14136 | u32 src, dst; |
14137 | |
14138 | adr = AREG((Opcode >> 0) & 7); |
14139 | DECODE_EXT_WORD |
14140 | PRE_IO |
14141 | READ_BYTE_F(adr, src) |
14142 | res = -src - ((flag_X >> 8) & 1); |
14143 | flag_V = res & src; |
14144 | flag_N = flag_X = flag_C = res; |
14145 | flag_NotZ |= res & 0xFF; |
14146 | WRITE_BYTE_F(adr, res) |
14147 | POST_IO |
14148 | RET(18) |
14149 | } |
14150 | |
14151 | // NEGX |
14152 | OPCODE(0x4038) |
14153 | { |
14154 | u32 adr, res; |
14155 | u32 src, dst; |
14156 | |
14157 | FETCH_SWORD(adr); |
14158 | PRE_IO |
14159 | READ_BYTE_F(adr, src) |
14160 | res = -src - ((flag_X >> 8) & 1); |
14161 | flag_V = res & src; |
14162 | flag_N = flag_X = flag_C = res; |
14163 | flag_NotZ |= res & 0xFF; |
14164 | WRITE_BYTE_F(adr, res) |
14165 | POST_IO |
14166 | RET(16) |
14167 | } |
14168 | |
14169 | // NEGX |
14170 | OPCODE(0x4039) |
14171 | { |
14172 | u32 adr, res; |
14173 | u32 src, dst; |
14174 | |
14175 | FETCH_LONG(adr); |
14176 | PRE_IO |
14177 | READ_BYTE_F(adr, src) |
14178 | res = -src - ((flag_X >> 8) & 1); |
14179 | flag_V = res & src; |
14180 | flag_N = flag_X = flag_C = res; |
14181 | flag_NotZ |= res & 0xFF; |
14182 | WRITE_BYTE_F(adr, res) |
14183 | POST_IO |
14184 | RET(20) |
14185 | } |
14186 | |
14187 | // NEGX |
14188 | OPCODE(0x401F) |
14189 | { |
14190 | u32 adr, res; |
14191 | u32 src, dst; |
14192 | |
14193 | adr = AREG(7); |
14194 | AREG(7) += 2; |
14195 | PRE_IO |
14196 | READ_BYTE_F(adr, src) |
14197 | res = -src - ((flag_X >> 8) & 1); |
14198 | flag_V = res & src; |
14199 | flag_N = flag_X = flag_C = res; |
14200 | flag_NotZ |= res & 0xFF; |
14201 | WRITE_BYTE_F(adr, res) |
14202 | POST_IO |
14203 | RET(12) |
14204 | } |
14205 | |
14206 | // NEGX |
14207 | OPCODE(0x4027) |
14208 | { |
14209 | u32 adr, res; |
14210 | u32 src, dst; |
14211 | |
14212 | adr = AREG(7) - 2; |
14213 | AREG(7) = adr; |
14214 | PRE_IO |
14215 | READ_BYTE_F(adr, src) |
14216 | res = -src - ((flag_X >> 8) & 1); |
14217 | flag_V = res & src; |
14218 | flag_N = flag_X = flag_C = res; |
14219 | flag_NotZ |= res & 0xFF; |
14220 | WRITE_BYTE_F(adr, res) |
14221 | POST_IO |
14222 | RET(14) |
14223 | } |
14224 | |
14225 | // NEGX |
14226 | OPCODE(0x4040) |
14227 | { |
14228 | u32 adr, res; |
14229 | u32 src, dst; |
14230 | |
14231 | src = DREGu16((Opcode >> 0) & 7); |
14232 | res = -src - ((flag_X >> 8) & 1); |
14233 | flag_V = (res & src) >> 8; |
14234 | flag_N = flag_X = flag_C = res >> 8; |
14235 | flag_NotZ |= res & 0xFFFF; |
14236 | DREGu16((Opcode >> 0) & 7) = res; |
14237 | RET(4) |
14238 | } |
14239 | |
14240 | // NEGX |
14241 | OPCODE(0x4050) |
14242 | { |
14243 | u32 adr, res; |
14244 | u32 src, dst; |
14245 | |
14246 | adr = AREG((Opcode >> 0) & 7); |
14247 | PRE_IO |
14248 | READ_WORD_F(adr, src) |
14249 | res = -src - ((flag_X >> 8) & 1); |
14250 | flag_V = (res & src) >> 8; |
14251 | flag_N = flag_X = flag_C = res >> 8; |
14252 | flag_NotZ |= res & 0xFFFF; |
14253 | WRITE_WORD_F(adr, res) |
14254 | POST_IO |
14255 | RET(12) |
14256 | } |
14257 | |
14258 | // NEGX |
14259 | OPCODE(0x4058) |
14260 | { |
14261 | u32 adr, res; |
14262 | u32 src, dst; |
14263 | |
14264 | adr = AREG((Opcode >> 0) & 7); |
14265 | AREG((Opcode >> 0) & 7) += 2; |
14266 | PRE_IO |
14267 | READ_WORD_F(adr, src) |
14268 | res = -src - ((flag_X >> 8) & 1); |
14269 | flag_V = (res & src) >> 8; |
14270 | flag_N = flag_X = flag_C = res >> 8; |
14271 | flag_NotZ |= res & 0xFFFF; |
14272 | WRITE_WORD_F(adr, res) |
14273 | POST_IO |
14274 | RET(12) |
14275 | } |
14276 | |
14277 | // NEGX |
14278 | OPCODE(0x4060) |
14279 | { |
14280 | u32 adr, res; |
14281 | u32 src, dst; |
14282 | |
14283 | adr = AREG((Opcode >> 0) & 7) - 2; |
14284 | AREG((Opcode >> 0) & 7) = adr; |
14285 | PRE_IO |
14286 | READ_WORD_F(adr, src) |
14287 | res = -src - ((flag_X >> 8) & 1); |
14288 | flag_V = (res & src) >> 8; |
14289 | flag_N = flag_X = flag_C = res >> 8; |
14290 | flag_NotZ |= res & 0xFFFF; |
14291 | WRITE_WORD_F(adr, res) |
14292 | POST_IO |
14293 | RET(14) |
14294 | } |
14295 | |
14296 | // NEGX |
14297 | OPCODE(0x4068) |
14298 | { |
14299 | u32 adr, res; |
14300 | u32 src, dst; |
14301 | |
14302 | FETCH_SWORD(adr); |
14303 | adr += AREG((Opcode >> 0) & 7); |
14304 | PRE_IO |
14305 | READ_WORD_F(adr, src) |
14306 | res = -src - ((flag_X >> 8) & 1); |
14307 | flag_V = (res & src) >> 8; |
14308 | flag_N = flag_X = flag_C = res >> 8; |
14309 | flag_NotZ |= res & 0xFFFF; |
14310 | WRITE_WORD_F(adr, res) |
14311 | POST_IO |
14312 | RET(16) |
14313 | } |
14314 | |
14315 | // NEGX |
14316 | OPCODE(0x4070) |
14317 | { |
14318 | u32 adr, res; |
14319 | u32 src, dst; |
14320 | |
14321 | adr = AREG((Opcode >> 0) & 7); |
14322 | DECODE_EXT_WORD |
14323 | PRE_IO |
14324 | READ_WORD_F(adr, src) |
14325 | res = -src - ((flag_X >> 8) & 1); |
14326 | flag_V = (res & src) >> 8; |
14327 | flag_N = flag_X = flag_C = res >> 8; |
14328 | flag_NotZ |= res & 0xFFFF; |
14329 | WRITE_WORD_F(adr, res) |
14330 | POST_IO |
14331 | RET(18) |
14332 | } |
14333 | |
14334 | // NEGX |
14335 | OPCODE(0x4078) |
14336 | { |
14337 | u32 adr, res; |
14338 | u32 src, dst; |
14339 | |
14340 | FETCH_SWORD(adr); |
14341 | PRE_IO |
14342 | READ_WORD_F(adr, src) |
14343 | res = -src - ((flag_X >> 8) & 1); |
14344 | flag_V = (res & src) >> 8; |
14345 | flag_N = flag_X = flag_C = res >> 8; |
14346 | flag_NotZ |= res & 0xFFFF; |
14347 | WRITE_WORD_F(adr, res) |
14348 | POST_IO |
14349 | RET(16) |
14350 | } |
14351 | |
14352 | // NEGX |
14353 | OPCODE(0x4079) |
14354 | { |
14355 | u32 adr, res; |
14356 | u32 src, dst; |
14357 | |
14358 | FETCH_LONG(adr); |
14359 | PRE_IO |
14360 | READ_WORD_F(adr, src) |
14361 | res = -src - ((flag_X >> 8) & 1); |
14362 | flag_V = (res & src) >> 8; |
14363 | flag_N = flag_X = flag_C = res >> 8; |
14364 | flag_NotZ |= res & 0xFFFF; |
14365 | WRITE_WORD_F(adr, res) |
14366 | POST_IO |
14367 | RET(20) |
14368 | } |
14369 | |
14370 | // NEGX |
14371 | OPCODE(0x405F) |
14372 | { |
14373 | u32 adr, res; |
14374 | u32 src, dst; |
14375 | |
14376 | adr = AREG(7); |
14377 | AREG(7) += 2; |
14378 | PRE_IO |
14379 | READ_WORD_F(adr, src) |
14380 | res = -src - ((flag_X >> 8) & 1); |
14381 | flag_V = (res & src) >> 8; |
14382 | flag_N = flag_X = flag_C = res >> 8; |
14383 | flag_NotZ |= res & 0xFFFF; |
14384 | WRITE_WORD_F(adr, res) |
14385 | POST_IO |
14386 | RET(12) |
14387 | } |
14388 | |
14389 | // NEGX |
14390 | OPCODE(0x4067) |
14391 | { |
14392 | u32 adr, res; |
14393 | u32 src, dst; |
14394 | |
14395 | adr = AREG(7) - 2; |
14396 | AREG(7) = adr; |
14397 | PRE_IO |
14398 | READ_WORD_F(adr, src) |
14399 | res = -src - ((flag_X >> 8) & 1); |
14400 | flag_V = (res & src) >> 8; |
14401 | flag_N = flag_X = flag_C = res >> 8; |
14402 | flag_NotZ |= res & 0xFFFF; |
14403 | WRITE_WORD_F(adr, res) |
14404 | POST_IO |
14405 | RET(14) |
14406 | } |
14407 | |
14408 | // NEGX |
14409 | OPCODE(0x4080) |
14410 | { |
14411 | u32 adr, res; |
14412 | u32 src, dst; |
14413 | |
14414 | src = DREGu32((Opcode >> 0) & 7); |
14415 | res = -src - ((flag_X >> 8) & 1); |
14416 | flag_NotZ |= res; |
14417 | flag_V = (res & src) >> 24; |
14418 | flag_X = flag_C = (res?1:0)<<8; |
14419 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14420 | flag_N = res >> 24; |
14421 | DREGu32((Opcode >> 0) & 7) = res; |
14422 | RET(6) |
14423 | } |
14424 | |
14425 | // NEGX |
14426 | OPCODE(0x4090) |
14427 | { |
14428 | u32 adr, res; |
14429 | u32 src, dst; |
14430 | |
14431 | adr = AREG((Opcode >> 0) & 7); |
14432 | PRE_IO |
14433 | READ_LONG_F(adr, src) |
14434 | res = -src - ((flag_X >> 8) & 1); |
14435 | flag_NotZ |= res; |
14436 | flag_V = (res & src) >> 24; |
14437 | flag_X = flag_C = (res?1:0)<<8; |
14438 | // flag_X = flag_C = ((src & res & 1) | (src >> 1) | (res >> 1)) >> 23; |
14439 | flag_N = res >> 24; |
14440 | WRITE_LONG_F(adr, res) |
14441 | POST_IO |
14442 | RET(20) |
14443 | } |
14444 | |
14445 | // NEGX |
14446 | OPCODE(0x4098) |
14447 | { |
14448 | u32 adr, res; |
14449 | u32 src, dst; |
14450 | |
14451 | adr = AREG((Opcode >> 0) & 7); |
14452 | AREG((Opcode >> 0) & 7) += 4; |
14453 | PRE_IO |
14454 | READ_LONG_F(adr, src) |
14455 | res = -src - ((flag_X >> 8) & 1); |
14456 | flag_NotZ |= res; |
14457 | flag_V = (res & src) >> 24; |
14458 | flag_X = flag_C = (res?1:0)<<8; |
14459 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14460 | flag_N = res >> 24; |
14461 | WRITE_LONG_F(adr, res) |
14462 | POST_IO |
14463 | RET(20) |
14464 | } |
14465 | |
14466 | // NEGX |
14467 | OPCODE(0x40A0) |
14468 | { |
14469 | u32 adr, res; |
14470 | u32 src, dst; |
14471 | |
14472 | adr = AREG((Opcode >> 0) & 7) - 4; |
14473 | AREG((Opcode >> 0) & 7) = adr; |
14474 | PRE_IO |
14475 | READ_LONG_F(adr, src) |
14476 | res = -src - ((flag_X >> 8) & 1); |
14477 | flag_NotZ |= res; |
14478 | flag_V = (res & src) >> 24; |
14479 | flag_X = flag_C = (res?1:0)<<8; |
14480 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14481 | flag_N = res >> 24; |
14482 | WRITE_LONG_F(adr, res) |
14483 | POST_IO |
14484 | RET(22) |
14485 | } |
14486 | |
14487 | // NEGX |
14488 | OPCODE(0x40A8) |
14489 | { |
14490 | u32 adr, res; |
14491 | u32 src, dst; |
14492 | |
14493 | FETCH_SWORD(adr); |
14494 | adr += AREG((Opcode >> 0) & 7); |
14495 | PRE_IO |
14496 | READ_LONG_F(adr, src) |
14497 | res = -src - ((flag_X >> 8) & 1); |
14498 | flag_NotZ |= res; |
14499 | flag_V = (res & src) >> 24; |
14500 | flag_X = flag_C = (res?1:0)<<8; |
14501 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14502 | flag_N = res >> 24; |
14503 | WRITE_LONG_F(adr, res) |
14504 | POST_IO |
14505 | RET(24) |
14506 | } |
14507 | |
14508 | // NEGX |
14509 | OPCODE(0x40B0) |
14510 | { |
14511 | u32 adr, res; |
14512 | u32 src, dst; |
14513 | |
14514 | adr = AREG((Opcode >> 0) & 7); |
14515 | DECODE_EXT_WORD |
14516 | PRE_IO |
14517 | READ_LONG_F(adr, src) |
14518 | res = -src - ((flag_X >> 8) & 1); |
14519 | flag_NotZ |= res; |
14520 | flag_V = (res & src) >> 24; |
14521 | flag_X = flag_C = (res?1:0)<<8; |
14522 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14523 | flag_N = res >> 24; |
14524 | WRITE_LONG_F(adr, res) |
14525 | POST_IO |
14526 | RET(26) |
14527 | } |
14528 | |
14529 | // NEGX |
14530 | OPCODE(0x40B8) |
14531 | { |
14532 | u32 adr, res; |
14533 | u32 src, dst; |
14534 | |
14535 | FETCH_SWORD(adr); |
14536 | PRE_IO |
14537 | READ_LONG_F(adr, src) |
14538 | res = -src - ((flag_X >> 8) & 1); |
14539 | flag_NotZ |= res; |
14540 | flag_V = (res & src) >> 24; |
14541 | flag_X = flag_C = (res?1:0)<<8; |
14542 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14543 | flag_N = res >> 24; |
14544 | WRITE_LONG_F(adr, res) |
14545 | POST_IO |
14546 | RET(24) |
14547 | } |
14548 | |
14549 | // NEGX |
14550 | OPCODE(0x40B9) |
14551 | { |
14552 | u32 adr, res; |
14553 | u32 src, dst; |
14554 | |
14555 | FETCH_LONG(adr); |
14556 | PRE_IO |
14557 | READ_LONG_F(adr, src) |
14558 | res = -src - ((flag_X >> 8) & 1); |
14559 | flag_NotZ |= res; |
14560 | flag_V = (res & src) >> 24; |
14561 | flag_X = flag_C = (res?1:0)<<8; |
14562 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14563 | flag_N = res >> 24; |
14564 | WRITE_LONG_F(adr, res) |
14565 | POST_IO |
14566 | RET(28) |
14567 | } |
14568 | |
14569 | // NEGX |
14570 | OPCODE(0x409F) |
14571 | { |
14572 | u32 adr, res; |
14573 | u32 src, dst; |
14574 | |
14575 | adr = AREG(7); |
14576 | AREG(7) += 4; |
14577 | PRE_IO |
14578 | READ_LONG_F(adr, src) |
14579 | res = -src - ((flag_X >> 8) & 1); |
14580 | flag_NotZ |= res; |
14581 | flag_V = (res & src) >> 24; |
14582 | flag_X = flag_C = (res?1:0)<<8; |
14583 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14584 | flag_N = res >> 24; |
14585 | WRITE_LONG_F(adr, res) |
14586 | POST_IO |
14587 | RET(20) |
14588 | } |
14589 | |
14590 | // NEGX |
14591 | OPCODE(0x40A7) |
14592 | { |
14593 | u32 adr, res; |
14594 | u32 src, dst; |
14595 | |
14596 | adr = AREG(7) - 4; |
14597 | AREG(7) = adr; |
14598 | PRE_IO |
14599 | READ_LONG_F(adr, src) |
14600 | res = -src - ((flag_X >> 8) & 1); |
14601 | flag_NotZ |= res; |
14602 | flag_V = (res & src) >> 24; |
14603 | flag_X = flag_C = (res?1:0)<<8; |
14604 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14605 | flag_N = res >> 24; |
14606 | WRITE_LONG_F(adr, res) |
14607 | POST_IO |
14608 | RET(22) |
14609 | } |
14610 | |
14611 | // CLR |
14612 | OPCODE(0x4200) |
14613 | { |
14614 | u32 adr, res; |
14615 | u32 src, dst; |
14616 | |
14617 | res = 0; |
14618 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14619 | DREGu8((Opcode >> 0) & 7) = res; |
14620 | RET(4) |
14621 | } |
14622 | |
14623 | // CLR |
14624 | OPCODE(0x4210) |
14625 | { |
14626 | u32 adr, res; |
14627 | u32 src, dst; |
14628 | |
14629 | adr = AREG((Opcode >> 0) & 7); |
14630 | res = 0; |
14631 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14632 | PRE_IO |
14633 | WRITE_BYTE_F(adr, res) |
14634 | POST_IO |
14635 | RET(12) |
14636 | } |
14637 | |
14638 | // CLR |
14639 | OPCODE(0x4218) |
14640 | { |
14641 | u32 adr, res; |
14642 | u32 src, dst; |
14643 | |
14644 | adr = AREG((Opcode >> 0) & 7); |
14645 | AREG((Opcode >> 0) & 7) += 1; |
14646 | res = 0; |
14647 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14648 | PRE_IO |
14649 | WRITE_BYTE_F(adr, res) |
14650 | POST_IO |
14651 | RET(12) |
14652 | } |
14653 | |
14654 | // CLR |
14655 | OPCODE(0x4220) |
14656 | { |
14657 | u32 adr, res; |
14658 | u32 src, dst; |
14659 | |
14660 | adr = AREG((Opcode >> 0) & 7) - 1; |
14661 | AREG((Opcode >> 0) & 7) = adr; |
14662 | res = 0; |
14663 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14664 | PRE_IO |
14665 | WRITE_BYTE_F(adr, res) |
14666 | POST_IO |
14667 | RET(14) |
14668 | } |
14669 | |
14670 | // CLR |
14671 | OPCODE(0x4228) |
14672 | { |
14673 | u32 adr, res; |
14674 | u32 src, dst; |
14675 | |
14676 | FETCH_SWORD(adr); |
14677 | adr += AREG((Opcode >> 0) & 7); |
14678 | res = 0; |
14679 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14680 | PRE_IO |
14681 | WRITE_BYTE_F(adr, res) |
14682 | POST_IO |
14683 | RET(16) |
14684 | } |
14685 | |
14686 | // CLR |
14687 | OPCODE(0x4230) |
14688 | { |
14689 | u32 adr, res; |
14690 | u32 src, dst; |
14691 | |
14692 | adr = AREG((Opcode >> 0) & 7); |
14693 | DECODE_EXT_WORD |
14694 | res = 0; |
14695 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14696 | PRE_IO |
14697 | WRITE_BYTE_F(adr, res) |
14698 | POST_IO |
14699 | RET(18) |
14700 | } |
14701 | |
14702 | // CLR |
14703 | OPCODE(0x4238) |
14704 | { |
14705 | u32 adr, res; |
14706 | u32 src, dst; |
14707 | |
14708 | FETCH_SWORD(adr); |
14709 | res = 0; |
14710 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14711 | PRE_IO |
14712 | WRITE_BYTE_F(adr, res) |
14713 | POST_IO |
14714 | RET(16) |
14715 | } |
14716 | |
14717 | // CLR |
14718 | OPCODE(0x4239) |
14719 | { |
14720 | u32 adr, res; |
14721 | u32 src, dst; |
14722 | |
14723 | FETCH_LONG(adr); |
14724 | res = 0; |
14725 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14726 | PRE_IO |
14727 | WRITE_BYTE_F(adr, res) |
14728 | POST_IO |
14729 | RET(20) |
14730 | } |
14731 | |
14732 | // CLR |
14733 | OPCODE(0x421F) |
14734 | { |
14735 | u32 adr, res; |
14736 | u32 src, dst; |
14737 | |
14738 | adr = AREG(7); |
14739 | AREG(7) += 2; |
14740 | res = 0; |
14741 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14742 | PRE_IO |
14743 | WRITE_BYTE_F(adr, res) |
14744 | POST_IO |
14745 | RET(12) |
14746 | } |
14747 | |
14748 | // CLR |
14749 | OPCODE(0x4227) |
14750 | { |
14751 | u32 adr, res; |
14752 | u32 src, dst; |
14753 | |
14754 | adr = AREG(7) - 2; |
14755 | AREG(7) = adr; |
14756 | res = 0; |
14757 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14758 | PRE_IO |
14759 | WRITE_BYTE_F(adr, res) |
14760 | POST_IO |
14761 | RET(14) |
14762 | } |
14763 | |
14764 | // CLR |
14765 | OPCODE(0x4240) |
14766 | { |
14767 | u32 adr, res; |
14768 | u32 src, dst; |
14769 | |
14770 | res = 0; |
14771 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14772 | DREGu16((Opcode >> 0) & 7) = res; |
14773 | RET(4) |
14774 | } |
14775 | |
14776 | // CLR |
14777 | OPCODE(0x4250) |
14778 | { |
14779 | u32 adr, res; |
14780 | u32 src, dst; |
14781 | |
14782 | adr = AREG((Opcode >> 0) & 7); |
14783 | res = 0; |
14784 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14785 | PRE_IO |
14786 | WRITE_WORD_F(adr, res) |
14787 | POST_IO |
14788 | RET(12) |
14789 | } |
14790 | |
14791 | // CLR |
14792 | OPCODE(0x4258) |
14793 | { |
14794 | u32 adr, res; |
14795 | u32 src, dst; |
14796 | |
14797 | adr = AREG((Opcode >> 0) & 7); |
14798 | AREG((Opcode >> 0) & 7) += 2; |
14799 | res = 0; |
14800 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14801 | PRE_IO |
14802 | WRITE_WORD_F(adr, res) |
14803 | POST_IO |
14804 | RET(12) |
14805 | } |
14806 | |
14807 | // CLR |
14808 | OPCODE(0x4260) |
14809 | { |
14810 | u32 adr, res; |
14811 | u32 src, dst; |
14812 | |
14813 | adr = AREG((Opcode >> 0) & 7) - 2; |
14814 | AREG((Opcode >> 0) & 7) = adr; |
14815 | res = 0; |
14816 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14817 | PRE_IO |
14818 | WRITE_WORD_F(adr, res) |
14819 | POST_IO |
14820 | RET(14) |
14821 | } |
14822 | |
14823 | // CLR |
14824 | OPCODE(0x4268) |
14825 | { |
14826 | u32 adr, res; |
14827 | u32 src, dst; |
14828 | |
14829 | FETCH_SWORD(adr); |
14830 | adr += AREG((Opcode >> 0) & 7); |
14831 | res = 0; |
14832 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14833 | PRE_IO |
14834 | WRITE_WORD_F(adr, res) |
14835 | POST_IO |
14836 | RET(16) |
14837 | } |
14838 | |
14839 | // CLR |
14840 | OPCODE(0x4270) |
14841 | { |
14842 | u32 adr, res; |
14843 | u32 src, dst; |
14844 | |
14845 | adr = AREG((Opcode >> 0) & 7); |
14846 | DECODE_EXT_WORD |
14847 | res = 0; |
14848 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14849 | PRE_IO |
14850 | WRITE_WORD_F(adr, res) |
14851 | POST_IO |
14852 | RET(18) |
14853 | } |
14854 | |
14855 | // CLR |
14856 | OPCODE(0x4278) |
14857 | { |
14858 | u32 adr, res; |
14859 | u32 src, dst; |
14860 | |
14861 | FETCH_SWORD(adr); |
14862 | res = 0; |
14863 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14864 | PRE_IO |
14865 | WRITE_WORD_F(adr, res) |
14866 | POST_IO |
14867 | RET(16) |
14868 | } |
14869 | |
14870 | // CLR |
14871 | OPCODE(0x4279) |
14872 | { |
14873 | u32 adr, res; |
14874 | u32 src, dst; |
14875 | |
14876 | FETCH_LONG(adr); |
14877 | res = 0; |
14878 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14879 | PRE_IO |
14880 | WRITE_WORD_F(adr, res) |
14881 | POST_IO |
14882 | RET(20) |
14883 | } |
14884 | |
14885 | // CLR |
14886 | OPCODE(0x425F) |
14887 | { |
14888 | u32 adr, res; |
14889 | u32 src, dst; |
14890 | |
14891 | adr = AREG(7); |
14892 | AREG(7) += 2; |
14893 | res = 0; |
14894 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14895 | PRE_IO |
14896 | WRITE_WORD_F(adr, res) |
14897 | POST_IO |
14898 | RET(12) |
14899 | } |
14900 | |
14901 | // CLR |
14902 | OPCODE(0x4267) |
14903 | { |
14904 | u32 adr, res; |
14905 | u32 src, dst; |
14906 | |
14907 | adr = AREG(7) - 2; |
14908 | AREG(7) = adr; |
14909 | res = 0; |
14910 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14911 | PRE_IO |
14912 | WRITE_WORD_F(adr, res) |
14913 | POST_IO |
14914 | RET(14) |
14915 | } |
14916 | |
14917 | // CLR |
14918 | OPCODE(0x4280) |
14919 | { |
14920 | u32 adr, res; |
14921 | u32 src, dst; |
14922 | |
14923 | res = 0; |
14924 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14925 | DREGu32((Opcode >> 0) & 7) = res; |
14926 | RET(6) |
14927 | } |
14928 | |
14929 | // CLR |
14930 | OPCODE(0x4290) |
14931 | { |
14932 | u32 adr, res; |
14933 | u32 src, dst; |
14934 | |
14935 | adr = AREG((Opcode >> 0) & 7); |
14936 | res = 0; |
14937 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14938 | PRE_IO |
14939 | WRITE_LONG_F(adr, res) |
14940 | POST_IO |
14941 | RET(20) |
14942 | } |
14943 | |
14944 | // CLR |
14945 | OPCODE(0x4298) |
14946 | { |
14947 | u32 adr, res; |
14948 | u32 src, dst; |
14949 | |
14950 | adr = AREG((Opcode >> 0) & 7); |
14951 | AREG((Opcode >> 0) & 7) += 4; |
14952 | res = 0; |
14953 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14954 | PRE_IO |
14955 | WRITE_LONG_F(adr, res) |
14956 | POST_IO |
14957 | RET(20) |
14958 | } |
14959 | |
14960 | // CLR |
14961 | OPCODE(0x42A0) |
14962 | { |
14963 | u32 adr, res; |
14964 | u32 src, dst; |
14965 | |
14966 | adr = AREG((Opcode >> 0) & 7) - 4; |
14967 | AREG((Opcode >> 0) & 7) = adr; |
14968 | res = 0; |
14969 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14970 | PRE_IO |
14971 | WRITE_LONG_F(adr, res) |
14972 | POST_IO |
14973 | RET(22) |
14974 | } |
14975 | |
14976 | // CLR |
14977 | OPCODE(0x42A8) |
14978 | { |
14979 | u32 adr, res; |
14980 | u32 src, dst; |
14981 | |
14982 | FETCH_SWORD(adr); |
14983 | adr += AREG((Opcode >> 0) & 7); |
14984 | res = 0; |
14985 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14986 | PRE_IO |
14987 | WRITE_LONG_F(adr, res) |
14988 | POST_IO |
14989 | RET(24) |
14990 | } |
14991 | |
14992 | // CLR |
14993 | OPCODE(0x42B0) |
14994 | { |
14995 | u32 adr, res; |
14996 | u32 src, dst; |
14997 | |
14998 | adr = AREG((Opcode >> 0) & 7); |
14999 | DECODE_EXT_WORD |
15000 | res = 0; |
15001 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15002 | PRE_IO |
15003 | WRITE_LONG_F(adr, res) |
15004 | POST_IO |
15005 | RET(26) |
15006 | } |
15007 | |
15008 | // CLR |
15009 | OPCODE(0x42B8) |
15010 | { |
15011 | u32 adr, res; |
15012 | u32 src, dst; |
15013 | |
15014 | FETCH_SWORD(adr); |
15015 | res = 0; |
15016 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15017 | PRE_IO |
15018 | WRITE_LONG_F(adr, res) |
15019 | POST_IO |
15020 | RET(24) |
15021 | } |
15022 | |
15023 | // CLR |
15024 | OPCODE(0x42B9) |
15025 | { |
15026 | u32 adr, res; |
15027 | u32 src, dst; |
15028 | |
15029 | FETCH_LONG(adr); |
15030 | res = 0; |
15031 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15032 | PRE_IO |
15033 | WRITE_LONG_F(adr, res) |
15034 | POST_IO |
15035 | RET(28) |
15036 | } |
15037 | |
15038 | // CLR |
15039 | OPCODE(0x429F) |
15040 | { |
15041 | u32 adr, res; |
15042 | u32 src, dst; |
15043 | |
15044 | adr = AREG(7); |
15045 | AREG(7) += 4; |
15046 | res = 0; |
15047 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15048 | PRE_IO |
15049 | WRITE_LONG_F(adr, res) |
15050 | POST_IO |
15051 | RET(20) |
15052 | } |
15053 | |
15054 | // CLR |
15055 | OPCODE(0x42A7) |
15056 | { |
15057 | u32 adr, res; |
15058 | u32 src, dst; |
15059 | |
15060 | adr = AREG(7) - 4; |
15061 | AREG(7) = adr; |
15062 | res = 0; |
15063 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15064 | PRE_IO |
15065 | WRITE_LONG_F(adr, res) |
15066 | POST_IO |
15067 | RET(22) |
15068 | } |
15069 | |
15070 | // NEG |
15071 | OPCODE(0x4400) |
15072 | { |
15073 | u32 adr, res; |
15074 | u32 src, dst; |
15075 | |
15076 | src = DREGu8((Opcode >> 0) & 7); |
15077 | res = -src; |
15078 | flag_V = res & src; |
15079 | flag_N = flag_X = flag_C = res; |
15080 | flag_NotZ = res & 0xFF; |
15081 | DREGu8((Opcode >> 0) & 7) = res; |
15082 | RET(4) |
15083 | } |
15084 | |
15085 | // NEG |
15086 | OPCODE(0x4410) |
15087 | { |
15088 | u32 adr, res; |
15089 | u32 src, dst; |
15090 | |
15091 | adr = AREG((Opcode >> 0) & 7); |
15092 | PRE_IO |
15093 | READ_BYTE_F(adr, src) |
15094 | res = -src; |
15095 | flag_V = res & src; |
15096 | flag_N = flag_X = flag_C = res; |
15097 | flag_NotZ = res & 0xFF; |
15098 | WRITE_BYTE_F(adr, res) |
15099 | POST_IO |
15100 | RET(12) |
15101 | } |
15102 | |
15103 | // NEG |
15104 | OPCODE(0x4418) |
15105 | { |
15106 | u32 adr, res; |
15107 | u32 src, dst; |
15108 | |
15109 | adr = AREG((Opcode >> 0) & 7); |
15110 | AREG((Opcode >> 0) & 7) += 1; |
15111 | PRE_IO |
15112 | READ_BYTE_F(adr, src) |
15113 | res = -src; |
15114 | flag_V = res & src; |
15115 | flag_N = flag_X = flag_C = res; |
15116 | flag_NotZ = res & 0xFF; |
15117 | WRITE_BYTE_F(adr, res) |
15118 | POST_IO |
15119 | RET(12) |
15120 | } |
15121 | |
15122 | // NEG |
15123 | OPCODE(0x4420) |
15124 | { |
15125 | u32 adr, res; |
15126 | u32 src, dst; |
15127 | |
15128 | adr = AREG((Opcode >> 0) & 7) - 1; |
15129 | AREG((Opcode >> 0) & 7) = adr; |
15130 | PRE_IO |
15131 | READ_BYTE_F(adr, src) |
15132 | res = -src; |
15133 | flag_V = res & src; |
15134 | flag_N = flag_X = flag_C = res; |
15135 | flag_NotZ = res & 0xFF; |
15136 | WRITE_BYTE_F(adr, res) |
15137 | POST_IO |
15138 | RET(14) |
15139 | } |
15140 | |
15141 | // NEG |
15142 | OPCODE(0x4428) |
15143 | { |
15144 | u32 adr, res; |
15145 | u32 src, dst; |
15146 | |
15147 | FETCH_SWORD(adr); |
15148 | adr += AREG((Opcode >> 0) & 7); |
15149 | PRE_IO |
15150 | READ_BYTE_F(adr, src) |
15151 | res = -src; |
15152 | flag_V = res & src; |
15153 | flag_N = flag_X = flag_C = res; |
15154 | flag_NotZ = res & 0xFF; |
15155 | WRITE_BYTE_F(adr, res) |
15156 | POST_IO |
15157 | RET(16) |
15158 | } |
15159 | |
15160 | // NEG |
15161 | OPCODE(0x4430) |
15162 | { |
15163 | u32 adr, res; |
15164 | u32 src, dst; |
15165 | |
15166 | adr = AREG((Opcode >> 0) & 7); |
15167 | DECODE_EXT_WORD |
15168 | PRE_IO |
15169 | READ_BYTE_F(adr, src) |
15170 | res = -src; |
15171 | flag_V = res & src; |
15172 | flag_N = flag_X = flag_C = res; |
15173 | flag_NotZ = res & 0xFF; |
15174 | WRITE_BYTE_F(adr, res) |
15175 | POST_IO |
15176 | RET(18) |
15177 | } |
15178 | |
15179 | // NEG |
15180 | OPCODE(0x4438) |
15181 | { |
15182 | u32 adr, res; |
15183 | u32 src, dst; |
15184 | |
15185 | FETCH_SWORD(adr); |
15186 | PRE_IO |
15187 | READ_BYTE_F(adr, src) |
15188 | res = -src; |
15189 | flag_V = res & src; |
15190 | flag_N = flag_X = flag_C = res; |
15191 | flag_NotZ = res & 0xFF; |
15192 | WRITE_BYTE_F(adr, res) |
15193 | POST_IO |
15194 | RET(16) |
15195 | } |
15196 | |
15197 | // NEG |
15198 | OPCODE(0x4439) |
15199 | { |
15200 | u32 adr, res; |
15201 | u32 src, dst; |
15202 | |
15203 | FETCH_LONG(adr); |
15204 | PRE_IO |
15205 | READ_BYTE_F(adr, src) |
15206 | res = -src; |
15207 | flag_V = res & src; |
15208 | flag_N = flag_X = flag_C = res; |
15209 | flag_NotZ = res & 0xFF; |
15210 | WRITE_BYTE_F(adr, res) |
15211 | POST_IO |
15212 | RET(20) |
15213 | } |
15214 | |
15215 | // NEG |
15216 | OPCODE(0x441F) |
15217 | { |
15218 | u32 adr, res; |
15219 | u32 src, dst; |
15220 | |
15221 | adr = AREG(7); |
15222 | AREG(7) += 2; |
15223 | PRE_IO |
15224 | READ_BYTE_F(adr, src) |
15225 | res = -src; |
15226 | flag_V = res & src; |
15227 | flag_N = flag_X = flag_C = res; |
15228 | flag_NotZ = res & 0xFF; |
15229 | WRITE_BYTE_F(adr, res) |
15230 | POST_IO |
15231 | RET(12) |
15232 | } |
15233 | |
15234 | // NEG |
15235 | OPCODE(0x4427) |
15236 | { |
15237 | u32 adr, res; |
15238 | u32 src, dst; |
15239 | |
15240 | adr = AREG(7) - 2; |
15241 | AREG(7) = adr; |
15242 | PRE_IO |
15243 | READ_BYTE_F(adr, src) |
15244 | res = -src; |
15245 | flag_V = res & src; |
15246 | flag_N = flag_X = flag_C = res; |
15247 | flag_NotZ = res & 0xFF; |
15248 | WRITE_BYTE_F(adr, res) |
15249 | POST_IO |
15250 | RET(14) |
15251 | } |
15252 | |
15253 | // NEG |
15254 | OPCODE(0x4440) |
15255 | { |
15256 | u32 adr, res; |
15257 | u32 src, dst; |
15258 | |
15259 | src = DREGu16((Opcode >> 0) & 7); |
15260 | res = -src; |
15261 | flag_V = (res & src) >> 8; |
15262 | flag_N = flag_X = flag_C = res >> 8; |
15263 | flag_NotZ = res & 0xFFFF; |
15264 | DREGu16((Opcode >> 0) & 7) = res; |
15265 | RET(4) |
15266 | } |
15267 | |
15268 | // NEG |
15269 | OPCODE(0x4450) |
15270 | { |
15271 | u32 adr, res; |
15272 | u32 src, dst; |
15273 | |
15274 | adr = AREG((Opcode >> 0) & 7); |
15275 | PRE_IO |
15276 | READ_WORD_F(adr, src) |
15277 | res = -src; |
15278 | flag_V = (res & src) >> 8; |
15279 | flag_N = flag_X = flag_C = res >> 8; |
15280 | flag_NotZ = res & 0xFFFF; |
15281 | WRITE_WORD_F(adr, res) |
15282 | POST_IO |
15283 | RET(12) |
15284 | } |
15285 | |
15286 | // NEG |
15287 | OPCODE(0x4458) |
15288 | { |
15289 | u32 adr, res; |
15290 | u32 src, dst; |
15291 | |
15292 | adr = AREG((Opcode >> 0) & 7); |
15293 | AREG((Opcode >> 0) & 7) += 2; |
15294 | PRE_IO |
15295 | READ_WORD_F(adr, src) |
15296 | res = -src; |
15297 | flag_V = (res & src) >> 8; |
15298 | flag_N = flag_X = flag_C = res >> 8; |
15299 | flag_NotZ = res & 0xFFFF; |
15300 | WRITE_WORD_F(adr, res) |
15301 | POST_IO |
15302 | RET(12) |
15303 | } |
15304 | |
15305 | // NEG |
15306 | OPCODE(0x4460) |
15307 | { |
15308 | u32 adr, res; |
15309 | u32 src, dst; |
15310 | |
15311 | adr = AREG((Opcode >> 0) & 7) - 2; |
15312 | AREG((Opcode >> 0) & 7) = adr; |
15313 | PRE_IO |
15314 | READ_WORD_F(adr, src) |
15315 | res = -src; |
15316 | flag_V = (res & src) >> 8; |
15317 | flag_N = flag_X = flag_C = res >> 8; |
15318 | flag_NotZ = res & 0xFFFF; |
15319 | WRITE_WORD_F(adr, res) |
15320 | POST_IO |
15321 | RET(14) |
15322 | } |
15323 | |
15324 | // NEG |
15325 | OPCODE(0x4468) |
15326 | { |
15327 | u32 adr, res; |
15328 | u32 src, dst; |
15329 | |
15330 | FETCH_SWORD(adr); |
15331 | adr += AREG((Opcode >> 0) & 7); |
15332 | PRE_IO |
15333 | READ_WORD_F(adr, src) |
15334 | res = -src; |
15335 | flag_V = (res & src) >> 8; |
15336 | flag_N = flag_X = flag_C = res >> 8; |
15337 | flag_NotZ = res & 0xFFFF; |
15338 | WRITE_WORD_F(adr, res) |
15339 | POST_IO |
15340 | RET(16) |
15341 | } |
15342 | |
15343 | // NEG |
15344 | OPCODE(0x4470) |
15345 | { |
15346 | u32 adr, res; |
15347 | u32 src, dst; |
15348 | |
15349 | adr = AREG((Opcode >> 0) & 7); |
15350 | DECODE_EXT_WORD |
15351 | PRE_IO |
15352 | READ_WORD_F(adr, src) |
15353 | res = -src; |
15354 | flag_V = (res & src) >> 8; |
15355 | flag_N = flag_X = flag_C = res >> 8; |
15356 | flag_NotZ = res & 0xFFFF; |
15357 | WRITE_WORD_F(adr, res) |
15358 | POST_IO |
15359 | RET(18) |
15360 | } |
15361 | |
15362 | // NEG |
15363 | OPCODE(0x4478) |
15364 | { |
15365 | u32 adr, res; |
15366 | u32 src, dst; |
15367 | |
15368 | FETCH_SWORD(adr); |
15369 | PRE_IO |
15370 | READ_WORD_F(adr, src) |
15371 | res = -src; |
15372 | flag_V = (res & src) >> 8; |
15373 | flag_N = flag_X = flag_C = res >> 8; |
15374 | flag_NotZ = res & 0xFFFF; |
15375 | WRITE_WORD_F(adr, res) |
15376 | POST_IO |
15377 | RET(16) |
15378 | } |
15379 | |
15380 | // NEG |
15381 | OPCODE(0x4479) |
15382 | { |
15383 | u32 adr, res; |
15384 | u32 src, dst; |
15385 | |
15386 | FETCH_LONG(adr); |
15387 | PRE_IO |
15388 | READ_WORD_F(adr, src) |
15389 | res = -src; |
15390 | flag_V = (res & src) >> 8; |
15391 | flag_N = flag_X = flag_C = res >> 8; |
15392 | flag_NotZ = res & 0xFFFF; |
15393 | WRITE_WORD_F(adr, res) |
15394 | POST_IO |
15395 | RET(20) |
15396 | } |
15397 | |
15398 | // NEG |
15399 | OPCODE(0x445F) |
15400 | { |
15401 | u32 adr, res; |
15402 | u32 src, dst; |
15403 | |
15404 | adr = AREG(7); |
15405 | AREG(7) += 2; |
15406 | PRE_IO |
15407 | READ_WORD_F(adr, src) |
15408 | res = -src; |
15409 | flag_V = (res & src) >> 8; |
15410 | flag_N = flag_X = flag_C = res >> 8; |
15411 | flag_NotZ = res & 0xFFFF; |
15412 | WRITE_WORD_F(adr, res) |
15413 | POST_IO |
15414 | RET(12) |
15415 | } |
15416 | |
15417 | // NEG |
15418 | OPCODE(0x4467) |
15419 | { |
15420 | u32 adr, res; |
15421 | u32 src, dst; |
15422 | |
15423 | adr = AREG(7) - 2; |
15424 | AREG(7) = adr; |
15425 | PRE_IO |
15426 | READ_WORD_F(adr, src) |
15427 | res = -src; |
15428 | flag_V = (res & src) >> 8; |
15429 | flag_N = flag_X = flag_C = res >> 8; |
15430 | flag_NotZ = res & 0xFFFF; |
15431 | WRITE_WORD_F(adr, res) |
15432 | POST_IO |
15433 | RET(14) |
15434 | } |
15435 | |
15436 | // NEG |
15437 | OPCODE(0x4480) |
15438 | { |
15439 | u32 adr, res; |
15440 | u32 src, dst; |
15441 | |
15442 | src = DREGu32((Opcode >> 0) & 7); |
15443 | res = -src; |
15444 | flag_NotZ = res; |
15445 | flag_V = (res & src) >> 24; |
15446 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15447 | flag_N = res >> 24; |
15448 | DREGu32((Opcode >> 0) & 7) = res; |
15449 | RET(6) |
15450 | } |
15451 | |
15452 | // NEG |
15453 | OPCODE(0x4490) |
15454 | { |
15455 | u32 adr, res; |
15456 | u32 src, dst; |
15457 | |
15458 | adr = AREG((Opcode >> 0) & 7); |
15459 | PRE_IO |
15460 | READ_LONG_F(adr, src) |
15461 | res = -src; |
15462 | flag_NotZ = res; |
15463 | flag_V = (res & src) >> 24; |
15464 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15465 | flag_N = res >> 24; |
15466 | WRITE_LONG_F(adr, res) |
15467 | POST_IO |
15468 | RET(20) |
15469 | } |
15470 | |
15471 | // NEG |
15472 | OPCODE(0x4498) |
15473 | { |
15474 | u32 adr, res; |
15475 | u32 src, dst; |
15476 | |
15477 | adr = AREG((Opcode >> 0) & 7); |
15478 | AREG((Opcode >> 0) & 7) += 4; |
15479 | PRE_IO |
15480 | READ_LONG_F(adr, src) |
15481 | res = -src; |
15482 | flag_NotZ = res; |
15483 | flag_V = (res & src) >> 24; |
15484 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15485 | flag_N = res >> 24; |
15486 | WRITE_LONG_F(adr, res) |
15487 | POST_IO |
15488 | RET(20) |
15489 | } |
15490 | |
15491 | // NEG |
15492 | OPCODE(0x44A0) |
15493 | { |
15494 | u32 adr, res; |
15495 | u32 src, dst; |
15496 | |
15497 | adr = AREG((Opcode >> 0) & 7) - 4; |
15498 | AREG((Opcode >> 0) & 7) = adr; |
15499 | PRE_IO |
15500 | READ_LONG_F(adr, src) |
15501 | res = -src; |
15502 | flag_NotZ = res; |
15503 | flag_V = (res & src) >> 24; |
15504 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15505 | flag_N = res >> 24; |
15506 | WRITE_LONG_F(adr, res) |
15507 | POST_IO |
15508 | RET(22) |
15509 | } |
15510 | |
15511 | // NEG |
15512 | OPCODE(0x44A8) |
15513 | { |
15514 | u32 adr, res; |
15515 | u32 src, dst; |
15516 | |
15517 | FETCH_SWORD(adr); |
15518 | adr += AREG((Opcode >> 0) & 7); |
15519 | PRE_IO |
15520 | READ_LONG_F(adr, src) |
15521 | res = -src; |
15522 | flag_NotZ = res; |
15523 | flag_V = (res & src) >> 24; |
15524 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15525 | flag_N = res >> 24; |
15526 | WRITE_LONG_F(adr, res) |
15527 | POST_IO |
15528 | RET(24) |
15529 | } |
15530 | |
15531 | // NEG |
15532 | OPCODE(0x44B0) |
15533 | { |
15534 | u32 adr, res; |
15535 | u32 src, dst; |
15536 | |
15537 | adr = AREG((Opcode >> 0) & 7); |
15538 | DECODE_EXT_WORD |
15539 | PRE_IO |
15540 | READ_LONG_F(adr, src) |
15541 | res = -src; |
15542 | flag_NotZ = res; |
15543 | flag_V = (res & src) >> 24; |
15544 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15545 | flag_N = res >> 24; |
15546 | WRITE_LONG_F(adr, res) |
15547 | POST_IO |
15548 | RET(26) |
15549 | } |
15550 | |
15551 | // NEG |
15552 | OPCODE(0x44B8) |
15553 | { |
15554 | u32 adr, res; |
15555 | u32 src, dst; |
15556 | |
15557 | FETCH_SWORD(adr); |
15558 | PRE_IO |
15559 | READ_LONG_F(adr, src) |
15560 | res = -src; |
15561 | flag_NotZ = res; |
15562 | flag_V = (res & src) >> 24; |
15563 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15564 | flag_N = res >> 24; |
15565 | WRITE_LONG_F(adr, res) |
15566 | POST_IO |
15567 | RET(24) |
15568 | } |
15569 | |
15570 | // NEG |
15571 | OPCODE(0x44B9) |
15572 | { |
15573 | u32 adr, res; |
15574 | u32 src, dst; |
15575 | |
15576 | FETCH_LONG(adr); |
15577 | PRE_IO |
15578 | READ_LONG_F(adr, src) |
15579 | res = -src; |
15580 | flag_NotZ = res; |
15581 | flag_V = (res & src) >> 24; |
15582 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15583 | flag_N = res >> 24; |
15584 | WRITE_LONG_F(adr, res) |
15585 | POST_IO |
15586 | RET(28) |
15587 | } |
15588 | |
15589 | // NEG |
15590 | OPCODE(0x449F) |
15591 | { |
15592 | u32 adr, res; |
15593 | u32 src, dst; |
15594 | |
15595 | adr = AREG(7); |
15596 | AREG(7) += 4; |
15597 | PRE_IO |
15598 | READ_LONG_F(adr, src) |
15599 | res = -src; |
15600 | flag_NotZ = res; |
15601 | flag_V = (res & src) >> 24; |
15602 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15603 | flag_N = res >> 24; |
15604 | WRITE_LONG_F(adr, res) |
15605 | POST_IO |
15606 | RET(20) |
15607 | } |
15608 | |
15609 | // NEG |
15610 | OPCODE(0x44A7) |
15611 | { |
15612 | u32 adr, res; |
15613 | u32 src, dst; |
15614 | |
15615 | adr = AREG(7) - 4; |
15616 | AREG(7) = adr; |
15617 | PRE_IO |
15618 | READ_LONG_F(adr, src) |
15619 | res = -src; |
15620 | flag_NotZ = res; |
15621 | flag_V = (res & src) >> 24; |
15622 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15623 | flag_N = res >> 24; |
15624 | WRITE_LONG_F(adr, res) |
15625 | POST_IO |
15626 | RET(22) |
15627 | } |
15628 | |
15629 | // NOT |
15630 | OPCODE(0x4600) |
15631 | { |
15632 | u32 adr, res; |
15633 | u32 src, dst; |
15634 | |
15635 | src = DREGu8((Opcode >> 0) & 7); |
15636 | res = ~src; |
15637 | flag_C = 0; |
15638 | flag_V = 0; |
15639 | flag_N = res; |
15640 | flag_NotZ = res & 0xFF; |
15641 | DREGu8((Opcode >> 0) & 7) = res; |
15642 | RET(4) |
15643 | } |
15644 | |
15645 | // NOT |
15646 | OPCODE(0x4610) |
15647 | { |
15648 | u32 adr, res; |
15649 | u32 src, dst; |
15650 | |
15651 | adr = AREG((Opcode >> 0) & 7); |
15652 | PRE_IO |
15653 | READ_BYTE_F(adr, src) |
15654 | res = ~src; |
15655 | flag_C = 0; |
15656 | flag_V = 0; |
15657 | flag_N = res; |
15658 | flag_NotZ = res & 0xFF; |
15659 | WRITE_BYTE_F(adr, res) |
15660 | POST_IO |
15661 | RET(12) |
15662 | } |
15663 | |
15664 | // NOT |
15665 | OPCODE(0x4618) |
15666 | { |
15667 | u32 adr, res; |
15668 | u32 src, dst; |
15669 | |
15670 | adr = AREG((Opcode >> 0) & 7); |
15671 | AREG((Opcode >> 0) & 7) += 1; |
15672 | PRE_IO |
15673 | READ_BYTE_F(adr, src) |
15674 | res = ~src; |
15675 | flag_C = 0; |
15676 | flag_V = 0; |
15677 | flag_N = res; |
15678 | flag_NotZ = res & 0xFF; |
15679 | WRITE_BYTE_F(adr, res) |
15680 | POST_IO |
15681 | RET(12) |
15682 | } |
15683 | |
15684 | // NOT |
15685 | OPCODE(0x4620) |
15686 | { |
15687 | u32 adr, res; |
15688 | u32 src, dst; |
15689 | |
15690 | adr = AREG((Opcode >> 0) & 7) - 1; |
15691 | AREG((Opcode >> 0) & 7) = adr; |
15692 | PRE_IO |
15693 | READ_BYTE_F(adr, src) |
15694 | res = ~src; |
15695 | flag_C = 0; |
15696 | flag_V = 0; |
15697 | flag_N = res; |
15698 | flag_NotZ = res & 0xFF; |
15699 | WRITE_BYTE_F(adr, res) |
15700 | POST_IO |
15701 | RET(14) |
15702 | } |
15703 | |
15704 | // NOT |
15705 | OPCODE(0x4628) |
15706 | { |
15707 | u32 adr, res; |
15708 | u32 src, dst; |
15709 | |
15710 | FETCH_SWORD(adr); |
15711 | adr += AREG((Opcode >> 0) & 7); |
15712 | PRE_IO |
15713 | READ_BYTE_F(adr, src) |
15714 | res = ~src; |
15715 | flag_C = 0; |
15716 | flag_V = 0; |
15717 | flag_N = res; |
15718 | flag_NotZ = res & 0xFF; |
15719 | WRITE_BYTE_F(adr, res) |
15720 | POST_IO |
15721 | RET(16) |
15722 | } |
15723 | |
15724 | // NOT |
15725 | OPCODE(0x4630) |
15726 | { |
15727 | u32 adr, res; |
15728 | u32 src, dst; |
15729 | |
15730 | adr = AREG((Opcode >> 0) & 7); |
15731 | DECODE_EXT_WORD |
15732 | PRE_IO |
15733 | READ_BYTE_F(adr, src) |
15734 | res = ~src; |
15735 | flag_C = 0; |
15736 | flag_V = 0; |
15737 | flag_N = res; |
15738 | flag_NotZ = res & 0xFF; |
15739 | WRITE_BYTE_F(adr, res) |
15740 | POST_IO |
15741 | RET(18) |
15742 | } |
15743 | |
15744 | // NOT |
15745 | OPCODE(0x4638) |
15746 | { |
15747 | u32 adr, res; |
15748 | u32 src, dst; |
15749 | |
15750 | FETCH_SWORD(adr); |
15751 | PRE_IO |
15752 | READ_BYTE_F(adr, src) |
15753 | res = ~src; |
15754 | flag_C = 0; |
15755 | flag_V = 0; |
15756 | flag_N = res; |
15757 | flag_NotZ = res & 0xFF; |
15758 | WRITE_BYTE_F(adr, res) |
15759 | POST_IO |
15760 | RET(16) |
15761 | } |
15762 | |
15763 | // NOT |
15764 | OPCODE(0x4639) |
15765 | { |
15766 | u32 adr, res; |
15767 | u32 src, dst; |
15768 | |
15769 | FETCH_LONG(adr); |
15770 | PRE_IO |
15771 | READ_BYTE_F(adr, src) |
15772 | res = ~src; |
15773 | flag_C = 0; |
15774 | flag_V = 0; |
15775 | flag_N = res; |
15776 | flag_NotZ = res & 0xFF; |
15777 | WRITE_BYTE_F(adr, res) |
15778 | POST_IO |
15779 | RET(20) |
15780 | } |
15781 | |
15782 | // NOT |
15783 | OPCODE(0x461F) |
15784 | { |
15785 | u32 adr, res; |
15786 | u32 src, dst; |
15787 | |
15788 | adr = AREG(7); |
15789 | AREG(7) += 2; |
15790 | PRE_IO |
15791 | READ_BYTE_F(adr, src) |
15792 | res = ~src; |
15793 | flag_C = 0; |
15794 | flag_V = 0; |
15795 | flag_N = res; |
15796 | flag_NotZ = res & 0xFF; |
15797 | WRITE_BYTE_F(adr, res) |
15798 | POST_IO |
15799 | RET(12) |
15800 | } |
15801 | |
15802 | // NOT |
15803 | OPCODE(0x4627) |
15804 | { |
15805 | u32 adr, res; |
15806 | u32 src, dst; |
15807 | |
15808 | adr = AREG(7) - 2; |
15809 | AREG(7) = adr; |
15810 | PRE_IO |
15811 | READ_BYTE_F(adr, src) |
15812 | res = ~src; |
15813 | flag_C = 0; |
15814 | flag_V = 0; |
15815 | flag_N = res; |
15816 | flag_NotZ = res & 0xFF; |
15817 | WRITE_BYTE_F(adr, res) |
15818 | POST_IO |
15819 | RET(14) |
15820 | } |
15821 | |
15822 | // NOT |
15823 | OPCODE(0x4640) |
15824 | { |
15825 | u32 adr, res; |
15826 | u32 src, dst; |
15827 | |
15828 | src = DREGu16((Opcode >> 0) & 7); |
15829 | res = ~src; |
15830 | flag_C = 0; |
15831 | flag_V = 0; |
15832 | flag_NotZ = res & 0xFFFF; |
15833 | flag_N = res >> 8; |
15834 | DREGu16((Opcode >> 0) & 7) = res; |
15835 | RET(4) |
15836 | } |
15837 | |
15838 | // NOT |
15839 | OPCODE(0x4650) |
15840 | { |
15841 | u32 adr, res; |
15842 | u32 src, dst; |
15843 | |
15844 | adr = AREG((Opcode >> 0) & 7); |
15845 | PRE_IO |
15846 | READ_WORD_F(adr, src) |
15847 | res = ~src; |
15848 | flag_C = 0; |
15849 | flag_V = 0; |
15850 | flag_NotZ = res & 0xFFFF; |
15851 | flag_N = res >> 8; |
15852 | WRITE_WORD_F(adr, res) |
15853 | POST_IO |
15854 | RET(12) |
15855 | } |
15856 | |
15857 | // NOT |
15858 | OPCODE(0x4658) |
15859 | { |
15860 | u32 adr, res; |
15861 | u32 src, dst; |
15862 | |
15863 | adr = AREG((Opcode >> 0) & 7); |
15864 | AREG((Opcode >> 0) & 7) += 2; |
15865 | PRE_IO |
15866 | READ_WORD_F(adr, src) |
15867 | res = ~src; |
15868 | flag_C = 0; |
15869 | flag_V = 0; |
15870 | flag_NotZ = res & 0xFFFF; |
15871 | flag_N = res >> 8; |
15872 | WRITE_WORD_F(adr, res) |
15873 | POST_IO |
15874 | RET(12) |
15875 | } |
15876 | |
15877 | // NOT |
15878 | OPCODE(0x4660) |
15879 | { |
15880 | u32 adr, res; |
15881 | u32 src, dst; |
15882 | |
15883 | adr = AREG((Opcode >> 0) & 7) - 2; |
15884 | AREG((Opcode >> 0) & 7) = adr; |
15885 | PRE_IO |
15886 | READ_WORD_F(adr, src) |
15887 | res = ~src; |
15888 | flag_C = 0; |
15889 | flag_V = 0; |
15890 | flag_NotZ = res & 0xFFFF; |
15891 | flag_N = res >> 8; |
15892 | WRITE_WORD_F(adr, res) |
15893 | POST_IO |
15894 | RET(14) |
15895 | } |
15896 | |
15897 | // NOT |
15898 | OPCODE(0x4668) |
15899 | { |
15900 | u32 adr, res; |
15901 | u32 src, dst; |
15902 | |
15903 | FETCH_SWORD(adr); |
15904 | adr += AREG((Opcode >> 0) & 7); |
15905 | PRE_IO |
15906 | READ_WORD_F(adr, src) |
15907 | res = ~src; |
15908 | flag_C = 0; |
15909 | flag_V = 0; |
15910 | flag_NotZ = res & 0xFFFF; |
15911 | flag_N = res >> 8; |
15912 | WRITE_WORD_F(adr, res) |
15913 | POST_IO |
15914 | RET(16) |
15915 | } |
15916 | |
15917 | // NOT |
15918 | OPCODE(0x4670) |
15919 | { |
15920 | u32 adr, res; |
15921 | u32 src, dst; |
15922 | |
15923 | adr = AREG((Opcode >> 0) & 7); |
15924 | DECODE_EXT_WORD |
15925 | PRE_IO |
15926 | READ_WORD_F(adr, src) |
15927 | res = ~src; |
15928 | flag_C = 0; |
15929 | flag_V = 0; |
15930 | flag_NotZ = res & 0xFFFF; |
15931 | flag_N = res >> 8; |
15932 | WRITE_WORD_F(adr, res) |
15933 | POST_IO |
15934 | RET(18) |
15935 | } |
15936 | |
15937 | // NOT |
15938 | OPCODE(0x4678) |
15939 | { |
15940 | u32 adr, res; |
15941 | u32 src, dst; |
15942 | |
15943 | FETCH_SWORD(adr); |
15944 | PRE_IO |
15945 | READ_WORD_F(adr, src) |
15946 | res = ~src; |
15947 | flag_C = 0; |
15948 | flag_V = 0; |
15949 | flag_NotZ = res & 0xFFFF; |
15950 | flag_N = res >> 8; |
15951 | WRITE_WORD_F(adr, res) |
15952 | POST_IO |
15953 | RET(16) |
15954 | } |
15955 | |
15956 | // NOT |
15957 | OPCODE(0x4679) |
15958 | { |
15959 | u32 adr, res; |
15960 | u32 src, dst; |
15961 | |
15962 | FETCH_LONG(adr); |
15963 | PRE_IO |
15964 | READ_WORD_F(adr, src) |
15965 | res = ~src; |
15966 | flag_C = 0; |
15967 | flag_V = 0; |
15968 | flag_NotZ = res & 0xFFFF; |
15969 | flag_N = res >> 8; |
15970 | WRITE_WORD_F(adr, res) |
15971 | POST_IO |
15972 | RET(20) |
15973 | } |
15974 | |
15975 | // NOT |
15976 | OPCODE(0x465F) |
15977 | { |
15978 | u32 adr, res; |
15979 | u32 src, dst; |
15980 | |
15981 | adr = AREG(7); |
15982 | AREG(7) += 2; |
15983 | PRE_IO |
15984 | READ_WORD_F(adr, src) |
15985 | res = ~src; |
15986 | flag_C = 0; |
15987 | flag_V = 0; |
15988 | flag_NotZ = res & 0xFFFF; |
15989 | flag_N = res >> 8; |
15990 | WRITE_WORD_F(adr, res) |
15991 | POST_IO |
15992 | RET(12) |
15993 | } |
15994 | |
15995 | // NOT |
15996 | OPCODE(0x4667) |
15997 | { |
15998 | u32 adr, res; |
15999 | u32 src, dst; |
16000 | |
16001 | adr = AREG(7) - 2; |
16002 | AREG(7) = adr; |
16003 | PRE_IO |
16004 | READ_WORD_F(adr, src) |
16005 | res = ~src; |
16006 | flag_C = 0; |
16007 | flag_V = 0; |
16008 | flag_NotZ = res & 0xFFFF; |
16009 | flag_N = res >> 8; |
16010 | WRITE_WORD_F(adr, res) |
16011 | POST_IO |
16012 | RET(14) |
16013 | } |
16014 | |
16015 | // NOT |
16016 | OPCODE(0x4680) |
16017 | { |
16018 | u32 adr, res; |
16019 | u32 src, dst; |
16020 | |
16021 | src = DREGu32((Opcode >> 0) & 7); |
16022 | res = ~src; |
16023 | flag_C = 0; |
16024 | flag_V = 0; |
16025 | flag_NotZ = res; |
16026 | flag_N = res >> 24; |
16027 | DREGu32((Opcode >> 0) & 7) = res; |
16028 | RET(6) |
16029 | } |
16030 | |
16031 | // NOT |
16032 | OPCODE(0x4690) |
16033 | { |
16034 | u32 adr, res; |
16035 | u32 src, dst; |
16036 | |
16037 | adr = AREG((Opcode >> 0) & 7); |
16038 | PRE_IO |
16039 | READ_LONG_F(adr, src) |
16040 | res = ~src; |
16041 | flag_C = 0; |
16042 | flag_V = 0; |
16043 | flag_NotZ = res; |
16044 | flag_N = res >> 24; |
16045 | WRITE_LONG_F(adr, res) |
16046 | POST_IO |
16047 | RET(20) |
16048 | } |
16049 | |
16050 | // NOT |
16051 | OPCODE(0x4698) |
16052 | { |
16053 | u32 adr, res; |
16054 | u32 src, dst; |
16055 | |
16056 | adr = AREG((Opcode >> 0) & 7); |
16057 | AREG((Opcode >> 0) & 7) += 4; |
16058 | PRE_IO |
16059 | READ_LONG_F(adr, src) |
16060 | res = ~src; |
16061 | flag_C = 0; |
16062 | flag_V = 0; |
16063 | flag_NotZ = res; |
16064 | flag_N = res >> 24; |
16065 | WRITE_LONG_F(adr, res) |
16066 | POST_IO |
16067 | RET(20) |
16068 | } |
16069 | |
16070 | // NOT |
16071 | OPCODE(0x46A0) |
16072 | { |
16073 | u32 adr, res; |
16074 | u32 src, dst; |
16075 | |
16076 | adr = AREG((Opcode >> 0) & 7) - 4; |
16077 | AREG((Opcode >> 0) & 7) = adr; |
16078 | PRE_IO |
16079 | READ_LONG_F(adr, src) |
16080 | res = ~src; |
16081 | flag_C = 0; |
16082 | flag_V = 0; |
16083 | flag_NotZ = res; |
16084 | flag_N = res >> 24; |
16085 | WRITE_LONG_F(adr, res) |
16086 | POST_IO |
16087 | RET(22) |
16088 | } |
16089 | |
16090 | // NOT |
16091 | OPCODE(0x46A8) |
16092 | { |
16093 | u32 adr, res; |
16094 | u32 src, dst; |
16095 | |
16096 | FETCH_SWORD(adr); |
16097 | adr += AREG((Opcode >> 0) & 7); |
16098 | PRE_IO |
16099 | READ_LONG_F(adr, src) |
16100 | res = ~src; |
16101 | flag_C = 0; |
16102 | flag_V = 0; |
16103 | flag_NotZ = res; |
16104 | flag_N = res >> 24; |
16105 | WRITE_LONG_F(adr, res) |
16106 | POST_IO |
16107 | RET(24) |
16108 | } |
16109 | |
16110 | // NOT |
16111 | OPCODE(0x46B0) |
16112 | { |
16113 | u32 adr, res; |
16114 | u32 src, dst; |
16115 | |
16116 | adr = AREG((Opcode >> 0) & 7); |
16117 | DECODE_EXT_WORD |
16118 | PRE_IO |
16119 | READ_LONG_F(adr, src) |
16120 | res = ~src; |
16121 | flag_C = 0; |
16122 | flag_V = 0; |
16123 | flag_NotZ = res; |
16124 | flag_N = res >> 24; |
16125 | WRITE_LONG_F(adr, res) |
16126 | POST_IO |
16127 | RET(26) |
16128 | } |
16129 | |
16130 | // NOT |
16131 | OPCODE(0x46B8) |
16132 | { |
16133 | u32 adr, res; |
16134 | u32 src, dst; |
16135 | |
16136 | FETCH_SWORD(adr); |
16137 | PRE_IO |
16138 | READ_LONG_F(adr, src) |
16139 | res = ~src; |
16140 | flag_C = 0; |
16141 | flag_V = 0; |
16142 | flag_NotZ = res; |
16143 | flag_N = res >> 24; |
16144 | WRITE_LONG_F(adr, res) |
16145 | POST_IO |
16146 | RET(24) |
16147 | } |
16148 | |
16149 | // NOT |
16150 | OPCODE(0x46B9) |
16151 | { |
16152 | u32 adr, res; |
16153 | u32 src, dst; |
16154 | |
16155 | FETCH_LONG(adr); |
16156 | PRE_IO |
16157 | READ_LONG_F(adr, src) |
16158 | res = ~src; |
16159 | flag_C = 0; |
16160 | flag_V = 0; |
16161 | flag_NotZ = res; |
16162 | flag_N = res >> 24; |
16163 | WRITE_LONG_F(adr, res) |
16164 | POST_IO |
16165 | RET(28) |
16166 | } |
16167 | |
16168 | // NOT |
16169 | OPCODE(0x469F) |
16170 | { |
16171 | u32 adr, res; |
16172 | u32 src, dst; |
16173 | |
16174 | adr = AREG(7); |
16175 | AREG(7) += 4; |
16176 | PRE_IO |
16177 | READ_LONG_F(adr, src) |
16178 | res = ~src; |
16179 | flag_C = 0; |
16180 | flag_V = 0; |
16181 | flag_NotZ = res; |
16182 | flag_N = res >> 24; |
16183 | WRITE_LONG_F(adr, res) |
16184 | POST_IO |
16185 | RET(20) |
16186 | } |
16187 | |
16188 | // NOT |
16189 | OPCODE(0x46A7) |
16190 | { |
16191 | u32 adr, res; |
16192 | u32 src, dst; |
16193 | |
16194 | adr = AREG(7) - 4; |
16195 | AREG(7) = adr; |
16196 | PRE_IO |
16197 | READ_LONG_F(adr, src) |
16198 | res = ~src; |
16199 | flag_C = 0; |
16200 | flag_V = 0; |
16201 | flag_NotZ = res; |
16202 | flag_N = res >> 24; |
16203 | WRITE_LONG_F(adr, res) |
16204 | POST_IO |
16205 | RET(22) |
16206 | } |
16207 | |
16208 | // MOVESRa |
16209 | OPCODE(0x40C0) |
16210 | { |
16211 | u32 adr, res; |
16212 | u32 src, dst; |
16213 | |
16214 | res = GET_SR; |
16215 | DREGu16((Opcode >> 0) & 7) = res; |
16216 | RET(6) |
16217 | } |
16218 | |
16219 | // MOVESRa |
16220 | OPCODE(0x40D0) |
16221 | { |
16222 | u32 adr, res; |
16223 | u32 src, dst; |
16224 | |
16225 | res = GET_SR; |
16226 | adr = AREG((Opcode >> 0) & 7); |
16227 | PRE_IO |
16228 | WRITE_WORD_F(adr, res) |
16229 | POST_IO |
16230 | RET(12) |
16231 | } |
16232 | |
16233 | // MOVESRa |
16234 | OPCODE(0x40D8) |
16235 | { |
16236 | u32 adr, res; |
16237 | u32 src, dst; |
16238 | |
16239 | res = GET_SR; |
16240 | adr = AREG((Opcode >> 0) & 7); |
16241 | AREG((Opcode >> 0) & 7) += 2; |
16242 | PRE_IO |
16243 | WRITE_WORD_F(adr, res) |
16244 | POST_IO |
16245 | RET(12) |
16246 | } |
16247 | |
16248 | // MOVESRa |
16249 | OPCODE(0x40E0) |
16250 | { |
16251 | u32 adr, res; |
16252 | u32 src, dst; |
16253 | |
16254 | res = GET_SR; |
16255 | adr = AREG((Opcode >> 0) & 7) - 2; |
16256 | AREG((Opcode >> 0) & 7) = adr; |
16257 | PRE_IO |
16258 | WRITE_WORD_F(adr, res) |
16259 | POST_IO |
16260 | RET(14) |
16261 | } |
16262 | |
16263 | // MOVESRa |
16264 | OPCODE(0x40E8) |
16265 | { |
16266 | u32 adr, res; |
16267 | u32 src, dst; |
16268 | |
16269 | res = GET_SR; |
16270 | FETCH_SWORD(adr); |
16271 | adr += AREG((Opcode >> 0) & 7); |
16272 | PRE_IO |
16273 | WRITE_WORD_F(adr, res) |
16274 | POST_IO |
16275 | RET(16) |
16276 | } |
16277 | |
16278 | // MOVESRa |
16279 | OPCODE(0x40F0) |
16280 | { |
16281 | u32 adr, res; |
16282 | u32 src, dst; |
16283 | |
16284 | res = GET_SR; |
16285 | adr = AREG((Opcode >> 0) & 7); |
16286 | DECODE_EXT_WORD |
16287 | PRE_IO |
16288 | WRITE_WORD_F(adr, res) |
16289 | POST_IO |
16290 | RET(18) |
16291 | } |
16292 | |
16293 | // MOVESRa |
16294 | OPCODE(0x40F8) |
16295 | { |
16296 | u32 adr, res; |
16297 | u32 src, dst; |
16298 | |
16299 | res = GET_SR; |
16300 | FETCH_SWORD(adr); |
16301 | PRE_IO |
16302 | WRITE_WORD_F(adr, res) |
16303 | POST_IO |
16304 | RET(16) |
16305 | } |
16306 | |
16307 | // MOVESRa |
16308 | OPCODE(0x40F9) |
16309 | { |
16310 | u32 adr, res; |
16311 | u32 src, dst; |
16312 | |
16313 | res = GET_SR; |
16314 | FETCH_LONG(adr); |
16315 | PRE_IO |
16316 | WRITE_WORD_F(adr, res) |
16317 | POST_IO |
16318 | RET(20) |
16319 | } |
16320 | |
16321 | // MOVESRa |
16322 | OPCODE(0x40DF) |
16323 | { |
16324 | u32 adr, res; |
16325 | u32 src, dst; |
16326 | |
16327 | res = GET_SR; |
16328 | adr = AREG(7); |
16329 | AREG(7) += 2; |
16330 | PRE_IO |
16331 | WRITE_WORD_F(adr, res) |
16332 | POST_IO |
16333 | RET(12) |
16334 | } |
16335 | |
16336 | // MOVESRa |
16337 | OPCODE(0x40E7) |
16338 | { |
16339 | u32 adr, res; |
16340 | u32 src, dst; |
16341 | |
16342 | res = GET_SR; |
16343 | adr = AREG(7) - 2; |
16344 | AREG(7) = adr; |
16345 | PRE_IO |
16346 | WRITE_WORD_F(adr, res) |
16347 | POST_IO |
16348 | RET(14) |
16349 | } |
16350 | |
16351 | // MOVEaCCR |
16352 | OPCODE(0x44C0) |
16353 | { |
16354 | u32 adr, res; |
16355 | u32 src, dst; |
16356 | |
16357 | res = DREGu16((Opcode >> 0) & 7); |
16358 | SET_CCR(res) |
16359 | RET(12) |
16360 | } |
16361 | |
16362 | // MOVEaCCR |
16363 | OPCODE(0x44D0) |
16364 | { |
16365 | u32 adr, res; |
16366 | u32 src, dst; |
16367 | |
16368 | adr = AREG((Opcode >> 0) & 7); |
16369 | PRE_IO |
16370 | READ_WORD_F(adr, res) |
16371 | SET_CCR(res) |
16372 | POST_IO |
16373 | RET(16) |
16374 | } |
16375 | |
16376 | // MOVEaCCR |
16377 | OPCODE(0x44D8) |
16378 | { |
16379 | u32 adr, res; |
16380 | u32 src, dst; |
16381 | |
16382 | adr = AREG((Opcode >> 0) & 7); |
16383 | AREG((Opcode >> 0) & 7) += 2; |
16384 | PRE_IO |
16385 | READ_WORD_F(adr, res) |
16386 | SET_CCR(res) |
16387 | POST_IO |
16388 | RET(16) |
16389 | } |
16390 | |
16391 | // MOVEaCCR |
16392 | OPCODE(0x44E0) |
16393 | { |
16394 | u32 adr, res; |
16395 | u32 src, dst; |
16396 | |
16397 | adr = AREG((Opcode >> 0) & 7) - 2; |
16398 | AREG((Opcode >> 0) & 7) = adr; |
16399 | PRE_IO |
16400 | READ_WORD_F(adr, res) |
16401 | SET_CCR(res) |
16402 | POST_IO |
16403 | RET(18) |
16404 | } |
16405 | |
16406 | // MOVEaCCR |
16407 | OPCODE(0x44E8) |
16408 | { |
16409 | u32 adr, res; |
16410 | u32 src, dst; |
16411 | |
16412 | FETCH_SWORD(adr); |
16413 | adr += AREG((Opcode >> 0) & 7); |
16414 | PRE_IO |
16415 | READ_WORD_F(adr, res) |
16416 | SET_CCR(res) |
16417 | POST_IO |
16418 | RET(20) |
16419 | } |
16420 | |
16421 | // MOVEaCCR |
16422 | OPCODE(0x44F0) |
16423 | { |
16424 | u32 adr, res; |
16425 | u32 src, dst; |
16426 | |
16427 | adr = AREG((Opcode >> 0) & 7); |
16428 | DECODE_EXT_WORD |
16429 | PRE_IO |
16430 | READ_WORD_F(adr, res) |
16431 | SET_CCR(res) |
16432 | POST_IO |
16433 | RET(22) |
16434 | } |
16435 | |
16436 | // MOVEaCCR |
16437 | OPCODE(0x44F8) |
16438 | { |
16439 | u32 adr, res; |
16440 | u32 src, dst; |
16441 | |
16442 | FETCH_SWORD(adr); |
16443 | PRE_IO |
16444 | READ_WORD_F(adr, res) |
16445 | SET_CCR(res) |
16446 | POST_IO |
16447 | RET(20) |
16448 | } |
16449 | |
16450 | // MOVEaCCR |
16451 | OPCODE(0x44F9) |
16452 | { |
16453 | u32 adr, res; |
16454 | u32 src, dst; |
16455 | |
16456 | FETCH_LONG(adr); |
16457 | PRE_IO |
16458 | READ_WORD_F(adr, res) |
16459 | SET_CCR(res) |
16460 | POST_IO |
16461 | RET(24) |
16462 | } |
16463 | |
16464 | // MOVEaCCR |
16465 | OPCODE(0x44FA) |
16466 | { |
16467 | u32 adr, res; |
16468 | u32 src, dst; |
16469 | |
16470 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
16471 | PC++; |
16472 | PRE_IO |
16473 | READ_WORD_F(adr, res) |
16474 | SET_CCR(res) |
16475 | POST_IO |
16476 | RET(20) |
16477 | } |
16478 | |
16479 | // MOVEaCCR |
16480 | OPCODE(0x44FB) |
16481 | { |
16482 | u32 adr, res; |
16483 | u32 src, dst; |
16484 | |
16485 | adr = (u32)(PC) - BasePC; |
16486 | DECODE_EXT_WORD |
16487 | PRE_IO |
16488 | READ_WORD_F(adr, res) |
16489 | SET_CCR(res) |
16490 | POST_IO |
16491 | RET(22) |
16492 | } |
16493 | |
16494 | // MOVEaCCR |
16495 | OPCODE(0x44FC) |
16496 | { |
16497 | u32 adr, res; |
16498 | u32 src, dst; |
16499 | |
16500 | FETCH_WORD(res); |
16501 | SET_CCR(res) |
16502 | RET(16) |
16503 | } |
16504 | |
16505 | // MOVEaCCR |
16506 | OPCODE(0x44DF) |
16507 | { |
16508 | u32 adr, res; |
16509 | u32 src, dst; |
16510 | |
16511 | adr = AREG(7); |
16512 | AREG(7) += 2; |
16513 | PRE_IO |
16514 | READ_WORD_F(adr, res) |
16515 | SET_CCR(res) |
16516 | POST_IO |
16517 | RET(16) |
16518 | } |
16519 | |
16520 | // MOVEaCCR |
16521 | OPCODE(0x44E7) |
16522 | { |
16523 | u32 adr, res; |
16524 | u32 src, dst; |
16525 | |
16526 | adr = AREG(7) - 2; |
16527 | AREG(7) = adr; |
16528 | PRE_IO |
16529 | READ_WORD_F(adr, res) |
16530 | SET_CCR(res) |
16531 | POST_IO |
16532 | RET(18) |
16533 | } |
16534 | |
16535 | // MOVEaSR |
16536 | OPCODE(0x46C0) |
16537 | { |
16538 | u32 adr, res; |
16539 | u32 src, dst; |
16540 | |
16541 | if (flag_S) |
16542 | { |
16543 | res = DREGu16((Opcode >> 0) & 7); |
16544 | SET_SR(res) |
16545 | if (!flag_S) |
16546 | { |
16547 | res = AREG(7); |
16548 | AREG(7) = ASP; |
16549 | ASP = res; |
16550 | } |
16551 | CHECK_INT_TO_JUMP(12) |
16552 | } |
16553 | else |
16554 | { |
16555 | u32 oldPC=GET_PC; |
16556 | SET_PC(oldPC-2) |
16557 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16558 | RET(4) |
16559 | } |
16560 | RET(12) |
16561 | } |
16562 | |
16563 | // MOVEaSR |
16564 | OPCODE(0x46D0) |
16565 | { |
16566 | u32 adr, res; |
16567 | u32 src, dst; |
16568 | |
16569 | if (flag_S) |
16570 | { |
16571 | adr = AREG((Opcode >> 0) & 7); |
16572 | PRE_IO |
16573 | READ_WORD_F(adr, res) |
16574 | SET_SR(res) |
16575 | if (!flag_S) |
16576 | { |
16577 | res = AREG(7); |
16578 | AREG(7) = ASP; |
16579 | ASP = res; |
16580 | } |
16581 | POST_IO |
16582 | CHECK_INT_TO_JUMP(16) |
16583 | } |
16584 | else |
16585 | { |
16586 | u32 oldPC=GET_PC; |
16587 | SET_PC(oldPC-2) |
16588 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16589 | RET(4) |
16590 | } |
16591 | RET(16) |
16592 | } |
16593 | |
16594 | // MOVEaSR |
16595 | OPCODE(0x46D8) |
16596 | { |
16597 | u32 adr, res; |
16598 | u32 src, dst; |
16599 | |
16600 | if (flag_S) |
16601 | { |
16602 | adr = AREG((Opcode >> 0) & 7); |
16603 | AREG((Opcode >> 0) & 7) += 2; |
16604 | PRE_IO |
16605 | READ_WORD_F(adr, res) |
16606 | SET_SR(res) |
16607 | if (!flag_S) |
16608 | { |
16609 | res = AREG(7); |
16610 | AREG(7) = ASP; |
16611 | ASP = res; |
16612 | } |
16613 | POST_IO |
16614 | CHECK_INT_TO_JUMP(16) |
16615 | } |
16616 | else |
16617 | { |
16618 | u32 oldPC=GET_PC; |
16619 | SET_PC(oldPC-2) |
16620 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16621 | RET(4) |
16622 | } |
16623 | RET(16) |
16624 | } |
16625 | |
16626 | // MOVEaSR |
16627 | OPCODE(0x46E0) |
16628 | { |
16629 | u32 adr, res; |
16630 | u32 src, dst; |
16631 | |
16632 | if (flag_S) |
16633 | { |
16634 | adr = AREG((Opcode >> 0) & 7) - 2; |
16635 | AREG((Opcode >> 0) & 7) = adr; |
16636 | PRE_IO |
16637 | READ_WORD_F(adr, res) |
16638 | SET_SR(res) |
16639 | if (!flag_S) |
16640 | { |
16641 | res = AREG(7); |
16642 | AREG(7) = ASP; |
16643 | ASP = res; |
16644 | } |
16645 | POST_IO |
16646 | CHECK_INT_TO_JUMP(18) |
16647 | } |
16648 | else |
16649 | { |
16650 | u32 oldPC=GET_PC; |
16651 | SET_PC(oldPC-2) |
16652 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16653 | RET(4) |
16654 | } |
16655 | RET(18) |
16656 | } |
16657 | |
16658 | // MOVEaSR |
16659 | OPCODE(0x46E8) |
16660 | { |
16661 | u32 adr, res; |
16662 | u32 src, dst; |
16663 | |
16664 | if (flag_S) |
16665 | { |
16666 | FETCH_SWORD(adr); |
16667 | adr += AREG((Opcode >> 0) & 7); |
16668 | PRE_IO |
16669 | READ_WORD_F(adr, res) |
16670 | SET_SR(res) |
16671 | if (!flag_S) |
16672 | { |
16673 | res = AREG(7); |
16674 | AREG(7) = ASP; |
16675 | ASP = res; |
16676 | } |
16677 | POST_IO |
16678 | CHECK_INT_TO_JUMP(20) |
16679 | } |
16680 | else |
16681 | { |
16682 | u32 oldPC=GET_PC; |
16683 | SET_PC(oldPC-2) |
16684 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16685 | RET(4) |
16686 | } |
16687 | RET(20) |
16688 | } |
16689 | |
16690 | // MOVEaSR |
16691 | OPCODE(0x46F0) |
16692 | { |
16693 | u32 adr, res; |
16694 | u32 src, dst; |
16695 | |
16696 | if (flag_S) |
16697 | { |
16698 | adr = AREG((Opcode >> 0) & 7); |
16699 | DECODE_EXT_WORD |
16700 | PRE_IO |
16701 | READ_WORD_F(adr, res) |
16702 | SET_SR(res) |
16703 | if (!flag_S) |
16704 | { |
16705 | res = AREG(7); |
16706 | AREG(7) = ASP; |
16707 | ASP = res; |
16708 | } |
16709 | POST_IO |
16710 | CHECK_INT_TO_JUMP(22) |
16711 | } |
16712 | else |
16713 | { |
16714 | u32 oldPC=GET_PC; |
16715 | SET_PC(oldPC-2) |
16716 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16717 | RET(4) |
16718 | } |
16719 | RET(22) |
16720 | } |
16721 | |
16722 | |
16723 | // MOVEaSR |
16724 | OPCODE(0x46F8) |
16725 | { |
16726 | u32 adr, res; |
16727 | u32 src, dst; |
16728 | |
16729 | if (flag_S) |
16730 | { |
16731 | FETCH_SWORD(adr); |
16732 | PRE_IO |
16733 | READ_WORD_F(adr, res) |
16734 | SET_SR(res) |
16735 | if (!flag_S) |
16736 | { |
16737 | res = AREG(7); |
16738 | AREG(7) = ASP; |
16739 | ASP = res; |
16740 | } |
16741 | POST_IO |
16742 | CHECK_INT_TO_JUMP(20) |
16743 | } |
16744 | else |
16745 | { |
16746 | u32 oldPC=GET_PC; |
16747 | SET_PC(oldPC-2) |
16748 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16749 | RET(4) |
16750 | } |
16751 | RET(20) |
16752 | } |
16753 | |
16754 | // MOVEaSR |
16755 | OPCODE(0x46F9) |
16756 | { |
16757 | u32 adr, res; |
16758 | u32 src, dst; |
16759 | |
16760 | if (flag_S) |
16761 | { |
16762 | FETCH_LONG(adr); |
16763 | PRE_IO |
16764 | READ_WORD_F(adr, res) |
16765 | SET_SR(res) |
16766 | if (!flag_S) |
16767 | { |
16768 | res = AREG(7); |
16769 | AREG(7) = ASP; |
16770 | ASP = res; |
16771 | } |
16772 | POST_IO |
16773 | CHECK_INT_TO_JUMP(24) |
16774 | } |
16775 | else |
16776 | { |
16777 | u32 oldPC=GET_PC; |
16778 | SET_PC(oldPC-2) |
16779 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16780 | RET(4) |
16781 | } |
16782 | RET(24) |
16783 | } |
16784 | |
16785 | // MOVEaSR |
16786 | OPCODE(0x46FA) |
16787 | { |
16788 | u32 adr, res; |
16789 | u32 src, dst; |
16790 | |
16791 | if (flag_S) |
16792 | { |
16793 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
16794 | PC++; |
16795 | PRE_IO |
16796 | READ_WORD_F(adr, res) |
16797 | SET_SR(res) |
16798 | if (!flag_S) |
16799 | { |
16800 | res = AREG(7); |
16801 | AREG(7) = ASP; |
16802 | ASP = res; |
16803 | } |
16804 | POST_IO |
16805 | CHECK_INT_TO_JUMP(24) |
16806 | } |
16807 | else |
16808 | { |
16809 | u32 oldPC=GET_PC; |
16810 | SET_PC(oldPC-2) |
16811 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16812 | RET(4) |
16813 | } |
16814 | RET(20) |
16815 | } |
16816 | |
16817 | // MOVEaSR |
16818 | OPCODE(0x46FB) |
16819 | { |
16820 | u32 adr, res; |
16821 | u32 src, dst; |
16822 | |
16823 | if (flag_S) |
16824 | { |
16825 | adr = (u32)(PC) - BasePC; |
16826 | DECODE_EXT_WORD |
16827 | PRE_IO |
16828 | READ_WORD_F(adr, res) |
16829 | SET_SR(res) |
16830 | if (!flag_S) |
16831 | { |
16832 | res = AREG(7); |
16833 | AREG(7) = ASP; |
16834 | ASP = res; |
16835 | } |
16836 | POST_IO |
16837 | CHECK_INT_TO_JUMP(22) |
16838 | } |
16839 | else |
16840 | { |
16841 | u32 oldPC=GET_PC; |
16842 | SET_PC(oldPC-2) |
16843 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16844 | RET(4) |
16845 | } |
16846 | RET(22) |
16847 | } |
16848 | |
16849 | // MOVEaSR |
16850 | OPCODE(0x46FC) |
16851 | { |
16852 | u32 adr, res; |
16853 | u32 src, dst; |
16854 | |
16855 | if (flag_S) |
16856 | { |
16857 | FETCH_WORD(res); |
16858 | SET_SR(res) |
16859 | if (!flag_S) |
16860 | { |
16861 | res = AREG(7); |
16862 | AREG(7) = ASP; |
16863 | ASP = res; |
16864 | } |
16865 | CHECK_INT_TO_JUMP(16) |
16866 | } |
16867 | else |
16868 | { |
16869 | u32 oldPC=GET_PC; |
16870 | SET_PC(oldPC-2) |
16871 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16872 | RET(4) |
16873 | } |
16874 | RET(16) |
16875 | } |
16876 | |
16877 | // MOVEaSR |
16878 | OPCODE(0x46DF) |
16879 | { |
16880 | u32 adr, res; |
16881 | u32 src, dst; |
16882 | |
16883 | if (flag_S) |
16884 | { |
16885 | adr = AREG(7); |
16886 | AREG(7) += 2; |
16887 | PRE_IO |
16888 | READ_WORD_F(adr, res) |
16889 | SET_SR(res) |
16890 | if (!flag_S) |
16891 | { |
16892 | res = AREG(7); |
16893 | AREG(7) = ASP; |
16894 | ASP = res; |
16895 | } |
16896 | POST_IO |
16897 | CHECK_INT_TO_JUMP(16) |
16898 | } |
16899 | else |
16900 | { |
16901 | u32 oldPC=GET_PC; |
16902 | SET_PC(oldPC-2) |
16903 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16904 | RET(4) |
16905 | } |
16906 | RET(16) |
16907 | } |
16908 | |
16909 | // MOVEaSR |
16910 | OPCODE(0x46E7) |
16911 | { |
16912 | u32 adr, res; |
16913 | u32 src, dst; |
16914 | |
16915 | if (flag_S) |
16916 | { |
16917 | adr = AREG(7) - 2; |
16918 | AREG(7) = adr; |
16919 | PRE_IO |
16920 | READ_WORD_F(adr, res) |
16921 | SET_SR(res) |
16922 | if (!flag_S) |
16923 | { |
16924 | res = AREG(7); |
16925 | AREG(7) = ASP; |
16926 | ASP = res; |
16927 | } |
16928 | POST_IO |
16929 | CHECK_INT_TO_JUMP(18) |
16930 | } |
16931 | else |
16932 | { |
16933 | u32 oldPC=GET_PC; |
16934 | SET_PC(oldPC-2) |
16935 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
16936 | RET(4) |
16937 | } |
16938 | RET(18) |
16939 | } |
16940 | |
16941 | // NBCD |
16942 | OPCODE(0x4800) |
16943 | { |
16944 | u32 adr, res; |
16945 | u32 src, dst; |
16946 | |
16947 | res = DREGu8((Opcode >> 0) & 7); |
16948 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16949 | |
16950 | if (res != 0x9a) |
16951 | { |
16952 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16953 | res &= 0xFF; |
16954 | DREGu8((Opcode >> 0) & 7) = res; |
16955 | flag_NotZ |= res; |
16956 | flag_X = flag_C = M68K_SR_C; |
16957 | } |
16958 | else flag_X = flag_C = 0; |
16959 | flag_N = res; |
16960 | RET(6) |
16961 | } |
16962 | |
16963 | // NBCD |
16964 | OPCODE(0x4810) |
16965 | { |
16966 | u32 adr, res; |
16967 | u32 src, dst; |
16968 | |
16969 | adr = AREG((Opcode >> 0) & 7); |
16970 | PRE_IO |
16971 | READ_BYTE_F(adr, res) |
16972 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16973 | |
16974 | if (res != 0x9a) |
16975 | { |
16976 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
16977 | res &= 0xFF; |
16978 | WRITE_BYTE_F(adr, res) |
16979 | flag_NotZ |= res; |
16980 | flag_X = flag_C = M68K_SR_C; |
16981 | } |
16982 | else flag_X = flag_C = 0; |
16983 | flag_N = res; |
16984 | POST_IO |
16985 | RET(12) |
16986 | } |
16987 | |
16988 | // NBCD |
16989 | OPCODE(0x4818) |
16990 | { |
16991 | u32 adr, res; |
16992 | u32 src, dst; |
16993 | |
16994 | adr = AREG((Opcode >> 0) & 7); |
16995 | AREG((Opcode >> 0) & 7) += 1; |
16996 | PRE_IO |
16997 | READ_BYTE_F(adr, res) |
16998 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
16999 | |
17000 | if (res != 0x9a) |
17001 | { |
17002 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17003 | res &= 0xFF; |
17004 | WRITE_BYTE_F(adr, res) |
17005 | flag_NotZ |= res; |
17006 | flag_X = flag_C = M68K_SR_C; |
17007 | } |
17008 | else flag_X = flag_C = 0; |
17009 | flag_N = res; |
17010 | POST_IO |
17011 | RET(12) |
17012 | } |
17013 | |
17014 | // NBCD |
17015 | OPCODE(0x4820) |
17016 | { |
17017 | u32 adr, res; |
17018 | u32 src, dst; |
17019 | |
17020 | adr = AREG((Opcode >> 0) & 7) - 1; |
17021 | AREG((Opcode >> 0) & 7) = adr; |
17022 | PRE_IO |
17023 | READ_BYTE_F(adr, res) |
17024 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17025 | |
17026 | if (res != 0x9a) |
17027 | { |
17028 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17029 | res &= 0xFF; |
17030 | WRITE_BYTE_F(adr, res) |
17031 | flag_NotZ |= res; |
17032 | flag_X = flag_C = M68K_SR_C; |
17033 | } |
17034 | else flag_X = flag_C = 0; |
17035 | flag_N = res; |
17036 | POST_IO |
17037 | RET(14) |
17038 | } |
17039 | |
17040 | // NBCD |
17041 | OPCODE(0x4828) |
17042 | { |
17043 | u32 adr, res; |
17044 | u32 src, dst; |
17045 | |
17046 | FETCH_SWORD(adr); |
17047 | adr += AREG((Opcode >> 0) & 7); |
17048 | PRE_IO |
17049 | READ_BYTE_F(adr, res) |
17050 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17051 | |
17052 | if (res != 0x9a) |
17053 | { |
17054 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17055 | res &= 0xFF; |
17056 | WRITE_BYTE_F(adr, res) |
17057 | flag_NotZ |= res; |
17058 | flag_X = flag_C = M68K_SR_C; |
17059 | } |
17060 | else flag_X = flag_C = 0; |
17061 | flag_N = res; |
17062 | POST_IO |
17063 | RET(16) |
17064 | } |
17065 | |
17066 | // NBCD |
17067 | OPCODE(0x4830) |
17068 | { |
17069 | u32 adr, res; |
17070 | u32 src, dst; |
17071 | |
17072 | adr = AREG((Opcode >> 0) & 7); |
17073 | DECODE_EXT_WORD |
17074 | PRE_IO |
17075 | READ_BYTE_F(adr, res) |
17076 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17077 | |
17078 | if (res != 0x9a) |
17079 | { |
17080 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17081 | res &= 0xFF; |
17082 | WRITE_BYTE_F(adr, res) |
17083 | flag_NotZ |= res; |
17084 | flag_X = flag_C = M68K_SR_C; |
17085 | } |
17086 | else flag_X = flag_C = 0; |
17087 | flag_N = res; |
17088 | POST_IO |
17089 | RET(18) |
17090 | } |
17091 | |
17092 | // NBCD |
17093 | OPCODE(0x4838) |
17094 | { |
17095 | u32 adr, res; |
17096 | u32 src, dst; |
17097 | |
17098 | FETCH_SWORD(adr); |
17099 | PRE_IO |
17100 | READ_BYTE_F(adr, res) |
17101 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17102 | |
17103 | if (res != 0x9a) |
17104 | { |
17105 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17106 | res &= 0xFF; |
17107 | WRITE_BYTE_F(adr, res) |
17108 | flag_NotZ |= res; |
17109 | flag_X = flag_C = M68K_SR_C; |
17110 | } |
17111 | else flag_X = flag_C = 0; |
17112 | flag_N = res; |
17113 | POST_IO |
17114 | RET(16) |
17115 | } |
17116 | |
17117 | // NBCD |
17118 | OPCODE(0x4839) |
17119 | { |
17120 | u32 adr, res; |
17121 | u32 src, dst; |
17122 | |
17123 | FETCH_LONG(adr); |
17124 | PRE_IO |
17125 | READ_BYTE_F(adr, res) |
17126 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17127 | |
17128 | if (res != 0x9a) |
17129 | { |
17130 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17131 | res &= 0xFF; |
17132 | WRITE_BYTE_F(adr, res) |
17133 | flag_NotZ |= res; |
17134 | flag_X = flag_C = M68K_SR_C; |
17135 | } |
17136 | else flag_X = flag_C = 0; |
17137 | flag_N = res; |
17138 | POST_IO |
17139 | RET(20) |
17140 | } |
17141 | |
17142 | // NBCD |
17143 | OPCODE(0x481F) |
17144 | { |
17145 | u32 adr, res; |
17146 | u32 src, dst; |
17147 | |
17148 | adr = AREG(7); |
17149 | AREG(7) += 2; |
17150 | PRE_IO |
17151 | READ_BYTE_F(adr, res) |
17152 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17153 | |
17154 | if (res != 0x9a) |
17155 | { |
17156 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17157 | res &= 0xFF; |
17158 | WRITE_BYTE_F(adr, res) |
17159 | flag_NotZ |= res; |
17160 | flag_X = flag_C = M68K_SR_C; |
17161 | } |
17162 | else flag_X = flag_C = 0; |
17163 | flag_N = res; |
17164 | POST_IO |
17165 | RET(12) |
17166 | } |
17167 | |
17168 | // NBCD |
17169 | OPCODE(0x4827) |
17170 | { |
17171 | u32 adr, res; |
17172 | u32 src, dst; |
17173 | |
17174 | adr = AREG(7) - 2; |
17175 | AREG(7) = adr; |
17176 | PRE_IO |
17177 | READ_BYTE_F(adr, res) |
17178 | res = 0x9a - res - ((flag_X >> M68K_SR_X_SFT) & 1); |
17179 | |
17180 | if (res != 0x9a) |
17181 | { |
17182 | if ((res & 0x0f) == 0xa) res = (res & 0xf0) + 0x10; |
17183 | res &= 0xFF; |
17184 | WRITE_BYTE_F(adr, res) |
17185 | flag_NotZ |= res; |
17186 | flag_X = flag_C = M68K_SR_C; |
17187 | } |
17188 | else flag_X = flag_C = 0; |
17189 | flag_N = res; |
17190 | POST_IO |
17191 | RET(14) |
17192 | } |
17193 | |
17194 | // PEA |
17195 | OPCODE(0x4850) |
17196 | { |
17197 | u32 adr, res; |
17198 | u32 src, dst; |
17199 | |
17200 | adr = AREG((Opcode >> 0) & 7); |
17201 | PRE_IO |
17202 | PUSH_32_F(adr) |
17203 | POST_IO |
17204 | RET(12) |
17205 | } |
17206 | |
17207 | // PEA |
17208 | OPCODE(0x4868) |
17209 | { |
17210 | u32 adr, res; |
17211 | u32 src, dst; |
17212 | |
17213 | FETCH_SWORD(adr); |
17214 | adr += AREG((Opcode >> 0) & 7); |
17215 | PRE_IO |
17216 | PUSH_32_F(adr) |
17217 | POST_IO |
17218 | RET(16) |
17219 | } |
17220 | |
17221 | // PEA |
17222 | OPCODE(0x4870) |
17223 | { |
17224 | u32 adr, res; |
17225 | u32 src, dst; |
17226 | |
17227 | adr = AREG((Opcode >> 0) & 7); |
17228 | DECODE_EXT_WORD |
17229 | PRE_IO |
17230 | PUSH_32_F(adr) |
17231 | POST_IO |
17232 | RET(20) |
17233 | } |
17234 | |
17235 | // PEA |
17236 | OPCODE(0x4878) |
17237 | { |
17238 | u32 adr, res; |
17239 | u32 src, dst; |
17240 | |
17241 | FETCH_SWORD(adr); |
17242 | PRE_IO |
17243 | PUSH_32_F(adr) |
17244 | POST_IO |
17245 | RET(16) |
17246 | } |
17247 | |
17248 | // PEA |
17249 | OPCODE(0x4879) |
17250 | { |
17251 | u32 adr, res; |
17252 | u32 src, dst; |
17253 | |
17254 | FETCH_LONG(adr); |
17255 | PRE_IO |
17256 | PUSH_32_F(adr) |
17257 | POST_IO |
17258 | RET(20) |
17259 | } |
17260 | |
17261 | // PEA |
17262 | OPCODE(0x487A) |
17263 | { |
17264 | u32 adr, res; |
17265 | u32 src, dst; |
17266 | |
17267 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
17268 | PC++; |
17269 | PRE_IO |
17270 | PUSH_32_F(adr) |
17271 | POST_IO |
17272 | RET(16) |
17273 | } |
17274 | |
17275 | // PEA |
17276 | OPCODE(0x487B) |
17277 | { |
17278 | u32 adr, res; |
17279 | u32 src, dst; |
17280 | |
17281 | adr = (u32)(PC) - BasePC; |
17282 | DECODE_EXT_WORD |
17283 | PRE_IO |
17284 | PUSH_32_F(adr) |
17285 | POST_IO |
17286 | RET(20) |
17287 | } |
17288 | |
17289 | // SWAP |
17290 | OPCODE(0x4840) |
17291 | { |
17292 | u32 adr, res; |
17293 | u32 src, dst; |
17294 | |
17295 | res = DREGu32((Opcode >> 0) & 7); |
17296 | res = (res >> 16) | (res << 16); |
17297 | flag_C = 0; |
17298 | flag_V = 0; |
17299 | flag_NotZ = res; |
17300 | flag_N = res >> 24; |
17301 | DREGu32((Opcode >> 0) & 7) = res; |
17302 | RET(4) |
17303 | } |
17304 | |
17305 | // MOVEMRa |
17306 | OPCODE(0x4890) |
17307 | { |
17308 | u32 adr, res; |
17309 | u32 src, dst; |
17310 | |
17311 | u32 *psrc; |
17312 | |
17313 | FETCH_WORD(res); |
17314 | adr = AREG((Opcode >> 0) & 7); |
17315 | psrc = &DREGu32(0); |
17316 | dst = adr; |
17317 | PRE_IO |
17318 | do |
17319 | { |
17320 | if (res & 1) |
17321 | { |
17322 | WRITE_WORD_F(adr, *psrc) |
17323 | adr += 2; |
17324 | } |
17325 | psrc++; |
17326 | } while (res >>= 1); |
17327 | POST_IO |
17328 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17329 | #ifdef USE_CYCLONE_TIMING |
17330 | RET(8) |
17331 | #else |
17332 | RET(12) |
17333 | #endif |
17334 | } |
17335 | |
17336 | // MOVEMRa |
17337 | OPCODE(0x48A0) |
17338 | { |
17339 | u32 adr, res; |
17340 | u32 src, dst; |
17341 | |
17342 | u32 *psrc; |
17343 | |
17344 | FETCH_WORD(res); |
17345 | adr = AREG((Opcode >> 0) & 7); |
17346 | psrc = &AREGu32(7); |
17347 | dst = adr; |
17348 | PRE_IO |
17349 | do |
17350 | { |
17351 | if (res & 1) |
17352 | { |
17353 | adr -= 2; |
17354 | WRITE_WORD_F(adr, *psrc) |
17355 | } |
17356 | psrc--; |
17357 | } while (res >>= 1); |
17358 | AREG((Opcode >> 0) & 7) = adr; |
17359 | POST_IO |
17360 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17361 | RET(8) |
17362 | } |
17363 | |
17364 | // MOVEMRa |
17365 | OPCODE(0x48A8) |
17366 | { |
17367 | u32 adr, res; |
17368 | u32 src, dst; |
17369 | |
17370 | u32 *psrc; |
17371 | |
17372 | FETCH_WORD(res); |
17373 | FETCH_SWORD(adr); |
17374 | adr += AREG((Opcode >> 0) & 7); |
17375 | psrc = &DREGu32(0); |
17376 | dst = adr; |
17377 | PRE_IO |
17378 | do |
17379 | { |
17380 | if (res & 1) |
17381 | { |
17382 | WRITE_WORD_F(adr, *psrc) |
17383 | adr += 2; |
17384 | } |
17385 | psrc++; |
17386 | } while (res >>= 1); |
17387 | POST_IO |
17388 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17389 | #ifdef USE_CYCLONE_TIMING |
17390 | RET(12) |
17391 | #else |
17392 | RET(20) |
17393 | #endif |
17394 | } |
17395 | |
17396 | // MOVEMRa |
17397 | OPCODE(0x48B0) |
17398 | { |
17399 | u32 adr, res; |
17400 | u32 src, dst; |
17401 | |
17402 | u32 *psrc; |
17403 | |
17404 | FETCH_WORD(res); |
17405 | adr = AREG((Opcode >> 0) & 7); |
17406 | DECODE_EXT_WORD |
17407 | psrc = &DREGu32(0); |
17408 | dst = adr; |
17409 | PRE_IO |
17410 | do |
17411 | { |
17412 | if (res & 1) |
17413 | { |
17414 | WRITE_WORD_F(adr, *psrc) |
17415 | adr += 2; |
17416 | } |
17417 | psrc++; |
17418 | } while (res >>= 1); |
17419 | POST_IO |
17420 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17421 | #ifdef USE_CYCLONE_TIMING |
17422 | RET(14) |
17423 | #else |
17424 | RET(24) |
17425 | #endif |
17426 | } |
17427 | |
17428 | // MOVEMRa |
17429 | OPCODE(0x48B8) |
17430 | { |
17431 | u32 adr, res; |
17432 | u32 src, dst; |
17433 | |
17434 | u32 *psrc; |
17435 | |
17436 | FETCH_WORD(res); |
17437 | FETCH_SWORD(adr); |
17438 | psrc = &DREGu32(0); |
17439 | dst = adr; |
17440 | PRE_IO |
17441 | do |
17442 | { |
17443 | if (res & 1) |
17444 | { |
17445 | WRITE_WORD_F(adr, *psrc) |
17446 | adr += 2; |
17447 | } |
17448 | psrc++; |
17449 | } while (res >>= 1); |
17450 | POST_IO |
17451 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17452 | #ifdef USE_CYCLONE_TIMING |
17453 | RET(12) |
17454 | #else |
17455 | RET(20) |
17456 | #endif |
17457 | } |
17458 | |
17459 | // MOVEMRa |
17460 | OPCODE(0x48B9) |
17461 | { |
17462 | u32 adr, res; |
17463 | u32 src, dst; |
17464 | |
17465 | u32 *psrc; |
17466 | |
17467 | FETCH_WORD(res); |
17468 | FETCH_LONG(adr); |
17469 | psrc = &DREGu32(0); |
17470 | dst = adr; |
17471 | PRE_IO |
17472 | do |
17473 | { |
17474 | if (res & 1) |
17475 | { |
17476 | WRITE_WORD_F(adr, *psrc) |
17477 | adr += 2; |
17478 | } |
17479 | psrc++; |
17480 | } while (res >>= 1); |
17481 | POST_IO |
17482 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17483 | #ifdef USE_CYCLONE_TIMING |
17484 | RET(16) |
17485 | #else |
17486 | RET(28) |
17487 | #endif |
17488 | } |
17489 | |
17490 | // MOVEMRa |
17491 | OPCODE(0x48A7) |
17492 | { |
17493 | u32 adr, res; |
17494 | u32 src, dst; |
17495 | |
17496 | u32 *psrc; |
17497 | |
17498 | FETCH_WORD(res); |
17499 | adr = AREG(7); |
17500 | psrc = &AREGu32(7); |
17501 | dst = adr; |
17502 | PRE_IO |
17503 | do |
17504 | { |
17505 | if (res & 1) |
17506 | { |
17507 | adr -= 2; |
17508 | WRITE_WORD_F(adr, *psrc) |
17509 | } |
17510 | psrc--; |
17511 | } while (res >>= 1); |
17512 | AREG(7) = adr; |
17513 | POST_IO |
17514 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17515 | RET(8) |
17516 | } |
17517 | |
17518 | // MOVEMRa |
17519 | OPCODE(0x48D0) |
17520 | { |
17521 | u32 adr, res; |
17522 | u32 src, dst; |
17523 | |
17524 | u32 *psrc; |
17525 | |
17526 | FETCH_WORD(res); |
17527 | adr = AREG((Opcode >> 0) & 7); |
17528 | psrc = &DREGu32(0); |
17529 | dst = adr; |
17530 | PRE_IO |
17531 | do |
17532 | { |
17533 | if (res & 1) |
17534 | { |
17535 | WRITE_LONG_F(adr, *psrc) |
17536 | adr += 4; |
17537 | } |
17538 | psrc++; |
17539 | } while (res >>= 1); |
17540 | POST_IO |
17541 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17542 | #ifdef USE_CYCLONE_TIMING |
17543 | RET(8) |
17544 | #else |
17545 | RET(16) |
17546 | #endif |
17547 | } |
17548 | |
17549 | // MOVEMRa |
17550 | OPCODE(0x48E0) |
17551 | { |
17552 | u32 adr, res; |
17553 | u32 src, dst; |
17554 | |
17555 | u32 *psrc; |
17556 | |
17557 | FETCH_WORD(res); |
17558 | adr = AREG((Opcode >> 0) & 7); |
17559 | psrc = &AREGu32(7); |
17560 | dst = adr; |
17561 | PRE_IO |
17562 | do |
17563 | { |
17564 | if (res & 1) |
17565 | { |
17566 | adr -= 4; |
17567 | WRITE_LONG_DEC_F(adr, *psrc) |
17568 | } |
17569 | psrc--; |
17570 | } while (res >>= 1); |
17571 | AREG((Opcode >> 0) & 7) = adr; |
17572 | POST_IO |
17573 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17574 | RET(8) |
17575 | } |
17576 | |
17577 | // MOVEMRa |
17578 | OPCODE(0x48E8) |
17579 | { |
17580 | u32 adr, res; |
17581 | u32 src, dst; |
17582 | |
17583 | u32 *psrc; |
17584 | |
17585 | FETCH_WORD(res); |
17586 | FETCH_SWORD(adr); |
17587 | adr += AREG((Opcode >> 0) & 7); |
17588 | psrc = &DREGu32(0); |
17589 | dst = adr; |
17590 | PRE_IO |
17591 | do |
17592 | { |
17593 | if (res & 1) |
17594 | { |
17595 | WRITE_LONG_F(adr, *psrc) |
17596 | adr += 4; |
17597 | } |
17598 | psrc++; |
17599 | } while (res >>= 1); |
17600 | POST_IO |
17601 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17602 | #ifdef USE_CYCLONE_TIMING |
17603 | RET(12) |
17604 | #else |
17605 | RET(24) |
17606 | #endif |
17607 | } |
17608 | |
17609 | // MOVEMRa |
17610 | OPCODE(0x48F0) |
17611 | { |
17612 | u32 adr, res; |
17613 | u32 src, dst; |
17614 | |
17615 | u32 *psrc; |
17616 | |
17617 | FETCH_WORD(res); |
17618 | adr = AREG((Opcode >> 0) & 7); |
17619 | DECODE_EXT_WORD |
17620 | psrc = &DREGu32(0); |
17621 | dst = adr; |
17622 | PRE_IO |
17623 | do |
17624 | { |
17625 | if (res & 1) |
17626 | { |
17627 | WRITE_LONG_F(adr, *psrc) |
17628 | adr += 4; |
17629 | } |
17630 | psrc++; |
17631 | } while (res >>= 1); |
17632 | POST_IO |
17633 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17634 | #ifdef USE_CYCLONE_TIMING |
17635 | RET(14) |
17636 | #else |
17637 | RET(28) |
17638 | #endif |
17639 | } |
17640 | |
17641 | // MOVEMRa |
17642 | OPCODE(0x48F8) |
17643 | { |
17644 | u32 adr, res; |
17645 | u32 src, dst; |
17646 | |
17647 | u32 *psrc; |
17648 | |
17649 | FETCH_WORD(res); |
17650 | FETCH_SWORD(adr); |
17651 | psrc = &DREGu32(0); |
17652 | dst = adr; |
17653 | PRE_IO |
17654 | do |
17655 | { |
17656 | if (res & 1) |
17657 | { |
17658 | WRITE_LONG_F(adr, *psrc) |
17659 | adr += 4; |
17660 | } |
17661 | psrc++; |
17662 | } while (res >>= 1); |
17663 | POST_IO |
17664 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17665 | #ifdef USE_CYCLONE_TIMING |
17666 | RET(12) |
17667 | #else |
17668 | RET(24) |
17669 | #endif |
17670 | } |
17671 | |
17672 | // MOVEMRa |
17673 | OPCODE(0x48F9) |
17674 | { |
17675 | u32 adr, res; |
17676 | u32 src, dst; |
17677 | |
17678 | u32 *psrc; |
17679 | |
17680 | FETCH_WORD(res); |
17681 | FETCH_LONG(adr); |
17682 | psrc = &DREGu32(0); |
17683 | dst = adr; |
17684 | PRE_IO |
17685 | do |
17686 | { |
17687 | if (res & 1) |
17688 | { |
17689 | WRITE_LONG_F(adr, *psrc) |
17690 | adr += 4; |
17691 | } |
17692 | psrc++; |
17693 | } while (res >>= 1); |
17694 | POST_IO |
17695 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
17696 | #ifdef USE_CYCLONE_TIMING |
17697 | RET(16) |
17698 | #else |
17699 | RET(32) |
17700 | #endif |
17701 | } |
17702 | |
17703 | // MOVEMRa |
17704 | OPCODE(0x48E7) |
17705 | { |
17706 | u32 adr, res; |
17707 | u32 src, dst; |
17708 | |
17709 | u32 *psrc; |
17710 | |
17711 | FETCH_WORD(res); |
17712 | adr = AREG(7); |
17713 | psrc = &AREGu32(7); |
17714 | dst = adr; |
17715 | PRE_IO |
17716 | do |
17717 | { |
17718 | if (res & 1) |
17719 | { |
17720 | adr -= 4; |
17721 | WRITE_LONG_DEC_F(adr, *psrc) |
17722 | } |
17723 | psrc--; |
17724 | } while (res >>= 1); |
17725 | AREG(7) = adr; |
17726 | POST_IO |
17727 | m68kcontext.io_cycle_counter -= (dst - adr) * 2; |
17728 | RET(8) |
17729 | } |
17730 | |
17731 | // EXT |
17732 | OPCODE(0x4880) |
17733 | { |
17734 | u32 adr, res; |
17735 | u32 src, dst; |
17736 | |
17737 | res = (s32)DREGs8((Opcode >> 0) & 7); |
17738 | flag_C = 0; |
17739 | flag_V = 0; |
17740 | flag_NotZ = res; |
17741 | flag_N = res; |
17742 | DREGu16((Opcode >> 0) & 7) = res; |
17743 | RET(4) |
17744 | } |
17745 | |
17746 | // EXT |
17747 | OPCODE(0x48C0) |
17748 | { |
17749 | u32 adr, res; |
17750 | u32 src, dst; |
17751 | |
17752 | res = (s32)DREGs16((Opcode >> 0) & 7); |
17753 | flag_C = 0; |
17754 | flag_V = 0; |
17755 | flag_NotZ = res; |
17756 | flag_N = res >> 8; |
17757 | DREGu32((Opcode >> 0) & 7) = res; |
17758 | RET(4) |
17759 | } |
17760 | |
17761 | // TST |
17762 | OPCODE(0x4A00) |
17763 | { |
17764 | u32 adr, res; |
17765 | u32 src, dst; |
17766 | |
17767 | res = DREGu8((Opcode >> 0) & 7); |
17768 | flag_C = 0; |
17769 | flag_V = 0; |
17770 | flag_NotZ = res; |
17771 | flag_N = res; |
17772 | RET(4) |
17773 | } |
17774 | |
17775 | // TST |
17776 | OPCODE(0x4A10) |
17777 | { |
17778 | u32 adr, res; |
17779 | u32 src, dst; |
17780 | |
17781 | adr = AREG((Opcode >> 0) & 7); |
17782 | PRE_IO |
17783 | READ_BYTE_F(adr, res) |
17784 | flag_C = 0; |
17785 | flag_V = 0; |
17786 | flag_NotZ = res; |
17787 | flag_N = res; |
17788 | POST_IO |
17789 | RET(8) |
17790 | } |
17791 | |
17792 | // TST |
17793 | OPCODE(0x4A18) |
17794 | { |
17795 | u32 adr, res; |
17796 | u32 src, dst; |
17797 | |
17798 | adr = AREG((Opcode >> 0) & 7); |
17799 | AREG((Opcode >> 0) & 7) += 1; |
17800 | PRE_IO |
17801 | READ_BYTE_F(adr, res) |
17802 | flag_C = 0; |
17803 | flag_V = 0; |
17804 | flag_NotZ = res; |
17805 | flag_N = res; |
17806 | POST_IO |
17807 | RET(8) |
17808 | } |
17809 | |
17810 | // TST |
17811 | OPCODE(0x4A20) |
17812 | { |
17813 | u32 adr, res; |
17814 | u32 src, dst; |
17815 | |
17816 | adr = AREG((Opcode >> 0) & 7) - 1; |
17817 | AREG((Opcode >> 0) & 7) = adr; |
17818 | PRE_IO |
17819 | READ_BYTE_F(adr, res) |
17820 | flag_C = 0; |
17821 | flag_V = 0; |
17822 | flag_NotZ = res; |
17823 | flag_N = res; |
17824 | POST_IO |
17825 | RET(10) |
17826 | } |
17827 | |
17828 | // TST |
17829 | OPCODE(0x4A28) |
17830 | { |
17831 | u32 adr, res; |
17832 | u32 src, dst; |
17833 | |
17834 | FETCH_SWORD(adr); |
17835 | adr += AREG((Opcode >> 0) & 7); |
17836 | PRE_IO |
17837 | READ_BYTE_F(adr, res) |
17838 | flag_C = 0; |
17839 | flag_V = 0; |
17840 | flag_NotZ = res; |
17841 | flag_N = res; |
17842 | POST_IO |
17843 | RET(12) |
17844 | } |
17845 | |
17846 | // TST |
17847 | OPCODE(0x4A30) |
17848 | { |
17849 | u32 adr, res; |
17850 | u32 src, dst; |
17851 | |
17852 | adr = AREG((Opcode >> 0) & 7); |
17853 | DECODE_EXT_WORD |
17854 | PRE_IO |
17855 | READ_BYTE_F(adr, res) |
17856 | flag_C = 0; |
17857 | flag_V = 0; |
17858 | flag_NotZ = res; |
17859 | flag_N = res; |
17860 | POST_IO |
17861 | RET(14) |
17862 | } |
17863 | |
17864 | // TST |
17865 | OPCODE(0x4A38) |
17866 | { |
17867 | u32 adr, res; |
17868 | u32 src, dst; |
17869 | |
17870 | FETCH_SWORD(adr); |
17871 | PRE_IO |
17872 | READ_BYTE_F(adr, res) |
17873 | flag_C = 0; |
17874 | flag_V = 0; |
17875 | flag_NotZ = res; |
17876 | flag_N = res; |
17877 | POST_IO |
17878 | RET(12) |
17879 | } |
17880 | |
17881 | // TST |
17882 | OPCODE(0x4A39) |
17883 | { |
17884 | u32 adr, res; |
17885 | u32 src, dst; |
17886 | |
17887 | FETCH_LONG(adr); |
17888 | PRE_IO |
17889 | READ_BYTE_F(adr, res) |
17890 | flag_C = 0; |
17891 | flag_V = 0; |
17892 | flag_NotZ = res; |
17893 | flag_N = res; |
17894 | POST_IO |
17895 | RET(16) |
17896 | } |
17897 | |
17898 | // TST |
17899 | OPCODE(0x4A1F) |
17900 | { |
17901 | u32 adr, res; |
17902 | u32 src, dst; |
17903 | |
17904 | adr = AREG(7); |
17905 | AREG(7) += 2; |
17906 | PRE_IO |
17907 | READ_BYTE_F(adr, res) |
17908 | flag_C = 0; |
17909 | flag_V = 0; |
17910 | flag_NotZ = res; |
17911 | flag_N = res; |
17912 | POST_IO |
17913 | RET(8) |
17914 | } |
17915 | |
17916 | // TST |
17917 | OPCODE(0x4A27) |
17918 | { |
17919 | u32 adr, res; |
17920 | u32 src, dst; |
17921 | |
17922 | adr = AREG(7) - 2; |
17923 | AREG(7) = adr; |
17924 | PRE_IO |
17925 | READ_BYTE_F(adr, res) |
17926 | flag_C = 0; |
17927 | flag_V = 0; |
17928 | flag_NotZ = res; |
17929 | flag_N = res; |
17930 | POST_IO |
17931 | RET(10) |
17932 | } |
17933 | |
17934 | // TST |
17935 | OPCODE(0x4A40) |
17936 | { |
17937 | u32 adr, res; |
17938 | u32 src, dst; |
17939 | |
17940 | res = DREGu16((Opcode >> 0) & 7); |
17941 | flag_C = 0; |
17942 | flag_V = 0; |
17943 | flag_NotZ = res; |
17944 | flag_N = res >> 8; |
17945 | RET(4) |
17946 | } |
17947 | |
17948 | // TST |
17949 | OPCODE(0x4A50) |
17950 | { |
17951 | u32 adr, res; |
17952 | u32 src, dst; |
17953 | |
17954 | adr = AREG((Opcode >> 0) & 7); |
17955 | PRE_IO |
17956 | READ_WORD_F(adr, res) |
17957 | flag_C = 0; |
17958 | flag_V = 0; |
17959 | flag_NotZ = res; |
17960 | flag_N = res >> 8; |
17961 | POST_IO |
17962 | RET(8) |
17963 | } |
17964 | |
17965 | // TST |
17966 | OPCODE(0x4A58) |
17967 | { |
17968 | u32 adr, res; |
17969 | u32 src, dst; |
17970 | |
17971 | adr = AREG((Opcode >> 0) & 7); |
17972 | AREG((Opcode >> 0) & 7) += 2; |
17973 | PRE_IO |
17974 | READ_WORD_F(adr, res) |
17975 | flag_C = 0; |
17976 | flag_V = 0; |
17977 | flag_NotZ = res; |
17978 | flag_N = res >> 8; |
17979 | POST_IO |
17980 | RET(8) |
17981 | } |
17982 | |
17983 | // TST |
17984 | OPCODE(0x4A60) |
17985 | { |
17986 | u32 adr, res; |
17987 | u32 src, dst; |
17988 | |
17989 | adr = AREG((Opcode >> 0) & 7) - 2; |
17990 | AREG((Opcode >> 0) & 7) = adr; |
17991 | PRE_IO |
17992 | READ_WORD_F(adr, res) |
17993 | flag_C = 0; |
17994 | flag_V = 0; |
17995 | flag_NotZ = res; |
17996 | flag_N = res >> 8; |
17997 | POST_IO |
17998 | RET(10) |
17999 | } |
18000 | |
18001 | // TST |
18002 | OPCODE(0x4A68) |
18003 | { |
18004 | u32 adr, res; |
18005 | u32 src, dst; |
18006 | |
18007 | FETCH_SWORD(adr); |
18008 | adr += AREG((Opcode >> 0) & 7); |
18009 | PRE_IO |
18010 | READ_WORD_F(adr, res) |
18011 | flag_C = 0; |
18012 | flag_V = 0; |
18013 | flag_NotZ = res; |
18014 | flag_N = res >> 8; |
18015 | POST_IO |
18016 | RET(12) |
18017 | } |
18018 | |
18019 | // TST |
18020 | OPCODE(0x4A70) |
18021 | { |
18022 | u32 adr, res; |
18023 | u32 src, dst; |
18024 | |
18025 | adr = AREG((Opcode >> 0) & 7); |
18026 | DECODE_EXT_WORD |
18027 | PRE_IO |
18028 | READ_WORD_F(adr, res) |
18029 | flag_C = 0; |
18030 | flag_V = 0; |
18031 | flag_NotZ = res; |
18032 | flag_N = res >> 8; |
18033 | POST_IO |
18034 | RET(14) |
18035 | } |
18036 | |
18037 | // TST |
18038 | OPCODE(0x4A78) |
18039 | { |
18040 | u32 adr, res; |
18041 | u32 src, dst; |
18042 | |
18043 | FETCH_SWORD(adr); |
18044 | PRE_IO |
18045 | READ_WORD_F(adr, res) |
18046 | flag_C = 0; |
18047 | flag_V = 0; |
18048 | flag_NotZ = res; |
18049 | flag_N = res >> 8; |
18050 | POST_IO |
18051 | RET(12) |
18052 | } |
18053 | |
18054 | // TST |
18055 | OPCODE(0x4A79) |
18056 | { |
18057 | u32 adr, res; |
18058 | u32 src, dst; |
18059 | |
18060 | FETCH_LONG(adr); |
18061 | PRE_IO |
18062 | READ_WORD_F(adr, res) |
18063 | flag_C = 0; |
18064 | flag_V = 0; |
18065 | flag_NotZ = res; |
18066 | flag_N = res >> 8; |
18067 | POST_IO |
18068 | RET(16) |
18069 | } |
18070 | |
18071 | // TST |
18072 | OPCODE(0x4A5F) |
18073 | { |
18074 | u32 adr, res; |
18075 | u32 src, dst; |
18076 | |
18077 | adr = AREG(7); |
18078 | AREG(7) += 2; |
18079 | PRE_IO |
18080 | READ_WORD_F(adr, res) |
18081 | flag_C = 0; |
18082 | flag_V = 0; |
18083 | flag_NotZ = res; |
18084 | flag_N = res >> 8; |
18085 | POST_IO |
18086 | RET(8) |
18087 | } |
18088 | |
18089 | // TST |
18090 | OPCODE(0x4A67) |
18091 | { |
18092 | u32 adr, res; |
18093 | u32 src, dst; |
18094 | |
18095 | adr = AREG(7) - 2; |
18096 | AREG(7) = adr; |
18097 | PRE_IO |
18098 | READ_WORD_F(adr, res) |
18099 | flag_C = 0; |
18100 | flag_V = 0; |
18101 | flag_NotZ = res; |
18102 | flag_N = res >> 8; |
18103 | POST_IO |
18104 | RET(10) |
18105 | } |
18106 | |
18107 | // TST |
18108 | OPCODE(0x4A80) |
18109 | { |
18110 | u32 adr, res; |
18111 | u32 src, dst; |
18112 | |
18113 | res = DREGu32((Opcode >> 0) & 7); |
18114 | flag_C = 0; |
18115 | flag_V = 0; |
18116 | flag_NotZ = res; |
18117 | flag_N = res >> 24; |
18118 | RET(4) |
18119 | } |
18120 | |
18121 | // TST |
18122 | OPCODE(0x4A90) |
18123 | { |
18124 | u32 adr, res; |
18125 | u32 src, dst; |
18126 | |
18127 | adr = AREG((Opcode >> 0) & 7); |
18128 | PRE_IO |
18129 | READ_LONG_F(adr, res) |
18130 | flag_C = 0; |
18131 | flag_V = 0; |
18132 | flag_NotZ = res; |
18133 | flag_N = res >> 24; |
18134 | POST_IO |
18135 | RET(12) |
18136 | } |
18137 | |
18138 | // TST |
18139 | OPCODE(0x4A98) |
18140 | { |
18141 | u32 adr, res; |
18142 | u32 src, dst; |
18143 | |
18144 | adr = AREG((Opcode >> 0) & 7); |
18145 | AREG((Opcode >> 0) & 7) += 4; |
18146 | PRE_IO |
18147 | READ_LONG_F(adr, res) |
18148 | flag_C = 0; |
18149 | flag_V = 0; |
18150 | flag_NotZ = res; |
18151 | flag_N = res >> 24; |
18152 | POST_IO |
18153 | RET(12) |
18154 | } |
18155 | |
18156 | // TST |
18157 | OPCODE(0x4AA0) |
18158 | { |
18159 | u32 adr, res; |
18160 | u32 src, dst; |
18161 | |
18162 | adr = AREG((Opcode >> 0) & 7) - 4; |
18163 | AREG((Opcode >> 0) & 7) = adr; |
18164 | PRE_IO |
18165 | READ_LONG_F(adr, res) |
18166 | flag_C = 0; |
18167 | flag_V = 0; |
18168 | flag_NotZ = res; |
18169 | flag_N = res >> 24; |
18170 | POST_IO |
18171 | RET(14) |
18172 | } |
18173 | |
18174 | // TST |
18175 | OPCODE(0x4AA8) |
18176 | { |
18177 | u32 adr, res; |
18178 | u32 src, dst; |
18179 | |
18180 | FETCH_SWORD(adr); |
18181 | adr += AREG((Opcode >> 0) & 7); |
18182 | PRE_IO |
18183 | READ_LONG_F(adr, res) |
18184 | flag_C = 0; |
18185 | flag_V = 0; |
18186 | flag_NotZ = res; |
18187 | flag_N = res >> 24; |
18188 | POST_IO |
18189 | RET(16) |
18190 | } |
18191 | |
18192 | // TST |
18193 | OPCODE(0x4AB0) |
18194 | { |
18195 | u32 adr, res; |
18196 | u32 src, dst; |
18197 | |
18198 | adr = AREG((Opcode >> 0) & 7); |
18199 | DECODE_EXT_WORD |
18200 | PRE_IO |
18201 | READ_LONG_F(adr, res) |
18202 | flag_C = 0; |
18203 | flag_V = 0; |
18204 | flag_NotZ = res; |
18205 | flag_N = res >> 24; |
18206 | POST_IO |
18207 | RET(18) |
18208 | } |
18209 | |
18210 | // TST |
18211 | OPCODE(0x4AB8) |
18212 | { |
18213 | u32 adr, res; |
18214 | u32 src, dst; |
18215 | |
18216 | FETCH_SWORD(adr); |
18217 | PRE_IO |
18218 | READ_LONG_F(adr, res) |
18219 | flag_C = 0; |
18220 | flag_V = 0; |
18221 | flag_NotZ = res; |
18222 | flag_N = res >> 24; |
18223 | POST_IO |
18224 | RET(16) |
18225 | } |
18226 | |
18227 | // TST |
18228 | OPCODE(0x4AB9) |
18229 | { |
18230 | u32 adr, res; |
18231 | u32 src, dst; |
18232 | |
18233 | FETCH_LONG(adr); |
18234 | PRE_IO |
18235 | READ_LONG_F(adr, res) |
18236 | flag_C = 0; |
18237 | flag_V = 0; |
18238 | flag_NotZ = res; |
18239 | flag_N = res >> 24; |
18240 | POST_IO |
18241 | RET(20) |
18242 | } |
18243 | |
18244 | // TST |
18245 | OPCODE(0x4A9F) |
18246 | { |
18247 | u32 adr, res; |
18248 | u32 src, dst; |
18249 | |
18250 | adr = AREG(7); |
18251 | AREG(7) += 4; |
18252 | PRE_IO |
18253 | READ_LONG_F(adr, res) |
18254 | flag_C = 0; |
18255 | flag_V = 0; |
18256 | flag_NotZ = res; |
18257 | flag_N = res >> 24; |
18258 | POST_IO |
18259 | RET(12) |
18260 | } |
18261 | |
18262 | // TST |
18263 | OPCODE(0x4AA7) |
18264 | { |
18265 | u32 adr, res; |
18266 | u32 src, dst; |
18267 | |
18268 | adr = AREG(7) - 4; |
18269 | AREG(7) = adr; |
18270 | PRE_IO |
18271 | READ_LONG_F(adr, res) |
18272 | flag_C = 0; |
18273 | flag_V = 0; |
18274 | flag_NotZ = res; |
18275 | flag_N = res >> 24; |
18276 | POST_IO |
18277 | RET(14) |
18278 | } |
18279 | |
18280 | // TAS |
18281 | OPCODE(0x4AC0) |
18282 | { |
18283 | u32 adr, res; |
18284 | u32 src, dst; |
18285 | |
18286 | res = DREGu8((Opcode >> 0) & 7); |
18287 | flag_C = 0; |
18288 | flag_V = 0; |
18289 | flag_NotZ = res; |
18290 | flag_N = res; |
18291 | res |= 0x80; |
18292 | DREGu8((Opcode >> 0) & 7) = res; |
18293 | RET(4) |
18294 | } |
18295 | |
18296 | // TAS |
18297 | OPCODE(0x4AD0) |
18298 | { |
18299 | u32 adr, res; |
18300 | u32 src, dst; |
18301 | |
18302 | adr = AREG((Opcode >> 0) & 7); |
18303 | PRE_IO |
18304 | READ_BYTE_F(adr, res) |
18305 | flag_C = 0; |
18306 | flag_V = 0; |
18307 | flag_NotZ = res; |
18308 | flag_N = res; |
18309 | POST_IO |
18310 | RET(8) |
18311 | } |
18312 | |
18313 | // TAS |
18314 | OPCODE(0x4AD8) |
18315 | { |
18316 | u32 adr, res; |
18317 | u32 src, dst; |
18318 | |
18319 | adr = AREG((Opcode >> 0) & 7); |
18320 | AREG((Opcode >> 0) & 7) += 1; |
18321 | PRE_IO |
18322 | READ_BYTE_F(adr, res) |
18323 | flag_C = 0; |
18324 | flag_V = 0; |
18325 | flag_NotZ = res; |
18326 | flag_N = res; |
18327 | POST_IO |
18328 | RET(8) |
18329 | } |
18330 | |
18331 | // TAS |
18332 | OPCODE(0x4AE0) |
18333 | { |
18334 | u32 adr, res; |
18335 | u32 src, dst; |
18336 | |
18337 | adr = AREG((Opcode >> 0) & 7) - 1; |
18338 | AREG((Opcode >> 0) & 7) = adr; |
18339 | PRE_IO |
18340 | READ_BYTE_F(adr, res) |
18341 | flag_C = 0; |
18342 | flag_V = 0; |
18343 | flag_NotZ = res; |
18344 | flag_N = res; |
18345 | POST_IO |
18346 | RET(10) |
18347 | } |
18348 | |
18349 | // TAS |
18350 | OPCODE(0x4AE8) |
18351 | { |
18352 | u32 adr, res; |
18353 | u32 src, dst; |
18354 | |
18355 | FETCH_SWORD(adr); |
18356 | adr += AREG((Opcode >> 0) & 7); |
18357 | PRE_IO |
18358 | READ_BYTE_F(adr, res) |
18359 | flag_C = 0; |
18360 | flag_V = 0; |
18361 | flag_NotZ = res; |
18362 | flag_N = res; |
18363 | POST_IO |
18364 | RET(12) |
18365 | } |
18366 | |
18367 | // TAS |
18368 | OPCODE(0x4AF0) |
18369 | { |
18370 | u32 adr, res; |
18371 | u32 src, dst; |
18372 | |
18373 | adr = AREG((Opcode >> 0) & 7); |
18374 | DECODE_EXT_WORD |
18375 | PRE_IO |
18376 | READ_BYTE_F(adr, res) |
18377 | flag_C = 0; |
18378 | flag_V = 0; |
18379 | flag_NotZ = res; |
18380 | flag_N = res; |
18381 | POST_IO |
18382 | RET(14) |
18383 | } |
18384 | |
18385 | // TAS |
18386 | OPCODE(0x4AF8) |
18387 | { |
18388 | u32 adr, res; |
18389 | u32 src, dst; |
18390 | |
18391 | FETCH_SWORD(adr); |
18392 | PRE_IO |
18393 | READ_BYTE_F(adr, res) |
18394 | flag_C = 0; |
18395 | flag_V = 0; |
18396 | flag_NotZ = res; |
18397 | flag_N = res; |
18398 | POST_IO |
18399 | RET(12) |
18400 | } |
18401 | |
18402 | // TAS |
18403 | OPCODE(0x4AF9) |
18404 | { |
18405 | u32 adr, res; |
18406 | u32 src, dst; |
18407 | |
18408 | FETCH_LONG(adr); |
18409 | PRE_IO |
18410 | READ_BYTE_F(adr, res) |
18411 | flag_C = 0; |
18412 | flag_V = 0; |
18413 | flag_NotZ = res; |
18414 | flag_N = res; |
18415 | POST_IO |
18416 | RET(16) |
18417 | } |
18418 | |
18419 | // TAS |
18420 | OPCODE(0x4ADF) |
18421 | { |
18422 | u32 adr, res; |
18423 | u32 src, dst; |
18424 | |
18425 | adr = AREG(7); |
18426 | AREG(7) += 2; |
18427 | PRE_IO |
18428 | READ_BYTE_F(adr, res) |
18429 | flag_C = 0; |
18430 | flag_V = 0; |
18431 | flag_NotZ = res; |
18432 | flag_N = res; |
18433 | POST_IO |
18434 | RET(8) |
18435 | } |
18436 | |
18437 | // TAS |
18438 | OPCODE(0x4AE7) |
18439 | { |
18440 | u32 adr, res; |
18441 | u32 src, dst; |
18442 | |
18443 | adr = AREG(7) - 2; |
18444 | AREG(7) = adr; |
18445 | PRE_IO |
18446 | READ_BYTE_F(adr, res) |
18447 | flag_C = 0; |
18448 | flag_V = 0; |
18449 | flag_NotZ = res; |
18450 | flag_N = res; |
18451 | POST_IO |
18452 | RET(10) |
18453 | } |
18454 | |
18455 | // ILLEGAL |
18456 | OPCODE(0x4AFC) |
18457 | { |
18458 | u32 oldPC=GET_PC; |
18459 | SET_PC(oldPC-2) |
18460 | execute_exception(M68K_ILLEGAL_INSTRUCTION_EX); |
18461 | RET(4) |
18462 | } |
18463 | |
18464 | // ILLEGAL A000-AFFF |
18465 | OPCODE(0xA000) |
18466 | { |
18467 | u32 oldPC=GET_PC; |
18468 | SET_PC(oldPC-2) |
18469 | execute_exception(M68K_1010_EX); |
18470 | RET(4) |
18471 | } |
18472 | |
18473 | // ILLEGAL F000-FFFF |
18474 | OPCODE(0xF000) |
18475 | { |
18476 | u32 oldPC=GET_PC; |
18477 | SET_PC(oldPC-2) |
18478 | execute_exception(M68K_1111_EX); |
18479 | RET(4) |
18480 | } |
18481 | |
18482 | // MOVEMaR |
18483 | OPCODE(0x4C90) |
18484 | { |
18485 | u32 adr, res; |
18486 | u32 src, dst; |
18487 | |
18488 | s32 *psrc; |
18489 | |
18490 | FETCH_WORD(res); |
18491 | adr = AREG((Opcode >> 0) & 7); |
18492 | psrc = &DREGs32(0); |
18493 | dst = adr; |
18494 | PRE_IO |
18495 | do |
18496 | { |
18497 | if (res & 1) |
18498 | { |
18499 | READSX_WORD_F(adr, *psrc) |
18500 | adr += 2; |
18501 | } |
18502 | psrc++; |
18503 | } while (res >>= 1); |
18504 | POST_IO |
18505 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18506 | #ifdef USE_CYCLONE_TIMING |
18507 | RET(12) |
18508 | #else |
18509 | RET(16) |
18510 | #endif |
18511 | } |
18512 | |
18513 | // MOVEMaR |
18514 | OPCODE(0x4C98) |
18515 | { |
18516 | u32 adr, res; |
18517 | u32 src, dst; |
18518 | |
18519 | s32 *psrc; |
18520 | |
18521 | FETCH_WORD(res); |
18522 | adr = AREG((Opcode >> 0) & 7); |
18523 | psrc = &DREGs32(0); |
18524 | dst = adr; |
18525 | PRE_IO |
18526 | do |
18527 | { |
18528 | if (res & 1) |
18529 | { |
18530 | READSX_WORD_F(adr, *psrc) |
18531 | adr += 2; |
18532 | } |
18533 | psrc++; |
18534 | } while (res >>= 1); |
18535 | AREG((Opcode >> 0) & 7) = adr; |
18536 | POST_IO |
18537 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18538 | RET(12) |
18539 | } |
18540 | |
18541 | // MOVEMaR |
18542 | OPCODE(0x4CA8) |
18543 | { |
18544 | u32 adr, res; |
18545 | u32 src, dst; |
18546 | |
18547 | s32 *psrc; |
18548 | |
18549 | FETCH_WORD(res); |
18550 | FETCH_SWORD(adr); |
18551 | adr += AREG((Opcode >> 0) & 7); |
18552 | psrc = &DREGs32(0); |
18553 | dst = adr; |
18554 | PRE_IO |
18555 | do |
18556 | { |
18557 | if (res & 1) |
18558 | { |
18559 | READSX_WORD_F(adr, *psrc) |
18560 | adr += 2; |
18561 | } |
18562 | psrc++; |
18563 | } while (res >>= 1); |
18564 | POST_IO |
18565 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18566 | #ifdef USE_CYCLONE_TIMING |
18567 | RET(16) |
18568 | #else |
18569 | RET(24) |
18570 | #endif |
18571 | } |
18572 | |
18573 | // MOVEMaR |
18574 | OPCODE(0x4CB0) |
18575 | { |
18576 | u32 adr, res; |
18577 | u32 src, dst; |
18578 | |
18579 | s32 *psrc; |
18580 | |
18581 | FETCH_WORD(res); |
18582 | adr = AREG((Opcode >> 0) & 7); |
18583 | DECODE_EXT_WORD |
18584 | psrc = &DREGs32(0); |
18585 | dst = adr; |
18586 | PRE_IO |
18587 | do |
18588 | { |
18589 | if (res & 1) |
18590 | { |
18591 | READSX_WORD_F(adr, *psrc) |
18592 | adr += 2; |
18593 | } |
18594 | psrc++; |
18595 | } while (res >>= 1); |
18596 | POST_IO |
18597 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18598 | #ifdef USE_CYCLONE_TIMING |
18599 | RET(18) |
18600 | #else |
18601 | RET(28) |
18602 | #endif |
18603 | } |
18604 | |
18605 | // MOVEMaR |
18606 | OPCODE(0x4CB8) |
18607 | { |
18608 | u32 adr, res; |
18609 | u32 src, dst; |
18610 | |
18611 | s32 *psrc; |
18612 | |
18613 | FETCH_WORD(res); |
18614 | FETCH_SWORD(adr); |
18615 | psrc = &DREGs32(0); |
18616 | dst = adr; |
18617 | PRE_IO |
18618 | do |
18619 | { |
18620 | if (res & 1) |
18621 | { |
18622 | READSX_WORD_F(adr, *psrc) |
18623 | adr += 2; |
18624 | } |
18625 | psrc++; |
18626 | } while (res >>= 1); |
18627 | POST_IO |
18628 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18629 | #ifdef USE_CYCLONE_TIMING |
18630 | RET(16) |
18631 | #else |
18632 | RET(24) |
18633 | #endif |
18634 | } |
18635 | |
18636 | // MOVEMaR |
18637 | OPCODE(0x4CB9) |
18638 | { |
18639 | u32 adr, res; |
18640 | u32 src, dst; |
18641 | |
18642 | s32 *psrc; |
18643 | |
18644 | FETCH_WORD(res); |
18645 | FETCH_LONG(adr); |
18646 | psrc = &DREGs32(0); |
18647 | dst = adr; |
18648 | PRE_IO |
18649 | do |
18650 | { |
18651 | if (res & 1) |
18652 | { |
18653 | READSX_WORD_F(adr, *psrc) |
18654 | adr += 2; |
18655 | } |
18656 | psrc++; |
18657 | } while (res >>= 1); |
18658 | POST_IO |
18659 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18660 | #ifdef USE_CYCLONE_TIMING |
18661 | RET(20) |
18662 | #else |
18663 | RET(32) |
18664 | #endif |
18665 | } |
18666 | |
18667 | // MOVEMaR |
18668 | OPCODE(0x4CBA) |
18669 | { |
18670 | u32 adr, res; |
18671 | u32 src, dst; |
18672 | |
18673 | s32 *psrc; |
18674 | |
18675 | FETCH_WORD(res); |
18676 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
18677 | PC++; |
18678 | psrc = &DREGs32(0); |
18679 | dst = adr; |
18680 | PRE_IO |
18681 | do |
18682 | { |
18683 | if (res & 1) |
18684 | { |
18685 | READSX_WORD_F(adr, *psrc) |
18686 | adr += 2; |
18687 | } |
18688 | psrc++; |
18689 | } while (res >>= 1); |
18690 | POST_IO |
18691 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18692 | #ifdef USE_CYCLONE_TIMING |
18693 | RET(16) |
18694 | #else |
18695 | RET(24) |
18696 | #endif |
18697 | } |
18698 | |
18699 | // MOVEMaR |
18700 | OPCODE(0x4CBB) |
18701 | { |
18702 | u32 adr, res; |
18703 | u32 src, dst; |
18704 | |
18705 | s32 *psrc; |
18706 | |
18707 | FETCH_WORD(res); |
18708 | adr = (u32)(PC) - BasePC; |
18709 | DECODE_EXT_WORD |
18710 | psrc = &DREGs32(0); |
18711 | dst = adr; |
18712 | PRE_IO |
18713 | do |
18714 | { |
18715 | if (res & 1) |
18716 | { |
18717 | READSX_WORD_F(adr, *psrc) |
18718 | adr += 2; |
18719 | } |
18720 | psrc++; |
18721 | } while (res >>= 1); |
18722 | POST_IO |
18723 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18724 | #ifdef USE_CYCLONE_TIMING |
18725 | RET(18) |
18726 | #else |
18727 | RET(28) |
18728 | #endif |
18729 | } |
18730 | |
18731 | // MOVEMaR |
18732 | OPCODE(0x4C9F) |
18733 | { |
18734 | u32 adr, res; |
18735 | u32 src, dst; |
18736 | |
18737 | s32 *psrc; |
18738 | |
18739 | FETCH_WORD(res); |
18740 | adr = AREG(7); |
18741 | psrc = &DREGs32(0); |
18742 | dst = adr; |
18743 | PRE_IO |
18744 | do |
18745 | { |
18746 | if (res & 1) |
18747 | { |
18748 | READSX_WORD_F(adr, *psrc) |
18749 | adr += 2; |
18750 | } |
18751 | psrc++; |
18752 | } while (res >>= 1); |
18753 | AREG(7) = adr; |
18754 | POST_IO |
18755 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18756 | RET(12) |
18757 | } |
18758 | |
18759 | // MOVEMaR |
18760 | OPCODE(0x4CD0) |
18761 | { |
18762 | u32 adr, res; |
18763 | u32 src, dst; |
18764 | |
18765 | u32 *psrc; |
18766 | |
18767 | FETCH_WORD(res); |
18768 | adr = AREG((Opcode >> 0) & 7); |
18769 | psrc = &DREGu32(0); |
18770 | dst = adr; |
18771 | PRE_IO |
18772 | do |
18773 | { |
18774 | if (res & 1) |
18775 | { |
18776 | READ_LONG_F(adr, *psrc) |
18777 | adr += 4; |
18778 | } |
18779 | psrc++; |
18780 | } while (res >>= 1); |
18781 | POST_IO |
18782 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18783 | #ifdef USE_CYCLONE_TIMING |
18784 | RET(12) |
18785 | #else |
18786 | RET(20) |
18787 | #endif |
18788 | } |
18789 | |
18790 | // MOVEMaR |
18791 | OPCODE(0x4CD8) |
18792 | { |
18793 | u32 adr, res; |
18794 | u32 src, dst; |
18795 | |
18796 | u32 *psrc; |
18797 | |
18798 | FETCH_WORD(res); |
18799 | adr = AREG((Opcode >> 0) & 7); |
18800 | psrc = &DREGu32(0); |
18801 | dst = adr; |
18802 | PRE_IO |
18803 | do |
18804 | { |
18805 | if (res & 1) |
18806 | { |
18807 | READ_LONG_F(adr, *psrc) |
18808 | adr += 4; |
18809 | } |
18810 | psrc++; |
18811 | } while (res >>= 1); |
18812 | AREG((Opcode >> 0) & 7) = adr; |
18813 | POST_IO |
18814 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18815 | RET(12) |
18816 | } |
18817 | |
18818 | // MOVEMaR |
18819 | OPCODE(0x4CE8) |
18820 | { |
18821 | u32 adr, res; |
18822 | u32 src, dst; |
18823 | |
18824 | u32 *psrc; |
18825 | |
18826 | FETCH_WORD(res); |
18827 | FETCH_SWORD(adr); |
18828 | adr += AREG((Opcode >> 0) & 7); |
18829 | psrc = &DREGu32(0); |
18830 | dst = adr; |
18831 | PRE_IO |
18832 | do |
18833 | { |
18834 | if (res & 1) |
18835 | { |
18836 | READ_LONG_F(adr, *psrc) |
18837 | adr += 4; |
18838 | } |
18839 | psrc++; |
18840 | } while (res >>= 1); |
18841 | POST_IO |
18842 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18843 | #ifdef USE_CYCLONE_TIMING |
18844 | RET(16) |
18845 | #else |
18846 | RET(28) |
18847 | #endif |
18848 | } |
18849 | |
18850 | // MOVEMaR |
18851 | OPCODE(0x4CF0) |
18852 | { |
18853 | u32 adr, res; |
18854 | u32 src, dst; |
18855 | |
18856 | u32 *psrc; |
18857 | |
18858 | FETCH_WORD(res); |
18859 | adr = AREG((Opcode >> 0) & 7); |
18860 | DECODE_EXT_WORD |
18861 | psrc = &DREGu32(0); |
18862 | dst = adr; |
18863 | PRE_IO |
18864 | do |
18865 | { |
18866 | if (res & 1) |
18867 | { |
18868 | READ_LONG_F(adr, *psrc) |
18869 | adr += 4; |
18870 | } |
18871 | psrc++; |
18872 | } while (res >>= 1); |
18873 | POST_IO |
18874 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18875 | #ifdef USE_CYCLONE_TIMING |
18876 | RET(18) |
18877 | #else |
18878 | RET(32) |
18879 | #endif |
18880 | } |
18881 | |
18882 | // MOVEMaR |
18883 | OPCODE(0x4CF8) |
18884 | { |
18885 | u32 adr, res; |
18886 | u32 src, dst; |
18887 | |
18888 | u32 *psrc; |
18889 | |
18890 | FETCH_WORD(res); |
18891 | FETCH_SWORD(adr); |
18892 | psrc = &DREGu32(0); |
18893 | dst = adr; |
18894 | PRE_IO |
18895 | do |
18896 | { |
18897 | if (res & 1) |
18898 | { |
18899 | READ_LONG_F(adr, *psrc) |
18900 | adr += 4; |
18901 | } |
18902 | psrc++; |
18903 | } while (res >>= 1); |
18904 | POST_IO |
18905 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18906 | #ifdef USE_CYCLONE_TIMING |
18907 | RET(16) |
18908 | #else |
18909 | RET(28) |
18910 | #endif |
18911 | } |
18912 | |
18913 | // MOVEMaR |
18914 | OPCODE(0x4CF9) |
18915 | { |
18916 | u32 adr, res; |
18917 | u32 src, dst; |
18918 | |
18919 | u32 *psrc; |
18920 | |
18921 | FETCH_WORD(res); |
18922 | FETCH_LONG(adr); |
18923 | psrc = &DREGu32(0); |
18924 | dst = adr; |
18925 | PRE_IO |
18926 | do |
18927 | { |
18928 | if (res & 1) |
18929 | { |
18930 | READ_LONG_F(adr, *psrc) |
18931 | adr += 4; |
18932 | } |
18933 | psrc++; |
18934 | } while (res >>= 1); |
18935 | POST_IO |
18936 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18937 | #ifdef USE_CYCLONE_TIMING |
18938 | RET(20) |
18939 | #else |
18940 | RET(36) |
18941 | #endif |
18942 | } |
18943 | |
18944 | // MOVEMaR |
18945 | OPCODE(0x4CFA) |
18946 | { |
18947 | u32 adr, res; |
18948 | u32 src, dst; |
18949 | |
18950 | u32 *psrc; |
18951 | |
18952 | FETCH_WORD(res); |
18953 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
18954 | PC++; |
18955 | psrc = &DREGu32(0); |
18956 | dst = adr; |
18957 | PRE_IO |
18958 | do |
18959 | { |
18960 | if (res & 1) |
18961 | { |
18962 | READ_LONG_F(adr, *psrc) |
18963 | adr += 4; |
18964 | } |
18965 | psrc++; |
18966 | } while (res >>= 1); |
18967 | POST_IO |
18968 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
18969 | #ifdef USE_CYCLONE_TIMING |
18970 | RET(16) |
18971 | #else |
18972 | RET(28) |
18973 | #endif |
18974 | } |
18975 | |
18976 | // MOVEMaR |
18977 | OPCODE(0x4CFB) |
18978 | { |
18979 | u32 adr, res; |
18980 | u32 src, dst; |
18981 | |
18982 | u32 *psrc; |
18983 | |
18984 | FETCH_WORD(res); |
18985 | adr = (u32)(PC) - BasePC; |
18986 | DECODE_EXT_WORD |
18987 | psrc = &DREGu32(0); |
18988 | dst = adr; |
18989 | PRE_IO |
18990 | do |
18991 | { |
18992 | if (res & 1) |
18993 | { |
18994 | READ_LONG_F(adr, *psrc) |
18995 | adr += 4; |
18996 | } |
18997 | psrc++; |
18998 | } while (res >>= 1); |
18999 | POST_IO |
19000 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19001 | #ifdef USE_CYCLONE_TIMING |
19002 | RET(18) |
19003 | #else |
19004 | RET(32) |
19005 | #endif |
19006 | } |
19007 | |
19008 | // MOVEMaR |
19009 | OPCODE(0x4CDF) |
19010 | { |
19011 | u32 adr, res; |
19012 | u32 src, dst; |
19013 | |
19014 | u32 *psrc; |
19015 | |
19016 | FETCH_WORD(res); |
19017 | adr = AREG(7); |
19018 | psrc = &DREGu32(0); |
19019 | dst = adr; |
19020 | PRE_IO |
19021 | do |
19022 | { |
19023 | if (res & 1) |
19024 | { |
19025 | READ_LONG_F(adr, *psrc) |
19026 | adr += 4; |
19027 | } |
19028 | psrc++; |
19029 | } while (res >>= 1); |
19030 | AREG(7) = adr; |
19031 | POST_IO |
19032 | m68kcontext.io_cycle_counter -= (adr - dst) * 2; |
19033 | RET(12) |
19034 | } |
19035 | |
19036 | // TRAP |
19037 | OPCODE(0x4E40) |
19038 | { |
19039 | execute_exception(M68K_TRAP_BASE_EX + (Opcode & 0xF)); |
19040 | RET(4) |
19041 | } |
19042 | |
19043 | // LINK |
19044 | OPCODE(0x4E50) |
19045 | { |
19046 | u32 adr, res; |
19047 | u32 src, dst; |
19048 | |
19049 | res = AREGu32((Opcode >> 0) & 7); |
19050 | PRE_IO |
19051 | PUSH_32_F(res) |
19052 | res = AREG(7); |
19053 | AREG((Opcode >> 0) & 7) = res; |
19054 | FETCH_SWORD(res); |
19055 | AREG(7) += res; |
19056 | POST_IO |
19057 | RET(16) |
19058 | } |
19059 | |
19060 | // LINKA7 |
19061 | OPCODE(0x4E57) |
19062 | { |
19063 | u32 adr, res; |
19064 | u32 src, dst; |
19065 | |
19066 | AREG(7) -= 4; |
19067 | PRE_IO |
19068 | WRITE_LONG_DEC_F(AREG(7), AREG(7)) |
19069 | FETCH_SWORD(res); |
19070 | AREG(7) += res; |
19071 | POST_IO |
19072 | RET(16) |
19073 | } |
19074 | |
19075 | // ULNK |
19076 | OPCODE(0x4E58) |
19077 | { |
19078 | u32 adr, res; |
19079 | u32 src, dst; |
19080 | |
19081 | src = AREGu32((Opcode >> 0) & 7); |
19082 | AREG(7) = src + 4; |
19083 | PRE_IO |
19084 | READ_LONG_F(src, res) |
19085 | AREG((Opcode >> 0) & 7) = res; |
19086 | POST_IO |
19087 | RET(12) |
19088 | } |
19089 | |
19090 | // ULNKA7 |
19091 | OPCODE(0x4E5F) |
19092 | { |
19093 | u32 adr, res; |
19094 | u32 src, dst; |
19095 | |
19096 | PRE_IO |
19097 | READ_LONG_F(AREG(7), AREG(7)) |
19098 | POST_IO |
19099 | RET(12) |
19100 | } |
19101 | |
19102 | // MOVEAUSP |
19103 | OPCODE(0x4E60) |
19104 | { |
19105 | u32 adr, res; |
19106 | u32 src, dst; |
19107 | |
19108 | if (!flag_S) |
19109 | { |
19110 | u32 oldPC=GET_PC; |
19111 | SET_PC(oldPC-2) |
19112 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19113 | RET(4) |
19114 | } |
19115 | res = AREGu32((Opcode >> 0) & 7); |
19116 | ASP = res; |
19117 | RET(4) |
19118 | } |
19119 | |
19120 | // MOVEUSPA |
19121 | OPCODE(0x4E68) |
19122 | { |
19123 | u32 adr, res; |
19124 | u32 src, dst; |
19125 | |
19126 | if (!flag_S) |
19127 | { |
19128 | u32 oldPC=GET_PC; |
19129 | SET_PC(oldPC-2) |
19130 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19131 | RET(4) |
19132 | } |
19133 | res = ASP; |
19134 | AREG((Opcode >> 0) & 7) = res; |
19135 | RET(4) |
19136 | } |
19137 | |
19138 | // RESET |
19139 | OPCODE(0x4E70) |
19140 | { |
19141 | u32 adr, res; |
19142 | u32 src, dst; |
19143 | |
19144 | if (!flag_S) |
19145 | { |
19146 | u32 oldPC=GET_PC; |
19147 | SET_PC(oldPC-2) |
19148 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19149 | RET(4) |
19150 | } |
19151 | PRE_IO |
19152 | if (m68kcontext.reset_handler) m68kcontext.reset_handler(); |
19153 | // CPU->Reset_CallBack(); |
19154 | POST_IO |
19155 | RET(132) |
19156 | } |
19157 | |
19158 | // NOP |
19159 | OPCODE(0x4E71) |
19160 | { |
19161 | RET(4) |
19162 | } |
19163 | |
19164 | // STOP |
19165 | OPCODE(0x4E72) |
19166 | { |
19167 | u32 adr, res; |
19168 | u32 src, dst; |
19169 | |
19170 | if (!flag_S) |
19171 | { |
19172 | u32 oldPC=GET_PC; |
19173 | SET_PC(oldPC-2) |
19174 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19175 | RET(4) |
19176 | } |
19177 | FETCH_WORD(res); |
19178 | res &= M68K_SR_MASK; |
19179 | SET_SR(res) |
19180 | if (!flag_S) |
19181 | { |
19182 | res = AREG(7); |
19183 | AREG(7) = ASP; |
19184 | ASP = res; |
19185 | } |
19186 | m68kcontext.execinfo |= M68K_HALTED; |
19187 | m68kcontext.io_cycle_counter = 0; |
19188 | RET(4) |
19189 | } |
19190 | |
19191 | // RTE |
19192 | OPCODE(0x4E73) |
19193 | { |
19194 | u32 adr, res; |
19195 | u32 src, dst; |
19196 | |
19197 | if (!flag_S) |
19198 | { |
19199 | u32 oldPC=GET_PC; |
19200 | SET_PC(oldPC-2) |
19201 | execute_exception(M68K_PRIVILEGE_VIOLATION_EX); |
19202 | RET(4) |
19203 | } |
19204 | PRE_IO |
19205 | POP_16_F(res) |
19206 | SET_SR(res) |
19207 | POP_32_F(res) |
19208 | SET_PC(res) |
19209 | if (!flag_S) |
19210 | { |
19211 | res = AREG(7); |
19212 | AREG(7) = ASP; |
19213 | ASP = res; |
19214 | } |
19215 | POST_IO |
19216 | m68kcontext.execinfo &= ~(M68K_EMULATE_GROUP_0|M68K_EMULATE_TRACE|M68K_DO_TRACE); |
19217 | CHECK_INT_TO_JUMP(20) |
19218 | RET(20) |
19219 | } |
19220 | |
19221 | // RTS |
19222 | OPCODE(0x4E75) |
19223 | { |
19224 | u32 adr, res; |
19225 | u32 src, dst; |
19226 | |
19227 | PRE_IO |
19228 | POP_32_F(res) |
19229 | SET_PC(res) |
19230 | CHECK_BRANCH_EXCEPTION(res) |
19231 | POST_IO |
19232 | RET(16) |
19233 | } |
19234 | |
19235 | // TRAPV |
19236 | OPCODE(0x4E76) |
19237 | { |
19238 | if (flag_V & 0x80) |
19239 | execute_exception(M68K_TRAPV_EX); |
19240 | RET(4) |
19241 | } |
19242 | |
19243 | // RTR |
19244 | OPCODE(0x4E77) |
19245 | { |
19246 | u32 adr, res; |
19247 | u32 src, dst; |
19248 | |
19249 | PRE_IO |
19250 | POP_16_F(res) |
19251 | SET_CCR(res) |
19252 | POP_32_F(res) |
19253 | SET_PC(res) |
19254 | CHECK_BRANCH_EXCEPTION(res) |
19255 | POST_IO |
19256 | RET(20) |
19257 | } |
19258 | |
19259 | // JSR |
19260 | OPCODE(0x4E90) |
19261 | { |
19262 | u32 adr, res; |
19263 | u32 src, dst; |
19264 | |
19265 | adr = AREG((Opcode >> 0) & 7); |
19266 | { |
19267 | u32 oldPC; |
19268 | |
19269 | oldPC = (u32)(PC) - BasePC; |
19270 | PRE_IO |
19271 | PUSH_32_F(oldPC) |
19272 | } |
19273 | SET_PC(adr) |
19274 | CHECK_BRANCH_EXCEPTION(adr) |
19275 | POST_IO |
19276 | RET(16) |
19277 | } |
19278 | |
19279 | // JSR |
19280 | OPCODE(0x4EA8) |
19281 | { |
19282 | u32 adr, res; |
19283 | u32 src, dst; |
19284 | |
19285 | FETCH_SWORD(adr); |
19286 | adr += AREG((Opcode >> 0) & 7); |
19287 | { |
19288 | u32 oldPC; |
19289 | |
19290 | oldPC = (u32)(PC) - BasePC; |
19291 | PRE_IO |
19292 | PUSH_32_F(oldPC) |
19293 | } |
19294 | SET_PC(adr) |
19295 | CHECK_BRANCH_EXCEPTION(adr) |
19296 | POST_IO |
19297 | RET(18) |
19298 | } |
19299 | |
19300 | // JSR |
19301 | OPCODE(0x4EB0) |
19302 | { |
19303 | u32 adr, res; |
19304 | u32 src, dst; |
19305 | |
19306 | adr = AREG((Opcode >> 0) & 7); |
19307 | DECODE_EXT_WORD |
19308 | { |
19309 | u32 oldPC; |
19310 | |
19311 | oldPC = (u32)(PC) - BasePC; |
19312 | PRE_IO |
19313 | PUSH_32_F(oldPC) |
19314 | } |
19315 | SET_PC(adr) |
19316 | CHECK_BRANCH_EXCEPTION(adr) |
19317 | POST_IO |
19318 | RET(22) |
19319 | } |
19320 | |
19321 | // JSR |
19322 | OPCODE(0x4EB8) |
19323 | { |
19324 | u32 adr, res; |
19325 | u32 src, dst; |
19326 | |
19327 | FETCH_SWORD(adr); |
19328 | { |
19329 | u32 oldPC; |
19330 | |
19331 | oldPC = (u32)(PC) - BasePC; |
19332 | PRE_IO |
19333 | PUSH_32_F(oldPC) |
19334 | } |
19335 | SET_PC(adr) |
19336 | CHECK_BRANCH_EXCEPTION(adr) |
19337 | POST_IO |
19338 | RET(18) |
19339 | } |
19340 | |
19341 | // JSR |
19342 | OPCODE(0x4EB9) |
19343 | { |
19344 | u32 adr, res; |
19345 | u32 src, dst; |
19346 | |
19347 | FETCH_LONG(adr); |
19348 | { |
19349 | u32 oldPC; |
19350 | |
19351 | oldPC = (u32)(PC) - BasePC; |
19352 | PRE_IO |
19353 | PUSH_32_F(oldPC) |
19354 | } |
19355 | SET_PC(adr) |
19356 | CHECK_BRANCH_EXCEPTION(adr) |
19357 | POST_IO |
19358 | RET(20) |
19359 | } |
19360 | |
19361 | // JSR |
19362 | OPCODE(0x4EBA) |
19363 | { |
19364 | u32 adr, res; |
19365 | u32 src, dst; |
19366 | |
19367 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19368 | PC++; |
19369 | { |
19370 | u32 oldPC; |
19371 | |
19372 | oldPC = (u32)(PC) - BasePC; |
19373 | PRE_IO |
19374 | PUSH_32_F(oldPC) |
19375 | } |
19376 | SET_PC(adr) |
19377 | CHECK_BRANCH_EXCEPTION(adr) |
19378 | POST_IO |
19379 | RET(18) |
19380 | } |
19381 | |
19382 | // JSR |
19383 | OPCODE(0x4EBB) |
19384 | { |
19385 | u32 adr, res; |
19386 | u32 src, dst; |
19387 | |
19388 | adr = (u32)(PC) - BasePC; |
19389 | DECODE_EXT_WORD |
19390 | { |
19391 | u32 oldPC; |
19392 | |
19393 | oldPC = (u32)(PC) - BasePC; |
19394 | PRE_IO |
19395 | PUSH_32_F(oldPC) |
19396 | } |
19397 | SET_PC(adr) |
19398 | CHECK_BRANCH_EXCEPTION(adr) |
19399 | POST_IO |
19400 | RET(22) |
19401 | } |
19402 | |
19403 | // JMP |
19404 | OPCODE(0x4ED0) |
19405 | { |
19406 | u32 adr, res; |
19407 | u32 src, dst; |
19408 | |
19409 | adr = AREG((Opcode >> 0) & 7); |
19410 | SET_PC(adr) |
19411 | CHECK_BRANCH_EXCEPTION(adr) |
19412 | RET(8) |
19413 | } |
19414 | |
19415 | // JMP |
19416 | OPCODE(0x4EE8) |
19417 | { |
19418 | u32 adr, res; |
19419 | u32 src, dst; |
19420 | |
19421 | FETCH_SWORD(adr); |
19422 | adr += AREG((Opcode >> 0) & 7); |
19423 | SET_PC(adr) |
19424 | CHECK_BRANCH_EXCEPTION(adr) |
19425 | RET(10) |
19426 | } |
19427 | |
19428 | // JMP |
19429 | OPCODE(0x4EF0) |
19430 | { |
19431 | u32 adr, res; |
19432 | u32 src, dst; |
19433 | |
19434 | adr = AREG((Opcode >> 0) & 7); |
19435 | DECODE_EXT_WORD |
19436 | SET_PC(adr) |
19437 | CHECK_BRANCH_EXCEPTION(adr) |
19438 | RET(14) |
19439 | } |
19440 | |
19441 | // JMP |
19442 | OPCODE(0x4EF8) |
19443 | { |
19444 | u32 adr, res; |
19445 | u32 src, dst; |
19446 | |
19447 | FETCH_SWORD(adr); |
19448 | SET_PC(adr) |
19449 | CHECK_BRANCH_EXCEPTION(adr) |
19450 | RET(10) |
19451 | } |
19452 | |
19453 | // JMP |
19454 | OPCODE(0x4EF9) |
19455 | { |
19456 | u32 adr, res; |
19457 | u32 src, dst; |
19458 | |
19459 | FETCH_LONG(adr); |
19460 | SET_PC(adr) |
19461 | CHECK_BRANCH_EXCEPTION(adr) |
19462 | RET(12) |
19463 | } |
19464 | |
19465 | // JMP |
19466 | OPCODE(0x4EFA) |
19467 | { |
19468 | u32 adr, res; |
19469 | u32 src, dst; |
19470 | |
19471 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19472 | PC++; |
19473 | SET_PC(adr) |
19474 | CHECK_BRANCH_EXCEPTION(adr) |
19475 | RET(10) |
19476 | } |
19477 | |
19478 | // JMP |
19479 | OPCODE(0x4EFB) |
19480 | { |
19481 | u32 adr, res; |
19482 | u32 src, dst; |
19483 | |
19484 | adr = (u32)(PC) - BasePC; |
19485 | DECODE_EXT_WORD |
19486 | SET_PC(adr) |
19487 | CHECK_BRANCH_EXCEPTION(adr) |
19488 | RET(14) |
19489 | } |
19490 | |
19491 | // CHK |
19492 | OPCODE(0x4180) |
19493 | { |
19494 | u32 adr, res; |
19495 | u32 src, dst; |
19496 | |
19497 | src = DREGu16((Opcode >> 0) & 7); |
19498 | res = DREGu16((Opcode >> 9) & 7); |
19499 | if (((s32)res < 0) || (res > src)) |
19500 | { |
19501 | flag_N = res >> 8; |
19502 | execute_exception(M68K_CHK_EX); |
19503 | } |
19504 | RET(10) |
19505 | } |
19506 | |
19507 | // CHK |
19508 | OPCODE(0x4190) |
19509 | { |
19510 | u32 adr, res; |
19511 | u32 src, dst; |
19512 | |
19513 | adr = AREG((Opcode >> 0) & 7); |
19514 | PRE_IO |
19515 | READ_WORD_F(adr, src) |
19516 | res = DREGu16((Opcode >> 9) & 7); |
19517 | if (((s32)res < 0) || (res > src)) |
19518 | { |
19519 | flag_N = res >> 8; |
19520 | execute_exception(M68K_CHK_EX); |
19521 | } |
19522 | POST_IO |
19523 | RET(14) |
19524 | } |
19525 | |
19526 | // CHK |
19527 | OPCODE(0x4198) |
19528 | { |
19529 | u32 adr, res; |
19530 | u32 src, dst; |
19531 | |
19532 | adr = AREG((Opcode >> 0) & 7); |
19533 | AREG((Opcode >> 0) & 7) += 2; |
19534 | PRE_IO |
19535 | READ_WORD_F(adr, src) |
19536 | res = DREGu16((Opcode >> 9) & 7); |
19537 | if (((s32)res < 0) || (res > src)) |
19538 | { |
19539 | flag_N = res >> 8; |
19540 | execute_exception(M68K_CHK_EX); |
19541 | } |
19542 | POST_IO |
19543 | RET(14) |
19544 | } |
19545 | |
19546 | // CHK |
19547 | OPCODE(0x41A0) |
19548 | { |
19549 | u32 adr, res; |
19550 | u32 src, dst; |
19551 | |
19552 | adr = AREG((Opcode >> 0) & 7) - 2; |
19553 | AREG((Opcode >> 0) & 7) = adr; |
19554 | PRE_IO |
19555 | READ_WORD_F(adr, src) |
19556 | res = DREGu16((Opcode >> 9) & 7); |
19557 | if (((s32)res < 0) || (res > src)) |
19558 | { |
19559 | flag_N = res >> 8; |
19560 | execute_exception(M68K_CHK_EX); |
19561 | } |
19562 | POST_IO |
19563 | RET(16) |
19564 | } |
19565 | |
19566 | // CHK |
19567 | OPCODE(0x41A8) |
19568 | { |
19569 | u32 adr, res; |
19570 | u32 src, dst; |
19571 | |
19572 | FETCH_SWORD(adr); |
19573 | adr += AREG((Opcode >> 0) & 7); |
19574 | PRE_IO |
19575 | READ_WORD_F(adr, src) |
19576 | res = DREGu16((Opcode >> 9) & 7); |
19577 | if (((s32)res < 0) || (res > src)) |
19578 | { |
19579 | flag_N = res >> 8; |
19580 | execute_exception(M68K_CHK_EX); |
19581 | } |
19582 | POST_IO |
19583 | RET(18) |
19584 | } |
19585 | |
19586 | // CHK |
19587 | OPCODE(0x41B0) |
19588 | { |
19589 | u32 adr, res; |
19590 | u32 src, dst; |
19591 | |
19592 | adr = AREG((Opcode >> 0) & 7); |
19593 | DECODE_EXT_WORD |
19594 | PRE_IO |
19595 | READ_WORD_F(adr, src) |
19596 | res = DREGu16((Opcode >> 9) & 7); |
19597 | if (((s32)res < 0) || (res > src)) |
19598 | { |
19599 | flag_N = res >> 8; |
19600 | execute_exception(M68K_CHK_EX); |
19601 | } |
19602 | POST_IO |
19603 | RET(20) |
19604 | } |
19605 | |
19606 | // CHK |
19607 | OPCODE(0x41B8) |
19608 | { |
19609 | u32 adr, res; |
19610 | u32 src, dst; |
19611 | |
19612 | FETCH_SWORD(adr); |
19613 | PRE_IO |
19614 | READ_WORD_F(adr, src) |
19615 | res = DREGu16((Opcode >> 9) & 7); |
19616 | if (((s32)res < 0) || (res > src)) |
19617 | { |
19618 | flag_N = res >> 8; |
19619 | execute_exception(M68K_CHK_EX); |
19620 | } |
19621 | POST_IO |
19622 | RET(18) |
19623 | } |
19624 | |
19625 | // CHK |
19626 | OPCODE(0x41B9) |
19627 | { |
19628 | u32 adr, res; |
19629 | u32 src, dst; |
19630 | |
19631 | FETCH_LONG(adr); |
19632 | PRE_IO |
19633 | READ_WORD_F(adr, src) |
19634 | res = DREGu16((Opcode >> 9) & 7); |
19635 | if (((s32)res < 0) || (res > src)) |
19636 | { |
19637 | flag_N = res >> 8; |
19638 | execute_exception(M68K_CHK_EX); |
19639 | } |
19640 | POST_IO |
19641 | RET(22) |
19642 | } |
19643 | |
19644 | // CHK |
19645 | OPCODE(0x41BA) |
19646 | { |
19647 | u32 adr, res; |
19648 | u32 src, dst; |
19649 | |
19650 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19651 | PC++; |
19652 | PRE_IO |
19653 | READ_WORD_F(adr, src) |
19654 | res = DREGu16((Opcode >> 9) & 7); |
19655 | if (((s32)res < 0) || (res > src)) |
19656 | { |
19657 | flag_N = res >> 8; |
19658 | execute_exception(M68K_CHK_EX); |
19659 | } |
19660 | POST_IO |
19661 | RET(18) |
19662 | } |
19663 | |
19664 | // CHK |
19665 | OPCODE(0x41BB) |
19666 | { |
19667 | u32 adr, res; |
19668 | u32 src, dst; |
19669 | |
19670 | adr = (u32)(PC) - BasePC; |
19671 | DECODE_EXT_WORD |
19672 | PRE_IO |
19673 | READ_WORD_F(adr, src) |
19674 | res = DREGu16((Opcode >> 9) & 7); |
19675 | if (((s32)res < 0) || (res > src)) |
19676 | { |
19677 | flag_N = res >> 8; |
19678 | execute_exception(M68K_CHK_EX); |
19679 | } |
19680 | POST_IO |
19681 | RET(20) |
19682 | } |
19683 | |
19684 | // CHK |
19685 | OPCODE(0x41BC) |
19686 | { |
19687 | u32 adr, res; |
19688 | u32 src, dst; |
19689 | |
19690 | FETCH_WORD(src); |
19691 | res = DREGu16((Opcode >> 9) & 7); |
19692 | if (((s32)res < 0) || (res > src)) |
19693 | { |
19694 | flag_N = res >> 8; |
19695 | execute_exception(M68K_CHK_EX); |
19696 | } |
19697 | POST_IO |
19698 | RET(14) |
19699 | } |
19700 | |
19701 | // CHK |
19702 | OPCODE(0x419F) |
19703 | { |
19704 | u32 adr, res; |
19705 | u32 src, dst; |
19706 | |
19707 | adr = AREG(7); |
19708 | AREG(7) += 2; |
19709 | PRE_IO |
19710 | READ_WORD_F(adr, src) |
19711 | res = DREGu16((Opcode >> 9) & 7); |
19712 | if (((s32)res < 0) || (res > src)) |
19713 | { |
19714 | flag_N = res >> 8; |
19715 | execute_exception(M68K_CHK_EX); |
19716 | } |
19717 | POST_IO |
19718 | RET(14) |
19719 | } |
19720 | |
19721 | // CHK |
19722 | OPCODE(0x41A7) |
19723 | { |
19724 | u32 adr, res; |
19725 | u32 src, dst; |
19726 | |
19727 | adr = AREG(7) - 2; |
19728 | AREG(7) = adr; |
19729 | PRE_IO |
19730 | READ_WORD_F(adr, src) |
19731 | res = DREGu16((Opcode >> 9) & 7); |
19732 | if (((s32)res < 0) || (res > src)) |
19733 | { |
19734 | flag_N = res >> 8; |
19735 | execute_exception(M68K_CHK_EX); |
19736 | } |
19737 | POST_IO |
19738 | RET(16) |
19739 | } |
19740 | |
19741 | // LEA |
19742 | OPCODE(0x41D0) |
19743 | { |
19744 | u32 adr, res; |
19745 | u32 src, dst; |
19746 | |
19747 | adr = AREG((Opcode >> 0) & 7); |
19748 | res = adr; |
19749 | AREG((Opcode >> 9) & 7) = res; |
19750 | RET(4) |
19751 | } |
19752 | |
19753 | // LEA |
19754 | OPCODE(0x41E8) |
19755 | { |
19756 | u32 adr, res; |
19757 | u32 src, dst; |
19758 | |
19759 | FETCH_SWORD(adr); |
19760 | adr += AREG((Opcode >> 0) & 7); |
19761 | res = adr; |
19762 | AREG((Opcode >> 9) & 7) = res; |
19763 | RET(8) |
19764 | } |
19765 | |
19766 | // LEA |
19767 | OPCODE(0x41F0) |
19768 | { |
19769 | u32 adr, res; |
19770 | u32 src, dst; |
19771 | |
19772 | adr = AREG((Opcode >> 0) & 7); |
19773 | DECODE_EXT_WORD |
19774 | res = adr; |
19775 | AREG((Opcode >> 9) & 7) = res; |
19776 | RET(12) |
19777 | } |
19778 | |
19779 | // LEA |
19780 | OPCODE(0x41F8) |
19781 | { |
19782 | u32 adr, res; |
19783 | u32 src, dst; |
19784 | |
19785 | FETCH_SWORD(adr); |
19786 | res = adr; |
19787 | AREG((Opcode >> 9) & 7) = res; |
19788 | RET(8) |
19789 | } |
19790 | |
19791 | // LEA |
19792 | OPCODE(0x41F9) |
19793 | { |
19794 | u32 adr, res; |
19795 | u32 src, dst; |
19796 | |
19797 | FETCH_LONG(adr); |
19798 | res = adr; |
19799 | AREG((Opcode >> 9) & 7) = res; |
19800 | RET(12) |
19801 | } |
19802 | |
19803 | // LEA |
19804 | OPCODE(0x41FA) |
19805 | { |
19806 | u32 adr, res; |
19807 | u32 src, dst; |
19808 | |
19809 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
19810 | PC++; |
19811 | res = adr; |
19812 | AREG((Opcode >> 9) & 7) = res; |
19813 | RET(8) |
19814 | } |
19815 | |
19816 | // LEA |
19817 | OPCODE(0x41FB) |
19818 | { |
19819 | u32 adr, res; |
19820 | u32 src, dst; |
19821 | |
19822 | adr = (u32)(PC) - BasePC; |
19823 | DECODE_EXT_WORD |
19824 | res = adr; |
19825 | AREG((Opcode >> 9) & 7) = res; |
19826 | RET(12) |
19827 | } |
19828 | |
19829 | // STCC |
19830 | OPCODE(0x50C0) |
19831 | { |
19832 | u32 adr, res; |
19833 | u32 src, dst; |
19834 | |
19835 | res = 0xFF; |
19836 | DREGu8((Opcode >> 0) & 7) = res; |
19837 | RET(6) |
19838 | } |
19839 | |
19840 | // STCC |
19841 | OPCODE(0x51C0) |
19842 | { |
19843 | u32 adr, res; |
19844 | u32 src, dst; |
19845 | |
19846 | res = 0; |
19847 | DREGu8((Opcode >> 0) & 7) = res; |
19848 | RET(4) |
19849 | } |
19850 | |
19851 | // STCC |
19852 | OPCODE(0x52C0) |
19853 | { |
19854 | u32 adr, res; |
19855 | u32 src, dst; |
19856 | |
19857 | if (flag_NotZ && (!(flag_C & 0x100))) |
19858 | { |
19859 | res = 0xFF; |
19860 | DREGu8((Opcode >> 0) & 7) = res; |
19861 | RET(6) |
19862 | } |
19863 | res = 0; |
19864 | DREGu8((Opcode >> 0) & 7) = res; |
19865 | RET(4) |
19866 | } |
19867 | |
19868 | // STCC |
19869 | OPCODE(0x53C0) |
19870 | { |
19871 | u32 adr, res; |
19872 | u32 src, dst; |
19873 | |
19874 | if ((!flag_NotZ) || (flag_C & 0x100)) |
19875 | { |
19876 | res = 0xFF; |
19877 | DREGu8((Opcode >> 0) & 7) = res; |
19878 | RET(6) |
19879 | } |
19880 | res = 0; |
19881 | DREGu8((Opcode >> 0) & 7) = res; |
19882 | RET(4) |
19883 | } |
19884 | |
19885 | // STCC |
19886 | OPCODE(0x54C0) |
19887 | { |
19888 | u32 adr, res; |
19889 | u32 src, dst; |
19890 | |
19891 | if (!(flag_C & 0x100)) |
19892 | { |
19893 | res = 0xFF; |
19894 | DREGu8((Opcode >> 0) & 7) = res; |
19895 | RET(6) |
19896 | } |
19897 | res = 0; |
19898 | DREGu8((Opcode >> 0) & 7) = res; |
19899 | RET(4) |
19900 | } |
19901 | |
19902 | // STCC |
19903 | OPCODE(0x55C0) |
19904 | { |
19905 | u32 adr, res; |
19906 | u32 src, dst; |
19907 | |
19908 | if (flag_C & 0x100) |
19909 | { |
19910 | res = 0xFF; |
19911 | DREGu8((Opcode >> 0) & 7) = res; |
19912 | RET(6) |
19913 | } |
19914 | res = 0; |
19915 | DREGu8((Opcode >> 0) & 7) = res; |
19916 | RET(4) |
19917 | } |
19918 | |
19919 | // STCC |
19920 | OPCODE(0x56C0) |
19921 | { |
19922 | u32 adr, res; |
19923 | u32 src, dst; |
19924 | |
19925 | if (flag_NotZ) |
19926 | { |
19927 | res = 0xFF; |
19928 | DREGu8((Opcode >> 0) & 7) = res; |
19929 | RET(6) |
19930 | } |
19931 | res = 0; |
19932 | DREGu8((Opcode >> 0) & 7) = res; |
19933 | RET(4) |
19934 | } |
19935 | |
19936 | // STCC |
19937 | OPCODE(0x57C0) |
19938 | { |
19939 | u32 adr, res; |
19940 | u32 src, dst; |
19941 | |
19942 | if (!flag_NotZ) |
19943 | { |
19944 | res = 0xFF; |
19945 | DREGu8((Opcode >> 0) & 7) = res; |
19946 | RET(6) |
19947 | } |
19948 | res = 0; |
19949 | DREGu8((Opcode >> 0) & 7) = res; |
19950 | RET(4) |
19951 | } |
19952 | |
19953 | // STCC |
19954 | OPCODE(0x58C0) |
19955 | { |
19956 | u32 adr, res; |
19957 | u32 src, dst; |
19958 | |
19959 | if (!(flag_V & 0x80)) |
19960 | { |
19961 | res = 0xFF; |
19962 | DREGu8((Opcode >> 0) & 7) = res; |
19963 | RET(6) |
19964 | } |
19965 | res = 0; |
19966 | DREGu8((Opcode >> 0) & 7) = res; |
19967 | RET(4) |
19968 | } |
19969 | |
19970 | // STCC |
19971 | OPCODE(0x59C0) |
19972 | { |
19973 | u32 adr, res; |
19974 | u32 src, dst; |
19975 | |
19976 | if (flag_V & 0x80) |
19977 | { |
19978 | res = 0xFF; |
19979 | DREGu8((Opcode >> 0) & 7) = res; |
19980 | RET(6) |
19981 | } |
19982 | res = 0; |
19983 | DREGu8((Opcode >> 0) & 7) = res; |
19984 | RET(4) |
19985 | } |
19986 | |
19987 | // STCC |
19988 | OPCODE(0x5AC0) |
19989 | { |
19990 | u32 adr, res; |
19991 | u32 src, dst; |
19992 | |
19993 | if (!(flag_N & 0x80)) |
19994 | { |
19995 | res = 0xFF; |
19996 | DREGu8((Opcode >> 0) & 7) = res; |
19997 | RET(6) |
19998 | } |
19999 | res = 0; |
20000 | DREGu8((Opcode >> 0) & 7) = res; |
20001 | RET(4) |
20002 | } |
20003 | |
20004 | // STCC |
20005 | OPCODE(0x5BC0) |
20006 | { |
20007 | u32 adr, res; |
20008 | u32 src, dst; |
20009 | |
20010 | if (flag_N & 0x80) |
20011 | { |
20012 | res = 0xFF; |
20013 | DREGu8((Opcode >> 0) & 7) = res; |
20014 | RET(6) |
20015 | } |
20016 | res = 0; |
20017 | DREGu8((Opcode >> 0) & 7) = res; |
20018 | RET(4) |
20019 | } |
20020 | |
20021 | // STCC |
20022 | OPCODE(0x5CC0) |
20023 | { |
20024 | u32 adr, res; |
20025 | u32 src, dst; |
20026 | |
20027 | if (!((flag_N ^ flag_V) & 0x80)) |
20028 | { |
20029 | res = 0xFF; |
20030 | DREGu8((Opcode >> 0) & 7) = res; |
20031 | RET(6) |
20032 | } |
20033 | res = 0; |
20034 | DREGu8((Opcode >> 0) & 7) = res; |
20035 | RET(4) |
20036 | } |
20037 | |
20038 | // STCC |
20039 | OPCODE(0x5DC0) |
20040 | { |
20041 | u32 adr, res; |
20042 | u32 src, dst; |
20043 | |
20044 | if ((flag_N ^ flag_V) & 0x80) |
20045 | { |
20046 | res = 0xFF; |
20047 | DREGu8((Opcode >> 0) & 7) = res; |
20048 | RET(6) |
20049 | } |
20050 | res = 0; |
20051 | DREGu8((Opcode >> 0) & 7) = res; |
20052 | RET(4) |
20053 | } |
20054 | |
20055 | // STCC |
20056 | OPCODE(0x5EC0) |
20057 | { |
20058 | u32 adr, res; |
20059 | u32 src, dst; |
20060 | |
20061 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20062 | { |
20063 | res = 0xFF; |
20064 | DREGu8((Opcode >> 0) & 7) = res; |
20065 | RET(6) |
20066 | } |
20067 | res = 0; |
20068 | DREGu8((Opcode >> 0) & 7) = res; |
20069 | RET(4) |
20070 | } |
20071 | |
20072 | // STCC |
20073 | OPCODE(0x5FC0) |
20074 | { |
20075 | u32 adr, res; |
20076 | u32 src, dst; |
20077 | |
20078 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20079 | { |
20080 | res = 0xFF; |
20081 | DREGu8((Opcode >> 0) & 7) = res; |
20082 | RET(6) |
20083 | } |
20084 | res = 0; |
20085 | DREGu8((Opcode >> 0) & 7) = res; |
20086 | RET(4) |
20087 | } |
20088 | |
20089 | // STCC |
20090 | OPCODE(0x50D0) |
20091 | { |
20092 | u32 adr, res; |
20093 | u32 src, dst; |
20094 | |
20095 | adr = AREG((Opcode >> 0) & 7); |
20096 | res = 0xFF; |
20097 | PRE_IO |
20098 | WRITE_BYTE_F(adr, res) |
20099 | POST_IO |
20100 | RET(12) |
20101 | } |
20102 | |
20103 | // STCC |
20104 | OPCODE(0x51D0) |
20105 | { |
20106 | u32 adr, res; |
20107 | u32 src, dst; |
20108 | |
20109 | adr = AREG((Opcode >> 0) & 7); |
20110 | res = 0; |
20111 | PRE_IO |
20112 | WRITE_BYTE_F(adr, res) |
20113 | POST_IO |
20114 | RET(12) |
20115 | } |
20116 | |
20117 | // STCC |
20118 | OPCODE(0x52D0) |
20119 | { |
20120 | u32 adr, res; |
20121 | u32 src, dst; |
20122 | |
20123 | adr = AREG((Opcode >> 0) & 7); |
20124 | if (flag_NotZ && (!(flag_C & 0x100))) |
20125 | { |
20126 | res = 0xFF; |
20127 | PRE_IO |
20128 | WRITE_BYTE_F(adr, res) |
20129 | POST_IO |
20130 | RET(12) |
20131 | } |
20132 | res = 0; |
20133 | PRE_IO |
20134 | WRITE_BYTE_F(adr, res) |
20135 | POST_IO |
20136 | RET(12) |
20137 | } |
20138 | |
20139 | // STCC |
20140 | OPCODE(0x53D0) |
20141 | { |
20142 | u32 adr, res; |
20143 | u32 src, dst; |
20144 | |
20145 | adr = AREG((Opcode >> 0) & 7); |
20146 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20147 | { |
20148 | res = 0xFF; |
20149 | PRE_IO |
20150 | WRITE_BYTE_F(adr, res) |
20151 | POST_IO |
20152 | RET(12) |
20153 | } |
20154 | res = 0; |
20155 | PRE_IO |
20156 | WRITE_BYTE_F(adr, res) |
20157 | POST_IO |
20158 | RET(12) |
20159 | } |
20160 | |
20161 | // STCC |
20162 | OPCODE(0x54D0) |
20163 | { |
20164 | u32 adr, res; |
20165 | u32 src, dst; |
20166 | |
20167 | adr = AREG((Opcode >> 0) & 7); |
20168 | if (!(flag_C & 0x100)) |
20169 | { |
20170 | res = 0xFF; |
20171 | PRE_IO |
20172 | WRITE_BYTE_F(adr, res) |
20173 | POST_IO |
20174 | RET(12) |
20175 | } |
20176 | res = 0; |
20177 | PRE_IO |
20178 | WRITE_BYTE_F(adr, res) |
20179 | POST_IO |
20180 | RET(12) |
20181 | } |
20182 | |
20183 | // STCC |
20184 | OPCODE(0x55D0) |
20185 | { |
20186 | u32 adr, res; |
20187 | u32 src, dst; |
20188 | |
20189 | adr = AREG((Opcode >> 0) & 7); |
20190 | if (flag_C & 0x100) |
20191 | { |
20192 | res = 0xFF; |
20193 | PRE_IO |
20194 | WRITE_BYTE_F(adr, res) |
20195 | POST_IO |
20196 | RET(12) |
20197 | } |
20198 | res = 0; |
20199 | PRE_IO |
20200 | WRITE_BYTE_F(adr, res) |
20201 | POST_IO |
20202 | RET(12) |
20203 | } |
20204 | |
20205 | // STCC |
20206 | OPCODE(0x56D0) |
20207 | { |
20208 | u32 adr, res; |
20209 | u32 src, dst; |
20210 | |
20211 | adr = AREG((Opcode >> 0) & 7); |
20212 | if (flag_NotZ) |
20213 | { |
20214 | res = 0xFF; |
20215 | PRE_IO |
20216 | WRITE_BYTE_F(adr, res) |
20217 | POST_IO |
20218 | RET(12) |
20219 | } |
20220 | res = 0; |
20221 | PRE_IO |
20222 | WRITE_BYTE_F(adr, res) |
20223 | POST_IO |
20224 | RET(12) |
20225 | } |
20226 | |
20227 | // STCC |
20228 | OPCODE(0x57D0) |
20229 | { |
20230 | u32 adr, res; |
20231 | u32 src, dst; |
20232 | |
20233 | adr = AREG((Opcode >> 0) & 7); |
20234 | if (!flag_NotZ) |
20235 | { |
20236 | res = 0xFF; |
20237 | PRE_IO |
20238 | WRITE_BYTE_F(adr, res) |
20239 | POST_IO |
20240 | RET(12) |
20241 | } |
20242 | res = 0; |
20243 | PRE_IO |
20244 | WRITE_BYTE_F(adr, res) |
20245 | POST_IO |
20246 | RET(12) |
20247 | } |
20248 | |
20249 | // STCC |
20250 | OPCODE(0x58D0) |
20251 | { |
20252 | u32 adr, res; |
20253 | u32 src, dst; |
20254 | |
20255 | adr = AREG((Opcode >> 0) & 7); |
20256 | if (!(flag_V & 0x80)) |
20257 | { |
20258 | res = 0xFF; |
20259 | PRE_IO |
20260 | WRITE_BYTE_F(adr, res) |
20261 | POST_IO |
20262 | RET(12) |
20263 | } |
20264 | res = 0; |
20265 | PRE_IO |
20266 | WRITE_BYTE_F(adr, res) |
20267 | POST_IO |
20268 | RET(12) |
20269 | } |
20270 | |
20271 | // STCC |
20272 | OPCODE(0x59D0) |
20273 | { |
20274 | u32 adr, res; |
20275 | u32 src, dst; |
20276 | |
20277 | adr = AREG((Opcode >> 0) & 7); |
20278 | if (flag_V & 0x80) |
20279 | { |
20280 | res = 0xFF; |
20281 | PRE_IO |
20282 | WRITE_BYTE_F(adr, res) |
20283 | POST_IO |
20284 | RET(12) |
20285 | } |
20286 | res = 0; |
20287 | PRE_IO |
20288 | WRITE_BYTE_F(adr, res) |
20289 | POST_IO |
20290 | RET(12) |
20291 | } |
20292 | |
20293 | // STCC |
20294 | OPCODE(0x5AD0) |
20295 | { |
20296 | u32 adr, res; |
20297 | u32 src, dst; |
20298 | |
20299 | adr = AREG((Opcode >> 0) & 7); |
20300 | if (!(flag_N & 0x80)) |
20301 | { |
20302 | res = 0xFF; |
20303 | PRE_IO |
20304 | WRITE_BYTE_F(adr, res) |
20305 | POST_IO |
20306 | RET(12) |
20307 | } |
20308 | res = 0; |
20309 | PRE_IO |
20310 | WRITE_BYTE_F(adr, res) |
20311 | POST_IO |
20312 | RET(12) |
20313 | } |
20314 | |
20315 | // STCC |
20316 | OPCODE(0x5BD0) |
20317 | { |
20318 | u32 adr, res; |
20319 | u32 src, dst; |
20320 | |
20321 | adr = AREG((Opcode >> 0) & 7); |
20322 | if (flag_N & 0x80) |
20323 | { |
20324 | res = 0xFF; |
20325 | PRE_IO |
20326 | WRITE_BYTE_F(adr, res) |
20327 | POST_IO |
20328 | RET(12) |
20329 | } |
20330 | res = 0; |
20331 | PRE_IO |
20332 | WRITE_BYTE_F(adr, res) |
20333 | POST_IO |
20334 | RET(12) |
20335 | } |
20336 | |
20337 | // STCC |
20338 | OPCODE(0x5CD0) |
20339 | { |
20340 | u32 adr, res; |
20341 | u32 src, dst; |
20342 | |
20343 | adr = AREG((Opcode >> 0) & 7); |
20344 | if (!((flag_N ^ flag_V) & 0x80)) |
20345 | { |
20346 | res = 0xFF; |
20347 | PRE_IO |
20348 | WRITE_BYTE_F(adr, res) |
20349 | POST_IO |
20350 | RET(12) |
20351 | } |
20352 | res = 0; |
20353 | PRE_IO |
20354 | WRITE_BYTE_F(adr, res) |
20355 | POST_IO |
20356 | RET(12) |
20357 | } |
20358 | |
20359 | // STCC |
20360 | OPCODE(0x5DD0) |
20361 | { |
20362 | u32 adr, res; |
20363 | u32 src, dst; |
20364 | |
20365 | adr = AREG((Opcode >> 0) & 7); |
20366 | if ((flag_N ^ flag_V) & 0x80) |
20367 | { |
20368 | res = 0xFF; |
20369 | PRE_IO |
20370 | WRITE_BYTE_F(adr, res) |
20371 | POST_IO |
20372 | RET(12) |
20373 | } |
20374 | res = 0; |
20375 | PRE_IO |
20376 | WRITE_BYTE_F(adr, res) |
20377 | POST_IO |
20378 | RET(12) |
20379 | } |
20380 | |
20381 | // STCC |
20382 | OPCODE(0x5ED0) |
20383 | { |
20384 | u32 adr, res; |
20385 | u32 src, dst; |
20386 | |
20387 | adr = AREG((Opcode >> 0) & 7); |
20388 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20389 | { |
20390 | res = 0xFF; |
20391 | PRE_IO |
20392 | WRITE_BYTE_F(adr, res) |
20393 | POST_IO |
20394 | RET(12) |
20395 | } |
20396 | res = 0; |
20397 | PRE_IO |
20398 | WRITE_BYTE_F(adr, res) |
20399 | POST_IO |
20400 | RET(12) |
20401 | } |
20402 | |
20403 | // STCC |
20404 | OPCODE(0x5FD0) |
20405 | { |
20406 | u32 adr, res; |
20407 | u32 src, dst; |
20408 | |
20409 | adr = AREG((Opcode >> 0) & 7); |
20410 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20411 | { |
20412 | res = 0xFF; |
20413 | PRE_IO |
20414 | WRITE_BYTE_F(adr, res) |
20415 | POST_IO |
20416 | RET(12) |
20417 | } |
20418 | res = 0; |
20419 | PRE_IO |
20420 | WRITE_BYTE_F(adr, res) |
20421 | POST_IO |
20422 | RET(12) |
20423 | } |
20424 | |
20425 | // STCC |
20426 | OPCODE(0x50D8) |
20427 | { |
20428 | u32 adr, res; |
20429 | u32 src, dst; |
20430 | |
20431 | adr = AREG((Opcode >> 0) & 7); |
20432 | AREG((Opcode >> 0) & 7) += 1; |
20433 | res = 0xFF; |
20434 | PRE_IO |
20435 | WRITE_BYTE_F(adr, res) |
20436 | POST_IO |
20437 | RET(12) |
20438 | } |
20439 | |
20440 | // STCC |
20441 | OPCODE(0x51D8) |
20442 | { |
20443 | u32 adr, res; |
20444 | u32 src, dst; |
20445 | |
20446 | adr = AREG((Opcode >> 0) & 7); |
20447 | AREG((Opcode >> 0) & 7) += 1; |
20448 | res = 0; |
20449 | PRE_IO |
20450 | WRITE_BYTE_F(adr, res) |
20451 | POST_IO |
20452 | RET(12) |
20453 | } |
20454 | |
20455 | // STCC |
20456 | OPCODE(0x52D8) |
20457 | { |
20458 | u32 adr, res; |
20459 | u32 src, dst; |
20460 | |
20461 | adr = AREG((Opcode >> 0) & 7); |
20462 | AREG((Opcode >> 0) & 7) += 1; |
20463 | if (flag_NotZ && (!(flag_C & 0x100))) |
20464 | { |
20465 | res = 0xFF; |
20466 | PRE_IO |
20467 | WRITE_BYTE_F(adr, res) |
20468 | POST_IO |
20469 | RET(12) |
20470 | } |
20471 | res = 0; |
20472 | PRE_IO |
20473 | WRITE_BYTE_F(adr, res) |
20474 | POST_IO |
20475 | RET(12) |
20476 | } |
20477 | |
20478 | // STCC |
20479 | OPCODE(0x53D8) |
20480 | { |
20481 | u32 adr, res; |
20482 | u32 src, dst; |
20483 | |
20484 | adr = AREG((Opcode >> 0) & 7); |
20485 | AREG((Opcode >> 0) & 7) += 1; |
20486 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20487 | { |
20488 | res = 0xFF; |
20489 | PRE_IO |
20490 | WRITE_BYTE_F(adr, res) |
20491 | POST_IO |
20492 | RET(12) |
20493 | } |
20494 | res = 0; |
20495 | PRE_IO |
20496 | WRITE_BYTE_F(adr, res) |
20497 | POST_IO |
20498 | RET(12) |
20499 | } |
20500 | |
20501 | // STCC |
20502 | OPCODE(0x54D8) |
20503 | { |
20504 | u32 adr, res; |
20505 | u32 src, dst; |
20506 | |
20507 | adr = AREG((Opcode >> 0) & 7); |
20508 | AREG((Opcode >> 0) & 7) += 1; |
20509 | if (!(flag_C & 0x100)) |
20510 | { |
20511 | res = 0xFF; |
20512 | PRE_IO |
20513 | WRITE_BYTE_F(adr, res) |
20514 | POST_IO |
20515 | RET(12) |
20516 | } |
20517 | res = 0; |
20518 | PRE_IO |
20519 | WRITE_BYTE_F(adr, res) |
20520 | POST_IO |
20521 | RET(12) |
20522 | } |
20523 | |
20524 | // STCC |
20525 | OPCODE(0x55D8) |
20526 | { |
20527 | u32 adr, res; |
20528 | u32 src, dst; |
20529 | |
20530 | adr = AREG((Opcode >> 0) & 7); |
20531 | AREG((Opcode >> 0) & 7) += 1; |
20532 | if (flag_C & 0x100) |
20533 | { |
20534 | res = 0xFF; |
20535 | PRE_IO |
20536 | WRITE_BYTE_F(adr, res) |
20537 | POST_IO |
20538 | RET(12) |
20539 | } |
20540 | res = 0; |
20541 | PRE_IO |
20542 | WRITE_BYTE_F(adr, res) |
20543 | POST_IO |
20544 | RET(12) |
20545 | } |
20546 | |
20547 | // STCC |
20548 | OPCODE(0x56D8) |
20549 | { |
20550 | u32 adr, res; |
20551 | u32 src, dst; |
20552 | |
20553 | adr = AREG((Opcode >> 0) & 7); |
20554 | AREG((Opcode >> 0) & 7) += 1; |
20555 | if (flag_NotZ) |
20556 | { |
20557 | res = 0xFF; |
20558 | PRE_IO |
20559 | WRITE_BYTE_F(adr, res) |
20560 | POST_IO |
20561 | RET(12) |
20562 | } |
20563 | res = 0; |
20564 | PRE_IO |
20565 | WRITE_BYTE_F(adr, res) |
20566 | POST_IO |
20567 | RET(12) |
20568 | } |
20569 | |
20570 | // STCC |
20571 | OPCODE(0x57D8) |
20572 | { |
20573 | u32 adr, res; |
20574 | u32 src, dst; |
20575 | |
20576 | adr = AREG((Opcode >> 0) & 7); |
20577 | AREG((Opcode >> 0) & 7) += 1; |
20578 | if (!flag_NotZ) |
20579 | { |
20580 | res = 0xFF; |
20581 | PRE_IO |
20582 | WRITE_BYTE_F(adr, res) |
20583 | POST_IO |
20584 | RET(12) |
20585 | } |
20586 | res = 0; |
20587 | PRE_IO |
20588 | WRITE_BYTE_F(adr, res) |
20589 | POST_IO |
20590 | RET(12) |
20591 | } |
20592 | |
20593 | // STCC |
20594 | OPCODE(0x58D8) |
20595 | { |
20596 | u32 adr, res; |
20597 | u32 src, dst; |
20598 | |
20599 | adr = AREG((Opcode >> 0) & 7); |
20600 | AREG((Opcode >> 0) & 7) += 1; |
20601 | if (!(flag_V & 0x80)) |
20602 | { |
20603 | res = 0xFF; |
20604 | PRE_IO |
20605 | WRITE_BYTE_F(adr, res) |
20606 | POST_IO |
20607 | RET(12) |
20608 | } |
20609 | res = 0; |
20610 | PRE_IO |
20611 | WRITE_BYTE_F(adr, res) |
20612 | POST_IO |
20613 | RET(12) |
20614 | } |
20615 | |
20616 | // STCC |
20617 | OPCODE(0x59D8) |
20618 | { |
20619 | u32 adr, res; |
20620 | u32 src, dst; |
20621 | |
20622 | adr = AREG((Opcode >> 0) & 7); |
20623 | AREG((Opcode >> 0) & 7) += 1; |
20624 | if (flag_V & 0x80) |
20625 | { |
20626 | res = 0xFF; |
20627 | PRE_IO |
20628 | WRITE_BYTE_F(adr, res) |
20629 | POST_IO |
20630 | RET(12) |
20631 | } |
20632 | res = 0; |
20633 | PRE_IO |
20634 | WRITE_BYTE_F(adr, res) |
20635 | POST_IO |
20636 | RET(12) |
20637 | } |
20638 | |
20639 | // STCC |
20640 | OPCODE(0x5AD8) |
20641 | { |
20642 | u32 adr, res; |
20643 | u32 src, dst; |
20644 | |
20645 | adr = AREG((Opcode >> 0) & 7); |
20646 | AREG((Opcode >> 0) & 7) += 1; |
20647 | if (!(flag_N & 0x80)) |
20648 | { |
20649 | res = 0xFF; |
20650 | PRE_IO |
20651 | WRITE_BYTE_F(adr, res) |
20652 | POST_IO |
20653 | RET(12) |
20654 | } |
20655 | res = 0; |
20656 | PRE_IO |
20657 | WRITE_BYTE_F(adr, res) |
20658 | POST_IO |
20659 | RET(12) |
20660 | } |
20661 | |
20662 | // STCC |
20663 | OPCODE(0x5BD8) |
20664 | { |
20665 | u32 adr, res; |
20666 | u32 src, dst; |
20667 | |
20668 | adr = AREG((Opcode >> 0) & 7); |
20669 | AREG((Opcode >> 0) & 7) += 1; |
20670 | if (flag_N & 0x80) |
20671 | { |
20672 | res = 0xFF; |
20673 | PRE_IO |
20674 | WRITE_BYTE_F(adr, res) |
20675 | POST_IO |
20676 | RET(12) |
20677 | } |
20678 | res = 0; |
20679 | PRE_IO |
20680 | WRITE_BYTE_F(adr, res) |
20681 | POST_IO |
20682 | RET(12) |
20683 | } |
20684 | |
20685 | // STCC |
20686 | OPCODE(0x5CD8) |
20687 | { |
20688 | u32 adr, res; |
20689 | u32 src, dst; |
20690 | |
20691 | adr = AREG((Opcode >> 0) & 7); |
20692 | AREG((Opcode >> 0) & 7) += 1; |
20693 | if (!((flag_N ^ flag_V) & 0x80)) |
20694 | { |
20695 | res = 0xFF; |
20696 | PRE_IO |
20697 | WRITE_BYTE_F(adr, res) |
20698 | POST_IO |
20699 | RET(12) |
20700 | } |
20701 | res = 0; |
20702 | PRE_IO |
20703 | WRITE_BYTE_F(adr, res) |
20704 | POST_IO |
20705 | RET(12) |
20706 | } |
20707 | |
20708 | // STCC |
20709 | OPCODE(0x5DD8) |
20710 | { |
20711 | u32 adr, res; |
20712 | u32 src, dst; |
20713 | |
20714 | adr = AREG((Opcode >> 0) & 7); |
20715 | AREG((Opcode >> 0) & 7) += 1; |
20716 | if ((flag_N ^ flag_V) & 0x80) |
20717 | { |
20718 | res = 0xFF; |
20719 | PRE_IO |
20720 | WRITE_BYTE_F(adr, res) |
20721 | POST_IO |
20722 | RET(12) |
20723 | } |
20724 | res = 0; |
20725 | PRE_IO |
20726 | WRITE_BYTE_F(adr, res) |
20727 | POST_IO |
20728 | RET(12) |
20729 | } |
20730 | |
20731 | // STCC |
20732 | OPCODE(0x5ED8) |
20733 | { |
20734 | u32 adr, res; |
20735 | u32 src, dst; |
20736 | |
20737 | adr = AREG((Opcode >> 0) & 7); |
20738 | AREG((Opcode >> 0) & 7) += 1; |
20739 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20740 | { |
20741 | res = 0xFF; |
20742 | PRE_IO |
20743 | WRITE_BYTE_F(adr, res) |
20744 | POST_IO |
20745 | RET(12) |
20746 | } |
20747 | res = 0; |
20748 | PRE_IO |
20749 | WRITE_BYTE_F(adr, res) |
20750 | POST_IO |
20751 | RET(12) |
20752 | } |
20753 | |
20754 | // STCC |
20755 | OPCODE(0x5FD8) |
20756 | { |
20757 | u32 adr, res; |
20758 | u32 src, dst; |
20759 | |
20760 | adr = AREG((Opcode >> 0) & 7); |
20761 | AREG((Opcode >> 0) & 7) += 1; |
20762 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20763 | { |
20764 | res = 0xFF; |
20765 | PRE_IO |
20766 | WRITE_BYTE_F(adr, res) |
20767 | POST_IO |
20768 | RET(12) |
20769 | } |
20770 | res = 0; |
20771 | PRE_IO |
20772 | WRITE_BYTE_F(adr, res) |
20773 | POST_IO |
20774 | RET(12) |
20775 | } |
20776 | |
20777 | // STCC |
20778 | OPCODE(0x50E0) |
20779 | { |
20780 | u32 adr, res; |
20781 | u32 src, dst; |
20782 | |
20783 | adr = AREG((Opcode >> 0) & 7) - 1; |
20784 | AREG((Opcode >> 0) & 7) = adr; |
20785 | res = 0xFF; |
20786 | PRE_IO |
20787 | WRITE_BYTE_F(adr, res) |
20788 | POST_IO |
20789 | RET(14) |
20790 | } |
20791 | |
20792 | // STCC |
20793 | OPCODE(0x51E0) |
20794 | { |
20795 | u32 adr, res; |
20796 | u32 src, dst; |
20797 | |
20798 | adr = AREG((Opcode >> 0) & 7) - 1; |
20799 | AREG((Opcode >> 0) & 7) = adr; |
20800 | res = 0; |
20801 | PRE_IO |
20802 | WRITE_BYTE_F(adr, res) |
20803 | POST_IO |
20804 | RET(14) |
20805 | } |
20806 | |
20807 | // STCC |
20808 | OPCODE(0x52E0) |
20809 | { |
20810 | u32 adr, res; |
20811 | u32 src, dst; |
20812 | |
20813 | adr = AREG((Opcode >> 0) & 7) - 1; |
20814 | AREG((Opcode >> 0) & 7) = adr; |
20815 | if (flag_NotZ && (!(flag_C & 0x100))) |
20816 | { |
20817 | res = 0xFF; |
20818 | PRE_IO |
20819 | WRITE_BYTE_F(adr, res) |
20820 | POST_IO |
20821 | RET(14) |
20822 | } |
20823 | res = 0; |
20824 | PRE_IO |
20825 | WRITE_BYTE_F(adr, res) |
20826 | POST_IO |
20827 | RET(14) |
20828 | } |
20829 | |
20830 | // STCC |
20831 | OPCODE(0x53E0) |
20832 | { |
20833 | u32 adr, res; |
20834 | u32 src, dst; |
20835 | |
20836 | adr = AREG((Opcode >> 0) & 7) - 1; |
20837 | AREG((Opcode >> 0) & 7) = adr; |
20838 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20839 | { |
20840 | res = 0xFF; |
20841 | PRE_IO |
20842 | WRITE_BYTE_F(adr, res) |
20843 | POST_IO |
20844 | RET(14) |
20845 | } |
20846 | res = 0; |
20847 | PRE_IO |
20848 | WRITE_BYTE_F(adr, res) |
20849 | POST_IO |
20850 | RET(14) |
20851 | } |
20852 | |
20853 | // STCC |
20854 | OPCODE(0x54E0) |
20855 | { |
20856 | u32 adr, res; |
20857 | u32 src, dst; |
20858 | |
20859 | adr = AREG((Opcode >> 0) & 7) - 1; |
20860 | AREG((Opcode >> 0) & 7) = adr; |
20861 | if (!(flag_C & 0x100)) |
20862 | { |
20863 | res = 0xFF; |
20864 | PRE_IO |
20865 | WRITE_BYTE_F(adr, res) |
20866 | POST_IO |
20867 | RET(14) |
20868 | } |
20869 | res = 0; |
20870 | PRE_IO |
20871 | WRITE_BYTE_F(adr, res) |
20872 | POST_IO |
20873 | RET(14) |
20874 | } |
20875 | |
20876 | // STCC |
20877 | OPCODE(0x55E0) |
20878 | { |
20879 | u32 adr, res; |
20880 | u32 src, dst; |
20881 | |
20882 | adr = AREG((Opcode >> 0) & 7) - 1; |
20883 | AREG((Opcode >> 0) & 7) = adr; |
20884 | if (flag_C & 0x100) |
20885 | { |
20886 | res = 0xFF; |
20887 | PRE_IO |
20888 | WRITE_BYTE_F(adr, res) |
20889 | POST_IO |
20890 | RET(14) |
20891 | } |
20892 | res = 0; |
20893 | PRE_IO |
20894 | WRITE_BYTE_F(adr, res) |
20895 | POST_IO |
20896 | RET(14) |
20897 | } |
20898 | |
20899 | // STCC |
20900 | OPCODE(0x56E0) |
20901 | { |
20902 | u32 adr, res; |
20903 | u32 src, dst; |
20904 | |
20905 | adr = AREG((Opcode >> 0) & 7) - 1; |
20906 | AREG((Opcode >> 0) & 7) = adr; |
20907 | if (flag_NotZ) |
20908 | { |
20909 | res = 0xFF; |
20910 | PRE_IO |
20911 | WRITE_BYTE_F(adr, res) |
20912 | POST_IO |
20913 | RET(14) |
20914 | } |
20915 | res = 0; |
20916 | PRE_IO |
20917 | WRITE_BYTE_F(adr, res) |
20918 | POST_IO |
20919 | RET(14) |
20920 | } |
20921 | |
20922 | // STCC |
20923 | OPCODE(0x57E0) |
20924 | { |
20925 | u32 adr, res; |
20926 | u32 src, dst; |
20927 | |
20928 | adr = AREG((Opcode >> 0) & 7) - 1; |
20929 | AREG((Opcode >> 0) & 7) = adr; |
20930 | if (!flag_NotZ) |
20931 | { |
20932 | res = 0xFF; |
20933 | PRE_IO |
20934 | WRITE_BYTE_F(adr, res) |
20935 | POST_IO |
20936 | RET(14) |
20937 | } |
20938 | res = 0; |
20939 | PRE_IO |
20940 | WRITE_BYTE_F(adr, res) |
20941 | POST_IO |
20942 | RET(14) |
20943 | } |
20944 | |
20945 | // STCC |
20946 | OPCODE(0x58E0) |
20947 | { |
20948 | u32 adr, res; |
20949 | u32 src, dst; |
20950 | |
20951 | adr = AREG((Opcode >> 0) & 7) - 1; |
20952 | AREG((Opcode >> 0) & 7) = adr; |
20953 | if (!(flag_V & 0x80)) |
20954 | { |
20955 | res = 0xFF; |
20956 | PRE_IO |
20957 | WRITE_BYTE_F(adr, res) |
20958 | POST_IO |
20959 | RET(14) |
20960 | } |
20961 | res = 0; |
20962 | PRE_IO |
20963 | WRITE_BYTE_F(adr, res) |
20964 | POST_IO |
20965 | RET(14) |
20966 | } |
20967 | |
20968 | // STCC |
20969 | OPCODE(0x59E0) |
20970 | { |
20971 | u32 adr, res; |
20972 | u32 src, dst; |
20973 | |
20974 | adr = AREG((Opcode >> 0) & 7) - 1; |
20975 | AREG((Opcode >> 0) & 7) = adr; |
20976 | if (flag_V & 0x80) |
20977 | { |
20978 | res = 0xFF; |
20979 | PRE_IO |
20980 | WRITE_BYTE_F(adr, res) |
20981 | POST_IO |
20982 | RET(14) |
20983 | } |
20984 | res = 0; |
20985 | PRE_IO |
20986 | WRITE_BYTE_F(adr, res) |
20987 | POST_IO |
20988 | RET(14) |
20989 | } |
20990 | |
20991 | // STCC |
20992 | OPCODE(0x5AE0) |
20993 | { |
20994 | u32 adr, res; |
20995 | u32 src, dst; |
20996 | |
20997 | adr = AREG((Opcode >> 0) & 7) - 1; |
20998 | AREG((Opcode >> 0) & 7) = adr; |
20999 | if (!(flag_N & 0x80)) |
21000 | { |
21001 | res = 0xFF; |
21002 | PRE_IO |
21003 | WRITE_BYTE_F(adr, res) |
21004 | POST_IO |
21005 | RET(14) |
21006 | } |
21007 | res = 0; |
21008 | PRE_IO |
21009 | WRITE_BYTE_F(adr, res) |
21010 | POST_IO |
21011 | RET(14) |
21012 | } |
21013 | |
21014 | // STCC |
21015 | OPCODE(0x5BE0) |
21016 | { |
21017 | u32 adr, res; |
21018 | u32 src, dst; |
21019 | |
21020 | adr = AREG((Opcode >> 0) & 7) - 1; |
21021 | AREG((Opcode >> 0) & 7) = adr; |
21022 | if (flag_N & 0x80) |
21023 | { |
21024 | res = 0xFF; |
21025 | PRE_IO |
21026 | WRITE_BYTE_F(adr, res) |
21027 | POST_IO |
21028 | RET(14) |
21029 | } |
21030 | res = 0; |
21031 | PRE_IO |
21032 | WRITE_BYTE_F(adr, res) |
21033 | POST_IO |
21034 | RET(14) |
21035 | } |
21036 | |
21037 | // STCC |
21038 | OPCODE(0x5CE0) |
21039 | { |
21040 | u32 adr, res; |
21041 | u32 src, dst; |
21042 | |
21043 | adr = AREG((Opcode >> 0) & 7) - 1; |
21044 | AREG((Opcode >> 0) & 7) = adr; |
21045 | if (!((flag_N ^ flag_V) & 0x80)) |
21046 | { |
21047 | res = 0xFF; |
21048 | PRE_IO |
21049 | WRITE_BYTE_F(adr, res) |
21050 | POST_IO |
21051 | RET(14) |
21052 | } |
21053 | res = 0; |
21054 | PRE_IO |
21055 | WRITE_BYTE_F(adr, res) |
21056 | POST_IO |
21057 | RET(14) |
21058 | } |
21059 | |
21060 | // STCC |
21061 | OPCODE(0x5DE0) |
21062 | { |
21063 | u32 adr, res; |
21064 | u32 src, dst; |
21065 | |
21066 | adr = AREG((Opcode >> 0) & 7) - 1; |
21067 | AREG((Opcode >> 0) & 7) = adr; |
21068 | if ((flag_N ^ flag_V) & 0x80) |
21069 | { |
21070 | res = 0xFF; |
21071 | PRE_IO |
21072 | WRITE_BYTE_F(adr, res) |
21073 | POST_IO |
21074 | RET(14) |
21075 | } |
21076 | res = 0; |
21077 | PRE_IO |
21078 | WRITE_BYTE_F(adr, res) |
21079 | POST_IO |
21080 | RET(14) |
21081 | } |
21082 | |
21083 | // STCC |
21084 | OPCODE(0x5EE0) |
21085 | { |
21086 | u32 adr, res; |
21087 | u32 src, dst; |
21088 | |
21089 | adr = AREG((Opcode >> 0) & 7) - 1; |
21090 | AREG((Opcode >> 0) & 7) = adr; |
21091 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21092 | { |
21093 | res = 0xFF; |
21094 | PRE_IO |
21095 | WRITE_BYTE_F(adr, res) |
21096 | POST_IO |
21097 | RET(14) |
21098 | } |
21099 | res = 0; |
21100 | PRE_IO |
21101 | WRITE_BYTE_F(adr, res) |
21102 | POST_IO |
21103 | RET(14) |
21104 | } |
21105 | |
21106 | // STCC |
21107 | OPCODE(0x5FE0) |
21108 | { |
21109 | u32 adr, res; |
21110 | u32 src, dst; |
21111 | |
21112 | adr = AREG((Opcode >> 0) & 7) - 1; |
21113 | AREG((Opcode >> 0) & 7) = adr; |
21114 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21115 | { |
21116 | res = 0xFF; |
21117 | PRE_IO |
21118 | WRITE_BYTE_F(adr, res) |
21119 | POST_IO |
21120 | RET(14) |
21121 | } |
21122 | res = 0; |
21123 | PRE_IO |
21124 | WRITE_BYTE_F(adr, res) |
21125 | POST_IO |
21126 | RET(14) |
21127 | } |
21128 | |
21129 | // STCC |
21130 | OPCODE(0x50E8) |
21131 | { |
21132 | u32 adr, res; |
21133 | u32 src, dst; |
21134 | |
21135 | FETCH_SWORD(adr); |
21136 | adr += AREG((Opcode >> 0) & 7); |
21137 | res = 0xFF; |
21138 | PRE_IO |
21139 | WRITE_BYTE_F(adr, res) |
21140 | POST_IO |
21141 | RET(16) |
21142 | } |
21143 | |
21144 | // STCC |
21145 | OPCODE(0x51E8) |
21146 | { |
21147 | u32 adr, res; |
21148 | u32 src, dst; |
21149 | |
21150 | FETCH_SWORD(adr); |
21151 | adr += AREG((Opcode >> 0) & 7); |
21152 | res = 0; |
21153 | PRE_IO |
21154 | WRITE_BYTE_F(adr, res) |
21155 | POST_IO |
21156 | RET(16) |
21157 | } |
21158 | |
21159 | // STCC |
21160 | OPCODE(0x52E8) |
21161 | { |
21162 | u32 adr, res; |
21163 | u32 src, dst; |
21164 | |
21165 | FETCH_SWORD(adr); |
21166 | adr += AREG((Opcode >> 0) & 7); |
21167 | if (flag_NotZ && (!(flag_C & 0x100))) |
21168 | { |
21169 | res = 0xFF; |
21170 | PRE_IO |
21171 | WRITE_BYTE_F(adr, res) |
21172 | POST_IO |
21173 | RET(16) |
21174 | } |
21175 | res = 0; |
21176 | PRE_IO |
21177 | WRITE_BYTE_F(adr, res) |
21178 | POST_IO |
21179 | RET(16) |
21180 | } |
21181 | |
21182 | // STCC |
21183 | OPCODE(0x53E8) |
21184 | { |
21185 | u32 adr, res; |
21186 | u32 src, dst; |
21187 | |
21188 | FETCH_SWORD(adr); |
21189 | adr += AREG((Opcode >> 0) & 7); |
21190 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21191 | { |
21192 | res = 0xFF; |
21193 | PRE_IO |
21194 | WRITE_BYTE_F(adr, res) |
21195 | POST_IO |
21196 | RET(16) |
21197 | } |
21198 | res = 0; |
21199 | PRE_IO |
21200 | WRITE_BYTE_F(adr, res) |
21201 | POST_IO |
21202 | RET(16) |
21203 | } |
21204 | |
21205 | // STCC |
21206 | OPCODE(0x54E8) |
21207 | { |
21208 | u32 adr, res; |
21209 | u32 src, dst; |
21210 | |
21211 | FETCH_SWORD(adr); |
21212 | adr += AREG((Opcode >> 0) & 7); |
21213 | if (!(flag_C & 0x100)) |
21214 | { |
21215 | res = 0xFF; |
21216 | PRE_IO |
21217 | WRITE_BYTE_F(adr, res) |
21218 | POST_IO |
21219 | RET(16) |
21220 | } |
21221 | res = 0; |
21222 | PRE_IO |
21223 | WRITE_BYTE_F(adr, res) |
21224 | POST_IO |
21225 | RET(16) |
21226 | } |
21227 | |
21228 | // STCC |
21229 | OPCODE(0x55E8) |
21230 | { |
21231 | u32 adr, res; |
21232 | u32 src, dst; |
21233 | |
21234 | FETCH_SWORD(adr); |
21235 | adr += AREG((Opcode >> 0) & 7); |
21236 | if (flag_C & 0x100) |
21237 | { |
21238 | res = 0xFF; |
21239 | PRE_IO |
21240 | WRITE_BYTE_F(adr, res) |
21241 | POST_IO |
21242 | RET(16) |
21243 | } |
21244 | res = 0; |
21245 | PRE_IO |
21246 | WRITE_BYTE_F(adr, res) |
21247 | POST_IO |
21248 | RET(16) |
21249 | } |
21250 | |
21251 | // STCC |
21252 | OPCODE(0x56E8) |
21253 | { |
21254 | u32 adr, res; |
21255 | u32 src, dst; |
21256 | |
21257 | FETCH_SWORD(adr); |
21258 | adr += AREG((Opcode >> 0) & 7); |
21259 | if (flag_NotZ) |
21260 | { |
21261 | res = 0xFF; |
21262 | PRE_IO |
21263 | WRITE_BYTE_F(adr, res) |
21264 | POST_IO |
21265 | RET(16) |
21266 | } |
21267 | res = 0; |
21268 | PRE_IO |
21269 | WRITE_BYTE_F(adr, res) |
21270 | POST_IO |
21271 | RET(16) |
21272 | } |
21273 | |
21274 | // STCC |
21275 | OPCODE(0x57E8) |
21276 | { |
21277 | u32 adr, res; |
21278 | u32 src, dst; |
21279 | |
21280 | FETCH_SWORD(adr); |
21281 | adr += AREG((Opcode >> 0) & 7); |
21282 | if (!flag_NotZ) |
21283 | { |
21284 | res = 0xFF; |
21285 | PRE_IO |
21286 | WRITE_BYTE_F(adr, res) |
21287 | POST_IO |
21288 | RET(16) |
21289 | } |
21290 | res = 0; |
21291 | PRE_IO |
21292 | WRITE_BYTE_F(adr, res) |
21293 | POST_IO |
21294 | RET(16) |
21295 | } |
21296 | |
21297 | // STCC |
21298 | OPCODE(0x58E8) |
21299 | { |
21300 | u32 adr, res; |
21301 | u32 src, dst; |
21302 | |
21303 | FETCH_SWORD(adr); |
21304 | adr += AREG((Opcode >> 0) & 7); |
21305 | if (!(flag_V & 0x80)) |
21306 | { |
21307 | res = 0xFF; |
21308 | PRE_IO |
21309 | WRITE_BYTE_F(adr, res) |
21310 | POST_IO |
21311 | RET(16) |
21312 | } |
21313 | res = 0; |
21314 | PRE_IO |
21315 | WRITE_BYTE_F(adr, res) |
21316 | POST_IO |
21317 | RET(16) |
21318 | } |
21319 | |
21320 | // STCC |
21321 | OPCODE(0x59E8) |
21322 | { |
21323 | u32 adr, res; |
21324 | u32 src, dst; |
21325 | |
21326 | FETCH_SWORD(adr); |
21327 | adr += AREG((Opcode >> 0) & 7); |
21328 | if (flag_V & 0x80) |
21329 | { |
21330 | res = 0xFF; |
21331 | PRE_IO |
21332 | WRITE_BYTE_F(adr, res) |
21333 | POST_IO |
21334 | RET(16) |
21335 | } |
21336 | res = 0; |
21337 | PRE_IO |
21338 | WRITE_BYTE_F(adr, res) |
21339 | POST_IO |
21340 | RET(16) |
21341 | } |
21342 | |
21343 | // STCC |
21344 | OPCODE(0x5AE8) |
21345 | { |
21346 | u32 adr, res; |
21347 | u32 src, dst; |
21348 | |
21349 | FETCH_SWORD(adr); |
21350 | adr += AREG((Opcode >> 0) & 7); |
21351 | if (!(flag_N & 0x80)) |
21352 | { |
21353 | res = 0xFF; |
21354 | PRE_IO |
21355 | WRITE_BYTE_F(adr, res) |
21356 | POST_IO |
21357 | RET(16) |
21358 | } |
21359 | res = 0; |
21360 | PRE_IO |
21361 | WRITE_BYTE_F(adr, res) |
21362 | POST_IO |
21363 | RET(16) |
21364 | } |
21365 | |
21366 | // STCC |
21367 | OPCODE(0x5BE8) |
21368 | { |
21369 | u32 adr, res; |
21370 | u32 src, dst; |
21371 | |
21372 | FETCH_SWORD(adr); |
21373 | adr += AREG((Opcode >> 0) & 7); |
21374 | if (flag_N & 0x80) |
21375 | { |
21376 | res = 0xFF; |
21377 | PRE_IO |
21378 | WRITE_BYTE_F(adr, res) |
21379 | POST_IO |
21380 | RET(16) |
21381 | } |
21382 | res = 0; |
21383 | PRE_IO |
21384 | WRITE_BYTE_F(adr, res) |
21385 | POST_IO |
21386 | RET(16) |
21387 | } |
21388 | |
21389 | // STCC |
21390 | OPCODE(0x5CE8) |
21391 | { |
21392 | u32 adr, res; |
21393 | u32 src, dst; |
21394 | |
21395 | FETCH_SWORD(adr); |
21396 | adr += AREG((Opcode >> 0) & 7); |
21397 | if (!((flag_N ^ flag_V) & 0x80)) |
21398 | { |
21399 | res = 0xFF; |
21400 | PRE_IO |
21401 | WRITE_BYTE_F(adr, res) |
21402 | POST_IO |
21403 | RET(16) |
21404 | } |
21405 | res = 0; |
21406 | PRE_IO |
21407 | WRITE_BYTE_F(adr, res) |
21408 | POST_IO |
21409 | RET(16) |
21410 | } |
21411 | |
21412 | // STCC |
21413 | OPCODE(0x5DE8) |
21414 | { |
21415 | u32 adr, res; |
21416 | u32 src, dst; |
21417 | |
21418 | FETCH_SWORD(adr); |
21419 | adr += AREG((Opcode >> 0) & 7); |
21420 | if ((flag_N ^ flag_V) & 0x80) |
21421 | { |
21422 | res = 0xFF; |
21423 | PRE_IO |
21424 | WRITE_BYTE_F(adr, res) |
21425 | POST_IO |
21426 | RET(16) |
21427 | } |
21428 | res = 0; |
21429 | PRE_IO |
21430 | WRITE_BYTE_F(adr, res) |
21431 | POST_IO |
21432 | RET(16) |
21433 | } |
21434 | |
21435 | // STCC |
21436 | OPCODE(0x5EE8) |
21437 | { |
21438 | u32 adr, res; |
21439 | u32 src, dst; |
21440 | |
21441 | FETCH_SWORD(adr); |
21442 | adr += AREG((Opcode >> 0) & 7); |
21443 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21444 | { |
21445 | res = 0xFF; |
21446 | PRE_IO |
21447 | WRITE_BYTE_F(adr, res) |
21448 | POST_IO |
21449 | RET(16) |
21450 | } |
21451 | res = 0; |
21452 | PRE_IO |
21453 | WRITE_BYTE_F(adr, res) |
21454 | POST_IO |
21455 | RET(16) |
21456 | } |
21457 | |
21458 | // STCC |
21459 | OPCODE(0x5FE8) |
21460 | { |
21461 | u32 adr, res; |
21462 | u32 src, dst; |
21463 | |
21464 | FETCH_SWORD(adr); |
21465 | adr += AREG((Opcode >> 0) & 7); |
21466 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21467 | { |
21468 | res = 0xFF; |
21469 | PRE_IO |
21470 | WRITE_BYTE_F(adr, res) |
21471 | POST_IO |
21472 | RET(16) |
21473 | } |
21474 | res = 0; |
21475 | PRE_IO |
21476 | WRITE_BYTE_F(adr, res) |
21477 | POST_IO |
21478 | RET(16) |
21479 | } |
21480 | |
21481 | // STCC |
21482 | OPCODE(0x50F0) |
21483 | { |
21484 | u32 adr, res; |
21485 | u32 src, dst; |
21486 | |
21487 | adr = AREG((Opcode >> 0) & 7); |
21488 | DECODE_EXT_WORD |
21489 | res = 0xFF; |
21490 | PRE_IO |
21491 | WRITE_BYTE_F(adr, res) |
21492 | POST_IO |
21493 | RET(18) |
21494 | } |
21495 | |
21496 | // STCC |
21497 | OPCODE(0x51F0) |
21498 | { |
21499 | u32 adr, res; |
21500 | u32 src, dst; |
21501 | |
21502 | adr = AREG((Opcode >> 0) & 7); |
21503 | DECODE_EXT_WORD |
21504 | res = 0; |
21505 | PRE_IO |
21506 | WRITE_BYTE_F(adr, res) |
21507 | POST_IO |
21508 | RET(18) |
21509 | } |
21510 | |
21511 | // STCC |
21512 | OPCODE(0x52F0) |
21513 | { |
21514 | u32 adr, res; |
21515 | u32 src, dst; |
21516 | |
21517 | adr = AREG((Opcode >> 0) & 7); |
21518 | DECODE_EXT_WORD |
21519 | if (flag_NotZ && (!(flag_C & 0x100))) |
21520 | { |
21521 | res = 0xFF; |
21522 | PRE_IO |
21523 | WRITE_BYTE_F(adr, res) |
21524 | POST_IO |
21525 | RET(18) |
21526 | } |
21527 | res = 0; |
21528 | PRE_IO |
21529 | WRITE_BYTE_F(adr, res) |
21530 | POST_IO |
21531 | RET(18) |
21532 | } |
21533 | |
21534 | // STCC |
21535 | OPCODE(0x53F0) |
21536 | { |
21537 | u32 adr, res; |
21538 | u32 src, dst; |
21539 | |
21540 | adr = AREG((Opcode >> 0) & 7); |
21541 | DECODE_EXT_WORD |
21542 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21543 | { |
21544 | res = 0xFF; |
21545 | PRE_IO |
21546 | WRITE_BYTE_F(adr, res) |
21547 | POST_IO |
21548 | RET(18) |
21549 | } |
21550 | res = 0; |
21551 | PRE_IO |
21552 | WRITE_BYTE_F(adr, res) |
21553 | POST_IO |
21554 | RET(18) |
21555 | } |
21556 | |
21557 | // STCC |
21558 | OPCODE(0x54F0) |
21559 | { |
21560 | u32 adr, res; |
21561 | u32 src, dst; |
21562 | |
21563 | adr = AREG((Opcode >> 0) & 7); |
21564 | DECODE_EXT_WORD |
21565 | if (!(flag_C & 0x100)) |
21566 | { |
21567 | res = 0xFF; |
21568 | PRE_IO |
21569 | WRITE_BYTE_F(adr, res) |
21570 | POST_IO |
21571 | RET(18) |
21572 | } |
21573 | res = 0; |
21574 | PRE_IO |
21575 | WRITE_BYTE_F(adr, res) |
21576 | POST_IO |
21577 | RET(18) |
21578 | } |
21579 | |
21580 | // STCC |
21581 | OPCODE(0x55F0) |
21582 | { |
21583 | u32 adr, res; |
21584 | u32 src, dst; |
21585 | |
21586 | adr = AREG((Opcode >> 0) & 7); |
21587 | DECODE_EXT_WORD |
21588 | if (flag_C & 0x100) |
21589 | { |
21590 | res = 0xFF; |
21591 | PRE_IO |
21592 | WRITE_BYTE_F(adr, res) |
21593 | POST_IO |
21594 | RET(18) |
21595 | } |
21596 | res = 0; |
21597 | PRE_IO |
21598 | WRITE_BYTE_F(adr, res) |
21599 | POST_IO |
21600 | RET(18) |
21601 | } |
21602 | |
21603 | // STCC |
21604 | OPCODE(0x56F0) |
21605 | { |
21606 | u32 adr, res; |
21607 | u32 src, dst; |
21608 | |
21609 | adr = AREG((Opcode >> 0) & 7); |
21610 | DECODE_EXT_WORD |
21611 | if (flag_NotZ) |
21612 | { |
21613 | res = 0xFF; |
21614 | PRE_IO |
21615 | WRITE_BYTE_F(adr, res) |
21616 | POST_IO |
21617 | RET(18) |
21618 | } |
21619 | res = 0; |
21620 | PRE_IO |
21621 | WRITE_BYTE_F(adr, res) |
21622 | POST_IO |
21623 | RET(18) |
21624 | } |
21625 | |
21626 | // STCC |
21627 | OPCODE(0x57F0) |
21628 | { |
21629 | u32 adr, res; |
21630 | u32 src, dst; |
21631 | |
21632 | adr = AREG((Opcode >> 0) & 7); |
21633 | DECODE_EXT_WORD |
21634 | if (!flag_NotZ) |
21635 | { |
21636 | res = 0xFF; |
21637 | PRE_IO |
21638 | WRITE_BYTE_F(adr, res) |
21639 | POST_IO |
21640 | RET(18) |
21641 | } |
21642 | res = 0; |
21643 | PRE_IO |
21644 | WRITE_BYTE_F(adr, res) |
21645 | POST_IO |
21646 | RET(18) |
21647 | } |
21648 | |
21649 | // STCC |
21650 | OPCODE(0x58F0) |
21651 | { |
21652 | u32 adr, res; |
21653 | u32 src, dst; |
21654 | |
21655 | adr = AREG((Opcode >> 0) & 7); |
21656 | DECODE_EXT_WORD |
21657 | if (!(flag_V & 0x80)) |
21658 | { |
21659 | res = 0xFF; |
21660 | PRE_IO |
21661 | WRITE_BYTE_F(adr, res) |
21662 | POST_IO |
21663 | RET(18) |
21664 | } |
21665 | res = 0; |
21666 | PRE_IO |
21667 | WRITE_BYTE_F(adr, res) |
21668 | POST_IO |
21669 | RET(18) |
21670 | } |
21671 | |
21672 | // STCC |
21673 | OPCODE(0x59F0) |
21674 | { |
21675 | u32 adr, res; |
21676 | u32 src, dst; |
21677 | |
21678 | adr = AREG((Opcode >> 0) & 7); |
21679 | DECODE_EXT_WORD |
21680 | if (flag_V & 0x80) |
21681 | { |
21682 | res = 0xFF; |
21683 | PRE_IO |
21684 | WRITE_BYTE_F(adr, res) |
21685 | POST_IO |
21686 | RET(18) |
21687 | } |
21688 | res = 0; |
21689 | PRE_IO |
21690 | WRITE_BYTE_F(adr, res) |
21691 | POST_IO |
21692 | RET(18) |
21693 | } |
21694 | |
21695 | // STCC |
21696 | OPCODE(0x5AF0) |
21697 | { |
21698 | u32 adr, res; |
21699 | u32 src, dst; |
21700 | |
21701 | adr = AREG((Opcode >> 0) & 7); |
21702 | DECODE_EXT_WORD |
21703 | if (!(flag_N & 0x80)) |
21704 | { |
21705 | res = 0xFF; |
21706 | PRE_IO |
21707 | WRITE_BYTE_F(adr, res) |
21708 | POST_IO |
21709 | RET(18) |
21710 | } |
21711 | res = 0; |
21712 | PRE_IO |
21713 | WRITE_BYTE_F(adr, res) |
21714 | POST_IO |
21715 | RET(18) |
21716 | } |
21717 | |
21718 | // STCC |
21719 | OPCODE(0x5BF0) |
21720 | { |
21721 | u32 adr, res; |
21722 | u32 src, dst; |
21723 | |
21724 | adr = AREG((Opcode >> 0) & 7); |
21725 | DECODE_EXT_WORD |
21726 | if (flag_N & 0x80) |
21727 | { |
21728 | res = 0xFF; |
21729 | PRE_IO |
21730 | WRITE_BYTE_F(adr, res) |
21731 | POST_IO |
21732 | RET(18) |
21733 | } |
21734 | res = 0; |
21735 | PRE_IO |
21736 | WRITE_BYTE_F(adr, res) |
21737 | POST_IO |
21738 | RET(18) |
21739 | } |
21740 | |
21741 | // STCC |
21742 | OPCODE(0x5CF0) |
21743 | { |
21744 | u32 adr, res; |
21745 | u32 src, dst; |
21746 | |
21747 | adr = AREG((Opcode >> 0) & 7); |
21748 | DECODE_EXT_WORD |
21749 | if (!((flag_N ^ flag_V) & 0x80)) |
21750 | { |
21751 | res = 0xFF; |
21752 | PRE_IO |
21753 | WRITE_BYTE_F(adr, res) |
21754 | POST_IO |
21755 | RET(18) |
21756 | } |
21757 | res = 0; |
21758 | PRE_IO |
21759 | WRITE_BYTE_F(adr, res) |
21760 | POST_IO |
21761 | RET(18) |
21762 | } |
21763 | |
21764 | // STCC |
21765 | OPCODE(0x5DF0) |
21766 | { |
21767 | u32 adr, res; |
21768 | u32 src, dst; |
21769 | |
21770 | adr = AREG((Opcode >> 0) & 7); |
21771 | DECODE_EXT_WORD |
21772 | if ((flag_N ^ flag_V) & 0x80) |
21773 | { |
21774 | res = 0xFF; |
21775 | PRE_IO |
21776 | WRITE_BYTE_F(adr, res) |
21777 | POST_IO |
21778 | RET(18) |
21779 | } |
21780 | res = 0; |
21781 | PRE_IO |
21782 | WRITE_BYTE_F(adr, res) |
21783 | POST_IO |
21784 | RET(18) |
21785 | } |
21786 | |
21787 | // STCC |
21788 | OPCODE(0x5EF0) |
21789 | { |
21790 | u32 adr, res; |
21791 | u32 src, dst; |
21792 | |
21793 | adr = AREG((Opcode >> 0) & 7); |
21794 | DECODE_EXT_WORD |
21795 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21796 | { |
21797 | res = 0xFF; |
21798 | PRE_IO |
21799 | WRITE_BYTE_F(adr, res) |
21800 | POST_IO |
21801 | RET(18) |
21802 | } |
21803 | res = 0; |
21804 | PRE_IO |
21805 | WRITE_BYTE_F(adr, res) |
21806 | POST_IO |
21807 | RET(18) |
21808 | } |
21809 | |
21810 | // STCC |
21811 | OPCODE(0x5FF0) |
21812 | { |
21813 | u32 adr, res; |
21814 | u32 src, dst; |
21815 | |
21816 | adr = AREG((Opcode >> 0) & 7); |
21817 | DECODE_EXT_WORD |
21818 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21819 | { |
21820 | res = 0xFF; |
21821 | PRE_IO |
21822 | WRITE_BYTE_F(adr, res) |
21823 | POST_IO |
21824 | RET(18) |
21825 | } |
21826 | res = 0; |
21827 | PRE_IO |
21828 | WRITE_BYTE_F(adr, res) |
21829 | POST_IO |
21830 | RET(18) |
21831 | } |
21832 | |
21833 | // STCC |
21834 | OPCODE(0x50F8) |
21835 | { |
21836 | u32 adr, res; |
21837 | u32 src, dst; |
21838 | |
21839 | FETCH_SWORD(adr); |
21840 | res = 0xFF; |
21841 | PRE_IO |
21842 | WRITE_BYTE_F(adr, res) |
21843 | POST_IO |
21844 | RET(16) |
21845 | } |
21846 | |
21847 | // STCC |
21848 | OPCODE(0x51F8) |
21849 | { |
21850 | u32 adr, res; |
21851 | u32 src, dst; |
21852 | |
21853 | FETCH_SWORD(adr); |
21854 | res = 0; |
21855 | PRE_IO |
21856 | WRITE_BYTE_F(adr, res) |
21857 | POST_IO |
21858 | RET(16) |
21859 | } |
21860 | |
21861 | // STCC |
21862 | OPCODE(0x52F8) |
21863 | { |
21864 | u32 adr, res; |
21865 | u32 src, dst; |
21866 | |
21867 | FETCH_SWORD(adr); |
21868 | if (flag_NotZ && (!(flag_C & 0x100))) |
21869 | { |
21870 | res = 0xFF; |
21871 | PRE_IO |
21872 | WRITE_BYTE_F(adr, res) |
21873 | POST_IO |
21874 | RET(16) |
21875 | } |
21876 | res = 0; |
21877 | PRE_IO |
21878 | WRITE_BYTE_F(adr, res) |
21879 | POST_IO |
21880 | RET(16) |
21881 | } |
21882 | |
21883 | // STCC |
21884 | OPCODE(0x53F8) |
21885 | { |
21886 | u32 adr, res; |
21887 | u32 src, dst; |
21888 | |
21889 | FETCH_SWORD(adr); |
21890 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21891 | { |
21892 | res = 0xFF; |
21893 | PRE_IO |
21894 | WRITE_BYTE_F(adr, res) |
21895 | POST_IO |
21896 | RET(16) |
21897 | } |
21898 | res = 0; |
21899 | PRE_IO |
21900 | WRITE_BYTE_F(adr, res) |
21901 | POST_IO |
21902 | RET(16) |
21903 | } |
21904 | |
21905 | // STCC |
21906 | OPCODE(0x54F8) |
21907 | { |
21908 | u32 adr, res; |
21909 | u32 src, dst; |
21910 | |
21911 | FETCH_SWORD(adr); |
21912 | if (!(flag_C & 0x100)) |
21913 | { |
21914 | res = 0xFF; |
21915 | PRE_IO |
21916 | WRITE_BYTE_F(adr, res) |
21917 | POST_IO |
21918 | RET(16) |
21919 | } |
21920 | res = 0; |
21921 | PRE_IO |
21922 | WRITE_BYTE_F(adr, res) |
21923 | POST_IO |
21924 | RET(16) |
21925 | } |
21926 | |
21927 | // STCC |
21928 | OPCODE(0x55F8) |
21929 | { |
21930 | u32 adr, res; |
21931 | u32 src, dst; |
21932 | |
21933 | FETCH_SWORD(adr); |
21934 | if (flag_C & 0x100) |
21935 | { |
21936 | res = 0xFF; |
21937 | PRE_IO |
21938 | WRITE_BYTE_F(adr, res) |
21939 | POST_IO |
21940 | RET(16) |
21941 | } |
21942 | res = 0; |
21943 | PRE_IO |
21944 | WRITE_BYTE_F(adr, res) |
21945 | POST_IO |
21946 | RET(16) |
21947 | } |
21948 | |
21949 | // STCC |
21950 | OPCODE(0x56F8) |
21951 | { |
21952 | u32 adr, res; |
21953 | u32 src, dst; |
21954 | |
21955 | FETCH_SWORD(adr); |
21956 | if (flag_NotZ) |
21957 | { |
21958 | res = 0xFF; |
21959 | PRE_IO |
21960 | WRITE_BYTE_F(adr, res) |
21961 | POST_IO |
21962 | RET(16) |
21963 | } |
21964 | res = 0; |
21965 | PRE_IO |
21966 | WRITE_BYTE_F(adr, res) |
21967 | POST_IO |
21968 | RET(16) |
21969 | } |
21970 | |
21971 | // STCC |
21972 | OPCODE(0x57F8) |
21973 | { |
21974 | u32 adr, res; |
21975 | u32 src, dst; |
21976 | |
21977 | FETCH_SWORD(adr); |
21978 | if (!flag_NotZ) |
21979 | { |
21980 | res = 0xFF; |
21981 | PRE_IO |
21982 | WRITE_BYTE_F(adr, res) |
21983 | POST_IO |
21984 | RET(16) |
21985 | } |
21986 | res = 0; |
21987 | PRE_IO |
21988 | WRITE_BYTE_F(adr, res) |
21989 | POST_IO |
21990 | RET(16) |
21991 | } |
21992 | |
21993 | // STCC |
21994 | OPCODE(0x58F8) |
21995 | { |
21996 | u32 adr, res; |
21997 | u32 src, dst; |
21998 | |
21999 | FETCH_SWORD(adr); |
22000 | if (!(flag_V & 0x80)) |
22001 | { |
22002 | res = 0xFF; |
22003 | PRE_IO |
22004 | WRITE_BYTE_F(adr, res) |
22005 | POST_IO |
22006 | RET(16) |
22007 | } |
22008 | res = 0; |
22009 | PRE_IO |
22010 | WRITE_BYTE_F(adr, res) |
22011 | POST_IO |
22012 | RET(16) |
22013 | } |
22014 | |
22015 | // STCC |
22016 | OPCODE(0x59F8) |
22017 | { |
22018 | u32 adr, res; |
22019 | u32 src, dst; |
22020 | |
22021 | FETCH_SWORD(adr); |
22022 | if (flag_V & 0x80) |
22023 | { |
22024 | res = 0xFF; |
22025 | PRE_IO |
22026 | WRITE_BYTE_F(adr, res) |
22027 | POST_IO |
22028 | RET(16) |
22029 | } |
22030 | res = 0; |
22031 | PRE_IO |
22032 | WRITE_BYTE_F(adr, res) |
22033 | POST_IO |
22034 | RET(16) |
22035 | } |
22036 | |
22037 | // STCC |
22038 | OPCODE(0x5AF8) |
22039 | { |
22040 | u32 adr, res; |
22041 | u32 src, dst; |
22042 | |
22043 | FETCH_SWORD(adr); |
22044 | if (!(flag_N & 0x80)) |
22045 | { |
22046 | res = 0xFF; |
22047 | PRE_IO |
22048 | WRITE_BYTE_F(adr, res) |
22049 | POST_IO |
22050 | RET(16) |
22051 | } |
22052 | res = 0; |
22053 | PRE_IO |
22054 | WRITE_BYTE_F(adr, res) |
22055 | POST_IO |
22056 | RET(16) |
22057 | } |
22058 | |
22059 | // STCC |
22060 | OPCODE(0x5BF8) |
22061 | { |
22062 | u32 adr, res; |
22063 | u32 src, dst; |
22064 | |
22065 | FETCH_SWORD(adr); |
22066 | if (flag_N & 0x80) |
22067 | { |
22068 | res = 0xFF; |
22069 | PRE_IO |
22070 | WRITE_BYTE_F(adr, res) |
22071 | POST_IO |
22072 | RET(16) |
22073 | } |
22074 | res = 0; |
22075 | PRE_IO |
22076 | WRITE_BYTE_F(adr, res) |
22077 | POST_IO |
22078 | RET(16) |
22079 | } |
22080 | |
22081 | // STCC |
22082 | OPCODE(0x5CF8) |
22083 | { |
22084 | u32 adr, res; |
22085 | u32 src, dst; |
22086 | |
22087 | FETCH_SWORD(adr); |
22088 | if (!((flag_N ^ flag_V) & 0x80)) |
22089 | { |
22090 | res = 0xFF; |
22091 | PRE_IO |
22092 | WRITE_BYTE_F(adr, res) |
22093 | POST_IO |
22094 | RET(16) |
22095 | } |
22096 | res = 0; |
22097 | PRE_IO |
22098 | WRITE_BYTE_F(adr, res) |
22099 | POST_IO |
22100 | RET(16) |
22101 | } |
22102 | |
22103 | // STCC |
22104 | OPCODE(0x5DF8) |
22105 | { |
22106 | u32 adr, res; |
22107 | u32 src, dst; |
22108 | |
22109 | FETCH_SWORD(adr); |
22110 | if ((flag_N ^ flag_V) & 0x80) |
22111 | { |
22112 | res = 0xFF; |
22113 | PRE_IO |
22114 | WRITE_BYTE_F(adr, res) |
22115 | POST_IO |
22116 | RET(16) |
22117 | } |
22118 | res = 0; |
22119 | PRE_IO |
22120 | WRITE_BYTE_F(adr, res) |
22121 | POST_IO |
22122 | RET(16) |
22123 | } |
22124 | |
22125 | // STCC |
22126 | OPCODE(0x5EF8) |
22127 | { |
22128 | u32 adr, res; |
22129 | u32 src, dst; |
22130 | |
22131 | FETCH_SWORD(adr); |
22132 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22133 | { |
22134 | res = 0xFF; |
22135 | PRE_IO |
22136 | WRITE_BYTE_F(adr, res) |
22137 | POST_IO |
22138 | RET(16) |
22139 | } |
22140 | res = 0; |
22141 | PRE_IO |
22142 | WRITE_BYTE_F(adr, res) |
22143 | POST_IO |
22144 | RET(16) |
22145 | } |
22146 | |
22147 | // STCC |
22148 | OPCODE(0x5FF8) |
22149 | { |
22150 | u32 adr, res; |
22151 | u32 src, dst; |
22152 | |
22153 | FETCH_SWORD(adr); |
22154 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22155 | { |
22156 | res = 0xFF; |
22157 | PRE_IO |
22158 | WRITE_BYTE_F(adr, res) |
22159 | POST_IO |
22160 | RET(16) |
22161 | } |
22162 | res = 0; |
22163 | PRE_IO |
22164 | WRITE_BYTE_F(adr, res) |
22165 | POST_IO |
22166 | RET(16) |
22167 | } |
22168 | |
22169 | // STCC |
22170 | OPCODE(0x50F9) |
22171 | { |
22172 | u32 adr, res; |
22173 | u32 src, dst; |
22174 | |
22175 | FETCH_LONG(adr); |
22176 | res = 0xFF; |
22177 | PRE_IO |
22178 | WRITE_BYTE_F(adr, res) |
22179 | POST_IO |
22180 | RET(20) |
22181 | } |
22182 | |
22183 | // STCC |
22184 | OPCODE(0x51F9) |
22185 | { |
22186 | u32 adr, res; |
22187 | u32 src, dst; |
22188 | |
22189 | FETCH_LONG(adr); |
22190 | res = 0; |
22191 | PRE_IO |
22192 | WRITE_BYTE_F(adr, res) |
22193 | POST_IO |
22194 | RET(20) |
22195 | } |
22196 | |
22197 | // STCC |
22198 | OPCODE(0x52F9) |
22199 | { |
22200 | u32 adr, res; |
22201 | u32 src, dst; |
22202 | |
22203 | FETCH_LONG(adr); |
22204 | if (flag_NotZ && (!(flag_C & 0x100))) |
22205 | { |
22206 | res = 0xFF; |
22207 | PRE_IO |
22208 | WRITE_BYTE_F(adr, res) |
22209 | POST_IO |
22210 | RET(20) |
22211 | } |
22212 | res = 0; |
22213 | PRE_IO |
22214 | WRITE_BYTE_F(adr, res) |
22215 | POST_IO |
22216 | RET(20) |
22217 | } |
22218 | |
22219 | // STCC |
22220 | OPCODE(0x53F9) |
22221 | { |
22222 | u32 adr, res; |
22223 | u32 src, dst; |
22224 | |
22225 | FETCH_LONG(adr); |
22226 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22227 | { |
22228 | res = 0xFF; |
22229 | PRE_IO |
22230 | WRITE_BYTE_F(adr, res) |
22231 | POST_IO |
22232 | RET(20) |
22233 | } |
22234 | res = 0; |
22235 | PRE_IO |
22236 | WRITE_BYTE_F(adr, res) |
22237 | POST_IO |
22238 | RET(20) |
22239 | } |
22240 | |
22241 | // STCC |
22242 | OPCODE(0x54F9) |
22243 | { |
22244 | u32 adr, res; |
22245 | u32 src, dst; |
22246 | |
22247 | FETCH_LONG(adr); |
22248 | if (!(flag_C & 0x100)) |
22249 | { |
22250 | res = 0xFF; |
22251 | PRE_IO |
22252 | WRITE_BYTE_F(adr, res) |
22253 | POST_IO |
22254 | RET(20) |
22255 | } |
22256 | res = 0; |
22257 | PRE_IO |
22258 | WRITE_BYTE_F(adr, res) |
22259 | POST_IO |
22260 | RET(20) |
22261 | } |
22262 | |
22263 | // STCC |
22264 | OPCODE(0x55F9) |
22265 | { |
22266 | u32 adr, res; |
22267 | u32 src, dst; |
22268 | |
22269 | FETCH_LONG(adr); |
22270 | if (flag_C & 0x100) |
22271 | { |
22272 | res = 0xFF; |
22273 | PRE_IO |
22274 | WRITE_BYTE_F(adr, res) |
22275 | POST_IO |
22276 | RET(20) |
22277 | } |
22278 | res = 0; |
22279 | PRE_IO |
22280 | WRITE_BYTE_F(adr, res) |
22281 | POST_IO |
22282 | RET(20) |
22283 | } |
22284 | |
22285 | // STCC |
22286 | OPCODE(0x56F9) |
22287 | { |
22288 | u32 adr, res; |
22289 | u32 src, dst; |
22290 | |
22291 | FETCH_LONG(adr); |
22292 | if (flag_NotZ) |
22293 | { |
22294 | res = 0xFF; |
22295 | PRE_IO |
22296 | WRITE_BYTE_F(adr, res) |
22297 | POST_IO |
22298 | RET(20) |
22299 | } |
22300 | res = 0; |
22301 | PRE_IO |
22302 | WRITE_BYTE_F(adr, res) |
22303 | POST_IO |
22304 | RET(20) |
22305 | } |
22306 | |
22307 | // STCC |
22308 | OPCODE(0x57F9) |
22309 | { |
22310 | u32 adr, res; |
22311 | u32 src, dst; |
22312 | |
22313 | FETCH_LONG(adr); |
22314 | if (!flag_NotZ) |
22315 | { |
22316 | res = 0xFF; |
22317 | PRE_IO |
22318 | WRITE_BYTE_F(adr, res) |
22319 | POST_IO |
22320 | RET(20) |
22321 | } |
22322 | res = 0; |
22323 | PRE_IO |
22324 | WRITE_BYTE_F(adr, res) |
22325 | POST_IO |
22326 | RET(20) |
22327 | } |
22328 | |
22329 | // STCC |
22330 | OPCODE(0x58F9) |
22331 | { |
22332 | u32 adr, res; |
22333 | u32 src, dst; |
22334 | |
22335 | FETCH_LONG(adr); |
22336 | if (!(flag_V & 0x80)) |
22337 | { |
22338 | res = 0xFF; |
22339 | PRE_IO |
22340 | WRITE_BYTE_F(adr, res) |
22341 | POST_IO |
22342 | RET(20) |
22343 | } |
22344 | res = 0; |
22345 | PRE_IO |
22346 | WRITE_BYTE_F(adr, res) |
22347 | POST_IO |
22348 | RET(20) |
22349 | } |
22350 | |
22351 | // STCC |
22352 | OPCODE(0x59F9) |
22353 | { |
22354 | u32 adr, res; |
22355 | u32 src, dst; |
22356 | |
22357 | FETCH_LONG(adr); |
22358 | if (flag_V & 0x80) |
22359 | { |
22360 | res = 0xFF; |
22361 | PRE_IO |
22362 | WRITE_BYTE_F(adr, res) |
22363 | POST_IO |
22364 | RET(20) |
22365 | } |
22366 | res = 0; |
22367 | PRE_IO |
22368 | WRITE_BYTE_F(adr, res) |
22369 | POST_IO |
22370 | RET(20) |
22371 | } |
22372 | |
22373 | // STCC |
22374 | OPCODE(0x5AF9) |
22375 | { |
22376 | u32 adr, res; |
22377 | u32 src, dst; |
22378 | |
22379 | FETCH_LONG(adr); |
22380 | if (!(flag_N & 0x80)) |
22381 | { |
22382 | res = 0xFF; |
22383 | PRE_IO |
22384 | WRITE_BYTE_F(adr, res) |
22385 | POST_IO |
22386 | RET(20) |
22387 | } |
22388 | res = 0; |
22389 | PRE_IO |
22390 | WRITE_BYTE_F(adr, res) |
22391 | POST_IO |
22392 | RET(20) |
22393 | } |
22394 | |
22395 | // STCC |
22396 | OPCODE(0x5BF9) |
22397 | { |
22398 | u32 adr, res; |
22399 | u32 src, dst; |
22400 | |
22401 | FETCH_LONG(adr); |
22402 | if (flag_N & 0x80) |
22403 | { |
22404 | res = 0xFF; |
22405 | PRE_IO |
22406 | WRITE_BYTE_F(adr, res) |
22407 | POST_IO |
22408 | RET(20) |
22409 | } |
22410 | res = 0; |
22411 | PRE_IO |
22412 | WRITE_BYTE_F(adr, res) |
22413 | POST_IO |
22414 | RET(20) |
22415 | } |
22416 | |
22417 | // STCC |
22418 | OPCODE(0x5CF9) |
22419 | { |
22420 | u32 adr, res; |
22421 | u32 src, dst; |
22422 | |
22423 | FETCH_LONG(adr); |
22424 | if (!((flag_N ^ flag_V) & 0x80)) |
22425 | { |
22426 | res = 0xFF; |
22427 | PRE_IO |
22428 | WRITE_BYTE_F(adr, res) |
22429 | POST_IO |
22430 | RET(20) |
22431 | } |
22432 | res = 0; |
22433 | PRE_IO |
22434 | WRITE_BYTE_F(adr, res) |
22435 | POST_IO |
22436 | RET(20) |
22437 | } |
22438 | |
22439 | // STCC |
22440 | OPCODE(0x5DF9) |
22441 | { |
22442 | u32 adr, res; |
22443 | u32 src, dst; |
22444 | |
22445 | FETCH_LONG(adr); |
22446 | if ((flag_N ^ flag_V) & 0x80) |
22447 | { |
22448 | res = 0xFF; |
22449 | PRE_IO |
22450 | WRITE_BYTE_F(adr, res) |
22451 | POST_IO |
22452 | RET(20) |
22453 | } |
22454 | res = 0; |
22455 | PRE_IO |
22456 | WRITE_BYTE_F(adr, res) |
22457 | POST_IO |
22458 | RET(20) |
22459 | } |
22460 | |
22461 | // STCC |
22462 | OPCODE(0x5EF9) |
22463 | { |
22464 | u32 adr, res; |
22465 | u32 src, dst; |
22466 | |
22467 | FETCH_LONG(adr); |
22468 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22469 | { |
22470 | res = 0xFF; |
22471 | PRE_IO |
22472 | WRITE_BYTE_F(adr, res) |
22473 | POST_IO |
22474 | RET(20) |
22475 | } |
22476 | res = 0; |
22477 | PRE_IO |
22478 | WRITE_BYTE_F(adr, res) |
22479 | POST_IO |
22480 | RET(20) |
22481 | } |
22482 | |
22483 | // STCC |
22484 | OPCODE(0x5FF9) |
22485 | { |
22486 | u32 adr, res; |
22487 | u32 src, dst; |
22488 | |
22489 | FETCH_LONG(adr); |
22490 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22491 | { |
22492 | res = 0xFF; |
22493 | PRE_IO |
22494 | WRITE_BYTE_F(adr, res) |
22495 | POST_IO |
22496 | RET(20) |
22497 | } |
22498 | res = 0; |
22499 | PRE_IO |
22500 | WRITE_BYTE_F(adr, res) |
22501 | POST_IO |
22502 | RET(20) |
22503 | } |
22504 | |
22505 | // STCC |
22506 | OPCODE(0x50DF) |
22507 | { |
22508 | u32 adr, res; |
22509 | u32 src, dst; |
22510 | |
22511 | adr = AREG(7); |
22512 | AREG(7) += 2; |
22513 | res = 0xFF; |
22514 | PRE_IO |
22515 | WRITE_BYTE_F(adr, res) |
22516 | POST_IO |
22517 | RET(12) |
22518 | } |
22519 | |
22520 | // STCC |
22521 | OPCODE(0x51DF) |
22522 | { |
22523 | u32 adr, res; |
22524 | u32 src, dst; |
22525 | |
22526 | adr = AREG(7); |
22527 | AREG(7) += 2; |
22528 | res = 0; |
22529 | PRE_IO |
22530 | WRITE_BYTE_F(adr, res) |
22531 | POST_IO |
22532 | RET(12) |
22533 | } |
22534 | |
22535 | // STCC |
22536 | OPCODE(0x52DF) |
22537 | { |
22538 | u32 adr, res; |
22539 | u32 src, dst; |
22540 | |
22541 | adr = AREG(7); |
22542 | AREG(7) += 2; |
22543 | if (flag_NotZ && (!(flag_C & 0x100))) |
22544 | { |
22545 | res = 0xFF; |
22546 | PRE_IO |
22547 | WRITE_BYTE_F(adr, res) |
22548 | POST_IO |
22549 | RET(12) |
22550 | } |
22551 | res = 0; |
22552 | PRE_IO |
22553 | WRITE_BYTE_F(adr, res) |
22554 | POST_IO |
22555 | RET(12) |
22556 | } |
22557 | |
22558 | // STCC |
22559 | OPCODE(0x53DF) |
22560 | { |
22561 | u32 adr, res; |
22562 | u32 src, dst; |
22563 | |
22564 | adr = AREG(7); |
22565 | AREG(7) += 2; |
22566 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22567 | { |
22568 | res = 0xFF; |
22569 | PRE_IO |
22570 | WRITE_BYTE_F(adr, res) |
22571 | POST_IO |
22572 | RET(12) |
22573 | } |
22574 | res = 0; |
22575 | PRE_IO |
22576 | WRITE_BYTE_F(adr, res) |
22577 | POST_IO |
22578 | RET(12) |
22579 | } |
22580 | |
22581 | // STCC |
22582 | OPCODE(0x54DF) |
22583 | { |
22584 | u32 adr, res; |
22585 | u32 src, dst; |
22586 | |
22587 | adr = AREG(7); |
22588 | AREG(7) += 2; |
22589 | if (!(flag_C & 0x100)) |
22590 | { |
22591 | res = 0xFF; |
22592 | PRE_IO |
22593 | WRITE_BYTE_F(adr, res) |
22594 | POST_IO |
22595 | RET(12) |
22596 | } |
22597 | res = 0; |
22598 | PRE_IO |
22599 | WRITE_BYTE_F(adr, res) |
22600 | POST_IO |
22601 | RET(12) |
22602 | } |
22603 | |
22604 | // STCC |
22605 | OPCODE(0x55DF) |
22606 | { |
22607 | u32 adr, res; |
22608 | u32 src, dst; |
22609 | |
22610 | adr = AREG(7); |
22611 | AREG(7) += 2; |
22612 | if (flag_C & 0x100) |
22613 | { |
22614 | res = 0xFF; |
22615 | PRE_IO |
22616 | WRITE_BYTE_F(adr, res) |
22617 | POST_IO |
22618 | RET(12) |
22619 | } |
22620 | res = 0; |
22621 | PRE_IO |
22622 | WRITE_BYTE_F(adr, res) |
22623 | POST_IO |
22624 | RET(12) |
22625 | } |
22626 | |
22627 | // STCC |
22628 | OPCODE(0x56DF) |
22629 | { |
22630 | u32 adr, res; |
22631 | u32 src, dst; |
22632 | |
22633 | adr = AREG(7); |
22634 | AREG(7) += 2; |
22635 | if (flag_NotZ) |
22636 | { |
22637 | res = 0xFF; |
22638 | PRE_IO |
22639 | WRITE_BYTE_F(adr, res) |
22640 | POST_IO |
22641 | RET(12) |
22642 | } |
22643 | res = 0; |
22644 | PRE_IO |
22645 | WRITE_BYTE_F(adr, res) |
22646 | POST_IO |
22647 | RET(12) |
22648 | } |
22649 | |
22650 | // STCC |
22651 | OPCODE(0x57DF) |
22652 | { |
22653 | u32 adr, res; |
22654 | u32 src, dst; |
22655 | |
22656 | adr = AREG(7); |
22657 | AREG(7) += 2; |
22658 | if (!flag_NotZ) |
22659 | { |
22660 | res = 0xFF; |
22661 | PRE_IO |
22662 | WRITE_BYTE_F(adr, res) |
22663 | POST_IO |
22664 | RET(12) |
22665 | } |
22666 | res = 0; |
22667 | PRE_IO |
22668 | WRITE_BYTE_F(adr, res) |
22669 | POST_IO |
22670 | RET(12) |
22671 | } |
22672 | |
22673 | // STCC |
22674 | OPCODE(0x58DF) |
22675 | { |
22676 | u32 adr, res; |
22677 | u32 src, dst; |
22678 | |
22679 | adr = AREG(7); |
22680 | AREG(7) += 2; |
22681 | if (!(flag_V & 0x80)) |
22682 | { |
22683 | res = 0xFF; |
22684 | PRE_IO |
22685 | WRITE_BYTE_F(adr, res) |
22686 | POST_IO |
22687 | RET(12) |
22688 | } |
22689 | res = 0; |
22690 | PRE_IO |
22691 | WRITE_BYTE_F(adr, res) |
22692 | POST_IO |
22693 | RET(12) |
22694 | } |
22695 | |
22696 | // STCC |
22697 | OPCODE(0x59DF) |
22698 | { |
22699 | u32 adr, res; |
22700 | u32 src, dst; |
22701 | |
22702 | adr = AREG(7); |
22703 | AREG(7) += 2; |
22704 | if (flag_V & 0x80) |
22705 | { |
22706 | res = 0xFF; |
22707 | PRE_IO |
22708 | WRITE_BYTE_F(adr, res) |
22709 | POST_IO |
22710 | RET(12) |
22711 | } |
22712 | res = 0; |
22713 | PRE_IO |
22714 | WRITE_BYTE_F(adr, res) |
22715 | POST_IO |
22716 | RET(12) |
22717 | } |
22718 | |
22719 | // STCC |
22720 | OPCODE(0x5ADF) |
22721 | { |
22722 | u32 adr, res; |
22723 | u32 src, dst; |
22724 | |
22725 | adr = AREG(7); |
22726 | AREG(7) += 2; |
22727 | if (!(flag_N & 0x80)) |
22728 | { |
22729 | res = 0xFF; |
22730 | PRE_IO |
22731 | WRITE_BYTE_F(adr, res) |
22732 | POST_IO |
22733 | RET(12) |
22734 | } |
22735 | res = 0; |
22736 | PRE_IO |
22737 | WRITE_BYTE_F(adr, res) |
22738 | POST_IO |
22739 | RET(12) |
22740 | } |
22741 | |
22742 | // STCC |
22743 | OPCODE(0x5BDF) |
22744 | { |
22745 | u32 adr, res; |
22746 | u32 src, dst; |
22747 | |
22748 | adr = AREG(7); |
22749 | AREG(7) += 2; |
22750 | if (flag_N & 0x80) |
22751 | { |
22752 | res = 0xFF; |
22753 | PRE_IO |
22754 | WRITE_BYTE_F(adr, res) |
22755 | POST_IO |
22756 | RET(12) |
22757 | } |
22758 | res = 0; |
22759 | PRE_IO |
22760 | WRITE_BYTE_F(adr, res) |
22761 | POST_IO |
22762 | RET(12) |
22763 | } |
22764 | |
22765 | // STCC |
22766 | OPCODE(0x5CDF) |
22767 | { |
22768 | u32 adr, res; |
22769 | u32 src, dst; |
22770 | |
22771 | adr = AREG(7); |
22772 | AREG(7) += 2; |
22773 | if (!((flag_N ^ flag_V) & 0x80)) |
22774 | { |
22775 | res = 0xFF; |
22776 | PRE_IO |
22777 | WRITE_BYTE_F(adr, res) |
22778 | POST_IO |
22779 | RET(12) |
22780 | } |
22781 | res = 0; |
22782 | PRE_IO |
22783 | WRITE_BYTE_F(adr, res) |
22784 | POST_IO |
22785 | RET(12) |
22786 | } |
22787 | |
22788 | // STCC |
22789 | OPCODE(0x5DDF) |
22790 | { |
22791 | u32 adr, res; |
22792 | u32 src, dst; |
22793 | |
22794 | adr = AREG(7); |
22795 | AREG(7) += 2; |
22796 | if ((flag_N ^ flag_V) & 0x80) |
22797 | { |
22798 | res = 0xFF; |
22799 | PRE_IO |
22800 | WRITE_BYTE_F(adr, res) |
22801 | POST_IO |
22802 | RET(12) |
22803 | } |
22804 | res = 0; |
22805 | PRE_IO |
22806 | WRITE_BYTE_F(adr, res) |
22807 | POST_IO |
22808 | RET(12) |
22809 | } |
22810 | |
22811 | // STCC |
22812 | OPCODE(0x5EDF) |
22813 | { |
22814 | u32 adr, res; |
22815 | u32 src, dst; |
22816 | |
22817 | adr = AREG(7); |
22818 | AREG(7) += 2; |
22819 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22820 | { |
22821 | res = 0xFF; |
22822 | PRE_IO |
22823 | WRITE_BYTE_F(adr, res) |
22824 | POST_IO |
22825 | RET(12) |
22826 | } |
22827 | res = 0; |
22828 | PRE_IO |
22829 | WRITE_BYTE_F(adr, res) |
22830 | POST_IO |
22831 | RET(12) |
22832 | } |
22833 | |
22834 | // STCC |
22835 | OPCODE(0x5FDF) |
22836 | { |
22837 | u32 adr, res; |
22838 | u32 src, dst; |
22839 | |
22840 | adr = AREG(7); |
22841 | AREG(7) += 2; |
22842 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22843 | { |
22844 | res = 0xFF; |
22845 | PRE_IO |
22846 | WRITE_BYTE_F(adr, res) |
22847 | POST_IO |
22848 | RET(12) |
22849 | } |
22850 | res = 0; |
22851 | PRE_IO |
22852 | WRITE_BYTE_F(adr, res) |
22853 | POST_IO |
22854 | RET(12) |
22855 | } |
22856 | |
22857 | // STCC |
22858 | OPCODE(0x50E7) |
22859 | { |
22860 | u32 adr, res; |
22861 | u32 src, dst; |
22862 | |
22863 | adr = AREG(7) - 2; |
22864 | AREG(7) = adr; |
22865 | res = 0xFF; |
22866 | PRE_IO |
22867 | WRITE_BYTE_F(adr, res) |
22868 | POST_IO |
22869 | RET(14) |
22870 | } |
22871 | |
22872 | // STCC |
22873 | OPCODE(0x51E7) |
22874 | { |
22875 | u32 adr, res; |
22876 | u32 src, dst; |
22877 | |
22878 | adr = AREG(7) - 2; |
22879 | AREG(7) = adr; |
22880 | res = 0; |
22881 | PRE_IO |
22882 | WRITE_BYTE_F(adr, res) |
22883 | POST_IO |
22884 | RET(14) |
22885 | } |
22886 | |
22887 | // STCC |
22888 | OPCODE(0x52E7) |
22889 | { |
22890 | u32 adr, res; |
22891 | u32 src, dst; |
22892 | |
22893 | adr = AREG(7) - 2; |
22894 | AREG(7) = adr; |
22895 | if (flag_NotZ && (!(flag_C & 0x100))) |
22896 | { |
22897 | res = 0xFF; |
22898 | PRE_IO |
22899 | WRITE_BYTE_F(adr, res) |
22900 | POST_IO |
22901 | RET(14) |
22902 | } |
22903 | res = 0; |
22904 | PRE_IO |
22905 | WRITE_BYTE_F(adr, res) |
22906 | POST_IO |
22907 | RET(14) |
22908 | } |
22909 | |
22910 | // STCC |
22911 | OPCODE(0x53E7) |
22912 | { |
22913 | u32 adr, res; |
22914 | u32 src, dst; |
22915 | |
22916 | adr = AREG(7) - 2; |
22917 | AREG(7) = adr; |
22918 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22919 | { |
22920 | res = 0xFF; |
22921 | PRE_IO |
22922 | WRITE_BYTE_F(adr, res) |
22923 | POST_IO |
22924 | RET(14) |
22925 | } |
22926 | res = 0; |
22927 | PRE_IO |
22928 | WRITE_BYTE_F(adr, res) |
22929 | POST_IO |
22930 | RET(14) |
22931 | } |
22932 | |
22933 | // STCC |
22934 | OPCODE(0x54E7) |
22935 | { |
22936 | u32 adr, res; |
22937 | u32 src, dst; |
22938 | |
22939 | adr = AREG(7) - 2; |
22940 | AREG(7) = adr; |
22941 | if (!(flag_C & 0x100)) |
22942 | { |
22943 | res = 0xFF; |
22944 | PRE_IO |
22945 | WRITE_BYTE_F(adr, res) |
22946 | POST_IO |
22947 | RET(14) |
22948 | } |
22949 | res = 0; |
22950 | PRE_IO |
22951 | WRITE_BYTE_F(adr, res) |
22952 | POST_IO |
22953 | RET(14) |
22954 | } |
22955 | |
22956 | // STCC |
22957 | OPCODE(0x55E7) |
22958 | { |
22959 | u32 adr, res; |
22960 | u32 src, dst; |
22961 | |
22962 | adr = AREG(7) - 2; |
22963 | AREG(7) = adr; |
22964 | if (flag_C & 0x100) |
22965 | { |
22966 | res = 0xFF; |
22967 | PRE_IO |
22968 | WRITE_BYTE_F(adr, res) |
22969 | POST_IO |
22970 | RET(14) |
22971 | } |
22972 | res = 0; |
22973 | PRE_IO |
22974 | WRITE_BYTE_F(adr, res) |
22975 | POST_IO |
22976 | RET(14) |
22977 | } |
22978 | |
22979 | // STCC |
22980 | OPCODE(0x56E7) |
22981 | { |
22982 | u32 adr, res; |
22983 | u32 src, dst; |
22984 | |
22985 | adr = AREG(7) - 2; |
22986 | AREG(7) = adr; |
22987 | if (flag_NotZ) |
22988 | { |
22989 | res = 0xFF; |
22990 | PRE_IO |
22991 | WRITE_BYTE_F(adr, res) |
22992 | POST_IO |
22993 | RET(14) |
22994 | } |
22995 | res = 0; |
22996 | PRE_IO |
22997 | WRITE_BYTE_F(adr, res) |
22998 | POST_IO |
22999 | RET(14) |
23000 | } |
23001 | |
23002 | // STCC |
23003 | OPCODE(0x57E7) |
23004 | { |
23005 | u32 adr, res; |
23006 | u32 src, dst; |
23007 | |
23008 | adr = AREG(7) - 2; |
23009 | AREG(7) = adr; |
23010 | if (!flag_NotZ) |
23011 | { |
23012 | res = 0xFF; |
23013 | PRE_IO |
23014 | WRITE_BYTE_F(adr, res) |
23015 | POST_IO |
23016 | RET(14) |
23017 | } |
23018 | res = 0; |
23019 | PRE_IO |
23020 | WRITE_BYTE_F(adr, res) |
23021 | POST_IO |
23022 | RET(14) |
23023 | } |
23024 | |
23025 | // STCC |
23026 | OPCODE(0x58E7) |
23027 | { |
23028 | u32 adr, res; |
23029 | u32 src, dst; |
23030 | |
23031 | adr = AREG(7) - 2; |
23032 | AREG(7) = adr; |
23033 | if (!(flag_V & 0x80)) |
23034 | { |
23035 | res = 0xFF; |
23036 | PRE_IO |
23037 | WRITE_BYTE_F(adr, res) |
23038 | POST_IO |
23039 | RET(14) |
23040 | } |
23041 | res = 0; |
23042 | PRE_IO |
23043 | WRITE_BYTE_F(adr, res) |
23044 | POST_IO |
23045 | RET(14) |
23046 | } |
23047 | |
23048 | // STCC |
23049 | OPCODE(0x59E7) |
23050 | { |
23051 | u32 adr, res; |
23052 | u32 src, dst; |
23053 | |
23054 | adr = AREG(7) - 2; |
23055 | AREG(7) = adr; |
23056 | if (flag_V & 0x80) |
23057 | { |
23058 | res = 0xFF; |
23059 | PRE_IO |
23060 | WRITE_BYTE_F(adr, res) |
23061 | POST_IO |
23062 | RET(14) |
23063 | } |
23064 | res = 0; |
23065 | PRE_IO |
23066 | WRITE_BYTE_F(adr, res) |
23067 | POST_IO |
23068 | RET(14) |
23069 | } |
23070 | |
23071 | // STCC |
23072 | OPCODE(0x5AE7) |
23073 | { |
23074 | u32 adr, res; |
23075 | u32 src, dst; |
23076 | |
23077 | adr = AREG(7) - 2; |
23078 | AREG(7) = adr; |
23079 | if (!(flag_N & 0x80)) |
23080 | { |
23081 | res = 0xFF; |
23082 | PRE_IO |
23083 | WRITE_BYTE_F(adr, res) |
23084 | POST_IO |
23085 | RET(14) |
23086 | } |
23087 | res = 0; |
23088 | PRE_IO |
23089 | WRITE_BYTE_F(adr, res) |
23090 | POST_IO |
23091 | RET(14) |
23092 | } |
23093 | |
23094 | // STCC |
23095 | OPCODE(0x5BE7) |
23096 | { |
23097 | u32 adr, res; |
23098 | u32 src, dst; |
23099 | |
23100 | adr = AREG(7) - 2; |
23101 | AREG(7) = adr; |
23102 | if (flag_N & 0x80) |
23103 | { |
23104 | res = 0xFF; |
23105 | PRE_IO |
23106 | WRITE_BYTE_F(adr, res) |
23107 | POST_IO |
23108 | RET(14) |
23109 | } |
23110 | res = 0; |
23111 | PRE_IO |
23112 | WRITE_BYTE_F(adr, res) |
23113 | POST_IO |
23114 | RET(14) |
23115 | } |
23116 | |
23117 | // STCC |
23118 | OPCODE(0x5CE7) |
23119 | { |
23120 | u32 adr, res; |
23121 | u32 src, dst; |
23122 | |
23123 | adr = AREG(7) - 2; |
23124 | AREG(7) = adr; |
23125 | if (!((flag_N ^ flag_V) & 0x80)) |
23126 | { |
23127 | res = 0xFF; |
23128 | PRE_IO |
23129 | WRITE_BYTE_F(adr, res) |
23130 | POST_IO |
23131 | RET(14) |
23132 | } |
23133 | res = 0; |
23134 | PRE_IO |
23135 | WRITE_BYTE_F(adr, res) |
23136 | POST_IO |
23137 | RET(14) |
23138 | } |
23139 | |
23140 | // STCC |
23141 | OPCODE(0x5DE7) |
23142 | { |
23143 | u32 adr, res; |
23144 | u32 src, dst; |
23145 | |
23146 | adr = AREG(7) - 2; |
23147 | AREG(7) = adr; |
23148 | if ((flag_N ^ flag_V) & 0x80) |
23149 | { |
23150 | res = 0xFF; |
23151 | PRE_IO |
23152 | WRITE_BYTE_F(adr, res) |
23153 | POST_IO |
23154 | RET(14) |
23155 | } |
23156 | res = 0; |
23157 | PRE_IO |
23158 | WRITE_BYTE_F(adr, res) |
23159 | POST_IO |
23160 | RET(14) |
23161 | } |
23162 | |
23163 | // STCC |
23164 | OPCODE(0x5EE7) |
23165 | { |
23166 | u32 adr, res; |
23167 | u32 src, dst; |
23168 | |
23169 | adr = AREG(7) - 2; |
23170 | AREG(7) = adr; |
23171 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23172 | { |
23173 | res = 0xFF; |
23174 | PRE_IO |
23175 | WRITE_BYTE_F(adr, res) |
23176 | POST_IO |
23177 | RET(14) |
23178 | } |
23179 | res = 0; |
23180 | PRE_IO |
23181 | WRITE_BYTE_F(adr, res) |
23182 | POST_IO |
23183 | RET(14) |
23184 | } |
23185 | |
23186 | // STCC |
23187 | OPCODE(0x5FE7) |
23188 | { |
23189 | u32 adr, res; |
23190 | u32 src, dst; |
23191 | |
23192 | adr = AREG(7) - 2; |
23193 | AREG(7) = adr; |
23194 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23195 | { |
23196 | res = 0xFF; |
23197 | PRE_IO |
23198 | WRITE_BYTE_F(adr, res) |
23199 | POST_IO |
23200 | RET(14) |
23201 | } |
23202 | res = 0; |
23203 | PRE_IO |
23204 | WRITE_BYTE_F(adr, res) |
23205 | POST_IO |
23206 | RET(14) |
23207 | } |
23208 | |
23209 | // DBCC |
23210 | OPCODE(0x50C8) |
23211 | { |
23212 | u32 adr, res; |
23213 | u32 src, dst; |
23214 | |
23215 | PC++; |
23216 | RET(12) |
23217 | } |
23218 | |
23219 | // DBCC |
23220 | OPCODE(0x51C8) |
23221 | { |
23222 | u32 adr, res; |
23223 | u32 src, dst; |
23224 | |
23225 | res = DREGu16((Opcode >> 0) & 7); |
23226 | res--; |
23227 | DREGu16((Opcode >> 0) & 7) = res; |
23228 | if ((s32)res != -1) |
23229 | { |
23230 | u32 newPC; |
23231 | |
23232 | newPC = (u32)(PC) - BasePC; |
23233 | newPC += GET_SWORD; |
23234 | SET_PC(newPC); |
23235 | CHECK_BRANCH_EXCEPTION(newPC) |
23236 | RET(10) |
23237 | } |
23238 | PC++; |
23239 | RET(14) |
23240 | } |
23241 | |
23242 | // DBCC |
23243 | OPCODE(0x52C8) |
23244 | { |
23245 | u32 adr, res; |
23246 | u32 src, dst; |
23247 | |
23248 | if ((!flag_NotZ) || (flag_C & 0x100)) |
23249 | { |
23250 | res = DREGu16((Opcode >> 0) & 7); |
23251 | res--; |
23252 | DREGu16((Opcode >> 0) & 7) = res; |
23253 | if ((s32)res != -1) |
23254 | { |
23255 | u32 newPC; |
23256 | |
23257 | newPC = (u32)(PC) - BasePC; |
23258 | newPC += GET_SWORD; |
23259 | SET_PC(newPC); |
23260 | CHECK_BRANCH_EXCEPTION(newPC) |
23261 | RET(10) |
23262 | } |
23263 | } |
23264 | else |
23265 | { |
23266 | PC++; |
23267 | RET(12) |
23268 | } |
23269 | PC++; |
23270 | RET(14) |
23271 | } |
23272 | |
23273 | // DBCC |
23274 | OPCODE(0x53C8) |
23275 | { |
23276 | u32 adr, res; |
23277 | u32 src, dst; |
23278 | |
23279 | if (flag_NotZ && (!(flag_C & 0x100))) |
23280 | { |
23281 | res = DREGu16((Opcode >> 0) & 7); |
23282 | res--; |
23283 | DREGu16((Opcode >> 0) & 7) = res; |
23284 | if ((s32)res != -1) |
23285 | { |
23286 | u32 newPC; |
23287 | |
23288 | newPC = (u32)(PC) - BasePC; |
23289 | newPC += GET_SWORD; |
23290 | SET_PC(newPC); |
23291 | CHECK_BRANCH_EXCEPTION(newPC) |
23292 | RET(10) |
23293 | } |
23294 | } |
23295 | else |
23296 | { |
23297 | PC++; |
23298 | RET(12) |
23299 | } |
23300 | PC++; |
23301 | RET(14) |
23302 | } |
23303 | |
23304 | // DBCC |
23305 | OPCODE(0x54C8) |
23306 | { |
23307 | u32 adr, res; |
23308 | u32 src, dst; |
23309 | |
23310 | if (flag_C & 0x100) |
23311 | { |
23312 | res = DREGu16((Opcode >> 0) & 7); |
23313 | res--; |
23314 | DREGu16((Opcode >> 0) & 7) = res; |
23315 | if ((s32)res != -1) |
23316 | { |
23317 | u32 newPC; |
23318 | |
23319 | newPC = (u32)(PC) - BasePC; |
23320 | newPC += GET_SWORD; |
23321 | SET_PC(newPC); |
23322 | CHECK_BRANCH_EXCEPTION(newPC) |
23323 | RET(10) |
23324 | } |
23325 | } |
23326 | else |
23327 | { |
23328 | PC++; |
23329 | RET(12) |
23330 | } |
23331 | PC++; |
23332 | RET(14) |
23333 | } |
23334 | |
23335 | // DBCC |
23336 | OPCODE(0x55C8) |
23337 | { |
23338 | u32 adr, res; |
23339 | u32 src, dst; |
23340 | |
23341 | if (!(flag_C & 0x100)) |
23342 | { |
23343 | res = DREGu16((Opcode >> 0) & 7); |
23344 | res--; |
23345 | DREGu16((Opcode >> 0) & 7) = res; |
23346 | if ((s32)res != -1) |
23347 | { |
23348 | u32 newPC; |
23349 | |
23350 | newPC = (u32)(PC) - BasePC; |
23351 | newPC += GET_SWORD; |
23352 | SET_PC(newPC); |
23353 | CHECK_BRANCH_EXCEPTION(newPC) |
23354 | RET(10) |
23355 | } |
23356 | } |
23357 | else |
23358 | { |
23359 | PC++; |
23360 | RET(12) |
23361 | } |
23362 | PC++; |
23363 | RET(14) |
23364 | } |
23365 | |
23366 | // DBCC |
23367 | OPCODE(0x56C8) |
23368 | { |
23369 | u32 adr, res; |
23370 | u32 src, dst; |
23371 | |
23372 | if (!flag_NotZ) |
23373 | { |
23374 | res = DREGu16((Opcode >> 0) & 7); |
23375 | res--; |
23376 | DREGu16((Opcode >> 0) & 7) = res; |
23377 | if ((s32)res != -1) |
23378 | { |
23379 | u32 newPC; |
23380 | |
23381 | newPC = (u32)(PC) - BasePC; |
23382 | newPC += GET_SWORD; |
23383 | SET_PC(newPC); |
23384 | CHECK_BRANCH_EXCEPTION(newPC) |
23385 | RET(10) |
23386 | } |
23387 | } |
23388 | else |
23389 | { |
23390 | PC++; |
23391 | RET(12) |
23392 | } |
23393 | PC++; |
23394 | RET(14) |
23395 | } |
23396 | |
23397 | // DBCC |
23398 | OPCODE(0x57C8) |
23399 | { |
23400 | u32 adr, res; |
23401 | u32 src, dst; |
23402 | |
23403 | if (flag_NotZ) |
23404 | { |
23405 | res = DREGu16((Opcode >> 0) & 7); |
23406 | res--; |
23407 | DREGu16((Opcode >> 0) & 7) = res; |
23408 | if ((s32)res != -1) |
23409 | { |
23410 | u32 newPC; |
23411 | |
23412 | newPC = (u32)(PC) - BasePC; |
23413 | newPC += GET_SWORD; |
23414 | SET_PC(newPC); |
23415 | CHECK_BRANCH_EXCEPTION(newPC) |
23416 | RET(10) |
23417 | } |
23418 | } |
23419 | else |
23420 | { |
23421 | PC++; |
23422 | RET(12) |
23423 | } |
23424 | PC++; |
23425 | RET(14) |
23426 | } |
23427 | |
23428 | // DBCC |
23429 | OPCODE(0x58C8) |
23430 | { |
23431 | u32 adr, res; |
23432 | u32 src, dst; |
23433 | |
23434 | if (flag_V & 0x80) |
23435 | { |
23436 | res = DREGu16((Opcode >> 0) & 7); |
23437 | res--; |
23438 | DREGu16((Opcode >> 0) & 7) = res; |
23439 | if ((s32)res != -1) |
23440 | { |
23441 | u32 newPC; |
23442 | |
23443 | newPC = (u32)(PC) - BasePC; |
23444 | newPC += GET_SWORD; |
23445 | SET_PC(newPC); |
23446 | CHECK_BRANCH_EXCEPTION(newPC) |
23447 | RET(10) |
23448 | } |
23449 | } |
23450 | else |
23451 | { |
23452 | PC++; |
23453 | RET(12) |
23454 | } |
23455 | PC++; |
23456 | RET(14) |
23457 | } |
23458 | |
23459 | // DBCC |
23460 | OPCODE(0x59C8) |
23461 | { |
23462 | u32 adr, res; |
23463 | u32 src, dst; |
23464 | |
23465 | if (!(flag_V & 0x80)) |
23466 | { |
23467 | res = DREGu16((Opcode >> 0) & 7); |
23468 | res--; |
23469 | DREGu16((Opcode >> 0) & 7) = res; |
23470 | if ((s32)res != -1) |
23471 | { |
23472 | u32 newPC; |
23473 | |
23474 | newPC = (u32)(PC) - BasePC; |
23475 | newPC += GET_SWORD; |
23476 | SET_PC(newPC); |
23477 | CHECK_BRANCH_EXCEPTION(newPC) |
23478 | RET(10) |
23479 | } |
23480 | } |
23481 | else |
23482 | { |
23483 | PC++; |
23484 | RET(12) |
23485 | } |
23486 | PC++; |
23487 | RET(14) |
23488 | } |
23489 | |
23490 | // DBCC |
23491 | OPCODE(0x5AC8) |
23492 | { |
23493 | u32 adr, res; |
23494 | u32 src, dst; |
23495 | |
23496 | if (flag_N & 0x80) |
23497 | { |
23498 | res = DREGu16((Opcode >> 0) & 7); |
23499 | res--; |
23500 | DREGu16((Opcode >> 0) & 7) = res; |
23501 | if ((s32)res != -1) |
23502 | { |
23503 | u32 newPC; |
23504 | |
23505 | newPC = (u32)(PC) - BasePC; |
23506 | newPC += GET_SWORD; |
23507 | SET_PC(newPC); |
23508 | CHECK_BRANCH_EXCEPTION(newPC) |
23509 | RET(10) |
23510 | } |
23511 | } |
23512 | else |
23513 | { |
23514 | PC++; |
23515 | RET(12) |
23516 | } |
23517 | PC++; |
23518 | RET(14) |
23519 | } |
23520 | |
23521 | // DBCC |
23522 | OPCODE(0x5BC8) |
23523 | { |
23524 | u32 adr, res; |
23525 | u32 src, dst; |
23526 | |
23527 | if (!(flag_N & 0x80)) |
23528 | { |
23529 | res = DREGu16((Opcode >> 0) & 7); |
23530 | res--; |
23531 | DREGu16((Opcode >> 0) & 7) = res; |
23532 | if ((s32)res != -1) |
23533 | { |
23534 | u32 newPC; |
23535 | |
23536 | newPC = (u32)(PC) - BasePC; |
23537 | newPC += GET_SWORD; |
23538 | SET_PC(newPC); |
23539 | CHECK_BRANCH_EXCEPTION(newPC) |
23540 | RET(10) |
23541 | } |
23542 | } |
23543 | else |
23544 | { |
23545 | PC++; |
23546 | RET(12) |
23547 | } |
23548 | PC++; |
23549 | RET(14) |
23550 | } |
23551 | |
23552 | // DBCC |
23553 | OPCODE(0x5CC8) |
23554 | { |
23555 | u32 adr, res; |
23556 | u32 src, dst; |
23557 | |
23558 | if ((flag_N ^ flag_V) & 0x80) |
23559 | { |
23560 | res = DREGu16((Opcode >> 0) & 7); |
23561 | res--; |
23562 | DREGu16((Opcode >> 0) & 7) = res; |
23563 | if ((s32)res != -1) |
23564 | { |
23565 | u32 newPC; |
23566 | |
23567 | newPC = (u32)(PC) - BasePC; |
23568 | newPC += GET_SWORD; |
23569 | SET_PC(newPC); |
23570 | CHECK_BRANCH_EXCEPTION(newPC) |
23571 | RET(10) |
23572 | } |
23573 | } |
23574 | else |
23575 | { |
23576 | PC++; |
23577 | RET(12) |
23578 | } |
23579 | PC++; |
23580 | RET(14) |
23581 | } |
23582 | |
23583 | // DBCC |
23584 | OPCODE(0x5DC8) |
23585 | { |
23586 | u32 adr, res; |
23587 | u32 src, dst; |
23588 | |
23589 | if (!((flag_N ^ flag_V) & 0x80)) |
23590 | { |
23591 | res = DREGu16((Opcode >> 0) & 7); |
23592 | res--; |
23593 | DREGu16((Opcode >> 0) & 7) = res; |
23594 | if ((s32)res != -1) |
23595 | { |
23596 | u32 newPC; |
23597 | |
23598 | newPC = (u32)(PC) - BasePC; |
23599 | newPC += GET_SWORD; |
23600 | SET_PC(newPC); |
23601 | CHECK_BRANCH_EXCEPTION(newPC) |
23602 | RET(10) |
23603 | } |
23604 | } |
23605 | else |
23606 | { |
23607 | PC++; |
23608 | RET(12) |
23609 | } |
23610 | PC++; |
23611 | RET(14) |
23612 | } |
23613 | |
23614 | // DBCC |
23615 | OPCODE(0x5EC8) |
23616 | { |
23617 | u32 adr, res; |
23618 | u32 src, dst; |
23619 | |
23620 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23621 | { |
23622 | res = DREGu16((Opcode >> 0) & 7); |
23623 | res--; |
23624 | DREGu16((Opcode >> 0) & 7) = res; |
23625 | if ((s32)res != -1) |
23626 | { |
23627 | u32 newPC; |
23628 | |
23629 | newPC = (u32)(PC) - BasePC; |
23630 | newPC += GET_SWORD; |
23631 | SET_PC(newPC); |
23632 | CHECK_BRANCH_EXCEPTION(newPC) |
23633 | RET(10) |
23634 | } |
23635 | } |
23636 | else |
23637 | { |
23638 | PC++; |
23639 | RET(12) |
23640 | } |
23641 | PC++; |
23642 | RET(14) |
23643 | } |
23644 | |
23645 | // DBCC |
23646 | OPCODE(0x5FC8) |
23647 | { |
23648 | u32 adr, res; |
23649 | u32 src, dst; |
23650 | |
23651 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23652 | { |
23653 | res = DREGu16((Opcode >> 0) & 7); |
23654 | res--; |
23655 | DREGu16((Opcode >> 0) & 7) = res; |
23656 | if ((s32)res != -1) |
23657 | { |
23658 | u32 newPC; |
23659 | |
23660 | newPC = (u32)(PC) - BasePC; |
23661 | newPC += GET_SWORD; |
23662 | SET_PC(newPC); |
23663 | CHECK_BRANCH_EXCEPTION(newPC) |
23664 | RET(10) |
23665 | } |
23666 | } |
23667 | else |
23668 | { |
23669 | PC++; |
23670 | RET(12) |
23671 | } |
23672 | PC++; |
23673 | RET(14) |
23674 | } |
23675 | |
23676 | // ADDQ |
23677 | OPCODE(0x5000) |
23678 | { |
23679 | u32 adr, res; |
23680 | u32 src, dst; |
23681 | |
23682 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23683 | dst = DREGu8((Opcode >> 0) & 7); |
23684 | res = dst + src; |
23685 | flag_N = flag_X = flag_C = res; |
23686 | flag_V = (src ^ res) & (dst ^ res); |
23687 | flag_NotZ = res & 0xFF; |
23688 | DREGu8((Opcode >> 0) & 7) = res; |
23689 | RET(4) |
23690 | } |
23691 | |
23692 | // ADDQ |
23693 | OPCODE(0x5010) |
23694 | { |
23695 | u32 adr, res; |
23696 | u32 src, dst; |
23697 | |
23698 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23699 | adr = AREG((Opcode >> 0) & 7); |
23700 | PRE_IO |
23701 | READ_BYTE_F(adr, dst) |
23702 | res = dst + src; |
23703 | flag_N = flag_X = flag_C = res; |
23704 | flag_V = (src ^ res) & (dst ^ res); |
23705 | flag_NotZ = res & 0xFF; |
23706 | WRITE_BYTE_F(adr, res) |
23707 | POST_IO |
23708 | RET(12) |
23709 | } |
23710 | |
23711 | // ADDQ |
23712 | OPCODE(0x5018) |
23713 | { |
23714 | u32 adr, res; |
23715 | u32 src, dst; |
23716 | |
23717 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23718 | adr = AREG((Opcode >> 0) & 7); |
23719 | AREG((Opcode >> 0) & 7) += 1; |
23720 | PRE_IO |
23721 | READ_BYTE_F(adr, dst) |
23722 | res = dst + src; |
23723 | flag_N = flag_X = flag_C = res; |
23724 | flag_V = (src ^ res) & (dst ^ res); |
23725 | flag_NotZ = res & 0xFF; |
23726 | WRITE_BYTE_F(adr, res) |
23727 | POST_IO |
23728 | RET(12) |
23729 | } |
23730 | |
23731 | // ADDQ |
23732 | OPCODE(0x5020) |
23733 | { |
23734 | u32 adr, res; |
23735 | u32 src, dst; |
23736 | |
23737 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23738 | adr = AREG((Opcode >> 0) & 7) - 1; |
23739 | AREG((Opcode >> 0) & 7) = adr; |
23740 | PRE_IO |
23741 | READ_BYTE_F(adr, dst) |
23742 | res = dst + src; |
23743 | flag_N = flag_X = flag_C = res; |
23744 | flag_V = (src ^ res) & (dst ^ res); |
23745 | flag_NotZ = res & 0xFF; |
23746 | WRITE_BYTE_F(adr, res) |
23747 | POST_IO |
23748 | RET(14) |
23749 | } |
23750 | |
23751 | // ADDQ |
23752 | OPCODE(0x5028) |
23753 | { |
23754 | u32 adr, res; |
23755 | u32 src, dst; |
23756 | |
23757 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23758 | FETCH_SWORD(adr); |
23759 | adr += AREG((Opcode >> 0) & 7); |
23760 | PRE_IO |
23761 | READ_BYTE_F(adr, dst) |
23762 | res = dst + src; |
23763 | flag_N = flag_X = flag_C = res; |
23764 | flag_V = (src ^ res) & (dst ^ res); |
23765 | flag_NotZ = res & 0xFF; |
23766 | WRITE_BYTE_F(adr, res) |
23767 | POST_IO |
23768 | RET(16) |
23769 | } |
23770 | |
23771 | // ADDQ |
23772 | OPCODE(0x5030) |
23773 | { |
23774 | u32 adr, res; |
23775 | u32 src, dst; |
23776 | |
23777 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23778 | adr = AREG((Opcode >> 0) & 7); |
23779 | DECODE_EXT_WORD |
23780 | PRE_IO |
23781 | READ_BYTE_F(adr, dst) |
23782 | res = dst + src; |
23783 | flag_N = flag_X = flag_C = res; |
23784 | flag_V = (src ^ res) & (dst ^ res); |
23785 | flag_NotZ = res & 0xFF; |
23786 | WRITE_BYTE_F(adr, res) |
23787 | POST_IO |
23788 | RET(18) |
23789 | } |
23790 | |
23791 | // ADDQ |
23792 | OPCODE(0x5038) |
23793 | { |
23794 | u32 adr, res; |
23795 | u32 src, dst; |
23796 | |
23797 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23798 | FETCH_SWORD(adr); |
23799 | PRE_IO |
23800 | READ_BYTE_F(adr, dst) |
23801 | res = dst + src; |
23802 | flag_N = flag_X = flag_C = res; |
23803 | flag_V = (src ^ res) & (dst ^ res); |
23804 | flag_NotZ = res & 0xFF; |
23805 | WRITE_BYTE_F(adr, res) |
23806 | POST_IO |
23807 | RET(16) |
23808 | } |
23809 | |
23810 | // ADDQ |
23811 | OPCODE(0x5039) |
23812 | { |
23813 | u32 adr, res; |
23814 | u32 src, dst; |
23815 | |
23816 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23817 | FETCH_LONG(adr); |
23818 | PRE_IO |
23819 | READ_BYTE_F(adr, dst) |
23820 | res = dst + src; |
23821 | flag_N = flag_X = flag_C = res; |
23822 | flag_V = (src ^ res) & (dst ^ res); |
23823 | flag_NotZ = res & 0xFF; |
23824 | WRITE_BYTE_F(adr, res) |
23825 | POST_IO |
23826 | RET(20) |
23827 | } |
23828 | |
23829 | // ADDQ |
23830 | OPCODE(0x501F) |
23831 | { |
23832 | u32 adr, res; |
23833 | u32 src, dst; |
23834 | |
23835 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23836 | adr = AREG(7); |
23837 | AREG(7) += 2; |
23838 | PRE_IO |
23839 | READ_BYTE_F(adr, dst) |
23840 | res = dst + src; |
23841 | flag_N = flag_X = flag_C = res; |
23842 | flag_V = (src ^ res) & (dst ^ res); |
23843 | flag_NotZ = res & 0xFF; |
23844 | WRITE_BYTE_F(adr, res) |
23845 | POST_IO |
23846 | RET(12) |
23847 | } |
23848 | |
23849 | // ADDQ |
23850 | OPCODE(0x5027) |
23851 | { |
23852 | u32 adr, res; |
23853 | u32 src, dst; |
23854 | |
23855 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23856 | adr = AREG(7) - 2; |
23857 | AREG(7) = adr; |
23858 | PRE_IO |
23859 | READ_BYTE_F(adr, dst) |
23860 | res = dst + src; |
23861 | flag_N = flag_X = flag_C = res; |
23862 | flag_V = (src ^ res) & (dst ^ res); |
23863 | flag_NotZ = res & 0xFF; |
23864 | WRITE_BYTE_F(adr, res) |
23865 | POST_IO |
23866 | RET(14) |
23867 | } |
23868 | |
23869 | // ADDQ |
23870 | OPCODE(0x5040) |
23871 | { |
23872 | u32 adr, res; |
23873 | u32 src, dst; |
23874 | |
23875 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23876 | dst = DREGu16((Opcode >> 0) & 7); |
23877 | res = dst + src; |
23878 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23879 | flag_N = flag_X = flag_C = res >> 8; |
23880 | flag_NotZ = res & 0xFFFF; |
23881 | DREGu16((Opcode >> 0) & 7) = res; |
23882 | RET(4) |
23883 | } |
23884 | |
23885 | // ADDQ |
23886 | OPCODE(0x5048) |
23887 | { |
23888 | u32 adr, res; |
23889 | u32 src, dst; |
23890 | |
23891 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23892 | dst = AREGu32((Opcode >> 0) & 7); |
23893 | res = dst + src; |
23894 | AREG((Opcode >> 0) & 7) = res; |
23895 | #ifdef USE_CYCLONE_TIMING_ // breaks Project-X |
23896 | RET(4) |
23897 | #else |
23898 | RET(8) |
23899 | #endif |
23900 | } |
23901 | |
23902 | // ADDQ |
23903 | OPCODE(0x5050) |
23904 | { |
23905 | u32 adr, res; |
23906 | u32 src, dst; |
23907 | |
23908 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23909 | adr = AREG((Opcode >> 0) & 7); |
23910 | PRE_IO |
23911 | READ_WORD_F(adr, dst) |
23912 | res = dst + src; |
23913 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23914 | flag_N = flag_X = flag_C = res >> 8; |
23915 | flag_NotZ = res & 0xFFFF; |
23916 | WRITE_WORD_F(adr, res) |
23917 | POST_IO |
23918 | RET(12) |
23919 | } |
23920 | |
23921 | // ADDQ |
23922 | OPCODE(0x5058) |
23923 | { |
23924 | u32 adr, res; |
23925 | u32 src, dst; |
23926 | |
23927 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23928 | adr = AREG((Opcode >> 0) & 7); |
23929 | AREG((Opcode >> 0) & 7) += 2; |
23930 | PRE_IO |
23931 | READ_WORD_F(adr, dst) |
23932 | res = dst + src; |
23933 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23934 | flag_N = flag_X = flag_C = res >> 8; |
23935 | flag_NotZ = res & 0xFFFF; |
23936 | WRITE_WORD_F(adr, res) |
23937 | POST_IO |
23938 | RET(12) |
23939 | } |
23940 | |
23941 | // ADDQ |
23942 | OPCODE(0x5060) |
23943 | { |
23944 | u32 adr, res; |
23945 | u32 src, dst; |
23946 | |
23947 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23948 | adr = AREG((Opcode >> 0) & 7) - 2; |
23949 | AREG((Opcode >> 0) & 7) = adr; |
23950 | PRE_IO |
23951 | READ_WORD_F(adr, dst) |
23952 | res = dst + src; |
23953 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23954 | flag_N = flag_X = flag_C = res >> 8; |
23955 | flag_NotZ = res & 0xFFFF; |
23956 | WRITE_WORD_F(adr, res) |
23957 | POST_IO |
23958 | RET(14) |
23959 | } |
23960 | |
23961 | // ADDQ |
23962 | OPCODE(0x5068) |
23963 | { |
23964 | u32 adr, res; |
23965 | u32 src, dst; |
23966 | |
23967 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23968 | FETCH_SWORD(adr); |
23969 | adr += AREG((Opcode >> 0) & 7); |
23970 | PRE_IO |
23971 | READ_WORD_F(adr, dst) |
23972 | res = dst + src; |
23973 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23974 | flag_N = flag_X = flag_C = res >> 8; |
23975 | flag_NotZ = res & 0xFFFF; |
23976 | WRITE_WORD_F(adr, res) |
23977 | POST_IO |
23978 | RET(16) |
23979 | } |
23980 | |
23981 | // ADDQ |
23982 | OPCODE(0x5070) |
23983 | { |
23984 | u32 adr, res; |
23985 | u32 src, dst; |
23986 | |
23987 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23988 | adr = AREG((Opcode >> 0) & 7); |
23989 | DECODE_EXT_WORD |
23990 | PRE_IO |
23991 | READ_WORD_F(adr, dst) |
23992 | res = dst + src; |
23993 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
23994 | flag_N = flag_X = flag_C = res >> 8; |
23995 | flag_NotZ = res & 0xFFFF; |
23996 | WRITE_WORD_F(adr, res) |
23997 | POST_IO |
23998 | RET(18) |
23999 | } |
24000 | |
24001 | // ADDQ |
24002 | OPCODE(0x5078) |
24003 | { |
24004 | u32 adr, res; |
24005 | u32 src, dst; |
24006 | |
24007 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24008 | FETCH_SWORD(adr); |
24009 | PRE_IO |
24010 | READ_WORD_F(adr, dst) |
24011 | res = dst + src; |
24012 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24013 | flag_N = flag_X = flag_C = res >> 8; |
24014 | flag_NotZ = res & 0xFFFF; |
24015 | WRITE_WORD_F(adr, res) |
24016 | POST_IO |
24017 | RET(16) |
24018 | } |
24019 | |
24020 | // ADDQ |
24021 | OPCODE(0x5079) |
24022 | { |
24023 | u32 adr, res; |
24024 | u32 src, dst; |
24025 | |
24026 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24027 | FETCH_LONG(adr); |
24028 | PRE_IO |
24029 | READ_WORD_F(adr, dst) |
24030 | res = dst + src; |
24031 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24032 | flag_N = flag_X = flag_C = res >> 8; |
24033 | flag_NotZ = res & 0xFFFF; |
24034 | WRITE_WORD_F(adr, res) |
24035 | POST_IO |
24036 | RET(20) |
24037 | } |
24038 | |
24039 | // ADDQ |
24040 | OPCODE(0x505F) |
24041 | { |
24042 | u32 adr, res; |
24043 | u32 src, dst; |
24044 | |
24045 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24046 | adr = AREG(7); |
24047 | AREG(7) += 2; |
24048 | PRE_IO |
24049 | READ_WORD_F(adr, dst) |
24050 | res = dst + src; |
24051 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24052 | flag_N = flag_X = flag_C = res >> 8; |
24053 | flag_NotZ = res & 0xFFFF; |
24054 | WRITE_WORD_F(adr, res) |
24055 | POST_IO |
24056 | RET(12) |
24057 | } |
24058 | |
24059 | // ADDQ |
24060 | OPCODE(0x5067) |
24061 | { |
24062 | u32 adr, res; |
24063 | u32 src, dst; |
24064 | |
24065 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24066 | adr = AREG(7) - 2; |
24067 | AREG(7) = adr; |
24068 | PRE_IO |
24069 | READ_WORD_F(adr, dst) |
24070 | res = dst + src; |
24071 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24072 | flag_N = flag_X = flag_C = res >> 8; |
24073 | flag_NotZ = res & 0xFFFF; |
24074 | WRITE_WORD_F(adr, res) |
24075 | POST_IO |
24076 | RET(14) |
24077 | } |
24078 | |
24079 | // ADDQ |
24080 | OPCODE(0x5080) |
24081 | { |
24082 | u32 adr, res; |
24083 | u32 src, dst; |
24084 | |
24085 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24086 | dst = DREGu32((Opcode >> 0) & 7); |
24087 | res = dst + src; |
24088 | flag_NotZ = res; |
24089 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24090 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24091 | flag_N = res >> 24; |
24092 | DREGu32((Opcode >> 0) & 7) = res; |
24093 | RET(8) |
24094 | } |
24095 | |
24096 | // ADDQ |
24097 | OPCODE(0x5088) |
24098 | { |
24099 | u32 adr, res; |
24100 | u32 src, dst; |
24101 | |
24102 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24103 | dst = AREGu32((Opcode >> 0) & 7); |
24104 | res = dst + src; |
24105 | AREG((Opcode >> 0) & 7) = res; |
24106 | RET(8) |
24107 | } |
24108 | |
24109 | // ADDQ |
24110 | OPCODE(0x5090) |
24111 | { |
24112 | u32 adr, res; |
24113 | u32 src, dst; |
24114 | |
24115 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24116 | adr = AREG((Opcode >> 0) & 7); |
24117 | PRE_IO |
24118 | READ_LONG_F(adr, dst) |
24119 | res = dst + src; |
24120 | flag_NotZ = res; |
24121 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24122 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24123 | flag_N = res >> 24; |
24124 | WRITE_LONG_F(adr, res) |
24125 | POST_IO |
24126 | RET(20) |
24127 | } |
24128 | |
24129 | // ADDQ |
24130 | OPCODE(0x5098) |
24131 | { |
24132 | u32 adr, res; |
24133 | u32 src, dst; |
24134 | |
24135 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24136 | adr = AREG((Opcode >> 0) & 7); |
24137 | AREG((Opcode >> 0) & 7) += 4; |
24138 | PRE_IO |
24139 | READ_LONG_F(adr, dst) |
24140 | res = dst + src; |
24141 | flag_NotZ = res; |
24142 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24143 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24144 | flag_N = res >> 24; |
24145 | WRITE_LONG_F(adr, res) |
24146 | POST_IO |
24147 | RET(20) |
24148 | } |
24149 | |
24150 | // ADDQ |
24151 | OPCODE(0x50A0) |
24152 | { |
24153 | u32 adr, res; |
24154 | u32 src, dst; |
24155 | |
24156 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24157 | adr = AREG((Opcode >> 0) & 7) - 4; |
24158 | AREG((Opcode >> 0) & 7) = adr; |
24159 | PRE_IO |
24160 | READ_LONG_F(adr, dst) |
24161 | res = dst + src; |
24162 | flag_NotZ = res; |
24163 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24164 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24165 | flag_N = res >> 24; |
24166 | WRITE_LONG_F(adr, res) |
24167 | POST_IO |
24168 | RET(22) |
24169 | } |
24170 | |
24171 | // ADDQ |
24172 | OPCODE(0x50A8) |
24173 | { |
24174 | u32 adr, res; |
24175 | u32 src, dst; |
24176 | |
24177 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24178 | FETCH_SWORD(adr); |
24179 | adr += AREG((Opcode >> 0) & 7); |
24180 | PRE_IO |
24181 | READ_LONG_F(adr, dst) |
24182 | res = dst + src; |
24183 | flag_NotZ = res; |
24184 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24185 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24186 | flag_N = res >> 24; |
24187 | WRITE_LONG_F(adr, res) |
24188 | POST_IO |
24189 | RET(24) |
24190 | } |
24191 | |
24192 | // ADDQ |
24193 | OPCODE(0x50B0) |
24194 | { |
24195 | u32 adr, res; |
24196 | u32 src, dst; |
24197 | |
24198 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24199 | adr = AREG((Opcode >> 0) & 7); |
24200 | DECODE_EXT_WORD |
24201 | PRE_IO |
24202 | READ_LONG_F(adr, dst) |
24203 | res = dst + src; |
24204 | flag_NotZ = res; |
24205 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24206 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24207 | flag_N = res >> 24; |
24208 | WRITE_LONG_F(adr, res) |
24209 | POST_IO |
24210 | RET(26) |
24211 | } |
24212 | |
24213 | // ADDQ |
24214 | OPCODE(0x50B8) |
24215 | { |
24216 | u32 adr, res; |
24217 | u32 src, dst; |
24218 | |
24219 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24220 | FETCH_SWORD(adr); |
24221 | PRE_IO |
24222 | READ_LONG_F(adr, dst) |
24223 | res = dst + src; |
24224 | flag_NotZ = res; |
24225 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24226 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24227 | flag_N = res >> 24; |
24228 | WRITE_LONG_F(adr, res) |
24229 | POST_IO |
24230 | RET(24) |
24231 | } |
24232 | |
24233 | // ADDQ |
24234 | OPCODE(0x50B9) |
24235 | { |
24236 | u32 adr, res; |
24237 | u32 src, dst; |
24238 | |
24239 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24240 | FETCH_LONG(adr); |
24241 | PRE_IO |
24242 | READ_LONG_F(adr, dst) |
24243 | res = dst + src; |
24244 | flag_NotZ = res; |
24245 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24246 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24247 | flag_N = res >> 24; |
24248 | WRITE_LONG_F(adr, res) |
24249 | POST_IO |
24250 | RET(28) |
24251 | } |
24252 | |
24253 | // ADDQ |
24254 | OPCODE(0x509F) |
24255 | { |
24256 | u32 adr, res; |
24257 | u32 src, dst; |
24258 | |
24259 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24260 | adr = AREG(7); |
24261 | AREG(7) += 4; |
24262 | PRE_IO |
24263 | READ_LONG_F(adr, dst) |
24264 | res = dst + src; |
24265 | flag_NotZ = res; |
24266 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24267 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24268 | flag_N = res >> 24; |
24269 | WRITE_LONG_F(adr, res) |
24270 | POST_IO |
24271 | RET(20) |
24272 | } |
24273 | |
24274 | // ADDQ |
24275 | OPCODE(0x50A7) |
24276 | { |
24277 | u32 adr, res; |
24278 | u32 src, dst; |
24279 | |
24280 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24281 | adr = AREG(7) - 4; |
24282 | AREG(7) = adr; |
24283 | PRE_IO |
24284 | READ_LONG_F(adr, dst) |
24285 | res = dst + src; |
24286 | flag_NotZ = res; |
24287 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24288 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24289 | flag_N = res >> 24; |
24290 | WRITE_LONG_F(adr, res) |
24291 | POST_IO |
24292 | RET(22) |
24293 | } |
24294 | |
24295 | // SUBQ |
24296 | OPCODE(0x5100) |
24297 | { |
24298 | u32 adr, res; |
24299 | u32 src, dst; |
24300 | |
24301 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24302 | dst = DREGu8((Opcode >> 0) & 7); |
24303 | res = dst - src; |
24304 | flag_N = flag_X = flag_C = res; |
24305 | flag_V = (src ^ dst) & (res ^ dst); |
24306 | flag_NotZ = res & 0xFF; |
24307 | DREGu8((Opcode >> 0) & 7) = res; |
24308 | RET(4) |
24309 | } |
24310 | |
24311 | // SUBQ |
24312 | OPCODE(0x5110) |
24313 | { |
24314 | u32 adr, res; |
24315 | u32 src, dst; |
24316 | |
24317 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24318 | adr = AREG((Opcode >> 0) & 7); |
24319 | PRE_IO |
24320 | READ_BYTE_F(adr, dst) |
24321 | res = dst - src; |
24322 | flag_N = flag_X = flag_C = res; |
24323 | flag_V = (src ^ dst) & (res ^ dst); |
24324 | flag_NotZ = res & 0xFF; |
24325 | WRITE_BYTE_F(adr, res) |
24326 | POST_IO |
24327 | RET(12) |
24328 | } |
24329 | |
24330 | // SUBQ |
24331 | OPCODE(0x5118) |
24332 | { |
24333 | u32 adr, res; |
24334 | u32 src, dst; |
24335 | |
24336 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24337 | adr = AREG((Opcode >> 0) & 7); |
24338 | AREG((Opcode >> 0) & 7) += 1; |
24339 | PRE_IO |
24340 | READ_BYTE_F(adr, dst) |
24341 | res = dst - src; |
24342 | flag_N = flag_X = flag_C = res; |
24343 | flag_V = (src ^ dst) & (res ^ dst); |
24344 | flag_NotZ = res & 0xFF; |
24345 | WRITE_BYTE_F(adr, res) |
24346 | POST_IO |
24347 | RET(12) |
24348 | } |
24349 | |
24350 | // SUBQ |
24351 | OPCODE(0x5120) |
24352 | { |
24353 | u32 adr, res; |
24354 | u32 src, dst; |
24355 | |
24356 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24357 | adr = AREG((Opcode >> 0) & 7) - 1; |
24358 | AREG((Opcode >> 0) & 7) = adr; |
24359 | PRE_IO |
24360 | READ_BYTE_F(adr, dst) |
24361 | res = dst - src; |
24362 | flag_N = flag_X = flag_C = res; |
24363 | flag_V = (src ^ dst) & (res ^ dst); |
24364 | flag_NotZ = res & 0xFF; |
24365 | WRITE_BYTE_F(adr, res) |
24366 | POST_IO |
24367 | RET(14) |
24368 | } |
24369 | |
24370 | // SUBQ |
24371 | OPCODE(0x5128) |
24372 | { |
24373 | u32 adr, res; |
24374 | u32 src, dst; |
24375 | |
24376 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24377 | FETCH_SWORD(adr); |
24378 | adr += AREG((Opcode >> 0) & 7); |
24379 | PRE_IO |
24380 | READ_BYTE_F(adr, dst) |
24381 | res = dst - src; |
24382 | flag_N = flag_X = flag_C = res; |
24383 | flag_V = (src ^ dst) & (res ^ dst); |
24384 | flag_NotZ = res & 0xFF; |
24385 | WRITE_BYTE_F(adr, res) |
24386 | POST_IO |
24387 | RET(16) |
24388 | } |
24389 | |
24390 | // SUBQ |
24391 | OPCODE(0x5130) |
24392 | { |
24393 | u32 adr, res; |
24394 | u32 src, dst; |
24395 | |
24396 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24397 | adr = AREG((Opcode >> 0) & 7); |
24398 | DECODE_EXT_WORD |
24399 | PRE_IO |
24400 | READ_BYTE_F(adr, dst) |
24401 | res = dst - src; |
24402 | flag_N = flag_X = flag_C = res; |
24403 | flag_V = (src ^ dst) & (res ^ dst); |
24404 | flag_NotZ = res & 0xFF; |
24405 | WRITE_BYTE_F(adr, res) |
24406 | POST_IO |
24407 | RET(18) |
24408 | } |
24409 | |
24410 | // SUBQ |
24411 | OPCODE(0x5138) |
24412 | { |
24413 | u32 adr, res; |
24414 | u32 src, dst; |
24415 | |
24416 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24417 | FETCH_SWORD(adr); |
24418 | PRE_IO |
24419 | READ_BYTE_F(adr, dst) |
24420 | res = dst - src; |
24421 | flag_N = flag_X = flag_C = res; |
24422 | flag_V = (src ^ dst) & (res ^ dst); |
24423 | flag_NotZ = res & 0xFF; |
24424 | WRITE_BYTE_F(adr, res) |
24425 | POST_IO |
24426 | RET(16) |
24427 | } |
24428 | |
24429 | // SUBQ |
24430 | OPCODE(0x5139) |
24431 | { |
24432 | u32 adr, res; |
24433 | u32 src, dst; |
24434 | |
24435 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24436 | FETCH_LONG(adr); |
24437 | PRE_IO |
24438 | READ_BYTE_F(adr, dst) |
24439 | res = dst - src; |
24440 | flag_N = flag_X = flag_C = res; |
24441 | flag_V = (src ^ dst) & (res ^ dst); |
24442 | flag_NotZ = res & 0xFF; |
24443 | WRITE_BYTE_F(adr, res) |
24444 | POST_IO |
24445 | RET(20) |
24446 | } |
24447 | |
24448 | // SUBQ |
24449 | OPCODE(0x511F) |
24450 | { |
24451 | u32 adr, res; |
24452 | u32 src, dst; |
24453 | |
24454 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24455 | adr = AREG(7); |
24456 | AREG(7) += 2; |
24457 | PRE_IO |
24458 | READ_BYTE_F(adr, dst) |
24459 | res = dst - src; |
24460 | flag_N = flag_X = flag_C = res; |
24461 | flag_V = (src ^ dst) & (res ^ dst); |
24462 | flag_NotZ = res & 0xFF; |
24463 | WRITE_BYTE_F(adr, res) |
24464 | POST_IO |
24465 | RET(12) |
24466 | } |
24467 | |
24468 | // SUBQ |
24469 | OPCODE(0x5127) |
24470 | { |
24471 | u32 adr, res; |
24472 | u32 src, dst; |
24473 | |
24474 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24475 | adr = AREG(7) - 2; |
24476 | AREG(7) = adr; |
24477 | PRE_IO |
24478 | READ_BYTE_F(adr, dst) |
24479 | res = dst - src; |
24480 | flag_N = flag_X = flag_C = res; |
24481 | flag_V = (src ^ dst) & (res ^ dst); |
24482 | flag_NotZ = res & 0xFF; |
24483 | WRITE_BYTE_F(adr, res) |
24484 | POST_IO |
24485 | RET(14) |
24486 | } |
24487 | |
24488 | // SUBQ |
24489 | OPCODE(0x5140) |
24490 | { |
24491 | u32 adr, res; |
24492 | u32 src, dst; |
24493 | |
24494 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24495 | dst = DREGu16((Opcode >> 0) & 7); |
24496 | res = dst - src; |
24497 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24498 | flag_N = flag_X = flag_C = res >> 8; |
24499 | flag_NotZ = res & 0xFFFF; |
24500 | DREGu16((Opcode >> 0) & 7) = res; |
24501 | RET(4) |
24502 | } |
24503 | |
24504 | // SUBQ |
24505 | OPCODE(0x5148) |
24506 | { |
24507 | u32 adr, res; |
24508 | u32 src, dst; |
24509 | |
24510 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24511 | dst = AREGu32((Opcode >> 0) & 7); |
24512 | res = dst - src; |
24513 | AREG((Opcode >> 0) & 7) = res; |
24514 | RET(8) |
24515 | } |
24516 | |
24517 | // SUBQ |
24518 | OPCODE(0x5150) |
24519 | { |
24520 | u32 adr, res; |
24521 | u32 src, dst; |
24522 | |
24523 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24524 | adr = AREG((Opcode >> 0) & 7); |
24525 | PRE_IO |
24526 | READ_WORD_F(adr, dst) |
24527 | res = dst - src; |
24528 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24529 | flag_N = flag_X = flag_C = res >> 8; |
24530 | flag_NotZ = res & 0xFFFF; |
24531 | WRITE_WORD_F(adr, res) |
24532 | POST_IO |
24533 | RET(12) |
24534 | } |
24535 | |
24536 | // SUBQ |
24537 | OPCODE(0x5158) |
24538 | { |
24539 | u32 adr, res; |
24540 | u32 src, dst; |
24541 | |
24542 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24543 | adr = AREG((Opcode >> 0) & 7); |
24544 | AREG((Opcode >> 0) & 7) += 2; |
24545 | PRE_IO |
24546 | READ_WORD_F(adr, dst) |
24547 | res = dst - src; |
24548 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24549 | flag_N = flag_X = flag_C = res >> 8; |
24550 | flag_NotZ = res & 0xFFFF; |
24551 | WRITE_WORD_F(adr, res) |
24552 | POST_IO |
24553 | RET(12) |
24554 | } |
24555 | |
24556 | // SUBQ |
24557 | OPCODE(0x5160) |
24558 | { |
24559 | u32 adr, res; |
24560 | u32 src, dst; |
24561 | |
24562 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24563 | adr = AREG((Opcode >> 0) & 7) - 2; |
24564 | AREG((Opcode >> 0) & 7) = adr; |
24565 | PRE_IO |
24566 | READ_WORD_F(adr, dst) |
24567 | res = dst - src; |
24568 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24569 | flag_N = flag_X = flag_C = res >> 8; |
24570 | flag_NotZ = res & 0xFFFF; |
24571 | WRITE_WORD_F(adr, res) |
24572 | POST_IO |
24573 | RET(14) |
24574 | } |
24575 | |
24576 | // SUBQ |
24577 | OPCODE(0x5168) |
24578 | { |
24579 | u32 adr, res; |
24580 | u32 src, dst; |
24581 | |
24582 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24583 | FETCH_SWORD(adr); |
24584 | adr += AREG((Opcode >> 0) & 7); |
24585 | PRE_IO |
24586 | READ_WORD_F(adr, dst) |
24587 | res = dst - src; |
24588 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24589 | flag_N = flag_X = flag_C = res >> 8; |
24590 | flag_NotZ = res & 0xFFFF; |
24591 | WRITE_WORD_F(adr, res) |
24592 | POST_IO |
24593 | RET(16) |
24594 | } |
24595 | |
24596 | // SUBQ |
24597 | OPCODE(0x5170) |
24598 | { |
24599 | u32 adr, res; |
24600 | u32 src, dst; |
24601 | |
24602 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24603 | adr = AREG((Opcode >> 0) & 7); |
24604 | DECODE_EXT_WORD |
24605 | PRE_IO |
24606 | READ_WORD_F(adr, dst) |
24607 | res = dst - src; |
24608 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24609 | flag_N = flag_X = flag_C = res >> 8; |
24610 | flag_NotZ = res & 0xFFFF; |
24611 | WRITE_WORD_F(adr, res) |
24612 | POST_IO |
24613 | RET(18) |
24614 | } |
24615 | |
24616 | // SUBQ |
24617 | OPCODE(0x5178) |
24618 | { |
24619 | u32 adr, res; |
24620 | u32 src, dst; |
24621 | |
24622 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24623 | FETCH_SWORD(adr); |
24624 | PRE_IO |
24625 | READ_WORD_F(adr, dst) |
24626 | res = dst - src; |
24627 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24628 | flag_N = flag_X = flag_C = res >> 8; |
24629 | flag_NotZ = res & 0xFFFF; |
24630 | WRITE_WORD_F(adr, res) |
24631 | POST_IO |
24632 | RET(16) |
24633 | } |
24634 | |
24635 | // SUBQ |
24636 | OPCODE(0x5179) |
24637 | { |
24638 | u32 adr, res; |
24639 | u32 src, dst; |
24640 | |
24641 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24642 | FETCH_LONG(adr); |
24643 | PRE_IO |
24644 | READ_WORD_F(adr, dst) |
24645 | res = dst - src; |
24646 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24647 | flag_N = flag_X = flag_C = res >> 8; |
24648 | flag_NotZ = res & 0xFFFF; |
24649 | WRITE_WORD_F(adr, res) |
24650 | POST_IO |
24651 | RET(20) |
24652 | } |
24653 | |
24654 | // SUBQ |
24655 | OPCODE(0x515F) |
24656 | { |
24657 | u32 adr, res; |
24658 | u32 src, dst; |
24659 | |
24660 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24661 | adr = AREG(7); |
24662 | AREG(7) += 2; |
24663 | PRE_IO |
24664 | READ_WORD_F(adr, dst) |
24665 | res = dst - src; |
24666 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24667 | flag_N = flag_X = flag_C = res >> 8; |
24668 | flag_NotZ = res & 0xFFFF; |
24669 | WRITE_WORD_F(adr, res) |
24670 | POST_IO |
24671 | RET(12) |
24672 | } |
24673 | |
24674 | // SUBQ |
24675 | OPCODE(0x5167) |
24676 | { |
24677 | u32 adr, res; |
24678 | u32 src, dst; |
24679 | |
24680 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24681 | adr = AREG(7) - 2; |
24682 | AREG(7) = adr; |
24683 | PRE_IO |
24684 | READ_WORD_F(adr, dst) |
24685 | res = dst - src; |
24686 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24687 | flag_N = flag_X = flag_C = res >> 8; |
24688 | flag_NotZ = res & 0xFFFF; |
24689 | WRITE_WORD_F(adr, res) |
24690 | POST_IO |
24691 | RET(14) |
24692 | } |
24693 | |
24694 | // SUBQ |
24695 | OPCODE(0x5180) |
24696 | { |
24697 | u32 adr, res; |
24698 | u32 src, dst; |
24699 | |
24700 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24701 | dst = DREGu32((Opcode >> 0) & 7); |
24702 | res = dst - src; |
24703 | flag_NotZ = res; |
24704 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24705 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24706 | flag_N = res >> 24; |
24707 | DREGu32((Opcode >> 0) & 7) = res; |
24708 | RET(8) |
24709 | } |
24710 | |
24711 | // SUBQ |
24712 | OPCODE(0x5188) |
24713 | { |
24714 | u32 adr, res; |
24715 | u32 src, dst; |
24716 | |
24717 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24718 | dst = AREGu32((Opcode >> 0) & 7); |
24719 | res = dst - src; |
24720 | AREG((Opcode >> 0) & 7) = res; |
24721 | RET(8) |
24722 | } |
24723 | |
24724 | // SUBQ |
24725 | OPCODE(0x5190) |
24726 | { |
24727 | u32 adr, res; |
24728 | u32 src, dst; |
24729 | |
24730 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24731 | adr = AREG((Opcode >> 0) & 7); |
24732 | PRE_IO |
24733 | READ_LONG_F(adr, dst) |
24734 | res = dst - src; |
24735 | flag_NotZ = res; |
24736 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24737 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24738 | flag_N = res >> 24; |
24739 | WRITE_LONG_F(adr, res) |
24740 | POST_IO |
24741 | RET(20) |
24742 | } |
24743 | |
24744 | // SUBQ |
24745 | OPCODE(0x5198) |
24746 | { |
24747 | u32 adr, res; |
24748 | u32 src, dst; |
24749 | |
24750 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24751 | adr = AREG((Opcode >> 0) & 7); |
24752 | AREG((Opcode >> 0) & 7) += 4; |
24753 | PRE_IO |
24754 | READ_LONG_F(adr, dst) |
24755 | res = dst - src; |
24756 | flag_NotZ = res; |
24757 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24758 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24759 | flag_N = res >> 24; |
24760 | WRITE_LONG_F(adr, res) |
24761 | POST_IO |
24762 | RET(20) |
24763 | } |
24764 | |
24765 | // SUBQ |
24766 | OPCODE(0x51A0) |
24767 | { |
24768 | u32 adr, res; |
24769 | u32 src, dst; |
24770 | |
24771 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24772 | adr = AREG((Opcode >> 0) & 7) - 4; |
24773 | AREG((Opcode >> 0) & 7) = adr; |
24774 | PRE_IO |
24775 | READ_LONG_F(adr, dst) |
24776 | res = dst - src; |
24777 | flag_NotZ = res; |
24778 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24779 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24780 | flag_N = res >> 24; |
24781 | WRITE_LONG_F(adr, res) |
24782 | POST_IO |
24783 | RET(22) |
24784 | } |
24785 | |
24786 | // SUBQ |
24787 | OPCODE(0x51A8) |
24788 | { |
24789 | u32 adr, res; |
24790 | u32 src, dst; |
24791 | |
24792 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24793 | FETCH_SWORD(adr); |
24794 | adr += AREG((Opcode >> 0) & 7); |
24795 | PRE_IO |
24796 | READ_LONG_F(adr, dst) |
24797 | res = dst - src; |
24798 | flag_NotZ = res; |
24799 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24800 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24801 | flag_N = res >> 24; |
24802 | WRITE_LONG_F(adr, res) |
24803 | POST_IO |
24804 | RET(24) |
24805 | } |
24806 | |
24807 | // SUBQ |
24808 | OPCODE(0x51B0) |
24809 | { |
24810 | u32 adr, res; |
24811 | u32 src, dst; |
24812 | |
24813 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24814 | adr = AREG((Opcode >> 0) & 7); |
24815 | DECODE_EXT_WORD |
24816 | PRE_IO |
24817 | READ_LONG_F(adr, dst) |
24818 | res = dst - src; |
24819 | flag_NotZ = res; |
24820 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24821 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24822 | flag_N = res >> 24; |
24823 | WRITE_LONG_F(adr, res) |
24824 | POST_IO |
24825 | RET(26) |
24826 | } |
24827 | |
24828 | // SUBQ |
24829 | OPCODE(0x51B8) |
24830 | { |
24831 | u32 adr, res; |
24832 | u32 src, dst; |
24833 | |
24834 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24835 | FETCH_SWORD(adr); |
24836 | PRE_IO |
24837 | READ_LONG_F(adr, dst) |
24838 | res = dst - src; |
24839 | flag_NotZ = res; |
24840 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24841 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24842 | flag_N = res >> 24; |
24843 | WRITE_LONG_F(adr, res) |
24844 | POST_IO |
24845 | RET(24) |
24846 | } |
24847 | |
24848 | // SUBQ |
24849 | OPCODE(0x51B9) |
24850 | { |
24851 | u32 adr, res; |
24852 | u32 src, dst; |
24853 | |
24854 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24855 | FETCH_LONG(adr); |
24856 | PRE_IO |
24857 | READ_LONG_F(adr, dst) |
24858 | res = dst - src; |
24859 | flag_NotZ = res; |
24860 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24861 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24862 | flag_N = res >> 24; |
24863 | WRITE_LONG_F(adr, res) |
24864 | POST_IO |
24865 | RET(28) |
24866 | } |
24867 | |
24868 | // SUBQ |
24869 | OPCODE(0x519F) |
24870 | { |
24871 | u32 adr, res; |
24872 | u32 src, dst; |
24873 | |
24874 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24875 | adr = AREG(7); |
24876 | AREG(7) += 4; |
24877 | PRE_IO |
24878 | READ_LONG_F(adr, dst) |
24879 | res = dst - src; |
24880 | flag_NotZ = res; |
24881 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24882 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24883 | flag_N = res >> 24; |
24884 | WRITE_LONG_F(adr, res) |
24885 | POST_IO |
24886 | RET(20) |
24887 | } |
24888 | |
24889 | // SUBQ |
24890 | OPCODE(0x51A7) |
24891 | { |
24892 | u32 adr, res; |
24893 | u32 src, dst; |
24894 | |
24895 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24896 | adr = AREG(7) - 4; |
24897 | AREG(7) = adr; |
24898 | PRE_IO |
24899 | READ_LONG_F(adr, dst) |
24900 | res = dst - src; |
24901 | flag_NotZ = res; |
24902 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24903 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24904 | flag_N = res >> 24; |
24905 | WRITE_LONG_F(adr, res) |
24906 | POST_IO |
24907 | RET(22) |
24908 | } |
24909 | |
24910 | // BCC |
24911 | OPCODE(0x6201) |
24912 | { |
24913 | u32 adr, res; |
24914 | u32 src, dst; |
24915 | |
24916 | if (flag_NotZ && (!(flag_C & 0x100))) |
24917 | { |
24918 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24919 | m68kcontext.io_cycle_counter -= 2; |
24920 | } |
24921 | RET(8) |
24922 | } |
24923 | |
24924 | // BCC |
24925 | OPCODE(0x6301) |
24926 | { |
24927 | u32 adr, res; |
24928 | u32 src, dst; |
24929 | |
24930 | if ((!flag_NotZ) || (flag_C & 0x100)) |
24931 | { |
24932 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24933 | m68kcontext.io_cycle_counter -= 2; |
24934 | } |
24935 | RET(8) |
24936 | } |
24937 | |
24938 | // BCC |
24939 | OPCODE(0x6401) |
24940 | { |
24941 | u32 adr, res; |
24942 | u32 src, dst; |
24943 | |
24944 | if (!(flag_C & 0x100)) |
24945 | { |
24946 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24947 | m68kcontext.io_cycle_counter -= 2; |
24948 | } |
24949 | RET(8) |
24950 | } |
24951 | |
24952 | // BCC |
24953 | OPCODE(0x6501) |
24954 | { |
24955 | u32 adr, res; |
24956 | u32 src, dst; |
24957 | |
24958 | if (flag_C & 0x100) |
24959 | { |
24960 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24961 | m68kcontext.io_cycle_counter -= 2; |
24962 | } |
24963 | RET(8) |
24964 | } |
24965 | |
24966 | // BCC |
24967 | OPCODE(0x6601) |
24968 | { |
24969 | u32 adr, res; |
24970 | u32 src, dst; |
24971 | |
24972 | if (flag_NotZ) |
24973 | { |
24974 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24975 | m68kcontext.io_cycle_counter -= 2; |
24976 | } |
24977 | RET(8) |
24978 | } |
24979 | |
24980 | // BCC |
24981 | OPCODE(0x6701) |
24982 | { |
24983 | u32 adr, res; |
24984 | u32 src, dst; |
24985 | |
24986 | if (!flag_NotZ) |
24987 | { |
24988 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
24989 | m68kcontext.io_cycle_counter -= 2; |
24990 | } |
24991 | RET(8) |
24992 | } |
24993 | |
24994 | // BCC |
24995 | OPCODE(0x6801) |
24996 | { |
24997 | u32 adr, res; |
24998 | u32 src, dst; |
24999 | |
25000 | if (!(flag_V & 0x80)) |
25001 | { |
25002 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25003 | m68kcontext.io_cycle_counter -= 2; |
25004 | } |
25005 | RET(8) |
25006 | } |
25007 | |
25008 | // BCC |
25009 | OPCODE(0x6901) |
25010 | { |
25011 | u32 adr, res; |
25012 | u32 src, dst; |
25013 | |
25014 | if (flag_V & 0x80) |
25015 | { |
25016 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25017 | m68kcontext.io_cycle_counter -= 2; |
25018 | } |
25019 | RET(8) |
25020 | } |
25021 | |
25022 | // BCC |
25023 | OPCODE(0x6A01) |
25024 | { |
25025 | u32 adr, res; |
25026 | u32 src, dst; |
25027 | |
25028 | if (!(flag_N & 0x80)) |
25029 | { |
25030 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25031 | m68kcontext.io_cycle_counter -= 2; |
25032 | } |
25033 | RET(8) |
25034 | } |
25035 | |
25036 | // BCC |
25037 | OPCODE(0x6B01) |
25038 | { |
25039 | u32 adr, res; |
25040 | u32 src, dst; |
25041 | |
25042 | if (flag_N & 0x80) |
25043 | { |
25044 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25045 | m68kcontext.io_cycle_counter -= 2; |
25046 | } |
25047 | RET(8) |
25048 | } |
25049 | |
25050 | // BCC |
25051 | OPCODE(0x6C01) |
25052 | { |
25053 | u32 adr, res; |
25054 | u32 src, dst; |
25055 | |
25056 | if (!((flag_N ^ flag_V) & 0x80)) |
25057 | { |
25058 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25059 | m68kcontext.io_cycle_counter -= 2; |
25060 | } |
25061 | RET(8) |
25062 | } |
25063 | |
25064 | // BCC |
25065 | OPCODE(0x6D01) |
25066 | { |
25067 | u32 adr, res; |
25068 | u32 src, dst; |
25069 | |
25070 | if ((flag_N ^ flag_V) & 0x80) |
25071 | { |
25072 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25073 | m68kcontext.io_cycle_counter -= 2; |
25074 | } |
25075 | RET(8) |
25076 | } |
25077 | |
25078 | // BCC |
25079 | OPCODE(0x6E01) |
25080 | { |
25081 | u32 adr, res; |
25082 | u32 src, dst; |
25083 | |
25084 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25085 | { |
25086 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25087 | m68kcontext.io_cycle_counter -= 2; |
25088 | } |
25089 | RET(8) |
25090 | } |
25091 | |
25092 | // BCC |
25093 | OPCODE(0x6F01) |
25094 | { |
25095 | u32 adr, res; |
25096 | u32 src, dst; |
25097 | |
25098 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25099 | { |
25100 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25101 | m68kcontext.io_cycle_counter -= 2; |
25102 | } |
25103 | RET(8) |
25104 | } |
25105 | |
25106 | // BCC16 |
25107 | OPCODE(0x6200) |
25108 | { |
25109 | u32 adr, res; |
25110 | u32 src, dst; |
25111 | |
25112 | if (flag_NotZ && (!(flag_C & 0x100))) |
25113 | { |
25114 | u32 newPC; |
25115 | |
25116 | newPC = (u32)(PC) - BasePC; |
25117 | newPC += GET_SWORD; |
25118 | SET_PC(newPC); |
25119 | CHECK_BRANCH_EXCEPTION(newPC) |
25120 | RET(10) |
25121 | } |
25122 | PC++; |
25123 | RET(12) |
25124 | } |
25125 | |
25126 | // BCC16 |
25127 | OPCODE(0x6300) |
25128 | { |
25129 | u32 adr, res; |
25130 | u32 src, dst; |
25131 | |
25132 | if ((!flag_NotZ) || (flag_C & 0x100)) |
25133 | { |
25134 | u32 newPC; |
25135 | |
25136 | newPC = (u32)(PC) - BasePC; |
25137 | newPC += GET_SWORD; |
25138 | SET_PC(newPC); |
25139 | CHECK_BRANCH_EXCEPTION(newPC) |
25140 | RET(10) |
25141 | } |
25142 | PC++; |
25143 | RET(12) |
25144 | } |
25145 | |
25146 | // BCC16 |
25147 | OPCODE(0x6400) |
25148 | { |
25149 | u32 adr, res; |
25150 | u32 src, dst; |
25151 | |
25152 | if (!(flag_C & 0x100)) |
25153 | { |
25154 | u32 newPC; |
25155 | |
25156 | newPC = (u32)(PC) - BasePC; |
25157 | newPC += GET_SWORD; |
25158 | SET_PC(newPC); |
25159 | CHECK_BRANCH_EXCEPTION(newPC) |
25160 | RET(10) |
25161 | } |
25162 | PC++; |
25163 | RET(12) |
25164 | } |
25165 | |
25166 | // BCC16 |
25167 | OPCODE(0x6500) |
25168 | { |
25169 | u32 adr, res; |
25170 | u32 src, dst; |
25171 | |
25172 | if (flag_C & 0x100) |
25173 | { |
25174 | u32 newPC; |
25175 | |
25176 | newPC = (u32)(PC) - BasePC; |
25177 | newPC += GET_SWORD; |
25178 | SET_PC(newPC); |
25179 | CHECK_BRANCH_EXCEPTION(newPC) |
25180 | RET(10) |
25181 | } |
25182 | PC++; |
25183 | RET(12) |
25184 | } |
25185 | |
25186 | // BCC16 |
25187 | OPCODE(0x6600) |
25188 | { |
25189 | u32 adr, res; |
25190 | u32 src, dst; |
25191 | |
25192 | if (flag_NotZ) |
25193 | { |
25194 | u32 newPC; |
25195 | |
25196 | newPC = (u32)(PC) - BasePC; |
25197 | newPC += GET_SWORD; |
25198 | SET_PC(newPC); |
25199 | CHECK_BRANCH_EXCEPTION(newPC) |
25200 | RET(10) |
25201 | } |
25202 | PC++; |
25203 | RET(12) |
25204 | } |
25205 | |
25206 | // BCC16 |
25207 | OPCODE(0x6700) |
25208 | { |
25209 | u32 adr, res; |
25210 | u32 src, dst; |
25211 | |
25212 | if (!flag_NotZ) |
25213 | { |
25214 | u32 newPC; |
25215 | |
25216 | newPC = (u32)(PC) - BasePC; |
25217 | newPC += GET_SWORD; |
25218 | SET_PC(newPC); |
25219 | CHECK_BRANCH_EXCEPTION(newPC) |
25220 | RET(10) |
25221 | } |
25222 | PC++; |
25223 | RET(12) |
25224 | } |
25225 | |
25226 | // BCC16 |
25227 | OPCODE(0x6800) |
25228 | { |
25229 | u32 adr, res; |
25230 | u32 src, dst; |
25231 | |
25232 | if (!(flag_V & 0x80)) |
25233 | { |
25234 | u32 newPC; |
25235 | |
25236 | newPC = (u32)(PC) - BasePC; |
25237 | newPC += GET_SWORD; |
25238 | SET_PC(newPC); |
25239 | CHECK_BRANCH_EXCEPTION(newPC) |
25240 | RET(10) |
25241 | } |
25242 | PC++; |
25243 | RET(12) |
25244 | } |
25245 | |
25246 | // BCC16 |
25247 | OPCODE(0x6900) |
25248 | { |
25249 | u32 adr, res; |
25250 | u32 src, dst; |
25251 | |
25252 | if (flag_V & 0x80) |
25253 | { |
25254 | u32 newPC; |
25255 | |
25256 | newPC = (u32)(PC) - BasePC; |
25257 | newPC += GET_SWORD; |
25258 | SET_PC(newPC); |
25259 | CHECK_BRANCH_EXCEPTION(newPC) |
25260 | RET(10) |
25261 | } |
25262 | PC++; |
25263 | RET(12) |
25264 | } |
25265 | |
25266 | // BCC16 |
25267 | OPCODE(0x6A00) |
25268 | { |
25269 | u32 adr, res; |
25270 | u32 src, dst; |
25271 | |
25272 | if (!(flag_N & 0x80)) |
25273 | { |
25274 | u32 newPC; |
25275 | |
25276 | newPC = (u32)(PC) - BasePC; |
25277 | newPC += GET_SWORD; |
25278 | SET_PC(newPC); |
25279 | CHECK_BRANCH_EXCEPTION(newPC) |
25280 | RET(10) |
25281 | } |
25282 | PC++; |
25283 | RET(12) |
25284 | } |
25285 | |
25286 | // BCC16 |
25287 | OPCODE(0x6B00) |
25288 | { |
25289 | u32 adr, res; |
25290 | u32 src, dst; |
25291 | |
25292 | if (flag_N & 0x80) |
25293 | { |
25294 | u32 newPC; |
25295 | |
25296 | newPC = (u32)(PC) - BasePC; |
25297 | newPC += GET_SWORD; |
25298 | SET_PC(newPC); |
25299 | CHECK_BRANCH_EXCEPTION(newPC) |
25300 | RET(10) |
25301 | } |
25302 | PC++; |
25303 | RET(12) |
25304 | } |
25305 | |
25306 | // BCC16 |
25307 | OPCODE(0x6C00) |
25308 | { |
25309 | u32 adr, res; |
25310 | u32 src, dst; |
25311 | |
25312 | if (!((flag_N ^ flag_V) & 0x80)) |
25313 | { |
25314 | u32 newPC; |
25315 | |
25316 | newPC = (u32)(PC) - BasePC; |
25317 | newPC += GET_SWORD; |
25318 | SET_PC(newPC); |
25319 | CHECK_BRANCH_EXCEPTION(newPC) |
25320 | RET(10) |
25321 | } |
25322 | PC++; |
25323 | RET(12) |
25324 | } |
25325 | |
25326 | // BCC16 |
25327 | OPCODE(0x6D00) |
25328 | { |
25329 | u32 adr, res; |
25330 | u32 src, dst; |
25331 | |
25332 | if ((flag_N ^ flag_V) & 0x80) |
25333 | { |
25334 | u32 newPC; |
25335 | |
25336 | newPC = (u32)(PC) - BasePC; |
25337 | newPC += GET_SWORD; |
25338 | SET_PC(newPC); |
25339 | CHECK_BRANCH_EXCEPTION(newPC) |
25340 | RET(10) |
25341 | } |
25342 | PC++; |
25343 | RET(12) |
25344 | } |
25345 | |
25346 | // BCC16 |
25347 | OPCODE(0x6E00) |
25348 | { |
25349 | u32 adr, res; |
25350 | u32 src, dst; |
25351 | |
25352 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25353 | { |
25354 | u32 newPC; |
25355 | |
25356 | newPC = (u32)(PC) - BasePC; |
25357 | newPC += GET_SWORD; |
25358 | SET_PC(newPC); |
25359 | CHECK_BRANCH_EXCEPTION(newPC) |
25360 | RET(10) |
25361 | } |
25362 | PC++; |
25363 | RET(12) |
25364 | } |
25365 | |
25366 | // BCC16 |
25367 | OPCODE(0x6F00) |
25368 | { |
25369 | u32 adr, res; |
25370 | u32 src, dst; |
25371 | |
25372 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25373 | { |
25374 | u32 newPC; |
25375 | |
25376 | newPC = (u32)(PC) - BasePC; |
25377 | newPC += GET_SWORD; |
25378 | SET_PC(newPC); |
25379 | CHECK_BRANCH_EXCEPTION(newPC) |
25380 | RET(10) |
25381 | } |
25382 | PC++; |
25383 | RET(12) |
25384 | } |
25385 | |
25386 | // BRA |
25387 | OPCODE(0x6001) |
25388 | { |
25389 | #ifdef FAMEC_CHECK_BRANCHES |
25390 | u32 newPC = (u32)(PC) - BasePC; |
25391 | s8 offs=Opcode; |
25392 | newPC += offs; |
25393 | SET_PC(newPC); |
25394 | CHECK_BRANCH_EXCEPTION(offs) |
25395 | #else |
25396 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25397 | #endif |
25398 | RET(10) |
25399 | } |
25400 | |
25401 | // BRA16 |
25402 | OPCODE(0x6000) |
25403 | { |
25404 | u32 adr, res; |
25405 | u32 src, dst; |
25406 | |
25407 | { |
25408 | u32 newPC; |
25409 | |
25410 | newPC = (u32)(PC) - BasePC; |
25411 | newPC += GET_SWORD; |
25412 | SET_PC(newPC); |
25413 | CHECK_BRANCH_EXCEPTION(newPC) |
25414 | } |
25415 | RET(10) |
25416 | } |
25417 | |
25418 | // BSR |
25419 | OPCODE(0x6101) |
25420 | { |
25421 | u32 adr, res; |
25422 | u32 src, dst; |
25423 | u32 oldPC; |
25424 | s8 offs; |
25425 | |
25426 | PRE_IO |
25427 | |
25428 | oldPC = (u32)(PC) - BasePC; |
25429 | PUSH_32_F(oldPC) |
25430 | #ifdef FAMEC_CHECK_BRANCHES |
25431 | offs = Opcode; |
25432 | oldPC += offs; |
25433 | SET_PC(oldPC); |
25434 | CHECK_BRANCH_EXCEPTION(offs) |
25435 | #else |
25436 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25437 | #endif |
25438 | POST_IO |
25439 | RET(18) |
25440 | } |
25441 | |
25442 | // BSR16 |
25443 | OPCODE(0x6100) |
25444 | { |
25445 | u32 adr, res; |
25446 | u32 src, dst; |
25447 | |
25448 | PRE_IO |
25449 | { |
25450 | u32 oldPC, newPC; |
25451 | |
25452 | newPC = (u32)(PC) - BasePC; |
25453 | oldPC = newPC + 2; |
25454 | PUSH_32_F(oldPC) |
25455 | newPC += GET_SWORD; |
25456 | SET_PC(newPC); |
25457 | CHECK_BRANCH_EXCEPTION(newPC) |
25458 | } |
25459 | POST_IO |
25460 | RET(18) |
25461 | } |
25462 | |
25463 | // MOVEQ |
25464 | OPCODE(0x7000) |
25465 | { |
25466 | u32 adr, res; |
25467 | u32 src, dst; |
25468 | |
25469 | res = (s32)(s8)Opcode; |
25470 | flag_C = flag_V = 0; |
25471 | flag_N = flag_NotZ = res; |
25472 | DREGu32((Opcode >> 9) & 7) = res; |
25473 | RET(4) |
25474 | } |
25475 | |
25476 | // ORaD |
25477 | OPCODE(0x8000) |
25478 | { |
25479 | u32 adr, res; |
25480 | u32 src, dst; |
25481 | |
25482 | src = DREGu8((Opcode >> 0) & 7); |
25483 | res = DREGu8((Opcode >> 9) & 7); |
25484 | res |= src; |
25485 | flag_C = 0; |
25486 | flag_V = 0; |
25487 | flag_NotZ = res; |
25488 | flag_N = res; |
25489 | DREGu8((Opcode >> 9) & 7) = res; |
25490 | RET(4) |
25491 | } |
25492 | |
25493 | // ORaD |
25494 | OPCODE(0x8010) |
25495 | { |
25496 | u32 adr, res; |
25497 | u32 src, dst; |
25498 | |
25499 | adr = AREG((Opcode >> 0) & 7); |
25500 | PRE_IO |
25501 | READ_BYTE_F(adr, src) |
25502 | res = DREGu8((Opcode >> 9) & 7); |
25503 | res |= src; |
25504 | flag_C = 0; |
25505 | flag_V = 0; |
25506 | flag_NotZ = res; |
25507 | flag_N = res; |
25508 | DREGu8((Opcode >> 9) & 7) = res; |
25509 | POST_IO |
25510 | RET(8) |
25511 | } |
25512 | |
25513 | // ORaD |
25514 | OPCODE(0x8018) |
25515 | { |
25516 | u32 adr, res; |
25517 | u32 src, dst; |
25518 | |
25519 | adr = AREG((Opcode >> 0) & 7); |
25520 | AREG((Opcode >> 0) & 7) += 1; |
25521 | PRE_IO |
25522 | READ_BYTE_F(adr, src) |
25523 | res = DREGu8((Opcode >> 9) & 7); |
25524 | res |= src; |
25525 | flag_C = 0; |
25526 | flag_V = 0; |
25527 | flag_NotZ = res; |
25528 | flag_N = res; |
25529 | DREGu8((Opcode >> 9) & 7) = res; |
25530 | POST_IO |
25531 | RET(8) |
25532 | } |
25533 | |
25534 | // ORaD |
25535 | OPCODE(0x8020) |
25536 | { |
25537 | u32 adr, res; |
25538 | u32 src, dst; |
25539 | |
25540 | adr = AREG((Opcode >> 0) & 7) - 1; |
25541 | AREG((Opcode >> 0) & 7) = adr; |
25542 | PRE_IO |
25543 | READ_BYTE_F(adr, src) |
25544 | res = DREGu8((Opcode >> 9) & 7); |
25545 | res |= src; |
25546 | flag_C = 0; |
25547 | flag_V = 0; |
25548 | flag_NotZ = res; |
25549 | flag_N = res; |
25550 | DREGu8((Opcode >> 9) & 7) = res; |
25551 | POST_IO |
25552 | RET(10) |
25553 | } |
25554 | |
25555 | // ORaD |
25556 | OPCODE(0x8028) |
25557 | { |
25558 | u32 adr, res; |
25559 | u32 src, dst; |
25560 | |
25561 | FETCH_SWORD(adr); |
25562 | adr += AREG((Opcode >> 0) & 7); |
25563 | PRE_IO |
25564 | READ_BYTE_F(adr, src) |
25565 | res = DREGu8((Opcode >> 9) & 7); |
25566 | res |= src; |
25567 | flag_C = 0; |
25568 | flag_V = 0; |
25569 | flag_NotZ = res; |
25570 | flag_N = res; |
25571 | DREGu8((Opcode >> 9) & 7) = res; |
25572 | POST_IO |
25573 | RET(12) |
25574 | } |
25575 | |
25576 | // ORaD |
25577 | OPCODE(0x8030) |
25578 | { |
25579 | u32 adr, res; |
25580 | u32 src, dst; |
25581 | |
25582 | adr = AREG((Opcode >> 0) & 7); |
25583 | DECODE_EXT_WORD |
25584 | PRE_IO |
25585 | READ_BYTE_F(adr, src) |
25586 | res = DREGu8((Opcode >> 9) & 7); |
25587 | res |= src; |
25588 | flag_C = 0; |
25589 | flag_V = 0; |
25590 | flag_NotZ = res; |
25591 | flag_N = res; |
25592 | DREGu8((Opcode >> 9) & 7) = res; |
25593 | POST_IO |
25594 | RET(14) |
25595 | } |
25596 | |
25597 | // ORaD |
25598 | OPCODE(0x8038) |
25599 | { |
25600 | u32 adr, res; |
25601 | u32 src, dst; |
25602 | |
25603 | FETCH_SWORD(adr); |
25604 | PRE_IO |
25605 | READ_BYTE_F(adr, src) |
25606 | res = DREGu8((Opcode >> 9) & 7); |
25607 | res |= src; |
25608 | flag_C = 0; |
25609 | flag_V = 0; |
25610 | flag_NotZ = res; |
25611 | flag_N = res; |
25612 | DREGu8((Opcode >> 9) & 7) = res; |
25613 | POST_IO |
25614 | RET(12) |
25615 | } |
25616 | |
25617 | // ORaD |
25618 | OPCODE(0x8039) |
25619 | { |
25620 | u32 adr, res; |
25621 | u32 src, dst; |
25622 | |
25623 | FETCH_LONG(adr); |
25624 | PRE_IO |
25625 | READ_BYTE_F(adr, src) |
25626 | res = DREGu8((Opcode >> 9) & 7); |
25627 | res |= src; |
25628 | flag_C = 0; |
25629 | flag_V = 0; |
25630 | flag_NotZ = res; |
25631 | flag_N = res; |
25632 | DREGu8((Opcode >> 9) & 7) = res; |
25633 | POST_IO |
25634 | RET(16) |
25635 | } |
25636 | |
25637 | // ORaD |
25638 | OPCODE(0x803A) |
25639 | { |
25640 | u32 adr, res; |
25641 | u32 src, dst; |
25642 | |
25643 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
25644 | PC++; |
25645 | PRE_IO |
25646 | READ_BYTE_F(adr, src) |
25647 | res = DREGu8((Opcode >> 9) & 7); |
25648 | res |= src; |
25649 | flag_C = 0; |
25650 | flag_V = 0; |
25651 | flag_NotZ = res; |
25652 | flag_N = res; |
25653 | DREGu8((Opcode >> 9) & 7) = res; |
25654 | POST_IO |
25655 | RET(12) |
25656 | } |
25657 | |
25658 | // ORaD |
25659 | OPCODE(0x803B) |
25660 | { |
25661 | u32 adr, res; |
25662 | u32 src, dst; |
25663 | |
25664 | adr = (u32)(PC) - BasePC; |
25665 | DECODE_EXT_WORD |
25666 | PRE_IO |
25667 | READ_BYTE_F(adr, src) |
25668 | res = DREGu8((Opcode >> 9) & 7); |
25669 | res |= src; |
25670 | flag_C = 0; |
25671 | flag_V = 0; |
25672 | flag_NotZ = res; |
25673 | flag_N = res; |
25674 | DREGu8((Opcode >> 9) & 7) = res; |
25675 | POST_IO |
25676 | RET(14) |
25677 | } |
25678 | |
25679 | // ORaD |
25680 | OPCODE(0x803C) |
25681 | { |
25682 | u32 adr, res; |
25683 | u32 src, dst; |
25684 | |
25685 | FETCH_BYTE(src); |
25686 | res = DREGu8((Opcode >> 9) & 7); |
25687 | res |= src; |
25688 | flag_C = 0; |
25689 | flag_V = 0; |
25690 | flag_NotZ = res; |
25691 | flag_N = res; |
25692 | DREGu8((Opcode >> 9) & 7) = res; |
25693 | RET(8) |
25694 | } |
25695 | |
25696 | // ORaD |
25697 | OPCODE(0x801F) |
25698 | { |
25699 | u32 adr, res; |
25700 | u32 src, dst; |
25701 | |
25702 | adr = AREG(7); |
25703 | AREG(7) += 2; |
25704 | PRE_IO |
25705 | READ_BYTE_F(adr, src) |
25706 | res = DREGu8((Opcode >> 9) & 7); |
25707 | res |= src; |
25708 | flag_C = 0; |
25709 | flag_V = 0; |
25710 | flag_NotZ = res; |
25711 | flag_N = res; |
25712 | DREGu8((Opcode >> 9) & 7) = res; |
25713 | POST_IO |
25714 | RET(8) |
25715 | } |
25716 | |
25717 | // ORaD |
25718 | OPCODE(0x8027) |
25719 | { |
25720 | u32 adr, res; |
25721 | u32 src, dst; |
25722 | |
25723 | adr = AREG(7) - 2; |
25724 | AREG(7) = adr; |
25725 | PRE_IO |
25726 | READ_BYTE_F(adr, src) |
25727 | res = DREGu8((Opcode >> 9) & 7); |
25728 | res |= src; |
25729 | flag_C = 0; |
25730 | flag_V = 0; |
25731 | flag_NotZ = res; |
25732 | flag_N = res; |
25733 | DREGu8((Opcode >> 9) & 7) = res; |
25734 | POST_IO |
25735 | RET(10) |
25736 | } |
25737 | |
25738 | // ORaD |
25739 | OPCODE(0x8040) |
25740 | { |
25741 | u32 adr, res; |
25742 | u32 src, dst; |
25743 | |
25744 | src = DREGu16((Opcode >> 0) & 7); |
25745 | res = DREGu16((Opcode >> 9) & 7); |
25746 | res |= src; |
25747 | flag_C = 0; |
25748 | flag_V = 0; |
25749 | flag_NotZ = res; |
25750 | flag_N = res >> 8; |
25751 | DREGu16((Opcode >> 9) & 7) = res; |
25752 | RET(4) |
25753 | } |
25754 | |
25755 | // ORaD |
25756 | OPCODE(0x8050) |
25757 | { |
25758 | u32 adr, res; |
25759 | u32 src, dst; |
25760 | |
25761 | adr = AREG((Opcode >> 0) & 7); |
25762 | PRE_IO |
25763 | READ_WORD_F(adr, src) |
25764 | res = DREGu16((Opcode >> 9) & 7); |
25765 | res |= src; |
25766 | flag_C = 0; |
25767 | flag_V = 0; |
25768 | flag_NotZ = res; |
25769 | flag_N = res >> 8; |
25770 | DREGu16((Opcode >> 9) & 7) = res; |
25771 | POST_IO |
25772 | RET(8) |
25773 | } |
25774 | |
25775 | // ORaD |
25776 | OPCODE(0x8058) |
25777 | { |
25778 | u32 adr, res; |
25779 | u32 src, dst; |
25780 | |
25781 | adr = AREG((Opcode >> 0) & 7); |
25782 | AREG((Opcode >> 0) & 7) += 2; |
25783 | PRE_IO |
25784 | READ_WORD_F(adr, src) |
25785 | res = DREGu16((Opcode >> 9) & 7); |
25786 | res |= src; |
25787 | flag_C = 0; |
25788 | flag_V = 0; |
25789 | flag_NotZ = res; |
25790 | flag_N = res >> 8; |
25791 | DREGu16((Opcode >> 9) & 7) = res; |
25792 | POST_IO |
25793 | RET(8) |
25794 | } |
25795 | |
25796 | // ORaD |
25797 | OPCODE(0x8060) |
25798 | { |
25799 | u32 adr, res; |
25800 | u32 src, dst; |
25801 | |
25802 | adr = AREG((Opcode >> 0) & 7) - 2; |
25803 | AREG((Opcode >> 0) & 7) = adr; |
25804 | PRE_IO |
25805 | READ_WORD_F(adr, src) |
25806 | res = DREGu16((Opcode >> 9) & 7); |
25807 | res |= src; |
25808 | flag_C = 0; |
25809 | flag_V = 0; |
25810 | flag_NotZ = res; |
25811 | flag_N = res >> 8; |
25812 | DREGu16((Opcode >> 9) & 7) = res; |
25813 | POST_IO |
25814 | RET(10) |
25815 | } |
25816 | |
25817 | // ORaD |
25818 | OPCODE(0x8068) |
25819 | { |
25820 | u32 adr, res; |
25821 | u32 src, dst; |
25822 | |
25823 | FETCH_SWORD(adr); |
25824 | adr += AREG((Opcode >> 0) & 7); |
25825 | PRE_IO |
25826 | READ_WORD_F(adr, src) |
25827 | res = DREGu16((Opcode >> 9) & 7); |
25828 | res |= src; |
25829 | flag_C = 0; |
25830 | flag_V = 0; |
25831 | flag_NotZ = res; |
25832 | flag_N = res >> 8; |
25833 | DREGu16((Opcode >> 9) & 7) = res; |
25834 | POST_IO |
25835 | RET(12) |
25836 | } |
25837 | |
25838 | // ORaD |
25839 | OPCODE(0x8070) |
25840 | { |
25841 | u32 adr, res; |
25842 | u32 src, dst; |
25843 | |
25844 | adr = AREG((Opcode >> 0) & 7); |
25845 | DECODE_EXT_WORD |
25846 | PRE_IO |
25847 | READ_WORD_F(adr, src) |
25848 | res = DREGu16((Opcode >> 9) & 7); |
25849 | res |= src; |
25850 | flag_C = 0; |
25851 | flag_V = 0; |
25852 | flag_NotZ = res; |
25853 | flag_N = res >> 8; |
25854 | DREGu16((Opcode >> 9) & 7) = res; |
25855 | POST_IO |
25856 | RET(14) |
25857 | } |
25858 | |
25859 | // ORaD |
25860 | OPCODE(0x8078) |
25861 | { |
25862 | u32 adr, res; |
25863 | u32 src, dst; |
25864 | |
25865 | FETCH_SWORD(adr); |
25866 | PRE_IO |
25867 | READ_WORD_F(adr, src) |
25868 | res = DREGu16((Opcode >> 9) & 7); |
25869 | res |= src; |
25870 | flag_C = 0; |
25871 | flag_V = 0; |
25872 | flag_NotZ = res; |
25873 | flag_N = res >> 8; |
25874 | DREGu16((Opcode >> 9) & 7) = res; |
25875 | POST_IO |
25876 | RET(12) |
25877 | } |
25878 | |
25879 | // ORaD |
25880 | OPCODE(0x8079) |
25881 | { |
25882 | u32 adr, res; |
25883 | u32 src, dst; |
25884 | |
25885 | FETCH_LONG(adr); |
25886 | PRE_IO |
25887 | READ_WORD_F(adr, src) |
25888 | res = DREGu16((Opcode >> 9) & 7); |
25889 | res |= src; |
25890 | flag_C = 0; |
25891 | flag_V = 0; |
25892 | flag_NotZ = res; |
25893 | flag_N = res >> 8; |
25894 | DREGu16((Opcode >> 9) & 7) = res; |
25895 | POST_IO |
25896 | RET(16) |
25897 | } |
25898 | |
25899 | // ORaD |
25900 | OPCODE(0x807A) |
25901 | { |
25902 | u32 adr, res; |
25903 | u32 src, dst; |
25904 | |
25905 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
25906 | PC++; |
25907 | PRE_IO |
25908 | READ_WORD_F(adr, src) |
25909 | res = DREGu16((Opcode >> 9) & 7); |
25910 | res |= src; |
25911 | flag_C = 0; |
25912 | flag_V = 0; |
25913 | flag_NotZ = res; |
25914 | flag_N = res >> 8; |
25915 | DREGu16((Opcode >> 9) & 7) = res; |
25916 | POST_IO |
25917 | RET(12) |
25918 | } |
25919 | |
25920 | // ORaD |
25921 | OPCODE(0x807B) |
25922 | { |
25923 | u32 adr, res; |
25924 | u32 src, dst; |
25925 | |
25926 | adr = (u32)(PC) - BasePC; |
25927 | DECODE_EXT_WORD |
25928 | PRE_IO |
25929 | READ_WORD_F(adr, src) |
25930 | res = DREGu16((Opcode >> 9) & 7); |
25931 | res |= src; |
25932 | flag_C = 0; |
25933 | flag_V = 0; |
25934 | flag_NotZ = res; |
25935 | flag_N = res >> 8; |
25936 | DREGu16((Opcode >> 9) & 7) = res; |
25937 | POST_IO |
25938 | RET(14) |
25939 | } |
25940 | |
25941 | // ORaD |
25942 | OPCODE(0x807C) |
25943 | { |
25944 | u32 adr, res; |
25945 | u32 src, dst; |
25946 | |
25947 | FETCH_WORD(src); |
25948 | res = DREGu16((Opcode >> 9) & 7); |
25949 | res |= src; |
25950 | flag_C = 0; |
25951 | flag_V = 0; |
25952 | flag_NotZ = res; |
25953 | flag_N = res >> 8; |
25954 | DREGu16((Opcode >> 9) & 7) = res; |
25955 | RET(8) |
25956 | } |
25957 | |
25958 | // ORaD |
25959 | OPCODE(0x805F) |
25960 | { |
25961 | u32 adr, res; |
25962 | u32 src, dst; |
25963 | |
25964 | adr = AREG(7); |
25965 | AREG(7) += 2; |
25966 | PRE_IO |
25967 | READ_WORD_F(adr, src) |
25968 | res = DREGu16((Opcode >> 9) & 7); |
25969 | res |= src; |
25970 | flag_C = 0; |
25971 | flag_V = 0; |
25972 | flag_NotZ = res; |
25973 | flag_N = res >> 8; |
25974 | DREGu16((Opcode >> 9) & 7) = res; |
25975 | POST_IO |
25976 | RET(8) |
25977 | } |
25978 | |
25979 | // ORaD |
25980 | OPCODE(0x8067) |
25981 | { |
25982 | u32 adr, res; |
25983 | u32 src, dst; |
25984 | |
25985 | adr = AREG(7) - 2; |
25986 | AREG(7) = adr; |
25987 | PRE_IO |
25988 | READ_WORD_F(adr, src) |
25989 | res = DREGu16((Opcode >> 9) & 7); |
25990 | res |= src; |
25991 | flag_C = 0; |
25992 | flag_V = 0; |
25993 | flag_NotZ = res; |
25994 | flag_N = res >> 8; |
25995 | DREGu16((Opcode >> 9) & 7) = res; |
25996 | POST_IO |
25997 | RET(10) |
25998 | } |
25999 | |
26000 | // ORaD |
26001 | OPCODE(0x8080) |
26002 | { |
26003 | u32 adr, res; |
26004 | u32 src, dst; |
26005 | |
26006 | src = DREGu32((Opcode >> 0) & 7); |
26007 | res = DREGu32((Opcode >> 9) & 7); |
26008 | res |= src; |
26009 | flag_C = 0; |
26010 | flag_V = 0; |
26011 | flag_NotZ = res; |
26012 | flag_N = res >> 24; |
26013 | DREGu32((Opcode >> 9) & 7) = res; |
26014 | RET(8) |
26015 | } |
26016 | |
26017 | // ORaD |
26018 | OPCODE(0x8090) |
26019 | { |
26020 | u32 adr, res; |
26021 | u32 src, dst; |
26022 | |
26023 | adr = AREG((Opcode >> 0) & 7); |
26024 | PRE_IO |
26025 | READ_LONG_F(adr, src) |
26026 | res = DREGu32((Opcode >> 9) & 7); |
26027 | res |= src; |
26028 | flag_C = 0; |
26029 | flag_V = 0; |
26030 | flag_NotZ = res; |
26031 | flag_N = res >> 24; |
26032 | DREGu32((Opcode >> 9) & 7) = res; |
26033 | POST_IO |
26034 | RET(14) |
26035 | } |
26036 | |
26037 | // ORaD |
26038 | OPCODE(0x8098) |
26039 | { |
26040 | u32 adr, res; |
26041 | u32 src, dst; |
26042 | |
26043 | adr = AREG((Opcode >> 0) & 7); |
26044 | AREG((Opcode >> 0) & 7) += 4; |
26045 | PRE_IO |
26046 | READ_LONG_F(adr, src) |
26047 | res = DREGu32((Opcode >> 9) & 7); |
26048 | res |= src; |
26049 | flag_C = 0; |
26050 | flag_V = 0; |
26051 | flag_NotZ = res; |
26052 | flag_N = res >> 24; |
26053 | DREGu32((Opcode >> 9) & 7) = res; |
26054 | POST_IO |
26055 | RET(14) |
26056 | } |
26057 | |
26058 | // ORaD |
26059 | OPCODE(0x80A0) |
26060 | { |
26061 | u32 adr, res; |
26062 | u32 src, dst; |
26063 | |
26064 | adr = AREG((Opcode >> 0) & 7) - 4; |
26065 | AREG((Opcode >> 0) & 7) = adr; |
26066 | PRE_IO |
26067 | READ_LONG_F(adr, src) |
26068 | res = DREGu32((Opcode >> 9) & 7); |
26069 | res |= src; |
26070 | flag_C = 0; |
26071 | flag_V = 0; |
26072 | flag_NotZ = res; |
26073 | flag_N = res >> 24; |
26074 | DREGu32((Opcode >> 9) & 7) = res; |
26075 | POST_IO |
26076 | RET(16) |
26077 | } |
26078 | |
26079 | // ORaD |
26080 | OPCODE(0x80A8) |
26081 | { |
26082 | u32 adr, res; |
26083 | u32 src, dst; |
26084 | |
26085 | FETCH_SWORD(adr); |
26086 | adr += AREG((Opcode >> 0) & 7); |
26087 | PRE_IO |
26088 | READ_LONG_F(adr, src) |
26089 | res = DREGu32((Opcode >> 9) & 7); |
26090 | res |= src; |
26091 | flag_C = 0; |
26092 | flag_V = 0; |
26093 | flag_NotZ = res; |
26094 | flag_N = res >> 24; |
26095 | DREGu32((Opcode >> 9) & 7) = res; |
26096 | POST_IO |
26097 | RET(18) |
26098 | } |
26099 | |
26100 | // ORaD |
26101 | OPCODE(0x80B0) |
26102 | { |
26103 | u32 adr, res; |
26104 | u32 src, dst; |
26105 | |
26106 | adr = AREG((Opcode >> 0) & 7); |
26107 | DECODE_EXT_WORD |
26108 | PRE_IO |
26109 | READ_LONG_F(adr, src) |
26110 | res = DREGu32((Opcode >> 9) & 7); |
26111 | res |= src; |
26112 | flag_C = 0; |
26113 | flag_V = 0; |
26114 | flag_NotZ = res; |
26115 | flag_N = res >> 24; |
26116 | DREGu32((Opcode >> 9) & 7) = res; |
26117 | POST_IO |
26118 | RET(20) |
26119 | } |
26120 | |
26121 | // ORaD |
26122 | OPCODE(0x80B8) |
26123 | { |
26124 | u32 adr, res; |
26125 | u32 src, dst; |
26126 | |
26127 | FETCH_SWORD(adr); |
26128 | PRE_IO |
26129 | READ_LONG_F(adr, src) |
26130 | res = DREGu32((Opcode >> 9) & 7); |
26131 | res |= src; |
26132 | flag_C = 0; |
26133 | flag_V = 0; |
26134 | flag_NotZ = res; |
26135 | flag_N = res >> 24; |
26136 | DREGu32((Opcode >> 9) & 7) = res; |
26137 | POST_IO |
26138 | RET(18) |
26139 | } |
26140 | |
26141 | // ORaD |
26142 | OPCODE(0x80B9) |
26143 | { |
26144 | u32 adr, res; |
26145 | u32 src, dst; |
26146 | |
26147 | FETCH_LONG(adr); |
26148 | PRE_IO |
26149 | READ_LONG_F(adr, src) |
26150 | res = DREGu32((Opcode >> 9) & 7); |
26151 | res |= src; |
26152 | flag_C = 0; |
26153 | flag_V = 0; |
26154 | flag_NotZ = res; |
26155 | flag_N = res >> 24; |
26156 | DREGu32((Opcode >> 9) & 7) = res; |
26157 | POST_IO |
26158 | RET(22) |
26159 | } |
26160 | |
26161 | // ORaD |
26162 | OPCODE(0x80BA) |
26163 | { |
26164 | u32 adr, res; |
26165 | u32 src, dst; |
26166 | |
26167 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
26168 | PC++; |
26169 | PRE_IO |
26170 | READ_LONG_F(adr, src) |
26171 | res = DREGu32((Opcode >> 9) & 7); |
26172 | res |= src; |
26173 | flag_C = 0; |
26174 | flag_V = 0; |
26175 | flag_NotZ = res; |
26176 | flag_N = res >> 24; |
26177 | DREGu32((Opcode >> 9) & 7) = res; |
26178 | POST_IO |
26179 | RET(18) |
26180 | } |
26181 | |
26182 | // ORaD |
26183 | OPCODE(0x80BB) |
26184 | { |
26185 | u32 adr, res; |
26186 | u32 src, dst; |
26187 | |
26188 | adr = (u32)(PC) - BasePC; |
26189 | DECODE_EXT_WORD |
26190 | PRE_IO |
26191 | READ_LONG_F(adr, src) |
26192 | res = DREGu32((Opcode >> 9) & 7); |
26193 | res |= src; |
26194 | flag_C = 0; |
26195 | flag_V = 0; |
26196 | flag_NotZ = res; |
26197 | flag_N = res >> 24; |
26198 | DREGu32((Opcode >> 9) & 7) = res; |
26199 | POST_IO |
26200 | RET(20) |
26201 | } |
26202 | |
26203 | // ORaD |
26204 | OPCODE(0x80BC) |
26205 | { |
26206 | u32 adr, res; |
26207 | u32 src, dst; |
26208 | |
26209 | FETCH_LONG(src); |
26210 | res = DREGu32((Opcode >> 9) & 7); |
26211 | res |= src; |
26212 | flag_C = 0; |
26213 | flag_V = 0; |
26214 | flag_NotZ = res; |
26215 | flag_N = res >> 24; |
26216 | DREGu32((Opcode >> 9) & 7) = res; |
26217 | RET(16) |
26218 | } |
26219 | |
26220 | // ORaD |
26221 | OPCODE(0x809F) |
26222 | { |
26223 | u32 adr, res; |
26224 | u32 src, dst; |
26225 | |
26226 | adr = AREG(7); |
26227 | AREG(7) += 4; |
26228 | PRE_IO |
26229 | READ_LONG_F(adr, src) |
26230 | res = DREGu32((Opcode >> 9) & 7); |
26231 | res |= src; |
26232 | flag_C = 0; |
26233 | flag_V = 0; |
26234 | flag_NotZ = res; |
26235 | flag_N = res >> 24; |
26236 | DREGu32((Opcode >> 9) & 7) = res; |
26237 | POST_IO |
26238 | RET(14) |
26239 | } |
26240 | |
26241 | // ORaD |
26242 | OPCODE(0x80A7) |
26243 | { |
26244 | u32 adr, res; |
26245 | u32 src, dst; |
26246 | |
26247 | adr = AREG(7) - 4; |
26248 | AREG(7) = adr; |
26249 | PRE_IO |
26250 | READ_LONG_F(adr, src) |
26251 | res = DREGu32((Opcode >> 9) & 7); |
26252 | res |= src; |
26253 | flag_C = 0; |
26254 | flag_V = 0; |
26255 | flag_NotZ = res; |
26256 | flag_N = res >> 24; |
26257 | DREGu32((Opcode >> 9) & 7) = res; |
26258 | POST_IO |
26259 | RET(16) |
26260 | } |
26261 | |
26262 | // ORDa |
26263 | OPCODE(0x8110) |
26264 | { |
26265 | u32 adr, res; |
26266 | u32 src, dst; |
26267 | |
26268 | src = DREGu8((Opcode >> 9) & 7); |
26269 | adr = AREG((Opcode >> 0) & 7); |
26270 | PRE_IO |
26271 | READ_BYTE_F(adr, res) |
26272 | res |= src; |
26273 | flag_C = 0; |
26274 | flag_V = 0; |
26275 | flag_NotZ = res; |
26276 | flag_N = res; |
26277 | WRITE_BYTE_F(adr, res) |
26278 | POST_IO |
26279 | RET(12) |
26280 | } |
26281 | |
26282 | // ORDa |
26283 | OPCODE(0x8118) |
26284 | { |
26285 | u32 adr, res; |
26286 | u32 src, dst; |
26287 | |
26288 | src = DREGu8((Opcode >> 9) & 7); |
26289 | adr = AREG((Opcode >> 0) & 7); |
26290 | AREG((Opcode >> 0) & 7) += 1; |
26291 | PRE_IO |
26292 | READ_BYTE_F(adr, res) |
26293 | res |= src; |
26294 | flag_C = 0; |
26295 | flag_V = 0; |
26296 | flag_NotZ = res; |
26297 | flag_N = res; |
26298 | WRITE_BYTE_F(adr, res) |
26299 | POST_IO |
26300 | RET(12) |
26301 | } |
26302 | |
26303 | // ORDa |
26304 | OPCODE(0x8120) |
26305 | { |
26306 | u32 adr, res; |
26307 | u32 src, dst; |
26308 | |
26309 | src = DREGu8((Opcode >> 9) & 7); |
26310 | adr = AREG((Opcode >> 0) & 7) - 1; |
26311 | AREG((Opcode >> 0) & 7) = adr; |
26312 | PRE_IO |
26313 | READ_BYTE_F(adr, res) |
26314 | res |= src; |
26315 | flag_C = 0; |
26316 | flag_V = 0; |
26317 | flag_NotZ = res; |
26318 | flag_N = res; |
26319 | WRITE_BYTE_F(adr, res) |
26320 | POST_IO |
26321 | RET(14) |
26322 | } |
26323 | |
26324 | // ORDa |
26325 | OPCODE(0x8128) |
26326 | { |
26327 | u32 adr, res; |
26328 | u32 src, dst; |
26329 | |
26330 | src = DREGu8((Opcode >> 9) & 7); |
26331 | FETCH_SWORD(adr); |
26332 | adr += AREG((Opcode >> 0) & 7); |
26333 | PRE_IO |
26334 | READ_BYTE_F(adr, res) |
26335 | res |= src; |
26336 | flag_C = 0; |
26337 | flag_V = 0; |
26338 | flag_NotZ = res; |
26339 | flag_N = res; |
26340 | WRITE_BYTE_F(adr, res) |
26341 | POST_IO |
26342 | RET(16) |
26343 | } |
26344 | |
26345 | // ORDa |
26346 | OPCODE(0x8130) |
26347 | { |
26348 | u32 adr, res; |
26349 | u32 src, dst; |
26350 | |
26351 | src = DREGu8((Opcode >> 9) & 7); |
26352 | adr = AREG((Opcode >> 0) & 7); |
26353 | DECODE_EXT_WORD |
26354 | PRE_IO |
26355 | READ_BYTE_F(adr, res) |
26356 | res |= src; |
26357 | flag_C = 0; |
26358 | flag_V = 0; |
26359 | flag_NotZ = res; |
26360 | flag_N = res; |
26361 | WRITE_BYTE_F(adr, res) |
26362 | POST_IO |
26363 | RET(18) |
26364 | } |
26365 | |
26366 | // ORDa |
26367 | OPCODE(0x8138) |
26368 | { |
26369 | u32 adr, res; |
26370 | u32 src, dst; |
26371 | |
26372 | src = DREGu8((Opcode >> 9) & 7); |
26373 | FETCH_SWORD(adr); |
26374 | PRE_IO |
26375 | READ_BYTE_F(adr, res) |
26376 | res |= src; |
26377 | flag_C = 0; |
26378 | flag_V = 0; |
26379 | flag_NotZ = res; |
26380 | flag_N = res; |
26381 | WRITE_BYTE_F(adr, res) |
26382 | POST_IO |
26383 | RET(16) |
26384 | } |
26385 | |
26386 | // ORDa |
26387 | OPCODE(0x8139) |
26388 | { |
26389 | u32 adr, res; |
26390 | u32 src, dst; |
26391 | |
26392 | src = DREGu8((Opcode >> 9) & 7); |
26393 | FETCH_LONG(adr); |
26394 | PRE_IO |
26395 | READ_BYTE_F(adr, res) |
26396 | res |= src; |
26397 | flag_C = 0; |
26398 | flag_V = 0; |
26399 | flag_NotZ = res; |
26400 | flag_N = res; |
26401 | WRITE_BYTE_F(adr, res) |
26402 | POST_IO |
26403 | RET(20) |
26404 | } |
26405 | |
26406 | // ORDa |
26407 | OPCODE(0x811F) |
26408 | { |
26409 | u32 adr, res; |
26410 | u32 src, dst; |
26411 | |
26412 | src = DREGu8((Opcode >> 9) & 7); |
26413 | adr = AREG(7); |
26414 | AREG(7) += 2; |
26415 | PRE_IO |
26416 | READ_BYTE_F(adr, res) |
26417 | res |= src; |
26418 | flag_C = 0; |
26419 | flag_V = 0; |
26420 | flag_NotZ = res; |
26421 | flag_N = res; |
26422 | WRITE_BYTE_F(adr, res) |
26423 | POST_IO |
26424 | RET(12) |
26425 | } |
26426 | |
26427 | // ORDa |
26428 | OPCODE(0x8127) |
26429 | { |
26430 | u32 adr, res; |
26431 | u32 src, dst; |
26432 | |
26433 | src = DREGu8((Opcode >> 9) & 7); |
26434 | adr = AREG(7) - 2; |
26435 | AREG(7) = adr; |
26436 | PRE_IO |
26437 | READ_BYTE_F(adr, res) |
26438 | res |= src; |
26439 | flag_C = 0; |
26440 | flag_V = 0; |
26441 | flag_NotZ = res; |
26442 | flag_N = res; |
26443 | WRITE_BYTE_F(adr, res) |
26444 | POST_IO |
26445 | RET(14) |
26446 | } |
26447 | |
26448 | // ORDa |
26449 | OPCODE(0x8150) |
26450 | { |
26451 | u32 adr, res; |
26452 | u32 src, dst; |
26453 | |
26454 | src = DREGu16((Opcode >> 9) & 7); |
26455 | adr = AREG((Opcode >> 0) & 7); |
26456 | PRE_IO |
26457 | READ_WORD_F(adr, res) |
26458 | res |= src; |
26459 | flag_C = 0; |
26460 | flag_V = 0; |
26461 | flag_NotZ = res; |
26462 | flag_N = res >> 8; |
26463 | WRITE_WORD_F(adr, res) |
26464 | POST_IO |
26465 | RET(12) |
26466 | } |
26467 | |
26468 | // ORDa |
26469 | OPCODE(0x8158) |
26470 | { |
26471 | u32 adr, res; |
26472 | u32 src, dst; |
26473 | |
26474 | src = DREGu16((Opcode >> 9) & 7); |
26475 | adr = AREG((Opcode >> 0) & 7); |
26476 | AREG((Opcode >> 0) & 7) += 2; |
26477 | PRE_IO |
26478 | READ_WORD_F(adr, res) |
26479 | res |= src; |
26480 | flag_C = 0; |
26481 | flag_V = 0; |
26482 | flag_NotZ = res; |
26483 | flag_N = res >> 8; |
26484 | WRITE_WORD_F(adr, res) |
26485 | POST_IO |
26486 | RET(12) |
26487 | } |
26488 | |
26489 | // ORDa |
26490 | OPCODE(0x8160) |
26491 | { |
26492 | u32 adr, res; |
26493 | u32 src, dst; |
26494 | |
26495 | src = DREGu16((Opcode >> 9) & 7); |
26496 | adr = AREG((Opcode >> 0) & 7) - 2; |
26497 | AREG((Opcode >> 0) & 7) = adr; |
26498 | PRE_IO |
26499 | READ_WORD_F(adr, res) |
26500 | res |= src; |
26501 | flag_C = 0; |
26502 | flag_V = 0; |
26503 | flag_NotZ = res; |
26504 | flag_N = res >> 8; |
26505 | WRITE_WORD_F(adr, res) |
26506 | POST_IO |
26507 | RET(14) |
26508 | } |
26509 | |
26510 | // ORDa |
26511 | OPCODE(0x8168) |
26512 | { |
26513 | u32 adr, res; |
26514 | u32 src, dst; |
26515 | |
26516 | src = DREGu16((Opcode >> 9) & 7); |
26517 | FETCH_SWORD(adr); |
26518 | adr += AREG((Opcode >> 0) & 7); |
26519 | PRE_IO |
26520 | READ_WORD_F(adr, res) |
26521 | res |= src; |
26522 | flag_C = 0; |
26523 | flag_V = 0; |
26524 | flag_NotZ = res; |
26525 | flag_N = res >> 8; |
26526 | WRITE_WORD_F(adr, res) |
26527 | POST_IO |
26528 | RET(16) |
26529 | } |
26530 | |
26531 | // ORDa |
26532 | OPCODE(0x8170) |
26533 | { |
26534 | u32 adr, res; |
26535 | u32 src, dst; |
26536 | |
26537 | src = DREGu16((Opcode >> 9) & 7); |
26538 | adr = AREG((Opcode >> 0) & 7); |
26539 | DECODE_EXT_WORD |
26540 | PRE_IO |
26541 | READ_WORD_F(adr, res) |
26542 | res |= src; |
26543 | flag_C = 0; |
26544 | flag_V = 0; |
26545 | flag_NotZ = res; |
26546 | flag_N = res >> 8; |
26547 | WRITE_WORD_F(adr, res) |
26548 | POST_IO |
26549 | RET(18) |
26550 | } |
26551 | |
26552 | // ORDa |
26553 | OPCODE(0x8178) |
26554 | { |
26555 | u32 adr, res; |
26556 | u32 src, dst; |
26557 | |
26558 | src = DREGu16((Opcode >> 9) & 7); |
26559 | FETCH_SWORD(adr); |
26560 | PRE_IO |
26561 | READ_WORD_F(adr, res) |
26562 | res |= src; |
26563 | flag_C = 0; |
26564 | flag_V = 0; |
26565 | flag_NotZ = res; |
26566 | flag_N = res >> 8; |
26567 | WRITE_WORD_F(adr, res) |
26568 | POST_IO |
26569 | RET(16) |
26570 | } |
26571 | |
26572 | // ORDa |
26573 | OPCODE(0x8179) |
26574 | { |
26575 | u32 adr, res; |
26576 | u32 src, dst; |
26577 | |
26578 | src = DREGu16((Opcode >> 9) & 7); |
26579 | FETCH_LONG(adr); |
26580 | PRE_IO |
26581 | READ_WORD_F(adr, res) |
26582 | res |= src; |
26583 | flag_C = 0; |
26584 | flag_V = 0; |
26585 | flag_NotZ = res; |
26586 | flag_N = res >> 8; |
26587 | WRITE_WORD_F(adr, res) |
26588 | POST_IO |
26589 | RET(20) |
26590 | } |
26591 | |
26592 | // ORDa |
26593 | OPCODE(0x815F) |
26594 | { |
26595 | u32 adr, res; |
26596 | u32 src, dst; |
26597 | |
26598 | src = DREGu16((Opcode >> 9) & 7); |
26599 | adr = AREG(7); |
26600 | AREG(7) += 2; |
26601 | PRE_IO |
26602 | READ_WORD_F(adr, res) |
26603 | res |= src; |
26604 | flag_C = 0; |
26605 | flag_V = 0; |
26606 | flag_NotZ = res; |
26607 | flag_N = res >> 8; |
26608 | WRITE_WORD_F(adr, res) |
26609 | POST_IO |
26610 | RET(12) |
26611 | } |
26612 | |
26613 | // ORDa |
26614 | OPCODE(0x8167) |
26615 | { |
26616 | u32 adr, res; |
26617 | u32 src, dst; |
26618 | |
26619 | src = DREGu16((Opcode >> 9) & 7); |
26620 | adr = AREG(7) - 2; |
26621 | AREG(7) = adr; |
26622 | PRE_IO |
26623 | READ_WORD_F(adr, res) |
26624 | res |= src; |
26625 | flag_C = 0; |
26626 | flag_V = 0; |
26627 | flag_NotZ = res; |
26628 | flag_N = res >> 8; |
26629 | WRITE_WORD_F(adr, res) |
26630 | POST_IO |
26631 | RET(14) |
26632 | } |
26633 | |
26634 | // ORDa |
26635 | OPCODE(0x8190) |
26636 | { |
26637 | u32 adr, res; |
26638 | u32 src, dst; |
26639 | |
26640 | src = DREGu32((Opcode >> 9) & 7); |
26641 | adr = AREG((Opcode >> 0) & 7); |
26642 | PRE_IO |
26643 | READ_LONG_F(adr, res) |
26644 | res |= src; |
26645 | flag_C = 0; |
26646 | flag_V = 0; |
26647 | flag_NotZ = res; |
26648 | flag_N = res >> 24; |
26649 | WRITE_LONG_F(adr, res) |
26650 | POST_IO |
26651 | RET(20) |
26652 | } |
26653 | |
26654 | // ORDa |
26655 | OPCODE(0x8198) |
26656 | { |
26657 | u32 adr, res; |
26658 | u32 src, dst; |
26659 | |
26660 | src = DREGu32((Opcode >> 9) & 7); |
26661 | adr = AREG((Opcode >> 0) & 7); |
26662 | AREG((Opcode >> 0) & 7) += 4; |
26663 | PRE_IO |
26664 | READ_LONG_F(adr, res) |
26665 | res |= src; |
26666 | flag_C = 0; |
26667 | flag_V = 0; |
26668 | flag_NotZ = res; |
26669 | flag_N = res >> 24; |
26670 | WRITE_LONG_F(adr, res) |
26671 | POST_IO |
26672 | RET(20) |
26673 | } |
26674 | |
26675 | // ORDa |
26676 | OPCODE(0x81A0) |
26677 | { |
26678 | u32 adr, res; |
26679 | u32 src, dst; |
26680 | |
26681 | src = DREGu32((Opcode >> 9) & 7); |
26682 | adr = AREG((Opcode >> 0) & 7) - 4; |
26683 | AREG((Opcode >> 0) & 7) = adr; |
26684 | PRE_IO |
26685 | READ_LONG_F(adr, res) |
26686 | res |= src; |
26687 | flag_C = 0; |
26688 | flag_V = 0; |
26689 | flag_NotZ = res; |
26690 | flag_N = res >> 24; |
26691 | WRITE_LONG_F(adr, res) |
26692 | POST_IO |
26693 | RET(22) |
26694 | } |
26695 | |
26696 | // ORDa |
26697 | OPCODE(0x81A8) |
26698 | { |
26699 | u32 adr, res; |
26700 | u32 src, dst; |
26701 | |
26702 | src = DREGu32((Opcode >> 9) & 7); |
26703 | FETCH_SWORD(adr); |
26704 | adr += AREG((Opcode >> 0) & 7); |
26705 | PRE_IO |
26706 | READ_LONG_F(adr, res) |
26707 | res |= src; |
26708 | flag_C = 0; |
26709 | flag_V = 0; |
26710 | flag_NotZ = res; |
26711 | flag_N = res >> 24; |
26712 | WRITE_LONG_F(adr, res) |
26713 | POST_IO |
26714 | RET(24) |
26715 | } |
26716 | |
26717 | // ORDa |
26718 | OPCODE(0x81B0) |
26719 | { |
26720 | u32 adr, res; |
26721 | u32 src, dst; |
26722 | |
26723 | src = DREGu32((Opcode >> 9) & 7); |
26724 | adr = AREG((Opcode >> 0) & 7); |
26725 | DECODE_EXT_WORD |
26726 | PRE_IO |
26727 | READ_LONG_F(adr, res) |
26728 | res |= src; |
26729 | flag_C = 0; |
26730 | flag_V = 0; |
26731 | flag_NotZ = res; |
26732 | flag_N = res >> 24; |
26733 | WRITE_LONG_F(adr, res) |
26734 | POST_IO |
26735 | RET(26) |
26736 | } |
26737 | |
26738 | // ORDa |
26739 | OPCODE(0x81B8) |
26740 | { |
26741 | u32 adr, res; |
26742 | u32 src, dst; |
26743 | |
26744 | src = DREGu32((Opcode >> 9) & 7); |
26745 | FETCH_SWORD(adr); |
26746 | PRE_IO |
26747 | READ_LONG_F(adr, res) |
26748 | res |= src; |
26749 | flag_C = 0; |
26750 | flag_V = 0; |
26751 | flag_NotZ = res; |
26752 | flag_N = res >> 24; |
26753 | WRITE_LONG_F(adr, res) |
26754 | POST_IO |
26755 | RET(24) |
26756 | } |
26757 | |
26758 | // ORDa |
26759 | OPCODE(0x81B9) |
26760 | { |
26761 | u32 adr, res; |
26762 | u32 src, dst; |
26763 | |
26764 | src = DREGu32((Opcode >> 9) & 7); |
26765 | FETCH_LONG(adr); |
26766 | PRE_IO |
26767 | READ_LONG_F(adr, res) |
26768 | res |= src; |
26769 | flag_C = 0; |
26770 | flag_V = 0; |
26771 | flag_NotZ = res; |
26772 | flag_N = res >> 24; |
26773 | WRITE_LONG_F(adr, res) |
26774 | POST_IO |
26775 | RET(28) |
26776 | } |
26777 | |
26778 | // ORDa |
26779 | OPCODE(0x819F) |
26780 | { |
26781 | u32 adr, res; |
26782 | u32 src, dst; |
26783 | |
26784 | src = DREGu32((Opcode >> 9) & 7); |
26785 | adr = AREG(7); |
26786 | AREG(7) += 4; |
26787 | PRE_IO |
26788 | READ_LONG_F(adr, res) |
26789 | res |= src; |
26790 | flag_C = 0; |
26791 | flag_V = 0; |
26792 | flag_NotZ = res; |
26793 | flag_N = res >> 24; |
26794 | WRITE_LONG_F(adr, res) |
26795 | POST_IO |
26796 | RET(20) |
26797 | } |
26798 | |
26799 | // ORDa |
26800 | OPCODE(0x81A7) |
26801 | { |
26802 | u32 adr, res; |
26803 | u32 src, dst; |
26804 | |
26805 | src = DREGu32((Opcode >> 9) & 7); |
26806 | adr = AREG(7) - 4; |
26807 | AREG(7) = adr; |
26808 | PRE_IO |
26809 | READ_LONG_F(adr, res) |
26810 | res |= src; |
26811 | flag_C = 0; |
26812 | flag_V = 0; |
26813 | flag_NotZ = res; |
26814 | flag_N = res >> 24; |
26815 | WRITE_LONG_F(adr, res) |
26816 | POST_IO |
26817 | RET(22) |
26818 | } |
26819 | |
26820 | // SBCD |
26821 | OPCODE(0x8100) |
26822 | { |
26823 | u32 adr, res; |
26824 | u32 src, dst; |
26825 | |
26826 | src = DREGu8((Opcode >> 0) & 7); |
26827 | dst = DREGu8((Opcode >> 9) & 7); |
26828 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26829 | if (res > 9) res -= 6; |
26830 | res += (dst & 0xF0) - (src & 0xF0); |
26831 | if (res > 0x99) |
26832 | { |
26833 | res += 0xA0; |
26834 | flag_X = flag_C = M68K_SR_C; |
26835 | } |
26836 | else flag_X = flag_C = 0; |
26837 | flag_NotZ |= res & 0xFF; |
26838 | flag_N = res; |
26839 | DREGu8((Opcode >> 9) & 7) = res; |
26840 | RET(6) |
26841 | } |
26842 | |
26843 | // SBCDM |
26844 | OPCODE(0x8108) |
26845 | { |
26846 | u32 adr, res; |
26847 | u32 src, dst; |
26848 | |
26849 | adr = AREG((Opcode >> 0) & 7) - 1; |
26850 | AREG((Opcode >> 0) & 7) = adr; |
26851 | PRE_IO |
26852 | READ_BYTE_F(adr, src) |
26853 | adr = AREG((Opcode >> 9) & 7) - 1; |
26854 | AREG((Opcode >> 9) & 7) = adr; |
26855 | READ_BYTE_F(adr, dst) |
26856 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26857 | if (res > 9) res -= 6; |
26858 | res += (dst & 0xF0) - (src & 0xF0); |
26859 | if (res > 0x99) |
26860 | { |
26861 | res += 0xA0; |
26862 | flag_X = flag_C = M68K_SR_C; |
26863 | } |
26864 | else flag_X = flag_C = 0; |
26865 | flag_NotZ |= res & 0xFF; |
26866 | flag_N = res; |
26867 | WRITE_BYTE_F(adr, res) |
26868 | POST_IO |
26869 | RET(18) |
26870 | } |
26871 | |
26872 | // SBCD7M |
26873 | OPCODE(0x810F) |
26874 | { |
26875 | u32 adr, res; |
26876 | u32 src, dst; |
26877 | |
26878 | adr = AREG(7) - 2; |
26879 | AREG(7) = adr; |
26880 | PRE_IO |
26881 | READ_BYTE_F(adr, src) |
26882 | adr = AREG((Opcode >> 9) & 7) - 1; |
26883 | AREG((Opcode >> 9) & 7) = adr; |
26884 | READ_BYTE_F(adr, dst) |
26885 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26886 | if (res > 9) res -= 6; |
26887 | res += (dst & 0xF0) - (src & 0xF0); |
26888 | if (res > 0x99) |
26889 | { |
26890 | res += 0xA0; |
26891 | flag_X = flag_C = M68K_SR_C; |
26892 | } |
26893 | else flag_X = flag_C = 0; |
26894 | flag_NotZ |= res & 0xFF; |
26895 | flag_N = res; |
26896 | WRITE_BYTE_F(adr, res) |
26897 | POST_IO |
26898 | RET(18) |
26899 | } |
26900 | |
26901 | // SBCDM7 |
26902 | OPCODE(0x8F08) |
26903 | { |
26904 | u32 adr, res; |
26905 | u32 src, dst; |
26906 | |
26907 | adr = AREG((Opcode >> 0) & 7) - 1; |
26908 | AREG((Opcode >> 0) & 7) = adr; |
26909 | PRE_IO |
26910 | READ_BYTE_F(adr, src) |
26911 | adr = AREG(7) - 2; |
26912 | AREG(7) = adr; |
26913 | READ_BYTE_F(adr, dst) |
26914 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26915 | if (res > 9) res -= 6; |
26916 | res += (dst & 0xF0) - (src & 0xF0); |
26917 | if (res > 0x99) |
26918 | { |
26919 | res += 0xA0; |
26920 | flag_X = flag_C = M68K_SR_C; |
26921 | } |
26922 | else flag_X = flag_C = 0; |
26923 | flag_NotZ |= res & 0xFF; |
26924 | flag_N = res; |
26925 | WRITE_BYTE_F(adr, res) |
26926 | POST_IO |
26927 | RET(18) |
26928 | } |
26929 | |
26930 | // SBCD7M7 |
26931 | OPCODE(0x8F0F) |
26932 | { |
26933 | u32 adr, res; |
26934 | u32 src, dst; |
26935 | |
26936 | adr = AREG(7) - 2; |
26937 | AREG(7) = adr; |
26938 | PRE_IO |
26939 | READ_BYTE_F(adr, src) |
26940 | adr = AREG(7) - 2; |
26941 | AREG(7) = adr; |
26942 | READ_BYTE_F(adr, dst) |
26943 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
26944 | if (res > 9) res -= 6; |
26945 | res += (dst & 0xF0) - (src & 0xF0); |
26946 | if (res > 0x99) |
26947 | { |
26948 | res += 0xA0; |
26949 | flag_X = flag_C = M68K_SR_C; |
26950 | } |
26951 | else flag_X = flag_C = 0; |
26952 | flag_NotZ |= res & 0xFF; |
26953 | flag_N = res; |
26954 | WRITE_BYTE_F(adr, res) |
26955 | POST_IO |
26956 | RET(18) |
26957 | } |
26958 | |
26959 | // DIVU |
26960 | OPCODE(0x80C0) |
26961 | { |
26962 | u32 adr, res; |
26963 | u32 src, dst; |
26964 | |
26965 | src = DREGu16((Opcode >> 0) & 7); |
26966 | if (src == 0) |
26967 | { |
26968 | execute_exception(M68K_ZERO_DIVIDE_EX); |
26969 | #ifdef USE_CYCLONE_TIMING_DIV |
26970 | RET(140) |
26971 | #else |
26972 | RET(10) |
26973 | #endif |
26974 | } |
26975 | dst = DREGu32((Opcode >> 9) & 7); |
26976 | { |
26977 | u32 q, r; |
26978 | |
26979 | q = dst / src; |
26980 | r = dst % src; |
26981 | |
26982 | if (q & 0xFFFF0000) |
26983 | { |
26984 | flag_V = M68K_SR_V; |
26985 | #ifdef USE_CYCLONE_TIMING_DIV |
26986 | RET(140) |
26987 | #else |
26988 | RET(70) |
26989 | #endif |
26990 | } |
26991 | q &= 0x0000FFFF; |
26992 | flag_NotZ = q; |
26993 | flag_N = q >> 8; |
26994 | flag_V = flag_C = 0; |
26995 | res = q | (r << 16); |
26996 | DREGu32((Opcode >> 9) & 7) = res; |
26997 | } |
26998 | #ifdef USE_CYCLONE_TIMING_DIV |
26999 | RET(140) |
27000 | #else |
27001 | RET(90) |
27002 | #endif |
27003 | } |
27004 | |
27005 | // DIVU |
27006 | OPCODE(0x80D0) |
27007 | { |
27008 | u32 adr, res; |
27009 | u32 src, dst; |
27010 | |
27011 | adr = AREG((Opcode >> 0) & 7); |
27012 | PRE_IO |
27013 | READ_WORD_F(adr, src) |
27014 | if (src == 0) |
27015 | { |
27016 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27017 | #ifdef USE_CYCLONE_TIMING_DIV |
27018 | RET(144) |
27019 | #else |
27020 | RET(14) |
27021 | #endif |
27022 | } |
27023 | dst = DREGu32((Opcode >> 9) & 7); |
27024 | { |
27025 | u32 q, r; |
27026 | |
27027 | q = dst / src; |
27028 | r = dst % src; |
27029 | |
27030 | if (q & 0xFFFF0000) |
27031 | { |
27032 | flag_V = M68K_SR_V; |
27033 | #ifdef USE_CYCLONE_TIMING_DIV |
27034 | RET(144) |
27035 | #else |
27036 | RET(74) |
27037 | #endif |
27038 | } |
27039 | q &= 0x0000FFFF; |
27040 | flag_NotZ = q; |
27041 | flag_N = q >> 8; |
27042 | flag_V = flag_C = 0; |
27043 | res = q | (r << 16); |
27044 | DREGu32((Opcode >> 9) & 7) = res; |
27045 | } |
27046 | #ifdef USE_CYCLONE_TIMING_DIV |
27047 | RET(144) |
27048 | #else |
27049 | RET(94) |
27050 | #endif |
27051 | } |
27052 | |
27053 | // DIVU |
27054 | OPCODE(0x80D8) |
27055 | { |
27056 | u32 adr, res; |
27057 | u32 src, dst; |
27058 | |
27059 | adr = AREG((Opcode >> 0) & 7); |
27060 | AREG((Opcode >> 0) & 7) += 2; |
27061 | PRE_IO |
27062 | READ_WORD_F(adr, src) |
27063 | if (src == 0) |
27064 | { |
27065 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27066 | #ifdef USE_CYCLONE_TIMING_DIV |
27067 | RET(144) |
27068 | #else |
27069 | RET(14) |
27070 | #endif |
27071 | } |
27072 | dst = DREGu32((Opcode >> 9) & 7); |
27073 | { |
27074 | u32 q, r; |
27075 | |
27076 | q = dst / src; |
27077 | r = dst % src; |
27078 | |
27079 | if (q & 0xFFFF0000) |
27080 | { |
27081 | flag_V = M68K_SR_V; |
27082 | #ifdef USE_CYCLONE_TIMING_DIV |
27083 | RET(144) |
27084 | #else |
27085 | RET(74) |
27086 | #endif |
27087 | } |
27088 | q &= 0x0000FFFF; |
27089 | flag_NotZ = q; |
27090 | flag_N = q >> 8; |
27091 | flag_V = flag_C = 0; |
27092 | res = q | (r << 16); |
27093 | DREGu32((Opcode >> 9) & 7) = res; |
27094 | } |
27095 | #ifdef USE_CYCLONE_TIMING_DIV |
27096 | RET(144) |
27097 | #else |
27098 | RET(94) |
27099 | #endif |
27100 | } |
27101 | |
27102 | // DIVU |
27103 | OPCODE(0x80E0) |
27104 | { |
27105 | u32 adr, res; |
27106 | u32 src, dst; |
27107 | |
27108 | adr = AREG((Opcode >> 0) & 7) - 2; |
27109 | AREG((Opcode >> 0) & 7) = adr; |
27110 | PRE_IO |
27111 | READ_WORD_F(adr, src) |
27112 | if (src == 0) |
27113 | { |
27114 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27115 | #ifdef USE_CYCLONE_TIMING_DIV |
27116 | RET(146) |
27117 | #else |
27118 | RET(16) |
27119 | #endif |
27120 | } |
27121 | dst = DREGu32((Opcode >> 9) & 7); |
27122 | { |
27123 | u32 q, r; |
27124 | |
27125 | q = dst / src; |
27126 | r = dst % src; |
27127 | |
27128 | if (q & 0xFFFF0000) |
27129 | { |
27130 | flag_V = M68K_SR_V; |
27131 | #ifdef USE_CYCLONE_TIMING_DIV |
27132 | RET(146) |
27133 | #else |
27134 | RET(76) |
27135 | #endif |
27136 | } |
27137 | q &= 0x0000FFFF; |
27138 | flag_NotZ = q; |
27139 | flag_N = q >> 8; |
27140 | flag_V = flag_C = 0; |
27141 | res = q | (r << 16); |
27142 | DREGu32((Opcode >> 9) & 7) = res; |
27143 | } |
27144 | #ifdef USE_CYCLONE_TIMING_DIV |
27145 | RET(146) |
27146 | #else |
27147 | RET(96) |
27148 | #endif |
27149 | } |
27150 | |
27151 | // DIVU |
27152 | OPCODE(0x80E8) |
27153 | { |
27154 | u32 adr, res; |
27155 | u32 src, dst; |
27156 | |
27157 | FETCH_SWORD(adr); |
27158 | adr += AREG((Opcode >> 0) & 7); |
27159 | PRE_IO |
27160 | READ_WORD_F(adr, src) |
27161 | if (src == 0) |
27162 | { |
27163 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27164 | #ifdef USE_CYCLONE_TIMING_DIV |
27165 | RET(148) |
27166 | #else |
27167 | RET(18) |
27168 | #endif |
27169 | } |
27170 | dst = DREGu32((Opcode >> 9) & 7); |
27171 | { |
27172 | u32 q, r; |
27173 | |
27174 | q = dst / src; |
27175 | r = dst % src; |
27176 | |
27177 | if (q & 0xFFFF0000) |
27178 | { |
27179 | flag_V = M68K_SR_V; |
27180 | #ifdef USE_CYCLONE_TIMING_DIV |
27181 | RET(148) |
27182 | #else |
27183 | RET(78) |
27184 | #endif |
27185 | } |
27186 | q &= 0x0000FFFF; |
27187 | flag_NotZ = q; |
27188 | flag_N = q >> 8; |
27189 | flag_V = flag_C = 0; |
27190 | res = q | (r << 16); |
27191 | DREGu32((Opcode >> 9) & 7) = res; |
27192 | } |
27193 | #ifdef USE_CYCLONE_TIMING_DIV |
27194 | RET(148) |
27195 | #else |
27196 | RET(98) |
27197 | #endif |
27198 | } |
27199 | |
27200 | // DIVU |
27201 | OPCODE(0x80F0) |
27202 | { |
27203 | u32 adr, res; |
27204 | u32 src, dst; |
27205 | |
27206 | adr = AREG((Opcode >> 0) & 7); |
27207 | DECODE_EXT_WORD |
27208 | PRE_IO |
27209 | READ_WORD_F(adr, src) |
27210 | if (src == 0) |
27211 | { |
27212 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27213 | #ifdef USE_CYCLONE_TIMING_DIV |
27214 | RET(150) |
27215 | #else |
27216 | RET(20) |
27217 | #endif |
27218 | } |
27219 | dst = DREGu32((Opcode >> 9) & 7); |
27220 | { |
27221 | u32 q, r; |
27222 | |
27223 | q = dst / src; |
27224 | r = dst % src; |
27225 | |
27226 | if (q & 0xFFFF0000) |
27227 | { |
27228 | flag_V = M68K_SR_V; |
27229 | #ifdef USE_CYCLONE_TIMING_DIV |
27230 | RET(150) |
27231 | #else |
27232 | RET(80) |
27233 | #endif |
27234 | } |
27235 | q &= 0x0000FFFF; |
27236 | flag_NotZ = q; |
27237 | flag_N = q >> 8; |
27238 | flag_V = flag_C = 0; |
27239 | res = q | (r << 16); |
27240 | DREGu32((Opcode >> 9) & 7) = res; |
27241 | } |
27242 | #ifdef USE_CYCLONE_TIMING_DIV |
27243 | RET(150) |
27244 | #else |
27245 | RET(100) |
27246 | #endif |
27247 | } |
27248 | |
27249 | // DIVU |
27250 | OPCODE(0x80F8) |
27251 | { |
27252 | u32 adr, res; |
27253 | u32 src, dst; |
27254 | |
27255 | FETCH_SWORD(adr); |
27256 | PRE_IO |
27257 | READ_WORD_F(adr, src) |
27258 | if (src == 0) |
27259 | { |
27260 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27261 | #ifdef USE_CYCLONE_TIMING_DIV |
27262 | RET(148) |
27263 | #else |
27264 | RET(18) |
27265 | #endif |
27266 | } |
27267 | dst = DREGu32((Opcode >> 9) & 7); |
27268 | { |
27269 | u32 q, r; |
27270 | |
27271 | q = dst / src; |
27272 | r = dst % src; |
27273 | |
27274 | if (q & 0xFFFF0000) |
27275 | { |
27276 | flag_V = M68K_SR_V; |
27277 | #ifdef USE_CYCLONE_TIMING_DIV |
27278 | RET(148) |
27279 | #else |
27280 | RET(78) |
27281 | #endif |
27282 | } |
27283 | q &= 0x0000FFFF; |
27284 | flag_NotZ = q; |
27285 | flag_N = q >> 8; |
27286 | flag_V = flag_C = 0; |
27287 | res = q | (r << 16); |
27288 | DREGu32((Opcode >> 9) & 7) = res; |
27289 | } |
27290 | #ifdef USE_CYCLONE_TIMING_DIV |
27291 | RET(148) |
27292 | #else |
27293 | RET(98) |
27294 | #endif |
27295 | } |
27296 | |
27297 | // DIVU |
27298 | OPCODE(0x80F9) |
27299 | { |
27300 | u32 adr, res; |
27301 | u32 src, dst; |
27302 | |
27303 | FETCH_LONG(adr); |
27304 | PRE_IO |
27305 | READ_WORD_F(adr, src) |
27306 | if (src == 0) |
27307 | { |
27308 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27309 | #ifdef USE_CYCLONE_TIMING_DIV |
27310 | RET(162) |
27311 | #else |
27312 | RET(22) |
27313 | #endif |
27314 | } |
27315 | dst = DREGu32((Opcode >> 9) & 7); |
27316 | { |
27317 | u32 q, r; |
27318 | |
27319 | q = dst / src; |
27320 | r = dst % src; |
27321 | |
27322 | if (q & 0xFFFF0000) |
27323 | { |
27324 | flag_V = M68K_SR_V; |
27325 | #ifdef USE_CYCLONE_TIMING_DIV |
27326 | RET(162) |
27327 | #else |
27328 | RET(82) |
27329 | #endif |
27330 | } |
27331 | q &= 0x0000FFFF; |
27332 | flag_NotZ = q; |
27333 | flag_N = q >> 8; |
27334 | flag_V = flag_C = 0; |
27335 | res = q | (r << 16); |
27336 | DREGu32((Opcode >> 9) & 7) = res; |
27337 | } |
27338 | #ifdef USE_CYCLONE_TIMING_DIV |
27339 | RET(162) |
27340 | #else |
27341 | RET(102) |
27342 | #endif |
27343 | } |
27344 | |
27345 | // DIVU |
27346 | OPCODE(0x80FA) |
27347 | { |
27348 | u32 adr, res; |
27349 | u32 src, dst; |
27350 | |
27351 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
27352 | PC++; |
27353 | PRE_IO |
27354 | READ_WORD_F(adr, src) |
27355 | if (src == 0) |
27356 | { |
27357 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27358 | #ifdef USE_CYCLONE_TIMING_DIV |
27359 | RET(148) |
27360 | #else |
27361 | RET(18) |
27362 | #endif |
27363 | } |
27364 | dst = DREGu32((Opcode >> 9) & 7); |
27365 | { |
27366 | u32 q, r; |
27367 | |
27368 | q = dst / src; |
27369 | r = dst % src; |
27370 | |
27371 | if (q & 0xFFFF0000) |
27372 | { |
27373 | flag_V = M68K_SR_V; |
27374 | #ifdef USE_CYCLONE_TIMING_DIV |
27375 | RET(148) |
27376 | #else |
27377 | RET(78) |
27378 | #endif |
27379 | } |
27380 | q &= 0x0000FFFF; |
27381 | flag_NotZ = q; |
27382 | flag_N = q >> 8; |
27383 | flag_V = flag_C = 0; |
27384 | res = q | (r << 16); |
27385 | DREGu32((Opcode >> 9) & 7) = res; |
27386 | } |
27387 | #ifdef USE_CYCLONE_TIMING_DIV |
27388 | RET(148) |
27389 | #else |
27390 | RET(98) |
27391 | #endif |
27392 | } |
27393 | |
27394 | // DIVU |
27395 | OPCODE(0x80FB) |
27396 | { |
27397 | u32 adr, res; |
27398 | u32 src, dst; |
27399 | |
27400 | adr = (u32)(PC) - BasePC; |
27401 | DECODE_EXT_WORD |
27402 | PRE_IO |
27403 | READ_WORD_F(adr, src) |
27404 | if (src == 0) |
27405 | { |
27406 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27407 | #ifdef USE_CYCLONE_TIMING_DIV |
27408 | RET(160) |
27409 | #else |
27410 | RET(20) |
27411 | #endif |
27412 | } |
27413 | dst = DREGu32((Opcode >> 9) & 7); |
27414 | { |
27415 | u32 q, r; |
27416 | |
27417 | q = dst / src; |
27418 | r = dst % src; |
27419 | |
27420 | if (q & 0xFFFF0000) |
27421 | { |
27422 | flag_V = M68K_SR_V; |
27423 | #ifdef USE_CYCLONE_TIMING_DIV |
27424 | RET(160) |
27425 | #else |
27426 | RET(80) |
27427 | #endif |
27428 | } |
27429 | q &= 0x0000FFFF; |
27430 | flag_NotZ = q; |
27431 | flag_N = q >> 8; |
27432 | flag_V = flag_C = 0; |
27433 | res = q | (r << 16); |
27434 | DREGu32((Opcode >> 9) & 7) = res; |
27435 | } |
27436 | #ifdef USE_CYCLONE_TIMING_DIV |
27437 | RET(160) |
27438 | #else |
27439 | RET(100) |
27440 | #endif |
27441 | } |
27442 | |
27443 | // DIVU |
27444 | OPCODE(0x80FC) |
27445 | { |
27446 | u32 adr, res; |
27447 | u32 src, dst; |
27448 | |
27449 | FETCH_WORD(src); |
27450 | if (src == 0) |
27451 | { |
27452 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27453 | #ifdef USE_CYCLONE_TIMING_DIV |
27454 | RET(144) |
27455 | #else |
27456 | RET(14) |
27457 | #endif |
27458 | } |
27459 | dst = DREGu32((Opcode >> 9) & 7); |
27460 | { |
27461 | u32 q, r; |
27462 | |
27463 | q = dst / src; |
27464 | r = dst % src; |
27465 | |
27466 | if (q & 0xFFFF0000) |
27467 | { |
27468 | flag_V = M68K_SR_V; |
27469 | #ifdef USE_CYCLONE_TIMING_DIV |
27470 | RET(144) |
27471 | #else |
27472 | RET(74) |
27473 | #endif |
27474 | } |
27475 | q &= 0x0000FFFF; |
27476 | flag_NotZ = q; |
27477 | flag_N = q >> 8; |
27478 | flag_V = flag_C = 0; |
27479 | res = q | (r << 16); |
27480 | DREGu32((Opcode >> 9) & 7) = res; |
27481 | } |
27482 | #ifdef USE_CYCLONE_TIMING_DIV |
27483 | RET(144) |
27484 | #else |
27485 | RET(94) |
27486 | #endif |
27487 | } |
27488 | |
27489 | // DIVU |
27490 | OPCODE(0x80DF) |
27491 | { |
27492 | u32 adr, res; |
27493 | u32 src, dst; |
27494 | |
27495 | adr = AREG(7); |
27496 | AREG(7) += 2; |
27497 | PRE_IO |
27498 | READ_WORD_F(adr, src) |
27499 | if (src == 0) |
27500 | { |
27501 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27502 | #ifdef USE_CYCLONE_TIMING_DIV |
27503 | RET(144) |
27504 | #else |
27505 | RET(14) |
27506 | #endif |
27507 | } |
27508 | dst = DREGu32((Opcode >> 9) & 7); |
27509 | { |
27510 | u32 q, r; |
27511 | |
27512 | q = dst / src; |
27513 | r = dst % src; |
27514 | |
27515 | if (q & 0xFFFF0000) |
27516 | { |
27517 | flag_V = M68K_SR_V; |
27518 | #ifdef USE_CYCLONE_TIMING_DIV |
27519 | RET(144) |
27520 | #else |
27521 | RET(74) |
27522 | #endif |
27523 | } |
27524 | q &= 0x0000FFFF; |
27525 | flag_NotZ = q; |
27526 | flag_N = q >> 8; |
27527 | flag_V = flag_C = 0; |
27528 | res = q | (r << 16); |
27529 | DREGu32((Opcode >> 9) & 7) = res; |
27530 | } |
27531 | #ifdef USE_CYCLONE_TIMING_DIV |
27532 | RET(144) |
27533 | #else |
27534 | RET(94) |
27535 | #endif |
27536 | } |
27537 | |
27538 | // DIVU |
27539 | OPCODE(0x80E7) |
27540 | { |
27541 | u32 adr, res; |
27542 | u32 src, dst; |
27543 | |
27544 | adr = AREG(7) - 2; |
27545 | AREG(7) = adr; |
27546 | PRE_IO |
27547 | READ_WORD_F(adr, src) |
27548 | if (src == 0) |
27549 | { |
27550 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27551 | #ifdef USE_CYCLONE_TIMING_DIV |
27552 | RET(146) |
27553 | #else |
27554 | RET(16) |
27555 | #endif |
27556 | } |
27557 | dst = DREGu32((Opcode >> 9) & 7); |
27558 | { |
27559 | u32 q, r; |
27560 | |
27561 | q = dst / src; |
27562 | r = dst % src; |
27563 | |
27564 | if (q & 0xFFFF0000) |
27565 | { |
27566 | flag_V = M68K_SR_V; |
27567 | #ifdef USE_CYCLONE_TIMING_DIV |
27568 | RET(146) |
27569 | #else |
27570 | RET(76) |
27571 | #endif |
27572 | } |
27573 | q &= 0x0000FFFF; |
27574 | flag_NotZ = q; |
27575 | flag_N = q >> 8; |
27576 | flag_V = flag_C = 0; |
27577 | res = q | (r << 16); |
27578 | DREGu32((Opcode >> 9) & 7) = res; |
27579 | } |
27580 | #ifdef USE_CYCLONE_TIMING_DIV |
27581 | RET(146) |
27582 | #else |
27583 | RET(96) |
27584 | #endif |
27585 | } |
27586 | |
27587 | // DIVS |
27588 | OPCODE(0x81C0) |
27589 | { |
27590 | u32 adr, res; |
27591 | u32 src, dst; |
27592 | |
27593 | src = (s32)DREGs16((Opcode >> 0) & 7); |
27594 | if (src == 0) |
27595 | { |
27596 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27597 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27598 | goto end81C0; |
70357ce5 |
27599 | #endif |
27600 | RET(10) |
27601 | } |
27602 | dst = DREGu32((Opcode >> 9) & 7); |
27603 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27604 | { |
27605 | flag_NotZ = flag_N = 0; |
27606 | flag_V = flag_C = 0; |
27607 | res = 0; |
27608 | DREGu32((Opcode >> 9) & 7) = res; |
27609 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27610 | goto end81C0; |
70357ce5 |
27611 | #endif |
27612 | RET(50) |
27613 | } |
27614 | { |
27615 | s32 q, r; |
27616 | |
27617 | q = (s32)dst / (s32)src; |
27618 | r = (s32)dst % (s32)src; |
27619 | |
27620 | if ((q > 0x7FFF) || (q < -0x8000)) |
27621 | { |
27622 | flag_V = M68K_SR_V; |
27623 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27624 | goto end81C0; |
70357ce5 |
27625 | #endif |
27626 | RET(80) |
27627 | } |
27628 | q &= 0x0000FFFF; |
27629 | flag_NotZ = q; |
27630 | flag_N = q >> 8; |
27631 | flag_V = flag_C = 0; |
27632 | res = q | (r << 16); |
27633 | DREGu32((Opcode >> 9) & 7) = res; |
27634 | } |
27635 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27636 | end81C0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27637 | #endif |
27638 | RET(108) |
27639 | } |
27640 | |
27641 | // DIVS |
27642 | OPCODE(0x81D0) |
27643 | { |
27644 | u32 adr, res; |
27645 | u32 src, dst; |
27646 | |
27647 | adr = AREG((Opcode >> 0) & 7); |
27648 | PRE_IO |
27649 | READSX_WORD_F(adr, src) |
27650 | if (src == 0) |
27651 | { |
27652 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27653 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27654 | goto end81D0; |
70357ce5 |
27655 | #endif |
27656 | RET(14) |
27657 | } |
27658 | dst = DREGu32((Opcode >> 9) & 7); |
27659 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27660 | { |
27661 | flag_NotZ = flag_N = 0; |
27662 | flag_V = flag_C = 0; |
27663 | res = 0; |
27664 | DREGu32((Opcode >> 9) & 7) = res; |
27665 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27666 | goto end81D0; |
70357ce5 |
27667 | #endif |
27668 | RET(54) |
27669 | } |
27670 | { |
27671 | s32 q, r; |
27672 | |
27673 | q = (s32)dst / (s32)src; |
27674 | r = (s32)dst % (s32)src; |
27675 | |
27676 | if ((q > 0x7FFF) || (q < -0x8000)) |
27677 | { |
27678 | flag_V = M68K_SR_V; |
27679 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27680 | goto end81D0; |
70357ce5 |
27681 | #endif |
27682 | RET(84) |
27683 | } |
27684 | q &= 0x0000FFFF; |
27685 | flag_NotZ = q; |
27686 | flag_N = q >> 8; |
27687 | flag_V = flag_C = 0; |
27688 | res = q | (r << 16); |
27689 | DREGu32((Opcode >> 9) & 7) = res; |
27690 | } |
27691 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27692 | end81D0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27693 | #endif |
27694 | RET(112) |
27695 | } |
27696 | |
27697 | // DIVS |
27698 | OPCODE(0x81D8) |
27699 | { |
27700 | u32 adr, res; |
27701 | u32 src, dst; |
27702 | |
27703 | adr = AREG((Opcode >> 0) & 7); |
27704 | AREG((Opcode >> 0) & 7) += 2; |
27705 | PRE_IO |
27706 | READSX_WORD_F(adr, src) |
27707 | if (src == 0) |
27708 | { |
27709 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27710 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27711 | goto end81D8; |
70357ce5 |
27712 | #endif |
27713 | RET(14) |
27714 | } |
27715 | dst = DREGu32((Opcode >> 9) & 7); |
27716 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27717 | { |
27718 | flag_NotZ = flag_N = 0; |
27719 | flag_V = flag_C = 0; |
27720 | res = 0; |
27721 | DREGu32((Opcode >> 9) & 7) = res; |
27722 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27723 | goto end81D8; |
70357ce5 |
27724 | #endif |
27725 | RET(54) |
27726 | } |
27727 | { |
27728 | s32 q, r; |
27729 | |
27730 | q = (s32)dst / (s32)src; |
27731 | r = (s32)dst % (s32)src; |
27732 | |
27733 | if ((q > 0x7FFF) || (q < -0x8000)) |
27734 | { |
27735 | flag_V = M68K_SR_V; |
27736 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27737 | goto end81D8; |
70357ce5 |
27738 | #endif |
27739 | RET(84) |
27740 | } |
27741 | q &= 0x0000FFFF; |
27742 | flag_NotZ = q; |
27743 | flag_N = q >> 8; |
27744 | flag_V = flag_C = 0; |
27745 | res = q | (r << 16); |
27746 | DREGu32((Opcode >> 9) & 7) = res; |
27747 | } |
27748 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27749 | end81D8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27750 | #endif |
27751 | RET(112) |
27752 | } |
27753 | |
27754 | // DIVS |
27755 | OPCODE(0x81E0) |
27756 | { |
27757 | u32 adr, res; |
27758 | u32 src, dst; |
27759 | |
27760 | adr = AREG((Opcode >> 0) & 7) - 2; |
27761 | AREG((Opcode >> 0) & 7) = adr; |
27762 | PRE_IO |
27763 | READSX_WORD_F(adr, src) |
27764 | if (src == 0) |
27765 | { |
27766 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27767 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27768 | goto end81E0; |
70357ce5 |
27769 | #endif |
27770 | RET(16) |
27771 | } |
27772 | dst = DREGu32((Opcode >> 9) & 7); |
27773 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27774 | { |
27775 | flag_NotZ = flag_N = 0; |
27776 | flag_V = flag_C = 0; |
27777 | res = 0; |
27778 | DREGu32((Opcode >> 9) & 7) = res; |
27779 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27780 | goto end81E0; |
70357ce5 |
27781 | #endif |
27782 | RET(56) |
27783 | } |
27784 | { |
27785 | s32 q, r; |
27786 | |
27787 | q = (s32)dst / (s32)src; |
27788 | r = (s32)dst % (s32)src; |
27789 | |
27790 | if ((q > 0x7FFF) || (q < -0x8000)) |
27791 | { |
27792 | flag_V = M68K_SR_V; |
27793 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27794 | goto end81E0; |
70357ce5 |
27795 | #endif |
27796 | RET(86) |
27797 | } |
27798 | q &= 0x0000FFFF; |
27799 | flag_NotZ = q; |
27800 | flag_N = q >> 8; |
27801 | flag_V = flag_C = 0; |
27802 | res = q | (r << 16); |
27803 | DREGu32((Opcode >> 9) & 7) = res; |
27804 | } |
27805 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27806 | end81E0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27807 | #endif |
27808 | RET(114) |
27809 | } |
27810 | |
27811 | // DIVS |
27812 | OPCODE(0x81E8) |
27813 | { |
27814 | u32 adr, res; |
27815 | u32 src, dst; |
27816 | |
27817 | FETCH_SWORD(adr); |
27818 | adr += AREG((Opcode >> 0) & 7); |
27819 | PRE_IO |
27820 | READSX_WORD_F(adr, src) |
27821 | if (src == 0) |
27822 | { |
27823 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27824 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27825 | goto end81E8; |
70357ce5 |
27826 | #endif |
27827 | RET(18) |
27828 | } |
27829 | dst = DREGu32((Opcode >> 9) & 7); |
27830 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27831 | { |
27832 | flag_NotZ = flag_N = 0; |
27833 | flag_V = flag_C = 0; |
27834 | res = 0; |
27835 | DREGu32((Opcode >> 9) & 7) = res; |
27836 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27837 | goto end81E8; |
70357ce5 |
27838 | #endif |
27839 | RET(58) |
27840 | } |
27841 | { |
27842 | s32 q, r; |
27843 | |
27844 | q = (s32)dst / (s32)src; |
27845 | r = (s32)dst % (s32)src; |
27846 | |
27847 | if ((q > 0x7FFF) || (q < -0x8000)) |
27848 | { |
27849 | flag_V = M68K_SR_V; |
27850 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27851 | goto end81E8; |
70357ce5 |
27852 | #endif |
27853 | RET(88) |
27854 | } |
27855 | q &= 0x0000FFFF; |
27856 | flag_NotZ = q; |
27857 | flag_N = q >> 8; |
27858 | flag_V = flag_C = 0; |
27859 | res = q | (r << 16); |
27860 | DREGu32((Opcode >> 9) & 7) = res; |
27861 | } |
27862 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27863 | end81E8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27864 | #endif |
27865 | RET(116) |
27866 | } |
27867 | |
27868 | // DIVS |
27869 | OPCODE(0x81F0) |
27870 | { |
27871 | u32 adr, res; |
27872 | u32 src, dst; |
27873 | |
27874 | adr = AREG((Opcode >> 0) & 7); |
27875 | DECODE_EXT_WORD |
27876 | PRE_IO |
27877 | READSX_WORD_F(adr, src) |
27878 | if (src == 0) |
27879 | { |
27880 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27881 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27882 | goto end81F0; |
70357ce5 |
27883 | #endif |
27884 | RET(20) |
27885 | } |
27886 | dst = DREGu32((Opcode >> 9) & 7); |
27887 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27888 | { |
27889 | flag_NotZ = flag_N = 0; |
27890 | flag_V = flag_C = 0; |
27891 | res = 0; |
27892 | DREGu32((Opcode >> 9) & 7) = res; |
27893 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27894 | goto end81F0; |
70357ce5 |
27895 | #endif |
27896 | RET(60) |
27897 | } |
27898 | { |
27899 | s32 q, r; |
27900 | |
27901 | q = (s32)dst / (s32)src; |
27902 | r = (s32)dst % (s32)src; |
27903 | |
27904 | if ((q > 0x7FFF) || (q < -0x8000)) |
27905 | { |
27906 | flag_V = M68K_SR_V; |
27907 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27908 | goto end81F0; |
70357ce5 |
27909 | #endif |
27910 | RET(90) |
27911 | } |
27912 | q &= 0x0000FFFF; |
27913 | flag_NotZ = q; |
27914 | flag_N = q >> 8; |
27915 | flag_V = flag_C = 0; |
27916 | res = q | (r << 16); |
27917 | DREGu32((Opcode >> 9) & 7) = res; |
27918 | } |
27919 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27920 | end81F0: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27921 | #endif |
27922 | RET(118) |
27923 | } |
27924 | |
27925 | // DIVS |
27926 | OPCODE(0x81F8) |
27927 | { |
27928 | u32 adr, res; |
27929 | u32 src, dst; |
27930 | |
27931 | FETCH_SWORD(adr); |
27932 | PRE_IO |
27933 | READSX_WORD_F(adr, src) |
27934 | if (src == 0) |
27935 | { |
27936 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27937 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27938 | goto end81F8; |
70357ce5 |
27939 | #endif |
27940 | RET(18) |
27941 | } |
27942 | dst = DREGu32((Opcode >> 9) & 7); |
27943 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27944 | { |
27945 | flag_NotZ = flag_N = 0; |
27946 | flag_V = flag_C = 0; |
27947 | res = 0; |
27948 | DREGu32((Opcode >> 9) & 7) = res; |
27949 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27950 | goto end81F8; |
70357ce5 |
27951 | #endif |
27952 | RET(58) |
27953 | } |
27954 | { |
27955 | s32 q, r; |
27956 | |
27957 | q = (s32)dst / (s32)src; |
27958 | r = (s32)dst % (s32)src; |
27959 | |
27960 | if ((q > 0x7FFF) || (q < -0x8000)) |
27961 | { |
27962 | flag_V = M68K_SR_V; |
27963 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27964 | goto end81F8; |
70357ce5 |
27965 | #endif |
27966 | RET(88) |
27967 | } |
27968 | q &= 0x0000FFFF; |
27969 | flag_NotZ = q; |
27970 | flag_N = q >> 8; |
27971 | flag_V = flag_C = 0; |
27972 | res = q | (r << 16); |
27973 | DREGu32((Opcode >> 9) & 7) = res; |
27974 | } |
27975 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27976 | end81F8: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
27977 | #endif |
27978 | RET(116) |
27979 | } |
27980 | |
27981 | // DIVS |
27982 | OPCODE(0x81F9) |
27983 | { |
27984 | u32 adr, res; |
27985 | u32 src, dst; |
27986 | |
27987 | FETCH_LONG(adr); |
27988 | PRE_IO |
27989 | READSX_WORD_F(adr, src) |
27990 | if (src == 0) |
27991 | { |
27992 | execute_exception(M68K_ZERO_DIVIDE_EX); |
27993 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
27994 | goto end81F9; |
70357ce5 |
27995 | #endif |
27996 | RET(22) |
27997 | } |
27998 | dst = DREGu32((Opcode >> 9) & 7); |
27999 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28000 | { |
28001 | flag_NotZ = flag_N = 0; |
28002 | flag_V = flag_C = 0; |
28003 | res = 0; |
28004 | DREGu32((Opcode >> 9) & 7) = res; |
28005 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28006 | goto end81F9; |
70357ce5 |
28007 | #endif |
28008 | RET(62) |
28009 | } |
28010 | { |
28011 | s32 q, r; |
28012 | |
28013 | q = (s32)dst / (s32)src; |
28014 | r = (s32)dst % (s32)src; |
28015 | |
28016 | if ((q > 0x7FFF) || (q < -0x8000)) |
28017 | { |
28018 | flag_V = M68K_SR_V; |
28019 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28020 | goto end81F9; |
70357ce5 |
28021 | #endif |
28022 | RET(92) |
28023 | } |
28024 | q &= 0x0000FFFF; |
28025 | flag_NotZ = q; |
28026 | flag_N = q >> 8; |
28027 | flag_V = flag_C = 0; |
28028 | res = q | (r << 16); |
28029 | DREGu32((Opcode >> 9) & 7) = res; |
28030 | } |
28031 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28032 | end81F9: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28033 | #endif |
28034 | RET(120) |
28035 | } |
28036 | |
28037 | // DIVS |
28038 | OPCODE(0x81FA) |
28039 | { |
28040 | u32 adr, res; |
28041 | u32 src, dst; |
28042 | |
28043 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28044 | PC++; |
28045 | PRE_IO |
28046 | READSX_WORD_F(adr, src) |
28047 | if (src == 0) |
28048 | { |
28049 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28050 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28051 | goto end81FA; |
70357ce5 |
28052 | #endif |
28053 | RET(18) |
28054 | } |
28055 | dst = DREGu32((Opcode >> 9) & 7); |
28056 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28057 | { |
28058 | flag_NotZ = flag_N = 0; |
28059 | flag_V = flag_C = 0; |
28060 | res = 0; |
28061 | DREGu32((Opcode >> 9) & 7) = res; |
28062 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28063 | goto end81FA; |
70357ce5 |
28064 | #endif |
28065 | RET(58) |
28066 | } |
28067 | { |
28068 | s32 q, r; |
28069 | |
28070 | q = (s32)dst / (s32)src; |
28071 | r = (s32)dst % (s32)src; |
28072 | |
28073 | if ((q > 0x7FFF) || (q < -0x8000)) |
28074 | { |
28075 | flag_V = M68K_SR_V; |
28076 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28077 | goto end81FA; |
70357ce5 |
28078 | #endif |
28079 | RET(88) |
28080 | } |
28081 | q &= 0x0000FFFF; |
28082 | flag_NotZ = q; |
28083 | flag_N = q >> 8; |
28084 | flag_V = flag_C = 0; |
28085 | res = q | (r << 16); |
28086 | DREGu32((Opcode >> 9) & 7) = res; |
28087 | } |
28088 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28089 | end81FA: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28090 | #endif |
28091 | RET(116) |
28092 | } |
28093 | |
28094 | // DIVS |
28095 | OPCODE(0x81FB) |
28096 | { |
28097 | u32 adr, res; |
28098 | u32 src, dst; |
28099 | |
28100 | adr = (u32)(PC) - BasePC; |
28101 | DECODE_EXT_WORD |
28102 | PRE_IO |
28103 | READSX_WORD_F(adr, src) |
28104 | if (src == 0) |
28105 | { |
28106 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28107 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28108 | goto end81FB; |
70357ce5 |
28109 | #endif |
28110 | RET(20) |
28111 | } |
28112 | dst = DREGu32((Opcode >> 9) & 7); |
28113 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28114 | { |
28115 | flag_NotZ = flag_N = 0; |
28116 | flag_V = flag_C = 0; |
28117 | res = 0; |
28118 | DREGu32((Opcode >> 9) & 7) = res; |
28119 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28120 | goto end81FB; |
70357ce5 |
28121 | #endif |
28122 | RET(60) |
28123 | } |
28124 | { |
28125 | s32 q, r; |
28126 | |
28127 | q = (s32)dst / (s32)src; |
28128 | r = (s32)dst % (s32)src; |
28129 | |
28130 | if ((q > 0x7FFF) || (q < -0x8000)) |
28131 | { |
28132 | flag_V = M68K_SR_V; |
28133 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28134 | goto end81FB; |
70357ce5 |
28135 | #endif |
28136 | RET(90) |
28137 | } |
28138 | q &= 0x0000FFFF; |
28139 | flag_NotZ = q; |
28140 | flag_N = q >> 8; |
28141 | flag_V = flag_C = 0; |
28142 | res = q | (r << 16); |
28143 | DREGu32((Opcode >> 9) & 7) = res; |
28144 | } |
28145 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28146 | end81FB: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28147 | #endif |
28148 | RET(118) |
28149 | } |
28150 | |
28151 | // DIVS |
28152 | OPCODE(0x81FC) |
28153 | { |
28154 | u32 adr, res; |
28155 | u32 src, dst; |
28156 | |
28157 | FETCH_SWORD(src); |
28158 | if (src == 0) |
28159 | { |
28160 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28161 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28162 | goto end81FC; |
70357ce5 |
28163 | #endif |
28164 | RET(14) |
28165 | } |
28166 | dst = DREGu32((Opcode >> 9) & 7); |
28167 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28168 | { |
28169 | flag_NotZ = flag_N = 0; |
28170 | flag_V = flag_C = 0; |
28171 | res = 0; |
28172 | DREGu32((Opcode >> 9) & 7) = res; |
28173 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28174 | goto end81FC; |
70357ce5 |
28175 | #endif |
28176 | RET(54) |
28177 | } |
28178 | { |
28179 | s32 q, r; |
28180 | |
28181 | q = (s32)dst / (s32)src; |
28182 | r = (s32)dst % (s32)src; |
28183 | |
28184 | if ((q > 0x7FFF) || (q < -0x8000)) |
28185 | { |
28186 | flag_V = M68K_SR_V; |
28187 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28188 | goto end81FC; |
70357ce5 |
28189 | #endif |
28190 | RET(84) |
28191 | } |
28192 | q &= 0x0000FFFF; |
28193 | flag_NotZ = q; |
28194 | flag_N = q >> 8; |
28195 | flag_V = flag_C = 0; |
28196 | res = q | (r << 16); |
28197 | DREGu32((Opcode >> 9) & 7) = res; |
28198 | } |
28199 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28200 | end81FC: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28201 | #endif |
28202 | RET(112) |
28203 | } |
28204 | |
28205 | // DIVS |
28206 | OPCODE(0x81DF) |
28207 | { |
28208 | u32 adr, res; |
28209 | u32 src, dst; |
28210 | |
28211 | adr = AREG(7); |
28212 | AREG(7) += 2; |
28213 | PRE_IO |
28214 | READSX_WORD_F(adr, src) |
28215 | if (src == 0) |
28216 | { |
28217 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28218 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28219 | goto end81DF; |
70357ce5 |
28220 | #endif |
28221 | RET(14) |
28222 | } |
28223 | dst = DREGu32((Opcode >> 9) & 7); |
28224 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28225 | { |
28226 | flag_NotZ = flag_N = 0; |
28227 | flag_V = flag_C = 0; |
28228 | res = 0; |
28229 | DREGu32((Opcode >> 9) & 7) = res; |
28230 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28231 | goto end81DF; |
70357ce5 |
28232 | #endif |
28233 | RET(54) |
28234 | } |
28235 | { |
28236 | s32 q, r; |
28237 | |
28238 | q = (s32)dst / (s32)src; |
28239 | r = (s32)dst % (s32)src; |
28240 | |
28241 | if ((q > 0x7FFF) || (q < -0x8000)) |
28242 | { |
28243 | flag_V = M68K_SR_V; |
28244 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28245 | goto end81DF; |
70357ce5 |
28246 | #endif |
28247 | RET(84) |
28248 | } |
28249 | q &= 0x0000FFFF; |
28250 | flag_NotZ = q; |
28251 | flag_N = q >> 8; |
28252 | flag_V = flag_C = 0; |
28253 | res = q | (r << 16); |
28254 | DREGu32((Opcode >> 9) & 7) = res; |
28255 | } |
28256 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28257 | end81DF: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28258 | #endif |
28259 | RET(112) |
28260 | } |
28261 | |
28262 | // DIVS |
28263 | OPCODE(0x81E7) |
28264 | { |
28265 | u32 adr, res; |
28266 | u32 src, dst; |
28267 | |
28268 | adr = AREG(7) - 2; |
28269 | AREG(7) = adr; |
28270 | PRE_IO |
28271 | READSX_WORD_F(adr, src) |
28272 | if (src == 0) |
28273 | { |
28274 | execute_exception(M68K_ZERO_DIVIDE_EX); |
28275 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28276 | goto end81E7; |
70357ce5 |
28277 | #endif |
28278 | RET(16) |
28279 | } |
28280 | dst = DREGu32((Opcode >> 9) & 7); |
28281 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28282 | { |
28283 | flag_NotZ = flag_N = 0; |
28284 | flag_V = flag_C = 0; |
28285 | res = 0; |
28286 | DREGu32((Opcode >> 9) & 7) = res; |
28287 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28288 | goto end81E7; |
70357ce5 |
28289 | #endif |
28290 | RET(56) |
28291 | } |
28292 | { |
28293 | s32 q, r; |
28294 | |
28295 | q = (s32)dst / (s32)src; |
28296 | r = (s32)dst % (s32)src; |
28297 | |
28298 | if ((q > 0x7FFF) || (q < -0x8000)) |
28299 | { |
28300 | flag_V = M68K_SR_V; |
28301 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28302 | goto end81E7; |
70357ce5 |
28303 | #endif |
28304 | RET(86) |
28305 | } |
28306 | q &= 0x0000FFFF; |
28307 | flag_NotZ = q; |
28308 | flag_N = q >> 8; |
28309 | flag_V = flag_C = 0; |
28310 | res = q | (r << 16); |
28311 | DREGu32((Opcode >> 9) & 7) = res; |
28312 | } |
28313 | #ifdef USE_CYCLONE_TIMING_DIV |
9112b6ce |
28314 | end81E7: m68kcontext.io_cycle_counter -= 50; |
70357ce5 |
28315 | #endif |
28316 | RET(114) |
28317 | } |
28318 | |
28319 | // SUBaD |
28320 | OPCODE(0x9000) |
28321 | { |
28322 | u32 adr, res; |
28323 | u32 src, dst; |
28324 | |
28325 | src = DREGu8((Opcode >> 0) & 7); |
28326 | dst = DREGu8((Opcode >> 9) & 7); |
28327 | res = dst - src; |
28328 | flag_N = flag_X = flag_C = res; |
28329 | flag_V = (src ^ dst) & (res ^ dst); |
28330 | flag_NotZ = res & 0xFF; |
28331 | DREGu8((Opcode >> 9) & 7) = res; |
28332 | RET(4) |
28333 | } |
28334 | |
28335 | // SUBaD |
28336 | OPCODE(0x9008) |
28337 | { |
28338 | u32 adr, res; |
28339 | u32 src, dst; |
28340 | |
28341 | // can't read byte from Ax registers ! |
28342 | m68kcontext.execinfo |= M68K_FAULTED; |
28343 | m68kcontext.io_cycle_counter = 0; |
28344 | /* |
28345 | goto famec_Exec_End; |
28346 | dst = DREGu8((Opcode >> 9) & 7); |
28347 | res = dst - src; |
28348 | flag_N = flag_X = flag_C = res; |
28349 | flag_V = (src ^ dst) & (res ^ dst); |
28350 | flag_NotZ = res & 0xFF; |
28351 | DREGu8((Opcode >> 9) & 7) = res; |
28352 | */ |
28353 | RET(4) |
28354 | } |
28355 | |
28356 | // SUBaD |
28357 | OPCODE(0x9010) |
28358 | { |
28359 | u32 adr, res; |
28360 | u32 src, dst; |
28361 | |
28362 | adr = AREG((Opcode >> 0) & 7); |
28363 | PRE_IO |
28364 | READ_BYTE_F(adr, src) |
28365 | dst = DREGu8((Opcode >> 9) & 7); |
28366 | res = dst - src; |
28367 | flag_N = flag_X = flag_C = res; |
28368 | flag_V = (src ^ dst) & (res ^ dst); |
28369 | flag_NotZ = res & 0xFF; |
28370 | DREGu8((Opcode >> 9) & 7) = res; |
28371 | POST_IO |
28372 | RET(8) |
28373 | } |
28374 | |
28375 | // SUBaD |
28376 | OPCODE(0x9018) |
28377 | { |
28378 | u32 adr, res; |
28379 | u32 src, dst; |
28380 | |
28381 | adr = AREG((Opcode >> 0) & 7); |
28382 | AREG((Opcode >> 0) & 7) += 1; |
28383 | PRE_IO |
28384 | READ_BYTE_F(adr, src) |
28385 | dst = DREGu8((Opcode >> 9) & 7); |
28386 | res = dst - src; |
28387 | flag_N = flag_X = flag_C = res; |
28388 | flag_V = (src ^ dst) & (res ^ dst); |
28389 | flag_NotZ = res & 0xFF; |
28390 | DREGu8((Opcode >> 9) & 7) = res; |
28391 | POST_IO |
28392 | RET(8) |
28393 | } |
28394 | |
28395 | // SUBaD |
28396 | OPCODE(0x9020) |
28397 | { |
28398 | u32 adr, res; |
28399 | u32 src, dst; |
28400 | |
28401 | adr = AREG((Opcode >> 0) & 7) - 1; |
28402 | AREG((Opcode >> 0) & 7) = adr; |
28403 | PRE_IO |
28404 | READ_BYTE_F(adr, src) |
28405 | dst = DREGu8((Opcode >> 9) & 7); |
28406 | res = dst - src; |
28407 | flag_N = flag_X = flag_C = res; |
28408 | flag_V = (src ^ dst) & (res ^ dst); |
28409 | flag_NotZ = res & 0xFF; |
28410 | DREGu8((Opcode >> 9) & 7) = res; |
28411 | POST_IO |
28412 | RET(10) |
28413 | } |
28414 | |
28415 | // SUBaD |
28416 | OPCODE(0x9028) |
28417 | { |
28418 | u32 adr, res; |
28419 | u32 src, dst; |
28420 | |
28421 | FETCH_SWORD(adr); |
28422 | adr += AREG((Opcode >> 0) & 7); |
28423 | PRE_IO |
28424 | READ_BYTE_F(adr, src) |
28425 | dst = DREGu8((Opcode >> 9) & 7); |
28426 | res = dst - src; |
28427 | flag_N = flag_X = flag_C = res; |
28428 | flag_V = (src ^ dst) & (res ^ dst); |
28429 | flag_NotZ = res & 0xFF; |
28430 | DREGu8((Opcode >> 9) & 7) = res; |
28431 | POST_IO |
28432 | RET(12) |
28433 | } |
28434 | |
28435 | // SUBaD |
28436 | OPCODE(0x9030) |
28437 | { |
28438 | u32 adr, res; |
28439 | u32 src, dst; |
28440 | |
28441 | adr = AREG((Opcode >> 0) & 7); |
28442 | DECODE_EXT_WORD |
28443 | PRE_IO |
28444 | READ_BYTE_F(adr, src) |
28445 | dst = DREGu8((Opcode >> 9) & 7); |
28446 | res = dst - src; |
28447 | flag_N = flag_X = flag_C = res; |
28448 | flag_V = (src ^ dst) & (res ^ dst); |
28449 | flag_NotZ = res & 0xFF; |
28450 | DREGu8((Opcode >> 9) & 7) = res; |
28451 | POST_IO |
28452 | RET(14) |
28453 | } |
28454 | |
28455 | // SUBaD |
28456 | OPCODE(0x9038) |
28457 | { |
28458 | u32 adr, res; |
28459 | u32 src, dst; |
28460 | |
28461 | FETCH_SWORD(adr); |
28462 | PRE_IO |
28463 | READ_BYTE_F(adr, src) |
28464 | dst = DREGu8((Opcode >> 9) & 7); |
28465 | res = dst - src; |
28466 | flag_N = flag_X = flag_C = res; |
28467 | flag_V = (src ^ dst) & (res ^ dst); |
28468 | flag_NotZ = res & 0xFF; |
28469 | DREGu8((Opcode >> 9) & 7) = res; |
28470 | POST_IO |
28471 | RET(12) |
28472 | } |
28473 | |
28474 | // SUBaD |
28475 | OPCODE(0x9039) |
28476 | { |
28477 | u32 adr, res; |
28478 | u32 src, dst; |
28479 | |
28480 | FETCH_LONG(adr); |
28481 | PRE_IO |
28482 | READ_BYTE_F(adr, src) |
28483 | dst = DREGu8((Opcode >> 9) & 7); |
28484 | res = dst - src; |
28485 | flag_N = flag_X = flag_C = res; |
28486 | flag_V = (src ^ dst) & (res ^ dst); |
28487 | flag_NotZ = res & 0xFF; |
28488 | DREGu8((Opcode >> 9) & 7) = res; |
28489 | POST_IO |
28490 | RET(16) |
28491 | } |
28492 | |
28493 | // SUBaD |
28494 | OPCODE(0x903A) |
28495 | { |
28496 | u32 adr, res; |
28497 | u32 src, dst; |
28498 | |
28499 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28500 | PC++; |
28501 | PRE_IO |
28502 | READ_BYTE_F(adr, src) |
28503 | dst = DREGu8((Opcode >> 9) & 7); |
28504 | res = dst - src; |
28505 | flag_N = flag_X = flag_C = res; |
28506 | flag_V = (src ^ dst) & (res ^ dst); |
28507 | flag_NotZ = res & 0xFF; |
28508 | DREGu8((Opcode >> 9) & 7) = res; |
28509 | POST_IO |
28510 | RET(12) |
28511 | } |
28512 | |
28513 | // SUBaD |
28514 | OPCODE(0x903B) |
28515 | { |
28516 | u32 adr, res; |
28517 | u32 src, dst; |
28518 | |
28519 | adr = (u32)(PC) - BasePC; |
28520 | DECODE_EXT_WORD |
28521 | PRE_IO |
28522 | READ_BYTE_F(adr, src) |
28523 | dst = DREGu8((Opcode >> 9) & 7); |
28524 | res = dst - src; |
28525 | flag_N = flag_X = flag_C = res; |
28526 | flag_V = (src ^ dst) & (res ^ dst); |
28527 | flag_NotZ = res & 0xFF; |
28528 | DREGu8((Opcode >> 9) & 7) = res; |
28529 | POST_IO |
28530 | RET(14) |
28531 | } |
28532 | |
28533 | // SUBaD |
28534 | OPCODE(0x903C) |
28535 | { |
28536 | u32 adr, res; |
28537 | u32 src, dst; |
28538 | |
28539 | FETCH_BYTE(src); |
28540 | dst = DREGu8((Opcode >> 9) & 7); |
28541 | res = dst - src; |
28542 | flag_N = flag_X = flag_C = res; |
28543 | flag_V = (src ^ dst) & (res ^ dst); |
28544 | flag_NotZ = res & 0xFF; |
28545 | DREGu8((Opcode >> 9) & 7) = res; |
28546 | RET(8) |
28547 | } |
28548 | |
28549 | // SUBaD |
28550 | OPCODE(0x901F) |
28551 | { |
28552 | u32 adr, res; |
28553 | u32 src, dst; |
28554 | |
28555 | adr = AREG(7); |
28556 | AREG(7) += 2; |
28557 | PRE_IO |
28558 | READ_BYTE_F(adr, src) |
28559 | dst = DREGu8((Opcode >> 9) & 7); |
28560 | res = dst - src; |
28561 | flag_N = flag_X = flag_C = res; |
28562 | flag_V = (src ^ dst) & (res ^ dst); |
28563 | flag_NotZ = res & 0xFF; |
28564 | DREGu8((Opcode >> 9) & 7) = res; |
28565 | POST_IO |
28566 | RET(8) |
28567 | } |
28568 | |
28569 | // SUBaD |
28570 | OPCODE(0x9027) |
28571 | { |
28572 | u32 adr, res; |
28573 | u32 src, dst; |
28574 | |
28575 | adr = AREG(7) - 2; |
28576 | AREG(7) = adr; |
28577 | PRE_IO |
28578 | READ_BYTE_F(adr, src) |
28579 | dst = DREGu8((Opcode >> 9) & 7); |
28580 | res = dst - src; |
28581 | flag_N = flag_X = flag_C = res; |
28582 | flag_V = (src ^ dst) & (res ^ dst); |
28583 | flag_NotZ = res & 0xFF; |
28584 | DREGu8((Opcode >> 9) & 7) = res; |
28585 | POST_IO |
28586 | RET(10) |
28587 | } |
28588 | |
28589 | // SUBaD |
28590 | OPCODE(0x9040) |
28591 | { |
28592 | u32 adr, res; |
28593 | u32 src, dst; |
28594 | |
28595 | src = DREGu16((Opcode >> 0) & 7); |
28596 | dst = DREGu16((Opcode >> 9) & 7); |
28597 | res = dst - src; |
28598 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28599 | flag_N = flag_X = flag_C = res >> 8; |
28600 | flag_NotZ = res & 0xFFFF; |
28601 | DREGu16((Opcode >> 9) & 7) = res; |
28602 | RET(4) |
28603 | } |
28604 | |
28605 | // SUBaD |
28606 | OPCODE(0x9048) |
28607 | { |
28608 | u32 adr, res; |
28609 | u32 src, dst; |
28610 | |
28611 | src = AREGu16((Opcode >> 0) & 7); |
28612 | dst = DREGu16((Opcode >> 9) & 7); |
28613 | res = dst - src; |
28614 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28615 | flag_N = flag_X = flag_C = res >> 8; |
28616 | flag_NotZ = res & 0xFFFF; |
28617 | DREGu16((Opcode >> 9) & 7) = res; |
28618 | RET(4) |
28619 | } |
28620 | |
28621 | // SUBaD |
28622 | OPCODE(0x9050) |
28623 | { |
28624 | u32 adr, res; |
28625 | u32 src, dst; |
28626 | |
28627 | adr = AREG((Opcode >> 0) & 7); |
28628 | PRE_IO |
28629 | READ_WORD_F(adr, src) |
28630 | dst = DREGu16((Opcode >> 9) & 7); |
28631 | res = dst - src; |
28632 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28633 | flag_N = flag_X = flag_C = res >> 8; |
28634 | flag_NotZ = res & 0xFFFF; |
28635 | DREGu16((Opcode >> 9) & 7) = res; |
28636 | POST_IO |
28637 | RET(8) |
28638 | } |
28639 | |
28640 | // SUBaD |
28641 | OPCODE(0x9058) |
28642 | { |
28643 | u32 adr, res; |
28644 | u32 src, dst; |
28645 | |
28646 | adr = AREG((Opcode >> 0) & 7); |
28647 | AREG((Opcode >> 0) & 7) += 2; |
28648 | PRE_IO |
28649 | READ_WORD_F(adr, src) |
28650 | dst = DREGu16((Opcode >> 9) & 7); |
28651 | res = dst - src; |
28652 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28653 | flag_N = flag_X = flag_C = res >> 8; |
28654 | flag_NotZ = res & 0xFFFF; |
28655 | DREGu16((Opcode >> 9) & 7) = res; |
28656 | POST_IO |
28657 | RET(8) |
28658 | } |
28659 | |
28660 | // SUBaD |
28661 | OPCODE(0x9060) |
28662 | { |
28663 | u32 adr, res; |
28664 | u32 src, dst; |
28665 | |
28666 | adr = AREG((Opcode >> 0) & 7) - 2; |
28667 | AREG((Opcode >> 0) & 7) = adr; |
28668 | PRE_IO |
28669 | READ_WORD_F(adr, src) |
28670 | dst = DREGu16((Opcode >> 9) & 7); |
28671 | res = dst - src; |
28672 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28673 | flag_N = flag_X = flag_C = res >> 8; |
28674 | flag_NotZ = res & 0xFFFF; |
28675 | DREGu16((Opcode >> 9) & 7) = res; |
28676 | POST_IO |
28677 | RET(10) |
28678 | } |
28679 | |
28680 | // SUBaD |
28681 | OPCODE(0x9068) |
28682 | { |
28683 | u32 adr, res; |
28684 | u32 src, dst; |
28685 | |
28686 | FETCH_SWORD(adr); |
28687 | adr += AREG((Opcode >> 0) & 7); |
28688 | PRE_IO |
28689 | READ_WORD_F(adr, src) |
28690 | dst = DREGu16((Opcode >> 9) & 7); |
28691 | res = dst - src; |
28692 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28693 | flag_N = flag_X = flag_C = res >> 8; |
28694 | flag_NotZ = res & 0xFFFF; |
28695 | DREGu16((Opcode >> 9) & 7) = res; |
28696 | POST_IO |
28697 | RET(12) |
28698 | } |
28699 | |
28700 | // SUBaD |
28701 | OPCODE(0x9070) |
28702 | { |
28703 | u32 adr, res; |
28704 | u32 src, dst; |
28705 | |
28706 | adr = AREG((Opcode >> 0) & 7); |
28707 | DECODE_EXT_WORD |
28708 | PRE_IO |
28709 | READ_WORD_F(adr, src) |
28710 | dst = DREGu16((Opcode >> 9) & 7); |
28711 | res = dst - src; |
28712 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28713 | flag_N = flag_X = flag_C = res >> 8; |
28714 | flag_NotZ = res & 0xFFFF; |
28715 | DREGu16((Opcode >> 9) & 7) = res; |
28716 | POST_IO |
28717 | RET(14) |
28718 | } |
28719 | |
28720 | // SUBaD |
28721 | OPCODE(0x9078) |
28722 | { |
28723 | u32 adr, res; |
28724 | u32 src, dst; |
28725 | |
28726 | FETCH_SWORD(adr); |
28727 | PRE_IO |
28728 | READ_WORD_F(adr, src) |
28729 | dst = DREGu16((Opcode >> 9) & 7); |
28730 | res = dst - src; |
28731 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28732 | flag_N = flag_X = flag_C = res >> 8; |
28733 | flag_NotZ = res & 0xFFFF; |
28734 | DREGu16((Opcode >> 9) & 7) = res; |
28735 | POST_IO |
28736 | RET(12) |
28737 | } |
28738 | |
28739 | // SUBaD |
28740 | OPCODE(0x9079) |
28741 | { |
28742 | u32 adr, res; |
28743 | u32 src, dst; |
28744 | |
28745 | FETCH_LONG(adr); |
28746 | PRE_IO |
28747 | READ_WORD_F(adr, src) |
28748 | dst = DREGu16((Opcode >> 9) & 7); |
28749 | res = dst - src; |
28750 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28751 | flag_N = flag_X = flag_C = res >> 8; |
28752 | flag_NotZ = res & 0xFFFF; |
28753 | DREGu16((Opcode >> 9) & 7) = res; |
28754 | POST_IO |
28755 | RET(16) |
28756 | } |
28757 | |
28758 | // SUBaD |
28759 | OPCODE(0x907A) |
28760 | { |
28761 | u32 adr, res; |
28762 | u32 src, dst; |
28763 | |
28764 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
28765 | PC++; |
28766 | PRE_IO |
28767 | READ_WORD_F(adr, src) |
28768 | dst = DREGu16((Opcode >> 9) & 7); |
28769 | res = dst - src; |
28770 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28771 | flag_N = flag_X = flag_C = res >> 8; |
28772 | flag_NotZ = res & 0xFFFF; |
28773 | DREGu16((Opcode >> 9) & 7) = res; |
28774 | POST_IO |
28775 | RET(12) |
28776 | } |
28777 | |
28778 | // SUBaD |
28779 | OPCODE(0x907B) |
28780 | { |
28781 | u32 adr, res; |
28782 | u32 src, dst; |
28783 | |
28784 | adr = (u32)(PC) - BasePC; |
28785 | DECODE_EXT_WORD |
28786 | PRE_IO |
28787 | READ_WORD_F(adr, src) |
28788 | dst = DREGu16((Opcode >> 9) & 7); |
28789 | res = dst - src; |
28790 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28791 | flag_N = flag_X = flag_C = res >> 8; |
28792 | flag_NotZ = res & 0xFFFF; |
28793 | DREGu16((Opcode >> 9) & 7) = res; |
28794 | POST_IO |
28795 | RET(14) |
28796 | } |
28797 | |
28798 | // SUBaD |
28799 | OPCODE(0x907C) |
28800 | { |
28801 | u32 adr, res; |
28802 | u32 src, dst; |
28803 | |
28804 | FETCH_WORD(src); |
28805 | dst = DREGu16((Opcode >> 9) & 7); |
28806 | res = dst - src; |
28807 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28808 | flag_N = flag_X = flag_C = res >> 8; |
28809 | flag_NotZ = res & 0xFFFF; |
28810 | DREGu16((Opcode >> 9) & 7) = res; |
28811 | RET(8) |
28812 | } |
28813 | |
28814 | // SUBaD |
28815 | OPCODE(0x905F) |
28816 | { |
28817 | u32 adr, res; |
28818 | u32 src, dst; |
28819 | |
28820 | adr = AREG(7); |
28821 | AREG(7) += 2; |
28822 | PRE_IO |
28823 | READ_WORD_F(adr, src) |
28824 | dst = DREGu16((Opcode >> 9) & 7); |
28825 | res = dst - src; |
28826 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28827 | flag_N = flag_X = flag_C = res >> 8; |
28828 | flag_NotZ = res & 0xFFFF; |
28829 | DREGu16((Opcode >> 9) & 7) = res; |
28830 | POST_IO |
28831 | RET(8) |
28832 | } |
28833 | |
28834 | // SUBaD |
28835 | OPCODE(0x9067) |
28836 | { |
28837 | u32 adr, res; |
28838 | u32 src, dst; |
28839 | |
28840 | adr = AREG(7) - 2; |
28841 | AREG(7) = adr; |
28842 | PRE_IO |
28843 | READ_WORD_F(adr, src) |
28844 | dst = DREGu16((Opcode >> 9) & 7); |
28845 | res = dst - src; |
28846 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28847 | flag_N = flag_X = flag_C = res >> 8; |
28848 | flag_NotZ = res & 0xFFFF; |
28849 | DREGu16((Opcode >> 9) & 7) = res; |
28850 | POST_IO |
28851 | RET(10) |
28852 | } |
28853 | |
28854 | // SUBaD |
28855 | OPCODE(0x9080) |
28856 | { |
28857 | u32 adr, res; |
28858 | u32 src, dst; |
28859 | |
28860 | src = DREGu32((Opcode >> 0) & 7); |
28861 | dst = DREGu32((Opcode >> 9) & 7); |
28862 | res = dst - src; |
28863 | flag_NotZ = res; |
28864 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28865 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28866 | flag_N = res >> 24; |
28867 | DREGu32((Opcode >> 9) & 7) = res; |
28868 | RET(8) |
28869 | } |
28870 | |
28871 | // SUBaD |
28872 | OPCODE(0x9088) |
28873 | { |
28874 | u32 adr, res; |
28875 | u32 src, dst; |
28876 | |
28877 | src = AREGu32((Opcode >> 0) & 7); |
28878 | dst = DREGu32((Opcode >> 9) & 7); |
28879 | res = dst - src; |
28880 | flag_NotZ = res; |
28881 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28882 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28883 | flag_N = res >> 24; |
28884 | DREGu32((Opcode >> 9) & 7) = res; |
28885 | RET(8) |
28886 | } |
28887 | |
28888 | // SUBaD |
28889 | OPCODE(0x9090) |
28890 | { |
28891 | u32 adr, res; |
28892 | u32 src, dst; |
28893 | |
28894 | adr = AREG((Opcode >> 0) & 7); |
28895 | PRE_IO |
28896 | READ_LONG_F(adr, src) |
28897 | dst = DREGu32((Opcode >> 9) & 7); |
28898 | res = dst - src; |
28899 | flag_NotZ = res; |
28900 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28901 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28902 | flag_N = res >> 24; |
28903 | DREGu32((Opcode >> 9) & 7) = res; |
28904 | POST_IO |
28905 | RET(14) |
28906 | } |
28907 | |
28908 | // SUBaD |
28909 | OPCODE(0x9098) |
28910 | { |
28911 | u32 adr, res; |
28912 | u32 src, dst; |
28913 | |
28914 | adr = AREG((Opcode >> 0) & 7); |
28915 | AREG((Opcode >> 0) & 7) += 4; |
28916 | PRE_IO |
28917 | READ_LONG_F(adr, src) |
28918 | dst = DREGu32((Opcode >> 9) & 7); |
28919 | res = dst - src; |
28920 | flag_NotZ = res; |
28921 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28922 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28923 | flag_N = res >> 24; |
28924 | DREGu32((Opcode >> 9) & 7) = res; |
28925 | POST_IO |
28926 | RET(14) |
28927 | } |
28928 | |
28929 | // SUBaD |
28930 | OPCODE(0x90A0) |
28931 | { |
28932 | u32 adr, res; |
28933 | u32 src, dst; |
28934 | |
28935 | adr = AREG((Opcode >> 0) & 7) - 4; |
28936 | AREG((Opcode >> 0) & 7) = adr; |
28937 | PRE_IO |
28938 | READ_LONG_F(adr, src) |
28939 | dst = DREGu32((Opcode >> 9) & 7); |
28940 | res = dst - src; |
28941 | flag_NotZ = res; |
28942 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28943 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28944 | flag_N = res >> 24; |
28945 | DREGu32((Opcode >> 9) & 7) = res; |
28946 | POST_IO |
28947 | RET(16) |
28948 | } |
28949 | |
28950 | // SUBaD |
28951 | OPCODE(0x90A8) |
28952 | { |
28953 | u32 adr, res; |
28954 | u32 src, dst; |
28955 | |
28956 | FETCH_SWORD(adr); |
28957 | adr += AREG((Opcode >> 0) & 7); |
28958 | PRE_IO |
28959 | READ_LONG_F(adr, src) |
28960 | dst = DREGu32((Opcode >> 9) & 7); |
28961 | res = dst - src; |
28962 | flag_NotZ = res; |
28963 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28964 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28965 | flag_N = res >> 24; |
28966 | DREGu32((Opcode >> 9) & 7) = res; |
28967 | POST_IO |
28968 | RET(18) |
28969 | } |
28970 | |
28971 | // SUBaD |
28972 | OPCODE(0x90B0) |
28973 | { |
28974 | u32 adr, res; |
28975 | u32 src, dst; |
28976 | |
28977 | adr = AREG((Opcode >> 0) & 7); |
28978 | DECODE_EXT_WORD |
28979 | PRE_IO |
28980 | READ_LONG_F(adr, src) |
28981 | dst = DREGu32((Opcode >> 9) & 7); |
28982 | res = dst - src; |
28983 | flag_NotZ = res; |
28984 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
28985 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
28986 | flag_N = res >> 24; |
28987 | DREGu32((Opcode >> 9) & 7) = res; |
28988 | POST_IO |
28989 | RET(20) |
28990 | } |
28991 | |
28992 | // SUBaD |
28993 | OPCODE(0x90B8) |
28994 | { |
28995 | u32 adr, res; |
28996 | u32 src, dst; |
28997 | |
28998 | FETCH_SWORD(adr); |
28999 | PRE_IO |
29000 | READ_LONG_F(adr, src) |
29001 | dst = DREGu32((Opcode >> 9) & 7); |
29002 | res = dst - src; |
29003 | flag_NotZ = res; |
29004 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29005 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29006 | flag_N = res >> 24; |
29007 | DREGu32((Opcode >> 9) & 7) = res; |
29008 | POST_IO |
29009 | RET(18) |
29010 | } |
29011 | |
29012 | // SUBaD |
29013 | OPCODE(0x90B9) |
29014 | { |
29015 | u32 adr, res; |
29016 | u32 src, dst; |
29017 | |
29018 | FETCH_LONG(adr); |
29019 | PRE_IO |
29020 | READ_LONG_F(adr, src) |
29021 | dst = DREGu32((Opcode >> 9) & 7); |
29022 | res = dst - src; |
29023 | flag_NotZ = res; |
29024 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29025 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29026 | flag_N = res >> 24; |
29027 | DREGu32((Opcode >> 9) & 7) = res; |
29028 | POST_IO |
29029 | RET(22) |
29030 | } |
29031 | |
29032 | // SUBaD |
29033 | OPCODE(0x90BA) |
29034 | { |
29035 | u32 adr, res; |
29036 | u32 src, dst; |
29037 | |
29038 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
29039 | PC++; |
29040 | PRE_IO |
29041 | READ_LONG_F(adr, src) |
29042 | dst = DREGu32((Opcode >> 9) & 7); |
29043 | res = dst - src; |
29044 | flag_NotZ = res; |
29045 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29046 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29047 | flag_N = res >> 24; |
29048 | DREGu32((Opcode >> 9) & 7) = res; |
29049 | POST_IO |
29050 | RET(18) |
29051 | } |
29052 | |
29053 | // SUBaD |
29054 | OPCODE(0x90BB) |
29055 | { |
29056 | u32 adr, res; |
29057 | u32 src, dst; |
29058 | |
29059 | adr = (u32)(PC) - BasePC; |
29060 | DECODE_EXT_WORD |
29061 | PRE_IO |
29062 | READ_LONG_F(adr, src) |
29063 | dst = DREGu32((Opcode >> 9) & 7); |
29064 | res = dst - src; |
29065 | flag_NotZ = res; |
29066 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29067 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29068 | flag_N = res >> 24; |
29069 | DREGu32((Opcode >> 9) & 7) = res; |
29070 | POST_IO |
29071 | RET(20) |
29072 | } |
29073 | |
29074 | // SUBaD |
29075 | OPCODE(0x90BC) |
29076 | { |
29077 | u32 adr, res; |
29078 | u32 src, dst; |
29079 | |
29080 | FETCH_LONG(src); |
29081 | dst = DREGu32((Opcode >> 9) & 7); |
29082 | res = dst - src; |
29083 | flag_NotZ = res; |
29084 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29085 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29086 | flag_N = res >> 24; |
29087 | DREGu32((Opcode >> 9) & 7) = res; |
29088 | RET(16) |
29089 | } |
29090 | |
29091 | // SUBaD |
29092 | OPCODE(0x909F) |
29093 | { |
29094 | u32 adr, res; |
29095 | u32 src, dst; |
29096 | |
29097 | adr = AREG(7); |
29098 | AREG(7) += 4; |
29099 | PRE_IO |
29100 | READ_LONG_F(adr, src) |
29101 | dst = DREGu32((Opcode >> 9) & 7); |
29102 | res = dst - src; |
29103 | flag_NotZ = res; |
29104 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29105 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29106 | flag_N = res >> 24; |
29107 | DREGu32((Opcode >> 9) & 7) = res; |
29108 | POST_IO |
29109 | RET(14) |
29110 | } |
29111 | |
29112 | // SUBaD |
29113 | OPCODE(0x90A7) |
29114 | { |
29115 | u32 adr, res; |
29116 | u32 src, dst; |
29117 | |
29118 | adr = AREG(7) - 4; |
29119 | AREG(7) = adr; |
29120 | PRE_IO |
29121 | READ_LONG_F(adr, src) |
29122 | dst = DREGu32((Opcode >> 9) & 7); |
29123 | res = dst - src; |
29124 | flag_NotZ = res; |
29125 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29126 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29127 | flag_N = res >> 24; |
29128 | DREGu32((Opcode >> 9) & 7) = res; |
29129 | POST_IO |
29130 | RET(16) |
29131 | } |
29132 | |
29133 | // SUBDa |
29134 | OPCODE(0x9110) |
29135 | { |
29136 | u32 adr, res; |
29137 | u32 src, dst; |
29138 | |
29139 | src = DREGu8((Opcode >> 9) & 7); |
29140 | adr = AREG((Opcode >> 0) & 7); |
29141 | PRE_IO |
29142 | READ_BYTE_F(adr, dst) |
29143 | res = dst - src; |
29144 | flag_N = flag_X = flag_C = res; |
29145 | flag_V = (src ^ dst) & (res ^ dst); |
29146 | flag_NotZ = res & 0xFF; |
29147 | WRITE_BYTE_F(adr, res) |
29148 | POST_IO |
29149 | RET(12) |
29150 | } |
29151 | |
29152 | // SUBDa |
29153 | OPCODE(0x9118) |
29154 | { |
29155 | u32 adr, res; |
29156 | u32 src, dst; |
29157 | |
29158 | src = DREGu8((Opcode >> 9) & 7); |
29159 | adr = AREG((Opcode >> 0) & 7); |
29160 | AREG((Opcode >> 0) & 7) += 1; |
29161 | PRE_IO |
29162 | READ_BYTE_F(adr, dst) |
29163 | res = dst - src; |
29164 | flag_N = flag_X = flag_C = res; |
29165 | flag_V = (src ^ dst) & (res ^ dst); |
29166 | flag_NotZ = res & 0xFF; |
29167 | WRITE_BYTE_F(adr, res) |
29168 | POST_IO |
29169 | RET(12) |
29170 | } |
29171 | |
29172 | // SUBDa |
29173 | OPCODE(0x9120) |
29174 | { |
29175 | u32 adr, res; |
29176 | u32 src, dst; |
29177 | |
29178 | src = DREGu8((Opcode >> 9) & 7); |
29179 | adr = AREG((Opcode >> 0) & 7) - 1; |
29180 | AREG((Opcode >> 0) & 7) = adr; |
29181 | PRE_IO |
29182 | READ_BYTE_F(adr, dst) |
29183 | res = dst - src; |
29184 | flag_N = flag_X = flag_C = res; |
29185 | flag_V = (src ^ dst) & (res ^ dst); |
29186 | flag_NotZ = res & 0xFF; |
29187 | WRITE_BYTE_F(adr, res) |
29188 | POST_IO |
29189 | RET(14) |
29190 | } |
29191 | |
29192 | // SUBDa |
29193 | OPCODE(0x9128) |
29194 | { |
29195 | u32 adr, res; |
29196 | u32 src, dst; |
29197 | |
29198 | src = DREGu8((Opcode >> 9) & 7); |
29199 | FETCH_SWORD(adr); |
29200 | adr += AREG((Opcode >> 0) & 7); |
29201 | PRE_IO |
29202 | READ_BYTE_F(adr, dst) |
29203 | res = dst - src; |
29204 | flag_N = flag_X = flag_C = res; |
29205 | flag_V = (src ^ dst) & (res ^ dst); |
29206 | flag_NotZ = res & 0xFF; |
29207 | WRITE_BYTE_F(adr, res) |
29208 | POST_IO |
29209 | RET(16) |
29210 | } |
29211 | |
29212 | // SUBDa |
29213 | OPCODE(0x9130) |
29214 | { |
29215 | u32 adr, res; |
29216 | u32 src, dst; |
29217 | |
29218 | src = DREGu8((Opcode >> 9) & 7); |
29219 | adr = AREG((Opcode >> 0) & 7); |
29220 | DECODE_EXT_WORD |
29221 | PRE_IO |
29222 | READ_BYTE_F(adr, dst) |
29223 | res = dst - src; |
29224 | flag_N = flag_X = flag_C = res; |
29225 | flag_V = (src ^ dst) & (res ^ dst); |
29226 | flag_NotZ = res & 0xFF; |
29227 | WRITE_BYTE_F(adr, res) |
29228 | POST_IO |
29229 | RET(18) |
29230 | } |
29231 | |
29232 | // SUBDa |
29233 | OPCODE(0x9138) |
29234 | { |
29235 | u32 adr, res; |
29236 | u32 src, dst; |
29237 | |
29238 | src = DREGu8((Opcode >> 9) & 7); |
29239 | FETCH_SWORD(adr); |
29240 | PRE_IO |
29241 | READ_BYTE_F(adr, dst) |
29242 | res = dst - src; |
29243 | flag_N = flag_X = flag_C = res; |
29244 | flag_V = (src ^ dst) & (res ^ dst); |
29245 | flag_NotZ = res & 0xFF; |
29246 | WRITE_BYTE_F(adr, res) |
29247 | POST_IO |
29248 | RET(16) |
29249 | } |
29250 | |
29251 | // SUBDa |
29252 | OPCODE(0x9139) |
29253 | { |
29254 | u32 adr, res; |
29255 | u32 src, dst; |
29256 | |
29257 | src = DREGu8((Opcode >> 9) & 7); |
29258 | FETCH_LONG(adr); |
29259 | PRE_IO |
29260 | READ_BYTE_F(adr, dst) |
29261 | res = dst - src; |
29262 | flag_N = flag_X = flag_C = res; |
29263 | flag_V = (src ^ dst) & (res ^ dst); |
29264 | flag_NotZ = res & 0xFF; |
29265 | WRITE_BYTE_F(adr, res) |
29266 | POST_IO |
29267 | RET(20) |
29268 | } |
29269 | |
29270 | // SUBDa |
29271 | OPCODE(0x911F) |
29272 | { |
29273 | u32 adr, res; |
29274 | u32 src, dst; |
29275 | |
29276 | src = DREGu8((Opcode >> 9) & 7); |
29277 | adr = AREG(7); |
29278 | AREG(7) += 2; |
29279 | PRE_IO |
29280 | READ_BYTE_F(adr, dst) |
29281 | res = dst - src; |
29282 | flag_N = flag_X = flag_C = res; |
29283 | flag_V = (src ^ dst) & (res ^ dst); |
29284 | flag_NotZ = res & 0xFF; |
29285 | WRITE_BYTE_F(adr, res) |
29286 | POST_IO |
29287 | RET(12) |
29288 | } |
29289 | |
29290 | // SUBDa |
29291 | OPCODE(0x9127) |
29292 | { |
29293 | u32 adr, res; |
29294 | u32 src, dst; |
29295 | |
29296 | src = DREGu8((Opcode >> 9) & 7); |
29297 | adr = AREG(7) - 2; |
29298 | AREG(7) = adr; |
29299 | PRE_IO |
29300 | READ_BYTE_F(adr, dst) |
29301 | res = dst - src; |
29302 | flag_N = flag_X = flag_C = res; |
29303 | flag_V = (src ^ dst) & (res ^ dst); |
29304 | flag_NotZ = res & 0xFF; |
29305 | WRITE_BYTE_F(adr, res) |
29306 | POST_IO |
29307 | RET(14) |
29308 | } |
29309 | |
29310 | // SUBDa |
29311 | OPCODE(0x9150) |
29312 | { |
29313 | u32 adr, res; |
29314 | u32 src, dst; |
29315 | |
29316 | src = DREGu16((Opcode >> 9) & 7); |
29317 | adr = AREG((Opcode >> 0) & 7); |
29318 | PRE_IO |
29319 | READ_WORD_F(adr, dst) |
29320 | res = dst - src; |
29321 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29322 | flag_N = flag_X = flag_C = res >> 8; |
29323 | flag_NotZ = res & 0xFFFF; |
29324 | WRITE_WORD_F(adr, res) |
29325 | POST_IO |
29326 | RET(12) |
29327 | } |
29328 | |
29329 | // SUBDa |
29330 | OPCODE(0x9158) |
29331 | { |
29332 | u32 adr, res; |
29333 | u32 src, dst; |
29334 | |
29335 | src = DREGu16((Opcode >> 9) & 7); |
29336 | adr = AREG((Opcode >> 0) & 7); |
29337 | AREG((Opcode >> 0) & 7) += 2; |
29338 | PRE_IO |
29339 | READ_WORD_F(adr, dst) |
29340 | res = dst - src; |
29341 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29342 | flag_N = flag_X = flag_C = res >> 8; |
29343 | flag_NotZ = res & 0xFFFF; |
29344 | WRITE_WORD_F(adr, res) |
29345 | POST_IO |
29346 | RET(12) |
29347 | } |
29348 | |
29349 | // SUBDa |
29350 | OPCODE(0x9160) |
29351 | { |
29352 | u32 adr, res; |
29353 | u32 src, dst; |
29354 | |
29355 | src = DREGu16((Opcode >> 9) & 7); |
29356 | adr = AREG((Opcode >> 0) & 7) - 2; |
29357 | AREG((Opcode >> 0) & 7) = adr; |
29358 | PRE_IO |
29359 | READ_WORD_F(adr, dst) |
29360 | res = dst - src; |
29361 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29362 | flag_N = flag_X = flag_C = res >> 8; |
29363 | flag_NotZ = res & 0xFFFF; |
29364 | WRITE_WORD_F(adr, res) |
29365 | POST_IO |
29366 | RET(14) |
29367 | } |
29368 | |
29369 | // SUBDa |
29370 | OPCODE(0x9168) |
29371 | { |
29372 | u32 adr, res; |
29373 | u32 src, dst; |
29374 | |
29375 | src = DREGu16((Opcode >> 9) & 7); |
29376 | FETCH_SWORD(adr); |
29377 | adr += AREG((Opcode >> 0) & 7); |
29378 | PRE_IO |
29379 | READ_WORD_F(adr, dst) |
29380 | res = dst - src; |
29381 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29382 | flag_N = flag_X = flag_C = res >> 8; |
29383 | flag_NotZ = res & 0xFFFF; |
29384 | WRITE_WORD_F(adr, res) |
29385 | POST_IO |
29386 | RET(16) |
29387 | } |
29388 | |
29389 | // SUBDa |
29390 | OPCODE(0x9170) |
29391 | { |
29392 | u32 adr, res; |
29393 | u32 src, dst; |
29394 | |
29395 | src = DREGu16((Opcode >> 9) & 7); |
29396 | adr = AREG((Opcode >> 0) & 7); |
29397 | DECODE_EXT_WORD |
29398 | PRE_IO |
29399 | READ_WORD_F(adr, dst) |
29400 | res = dst - src; |
29401 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29402 | flag_N = flag_X = flag_C = res >> 8; |
29403 | flag_NotZ = res & 0xFFFF; |
29404 | WRITE_WORD_F(adr, res) |
29405 | POST_IO |
29406 | RET(18) |
29407 | } |
29408 | |
29409 | // SUBDa |
29410 | OPCODE(0x9178) |
29411 | { |
29412 | u32 adr, res; |
29413 | u32 src, dst; |
29414 | |
29415 | src = DREGu16((Opcode >> 9) & 7); |
29416 | FETCH_SWORD(adr); |
29417 | PRE_IO |
29418 | READ_WORD_F(adr, dst) |
29419 | res = dst - src; |
29420 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29421 | flag_N = flag_X = flag_C = res >> 8; |
29422 | flag_NotZ = res & 0xFFFF; |
29423 | WRITE_WORD_F(adr, res) |
29424 | POST_IO |
29425 | RET(16) |
29426 | } |
29427 | |
29428 | // SUBDa |
29429 | OPCODE(0x9179) |
29430 | { |
29431 | u32 adr, res; |
29432 | u32 src, dst; |
29433 | |
29434 | src = DREGu16((Opcode >> 9) & 7); |
29435 | FETCH_LONG(adr); |
29436 | PRE_IO |
29437 | READ_WORD_F(adr, dst) |
29438 | res = dst - src; |
29439 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29440 | flag_N = flag_X = flag_C = res >> 8; |
29441 | flag_NotZ = res & 0xFFFF; |
29442 | WRITE_WORD_F(adr, res) |
29443 | POST_IO |
29444 | RET(20) |
29445 | } |
29446 | |
29447 | // SUBDa |
29448 | OPCODE(0x915F) |
29449 | { |
29450 | u32 adr, res; |
29451 | u32 src, dst; |
29452 | |
29453 | src = DREGu16((Opcode >> 9) & 7); |
29454 | adr = AREG(7); |
29455 | AREG(7) += 2; |
29456 | PRE_IO |
29457 | READ_WORD_F(adr, dst) |
29458 | res = dst - src; |
29459 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29460 | flag_N = flag_X = flag_C = res >> 8; |
29461 | flag_NotZ = res & 0xFFFF; |
29462 | WRITE_WORD_F(adr, res) |
29463 | POST_IO |
29464 | RET(12) |
29465 | } |
29466 | |
29467 | // SUBDa |
29468 | OPCODE(0x9167) |
29469 | { |
29470 | u32 adr, res; |
29471 | u32 src, dst; |
29472 | |
29473 | src = DREGu16((Opcode >> 9) & 7); |
29474 | adr = AREG(7) - 2; |
29475 | AREG(7) = adr; |
29476 | PRE_IO |
29477 | READ_WORD_F(adr, dst) |
29478 | res = dst - src; |
29479 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29480 | flag_N = flag_X = flag_C = res >> 8; |
29481 | flag_NotZ = res & 0xFFFF; |
29482 | WRITE_WORD_F(adr, res) |
29483 | POST_IO |
29484 | RET(14) |
29485 | } |
29486 | |
29487 | // SUBDa |
29488 | OPCODE(0x9190) |
29489 | { |
29490 | u32 adr, res; |
29491 | u32 src, dst; |
29492 | |
29493 | src = DREGu32((Opcode >> 9) & 7); |
29494 | adr = AREG((Opcode >> 0) & 7); |
29495 | PRE_IO |
29496 | READ_LONG_F(adr, dst) |
29497 | res = dst - src; |
29498 | flag_NotZ = res; |
29499 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29500 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29501 | flag_N = res >> 24; |
29502 | WRITE_LONG_F(adr, res) |
29503 | POST_IO |
29504 | RET(20) |
29505 | } |
29506 | |
29507 | // SUBDa |
29508 | OPCODE(0x9198) |
29509 | { |
29510 | u32 adr, res; |
29511 | u32 src, dst; |
29512 | |
29513 | src = DREGu32((Opcode >> 9) & 7); |
29514 | adr = AREG((Opcode >> 0) & 7); |
29515 | AREG((Opcode >> 0) & 7) += 4; |
29516 | PRE_IO |
29517 | READ_LONG_F(adr, dst) |
29518 | res = dst - src; |
29519 | flag_NotZ = res; |
29520 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29521 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29522 | flag_N = res >> 24; |
29523 | WRITE_LONG_F(adr, res) |
29524 | POST_IO |
29525 | RET(20) |
29526 | } |
29527 | |
29528 | // SUBDa |
29529 | OPCODE(0x91A0) |
29530 | { |
29531 | u32 adr, res; |
29532 | u32 src, dst; |
29533 | |
29534 | src = DREGu32((Opcode >> 9) & 7); |
29535 | adr = AREG((Opcode >> 0) & 7) - 4; |
29536 | AREG((Opcode >> 0) & 7) = adr; |
29537 | PRE_IO |
29538 | READ_LONG_F(adr, dst) |
29539 | res = dst - src; |
29540 | flag_NotZ = res; |
29541 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29542 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29543 | flag_N = res >> 24; |
29544 | WRITE_LONG_F(adr, res) |
29545 | POST_IO |
29546 | RET(22) |
29547 | } |
29548 | |
29549 | // SUBDa |
29550 | OPCODE(0x91A8) |
29551 | { |
29552 | u32 adr, res; |
29553 | u32 src, dst; |
29554 | |
29555 | src = DREGu32((Opcode >> 9) & 7); |
29556 | FETCH_SWORD(adr); |
29557 | adr += AREG((Opcode >> 0) & 7); |
29558 | PRE_IO |
29559 | READ_LONG_F(adr, dst) |
29560 | res = dst - src; |
29561 | flag_NotZ = res; |
29562 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29563 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29564 | flag_N = res >> 24; |
29565 | WRITE_LONG_F(adr, res) |
29566 | POST_IO |
29567 | RET(24) |
29568 | } |
29569 | |
29570 | // SUBDa |
29571 | OPCODE(0x91B0) |
29572 | { |
29573 | u32 adr, res; |
29574 | u32 src, dst; |
29575 | |
29576 | src = DREGu32((Opcode >> 9) & 7); |
29577 | adr = AREG((Opcode >> 0) & 7); |
29578 | DECODE_EXT_WORD |
29579 | PRE_IO |
29580 | READ_LONG_F(adr, dst) |
29581 | res = dst - src; |
29582 | flag_NotZ = res; |
29583 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29584 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29585 | flag_N = res >> 24; |
29586 | WRITE_LONG_F(adr, res) |
29587 | POST_IO |
29588 | RET(26) |
29589 | } |
29590 | |
29591 | // SUBDa |
29592 | OPCODE(0x91B8) |
29593 | { |
29594 | u32 adr, res; |
29595 | u32 src, dst; |
29596 | |
29597 | src = DREGu32((Opcode >> 9) & 7); |
29598 | FETCH_SWORD(adr); |
29599 | PRE_IO |
29600 | READ_LONG_F(adr, dst) |
29601 | res = dst - src; |
29602 | flag_NotZ = res; |
29603 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29604 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29605 | flag_N = res >> 24; |
29606 | WRITE_LONG_F(adr, res) |
29607 | POST_IO |
29608 | RET(24) |
29609 | } |
29610 | |
29611 | // SUBDa |
29612 | OPCODE(0x91B9) |
29613 | { |
29614 | u32 adr, res; |
29615 | u32 src, dst; |
29616 | |
29617 | src = DREGu32((Opcode >> 9) & 7); |
29618 | FETCH_LONG(adr); |
29619 | PRE_IO |
29620 | READ_LONG_F(adr, dst) |
29621 | res = dst - src; |
29622 | flag_NotZ = res; |
29623 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29624 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29625 | flag_N = res >> 24; |
29626 | WRITE_LONG_F(adr, res) |
29627 | POST_IO |
29628 | RET(28) |
29629 | } |
29630 | |
29631 | // SUBDa |
29632 | OPCODE(0x919F) |
29633 | { |
29634 | u32 adr, res; |
29635 | u32 src, dst; |
29636 | |
29637 | src = DREGu32((Opcode >> 9) & 7); |
29638 | adr = AREG(7); |
29639 | AREG(7) += 4; |
29640 | PRE_IO |
29641 | READ_LONG_F(adr, dst) |
29642 | res = dst - src; |
29643 | flag_NotZ = res; |
29644 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29645 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29646 | flag_N = res >> 24; |
29647 | WRITE_LONG_F(adr, res) |
29648 | POST_IO |
29649 | RET(20) |
29650 | } |
29651 | |
29652 | // SUBDa |
29653 | OPCODE(0x91A7) |
29654 | { |
29655 | u32 adr, res; |
29656 | u32 src, dst; |
29657 | |
29658 | src = DREGu32((Opcode >> 9) & 7); |
29659 | adr = AREG(7) - 4; |
29660 | AREG(7) = adr; |
29661 | PRE_IO |
29662 | READ_LONG_F(adr, dst) |
29663 | res = dst - src; |
29664 | flag_NotZ = res; |
29665 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29666 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29667 | flag_N = res >> 24; |
29668 | WRITE_LONG_F(adr, res) |
29669 | POST_IO |
29670 | RET(22) |
29671 | } |
29672 | |
29673 | // SUBX |
29674 | OPCODE(0x9100) |
29675 | { |
29676 | u32 adr, res; |
29677 | u32 src, dst; |
29678 | |
29679 | src = DREGu8((Opcode >> 0) & 7); |
29680 | dst = DREGu8((Opcode >> 9) & 7); |
29681 | res = dst - src - ((flag_X >> 8) & 1); |
29682 | flag_N = flag_X = flag_C = res; |
29683 | flag_V = (src ^ dst) & (res ^ dst); |
29684 | flag_NotZ |= res & 0xFF; |
29685 | DREGu8((Opcode >> 9) & 7) = res; |
29686 | RET(4) |
29687 | } |
29688 | |
29689 | // SUBX |
29690 | OPCODE(0x9140) |
29691 | { |
29692 | u32 adr, res; |
29693 | u32 src, dst; |
29694 | |
29695 | src = DREGu16((Opcode >> 0) & 7); |
29696 | dst = DREGu16((Opcode >> 9) & 7); |
29697 | res = dst - src - ((flag_X >> 8) & 1); |
29698 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29699 | flag_N = flag_X = flag_C = res >> 8; |
29700 | flag_NotZ |= res & 0xFFFF; |
29701 | DREGu16((Opcode >> 9) & 7) = res; |
29702 | RET(4) |
29703 | } |
29704 | |
29705 | // SUBX |
29706 | OPCODE(0x9180) |
29707 | { |
29708 | u32 adr, res; |
29709 | u32 src, dst; |
29710 | |
29711 | src = DREGu32((Opcode >> 0) & 7); |
29712 | dst = DREGu32((Opcode >> 9) & 7); |
29713 | res = dst - src - ((flag_X >> 8) & 1); |
29714 | flag_NotZ |= res; |
29715 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29716 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29717 | flag_N = res >> 24; |
29718 | DREGu32((Opcode >> 9) & 7) = res; |
29719 | RET(8) |
29720 | } |
29721 | |
29722 | // SUBXM |
29723 | OPCODE(0x9108) |
29724 | { |
29725 | u32 adr, res; |
29726 | u32 src, dst; |
29727 | |
29728 | adr = AREG((Opcode >> 0) & 7) - 1; |
29729 | AREG((Opcode >> 0) & 7) = adr; |
29730 | PRE_IO |
29731 | READ_BYTE_F(adr, src) |
29732 | adr = AREG((Opcode >> 9) & 7) - 1; |
29733 | AREG((Opcode >> 9) & 7) = adr; |
29734 | READ_BYTE_F(adr, dst) |
29735 | res = dst - src - ((flag_X >> 8) & 1); |
29736 | flag_N = flag_X = flag_C = res; |
29737 | flag_V = (src ^ dst) & (res ^ dst); |
29738 | flag_NotZ |= res & 0xFF; |
29739 | WRITE_BYTE_F(adr, res) |
29740 | POST_IO |
29741 | RET(18) |
29742 | } |
29743 | |
29744 | // SUBXM |
29745 | OPCODE(0x9148) |
29746 | { |
29747 | u32 adr, res; |
29748 | u32 src, dst; |
29749 | |
29750 | adr = AREG((Opcode >> 0) & 7) - 2; |
29751 | AREG((Opcode >> 0) & 7) = adr; |
29752 | PRE_IO |
29753 | READ_WORD_F(adr, src) |
29754 | adr = AREG((Opcode >> 9) & 7) - 2; |
29755 | AREG((Opcode >> 9) & 7) = adr; |
29756 | READ_WORD_F(adr, dst) |
29757 | res = dst - src - ((flag_X >> 8) & 1); |
29758 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29759 | flag_N = flag_X = flag_C = res >> 8; |
29760 | flag_NotZ |= res & 0xFFFF; |
29761 | WRITE_WORD_F(adr, res) |
29762 | POST_IO |
29763 | RET(18) |
29764 | } |
29765 | |
29766 | // SUBXM |
29767 | OPCODE(0x9188) |
29768 | { |
29769 | u32 adr, res; |
29770 | u32 src, dst; |
29771 | |
29772 | adr = AREG((Opcode >> 0) & 7) - 4; |
29773 | AREG((Opcode >> 0) & 7) = adr; |
29774 | PRE_IO |
29775 | READ_LONG_F(adr, src) |
29776 | adr = AREG((Opcode >> 9) & 7) - 4; |
29777 | AREG((Opcode >> 9) & 7) = adr; |
29778 | READ_LONG_F(adr, dst) |
29779 | res = dst - src - ((flag_X >> 8) & 1); |
29780 | flag_NotZ |= res; |
29781 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29782 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29783 | flag_N = res >> 24; |
29784 | WRITE_LONG_F(adr, res) |
29785 | POST_IO |
29786 | RET(30) |
29787 | } |
29788 | |
29789 | // SUBX7M |
29790 | OPCODE(0x910F) |
29791 | { |
29792 | u32 adr, res; |
29793 | u32 src, dst; |
29794 | |
29795 | adr = AREG(7) - 2; |
29796 | AREG(7) = adr; |
29797 | PRE_IO |
29798 | READ_BYTE_F(adr, src) |
29799 | adr = AREG((Opcode >> 9) & 7) - 1; |
29800 | AREG((Opcode >> 9) & 7) = adr; |
29801 | READ_BYTE_F(adr, dst) |
29802 | res = dst - src - ((flag_X >> 8) & 1); |
29803 | flag_N = flag_X = flag_C = res; |
29804 | flag_V = (src ^ dst) & (res ^ dst); |
29805 | flag_NotZ |= res & 0xFF; |
29806 | WRITE_BYTE_F(adr, res) |
29807 | POST_IO |
29808 | RET(18) |
29809 | } |
29810 | |
29811 | // SUBX7M |
29812 | OPCODE(0x914F) |
29813 | { |
29814 | u32 adr, res; |
29815 | u32 src, dst; |
29816 | |
29817 | adr = AREG(7) - 2; |
29818 | AREG(7) = adr; |
29819 | PRE_IO |
29820 | READ_WORD_F(adr, src) |
29821 | adr = AREG((Opcode >> 9) & 7) - 2; |
29822 | AREG((Opcode >> 9) & 7) = adr; |
29823 | READ_WORD_F(adr, dst) |
29824 | res = dst - src - ((flag_X >> 8) & 1); |
29825 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29826 | flag_N = flag_X = flag_C = res >> 8; |
29827 | flag_NotZ |= res & 0xFFFF; |
29828 | WRITE_WORD_F(adr, res) |
29829 | POST_IO |
29830 | RET(18) |
29831 | } |
29832 | |
29833 | // SUBX7M |
29834 | OPCODE(0x918F) |
29835 | { |
29836 | u32 adr, res; |
29837 | u32 src, dst; |
29838 | |
29839 | adr = AREG(7) - 4; |
29840 | AREG(7) = adr; |
29841 | PRE_IO |
29842 | READ_LONG_F(adr, src) |
29843 | adr = AREG((Opcode >> 9) & 7) - 4; |
29844 | AREG((Opcode >> 9) & 7) = adr; |
29845 | READ_LONG_F(adr, dst) |
29846 | res = dst - src - ((flag_X >> 8) & 1); |
29847 | flag_NotZ |= res; |
29848 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29849 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29850 | flag_N = res >> 24; |
29851 | WRITE_LONG_F(adr, res) |
29852 | POST_IO |
29853 | RET(30) |
29854 | } |
29855 | |
29856 | // SUBXM7 |
29857 | OPCODE(0x9F08) |
29858 | { |
29859 | u32 adr, res; |
29860 | u32 src, dst; |
29861 | |
29862 | adr = AREG((Opcode >> 0) & 7) - 1; |
29863 | AREG((Opcode >> 0) & 7) = adr; |
29864 | PRE_IO |
29865 | READ_BYTE_F(adr, src) |
29866 | adr = AREG(7) - 2; |
29867 | AREG(7) = adr; |
29868 | READ_BYTE_F(adr, dst) |
29869 | res = dst - src - ((flag_X >> 8) & 1); |
29870 | flag_N = flag_X = flag_C = res; |
29871 | flag_V = (src ^ dst) & (res ^ dst); |
29872 | flag_NotZ |= res & 0xFF; |
29873 | WRITE_BYTE_F(adr, res) |
29874 | POST_IO |
29875 | RET(18) |
29876 | } |
29877 | |
29878 | // SUBXM7 |
29879 | OPCODE(0x9F48) |
29880 | { |
29881 | u32 adr, res; |
29882 | u32 src, dst; |
29883 | |
29884 | adr = AREG((Opcode >> 0) & 7) - 2; |
29885 | AREG((Opcode >> 0) & 7) = adr; |
29886 | PRE_IO |
29887 | READ_WORD_F(adr, src) |
29888 | adr = AREG(7) - 2; |
29889 | AREG(7) = adr; |
29890 | READ_WORD_F(adr, dst) |
29891 | res = dst - src - ((flag_X >> 8) & 1); |
29892 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29893 | flag_N = flag_X = flag_C = res >> 8; |
29894 | flag_NotZ |= res & 0xFFFF; |
29895 | WRITE_WORD_F(adr, res) |
29896 | POST_IO |
29897 | RET(18) |
29898 | } |
29899 | |
29900 | // SUBXM7 |
29901 | OPCODE(0x9F88) |
29902 | { |
29903 | u32 adr, res; |
29904 | u32 src, dst; |
29905 | |
29906 | adr = AREG((Opcode >> 0) & 7) - 4; |
29907 | AREG((Opcode >> 0) & 7) = adr; |
29908 | PRE_IO |
29909 | READ_LONG_F(adr, src) |
29910 | adr = AREG(7) - 4; |
29911 | AREG(7) = adr; |
29912 | READ_LONG_F(adr, dst) |
29913 | res = dst - src - ((flag_X >> 8) & 1); |
29914 | flag_NotZ |= res; |
29915 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29916 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29917 | flag_N = res >> 24; |
29918 | WRITE_LONG_F(adr, res) |
29919 | POST_IO |
29920 | RET(30) |
29921 | } |
29922 | |
29923 | // SUBX7M7 |
29924 | OPCODE(0x9F0F) |
29925 | { |
29926 | u32 adr, res; |
29927 | u32 src, dst; |
29928 | |
29929 | adr = AREG(7) - 2; |
29930 | AREG(7) = adr; |
29931 | PRE_IO |
29932 | READ_BYTE_F(adr, src) |
29933 | adr = AREG(7) - 2; |
29934 | AREG(7) = adr; |
29935 | READ_BYTE_F(adr, dst) |
29936 | res = dst - src - ((flag_X >> 8) & 1); |
29937 | flag_N = flag_X = flag_C = res; |
29938 | flag_V = (src ^ dst) & (res ^ dst); |
29939 | flag_NotZ |= res & 0xFF; |
29940 | WRITE_BYTE_F(adr, res) |
29941 | POST_IO |
29942 | RET(18) |
29943 | } |
29944 | |
29945 | // SUBX7M7 |
29946 | OPCODE(0x9F4F) |
29947 | { |
29948 | u32 adr, res; |
29949 | u32 src, dst; |
29950 | |
29951 | adr = AREG(7) - 2; |
29952 | AREG(7) = adr; |
29953 | PRE_IO |
29954 | READ_WORD_F(adr, src) |
29955 | adr = AREG(7) - 2; |
29956 | AREG(7) = adr; |
29957 | READ_WORD_F(adr, dst) |
29958 | res = dst - src - ((flag_X >> 8) & 1); |
29959 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29960 | flag_N = flag_X = flag_C = res >> 8; |
29961 | flag_NotZ |= res & 0xFFFF; |
29962 | WRITE_WORD_F(adr, res) |
29963 | POST_IO |
29964 | RET(18) |
29965 | } |
29966 | |
29967 | // SUBX7M7 |
29968 | OPCODE(0x9F8F) |
29969 | { |
29970 | u32 adr, res; |
29971 | u32 src, dst; |
29972 | |
29973 | adr = AREG(7) - 4; |
29974 | AREG(7) = adr; |
29975 | PRE_IO |
29976 | READ_LONG_F(adr, src) |
29977 | adr = AREG(7) - 4; |
29978 | AREG(7) = adr; |
29979 | READ_LONG_F(adr, dst) |
29980 | res = dst - src - ((flag_X >> 8) & 1); |
29981 | flag_NotZ |= res; |
29982 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29983 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29984 | flag_N = res >> 24; |
29985 | WRITE_LONG_F(adr, res) |
29986 | POST_IO |
29987 | RET(30) |
29988 | } |
29989 | |
29990 | // SUBA |
29991 | OPCODE(0x90C0) |
29992 | { |
29993 | u32 adr, res; |
29994 | u32 src, dst; |
29995 | |
29996 | src = (s32)DREGs16((Opcode >> 0) & 7); |
29997 | dst = AREGu32((Opcode >> 9) & 7); |
29998 | res = dst - src; |
29999 | AREG((Opcode >> 9) & 7) = res; |
30000 | RET(8) |
30001 | } |
30002 | |
30003 | // SUBA |
30004 | OPCODE(0x90C8) |
30005 | { |
30006 | u32 adr, res; |
30007 | u32 src, dst; |
30008 | |
30009 | src = (s32)AREGs16((Opcode >> 0) & 7); |
30010 | dst = AREGu32((Opcode >> 9) & 7); |
30011 | res = dst - src; |
30012 | AREG((Opcode >> 9) & 7) = res; |
30013 | RET(8) |
30014 | } |
30015 | |
30016 | // SUBA |
30017 | OPCODE(0x90D0) |
30018 | { |
30019 | u32 adr, res; |
30020 | u32 src, dst; |
30021 | |
30022 | adr = AREG((Opcode >> 0) & 7); |
30023 | PRE_IO |
30024 | READSX_WORD_F(adr, src) |
30025 | dst = AREGu32((Opcode >> 9) & 7); |
30026 | res = dst - src; |
30027 | AREG((Opcode >> 9) & 7) = res; |
30028 | POST_IO |
30029 | RET(10) |
30030 | } |
30031 | |
30032 | // SUBA |
30033 | OPCODE(0x90D8) |
30034 | { |
30035 | u32 adr, res; |
30036 | u32 src, dst; |
30037 | |
30038 | adr = AREG((Opcode >> 0) & 7); |
30039 | AREG((Opcode >> 0) & 7) += 2; |
30040 | PRE_IO |
30041 | READSX_WORD_F(adr, src) |
30042 | dst = AREGu32((Opcode >> 9) & 7); |
30043 | res = dst - src; |
30044 | AREG((Opcode >> 9) & 7) = res; |
30045 | POST_IO |
30046 | RET(10) |
30047 | } |
30048 | |
30049 | // SUBA |
30050 | OPCODE(0x90E0) |
30051 | { |
30052 | u32 adr, res; |
30053 | u32 src, dst; |
30054 | |
30055 | adr = AREG((Opcode >> 0) & 7) - 2; |
30056 | AREG((Opcode >> 0) & 7) = adr; |
30057 | PRE_IO |
30058 | READSX_WORD_F(adr, src) |
30059 | dst = AREGu32((Opcode >> 9) & 7); |
30060 | res = dst - src; |
30061 | AREG((Opcode >> 9) & 7) = res; |
30062 | POST_IO |
30063 | RET(12) |
30064 | } |
30065 | |
30066 | // SUBA |
30067 | OPCODE(0x90E8) |
30068 | { |
30069 | u32 adr, res; |
30070 | u32 src, dst; |
30071 | |
30072 | FETCH_SWORD(adr); |
30073 | adr += AREG((Opcode >> 0) & 7); |
30074 | PRE_IO |
30075 | READSX_WORD_F(adr, src) |
30076 | dst = AREGu32((Opcode >> 9) & 7); |
30077 | res = dst - src; |
30078 | AREG((Opcode >> 9) & 7) = res; |
30079 | POST_IO |
30080 | RET(14) |
30081 | } |
30082 | |
30083 | // SUBA |
30084 | OPCODE(0x90F0) |
30085 | { |
30086 | u32 adr, res; |
30087 | u32 src, dst; |
30088 | |
30089 | adr = AREG((Opcode >> 0) & 7); |
30090 | DECODE_EXT_WORD |
30091 | PRE_IO |
30092 | READSX_WORD_F(adr, src) |
30093 | dst = AREGu32((Opcode >> 9) & 7); |
30094 | res = dst - src; |
30095 | AREG((Opcode >> 9) & 7) = res; |
30096 | POST_IO |
30097 | RET(16) |
30098 | } |
30099 | |
30100 | // SUBA |
30101 | OPCODE(0x90F8) |
30102 | { |
30103 | u32 adr, res; |
30104 | u32 src, dst; |
30105 | |
30106 | FETCH_SWORD(adr); |
30107 | PRE_IO |
30108 | READSX_WORD_F(adr, src) |
30109 | dst = AREGu32((Opcode >> 9) & 7); |
30110 | res = dst - src; |
30111 | AREG((Opcode >> 9) & 7) = res; |
30112 | POST_IO |
30113 | RET(14) |
30114 | } |
30115 | |
30116 | // SUBA |
30117 | OPCODE(0x90F9) |
30118 | { |
30119 | u32 adr, res; |
30120 | u32 src, dst; |
30121 | |
30122 | FETCH_LONG(adr); |
30123 | PRE_IO |
30124 | READSX_WORD_F(adr, src) |
30125 | dst = AREGu32((Opcode >> 9) & 7); |
30126 | res = dst - src; |
30127 | AREG((Opcode >> 9) & 7) = res; |
30128 | POST_IO |
30129 | RET(18) |
30130 | } |
30131 | |
30132 | // SUBA |
30133 | OPCODE(0x90FA) |
30134 | { |
30135 | u32 adr, res; |
30136 | u32 src, dst; |
30137 | |
30138 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30139 | PC++; |
30140 | PRE_IO |
30141 | READSX_WORD_F(adr, src) |
30142 | dst = AREGu32((Opcode >> 9) & 7); |
30143 | res = dst - src; |
30144 | AREG((Opcode >> 9) & 7) = res; |
30145 | POST_IO |
30146 | RET(14) |
30147 | } |
30148 | |
30149 | // SUBA |
30150 | OPCODE(0x90FB) |
30151 | { |
30152 | u32 adr, res; |
30153 | u32 src, dst; |
30154 | |
30155 | adr = (u32)(PC) - BasePC; |
30156 | DECODE_EXT_WORD |
30157 | PRE_IO |
30158 | READSX_WORD_F(adr, src) |
30159 | dst = AREGu32((Opcode >> 9) & 7); |
30160 | res = dst - src; |
30161 | AREG((Opcode >> 9) & 7) = res; |
30162 | POST_IO |
30163 | RET(16) |
30164 | } |
30165 | |
30166 | // SUBA |
30167 | OPCODE(0x90FC) |
30168 | { |
30169 | u32 adr, res; |
30170 | u32 src, dst; |
30171 | |
30172 | FETCH_SWORD(src); |
30173 | dst = AREGu32((Opcode >> 9) & 7); |
30174 | res = dst - src; |
30175 | AREG((Opcode >> 9) & 7) = res; |
30176 | RET(12) |
30177 | } |
30178 | |
30179 | // SUBA |
30180 | OPCODE(0x90DF) |
30181 | { |
30182 | u32 adr, res; |
30183 | u32 src, dst; |
30184 | |
30185 | adr = AREG(7); |
30186 | AREG(7) += 2; |
30187 | PRE_IO |
30188 | READSX_WORD_F(adr, src) |
30189 | dst = AREGu32((Opcode >> 9) & 7); |
30190 | res = dst - src; |
30191 | AREG((Opcode >> 9) & 7) = res; |
30192 | POST_IO |
30193 | RET(10) |
30194 | } |
30195 | |
30196 | // SUBA |
30197 | OPCODE(0x90E7) |
30198 | { |
30199 | u32 adr, res; |
30200 | u32 src, dst; |
30201 | |
30202 | adr = AREG(7) - 2; |
30203 | AREG(7) = adr; |
30204 | PRE_IO |
30205 | READSX_WORD_F(adr, src) |
30206 | dst = AREGu32((Opcode >> 9) & 7); |
30207 | res = dst - src; |
30208 | AREG((Opcode >> 9) & 7) = res; |
30209 | POST_IO |
30210 | RET(12) |
30211 | } |
30212 | |
30213 | // SUBA |
30214 | OPCODE(0x91C0) |
30215 | { |
30216 | u32 adr, res; |
30217 | u32 src, dst; |
30218 | |
30219 | src = (s32)DREGs32((Opcode >> 0) & 7); |
30220 | dst = AREGu32((Opcode >> 9) & 7); |
30221 | res = dst - src; |
30222 | AREG((Opcode >> 9) & 7) = res; |
30223 | #ifdef USE_CYCLONE_TIMING |
30224 | RET(8) |
30225 | #else |
30226 | RET(6) |
30227 | #endif |
30228 | } |
30229 | |
30230 | // SUBA |
30231 | OPCODE(0x91C8) |
30232 | { |
30233 | u32 adr, res; |
30234 | u32 src, dst; |
30235 | |
30236 | src = (s32)AREGs32((Opcode >> 0) & 7); |
30237 | dst = AREGu32((Opcode >> 9) & 7); |
30238 | res = dst - src; |
30239 | AREG((Opcode >> 9) & 7) = res; |
30240 | #ifdef USE_CYCLONE_TIMING |
30241 | RET(8) |
30242 | #else |
30243 | RET(6) |
30244 | #endif |
30245 | } |
30246 | |
30247 | // SUBA |
30248 | OPCODE(0x91D0) |
30249 | { |
30250 | u32 adr, res; |
30251 | u32 src, dst; |
30252 | |
30253 | adr = AREG((Opcode >> 0) & 7); |
30254 | PRE_IO |
30255 | READSX_LONG_F(adr, src) |
30256 | dst = AREGu32((Opcode >> 9) & 7); |
30257 | res = dst - src; |
30258 | AREG((Opcode >> 9) & 7) = res; |
30259 | POST_IO |
30260 | RET(14) |
30261 | } |
30262 | |
30263 | // SUBA |
30264 | OPCODE(0x91D8) |
30265 | { |
30266 | u32 adr, res; |
30267 | u32 src, dst; |
30268 | |
30269 | adr = AREG((Opcode >> 0) & 7); |
30270 | AREG((Opcode >> 0) & 7) += 4; |
30271 | PRE_IO |
30272 | READSX_LONG_F(adr, src) |
30273 | dst = AREGu32((Opcode >> 9) & 7); |
30274 | res = dst - src; |
30275 | AREG((Opcode >> 9) & 7) = res; |
30276 | POST_IO |
30277 | RET(14) |
30278 | } |
30279 | |
30280 | // SUBA |
30281 | OPCODE(0x91E0) |
30282 | { |
30283 | u32 adr, res; |
30284 | u32 src, dst; |
30285 | |
30286 | adr = AREG((Opcode >> 0) & 7) - 4; |
30287 | AREG((Opcode >> 0) & 7) = adr; |
30288 | PRE_IO |
30289 | READSX_LONG_F(adr, src) |
30290 | dst = AREGu32((Opcode >> 9) & 7); |
30291 | res = dst - src; |
30292 | AREG((Opcode >> 9) & 7) = res; |
30293 | POST_IO |
30294 | RET(16) |
30295 | } |
30296 | |
30297 | // SUBA |
30298 | OPCODE(0x91E8) |
30299 | { |
30300 | u32 adr, res; |
30301 | u32 src, dst; |
30302 | |
30303 | FETCH_SWORD(adr); |
30304 | adr += AREG((Opcode >> 0) & 7); |
30305 | PRE_IO |
30306 | READSX_LONG_F(adr, src) |
30307 | dst = AREGu32((Opcode >> 9) & 7); |
30308 | res = dst - src; |
30309 | AREG((Opcode >> 9) & 7) = res; |
30310 | POST_IO |
30311 | RET(18) |
30312 | } |
30313 | |
30314 | // SUBA |
30315 | OPCODE(0x91F0) |
30316 | { |
30317 | u32 adr, res; |
30318 | u32 src, dst; |
30319 | |
30320 | adr = AREG((Opcode >> 0) & 7); |
30321 | DECODE_EXT_WORD |
30322 | PRE_IO |
30323 | READSX_LONG_F(adr, src) |
30324 | dst = AREGu32((Opcode >> 9) & 7); |
30325 | res = dst - src; |
30326 | AREG((Opcode >> 9) & 7) = res; |
30327 | POST_IO |
30328 | RET(20) |
30329 | } |
30330 | |
30331 | // SUBA |
30332 | OPCODE(0x91F8) |
30333 | { |
30334 | u32 adr, res; |
30335 | u32 src, dst; |
30336 | |
30337 | FETCH_SWORD(adr); |
30338 | PRE_IO |
30339 | READSX_LONG_F(adr, src) |
30340 | dst = AREGu32((Opcode >> 9) & 7); |
30341 | res = dst - src; |
30342 | AREG((Opcode >> 9) & 7) = res; |
30343 | POST_IO |
30344 | RET(18) |
30345 | } |
30346 | |
30347 | // SUBA |
30348 | OPCODE(0x91F9) |
30349 | { |
30350 | u32 adr, res; |
30351 | u32 src, dst; |
30352 | |
30353 | FETCH_LONG(adr); |
30354 | PRE_IO |
30355 | READSX_LONG_F(adr, src) |
30356 | dst = AREGu32((Opcode >> 9) & 7); |
30357 | res = dst - src; |
30358 | AREG((Opcode >> 9) & 7) = res; |
30359 | POST_IO |
30360 | RET(22) |
30361 | } |
30362 | |
30363 | // SUBA |
30364 | OPCODE(0x91FA) |
30365 | { |
30366 | u32 adr, res; |
30367 | u32 src, dst; |
30368 | |
30369 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30370 | PC++; |
30371 | PRE_IO |
30372 | READSX_LONG_F(adr, src) |
30373 | dst = AREGu32((Opcode >> 9) & 7); |
30374 | res = dst - src; |
30375 | AREG((Opcode >> 9) & 7) = res; |
30376 | POST_IO |
30377 | RET(18) |
30378 | } |
30379 | |
30380 | // SUBA |
30381 | OPCODE(0x91FB) |
30382 | { |
30383 | u32 adr, res; |
30384 | u32 src, dst; |
30385 | |
30386 | adr = (u32)(PC) - BasePC; |
30387 | DECODE_EXT_WORD |
30388 | PRE_IO |
30389 | READSX_LONG_F(adr, src) |
30390 | dst = AREGu32((Opcode >> 9) & 7); |
30391 | res = dst - src; |
30392 | AREG((Opcode >> 9) & 7) = res; |
30393 | POST_IO |
30394 | RET(20) |
30395 | } |
30396 | |
30397 | // SUBA |
30398 | OPCODE(0x91FC) |
30399 | { |
30400 | u32 adr, res; |
30401 | u32 src, dst; |
30402 | |
30403 | FETCH_LONG(src); |
30404 | dst = AREGu32((Opcode >> 9) & 7); |
30405 | res = dst - src; |
30406 | AREG((Opcode >> 9) & 7) = res; |
30407 | #ifdef USE_CYCLONE_TIMING |
30408 | RET(16) |
30409 | #else |
30410 | RET(14) |
30411 | #endif |
30412 | } |
30413 | |
30414 | // SUBA |
30415 | OPCODE(0x91DF) |
30416 | { |
30417 | u32 adr, res; |
30418 | u32 src, dst; |
30419 | |
30420 | adr = AREG(7); |
30421 | AREG(7) += 4; |
30422 | PRE_IO |
30423 | READSX_LONG_F(adr, src) |
30424 | dst = AREGu32((Opcode >> 9) & 7); |
30425 | res = dst - src; |
30426 | AREG((Opcode >> 9) & 7) = res; |
30427 | POST_IO |
30428 | RET(14) |
30429 | } |
30430 | |
30431 | // SUBA |
30432 | OPCODE(0x91E7) |
30433 | { |
30434 | u32 adr, res; |
30435 | u32 src, dst; |
30436 | |
30437 | adr = AREG(7) - 4; |
30438 | AREG(7) = adr; |
30439 | PRE_IO |
30440 | READSX_LONG_F(adr, src) |
30441 | dst = AREGu32((Opcode >> 9) & 7); |
30442 | res = dst - src; |
30443 | AREG((Opcode >> 9) & 7) = res; |
30444 | POST_IO |
30445 | RET(16) |
30446 | } |
30447 | |
30448 | // CMP |
30449 | OPCODE(0xB000) |
30450 | { |
30451 | u32 adr, res; |
30452 | u32 src, dst; |
30453 | |
30454 | src = DREGu8((Opcode >> 0) & 7); |
30455 | dst = DREGu8((Opcode >> 9) & 7); |
30456 | res = dst - src; |
30457 | flag_N = flag_C = res; |
30458 | flag_V = (src ^ dst) & (res ^ dst); |
30459 | flag_NotZ = res & 0xFF; |
30460 | RET(4) |
30461 | } |
30462 | |
30463 | // CMP |
30464 | OPCODE(0xB008) |
30465 | { |
30466 | u32 adr, res; |
30467 | u32 src, dst; |
30468 | |
30469 | // can't read byte from Ax registers ! |
30470 | m68kcontext.execinfo |= M68K_FAULTED; |
30471 | m68kcontext.io_cycle_counter = 0; |
30472 | /* |
30473 | goto famec_Exec_End; |
30474 | dst = DREGu8((Opcode >> 9) & 7); |
30475 | res = dst - src; |
30476 | flag_N = flag_C = res; |
30477 | flag_V = (src ^ dst) & (res ^ dst); |
30478 | flag_NotZ = res & 0xFF; |
30479 | */ |
30480 | RET(4) |
30481 | } |
30482 | |
30483 | // CMP |
30484 | OPCODE(0xB010) |
30485 | { |
30486 | u32 adr, res; |
30487 | u32 src, dst; |
30488 | |
30489 | adr = AREG((Opcode >> 0) & 7); |
30490 | PRE_IO |
30491 | READ_BYTE_F(adr, src) |
30492 | dst = DREGu8((Opcode >> 9) & 7); |
30493 | res = dst - src; |
30494 | flag_N = flag_C = res; |
30495 | flag_V = (src ^ dst) & (res ^ dst); |
30496 | flag_NotZ = res & 0xFF; |
30497 | POST_IO |
30498 | RET(8) |
30499 | } |
30500 | |
30501 | // CMP |
30502 | OPCODE(0xB018) |
30503 | { |
30504 | u32 adr, res; |
30505 | u32 src, dst; |
30506 | |
30507 | adr = AREG((Opcode >> 0) & 7); |
30508 | AREG((Opcode >> 0) & 7) += 1; |
30509 | PRE_IO |
30510 | READ_BYTE_F(adr, src) |
30511 | dst = DREGu8((Opcode >> 9) & 7); |
30512 | res = dst - src; |
30513 | flag_N = flag_C = res; |
30514 | flag_V = (src ^ dst) & (res ^ dst); |
30515 | flag_NotZ = res & 0xFF; |
30516 | POST_IO |
30517 | RET(8) |
30518 | } |
30519 | |
30520 | // CMP |
30521 | OPCODE(0xB020) |
30522 | { |
30523 | u32 adr, res; |
30524 | u32 src, dst; |
30525 | |
30526 | adr = AREG((Opcode >> 0) & 7) - 1; |
30527 | AREG((Opcode >> 0) & 7) = adr; |
30528 | PRE_IO |
30529 | READ_BYTE_F(adr, src) |
30530 | dst = DREGu8((Opcode >> 9) & 7); |
30531 | res = dst - src; |
30532 | flag_N = flag_C = res; |
30533 | flag_V = (src ^ dst) & (res ^ dst); |
30534 | flag_NotZ = res & 0xFF; |
30535 | POST_IO |
30536 | RET(10) |
30537 | } |
30538 | |
30539 | // CMP |
30540 | OPCODE(0xB028) |
30541 | { |
30542 | u32 adr, res; |
30543 | u32 src, dst; |
30544 | |
30545 | FETCH_SWORD(adr); |
30546 | adr += AREG((Opcode >> 0) & 7); |
30547 | PRE_IO |
30548 | READ_BYTE_F(adr, src) |
30549 | dst = DREGu8((Opcode >> 9) & 7); |
30550 | res = dst - src; |
30551 | flag_N = flag_C = res; |
30552 | flag_V = (src ^ dst) & (res ^ dst); |
30553 | flag_NotZ = res & 0xFF; |
30554 | POST_IO |
30555 | RET(12) |
30556 | } |
30557 | |
30558 | // CMP |
30559 | OPCODE(0xB030) |
30560 | { |
30561 | u32 adr, res; |
30562 | u32 src, dst; |
30563 | |
30564 | adr = AREG((Opcode >> 0) & 7); |
30565 | DECODE_EXT_WORD |
30566 | PRE_IO |
30567 | READ_BYTE_F(adr, src) |
30568 | dst = DREGu8((Opcode >> 9) & 7); |
30569 | res = dst - src; |
30570 | flag_N = flag_C = res; |
30571 | flag_V = (src ^ dst) & (res ^ dst); |
30572 | flag_NotZ = res & 0xFF; |
30573 | POST_IO |
30574 | RET(14) |
30575 | } |
30576 | |
30577 | // CMP |
30578 | OPCODE(0xB038) |
30579 | { |
30580 | u32 adr, res; |
30581 | u32 src, dst; |
30582 | |
30583 | FETCH_SWORD(adr); |
30584 | PRE_IO |
30585 | READ_BYTE_F(adr, src) |
30586 | dst = DREGu8((Opcode >> 9) & 7); |
30587 | res = dst - src; |
30588 | flag_N = flag_C = res; |
30589 | flag_V = (src ^ dst) & (res ^ dst); |
30590 | flag_NotZ = res & 0xFF; |
30591 | POST_IO |
30592 | RET(12) |
30593 | } |
30594 | |
30595 | // CMP |
30596 | OPCODE(0xB039) |
30597 | { |
30598 | u32 adr, res; |
30599 | u32 src, dst; |
30600 | |
30601 | FETCH_LONG(adr); |
30602 | PRE_IO |
30603 | READ_BYTE_F(adr, src) |
30604 | dst = DREGu8((Opcode >> 9) & 7); |
30605 | res = dst - src; |
30606 | flag_N = flag_C = res; |
30607 | flag_V = (src ^ dst) & (res ^ dst); |
30608 | flag_NotZ = res & 0xFF; |
30609 | POST_IO |
30610 | RET(16) |
30611 | } |
30612 | |
30613 | // CMP |
30614 | OPCODE(0xB03A) |
30615 | { |
30616 | u32 adr, res; |
30617 | u32 src, dst; |
30618 | |
30619 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30620 | PC++; |
30621 | PRE_IO |
30622 | READ_BYTE_F(adr, src) |
30623 | dst = DREGu8((Opcode >> 9) & 7); |
30624 | res = dst - src; |
30625 | flag_N = flag_C = res; |
30626 | flag_V = (src ^ dst) & (res ^ dst); |
30627 | flag_NotZ = res & 0xFF; |
30628 | POST_IO |
30629 | RET(12) |
30630 | } |
30631 | |
30632 | // CMP |
30633 | OPCODE(0xB03B) |
30634 | { |
30635 | u32 adr, res; |
30636 | u32 src, dst; |
30637 | |
30638 | adr = (u32)(PC) - BasePC; |
30639 | DECODE_EXT_WORD |
30640 | PRE_IO |
30641 | READ_BYTE_F(adr, src) |
30642 | dst = DREGu8((Opcode >> 9) & 7); |
30643 | res = dst - src; |
30644 | flag_N = flag_C = res; |
30645 | flag_V = (src ^ dst) & (res ^ dst); |
30646 | flag_NotZ = res & 0xFF; |
30647 | POST_IO |
30648 | RET(14) |
30649 | } |
30650 | |
30651 | // CMP |
30652 | OPCODE(0xB03C) |
30653 | { |
30654 | u32 adr, res; |
30655 | u32 src, dst; |
30656 | |
30657 | FETCH_BYTE(src); |
30658 | dst = DREGu8((Opcode >> 9) & 7); |
30659 | res = dst - src; |
30660 | flag_N = flag_C = res; |
30661 | flag_V = (src ^ dst) & (res ^ dst); |
30662 | flag_NotZ = res & 0xFF; |
30663 | RET(8) |
30664 | } |
30665 | |
30666 | // CMP |
30667 | OPCODE(0xB01F) |
30668 | { |
30669 | u32 adr, res; |
30670 | u32 src, dst; |
30671 | |
30672 | adr = AREG(7); |
30673 | AREG(7) += 2; |
30674 | PRE_IO |
30675 | READ_BYTE_F(adr, src) |
30676 | dst = DREGu8((Opcode >> 9) & 7); |
30677 | res = dst - src; |
30678 | flag_N = flag_C = res; |
30679 | flag_V = (src ^ dst) & (res ^ dst); |
30680 | flag_NotZ = res & 0xFF; |
30681 | POST_IO |
30682 | RET(8) |
30683 | } |
30684 | |
30685 | // CMP |
30686 | OPCODE(0xB027) |
30687 | { |
30688 | u32 adr, res; |
30689 | u32 src, dst; |
30690 | |
30691 | adr = AREG(7) - 2; |
30692 | AREG(7) = adr; |
30693 | PRE_IO |
30694 | READ_BYTE_F(adr, src) |
30695 | dst = DREGu8((Opcode >> 9) & 7); |
30696 | res = dst - src; |
30697 | flag_N = flag_C = res; |
30698 | flag_V = (src ^ dst) & (res ^ dst); |
30699 | flag_NotZ = res & 0xFF; |
30700 | POST_IO |
30701 | RET(10) |
30702 | } |
30703 | |
30704 | // CMP |
30705 | OPCODE(0xB040) |
30706 | { |
30707 | u32 adr, res; |
30708 | u32 src, dst; |
30709 | |
30710 | src = DREGu16((Opcode >> 0) & 7); |
30711 | dst = DREGu16((Opcode >> 9) & 7); |
30712 | res = dst - src; |
30713 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30714 | flag_N = flag_C = res >> 8; |
30715 | flag_NotZ = res & 0xFFFF; |
30716 | RET(4) |
30717 | } |
30718 | |
30719 | // CMP |
30720 | OPCODE(0xB048) |
30721 | { |
30722 | u32 adr, res; |
30723 | u32 src, dst; |
30724 | |
30725 | src = AREGu16((Opcode >> 0) & 7); |
30726 | dst = DREGu16((Opcode >> 9) & 7); |
30727 | res = dst - src; |
30728 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30729 | flag_N = flag_C = res >> 8; |
30730 | flag_NotZ = res & 0xFFFF; |
30731 | RET(4) |
30732 | } |
30733 | |
30734 | // CMP |
30735 | OPCODE(0xB050) |
30736 | { |
30737 | u32 adr, res; |
30738 | u32 src, dst; |
30739 | |
30740 | adr = AREG((Opcode >> 0) & 7); |
30741 | PRE_IO |
30742 | READ_WORD_F(adr, src) |
30743 | dst = DREGu16((Opcode >> 9) & 7); |
30744 | res = dst - src; |
30745 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30746 | flag_N = flag_C = res >> 8; |
30747 | flag_NotZ = res & 0xFFFF; |
30748 | POST_IO |
30749 | RET(8) |
30750 | } |
30751 | |
30752 | // CMP |
30753 | OPCODE(0xB058) |
30754 | { |
30755 | u32 adr, res; |
30756 | u32 src, dst; |
30757 | |
30758 | adr = AREG((Opcode >> 0) & 7); |
30759 | AREG((Opcode >> 0) & 7) += 2; |
30760 | PRE_IO |
30761 | READ_WORD_F(adr, src) |
30762 | dst = DREGu16((Opcode >> 9) & 7); |
30763 | res = dst - src; |
30764 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30765 | flag_N = flag_C = res >> 8; |
30766 | flag_NotZ = res & 0xFFFF; |
30767 | POST_IO |
30768 | RET(8) |
30769 | } |
30770 | |
30771 | // CMP |
30772 | OPCODE(0xB060) |
30773 | { |
30774 | u32 adr, res; |
30775 | u32 src, dst; |
30776 | |
30777 | adr = AREG((Opcode >> 0) & 7) - 2; |
30778 | AREG((Opcode >> 0) & 7) = adr; |
30779 | PRE_IO |
30780 | READ_WORD_F(adr, src) |
30781 | dst = DREGu16((Opcode >> 9) & 7); |
30782 | res = dst - src; |
30783 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30784 | flag_N = flag_C = res >> 8; |
30785 | flag_NotZ = res & 0xFFFF; |
30786 | POST_IO |
30787 | RET(10) |
30788 | } |
30789 | |
30790 | // CMP |
30791 | OPCODE(0xB068) |
30792 | { |
30793 | u32 adr, res; |
30794 | u32 src, dst; |
30795 | |
30796 | FETCH_SWORD(adr); |
30797 | adr += AREG((Opcode >> 0) & 7); |
30798 | PRE_IO |
30799 | READ_WORD_F(adr, src) |
30800 | dst = DREGu16((Opcode >> 9) & 7); |
30801 | res = dst - src; |
30802 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30803 | flag_N = flag_C = res >> 8; |
30804 | flag_NotZ = res & 0xFFFF; |
30805 | POST_IO |
30806 | RET(12) |
30807 | } |
30808 | |
30809 | // CMP |
30810 | OPCODE(0xB070) |
30811 | { |
30812 | u32 adr, res; |
30813 | u32 src, dst; |
30814 | |
30815 | adr = AREG((Opcode >> 0) & 7); |
30816 | DECODE_EXT_WORD |
30817 | PRE_IO |
30818 | READ_WORD_F(adr, src) |
30819 | dst = DREGu16((Opcode >> 9) & 7); |
30820 | res = dst - src; |
30821 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30822 | flag_N = flag_C = res >> 8; |
30823 | flag_NotZ = res & 0xFFFF; |
30824 | POST_IO |
30825 | RET(14) |
30826 | } |
30827 | |
30828 | // CMP |
30829 | OPCODE(0xB078) |
30830 | { |
30831 | u32 adr, res; |
30832 | u32 src, dst; |
30833 | |
30834 | FETCH_SWORD(adr); |
30835 | PRE_IO |
30836 | READ_WORD_F(adr, src) |
30837 | dst = DREGu16((Opcode >> 9) & 7); |
30838 | res = dst - src; |
30839 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30840 | flag_N = flag_C = res >> 8; |
30841 | flag_NotZ = res & 0xFFFF; |
30842 | POST_IO |
30843 | RET(12) |
30844 | } |
30845 | |
30846 | // CMP |
30847 | OPCODE(0xB079) |
30848 | { |
30849 | u32 adr, res; |
30850 | u32 src, dst; |
30851 | |
30852 | FETCH_LONG(adr); |
30853 | PRE_IO |
30854 | READ_WORD_F(adr, src) |
30855 | dst = DREGu16((Opcode >> 9) & 7); |
30856 | res = dst - src; |
30857 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30858 | flag_N = flag_C = res >> 8; |
30859 | flag_NotZ = res & 0xFFFF; |
30860 | POST_IO |
30861 | RET(16) |
30862 | } |
30863 | |
30864 | // CMP |
30865 | OPCODE(0xB07A) |
30866 | { |
30867 | u32 adr, res; |
30868 | u32 src, dst; |
30869 | |
30870 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
30871 | PC++; |
30872 | PRE_IO |
30873 | READ_WORD_F(adr, src) |
30874 | dst = DREGu16((Opcode >> 9) & 7); |
30875 | res = dst - src; |
30876 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30877 | flag_N = flag_C = res >> 8; |
30878 | flag_NotZ = res & 0xFFFF; |
30879 | POST_IO |
30880 | RET(12) |
30881 | } |
30882 | |
30883 | // CMP |
30884 | OPCODE(0xB07B) |
30885 | { |
30886 | u32 adr, res; |
30887 | u32 src, dst; |
30888 | |
30889 | adr = (u32)(PC) - BasePC; |
30890 | DECODE_EXT_WORD |
30891 | PRE_IO |
30892 | READ_WORD_F(adr, src) |
30893 | dst = DREGu16((Opcode >> 9) & 7); |
30894 | res = dst - src; |
30895 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30896 | flag_N = flag_C = res >> 8; |
30897 | flag_NotZ = res & 0xFFFF; |
30898 | POST_IO |
30899 | RET(14) |
30900 | } |
30901 | |
30902 | // CMP |
30903 | OPCODE(0xB07C) |
30904 | { |
30905 | u32 adr, res; |
30906 | u32 src, dst; |
30907 | |
30908 | FETCH_WORD(src); |
30909 | dst = DREGu16((Opcode >> 9) & 7); |
30910 | res = dst - src; |
30911 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30912 | flag_N = flag_C = res >> 8; |
30913 | flag_NotZ = res & 0xFFFF; |
30914 | RET(8) |
30915 | } |
30916 | |
30917 | // CMP |
30918 | OPCODE(0xB05F) |
30919 | { |
30920 | u32 adr, res; |
30921 | u32 src, dst; |
30922 | |
30923 | adr = AREG(7); |
30924 | AREG(7) += 2; |
30925 | PRE_IO |
30926 | READ_WORD_F(adr, src) |
30927 | dst = DREGu16((Opcode >> 9) & 7); |
30928 | res = dst - src; |
30929 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30930 | flag_N = flag_C = res >> 8; |
30931 | flag_NotZ = res & 0xFFFF; |
30932 | POST_IO |
30933 | RET(8) |
30934 | } |
30935 | |
30936 | // CMP |
30937 | OPCODE(0xB067) |
30938 | { |
30939 | u32 adr, res; |
30940 | u32 src, dst; |
30941 | |
30942 | adr = AREG(7) - 2; |
30943 | AREG(7) = adr; |
30944 | PRE_IO |
30945 | READ_WORD_F(adr, src) |
30946 | dst = DREGu16((Opcode >> 9) & 7); |
30947 | res = dst - src; |
30948 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30949 | flag_N = flag_C = res >> 8; |
30950 | flag_NotZ = res & 0xFFFF; |
30951 | POST_IO |
30952 | RET(10) |
30953 | } |
30954 | |
30955 | // CMP |
30956 | OPCODE(0xB080) |
30957 | { |
30958 | u32 adr, res; |
30959 | u32 src, dst; |
30960 | |
30961 | src = DREGu32((Opcode >> 0) & 7); |
30962 | dst = DREGu32((Opcode >> 9) & 7); |
30963 | res = dst - src; |
30964 | flag_NotZ = res; |
30965 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30966 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30967 | flag_N = res >> 24; |
30968 | RET(6) |
30969 | } |
30970 | |
30971 | // CMP |
30972 | OPCODE(0xB088) |
30973 | { |
30974 | u32 adr, res; |
30975 | u32 src, dst; |
30976 | |
30977 | src = AREGu32((Opcode >> 0) & 7); |
30978 | dst = DREGu32((Opcode >> 9) & 7); |
30979 | res = dst - src; |
30980 | flag_NotZ = res; |
30981 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30982 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30983 | flag_N = res >> 24; |
30984 | RET(6) |
30985 | } |
30986 | |
30987 | // CMP |
30988 | OPCODE(0xB090) |
30989 | { |
30990 | u32 adr, res; |
30991 | u32 src, dst; |
30992 | |
30993 | adr = AREG((Opcode >> 0) & 7); |
30994 | PRE_IO |
30995 | READ_LONG_F(adr, src) |
30996 | dst = DREGu32((Opcode >> 9) & 7); |
30997 | res = dst - src; |
30998 | flag_NotZ = res; |
30999 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31000 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31001 | flag_N = res >> 24; |
31002 | POST_IO |
31003 | RET(14) |
31004 | } |
31005 | |
31006 | // CMP |
31007 | OPCODE(0xB098) |
31008 | { |
31009 | u32 adr, res; |
31010 | u32 src, dst; |
31011 | |
31012 | adr = AREG((Opcode >> 0) & 7); |
31013 | AREG((Opcode >> 0) & 7) += 4; |
31014 | PRE_IO |
31015 | READ_LONG_F(adr, src) |
31016 | dst = DREGu32((Opcode >> 9) & 7); |
31017 | res = dst - src; |
31018 | flag_NotZ = res; |
31019 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31020 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31021 | flag_N = res >> 24; |
31022 | POST_IO |
31023 | RET(14) |
31024 | } |
31025 | |
31026 | // CMP |
31027 | OPCODE(0xB0A0) |
31028 | { |
31029 | u32 adr, res; |
31030 | u32 src, dst; |
31031 | |
31032 | adr = AREG((Opcode >> 0) & 7) - 4; |
31033 | AREG((Opcode >> 0) & 7) = adr; |
31034 | PRE_IO |
31035 | READ_LONG_F(adr, src) |
31036 | dst = DREGu32((Opcode >> 9) & 7); |
31037 | res = dst - src; |
31038 | flag_NotZ = res; |
31039 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31040 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31041 | flag_N = res >> 24; |
31042 | POST_IO |
31043 | RET(16) |
31044 | } |
31045 | |
31046 | // CMP |
31047 | OPCODE(0xB0A8) |
31048 | { |
31049 | u32 adr, res; |
31050 | u32 src, dst; |
31051 | |
31052 | FETCH_SWORD(adr); |
31053 | adr += AREG((Opcode >> 0) & 7); |
31054 | PRE_IO |
31055 | READ_LONG_F(adr, src) |
31056 | dst = DREGu32((Opcode >> 9) & 7); |
31057 | res = dst - src; |
31058 | flag_NotZ = res; |
31059 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31060 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31061 | flag_N = res >> 24; |
31062 | POST_IO |
31063 | RET(18) |
31064 | } |
31065 | |
31066 | // CMP |
31067 | OPCODE(0xB0B0) |
31068 | { |
31069 | u32 adr, res; |
31070 | u32 src, dst; |
31071 | |
31072 | adr = AREG((Opcode >> 0) & 7); |
31073 | DECODE_EXT_WORD |
31074 | PRE_IO |
31075 | READ_LONG_F(adr, src) |
31076 | dst = DREGu32((Opcode >> 9) & 7); |
31077 | res = dst - src; |
31078 | flag_NotZ = res; |
31079 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31080 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31081 | flag_N = res >> 24; |
31082 | POST_IO |
31083 | RET(20) |
31084 | } |
31085 | |
31086 | // CMP |
31087 | OPCODE(0xB0B8) |
31088 | { |
31089 | u32 adr, res; |
31090 | u32 src, dst; |
31091 | |
31092 | FETCH_SWORD(adr); |
31093 | PRE_IO |
31094 | READ_LONG_F(adr, src) |
31095 | dst = DREGu32((Opcode >> 9) & 7); |
31096 | res = dst - src; |
31097 | flag_NotZ = res; |
31098 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31099 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31100 | flag_N = res >> 24; |
31101 | POST_IO |
31102 | RET(18) |
31103 | } |
31104 | |
31105 | // CMP |
31106 | OPCODE(0xB0B9) |
31107 | { |
31108 | u32 adr, res; |
31109 | u32 src, dst; |
31110 | |
31111 | FETCH_LONG(adr); |
31112 | PRE_IO |
31113 | READ_LONG_F(adr, src) |
31114 | dst = DREGu32((Opcode >> 9) & 7); |
31115 | res = dst - src; |
31116 | flag_NotZ = res; |
31117 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31118 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31119 | flag_N = res >> 24; |
31120 | POST_IO |
31121 | RET(22) |
31122 | } |
31123 | |
31124 | // CMP |
31125 | OPCODE(0xB0BA) |
31126 | { |
31127 | u32 adr, res; |
31128 | u32 src, dst; |
31129 | |
31130 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
31131 | PC++; |
31132 | PRE_IO |
31133 | READ_LONG_F(adr, src) |
31134 | dst = DREGu32((Opcode >> 9) & 7); |
31135 | res = dst - src; |
31136 | flag_NotZ = res; |
31137 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31138 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31139 | flag_N = res >> 24; |
31140 | POST_IO |
31141 | RET(18) |
31142 | } |
31143 | |
31144 | // CMP |
31145 | OPCODE(0xB0BB) |
31146 | { |
31147 | u32 adr, res; |
31148 | u32 src, dst; |
31149 | |
31150 | adr = (u32)(PC) - BasePC; |
31151 | DECODE_EXT_WORD |
31152 | PRE_IO |
31153 | READ_LONG_F(adr, src) |
31154 | dst = DREGu32((Opcode >> 9) & 7); |
31155 | res = dst - src; |
31156 | flag_NotZ = res; |
31157 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31158 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31159 | flag_N = res >> 24; |
31160 | POST_IO |
31161 | RET(20) |
31162 | } |
31163 | |
31164 | // CMP |
31165 | OPCODE(0xB0BC) |
31166 | { |
31167 | u32 adr, res; |
31168 | u32 src, dst; |
31169 | |
31170 | FETCH_LONG(src); |
31171 | dst = DREGu32((Opcode >> 9) & 7); |
31172 | res = dst - src; |
31173 | flag_NotZ = res; |
31174 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31175 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31176 | flag_N = res >> 24; |
31177 | RET(14) |
31178 | } |
31179 | |
31180 | // CMP |
31181 | OPCODE(0xB09F) |
31182 | { |
31183 | u32 adr, res; |
31184 | u32 src, dst; |
31185 | |
31186 | adr = AREG(7); |
31187 | AREG(7) += 4; |
31188 | PRE_IO |
31189 | READ_LONG_F(adr, src) |
31190 | dst = DREGu32((Opcode >> 9) & 7); |
31191 | res = dst - src; |
31192 | flag_NotZ = res; |
31193 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31194 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31195 | flag_N = res >> 24; |
31196 | POST_IO |
31197 | RET(14) |
31198 | } |
31199 | |
31200 | // CMP |
31201 | OPCODE(0xB0A7) |
31202 | { |
31203 | u32 adr, res; |
31204 | u32 src, dst; |
31205 | |
31206 | adr = AREG(7) - 4; |
31207 | AREG(7) = adr; |
31208 | PRE_IO |
31209 | READ_LONG_F(adr, src) |
31210 | dst = DREGu32((Opcode >> 9) & 7); |
31211 | res = dst - src; |
31212 | flag_NotZ = res; |
31213 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31214 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31215 | flag_N = res >> 24; |
31216 | POST_IO |
31217 | RET(16) |
31218 | } |
31219 | |
31220 | // CMPM |
31221 | OPCODE(0xB108) |
31222 | { |
31223 | u32 adr, res; |
31224 | u32 src, dst; |
31225 | |
31226 | adr = AREG((Opcode >> 0) & 7); |
31227 | AREG((Opcode >> 0) & 7) += 1; |
31228 | PRE_IO |
31229 | READ_BYTE_F(adr, src) |
31230 | adr = AREG((Opcode >> 9) & 7); |
31231 | AREG((Opcode >> 9) & 7) += 1; |
31232 | READ_BYTE_F(adr, dst) |
31233 | res = dst - src; |
31234 | flag_N = flag_C = res; |
31235 | flag_V = (src ^ dst) & (res ^ dst); |
31236 | flag_NotZ = res & 0xFF; |
31237 | POST_IO |
31238 | RET(12) |
31239 | } |
31240 | |
31241 | // CMPM |
31242 | OPCODE(0xB148) |
31243 | { |
31244 | u32 adr, res; |
31245 | u32 src, dst; |
31246 | |
31247 | adr = AREG((Opcode >> 0) & 7); |
31248 | AREG((Opcode >> 0) & 7) += 2; |
31249 | PRE_IO |
31250 | READ_WORD_F(adr, src) |
31251 | adr = AREG((Opcode >> 9) & 7); |
31252 | AREG((Opcode >> 9) & 7) += 2; |
31253 | READ_WORD_F(adr, dst) |
31254 | res = dst - src; |
31255 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31256 | flag_N = flag_C = res >> 8; |
31257 | flag_NotZ = res & 0xFFFF; |
31258 | POST_IO |
31259 | RET(12) |
31260 | } |
31261 | |
31262 | // CMPM |
31263 | OPCODE(0xB188) |
31264 | { |
31265 | u32 adr, res; |
31266 | u32 src, dst; |
31267 | |
31268 | adr = AREG((Opcode >> 0) & 7); |
31269 | AREG((Opcode >> 0) & 7) += 4; |
31270 | PRE_IO |
31271 | READ_LONG_F(adr, src) |
31272 | adr = AREG((Opcode >> 9) & 7); |
31273 | AREG((Opcode >> 9) & 7) += 4; |
31274 | READ_LONG_F(adr, dst) |
31275 | res = dst - src; |
31276 | flag_NotZ = res; |
31277 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31278 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31279 | flag_N = res >> 24; |
31280 | POST_IO |
31281 | RET(20) |
31282 | } |
31283 | |
31284 | // CMP7M |
31285 | OPCODE(0xB10F) |
31286 | { |
31287 | u32 adr, res; |
31288 | u32 src, dst; |
31289 | |
31290 | adr = AREG(7); |
31291 | AREG(7) += 2; |
31292 | PRE_IO |
31293 | READ_BYTE_F(adr, src) |
31294 | adr = AREG((Opcode >> 9) & 7); |
31295 | AREG((Opcode >> 9) & 7) += 1; |
31296 | READ_BYTE_F(adr, dst) |
31297 | res = dst - src; |
31298 | flag_N = flag_C = res; |
31299 | flag_V = (src ^ dst) & (res ^ dst); |
31300 | flag_NotZ = res & 0xFF; |
31301 | POST_IO |
31302 | RET(12) |
31303 | } |
31304 | |
31305 | // CMP7M |
31306 | OPCODE(0xB14F) |
31307 | { |
31308 | u32 adr, res; |
31309 | u32 src, dst; |
31310 | |
31311 | adr = AREG(7); |
31312 | AREG(7) += 2; |
31313 | PRE_IO |
31314 | READ_WORD_F(adr, src) |
31315 | adr = AREG((Opcode >> 9) & 7); |
31316 | AREG((Opcode >> 9) & 7) += 2; |
31317 | READ_WORD_F(adr, dst) |
31318 | res = dst - src; |
31319 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31320 | flag_N = flag_C = res >> 8; |
31321 | flag_NotZ = res & 0xFFFF; |
31322 | POST_IO |
31323 | RET(12) |
31324 | } |
31325 | |
31326 | // CMP7M |
31327 | OPCODE(0xB18F) |
31328 | { |
31329 | u32 adr, res; |
31330 | u32 src, dst; |
31331 | |
31332 | adr = AREG(7); |
31333 | AREG(7) += 4; |
31334 | PRE_IO |
31335 | READ_LONG_F(adr, src) |
31336 | adr = AREG((Opcode >> 9) & 7); |
31337 | AREG((Opcode >> 9) & 7) += 4; |
31338 | READ_LONG_F(adr, dst) |
31339 | res = dst - src; |
31340 | flag_NotZ = res; |
31341 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31342 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31343 | flag_N = res >> 24; |
31344 | POST_IO |
31345 | RET(20) |
31346 | } |
31347 | |
31348 | // CMPM7 |
31349 | OPCODE(0xBF08) |
31350 | { |
31351 | u32 adr, res; |
31352 | u32 src, dst; |
31353 | |
31354 | adr = AREG((Opcode >> 0) & 7); |
31355 | AREG((Opcode >> 0) & 7) += 1; |
31356 | PRE_IO |
31357 | READ_BYTE_F(adr, src) |
31358 | adr = AREG(7); |
31359 | AREG(7) += 2; |
31360 | READ_BYTE_F(adr, dst) |
31361 | res = dst - src; |
31362 | flag_N = flag_C = res; |
31363 | flag_V = (src ^ dst) & (res ^ dst); |
31364 | flag_NotZ = res & 0xFF; |
31365 | POST_IO |
31366 | RET(12) |
31367 | } |
31368 | |
31369 | // CMPM7 |
31370 | OPCODE(0xBF48) |
31371 | { |
31372 | u32 adr, res; |
31373 | u32 src, dst; |
31374 | |
31375 | adr = AREG((Opcode >> 0) & 7); |
31376 | AREG((Opcode >> 0) & 7) += 2; |
31377 | PRE_IO |
31378 | READ_WORD_F(adr, src) |
31379 | adr = AREG(7); |
31380 | AREG(7) += 2; |
31381 | READ_WORD_F(adr, dst) |
31382 | res = dst - src; |
31383 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31384 | flag_N = flag_C = res >> 8; |
31385 | flag_NotZ = res & 0xFFFF; |
31386 | POST_IO |
31387 | RET(12) |
31388 | } |
31389 | |
31390 | // CMPM7 |
31391 | OPCODE(0xBF88) |
31392 | { |
31393 | u32 adr, res; |
31394 | u32 src, dst; |
31395 | |
31396 | adr = AREG((Opcode >> 0) & 7); |
31397 | AREG((Opcode >> 0) & 7) += 4; |
31398 | PRE_IO |
31399 | READ_LONG_F(adr, src) |
31400 | adr = AREG(7); |
31401 | AREG(7) += 4; |
31402 | READ_LONG_F(adr, dst) |
31403 | res = dst - src; |
31404 | flag_NotZ = res; |
31405 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31406 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31407 | flag_N = res >> 24; |
31408 | POST_IO |
31409 | RET(20) |
31410 | } |
31411 | |
31412 | // CMP7M7 |
31413 | OPCODE(0xBF0F) |
31414 | { |
31415 | u32 adr, res; |
31416 | u32 src, dst; |
31417 | |
31418 | adr = AREG(7); |
31419 | AREG(7) += 2; |
31420 | PRE_IO |
31421 | READ_BYTE_F(adr, src) |
31422 | adr = AREG(7); |
31423 | AREG(7) += 2; |
31424 | READ_BYTE_F(adr, dst) |
31425 | res = dst - src; |
31426 | flag_N = flag_C = res; |
31427 | flag_V = (src ^ dst) & (res ^ dst); |
31428 | flag_NotZ = res & 0xFF; |
31429 | POST_IO |
31430 | RET(12) |
31431 | } |
31432 | |
31433 | // CMP7M7 |
31434 | OPCODE(0xBF4F) |
31435 | { |
31436 | u32 adr, res; |
31437 | u32 src, dst; |
31438 | |
31439 | adr = AREG(7); |
31440 | AREG(7) += 2; |
31441 | PRE_IO |
31442 | READ_WORD_F(adr, src) |
31443 | adr = AREG(7); |
31444 | AREG(7) += 2; |
31445 | READ_WORD_F(adr, dst) |
31446 | res = dst - src; |
31447 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31448 | flag_N = flag_C = res >> 8; |
31449 | flag_NotZ = res & 0xFFFF; |
31450 | POST_IO |
31451 | RET(12) |
31452 | } |
31453 | |
31454 | // CMP7M7 |
31455 | OPCODE(0xBF8F) |
31456 | { |
31457 | u32 adr, res; |
31458 | u32 src, dst; |
31459 | |
31460 | adr = AREG(7); |
31461 | AREG(7) += 4; |
31462 | PRE_IO |
31463 | READ_LONG_F(adr, src) |
31464 | adr = AREG(7); |
31465 | AREG(7) += 4; |
31466 | READ_LONG_F(adr, dst) |
31467 | res = dst - src; |
31468 | flag_NotZ = res; |
31469 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31470 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31471 | flag_N = res >> 24; |
31472 | POST_IO |
31473 | RET(20) |
31474 | } |
31475 | |
31476 | // EORDa |
31477 | OPCODE(0xB100) |
31478 | { |
31479 | u32 adr, res; |
31480 | u32 src, dst; |
31481 | |
31482 | src = DREGu8((Opcode >> 9) & 7); |
31483 | res = DREGu8((Opcode >> 0) & 7); |
31484 | res ^= src; |
31485 | flag_C = 0; |
31486 | flag_V = 0; |
31487 | flag_NotZ = res; |
31488 | flag_N = res; |
31489 | DREGu8((Opcode >> 0) & 7) = res; |
31490 | RET(4) |
31491 | } |
31492 | |
31493 | // EORDa |
31494 | OPCODE(0xB110) |
31495 | { |
31496 | u32 adr, res; |
31497 | u32 src, dst; |
31498 | |
31499 | src = DREGu8((Opcode >> 9) & 7); |
31500 | adr = AREG((Opcode >> 0) & 7); |
31501 | PRE_IO |
31502 | READ_BYTE_F(adr, res) |
31503 | res ^= src; |
31504 | flag_C = 0; |
31505 | flag_V = 0; |
31506 | flag_NotZ = res; |
31507 | flag_N = res; |
31508 | WRITE_BYTE_F(adr, res) |
31509 | POST_IO |
31510 | RET(12) |
31511 | } |
31512 | |
31513 | // EORDa |
31514 | OPCODE(0xB118) |
31515 | { |
31516 | u32 adr, res; |
31517 | u32 src, dst; |
31518 | |
31519 | src = DREGu8((Opcode >> 9) & 7); |
31520 | adr = AREG((Opcode >> 0) & 7); |
31521 | AREG((Opcode >> 0) & 7) += 1; |
31522 | PRE_IO |
31523 | READ_BYTE_F(adr, res) |
31524 | res ^= src; |
31525 | flag_C = 0; |
31526 | flag_V = 0; |
31527 | flag_NotZ = res; |
31528 | flag_N = res; |
31529 | WRITE_BYTE_F(adr, res) |
31530 | POST_IO |
31531 | RET(12) |
31532 | } |
31533 | |
31534 | // EORDa |
31535 | OPCODE(0xB120) |
31536 | { |
31537 | u32 adr, res; |
31538 | u32 src, dst; |
31539 | |
31540 | src = DREGu8((Opcode >> 9) & 7); |
31541 | adr = AREG((Opcode >> 0) & 7) - 1; |
31542 | AREG((Opcode >> 0) & 7) = adr; |
31543 | PRE_IO |
31544 | READ_BYTE_F(adr, res) |
31545 | res ^= src; |
31546 | flag_C = 0; |
31547 | flag_V = 0; |
31548 | flag_NotZ = res; |
31549 | flag_N = res; |
31550 | WRITE_BYTE_F(adr, res) |
31551 | POST_IO |
31552 | RET(14) |
31553 | } |
31554 | |
31555 | // EORDa |
31556 | OPCODE(0xB128) |
31557 | { |
31558 | u32 adr, res; |
31559 | u32 src, dst; |
31560 | |
31561 | src = DREGu8((Opcode >> 9) & 7); |
31562 | FETCH_SWORD(adr); |
31563 | adr += AREG((Opcode >> 0) & 7); |
31564 | PRE_IO |
31565 | READ_BYTE_F(adr, res) |
31566 | res ^= src; |
31567 | flag_C = 0; |
31568 | flag_V = 0; |
31569 | flag_NotZ = res; |
31570 | flag_N = res; |
31571 | WRITE_BYTE_F(adr, res) |
31572 | POST_IO |
31573 | RET(16) |
31574 | } |
31575 | |
31576 | // EORDa |
31577 | OPCODE(0xB130) |
31578 | { |
31579 | u32 adr, res; |
31580 | u32 src, dst; |
31581 | |
31582 | src = DREGu8((Opcode >> 9) & 7); |
31583 | adr = AREG((Opcode >> 0) & 7); |
31584 | DECODE_EXT_WORD |
31585 | PRE_IO |
31586 | READ_BYTE_F(adr, res) |
31587 | res ^= src; |
31588 | flag_C = 0; |
31589 | flag_V = 0; |
31590 | flag_NotZ = res; |
31591 | flag_N = res; |
31592 | WRITE_BYTE_F(adr, res) |
31593 | POST_IO |
31594 | RET(18) |
31595 | } |
31596 | |
31597 | // EORDa |
31598 | OPCODE(0xB138) |
31599 | { |
31600 | u32 adr, res; |
31601 | u32 src, dst; |
31602 | |
31603 | src = DREGu8((Opcode >> 9) & 7); |
31604 | FETCH_SWORD(adr); |
31605 | PRE_IO |
31606 | READ_BYTE_F(adr, res) |
31607 | res ^= src; |
31608 | flag_C = 0; |
31609 | flag_V = 0; |
31610 | flag_NotZ = res; |
31611 | flag_N = res; |
31612 | WRITE_BYTE_F(adr, res) |
31613 | POST_IO |
31614 | RET(16) |
31615 | } |
31616 | |
31617 | // EORDa |
31618 | OPCODE(0xB139) |
31619 | { |
31620 | u32 adr, res; |
31621 | u32 src, dst; |
31622 | |
31623 | src = DREGu8((Opcode >> 9) & 7); |
31624 | FETCH_LONG(adr); |
31625 | PRE_IO |
31626 | READ_BYTE_F(adr, res) |
31627 | res ^= src; |
31628 | flag_C = 0; |
31629 | flag_V = 0; |
31630 | flag_NotZ = res; |
31631 | flag_N = res; |
31632 | WRITE_BYTE_F(adr, res) |
31633 | POST_IO |
31634 | RET(20) |
31635 | } |
31636 | |
31637 | // EORDa |
31638 | OPCODE(0xB11F) |
31639 | { |
31640 | u32 adr, res; |
31641 | u32 src, dst; |
31642 | |
31643 | src = DREGu8((Opcode >> 9) & 7); |
31644 | adr = AREG(7); |
31645 | AREG(7) += 2; |
31646 | PRE_IO |
31647 | READ_BYTE_F(adr, res) |
31648 | res ^= src; |
31649 | flag_C = 0; |
31650 | flag_V = 0; |
31651 | flag_NotZ = res; |
31652 | flag_N = res; |
31653 | WRITE_BYTE_F(adr, res) |
31654 | POST_IO |
31655 | RET(12) |
31656 | } |
31657 | |
31658 | // EORDa |
31659 | OPCODE(0xB127) |
31660 | { |
31661 | u32 adr, res; |
31662 | u32 src, dst; |
31663 | |
31664 | src = DREGu8((Opcode >> 9) & 7); |
31665 | adr = AREG(7) - 2; |
31666 | AREG(7) = adr; |
31667 | PRE_IO |
31668 | READ_BYTE_F(adr, res) |
31669 | res ^= src; |
31670 | flag_C = 0; |
31671 | flag_V = 0; |
31672 | flag_NotZ = res; |
31673 | flag_N = res; |
31674 | WRITE_BYTE_F(adr, res) |
31675 | POST_IO |
31676 | RET(14) |
31677 | } |
31678 | |
31679 | // EORDa |
31680 | OPCODE(0xB140) |
31681 | { |
31682 | u32 adr, res; |
31683 | u32 src, dst; |
31684 | |
31685 | src = DREGu16((Opcode >> 9) & 7); |
31686 | res = DREGu16((Opcode >> 0) & 7); |
31687 | res ^= src; |
31688 | flag_C = 0; |
31689 | flag_V = 0; |
31690 | flag_NotZ = res; |
31691 | flag_N = res >> 8; |
31692 | DREGu16((Opcode >> 0) & 7) = res; |
31693 | RET(4) |
31694 | } |
31695 | |
31696 | // EORDa |
31697 | OPCODE(0xB150) |
31698 | { |
31699 | u32 adr, res; |
31700 | u32 src, dst; |
31701 | |
31702 | src = DREGu16((Opcode >> 9) & 7); |
31703 | adr = AREG((Opcode >> 0) & 7); |
31704 | PRE_IO |
31705 | READ_WORD_F(adr, res) |
31706 | res ^= src; |
31707 | flag_C = 0; |
31708 | flag_V = 0; |
31709 | flag_NotZ = res; |
31710 | flag_N = res >> 8; |
31711 | WRITE_WORD_F(adr, res) |
31712 | POST_IO |
31713 | RET(12) |
31714 | } |
31715 | |
31716 | // EORDa |
31717 | OPCODE(0xB158) |
31718 | { |
31719 | u32 adr, res; |
31720 | u32 src, dst; |
31721 | |
31722 | src = DREGu16((Opcode >> 9) & 7); |
31723 | adr = AREG((Opcode >> 0) & 7); |
31724 | AREG((Opcode >> 0) & 7) += 2; |
31725 | PRE_IO |
31726 | READ_WORD_F(adr, res) |
31727 | res ^= src; |
31728 | flag_C = 0; |
31729 | flag_V = 0; |
31730 | flag_NotZ = res; |
31731 | flag_N = res >> 8; |
31732 | WRITE_WORD_F(adr, res) |
31733 | POST_IO |
31734 | RET(12) |
31735 | } |
31736 | |
31737 | // EORDa |
31738 | OPCODE(0xB160) |
31739 | { |
31740 | u32 adr, res; |
31741 | u32 src, dst; |
31742 | |
31743 | src = DREGu16((Opcode >> 9) & 7); |
31744 | adr = AREG((Opcode >> 0) & 7) - 2; |
31745 | AREG((Opcode >> 0) & 7) = adr; |
31746 | PRE_IO |
31747 | READ_WORD_F(adr, res) |
31748 | res ^= src; |
31749 | flag_C = 0; |
31750 | flag_V = 0; |
31751 | flag_NotZ = res; |
31752 | flag_N = res >> 8; |
31753 | WRITE_WORD_F(adr, res) |
31754 | POST_IO |
31755 | RET(14) |
31756 | } |
31757 | |
31758 | // EORDa |
31759 | OPCODE(0xB168) |
31760 | { |
31761 | u32 adr, res; |
31762 | u32 src, dst; |
31763 | |
31764 | src = DREGu16((Opcode >> 9) & 7); |
31765 | FETCH_SWORD(adr); |
31766 | adr += AREG((Opcode >> 0) & 7); |
31767 | PRE_IO |
31768 | READ_WORD_F(adr, res) |
31769 | res ^= src; |
31770 | flag_C = 0; |
31771 | flag_V = 0; |
31772 | flag_NotZ = res; |
31773 | flag_N = res >> 8; |
31774 | WRITE_WORD_F(adr, res) |
31775 | POST_IO |
31776 | RET(16) |
31777 | } |
31778 | |
31779 | // EORDa |
31780 | OPCODE(0xB170) |
31781 | { |
31782 | u32 adr, res; |
31783 | u32 src, dst; |
31784 | |
31785 | src = DREGu16((Opcode >> 9) & 7); |
31786 | adr = AREG((Opcode >> 0) & 7); |
31787 | DECODE_EXT_WORD |
31788 | PRE_IO |
31789 | READ_WORD_F(adr, res) |
31790 | res ^= src; |
31791 | flag_C = 0; |
31792 | flag_V = 0; |
31793 | flag_NotZ = res; |
31794 | flag_N = res >> 8; |
31795 | WRITE_WORD_F(adr, res) |
31796 | POST_IO |
31797 | RET(18) |
31798 | } |
31799 | |
31800 | // EORDa |
31801 | OPCODE(0xB178) |
31802 | { |
31803 | u32 adr, res; |
31804 | u32 src, dst; |
31805 | |
31806 | src = DREGu16((Opcode >> 9) & 7); |
31807 | FETCH_SWORD(adr); |
31808 | PRE_IO |
31809 | READ_WORD_F(adr, res) |
31810 | res ^= src; |
31811 | flag_C = 0; |
31812 | flag_V = 0; |
31813 | flag_NotZ = res; |
31814 | flag_N = res >> 8; |
31815 | WRITE_WORD_F(adr, res) |
31816 | POST_IO |
31817 | RET(16) |
31818 | } |
31819 | |
31820 | // EORDa |
31821 | OPCODE(0xB179) |
31822 | { |
31823 | u32 adr, res; |
31824 | u32 src, dst; |
31825 | |
31826 | src = DREGu16((Opcode >> 9) & 7); |
31827 | FETCH_LONG(adr); |
31828 | PRE_IO |
31829 | READ_WORD_F(adr, res) |
31830 | res ^= src; |
31831 | flag_C = 0; |
31832 | flag_V = 0; |
31833 | flag_NotZ = res; |
31834 | flag_N = res >> 8; |
31835 | WRITE_WORD_F(adr, res) |
31836 | POST_IO |
31837 | RET(20) |
31838 | } |
31839 | |
31840 | // EORDa |
31841 | OPCODE(0xB15F) |
31842 | { |
31843 | u32 adr, res; |
31844 | u32 src, dst; |
31845 | |
31846 | src = DREGu16((Opcode >> 9) & 7); |
31847 | adr = AREG(7); |
31848 | AREG(7) += 2; |
31849 | PRE_IO |
31850 | READ_WORD_F(adr, res) |
31851 | res ^= src; |
31852 | flag_C = 0; |
31853 | flag_V = 0; |
31854 | flag_NotZ = res; |
31855 | flag_N = res >> 8; |
31856 | WRITE_WORD_F(adr, res) |
31857 | POST_IO |
31858 | RET(12) |
31859 | } |
31860 | |
31861 | // EORDa |
31862 | OPCODE(0xB167) |
31863 | { |
31864 | u32 adr, res; |
31865 | u32 src, dst; |
31866 | |
31867 | src = DREGu16((Opcode >> 9) & 7); |
31868 | adr = AREG(7) - 2; |
31869 | AREG(7) = adr; |
31870 | PRE_IO |
31871 | READ_WORD_F(adr, res) |
31872 | res ^= src; |
31873 | flag_C = 0; |
31874 | flag_V = 0; |
31875 | flag_NotZ = res; |
31876 | flag_N = res >> 8; |
31877 | WRITE_WORD_F(adr, res) |
31878 | POST_IO |
31879 | RET(14) |
31880 | } |
31881 | |
31882 | // EORDa |
31883 | OPCODE(0xB180) |
31884 | { |
31885 | u32 adr, res; |
31886 | u32 src, dst; |
31887 | |
31888 | src = DREGu32((Opcode >> 9) & 7); |
31889 | res = DREGu32((Opcode >> 0) & 7); |
31890 | res ^= src; |
31891 | flag_C = 0; |
31892 | flag_V = 0; |
31893 | flag_NotZ = res; |
31894 | flag_N = res >> 24; |
31895 | DREGu32((Opcode >> 0) & 7) = res; |
31896 | RET(8) |
31897 | } |
31898 | |
31899 | // EORDa |
31900 | OPCODE(0xB190) |
31901 | { |
31902 | u32 adr, res; |
31903 | u32 src, dst; |
31904 | |
31905 | src = DREGu32((Opcode >> 9) & 7); |
31906 | adr = AREG((Opcode >> 0) & 7); |
31907 | PRE_IO |
31908 | READ_LONG_F(adr, res) |
31909 | res ^= src; |
31910 | flag_C = 0; |
31911 | flag_V = 0; |
31912 | flag_NotZ = res; |
31913 | flag_N = res >> 24; |
31914 | WRITE_LONG_F(adr, res) |
31915 | POST_IO |
31916 | RET(20) |
31917 | } |
31918 | |
31919 | // EORDa |
31920 | OPCODE(0xB198) |
31921 | { |
31922 | u32 adr, res; |
31923 | u32 src, dst; |
31924 | |
31925 | src = DREGu32((Opcode >> 9) & 7); |
31926 | adr = AREG((Opcode >> 0) & 7); |
31927 | AREG((Opcode >> 0) & 7) += 4; |
31928 | PRE_IO |
31929 | READ_LONG_F(adr, res) |
31930 | res ^= src; |
31931 | flag_C = 0; |
31932 | flag_V = 0; |
31933 | flag_NotZ = res; |
31934 | flag_N = res >> 24; |
31935 | WRITE_LONG_F(adr, res) |
31936 | POST_IO |
31937 | RET(20) |
31938 | } |
31939 | |
31940 | // EORDa |
31941 | OPCODE(0xB1A0) |
31942 | { |
31943 | u32 adr, res; |
31944 | u32 src, dst; |
31945 | |
31946 | src = DREGu32((Opcode >> 9) & 7); |
31947 | adr = AREG((Opcode >> 0) & 7) - 4; |
31948 | AREG((Opcode >> 0) & 7) = adr; |
31949 | PRE_IO |
31950 | READ_LONG_F(adr, res) |
31951 | res ^= src; |
31952 | flag_C = 0; |
31953 | flag_V = 0; |
31954 | flag_NotZ = res; |
31955 | flag_N = res >> 24; |
31956 | WRITE_LONG_F(adr, res) |
31957 | POST_IO |
31958 | RET(22) |
31959 | } |
31960 | |
31961 | // EORDa |
31962 | OPCODE(0xB1A8) |
31963 | { |
31964 | u32 adr, res; |
31965 | u32 src, dst; |
31966 | |
31967 | src = DREGu32((Opcode >> 9) & 7); |
31968 | FETCH_SWORD(adr); |
31969 | adr += AREG((Opcode >> 0) & 7); |
31970 | PRE_IO |
31971 | READ_LONG_F(adr, res) |
31972 | res ^= src; |
31973 | flag_C = 0; |
31974 | flag_V = 0; |
31975 | flag_NotZ = res; |
31976 | flag_N = res >> 24; |
31977 | WRITE_LONG_F(adr, res) |
31978 | POST_IO |
31979 | RET(24) |
31980 | } |
31981 | |
31982 | // EORDa |
31983 | OPCODE(0xB1B0) |
31984 | { |
31985 | u32 adr, res; |
31986 | u32 src, dst; |
31987 | |
31988 | src = DREGu32((Opcode >> 9) & 7); |
31989 | adr = AREG((Opcode >> 0) & 7); |
31990 | DECODE_EXT_WORD |
31991 | PRE_IO |
31992 | READ_LONG_F(adr, res) |
31993 | res ^= src; |
31994 | flag_C = 0; |
31995 | flag_V = 0; |
31996 | flag_NotZ = res; |
31997 | flag_N = res >> 24; |
31998 | WRITE_LONG_F(adr, res) |
31999 | POST_IO |
32000 | RET(26) |
32001 | } |
32002 | |
32003 | // EORDa |
32004 | OPCODE(0xB1B8) |
32005 | { |
32006 | u32 adr, res; |
32007 | u32 src, dst; |
32008 | |
32009 | src = DREGu32((Opcode >> 9) & 7); |
32010 | FETCH_SWORD(adr); |
32011 | PRE_IO |
32012 | READ_LONG_F(adr, res) |
32013 | res ^= src; |
32014 | flag_C = 0; |
32015 | flag_V = 0; |
32016 | flag_NotZ = res; |
32017 | flag_N = res >> 24; |
32018 | WRITE_LONG_F(adr, res) |
32019 | POST_IO |
32020 | RET(24) |
32021 | } |
32022 | |
32023 | // EORDa |
32024 | OPCODE(0xB1B9) |
32025 | { |
32026 | u32 adr, res; |
32027 | u32 src, dst; |
32028 | |
32029 | src = DREGu32((Opcode >> 9) & 7); |
32030 | FETCH_LONG(adr); |
32031 | PRE_IO |
32032 | READ_LONG_F(adr, res) |
32033 | res ^= src; |
32034 | flag_C = 0; |
32035 | flag_V = 0; |
32036 | flag_NotZ = res; |
32037 | flag_N = res >> 24; |
32038 | WRITE_LONG_F(adr, res) |
32039 | POST_IO |
32040 | RET(28) |
32041 | } |
32042 | |
32043 | // EORDa |
32044 | OPCODE(0xB19F) |
32045 | { |
32046 | u32 adr, res; |
32047 | u32 src, dst; |
32048 | |
32049 | src = DREGu32((Opcode >> 9) & 7); |
32050 | adr = AREG(7); |
32051 | AREG(7) += 4; |
32052 | PRE_IO |
32053 | READ_LONG_F(adr, res) |
32054 | res ^= src; |
32055 | flag_C = 0; |
32056 | flag_V = 0; |
32057 | flag_NotZ = res; |
32058 | flag_N = res >> 24; |
32059 | WRITE_LONG_F(adr, res) |
32060 | POST_IO |
32061 | RET(20) |
32062 | } |
32063 | |
32064 | // EORDa |
32065 | OPCODE(0xB1A7) |
32066 | { |
32067 | u32 adr, res; |
32068 | u32 src, dst; |
32069 | |
32070 | src = DREGu32((Opcode >> 9) & 7); |
32071 | adr = AREG(7) - 4; |
32072 | AREG(7) = adr; |
32073 | PRE_IO |
32074 | READ_LONG_F(adr, res) |
32075 | res ^= src; |
32076 | flag_C = 0; |
32077 | flag_V = 0; |
32078 | flag_NotZ = res; |
32079 | flag_N = res >> 24; |
32080 | WRITE_LONG_F(adr, res) |
32081 | POST_IO |
32082 | RET(22) |
32083 | } |
32084 | |
32085 | // CMPA |
32086 | OPCODE(0xB0C0) |
32087 | { |
32088 | u32 adr, res; |
32089 | u32 src, dst; |
32090 | |
32091 | src = (s32)DREGs16((Opcode >> 0) & 7); |
32092 | dst = AREGu32((Opcode >> 9) & 7); |
32093 | res = dst - src; |
32094 | flag_NotZ = res; |
32095 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32096 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32097 | flag_N = res >> 24; |
32098 | RET(6) |
32099 | } |
32100 | |
32101 | // CMPA |
32102 | OPCODE(0xB0C8) |
32103 | { |
32104 | u32 adr, res; |
32105 | u32 src, dst; |
32106 | |
32107 | src = (s32)AREGs16((Opcode >> 0) & 7); |
32108 | dst = AREGu32((Opcode >> 9) & 7); |
32109 | res = dst - src; |
32110 | flag_NotZ = res; |
32111 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32112 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32113 | flag_N = res >> 24; |
32114 | RET(6) |
32115 | } |
32116 | |
32117 | // CMPA |
32118 | OPCODE(0xB0D0) |
32119 | { |
32120 | u32 adr, res; |
32121 | u32 src, dst; |
32122 | |
32123 | adr = AREG((Opcode >> 0) & 7); |
32124 | PRE_IO |
32125 | READSX_WORD_F(adr, src) |
32126 | dst = AREGu32((Opcode >> 9) & 7); |
32127 | res = dst - src; |
32128 | flag_NotZ = res; |
32129 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32130 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32131 | flag_N = res >> 24; |
32132 | POST_IO |
32133 | RET(10) |
32134 | } |
32135 | |
32136 | // CMPA |
32137 | OPCODE(0xB0D8) |
32138 | { |
32139 | u32 adr, res; |
32140 | u32 src, dst; |
32141 | |
32142 | adr = AREG((Opcode >> 0) & 7); |
32143 | AREG((Opcode >> 0) & 7) += 2; |
32144 | PRE_IO |
32145 | READSX_WORD_F(adr, src) |
32146 | dst = AREGu32((Opcode >> 9) & 7); |
32147 | res = dst - src; |
32148 | flag_NotZ = res; |
32149 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32150 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32151 | flag_N = res >> 24; |
32152 | POST_IO |
32153 | RET(10) |
32154 | } |
32155 | |
32156 | // CMPA |
32157 | OPCODE(0xB0E0) |
32158 | { |
32159 | u32 adr, res; |
32160 | u32 src, dst; |
32161 | |
32162 | adr = AREG((Opcode >> 0) & 7) - 2; |
32163 | AREG((Opcode >> 0) & 7) = adr; |
32164 | PRE_IO |
32165 | READSX_WORD_F(adr, src) |
32166 | dst = AREGu32((Opcode >> 9) & 7); |
32167 | res = dst - src; |
32168 | flag_NotZ = res; |
32169 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32170 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32171 | flag_N = res >> 24; |
32172 | POST_IO |
32173 | RET(12) |
32174 | } |
32175 | |
32176 | // CMPA |
32177 | OPCODE(0xB0E8) |
32178 | { |
32179 | u32 adr, res; |
32180 | u32 src, dst; |
32181 | |
32182 | FETCH_SWORD(adr); |
32183 | adr += AREG((Opcode >> 0) & 7); |
32184 | PRE_IO |
32185 | READSX_WORD_F(adr, src) |
32186 | dst = AREGu32((Opcode >> 9) & 7); |
32187 | res = dst - src; |
32188 | flag_NotZ = res; |
32189 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32190 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32191 | flag_N = res >> 24; |
32192 | POST_IO |
32193 | RET(14) |
32194 | } |
32195 | |
32196 | // CMPA |
32197 | OPCODE(0xB0F0) |
32198 | { |
32199 | u32 adr, res; |
32200 | u32 src, dst; |
32201 | |
32202 | adr = AREG((Opcode >> 0) & 7); |
32203 | DECODE_EXT_WORD |
32204 | PRE_IO |
32205 | READSX_WORD_F(adr, src) |
32206 | dst = AREGu32((Opcode >> 9) & 7); |
32207 | res = dst - src; |
32208 | flag_NotZ = res; |
32209 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32210 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32211 | flag_N = res >> 24; |
32212 | POST_IO |
32213 | RET(16) |
32214 | } |
32215 | |
32216 | // CMPA |
32217 | OPCODE(0xB0F8) |
32218 | { |
32219 | u32 adr, res; |
32220 | u32 src, dst; |
32221 | |
32222 | FETCH_SWORD(adr); |
32223 | PRE_IO |
32224 | READSX_WORD_F(adr, src) |
32225 | dst = AREGu32((Opcode >> 9) & 7); |
32226 | res = dst - src; |
32227 | flag_NotZ = res; |
32228 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32229 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32230 | flag_N = res >> 24; |
32231 | POST_IO |
32232 | RET(14) |
32233 | } |
32234 | |
32235 | // CMPA |
32236 | OPCODE(0xB0F9) |
32237 | { |
32238 | u32 adr, res; |
32239 | u32 src, dst; |
32240 | |
32241 | FETCH_LONG(adr); |
32242 | PRE_IO |
32243 | READSX_WORD_F(adr, src) |
32244 | dst = AREGu32((Opcode >> 9) & 7); |
32245 | res = dst - src; |
32246 | flag_NotZ = res; |
32247 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32248 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32249 | flag_N = res >> 24; |
32250 | POST_IO |
32251 | RET(18) |
32252 | } |
32253 | |
32254 | // CMPA |
32255 | OPCODE(0xB0FA) |
32256 | { |
32257 | u32 adr, res; |
32258 | u32 src, dst; |
32259 | |
32260 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32261 | PC++; |
32262 | PRE_IO |
32263 | READSX_WORD_F(adr, src) |
32264 | dst = AREGu32((Opcode >> 9) & 7); |
32265 | res = dst - src; |
32266 | flag_NotZ = res; |
32267 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32268 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32269 | flag_N = res >> 24; |
32270 | POST_IO |
32271 | RET(14) |
32272 | } |
32273 | |
32274 | // CMPA |
32275 | OPCODE(0xB0FB) |
32276 | { |
32277 | u32 adr, res; |
32278 | u32 src, dst; |
32279 | |
32280 | adr = (u32)(PC) - BasePC; |
32281 | DECODE_EXT_WORD |
32282 | PRE_IO |
32283 | READSX_WORD_F(adr, src) |
32284 | dst = AREGu32((Opcode >> 9) & 7); |
32285 | res = dst - src; |
32286 | flag_NotZ = res; |
32287 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32288 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32289 | flag_N = res >> 24; |
32290 | POST_IO |
32291 | RET(16) |
32292 | } |
32293 | |
32294 | // CMPA |
32295 | OPCODE(0xB0FC) |
32296 | { |
32297 | u32 adr, res; |
32298 | u32 src, dst; |
32299 | |
32300 | FETCH_SWORD(src); |
32301 | dst = AREGu32((Opcode >> 9) & 7); |
32302 | res = dst - src; |
32303 | flag_NotZ = res; |
32304 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32305 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32306 | flag_N = res >> 24; |
32307 | RET(10) |
32308 | } |
32309 | |
32310 | // CMPA |
32311 | OPCODE(0xB0DF) |
32312 | { |
32313 | u32 adr, res; |
32314 | u32 src, dst; |
32315 | |
32316 | adr = AREG(7); |
32317 | AREG(7) += 2; |
32318 | PRE_IO |
32319 | READSX_WORD_F(adr, src) |
32320 | dst = AREGu32((Opcode >> 9) & 7); |
32321 | res = dst - src; |
32322 | flag_NotZ = res; |
32323 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32324 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32325 | flag_N = res >> 24; |
32326 | POST_IO |
32327 | RET(10) |
32328 | } |
32329 | |
32330 | // CMPA |
32331 | OPCODE(0xB0E7) |
32332 | { |
32333 | u32 adr, res; |
32334 | u32 src, dst; |
32335 | |
32336 | adr = AREG(7) - 2; |
32337 | AREG(7) = adr; |
32338 | PRE_IO |
32339 | READSX_WORD_F(adr, src) |
32340 | dst = AREGu32((Opcode >> 9) & 7); |
32341 | res = dst - src; |
32342 | flag_NotZ = res; |
32343 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32344 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32345 | flag_N = res >> 24; |
32346 | POST_IO |
32347 | RET(12) |
32348 | } |
32349 | |
32350 | // CMPA |
32351 | OPCODE(0xB1C0) |
32352 | { |
32353 | u32 adr, res; |
32354 | u32 src, dst; |
32355 | |
32356 | src = (s32)DREGs32((Opcode >> 0) & 7); |
32357 | dst = AREGu32((Opcode >> 9) & 7); |
32358 | res = dst - src; |
32359 | flag_NotZ = res; |
32360 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32361 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32362 | flag_N = res >> 24; |
32363 | RET(6) |
32364 | } |
32365 | |
32366 | // CMPA |
32367 | OPCODE(0xB1C8) |
32368 | { |
32369 | u32 adr, res; |
32370 | u32 src, dst; |
32371 | |
32372 | src = (s32)AREGs32((Opcode >> 0) & 7); |
32373 | dst = AREGu32((Opcode >> 9) & 7); |
32374 | res = dst - src; |
32375 | flag_NotZ = res; |
32376 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32377 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32378 | flag_N = res >> 24; |
32379 | RET(6) |
32380 | } |
32381 | |
32382 | // CMPA |
32383 | OPCODE(0xB1D0) |
32384 | { |
32385 | u32 adr, res; |
32386 | u32 src, dst; |
32387 | |
32388 | adr = AREG((Opcode >> 0) & 7); |
32389 | PRE_IO |
32390 | READSX_LONG_F(adr, src) |
32391 | dst = AREGu32((Opcode >> 9) & 7); |
32392 | res = dst - src; |
32393 | flag_NotZ = res; |
32394 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32395 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32396 | flag_N = res >> 24; |
32397 | POST_IO |
32398 | RET(14) |
32399 | } |
32400 | |
32401 | // CMPA |
32402 | OPCODE(0xB1D8) |
32403 | { |
32404 | u32 adr, res; |
32405 | u32 src, dst; |
32406 | |
32407 | adr = AREG((Opcode >> 0) & 7); |
32408 | AREG((Opcode >> 0) & 7) += 4; |
32409 | PRE_IO |
32410 | READSX_LONG_F(adr, src) |
32411 | dst = AREGu32((Opcode >> 9) & 7); |
32412 | res = dst - src; |
32413 | flag_NotZ = res; |
32414 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32415 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32416 | flag_N = res >> 24; |
32417 | POST_IO |
32418 | RET(14) |
32419 | } |
32420 | |
32421 | // CMPA |
32422 | OPCODE(0xB1E0) |
32423 | { |
32424 | u32 adr, res; |
32425 | u32 src, dst; |
32426 | |
32427 | adr = AREG((Opcode >> 0) & 7) - 4; |
32428 | AREG((Opcode >> 0) & 7) = adr; |
32429 | PRE_IO |
32430 | READSX_LONG_F(adr, src) |
32431 | dst = AREGu32((Opcode >> 9) & 7); |
32432 | res = dst - src; |
32433 | flag_NotZ = res; |
32434 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32435 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32436 | flag_N = res >> 24; |
32437 | POST_IO |
32438 | RET(16) |
32439 | } |
32440 | |
32441 | // CMPA |
32442 | OPCODE(0xB1E8) |
32443 | { |
32444 | u32 adr, res; |
32445 | u32 src, dst; |
32446 | |
32447 | FETCH_SWORD(adr); |
32448 | adr += AREG((Opcode >> 0) & 7); |
32449 | PRE_IO |
32450 | READSX_LONG_F(adr, src) |
32451 | dst = AREGu32((Opcode >> 9) & 7); |
32452 | res = dst - src; |
32453 | flag_NotZ = res; |
32454 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32455 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32456 | flag_N = res >> 24; |
32457 | POST_IO |
32458 | RET(18) |
32459 | } |
32460 | |
32461 | // CMPA |
32462 | OPCODE(0xB1F0) |
32463 | { |
32464 | u32 adr, res; |
32465 | u32 src, dst; |
32466 | |
32467 | adr = AREG((Opcode >> 0) & 7); |
32468 | DECODE_EXT_WORD |
32469 | PRE_IO |
32470 | READSX_LONG_F(adr, src) |
32471 | dst = AREGu32((Opcode >> 9) & 7); |
32472 | res = dst - src; |
32473 | flag_NotZ = res; |
32474 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32475 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32476 | flag_N = res >> 24; |
32477 | POST_IO |
32478 | RET(20) |
32479 | } |
32480 | |
32481 | // CMPA |
32482 | OPCODE(0xB1F8) |
32483 | { |
32484 | u32 adr, res; |
32485 | u32 src, dst; |
32486 | |
32487 | FETCH_SWORD(adr); |
32488 | PRE_IO |
32489 | READSX_LONG_F(adr, src) |
32490 | dst = AREGu32((Opcode >> 9) & 7); |
32491 | res = dst - src; |
32492 | flag_NotZ = res; |
32493 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32494 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32495 | flag_N = res >> 24; |
32496 | POST_IO |
32497 | RET(18) |
32498 | } |
32499 | |
32500 | // CMPA |
32501 | OPCODE(0xB1F9) |
32502 | { |
32503 | u32 adr, res; |
32504 | u32 src, dst; |
32505 | |
32506 | FETCH_LONG(adr); |
32507 | PRE_IO |
32508 | READSX_LONG_F(adr, src) |
32509 | dst = AREGu32((Opcode >> 9) & 7); |
32510 | res = dst - src; |
32511 | flag_NotZ = res; |
32512 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32513 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32514 | flag_N = res >> 24; |
32515 | POST_IO |
32516 | RET(22) |
32517 | } |
32518 | |
32519 | // CMPA |
32520 | OPCODE(0xB1FA) |
32521 | { |
32522 | u32 adr, res; |
32523 | u32 src, dst; |
32524 | |
32525 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32526 | PC++; |
32527 | PRE_IO |
32528 | READSX_LONG_F(adr, src) |
32529 | dst = AREGu32((Opcode >> 9) & 7); |
32530 | res = dst - src; |
32531 | flag_NotZ = res; |
32532 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32533 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32534 | flag_N = res >> 24; |
32535 | POST_IO |
32536 | RET(18) |
32537 | } |
32538 | |
32539 | // CMPA |
32540 | OPCODE(0xB1FB) |
32541 | { |
32542 | u32 adr, res; |
32543 | u32 src, dst; |
32544 | |
32545 | adr = (u32)(PC) - BasePC; |
32546 | DECODE_EXT_WORD |
32547 | PRE_IO |
32548 | READSX_LONG_F(adr, src) |
32549 | dst = AREGu32((Opcode >> 9) & 7); |
32550 | res = dst - src; |
32551 | flag_NotZ = res; |
32552 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32553 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32554 | flag_N = res >> 24; |
32555 | POST_IO |
32556 | RET(20) |
32557 | } |
32558 | |
32559 | // CMPA |
32560 | OPCODE(0xB1FC) |
32561 | { |
32562 | u32 adr, res; |
32563 | u32 src, dst; |
32564 | |
32565 | FETCH_LONG(src); |
32566 | dst = AREGu32((Opcode >> 9) & 7); |
32567 | res = dst - src; |
32568 | flag_NotZ = res; |
32569 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32570 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32571 | flag_N = res >> 24; |
32572 | RET(14) |
32573 | } |
32574 | |
32575 | // CMPA |
32576 | OPCODE(0xB1DF) |
32577 | { |
32578 | u32 adr, res; |
32579 | u32 src, dst; |
32580 | |
32581 | adr = AREG(7); |
32582 | AREG(7) += 4; |
32583 | PRE_IO |
32584 | READSX_LONG_F(adr, src) |
32585 | dst = AREGu32((Opcode >> 9) & 7); |
32586 | res = dst - src; |
32587 | flag_NotZ = res; |
32588 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32589 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32590 | flag_N = res >> 24; |
32591 | POST_IO |
32592 | RET(14) |
32593 | } |
32594 | |
32595 | // CMPA |
32596 | OPCODE(0xB1E7) |
32597 | { |
32598 | u32 adr, res; |
32599 | u32 src, dst; |
32600 | |
32601 | adr = AREG(7) - 4; |
32602 | AREG(7) = adr; |
32603 | PRE_IO |
32604 | READSX_LONG_F(adr, src) |
32605 | dst = AREGu32((Opcode >> 9) & 7); |
32606 | res = dst - src; |
32607 | flag_NotZ = res; |
32608 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32609 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32610 | flag_N = res >> 24; |
32611 | POST_IO |
32612 | RET(16) |
32613 | } |
32614 | |
32615 | // ANDaD |
32616 | OPCODE(0xC000) |
32617 | { |
32618 | u32 adr, res; |
32619 | u32 src, dst; |
32620 | |
32621 | src = DREGu8((Opcode >> 0) & 7); |
32622 | res = DREGu8((Opcode >> 9) & 7); |
32623 | res &= src; |
32624 | flag_C = 0; |
32625 | flag_V = 0; |
32626 | flag_NotZ = res; |
32627 | flag_N = res; |
32628 | DREGu8((Opcode >> 9) & 7) = res; |
32629 | RET(4) |
32630 | } |
32631 | |
32632 | // ANDaD |
32633 | OPCODE(0xC010) |
32634 | { |
32635 | u32 adr, res; |
32636 | u32 src, dst; |
32637 | |
32638 | adr = AREG((Opcode >> 0) & 7); |
32639 | PRE_IO |
32640 | READ_BYTE_F(adr, src) |
32641 | res = DREGu8((Opcode >> 9) & 7); |
32642 | res &= src; |
32643 | flag_C = 0; |
32644 | flag_V = 0; |
32645 | flag_NotZ = res; |
32646 | flag_N = res; |
32647 | DREGu8((Opcode >> 9) & 7) = res; |
32648 | POST_IO |
32649 | RET(8) |
32650 | } |
32651 | |
32652 | // ANDaD |
32653 | OPCODE(0xC018) |
32654 | { |
32655 | u32 adr, res; |
32656 | u32 src, dst; |
32657 | |
32658 | adr = AREG((Opcode >> 0) & 7); |
32659 | AREG((Opcode >> 0) & 7) += 1; |
32660 | PRE_IO |
32661 | READ_BYTE_F(adr, src) |
32662 | res = DREGu8((Opcode >> 9) & 7); |
32663 | res &= src; |
32664 | flag_C = 0; |
32665 | flag_V = 0; |
32666 | flag_NotZ = res; |
32667 | flag_N = res; |
32668 | DREGu8((Opcode >> 9) & 7) = res; |
32669 | POST_IO |
32670 | RET(8) |
32671 | } |
32672 | |
32673 | // ANDaD |
32674 | OPCODE(0xC020) |
32675 | { |
32676 | u32 adr, res; |
32677 | u32 src, dst; |
32678 | |
32679 | adr = AREG((Opcode >> 0) & 7) - 1; |
32680 | AREG((Opcode >> 0) & 7) = adr; |
32681 | PRE_IO |
32682 | READ_BYTE_F(adr, src) |
32683 | res = DREGu8((Opcode >> 9) & 7); |
32684 | res &= src; |
32685 | flag_C = 0; |
32686 | flag_V = 0; |
32687 | flag_NotZ = res; |
32688 | flag_N = res; |
32689 | DREGu8((Opcode >> 9) & 7) = res; |
32690 | POST_IO |
32691 | RET(10) |
32692 | } |
32693 | |
32694 | // ANDaD |
32695 | OPCODE(0xC028) |
32696 | { |
32697 | u32 adr, res; |
32698 | u32 src, dst; |
32699 | |
32700 | FETCH_SWORD(adr); |
32701 | adr += AREG((Opcode >> 0) & 7); |
32702 | PRE_IO |
32703 | READ_BYTE_F(adr, src) |
32704 | res = DREGu8((Opcode >> 9) & 7); |
32705 | res &= src; |
32706 | flag_C = 0; |
32707 | flag_V = 0; |
32708 | flag_NotZ = res; |
32709 | flag_N = res; |
32710 | DREGu8((Opcode >> 9) & 7) = res; |
32711 | POST_IO |
32712 | RET(12) |
32713 | } |
32714 | |
32715 | // ANDaD |
32716 | OPCODE(0xC030) |
32717 | { |
32718 | u32 adr, res; |
32719 | u32 src, dst; |
32720 | |
32721 | adr = AREG((Opcode >> 0) & 7); |
32722 | DECODE_EXT_WORD |
32723 | PRE_IO |
32724 | READ_BYTE_F(adr, src) |
32725 | res = DREGu8((Opcode >> 9) & 7); |
32726 | res &= src; |
32727 | flag_C = 0; |
32728 | flag_V = 0; |
32729 | flag_NotZ = res; |
32730 | flag_N = res; |
32731 | DREGu8((Opcode >> 9) & 7) = res; |
32732 | POST_IO |
32733 | RET(14) |
32734 | } |
32735 | |
32736 | // ANDaD |
32737 | OPCODE(0xC038) |
32738 | { |
32739 | u32 adr, res; |
32740 | u32 src, dst; |
32741 | |
32742 | FETCH_SWORD(adr); |
32743 | PRE_IO |
32744 | READ_BYTE_F(adr, src) |
32745 | res = DREGu8((Opcode >> 9) & 7); |
32746 | res &= src; |
32747 | flag_C = 0; |
32748 | flag_V = 0; |
32749 | flag_NotZ = res; |
32750 | flag_N = res; |
32751 | DREGu8((Opcode >> 9) & 7) = res; |
32752 | POST_IO |
32753 | RET(12) |
32754 | } |
32755 | |
32756 | // ANDaD |
32757 | OPCODE(0xC039) |
32758 | { |
32759 | u32 adr, res; |
32760 | u32 src, dst; |
32761 | |
32762 | FETCH_LONG(adr); |
32763 | PRE_IO |
32764 | READ_BYTE_F(adr, src) |
32765 | res = DREGu8((Opcode >> 9) & 7); |
32766 | res &= src; |
32767 | flag_C = 0; |
32768 | flag_V = 0; |
32769 | flag_NotZ = res; |
32770 | flag_N = res; |
32771 | DREGu8((Opcode >> 9) & 7) = res; |
32772 | POST_IO |
32773 | RET(16) |
32774 | } |
32775 | |
32776 | // ANDaD |
32777 | OPCODE(0xC03A) |
32778 | { |
32779 | u32 adr, res; |
32780 | u32 src, dst; |
32781 | |
32782 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
32783 | PC++; |
32784 | PRE_IO |
32785 | READ_BYTE_F(adr, src) |
32786 | res = DREGu8((Opcode >> 9) & 7); |
32787 | res &= src; |
32788 | flag_C = 0; |
32789 | flag_V = 0; |
32790 | flag_NotZ = res; |
32791 | flag_N = res; |
32792 | DREGu8((Opcode >> 9) & 7) = res; |
32793 | POST_IO |
32794 | RET(12) |
32795 | } |
32796 | |
32797 | // ANDaD |
32798 | OPCODE(0xC03B) |
32799 | { |
32800 | u32 adr, res; |
32801 | u32 src, dst; |
32802 | |
32803 | adr = (u32)(PC) - BasePC; |
32804 | DECODE_EXT_WORD |
32805 | PRE_IO |
32806 | READ_BYTE_F(adr, src) |
32807 | res = DREGu8((Opcode >> 9) & 7); |
32808 | res &= src; |
32809 | flag_C = 0; |
32810 | flag_V = 0; |
32811 | flag_NotZ = res; |
32812 | flag_N = res; |
32813 | DREGu8((Opcode >> 9) & 7) = res; |
32814 | POST_IO |
32815 | RET(14) |
32816 | } |
32817 | |
32818 | // ANDaD |
32819 | OPCODE(0xC03C) |
32820 | { |
32821 | u32 adr, res; |
32822 | u32 src, dst; |
32823 | |
32824 | FETCH_BYTE(src); |
32825 | res = DREGu8((Opcode >> 9) & 7); |
32826 | res &= src; |
32827 | flag_C = 0; |
32828 | flag_V = 0; |
32829 | flag_NotZ = res; |
32830 | flag_N = res; |
32831 | DREGu8((Opcode >> 9) & 7) = res; |
32832 | RET(8) |
32833 | } |
32834 | |
32835 | // ANDaD |
32836 | OPCODE(0xC01F) |
32837 | { |
32838 | u32 adr, res; |
32839 | u32 src, dst; |
32840 | |
32841 | adr = AREG(7); |
32842 | AREG(7) += 2; |
32843 | PRE_IO |
32844 | READ_BYTE_F(adr, src) |
32845 | res = DREGu8((Opcode >> 9) & 7); |
32846 | res &= src; |
32847 | flag_C = 0; |
32848 | flag_V = 0; |
32849 | flag_NotZ = res; |
32850 | flag_N = res; |
32851 | DREGu8((Opcode >> 9) & 7) = res; |
32852 | POST_IO |
32853 | RET(8) |
32854 | } |
32855 | |
32856 | // ANDaD |
32857 | OPCODE(0xC027) |
32858 | { |
32859 | u32 adr, res; |
32860 | u32 src, dst; |
32861 | |
32862 | adr = AREG(7) - 2; |
32863 | AREG(7) = adr; |
32864 | PRE_IO |
32865 | READ_BYTE_F(adr, src) |
32866 | res = DREGu8((Opcode >> 9) & 7); |
32867 | res &= src; |
32868 | flag_C = 0; |
32869 | flag_V = 0; |
32870 | flag_NotZ = res; |
32871 | flag_N = res; |
32872 | DREGu8((Opcode >> 9) & 7) = res; |
32873 | POST_IO |
32874 | RET(10) |
32875 | } |
32876 | |
32877 | // ANDaD |
32878 | OPCODE(0xC040) |
32879 | { |
32880 | u32 adr, res; |
32881 | u32 src, dst; |
32882 | |
32883 | src = DREGu16((Opcode >> 0) & 7); |
32884 | res = DREGu16((Opcode >> 9) & 7); |
32885 | res &= src; |
32886 | flag_C = 0; |
32887 | flag_V = 0; |
32888 | flag_NotZ = res; |
32889 | flag_N = res >> 8; |
32890 | DREGu16((Opcode >> 9) & 7) = res; |
32891 | RET(4) |
32892 | } |
32893 | |
32894 | // ANDaD |
32895 | OPCODE(0xC050) |
32896 | { |
32897 | u32 adr, res; |
32898 | u32 src, dst; |
32899 | |
32900 | adr = AREG((Opcode >> 0) & 7); |
32901 | PRE_IO |
32902 | READ_WORD_F(adr, src) |
32903 | res = DREGu16((Opcode >> 9) & 7); |
32904 | res &= src; |
32905 | flag_C = 0; |
32906 | flag_V = 0; |
32907 | flag_NotZ = res; |
32908 | flag_N = res >> 8; |
32909 | DREGu16((Opcode >> 9) & 7) = res; |
32910 | POST_IO |
32911 | RET(8) |
32912 | } |
32913 | |
32914 | // ANDaD |
32915 | OPCODE(0xC058) |
32916 | { |
32917 | u32 adr, res; |
32918 | u32 src, dst; |
32919 | |
32920 | adr = AREG((Opcode >> 0) & 7); |
32921 | AREG((Opcode >> 0) & 7) += 2; |
32922 | PRE_IO |
32923 | READ_WORD_F(adr, src) |
32924 | res = DREGu16((Opcode >> 9) & 7); |
32925 | res &= src; |
32926 | flag_C = 0; |
32927 | flag_V = 0; |
32928 | flag_NotZ = res; |
32929 | flag_N = res >> 8; |
32930 | DREGu16((Opcode >> 9) & 7) = res; |
32931 | POST_IO |
32932 | RET(8) |
32933 | } |
32934 | |
32935 | // ANDaD |
32936 | OPCODE(0xC060) |
32937 | { |
32938 | u32 adr, res; |
32939 | u32 src, dst; |
32940 | |
32941 | adr = AREG((Opcode >> 0) & 7) - 2; |
32942 | AREG((Opcode >> 0) & 7) = adr; |
32943 | PRE_IO |
32944 | READ_WORD_F(adr, src) |
32945 | res = DREGu16((Opcode >> 9) & 7); |
32946 | res &= src; |
32947 | flag_C = 0; |
32948 | flag_V = 0; |
32949 | flag_NotZ = res; |
32950 | flag_N = res >> 8; |
32951 | DREGu16((Opcode >> 9) & 7) = res; |
32952 | POST_IO |
32953 | RET(10) |
32954 | } |
32955 | |
32956 | // ANDaD |
32957 | OPCODE(0xC068) |
32958 | { |
32959 | u32 adr, res; |
32960 | u32 src, dst; |
32961 | |
32962 | FETCH_SWORD(adr); |
32963 | adr += AREG((Opcode >> 0) & 7); |
32964 | PRE_IO |
32965 | READ_WORD_F(adr, src) |
32966 | res = DREGu16((Opcode >> 9) & 7); |
32967 | res &= src; |
32968 | flag_C = 0; |
32969 | flag_V = 0; |
32970 | flag_NotZ = res; |
32971 | flag_N = res >> 8; |
32972 | DREGu16((Opcode >> 9) & 7) = res; |
32973 | POST_IO |
32974 | RET(12) |
32975 | } |
32976 | |
32977 | // ANDaD |
32978 | OPCODE(0xC070) |
32979 | { |
32980 | u32 adr, res; |
32981 | u32 src, dst; |
32982 | |
32983 | adr = AREG((Opcode >> 0) & 7); |
32984 | DECODE_EXT_WORD |
32985 | PRE_IO |
32986 | READ_WORD_F(adr, src) |
32987 | res = DREGu16((Opcode >> 9) & 7); |
32988 | res &= src; |
32989 | flag_C = 0; |
32990 | flag_V = 0; |
32991 | flag_NotZ = res; |
32992 | flag_N = res >> 8; |
32993 | DREGu16((Opcode >> 9) & 7) = res; |
32994 | POST_IO |
32995 | RET(14) |
32996 | } |
32997 | |
32998 | // ANDaD |
32999 | OPCODE(0xC078) |
33000 | { |
33001 | u32 adr, res; |
33002 | u32 src, dst; |
33003 | |
33004 | FETCH_SWORD(adr); |
33005 | PRE_IO |
33006 | READ_WORD_F(adr, src) |
33007 | res = DREGu16((Opcode >> 9) & 7); |
33008 | res &= src; |
33009 | flag_C = 0; |
33010 | flag_V = 0; |
33011 | flag_NotZ = res; |
33012 | flag_N = res >> 8; |
33013 | DREGu16((Opcode >> 9) & 7) = res; |
33014 | POST_IO |
33015 | RET(12) |
33016 | } |
33017 | |
33018 | // ANDaD |
33019 | OPCODE(0xC079) |
33020 | { |
33021 | u32 adr, res; |
33022 | u32 src, dst; |
33023 | |
33024 | FETCH_LONG(adr); |
33025 | PRE_IO |
33026 | READ_WORD_F(adr, src) |
33027 | res = DREGu16((Opcode >> 9) & 7); |
33028 | res &= src; |
33029 | flag_C = 0; |
33030 | flag_V = 0; |
33031 | flag_NotZ = res; |
33032 | flag_N = res >> 8; |
33033 | DREGu16((Opcode >> 9) & 7) = res; |
33034 | POST_IO |
33035 | RET(16) |
33036 | } |
33037 | |
33038 | // ANDaD |
33039 | OPCODE(0xC07A) |
33040 | { |
33041 | u32 adr, res; |
33042 | u32 src, dst; |
33043 | |
33044 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
33045 | PC++; |
33046 | PRE_IO |
33047 | READ_WORD_F(adr, src) |
33048 | res = DREGu16((Opcode >> 9) & 7); |
33049 | res &= src; |
33050 | flag_C = 0; |
33051 | flag_V = 0; |
33052 | flag_NotZ = res; |
33053 | flag_N = res >> 8; |
33054 | DREGu16((Opcode >> 9) & 7) = res; |
33055 | POST_IO |
33056 | RET(12) |
33057 | } |
33058 | |
33059 | // ANDaD |
33060 | OPCODE(0xC07B) |
33061 | { |
33062 | u32 adr, res; |
33063 | u32 src, dst; |
33064 | |
33065 | adr = (u32)(PC) - BasePC; |
33066 | DECODE_EXT_WORD |
33067 | PRE_IO |
33068 | READ_WORD_F(adr, src) |
33069 | res = DREGu16((Opcode >> 9) & 7); |
33070 | res &= src; |
33071 | flag_C = 0; |
33072 | flag_V = 0; |
33073 | flag_NotZ = res; |
33074 | flag_N = res >> 8; |
33075 | DREGu16((Opcode >> 9) & 7) = res; |
33076 | POST_IO |
33077 | RET(14) |
33078 | } |
33079 | |
33080 | // ANDaD |
33081 | OPCODE(0xC07C) |
33082 | { |
33083 | u32 adr, res; |
33084 | u32 src, dst; |
33085 | |
33086 | FETCH_WORD(src); |
33087 | res = DREGu16((Opcode >> 9) & 7); |
33088 | res &= src; |
33089 | flag_C = 0; |
33090 | flag_V = 0; |
33091 | flag_NotZ = res; |
33092 | flag_N = res >> 8; |
33093 | DREGu16((Opcode >> 9) & 7) = res; |
33094 | RET(8) |
33095 | } |
33096 | |
33097 | // ANDaD |
33098 | OPCODE(0xC05F) |
33099 | { |
33100 | u32 adr, res; |
33101 | u32 src, dst; |
33102 | |
33103 | adr = AREG(7); |
33104 | AREG(7) += 2; |
33105 | PRE_IO |
33106 | READ_WORD_F(adr, src) |
33107 | res = DREGu16((Opcode >> 9) & 7); |
33108 | res &= src; |
33109 | flag_C = 0; |
33110 | flag_V = 0; |
33111 | flag_NotZ = res; |
33112 | flag_N = res >> 8; |
33113 | DREGu16((Opcode >> 9) & 7) = res; |
33114 | POST_IO |
33115 | RET(8) |
33116 | } |
33117 | |
33118 | // ANDaD |
33119 | OPCODE(0xC067) |
33120 | { |
33121 | u32 adr, res; |
33122 | u32 src, dst; |
33123 | |
33124 | adr = AREG(7) - 2; |
33125 | AREG(7) = adr; |
33126 | PRE_IO |
33127 | READ_WORD_F(adr, src) |
33128 | res = DREGu16((Opcode >> 9) & 7); |
33129 | res &= src; |
33130 | flag_C = 0; |
33131 | flag_V = 0; |
33132 | flag_NotZ = res; |
33133 | flag_N = res >> 8; |
33134 | DREGu16((Opcode >> 9) & 7) = res; |
33135 | POST_IO |
33136 | RET(10) |
33137 | } |
33138 | |
33139 | // ANDaD |
33140 | OPCODE(0xC080) |
33141 | { |
33142 | u32 adr, res; |
33143 | u32 src, dst; |
33144 | |
33145 | src = DREGu32((Opcode >> 0) & 7); |
33146 | res = DREGu32((Opcode >> 9) & 7); |
33147 | res &= src; |
33148 | flag_C = 0; |
33149 | flag_V = 0; |
33150 | flag_NotZ = res; |
33151 | flag_N = res >> 24; |
33152 | DREGu32((Opcode >> 9) & 7) = res; |
33153 | RET(8) |
33154 | } |
33155 | |
33156 | // ANDaD |
33157 | OPCODE(0xC090) |
33158 | { |
33159 | u32 adr, res; |
33160 | u32 src, dst; |
33161 | |
33162 | adr = AREG((Opcode >> 0) & 7); |
33163 | PRE_IO |
33164 | READ_LONG_F(adr, src) |
33165 | res = DREGu32((Opcode >> 9) & 7); |
33166 | res &= src; |
33167 | flag_C = 0; |
33168 | flag_V = 0; |
33169 | flag_NotZ = res; |
33170 | flag_N = res >> 24; |
33171 | DREGu32((Opcode >> 9) & 7) = res; |
33172 | POST_IO |
33173 | RET(14) |
33174 | } |
33175 | |
33176 | // ANDaD |
33177 | OPCODE(0xC098) |
33178 | { |
33179 | u32 adr, res; |
33180 | u32 src, dst; |
33181 | |
33182 | adr = AREG((Opcode >> 0) & 7); |
33183 | AREG((Opcode >> 0) & 7) += 4; |
33184 | PRE_IO |
33185 | READ_LONG_F(adr, src) |
33186 | res = DREGu32((Opcode >> 9) & 7); |
33187 | res &= src; |
33188 | flag_C = 0; |
33189 | flag_V = 0; |
33190 | flag_NotZ = res; |
33191 | flag_N = res >> 24; |
33192 | DREGu32((Opcode >> 9) & 7) = res; |
33193 | POST_IO |
33194 | RET(14) |
33195 | } |
33196 | |
33197 | // ANDaD |
33198 | OPCODE(0xC0A0) |
33199 | { |
33200 | u32 adr, res; |
33201 | u32 src, dst; |
33202 | |
33203 | adr = AREG((Opcode >> 0) & 7) - 4; |
33204 | AREG((Opcode >> 0) & 7) = adr; |
33205 | PRE_IO |
33206 | READ_LONG_F(adr, src) |
33207 | res = DREGu32((Opcode >> 9) & 7); |
33208 | res &= src; |
33209 | flag_C = 0; |
33210 | flag_V = 0; |
33211 | flag_NotZ = res; |
33212 | flag_N = res >> 24; |
33213 | DREGu32((Opcode >> 9) & 7) = res; |
33214 | POST_IO |
33215 | RET(16) |
33216 | } |
33217 | |
33218 | // ANDaD |
33219 | OPCODE(0xC0A8) |
33220 | { |
33221 | u32 adr, res; |
33222 | u32 src, dst; |
33223 | |
33224 | FETCH_SWORD(adr); |
33225 | adr += AREG((Opcode >> 0) & 7); |
33226 | PRE_IO |
33227 | READ_LONG_F(adr, src) |
33228 | res = DREGu32((Opcode >> 9) & 7); |
33229 | res &= src; |
33230 | flag_C = 0; |
33231 | flag_V = 0; |
33232 | flag_NotZ = res; |
33233 | flag_N = res >> 24; |
33234 | DREGu32((Opcode >> 9) & 7) = res; |
33235 | POST_IO |
33236 | RET(18) |
33237 | } |
33238 | |
33239 | // ANDaD |
33240 | OPCODE(0xC0B0) |
33241 | { |
33242 | u32 adr, res; |
33243 | u32 src, dst; |
33244 | |
33245 | adr = AREG((Opcode >> 0) & 7); |
33246 | DECODE_EXT_WORD |
33247 | PRE_IO |
33248 | READ_LONG_F(adr, src) |
33249 | res = DREGu32((Opcode >> 9) & 7); |
33250 | res &= src; |
33251 | flag_C = 0; |
33252 | flag_V = 0; |
33253 | flag_NotZ = res; |
33254 | flag_N = res >> 24; |
33255 | DREGu32((Opcode >> 9) & 7) = res; |
33256 | POST_IO |
33257 | RET(20) |
33258 | } |
33259 | |
33260 | // ANDaD |
33261 | OPCODE(0xC0B8) |
33262 | { |
33263 | u32 adr, res; |
33264 | u32 src, dst; |
33265 | |
33266 | FETCH_SWORD(adr); |
33267 | PRE_IO |
33268 | READ_LONG_F(adr, src) |
33269 | res = DREGu32((Opcode >> 9) & 7); |
33270 | res &= src; |
33271 | flag_C = 0; |
33272 | flag_V = 0; |
33273 | flag_NotZ = res; |
33274 | flag_N = res >> 24; |
33275 | DREGu32((Opcode >> 9) & 7) = res; |
33276 | POST_IO |
33277 | RET(18) |
33278 | } |
33279 | |
33280 | // ANDaD |
33281 | OPCODE(0xC0B9) |
33282 | { |
33283 | u32 adr, res; |
33284 | u32 src, dst; |
33285 | |
33286 | FETCH_LONG(adr); |
33287 | PRE_IO |
33288 | READ_LONG_F(adr, src) |
33289 | res = DREGu32((Opcode >> 9) & 7); |
33290 | res &= src; |
33291 | flag_C = 0; |
33292 | flag_V = 0; |
33293 | flag_NotZ = res; |
33294 | flag_N = res >> 24; |
33295 | DREGu32((Opcode >> 9) & 7) = res; |
33296 | POST_IO |
33297 | RET(22) |
33298 | } |
33299 | |
33300 | // ANDaD |
33301 | OPCODE(0xC0BA) |
33302 | { |
33303 | u32 adr, res; |
33304 | u32 src, dst; |
33305 | |
33306 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
33307 | PC++; |
33308 | PRE_IO |
33309 | READ_LONG_F(adr, src) |
33310 | res = DREGu32((Opcode >> 9) & 7); |
33311 | res &= src; |
33312 | flag_C = 0; |
33313 | flag_V = 0; |
33314 | flag_NotZ = res; |
33315 | flag_N = res >> 24; |
33316 | DREGu32((Opcode >> 9) & 7) = res; |
33317 | POST_IO |
33318 | RET(18) |
33319 | } |
33320 | |
33321 | // ANDaD |
33322 | OPCODE(0xC0BB) |
33323 | { |
33324 | u32 adr, res; |
33325 | u32 src, dst; |
33326 | |
33327 | adr = (u32)(PC) - BasePC; |
33328 | DECODE_EXT_WORD |
33329 | PRE_IO |
33330 | READ_LONG_F(adr, src) |
33331 | res = DREGu32((Opcode >> 9) & 7); |
33332 | res &= src; |
33333 | flag_C = 0; |
33334 | flag_V = 0; |
33335 | flag_NotZ = res; |
33336 | flag_N = res >> 24; |
33337 | DREGu32((Opcode >> 9) & 7) = res; |
33338 | POST_IO |
33339 | RET(20) |
33340 | } |
33341 | |
33342 | // ANDaD |
33343 | OPCODE(0xC0BC) |
33344 | { |
33345 | u32 adr, res; |
33346 | u32 src, dst; |
33347 | |
33348 | FETCH_LONG(src); |
33349 | res = DREGu32((Opcode >> 9) & 7); |
33350 | res &= src; |
33351 | flag_C = 0; |
33352 | flag_V = 0; |
33353 | flag_NotZ = res; |
33354 | flag_N = res >> 24; |
33355 | DREGu32((Opcode >> 9) & 7) = res; |
33356 | RET(16) |
33357 | } |
33358 | |
33359 | // ANDaD |
33360 | OPCODE(0xC09F) |
33361 | { |
33362 | u32 adr, res; |
33363 | u32 src, dst; |
33364 | |
33365 | adr = AREG(7); |
33366 | AREG(7) += 4; |
33367 | PRE_IO |
33368 | READ_LONG_F(adr, src) |
33369 | res = DREGu32((Opcode >> 9) & 7); |
33370 | res &= src; |
33371 | flag_C = 0; |
33372 | flag_V = 0; |
33373 | flag_NotZ = res; |
33374 | flag_N = res >> 24; |
33375 | DREGu32((Opcode >> 9) & 7) = res; |
33376 | POST_IO |
33377 | RET(14) |
33378 | } |
33379 | |
33380 | // ANDaD |
33381 | OPCODE(0xC0A7) |
33382 | { |
33383 | u32 adr, res; |
33384 | u32 src, dst; |
33385 | |
33386 | adr = AREG(7) - 4; |
33387 | AREG(7) = adr; |
33388 | PRE_IO |
33389 | READ_LONG_F(adr, src) |
33390 | res = DREGu32((Opcode >> 9) & 7); |
33391 | res &= src; |
33392 | flag_C = 0; |
33393 | flag_V = 0; |
33394 | flag_NotZ = res; |
33395 | flag_N = res >> 24; |
33396 | DREGu32((Opcode >> 9) & 7) = res; |
33397 | POST_IO |
33398 | RET(16) |
33399 | } |
33400 | |
33401 | // ANDDa |
33402 | OPCODE(0xC110) |
33403 | { |
33404 | u32 adr, res; |
33405 | u32 src, dst; |
33406 | |
33407 | src = DREGu8((Opcode >> 9) & 7); |
33408 | adr = AREG((Opcode >> 0) & 7); |
33409 | PRE_IO |
33410 | READ_BYTE_F(adr, res) |
33411 | res &= src; |
33412 | flag_C = 0; |
33413 | flag_V = 0; |
33414 | flag_NotZ = res; |
33415 | flag_N = res; |
33416 | WRITE_BYTE_F(adr, res) |
33417 | POST_IO |
33418 | RET(12) |
33419 | } |
33420 | |
33421 | // ANDDa |
33422 | OPCODE(0xC118) |
33423 | { |
33424 | u32 adr, res; |
33425 | u32 src, dst; |
33426 | |
33427 | src = DREGu8((Opcode >> 9) & 7); |
33428 | adr = AREG((Opcode >> 0) & 7); |
33429 | AREG((Opcode >> 0) & 7) += 1; |
33430 | PRE_IO |
33431 | READ_BYTE_F(adr, res) |
33432 | res &= src; |
33433 | flag_C = 0; |
33434 | flag_V = 0; |
33435 | flag_NotZ = res; |
33436 | flag_N = res; |
33437 | WRITE_BYTE_F(adr, res) |
33438 | POST_IO |
33439 | RET(12) |
33440 | } |
33441 | |
33442 | // ANDDa |
33443 | OPCODE(0xC120) |
33444 | { |
33445 | u32 adr, res; |
33446 | u32 src, dst; |
33447 | |
33448 | src = DREGu8((Opcode >> 9) & 7); |
33449 | adr = AREG((Opcode >> 0) & 7) - 1; |
33450 | AREG((Opcode >> 0) & 7) = adr; |
33451 | PRE_IO |
33452 | READ_BYTE_F(adr, res) |
33453 | res &= src; |
33454 | flag_C = 0; |
33455 | flag_V = 0; |
33456 | flag_NotZ = res; |
33457 | flag_N = res; |
33458 | WRITE_BYTE_F(adr, res) |
33459 | POST_IO |
33460 | RET(14) |
33461 | } |
33462 | |
33463 | // ANDDa |
33464 | OPCODE(0xC128) |
33465 | { |
33466 | u32 adr, res; |
33467 | u32 src, dst; |
33468 | |
33469 | src = DREGu8((Opcode >> 9) & 7); |
33470 | FETCH_SWORD(adr); |
33471 | adr += AREG((Opcode >> 0) & 7); |
33472 | PRE_IO |
33473 | READ_BYTE_F(adr, res) |
33474 | res &= src; |
33475 | flag_C = 0; |
33476 | flag_V = 0; |
33477 | flag_NotZ = res; |
33478 | flag_N = res; |
33479 | WRITE_BYTE_F(adr, res) |
33480 | POST_IO |
33481 | RET(16) |
33482 | } |
33483 | |
33484 | // ANDDa |
33485 | OPCODE(0xC130) |
33486 | { |
33487 | u32 adr, res; |
33488 | u32 src, dst; |
33489 | |
33490 | src = DREGu8((Opcode >> 9) & 7); |
33491 | adr = AREG((Opcode >> 0) & 7); |
33492 | DECODE_EXT_WORD |
33493 | PRE_IO |
33494 | READ_BYTE_F(adr, res) |
33495 | res &= src; |
33496 | flag_C = 0; |
33497 | flag_V = 0; |
33498 | flag_NotZ = res; |
33499 | flag_N = res; |
33500 | WRITE_BYTE_F(adr, res) |
33501 | POST_IO |
33502 | RET(18) |
33503 | } |
33504 | |
33505 | // ANDDa |
33506 | OPCODE(0xC138) |
33507 | { |
33508 | u32 adr, res; |
33509 | u32 src, dst; |
33510 | |
33511 | src = DREGu8((Opcode >> 9) & 7); |
33512 | FETCH_SWORD(adr); |
33513 | PRE_IO |
33514 | READ_BYTE_F(adr, res) |
33515 | res &= src; |
33516 | flag_C = 0; |
33517 | flag_V = 0; |
33518 | flag_NotZ = res; |
33519 | flag_N = res; |
33520 | WRITE_BYTE_F(adr, res) |
33521 | POST_IO |
33522 | RET(16) |
33523 | } |
33524 | |
33525 | // ANDDa |
33526 | OPCODE(0xC139) |
33527 | { |
33528 | u32 adr, res; |
33529 | u32 src, dst; |
33530 | |
33531 | src = DREGu8((Opcode >> 9) & 7); |
33532 | FETCH_LONG(adr); |
33533 | PRE_IO |
33534 | READ_BYTE_F(adr, res) |
33535 | res &= src; |
33536 | flag_C = 0; |
33537 | flag_V = 0; |
33538 | flag_NotZ = res; |
33539 | flag_N = res; |
33540 | WRITE_BYTE_F(adr, res) |
33541 | POST_IO |
33542 | RET(20) |
33543 | } |
33544 | |
33545 | // ANDDa |
33546 | OPCODE(0xC11F) |
33547 | { |
33548 | u32 adr, res; |
33549 | u32 src, dst; |
33550 | |
33551 | src = DREGu8((Opcode >> 9) & 7); |
33552 | adr = AREG(7); |
33553 | AREG(7) += 2; |
33554 | PRE_IO |
33555 | READ_BYTE_F(adr, res) |
33556 | res &= src; |
33557 | flag_C = 0; |
33558 | flag_V = 0; |
33559 | flag_NotZ = res; |
33560 | flag_N = res; |
33561 | WRITE_BYTE_F(adr, res) |
33562 | POST_IO |
33563 | RET(12) |
33564 | } |
33565 | |
33566 | // ANDDa |
33567 | OPCODE(0xC127) |
33568 | { |
33569 | u32 adr, res; |
33570 | u32 src, dst; |
33571 | |
33572 | src = DREGu8((Opcode >> 9) & 7); |
33573 | adr = AREG(7) - 2; |
33574 | AREG(7) = adr; |
33575 | PRE_IO |
33576 | READ_BYTE_F(adr, res) |
33577 | res &= src; |
33578 | flag_C = 0; |
33579 | flag_V = 0; |
33580 | flag_NotZ = res; |
33581 | flag_N = res; |
33582 | WRITE_BYTE_F(adr, res) |
33583 | POST_IO |
33584 | RET(14) |
33585 | } |
33586 | |
33587 | // ANDDa |
33588 | OPCODE(0xC150) |
33589 | { |
33590 | u32 adr, res; |
33591 | u32 src, dst; |
33592 | |
33593 | src = DREGu16((Opcode >> 9) & 7); |
33594 | adr = AREG((Opcode >> 0) & 7); |
33595 | PRE_IO |
33596 | READ_WORD_F(adr, res) |
33597 | res &= src; |
33598 | flag_C = 0; |
33599 | flag_V = 0; |
33600 | flag_NotZ = res; |
33601 | flag_N = res >> 8; |
33602 | WRITE_WORD_F(adr, res) |
33603 | POST_IO |
33604 | RET(12) |
33605 | } |
33606 | |
33607 | // ANDDa |
33608 | OPCODE(0xC158) |
33609 | { |
33610 | u32 adr, res; |
33611 | u32 src, dst; |
33612 | |
33613 | src = DREGu16((Opcode >> 9) & 7); |
33614 | adr = AREG((Opcode >> 0) & 7); |
33615 | AREG((Opcode >> 0) & 7) += 2; |
33616 | PRE_IO |
33617 | READ_WORD_F(adr, res) |
33618 | res &= src; |
33619 | flag_C = 0; |
33620 | flag_V = 0; |
33621 | flag_NotZ = res; |
33622 | flag_N = res >> 8; |
33623 | WRITE_WORD_F(adr, res) |
33624 | POST_IO |
33625 | RET(12) |
33626 | } |
33627 | |
33628 | // ANDDa |
33629 | OPCODE(0xC160) |
33630 | { |
33631 | u32 adr, res; |
33632 | u32 src, dst; |
33633 | |
33634 | src = DREGu16((Opcode >> 9) & 7); |
33635 | adr = AREG((Opcode >> 0) & 7) - 2; |
33636 | AREG((Opcode >> 0) & 7) = adr; |
33637 | PRE_IO |
33638 | READ_WORD_F(adr, res) |
33639 | res &= src; |
33640 | flag_C = 0; |
33641 | flag_V = 0; |
33642 | flag_NotZ = res; |
33643 | flag_N = res >> 8; |
33644 | WRITE_WORD_F(adr, res) |
33645 | POST_IO |
33646 | RET(14) |
33647 | } |
33648 | |
33649 | // ANDDa |
33650 | OPCODE(0xC168) |
33651 | { |
33652 | u32 adr, res; |
33653 | u32 src, dst; |
33654 | |
33655 | src = DREGu16((Opcode >> 9) & 7); |
33656 | FETCH_SWORD(adr); |
33657 | adr += AREG((Opcode >> 0) & 7); |
33658 | PRE_IO |
33659 | READ_WORD_F(adr, res) |
33660 | res &= src; |
33661 | flag_C = 0; |
33662 | flag_V = 0; |
33663 | flag_NotZ = res; |
33664 | flag_N = res >> 8; |
33665 | WRITE_WORD_F(adr, res) |
33666 | POST_IO |
33667 | RET(16) |
33668 | } |
33669 | |
33670 | // ANDDa |
33671 | OPCODE(0xC170) |
33672 | { |
33673 | u32 adr, res; |
33674 | u32 src, dst; |
33675 | |
33676 | src = DREGu16((Opcode >> 9) & 7); |
33677 | adr = AREG((Opcode >> 0) & 7); |
33678 | DECODE_EXT_WORD |
33679 | PRE_IO |
33680 | READ_WORD_F(adr, res) |
33681 | res &= src; |
33682 | flag_C = 0; |
33683 | flag_V = 0; |
33684 | flag_NotZ = res; |
33685 | flag_N = res >> 8; |
33686 | WRITE_WORD_F(adr, res) |
33687 | POST_IO |
33688 | RET(18) |
33689 | } |
33690 | |
33691 | // ANDDa |
33692 | OPCODE(0xC178) |
33693 | { |
33694 | u32 adr, res; |
33695 | u32 src, dst; |
33696 | |
33697 | src = DREGu16((Opcode >> 9) & 7); |
33698 | FETCH_SWORD(adr); |
33699 | PRE_IO |
33700 | READ_WORD_F(adr, res) |
33701 | res &= src; |
33702 | flag_C = 0; |
33703 | flag_V = 0; |
33704 | flag_NotZ = res; |
33705 | flag_N = res >> 8; |
33706 | WRITE_WORD_F(adr, res) |
33707 | POST_IO |
33708 | RET(16) |
33709 | } |
33710 | |
33711 | // ANDDa |
33712 | OPCODE(0xC179) |
33713 | { |
33714 | u32 adr, res; |
33715 | u32 src, dst; |
33716 | |
33717 | src = DREGu16((Opcode >> 9) & 7); |
33718 | FETCH_LONG(adr); |
33719 | PRE_IO |
33720 | READ_WORD_F(adr, res) |
33721 | res &= src; |
33722 | flag_C = 0; |
33723 | flag_V = 0; |
33724 | flag_NotZ = res; |
33725 | flag_N = res >> 8; |
33726 | WRITE_WORD_F(adr, res) |
33727 | POST_IO |
33728 | RET(20) |
33729 | } |
33730 | |
33731 | // ANDDa |
33732 | OPCODE(0xC15F) |
33733 | { |
33734 | u32 adr, res; |
33735 | u32 src, dst; |
33736 | |
33737 | src = DREGu16((Opcode >> 9) & 7); |
33738 | adr = AREG(7); |
33739 | AREG(7) += 2; |
33740 | PRE_IO |
33741 | READ_WORD_F(adr, res) |
33742 | res &= src; |
33743 | flag_C = 0; |
33744 | flag_V = 0; |
33745 | flag_NotZ = res; |
33746 | flag_N = res >> 8; |
33747 | WRITE_WORD_F(adr, res) |
33748 | POST_IO |
33749 | RET(12) |
33750 | } |
33751 | |
33752 | // ANDDa |
33753 | OPCODE(0xC167) |
33754 | { |
33755 | u32 adr, res; |
33756 | u32 src, dst; |
33757 | |
33758 | src = DREGu16((Opcode >> 9) & 7); |
33759 | adr = AREG(7) - 2; |
33760 | AREG(7) = adr; |
33761 | PRE_IO |
33762 | READ_WORD_F(adr, res) |
33763 | res &= src; |
33764 | flag_C = 0; |
33765 | flag_V = 0; |
33766 | flag_NotZ = res; |
33767 | flag_N = res >> 8; |
33768 | WRITE_WORD_F(adr, res) |
33769 | POST_IO |
33770 | RET(14) |
33771 | } |
33772 | |
33773 | // ANDDa |
33774 | OPCODE(0xC190) |
33775 | { |
33776 | u32 adr, res; |
33777 | u32 src, dst; |
33778 | |
33779 | src = DREGu32((Opcode >> 9) & 7); |
33780 | adr = AREG((Opcode >> 0) & 7); |
33781 | PRE_IO |
33782 | READ_LONG_F(adr, res) |
33783 | res &= src; |
33784 | flag_C = 0; |
33785 | flag_V = 0; |
33786 | flag_NotZ = res; |
33787 | flag_N = res >> 24; |
33788 | WRITE_LONG_F(adr, res) |
33789 | POST_IO |
33790 | RET(20) |
33791 | } |
33792 | |
33793 | // ANDDa |
33794 | OPCODE(0xC198) |
33795 | { |
33796 | u32 adr, res; |
33797 | u32 src, dst; |
33798 | |
33799 | src = DREGu32((Opcode >> 9) & 7); |
33800 | adr = AREG((Opcode >> 0) & 7); |
33801 | AREG((Opcode >> 0) & 7) += 4; |
33802 | PRE_IO |
33803 | READ_LONG_F(adr, res) |
33804 | res &= src; |
33805 | flag_C = 0; |
33806 | flag_V = 0; |
33807 | flag_NotZ = res; |
33808 | flag_N = res >> 24; |
33809 | WRITE_LONG_F(adr, res) |
33810 | POST_IO |
33811 | RET(20) |
33812 | } |
33813 | |
33814 | // ANDDa |
33815 | OPCODE(0xC1A0) |
33816 | { |
33817 | u32 adr, res; |
33818 | u32 src, dst; |
33819 | |
33820 | src = DREGu32((Opcode >> 9) & 7); |
33821 | adr = AREG((Opcode >> 0) & 7) - 4; |
33822 | AREG((Opcode >> 0) & 7) = adr; |
33823 | PRE_IO |
33824 | READ_LONG_F(adr, res) |
33825 | res &= src; |
33826 | flag_C = 0; |
33827 | flag_V = 0; |
33828 | flag_NotZ = res; |
33829 | flag_N = res >> 24; |
33830 | WRITE_LONG_F(adr, res) |
33831 | POST_IO |
33832 | RET(22) |
33833 | } |
33834 | |
33835 | // ANDDa |
33836 | OPCODE(0xC1A8) |
33837 | { |
33838 | u32 adr, res; |
33839 | u32 src, dst; |
33840 | |
33841 | src = DREGu32((Opcode >> 9) & 7); |
33842 | FETCH_SWORD(adr); |
33843 | adr += AREG((Opcode >> 0) & 7); |
33844 | PRE_IO |
33845 | READ_LONG_F(adr, res) |
33846 | res &= src; |
33847 | flag_C = 0; |
33848 | flag_V = 0; |
33849 | flag_NotZ = res; |
33850 | flag_N = res >> 24; |
33851 | WRITE_LONG_F(adr, res) |
33852 | POST_IO |
33853 | RET(24) |
33854 | } |
33855 | |
33856 | // ANDDa |
33857 | OPCODE(0xC1B0) |
33858 | { |
33859 | u32 adr, res; |
33860 | u32 src, dst; |
33861 | |
33862 | src = DREGu32((Opcode >> 9) & 7); |
33863 | adr = AREG((Opcode >> 0) & 7); |
33864 | DECODE_EXT_WORD |
33865 | PRE_IO |
33866 | READ_LONG_F(adr, res) |
33867 | res &= src; |
33868 | flag_C = 0; |
33869 | flag_V = 0; |
33870 | flag_NotZ = res; |
33871 | flag_N = res >> 24; |
33872 | WRITE_LONG_F(adr, res) |
33873 | POST_IO |
33874 | RET(26) |
33875 | } |
33876 | |
33877 | // ANDDa |
33878 | OPCODE(0xC1B8) |
33879 | { |
33880 | u32 adr, res; |
33881 | u32 src, dst; |
33882 | |
33883 | src = DREGu32((Opcode >> 9) & 7); |
33884 | FETCH_SWORD(adr); |
33885 | PRE_IO |
33886 | READ_LONG_F(adr, res) |
33887 | res &= src; |
33888 | flag_C = 0; |
33889 | flag_V = 0; |
33890 | flag_NotZ = res; |
33891 | flag_N = res >> 24; |
33892 | WRITE_LONG_F(adr, res) |
33893 | POST_IO |
33894 | RET(24) |
33895 | } |
33896 | |
33897 | // ANDDa |
33898 | OPCODE(0xC1B9) |
33899 | { |
33900 | u32 adr, res; |
33901 | u32 src, dst; |
33902 | |
33903 | src = DREGu32((Opcode >> 9) & 7); |
33904 | FETCH_LONG(adr); |
33905 | PRE_IO |
33906 | READ_LONG_F(adr, res) |
33907 | res &= src; |
33908 | flag_C = 0; |
33909 | flag_V = 0; |
33910 | flag_NotZ = res; |
33911 | flag_N = res >> 24; |
33912 | WRITE_LONG_F(adr, res) |
33913 | POST_IO |
33914 | RET(28) |
33915 | } |
33916 | |
33917 | // ANDDa |
33918 | OPCODE(0xC19F) |
33919 | { |
33920 | u32 adr, res; |
33921 | u32 src, dst; |
33922 | |
33923 | src = DREGu32((Opcode >> 9) & 7); |
33924 | adr = AREG(7); |
33925 | AREG(7) += 4; |
33926 | PRE_IO |
33927 | READ_LONG_F(adr, res) |
33928 | res &= src; |
33929 | flag_C = 0; |
33930 | flag_V = 0; |
33931 | flag_NotZ = res; |
33932 | flag_N = res >> 24; |
33933 | WRITE_LONG_F(adr, res) |
33934 | POST_IO |
33935 | RET(20) |
33936 | } |
33937 | |
33938 | // ANDDa |
33939 | OPCODE(0xC1A7) |
33940 | { |
33941 | u32 adr, res; |
33942 | u32 src, dst; |
33943 | |
33944 | src = DREGu32((Opcode >> 9) & 7); |
33945 | adr = AREG(7) - 4; |
33946 | AREG(7) = adr; |
33947 | PRE_IO |
33948 | READ_LONG_F(adr, res) |
33949 | res &= src; |
33950 | flag_C = 0; |
33951 | flag_V = 0; |
33952 | flag_NotZ = res; |
33953 | flag_N = res >> 24; |
33954 | WRITE_LONG_F(adr, res) |
33955 | POST_IO |
33956 | RET(22) |
33957 | } |
33958 | |
33959 | // ABCD |
33960 | OPCODE(0xC100) |
33961 | { |
33962 | u32 adr, res; |
33963 | u32 src, dst; |
33964 | |
33965 | src = DREGu8((Opcode >> 0) & 7); |
33966 | dst = DREGu8((Opcode >> 9) & 7); |
33967 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
33968 | if (res > 9) res += 6; |
33969 | res += (dst & 0xF0) + (src & 0xF0); |
33970 | if (res > 0x99) |
33971 | { |
33972 | res -= 0xA0; |
33973 | flag_X = flag_C = M68K_SR_C; |
33974 | } |
33975 | else flag_X = flag_C = 0; |
33976 | flag_NotZ |= res & 0xFF; |
33977 | flag_N = res; |
33978 | DREGu8((Opcode >> 9) & 7) = res; |
33979 | RET(6) |
33980 | } |
33981 | |
33982 | // ABCDM |
33983 | OPCODE(0xC108) |
33984 | { |
33985 | u32 adr, res; |
33986 | u32 src, dst; |
33987 | |
33988 | adr = AREG((Opcode >> 0) & 7) - 1; |
33989 | AREG((Opcode >> 0) & 7) = adr; |
33990 | PRE_IO |
33991 | READ_BYTE_F(adr, src) |
33992 | adr = AREG((Opcode >> 9) & 7) - 1; |
33993 | AREG((Opcode >> 9) & 7) = adr; |
33994 | READ_BYTE_F(adr, dst) |
33995 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
33996 | if (res > 9) res += 6; |
33997 | res += (dst & 0xF0) + (src & 0xF0); |
33998 | if (res > 0x99) |
33999 | { |
34000 | res -= 0xA0; |
34001 | flag_X = flag_C = M68K_SR_C; |
34002 | } |
34003 | else flag_X = flag_C = 0; |
34004 | flag_NotZ |= res & 0xFF; |
34005 | flag_N = res; |
34006 | WRITE_BYTE_F(adr, res) |
34007 | POST_IO |
34008 | RET(18) |
34009 | } |
34010 | |
34011 | // ABCD7M |
34012 | OPCODE(0xC10F) |
34013 | { |
34014 | u32 adr, res; |
34015 | u32 src, dst; |
34016 | |
34017 | adr = AREG(7) - 2; |
34018 | AREG(7) = adr; |
34019 | PRE_IO |
34020 | READ_BYTE_F(adr, src) |
34021 | adr = AREG((Opcode >> 9) & 7) - 1; |
34022 | AREG((Opcode >> 9) & 7) = adr; |
34023 | READ_BYTE_F(adr, dst) |
34024 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34025 | if (res > 9) res += 6; |
34026 | res += (dst & 0xF0) + (src & 0xF0); |
34027 | if (res > 0x99) |
34028 | { |
34029 | res -= 0xA0; |
34030 | flag_X = flag_C = M68K_SR_C; |
34031 | } |
34032 | else flag_X = flag_C = 0; |
34033 | flag_NotZ |= res & 0xFF; |
34034 | flag_N = res; |
34035 | WRITE_BYTE_F(adr, res) |
34036 | POST_IO |
34037 | RET(18) |
34038 | } |
34039 | |
34040 | // ABCDM7 |
34041 | OPCODE(0xCF08) |
34042 | { |
34043 | u32 adr, res; |
34044 | u32 src, dst; |
34045 | |
34046 | adr = AREG((Opcode >> 0) & 7) - 1; |
34047 | AREG((Opcode >> 0) & 7) = adr; |
34048 | PRE_IO |
34049 | READ_BYTE_F(adr, src) |
34050 | adr = AREG(7) - 2; |
34051 | AREG(7) = adr; |
34052 | READ_BYTE_F(adr, dst) |
34053 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34054 | if (res > 9) res += 6; |
34055 | res += (dst & 0xF0) + (src & 0xF0); |
34056 | if (res > 0x99) |
34057 | { |
34058 | res -= 0xA0; |
34059 | flag_X = flag_C = M68K_SR_C; |
34060 | } |
34061 | else flag_X = flag_C = 0; |
34062 | flag_NotZ |= res & 0xFF; |
34063 | flag_N = res; |
34064 | WRITE_BYTE_F(adr, res) |
34065 | POST_IO |
34066 | RET(18) |
34067 | } |
34068 | |
34069 | // ABCD7M7 |
34070 | OPCODE(0xCF0F) |
34071 | { |
34072 | u32 adr, res; |
34073 | u32 src, dst; |
34074 | |
34075 | adr = AREG(7) - 2; |
34076 | AREG(7) = adr; |
34077 | PRE_IO |
34078 | READ_BYTE_F(adr, src) |
34079 | adr = AREG(7) - 2; |
34080 | AREG(7) = adr; |
34081 | READ_BYTE_F(adr, dst) |
34082 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
34083 | if (res > 9) res += 6; |
34084 | res += (dst & 0xF0) + (src & 0xF0); |
34085 | if (res > 0x99) |
34086 | { |
34087 | res -= 0xA0; |
34088 | flag_X = flag_C = M68K_SR_C; |
34089 | } |
34090 | else flag_X = flag_C = 0; |
34091 | flag_NotZ |= res & 0xFF; |
34092 | flag_N = res; |
34093 | WRITE_BYTE_F(adr, res) |
34094 | POST_IO |
34095 | RET(18) |
34096 | } |
34097 | |
34098 | // MULU |
34099 | OPCODE(0xC0C0) |
34100 | { |
34101 | u32 adr, res; |
34102 | u32 src, dst; |
34103 | |
34104 | src = DREGu16((Opcode >> 0) & 7); |
34105 | res = DREGu16((Opcode >> 9) & 7); |
34106 | res *= src; |
34107 | flag_N = res >> 24; |
34108 | flag_NotZ = res; |
34109 | flag_V = flag_C = 0; |
34110 | DREGu32((Opcode >> 9) & 7) = res; |
34111 | #ifdef USE_CYCLONE_TIMING |
34112 | RET(54) |
34113 | #else |
34114 | RET(50) |
34115 | #endif |
34116 | } |
34117 | |
34118 | // MULU |
34119 | OPCODE(0xC0D0) |
34120 | { |
34121 | u32 adr, res; |
34122 | u32 src, dst; |
34123 | |
34124 | adr = AREG((Opcode >> 0) & 7); |
34125 | PRE_IO |
34126 | READ_WORD_F(adr, src) |
34127 | res = DREGu16((Opcode >> 9) & 7); |
34128 | res *= src; |
34129 | flag_N = res >> 24; |
34130 | flag_NotZ = res; |
34131 | flag_V = flag_C = 0; |
34132 | DREGu32((Opcode >> 9) & 7) = res; |
34133 | POST_IO |
34134 | #ifdef USE_CYCLONE_TIMING |
34135 | RET(58) |
34136 | #else |
34137 | RET(54) |
34138 | #endif |
34139 | } |
34140 | |
34141 | // MULU |
34142 | OPCODE(0xC0D8) |
34143 | { |
34144 | u32 adr, res; |
34145 | u32 src, dst; |
34146 | |
34147 | adr = AREG((Opcode >> 0) & 7); |
34148 | AREG((Opcode >> 0) & 7) += 2; |
34149 | PRE_IO |
34150 | READ_WORD_F(adr, src) |
34151 | res = DREGu16((Opcode >> 9) & 7); |
34152 | res *= src; |
34153 | flag_N = res >> 24; |
34154 | flag_NotZ = res; |
34155 | flag_V = flag_C = 0; |
34156 | DREGu32((Opcode >> 9) & 7) = res; |
34157 | POST_IO |
34158 | #ifdef USE_CYCLONE_TIMING |
34159 | RET(58) |
34160 | #else |
34161 | RET(54) |
34162 | #endif |
34163 | } |
34164 | |
34165 | // MULU |
34166 | OPCODE(0xC0E0) |
34167 | { |
34168 | u32 adr, res; |
34169 | u32 src, dst; |
34170 | |
34171 | adr = AREG((Opcode >> 0) & 7) - 2; |
34172 | AREG((Opcode >> 0) & 7) = adr; |
34173 | PRE_IO |
34174 | READ_WORD_F(adr, src) |
34175 | res = DREGu16((Opcode >> 9) & 7); |
34176 | res *= src; |
34177 | flag_N = res >> 24; |
34178 | flag_NotZ = res; |
34179 | flag_V = flag_C = 0; |
34180 | DREGu32((Opcode >> 9) & 7) = res; |
34181 | POST_IO |
34182 | #ifdef USE_CYCLONE_TIMING |
34183 | RET(60) |
34184 | #else |
34185 | RET(56) |
34186 | #endif |
34187 | } |
34188 | |
34189 | // MULU |
34190 | OPCODE(0xC0E8) |
34191 | { |
34192 | u32 adr, res; |
34193 | u32 src, dst; |
34194 | |
34195 | FETCH_SWORD(adr); |
34196 | adr += AREG((Opcode >> 0) & 7); |
34197 | PRE_IO |
34198 | READ_WORD_F(adr, src) |
34199 | res = DREGu16((Opcode >> 9) & 7); |
34200 | res *= src; |
34201 | flag_N = res >> 24; |
34202 | flag_NotZ = res; |
34203 | flag_V = flag_C = 0; |
34204 | DREGu32((Opcode >> 9) & 7) = res; |
34205 | POST_IO |
34206 | #ifdef USE_CYCLONE_TIMING |
34207 | RET(62) |
34208 | #else |
34209 | RET(58) |
34210 | #endif |
34211 | } |
34212 | |
34213 | // MULU |
34214 | OPCODE(0xC0F0) |
34215 | { |
34216 | u32 adr, res; |
34217 | u32 src, dst; |
34218 | |
34219 | adr = AREG((Opcode >> 0) & 7); |
34220 | DECODE_EXT_WORD |
34221 | PRE_IO |
34222 | READ_WORD_F(adr, src) |
34223 | res = DREGu16((Opcode >> 9) & 7); |
34224 | res *= src; |
34225 | flag_N = res >> 24; |
34226 | flag_NotZ = res; |
34227 | flag_V = flag_C = 0; |
34228 | DREGu32((Opcode >> 9) & 7) = res; |
34229 | POST_IO |
34230 | #ifdef USE_CYCLONE_TIMING |
34231 | RET(64) |
34232 | #else |
34233 | RET(60) |
34234 | #endif |
34235 | } |
34236 | |
34237 | // MULU |
34238 | OPCODE(0xC0F8) |
34239 | { |
34240 | u32 adr, res; |
34241 | u32 src, dst; |
34242 | |
34243 | FETCH_SWORD(adr); |
34244 | PRE_IO |
34245 | READ_WORD_F(adr, src) |
34246 | res = DREGu16((Opcode >> 9) & 7); |
34247 | res *= src; |
34248 | flag_N = res >> 24; |
34249 | flag_NotZ = res; |
34250 | flag_V = flag_C = 0; |
34251 | DREGu32((Opcode >> 9) & 7) = res; |
34252 | POST_IO |
34253 | #ifdef USE_CYCLONE_TIMING |
34254 | RET(62) |
34255 | #else |
34256 | RET(58) |
34257 | #endif |
34258 | } |
34259 | |
34260 | // MULU |
34261 | OPCODE(0xC0F9) |
34262 | { |
34263 | u32 adr, res; |
34264 | u32 src, dst; |
34265 | |
34266 | FETCH_LONG(adr); |
34267 | PRE_IO |
34268 | READ_WORD_F(adr, src) |
34269 | res = DREGu16((Opcode >> 9) & 7); |
34270 | res *= src; |
34271 | flag_N = res >> 24; |
34272 | flag_NotZ = res; |
34273 | flag_V = flag_C = 0; |
34274 | DREGu32((Opcode >> 9) & 7) = res; |
34275 | POST_IO |
34276 | #ifdef USE_CYCLONE_TIMING |
34277 | RET(66) |
34278 | #else |
34279 | RET(62) |
34280 | #endif |
34281 | } |
34282 | |
34283 | // MULU |
34284 | OPCODE(0xC0FA) |
34285 | { |
34286 | u32 adr, res; |
34287 | u32 src, dst; |
34288 | |
34289 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34290 | PC++; |
34291 | PRE_IO |
34292 | READ_WORD_F(adr, src) |
34293 | res = DREGu16((Opcode >> 9) & 7); |
34294 | res *= src; |
34295 | flag_N = res >> 24; |
34296 | flag_NotZ = res; |
34297 | flag_V = flag_C = 0; |
34298 | DREGu32((Opcode >> 9) & 7) = res; |
34299 | POST_IO |
34300 | #ifdef USE_CYCLONE_TIMING |
34301 | RET(62) |
34302 | #else |
34303 | RET(58) |
34304 | #endif |
34305 | } |
34306 | |
34307 | // MULU |
34308 | OPCODE(0xC0FB) |
34309 | { |
34310 | u32 adr, res; |
34311 | u32 src, dst; |
34312 | |
34313 | adr = (u32)(PC) - BasePC; |
34314 | DECODE_EXT_WORD |
34315 | PRE_IO |
34316 | READ_WORD_F(adr, src) |
34317 | res = DREGu16((Opcode >> 9) & 7); |
34318 | res *= src; |
34319 | flag_N = res >> 24; |
34320 | flag_NotZ = res; |
34321 | flag_V = flag_C = 0; |
34322 | DREGu32((Opcode >> 9) & 7) = res; |
34323 | POST_IO |
34324 | #ifdef USE_CYCLONE_TIMING |
34325 | RET(64) |
34326 | #else |
34327 | RET(60) |
34328 | #endif |
34329 | } |
34330 | |
34331 | // MULU |
34332 | OPCODE(0xC0FC) |
34333 | { |
34334 | u32 adr, res; |
34335 | u32 src, dst; |
34336 | |
34337 | FETCH_WORD(src); |
34338 | res = DREGu16((Opcode >> 9) & 7); |
34339 | res *= src; |
34340 | flag_N = res >> 24; |
34341 | flag_NotZ = res; |
34342 | flag_V = flag_C = 0; |
34343 | DREGu32((Opcode >> 9) & 7) = res; |
34344 | #ifdef USE_CYCLONE_TIMING |
34345 | RET(58) |
34346 | #else |
34347 | RET(54) |
34348 | #endif |
34349 | } |
34350 | |
34351 | // MULU |
34352 | OPCODE(0xC0DF) |
34353 | { |
34354 | u32 adr, res; |
34355 | u32 src, dst; |
34356 | |
34357 | adr = AREG(7); |
34358 | AREG(7) += 2; |
34359 | PRE_IO |
34360 | READ_WORD_F(adr, src) |
34361 | res = DREGu16((Opcode >> 9) & 7); |
34362 | res *= src; |
34363 | flag_N = res >> 24; |
34364 | flag_NotZ = res; |
34365 | flag_V = flag_C = 0; |
34366 | DREGu32((Opcode >> 9) & 7) = res; |
34367 | POST_IO |
34368 | #ifdef USE_CYCLONE_TIMING |
34369 | RET(58) |
34370 | #else |
34371 | RET(54) |
34372 | #endif |
34373 | } |
34374 | |
34375 | // MULU |
34376 | OPCODE(0xC0E7) |
34377 | { |
34378 | u32 adr, res; |
34379 | u32 src, dst; |
34380 | |
34381 | adr = AREG(7) - 2; |
34382 | AREG(7) = adr; |
34383 | PRE_IO |
34384 | READ_WORD_F(adr, src) |
34385 | res = DREGu16((Opcode >> 9) & 7); |
34386 | res *= src; |
34387 | flag_N = res >> 24; |
34388 | flag_NotZ = res; |
34389 | flag_V = flag_C = 0; |
34390 | DREGu32((Opcode >> 9) & 7) = res; |
34391 | POST_IO |
34392 | #ifdef USE_CYCLONE_TIMING |
34393 | RET(60) |
34394 | #else |
34395 | RET(56) |
34396 | #endif |
34397 | } |
34398 | |
34399 | // MULS |
34400 | OPCODE(0xC1C0) |
34401 | { |
34402 | u32 adr, res; |
34403 | u32 src, dst; |
34404 | |
34405 | src = (s32)DREGs16((Opcode >> 0) & 7); |
34406 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34407 | res = ((s32)res) * ((s32)src); |
34408 | flag_N = res >> 24; |
34409 | flag_NotZ = res; |
34410 | flag_V = flag_C = 0; |
34411 | DREGu32((Opcode >> 9) & 7) = res; |
34412 | #ifdef USE_CYCLONE_TIMING |
34413 | RET(54) |
34414 | #else |
34415 | RET(50) |
34416 | #endif |
34417 | } |
34418 | |
34419 | // MULS |
34420 | OPCODE(0xC1D0) |
34421 | { |
34422 | u32 adr, res; |
34423 | u32 src, dst; |
34424 | |
34425 | adr = AREG((Opcode >> 0) & 7); |
34426 | PRE_IO |
34427 | READSX_WORD_F(adr, src) |
34428 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34429 | res = ((s32)res) * ((s32)src); |
34430 | flag_N = res >> 24; |
34431 | flag_NotZ = res; |
34432 | flag_V = flag_C = 0; |
34433 | DREGu32((Opcode >> 9) & 7) = res; |
34434 | POST_IO |
34435 | #ifdef USE_CYCLONE_TIMING |
34436 | RET(58) |
34437 | #else |
34438 | RET(54) |
34439 | #endif |
34440 | } |
34441 | |
34442 | // MULS |
34443 | OPCODE(0xC1D8) |
34444 | { |
34445 | u32 adr, res; |
34446 | u32 src, dst; |
34447 | |
34448 | adr = AREG((Opcode >> 0) & 7); |
34449 | AREG((Opcode >> 0) & 7) += 2; |
34450 | PRE_IO |
34451 | READSX_WORD_F(adr, src) |
34452 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34453 | res = ((s32)res) * ((s32)src); |
34454 | flag_N = res >> 24; |
34455 | flag_NotZ = res; |
34456 | flag_V = flag_C = 0; |
34457 | DREGu32((Opcode >> 9) & 7) = res; |
34458 | POST_IO |
34459 | #ifdef USE_CYCLONE_TIMING |
34460 | RET(58) |
34461 | #else |
34462 | RET(54) |
34463 | #endif |
34464 | } |
34465 | |
34466 | // MULS |
34467 | OPCODE(0xC1E0) |
34468 | { |
34469 | u32 adr, res; |
34470 | u32 src, dst; |
34471 | |
34472 | adr = AREG((Opcode >> 0) & 7) - 2; |
34473 | AREG((Opcode >> 0) & 7) = adr; |
34474 | PRE_IO |
34475 | READSX_WORD_F(adr, src) |
34476 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34477 | res = ((s32)res) * ((s32)src); |
34478 | flag_N = res >> 24; |
34479 | flag_NotZ = res; |
34480 | flag_V = flag_C = 0; |
34481 | DREGu32((Opcode >> 9) & 7) = res; |
34482 | POST_IO |
34483 | #ifdef USE_CYCLONE_TIMING |
34484 | RET(60) |
34485 | #else |
34486 | RET(56) |
34487 | #endif |
34488 | } |
34489 | |
34490 | // MULS |
34491 | OPCODE(0xC1E8) |
34492 | { |
34493 | u32 adr, res; |
34494 | u32 src, dst; |
34495 | |
34496 | FETCH_SWORD(adr); |
34497 | adr += AREG((Opcode >> 0) & 7); |
34498 | PRE_IO |
34499 | READSX_WORD_F(adr, src) |
34500 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34501 | res = ((s32)res) * ((s32)src); |
34502 | flag_N = res >> 24; |
34503 | flag_NotZ = res; |
34504 | flag_V = flag_C = 0; |
34505 | DREGu32((Opcode >> 9) & 7) = res; |
34506 | POST_IO |
34507 | #ifdef USE_CYCLONE_TIMING |
34508 | RET(62) |
34509 | #else |
34510 | RET(58) |
34511 | #endif |
34512 | } |
34513 | |
34514 | // MULS |
34515 | OPCODE(0xC1F0) |
34516 | { |
34517 | u32 adr, res; |
34518 | u32 src, dst; |
34519 | |
34520 | adr = AREG((Opcode >> 0) & 7); |
34521 | DECODE_EXT_WORD |
34522 | PRE_IO |
34523 | READSX_WORD_F(adr, src) |
34524 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34525 | res = ((s32)res) * ((s32)src); |
34526 | flag_N = res >> 24; |
34527 | flag_NotZ = res; |
34528 | flag_V = flag_C = 0; |
34529 | DREGu32((Opcode >> 9) & 7) = res; |
34530 | POST_IO |
34531 | #ifdef USE_CYCLONE_TIMING |
34532 | RET(64) |
34533 | #else |
34534 | RET(60) |
34535 | #endif |
34536 | } |
34537 | |
34538 | // MULS |
34539 | OPCODE(0xC1F8) |
34540 | { |
34541 | u32 adr, res; |
34542 | u32 src, dst; |
34543 | |
34544 | FETCH_SWORD(adr); |
34545 | PRE_IO |
34546 | READSX_WORD_F(adr, src) |
34547 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34548 | res = ((s32)res) * ((s32)src); |
34549 | flag_N = res >> 24; |
34550 | flag_NotZ = res; |
34551 | flag_V = flag_C = 0; |
34552 | DREGu32((Opcode >> 9) & 7) = res; |
34553 | POST_IO |
34554 | #ifdef USE_CYCLONE_TIMING |
34555 | RET(62) |
34556 | #else |
34557 | RET(58) |
34558 | #endif |
34559 | } |
34560 | |
34561 | // MULS |
34562 | OPCODE(0xC1F9) |
34563 | { |
34564 | u32 adr, res; |
34565 | u32 src, dst; |
34566 | |
34567 | FETCH_LONG(adr); |
34568 | PRE_IO |
34569 | READSX_WORD_F(adr, src) |
34570 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34571 | res = ((s32)res) * ((s32)src); |
34572 | flag_N = res >> 24; |
34573 | flag_NotZ = res; |
34574 | flag_V = flag_C = 0; |
34575 | DREGu32((Opcode >> 9) & 7) = res; |
34576 | POST_IO |
34577 | #ifdef USE_CYCLONE_TIMING |
34578 | RET(66) |
34579 | #else |
34580 | RET(62) |
34581 | #endif |
34582 | } |
34583 | |
34584 | // MULS |
34585 | OPCODE(0xC1FA) |
34586 | { |
34587 | u32 adr, res; |
34588 | u32 src, dst; |
34589 | |
34590 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34591 | PC++; |
34592 | PRE_IO |
34593 | READSX_WORD_F(adr, src) |
34594 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34595 | res = ((s32)res) * ((s32)src); |
34596 | flag_N = res >> 24; |
34597 | flag_NotZ = res; |
34598 | flag_V = flag_C = 0; |
34599 | DREGu32((Opcode >> 9) & 7) = res; |
34600 | POST_IO |
34601 | #ifdef USE_CYCLONE_TIMING |
34602 | RET(62) |
34603 | #else |
34604 | RET(58) |
34605 | #endif |
34606 | } |
34607 | |
34608 | // MULS |
34609 | OPCODE(0xC1FB) |
34610 | { |
34611 | u32 adr, res; |
34612 | u32 src, dst; |
34613 | |
34614 | adr = (u32)(PC) - BasePC; |
34615 | DECODE_EXT_WORD |
34616 | PRE_IO |
34617 | READSX_WORD_F(adr, src) |
34618 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34619 | res = ((s32)res) * ((s32)src); |
34620 | flag_N = res >> 24; |
34621 | flag_NotZ = res; |
34622 | flag_V = flag_C = 0; |
34623 | DREGu32((Opcode >> 9) & 7) = res; |
34624 | POST_IO |
34625 | #ifdef USE_CYCLONE_TIMING |
34626 | RET(64) |
34627 | #else |
34628 | RET(60) |
34629 | #endif |
34630 | } |
34631 | |
34632 | // MULS |
34633 | OPCODE(0xC1FC) |
34634 | { |
34635 | u32 adr, res; |
34636 | u32 src, dst; |
34637 | |
34638 | FETCH_SWORD(src); |
34639 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34640 | res = ((s32)res) * ((s32)src); |
34641 | flag_N = res >> 24; |
34642 | flag_NotZ = res; |
34643 | flag_V = flag_C = 0; |
34644 | DREGu32((Opcode >> 9) & 7) = res; |
34645 | #ifdef USE_CYCLONE_TIMING |
34646 | RET(58) |
34647 | #else |
34648 | RET(54) |
34649 | #endif |
34650 | } |
34651 | |
34652 | // MULS |
34653 | OPCODE(0xC1DF) |
34654 | { |
34655 | u32 adr, res; |
34656 | u32 src, dst; |
34657 | |
34658 | adr = AREG(7); |
34659 | AREG(7) += 2; |
34660 | PRE_IO |
34661 | READSX_WORD_F(adr, src) |
34662 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34663 | res = ((s32)res) * ((s32)src); |
34664 | flag_N = res >> 24; |
34665 | flag_NotZ = res; |
34666 | flag_V = flag_C = 0; |
34667 | DREGu32((Opcode >> 9) & 7) = res; |
34668 | POST_IO |
34669 | #ifdef USE_CYCLONE_TIMING |
34670 | RET(58) |
34671 | #else |
34672 | RET(54) |
34673 | #endif |
34674 | } |
34675 | |
34676 | // MULS |
34677 | OPCODE(0xC1E7) |
34678 | { |
34679 | u32 adr, res; |
34680 | u32 src, dst; |
34681 | |
34682 | adr = AREG(7) - 2; |
34683 | AREG(7) = adr; |
34684 | PRE_IO |
34685 | READSX_WORD_F(adr, src) |
34686 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34687 | res = ((s32)res) * ((s32)src); |
34688 | flag_N = res >> 24; |
34689 | flag_NotZ = res; |
34690 | flag_V = flag_C = 0; |
34691 | DREGu32((Opcode >> 9) & 7) = res; |
34692 | POST_IO |
34693 | #ifdef USE_CYCLONE_TIMING |
34694 | RET(60) |
34695 | #else |
34696 | RET(56) |
34697 | #endif |
34698 | } |
34699 | |
34700 | // EXGDD |
34701 | OPCODE(0xC140) |
34702 | { |
34703 | u32 adr, res; |
34704 | u32 src, dst; |
34705 | |
34706 | res = DREGu32((Opcode >> 0) & 7); |
34707 | src = DREGu32((Opcode >> 9) & 7); |
34708 | DREGu32((Opcode >> 9) & 7) = res; |
34709 | res = src; |
34710 | DREGu32((Opcode >> 0) & 7) = res; |
34711 | RET(6) |
34712 | } |
34713 | |
34714 | // EXGAA |
34715 | OPCODE(0xC148) |
34716 | { |
34717 | u32 adr, res; |
34718 | u32 src, dst; |
34719 | |
34720 | res = AREGu32((Opcode >> 0) & 7); |
34721 | src = AREGu32((Opcode >> 9) & 7); |
34722 | AREG((Opcode >> 9) & 7) = res; |
34723 | res = src; |
34724 | AREG((Opcode >> 0) & 7) = res; |
34725 | RET(6) |
34726 | } |
34727 | |
34728 | // EXGAD |
34729 | OPCODE(0xC188) |
34730 | { |
34731 | u32 adr, res; |
34732 | u32 src, dst; |
34733 | |
34734 | res = AREGu32((Opcode >> 0) & 7); |
34735 | src = DREGu32((Opcode >> 9) & 7); |
34736 | DREGu32((Opcode >> 9) & 7) = res; |
34737 | res = src; |
34738 | AREG((Opcode >> 0) & 7) = res; |
34739 | RET(6) |
34740 | } |
34741 | |
34742 | // ADDaD |
34743 | OPCODE(0xD000) |
34744 | { |
34745 | u32 adr, res; |
34746 | u32 src, dst; |
34747 | |
34748 | src = DREGu8((Opcode >> 0) & 7); |
34749 | dst = DREGu8((Opcode >> 9) & 7); |
34750 | res = dst + src; |
34751 | flag_N = flag_X = flag_C = res; |
34752 | flag_V = (src ^ res) & (dst ^ res); |
34753 | flag_NotZ = res & 0xFF; |
34754 | DREGu8((Opcode >> 9) & 7) = res; |
34755 | RET(4) |
34756 | } |
34757 | |
34758 | // ADDaD |
34759 | OPCODE(0xD008) |
34760 | { |
34761 | u32 adr, res; |
34762 | u32 src, dst; |
34763 | |
34764 | // can't read byte from Ax registers ! |
34765 | m68kcontext.execinfo |= M68K_FAULTED; |
34766 | m68kcontext.io_cycle_counter = 0; |
34767 | /* |
34768 | goto famec_Exec_End; |
34769 | dst = DREGu8((Opcode >> 9) & 7); |
34770 | res = dst + src; |
34771 | flag_N = flag_X = flag_C = res; |
34772 | flag_V = (src ^ res) & (dst ^ res); |
34773 | flag_NotZ = res & 0xFF; |
34774 | DREGu8((Opcode >> 9) & 7) = res; |
34775 | */ |
34776 | RET(4) |
34777 | } |
34778 | |
34779 | // ADDaD |
34780 | OPCODE(0xD010) |
34781 | { |
34782 | u32 adr, res; |
34783 | u32 src, dst; |
34784 | |
34785 | adr = AREG((Opcode >> 0) & 7); |
34786 | PRE_IO |
34787 | READ_BYTE_F(adr, src) |
34788 | dst = DREGu8((Opcode >> 9) & 7); |
34789 | res = dst + src; |
34790 | flag_N = flag_X = flag_C = res; |
34791 | flag_V = (src ^ res) & (dst ^ res); |
34792 | flag_NotZ = res & 0xFF; |
34793 | DREGu8((Opcode >> 9) & 7) = res; |
34794 | POST_IO |
34795 | RET(8) |
34796 | } |
34797 | |
34798 | // ADDaD |
34799 | OPCODE(0xD018) |
34800 | { |
34801 | u32 adr, res; |
34802 | u32 src, dst; |
34803 | |
34804 | adr = AREG((Opcode >> 0) & 7); |
34805 | AREG((Opcode >> 0) & 7) += 1; |
34806 | PRE_IO |
34807 | READ_BYTE_F(adr, src) |
34808 | dst = DREGu8((Opcode >> 9) & 7); |
34809 | res = dst + src; |
34810 | flag_N = flag_X = flag_C = res; |
34811 | flag_V = (src ^ res) & (dst ^ res); |
34812 | flag_NotZ = res & 0xFF; |
34813 | DREGu8((Opcode >> 9) & 7) = res; |
34814 | POST_IO |
34815 | RET(8) |
34816 | } |
34817 | |
34818 | // ADDaD |
34819 | OPCODE(0xD020) |
34820 | { |
34821 | u32 adr, res; |
34822 | u32 src, dst; |
34823 | |
34824 | adr = AREG((Opcode >> 0) & 7) - 1; |
34825 | AREG((Opcode >> 0) & 7) = adr; |
34826 | PRE_IO |
34827 | READ_BYTE_F(adr, src) |
34828 | dst = DREGu8((Opcode >> 9) & 7); |
34829 | res = dst + src; |
34830 | flag_N = flag_X = flag_C = res; |
34831 | flag_V = (src ^ res) & (dst ^ res); |
34832 | flag_NotZ = res & 0xFF; |
34833 | DREGu8((Opcode >> 9) & 7) = res; |
34834 | POST_IO |
34835 | RET(10) |
34836 | } |
34837 | |
34838 | // ADDaD |
34839 | OPCODE(0xD028) |
34840 | { |
34841 | u32 adr, res; |
34842 | u32 src, dst; |
34843 | |
34844 | FETCH_SWORD(adr); |
34845 | adr += AREG((Opcode >> 0) & 7); |
34846 | PRE_IO |
34847 | READ_BYTE_F(adr, src) |
34848 | dst = DREGu8((Opcode >> 9) & 7); |
34849 | res = dst + src; |
34850 | flag_N = flag_X = flag_C = res; |
34851 | flag_V = (src ^ res) & (dst ^ res); |
34852 | flag_NotZ = res & 0xFF; |
34853 | DREGu8((Opcode >> 9) & 7) = res; |
34854 | POST_IO |
34855 | RET(12) |
34856 | } |
34857 | |
34858 | // ADDaD |
34859 | OPCODE(0xD030) |
34860 | { |
34861 | u32 adr, res; |
34862 | u32 src, dst; |
34863 | |
34864 | adr = AREG((Opcode >> 0) & 7); |
34865 | DECODE_EXT_WORD |
34866 | PRE_IO |
34867 | READ_BYTE_F(adr, src) |
34868 | dst = DREGu8((Opcode >> 9) & 7); |
34869 | res = dst + src; |
34870 | flag_N = flag_X = flag_C = res; |
34871 | flag_V = (src ^ res) & (dst ^ res); |
34872 | flag_NotZ = res & 0xFF; |
34873 | DREGu8((Opcode >> 9) & 7) = res; |
34874 | POST_IO |
34875 | RET(14) |
34876 | } |
34877 | |
34878 | // ADDaD |
34879 | OPCODE(0xD038) |
34880 | { |
34881 | u32 adr, res; |
34882 | u32 src, dst; |
34883 | |
34884 | FETCH_SWORD(adr); |
34885 | PRE_IO |
34886 | READ_BYTE_F(adr, src) |
34887 | dst = DREGu8((Opcode >> 9) & 7); |
34888 | res = dst + src; |
34889 | flag_N = flag_X = flag_C = res; |
34890 | flag_V = (src ^ res) & (dst ^ res); |
34891 | flag_NotZ = res & 0xFF; |
34892 | DREGu8((Opcode >> 9) & 7) = res; |
34893 | POST_IO |
34894 | RET(12) |
34895 | } |
34896 | |
34897 | // ADDaD |
34898 | OPCODE(0xD039) |
34899 | { |
34900 | u32 adr, res; |
34901 | u32 src, dst; |
34902 | |
34903 | FETCH_LONG(adr); |
34904 | PRE_IO |
34905 | READ_BYTE_F(adr, src) |
34906 | dst = DREGu8((Opcode >> 9) & 7); |
34907 | res = dst + src; |
34908 | flag_N = flag_X = flag_C = res; |
34909 | flag_V = (src ^ res) & (dst ^ res); |
34910 | flag_NotZ = res & 0xFF; |
34911 | DREGu8((Opcode >> 9) & 7) = res; |
34912 | POST_IO |
34913 | RET(16) |
34914 | } |
34915 | |
34916 | // ADDaD |
34917 | OPCODE(0xD03A) |
34918 | { |
34919 | u32 adr, res; |
34920 | u32 src, dst; |
34921 | |
34922 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
34923 | PC++; |
34924 | PRE_IO |
34925 | READ_BYTE_F(adr, src) |
34926 | dst = DREGu8((Opcode >> 9) & 7); |
34927 | res = dst + src; |
34928 | flag_N = flag_X = flag_C = res; |
34929 | flag_V = (src ^ res) & (dst ^ res); |
34930 | flag_NotZ = res & 0xFF; |
34931 | DREGu8((Opcode >> 9) & 7) = res; |
34932 | POST_IO |
34933 | RET(12) |
34934 | } |
34935 | |
34936 | // ADDaD |
34937 | OPCODE(0xD03B) |
34938 | { |
34939 | u32 adr, res; |
34940 | u32 src, dst; |
34941 | |
34942 | adr = (u32)(PC) - BasePC; |
34943 | DECODE_EXT_WORD |
34944 | PRE_IO |
34945 | READ_BYTE_F(adr, src) |
34946 | dst = DREGu8((Opcode >> 9) & 7); |
34947 | res = dst + src; |
34948 | flag_N = flag_X = flag_C = res; |
34949 | flag_V = (src ^ res) & (dst ^ res); |
34950 | flag_NotZ = res & 0xFF; |
34951 | DREGu8((Opcode >> 9) & 7) = res; |
34952 | POST_IO |
34953 | RET(14) |
34954 | } |
34955 | |
34956 | // ADDaD |
34957 | OPCODE(0xD03C) |
34958 | { |
34959 | u32 adr, res; |
34960 | u32 src, dst; |
34961 | |
34962 | FETCH_BYTE(src); |
34963 | dst = DREGu8((Opcode >> 9) & 7); |
34964 | res = dst + src; |
34965 | flag_N = flag_X = flag_C = res; |
34966 | flag_V = (src ^ res) & (dst ^ res); |
34967 | flag_NotZ = res & 0xFF; |
34968 | DREGu8((Opcode >> 9) & 7) = res; |
34969 | RET(8) |
34970 | } |
34971 | |
34972 | // ADDaD |
34973 | OPCODE(0xD01F) |
34974 | { |
34975 | u32 adr, res; |
34976 | u32 src, dst; |
34977 | |
34978 | adr = AREG(7); |
34979 | AREG(7) += 2; |
34980 | PRE_IO |
34981 | READ_BYTE_F(adr, src) |
34982 | dst = DREGu8((Opcode >> 9) & 7); |
34983 | res = dst + src; |
34984 | flag_N = flag_X = flag_C = res; |
34985 | flag_V = (src ^ res) & (dst ^ res); |
34986 | flag_NotZ = res & 0xFF; |
34987 | DREGu8((Opcode >> 9) & 7) = res; |
34988 | POST_IO |
34989 | RET(8) |
34990 | } |
34991 | |
34992 | // ADDaD |
34993 | OPCODE(0xD027) |
34994 | { |
34995 | u32 adr, res; |
34996 | u32 src, dst; |
34997 | |
34998 | adr = AREG(7) - 2; |
34999 | AREG(7) = adr; |
35000 | PRE_IO |
35001 | READ_BYTE_F(adr, src) |
35002 | dst = DREGu8((Opcode >> 9) & 7); |
35003 | res = dst + src; |
35004 | flag_N = flag_X = flag_C = res; |
35005 | flag_V = (src ^ res) & (dst ^ res); |
35006 | flag_NotZ = res & 0xFF; |
35007 | DREGu8((Opcode >> 9) & 7) = res; |
35008 | POST_IO |
35009 | RET(10) |
35010 | } |
35011 | |
35012 | // ADDaD |
35013 | OPCODE(0xD040) |
35014 | { |
35015 | u32 adr, res; |
35016 | u32 src, dst; |
35017 | |
35018 | src = DREGu16((Opcode >> 0) & 7); |
35019 | dst = DREGu16((Opcode >> 9) & 7); |
35020 | res = dst + src; |
35021 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35022 | flag_N = flag_X = flag_C = res >> 8; |
35023 | flag_NotZ = res & 0xFFFF; |
35024 | DREGu16((Opcode >> 9) & 7) = res; |
35025 | RET(4) |
35026 | } |
35027 | |
35028 | // ADDaD |
35029 | OPCODE(0xD048) |
35030 | { |
35031 | u32 adr, res; |
35032 | u32 src, dst; |
35033 | |
35034 | src = AREGu16((Opcode >> 0) & 7); |
35035 | dst = DREGu16((Opcode >> 9) & 7); |
35036 | res = dst + src; |
35037 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35038 | flag_N = flag_X = flag_C = res >> 8; |
35039 | flag_NotZ = res & 0xFFFF; |
35040 | DREGu16((Opcode >> 9) & 7) = res; |
35041 | RET(4) |
35042 | } |
35043 | |
35044 | // ADDaD |
35045 | OPCODE(0xD050) |
35046 | { |
35047 | u32 adr, res; |
35048 | u32 src, dst; |
35049 | |
35050 | adr = AREG((Opcode >> 0) & 7); |
35051 | PRE_IO |
35052 | READ_WORD_F(adr, src) |
35053 | dst = DREGu16((Opcode >> 9) & 7); |
35054 | res = dst + src; |
35055 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35056 | flag_N = flag_X = flag_C = res >> 8; |
35057 | flag_NotZ = res & 0xFFFF; |
35058 | DREGu16((Opcode >> 9) & 7) = res; |
35059 | POST_IO |
35060 | RET(8) |
35061 | } |
35062 | |
35063 | // ADDaD |
35064 | OPCODE(0xD058) |
35065 | { |
35066 | u32 adr, res; |
35067 | u32 src, dst; |
35068 | |
35069 | adr = AREG((Opcode >> 0) & 7); |
35070 | AREG((Opcode >> 0) & 7) += 2; |
35071 | PRE_IO |
35072 | READ_WORD_F(adr, src) |
35073 | dst = DREGu16((Opcode >> 9) & 7); |
35074 | res = dst + src; |
35075 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35076 | flag_N = flag_X = flag_C = res >> 8; |
35077 | flag_NotZ = res & 0xFFFF; |
35078 | DREGu16((Opcode >> 9) & 7) = res; |
35079 | POST_IO |
35080 | RET(8) |
35081 | } |
35082 | |
35083 | // ADDaD |
35084 | OPCODE(0xD060) |
35085 | { |
35086 | u32 adr, res; |
35087 | u32 src, dst; |
35088 | |
35089 | adr = AREG((Opcode >> 0) & 7) - 2; |
35090 | AREG((Opcode >> 0) & 7) = adr; |
35091 | PRE_IO |
35092 | READ_WORD_F(adr, src) |
35093 | dst = DREGu16((Opcode >> 9) & 7); |
35094 | res = dst + src; |
35095 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35096 | flag_N = flag_X = flag_C = res >> 8; |
35097 | flag_NotZ = res & 0xFFFF; |
35098 | DREGu16((Opcode >> 9) & 7) = res; |
35099 | POST_IO |
35100 | RET(10) |
35101 | } |
35102 | |
35103 | // ADDaD |
35104 | OPCODE(0xD068) |
35105 | { |
35106 | u32 adr, res; |
35107 | u32 src, dst; |
35108 | |
35109 | FETCH_SWORD(adr); |
35110 | adr += AREG((Opcode >> 0) & 7); |
35111 | PRE_IO |
35112 | READ_WORD_F(adr, src) |
35113 | dst = DREGu16((Opcode >> 9) & 7); |
35114 | res = dst + src; |
35115 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35116 | flag_N = flag_X = flag_C = res >> 8; |
35117 | flag_NotZ = res & 0xFFFF; |
35118 | DREGu16((Opcode >> 9) & 7) = res; |
35119 | POST_IO |
35120 | RET(12) |
35121 | } |
35122 | |
35123 | // ADDaD |
35124 | OPCODE(0xD070) |
35125 | { |
35126 | u32 adr, res; |
35127 | u32 src, dst; |
35128 | |
35129 | adr = AREG((Opcode >> 0) & 7); |
35130 | DECODE_EXT_WORD |
35131 | PRE_IO |
35132 | READ_WORD_F(adr, src) |
35133 | dst = DREGu16((Opcode >> 9) & 7); |
35134 | res = dst + src; |
35135 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35136 | flag_N = flag_X = flag_C = res >> 8; |
35137 | flag_NotZ = res & 0xFFFF; |
35138 | DREGu16((Opcode >> 9) & 7) = res; |
35139 | POST_IO |
35140 | RET(14) |
35141 | } |
35142 | |
35143 | // ADDaD |
35144 | OPCODE(0xD078) |
35145 | { |
35146 | u32 adr, res; |
35147 | u32 src, dst; |
35148 | |
35149 | FETCH_SWORD(adr); |
35150 | PRE_IO |
35151 | READ_WORD_F(adr, src) |
35152 | dst = DREGu16((Opcode >> 9) & 7); |
35153 | res = dst + src; |
35154 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35155 | flag_N = flag_X = flag_C = res >> 8; |
35156 | flag_NotZ = res & 0xFFFF; |
35157 | DREGu16((Opcode >> 9) & 7) = res; |
35158 | POST_IO |
35159 | RET(12) |
35160 | } |
35161 | |
35162 | // ADDaD |
35163 | OPCODE(0xD079) |
35164 | { |
35165 | u32 adr, res; |
35166 | u32 src, dst; |
35167 | |
35168 | FETCH_LONG(adr); |
35169 | PRE_IO |
35170 | READ_WORD_F(adr, src) |
35171 | dst = DREGu16((Opcode >> 9) & 7); |
35172 | res = dst + src; |
35173 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35174 | flag_N = flag_X = flag_C = res >> 8; |
35175 | flag_NotZ = res & 0xFFFF; |
35176 | DREGu16((Opcode >> 9) & 7) = res; |
35177 | POST_IO |
35178 | RET(16) |
35179 | } |
35180 | |
35181 | // ADDaD |
35182 | OPCODE(0xD07A) |
35183 | { |
35184 | u32 adr, res; |
35185 | u32 src, dst; |
35186 | |
35187 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
35188 | PC++; |
35189 | PRE_IO |
35190 | READ_WORD_F(adr, src) |
35191 | dst = DREGu16((Opcode >> 9) & 7); |
35192 | res = dst + src; |
35193 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35194 | flag_N = flag_X = flag_C = res >> 8; |
35195 | flag_NotZ = res & 0xFFFF; |
35196 | DREGu16((Opcode >> 9) & 7) = res; |
35197 | POST_IO |
35198 | RET(12) |
35199 | } |
35200 | |
35201 | // ADDaD |
35202 | OPCODE(0xD07B) |
35203 | { |
35204 | u32 adr, res; |
35205 | u32 src, dst; |
35206 | |
35207 | adr = (u32)(PC) - BasePC; |
35208 | DECODE_EXT_WORD |
35209 | PRE_IO |
35210 | READ_WORD_F(adr, src) |
35211 | dst = DREGu16((Opcode >> 9) & 7); |
35212 | res = dst + src; |
35213 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35214 | flag_N = flag_X = flag_C = res >> 8; |
35215 | flag_NotZ = res & 0xFFFF; |
35216 | DREGu16((Opcode >> 9) & 7) = res; |
35217 | POST_IO |
35218 | RET(14) |
35219 | } |
35220 | |
35221 | // ADDaD |
35222 | OPCODE(0xD07C) |
35223 | { |
35224 | u32 adr, res; |
35225 | u32 src, dst; |
35226 | |
35227 | FETCH_WORD(src); |
35228 | dst = DREGu16((Opcode >> 9) & 7); |
35229 | res = dst + src; |
35230 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35231 | flag_N = flag_X = flag_C = res >> 8; |
35232 | flag_NotZ = res & 0xFFFF; |
35233 | DREGu16((Opcode >> 9) & 7) = res; |
35234 | RET(8) |
35235 | } |
35236 | |
35237 | // ADDaD |
35238 | OPCODE(0xD05F) |
35239 | { |
35240 | u32 adr, res; |
35241 | u32 src, dst; |
35242 | |
35243 | adr = AREG(7); |
35244 | AREG(7) += 2; |
35245 | PRE_IO |
35246 | READ_WORD_F(adr, src) |
35247 | dst = DREGu16((Opcode >> 9) & 7); |
35248 | res = dst + src; |
35249 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35250 | flag_N = flag_X = flag_C = res >> 8; |
35251 | flag_NotZ = res & 0xFFFF; |
35252 | DREGu16((Opcode >> 9) & 7) = res; |
35253 | POST_IO |
35254 | RET(8) |
35255 | } |
35256 | |
35257 | // ADDaD |
35258 | OPCODE(0xD067) |
35259 | { |
35260 | u32 adr, res; |
35261 | u32 src, dst; |
35262 | |
35263 | adr = AREG(7) - 2; |
35264 | AREG(7) = adr; |
35265 | PRE_IO |
35266 | READ_WORD_F(adr, src) |
35267 | dst = DREGu16((Opcode >> 9) & 7); |
35268 | res = dst + src; |
35269 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35270 | flag_N = flag_X = flag_C = res >> 8; |
35271 | flag_NotZ = res & 0xFFFF; |
35272 | DREGu16((Opcode >> 9) & 7) = res; |
35273 | POST_IO |
35274 | RET(10) |
35275 | } |
35276 | |
35277 | // ADDaD |
35278 | OPCODE(0xD080) |
35279 | { |
35280 | u32 adr, res; |
35281 | u32 src, dst; |
35282 | |
35283 | src = DREGu32((Opcode >> 0) & 7); |
35284 | dst = DREGu32((Opcode >> 9) & 7); |
35285 | res = dst + src; |
35286 | flag_NotZ = res; |
35287 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35288 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35289 | flag_N = res >> 24; |
35290 | DREGu32((Opcode >> 9) & 7) = res; |
35291 | RET(8) |
35292 | } |
35293 | |
35294 | // ADDaD |
35295 | OPCODE(0xD088) |
35296 | { |
35297 | u32 adr, res; |
35298 | u32 src, dst; |
35299 | |
35300 | src = AREGu32((Opcode >> 0) & 7); |
35301 | dst = DREGu32((Opcode >> 9) & 7); |
35302 | res = dst + src; |
35303 | flag_NotZ = res; |
35304 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35305 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35306 | flag_N = res >> 24; |
35307 | DREGu32((Opcode >> 9) & 7) = res; |
35308 | RET(8) |
35309 | } |
35310 | |
35311 | // ADDaD |
35312 | OPCODE(0xD090) |
35313 | { |
35314 | u32 adr, res; |
35315 | u32 src, dst; |
35316 | |
35317 | adr = AREG((Opcode >> 0) & 7); |
35318 | PRE_IO |
35319 | READ_LONG_F(adr, src) |
35320 | dst = DREGu32((Opcode >> 9) & 7); |
35321 | res = dst + src; |
35322 | flag_NotZ = res; |
35323 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35324 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35325 | flag_N = res >> 24; |
35326 | DREGu32((Opcode >> 9) & 7) = res; |
35327 | POST_IO |
35328 | RET(14) |
35329 | } |
35330 | |
35331 | // ADDaD |
35332 | OPCODE(0xD098) |
35333 | { |
35334 | u32 adr, res; |
35335 | u32 src, dst; |
35336 | |
35337 | adr = AREG((Opcode >> 0) & 7); |
35338 | AREG((Opcode >> 0) & 7) += 4; |
35339 | PRE_IO |
35340 | READ_LONG_F(adr, src) |
35341 | dst = DREGu32((Opcode >> 9) & 7); |
35342 | res = dst + src; |
35343 | flag_NotZ = res; |
35344 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35345 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35346 | flag_N = res >> 24; |
35347 | DREGu32((Opcode >> 9) & 7) = res; |
35348 | POST_IO |
35349 | RET(14) |
35350 | } |
35351 | |
35352 | // ADDaD |
35353 | OPCODE(0xD0A0) |
35354 | { |
35355 | u32 adr, res; |
35356 | u32 src, dst; |
35357 | |
35358 | adr = AREG((Opcode >> 0) & 7) - 4; |
35359 | AREG((Opcode >> 0) & 7) = adr; |
35360 | PRE_IO |
35361 | READ_LONG_F(adr, src) |
35362 | dst = DREGu32((Opcode >> 9) & 7); |
35363 | res = dst + src; |
35364 | flag_NotZ = res; |
35365 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35366 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35367 | flag_N = res >> 24; |
35368 | DREGu32((Opcode >> 9) & 7) = res; |
35369 | POST_IO |
35370 | RET(16) |
35371 | } |
35372 | |
35373 | // ADDaD |
35374 | OPCODE(0xD0A8) |
35375 | { |
35376 | u32 adr, res; |
35377 | u32 src, dst; |
35378 | |
35379 | FETCH_SWORD(adr); |
35380 | adr += AREG((Opcode >> 0) & 7); |
35381 | PRE_IO |
35382 | READ_LONG_F(adr, src) |
35383 | dst = DREGu32((Opcode >> 9) & 7); |
35384 | res = dst + src; |
35385 | flag_NotZ = res; |
35386 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35387 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35388 | flag_N = res >> 24; |
35389 | DREGu32((Opcode >> 9) & 7) = res; |
35390 | POST_IO |
35391 | RET(18) |
35392 | } |
35393 | |
35394 | // ADDaD |
35395 | OPCODE(0xD0B0) |
35396 | { |
35397 | u32 adr, res; |
35398 | u32 src, dst; |
35399 | |
35400 | adr = AREG((Opcode >> 0) & 7); |
35401 | DECODE_EXT_WORD |
35402 | PRE_IO |
35403 | READ_LONG_F(adr, src) |
35404 | dst = DREGu32((Opcode >> 9) & 7); |
35405 | res = dst + src; |
35406 | flag_NotZ = res; |
35407 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35408 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35409 | flag_N = res >> 24; |
35410 | DREGu32((Opcode >> 9) & 7) = res; |
35411 | POST_IO |
35412 | RET(20) |
35413 | } |
35414 | |
35415 | // ADDaD |
35416 | OPCODE(0xD0B8) |
35417 | { |
35418 | u32 adr, res; |
35419 | u32 src, dst; |
35420 | |
35421 | FETCH_SWORD(adr); |
35422 | PRE_IO |
35423 | READ_LONG_F(adr, src) |
35424 | dst = DREGu32((Opcode >> 9) & 7); |
35425 | res = dst + src; |
35426 | flag_NotZ = res; |
35427 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35428 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35429 | flag_N = res >> 24; |
35430 | DREGu32((Opcode >> 9) & 7) = res; |
35431 | POST_IO |
35432 | RET(18) |
35433 | } |
35434 | |
35435 | // ADDaD |
35436 | OPCODE(0xD0B9) |
35437 | { |
35438 | u32 adr, res; |
35439 | u32 src, dst; |
35440 | |
35441 | FETCH_LONG(adr); |
35442 | PRE_IO |
35443 | READ_LONG_F(adr, src) |
35444 | dst = DREGu32((Opcode >> 9) & 7); |
35445 | res = dst + src; |
35446 | flag_NotZ = res; |
35447 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35448 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35449 | flag_N = res >> 24; |
35450 | DREGu32((Opcode >> 9) & 7) = res; |
35451 | POST_IO |
35452 | RET(22) |
35453 | } |
35454 | |
35455 | // ADDaD |
35456 | OPCODE(0xD0BA) |
35457 | { |
35458 | u32 adr, res; |
35459 | u32 src, dst; |
35460 | |
35461 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
35462 | PC++; |
35463 | PRE_IO |
35464 | READ_LONG_F(adr, src) |
35465 | dst = DREGu32((Opcode >> 9) & 7); |
35466 | res = dst + src; |
35467 | flag_NotZ = res; |
35468 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35469 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35470 | flag_N = res >> 24; |
35471 | DREGu32((Opcode >> 9) & 7) = res; |
35472 | POST_IO |
35473 | RET(18) |
35474 | } |
35475 | |
35476 | // ADDaD |
35477 | OPCODE(0xD0BB) |
35478 | { |
35479 | u32 adr, res; |
35480 | u32 src, dst; |
35481 | |
35482 | adr = (u32)(PC) - BasePC; |
35483 | DECODE_EXT_WORD |
35484 | PRE_IO |
35485 | READ_LONG_F(adr, src) |
35486 | dst = DREGu32((Opcode >> 9) & 7); |
35487 | res = dst + src; |
35488 | flag_NotZ = res; |
35489 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35490 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35491 | flag_N = res >> 24; |
35492 | DREGu32((Opcode >> 9) & 7) = res; |
35493 | POST_IO |
35494 | RET(20) |
35495 | } |
35496 | |
35497 | // ADDaD |
35498 | OPCODE(0xD0BC) |
35499 | { |
35500 | u32 adr, res; |
35501 | u32 src, dst; |
35502 | |
35503 | FETCH_LONG(src); |
35504 | dst = DREGu32((Opcode >> 9) & 7); |
35505 | res = dst + src; |
35506 | flag_NotZ = res; |
35507 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35508 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35509 | flag_N = res >> 24; |
35510 | DREGu32((Opcode >> 9) & 7) = res; |
35511 | RET(16) |
35512 | } |
35513 | |
35514 | // ADDaD |
35515 | OPCODE(0xD09F) |
35516 | { |
35517 | u32 adr, res; |
35518 | u32 src, dst; |
35519 | |
35520 | adr = AREG(7); |
35521 | AREG(7) += 4; |
35522 | PRE_IO |
35523 | READ_LONG_F(adr, src) |
35524 | dst = DREGu32((Opcode >> 9) & 7); |
35525 | res = dst + src; |
35526 | flag_NotZ = res; |
35527 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35528 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35529 | flag_N = res >> 24; |
35530 | DREGu32((Opcode >> 9) & 7) = res; |
35531 | POST_IO |
35532 | RET(14) |
35533 | } |
35534 | |
35535 | // ADDaD |
35536 | OPCODE(0xD0A7) |
35537 | { |
35538 | u32 adr, res; |
35539 | u32 src, dst; |
35540 | |
35541 | adr = AREG(7) - 4; |
35542 | AREG(7) = adr; |
35543 | PRE_IO |
35544 | READ_LONG_F(adr, src) |
35545 | dst = DREGu32((Opcode >> 9) & 7); |
35546 | res = dst + src; |
35547 | flag_NotZ = res; |
35548 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35549 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35550 | flag_N = res >> 24; |
35551 | DREGu32((Opcode >> 9) & 7) = res; |
35552 | POST_IO |
35553 | RET(16) |
35554 | } |
35555 | |
35556 | // ADDDa |
35557 | OPCODE(0xD110) |
35558 | { |
35559 | u32 adr, res; |
35560 | u32 src, dst; |
35561 | |
35562 | src = DREGu8((Opcode >> 9) & 7); |
35563 | adr = AREG((Opcode >> 0) & 7); |
35564 | PRE_IO |
35565 | READ_BYTE_F(adr, dst) |
35566 | res = dst + src; |
35567 | flag_N = flag_X = flag_C = res; |
35568 | flag_V = (src ^ res) & (dst ^ res); |
35569 | flag_NotZ = res & 0xFF; |
35570 | WRITE_BYTE_F(adr, res) |
35571 | POST_IO |
35572 | RET(12) |
35573 | } |
35574 | |
35575 | // ADDDa |
35576 | OPCODE(0xD118) |
35577 | { |
35578 | u32 adr, res; |
35579 | u32 src, dst; |
35580 | |
35581 | src = DREGu8((Opcode >> 9) & 7); |
35582 | adr = AREG((Opcode >> 0) & 7); |
35583 | AREG((Opcode >> 0) & 7) += 1; |
35584 | PRE_IO |
35585 | READ_BYTE_F(adr, dst) |
35586 | res = dst + src; |
35587 | flag_N = flag_X = flag_C = res; |
35588 | flag_V = (src ^ res) & (dst ^ res); |
35589 | flag_NotZ = res & 0xFF; |
35590 | WRITE_BYTE_F(adr, res) |
35591 | POST_IO |
35592 | RET(12) |
35593 | } |
35594 | |
35595 | // ADDDa |
35596 | OPCODE(0xD120) |
35597 | { |
35598 | u32 adr, res; |
35599 | u32 src, dst; |
35600 | |
35601 | src = DREGu8((Opcode >> 9) & 7); |
35602 | adr = AREG((Opcode >> 0) & 7) - 1; |
35603 | AREG((Opcode >> 0) & 7) = adr; |
35604 | PRE_IO |
35605 | READ_BYTE_F(adr, dst) |
35606 | res = dst + src; |
35607 | flag_N = flag_X = flag_C = res; |
35608 | flag_V = (src ^ res) & (dst ^ res); |
35609 | flag_NotZ = res & 0xFF; |
35610 | WRITE_BYTE_F(adr, res) |
35611 | POST_IO |
35612 | RET(14) |
35613 | } |
35614 | |
35615 | // ADDDa |
35616 | OPCODE(0xD128) |
35617 | { |
35618 | u32 adr, res; |
35619 | u32 src, dst; |
35620 | |
35621 | src = DREGu8((Opcode >> 9) & 7); |
35622 | FETCH_SWORD(adr); |
35623 | adr += AREG((Opcode >> 0) & 7); |
35624 | PRE_IO |
35625 | READ_BYTE_F(adr, dst) |
35626 | res = dst + src; |
35627 | flag_N = flag_X = flag_C = res; |
35628 | flag_V = (src ^ res) & (dst ^ res); |
35629 | flag_NotZ = res & 0xFF; |
35630 | WRITE_BYTE_F(adr, res) |
35631 | POST_IO |
35632 | RET(16) |
35633 | } |
35634 | |
35635 | // ADDDa |
35636 | OPCODE(0xD130) |
35637 | { |
35638 | u32 adr, res; |
35639 | u32 src, dst; |
35640 | |
35641 | src = DREGu8((Opcode >> 9) & 7); |
35642 | adr = AREG((Opcode >> 0) & 7); |
35643 | DECODE_EXT_WORD |
35644 | PRE_IO |
35645 | READ_BYTE_F(adr, dst) |
35646 | res = dst + src; |
35647 | flag_N = flag_X = flag_C = res; |
35648 | flag_V = (src ^ res) & (dst ^ res); |
35649 | flag_NotZ = res & 0xFF; |
35650 | WRITE_BYTE_F(adr, res) |
35651 | POST_IO |
35652 | RET(18) |
35653 | } |
35654 | |
35655 | // ADDDa |
35656 | OPCODE(0xD138) |
35657 | { |
35658 | u32 adr, res; |
35659 | u32 src, dst; |
35660 | |
35661 | src = DREGu8((Opcode >> 9) & 7); |
35662 | FETCH_SWORD(adr); |
35663 | PRE_IO |
35664 | READ_BYTE_F(adr, dst) |
35665 | res = dst + src; |
35666 | flag_N = flag_X = flag_C = res; |
35667 | flag_V = (src ^ res) & (dst ^ res); |
35668 | flag_NotZ = res & 0xFF; |
35669 | WRITE_BYTE_F(adr, res) |
35670 | POST_IO |
35671 | RET(16) |
35672 | } |
35673 | |
35674 | // ADDDa |
35675 | OPCODE(0xD139) |
35676 | { |
35677 | u32 adr, res; |
35678 | u32 src, dst; |
35679 | |
35680 | src = DREGu8((Opcode >> 9) & 7); |
35681 | FETCH_LONG(adr); |
35682 | PRE_IO |
35683 | READ_BYTE_F(adr, dst) |
35684 | res = dst + src; |
35685 | flag_N = flag_X = flag_C = res; |
35686 | flag_V = (src ^ res) & (dst ^ res); |
35687 | flag_NotZ = res & 0xFF; |
35688 | WRITE_BYTE_F(adr, res) |
35689 | POST_IO |
35690 | RET(20) |
35691 | } |
35692 | |
35693 | // ADDDa |
35694 | OPCODE(0xD11F) |
35695 | { |
35696 | u32 adr, res; |
35697 | u32 src, dst; |
35698 | |
35699 | src = DREGu8((Opcode >> 9) & 7); |
35700 | adr = AREG(7); |
35701 | AREG(7) += 2; |
35702 | PRE_IO |
35703 | READ_BYTE_F(adr, dst) |
35704 | res = dst + src; |
35705 | flag_N = flag_X = flag_C = res; |
35706 | flag_V = (src ^ res) & (dst ^ res); |
35707 | flag_NotZ = res & 0xFF; |
35708 | WRITE_BYTE_F(adr, res) |
35709 | POST_IO |
35710 | RET(12) |
35711 | } |
35712 | |
35713 | // ADDDa |
35714 | OPCODE(0xD127) |
35715 | { |
35716 | u32 adr, res; |
35717 | u32 src, dst; |
35718 | |
35719 | src = DREGu8((Opcode >> 9) & 7); |
35720 | adr = AREG(7) - 2; |
35721 | AREG(7) = adr; |
35722 | PRE_IO |
35723 | READ_BYTE_F(adr, dst) |
35724 | res = dst + src; |
35725 | flag_N = flag_X = flag_C = res; |
35726 | flag_V = (src ^ res) & (dst ^ res); |
35727 | flag_NotZ = res & 0xFF; |
35728 | WRITE_BYTE_F(adr, res) |
35729 | POST_IO |
35730 | RET(14) |
35731 | } |
35732 | |
35733 | // ADDDa |
35734 | OPCODE(0xD150) |
35735 | { |
35736 | u32 adr, res; |
35737 | u32 src, dst; |
35738 | |
35739 | src = DREGu16((Opcode >> 9) & 7); |
35740 | adr = AREG((Opcode >> 0) & 7); |
35741 | PRE_IO |
35742 | READ_WORD_F(adr, dst) |
35743 | res = dst + src; |
35744 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35745 | flag_N = flag_X = flag_C = res >> 8; |
35746 | flag_NotZ = res & 0xFFFF; |
35747 | WRITE_WORD_F(adr, res) |
35748 | POST_IO |
35749 | RET(12) |
35750 | } |
35751 | |
35752 | // ADDDa |
35753 | OPCODE(0xD158) |
35754 | { |
35755 | u32 adr, res; |
35756 | u32 src, dst; |
35757 | |
35758 | src = DREGu16((Opcode >> 9) & 7); |
35759 | adr = AREG((Opcode >> 0) & 7); |
35760 | AREG((Opcode >> 0) & 7) += 2; |
35761 | PRE_IO |
35762 | READ_WORD_F(adr, dst) |
35763 | res = dst + src; |
35764 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35765 | flag_N = flag_X = flag_C = res >> 8; |
35766 | flag_NotZ = res & 0xFFFF; |
35767 | WRITE_WORD_F(adr, res) |
35768 | POST_IO |
35769 | RET(12) |
35770 | } |
35771 | |
35772 | // ADDDa |
35773 | OPCODE(0xD160) |
35774 | { |
35775 | u32 adr, res; |
35776 | u32 src, dst; |
35777 | |
35778 | src = DREGu16((Opcode >> 9) & 7); |
35779 | adr = AREG((Opcode >> 0) & 7) - 2; |
35780 | AREG((Opcode >> 0) & 7) = adr; |
35781 | PRE_IO |
35782 | READ_WORD_F(adr, dst) |
35783 | res = dst + src; |
35784 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35785 | flag_N = flag_X = flag_C = res >> 8; |
35786 | flag_NotZ = res & 0xFFFF; |
35787 | WRITE_WORD_F(adr, res) |
35788 | POST_IO |
35789 | RET(14) |
35790 | } |
35791 | |
35792 | // ADDDa |
35793 | OPCODE(0xD168) |
35794 | { |
35795 | u32 adr, res; |
35796 | u32 src, dst; |
35797 | |
35798 | src = DREGu16((Opcode >> 9) & 7); |
35799 | FETCH_SWORD(adr); |
35800 | adr += AREG((Opcode >> 0) & 7); |
35801 | PRE_IO |
35802 | READ_WORD_F(adr, dst) |
35803 | res = dst + src; |
35804 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35805 | flag_N = flag_X = flag_C = res >> 8; |
35806 | flag_NotZ = res & 0xFFFF; |
35807 | WRITE_WORD_F(adr, res) |
35808 | POST_IO |
35809 | RET(16) |
35810 | } |
35811 | |
35812 | // ADDDa |
35813 | OPCODE(0xD170) |
35814 | { |
35815 | u32 adr, res; |
35816 | u32 src, dst; |
35817 | |
35818 | src = DREGu16((Opcode >> 9) & 7); |
35819 | adr = AREG((Opcode >> 0) & 7); |
35820 | DECODE_EXT_WORD |
35821 | PRE_IO |
35822 | READ_WORD_F(adr, dst) |
35823 | res = dst + src; |
35824 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35825 | flag_N = flag_X = flag_C = res >> 8; |
35826 | flag_NotZ = res & 0xFFFF; |
35827 | WRITE_WORD_F(adr, res) |
35828 | POST_IO |
35829 | RET(18) |
35830 | } |
35831 | |
35832 | // ADDDa |
35833 | OPCODE(0xD178) |
35834 | { |
35835 | u32 adr, res; |
35836 | u32 src, dst; |
35837 | |
35838 | src = DREGu16((Opcode >> 9) & 7); |
35839 | FETCH_SWORD(adr); |
35840 | PRE_IO |
35841 | READ_WORD_F(adr, dst) |
35842 | res = dst + src; |
35843 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35844 | flag_N = flag_X = flag_C = res >> 8; |
35845 | flag_NotZ = res & 0xFFFF; |
35846 | WRITE_WORD_F(adr, res) |
35847 | POST_IO |
35848 | RET(16) |
35849 | } |
35850 | |
35851 | // ADDDa |
35852 | OPCODE(0xD179) |
35853 | { |
35854 | u32 adr, res; |
35855 | u32 src, dst; |
35856 | |
35857 | src = DREGu16((Opcode >> 9) & 7); |
35858 | FETCH_LONG(adr); |
35859 | PRE_IO |
35860 | READ_WORD_F(adr, dst) |
35861 | res = dst + src; |
35862 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35863 | flag_N = flag_X = flag_C = res >> 8; |
35864 | flag_NotZ = res & 0xFFFF; |
35865 | WRITE_WORD_F(adr, res) |
35866 | POST_IO |
35867 | RET(20) |
35868 | } |
35869 | |
35870 | // ADDDa |
35871 | OPCODE(0xD15F) |
35872 | { |
35873 | u32 adr, res; |
35874 | u32 src, dst; |
35875 | |
35876 | src = DREGu16((Opcode >> 9) & 7); |
35877 | adr = AREG(7); |
35878 | AREG(7) += 2; |
35879 | PRE_IO |
35880 | READ_WORD_F(adr, dst) |
35881 | res = dst + src; |
35882 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35883 | flag_N = flag_X = flag_C = res >> 8; |
35884 | flag_NotZ = res & 0xFFFF; |
35885 | WRITE_WORD_F(adr, res) |
35886 | POST_IO |
35887 | RET(12) |
35888 | } |
35889 | |
35890 | // ADDDa |
35891 | OPCODE(0xD167) |
35892 | { |
35893 | u32 adr, res; |
35894 | u32 src, dst; |
35895 | |
35896 | src = DREGu16((Opcode >> 9) & 7); |
35897 | adr = AREG(7) - 2; |
35898 | AREG(7) = adr; |
35899 | PRE_IO |
35900 | READ_WORD_F(adr, dst) |
35901 | res = dst + src; |
35902 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35903 | flag_N = flag_X = flag_C = res >> 8; |
35904 | flag_NotZ = res & 0xFFFF; |
35905 | WRITE_WORD_F(adr, res) |
35906 | POST_IO |
35907 | RET(14) |
35908 | } |
35909 | |
35910 | // ADDDa |
35911 | OPCODE(0xD190) |
35912 | { |
35913 | u32 adr, res; |
35914 | u32 src, dst; |
35915 | |
35916 | src = DREGu32((Opcode >> 9) & 7); |
35917 | adr = AREG((Opcode >> 0) & 7); |
35918 | PRE_IO |
35919 | READ_LONG_F(adr, dst) |
35920 | res = dst + src; |
35921 | flag_NotZ = res; |
35922 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35923 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35924 | flag_N = res >> 24; |
35925 | WRITE_LONG_F(adr, res) |
35926 | POST_IO |
35927 | RET(20) |
35928 | } |
35929 | |
35930 | // ADDDa |
35931 | OPCODE(0xD198) |
35932 | { |
35933 | u32 adr, res; |
35934 | u32 src, dst; |
35935 | |
35936 | src = DREGu32((Opcode >> 9) & 7); |
35937 | adr = AREG((Opcode >> 0) & 7); |
35938 | AREG((Opcode >> 0) & 7) += 4; |
35939 | PRE_IO |
35940 | READ_LONG_F(adr, dst) |
35941 | res = dst + src; |
35942 | flag_NotZ = res; |
35943 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35944 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35945 | flag_N = res >> 24; |
35946 | WRITE_LONG_F(adr, res) |
35947 | POST_IO |
35948 | RET(20) |
35949 | } |
35950 | |
35951 | // ADDDa |
35952 | OPCODE(0xD1A0) |
35953 | { |
35954 | u32 adr, res; |
35955 | u32 src, dst; |
35956 | |
35957 | src = DREGu32((Opcode >> 9) & 7); |
35958 | adr = AREG((Opcode >> 0) & 7) - 4; |
35959 | AREG((Opcode >> 0) & 7) = adr; |
35960 | PRE_IO |
35961 | READ_LONG_F(adr, dst) |
35962 | res = dst + src; |
35963 | flag_NotZ = res; |
35964 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35965 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35966 | flag_N = res >> 24; |
35967 | WRITE_LONG_F(adr, res) |
35968 | POST_IO |
35969 | RET(22) |
35970 | } |
35971 | |
35972 | // ADDDa |
35973 | OPCODE(0xD1A8) |
35974 | { |
35975 | u32 adr, res; |
35976 | u32 src, dst; |
35977 | |
35978 | src = DREGu32((Opcode >> 9) & 7); |
35979 | FETCH_SWORD(adr); |
35980 | adr += AREG((Opcode >> 0) & 7); |
35981 | PRE_IO |
35982 | READ_LONG_F(adr, dst) |
35983 | res = dst + src; |
35984 | flag_NotZ = res; |
35985 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35986 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35987 | flag_N = res >> 24; |
35988 | WRITE_LONG_F(adr, res) |
35989 | POST_IO |
35990 | RET(24) |
35991 | } |
35992 | |
35993 | // ADDDa |
35994 | OPCODE(0xD1B0) |
35995 | { |
35996 | u32 adr, res; |
35997 | u32 src, dst; |
35998 | |
35999 | src = DREGu32((Opcode >> 9) & 7); |
36000 | adr = AREG((Opcode >> 0) & 7); |
36001 | DECODE_EXT_WORD |
36002 | PRE_IO |
36003 | READ_LONG_F(adr, dst) |
36004 | res = dst + src; |
36005 | flag_NotZ = res; |
36006 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36007 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36008 | flag_N = res >> 24; |
36009 | WRITE_LONG_F(adr, res) |
36010 | POST_IO |
36011 | RET(26) |
36012 | } |
36013 | |
36014 | // ADDDa |
36015 | OPCODE(0xD1B8) |
36016 | { |
36017 | u32 adr, res; |
36018 | u32 src, dst; |
36019 | |
36020 | src = DREGu32((Opcode >> 9) & 7); |
36021 | FETCH_SWORD(adr); |
36022 | PRE_IO |
36023 | READ_LONG_F(adr, dst) |
36024 | res = dst + src; |
36025 | flag_NotZ = res; |
36026 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36027 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36028 | flag_N = res >> 24; |
36029 | WRITE_LONG_F(adr, res) |
36030 | POST_IO |
36031 | RET(24) |
36032 | } |
36033 | |
36034 | // ADDDa |
36035 | OPCODE(0xD1B9) |
36036 | { |
36037 | u32 adr, res; |
36038 | u32 src, dst; |
36039 | |
36040 | src = DREGu32((Opcode >> 9) & 7); |
36041 | FETCH_LONG(adr); |
36042 | PRE_IO |
36043 | READ_LONG_F(adr, dst) |
36044 | res = dst + src; |
36045 | flag_NotZ = res; |
36046 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36047 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36048 | flag_N = res >> 24; |
36049 | WRITE_LONG_F(adr, res) |
36050 | POST_IO |
36051 | RET(28) |
36052 | } |
36053 | |
36054 | // ADDDa |
36055 | OPCODE(0xD19F) |
36056 | { |
36057 | u32 adr, res; |
36058 | u32 src, dst; |
36059 | |
36060 | src = DREGu32((Opcode >> 9) & 7); |
36061 | adr = AREG(7); |
36062 | AREG(7) += 4; |
36063 | PRE_IO |
36064 | READ_LONG_F(adr, dst) |
36065 | res = dst + src; |
36066 | flag_NotZ = res; |
36067 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36068 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36069 | flag_N = res >> 24; |
36070 | WRITE_LONG_F(adr, res) |
36071 | POST_IO |
36072 | RET(20) |
36073 | } |
36074 | |
36075 | // ADDDa |
36076 | OPCODE(0xD1A7) |
36077 | { |
36078 | u32 adr, res; |
36079 | u32 src, dst; |
36080 | |
36081 | src = DREGu32((Opcode >> 9) & 7); |
36082 | adr = AREG(7) - 4; |
36083 | AREG(7) = adr; |
36084 | PRE_IO |
36085 | READ_LONG_F(adr, dst) |
36086 | res = dst + src; |
36087 | flag_NotZ = res; |
36088 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36089 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36090 | flag_N = res >> 24; |
36091 | WRITE_LONG_F(adr, res) |
36092 | POST_IO |
36093 | RET(22) |
36094 | } |
36095 | |
36096 | // ADDX |
36097 | OPCODE(0xD100) |
36098 | { |
36099 | u32 adr, res; |
36100 | u32 src, dst; |
36101 | |
36102 | src = DREGu8((Opcode >> 0) & 7); |
36103 | dst = DREGu8((Opcode >> 9) & 7); |
36104 | res = dst + src + ((flag_X >> 8) & 1); |
36105 | flag_N = flag_X = flag_C = res; |
36106 | flag_V = (src ^ res) & (dst ^ res); |
36107 | flag_NotZ |= res & 0xFF; |
36108 | DREGu8((Opcode >> 9) & 7) = res; |
36109 | RET(4) |
36110 | } |
36111 | |
36112 | // ADDX |
36113 | OPCODE(0xD140) |
36114 | { |
36115 | u32 adr, res; |
36116 | u32 src, dst; |
36117 | |
36118 | src = DREGu16((Opcode >> 0) & 7); |
36119 | dst = DREGu16((Opcode >> 9) & 7); |
36120 | res = dst + src + ((flag_X >> 8) & 1); |
36121 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36122 | flag_N = flag_X = flag_C = res >> 8; |
36123 | flag_NotZ |= res & 0xFFFF; |
36124 | DREGu16((Opcode >> 9) & 7) = res; |
36125 | RET(4) |
36126 | } |
36127 | |
36128 | // ADDX |
36129 | OPCODE(0xD180) |
36130 | { |
36131 | u32 adr, res; |
36132 | u32 src, dst; |
36133 | |
36134 | src = DREGu32((Opcode >> 0) & 7); |
36135 | dst = DREGu32((Opcode >> 9) & 7); |
36136 | res = dst + src + ((flag_X >> 8) & 1); |
36137 | flag_NotZ |= res; |
36138 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36139 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36140 | flag_N = res >> 24; |
36141 | DREGu32((Opcode >> 9) & 7) = res; |
36142 | RET(8) |
36143 | } |
36144 | |
36145 | // ADDXM |
36146 | OPCODE(0xD108) |
36147 | { |
36148 | u32 adr, res; |
36149 | u32 src, dst; |
36150 | |
36151 | adr = AREG((Opcode >> 0) & 7) - 1; |
36152 | AREG((Opcode >> 0) & 7) = adr; |
36153 | PRE_IO |
36154 | READ_BYTE_F(adr, src) |
36155 | adr = AREG((Opcode >> 9) & 7) - 1; |
36156 | AREG((Opcode >> 9) & 7) = adr; |
36157 | READ_BYTE_F(adr, dst) |
36158 | res = dst + src + ((flag_X >> 8) & 1); |
36159 | flag_N = flag_X = flag_C = res; |
36160 | flag_V = (src ^ res) & (dst ^ res); |
36161 | flag_NotZ |= res & 0xFF; |
36162 | WRITE_BYTE_F(adr, res) |
36163 | POST_IO |
36164 | RET(18) |
36165 | } |
36166 | |
36167 | // ADDXM |
36168 | OPCODE(0xD148) |
36169 | { |
36170 | u32 adr, res; |
36171 | u32 src, dst; |
36172 | |
36173 | adr = AREG((Opcode >> 0) & 7) - 2; |
36174 | AREG((Opcode >> 0) & 7) = adr; |
36175 | PRE_IO |
36176 | READ_WORD_F(adr, src) |
36177 | adr = AREG((Opcode >> 9) & 7) - 2; |
36178 | AREG((Opcode >> 9) & 7) = adr; |
36179 | READ_WORD_F(adr, dst) |
36180 | res = dst + src + ((flag_X >> 8) & 1); |
36181 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36182 | flag_N = flag_X = flag_C = res >> 8; |
36183 | flag_NotZ |= res & 0xFFFF; |
36184 | WRITE_WORD_F(adr, res) |
36185 | POST_IO |
36186 | RET(18) |
36187 | } |
36188 | |
36189 | // ADDXM |
36190 | OPCODE(0xD188) |
36191 | { |
36192 | u32 adr, res; |
36193 | u32 src, dst; |
36194 | |
36195 | adr = AREG((Opcode >> 0) & 7) - 4; |
36196 | AREG((Opcode >> 0) & 7) = adr; |
36197 | PRE_IO |
36198 | READ_LONG_F(adr, src) |
36199 | adr = AREG((Opcode >> 9) & 7) - 4; |
36200 | AREG((Opcode >> 9) & 7) = adr; |
36201 | READ_LONG_F(adr, dst) |
36202 | res = dst + src + ((flag_X >> 8) & 1); |
36203 | flag_NotZ |= res; |
36204 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36205 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36206 | flag_N = res >> 24; |
36207 | WRITE_LONG_F(adr, res) |
36208 | POST_IO |
36209 | RET(30) |
36210 | } |
36211 | |
36212 | // ADDX7M |
36213 | OPCODE(0xD10F) |
36214 | { |
36215 | u32 adr, res; |
36216 | u32 src, dst; |
36217 | |
36218 | adr = AREG(7) - 2; |
36219 | AREG(7) = adr; |
36220 | PRE_IO |
36221 | READ_BYTE_F(adr, src) |
36222 | adr = AREG((Opcode >> 9) & 7) - 1; |
36223 | AREG((Opcode >> 9) & 7) = adr; |
36224 | READ_BYTE_F(adr, dst) |
36225 | res = dst + src + ((flag_X >> 8) & 1); |
36226 | flag_N = flag_X = flag_C = res; |
36227 | flag_V = (src ^ res) & (dst ^ res); |
36228 | flag_NotZ |= res & 0xFF; |
36229 | WRITE_BYTE_F(adr, res) |
36230 | POST_IO |
36231 | RET(18) |
36232 | } |
36233 | |
36234 | // ADDX7M |
36235 | OPCODE(0xD14F) |
36236 | { |
36237 | u32 adr, res; |
36238 | u32 src, dst; |
36239 | |
36240 | adr = AREG(7) - 2; |
36241 | AREG(7) = adr; |
36242 | PRE_IO |
36243 | READ_WORD_F(adr, src) |
36244 | adr = AREG((Opcode >> 9) & 7) - 2; |
36245 | AREG((Opcode >> 9) & 7) = adr; |
36246 | READ_WORD_F(adr, dst) |
36247 | res = dst + src + ((flag_X >> 8) & 1); |
36248 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36249 | flag_N = flag_X = flag_C = res >> 8; |
36250 | flag_NotZ |= res & 0xFFFF; |
36251 | WRITE_WORD_F(adr, res) |
36252 | POST_IO |
36253 | RET(18) |
36254 | } |
36255 | |
36256 | // ADDX7M |
36257 | OPCODE(0xD18F) |
36258 | { |
36259 | u32 adr, res; |
36260 | u32 src, dst; |
36261 | |
36262 | adr = AREG(7) - 4; |
36263 | AREG(7) = adr; |
36264 | PRE_IO |
36265 | READ_LONG_F(adr, src) |
36266 | adr = AREG((Opcode >> 9) & 7) - 4; |
36267 | AREG((Opcode >> 9) & 7) = adr; |
36268 | READ_LONG_F(adr, dst) |
36269 | res = dst + src + ((flag_X >> 8) & 1); |
36270 | flag_NotZ |= res; |
36271 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36272 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36273 | flag_N = res >> 24; |
36274 | WRITE_LONG_F(adr, res) |
36275 | POST_IO |
36276 | RET(30) |
36277 | } |
36278 | |
36279 | // ADDXM7 |
36280 | OPCODE(0xDF08) |
36281 | { |
36282 | u32 adr, res; |
36283 | u32 src, dst; |
36284 | |
36285 | adr = AREG((Opcode >> 0) & 7) - 1; |
36286 | AREG((Opcode >> 0) & 7) = adr; |
36287 | PRE_IO |
36288 | READ_BYTE_F(adr, src) |
36289 | adr = AREG(7) - 2; |
36290 | AREG(7) = adr; |
36291 | READ_BYTE_F(adr, dst) |
36292 | res = dst + src + ((flag_X >> 8) & 1); |
36293 | flag_N = flag_X = flag_C = res; |
36294 | flag_V = (src ^ res) & (dst ^ res); |
36295 | flag_NotZ |= res & 0xFF; |
36296 | WRITE_BYTE_F(adr, res) |
36297 | POST_IO |
36298 | RET(18) |
36299 | } |
36300 | |
36301 | // ADDXM7 |
36302 | OPCODE(0xDF48) |
36303 | { |
36304 | u32 adr, res; |
36305 | u32 src, dst; |
36306 | |
36307 | adr = AREG((Opcode >> 0) & 7) - 2; |
36308 | AREG((Opcode >> 0) & 7) = adr; |
36309 | PRE_IO |
36310 | READ_WORD_F(adr, src) |
36311 | adr = AREG(7) - 2; |
36312 | AREG(7) = adr; |
36313 | READ_WORD_F(adr, dst) |
36314 | res = dst + src + ((flag_X >> 8) & 1); |
36315 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36316 | flag_N = flag_X = flag_C = res >> 8; |
36317 | flag_NotZ |= res & 0xFFFF; |
36318 | WRITE_WORD_F(adr, res) |
36319 | POST_IO |
36320 | RET(18) |
36321 | } |
36322 | |
36323 | // ADDXM7 |
36324 | OPCODE(0xDF88) |
36325 | { |
36326 | u32 adr, res; |
36327 | u32 src, dst; |
36328 | |
36329 | adr = AREG((Opcode >> 0) & 7) - 4; |
36330 | AREG((Opcode >> 0) & 7) = adr; |
36331 | PRE_IO |
36332 | READ_LONG_F(adr, src) |
36333 | adr = AREG(7) - 4; |
36334 | AREG(7) = adr; |
36335 | READ_LONG_F(adr, dst) |
36336 | res = dst + src + ((flag_X >> 8) & 1); |
36337 | flag_NotZ |= res; |
36338 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36339 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36340 | flag_N = res >> 24; |
36341 | WRITE_LONG_F(adr, res) |
36342 | POST_IO |
36343 | RET(30) |
36344 | } |
36345 | |
36346 | // ADDX7M7 |
36347 | OPCODE(0xDF0F) |
36348 | { |
36349 | u32 adr, res; |
36350 | u32 src, dst; |
36351 | |
36352 | adr = AREG(7) - 2; |
36353 | AREG(7) = adr; |
36354 | PRE_IO |
36355 | READ_BYTE_F(adr, src) |
36356 | adr = AREG(7) - 2; |
36357 | AREG(7) = adr; |
36358 | READ_BYTE_F(adr, dst) |
36359 | res = dst + src + ((flag_X >> 8) & 1); |
36360 | flag_N = flag_X = flag_C = res; |
36361 | flag_V = (src ^ res) & (dst ^ res); |
36362 | flag_NotZ |= res & 0xFF; |
36363 | WRITE_BYTE_F(adr, res) |
36364 | POST_IO |
36365 | RET(18) |
36366 | } |
36367 | |
36368 | // ADDX7M7 |
36369 | OPCODE(0xDF4F) |
36370 | { |
36371 | u32 adr, res; |
36372 | u32 src, dst; |
36373 | |
36374 | adr = AREG(7) - 2; |
36375 | AREG(7) = adr; |
36376 | PRE_IO |
36377 | READ_WORD_F(adr, src) |
36378 | adr = AREG(7) - 2; |
36379 | AREG(7) = adr; |
36380 | READ_WORD_F(adr, dst) |
36381 | res = dst + src + ((flag_X >> 8) & 1); |
36382 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36383 | flag_N = flag_X = flag_C = res >> 8; |
36384 | flag_NotZ |= res & 0xFFFF; |
36385 | WRITE_WORD_F(adr, res) |
36386 | POST_IO |
36387 | RET(18) |
36388 | } |
36389 | |
36390 | // ADDX7M7 |
36391 | OPCODE(0xDF8F) |
36392 | { |
36393 | u32 adr, res; |
36394 | u32 src, dst; |
36395 | |
36396 | adr = AREG(7) - 4; |
36397 | AREG(7) = adr; |
36398 | PRE_IO |
36399 | READ_LONG_F(adr, src) |
36400 | adr = AREG(7) - 4; |
36401 | AREG(7) = adr; |
36402 | READ_LONG_F(adr, dst) |
36403 | res = dst + src + ((flag_X >> 8) & 1); |
36404 | flag_NotZ |= res; |
36405 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36406 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36407 | flag_N = res >> 24; |
36408 | WRITE_LONG_F(adr, res) |
36409 | POST_IO |
36410 | RET(30) |
36411 | } |
36412 | |
36413 | // ADDA |
36414 | OPCODE(0xD0C0) |
36415 | { |
36416 | u32 adr, res; |
36417 | u32 src, dst; |
36418 | |
36419 | src = (s32)DREGs16((Opcode >> 0) & 7); |
36420 | dst = AREGu32((Opcode >> 9) & 7); |
36421 | res = dst + src; |
36422 | AREG((Opcode >> 9) & 7) = res; |
36423 | RET(8) |
36424 | } |
36425 | |
36426 | // ADDA |
36427 | OPCODE(0xD0C8) |
36428 | { |
36429 | u32 adr, res; |
36430 | u32 src, dst; |
36431 | |
36432 | src = (s32)AREGs16((Opcode >> 0) & 7); |
36433 | dst = AREGu32((Opcode >> 9) & 7); |
36434 | res = dst + src; |
36435 | AREG((Opcode >> 9) & 7) = res; |
36436 | RET(8) |
36437 | } |
36438 | |
36439 | // ADDA |
36440 | OPCODE(0xD0D0) |
36441 | { |
36442 | u32 adr, res; |
36443 | u32 src, dst; |
36444 | |
36445 | adr = AREG((Opcode >> 0) & 7); |
36446 | PRE_IO |
36447 | READSX_WORD_F(adr, src) |
36448 | dst = AREGu32((Opcode >> 9) & 7); |
36449 | res = dst + src; |
36450 | AREG((Opcode >> 9) & 7) = res; |
36451 | POST_IO |
36452 | RET(10) |
36453 | } |
36454 | |
36455 | // ADDA |
36456 | OPCODE(0xD0D8) |
36457 | { |
36458 | u32 adr, res; |
36459 | u32 src, dst; |
36460 | |
36461 | adr = AREG((Opcode >> 0) & 7); |
36462 | AREG((Opcode >> 0) & 7) += 2; |
36463 | PRE_IO |
36464 | READSX_WORD_F(adr, src) |
36465 | dst = AREGu32((Opcode >> 9) & 7); |
36466 | res = dst + src; |
36467 | AREG((Opcode >> 9) & 7) = res; |
36468 | POST_IO |
36469 | RET(10) |
36470 | } |
36471 | |
36472 | // ADDA |
36473 | OPCODE(0xD0E0) |
36474 | { |
36475 | u32 adr, res; |
36476 | u32 src, dst; |
36477 | |
36478 | adr = AREG((Opcode >> 0) & 7) - 2; |
36479 | AREG((Opcode >> 0) & 7) = adr; |
36480 | PRE_IO |
36481 | READSX_WORD_F(adr, src) |
36482 | dst = AREGu32((Opcode >> 9) & 7); |
36483 | res = dst + src; |
36484 | AREG((Opcode >> 9) & 7) = res; |
36485 | POST_IO |
36486 | RET(12) |
36487 | } |
36488 | |
36489 | // ADDA |
36490 | OPCODE(0xD0E8) |
36491 | { |
36492 | u32 adr, res; |
36493 | u32 src, dst; |
36494 | |
36495 | FETCH_SWORD(adr); |
36496 | adr += AREG((Opcode >> 0) & 7); |
36497 | PRE_IO |
36498 | READSX_WORD_F(adr, src) |
36499 | dst = AREGu32((Opcode >> 9) & 7); |
36500 | res = dst + src; |
36501 | AREG((Opcode >> 9) & 7) = res; |
36502 | POST_IO |
36503 | RET(14) |
36504 | } |
36505 | |
36506 | // ADDA |
36507 | OPCODE(0xD0F0) |
36508 | { |
36509 | u32 adr, res; |
36510 | u32 src, dst; |
36511 | |
36512 | adr = AREG((Opcode >> 0) & 7); |
36513 | DECODE_EXT_WORD |
36514 | PRE_IO |
36515 | READSX_WORD_F(adr, src) |
36516 | dst = AREGu32((Opcode >> 9) & 7); |
36517 | res = dst + src; |
36518 | AREG((Opcode >> 9) & 7) = res; |
36519 | POST_IO |
36520 | RET(16) |
36521 | } |
36522 | |
36523 | // ADDA |
36524 | OPCODE(0xD0F8) |
36525 | { |
36526 | u32 adr, res; |
36527 | u32 src, dst; |
36528 | |
36529 | FETCH_SWORD(adr); |
36530 | PRE_IO |
36531 | READSX_WORD_F(adr, src) |
36532 | dst = AREGu32((Opcode >> 9) & 7); |
36533 | res = dst + src; |
36534 | AREG((Opcode >> 9) & 7) = res; |
36535 | POST_IO |
36536 | RET(14) |
36537 | } |
36538 | |
36539 | // ADDA |
36540 | OPCODE(0xD0F9) |
36541 | { |
36542 | u32 adr, res; |
36543 | u32 src, dst; |
36544 | |
36545 | FETCH_LONG(adr); |
36546 | PRE_IO |
36547 | READSX_WORD_F(adr, src) |
36548 | dst = AREGu32((Opcode >> 9) & 7); |
36549 | res = dst + src; |
36550 | AREG((Opcode >> 9) & 7) = res; |
36551 | POST_IO |
36552 | RET(18) |
36553 | } |
36554 | |
36555 | // ADDA |
36556 | OPCODE(0xD0FA) |
36557 | { |
36558 | u32 adr, res; |
36559 | u32 src, dst; |
36560 | |
36561 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
36562 | PC++; |
36563 | PRE_IO |
36564 | READSX_WORD_F(adr, src) |
36565 | dst = AREGu32((Opcode >> 9) & 7); |
36566 | res = dst + src; |
36567 | AREG((Opcode >> 9) & 7) = res; |
36568 | POST_IO |
36569 | RET(14) |
36570 | } |
36571 | |
36572 | // ADDA |
36573 | OPCODE(0xD0FB) |
36574 | { |
36575 | u32 adr, res; |
36576 | u32 src, dst; |
36577 | |
36578 | adr = (u32)(PC) - BasePC; |
36579 | DECODE_EXT_WORD |
36580 | PRE_IO |
36581 | READSX_WORD_F(adr, src) |
36582 | dst = AREGu32((Opcode >> 9) & 7); |
36583 | res = dst + src; |
36584 | AREG((Opcode >> 9) & 7) = res; |
36585 | POST_IO |
36586 | RET(16) |
36587 | } |
36588 | |
36589 | // ADDA |
36590 | OPCODE(0xD0FC) |
36591 | { |
36592 | u32 adr, res; |
36593 | u32 src, dst; |
36594 | |
36595 | FETCH_SWORD(src); |
36596 | dst = AREGu32((Opcode >> 9) & 7); |
36597 | res = dst + src; |
36598 | AREG((Opcode >> 9) & 7) = res; |
36599 | RET(12) |
36600 | } |
36601 | |
36602 | // ADDA |
36603 | OPCODE(0xD0DF) |
36604 | { |
36605 | u32 adr, res; |
36606 | u32 src, dst; |
36607 | |
36608 | adr = AREG(7); |
36609 | AREG(7) += 2; |
36610 | PRE_IO |
36611 | READSX_WORD_F(adr, src) |
36612 | dst = AREGu32((Opcode >> 9) & 7); |
36613 | res = dst + src; |
36614 | AREG((Opcode >> 9) & 7) = res; |
36615 | POST_IO |
36616 | RET(10) |
36617 | } |
36618 | |
36619 | // ADDA |
36620 | OPCODE(0xD0E7) |
36621 | { |
36622 | u32 adr, res; |
36623 | u32 src, dst; |
36624 | |
36625 | adr = AREG(7) - 2; |
36626 | AREG(7) = adr; |
36627 | PRE_IO |
36628 | READSX_WORD_F(adr, src) |
36629 | dst = AREGu32((Opcode >> 9) & 7); |
36630 | res = dst + src; |
36631 | AREG((Opcode >> 9) & 7) = res; |
36632 | POST_IO |
36633 | RET(12) |
36634 | } |
36635 | |
36636 | // ADDA |
36637 | OPCODE(0xD1C0) |
36638 | { |
36639 | u32 adr, res; |
36640 | u32 src, dst; |
36641 | |
36642 | src = (s32)DREGs32((Opcode >> 0) & 7); |
36643 | dst = AREGu32((Opcode >> 9) & 7); |
36644 | res = dst + src; |
36645 | AREG((Opcode >> 9) & 7) = res; |
36646 | #ifdef USE_CYCLONE_TIMING |
36647 | RET(8) |
36648 | #else |
36649 | RET(6) |
36650 | #endif |
36651 | } |
36652 | |
36653 | // ADDA |
36654 | OPCODE(0xD1C8) |
36655 | { |
36656 | u32 adr, res; |
36657 | u32 src, dst; |
36658 | |
36659 | src = (s32)AREGs32((Opcode >> 0) & 7); |
36660 | dst = AREGu32((Opcode >> 9) & 7); |
36661 | res = dst + src; |
36662 | AREG((Opcode >> 9) & 7) = res; |
36663 | #ifdef USE_CYCLONE_TIMING |
36664 | RET(8) |
36665 | #else |
36666 | RET(6) |
36667 | #endif |
36668 | } |
36669 | |
36670 | // ADDA |
36671 | OPCODE(0xD1D0) |
36672 | { |
36673 | u32 adr, res; |
36674 | u32 src, dst; |
36675 | |
36676 | adr = AREG((Opcode >> 0) & 7); |
36677 | PRE_IO |
36678 | READSX_LONG_F(adr, src) |
36679 | dst = AREGu32((Opcode >> 9) & 7); |
36680 | res = dst + src; |
36681 | AREG((Opcode >> 9) & 7) = res; |
36682 | POST_IO |
36683 | RET(14) |
36684 | } |
36685 | |
36686 | // ADDA |
36687 | OPCODE(0xD1D8) |
36688 | { |
36689 | u32 adr, res; |
36690 | u32 src, dst; |
36691 | |
36692 | adr = AREG((Opcode >> 0) & 7); |
36693 | AREG((Opcode >> 0) & 7) += 4; |
36694 | PRE_IO |
36695 | READSX_LONG_F(adr, src) |
36696 | dst = AREGu32((Opcode >> 9) & 7); |
36697 | res = dst + src; |
36698 | AREG((Opcode >> 9) & 7) = res; |
36699 | POST_IO |
36700 | RET(14) |
36701 | } |
36702 | |
36703 | // ADDA |
36704 | OPCODE(0xD1E0) |
36705 | { |
36706 | u32 adr, res; |
36707 | u32 src, dst; |
36708 | |
36709 | adr = AREG((Opcode >> 0) & 7) - 4; |
36710 | AREG((Opcode >> 0) & 7) = adr; |
36711 | PRE_IO |
36712 | READSX_LONG_F(adr, src) |
36713 | dst = AREGu32((Opcode >> 9) & 7); |
36714 | res = dst + src; |
36715 | AREG((Opcode >> 9) & 7) = res; |
36716 | POST_IO |
36717 | RET(16) |
36718 | } |
36719 | |
36720 | // ADDA |
36721 | OPCODE(0xD1E8) |
36722 | { |
36723 | u32 adr, res; |
36724 | u32 src, dst; |
36725 | |
36726 | FETCH_SWORD(adr); |
36727 | adr += AREG((Opcode >> 0) & 7); |
36728 | PRE_IO |
36729 | READSX_LONG_F(adr, src) |
36730 | dst = AREGu32((Opcode >> 9) & 7); |
36731 | res = dst + src; |
36732 | AREG((Opcode >> 9) & 7) = res; |
36733 | POST_IO |
36734 | RET(18) |
36735 | } |
36736 | |
36737 | // ADDA |
36738 | OPCODE(0xD1F0) |
36739 | { |
36740 | u32 adr, res; |
36741 | u32 src, dst; |
36742 | |
36743 | adr = AREG((Opcode >> 0) & 7); |
36744 | DECODE_EXT_WORD |
36745 | PRE_IO |
36746 | READSX_LONG_F(adr, src) |
36747 | dst = AREGu32((Opcode >> 9) & 7); |
36748 | res = dst + src; |
36749 | AREG((Opcode >> 9) & 7) = res; |
36750 | POST_IO |
36751 | RET(20) |
36752 | } |
36753 | |
36754 | // ADDA |
36755 | OPCODE(0xD1F8) |
36756 | { |
36757 | u32 adr, res; |
36758 | u32 src, dst; |
36759 | |
36760 | FETCH_SWORD(adr); |
36761 | PRE_IO |
36762 | READSX_LONG_F(adr, src) |
36763 | dst = AREGu32((Opcode >> 9) & 7); |
36764 | res = dst + src; |
36765 | AREG((Opcode >> 9) & 7) = res; |
36766 | POST_IO |
36767 | RET(18) |
36768 | } |
36769 | |
36770 | // ADDA |
36771 | OPCODE(0xD1F9) |
36772 | { |
36773 | u32 adr, res; |
36774 | u32 src, dst; |
36775 | |
36776 | FETCH_LONG(adr); |
36777 | PRE_IO |
36778 | READSX_LONG_F(adr, src) |
36779 | dst = AREGu32((Opcode >> 9) & 7); |
36780 | res = dst + src; |
36781 | AREG((Opcode >> 9) & 7) = res; |
36782 | POST_IO |
36783 | RET(22) |
36784 | } |
36785 | |
36786 | // ADDA |
36787 | OPCODE(0xD1FA) |
36788 | { |
36789 | u32 adr, res; |
36790 | u32 src, dst; |
36791 | |
36792 | adr = GET_SWORD + ((u32)(PC) - BasePC); |
36793 | PC++; |
36794 | PRE_IO |
36795 | READSX_LONG_F(adr, src) |
36796 | dst = AREGu32((Opcode >> 9) & 7); |
36797 | res = dst + src; |
36798 | AREG((Opcode >> 9) & 7) = res; |
36799 | POST_IO |
36800 | RET(18) |
36801 | } |
36802 | |
36803 | // ADDA |
36804 | OPCODE(0xD1FB) |
36805 | { |
36806 | u32 adr, res; |
36807 | u32 src, dst; |
36808 | |
36809 | adr = (u32)(PC) - BasePC; |
36810 | DECODE_EXT_WORD |
36811 | PRE_IO |
36812 | READSX_LONG_F(adr, src) |
36813 | dst = AREGu32((Opcode >> 9) & 7); |
36814 | res = dst + src; |
36815 | AREG((Opcode >> 9) & 7) = res; |
36816 | POST_IO |
36817 | RET(20) |
36818 | } |
36819 | |
36820 | // ADDA |
36821 | OPCODE(0xD1FC) |
36822 | { |
36823 | u32 adr, res; |
36824 | u32 src, dst; |
36825 | |
36826 | FETCH_LONG(src); |
36827 | dst = AREGu32((Opcode >> 9) & 7); |
36828 | res = dst + src; |
36829 | AREG((Opcode >> 9) & 7) = res; |
36830 | #ifdef USE_CYCLONE_TIMING |
36831 | RET(16) |
36832 | #else |
36833 | RET(14) |
36834 | #endif |
36835 | } |
36836 | |
36837 | // ADDA |
36838 | OPCODE(0xD1DF) |
36839 | { |
36840 | u32 adr, res; |
36841 | u32 src, dst; |
36842 | |
36843 | adr = AREG(7); |
36844 | AREG(7) += 4; |
36845 | PRE_IO |
36846 | READSX_LONG_F(adr, src) |
36847 | dst = AREGu32((Opcode >> 9) & 7); |
36848 | res = dst + src; |
36849 | AREG((Opcode >> 9) & 7) = res; |
36850 | POST_IO |
36851 | RET(14) |
36852 | } |
36853 | |
36854 | // ADDA |
36855 | OPCODE(0xD1E7) |
36856 | { |
36857 | u32 adr, res; |
36858 | u32 src, dst; |
36859 | |
36860 | adr = AREG(7) - 4; |
36861 | AREG(7) = adr; |
36862 | PRE_IO |
36863 | READSX_LONG_F(adr, src) |
36864 | dst = AREGu32((Opcode >> 9) & 7); |
36865 | res = dst + src; |
36866 | AREG((Opcode >> 9) & 7) = res; |
36867 | POST_IO |
36868 | RET(16) |
36869 | } |
36870 | |
36871 | // ASRk |
36872 | OPCODE(0xE000) |
36873 | { |
36874 | u32 adr, res; |
36875 | u32 src, dst; |
36876 | |
36877 | u32 sft; |
36878 | |
36879 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36880 | m68kcontext.io_cycle_counter -= sft * 2; |
36881 | src = (s32)DREGs8((Opcode >> 0) & 7); |
36882 | flag_V = 0; |
36883 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36884 | res = ((s32)src) >> sft; |
36885 | flag_N = res >> 0; |
36886 | flag_NotZ = res; |
36887 | DREGu8((Opcode >> 0) & 7) = res; |
36888 | RET(6) |
36889 | } |
36890 | |
36891 | // ASRk |
36892 | OPCODE(0xE040) |
36893 | { |
36894 | u32 adr, res; |
36895 | u32 src, dst; |
36896 | |
36897 | u32 sft; |
36898 | |
36899 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36900 | m68kcontext.io_cycle_counter -= sft * 2; |
36901 | src = (s32)DREGs16((Opcode >> 0) & 7); |
36902 | flag_V = 0; |
36903 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36904 | res = ((s32)src) >> sft; |
36905 | flag_N = res >> 8; |
36906 | flag_NotZ = res; |
36907 | DREGu16((Opcode >> 0) & 7) = res; |
36908 | RET(6) |
36909 | } |
36910 | |
36911 | // ASRk |
36912 | OPCODE(0xE080) |
36913 | { |
36914 | u32 adr, res; |
36915 | u32 src, dst; |
36916 | |
36917 | u32 sft; |
36918 | |
36919 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36920 | m68kcontext.io_cycle_counter -= sft * 2; |
36921 | src = (s32)DREGs32((Opcode >> 0) & 7); |
36922 | flag_V = 0; |
36923 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36924 | res = ((s32)src) >> sft; |
36925 | flag_N = res >> 24; |
36926 | flag_NotZ = res; |
36927 | DREGu32((Opcode >> 0) & 7) = res; |
36928 | RET(8) |
36929 | } |
36930 | |
36931 | // LSRk |
36932 | OPCODE(0xE008) |
36933 | { |
36934 | u32 adr, res; |
36935 | u32 src, dst; |
36936 | |
36937 | u32 sft; |
36938 | |
36939 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36940 | m68kcontext.io_cycle_counter -= sft * 2; |
36941 | src = DREGu8((Opcode >> 0) & 7); |
36942 | flag_N = flag_V = 0; |
36943 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36944 | res = src >> sft; |
36945 | flag_NotZ = res; |
36946 | DREGu8((Opcode >> 0) & 7) = res; |
36947 | RET(6) |
36948 | } |
36949 | |
36950 | // LSRk |
36951 | OPCODE(0xE048) |
36952 | { |
36953 | u32 adr, res; |
36954 | u32 src, dst; |
36955 | |
36956 | u32 sft; |
36957 | |
36958 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36959 | m68kcontext.io_cycle_counter -= sft * 2; |
36960 | src = DREGu16((Opcode >> 0) & 7); |
36961 | flag_N = flag_V = 0; |
36962 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36963 | res = src >> sft; |
36964 | flag_NotZ = res; |
36965 | DREGu16((Opcode >> 0) & 7) = res; |
36966 | RET(6) |
36967 | } |
36968 | |
36969 | // LSRk |
36970 | OPCODE(0xE088) |
36971 | { |
36972 | u32 adr, res; |
36973 | u32 src, dst; |
36974 | |
36975 | u32 sft; |
36976 | |
36977 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36978 | m68kcontext.io_cycle_counter -= sft * 2; |
36979 | src = DREGu32((Opcode >> 0) & 7); |
36980 | flag_N = flag_V = 0; |
36981 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
36982 | res = src >> sft; |
36983 | flag_NotZ = res; |
36984 | DREGu32((Opcode >> 0) & 7) = res; |
36985 | RET(8) |
36986 | } |
36987 | |
36988 | // ROXRk |
36989 | OPCODE(0xE010) |
36990 | { |
36991 | u32 adr, res; |
36992 | u32 src, dst; |
36993 | |
36994 | u32 sft; |
36995 | |
36996 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
36997 | m68kcontext.io_cycle_counter -= sft * 2; |
36998 | src = DREGu8((Opcode >> 0) & 7); |
36999 | src |= (flag_X & M68K_SR_X) << 0; |
37000 | res = (src >> sft) | (src << (9 - sft)); |
37001 | flag_X = flag_C = res >> 0; |
37002 | flag_V = 0; |
37003 | flag_N = res >> 0; |
37004 | flag_NotZ = res & 0x000000FF; |
37005 | DREGu8((Opcode >> 0) & 7) = res; |
37006 | RET(6) |
37007 | } |
37008 | |
37009 | // ROXRk |
37010 | OPCODE(0xE050) |
37011 | { |
37012 | u32 adr, res; |
37013 | u32 src, dst; |
37014 | |
37015 | u32 sft; |
37016 | |
37017 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37018 | m68kcontext.io_cycle_counter -= sft * 2; |
37019 | src = DREGu16((Opcode >> 0) & 7); |
37020 | src |= (flag_X & M68K_SR_X) << 8; |
37021 | res = (src >> sft) | (src << (17 - sft)); |
37022 | flag_X = flag_C = res >> 8; |
37023 | flag_V = 0; |
37024 | flag_N = res >> 8; |
37025 | flag_NotZ = res & 0x0000FFFF; |
37026 | DREGu16((Opcode >> 0) & 7) = res; |
37027 | RET(6) |
37028 | } |
37029 | |
37030 | // ROXRk |
37031 | OPCODE(0xE090) |
37032 | { |
37033 | u32 adr, res; |
37034 | u32 src, dst; |
37035 | |
37036 | u32 sft; |
37037 | |
37038 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37039 | m68kcontext.io_cycle_counter -= sft * 2; |
37040 | src = DREGu32((Opcode >> 0) & 7); |
37041 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37042 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37043 | else res = (src >> sft) | (src << (33 - sft)) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + sft))); |
37044 | flag_X = flag_C; |
37045 | flag_V = 0; |
37046 | flag_N = res >> 24; |
37047 | flag_NotZ = res; |
37048 | DREGu32((Opcode >> 0) & 7) = res; |
37049 | RET(8) |
37050 | } |
37051 | |
37052 | // RORk |
37053 | OPCODE(0xE018) |
37054 | { |
37055 | u32 adr, res; |
37056 | u32 src, dst; |
37057 | |
37058 | u32 sft; |
37059 | |
37060 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37061 | m68kcontext.io_cycle_counter -= sft * 2; |
37062 | src = DREGu8((Opcode >> 0) & 7); |
37063 | flag_V = 0; |
37064 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37065 | res = (src >> sft) | (src << (8 - sft)); |
37066 | flag_N = res >> 0; |
37067 | flag_NotZ = res & 0x000000FF; |
37068 | DREGu8((Opcode >> 0) & 7) = res; |
37069 | RET(6) |
37070 | } |
37071 | |
37072 | // RORk |
37073 | OPCODE(0xE058) |
37074 | { |
37075 | u32 adr, res; |
37076 | u32 src, dst; |
37077 | |
37078 | u32 sft; |
37079 | |
37080 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37081 | m68kcontext.io_cycle_counter -= sft * 2; |
37082 | src = DREGu16((Opcode >> 0) & 7); |
37083 | flag_V = 0; |
37084 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37085 | res = (src >> sft) | (src << (16 - sft)); |
37086 | flag_N = res >> 8; |
37087 | flag_NotZ = res & 0x0000FFFF; |
37088 | DREGu16((Opcode >> 0) & 7) = res; |
37089 | RET(6) |
37090 | } |
37091 | |
37092 | // RORk |
37093 | OPCODE(0xE098) |
37094 | { |
37095 | u32 adr, res; |
37096 | u32 src, dst; |
37097 | |
37098 | u32 sft; |
37099 | |
37100 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37101 | m68kcontext.io_cycle_counter -= sft * 2; |
37102 | src = DREGu32((Opcode >> 0) & 7); |
37103 | flag_V = 0; |
37104 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37105 | res = (src >> sft) | (src << (32 - sft)); |
37106 | flag_N = res >> 24; |
37107 | flag_NotZ = res; |
37108 | DREGu32((Opcode >> 0) & 7) = res; |
37109 | RET(8) |
37110 | } |
37111 | |
37112 | // ASLk |
37113 | OPCODE(0xE100) |
37114 | { |
37115 | u32 adr, res; |
37116 | u32 src, dst; |
37117 | |
37118 | u32 sft; |
37119 | |
37120 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37121 | m68kcontext.io_cycle_counter -= sft * 2; |
37122 | src = DREGu8((Opcode >> 0) & 7); |
37123 | if (sft < 8) |
37124 | { |
37125 | flag_X = flag_C = src << (0 + sft); |
37126 | res = src << sft; |
37127 | flag_N = res >> 0; |
37128 | flag_NotZ = res & 0x000000FF; |
37129 | DREGu8((Opcode >> 0) & 7) = res; |
37130 | flag_V = 0; |
37131 | if ((sft > 7) && (src)) flag_V = M68K_SR_V; |
37132 | else |
37133 | { |
37134 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
37135 | src &= msk; |
37136 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37137 | } |
37138 | RET(6) |
37139 | } |
37140 | |
37141 | if (src) flag_V = M68K_SR_V; |
37142 | else flag_V = 0; |
37143 | flag_X = flag_C = src << M68K_SR_C_SFT; |
37144 | res = 0; |
37145 | DREGu8((Opcode >> 0) & 7) = res; |
37146 | flag_N = 0; |
37147 | flag_NotZ = 0; |
37148 | RET(6) |
37149 | } |
37150 | |
37151 | // ASLk |
37152 | OPCODE(0xE140) |
37153 | { |
37154 | u32 adr, res; |
37155 | u32 src, dst; |
37156 | |
37157 | u32 sft; |
37158 | |
37159 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37160 | m68kcontext.io_cycle_counter -= sft * 2; |
37161 | src = DREGu16((Opcode >> 0) & 7); |
37162 | flag_X = flag_C = src >> (8 - sft); |
37163 | res = src << sft; |
37164 | flag_N = res >> 8; |
37165 | flag_NotZ = res & 0x0000FFFF; |
37166 | DREGu16((Opcode >> 0) & 7) = res; |
37167 | flag_V = 0; |
37168 | { |
37169 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
37170 | src &= msk; |
37171 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37172 | } |
37173 | RET(6) |
37174 | } |
37175 | |
37176 | // ASLk |
37177 | OPCODE(0xE180) |
37178 | { |
37179 | u32 adr, res; |
37180 | u32 src, dst; |
37181 | |
37182 | u32 sft; |
37183 | |
37184 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37185 | m68kcontext.io_cycle_counter -= sft * 2; |
37186 | src = DREGu32((Opcode >> 0) & 7); |
37187 | flag_X = flag_C = src >> (24 - sft); |
37188 | res = src << sft; |
37189 | flag_N = res >> 24; |
37190 | flag_NotZ = res & 0xFFFFFFFF; |
37191 | DREGu32((Opcode >> 0) & 7) = res; |
37192 | flag_V = 0; |
37193 | { |
37194 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
37195 | src &= msk; |
37196 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37197 | } |
37198 | RET(8) |
37199 | } |
37200 | |
37201 | // LSLk |
37202 | OPCODE(0xE108) |
37203 | { |
37204 | u32 adr, res; |
37205 | u32 src, dst; |
37206 | |
37207 | u32 sft; |
37208 | |
37209 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37210 | m68kcontext.io_cycle_counter -= sft * 2; |
37211 | src = DREGu8((Opcode >> 0) & 7); |
37212 | flag_V = 0; |
37213 | flag_X = flag_C = src << (0 + sft); |
37214 | res = src << sft; |
37215 | flag_N = res >> 0; |
37216 | flag_NotZ = res & 0x000000FF; |
37217 | DREGu8((Opcode >> 0) & 7) = res; |
37218 | RET(6) |
37219 | } |
37220 | |
37221 | // LSLk |
37222 | OPCODE(0xE148) |
37223 | { |
37224 | u32 adr, res; |
37225 | u32 src, dst; |
37226 | |
37227 | u32 sft; |
37228 | |
37229 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37230 | m68kcontext.io_cycle_counter -= sft * 2; |
37231 | src = DREGu16((Opcode >> 0) & 7); |
37232 | flag_V = 0; |
37233 | flag_X = flag_C = src >> (8 - sft); |
37234 | res = src << sft; |
37235 | flag_N = res >> 8; |
37236 | flag_NotZ = res & 0x0000FFFF; |
37237 | DREGu16((Opcode >> 0) & 7) = res; |
37238 | RET(6) |
37239 | } |
37240 | |
37241 | // LSLk |
37242 | OPCODE(0xE188) |
37243 | { |
37244 | u32 adr, res; |
37245 | u32 src, dst; |
37246 | |
37247 | u32 sft; |
37248 | |
37249 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37250 | m68kcontext.io_cycle_counter -= sft * 2; |
37251 | src = DREGu32((Opcode >> 0) & 7); |
37252 | flag_V = 0; |
37253 | flag_X = flag_C = src >> (24 - sft); |
37254 | res = src << sft; |
37255 | flag_N = res >> 24; |
37256 | flag_NotZ = res & 0xFFFFFFFF; |
37257 | DREGu32((Opcode >> 0) & 7) = res; |
37258 | RET(8) |
37259 | } |
37260 | |
37261 | // ROXLk |
37262 | OPCODE(0xE110) |
37263 | { |
37264 | u32 adr, res; |
37265 | u32 src, dst; |
37266 | |
37267 | u32 sft; |
37268 | |
37269 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37270 | m68kcontext.io_cycle_counter -= sft * 2; |
37271 | src = DREGu8((Opcode >> 0) & 7); |
37272 | src |= (flag_X & M68K_SR_X) << 0; |
37273 | res = (src << sft) | (src >> (9 - sft)); |
37274 | flag_X = flag_C = res >> 0; |
37275 | flag_V = 0; |
37276 | flag_N = res >> 0; |
37277 | flag_NotZ = res & 0x000000FF; |
37278 | DREGu8((Opcode >> 0) & 7) = res; |
37279 | RET(6) |
37280 | } |
37281 | |
37282 | // ROXLk |
37283 | OPCODE(0xE150) |
37284 | { |
37285 | u32 adr, res; |
37286 | u32 src, dst; |
37287 | |
37288 | u32 sft; |
37289 | |
37290 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37291 | m68kcontext.io_cycle_counter -= sft * 2; |
37292 | src = DREGu16((Opcode >> 0) & 7); |
37293 | src |= (flag_X & M68K_SR_X) << 8; |
37294 | res = (src << sft) | (src >> (17 - sft)); |
37295 | flag_X = flag_C = res >> 8; |
37296 | flag_V = 0; |
37297 | flag_N = res >> 8; |
37298 | flag_NotZ = res & 0x0000FFFF; |
37299 | DREGu16((Opcode >> 0) & 7) = res; |
37300 | RET(6) |
37301 | } |
37302 | |
37303 | // ROXLk |
37304 | OPCODE(0xE190) |
37305 | { |
37306 | u32 adr, res; |
37307 | u32 src, dst; |
37308 | |
37309 | u32 sft; |
37310 | |
37311 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37312 | m68kcontext.io_cycle_counter -= sft * 2; |
37313 | src = DREGu32((Opcode >> 0) & 7); |
37314 | flag_C = src >> ((32 - M68K_SR_C_SFT) - sft); |
37315 | if (sft == 1) res = (src << 1) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - 1)); |
37316 | else res = (src << sft) | (src >> (33 - sft)) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - sft)); |
37317 | flag_X = flag_C; |
37318 | flag_V = 0; |
37319 | flag_N = res >> 24; |
37320 | flag_NotZ = res; |
37321 | DREGu32((Opcode >> 0) & 7) = res; |
37322 | RET(8) |
37323 | } |
37324 | |
37325 | // ROLk |
37326 | OPCODE(0xE118) |
37327 | { |
37328 | u32 adr, res; |
37329 | u32 src, dst; |
37330 | |
37331 | u32 sft; |
37332 | |
37333 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37334 | m68kcontext.io_cycle_counter -= sft * 2; |
37335 | src = DREGu8((Opcode >> 0) & 7); |
37336 | flag_V = 0; |
37337 | flag_C = src << (0 + sft); |
37338 | res = (src << sft) | (src >> (8 - sft)); |
37339 | flag_N = res >> 0; |
37340 | flag_NotZ = res & 0x000000FF; |
37341 | DREGu8((Opcode >> 0) & 7) = res; |
37342 | RET(6) |
37343 | } |
37344 | |
37345 | // ROLk |
37346 | OPCODE(0xE158) |
37347 | { |
37348 | u32 adr, res; |
37349 | u32 src, dst; |
37350 | |
37351 | u32 sft; |
37352 | |
37353 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37354 | m68kcontext.io_cycle_counter -= sft * 2; |
37355 | src = DREGu16((Opcode >> 0) & 7); |
37356 | flag_V = 0; |
37357 | flag_C = src >> (8 - sft); |
37358 | res = (src << sft) | (src >> (16 - sft)); |
37359 | flag_N = res >> 8; |
37360 | flag_NotZ = res & 0x0000FFFF; |
37361 | DREGu16((Opcode >> 0) & 7) = res; |
37362 | RET(6) |
37363 | } |
37364 | |
37365 | // ROLk |
37366 | OPCODE(0xE198) |
37367 | { |
37368 | u32 adr, res; |
37369 | u32 src, dst; |
37370 | |
37371 | u32 sft; |
37372 | |
37373 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
37374 | m68kcontext.io_cycle_counter -= sft * 2; |
37375 | src = DREGu32((Opcode >> 0) & 7); |
37376 | flag_V = 0; |
37377 | flag_C = src >> (24 - sft); |
37378 | res = (src << sft) | (src >> (32 - sft)); |
37379 | flag_N = res >> 24; |
37380 | flag_NotZ = res; |
37381 | DREGu32((Opcode >> 0) & 7) = res; |
37382 | RET(8) |
37383 | } |
37384 | |
37385 | // ASRD |
37386 | OPCODE(0xE020) |
37387 | { |
37388 | u32 adr, res; |
37389 | u32 src, dst; |
37390 | |
37391 | u32 sft; |
37392 | |
37393 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37394 | src = (s32)DREGs8((Opcode >> 0) & 7); |
37395 | if (sft) |
37396 | { |
37397 | m68kcontext.io_cycle_counter -= sft * 2; |
37398 | if (sft < 8) |
37399 | { |
37400 | flag_V = 0; |
37401 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37402 | res = ((s32)src) >> sft; |
37403 | flag_N = res >> 0; |
37404 | flag_NotZ = res; |
37405 | DREGu8((Opcode >> 0) & 7) = res; |
37406 | RET(6) |
37407 | } |
37408 | |
37409 | if (src & (1 << 7)) |
37410 | { |
37411 | flag_N = M68K_SR_N; |
37412 | flag_NotZ = 1; |
37413 | flag_V = 0; |
37414 | flag_C = M68K_SR_C; |
37415 | flag_X = M68K_SR_X; |
37416 | res = 0x000000FF; |
37417 | DREGu8((Opcode >> 0) & 7) = res; |
37418 | RET(6) |
37419 | } |
37420 | |
37421 | flag_N = 0; |
37422 | flag_NotZ = 0; |
37423 | flag_V = 0; |
37424 | flag_C = 0; |
37425 | flag_X = 0; |
37426 | res = 0; |
37427 | DREGu8((Opcode >> 0) & 7) = res; |
37428 | RET(6) |
37429 | } |
37430 | |
37431 | flag_V = 0; |
37432 | flag_C = 0; |
37433 | flag_N = src >> 0; |
37434 | flag_NotZ = src; |
37435 | RET(6) |
37436 | } |
37437 | |
37438 | // ASRD |
37439 | OPCODE(0xE060) |
37440 | { |
37441 | u32 adr, res; |
37442 | u32 src, dst; |
37443 | |
37444 | u32 sft; |
37445 | |
37446 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37447 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37448 | if (sft) |
37449 | { |
37450 | m68kcontext.io_cycle_counter -= sft * 2; |
37451 | if (sft < 16) |
37452 | { |
37453 | flag_V = 0; |
37454 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37455 | res = ((s32)src) >> sft; |
37456 | flag_N = res >> 8; |
37457 | flag_NotZ = res; |
37458 | DREGu16((Opcode >> 0) & 7) = res; |
37459 | RET(6) |
37460 | } |
37461 | |
37462 | if (src & (1 << 15)) |
37463 | { |
37464 | flag_N = M68K_SR_N; |
37465 | flag_NotZ = 1; |
37466 | flag_V = 0; |
37467 | flag_C = M68K_SR_C; |
37468 | flag_X = M68K_SR_X; |
37469 | res = 0x0000FFFF; |
37470 | DREGu16((Opcode >> 0) & 7) = res; |
37471 | RET(6) |
37472 | } |
37473 | |
37474 | flag_N = 0; |
37475 | flag_NotZ = 0; |
37476 | flag_V = 0; |
37477 | flag_C = 0; |
37478 | flag_X = 0; |
37479 | res = 0; |
37480 | DREGu16((Opcode >> 0) & 7) = res; |
37481 | RET(6) |
37482 | } |
37483 | |
37484 | flag_V = 0; |
37485 | flag_C = 0; |
37486 | flag_N = src >> 8; |
37487 | flag_NotZ = src; |
37488 | RET(6) |
37489 | } |
37490 | |
37491 | // ASRD |
37492 | OPCODE(0xE0A0) |
37493 | { |
37494 | #ifdef USE_CYCLONE_TIMING |
37495 | #define CYC 8 |
37496 | #else |
37497 | #define CYC 6 |
37498 | #endif |
37499 | u32 adr, res; |
37500 | u32 src, dst; |
37501 | |
37502 | u32 sft; |
37503 | |
37504 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37505 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37506 | if (sft) |
37507 | { |
37508 | m68kcontext.io_cycle_counter -= sft * 2; |
37509 | if (sft < 32) |
37510 | { |
37511 | flag_V = 0; |
37512 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37513 | res = ((s32)src) >> sft; |
37514 | flag_N = res >> 24; |
37515 | flag_NotZ = res; |
37516 | DREGu32((Opcode >> 0) & 7) = res; |
37517 | RET(CYC) |
37518 | } |
37519 | |
37520 | if (src & (1 << 31)) |
37521 | { |
37522 | flag_N = M68K_SR_N; |
37523 | flag_NotZ = 1; |
37524 | flag_V = 0; |
37525 | flag_C = M68K_SR_C; |
37526 | flag_X = M68K_SR_X; |
37527 | res = 0xFFFFFFFF; |
37528 | DREGu32((Opcode >> 0) & 7) = res; |
37529 | RET(CYC) |
37530 | } |
37531 | |
37532 | flag_N = 0; |
37533 | flag_NotZ = 0; |
37534 | flag_V = 0; |
37535 | flag_C = 0; |
37536 | flag_X = 0; |
37537 | res = 0; |
37538 | DREGu32((Opcode >> 0) & 7) = res; |
37539 | RET(CYC) |
37540 | } |
37541 | |
37542 | flag_V = 0; |
37543 | flag_C = 0; |
37544 | flag_N = src >> 24; |
37545 | flag_NotZ = src; |
37546 | RET(CYC) |
37547 | #undef CYC |
37548 | } |
37549 | |
37550 | // LSRD |
37551 | OPCODE(0xE028) |
37552 | { |
37553 | u32 adr, res; |
37554 | u32 src, dst; |
37555 | |
37556 | u32 sft; |
37557 | |
37558 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37559 | src = DREGu8((Opcode >> 0) & 7); |
37560 | if (sft) |
37561 | { |
37562 | m68kcontext.io_cycle_counter -= sft * 2; |
37563 | if (sft <= 8) |
37564 | { |
37565 | flag_N = flag_V = 0; |
37566 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37567 | res = src >> sft; |
37568 | flag_NotZ = res; |
37569 | DREGu8((Opcode >> 0) & 7) = res; |
37570 | RET(6) |
37571 | } |
37572 | |
37573 | flag_X = flag_C = 0; |
37574 | flag_N = 0; |
37575 | flag_NotZ = 0; |
37576 | flag_V = 0; |
37577 | res = 0; |
37578 | DREGu8((Opcode >> 0) & 7) = res; |
37579 | RET(6) |
37580 | } |
37581 | |
37582 | flag_V = 0; |
37583 | flag_C = 0; |
37584 | flag_N = src >> 0; |
37585 | flag_NotZ = src; |
37586 | RET(6) |
37587 | } |
37588 | |
37589 | // LSRD |
37590 | OPCODE(0xE068) |
37591 | { |
37592 | u32 adr, res; |
37593 | u32 src, dst; |
37594 | |
37595 | u32 sft; |
37596 | |
37597 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37598 | src = DREGu16((Opcode >> 0) & 7); |
37599 | if (sft) |
37600 | { |
37601 | m68kcontext.io_cycle_counter -= sft * 2; |
37602 | if (sft <= 16) |
37603 | { |
37604 | flag_N = flag_V = 0; |
37605 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37606 | res = src >> sft; |
37607 | flag_NotZ = res; |
37608 | DREGu16((Opcode >> 0) & 7) = res; |
37609 | RET(6) |
37610 | } |
37611 | |
37612 | flag_X = flag_C = 0; |
37613 | flag_N = 0; |
37614 | flag_NotZ = 0; |
37615 | flag_V = 0; |
37616 | res = 0; |
37617 | DREGu16((Opcode >> 0) & 7) = res; |
37618 | RET(6) |
37619 | } |
37620 | |
37621 | flag_V = 0; |
37622 | flag_C = 0; |
37623 | flag_N = src >> 8; |
37624 | flag_NotZ = src; |
37625 | RET(6) |
37626 | } |
37627 | |
37628 | // LSRD |
37629 | OPCODE(0xE0A8) |
37630 | { |
37631 | #ifdef USE_CYCLONE_TIMING |
37632 | #define CYC 8 |
37633 | #else |
37634 | #define CYC 6 |
37635 | #endif |
37636 | u32 adr, res; |
37637 | u32 src, dst; |
37638 | |
37639 | u32 sft; |
37640 | |
37641 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37642 | src = DREGu32((Opcode >> 0) & 7); |
37643 | if (sft) |
37644 | { |
37645 | m68kcontext.io_cycle_counter -= sft * 2; |
37646 | if (sft < 32) |
37647 | { |
37648 | flag_N = flag_V = 0; |
37649 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37650 | res = src >> sft; |
37651 | flag_NotZ = res; |
37652 | DREGu32((Opcode >> 0) & 7) = res; |
37653 | RET(CYC) |
37654 | } |
37655 | |
37656 | if (sft == 32) flag_C = src >> (31 - M68K_SR_C_SFT); |
37657 | else flag_C = 0; |
37658 | flag_X = flag_C; |
37659 | flag_N = 0; |
37660 | flag_NotZ = 0; |
37661 | flag_V = 0; |
37662 | res = 0; |
37663 | DREGu32((Opcode >> 0) & 7) = res; |
37664 | RET(CYC) |
37665 | } |
37666 | |
37667 | flag_V = 0; |
37668 | flag_C = 0; |
37669 | flag_N = src >> 24; |
37670 | flag_NotZ = src; |
37671 | RET(CYC) |
37672 | #undef CYC |
37673 | } |
37674 | |
37675 | // ROXRD |
37676 | OPCODE(0xE030) |
37677 | { |
37678 | u32 adr, res; |
37679 | u32 src, dst; |
37680 | |
37681 | u32 sft; |
37682 | |
37683 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37684 | src = DREGu8((Opcode >> 0) & 7); |
37685 | if (sft) |
37686 | { |
37687 | m68kcontext.io_cycle_counter -= sft * 2; |
37688 | sft %= 9; |
37689 | |
37690 | src |= (flag_X & M68K_SR_X) << 0; |
37691 | res = (src >> sft) | (src << (9 - sft)); |
37692 | flag_X = flag_C = res >> 0; |
37693 | flag_V = 0; |
37694 | flag_N = res >> 0; |
37695 | flag_NotZ = res & 0x000000FF; |
37696 | DREGu8((Opcode >> 0) & 7) = res; |
37697 | RET(6) |
37698 | } |
37699 | |
37700 | flag_V = 0; |
37701 | flag_C = flag_X; |
37702 | flag_N = src >> 0; |
37703 | flag_NotZ = src; |
37704 | RET(6) |
37705 | } |
37706 | |
37707 | // ROXRD |
37708 | OPCODE(0xE070) |
37709 | { |
37710 | u32 adr, res; |
37711 | u32 src, dst; |
37712 | |
37713 | u32 sft; |
37714 | |
37715 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37716 | src = DREGu16((Opcode >> 0) & 7); |
37717 | if (sft) |
37718 | { |
37719 | m68kcontext.io_cycle_counter -= sft * 2; |
37720 | sft %= 17; |
37721 | |
37722 | src |= (flag_X & M68K_SR_X) << 8; |
37723 | res = (src >> sft) | (src << (17 - sft)); |
37724 | flag_X = flag_C = res >> 8; |
37725 | flag_V = 0; |
37726 | flag_N = res >> 8; |
37727 | flag_NotZ = res & 0x0000FFFF; |
37728 | DREGu16((Opcode >> 0) & 7) = res; |
37729 | RET(6) |
37730 | } |
37731 | |
37732 | flag_V = 0; |
37733 | flag_C = flag_X; |
37734 | flag_N = src >> 8; |
37735 | flag_NotZ = src; |
37736 | RET(6) |
37737 | } |
37738 | |
37739 | // ROXRD |
37740 | OPCODE(0xE0B0) |
37741 | { |
37742 | #ifdef USE_CYCLONE_TIMING |
37743 | #define CYC 8 |
37744 | #else |
37745 | #define CYC 6 |
37746 | #endif |
37747 | u32 adr, res; |
37748 | u32 src, dst; |
37749 | |
37750 | u32 sft; |
37751 | |
37752 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37753 | src = DREGu32((Opcode >> 0) & 7); |
37754 | if (sft) |
37755 | { |
37756 | m68kcontext.io_cycle_counter -= sft * 2; |
37757 | sft %= 33; |
37758 | |
37759 | if (sft != 0) |
37760 | { |
37761 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37762 | else res = (src >> sft) | (src << (33 - sft)) | (((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))) >> (sft - 1)); |
37763 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
37764 | } |
37765 | else res = src; |
37766 | flag_C = flag_X; |
37767 | flag_V = 0; |
37768 | flag_N = res >> 24; |
37769 | flag_NotZ = res; |
37770 | DREGu32((Opcode >> 0) & 7) = res; |
37771 | RET(CYC) |
37772 | } |
37773 | |
37774 | flag_V = 0; |
37775 | flag_C = flag_X; |
37776 | flag_N = src >> 24; |
37777 | flag_NotZ = src; |
37778 | RET(CYC) |
37779 | #undef CYC |
37780 | } |
37781 | |
37782 | // RORD |
37783 | OPCODE(0xE038) |
37784 | { |
37785 | u32 adr, res; |
37786 | u32 src, dst; |
37787 | |
37788 | u32 sft; |
37789 | |
37790 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37791 | src = DREGu8((Opcode >> 0) & 7); |
37792 | if (sft) |
37793 | { |
37794 | m68kcontext.io_cycle_counter -= sft * 2; |
37795 | sft &= 0x07; |
37796 | |
37797 | flag_C = src << (M68K_SR_C_SFT - ((sft - 1) & 7)); |
37798 | res = (src >> sft) | (src << (8 - sft)); |
37799 | flag_V = 0; |
37800 | flag_N = res >> 0; |
37801 | flag_NotZ = res & 0x000000FF; |
37802 | DREGu8((Opcode >> 0) & 7) = res; |
37803 | RET(6) |
37804 | } |
37805 | |
37806 | flag_V = 0; |
37807 | flag_C = 0; |
37808 | flag_N = src >> 0; |
37809 | flag_NotZ = src; |
37810 | RET(6) |
37811 | } |
37812 | |
37813 | // RORD |
37814 | OPCODE(0xE078) |
37815 | { |
37816 | u32 adr, res; |
37817 | u32 src, dst; |
37818 | |
37819 | u32 sft; |
37820 | |
37821 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37822 | src = DREGu16((Opcode >> 0) & 7); |
37823 | if (sft) |
37824 | { |
37825 | m68kcontext.io_cycle_counter -= sft * 2; |
37826 | sft &= 0x0F; |
37827 | |
37828 | flag_C = (src >> ((sft - 1) & 15)) << M68K_SR_C_SFT; |
37829 | res = (src >> sft) | (src << (16 - sft)); |
37830 | flag_V = 0; |
37831 | flag_N = res >> 8; |
37832 | flag_NotZ = res & 0x0000FFFF; |
37833 | DREGu16((Opcode >> 0) & 7) = res; |
37834 | RET(6) |
37835 | } |
37836 | |
37837 | flag_V = 0; |
37838 | flag_C = 0; |
37839 | flag_N = src >> 8; |
37840 | flag_NotZ = src; |
37841 | RET(6) |
37842 | } |
37843 | |
37844 | // RORD |
37845 | OPCODE(0xE0B8) |
37846 | { |
37847 | #ifdef USE_CYCLONE_TIMING |
37848 | #define CYC 8 |
37849 | #else |
37850 | #define CYC 6 |
37851 | #endif |
37852 | u32 adr, res; |
37853 | u32 src, dst; |
37854 | |
37855 | u32 sft; |
37856 | |
37857 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37858 | src = DREGu32((Opcode >> 0) & 7); |
37859 | if (sft) |
37860 | { |
37861 | m68kcontext.io_cycle_counter -= sft * 2; |
37862 | sft &= 0x1F; |
37863 | |
37864 | flag_C = (src >> ((sft - 1) & 31)) << M68K_SR_C_SFT; |
37865 | res = (src >> sft) | (src << (32 - sft)); |
37866 | flag_V = 0; |
37867 | flag_N = res >> 24; |
37868 | flag_NotZ = res; |
37869 | DREGu32((Opcode >> 0) & 7) = res; |
37870 | RET(CYC) |
37871 | } |
37872 | |
37873 | flag_V = 0; |
37874 | flag_C = 0; |
37875 | flag_N = src >> 24; |
37876 | flag_NotZ = src; |
37877 | RET(CYC) |
37878 | #undef CYC |
37879 | } |
37880 | |
37881 | // ASLD |
37882 | OPCODE(0xE120) |
37883 | { |
37884 | u32 adr, res; |
37885 | u32 src, dst; |
37886 | |
37887 | u32 sft; |
37888 | |
37889 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37890 | src = DREGu8((Opcode >> 0) & 7); |
37891 | if (sft) |
37892 | { |
37893 | m68kcontext.io_cycle_counter -= sft * 2; |
37894 | if (sft < 8) |
37895 | { |
37896 | flag_X = flag_C = (src << sft) >> 0; |
37897 | res = (src << sft) & 0x000000FF; |
37898 | flag_N = res >> 0; |
37899 | flag_NotZ = res; |
37900 | DREGu8((Opcode >> 0) & 7) = res; |
37901 | flag_V = 0; |
37902 | { |
37903 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
37904 | src &= msk; |
37905 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37906 | } |
37907 | RET(6) |
37908 | } |
37909 | |
37910 | if (sft == 256) flag_C = src << M68K_SR_C_SFT; |
37911 | else flag_C = 0; |
37912 | flag_X = flag_C; |
37913 | if (src) flag_V = M68K_SR_V; |
37914 | else flag_V = 0; |
37915 | res = 0; |
37916 | DREGu8((Opcode >> 0) & 7) = res; |
37917 | flag_N = 0; |
37918 | flag_NotZ = 0; |
37919 | RET(6) |
37920 | } |
37921 | |
37922 | flag_V = 0; |
37923 | flag_C = 0; |
37924 | flag_N = src >> 0; |
37925 | flag_NotZ = src; |
37926 | RET(6) |
37927 | } |
37928 | |
37929 | // ASLD |
37930 | OPCODE(0xE160) |
37931 | { |
37932 | u32 adr, res; |
37933 | u32 src, dst; |
37934 | |
37935 | u32 sft; |
37936 | |
37937 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37938 | src = DREGu16((Opcode >> 0) & 7); |
37939 | if (sft) |
37940 | { |
37941 | m68kcontext.io_cycle_counter -= sft * 2; |
37942 | if (sft < 16) |
37943 | { |
37944 | flag_X = flag_C = (src << sft) >> 8; |
37945 | res = (src << sft) & 0x0000FFFF; |
37946 | flag_N = res >> 8; |
37947 | flag_NotZ = res; |
37948 | DREGu16((Opcode >> 0) & 7) = res; |
37949 | flag_V = 0; |
37950 | { |
37951 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
37952 | src &= msk; |
37953 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37954 | } |
37955 | RET(6) |
37956 | } |
37957 | |
37958 | if (sft == 65536) flag_C = src << M68K_SR_C_SFT; |
37959 | else flag_C = 0; |
37960 | flag_X = flag_C; |
37961 | if (src) flag_V = M68K_SR_V; |
37962 | else flag_V = 0; |
37963 | res = 0; |
37964 | DREGu16((Opcode >> 0) & 7) = res; |
37965 | flag_N = 0; |
37966 | flag_NotZ = 0; |
37967 | RET(6) |
37968 | } |
37969 | |
37970 | flag_V = 0; |
37971 | flag_C = 0; |
37972 | flag_N = src >> 8; |
37973 | flag_NotZ = src; |
37974 | RET(6) |
37975 | } |
37976 | |
37977 | // ASLD |
37978 | OPCODE(0xE1A0) |
37979 | { |
37980 | #ifdef USE_CYCLONE_TIMING |
37981 | #define CYC 8 |
37982 | #else |
37983 | #define CYC 6 |
37984 | #endif |
37985 | u32 adr, res; |
37986 | u32 src, dst; |
37987 | |
37988 | u32 sft; |
37989 | |
37990 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37991 | src = DREGu32((Opcode >> 0) & 7); |
37992 | if (sft) |
37993 | { |
37994 | m68kcontext.io_cycle_counter -= sft * 2; |
37995 | if (sft < 32) |
37996 | { |
37997 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
37998 | res = src << sft; |
37999 | flag_N = res >> 24; |
38000 | flag_NotZ = res; |
38001 | DREGu32((Opcode >> 0) & 7) = res; |
38002 | flag_V = 0; |
38003 | { |
38004 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
38005 | src &= msk; |
38006 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38007 | } |
38008 | RET(CYC) |
38009 | } |
38010 | |
38011 | if (sft == 0) flag_C = src << M68K_SR_C_SFT; |
38012 | else flag_C = 0; |
38013 | flag_X = flag_C; |
38014 | if (src) flag_V = M68K_SR_V; |
38015 | else flag_V = 0; |
38016 | res = 0; |
38017 | DREGu32((Opcode >> 0) & 7) = res; |
38018 | flag_N = 0; |
38019 | flag_NotZ = 0; |
38020 | RET(CYC) |
38021 | } |
38022 | |
38023 | flag_V = 0; |
38024 | flag_C = 0; |
38025 | flag_N = src >> 24; |
38026 | flag_NotZ = src; |
38027 | RET(CYC) |
38028 | #undef CYC |
38029 | } |
38030 | |
38031 | // LSLD |
38032 | OPCODE(0xE128) |
38033 | { |
38034 | u32 adr, res; |
38035 | u32 src, dst; |
38036 | |
38037 | u32 sft; |
38038 | |
38039 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38040 | src = DREGu8((Opcode >> 0) & 7); |
38041 | if (sft) |
38042 | { |
38043 | m68kcontext.io_cycle_counter -= sft * 2; |
38044 | if (sft <= 8) |
38045 | { |
38046 | flag_X = flag_C = (src << sft) >> 0; |
38047 | res = (src << sft) & 0x000000FF; |
38048 | flag_V = 0; |
38049 | flag_N = res >> 0; |
38050 | flag_NotZ = res; |
38051 | DREGu8((Opcode >> 0) & 7) = res; |
38052 | RET(6) |
38053 | } |
38054 | |
38055 | flag_X = flag_C = 0; |
38056 | flag_N = 0; |
38057 | flag_NotZ = 0; |
38058 | flag_V = 0; |
38059 | res = 0; |
38060 | DREGu8((Opcode >> 0) & 7) = res; |
38061 | RET(6) |
38062 | } |
38063 | |
38064 | flag_V = 0; |
38065 | flag_C = 0; |
38066 | flag_N = src >> 0; |
38067 | flag_NotZ = src; |
38068 | RET(6) |
38069 | } |
38070 | |
38071 | // LSLD |
38072 | OPCODE(0xE168) |
38073 | { |
38074 | u32 adr, res; |
38075 | u32 src, dst; |
38076 | |
38077 | u32 sft; |
38078 | |
38079 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38080 | src = DREGu16((Opcode >> 0) & 7); |
38081 | if (sft) |
38082 | { |
38083 | m68kcontext.io_cycle_counter -= sft * 2; |
38084 | if (sft <= 16) |
38085 | { |
38086 | flag_X = flag_C = (src << sft) >> 8; |
38087 | res = (src << sft) & 0x0000FFFF; |
38088 | flag_V = 0; |
38089 | flag_N = res >> 8; |
38090 | flag_NotZ = res; |
38091 | DREGu16((Opcode >> 0) & 7) = res; |
38092 | RET(6) |
38093 | } |
38094 | |
38095 | flag_X = flag_C = 0; |
38096 | flag_N = 0; |
38097 | flag_NotZ = 0; |
38098 | flag_V = 0; |
38099 | res = 0; |
38100 | DREGu16((Opcode >> 0) & 7) = res; |
38101 | RET(6) |
38102 | } |
38103 | |
38104 | flag_V = 0; |
38105 | flag_C = 0; |
38106 | flag_N = src >> 8; |
38107 | flag_NotZ = src; |
38108 | RET(6) |
38109 | } |
38110 | |
38111 | // LSLD |
38112 | OPCODE(0xE1A8) |
38113 | { |
38114 | #ifdef USE_CYCLONE_TIMING |
38115 | #define CYC 8 |
38116 | #else |
38117 | #define CYC 6 |
38118 | #endif |
38119 | u32 adr, res; |
38120 | u32 src, dst; |
38121 | |
38122 | u32 sft; |
38123 | |
38124 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38125 | src = DREGu32((Opcode >> 0) & 7); |
38126 | if (sft) |
38127 | { |
38128 | m68kcontext.io_cycle_counter -= sft * 2; |
38129 | if (sft < 32) |
38130 | { |
38131 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38132 | res = src << sft; |
38133 | flag_V = 0; |
38134 | flag_N = res >> 24; |
38135 | flag_NotZ = res; |
38136 | DREGu32((Opcode >> 0) & 7) = res; |
38137 | RET(CYC) |
38138 | } |
38139 | |
38140 | if (sft == 32) flag_C = src << M68K_SR_C_SFT; |
38141 | else flag_C = 0; |
38142 | flag_X = flag_C; |
38143 | flag_N = 0; |
38144 | flag_NotZ = 0; |
38145 | flag_V = 0; |
38146 | res = 0; |
38147 | DREGu32((Opcode >> 0) & 7) = res; |
38148 | RET(CYC) |
38149 | } |
38150 | |
38151 | flag_V = 0; |
38152 | flag_C = 0; |
38153 | flag_N = src >> 24; |
38154 | flag_NotZ = src; |
38155 | RET(CYC) |
38156 | #undef CYC |
38157 | } |
38158 | |
38159 | // ROXLD |
38160 | OPCODE(0xE130) |
38161 | { |
38162 | u32 adr, res; |
38163 | u32 src, dst; |
38164 | |
38165 | u32 sft; |
38166 | |
38167 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38168 | src = DREGu8((Opcode >> 0) & 7); |
38169 | if (sft) |
38170 | { |
38171 | m68kcontext.io_cycle_counter -= sft * 2; |
38172 | sft %= 9; |
38173 | |
38174 | src |= (flag_X & M68K_SR_X) << 0; |
38175 | res = (src << sft) | (src >> (9 - sft)); |
38176 | flag_X = flag_C = res >> 0; |
38177 | flag_V = 0; |
38178 | flag_N = res >> 0; |
38179 | flag_NotZ = res & 0x000000FF; |
38180 | DREGu8((Opcode >> 0) & 7) = res; |
38181 | RET(6) |
38182 | } |
38183 | |
38184 | flag_V = 0; |
38185 | flag_C = flag_X; |
38186 | flag_N = src >> 0; |
38187 | flag_NotZ = src; |
38188 | RET(6) |
38189 | } |
38190 | |
38191 | // ROXLD |
38192 | OPCODE(0xE170) |
38193 | { |
38194 | u32 adr, res; |
38195 | u32 src, dst; |
38196 | |
38197 | u32 sft; |
38198 | |
38199 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38200 | src = DREGu16((Opcode >> 0) & 7); |
38201 | if (sft) |
38202 | { |
38203 | m68kcontext.io_cycle_counter -= sft * 2; |
38204 | sft %= 17; |
38205 | |
38206 | src |= (flag_X & M68K_SR_X) << 8; |
38207 | res = (src << sft) | (src >> (17 - sft)); |
38208 | flag_X = flag_C = res >> 8; |
38209 | flag_V = 0; |
38210 | flag_N = res >> 8; |
38211 | flag_NotZ = res & 0x0000FFFF; |
38212 | DREGu16((Opcode >> 0) & 7) = res; |
38213 | RET(6) |
38214 | } |
38215 | |
38216 | flag_V = 0; |
38217 | flag_C = flag_X; |
38218 | flag_N = src >> 8; |
38219 | flag_NotZ = src; |
38220 | RET(6) |
38221 | } |
38222 | |
38223 | // ROXLD |
38224 | OPCODE(0xE1B0) |
38225 | { |
38226 | #ifdef USE_CYCLONE_TIMING |
38227 | #define CYC 8 |
38228 | #else |
38229 | #define CYC 6 |
38230 | #endif |
38231 | u32 adr, res; |
38232 | u32 src, dst; |
38233 | |
38234 | u32 sft; |
38235 | |
38236 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38237 | src = DREGu32((Opcode >> 0) & 7); |
38238 | if (sft) |
38239 | { |
38240 | m68kcontext.io_cycle_counter -= sft * 2; |
38241 | sft %= 33; |
38242 | |
38243 | if (sft != 0) |
38244 | { |
38245 | if (sft == 1) res = (src << 1) | ((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1); |
38246 | else res = (src << sft) | (src >> (33 - sft)) | (((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1) << (sft - 1)); |
38247 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
38248 | } |
38249 | else res = src; |
38250 | flag_C = flag_X; |
38251 | flag_V = 0; |
38252 | flag_N = res >> 24; |
38253 | flag_NotZ = res; |
38254 | DREGu32((Opcode >> 0) & 7) = res; |
38255 | RET(CYC) |
38256 | } |
38257 | |
38258 | flag_V = 0; |
38259 | flag_C = flag_X; |
38260 | flag_N = src >> 24; |
38261 | flag_NotZ = src; |
38262 | RET(CYC) |
38263 | #undef CYC |
38264 | } |
38265 | |
38266 | // ROLD |
38267 | OPCODE(0xE138) |
38268 | { |
38269 | u32 adr, res; |
38270 | u32 src, dst; |
38271 | |
38272 | u32 sft; |
38273 | |
38274 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38275 | src = DREGu8((Opcode >> 0) & 7); |
38276 | if (sft) |
38277 | { |
38278 | m68kcontext.io_cycle_counter -= sft * 2; |
38279 | if (sft &= 0x07) |
38280 | { |
38281 | flag_C = (src << sft) >> 0; |
38282 | res = ((src << sft) | (src >> (8 - sft))) & 0x000000FF; |
38283 | flag_V = 0; |
38284 | flag_N = res >> 0; |
38285 | flag_NotZ = res; |
38286 | DREGu8((Opcode >> 0) & 7) = res; |
38287 | RET(6) |
38288 | } |
38289 | |
38290 | flag_V = 0; |
38291 | flag_C = src << M68K_SR_C_SFT; |
38292 | flag_N = src >> 0; |
38293 | flag_NotZ = src; |
38294 | RET(6) |
38295 | } |
38296 | |
38297 | flag_V = 0; |
38298 | flag_C = 0; |
38299 | flag_N = src >> 0; |
38300 | flag_NotZ = src; |
38301 | RET(6) |
38302 | } |
38303 | |
38304 | // ROLD |
38305 | OPCODE(0xE178) |
38306 | { |
38307 | u32 adr, res; |
38308 | u32 src, dst; |
38309 | |
38310 | u32 sft; |
38311 | |
38312 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38313 | src = DREGu16((Opcode >> 0) & 7); |
38314 | if (sft) |
38315 | { |
38316 | m68kcontext.io_cycle_counter -= sft * 2; |
38317 | if (sft &= 0x0F) |
38318 | { |
38319 | flag_C = (src << sft) >> 8; |
38320 | res = ((src << sft) | (src >> (16 - sft))) & 0x0000FFFF; |
38321 | flag_V = 0; |
38322 | flag_N = res >> 8; |
38323 | flag_NotZ = res; |
38324 | DREGu16((Opcode >> 0) & 7) = res; |
38325 | RET(6) |
38326 | } |
38327 | |
38328 | flag_V = 0; |
38329 | flag_C = src << M68K_SR_C_SFT; |
38330 | flag_N = src >> 8; |
38331 | flag_NotZ = src; |
38332 | RET(6) |
38333 | } |
38334 | |
38335 | flag_V = 0; |
38336 | flag_C = 0; |
38337 | flag_N = src >> 8; |
38338 | flag_NotZ = src; |
38339 | RET(6) |
38340 | } |
38341 | |
38342 | // ROLD |
38343 | OPCODE(0xE1B8) |
38344 | { |
38345 | #ifdef USE_CYCLONE_TIMING |
38346 | #define CYC 8 |
38347 | #else |
38348 | #define CYC 6 |
38349 | #endif |
38350 | u32 adr, res; |
38351 | u32 src, dst; |
38352 | |
38353 | u32 sft; |
38354 | |
38355 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38356 | src = DREGu32((Opcode >> 0) & 7); |
38357 | if (sft) |
38358 | { |
38359 | m68kcontext.io_cycle_counter -= sft * 2; |
38360 | if (sft &= 0x1F) |
38361 | { |
38362 | flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38363 | res = (src << sft) | (src >> (32 - sft)); |
38364 | flag_V = 0; |
38365 | flag_N = res >> 24; |
38366 | flag_NotZ = res; |
38367 | DREGu32((Opcode >> 0) & 7) = res; |
38368 | RET(CYC) |
38369 | } |
38370 | |
38371 | flag_V = 0; |
38372 | flag_C = src << M68K_SR_C_SFT; |
38373 | flag_N = src >> 24; |
38374 | flag_NotZ = src; |
38375 | RET(CYC) |
38376 | } |
38377 | |
38378 | flag_V = 0; |
38379 | flag_C = 0; |
38380 | flag_N = src >> 24; |
38381 | flag_NotZ = src; |
38382 | RET(CYC) |
38383 | #undef CYC |
38384 | } |
38385 | |
38386 | // ASR |
38387 | OPCODE(0xE0D0) |
38388 | { |
38389 | u32 adr, res; |
38390 | u32 src, dst; |
38391 | |
38392 | adr = AREG((Opcode >> 0) & 7); |
38393 | PRE_IO |
38394 | READ_WORD_F(adr, src) |
38395 | flag_V = 0; |
38396 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38397 | res = (src >> 1) | (src & (1 << 15)); |
38398 | flag_N = res >> 8; |
38399 | flag_NotZ = res; |
38400 | WRITE_WORD_F(adr, res) |
38401 | POST_IO |
38402 | RET(12) |
38403 | } |
38404 | |
38405 | // ASR |
38406 | OPCODE(0xE0D8) |
38407 | { |
38408 | u32 adr, res; |
38409 | u32 src, dst; |
38410 | |
38411 | adr = AREG((Opcode >> 0) & 7); |
38412 | AREG((Opcode >> 0) & 7) += 2; |
38413 | PRE_IO |
38414 | READ_WORD_F(adr, src) |
38415 | flag_V = 0; |
38416 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38417 | res = (src >> 1) | (src & (1 << 15)); |
38418 | flag_N = res >> 8; |
38419 | flag_NotZ = res; |
38420 | WRITE_WORD_F(adr, res) |
38421 | POST_IO |
38422 | RET(12) |
38423 | } |
38424 | |
38425 | // ASR |
38426 | OPCODE(0xE0E0) |
38427 | { |
38428 | u32 adr, res; |
38429 | u32 src, dst; |
38430 | |
38431 | adr = AREG((Opcode >> 0) & 7) - 2; |
38432 | AREG((Opcode >> 0) & 7) = adr; |
38433 | PRE_IO |
38434 | READ_WORD_F(adr, src) |
38435 | flag_V = 0; |
38436 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38437 | res = (src >> 1) | (src & (1 << 15)); |
38438 | flag_N = res >> 8; |
38439 | flag_NotZ = res; |
38440 | WRITE_WORD_F(adr, res) |
38441 | POST_IO |
38442 | RET(14) |
38443 | } |
38444 | |
38445 | // ASR |
38446 | OPCODE(0xE0E8) |
38447 | { |
38448 | u32 adr, res; |
38449 | u32 src, dst; |
38450 | |
38451 | FETCH_SWORD(adr); |
38452 | adr += AREG((Opcode >> 0) & 7); |
38453 | PRE_IO |
38454 | READ_WORD_F(adr, src) |
38455 | flag_V = 0; |
38456 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38457 | res = (src >> 1) | (src & (1 << 15)); |
38458 | flag_N = res >> 8; |
38459 | flag_NotZ = res; |
38460 | WRITE_WORD_F(adr, res) |
38461 | POST_IO |
38462 | RET(16) |
38463 | } |
38464 | |
38465 | // ASR |
38466 | OPCODE(0xE0F0) |
38467 | { |
38468 | u32 adr, res; |
38469 | u32 src, dst; |
38470 | |
38471 | adr = AREG((Opcode >> 0) & 7); |
38472 | DECODE_EXT_WORD |
38473 | PRE_IO |
38474 | READ_WORD_F(adr, src) |
38475 | flag_V = 0; |
38476 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38477 | res = (src >> 1) | (src & (1 << 15)); |
38478 | flag_N = res >> 8; |
38479 | flag_NotZ = res; |
38480 | WRITE_WORD_F(adr, res) |
38481 | POST_IO |
38482 | RET(18) |
38483 | } |
38484 | |
38485 | // ASR |
38486 | OPCODE(0xE0F8) |
38487 | { |
38488 | u32 adr, res; |
38489 | u32 src, dst; |
38490 | |
38491 | FETCH_SWORD(adr); |
38492 | PRE_IO |
38493 | READ_WORD_F(adr, src) |
38494 | flag_V = 0; |
38495 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38496 | res = (src >> 1) | (src & (1 << 15)); |
38497 | flag_N = res >> 8; |
38498 | flag_NotZ = res; |
38499 | WRITE_WORD_F(adr, res) |
38500 | POST_IO |
38501 | RET(16) |
38502 | } |
38503 | |
38504 | // ASR |
38505 | OPCODE(0xE0F9) |
38506 | { |
38507 | u32 adr, res; |
38508 | u32 src, dst; |
38509 | |
38510 | FETCH_LONG(adr); |
38511 | PRE_IO |
38512 | READ_WORD_F(adr, src) |
38513 | flag_V = 0; |
38514 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38515 | res = (src >> 1) | (src & (1 << 15)); |
38516 | flag_N = res >> 8; |
38517 | flag_NotZ = res; |
38518 | WRITE_WORD_F(adr, res) |
38519 | POST_IO |
38520 | RET(20) |
38521 | } |
38522 | |
38523 | // ASR |
38524 | OPCODE(0xE0DF) |
38525 | { |
38526 | u32 adr, res; |
38527 | u32 src, dst; |
38528 | |
38529 | adr = AREG(7); |
38530 | AREG(7) += 2; |
38531 | PRE_IO |
38532 | READ_WORD_F(adr, src) |
38533 | flag_V = 0; |
38534 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38535 | res = (src >> 1) | (src & (1 << 15)); |
38536 | flag_N = res >> 8; |
38537 | flag_NotZ = res; |
38538 | WRITE_WORD_F(adr, res) |
38539 | POST_IO |
38540 | RET(12) |
38541 | } |
38542 | |
38543 | // ASR |
38544 | OPCODE(0xE0E7) |
38545 | { |
38546 | u32 adr, res; |
38547 | u32 src, dst; |
38548 | |
38549 | adr = AREG(7) - 2; |
38550 | AREG(7) = adr; |
38551 | PRE_IO |
38552 | READ_WORD_F(adr, src) |
38553 | flag_V = 0; |
38554 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38555 | res = (src >> 1) | (src & (1 << 15)); |
38556 | flag_N = res >> 8; |
38557 | flag_NotZ = res; |
38558 | WRITE_WORD_F(adr, res) |
38559 | POST_IO |
38560 | RET(14) |
38561 | } |
38562 | |
38563 | // LSR |
38564 | OPCODE(0xE2D0) |
38565 | { |
38566 | u32 adr, res; |
38567 | u32 src, dst; |
38568 | |
38569 | adr = AREG((Opcode >> 0) & 7); |
38570 | PRE_IO |
38571 | READ_WORD_F(adr, src) |
38572 | flag_N = flag_V = 0; |
38573 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38574 | res = src >> 1; |
38575 | flag_NotZ = res; |
38576 | WRITE_WORD_F(adr, res) |
38577 | POST_IO |
38578 | RET(12) |
38579 | } |
38580 | |
38581 | // LSR |
38582 | OPCODE(0xE2D8) |
38583 | { |
38584 | u32 adr, res; |
38585 | u32 src, dst; |
38586 | |
38587 | adr = AREG((Opcode >> 0) & 7); |
38588 | AREG((Opcode >> 0) & 7) += 2; |
38589 | PRE_IO |
38590 | READ_WORD_F(adr, src) |
38591 | flag_N = flag_V = 0; |
38592 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38593 | res = src >> 1; |
38594 | flag_NotZ = res; |
38595 | WRITE_WORD_F(adr, res) |
38596 | POST_IO |
38597 | RET(12) |
38598 | } |
38599 | |
38600 | // LSR |
38601 | OPCODE(0xE2E0) |
38602 | { |
38603 | u32 adr, res; |
38604 | u32 src, dst; |
38605 | |
38606 | adr = AREG((Opcode >> 0) & 7) - 2; |
38607 | AREG((Opcode >> 0) & 7) = adr; |
38608 | PRE_IO |
38609 | READ_WORD_F(adr, src) |
38610 | flag_N = flag_V = 0; |
38611 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38612 | res = src >> 1; |
38613 | flag_NotZ = res; |
38614 | WRITE_WORD_F(adr, res) |
38615 | POST_IO |
38616 | RET(14) |
38617 | } |
38618 | |
38619 | // LSR |
38620 | OPCODE(0xE2E8) |
38621 | { |
38622 | u32 adr, res; |
38623 | u32 src, dst; |
38624 | |
38625 | FETCH_SWORD(adr); |
38626 | adr += AREG((Opcode >> 0) & 7); |
38627 | PRE_IO |
38628 | READ_WORD_F(adr, src) |
38629 | flag_N = flag_V = 0; |
38630 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38631 | res = src >> 1; |
38632 | flag_NotZ = res; |
38633 | WRITE_WORD_F(adr, res) |
38634 | POST_IO |
38635 | RET(16) |
38636 | } |
38637 | |
38638 | // LSR |
38639 | OPCODE(0xE2F0) |
38640 | { |
38641 | u32 adr, res; |
38642 | u32 src, dst; |
38643 | |
38644 | adr = AREG((Opcode >> 0) & 7); |
38645 | DECODE_EXT_WORD |
38646 | PRE_IO |
38647 | READ_WORD_F(adr, src) |
38648 | flag_N = flag_V = 0; |
38649 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38650 | res = src >> 1; |
38651 | flag_NotZ = res; |
38652 | WRITE_WORD_F(adr, res) |
38653 | POST_IO |
38654 | RET(18) |
38655 | } |
38656 | |
38657 | // LSR |
38658 | OPCODE(0xE2F8) |
38659 | { |
38660 | u32 adr, res; |
38661 | u32 src, dst; |
38662 | |
38663 | FETCH_SWORD(adr); |
38664 | PRE_IO |
38665 | READ_WORD_F(adr, src) |
38666 | flag_N = flag_V = 0; |
38667 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38668 | res = src >> 1; |
38669 | flag_NotZ = res; |
38670 | WRITE_WORD_F(adr, res) |
38671 | POST_IO |
38672 | RET(16) |
38673 | } |
38674 | |
38675 | // LSR |
38676 | OPCODE(0xE2F9) |
38677 | { |
38678 | u32 adr, res; |
38679 | u32 src, dst; |
38680 | |
38681 | FETCH_LONG(adr); |
38682 | PRE_IO |
38683 | READ_WORD_F(adr, src) |
38684 | flag_N = flag_V = 0; |
38685 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38686 | res = src >> 1; |
38687 | flag_NotZ = res; |
38688 | WRITE_WORD_F(adr, res) |
38689 | POST_IO |
38690 | RET(20) |
38691 | } |
38692 | |
38693 | // LSR |
38694 | OPCODE(0xE2DF) |
38695 | { |
38696 | u32 adr, res; |
38697 | u32 src, dst; |
38698 | |
38699 | adr = AREG(7); |
38700 | AREG(7) += 2; |
38701 | PRE_IO |
38702 | READ_WORD_F(adr, src) |
38703 | flag_N = flag_V = 0; |
38704 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38705 | res = src >> 1; |
38706 | flag_NotZ = res; |
38707 | WRITE_WORD_F(adr, res) |
38708 | POST_IO |
38709 | RET(12) |
38710 | } |
38711 | |
38712 | // LSR |
38713 | OPCODE(0xE2E7) |
38714 | { |
38715 | u32 adr, res; |
38716 | u32 src, dst; |
38717 | |
38718 | adr = AREG(7) - 2; |
38719 | AREG(7) = adr; |
38720 | PRE_IO |
38721 | READ_WORD_F(adr, src) |
38722 | flag_N = flag_V = 0; |
38723 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38724 | res = src >> 1; |
38725 | flag_NotZ = res; |
38726 | WRITE_WORD_F(adr, res) |
38727 | POST_IO |
38728 | RET(14) |
38729 | } |
38730 | |
38731 | // ROXR |
38732 | OPCODE(0xE4D0) |
38733 | { |
38734 | u32 adr, res; |
38735 | u32 src, dst; |
38736 | |
38737 | adr = AREG((Opcode >> 0) & 7); |
38738 | PRE_IO |
38739 | READ_WORD_F(adr, src) |
38740 | flag_V = 0; |
38741 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38742 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38743 | flag_N = res >> 8; |
38744 | flag_NotZ = res; |
38745 | WRITE_WORD_F(adr, res) |
38746 | POST_IO |
38747 | RET(12) |
38748 | } |
38749 | |
38750 | // ROXR |
38751 | OPCODE(0xE4D8) |
38752 | { |
38753 | u32 adr, res; |
38754 | u32 src, dst; |
38755 | |
38756 | adr = AREG((Opcode >> 0) & 7); |
38757 | AREG((Opcode >> 0) & 7) += 2; |
38758 | PRE_IO |
38759 | READ_WORD_F(adr, src) |
38760 | flag_V = 0; |
38761 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38762 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38763 | flag_N = res >> 8; |
38764 | flag_NotZ = res; |
38765 | WRITE_WORD_F(adr, res) |
38766 | POST_IO |
38767 | RET(12) |
38768 | } |
38769 | |
38770 | // ROXR |
38771 | OPCODE(0xE4E0) |
38772 | { |
38773 | u32 adr, res; |
38774 | u32 src, dst; |
38775 | |
38776 | adr = AREG((Opcode >> 0) & 7) - 2; |
38777 | AREG((Opcode >> 0) & 7) = adr; |
38778 | PRE_IO |
38779 | READ_WORD_F(adr, src) |
38780 | flag_V = 0; |
38781 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38782 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38783 | flag_N = res >> 8; |
38784 | flag_NotZ = res; |
38785 | WRITE_WORD_F(adr, res) |
38786 | POST_IO |
38787 | RET(14) |
38788 | } |
38789 | |
38790 | // ROXR |
38791 | OPCODE(0xE4E8) |
38792 | { |
38793 | u32 adr, res; |
38794 | u32 src, dst; |
38795 | |
38796 | FETCH_SWORD(adr); |
38797 | adr += AREG((Opcode >> 0) & 7); |
38798 | PRE_IO |
38799 | READ_WORD_F(adr, src) |
38800 | flag_V = 0; |
38801 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38802 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38803 | flag_N = res >> 8; |
38804 | flag_NotZ = res; |
38805 | WRITE_WORD_F(adr, res) |
38806 | POST_IO |
38807 | RET(16) |
38808 | } |
38809 | |
38810 | // ROXR |
38811 | OPCODE(0xE4F0) |
38812 | { |
38813 | u32 adr, res; |
38814 | u32 src, dst; |
38815 | |
38816 | adr = AREG((Opcode >> 0) & 7); |
38817 | DECODE_EXT_WORD |
38818 | PRE_IO |
38819 | READ_WORD_F(adr, src) |
38820 | flag_V = 0; |
38821 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38822 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38823 | flag_N = res >> 8; |
38824 | flag_NotZ = res; |
38825 | WRITE_WORD_F(adr, res) |
38826 | POST_IO |
38827 | RET(18) |
38828 | } |
38829 | |
38830 | // ROXR |
38831 | OPCODE(0xE4F8) |
38832 | { |
38833 | u32 adr, res; |
38834 | u32 src, dst; |
38835 | |
38836 | FETCH_SWORD(adr); |
38837 | PRE_IO |
38838 | READ_WORD_F(adr, src) |
38839 | flag_V = 0; |
38840 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38841 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38842 | flag_N = res >> 8; |
38843 | flag_NotZ = res; |
38844 | WRITE_WORD_F(adr, res) |
38845 | POST_IO |
38846 | RET(16) |
38847 | } |
38848 | |
38849 | // ROXR |
38850 | OPCODE(0xE4F9) |
38851 | { |
38852 | u32 adr, res; |
38853 | u32 src, dst; |
38854 | |
38855 | FETCH_LONG(adr); |
38856 | PRE_IO |
38857 | READ_WORD_F(adr, src) |
38858 | flag_V = 0; |
38859 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38860 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38861 | flag_N = res >> 8; |
38862 | flag_NotZ = res; |
38863 | WRITE_WORD_F(adr, res) |
38864 | POST_IO |
38865 | RET(20) |
38866 | } |
38867 | |
38868 | // ROXR |
38869 | OPCODE(0xE4DF) |
38870 | { |
38871 | u32 adr, res; |
38872 | u32 src, dst; |
38873 | |
38874 | adr = AREG(7); |
38875 | AREG(7) += 2; |
38876 | PRE_IO |
38877 | READ_WORD_F(adr, src) |
38878 | flag_V = 0; |
38879 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38880 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38881 | flag_N = res >> 8; |
38882 | flag_NotZ = res; |
38883 | WRITE_WORD_F(adr, res) |
38884 | POST_IO |
38885 | RET(12) |
38886 | } |
38887 | |
38888 | // ROXR |
38889 | OPCODE(0xE4E7) |
38890 | { |
38891 | u32 adr, res; |
38892 | u32 src, dst; |
38893 | |
38894 | adr = AREG(7) - 2; |
38895 | AREG(7) = adr; |
38896 | PRE_IO |
38897 | READ_WORD_F(adr, src) |
38898 | flag_V = 0; |
38899 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
38900 | flag_C = flag_X = src << M68K_SR_C_SFT; |
38901 | flag_N = res >> 8; |
38902 | flag_NotZ = res; |
38903 | WRITE_WORD_F(adr, res) |
38904 | POST_IO |
38905 | RET(14) |
38906 | } |
38907 | |
38908 | // ROR |
38909 | OPCODE(0xE6D0) |
38910 | { |
38911 | u32 adr, res; |
38912 | u32 src, dst; |
38913 | |
38914 | adr = AREG((Opcode >> 0) & 7); |
38915 | PRE_IO |
38916 | READ_WORD_F(adr, src) |
38917 | flag_V = 0; |
38918 | flag_C = src << M68K_SR_C_SFT; |
38919 | res = (src >> 1) | (src << 15); |
38920 | flag_N = res >> 8; |
38921 | flag_NotZ = res & 0x0000FFFF; |
38922 | WRITE_WORD_F(adr, res) |
38923 | POST_IO |
38924 | RET(12) |
38925 | } |
38926 | |
38927 | // ROR |
38928 | OPCODE(0xE6D8) |
38929 | { |
38930 | u32 adr, res; |
38931 | u32 src, dst; |
38932 | |
38933 | adr = AREG((Opcode >> 0) & 7); |
38934 | AREG((Opcode >> 0) & 7) += 2; |
38935 | PRE_IO |
38936 | READ_WORD_F(adr, src) |
38937 | flag_V = 0; |
38938 | flag_C = src << M68K_SR_C_SFT; |
38939 | res = (src >> 1) | (src << 15); |
38940 | flag_N = res >> 8; |
38941 | flag_NotZ = res & 0x0000FFFF; |
38942 | WRITE_WORD_F(adr, res) |
38943 | POST_IO |
38944 | RET(12) |
38945 | } |
38946 | |
38947 | // ROR |
38948 | OPCODE(0xE6E0) |
38949 | { |
38950 | u32 adr, res; |
38951 | u32 src, dst; |
38952 | |
38953 | adr = AREG((Opcode >> 0) & 7) - 2; |
38954 | AREG((Opcode >> 0) & 7) = adr; |
38955 | PRE_IO |
38956 | READ_WORD_F(adr, src) |
38957 | flag_V = 0; |
38958 | flag_C = src << M68K_SR_C_SFT; |
38959 | res = (src >> 1) | (src << 15); |
38960 | flag_N = res >> 8; |
38961 | flag_NotZ = res & 0x0000FFFF; |
38962 | WRITE_WORD_F(adr, res) |
38963 | POST_IO |
38964 | RET(14) |
38965 | } |
38966 | |
38967 | // ROR |
38968 | OPCODE(0xE6E8) |
38969 | { |
38970 | u32 adr, res; |
38971 | u32 src, dst; |
38972 | |
38973 | FETCH_SWORD(adr); |
38974 | adr += AREG((Opcode >> 0) & 7); |
38975 | PRE_IO |
38976 | READ_WORD_F(adr, src) |
38977 | flag_V = 0; |
38978 | flag_C = src << M68K_SR_C_SFT; |
38979 | res = (src >> 1) | (src << 15); |
38980 | flag_N = res >> 8; |
38981 | flag_NotZ = res & 0x0000FFFF; |
38982 | WRITE_WORD_F(adr, res) |
38983 | POST_IO |
38984 | RET(16) |
38985 | } |
38986 | |
38987 | // ROR |
38988 | OPCODE(0xE6F0) |
38989 | { |
38990 | u32 adr, res; |
38991 | u32 src, dst; |
38992 | |
38993 | adr = AREG((Opcode >> 0) & 7); |
38994 | DECODE_EXT_WORD |
38995 | PRE_IO |
38996 | READ_WORD_F(adr, src) |
38997 | flag_V = 0; |
38998 | flag_C = src << M68K_SR_C_SFT; |
38999 | res = (src >> 1) | (src << 15); |
39000 | flag_N = res >> 8; |
39001 | flag_NotZ = res & 0x0000FFFF; |
39002 | WRITE_WORD_F(adr, res) |
39003 | POST_IO |
39004 | RET(18) |
39005 | } |
39006 | |
39007 | // ROR |
39008 | OPCODE(0xE6F8) |
39009 | { |
39010 | u32 adr, res; |
39011 | u32 src, dst; |
39012 | |
39013 | FETCH_SWORD(adr); |
39014 | PRE_IO |
39015 | READ_WORD_F(adr, src) |
39016 | flag_V = 0; |
39017 | flag_C = src << M68K_SR_C_SFT; |
39018 | res = (src >> 1) | (src << 15); |
39019 | flag_N = res >> 8; |
39020 | flag_NotZ = res & 0x0000FFFF; |
39021 | WRITE_WORD_F(adr, res) |
39022 | POST_IO |
39023 | RET(16) |
39024 | } |
39025 | |
39026 | // ROR |
39027 | OPCODE(0xE6F9) |
39028 | { |
39029 | u32 adr, res; |
39030 | u32 src, dst; |
39031 | |
39032 | FETCH_LONG(adr); |
39033 | PRE_IO |
39034 | READ_WORD_F(adr, src) |
39035 | flag_V = 0; |
39036 | flag_C = src << M68K_SR_C_SFT; |
39037 | res = (src >> 1) | (src << 15); |
39038 | flag_N = res >> 8; |
39039 | flag_NotZ = res & 0x0000FFFF; |
39040 | WRITE_WORD_F(adr, res) |
39041 | POST_IO |
39042 | RET(20) |
39043 | } |
39044 | |
39045 | // ROR |
39046 | OPCODE(0xE6DF) |
39047 | { |
39048 | u32 adr, res; |
39049 | u32 src, dst; |
39050 | |
39051 | adr = AREG(7); |
39052 | AREG(7) += 2; |
39053 | PRE_IO |
39054 | READ_WORD_F(adr, src) |
39055 | flag_V = 0; |
39056 | flag_C = src << M68K_SR_C_SFT; |
39057 | res = (src >> 1) | (src << 15); |
39058 | flag_N = res >> 8; |
39059 | flag_NotZ = res & 0x0000FFFF; |
39060 | WRITE_WORD_F(adr, res) |
39061 | POST_IO |
39062 | RET(12) |
39063 | } |
39064 | |
39065 | // ROR |
39066 | OPCODE(0xE6E7) |
39067 | { |
39068 | u32 adr, res; |
39069 | u32 src, dst; |
39070 | |
39071 | adr = AREG(7) - 2; |
39072 | AREG(7) = adr; |
39073 | PRE_IO |
39074 | READ_WORD_F(adr, src) |
39075 | flag_V = 0; |
39076 | flag_C = src << M68K_SR_C_SFT; |
39077 | res = (src >> 1) | (src << 15); |
39078 | flag_N = res >> 8; |
39079 | flag_NotZ = res & 0x0000FFFF; |
39080 | WRITE_WORD_F(adr, res) |
39081 | POST_IO |
39082 | RET(14) |
39083 | } |
39084 | |
39085 | // ASL |
39086 | OPCODE(0xE1D0) |
39087 | { |
39088 | u32 adr, res; |
39089 | u32 src, dst; |
39090 | |
39091 | adr = AREG((Opcode >> 0) & 7); |
39092 | PRE_IO |
39093 | READ_WORD_F(adr, src) |
39094 | flag_X = flag_C = src >> 7; |
39095 | res = src << 1; |
39096 | flag_V = (src ^ res) >> 8; |
39097 | flag_N = res >> 8; |
39098 | flag_NotZ = res & 0x0000FFFF; |
39099 | WRITE_WORD_F(adr, res) |
39100 | POST_IO |
39101 | RET(12) |
39102 | } |
39103 | |
39104 | // ASL |
39105 | OPCODE(0xE1D8) |
39106 | { |
39107 | u32 adr, res; |
39108 | u32 src, dst; |
39109 | |
39110 | adr = AREG((Opcode >> 0) & 7); |
39111 | AREG((Opcode >> 0) & 7) += 2; |
39112 | PRE_IO |
39113 | READ_WORD_F(adr, src) |
39114 | flag_X = flag_C = src >> 7; |
39115 | res = src << 1; |
39116 | flag_V = (src ^ res) >> 8; |
39117 | flag_N = res >> 8; |
39118 | flag_NotZ = res & 0x0000FFFF; |
39119 | WRITE_WORD_F(adr, res) |
39120 | POST_IO |
39121 | RET(12) |
39122 | } |
39123 | |
39124 | // ASL |
39125 | OPCODE(0xE1E0) |
39126 | { |
39127 | u32 adr, res; |
39128 | u32 src, dst; |
39129 | |
39130 | adr = AREG((Opcode >> 0) & 7) - 2; |
39131 | AREG((Opcode >> 0) & 7) = adr; |
39132 | PRE_IO |
39133 | READ_WORD_F(adr, src) |
39134 | flag_X = flag_C = src >> 7; |
39135 | res = src << 1; |
39136 | flag_V = (src ^ res) >> 8; |
39137 | flag_N = res >> 8; |
39138 | flag_NotZ = res & 0x0000FFFF; |
39139 | WRITE_WORD_F(adr, res) |
39140 | POST_IO |
39141 | RET(14) |
39142 | } |
39143 | |
39144 | // ASL |
39145 | OPCODE(0xE1E8) |
39146 | { |
39147 | u32 adr, res; |
39148 | u32 src, dst; |
39149 | |
39150 | FETCH_SWORD(adr); |
39151 | adr += AREG((Opcode >> 0) & 7); |
39152 | PRE_IO |
39153 | READ_WORD_F(adr, src) |
39154 | flag_X = flag_C = src >> 7; |
39155 | res = src << 1; |
39156 | flag_V = (src ^ res) >> 8; |
39157 | flag_N = res >> 8; |
39158 | flag_NotZ = res & 0x0000FFFF; |
39159 | WRITE_WORD_F(adr, res) |
39160 | POST_IO |
39161 | RET(16) |
39162 | } |
39163 | |
39164 | // ASL |
39165 | OPCODE(0xE1F0) |
39166 | { |
39167 | u32 adr, res; |
39168 | u32 src, dst; |
39169 | |
39170 | adr = AREG((Opcode >> 0) & 7); |
39171 | DECODE_EXT_WORD |
39172 | PRE_IO |
39173 | READ_WORD_F(adr, src) |
39174 | flag_X = flag_C = src >> 7; |
39175 | res = src << 1; |
39176 | flag_V = (src ^ res) >> 8; |
39177 | flag_N = res >> 8; |
39178 | flag_NotZ = res & 0x0000FFFF; |
39179 | WRITE_WORD_F(adr, res) |
39180 | POST_IO |
39181 | RET(18) |
39182 | } |
39183 | |
39184 | // ASL |
39185 | OPCODE(0xE1F8) |
39186 | { |
39187 | u32 adr, res; |
39188 | u32 src, dst; |
39189 | |
39190 | FETCH_SWORD(adr); |
39191 | PRE_IO |
39192 | READ_WORD_F(adr, src) |
39193 | flag_X = flag_C = src >> 7; |
39194 | res = src << 1; |
39195 | flag_V = (src ^ res) >> 8; |
39196 | flag_N = res >> 8; |
39197 | flag_NotZ = res & 0x0000FFFF; |
39198 | WRITE_WORD_F(adr, res) |
39199 | POST_IO |
39200 | RET(16) |
39201 | } |
39202 | |
39203 | // ASL |
39204 | OPCODE(0xE1F9) |
39205 | { |
39206 | u32 adr, res; |
39207 | u32 src, dst; |
39208 | |
39209 | FETCH_LONG(adr); |
39210 | PRE_IO |
39211 | READ_WORD_F(adr, src) |
39212 | flag_X = flag_C = src >> 7; |
39213 | res = src << 1; |
39214 | flag_V = (src ^ res) >> 8; |
39215 | flag_N = res >> 8; |
39216 | flag_NotZ = res & 0x0000FFFF; |
39217 | WRITE_WORD_F(adr, res) |
39218 | POST_IO |
39219 | RET(20) |
39220 | } |
39221 | |
39222 | // ASL |
39223 | OPCODE(0xE1DF) |
39224 | { |
39225 | u32 adr, res; |
39226 | u32 src, dst; |
39227 | |
39228 | adr = AREG(7); |
39229 | AREG(7) += 2; |
39230 | PRE_IO |
39231 | READ_WORD_F(adr, src) |
39232 | flag_X = flag_C = src >> 7; |
39233 | res = src << 1; |
39234 | flag_V = (src ^ res) >> 8; |
39235 | flag_N = res >> 8; |
39236 | flag_NotZ = res & 0x0000FFFF; |
39237 | WRITE_WORD_F(adr, res) |
39238 | POST_IO |
39239 | RET(12) |
39240 | } |
39241 | |
39242 | // ASL |
39243 | OPCODE(0xE1E7) |
39244 | { |
39245 | u32 adr, res; |
39246 | u32 src, dst; |
39247 | |
39248 | adr = AREG(7) - 2; |
39249 | AREG(7) = adr; |
39250 | PRE_IO |
39251 | READ_WORD_F(adr, src) |
39252 | flag_X = flag_C = src >> 7; |
39253 | res = src << 1; |
39254 | flag_V = (src ^ res) >> 8; |
39255 | flag_N = res >> 8; |
39256 | flag_NotZ = res & 0x0000FFFF; |
39257 | WRITE_WORD_F(adr, res) |
39258 | POST_IO |
39259 | RET(14) |
39260 | } |
39261 | |
39262 | // LSL |
39263 | OPCODE(0xE3D0) |
39264 | { |
39265 | u32 adr, res; |
39266 | u32 src, dst; |
39267 | |
39268 | adr = AREG((Opcode >> 0) & 7); |
39269 | PRE_IO |
39270 | READ_WORD_F(adr, src) |
39271 | flag_V = 0; |
39272 | flag_X = flag_C = src >> 7; |
39273 | res = src << 1; |
39274 | flag_N = res >> 8; |
39275 | flag_NotZ = res & 0x0000FFFF; |
39276 | WRITE_WORD_F(adr, res) |
39277 | POST_IO |
39278 | RET(12) |
39279 | } |
39280 | |
39281 | // LSL |
39282 | OPCODE(0xE3D8) |
39283 | { |
39284 | u32 adr, res; |
39285 | u32 src, dst; |
39286 | |
39287 | adr = AREG((Opcode >> 0) & 7); |
39288 | AREG((Opcode >> 0) & 7) += 2; |
39289 | PRE_IO |
39290 | READ_WORD_F(adr, src) |
39291 | flag_V = 0; |
39292 | flag_X = flag_C = src >> 7; |
39293 | res = src << 1; |
39294 | flag_N = res >> 8; |
39295 | flag_NotZ = res & 0x0000FFFF; |
39296 | WRITE_WORD_F(adr, res) |
39297 | POST_IO |
39298 | RET(12) |
39299 | } |
39300 | |
39301 | // LSL |
39302 | OPCODE(0xE3E0) |
39303 | { |
39304 | u32 adr, res; |
39305 | u32 src, dst; |
39306 | |
39307 | adr = AREG((Opcode >> 0) & 7) - 2; |
39308 | AREG((Opcode >> 0) & 7) = adr; |
39309 | PRE_IO |
39310 | READ_WORD_F(adr, src) |
39311 | flag_V = 0; |
39312 | flag_X = flag_C = src >> 7; |
39313 | res = src << 1; |
39314 | flag_N = res >> 8; |
39315 | flag_NotZ = res & 0x0000FFFF; |
39316 | WRITE_WORD_F(adr, res) |
39317 | POST_IO |
39318 | RET(14) |
39319 | } |
39320 | |
39321 | // LSL |
39322 | OPCODE(0xE3E8) |
39323 | { |
39324 | u32 adr, res; |
39325 | u32 src, dst; |
39326 | |
39327 | FETCH_SWORD(adr); |
39328 | adr += AREG((Opcode >> 0) & 7); |
39329 | PRE_IO |
39330 | READ_WORD_F(adr, src) |
39331 | flag_V = 0; |
39332 | flag_X = flag_C = src >> 7; |
39333 | res = src << 1; |
39334 | flag_N = res >> 8; |
39335 | flag_NotZ = res & 0x0000FFFF; |
39336 | WRITE_WORD_F(adr, res) |
39337 | POST_IO |
39338 | RET(16) |
39339 | } |
39340 | |
39341 | // LSL |
39342 | OPCODE(0xE3F0) |
39343 | { |
39344 | u32 adr, res; |
39345 | u32 src, dst; |
39346 | |
39347 | adr = AREG((Opcode >> 0) & 7); |
39348 | DECODE_EXT_WORD |
39349 | PRE_IO |
39350 | READ_WORD_F(adr, src) |
39351 | flag_V = 0; |
39352 | flag_X = flag_C = src >> 7; |
39353 | res = src << 1; |
39354 | flag_N = res >> 8; |
39355 | flag_NotZ = res & 0x0000FFFF; |
39356 | WRITE_WORD_F(adr, res) |
39357 | POST_IO |
39358 | RET(18) |
39359 | } |
39360 | |
39361 | // LSL |
39362 | OPCODE(0xE3F8) |
39363 | { |
39364 | u32 adr, res; |
39365 | u32 src, dst; |
39366 | |
39367 | FETCH_SWORD(adr); |
39368 | PRE_IO |
39369 | READ_WORD_F(adr, src) |
39370 | flag_V = 0; |
39371 | flag_X = flag_C = src >> 7; |
39372 | res = src << 1; |
39373 | flag_N = res >> 8; |
39374 | flag_NotZ = res & 0x0000FFFF; |
39375 | WRITE_WORD_F(adr, res) |
39376 | POST_IO |
39377 | RET(16) |
39378 | } |
39379 | |
39380 | // LSL |
39381 | OPCODE(0xE3F9) |
39382 | { |
39383 | u32 adr, res; |
39384 | u32 src, dst; |
39385 | |
39386 | FETCH_LONG(adr); |
39387 | PRE_IO |
39388 | READ_WORD_F(adr, src) |
39389 | flag_V = 0; |
39390 | flag_X = flag_C = src >> 7; |
39391 | res = src << 1; |
39392 | flag_N = res >> 8; |
39393 | flag_NotZ = res & 0x0000FFFF; |
39394 | WRITE_WORD_F(adr, res) |
39395 | POST_IO |
39396 | RET(20) |
39397 | } |
39398 | |
39399 | // LSL |
39400 | OPCODE(0xE3DF) |
39401 | { |
39402 | u32 adr, res; |
39403 | u32 src, dst; |
39404 | |
39405 | adr = AREG(7); |
39406 | AREG(7) += 2; |
39407 | PRE_IO |
39408 | READ_WORD_F(adr, src) |
39409 | flag_V = 0; |
39410 | flag_X = flag_C = src >> 7; |
39411 | res = src << 1; |
39412 | flag_N = res >> 8; |
39413 | flag_NotZ = res & 0x0000FFFF; |
39414 | WRITE_WORD_F(adr, res) |
39415 | POST_IO |
39416 | RET(12) |
39417 | } |
39418 | |
39419 | // LSL |
39420 | OPCODE(0xE3E7) |
39421 | { |
39422 | u32 adr, res; |
39423 | u32 src, dst; |
39424 | |
39425 | adr = AREG(7) - 2; |
39426 | AREG(7) = adr; |
39427 | PRE_IO |
39428 | READ_WORD_F(adr, src) |
39429 | flag_V = 0; |
39430 | flag_X = flag_C = src >> 7; |
39431 | res = src << 1; |
39432 | flag_N = res >> 8; |
39433 | flag_NotZ = res & 0x0000FFFF; |
39434 | WRITE_WORD_F(adr, res) |
39435 | POST_IO |
39436 | RET(14) |
39437 | } |
39438 | |
39439 | // ROXL |
39440 | OPCODE(0xE5D0) |
39441 | { |
39442 | u32 adr, res; |
39443 | u32 src, dst; |
39444 | |
39445 | adr = AREG((Opcode >> 0) & 7); |
39446 | PRE_IO |
39447 | READ_WORD_F(adr, src) |
39448 | flag_V = 0; |
39449 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39450 | flag_X = flag_C = src >> 7; |
39451 | flag_N = res >> 8; |
39452 | flag_NotZ = res & 0x0000FFFF; |
39453 | WRITE_WORD_F(adr, res) |
39454 | POST_IO |
39455 | RET(12) |
39456 | } |
39457 | |
39458 | // ROXL |
39459 | OPCODE(0xE5D8) |
39460 | { |
39461 | u32 adr, res; |
39462 | u32 src, dst; |
39463 | |
39464 | adr = AREG((Opcode >> 0) & 7); |
39465 | AREG((Opcode >> 0) & 7) += 2; |
39466 | PRE_IO |
39467 | READ_WORD_F(adr, src) |
39468 | flag_V = 0; |
39469 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39470 | flag_X = flag_C = src >> 7; |
39471 | flag_N = res >> 8; |
39472 | flag_NotZ = res & 0x0000FFFF; |
39473 | WRITE_WORD_F(adr, res) |
39474 | POST_IO |
39475 | RET(12) |
39476 | } |
39477 | |
39478 | // ROXL |
39479 | OPCODE(0xE5E0) |
39480 | { |
39481 | u32 adr, res; |
39482 | u32 src, dst; |
39483 | |
39484 | adr = AREG((Opcode >> 0) & 7) - 2; |
39485 | AREG((Opcode >> 0) & 7) = adr; |
39486 | PRE_IO |
39487 | READ_WORD_F(adr, src) |
39488 | flag_V = 0; |
39489 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39490 | flag_X = flag_C = src >> 7; |
39491 | flag_N = res >> 8; |
39492 | flag_NotZ = res & 0x0000FFFF; |
39493 | WRITE_WORD_F(adr, res) |
39494 | POST_IO |
39495 | RET(14) |
39496 | } |
39497 | |
39498 | // ROXL |
39499 | OPCODE(0xE5E8) |
39500 | { |
39501 | u32 adr, res; |
39502 | u32 src, dst; |
39503 | |
39504 | FETCH_SWORD(adr); |
39505 | adr += AREG((Opcode >> 0) & 7); |
39506 | PRE_IO |
39507 | READ_WORD_F(adr, src) |
39508 | flag_V = 0; |
39509 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39510 | flag_X = flag_C = src >> 7; |
39511 | flag_N = res >> 8; |
39512 | flag_NotZ = res & 0x0000FFFF; |
39513 | WRITE_WORD_F(adr, res) |
39514 | POST_IO |
39515 | RET(16) |
39516 | } |
39517 | |
39518 | // ROXL |
39519 | OPCODE(0xE5F0) |
39520 | { |
39521 | u32 adr, res; |
39522 | u32 src, dst; |
39523 | |
39524 | adr = AREG((Opcode >> 0) & 7); |
39525 | DECODE_EXT_WORD |
39526 | PRE_IO |
39527 | READ_WORD_F(adr, src) |
39528 | flag_V = 0; |
39529 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39530 | flag_X = flag_C = src >> 7; |
39531 | flag_N = res >> 8; |
39532 | flag_NotZ = res & 0x0000FFFF; |
39533 | WRITE_WORD_F(adr, res) |
39534 | POST_IO |
39535 | RET(18) |
39536 | } |
39537 | |
39538 | // ROXL |
39539 | OPCODE(0xE5F8) |
39540 | { |
39541 | u32 adr, res; |
39542 | u32 src, dst; |
39543 | |
39544 | FETCH_SWORD(adr); |
39545 | PRE_IO |
39546 | READ_WORD_F(adr, src) |
39547 | flag_V = 0; |
39548 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39549 | flag_X = flag_C = src >> 7; |
39550 | flag_N = res >> 8; |
39551 | flag_NotZ = res & 0x0000FFFF; |
39552 | WRITE_WORD_F(adr, res) |
39553 | POST_IO |
39554 | RET(16) |
39555 | } |
39556 | |
39557 | // ROXL |
39558 | OPCODE(0xE5F9) |
39559 | { |
39560 | u32 adr, res; |
39561 | u32 src, dst; |
39562 | |
39563 | FETCH_LONG(adr); |
39564 | PRE_IO |
39565 | READ_WORD_F(adr, src) |
39566 | flag_V = 0; |
39567 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39568 | flag_X = flag_C = src >> 7; |
39569 | flag_N = res >> 8; |
39570 | flag_NotZ = res & 0x0000FFFF; |
39571 | WRITE_WORD_F(adr, res) |
39572 | POST_IO |
39573 | RET(20) |
39574 | } |
39575 | |
39576 | // ROXL |
39577 | OPCODE(0xE5DF) |
39578 | { |
39579 | u32 adr, res; |
39580 | u32 src, dst; |
39581 | |
39582 | adr = AREG(7); |
39583 | AREG(7) += 2; |
39584 | PRE_IO |
39585 | READ_WORD_F(adr, src) |
39586 | flag_V = 0; |
39587 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39588 | flag_X = flag_C = src >> 7; |
39589 | flag_N = res >> 8; |
39590 | flag_NotZ = res & 0x0000FFFF; |
39591 | WRITE_WORD_F(adr, res) |
39592 | POST_IO |
39593 | RET(12) |
39594 | } |
39595 | |
39596 | // ROXL |
39597 | OPCODE(0xE5E7) |
39598 | { |
39599 | u32 adr, res; |
39600 | u32 src, dst; |
39601 | |
39602 | adr = AREG(7) - 2; |
39603 | AREG(7) = adr; |
39604 | PRE_IO |
39605 | READ_WORD_F(adr, src) |
39606 | flag_V = 0; |
39607 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39608 | flag_X = flag_C = src >> 7; |
39609 | flag_N = res >> 8; |
39610 | flag_NotZ = res & 0x0000FFFF; |
39611 | WRITE_WORD_F(adr, res) |
39612 | POST_IO |
39613 | RET(14) |
39614 | } |
39615 | |
39616 | // ROL |
39617 | OPCODE(0xE7D0) |
39618 | { |
39619 | u32 adr, res; |
39620 | u32 src, dst; |
39621 | |
39622 | adr = AREG((Opcode >> 0) & 7); |
39623 | PRE_IO |
39624 | READ_WORD_F(adr, src) |
39625 | flag_V = 0; |
39626 | flag_C = src >> 7; |
39627 | res = (src << 1) | (src >> 15); |
39628 | flag_N = res >> 8; |
39629 | flag_NotZ = res & 0x0000FFFF; |
39630 | WRITE_WORD_F(adr, res) |
39631 | POST_IO |
39632 | RET(12) |
39633 | } |
39634 | |
39635 | // ROL |
39636 | OPCODE(0xE7D8) |
39637 | { |
39638 | u32 adr, res; |
39639 | u32 src, dst; |
39640 | |
39641 | adr = AREG((Opcode >> 0) & 7); |
39642 | AREG((Opcode >> 0) & 7) += 2; |
39643 | PRE_IO |
39644 | READ_WORD_F(adr, src) |
39645 | flag_V = 0; |
39646 | flag_C = src >> 7; |
39647 | res = (src << 1) | (src >> 15); |
39648 | flag_N = res >> 8; |
39649 | flag_NotZ = res & 0x0000FFFF; |
39650 | WRITE_WORD_F(adr, res) |
39651 | POST_IO |
39652 | RET(12) |
39653 | } |
39654 | |
39655 | // ROL |
39656 | OPCODE(0xE7E0) |
39657 | { |
39658 | u32 adr, res; |
39659 | u32 src, dst; |
39660 | |
39661 | adr = AREG((Opcode >> 0) & 7) - 2; |
39662 | AREG((Opcode >> 0) & 7) = adr; |
39663 | PRE_IO |
39664 | READ_WORD_F(adr, src) |
39665 | flag_V = 0; |
39666 | flag_C = src >> 7; |
39667 | res = (src << 1) | (src >> 15); |
39668 | flag_N = res >> 8; |
39669 | flag_NotZ = res & 0x0000FFFF; |
39670 | WRITE_WORD_F(adr, res) |
39671 | POST_IO |
39672 | RET(14) |
39673 | } |
39674 | |
39675 | // ROL |
39676 | OPCODE(0xE7E8) |
39677 | { |
39678 | u32 adr, res; |
39679 | u32 src, dst; |
39680 | |
39681 | FETCH_SWORD(adr); |
39682 | adr += AREG((Opcode >> 0) & 7); |
39683 | PRE_IO |
39684 | READ_WORD_F(adr, src) |
39685 | flag_V = 0; |
39686 | flag_C = src >> 7; |
39687 | res = (src << 1) | (src >> 15); |
39688 | flag_N = res >> 8; |
39689 | flag_NotZ = res & 0x0000FFFF; |
39690 | WRITE_WORD_F(adr, res) |
39691 | POST_IO |
39692 | RET(16) |
39693 | } |
39694 | |
39695 | // ROL |
39696 | OPCODE(0xE7F0) |
39697 | { |
39698 | u32 adr, res; |
39699 | u32 src, dst; |
39700 | |
39701 | adr = AREG((Opcode >> 0) & 7); |
39702 | DECODE_EXT_WORD |
39703 | PRE_IO |
39704 | READ_WORD_F(adr, src) |
39705 | flag_V = 0; |
39706 | flag_C = src >> 7; |
39707 | res = (src << 1) | (src >> 15); |
39708 | flag_N = res >> 8; |
39709 | flag_NotZ = res & 0x0000FFFF; |
39710 | WRITE_WORD_F(adr, res) |
39711 | POST_IO |
39712 | RET(18) |
39713 | } |
39714 | |
39715 | // ROL |
39716 | OPCODE(0xE7F8) |
39717 | { |
39718 | u32 adr, res; |
39719 | u32 src, dst; |
39720 | |
39721 | FETCH_SWORD(adr); |
39722 | PRE_IO |
39723 | READ_WORD_F(adr, src) |
39724 | flag_V = 0; |
39725 | flag_C = src >> 7; |
39726 | res = (src << 1) | (src >> 15); |
39727 | flag_N = res >> 8; |
39728 | flag_NotZ = res & 0x0000FFFF; |
39729 | WRITE_WORD_F(adr, res) |
39730 | POST_IO |
39731 | RET(16) |
39732 | } |
39733 | |
39734 | // ROL |
39735 | OPCODE(0xE7F9) |
39736 | { |
39737 | u32 adr, res; |
39738 | u32 src, dst; |
39739 | |
39740 | FETCH_LONG(adr); |
39741 | PRE_IO |
39742 | READ_WORD_F(adr, src) |
39743 | flag_V = 0; |
39744 | flag_C = src >> 7; |
39745 | res = (src << 1) | (src >> 15); |
39746 | flag_N = res >> 8; |
39747 | flag_NotZ = res & 0x0000FFFF; |
39748 | WRITE_WORD_F(adr, res) |
39749 | POST_IO |
39750 | RET(20) |
39751 | } |
39752 | |
39753 | // ROL |
39754 | OPCODE(0xE7DF) |
39755 | { |
39756 | u32 adr, res; |
39757 | u32 src, dst; |
39758 | |
39759 | adr = AREG(7); |
39760 | AREG(7) += 2; |
39761 | PRE_IO |
39762 | READ_WORD_F(adr, src) |
39763 | flag_V = 0; |
39764 | flag_C = src >> 7; |
39765 | res = (src << 1) | (src >> 15); |
39766 | flag_N = res >> 8; |
39767 | flag_NotZ = res & 0x0000FFFF; |
39768 | WRITE_WORD_F(adr, res) |
39769 | POST_IO |
39770 | RET(12) |
39771 | } |
39772 | |
39773 | // ROL |
39774 | OPCODE(0xE7E7) |
39775 | { |
39776 | u32 adr, res; |
39777 | u32 src, dst; |
39778 | |
39779 | adr = AREG(7) - 2; |
39780 | AREG(7) = adr; |
39781 | PRE_IO |
39782 | READ_WORD_F(adr, src) |
39783 | flag_V = 0; |
39784 | flag_C = src >> 7; |
39785 | res = (src << 1) | (src >> 15); |
39786 | flag_N = res >> 8; |
39787 | flag_NotZ = res & 0x0000FFFF; |
39788 | WRITE_WORD_F(adr, res) |
39789 | POST_IO |
39790 | RET(14) |
39791 | } |
39792 | |