70357ce5 |
1 | |
ecc8036e |
2 | #ifdef PICODRIVE_HACK |
7669591e |
3 | #define NOT_POLLING ctx->not_polling = 1; |
ecc8036e |
4 | #else |
5 | #define NOT_POLLING |
6 | #endif |
7 | |
70357ce5 |
8 | // ORI |
9 | OPCODE(0x0000) |
10 | { |
11 | u32 adr, res; |
12 | u32 src, dst; |
13 | |
14 | FETCH_BYTE(src); |
15 | res = DREGu8((Opcode >> 0) & 7); |
16 | res |= src; |
17 | flag_C = 0; |
18 | flag_V = 0; |
19 | flag_NotZ = res; |
20 | flag_N = res; |
21 | DREGu8((Opcode >> 0) & 7) = res; |
22 | RET(8) |
23 | } |
24 | |
25 | // ORI |
26 | OPCODE(0x0010) |
27 | { |
28 | u32 adr, res; |
29 | u32 src, dst; |
30 | |
31 | FETCH_BYTE(src); |
32 | adr = AREG((Opcode >> 0) & 7); |
33 | PRE_IO |
34 | READ_BYTE_F(adr, res) |
35 | res |= src; |
36 | flag_C = 0; |
37 | flag_V = 0; |
38 | flag_NotZ = res; |
39 | flag_N = res; |
40 | WRITE_BYTE_F(adr, res) |
41 | POST_IO |
42 | RET(16) |
43 | } |
44 | |
45 | // ORI |
46 | OPCODE(0x0018) |
47 | { |
48 | u32 adr, res; |
49 | u32 src, dst; |
50 | |
51 | FETCH_BYTE(src); |
52 | adr = AREG((Opcode >> 0) & 7); |
53 | AREG((Opcode >> 0) & 7) += 1; |
54 | PRE_IO |
55 | READ_BYTE_F(adr, res) |
56 | res |= src; |
57 | flag_C = 0; |
58 | flag_V = 0; |
59 | flag_NotZ = res; |
60 | flag_N = res; |
61 | WRITE_BYTE_F(adr, res) |
62 | POST_IO |
63 | RET(16) |
64 | } |
65 | |
66 | // ORI |
67 | OPCODE(0x0020) |
68 | { |
69 | u32 adr, res; |
70 | u32 src, dst; |
71 | |
72 | FETCH_BYTE(src); |
73 | adr = AREG((Opcode >> 0) & 7) - 1; |
74 | AREG((Opcode >> 0) & 7) = adr; |
75 | PRE_IO |
76 | READ_BYTE_F(adr, res) |
77 | res |= src; |
78 | flag_C = 0; |
79 | flag_V = 0; |
80 | flag_NotZ = res; |
81 | flag_N = res; |
82 | WRITE_BYTE_F(adr, res) |
83 | POST_IO |
84 | RET(18) |
85 | } |
86 | |
87 | // ORI |
88 | OPCODE(0x0028) |
89 | { |
90 | u32 adr, res; |
91 | u32 src, dst; |
92 | |
93 | FETCH_BYTE(src); |
94 | FETCH_SWORD(adr); |
95 | adr += AREG((Opcode >> 0) & 7); |
96 | PRE_IO |
97 | READ_BYTE_F(adr, res) |
98 | res |= src; |
99 | flag_C = 0; |
100 | flag_V = 0; |
101 | flag_NotZ = res; |
102 | flag_N = res; |
103 | WRITE_BYTE_F(adr, res) |
104 | POST_IO |
105 | RET(20) |
106 | } |
107 | |
108 | // ORI |
109 | OPCODE(0x0030) |
110 | { |
111 | u32 adr, res; |
112 | u32 src, dst; |
113 | |
114 | FETCH_BYTE(src); |
115 | adr = AREG((Opcode >> 0) & 7); |
116 | DECODE_EXT_WORD |
117 | PRE_IO |
118 | READ_BYTE_F(adr, res) |
119 | res |= src; |
120 | flag_C = 0; |
121 | flag_V = 0; |
122 | flag_NotZ = res; |
123 | flag_N = res; |
124 | WRITE_BYTE_F(adr, res) |
125 | POST_IO |
126 | RET(22) |
127 | } |
128 | |
129 | // ORI |
130 | OPCODE(0x0038) |
131 | { |
132 | u32 adr, res; |
133 | u32 src, dst; |
134 | |
135 | FETCH_BYTE(src); |
136 | FETCH_SWORD(adr); |
137 | PRE_IO |
138 | READ_BYTE_F(adr, res) |
139 | res |= src; |
140 | flag_C = 0; |
141 | flag_V = 0; |
142 | flag_NotZ = res; |
143 | flag_N = res; |
144 | WRITE_BYTE_F(adr, res) |
145 | POST_IO |
146 | RET(20) |
147 | } |
148 | |
149 | // ORI |
150 | OPCODE(0x0039) |
151 | { |
152 | u32 adr, res; |
153 | u32 src, dst; |
154 | |
155 | FETCH_BYTE(src); |
156 | FETCH_LONG(adr); |
157 | PRE_IO |
158 | READ_BYTE_F(adr, res) |
159 | res |= src; |
160 | flag_C = 0; |
161 | flag_V = 0; |
162 | flag_NotZ = res; |
163 | flag_N = res; |
164 | WRITE_BYTE_F(adr, res) |
165 | POST_IO |
166 | RET(24) |
167 | } |
168 | |
169 | // ORI |
170 | OPCODE(0x001F) |
171 | { |
172 | u32 adr, res; |
173 | u32 src, dst; |
174 | |
175 | FETCH_BYTE(src); |
176 | adr = AREG(7); |
177 | AREG(7) += 2; |
178 | PRE_IO |
179 | READ_BYTE_F(adr, res) |
180 | res |= src; |
181 | flag_C = 0; |
182 | flag_V = 0; |
183 | flag_NotZ = res; |
184 | flag_N = res; |
185 | WRITE_BYTE_F(adr, res) |
186 | POST_IO |
187 | RET(16) |
188 | } |
189 | |
190 | // ORI |
191 | OPCODE(0x0027) |
192 | { |
193 | u32 adr, res; |
194 | u32 src, dst; |
195 | |
196 | FETCH_BYTE(src); |
197 | adr = AREG(7) - 2; |
198 | AREG(7) = adr; |
199 | PRE_IO |
200 | READ_BYTE_F(adr, res) |
201 | res |= src; |
202 | flag_C = 0; |
203 | flag_V = 0; |
204 | flag_NotZ = res; |
205 | flag_N = res; |
206 | WRITE_BYTE_F(adr, res) |
207 | POST_IO |
208 | RET(18) |
209 | } |
210 | |
211 | // ORI |
212 | OPCODE(0x0040) |
213 | { |
214 | u32 adr, res; |
215 | u32 src, dst; |
216 | |
217 | FETCH_WORD(src); |
218 | res = DREGu16((Opcode >> 0) & 7); |
219 | res |= src; |
220 | flag_C = 0; |
221 | flag_V = 0; |
222 | flag_NotZ = res; |
223 | flag_N = res >> 8; |
224 | DREGu16((Opcode >> 0) & 7) = res; |
225 | RET(8) |
226 | } |
227 | |
228 | // ORI |
229 | OPCODE(0x0050) |
230 | { |
231 | u32 adr, res; |
232 | u32 src, dst; |
233 | |
234 | FETCH_WORD(src); |
235 | adr = AREG((Opcode >> 0) & 7); |
236 | PRE_IO |
237 | READ_WORD_F(adr, res) |
238 | res |= src; |
239 | flag_C = 0; |
240 | flag_V = 0; |
241 | flag_NotZ = res; |
242 | flag_N = res >> 8; |
243 | WRITE_WORD_F(adr, res) |
244 | POST_IO |
245 | RET(16) |
246 | } |
247 | |
248 | // ORI |
249 | OPCODE(0x0058) |
250 | { |
251 | u32 adr, res; |
252 | u32 src, dst; |
253 | |
254 | FETCH_WORD(src); |
255 | adr = AREG((Opcode >> 0) & 7); |
256 | AREG((Opcode >> 0) & 7) += 2; |
257 | PRE_IO |
258 | READ_WORD_F(adr, res) |
259 | res |= src; |
260 | flag_C = 0; |
261 | flag_V = 0; |
262 | flag_NotZ = res; |
263 | flag_N = res >> 8; |
264 | WRITE_WORD_F(adr, res) |
265 | POST_IO |
266 | RET(16) |
267 | } |
268 | |
269 | // ORI |
270 | OPCODE(0x0060) |
271 | { |
272 | u32 adr, res; |
273 | u32 src, dst; |
274 | |
275 | FETCH_WORD(src); |
276 | adr = AREG((Opcode >> 0) & 7) - 2; |
277 | AREG((Opcode >> 0) & 7) = adr; |
278 | PRE_IO |
279 | READ_WORD_F(adr, res) |
280 | res |= src; |
281 | flag_C = 0; |
282 | flag_V = 0; |
283 | flag_NotZ = res; |
284 | flag_N = res >> 8; |
285 | WRITE_WORD_F(adr, res) |
286 | POST_IO |
287 | RET(18) |
288 | } |
289 | |
290 | // ORI |
291 | OPCODE(0x0068) |
292 | { |
293 | u32 adr, res; |
294 | u32 src, dst; |
295 | |
296 | FETCH_WORD(src); |
297 | FETCH_SWORD(adr); |
298 | adr += AREG((Opcode >> 0) & 7); |
299 | PRE_IO |
300 | READ_WORD_F(adr, res) |
301 | res |= src; |
302 | flag_C = 0; |
303 | flag_V = 0; |
304 | flag_NotZ = res; |
305 | flag_N = res >> 8; |
306 | WRITE_WORD_F(adr, res) |
307 | POST_IO |
308 | RET(20) |
309 | } |
310 | |
311 | // ORI |
312 | OPCODE(0x0070) |
313 | { |
314 | u32 adr, res; |
315 | u32 src, dst; |
316 | |
317 | FETCH_WORD(src); |
318 | adr = AREG((Opcode >> 0) & 7); |
319 | DECODE_EXT_WORD |
320 | PRE_IO |
321 | READ_WORD_F(adr, res) |
322 | res |= src; |
323 | flag_C = 0; |
324 | flag_V = 0; |
325 | flag_NotZ = res; |
326 | flag_N = res >> 8; |
327 | WRITE_WORD_F(adr, res) |
328 | POST_IO |
329 | RET(22) |
330 | } |
331 | |
332 | // ORI |
333 | OPCODE(0x0078) |
334 | { |
335 | u32 adr, res; |
336 | u32 src, dst; |
337 | |
338 | FETCH_WORD(src); |
339 | FETCH_SWORD(adr); |
340 | PRE_IO |
341 | READ_WORD_F(adr, res) |
342 | res |= src; |
343 | flag_C = 0; |
344 | flag_V = 0; |
345 | flag_NotZ = res; |
346 | flag_N = res >> 8; |
347 | WRITE_WORD_F(adr, res) |
348 | POST_IO |
349 | RET(20) |
350 | } |
351 | |
352 | // ORI |
353 | OPCODE(0x0079) |
354 | { |
355 | u32 adr, res; |
356 | u32 src, dst; |
357 | |
358 | FETCH_WORD(src); |
359 | FETCH_LONG(adr); |
360 | PRE_IO |
361 | READ_WORD_F(adr, res) |
362 | res |= src; |
363 | flag_C = 0; |
364 | flag_V = 0; |
365 | flag_NotZ = res; |
366 | flag_N = res >> 8; |
367 | WRITE_WORD_F(adr, res) |
368 | POST_IO |
369 | RET(24) |
370 | } |
371 | |
372 | // ORI |
373 | OPCODE(0x005F) |
374 | { |
375 | u32 adr, res; |
376 | u32 src, dst; |
377 | |
378 | FETCH_WORD(src); |
379 | adr = AREG(7); |
380 | AREG(7) += 2; |
381 | PRE_IO |
382 | READ_WORD_F(adr, res) |
383 | res |= src; |
384 | flag_C = 0; |
385 | flag_V = 0; |
386 | flag_NotZ = res; |
387 | flag_N = res >> 8; |
388 | WRITE_WORD_F(adr, res) |
389 | POST_IO |
390 | RET(16) |
391 | } |
392 | |
393 | // ORI |
394 | OPCODE(0x0067) |
395 | { |
396 | u32 adr, res; |
397 | u32 src, dst; |
398 | |
399 | FETCH_WORD(src); |
400 | adr = AREG(7) - 2; |
401 | AREG(7) = adr; |
402 | PRE_IO |
403 | READ_WORD_F(adr, res) |
404 | res |= src; |
405 | flag_C = 0; |
406 | flag_V = 0; |
407 | flag_NotZ = res; |
408 | flag_N = res >> 8; |
409 | WRITE_WORD_F(adr, res) |
410 | POST_IO |
411 | RET(18) |
412 | } |
413 | |
414 | // ORI |
415 | OPCODE(0x0080) |
416 | { |
417 | u32 adr, res; |
418 | u32 src, dst; |
419 | |
420 | FETCH_LONG(src); |
421 | res = DREGu32((Opcode >> 0) & 7); |
422 | res |= src; |
423 | flag_C = 0; |
424 | flag_V = 0; |
425 | flag_NotZ = res; |
426 | flag_N = res >> 24; |
427 | DREGu32((Opcode >> 0) & 7) = res; |
428 | RET(16) |
429 | } |
430 | |
431 | // ORI |
432 | OPCODE(0x0090) |
433 | { |
434 | u32 adr, res; |
435 | u32 src, dst; |
436 | |
437 | FETCH_LONG(src); |
438 | adr = AREG((Opcode >> 0) & 7); |
439 | PRE_IO |
440 | READ_LONG_F(adr, res) |
441 | res |= src; |
442 | flag_C = 0; |
443 | flag_V = 0; |
444 | flag_NotZ = res; |
445 | flag_N = res >> 24; |
446 | WRITE_LONG_F(adr, res) |
447 | POST_IO |
448 | RET(28) |
449 | } |
450 | |
451 | // ORI |
452 | OPCODE(0x0098) |
453 | { |
454 | u32 adr, res; |
455 | u32 src, dst; |
456 | |
457 | FETCH_LONG(src); |
458 | adr = AREG((Opcode >> 0) & 7); |
459 | AREG((Opcode >> 0) & 7) += 4; |
460 | PRE_IO |
461 | READ_LONG_F(adr, res) |
462 | res |= src; |
463 | flag_C = 0; |
464 | flag_V = 0; |
465 | flag_NotZ = res; |
466 | flag_N = res >> 24; |
467 | WRITE_LONG_F(adr, res) |
468 | POST_IO |
469 | RET(28) |
470 | } |
471 | |
472 | // ORI |
473 | OPCODE(0x00A0) |
474 | { |
475 | u32 adr, res; |
476 | u32 src, dst; |
477 | |
478 | FETCH_LONG(src); |
479 | adr = AREG((Opcode >> 0) & 7) - 4; |
480 | AREG((Opcode >> 0) & 7) = adr; |
481 | PRE_IO |
482 | READ_LONG_F(adr, res) |
483 | res |= src; |
484 | flag_C = 0; |
485 | flag_V = 0; |
486 | flag_NotZ = res; |
487 | flag_N = res >> 24; |
488 | WRITE_LONG_F(adr, res) |
489 | POST_IO |
490 | RET(30) |
491 | } |
492 | |
493 | // ORI |
494 | OPCODE(0x00A8) |
495 | { |
496 | u32 adr, res; |
497 | u32 src, dst; |
498 | |
499 | FETCH_LONG(src); |
500 | FETCH_SWORD(adr); |
501 | adr += AREG((Opcode >> 0) & 7); |
502 | PRE_IO |
503 | READ_LONG_F(adr, res) |
504 | res |= src; |
505 | flag_C = 0; |
506 | flag_V = 0; |
507 | flag_NotZ = res; |
508 | flag_N = res >> 24; |
509 | WRITE_LONG_F(adr, res) |
510 | POST_IO |
511 | RET(32) |
512 | } |
513 | |
514 | // ORI |
515 | OPCODE(0x00B0) |
516 | { |
517 | u32 adr, res; |
518 | u32 src, dst; |
519 | |
520 | FETCH_LONG(src); |
521 | adr = AREG((Opcode >> 0) & 7); |
522 | DECODE_EXT_WORD |
523 | PRE_IO |
524 | READ_LONG_F(adr, res) |
525 | res |= src; |
526 | flag_C = 0; |
527 | flag_V = 0; |
528 | flag_NotZ = res; |
529 | flag_N = res >> 24; |
530 | WRITE_LONG_F(adr, res) |
531 | POST_IO |
532 | RET(34) |
533 | } |
534 | |
535 | // ORI |
536 | OPCODE(0x00B8) |
537 | { |
538 | u32 adr, res; |
539 | u32 src, dst; |
540 | |
541 | FETCH_LONG(src); |
542 | FETCH_SWORD(adr); |
543 | PRE_IO |
544 | READ_LONG_F(adr, res) |
545 | res |= src; |
546 | flag_C = 0; |
547 | flag_V = 0; |
548 | flag_NotZ = res; |
549 | flag_N = res >> 24; |
550 | WRITE_LONG_F(adr, res) |
551 | POST_IO |
552 | RET(32) |
553 | } |
554 | |
555 | // ORI |
556 | OPCODE(0x00B9) |
557 | { |
558 | u32 adr, res; |
559 | u32 src, dst; |
560 | |
561 | FETCH_LONG(src); |
562 | FETCH_LONG(adr); |
563 | PRE_IO |
564 | READ_LONG_F(adr, res) |
565 | res |= src; |
566 | flag_C = 0; |
567 | flag_V = 0; |
568 | flag_NotZ = res; |
569 | flag_N = res >> 24; |
570 | WRITE_LONG_F(adr, res) |
571 | POST_IO |
572 | RET(36) |
573 | } |
574 | |
575 | // ORI |
576 | OPCODE(0x009F) |
577 | { |
578 | u32 adr, res; |
579 | u32 src, dst; |
580 | |
581 | FETCH_LONG(src); |
582 | adr = AREG(7); |
583 | AREG(7) += 4; |
584 | PRE_IO |
585 | READ_LONG_F(adr, res) |
586 | res |= src; |
587 | flag_C = 0; |
588 | flag_V = 0; |
589 | flag_NotZ = res; |
590 | flag_N = res >> 24; |
591 | WRITE_LONG_F(adr, res) |
592 | POST_IO |
593 | RET(28) |
594 | } |
595 | |
596 | // ORI |
597 | OPCODE(0x00A7) |
598 | { |
599 | u32 adr, res; |
600 | u32 src, dst; |
601 | |
602 | FETCH_LONG(src); |
603 | adr = AREG(7) - 4; |
604 | AREG(7) = adr; |
605 | PRE_IO |
606 | READ_LONG_F(adr, res) |
607 | res |= src; |
608 | flag_C = 0; |
609 | flag_V = 0; |
610 | flag_NotZ = res; |
611 | flag_N = res >> 24; |
612 | WRITE_LONG_F(adr, res) |
613 | POST_IO |
614 | RET(30) |
615 | } |
616 | |
617 | // ORICCR |
618 | OPCODE(0x003C) |
619 | { |
620 | u32 adr, res; |
621 | u32 src, dst; |
622 | |
623 | FETCH_BYTE(res); |
624 | res &= M68K_CCR_MASK; |
625 | res |= GET_CCR; |
626 | SET_CCR(res) |
627 | RET(20) |
628 | } |
629 | |
630 | // ORISR |
631 | OPCODE(0x007C) |
632 | { |
633 | u32 adr, res; |
634 | u32 src, dst; |
635 | |
636 | if (flag_S) |
637 | { |
638 | u32 res; |
639 | FETCH_WORD(res); |
640 | res &= M68K_SR_MASK; |
641 | res |= GET_SR; |
642 | SET_SR(res) |
643 | CHECK_INT_TO_JUMP(20) |
644 | } |
645 | else |
646 | { |
7669591e |
647 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
70357ce5 |
648 | #ifdef USE_CYCLONE_TIMING |
649 | RET(0) |
650 | #else |
651 | RET(4) |
652 | #endif |
653 | } |
654 | RET(20) |
655 | } |
656 | |
657 | // ANDI |
658 | OPCODE(0x0200) |
659 | { |
660 | u32 adr, res; |
661 | u32 src, dst; |
662 | |
663 | FETCH_BYTE(src); |
664 | res = DREGu8((Opcode >> 0) & 7); |
665 | res &= src; |
666 | flag_C = 0; |
667 | flag_V = 0; |
668 | flag_NotZ = res; |
669 | flag_N = res; |
670 | DREGu8((Opcode >> 0) & 7) = res; |
671 | RET(8) |
672 | } |
673 | |
674 | // ANDI |
675 | OPCODE(0x0210) |
676 | { |
677 | u32 adr, res; |
678 | u32 src, dst; |
679 | |
680 | FETCH_BYTE(src); |
681 | adr = AREG((Opcode >> 0) & 7); |
682 | PRE_IO |
683 | READ_BYTE_F(adr, res) |
684 | res &= src; |
685 | flag_C = 0; |
686 | flag_V = 0; |
687 | flag_NotZ = res; |
688 | flag_N = res; |
689 | WRITE_BYTE_F(adr, res) |
690 | POST_IO |
691 | RET(16) |
692 | } |
693 | |
694 | // ANDI |
695 | OPCODE(0x0218) |
696 | { |
697 | u32 adr, res; |
698 | u32 src, dst; |
699 | |
700 | FETCH_BYTE(src); |
701 | adr = AREG((Opcode >> 0) & 7); |
702 | AREG((Opcode >> 0) & 7) += 1; |
703 | PRE_IO |
704 | READ_BYTE_F(adr, res) |
705 | res &= src; |
706 | flag_C = 0; |
707 | flag_V = 0; |
708 | flag_NotZ = res; |
709 | flag_N = res; |
710 | WRITE_BYTE_F(adr, res) |
711 | POST_IO |
712 | RET(16) |
713 | } |
714 | |
715 | // ANDI |
716 | OPCODE(0x0220) |
717 | { |
718 | u32 adr, res; |
719 | u32 src, dst; |
720 | |
721 | FETCH_BYTE(src); |
722 | adr = AREG((Opcode >> 0) & 7) - 1; |
723 | AREG((Opcode >> 0) & 7) = adr; |
724 | PRE_IO |
725 | READ_BYTE_F(adr, res) |
726 | res &= src; |
727 | flag_C = 0; |
728 | flag_V = 0; |
729 | flag_NotZ = res; |
730 | flag_N = res; |
731 | WRITE_BYTE_F(adr, res) |
732 | POST_IO |
733 | RET(18) |
734 | } |
735 | |
736 | // ANDI |
737 | OPCODE(0x0228) |
738 | { |
739 | u32 adr, res; |
740 | u32 src, dst; |
741 | |
742 | FETCH_BYTE(src); |
743 | FETCH_SWORD(adr); |
744 | adr += AREG((Opcode >> 0) & 7); |
745 | PRE_IO |
746 | READ_BYTE_F(adr, res) |
747 | res &= src; |
748 | flag_C = 0; |
749 | flag_V = 0; |
750 | flag_NotZ = res; |
751 | flag_N = res; |
752 | WRITE_BYTE_F(adr, res) |
753 | POST_IO |
754 | RET(20) |
755 | } |
756 | |
757 | // ANDI |
758 | OPCODE(0x0230) |
759 | { |
760 | u32 adr, res; |
761 | u32 src, dst; |
762 | |
763 | FETCH_BYTE(src); |
764 | adr = AREG((Opcode >> 0) & 7); |
765 | DECODE_EXT_WORD |
766 | PRE_IO |
767 | READ_BYTE_F(adr, res) |
768 | res &= src; |
769 | flag_C = 0; |
770 | flag_V = 0; |
771 | flag_NotZ = res; |
772 | flag_N = res; |
773 | WRITE_BYTE_F(adr, res) |
774 | POST_IO |
775 | RET(22) |
776 | } |
777 | |
778 | // ANDI |
779 | OPCODE(0x0238) |
780 | { |
781 | u32 adr, res; |
782 | u32 src, dst; |
783 | |
784 | FETCH_BYTE(src); |
785 | FETCH_SWORD(adr); |
786 | PRE_IO |
787 | READ_BYTE_F(adr, res) |
788 | res &= src; |
789 | flag_C = 0; |
790 | flag_V = 0; |
791 | flag_NotZ = res; |
792 | flag_N = res; |
793 | WRITE_BYTE_F(adr, res) |
794 | POST_IO |
795 | RET(20) |
796 | } |
797 | |
798 | // ANDI |
799 | OPCODE(0x0239) |
800 | { |
801 | u32 adr, res; |
802 | u32 src, dst; |
803 | |
804 | FETCH_BYTE(src); |
805 | FETCH_LONG(adr); |
806 | PRE_IO |
807 | READ_BYTE_F(adr, res) |
808 | res &= src; |
809 | flag_C = 0; |
810 | flag_V = 0; |
811 | flag_NotZ = res; |
812 | flag_N = res; |
813 | WRITE_BYTE_F(adr, res) |
814 | POST_IO |
815 | RET(24) |
816 | } |
817 | |
818 | // ANDI |
819 | OPCODE(0x021F) |
820 | { |
821 | u32 adr, res; |
822 | u32 src, dst; |
823 | |
824 | FETCH_BYTE(src); |
825 | adr = AREG(7); |
826 | AREG(7) += 2; |
827 | PRE_IO |
828 | READ_BYTE_F(adr, res) |
829 | res &= src; |
830 | flag_C = 0; |
831 | flag_V = 0; |
832 | flag_NotZ = res; |
833 | flag_N = res; |
834 | WRITE_BYTE_F(adr, res) |
835 | POST_IO |
836 | RET(16) |
837 | } |
838 | |
839 | // ANDI |
840 | OPCODE(0x0227) |
841 | { |
842 | u32 adr, res; |
843 | u32 src, dst; |
844 | |
845 | FETCH_BYTE(src); |
846 | adr = AREG(7) - 2; |
847 | AREG(7) = adr; |
848 | PRE_IO |
849 | READ_BYTE_F(adr, res) |
850 | res &= src; |
851 | flag_C = 0; |
852 | flag_V = 0; |
853 | flag_NotZ = res; |
854 | flag_N = res; |
855 | WRITE_BYTE_F(adr, res) |
856 | POST_IO |
857 | RET(18) |
858 | } |
859 | |
860 | // ANDI |
861 | OPCODE(0x0240) |
862 | { |
863 | u32 adr, res; |
864 | u32 src, dst; |
865 | |
866 | FETCH_WORD(src); |
867 | res = DREGu16((Opcode >> 0) & 7); |
868 | res &= src; |
869 | flag_C = 0; |
870 | flag_V = 0; |
871 | flag_NotZ = res; |
872 | flag_N = res >> 8; |
873 | DREGu16((Opcode >> 0) & 7) = res; |
874 | RET(8) |
875 | } |
876 | |
877 | // ANDI |
878 | OPCODE(0x0250) |
879 | { |
880 | u32 adr, res; |
881 | u32 src, dst; |
882 | |
883 | FETCH_WORD(src); |
884 | adr = AREG((Opcode >> 0) & 7); |
885 | PRE_IO |
886 | READ_WORD_F(adr, res) |
887 | res &= src; |
888 | flag_C = 0; |
889 | flag_V = 0; |
890 | flag_NotZ = res; |
891 | flag_N = res >> 8; |
892 | WRITE_WORD_F(adr, res) |
893 | POST_IO |
894 | RET(16) |
895 | } |
896 | |
897 | // ANDI |
898 | OPCODE(0x0258) |
899 | { |
900 | u32 adr, res; |
901 | u32 src, dst; |
902 | |
903 | FETCH_WORD(src); |
904 | adr = AREG((Opcode >> 0) & 7); |
905 | AREG((Opcode >> 0) & 7) += 2; |
906 | PRE_IO |
907 | READ_WORD_F(adr, res) |
908 | res &= src; |
909 | flag_C = 0; |
910 | flag_V = 0; |
911 | flag_NotZ = res; |
912 | flag_N = res >> 8; |
913 | WRITE_WORD_F(adr, res) |
914 | POST_IO |
915 | RET(16) |
916 | } |
917 | |
918 | // ANDI |
919 | OPCODE(0x0260) |
920 | { |
921 | u32 adr, res; |
922 | u32 src, dst; |
923 | |
924 | FETCH_WORD(src); |
925 | adr = AREG((Opcode >> 0) & 7) - 2; |
926 | AREG((Opcode >> 0) & 7) = adr; |
927 | PRE_IO |
928 | READ_WORD_F(adr, res) |
929 | res &= src; |
930 | flag_C = 0; |
931 | flag_V = 0; |
932 | flag_NotZ = res; |
933 | flag_N = res >> 8; |
934 | WRITE_WORD_F(adr, res) |
935 | POST_IO |
936 | RET(18) |
937 | } |
938 | |
939 | // ANDI |
940 | OPCODE(0x0268) |
941 | { |
942 | u32 adr, res; |
943 | u32 src, dst; |
944 | |
945 | FETCH_WORD(src); |
946 | FETCH_SWORD(adr); |
947 | adr += AREG((Opcode >> 0) & 7); |
948 | PRE_IO |
949 | READ_WORD_F(adr, res) |
950 | res &= src; |
951 | flag_C = 0; |
952 | flag_V = 0; |
953 | flag_NotZ = res; |
954 | flag_N = res >> 8; |
955 | WRITE_WORD_F(adr, res) |
956 | POST_IO |
957 | RET(20) |
958 | } |
959 | |
960 | // ANDI |
961 | OPCODE(0x0270) |
962 | { |
963 | u32 adr, res; |
964 | u32 src, dst; |
965 | |
966 | FETCH_WORD(src); |
967 | adr = AREG((Opcode >> 0) & 7); |
968 | DECODE_EXT_WORD |
969 | PRE_IO |
970 | READ_WORD_F(adr, res) |
971 | res &= src; |
972 | flag_C = 0; |
973 | flag_V = 0; |
974 | flag_NotZ = res; |
975 | flag_N = res >> 8; |
976 | WRITE_WORD_F(adr, res) |
977 | POST_IO |
978 | RET(22) |
979 | } |
980 | |
981 | // ANDI |
982 | OPCODE(0x0278) |
983 | { |
984 | u32 adr, res; |
985 | u32 src, dst; |
986 | |
987 | FETCH_WORD(src); |
988 | FETCH_SWORD(adr); |
989 | PRE_IO |
990 | READ_WORD_F(adr, res) |
991 | res &= src; |
992 | flag_C = 0; |
993 | flag_V = 0; |
994 | flag_NotZ = res; |
995 | flag_N = res >> 8; |
996 | WRITE_WORD_F(adr, res) |
997 | POST_IO |
998 | RET(20) |
999 | } |
1000 | |
1001 | // ANDI |
1002 | OPCODE(0x0279) |
1003 | { |
1004 | u32 adr, res; |
1005 | u32 src, dst; |
1006 | |
1007 | FETCH_WORD(src); |
1008 | FETCH_LONG(adr); |
1009 | PRE_IO |
1010 | READ_WORD_F(adr, res) |
1011 | res &= src; |
1012 | flag_C = 0; |
1013 | flag_V = 0; |
1014 | flag_NotZ = res; |
1015 | flag_N = res >> 8; |
1016 | WRITE_WORD_F(adr, res) |
1017 | POST_IO |
1018 | RET(24) |
1019 | } |
1020 | |
1021 | // ANDI |
1022 | OPCODE(0x025F) |
1023 | { |
1024 | u32 adr, res; |
1025 | u32 src, dst; |
1026 | |
1027 | FETCH_WORD(src); |
1028 | adr = AREG(7); |
1029 | AREG(7) += 2; |
1030 | PRE_IO |
1031 | READ_WORD_F(adr, res) |
1032 | res &= src; |
1033 | flag_C = 0; |
1034 | flag_V = 0; |
1035 | flag_NotZ = res; |
1036 | flag_N = res >> 8; |
1037 | WRITE_WORD_F(adr, res) |
1038 | POST_IO |
1039 | RET(16) |
1040 | } |
1041 | |
1042 | // ANDI |
1043 | OPCODE(0x0267) |
1044 | { |
1045 | u32 adr, res; |
1046 | u32 src, dst; |
1047 | |
1048 | FETCH_WORD(src); |
1049 | adr = AREG(7) - 2; |
1050 | AREG(7) = adr; |
1051 | PRE_IO |
1052 | READ_WORD_F(adr, res) |
1053 | res &= src; |
1054 | flag_C = 0; |
1055 | flag_V = 0; |
1056 | flag_NotZ = res; |
1057 | flag_N = res >> 8; |
1058 | WRITE_WORD_F(adr, res) |
1059 | POST_IO |
1060 | RET(18) |
1061 | } |
1062 | |
1063 | // ANDI |
1064 | OPCODE(0x0280) |
1065 | { |
1066 | u32 adr, res; |
1067 | u32 src, dst; |
1068 | |
1069 | FETCH_LONG(src); |
1070 | res = DREGu32((Opcode >> 0) & 7); |
1071 | res &= src; |
1072 | flag_C = 0; |
1073 | flag_V = 0; |
1074 | flag_NotZ = res; |
1075 | flag_N = res >> 24; |
1076 | DREGu32((Opcode >> 0) & 7) = res; |
70357ce5 |
1077 | RET(16) |
70357ce5 |
1078 | } |
1079 | |
1080 | // ANDI |
1081 | OPCODE(0x0290) |
1082 | { |
1083 | u32 adr, res; |
1084 | u32 src, dst; |
1085 | |
1086 | FETCH_LONG(src); |
1087 | adr = AREG((Opcode >> 0) & 7); |
1088 | PRE_IO |
1089 | READ_LONG_F(adr, res) |
1090 | res &= src; |
1091 | flag_C = 0; |
1092 | flag_V = 0; |
1093 | flag_NotZ = res; |
1094 | flag_N = res >> 24; |
1095 | WRITE_LONG_F(adr, res) |
1096 | POST_IO |
1097 | RET(28) |
1098 | } |
1099 | |
1100 | // ANDI |
1101 | OPCODE(0x0298) |
1102 | { |
1103 | u32 adr, res; |
1104 | u32 src, dst; |
1105 | |
1106 | FETCH_LONG(src); |
1107 | adr = AREG((Opcode >> 0) & 7); |
1108 | AREG((Opcode >> 0) & 7) += 4; |
1109 | PRE_IO |
1110 | READ_LONG_F(adr, res) |
1111 | res &= src; |
1112 | flag_C = 0; |
1113 | flag_V = 0; |
1114 | flag_NotZ = res; |
1115 | flag_N = res >> 24; |
1116 | WRITE_LONG_F(adr, res) |
1117 | POST_IO |
1118 | RET(28) |
1119 | } |
1120 | |
1121 | // ANDI |
1122 | OPCODE(0x02A0) |
1123 | { |
1124 | u32 adr, res; |
1125 | u32 src, dst; |
1126 | |
1127 | FETCH_LONG(src); |
1128 | adr = AREG((Opcode >> 0) & 7) - 4; |
1129 | AREG((Opcode >> 0) & 7) = adr; |
1130 | PRE_IO |
1131 | READ_LONG_F(adr, res) |
1132 | res &= src; |
1133 | flag_C = 0; |
1134 | flag_V = 0; |
1135 | flag_NotZ = res; |
1136 | flag_N = res >> 24; |
1137 | WRITE_LONG_F(adr, res) |
1138 | POST_IO |
1139 | RET(30) |
1140 | } |
1141 | |
1142 | // ANDI |
1143 | OPCODE(0x02A8) |
1144 | { |
1145 | u32 adr, res; |
1146 | u32 src, dst; |
1147 | |
1148 | FETCH_LONG(src); |
1149 | FETCH_SWORD(adr); |
1150 | adr += AREG((Opcode >> 0) & 7); |
1151 | PRE_IO |
1152 | READ_LONG_F(adr, res) |
1153 | res &= src; |
1154 | flag_C = 0; |
1155 | flag_V = 0; |
1156 | flag_NotZ = res; |
1157 | flag_N = res >> 24; |
1158 | WRITE_LONG_F(adr, res) |
1159 | POST_IO |
1160 | RET(32) |
1161 | } |
1162 | |
1163 | // ANDI |
1164 | OPCODE(0x02B0) |
1165 | { |
1166 | u32 adr, res; |
1167 | u32 src, dst; |
1168 | |
1169 | FETCH_LONG(src); |
1170 | adr = AREG((Opcode >> 0) & 7); |
1171 | DECODE_EXT_WORD |
1172 | PRE_IO |
1173 | READ_LONG_F(adr, res) |
1174 | res &= src; |
1175 | flag_C = 0; |
1176 | flag_V = 0; |
1177 | flag_NotZ = res; |
1178 | flag_N = res >> 24; |
1179 | WRITE_LONG_F(adr, res) |
1180 | POST_IO |
1181 | RET(34) |
1182 | } |
1183 | |
1184 | // ANDI |
1185 | OPCODE(0x02B8) |
1186 | { |
1187 | u32 adr, res; |
1188 | u32 src, dst; |
1189 | |
1190 | FETCH_LONG(src); |
1191 | FETCH_SWORD(adr); |
1192 | PRE_IO |
1193 | READ_LONG_F(adr, res) |
1194 | res &= src; |
1195 | flag_C = 0; |
1196 | flag_V = 0; |
1197 | flag_NotZ = res; |
1198 | flag_N = res >> 24; |
1199 | WRITE_LONG_F(adr, res) |
1200 | POST_IO |
1201 | RET(32) |
1202 | } |
1203 | |
1204 | // ANDI |
1205 | OPCODE(0x02B9) |
1206 | { |
1207 | u32 adr, res; |
1208 | u32 src, dst; |
1209 | |
1210 | FETCH_LONG(src); |
1211 | FETCH_LONG(adr); |
1212 | PRE_IO |
1213 | READ_LONG_F(adr, res) |
1214 | res &= src; |
1215 | flag_C = 0; |
1216 | flag_V = 0; |
1217 | flag_NotZ = res; |
1218 | flag_N = res >> 24; |
1219 | WRITE_LONG_F(adr, res) |
1220 | POST_IO |
1221 | RET(36) |
1222 | } |
1223 | |
1224 | // ANDI |
1225 | OPCODE(0x029F) |
1226 | { |
1227 | u32 adr, res; |
1228 | u32 src, dst; |
1229 | |
1230 | FETCH_LONG(src); |
1231 | adr = AREG(7); |
1232 | AREG(7) += 4; |
1233 | PRE_IO |
1234 | READ_LONG_F(adr, res) |
1235 | res &= src; |
1236 | flag_C = 0; |
1237 | flag_V = 0; |
1238 | flag_NotZ = res; |
1239 | flag_N = res >> 24; |
1240 | WRITE_LONG_F(adr, res) |
1241 | POST_IO |
1242 | RET(28) |
1243 | } |
1244 | |
1245 | // ANDI |
1246 | OPCODE(0x02A7) |
1247 | { |
1248 | u32 adr, res; |
1249 | u32 src, dst; |
1250 | |
1251 | FETCH_LONG(src); |
1252 | adr = AREG(7) - 4; |
1253 | AREG(7) = adr; |
1254 | PRE_IO |
1255 | READ_LONG_F(adr, res) |
1256 | res &= src; |
1257 | flag_C = 0; |
1258 | flag_V = 0; |
1259 | flag_NotZ = res; |
1260 | flag_N = res >> 24; |
1261 | WRITE_LONG_F(adr, res) |
1262 | POST_IO |
1263 | RET(30) |
1264 | } |
1265 | |
1266 | // ANDICCR |
1267 | OPCODE(0x023C) |
1268 | { |
1269 | u32 adr, res; |
1270 | u32 src, dst; |
1271 | |
1272 | FETCH_BYTE(res); |
1273 | res &= M68K_CCR_MASK; |
1274 | res &= GET_CCR; |
1275 | SET_CCR(res) |
1276 | RET(20) |
1277 | } |
1278 | |
1279 | // ANDISR |
1280 | OPCODE(0x027C) |
1281 | { |
1282 | u32 adr, res; |
1283 | u32 src, dst; |
1284 | |
1285 | if (flag_S) |
1286 | { |
1287 | FETCH_WORD(res); |
1288 | res &= M68K_SR_MASK; |
1289 | res &= GET_SR; |
1290 | SET_SR(res) |
1291 | if (!flag_S) |
1292 | { |
1293 | res = AREG(7); |
1294 | AREG(7) = ASP; |
1295 | ASP = res; |
1296 | } |
1297 | CHECK_INT_TO_JUMP(20) |
1298 | } |
1299 | else |
1300 | { |
7669591e |
1301 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
1302 | #ifdef USE_CYCLONE_TIMING |
1303 | RET(0) |
1304 | #else |
70357ce5 |
1305 | RET(4) |
3f591822 |
1306 | #endif |
70357ce5 |
1307 | } |
1308 | RET(20) |
1309 | } |
1310 | |
1311 | // EORI |
1312 | OPCODE(0x0A00) |
1313 | { |
1314 | u32 adr, res; |
1315 | u32 src, dst; |
1316 | |
1317 | FETCH_BYTE(src); |
1318 | res = DREGu8((Opcode >> 0) & 7); |
1319 | res ^= src; |
1320 | flag_C = 0; |
1321 | flag_V = 0; |
1322 | flag_NotZ = res; |
1323 | flag_N = res; |
1324 | DREGu8((Opcode >> 0) & 7) = res; |
1325 | RET(8) |
1326 | } |
1327 | |
1328 | // EORI |
1329 | OPCODE(0x0A10) |
1330 | { |
1331 | u32 adr, res; |
1332 | u32 src, dst; |
1333 | |
1334 | FETCH_BYTE(src); |
1335 | adr = AREG((Opcode >> 0) & 7); |
1336 | PRE_IO |
1337 | READ_BYTE_F(adr, res) |
1338 | res ^= src; |
1339 | flag_C = 0; |
1340 | flag_V = 0; |
1341 | flag_NotZ = res; |
1342 | flag_N = res; |
1343 | WRITE_BYTE_F(adr, res) |
1344 | POST_IO |
1345 | RET(16) |
1346 | } |
1347 | |
1348 | // EORI |
1349 | OPCODE(0x0A18) |
1350 | { |
1351 | u32 adr, res; |
1352 | u32 src, dst; |
1353 | |
1354 | FETCH_BYTE(src); |
1355 | adr = AREG((Opcode >> 0) & 7); |
1356 | AREG((Opcode >> 0) & 7) += 1; |
1357 | PRE_IO |
1358 | READ_BYTE_F(adr, res) |
1359 | res ^= src; |
1360 | flag_C = 0; |
1361 | flag_V = 0; |
1362 | flag_NotZ = res; |
1363 | flag_N = res; |
1364 | WRITE_BYTE_F(adr, res) |
1365 | POST_IO |
1366 | RET(16) |
1367 | } |
1368 | |
1369 | // EORI |
1370 | OPCODE(0x0A20) |
1371 | { |
1372 | u32 adr, res; |
1373 | u32 src, dst; |
1374 | |
1375 | FETCH_BYTE(src); |
1376 | adr = AREG((Opcode >> 0) & 7) - 1; |
1377 | AREG((Opcode >> 0) & 7) = adr; |
1378 | PRE_IO |
1379 | READ_BYTE_F(adr, res) |
1380 | res ^= src; |
1381 | flag_C = 0; |
1382 | flag_V = 0; |
1383 | flag_NotZ = res; |
1384 | flag_N = res; |
1385 | WRITE_BYTE_F(adr, res) |
1386 | POST_IO |
1387 | RET(18) |
1388 | } |
1389 | |
1390 | // EORI |
1391 | OPCODE(0x0A28) |
1392 | { |
1393 | u32 adr, res; |
1394 | u32 src, dst; |
1395 | |
1396 | FETCH_BYTE(src); |
1397 | FETCH_SWORD(adr); |
1398 | adr += AREG((Opcode >> 0) & 7); |
1399 | PRE_IO |
1400 | READ_BYTE_F(adr, res) |
1401 | res ^= src; |
1402 | flag_C = 0; |
1403 | flag_V = 0; |
1404 | flag_NotZ = res; |
1405 | flag_N = res; |
1406 | WRITE_BYTE_F(adr, res) |
1407 | POST_IO |
1408 | RET(20) |
1409 | } |
1410 | |
1411 | // EORI |
1412 | OPCODE(0x0A30) |
1413 | { |
1414 | u32 adr, res; |
1415 | u32 src, dst; |
1416 | |
1417 | FETCH_BYTE(src); |
1418 | adr = AREG((Opcode >> 0) & 7); |
1419 | DECODE_EXT_WORD |
1420 | PRE_IO |
1421 | READ_BYTE_F(adr, res) |
1422 | res ^= src; |
1423 | flag_C = 0; |
1424 | flag_V = 0; |
1425 | flag_NotZ = res; |
1426 | flag_N = res; |
1427 | WRITE_BYTE_F(adr, res) |
1428 | POST_IO |
1429 | RET(22) |
1430 | } |
1431 | |
1432 | // EORI |
1433 | OPCODE(0x0A38) |
1434 | { |
1435 | u32 adr, res; |
1436 | u32 src, dst; |
1437 | |
1438 | FETCH_BYTE(src); |
1439 | FETCH_SWORD(adr); |
1440 | PRE_IO |
1441 | READ_BYTE_F(adr, res) |
1442 | res ^= src; |
1443 | flag_C = 0; |
1444 | flag_V = 0; |
1445 | flag_NotZ = res; |
1446 | flag_N = res; |
1447 | WRITE_BYTE_F(adr, res) |
1448 | POST_IO |
1449 | RET(20) |
1450 | } |
1451 | |
1452 | // EORI |
1453 | OPCODE(0x0A39) |
1454 | { |
1455 | u32 adr, res; |
1456 | u32 src, dst; |
1457 | |
1458 | FETCH_BYTE(src); |
1459 | FETCH_LONG(adr); |
1460 | PRE_IO |
1461 | READ_BYTE_F(adr, res) |
1462 | res ^= src; |
1463 | flag_C = 0; |
1464 | flag_V = 0; |
1465 | flag_NotZ = res; |
1466 | flag_N = res; |
1467 | WRITE_BYTE_F(adr, res) |
1468 | POST_IO |
1469 | RET(24) |
1470 | } |
1471 | |
1472 | // EORI |
1473 | OPCODE(0x0A1F) |
1474 | { |
1475 | u32 adr, res; |
1476 | u32 src, dst; |
1477 | |
1478 | FETCH_BYTE(src); |
1479 | adr = AREG(7); |
1480 | AREG(7) += 2; |
1481 | PRE_IO |
1482 | READ_BYTE_F(adr, res) |
1483 | res ^= src; |
1484 | flag_C = 0; |
1485 | flag_V = 0; |
1486 | flag_NotZ = res; |
1487 | flag_N = res; |
1488 | WRITE_BYTE_F(adr, res) |
1489 | POST_IO |
1490 | RET(16) |
1491 | } |
1492 | |
1493 | // EORI |
1494 | OPCODE(0x0A27) |
1495 | { |
1496 | u32 adr, res; |
1497 | u32 src, dst; |
1498 | |
1499 | FETCH_BYTE(src); |
1500 | adr = AREG(7) - 2; |
1501 | AREG(7) = adr; |
1502 | PRE_IO |
1503 | READ_BYTE_F(adr, res) |
1504 | res ^= src; |
1505 | flag_C = 0; |
1506 | flag_V = 0; |
1507 | flag_NotZ = res; |
1508 | flag_N = res; |
1509 | WRITE_BYTE_F(adr, res) |
1510 | POST_IO |
1511 | RET(18) |
1512 | } |
1513 | |
1514 | // EORI |
1515 | OPCODE(0x0A40) |
1516 | { |
1517 | u32 adr, res; |
1518 | u32 src, dst; |
1519 | |
1520 | FETCH_WORD(src); |
1521 | res = DREGu16((Opcode >> 0) & 7); |
1522 | res ^= src; |
1523 | flag_C = 0; |
1524 | flag_V = 0; |
1525 | flag_NotZ = res; |
1526 | flag_N = res >> 8; |
1527 | DREGu16((Opcode >> 0) & 7) = res; |
1528 | RET(8) |
1529 | } |
1530 | |
1531 | // EORI |
1532 | OPCODE(0x0A50) |
1533 | { |
1534 | u32 adr, res; |
1535 | u32 src, dst; |
1536 | |
1537 | FETCH_WORD(src); |
1538 | adr = AREG((Opcode >> 0) & 7); |
1539 | PRE_IO |
1540 | READ_WORD_F(adr, res) |
1541 | res ^= src; |
1542 | flag_C = 0; |
1543 | flag_V = 0; |
1544 | flag_NotZ = res; |
1545 | flag_N = res >> 8; |
1546 | WRITE_WORD_F(adr, res) |
1547 | POST_IO |
1548 | RET(16) |
1549 | } |
1550 | |
1551 | // EORI |
1552 | OPCODE(0x0A58) |
1553 | { |
1554 | u32 adr, res; |
1555 | u32 src, dst; |
1556 | |
1557 | FETCH_WORD(src); |
1558 | adr = AREG((Opcode >> 0) & 7); |
1559 | AREG((Opcode >> 0) & 7) += 2; |
1560 | PRE_IO |
1561 | READ_WORD_F(adr, res) |
1562 | res ^= src; |
1563 | flag_C = 0; |
1564 | flag_V = 0; |
1565 | flag_NotZ = res; |
1566 | flag_N = res >> 8; |
1567 | WRITE_WORD_F(adr, res) |
1568 | POST_IO |
1569 | RET(16) |
1570 | } |
1571 | |
1572 | // EORI |
1573 | OPCODE(0x0A60) |
1574 | { |
1575 | u32 adr, res; |
1576 | u32 src, dst; |
1577 | |
1578 | FETCH_WORD(src); |
1579 | adr = AREG((Opcode >> 0) & 7) - 2; |
1580 | AREG((Opcode >> 0) & 7) = adr; |
1581 | PRE_IO |
1582 | READ_WORD_F(adr, res) |
1583 | res ^= src; |
1584 | flag_C = 0; |
1585 | flag_V = 0; |
1586 | flag_NotZ = res; |
1587 | flag_N = res >> 8; |
1588 | WRITE_WORD_F(adr, res) |
1589 | POST_IO |
1590 | RET(18) |
1591 | } |
1592 | |
1593 | // EORI |
1594 | OPCODE(0x0A68) |
1595 | { |
1596 | u32 adr, res; |
1597 | u32 src, dst; |
1598 | |
1599 | FETCH_WORD(src); |
1600 | FETCH_SWORD(adr); |
1601 | adr += AREG((Opcode >> 0) & 7); |
1602 | PRE_IO |
1603 | READ_WORD_F(adr, res) |
1604 | res ^= src; |
1605 | flag_C = 0; |
1606 | flag_V = 0; |
1607 | flag_NotZ = res; |
1608 | flag_N = res >> 8; |
1609 | WRITE_WORD_F(adr, res) |
1610 | POST_IO |
1611 | RET(20) |
1612 | } |
1613 | |
1614 | // EORI |
1615 | OPCODE(0x0A70) |
1616 | { |
1617 | u32 adr, res; |
1618 | u32 src, dst; |
1619 | |
1620 | FETCH_WORD(src); |
1621 | adr = AREG((Opcode >> 0) & 7); |
1622 | DECODE_EXT_WORD |
1623 | PRE_IO |
1624 | READ_WORD_F(adr, res) |
1625 | res ^= src; |
1626 | flag_C = 0; |
1627 | flag_V = 0; |
1628 | flag_NotZ = res; |
1629 | flag_N = res >> 8; |
1630 | WRITE_WORD_F(adr, res) |
1631 | POST_IO |
1632 | RET(22) |
1633 | } |
1634 | |
1635 | // EORI |
1636 | OPCODE(0x0A78) |
1637 | { |
1638 | u32 adr, res; |
1639 | u32 src, dst; |
1640 | |
1641 | FETCH_WORD(src); |
1642 | FETCH_SWORD(adr); |
1643 | PRE_IO |
1644 | READ_WORD_F(adr, res) |
1645 | res ^= src; |
1646 | flag_C = 0; |
1647 | flag_V = 0; |
1648 | flag_NotZ = res; |
1649 | flag_N = res >> 8; |
1650 | WRITE_WORD_F(adr, res) |
1651 | POST_IO |
1652 | RET(20) |
1653 | } |
1654 | |
1655 | // EORI |
1656 | OPCODE(0x0A79) |
1657 | { |
1658 | u32 adr, res; |
1659 | u32 src, dst; |
1660 | |
1661 | FETCH_WORD(src); |
1662 | FETCH_LONG(adr); |
1663 | PRE_IO |
1664 | READ_WORD_F(adr, res) |
1665 | res ^= src; |
1666 | flag_C = 0; |
1667 | flag_V = 0; |
1668 | flag_NotZ = res; |
1669 | flag_N = res >> 8; |
1670 | WRITE_WORD_F(adr, res) |
1671 | POST_IO |
1672 | RET(24) |
1673 | } |
1674 | |
1675 | // EORI |
1676 | OPCODE(0x0A5F) |
1677 | { |
1678 | u32 adr, res; |
1679 | u32 src, dst; |
1680 | |
1681 | FETCH_WORD(src); |
1682 | adr = AREG(7); |
1683 | AREG(7) += 2; |
1684 | PRE_IO |
1685 | READ_WORD_F(adr, res) |
1686 | res ^= src; |
1687 | flag_C = 0; |
1688 | flag_V = 0; |
1689 | flag_NotZ = res; |
1690 | flag_N = res >> 8; |
1691 | WRITE_WORD_F(adr, res) |
1692 | POST_IO |
1693 | RET(16) |
1694 | } |
1695 | |
1696 | // EORI |
1697 | OPCODE(0x0A67) |
1698 | { |
1699 | u32 adr, res; |
1700 | u32 src, dst; |
1701 | |
1702 | FETCH_WORD(src); |
1703 | adr = AREG(7) - 2; |
1704 | AREG(7) = adr; |
1705 | PRE_IO |
1706 | READ_WORD_F(adr, res) |
1707 | res ^= src; |
1708 | flag_C = 0; |
1709 | flag_V = 0; |
1710 | flag_NotZ = res; |
1711 | flag_N = res >> 8; |
1712 | WRITE_WORD_F(adr, res) |
1713 | POST_IO |
1714 | RET(18) |
1715 | } |
1716 | |
1717 | // EORI |
1718 | OPCODE(0x0A80) |
1719 | { |
1720 | u32 adr, res; |
1721 | u32 src, dst; |
1722 | |
1723 | FETCH_LONG(src); |
1724 | res = DREGu32((Opcode >> 0) & 7); |
1725 | res ^= src; |
1726 | flag_C = 0; |
1727 | flag_V = 0; |
1728 | flag_NotZ = res; |
1729 | flag_N = res >> 24; |
1730 | DREGu32((Opcode >> 0) & 7) = res; |
1731 | RET(16) |
1732 | } |
1733 | |
1734 | // EORI |
1735 | OPCODE(0x0A90) |
1736 | { |
1737 | u32 adr, res; |
1738 | u32 src, dst; |
1739 | |
1740 | FETCH_LONG(src); |
1741 | adr = AREG((Opcode >> 0) & 7); |
1742 | PRE_IO |
1743 | READ_LONG_F(adr, res) |
1744 | res ^= src; |
1745 | flag_C = 0; |
1746 | flag_V = 0; |
1747 | flag_NotZ = res; |
1748 | flag_N = res >> 24; |
1749 | WRITE_LONG_F(adr, res) |
1750 | POST_IO |
1751 | RET(28) |
1752 | } |
1753 | |
1754 | // EORI |
1755 | OPCODE(0x0A98) |
1756 | { |
1757 | u32 adr, res; |
1758 | u32 src, dst; |
1759 | |
1760 | FETCH_LONG(src); |
1761 | adr = AREG((Opcode >> 0) & 7); |
1762 | AREG((Opcode >> 0) & 7) += 4; |
1763 | PRE_IO |
1764 | READ_LONG_F(adr, res) |
1765 | res ^= src; |
1766 | flag_C = 0; |
1767 | flag_V = 0; |
1768 | flag_NotZ = res; |
1769 | flag_N = res >> 24; |
1770 | WRITE_LONG_F(adr, res) |
1771 | POST_IO |
1772 | RET(28) |
1773 | } |
1774 | |
1775 | // EORI |
1776 | OPCODE(0x0AA0) |
1777 | { |
1778 | u32 adr, res; |
1779 | u32 src, dst; |
1780 | |
1781 | FETCH_LONG(src); |
1782 | adr = AREG((Opcode >> 0) & 7) - 4; |
1783 | AREG((Opcode >> 0) & 7) = adr; |
1784 | PRE_IO |
1785 | READ_LONG_F(adr, res) |
1786 | res ^= src; |
1787 | flag_C = 0; |
1788 | flag_V = 0; |
1789 | flag_NotZ = res; |
1790 | flag_N = res >> 24; |
1791 | WRITE_LONG_F(adr, res) |
1792 | POST_IO |
1793 | RET(30) |
1794 | } |
1795 | |
1796 | // EORI |
1797 | OPCODE(0x0AA8) |
1798 | { |
1799 | u32 adr, res; |
1800 | u32 src, dst; |
1801 | |
1802 | FETCH_LONG(src); |
1803 | FETCH_SWORD(adr); |
1804 | adr += AREG((Opcode >> 0) & 7); |
1805 | PRE_IO |
1806 | READ_LONG_F(adr, res) |
1807 | res ^= src; |
1808 | flag_C = 0; |
1809 | flag_V = 0; |
1810 | flag_NotZ = res; |
1811 | flag_N = res >> 24; |
1812 | WRITE_LONG_F(adr, res) |
1813 | POST_IO |
1814 | RET(32) |
1815 | } |
1816 | |
1817 | // EORI |
1818 | OPCODE(0x0AB0) |
1819 | { |
1820 | u32 adr, res; |
1821 | u32 src, dst; |
1822 | |
1823 | FETCH_LONG(src); |
1824 | adr = AREG((Opcode >> 0) & 7); |
1825 | DECODE_EXT_WORD |
1826 | PRE_IO |
1827 | READ_LONG_F(adr, res) |
1828 | res ^= src; |
1829 | flag_C = 0; |
1830 | flag_V = 0; |
1831 | flag_NotZ = res; |
1832 | flag_N = res >> 24; |
1833 | WRITE_LONG_F(adr, res) |
1834 | POST_IO |
1835 | RET(34) |
1836 | } |
1837 | |
1838 | // EORI |
1839 | OPCODE(0x0AB8) |
1840 | { |
1841 | u32 adr, res; |
1842 | u32 src, dst; |
1843 | |
1844 | FETCH_LONG(src); |
1845 | FETCH_SWORD(adr); |
1846 | PRE_IO |
1847 | READ_LONG_F(adr, res) |
1848 | res ^= src; |
1849 | flag_C = 0; |
1850 | flag_V = 0; |
1851 | flag_NotZ = res; |
1852 | flag_N = res >> 24; |
1853 | WRITE_LONG_F(adr, res) |
1854 | POST_IO |
1855 | RET(32) |
1856 | } |
1857 | |
1858 | // EORI |
1859 | OPCODE(0x0AB9) |
1860 | { |
1861 | u32 adr, res; |
1862 | u32 src, dst; |
1863 | |
1864 | FETCH_LONG(src); |
1865 | FETCH_LONG(adr); |
1866 | PRE_IO |
1867 | READ_LONG_F(adr, res) |
1868 | res ^= src; |
1869 | flag_C = 0; |
1870 | flag_V = 0; |
1871 | flag_NotZ = res; |
1872 | flag_N = res >> 24; |
1873 | WRITE_LONG_F(adr, res) |
1874 | POST_IO |
1875 | RET(36) |
1876 | } |
1877 | |
1878 | // EORI |
1879 | OPCODE(0x0A9F) |
1880 | { |
1881 | u32 adr, res; |
1882 | u32 src, dst; |
1883 | |
1884 | FETCH_LONG(src); |
1885 | adr = AREG(7); |
1886 | AREG(7) += 4; |
1887 | PRE_IO |
1888 | READ_LONG_F(adr, res) |
1889 | res ^= src; |
1890 | flag_C = 0; |
1891 | flag_V = 0; |
1892 | flag_NotZ = res; |
1893 | flag_N = res >> 24; |
1894 | WRITE_LONG_F(adr, res) |
1895 | POST_IO |
1896 | RET(28) |
1897 | } |
1898 | |
1899 | // EORI |
1900 | OPCODE(0x0AA7) |
1901 | { |
1902 | u32 adr, res; |
1903 | u32 src, dst; |
1904 | |
1905 | FETCH_LONG(src); |
1906 | adr = AREG(7) - 4; |
1907 | AREG(7) = adr; |
1908 | PRE_IO |
1909 | READ_LONG_F(adr, res) |
1910 | res ^= src; |
1911 | flag_C = 0; |
1912 | flag_V = 0; |
1913 | flag_NotZ = res; |
1914 | flag_N = res >> 24; |
1915 | WRITE_LONG_F(adr, res) |
1916 | POST_IO |
1917 | RET(30) |
1918 | } |
1919 | |
1920 | // EORICCR |
1921 | OPCODE(0x0A3C) |
1922 | { |
1923 | u32 adr, res; |
1924 | u32 src, dst; |
1925 | |
1926 | FETCH_BYTE(res); |
1927 | res &= M68K_CCR_MASK; |
1928 | res ^= GET_CCR; |
1929 | SET_CCR(res) |
1930 | RET(20) |
1931 | } |
1932 | |
1933 | // EORISR |
1934 | OPCODE(0x0A7C) |
1935 | { |
1936 | u32 adr, res; |
1937 | u32 src, dst; |
1938 | |
1939 | if (flag_S) |
1940 | { |
1941 | FETCH_WORD(res); |
1942 | res &= M68K_SR_MASK; |
1943 | res ^= GET_SR; |
1944 | SET_SR(res) |
1945 | if (!flag_S) |
1946 | { |
1947 | res = AREG(7); |
1948 | AREG(7) = ASP; |
1949 | ASP = res; |
1950 | } |
1951 | CHECK_INT_TO_JUMP(20) |
1952 | } |
1953 | else |
1954 | { |
7669591e |
1955 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
1956 | #ifdef USE_CYCLONE_TIMING |
03e4f2a3 |
1957 | RET(0) |
3f591822 |
1958 | #else |
1959 | RET(4) |
1960 | #endif |
70357ce5 |
1961 | } |
1962 | RET(20) |
1963 | } |
1964 | |
1965 | // SUBI |
1966 | OPCODE(0x0400) |
1967 | { |
1968 | u32 adr, res; |
1969 | u32 src, dst; |
1970 | |
1971 | FETCH_BYTE(src); |
1972 | dst = DREGu8((Opcode >> 0) & 7); |
1973 | res = dst - src; |
1974 | flag_N = flag_X = flag_C = res; |
1975 | flag_V = (src ^ dst) & (res ^ dst); |
1976 | flag_NotZ = res & 0xFF; |
1977 | DREGu8((Opcode >> 0) & 7) = res; |
1978 | RET(8) |
1979 | } |
1980 | |
1981 | // SUBI |
1982 | OPCODE(0x0410) |
1983 | { |
1984 | u32 adr, res; |
1985 | u32 src, dst; |
1986 | |
1987 | FETCH_BYTE(src); |
1988 | adr = AREG((Opcode >> 0) & 7); |
1989 | PRE_IO |
1990 | READ_BYTE_F(adr, dst) |
1991 | res = dst - src; |
1992 | flag_N = flag_X = flag_C = res; |
1993 | flag_V = (src ^ dst) & (res ^ dst); |
1994 | flag_NotZ = res & 0xFF; |
1995 | WRITE_BYTE_F(adr, res) |
1996 | POST_IO |
1997 | RET(16) |
1998 | } |
1999 | |
2000 | // SUBI |
2001 | OPCODE(0x0418) |
2002 | { |
2003 | u32 adr, res; |
2004 | u32 src, dst; |
2005 | |
2006 | FETCH_BYTE(src); |
2007 | adr = AREG((Opcode >> 0) & 7); |
2008 | AREG((Opcode >> 0) & 7) += 1; |
2009 | PRE_IO |
2010 | READ_BYTE_F(adr, dst) |
2011 | res = dst - src; |
2012 | flag_N = flag_X = flag_C = res; |
2013 | flag_V = (src ^ dst) & (res ^ dst); |
2014 | flag_NotZ = res & 0xFF; |
2015 | WRITE_BYTE_F(adr, res) |
2016 | POST_IO |
2017 | RET(16) |
2018 | } |
2019 | |
2020 | // SUBI |
2021 | OPCODE(0x0420) |
2022 | { |
2023 | u32 adr, res; |
2024 | u32 src, dst; |
2025 | |
2026 | FETCH_BYTE(src); |
2027 | adr = AREG((Opcode >> 0) & 7) - 1; |
2028 | AREG((Opcode >> 0) & 7) = adr; |
2029 | PRE_IO |
2030 | READ_BYTE_F(adr, dst) |
2031 | res = dst - src; |
2032 | flag_N = flag_X = flag_C = res; |
2033 | flag_V = (src ^ dst) & (res ^ dst); |
2034 | flag_NotZ = res & 0xFF; |
2035 | WRITE_BYTE_F(adr, res) |
2036 | POST_IO |
2037 | RET(18) |
2038 | } |
2039 | |
2040 | // SUBI |
2041 | OPCODE(0x0428) |
2042 | { |
2043 | u32 adr, res; |
2044 | u32 src, dst; |
2045 | |
2046 | FETCH_BYTE(src); |
2047 | FETCH_SWORD(adr); |
2048 | adr += AREG((Opcode >> 0) & 7); |
2049 | PRE_IO |
2050 | READ_BYTE_F(adr, dst) |
2051 | res = dst - src; |
2052 | flag_N = flag_X = flag_C = res; |
2053 | flag_V = (src ^ dst) & (res ^ dst); |
2054 | flag_NotZ = res & 0xFF; |
2055 | WRITE_BYTE_F(adr, res) |
2056 | POST_IO |
2057 | RET(20) |
2058 | } |
2059 | |
2060 | // SUBI |
2061 | OPCODE(0x0430) |
2062 | { |
2063 | u32 adr, res; |
2064 | u32 src, dst; |
2065 | |
2066 | FETCH_BYTE(src); |
2067 | adr = AREG((Opcode >> 0) & 7); |
2068 | DECODE_EXT_WORD |
2069 | PRE_IO |
2070 | READ_BYTE_F(adr, dst) |
2071 | res = dst - src; |
2072 | flag_N = flag_X = flag_C = res; |
2073 | flag_V = (src ^ dst) & (res ^ dst); |
2074 | flag_NotZ = res & 0xFF; |
2075 | WRITE_BYTE_F(adr, res) |
2076 | POST_IO |
2077 | RET(22) |
2078 | } |
2079 | |
2080 | // SUBI |
2081 | OPCODE(0x0438) |
2082 | { |
2083 | u32 adr, res; |
2084 | u32 src, dst; |
2085 | |
2086 | FETCH_BYTE(src); |
2087 | FETCH_SWORD(adr); |
2088 | PRE_IO |
2089 | READ_BYTE_F(adr, dst) |
2090 | res = dst - src; |
2091 | flag_N = flag_X = flag_C = res; |
2092 | flag_V = (src ^ dst) & (res ^ dst); |
2093 | flag_NotZ = res & 0xFF; |
2094 | WRITE_BYTE_F(adr, res) |
2095 | POST_IO |
2096 | RET(20) |
2097 | } |
2098 | |
2099 | // SUBI |
2100 | OPCODE(0x0439) |
2101 | { |
2102 | u32 adr, res; |
2103 | u32 src, dst; |
2104 | |
2105 | FETCH_BYTE(src); |
2106 | FETCH_LONG(adr); |
2107 | PRE_IO |
2108 | READ_BYTE_F(adr, dst) |
2109 | res = dst - src; |
2110 | flag_N = flag_X = flag_C = res; |
2111 | flag_V = (src ^ dst) & (res ^ dst); |
2112 | flag_NotZ = res & 0xFF; |
2113 | WRITE_BYTE_F(adr, res) |
2114 | POST_IO |
2115 | RET(24) |
2116 | } |
2117 | |
2118 | // SUBI |
2119 | OPCODE(0x041F) |
2120 | { |
2121 | u32 adr, res; |
2122 | u32 src, dst; |
2123 | |
2124 | FETCH_BYTE(src); |
2125 | adr = AREG(7); |
2126 | AREG(7) += 2; |
2127 | PRE_IO |
2128 | READ_BYTE_F(adr, dst) |
2129 | res = dst - src; |
2130 | flag_N = flag_X = flag_C = res; |
2131 | flag_V = (src ^ dst) & (res ^ dst); |
2132 | flag_NotZ = res & 0xFF; |
2133 | WRITE_BYTE_F(adr, res) |
2134 | POST_IO |
2135 | RET(16) |
2136 | } |
2137 | |
2138 | // SUBI |
2139 | OPCODE(0x0427) |
2140 | { |
2141 | u32 adr, res; |
2142 | u32 src, dst; |
2143 | |
2144 | FETCH_BYTE(src); |
2145 | adr = AREG(7) - 2; |
2146 | AREG(7) = adr; |
2147 | PRE_IO |
2148 | READ_BYTE_F(adr, dst) |
2149 | res = dst - src; |
2150 | flag_N = flag_X = flag_C = res; |
2151 | flag_V = (src ^ dst) & (res ^ dst); |
2152 | flag_NotZ = res & 0xFF; |
2153 | WRITE_BYTE_F(adr, res) |
2154 | POST_IO |
2155 | RET(18) |
2156 | } |
2157 | |
2158 | // SUBI |
2159 | OPCODE(0x0440) |
2160 | { |
2161 | u32 adr, res; |
2162 | u32 src, dst; |
2163 | |
2164 | FETCH_WORD(src); |
2165 | dst = DREGu16((Opcode >> 0) & 7); |
2166 | res = dst - src; |
2167 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2168 | flag_N = flag_X = flag_C = res >> 8; |
2169 | flag_NotZ = res & 0xFFFF; |
2170 | DREGu16((Opcode >> 0) & 7) = res; |
2171 | RET(8) |
2172 | } |
2173 | |
2174 | // SUBI |
2175 | OPCODE(0x0450) |
2176 | { |
2177 | u32 adr, res; |
2178 | u32 src, dst; |
2179 | |
2180 | FETCH_WORD(src); |
2181 | adr = AREG((Opcode >> 0) & 7); |
2182 | PRE_IO |
2183 | READ_WORD_F(adr, dst) |
2184 | res = dst - src; |
2185 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2186 | flag_N = flag_X = flag_C = res >> 8; |
2187 | flag_NotZ = res & 0xFFFF; |
2188 | WRITE_WORD_F(adr, res) |
2189 | POST_IO |
2190 | RET(16) |
2191 | } |
2192 | |
2193 | // SUBI |
2194 | OPCODE(0x0458) |
2195 | { |
2196 | u32 adr, res; |
2197 | u32 src, dst; |
2198 | |
2199 | FETCH_WORD(src); |
2200 | adr = AREG((Opcode >> 0) & 7); |
2201 | AREG((Opcode >> 0) & 7) += 2; |
2202 | PRE_IO |
2203 | READ_WORD_F(adr, dst) |
2204 | res = dst - src; |
2205 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2206 | flag_N = flag_X = flag_C = res >> 8; |
2207 | flag_NotZ = res & 0xFFFF; |
2208 | WRITE_WORD_F(adr, res) |
2209 | POST_IO |
2210 | RET(16) |
2211 | } |
2212 | |
2213 | // SUBI |
2214 | OPCODE(0x0460) |
2215 | { |
2216 | u32 adr, res; |
2217 | u32 src, dst; |
2218 | |
2219 | FETCH_WORD(src); |
2220 | adr = AREG((Opcode >> 0) & 7) - 2; |
2221 | AREG((Opcode >> 0) & 7) = adr; |
2222 | PRE_IO |
2223 | READ_WORD_F(adr, dst) |
2224 | res = dst - src; |
2225 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2226 | flag_N = flag_X = flag_C = res >> 8; |
2227 | flag_NotZ = res & 0xFFFF; |
2228 | WRITE_WORD_F(adr, res) |
2229 | POST_IO |
2230 | RET(18) |
2231 | } |
2232 | |
2233 | // SUBI |
2234 | OPCODE(0x0468) |
2235 | { |
2236 | u32 adr, res; |
2237 | u32 src, dst; |
2238 | |
2239 | FETCH_WORD(src); |
2240 | FETCH_SWORD(adr); |
2241 | adr += AREG((Opcode >> 0) & 7); |
2242 | PRE_IO |
2243 | READ_WORD_F(adr, dst) |
2244 | res = dst - src; |
2245 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2246 | flag_N = flag_X = flag_C = res >> 8; |
2247 | flag_NotZ = res & 0xFFFF; |
2248 | WRITE_WORD_F(adr, res) |
2249 | POST_IO |
2250 | RET(20) |
2251 | } |
2252 | |
2253 | // SUBI |
2254 | OPCODE(0x0470) |
2255 | { |
2256 | u32 adr, res; |
2257 | u32 src, dst; |
2258 | |
2259 | FETCH_WORD(src); |
2260 | adr = AREG((Opcode >> 0) & 7); |
2261 | DECODE_EXT_WORD |
2262 | PRE_IO |
2263 | READ_WORD_F(adr, dst) |
2264 | res = dst - src; |
2265 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2266 | flag_N = flag_X = flag_C = res >> 8; |
2267 | flag_NotZ = res & 0xFFFF; |
2268 | WRITE_WORD_F(adr, res) |
2269 | POST_IO |
2270 | RET(22) |
2271 | } |
2272 | |
2273 | // SUBI |
2274 | OPCODE(0x0478) |
2275 | { |
2276 | u32 adr, res; |
2277 | u32 src, dst; |
2278 | |
2279 | FETCH_WORD(src); |
2280 | FETCH_SWORD(adr); |
2281 | PRE_IO |
2282 | READ_WORD_F(adr, dst) |
2283 | res = dst - src; |
2284 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2285 | flag_N = flag_X = flag_C = res >> 8; |
2286 | flag_NotZ = res & 0xFFFF; |
2287 | WRITE_WORD_F(adr, res) |
2288 | POST_IO |
2289 | RET(20) |
2290 | } |
2291 | |
2292 | // SUBI |
2293 | OPCODE(0x0479) |
2294 | { |
2295 | u32 adr, res; |
2296 | u32 src, dst; |
2297 | |
2298 | FETCH_WORD(src); |
2299 | FETCH_LONG(adr); |
2300 | PRE_IO |
2301 | READ_WORD_F(adr, dst) |
2302 | res = dst - src; |
2303 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2304 | flag_N = flag_X = flag_C = res >> 8; |
2305 | flag_NotZ = res & 0xFFFF; |
2306 | WRITE_WORD_F(adr, res) |
2307 | POST_IO |
2308 | RET(24) |
2309 | } |
2310 | |
2311 | // SUBI |
2312 | OPCODE(0x045F) |
2313 | { |
2314 | u32 adr, res; |
2315 | u32 src, dst; |
2316 | |
2317 | FETCH_WORD(src); |
2318 | adr = AREG(7); |
2319 | AREG(7) += 2; |
2320 | PRE_IO |
2321 | READ_WORD_F(adr, dst) |
2322 | res = dst - src; |
2323 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2324 | flag_N = flag_X = flag_C = res >> 8; |
2325 | flag_NotZ = res & 0xFFFF; |
2326 | WRITE_WORD_F(adr, res) |
2327 | POST_IO |
2328 | RET(16) |
2329 | } |
2330 | |
2331 | // SUBI |
2332 | OPCODE(0x0467) |
2333 | { |
2334 | u32 adr, res; |
2335 | u32 src, dst; |
2336 | |
2337 | FETCH_WORD(src); |
2338 | adr = AREG(7) - 2; |
2339 | AREG(7) = adr; |
2340 | PRE_IO |
2341 | READ_WORD_F(adr, dst) |
2342 | res = dst - src; |
2343 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
2344 | flag_N = flag_X = flag_C = res >> 8; |
2345 | flag_NotZ = res & 0xFFFF; |
2346 | WRITE_WORD_F(adr, res) |
2347 | POST_IO |
2348 | RET(18) |
2349 | } |
2350 | |
2351 | // SUBI |
2352 | OPCODE(0x0480) |
2353 | { |
2354 | u32 adr, res; |
2355 | u32 src, dst; |
2356 | |
2357 | FETCH_LONG(src); |
2358 | dst = DREGu32((Opcode >> 0) & 7); |
2359 | res = dst - src; |
2360 | flag_NotZ = res; |
2361 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2362 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2363 | flag_N = res >> 24; |
2364 | DREGu32((Opcode >> 0) & 7) = res; |
2365 | RET(16) |
2366 | } |
2367 | |
2368 | // SUBI |
2369 | OPCODE(0x0490) |
2370 | { |
2371 | u32 adr, res; |
2372 | u32 src, dst; |
2373 | |
2374 | FETCH_LONG(src); |
2375 | adr = AREG((Opcode >> 0) & 7); |
2376 | PRE_IO |
2377 | READ_LONG_F(adr, dst) |
2378 | res = dst - src; |
2379 | flag_NotZ = res; |
2380 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2381 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2382 | flag_N = res >> 24; |
2383 | WRITE_LONG_F(adr, res) |
2384 | POST_IO |
2385 | RET(28) |
2386 | } |
2387 | |
2388 | // SUBI |
2389 | OPCODE(0x0498) |
2390 | { |
2391 | u32 adr, res; |
2392 | u32 src, dst; |
2393 | |
2394 | FETCH_LONG(src); |
2395 | adr = AREG((Opcode >> 0) & 7); |
2396 | AREG((Opcode >> 0) & 7) += 4; |
2397 | PRE_IO |
2398 | READ_LONG_F(adr, dst) |
2399 | res = dst - src; |
2400 | flag_NotZ = res; |
2401 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2402 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2403 | flag_N = res >> 24; |
2404 | WRITE_LONG_F(adr, res) |
2405 | POST_IO |
2406 | RET(28) |
2407 | } |
2408 | |
2409 | // SUBI |
2410 | OPCODE(0x04A0) |
2411 | { |
2412 | u32 adr, res; |
2413 | u32 src, dst; |
2414 | |
2415 | FETCH_LONG(src); |
2416 | adr = AREG((Opcode >> 0) & 7) - 4; |
2417 | AREG((Opcode >> 0) & 7) = adr; |
2418 | PRE_IO |
2419 | READ_LONG_F(adr, dst) |
2420 | res = dst - src; |
2421 | flag_NotZ = res; |
2422 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2423 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2424 | flag_N = res >> 24; |
2425 | WRITE_LONG_F(adr, res) |
2426 | POST_IO |
2427 | RET(30) |
2428 | } |
2429 | |
2430 | // SUBI |
2431 | OPCODE(0x04A8) |
2432 | { |
2433 | u32 adr, res; |
2434 | u32 src, dst; |
2435 | |
2436 | FETCH_LONG(src); |
2437 | FETCH_SWORD(adr); |
2438 | adr += AREG((Opcode >> 0) & 7); |
2439 | PRE_IO |
2440 | READ_LONG_F(adr, dst) |
2441 | res = dst - src; |
2442 | flag_NotZ = res; |
2443 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2444 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2445 | flag_N = res >> 24; |
2446 | WRITE_LONG_F(adr, res) |
2447 | POST_IO |
2448 | RET(32) |
2449 | } |
2450 | |
2451 | // SUBI |
2452 | OPCODE(0x04B0) |
2453 | { |
2454 | u32 adr, res; |
2455 | u32 src, dst; |
2456 | |
2457 | FETCH_LONG(src); |
2458 | adr = AREG((Opcode >> 0) & 7); |
2459 | DECODE_EXT_WORD |
2460 | PRE_IO |
2461 | READ_LONG_F(adr, dst) |
2462 | res = dst - src; |
2463 | flag_NotZ = res; |
2464 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2465 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2466 | flag_N = res >> 24; |
2467 | WRITE_LONG_F(adr, res) |
2468 | POST_IO |
2469 | RET(34) |
2470 | } |
2471 | |
2472 | // SUBI |
2473 | OPCODE(0x04B8) |
2474 | { |
2475 | u32 adr, res; |
2476 | u32 src, dst; |
2477 | |
2478 | FETCH_LONG(src); |
2479 | FETCH_SWORD(adr); |
2480 | PRE_IO |
2481 | READ_LONG_F(adr, dst) |
2482 | res = dst - src; |
2483 | flag_NotZ = res; |
2484 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2485 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2486 | flag_N = res >> 24; |
2487 | WRITE_LONG_F(adr, res) |
2488 | POST_IO |
2489 | RET(32) |
2490 | } |
2491 | |
2492 | // SUBI |
2493 | OPCODE(0x04B9) |
2494 | { |
2495 | u32 adr, res; |
2496 | u32 src, dst; |
2497 | |
2498 | FETCH_LONG(src); |
2499 | FETCH_LONG(adr); |
2500 | PRE_IO |
2501 | READ_LONG_F(adr, dst) |
2502 | res = dst - src; |
2503 | flag_NotZ = res; |
2504 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2505 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2506 | flag_N = res >> 24; |
2507 | WRITE_LONG_F(adr, res) |
2508 | POST_IO |
2509 | RET(36) |
2510 | } |
2511 | |
2512 | // SUBI |
2513 | OPCODE(0x049F) |
2514 | { |
2515 | u32 adr, res; |
2516 | u32 src, dst; |
2517 | |
2518 | FETCH_LONG(src); |
2519 | adr = AREG(7); |
2520 | AREG(7) += 4; |
2521 | PRE_IO |
2522 | READ_LONG_F(adr, dst) |
2523 | res = dst - src; |
2524 | flag_NotZ = res; |
2525 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2526 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2527 | flag_N = res >> 24; |
2528 | WRITE_LONG_F(adr, res) |
2529 | POST_IO |
2530 | RET(28) |
2531 | } |
2532 | |
2533 | // SUBI |
2534 | OPCODE(0x04A7) |
2535 | { |
2536 | u32 adr, res; |
2537 | u32 src, dst; |
2538 | |
2539 | FETCH_LONG(src); |
2540 | adr = AREG(7) - 4; |
2541 | AREG(7) = adr; |
2542 | PRE_IO |
2543 | READ_LONG_F(adr, dst) |
2544 | res = dst - src; |
2545 | flag_NotZ = res; |
2546 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
2547 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
2548 | flag_N = res >> 24; |
2549 | WRITE_LONG_F(adr, res) |
2550 | POST_IO |
2551 | RET(30) |
2552 | } |
2553 | |
2554 | // ADDI |
2555 | OPCODE(0x0600) |
2556 | { |
2557 | u32 adr, res; |
2558 | u32 src, dst; |
2559 | |
2560 | FETCH_BYTE(src); |
2561 | dst = DREGu8((Opcode >> 0) & 7); |
2562 | res = dst + src; |
2563 | flag_N = flag_X = flag_C = res; |
2564 | flag_V = (src ^ res) & (dst ^ res); |
2565 | flag_NotZ = res & 0xFF; |
2566 | DREGu8((Opcode >> 0) & 7) = res; |
2567 | RET(8) |
2568 | } |
2569 | |
2570 | // ADDI |
2571 | OPCODE(0x0610) |
2572 | { |
2573 | u32 adr, res; |
2574 | u32 src, dst; |
2575 | |
2576 | FETCH_BYTE(src); |
2577 | adr = AREG((Opcode >> 0) & 7); |
2578 | PRE_IO |
2579 | READ_BYTE_F(adr, dst) |
2580 | res = dst + src; |
2581 | flag_N = flag_X = flag_C = res; |
2582 | flag_V = (src ^ res) & (dst ^ res); |
2583 | flag_NotZ = res & 0xFF; |
2584 | WRITE_BYTE_F(adr, res) |
2585 | POST_IO |
2586 | RET(16) |
2587 | } |
2588 | |
2589 | // ADDI |
2590 | OPCODE(0x0618) |
2591 | { |
2592 | u32 adr, res; |
2593 | u32 src, dst; |
2594 | |
2595 | FETCH_BYTE(src); |
2596 | adr = AREG((Opcode >> 0) & 7); |
2597 | AREG((Opcode >> 0) & 7) += 1; |
2598 | PRE_IO |
2599 | READ_BYTE_F(adr, dst) |
2600 | res = dst + src; |
2601 | flag_N = flag_X = flag_C = res; |
2602 | flag_V = (src ^ res) & (dst ^ res); |
2603 | flag_NotZ = res & 0xFF; |
2604 | WRITE_BYTE_F(adr, res) |
2605 | POST_IO |
2606 | RET(16) |
2607 | } |
2608 | |
2609 | // ADDI |
2610 | OPCODE(0x0620) |
2611 | { |
2612 | u32 adr, res; |
2613 | u32 src, dst; |
2614 | |
2615 | FETCH_BYTE(src); |
2616 | adr = AREG((Opcode >> 0) & 7) - 1; |
2617 | AREG((Opcode >> 0) & 7) = adr; |
2618 | PRE_IO |
2619 | READ_BYTE_F(adr, dst) |
2620 | res = dst + src; |
2621 | flag_N = flag_X = flag_C = res; |
2622 | flag_V = (src ^ res) & (dst ^ res); |
2623 | flag_NotZ = res & 0xFF; |
2624 | WRITE_BYTE_F(adr, res) |
2625 | POST_IO |
2626 | RET(18) |
2627 | } |
2628 | |
2629 | // ADDI |
2630 | OPCODE(0x0628) |
2631 | { |
2632 | u32 adr, res; |
2633 | u32 src, dst; |
2634 | |
2635 | FETCH_BYTE(src); |
2636 | FETCH_SWORD(adr); |
2637 | adr += AREG((Opcode >> 0) & 7); |
2638 | PRE_IO |
2639 | READ_BYTE_F(adr, dst) |
2640 | res = dst + src; |
2641 | flag_N = flag_X = flag_C = res; |
2642 | flag_V = (src ^ res) & (dst ^ res); |
2643 | flag_NotZ = res & 0xFF; |
2644 | WRITE_BYTE_F(adr, res) |
2645 | POST_IO |
2646 | RET(20) |
2647 | } |
2648 | |
2649 | // ADDI |
2650 | OPCODE(0x0630) |
2651 | { |
2652 | u32 adr, res; |
2653 | u32 src, dst; |
2654 | |
2655 | FETCH_BYTE(src); |
2656 | adr = AREG((Opcode >> 0) & 7); |
2657 | DECODE_EXT_WORD |
2658 | PRE_IO |
2659 | READ_BYTE_F(adr, dst) |
2660 | res = dst + src; |
2661 | flag_N = flag_X = flag_C = res; |
2662 | flag_V = (src ^ res) & (dst ^ res); |
2663 | flag_NotZ = res & 0xFF; |
2664 | WRITE_BYTE_F(adr, res) |
2665 | POST_IO |
2666 | RET(22) |
2667 | } |
2668 | |
2669 | // ADDI |
2670 | OPCODE(0x0638) |
2671 | { |
2672 | u32 adr, res; |
2673 | u32 src, dst; |
2674 | |
2675 | FETCH_BYTE(src); |
2676 | FETCH_SWORD(adr); |
2677 | PRE_IO |
2678 | READ_BYTE_F(adr, dst) |
2679 | res = dst + src; |
2680 | flag_N = flag_X = flag_C = res; |
2681 | flag_V = (src ^ res) & (dst ^ res); |
2682 | flag_NotZ = res & 0xFF; |
2683 | WRITE_BYTE_F(adr, res) |
2684 | POST_IO |
2685 | RET(20) |
2686 | } |
2687 | |
2688 | // ADDI |
2689 | OPCODE(0x0639) |
2690 | { |
2691 | u32 adr, res; |
2692 | u32 src, dst; |
2693 | |
2694 | FETCH_BYTE(src); |
2695 | FETCH_LONG(adr); |
2696 | PRE_IO |
2697 | READ_BYTE_F(adr, dst) |
2698 | res = dst + src; |
2699 | flag_N = flag_X = flag_C = res; |
2700 | flag_V = (src ^ res) & (dst ^ res); |
2701 | flag_NotZ = res & 0xFF; |
2702 | WRITE_BYTE_F(adr, res) |
2703 | POST_IO |
2704 | RET(24) |
2705 | } |
2706 | |
2707 | // ADDI |
2708 | OPCODE(0x061F) |
2709 | { |
2710 | u32 adr, res; |
2711 | u32 src, dst; |
2712 | |
2713 | FETCH_BYTE(src); |
2714 | adr = AREG(7); |
2715 | AREG(7) += 2; |
2716 | PRE_IO |
2717 | READ_BYTE_F(adr, dst) |
2718 | res = dst + src; |
2719 | flag_N = flag_X = flag_C = res; |
2720 | flag_V = (src ^ res) & (dst ^ res); |
2721 | flag_NotZ = res & 0xFF; |
2722 | WRITE_BYTE_F(adr, res) |
2723 | POST_IO |
2724 | RET(16) |
2725 | } |
2726 | |
2727 | // ADDI |
2728 | OPCODE(0x0627) |
2729 | { |
2730 | u32 adr, res; |
2731 | u32 src, dst; |
2732 | |
2733 | FETCH_BYTE(src); |
2734 | adr = AREG(7) - 2; |
2735 | AREG(7) = adr; |
2736 | PRE_IO |
2737 | READ_BYTE_F(adr, dst) |
2738 | res = dst + src; |
2739 | flag_N = flag_X = flag_C = res; |
2740 | flag_V = (src ^ res) & (dst ^ res); |
2741 | flag_NotZ = res & 0xFF; |
2742 | WRITE_BYTE_F(adr, res) |
2743 | POST_IO |
2744 | RET(18) |
2745 | } |
2746 | |
2747 | // ADDI |
2748 | OPCODE(0x0640) |
2749 | { |
2750 | u32 adr, res; |
2751 | u32 src, dst; |
2752 | |
2753 | FETCH_WORD(src); |
2754 | dst = DREGu16((Opcode >> 0) & 7); |
2755 | res = dst + src; |
2756 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2757 | flag_N = flag_X = flag_C = res >> 8; |
2758 | flag_NotZ = res & 0xFFFF; |
2759 | DREGu16((Opcode >> 0) & 7) = res; |
2760 | RET(8) |
2761 | } |
2762 | |
2763 | // ADDI |
2764 | OPCODE(0x0650) |
2765 | { |
2766 | u32 adr, res; |
2767 | u32 src, dst; |
2768 | |
2769 | FETCH_WORD(src); |
2770 | adr = AREG((Opcode >> 0) & 7); |
2771 | PRE_IO |
2772 | READ_WORD_F(adr, dst) |
2773 | res = dst + src; |
2774 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2775 | flag_N = flag_X = flag_C = res >> 8; |
2776 | flag_NotZ = res & 0xFFFF; |
2777 | WRITE_WORD_F(adr, res) |
2778 | POST_IO |
2779 | RET(16) |
2780 | } |
2781 | |
2782 | // ADDI |
2783 | OPCODE(0x0658) |
2784 | { |
2785 | u32 adr, res; |
2786 | u32 src, dst; |
2787 | |
2788 | FETCH_WORD(src); |
2789 | adr = AREG((Opcode >> 0) & 7); |
2790 | AREG((Opcode >> 0) & 7) += 2; |
2791 | PRE_IO |
2792 | READ_WORD_F(adr, dst) |
2793 | res = dst + src; |
2794 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2795 | flag_N = flag_X = flag_C = res >> 8; |
2796 | flag_NotZ = res & 0xFFFF; |
2797 | WRITE_WORD_F(adr, res) |
2798 | POST_IO |
2799 | RET(16) |
2800 | } |
2801 | |
2802 | // ADDI |
2803 | OPCODE(0x0660) |
2804 | { |
2805 | u32 adr, res; |
2806 | u32 src, dst; |
2807 | |
2808 | FETCH_WORD(src); |
2809 | adr = AREG((Opcode >> 0) & 7) - 2; |
2810 | AREG((Opcode >> 0) & 7) = adr; |
2811 | PRE_IO |
2812 | READ_WORD_F(adr, dst) |
2813 | res = dst + src; |
2814 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2815 | flag_N = flag_X = flag_C = res >> 8; |
2816 | flag_NotZ = res & 0xFFFF; |
2817 | WRITE_WORD_F(adr, res) |
2818 | POST_IO |
2819 | RET(18) |
2820 | } |
2821 | |
2822 | // ADDI |
2823 | OPCODE(0x0668) |
2824 | { |
2825 | u32 adr, res; |
2826 | u32 src, dst; |
2827 | |
2828 | FETCH_WORD(src); |
2829 | FETCH_SWORD(adr); |
2830 | adr += AREG((Opcode >> 0) & 7); |
2831 | PRE_IO |
2832 | READ_WORD_F(adr, dst) |
2833 | res = dst + src; |
2834 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2835 | flag_N = flag_X = flag_C = res >> 8; |
2836 | flag_NotZ = res & 0xFFFF; |
2837 | WRITE_WORD_F(adr, res) |
2838 | POST_IO |
2839 | RET(20) |
2840 | } |
2841 | |
2842 | // ADDI |
2843 | OPCODE(0x0670) |
2844 | { |
2845 | u32 adr, res; |
2846 | u32 src, dst; |
2847 | |
2848 | FETCH_WORD(src); |
2849 | adr = AREG((Opcode >> 0) & 7); |
2850 | DECODE_EXT_WORD |
2851 | PRE_IO |
2852 | READ_WORD_F(adr, dst) |
2853 | res = dst + src; |
2854 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2855 | flag_N = flag_X = flag_C = res >> 8; |
2856 | flag_NotZ = res & 0xFFFF; |
2857 | WRITE_WORD_F(adr, res) |
2858 | POST_IO |
2859 | RET(22) |
2860 | } |
2861 | |
2862 | // ADDI |
2863 | OPCODE(0x0678) |
2864 | { |
2865 | u32 adr, res; |
2866 | u32 src, dst; |
2867 | |
2868 | FETCH_WORD(src); |
2869 | FETCH_SWORD(adr); |
2870 | PRE_IO |
2871 | READ_WORD_F(adr, dst) |
2872 | res = dst + src; |
2873 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2874 | flag_N = flag_X = flag_C = res >> 8; |
2875 | flag_NotZ = res & 0xFFFF; |
2876 | WRITE_WORD_F(adr, res) |
2877 | POST_IO |
2878 | RET(20) |
2879 | } |
2880 | |
2881 | // ADDI |
2882 | OPCODE(0x0679) |
2883 | { |
2884 | u32 adr, res; |
2885 | u32 src, dst; |
2886 | |
2887 | FETCH_WORD(src); |
2888 | FETCH_LONG(adr); |
2889 | PRE_IO |
2890 | READ_WORD_F(adr, dst) |
2891 | res = dst + src; |
2892 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2893 | flag_N = flag_X = flag_C = res >> 8; |
2894 | flag_NotZ = res & 0xFFFF; |
2895 | WRITE_WORD_F(adr, res) |
2896 | POST_IO |
2897 | RET(24) |
2898 | } |
2899 | |
2900 | // ADDI |
2901 | OPCODE(0x065F) |
2902 | { |
2903 | u32 adr, res; |
2904 | u32 src, dst; |
2905 | |
2906 | FETCH_WORD(src); |
2907 | adr = AREG(7); |
2908 | AREG(7) += 2; |
2909 | PRE_IO |
2910 | READ_WORD_F(adr, dst) |
2911 | res = dst + src; |
2912 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2913 | flag_N = flag_X = flag_C = res >> 8; |
2914 | flag_NotZ = res & 0xFFFF; |
2915 | WRITE_WORD_F(adr, res) |
2916 | POST_IO |
2917 | RET(16) |
2918 | } |
2919 | |
2920 | // ADDI |
2921 | OPCODE(0x0667) |
2922 | { |
2923 | u32 adr, res; |
2924 | u32 src, dst; |
2925 | |
2926 | FETCH_WORD(src); |
2927 | adr = AREG(7) - 2; |
2928 | AREG(7) = adr; |
2929 | PRE_IO |
2930 | READ_WORD_F(adr, dst) |
2931 | res = dst + src; |
2932 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
2933 | flag_N = flag_X = flag_C = res >> 8; |
2934 | flag_NotZ = res & 0xFFFF; |
2935 | WRITE_WORD_F(adr, res) |
2936 | POST_IO |
2937 | RET(18) |
2938 | } |
2939 | |
2940 | // ADDI |
2941 | OPCODE(0x0680) |
2942 | { |
2943 | u32 adr, res; |
2944 | u32 src, dst; |
2945 | |
2946 | FETCH_LONG(src); |
2947 | dst = DREGu32((Opcode >> 0) & 7); |
2948 | res = dst + src; |
2949 | flag_NotZ = res; |
2950 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2951 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2952 | flag_N = res >> 24; |
2953 | DREGu32((Opcode >> 0) & 7) = res; |
2954 | RET(16) |
2955 | } |
2956 | |
2957 | // ADDI |
2958 | OPCODE(0x0690) |
2959 | { |
2960 | u32 adr, res; |
2961 | u32 src, dst; |
2962 | |
2963 | FETCH_LONG(src); |
2964 | adr = AREG((Opcode >> 0) & 7); |
2965 | PRE_IO |
2966 | READ_LONG_F(adr, dst) |
2967 | res = dst + src; |
2968 | flag_NotZ = res; |
2969 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2970 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2971 | flag_N = res >> 24; |
2972 | WRITE_LONG_F(adr, res) |
2973 | POST_IO |
2974 | RET(28) |
2975 | } |
2976 | |
2977 | // ADDI |
2978 | OPCODE(0x0698) |
2979 | { |
2980 | u32 adr, res; |
2981 | u32 src, dst; |
2982 | |
2983 | FETCH_LONG(src); |
2984 | adr = AREG((Opcode >> 0) & 7); |
2985 | AREG((Opcode >> 0) & 7) += 4; |
2986 | PRE_IO |
2987 | READ_LONG_F(adr, dst) |
2988 | res = dst + src; |
2989 | flag_NotZ = res; |
2990 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
2991 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
2992 | flag_N = res >> 24; |
2993 | WRITE_LONG_F(adr, res) |
2994 | POST_IO |
2995 | RET(28) |
2996 | } |
2997 | |
2998 | // ADDI |
2999 | OPCODE(0x06A0) |
3000 | { |
3001 | u32 adr, res; |
3002 | u32 src, dst; |
3003 | |
3004 | FETCH_LONG(src); |
3005 | adr = AREG((Opcode >> 0) & 7) - 4; |
3006 | AREG((Opcode >> 0) & 7) = adr; |
3007 | PRE_IO |
3008 | READ_LONG_F(adr, dst) |
3009 | res = dst + src; |
3010 | flag_NotZ = res; |
3011 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3012 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3013 | flag_N = res >> 24; |
3014 | WRITE_LONG_F(adr, res) |
3015 | POST_IO |
3016 | RET(30) |
3017 | } |
3018 | |
3019 | // ADDI |
3020 | OPCODE(0x06A8) |
3021 | { |
3022 | u32 adr, res; |
3023 | u32 src, dst; |
3024 | |
3025 | FETCH_LONG(src); |
3026 | FETCH_SWORD(adr); |
3027 | adr += AREG((Opcode >> 0) & 7); |
3028 | PRE_IO |
3029 | READ_LONG_F(adr, dst) |
3030 | res = dst + src; |
3031 | flag_NotZ = res; |
3032 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3033 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3034 | flag_N = res >> 24; |
3035 | WRITE_LONG_F(adr, res) |
3036 | POST_IO |
3037 | RET(32) |
3038 | } |
3039 | |
3040 | // ADDI |
3041 | OPCODE(0x06B0) |
3042 | { |
3043 | u32 adr, res; |
3044 | u32 src, dst; |
3045 | |
3046 | FETCH_LONG(src); |
3047 | adr = AREG((Opcode >> 0) & 7); |
3048 | DECODE_EXT_WORD |
3049 | PRE_IO |
3050 | READ_LONG_F(adr, dst) |
3051 | res = dst + src; |
3052 | flag_NotZ = res; |
3053 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3054 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3055 | flag_N = res >> 24; |
3056 | WRITE_LONG_F(adr, res) |
3057 | POST_IO |
3058 | RET(34) |
3059 | } |
3060 | |
3061 | // ADDI |
3062 | OPCODE(0x06B8) |
3063 | { |
3064 | u32 adr, res; |
3065 | u32 src, dst; |
3066 | |
3067 | FETCH_LONG(src); |
3068 | FETCH_SWORD(adr); |
3069 | PRE_IO |
3070 | READ_LONG_F(adr, dst) |
3071 | res = dst + src; |
3072 | flag_NotZ = res; |
3073 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3074 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3075 | flag_N = res >> 24; |
3076 | WRITE_LONG_F(adr, res) |
3077 | POST_IO |
3078 | RET(32) |
3079 | } |
3080 | |
3081 | // ADDI |
3082 | OPCODE(0x06B9) |
3083 | { |
3084 | u32 adr, res; |
3085 | u32 src, dst; |
3086 | |
3087 | FETCH_LONG(src); |
3088 | FETCH_LONG(adr); |
3089 | PRE_IO |
3090 | READ_LONG_F(adr, dst) |
3091 | res = dst + src; |
3092 | flag_NotZ = res; |
3093 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3094 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3095 | flag_N = res >> 24; |
3096 | WRITE_LONG_F(adr, res) |
3097 | POST_IO |
3098 | RET(36) |
3099 | } |
3100 | |
3101 | // ADDI |
3102 | OPCODE(0x069F) |
3103 | { |
3104 | u32 adr, res; |
3105 | u32 src, dst; |
3106 | |
3107 | FETCH_LONG(src); |
3108 | adr = AREG(7); |
3109 | AREG(7) += 4; |
3110 | PRE_IO |
3111 | READ_LONG_F(adr, dst) |
3112 | res = dst + src; |
3113 | flag_NotZ = res; |
3114 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3115 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3116 | flag_N = res >> 24; |
3117 | WRITE_LONG_F(adr, res) |
3118 | POST_IO |
3119 | RET(28) |
3120 | } |
3121 | |
3122 | // ADDI |
3123 | OPCODE(0x06A7) |
3124 | { |
3125 | u32 adr, res; |
3126 | u32 src, dst; |
3127 | |
3128 | FETCH_LONG(src); |
3129 | adr = AREG(7) - 4; |
3130 | AREG(7) = adr; |
3131 | PRE_IO |
3132 | READ_LONG_F(adr, dst) |
3133 | res = dst + src; |
3134 | flag_NotZ = res; |
3135 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
3136 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
3137 | flag_N = res >> 24; |
3138 | WRITE_LONG_F(adr, res) |
3139 | POST_IO |
3140 | RET(30) |
3141 | } |
3142 | |
3143 | // CMPI |
3144 | OPCODE(0x0C00) |
3145 | { |
3146 | u32 adr, res; |
3147 | u32 src, dst; |
3148 | |
3149 | FETCH_BYTE(src); |
3150 | dst = DREGu8((Opcode >> 0) & 7); |
3151 | res = dst - src; |
3152 | flag_N = flag_C = res; |
3153 | flag_V = (src ^ dst) & (res ^ dst); |
3154 | flag_NotZ = res & 0xFF; |
3155 | RET(8) |
3156 | } |
3157 | |
3158 | // CMPI |
3159 | OPCODE(0x0C10) |
3160 | { |
3161 | u32 adr, res; |
3162 | u32 src, dst; |
3163 | |
3164 | FETCH_BYTE(src); |
3165 | adr = AREG((Opcode >> 0) & 7); |
3166 | PRE_IO |
3167 | READ_BYTE_F(adr, dst) |
3168 | res = dst - src; |
3169 | flag_N = flag_C = res; |
3170 | flag_V = (src ^ dst) & (res ^ dst); |
3171 | flag_NotZ = res & 0xFF; |
3172 | POST_IO |
3173 | RET(12) |
3174 | } |
3175 | |
3176 | // CMPI |
3177 | OPCODE(0x0C18) |
3178 | { |
3179 | u32 adr, res; |
3180 | u32 src, dst; |
3181 | |
3182 | FETCH_BYTE(src); |
3183 | adr = AREG((Opcode >> 0) & 7); |
3184 | AREG((Opcode >> 0) & 7) += 1; |
3185 | PRE_IO |
3186 | READ_BYTE_F(adr, dst) |
3187 | res = dst - src; |
3188 | flag_N = flag_C = res; |
3189 | flag_V = (src ^ dst) & (res ^ dst); |
3190 | flag_NotZ = res & 0xFF; |
3191 | POST_IO |
3192 | RET(12) |
3193 | } |
3194 | |
3195 | // CMPI |
3196 | OPCODE(0x0C20) |
3197 | { |
3198 | u32 adr, res; |
3199 | u32 src, dst; |
3200 | |
3201 | FETCH_BYTE(src); |
3202 | adr = AREG((Opcode >> 0) & 7) - 1; |
3203 | AREG((Opcode >> 0) & 7) = adr; |
3204 | PRE_IO |
3205 | READ_BYTE_F(adr, dst) |
3206 | res = dst - src; |
3207 | flag_N = flag_C = res; |
3208 | flag_V = (src ^ dst) & (res ^ dst); |
3209 | flag_NotZ = res & 0xFF; |
3210 | POST_IO |
3211 | RET(14) |
3212 | } |
3213 | |
3214 | // CMPI |
3215 | OPCODE(0x0C28) |
3216 | { |
3217 | u32 adr, res; |
3218 | u32 src, dst; |
3219 | |
3220 | FETCH_BYTE(src); |
3221 | FETCH_SWORD(adr); |
3222 | adr += AREG((Opcode >> 0) & 7); |
3223 | PRE_IO |
3224 | READ_BYTE_F(adr, dst) |
3225 | res = dst - src; |
3226 | flag_N = flag_C = res; |
3227 | flag_V = (src ^ dst) & (res ^ dst); |
3228 | flag_NotZ = res & 0xFF; |
3229 | POST_IO |
3230 | RET(16) |
3231 | } |
3232 | |
3233 | // CMPI |
3234 | OPCODE(0x0C30) |
3235 | { |
3236 | u32 adr, res; |
3237 | u32 src, dst; |
3238 | |
3239 | FETCH_BYTE(src); |
3240 | adr = AREG((Opcode >> 0) & 7); |
3241 | DECODE_EXT_WORD |
3242 | PRE_IO |
3243 | READ_BYTE_F(adr, dst) |
3244 | res = dst - src; |
3245 | flag_N = flag_C = res; |
3246 | flag_V = (src ^ dst) & (res ^ dst); |
3247 | flag_NotZ = res & 0xFF; |
3248 | POST_IO |
3249 | RET(18) |
3250 | } |
3251 | |
3252 | // CMPI |
3253 | OPCODE(0x0C38) |
3254 | { |
3255 | u32 adr, res; |
3256 | u32 src, dst; |
3257 | |
3258 | FETCH_BYTE(src); |
3259 | FETCH_SWORD(adr); |
3260 | PRE_IO |
3261 | READ_BYTE_F(adr, dst) |
3262 | res = dst - src; |
3263 | flag_N = flag_C = res; |
3264 | flag_V = (src ^ dst) & (res ^ dst); |
3265 | flag_NotZ = res & 0xFF; |
3266 | POST_IO |
3267 | RET(16) |
3268 | } |
3269 | |
3270 | // CMPI |
3271 | OPCODE(0x0C39) |
3272 | { |
3273 | u32 adr, res; |
3274 | u32 src, dst; |
3275 | |
3276 | FETCH_BYTE(src); |
3277 | FETCH_LONG(adr); |
3278 | PRE_IO |
3279 | READ_BYTE_F(adr, dst) |
3280 | res = dst - src; |
3281 | flag_N = flag_C = res; |
3282 | flag_V = (src ^ dst) & (res ^ dst); |
3283 | flag_NotZ = res & 0xFF; |
3284 | POST_IO |
3285 | RET(20) |
3286 | } |
3287 | |
3288 | // CMPI |
3289 | OPCODE(0x0C1F) |
3290 | { |
3291 | u32 adr, res; |
3292 | u32 src, dst; |
3293 | |
3294 | FETCH_BYTE(src); |
3295 | adr = AREG(7); |
3296 | AREG(7) += 2; |
3297 | PRE_IO |
3298 | READ_BYTE_F(adr, dst) |
3299 | res = dst - src; |
3300 | flag_N = flag_C = res; |
3301 | flag_V = (src ^ dst) & (res ^ dst); |
3302 | flag_NotZ = res & 0xFF; |
3303 | POST_IO |
3304 | RET(12) |
3305 | } |
3306 | |
3307 | // CMPI |
3308 | OPCODE(0x0C27) |
3309 | { |
3310 | u32 adr, res; |
3311 | u32 src, dst; |
3312 | |
3313 | FETCH_BYTE(src); |
3314 | adr = AREG(7) - 2; |
3315 | AREG(7) = adr; |
3316 | PRE_IO |
3317 | READ_BYTE_F(adr, dst) |
3318 | res = dst - src; |
3319 | flag_N = flag_C = res; |
3320 | flag_V = (src ^ dst) & (res ^ dst); |
3321 | flag_NotZ = res & 0xFF; |
3322 | POST_IO |
3323 | RET(14) |
3324 | } |
3325 | |
3326 | // CMPI |
3327 | OPCODE(0x0C40) |
3328 | { |
3329 | u32 adr, res; |
3330 | u32 src, dst; |
3331 | |
3332 | FETCH_WORD(src); |
3333 | dst = DREGu16((Opcode >> 0) & 7); |
3334 | res = dst - src; |
3335 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3336 | flag_N = flag_C = res >> 8; |
3337 | flag_NotZ = res & 0xFFFF; |
3338 | RET(8) |
3339 | } |
3340 | |
3341 | // CMPI |
3342 | OPCODE(0x0C50) |
3343 | { |
3344 | u32 adr, res; |
3345 | u32 src, dst; |
3346 | |
3347 | FETCH_WORD(src); |
3348 | adr = AREG((Opcode >> 0) & 7); |
3349 | PRE_IO |
3350 | READ_WORD_F(adr, dst) |
3351 | res = dst - src; |
3352 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3353 | flag_N = flag_C = res >> 8; |
3354 | flag_NotZ = res & 0xFFFF; |
3355 | POST_IO |
3356 | RET(12) |
3357 | } |
3358 | |
3359 | // CMPI |
3360 | OPCODE(0x0C58) |
3361 | { |
3362 | u32 adr, res; |
3363 | u32 src, dst; |
3364 | |
3365 | FETCH_WORD(src); |
3366 | adr = AREG((Opcode >> 0) & 7); |
3367 | AREG((Opcode >> 0) & 7) += 2; |
3368 | PRE_IO |
3369 | READ_WORD_F(adr, dst) |
3370 | res = dst - src; |
3371 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3372 | flag_N = flag_C = res >> 8; |
3373 | flag_NotZ = res & 0xFFFF; |
3374 | POST_IO |
3375 | RET(12) |
3376 | } |
3377 | |
3378 | // CMPI |
3379 | OPCODE(0x0C60) |
3380 | { |
3381 | u32 adr, res; |
3382 | u32 src, dst; |
3383 | |
3384 | FETCH_WORD(src); |
3385 | adr = AREG((Opcode >> 0) & 7) - 2; |
3386 | AREG((Opcode >> 0) & 7) = adr; |
3387 | PRE_IO |
3388 | READ_WORD_F(adr, dst) |
3389 | res = dst - src; |
3390 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3391 | flag_N = flag_C = res >> 8; |
3392 | flag_NotZ = res & 0xFFFF; |
3393 | POST_IO |
3394 | RET(14) |
3395 | } |
3396 | |
3397 | // CMPI |
3398 | OPCODE(0x0C68) |
3399 | { |
3400 | u32 adr, res; |
3401 | u32 src, dst; |
3402 | |
3403 | FETCH_WORD(src); |
3404 | FETCH_SWORD(adr); |
3405 | adr += AREG((Opcode >> 0) & 7); |
3406 | PRE_IO |
3407 | READ_WORD_F(adr, dst) |
3408 | res = dst - src; |
3409 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3410 | flag_N = flag_C = res >> 8; |
3411 | flag_NotZ = res & 0xFFFF; |
3412 | POST_IO |
3413 | RET(16) |
3414 | } |
3415 | |
3416 | // CMPI |
3417 | OPCODE(0x0C70) |
3418 | { |
3419 | u32 adr, res; |
3420 | u32 src, dst; |
3421 | |
3422 | FETCH_WORD(src); |
3423 | adr = AREG((Opcode >> 0) & 7); |
3424 | DECODE_EXT_WORD |
3425 | PRE_IO |
3426 | READ_WORD_F(adr, dst) |
3427 | res = dst - src; |
3428 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3429 | flag_N = flag_C = res >> 8; |
3430 | flag_NotZ = res & 0xFFFF; |
3431 | POST_IO |
3432 | RET(18) |
3433 | } |
3434 | |
3435 | // CMPI |
3436 | OPCODE(0x0C78) |
3437 | { |
3438 | u32 adr, res; |
3439 | u32 src, dst; |
3440 | |
3441 | FETCH_WORD(src); |
3442 | FETCH_SWORD(adr); |
3443 | PRE_IO |
3444 | READ_WORD_F(adr, dst) |
3445 | res = dst - src; |
3446 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3447 | flag_N = flag_C = res >> 8; |
3448 | flag_NotZ = res & 0xFFFF; |
3449 | POST_IO |
3450 | RET(16) |
3451 | } |
3452 | |
3453 | // CMPI |
3454 | OPCODE(0x0C79) |
3455 | { |
3456 | u32 adr, res; |
3457 | u32 src, dst; |
3458 | |
3459 | FETCH_WORD(src); |
3460 | FETCH_LONG(adr); |
3461 | PRE_IO |
3462 | READ_WORD_F(adr, dst) |
3463 | res = dst - src; |
3464 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3465 | flag_N = flag_C = res >> 8; |
3466 | flag_NotZ = res & 0xFFFF; |
3467 | POST_IO |
3468 | RET(20) |
3469 | } |
3470 | |
3471 | // CMPI |
3472 | OPCODE(0x0C5F) |
3473 | { |
3474 | u32 adr, res; |
3475 | u32 src, dst; |
3476 | |
3477 | FETCH_WORD(src); |
3478 | adr = AREG(7); |
3479 | AREG(7) += 2; |
3480 | PRE_IO |
3481 | READ_WORD_F(adr, dst) |
3482 | res = dst - src; |
3483 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3484 | flag_N = flag_C = res >> 8; |
3485 | flag_NotZ = res & 0xFFFF; |
3486 | POST_IO |
3487 | RET(12) |
3488 | } |
3489 | |
3490 | // CMPI |
3491 | OPCODE(0x0C67) |
3492 | { |
3493 | u32 adr, res; |
3494 | u32 src, dst; |
3495 | |
3496 | FETCH_WORD(src); |
3497 | adr = AREG(7) - 2; |
3498 | AREG(7) = adr; |
3499 | PRE_IO |
3500 | READ_WORD_F(adr, dst) |
3501 | res = dst - src; |
3502 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
3503 | flag_N = flag_C = res >> 8; |
3504 | flag_NotZ = res & 0xFFFF; |
3505 | POST_IO |
3506 | RET(14) |
3507 | } |
3508 | |
3509 | // CMPI |
3510 | OPCODE(0x0C80) |
3511 | { |
3512 | u32 adr, res; |
3513 | u32 src, dst; |
3514 | |
3515 | FETCH_LONG(src); |
3516 | dst = DREGu32((Opcode >> 0) & 7); |
3517 | res = dst - src; |
3518 | flag_NotZ = res; |
3519 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3520 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3521 | flag_N = res >> 24; |
3522 | RET(14) |
3523 | } |
3524 | |
3525 | // CMPI |
3526 | OPCODE(0x0C90) |
3527 | { |
3528 | u32 adr, res; |
3529 | u32 src, dst; |
3530 | |
3531 | FETCH_LONG(src); |
3532 | adr = AREG((Opcode >> 0) & 7); |
3533 | PRE_IO |
3534 | READ_LONG_F(adr, dst) |
3535 | res = dst - src; |
3536 | flag_NotZ = res; |
3537 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3538 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3539 | flag_N = res >> 24; |
3540 | POST_IO |
3541 | RET(20) |
3542 | } |
3543 | |
3544 | // CMPI |
3545 | OPCODE(0x0C98) |
3546 | { |
3547 | u32 adr, res; |
3548 | u32 src, dst; |
3549 | |
3550 | FETCH_LONG(src); |
3551 | adr = AREG((Opcode >> 0) & 7); |
3552 | AREG((Opcode >> 0) & 7) += 4; |
3553 | PRE_IO |
3554 | READ_LONG_F(adr, dst) |
3555 | res = dst - src; |
3556 | flag_NotZ = res; |
3557 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3558 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3559 | flag_N = res >> 24; |
3560 | POST_IO |
3561 | RET(20) |
3562 | } |
3563 | |
3564 | // CMPI |
3565 | OPCODE(0x0CA0) |
3566 | { |
3567 | u32 adr, res; |
3568 | u32 src, dst; |
3569 | |
3570 | FETCH_LONG(src); |
3571 | adr = AREG((Opcode >> 0) & 7) - 4; |
3572 | AREG((Opcode >> 0) & 7) = adr; |
3573 | PRE_IO |
3574 | READ_LONG_F(adr, dst) |
3575 | res = dst - src; |
3576 | flag_NotZ = res; |
3577 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3578 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3579 | flag_N = res >> 24; |
3580 | POST_IO |
3581 | RET(22) |
3582 | } |
3583 | |
3584 | // CMPI |
3585 | OPCODE(0x0CA8) |
3586 | { |
3587 | u32 adr, res; |
3588 | u32 src, dst; |
3589 | |
3590 | FETCH_LONG(src); |
3591 | FETCH_SWORD(adr); |
3592 | adr += AREG((Opcode >> 0) & 7); |
3593 | PRE_IO |
3594 | READ_LONG_F(adr, dst) |
3595 | res = dst - src; |
3596 | flag_NotZ = res; |
3597 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3598 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3599 | flag_N = res >> 24; |
3600 | POST_IO |
3601 | RET(24) |
3602 | } |
3603 | |
3604 | // CMPI |
3605 | OPCODE(0x0CB0) |
3606 | { |
3607 | u32 adr, res; |
3608 | u32 src, dst; |
3609 | |
3610 | FETCH_LONG(src); |
3611 | adr = AREG((Opcode >> 0) & 7); |
3612 | DECODE_EXT_WORD |
3613 | PRE_IO |
3614 | READ_LONG_F(adr, dst) |
3615 | res = dst - src; |
3616 | flag_NotZ = res; |
3617 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3618 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3619 | flag_N = res >> 24; |
3620 | POST_IO |
3621 | RET(26) |
3622 | } |
3623 | |
3624 | // CMPI |
3625 | OPCODE(0x0CB8) |
3626 | { |
3627 | u32 adr, res; |
3628 | u32 src, dst; |
3629 | |
3630 | FETCH_LONG(src); |
3631 | FETCH_SWORD(adr); |
3632 | PRE_IO |
3633 | READ_LONG_F(adr, dst) |
3634 | res = dst - src; |
3635 | flag_NotZ = res; |
3636 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3637 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3638 | flag_N = res >> 24; |
3639 | POST_IO |
3640 | RET(24) |
3641 | } |
3642 | |
3643 | // CMPI |
3644 | OPCODE(0x0CB9) |
3645 | { |
3646 | u32 adr, res; |
3647 | u32 src, dst; |
3648 | |
3649 | FETCH_LONG(src); |
3650 | FETCH_LONG(adr); |
3651 | PRE_IO |
3652 | READ_LONG_F(adr, dst) |
3653 | res = dst - src; |
3654 | flag_NotZ = res; |
3655 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3656 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3657 | flag_N = res >> 24; |
3658 | POST_IO |
3659 | RET(28) |
3660 | } |
3661 | |
3662 | // CMPI |
3663 | OPCODE(0x0C9F) |
3664 | { |
3665 | u32 adr, res; |
3666 | u32 src, dst; |
3667 | |
3668 | FETCH_LONG(src); |
3669 | adr = AREG(7); |
3670 | AREG(7) += 4; |
3671 | PRE_IO |
3672 | READ_LONG_F(adr, dst) |
3673 | res = dst - src; |
3674 | flag_NotZ = res; |
3675 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3676 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3677 | flag_N = res >> 24; |
3678 | POST_IO |
3679 | RET(20) |
3680 | } |
3681 | |
3682 | // CMPI |
3683 | OPCODE(0x0CA7) |
3684 | { |
3685 | u32 adr, res; |
3686 | u32 src, dst; |
3687 | |
3688 | FETCH_LONG(src); |
3689 | adr = AREG(7) - 4; |
3690 | AREG(7) = adr; |
3691 | PRE_IO |
3692 | READ_LONG_F(adr, dst) |
3693 | res = dst - src; |
3694 | flag_NotZ = res; |
3695 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
3696 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
3697 | flag_N = res >> 24; |
3698 | POST_IO |
3699 | RET(22) |
3700 | } |
3701 | |
3702 | // BTSTn |
3703 | OPCODE(0x0800) |
3704 | { |
3705 | u32 adr, res; |
3706 | u32 src, dst; |
3707 | |
3708 | FETCH_BYTE(src); |
3709 | src = 1 << (src & 31); |
3710 | res = DREGu32((Opcode >> 0) & 7); |
3711 | flag_NotZ = res & src; |
3712 | RET(10) |
3713 | } |
3714 | |
3715 | // BTSTn |
3716 | OPCODE(0x0810) |
3717 | { |
3718 | u32 adr, res; |
3719 | u32 src, dst; |
3720 | |
3721 | FETCH_BYTE(src); |
3722 | src = 1 << (src & 7); |
3723 | adr = AREG((Opcode >> 0) & 7); |
3724 | PRE_IO |
3725 | READ_BYTE_F(adr, res) |
3726 | flag_NotZ = res & src; |
3727 | POST_IO |
3728 | RET(12) |
3729 | } |
3730 | |
3731 | // BTSTn |
3732 | OPCODE(0x0818) |
3733 | { |
3734 | u32 adr, res; |
3735 | u32 src, dst; |
3736 | |
3737 | FETCH_BYTE(src); |
3738 | src = 1 << (src & 7); |
3739 | adr = AREG((Opcode >> 0) & 7); |
3740 | AREG((Opcode >> 0) & 7) += 1; |
3741 | PRE_IO |
3742 | READ_BYTE_F(adr, res) |
3743 | flag_NotZ = res & src; |
3744 | POST_IO |
3745 | RET(12) |
3746 | } |
3747 | |
3748 | // BTSTn |
3749 | OPCODE(0x0820) |
3750 | { |
3751 | u32 adr, res; |
3752 | u32 src, dst; |
3753 | |
3754 | FETCH_BYTE(src); |
3755 | src = 1 << (src & 7); |
3756 | adr = AREG((Opcode >> 0) & 7) - 1; |
3757 | AREG((Opcode >> 0) & 7) = adr; |
3758 | PRE_IO |
3759 | READ_BYTE_F(adr, res) |
3760 | flag_NotZ = res & src; |
3761 | POST_IO |
3762 | RET(14) |
3763 | } |
3764 | |
3765 | // BTSTn |
3766 | OPCODE(0x0828) |
3767 | { |
3768 | u32 adr, res; |
3769 | u32 src, dst; |
3770 | |
3771 | FETCH_BYTE(src); |
3772 | src = 1 << (src & 7); |
3773 | FETCH_SWORD(adr); |
3774 | adr += AREG((Opcode >> 0) & 7); |
3775 | PRE_IO |
3776 | READ_BYTE_F(adr, res) |
3777 | flag_NotZ = res & src; |
3778 | POST_IO |
3779 | RET(16) |
3780 | } |
3781 | |
3782 | // BTSTn |
3783 | OPCODE(0x0830) |
3784 | { |
3785 | u32 adr, res; |
3786 | u32 src, dst; |
3787 | |
3788 | FETCH_BYTE(src); |
3789 | src = 1 << (src & 7); |
3790 | adr = AREG((Opcode >> 0) & 7); |
3791 | DECODE_EXT_WORD |
3792 | PRE_IO |
3793 | READ_BYTE_F(adr, res) |
3794 | flag_NotZ = res & src; |
3795 | POST_IO |
3796 | RET(18) |
3797 | } |
3798 | |
3799 | // BTSTn |
3800 | OPCODE(0x0838) |
3801 | { |
3802 | u32 adr, res; |
3803 | u32 src, dst; |
3804 | |
3805 | FETCH_BYTE(src); |
3806 | src = 1 << (src & 7); |
3807 | FETCH_SWORD(adr); |
3808 | PRE_IO |
3809 | READ_BYTE_F(adr, res) |
3810 | flag_NotZ = res & src; |
3811 | POST_IO |
3812 | RET(16) |
3813 | } |
3814 | |
3815 | // BTSTn |
3816 | OPCODE(0x0839) |
3817 | { |
3818 | u32 adr, res; |
3819 | u32 src, dst; |
3820 | |
3821 | FETCH_BYTE(src); |
3822 | src = 1 << (src & 7); |
3823 | FETCH_LONG(adr); |
3824 | PRE_IO |
3825 | READ_BYTE_F(adr, res) |
3826 | flag_NotZ = res & src; |
3827 | POST_IO |
3828 | RET(20) |
3829 | } |
3830 | |
3831 | // BTSTn |
3832 | OPCODE(0x083A) |
3833 | { |
3834 | u32 adr, res; |
3835 | u32 src, dst; |
3836 | |
3837 | FETCH_BYTE(src); |
3838 | src = 1 << (src & 7); |
be26eb23 |
3839 | adr = GET_SWORD + GET_PC; |
70357ce5 |
3840 | PC++; |
3841 | PRE_IO |
3842 | READ_BYTE_F(adr, res) |
3843 | flag_NotZ = res & src; |
3844 | POST_IO |
3845 | RET(16) |
3846 | } |
3847 | |
3848 | // BTSTn |
3849 | OPCODE(0x083B) |
3850 | { |
3851 | u32 adr, res; |
3852 | u32 src, dst; |
3853 | |
3854 | FETCH_BYTE(src); |
3855 | src = 1 << (src & 7); |
be26eb23 |
3856 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
3857 | DECODE_EXT_WORD |
3858 | PRE_IO |
3859 | READ_BYTE_F(adr, res) |
3860 | flag_NotZ = res & src; |
3861 | POST_IO |
3862 | RET(18) |
3863 | } |
3864 | |
3865 | // BTSTn |
3866 | OPCODE(0x081F) |
3867 | { |
3868 | u32 adr, res; |
3869 | u32 src, dst; |
3870 | |
3871 | FETCH_BYTE(src); |
3872 | src = 1 << (src & 7); |
3873 | adr = AREG(7); |
3874 | AREG(7) += 2; |
3875 | PRE_IO |
3876 | READ_BYTE_F(adr, res) |
3877 | flag_NotZ = res & src; |
3878 | POST_IO |
3879 | RET(12) |
3880 | } |
3881 | |
3882 | // BTSTn |
3883 | OPCODE(0x0827) |
3884 | { |
3885 | u32 adr, res; |
3886 | u32 src, dst; |
3887 | |
3888 | FETCH_BYTE(src); |
3889 | src = 1 << (src & 7); |
3890 | adr = AREG(7) - 2; |
3891 | AREG(7) = adr; |
3892 | PRE_IO |
3893 | READ_BYTE_F(adr, res) |
3894 | flag_NotZ = res & src; |
3895 | POST_IO |
3896 | RET(14) |
3897 | } |
3898 | |
3899 | // BCHGn |
3900 | OPCODE(0x0840) |
3901 | { |
3902 | u32 adr, res; |
3903 | u32 src, dst; |
3904 | |
3905 | FETCH_BYTE(src); |
3906 | src = 1 << (src & 31); |
3907 | res = DREGu32((Opcode >> 0) & 7); |
3908 | flag_NotZ = res & src; |
3909 | res ^= src; |
3910 | DREGu32((Opcode >> 0) & 7) = res; |
3f591822 |
3911 | #ifdef USE_CYCLONE_TIMING |
3912 | if (src >> 16) ctx->io_cycle_counter -= 2; |
3913 | RET(10) |
3914 | #else |
70357ce5 |
3915 | RET(12) |
3f591822 |
3916 | #endif |
70357ce5 |
3917 | } |
3918 | |
3919 | // BCHGn |
3920 | OPCODE(0x0850) |
3921 | { |
3922 | u32 adr, res; |
3923 | u32 src, dst; |
3924 | |
3925 | FETCH_BYTE(src); |
3926 | src = 1 << (src & 7); |
3927 | adr = AREG((Opcode >> 0) & 7); |
3928 | PRE_IO |
3929 | READ_BYTE_F(adr, res) |
3930 | flag_NotZ = res & src; |
3931 | res ^= src; |
3932 | WRITE_BYTE_F(adr, res) |
3933 | POST_IO |
3934 | RET(16) |
3935 | } |
3936 | |
3937 | // BCHGn |
3938 | OPCODE(0x0858) |
3939 | { |
3940 | u32 adr, res; |
3941 | u32 src, dst; |
3942 | |
3943 | FETCH_BYTE(src); |
3944 | src = 1 << (src & 7); |
3945 | adr = AREG((Opcode >> 0) & 7); |
3946 | AREG((Opcode >> 0) & 7) += 1; |
3947 | PRE_IO |
3948 | READ_BYTE_F(adr, res) |
3949 | flag_NotZ = res & src; |
3950 | res ^= src; |
3951 | WRITE_BYTE_F(adr, res) |
3952 | POST_IO |
3953 | RET(16) |
3954 | } |
3955 | |
3956 | // BCHGn |
3957 | OPCODE(0x0860) |
3958 | { |
3959 | u32 adr, res; |
3960 | u32 src, dst; |
3961 | |
3962 | FETCH_BYTE(src); |
3963 | src = 1 << (src & 7); |
3964 | adr = AREG((Opcode >> 0) & 7) - 1; |
3965 | AREG((Opcode >> 0) & 7) = adr; |
3966 | PRE_IO |
3967 | READ_BYTE_F(adr, res) |
3968 | flag_NotZ = res & src; |
3969 | res ^= src; |
3970 | WRITE_BYTE_F(adr, res) |
3971 | POST_IO |
3972 | RET(18) |
3973 | } |
3974 | |
3975 | // BCHGn |
3976 | OPCODE(0x0868) |
3977 | { |
3978 | u32 adr, res; |
3979 | u32 src, dst; |
3980 | |
3981 | FETCH_BYTE(src); |
3982 | src = 1 << (src & 7); |
3983 | FETCH_SWORD(adr); |
3984 | adr += AREG((Opcode >> 0) & 7); |
3985 | PRE_IO |
3986 | READ_BYTE_F(adr, res) |
3987 | flag_NotZ = res & src; |
3988 | res ^= src; |
3989 | WRITE_BYTE_F(adr, res) |
3990 | POST_IO |
3991 | RET(20) |
3992 | } |
3993 | |
3994 | // BCHGn |
3995 | OPCODE(0x0870) |
3996 | { |
3997 | u32 adr, res; |
3998 | u32 src, dst; |
3999 | |
4000 | FETCH_BYTE(src); |
4001 | src = 1 << (src & 7); |
4002 | adr = AREG((Opcode >> 0) & 7); |
4003 | DECODE_EXT_WORD |
4004 | PRE_IO |
4005 | READ_BYTE_F(adr, res) |
4006 | flag_NotZ = res & src; |
4007 | res ^= src; |
4008 | WRITE_BYTE_F(adr, res) |
4009 | POST_IO |
4010 | RET(22) |
4011 | } |
4012 | |
4013 | // BCHGn |
4014 | OPCODE(0x0878) |
4015 | { |
4016 | u32 adr, res; |
4017 | u32 src, dst; |
4018 | |
4019 | FETCH_BYTE(src); |
4020 | src = 1 << (src & 7); |
4021 | FETCH_SWORD(adr); |
4022 | PRE_IO |
4023 | READ_BYTE_F(adr, res) |
4024 | flag_NotZ = res & src; |
4025 | res ^= src; |
4026 | WRITE_BYTE_F(adr, res) |
4027 | POST_IO |
4028 | RET(20) |
4029 | } |
4030 | |
4031 | // BCHGn |
4032 | OPCODE(0x0879) |
4033 | { |
4034 | u32 adr, res; |
4035 | u32 src, dst; |
4036 | |
4037 | FETCH_BYTE(src); |
4038 | src = 1 << (src & 7); |
4039 | FETCH_LONG(adr); |
4040 | PRE_IO |
4041 | READ_BYTE_F(adr, res) |
4042 | flag_NotZ = res & src; |
4043 | res ^= src; |
4044 | WRITE_BYTE_F(adr, res) |
4045 | POST_IO |
4046 | RET(24) |
4047 | } |
4048 | |
4049 | // BCHGn |
4050 | OPCODE(0x085F) |
4051 | { |
4052 | u32 adr, res; |
4053 | u32 src, dst; |
4054 | |
4055 | FETCH_BYTE(src); |
4056 | src = 1 << (src & 7); |
4057 | adr = AREG(7); |
4058 | AREG(7) += 2; |
4059 | PRE_IO |
4060 | READ_BYTE_F(adr, res) |
4061 | flag_NotZ = res & src; |
4062 | res ^= src; |
4063 | WRITE_BYTE_F(adr, res) |
4064 | POST_IO |
4065 | RET(16) |
4066 | } |
4067 | |
4068 | // BCHGn |
4069 | OPCODE(0x0867) |
4070 | { |
4071 | u32 adr, res; |
4072 | u32 src, dst; |
4073 | |
4074 | FETCH_BYTE(src); |
4075 | src = 1 << (src & 7); |
4076 | adr = AREG(7) - 2; |
4077 | AREG(7) = adr; |
4078 | PRE_IO |
4079 | READ_BYTE_F(adr, res) |
4080 | flag_NotZ = res & src; |
4081 | res ^= src; |
4082 | WRITE_BYTE_F(adr, res) |
4083 | POST_IO |
4084 | RET(18) |
4085 | } |
4086 | |
4087 | // BCLRn |
4088 | OPCODE(0x0880) |
4089 | { |
4090 | u32 adr, res; |
4091 | u32 src, dst; |
4092 | |
4093 | FETCH_BYTE(src); |
4094 | src = 1 << (src & 31); |
4095 | res = DREGu32((Opcode >> 0) & 7); |
4096 | flag_NotZ = res & src; |
4097 | res &= ~src; |
4098 | DREGu32((Opcode >> 0) & 7) = res; |
3f591822 |
4099 | #ifdef USE_CYCLONE_TIMING |
4100 | if (src >> 16) ctx->io_cycle_counter -= 2; |
4101 | RET(12) |
4102 | #else |
70357ce5 |
4103 | RET(14) |
3f591822 |
4104 | #endif |
70357ce5 |
4105 | } |
4106 | |
4107 | // BCLRn |
4108 | OPCODE(0x0890) |
4109 | { |
4110 | u32 adr, res; |
4111 | u32 src, dst; |
4112 | |
4113 | FETCH_BYTE(src); |
4114 | src = 1 << (src & 7); |
4115 | adr = AREG((Opcode >> 0) & 7); |
4116 | PRE_IO |
4117 | READ_BYTE_F(adr, res) |
4118 | flag_NotZ = res & src; |
4119 | res &= ~src; |
4120 | WRITE_BYTE_F(adr, res) |
4121 | POST_IO |
4122 | RET(16) |
4123 | } |
4124 | |
4125 | // BCLRn |
4126 | OPCODE(0x0898) |
4127 | { |
4128 | u32 adr, res; |
4129 | u32 src, dst; |
4130 | |
4131 | FETCH_BYTE(src); |
4132 | src = 1 << (src & 7); |
4133 | adr = AREG((Opcode >> 0) & 7); |
4134 | AREG((Opcode >> 0) & 7) += 1; |
4135 | PRE_IO |
4136 | READ_BYTE_F(adr, res) |
4137 | flag_NotZ = res & src; |
4138 | res &= ~src; |
4139 | WRITE_BYTE_F(adr, res) |
4140 | POST_IO |
4141 | RET(16) |
4142 | } |
4143 | |
4144 | // BCLRn |
4145 | OPCODE(0x08A0) |
4146 | { |
4147 | u32 adr, res; |
4148 | u32 src, dst; |
4149 | |
4150 | FETCH_BYTE(src); |
4151 | src = 1 << (src & 7); |
4152 | adr = AREG((Opcode >> 0) & 7) - 1; |
4153 | AREG((Opcode >> 0) & 7) = adr; |
4154 | PRE_IO |
4155 | READ_BYTE_F(adr, res) |
4156 | flag_NotZ = res & src; |
4157 | res &= ~src; |
4158 | WRITE_BYTE_F(adr, res) |
4159 | POST_IO |
4160 | RET(18) |
4161 | } |
4162 | |
4163 | // BCLRn |
4164 | OPCODE(0x08A8) |
4165 | { |
4166 | u32 adr, res; |
4167 | u32 src, dst; |
4168 | |
4169 | FETCH_BYTE(src); |
4170 | src = 1 << (src & 7); |
4171 | FETCH_SWORD(adr); |
4172 | adr += AREG((Opcode >> 0) & 7); |
4173 | PRE_IO |
4174 | READ_BYTE_F(adr, res) |
4175 | flag_NotZ = res & src; |
4176 | res &= ~src; |
4177 | WRITE_BYTE_F(adr, res) |
4178 | POST_IO |
4179 | RET(20) |
4180 | } |
4181 | |
4182 | // BCLRn |
4183 | OPCODE(0x08B0) |
4184 | { |
4185 | u32 adr, res; |
4186 | u32 src, dst; |
4187 | |
4188 | FETCH_BYTE(src); |
4189 | src = 1 << (src & 7); |
4190 | adr = AREG((Opcode >> 0) & 7); |
4191 | DECODE_EXT_WORD |
4192 | PRE_IO |
4193 | READ_BYTE_F(adr, res) |
4194 | flag_NotZ = res & src; |
4195 | res &= ~src; |
4196 | WRITE_BYTE_F(adr, res) |
4197 | POST_IO |
4198 | RET(22) |
4199 | } |
4200 | |
4201 | // BCLRn |
4202 | OPCODE(0x08B8) |
4203 | { |
4204 | u32 adr, res; |
4205 | u32 src, dst; |
4206 | |
4207 | FETCH_BYTE(src); |
4208 | src = 1 << (src & 7); |
4209 | FETCH_SWORD(adr); |
4210 | PRE_IO |
4211 | READ_BYTE_F(adr, res) |
4212 | flag_NotZ = res & src; |
4213 | res &= ~src; |
4214 | WRITE_BYTE_F(adr, res) |
4215 | POST_IO |
4216 | RET(20) |
4217 | } |
4218 | |
4219 | // BCLRn |
4220 | OPCODE(0x08B9) |
4221 | { |
4222 | u32 adr, res; |
4223 | u32 src, dst; |
4224 | |
4225 | FETCH_BYTE(src); |
4226 | src = 1 << (src & 7); |
4227 | FETCH_LONG(adr); |
4228 | PRE_IO |
4229 | READ_BYTE_F(adr, res) |
4230 | flag_NotZ = res & src; |
4231 | res &= ~src; |
4232 | WRITE_BYTE_F(adr, res) |
4233 | POST_IO |
4234 | RET(24) |
4235 | } |
4236 | |
4237 | // BCLRn |
4238 | OPCODE(0x089F) |
4239 | { |
4240 | u32 adr, res; |
4241 | u32 src, dst; |
4242 | |
4243 | FETCH_BYTE(src); |
4244 | src = 1 << (src & 7); |
4245 | adr = AREG(7); |
4246 | AREG(7) += 2; |
4247 | PRE_IO |
4248 | READ_BYTE_F(adr, res) |
4249 | flag_NotZ = res & src; |
4250 | res &= ~src; |
4251 | WRITE_BYTE_F(adr, res) |
4252 | POST_IO |
4253 | RET(16) |
4254 | } |
4255 | |
4256 | // BCLRn |
4257 | OPCODE(0x08A7) |
4258 | { |
4259 | u32 adr, res; |
4260 | u32 src, dst; |
4261 | |
4262 | FETCH_BYTE(src); |
4263 | src = 1 << (src & 7); |
4264 | adr = AREG(7) - 2; |
4265 | AREG(7) = adr; |
4266 | PRE_IO |
4267 | READ_BYTE_F(adr, res) |
4268 | flag_NotZ = res & src; |
4269 | res &= ~src; |
4270 | WRITE_BYTE_F(adr, res) |
4271 | POST_IO |
4272 | RET(18) |
4273 | } |
4274 | |
4275 | // BSETn |
4276 | OPCODE(0x08C0) |
4277 | { |
4278 | u32 adr, res; |
4279 | u32 src, dst; |
4280 | |
4281 | FETCH_BYTE(src); |
4282 | src = 1 << (src & 31); |
4283 | res = DREGu32((Opcode >> 0) & 7); |
4284 | flag_NotZ = res & src; |
4285 | res |= src; |
4286 | DREGu32((Opcode >> 0) & 7) = res; |
3f591822 |
4287 | #ifdef USE_CYCLONE_TIMING |
4288 | if (src >> 16) ctx->io_cycle_counter -= 2; |
4289 | RET(10) |
4290 | #else |
70357ce5 |
4291 | RET(12) |
3f591822 |
4292 | #endif |
70357ce5 |
4293 | } |
4294 | |
4295 | // BSETn |
4296 | OPCODE(0x08D0) |
4297 | { |
4298 | u32 adr, res; |
4299 | u32 src, dst; |
4300 | |
4301 | FETCH_BYTE(src); |
4302 | src = 1 << (src & 7); |
4303 | adr = AREG((Opcode >> 0) & 7); |
4304 | PRE_IO |
4305 | READ_BYTE_F(adr, res) |
4306 | flag_NotZ = res & src; |
4307 | res |= src; |
4308 | WRITE_BYTE_F(adr, res) |
4309 | POST_IO |
4310 | RET(16) |
4311 | } |
4312 | |
4313 | // BSETn |
4314 | OPCODE(0x08D8) |
4315 | { |
4316 | u32 adr, res; |
4317 | u32 src, dst; |
4318 | |
4319 | FETCH_BYTE(src); |
4320 | src = 1 << (src & 7); |
4321 | adr = AREG((Opcode >> 0) & 7); |
4322 | AREG((Opcode >> 0) & 7) += 1; |
4323 | PRE_IO |
4324 | READ_BYTE_F(adr, res) |
4325 | flag_NotZ = res & src; |
4326 | res |= src; |
4327 | WRITE_BYTE_F(adr, res) |
4328 | POST_IO |
4329 | RET(16) |
4330 | } |
4331 | |
4332 | // BSETn |
4333 | OPCODE(0x08E0) |
4334 | { |
4335 | u32 adr, res; |
4336 | u32 src, dst; |
4337 | |
4338 | FETCH_BYTE(src); |
4339 | src = 1 << (src & 7); |
4340 | adr = AREG((Opcode >> 0) & 7) - 1; |
4341 | AREG((Opcode >> 0) & 7) = adr; |
4342 | PRE_IO |
4343 | READ_BYTE_F(adr, res) |
4344 | flag_NotZ = res & src; |
4345 | res |= src; |
4346 | WRITE_BYTE_F(adr, res) |
4347 | POST_IO |
4348 | RET(18) |
4349 | } |
4350 | |
4351 | // BSETn |
4352 | OPCODE(0x08E8) |
4353 | { |
4354 | u32 adr, res; |
4355 | u32 src, dst; |
4356 | |
4357 | FETCH_BYTE(src); |
4358 | src = 1 << (src & 7); |
4359 | FETCH_SWORD(adr); |
4360 | adr += AREG((Opcode >> 0) & 7); |
4361 | PRE_IO |
4362 | READ_BYTE_F(adr, res) |
4363 | flag_NotZ = res & src; |
4364 | res |= src; |
4365 | WRITE_BYTE_F(adr, res) |
4366 | POST_IO |
4367 | RET(20) |
4368 | } |
4369 | |
4370 | // BSETn |
4371 | OPCODE(0x08F0) |
4372 | { |
4373 | u32 adr, res; |
4374 | u32 src, dst; |
4375 | |
4376 | FETCH_BYTE(src); |
4377 | src = 1 << (src & 7); |
4378 | adr = AREG((Opcode >> 0) & 7); |
4379 | DECODE_EXT_WORD |
4380 | PRE_IO |
4381 | READ_BYTE_F(adr, res) |
4382 | flag_NotZ = res & src; |
4383 | res |= src; |
4384 | WRITE_BYTE_F(adr, res) |
4385 | POST_IO |
4386 | RET(22) |
4387 | } |
4388 | |
4389 | // BSETn |
4390 | OPCODE(0x08F8) |
4391 | { |
4392 | u32 adr, res; |
4393 | u32 src, dst; |
4394 | |
4395 | FETCH_BYTE(src); |
4396 | src = 1 << (src & 7); |
4397 | FETCH_SWORD(adr); |
4398 | PRE_IO |
4399 | READ_BYTE_F(adr, res) |
4400 | flag_NotZ = res & src; |
4401 | res |= src; |
4402 | WRITE_BYTE_F(adr, res) |
4403 | POST_IO |
4404 | RET(20) |
4405 | } |
4406 | |
4407 | // BSETn |
4408 | OPCODE(0x08F9) |
4409 | { |
4410 | u32 adr, res; |
4411 | u32 src, dst; |
4412 | |
4413 | FETCH_BYTE(src); |
4414 | src = 1 << (src & 7); |
4415 | FETCH_LONG(adr); |
4416 | PRE_IO |
4417 | READ_BYTE_F(adr, res) |
4418 | flag_NotZ = res & src; |
4419 | res |= src; |
4420 | WRITE_BYTE_F(adr, res) |
4421 | POST_IO |
4422 | RET(24) |
4423 | } |
4424 | |
4425 | // BSETn |
4426 | OPCODE(0x08DF) |
4427 | { |
4428 | u32 adr, res; |
4429 | u32 src, dst; |
4430 | |
4431 | FETCH_BYTE(src); |
4432 | src = 1 << (src & 7); |
4433 | adr = AREG(7); |
4434 | AREG(7) += 2; |
4435 | PRE_IO |
4436 | READ_BYTE_F(adr, res) |
4437 | flag_NotZ = res & src; |
4438 | res |= src; |
4439 | WRITE_BYTE_F(adr, res) |
4440 | POST_IO |
4441 | RET(16) |
4442 | } |
4443 | |
4444 | // BSETn |
4445 | OPCODE(0x08E7) |
4446 | { |
4447 | u32 adr, res; |
4448 | u32 src, dst; |
4449 | |
4450 | FETCH_BYTE(src); |
4451 | src = 1 << (src & 7); |
4452 | adr = AREG(7) - 2; |
4453 | AREG(7) = adr; |
4454 | PRE_IO |
4455 | READ_BYTE_F(adr, res) |
4456 | flag_NotZ = res & src; |
4457 | res |= src; |
4458 | WRITE_BYTE_F(adr, res) |
4459 | POST_IO |
4460 | RET(18) |
4461 | } |
4462 | |
4463 | // BTST |
4464 | OPCODE(0x0100) |
4465 | { |
4466 | u32 adr, res; |
4467 | u32 src, dst; |
4468 | |
4469 | src = DREGu32((Opcode >> 9) & 7); |
4470 | src = 1 << (src & 31); |
4471 | res = DREGu32((Opcode >> 0) & 7); |
4472 | flag_NotZ = res & src; |
4473 | RET(6) |
4474 | } |
4475 | |
4476 | // BTST |
4477 | OPCODE(0x0110) |
4478 | { |
4479 | u32 adr, res; |
4480 | u32 src, dst; |
4481 | |
4482 | src = DREGu8((Opcode >> 9) & 7); |
4483 | src = 1 << (src & 7); |
4484 | adr = AREG((Opcode >> 0) & 7); |
4485 | PRE_IO |
4486 | READ_BYTE_F(adr, res) |
4487 | flag_NotZ = res & src; |
4488 | POST_IO |
4489 | RET(8) |
4490 | } |
4491 | |
4492 | // BTST |
4493 | OPCODE(0x0118) |
4494 | { |
4495 | u32 adr, res; |
4496 | u32 src, dst; |
4497 | |
4498 | src = DREGu8((Opcode >> 9) & 7); |
4499 | src = 1 << (src & 7); |
4500 | adr = AREG((Opcode >> 0) & 7); |
4501 | AREG((Opcode >> 0) & 7) += 1; |
4502 | PRE_IO |
4503 | READ_BYTE_F(adr, res) |
4504 | flag_NotZ = res & src; |
4505 | POST_IO |
4506 | RET(8) |
4507 | } |
4508 | |
4509 | // BTST |
4510 | OPCODE(0x0120) |
4511 | { |
4512 | u32 adr, res; |
4513 | u32 src, dst; |
4514 | |
4515 | src = DREGu8((Opcode >> 9) & 7); |
4516 | src = 1 << (src & 7); |
4517 | adr = AREG((Opcode >> 0) & 7) - 1; |
4518 | AREG((Opcode >> 0) & 7) = adr; |
4519 | PRE_IO |
4520 | READ_BYTE_F(adr, res) |
4521 | flag_NotZ = res & src; |
4522 | POST_IO |
4523 | RET(10) |
4524 | } |
4525 | |
4526 | // BTST |
4527 | OPCODE(0x0128) |
4528 | { |
4529 | u32 adr, res; |
4530 | u32 src, dst; |
4531 | |
4532 | src = DREGu8((Opcode >> 9) & 7); |
4533 | src = 1 << (src & 7); |
4534 | FETCH_SWORD(adr); |
4535 | adr += AREG((Opcode >> 0) & 7); |
4536 | PRE_IO |
4537 | READ_BYTE_F(adr, res) |
4538 | flag_NotZ = res & src; |
4539 | POST_IO |
4540 | RET(12) |
4541 | } |
4542 | |
4543 | // BTST |
4544 | OPCODE(0x0130) |
4545 | { |
4546 | u32 adr, res; |
4547 | u32 src, dst; |
4548 | |
4549 | src = DREGu8((Opcode >> 9) & 7); |
4550 | src = 1 << (src & 7); |
4551 | adr = AREG((Opcode >> 0) & 7); |
4552 | DECODE_EXT_WORD |
4553 | PRE_IO |
4554 | READ_BYTE_F(adr, res) |
4555 | flag_NotZ = res & src; |
4556 | POST_IO |
4557 | RET(14) |
4558 | } |
4559 | |
4560 | // BTST |
4561 | OPCODE(0x0138) |
4562 | { |
4563 | u32 adr, res; |
4564 | u32 src, dst; |
4565 | |
4566 | src = DREGu8((Opcode >> 9) & 7); |
4567 | src = 1 << (src & 7); |
4568 | FETCH_SWORD(adr); |
4569 | PRE_IO |
4570 | READ_BYTE_F(adr, res) |
4571 | flag_NotZ = res & src; |
4572 | POST_IO |
4573 | RET(12) |
4574 | } |
4575 | |
4576 | // BTST |
4577 | OPCODE(0x0139) |
4578 | { |
4579 | u32 adr, res; |
4580 | u32 src, dst; |
4581 | |
4582 | src = DREGu8((Opcode >> 9) & 7); |
4583 | src = 1 << (src & 7); |
4584 | FETCH_LONG(adr); |
4585 | PRE_IO |
4586 | READ_BYTE_F(adr, res) |
4587 | flag_NotZ = res & src; |
4588 | POST_IO |
4589 | RET(16) |
4590 | } |
4591 | |
4592 | // BTST |
4593 | OPCODE(0x013A) |
4594 | { |
4595 | u32 adr, res; |
4596 | u32 src, dst; |
4597 | |
4598 | src = DREGu8((Opcode >> 9) & 7); |
4599 | src = 1 << (src & 7); |
be26eb23 |
4600 | adr = GET_SWORD + GET_PC; |
70357ce5 |
4601 | PC++; |
4602 | PRE_IO |
4603 | READ_BYTE_F(adr, res) |
4604 | flag_NotZ = res & src; |
4605 | POST_IO |
4606 | RET(12) |
4607 | } |
4608 | |
4609 | // BTST |
4610 | OPCODE(0x013B) |
4611 | { |
4612 | u32 adr, res; |
4613 | u32 src, dst; |
4614 | |
4615 | src = DREGu8((Opcode >> 9) & 7); |
4616 | src = 1 << (src & 7); |
be26eb23 |
4617 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
4618 | DECODE_EXT_WORD |
4619 | PRE_IO |
4620 | READ_BYTE_F(adr, res) |
4621 | flag_NotZ = res & src; |
4622 | POST_IO |
4623 | RET(14) |
4624 | } |
4625 | |
4626 | // BTST |
4627 | OPCODE(0x013C) |
4628 | { |
4629 | u32 adr, res; |
4630 | u32 src, dst; |
4631 | |
4632 | src = DREGu8((Opcode >> 9) & 7); |
4633 | src = 1 << (src & 7); |
4634 | FETCH_BYTE(res); |
4635 | flag_NotZ = res & src; |
e867ec06 |
4636 | RET(10) |
70357ce5 |
4637 | } |
4638 | |
4639 | // BTST |
4640 | OPCODE(0x011F) |
4641 | { |
4642 | u32 adr, res; |
4643 | u32 src, dst; |
4644 | |
4645 | src = DREGu8((Opcode >> 9) & 7); |
4646 | src = 1 << (src & 7); |
4647 | adr = AREG(7); |
4648 | AREG(7) += 2; |
4649 | PRE_IO |
4650 | READ_BYTE_F(adr, res) |
4651 | flag_NotZ = res & src; |
4652 | POST_IO |
4653 | RET(8) |
4654 | } |
4655 | |
4656 | // BTST |
4657 | OPCODE(0x0127) |
4658 | { |
4659 | u32 adr, res; |
4660 | u32 src, dst; |
4661 | |
4662 | src = DREGu8((Opcode >> 9) & 7); |
4663 | src = 1 << (src & 7); |
4664 | adr = AREG(7) - 2; |
4665 | AREG(7) = adr; |
4666 | PRE_IO |
4667 | READ_BYTE_F(adr, res) |
4668 | flag_NotZ = res & src; |
4669 | POST_IO |
4670 | RET(10) |
4671 | } |
4672 | |
4673 | // BCHG |
4674 | OPCODE(0x0140) |
4675 | { |
4676 | u32 adr, res; |
4677 | u32 src, dst; |
4678 | |
4679 | src = DREGu32((Opcode >> 9) & 7); |
4680 | src = 1 << (src & 31); |
4681 | res = DREGu32((Opcode >> 0) & 7); |
4682 | flag_NotZ = res & src; |
4683 | res ^= src; |
4684 | DREGu32((Opcode >> 0) & 7) = res; |
3f591822 |
4685 | #ifdef USE_CYCLONE_TIMING |
4686 | if (src >> 16) ctx->io_cycle_counter -= 2; |
4687 | RET(6) |
4688 | #else |
70357ce5 |
4689 | RET(8) |
3f591822 |
4690 | #endif |
70357ce5 |
4691 | } |
4692 | |
4693 | // BCHG |
4694 | OPCODE(0x0150) |
4695 | { |
4696 | u32 adr, res; |
4697 | u32 src, dst; |
4698 | |
4699 | src = DREGu8((Opcode >> 9) & 7); |
4700 | src = 1 << (src & 7); |
4701 | adr = AREG((Opcode >> 0) & 7); |
4702 | PRE_IO |
4703 | READ_BYTE_F(adr, res) |
4704 | flag_NotZ = res & src; |
4705 | res ^= src; |
4706 | WRITE_BYTE_F(adr, res) |
4707 | POST_IO |
4708 | RET(12) |
4709 | } |
4710 | |
4711 | // BCHG |
4712 | OPCODE(0x0158) |
4713 | { |
4714 | u32 adr, res; |
4715 | u32 src, dst; |
4716 | |
4717 | src = DREGu8((Opcode >> 9) & 7); |
4718 | src = 1 << (src & 7); |
4719 | adr = AREG((Opcode >> 0) & 7); |
4720 | AREG((Opcode >> 0) & 7) += 1; |
4721 | PRE_IO |
4722 | READ_BYTE_F(adr, res) |
4723 | flag_NotZ = res & src; |
4724 | res ^= src; |
4725 | WRITE_BYTE_F(adr, res) |
4726 | POST_IO |
4727 | RET(12) |
4728 | } |
4729 | |
4730 | // BCHG |
4731 | OPCODE(0x0160) |
4732 | { |
4733 | u32 adr, res; |
4734 | u32 src, dst; |
4735 | |
4736 | src = DREGu8((Opcode >> 9) & 7); |
4737 | src = 1 << (src & 7); |
4738 | adr = AREG((Opcode >> 0) & 7) - 1; |
4739 | AREG((Opcode >> 0) & 7) = adr; |
4740 | PRE_IO |
4741 | READ_BYTE_F(adr, res) |
4742 | flag_NotZ = res & src; |
4743 | res ^= src; |
4744 | WRITE_BYTE_F(adr, res) |
4745 | POST_IO |
4746 | RET(14) |
4747 | } |
4748 | |
4749 | // BCHG |
4750 | OPCODE(0x0168) |
4751 | { |
4752 | u32 adr, res; |
4753 | u32 src, dst; |
4754 | |
4755 | src = DREGu8((Opcode >> 9) & 7); |
4756 | src = 1 << (src & 7); |
4757 | FETCH_SWORD(adr); |
4758 | adr += AREG((Opcode >> 0) & 7); |
4759 | PRE_IO |
4760 | READ_BYTE_F(adr, res) |
4761 | flag_NotZ = res & src; |
4762 | res ^= src; |
4763 | WRITE_BYTE_F(adr, res) |
4764 | POST_IO |
4765 | RET(16) |
4766 | } |
4767 | |
4768 | // BCHG |
4769 | OPCODE(0x0170) |
4770 | { |
4771 | u32 adr, res; |
4772 | u32 src, dst; |
4773 | |
4774 | src = DREGu8((Opcode >> 9) & 7); |
4775 | src = 1 << (src & 7); |
4776 | adr = AREG((Opcode >> 0) & 7); |
4777 | DECODE_EXT_WORD |
4778 | PRE_IO |
4779 | READ_BYTE_F(adr, res) |
4780 | flag_NotZ = res & src; |
4781 | res ^= src; |
4782 | WRITE_BYTE_F(adr, res) |
4783 | POST_IO |
4784 | RET(18) |
4785 | } |
4786 | |
4787 | // BCHG |
4788 | OPCODE(0x0178) |
4789 | { |
4790 | u32 adr, res; |
4791 | u32 src, dst; |
4792 | |
4793 | src = DREGu8((Opcode >> 9) & 7); |
4794 | src = 1 << (src & 7); |
4795 | FETCH_SWORD(adr); |
4796 | PRE_IO |
4797 | READ_BYTE_F(adr, res) |
4798 | flag_NotZ = res & src; |
4799 | res ^= src; |
4800 | WRITE_BYTE_F(adr, res) |
4801 | POST_IO |
4802 | RET(16) |
4803 | } |
4804 | |
4805 | // BCHG |
4806 | OPCODE(0x0179) |
4807 | { |
4808 | u32 adr, res; |
4809 | u32 src, dst; |
4810 | |
4811 | src = DREGu8((Opcode >> 9) & 7); |
4812 | src = 1 << (src & 7); |
4813 | FETCH_LONG(adr); |
4814 | PRE_IO |
4815 | READ_BYTE_F(adr, res) |
4816 | flag_NotZ = res & src; |
4817 | res ^= src; |
4818 | WRITE_BYTE_F(adr, res) |
4819 | POST_IO |
4820 | RET(20) |
4821 | } |
4822 | |
4823 | // BCHG |
4824 | OPCODE(0x015F) |
4825 | { |
4826 | u32 adr, res; |
4827 | u32 src, dst; |
4828 | |
4829 | src = DREGu8((Opcode >> 9) & 7); |
4830 | src = 1 << (src & 7); |
4831 | adr = AREG(7); |
4832 | AREG(7) += 2; |
4833 | PRE_IO |
4834 | READ_BYTE_F(adr, res) |
4835 | flag_NotZ = res & src; |
4836 | res ^= src; |
4837 | WRITE_BYTE_F(adr, res) |
4838 | POST_IO |
4839 | RET(12) |
4840 | } |
4841 | |
4842 | // BCHG |
4843 | OPCODE(0x0167) |
4844 | { |
4845 | u32 adr, res; |
4846 | u32 src, dst; |
4847 | |
4848 | src = DREGu8((Opcode >> 9) & 7); |
4849 | src = 1 << (src & 7); |
4850 | adr = AREG(7) - 2; |
4851 | AREG(7) = adr; |
4852 | PRE_IO |
4853 | READ_BYTE_F(adr, res) |
4854 | flag_NotZ = res & src; |
4855 | res ^= src; |
4856 | WRITE_BYTE_F(adr, res) |
4857 | POST_IO |
4858 | RET(14) |
4859 | } |
4860 | |
4861 | // BCLR |
4862 | OPCODE(0x0180) |
4863 | { |
4864 | u32 adr, res; |
4865 | u32 src, dst; |
4866 | |
4867 | src = DREGu32((Opcode >> 9) & 7); |
4868 | src = 1 << (src & 31); |
4869 | res = DREGu32((Opcode >> 0) & 7); |
4870 | flag_NotZ = res & src; |
4871 | res &= ~src; |
4872 | DREGu32((Opcode >> 0) & 7) = res; |
3f591822 |
4873 | #ifdef USE_CYCLONE_TIMING |
4874 | if (src >> 16) ctx->io_cycle_counter -= 2; |
4875 | RET(8) |
4876 | #else |
70357ce5 |
4877 | RET(10) |
3f591822 |
4878 | #endif |
70357ce5 |
4879 | } |
4880 | |
4881 | // BCLR |
4882 | OPCODE(0x0190) |
4883 | { |
4884 | u32 adr, res; |
4885 | u32 src, dst; |
4886 | |
4887 | src = DREGu8((Opcode >> 9) & 7); |
4888 | src = 1 << (src & 7); |
4889 | adr = AREG((Opcode >> 0) & 7); |
4890 | PRE_IO |
4891 | READ_BYTE_F(adr, res) |
4892 | flag_NotZ = res & src; |
4893 | res &= ~src; |
4894 | WRITE_BYTE_F(adr, res) |
4895 | POST_IO |
4896 | RET(12) |
4897 | } |
4898 | |
4899 | // BCLR |
4900 | OPCODE(0x0198) |
4901 | { |
4902 | u32 adr, res; |
4903 | u32 src, dst; |
4904 | |
4905 | src = DREGu8((Opcode >> 9) & 7); |
4906 | src = 1 << (src & 7); |
4907 | adr = AREG((Opcode >> 0) & 7); |
4908 | AREG((Opcode >> 0) & 7) += 1; |
4909 | PRE_IO |
4910 | READ_BYTE_F(adr, res) |
4911 | flag_NotZ = res & src; |
4912 | res &= ~src; |
4913 | WRITE_BYTE_F(adr, res) |
4914 | POST_IO |
4915 | RET(12) |
4916 | } |
4917 | |
4918 | // BCLR |
4919 | OPCODE(0x01A0) |
4920 | { |
4921 | u32 adr, res; |
4922 | u32 src, dst; |
4923 | |
4924 | src = DREGu8((Opcode >> 9) & 7); |
4925 | src = 1 << (src & 7); |
4926 | adr = AREG((Opcode >> 0) & 7) - 1; |
4927 | AREG((Opcode >> 0) & 7) = adr; |
4928 | PRE_IO |
4929 | READ_BYTE_F(adr, res) |
4930 | flag_NotZ = res & src; |
4931 | res &= ~src; |
4932 | WRITE_BYTE_F(adr, res) |
4933 | POST_IO |
4934 | RET(14) |
4935 | } |
4936 | |
4937 | // BCLR |
4938 | OPCODE(0x01A8) |
4939 | { |
4940 | u32 adr, res; |
4941 | u32 src, dst; |
4942 | |
4943 | src = DREGu8((Opcode >> 9) & 7); |
4944 | src = 1 << (src & 7); |
4945 | FETCH_SWORD(adr); |
4946 | adr += AREG((Opcode >> 0) & 7); |
4947 | PRE_IO |
4948 | READ_BYTE_F(adr, res) |
4949 | flag_NotZ = res & src; |
4950 | res &= ~src; |
4951 | WRITE_BYTE_F(adr, res) |
4952 | POST_IO |
4953 | RET(16) |
4954 | } |
4955 | |
4956 | // BCLR |
4957 | OPCODE(0x01B0) |
4958 | { |
4959 | u32 adr, res; |
4960 | u32 src, dst; |
4961 | |
4962 | src = DREGu8((Opcode >> 9) & 7); |
4963 | src = 1 << (src & 7); |
4964 | adr = AREG((Opcode >> 0) & 7); |
4965 | DECODE_EXT_WORD |
4966 | PRE_IO |
4967 | READ_BYTE_F(adr, res) |
4968 | flag_NotZ = res & src; |
4969 | res &= ~src; |
4970 | WRITE_BYTE_F(adr, res) |
4971 | POST_IO |
4972 | RET(18) |
4973 | } |
4974 | |
4975 | // BCLR |
4976 | OPCODE(0x01B8) |
4977 | { |
4978 | u32 adr, res; |
4979 | u32 src, dst; |
4980 | |
4981 | src = DREGu8((Opcode >> 9) & 7); |
4982 | src = 1 << (src & 7); |
4983 | FETCH_SWORD(adr); |
4984 | PRE_IO |
4985 | READ_BYTE_F(adr, res) |
4986 | flag_NotZ = res & src; |
4987 | res &= ~src; |
4988 | WRITE_BYTE_F(adr, res) |
4989 | POST_IO |
4990 | RET(16) |
4991 | } |
4992 | |
4993 | // BCLR |
4994 | OPCODE(0x01B9) |
4995 | { |
4996 | u32 adr, res; |
4997 | u32 src, dst; |
4998 | |
4999 | src = DREGu8((Opcode >> 9) & 7); |
5000 | src = 1 << (src & 7); |
5001 | FETCH_LONG(adr); |
5002 | PRE_IO |
5003 | READ_BYTE_F(adr, res) |
5004 | flag_NotZ = res & src; |
5005 | res &= ~src; |
5006 | WRITE_BYTE_F(adr, res) |
5007 | POST_IO |
5008 | RET(20) |
5009 | } |
5010 | |
5011 | // BCLR |
5012 | OPCODE(0x019F) |
5013 | { |
5014 | u32 adr, res; |
5015 | u32 src, dst; |
5016 | |
5017 | src = DREGu8((Opcode >> 9) & 7); |
5018 | src = 1 << (src & 7); |
5019 | adr = AREG(7); |
5020 | AREG(7) += 2; |
5021 | PRE_IO |
5022 | READ_BYTE_F(adr, res) |
5023 | flag_NotZ = res & src; |
5024 | res &= ~src; |
5025 | WRITE_BYTE_F(adr, res) |
5026 | POST_IO |
5027 | RET(12) |
5028 | } |
5029 | |
5030 | // BCLR |
5031 | OPCODE(0x01A7) |
5032 | { |
5033 | u32 adr, res; |
5034 | u32 src, dst; |
5035 | |
5036 | src = DREGu8((Opcode >> 9) & 7); |
5037 | src = 1 << (src & 7); |
5038 | adr = AREG(7) - 2; |
5039 | AREG(7) = adr; |
5040 | PRE_IO |
5041 | READ_BYTE_F(adr, res) |
5042 | flag_NotZ = res & src; |
5043 | res &= ~src; |
5044 | WRITE_BYTE_F(adr, res) |
5045 | POST_IO |
5046 | RET(14) |
5047 | } |
5048 | |
5049 | // BSET |
5050 | OPCODE(0x01C0) |
5051 | { |
5052 | u32 adr, res; |
5053 | u32 src, dst; |
5054 | |
5055 | src = DREGu32((Opcode >> 9) & 7); |
5056 | src = 1 << (src & 31); |
5057 | res = DREGu32((Opcode >> 0) & 7); |
5058 | flag_NotZ = res & src; |
5059 | res |= src; |
5060 | DREGu32((Opcode >> 0) & 7) = res; |
3f591822 |
5061 | #ifdef USE_CYCLONE_TIMING |
5062 | if (src >> 16) ctx->io_cycle_counter -= 2; |
5063 | RET(6) |
5064 | #else |
70357ce5 |
5065 | RET(8) |
3f591822 |
5066 | #endif |
70357ce5 |
5067 | } |
5068 | |
5069 | // BSET |
5070 | OPCODE(0x01D0) |
5071 | { |
5072 | u32 adr, res; |
5073 | u32 src, dst; |
5074 | |
5075 | src = DREGu8((Opcode >> 9) & 7); |
5076 | src = 1 << (src & 7); |
5077 | adr = AREG((Opcode >> 0) & 7); |
5078 | PRE_IO |
5079 | READ_BYTE_F(adr, res) |
5080 | flag_NotZ = res & src; |
5081 | res |= src; |
5082 | WRITE_BYTE_F(adr, res) |
5083 | POST_IO |
5084 | RET(12) |
5085 | } |
5086 | |
5087 | // BSET |
5088 | OPCODE(0x01D8) |
5089 | { |
5090 | u32 adr, res; |
5091 | u32 src, dst; |
5092 | |
5093 | src = DREGu8((Opcode >> 9) & 7); |
5094 | src = 1 << (src & 7); |
5095 | adr = AREG((Opcode >> 0) & 7); |
5096 | AREG((Opcode >> 0) & 7) += 1; |
5097 | PRE_IO |
5098 | READ_BYTE_F(adr, res) |
5099 | flag_NotZ = res & src; |
5100 | res |= src; |
5101 | WRITE_BYTE_F(adr, res) |
5102 | POST_IO |
5103 | RET(12) |
5104 | } |
5105 | |
5106 | // BSET |
5107 | OPCODE(0x01E0) |
5108 | { |
5109 | u32 adr, res; |
5110 | u32 src, dst; |
5111 | |
5112 | src = DREGu8((Opcode >> 9) & 7); |
5113 | src = 1 << (src & 7); |
5114 | adr = AREG((Opcode >> 0) & 7) - 1; |
5115 | AREG((Opcode >> 0) & 7) = adr; |
5116 | PRE_IO |
5117 | READ_BYTE_F(adr, res) |
5118 | flag_NotZ = res & src; |
5119 | res |= src; |
5120 | WRITE_BYTE_F(adr, res) |
5121 | POST_IO |
5122 | RET(14) |
5123 | } |
5124 | |
5125 | // BSET |
5126 | OPCODE(0x01E8) |
5127 | { |
5128 | u32 adr, res; |
5129 | u32 src, dst; |
5130 | |
5131 | src = DREGu8((Opcode >> 9) & 7); |
5132 | src = 1 << (src & 7); |
5133 | FETCH_SWORD(adr); |
5134 | adr += AREG((Opcode >> 0) & 7); |
5135 | PRE_IO |
5136 | READ_BYTE_F(adr, res) |
5137 | flag_NotZ = res & src; |
5138 | res |= src; |
5139 | WRITE_BYTE_F(adr, res) |
5140 | POST_IO |
5141 | RET(16) |
5142 | } |
5143 | |
5144 | // BSET |
5145 | OPCODE(0x01F0) |
5146 | { |
5147 | u32 adr, res; |
5148 | u32 src, dst; |
5149 | |
5150 | src = DREGu8((Opcode >> 9) & 7); |
5151 | src = 1 << (src & 7); |
5152 | adr = AREG((Opcode >> 0) & 7); |
5153 | DECODE_EXT_WORD |
5154 | PRE_IO |
5155 | READ_BYTE_F(adr, res) |
5156 | flag_NotZ = res & src; |
5157 | res |= src; |
5158 | WRITE_BYTE_F(adr, res) |
5159 | POST_IO |
5160 | RET(18) |
5161 | } |
5162 | |
5163 | // BSET |
5164 | OPCODE(0x01F8) |
5165 | { |
5166 | u32 adr, res; |
5167 | u32 src, dst; |
5168 | |
5169 | src = DREGu8((Opcode >> 9) & 7); |
5170 | src = 1 << (src & 7); |
5171 | FETCH_SWORD(adr); |
5172 | PRE_IO |
5173 | READ_BYTE_F(adr, res) |
5174 | flag_NotZ = res & src; |
5175 | res |= src; |
5176 | WRITE_BYTE_F(adr, res) |
5177 | POST_IO |
5178 | RET(16) |
5179 | } |
5180 | |
5181 | // BSET |
5182 | OPCODE(0x01F9) |
5183 | { |
5184 | u32 adr, res; |
5185 | u32 src, dst; |
5186 | |
5187 | src = DREGu8((Opcode >> 9) & 7); |
5188 | src = 1 << (src & 7); |
5189 | FETCH_LONG(adr); |
5190 | PRE_IO |
5191 | READ_BYTE_F(adr, res) |
5192 | flag_NotZ = res & src; |
5193 | res |= src; |
5194 | WRITE_BYTE_F(adr, res) |
5195 | POST_IO |
5196 | RET(20) |
5197 | } |
5198 | |
5199 | // BSET |
5200 | OPCODE(0x01DF) |
5201 | { |
5202 | u32 adr, res; |
5203 | u32 src, dst; |
5204 | |
5205 | src = DREGu8((Opcode >> 9) & 7); |
5206 | src = 1 << (src & 7); |
5207 | adr = AREG(7); |
5208 | AREG(7) += 2; |
5209 | PRE_IO |
5210 | READ_BYTE_F(adr, res) |
5211 | flag_NotZ = res & src; |
5212 | res |= src; |
5213 | WRITE_BYTE_F(adr, res) |
5214 | POST_IO |
5215 | RET(12) |
5216 | } |
5217 | |
5218 | // BSET |
5219 | OPCODE(0x01E7) |
5220 | { |
5221 | u32 adr, res; |
5222 | u32 src, dst; |
5223 | |
5224 | src = DREGu8((Opcode >> 9) & 7); |
5225 | src = 1 << (src & 7); |
5226 | adr = AREG(7) - 2; |
5227 | AREG(7) = adr; |
5228 | PRE_IO |
5229 | READ_BYTE_F(adr, res) |
5230 | flag_NotZ = res & src; |
5231 | res |= src; |
5232 | WRITE_BYTE_F(adr, res) |
5233 | POST_IO |
5234 | RET(14) |
5235 | } |
5236 | |
5237 | // MOVEPWaD |
5238 | OPCODE(0x0108) |
5239 | { |
5240 | u32 adr, res; |
5241 | u32 src, dst; |
5242 | |
5243 | FETCH_SWORD(adr); |
5244 | adr += AREG((Opcode >> 0) & 7); |
5245 | PRE_IO |
5246 | READ_BYTE_F(adr + 0, res) |
5247 | READ_BYTE_F(adr + 2, src) |
5248 | DREGu16((Opcode >> 9) & 7) = (res << 8) | src; |
5249 | POST_IO |
03e4f2a3 |
5250 | #ifdef USE_CYCLONE_TIMING |
5251 | RET(16) |
5252 | #else |
70357ce5 |
5253 | RET(24) |
03e4f2a3 |
5254 | #endif |
70357ce5 |
5255 | } |
5256 | |
5257 | // MOVEPLaD |
5258 | OPCODE(0x0148) |
5259 | { |
5260 | u32 adr, res; |
5261 | u32 src, dst; |
5262 | |
5263 | FETCH_SWORD(adr); |
5264 | adr += AREG((Opcode >> 0) & 7); |
5265 | PRE_IO |
5266 | READ_BYTE_F(adr, res) |
5267 | res <<= 24; |
5268 | adr += 2; |
5269 | READ_BYTE_F(adr, src) |
5270 | res |= src << 16; |
5271 | adr += 2; |
5272 | READ_BYTE_F(adr, src) |
5273 | res |= src << 8; |
5274 | adr += 2; |
5275 | READ_BYTE_F(adr, src) |
5276 | DREG((Opcode >> 9) & 7) = res | src; |
5277 | POST_IO |
03e4f2a3 |
5278 | #ifdef USE_CYCLONE_TIMING |
5279 | RET(24) |
5280 | #else |
70357ce5 |
5281 | RET(32) |
03e4f2a3 |
5282 | #endif |
70357ce5 |
5283 | } |
5284 | |
5285 | // MOVEPWDa |
5286 | OPCODE(0x0188) |
5287 | { |
5288 | u32 adr, res; |
5289 | u32 src, dst; |
5290 | |
5291 | res = DREGu32((Opcode >> 9) & 7); |
5292 | FETCH_SWORD(adr); |
5293 | adr += AREG((Opcode >> 0) & 7); |
5294 | PRE_IO |
5295 | WRITE_BYTE_F(adr + 0, res >> 8) |
5296 | WRITE_BYTE_F(adr + 2, res >> 0) |
5297 | POST_IO |
03e4f2a3 |
5298 | #ifdef USE_CYCLONE_TIMING |
5299 | RET(16) |
5300 | #else |
70357ce5 |
5301 | RET(24) |
03e4f2a3 |
5302 | #endif |
70357ce5 |
5303 | } |
5304 | |
5305 | // MOVEPLDa |
5306 | OPCODE(0x01C8) |
5307 | { |
5308 | u32 adr, res; |
5309 | u32 src, dst; |
5310 | |
5311 | res = DREGu32((Opcode >> 9) & 7); |
5312 | FETCH_SWORD(adr); |
5313 | adr += AREG((Opcode >> 0) & 7); |
5314 | PRE_IO |
5315 | WRITE_BYTE_F(adr, res >> 24) |
5316 | adr += 2; |
5317 | WRITE_BYTE_F(adr, res >> 16) |
5318 | adr += 2; |
5319 | WRITE_BYTE_F(adr, res >> 8) |
5320 | adr += 2; |
5321 | WRITE_BYTE_F(adr, res >> 0) |
5322 | POST_IO |
03e4f2a3 |
5323 | #ifdef USE_CYCLONE_TIMING |
5324 | RET(24) |
5325 | #else |
70357ce5 |
5326 | RET(32) |
03e4f2a3 |
5327 | #endif |
70357ce5 |
5328 | } |
5329 | |
5330 | // MOVEB |
5331 | OPCODE(0x1000) |
5332 | { |
5333 | u32 adr, res; |
5334 | u32 src, dst; |
5335 | |
5336 | res = DREGu8((Opcode >> 0) & 7); |
5337 | flag_C = 0; |
5338 | flag_V = 0; |
5339 | flag_NotZ = res; |
5340 | flag_N = res; |
5341 | DREGu8((Opcode >> 9) & 7) = res; |
5342 | RET(4) |
5343 | } |
5344 | |
5345 | // MOVEB |
5346 | OPCODE(0x1080) |
5347 | { |
5348 | u32 adr, res; |
5349 | u32 src, dst; |
5350 | |
5351 | res = DREGu8((Opcode >> 0) & 7); |
5352 | flag_C = 0; |
5353 | flag_V = 0; |
5354 | flag_NotZ = res; |
5355 | flag_N = res; |
5356 | adr = AREG((Opcode >> 9) & 7); |
5357 | PRE_IO |
5358 | WRITE_BYTE_F(adr, res) |
5359 | POST_IO |
5360 | RET(8) |
5361 | } |
5362 | |
5363 | // MOVEB |
5364 | OPCODE(0x10C0) |
5365 | { |
5366 | u32 adr, res; |
5367 | u32 src, dst; |
5368 | |
5369 | res = DREGu8((Opcode >> 0) & 7); |
5370 | flag_C = 0; |
5371 | flag_V = 0; |
5372 | flag_NotZ = res; |
5373 | flag_N = res; |
5374 | adr = AREG((Opcode >> 9) & 7); |
5375 | AREG((Opcode >> 9) & 7) += 1; |
5376 | PRE_IO |
5377 | WRITE_BYTE_F(adr, res) |
5378 | POST_IO |
5379 | RET(8) |
5380 | } |
5381 | |
5382 | // MOVEB |
5383 | OPCODE(0x1100) |
5384 | { |
5385 | u32 adr, res; |
5386 | u32 src, dst; |
5387 | |
5388 | res = DREGu8((Opcode >> 0) & 7); |
5389 | flag_C = 0; |
5390 | flag_V = 0; |
5391 | flag_NotZ = res; |
5392 | flag_N = res; |
5393 | adr = AREG((Opcode >> 9) & 7) - 1; |
5394 | AREG((Opcode >> 9) & 7) = adr; |
5395 | PRE_IO |
5396 | WRITE_BYTE_F(adr, res) |
5397 | POST_IO |
5398 | RET(8) |
5399 | } |
5400 | |
5401 | // MOVEB |
5402 | OPCODE(0x1140) |
5403 | { |
5404 | u32 adr, res; |
5405 | u32 src, dst; |
5406 | |
5407 | res = DREGu8((Opcode >> 0) & 7); |
5408 | flag_C = 0; |
5409 | flag_V = 0; |
5410 | flag_NotZ = res; |
5411 | flag_N = res; |
5412 | FETCH_SWORD(adr); |
5413 | adr += AREG((Opcode >> 9) & 7); |
5414 | PRE_IO |
5415 | WRITE_BYTE_F(adr, res) |
5416 | POST_IO |
5417 | RET(12) |
5418 | } |
5419 | |
5420 | // MOVEB |
5421 | OPCODE(0x1180) |
5422 | { |
5423 | u32 adr, res; |
5424 | u32 src, dst; |
5425 | |
5426 | res = DREGu8((Opcode >> 0) & 7); |
5427 | flag_C = 0; |
5428 | flag_V = 0; |
5429 | flag_NotZ = res; |
5430 | flag_N = res; |
5431 | adr = AREG((Opcode >> 9) & 7); |
5432 | DECODE_EXT_WORD |
5433 | PRE_IO |
5434 | WRITE_BYTE_F(adr, res) |
5435 | POST_IO |
5436 | RET(14) |
5437 | } |
5438 | |
5439 | // MOVEB |
5440 | OPCODE(0x11C0) |
5441 | { |
5442 | u32 adr, res; |
5443 | u32 src, dst; |
5444 | |
5445 | res = DREGu8((Opcode >> 0) & 7); |
5446 | flag_C = 0; |
5447 | flag_V = 0; |
5448 | flag_NotZ = res; |
5449 | flag_N = res; |
5450 | FETCH_SWORD(adr); |
5451 | PRE_IO |
5452 | WRITE_BYTE_F(adr, res) |
5453 | POST_IO |
5454 | RET(12) |
5455 | } |
5456 | |
5457 | // MOVEB |
5458 | OPCODE(0x13C0) |
5459 | { |
5460 | u32 adr, res; |
5461 | u32 src, dst; |
5462 | |
5463 | res = DREGu8((Opcode >> 0) & 7); |
5464 | flag_C = 0; |
5465 | flag_V = 0; |
5466 | flag_NotZ = res; |
5467 | flag_N = res; |
5468 | FETCH_LONG(adr); |
5469 | PRE_IO |
5470 | WRITE_BYTE_F(adr, res) |
5471 | POST_IO |
5472 | RET(16) |
5473 | } |
5474 | |
5475 | // MOVEB |
5476 | OPCODE(0x1EC0) |
5477 | { |
5478 | u32 adr, res; |
5479 | u32 src, dst; |
5480 | |
5481 | res = DREGu8((Opcode >> 0) & 7); |
5482 | flag_C = 0; |
5483 | flag_V = 0; |
5484 | flag_NotZ = res; |
5485 | flag_N = res; |
5486 | adr = AREG(7); |
5487 | AREG(7) += 2; |
5488 | PRE_IO |
5489 | WRITE_BYTE_F(adr, res) |
5490 | POST_IO |
5491 | RET(8) |
5492 | } |
5493 | |
5494 | // MOVEB |
5495 | OPCODE(0x1F00) |
5496 | { |
5497 | u32 adr, res; |
5498 | u32 src, dst; |
5499 | |
5500 | res = DREGu8((Opcode >> 0) & 7); |
5501 | flag_C = 0; |
5502 | flag_V = 0; |
5503 | flag_NotZ = res; |
5504 | flag_N = res; |
5505 | adr = AREG(7) - 2; |
5506 | AREG(7) = adr; |
5507 | PRE_IO |
5508 | WRITE_BYTE_F(adr, res) |
5509 | POST_IO |
5510 | RET(8) |
5511 | } |
5512 | |
03e4f2a3 |
5513 | #if 0 |
70357ce5 |
5514 | // MOVEB |
5515 | OPCODE(0x1008) |
5516 | { |
5517 | u32 adr, res; |
5518 | u32 src, dst; |
5519 | |
5520 | // can't read byte from Ax registers ! |
7669591e |
5521 | ctx->execinfo |= M68K_FAULTED; |
5522 | ctx->io_cycle_counter = 0; |
70357ce5 |
5523 | /* |
5524 | goto famec_Exec_End; |
5525 | flag_C = 0; |
5526 | flag_V = 0; |
5527 | flag_NotZ = res; |
5528 | flag_N = res; |
5529 | DREGu8((Opcode >> 9) & 7) = res; |
5530 | */ |
5531 | RET(4) |
5532 | } |
5533 | |
5534 | // MOVEB |
5535 | OPCODE(0x1088) |
5536 | { |
5537 | u32 adr, res; |
5538 | u32 src, dst; |
5539 | |
5540 | // can't read byte from Ax registers ! |
7669591e |
5541 | ctx->execinfo |= M68K_FAULTED; |
5542 | ctx->io_cycle_counter = 0; |
70357ce5 |
5543 | /* |
5544 | goto famec_Exec_End; |
5545 | flag_C = 0; |
5546 | flag_V = 0; |
5547 | flag_NotZ = res; |
5548 | flag_N = res; |
5549 | adr = AREG((Opcode >> 9) & 7); |
5550 | PRE_IO |
5551 | WRITE_BYTE_F(adr, res) |
5552 | POST_IO |
5553 | */ |
5554 | RET(8) |
5555 | } |
5556 | |
5557 | // MOVEB |
5558 | OPCODE(0x10C8) |
5559 | { |
5560 | u32 adr, res; |
5561 | u32 src, dst; |
5562 | |
5563 | // can't read byte from Ax registers ! |
7669591e |
5564 | ctx->execinfo |= M68K_FAULTED; |
5565 | ctx->io_cycle_counter = 0; |
70357ce5 |
5566 | /* |
5567 | goto famec_Exec_End; |
5568 | flag_C = 0; |
5569 | flag_V = 0; |
5570 | flag_NotZ = res; |
5571 | flag_N = res; |
5572 | adr = AREG((Opcode >> 9) & 7); |
5573 | AREG((Opcode >> 9) & 7) += 1; |
5574 | PRE_IO |
5575 | WRITE_BYTE_F(adr, res) |
5576 | POST_IO |
5577 | */ |
5578 | RET(8) |
5579 | } |
5580 | |
5581 | // MOVEB |
5582 | OPCODE(0x1108) |
5583 | { |
5584 | u32 adr, res; |
5585 | u32 src, dst; |
5586 | |
5587 | // can't read byte from Ax registers ! |
7669591e |
5588 | ctx->execinfo |= M68K_FAULTED; |
5589 | ctx->io_cycle_counter = 0; |
70357ce5 |
5590 | /* |
5591 | goto famec_Exec_End; |
5592 | flag_C = 0; |
5593 | flag_V = 0; |
5594 | flag_NotZ = res; |
5595 | flag_N = res; |
5596 | adr = AREG((Opcode >> 9) & 7) - 1; |
5597 | AREG((Opcode >> 9) & 7) = adr; |
5598 | PRE_IO |
5599 | WRITE_BYTE_F(adr, res) |
5600 | POST_IO |
5601 | */ |
5602 | RET(8) |
5603 | } |
5604 | |
5605 | // MOVEB |
5606 | OPCODE(0x1148) |
5607 | { |
5608 | u32 adr, res; |
5609 | u32 src, dst; |
5610 | |
5611 | // can't read byte from Ax registers ! |
7669591e |
5612 | ctx->execinfo |= M68K_FAULTED; |
5613 | ctx->io_cycle_counter = 0; |
70357ce5 |
5614 | /* |
5615 | goto famec_Exec_End; |
5616 | flag_C = 0; |
5617 | flag_V = 0; |
5618 | flag_NotZ = res; |
5619 | flag_N = res; |
5620 | FETCH_SWORD(adr); |
5621 | adr += AREG((Opcode >> 9) & 7); |
5622 | PRE_IO |
5623 | WRITE_BYTE_F(adr, res) |
5624 | POST_IO |
5625 | */ |
5626 | RET(12) |
5627 | } |
5628 | |
5629 | // MOVEB |
5630 | OPCODE(0x1188) |
5631 | { |
5632 | u32 adr, res; |
5633 | u32 src, dst; |
5634 | |
5635 | // can't read byte from Ax registers ! |
7669591e |
5636 | ctx->execinfo |= M68K_FAULTED; |
5637 | ctx->io_cycle_counter = 0; |
70357ce5 |
5638 | /* |
5639 | goto famec_Exec_End; |
5640 | flag_C = 0; |
5641 | flag_V = 0; |
5642 | flag_NotZ = res; |
5643 | flag_N = res; |
5644 | adr = AREG((Opcode >> 9) & 7); |
5645 | DECODE_EXT_WORD |
5646 | PRE_IO |
5647 | WRITE_BYTE_F(adr, res) |
5648 | POST_IO |
5649 | */ |
5650 | RET(14) |
5651 | } |
5652 | |
5653 | // MOVEB |
5654 | OPCODE(0x11C8) |
5655 | { |
5656 | u32 adr, res; |
5657 | u32 src, dst; |
5658 | |
5659 | // can't read byte from Ax registers ! |
7669591e |
5660 | ctx->execinfo |= M68K_FAULTED; |
5661 | ctx->io_cycle_counter = 0; |
70357ce5 |
5662 | /* |
5663 | goto famec_Exec_End; |
5664 | flag_C = 0; |
5665 | flag_V = 0; |
5666 | flag_NotZ = res; |
5667 | flag_N = res; |
5668 | FETCH_SWORD(adr); |
5669 | PRE_IO |
5670 | WRITE_BYTE_F(adr, res) |
5671 | POST_IO |
5672 | */ |
5673 | RET(12) |
5674 | } |
5675 | |
5676 | // MOVEB |
5677 | OPCODE(0x13C8) |
5678 | { |
5679 | u32 adr, res; |
5680 | u32 src, dst; |
5681 | |
5682 | // can't read byte from Ax registers ! |
7669591e |
5683 | ctx->execinfo |= M68K_FAULTED; |
5684 | ctx->io_cycle_counter = 0; |
70357ce5 |
5685 | /* |
5686 | goto famec_Exec_End; |
5687 | flag_C = 0; |
5688 | flag_V = 0; |
5689 | flag_NotZ = res; |
5690 | flag_N = res; |
5691 | FETCH_LONG(adr); |
5692 | PRE_IO |
5693 | WRITE_BYTE_F(adr, res) |
5694 | POST_IO |
5695 | */ |
5696 | RET(16) |
5697 | } |
5698 | |
5699 | // MOVEB |
5700 | OPCODE(0x1EC8) |
5701 | { |
5702 | u32 adr, res; |
5703 | u32 src, dst; |
5704 | |
5705 | // can't read byte from Ax registers ! |
7669591e |
5706 | ctx->execinfo |= M68K_FAULTED; |
5707 | ctx->io_cycle_counter = 0; |
70357ce5 |
5708 | /* |
5709 | goto famec_Exec_End; |
5710 | flag_C = 0; |
5711 | flag_V = 0; |
5712 | flag_NotZ = res; |
5713 | flag_N = res; |
5714 | adr = AREG(7); |
5715 | AREG(7) += 2; |
5716 | PRE_IO |
5717 | WRITE_BYTE_F(adr, res) |
5718 | POST_IO |
5719 | */ |
5720 | RET(8) |
5721 | } |
5722 | |
5723 | // MOVEB |
5724 | OPCODE(0x1F08) |
5725 | { |
5726 | u32 adr, res; |
5727 | u32 src, dst; |
5728 | |
5729 | // can't read byte from Ax registers ! |
7669591e |
5730 | ctx->execinfo |= M68K_FAULTED; |
5731 | ctx->io_cycle_counter = 0; |
70357ce5 |
5732 | /* |
5733 | goto famec_Exec_End; |
5734 | flag_C = 0; |
5735 | flag_V = 0; |
5736 | flag_NotZ = res; |
5737 | flag_N = res; |
5738 | adr = AREG(7) - 2; |
5739 | AREG(7) = adr; |
5740 | PRE_IO |
5741 | WRITE_BYTE_F(adr, res) |
5742 | POST_IO |
5743 | */ |
5744 | RET(8) |
5745 | } |
03e4f2a3 |
5746 | #endif |
70357ce5 |
5747 | |
5748 | // MOVEB |
5749 | OPCODE(0x1010) |
5750 | { |
5751 | u32 adr, res; |
5752 | u32 src, dst; |
5753 | |
5754 | adr = AREG((Opcode >> 0) & 7); |
5755 | PRE_IO |
5756 | READ_BYTE_F(adr, res) |
5757 | flag_C = 0; |
5758 | flag_V = 0; |
5759 | flag_NotZ = res; |
5760 | flag_N = res; |
5761 | DREGu8((Opcode >> 9) & 7) = res; |
5762 | POST_IO |
5763 | RET(8) |
5764 | } |
5765 | |
5766 | // MOVEB |
5767 | OPCODE(0x1090) |
5768 | { |
5769 | u32 adr, res; |
5770 | u32 src, dst; |
5771 | |
5772 | adr = AREG((Opcode >> 0) & 7); |
5773 | PRE_IO |
5774 | READ_BYTE_F(adr, res) |
5775 | flag_C = 0; |
5776 | flag_V = 0; |
5777 | flag_NotZ = res; |
5778 | flag_N = res; |
5779 | adr = AREG((Opcode >> 9) & 7); |
5780 | WRITE_BYTE_F(adr, res) |
5781 | POST_IO |
5782 | RET(12) |
5783 | } |
5784 | |
5785 | // MOVEB |
5786 | OPCODE(0x10D0) |
5787 | { |
5788 | u32 adr, res; |
5789 | u32 src, dst; |
5790 | |
5791 | adr = AREG((Opcode >> 0) & 7); |
5792 | PRE_IO |
5793 | READ_BYTE_F(adr, res) |
5794 | flag_C = 0; |
5795 | flag_V = 0; |
5796 | flag_NotZ = res; |
5797 | flag_N = res; |
5798 | adr = AREG((Opcode >> 9) & 7); |
5799 | AREG((Opcode >> 9) & 7) += 1; |
5800 | WRITE_BYTE_F(adr, res) |
5801 | POST_IO |
5802 | RET(12) |
5803 | } |
5804 | |
5805 | // MOVEB |
5806 | OPCODE(0x1110) |
5807 | { |
5808 | u32 adr, res; |
5809 | u32 src, dst; |
5810 | |
5811 | adr = AREG((Opcode >> 0) & 7); |
5812 | PRE_IO |
5813 | READ_BYTE_F(adr, res) |
5814 | flag_C = 0; |
5815 | flag_V = 0; |
5816 | flag_NotZ = res; |
5817 | flag_N = res; |
5818 | adr = AREG((Opcode >> 9) & 7) - 1; |
5819 | AREG((Opcode >> 9) & 7) = adr; |
5820 | WRITE_BYTE_F(adr, res) |
5821 | POST_IO |
5822 | RET(12) |
5823 | } |
5824 | |
5825 | // MOVEB |
5826 | OPCODE(0x1150) |
5827 | { |
5828 | u32 adr, res; |
5829 | u32 src, dst; |
5830 | |
5831 | adr = AREG((Opcode >> 0) & 7); |
5832 | PRE_IO |
5833 | READ_BYTE_F(adr, res) |
5834 | flag_C = 0; |
5835 | flag_V = 0; |
5836 | flag_NotZ = res; |
5837 | flag_N = res; |
5838 | FETCH_SWORD(adr); |
5839 | adr += AREG((Opcode >> 9) & 7); |
5840 | WRITE_BYTE_F(adr, res) |
5841 | POST_IO |
5842 | RET(16) |
5843 | } |
5844 | |
5845 | // MOVEB |
5846 | OPCODE(0x1190) |
5847 | { |
5848 | u32 adr, res; |
5849 | u32 src, dst; |
5850 | |
5851 | adr = AREG((Opcode >> 0) & 7); |
5852 | PRE_IO |
5853 | READ_BYTE_F(adr, res) |
5854 | flag_C = 0; |
5855 | flag_V = 0; |
5856 | flag_NotZ = res; |
5857 | flag_N = res; |
5858 | adr = AREG((Opcode >> 9) & 7); |
5859 | DECODE_EXT_WORD |
5860 | WRITE_BYTE_F(adr, res) |
5861 | POST_IO |
5862 | RET(18) |
5863 | } |
5864 | |
5865 | // MOVEB |
5866 | OPCODE(0x11D0) |
5867 | { |
5868 | u32 adr, res; |
5869 | u32 src, dst; |
5870 | |
5871 | adr = AREG((Opcode >> 0) & 7); |
5872 | PRE_IO |
5873 | READ_BYTE_F(adr, res) |
5874 | flag_C = 0; |
5875 | flag_V = 0; |
5876 | flag_NotZ = res; |
5877 | flag_N = res; |
5878 | FETCH_SWORD(adr); |
5879 | WRITE_BYTE_F(adr, res) |
5880 | POST_IO |
5881 | RET(16) |
5882 | } |
5883 | |
5884 | // MOVEB |
5885 | OPCODE(0x13D0) |
5886 | { |
5887 | u32 adr, res; |
5888 | u32 src, dst; |
5889 | |
5890 | adr = AREG((Opcode >> 0) & 7); |
5891 | PRE_IO |
5892 | READ_BYTE_F(adr, res) |
5893 | flag_C = 0; |
5894 | flag_V = 0; |
5895 | flag_NotZ = res; |
5896 | flag_N = res; |
5897 | FETCH_LONG(adr); |
5898 | WRITE_BYTE_F(adr, res) |
5899 | POST_IO |
5900 | RET(20) |
5901 | } |
5902 | |
5903 | // MOVEB |
5904 | OPCODE(0x1ED0) |
5905 | { |
5906 | u32 adr, res; |
5907 | u32 src, dst; |
5908 | |
5909 | adr = AREG((Opcode >> 0) & 7); |
5910 | PRE_IO |
5911 | READ_BYTE_F(adr, res) |
5912 | flag_C = 0; |
5913 | flag_V = 0; |
5914 | flag_NotZ = res; |
5915 | flag_N = res; |
5916 | adr = AREG(7); |
5917 | AREG(7) += 2; |
5918 | WRITE_BYTE_F(adr, res) |
5919 | POST_IO |
5920 | RET(12) |
5921 | } |
5922 | |
5923 | // MOVEB |
5924 | OPCODE(0x1F10) |
5925 | { |
5926 | u32 adr, res; |
5927 | u32 src, dst; |
5928 | |
5929 | adr = AREG((Opcode >> 0) & 7); |
5930 | PRE_IO |
5931 | READ_BYTE_F(adr, res) |
5932 | flag_C = 0; |
5933 | flag_V = 0; |
5934 | flag_NotZ = res; |
5935 | flag_N = res; |
5936 | adr = AREG(7) - 2; |
5937 | AREG(7) = adr; |
5938 | WRITE_BYTE_F(adr, res) |
5939 | POST_IO |
5940 | RET(12) |
5941 | } |
5942 | |
5943 | // MOVEB |
5944 | OPCODE(0x1018) |
5945 | { |
5946 | u32 adr, res; |
5947 | u32 src, dst; |
5948 | |
5949 | adr = AREG((Opcode >> 0) & 7); |
5950 | AREG((Opcode >> 0) & 7) += 1; |
5951 | PRE_IO |
5952 | READ_BYTE_F(adr, res) |
5953 | flag_C = 0; |
5954 | flag_V = 0; |
5955 | flag_NotZ = res; |
5956 | flag_N = res; |
5957 | DREGu8((Opcode >> 9) & 7) = res; |
5958 | POST_IO |
5959 | RET(8) |
5960 | } |
5961 | |
5962 | // MOVEB |
5963 | OPCODE(0x1098) |
5964 | { |
5965 | u32 adr, res; |
5966 | u32 src, dst; |
5967 | |
5968 | adr = AREG((Opcode >> 0) & 7); |
5969 | AREG((Opcode >> 0) & 7) += 1; |
5970 | PRE_IO |
5971 | READ_BYTE_F(adr, res) |
5972 | flag_C = 0; |
5973 | flag_V = 0; |
5974 | flag_NotZ = res; |
5975 | flag_N = res; |
5976 | adr = AREG((Opcode >> 9) & 7); |
5977 | WRITE_BYTE_F(adr, res) |
5978 | POST_IO |
5979 | RET(12) |
5980 | } |
5981 | |
5982 | // MOVEB |
5983 | OPCODE(0x10D8) |
5984 | { |
5985 | u32 adr, res; |
5986 | u32 src, dst; |
5987 | |
5988 | adr = AREG((Opcode >> 0) & 7); |
5989 | AREG((Opcode >> 0) & 7) += 1; |
5990 | PRE_IO |
5991 | READ_BYTE_F(adr, res) |
5992 | flag_C = 0; |
5993 | flag_V = 0; |
5994 | flag_NotZ = res; |
5995 | flag_N = res; |
5996 | adr = AREG((Opcode >> 9) & 7); |
5997 | AREG((Opcode >> 9) & 7) += 1; |
5998 | WRITE_BYTE_F(adr, res) |
5999 | POST_IO |
6000 | RET(12) |
6001 | } |
6002 | |
6003 | // MOVEB |
6004 | OPCODE(0x1118) |
6005 | { |
6006 | u32 adr, res; |
6007 | u32 src, dst; |
6008 | |
6009 | adr = AREG((Opcode >> 0) & 7); |
6010 | AREG((Opcode >> 0) & 7) += 1; |
6011 | PRE_IO |
6012 | READ_BYTE_F(adr, res) |
6013 | flag_C = 0; |
6014 | flag_V = 0; |
6015 | flag_NotZ = res; |
6016 | flag_N = res; |
6017 | adr = AREG((Opcode >> 9) & 7) - 1; |
6018 | AREG((Opcode >> 9) & 7) = adr; |
6019 | WRITE_BYTE_F(adr, res) |
6020 | POST_IO |
6021 | RET(12) |
6022 | } |
6023 | |
6024 | // MOVEB |
6025 | OPCODE(0x1158) |
6026 | { |
6027 | u32 adr, res; |
6028 | u32 src, dst; |
6029 | |
6030 | adr = AREG((Opcode >> 0) & 7); |
6031 | AREG((Opcode >> 0) & 7) += 1; |
6032 | PRE_IO |
6033 | READ_BYTE_F(adr, res) |
6034 | flag_C = 0; |
6035 | flag_V = 0; |
6036 | flag_NotZ = res; |
6037 | flag_N = res; |
6038 | FETCH_SWORD(adr); |
6039 | adr += AREG((Opcode >> 9) & 7); |
6040 | WRITE_BYTE_F(adr, res) |
6041 | POST_IO |
6042 | RET(16) |
6043 | } |
6044 | |
6045 | // MOVEB |
6046 | OPCODE(0x1198) |
6047 | { |
6048 | u32 adr, res; |
6049 | u32 src, dst; |
6050 | |
6051 | adr = AREG((Opcode >> 0) & 7); |
6052 | AREG((Opcode >> 0) & 7) += 1; |
6053 | PRE_IO |
6054 | READ_BYTE_F(adr, res) |
6055 | flag_C = 0; |
6056 | flag_V = 0; |
6057 | flag_NotZ = res; |
6058 | flag_N = res; |
6059 | adr = AREG((Opcode >> 9) & 7); |
6060 | DECODE_EXT_WORD |
6061 | WRITE_BYTE_F(adr, res) |
6062 | POST_IO |
6063 | RET(18) |
6064 | } |
6065 | |
6066 | // MOVEB |
6067 | OPCODE(0x11D8) |
6068 | { |
6069 | u32 adr, res; |
6070 | u32 src, dst; |
6071 | |
6072 | adr = AREG((Opcode >> 0) & 7); |
6073 | AREG((Opcode >> 0) & 7) += 1; |
6074 | PRE_IO |
6075 | READ_BYTE_F(adr, res) |
6076 | flag_C = 0; |
6077 | flag_V = 0; |
6078 | flag_NotZ = res; |
6079 | flag_N = res; |
6080 | FETCH_SWORD(adr); |
6081 | WRITE_BYTE_F(adr, res) |
6082 | POST_IO |
6083 | RET(16) |
6084 | } |
6085 | |
6086 | // MOVEB |
6087 | OPCODE(0x13D8) |
6088 | { |
6089 | u32 adr, res; |
6090 | u32 src, dst; |
6091 | |
6092 | adr = AREG((Opcode >> 0) & 7); |
6093 | AREG((Opcode >> 0) & 7) += 1; |
6094 | PRE_IO |
6095 | READ_BYTE_F(adr, res) |
6096 | flag_C = 0; |
6097 | flag_V = 0; |
6098 | flag_NotZ = res; |
6099 | flag_N = res; |
6100 | FETCH_LONG(adr); |
6101 | WRITE_BYTE_F(adr, res) |
6102 | POST_IO |
6103 | RET(20) |
6104 | } |
6105 | |
6106 | // MOVEB |
6107 | OPCODE(0x1ED8) |
6108 | { |
6109 | u32 adr, res; |
6110 | u32 src, dst; |
6111 | |
6112 | adr = AREG((Opcode >> 0) & 7); |
6113 | AREG((Opcode >> 0) & 7) += 1; |
6114 | PRE_IO |
6115 | READ_BYTE_F(adr, res) |
6116 | flag_C = 0; |
6117 | flag_V = 0; |
6118 | flag_NotZ = res; |
6119 | flag_N = res; |
6120 | adr = AREG(7); |
6121 | AREG(7) += 2; |
6122 | WRITE_BYTE_F(adr, res) |
6123 | POST_IO |
6124 | RET(12) |
6125 | } |
6126 | |
6127 | // MOVEB |
6128 | OPCODE(0x1F18) |
6129 | { |
6130 | u32 adr, res; |
6131 | u32 src, dst; |
6132 | |
6133 | adr = AREG((Opcode >> 0) & 7); |
6134 | AREG((Opcode >> 0) & 7) += 1; |
6135 | PRE_IO |
6136 | READ_BYTE_F(adr, res) |
6137 | flag_C = 0; |
6138 | flag_V = 0; |
6139 | flag_NotZ = res; |
6140 | flag_N = res; |
6141 | adr = AREG(7) - 2; |
6142 | AREG(7) = adr; |
6143 | WRITE_BYTE_F(adr, res) |
6144 | POST_IO |
6145 | RET(12) |
6146 | } |
6147 | |
6148 | // MOVEB |
6149 | OPCODE(0x1020) |
6150 | { |
6151 | u32 adr, res; |
6152 | u32 src, dst; |
6153 | |
6154 | adr = AREG((Opcode >> 0) & 7) - 1; |
6155 | AREG((Opcode >> 0) & 7) = adr; |
6156 | PRE_IO |
6157 | READ_BYTE_F(adr, res) |
6158 | flag_C = 0; |
6159 | flag_V = 0; |
6160 | flag_NotZ = res; |
6161 | flag_N = res; |
6162 | DREGu8((Opcode >> 9) & 7) = res; |
6163 | POST_IO |
6164 | RET(10) |
6165 | } |
6166 | |
6167 | // MOVEB |
6168 | OPCODE(0x10A0) |
6169 | { |
6170 | u32 adr, res; |
6171 | u32 src, dst; |
6172 | |
6173 | adr = AREG((Opcode >> 0) & 7) - 1; |
6174 | AREG((Opcode >> 0) & 7) = adr; |
6175 | PRE_IO |
6176 | READ_BYTE_F(adr, res) |
6177 | flag_C = 0; |
6178 | flag_V = 0; |
6179 | flag_NotZ = res; |
6180 | flag_N = res; |
6181 | adr = AREG((Opcode >> 9) & 7); |
6182 | WRITE_BYTE_F(adr, res) |
6183 | POST_IO |
6184 | RET(14) |
6185 | } |
6186 | |
6187 | // MOVEB |
6188 | OPCODE(0x10E0) |
6189 | { |
6190 | u32 adr, res; |
6191 | u32 src, dst; |
6192 | |
6193 | adr = AREG((Opcode >> 0) & 7) - 1; |
6194 | AREG((Opcode >> 0) & 7) = adr; |
6195 | PRE_IO |
6196 | READ_BYTE_F(adr, res) |
6197 | flag_C = 0; |
6198 | flag_V = 0; |
6199 | flag_NotZ = res; |
6200 | flag_N = res; |
6201 | adr = AREG((Opcode >> 9) & 7); |
6202 | AREG((Opcode >> 9) & 7) += 1; |
6203 | WRITE_BYTE_F(adr, res) |
6204 | POST_IO |
6205 | RET(14) |
6206 | } |
6207 | |
6208 | // MOVEB |
6209 | OPCODE(0x1120) |
6210 | { |
6211 | u32 adr, res; |
6212 | u32 src, dst; |
6213 | |
6214 | adr = AREG((Opcode >> 0) & 7) - 1; |
6215 | AREG((Opcode >> 0) & 7) = adr; |
6216 | PRE_IO |
6217 | READ_BYTE_F(adr, res) |
6218 | flag_C = 0; |
6219 | flag_V = 0; |
6220 | flag_NotZ = res; |
6221 | flag_N = res; |
6222 | adr = AREG((Opcode >> 9) & 7) - 1; |
6223 | AREG((Opcode >> 9) & 7) = adr; |
6224 | WRITE_BYTE_F(adr, res) |
6225 | POST_IO |
6226 | RET(14) |
6227 | } |
6228 | |
6229 | // MOVEB |
6230 | OPCODE(0x1160) |
6231 | { |
6232 | u32 adr, res; |
6233 | u32 src, dst; |
6234 | |
6235 | adr = AREG((Opcode >> 0) & 7) - 1; |
6236 | AREG((Opcode >> 0) & 7) = adr; |
6237 | PRE_IO |
6238 | READ_BYTE_F(adr, res) |
6239 | flag_C = 0; |
6240 | flag_V = 0; |
6241 | flag_NotZ = res; |
6242 | flag_N = res; |
6243 | FETCH_SWORD(adr); |
6244 | adr += AREG((Opcode >> 9) & 7); |
6245 | WRITE_BYTE_F(adr, res) |
6246 | POST_IO |
6247 | RET(18) |
6248 | } |
6249 | |
6250 | // MOVEB |
6251 | OPCODE(0x11A0) |
6252 | { |
6253 | u32 adr, res; |
6254 | u32 src, dst; |
6255 | |
6256 | adr = AREG((Opcode >> 0) & 7) - 1; |
6257 | AREG((Opcode >> 0) & 7) = adr; |
6258 | PRE_IO |
6259 | READ_BYTE_F(adr, res) |
6260 | flag_C = 0; |
6261 | flag_V = 0; |
6262 | flag_NotZ = res; |
6263 | flag_N = res; |
6264 | adr = AREG((Opcode >> 9) & 7); |
6265 | DECODE_EXT_WORD |
6266 | WRITE_BYTE_F(adr, res) |
6267 | POST_IO |
6268 | RET(20) |
6269 | } |
6270 | |
6271 | // MOVEB |
6272 | OPCODE(0x11E0) |
6273 | { |
6274 | u32 adr, res; |
6275 | u32 src, dst; |
6276 | |
6277 | adr = AREG((Opcode >> 0) & 7) - 1; |
6278 | AREG((Opcode >> 0) & 7) = adr; |
6279 | PRE_IO |
6280 | READ_BYTE_F(adr, res) |
6281 | flag_C = 0; |
6282 | flag_V = 0; |
6283 | flag_NotZ = res; |
6284 | flag_N = res; |
6285 | FETCH_SWORD(adr); |
6286 | WRITE_BYTE_F(adr, res) |
6287 | POST_IO |
6288 | RET(18) |
6289 | } |
6290 | |
6291 | // MOVEB |
6292 | OPCODE(0x13E0) |
6293 | { |
6294 | u32 adr, res; |
6295 | u32 src, dst; |
6296 | |
6297 | adr = AREG((Opcode >> 0) & 7) - 1; |
6298 | AREG((Opcode >> 0) & 7) = adr; |
6299 | PRE_IO |
6300 | READ_BYTE_F(adr, res) |
6301 | flag_C = 0; |
6302 | flag_V = 0; |
6303 | flag_NotZ = res; |
6304 | flag_N = res; |
6305 | FETCH_LONG(adr); |
6306 | WRITE_BYTE_F(adr, res) |
6307 | POST_IO |
6308 | RET(22) |
6309 | } |
6310 | |
6311 | // MOVEB |
6312 | OPCODE(0x1EE0) |
6313 | { |
6314 | u32 adr, res; |
6315 | u32 src, dst; |
6316 | |
6317 | adr = AREG((Opcode >> 0) & 7) - 1; |
6318 | AREG((Opcode >> 0) & 7) = adr; |
6319 | PRE_IO |
6320 | READ_BYTE_F(adr, res) |
6321 | flag_C = 0; |
6322 | flag_V = 0; |
6323 | flag_NotZ = res; |
6324 | flag_N = res; |
6325 | adr = AREG(7); |
6326 | AREG(7) += 2; |
6327 | WRITE_BYTE_F(adr, res) |
6328 | POST_IO |
6329 | RET(14) |
6330 | } |
6331 | |
6332 | // MOVEB |
6333 | OPCODE(0x1F20) |
6334 | { |
6335 | u32 adr, res; |
6336 | u32 src, dst; |
6337 | |
6338 | adr = AREG((Opcode >> 0) & 7) - 1; |
6339 | AREG((Opcode >> 0) & 7) = adr; |
6340 | PRE_IO |
6341 | READ_BYTE_F(adr, res) |
6342 | flag_C = 0; |
6343 | flag_V = 0; |
6344 | flag_NotZ = res; |
6345 | flag_N = res; |
6346 | adr = AREG(7) - 2; |
6347 | AREG(7) = adr; |
6348 | WRITE_BYTE_F(adr, res) |
6349 | POST_IO |
6350 | RET(14) |
6351 | } |
6352 | |
6353 | // MOVEB |
6354 | OPCODE(0x1028) |
6355 | { |
6356 | u32 adr, res; |
6357 | u32 src, dst; |
6358 | |
6359 | FETCH_SWORD(adr); |
6360 | adr += AREG((Opcode >> 0) & 7); |
6361 | PRE_IO |
6362 | READ_BYTE_F(adr, res) |
6363 | flag_C = 0; |
6364 | flag_V = 0; |
6365 | flag_NotZ = res; |
6366 | flag_N = res; |
6367 | DREGu8((Opcode >> 9) & 7) = res; |
6368 | POST_IO |
6369 | RET(12) |
6370 | } |
6371 | |
6372 | // MOVEB |
6373 | OPCODE(0x10A8) |
6374 | { |
6375 | u32 adr, res; |
6376 | u32 src, dst; |
6377 | |
6378 | FETCH_SWORD(adr); |
6379 | adr += AREG((Opcode >> 0) & 7); |
6380 | PRE_IO |
6381 | READ_BYTE_F(adr, res) |
6382 | flag_C = 0; |
6383 | flag_V = 0; |
6384 | flag_NotZ = res; |
6385 | flag_N = res; |
6386 | adr = AREG((Opcode >> 9) & 7); |
6387 | WRITE_BYTE_F(adr, res) |
6388 | POST_IO |
6389 | RET(16) |
6390 | } |
6391 | |
6392 | // MOVEB |
6393 | OPCODE(0x10E8) |
6394 | { |
6395 | u32 adr, res; |
6396 | u32 src, dst; |
6397 | |
6398 | FETCH_SWORD(adr); |
6399 | adr += AREG((Opcode >> 0) & 7); |
6400 | PRE_IO |
6401 | READ_BYTE_F(adr, res) |
6402 | flag_C = 0; |
6403 | flag_V = 0; |
6404 | flag_NotZ = res; |
6405 | flag_N = res; |
6406 | adr = AREG((Opcode >> 9) & 7); |
6407 | AREG((Opcode >> 9) & 7) += 1; |
6408 | WRITE_BYTE_F(adr, res) |
6409 | POST_IO |
6410 | RET(16) |
6411 | } |
6412 | |
6413 | // MOVEB |
6414 | OPCODE(0x1128) |
6415 | { |
6416 | u32 adr, res; |
6417 | u32 src, dst; |
6418 | |
6419 | FETCH_SWORD(adr); |
6420 | adr += AREG((Opcode >> 0) & 7); |
6421 | PRE_IO |
6422 | READ_BYTE_F(adr, res) |
6423 | flag_C = 0; |
6424 | flag_V = 0; |
6425 | flag_NotZ = res; |
6426 | flag_N = res; |
6427 | adr = AREG((Opcode >> 9) & 7) - 1; |
6428 | AREG((Opcode >> 9) & 7) = adr; |
6429 | WRITE_BYTE_F(adr, res) |
6430 | POST_IO |
6431 | RET(16) |
6432 | } |
6433 | |
6434 | // MOVEB |
6435 | OPCODE(0x1168) |
6436 | { |
6437 | u32 adr, res; |
6438 | u32 src, dst; |
6439 | |
6440 | FETCH_SWORD(adr); |
6441 | adr += AREG((Opcode >> 0) & 7); |
6442 | PRE_IO |
6443 | READ_BYTE_F(adr, res) |
6444 | flag_C = 0; |
6445 | flag_V = 0; |
6446 | flag_NotZ = res; |
6447 | flag_N = res; |
6448 | FETCH_SWORD(adr); |
6449 | adr += AREG((Opcode >> 9) & 7); |
6450 | WRITE_BYTE_F(adr, res) |
6451 | POST_IO |
6452 | RET(20) |
6453 | } |
6454 | |
6455 | // MOVEB |
6456 | OPCODE(0x11A8) |
6457 | { |
6458 | u32 adr, res; |
6459 | u32 src, dst; |
6460 | |
6461 | FETCH_SWORD(adr); |
6462 | adr += AREG((Opcode >> 0) & 7); |
6463 | PRE_IO |
6464 | READ_BYTE_F(adr, res) |
6465 | flag_C = 0; |
6466 | flag_V = 0; |
6467 | flag_NotZ = res; |
6468 | flag_N = res; |
6469 | adr = AREG((Opcode >> 9) & 7); |
6470 | DECODE_EXT_WORD |
6471 | WRITE_BYTE_F(adr, res) |
6472 | POST_IO |
6473 | RET(22) |
6474 | } |
6475 | |
6476 | // MOVEB |
6477 | OPCODE(0x11E8) |
6478 | { |
6479 | u32 adr, res; |
6480 | u32 src, dst; |
6481 | |
6482 | FETCH_SWORD(adr); |
6483 | adr += AREG((Opcode >> 0) & 7); |
6484 | PRE_IO |
6485 | READ_BYTE_F(adr, res) |
6486 | flag_C = 0; |
6487 | flag_V = 0; |
6488 | flag_NotZ = res; |
6489 | flag_N = res; |
6490 | FETCH_SWORD(adr); |
6491 | WRITE_BYTE_F(adr, res) |
6492 | POST_IO |
6493 | RET(20) |
6494 | } |
6495 | |
6496 | // MOVEB |
6497 | OPCODE(0x13E8) |
6498 | { |
6499 | u32 adr, res; |
6500 | u32 src, dst; |
6501 | |
6502 | FETCH_SWORD(adr); |
6503 | adr += AREG((Opcode >> 0) & 7); |
6504 | PRE_IO |
6505 | READ_BYTE_F(adr, res) |
6506 | flag_C = 0; |
6507 | flag_V = 0; |
6508 | flag_NotZ = res; |
6509 | flag_N = res; |
6510 | FETCH_LONG(adr); |
6511 | WRITE_BYTE_F(adr, res) |
6512 | POST_IO |
6513 | RET(24) |
6514 | } |
6515 | |
6516 | // MOVEB |
6517 | OPCODE(0x1EE8) |
6518 | { |
6519 | u32 adr, res; |
6520 | u32 src, dst; |
6521 | |
6522 | FETCH_SWORD(adr); |
6523 | adr += AREG((Opcode >> 0) & 7); |
6524 | PRE_IO |
6525 | READ_BYTE_F(adr, res) |
6526 | flag_C = 0; |
6527 | flag_V = 0; |
6528 | flag_NotZ = res; |
6529 | flag_N = res; |
6530 | adr = AREG(7); |
6531 | AREG(7) += 2; |
6532 | WRITE_BYTE_F(adr, res) |
6533 | POST_IO |
6534 | RET(16) |
6535 | } |
6536 | |
6537 | // MOVEB |
6538 | OPCODE(0x1F28) |
6539 | { |
6540 | u32 adr, res; |
6541 | u32 src, dst; |
6542 | |
6543 | FETCH_SWORD(adr); |
6544 | adr += AREG((Opcode >> 0) & 7); |
6545 | PRE_IO |
6546 | READ_BYTE_F(adr, res) |
6547 | flag_C = 0; |
6548 | flag_V = 0; |
6549 | flag_NotZ = res; |
6550 | flag_N = res; |
6551 | adr = AREG(7) - 2; |
6552 | AREG(7) = adr; |
6553 | WRITE_BYTE_F(adr, res) |
6554 | POST_IO |
6555 | RET(16) |
6556 | } |
6557 | |
6558 | // MOVEB |
6559 | OPCODE(0x1030) |
6560 | { |
6561 | u32 adr, res; |
6562 | u32 src, dst; |
6563 | |
6564 | adr = AREG((Opcode >> 0) & 7); |
6565 | DECODE_EXT_WORD |
6566 | PRE_IO |
6567 | READ_BYTE_F(adr, res) |
6568 | flag_C = 0; |
6569 | flag_V = 0; |
6570 | flag_NotZ = res; |
6571 | flag_N = res; |
6572 | DREGu8((Opcode >> 9) & 7) = res; |
6573 | POST_IO |
6574 | RET(14) |
6575 | } |
6576 | |
6577 | // MOVEB |
6578 | OPCODE(0x10B0) |
6579 | { |
6580 | u32 adr, res; |
6581 | u32 src, dst; |
6582 | |
6583 | adr = AREG((Opcode >> 0) & 7); |
6584 | DECODE_EXT_WORD |
6585 | PRE_IO |
6586 | READ_BYTE_F(adr, res) |
6587 | flag_C = 0; |
6588 | flag_V = 0; |
6589 | flag_NotZ = res; |
6590 | flag_N = res; |
6591 | adr = AREG((Opcode >> 9) & 7); |
6592 | WRITE_BYTE_F(adr, res) |
6593 | POST_IO |
6594 | RET(18) |
6595 | } |
6596 | |
6597 | // MOVEB |
6598 | OPCODE(0x10F0) |
6599 | { |
6600 | u32 adr, res; |
6601 | u32 src, dst; |
6602 | |
6603 | adr = AREG((Opcode >> 0) & 7); |
6604 | DECODE_EXT_WORD |
6605 | PRE_IO |
6606 | READ_BYTE_F(adr, res) |
6607 | flag_C = 0; |
6608 | flag_V = 0; |
6609 | flag_NotZ = res; |
6610 | flag_N = res; |
6611 | adr = AREG((Opcode >> 9) & 7); |
6612 | AREG((Opcode >> 9) & 7) += 1; |
6613 | WRITE_BYTE_F(adr, res) |
6614 | POST_IO |
6615 | RET(18) |
6616 | } |
6617 | |
6618 | // MOVEB |
6619 | OPCODE(0x1130) |
6620 | { |
6621 | u32 adr, res; |
6622 | u32 src, dst; |
6623 | |
6624 | adr = AREG((Opcode >> 0) & 7); |
6625 | DECODE_EXT_WORD |
6626 | PRE_IO |
6627 | READ_BYTE_F(adr, res) |
6628 | flag_C = 0; |
6629 | flag_V = 0; |
6630 | flag_NotZ = res; |
6631 | flag_N = res; |
6632 | adr = AREG((Opcode >> 9) & 7) - 1; |
6633 | AREG((Opcode >> 9) & 7) = adr; |
6634 | WRITE_BYTE_F(adr, res) |
6635 | POST_IO |
6636 | RET(18) |
6637 | } |
6638 | |
6639 | // MOVEB |
6640 | OPCODE(0x1170) |
6641 | { |
6642 | u32 adr, res; |
6643 | u32 src, dst; |
6644 | |
6645 | adr = AREG((Opcode >> 0) & 7); |
6646 | DECODE_EXT_WORD |
6647 | PRE_IO |
6648 | READ_BYTE_F(adr, res) |
6649 | flag_C = 0; |
6650 | flag_V = 0; |
6651 | flag_NotZ = res; |
6652 | flag_N = res; |
6653 | FETCH_SWORD(adr); |
6654 | adr += AREG((Opcode >> 9) & 7); |
6655 | WRITE_BYTE_F(adr, res) |
6656 | POST_IO |
6657 | RET(22) |
6658 | } |
6659 | |
6660 | // MOVEB |
6661 | OPCODE(0x11B0) |
6662 | { |
6663 | u32 adr, res; |
6664 | u32 src, dst; |
6665 | |
6666 | adr = AREG((Opcode >> 0) & 7); |
6667 | DECODE_EXT_WORD |
6668 | PRE_IO |
6669 | READ_BYTE_F(adr, res) |
6670 | flag_C = 0; |
6671 | flag_V = 0; |
6672 | flag_NotZ = res; |
6673 | flag_N = res; |
6674 | adr = AREG((Opcode >> 9) & 7); |
6675 | DECODE_EXT_WORD |
6676 | WRITE_BYTE_F(adr, res) |
6677 | POST_IO |
6678 | RET(24) |
6679 | } |
6680 | |
6681 | // MOVEB |
6682 | OPCODE(0x11F0) |
6683 | { |
6684 | u32 adr, res; |
6685 | u32 src, dst; |
6686 | |
6687 | adr = AREG((Opcode >> 0) & 7); |
6688 | DECODE_EXT_WORD |
6689 | PRE_IO |
6690 | READ_BYTE_F(adr, res) |
6691 | flag_C = 0; |
6692 | flag_V = 0; |
6693 | flag_NotZ = res; |
6694 | flag_N = res; |
6695 | FETCH_SWORD(adr); |
6696 | WRITE_BYTE_F(adr, res) |
6697 | POST_IO |
6698 | RET(22) |
6699 | } |
6700 | |
6701 | // MOVEB |
6702 | OPCODE(0x13F0) |
6703 | { |
6704 | u32 adr, res; |
6705 | u32 src, dst; |
6706 | |
6707 | adr = AREG((Opcode >> 0) & 7); |
6708 | DECODE_EXT_WORD |
6709 | PRE_IO |
6710 | READ_BYTE_F(adr, res) |
6711 | flag_C = 0; |
6712 | flag_V = 0; |
6713 | flag_NotZ = res; |
6714 | flag_N = res; |
6715 | FETCH_LONG(adr); |
6716 | WRITE_BYTE_F(adr, res) |
6717 | POST_IO |
6718 | RET(26) |
6719 | } |
6720 | |
6721 | // MOVEB |
6722 | OPCODE(0x1EF0) |
6723 | { |
6724 | u32 adr, res; |
6725 | u32 src, dst; |
6726 | |
6727 | adr = AREG((Opcode >> 0) & 7); |
6728 | DECODE_EXT_WORD |
6729 | PRE_IO |
6730 | READ_BYTE_F(adr, res) |
6731 | flag_C = 0; |
6732 | flag_V = 0; |
6733 | flag_NotZ = res; |
6734 | flag_N = res; |
6735 | adr = AREG(7); |
6736 | AREG(7) += 2; |
6737 | WRITE_BYTE_F(adr, res) |
6738 | POST_IO |
6739 | RET(18) |
6740 | } |
6741 | |
6742 | // MOVEB |
6743 | OPCODE(0x1F30) |
6744 | { |
6745 | u32 adr, res; |
6746 | u32 src, dst; |
6747 | |
6748 | adr = AREG((Opcode >> 0) & 7); |
6749 | DECODE_EXT_WORD |
6750 | PRE_IO |
6751 | READ_BYTE_F(adr, res) |
6752 | flag_C = 0; |
6753 | flag_V = 0; |
6754 | flag_NotZ = res; |
6755 | flag_N = res; |
6756 | adr = AREG(7) - 2; |
6757 | AREG(7) = adr; |
6758 | WRITE_BYTE_F(adr, res) |
6759 | POST_IO |
6760 | RET(18) |
6761 | } |
6762 | |
6763 | // MOVEB |
6764 | OPCODE(0x1038) |
6765 | { |
6766 | u32 adr, res; |
6767 | u32 src, dst; |
6768 | |
6769 | FETCH_SWORD(adr); |
6770 | PRE_IO |
6771 | READ_BYTE_F(adr, res) |
6772 | flag_C = 0; |
6773 | flag_V = 0; |
6774 | flag_NotZ = res; |
6775 | flag_N = res; |
6776 | DREGu8((Opcode >> 9) & 7) = res; |
6777 | POST_IO |
6778 | RET(12) |
6779 | } |
6780 | |
6781 | // MOVEB |
6782 | OPCODE(0x10B8) |
6783 | { |
6784 | u32 adr, res; |
6785 | u32 src, dst; |
6786 | |
6787 | FETCH_SWORD(adr); |
6788 | PRE_IO |
6789 | READ_BYTE_F(adr, res) |
6790 | flag_C = 0; |
6791 | flag_V = 0; |
6792 | flag_NotZ = res; |
6793 | flag_N = res; |
6794 | adr = AREG((Opcode >> 9) & 7); |
6795 | WRITE_BYTE_F(adr, res) |
6796 | POST_IO |
6797 | RET(16) |
6798 | } |
6799 | |
6800 | // MOVEB |
6801 | OPCODE(0x10F8) |
6802 | { |
6803 | u32 adr, res; |
6804 | u32 src, dst; |
6805 | |
6806 | FETCH_SWORD(adr); |
6807 | PRE_IO |
6808 | READ_BYTE_F(adr, res) |
6809 | flag_C = 0; |
6810 | flag_V = 0; |
6811 | flag_NotZ = res; |
6812 | flag_N = res; |
6813 | adr = AREG((Opcode >> 9) & 7); |
6814 | AREG((Opcode >> 9) & 7) += 1; |
6815 | WRITE_BYTE_F(adr, res) |
6816 | POST_IO |
6817 | RET(16) |
6818 | } |
6819 | |
6820 | // MOVEB |
6821 | OPCODE(0x1138) |
6822 | { |
6823 | u32 adr, res; |
6824 | u32 src, dst; |
6825 | |
6826 | FETCH_SWORD(adr); |
6827 | PRE_IO |
6828 | READ_BYTE_F(adr, res) |
6829 | flag_C = 0; |
6830 | flag_V = 0; |
6831 | flag_NotZ = res; |
6832 | flag_N = res; |
6833 | adr = AREG((Opcode >> 9) & 7) - 1; |
6834 | AREG((Opcode >> 9) & 7) = adr; |
6835 | WRITE_BYTE_F(adr, res) |
6836 | POST_IO |
6837 | RET(16) |
6838 | } |
6839 | |
6840 | // MOVEB |
6841 | OPCODE(0x1178) |
6842 | { |
6843 | u32 adr, res; |
6844 | u32 src, dst; |
6845 | |
6846 | FETCH_SWORD(adr); |
6847 | PRE_IO |
6848 | READ_BYTE_F(adr, res) |
6849 | flag_C = 0; |
6850 | flag_V = 0; |
6851 | flag_NotZ = res; |
6852 | flag_N = res; |
6853 | FETCH_SWORD(adr); |
6854 | adr += AREG((Opcode >> 9) & 7); |
6855 | WRITE_BYTE_F(adr, res) |
6856 | POST_IO |
6857 | RET(20) |
6858 | } |
6859 | |
6860 | // MOVEB |
6861 | OPCODE(0x11B8) |
6862 | { |
6863 | u32 adr, res; |
6864 | u32 src, dst; |
6865 | |
6866 | FETCH_SWORD(adr); |
6867 | PRE_IO |
6868 | READ_BYTE_F(adr, res) |
6869 | flag_C = 0; |
6870 | flag_V = 0; |
6871 | flag_NotZ = res; |
6872 | flag_N = res; |
6873 | adr = AREG((Opcode >> 9) & 7); |
6874 | DECODE_EXT_WORD |
6875 | WRITE_BYTE_F(adr, res) |
6876 | POST_IO |
6877 | RET(22) |
6878 | } |
6879 | |
6880 | // MOVEB |
6881 | OPCODE(0x11F8) |
6882 | { |
6883 | u32 adr, res; |
6884 | u32 src, dst; |
6885 | |
6886 | FETCH_SWORD(adr); |
6887 | PRE_IO |
6888 | READ_BYTE_F(adr, res) |
6889 | flag_C = 0; |
6890 | flag_V = 0; |
6891 | flag_NotZ = res; |
6892 | flag_N = res; |
6893 | FETCH_SWORD(adr); |
6894 | WRITE_BYTE_F(adr, res) |
6895 | POST_IO |
6896 | RET(20) |
6897 | } |
6898 | |
6899 | // MOVEB |
6900 | OPCODE(0x13F8) |
6901 | { |
6902 | u32 adr, res; |
6903 | u32 src, dst; |
6904 | |
6905 | FETCH_SWORD(adr); |
6906 | PRE_IO |
6907 | READ_BYTE_F(adr, res) |
6908 | flag_C = 0; |
6909 | flag_V = 0; |
6910 | flag_NotZ = res; |
6911 | flag_N = res; |
6912 | FETCH_LONG(adr); |
6913 | WRITE_BYTE_F(adr, res) |
6914 | POST_IO |
6915 | RET(24) |
6916 | } |
6917 | |
6918 | // MOVEB |
6919 | OPCODE(0x1EF8) |
6920 | { |
6921 | u32 adr, res; |
6922 | u32 src, dst; |
6923 | |
6924 | FETCH_SWORD(adr); |
6925 | PRE_IO |
6926 | READ_BYTE_F(adr, res) |
6927 | flag_C = 0; |
6928 | flag_V = 0; |
6929 | flag_NotZ = res; |
6930 | flag_N = res; |
6931 | adr = AREG(7); |
6932 | AREG(7) += 2; |
6933 | WRITE_BYTE_F(adr, res) |
6934 | POST_IO |
6935 | RET(16) |
6936 | } |
6937 | |
6938 | // MOVEB |
6939 | OPCODE(0x1F38) |
6940 | { |
6941 | u32 adr, res; |
6942 | u32 src, dst; |
6943 | |
6944 | FETCH_SWORD(adr); |
6945 | PRE_IO |
6946 | READ_BYTE_F(adr, res) |
6947 | flag_C = 0; |
6948 | flag_V = 0; |
6949 | flag_NotZ = res; |
6950 | flag_N = res; |
6951 | adr = AREG(7) - 2; |
6952 | AREG(7) = adr; |
6953 | WRITE_BYTE_F(adr, res) |
6954 | POST_IO |
6955 | RET(16) |
6956 | } |
6957 | |
6958 | // MOVEB |
6959 | OPCODE(0x1039) |
6960 | { |
6961 | u32 adr, res; |
6962 | u32 src, dst; |
6963 | |
6964 | FETCH_LONG(adr); |
6965 | PRE_IO |
6966 | READ_BYTE_F(adr, res) |
6967 | flag_C = 0; |
6968 | flag_V = 0; |
6969 | flag_NotZ = res; |
6970 | flag_N = res; |
6971 | DREGu8((Opcode >> 9) & 7) = res; |
6972 | POST_IO |
6973 | RET(16) |
6974 | } |
6975 | |
6976 | // MOVEB |
6977 | OPCODE(0x10B9) |
6978 | { |
6979 | u32 adr, res; |
6980 | u32 src, dst; |
6981 | |
6982 | FETCH_LONG(adr); |
6983 | PRE_IO |
6984 | READ_BYTE_F(adr, res) |
6985 | flag_C = 0; |
6986 | flag_V = 0; |
6987 | flag_NotZ = res; |
6988 | flag_N = res; |
6989 | adr = AREG((Opcode >> 9) & 7); |
6990 | WRITE_BYTE_F(adr, res) |
6991 | POST_IO |
6992 | RET(20) |
6993 | } |
6994 | |
6995 | // MOVEB |
6996 | OPCODE(0x10F9) |
6997 | { |
6998 | u32 adr, res; |
6999 | u32 src, dst; |
7000 | |
7001 | FETCH_LONG(adr); |
7002 | PRE_IO |
7003 | READ_BYTE_F(adr, res) |
7004 | flag_C = 0; |
7005 | flag_V = 0; |
7006 | flag_NotZ = res; |
7007 | flag_N = res; |
7008 | adr = AREG((Opcode >> 9) & 7); |
7009 | AREG((Opcode >> 9) & 7) += 1; |
7010 | WRITE_BYTE_F(adr, res) |
7011 | POST_IO |
7012 | RET(20) |
7013 | } |
7014 | |
7015 | // MOVEB |
7016 | OPCODE(0x1139) |
7017 | { |
7018 | u32 adr, res; |
7019 | u32 src, dst; |
7020 | |
7021 | FETCH_LONG(adr); |
7022 | PRE_IO |
7023 | READ_BYTE_F(adr, res) |
7024 | flag_C = 0; |
7025 | flag_V = 0; |
7026 | flag_NotZ = res; |
7027 | flag_N = res; |
7028 | adr = AREG((Opcode >> 9) & 7) - 1; |
7029 | AREG((Opcode >> 9) & 7) = adr; |
7030 | WRITE_BYTE_F(adr, res) |
7031 | POST_IO |
7032 | RET(20) |
7033 | } |
7034 | |
7035 | // MOVEB |
7036 | OPCODE(0x1179) |
7037 | { |
7038 | u32 adr, res; |
7039 | u32 src, dst; |
7040 | |
7041 | FETCH_LONG(adr); |
7042 | PRE_IO |
7043 | READ_BYTE_F(adr, res) |
7044 | flag_C = 0; |
7045 | flag_V = 0; |
7046 | flag_NotZ = res; |
7047 | flag_N = res; |
7048 | FETCH_SWORD(adr); |
7049 | adr += AREG((Opcode >> 9) & 7); |
7050 | WRITE_BYTE_F(adr, res) |
7051 | POST_IO |
7052 | RET(24) |
7053 | } |
7054 | |
7055 | // MOVEB |
7056 | OPCODE(0x11B9) |
7057 | { |
7058 | u32 adr, res; |
7059 | u32 src, dst; |
7060 | |
7061 | FETCH_LONG(adr); |
7062 | PRE_IO |
7063 | READ_BYTE_F(adr, res) |
7064 | flag_C = 0; |
7065 | flag_V = 0; |
7066 | flag_NotZ = res; |
7067 | flag_N = res; |
7068 | adr = AREG((Opcode >> 9) & 7); |
7069 | DECODE_EXT_WORD |
7070 | WRITE_BYTE_F(adr, res) |
7071 | POST_IO |
7072 | RET(26) |
7073 | } |
7074 | |
7075 | // MOVEB |
7076 | OPCODE(0x11F9) |
7077 | { |
7078 | u32 adr, res; |
7079 | u32 src, dst; |
7080 | |
7081 | FETCH_LONG(adr); |
7082 | PRE_IO |
7083 | READ_BYTE_F(adr, res) |
7084 | flag_C = 0; |
7085 | flag_V = 0; |
7086 | flag_NotZ = res; |
7087 | flag_N = res; |
7088 | FETCH_SWORD(adr); |
7089 | WRITE_BYTE_F(adr, res) |
7090 | POST_IO |
7091 | RET(24) |
7092 | } |
7093 | |
7094 | // MOVEB |
7095 | OPCODE(0x13F9) |
7096 | { |
7097 | u32 adr, res; |
7098 | u32 src, dst; |
7099 | |
7100 | FETCH_LONG(adr); |
7101 | PRE_IO |
7102 | READ_BYTE_F(adr, res) |
7103 | flag_C = 0; |
7104 | flag_V = 0; |
7105 | flag_NotZ = res; |
7106 | flag_N = res; |
7107 | FETCH_LONG(adr); |
7108 | WRITE_BYTE_F(adr, res) |
7109 | POST_IO |
7110 | RET(28) |
7111 | } |
7112 | |
7113 | // MOVEB |
7114 | OPCODE(0x1EF9) |
7115 | { |
7116 | u32 adr, res; |
7117 | u32 src, dst; |
7118 | |
7119 | FETCH_LONG(adr); |
7120 | PRE_IO |
7121 | READ_BYTE_F(adr, res) |
7122 | flag_C = 0; |
7123 | flag_V = 0; |
7124 | flag_NotZ = res; |
7125 | flag_N = res; |
7126 | adr = AREG(7); |
7127 | AREG(7) += 2; |
7128 | WRITE_BYTE_F(adr, res) |
7129 | POST_IO |
7130 | RET(20) |
7131 | } |
7132 | |
7133 | // MOVEB |
7134 | OPCODE(0x1F39) |
7135 | { |
7136 | u32 adr, res; |
7137 | u32 src, dst; |
7138 | |
7139 | FETCH_LONG(adr); |
7140 | PRE_IO |
7141 | READ_BYTE_F(adr, res) |
7142 | flag_C = 0; |
7143 | flag_V = 0; |
7144 | flag_NotZ = res; |
7145 | flag_N = res; |
7146 | adr = AREG(7) - 2; |
7147 | AREG(7) = adr; |
7148 | WRITE_BYTE_F(adr, res) |
7149 | POST_IO |
7150 | RET(20) |
7151 | } |
7152 | |
7153 | // MOVEB |
7154 | OPCODE(0x103A) |
7155 | { |
7156 | u32 adr, res; |
7157 | u32 src, dst; |
7158 | |
be26eb23 |
7159 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7160 | PC++; |
7161 | PRE_IO |
7162 | READ_BYTE_F(adr, res) |
7163 | flag_C = 0; |
7164 | flag_V = 0; |
7165 | flag_NotZ = res; |
7166 | flag_N = res; |
7167 | DREGu8((Opcode >> 9) & 7) = res; |
7168 | POST_IO |
7169 | RET(12) |
7170 | } |
7171 | |
7172 | // MOVEB |
7173 | OPCODE(0x10BA) |
7174 | { |
7175 | u32 adr, res; |
7176 | u32 src, dst; |
7177 | |
be26eb23 |
7178 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7179 | PC++; |
7180 | PRE_IO |
7181 | READ_BYTE_F(adr, res) |
7182 | flag_C = 0; |
7183 | flag_V = 0; |
7184 | flag_NotZ = res; |
7185 | flag_N = res; |
7186 | adr = AREG((Opcode >> 9) & 7); |
7187 | WRITE_BYTE_F(adr, res) |
7188 | POST_IO |
7189 | RET(16) |
7190 | } |
7191 | |
7192 | // MOVEB |
7193 | OPCODE(0x10FA) |
7194 | { |
7195 | u32 adr, res; |
7196 | u32 src, dst; |
7197 | |
be26eb23 |
7198 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7199 | PC++; |
7200 | PRE_IO |
7201 | READ_BYTE_F(adr, res) |
7202 | flag_C = 0; |
7203 | flag_V = 0; |
7204 | flag_NotZ = res; |
7205 | flag_N = res; |
7206 | adr = AREG((Opcode >> 9) & 7); |
7207 | AREG((Opcode >> 9) & 7) += 1; |
7208 | WRITE_BYTE_F(adr, res) |
7209 | POST_IO |
7210 | RET(16) |
7211 | } |
7212 | |
7213 | // MOVEB |
7214 | OPCODE(0x113A) |
7215 | { |
7216 | u32 adr, res; |
7217 | u32 src, dst; |
7218 | |
be26eb23 |
7219 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7220 | PC++; |
7221 | PRE_IO |
7222 | READ_BYTE_F(adr, res) |
7223 | flag_C = 0; |
7224 | flag_V = 0; |
7225 | flag_NotZ = res; |
7226 | flag_N = res; |
7227 | adr = AREG((Opcode >> 9) & 7) - 1; |
7228 | AREG((Opcode >> 9) & 7) = adr; |
7229 | WRITE_BYTE_F(adr, res) |
7230 | POST_IO |
7231 | RET(16) |
7232 | } |
7233 | |
7234 | // MOVEB |
7235 | OPCODE(0x117A) |
7236 | { |
7237 | u32 adr, res; |
7238 | u32 src, dst; |
7239 | |
be26eb23 |
7240 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7241 | PC++; |
7242 | PRE_IO |
7243 | READ_BYTE_F(adr, res) |
7244 | flag_C = 0; |
7245 | flag_V = 0; |
7246 | flag_NotZ = res; |
7247 | flag_N = res; |
7248 | FETCH_SWORD(adr); |
7249 | adr += AREG((Opcode >> 9) & 7); |
7250 | WRITE_BYTE_F(adr, res) |
7251 | POST_IO |
7252 | RET(20) |
7253 | } |
7254 | |
7255 | // MOVEB |
7256 | OPCODE(0x11BA) |
7257 | { |
7258 | u32 adr, res; |
7259 | u32 src, dst; |
7260 | |
be26eb23 |
7261 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7262 | PC++; |
7263 | PRE_IO |
7264 | READ_BYTE_F(adr, res) |
7265 | flag_C = 0; |
7266 | flag_V = 0; |
7267 | flag_NotZ = res; |
7268 | flag_N = res; |
7269 | adr = AREG((Opcode >> 9) & 7); |
7270 | DECODE_EXT_WORD |
7271 | WRITE_BYTE_F(adr, res) |
7272 | POST_IO |
7273 | RET(22) |
7274 | } |
7275 | |
7276 | // MOVEB |
7277 | OPCODE(0x11FA) |
7278 | { |
7279 | u32 adr, res; |
7280 | u32 src, dst; |
7281 | |
be26eb23 |
7282 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7283 | PC++; |
7284 | PRE_IO |
7285 | READ_BYTE_F(adr, res) |
7286 | flag_C = 0; |
7287 | flag_V = 0; |
7288 | flag_NotZ = res; |
7289 | flag_N = res; |
7290 | FETCH_SWORD(adr); |
7291 | WRITE_BYTE_F(adr, res) |
7292 | POST_IO |
7293 | RET(20) |
7294 | } |
7295 | |
7296 | // MOVEB |
7297 | OPCODE(0x13FA) |
7298 | { |
7299 | u32 adr, res; |
7300 | u32 src, dst; |
7301 | |
be26eb23 |
7302 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7303 | PC++; |
7304 | PRE_IO |
7305 | READ_BYTE_F(adr, res) |
7306 | flag_C = 0; |
7307 | flag_V = 0; |
7308 | flag_NotZ = res; |
7309 | flag_N = res; |
7310 | FETCH_LONG(adr); |
7311 | WRITE_BYTE_F(adr, res) |
7312 | POST_IO |
7313 | RET(24) |
7314 | } |
7315 | |
7316 | // MOVEB |
7317 | OPCODE(0x1EFA) |
7318 | { |
7319 | u32 adr, res; |
7320 | u32 src, dst; |
7321 | |
be26eb23 |
7322 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7323 | PC++; |
7324 | PRE_IO |
7325 | READ_BYTE_F(adr, res) |
7326 | flag_C = 0; |
7327 | flag_V = 0; |
7328 | flag_NotZ = res; |
7329 | flag_N = res; |
7330 | adr = AREG(7); |
7331 | AREG(7) += 2; |
7332 | WRITE_BYTE_F(adr, res) |
7333 | POST_IO |
7334 | RET(16) |
7335 | } |
7336 | |
7337 | // MOVEB |
7338 | OPCODE(0x1F3A) |
7339 | { |
7340 | u32 adr, res; |
7341 | u32 src, dst; |
7342 | |
be26eb23 |
7343 | adr = GET_SWORD + GET_PC; |
70357ce5 |
7344 | PC++; |
7345 | PRE_IO |
7346 | READ_BYTE_F(adr, res) |
7347 | flag_C = 0; |
7348 | flag_V = 0; |
7349 | flag_NotZ = res; |
7350 | flag_N = res; |
7351 | adr = AREG(7) - 2; |
7352 | AREG(7) = adr; |
7353 | WRITE_BYTE_F(adr, res) |
7354 | POST_IO |
7355 | RET(16) |
7356 | } |
7357 | |
7358 | // MOVEB |
7359 | OPCODE(0x103B) |
7360 | { |
7361 | u32 adr, res; |
7362 | u32 src, dst; |
7363 | |
be26eb23 |
7364 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7365 | DECODE_EXT_WORD |
7366 | PRE_IO |
7367 | READ_BYTE_F(adr, res) |
7368 | flag_C = 0; |
7369 | flag_V = 0; |
7370 | flag_NotZ = res; |
7371 | flag_N = res; |
7372 | DREGu8((Opcode >> 9) & 7) = res; |
7373 | POST_IO |
7374 | RET(14) |
7375 | } |
7376 | |
7377 | // MOVEB |
7378 | OPCODE(0x10BB) |
7379 | { |
7380 | u32 adr, res; |
7381 | u32 src, dst; |
7382 | |
be26eb23 |
7383 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7384 | DECODE_EXT_WORD |
7385 | PRE_IO |
7386 | READ_BYTE_F(adr, res) |
7387 | flag_C = 0; |
7388 | flag_V = 0; |
7389 | flag_NotZ = res; |
7390 | flag_N = res; |
7391 | adr = AREG((Opcode >> 9) & 7); |
7392 | WRITE_BYTE_F(adr, res) |
7393 | POST_IO |
7394 | RET(18) |
7395 | } |
7396 | |
7397 | // MOVEB |
7398 | OPCODE(0x10FB) |
7399 | { |
7400 | u32 adr, res; |
7401 | u32 src, dst; |
7402 | |
be26eb23 |
7403 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7404 | DECODE_EXT_WORD |
7405 | PRE_IO |
7406 | READ_BYTE_F(adr, res) |
7407 | flag_C = 0; |
7408 | flag_V = 0; |
7409 | flag_NotZ = res; |
7410 | flag_N = res; |
7411 | adr = AREG((Opcode >> 9) & 7); |
7412 | AREG((Opcode >> 9) & 7) += 1; |
7413 | WRITE_BYTE_F(adr, res) |
7414 | POST_IO |
7415 | RET(18) |
7416 | } |
7417 | |
7418 | // MOVEB |
7419 | OPCODE(0x113B) |
7420 | { |
7421 | u32 adr, res; |
7422 | u32 src, dst; |
7423 | |
be26eb23 |
7424 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7425 | DECODE_EXT_WORD |
7426 | PRE_IO |
7427 | READ_BYTE_F(adr, res) |
7428 | flag_C = 0; |
7429 | flag_V = 0; |
7430 | flag_NotZ = res; |
7431 | flag_N = res; |
7432 | adr = AREG((Opcode >> 9) & 7) - 1; |
7433 | AREG((Opcode >> 9) & 7) = adr; |
7434 | WRITE_BYTE_F(adr, res) |
7435 | POST_IO |
7436 | RET(18) |
7437 | } |
7438 | |
7439 | // MOVEB |
7440 | OPCODE(0x117B) |
7441 | { |
7442 | u32 adr, res; |
7443 | u32 src, dst; |
7444 | |
be26eb23 |
7445 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7446 | DECODE_EXT_WORD |
7447 | PRE_IO |
7448 | READ_BYTE_F(adr, res) |
7449 | flag_C = 0; |
7450 | flag_V = 0; |
7451 | flag_NotZ = res; |
7452 | flag_N = res; |
7453 | FETCH_SWORD(adr); |
7454 | adr += AREG((Opcode >> 9) & 7); |
7455 | WRITE_BYTE_F(adr, res) |
7456 | POST_IO |
7457 | RET(22) |
7458 | } |
7459 | |
7460 | // MOVEB |
7461 | OPCODE(0x11BB) |
7462 | { |
7463 | u32 adr, res; |
7464 | u32 src, dst; |
7465 | |
be26eb23 |
7466 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7467 | DECODE_EXT_WORD |
7468 | PRE_IO |
7469 | READ_BYTE_F(adr, res) |
7470 | flag_C = 0; |
7471 | flag_V = 0; |
7472 | flag_NotZ = res; |
7473 | flag_N = res; |
7474 | adr = AREG((Opcode >> 9) & 7); |
7475 | DECODE_EXT_WORD |
7476 | WRITE_BYTE_F(adr, res) |
7477 | POST_IO |
7478 | RET(24) |
7479 | } |
7480 | |
7481 | // MOVEB |
7482 | OPCODE(0x11FB) |
7483 | { |
7484 | u32 adr, res; |
7485 | u32 src, dst; |
7486 | |
be26eb23 |
7487 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7488 | DECODE_EXT_WORD |
7489 | PRE_IO |
7490 | READ_BYTE_F(adr, res) |
7491 | flag_C = 0; |
7492 | flag_V = 0; |
7493 | flag_NotZ = res; |
7494 | flag_N = res; |
7495 | FETCH_SWORD(adr); |
7496 | WRITE_BYTE_F(adr, res) |
7497 | POST_IO |
7498 | RET(22) |
7499 | } |
7500 | |
7501 | // MOVEB |
7502 | OPCODE(0x13FB) |
7503 | { |
7504 | u32 adr, res; |
7505 | u32 src, dst; |
7506 | |
be26eb23 |
7507 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7508 | DECODE_EXT_WORD |
7509 | PRE_IO |
7510 | READ_BYTE_F(adr, res) |
7511 | flag_C = 0; |
7512 | flag_V = 0; |
7513 | flag_NotZ = res; |
7514 | flag_N = res; |
7515 | FETCH_LONG(adr); |
7516 | WRITE_BYTE_F(adr, res) |
7517 | POST_IO |
7518 | RET(26) |
7519 | } |
7520 | |
7521 | // MOVEB |
7522 | OPCODE(0x1EFB) |
7523 | { |
7524 | u32 adr, res; |
7525 | u32 src, dst; |
7526 | |
be26eb23 |
7527 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7528 | DECODE_EXT_WORD |
7529 | PRE_IO |
7530 | READ_BYTE_F(adr, res) |
7531 | flag_C = 0; |
7532 | flag_V = 0; |
7533 | flag_NotZ = res; |
7534 | flag_N = res; |
7535 | adr = AREG(7); |
7536 | AREG(7) += 2; |
7537 | WRITE_BYTE_F(adr, res) |
7538 | POST_IO |
7539 | RET(18) |
7540 | } |
7541 | |
7542 | // MOVEB |
7543 | OPCODE(0x1F3B) |
7544 | { |
7545 | u32 adr, res; |
7546 | u32 src, dst; |
7547 | |
be26eb23 |
7548 | adr = (uptr)(PC) - BasePC; |
70357ce5 |
7549 | DECODE_EXT_WORD |
7550 | PRE_IO |
7551 | READ_BYTE_F(adr, res) |
7552 | flag_C = 0; |
7553 | flag_V = 0; |
7554 | flag_NotZ = res; |
7555 | flag_N = res; |
7556 | adr = AREG(7) - 2; |
7557 | AREG(7) = adr; |
7558 | WRITE_BYTE_F(adr, res) |
7559 | POST_IO |
7560 | RET(18) |
7561 | } |
7562 | |
7563 | // MOVEB |
7564 | OPCODE(0x103C) |
7565 | { |
7566 | u32 adr, res; |
7567 | u32 src, dst; |
7568 | |
7569 | FETCH_BYTE(res); |
7570 | flag_C = 0; |
7571 | flag_V = 0; |
7572 | flag_NotZ = res; |
7573 | flag_N = res; |
7574 | DREGu8((Opcode >> 9) & 7) = res; |
7575 | RET(8) |
7576 | } |
7577 | |
7578 | // MOVEB |
7579 | OPCODE(0x10BC) |
7580 | { |
7581 | u32 adr, res; |
7582 | u32 src, dst; |
7583 | |
7584 | FETCH_BYTE(res); |
7585 | flag_C = 0; |
7586 | flag_V = 0; |
7587 | flag_NotZ = res; |
7588 | flag_N = res; |
7589 | adr = AREG((Opcode >> 9) & 7); |
7590 | PRE_IO |
7591 | WRITE_BYTE_F(adr, res) |
7592 | POST_IO |
7593 | RET(12) |
7594 | } |
7595 | |
7596 | // MOVEB |
7597 | OPCODE(0x10FC) |
7598 | { |
7599 | u32 adr, res; |
7600 | u32 src, dst; |
7601 | |
7602 | FETCH_BYTE(res); |
7603 | flag_C = 0; |
7604 | flag_V = 0; |
7605 | flag_NotZ = res; |
7606 | flag_N = res; |
7607 | adr = AREG((Opcode >> 9) & 7); |
7608 | AREG((Opcode >> 9) & 7) += 1; |
7609 | PRE_IO |
7610 | WRITE_BYTE_F(adr, res) |
7611 | POST_IO |
7612 | RET(12) |
7613 | } |
7614 | |
7615 | // MOVEB |
7616 | OPCODE(0x113C) |
7617 | { |
7618 | u32 adr, res; |
7619 | u32 src, dst; |
7620 | |
7621 | FETCH_BYTE(res); |
7622 | flag_C = 0; |
7623 | flag_V = 0; |
7624 | flag_NotZ = res; |
7625 | flag_N = res; |
7626 | adr = AREG((Opcode >> 9) & 7) - 1; |
7627 | AREG((Opcode >> 9) & 7) = adr; |
7628 | PRE_IO |
7629 | WRITE_BYTE_F(adr, res) |
7630 | POST_IO |
7631 | RET(12) |
7632 | } |
7633 | |
7634 | // MOVEB |
7635 | OPCODE(0x117C) |
7636 | { |
7637 | u32 adr, res; |
7638 | u32 src, dst; |
7639 | |
7640 | FETCH_BYTE(res); |
7641 | flag_C = 0; |
7642 | flag_V = 0; |
7643 | flag_NotZ = res; |
7644 | flag_N = res; |
7645 | FETCH_SWORD(adr); |
7646 | adr += AREG((Opcode >> 9) & 7); |
7647 | PRE_IO |
7648 | WRITE_BYTE_F(adr, res) |
7649 | POST_IO |
7650 | RET(16) |
7651 | } |
7652 | |
7653 | // MOVEB |
7654 | OPCODE(0x11BC) |
7655 | { |
7656 | u32 adr, res; |
7657 | u32 src, dst; |
7658 | |
7659 | FETCH_BYTE(res); |
7660 | flag_C = 0; |
7661 | flag_V = 0; |
7662 | flag_NotZ = res; |
7663 | flag_N = res; |
7664 | adr = AREG((Opcode >> 9) & 7); |
7665 | DECODE_EXT_WORD |
7666 | PRE_IO |
7667 | WRITE_BYTE_F(adr, res) |
7668 | POST_IO |
7669 | RET(18) |
7670 | } |
7671 | |
7672 | // MOVEB |
7673 | OPCODE(0x11FC) |
7674 | { |
7675 | u32 adr, res; |
7676 | u32 src, dst; |
7677 | |
7678 | FETCH_BYTE(res); |
7679 | flag_C = 0; |
7680 | flag_V = 0; |
7681 | flag_NotZ = res; |
7682 | flag_N = res; |
7683 | FETCH_SWORD(adr); |
7684 | PRE_IO |
7685 | WRITE_BYTE_F(adr, res) |
7686 | POST_IO |
7687 | RET(16) |
7688 | } |
7689 | |
7690 | // MOVEB |
7691 | OPCODE(0x13FC) |
7692 | { |
7693 | u32 adr, res; |
7694 | u32 src, dst; |
7695 | |
7696 | FETCH_BYTE(res); |
7697 | flag_C = 0; |
7698 | flag_V = 0; |
7699 | flag_NotZ = res; |
7700 | flag_N = res; |
7701 | FETCH_LONG(adr); |
7702 | PRE_IO |
7703 | WRITE_BYTE_F(adr, res) |
7704 | POST_IO |
7705 | RET(20) |
7706 | } |
7707 | |
7708 | // MOVEB |
7709 | OPCODE(0x1EFC) |
7710 | { |
7711 | u32 adr, res; |
7712 | u32 src, dst; |
7713 | |
7714 | FETCH_BYTE(res); |
7715 | flag_C = 0; |
7716 | flag_V = 0; |
7717 | flag_NotZ = res; |
7718 | flag_N = res; |
7719 | adr = AREG(7); |
7720 | AREG(7) += 2; |
7721 | PRE_IO |
7722 | WRITE_BYTE_F(adr, res) |
7723 | POST_IO |
7724 | RET(12) |
7725 | } |
7726 | |
7727 | // MOVEB |
7728 | OPCODE(0x1F3C) |
7729 | { |
7730 | u32 adr, res; |
7731 | u32 src, dst; |
7732 | |
7733 | FETCH_BYTE(res); |
7734 | flag_C = 0; |
7735 | flag_V = 0; |
7736 | flag_NotZ = res; |
7737 | flag_N = res; |
7738 | adr = AREG(7) - 2; |
7739 | AREG(7) = adr; |
7740 | PRE_IO |
7741 | WRITE_BYTE_F(adr, res) |
7742 | POST_IO |
7743 | RET(12) |
7744 | } |
7745 | |
7746 | // MOVEB |
7747 | OPCODE(0x101F) |
7748 | { |
7749 | u32 adr, res; |
7750 | u32 src, dst; |
7751 | |
7752 | adr = AREG(7); |
7753 | AREG(7) += 2; |
7754 | PRE_IO |
7755 | READ_BYTE_F(adr, res) |
7756 | flag_C = 0; |
7757 | flag_V = 0; |
7758 | flag_NotZ = res; |
7759 | flag_N = res; |
7760 | DREGu8((Opcode >> 9) & 7) = res; |
7761 | POST_IO |
7762 | RET(8) |
7763 | } |
7764 | |
7765 | // MOVEB |
7766 | OPCODE(0x109F) |
7767 | { |
7768 | u32 adr, res; |
7769 | u32 src, dst; |
7770 | |
7771 | adr = AREG(7); |
7772 | AREG(7) += 2; |
7773 | PRE_IO |
7774 | READ_BYTE_F(adr, res) |
7775 | flag_C = 0; |
7776 | flag_V = 0; |
7777 | flag_NotZ = res; |
7778 | flag_N = res; |
7779 | adr = AREG((Opcode >> 9) & 7); |
7780 | WRITE_BYTE_F(adr, res) |
7781 | POST_IO |
7782 | RET(12) |
7783 | } |
7784 | |
7785 | // MOVEB |
7786 | OPCODE(0x10DF) |
7787 | { |
7788 | u32 adr, res; |
7789 | u32 src, dst; |
7790 | |
7791 | adr = AREG(7); |
7792 | AREG(7) += 2; |
7793 | PRE_IO |
7794 | READ_BYTE_F(adr, res) |
7795 | flag_C = 0; |
7796 | flag_V = 0; |
7797 | flag_NotZ = res; |
7798 | flag_N = res; |
7799 | adr = AREG((Opcode >> 9) & 7); |
7800 | AREG((Opcode >> 9) & 7) += 1; |
7801 | WRITE_BYTE_F(adr, res) |
7802 | POST_IO |
7803 | RET(12) |
7804 | } |
7805 | |
7806 | // MOVEB |
7807 | OPCODE(0x111F) |
7808 | { |
7809 | u32 adr, res; |
7810 | u32 src, dst; |
7811 | |
7812 | adr = AREG(7); |
7813 | AREG(7) += 2; |
7814 | PRE_IO |
7815 | READ_BYTE_F(adr, res) |
7816 | flag_C = 0; |
7817 | flag_V = 0; |
7818 | flag_NotZ = res; |
7819 | flag_N = res; |
7820 | adr = AREG((Opcode >> 9) & 7) - 1; |
7821 | AREG((Opcode >> 9) & 7) = adr; |
7822 | WRITE_BYTE_F(adr, res) |
7823 | POST_IO |
7824 | RET(12) |
7825 | } |
7826 | |
7827 | // MOVEB |
7828 | OPCODE(0x115F) |
7829 | { |
7830 | u32 adr, res; |
7831 | u32 src, dst; |
7832 | |
7833 | adr = AREG(7); |
7834 | AREG(7) += 2; |
7835 | PRE_IO |
7836 | READ_BYTE_F(adr, res) |
7837 | flag_C = 0; |
7838 | flag_V = 0; |
7839 | flag_NotZ = res; |
7840 | flag_N = res; |
7841 | FETCH_SWORD(adr); |
7842 | adr += AREG((Opcode >> 9) & 7); |
7843 | WRITE_BYTE_F(adr, res) |
7844 | POST_IO |
7845 | RET(16) |
7846 | } |
7847 | |
7848 | // MOVEB |
7849 | OPCODE(0x119F) |
7850 | { |
7851 | u32 adr, res; |
7852 | u32 src, dst; |
7853 | |
7854 | adr = AREG(7); |
7855 | AREG(7) += 2; |
7856 | PRE_IO |
7857 | READ_BYTE_F(adr, res) |
7858 | flag_C = 0; |
7859 | flag_V = 0; |
7860 | flag_NotZ = res; |
7861 | flag_N = res; |
7862 | adr = AREG((Opcode >> 9) & 7); |
7863 | DECODE_EXT_WORD |
7864 | WRITE_BYTE_F(adr, res) |
7865 | POST_IO |
7866 | RET(18) |
7867 | } |
7868 | |
7869 | // MOVEB |
7870 | OPCODE(0x11DF) |
7871 | { |
7872 | u32 adr, res; |
7873 | u32 src, dst; |
7874 | |
7875 | adr = AREG(7); |
7876 | AREG(7) += 2; |
7877 | PRE_IO |
7878 | READ_BYTE_F(adr, res) |
7879 | flag_C = 0; |
7880 | flag_V = 0; |
7881 | flag_NotZ = res; |
7882 | flag_N = res; |
7883 | FETCH_SWORD(adr); |
7884 | WRITE_BYTE_F(adr, res) |
7885 | POST_IO |
7886 | RET(16) |
7887 | } |
7888 | |
7889 | // MOVEB |
7890 | OPCODE(0x13DF) |
7891 | { |
7892 | u32 adr, res; |
7893 | u32 src, dst; |
7894 | |
7895 | adr = AREG(7); |
7896 | AREG(7) += 2; |
7897 | PRE_IO |
7898 | READ_BYTE_F(adr, res) |
7899 | flag_C = 0; |
7900 | flag_V = 0; |
7901 | flag_NotZ = res; |
7902 | flag_N = res; |
7903 | FETCH_LONG(adr); |
7904 | WRITE_BYTE_F(adr, res) |
7905 | POST_IO |
7906 | RET(20) |
7907 | } |
7908 | |
7909 | // MOVEB |
7910 | OPCODE(0x1EDF) |
7911 | { |
7912 | u32 adr, res; |
7913 | u32 src, dst; |
7914 | |
7915 | adr = AREG(7); |
7916 | AREG(7) += 2; |
7917 | PRE_IO |
7918 | READ_BYTE_F(adr, res) |
7919 | flag_C = 0; |
7920 | flag_V = 0; |
7921 | flag_NotZ = res; |
7922 | flag_N = res; |
7923 | adr = AREG(7); |
7924 | AREG(7) += 2; |
7925 | WRITE_BYTE_F(adr, res) |
7926 | POST_IO |
7927 | RET(12) |
7928 | } |
7929 | |
7930 | // MOVEB |
7931 | OPCODE(0x1F1F) |
7932 | { |
7933 | u32 adr, res; |
7934 | u32 src, dst; |
7935 | |
7936 | adr = AREG(7); |
7937 | AREG(7) += 2; |
7938 | PRE_IO |
7939 | READ_BYTE_F(adr, res) |
7940 | flag_C = 0; |
7941 | flag_V = 0; |
7942 | flag_NotZ = res; |
7943 | flag_N = res; |
7944 | adr = AREG(7) - 2; |
7945 | AREG(7) = adr; |
7946 | WRITE_BYTE_F(adr, res) |
7947 | POST_IO |
7948 | RET(12) |
7949 | } |
7950 | |
7951 | // MOVEB |
7952 | OPCODE(0x1027) |
7953 | { |
7954 | u32 adr, res; |
7955 | u32 src, dst; |
7956 | |
7957 | adr = AREG(7) - 2; |
7958 | AREG(7) = adr; |
7959 | PRE_IO |
7960 | READ_BYTE_F(adr, res) |
7961 | flag_C = 0; |
7962 | flag_V = 0; |
7963 | flag_NotZ = res; |
7964 | flag_N = res; |
7965 | DREGu8((Opcode >> 9) & 7) = res; |
7966 | POST_IO |
7967 | RET(10) |
7968 | } |
7969 | |
7970 | // MOVEB |
7971 | OPCODE(0x10A7) |
7972 | { |
7973 | u32 adr, res; |
7974 | u32 src, dst; |
7975 | |
7976 | adr = AREG(7) - 2; |
7977 | AREG(7) = adr; |
7978 | PRE_IO |
7979 | READ_BYTE_F(adr, res) |
7980 | flag_C = 0; |
7981 | flag_V = 0; |
7982 | flag_NotZ = res; |
7983 | flag_N = res; |
7984 | adr = AREG((Opcode >> 9) & 7); |
7985 | WRITE_BYTE_F(adr, res) |
7986 | POST_IO |
7987 | RET(14) |
7988 | } |
7989 | |
7990 | // MOVEB |
7991 | OPCODE(0x10E7) |
7992 | { |
7993 | u32 adr, res; |
7994 | u32 src, dst; |
7995 | |
7996 | adr = AREG(7) - 2; |
7997 | AREG(7) = adr; |
7998 | PRE_IO |
7999 | READ_BYTE_F(adr, res) |
8000 | flag_C = 0; |
8001 | flag_V = 0; |
8002 | flag_NotZ = res; |
8003 | flag_N = res; |
8004 | adr = AREG((Opcode >> 9) & 7); |
8005 | AREG((Opcode >> 9) & 7) += 1; |
8006 | WRITE_BYTE_F(adr, res) |
8007 | POST_IO |
8008 | RET(14) |
8009 | } |
8010 | |
8011 | // MOVEB |
8012 | OPCODE(0x1127) |
8013 | { |
8014 | u32 adr, res; |
8015 | u32 src, dst; |
8016 | |
8017 | adr = AREG(7) - 2; |
8018 | AREG(7) = adr; |
8019 | PRE_IO |
8020 | READ_BYTE_F(adr, res) |
8021 | flag_C = 0; |
8022 | flag_V = 0; |
8023 | flag_NotZ = res; |
8024 | flag_N = res; |
8025 | adr = AREG((Opcode >> 9) & 7) - 1; |
8026 | AREG((Opcode >> 9) & 7) = adr; |
8027 | WRITE_BYTE_F(adr, res) |
8028 | POST_IO |
8029 | RET(14) |
8030 | } |
8031 | |
8032 | // MOVEB |
8033 | OPCODE(0x1167) |
8034 | { |
8035 | u32 adr, res; |
8036 | u32 src, dst; |
8037 | |
8038 | adr = AREG(7) - 2; |
8039 | AREG(7) = adr; |
8040 | PRE_IO |
8041 | READ_BYTE_F(adr, res) |
8042 | flag_C = 0; |
8043 | flag_V = 0; |
8044 | flag_NotZ = res; |
8045 | flag_N = res; |
8046 | FETCH_SWORD(adr); |
8047 | adr += AREG((Opcode >> 9) & 7); |
8048 | WRITE_BYTE_F(adr, res) |
8049 | POST_IO |
8050 | RET(18) |
8051 | } |
8052 | |
8053 | // MOVEB |
8054 | OPCODE(0x11A7) |
8055 | { |
8056 | u32 adr, res; |
8057 | u32 src, dst; |
8058 | |
8059 | adr = AREG(7) - 2; |
8060 | AREG(7) = adr; |
8061 | PRE_IO |
8062 | READ_BYTE_F(adr, res) |
8063 | flag_C = 0; |
8064 | flag_V = 0; |
8065 | flag_NotZ = res; |
8066 | flag_N = res; |
8067 | adr = AREG((Opcode >> 9) & 7); |
8068 | DECODE_EXT_WORD |
8069 | WRITE_BYTE_F(adr, res) |
8070 | POST_IO |
8071 | RET(20) |
8072 | } |
8073 | |
8074 | // MOVEB |
8075 | OPCODE(0x11E7) |
8076 | { |
8077 | u32 adr, res; |
8078 | u32 src, dst; |
8079 | |
8080 | adr = AREG(7) - 2; |
8081 | AREG(7) = adr; |
8082 | PRE_IO |
8083 | READ_BYTE_F(adr, res) |
8084 | flag_C = 0; |
8085 | flag_V = 0; |
8086 | flag_NotZ = res; |
8087 | flag_N = res; |
8088 | FETCH_SWORD(adr); |
8089 | WRITE_BYTE_F(adr, res) |
8090 | POST_IO |
8091 | RET(18) |
8092 | } |
8093 | |
8094 | // MOVEB |
8095 | OPCODE(0x13E7) |
8096 | { |
8097 | u32 adr, res; |
8098 | u32 src, dst; |
8099 | |
8100 | adr = AREG(7) - 2; |
8101 | AREG(7) = adr; |
8102 | PRE_IO |
8103 | READ_BYTE_F(adr, res) |
8104 | flag_C = 0; |
8105 | flag_V = 0; |
8106 | flag_NotZ = res; |
8107 | flag_N = res; |
8108 | FETCH_LONG(adr); |
8109 | WRITE_BYTE_F(adr, res) |
8110 | POST_IO |
8111 | RET(22) |
8112 | } |
8113 | |
8114 | // MOVEB |
8115 | OPCODE(0x1EE7) |
8116 | { |
8117 | u32 adr, res; |
8118 | u32 src, dst; |
8119 | |
8120 | adr = AREG(7) - 2; |
8121 | AREG(7) = adr; |
8122 | PRE_IO |
8123 | READ_BYTE_F(adr, res) |
8124 | flag_C = 0; |
8125 | flag_V = 0; |
8126 | flag_NotZ = res; |
8127 | flag_N = res; |
8128 | adr = AREG(7); |
8129 | AREG(7) += 2; |
8130 | WRITE_BYTE_F(adr, res) |
8131 | POST_IO |
8132 | RET(14) |
8133 | } |
8134 | |
8135 | // MOVEB |
8136 | OPCODE(0x1F27) |
8137 | { |
8138 | u32 adr, res; |
8139 | u32 src, dst; |
8140 | |
8141 | adr = AREG(7) - 2; |
8142 | AREG(7) = adr; |
8143 | PRE_IO |
8144 | READ_BYTE_F(adr, res) |
8145 | flag_C = 0; |
8146 | flag_V = 0; |
8147 | flag_NotZ = res; |
8148 | flag_N = res; |
8149 | adr = AREG(7) - 2; |
8150 | AREG(7) = adr; |
8151 | WRITE_BYTE_F(adr, res) |
8152 | POST_IO |
8153 | RET(14) |
8154 | } |
8155 | |
8156 | // MOVEL |
8157 | OPCODE(0x2000) |
8158 | { |
8159 | u32 adr, res; |
8160 | u32 src, dst; |
8161 | |
8162 | res = DREGu32((Opcode >> 0) & 7); |
8163 | flag_C = 0; |
8164 | flag_V = 0; |
8165 | flag_NotZ = res; |
8166 | flag_N = res >> 24; |
8167 | DREGu32((Opcode >> 9) & 7) = res; |
8168 | RET(4) |
8169 | } |
8170 | |
8171 | // MOVEL |
8172 | OPCODE(0x2080) |
8173 | { |
8174 | u32 adr, res; |
8175 | u32 src, dst; |
8176 | |
8177 | res = DREGu32((Opcode >> 0) & 7); |
8178 | flag_C = 0; |
8179 | flag_V = 0; |
8180 | flag_NotZ = res; |
8181 | flag_N = res >> 24; |
8182 | adr = AREG((Opcode >> 9) & 7); |
8183 | PRE_IO |
8184 | WRITE_LONG_F(adr, res) |
8185 | POST_IO |
8186 | RET(12) |
8187 | } |
8188 | |
8189 | // MOVEL |
8190 | OPCODE(0x20C0) |
8191 | { |
8192 | u32 adr, res; |
8193 | u32 src, dst; |
8194 | |
8195 | res = DREGu32((Opcode >> 0) & 7); |
8196 | flag_C = 0; |
8197 | flag_V = 0; |
8198 | flag_NotZ = res; |
8199 | flag_N = res >> 24; |
8200 | adr = AREG((Opcode >> 9) & 7); |
8201 | AREG((Opcode >> 9) & 7) += 4; |
8202 | PRE_IO |
8203 | WRITE_LONG_F(adr, res) |
8204 | POST_IO |
8205 | RET(12) |
8206 | } |
8207 | |
8208 | // MOVEL |
8209 | OPCODE(0x2100) |
8210 | { |
8211 | u32 adr, res; |
8212 | u32 src, dst; |
8213 | |
8214 | res = DREGu32((Opcode >> 0) & 7); |
8215 | flag_C = 0; |
8216 | flag_V = 0; |
8217 | flag_NotZ = res; |
8218 | flag_N = res >> 24; |
8219 | adr = AREG((Opcode >> 9) & 7) - 4; |
8220 | AREG((Opcode >> 9) & 7) = adr; |
8221 | PRE_IO |
80db4442 |
8222 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8223 | POST_IO |
8224 | RET(12) |
8225 | } |
8226 | |
8227 | // MOVEL |
8228 | OPCODE(0x2140) |
8229 | { |
8230 | u32 adr, res; |
8231 | u32 src, dst; |
8232 | |
8233 | res = DREGu32((Opcode >> 0) & 7); |
8234 | flag_C = 0; |
8235 | flag_V = 0; |
8236 | flag_NotZ = res; |
8237 | flag_N = res >> 24; |
8238 | FETCH_SWORD(adr); |
8239 | adr += AREG((Opcode >> 9) & 7); |
8240 | PRE_IO |
8241 | WRITE_LONG_F(adr, res) |
8242 | POST_IO |
8243 | RET(16) |
8244 | } |
8245 | |
8246 | // MOVEL |
8247 | OPCODE(0x2180) |
8248 | { |
8249 | u32 adr, res; |
8250 | u32 src, dst; |
8251 | |
8252 | res = DREGu32((Opcode >> 0) & 7); |
8253 | flag_C = 0; |
8254 | flag_V = 0; |
8255 | flag_NotZ = res; |
8256 | flag_N = res >> 24; |
8257 | adr = AREG((Opcode >> 9) & 7); |
8258 | DECODE_EXT_WORD |
8259 | PRE_IO |
8260 | WRITE_LONG_F(adr, res) |
8261 | POST_IO |
8262 | RET(18) |
8263 | } |
8264 | |
8265 | // MOVEL |
8266 | OPCODE(0x21C0) |
8267 | { |
8268 | u32 adr, res; |
8269 | u32 src, dst; |
8270 | |
8271 | res = DREGu32((Opcode >> 0) & 7); |
8272 | flag_C = 0; |
8273 | flag_V = 0; |
8274 | flag_NotZ = res; |
8275 | flag_N = res >> 24; |
8276 | FETCH_SWORD(adr); |
8277 | PRE_IO |
8278 | WRITE_LONG_F(adr, res) |
8279 | POST_IO |
8280 | RET(16) |
8281 | } |
8282 | |
8283 | // MOVEL |
8284 | OPCODE(0x23C0) |
8285 | { |
8286 | u32 adr, res; |
8287 | u32 src, dst; |
8288 | |
8289 | res = DREGu32((Opcode >> 0) & 7); |
8290 | flag_C = 0; |
8291 | flag_V = 0; |
8292 | flag_NotZ = res; |
8293 | flag_N = res >> 24; |
8294 | FETCH_LONG(adr); |
8295 | PRE_IO |
8296 | WRITE_LONG_F(adr, res) |
8297 | POST_IO |
8298 | RET(20) |
8299 | } |
8300 | |
8301 | // MOVEL |
8302 | OPCODE(0x2EC0) |
8303 | { |
8304 | u32 adr, res; |
8305 | u32 src, dst; |
8306 | |
8307 | res = DREGu32((Opcode >> 0) & 7); |
8308 | flag_C = 0; |
8309 | flag_V = 0; |
8310 | flag_NotZ = res; |
8311 | flag_N = res >> 24; |
8312 | adr = AREG(7); |
8313 | AREG(7) += 4; |
8314 | PRE_IO |
8315 | WRITE_LONG_F(adr, res) |
8316 | POST_IO |
8317 | RET(12) |
8318 | } |
8319 | |
8320 | // MOVEL |
8321 | OPCODE(0x2F00) |
8322 | { |
8323 | u32 adr, res; |
8324 | u32 src, dst; |
8325 | |
8326 | res = DREGu32((Opcode >> 0) & 7); |
8327 | flag_C = 0; |
8328 | flag_V = 0; |
8329 | flag_NotZ = res; |
8330 | flag_N = res >> 24; |
8331 | adr = AREG(7) - 4; |
8332 | AREG(7) = adr; |
8333 | PRE_IO |
03e4f2a3 |
8334 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8335 | POST_IO |
8336 | RET(12) |
8337 | } |
8338 | |
8339 | // MOVEL |
8340 | OPCODE(0x2008) |
8341 | { |
8342 | u32 adr, res; |
8343 | u32 src, dst; |
8344 | |
8345 | res = AREGu32((Opcode >> 0) & 7); |
8346 | flag_C = 0; |
8347 | flag_V = 0; |
8348 | flag_NotZ = res; |
8349 | flag_N = res >> 24; |
8350 | DREGu32((Opcode >> 9) & 7) = res; |
8351 | RET(4) |
8352 | } |
8353 | |
8354 | // MOVEL |
8355 | OPCODE(0x2088) |
8356 | { |
8357 | u32 adr, res; |
8358 | u32 src, dst; |
8359 | |
8360 | res = AREGu32((Opcode >> 0) & 7); |
8361 | flag_C = 0; |
8362 | flag_V = 0; |
8363 | flag_NotZ = res; |
8364 | flag_N = res >> 24; |
8365 | adr = AREG((Opcode >> 9) & 7); |
8366 | PRE_IO |
8367 | WRITE_LONG_F(adr, res) |
8368 | POST_IO |
8369 | RET(12) |
8370 | } |
8371 | |
8372 | // MOVEL |
8373 | OPCODE(0x20C8) |
8374 | { |
8375 | u32 adr, res; |
8376 | u32 src, dst; |
8377 | |
8378 | res = AREGu32((Opcode >> 0) & 7); |
8379 | flag_C = 0; |
8380 | flag_V = 0; |
8381 | flag_NotZ = res; |
8382 | flag_N = res >> 24; |
8383 | adr = AREG((Opcode >> 9) & 7); |
8384 | AREG((Opcode >> 9) & 7) += 4; |
8385 | PRE_IO |
8386 | WRITE_LONG_F(adr, res) |
8387 | POST_IO |
8388 | RET(12) |
8389 | } |
8390 | |
8391 | // MOVEL |
8392 | OPCODE(0x2108) |
8393 | { |
8394 | u32 adr, res; |
8395 | u32 src, dst; |
8396 | |
8397 | res = AREGu32((Opcode >> 0) & 7); |
8398 | flag_C = 0; |
8399 | flag_V = 0; |
8400 | flag_NotZ = res; |
8401 | flag_N = res >> 24; |
8402 | adr = AREG((Opcode >> 9) & 7) - 4; |
8403 | AREG((Opcode >> 9) & 7) = adr; |
8404 | PRE_IO |
80db4442 |
8405 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8406 | POST_IO |
8407 | RET(12) |
8408 | } |
8409 | |
8410 | // MOVEL |
8411 | OPCODE(0x2148) |
8412 | { |
8413 | u32 adr, res; |
8414 | u32 src, dst; |
8415 | |
8416 | res = AREGu32((Opcode >> 0) & 7); |
8417 | flag_C = 0; |
8418 | flag_V = 0; |
8419 | flag_NotZ = res; |
8420 | flag_N = res >> 24; |
8421 | FETCH_SWORD(adr); |
8422 | adr += AREG((Opcode >> 9) & 7); |
8423 | PRE_IO |
8424 | WRITE_LONG_F(adr, res) |
8425 | POST_IO |
8426 | RET(16) |
8427 | } |
8428 | |
8429 | // MOVEL |
8430 | OPCODE(0x2188) |
8431 | { |
8432 | u32 adr, res; |
8433 | u32 src, dst; |
8434 | |
8435 | res = AREGu32((Opcode >> 0) & 7); |
8436 | flag_C = 0; |
8437 | flag_V = 0; |
8438 | flag_NotZ = res; |
8439 | flag_N = res >> 24; |
8440 | adr = AREG((Opcode >> 9) & 7); |
8441 | DECODE_EXT_WORD |
8442 | PRE_IO |
8443 | WRITE_LONG_F(adr, res) |
8444 | POST_IO |
8445 | RET(18) |
8446 | } |
8447 | |
8448 | // MOVEL |
8449 | OPCODE(0x21C8) |
8450 | { |
8451 | u32 adr, res; |
8452 | u32 src, dst; |
8453 | |
8454 | res = AREGu32((Opcode >> 0) & 7); |
8455 | flag_C = 0; |
8456 | flag_V = 0; |
8457 | flag_NotZ = res; |
8458 | flag_N = res >> 24; |
8459 | FETCH_SWORD(adr); |
8460 | PRE_IO |
8461 | WRITE_LONG_F(adr, res) |
8462 | POST_IO |
8463 | RET(16) |
8464 | } |
8465 | |
8466 | // MOVEL |
8467 | OPCODE(0x23C8) |
8468 | { |
8469 | u32 adr, res; |
8470 | u32 src, dst; |
8471 | |
8472 | res = AREGu32((Opcode >> 0) & 7); |
8473 | flag_C = 0; |
8474 | flag_V = 0; |
8475 | flag_NotZ = res; |
8476 | flag_N = res >> 24; |
8477 | FETCH_LONG(adr); |
8478 | PRE_IO |
8479 | WRITE_LONG_F(adr, res) |
8480 | POST_IO |
8481 | RET(20) |
8482 | } |
8483 | |
8484 | // MOVEL |
8485 | OPCODE(0x2EC8) |
8486 | { |
8487 | u32 adr, res; |
8488 | u32 src, dst; |
8489 | |
8490 | res = AREGu32((Opcode >> 0) & 7); |
8491 | flag_C = 0; |
8492 | flag_V = 0; |
8493 | flag_NotZ = res; |
8494 | flag_N = res >> 24; |
8495 | adr = AREG(7); |
8496 | AREG(7) += 4; |
8497 | PRE_IO |
8498 | WRITE_LONG_F(adr, res) |
8499 | POST_IO |
8500 | RET(12) |
8501 | } |
8502 | |
8503 | // MOVEL |
8504 | OPCODE(0x2F08) |
8505 | { |
8506 | u32 adr, res; |
8507 | u32 src, dst; |
8508 | |
8509 | res = AREGu32((Opcode >> 0) & 7); |
8510 | flag_C = 0; |
8511 | flag_V = 0; |
8512 | flag_NotZ = res; |
8513 | flag_N = res >> 24; |
8514 | adr = AREG(7) - 4; |
8515 | AREG(7) = adr; |
8516 | PRE_IO |
03e4f2a3 |
8517 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8518 | POST_IO |
8519 | RET(12) |
8520 | } |
8521 | |
8522 | // MOVEL |
8523 | OPCODE(0x2010) |
8524 | { |
8525 | u32 adr, res; |
8526 | u32 src, dst; |
8527 | |
8528 | adr = AREG((Opcode >> 0) & 7); |
8529 | PRE_IO |
8530 | READ_LONG_F(adr, res) |
8531 | flag_C = 0; |
8532 | flag_V = 0; |
8533 | flag_NotZ = res; |
8534 | flag_N = res >> 24; |
8535 | DREGu32((Opcode >> 9) & 7) = res; |
8536 | POST_IO |
8537 | RET(12) |
8538 | } |
8539 | |
8540 | // MOVEL |
8541 | OPCODE(0x2090) |
8542 | { |
8543 | u32 adr, res; |
8544 | u32 src, dst; |
8545 | |
8546 | adr = AREG((Opcode >> 0) & 7); |
8547 | PRE_IO |
8548 | READ_LONG_F(adr, res) |
8549 | flag_C = 0; |
8550 | flag_V = 0; |
8551 | flag_NotZ = res; |
8552 | flag_N = res >> 24; |
8553 | adr = AREG((Opcode >> 9) & 7); |
8554 | WRITE_LONG_F(adr, res) |
8555 | POST_IO |
8556 | RET(20) |
8557 | } |
8558 | |
8559 | // MOVEL |
8560 | OPCODE(0x20D0) |
8561 | { |
8562 | u32 adr, res; |
8563 | u32 src, dst; |
8564 | |
8565 | adr = AREG((Opcode >> 0) & 7); |
8566 | PRE_IO |
8567 | READ_LONG_F(adr, res) |
8568 | flag_C = 0; |
8569 | flag_V = 0; |
8570 | flag_NotZ = res; |
8571 | flag_N = res >> 24; |
8572 | adr = AREG((Opcode >> 9) & 7); |
8573 | AREG((Opcode >> 9) & 7) += 4; |
8574 | WRITE_LONG_F(adr, res) |
8575 | POST_IO |
8576 | RET(20) |
8577 | } |
8578 | |
8579 | // MOVEL |
8580 | OPCODE(0x2110) |
8581 | { |
8582 | u32 adr, res; |
8583 | u32 src, dst; |
8584 | |
8585 | adr = AREG((Opcode >> 0) & 7); |
8586 | PRE_IO |
8587 | READ_LONG_F(adr, res) |
8588 | flag_C = 0; |
8589 | flag_V = 0; |
8590 | flag_NotZ = res; |
8591 | flag_N = res >> 24; |
8592 | adr = AREG((Opcode >> 9) & 7) - 4; |
8593 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8594 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8595 | POST_IO |
8596 | RET(20) |
8597 | } |
8598 | |
8599 | // MOVEL |
8600 | OPCODE(0x2150) |
8601 | { |
8602 | u32 adr, res; |
8603 | u32 src, dst; |
8604 | |
8605 | adr = AREG((Opcode >> 0) & 7); |
8606 | PRE_IO |
8607 | READ_LONG_F(adr, res) |
8608 | flag_C = 0; |
8609 | flag_V = 0; |
8610 | flag_NotZ = res; |
8611 | flag_N = res >> 24; |
8612 | FETCH_SWORD(adr); |
8613 | adr += AREG((Opcode >> 9) & 7); |
8614 | WRITE_LONG_F(adr, res) |
8615 | POST_IO |
8616 | RET(24) |
8617 | } |
8618 | |
8619 | // MOVEL |
8620 | OPCODE(0x2190) |
8621 | { |
8622 | u32 adr, res; |
8623 | u32 src, dst; |
8624 | |
8625 | adr = AREG((Opcode >> 0) & 7); |
8626 | PRE_IO |
8627 | READ_LONG_F(adr, res) |
8628 | flag_C = 0; |
8629 | flag_V = 0; |
8630 | flag_NotZ = res; |
8631 | flag_N = res >> 24; |
8632 | adr = AREG((Opcode >> 9) & 7); |
8633 | DECODE_EXT_WORD |
8634 | WRITE_LONG_F(adr, res) |
8635 | POST_IO |
8636 | RET(26) |
8637 | } |
8638 | |
8639 | // MOVEL |
8640 | OPCODE(0x21D0) |
8641 | { |
8642 | u32 adr, res; |
8643 | u32 src, dst; |
8644 | |
8645 | adr = AREG((Opcode >> 0) & 7); |
8646 | PRE_IO |
8647 | READ_LONG_F(adr, res) |
8648 | flag_C = 0; |
8649 | flag_V = 0; |
8650 | flag_NotZ = res; |
8651 | flag_N = res >> 24; |
8652 | FETCH_SWORD(adr); |
8653 | WRITE_LONG_F(adr, res) |
8654 | POST_IO |
8655 | RET(24) |
8656 | } |
8657 | |
8658 | // MOVEL |
8659 | OPCODE(0x23D0) |
8660 | { |
8661 | u32 adr, res; |
8662 | u32 src, dst; |
8663 | |
8664 | adr = AREG((Opcode >> 0) & 7); |
8665 | PRE_IO |
8666 | READ_LONG_F(adr, res) |
8667 | flag_C = 0; |
8668 | flag_V = 0; |
8669 | flag_NotZ = res; |
8670 | flag_N = res >> 24; |
8671 | FETCH_LONG(adr); |
8672 | WRITE_LONG_F(adr, res) |
8673 | POST_IO |
8674 | RET(28) |
8675 | } |
8676 | |
8677 | // MOVEL |
8678 | OPCODE(0x2ED0) |
8679 | { |
8680 | u32 adr, res; |
8681 | u32 src, dst; |
8682 | |
8683 | adr = AREG((Opcode >> 0) & 7); |
8684 | PRE_IO |
8685 | READ_LONG_F(adr, res) |
8686 | flag_C = 0; |
8687 | flag_V = 0; |
8688 | flag_NotZ = res; |
8689 | flag_N = res >> 24; |
8690 | adr = AREG(7); |
8691 | AREG(7) += 4; |
8692 | WRITE_LONG_F(adr, res) |
8693 | POST_IO |
8694 | RET(20) |
8695 | } |
8696 | |
8697 | // MOVEL |
8698 | OPCODE(0x2F10) |
8699 | { |
8700 | u32 adr, res; |
8701 | u32 src, dst; |
8702 | |
8703 | adr = AREG((Opcode >> 0) & 7); |
8704 | PRE_IO |
8705 | READ_LONG_F(adr, res) |
8706 | flag_C = 0; |
8707 | flag_V = 0; |
8708 | flag_NotZ = res; |
8709 | flag_N = res >> 24; |
8710 | adr = AREG(7) - 4; |
8711 | AREG(7) = adr; |
03e4f2a3 |
8712 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8713 | POST_IO |
8714 | RET(20) |
8715 | } |
8716 | |
8717 | // MOVEL |
8718 | OPCODE(0x2018) |
8719 | { |
8720 | u32 adr, res; |
8721 | u32 src, dst; |
8722 | |
8723 | adr = AREG((Opcode >> 0) & 7); |
8724 | AREG((Opcode >> 0) & 7) += 4; |
8725 | PRE_IO |
8726 | READ_LONG_F(adr, res) |
8727 | flag_C = 0; |
8728 | flag_V = 0; |
8729 | flag_NotZ = res; |
8730 | flag_N = res >> 24; |
8731 | DREGu32((Opcode >> 9) & 7) = res; |
8732 | POST_IO |
8733 | RET(12) |
8734 | } |
8735 | |
8736 | // MOVEL |
8737 | OPCODE(0x2098) |
8738 | { |
8739 | u32 adr, res; |
8740 | u32 src, dst; |
8741 | |
8742 | adr = AREG((Opcode >> 0) & 7); |
8743 | AREG((Opcode >> 0) & 7) += 4; |
8744 | PRE_IO |
8745 | READ_LONG_F(adr, res) |
8746 | flag_C = 0; |
8747 | flag_V = 0; |
8748 | flag_NotZ = res; |
8749 | flag_N = res >> 24; |
8750 | adr = AREG((Opcode >> 9) & 7); |
8751 | WRITE_LONG_F(adr, res) |
8752 | POST_IO |
8753 | RET(20) |
8754 | } |
8755 | |
8756 | // MOVEL |
8757 | OPCODE(0x20D8) |
8758 | { |
8759 | u32 adr, res; |
8760 | u32 src, dst; |
8761 | |
8762 | adr = AREG((Opcode >> 0) & 7); |
8763 | AREG((Opcode >> 0) & 7) += 4; |
8764 | PRE_IO |
8765 | READ_LONG_F(adr, res) |
8766 | flag_C = 0; |
8767 | flag_V = 0; |
8768 | flag_NotZ = res; |
8769 | flag_N = res >> 24; |
8770 | adr = AREG((Opcode >> 9) & 7); |
8771 | AREG((Opcode >> 9) & 7) += 4; |
8772 | WRITE_LONG_F(adr, res) |
8773 | POST_IO |
8774 | RET(20) |
8775 | } |
8776 | |
8777 | // MOVEL |
8778 | OPCODE(0x2118) |
8779 | { |
8780 | u32 adr, res; |
8781 | u32 src, dst; |
8782 | |
8783 | adr = AREG((Opcode >> 0) & 7); |
8784 | AREG((Opcode >> 0) & 7) += 4; |
8785 | PRE_IO |
8786 | READ_LONG_F(adr, res) |
8787 | flag_C = 0; |
8788 | flag_V = 0; |
8789 | flag_NotZ = res; |
8790 | flag_N = res >> 24; |
8791 | adr = AREG((Opcode >> 9) & 7) - 4; |
8792 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8793 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8794 | POST_IO |
8795 | RET(20) |
8796 | } |
8797 | |
8798 | // MOVEL |
8799 | OPCODE(0x2158) |
8800 | { |
8801 | u32 adr, res; |
8802 | u32 src, dst; |
8803 | |
8804 | adr = AREG((Opcode >> 0) & 7); |
8805 | AREG((Opcode >> 0) & 7) += 4; |
8806 | PRE_IO |
8807 | READ_LONG_F(adr, res) |
8808 | flag_C = 0; |
8809 | flag_V = 0; |
8810 | flag_NotZ = res; |
8811 | flag_N = res >> 24; |
8812 | FETCH_SWORD(adr); |
8813 | adr += AREG((Opcode >> 9) & 7); |
8814 | WRITE_LONG_F(adr, res) |
8815 | POST_IO |
8816 | RET(24) |
8817 | } |
8818 | |
8819 | // MOVEL |
8820 | OPCODE(0x2198) |
8821 | { |
8822 | u32 adr, res; |
8823 | u32 src, dst; |
8824 | |
8825 | adr = AREG((Opcode >> 0) & 7); |
8826 | AREG((Opcode >> 0) & 7) += 4; |
8827 | PRE_IO |
8828 | READ_LONG_F(adr, res) |
8829 | flag_C = 0; |
8830 | flag_V = 0; |
8831 | flag_NotZ = res; |
8832 | flag_N = res >> 24; |
8833 | adr = AREG((Opcode >> 9) & 7); |
8834 | DECODE_EXT_WORD |
8835 | WRITE_LONG_F(adr, res) |
8836 | POST_IO |
8837 | RET(26) |
8838 | } |
8839 | |
8840 | // MOVEL |
8841 | OPCODE(0x21D8) |
8842 | { |
8843 | u32 adr, res; |
8844 | u32 src, dst; |
8845 | |
8846 | adr = AREG((Opcode >> 0) & 7); |
8847 | AREG((Opcode >> 0) & 7) += 4; |
8848 | PRE_IO |
8849 | READ_LONG_F(adr, res) |
8850 | flag_C = 0; |
8851 | flag_V = 0; |
8852 | flag_NotZ = res; |
8853 | flag_N = res >> 24; |
8854 | FETCH_SWORD(adr); |
8855 | WRITE_LONG_F(adr, res) |
8856 | POST_IO |
8857 | RET(24) |
8858 | } |
8859 | |
8860 | // MOVEL |
8861 | OPCODE(0x23D8) |
8862 | { |
8863 | u32 adr, res; |
8864 | u32 src, dst; |
8865 | |
8866 | adr = AREG((Opcode >> 0) & 7); |
8867 | AREG((Opcode >> 0) & 7) += 4; |
8868 | PRE_IO |
8869 | READ_LONG_F(adr, res) |
8870 | flag_C = 0; |
8871 | flag_V = 0; |
8872 | flag_NotZ = res; |
8873 | flag_N = res >> 24; |
8874 | FETCH_LONG(adr); |
8875 | WRITE_LONG_F(adr, res) |
8876 | POST_IO |
8877 | RET(28) |
8878 | } |
8879 | |
8880 | // MOVEL |
8881 | OPCODE(0x2ED8) |
8882 | { |
8883 | u32 adr, res; |
8884 | u32 src, dst; |
8885 | |
8886 | adr = AREG((Opcode >> 0) & 7); |
8887 | AREG((Opcode >> 0) & 7) += 4; |
8888 | PRE_IO |
8889 | READ_LONG_F(adr, res) |
8890 | flag_C = 0; |
8891 | flag_V = 0; |
8892 | flag_NotZ = res; |
8893 | flag_N = res >> 24; |
8894 | adr = AREG(7); |
8895 | AREG(7) += 4; |
8896 | WRITE_LONG_F(adr, res) |
8897 | POST_IO |
8898 | RET(20) |
8899 | } |
8900 | |
8901 | // MOVEL |
8902 | OPCODE(0x2F18) |
8903 | { |
8904 | u32 adr, res; |
8905 | u32 src, dst; |
8906 | |
8907 | adr = AREG((Opcode >> 0) & 7); |
8908 | AREG((Opcode >> 0) & 7) += 4; |
8909 | PRE_IO |
8910 | READ_LONG_F(adr, res) |
8911 | flag_C = 0; |
8912 | flag_V = 0; |
8913 | flag_NotZ = res; |
8914 | flag_N = res >> 24; |
8915 | adr = AREG(7) - 4; |
8916 | AREG(7) = adr; |
03e4f2a3 |
8917 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8918 | POST_IO |
8919 | RET(20) |
8920 | } |
8921 | |
8922 | // MOVEL |
8923 | OPCODE(0x2020) |
8924 | { |
8925 | u32 adr, res; |
8926 | u32 src, dst; |
8927 | |
8928 | adr = AREG((Opcode >> 0) & 7) - 4; |
8929 | AREG((Opcode >> 0) & 7) = adr; |
8930 | PRE_IO |
8931 | READ_LONG_F(adr, res) |
8932 | flag_C = 0; |
8933 | flag_V = 0; |
8934 | flag_NotZ = res; |
8935 | flag_N = res >> 24; |
8936 | DREGu32((Opcode >> 9) & 7) = res; |
8937 | POST_IO |
8938 | RET(14) |
8939 | } |
8940 | |
8941 | // MOVEL |
8942 | OPCODE(0x20A0) |
8943 | { |
8944 | u32 adr, res; |
8945 | u32 src, dst; |
8946 | |
8947 | adr = AREG((Opcode >> 0) & 7) - 4; |
8948 | AREG((Opcode >> 0) & 7) = adr; |
8949 | PRE_IO |
8950 | READ_LONG_F(adr, res) |
8951 | flag_C = 0; |
8952 | flag_V = 0; |
8953 | flag_NotZ = res; |
8954 | flag_N = res >> 24; |
8955 | adr = AREG((Opcode >> 9) & 7); |
8956 | WRITE_LONG_F(adr, res) |
8957 | POST_IO |
8958 | RET(22) |
8959 | } |
8960 | |
8961 | // MOVEL |
8962 | OPCODE(0x20E0) |
8963 | { |
8964 | u32 adr, res; |
8965 | u32 src, dst; |
8966 | |
8967 | adr = AREG((Opcode >> 0) & 7) - 4; |
8968 | AREG((Opcode >> 0) & 7) = adr; |
8969 | PRE_IO |
8970 | READ_LONG_F(adr, res) |
8971 | flag_C = 0; |
8972 | flag_V = 0; |
8973 | flag_NotZ = res; |
8974 | flag_N = res >> 24; |
8975 | adr = AREG((Opcode >> 9) & 7); |
8976 | AREG((Opcode >> 9) & 7) += 4; |
8977 | WRITE_LONG_F(adr, res) |
8978 | POST_IO |
8979 | RET(22) |
8980 | } |
8981 | |
8982 | // MOVEL |
8983 | OPCODE(0x2120) |
8984 | { |
8985 | u32 adr, res; |
8986 | u32 src, dst; |
8987 | |
8988 | adr = AREG((Opcode >> 0) & 7) - 4; |
8989 | AREG((Opcode >> 0) & 7) = adr; |
8990 | PRE_IO |
8991 | READ_LONG_F(adr, res) |
8992 | flag_C = 0; |
8993 | flag_V = 0; |
8994 | flag_NotZ = res; |
8995 | flag_N = res >> 24; |
8996 | adr = AREG((Opcode >> 9) & 7) - 4; |
8997 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
8998 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
8999 | POST_IO |
9000 | RET(22) |
9001 | } |
9002 | |
9003 | // MOVEL |
9004 | OPCODE(0x2160) |
9005 | { |
9006 | u32 adr, res; |
9007 | u32 src, dst; |
9008 | |
9009 | adr = AREG((Opcode >> 0) & 7) - 4; |
9010 | AREG((Opcode >> 0) & 7) = adr; |
9011 | PRE_IO |
9012 | READ_LONG_F(adr, res) |
9013 | flag_C = 0; |
9014 | flag_V = 0; |
9015 | flag_NotZ = res; |
9016 | flag_N = res >> 24; |
9017 | FETCH_SWORD(adr); |
9018 | adr += AREG((Opcode >> 9) & 7); |
9019 | WRITE_LONG_F(adr, res) |
9020 | POST_IO |
9021 | RET(26) |
9022 | } |
9023 | |
9024 | // MOVEL |
9025 | OPCODE(0x21A0) |
9026 | { |
9027 | u32 adr, res; |
9028 | u32 src, dst; |
9029 | |
9030 | adr = AREG((Opcode >> 0) & 7) - 4; |
9031 | AREG((Opcode >> 0) & 7) = adr; |
9032 | PRE_IO |
9033 | READ_LONG_F(adr, res) |
9034 | flag_C = 0; |
9035 | flag_V = 0; |
9036 | flag_NotZ = res; |
9037 | flag_N = res >> 24; |
9038 | adr = AREG((Opcode >> 9) & 7); |
9039 | DECODE_EXT_WORD |
9040 | WRITE_LONG_F(adr, res) |
9041 | POST_IO |
9042 | RET(28) |
9043 | } |
9044 | |
9045 | // MOVEL |
9046 | OPCODE(0x21E0) |
9047 | { |
9048 | u32 adr, res; |
9049 | u32 src, dst; |
9050 | |
9051 | adr = AREG((Opcode >> 0) & 7) - 4; |
9052 | AREG((Opcode >> 0) & 7) = adr; |
9053 | PRE_IO |
9054 | READ_LONG_F(adr, res) |
9055 | flag_C = 0; |
9056 | flag_V = 0; |
9057 | flag_NotZ = res; |
9058 | flag_N = res >> 24; |
9059 | FETCH_SWORD(adr); |
9060 | WRITE_LONG_F(adr, res) |
9061 | POST_IO |
9062 | RET(26) |
9063 | } |
9064 | |
9065 | // MOVEL |
9066 | OPCODE(0x23E0) |
9067 | { |
9068 | u32 adr, res; |
9069 | u32 src, dst; |
9070 | |
9071 | adr = AREG((Opcode >> 0) & 7) - 4; |
9072 | AREG((Opcode >> 0) & 7) = adr; |
9073 | PRE_IO |
9074 | READ_LONG_F(adr, res) |
9075 | flag_C = 0; |
9076 | flag_V = 0; |
9077 | flag_NotZ = res; |
9078 | flag_N = res >> 24; |
9079 | FETCH_LONG(adr); |
9080 | WRITE_LONG_F(adr, res) |
9081 | POST_IO |
9082 | RET(30) |
9083 | } |
9084 | |
9085 | // MOVEL |
9086 | OPCODE(0x2EE0) |
9087 | { |
9088 | u32 adr, res; |
9089 | u32 src, dst; |
9090 | |
9091 | adr = AREG((Opcode >> 0) & 7) - 4; |
9092 | AREG((Opcode >> 0) & 7) = adr; |
9093 | PRE_IO |
9094 | READ_LONG_F(adr, res) |
9095 | flag_C = 0; |
9096 | flag_V = 0; |
9097 | flag_NotZ = res; |
9098 | flag_N = res >> 24; |
9099 | adr = AREG(7); |
9100 | AREG(7) += 4; |
9101 | WRITE_LONG_F(adr, res) |
9102 | POST_IO |
9103 | RET(22) |
9104 | } |
9105 | |
9106 | // MOVEL |
9107 | OPCODE(0x2F20) |
9108 | { |
9109 | u32 adr, res; |
9110 | u32 src, dst; |
9111 | |
9112 | adr = AREG((Opcode >> 0) & 7) - 4; |
9113 | AREG((Opcode >> 0) & 7) = adr; |
9114 | PRE_IO |
9115 | READ_LONG_F(adr, res) |
9116 | flag_C = 0; |
9117 | flag_V = 0; |
9118 | flag_NotZ = res; |
9119 | flag_N = res >> 24; |
9120 | adr = AREG(7) - 4; |
9121 | AREG(7) = adr; |
03e4f2a3 |
9122 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9123 | POST_IO |
9124 | RET(22) |
9125 | } |
9126 | |
9127 | // MOVEL |
9128 | OPCODE(0x2028) |
9129 | { |
9130 | u32 adr, res; |
9131 | u32 src, dst; |
9132 | |
9133 | FETCH_SWORD(adr); |
9134 | adr += AREG((Opcode >> 0) & 7); |
9135 | PRE_IO |
9136 | READ_LONG_F(adr, res) |
9137 | flag_C = 0; |
9138 | flag_V = 0; |
9139 | flag_NotZ = res; |
9140 | flag_N = res >> 24; |
9141 | DREGu32((Opcode >> 9) & 7) = res; |
9142 | POST_IO |
9143 | RET(16) |
9144 | } |
9145 | |
9146 | // MOVEL |
9147 | OPCODE(0x20A8) |
9148 | { |
9149 | u32 adr, res; |
9150 | u32 src, dst; |
9151 | |
9152 | FETCH_SWORD(adr); |
9153 | adr += AREG((Opcode >> 0) & 7); |
9154 | PRE_IO |
9155 | READ_LONG_F(adr, res) |
9156 | flag_C = 0; |
9157 | flag_V = 0; |
9158 | flag_NotZ = res; |
9159 | flag_N = res >> 24; |
9160 | adr = AREG((Opcode >> 9) & 7); |
9161 | WRITE_LONG_F(adr, res) |
9162 | POST_IO |
9163 | RET(24) |
9164 | } |
9165 | |
9166 | // MOVEL |
9167 | OPCODE(0x20E8) |
9168 | { |
9169 | u32 adr, res; |
9170 | u32 src, dst; |
9171 | |
9172 | FETCH_SWORD(adr); |
9173 | adr += AREG((Opcode >> 0) & 7); |
9174 | PRE_IO |
9175 | READ_LONG_F(adr, res) |
9176 | flag_C = 0; |
9177 | flag_V = 0; |
9178 | flag_NotZ = res; |
9179 | flag_N = res >> 24; |
9180 | adr = AREG((Opcode >> 9) & 7); |
9181 | AREG((Opcode >> 9) & 7) += 4; |
9182 | WRITE_LONG_F(adr, res) |
9183 | POST_IO |
9184 | RET(24) |
9185 | } |
9186 | |
9187 | // MOVEL |
9188 | OPCODE(0x2128) |
9189 | { |
9190 | u32 adr, res; |
9191 | u32 src, dst; |
9192 | |
9193 | FETCH_SWORD(adr); |
9194 | adr += AREG((Opcode >> 0) & 7); |
9195 | PRE_IO |
9196 | READ_LONG_F(adr, res) |
9197 | flag_C = 0; |
9198 | flag_V = 0; |
9199 | flag_NotZ = res; |
9200 | flag_N = res >> 24; |
9201 | adr = AREG((Opcode >> 9) & 7) - 4; |
9202 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9203 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9204 | POST_IO |
9205 | RET(24) |
9206 | } |
9207 | |
9208 | // MOVEL |
9209 | OPCODE(0x2168) |
9210 | { |
9211 | u32 adr, res; |
9212 | u32 src, dst; |
9213 | |
9214 | FETCH_SWORD(adr); |
9215 | adr += AREG((Opcode >> 0) & 7); |
9216 | PRE_IO |
9217 | READ_LONG_F(adr, res) |
9218 | flag_C = 0; |
9219 | flag_V = 0; |
9220 | flag_NotZ = res; |
9221 | flag_N = res >> 24; |
9222 | FETCH_SWORD(adr); |
9223 | adr += AREG((Opcode >> 9) & 7); |
9224 | WRITE_LONG_F(adr, res) |
9225 | POST_IO |
9226 | RET(28) |
9227 | } |
9228 | |
9229 | // MOVEL |
9230 | OPCODE(0x21A8) |
9231 | { |
9232 | u32 adr, res; |
9233 | u32 src, dst; |
9234 | |
9235 | FETCH_SWORD(adr); |
9236 | adr += AREG((Opcode >> 0) & 7); |
9237 | PRE_IO |
9238 | READ_LONG_F(adr, res) |
9239 | flag_C = 0; |
9240 | flag_V = 0; |
9241 | flag_NotZ = res; |
9242 | flag_N = res >> 24; |
9243 | adr = AREG((Opcode >> 9) & 7); |
9244 | DECODE_EXT_WORD |
9245 | WRITE_LONG_F(adr, res) |
9246 | POST_IO |
9247 | RET(30) |
9248 | } |
9249 | |
9250 | // MOVEL |
9251 | OPCODE(0x21E8) |
9252 | { |
9253 | u32 adr, res; |
9254 | u32 src, dst; |
9255 | |
9256 | FETCH_SWORD(adr); |
9257 | adr += AREG((Opcode >> 0) & 7); |
9258 | PRE_IO |
9259 | READ_LONG_F(adr, res) |
9260 | flag_C = 0; |
9261 | flag_V = 0; |
9262 | flag_NotZ = res; |
9263 | flag_N = res >> 24; |
9264 | FETCH_SWORD(adr); |
9265 | WRITE_LONG_F(adr, res) |
9266 | POST_IO |
9267 | RET(28) |
9268 | } |
9269 | |
9270 | // MOVEL |
9271 | OPCODE(0x23E8) |
9272 | { |
9273 | u32 adr, res; |
9274 | u32 src, dst; |
9275 | |
9276 | FETCH_SWORD(adr); |
9277 | adr += AREG((Opcode >> 0) & 7); |
9278 | PRE_IO |
9279 | READ_LONG_F(adr, res) |
9280 | flag_C = 0; |
9281 | flag_V = 0; |
9282 | flag_NotZ = res; |
9283 | flag_N = res >> 24; |
9284 | FETCH_LONG(adr); |
9285 | WRITE_LONG_F(adr, res) |
9286 | POST_IO |
9287 | RET(32) |
9288 | } |
9289 | |
9290 | // MOVEL |
9291 | OPCODE(0x2EE8) |
9292 | { |
9293 | u32 adr, res; |
9294 | u32 src, dst; |
9295 | |
9296 | FETCH_SWORD(adr); |
9297 | adr += AREG((Opcode >> 0) & 7); |
9298 | PRE_IO |
9299 | READ_LONG_F(adr, res) |
9300 | flag_C = 0; |
9301 | flag_V = 0; |
9302 | flag_NotZ = res; |
9303 | flag_N = res >> 24; |
9304 | adr = AREG(7); |
9305 | AREG(7) += 4; |
9306 | WRITE_LONG_F(adr, res) |
9307 | POST_IO |
9308 | RET(24) |
9309 | } |
9310 | |
9311 | // MOVEL |
9312 | OPCODE(0x2F28) |
9313 | { |
9314 | u32 adr, res; |
9315 | u32 src, dst; |
9316 | |
9317 | FETCH_SWORD(adr); |
9318 | adr += AREG((Opcode >> 0) & 7); |
9319 | PRE_IO |
9320 | READ_LONG_F(adr, res) |
9321 | flag_C = 0; |
9322 | flag_V = 0; |
9323 | flag_NotZ = res; |
9324 | flag_N = res >> 24; |
9325 | adr = AREG(7) - 4; |
9326 | AREG(7) = adr; |
03e4f2a3 |
9327 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9328 | POST_IO |
9329 | RET(24) |
9330 | } |
9331 | |
9332 | // MOVEL |
9333 | OPCODE(0x2030) |
9334 | { |
9335 | u32 adr, res; |
9336 | u32 src, dst; |
9337 | |
9338 | adr = AREG((Opcode >> 0) & 7); |
9339 | DECODE_EXT_WORD |
9340 | PRE_IO |
9341 | READ_LONG_F(adr, res) |
9342 | flag_C = 0; |
9343 | flag_V = 0; |
9344 | flag_NotZ = res; |
9345 | flag_N = res >> 24; |
9346 | DREGu32((Opcode >> 9) & 7) = res; |
9347 | POST_IO |
9348 | RET(18) |
9349 | } |
9350 | |
9351 | // MOVEL |
9352 | OPCODE(0x20B0) |
9353 | { |
9354 | u32 adr, res; |
9355 | u32 src, dst; |
9356 | |
9357 | adr = AREG((Opcode >> 0) & 7); |
9358 | DECODE_EXT_WORD |
9359 | PRE_IO |
9360 | READ_LONG_F(adr, res) |
9361 | flag_C = 0; |
9362 | flag_V = 0; |
9363 | flag_NotZ = res; |
9364 | flag_N = res >> 24; |
9365 | adr = AREG((Opcode >> 9) & 7); |
9366 | WRITE_LONG_F(adr, res) |
9367 | POST_IO |
9368 | RET(26) |
9369 | } |
9370 | |
9371 | // MOVEL |
9372 | OPCODE(0x20F0) |
9373 | { |
9374 | u32 adr, res; |
9375 | u32 src, dst; |
9376 | |
9377 | adr = AREG((Opcode >> 0) & 7); |
9378 | DECODE_EXT_WORD |
9379 | PRE_IO |
9380 | READ_LONG_F(adr, res) |
9381 | flag_C = 0; |
9382 | flag_V = 0; |
9383 | flag_NotZ = res; |
9384 | flag_N = res >> 24; |
9385 | adr = AREG((Opcode >> 9) & 7); |
9386 | AREG((Opcode >> 9) & 7) += 4; |
9387 | WRITE_LONG_F(adr, res) |
9388 | POST_IO |
9389 | RET(26) |
9390 | } |
9391 | |
9392 | // MOVEL |
9393 | OPCODE(0x2130) |
9394 | { |
9395 | u32 adr, res; |
9396 | u32 src, dst; |
9397 | |
9398 | adr = AREG((Opcode >> 0) & 7); |
9399 | DECODE_EXT_WORD |
9400 | PRE_IO |
9401 | READ_LONG_F(adr, res) |
9402 | flag_C = 0; |
9403 | flag_V = 0; |
9404 | flag_NotZ = res; |
9405 | flag_N = res >> 24; |
9406 | adr = AREG((Opcode >> 9) & 7) - 4; |
9407 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9408 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9409 | POST_IO |
9410 | RET(26) |
9411 | } |
9412 | |
9413 | // MOVEL |
9414 | OPCODE(0x2170) |
9415 | { |
9416 | u32 adr, res; |
9417 | u32 src, dst; |
9418 | |
9419 | adr = AREG((Opcode >> 0) & 7); |
9420 | DECODE_EXT_WORD |
9421 | PRE_IO |
9422 | READ_LONG_F(adr, res) |
9423 | flag_C = 0; |
9424 | flag_V = 0; |
9425 | flag_NotZ = res; |
9426 | flag_N = res >> 24; |
9427 | FETCH_SWORD(adr); |
9428 | adr += AREG((Opcode >> 9) & 7); |
9429 | WRITE_LONG_F(adr, res) |
9430 | POST_IO |
9431 | RET(30) |
9432 | } |
9433 | |
9434 | // MOVEL |
9435 | OPCODE(0x21B0) |
9436 | { |
9437 | u32 adr, res; |
9438 | u32 src, dst; |
9439 | |
9440 | adr = AREG((Opcode >> 0) & 7); |
9441 | DECODE_EXT_WORD |
9442 | PRE_IO |
9443 | READ_LONG_F(adr, res) |
9444 | flag_C = 0; |
9445 | flag_V = 0; |
9446 | flag_NotZ = res; |
9447 | flag_N = res >> 24; |
9448 | adr = AREG((Opcode >> 9) & 7); |
9449 | DECODE_EXT_WORD |
9450 | WRITE_LONG_F(adr, res) |
9451 | POST_IO |
9452 | RET(32) |
9453 | } |
9454 | |
9455 | // MOVEL |
9456 | OPCODE(0x21F0) |
9457 | { |
9458 | u32 adr, res; |
9459 | u32 src, dst; |
9460 | |
9461 | adr = AREG((Opcode >> 0) & 7); |
9462 | DECODE_EXT_WORD |
9463 | PRE_IO |
9464 | READ_LONG_F(adr, res) |
9465 | flag_C = 0; |
9466 | flag_V = 0; |
9467 | flag_NotZ = res; |
9468 | flag_N = res >> 24; |
9469 | FETCH_SWORD(adr); |
9470 | WRITE_LONG_F(adr, res) |
9471 | POST_IO |
9472 | RET(30) |
9473 | } |
9474 | |
9475 | // MOVEL |
9476 | OPCODE(0x23F0) |
9477 | { |
9478 | u32 adr, res; |
9479 | u32 src, dst; |
9480 | |
9481 | adr = AREG((Opcode >> 0) & 7); |
9482 | DECODE_EXT_WORD |
9483 | PRE_IO |
9484 | READ_LONG_F(adr, res) |
9485 | flag_C = 0; |
9486 | flag_V = 0; |
9487 | flag_NotZ = res; |
9488 | flag_N = res >> 24; |
9489 | FETCH_LONG(adr); |
9490 | WRITE_LONG_F(adr, res) |
9491 | POST_IO |
9492 | RET(34) |
9493 | } |
9494 | |
9495 | // MOVEL |
9496 | OPCODE(0x2EF0) |
9497 | { |
9498 | u32 adr, res; |
9499 | u32 src, dst; |
9500 | |
9501 | adr = AREG((Opcode >> 0) & 7); |
9502 | DECODE_EXT_WORD |
9503 | PRE_IO |
9504 | READ_LONG_F(adr, res) |
9505 | flag_C = 0; |
9506 | flag_V = 0; |
9507 | flag_NotZ = res; |
9508 | flag_N = res >> 24; |
9509 | adr = AREG(7); |
9510 | AREG(7) += 4; |
9511 | WRITE_LONG_F(adr, res) |
9512 | POST_IO |
9513 | RET(26) |
9514 | } |
9515 | |
9516 | // MOVEL |
9517 | OPCODE(0x2F30) |
9518 | { |
9519 | u32 adr, res; |
9520 | u32 src, dst; |
9521 | |
9522 | adr = AREG((Opcode >> 0) & 7); |
9523 | DECODE_EXT_WORD |
9524 | PRE_IO |
9525 | READ_LONG_F(adr, res) |
9526 | flag_C = 0; |
9527 | flag_V = 0; |
9528 | flag_NotZ = res; |
9529 | flag_N = res >> 24; |
9530 | adr = AREG(7) - 4; |
9531 | AREG(7) = adr; |
03e4f2a3 |
9532 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9533 | POST_IO |
9534 | RET(26) |
9535 | } |
9536 | |
9537 | // MOVEL |
9538 | OPCODE(0x2038) |
9539 | { |
9540 | u32 adr, res; |
9541 | u32 src, dst; |
9542 | |
9543 | FETCH_SWORD(adr); |
9544 | PRE_IO |
9545 | READ_LONG_F(adr, res) |
9546 | flag_C = 0; |
9547 | flag_V = 0; |
9548 | flag_NotZ = res; |
9549 | flag_N = res >> 24; |
9550 | DREGu32((Opcode >> 9) & 7) = res; |
9551 | POST_IO |
9552 | RET(16) |
9553 | } |
9554 | |
9555 | // MOVEL |
9556 | OPCODE(0x20B8) |
9557 | { |
9558 | u32 adr, res; |
9559 | u32 src, dst; |
9560 | |
9561 | FETCH_SWORD(adr); |
9562 | PRE_IO |
9563 | READ_LONG_F(adr, res) |
9564 | flag_C = 0; |
9565 | flag_V = 0; |
9566 | flag_NotZ = res; |
9567 | flag_N = res >> 24; |
9568 | adr = AREG((Opcode >> 9) & 7); |
9569 | WRITE_LONG_F(adr, res) |
9570 | POST_IO |
9571 | RET(24) |
9572 | } |
9573 | |
9574 | // MOVEL |
9575 | OPCODE(0x20F8) |
9576 | { |
9577 | u32 adr, res; |
9578 | u32 src, dst; |
9579 | |
9580 | FETCH_SWORD(adr); |
9581 | PRE_IO |
9582 | READ_LONG_F(adr, res) |
9583 | flag_C = 0; |
9584 | flag_V = 0; |
9585 | flag_NotZ = res; |
9586 | flag_N = res >> 24; |
9587 | adr = AREG((Opcode >> 9) & 7); |
9588 | AREG((Opcode >> 9) & 7) += 4; |
9589 | WRITE_LONG_F(adr, res) |
9590 | POST_IO |
9591 | RET(24) |
9592 | } |
9593 | |
9594 | // MOVEL |
9595 | OPCODE(0x2138) |
9596 | { |
9597 | u32 adr, res; |
9598 | u32 src, dst; |
9599 | |
9600 | FETCH_SWORD(adr); |
9601 | PRE_IO |
9602 | READ_LONG_F(adr, res) |
9603 | flag_C = 0; |
9604 | flag_V = 0; |
9605 | flag_NotZ = res; |
9606 | flag_N = res >> 24; |
9607 | adr = AREG((Opcode >> 9) & 7) - 4; |
9608 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9609 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9610 | POST_IO |
9611 | RET(24) |
9612 | } |
9613 | |
9614 | // MOVEL |
9615 | OPCODE(0x2178) |
9616 | { |
9617 | u32 adr, res; |
9618 | u32 src, dst; |
9619 | |
9620 | FETCH_SWORD(adr); |
9621 | PRE_IO |
9622 | READ_LONG_F(adr, res) |
9623 | flag_C = 0; |
9624 | flag_V = 0; |
9625 | flag_NotZ = res; |
9626 | flag_N = res >> 24; |
9627 | FETCH_SWORD(adr); |
9628 | adr += AREG((Opcode >> 9) & 7); |
9629 | WRITE_LONG_F(adr, res) |
9630 | POST_IO |
9631 | RET(28) |
9632 | } |
9633 | |
9634 | // MOVEL |
9635 | OPCODE(0x21B8) |
9636 | { |
9637 | u32 adr, res; |
9638 | u32 src, dst; |
9639 | |
9640 | FETCH_SWORD(adr); |
9641 | PRE_IO |
9642 | READ_LONG_F(adr, res) |
9643 | flag_C = 0; |
9644 | flag_V = 0; |
9645 | flag_NotZ = res; |
9646 | flag_N = res >> 24; |
9647 | adr = AREG((Opcode >> 9) & 7); |
9648 | DECODE_EXT_WORD |
9649 | WRITE_LONG_F(adr, res) |
9650 | POST_IO |
9651 | RET(30) |
9652 | } |
9653 | |
9654 | // MOVEL |
9655 | OPCODE(0x21F8) |
9656 | { |
9657 | u32 adr, res; |
9658 | u32 src, dst; |
9659 | |
9660 | FETCH_SWORD(adr); |
9661 | PRE_IO |
9662 | READ_LONG_F(adr, res) |
9663 | flag_C = 0; |
9664 | flag_V = 0; |
9665 | flag_NotZ = res; |
9666 | flag_N = res >> 24; |
9667 | FETCH_SWORD(adr); |
9668 | WRITE_LONG_F(adr, res) |
9669 | POST_IO |
9670 | RET(28) |
9671 | } |
9672 | |
9673 | // MOVEL |
9674 | OPCODE(0x23F8) |
9675 | { |
9676 | u32 adr, res; |
9677 | u32 src, dst; |
9678 | |
9679 | FETCH_SWORD(adr); |
9680 | PRE_IO |
9681 | READ_LONG_F(adr, res) |
9682 | flag_C = 0; |
9683 | flag_V = 0; |
9684 | flag_NotZ = res; |
9685 | flag_N = res >> 24; |
9686 | FETCH_LONG(adr); |
9687 | WRITE_LONG_F(adr, res) |
9688 | POST_IO |
9689 | RET(32) |
9690 | } |
9691 | |
9692 | // MOVEL |
9693 | OPCODE(0x2EF8) |
9694 | { |
9695 | u32 adr, res; |
9696 | u32 src, dst; |
9697 | |
9698 | FETCH_SWORD(adr); |
9699 | PRE_IO |
9700 | READ_LONG_F(adr, res) |
9701 | flag_C = 0; |
9702 | flag_V = 0; |
9703 | flag_NotZ = res; |
9704 | flag_N = res >> 24; |
9705 | adr = AREG(7); |
9706 | AREG(7) += 4; |
9707 | WRITE_LONG_F(adr, res) |
9708 | POST_IO |
9709 | RET(24) |
9710 | } |
9711 | |
9712 | // MOVEL |
9713 | OPCODE(0x2F38) |
9714 | { |
9715 | u32 adr, res; |
9716 | u32 src, dst; |
9717 | |
9718 | FETCH_SWORD(adr); |
9719 | PRE_IO |
9720 | READ_LONG_F(adr, res) |
9721 | flag_C = 0; |
9722 | flag_V = 0; |
9723 | flag_NotZ = res; |
9724 | flag_N = res >> 24; |
9725 | adr = AREG(7) - 4; |
9726 | AREG(7) = adr; |
03e4f2a3 |
9727 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9728 | POST_IO |
9729 | RET(24) |
9730 | } |
9731 | |
9732 | // MOVEL |
9733 | OPCODE(0x2039) |
9734 | { |
9735 | u32 adr, res; |
9736 | u32 src, dst; |
9737 | |
9738 | FETCH_LONG(adr); |
9739 | PRE_IO |
9740 | READ_LONG_F(adr, res) |
9741 | flag_C = 0; |
9742 | flag_V = 0; |
9743 | flag_NotZ = res; |
9744 | flag_N = res >> 24; |
9745 | DREGu32((Opcode >> 9) & 7) = res; |
9746 | POST_IO |
9747 | RET(20) |
9748 | } |
9749 | |
9750 | // MOVEL |
9751 | OPCODE(0x20B9) |
9752 | { |
9753 | u32 adr, res; |
9754 | u32 src, dst; |
9755 | |
9756 | FETCH_LONG(adr); |
9757 | PRE_IO |
9758 | READ_LONG_F(adr, res) |
9759 | flag_C = 0; |
9760 | flag_V = 0; |
9761 | flag_NotZ = res; |
9762 | flag_N = res >> 24; |
9763 | adr = AREG((Opcode >> 9) & 7); |
9764 | WRITE_LONG_F(adr, res) |
9765 | POST_IO |
9766 | RET(28) |
9767 | } |
9768 | |
9769 | // MOVEL |
9770 | OPCODE(0x20F9) |
9771 | { |
9772 | u32 adr, res; |
9773 | u32 src, dst; |
9774 | |
9775 | FETCH_LONG(adr); |
9776 | PRE_IO |
9777 | READ_LONG_F(adr, res) |
9778 | flag_C = 0; |
9779 | flag_V = 0; |
9780 | flag_NotZ = res; |
9781 | flag_N = res >> 24; |
9782 | adr = AREG((Opcode >> 9) & 7); |
9783 | AREG((Opcode >> 9) & 7) += 4; |
9784 | WRITE_LONG_F(adr, res) |
9785 | POST_IO |
9786 | RET(28) |
9787 | } |
9788 | |
9789 | // MOVEL |
9790 | OPCODE(0x2139) |
9791 | { |
9792 | u32 adr, res; |
9793 | u32 src, dst; |
9794 | |
9795 | FETCH_LONG(adr); |
9796 | PRE_IO |
9797 | READ_LONG_F(adr, res) |
9798 | flag_C = 0; |
9799 | flag_V = 0; |
9800 | flag_NotZ = res; |
9801 | flag_N = res >> 24; |
9802 | adr = AREG((Opcode >> 9) & 7) - 4; |
9803 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
9804 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9805 | POST_IO |
9806 | RET(28) |
9807 | } |
9808 | |
9809 | // MOVEL |
9810 | OPCODE(0x2179) |
9811 | { |
9812 | u32 adr, res; |
9813 | u32 src, dst; |
9814 | |
9815 | FETCH_LONG(adr); |
9816 | PRE_IO |
9817 | READ_LONG_F(adr, res) |
9818 | flag_C = 0; |
9819 | flag_V = 0; |
9820 | flag_NotZ = res; |
9821 | flag_N = res >> 24; |
9822 | FETCH_SWORD(adr); |
9823 | adr += AREG((Opcode >> 9) & 7); |
9824 | WRITE_LONG_F(adr, res) |
9825 | POST_IO |
9826 | RET(32) |
9827 | } |
9828 | |
9829 | // MOVEL |
9830 | OPCODE(0x21B9) |
9831 | { |
9832 | u32 adr, res; |
9833 | u32 src, dst; |
9834 | |
9835 | FETCH_LONG(adr); |
9836 | PRE_IO |
9837 | READ_LONG_F(adr, res) |
9838 | flag_C = 0; |
9839 | flag_V = 0; |
9840 | flag_NotZ = res; |
9841 | flag_N = res >> 24; |
9842 | adr = AREG((Opcode >> 9) & 7); |
9843 | DECODE_EXT_WORD |
9844 | WRITE_LONG_F(adr, res) |
9845 | POST_IO |
9846 | RET(34) |
9847 | } |
9848 | |
9849 | // MOVEL |
9850 | OPCODE(0x21F9) |
9851 | { |
9852 | u32 adr, res; |
9853 | u32 src, dst; |
9854 | |
9855 | FETCH_LONG(adr); |
9856 | PRE_IO |
9857 | READ_LONG_F(adr, res) |
9858 | flag_C = 0; |
9859 | flag_V = 0; |
9860 | flag_NotZ = res; |
9861 | flag_N = res >> 24; |
9862 | FETCH_SWORD(adr); |
9863 | WRITE_LONG_F(adr, res) |
9864 | POST_IO |
9865 | RET(32) |
9866 | } |
9867 | |
9868 | // MOVEL |
9869 | OPCODE(0x23F9) |
9870 | { |
9871 | u32 adr, res; |
9872 | u32 src, dst; |
9873 | |
9874 | FETCH_LONG(adr); |
9875 | PRE_IO |
9876 | READ_LONG_F(adr, res) |
9877 | flag_C = 0; |
9878 | flag_V = 0; |
9879 | flag_NotZ = res; |
9880 | flag_N = res >> 24; |
9881 | FETCH_LONG(adr); |
9882 | WRITE_LONG_F(adr, res) |
9883 | POST_IO |
9884 | RET(36) |
9885 | } |
9886 | |
9887 | // MOVEL |
9888 | OPCODE(0x2EF9) |
9889 | { |
9890 | u32 adr, res; |
9891 | u32 src, dst; |
9892 | |
9893 | FETCH_LONG(adr); |
9894 | PRE_IO |
9895 | READ_LONG_F(adr, res) |
9896 | flag_C = 0; |
9897 | flag_V = 0; |
9898 | flag_NotZ = res; |
9899 | flag_N = res >> 24; |
9900 | adr = AREG(7); |
9901 | AREG(7) += 4; |
9902 | WRITE_LONG_F(adr, res) |
9903 | POST_IO |
9904 | RET(28) |
9905 | } |
9906 | |
9907 | // MOVEL |
9908 | OPCODE(0x2F39) |
9909 | { |
9910 | u32 adr, res; |
9911 | u32 src, dst; |
9912 | |
9913 | FETCH_LONG(adr); |
9914 | PRE_IO |
9915 | READ_LONG_F(adr, res) |
9916 | flag_C = 0; |
9917 | flag_V = 0; |
9918 | flag_NotZ = res; |
9919 | flag_N = res >> 24; |
9920 | adr = AREG(7) - 4; |
9921 | AREG(7) = adr; |
03e4f2a3 |
9922 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
9923 | POST_IO |
9924 | RET(28) |
9925 | } |
9926 | |
9927 | // MOVEL |
9928 | OPCODE(0x203A) |
9929 | { |
9930 | u32 adr, res; |
9931 | u32 src, dst; |
9932 | |
be26eb23 |
9933 | adr = GET_SWORD + GET_PC; |
70357ce5 |
9934 | PC++; |
9935 | PRE_IO |
9936 | READ_LONG_F(adr, res) |
9937 | flag_C = 0; |
9938 | flag_V = 0; |
9939 | flag_NotZ = res; |
9940 | flag_N = res >> 24; |
9941 | DREGu32((Opcode >> 9) & 7) = res; |
9942 | POST_IO |
9943 | RET(16) |
9944 | } |
9945 | |
9946 | // MOVEL |
9947 | OPCODE(0x20BA) |
9948 | { |
9949 | u32 adr, res; |
9950 | u32 src, dst; |
9951 | |
be26eb23 |
9952 | adr = GET_SWORD + GET_PC; |
70357ce5 |
9953 | PC++; |
9954 | PRE_IO |
9955 | READ_LONG_F(adr, res) |
9956 | flag_C = 0; |
9957 | flag_V = 0; |
9958 | flag_NotZ = res; |
9959 | flag_N = res >> 24; |
9960 | adr = AREG((Opcode >> 9) & 7); |
9961 | WRITE_LONG_F(adr, res) |
9962 | POST_IO |
9963 | RET(24) |
9964 | } |
9965 | |
9966 | // MOVEL |
9967 | OPCODE(0x20FA) |
9968 | { |
9969 | u32 adr, res; |
9970 | u32 src, dst; |
9971 | |
be26eb23 |
9972 | adr = GET_SWORD + GET_PC; |
70357ce5 |
9973 | PC++; |
9974 | PRE_IO |
9975 | READ_LONG_F(adr, res) |
9976 | flag_C = 0; |
9977 | flag_V = 0; |
9978 | flag_NotZ = res; |
9979 | flag_N = res >> 24; |
9980 | adr = AREG((Opcode >> 9) & 7); |
9981 | AREG((Opcode >> 9) & 7) += 4; |
9982 | WRITE_LONG_F(adr, res) |
9983 | POST_IO |
9984 | RET(24) |
9985 | } |
9986 | |
9987 | // MOVEL |
9988 | OPCODE(0x213A) |
9989 | { |
9990 | u32 adr, res; |
9991 | u32 src, dst; |
9992 | |
be26eb23 |
9993 | adr = GET_SWORD + GET_PC; |
70357ce5 |
9994 | PC++; |
9995 | PRE_IO |
9996 | READ_LONG_F(adr, res) |
9997 | flag_C = 0; |
9998 | flag_V = 0; |
9999 | flag_NotZ = res; |
10000 | flag_N = res >> 24; |
10001 | adr = AREG((Opcode >> 9) & 7) - 4; |
10002 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10003 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10004 | POST_IO |
10005 | RET(24) |
10006 | } |
10007 | |
10008 | // MOVEL |
10009 | OPCODE(0x217A) |
10010 | { |
10011 | u32 adr, res; |
10012 | u32 src, dst; |
10013 | |
be26eb23 |
10014 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10015 | PC++; |
10016 | PRE_IO |
10017 | READ_LONG_F(adr, res) |
10018 | flag_C = 0; |
10019 | flag_V = 0; |
10020 | flag_NotZ = res; |
10021 | flag_N = res >> 24; |
10022 | FETCH_SWORD(adr); |
10023 | adr += AREG((Opcode >> 9) & 7); |
10024 | WRITE_LONG_F(adr, res) |
10025 | POST_IO |
10026 | RET(28) |
10027 | } |
10028 | |
10029 | // MOVEL |
10030 | OPCODE(0x21BA) |
10031 | { |
10032 | u32 adr, res; |
10033 | u32 src, dst; |
10034 | |
be26eb23 |
10035 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10036 | PC++; |
10037 | PRE_IO |
10038 | READ_LONG_F(adr, res) |
10039 | flag_C = 0; |
10040 | flag_V = 0; |
10041 | flag_NotZ = res; |
10042 | flag_N = res >> 24; |
10043 | adr = AREG((Opcode >> 9) & 7); |
10044 | DECODE_EXT_WORD |
10045 | WRITE_LONG_F(adr, res) |
10046 | POST_IO |
10047 | RET(30) |
10048 | } |
10049 | |
10050 | // MOVEL |
10051 | OPCODE(0x21FA) |
10052 | { |
10053 | u32 adr, res; |
10054 | u32 src, dst; |
10055 | |
be26eb23 |
10056 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10057 | PC++; |
10058 | PRE_IO |
10059 | READ_LONG_F(adr, res) |
10060 | flag_C = 0; |
10061 | flag_V = 0; |
10062 | flag_NotZ = res; |
10063 | flag_N = res >> 24; |
10064 | FETCH_SWORD(adr); |
10065 | WRITE_LONG_F(adr, res) |
10066 | POST_IO |
10067 | RET(28) |
10068 | } |
10069 | |
10070 | // MOVEL |
10071 | OPCODE(0x23FA) |
10072 | { |
10073 | u32 adr, res; |
10074 | u32 src, dst; |
10075 | |
be26eb23 |
10076 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10077 | PC++; |
10078 | PRE_IO |
10079 | READ_LONG_F(adr, res) |
10080 | flag_C = 0; |
10081 | flag_V = 0; |
10082 | flag_NotZ = res; |
10083 | flag_N = res >> 24; |
10084 | FETCH_LONG(adr); |
10085 | WRITE_LONG_F(adr, res) |
10086 | POST_IO |
10087 | RET(32) |
10088 | } |
10089 | |
10090 | // MOVEL |
10091 | OPCODE(0x2EFA) |
10092 | { |
10093 | u32 adr, res; |
10094 | u32 src, dst; |
10095 | |
be26eb23 |
10096 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10097 | PC++; |
10098 | PRE_IO |
10099 | READ_LONG_F(adr, res) |
10100 | flag_C = 0; |
10101 | flag_V = 0; |
10102 | flag_NotZ = res; |
10103 | flag_N = res >> 24; |
10104 | adr = AREG(7); |
10105 | AREG(7) += 4; |
10106 | WRITE_LONG_F(adr, res) |
10107 | POST_IO |
10108 | RET(24) |
10109 | } |
10110 | |
10111 | // MOVEL |
10112 | OPCODE(0x2F3A) |
10113 | { |
10114 | u32 adr, res; |
10115 | u32 src, dst; |
10116 | |
be26eb23 |
10117 | adr = GET_SWORD + GET_PC; |
70357ce5 |
10118 | PC++; |
10119 | PRE_IO |
10120 | READ_LONG_F(adr, res) |
10121 | flag_C = 0; |
10122 | flag_V = 0; |
10123 | flag_NotZ = res; |
10124 | flag_N = res >> 24; |
10125 | adr = AREG(7) - 4; |
10126 | AREG(7) = adr; |
03e4f2a3 |
10127 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10128 | POST_IO |
10129 | RET(24) |
10130 | } |
10131 | |
10132 | // MOVEL |
10133 | OPCODE(0x203B) |
10134 | { |
10135 | u32 adr, res; |
10136 | u32 src, dst; |
10137 | |
be26eb23 |
10138 | adr = GET_PC; |
70357ce5 |
10139 | DECODE_EXT_WORD |
10140 | PRE_IO |
10141 | READ_LONG_F(adr, res) |
10142 | flag_C = 0; |
10143 | flag_V = 0; |
10144 | flag_NotZ = res; |
10145 | flag_N = res >> 24; |
10146 | DREGu32((Opcode >> 9) & 7) = res; |
10147 | POST_IO |
10148 | RET(18) |
10149 | } |
10150 | |
10151 | // MOVEL |
10152 | OPCODE(0x20BB) |
10153 | { |
10154 | u32 adr, res; |
10155 | u32 src, dst; |
10156 | |
be26eb23 |
10157 | adr = GET_PC; |
70357ce5 |
10158 | DECODE_EXT_WORD |
10159 | PRE_IO |
10160 | READ_LONG_F(adr, res) |
10161 | flag_C = 0; |
10162 | flag_V = 0; |
10163 | flag_NotZ = res; |
10164 | flag_N = res >> 24; |
10165 | adr = AREG((Opcode >> 9) & 7); |
10166 | WRITE_LONG_F(adr, res) |
10167 | POST_IO |
10168 | RET(26) |
10169 | } |
10170 | |
10171 | // MOVEL |
10172 | OPCODE(0x20FB) |
10173 | { |
10174 | u32 adr, res; |
10175 | u32 src, dst; |
10176 | |
be26eb23 |
10177 | adr = GET_PC; |
70357ce5 |
10178 | DECODE_EXT_WORD |
10179 | PRE_IO |
10180 | READ_LONG_F(adr, res) |
10181 | flag_C = 0; |
10182 | flag_V = 0; |
10183 | flag_NotZ = res; |
10184 | flag_N = res >> 24; |
10185 | adr = AREG((Opcode >> 9) & 7); |
10186 | AREG((Opcode >> 9) & 7) += 4; |
10187 | WRITE_LONG_F(adr, res) |
10188 | POST_IO |
10189 | RET(26) |
10190 | } |
10191 | |
10192 | // MOVEL |
10193 | OPCODE(0x213B) |
10194 | { |
10195 | u32 adr, res; |
10196 | u32 src, dst; |
10197 | |
be26eb23 |
10198 | adr = GET_PC; |
70357ce5 |
10199 | DECODE_EXT_WORD |
10200 | PRE_IO |
10201 | READ_LONG_F(adr, res) |
10202 | flag_C = 0; |
10203 | flag_V = 0; |
10204 | flag_NotZ = res; |
10205 | flag_N = res >> 24; |
10206 | adr = AREG((Opcode >> 9) & 7) - 4; |
10207 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10208 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10209 | POST_IO |
10210 | RET(26) |
10211 | } |
10212 | |
10213 | // MOVEL |
10214 | OPCODE(0x217B) |
10215 | { |
10216 | u32 adr, res; |
10217 | u32 src, dst; |
10218 | |
be26eb23 |
10219 | adr = GET_PC; |
70357ce5 |
10220 | DECODE_EXT_WORD |
10221 | PRE_IO |
10222 | READ_LONG_F(adr, res) |
10223 | flag_C = 0; |
10224 | flag_V = 0; |
10225 | flag_NotZ = res; |
10226 | flag_N = res >> 24; |
10227 | FETCH_SWORD(adr); |
10228 | adr += AREG((Opcode >> 9) & 7); |
10229 | WRITE_LONG_F(adr, res) |
10230 | POST_IO |
10231 | RET(30) |
10232 | } |
10233 | |
10234 | // MOVEL |
10235 | OPCODE(0x21BB) |
10236 | { |
10237 | u32 adr, res; |
10238 | u32 src, dst; |
10239 | |
be26eb23 |
10240 | adr = GET_PC; |
70357ce5 |
10241 | DECODE_EXT_WORD |
10242 | PRE_IO |
10243 | READ_LONG_F(adr, res) |
10244 | flag_C = 0; |
10245 | flag_V = 0; |
10246 | flag_NotZ = res; |
10247 | flag_N = res >> 24; |
10248 | adr = AREG((Opcode >> 9) & 7); |
10249 | DECODE_EXT_WORD |
10250 | WRITE_LONG_F(adr, res) |
10251 | POST_IO |
10252 | RET(32) |
10253 | } |
10254 | |
10255 | // MOVEL |
10256 | OPCODE(0x21FB) |
10257 | { |
10258 | u32 adr, res; |
10259 | u32 src, dst; |
10260 | |
be26eb23 |
10261 | adr = GET_PC; |
70357ce5 |
10262 | DECODE_EXT_WORD |
10263 | PRE_IO |
10264 | READ_LONG_F(adr, res) |
10265 | flag_C = 0; |
10266 | flag_V = 0; |
10267 | flag_NotZ = res; |
10268 | flag_N = res >> 24; |
10269 | FETCH_SWORD(adr); |
10270 | WRITE_LONG_F(adr, res) |
10271 | POST_IO |
10272 | RET(30) |
10273 | } |
10274 | |
10275 | // MOVEL |
10276 | OPCODE(0x23FB) |
10277 | { |
10278 | u32 adr, res; |
10279 | u32 src, dst; |
10280 | |
be26eb23 |
10281 | adr = GET_PC; |
70357ce5 |
10282 | DECODE_EXT_WORD |
10283 | PRE_IO |
10284 | READ_LONG_F(adr, res) |
10285 | flag_C = 0; |
10286 | flag_V = 0; |
10287 | flag_NotZ = res; |
10288 | flag_N = res >> 24; |
10289 | FETCH_LONG(adr); |
10290 | WRITE_LONG_F(adr, res) |
10291 | POST_IO |
10292 | RET(34) |
10293 | } |
10294 | |
10295 | // MOVEL |
10296 | OPCODE(0x2EFB) |
10297 | { |
10298 | u32 adr, res; |
10299 | u32 src, dst; |
10300 | |
be26eb23 |
10301 | adr = GET_PC; |
70357ce5 |
10302 | DECODE_EXT_WORD |
10303 | PRE_IO |
10304 | READ_LONG_F(adr, res) |
10305 | flag_C = 0; |
10306 | flag_V = 0; |
10307 | flag_NotZ = res; |
10308 | flag_N = res >> 24; |
10309 | adr = AREG(7); |
10310 | AREG(7) += 4; |
10311 | WRITE_LONG_F(adr, res) |
10312 | POST_IO |
10313 | RET(26) |
10314 | } |
10315 | |
10316 | // MOVEL |
10317 | OPCODE(0x2F3B) |
10318 | { |
10319 | u32 adr, res; |
10320 | u32 src, dst; |
10321 | |
be26eb23 |
10322 | adr = GET_PC; |
70357ce5 |
10323 | DECODE_EXT_WORD |
10324 | PRE_IO |
10325 | READ_LONG_F(adr, res) |
10326 | flag_C = 0; |
10327 | flag_V = 0; |
10328 | flag_NotZ = res; |
10329 | flag_N = res >> 24; |
10330 | adr = AREG(7) - 4; |
10331 | AREG(7) = adr; |
03e4f2a3 |
10332 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10333 | POST_IO |
10334 | RET(26) |
10335 | } |
10336 | |
10337 | // MOVEL |
10338 | OPCODE(0x203C) |
10339 | { |
10340 | u32 adr, res; |
10341 | u32 src, dst; |
10342 | |
10343 | FETCH_LONG(res); |
10344 | flag_C = 0; |
10345 | flag_V = 0; |
10346 | flag_NotZ = res; |
10347 | flag_N = res >> 24; |
10348 | DREGu32((Opcode >> 9) & 7) = res; |
10349 | RET(12) |
10350 | } |
10351 | |
10352 | // MOVEL |
10353 | OPCODE(0x20BC) |
10354 | { |
10355 | u32 adr, res; |
10356 | u32 src, dst; |
10357 | |
10358 | FETCH_LONG(res); |
10359 | flag_C = 0; |
10360 | flag_V = 0; |
10361 | flag_NotZ = res; |
10362 | flag_N = res >> 24; |
10363 | adr = AREG((Opcode >> 9) & 7); |
10364 | PRE_IO |
10365 | WRITE_LONG_F(adr, res) |
10366 | POST_IO |
10367 | RET(20) |
10368 | } |
10369 | |
10370 | // MOVEL |
10371 | OPCODE(0x20FC) |
10372 | { |
10373 | u32 adr, res; |
10374 | u32 src, dst; |
10375 | |
10376 | FETCH_LONG(res); |
10377 | flag_C = 0; |
10378 | flag_V = 0; |
10379 | flag_NotZ = res; |
10380 | flag_N = res >> 24; |
10381 | adr = AREG((Opcode >> 9) & 7); |
10382 | AREG((Opcode >> 9) & 7) += 4; |
10383 | PRE_IO |
10384 | WRITE_LONG_F(adr, res) |
10385 | POST_IO |
10386 | RET(20) |
10387 | } |
10388 | |
10389 | // MOVEL |
10390 | OPCODE(0x213C) |
10391 | { |
10392 | u32 adr, res; |
10393 | u32 src, dst; |
10394 | |
10395 | FETCH_LONG(res); |
10396 | flag_C = 0; |
10397 | flag_V = 0; |
10398 | flag_NotZ = res; |
10399 | flag_N = res >> 24; |
10400 | adr = AREG((Opcode >> 9) & 7) - 4; |
10401 | AREG((Opcode >> 9) & 7) = adr; |
10402 | PRE_IO |
80db4442 |
10403 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10404 | POST_IO |
10405 | RET(20) |
10406 | } |
10407 | |
10408 | // MOVEL |
10409 | OPCODE(0x217C) |
10410 | { |
10411 | u32 adr, res; |
10412 | u32 src, dst; |
10413 | |
10414 | FETCH_LONG(res); |
10415 | flag_C = 0; |
10416 | flag_V = 0; |
10417 | flag_NotZ = res; |
10418 | flag_N = res >> 24; |
10419 | FETCH_SWORD(adr); |
10420 | adr += AREG((Opcode >> 9) & 7); |
10421 | PRE_IO |
10422 | WRITE_LONG_F(adr, res) |
10423 | POST_IO |
10424 | RET(24) |
10425 | } |
10426 | |
10427 | // MOVEL |
10428 | OPCODE(0x21BC) |
10429 | { |
10430 | u32 adr, res; |
10431 | u32 src, dst; |
10432 | |
10433 | FETCH_LONG(res); |
10434 | flag_C = 0; |
10435 | flag_V = 0; |
10436 | flag_NotZ = res; |
10437 | flag_N = res >> 24; |
10438 | adr = AREG((Opcode >> 9) & 7); |
10439 | DECODE_EXT_WORD |
10440 | PRE_IO |
10441 | WRITE_LONG_F(adr, res) |
10442 | POST_IO |
10443 | RET(26) |
10444 | } |
10445 | |
10446 | // MOVEL |
10447 | OPCODE(0x21FC) |
10448 | { |
10449 | u32 adr, res; |
10450 | u32 src, dst; |
10451 | |
10452 | FETCH_LONG(res); |
10453 | flag_C = 0; |
10454 | flag_V = 0; |
10455 | flag_NotZ = res; |
10456 | flag_N = res >> 24; |
10457 | FETCH_SWORD(adr); |
10458 | PRE_IO |
10459 | WRITE_LONG_F(adr, res) |
10460 | POST_IO |
10461 | RET(24) |
10462 | } |
10463 | |
10464 | // MOVEL |
10465 | OPCODE(0x23FC) |
10466 | { |
10467 | u32 adr, res; |
10468 | u32 src, dst; |
10469 | |
10470 | FETCH_LONG(res); |
10471 | flag_C = 0; |
10472 | flag_V = 0; |
10473 | flag_NotZ = res; |
10474 | flag_N = res >> 24; |
10475 | FETCH_LONG(adr); |
10476 | PRE_IO |
10477 | WRITE_LONG_F(adr, res) |
10478 | POST_IO |
10479 | RET(28) |
10480 | } |
10481 | |
10482 | // MOVEL |
10483 | OPCODE(0x2EFC) |
10484 | { |
10485 | u32 adr, res; |
10486 | u32 src, dst; |
10487 | |
10488 | FETCH_LONG(res); |
10489 | flag_C = 0; |
10490 | flag_V = 0; |
10491 | flag_NotZ = res; |
10492 | flag_N = res >> 24; |
10493 | adr = AREG(7); |
10494 | AREG(7) += 4; |
10495 | PRE_IO |
10496 | WRITE_LONG_F(adr, res) |
10497 | POST_IO |
10498 | RET(20) |
10499 | } |
10500 | |
10501 | // MOVEL |
10502 | OPCODE(0x2F3C) |
10503 | { |
10504 | u32 adr, res; |
10505 | u32 src, dst; |
10506 | |
10507 | FETCH_LONG(res); |
10508 | flag_C = 0; |
10509 | flag_V = 0; |
10510 | flag_NotZ = res; |
10511 | flag_N = res >> 24; |
10512 | adr = AREG(7) - 4; |
10513 | AREG(7) = adr; |
10514 | PRE_IO |
03e4f2a3 |
10515 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10516 | POST_IO |
10517 | RET(20) |
10518 | } |
10519 | |
10520 | // MOVEL |
10521 | OPCODE(0x201F) |
10522 | { |
10523 | u32 adr, res; |
10524 | u32 src, dst; |
10525 | |
10526 | adr = AREG(7); |
10527 | AREG(7) += 4; |
10528 | PRE_IO |
10529 | READ_LONG_F(adr, res) |
10530 | flag_C = 0; |
10531 | flag_V = 0; |
10532 | flag_NotZ = res; |
10533 | flag_N = res >> 24; |
10534 | DREGu32((Opcode >> 9) & 7) = res; |
10535 | POST_IO |
10536 | RET(12) |
10537 | } |
10538 | |
10539 | // MOVEL |
10540 | OPCODE(0x209F) |
10541 | { |
10542 | u32 adr, res; |
10543 | u32 src, dst; |
10544 | |
10545 | adr = AREG(7); |
10546 | AREG(7) += 4; |
10547 | PRE_IO |
10548 | READ_LONG_F(adr, res) |
10549 | flag_C = 0; |
10550 | flag_V = 0; |
10551 | flag_NotZ = res; |
10552 | flag_N = res >> 24; |
10553 | adr = AREG((Opcode >> 9) & 7); |
10554 | WRITE_LONG_F(adr, res) |
10555 | POST_IO |
10556 | RET(20) |
10557 | } |
10558 | |
10559 | // MOVEL |
10560 | OPCODE(0x20DF) |
10561 | { |
10562 | u32 adr, res; |
10563 | u32 src, dst; |
10564 | |
10565 | adr = AREG(7); |
10566 | AREG(7) += 4; |
10567 | PRE_IO |
10568 | READ_LONG_F(adr, res) |
10569 | flag_C = 0; |
10570 | flag_V = 0; |
10571 | flag_NotZ = res; |
10572 | flag_N = res >> 24; |
10573 | adr = AREG((Opcode >> 9) & 7); |
10574 | AREG((Opcode >> 9) & 7) += 4; |
10575 | WRITE_LONG_F(adr, res) |
10576 | POST_IO |
10577 | RET(20) |
10578 | } |
10579 | |
10580 | // MOVEL |
10581 | OPCODE(0x211F) |
10582 | { |
10583 | u32 adr, res; |
10584 | u32 src, dst; |
10585 | |
10586 | adr = AREG(7); |
10587 | AREG(7) += 4; |
10588 | PRE_IO |
10589 | READ_LONG_F(adr, res) |
10590 | flag_C = 0; |
10591 | flag_V = 0; |
10592 | flag_NotZ = res; |
10593 | flag_N = res >> 24; |
10594 | adr = AREG((Opcode >> 9) & 7) - 4; |
10595 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10596 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10597 | POST_IO |
10598 | RET(20) |
10599 | } |
10600 | |
10601 | // MOVEL |
10602 | OPCODE(0x215F) |
10603 | { |
10604 | u32 adr, res; |
10605 | u32 src, dst; |
10606 | |
10607 | adr = AREG(7); |
10608 | AREG(7) += 4; |
10609 | PRE_IO |
10610 | READ_LONG_F(adr, res) |
10611 | flag_C = 0; |
10612 | flag_V = 0; |
10613 | flag_NotZ = res; |
10614 | flag_N = res >> 24; |
10615 | FETCH_SWORD(adr); |
10616 | adr += AREG((Opcode >> 9) & 7); |
10617 | WRITE_LONG_F(adr, res) |
10618 | POST_IO |
10619 | RET(24) |
10620 | } |
10621 | |
10622 | // MOVEL |
10623 | OPCODE(0x219F) |
10624 | { |
10625 | u32 adr, res; |
10626 | u32 src, dst; |
10627 | |
10628 | adr = AREG(7); |
10629 | AREG(7) += 4; |
10630 | PRE_IO |
10631 | READ_LONG_F(adr, res) |
10632 | flag_C = 0; |
10633 | flag_V = 0; |
10634 | flag_NotZ = res; |
10635 | flag_N = res >> 24; |
10636 | adr = AREG((Opcode >> 9) & 7); |
10637 | DECODE_EXT_WORD |
10638 | WRITE_LONG_F(adr, res) |
10639 | POST_IO |
10640 | RET(26) |
10641 | } |
10642 | |
10643 | // MOVEL |
10644 | OPCODE(0x21DF) |
10645 | { |
10646 | u32 adr, res; |
10647 | u32 src, dst; |
10648 | |
10649 | adr = AREG(7); |
10650 | AREG(7) += 4; |
10651 | PRE_IO |
10652 | READ_LONG_F(adr, res) |
10653 | flag_C = 0; |
10654 | flag_V = 0; |
10655 | flag_NotZ = res; |
10656 | flag_N = res >> 24; |
10657 | FETCH_SWORD(adr); |
10658 | WRITE_LONG_F(adr, res) |
10659 | POST_IO |
10660 | RET(24) |
10661 | } |
10662 | |
10663 | // MOVEL |
10664 | OPCODE(0x23DF) |
10665 | { |
10666 | u32 adr, res; |
10667 | u32 src, dst; |
10668 | |
10669 | adr = AREG(7); |
10670 | AREG(7) += 4; |
10671 | PRE_IO |
10672 | READ_LONG_F(adr, res) |
10673 | flag_C = 0; |
10674 | flag_V = 0; |
10675 | flag_NotZ = res; |
10676 | flag_N = res >> 24; |
10677 | FETCH_LONG(adr); |
10678 | WRITE_LONG_F(adr, res) |
10679 | POST_IO |
10680 | RET(28) |
10681 | } |
10682 | |
10683 | // MOVEL |
10684 | OPCODE(0x2EDF) |
10685 | { |
10686 | u32 adr, res; |
10687 | u32 src, dst; |
10688 | |
10689 | adr = AREG(7); |
10690 | AREG(7) += 4; |
10691 | PRE_IO |
10692 | READ_LONG_F(adr, res) |
10693 | flag_C = 0; |
10694 | flag_V = 0; |
10695 | flag_NotZ = res; |
10696 | flag_N = res >> 24; |
10697 | adr = AREG(7); |
10698 | AREG(7) += 4; |
10699 | WRITE_LONG_F(adr, res) |
10700 | POST_IO |
10701 | RET(20) |
10702 | } |
10703 | |
10704 | // MOVEL |
10705 | OPCODE(0x2F1F) |
10706 | { |
10707 | u32 adr, res; |
10708 | u32 src, dst; |
10709 | |
10710 | adr = AREG(7); |
10711 | AREG(7) += 4; |
10712 | PRE_IO |
10713 | READ_LONG_F(adr, res) |
10714 | flag_C = 0; |
10715 | flag_V = 0; |
10716 | flag_NotZ = res; |
10717 | flag_N = res >> 24; |
10718 | adr = AREG(7) - 4; |
10719 | AREG(7) = adr; |
03e4f2a3 |
10720 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10721 | POST_IO |
10722 | RET(20) |
10723 | } |
10724 | |
10725 | // MOVEL |
10726 | OPCODE(0x2027) |
10727 | { |
10728 | u32 adr, res; |
10729 | u32 src, dst; |
10730 | |
10731 | adr = AREG(7) - 4; |
10732 | AREG(7) = adr; |
10733 | PRE_IO |
10734 | READ_LONG_F(adr, res) |
10735 | flag_C = 0; |
10736 | flag_V = 0; |
10737 | flag_NotZ = res; |
10738 | flag_N = res >> 24; |
10739 | DREGu32((Opcode >> 9) & 7) = res; |
10740 | POST_IO |
10741 | RET(14) |
10742 | } |
10743 | |
10744 | // MOVEL |
10745 | OPCODE(0x20A7) |
10746 | { |
10747 | u32 adr, res; |
10748 | u32 src, dst; |
10749 | |
10750 | adr = AREG(7) - 4; |
10751 | AREG(7) = adr; |
10752 | PRE_IO |
10753 | READ_LONG_F(adr, res) |
10754 | flag_C = 0; |
10755 | flag_V = 0; |
10756 | flag_NotZ = res; |
10757 | flag_N = res >> 24; |
10758 | adr = AREG((Opcode >> 9) & 7); |
10759 | WRITE_LONG_F(adr, res) |
10760 | POST_IO |
10761 | RET(22) |
10762 | } |
10763 | |
10764 | // MOVEL |
10765 | OPCODE(0x20E7) |
10766 | { |
10767 | u32 adr, res; |
10768 | u32 src, dst; |
10769 | |
10770 | adr = AREG(7) - 4; |
10771 | AREG(7) = adr; |
10772 | PRE_IO |
10773 | READ_LONG_F(adr, res) |
10774 | flag_C = 0; |
10775 | flag_V = 0; |
10776 | flag_NotZ = res; |
10777 | flag_N = res >> 24; |
10778 | adr = AREG((Opcode >> 9) & 7); |
10779 | AREG((Opcode >> 9) & 7) += 4; |
10780 | WRITE_LONG_F(adr, res) |
10781 | POST_IO |
10782 | RET(22) |
10783 | } |
10784 | |
10785 | // MOVEL |
10786 | OPCODE(0x2127) |
10787 | { |
10788 | u32 adr, res; |
10789 | u32 src, dst; |
10790 | |
10791 | adr = AREG(7) - 4; |
10792 | AREG(7) = adr; |
10793 | PRE_IO |
10794 | READ_LONG_F(adr, res) |
10795 | flag_C = 0; |
10796 | flag_V = 0; |
10797 | flag_NotZ = res; |
10798 | flag_N = res >> 24; |
10799 | adr = AREG((Opcode >> 9) & 7) - 4; |
10800 | AREG((Opcode >> 9) & 7) = adr; |
80db4442 |
10801 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10802 | POST_IO |
10803 | RET(22) |
10804 | } |
10805 | |
10806 | // MOVEL |
10807 | OPCODE(0x2167) |
10808 | { |
10809 | u32 adr, res; |
10810 | u32 src, dst; |
10811 | |
10812 | adr = AREG(7) - 4; |
10813 | AREG(7) = adr; |
10814 | PRE_IO |
10815 | READ_LONG_F(adr, res) |
10816 | flag_C = 0; |
10817 | flag_V = 0; |
10818 | flag_NotZ = res; |
10819 | flag_N = res >> 24; |
10820 | FETCH_SWORD(adr); |
10821 | adr += AREG((Opcode >> 9) & 7); |
10822 | WRITE_LONG_F(adr, res) |
10823 | POST_IO |
10824 | RET(26) |
10825 | } |
10826 | |
10827 | // MOVEL |
10828 | OPCODE(0x21A7) |
10829 | { |
10830 | u32 adr, res; |
10831 | u32 src, dst; |
10832 | |
10833 | adr = AREG(7) - 4; |
10834 | AREG(7) = adr; |
10835 | PRE_IO |
10836 | READ_LONG_F(adr, res) |
10837 | flag_C = 0; |
10838 | flag_V = 0; |
10839 | flag_NotZ = res; |
10840 | flag_N = res >> 24; |
10841 | adr = AREG((Opcode >> 9) & 7); |
10842 | DECODE_EXT_WORD |
10843 | WRITE_LONG_F(adr, res) |
10844 | POST_IO |
10845 | RET(28) |
10846 | } |
10847 | |
10848 | // MOVEL |
10849 | OPCODE(0x21E7) |
10850 | { |
10851 | u32 adr, res; |
10852 | u32 src, dst; |
10853 | |
10854 | adr = AREG(7) - 4; |
10855 | AREG(7) = adr; |
10856 | PRE_IO |
10857 | READ_LONG_F(adr, res) |
10858 | flag_C = 0; |
10859 | flag_V = 0; |
10860 | flag_NotZ = res; |
10861 | flag_N = res >> 24; |
10862 | FETCH_SWORD(adr); |
10863 | WRITE_LONG_F(adr, res) |
10864 | POST_IO |
10865 | RET(26) |
10866 | } |
10867 | |
10868 | // MOVEL |
10869 | OPCODE(0x23E7) |
10870 | { |
10871 | u32 adr, res; |
10872 | u32 src, dst; |
10873 | |
10874 | adr = AREG(7) - 4; |
10875 | AREG(7) = adr; |
10876 | PRE_IO |
10877 | READ_LONG_F(adr, res) |
10878 | flag_C = 0; |
10879 | flag_V = 0; |
10880 | flag_NotZ = res; |
10881 | flag_N = res >> 24; |
10882 | FETCH_LONG(adr); |
10883 | WRITE_LONG_F(adr, res) |
10884 | POST_IO |
10885 | RET(30) |
10886 | } |
10887 | |
10888 | // MOVEL |
10889 | OPCODE(0x2EE7) |
10890 | { |
10891 | u32 adr, res; |
10892 | u32 src, dst; |
10893 | |
10894 | adr = AREG(7) - 4; |
10895 | AREG(7) = adr; |
10896 | PRE_IO |
10897 | READ_LONG_F(adr, res) |
10898 | flag_C = 0; |
10899 | flag_V = 0; |
10900 | flag_NotZ = res; |
10901 | flag_N = res >> 24; |
10902 | adr = AREG(7); |
10903 | AREG(7) += 4; |
10904 | WRITE_LONG_F(adr, res) |
10905 | POST_IO |
10906 | RET(22) |
10907 | } |
10908 | |
10909 | // MOVEL |
10910 | OPCODE(0x2F27) |
10911 | { |
10912 | u32 adr, res; |
10913 | u32 src, dst; |
10914 | |
10915 | adr = AREG(7) - 4; |
10916 | AREG(7) = adr; |
10917 | PRE_IO |
10918 | READ_LONG_F(adr, res) |
10919 | flag_C = 0; |
10920 | flag_V = 0; |
10921 | flag_NotZ = res; |
10922 | flag_N = res >> 24; |
10923 | adr = AREG(7) - 4; |
10924 | AREG(7) = adr; |
03e4f2a3 |
10925 | WRITE_LONG_DEC_F(adr, res) |
70357ce5 |
10926 | POST_IO |
10927 | RET(22) |
10928 | } |
10929 | |
10930 | // MOVEAL |
10931 | OPCODE(0x2040) |
10932 | { |
10933 | u32 adr, res; |
10934 | u32 src, dst; |
10935 | |
10936 | res = (s32)DREGs32((Opcode >> 0) & 7); |
10937 | AREG((Opcode >> 9) & 7) = res; |
10938 | RET(4) |
10939 | } |
10940 | |
10941 | // MOVEAL |
10942 | OPCODE(0x2048) |
10943 | { |
10944 | u32 adr, res; |
10945 | u32 src, dst; |
10946 | |
10947 | res = (s32)AREGs32((Opcode >> 0) & 7); |
10948 | AREG((Opcode >> 9) & 7) = res; |
10949 | RET(4) |
10950 | } |
10951 | |
10952 | // MOVEAL |
10953 | OPCODE(0x2050) |
10954 | { |
10955 | u32 adr, res; |
10956 | u32 src, dst; |
10957 | |
10958 | adr = AREG((Opcode >> 0) & 7); |
10959 | PRE_IO |
10960 | READSX_LONG_F(adr, res) |
10961 | AREG((Opcode >> 9) & 7) = res; |
10962 | POST_IO |
10963 | RET(12) |
10964 | } |
10965 | |
10966 | // MOVEAL |
10967 | OPCODE(0x2058) |
10968 | { |
10969 | u32 adr, res; |
10970 | u32 src, dst; |
10971 | |
10972 | adr = AREG((Opcode >> 0) & 7); |
10973 | AREG((Opcode >> 0) & 7) += 4; |
10974 | PRE_IO |
10975 | READSX_LONG_F(adr, res) |
10976 | AREG((Opcode >> 9) & 7) = res; |
10977 | POST_IO |
10978 | RET(12) |
10979 | } |
10980 | |
10981 | // MOVEAL |
10982 | OPCODE(0x2060) |
10983 | { |
10984 | u32 adr, res; |
10985 | u32 src, dst; |
10986 | |
10987 | adr = AREG((Opcode >> 0) & 7) - 4; |
10988 | AREG((Opcode >> 0) & 7) = adr; |
10989 | PRE_IO |
10990 | READSX_LONG_F(adr, res) |
10991 | AREG((Opcode >> 9) & 7) = res; |
10992 | POST_IO |
10993 | RET(14) |
10994 | } |
10995 | |
10996 | // MOVEAL |
10997 | OPCODE(0x2068) |
10998 | { |
10999 | u32 adr, res; |
11000 | u32 src, dst; |
11001 | |
11002 | FETCH_SWORD(adr); |
11003 | adr += AREG((Opcode >> 0) & 7); |
11004 | PRE_IO |
11005 | READSX_LONG_F(adr, res) |
11006 | AREG((Opcode >> 9) & 7) = res; |
11007 | POST_IO |
11008 | RET(16) |
11009 | } |
11010 | |
11011 | // MOVEAL |
11012 | OPCODE(0x2070) |
11013 | { |
11014 | u32 adr, res; |
11015 | u32 src, dst; |
11016 | |
11017 | adr = AREG((Opcode >> 0) & 7); |
11018 | DECODE_EXT_WORD |
11019 | PRE_IO |
11020 | READSX_LONG_F(adr, res) |
11021 | AREG((Opcode >> 9) & 7) = res; |
11022 | POST_IO |
11023 | RET(18) |
11024 | } |
11025 | |
11026 | // MOVEAL |
11027 | OPCODE(0x2078) |
11028 | { |
11029 | u32 adr, res; |
11030 | u32 src, dst; |
11031 | |
11032 | FETCH_SWORD(adr); |
11033 | PRE_IO |
11034 | READSX_LONG_F(adr, res) |
11035 | AREG((Opcode >> 9) & 7) = res; |
11036 | POST_IO |
11037 | RET(16) |
11038 | } |
11039 | |
11040 | // MOVEAL |
11041 | OPCODE(0x2079) |
11042 | { |
11043 | u32 adr, res; |
11044 | u32 src, dst; |
11045 | |
11046 | FETCH_LONG(adr); |
11047 | PRE_IO |
11048 | READSX_LONG_F(adr, res) |
11049 | AREG((Opcode >> 9) & 7) = res; |
11050 | POST_IO |
11051 | RET(20) |
11052 | } |
11053 | |
11054 | // MOVEAL |
11055 | OPCODE(0x207A) |
11056 | { |
11057 | u32 adr, res; |
11058 | u32 src, dst; |
11059 | |
be26eb23 |
11060 | adr = GET_SWORD + GET_PC; |
70357ce5 |
11061 | PC++; |
11062 | PRE_IO |
11063 | READSX_LONG_F(adr, res) |
11064 | AREG((Opcode >> 9) & 7) = res; |
11065 | POST_IO |
11066 | RET(16) |
11067 | } |
11068 | |
11069 | // MOVEAL |
11070 | OPCODE(0x207B) |
11071 | { |
11072 | u32 adr, res; |
11073 | u32 src, dst; |
11074 | |
be26eb23 |
11075 | adr = GET_PC; |
70357ce5 |
11076 | DECODE_EXT_WORD |
11077 | PRE_IO |
11078 | READSX_LONG_F(adr, res) |
11079 | AREG((Opcode >> 9) & 7) = res; |
11080 | POST_IO |
11081 | RET(18) |
11082 | } |
11083 | |
11084 | // MOVEAL |
11085 | OPCODE(0x207C) |
11086 | { |
11087 | u32 adr, res; |
11088 | u32 src, dst; |
11089 | |
11090 | FETCH_LONG(res); |
11091 | AREG((Opcode >> 9) & 7) = res; |
11092 | RET(12) |
11093 | } |
11094 | |
11095 | // MOVEAL |
11096 | OPCODE(0x205F) |
11097 | { |
11098 | u32 adr, res; |
11099 | u32 src, dst; |
11100 | |
11101 | adr = AREG(7); |
11102 | AREG(7) += 4; |
11103 | PRE_IO |
11104 | READSX_LONG_F(adr, res) |
11105 | AREG((Opcode >> 9) & 7) = res; |
11106 | POST_IO |
11107 | RET(12) |
11108 | } |
11109 | |
11110 | // MOVEAL |
11111 | OPCODE(0x2067) |
11112 | { |
11113 | u32 adr, res; |
11114 | u32 src, dst; |
11115 | |
11116 | adr = AREG(7) - 4; |
11117 | AREG(7) = adr; |
11118 | PRE_IO |
11119 | READSX_LONG_F(adr, res) |
11120 | AREG((Opcode >> 9) & 7) = res; |
11121 | POST_IO |
11122 | RET(14) |
11123 | } |
11124 | |
11125 | // MOVEW |
11126 | OPCODE(0x3000) |
11127 | { |
11128 | u32 adr, res; |
11129 | u32 src, dst; |
11130 | |
11131 | res = DREGu16((Opcode >> 0) & 7); |
11132 | flag_C = 0; |
11133 | flag_V = 0; |
11134 | flag_NotZ = res; |
11135 | flag_N = res >> 8; |
11136 | DREGu16((Opcode >> 9) & 7) = res; |
11137 | RET(4) |
11138 | } |
11139 | |
11140 | // MOVEW |
11141 | OPCODE(0x3080) |
11142 | { |
11143 | u32 adr, res; |
11144 | u32 src, dst; |
11145 | |
11146 | res = DREGu16((Opcode >> 0) & 7); |
11147 | flag_C = 0; |
11148 | flag_V = 0; |
11149 | flag_NotZ = res; |
11150 | flag_N = res >> 8; |
11151 | adr = AREG((Opcode >> 9) & 7); |
11152 | PRE_IO |
11153 | WRITE_WORD_F(adr, res) |
11154 | POST_IO |
11155 | RET(8) |
11156 | } |
11157 | |
11158 | // MOVEW |
11159 | OPCODE(0x30C0) |
11160 | { |
11161 | u32 adr, res; |
11162 | u32 src, dst; |
11163 | |
11164 | res = DREGu16((Opcode >> 0) & 7); |
11165 | flag_C = 0; |
11166 | flag_V = 0; |
11167 | flag_NotZ = res; |
11168 | flag_N = res >> 8; |
11169 | adr = AREG((Opcode >> 9) & 7); |
11170 | AREG((Opcode >> 9) & 7) += 2; |
11171 | PRE_IO |
11172 | WRITE_WORD_F(adr, res) |
11173 | POST_IO |
11174 | RET(8) |
11175 | } |
11176 | |
11177 | // MOVEW |
11178 | OPCODE(0x3100) |
11179 | { |
11180 | u32 adr, res; |
11181 | u32 src, dst; |
11182 | |
11183 | res = DREGu16((Opcode >> 0) & 7); |
11184 | flag_C = 0; |
11185 | flag_V = 0; |
11186 | flag_NotZ = res; |
11187 | flag_N = res >> 8; |
11188 | adr = AREG((Opcode >> 9) & 7) - 2; |
11189 | AREG((Opcode >> 9) & 7) = adr; |
11190 | PRE_IO |
11191 | WRITE_WORD_F(adr, res) |
11192 | POST_IO |
11193 | RET(8) |
11194 | } |
11195 | |
11196 | // MOVEW |
11197 | OPCODE(0x3140) |
11198 | { |
11199 | u32 adr, res; |
11200 | u32 src, dst; |
11201 | |
11202 | res = DREGu16((Opcode >> 0) & 7); |
11203 | flag_C = 0; |
11204 | flag_V = 0; |
11205 | flag_NotZ = res; |
11206 | flag_N = res >> 8; |
11207 | FETCH_SWORD(adr); |
11208 | adr += AREG((Opcode >> 9) & 7); |
11209 | PRE_IO |
11210 | WRITE_WORD_F(adr, res) |
11211 | POST_IO |
11212 | RET(12) |
11213 | } |
11214 | |
11215 | // MOVEW |
11216 | OPCODE(0x3180) |
11217 | { |
11218 | u32 adr, res; |
11219 | u32 src, dst; |
11220 | |
11221 | res = DREGu16((Opcode >> 0) & 7); |
11222 | flag_C = 0; |
11223 | flag_V = 0; |
11224 | flag_NotZ = res; |
11225 | flag_N = res >> 8; |
11226 | adr = AREG((Opcode >> 9) & 7); |
11227 | DECODE_EXT_WORD |
11228 | PRE_IO |
11229 | WRITE_WORD_F(adr, res) |
11230 | POST_IO |
11231 | RET(14) |
11232 | } |
11233 | |
11234 | // MOVEW |
11235 | OPCODE(0x31C0) |
11236 | { |
11237 | u32 adr, res; |
11238 | u32 src, dst; |
11239 | |
11240 | res = DREGu16((Opcode >> 0) & 7); |
11241 | flag_C = 0; |
11242 | flag_V = 0; |
11243 | flag_NotZ = res; |
11244 | flag_N = res >> 8; |
11245 | FETCH_SWORD(adr); |
11246 | PRE_IO |
11247 | WRITE_WORD_F(adr, res) |
11248 | POST_IO |
11249 | RET(12) |
11250 | } |
11251 | |
11252 | // MOVEW |
11253 | OPCODE(0x33C0) |
11254 | { |
11255 | u32 adr, res; |
11256 | u32 src, dst; |
11257 | |
11258 | res = DREGu16((Opcode >> 0) & 7); |
11259 | flag_C = 0; |
11260 | flag_V = 0; |
11261 | flag_NotZ = res; |
11262 | flag_N = res >> 8; |
11263 | FETCH_LONG(adr); |
11264 | PRE_IO |
11265 | WRITE_WORD_F(adr, res) |
11266 | POST_IO |
11267 | RET(16) |
11268 | } |
11269 | |
11270 | // MOVEW |
11271 | OPCODE(0x3EC0) |
11272 | { |
11273 | u32 adr, res; |
11274 | u32 src, dst; |
11275 | |
11276 | res = DREGu16((Opcode >> 0) & 7); |
11277 | flag_C = 0; |
11278 | flag_V = 0; |
11279 | flag_NotZ = res; |
11280 | flag_N = res >> 8; |
11281 | adr = AREG(7); |
11282 | AREG(7) += 2; |
11283 | PRE_IO |
11284 | WRITE_WORD_F(adr, res) |
11285 | POST_IO |
11286 | RET(8) |
11287 | } |
11288 | |
11289 | // MOVEW |
11290 | OPCODE(0x3F00) |
11291 | { |
11292 | u32 adr, res; |
11293 | u32 src, dst; |
11294 | |
11295 | res = DREGu16((Opcode >> 0) & 7); |
11296 | flag_C = 0; |
11297 | flag_V = 0; |
11298 | flag_NotZ = res; |
11299 | flag_N = res >> 8; |
11300 | adr = AREG(7) - 2; |
11301 | AREG(7) = adr; |
11302 | PRE_IO |
11303 | WRITE_WORD_F(adr, res) |
11304 | POST_IO |
11305 | RET(8) |
11306 | } |
11307 | |
11308 | // MOVEW |
11309 | OPCODE(0x3008) |
11310 | { |
11311 | u32 adr, res; |
11312 | u32 src, dst; |
11313 | |
11314 | res = AREGu16((Opcode >> 0) & 7); |
11315 | flag_C = 0; |
11316 | flag_V = 0; |
11317 | flag_NotZ = res; |
11318 | flag_N = res >> 8; |
11319 | DREGu16((Opcode >> 9) & 7) = res; |
11320 | RET(4) |
11321 | } |
11322 | |
11323 | // MOVEW |
11324 | OPCODE(0x3088) |
11325 | { |
11326 | u32 adr, res; |
11327 | u32 src, dst; |
11328 | |
11329 | res = AREGu16((Opcode >> 0) & 7); |
11330 | flag_C = 0; |
11331 | flag_V = 0; |
11332 | flag_NotZ = res; |
11333 | flag_N = res >> 8; |
11334 | adr = AREG((Opcode >> 9) & 7); |
11335 | PRE_IO |
11336 | WRITE_WORD_F(adr, res) |
11337 | POST_IO |
11338 | RET(8) |
11339 | } |
11340 | |
11341 | // MOVEW |
11342 | OPCODE(0x30C8) |
11343 | { |
11344 | u32 adr, res; |
11345 | u32 src, dst; |
11346 | |
11347 | res = AREGu16((Opcode >> 0) & 7); |
11348 | flag_C = 0; |
11349 | flag_V = 0; |
11350 | flag_NotZ = res; |
11351 | flag_N = res >> 8; |
11352 | adr = AREG((Opcode >> 9) & 7); |
11353 | AREG((Opcode >> 9) & 7) += 2; |
11354 | PRE_IO |
11355 | WRITE_WORD_F(adr, res) |
11356 | POST_IO |
11357 | RET(8) |
11358 | } |
11359 | |
11360 | // MOVEW |
11361 | OPCODE(0x3108) |
11362 | { |
11363 | u32 adr, res; |
11364 | u32 src, dst; |
11365 | |
11366 | res = AREGu16((Opcode >> 0) & 7); |
11367 | flag_C = 0; |
11368 | flag_V = 0; |
11369 | flag_NotZ = res; |
11370 | flag_N = res >> 8; |
11371 | adr = AREG((Opcode >> 9) & 7) - 2; |
11372 | AREG((Opcode >> 9) & 7) = adr; |
11373 | PRE_IO |
11374 | WRITE_WORD_F(adr, res) |
11375 | POST_IO |
11376 | RET(8) |
11377 | } |
11378 | |
11379 | // MOVEW |
11380 | OPCODE(0x3148) |
11381 | { |
11382 | u32 adr, res; |
11383 | u32 src, dst; |
11384 | |
11385 | res = AREGu16((Opcode >> 0) & 7); |
11386 | flag_C = 0; |
11387 | flag_V = 0; |
11388 | flag_NotZ = res; |
11389 | flag_N = res >> 8; |
11390 | FETCH_SWORD(adr); |
11391 | adr += AREG((Opcode >> 9) & 7); |
11392 | PRE_IO |
11393 | WRITE_WORD_F(adr, res) |
11394 | POST_IO |
11395 | RET(12) |
11396 | } |
11397 | |
11398 | // MOVEW |
11399 | OPCODE(0x3188) |
11400 | { |
11401 | u32 adr, res; |
11402 | u32 src, dst; |
11403 | |
11404 | res = AREGu16((Opcode >> 0) & 7); |
11405 | flag_C = 0; |
11406 | flag_V = 0; |
11407 | flag_NotZ = res; |
11408 | flag_N = res >> 8; |
11409 | adr = AREG((Opcode >> 9) & 7); |
11410 | DECODE_EXT_WORD |
11411 | PRE_IO |
11412 | WRITE_WORD_F(adr, res) |
11413 | POST_IO |
11414 | RET(14) |
11415 | } |
11416 | |
11417 | // MOVEW |
11418 | OPCODE(0x31C8) |
11419 | { |
11420 | u32 adr, res; |
11421 | u32 src, dst; |
11422 | |
11423 | res = AREGu16((Opcode >> 0) & 7); |
11424 | flag_C = 0; |
11425 | flag_V = 0; |
11426 | flag_NotZ = res; |
11427 | flag_N = res >> 8; |
11428 | FETCH_SWORD(adr); |
11429 | PRE_IO |
11430 | WRITE_WORD_F(adr, res) |
11431 | POST_IO |
11432 | RET(12) |
11433 | } |
11434 | |
11435 | // MOVEW |
11436 | OPCODE(0x33C8) |
11437 | { |
11438 | u32 adr, res; |
11439 | u32 src, dst; |
11440 | |
11441 | res = AREGu16((Opcode >> 0) & 7); |
11442 | flag_C = 0; |
11443 | flag_V = 0; |
11444 | flag_NotZ = res; |
11445 | flag_N = res >> 8; |
11446 | FETCH_LONG(adr); |
11447 | PRE_IO |
11448 | WRITE_WORD_F(adr, res) |
11449 | POST_IO |
11450 | RET(16) |
11451 | } |
11452 | |
11453 | // MOVEW |
11454 | OPCODE(0x3EC8) |
11455 | { |
11456 | u32 adr, res; |
11457 | u32 src, dst; |
11458 | |
11459 | res = AREGu16((Opcode >> 0) & 7); |
11460 | flag_C = 0; |
11461 | flag_V = 0; |
11462 | flag_NotZ = res; |
11463 | flag_N = res >> 8; |
11464 | adr = AREG(7); |
11465 | AREG(7) += 2; |
11466 | PRE_IO |
11467 | WRITE_WORD_F(adr, res) |
11468 | POST_IO |
11469 | RET(8) |
11470 | } |
11471 | |
11472 | // MOVEW |
11473 | OPCODE(0x3F08) |
11474 | { |
11475 | u32 adr, res; |
11476 | u32 src, dst; |
11477 | |
11478 | res = AREGu16((Opcode >> 0) & 7); |
11479 | flag_C = 0; |
11480 | flag_V = 0; |
11481 | flag_NotZ = res; |
11482 | flag_N = res >> 8; |
11483 | adr = AREG(7) - 2; |
11484 | AREG(7) = adr; |
11485 | PRE_IO |
11486 | WRITE_WORD_F(adr, res) |
11487 | POST_IO |
11488 | RET(8) |
11489 | } |
11490 | |
11491 | // MOVEW |
11492 | OPCODE(0x3010) |
11493 | { |
11494 | u32 adr, res; |
11495 | u32 src, dst; |
11496 | |
11497 | adr = AREG((Opcode >> 0) & 7); |
11498 | PRE_IO |
11499 | READ_WORD_F(adr, res) |
11500 | flag_C = 0; |
11501 | flag_V = 0; |
11502 | flag_NotZ = res; |
11503 | flag_N = res >> 8; |
11504 | DREGu16((Opcode >> 9) & 7) = res; |
11505 | POST_IO |
11506 | RET(8) |
11507 | } |
11508 | |
11509 | // MOVEW |
11510 | OPCODE(0x3090) |
11511 | { |
11512 | u32 adr, res; |
11513 | u32 src, dst; |
11514 | |
11515 | adr = AREG((Opcode >> 0) & 7); |
11516 | PRE_IO |
11517 | READ_WORD_F(adr, res) |
11518 | flag_C = 0; |
11519 | flag_V = 0; |
11520 | flag_NotZ = res; |
11521 | flag_N = res >> 8; |
11522 | adr = AREG((Opcode >> 9) & 7); |
11523 | WRITE_WORD_F(adr, res) |
11524 | POST_IO |
11525 | RET(12) |
11526 | } |
11527 | |
11528 | // MOVEW |
11529 | OPCODE(0x30D0) |
11530 | { |
11531 | u32 adr, res; |
11532 | u32 src, dst; |
11533 | |
11534 | adr = AREG((Opcode >> 0) & 7); |
11535 | PRE_IO |
11536 | READ_WORD_F(adr, res) |
11537 | flag_C = 0; |
11538 | flag_V = 0; |
11539 | flag_NotZ = res; |
11540 | flag_N = res >> 8; |
11541 | adr = AREG((Opcode >> 9) & 7); |
11542 | AREG((Opcode >> 9) & 7) += 2; |
11543 | WRITE_WORD_F(adr, res) |
11544 | POST_IO |
11545 | RET(12) |
11546 | } |
11547 | |
11548 | // MOVEW |
11549 | OPCODE(0x3110) |
11550 | { |
11551 | u32 adr, res; |
11552 | u32 src, dst; |
11553 | |
11554 | adr = AREG((Opcode >> 0) & 7); |
11555 | PRE_IO |
11556 | READ_WORD_F(adr, res) |
11557 | flag_C = 0; |
11558 | flag_V = 0; |
11559 | flag_NotZ = res; |
11560 | flag_N = res >> 8; |
11561 | adr = AREG((Opcode >> 9) & 7) - 2; |
11562 | AREG((Opcode >> 9) & 7) = adr; |
11563 | WRITE_WORD_F(adr, res) |
11564 | POST_IO |
11565 | RET(12) |
11566 | } |
11567 | |
11568 | // MOVEW |
11569 | OPCODE(0x3150) |
11570 | { |
11571 | u32 adr, res; |
11572 | u32 src, dst; |
11573 | |
11574 | adr = AREG((Opcode >> 0) & 7); |
11575 | PRE_IO |
11576 | READ_WORD_F(adr, res) |
11577 | flag_C = 0; |
11578 | flag_V = 0; |
11579 | flag_NotZ = res; |
11580 | flag_N = res >> 8; |
11581 | FETCH_SWORD(adr); |
11582 | adr += AREG((Opcode >> 9) & 7); |
11583 | WRITE_WORD_F(adr, res) |
11584 | POST_IO |
11585 | RET(16) |
11586 | } |
11587 | |
11588 | // MOVEW |
11589 | OPCODE(0x3190) |
11590 | { |
11591 | u32 adr, res; |
11592 | u32 src, dst; |
11593 | |
11594 | adr = AREG((Opcode >> 0) & 7); |
11595 | PRE_IO |
11596 | READ_WORD_F(adr, res) |
11597 | flag_C = 0; |
11598 | flag_V = 0; |
11599 | flag_NotZ = res; |
11600 | flag_N = res >> 8; |
11601 | adr = AREG((Opcode >> 9) & 7); |
11602 | DECODE_EXT_WORD |
11603 | WRITE_WORD_F(adr, res) |
11604 | POST_IO |
11605 | RET(18) |
11606 | } |
11607 | |
11608 | // MOVEW |
11609 | OPCODE(0x31D0) |
11610 | { |
11611 | u32 adr, res; |
11612 | u32 src, dst; |
11613 | |
11614 | adr = AREG((Opcode >> 0) & 7); |
11615 | PRE_IO |
11616 | READ_WORD_F(adr, res) |
11617 | flag_C = 0; |
11618 | flag_V = 0; |
11619 | flag_NotZ = res; |
11620 | flag_N = res >> 8; |
11621 | FETCH_SWORD(adr); |
11622 | WRITE_WORD_F(adr, res) |
11623 | POST_IO |
11624 | RET(16) |
11625 | } |
11626 | |
11627 | // MOVEW |
11628 | OPCODE(0x33D0) |
11629 | { |
11630 | u32 adr, res; |
11631 | u32 src, dst; |
11632 | |
11633 | adr = AREG((Opcode >> 0) & 7); |
11634 | PRE_IO |
11635 | READ_WORD_F(adr, res) |
11636 | flag_C = 0; |
11637 | flag_V = 0; |
11638 | flag_NotZ = res; |
11639 | flag_N = res >> 8; |
11640 | FETCH_LONG(adr); |
11641 | WRITE_WORD_F(adr, res) |
11642 | POST_IO |
11643 | RET(20) |
11644 | } |
11645 | |
11646 | // MOVEW |
11647 | OPCODE(0x3ED0) |
11648 | { |
11649 | u32 adr, res; |
11650 | u32 src, dst; |
11651 | |
11652 | adr = AREG((Opcode >> 0) & 7); |
11653 | PRE_IO |
11654 | READ_WORD_F(adr, res) |
11655 | flag_C = 0; |
11656 | flag_V = 0; |
11657 | flag_NotZ = res; |
11658 | flag_N = res >> 8; |
11659 | adr = AREG(7); |
11660 | AREG(7) += 2; |
11661 | WRITE_WORD_F(adr, res) |
11662 | POST_IO |
11663 | RET(12) |
11664 | } |
11665 | |
11666 | // MOVEW |
11667 | OPCODE(0x3F10) |
11668 | { |
11669 | u32 adr, res; |
11670 | u32 src, dst; |
11671 | |
11672 | adr = AREG((Opcode >> 0) & 7); |
11673 | PRE_IO |
11674 | READ_WORD_F(adr, res) |
11675 | flag_C = 0; |
11676 | flag_V = 0; |
11677 | flag_NotZ = res; |
11678 | flag_N = res >> 8; |
11679 | adr = AREG(7) - 2; |
11680 | AREG(7) = adr; |
11681 | WRITE_WORD_F(adr, res) |
11682 | POST_IO |
11683 | RET(12) |
11684 | } |
11685 | |
11686 | // MOVEW |
11687 | OPCODE(0x3018) |
11688 | { |
11689 | u32 adr, res; |
11690 | u32 src, dst; |
11691 | |
11692 | adr = AREG((Opcode >> 0) & 7); |
11693 | AREG((Opcode >> 0) & 7) += 2; |
11694 | PRE_IO |
11695 | READ_WORD_F(adr, res) |
11696 | flag_C = 0; |
11697 | flag_V = 0; |
11698 | flag_NotZ = res; |
11699 | flag_N = res >> 8; |
11700 | DREGu16((Opcode >> 9) & 7) = res; |
11701 | POST_IO |
11702 | RET(8) |
11703 | } |
11704 | |
11705 | // MOVEW |
11706 | OPCODE(0x3098) |
11707 | { |
11708 | u32 adr, res; |
11709 | u32 src, dst; |
11710 | |
11711 | adr = AREG((Opcode >> 0) & 7); |
11712 | AREG((Opcode >> 0) & 7) += 2; |
11713 | PRE_IO |
11714 | READ_WORD_F(adr, res) |
11715 | flag_C = 0; |
11716 | flag_V = 0; |
11717 | flag_NotZ = res; |
11718 | flag_N = res >> 8; |
11719 | adr = AREG((Opcode >> 9) & 7); |
11720 | WRITE_WORD_F(adr, res) |
11721 | POST_IO |
11722 | RET(12) |
11723 | } |
11724 | |
11725 | // MOVEW |
11726 | OPCODE(0x30D8) |
11727 | { |
11728 | u32 adr, res; |
11729 | u32 src, dst; |
11730 | |
11731 | adr = AREG((Opcode >> 0) & 7); |
11732 | AREG((Opcode >> 0) & 7) += 2; |
11733 | PRE_IO |
11734 | READ_WORD_F(adr, res) |
11735 | flag_C = 0; |
11736 | flag_V = 0; |
11737 | flag_NotZ = res; |
11738 | flag_N = res >> 8; |
11739 | adr = AREG((Opcode >> 9) & 7); |
11740 | AREG((Opcode >> 9) & 7) += 2; |
11741 | WRITE_WORD_F(adr, res) |
11742 | POST_IO |
11743 | RET(12) |
11744 | } |
11745 | |
11746 | // MOVEW |
11747 | OPCODE(0x3118) |
11748 | { |
11749 | u32 adr, res; |
11750 | u32 src, dst; |
11751 | |
11752 | adr = AREG((Opcode >> 0) & 7); |
11753 | AREG((Opcode >> 0) & 7) += 2; |
11754 | PRE_IO |
11755 | READ_WORD_F(adr, res) |
11756 | flag_C = 0; |
11757 | flag_V = 0; |
11758 | flag_NotZ = res; |
11759 | flag_N = res >> 8; |
11760 | adr = AREG((Opcode >> 9) & 7) - 2; |
11761 | AREG((Opcode >> 9) & 7) = adr; |
11762 | WRITE_WORD_F(adr, res) |
11763 | POST_IO |
11764 | RET(12) |
11765 | } |
11766 | |
11767 | // MOVEW |
11768 | OPCODE(0x3158) |
11769 | { |
11770 | u32 adr, res; |
11771 | u32 src, dst; |
11772 | |
11773 | adr = AREG((Opcode >> 0) & 7); |
11774 | AREG((Opcode >> 0) & 7) += 2; |
11775 | PRE_IO |
11776 | READ_WORD_F(adr, res) |
11777 | flag_C = 0; |
11778 | flag_V = 0; |
11779 | flag_NotZ = res; |
11780 | flag_N = res >> 8; |
11781 | FETCH_SWORD(adr); |
11782 | adr += AREG((Opcode >> 9) & 7); |
11783 | WRITE_WORD_F(adr, res) |
11784 | POST_IO |
11785 | RET(16) |
11786 | } |
11787 | |
11788 | // MOVEW |
11789 | OPCODE(0x3198) |
11790 | { |
11791 | u32 adr, res; |
11792 | u32 src, dst; |
11793 | |
11794 | adr = AREG((Opcode >> 0) & 7); |
11795 | AREG((Opcode >> 0) & 7) += 2; |
11796 | PRE_IO |
11797 | READ_WORD_F(adr, res) |
11798 | flag_C = 0; |
11799 | flag_V = 0; |
11800 | flag_NotZ = res; |
11801 | flag_N = res >> 8; |
11802 | adr = AREG((Opcode >> 9) & 7); |
11803 | DECODE_EXT_WORD |
11804 | WRITE_WORD_F(adr, res) |
11805 | POST_IO |
11806 | RET(18) |
11807 | } |
11808 | |
11809 | // MOVEW |
11810 | OPCODE(0x31D8) |
11811 | { |
11812 | u32 adr, res; |
11813 | u32 src, dst; |
11814 | |
11815 | adr = AREG((Opcode >> 0) & 7); |
11816 | AREG((Opcode >> 0) & 7) += 2; |
11817 | PRE_IO |
11818 | READ_WORD_F(adr, res) |
11819 | flag_C = 0; |
11820 | flag_V = 0; |
11821 | flag_NotZ = res; |
11822 | flag_N = res >> 8; |
11823 | FETCH_SWORD(adr); |
11824 | WRITE_WORD_F(adr, res) |
11825 | POST_IO |
11826 | RET(16) |
11827 | } |
11828 | |
11829 | // MOVEW |
11830 | OPCODE(0x33D8) |
11831 | { |
11832 | u32 adr, res; |
11833 | u32 src, dst; |
11834 | |
11835 | adr = AREG((Opcode >> 0) & 7); |
11836 | AREG((Opcode >> 0) & 7) += 2; |
11837 | PRE_IO |
11838 | READ_WORD_F(adr, res) |
11839 | flag_C = 0; |
11840 | flag_V = 0; |
11841 | flag_NotZ = res; |
11842 | flag_N = res >> 8; |
11843 | FETCH_LONG(adr); |
11844 | WRITE_WORD_F(adr, res) |
11845 | POST_IO |
11846 | RET(20) |
11847 | } |
11848 | |
11849 | // MOVEW |
11850 | OPCODE(0x3ED8) |
11851 | { |
11852 | u32 adr, res; |
11853 | u32 src, dst; |
11854 | |
11855 | adr = AREG((Opcode >> 0) & 7); |
11856 | AREG((Opcode >> 0) & 7) += 2; |
11857 | PRE_IO |
11858 | READ_WORD_F(adr, res) |
11859 | flag_C = 0; |
11860 | flag_V = 0; |
11861 | flag_NotZ = res; |
11862 | flag_N = res >> 8; |
11863 | adr = AREG(7); |
11864 | AREG(7) += 2; |
11865 | WRITE_WORD_F(adr, res) |
11866 | POST_IO |
11867 | RET(12) |
11868 | } |
11869 | |
11870 | // MOVEW |
11871 | OPCODE(0x3F18) |
11872 | { |
11873 | u32 adr, res; |
11874 | u32 src, dst; |
11875 | |
11876 | adr = AREG((Opcode >> 0) & 7); |
11877 | AREG((Opcode >> 0) & 7) += 2; |
11878 | PRE_IO |
11879 | READ_WORD_F(adr, res) |
11880 | flag_C = 0; |
11881 | flag_V = 0; |
11882 | flag_NotZ = res; |
11883 | flag_N = res >> 8; |
11884 | adr = AREG(7) - 2; |
11885 | AREG(7) = adr; |
11886 | WRITE_WORD_F(adr, res) |
11887 | POST_IO |
11888 | RET(12) |
11889 | } |
11890 | |
11891 | // MOVEW |
11892 | OPCODE(0x3020) |
11893 | { |
11894 | u32 adr, res; |
11895 | u32 src, dst; |
11896 | |
11897 | adr = AREG((Opcode >> 0) & 7) - 2; |
11898 | AREG((Opcode >> 0) & 7) = adr; |
11899 | PRE_IO |
11900 | READ_WORD_F(adr, res) |
11901 | flag_C = 0; |
11902 | flag_V = 0; |
11903 | flag_NotZ = res; |
11904 | flag_N = res >> 8; |
11905 | DREGu16((Opcode >> 9) & 7) = res; |
11906 | POST_IO |
11907 | RET(10) |
11908 | } |
11909 | |
11910 | // MOVEW |
11911 | OPCODE(0x30A0) |
11912 | { |
11913 | u32 adr, res; |
11914 | u32 src, dst; |
11915 | |
11916 | adr = AREG((Opcode >> 0) & 7) - 2; |
11917 | AREG((Opcode >> 0) & 7) = adr; |
11918 | PRE_IO |
11919 | READ_WORD_F(adr, res) |
11920 | flag_C = 0; |
11921 | flag_V = 0; |
11922 | flag_NotZ = res; |
11923 | flag_N = res >> 8; |
11924 | adr = AREG((Opcode >> 9) & 7); |
11925 | WRITE_WORD_F(adr, res) |
11926 | POST_IO |
11927 | RET(14) |
11928 | } |
11929 | |
11930 | // MOVEW |
11931 | OPCODE(0x30E0) |
11932 | { |
11933 | u32 adr, res; |
11934 | u32 src, dst; |
11935 | |
11936 | adr = AREG((Opcode >> 0) & 7) - 2; |
11937 | AREG((Opcode >> 0) & 7) = adr; |
11938 | PRE_IO |
11939 | READ_WORD_F(adr, res) |
11940 | flag_C = 0; |
11941 | flag_V = 0; |
11942 | flag_NotZ = res; |
11943 | flag_N = res >> 8; |
11944 | adr = AREG((Opcode >> 9) & 7); |
11945 | AREG((Opcode >> 9) & 7) += 2; |
11946 | WRITE_WORD_F(adr, res) |
11947 | POST_IO |
11948 | RET(14) |
11949 | } |
11950 | |
11951 | // MOVEW |
11952 | OPCODE(0x3120) |
11953 | { |
11954 | u32 adr, res; |
11955 | u32 src, dst; |
11956 | |
11957 | adr = AREG((Opcode >> 0) & 7) - 2; |
11958 | AREG((Opcode >> 0) & 7) = adr; |
11959 | PRE_IO |
11960 | READ_WORD_F(adr, res) |
11961 | flag_C = 0; |
11962 | flag_V = 0; |
11963 | flag_NotZ = res; |
11964 | flag_N = res >> 8; |
11965 | adr = AREG((Opcode >> 9) & 7) - 2; |
11966 | AREG((Opcode >> 9) & 7) = adr; |
11967 | WRITE_WORD_F(adr, res) |
11968 | POST_IO |
11969 | RET(14) |
11970 | } |
11971 | |
11972 | // MOVEW |
11973 | OPCODE(0x3160) |
11974 | { |
11975 | u32 adr, res; |
11976 | u32 src, dst; |
11977 | |
11978 | adr = AREG((Opcode >> 0) & 7) - 2; |
11979 | AREG((Opcode >> 0) & 7) = adr; |
11980 | PRE_IO |
11981 | READ_WORD_F(adr, res) |
11982 | flag_C = 0; |
11983 | flag_V = 0; |
11984 | flag_NotZ = res; |
11985 | flag_N = res >> 8; |
11986 | FETCH_SWORD(adr); |
11987 | adr += AREG((Opcode >> 9) & 7); |
11988 | WRITE_WORD_F(adr, res) |
11989 | POST_IO |
11990 | RET(18) |
11991 | } |
11992 | |
11993 | // MOVEW |
11994 | OPCODE(0x31A0) |
11995 | { |
11996 | u32 adr, res; |
11997 | u32 src, dst; |
11998 | |
11999 | adr = AREG((Opcode >> 0) & 7) - 2; |
12000 | AREG((Opcode >> 0) & 7) = adr; |
12001 | PRE_IO |
12002 | READ_WORD_F(adr, res) |
12003 | flag_C = 0; |
12004 | flag_V = 0; |
12005 | flag_NotZ = res; |
12006 | flag_N = res >> 8; |
12007 | adr = AREG((Opcode >> 9) & 7); |
12008 | DECODE_EXT_WORD |
12009 | WRITE_WORD_F(adr, res) |
12010 | POST_IO |
12011 | RET(20) |
12012 | } |
12013 | |
12014 | // MOVEW |
12015 | OPCODE(0x31E0) |
12016 | { |
12017 | u32 adr, res; |
12018 | u32 src, dst; |
12019 | |
12020 | adr = AREG((Opcode >> 0) & 7) - 2; |
12021 | AREG((Opcode >> 0) & 7) = adr; |
12022 | PRE_IO |
12023 | READ_WORD_F(adr, res) |
12024 | flag_C = 0; |
12025 | flag_V = 0; |
12026 | flag_NotZ = res; |
12027 | flag_N = res >> 8; |
12028 | FETCH_SWORD(adr); |
12029 | WRITE_WORD_F(adr, res) |
12030 | POST_IO |
12031 | RET(18) |
12032 | } |
12033 | |
12034 | // MOVEW |
12035 | OPCODE(0x33E0) |
12036 | { |
12037 | u32 adr, res; |
12038 | u32 src, dst; |
12039 | |
12040 | adr = AREG((Opcode >> 0) & 7) - 2; |
12041 | AREG((Opcode >> 0) & 7) = adr; |
12042 | PRE_IO |
12043 | READ_WORD_F(adr, res) |
12044 | flag_C = 0; |
12045 | flag_V = 0; |
12046 | flag_NotZ = res; |
12047 | flag_N = res >> 8; |
12048 | FETCH_LONG(adr); |
12049 | WRITE_WORD_F(adr, res) |
12050 | POST_IO |
12051 | RET(22) |
12052 | } |
12053 | |
12054 | // MOVEW |
12055 | OPCODE(0x3EE0) |
12056 | { |
12057 | u32 adr, res; |
12058 | u32 src, dst; |
12059 | |
12060 | adr = AREG((Opcode >> 0) & 7) - 2; |
12061 | AREG((Opcode >> 0) & 7) = adr; |
12062 | PRE_IO |
12063 | READ_WORD_F(adr, res) |
12064 | flag_C = 0; |
12065 | flag_V = 0; |
12066 | flag_NotZ = res; |
12067 | flag_N = res >> 8; |
12068 | adr = AREG(7); |
12069 | AREG(7) += 2; |
12070 | WRITE_WORD_F(adr, res) |
12071 | POST_IO |
12072 | RET(14) |
12073 | } |
12074 | |
12075 | // MOVEW |
12076 | OPCODE(0x3F20) |
12077 | { |
12078 | u32 adr, res; |
12079 | u32 src, dst; |
12080 | |
12081 | adr = AREG((Opcode >> 0) & 7) - 2; |
12082 | AREG((Opcode >> 0) & 7) = adr; |
12083 | PRE_IO |
12084 | READ_WORD_F(adr, res) |
12085 | flag_C = 0; |
12086 | flag_V = 0; |
12087 | flag_NotZ = res; |
12088 | flag_N = res >> 8; |
12089 | adr = AREG(7) - 2; |
12090 | AREG(7) = adr; |
12091 | WRITE_WORD_F(adr, res) |
12092 | POST_IO |
12093 | RET(14) |
12094 | } |
12095 | |
12096 | // MOVEW |
12097 | OPCODE(0x3028) |
12098 | { |
12099 | u32 adr, res; |
12100 | u32 src, dst; |
12101 | |
12102 | FETCH_SWORD(adr); |
12103 | adr += AREG((Opcode >> 0) & 7); |
12104 | PRE_IO |
12105 | READ_WORD_F(adr, res) |
12106 | flag_C = 0; |
12107 | flag_V = 0; |
12108 | flag_NotZ = res; |
12109 | flag_N = res >> 8; |
12110 | DREGu16((Opcode >> 9) & 7) = res; |
12111 | POST_IO |
12112 | RET(12) |
12113 | } |
12114 | |
12115 | // MOVEW |
12116 | OPCODE(0x30A8) |
12117 | { |
12118 | u32 adr, res; |
12119 | u32 src, dst; |
12120 | |
12121 | FETCH_SWORD(adr); |
12122 | adr += AREG((Opcode >> 0) & 7); |
12123 | PRE_IO |
12124 | READ_WORD_F(adr, res) |
12125 | flag_C = 0; |
12126 | flag_V = 0; |
12127 | flag_NotZ = res; |
12128 | flag_N = res >> 8; |
12129 | adr = AREG((Opcode >> 9) & 7); |
12130 | WRITE_WORD_F(adr, res) |
12131 | POST_IO |
12132 | RET(16) |
12133 | } |
12134 | |
12135 | // MOVEW |
12136 | OPCODE(0x30E8) |
12137 | { |
12138 | u32 adr, res; |
12139 | u32 src, dst; |
12140 | |
12141 | FETCH_SWORD(adr); |
12142 | adr += AREG((Opcode >> 0) & 7); |
12143 | PRE_IO |
12144 | READ_WORD_F(adr, res) |
12145 | flag_C = 0; |
12146 | flag_V = 0; |
12147 | flag_NotZ = res; |
12148 | flag_N = res >> 8; |
12149 | adr = AREG((Opcode >> 9) & 7); |
12150 | AREG((Opcode >> 9) & 7) += 2; |
12151 | WRITE_WORD_F(adr, res) |
12152 | POST_IO |
12153 | RET(16) |
12154 | } |
12155 | |
12156 | // MOVEW |
12157 | OPCODE(0x3128) |
12158 | { |
12159 | u32 adr, res; |
12160 | u32 src, dst; |
12161 | |
12162 | FETCH_SWORD(adr); |
12163 | adr += AREG((Opcode >> 0) & 7); |
12164 | PRE_IO |
12165 | READ_WORD_F(adr, res) |
12166 | flag_C = 0; |
12167 | flag_V = 0; |
12168 | flag_NotZ = res; |
12169 | flag_N = res >> 8; |
12170 | adr = AREG((Opcode >> 9) & 7) - 2; |
12171 | AREG((Opcode >> 9) & 7) = adr; |
12172 | WRITE_WORD_F(adr, res) |
12173 | POST_IO |
12174 | RET(16) |
12175 | } |
12176 | |
12177 | // MOVEW |
12178 | OPCODE(0x3168) |
12179 | { |
12180 | u32 adr, res; |
12181 | u32 src, dst; |
12182 | |
12183 | FETCH_SWORD(adr); |
12184 | adr += AREG((Opcode >> 0) & 7); |
12185 | PRE_IO |
12186 | READ_WORD_F(adr, res) |
12187 | flag_C = 0; |
12188 | flag_V = 0; |
12189 | flag_NotZ = res; |
12190 | flag_N = res >> 8; |
12191 | FETCH_SWORD(adr); |
12192 | adr += AREG((Opcode >> 9) & 7); |
12193 | WRITE_WORD_F(adr, res) |
12194 | POST_IO |
12195 | RET(20) |
12196 | } |
12197 | |
12198 | // MOVEW |
12199 | OPCODE(0x31A8) |
12200 | { |
12201 | u32 adr, res; |
12202 | u32 src, dst; |
12203 | |
12204 | FETCH_SWORD(adr); |
12205 | adr += AREG((Opcode >> 0) & 7); |
12206 | PRE_IO |
12207 | READ_WORD_F(adr, res) |
12208 | flag_C = 0; |
12209 | flag_V = 0; |
12210 | flag_NotZ = res; |
12211 | flag_N = res >> 8; |
12212 | adr = AREG((Opcode >> 9) & 7); |
12213 | DECODE_EXT_WORD |
12214 | WRITE_WORD_F(adr, res) |
12215 | POST_IO |
12216 | RET(22) |
12217 | } |
12218 | |
12219 | // MOVEW |
12220 | OPCODE(0x31E8) |
12221 | { |
12222 | u32 adr, res; |
12223 | u32 src, dst; |
12224 | |
12225 | FETCH_SWORD(adr); |
12226 | adr += AREG((Opcode >> 0) & 7); |
12227 | PRE_IO |
12228 | READ_WORD_F(adr, res) |
12229 | flag_C = 0; |
12230 | flag_V = 0; |
12231 | flag_NotZ = res; |
12232 | flag_N = res >> 8; |
12233 | FETCH_SWORD(adr); |
12234 | WRITE_WORD_F(adr, res) |
12235 | POST_IO |
12236 | RET(20) |
12237 | } |
12238 | |
12239 | // MOVEW |
12240 | OPCODE(0x33E8) |
12241 | { |
12242 | u32 adr, res; |
12243 | u32 src, dst; |
12244 | |
12245 | FETCH_SWORD(adr); |
12246 | adr += AREG((Opcode >> 0) & 7); |
12247 | PRE_IO |
12248 | READ_WORD_F(adr, res) |
12249 | flag_C = 0; |
12250 | flag_V = 0; |
12251 | flag_NotZ = res; |
12252 | flag_N = res >> 8; |
12253 | FETCH_LONG(adr); |
12254 | WRITE_WORD_F(adr, res) |
12255 | POST_IO |
12256 | RET(24) |
12257 | } |
12258 | |
12259 | // MOVEW |
12260 | OPCODE(0x3EE8) |
12261 | { |
12262 | u32 adr, res; |
12263 | u32 src, dst; |
12264 | |
12265 | FETCH_SWORD(adr); |
12266 | adr += AREG((Opcode >> 0) & 7); |
12267 | PRE_IO |
12268 | READ_WORD_F(adr, res) |
12269 | flag_C = 0; |
12270 | flag_V = 0; |
12271 | flag_NotZ = res; |
12272 | flag_N = res >> 8; |
12273 | adr = AREG(7); |
12274 | AREG(7) += 2; |
12275 | WRITE_WORD_F(adr, res) |
12276 | POST_IO |
12277 | RET(16) |
12278 | } |
12279 | |
12280 | // MOVEW |
12281 | OPCODE(0x3F28) |
12282 | { |
12283 | u32 adr, res; |
12284 | u32 src, dst; |
12285 | |
12286 | FETCH_SWORD(adr); |
12287 | adr += AREG((Opcode >> 0) & 7); |
12288 | PRE_IO |
12289 | READ_WORD_F(adr, res) |
12290 | flag_C = 0; |
12291 | flag_V = 0; |
12292 | flag_NotZ = res; |
12293 | flag_N = res >> 8; |
12294 | adr = AREG(7) - 2; |
12295 | AREG(7) = adr; |
12296 | WRITE_WORD_F(adr, res) |
12297 | POST_IO |
12298 | RET(16) |
12299 | } |
12300 | |
12301 | // MOVEW |
12302 | OPCODE(0x3030) |
12303 | { |
12304 | u32 adr, res; |
12305 | u32 src, dst; |
12306 | |
12307 | adr = AREG((Opcode >> 0) & 7); |
12308 | DECODE_EXT_WORD |
12309 | PRE_IO |
12310 | READ_WORD_F(adr, res) |
12311 | flag_C = 0; |
12312 | flag_V = 0; |
12313 | flag_NotZ = res; |
12314 | flag_N = res >> 8; |
12315 | DREGu16((Opcode >> 9) & 7) = res; |
12316 | POST_IO |
12317 | RET(14) |
12318 | } |
12319 | |
12320 | // MOVEW |
12321 | OPCODE(0x30B0) |
12322 | { |
12323 | u32 adr, res; |
12324 | u32 src, dst; |
12325 | |
12326 | adr = AREG((Opcode >> 0) & 7); |
12327 | DECODE_EXT_WORD |
12328 | PRE_IO |
12329 | READ_WORD_F(adr, res) |
12330 | flag_C = 0; |
12331 | flag_V = 0; |
12332 | flag_NotZ = res; |
12333 | flag_N = res >> 8; |
12334 | adr = AREG((Opcode >> 9) & 7); |
12335 | WRITE_WORD_F(adr, res) |
12336 | POST_IO |
12337 | RET(18) |
12338 | } |
12339 | |
12340 | // MOVEW |
12341 | OPCODE(0x30F0) |
12342 | { |
12343 | u32 adr, res; |
12344 | u32 src, dst; |
12345 | |
12346 | adr = AREG((Opcode >> 0) & 7); |
12347 | DECODE_EXT_WORD |
12348 | PRE_IO |
12349 | READ_WORD_F(adr, res) |
12350 | flag_C = 0; |
12351 | flag_V = 0; |
12352 | flag_NotZ = res; |
12353 | flag_N = res >> 8; |
12354 | adr = AREG((Opcode >> 9) & 7); |
12355 | AREG((Opcode >> 9) & 7) += 2; |
12356 | WRITE_WORD_F(adr, res) |
12357 | POST_IO |
12358 | RET(18) |
12359 | } |
12360 | |
12361 | // MOVEW |
12362 | OPCODE(0x3130) |
12363 | { |
12364 | u32 adr, res; |
12365 | u32 src, dst; |
12366 | |
12367 | adr = AREG((Opcode >> 0) & 7); |
12368 | DECODE_EXT_WORD |
12369 | PRE_IO |
12370 | READ_WORD_F(adr, res) |
12371 | flag_C = 0; |
12372 | flag_V = 0; |
12373 | flag_NotZ = res; |
12374 | flag_N = res >> 8; |
12375 | adr = AREG((Opcode >> 9) & 7) - 2; |
12376 | AREG((Opcode >> 9) & 7) = adr; |
12377 | WRITE_WORD_F(adr, res) |
12378 | POST_IO |
12379 | RET(18) |
12380 | } |
12381 | |
12382 | // MOVEW |
12383 | OPCODE(0x3170) |
12384 | { |
12385 | u32 adr, res; |
12386 | u32 src, dst; |
12387 | |
12388 | adr = AREG((Opcode >> 0) & 7); |
12389 | DECODE_EXT_WORD |
12390 | PRE_IO |
12391 | READ_WORD_F(adr, res) |
12392 | flag_C = 0; |
12393 | flag_V = 0; |
12394 | flag_NotZ = res; |
12395 | flag_N = res >> 8; |
12396 | FETCH_SWORD(adr); |
12397 | adr += AREG((Opcode >> 9) & 7); |
12398 | WRITE_WORD_F(adr, res) |
12399 | POST_IO |
12400 | RET(22) |
12401 | } |
12402 | |
12403 | // MOVEW |
12404 | OPCODE(0x31B0) |
12405 | { |
12406 | u32 adr, res; |
12407 | u32 src, dst; |
12408 | |
12409 | adr = AREG((Opcode >> 0) & 7); |
12410 | DECODE_EXT_WORD |
12411 | PRE_IO |
12412 | READ_WORD_F(adr, res) |
12413 | flag_C = 0; |
12414 | flag_V = 0; |
12415 | flag_NotZ = res; |
12416 | flag_N = res >> 8; |
12417 | adr = AREG((Opcode >> 9) & 7); |
12418 | DECODE_EXT_WORD |
12419 | WRITE_WORD_F(adr, res) |
12420 | POST_IO |
12421 | RET(24) |
12422 | } |
12423 | |
12424 | // MOVEW |
12425 | OPCODE(0x31F0) |
12426 | { |
12427 | u32 adr, res; |
12428 | u32 src, dst; |
12429 | |
12430 | adr = AREG((Opcode >> 0) & 7); |
12431 | DECODE_EXT_WORD |
12432 | PRE_IO |
12433 | READ_WORD_F(adr, res) |
12434 | flag_C = 0; |
12435 | flag_V = 0; |
12436 | flag_NotZ = res; |
12437 | flag_N = res >> 8; |
12438 | FETCH_SWORD(adr); |
12439 | WRITE_WORD_F(adr, res) |
12440 | POST_IO |
12441 | RET(22) |
12442 | } |
12443 | |
12444 | // MOVEW |
12445 | OPCODE(0x33F0) |
12446 | { |
12447 | u32 adr, res; |
12448 | u32 src, dst; |
12449 | |
12450 | adr = AREG((Opcode >> 0) & 7); |
12451 | DECODE_EXT_WORD |
12452 | PRE_IO |
12453 | READ_WORD_F(adr, res) |
12454 | flag_C = 0; |
12455 | flag_V = 0; |
12456 | flag_NotZ = res; |
12457 | flag_N = res >> 8; |
12458 | FETCH_LONG(adr); |
12459 | WRITE_WORD_F(adr, res) |
12460 | POST_IO |
12461 | RET(26) |
12462 | } |
12463 | |
12464 | // MOVEW |
12465 | OPCODE(0x3EF0) |
12466 | { |
12467 | u32 adr, res; |
12468 | u32 src, dst; |
12469 | |
12470 | adr = AREG((Opcode >> 0) & 7); |
12471 | DECODE_EXT_WORD |
12472 | PRE_IO |
12473 | READ_WORD_F(adr, res) |
12474 | flag_C = 0; |
12475 | flag_V = 0; |
12476 | flag_NotZ = res; |
12477 | flag_N = res >> 8; |
12478 | adr = AREG(7); |
12479 | AREG(7) += 2; |
12480 | WRITE_WORD_F(adr, res) |
12481 | POST_IO |
12482 | RET(18) |
12483 | } |
12484 | |
12485 | // MOVEW |
12486 | OPCODE(0x3F30) |
12487 | { |
12488 | u32 adr, res; |
12489 | u32 src, dst; |
12490 | |
12491 | adr = AREG((Opcode >> 0) & 7); |
12492 | DECODE_EXT_WORD |
12493 | PRE_IO |
12494 | READ_WORD_F(adr, res) |
12495 | flag_C = 0; |
12496 | flag_V = 0; |
12497 | flag_NotZ = res; |
12498 | flag_N = res >> 8; |
12499 | adr = AREG(7) - 2; |
12500 | AREG(7) = adr; |
12501 | WRITE_WORD_F(adr, res) |
12502 | POST_IO |
12503 | RET(18) |
12504 | } |
12505 | |
12506 | // MOVEW |
12507 | OPCODE(0x3038) |
12508 | { |
12509 | u32 adr, res; |
12510 | u32 src, dst; |
12511 | |
12512 | FETCH_SWORD(adr); |
12513 | PRE_IO |
12514 | READ_WORD_F(adr, res) |
12515 | flag_C = 0; |
12516 | flag_V = 0; |
12517 | flag_NotZ = res; |
12518 | flag_N = res >> 8; |
12519 | DREGu16((Opcode >> 9) & 7) = res; |
12520 | POST_IO |
12521 | RET(12) |
12522 | } |
12523 | |
12524 | // MOVEW |
12525 | OPCODE(0x30B8) |
12526 | { |
12527 | u32 adr, res; |
12528 | u32 src, dst; |
12529 | |
12530 | FETCH_SWORD(adr); |
12531 | PRE_IO |
12532 | READ_WORD_F(adr, res) |
12533 | flag_C = 0; |
12534 | flag_V = 0; |
12535 | flag_NotZ = res; |
12536 | flag_N = res >> 8; |
12537 | adr = AREG((Opcode >> 9) & 7); |
12538 | WRITE_WORD_F(adr, res) |
12539 | POST_IO |
12540 | RET(16) |
12541 | } |
12542 | |
12543 | // MOVEW |
12544 | OPCODE(0x30F8) |
12545 | { |
12546 | u32 adr, res; |
12547 | u32 src, dst; |
12548 | |
12549 | FETCH_SWORD(adr); |
12550 | PRE_IO |
12551 | READ_WORD_F(adr, res) |
12552 | flag_C = 0; |
12553 | flag_V = 0; |
12554 | flag_NotZ = res; |
12555 | flag_N = res >> 8; |
12556 | adr = AREG((Opcode >> 9) & 7); |
12557 | AREG((Opcode >> 9) & 7) += 2; |
12558 | WRITE_WORD_F(adr, res) |
12559 | POST_IO |
12560 | RET(16) |
12561 | } |
12562 | |
12563 | // MOVEW |
12564 | OPCODE(0x3138) |
12565 | { |
12566 | u32 adr, res; |
12567 | u32 src, dst; |
12568 | |
12569 | FETCH_SWORD(adr); |
12570 | PRE_IO |
12571 | READ_WORD_F(adr, res) |
12572 | flag_C = 0; |
12573 | flag_V = 0; |
12574 | flag_NotZ = res; |
12575 | flag_N = res >> 8; |
12576 | adr = AREG((Opcode >> 9) & 7) - 2; |
12577 | AREG((Opcode >> 9) & 7) = adr; |
12578 | WRITE_WORD_F(adr, res) |
12579 | POST_IO |
12580 | RET(16) |
12581 | } |
12582 | |
12583 | // MOVEW |
12584 | OPCODE(0x3178) |
12585 | { |
12586 | u32 adr, res; |
12587 | u32 src, dst; |
12588 | |
12589 | FETCH_SWORD(adr); |
12590 | PRE_IO |
12591 | READ_WORD_F(adr, res) |
12592 | flag_C = 0; |
12593 | flag_V = 0; |
12594 | flag_NotZ = res; |
12595 | flag_N = res >> 8; |
12596 | FETCH_SWORD(adr); |
12597 | adr += AREG((Opcode >> 9) & 7); |
12598 | WRITE_WORD_F(adr, res) |
12599 | POST_IO |
12600 | RET(20) |
12601 | } |
12602 | |
12603 | // MOVEW |
12604 | OPCODE(0x31B8) |
12605 | { |
12606 | u32 adr, res; |
12607 | u32 src, dst; |
12608 | |
12609 | FETCH_SWORD(adr); |
12610 | PRE_IO |
12611 | READ_WORD_F(adr, res) |
12612 | flag_C = 0; |
12613 | flag_V = 0; |
12614 | flag_NotZ = res; |
12615 | flag_N = res >> 8; |
12616 | adr = AREG((Opcode >> 9) & 7); |
12617 | DECODE_EXT_WORD |
12618 | WRITE_WORD_F(adr, res) |
12619 | POST_IO |
12620 | RET(22) |
12621 | } |
12622 | |
12623 | // MOVEW |
12624 | OPCODE(0x31F8) |
12625 | { |
12626 | u32 adr, res; |
12627 | u32 src, dst; |
12628 | |
12629 | FETCH_SWORD(adr); |
12630 | PRE_IO |
12631 | READ_WORD_F(adr, res) |
12632 | flag_C = 0; |
12633 | flag_V = 0; |
12634 | flag_NotZ = res; |
12635 | flag_N = res >> 8; |
12636 | FETCH_SWORD(adr); |
12637 | WRITE_WORD_F(adr, res) |
12638 | POST_IO |
12639 | RET(20) |
12640 | } |
12641 | |
12642 | // MOVEW |
12643 | OPCODE(0x33F8) |
12644 | { |
12645 | u32 adr, res; |
12646 | u32 src, dst; |
12647 | |
12648 | FETCH_SWORD(adr); |
12649 | PRE_IO |
12650 | READ_WORD_F(adr, res) |
12651 | flag_C = 0; |
12652 | flag_V = 0; |
12653 | flag_NotZ = res; |
12654 | flag_N = res >> 8; |
12655 | FETCH_LONG(adr); |
12656 | WRITE_WORD_F(adr, res) |
12657 | POST_IO |
12658 | RET(24) |
12659 | } |
12660 | |
12661 | // MOVEW |
12662 | OPCODE(0x3EF8) |
12663 | { |
12664 | u32 adr, res; |
12665 | u32 src, dst; |
12666 | |
12667 | FETCH_SWORD(adr); |
12668 | PRE_IO |
12669 | READ_WORD_F(adr, res) |
12670 | flag_C = 0; |
12671 | flag_V = 0; |
12672 | flag_NotZ = res; |
12673 | flag_N = res >> 8; |
12674 | adr = AREG(7); |
12675 | AREG(7) += 2; |
12676 | WRITE_WORD_F(adr, res) |
12677 | POST_IO |
12678 | RET(16) |
12679 | } |
12680 | |
12681 | // MOVEW |
12682 | OPCODE(0x3F38) |
12683 | { |
12684 | u32 adr, res; |
12685 | u32 src, dst; |
12686 | |
12687 | FETCH_SWORD(adr); |
12688 | PRE_IO |
12689 | READ_WORD_F(adr, res) |
12690 | flag_C = 0; |
12691 | flag_V = 0; |
12692 | flag_NotZ = res; |
12693 | flag_N = res >> 8; |
12694 | adr = AREG(7) - 2; |
12695 | AREG(7) = adr; |
12696 | WRITE_WORD_F(adr, res) |
12697 | POST_IO |
12698 | RET(16) |
12699 | } |
12700 | |
12701 | // MOVEW |
12702 | OPCODE(0x3039) |
12703 | { |
12704 | u32 adr, res; |
12705 | u32 src, dst; |
12706 | |
12707 | FETCH_LONG(adr); |
12708 | PRE_IO |
12709 | READ_WORD_F(adr, res) |
12710 | flag_C = 0; |
12711 | flag_V = 0; |
12712 | flag_NotZ = res; |
12713 | flag_N = res >> 8; |
12714 | DREGu16((Opcode >> 9) & 7) = res; |
12715 | POST_IO |
12716 | RET(16) |
12717 | } |
12718 | |
12719 | // MOVEW |
12720 | OPCODE(0x30B9) |
12721 | { |
12722 | u32 adr, res; |
12723 | u32 src, dst; |
12724 | |
12725 | FETCH_LONG(adr); |
12726 | PRE_IO |
12727 | READ_WORD_F(adr, res) |
12728 | flag_C = 0; |
12729 | flag_V = 0; |
12730 | flag_NotZ = res; |
12731 | flag_N = res >> 8; |
12732 | adr = AREG((Opcode >> 9) & 7); |
12733 | WRITE_WORD_F(adr, res) |
12734 | POST_IO |
12735 | RET(20) |
12736 | } |
12737 | |
12738 | // MOVEW |
12739 | OPCODE(0x30F9) |
12740 | { |
12741 | u32 adr, res; |
12742 | u32 src, dst; |
12743 | |
12744 | FETCH_LONG(adr); |
12745 | PRE_IO |
12746 | READ_WORD_F(adr, res) |
12747 | flag_C = 0; |
12748 | flag_V = 0; |
12749 | flag_NotZ = res; |
12750 | flag_N = res >> 8; |
12751 | adr = AREG((Opcode >> 9) & 7); |
12752 | AREG((Opcode >> 9) & 7) += 2; |
12753 | WRITE_WORD_F(adr, res) |
12754 | POST_IO |
12755 | RET(20) |
12756 | } |
12757 | |
12758 | // MOVEW |
12759 | OPCODE(0x3139) |
12760 | { |
12761 | u32 adr, res; |
12762 | u32 src, dst; |
12763 | |
12764 | FETCH_LONG(adr); |
12765 | PRE_IO |
12766 | READ_WORD_F(adr, res) |
12767 | flag_C = 0; |
12768 | flag_V = 0; |
12769 | flag_NotZ = res; |
12770 | flag_N = res >> 8; |
12771 | adr = AREG((Opcode >> 9) & 7) - 2; |
12772 | AREG((Opcode >> 9) & 7) = adr; |
12773 | WRITE_WORD_F(adr, res) |
12774 | POST_IO |
12775 | RET(20) |
12776 | } |
12777 | |
12778 | // MOVEW |
12779 | OPCODE(0x3179) |
12780 | { |
12781 | u32 adr, res; |
12782 | u32 src, dst; |
12783 | |
12784 | FETCH_LONG(adr); |
12785 | PRE_IO |
12786 | READ_WORD_F(adr, res) |
12787 | flag_C = 0; |
12788 | flag_V = 0; |
12789 | flag_NotZ = res; |
12790 | flag_N = res >> 8; |
12791 | FETCH_SWORD(adr); |
12792 | adr += AREG((Opcode >> 9) & 7); |
12793 | WRITE_WORD_F(adr, res) |
12794 | POST_IO |
12795 | RET(24) |
12796 | } |
12797 | |
12798 | // MOVEW |
12799 | OPCODE(0x31B9) |
12800 | { |
12801 | u32 adr, res; |
12802 | u32 src, dst; |
12803 | |
12804 | FETCH_LONG(adr); |
12805 | PRE_IO |
12806 | READ_WORD_F(adr, res) |
12807 | flag_C = 0; |
12808 | flag_V = 0; |
12809 | flag_NotZ = res; |
12810 | flag_N = res >> 8; |
12811 | adr = AREG((Opcode >> 9) & 7); |
12812 | DECODE_EXT_WORD |
12813 | WRITE_WORD_F(adr, res) |
12814 | POST_IO |
12815 | RET(26) |
12816 | } |
12817 | |
12818 | // MOVEW |
12819 | OPCODE(0x31F9) |
12820 | { |
12821 | u32 adr, res; |
12822 | u32 src, dst; |
12823 | |
12824 | FETCH_LONG(adr); |
12825 | PRE_IO |
12826 | READ_WORD_F(adr, res) |
12827 | flag_C = 0; |
12828 | flag_V = 0; |
12829 | flag_NotZ = res; |
12830 | flag_N = res >> 8; |
12831 | FETCH_SWORD(adr); |
12832 | WRITE_WORD_F(adr, res) |
12833 | POST_IO |
12834 | RET(24) |
12835 | } |
12836 | |
12837 | // MOVEW |
12838 | OPCODE(0x33F9) |
12839 | { |
12840 | u32 adr, res; |
12841 | u32 src, dst; |
12842 | |
12843 | FETCH_LONG(adr); |
12844 | PRE_IO |
12845 | READ_WORD_F(adr, res) |
12846 | flag_C = 0; |
12847 | flag_V = 0; |
12848 | flag_NotZ = res; |
12849 | flag_N = res >> 8; |
12850 | FETCH_LONG(adr); |
12851 | WRITE_WORD_F(adr, res) |
12852 | POST_IO |
12853 | RET(28) |
12854 | } |
12855 | |
12856 | // MOVEW |
12857 | OPCODE(0x3EF9) |
12858 | { |
12859 | u32 adr, res; |
12860 | u32 src, dst; |
12861 | |
12862 | FETCH_LONG(adr); |
12863 | PRE_IO |
12864 | READ_WORD_F(adr, res) |
12865 | flag_C = 0; |
12866 | flag_V = 0; |
12867 | flag_NotZ = res; |
12868 | flag_N = res >> 8; |
12869 | adr = AREG(7); |
12870 | AREG(7) += 2; |
12871 | WRITE_WORD_F(adr, res) |
12872 | POST_IO |
12873 | RET(20) |
12874 | } |
12875 | |
12876 | // MOVEW |
12877 | OPCODE(0x3F39) |
12878 | { |
12879 | u32 adr, res; |
12880 | u32 src, dst; |
12881 | |
12882 | FETCH_LONG(adr); |
12883 | PRE_IO |
12884 | READ_WORD_F(adr, res) |
12885 | flag_C = 0; |
12886 | flag_V = 0; |
12887 | flag_NotZ = res; |
12888 | flag_N = res >> 8; |
12889 | adr = AREG(7) - 2; |
12890 | AREG(7) = adr; |
12891 | WRITE_WORD_F(adr, res) |
12892 | POST_IO |
12893 | RET(20) |
12894 | } |
12895 | |
12896 | // MOVEW |
12897 | OPCODE(0x303A) |
12898 | { |
12899 | u32 adr, res; |
12900 | u32 src, dst; |
12901 | |
be26eb23 |
12902 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12903 | PC++; |
12904 | PRE_IO |
12905 | READ_WORD_F(adr, res) |
12906 | flag_C = 0; |
12907 | flag_V = 0; |
12908 | flag_NotZ = res; |
12909 | flag_N = res >> 8; |
12910 | DREGu16((Opcode >> 9) & 7) = res; |
12911 | POST_IO |
12912 | RET(12) |
12913 | } |
12914 | |
12915 | // MOVEW |
12916 | OPCODE(0x30BA) |
12917 | { |
12918 | u32 adr, res; |
12919 | u32 src, dst; |
12920 | |
be26eb23 |
12921 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12922 | PC++; |
12923 | PRE_IO |
12924 | READ_WORD_F(adr, res) |
12925 | flag_C = 0; |
12926 | flag_V = 0; |
12927 | flag_NotZ = res; |
12928 | flag_N = res >> 8; |
12929 | adr = AREG((Opcode >> 9) & 7); |
12930 | WRITE_WORD_F(adr, res) |
12931 | POST_IO |
12932 | RET(16) |
12933 | } |
12934 | |
12935 | // MOVEW |
12936 | OPCODE(0x30FA) |
12937 | { |
12938 | u32 adr, res; |
12939 | u32 src, dst; |
12940 | |
be26eb23 |
12941 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12942 | PC++; |
12943 | PRE_IO |
12944 | READ_WORD_F(adr, res) |
12945 | flag_C = 0; |
12946 | flag_V = 0; |
12947 | flag_NotZ = res; |
12948 | flag_N = res >> 8; |
12949 | adr = AREG((Opcode >> 9) & 7); |
12950 | AREG((Opcode >> 9) & 7) += 2; |
12951 | WRITE_WORD_F(adr, res) |
12952 | POST_IO |
12953 | RET(16) |
12954 | } |
12955 | |
12956 | // MOVEW |
12957 | OPCODE(0x313A) |
12958 | { |
12959 | u32 adr, res; |
12960 | u32 src, dst; |
12961 | |
be26eb23 |
12962 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12963 | PC++; |
12964 | PRE_IO |
12965 | READ_WORD_F(adr, res) |
12966 | flag_C = 0; |
12967 | flag_V = 0; |
12968 | flag_NotZ = res; |
12969 | flag_N = res >> 8; |
12970 | adr = AREG((Opcode >> 9) & 7) - 2; |
12971 | AREG((Opcode >> 9) & 7) = adr; |
12972 | WRITE_WORD_F(adr, res) |
12973 | POST_IO |
12974 | RET(16) |
12975 | } |
12976 | |
12977 | // MOVEW |
12978 | OPCODE(0x317A) |
12979 | { |
12980 | u32 adr, res; |
12981 | u32 src, dst; |
12982 | |
be26eb23 |
12983 | adr = GET_SWORD + GET_PC; |
70357ce5 |
12984 | PC++; |
12985 | PRE_IO |
12986 | READ_WORD_F(adr, res) |
12987 | flag_C = 0; |
12988 | flag_V = 0; |
12989 | flag_NotZ = res; |
12990 | flag_N = res >> 8; |
12991 | FETCH_SWORD(adr); |
12992 | adr += AREG((Opcode >> 9) & 7); |
12993 | WRITE_WORD_F(adr, res) |
12994 | POST_IO |
12995 | RET(20) |
12996 | } |
12997 | |
12998 | // MOVEW |
12999 | OPCODE(0x31BA) |
13000 | { |
13001 | u32 adr, res; |
13002 | u32 src, dst; |
13003 | |
be26eb23 |
13004 | adr = GET_SWORD + GET_PC; |
70357ce5 |
13005 | PC++; |
13006 | PRE_IO |
13007 | READ_WORD_F(adr, res) |
13008 | flag_C = 0; |
13009 | flag_V = 0; |
13010 | flag_NotZ = res; |
13011 | flag_N = res >> 8; |
13012 | adr = AREG((Opcode >> 9) & 7); |
13013 | DECODE_EXT_WORD |
13014 | WRITE_WORD_F(adr, res) |
13015 | POST_IO |
13016 | RET(22) |
13017 | } |
13018 | |
13019 | // MOVEW |
13020 | OPCODE(0x31FA) |
13021 | { |
13022 | u32 adr, res; |
13023 | u32 src, dst; |
13024 | |
be26eb23 |
13025 | adr = GET_SWORD + GET_PC; |
70357ce5 |
13026 | PC++; |
13027 | PRE_IO |
13028 | READ_WORD_F(adr, res) |
13029 | flag_C = 0; |
13030 | flag_V = 0; |
13031 | flag_NotZ = res; |
13032 | flag_N = res >> 8; |
13033 | FETCH_SWORD(adr); |
13034 | WRITE_WORD_F(adr, res) |
13035 | POST_IO |
13036 | RET(20) |
13037 | } |
13038 | |
13039 | // MOVEW |
13040 | OPCODE(0x33FA) |
13041 | { |
13042 | u32 adr, res; |
13043 | u32 src, dst; |
13044 | |
be26eb23 |
13045 | adr = GET_SWORD + GET_PC; |
70357ce5 |
13046 | PC++; |
13047 | PRE_IO |
13048 | READ_WORD_F(adr, res) |
13049 | flag_C = 0; |
13050 | flag_V = 0; |
13051 | flag_NotZ = res; |
13052 | flag_N = res >> 8; |
13053 | FETCH_LONG(adr); |
13054 | WRITE_WORD_F(adr, res) |
13055 | POST_IO |
13056 | RET(24) |
13057 | } |
13058 | |
13059 | // MOVEW |
13060 | OPCODE(0x3EFA) |
13061 | { |
13062 | u32 adr, res; |
13063 | u32 src, dst; |
13064 | |
be26eb23 |
13065 | adr = GET_SWORD + GET_PC; |
70357ce5 |
13066 | PC++; |
13067 | PRE_IO |
13068 | READ_WORD_F(adr, res) |
13069 | flag_C = 0; |
13070 | flag_V = 0; |
13071 | flag_NotZ = res; |
13072 | flag_N = res >> 8; |
13073 | adr = AREG(7); |
13074 | AREG(7) += 2; |
13075 | WRITE_WORD_F(adr, res) |
13076 | POST_IO |
13077 | RET(16) |
13078 | } |
13079 | |
13080 | // MOVEW |
13081 | OPCODE(0x3F3A) |
13082 | { |
13083 | u32 adr, res; |
13084 | u32 src, dst; |
13085 | |
be26eb23 |
13086 | adr = GET_SWORD + GET_PC; |
70357ce5 |
13087 | PC++; |
13088 | PRE_IO |
13089 | READ_WORD_F(adr, res) |
13090 | flag_C = 0; |
13091 | flag_V = 0; |
13092 | flag_NotZ = res; |
13093 | flag_N = res >> 8; |
13094 | adr = AREG(7) - 2; |
13095 | AREG(7) = adr; |
13096 | WRITE_WORD_F(adr, res) |
13097 | POST_IO |
13098 | RET(16) |
13099 | } |
13100 | |
13101 | // MOVEW |
13102 | OPCODE(0x303B) |
13103 | { |
13104 | u32 adr, res; |
13105 | u32 src, dst; |
13106 | |
be26eb23 |
13107 | adr = GET_PC; |
70357ce5 |
13108 | DECODE_EXT_WORD |
13109 | PRE_IO |
13110 | READ_WORD_F(adr, res) |
13111 | flag_C = 0; |
13112 | flag_V = 0; |
13113 | flag_NotZ = res; |
13114 | flag_N = res >> 8; |
13115 | DREGu16((Opcode >> 9) & 7) = res; |
13116 | POST_IO |
13117 | RET(14) |
13118 | } |
13119 | |
13120 | // MOVEW |
13121 | OPCODE(0x30BB) |
13122 | { |
13123 | u32 adr, res; |
13124 | u32 src, dst; |
13125 | |
be26eb23 |
13126 | adr = GET_PC; |
70357ce5 |
13127 | DECODE_EXT_WORD |
13128 | PRE_IO |
13129 | READ_WORD_F(adr, res) |
13130 | flag_C = 0; |
13131 | flag_V = 0; |
13132 | flag_NotZ = res; |
13133 | flag_N = res >> 8; |
13134 | adr = AREG((Opcode >> 9) & 7); |
13135 | WRITE_WORD_F(adr, res) |
13136 | POST_IO |
13137 | RET(18) |
13138 | } |
13139 | |
13140 | // MOVEW |
13141 | OPCODE(0x30FB) |
13142 | { |
13143 | u32 adr, res; |
13144 | u32 src, dst; |
13145 | |
be26eb23 |
13146 | adr = GET_PC; |
70357ce5 |
13147 | DECODE_EXT_WORD |
13148 | PRE_IO |
13149 | READ_WORD_F(adr, res) |
13150 | flag_C = 0; |
13151 | flag_V = 0; |
13152 | flag_NotZ = res; |
13153 | flag_N = res >> 8; |
13154 | adr = AREG((Opcode >> 9) & 7); |
13155 | AREG((Opcode >> 9) & 7) += 2; |
13156 | WRITE_WORD_F(adr, res) |
13157 | POST_IO |
13158 | RET(18) |
13159 | } |
13160 | |
13161 | // MOVEW |
13162 | OPCODE(0x313B) |
13163 | { |
13164 | u32 adr, res; |
13165 | u32 src, dst; |
13166 | |
be26eb23 |
13167 | adr = GET_PC; |
70357ce5 |
13168 | DECODE_EXT_WORD |
13169 | PRE_IO |
13170 | READ_WORD_F(adr, res) |
13171 | flag_C = 0; |
13172 | flag_V = 0; |
13173 | flag_NotZ = res; |
13174 | flag_N = res >> 8; |
13175 | adr = AREG((Opcode >> 9) & 7) - 2; |
13176 | AREG((Opcode >> 9) & 7) = adr; |
13177 | WRITE_WORD_F(adr, res) |
13178 | POST_IO |
13179 | RET(18) |
13180 | } |
13181 | |
13182 | // MOVEW |
13183 | OPCODE(0x317B) |
13184 | { |
13185 | u32 adr, res; |
13186 | u32 src, dst; |
13187 | |
be26eb23 |
13188 | adr = GET_PC; |
70357ce5 |
13189 | DECODE_EXT_WORD |
13190 | PRE_IO |
13191 | READ_WORD_F(adr, res) |
13192 | flag_C = 0; |
13193 | flag_V = 0; |
13194 | flag_NotZ = res; |
13195 | flag_N = res >> 8; |
13196 | FETCH_SWORD(adr); |
13197 | adr += AREG((Opcode >> 9) & 7); |
13198 | WRITE_WORD_F(adr, res) |
13199 | POST_IO |
13200 | RET(22) |
13201 | } |
13202 | |
13203 | // MOVEW |
13204 | OPCODE(0x31BB) |
13205 | { |
13206 | u32 adr, res; |
13207 | u32 src, dst; |
13208 | |
be26eb23 |
13209 | adr = GET_PC; |
70357ce5 |
13210 | DECODE_EXT_WORD |
13211 | PRE_IO |
13212 | READ_WORD_F(adr, res) |
13213 | flag_C = 0; |
13214 | flag_V = 0; |
13215 | flag_NotZ = res; |
13216 | flag_N = res >> 8; |
13217 | adr = AREG((Opcode >> 9) & 7); |
13218 | DECODE_EXT_WORD |
13219 | WRITE_WORD_F(adr, res) |
13220 | POST_IO |
13221 | RET(24) |
13222 | } |
13223 | |
13224 | // MOVEW |
13225 | OPCODE(0x31FB) |
13226 | { |
13227 | u32 adr, res; |
13228 | u32 src, dst; |
13229 | |
be26eb23 |
13230 | adr = GET_PC; |
70357ce5 |
13231 | DECODE_EXT_WORD |
13232 | PRE_IO |
13233 | READ_WORD_F(adr, res) |
13234 | flag_C = 0; |
13235 | flag_V = 0; |
13236 | flag_NotZ = res; |
13237 | flag_N = res >> 8; |
13238 | FETCH_SWORD(adr); |
13239 | WRITE_WORD_F(adr, res) |
13240 | POST_IO |
13241 | RET(22) |
13242 | } |
13243 | |
13244 | // MOVEW |
13245 | OPCODE(0x33FB) |
13246 | { |
13247 | u32 adr, res; |
13248 | u32 src, dst; |
13249 | |
be26eb23 |
13250 | adr = GET_PC; |
70357ce5 |
13251 | DECODE_EXT_WORD |
13252 | PRE_IO |
13253 | READ_WORD_F(adr, res) |
13254 | flag_C = 0; |
13255 | flag_V = 0; |
13256 | flag_NotZ = res; |
13257 | flag_N = res >> 8; |
13258 | FETCH_LONG(adr); |
13259 | WRITE_WORD_F(adr, res) |
13260 | POST_IO |
13261 | RET(26) |
13262 | } |
13263 | |
13264 | // MOVEW |
13265 | OPCODE(0x3EFB) |
13266 | { |
13267 | u32 adr, res; |
13268 | u32 src, dst; |
13269 | |
be26eb23 |
13270 | adr = GET_PC; |
70357ce5 |
13271 | DECODE_EXT_WORD |
13272 | PRE_IO |
13273 | READ_WORD_F(adr, res) |
13274 | flag_C = 0; |
13275 | flag_V = 0; |
13276 | flag_NotZ = res; |
13277 | flag_N = res >> 8; |
13278 | adr = AREG(7); |
13279 | AREG(7) += 2; |
13280 | WRITE_WORD_F(adr, res) |
13281 | POST_IO |
13282 | RET(18) |
13283 | } |
13284 | |
13285 | // MOVEW |
13286 | OPCODE(0x3F3B) |
13287 | { |
13288 | u32 adr, res; |
13289 | u32 src, dst; |
13290 | |
be26eb23 |
13291 | adr = GET_PC; |
70357ce5 |
13292 | DECODE_EXT_WORD |
13293 | PRE_IO |
13294 | READ_WORD_F(adr, res) |
13295 | flag_C = 0; |
13296 | flag_V = 0; |
13297 | flag_NotZ = res; |
13298 | flag_N = res >> 8; |
13299 | adr = AREG(7) - 2; |
13300 | AREG(7) = adr; |
13301 | WRITE_WORD_F(adr, res) |
13302 | POST_IO |
13303 | RET(18) |
13304 | } |
13305 | |
13306 | // MOVEW |
13307 | OPCODE(0x303C) |
13308 | { |
13309 | u32 adr, res; |
13310 | u32 src, dst; |
13311 | |
13312 | FETCH_WORD(res); |
13313 | flag_C = 0; |
13314 | flag_V = 0; |
13315 | flag_NotZ = res; |
13316 | flag_N = res >> 8; |
13317 | DREGu16((Opcode >> 9) & 7) = res; |
13318 | RET(8) |
13319 | } |
13320 | |
13321 | // MOVEW |
13322 | OPCODE(0x30BC) |
13323 | { |
13324 | u32 adr, res; |
13325 | u32 src, dst; |
13326 | |
13327 | FETCH_WORD(res); |
13328 | flag_C = 0; |
13329 | flag_V = 0; |
13330 | flag_NotZ = res; |
13331 | flag_N = res >> 8; |
13332 | adr = AREG((Opcode >> 9) & 7); |
13333 | PRE_IO |
13334 | WRITE_WORD_F(adr, res) |
13335 | POST_IO |
13336 | RET(12) |
13337 | } |
13338 | |
13339 | // MOVEW |
13340 | OPCODE(0x30FC) |
13341 | { |
13342 | u32 adr, res; |
13343 | u32 src, dst; |
13344 | |
13345 | FETCH_WORD(res); |
13346 | flag_C = 0; |
13347 | flag_V = 0; |
13348 | flag_NotZ = res; |
13349 | flag_N = res >> 8; |
13350 | adr = AREG((Opcode >> 9) & 7); |
13351 | AREG((Opcode >> 9) & 7) += 2; |
13352 | PRE_IO |
13353 | WRITE_WORD_F(adr, res) |
13354 | POST_IO |
13355 | RET(12) |
13356 | } |
13357 | |
13358 | // MOVEW |
13359 | OPCODE(0x313C) |
13360 | { |
13361 | u32 adr, res; |
13362 | u32 src, dst; |
13363 | |
13364 | FETCH_WORD(res); |
13365 | flag_C = 0; |
13366 | flag_V = 0; |
13367 | flag_NotZ = res; |
13368 | flag_N = res >> 8; |
13369 | adr = AREG((Opcode >> 9) & 7) - 2; |
13370 | AREG((Opcode >> 9) & 7) = adr; |
13371 | PRE_IO |
13372 | WRITE_WORD_F(adr, res) |
13373 | POST_IO |
13374 | RET(12) |
13375 | } |
13376 | |
13377 | // MOVEW |
13378 | OPCODE(0x317C) |
13379 | { |
13380 | u32 adr, res; |
13381 | u32 src, dst; |
13382 | |
13383 | FETCH_WORD(res); |
13384 | flag_C = 0; |
13385 | flag_V = 0; |
13386 | flag_NotZ = res; |
13387 | flag_N = res >> 8; |
13388 | FETCH_SWORD(adr); |
13389 | adr += AREG((Opcode >> 9) & 7); |
13390 | PRE_IO |
13391 | WRITE_WORD_F(adr, res) |
13392 | POST_IO |
13393 | RET(16) |
13394 | } |
13395 | |
13396 | // MOVEW |
13397 | OPCODE(0x31BC) |
13398 | { |
13399 | u32 adr, res; |
13400 | u32 src, dst; |
13401 | |
13402 | FETCH_WORD(res); |
13403 | flag_C = 0; |
13404 | flag_V = 0; |
13405 | flag_NotZ = res; |
13406 | flag_N = res >> 8; |
13407 | adr = AREG((Opcode >> 9) & 7); |
13408 | DECODE_EXT_WORD |
13409 | PRE_IO |
13410 | WRITE_WORD_F(adr, res) |
13411 | POST_IO |
13412 | RET(18) |
13413 | } |
13414 | |
13415 | // MOVEW |
13416 | OPCODE(0x31FC) |
13417 | { |
13418 | u32 adr, res; |
13419 | u32 src, dst; |
13420 | |
13421 | FETCH_WORD(res); |
13422 | flag_C = 0; |
13423 | flag_V = 0; |
13424 | flag_NotZ = res; |
13425 | flag_N = res >> 8; |
13426 | FETCH_SWORD(adr); |
13427 | PRE_IO |
13428 | WRITE_WORD_F(adr, res) |
13429 | POST_IO |
13430 | RET(16) |
13431 | } |
13432 | |
13433 | // MOVEW |
13434 | OPCODE(0x33FC) |
13435 | { |
13436 | u32 adr, res; |
13437 | u32 src, dst; |
13438 | |
13439 | FETCH_WORD(res); |
13440 | flag_C = 0; |
13441 | flag_V = 0; |
13442 | flag_NotZ = res; |
13443 | flag_N = res >> 8; |
13444 | FETCH_LONG(adr); |
13445 | PRE_IO |
13446 | WRITE_WORD_F(adr, res) |
13447 | POST_IO |
13448 | RET(20) |
13449 | } |
13450 | |
13451 | // MOVEW |
13452 | OPCODE(0x3EFC) |
13453 | { |
13454 | u32 adr, res; |
13455 | u32 src, dst; |
13456 | |
13457 | FETCH_WORD(res); |
13458 | flag_C = 0; |
13459 | flag_V = 0; |
13460 | flag_NotZ = res; |
13461 | flag_N = res >> 8; |
13462 | adr = AREG(7); |
13463 | AREG(7) += 2; |
13464 | PRE_IO |
13465 | WRITE_WORD_F(adr, res) |
13466 | POST_IO |
13467 | RET(12) |
13468 | } |
13469 | |
13470 | // MOVEW |
13471 | OPCODE(0x3F3C) |
13472 | { |
13473 | u32 adr, res; |
13474 | u32 src, dst; |
13475 | |
13476 | FETCH_WORD(res); |
13477 | flag_C = 0; |
13478 | flag_V = 0; |
13479 | flag_NotZ = res; |
13480 | flag_N = res >> 8; |
13481 | adr = AREG(7) - 2; |
13482 | AREG(7) = adr; |
13483 | PRE_IO |
13484 | WRITE_WORD_F(adr, res) |
13485 | POST_IO |
13486 | RET(12) |
13487 | } |
13488 | |
13489 | // MOVEW |
13490 | OPCODE(0x301F) |
13491 | { |
13492 | u32 adr, res; |
13493 | u32 src, dst; |
13494 | |
13495 | adr = AREG(7); |
13496 | AREG(7) += 2; |
13497 | PRE_IO |
13498 | READ_WORD_F(adr, res) |
13499 | flag_C = 0; |
13500 | flag_V = 0; |
13501 | flag_NotZ = res; |
13502 | flag_N = res >> 8; |
13503 | DREGu16((Opcode >> 9) & 7) = res; |
13504 | POST_IO |
13505 | RET(8) |
13506 | } |
13507 | |
13508 | // MOVEW |
13509 | OPCODE(0x309F) |
13510 | { |
13511 | u32 adr, res; |
13512 | u32 src, dst; |
13513 | |
13514 | adr = AREG(7); |
13515 | AREG(7) += 2; |
13516 | PRE_IO |
13517 | READ_WORD_F(adr, res) |
13518 | flag_C = 0; |
13519 | flag_V = 0; |
13520 | flag_NotZ = res; |
13521 | flag_N = res >> 8; |
13522 | adr = AREG((Opcode >> 9) & 7); |
13523 | WRITE_WORD_F(adr, res) |
13524 | POST_IO |
13525 | RET(12) |
13526 | } |
13527 | |
13528 | // MOVEW |
13529 | OPCODE(0x30DF) |
13530 | { |
13531 | u32 adr, res; |
13532 | u32 src, dst; |
13533 | |
13534 | adr = AREG(7); |
13535 | AREG(7) += 2; |
13536 | PRE_IO |
13537 | READ_WORD_F(adr, res) |
13538 | flag_C = 0; |
13539 | flag_V = 0; |
13540 | flag_NotZ = res; |
13541 | flag_N = res >> 8; |
13542 | adr = AREG((Opcode >> 9) & 7); |
13543 | AREG((Opcode >> 9) & 7) += 2; |
13544 | WRITE_WORD_F(adr, res) |
13545 | POST_IO |
13546 | RET(12) |
13547 | } |
13548 | |
13549 | // MOVEW |
13550 | OPCODE(0x311F) |
13551 | { |
13552 | u32 adr, res; |
13553 | u32 src, dst; |
13554 | |
13555 | adr = AREG(7); |
13556 | AREG(7) += 2; |
13557 | PRE_IO |
13558 | READ_WORD_F(adr, res) |
13559 | flag_C = 0; |
13560 | flag_V = 0; |
13561 | flag_NotZ = res; |
13562 | flag_N = res >> 8; |
13563 | adr = AREG((Opcode >> 9) & 7) - 2; |
13564 | AREG((Opcode >> 9) & 7) = adr; |
13565 | WRITE_WORD_F(adr, res) |
13566 | POST_IO |
13567 | RET(12) |
13568 | } |
13569 | |
13570 | // MOVEW |
13571 | OPCODE(0x315F) |
13572 | { |
13573 | u32 adr, res; |
13574 | u32 src, dst; |
13575 | |
13576 | adr = AREG(7); |
13577 | AREG(7) += 2; |
13578 | PRE_IO |
13579 | READ_WORD_F(adr, res) |
13580 | flag_C = 0; |
13581 | flag_V = 0; |
13582 | flag_NotZ = res; |
13583 | flag_N = res >> 8; |
13584 | FETCH_SWORD(adr); |
13585 | adr += AREG((Opcode >> 9) & 7); |
13586 | WRITE_WORD_F(adr, res) |
13587 | POST_IO |
13588 | RET(16) |
13589 | } |
13590 | |
13591 | // MOVEW |
13592 | OPCODE(0x319F) |
13593 | { |
13594 | u32 adr, res; |
13595 | u32 src, dst; |
13596 | |
13597 | adr = AREG(7); |
13598 | AREG(7) += 2; |
13599 | PRE_IO |
13600 | READ_WORD_F(adr, res) |
13601 | flag_C = 0; |
13602 | flag_V = 0; |
13603 | flag_NotZ = res; |
13604 | flag_N = res >> 8; |
13605 | adr = AREG((Opcode >> 9) & 7); |
13606 | DECODE_EXT_WORD |
13607 | WRITE_WORD_F(adr, res) |
13608 | POST_IO |
13609 | RET(18) |
13610 | } |
13611 | |
13612 | // MOVEW |
13613 | OPCODE(0x31DF) |
13614 | { |
13615 | u32 adr, res; |
13616 | u32 src, dst; |
13617 | |
13618 | adr = AREG(7); |
13619 | AREG(7) += 2; |
13620 | PRE_IO |
13621 | READ_WORD_F(adr, res) |
13622 | flag_C = 0; |
13623 | flag_V = 0; |
13624 | flag_NotZ = res; |
13625 | flag_N = res >> 8; |
13626 | FETCH_SWORD(adr); |
13627 | WRITE_WORD_F(adr, res) |
13628 | POST_IO |
13629 | RET(16) |
13630 | } |
13631 | |
13632 | // MOVEW |
13633 | OPCODE(0x33DF) |
13634 | { |
13635 | u32 adr, res; |
13636 | u32 src, dst; |
13637 | |
13638 | adr = AREG(7); |
13639 | AREG(7) += 2; |
13640 | PRE_IO |
13641 | READ_WORD_F(adr, res) |
13642 | flag_C = 0; |
13643 | flag_V = 0; |
13644 | flag_NotZ = res; |
13645 | flag_N = res >> 8; |
13646 | FETCH_LONG(adr); |
13647 | WRITE_WORD_F(adr, res) |
13648 | POST_IO |
13649 | RET(20) |
13650 | } |
13651 | |
13652 | // MOVEW |
13653 | OPCODE(0x3EDF) |
13654 | { |
13655 | u32 adr, res; |
13656 | u32 src, dst; |
13657 | |
13658 | adr = AREG(7); |
13659 | AREG(7) += 2; |
13660 | PRE_IO |
13661 | READ_WORD_F(adr, res) |
13662 | flag_C = 0; |
13663 | flag_V = 0; |
13664 | flag_NotZ = res; |
13665 | flag_N = res >> 8; |
13666 | adr = AREG(7); |
13667 | AREG(7) += 2; |
13668 | WRITE_WORD_F(adr, res) |
13669 | POST_IO |
13670 | RET(12) |
13671 | } |
13672 | |
13673 | // MOVEW |
13674 | OPCODE(0x3F1F) |
13675 | { |
13676 | u32 adr, res; |
13677 | u32 src, dst; |
13678 | |
13679 | adr = AREG(7); |
13680 | AREG(7) += 2; |
13681 | PRE_IO |
13682 | READ_WORD_F(adr, res) |
13683 | flag_C = 0; |
13684 | flag_V = 0; |
13685 | flag_NotZ = res; |
13686 | flag_N = res >> 8; |
13687 | adr = AREG(7) - 2; |
13688 | AREG(7) = adr; |
13689 | WRITE_WORD_F(adr, res) |
13690 | POST_IO |
13691 | RET(12) |
13692 | } |
13693 | |
13694 | // MOVEW |
13695 | OPCODE(0x3027) |
13696 | { |
13697 | u32 adr, res; |
13698 | u32 src, dst; |
13699 | |
13700 | adr = AREG(7) - 2; |
13701 | AREG(7) = adr; |
13702 | PRE_IO |
13703 | READ_WORD_F(adr, res) |
13704 | flag_C = 0; |
13705 | flag_V = 0; |
13706 | flag_NotZ = res; |
13707 | flag_N = res >> 8; |
13708 | DREGu16((Opcode >> 9) & 7) = res; |
13709 | POST_IO |
13710 | RET(10) |
13711 | } |
13712 | |
13713 | // MOVEW |
13714 | OPCODE(0x30A7) |
13715 | { |
13716 | u32 adr, res; |
13717 | u32 src, dst; |
13718 | |
13719 | adr = AREG(7) - 2; |
13720 | AREG(7) = adr; |
13721 | PRE_IO |
13722 | READ_WORD_F(adr, res) |
13723 | flag_C = 0; |
13724 | flag_V = 0; |
13725 | flag_NotZ = res; |
13726 | flag_N = res >> 8; |
13727 | adr = AREG((Opcode >> 9) & 7); |
13728 | WRITE_WORD_F(adr, res) |
13729 | POST_IO |
13730 | RET(14) |
13731 | } |
13732 | |
13733 | // MOVEW |
13734 | OPCODE(0x30E7) |
13735 | { |
13736 | u32 adr, res; |
13737 | u32 src, dst; |
13738 | |
13739 | adr = AREG(7) - 2; |
13740 | AREG(7) = adr; |
13741 | PRE_IO |
13742 | READ_WORD_F(adr, res) |
13743 | flag_C = 0; |
13744 | flag_V = 0; |
13745 | flag_NotZ = res; |
13746 | flag_N = res >> 8; |
13747 | adr = AREG((Opcode >> 9) & 7); |
13748 | AREG((Opcode >> 9) & 7) += 2; |
13749 | WRITE_WORD_F(adr, res) |
13750 | POST_IO |
13751 | RET(14) |
13752 | } |
13753 | |
13754 | // MOVEW |
13755 | OPCODE(0x3127) |
13756 | { |
13757 | u32 adr, res; |
13758 | u32 src, dst; |
13759 | |
13760 | adr = AREG(7) - 2; |
13761 | AREG(7) = adr; |
13762 | PRE_IO |
13763 | READ_WORD_F(adr, res) |
13764 | flag_C = 0; |
13765 | flag_V = 0; |
13766 | flag_NotZ = res; |
13767 | flag_N = res >> 8; |
13768 | adr = AREG((Opcode >> 9) & 7) - 2; |
13769 | AREG((Opcode >> 9) & 7) = adr; |
13770 | WRITE_WORD_F(adr, res) |
13771 | POST_IO |
13772 | RET(14) |
13773 | } |
13774 | |
13775 | // MOVEW |
13776 | OPCODE(0x3167) |
13777 | { |
13778 | u32 adr, res; |
13779 | u32 src, dst; |
13780 | |
13781 | adr = AREG(7) - 2; |
13782 | AREG(7) = adr; |
13783 | PRE_IO |
13784 | READ_WORD_F(adr, res) |
13785 | flag_C = 0; |
13786 | flag_V = 0; |
13787 | flag_NotZ = res; |
13788 | flag_N = res >> 8; |
13789 | FETCH_SWORD(adr); |
13790 | adr += AREG((Opcode >> 9) & 7); |
13791 | WRITE_WORD_F(adr, res) |
13792 | POST_IO |
13793 | RET(18) |
13794 | } |
13795 | |
13796 | // MOVEW |
13797 | OPCODE(0x31A7) |
13798 | { |
13799 | u32 adr, res; |
13800 | u32 src, dst; |
13801 | |
13802 | adr = AREG(7) - 2; |
13803 | AREG(7) = adr; |
13804 | PRE_IO |
13805 | READ_WORD_F(adr, res) |
13806 | flag_C = 0; |
13807 | flag_V = 0; |
13808 | flag_NotZ = res; |
13809 | flag_N = res >> 8; |
13810 | adr = AREG((Opcode >> 9) & 7); |
13811 | DECODE_EXT_WORD |
13812 | WRITE_WORD_F(adr, res) |
13813 | POST_IO |
13814 | RET(20) |
13815 | } |
13816 | |
13817 | // MOVEW |
13818 | OPCODE(0x31E7) |
13819 | { |
13820 | u32 adr, res; |
13821 | u32 src, dst; |
13822 | |
13823 | adr = AREG(7) - 2; |
13824 | AREG(7) = adr; |
13825 | PRE_IO |
13826 | READ_WORD_F(adr, res) |
13827 | flag_C = 0; |
13828 | flag_V = 0; |
13829 | flag_NotZ = res; |
13830 | flag_N = res >> 8; |
13831 | FETCH_SWORD(adr); |
13832 | WRITE_WORD_F(adr, res) |
13833 | POST_IO |
13834 | RET(18) |
13835 | } |
13836 | |
13837 | // MOVEW |
13838 | OPCODE(0x33E7) |
13839 | { |
13840 | u32 adr, res; |
13841 | u32 src, dst; |
13842 | |
13843 | adr = AREG(7) - 2; |
13844 | AREG(7) = adr; |
13845 | PRE_IO |
13846 | READ_WORD_F(adr, res) |
13847 | flag_C = 0; |
13848 | flag_V = 0; |
13849 | flag_NotZ = res; |
13850 | flag_N = res >> 8; |
13851 | FETCH_LONG(adr); |
13852 | WRITE_WORD_F(adr, res) |
13853 | POST_IO |
13854 | RET(22) |
13855 | } |
13856 | |
13857 | // MOVEW |
13858 | OPCODE(0x3EE7) |
13859 | { |
13860 | u32 adr, res; |
13861 | u32 src, dst; |
13862 | |
13863 | adr = AREG(7) - 2; |
13864 | AREG(7) = adr; |
13865 | PRE_IO |
13866 | READ_WORD_F(adr, res) |
13867 | flag_C = 0; |
13868 | flag_V = 0; |
13869 | flag_NotZ = res; |
13870 | flag_N = res >> 8; |
13871 | adr = AREG(7); |
13872 | AREG(7) += 2; |
13873 | WRITE_WORD_F(adr, res) |
13874 | POST_IO |
13875 | RET(14) |
13876 | } |
13877 | |
13878 | // MOVEW |
13879 | OPCODE(0x3F27) |
13880 | { |
13881 | u32 adr, res; |
13882 | u32 src, dst; |
13883 | |
13884 | adr = AREG(7) - 2; |
13885 | AREG(7) = adr; |
13886 | PRE_IO |
13887 | READ_WORD_F(adr, res) |
13888 | flag_C = 0; |
13889 | flag_V = 0; |
13890 | flag_NotZ = res; |
13891 | flag_N = res >> 8; |
13892 | adr = AREG(7) - 2; |
13893 | AREG(7) = adr; |
13894 | WRITE_WORD_F(adr, res) |
13895 | POST_IO |
13896 | RET(14) |
13897 | } |
13898 | |
13899 | // MOVEAW |
13900 | OPCODE(0x3040) |
13901 | { |
13902 | u32 adr, res; |
13903 | u32 src, dst; |
13904 | |
13905 | res = (s32)DREGs16((Opcode >> 0) & 7); |
13906 | AREG((Opcode >> 9) & 7) = res; |
13907 | RET(4) |
13908 | } |
13909 | |
13910 | // MOVEAW |
13911 | OPCODE(0x3048) |
13912 | { |
13913 | u32 adr, res; |
13914 | u32 src, dst; |
13915 | |
13916 | res = (s32)AREGs16((Opcode >> 0) & 7); |
13917 | AREG((Opcode >> 9) & 7) = res; |
13918 | RET(4) |
13919 | } |
13920 | |
13921 | // MOVEAW |
13922 | OPCODE(0x3050) |
13923 | { |
13924 | u32 adr, res; |
13925 | u32 src, dst; |
13926 | |
13927 | adr = AREG((Opcode >> 0) & 7); |
13928 | PRE_IO |
13929 | READSX_WORD_F(adr, res) |
13930 | AREG((Opcode >> 9) & 7) = res; |
13931 | POST_IO |
13932 | RET(8) |
13933 | } |
13934 | |
13935 | // MOVEAW |
13936 | OPCODE(0x3058) |
13937 | { |
13938 | u32 adr, res; |
13939 | u32 src, dst; |
13940 | |
13941 | adr = AREG((Opcode >> 0) & 7); |
13942 | AREG((Opcode >> 0) & 7) += 2; |
13943 | PRE_IO |
13944 | READSX_WORD_F(adr, res) |
13945 | AREG((Opcode >> 9) & 7) = res; |
13946 | POST_IO |
13947 | RET(8) |
13948 | } |
13949 | |
13950 | // MOVEAW |
13951 | OPCODE(0x3060) |
13952 | { |
13953 | u32 adr, res; |
13954 | u32 src, dst; |
13955 | |
13956 | adr = AREG((Opcode >> 0) & 7) - 2; |
13957 | AREG((Opcode >> 0) & 7) = adr; |
13958 | PRE_IO |
13959 | READSX_WORD_F(adr, res) |
13960 | AREG((Opcode >> 9) & 7) = res; |
13961 | POST_IO |
13962 | RET(10) |
13963 | } |
13964 | |
13965 | // MOVEAW |
13966 | OPCODE(0x3068) |
13967 | { |
13968 | u32 adr, res; |
13969 | u32 src, dst; |
13970 | |
13971 | FETCH_SWORD(adr); |
13972 | adr += AREG((Opcode >> 0) & 7); |
13973 | PRE_IO |
13974 | READSX_WORD_F(adr, res) |
13975 | AREG((Opcode >> 9) & 7) = res; |
13976 | POST_IO |
13977 | RET(12) |
13978 | } |
13979 | |
13980 | // MOVEAW |
13981 | OPCODE(0x3070) |
13982 | { |
13983 | u32 adr, res; |
13984 | u32 src, dst; |
13985 | |
13986 | adr = AREG((Opcode >> 0) & 7); |
13987 | DECODE_EXT_WORD |
13988 | PRE_IO |
13989 | READSX_WORD_F(adr, res) |
13990 | AREG((Opcode >> 9) & 7) = res; |
13991 | POST_IO |
13992 | RET(14) |
13993 | } |
13994 | |
13995 | // MOVEAW |
13996 | OPCODE(0x3078) |
13997 | { |
13998 | u32 adr, res; |
13999 | u32 src, dst; |
14000 | |
14001 | FETCH_SWORD(adr); |
14002 | PRE_IO |
14003 | READSX_WORD_F(adr, res) |
14004 | AREG((Opcode >> 9) & 7) = res; |
14005 | POST_IO |
14006 | RET(12) |
14007 | } |
14008 | |
14009 | // MOVEAW |
14010 | OPCODE(0x3079) |
14011 | { |
14012 | u32 adr, res; |
14013 | u32 src, dst; |
14014 | |
14015 | FETCH_LONG(adr); |
14016 | PRE_IO |
14017 | READSX_WORD_F(adr, res) |
14018 | AREG((Opcode >> 9) & 7) = res; |
14019 | POST_IO |
14020 | RET(16) |
14021 | } |
14022 | |
14023 | // MOVEAW |
14024 | OPCODE(0x307A) |
14025 | { |
14026 | u32 adr, res; |
14027 | u32 src, dst; |
14028 | |
be26eb23 |
14029 | adr = GET_SWORD + GET_PC; |
70357ce5 |
14030 | PC++; |
14031 | PRE_IO |
14032 | READSX_WORD_F(adr, res) |
14033 | AREG((Opcode >> 9) & 7) = res; |
14034 | POST_IO |
14035 | RET(12) |
14036 | } |
14037 | |
14038 | // MOVEAW |
14039 | OPCODE(0x307B) |
14040 | { |
14041 | u32 adr, res; |
14042 | u32 src, dst; |
14043 | |
be26eb23 |
14044 | adr = GET_PC; |
70357ce5 |
14045 | DECODE_EXT_WORD |
14046 | PRE_IO |
14047 | READSX_WORD_F(adr, res) |
14048 | AREG((Opcode >> 9) & 7) = res; |
14049 | POST_IO |
14050 | RET(14) |
14051 | } |
14052 | |
14053 | // MOVEAW |
14054 | OPCODE(0x307C) |
14055 | { |
14056 | u32 adr, res; |
14057 | u32 src, dst; |
14058 | |
14059 | FETCH_SWORD(res); |
14060 | AREG((Opcode >> 9) & 7) = res; |
14061 | RET(8) |
14062 | } |
14063 | |
14064 | // MOVEAW |
14065 | OPCODE(0x305F) |
14066 | { |
14067 | u32 adr, res; |
14068 | u32 src, dst; |
14069 | |
14070 | adr = AREG(7); |
14071 | AREG(7) += 2; |
14072 | PRE_IO |
14073 | READSX_WORD_F(adr, res) |
14074 | AREG((Opcode >> 9) & 7) = res; |
14075 | POST_IO |
14076 | RET(8) |
14077 | } |
14078 | |
14079 | // MOVEAW |
14080 | OPCODE(0x3067) |
14081 | { |
14082 | u32 adr, res; |
14083 | u32 src, dst; |
14084 | |
14085 | adr = AREG(7) - 2; |
14086 | AREG(7) = adr; |
14087 | PRE_IO |
14088 | READSX_WORD_F(adr, res) |
14089 | AREG((Opcode >> 9) & 7) = res; |
14090 | POST_IO |
14091 | RET(10) |
14092 | } |
14093 | |
14094 | // NEGX |
14095 | OPCODE(0x4000) |
14096 | { |
14097 | u32 adr, res; |
14098 | u32 src, dst; |
14099 | |
14100 | src = DREGu8((Opcode >> 0) & 7); |
14101 | res = -src - ((flag_X >> 8) & 1); |
14102 | flag_V = res & src; |
14103 | flag_N = flag_X = flag_C = res; |
14104 | flag_NotZ |= res & 0xFF; |
14105 | DREGu8((Opcode >> 0) & 7) = res; |
14106 | RET(4) |
14107 | } |
14108 | |
14109 | // NEGX |
14110 | OPCODE(0x4010) |
14111 | { |
14112 | u32 adr, res; |
14113 | u32 src, dst; |
14114 | |
14115 | adr = AREG((Opcode >> 0) & 7); |
14116 | PRE_IO |
14117 | READ_BYTE_F(adr, src) |
14118 | res = -src - ((flag_X >> 8) & 1); |
14119 | flag_V = res & src; |
14120 | flag_N = flag_X = flag_C = res; |
14121 | flag_NotZ |= res & 0xFF; |
14122 | WRITE_BYTE_F(adr, res) |
14123 | POST_IO |
14124 | RET(12) |
14125 | } |
14126 | |
14127 | // NEGX |
14128 | OPCODE(0x4018) |
14129 | { |
14130 | u32 adr, res; |
14131 | u32 src, dst; |
14132 | |
14133 | adr = AREG((Opcode >> 0) & 7); |
14134 | AREG((Opcode >> 0) & 7) += 1; |
14135 | PRE_IO |
14136 | READ_BYTE_F(adr, src) |
14137 | res = -src - ((flag_X >> 8) & 1); |
14138 | flag_V = res & src; |
14139 | flag_N = flag_X = flag_C = res; |
14140 | flag_NotZ |= res & 0xFF; |
14141 | WRITE_BYTE_F(adr, res) |
14142 | POST_IO |
14143 | RET(12) |
14144 | } |
14145 | |
14146 | // NEGX |
14147 | OPCODE(0x4020) |
14148 | { |
14149 | u32 adr, res; |
14150 | u32 src, dst; |
14151 | |
14152 | adr = AREG((Opcode >> 0) & 7) - 1; |
14153 | AREG((Opcode >> 0) & 7) = adr; |
14154 | PRE_IO |
14155 | READ_BYTE_F(adr, src) |
14156 | res = -src - ((flag_X >> 8) & 1); |
14157 | flag_V = res & src; |
14158 | flag_N = flag_X = flag_C = res; |
14159 | flag_NotZ |= res & 0xFF; |
14160 | WRITE_BYTE_F(adr, res) |
14161 | POST_IO |
14162 | RET(14) |
14163 | } |
14164 | |
14165 | // NEGX |
14166 | OPCODE(0x4028) |
14167 | { |
14168 | u32 adr, res; |
14169 | u32 src, dst; |
14170 | |
14171 | FETCH_SWORD(adr); |
14172 | adr += AREG((Opcode >> 0) & 7); |
14173 | PRE_IO |
14174 | READ_BYTE_F(adr, src) |
14175 | res = -src - ((flag_X >> 8) & 1); |
14176 | flag_V = res & src; |
14177 | flag_N = flag_X = flag_C = res; |
14178 | flag_NotZ |= res & 0xFF; |
14179 | WRITE_BYTE_F(adr, res) |
14180 | POST_IO |
14181 | RET(16) |
14182 | } |
14183 | |
14184 | // NEGX |
14185 | OPCODE(0x4030) |
14186 | { |
14187 | u32 adr, res; |
14188 | u32 src, dst; |
14189 | |
14190 | adr = AREG((Opcode >> 0) & 7); |
14191 | DECODE_EXT_WORD |
14192 | PRE_IO |
14193 | READ_BYTE_F(adr, src) |
14194 | res = -src - ((flag_X >> 8) & 1); |
14195 | flag_V = res & src; |
14196 | flag_N = flag_X = flag_C = res; |
14197 | flag_NotZ |= res & 0xFF; |
14198 | WRITE_BYTE_F(adr, res) |
14199 | POST_IO |
14200 | RET(18) |
14201 | } |
14202 | |
14203 | // NEGX |
14204 | OPCODE(0x4038) |
14205 | { |
14206 | u32 adr, res; |
14207 | u32 src, dst; |
14208 | |
14209 | FETCH_SWORD(adr); |
14210 | PRE_IO |
14211 | READ_BYTE_F(adr, src) |
14212 | res = -src - ((flag_X >> 8) & 1); |
14213 | flag_V = res & src; |
14214 | flag_N = flag_X = flag_C = res; |
14215 | flag_NotZ |= res & 0xFF; |
14216 | WRITE_BYTE_F(adr, res) |
14217 | POST_IO |
14218 | RET(16) |
14219 | } |
14220 | |
14221 | // NEGX |
14222 | OPCODE(0x4039) |
14223 | { |
14224 | u32 adr, res; |
14225 | u32 src, dst; |
14226 | |
14227 | FETCH_LONG(adr); |
14228 | PRE_IO |
14229 | READ_BYTE_F(adr, src) |
14230 | res = -src - ((flag_X >> 8) & 1); |
14231 | flag_V = res & src; |
14232 | flag_N = flag_X = flag_C = res; |
14233 | flag_NotZ |= res & 0xFF; |
14234 | WRITE_BYTE_F(adr, res) |
14235 | POST_IO |
14236 | RET(20) |
14237 | } |
14238 | |
14239 | // NEGX |
14240 | OPCODE(0x401F) |
14241 | { |
14242 | u32 adr, res; |
14243 | u32 src, dst; |
14244 | |
14245 | adr = AREG(7); |
14246 | AREG(7) += 2; |
14247 | PRE_IO |
14248 | READ_BYTE_F(adr, src) |
14249 | res = -src - ((flag_X >> 8) & 1); |
14250 | flag_V = res & src; |
14251 | flag_N = flag_X = flag_C = res; |
14252 | flag_NotZ |= res & 0xFF; |
14253 | WRITE_BYTE_F(adr, res) |
14254 | POST_IO |
14255 | RET(12) |
14256 | } |
14257 | |
14258 | // NEGX |
14259 | OPCODE(0x4027) |
14260 | { |
14261 | u32 adr, res; |
14262 | u32 src, dst; |
14263 | |
14264 | adr = AREG(7) - 2; |
14265 | AREG(7) = adr; |
14266 | PRE_IO |
14267 | READ_BYTE_F(adr, src) |
14268 | res = -src - ((flag_X >> 8) & 1); |
14269 | flag_V = res & src; |
14270 | flag_N = flag_X = flag_C = res; |
14271 | flag_NotZ |= res & 0xFF; |
14272 | WRITE_BYTE_F(adr, res) |
14273 | POST_IO |
14274 | RET(14) |
14275 | } |
14276 | |
14277 | // NEGX |
14278 | OPCODE(0x4040) |
14279 | { |
14280 | u32 adr, res; |
14281 | u32 src, dst; |
14282 | |
14283 | src = DREGu16((Opcode >> 0) & 7); |
14284 | res = -src - ((flag_X >> 8) & 1); |
14285 | flag_V = (res & src) >> 8; |
14286 | flag_N = flag_X = flag_C = res >> 8; |
14287 | flag_NotZ |= res & 0xFFFF; |
14288 | DREGu16((Opcode >> 0) & 7) = res; |
14289 | RET(4) |
14290 | } |
14291 | |
14292 | // NEGX |
14293 | OPCODE(0x4050) |
14294 | { |
14295 | u32 adr, res; |
14296 | u32 src, dst; |
14297 | |
14298 | adr = AREG((Opcode >> 0) & 7); |
14299 | PRE_IO |
14300 | READ_WORD_F(adr, src) |
14301 | res = -src - ((flag_X >> 8) & 1); |
14302 | flag_V = (res & src) >> 8; |
14303 | flag_N = flag_X = flag_C = res >> 8; |
14304 | flag_NotZ |= res & 0xFFFF; |
14305 | WRITE_WORD_F(adr, res) |
14306 | POST_IO |
14307 | RET(12) |
14308 | } |
14309 | |
14310 | // NEGX |
14311 | OPCODE(0x4058) |
14312 | { |
14313 | u32 adr, res; |
14314 | u32 src, dst; |
14315 | |
14316 | adr = AREG((Opcode >> 0) & 7); |
14317 | AREG((Opcode >> 0) & 7) += 2; |
14318 | PRE_IO |
14319 | READ_WORD_F(adr, src) |
14320 | res = -src - ((flag_X >> 8) & 1); |
14321 | flag_V = (res & src) >> 8; |
14322 | flag_N = flag_X = flag_C = res >> 8; |
14323 | flag_NotZ |= res & 0xFFFF; |
14324 | WRITE_WORD_F(adr, res) |
14325 | POST_IO |
14326 | RET(12) |
14327 | } |
14328 | |
14329 | // NEGX |
14330 | OPCODE(0x4060) |
14331 | { |
14332 | u32 adr, res; |
14333 | u32 src, dst; |
14334 | |
14335 | adr = AREG((Opcode >> 0) & 7) - 2; |
14336 | AREG((Opcode >> 0) & 7) = adr; |
14337 | PRE_IO |
14338 | READ_WORD_F(adr, src) |
14339 | res = -src - ((flag_X >> 8) & 1); |
14340 | flag_V = (res & src) >> 8; |
14341 | flag_N = flag_X = flag_C = res >> 8; |
14342 | flag_NotZ |= res & 0xFFFF; |
14343 | WRITE_WORD_F(adr, res) |
14344 | POST_IO |
14345 | RET(14) |
14346 | } |
14347 | |
14348 | // NEGX |
14349 | OPCODE(0x4068) |
14350 | { |
14351 | u32 adr, res; |
14352 | u32 src, dst; |
14353 | |
14354 | FETCH_SWORD(adr); |
14355 | adr += AREG((Opcode >> 0) & 7); |
14356 | PRE_IO |
14357 | READ_WORD_F(adr, src) |
14358 | res = -src - ((flag_X >> 8) & 1); |
14359 | flag_V = (res & src) >> 8; |
14360 | flag_N = flag_X = flag_C = res >> 8; |
14361 | flag_NotZ |= res & 0xFFFF; |
14362 | WRITE_WORD_F(adr, res) |
14363 | POST_IO |
14364 | RET(16) |
14365 | } |
14366 | |
14367 | // NEGX |
14368 | OPCODE(0x4070) |
14369 | { |
14370 | u32 adr, res; |
14371 | u32 src, dst; |
14372 | |
14373 | adr = AREG((Opcode >> 0) & 7); |
14374 | DECODE_EXT_WORD |
14375 | PRE_IO |
14376 | READ_WORD_F(adr, src) |
14377 | res = -src - ((flag_X >> 8) & 1); |
14378 | flag_V = (res & src) >> 8; |
14379 | flag_N = flag_X = flag_C = res >> 8; |
14380 | flag_NotZ |= res & 0xFFFF; |
14381 | WRITE_WORD_F(adr, res) |
14382 | POST_IO |
14383 | RET(18) |
14384 | } |
14385 | |
14386 | // NEGX |
14387 | OPCODE(0x4078) |
14388 | { |
14389 | u32 adr, res; |
14390 | u32 src, dst; |
14391 | |
14392 | FETCH_SWORD(adr); |
14393 | PRE_IO |
14394 | READ_WORD_F(adr, src) |
14395 | res = -src - ((flag_X >> 8) & 1); |
14396 | flag_V = (res & src) >> 8; |
14397 | flag_N = flag_X = flag_C = res >> 8; |
14398 | flag_NotZ |= res & 0xFFFF; |
14399 | WRITE_WORD_F(adr, res) |
14400 | POST_IO |
14401 | RET(16) |
14402 | } |
14403 | |
14404 | // NEGX |
14405 | OPCODE(0x4079) |
14406 | { |
14407 | u32 adr, res; |
14408 | u32 src, dst; |
14409 | |
14410 | FETCH_LONG(adr); |
14411 | PRE_IO |
14412 | READ_WORD_F(adr, src) |
14413 | res = -src - ((flag_X >> 8) & 1); |
14414 | flag_V = (res & src) >> 8; |
14415 | flag_N = flag_X = flag_C = res >> 8; |
14416 | flag_NotZ |= res & 0xFFFF; |
14417 | WRITE_WORD_F(adr, res) |
14418 | POST_IO |
14419 | RET(20) |
14420 | } |
14421 | |
14422 | // NEGX |
14423 | OPCODE(0x405F) |
14424 | { |
14425 | u32 adr, res; |
14426 | u32 src, dst; |
14427 | |
14428 | adr = AREG(7); |
14429 | AREG(7) += 2; |
14430 | PRE_IO |
14431 | READ_WORD_F(adr, src) |
14432 | res = -src - ((flag_X >> 8) & 1); |
14433 | flag_V = (res & src) >> 8; |
14434 | flag_N = flag_X = flag_C = res >> 8; |
14435 | flag_NotZ |= res & 0xFFFF; |
14436 | WRITE_WORD_F(adr, res) |
14437 | POST_IO |
14438 | RET(12) |
14439 | } |
14440 | |
14441 | // NEGX |
14442 | OPCODE(0x4067) |
14443 | { |
14444 | u32 adr, res; |
14445 | u32 src, dst; |
14446 | |
14447 | adr = AREG(7) - 2; |
14448 | AREG(7) = adr; |
14449 | PRE_IO |
14450 | READ_WORD_F(adr, src) |
14451 | res = -src - ((flag_X >> 8) & 1); |
14452 | flag_V = (res & src) >> 8; |
14453 | flag_N = flag_X = flag_C = res >> 8; |
14454 | flag_NotZ |= res & 0xFFFF; |
14455 | WRITE_WORD_F(adr, res) |
14456 | POST_IO |
14457 | RET(14) |
14458 | } |
14459 | |
14460 | // NEGX |
14461 | OPCODE(0x4080) |
14462 | { |
14463 | u32 adr, res; |
14464 | u32 src, dst; |
14465 | |
14466 | src = DREGu32((Opcode >> 0) & 7); |
14467 | res = -src - ((flag_X >> 8) & 1); |
14468 | flag_NotZ |= res; |
14469 | flag_V = (res & src) >> 24; |
14470 | flag_X = flag_C = (res?1:0)<<8; |
14471 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14472 | flag_N = res >> 24; |
14473 | DREGu32((Opcode >> 0) & 7) = res; |
14474 | RET(6) |
14475 | } |
14476 | |
14477 | // NEGX |
14478 | OPCODE(0x4090) |
14479 | { |
14480 | u32 adr, res; |
14481 | u32 src, dst; |
14482 | |
14483 | adr = AREG((Opcode >> 0) & 7); |
14484 | PRE_IO |
14485 | READ_LONG_F(adr, src) |
14486 | res = -src - ((flag_X >> 8) & 1); |
14487 | flag_NotZ |= res; |
14488 | flag_V = (res & src) >> 24; |
14489 | flag_X = flag_C = (res?1:0)<<8; |
14490 | // flag_X = flag_C = ((src & res & 1) | (src >> 1) | (res >> 1)) >> 23; |
14491 | flag_N = res >> 24; |
14492 | WRITE_LONG_F(adr, res) |
14493 | POST_IO |
14494 | RET(20) |
14495 | } |
14496 | |
14497 | // NEGX |
14498 | OPCODE(0x4098) |
14499 | { |
14500 | u32 adr, res; |
14501 | u32 src, dst; |
14502 | |
14503 | adr = AREG((Opcode >> 0) & 7); |
14504 | AREG((Opcode >> 0) & 7) += 4; |
14505 | PRE_IO |
14506 | READ_LONG_F(adr, src) |
14507 | res = -src - ((flag_X >> 8) & 1); |
14508 | flag_NotZ |= res; |
14509 | flag_V = (res & src) >> 24; |
14510 | flag_X = flag_C = (res?1:0)<<8; |
14511 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14512 | flag_N = res >> 24; |
14513 | WRITE_LONG_F(adr, res) |
14514 | POST_IO |
14515 | RET(20) |
14516 | } |
14517 | |
14518 | // NEGX |
14519 | OPCODE(0x40A0) |
14520 | { |
14521 | u32 adr, res; |
14522 | u32 src, dst; |
14523 | |
14524 | adr = AREG((Opcode >> 0) & 7) - 4; |
14525 | AREG((Opcode >> 0) & 7) = adr; |
14526 | PRE_IO |
14527 | READ_LONG_F(adr, src) |
14528 | res = -src - ((flag_X >> 8) & 1); |
14529 | flag_NotZ |= res; |
14530 | flag_V = (res & src) >> 24; |
14531 | flag_X = flag_C = (res?1:0)<<8; |
14532 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14533 | flag_N = res >> 24; |
14534 | WRITE_LONG_F(adr, res) |
14535 | POST_IO |
14536 | RET(22) |
14537 | } |
14538 | |
14539 | // NEGX |
14540 | OPCODE(0x40A8) |
14541 | { |
14542 | u32 adr, res; |
14543 | u32 src, dst; |
14544 | |
14545 | FETCH_SWORD(adr); |
14546 | adr += AREG((Opcode >> 0) & 7); |
14547 | PRE_IO |
14548 | READ_LONG_F(adr, src) |
14549 | res = -src - ((flag_X >> 8) & 1); |
14550 | flag_NotZ |= res; |
14551 | flag_V = (res & src) >> 24; |
14552 | flag_X = flag_C = (res?1:0)<<8; |
14553 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14554 | flag_N = res >> 24; |
14555 | WRITE_LONG_F(adr, res) |
14556 | POST_IO |
14557 | RET(24) |
14558 | } |
14559 | |
14560 | // NEGX |
14561 | OPCODE(0x40B0) |
14562 | { |
14563 | u32 adr, res; |
14564 | u32 src, dst; |
14565 | |
14566 | adr = AREG((Opcode >> 0) & 7); |
14567 | DECODE_EXT_WORD |
14568 | PRE_IO |
14569 | READ_LONG_F(adr, src) |
14570 | res = -src - ((flag_X >> 8) & 1); |
14571 | flag_NotZ |= res; |
14572 | flag_V = (res & src) >> 24; |
14573 | flag_X = flag_C = (res?1:0)<<8; |
14574 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14575 | flag_N = res >> 24; |
14576 | WRITE_LONG_F(adr, res) |
14577 | POST_IO |
14578 | RET(26) |
14579 | } |
14580 | |
14581 | // NEGX |
14582 | OPCODE(0x40B8) |
14583 | { |
14584 | u32 adr, res; |
14585 | u32 src, dst; |
14586 | |
14587 | FETCH_SWORD(adr); |
14588 | PRE_IO |
14589 | READ_LONG_F(adr, src) |
14590 | res = -src - ((flag_X >> 8) & 1); |
14591 | flag_NotZ |= res; |
14592 | flag_V = (res & src) >> 24; |
14593 | flag_X = flag_C = (res?1:0)<<8; |
14594 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14595 | flag_N = res >> 24; |
14596 | WRITE_LONG_F(adr, res) |
14597 | POST_IO |
14598 | RET(24) |
14599 | } |
14600 | |
14601 | // NEGX |
14602 | OPCODE(0x40B9) |
14603 | { |
14604 | u32 adr, res; |
14605 | u32 src, dst; |
14606 | |
14607 | FETCH_LONG(adr); |
14608 | PRE_IO |
14609 | READ_LONG_F(adr, src) |
14610 | res = -src - ((flag_X >> 8) & 1); |
14611 | flag_NotZ |= res; |
14612 | flag_V = (res & src) >> 24; |
14613 | flag_X = flag_C = (res?1:0)<<8; |
14614 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14615 | flag_N = res >> 24; |
14616 | WRITE_LONG_F(adr, res) |
14617 | POST_IO |
14618 | RET(28) |
14619 | } |
14620 | |
14621 | // NEGX |
14622 | OPCODE(0x409F) |
14623 | { |
14624 | u32 adr, res; |
14625 | u32 src, dst; |
14626 | |
14627 | adr = AREG(7); |
14628 | AREG(7) += 4; |
14629 | PRE_IO |
14630 | READ_LONG_F(adr, src) |
14631 | res = -src - ((flag_X >> 8) & 1); |
14632 | flag_NotZ |= res; |
14633 | flag_V = (res & src) >> 24; |
14634 | flag_X = flag_C = (res?1:0)<<8; |
14635 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14636 | flag_N = res >> 24; |
14637 | WRITE_LONG_F(adr, res) |
14638 | POST_IO |
14639 | RET(20) |
14640 | } |
14641 | |
14642 | // NEGX |
14643 | OPCODE(0x40A7) |
14644 | { |
14645 | u32 adr, res; |
14646 | u32 src, dst; |
14647 | |
14648 | adr = AREG(7) - 4; |
14649 | AREG(7) = adr; |
14650 | PRE_IO |
14651 | READ_LONG_F(adr, src) |
14652 | res = -src - ((flag_X >> 8) & 1); |
14653 | flag_NotZ |= res; |
14654 | flag_V = (res & src) >> 24; |
14655 | flag_X = flag_C = (res?1:0)<<8; |
14656 | // flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
14657 | flag_N = res >> 24; |
14658 | WRITE_LONG_F(adr, res) |
14659 | POST_IO |
14660 | RET(22) |
14661 | } |
14662 | |
14663 | // CLR |
14664 | OPCODE(0x4200) |
14665 | { |
14666 | u32 adr, res; |
14667 | u32 src, dst; |
14668 | |
14669 | res = 0; |
14670 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14671 | DREGu8((Opcode >> 0) & 7) = res; |
14672 | RET(4) |
14673 | } |
14674 | |
14675 | // CLR |
14676 | OPCODE(0x4210) |
14677 | { |
14678 | u32 adr, res; |
14679 | u32 src, dst; |
14680 | |
14681 | adr = AREG((Opcode >> 0) & 7); |
14682 | res = 0; |
14683 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14684 | PRE_IO |
14685 | WRITE_BYTE_F(adr, res) |
14686 | POST_IO |
14687 | RET(12) |
14688 | } |
14689 | |
14690 | // CLR |
14691 | OPCODE(0x4218) |
14692 | { |
14693 | u32 adr, res; |
14694 | u32 src, dst; |
14695 | |
14696 | adr = AREG((Opcode >> 0) & 7); |
14697 | AREG((Opcode >> 0) & 7) += 1; |
14698 | res = 0; |
14699 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14700 | PRE_IO |
14701 | WRITE_BYTE_F(adr, res) |
14702 | POST_IO |
14703 | RET(12) |
14704 | } |
14705 | |
14706 | // CLR |
14707 | OPCODE(0x4220) |
14708 | { |
14709 | u32 adr, res; |
14710 | u32 src, dst; |
14711 | |
14712 | adr = AREG((Opcode >> 0) & 7) - 1; |
14713 | AREG((Opcode >> 0) & 7) = adr; |
14714 | res = 0; |
14715 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14716 | PRE_IO |
14717 | WRITE_BYTE_F(adr, res) |
14718 | POST_IO |
14719 | RET(14) |
14720 | } |
14721 | |
14722 | // CLR |
14723 | OPCODE(0x4228) |
14724 | { |
14725 | u32 adr, res; |
14726 | u32 src, dst; |
14727 | |
14728 | FETCH_SWORD(adr); |
14729 | adr += AREG((Opcode >> 0) & 7); |
14730 | res = 0; |
14731 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14732 | PRE_IO |
14733 | WRITE_BYTE_F(adr, res) |
14734 | POST_IO |
14735 | RET(16) |
14736 | } |
14737 | |
14738 | // CLR |
14739 | OPCODE(0x4230) |
14740 | { |
14741 | u32 adr, res; |
14742 | u32 src, dst; |
14743 | |
14744 | adr = AREG((Opcode >> 0) & 7); |
14745 | DECODE_EXT_WORD |
14746 | res = 0; |
14747 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14748 | PRE_IO |
14749 | WRITE_BYTE_F(adr, res) |
14750 | POST_IO |
14751 | RET(18) |
14752 | } |
14753 | |
14754 | // CLR |
14755 | OPCODE(0x4238) |
14756 | { |
14757 | u32 adr, res; |
14758 | u32 src, dst; |
14759 | |
14760 | FETCH_SWORD(adr); |
14761 | res = 0; |
14762 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14763 | PRE_IO |
14764 | WRITE_BYTE_F(adr, res) |
14765 | POST_IO |
14766 | RET(16) |
14767 | } |
14768 | |
14769 | // CLR |
14770 | OPCODE(0x4239) |
14771 | { |
14772 | u32 adr, res; |
14773 | u32 src, dst; |
14774 | |
14775 | FETCH_LONG(adr); |
14776 | res = 0; |
14777 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14778 | PRE_IO |
14779 | WRITE_BYTE_F(adr, res) |
14780 | POST_IO |
14781 | RET(20) |
14782 | } |
14783 | |
14784 | // CLR |
14785 | OPCODE(0x421F) |
14786 | { |
14787 | u32 adr, res; |
14788 | u32 src, dst; |
14789 | |
14790 | adr = AREG(7); |
14791 | AREG(7) += 2; |
14792 | res = 0; |
14793 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14794 | PRE_IO |
14795 | WRITE_BYTE_F(adr, res) |
14796 | POST_IO |
14797 | RET(12) |
14798 | } |
14799 | |
14800 | // CLR |
14801 | OPCODE(0x4227) |
14802 | { |
14803 | u32 adr, res; |
14804 | u32 src, dst; |
14805 | |
14806 | adr = AREG(7) - 2; |
14807 | AREG(7) = adr; |
14808 | res = 0; |
14809 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14810 | PRE_IO |
14811 | WRITE_BYTE_F(adr, res) |
14812 | POST_IO |
14813 | RET(14) |
14814 | } |
14815 | |
14816 | // CLR |
14817 | OPCODE(0x4240) |
14818 | { |
14819 | u32 adr, res; |
14820 | u32 src, dst; |
14821 | |
14822 | res = 0; |
14823 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14824 | DREGu16((Opcode >> 0) & 7) = res; |
14825 | RET(4) |
14826 | } |
14827 | |
14828 | // CLR |
14829 | OPCODE(0x4250) |
14830 | { |
14831 | u32 adr, res; |
14832 | u32 src, dst; |
14833 | |
14834 | adr = AREG((Opcode >> 0) & 7); |
14835 | res = 0; |
14836 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14837 | PRE_IO |
14838 | WRITE_WORD_F(adr, res) |
14839 | POST_IO |
14840 | RET(12) |
14841 | } |
14842 | |
14843 | // CLR |
14844 | OPCODE(0x4258) |
14845 | { |
14846 | u32 adr, res; |
14847 | u32 src, dst; |
14848 | |
14849 | adr = AREG((Opcode >> 0) & 7); |
14850 | AREG((Opcode >> 0) & 7) += 2; |
14851 | res = 0; |
14852 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14853 | PRE_IO |
14854 | WRITE_WORD_F(adr, res) |
14855 | POST_IO |
14856 | RET(12) |
14857 | } |
14858 | |
14859 | // CLR |
14860 | OPCODE(0x4260) |
14861 | { |
14862 | u32 adr, res; |
14863 | u32 src, dst; |
14864 | |
14865 | adr = AREG((Opcode >> 0) & 7) - 2; |
14866 | AREG((Opcode >> 0) & 7) = adr; |
14867 | res = 0; |
14868 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14869 | PRE_IO |
14870 | WRITE_WORD_F(adr, res) |
14871 | POST_IO |
14872 | RET(14) |
14873 | } |
14874 | |
14875 | // CLR |
14876 | OPCODE(0x4268) |
14877 | { |
14878 | u32 adr, res; |
14879 | u32 src, dst; |
14880 | |
14881 | FETCH_SWORD(adr); |
14882 | adr += AREG((Opcode >> 0) & 7); |
14883 | res = 0; |
14884 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14885 | PRE_IO |
14886 | WRITE_WORD_F(adr, res) |
14887 | POST_IO |
14888 | RET(16) |
14889 | } |
14890 | |
14891 | // CLR |
14892 | OPCODE(0x4270) |
14893 | { |
14894 | u32 adr, res; |
14895 | u32 src, dst; |
14896 | |
14897 | adr = AREG((Opcode >> 0) & 7); |
14898 | DECODE_EXT_WORD |
14899 | res = 0; |
14900 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14901 | PRE_IO |
14902 | WRITE_WORD_F(adr, res) |
14903 | POST_IO |
14904 | RET(18) |
14905 | } |
14906 | |
14907 | // CLR |
14908 | OPCODE(0x4278) |
14909 | { |
14910 | u32 adr, res; |
14911 | u32 src, dst; |
14912 | |
14913 | FETCH_SWORD(adr); |
14914 | res = 0; |
14915 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14916 | PRE_IO |
14917 | WRITE_WORD_F(adr, res) |
14918 | POST_IO |
14919 | RET(16) |
14920 | } |
14921 | |
14922 | // CLR |
14923 | OPCODE(0x4279) |
14924 | { |
14925 | u32 adr, res; |
14926 | u32 src, dst; |
14927 | |
14928 | FETCH_LONG(adr); |
14929 | res = 0; |
14930 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14931 | PRE_IO |
14932 | WRITE_WORD_F(adr, res) |
14933 | POST_IO |
14934 | RET(20) |
14935 | } |
14936 | |
14937 | // CLR |
14938 | OPCODE(0x425F) |
14939 | { |
14940 | u32 adr, res; |
14941 | u32 src, dst; |
14942 | |
14943 | adr = AREG(7); |
14944 | AREG(7) += 2; |
14945 | res = 0; |
14946 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14947 | PRE_IO |
14948 | WRITE_WORD_F(adr, res) |
14949 | POST_IO |
14950 | RET(12) |
14951 | } |
14952 | |
14953 | // CLR |
14954 | OPCODE(0x4267) |
14955 | { |
14956 | u32 adr, res; |
14957 | u32 src, dst; |
14958 | |
14959 | adr = AREG(7) - 2; |
14960 | AREG(7) = adr; |
14961 | res = 0; |
14962 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14963 | PRE_IO |
14964 | WRITE_WORD_F(adr, res) |
14965 | POST_IO |
14966 | RET(14) |
14967 | } |
14968 | |
14969 | // CLR |
14970 | OPCODE(0x4280) |
14971 | { |
14972 | u32 adr, res; |
14973 | u32 src, dst; |
14974 | |
14975 | res = 0; |
14976 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14977 | DREGu32((Opcode >> 0) & 7) = res; |
14978 | RET(6) |
14979 | } |
14980 | |
14981 | // CLR |
14982 | OPCODE(0x4290) |
14983 | { |
14984 | u32 adr, res; |
14985 | u32 src, dst; |
14986 | |
14987 | adr = AREG((Opcode >> 0) & 7); |
14988 | res = 0; |
14989 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
14990 | PRE_IO |
14991 | WRITE_LONG_F(adr, res) |
14992 | POST_IO |
14993 | RET(20) |
14994 | } |
14995 | |
14996 | // CLR |
14997 | OPCODE(0x4298) |
14998 | { |
14999 | u32 adr, res; |
15000 | u32 src, dst; |
15001 | |
15002 | adr = AREG((Opcode >> 0) & 7); |
15003 | AREG((Opcode >> 0) & 7) += 4; |
15004 | res = 0; |
15005 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15006 | PRE_IO |
15007 | WRITE_LONG_F(adr, res) |
15008 | POST_IO |
15009 | RET(20) |
15010 | } |
15011 | |
15012 | // CLR |
15013 | OPCODE(0x42A0) |
15014 | { |
15015 | u32 adr, res; |
15016 | u32 src, dst; |
15017 | |
15018 | adr = AREG((Opcode >> 0) & 7) - 4; |
15019 | AREG((Opcode >> 0) & 7) = adr; |
15020 | res = 0; |
15021 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15022 | PRE_IO |
15023 | WRITE_LONG_F(adr, res) |
15024 | POST_IO |
15025 | RET(22) |
15026 | } |
15027 | |
15028 | // CLR |
15029 | OPCODE(0x42A8) |
15030 | { |
15031 | u32 adr, res; |
15032 | u32 src, dst; |
15033 | |
15034 | FETCH_SWORD(adr); |
15035 | adr += AREG((Opcode >> 0) & 7); |
15036 | res = 0; |
15037 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15038 | PRE_IO |
15039 | WRITE_LONG_F(adr, res) |
15040 | POST_IO |
15041 | RET(24) |
15042 | } |
15043 | |
15044 | // CLR |
15045 | OPCODE(0x42B0) |
15046 | { |
15047 | u32 adr, res; |
15048 | u32 src, dst; |
15049 | |
15050 | adr = AREG((Opcode >> 0) & 7); |
15051 | DECODE_EXT_WORD |
15052 | res = 0; |
15053 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15054 | PRE_IO |
15055 | WRITE_LONG_F(adr, res) |
15056 | POST_IO |
15057 | RET(26) |
15058 | } |
15059 | |
15060 | // CLR |
15061 | OPCODE(0x42B8) |
15062 | { |
15063 | u32 adr, res; |
15064 | u32 src, dst; |
15065 | |
15066 | FETCH_SWORD(adr); |
15067 | res = 0; |
15068 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15069 | PRE_IO |
15070 | WRITE_LONG_F(adr, res) |
15071 | POST_IO |
15072 | RET(24) |
15073 | } |
15074 | |
15075 | // CLR |
15076 | OPCODE(0x42B9) |
15077 | { |
15078 | u32 adr, res; |
15079 | u32 src, dst; |
15080 | |
15081 | FETCH_LONG(adr); |
15082 | res = 0; |
15083 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15084 | PRE_IO |
15085 | WRITE_LONG_F(adr, res) |
15086 | POST_IO |
15087 | RET(28) |
15088 | } |
15089 | |
15090 | // CLR |
15091 | OPCODE(0x429F) |
15092 | { |
15093 | u32 adr, res; |
15094 | u32 src, dst; |
15095 | |
15096 | adr = AREG(7); |
15097 | AREG(7) += 4; |
15098 | res = 0; |
15099 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15100 | PRE_IO |
15101 | WRITE_LONG_F(adr, res) |
15102 | POST_IO |
15103 | RET(20) |
15104 | } |
15105 | |
15106 | // CLR |
15107 | OPCODE(0x42A7) |
15108 | { |
15109 | u32 adr, res; |
15110 | u32 src, dst; |
15111 | |
15112 | adr = AREG(7) - 4; |
15113 | AREG(7) = adr; |
15114 | res = 0; |
15115 | flag_N = flag_NotZ = flag_V = flag_C = 0; |
15116 | PRE_IO |
15117 | WRITE_LONG_F(adr, res) |
15118 | POST_IO |
15119 | RET(22) |
15120 | } |
15121 | |
15122 | // NEG |
15123 | OPCODE(0x4400) |
15124 | { |
15125 | u32 adr, res; |
15126 | u32 src, dst; |
15127 | |
15128 | src = DREGu8((Opcode >> 0) & 7); |
15129 | res = -src; |
15130 | flag_V = res & src; |
15131 | flag_N = flag_X = flag_C = res; |
15132 | flag_NotZ = res & 0xFF; |
15133 | DREGu8((Opcode >> 0) & 7) = res; |
15134 | RET(4) |
15135 | } |
15136 | |
15137 | // NEG |
15138 | OPCODE(0x4410) |
15139 | { |
15140 | u32 adr, res; |
15141 | u32 src, dst; |
15142 | |
15143 | adr = AREG((Opcode >> 0) & 7); |
15144 | PRE_IO |
15145 | READ_BYTE_F(adr, src) |
15146 | res = -src; |
15147 | flag_V = res & src; |
15148 | flag_N = flag_X = flag_C = res; |
15149 | flag_NotZ = res & 0xFF; |
15150 | WRITE_BYTE_F(adr, res) |
15151 | POST_IO |
15152 | RET(12) |
15153 | } |
15154 | |
15155 | // NEG |
15156 | OPCODE(0x4418) |
15157 | { |
15158 | u32 adr, res; |
15159 | u32 src, dst; |
15160 | |
15161 | adr = AREG((Opcode >> 0) & 7); |
15162 | AREG((Opcode >> 0) & 7) += 1; |
15163 | PRE_IO |
15164 | READ_BYTE_F(adr, src) |
15165 | res = -src; |
15166 | flag_V = res & src; |
15167 | flag_N = flag_X = flag_C = res; |
15168 | flag_NotZ = res & 0xFF; |
15169 | WRITE_BYTE_F(adr, res) |
15170 | POST_IO |
15171 | RET(12) |
15172 | } |
15173 | |
15174 | // NEG |
15175 | OPCODE(0x4420) |
15176 | { |
15177 | u32 adr, res; |
15178 | u32 src, dst; |
15179 | |
15180 | adr = AREG((Opcode >> 0) & 7) - 1; |
15181 | AREG((Opcode >> 0) & 7) = adr; |
15182 | PRE_IO |
15183 | READ_BYTE_F(adr, src) |
15184 | res = -src; |
15185 | flag_V = res & src; |
15186 | flag_N = flag_X = flag_C = res; |
15187 | flag_NotZ = res & 0xFF; |
15188 | WRITE_BYTE_F(adr, res) |
15189 | POST_IO |
15190 | RET(14) |
15191 | } |
15192 | |
15193 | // NEG |
15194 | OPCODE(0x4428) |
15195 | { |
15196 | u32 adr, res; |
15197 | u32 src, dst; |
15198 | |
15199 | FETCH_SWORD(adr); |
15200 | adr += AREG((Opcode >> 0) & 7); |
15201 | PRE_IO |
15202 | READ_BYTE_F(adr, src) |
15203 | res = -src; |
15204 | flag_V = res & src; |
15205 | flag_N = flag_X = flag_C = res; |
15206 | flag_NotZ = res & 0xFF; |
15207 | WRITE_BYTE_F(adr, res) |
15208 | POST_IO |
15209 | RET(16) |
15210 | } |
15211 | |
15212 | // NEG |
15213 | OPCODE(0x4430) |
15214 | { |
15215 | u32 adr, res; |
15216 | u32 src, dst; |
15217 | |
15218 | adr = AREG((Opcode >> 0) & 7); |
15219 | DECODE_EXT_WORD |
15220 | PRE_IO |
15221 | READ_BYTE_F(adr, src) |
15222 | res = -src; |
15223 | flag_V = res & src; |
15224 | flag_N = flag_X = flag_C = res; |
15225 | flag_NotZ = res & 0xFF; |
15226 | WRITE_BYTE_F(adr, res) |
15227 | POST_IO |
15228 | RET(18) |
15229 | } |
15230 | |
15231 | // NEG |
15232 | OPCODE(0x4438) |
15233 | { |
15234 | u32 adr, res; |
15235 | u32 src, dst; |
15236 | |
15237 | FETCH_SWORD(adr); |
15238 | PRE_IO |
15239 | READ_BYTE_F(adr, src) |
15240 | res = -src; |
15241 | flag_V = res & src; |
15242 | flag_N = flag_X = flag_C = res; |
15243 | flag_NotZ = res & 0xFF; |
15244 | WRITE_BYTE_F(adr, res) |
15245 | POST_IO |
15246 | RET(16) |
15247 | } |
15248 | |
15249 | // NEG |
15250 | OPCODE(0x4439) |
15251 | { |
15252 | u32 adr, res; |
15253 | u32 src, dst; |
15254 | |
15255 | FETCH_LONG(adr); |
15256 | PRE_IO |
15257 | READ_BYTE_F(adr, src) |
15258 | res = -src; |
15259 | flag_V = res & src; |
15260 | flag_N = flag_X = flag_C = res; |
15261 | flag_NotZ = res & 0xFF; |
15262 | WRITE_BYTE_F(adr, res) |
15263 | POST_IO |
15264 | RET(20) |
15265 | } |
15266 | |
15267 | // NEG |
15268 | OPCODE(0x441F) |
15269 | { |
15270 | u32 adr, res; |
15271 | u32 src, dst; |
15272 | |
15273 | adr = AREG(7); |
15274 | AREG(7) += 2; |
15275 | PRE_IO |
15276 | READ_BYTE_F(adr, src) |
15277 | res = -src; |
15278 | flag_V = res & src; |
15279 | flag_N = flag_X = flag_C = res; |
15280 | flag_NotZ = res & 0xFF; |
15281 | WRITE_BYTE_F(adr, res) |
15282 | POST_IO |
15283 | RET(12) |
15284 | } |
15285 | |
15286 | // NEG |
15287 | OPCODE(0x4427) |
15288 | { |
15289 | u32 adr, res; |
15290 | u32 src, dst; |
15291 | |
15292 | adr = AREG(7) - 2; |
15293 | AREG(7) = adr; |
15294 | PRE_IO |
15295 | READ_BYTE_F(adr, src) |
15296 | res = -src; |
15297 | flag_V = res & src; |
15298 | flag_N = flag_X = flag_C = res; |
15299 | flag_NotZ = res & 0xFF; |
15300 | WRITE_BYTE_F(adr, res) |
15301 | POST_IO |
15302 | RET(14) |
15303 | } |
15304 | |
15305 | // NEG |
15306 | OPCODE(0x4440) |
15307 | { |
15308 | u32 adr, res; |
15309 | u32 src, dst; |
15310 | |
15311 | src = DREGu16((Opcode >> 0) & 7); |
15312 | res = -src; |
15313 | flag_V = (res & src) >> 8; |
15314 | flag_N = flag_X = flag_C = res >> 8; |
15315 | flag_NotZ = res & 0xFFFF; |
15316 | DREGu16((Opcode >> 0) & 7) = res; |
15317 | RET(4) |
15318 | } |
15319 | |
15320 | // NEG |
15321 | OPCODE(0x4450) |
15322 | { |
15323 | u32 adr, res; |
15324 | u32 src, dst; |
15325 | |
15326 | adr = AREG((Opcode >> 0) & 7); |
15327 | PRE_IO |
15328 | READ_WORD_F(adr, src) |
15329 | res = -src; |
15330 | flag_V = (res & src) >> 8; |
15331 | flag_N = flag_X = flag_C = res >> 8; |
15332 | flag_NotZ = res & 0xFFFF; |
15333 | WRITE_WORD_F(adr, res) |
15334 | POST_IO |
15335 | RET(12) |
15336 | } |
15337 | |
15338 | // NEG |
15339 | OPCODE(0x4458) |
15340 | { |
15341 | u32 adr, res; |
15342 | u32 src, dst; |
15343 | |
15344 | adr = AREG((Opcode >> 0) & 7); |
15345 | AREG((Opcode >> 0) & 7) += 2; |
15346 | PRE_IO |
15347 | READ_WORD_F(adr, src) |
15348 | res = -src; |
15349 | flag_V = (res & src) >> 8; |
15350 | flag_N = flag_X = flag_C = res >> 8; |
15351 | flag_NotZ = res & 0xFFFF; |
15352 | WRITE_WORD_F(adr, res) |
15353 | POST_IO |
15354 | RET(12) |
15355 | } |
15356 | |
15357 | // NEG |
15358 | OPCODE(0x4460) |
15359 | { |
15360 | u32 adr, res; |
15361 | u32 src, dst; |
15362 | |
15363 | adr = AREG((Opcode >> 0) & 7) - 2; |
15364 | AREG((Opcode >> 0) & 7) = adr; |
15365 | PRE_IO |
15366 | READ_WORD_F(adr, src) |
15367 | res = -src; |
15368 | flag_V = (res & src) >> 8; |
15369 | flag_N = flag_X = flag_C = res >> 8; |
15370 | flag_NotZ = res & 0xFFFF; |
15371 | WRITE_WORD_F(adr, res) |
15372 | POST_IO |
15373 | RET(14) |
15374 | } |
15375 | |
15376 | // NEG |
15377 | OPCODE(0x4468) |
15378 | { |
15379 | u32 adr, res; |
15380 | u32 src, dst; |
15381 | |
15382 | FETCH_SWORD(adr); |
15383 | adr += AREG((Opcode >> 0) & 7); |
15384 | PRE_IO |
15385 | READ_WORD_F(adr, src) |
15386 | res = -src; |
15387 | flag_V = (res & src) >> 8; |
15388 | flag_N = flag_X = flag_C = res >> 8; |
15389 | flag_NotZ = res & 0xFFFF; |
15390 | WRITE_WORD_F(adr, res) |
15391 | POST_IO |
15392 | RET(16) |
15393 | } |
15394 | |
15395 | // NEG |
15396 | OPCODE(0x4470) |
15397 | { |
15398 | u32 adr, res; |
15399 | u32 src, dst; |
15400 | |
15401 | adr = AREG((Opcode >> 0) & 7); |
15402 | DECODE_EXT_WORD |
15403 | PRE_IO |
15404 | READ_WORD_F(adr, src) |
15405 | res = -src; |
15406 | flag_V = (res & src) >> 8; |
15407 | flag_N = flag_X = flag_C = res >> 8; |
15408 | flag_NotZ = res & 0xFFFF; |
15409 | WRITE_WORD_F(adr, res) |
15410 | POST_IO |
15411 | RET(18) |
15412 | } |
15413 | |
15414 | // NEG |
15415 | OPCODE(0x4478) |
15416 | { |
15417 | u32 adr, res; |
15418 | u32 src, dst; |
15419 | |
15420 | FETCH_SWORD(adr); |
15421 | PRE_IO |
15422 | READ_WORD_F(adr, src) |
15423 | res = -src; |
15424 | flag_V = (res & src) >> 8; |
15425 | flag_N = flag_X = flag_C = res >> 8; |
15426 | flag_NotZ = res & 0xFFFF; |
15427 | WRITE_WORD_F(adr, res) |
15428 | POST_IO |
15429 | RET(16) |
15430 | } |
15431 | |
15432 | // NEG |
15433 | OPCODE(0x4479) |
15434 | { |
15435 | u32 adr, res; |
15436 | u32 src, dst; |
15437 | |
15438 | FETCH_LONG(adr); |
15439 | PRE_IO |
15440 | READ_WORD_F(adr, src) |
15441 | res = -src; |
15442 | flag_V = (res & src) >> 8; |
15443 | flag_N = flag_X = flag_C = res >> 8; |
15444 | flag_NotZ = res & 0xFFFF; |
15445 | WRITE_WORD_F(adr, res) |
15446 | POST_IO |
15447 | RET(20) |
15448 | } |
15449 | |
15450 | // NEG |
15451 | OPCODE(0x445F) |
15452 | { |
15453 | u32 adr, res; |
15454 | u32 src, dst; |
15455 | |
15456 | adr = AREG(7); |
15457 | AREG(7) += 2; |
15458 | PRE_IO |
15459 | READ_WORD_F(adr, src) |
15460 | res = -src; |
15461 | flag_V = (res & src) >> 8; |
15462 | flag_N = flag_X = flag_C = res >> 8; |
15463 | flag_NotZ = res & 0xFFFF; |
15464 | WRITE_WORD_F(adr, res) |
15465 | POST_IO |
15466 | RET(12) |
15467 | } |
15468 | |
15469 | // NEG |
15470 | OPCODE(0x4467) |
15471 | { |
15472 | u32 adr, res; |
15473 | u32 src, dst; |
15474 | |
15475 | adr = AREG(7) - 2; |
15476 | AREG(7) = adr; |
15477 | PRE_IO |
15478 | READ_WORD_F(adr, src) |
15479 | res = -src; |
15480 | flag_V = (res & src) >> 8; |
15481 | flag_N = flag_X = flag_C = res >> 8; |
15482 | flag_NotZ = res & 0xFFFF; |
15483 | WRITE_WORD_F(adr, res) |
15484 | POST_IO |
15485 | RET(14) |
15486 | } |
15487 | |
15488 | // NEG |
15489 | OPCODE(0x4480) |
15490 | { |
15491 | u32 adr, res; |
15492 | u32 src, dst; |
15493 | |
15494 | src = DREGu32((Opcode >> 0) & 7); |
15495 | res = -src; |
15496 | flag_NotZ = res; |
15497 | flag_V = (res & src) >> 24; |
15498 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15499 | flag_N = res >> 24; |
15500 | DREGu32((Opcode >> 0) & 7) = res; |
15501 | RET(6) |
15502 | } |
15503 | |
15504 | // NEG |
15505 | OPCODE(0x4490) |
15506 | { |
15507 | u32 adr, res; |
15508 | u32 src, dst; |
15509 | |
15510 | adr = AREG((Opcode >> 0) & 7); |
15511 | PRE_IO |
15512 | READ_LONG_F(adr, src) |
15513 | res = -src; |
15514 | flag_NotZ = res; |
15515 | flag_V = (res & src) >> 24; |
15516 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15517 | flag_N = res >> 24; |
15518 | WRITE_LONG_F(adr, res) |
15519 | POST_IO |
15520 | RET(20) |
15521 | } |
15522 | |
15523 | // NEG |
15524 | OPCODE(0x4498) |
15525 | { |
15526 | u32 adr, res; |
15527 | u32 src, dst; |
15528 | |
15529 | adr = AREG((Opcode >> 0) & 7); |
15530 | AREG((Opcode >> 0) & 7) += 4; |
15531 | PRE_IO |
15532 | READ_LONG_F(adr, src) |
15533 | res = -src; |
15534 | flag_NotZ = res; |
15535 | flag_V = (res & src) >> 24; |
15536 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15537 | flag_N = res >> 24; |
15538 | WRITE_LONG_F(adr, res) |
15539 | POST_IO |
15540 | RET(20) |
15541 | } |
15542 | |
15543 | // NEG |
15544 | OPCODE(0x44A0) |
15545 | { |
15546 | u32 adr, res; |
15547 | u32 src, dst; |
15548 | |
15549 | adr = AREG((Opcode >> 0) & 7) - 4; |
15550 | AREG((Opcode >> 0) & 7) = adr; |
15551 | PRE_IO |
15552 | READ_LONG_F(adr, src) |
15553 | res = -src; |
15554 | flag_NotZ = res; |
15555 | flag_V = (res & src) >> 24; |
15556 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15557 | flag_N = res >> 24; |
15558 | WRITE_LONG_F(adr, res) |
15559 | POST_IO |
15560 | RET(22) |
15561 | } |
15562 | |
15563 | // NEG |
15564 | OPCODE(0x44A8) |
15565 | { |
15566 | u32 adr, res; |
15567 | u32 src, dst; |
15568 | |
15569 | FETCH_SWORD(adr); |
15570 | adr += AREG((Opcode >> 0) & 7); |
15571 | PRE_IO |
15572 | READ_LONG_F(adr, src) |
15573 | res = -src; |
15574 | flag_NotZ = res; |
15575 | flag_V = (res & src) >> 24; |
15576 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15577 | flag_N = res >> 24; |
15578 | WRITE_LONG_F(adr, res) |
15579 | POST_IO |
15580 | RET(24) |
15581 | } |
15582 | |
15583 | // NEG |
15584 | OPCODE(0x44B0) |
15585 | { |
15586 | u32 adr, res; |
15587 | u32 src, dst; |
15588 | |
15589 | adr = AREG((Opcode >> 0) & 7); |
15590 | DECODE_EXT_WORD |
15591 | PRE_IO |
15592 | READ_LONG_F(adr, src) |
15593 | res = -src; |
15594 | flag_NotZ = res; |
15595 | flag_V = (res & src) >> 24; |
15596 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15597 | flag_N = res >> 24; |
15598 | WRITE_LONG_F(adr, res) |
15599 | POST_IO |
15600 | RET(26) |
15601 | } |
15602 | |
15603 | // NEG |
15604 | OPCODE(0x44B8) |
15605 | { |
15606 | u32 adr, res; |
15607 | u32 src, dst; |
15608 | |
15609 | FETCH_SWORD(adr); |
15610 | PRE_IO |
15611 | READ_LONG_F(adr, src) |
15612 | res = -src; |
15613 | flag_NotZ = res; |
15614 | flag_V = (res & src) >> 24; |
15615 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15616 | flag_N = res >> 24; |
15617 | WRITE_LONG_F(adr, res) |
15618 | POST_IO |
15619 | RET(24) |
15620 | } |
15621 | |
15622 | // NEG |
15623 | OPCODE(0x44B9) |
15624 | { |
15625 | u32 adr, res; |
15626 | u32 src, dst; |
15627 | |
15628 | FETCH_LONG(adr); |
15629 | PRE_IO |
15630 | READ_LONG_F(adr, src) |
15631 | res = -src; |
15632 | flag_NotZ = res; |
15633 | flag_V = (res & src) >> 24; |
15634 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15635 | flag_N = res >> 24; |
15636 | WRITE_LONG_F(adr, res) |
15637 | POST_IO |
15638 | RET(28) |
15639 | } |
15640 | |
15641 | // NEG |
15642 | OPCODE(0x449F) |
15643 | { |
15644 | u32 adr, res; |
15645 | u32 src, dst; |
15646 | |
15647 | adr = AREG(7); |
15648 | AREG(7) += 4; |
15649 | PRE_IO |
15650 | READ_LONG_F(adr, src) |
15651 | res = -src; |
15652 | flag_NotZ = res; |
15653 | flag_V = (res & src) >> 24; |
15654 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15655 | flag_N = res >> 24; |
15656 | WRITE_LONG_F(adr, res) |
15657 | POST_IO |
15658 | RET(20) |
15659 | } |
15660 | |
15661 | // NEG |
15662 | OPCODE(0x44A7) |
15663 | { |
15664 | u32 adr, res; |
15665 | u32 src, dst; |
15666 | |
15667 | adr = AREG(7) - 4; |
15668 | AREG(7) = adr; |
15669 | PRE_IO |
15670 | READ_LONG_F(adr, src) |
15671 | res = -src; |
15672 | flag_NotZ = res; |
15673 | flag_V = (res & src) >> 24; |
15674 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
15675 | flag_N = res >> 24; |
15676 | WRITE_LONG_F(adr, res) |
15677 | POST_IO |
15678 | RET(22) |
15679 | } |
15680 | |
15681 | // NOT |
15682 | OPCODE(0x4600) |
15683 | { |
15684 | u32 adr, res; |
15685 | u32 src, dst; |
15686 | |
15687 | src = DREGu8((Opcode >> 0) & 7); |
15688 | res = ~src; |
15689 | flag_C = 0; |
15690 | flag_V = 0; |
15691 | flag_N = res; |
15692 | flag_NotZ = res & 0xFF; |
15693 | DREGu8((Opcode >> 0) & 7) = res; |
15694 | RET(4) |
15695 | } |
15696 | |
15697 | // NOT |
15698 | OPCODE(0x4610) |
15699 | { |
15700 | u32 adr, res; |
15701 | u32 src, dst; |
15702 | |
15703 | adr = AREG((Opcode >> 0) & 7); |
15704 | PRE_IO |
15705 | READ_BYTE_F(adr, src) |
15706 | res = ~src; |
15707 | flag_C = 0; |
15708 | flag_V = 0; |
15709 | flag_N = res; |
15710 | flag_NotZ = res & 0xFF; |
15711 | WRITE_BYTE_F(adr, res) |
15712 | POST_IO |
15713 | RET(12) |
15714 | } |
15715 | |
15716 | // NOT |
15717 | OPCODE(0x4618) |
15718 | { |
15719 | u32 adr, res; |
15720 | u32 src, dst; |
15721 | |
15722 | adr = AREG((Opcode >> 0) & 7); |
15723 | AREG((Opcode >> 0) & 7) += 1; |
15724 | PRE_IO |
15725 | READ_BYTE_F(adr, src) |
15726 | res = ~src; |
15727 | flag_C = 0; |
15728 | flag_V = 0; |
15729 | flag_N = res; |
15730 | flag_NotZ = res & 0xFF; |
15731 | WRITE_BYTE_F(adr, res) |
15732 | POST_IO |
15733 | RET(12) |
15734 | } |
15735 | |
15736 | // NOT |
15737 | OPCODE(0x4620) |
15738 | { |
15739 | u32 adr, res; |
15740 | u32 src, dst; |
15741 | |
15742 | adr = AREG((Opcode >> 0) & 7) - 1; |
15743 | AREG((Opcode >> 0) & 7) = adr; |
15744 | PRE_IO |
15745 | READ_BYTE_F(adr, src) |
15746 | res = ~src; |
15747 | flag_C = 0; |
15748 | flag_V = 0; |
15749 | flag_N = res; |
15750 | flag_NotZ = res & 0xFF; |
15751 | WRITE_BYTE_F(adr, res) |
15752 | POST_IO |
15753 | RET(14) |
15754 | } |
15755 | |
15756 | // NOT |
15757 | OPCODE(0x4628) |
15758 | { |
15759 | u32 adr, res; |
15760 | u32 src, dst; |
15761 | |
15762 | FETCH_SWORD(adr); |
15763 | adr += AREG((Opcode >> 0) & 7); |
15764 | PRE_IO |
15765 | READ_BYTE_F(adr, src) |
15766 | res = ~src; |
15767 | flag_C = 0; |
15768 | flag_V = 0; |
15769 | flag_N = res; |
15770 | flag_NotZ = res & 0xFF; |
15771 | WRITE_BYTE_F(adr, res) |
15772 | POST_IO |
15773 | RET(16) |
15774 | } |
15775 | |
15776 | // NOT |
15777 | OPCODE(0x4630) |
15778 | { |
15779 | u32 adr, res; |
15780 | u32 src, dst; |
15781 | |
15782 | adr = AREG((Opcode >> 0) & 7); |
15783 | DECODE_EXT_WORD |
15784 | PRE_IO |
15785 | READ_BYTE_F(adr, src) |
15786 | res = ~src; |
15787 | flag_C = 0; |
15788 | flag_V = 0; |
15789 | flag_N = res; |
15790 | flag_NotZ = res & 0xFF; |
15791 | WRITE_BYTE_F(adr, res) |
15792 | POST_IO |
15793 | RET(18) |
15794 | } |
15795 | |
15796 | // NOT |
15797 | OPCODE(0x4638) |
15798 | { |
15799 | u32 adr, res; |
15800 | u32 src, dst; |
15801 | |
15802 | FETCH_SWORD(adr); |
15803 | PRE_IO |
15804 | READ_BYTE_F(adr, src) |
15805 | res = ~src; |
15806 | flag_C = 0; |
15807 | flag_V = 0; |
15808 | flag_N = res; |
15809 | flag_NotZ = res & 0xFF; |
15810 | WRITE_BYTE_F(adr, res) |
15811 | POST_IO |
15812 | RET(16) |
15813 | } |
15814 | |
15815 | // NOT |
15816 | OPCODE(0x4639) |
15817 | { |
15818 | u32 adr, res; |
15819 | u32 src, dst; |
15820 | |
15821 | FETCH_LONG(adr); |
15822 | PRE_IO |
15823 | READ_BYTE_F(adr, src) |
15824 | res = ~src; |
15825 | flag_C = 0; |
15826 | flag_V = 0; |
15827 | flag_N = res; |
15828 | flag_NotZ = res & 0xFF; |
15829 | WRITE_BYTE_F(adr, res) |
15830 | POST_IO |
15831 | RET(20) |
15832 | } |
15833 | |
15834 | // NOT |
15835 | OPCODE(0x461F) |
15836 | { |
15837 | u32 adr, res; |
15838 | u32 src, dst; |
15839 | |
15840 | adr = AREG(7); |
15841 | AREG(7) += 2; |
15842 | PRE_IO |
15843 | READ_BYTE_F(adr, src) |
15844 | res = ~src; |
15845 | flag_C = 0; |
15846 | flag_V = 0; |
15847 | flag_N = res; |
15848 | flag_NotZ = res & 0xFF; |
15849 | WRITE_BYTE_F(adr, res) |
15850 | POST_IO |
15851 | RET(12) |
15852 | } |
15853 | |
15854 | // NOT |
15855 | OPCODE(0x4627) |
15856 | { |
15857 | u32 adr, res; |
15858 | u32 src, dst; |
15859 | |
15860 | adr = AREG(7) - 2; |
15861 | AREG(7) = adr; |
15862 | PRE_IO |
15863 | READ_BYTE_F(adr, src) |
15864 | res = ~src; |
15865 | flag_C = 0; |
15866 | flag_V = 0; |
15867 | flag_N = res; |
15868 | flag_NotZ = res & 0xFF; |
15869 | WRITE_BYTE_F(adr, res) |
15870 | POST_IO |
15871 | RET(14) |
15872 | } |
15873 | |
15874 | // NOT |
15875 | OPCODE(0x4640) |
15876 | { |
15877 | u32 adr, res; |
15878 | u32 src, dst; |
15879 | |
15880 | src = DREGu16((Opcode >> 0) & 7); |
15881 | res = ~src; |
15882 | flag_C = 0; |
15883 | flag_V = 0; |
15884 | flag_NotZ = res & 0xFFFF; |
15885 | flag_N = res >> 8; |
15886 | DREGu16((Opcode >> 0) & 7) = res; |
15887 | RET(4) |
15888 | } |
15889 | |
15890 | // NOT |
15891 | OPCODE(0x4650) |
15892 | { |
15893 | u32 adr, res; |
15894 | u32 src, dst; |
15895 | |
15896 | adr = AREG((Opcode >> 0) & 7); |
15897 | PRE_IO |
15898 | READ_WORD_F(adr, src) |
15899 | res = ~src; |
15900 | flag_C = 0; |
15901 | flag_V = 0; |
15902 | flag_NotZ = res & 0xFFFF; |
15903 | flag_N = res >> 8; |
15904 | WRITE_WORD_F(adr, res) |
15905 | POST_IO |
15906 | RET(12) |
15907 | } |
15908 | |
15909 | // NOT |
15910 | OPCODE(0x4658) |
15911 | { |
15912 | u32 adr, res; |
15913 | u32 src, dst; |
15914 | |
15915 | adr = AREG((Opcode >> 0) & 7); |
15916 | AREG((Opcode >> 0) & 7) += 2; |
15917 | PRE_IO |
15918 | READ_WORD_F(adr, src) |
15919 | res = ~src; |
15920 | flag_C = 0; |
15921 | flag_V = 0; |
15922 | flag_NotZ = res & 0xFFFF; |
15923 | flag_N = res >> 8; |
15924 | WRITE_WORD_F(adr, res) |
15925 | POST_IO |
15926 | RET(12) |
15927 | } |
15928 | |
15929 | // NOT |
15930 | OPCODE(0x4660) |
15931 | { |
15932 | u32 adr, res; |
15933 | u32 src, dst; |
15934 | |
15935 | adr = AREG((Opcode >> 0) & 7) - 2; |
15936 | AREG((Opcode >> 0) & 7) = adr; |
15937 | PRE_IO |
15938 | READ_WORD_F(adr, src) |
15939 | res = ~src; |
15940 | flag_C = 0; |
15941 | flag_V = 0; |
15942 | flag_NotZ = res & 0xFFFF; |
15943 | flag_N = res >> 8; |
15944 | WRITE_WORD_F(adr, res) |
15945 | POST_IO |
15946 | RET(14) |
15947 | } |
15948 | |
15949 | // NOT |
15950 | OPCODE(0x4668) |
15951 | { |
15952 | u32 adr, res; |
15953 | u32 src, dst; |
15954 | |
15955 | FETCH_SWORD(adr); |
15956 | adr += AREG((Opcode >> 0) & 7); |
15957 | PRE_IO |
15958 | READ_WORD_F(adr, src) |
15959 | res = ~src; |
15960 | flag_C = 0; |
15961 | flag_V = 0; |
15962 | flag_NotZ = res & 0xFFFF; |
15963 | flag_N = res >> 8; |
15964 | WRITE_WORD_F(adr, res) |
15965 | POST_IO |
15966 | RET(16) |
15967 | } |
15968 | |
15969 | // NOT |
15970 | OPCODE(0x4670) |
15971 | { |
15972 | u32 adr, res; |
15973 | u32 src, dst; |
15974 | |
15975 | adr = AREG((Opcode >> 0) & 7); |
15976 | DECODE_EXT_WORD |
15977 | PRE_IO |
15978 | READ_WORD_F(adr, src) |
15979 | res = ~src; |
15980 | flag_C = 0; |
15981 | flag_V = 0; |
15982 | flag_NotZ = res & 0xFFFF; |
15983 | flag_N = res >> 8; |
15984 | WRITE_WORD_F(adr, res) |
15985 | POST_IO |
15986 | RET(18) |
15987 | } |
15988 | |
15989 | // NOT |
15990 | OPCODE(0x4678) |
15991 | { |
15992 | u32 adr, res; |
15993 | u32 src, dst; |
15994 | |
15995 | FETCH_SWORD(adr); |
15996 | PRE_IO |
15997 | READ_WORD_F(adr, src) |
15998 | res = ~src; |
15999 | flag_C = 0; |
16000 | flag_V = 0; |
16001 | flag_NotZ = res & 0xFFFF; |
16002 | flag_N = res >> 8; |
16003 | WRITE_WORD_F(adr, res) |
16004 | POST_IO |
16005 | RET(16) |
16006 | } |
16007 | |
16008 | // NOT |
16009 | OPCODE(0x4679) |
16010 | { |
16011 | u32 adr, res; |
16012 | u32 src, dst; |
16013 | |
16014 | FETCH_LONG(adr); |
16015 | PRE_IO |
16016 | READ_WORD_F(adr, src) |
16017 | res = ~src; |
16018 | flag_C = 0; |
16019 | flag_V = 0; |
16020 | flag_NotZ = res & 0xFFFF; |
16021 | flag_N = res >> 8; |
16022 | WRITE_WORD_F(adr, res) |
16023 | POST_IO |
16024 | RET(20) |
16025 | } |
16026 | |
16027 | // NOT |
16028 | OPCODE(0x465F) |
16029 | { |
16030 | u32 adr, res; |
16031 | u32 src, dst; |
16032 | |
16033 | adr = AREG(7); |
16034 | AREG(7) += 2; |
16035 | PRE_IO |
16036 | READ_WORD_F(adr, src) |
16037 | res = ~src; |
16038 | flag_C = 0; |
16039 | flag_V = 0; |
16040 | flag_NotZ = res & 0xFFFF; |
16041 | flag_N = res >> 8; |
16042 | WRITE_WORD_F(adr, res) |
16043 | POST_IO |
16044 | RET(12) |
16045 | } |
16046 | |
16047 | // NOT |
16048 | OPCODE(0x4667) |
16049 | { |
16050 | u32 adr, res; |
16051 | u32 src, dst; |
16052 | |
16053 | adr = AREG(7) - 2; |
16054 | AREG(7) = adr; |
16055 | PRE_IO |
16056 | READ_WORD_F(adr, src) |
16057 | res = ~src; |
16058 | flag_C = 0; |
16059 | flag_V = 0; |
16060 | flag_NotZ = res & 0xFFFF; |
16061 | flag_N = res >> 8; |
16062 | WRITE_WORD_F(adr, res) |
16063 | POST_IO |
16064 | RET(14) |
16065 | } |
16066 | |
16067 | // NOT |
16068 | OPCODE(0x4680) |
16069 | { |
16070 | u32 adr, res; |
16071 | u32 src, dst; |
16072 | |
16073 | src = DREGu32((Opcode >> 0) & 7); |
16074 | res = ~src; |
16075 | flag_C = 0; |
16076 | flag_V = 0; |
16077 | flag_NotZ = res; |
16078 | flag_N = res >> 24; |
16079 | DREGu32((Opcode >> 0) & 7) = res; |
16080 | RET(6) |
16081 | } |
16082 | |
16083 | // NOT |
16084 | OPCODE(0x4690) |
16085 | { |
16086 | u32 adr, res; |
16087 | u32 src, dst; |
16088 | |
16089 | adr = AREG((Opcode >> 0) & 7); |
16090 | PRE_IO |
16091 | READ_LONG_F(adr, src) |
16092 | res = ~src; |
16093 | flag_C = 0; |
16094 | flag_V = 0; |
16095 | flag_NotZ = res; |
16096 | flag_N = res >> 24; |
16097 | WRITE_LONG_F(adr, res) |
16098 | POST_IO |
16099 | RET(20) |
16100 | } |
16101 | |
16102 | // NOT |
16103 | OPCODE(0x4698) |
16104 | { |
16105 | u32 adr, res; |
16106 | u32 src, dst; |
16107 | |
16108 | adr = AREG((Opcode >> 0) & 7); |
16109 | AREG((Opcode >> 0) & 7) += 4; |
16110 | PRE_IO |
16111 | READ_LONG_F(adr, src) |
16112 | res = ~src; |
16113 | flag_C = 0; |
16114 | flag_V = 0; |
16115 | flag_NotZ = res; |
16116 | flag_N = res >> 24; |
16117 | WRITE_LONG_F(adr, res) |
16118 | POST_IO |
16119 | RET(20) |
16120 | } |
16121 | |
16122 | // NOT |
16123 | OPCODE(0x46A0) |
16124 | { |
16125 | u32 adr, res; |
16126 | u32 src, dst; |
16127 | |
16128 | adr = AREG((Opcode >> 0) & 7) - 4; |
16129 | AREG((Opcode >> 0) & 7) = adr; |
16130 | PRE_IO |
16131 | READ_LONG_F(adr, src) |
16132 | res = ~src; |
16133 | flag_C = 0; |
16134 | flag_V = 0; |
16135 | flag_NotZ = res; |
16136 | flag_N = res >> 24; |
16137 | WRITE_LONG_F(adr, res) |
16138 | POST_IO |
16139 | RET(22) |
16140 | } |
16141 | |
16142 | // NOT |
16143 | OPCODE(0x46A8) |
16144 | { |
16145 | u32 adr, res; |
16146 | u32 src, dst; |
16147 | |
16148 | FETCH_SWORD(adr); |
16149 | adr += AREG((Opcode >> 0) & 7); |
16150 | PRE_IO |
16151 | READ_LONG_F(adr, src) |
16152 | res = ~src; |
16153 | flag_C = 0; |
16154 | flag_V = 0; |
16155 | flag_NotZ = res; |
16156 | flag_N = res >> 24; |
16157 | WRITE_LONG_F(adr, res) |
16158 | POST_IO |
16159 | RET(24) |
16160 | } |
16161 | |
16162 | // NOT |
16163 | OPCODE(0x46B0) |
16164 | { |
16165 | u32 adr, res; |
16166 | u32 src, dst; |
16167 | |
16168 | adr = AREG((Opcode >> 0) & 7); |
16169 | DECODE_EXT_WORD |
16170 | PRE_IO |
16171 | READ_LONG_F(adr, src) |
16172 | res = ~src; |
16173 | flag_C = 0; |
16174 | flag_V = 0; |
16175 | flag_NotZ = res; |
16176 | flag_N = res >> 24; |
16177 | WRITE_LONG_F(adr, res) |
16178 | POST_IO |
16179 | RET(26) |
16180 | } |
16181 | |
16182 | // NOT |
16183 | OPCODE(0x46B8) |
16184 | { |
16185 | u32 adr, res; |
16186 | u32 src, dst; |
16187 | |
16188 | FETCH_SWORD(adr); |
16189 | PRE_IO |
16190 | READ_LONG_F(adr, src) |
16191 | res = ~src; |
16192 | flag_C = 0; |
16193 | flag_V = 0; |
16194 | flag_NotZ = res; |
16195 | flag_N = res >> 24; |
16196 | WRITE_LONG_F(adr, res) |
16197 | POST_IO |
16198 | RET(24) |
16199 | } |
16200 | |
16201 | // NOT |
16202 | OPCODE(0x46B9) |
16203 | { |
16204 | u32 adr, res; |
16205 | u32 src, dst; |
16206 | |
16207 | FETCH_LONG(adr); |
16208 | PRE_IO |
16209 | READ_LONG_F(adr, src) |
16210 | res = ~src; |
16211 | flag_C = 0; |
16212 | flag_V = 0; |
16213 | flag_NotZ = res; |
16214 | flag_N = res >> 24; |
16215 | WRITE_LONG_F(adr, res) |
16216 | POST_IO |
16217 | RET(28) |
16218 | } |
16219 | |
16220 | // NOT |
16221 | OPCODE(0x469F) |
16222 | { |
16223 | u32 adr, res; |
16224 | u32 src, dst; |
16225 | |
16226 | adr = AREG(7); |
16227 | AREG(7) += 4; |
16228 | PRE_IO |
16229 | READ_LONG_F(adr, src) |
16230 | res = ~src; |
16231 | flag_C = 0; |
16232 | flag_V = 0; |
16233 | flag_NotZ = res; |
16234 | flag_N = res >> 24; |
16235 | WRITE_LONG_F(adr, res) |
16236 | POST_IO |
16237 | RET(20) |
16238 | } |
16239 | |
16240 | // NOT |
16241 | OPCODE(0x46A7) |
16242 | { |
16243 | u32 adr, res; |
16244 | u32 src, dst; |
16245 | |
16246 | adr = AREG(7) - 4; |
16247 | AREG(7) = adr; |
16248 | PRE_IO |
16249 | READ_LONG_F(adr, src) |
16250 | res = ~src; |
16251 | flag_C = 0; |
16252 | flag_V = 0; |
16253 | flag_NotZ = res; |
16254 | flag_N = res >> 24; |
16255 | WRITE_LONG_F(adr, res) |
16256 | POST_IO |
16257 | RET(22) |
16258 | } |
16259 | |
16260 | // MOVESRa |
16261 | OPCODE(0x40C0) |
16262 | { |
16263 | u32 adr, res; |
16264 | u32 src, dst; |
16265 | |
16266 | res = GET_SR; |
16267 | DREGu16((Opcode >> 0) & 7) = res; |
16268 | RET(6) |
16269 | } |
16270 | |
16271 | // MOVESRa |
16272 | OPCODE(0x40D0) |
16273 | { |
16274 | u32 adr, res; |
16275 | u32 src, dst; |
16276 | |
16277 | res = GET_SR; |
16278 | adr = AREG((Opcode >> 0) & 7); |
16279 | PRE_IO |
16280 | WRITE_WORD_F(adr, res) |
16281 | POST_IO |
16282 | RET(12) |
16283 | } |
16284 | |
16285 | // MOVESRa |
16286 | OPCODE(0x40D8) |
16287 | { |
16288 | u32 adr, res; |
16289 | u32 src, dst; |
16290 | |
16291 | res = GET_SR; |
16292 | adr = AREG((Opcode >> 0) & 7); |
16293 | AREG((Opcode >> 0) & 7) += 2; |
16294 | PRE_IO |
16295 | WRITE_WORD_F(adr, res) |
16296 | POST_IO |
16297 | RET(12) |
16298 | } |
16299 | |
16300 | // MOVESRa |
16301 | OPCODE(0x40E0) |
16302 | { |
16303 | u32 adr, res; |
16304 | u32 src, dst; |
16305 | |
16306 | res = GET_SR; |
16307 | adr = AREG((Opcode >> 0) & 7) - 2; |
16308 | AREG((Opcode >> 0) & 7) = adr; |
16309 | PRE_IO |
16310 | WRITE_WORD_F(adr, res) |
16311 | POST_IO |
16312 | RET(14) |
16313 | } |
16314 | |
16315 | // MOVESRa |
16316 | OPCODE(0x40E8) |
16317 | { |
16318 | u32 adr, res; |
16319 | u32 src, dst; |
16320 | |
16321 | res = GET_SR; |
16322 | FETCH_SWORD(adr); |
16323 | adr += AREG((Opcode >> 0) & 7); |
16324 | PRE_IO |
16325 | WRITE_WORD_F(adr, res) |
16326 | POST_IO |
16327 | RET(16) |
16328 | } |
16329 | |
16330 | // MOVESRa |
16331 | OPCODE(0x40F0) |
16332 | { |
16333 | u32 adr, res; |
16334 | u32 src, dst; |
16335 | |
16336 | res = GET_SR; |
16337 | adr = AREG((Opcode >> 0) & 7); |
16338 | DECODE_EXT_WORD |
16339 | PRE_IO |
16340 | WRITE_WORD_F(adr, res) |
16341 | POST_IO |
16342 | RET(18) |
16343 | } |
16344 | |
16345 | // MOVESRa |
16346 | OPCODE(0x40F8) |
16347 | { |
16348 | u32 adr, res; |
16349 | u32 src, dst; |
16350 | |
16351 | res = GET_SR; |
16352 | FETCH_SWORD(adr); |
16353 | PRE_IO |
16354 | WRITE_WORD_F(adr, res) |
16355 | POST_IO |
16356 | RET(16) |
16357 | } |
16358 | |
16359 | // MOVESRa |
16360 | OPCODE(0x40F9) |
16361 | { |
16362 | u32 adr, res; |
16363 | u32 src, dst; |
16364 | |
16365 | res = GET_SR; |
16366 | FETCH_LONG(adr); |
16367 | PRE_IO |
16368 | WRITE_WORD_F(adr, res) |
16369 | POST_IO |
16370 | RET(20) |
16371 | } |
16372 | |
16373 | // MOVESRa |
16374 | OPCODE(0x40DF) |
16375 | { |
16376 | u32 adr, res; |
16377 | u32 src, dst; |
16378 | |
16379 | res = GET_SR; |
16380 | adr = AREG(7); |
16381 | AREG(7) += 2; |
16382 | PRE_IO |
16383 | WRITE_WORD_F(adr, res) |
16384 | POST_IO |
16385 | RET(12) |
16386 | } |
16387 | |
16388 | // MOVESRa |
16389 | OPCODE(0x40E7) |
16390 | { |
16391 | u32 adr, res; |
16392 | u32 src, dst; |
16393 | |
16394 | res = GET_SR; |
16395 | adr = AREG(7) - 2; |
16396 | AREG(7) = adr; |
16397 | PRE_IO |
16398 | WRITE_WORD_F(adr, res) |
16399 | POST_IO |
16400 | RET(14) |
16401 | } |
16402 | |
16403 | // MOVEaCCR |
16404 | OPCODE(0x44C0) |
16405 | { |
16406 | u32 adr, res; |
16407 | u32 src, dst; |
16408 | |
16409 | res = DREGu16((Opcode >> 0) & 7); |
16410 | SET_CCR(res) |
16411 | RET(12) |
16412 | } |
16413 | |
16414 | // MOVEaCCR |
16415 | OPCODE(0x44D0) |
16416 | { |
16417 | u32 adr, res; |
16418 | u32 src, dst; |
16419 | |
16420 | adr = AREG((Opcode >> 0) & 7); |
16421 | PRE_IO |
16422 | READ_WORD_F(adr, res) |
16423 | SET_CCR(res) |
16424 | POST_IO |
16425 | RET(16) |
16426 | } |
16427 | |
16428 | // MOVEaCCR |
16429 | OPCODE(0x44D8) |
16430 | { |
16431 | u32 adr, res; |
16432 | u32 src, dst; |
16433 | |
16434 | adr = AREG((Opcode >> 0) & 7); |
16435 | AREG((Opcode >> 0) & 7) += 2; |
16436 | PRE_IO |
16437 | READ_WORD_F(adr, res) |
16438 | SET_CCR(res) |
16439 | POST_IO |
16440 | RET(16) |
16441 | } |
16442 | |
16443 | // MOVEaCCR |
16444 | OPCODE(0x44E0) |
16445 | { |
16446 | u32 adr, res; |
16447 | u32 src, dst; |
16448 | |
16449 | adr = AREG((Opcode >> 0) & 7) - 2; |
16450 | AREG((Opcode >> 0) & 7) = adr; |
16451 | PRE_IO |
16452 | READ_WORD_F(adr, res) |
16453 | SET_CCR(res) |
16454 | POST_IO |
16455 | RET(18) |
16456 | } |
16457 | |
16458 | // MOVEaCCR |
16459 | OPCODE(0x44E8) |
16460 | { |
16461 | u32 adr, res; |
16462 | u32 src, dst; |
16463 | |
16464 | FETCH_SWORD(adr); |
16465 | adr += AREG((Opcode >> 0) & 7); |
16466 | PRE_IO |
16467 | READ_WORD_F(adr, res) |
16468 | SET_CCR(res) |
16469 | POST_IO |
16470 | RET(20) |
16471 | } |
16472 | |
16473 | // MOVEaCCR |
16474 | OPCODE(0x44F0) |
16475 | { |
16476 | u32 adr, res; |
16477 | u32 src, dst; |
16478 | |
16479 | adr = AREG((Opcode >> 0) & 7); |
16480 | DECODE_EXT_WORD |
16481 | PRE_IO |
16482 | READ_WORD_F(adr, res) |
16483 | SET_CCR(res) |
16484 | POST_IO |
16485 | RET(22) |
16486 | } |
16487 | |
16488 | // MOVEaCCR |
16489 | OPCODE(0x44F8) |
16490 | { |
16491 | u32 adr, res; |
16492 | u32 src, dst; |
16493 | |
16494 | FETCH_SWORD(adr); |
16495 | PRE_IO |
16496 | READ_WORD_F(adr, res) |
16497 | SET_CCR(res) |
16498 | POST_IO |
16499 | RET(20) |
16500 | } |
16501 | |
16502 | // MOVEaCCR |
16503 | OPCODE(0x44F9) |
16504 | { |
16505 | u32 adr, res; |
16506 | u32 src, dst; |
16507 | |
16508 | FETCH_LONG(adr); |
16509 | PRE_IO |
16510 | READ_WORD_F(adr, res) |
16511 | SET_CCR(res) |
16512 | POST_IO |
16513 | RET(24) |
16514 | } |
16515 | |
16516 | // MOVEaCCR |
16517 | OPCODE(0x44FA) |
16518 | { |
16519 | u32 adr, res; |
16520 | u32 src, dst; |
16521 | |
be26eb23 |
16522 | adr = GET_SWORD + GET_PC; |
70357ce5 |
16523 | PC++; |
16524 | PRE_IO |
16525 | READ_WORD_F(adr, res) |
16526 | SET_CCR(res) |
16527 | POST_IO |
16528 | RET(20) |
16529 | } |
16530 | |
16531 | // MOVEaCCR |
16532 | OPCODE(0x44FB) |
16533 | { |
16534 | u32 adr, res; |
16535 | u32 src, dst; |
16536 | |
be26eb23 |
16537 | adr = GET_PC; |
70357ce5 |
16538 | DECODE_EXT_WORD |
16539 | PRE_IO |
16540 | READ_WORD_F(adr, res) |
16541 | SET_CCR(res) |
16542 | POST_IO |
16543 | RET(22) |
16544 | } |
16545 | |
16546 | // MOVEaCCR |
16547 | OPCODE(0x44FC) |
16548 | { |
16549 | u32 adr, res; |
16550 | u32 src, dst; |
16551 | |
16552 | FETCH_WORD(res); |
16553 | SET_CCR(res) |
16554 | RET(16) |
16555 | } |
16556 | |
16557 | // MOVEaCCR |
16558 | OPCODE(0x44DF) |
16559 | { |
16560 | u32 adr, res; |
16561 | u32 src, dst; |
16562 | |
16563 | adr = AREG(7); |
16564 | AREG(7) += 2; |
16565 | PRE_IO |
16566 | READ_WORD_F(adr, res) |
16567 | SET_CCR(res) |
16568 | POST_IO |
16569 | RET(16) |
16570 | } |
16571 | |
16572 | // MOVEaCCR |
16573 | OPCODE(0x44E7) |
16574 | { |
16575 | u32 adr, res; |
16576 | u32 src, dst; |
16577 | |
16578 | adr = AREG(7) - 2; |
16579 | AREG(7) = adr; |
16580 | PRE_IO |
16581 | READ_WORD_F(adr, res) |
16582 | SET_CCR(res) |
16583 | POST_IO |
16584 | RET(18) |
16585 | } |
16586 | |
16587 | // MOVEaSR |
16588 | OPCODE(0x46C0) |
16589 | { |
16590 | u32 adr, res; |
16591 | u32 src, dst; |
16592 | |
16593 | if (flag_S) |
16594 | { |
16595 | res = DREGu16((Opcode >> 0) & 7); |
16596 | SET_SR(res) |
16597 | if (!flag_S) |
16598 | { |
16599 | res = AREG(7); |
16600 | AREG(7) = ASP; |
16601 | ASP = res; |
16602 | } |
16603 | CHECK_INT_TO_JUMP(12) |
16604 | } |
16605 | else |
16606 | { |
7669591e |
16607 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16608 | #ifdef USE_CYCLONE_TIMING |
16609 | RET(0) |
16610 | #else |
70357ce5 |
16611 | RET(4) |
3f591822 |
16612 | #endif |
70357ce5 |
16613 | } |
16614 | RET(12) |
16615 | } |
16616 | |
16617 | // MOVEaSR |
16618 | OPCODE(0x46D0) |
16619 | { |
16620 | u32 adr, res; |
16621 | u32 src, dst; |
16622 | |
16623 | if (flag_S) |
16624 | { |
16625 | adr = AREG((Opcode >> 0) & 7); |
16626 | PRE_IO |
16627 | READ_WORD_F(adr, res) |
16628 | SET_SR(res) |
16629 | if (!flag_S) |
16630 | { |
16631 | res = AREG(7); |
16632 | AREG(7) = ASP; |
16633 | ASP = res; |
16634 | } |
16635 | POST_IO |
16636 | CHECK_INT_TO_JUMP(16) |
16637 | } |
16638 | else |
16639 | { |
7669591e |
16640 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16641 | #ifdef USE_CYCLONE_TIMING |
16642 | RET(0) |
16643 | #else |
70357ce5 |
16644 | RET(4) |
3f591822 |
16645 | #endif |
70357ce5 |
16646 | } |
16647 | RET(16) |
16648 | } |
16649 | |
16650 | // MOVEaSR |
16651 | OPCODE(0x46D8) |
16652 | { |
16653 | u32 adr, res; |
16654 | u32 src, dst; |
16655 | |
16656 | if (flag_S) |
16657 | { |
16658 | adr = AREG((Opcode >> 0) & 7); |
16659 | AREG((Opcode >> 0) & 7) += 2; |
16660 | PRE_IO |
16661 | READ_WORD_F(adr, res) |
16662 | SET_SR(res) |
16663 | if (!flag_S) |
16664 | { |
16665 | res = AREG(7); |
16666 | AREG(7) = ASP; |
16667 | ASP = res; |
16668 | } |
16669 | POST_IO |
16670 | CHECK_INT_TO_JUMP(16) |
16671 | } |
16672 | else |
16673 | { |
7669591e |
16674 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16675 | #ifdef USE_CYCLONE_TIMING |
16676 | RET(0) |
16677 | #else |
70357ce5 |
16678 | RET(4) |
3f591822 |
16679 | #endif |
70357ce5 |
16680 | } |
16681 | RET(16) |
16682 | } |
16683 | |
16684 | // MOVEaSR |
16685 | OPCODE(0x46E0) |
16686 | { |
16687 | u32 adr, res; |
16688 | u32 src, dst; |
16689 | |
16690 | if (flag_S) |
16691 | { |
16692 | adr = AREG((Opcode >> 0) & 7) - 2; |
16693 | AREG((Opcode >> 0) & 7) = adr; |
16694 | PRE_IO |
16695 | READ_WORD_F(adr, res) |
16696 | SET_SR(res) |
16697 | if (!flag_S) |
16698 | { |
16699 | res = AREG(7); |
16700 | AREG(7) = ASP; |
16701 | ASP = res; |
16702 | } |
16703 | POST_IO |
16704 | CHECK_INT_TO_JUMP(18) |
16705 | } |
16706 | else |
16707 | { |
7669591e |
16708 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16709 | #ifdef USE_CYCLONE_TIMING |
16710 | RET(0) |
16711 | #else |
70357ce5 |
16712 | RET(4) |
3f591822 |
16713 | #endif |
70357ce5 |
16714 | } |
16715 | RET(18) |
16716 | } |
16717 | |
16718 | // MOVEaSR |
16719 | OPCODE(0x46E8) |
16720 | { |
16721 | u32 adr, res; |
16722 | u32 src, dst; |
16723 | |
16724 | if (flag_S) |
16725 | { |
16726 | FETCH_SWORD(adr); |
16727 | adr += AREG((Opcode >> 0) & 7); |
16728 | PRE_IO |
16729 | READ_WORD_F(adr, res) |
16730 | SET_SR(res) |
16731 | if (!flag_S) |
16732 | { |
16733 | res = AREG(7); |
16734 | AREG(7) = ASP; |
16735 | ASP = res; |
16736 | } |
16737 | POST_IO |
16738 | CHECK_INT_TO_JUMP(20) |
16739 | } |
16740 | else |
16741 | { |
7669591e |
16742 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16743 | #ifdef USE_CYCLONE_TIMING |
16744 | RET(0) |
16745 | #else |
70357ce5 |
16746 | RET(4) |
3f591822 |
16747 | #endif |
70357ce5 |
16748 | } |
16749 | RET(20) |
16750 | } |
16751 | |
16752 | // MOVEaSR |
16753 | OPCODE(0x46F0) |
16754 | { |
16755 | u32 adr, res; |
16756 | u32 src, dst; |
16757 | |
16758 | if (flag_S) |
16759 | { |
16760 | adr = AREG((Opcode >> 0) & 7); |
16761 | DECODE_EXT_WORD |
16762 | PRE_IO |
16763 | READ_WORD_F(adr, res) |
16764 | SET_SR(res) |
16765 | if (!flag_S) |
16766 | { |
16767 | res = AREG(7); |
16768 | AREG(7) = ASP; |
16769 | ASP = res; |
16770 | } |
16771 | POST_IO |
16772 | CHECK_INT_TO_JUMP(22) |
16773 | } |
16774 | else |
16775 | { |
7669591e |
16776 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16777 | #ifdef USE_CYCLONE_TIMING |
16778 | RET(0) |
16779 | #else |
70357ce5 |
16780 | RET(4) |
3f591822 |
16781 | #endif |
70357ce5 |
16782 | } |
16783 | RET(22) |
16784 | } |
16785 | |
16786 | |
16787 | // MOVEaSR |
16788 | OPCODE(0x46F8) |
16789 | { |
16790 | u32 adr, res; |
16791 | u32 src, dst; |
16792 | |
16793 | if (flag_S) |
16794 | { |
16795 | FETCH_SWORD(adr); |
16796 | PRE_IO |
16797 | READ_WORD_F(adr, res) |
16798 | SET_SR(res) |
16799 | if (!flag_S) |
16800 | { |
16801 | res = AREG(7); |
16802 | AREG(7) = ASP; |
16803 | ASP = res; |
16804 | } |
16805 | POST_IO |
16806 | CHECK_INT_TO_JUMP(20) |
16807 | } |
16808 | else |
16809 | { |
7669591e |
16810 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16811 | #ifdef USE_CYCLONE_TIMING |
16812 | RET(0) |
16813 | #else |
70357ce5 |
16814 | RET(4) |
3f591822 |
16815 | #endif |
70357ce5 |
16816 | } |
16817 | RET(20) |
16818 | } |
16819 | |
16820 | // MOVEaSR |
16821 | OPCODE(0x46F9) |
16822 | { |
16823 | u32 adr, res; |
16824 | u32 src, dst; |
16825 | |
16826 | if (flag_S) |
16827 | { |
16828 | FETCH_LONG(adr); |
16829 | PRE_IO |
16830 | READ_WORD_F(adr, res) |
16831 | SET_SR(res) |
16832 | if (!flag_S) |
16833 | { |
16834 | res = AREG(7); |
16835 | AREG(7) = ASP; |
16836 | ASP = res; |
16837 | } |
16838 | POST_IO |
16839 | CHECK_INT_TO_JUMP(24) |
16840 | } |
16841 | else |
16842 | { |
7669591e |
16843 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16844 | #ifdef USE_CYCLONE_TIMING |
16845 | RET(0) |
16846 | #else |
70357ce5 |
16847 | RET(4) |
3f591822 |
16848 | #endif |
70357ce5 |
16849 | } |
16850 | RET(24) |
16851 | } |
16852 | |
16853 | // MOVEaSR |
16854 | OPCODE(0x46FA) |
16855 | { |
16856 | u32 adr, res; |
16857 | u32 src, dst; |
16858 | |
16859 | if (flag_S) |
16860 | { |
be26eb23 |
16861 | adr = GET_SWORD + GET_PC; |
70357ce5 |
16862 | PC++; |
16863 | PRE_IO |
16864 | READ_WORD_F(adr, res) |
16865 | SET_SR(res) |
16866 | if (!flag_S) |
16867 | { |
16868 | res = AREG(7); |
16869 | AREG(7) = ASP; |
16870 | ASP = res; |
16871 | } |
16872 | POST_IO |
d0ae0cb4 |
16873 | CHECK_INT_TO_JUMP(20) |
70357ce5 |
16874 | } |
16875 | else |
16876 | { |
7669591e |
16877 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16878 | #ifdef USE_CYCLONE_TIMING |
16879 | RET(0) |
16880 | #else |
70357ce5 |
16881 | RET(4) |
3f591822 |
16882 | #endif |
70357ce5 |
16883 | } |
16884 | RET(20) |
16885 | } |
16886 | |
16887 | // MOVEaSR |
16888 | OPCODE(0x46FB) |
16889 | { |
16890 | u32 adr, res; |
16891 | u32 src, dst; |
16892 | |
16893 | if (flag_S) |
16894 | { |
be26eb23 |
16895 | adr = GET_PC; |
70357ce5 |
16896 | DECODE_EXT_WORD |
16897 | PRE_IO |
16898 | READ_WORD_F(adr, res) |
16899 | SET_SR(res) |
16900 | if (!flag_S) |
16901 | { |
16902 | res = AREG(7); |
16903 | AREG(7) = ASP; |
16904 | ASP = res; |
16905 | } |
16906 | POST_IO |
16907 | CHECK_INT_TO_JUMP(22) |
16908 | } |
16909 | else |
16910 | { |
7669591e |
16911 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16912 | #ifdef USE_CYCLONE_TIMING |
16913 | RET(0) |
16914 | #else |
70357ce5 |
16915 | RET(4) |
3f591822 |
16916 | #endif |
70357ce5 |
16917 | } |
16918 | RET(22) |
16919 | } |
16920 | |
16921 | // MOVEaSR |
16922 | OPCODE(0x46FC) |
16923 | { |
16924 | u32 adr, res; |
16925 | u32 src, dst; |
16926 | |
16927 | if (flag_S) |
16928 | { |
16929 | FETCH_WORD(res); |
16930 | SET_SR(res) |
16931 | if (!flag_S) |
16932 | { |
16933 | res = AREG(7); |
16934 | AREG(7) = ASP; |
16935 | ASP = res; |
16936 | } |
16937 | CHECK_INT_TO_JUMP(16) |
16938 | } |
16939 | else |
16940 | { |
7669591e |
16941 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16942 | #ifdef USE_CYCLONE_TIMING |
16943 | RET(0) |
16944 | #else |
70357ce5 |
16945 | RET(4) |
3f591822 |
16946 | #endif |
70357ce5 |
16947 | } |
16948 | RET(16) |
16949 | } |
16950 | |
16951 | // MOVEaSR |
16952 | OPCODE(0x46DF) |
16953 | { |
16954 | u32 adr, res; |
16955 | u32 src, dst; |
16956 | |
16957 | if (flag_S) |
16958 | { |
16959 | adr = AREG(7); |
16960 | AREG(7) += 2; |
16961 | PRE_IO |
16962 | READ_WORD_F(adr, res) |
16963 | SET_SR(res) |
16964 | if (!flag_S) |
16965 | { |
16966 | res = AREG(7); |
16967 | AREG(7) = ASP; |
16968 | ASP = res; |
16969 | } |
16970 | POST_IO |
16971 | CHECK_INT_TO_JUMP(16) |
16972 | } |
16973 | else |
16974 | { |
7669591e |
16975 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
16976 | #ifdef USE_CYCLONE_TIMING |
16977 | RET(0) |
16978 | #else |
70357ce5 |
16979 | RET(4) |
3f591822 |
16980 | #endif |
70357ce5 |
16981 | } |
16982 | RET(16) |
16983 | } |
16984 | |
16985 | // MOVEaSR |
16986 | OPCODE(0x46E7) |
16987 | { |
16988 | u32 adr, res; |
16989 | u32 src, dst; |
16990 | |
16991 | if (flag_S) |
16992 | { |
16993 | adr = AREG(7) - 2; |
16994 | AREG(7) = adr; |
16995 | PRE_IO |
16996 | READ_WORD_F(adr, res) |
16997 | SET_SR(res) |
16998 | if (!flag_S) |
16999 | { |
17000 | res = AREG(7); |
17001 | AREG(7) = ASP; |
17002 | ASP = res; |
17003 | } |
17004 | POST_IO |
17005 | CHECK_INT_TO_JUMP(18) |
17006 | } |
17007 | else |
17008 | { |
7669591e |
17009 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
17010 | #ifdef USE_CYCLONE_TIMING |
17011 | RET(0) |
17012 | #else |
70357ce5 |
17013 | RET(4) |
3f591822 |
17014 | #endif |
70357ce5 |
17015 | } |
17016 | RET(18) |
17017 | } |
17018 | |
17019 | // NBCD |
17020 | OPCODE(0x4800) |
17021 | { |
17022 | u32 adr, res; |
17023 | u32 src, dst; |
17024 | |
c6e1e977 |
17025 | dst = DREGu8((Opcode >> 0) & 7); |
17026 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17027 | |
c6e1e977 |
17028 | if (res != 0) |
70357ce5 |
17029 | { |
c6e1e977 |
17030 | flag_V = res; |
17031 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17032 | res = (res + 0x9a) & 0xFF; |
17033 | DREGu8((Opcode >> 0) & 7) = res; |
17034 | flag_V &= ~res; |
70357ce5 |
17035 | flag_NotZ |= res; |
17036 | flag_X = flag_C = M68K_SR_C; |
17037 | } |
c6e1e977 |
17038 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17039 | flag_N = res; |
17040 | RET(6) |
17041 | } |
17042 | |
17043 | // NBCD |
17044 | OPCODE(0x4810) |
17045 | { |
17046 | u32 adr, res; |
17047 | u32 src, dst; |
17048 | |
17049 | adr = AREG((Opcode >> 0) & 7); |
17050 | PRE_IO |
c6e1e977 |
17051 | READ_BYTE_F(adr, dst) |
17052 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17053 | |
c6e1e977 |
17054 | if (res != 0) |
70357ce5 |
17055 | { |
c6e1e977 |
17056 | flag_V = res; |
17057 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17058 | res = (res + 0x9a) & 0xFF; |
17059 | WRITE_BYTE_F(adr, res) |
17060 | flag_V &= ~res; |
70357ce5 |
17061 | flag_NotZ |= res; |
17062 | flag_X = flag_C = M68K_SR_C; |
17063 | } |
c6e1e977 |
17064 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17065 | flag_N = res; |
17066 | POST_IO |
17067 | RET(12) |
17068 | } |
17069 | |
17070 | // NBCD |
17071 | OPCODE(0x4818) |
17072 | { |
17073 | u32 adr, res; |
17074 | u32 src, dst; |
17075 | |
17076 | adr = AREG((Opcode >> 0) & 7); |
17077 | AREG((Opcode >> 0) & 7) += 1; |
17078 | PRE_IO |
c6e1e977 |
17079 | READ_BYTE_F(adr, dst) |
17080 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17081 | |
c6e1e977 |
17082 | if (res != 0) |
70357ce5 |
17083 | { |
c6e1e977 |
17084 | flag_V = res; |
17085 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17086 | res = (res + 0x9a) & 0xFF; |
17087 | WRITE_BYTE_F(adr, res) |
17088 | flag_V &= ~res; |
70357ce5 |
17089 | flag_NotZ |= res; |
17090 | flag_X = flag_C = M68K_SR_C; |
17091 | } |
c6e1e977 |
17092 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17093 | flag_N = res; |
17094 | POST_IO |
17095 | RET(12) |
17096 | } |
17097 | |
17098 | // NBCD |
17099 | OPCODE(0x4820) |
17100 | { |
17101 | u32 adr, res; |
17102 | u32 src, dst; |
17103 | |
17104 | adr = AREG((Opcode >> 0) & 7) - 1; |
17105 | AREG((Opcode >> 0) & 7) = adr; |
17106 | PRE_IO |
c6e1e977 |
17107 | READ_BYTE_F(adr, dst) |
17108 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17109 | |
c6e1e977 |
17110 | if (res != 0) |
70357ce5 |
17111 | { |
c6e1e977 |
17112 | flag_V = res; |
17113 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17114 | res = (res + 0x9a) & 0xFF; |
17115 | WRITE_BYTE_F(adr, res) |
17116 | flag_V &= ~res; |
70357ce5 |
17117 | flag_NotZ |= res; |
17118 | flag_X = flag_C = M68K_SR_C; |
17119 | } |
c6e1e977 |
17120 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17121 | flag_N = res; |
17122 | POST_IO |
17123 | RET(14) |
17124 | } |
17125 | |
17126 | // NBCD |
17127 | OPCODE(0x4828) |
17128 | { |
17129 | u32 adr, res; |
17130 | u32 src, dst; |
17131 | |
17132 | FETCH_SWORD(adr); |
17133 | adr += AREG((Opcode >> 0) & 7); |
17134 | PRE_IO |
c6e1e977 |
17135 | READ_BYTE_F(adr, dst) |
17136 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17137 | |
c6e1e977 |
17138 | if (res != 0) |
70357ce5 |
17139 | { |
c6e1e977 |
17140 | flag_V = res; |
17141 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17142 | res = (res + 0x9a) & 0xFF; |
17143 | WRITE_BYTE_F(adr, res) |
17144 | flag_V &= ~res; |
70357ce5 |
17145 | flag_NotZ |= res; |
17146 | flag_X = flag_C = M68K_SR_C; |
17147 | } |
c6e1e977 |
17148 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17149 | flag_N = res; |
17150 | POST_IO |
17151 | RET(16) |
17152 | } |
17153 | |
17154 | // NBCD |
17155 | OPCODE(0x4830) |
17156 | { |
17157 | u32 adr, res; |
17158 | u32 src, dst; |
17159 | |
17160 | adr = AREG((Opcode >> 0) & 7); |
17161 | DECODE_EXT_WORD |
17162 | PRE_IO |
c6e1e977 |
17163 | READ_BYTE_F(adr, dst) |
17164 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17165 | |
c6e1e977 |
17166 | if (res != 0) |
70357ce5 |
17167 | { |
c6e1e977 |
17168 | flag_V = res; |
17169 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17170 | res = (res + 0x9a) & 0xFF; |
17171 | WRITE_BYTE_F(adr, res) |
17172 | flag_V &= ~res; |
70357ce5 |
17173 | flag_NotZ |= res; |
17174 | flag_X = flag_C = M68K_SR_C; |
17175 | } |
c6e1e977 |
17176 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17177 | flag_N = res; |
17178 | POST_IO |
17179 | RET(18) |
17180 | } |
17181 | |
17182 | // NBCD |
17183 | OPCODE(0x4838) |
17184 | { |
17185 | u32 adr, res; |
17186 | u32 src, dst; |
17187 | |
17188 | FETCH_SWORD(adr); |
17189 | PRE_IO |
c6e1e977 |
17190 | READ_BYTE_F(adr, dst) |
17191 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17192 | |
c6e1e977 |
17193 | if (res != 0) |
70357ce5 |
17194 | { |
c6e1e977 |
17195 | flag_V = res; |
17196 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17197 | res = (res + 0x9a) & 0xFF; |
17198 | WRITE_BYTE_F(adr, res) |
17199 | flag_V &= ~res; |
70357ce5 |
17200 | flag_NotZ |= res; |
17201 | flag_X = flag_C = M68K_SR_C; |
17202 | } |
c6e1e977 |
17203 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17204 | flag_N = res; |
17205 | POST_IO |
17206 | RET(16) |
17207 | } |
17208 | |
17209 | // NBCD |
17210 | OPCODE(0x4839) |
17211 | { |
17212 | u32 adr, res; |
17213 | u32 src, dst; |
17214 | |
17215 | FETCH_LONG(adr); |
17216 | PRE_IO |
c6e1e977 |
17217 | READ_BYTE_F(adr, dst) |
17218 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17219 | |
c6e1e977 |
17220 | if (res != 0) |
70357ce5 |
17221 | { |
c6e1e977 |
17222 | flag_V = res; |
17223 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17224 | res = (res + 0x9a) & 0xFF; |
17225 | WRITE_BYTE_F(adr, res) |
17226 | flag_V &= ~res; |
70357ce5 |
17227 | flag_NotZ |= res; |
17228 | flag_X = flag_C = M68K_SR_C; |
17229 | } |
c6e1e977 |
17230 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17231 | flag_N = res; |
17232 | POST_IO |
17233 | RET(20) |
17234 | } |
17235 | |
17236 | // NBCD |
17237 | OPCODE(0x481F) |
17238 | { |
17239 | u32 adr, res; |
17240 | u32 src, dst; |
17241 | |
17242 | adr = AREG(7); |
17243 | AREG(7) += 2; |
17244 | PRE_IO |
c6e1e977 |
17245 | READ_BYTE_F(adr, dst) |
17246 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17247 | |
c6e1e977 |
17248 | if (res != 0) |
70357ce5 |
17249 | { |
c6e1e977 |
17250 | flag_V = res; |
17251 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17252 | res = (res + 0x9a) & 0xFF; |
17253 | WRITE_BYTE_F(adr, res) |
17254 | flag_V &= ~res; |
70357ce5 |
17255 | flag_NotZ |= res; |
17256 | flag_X = flag_C = M68K_SR_C; |
17257 | } |
c6e1e977 |
17258 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17259 | flag_N = res; |
17260 | POST_IO |
17261 | RET(12) |
17262 | } |
17263 | |
17264 | // NBCD |
17265 | OPCODE(0x4827) |
17266 | { |
17267 | u32 adr, res; |
17268 | u32 src, dst; |
17269 | |
17270 | adr = AREG(7) - 2; |
17271 | AREG(7) = adr; |
17272 | PRE_IO |
c6e1e977 |
17273 | READ_BYTE_F(adr, dst) |
17274 | res = -dst - ((flag_X >> M68K_SR_X_SFT) & 1); |
70357ce5 |
17275 | |
c6e1e977 |
17276 | if (res != 0) |
70357ce5 |
17277 | { |
c6e1e977 |
17278 | flag_V = res; |
17279 | if (((res|dst) & 0x0f) == 0) res = (res & 0xf0) + 6; |
17280 | res = (res + 0x9a) & 0xFF; |
17281 | WRITE_BYTE_F(adr, res) |
17282 | flag_V &= ~res; |
70357ce5 |
17283 | flag_NotZ |= res; |
17284 | flag_X = flag_C = M68K_SR_C; |
17285 | } |
c6e1e977 |
17286 | else flag_V = flag_X = flag_C = 0; |
70357ce5 |
17287 | flag_N = res; |
17288 | POST_IO |
17289 | RET(14) |
17290 | } |
17291 | |
17292 | // PEA |
17293 | OPCODE(0x4850) |
17294 | { |
17295 | u32 adr, res; |
17296 | u32 src, dst; |
17297 | |
17298 | adr = AREG((Opcode >> 0) & 7); |
17299 | PRE_IO |
17300 | PUSH_32_F(adr) |
17301 | POST_IO |
17302 | RET(12) |
17303 | } |
17304 | |
17305 | // PEA |
17306 | OPCODE(0x4868) |
17307 | { |
17308 | u32 adr, res; |
17309 | u32 src, dst; |
17310 | |
17311 | FETCH_SWORD(adr); |
17312 | adr += AREG((Opcode >> 0) & 7); |
17313 | PRE_IO |
17314 | PUSH_32_F(adr) |
17315 | POST_IO |
17316 | RET(16) |
17317 | } |
17318 | |
17319 | // PEA |
17320 | OPCODE(0x4870) |
17321 | { |
17322 | u32 adr, res; |
17323 | u32 src, dst; |
17324 | |
17325 | adr = AREG((Opcode >> 0) & 7); |
17326 | DECODE_EXT_WORD |
17327 | PRE_IO |
17328 | PUSH_32_F(adr) |
17329 | POST_IO |
17330 | RET(20) |
17331 | } |
17332 | |
17333 | // PEA |
17334 | OPCODE(0x4878) |
17335 | { |
17336 | u32 adr, res; |
17337 | u32 src, dst; |
17338 | |
17339 | FETCH_SWORD(adr); |
17340 | PRE_IO |
17341 | PUSH_32_F(adr) |
17342 | POST_IO |
17343 | RET(16) |
17344 | } |
17345 | |
17346 | // PEA |
17347 | OPCODE(0x4879) |
17348 | { |
17349 | u32 adr, res; |
17350 | u32 src, dst; |
17351 | |
17352 | FETCH_LONG(adr); |
17353 | PRE_IO |
17354 | PUSH_32_F(adr) |
17355 | POST_IO |
17356 | RET(20) |
17357 | } |
17358 | |
17359 | // PEA |
17360 | OPCODE(0x487A) |
17361 | { |
17362 | u32 adr, res; |
17363 | u32 src, dst; |
17364 | |
be26eb23 |
17365 | adr = GET_SWORD + GET_PC; |
70357ce5 |
17366 | PC++; |
17367 | PRE_IO |
17368 | PUSH_32_F(adr) |
17369 | POST_IO |
17370 | RET(16) |
17371 | } |
17372 | |
17373 | // PEA |
17374 | OPCODE(0x487B) |
17375 | { |
17376 | u32 adr, res; |
17377 | u32 src, dst; |
17378 | |
be26eb23 |
17379 | adr = GET_PC; |
70357ce5 |
17380 | DECODE_EXT_WORD |
17381 | PRE_IO |
17382 | PUSH_32_F(adr) |
17383 | POST_IO |
17384 | RET(20) |
17385 | } |
17386 | |
17387 | // SWAP |
17388 | OPCODE(0x4840) |
17389 | { |
17390 | u32 adr, res; |
17391 | u32 src, dst; |
17392 | |
17393 | res = DREGu32((Opcode >> 0) & 7); |
17394 | res = (res >> 16) | (res << 16); |
17395 | flag_C = 0; |
17396 | flag_V = 0; |
17397 | flag_NotZ = res; |
17398 | flag_N = res >> 24; |
17399 | DREGu32((Opcode >> 0) & 7) = res; |
17400 | RET(4) |
17401 | } |
17402 | |
17403 | // MOVEMRa |
17404 | OPCODE(0x4890) |
17405 | { |
17406 | u32 adr, res; |
17407 | u32 src, dst; |
17408 | |
17409 | u32 *psrc; |
17410 | |
17411 | FETCH_WORD(res); |
17412 | adr = AREG((Opcode >> 0) & 7); |
17413 | psrc = &DREGu32(0); |
17414 | dst = adr; |
17415 | PRE_IO |
17416 | do |
17417 | { |
17418 | if (res & 1) |
17419 | { |
17420 | WRITE_WORD_F(adr, *psrc) |
17421 | adr += 2; |
17422 | } |
17423 | psrc++; |
17424 | } while (res >>= 1); |
17425 | POST_IO |
7669591e |
17426 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17427 | #ifdef USE_CYCLONE_TIMING |
17428 | RET(8) |
17429 | #else |
17430 | RET(12) |
17431 | #endif |
17432 | } |
17433 | |
17434 | // MOVEMRa |
17435 | OPCODE(0x48A0) |
17436 | { |
17437 | u32 adr, res; |
17438 | u32 src, dst; |
17439 | |
17440 | u32 *psrc; |
17441 | |
17442 | FETCH_WORD(res); |
17443 | adr = AREG((Opcode >> 0) & 7); |
17444 | psrc = &AREGu32(7); |
17445 | dst = adr; |
17446 | PRE_IO |
17447 | do |
17448 | { |
17449 | if (res & 1) |
17450 | { |
17451 | adr -= 2; |
17452 | WRITE_WORD_F(adr, *psrc) |
17453 | } |
17454 | psrc--; |
17455 | } while (res >>= 1); |
17456 | AREG((Opcode >> 0) & 7) = adr; |
17457 | POST_IO |
7669591e |
17458 | ctx->io_cycle_counter -= (dst - adr) * 2; |
70357ce5 |
17459 | RET(8) |
17460 | } |
17461 | |
17462 | // MOVEMRa |
17463 | OPCODE(0x48A8) |
17464 | { |
17465 | u32 adr, res; |
17466 | u32 src, dst; |
17467 | |
17468 | u32 *psrc; |
17469 | |
17470 | FETCH_WORD(res); |
17471 | FETCH_SWORD(adr); |
17472 | adr += AREG((Opcode >> 0) & 7); |
17473 | psrc = &DREGu32(0); |
17474 | dst = adr; |
17475 | PRE_IO |
17476 | do |
17477 | { |
17478 | if (res & 1) |
17479 | { |
17480 | WRITE_WORD_F(adr, *psrc) |
17481 | adr += 2; |
17482 | } |
17483 | psrc++; |
17484 | } while (res >>= 1); |
17485 | POST_IO |
7669591e |
17486 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17487 | #ifdef USE_CYCLONE_TIMING |
17488 | RET(12) |
17489 | #else |
17490 | RET(20) |
17491 | #endif |
17492 | } |
17493 | |
17494 | // MOVEMRa |
17495 | OPCODE(0x48B0) |
17496 | { |
17497 | u32 adr, res; |
17498 | u32 src, dst; |
17499 | |
17500 | u32 *psrc; |
17501 | |
17502 | FETCH_WORD(res); |
17503 | adr = AREG((Opcode >> 0) & 7); |
17504 | DECODE_EXT_WORD |
17505 | psrc = &DREGu32(0); |
17506 | dst = adr; |
17507 | PRE_IO |
17508 | do |
17509 | { |
17510 | if (res & 1) |
17511 | { |
17512 | WRITE_WORD_F(adr, *psrc) |
17513 | adr += 2; |
17514 | } |
17515 | psrc++; |
17516 | } while (res >>= 1); |
17517 | POST_IO |
7669591e |
17518 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17519 | #ifdef USE_CYCLONE_TIMING |
17520 | RET(14) |
17521 | #else |
17522 | RET(24) |
17523 | #endif |
17524 | } |
17525 | |
17526 | // MOVEMRa |
17527 | OPCODE(0x48B8) |
17528 | { |
17529 | u32 adr, res; |
17530 | u32 src, dst; |
17531 | |
17532 | u32 *psrc; |
17533 | |
17534 | FETCH_WORD(res); |
17535 | FETCH_SWORD(adr); |
17536 | psrc = &DREGu32(0); |
17537 | dst = adr; |
17538 | PRE_IO |
17539 | do |
17540 | { |
17541 | if (res & 1) |
17542 | { |
17543 | WRITE_WORD_F(adr, *psrc) |
17544 | adr += 2; |
17545 | } |
17546 | psrc++; |
17547 | } while (res >>= 1); |
17548 | POST_IO |
7669591e |
17549 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17550 | #ifdef USE_CYCLONE_TIMING |
17551 | RET(12) |
17552 | #else |
17553 | RET(20) |
17554 | #endif |
17555 | } |
17556 | |
17557 | // MOVEMRa |
17558 | OPCODE(0x48B9) |
17559 | { |
17560 | u32 adr, res; |
17561 | u32 src, dst; |
17562 | |
17563 | u32 *psrc; |
17564 | |
17565 | FETCH_WORD(res); |
17566 | FETCH_LONG(adr); |
17567 | psrc = &DREGu32(0); |
17568 | dst = adr; |
17569 | PRE_IO |
17570 | do |
17571 | { |
17572 | if (res & 1) |
17573 | { |
17574 | WRITE_WORD_F(adr, *psrc) |
17575 | adr += 2; |
17576 | } |
17577 | psrc++; |
17578 | } while (res >>= 1); |
17579 | POST_IO |
7669591e |
17580 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17581 | #ifdef USE_CYCLONE_TIMING |
17582 | RET(16) |
17583 | #else |
17584 | RET(28) |
17585 | #endif |
17586 | } |
17587 | |
17588 | // MOVEMRa |
17589 | OPCODE(0x48A7) |
17590 | { |
17591 | u32 adr, res; |
17592 | u32 src, dst; |
17593 | |
17594 | u32 *psrc; |
17595 | |
17596 | FETCH_WORD(res); |
17597 | adr = AREG(7); |
17598 | psrc = &AREGu32(7); |
17599 | dst = adr; |
17600 | PRE_IO |
17601 | do |
17602 | { |
17603 | if (res & 1) |
17604 | { |
17605 | adr -= 2; |
17606 | WRITE_WORD_F(adr, *psrc) |
17607 | } |
17608 | psrc--; |
17609 | } while (res >>= 1); |
17610 | AREG(7) = adr; |
17611 | POST_IO |
7669591e |
17612 | ctx->io_cycle_counter -= (dst - adr) * 2; |
70357ce5 |
17613 | RET(8) |
17614 | } |
17615 | |
17616 | // MOVEMRa |
17617 | OPCODE(0x48D0) |
17618 | { |
17619 | u32 adr, res; |
17620 | u32 src, dst; |
17621 | |
17622 | u32 *psrc; |
17623 | |
17624 | FETCH_WORD(res); |
17625 | adr = AREG((Opcode >> 0) & 7); |
17626 | psrc = &DREGu32(0); |
17627 | dst = adr; |
17628 | PRE_IO |
17629 | do |
17630 | { |
17631 | if (res & 1) |
17632 | { |
17633 | WRITE_LONG_F(adr, *psrc) |
17634 | adr += 4; |
17635 | } |
17636 | psrc++; |
17637 | } while (res >>= 1); |
17638 | POST_IO |
7669591e |
17639 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17640 | #ifdef USE_CYCLONE_TIMING |
17641 | RET(8) |
17642 | #else |
17643 | RET(16) |
17644 | #endif |
17645 | } |
17646 | |
17647 | // MOVEMRa |
17648 | OPCODE(0x48E0) |
17649 | { |
17650 | u32 adr, res; |
17651 | u32 src, dst; |
17652 | |
17653 | u32 *psrc; |
17654 | |
17655 | FETCH_WORD(res); |
17656 | adr = AREG((Opcode >> 0) & 7); |
17657 | psrc = &AREGu32(7); |
17658 | dst = adr; |
17659 | PRE_IO |
17660 | do |
17661 | { |
17662 | if (res & 1) |
17663 | { |
17664 | adr -= 4; |
17665 | WRITE_LONG_DEC_F(adr, *psrc) |
17666 | } |
17667 | psrc--; |
17668 | } while (res >>= 1); |
17669 | AREG((Opcode >> 0) & 7) = adr; |
17670 | POST_IO |
7669591e |
17671 | ctx->io_cycle_counter -= (dst - adr) * 2; |
70357ce5 |
17672 | RET(8) |
17673 | } |
17674 | |
17675 | // MOVEMRa |
17676 | OPCODE(0x48E8) |
17677 | { |
17678 | u32 adr, res; |
17679 | u32 src, dst; |
17680 | |
17681 | u32 *psrc; |
17682 | |
17683 | FETCH_WORD(res); |
17684 | FETCH_SWORD(adr); |
17685 | adr += AREG((Opcode >> 0) & 7); |
17686 | psrc = &DREGu32(0); |
17687 | dst = adr; |
17688 | PRE_IO |
17689 | do |
17690 | { |
17691 | if (res & 1) |
17692 | { |
17693 | WRITE_LONG_F(adr, *psrc) |
17694 | adr += 4; |
17695 | } |
17696 | psrc++; |
17697 | } while (res >>= 1); |
17698 | POST_IO |
7669591e |
17699 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17700 | #ifdef USE_CYCLONE_TIMING |
17701 | RET(12) |
17702 | #else |
17703 | RET(24) |
17704 | #endif |
17705 | } |
17706 | |
17707 | // MOVEMRa |
17708 | OPCODE(0x48F0) |
17709 | { |
17710 | u32 adr, res; |
17711 | u32 src, dst; |
17712 | |
17713 | u32 *psrc; |
17714 | |
17715 | FETCH_WORD(res); |
17716 | adr = AREG((Opcode >> 0) & 7); |
17717 | DECODE_EXT_WORD |
17718 | psrc = &DREGu32(0); |
17719 | dst = adr; |
17720 | PRE_IO |
17721 | do |
17722 | { |
17723 | if (res & 1) |
17724 | { |
17725 | WRITE_LONG_F(adr, *psrc) |
17726 | adr += 4; |
17727 | } |
17728 | psrc++; |
17729 | } while (res >>= 1); |
17730 | POST_IO |
7669591e |
17731 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17732 | #ifdef USE_CYCLONE_TIMING |
17733 | RET(14) |
17734 | #else |
17735 | RET(28) |
17736 | #endif |
17737 | } |
17738 | |
17739 | // MOVEMRa |
17740 | OPCODE(0x48F8) |
17741 | { |
17742 | u32 adr, res; |
17743 | u32 src, dst; |
17744 | |
17745 | u32 *psrc; |
17746 | |
17747 | FETCH_WORD(res); |
17748 | FETCH_SWORD(adr); |
17749 | psrc = &DREGu32(0); |
17750 | dst = adr; |
17751 | PRE_IO |
17752 | do |
17753 | { |
17754 | if (res & 1) |
17755 | { |
17756 | WRITE_LONG_F(adr, *psrc) |
17757 | adr += 4; |
17758 | } |
17759 | psrc++; |
17760 | } while (res >>= 1); |
17761 | POST_IO |
7669591e |
17762 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17763 | #ifdef USE_CYCLONE_TIMING |
17764 | RET(12) |
17765 | #else |
17766 | RET(24) |
17767 | #endif |
17768 | } |
17769 | |
17770 | // MOVEMRa |
17771 | OPCODE(0x48F9) |
17772 | { |
17773 | u32 adr, res; |
17774 | u32 src, dst; |
17775 | |
17776 | u32 *psrc; |
17777 | |
17778 | FETCH_WORD(res); |
17779 | FETCH_LONG(adr); |
17780 | psrc = &DREGu32(0); |
17781 | dst = adr; |
17782 | PRE_IO |
17783 | do |
17784 | { |
17785 | if (res & 1) |
17786 | { |
17787 | WRITE_LONG_F(adr, *psrc) |
17788 | adr += 4; |
17789 | } |
17790 | psrc++; |
17791 | } while (res >>= 1); |
17792 | POST_IO |
7669591e |
17793 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
17794 | #ifdef USE_CYCLONE_TIMING |
17795 | RET(16) |
17796 | #else |
17797 | RET(32) |
17798 | #endif |
17799 | } |
17800 | |
17801 | // MOVEMRa |
17802 | OPCODE(0x48E7) |
17803 | { |
17804 | u32 adr, res; |
17805 | u32 src, dst; |
17806 | |
17807 | u32 *psrc; |
17808 | |
17809 | FETCH_WORD(res); |
17810 | adr = AREG(7); |
17811 | psrc = &AREGu32(7); |
17812 | dst = adr; |
17813 | PRE_IO |
17814 | do |
17815 | { |
17816 | if (res & 1) |
17817 | { |
17818 | adr -= 4; |
17819 | WRITE_LONG_DEC_F(adr, *psrc) |
17820 | } |
17821 | psrc--; |
17822 | } while (res >>= 1); |
17823 | AREG(7) = adr; |
17824 | POST_IO |
7669591e |
17825 | ctx->io_cycle_counter -= (dst - adr) * 2; |
70357ce5 |
17826 | RET(8) |
17827 | } |
17828 | |
17829 | // EXT |
17830 | OPCODE(0x4880) |
17831 | { |
17832 | u32 adr, res; |
17833 | u32 src, dst; |
17834 | |
17835 | res = (s32)DREGs8((Opcode >> 0) & 7); |
17836 | flag_C = 0; |
17837 | flag_V = 0; |
17838 | flag_NotZ = res; |
17839 | flag_N = res; |
17840 | DREGu16((Opcode >> 0) & 7) = res; |
17841 | RET(4) |
17842 | } |
17843 | |
17844 | // EXT |
17845 | OPCODE(0x48C0) |
17846 | { |
17847 | u32 adr, res; |
17848 | u32 src, dst; |
17849 | |
17850 | res = (s32)DREGs16((Opcode >> 0) & 7); |
17851 | flag_C = 0; |
17852 | flag_V = 0; |
17853 | flag_NotZ = res; |
17854 | flag_N = res >> 8; |
17855 | DREGu32((Opcode >> 0) & 7) = res; |
17856 | RET(4) |
17857 | } |
17858 | |
17859 | // TST |
17860 | OPCODE(0x4A00) |
17861 | { |
17862 | u32 adr, res; |
17863 | u32 src, dst; |
17864 | |
17865 | res = DREGu8((Opcode >> 0) & 7); |
17866 | flag_C = 0; |
17867 | flag_V = 0; |
17868 | flag_NotZ = res; |
17869 | flag_N = res; |
17870 | RET(4) |
17871 | } |
17872 | |
17873 | // TST |
17874 | OPCODE(0x4A10) |
17875 | { |
17876 | u32 adr, res; |
17877 | u32 src, dst; |
17878 | |
17879 | adr = AREG((Opcode >> 0) & 7); |
17880 | PRE_IO |
17881 | READ_BYTE_F(adr, res) |
17882 | flag_C = 0; |
17883 | flag_V = 0; |
17884 | flag_NotZ = res; |
17885 | flag_N = res; |
17886 | POST_IO |
17887 | RET(8) |
17888 | } |
17889 | |
17890 | // TST |
17891 | OPCODE(0x4A18) |
17892 | { |
17893 | u32 adr, res; |
17894 | u32 src, dst; |
17895 | |
17896 | adr = AREG((Opcode >> 0) & 7); |
17897 | AREG((Opcode >> 0) & 7) += 1; |
17898 | PRE_IO |
17899 | READ_BYTE_F(adr, res) |
17900 | flag_C = 0; |
17901 | flag_V = 0; |
17902 | flag_NotZ = res; |
17903 | flag_N = res; |
17904 | POST_IO |
17905 | RET(8) |
17906 | } |
17907 | |
17908 | // TST |
17909 | OPCODE(0x4A20) |
17910 | { |
17911 | u32 adr, res; |
17912 | u32 src, dst; |
17913 | |
17914 | adr = AREG((Opcode >> 0) & 7) - 1; |
17915 | AREG((Opcode >> 0) & 7) = adr; |
17916 | PRE_IO |
17917 | READ_BYTE_F(adr, res) |
17918 | flag_C = 0; |
17919 | flag_V = 0; |
17920 | flag_NotZ = res; |
17921 | flag_N = res; |
17922 | POST_IO |
17923 | RET(10) |
17924 | } |
17925 | |
17926 | // TST |
17927 | OPCODE(0x4A28) |
17928 | { |
17929 | u32 adr, res; |
17930 | u32 src, dst; |
17931 | |
17932 | FETCH_SWORD(adr); |
17933 | adr += AREG((Opcode >> 0) & 7); |
17934 | PRE_IO |
17935 | READ_BYTE_F(adr, res) |
17936 | flag_C = 0; |
17937 | flag_V = 0; |
17938 | flag_NotZ = res; |
17939 | flag_N = res; |
17940 | POST_IO |
17941 | RET(12) |
17942 | } |
17943 | |
17944 | // TST |
17945 | OPCODE(0x4A30) |
17946 | { |
17947 | u32 adr, res; |
17948 | u32 src, dst; |
17949 | |
17950 | adr = AREG((Opcode >> 0) & 7); |
17951 | DECODE_EXT_WORD |
17952 | PRE_IO |
17953 | READ_BYTE_F(adr, res) |
17954 | flag_C = 0; |
17955 | flag_V = 0; |
17956 | flag_NotZ = res; |
17957 | flag_N = res; |
17958 | POST_IO |
17959 | RET(14) |
17960 | } |
17961 | |
17962 | // TST |
17963 | OPCODE(0x4A38) |
17964 | { |
17965 | u32 adr, res; |
17966 | u32 src, dst; |
17967 | |
17968 | FETCH_SWORD(adr); |
17969 | PRE_IO |
17970 | READ_BYTE_F(adr, res) |
17971 | flag_C = 0; |
17972 | flag_V = 0; |
17973 | flag_NotZ = res; |
17974 | flag_N = res; |
17975 | POST_IO |
17976 | RET(12) |
17977 | } |
17978 | |
17979 | // TST |
17980 | OPCODE(0x4A39) |
17981 | { |
17982 | u32 adr, res; |
17983 | u32 src, dst; |
17984 | |
17985 | FETCH_LONG(adr); |
17986 | PRE_IO |
17987 | READ_BYTE_F(adr, res) |
17988 | flag_C = 0; |
17989 | flag_V = 0; |
17990 | flag_NotZ = res; |
17991 | flag_N = res; |
17992 | POST_IO |
17993 | RET(16) |
17994 | } |
17995 | |
17996 | // TST |
17997 | OPCODE(0x4A1F) |
17998 | { |
17999 | u32 adr, res; |
18000 | u32 src, dst; |
18001 | |
18002 | adr = AREG(7); |
18003 | AREG(7) += 2; |
18004 | PRE_IO |
18005 | READ_BYTE_F(adr, res) |
18006 | flag_C = 0; |
18007 | flag_V = 0; |
18008 | flag_NotZ = res; |
18009 | flag_N = res; |
18010 | POST_IO |
18011 | RET(8) |
18012 | } |
18013 | |
18014 | // TST |
18015 | OPCODE(0x4A27) |
18016 | { |
18017 | u32 adr, res; |
18018 | u32 src, dst; |
18019 | |
18020 | adr = AREG(7) - 2; |
18021 | AREG(7) = adr; |
18022 | PRE_IO |
18023 | READ_BYTE_F(adr, res) |
18024 | flag_C = 0; |
18025 | flag_V = 0; |
18026 | flag_NotZ = res; |
18027 | flag_N = res; |
18028 | POST_IO |
18029 | RET(10) |
18030 | } |
18031 | |
18032 | // TST |
18033 | OPCODE(0x4A40) |
18034 | { |
18035 | u32 adr, res; |
18036 | u32 src, dst; |
18037 | |
18038 | res = DREGu16((Opcode >> 0) & 7); |
18039 | flag_C = 0; |
18040 | flag_V = 0; |
18041 | flag_NotZ = res; |
18042 | flag_N = res >> 8; |
18043 | RET(4) |
18044 | } |
18045 | |
18046 | // TST |
18047 | OPCODE(0x4A50) |
18048 | { |
18049 | u32 adr, res; |
18050 | u32 src, dst; |
18051 | |
18052 | adr = AREG((Opcode >> 0) & 7); |
18053 | PRE_IO |
18054 | READ_WORD_F(adr, res) |
18055 | flag_C = 0; |
18056 | flag_V = 0; |
18057 | flag_NotZ = res; |
18058 | flag_N = res >> 8; |
18059 | POST_IO |
18060 | RET(8) |
18061 | } |
18062 | |
18063 | // TST |
18064 | OPCODE(0x4A58) |
18065 | { |
18066 | u32 adr, res; |
18067 | u32 src, dst; |
18068 | |
18069 | adr = AREG((Opcode >> 0) & 7); |
18070 | AREG((Opcode >> 0) & 7) += 2; |
18071 | PRE_IO |
18072 | READ_WORD_F(adr, res) |
18073 | flag_C = 0; |
18074 | flag_V = 0; |
18075 | flag_NotZ = res; |
18076 | flag_N = res >> 8; |
18077 | POST_IO |
18078 | RET(8) |
18079 | } |
18080 | |
18081 | // TST |
18082 | OPCODE(0x4A60) |
18083 | { |
18084 | u32 adr, res; |
18085 | u32 src, dst; |
18086 | |
18087 | adr = AREG((Opcode >> 0) & 7) - 2; |
18088 | AREG((Opcode >> 0) & 7) = adr; |
18089 | PRE_IO |
18090 | READ_WORD_F(adr, res) |
18091 | flag_C = 0; |
18092 | flag_V = 0; |
18093 | flag_NotZ = res; |
18094 | flag_N = res >> 8; |
18095 | POST_IO |
18096 | RET(10) |
18097 | } |
18098 | |
18099 | // TST |
18100 | OPCODE(0x4A68) |
18101 | { |
18102 | u32 adr, res; |
18103 | u32 src, dst; |
18104 | |
18105 | FETCH_SWORD(adr); |
18106 | adr += AREG((Opcode >> 0) & 7); |
18107 | PRE_IO |
18108 | READ_WORD_F(adr, res) |
18109 | flag_C = 0; |
18110 | flag_V = 0; |
18111 | flag_NotZ = res; |
18112 | flag_N = res >> 8; |
18113 | POST_IO |
18114 | RET(12) |
18115 | } |
18116 | |
18117 | // TST |
18118 | OPCODE(0x4A70) |
18119 | { |
18120 | u32 adr, res; |
18121 | u32 src, dst; |
18122 | |
18123 | adr = AREG((Opcode >> 0) & 7); |
18124 | DECODE_EXT_WORD |
18125 | PRE_IO |
18126 | READ_WORD_F(adr, res) |
18127 | flag_C = 0; |
18128 | flag_V = 0; |
18129 | flag_NotZ = res; |
18130 | flag_N = res >> 8; |
18131 | POST_IO |
18132 | RET(14) |
18133 | } |
18134 | |
18135 | // TST |
18136 | OPCODE(0x4A78) |
18137 | { |
18138 | u32 adr, res; |
18139 | u32 src, dst; |
18140 | |
18141 | FETCH_SWORD(adr); |
18142 | PRE_IO |
18143 | READ_WORD_F(adr, res) |
18144 | flag_C = 0; |
18145 | flag_V = 0; |
18146 | flag_NotZ = res; |
18147 | flag_N = res >> 8; |
18148 | POST_IO |
18149 | RET(12) |
18150 | } |
18151 | |
18152 | // TST |
18153 | OPCODE(0x4A79) |
18154 | { |
18155 | u32 adr, res; |
18156 | u32 src, dst; |
18157 | |
18158 | FETCH_LONG(adr); |
18159 | PRE_IO |
18160 | READ_WORD_F(adr, res) |
18161 | flag_C = 0; |
18162 | flag_V = 0; |
18163 | flag_NotZ = res; |
18164 | flag_N = res >> 8; |
18165 | POST_IO |
18166 | RET(16) |
18167 | } |
18168 | |
18169 | // TST |
18170 | OPCODE(0x4A5F) |
18171 | { |
18172 | u32 adr, res; |
18173 | u32 src, dst; |
18174 | |
18175 | adr = AREG(7); |
18176 | AREG(7) += 2; |
18177 | PRE_IO |
18178 | READ_WORD_F(adr, res) |
18179 | flag_C = 0; |
18180 | flag_V = 0; |
18181 | flag_NotZ = res; |
18182 | flag_N = res >> 8; |
18183 | POST_IO |
18184 | RET(8) |
18185 | } |
18186 | |
18187 | // TST |
18188 | OPCODE(0x4A67) |
18189 | { |
18190 | u32 adr, res; |
18191 | u32 src, dst; |
18192 | |
18193 | adr = AREG(7) - 2; |
18194 | AREG(7) = adr; |
18195 | PRE_IO |
18196 | READ_WORD_F(adr, res) |
18197 | flag_C = 0; |
18198 | flag_V = 0; |
18199 | flag_NotZ = res; |
18200 | flag_N = res >> 8; |
18201 | POST_IO |
18202 | RET(10) |
18203 | } |
18204 | |
18205 | // TST |
18206 | OPCODE(0x4A80) |
18207 | { |
18208 | u32 adr, res; |
18209 | u32 src, dst; |
18210 | |
18211 | res = DREGu32((Opcode >> 0) & 7); |
18212 | flag_C = 0; |
18213 | flag_V = 0; |
18214 | flag_NotZ = res; |
18215 | flag_N = res >> 24; |
18216 | RET(4) |
18217 | } |
18218 | |
18219 | // TST |
18220 | OPCODE(0x4A90) |
18221 | { |
18222 | u32 adr, res; |
18223 | u32 src, dst; |
18224 | |
18225 | adr = AREG((Opcode >> 0) & 7); |
18226 | PRE_IO |
18227 | READ_LONG_F(adr, res) |
18228 | flag_C = 0; |
18229 | flag_V = 0; |
18230 | flag_NotZ = res; |
18231 | flag_N = res >> 24; |
18232 | POST_IO |
18233 | RET(12) |
18234 | } |
18235 | |
18236 | // TST |
18237 | OPCODE(0x4A98) |
18238 | { |
18239 | u32 adr, res; |
18240 | u32 src, dst; |
18241 | |
18242 | adr = AREG((Opcode >> 0) & 7); |
18243 | AREG((Opcode >> 0) & 7) += 4; |
18244 | PRE_IO |
18245 | READ_LONG_F(adr, res) |
18246 | flag_C = 0; |
18247 | flag_V = 0; |
18248 | flag_NotZ = res; |
18249 | flag_N = res >> 24; |
18250 | POST_IO |
18251 | RET(12) |
18252 | } |
18253 | |
18254 | // TST |
18255 | OPCODE(0x4AA0) |
18256 | { |
18257 | u32 adr, res; |
18258 | u32 src, dst; |
18259 | |
18260 | adr = AREG((Opcode >> 0) & 7) - 4; |
18261 | AREG((Opcode >> 0) & 7) = adr; |
18262 | PRE_IO |
18263 | READ_LONG_F(adr, res) |
18264 | flag_C = 0; |
18265 | flag_V = 0; |
18266 | flag_NotZ = res; |
18267 | flag_N = res >> 24; |
18268 | POST_IO |
18269 | RET(14) |
18270 | } |
18271 | |
18272 | // TST |
18273 | OPCODE(0x4AA8) |
18274 | { |
18275 | u32 adr, res; |
18276 | u32 src, dst; |
18277 | |
18278 | FETCH_SWORD(adr); |
18279 | adr += AREG((Opcode >> 0) & 7); |
18280 | PRE_IO |
18281 | READ_LONG_F(adr, res) |
18282 | flag_C = 0; |
18283 | flag_V = 0; |
18284 | flag_NotZ = res; |
18285 | flag_N = res >> 24; |
18286 | POST_IO |
18287 | RET(16) |
18288 | } |
18289 | |
18290 | // TST |
18291 | OPCODE(0x4AB0) |
18292 | { |
18293 | u32 adr, res; |
18294 | u32 src, dst; |
18295 | |
18296 | adr = AREG((Opcode >> 0) & 7); |
18297 | DECODE_EXT_WORD |
18298 | PRE_IO |
18299 | READ_LONG_F(adr, res) |
18300 | flag_C = 0; |
18301 | flag_V = 0; |
18302 | flag_NotZ = res; |
18303 | flag_N = res >> 24; |
18304 | POST_IO |
18305 | RET(18) |
18306 | } |
18307 | |
18308 | // TST |
18309 | OPCODE(0x4AB8) |
18310 | { |
18311 | u32 adr, res; |
18312 | u32 src, dst; |
18313 | |
18314 | FETCH_SWORD(adr); |
18315 | PRE_IO |
18316 | READ_LONG_F(adr, res) |
18317 | flag_C = 0; |
18318 | flag_V = 0; |
18319 | flag_NotZ = res; |
18320 | flag_N = res >> 24; |
18321 | POST_IO |
18322 | RET(16) |
18323 | } |
18324 | |
18325 | // TST |
18326 | OPCODE(0x4AB9) |
18327 | { |
18328 | u32 adr, res; |
18329 | u32 src, dst; |
18330 | |
18331 | FETCH_LONG(adr); |
18332 | PRE_IO |
18333 | READ_LONG_F(adr, res) |
18334 | flag_C = 0; |
18335 | flag_V = 0; |
18336 | flag_NotZ = res; |
18337 | flag_N = res >> 24; |
18338 | POST_IO |
18339 | RET(20) |
18340 | } |
18341 | |
18342 | // TST |
18343 | OPCODE(0x4A9F) |
18344 | { |
18345 | u32 adr, res; |
18346 | u32 src, dst; |
18347 | |
18348 | adr = AREG(7); |
18349 | AREG(7) += 4; |
18350 | PRE_IO |
18351 | READ_LONG_F(adr, res) |
18352 | flag_C = 0; |
18353 | flag_V = 0; |
18354 | flag_NotZ = res; |
18355 | flag_N = res >> 24; |
18356 | POST_IO |
18357 | RET(12) |
18358 | } |
18359 | |
18360 | // TST |
18361 | OPCODE(0x4AA7) |
18362 | { |
18363 | u32 adr, res; |
18364 | u32 src, dst; |
18365 | |
18366 | adr = AREG(7) - 4; |
18367 | AREG(7) = adr; |
18368 | PRE_IO |
18369 | READ_LONG_F(adr, res) |
18370 | flag_C = 0; |
18371 | flag_V = 0; |
18372 | flag_NotZ = res; |
18373 | flag_N = res >> 24; |
18374 | POST_IO |
18375 | RET(14) |
18376 | } |
18377 | |
18378 | // TAS |
18379 | OPCODE(0x4AC0) |
18380 | { |
18381 | u32 adr, res; |
18382 | u32 src, dst; |
18383 | |
18384 | res = DREGu8((Opcode >> 0) & 7); |
18385 | flag_C = 0; |
18386 | flag_V = 0; |
18387 | flag_NotZ = res; |
18388 | flag_N = res; |
18389 | res |= 0x80; |
18390 | DREGu8((Opcode >> 0) & 7) = res; |
18391 | RET(4) |
18392 | } |
18393 | |
18394 | // TAS |
18395 | OPCODE(0x4AD0) |
18396 | { |
18397 | u32 adr, res; |
18398 | u32 src, dst; |
18399 | |
18400 | adr = AREG((Opcode >> 0) & 7); |
18401 | PRE_IO |
18402 | READ_BYTE_F(adr, res) |
18403 | flag_C = 0; |
18404 | flag_V = 0; |
18405 | flag_NotZ = res; |
18406 | flag_N = res; |
b5e5172d |
18407 | #ifdef PICODRIVE_HACK |
7669591e |
18408 | if (ctx == &PicoCpuFS68k) { |
b5e5172d |
18409 | res |= 0x80; |
18410 | WRITE_BYTE_F(adr, res); |
18411 | } |
18412 | #endif |
18413 | |
70357ce5 |
18414 | POST_IO |
b5e5172d |
18415 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
18416 | RET(14) |
b5e5172d |
18417 | #else |
70357ce5 |
18418 | RET(8) |
b5e5172d |
18419 | #endif |
70357ce5 |
18420 | } |
18421 | |
18422 | // TAS |
18423 | OPCODE(0x4AD8) |
18424 | { |
18425 | u32 adr, res; |
18426 | u32 src, dst; |
18427 | |
18428 | adr = AREG((Opcode >> 0) & 7); |
18429 | AREG((Opcode >> 0) & 7) += 1; |
18430 | PRE_IO |
18431 | READ_BYTE_F(adr, res) |
18432 | flag_C = 0; |
18433 | flag_V = 0; |
18434 | flag_NotZ = res; |
18435 | flag_N = res; |
b5e5172d |
18436 | |
18437 | #ifdef PICODRIVE_HACK |
7669591e |
18438 | if (ctx == &PicoCpuFS68k) { |
b5e5172d |
18439 | res |= 0x80; |
18440 | WRITE_BYTE_F(adr, res); |
18441 | } |
18442 | #endif |
18443 | |
70357ce5 |
18444 | POST_IO |
b5e5172d |
18445 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
18446 | RET(14) |
b5e5172d |
18447 | #else |
70357ce5 |
18448 | RET(8) |
b5e5172d |
18449 | #endif |
70357ce5 |
18450 | } |
18451 | |
18452 | // TAS |
18453 | OPCODE(0x4AE0) |
18454 | { |
18455 | u32 adr, res; |
18456 | u32 src, dst; |
18457 | |
18458 | adr = AREG((Opcode >> 0) & 7) - 1; |
18459 | AREG((Opcode >> 0) & 7) = adr; |
18460 | PRE_IO |
18461 | READ_BYTE_F(adr, res) |
18462 | flag_C = 0; |
18463 | flag_V = 0; |
18464 | flag_NotZ = res; |
18465 | flag_N = res; |
b5e5172d |
18466 | |
18467 | #ifdef PICODRIVE_HACK |
7669591e |
18468 | if (ctx == &PicoCpuFS68k) { |
b5e5172d |
18469 | res |= 0x80; |
18470 | WRITE_BYTE_F(adr, res); |
18471 | } |
18472 | #endif |
18473 | |
70357ce5 |
18474 | POST_IO |
b5e5172d |
18475 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
18476 | RET(16) |
b5e5172d |
18477 | #else |
70357ce5 |
18478 | RET(10) |
b5e5172d |
18479 | #endif |
70357ce5 |
18480 | } |
18481 | |
18482 | // TAS |
18483 | OPCODE(0x4AE8) |
18484 | { |
18485 | u32 adr, res; |
18486 | u32 src, dst; |
18487 | |
18488 | FETCH_SWORD(adr); |
18489 | adr += AREG((Opcode >> 0) & 7); |
18490 | PRE_IO |
18491 | READ_BYTE_F(adr, res) |
18492 | flag_C = 0; |
18493 | flag_V = 0; |
18494 | flag_NotZ = res; |
18495 | flag_N = res; |
b5e5172d |
18496 | |
18497 | #ifdef PICODRIVE_HACK |
7669591e |
18498 | if (ctx == &PicoCpuFS68k) { |
b5e5172d |
18499 | res |= 0x80; |
18500 | WRITE_BYTE_F(adr, res); |
18501 | } |
18502 | #endif |
18503 | |
70357ce5 |
18504 | POST_IO |
b5e5172d |
18505 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
18506 | RET(18) |
b5e5172d |
18507 | #else |
70357ce5 |
18508 | RET(12) |
b5e5172d |
18509 | #endif |
70357ce5 |
18510 | } |
18511 | |
18512 | // TAS |
18513 | OPCODE(0x4AF0) |
18514 | { |
18515 | u32 adr, res; |
18516 | u32 src, dst; |
18517 | |
18518 | adr = AREG((Opcode >> 0) & 7); |
18519 | DECODE_EXT_WORD |
18520 | PRE_IO |
18521 | READ_BYTE_F(adr, res) |
18522 | flag_C = 0; |
18523 | flag_V = 0; |
18524 | flag_NotZ = res; |
18525 | flag_N = res; |
b5e5172d |
18526 | |
18527 | #ifdef PICODRIVE_HACK |
7669591e |
18528 | if (ctx == &PicoCpuFS68k) { |
b5e5172d |
18529 | res |= 0x80; |
18530 | WRITE_BYTE_F(adr, res); |
18531 | } |
18532 | #endif |
18533 | |
70357ce5 |
18534 | POST_IO |
b5e5172d |
18535 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
18536 | RET(20) |
b5e5172d |
18537 | #else |
70357ce5 |
18538 | RET(14) |
b5e5172d |
18539 | #endif |
70357ce5 |
18540 | } |
18541 | |
18542 | // TAS |
18543 | OPCODE(0x4AF8) |
18544 | { |
18545 | u32 adr, res; |
18546 | u32 src, dst; |
18547 | |
18548 | FETCH_SWORD(adr); |
18549 | PRE_IO |
18550 | READ_BYTE_F(adr, res) |
18551 | flag_C = 0; |
18552 | flag_V = 0; |
18553 | flag_NotZ = res; |
18554 | flag_N = res; |
b5e5172d |
18555 | |
18556 | #ifdef PICODRIVE_HACK |
7669591e |
18557 | if (ctx == &PicoCpuFS68k) { |
b5e5172d |
18558 | res |= 0x80; |
18559 | WRITE_BYTE_F(adr, res); |
18560 | } |
18561 | #endif |
18562 | |
70357ce5 |
18563 | POST_IO |
b5e5172d |
18564 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
18565 | RET(18) |
b5e5172d |
18566 | #else |
70357ce5 |
18567 | RET(12) |
b5e5172d |
18568 | #endif |
70357ce5 |
18569 | } |
18570 | |
18571 | // TAS |
18572 | OPCODE(0x4AF9) |
18573 | { |
18574 | u32 adr, res; |
18575 | u32 src, dst; |
18576 | |
18577 | FETCH_LONG(adr); |
18578 | PRE_IO |
18579 | READ_BYTE_F(adr, res) |
18580 | flag_C = 0; |
18581 | flag_V = 0; |
18582 | flag_NotZ = res; |
18583 | flag_N = res; |
b5e5172d |
18584 | |
18585 | #ifdef PICODRIVE_HACK |
7669591e |
18586 | if (ctx == &PicoCpuFS68k) { |
b5e5172d |
18587 | res |= 0x80; |
18588 | WRITE_BYTE_F(adr, res); |
18589 | } |
18590 | #endif |
18591 | |
70357ce5 |
18592 | POST_IO |
b5e5172d |
18593 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
18594 | RET(22) |
b5e5172d |
18595 | #else |
70357ce5 |
18596 | RET(16) |
b5e5172d |
18597 | #endif |
70357ce5 |
18598 | } |
18599 | |
18600 | // TAS |
18601 | OPCODE(0x4ADF) |
18602 | { |
18603 | u32 adr, res; |
18604 | u32 src, dst; |
18605 | |
18606 | adr = AREG(7); |
18607 | AREG(7) += 2; |
18608 | PRE_IO |
18609 | READ_BYTE_F(adr, res) |
18610 | flag_C = 0; |
18611 | flag_V = 0; |
18612 | flag_NotZ = res; |
18613 | flag_N = res; |
b5e5172d |
18614 | |
18615 | #ifdef PICODRIVE_HACK |
7669591e |
18616 | if (ctx == &PicoCpuFS68k) { |
b5e5172d |
18617 | res |= 0x80; |
18618 | WRITE_BYTE_F(adr, res); |
18619 | } |
18620 | #endif |
18621 | |
70357ce5 |
18622 | POST_IO |
b5e5172d |
18623 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
18624 | RET(14) |
b5e5172d |
18625 | #else |
70357ce5 |
18626 | RET(8) |
b5e5172d |
18627 | #endif |
70357ce5 |
18628 | } |
18629 | |
18630 | // TAS |
18631 | OPCODE(0x4AE7) |
18632 | { |
18633 | u32 adr, res; |
18634 | u32 src, dst; |
18635 | |
18636 | adr = AREG(7) - 2; |
18637 | AREG(7) = adr; |
18638 | PRE_IO |
18639 | READ_BYTE_F(adr, res) |
18640 | flag_C = 0; |
18641 | flag_V = 0; |
18642 | flag_NotZ = res; |
18643 | flag_N = res; |
b5e5172d |
18644 | |
18645 | #ifdef PICODRIVE_HACK |
7669591e |
18646 | if (ctx == &PicoCpuFS68k) { |
b5e5172d |
18647 | res |= 0x80; |
18648 | WRITE_BYTE_F(adr, res); |
18649 | } |
18650 | #endif |
18651 | |
70357ce5 |
18652 | POST_IO |
b5e5172d |
18653 | #ifdef USE_CYCLONE_TIMING |
18654 | RET(20) |
18655 | #else |
18656 | RET(8) |
18657 | #endif |
70357ce5 |
18658 | } |
18659 | |
18660 | // ILLEGAL |
18661 | OPCODE(0x4AFC) |
18662 | { |
2b15cea8 |
18663 | #ifdef PICODRIVE_HACK |
18664 | extern void SekFinishIdleDet(void); |
18665 | SekFinishIdleDet(); |
18666 | #endif |
7669591e |
18667 | SET_PC(execute_exception(ctx, M68K_ILLEGAL_INSTRUCTION_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18668 | RET(0) |
70357ce5 |
18669 | } |
18670 | |
18671 | // ILLEGAL A000-AFFF |
18672 | OPCODE(0xA000) |
18673 | { |
7669591e |
18674 | SET_PC(execute_exception(ctx, M68K_1010_EX, GET_PC-2, GET_SR)); |
03e4f2a3 |
18675 | RET(0) |
70357ce5 |
18676 | } |
18677 | |
18678 | // ILLEGAL F000-FFFF |
18679 | OPCODE(0xF000) |
18680 | { |
7669591e |
18681 | SET_PC(execute_exception(ctx, M68K_1111_EX, GET_PC-2, GET_SR)); |
3f591822 |
18682 | RET(0) |
70357ce5 |
18683 | } |
18684 | |
18685 | // MOVEMaR |
18686 | OPCODE(0x4C90) |
18687 | { |
18688 | u32 adr, res; |
18689 | u32 src, dst; |
18690 | |
18691 | s32 *psrc; |
18692 | |
18693 | FETCH_WORD(res); |
18694 | adr = AREG((Opcode >> 0) & 7); |
18695 | psrc = &DREGs32(0); |
18696 | dst = adr; |
18697 | PRE_IO |
18698 | do |
18699 | { |
18700 | if (res & 1) |
18701 | { |
18702 | READSX_WORD_F(adr, *psrc) |
18703 | adr += 2; |
18704 | } |
18705 | psrc++; |
18706 | } while (res >>= 1); |
18707 | POST_IO |
7669591e |
18708 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18709 | #ifdef USE_CYCLONE_TIMING |
18710 | RET(12) |
18711 | #else |
18712 | RET(16) |
18713 | #endif |
18714 | } |
18715 | |
18716 | // MOVEMaR |
18717 | OPCODE(0x4C98) |
18718 | { |
18719 | u32 adr, res; |
18720 | u32 src, dst; |
18721 | |
18722 | s32 *psrc; |
18723 | |
18724 | FETCH_WORD(res); |
18725 | adr = AREG((Opcode >> 0) & 7); |
18726 | psrc = &DREGs32(0); |
18727 | dst = adr; |
18728 | PRE_IO |
18729 | do |
18730 | { |
18731 | if (res & 1) |
18732 | { |
18733 | READSX_WORD_F(adr, *psrc) |
18734 | adr += 2; |
18735 | } |
18736 | psrc++; |
18737 | } while (res >>= 1); |
18738 | AREG((Opcode >> 0) & 7) = adr; |
18739 | POST_IO |
7669591e |
18740 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18741 | RET(12) |
18742 | } |
18743 | |
18744 | // MOVEMaR |
18745 | OPCODE(0x4CA8) |
18746 | { |
18747 | u32 adr, res; |
18748 | u32 src, dst; |
18749 | |
18750 | s32 *psrc; |
18751 | |
18752 | FETCH_WORD(res); |
18753 | FETCH_SWORD(adr); |
18754 | adr += AREG((Opcode >> 0) & 7); |
18755 | psrc = &DREGs32(0); |
18756 | dst = adr; |
18757 | PRE_IO |
18758 | do |
18759 | { |
18760 | if (res & 1) |
18761 | { |
18762 | READSX_WORD_F(adr, *psrc) |
18763 | adr += 2; |
18764 | } |
18765 | psrc++; |
18766 | } while (res >>= 1); |
18767 | POST_IO |
7669591e |
18768 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18769 | #ifdef USE_CYCLONE_TIMING |
18770 | RET(16) |
18771 | #else |
18772 | RET(24) |
18773 | #endif |
18774 | } |
18775 | |
18776 | // MOVEMaR |
18777 | OPCODE(0x4CB0) |
18778 | { |
18779 | u32 adr, res; |
18780 | u32 src, dst; |
18781 | |
18782 | s32 *psrc; |
18783 | |
18784 | FETCH_WORD(res); |
18785 | adr = AREG((Opcode >> 0) & 7); |
18786 | DECODE_EXT_WORD |
18787 | psrc = &DREGs32(0); |
18788 | dst = adr; |
18789 | PRE_IO |
18790 | do |
18791 | { |
18792 | if (res & 1) |
18793 | { |
18794 | READSX_WORD_F(adr, *psrc) |
18795 | adr += 2; |
18796 | } |
18797 | psrc++; |
18798 | } while (res >>= 1); |
18799 | POST_IO |
7669591e |
18800 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18801 | #ifdef USE_CYCLONE_TIMING |
18802 | RET(18) |
18803 | #else |
18804 | RET(28) |
18805 | #endif |
18806 | } |
18807 | |
18808 | // MOVEMaR |
18809 | OPCODE(0x4CB8) |
18810 | { |
18811 | u32 adr, res; |
18812 | u32 src, dst; |
18813 | |
18814 | s32 *psrc; |
18815 | |
18816 | FETCH_WORD(res); |
18817 | FETCH_SWORD(adr); |
18818 | psrc = &DREGs32(0); |
18819 | dst = adr; |
18820 | PRE_IO |
18821 | do |
18822 | { |
18823 | if (res & 1) |
18824 | { |
18825 | READSX_WORD_F(adr, *psrc) |
18826 | adr += 2; |
18827 | } |
18828 | psrc++; |
18829 | } while (res >>= 1); |
18830 | POST_IO |
7669591e |
18831 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18832 | #ifdef USE_CYCLONE_TIMING |
18833 | RET(16) |
18834 | #else |
18835 | RET(24) |
18836 | #endif |
18837 | } |
18838 | |
18839 | // MOVEMaR |
18840 | OPCODE(0x4CB9) |
18841 | { |
18842 | u32 adr, res; |
18843 | u32 src, dst; |
18844 | |
18845 | s32 *psrc; |
18846 | |
18847 | FETCH_WORD(res); |
18848 | FETCH_LONG(adr); |
18849 | psrc = &DREGs32(0); |
18850 | dst = adr; |
18851 | PRE_IO |
18852 | do |
18853 | { |
18854 | if (res & 1) |
18855 | { |
18856 | READSX_WORD_F(adr, *psrc) |
18857 | adr += 2; |
18858 | } |
18859 | psrc++; |
18860 | } while (res >>= 1); |
18861 | POST_IO |
7669591e |
18862 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18863 | #ifdef USE_CYCLONE_TIMING |
18864 | RET(20) |
18865 | #else |
18866 | RET(32) |
18867 | #endif |
18868 | } |
18869 | |
18870 | // MOVEMaR |
18871 | OPCODE(0x4CBA) |
18872 | { |
18873 | u32 adr, res; |
18874 | u32 src, dst; |
18875 | |
18876 | s32 *psrc; |
18877 | |
18878 | FETCH_WORD(res); |
be26eb23 |
18879 | adr = GET_SWORD + GET_PC; |
70357ce5 |
18880 | PC++; |
18881 | psrc = &DREGs32(0); |
18882 | dst = adr; |
18883 | PRE_IO |
18884 | do |
18885 | { |
18886 | if (res & 1) |
18887 | { |
18888 | READSX_WORD_F(adr, *psrc) |
18889 | adr += 2; |
18890 | } |
18891 | psrc++; |
18892 | } while (res >>= 1); |
18893 | POST_IO |
7669591e |
18894 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18895 | #ifdef USE_CYCLONE_TIMING |
18896 | RET(16) |
18897 | #else |
18898 | RET(24) |
18899 | #endif |
18900 | } |
18901 | |
18902 | // MOVEMaR |
18903 | OPCODE(0x4CBB) |
18904 | { |
18905 | u32 adr, res; |
18906 | u32 src, dst; |
18907 | |
18908 | s32 *psrc; |
18909 | |
18910 | FETCH_WORD(res); |
be26eb23 |
18911 | adr = GET_PC; |
70357ce5 |
18912 | DECODE_EXT_WORD |
18913 | psrc = &DREGs32(0); |
18914 | dst = adr; |
18915 | PRE_IO |
18916 | do |
18917 | { |
18918 | if (res & 1) |
18919 | { |
18920 | READSX_WORD_F(adr, *psrc) |
18921 | adr += 2; |
18922 | } |
18923 | psrc++; |
18924 | } while (res >>= 1); |
18925 | POST_IO |
7669591e |
18926 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18927 | #ifdef USE_CYCLONE_TIMING |
18928 | RET(18) |
18929 | #else |
18930 | RET(28) |
18931 | #endif |
18932 | } |
18933 | |
18934 | // MOVEMaR |
18935 | OPCODE(0x4C9F) |
18936 | { |
18937 | u32 adr, res; |
18938 | u32 src, dst; |
18939 | |
18940 | s32 *psrc; |
18941 | |
18942 | FETCH_WORD(res); |
18943 | adr = AREG(7); |
18944 | psrc = &DREGs32(0); |
18945 | dst = adr; |
18946 | PRE_IO |
18947 | do |
18948 | { |
18949 | if (res & 1) |
18950 | { |
18951 | READSX_WORD_F(adr, *psrc) |
18952 | adr += 2; |
18953 | } |
18954 | psrc++; |
18955 | } while (res >>= 1); |
18956 | AREG(7) = adr; |
18957 | POST_IO |
7669591e |
18958 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18959 | RET(12) |
18960 | } |
18961 | |
18962 | // MOVEMaR |
18963 | OPCODE(0x4CD0) |
18964 | { |
18965 | u32 adr, res; |
18966 | u32 src, dst; |
18967 | |
18968 | u32 *psrc; |
18969 | |
18970 | FETCH_WORD(res); |
18971 | adr = AREG((Opcode >> 0) & 7); |
18972 | psrc = &DREGu32(0); |
18973 | dst = adr; |
18974 | PRE_IO |
18975 | do |
18976 | { |
18977 | if (res & 1) |
18978 | { |
18979 | READ_LONG_F(adr, *psrc) |
18980 | adr += 4; |
18981 | } |
18982 | psrc++; |
18983 | } while (res >>= 1); |
18984 | POST_IO |
7669591e |
18985 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
18986 | #ifdef USE_CYCLONE_TIMING |
18987 | RET(12) |
18988 | #else |
18989 | RET(20) |
18990 | #endif |
18991 | } |
18992 | |
18993 | // MOVEMaR |
18994 | OPCODE(0x4CD8) |
18995 | { |
18996 | u32 adr, res; |
18997 | u32 src, dst; |
18998 | |
18999 | u32 *psrc; |
19000 | |
19001 | FETCH_WORD(res); |
19002 | adr = AREG((Opcode >> 0) & 7); |
19003 | psrc = &DREGu32(0); |
19004 | dst = adr; |
19005 | PRE_IO |
19006 | do |
19007 | { |
19008 | if (res & 1) |
19009 | { |
19010 | READ_LONG_F(adr, *psrc) |
19011 | adr += 4; |
19012 | } |
19013 | psrc++; |
19014 | } while (res >>= 1); |
19015 | AREG((Opcode >> 0) & 7) = adr; |
19016 | POST_IO |
7669591e |
19017 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
19018 | RET(12) |
19019 | } |
19020 | |
19021 | // MOVEMaR |
19022 | OPCODE(0x4CE8) |
19023 | { |
19024 | u32 adr, res; |
19025 | u32 src, dst; |
19026 | |
19027 | u32 *psrc; |
19028 | |
19029 | FETCH_WORD(res); |
19030 | FETCH_SWORD(adr); |
19031 | adr += AREG((Opcode >> 0) & 7); |
19032 | psrc = &DREGu32(0); |
19033 | dst = adr; |
19034 | PRE_IO |
19035 | do |
19036 | { |
19037 | if (res & 1) |
19038 | { |
19039 | READ_LONG_F(adr, *psrc) |
19040 | adr += 4; |
19041 | } |
19042 | psrc++; |
19043 | } while (res >>= 1); |
19044 | POST_IO |
7669591e |
19045 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
19046 | #ifdef USE_CYCLONE_TIMING |
19047 | RET(16) |
19048 | #else |
19049 | RET(28) |
19050 | #endif |
19051 | } |
19052 | |
19053 | // MOVEMaR |
19054 | OPCODE(0x4CF0) |
19055 | { |
19056 | u32 adr, res; |
19057 | u32 src, dst; |
19058 | |
19059 | u32 *psrc; |
19060 | |
19061 | FETCH_WORD(res); |
19062 | adr = AREG((Opcode >> 0) & 7); |
19063 | DECODE_EXT_WORD |
19064 | psrc = &DREGu32(0); |
19065 | dst = adr; |
19066 | PRE_IO |
19067 | do |
19068 | { |
19069 | if (res & 1) |
19070 | { |
19071 | READ_LONG_F(adr, *psrc) |
19072 | adr += 4; |
19073 | } |
19074 | psrc++; |
19075 | } while (res >>= 1); |
19076 | POST_IO |
7669591e |
19077 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
19078 | #ifdef USE_CYCLONE_TIMING |
19079 | RET(18) |
19080 | #else |
19081 | RET(32) |
19082 | #endif |
19083 | } |
19084 | |
19085 | // MOVEMaR |
19086 | OPCODE(0x4CF8) |
19087 | { |
19088 | u32 adr, res; |
19089 | u32 src, dst; |
19090 | |
19091 | u32 *psrc; |
19092 | |
19093 | FETCH_WORD(res); |
19094 | FETCH_SWORD(adr); |
19095 | psrc = &DREGu32(0); |
19096 | dst = adr; |
19097 | PRE_IO |
19098 | do |
19099 | { |
19100 | if (res & 1) |
19101 | { |
19102 | READ_LONG_F(adr, *psrc) |
19103 | adr += 4; |
19104 | } |
19105 | psrc++; |
19106 | } while (res >>= 1); |
19107 | POST_IO |
7669591e |
19108 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
19109 | #ifdef USE_CYCLONE_TIMING |
19110 | RET(16) |
19111 | #else |
19112 | RET(28) |
19113 | #endif |
19114 | } |
19115 | |
19116 | // MOVEMaR |
19117 | OPCODE(0x4CF9) |
19118 | { |
19119 | u32 adr, res; |
19120 | u32 src, dst; |
19121 | |
19122 | u32 *psrc; |
19123 | |
19124 | FETCH_WORD(res); |
19125 | FETCH_LONG(adr); |
19126 | psrc = &DREGu32(0); |
19127 | dst = adr; |
19128 | PRE_IO |
19129 | do |
19130 | { |
19131 | if (res & 1) |
19132 | { |
19133 | READ_LONG_F(adr, *psrc) |
19134 | adr += 4; |
19135 | } |
19136 | psrc++; |
19137 | } while (res >>= 1); |
19138 | POST_IO |
7669591e |
19139 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
19140 | #ifdef USE_CYCLONE_TIMING |
19141 | RET(20) |
19142 | #else |
19143 | RET(36) |
19144 | #endif |
19145 | } |
19146 | |
19147 | // MOVEMaR |
19148 | OPCODE(0x4CFA) |
19149 | { |
19150 | u32 adr, res; |
19151 | u32 src, dst; |
19152 | |
19153 | u32 *psrc; |
19154 | |
19155 | FETCH_WORD(res); |
be26eb23 |
19156 | adr = GET_SWORD + GET_PC; |
70357ce5 |
19157 | PC++; |
19158 | psrc = &DREGu32(0); |
19159 | dst = adr; |
19160 | PRE_IO |
19161 | do |
19162 | { |
19163 | if (res & 1) |
19164 | { |
19165 | READ_LONG_F(adr, *psrc) |
19166 | adr += 4; |
19167 | } |
19168 | psrc++; |
19169 | } while (res >>= 1); |
19170 | POST_IO |
7669591e |
19171 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
19172 | #ifdef USE_CYCLONE_TIMING |
19173 | RET(16) |
19174 | #else |
19175 | RET(28) |
19176 | #endif |
19177 | } |
19178 | |
19179 | // MOVEMaR |
19180 | OPCODE(0x4CFB) |
19181 | { |
19182 | u32 adr, res; |
19183 | u32 src, dst; |
19184 | |
19185 | u32 *psrc; |
19186 | |
19187 | FETCH_WORD(res); |
be26eb23 |
19188 | adr = GET_PC; |
70357ce5 |
19189 | DECODE_EXT_WORD |
19190 | psrc = &DREGu32(0); |
19191 | dst = adr; |
19192 | PRE_IO |
19193 | do |
19194 | { |
19195 | if (res & 1) |
19196 | { |
19197 | READ_LONG_F(adr, *psrc) |
19198 | adr += 4; |
19199 | } |
19200 | psrc++; |
19201 | } while (res >>= 1); |
19202 | POST_IO |
7669591e |
19203 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
19204 | #ifdef USE_CYCLONE_TIMING |
19205 | RET(18) |
19206 | #else |
19207 | RET(32) |
19208 | #endif |
19209 | } |
19210 | |
19211 | // MOVEMaR |
19212 | OPCODE(0x4CDF) |
19213 | { |
19214 | u32 adr, res; |
19215 | u32 src, dst; |
19216 | |
19217 | u32 *psrc; |
19218 | |
19219 | FETCH_WORD(res); |
19220 | adr = AREG(7); |
19221 | psrc = &DREGu32(0); |
19222 | dst = adr; |
19223 | PRE_IO |
19224 | do |
19225 | { |
19226 | if (res & 1) |
19227 | { |
19228 | READ_LONG_F(adr, *psrc) |
19229 | adr += 4; |
19230 | } |
19231 | psrc++; |
19232 | } while (res >>= 1); |
19233 | AREG(7) = adr; |
19234 | POST_IO |
7669591e |
19235 | ctx->io_cycle_counter -= (adr - dst) * 2; |
70357ce5 |
19236 | RET(12) |
19237 | } |
19238 | |
19239 | // TRAP |
19240 | OPCODE(0x4E40) |
19241 | { |
7669591e |
19242 | SET_PC(execute_exception(ctx, M68K_TRAP_BASE_EX + (Opcode & 0xF), GET_PC, GET_SR)); |
3f591822 |
19243 | #ifdef USE_CYCLONE_TIMING |
19244 | RET(0) |
19245 | #else |
70357ce5 |
19246 | RET(4) |
3f591822 |
19247 | #endif |
70357ce5 |
19248 | } |
19249 | |
19250 | // LINK |
19251 | OPCODE(0x4E50) |
19252 | { |
19253 | u32 adr, res; |
19254 | u32 src, dst; |
19255 | |
19256 | res = AREGu32((Opcode >> 0) & 7); |
19257 | PRE_IO |
19258 | PUSH_32_F(res) |
19259 | res = AREG(7); |
19260 | AREG((Opcode >> 0) & 7) = res; |
19261 | FETCH_SWORD(res); |
19262 | AREG(7) += res; |
19263 | POST_IO |
19264 | RET(16) |
19265 | } |
19266 | |
19267 | // LINKA7 |
19268 | OPCODE(0x4E57) |
19269 | { |
19270 | u32 adr, res; |
19271 | u32 src, dst; |
19272 | |
19273 | AREG(7) -= 4; |
19274 | PRE_IO |
19275 | WRITE_LONG_DEC_F(AREG(7), AREG(7)) |
19276 | FETCH_SWORD(res); |
19277 | AREG(7) += res; |
19278 | POST_IO |
19279 | RET(16) |
19280 | } |
19281 | |
19282 | // ULNK |
19283 | OPCODE(0x4E58) |
19284 | { |
19285 | u32 adr, res; |
19286 | u32 src, dst; |
19287 | |
19288 | src = AREGu32((Opcode >> 0) & 7); |
19289 | AREG(7) = src + 4; |
19290 | PRE_IO |
19291 | READ_LONG_F(src, res) |
19292 | AREG((Opcode >> 0) & 7) = res; |
19293 | POST_IO |
19294 | RET(12) |
19295 | } |
19296 | |
19297 | // ULNKA7 |
19298 | OPCODE(0x4E5F) |
19299 | { |
19300 | u32 adr, res; |
19301 | u32 src, dst; |
19302 | |
19303 | PRE_IO |
19304 | READ_LONG_F(AREG(7), AREG(7)) |
19305 | POST_IO |
19306 | RET(12) |
19307 | } |
19308 | |
19309 | // MOVEAUSP |
19310 | OPCODE(0x4E60) |
19311 | { |
19312 | u32 adr, res; |
19313 | u32 src, dst; |
19314 | |
19315 | if (!flag_S) |
19316 | { |
7669591e |
19317 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
19318 | #ifdef USE_CYCLONE_TIMING |
19319 | RET(0) |
19320 | #else |
70357ce5 |
19321 | RET(4) |
3f591822 |
19322 | #endif |
70357ce5 |
19323 | } |
19324 | res = AREGu32((Opcode >> 0) & 7); |
19325 | ASP = res; |
19326 | RET(4) |
19327 | } |
19328 | |
19329 | // MOVEUSPA |
19330 | OPCODE(0x4E68) |
19331 | { |
19332 | u32 adr, res; |
19333 | u32 src, dst; |
19334 | |
19335 | if (!flag_S) |
19336 | { |
7669591e |
19337 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
19338 | #ifdef USE_CYCLONE_TIMING |
19339 | RET(0) |
19340 | #else |
70357ce5 |
19341 | RET(4) |
3f591822 |
19342 | #endif |
70357ce5 |
19343 | } |
19344 | res = ASP; |
19345 | AREG((Opcode >> 0) & 7) = res; |
19346 | RET(4) |
19347 | } |
19348 | |
19349 | // RESET |
19350 | OPCODE(0x4E70) |
19351 | { |
19352 | u32 adr, res; |
19353 | u32 src, dst; |
19354 | |
19355 | if (!flag_S) |
19356 | { |
7669591e |
19357 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
19358 | #ifdef USE_CYCLONE_TIMING |
19359 | RET(0) |
19360 | #else |
70357ce5 |
19361 | RET(4) |
3f591822 |
19362 | #endif |
70357ce5 |
19363 | } |
19364 | PRE_IO |
7669591e |
19365 | if (ctx->reset_handler) ctx->reset_handler(); |
70357ce5 |
19366 | // CPU->Reset_CallBack(); |
19367 | POST_IO |
19368 | RET(132) |
19369 | } |
19370 | |
19371 | // NOP |
19372 | OPCODE(0x4E71) |
19373 | { |
19374 | RET(4) |
19375 | } |
19376 | |
19377 | // STOP |
19378 | OPCODE(0x4E72) |
19379 | { |
19380 | u32 adr, res; |
19381 | u32 src, dst; |
19382 | |
19383 | if (!flag_S) |
19384 | { |
7669591e |
19385 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
19386 | #ifdef USE_CYCLONE_TIMING |
19387 | RET(0) |
19388 | #else |
70357ce5 |
19389 | RET(4) |
3f591822 |
19390 | #endif |
70357ce5 |
19391 | } |
19392 | FETCH_WORD(res); |
19393 | res &= M68K_SR_MASK; |
19394 | SET_SR(res) |
19395 | if (!flag_S) |
19396 | { |
19397 | res = AREG(7); |
19398 | AREG(7) = ASP; |
19399 | ASP = res; |
19400 | } |
7669591e |
19401 | ctx->execinfo |= FM68K_HALTED; |
fcf94fcc |
19402 | RET0() |
70357ce5 |
19403 | } |
19404 | |
19405 | // RTE |
19406 | OPCODE(0x4E73) |
19407 | { |
19408 | u32 adr, res; |
19409 | u32 src, dst; |
19410 | |
19411 | if (!flag_S) |
19412 | { |
7669591e |
19413 | SET_PC(execute_exception(ctx, M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR)); |
3f591822 |
19414 | #ifdef USE_CYCLONE_TIMING |
19415 | RET(0) |
19416 | #else |
70357ce5 |
19417 | RET(4) |
3f591822 |
19418 | #endif |
70357ce5 |
19419 | } |
19420 | PRE_IO |
19421 | POP_16_F(res) |
19422 | SET_SR(res) |
19423 | POP_32_F(res) |
19424 | SET_PC(res) |
19425 | if (!flag_S) |
19426 | { |
19427 | res = AREG(7); |
19428 | AREG(7) = ASP; |
19429 | ASP = res; |
19430 | } |
5e04c2f3 |
19431 | CHECK_BRANCH_EXCEPTION(res) |
70357ce5 |
19432 | POST_IO |
7669591e |
19433 | ctx->execinfo &= ~(FM68K_EMULATE_GROUP_0|FM68K_EMULATE_TRACE|FM68K_DO_TRACE); |
70357ce5 |
19434 | CHECK_INT_TO_JUMP(20) |
19435 | RET(20) |
19436 | } |
19437 | |
19438 | // RTS |
19439 | OPCODE(0x4E75) |
19440 | { |
19441 | u32 adr, res; |
19442 | u32 src, dst; |
19443 | |
19444 | PRE_IO |
19445 | POP_32_F(res) |
19446 | SET_PC(res) |
19447 | CHECK_BRANCH_EXCEPTION(res) |
19448 | POST_IO |
19449 | RET(16) |
19450 | } |
19451 | |
19452 | // TRAPV |
19453 | OPCODE(0x4E76) |
19454 | { |
3f591822 |
19455 | if (flag_V & 0x80) { |
7669591e |
19456 | SET_PC(execute_exception(ctx, M68K_TRAPV_EX, GET_PC, GET_SR)); |
3f591822 |
19457 | #ifdef USE_CYCLONE_TIMING |
19458 | RET(0) |
19459 | #endif |
19460 | } |
70357ce5 |
19461 | RET(4) |
19462 | } |
19463 | |
19464 | // RTR |
19465 | OPCODE(0x4E77) |
19466 | { |
19467 | u32 adr, res; |
19468 | u32 src, dst; |
19469 | |
19470 | PRE_IO |
19471 | POP_16_F(res) |
19472 | SET_CCR(res) |
19473 | POP_32_F(res) |
19474 | SET_PC(res) |
19475 | CHECK_BRANCH_EXCEPTION(res) |
19476 | POST_IO |
19477 | RET(20) |
19478 | } |
19479 | |
19480 | // JSR |
19481 | OPCODE(0x4E90) |
19482 | { |
19483 | u32 adr, res; |
19484 | u32 src, dst; |
19485 | |
19486 | adr = AREG((Opcode >> 0) & 7); |
19487 | { |
19488 | u32 oldPC; |
19489 | |
be26eb23 |
19490 | oldPC = GET_PC; |
70357ce5 |
19491 | PRE_IO |
19492 | PUSH_32_F(oldPC) |
19493 | } |
19494 | SET_PC(adr) |
19495 | CHECK_BRANCH_EXCEPTION(adr) |
19496 | POST_IO |
19497 | RET(16) |
19498 | } |
19499 | |
19500 | // JSR |
19501 | OPCODE(0x4EA8) |
19502 | { |
19503 | u32 adr, res; |
19504 | u32 src, dst; |
19505 | |
19506 | FETCH_SWORD(adr); |
19507 | adr += AREG((Opcode >> 0) & 7); |
19508 | { |
19509 | u32 oldPC; |
19510 | |
be26eb23 |
19511 | oldPC = GET_PC; |
70357ce5 |
19512 | PRE_IO |
19513 | PUSH_32_F(oldPC) |
19514 | } |
19515 | SET_PC(adr) |
19516 | CHECK_BRANCH_EXCEPTION(adr) |
19517 | POST_IO |
19518 | RET(18) |
19519 | } |
19520 | |
19521 | // JSR |
19522 | OPCODE(0x4EB0) |
19523 | { |
19524 | u32 adr, res; |
19525 | u32 src, dst; |
19526 | |
19527 | adr = AREG((Opcode >> 0) & 7); |
19528 | DECODE_EXT_WORD |
19529 | { |
19530 | u32 oldPC; |
19531 | |
be26eb23 |
19532 | oldPC = GET_PC; |
70357ce5 |
19533 | PRE_IO |
19534 | PUSH_32_F(oldPC) |
19535 | } |
19536 | SET_PC(adr) |
19537 | CHECK_BRANCH_EXCEPTION(adr) |
19538 | POST_IO |
19539 | RET(22) |
19540 | } |
19541 | |
19542 | // JSR |
19543 | OPCODE(0x4EB8) |
19544 | { |
19545 | u32 adr, res; |
19546 | u32 src, dst; |
19547 | |
19548 | FETCH_SWORD(adr); |
19549 | { |
19550 | u32 oldPC; |
19551 | |
be26eb23 |
19552 | oldPC = GET_PC; |
70357ce5 |
19553 | PRE_IO |
19554 | PUSH_32_F(oldPC) |
19555 | } |
19556 | SET_PC(adr) |
19557 | CHECK_BRANCH_EXCEPTION(adr) |
19558 | POST_IO |
19559 | RET(18) |
19560 | } |
19561 | |
19562 | // JSR |
19563 | OPCODE(0x4EB9) |
19564 | { |
19565 | u32 adr, res; |
19566 | u32 src, dst; |
19567 | |
19568 | FETCH_LONG(adr); |
19569 | { |
19570 | u32 oldPC; |
19571 | |
be26eb23 |
19572 | oldPC = GET_PC; |
70357ce5 |
19573 | PRE_IO |
19574 | PUSH_32_F(oldPC) |
19575 | } |
19576 | SET_PC(adr) |
19577 | CHECK_BRANCH_EXCEPTION(adr) |
19578 | POST_IO |
19579 | RET(20) |
19580 | } |
19581 | |
19582 | // JSR |
19583 | OPCODE(0x4EBA) |
19584 | { |
19585 | u32 adr, res; |
19586 | u32 src, dst; |
19587 | |
be26eb23 |
19588 | adr = GET_SWORD + GET_PC; |
70357ce5 |
19589 | PC++; |
19590 | { |
19591 | u32 oldPC; |
19592 | |
be26eb23 |
19593 | oldPC = GET_PC; |
70357ce5 |
19594 | PRE_IO |
19595 | PUSH_32_F(oldPC) |
19596 | } |
19597 | SET_PC(adr) |
19598 | CHECK_BRANCH_EXCEPTION(adr) |
19599 | POST_IO |
19600 | RET(18) |
19601 | } |
19602 | |
19603 | // JSR |
19604 | OPCODE(0x4EBB) |
19605 | { |
19606 | u32 adr, res; |
19607 | u32 src, dst; |
19608 | |
be26eb23 |
19609 | adr = GET_PC; |
70357ce5 |
19610 | DECODE_EXT_WORD |
19611 | { |
19612 | u32 oldPC; |
19613 | |
be26eb23 |
19614 | oldPC = GET_PC; |
70357ce5 |
19615 | PRE_IO |
19616 | PUSH_32_F(oldPC) |
19617 | } |
19618 | SET_PC(adr) |
19619 | CHECK_BRANCH_EXCEPTION(adr) |
19620 | POST_IO |
19621 | RET(22) |
19622 | } |
19623 | |
19624 | // JMP |
19625 | OPCODE(0x4ED0) |
19626 | { |
19627 | u32 adr, res; |
19628 | u32 src, dst; |
19629 | |
19630 | adr = AREG((Opcode >> 0) & 7); |
19631 | SET_PC(adr) |
19632 | CHECK_BRANCH_EXCEPTION(adr) |
19633 | RET(8) |
19634 | } |
19635 | |
19636 | // JMP |
19637 | OPCODE(0x4EE8) |
19638 | { |
19639 | u32 adr, res; |
19640 | u32 src, dst; |
19641 | |
19642 | FETCH_SWORD(adr); |
19643 | adr += AREG((Opcode >> 0) & 7); |
19644 | SET_PC(adr) |
19645 | CHECK_BRANCH_EXCEPTION(adr) |
19646 | RET(10) |
19647 | } |
19648 | |
19649 | // JMP |
19650 | OPCODE(0x4EF0) |
19651 | { |
19652 | u32 adr, res; |
19653 | u32 src, dst; |
19654 | |
19655 | adr = AREG((Opcode >> 0) & 7); |
19656 | DECODE_EXT_WORD |
19657 | SET_PC(adr) |
19658 | CHECK_BRANCH_EXCEPTION(adr) |
19659 | RET(14) |
19660 | } |
19661 | |
19662 | // JMP |
19663 | OPCODE(0x4EF8) |
19664 | { |
19665 | u32 adr, res; |
19666 | u32 src, dst; |
19667 | |
19668 | FETCH_SWORD(adr); |
19669 | SET_PC(adr) |
19670 | CHECK_BRANCH_EXCEPTION(adr) |
19671 | RET(10) |
19672 | } |
19673 | |
19674 | // JMP |
19675 | OPCODE(0x4EF9) |
19676 | { |
19677 | u32 adr, res; |
19678 | u32 src, dst; |
19679 | |
19680 | FETCH_LONG(adr); |
19681 | SET_PC(adr) |
19682 | CHECK_BRANCH_EXCEPTION(adr) |
19683 | RET(12) |
19684 | } |
19685 | |
19686 | // JMP |
19687 | OPCODE(0x4EFA) |
19688 | { |
19689 | u32 adr, res; |
19690 | u32 src, dst; |
19691 | |
be26eb23 |
19692 | adr = GET_SWORD + GET_PC; |
70357ce5 |
19693 | PC++; |
19694 | SET_PC(adr) |
19695 | CHECK_BRANCH_EXCEPTION(adr) |
19696 | RET(10) |
19697 | } |
19698 | |
19699 | // JMP |
19700 | OPCODE(0x4EFB) |
19701 | { |
19702 | u32 adr, res; |
19703 | u32 src, dst; |
19704 | |
be26eb23 |
19705 | adr = GET_PC; |
70357ce5 |
19706 | DECODE_EXT_WORD |
19707 | SET_PC(adr) |
19708 | CHECK_BRANCH_EXCEPTION(adr) |
19709 | RET(14) |
19710 | } |
19711 | |
19712 | // CHK |
19713 | OPCODE(0x4180) |
19714 | { |
5c5d89ad |
19715 | s32 src, res; |
70357ce5 |
19716 | |
5c5d89ad |
19717 | src = DREGs16((Opcode >> 0) & 7); |
19718 | res = DREGs16((Opcode >> 9) & 7); |
19719 | if ((res < 0) || (res > src)) |
70357ce5 |
19720 | { |
19721 | flag_N = res >> 8; |
7669591e |
19722 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19723 | RET(4) |
70357ce5 |
19724 | } |
19725 | RET(10) |
19726 | } |
19727 | |
19728 | // CHK |
19729 | OPCODE(0x4190) |
19730 | { |
5c5d89ad |
19731 | s32 src, res; |
19732 | u32 adr; |
70357ce5 |
19733 | |
19734 | adr = AREG((Opcode >> 0) & 7); |
19735 | PRE_IO |
5c5d89ad |
19736 | READSX_WORD_F(adr, src) |
19737 | res = DREGs16((Opcode >> 9) & 7); |
19738 | if ((res < 0) || (res > src)) |
70357ce5 |
19739 | { |
19740 | flag_N = res >> 8; |
7669591e |
19741 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19742 | RET(8) |
70357ce5 |
19743 | } |
19744 | POST_IO |
19745 | RET(14) |
19746 | } |
19747 | |
19748 | // CHK |
19749 | OPCODE(0x4198) |
19750 | { |
5c5d89ad |
19751 | s32 src, res; |
19752 | u32 adr; |
70357ce5 |
19753 | |
19754 | adr = AREG((Opcode >> 0) & 7); |
19755 | AREG((Opcode >> 0) & 7) += 2; |
19756 | PRE_IO |
5c5d89ad |
19757 | READSX_WORD_F(adr, src) |
19758 | res = DREGs16((Opcode >> 9) & 7); |
19759 | if ((res < 0) || (res > src)) |
70357ce5 |
19760 | { |
19761 | flag_N = res >> 8; |
7669591e |
19762 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19763 | RET(8) |
70357ce5 |
19764 | } |
19765 | POST_IO |
19766 | RET(14) |
19767 | } |
19768 | |
19769 | // CHK |
19770 | OPCODE(0x41A0) |
19771 | { |
5c5d89ad |
19772 | s32 src, res; |
19773 | u32 adr; |
70357ce5 |
19774 | |
19775 | adr = AREG((Opcode >> 0) & 7) - 2; |
19776 | AREG((Opcode >> 0) & 7) = adr; |
19777 | PRE_IO |
5c5d89ad |
19778 | READSX_WORD_F(adr, src) |
19779 | res = DREGs16((Opcode >> 9) & 7); |
19780 | if ((res < 0) || (res > src)) |
70357ce5 |
19781 | { |
19782 | flag_N = res >> 8; |
7669591e |
19783 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19784 | RET(10) |
70357ce5 |
19785 | } |
19786 | POST_IO |
19787 | RET(16) |
19788 | } |
19789 | |
19790 | // CHK |
19791 | OPCODE(0x41A8) |
19792 | { |
5c5d89ad |
19793 | s32 src, res; |
19794 | u32 adr; |
70357ce5 |
19795 | |
19796 | FETCH_SWORD(adr); |
19797 | adr += AREG((Opcode >> 0) & 7); |
19798 | PRE_IO |
5c5d89ad |
19799 | READSX_WORD_F(adr, src) |
19800 | res = DREGs16((Opcode >> 9) & 7); |
19801 | if ((res < 0) || (res > src)) |
70357ce5 |
19802 | { |
19803 | flag_N = res >> 8; |
7669591e |
19804 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19805 | RET(12) |
70357ce5 |
19806 | } |
19807 | POST_IO |
19808 | RET(18) |
19809 | } |
19810 | |
19811 | // CHK |
19812 | OPCODE(0x41B0) |
19813 | { |
5c5d89ad |
19814 | s32 src, res; |
19815 | u32 adr; |
70357ce5 |
19816 | |
19817 | adr = AREG((Opcode >> 0) & 7); |
19818 | DECODE_EXT_WORD |
19819 | PRE_IO |
5c5d89ad |
19820 | READSX_WORD_F(adr, src) |
19821 | res = DREGs16((Opcode >> 9) & 7); |
19822 | if ((res < 0) || (res > src)) |
70357ce5 |
19823 | { |
19824 | flag_N = res >> 8; |
7669591e |
19825 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19826 | RET(14) |
70357ce5 |
19827 | } |
19828 | POST_IO |
19829 | RET(20) |
19830 | } |
19831 | |
19832 | // CHK |
19833 | OPCODE(0x41B8) |
19834 | { |
5c5d89ad |
19835 | s32 src, res; |
19836 | u32 adr; |
70357ce5 |
19837 | |
19838 | FETCH_SWORD(adr); |
19839 | PRE_IO |
5c5d89ad |
19840 | READSX_WORD_F(adr, src) |
19841 | res = DREGs16((Opcode >> 9) & 7); |
19842 | if ((res < 0) || (res > src)) |
70357ce5 |
19843 | { |
19844 | flag_N = res >> 8; |
7669591e |
19845 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19846 | RET(12) |
70357ce5 |
19847 | } |
19848 | POST_IO |
19849 | RET(18) |
19850 | } |
19851 | |
19852 | // CHK |
19853 | OPCODE(0x41B9) |
19854 | { |
5c5d89ad |
19855 | s32 src, res; |
19856 | u32 adr; |
70357ce5 |
19857 | |
19858 | FETCH_LONG(adr); |
19859 | PRE_IO |
5c5d89ad |
19860 | READSX_WORD_F(adr, src) |
19861 | res = DREGs16((Opcode >> 9) & 7); |
19862 | if ((res < 0) || (res > src)) |
70357ce5 |
19863 | { |
19864 | flag_N = res >> 8; |
7669591e |
19865 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19866 | RET(16) |
70357ce5 |
19867 | } |
19868 | POST_IO |
19869 | RET(22) |
19870 | } |
19871 | |
19872 | // CHK |
19873 | OPCODE(0x41BA) |
19874 | { |
5c5d89ad |
19875 | s32 src, res; |
19876 | u32 adr; |
70357ce5 |
19877 | |
be26eb23 |
19878 | adr = GET_SWORD + GET_PC; |
70357ce5 |
19879 | PC++; |
19880 | PRE_IO |
5c5d89ad |
19881 | READSX_WORD_F(adr, src) |
19882 | res = DREGs16((Opcode >> 9) & 7); |
19883 | if ((res < 0) || (res > src)) |
70357ce5 |
19884 | { |
19885 | flag_N = res >> 8; |
7669591e |
19886 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19887 | RET(12) |
70357ce5 |
19888 | } |
19889 | POST_IO |
19890 | RET(18) |
19891 | } |
19892 | |
19893 | // CHK |
19894 | OPCODE(0x41BB) |
19895 | { |
5c5d89ad |
19896 | s32 src, res; |
19897 | u32 adr; |
70357ce5 |
19898 | |
be26eb23 |
19899 | adr = GET_PC; |
70357ce5 |
19900 | DECODE_EXT_WORD |
19901 | PRE_IO |
5c5d89ad |
19902 | READSX_WORD_F(adr, src) |
19903 | res = DREGs16((Opcode >> 9) & 7); |
19904 | if ((res < 0) || (res > src)) |
70357ce5 |
19905 | { |
19906 | flag_N = res >> 8; |
7669591e |
19907 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19908 | RET(14) |
70357ce5 |
19909 | } |
19910 | POST_IO |
19911 | RET(20) |
19912 | } |
19913 | |
19914 | // CHK |
19915 | OPCODE(0x41BC) |
19916 | { |
5c5d89ad |
19917 | s32 src, res; |
19918 | u32 adr; |
70357ce5 |
19919 | |
5c5d89ad |
19920 | FETCH_SWORD(src); |
19921 | res = DREGs16((Opcode >> 9) & 7); |
19922 | if ((res < 0) || (res > src)) |
70357ce5 |
19923 | { |
19924 | flag_N = res >> 8; |
7669591e |
19925 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19926 | RET(8) |
70357ce5 |
19927 | } |
19928 | POST_IO |
19929 | RET(14) |
19930 | } |
19931 | |
19932 | // CHK |
19933 | OPCODE(0x419F) |
19934 | { |
5c5d89ad |
19935 | s32 src, res; |
19936 | u32 adr; |
70357ce5 |
19937 | |
19938 | adr = AREG(7); |
19939 | AREG(7) += 2; |
19940 | PRE_IO |
5c5d89ad |
19941 | READSX_WORD_F(adr, src) |
19942 | res = DREGs16((Opcode >> 9) & 7); |
19943 | if ((res < 0) || (res > src)) |
70357ce5 |
19944 | { |
19945 | flag_N = res >> 8; |
7669591e |
19946 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19947 | RET(8) |
70357ce5 |
19948 | } |
19949 | POST_IO |
19950 | RET(14) |
19951 | } |
19952 | |
19953 | // CHK |
19954 | OPCODE(0x41A7) |
19955 | { |
5c5d89ad |
19956 | s32 src, res; |
19957 | u32 adr; |
70357ce5 |
19958 | |
19959 | adr = AREG(7) - 2; |
19960 | AREG(7) = adr; |
19961 | PRE_IO |
5c5d89ad |
19962 | READSX_WORD_F(adr, src) |
19963 | res = DREGs16((Opcode >> 9) & 7); |
19964 | if ((res < 0) || (res > src)) |
70357ce5 |
19965 | { |
19966 | flag_N = res >> 8; |
7669591e |
19967 | SET_PC(execute_exception(ctx, M68K_CHK_EX, GET_PC, GET_SR)); |
3f591822 |
19968 | RET(10) |
70357ce5 |
19969 | } |
19970 | POST_IO |
19971 | RET(16) |
19972 | } |
19973 | |
19974 | // LEA |
19975 | OPCODE(0x41D0) |
19976 | { |
19977 | u32 adr, res; |
19978 | u32 src, dst; |
19979 | |
19980 | adr = AREG((Opcode >> 0) & 7); |
19981 | res = adr; |
19982 | AREG((Opcode >> 9) & 7) = res; |
19983 | RET(4) |
19984 | } |
19985 | |
19986 | // LEA |
19987 | OPCODE(0x41E8) |
19988 | { |
19989 | u32 adr, res; |
19990 | u32 src, dst; |
19991 | |
19992 | FETCH_SWORD(adr); |
19993 | adr += AREG((Opcode >> 0) & 7); |
19994 | res = adr; |
19995 | AREG((Opcode >> 9) & 7) = res; |
19996 | RET(8) |
19997 | } |
19998 | |
19999 | // LEA |
20000 | OPCODE(0x41F0) |
20001 | { |
20002 | u32 adr, res; |
20003 | u32 src, dst; |
20004 | |
20005 | adr = AREG((Opcode >> 0) & 7); |
20006 | DECODE_EXT_WORD |
20007 | res = adr; |
20008 | AREG((Opcode >> 9) & 7) = res; |
20009 | RET(12) |
20010 | } |
20011 | |
20012 | // LEA |
20013 | OPCODE(0x41F8) |
20014 | { |
20015 | u32 adr, res; |
20016 | u32 src, dst; |
20017 | |
20018 | FETCH_SWORD(adr); |
20019 | res = adr; |
20020 | AREG((Opcode >> 9) & 7) = res; |
20021 | RET(8) |
20022 | } |
20023 | |
20024 | // LEA |
20025 | OPCODE(0x41F9) |
20026 | { |
20027 | u32 adr, res; |
20028 | u32 src, dst; |
20029 | |
20030 | FETCH_LONG(adr); |
20031 | res = adr; |
20032 | AREG((Opcode >> 9) & 7) = res; |
20033 | RET(12) |
20034 | } |
20035 | |
20036 | // LEA |
20037 | OPCODE(0x41FA) |
20038 | { |
20039 | u32 adr, res; |
20040 | u32 src, dst; |
20041 | |
be26eb23 |
20042 | adr = GET_SWORD + GET_PC; |
70357ce5 |
20043 | PC++; |
20044 | res = adr; |
20045 | AREG((Opcode >> 9) & 7) = res; |
20046 | RET(8) |
20047 | } |
20048 | |
20049 | // LEA |
20050 | OPCODE(0x41FB) |
20051 | { |
20052 | u32 adr, res; |
20053 | u32 src, dst; |
20054 | |
be26eb23 |
20055 | adr = GET_PC; |
70357ce5 |
20056 | DECODE_EXT_WORD |
20057 | res = adr; |
20058 | AREG((Opcode >> 9) & 7) = res; |
20059 | RET(12) |
20060 | } |
20061 | |
20062 | // STCC |
20063 | OPCODE(0x50C0) |
20064 | { |
20065 | u32 adr, res; |
20066 | u32 src, dst; |
20067 | |
20068 | res = 0xFF; |
20069 | DREGu8((Opcode >> 0) & 7) = res; |
20070 | RET(6) |
20071 | } |
20072 | |
20073 | // STCC |
20074 | OPCODE(0x51C0) |
20075 | { |
20076 | u32 adr, res; |
20077 | u32 src, dst; |
20078 | |
20079 | res = 0; |
20080 | DREGu8((Opcode >> 0) & 7) = res; |
20081 | RET(4) |
20082 | } |
20083 | |
20084 | // STCC |
20085 | OPCODE(0x52C0) |
20086 | { |
20087 | u32 adr, res; |
20088 | u32 src, dst; |
20089 | |
20090 | if (flag_NotZ && (!(flag_C & 0x100))) |
20091 | { |
20092 | res = 0xFF; |
20093 | DREGu8((Opcode >> 0) & 7) = res; |
20094 | RET(6) |
20095 | } |
20096 | res = 0; |
20097 | DREGu8((Opcode >> 0) & 7) = res; |
20098 | RET(4) |
20099 | } |
20100 | |
20101 | // STCC |
20102 | OPCODE(0x53C0) |
20103 | { |
20104 | u32 adr, res; |
20105 | u32 src, dst; |
20106 | |
20107 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20108 | { |
20109 | res = 0xFF; |
20110 | DREGu8((Opcode >> 0) & 7) = res; |
20111 | RET(6) |
20112 | } |
20113 | res = 0; |
20114 | DREGu8((Opcode >> 0) & 7) = res; |
20115 | RET(4) |
20116 | } |
20117 | |
20118 | // STCC |
20119 | OPCODE(0x54C0) |
20120 | { |
20121 | u32 adr, res; |
20122 | u32 src, dst; |
20123 | |
20124 | if (!(flag_C & 0x100)) |
20125 | { |
20126 | res = 0xFF; |
20127 | DREGu8((Opcode >> 0) & 7) = res; |
20128 | RET(6) |
20129 | } |
20130 | res = 0; |
20131 | DREGu8((Opcode >> 0) & 7) = res; |
20132 | RET(4) |
20133 | } |
20134 | |
20135 | // STCC |
20136 | OPCODE(0x55C0) |
20137 | { |
20138 | u32 adr, res; |
20139 | u32 src, dst; |
20140 | |
20141 | if (flag_C & 0x100) |
20142 | { |
20143 | res = 0xFF; |
20144 | DREGu8((Opcode >> 0) & 7) = res; |
20145 | RET(6) |
20146 | } |
20147 | res = 0; |
20148 | DREGu8((Opcode >> 0) & 7) = res; |
20149 | RET(4) |
20150 | } |
20151 | |
20152 | // STCC |
20153 | OPCODE(0x56C0) |
20154 | { |
20155 | u32 adr, res; |
20156 | u32 src, dst; |
20157 | |
20158 | if (flag_NotZ) |
20159 | { |
20160 | res = 0xFF; |
20161 | DREGu8((Opcode >> 0) & 7) = res; |
20162 | RET(6) |
20163 | } |
20164 | res = 0; |
20165 | DREGu8((Opcode >> 0) & 7) = res; |
20166 | RET(4) |
20167 | } |
20168 | |
20169 | // STCC |
20170 | OPCODE(0x57C0) |
20171 | { |
20172 | u32 adr, res; |
20173 | u32 src, dst; |
20174 | |
20175 | if (!flag_NotZ) |
20176 | { |
20177 | res = 0xFF; |
20178 | DREGu8((Opcode >> 0) & 7) = res; |
20179 | RET(6) |
20180 | } |
20181 | res = 0; |
20182 | DREGu8((Opcode >> 0) & 7) = res; |
20183 | RET(4) |
20184 | } |
20185 | |
20186 | // STCC |
20187 | OPCODE(0x58C0) |
20188 | { |
20189 | u32 adr, res; |
20190 | u32 src, dst; |
20191 | |
20192 | if (!(flag_V & 0x80)) |
20193 | { |
20194 | res = 0xFF; |
20195 | DREGu8((Opcode >> 0) & 7) = res; |
20196 | RET(6) |
20197 | } |
20198 | res = 0; |
20199 | DREGu8((Opcode >> 0) & 7) = res; |
20200 | RET(4) |
20201 | } |
20202 | |
20203 | // STCC |
20204 | OPCODE(0x59C0) |
20205 | { |
20206 | u32 adr, res; |
20207 | u32 src, dst; |
20208 | |
20209 | if (flag_V & 0x80) |
20210 | { |
20211 | res = 0xFF; |
20212 | DREGu8((Opcode >> 0) & 7) = res; |
20213 | RET(6) |
20214 | } |
20215 | res = 0; |
20216 | DREGu8((Opcode >> 0) & 7) = res; |
20217 | RET(4) |
20218 | } |
20219 | |
20220 | // STCC |
20221 | OPCODE(0x5AC0) |
20222 | { |
20223 | u32 adr, res; |
20224 | u32 src, dst; |
20225 | |
20226 | if (!(flag_N & 0x80)) |
20227 | { |
20228 | res = 0xFF; |
20229 | DREGu8((Opcode >> 0) & 7) = res; |
20230 | RET(6) |
20231 | } |
20232 | res = 0; |
20233 | DREGu8((Opcode >> 0) & 7) = res; |
20234 | RET(4) |
20235 | } |
20236 | |
20237 | // STCC |
20238 | OPCODE(0x5BC0) |
20239 | { |
20240 | u32 adr, res; |
20241 | u32 src, dst; |
20242 | |
20243 | if (flag_N & 0x80) |
20244 | { |
20245 | res = 0xFF; |
20246 | DREGu8((Opcode >> 0) & 7) = res; |
20247 | RET(6) |
20248 | } |
20249 | res = 0; |
20250 | DREGu8((Opcode >> 0) & 7) = res; |
20251 | RET(4) |
20252 | } |
20253 | |
20254 | // STCC |
20255 | OPCODE(0x5CC0) |
20256 | { |
20257 | u32 adr, res; |
20258 | u32 src, dst; |
20259 | |
20260 | if (!((flag_N ^ flag_V) & 0x80)) |
20261 | { |
20262 | res = 0xFF; |
20263 | DREGu8((Opcode >> 0) & 7) = res; |
20264 | RET(6) |
20265 | } |
20266 | res = 0; |
20267 | DREGu8((Opcode >> 0) & 7) = res; |
20268 | RET(4) |
20269 | } |
20270 | |
20271 | // STCC |
20272 | OPCODE(0x5DC0) |
20273 | { |
20274 | u32 adr, res; |
20275 | u32 src, dst; |
20276 | |
20277 | if ((flag_N ^ flag_V) & 0x80) |
20278 | { |
20279 | res = 0xFF; |
20280 | DREGu8((Opcode >> 0) & 7) = res; |
20281 | RET(6) |
20282 | } |
20283 | res = 0; |
20284 | DREGu8((Opcode >> 0) & 7) = res; |
20285 | RET(4) |
20286 | } |
20287 | |
20288 | // STCC |
20289 | OPCODE(0x5EC0) |
20290 | { |
20291 | u32 adr, res; |
20292 | u32 src, dst; |
20293 | |
20294 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20295 | { |
20296 | res = 0xFF; |
20297 | DREGu8((Opcode >> 0) & 7) = res; |
20298 | RET(6) |
20299 | } |
20300 | res = 0; |
20301 | DREGu8((Opcode >> 0) & 7) = res; |
20302 | RET(4) |
20303 | } |
20304 | |
20305 | // STCC |
20306 | OPCODE(0x5FC0) |
20307 | { |
20308 | u32 adr, res; |
20309 | u32 src, dst; |
20310 | |
20311 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20312 | { |
20313 | res = 0xFF; |
20314 | DREGu8((Opcode >> 0) & 7) = res; |
20315 | RET(6) |
20316 | } |
20317 | res = 0; |
20318 | DREGu8((Opcode >> 0) & 7) = res; |
20319 | RET(4) |
20320 | } |
20321 | |
20322 | // STCC |
20323 | OPCODE(0x50D0) |
20324 | { |
20325 | u32 adr, res; |
20326 | u32 src, dst; |
20327 | |
20328 | adr = AREG((Opcode >> 0) & 7); |
20329 | res = 0xFF; |
20330 | PRE_IO |
20331 | WRITE_BYTE_F(adr, res) |
20332 | POST_IO |
20333 | RET(12) |
20334 | } |
20335 | |
20336 | // STCC |
20337 | OPCODE(0x51D0) |
20338 | { |
20339 | u32 adr, res; |
20340 | u32 src, dst; |
20341 | |
20342 | adr = AREG((Opcode >> 0) & 7); |
20343 | res = 0; |
20344 | PRE_IO |
20345 | WRITE_BYTE_F(adr, res) |
20346 | POST_IO |
20347 | RET(12) |
20348 | } |
20349 | |
20350 | // STCC |
20351 | OPCODE(0x52D0) |
20352 | { |
20353 | u32 adr, res; |
20354 | u32 src, dst; |
20355 | |
20356 | adr = AREG((Opcode >> 0) & 7); |
20357 | if (flag_NotZ && (!(flag_C & 0x100))) |
20358 | { |
20359 | res = 0xFF; |
20360 | PRE_IO |
20361 | WRITE_BYTE_F(adr, res) |
20362 | POST_IO |
20363 | RET(12) |
20364 | } |
20365 | res = 0; |
20366 | PRE_IO |
20367 | WRITE_BYTE_F(adr, res) |
20368 | POST_IO |
20369 | RET(12) |
20370 | } |
20371 | |
20372 | // STCC |
20373 | OPCODE(0x53D0) |
20374 | { |
20375 | u32 adr, res; |
20376 | u32 src, dst; |
20377 | |
20378 | adr = AREG((Opcode >> 0) & 7); |
20379 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20380 | { |
20381 | res = 0xFF; |
20382 | PRE_IO |
20383 | WRITE_BYTE_F(adr, res) |
20384 | POST_IO |
20385 | RET(12) |
20386 | } |
20387 | res = 0; |
20388 | PRE_IO |
20389 | WRITE_BYTE_F(adr, res) |
20390 | POST_IO |
20391 | RET(12) |
20392 | } |
20393 | |
20394 | // STCC |
20395 | OPCODE(0x54D0) |
20396 | { |
20397 | u32 adr, res; |
20398 | u32 src, dst; |
20399 | |
20400 | adr = AREG((Opcode >> 0) & 7); |
20401 | if (!(flag_C & 0x100)) |
20402 | { |
20403 | res = 0xFF; |
20404 | PRE_IO |
20405 | WRITE_BYTE_F(adr, res) |
20406 | POST_IO |
20407 | RET(12) |
20408 | } |
20409 | res = 0; |
20410 | PRE_IO |
20411 | WRITE_BYTE_F(adr, res) |
20412 | POST_IO |
20413 | RET(12) |
20414 | } |
20415 | |
20416 | // STCC |
20417 | OPCODE(0x55D0) |
20418 | { |
20419 | u32 adr, res; |
20420 | u32 src, dst; |
20421 | |
20422 | adr = AREG((Opcode >> 0) & 7); |
20423 | if (flag_C & 0x100) |
20424 | { |
20425 | res = 0xFF; |
20426 | PRE_IO |
20427 | WRITE_BYTE_F(adr, res) |
20428 | POST_IO |
20429 | RET(12) |
20430 | } |
20431 | res = 0; |
20432 | PRE_IO |
20433 | WRITE_BYTE_F(adr, res) |
20434 | POST_IO |
20435 | RET(12) |
20436 | } |
20437 | |
20438 | // STCC |
20439 | OPCODE(0x56D0) |
20440 | { |
20441 | u32 adr, res; |
20442 | u32 src, dst; |
20443 | |
20444 | adr = AREG((Opcode >> 0) & 7); |
20445 | if (flag_NotZ) |
20446 | { |
20447 | res = 0xFF; |
20448 | PRE_IO |
20449 | WRITE_BYTE_F(adr, res) |
20450 | POST_IO |
20451 | RET(12) |
20452 | } |
20453 | res = 0; |
20454 | PRE_IO |
20455 | WRITE_BYTE_F(adr, res) |
20456 | POST_IO |
20457 | RET(12) |
20458 | } |
20459 | |
20460 | // STCC |
20461 | OPCODE(0x57D0) |
20462 | { |
20463 | u32 adr, res; |
20464 | u32 src, dst; |
20465 | |
20466 | adr = AREG((Opcode >> 0) & 7); |
20467 | if (!flag_NotZ) |
20468 | { |
20469 | res = 0xFF; |
20470 | PRE_IO |
20471 | WRITE_BYTE_F(adr, res) |
20472 | POST_IO |
20473 | RET(12) |
20474 | } |
20475 | res = 0; |
20476 | PRE_IO |
20477 | WRITE_BYTE_F(adr, res) |
20478 | POST_IO |
20479 | RET(12) |
20480 | } |
20481 | |
20482 | // STCC |
20483 | OPCODE(0x58D0) |
20484 | { |
20485 | u32 adr, res; |
20486 | u32 src, dst; |
20487 | |
20488 | adr = AREG((Opcode >> 0) & 7); |
20489 | if (!(flag_V & 0x80)) |
20490 | { |
20491 | res = 0xFF; |
20492 | PRE_IO |
20493 | WRITE_BYTE_F(adr, res) |
20494 | POST_IO |
20495 | RET(12) |
20496 | } |
20497 | res = 0; |
20498 | PRE_IO |
20499 | WRITE_BYTE_F(adr, res) |
20500 | POST_IO |
20501 | RET(12) |
20502 | } |
20503 | |
20504 | // STCC |
20505 | OPCODE(0x59D0) |
20506 | { |
20507 | u32 adr, res; |
20508 | u32 src, dst; |
20509 | |
20510 | adr = AREG((Opcode >> 0) & 7); |
20511 | if (flag_V & 0x80) |
20512 | { |
20513 | res = 0xFF; |
20514 | PRE_IO |
20515 | WRITE_BYTE_F(adr, res) |
20516 | POST_IO |
20517 | RET(12) |
20518 | } |
20519 | res = 0; |
20520 | PRE_IO |
20521 | WRITE_BYTE_F(adr, res) |
20522 | POST_IO |
20523 | RET(12) |
20524 | } |
20525 | |
20526 | // STCC |
20527 | OPCODE(0x5AD0) |
20528 | { |
20529 | u32 adr, res; |
20530 | u32 src, dst; |
20531 | |
20532 | adr = AREG((Opcode >> 0) & 7); |
20533 | if (!(flag_N & 0x80)) |
20534 | { |
20535 | res = 0xFF; |
20536 | PRE_IO |
20537 | WRITE_BYTE_F(adr, res) |
20538 | POST_IO |
20539 | RET(12) |
20540 | } |
20541 | res = 0; |
20542 | PRE_IO |
20543 | WRITE_BYTE_F(adr, res) |
20544 | POST_IO |
20545 | RET(12) |
20546 | } |
20547 | |
20548 | // STCC |
20549 | OPCODE(0x5BD0) |
20550 | { |
20551 | u32 adr, res; |
20552 | u32 src, dst; |
20553 | |
20554 | adr = AREG((Opcode >> 0) & 7); |
20555 | if (flag_N & 0x80) |
20556 | { |
20557 | res = 0xFF; |
20558 | PRE_IO |
20559 | WRITE_BYTE_F(adr, res) |
20560 | POST_IO |
20561 | RET(12) |
20562 | } |
20563 | res = 0; |
20564 | PRE_IO |
20565 | WRITE_BYTE_F(adr, res) |
20566 | POST_IO |
20567 | RET(12) |
20568 | } |
20569 | |
20570 | // STCC |
20571 | OPCODE(0x5CD0) |
20572 | { |
20573 | u32 adr, res; |
20574 | u32 src, dst; |
20575 | |
20576 | adr = AREG((Opcode >> 0) & 7); |
20577 | if (!((flag_N ^ flag_V) & 0x80)) |
20578 | { |
20579 | res = 0xFF; |
20580 | PRE_IO |
20581 | WRITE_BYTE_F(adr, res) |
20582 | POST_IO |
20583 | RET(12) |
20584 | } |
20585 | res = 0; |
20586 | PRE_IO |
20587 | WRITE_BYTE_F(adr, res) |
20588 | POST_IO |
20589 | RET(12) |
20590 | } |
20591 | |
20592 | // STCC |
20593 | OPCODE(0x5DD0) |
20594 | { |
20595 | u32 adr, res; |
20596 | u32 src, dst; |
20597 | |
20598 | adr = AREG((Opcode >> 0) & 7); |
20599 | if ((flag_N ^ flag_V) & 0x80) |
20600 | { |
20601 | res = 0xFF; |
20602 | PRE_IO |
20603 | WRITE_BYTE_F(adr, res) |
20604 | POST_IO |
20605 | RET(12) |
20606 | } |
20607 | res = 0; |
20608 | PRE_IO |
20609 | WRITE_BYTE_F(adr, res) |
20610 | POST_IO |
20611 | RET(12) |
20612 | } |
20613 | |
20614 | // STCC |
20615 | OPCODE(0x5ED0) |
20616 | { |
20617 | u32 adr, res; |
20618 | u32 src, dst; |
20619 | |
20620 | adr = AREG((Opcode >> 0) & 7); |
20621 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20622 | { |
20623 | res = 0xFF; |
20624 | PRE_IO |
20625 | WRITE_BYTE_F(adr, res) |
20626 | POST_IO |
20627 | RET(12) |
20628 | } |
20629 | res = 0; |
20630 | PRE_IO |
20631 | WRITE_BYTE_F(adr, res) |
20632 | POST_IO |
20633 | RET(12) |
20634 | } |
20635 | |
20636 | // STCC |
20637 | OPCODE(0x5FD0) |
20638 | { |
20639 | u32 adr, res; |
20640 | u32 src, dst; |
20641 | |
20642 | adr = AREG((Opcode >> 0) & 7); |
20643 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20644 | { |
20645 | res = 0xFF; |
20646 | PRE_IO |
20647 | WRITE_BYTE_F(adr, res) |
20648 | POST_IO |
20649 | RET(12) |
20650 | } |
20651 | res = 0; |
20652 | PRE_IO |
20653 | WRITE_BYTE_F(adr, res) |
20654 | POST_IO |
20655 | RET(12) |
20656 | } |
20657 | |
20658 | // STCC |
20659 | OPCODE(0x50D8) |
20660 | { |
20661 | u32 adr, res; |
20662 | u32 src, dst; |
20663 | |
20664 | adr = AREG((Opcode >> 0) & 7); |
20665 | AREG((Opcode >> 0) & 7) += 1; |
20666 | res = 0xFF; |
20667 | PRE_IO |
20668 | WRITE_BYTE_F(adr, res) |
20669 | POST_IO |
20670 | RET(12) |
20671 | } |
20672 | |
20673 | // STCC |
20674 | OPCODE(0x51D8) |
20675 | { |
20676 | u32 adr, res; |
20677 | u32 src, dst; |
20678 | |
20679 | adr = AREG((Opcode >> 0) & 7); |
20680 | AREG((Opcode >> 0) & 7) += 1; |
20681 | res = 0; |
20682 | PRE_IO |
20683 | WRITE_BYTE_F(adr, res) |
20684 | POST_IO |
20685 | RET(12) |
20686 | } |
20687 | |
20688 | // STCC |
20689 | OPCODE(0x52D8) |
20690 | { |
20691 | u32 adr, res; |
20692 | u32 src, dst; |
20693 | |
20694 | adr = AREG((Opcode >> 0) & 7); |
20695 | AREG((Opcode >> 0) & 7) += 1; |
20696 | if (flag_NotZ && (!(flag_C & 0x100))) |
20697 | { |
20698 | res = 0xFF; |
20699 | PRE_IO |
20700 | WRITE_BYTE_F(adr, res) |
20701 | POST_IO |
20702 | RET(12) |
20703 | } |
20704 | res = 0; |
20705 | PRE_IO |
20706 | WRITE_BYTE_F(adr, res) |
20707 | POST_IO |
20708 | RET(12) |
20709 | } |
20710 | |
20711 | // STCC |
20712 | OPCODE(0x53D8) |
20713 | { |
20714 | u32 adr, res; |
20715 | u32 src, dst; |
20716 | |
20717 | adr = AREG((Opcode >> 0) & 7); |
20718 | AREG((Opcode >> 0) & 7) += 1; |
20719 | if ((!flag_NotZ) || (flag_C & 0x100)) |
20720 | { |
20721 | res = 0xFF; |
20722 | PRE_IO |
20723 | WRITE_BYTE_F(adr, res) |
20724 | POST_IO |
20725 | RET(12) |
20726 | } |
20727 | res = 0; |
20728 | PRE_IO |
20729 | WRITE_BYTE_F(adr, res) |
20730 | POST_IO |
20731 | RET(12) |
20732 | } |
20733 | |
20734 | // STCC |
20735 | OPCODE(0x54D8) |
20736 | { |
20737 | u32 adr, res; |
20738 | u32 src, dst; |
20739 | |
20740 | adr = AREG((Opcode >> 0) & 7); |
20741 | AREG((Opcode >> 0) & 7) += 1; |
20742 | if (!(flag_C & 0x100)) |
20743 | { |
20744 | res = 0xFF; |
20745 | PRE_IO |
20746 | WRITE_BYTE_F(adr, res) |
20747 | POST_IO |
20748 | RET(12) |
20749 | } |
20750 | res = 0; |
20751 | PRE_IO |
20752 | WRITE_BYTE_F(adr, res) |
20753 | POST_IO |
20754 | RET(12) |
20755 | } |
20756 | |
20757 | // STCC |
20758 | OPCODE(0x55D8) |
20759 | { |
20760 | u32 adr, res; |
20761 | u32 src, dst; |
20762 | |
20763 | adr = AREG((Opcode >> 0) & 7); |
20764 | AREG((Opcode >> 0) & 7) += 1; |
20765 | if (flag_C & 0x100) |
20766 | { |
20767 | res = 0xFF; |
20768 | PRE_IO |
20769 | WRITE_BYTE_F(adr, res) |
20770 | POST_IO |
20771 | RET(12) |
20772 | } |
20773 | res = 0; |
20774 | PRE_IO |
20775 | WRITE_BYTE_F(adr, res) |
20776 | POST_IO |
20777 | RET(12) |
20778 | } |
20779 | |
20780 | // STCC |
20781 | OPCODE(0x56D8) |
20782 | { |
20783 | u32 adr, res; |
20784 | u32 src, dst; |
20785 | |
20786 | adr = AREG((Opcode >> 0) & 7); |
20787 | AREG((Opcode >> 0) & 7) += 1; |
20788 | if (flag_NotZ) |
20789 | { |
20790 | res = 0xFF; |
20791 | PRE_IO |
20792 | WRITE_BYTE_F(adr, res) |
20793 | POST_IO |
20794 | RET(12) |
20795 | } |
20796 | res = 0; |
20797 | PRE_IO |
20798 | WRITE_BYTE_F(adr, res) |
20799 | POST_IO |
20800 | RET(12) |
20801 | } |
20802 | |
20803 | // STCC |
20804 | OPCODE(0x57D8) |
20805 | { |
20806 | u32 adr, res; |
20807 | u32 src, dst; |
20808 | |
20809 | adr = AREG((Opcode >> 0) & 7); |
20810 | AREG((Opcode >> 0) & 7) += 1; |
20811 | if (!flag_NotZ) |
20812 | { |
20813 | res = 0xFF; |
20814 | PRE_IO |
20815 | WRITE_BYTE_F(adr, res) |
20816 | POST_IO |
20817 | RET(12) |
20818 | } |
20819 | res = 0; |
20820 | PRE_IO |
20821 | WRITE_BYTE_F(adr, res) |
20822 | POST_IO |
20823 | RET(12) |
20824 | } |
20825 | |
20826 | // STCC |
20827 | OPCODE(0x58D8) |
20828 | { |
20829 | u32 adr, res; |
20830 | u32 src, dst; |
20831 | |
20832 | adr = AREG((Opcode >> 0) & 7); |
20833 | AREG((Opcode >> 0) & 7) += 1; |
20834 | if (!(flag_V & 0x80)) |
20835 | { |
20836 | res = 0xFF; |
20837 | PRE_IO |
20838 | WRITE_BYTE_F(adr, res) |
20839 | POST_IO |
20840 | RET(12) |
20841 | } |
20842 | res = 0; |
20843 | PRE_IO |
20844 | WRITE_BYTE_F(adr, res) |
20845 | POST_IO |
20846 | RET(12) |
20847 | } |
20848 | |
20849 | // STCC |
20850 | OPCODE(0x59D8) |
20851 | { |
20852 | u32 adr, res; |
20853 | u32 src, dst; |
20854 | |
20855 | adr = AREG((Opcode >> 0) & 7); |
20856 | AREG((Opcode >> 0) & 7) += 1; |
20857 | if (flag_V & 0x80) |
20858 | { |
20859 | res = 0xFF; |
20860 | PRE_IO |
20861 | WRITE_BYTE_F(adr, res) |
20862 | POST_IO |
20863 | RET(12) |
20864 | } |
20865 | res = 0; |
20866 | PRE_IO |
20867 | WRITE_BYTE_F(adr, res) |
20868 | POST_IO |
20869 | RET(12) |
20870 | } |
20871 | |
20872 | // STCC |
20873 | OPCODE(0x5AD8) |
20874 | { |
20875 | u32 adr, res; |
20876 | u32 src, dst; |
20877 | |
20878 | adr = AREG((Opcode >> 0) & 7); |
20879 | AREG((Opcode >> 0) & 7) += 1; |
20880 | if (!(flag_N & 0x80)) |
20881 | { |
20882 | res = 0xFF; |
20883 | PRE_IO |
20884 | WRITE_BYTE_F(adr, res) |
20885 | POST_IO |
20886 | RET(12) |
20887 | } |
20888 | res = 0; |
20889 | PRE_IO |
20890 | WRITE_BYTE_F(adr, res) |
20891 | POST_IO |
20892 | RET(12) |
20893 | } |
20894 | |
20895 | // STCC |
20896 | OPCODE(0x5BD8) |
20897 | { |
20898 | u32 adr, res; |
20899 | u32 src, dst; |
20900 | |
20901 | adr = AREG((Opcode >> 0) & 7); |
20902 | AREG((Opcode >> 0) & 7) += 1; |
20903 | if (flag_N & 0x80) |
20904 | { |
20905 | res = 0xFF; |
20906 | PRE_IO |
20907 | WRITE_BYTE_F(adr, res) |
20908 | POST_IO |
20909 | RET(12) |
20910 | } |
20911 | res = 0; |
20912 | PRE_IO |
20913 | WRITE_BYTE_F(adr, res) |
20914 | POST_IO |
20915 | RET(12) |
20916 | } |
20917 | |
20918 | // STCC |
20919 | OPCODE(0x5CD8) |
20920 | { |
20921 | u32 adr, res; |
20922 | u32 src, dst; |
20923 | |
20924 | adr = AREG((Opcode >> 0) & 7); |
20925 | AREG((Opcode >> 0) & 7) += 1; |
20926 | if (!((flag_N ^ flag_V) & 0x80)) |
20927 | { |
20928 | res = 0xFF; |
20929 | PRE_IO |
20930 | WRITE_BYTE_F(adr, res) |
20931 | POST_IO |
20932 | RET(12) |
20933 | } |
20934 | res = 0; |
20935 | PRE_IO |
20936 | WRITE_BYTE_F(adr, res) |
20937 | POST_IO |
20938 | RET(12) |
20939 | } |
20940 | |
20941 | // STCC |
20942 | OPCODE(0x5DD8) |
20943 | { |
20944 | u32 adr, res; |
20945 | u32 src, dst; |
20946 | |
20947 | adr = AREG((Opcode >> 0) & 7); |
20948 | AREG((Opcode >> 0) & 7) += 1; |
20949 | if ((flag_N ^ flag_V) & 0x80) |
20950 | { |
20951 | res = 0xFF; |
20952 | PRE_IO |
20953 | WRITE_BYTE_F(adr, res) |
20954 | POST_IO |
20955 | RET(12) |
20956 | } |
20957 | res = 0; |
20958 | PRE_IO |
20959 | WRITE_BYTE_F(adr, res) |
20960 | POST_IO |
20961 | RET(12) |
20962 | } |
20963 | |
20964 | // STCC |
20965 | OPCODE(0x5ED8) |
20966 | { |
20967 | u32 adr, res; |
20968 | u32 src, dst; |
20969 | |
20970 | adr = AREG((Opcode >> 0) & 7); |
20971 | AREG((Opcode >> 0) & 7) += 1; |
20972 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
20973 | { |
20974 | res = 0xFF; |
20975 | PRE_IO |
20976 | WRITE_BYTE_F(adr, res) |
20977 | POST_IO |
20978 | RET(12) |
20979 | } |
20980 | res = 0; |
20981 | PRE_IO |
20982 | WRITE_BYTE_F(adr, res) |
20983 | POST_IO |
20984 | RET(12) |
20985 | } |
20986 | |
20987 | // STCC |
20988 | OPCODE(0x5FD8) |
20989 | { |
20990 | u32 adr, res; |
20991 | u32 src, dst; |
20992 | |
20993 | adr = AREG((Opcode >> 0) & 7); |
20994 | AREG((Opcode >> 0) & 7) += 1; |
20995 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
20996 | { |
20997 | res = 0xFF; |
20998 | PRE_IO |
20999 | WRITE_BYTE_F(adr, res) |
21000 | POST_IO |
21001 | RET(12) |
21002 | } |
21003 | res = 0; |
21004 | PRE_IO |
21005 | WRITE_BYTE_F(adr, res) |
21006 | POST_IO |
21007 | RET(12) |
21008 | } |
21009 | |
21010 | // STCC |
21011 | OPCODE(0x50E0) |
21012 | { |
21013 | u32 adr, res; |
21014 | u32 src, dst; |
21015 | |
21016 | adr = AREG((Opcode >> 0) & 7) - 1; |
21017 | AREG((Opcode >> 0) & 7) = adr; |
21018 | res = 0xFF; |
21019 | PRE_IO |
21020 | WRITE_BYTE_F(adr, res) |
21021 | POST_IO |
21022 | RET(14) |
21023 | } |
21024 | |
21025 | // STCC |
21026 | OPCODE(0x51E0) |
21027 | { |
21028 | u32 adr, res; |
21029 | u32 src, dst; |
21030 | |
21031 | adr = AREG((Opcode >> 0) & 7) - 1; |
21032 | AREG((Opcode >> 0) & 7) = adr; |
21033 | res = 0; |
21034 | PRE_IO |
21035 | WRITE_BYTE_F(adr, res) |
21036 | POST_IO |
21037 | RET(14) |
21038 | } |
21039 | |
21040 | // STCC |
21041 | OPCODE(0x52E0) |
21042 | { |
21043 | u32 adr, res; |
21044 | u32 src, dst; |
21045 | |
21046 | adr = AREG((Opcode >> 0) & 7) - 1; |
21047 | AREG((Opcode >> 0) & 7) = adr; |
21048 | if (flag_NotZ && (!(flag_C & 0x100))) |
21049 | { |
21050 | res = 0xFF; |
21051 | PRE_IO |
21052 | WRITE_BYTE_F(adr, res) |
21053 | POST_IO |
21054 | RET(14) |
21055 | } |
21056 | res = 0; |
21057 | PRE_IO |
21058 | WRITE_BYTE_F(adr, res) |
21059 | POST_IO |
21060 | RET(14) |
21061 | } |
21062 | |
21063 | // STCC |
21064 | OPCODE(0x53E0) |
21065 | { |
21066 | u32 adr, res; |
21067 | u32 src, dst; |
21068 | |
21069 | adr = AREG((Opcode >> 0) & 7) - 1; |
21070 | AREG((Opcode >> 0) & 7) = adr; |
21071 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21072 | { |
21073 | res = 0xFF; |
21074 | PRE_IO |
21075 | WRITE_BYTE_F(adr, res) |
21076 | POST_IO |
21077 | RET(14) |
21078 | } |
21079 | res = 0; |
21080 | PRE_IO |
21081 | WRITE_BYTE_F(adr, res) |
21082 | POST_IO |
21083 | RET(14) |
21084 | } |
21085 | |
21086 | // STCC |
21087 | OPCODE(0x54E0) |
21088 | { |
21089 | u32 adr, res; |
21090 | u32 src, dst; |
21091 | |
21092 | adr = AREG((Opcode >> 0) & 7) - 1; |
21093 | AREG((Opcode >> 0) & 7) = adr; |
21094 | if (!(flag_C & 0x100)) |
21095 | { |
21096 | res = 0xFF; |
21097 | PRE_IO |
21098 | WRITE_BYTE_F(adr, res) |
21099 | POST_IO |
21100 | RET(14) |
21101 | } |
21102 | res = 0; |
21103 | PRE_IO |
21104 | WRITE_BYTE_F(adr, res) |
21105 | POST_IO |
21106 | RET(14) |
21107 | } |
21108 | |
21109 | // STCC |
21110 | OPCODE(0x55E0) |
21111 | { |
21112 | u32 adr, res; |
21113 | u32 src, dst; |
21114 | |
21115 | adr = AREG((Opcode >> 0) & 7) - 1; |
21116 | AREG((Opcode >> 0) & 7) = adr; |
21117 | if (flag_C & 0x100) |
21118 | { |
21119 | res = 0xFF; |
21120 | PRE_IO |
21121 | WRITE_BYTE_F(adr, res) |
21122 | POST_IO |
21123 | RET(14) |
21124 | } |
21125 | res = 0; |
21126 | PRE_IO |
21127 | WRITE_BYTE_F(adr, res) |
21128 | POST_IO |
21129 | RET(14) |
21130 | } |
21131 | |
21132 | // STCC |
21133 | OPCODE(0x56E0) |
21134 | { |
21135 | u32 adr, res; |
21136 | u32 src, dst; |
21137 | |
21138 | adr = AREG((Opcode >> 0) & 7) - 1; |
21139 | AREG((Opcode >> 0) & 7) = adr; |
21140 | if (flag_NotZ) |
21141 | { |
21142 | res = 0xFF; |
21143 | PRE_IO |
21144 | WRITE_BYTE_F(adr, res) |
21145 | POST_IO |
21146 | RET(14) |
21147 | } |
21148 | res = 0; |
21149 | PRE_IO |
21150 | WRITE_BYTE_F(adr, res) |
21151 | POST_IO |
21152 | RET(14) |
21153 | } |
21154 | |
21155 | // STCC |
21156 | OPCODE(0x57E0) |
21157 | { |
21158 | u32 adr, res; |
21159 | u32 src, dst; |
21160 | |
21161 | adr = AREG((Opcode >> 0) & 7) - 1; |
21162 | AREG((Opcode >> 0) & 7) = adr; |
21163 | if (!flag_NotZ) |
21164 | { |
21165 | res = 0xFF; |
21166 | PRE_IO |
21167 | WRITE_BYTE_F(adr, res) |
21168 | POST_IO |
21169 | RET(14) |
21170 | } |
21171 | res = 0; |
21172 | PRE_IO |
21173 | WRITE_BYTE_F(adr, res) |
21174 | POST_IO |
21175 | RET(14) |
21176 | } |
21177 | |
21178 | // STCC |
21179 | OPCODE(0x58E0) |
21180 | { |
21181 | u32 adr, res; |
21182 | u32 src, dst; |
21183 | |
21184 | adr = AREG((Opcode >> 0) & 7) - 1; |
21185 | AREG((Opcode >> 0) & 7) = adr; |
21186 | if (!(flag_V & 0x80)) |
21187 | { |
21188 | res = 0xFF; |
21189 | PRE_IO |
21190 | WRITE_BYTE_F(adr, res) |
21191 | POST_IO |
21192 | RET(14) |
21193 | } |
21194 | res = 0; |
21195 | PRE_IO |
21196 | WRITE_BYTE_F(adr, res) |
21197 | POST_IO |
21198 | RET(14) |
21199 | } |
21200 | |
21201 | // STCC |
21202 | OPCODE(0x59E0) |
21203 | { |
21204 | u32 adr, res; |
21205 | u32 src, dst; |
21206 | |
21207 | adr = AREG((Opcode >> 0) & 7) - 1; |
21208 | AREG((Opcode >> 0) & 7) = adr; |
21209 | if (flag_V & 0x80) |
21210 | { |
21211 | res = 0xFF; |
21212 | PRE_IO |
21213 | WRITE_BYTE_F(adr, res) |
21214 | POST_IO |
21215 | RET(14) |
21216 | } |
21217 | res = 0; |
21218 | PRE_IO |
21219 | WRITE_BYTE_F(adr, res) |
21220 | POST_IO |
21221 | RET(14) |
21222 | } |
21223 | |
21224 | // STCC |
21225 | OPCODE(0x5AE0) |
21226 | { |
21227 | u32 adr, res; |
21228 | u32 src, dst; |
21229 | |
21230 | adr = AREG((Opcode >> 0) & 7) - 1; |
21231 | AREG((Opcode >> 0) & 7) = adr; |
21232 | if (!(flag_N & 0x80)) |
21233 | { |
21234 | res = 0xFF; |
21235 | PRE_IO |
21236 | WRITE_BYTE_F(adr, res) |
21237 | POST_IO |
21238 | RET(14) |
21239 | } |
21240 | res = 0; |
21241 | PRE_IO |
21242 | WRITE_BYTE_F(adr, res) |
21243 | POST_IO |
21244 | RET(14) |
21245 | } |
21246 | |
21247 | // STCC |
21248 | OPCODE(0x5BE0) |
21249 | { |
21250 | u32 adr, res; |
21251 | u32 src, dst; |
21252 | |
21253 | adr = AREG((Opcode >> 0) & 7) - 1; |
21254 | AREG((Opcode >> 0) & 7) = adr; |
21255 | if (flag_N & 0x80) |
21256 | { |
21257 | res = 0xFF; |
21258 | PRE_IO |
21259 | WRITE_BYTE_F(adr, res) |
21260 | POST_IO |
21261 | RET(14) |
21262 | } |
21263 | res = 0; |
21264 | PRE_IO |
21265 | WRITE_BYTE_F(adr, res) |
21266 | POST_IO |
21267 | RET(14) |
21268 | } |
21269 | |
21270 | // STCC |
21271 | OPCODE(0x5CE0) |
21272 | { |
21273 | u32 adr, res; |
21274 | u32 src, dst; |
21275 | |
21276 | adr = AREG((Opcode >> 0) & 7) - 1; |
21277 | AREG((Opcode >> 0) & 7) = adr; |
21278 | if (!((flag_N ^ flag_V) & 0x80)) |
21279 | { |
21280 | res = 0xFF; |
21281 | PRE_IO |
21282 | WRITE_BYTE_F(adr, res) |
21283 | POST_IO |
21284 | RET(14) |
21285 | } |
21286 | res = 0; |
21287 | PRE_IO |
21288 | WRITE_BYTE_F(adr, res) |
21289 | POST_IO |
21290 | RET(14) |
21291 | } |
21292 | |
21293 | // STCC |
21294 | OPCODE(0x5DE0) |
21295 | { |
21296 | u32 adr, res; |
21297 | u32 src, dst; |
21298 | |
21299 | adr = AREG((Opcode >> 0) & 7) - 1; |
21300 | AREG((Opcode >> 0) & 7) = adr; |
21301 | if ((flag_N ^ flag_V) & 0x80) |
21302 | { |
21303 | res = 0xFF; |
21304 | PRE_IO |
21305 | WRITE_BYTE_F(adr, res) |
21306 | POST_IO |
21307 | RET(14) |
21308 | } |
21309 | res = 0; |
21310 | PRE_IO |
21311 | WRITE_BYTE_F(adr, res) |
21312 | POST_IO |
21313 | RET(14) |
21314 | } |
21315 | |
21316 | // STCC |
21317 | OPCODE(0x5EE0) |
21318 | { |
21319 | u32 adr, res; |
21320 | u32 src, dst; |
21321 | |
21322 | adr = AREG((Opcode >> 0) & 7) - 1; |
21323 | AREG((Opcode >> 0) & 7) = adr; |
21324 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21325 | { |
21326 | res = 0xFF; |
21327 | PRE_IO |
21328 | WRITE_BYTE_F(adr, res) |
21329 | POST_IO |
21330 | RET(14) |
21331 | } |
21332 | res = 0; |
21333 | PRE_IO |
21334 | WRITE_BYTE_F(adr, res) |
21335 | POST_IO |
21336 | RET(14) |
21337 | } |
21338 | |
21339 | // STCC |
21340 | OPCODE(0x5FE0) |
21341 | { |
21342 | u32 adr, res; |
21343 | u32 src, dst; |
21344 | |
21345 | adr = AREG((Opcode >> 0) & 7) - 1; |
21346 | AREG((Opcode >> 0) & 7) = adr; |
21347 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21348 | { |
21349 | res = 0xFF; |
21350 | PRE_IO |
21351 | WRITE_BYTE_F(adr, res) |
21352 | POST_IO |
21353 | RET(14) |
21354 | } |
21355 | res = 0; |
21356 | PRE_IO |
21357 | WRITE_BYTE_F(adr, res) |
21358 | POST_IO |
21359 | RET(14) |
21360 | } |
21361 | |
21362 | // STCC |
21363 | OPCODE(0x50E8) |
21364 | { |
21365 | u32 adr, res; |
21366 | u32 src, dst; |
21367 | |
21368 | FETCH_SWORD(adr); |
21369 | adr += AREG((Opcode >> 0) & 7); |
21370 | res = 0xFF; |
21371 | PRE_IO |
21372 | WRITE_BYTE_F(adr, res) |
21373 | POST_IO |
21374 | RET(16) |
21375 | } |
21376 | |
21377 | // STCC |
21378 | OPCODE(0x51E8) |
21379 | { |
21380 | u32 adr, res; |
21381 | u32 src, dst; |
21382 | |
21383 | FETCH_SWORD(adr); |
21384 | adr += AREG((Opcode >> 0) & 7); |
21385 | res = 0; |
21386 | PRE_IO |
21387 | WRITE_BYTE_F(adr, res) |
21388 | POST_IO |
21389 | RET(16) |
21390 | } |
21391 | |
21392 | // STCC |
21393 | OPCODE(0x52E8) |
21394 | { |
21395 | u32 adr, res; |
21396 | u32 src, dst; |
21397 | |
21398 | FETCH_SWORD(adr); |
21399 | adr += AREG((Opcode >> 0) & 7); |
21400 | if (flag_NotZ && (!(flag_C & 0x100))) |
21401 | { |
21402 | res = 0xFF; |
21403 | PRE_IO |
21404 | WRITE_BYTE_F(adr, res) |
21405 | POST_IO |
21406 | RET(16) |
21407 | } |
21408 | res = 0; |
21409 | PRE_IO |
21410 | WRITE_BYTE_F(adr, res) |
21411 | POST_IO |
21412 | RET(16) |
21413 | } |
21414 | |
21415 | // STCC |
21416 | OPCODE(0x53E8) |
21417 | { |
21418 | u32 adr, res; |
21419 | u32 src, dst; |
21420 | |
21421 | FETCH_SWORD(adr); |
21422 | adr += AREG((Opcode >> 0) & 7); |
21423 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21424 | { |
21425 | res = 0xFF; |
21426 | PRE_IO |
21427 | WRITE_BYTE_F(adr, res) |
21428 | POST_IO |
21429 | RET(16) |
21430 | } |
21431 | res = 0; |
21432 | PRE_IO |
21433 | WRITE_BYTE_F(adr, res) |
21434 | POST_IO |
21435 | RET(16) |
21436 | } |
21437 | |
21438 | // STCC |
21439 | OPCODE(0x54E8) |
21440 | { |
21441 | u32 adr, res; |
21442 | u32 src, dst; |
21443 | |
21444 | FETCH_SWORD(adr); |
21445 | adr += AREG((Opcode >> 0) & 7); |
21446 | if (!(flag_C & 0x100)) |
21447 | { |
21448 | res = 0xFF; |
21449 | PRE_IO |
21450 | WRITE_BYTE_F(adr, res) |
21451 | POST_IO |
21452 | RET(16) |
21453 | } |
21454 | res = 0; |
21455 | PRE_IO |
21456 | WRITE_BYTE_F(adr, res) |
21457 | POST_IO |
21458 | RET(16) |
21459 | } |
21460 | |
21461 | // STCC |
21462 | OPCODE(0x55E8) |
21463 | { |
21464 | u32 adr, res; |
21465 | u32 src, dst; |
21466 | |
21467 | FETCH_SWORD(adr); |
21468 | adr += AREG((Opcode >> 0) & 7); |
21469 | if (flag_C & 0x100) |
21470 | { |
21471 | res = 0xFF; |
21472 | PRE_IO |
21473 | WRITE_BYTE_F(adr, res) |
21474 | POST_IO |
21475 | RET(16) |
21476 | } |
21477 | res = 0; |
21478 | PRE_IO |
21479 | WRITE_BYTE_F(adr, res) |
21480 | POST_IO |
21481 | RET(16) |
21482 | } |
21483 | |
21484 | // STCC |
21485 | OPCODE(0x56E8) |
21486 | { |
21487 | u32 adr, res; |
21488 | u32 src, dst; |
21489 | |
21490 | FETCH_SWORD(adr); |
21491 | adr += AREG((Opcode >> 0) & 7); |
21492 | if (flag_NotZ) |
21493 | { |
21494 | res = 0xFF; |
21495 | PRE_IO |
21496 | WRITE_BYTE_F(adr, res) |
21497 | POST_IO |
21498 | RET(16) |
21499 | } |
21500 | res = 0; |
21501 | PRE_IO |
21502 | WRITE_BYTE_F(adr, res) |
21503 | POST_IO |
21504 | RET(16) |
21505 | } |
21506 | |
21507 | // STCC |
21508 | OPCODE(0x57E8) |
21509 | { |
21510 | u32 adr, res; |
21511 | u32 src, dst; |
21512 | |
21513 | FETCH_SWORD(adr); |
21514 | adr += AREG((Opcode >> 0) & 7); |
21515 | if (!flag_NotZ) |
21516 | { |
21517 | res = 0xFF; |
21518 | PRE_IO |
21519 | WRITE_BYTE_F(adr, res) |
21520 | POST_IO |
21521 | RET(16) |
21522 | } |
21523 | res = 0; |
21524 | PRE_IO |
21525 | WRITE_BYTE_F(adr, res) |
21526 | POST_IO |
21527 | RET(16) |
21528 | } |
21529 | |
21530 | // STCC |
21531 | OPCODE(0x58E8) |
21532 | { |
21533 | u32 adr, res; |
21534 | u32 src, dst; |
21535 | |
21536 | FETCH_SWORD(adr); |
21537 | adr += AREG((Opcode >> 0) & 7); |
21538 | if (!(flag_V & 0x80)) |
21539 | { |
21540 | res = 0xFF; |
21541 | PRE_IO |
21542 | WRITE_BYTE_F(adr, res) |
21543 | POST_IO |
21544 | RET(16) |
21545 | } |
21546 | res = 0; |
21547 | PRE_IO |
21548 | WRITE_BYTE_F(adr, res) |
21549 | POST_IO |
21550 | RET(16) |
21551 | } |
21552 | |
21553 | // STCC |
21554 | OPCODE(0x59E8) |
21555 | { |
21556 | u32 adr, res; |
21557 | u32 src, dst; |
21558 | |
21559 | FETCH_SWORD(adr); |
21560 | adr += AREG((Opcode >> 0) & 7); |
21561 | if (flag_V & 0x80) |
21562 | { |
21563 | res = 0xFF; |
21564 | PRE_IO |
21565 | WRITE_BYTE_F(adr, res) |
21566 | POST_IO |
21567 | RET(16) |
21568 | } |
21569 | res = 0; |
21570 | PRE_IO |
21571 | WRITE_BYTE_F(adr, res) |
21572 | POST_IO |
21573 | RET(16) |
21574 | } |
21575 | |
21576 | // STCC |
21577 | OPCODE(0x5AE8) |
21578 | { |
21579 | u32 adr, res; |
21580 | u32 src, dst; |
21581 | |
21582 | FETCH_SWORD(adr); |
21583 | adr += AREG((Opcode >> 0) & 7); |
21584 | if (!(flag_N & 0x80)) |
21585 | { |
21586 | res = 0xFF; |
21587 | PRE_IO |
21588 | WRITE_BYTE_F(adr, res) |
21589 | POST_IO |
21590 | RET(16) |
21591 | } |
21592 | res = 0; |
21593 | PRE_IO |
21594 | WRITE_BYTE_F(adr, res) |
21595 | POST_IO |
21596 | RET(16) |
21597 | } |
21598 | |
21599 | // STCC |
21600 | OPCODE(0x5BE8) |
21601 | { |
21602 | u32 adr, res; |
21603 | u32 src, dst; |
21604 | |
21605 | FETCH_SWORD(adr); |
21606 | adr += AREG((Opcode >> 0) & 7); |
21607 | if (flag_N & 0x80) |
21608 | { |
21609 | res = 0xFF; |
21610 | PRE_IO |
21611 | WRITE_BYTE_F(adr, res) |
21612 | POST_IO |
21613 | RET(16) |
21614 | } |
21615 | res = 0; |
21616 | PRE_IO |
21617 | WRITE_BYTE_F(adr, res) |
21618 | POST_IO |
21619 | RET(16) |
21620 | } |
21621 | |
21622 | // STCC |
21623 | OPCODE(0x5CE8) |
21624 | { |
21625 | u32 adr, res; |
21626 | u32 src, dst; |
21627 | |
21628 | FETCH_SWORD(adr); |
21629 | adr += AREG((Opcode >> 0) & 7); |
21630 | if (!((flag_N ^ flag_V) & 0x80)) |
21631 | { |
21632 | res = 0xFF; |
21633 | PRE_IO |
21634 | WRITE_BYTE_F(adr, res) |
21635 | POST_IO |
21636 | RET(16) |
21637 | } |
21638 | res = 0; |
21639 | PRE_IO |
21640 | WRITE_BYTE_F(adr, res) |
21641 | POST_IO |
21642 | RET(16) |
21643 | } |
21644 | |
21645 | // STCC |
21646 | OPCODE(0x5DE8) |
21647 | { |
21648 | u32 adr, res; |
21649 | u32 src, dst; |
21650 | |
21651 | FETCH_SWORD(adr); |
21652 | adr += AREG((Opcode >> 0) & 7); |
21653 | if ((flag_N ^ flag_V) & 0x80) |
21654 | { |
21655 | res = 0xFF; |
21656 | PRE_IO |
21657 | WRITE_BYTE_F(adr, res) |
21658 | POST_IO |
21659 | RET(16) |
21660 | } |
21661 | res = 0; |
21662 | PRE_IO |
21663 | WRITE_BYTE_F(adr, res) |
21664 | POST_IO |
21665 | RET(16) |
21666 | } |
21667 | |
21668 | // STCC |
21669 | OPCODE(0x5EE8) |
21670 | { |
21671 | u32 adr, res; |
21672 | u32 src, dst; |
21673 | |
21674 | FETCH_SWORD(adr); |
21675 | adr += AREG((Opcode >> 0) & 7); |
21676 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
21677 | { |
21678 | res = 0xFF; |
21679 | PRE_IO |
21680 | WRITE_BYTE_F(adr, res) |
21681 | POST_IO |
21682 | RET(16) |
21683 | } |
21684 | res = 0; |
21685 | PRE_IO |
21686 | WRITE_BYTE_F(adr, res) |
21687 | POST_IO |
21688 | RET(16) |
21689 | } |
21690 | |
21691 | // STCC |
21692 | OPCODE(0x5FE8) |
21693 | { |
21694 | u32 adr, res; |
21695 | u32 src, dst; |
21696 | |
21697 | FETCH_SWORD(adr); |
21698 | adr += AREG((Opcode >> 0) & 7); |
21699 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
21700 | { |
21701 | res = 0xFF; |
21702 | PRE_IO |
21703 | WRITE_BYTE_F(adr, res) |
21704 | POST_IO |
21705 | RET(16) |
21706 | } |
21707 | res = 0; |
21708 | PRE_IO |
21709 | WRITE_BYTE_F(adr, res) |
21710 | POST_IO |
21711 | RET(16) |
21712 | } |
21713 | |
21714 | // STCC |
21715 | OPCODE(0x50F0) |
21716 | { |
21717 | u32 adr, res; |
21718 | u32 src, dst; |
21719 | |
21720 | adr = AREG((Opcode >> 0) & 7); |
21721 | DECODE_EXT_WORD |
21722 | res = 0xFF; |
21723 | PRE_IO |
21724 | WRITE_BYTE_F(adr, res) |
21725 | POST_IO |
21726 | RET(18) |
21727 | } |
21728 | |
21729 | // STCC |
21730 | OPCODE(0x51F0) |
21731 | { |
21732 | u32 adr, res; |
21733 | u32 src, dst; |
21734 | |
21735 | adr = AREG((Opcode >> 0) & 7); |
21736 | DECODE_EXT_WORD |
21737 | res = 0; |
21738 | PRE_IO |
21739 | WRITE_BYTE_F(adr, res) |
21740 | POST_IO |
21741 | RET(18) |
21742 | } |
21743 | |
21744 | // STCC |
21745 | OPCODE(0x52F0) |
21746 | { |
21747 | u32 adr, res; |
21748 | u32 src, dst; |
21749 | |
21750 | adr = AREG((Opcode >> 0) & 7); |
21751 | DECODE_EXT_WORD |
21752 | if (flag_NotZ && (!(flag_C & 0x100))) |
21753 | { |
21754 | res = 0xFF; |
21755 | PRE_IO |
21756 | WRITE_BYTE_F(adr, res) |
21757 | POST_IO |
21758 | RET(18) |
21759 | } |
21760 | res = 0; |
21761 | PRE_IO |
21762 | WRITE_BYTE_F(adr, res) |
21763 | POST_IO |
21764 | RET(18) |
21765 | } |
21766 | |
21767 | // STCC |
21768 | OPCODE(0x53F0) |
21769 | { |
21770 | u32 adr, res; |
21771 | u32 src, dst; |
21772 | |
21773 | adr = AREG((Opcode >> 0) & 7); |
21774 | DECODE_EXT_WORD |
21775 | if ((!flag_NotZ) || (flag_C & 0x100)) |
21776 | { |
21777 | res = 0xFF; |
21778 | PRE_IO |
21779 | WRITE_BYTE_F(adr, res) |
21780 | POST_IO |
21781 | RET(18) |
21782 | } |
21783 | res = 0; |
21784 | PRE_IO |
21785 | WRITE_BYTE_F(adr, res) |
21786 | POST_IO |
21787 | RET(18) |
21788 | } |
21789 | |
21790 | // STCC |
21791 | OPCODE(0x54F0) |
21792 | { |
21793 | u32 adr, res; |
21794 | u32 src, dst; |
21795 | |
21796 | adr = AREG((Opcode >> 0) & 7); |
21797 | DECODE_EXT_WORD |
21798 | if (!(flag_C & 0x100)) |
21799 | { |
21800 | res = 0xFF; |
21801 | PRE_IO |
21802 | WRITE_BYTE_F(adr, res) |
21803 | POST_IO |
21804 | RET(18) |
21805 | } |
21806 | res = 0; |
21807 | PRE_IO |
21808 | WRITE_BYTE_F(adr, res) |
21809 | POST_IO |
21810 | RET(18) |
21811 | } |
21812 | |
21813 | // STCC |
21814 | OPCODE(0x55F0) |
21815 | { |
21816 | u32 adr, res; |
21817 | u32 src, dst; |
21818 | |
21819 | adr = AREG((Opcode >> 0) & 7); |
21820 | DECODE_EXT_WORD |
21821 | if (flag_C & 0x100) |
21822 | { |
21823 | res = 0xFF; |
21824 | PRE_IO |
21825 | WRITE_BYTE_F(adr, res) |
21826 | POST_IO |
21827 | RET(18) |
21828 | } |
21829 | res = 0; |
21830 | PRE_IO |
21831 | WRITE_BYTE_F(adr, res) |
21832 | POST_IO |
21833 | RET(18) |
21834 | } |
21835 | |
21836 | // STCC |
21837 | OPCODE(0x56F0) |
21838 | { |
21839 | u32 adr, res; |
21840 | u32 src, dst; |
21841 | |
21842 | adr = AREG((Opcode >> 0) & 7); |
21843 | DECODE_EXT_WORD |
21844 | if (flag_NotZ) |
21845 | { |
21846 | res = 0xFF; |
21847 | PRE_IO |
21848 | WRITE_BYTE_F(adr, res) |
21849 | POST_IO |
21850 | RET(18) |
21851 | } |
21852 | res = 0; |
21853 | PRE_IO |
21854 | WRITE_BYTE_F(adr, res) |
21855 | POST_IO |
21856 | RET(18) |
21857 | } |
21858 | |
21859 | // STCC |
21860 | OPCODE(0x57F0) |
21861 | { |
21862 | u32 adr, res; |
21863 | u32 src, dst; |
21864 | |
21865 | adr = AREG((Opcode >> 0) & 7); |
21866 | DECODE_EXT_WORD |
21867 | if (!flag_NotZ) |
21868 | { |
21869 | res = 0xFF; |
21870 | PRE_IO |
21871 | WRITE_BYTE_F(adr, res) |
21872 | POST_IO |
21873 | RET(18) |
21874 | } |
21875 | res = 0; |
21876 | PRE_IO |
21877 | WRITE_BYTE_F(adr, res) |
21878 | POST_IO |
21879 | RET(18) |
21880 | } |
21881 | |
21882 | // STCC |
21883 | OPCODE(0x58F0) |
21884 | { |
21885 | u32 adr, res; |
21886 | u32 src, dst; |
21887 | |
21888 | adr = AREG((Opcode >> 0) & 7); |
21889 | DECODE_EXT_WORD |
21890 | if (!(flag_V & 0x80)) |
21891 | { |
21892 | res = 0xFF; |
21893 | PRE_IO |
21894 | WRITE_BYTE_F(adr, res) |
21895 | POST_IO |
21896 | RET(18) |
21897 | } |
21898 | res = 0; |
21899 | PRE_IO |
21900 | WRITE_BYTE_F(adr, res) |
21901 | POST_IO |
21902 | RET(18) |
21903 | } |
21904 | |
21905 | // STCC |
21906 | OPCODE(0x59F0) |
21907 | { |
21908 | u32 adr, res; |
21909 | u32 src, dst; |
21910 | |
21911 | adr = AREG((Opcode >> 0) & 7); |
21912 | DECODE_EXT_WORD |
21913 | if (flag_V & 0x80) |
21914 | { |
21915 | res = 0xFF; |
21916 | PRE_IO |
21917 | WRITE_BYTE_F(adr, res) |
21918 | POST_IO |
21919 | RET(18) |
21920 | } |
21921 | res = 0; |
21922 | PRE_IO |
21923 | WRITE_BYTE_F(adr, res) |
21924 | POST_IO |
21925 | RET(18) |
21926 | } |
21927 | |
21928 | // STCC |
21929 | OPCODE(0x5AF0) |
21930 | { |
21931 | u32 adr, res; |
21932 | u32 src, dst; |
21933 | |
21934 | adr = AREG((Opcode >> 0) & 7); |
21935 | DECODE_EXT_WORD |
21936 | if (!(flag_N & 0x80)) |
21937 | { |
21938 | res = 0xFF; |
21939 | PRE_IO |
21940 | WRITE_BYTE_F(adr, res) |
21941 | POST_IO |
21942 | RET(18) |
21943 | } |
21944 | res = 0; |
21945 | PRE_IO |
21946 | WRITE_BYTE_F(adr, res) |
21947 | POST_IO |
21948 | RET(18) |
21949 | } |
21950 | |
21951 | // STCC |
21952 | OPCODE(0x5BF0) |
21953 | { |
21954 | u32 adr, res; |
21955 | u32 src, dst; |
21956 | |
21957 | adr = AREG((Opcode >> 0) & 7); |
21958 | DECODE_EXT_WORD |
21959 | if (flag_N & 0x80) |
21960 | { |
21961 | res = 0xFF; |
21962 | PRE_IO |
21963 | WRITE_BYTE_F(adr, res) |
21964 | POST_IO |
21965 | RET(18) |
21966 | } |
21967 | res = 0; |
21968 | PRE_IO |
21969 | WRITE_BYTE_F(adr, res) |
21970 | POST_IO |
21971 | RET(18) |
21972 | } |
21973 | |
21974 | // STCC |
21975 | OPCODE(0x5CF0) |
21976 | { |
21977 | u32 adr, res; |
21978 | u32 src, dst; |
21979 | |
21980 | adr = AREG((Opcode >> 0) & 7); |
21981 | DECODE_EXT_WORD |
21982 | if (!((flag_N ^ flag_V) & 0x80)) |
21983 | { |
21984 | res = 0xFF; |
21985 | PRE_IO |
21986 | WRITE_BYTE_F(adr, res) |
21987 | POST_IO |
21988 | RET(18) |
21989 | } |
21990 | res = 0; |
21991 | PRE_IO |
21992 | WRITE_BYTE_F(adr, res) |
21993 | POST_IO |
21994 | RET(18) |
21995 | } |
21996 | |
21997 | // STCC |
21998 | OPCODE(0x5DF0) |
21999 | { |
22000 | u32 adr, res; |
22001 | u32 src, dst; |
22002 | |
22003 | adr = AREG((Opcode >> 0) & 7); |
22004 | DECODE_EXT_WORD |
22005 | if ((flag_N ^ flag_V) & 0x80) |
22006 | { |
22007 | res = 0xFF; |
22008 | PRE_IO |
22009 | WRITE_BYTE_F(adr, res) |
22010 | POST_IO |
22011 | RET(18) |
22012 | } |
22013 | res = 0; |
22014 | PRE_IO |
22015 | WRITE_BYTE_F(adr, res) |
22016 | POST_IO |
22017 | RET(18) |
22018 | } |
22019 | |
22020 | // STCC |
22021 | OPCODE(0x5EF0) |
22022 | { |
22023 | u32 adr, res; |
22024 | u32 src, dst; |
22025 | |
22026 | adr = AREG((Opcode >> 0) & 7); |
22027 | DECODE_EXT_WORD |
22028 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22029 | { |
22030 | res = 0xFF; |
22031 | PRE_IO |
22032 | WRITE_BYTE_F(adr, res) |
22033 | POST_IO |
22034 | RET(18) |
22035 | } |
22036 | res = 0; |
22037 | PRE_IO |
22038 | WRITE_BYTE_F(adr, res) |
22039 | POST_IO |
22040 | RET(18) |
22041 | } |
22042 | |
22043 | // STCC |
22044 | OPCODE(0x5FF0) |
22045 | { |
22046 | u32 adr, res; |
22047 | u32 src, dst; |
22048 | |
22049 | adr = AREG((Opcode >> 0) & 7); |
22050 | DECODE_EXT_WORD |
22051 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22052 | { |
22053 | res = 0xFF; |
22054 | PRE_IO |
22055 | WRITE_BYTE_F(adr, res) |
22056 | POST_IO |
22057 | RET(18) |
22058 | } |
22059 | res = 0; |
22060 | PRE_IO |
22061 | WRITE_BYTE_F(adr, res) |
22062 | POST_IO |
22063 | RET(18) |
22064 | } |
22065 | |
22066 | // STCC |
22067 | OPCODE(0x50F8) |
22068 | { |
22069 | u32 adr, res; |
22070 | u32 src, dst; |
22071 | |
22072 | FETCH_SWORD(adr); |
22073 | res = 0xFF; |
22074 | PRE_IO |
22075 | WRITE_BYTE_F(adr, res) |
22076 | POST_IO |
22077 | RET(16) |
22078 | } |
22079 | |
22080 | // STCC |
22081 | OPCODE(0x51F8) |
22082 | { |
22083 | u32 adr, res; |
22084 | u32 src, dst; |
22085 | |
22086 | FETCH_SWORD(adr); |
22087 | res = 0; |
22088 | PRE_IO |
22089 | WRITE_BYTE_F(adr, res) |
22090 | POST_IO |
22091 | RET(16) |
22092 | } |
22093 | |
22094 | // STCC |
22095 | OPCODE(0x52F8) |
22096 | { |
22097 | u32 adr, res; |
22098 | u32 src, dst; |
22099 | |
22100 | FETCH_SWORD(adr); |
22101 | if (flag_NotZ && (!(flag_C & 0x100))) |
22102 | { |
22103 | res = 0xFF; |
22104 | PRE_IO |
22105 | WRITE_BYTE_F(adr, res) |
22106 | POST_IO |
22107 | RET(16) |
22108 | } |
22109 | res = 0; |
22110 | PRE_IO |
22111 | WRITE_BYTE_F(adr, res) |
22112 | POST_IO |
22113 | RET(16) |
22114 | } |
22115 | |
22116 | // STCC |
22117 | OPCODE(0x53F8) |
22118 | { |
22119 | u32 adr, res; |
22120 | u32 src, dst; |
22121 | |
22122 | FETCH_SWORD(adr); |
22123 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22124 | { |
22125 | res = 0xFF; |
22126 | PRE_IO |
22127 | WRITE_BYTE_F(adr, res) |
22128 | POST_IO |
22129 | RET(16) |
22130 | } |
22131 | res = 0; |
22132 | PRE_IO |
22133 | WRITE_BYTE_F(adr, res) |
22134 | POST_IO |
22135 | RET(16) |
22136 | } |
22137 | |
22138 | // STCC |
22139 | OPCODE(0x54F8) |
22140 | { |
22141 | u32 adr, res; |
22142 | u32 src, dst; |
22143 | |
22144 | FETCH_SWORD(adr); |
22145 | if (!(flag_C & 0x100)) |
22146 | { |
22147 | res = 0xFF; |
22148 | PRE_IO |
22149 | WRITE_BYTE_F(adr, res) |
22150 | POST_IO |
22151 | RET(16) |
22152 | } |
22153 | res = 0; |
22154 | PRE_IO |
22155 | WRITE_BYTE_F(adr, res) |
22156 | POST_IO |
22157 | RET(16) |
22158 | } |
22159 | |
22160 | // STCC |
22161 | OPCODE(0x55F8) |
22162 | { |
22163 | u32 adr, res; |
22164 | u32 src, dst; |
22165 | |
22166 | FETCH_SWORD(adr); |
22167 | if (flag_C & 0x100) |
22168 | { |
22169 | res = 0xFF; |
22170 | PRE_IO |
22171 | WRITE_BYTE_F(adr, res) |
22172 | POST_IO |
22173 | RET(16) |
22174 | } |
22175 | res = 0; |
22176 | PRE_IO |
22177 | WRITE_BYTE_F(adr, res) |
22178 | POST_IO |
22179 | RET(16) |
22180 | } |
22181 | |
22182 | // STCC |
22183 | OPCODE(0x56F8) |
22184 | { |
22185 | u32 adr, res; |
22186 | u32 src, dst; |
22187 | |
22188 | FETCH_SWORD(adr); |
22189 | if (flag_NotZ) |
22190 | { |
22191 | res = 0xFF; |
22192 | PRE_IO |
22193 | WRITE_BYTE_F(adr, res) |
22194 | POST_IO |
22195 | RET(16) |
22196 | } |
22197 | res = 0; |
22198 | PRE_IO |
22199 | WRITE_BYTE_F(adr, res) |
22200 | POST_IO |
22201 | RET(16) |
22202 | } |
22203 | |
22204 | // STCC |
22205 | OPCODE(0x57F8) |
22206 | { |
22207 | u32 adr, res; |
22208 | u32 src, dst; |
22209 | |
22210 | FETCH_SWORD(adr); |
22211 | if (!flag_NotZ) |
22212 | { |
22213 | res = 0xFF; |
22214 | PRE_IO |
22215 | WRITE_BYTE_F(adr, res) |
22216 | POST_IO |
22217 | RET(16) |
22218 | } |
22219 | res = 0; |
22220 | PRE_IO |
22221 | WRITE_BYTE_F(adr, res) |
22222 | POST_IO |
22223 | RET(16) |
22224 | } |
22225 | |
22226 | // STCC |
22227 | OPCODE(0x58F8) |
22228 | { |
22229 | u32 adr, res; |
22230 | u32 src, dst; |
22231 | |
22232 | FETCH_SWORD(adr); |
22233 | if (!(flag_V & 0x80)) |
22234 | { |
22235 | res = 0xFF; |
22236 | PRE_IO |
22237 | WRITE_BYTE_F(adr, res) |
22238 | POST_IO |
22239 | RET(16) |
22240 | } |
22241 | res = 0; |
22242 | PRE_IO |
22243 | WRITE_BYTE_F(adr, res) |
22244 | POST_IO |
22245 | RET(16) |
22246 | } |
22247 | |
22248 | // STCC |
22249 | OPCODE(0x59F8) |
22250 | { |
22251 | u32 adr, res; |
22252 | u32 src, dst; |
22253 | |
22254 | FETCH_SWORD(adr); |
22255 | if (flag_V & 0x80) |
22256 | { |
22257 | res = 0xFF; |
22258 | PRE_IO |
22259 | WRITE_BYTE_F(adr, res) |
22260 | POST_IO |
22261 | RET(16) |
22262 | } |
22263 | res = 0; |
22264 | PRE_IO |
22265 | WRITE_BYTE_F(adr, res) |
22266 | POST_IO |
22267 | RET(16) |
22268 | } |
22269 | |
22270 | // STCC |
22271 | OPCODE(0x5AF8) |
22272 | { |
22273 | u32 adr, res; |
22274 | u32 src, dst; |
22275 | |
22276 | FETCH_SWORD(adr); |
22277 | if (!(flag_N & 0x80)) |
22278 | { |
22279 | res = 0xFF; |
22280 | PRE_IO |
22281 | WRITE_BYTE_F(adr, res) |
22282 | POST_IO |
22283 | RET(16) |
22284 | } |
22285 | res = 0; |
22286 | PRE_IO |
22287 | WRITE_BYTE_F(adr, res) |
22288 | POST_IO |
22289 | RET(16) |
22290 | } |
22291 | |
22292 | // STCC |
22293 | OPCODE(0x5BF8) |
22294 | { |
22295 | u32 adr, res; |
22296 | u32 src, dst; |
22297 | |
22298 | FETCH_SWORD(adr); |
22299 | if (flag_N & 0x80) |
22300 | { |
22301 | res = 0xFF; |
22302 | PRE_IO |
22303 | WRITE_BYTE_F(adr, res) |
22304 | POST_IO |
22305 | RET(16) |
22306 | } |
22307 | res = 0; |
22308 | PRE_IO |
22309 | WRITE_BYTE_F(adr, res) |
22310 | POST_IO |
22311 | RET(16) |
22312 | } |
22313 | |
22314 | // STCC |
22315 | OPCODE(0x5CF8) |
22316 | { |
22317 | u32 adr, res; |
22318 | u32 src, dst; |
22319 | |
22320 | FETCH_SWORD(adr); |
22321 | if (!((flag_N ^ flag_V) & 0x80)) |
22322 | { |
22323 | res = 0xFF; |
22324 | PRE_IO |
22325 | WRITE_BYTE_F(adr, res) |
22326 | POST_IO |
22327 | RET(16) |
22328 | } |
22329 | res = 0; |
22330 | PRE_IO |
22331 | WRITE_BYTE_F(adr, res) |
22332 | POST_IO |
22333 | RET(16) |
22334 | } |
22335 | |
22336 | // STCC |
22337 | OPCODE(0x5DF8) |
22338 | { |
22339 | u32 adr, res; |
22340 | u32 src, dst; |
22341 | |
22342 | FETCH_SWORD(adr); |
22343 | if ((flag_N ^ flag_V) & 0x80) |
22344 | { |
22345 | res = 0xFF; |
22346 | PRE_IO |
22347 | WRITE_BYTE_F(adr, res) |
22348 | POST_IO |
22349 | RET(16) |
22350 | } |
22351 | res = 0; |
22352 | PRE_IO |
22353 | WRITE_BYTE_F(adr, res) |
22354 | POST_IO |
22355 | RET(16) |
22356 | } |
22357 | |
22358 | // STCC |
22359 | OPCODE(0x5EF8) |
22360 | { |
22361 | u32 adr, res; |
22362 | u32 src, dst; |
22363 | |
22364 | FETCH_SWORD(adr); |
22365 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22366 | { |
22367 | res = 0xFF; |
22368 | PRE_IO |
22369 | WRITE_BYTE_F(adr, res) |
22370 | POST_IO |
22371 | RET(16) |
22372 | } |
22373 | res = 0; |
22374 | PRE_IO |
22375 | WRITE_BYTE_F(adr, res) |
22376 | POST_IO |
22377 | RET(16) |
22378 | } |
22379 | |
22380 | // STCC |
22381 | OPCODE(0x5FF8) |
22382 | { |
22383 | u32 adr, res; |
22384 | u32 src, dst; |
22385 | |
22386 | FETCH_SWORD(adr); |
22387 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22388 | { |
22389 | res = 0xFF; |
22390 | PRE_IO |
22391 | WRITE_BYTE_F(adr, res) |
22392 | POST_IO |
22393 | RET(16) |
22394 | } |
22395 | res = 0; |
22396 | PRE_IO |
22397 | WRITE_BYTE_F(adr, res) |
22398 | POST_IO |
22399 | RET(16) |
22400 | } |
22401 | |
22402 | // STCC |
22403 | OPCODE(0x50F9) |
22404 | { |
22405 | u32 adr, res; |
22406 | u32 src, dst; |
22407 | |
22408 | FETCH_LONG(adr); |
22409 | res = 0xFF; |
22410 | PRE_IO |
22411 | WRITE_BYTE_F(adr, res) |
22412 | POST_IO |
22413 | RET(20) |
22414 | } |
22415 | |
22416 | // STCC |
22417 | OPCODE(0x51F9) |
22418 | { |
22419 | u32 adr, res; |
22420 | u32 src, dst; |
22421 | |
22422 | FETCH_LONG(adr); |
22423 | res = 0; |
22424 | PRE_IO |
22425 | WRITE_BYTE_F(adr, res) |
22426 | POST_IO |
22427 | RET(20) |
22428 | } |
22429 | |
22430 | // STCC |
22431 | OPCODE(0x52F9) |
22432 | { |
22433 | u32 adr, res; |
22434 | u32 src, dst; |
22435 | |
22436 | FETCH_LONG(adr); |
22437 | if (flag_NotZ && (!(flag_C & 0x100))) |
22438 | { |
22439 | res = 0xFF; |
22440 | PRE_IO |
22441 | WRITE_BYTE_F(adr, res) |
22442 | POST_IO |
22443 | RET(20) |
22444 | } |
22445 | res = 0; |
22446 | PRE_IO |
22447 | WRITE_BYTE_F(adr, res) |
22448 | POST_IO |
22449 | RET(20) |
22450 | } |
22451 | |
22452 | // STCC |
22453 | OPCODE(0x53F9) |
22454 | { |
22455 | u32 adr, res; |
22456 | u32 src, dst; |
22457 | |
22458 | FETCH_LONG(adr); |
22459 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22460 | { |
22461 | res = 0xFF; |
22462 | PRE_IO |
22463 | WRITE_BYTE_F(adr, res) |
22464 | POST_IO |
22465 | RET(20) |
22466 | } |
22467 | res = 0; |
22468 | PRE_IO |
22469 | WRITE_BYTE_F(adr, res) |
22470 | POST_IO |
22471 | RET(20) |
22472 | } |
22473 | |
22474 | // STCC |
22475 | OPCODE(0x54F9) |
22476 | { |
22477 | u32 adr, res; |
22478 | u32 src, dst; |
22479 | |
22480 | FETCH_LONG(adr); |
22481 | if (!(flag_C & 0x100)) |
22482 | { |
22483 | res = 0xFF; |
22484 | PRE_IO |
22485 | WRITE_BYTE_F(adr, res) |
22486 | POST_IO |
22487 | RET(20) |
22488 | } |
22489 | res = 0; |
22490 | PRE_IO |
22491 | WRITE_BYTE_F(adr, res) |
22492 | POST_IO |
22493 | RET(20) |
22494 | } |
22495 | |
22496 | // STCC |
22497 | OPCODE(0x55F9) |
22498 | { |
22499 | u32 adr, res; |
22500 | u32 src, dst; |
22501 | |
22502 | FETCH_LONG(adr); |
22503 | if (flag_C & 0x100) |
22504 | { |
22505 | res = 0xFF; |
22506 | PRE_IO |
22507 | WRITE_BYTE_F(adr, res) |
22508 | POST_IO |
22509 | RET(20) |
22510 | } |
22511 | res = 0; |
22512 | PRE_IO |
22513 | WRITE_BYTE_F(adr, res) |
22514 | POST_IO |
22515 | RET(20) |
22516 | } |
22517 | |
22518 | // STCC |
22519 | OPCODE(0x56F9) |
22520 | { |
22521 | u32 adr, res; |
22522 | u32 src, dst; |
22523 | |
22524 | FETCH_LONG(adr); |
22525 | if (flag_NotZ) |
22526 | { |
22527 | res = 0xFF; |
22528 | PRE_IO |
22529 | WRITE_BYTE_F(adr, res) |
22530 | POST_IO |
22531 | RET(20) |
22532 | } |
22533 | res = 0; |
22534 | PRE_IO |
22535 | WRITE_BYTE_F(adr, res) |
22536 | POST_IO |
22537 | RET(20) |
22538 | } |
22539 | |
22540 | // STCC |
22541 | OPCODE(0x57F9) |
22542 | { |
22543 | u32 adr, res; |
22544 | u32 src, dst; |
22545 | |
22546 | FETCH_LONG(adr); |
22547 | if (!flag_NotZ) |
22548 | { |
22549 | res = 0xFF; |
22550 | PRE_IO |
22551 | WRITE_BYTE_F(adr, res) |
22552 | POST_IO |
22553 | RET(20) |
22554 | } |
22555 | res = 0; |
22556 | PRE_IO |
22557 | WRITE_BYTE_F(adr, res) |
22558 | POST_IO |
22559 | RET(20) |
22560 | } |
22561 | |
22562 | // STCC |
22563 | OPCODE(0x58F9) |
22564 | { |
22565 | u32 adr, res; |
22566 | u32 src, dst; |
22567 | |
22568 | FETCH_LONG(adr); |
22569 | if (!(flag_V & 0x80)) |
22570 | { |
22571 | res = 0xFF; |
22572 | PRE_IO |
22573 | WRITE_BYTE_F(adr, res) |
22574 | POST_IO |
22575 | RET(20) |
22576 | } |
22577 | res = 0; |
22578 | PRE_IO |
22579 | WRITE_BYTE_F(adr, res) |
22580 | POST_IO |
22581 | RET(20) |
22582 | } |
22583 | |
22584 | // STCC |
22585 | OPCODE(0x59F9) |
22586 | { |
22587 | u32 adr, res; |
22588 | u32 src, dst; |
22589 | |
22590 | FETCH_LONG(adr); |
22591 | if (flag_V & 0x80) |
22592 | { |
22593 | res = 0xFF; |
22594 | PRE_IO |
22595 | WRITE_BYTE_F(adr, res) |
22596 | POST_IO |
22597 | RET(20) |
22598 | } |
22599 | res = 0; |
22600 | PRE_IO |
22601 | WRITE_BYTE_F(adr, res) |
22602 | POST_IO |
22603 | RET(20) |
22604 | } |
22605 | |
22606 | // STCC |
22607 | OPCODE(0x5AF9) |
22608 | { |
22609 | u32 adr, res; |
22610 | u32 src, dst; |
22611 | |
22612 | FETCH_LONG(adr); |
22613 | if (!(flag_N & 0x80)) |
22614 | { |
22615 | res = 0xFF; |
22616 | PRE_IO |
22617 | WRITE_BYTE_F(adr, res) |
22618 | POST_IO |
22619 | RET(20) |
22620 | } |
22621 | res = 0; |
22622 | PRE_IO |
22623 | WRITE_BYTE_F(adr, res) |
22624 | POST_IO |
22625 | RET(20) |
22626 | } |
22627 | |
22628 | // STCC |
22629 | OPCODE(0x5BF9) |
22630 | { |
22631 | u32 adr, res; |
22632 | u32 src, dst; |
22633 | |
22634 | FETCH_LONG(adr); |
22635 | if (flag_N & 0x80) |
22636 | { |
22637 | res = 0xFF; |
22638 | PRE_IO |
22639 | WRITE_BYTE_F(adr, res) |
22640 | POST_IO |
22641 | RET(20) |
22642 | } |
22643 | res = 0; |
22644 | PRE_IO |
22645 | WRITE_BYTE_F(adr, res) |
22646 | POST_IO |
22647 | RET(20) |
22648 | } |
22649 | |
22650 | // STCC |
22651 | OPCODE(0x5CF9) |
22652 | { |
22653 | u32 adr, res; |
22654 | u32 src, dst; |
22655 | |
22656 | FETCH_LONG(adr); |
22657 | if (!((flag_N ^ flag_V) & 0x80)) |
22658 | { |
22659 | res = 0xFF; |
22660 | PRE_IO |
22661 | WRITE_BYTE_F(adr, res) |
22662 | POST_IO |
22663 | RET(20) |
22664 | } |
22665 | res = 0; |
22666 | PRE_IO |
22667 | WRITE_BYTE_F(adr, res) |
22668 | POST_IO |
22669 | RET(20) |
22670 | } |
22671 | |
22672 | // STCC |
22673 | OPCODE(0x5DF9) |
22674 | { |
22675 | u32 adr, res; |
22676 | u32 src, dst; |
22677 | |
22678 | FETCH_LONG(adr); |
22679 | if ((flag_N ^ flag_V) & 0x80) |
22680 | { |
22681 | res = 0xFF; |
22682 | PRE_IO |
22683 | WRITE_BYTE_F(adr, res) |
22684 | POST_IO |
22685 | RET(20) |
22686 | } |
22687 | res = 0; |
22688 | PRE_IO |
22689 | WRITE_BYTE_F(adr, res) |
22690 | POST_IO |
22691 | RET(20) |
22692 | } |
22693 | |
22694 | // STCC |
22695 | OPCODE(0x5EF9) |
22696 | { |
22697 | u32 adr, res; |
22698 | u32 src, dst; |
22699 | |
22700 | FETCH_LONG(adr); |
22701 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
22702 | { |
22703 | res = 0xFF; |
22704 | PRE_IO |
22705 | WRITE_BYTE_F(adr, res) |
22706 | POST_IO |
22707 | RET(20) |
22708 | } |
22709 | res = 0; |
22710 | PRE_IO |
22711 | WRITE_BYTE_F(adr, res) |
22712 | POST_IO |
22713 | RET(20) |
22714 | } |
22715 | |
22716 | // STCC |
22717 | OPCODE(0x5FF9) |
22718 | { |
22719 | u32 adr, res; |
22720 | u32 src, dst; |
22721 | |
22722 | FETCH_LONG(adr); |
22723 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
22724 | { |
22725 | res = 0xFF; |
22726 | PRE_IO |
22727 | WRITE_BYTE_F(adr, res) |
22728 | POST_IO |
22729 | RET(20) |
22730 | } |
22731 | res = 0; |
22732 | PRE_IO |
22733 | WRITE_BYTE_F(adr, res) |
22734 | POST_IO |
22735 | RET(20) |
22736 | } |
22737 | |
22738 | // STCC |
22739 | OPCODE(0x50DF) |
22740 | { |
22741 | u32 adr, res; |
22742 | u32 src, dst; |
22743 | |
22744 | adr = AREG(7); |
22745 | AREG(7) += 2; |
22746 | res = 0xFF; |
22747 | PRE_IO |
22748 | WRITE_BYTE_F(adr, res) |
22749 | POST_IO |
22750 | RET(12) |
22751 | } |
22752 | |
22753 | // STCC |
22754 | OPCODE(0x51DF) |
22755 | { |
22756 | u32 adr, res; |
22757 | u32 src, dst; |
22758 | |
22759 | adr = AREG(7); |
22760 | AREG(7) += 2; |
22761 | res = 0; |
22762 | PRE_IO |
22763 | WRITE_BYTE_F(adr, res) |
22764 | POST_IO |
22765 | RET(12) |
22766 | } |
22767 | |
22768 | // STCC |
22769 | OPCODE(0x52DF) |
22770 | { |
22771 | u32 adr, res; |
22772 | u32 src, dst; |
22773 | |
22774 | adr = AREG(7); |
22775 | AREG(7) += 2; |
22776 | if (flag_NotZ && (!(flag_C & 0x100))) |
22777 | { |
22778 | res = 0xFF; |
22779 | PRE_IO |
22780 | WRITE_BYTE_F(adr, res) |
22781 | POST_IO |
22782 | RET(12) |
22783 | } |
22784 | res = 0; |
22785 | PRE_IO |
22786 | WRITE_BYTE_F(adr, res) |
22787 | POST_IO |
22788 | RET(12) |
22789 | } |
22790 | |
22791 | // STCC |
22792 | OPCODE(0x53DF) |
22793 | { |
22794 | u32 adr, res; |
22795 | u32 src, dst; |
22796 | |
22797 | adr = AREG(7); |
22798 | AREG(7) += 2; |
22799 | if ((!flag_NotZ) || (flag_C & 0x100)) |
22800 | { |
22801 | res = 0xFF; |
22802 | PRE_IO |
22803 | WRITE_BYTE_F(adr, res) |
22804 | POST_IO |
22805 | RET(12) |
22806 | } |
22807 | res = 0; |
22808 | PRE_IO |
22809 | WRITE_BYTE_F(adr, res) |
22810 | POST_IO |
22811 | RET(12) |
22812 | } |
22813 | |
22814 | // STCC |
22815 | OPCODE(0x54DF) |
22816 | { |
22817 | u32 adr, res; |
22818 | u32 src, dst; |
22819 | |
22820 | adr = AREG(7); |
22821 | AREG(7) += 2; |
22822 | if (!(flag_C & 0x100)) |
22823 | { |
22824 | res = 0xFF; |
22825 | PRE_IO |
22826 | WRITE_BYTE_F(adr, res) |
22827 | POST_IO |
22828 | RET(12) |
22829 | } |
22830 | res = 0; |
22831 | PRE_IO |
22832 | WRITE_BYTE_F(adr, res) |
22833 | POST_IO |
22834 | RET(12) |
22835 | } |
22836 | |
22837 | // STCC |
22838 | OPCODE(0x55DF) |
22839 | { |
22840 | u32 adr, res; |
22841 | u32 src, dst; |
22842 | |
22843 | adr = AREG(7); |
22844 | AREG(7) += 2; |
22845 | if (flag_C & 0x100) |
22846 | { |
22847 | res = 0xFF; |
22848 | PRE_IO |
22849 | WRITE_BYTE_F(adr, res) |
22850 | POST_IO |
22851 | RET(12) |
22852 | } |
22853 | res = 0; |
22854 | PRE_IO |
22855 | WRITE_BYTE_F(adr, res) |
22856 | POST_IO |
22857 | RET(12) |
22858 | } |
22859 | |
22860 | // STCC |
22861 | OPCODE(0x56DF) |
22862 | { |
22863 | u32 adr, res; |
22864 | u32 src, dst; |
22865 | |
22866 | adr = AREG(7); |
22867 | AREG(7) += 2; |
22868 | if (flag_NotZ) |
22869 | { |
22870 | res = 0xFF; |
22871 | PRE_IO |
22872 | WRITE_BYTE_F(adr, res) |
22873 | POST_IO |
22874 | RET(12) |
22875 | } |
22876 | res = 0; |
22877 | PRE_IO |
22878 | WRITE_BYTE_F(adr, res) |
22879 | POST_IO |
22880 | RET(12) |
22881 | } |
22882 | |
22883 | // STCC |
22884 | OPCODE(0x57DF) |
22885 | { |
22886 | u32 adr, res; |
22887 | u32 src, dst; |
22888 | |
22889 | adr = AREG(7); |
22890 | AREG(7) += 2; |
22891 | if (!flag_NotZ) |
22892 | { |
22893 | res = 0xFF; |
22894 | PRE_IO |
22895 | WRITE_BYTE_F(adr, res) |
22896 | POST_IO |
22897 | RET(12) |
22898 | } |
22899 | res = 0; |
22900 | PRE_IO |
22901 | WRITE_BYTE_F(adr, res) |
22902 | POST_IO |
22903 | RET(12) |
22904 | } |
22905 | |
22906 | // STCC |
22907 | OPCODE(0x58DF) |
22908 | { |
22909 | u32 adr, res; |
22910 | u32 src, dst; |
22911 | |
22912 | adr = AREG(7); |
22913 | AREG(7) += 2; |
22914 | if (!(flag_V & 0x80)) |
22915 | { |
22916 | res = 0xFF; |
22917 | PRE_IO |
22918 | WRITE_BYTE_F(adr, res) |
22919 | POST_IO |
22920 | RET(12) |
22921 | } |
22922 | res = 0; |
22923 | PRE_IO |
22924 | WRITE_BYTE_F(adr, res) |
22925 | POST_IO |
22926 | RET(12) |
22927 | } |
22928 | |
22929 | // STCC |
22930 | OPCODE(0x59DF) |
22931 | { |
22932 | u32 adr, res; |
22933 | u32 src, dst; |
22934 | |
22935 | adr = AREG(7); |
22936 | AREG(7) += 2; |
22937 | if (flag_V & 0x80) |
22938 | { |
22939 | res = 0xFF; |
22940 | PRE_IO |
22941 | WRITE_BYTE_F(adr, res) |
22942 | POST_IO |
22943 | RET(12) |
22944 | } |
22945 | res = 0; |
22946 | PRE_IO |
22947 | WRITE_BYTE_F(adr, res) |
22948 | POST_IO |
22949 | RET(12) |
22950 | } |
22951 | |
22952 | // STCC |
22953 | OPCODE(0x5ADF) |
22954 | { |
22955 | u32 adr, res; |
22956 | u32 src, dst; |
22957 | |
22958 | adr = AREG(7); |
22959 | AREG(7) += 2; |
22960 | if (!(flag_N & 0x80)) |
22961 | { |
22962 | res = 0xFF; |
22963 | PRE_IO |
22964 | WRITE_BYTE_F(adr, res) |
22965 | POST_IO |
22966 | RET(12) |
22967 | } |
22968 | res = 0; |
22969 | PRE_IO |
22970 | WRITE_BYTE_F(adr, res) |
22971 | POST_IO |
22972 | RET(12) |
22973 | } |
22974 | |
22975 | // STCC |
22976 | OPCODE(0x5BDF) |
22977 | { |
22978 | u32 adr, res; |
22979 | u32 src, dst; |
22980 | |
22981 | adr = AREG(7); |
22982 | AREG(7) += 2; |
22983 | if (flag_N & 0x80) |
22984 | { |
22985 | res = 0xFF; |
22986 | PRE_IO |
22987 | WRITE_BYTE_F(adr, res) |
22988 | POST_IO |
22989 | RET(12) |
22990 | } |
22991 | res = 0; |
22992 | PRE_IO |
22993 | WRITE_BYTE_F(adr, res) |
22994 | POST_IO |
22995 | RET(12) |
22996 | } |
22997 | |
22998 | // STCC |
22999 | OPCODE(0x5CDF) |
23000 | { |
23001 | u32 adr, res; |
23002 | u32 src, dst; |
23003 | |
23004 | adr = AREG(7); |
23005 | AREG(7) += 2; |
23006 | if (!((flag_N ^ flag_V) & 0x80)) |
23007 | { |
23008 | res = 0xFF; |
23009 | PRE_IO |
23010 | WRITE_BYTE_F(adr, res) |
23011 | POST_IO |
23012 | RET(12) |
23013 | } |
23014 | res = 0; |
23015 | PRE_IO |
23016 | WRITE_BYTE_F(adr, res) |
23017 | POST_IO |
23018 | RET(12) |
23019 | } |
23020 | |
23021 | // STCC |
23022 | OPCODE(0x5DDF) |
23023 | { |
23024 | u32 adr, res; |
23025 | u32 src, dst; |
23026 | |
23027 | adr = AREG(7); |
23028 | AREG(7) += 2; |
23029 | if ((flag_N ^ flag_V) & 0x80) |
23030 | { |
23031 | res = 0xFF; |
23032 | PRE_IO |
23033 | WRITE_BYTE_F(adr, res) |
23034 | POST_IO |
23035 | RET(12) |
23036 | } |
23037 | res = 0; |
23038 | PRE_IO |
23039 | WRITE_BYTE_F(adr, res) |
23040 | POST_IO |
23041 | RET(12) |
23042 | } |
23043 | |
23044 | // STCC |
23045 | OPCODE(0x5EDF) |
23046 | { |
23047 | u32 adr, res; |
23048 | u32 src, dst; |
23049 | |
23050 | adr = AREG(7); |
23051 | AREG(7) += 2; |
23052 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23053 | { |
23054 | res = 0xFF; |
23055 | PRE_IO |
23056 | WRITE_BYTE_F(adr, res) |
23057 | POST_IO |
23058 | RET(12) |
23059 | } |
23060 | res = 0; |
23061 | PRE_IO |
23062 | WRITE_BYTE_F(adr, res) |
23063 | POST_IO |
23064 | RET(12) |
23065 | } |
23066 | |
23067 | // STCC |
23068 | OPCODE(0x5FDF) |
23069 | { |
23070 | u32 adr, res; |
23071 | u32 src, dst; |
23072 | |
23073 | adr = AREG(7); |
23074 | AREG(7) += 2; |
23075 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23076 | { |
23077 | res = 0xFF; |
23078 | PRE_IO |
23079 | WRITE_BYTE_F(adr, res) |
23080 | POST_IO |
23081 | RET(12) |
23082 | } |
23083 | res = 0; |
23084 | PRE_IO |
23085 | WRITE_BYTE_F(adr, res) |
23086 | POST_IO |
23087 | RET(12) |
23088 | } |
23089 | |
23090 | // STCC |
23091 | OPCODE(0x50E7) |
23092 | { |
23093 | u32 adr, res; |
23094 | u32 src, dst; |
23095 | |
23096 | adr = AREG(7) - 2; |
23097 | AREG(7) = adr; |
23098 | res = 0xFF; |
23099 | PRE_IO |
23100 | WRITE_BYTE_F(adr, res) |
23101 | POST_IO |
23102 | RET(14) |
23103 | } |
23104 | |
23105 | // STCC |
23106 | OPCODE(0x51E7) |
23107 | { |
23108 | u32 adr, res; |
23109 | u32 src, dst; |
23110 | |
23111 | adr = AREG(7) - 2; |
23112 | AREG(7) = adr; |
23113 | res = 0; |
23114 | PRE_IO |
23115 | WRITE_BYTE_F(adr, res) |
23116 | POST_IO |
23117 | RET(14) |
23118 | } |
23119 | |
23120 | // STCC |
23121 | OPCODE(0x52E7) |
23122 | { |
23123 | u32 adr, res; |
23124 | u32 src, dst; |
23125 | |
23126 | adr = AREG(7) - 2; |
23127 | AREG(7) = adr; |
23128 | if (flag_NotZ && (!(flag_C & 0x100))) |
23129 | { |
23130 | res = 0xFF; |
23131 | PRE_IO |
23132 | WRITE_BYTE_F(adr, res) |
23133 | POST_IO |
23134 | RET(14) |
23135 | } |
23136 | res = 0; |
23137 | PRE_IO |
23138 | WRITE_BYTE_F(adr, res) |
23139 | POST_IO |
23140 | RET(14) |
23141 | } |
23142 | |
23143 | // STCC |
23144 | OPCODE(0x53E7) |
23145 | { |
23146 | u32 adr, res; |
23147 | u32 src, dst; |
23148 | |
23149 | adr = AREG(7) - 2; |
23150 | AREG(7) = adr; |
23151 | if ((!flag_NotZ) || (flag_C & 0x100)) |
23152 | { |
23153 | res = 0xFF; |
23154 | PRE_IO |
23155 | WRITE_BYTE_F(adr, res) |
23156 | POST_IO |
23157 | RET(14) |
23158 | } |
23159 | res = 0; |
23160 | PRE_IO |
23161 | WRITE_BYTE_F(adr, res) |
23162 | POST_IO |
23163 | RET(14) |
23164 | } |
23165 | |
23166 | // STCC |
23167 | OPCODE(0x54E7) |
23168 | { |
23169 | u32 adr, res; |
23170 | u32 src, dst; |
23171 | |
23172 | adr = AREG(7) - 2; |
23173 | AREG(7) = adr; |
23174 | if (!(flag_C & 0x100)) |
23175 | { |
23176 | res = 0xFF; |
23177 | PRE_IO |
23178 | WRITE_BYTE_F(adr, res) |
23179 | POST_IO |
23180 | RET(14) |
23181 | } |
23182 | res = 0; |
23183 | PRE_IO |
23184 | WRITE_BYTE_F(adr, res) |
23185 | POST_IO |
23186 | RET(14) |
23187 | } |
23188 | |
23189 | // STCC |
23190 | OPCODE(0x55E7) |
23191 | { |
23192 | u32 adr, res; |
23193 | u32 src, dst; |
23194 | |
23195 | adr = AREG(7) - 2; |
23196 | AREG(7) = adr; |
23197 | if (flag_C & 0x100) |
23198 | { |
23199 | res = 0xFF; |
23200 | PRE_IO |
23201 | WRITE_BYTE_F(adr, res) |
23202 | POST_IO |
23203 | RET(14) |
23204 | } |
23205 | res = 0; |
23206 | PRE_IO |
23207 | WRITE_BYTE_F(adr, res) |
23208 | POST_IO |
23209 | RET(14) |
23210 | } |
23211 | |
23212 | // STCC |
23213 | OPCODE(0x56E7) |
23214 | { |
23215 | u32 adr, res; |
23216 | u32 src, dst; |
23217 | |
23218 | adr = AREG(7) - 2; |
23219 | AREG(7) = adr; |
23220 | if (flag_NotZ) |
23221 | { |
23222 | res = 0xFF; |
23223 | PRE_IO |
23224 | WRITE_BYTE_F(adr, res) |
23225 | POST_IO |
23226 | RET(14) |
23227 | } |
23228 | res = 0; |
23229 | PRE_IO |
23230 | WRITE_BYTE_F(adr, res) |
23231 | POST_IO |
23232 | RET(14) |
23233 | } |
23234 | |
23235 | // STCC |
23236 | OPCODE(0x57E7) |
23237 | { |
23238 | u32 adr, res; |
23239 | u32 src, dst; |
23240 | |
23241 | adr = AREG(7) - 2; |
23242 | AREG(7) = adr; |
23243 | if (!flag_NotZ) |
23244 | { |
23245 | res = 0xFF; |
23246 | PRE_IO |
23247 | WRITE_BYTE_F(adr, res) |
23248 | POST_IO |
23249 | RET(14) |
23250 | } |
23251 | res = 0; |
23252 | PRE_IO |
23253 | WRITE_BYTE_F(adr, res) |
23254 | POST_IO |
23255 | RET(14) |
23256 | } |
23257 | |
23258 | // STCC |
23259 | OPCODE(0x58E7) |
23260 | { |
23261 | u32 adr, res; |
23262 | u32 src, dst; |
23263 | |
23264 | adr = AREG(7) - 2; |
23265 | AREG(7) = adr; |
23266 | if (!(flag_V & 0x80)) |
23267 | { |
23268 | res = 0xFF; |
23269 | PRE_IO |
23270 | WRITE_BYTE_F(adr, res) |
23271 | POST_IO |
23272 | RET(14) |
23273 | } |
23274 | res = 0; |
23275 | PRE_IO |
23276 | WRITE_BYTE_F(adr, res) |
23277 | POST_IO |
23278 | RET(14) |
23279 | } |
23280 | |
23281 | // STCC |
23282 | OPCODE(0x59E7) |
23283 | { |
23284 | u32 adr, res; |
23285 | u32 src, dst; |
23286 | |
23287 | adr = AREG(7) - 2; |
23288 | AREG(7) = adr; |
23289 | if (flag_V & 0x80) |
23290 | { |
23291 | res = 0xFF; |
23292 | PRE_IO |
23293 | WRITE_BYTE_F(adr, res) |
23294 | POST_IO |
23295 | RET(14) |
23296 | } |
23297 | res = 0; |
23298 | PRE_IO |
23299 | WRITE_BYTE_F(adr, res) |
23300 | POST_IO |
23301 | RET(14) |
23302 | } |
23303 | |
23304 | // STCC |
23305 | OPCODE(0x5AE7) |
23306 | { |
23307 | u32 adr, res; |
23308 | u32 src, dst; |
23309 | |
23310 | adr = AREG(7) - 2; |
23311 | AREG(7) = adr; |
23312 | if (!(flag_N & 0x80)) |
23313 | { |
23314 | res = 0xFF; |
23315 | PRE_IO |
23316 | WRITE_BYTE_F(adr, res) |
23317 | POST_IO |
23318 | RET(14) |
23319 | } |
23320 | res = 0; |
23321 | PRE_IO |
23322 | WRITE_BYTE_F(adr, res) |
23323 | POST_IO |
23324 | RET(14) |
23325 | } |
23326 | |
23327 | // STCC |
23328 | OPCODE(0x5BE7) |
23329 | { |
23330 | u32 adr, res; |
23331 | u32 src, dst; |
23332 | |
23333 | adr = AREG(7) - 2; |
23334 | AREG(7) = adr; |
23335 | if (flag_N & 0x80) |
23336 | { |
23337 | res = 0xFF; |
23338 | PRE_IO |
23339 | WRITE_BYTE_F(adr, res) |
23340 | POST_IO |
23341 | RET(14) |
23342 | } |
23343 | res = 0; |
23344 | PRE_IO |
23345 | WRITE_BYTE_F(adr, res) |
23346 | POST_IO |
23347 | RET(14) |
23348 | } |
23349 | |
23350 | // STCC |
23351 | OPCODE(0x5CE7) |
23352 | { |
23353 | u32 adr, res; |
23354 | u32 src, dst; |
23355 | |
23356 | adr = AREG(7) - 2; |
23357 | AREG(7) = adr; |
23358 | if (!((flag_N ^ flag_V) & 0x80)) |
23359 | { |
23360 | res = 0xFF; |
23361 | PRE_IO |
23362 | WRITE_BYTE_F(adr, res) |
23363 | POST_IO |
23364 | RET(14) |
23365 | } |
23366 | res = 0; |
23367 | PRE_IO |
23368 | WRITE_BYTE_F(adr, res) |
23369 | POST_IO |
23370 | RET(14) |
23371 | } |
23372 | |
23373 | // STCC |
23374 | OPCODE(0x5DE7) |
23375 | { |
23376 | u32 adr, res; |
23377 | u32 src, dst; |
23378 | |
23379 | adr = AREG(7) - 2; |
23380 | AREG(7) = adr; |
23381 | if ((flag_N ^ flag_V) & 0x80) |
23382 | { |
23383 | res = 0xFF; |
23384 | PRE_IO |
23385 | WRITE_BYTE_F(adr, res) |
23386 | POST_IO |
23387 | RET(14) |
23388 | } |
23389 | res = 0; |
23390 | PRE_IO |
23391 | WRITE_BYTE_F(adr, res) |
23392 | POST_IO |
23393 | RET(14) |
23394 | } |
23395 | |
23396 | // STCC |
23397 | OPCODE(0x5EE7) |
23398 | { |
23399 | u32 adr, res; |
23400 | u32 src, dst; |
23401 | |
23402 | adr = AREG(7) - 2; |
23403 | AREG(7) = adr; |
23404 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23405 | { |
23406 | res = 0xFF; |
23407 | PRE_IO |
23408 | WRITE_BYTE_F(adr, res) |
23409 | POST_IO |
23410 | RET(14) |
23411 | } |
23412 | res = 0; |
23413 | PRE_IO |
23414 | WRITE_BYTE_F(adr, res) |
23415 | POST_IO |
23416 | RET(14) |
23417 | } |
23418 | |
23419 | // STCC |
23420 | OPCODE(0x5FE7) |
23421 | { |
23422 | u32 adr, res; |
23423 | u32 src, dst; |
23424 | |
23425 | adr = AREG(7) - 2; |
23426 | AREG(7) = adr; |
23427 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23428 | { |
23429 | res = 0xFF; |
23430 | PRE_IO |
23431 | WRITE_BYTE_F(adr, res) |
23432 | POST_IO |
23433 | RET(14) |
23434 | } |
23435 | res = 0; |
23436 | PRE_IO |
23437 | WRITE_BYTE_F(adr, res) |
23438 | POST_IO |
23439 | RET(14) |
23440 | } |
23441 | |
23442 | // DBCC |
23443 | OPCODE(0x50C8) |
23444 | { |
23445 | u32 adr, res; |
23446 | u32 src, dst; |
23447 | |
23448 | PC++; |
23449 | RET(12) |
23450 | } |
23451 | |
23452 | // DBCC |
23453 | OPCODE(0x51C8) |
23454 | { |
23455 | u32 adr, res; |
23456 | u32 src, dst; |
23457 | |
ecc8036e |
23458 | NOT_POLLING |
23459 | |
70357ce5 |
23460 | res = DREGu16((Opcode >> 0) & 7); |
23461 | res--; |
23462 | DREGu16((Opcode >> 0) & 7) = res; |
23463 | if ((s32)res != -1) |
23464 | { |
23465 | u32 newPC; |
23466 | |
be26eb23 |
23467 | newPC = GET_PC; |
70357ce5 |
23468 | newPC += GET_SWORD; |
23469 | SET_PC(newPC); |
23470 | CHECK_BRANCH_EXCEPTION(newPC) |
23471 | RET(10) |
23472 | } |
23473 | PC++; |
23474 | RET(14) |
23475 | } |
23476 | |
23477 | // DBCC |
23478 | OPCODE(0x52C8) |
23479 | { |
23480 | u32 adr, res; |
23481 | u32 src, dst; |
23482 | |
ecc8036e |
23483 | NOT_POLLING |
23484 | |
70357ce5 |
23485 | if ((!flag_NotZ) || (flag_C & 0x100)) |
23486 | { |
23487 | res = DREGu16((Opcode >> 0) & 7); |
23488 | res--; |
23489 | DREGu16((Opcode >> 0) & 7) = res; |
23490 | if ((s32)res != -1) |
23491 | { |
23492 | u32 newPC; |
23493 | |
be26eb23 |
23494 | newPC = GET_PC; |
70357ce5 |
23495 | newPC += GET_SWORD; |
23496 | SET_PC(newPC); |
23497 | CHECK_BRANCH_EXCEPTION(newPC) |
23498 | RET(10) |
23499 | } |
23500 | } |
23501 | else |
23502 | { |
23503 | PC++; |
23504 | RET(12) |
23505 | } |
23506 | PC++; |
23507 | RET(14) |
23508 | } |
23509 | |
23510 | // DBCC |
23511 | OPCODE(0x53C8) |
23512 | { |
23513 | u32 adr, res; |
23514 | u32 src, dst; |
23515 | |
ecc8036e |
23516 | NOT_POLLING |
23517 | |
70357ce5 |
23518 | if (flag_NotZ && (!(flag_C & 0x100))) |
23519 | { |
23520 | res = DREGu16((Opcode >> 0) & 7); |
23521 | res--; |
23522 | DREGu16((Opcode >> 0) & 7) = res; |
23523 | if ((s32)res != -1) |
23524 | { |
23525 | u32 newPC; |
23526 | |
be26eb23 |
23527 | newPC = GET_PC; |
70357ce5 |
23528 | newPC += GET_SWORD; |
23529 | SET_PC(newPC); |
23530 | CHECK_BRANCH_EXCEPTION(newPC) |
23531 | RET(10) |
23532 | } |
23533 | } |
23534 | else |
23535 | { |
23536 | PC++; |
23537 | RET(12) |
23538 | } |
23539 | PC++; |
23540 | RET(14) |
23541 | } |
23542 | |
23543 | // DBCC |
23544 | OPCODE(0x54C8) |
23545 | { |
23546 | u32 adr, res; |
23547 | u32 src, dst; |
23548 | |
ecc8036e |
23549 | NOT_POLLING |
23550 | |
70357ce5 |
23551 | if (flag_C & 0x100) |
23552 | { |
23553 | res = DREGu16((Opcode >> 0) & 7); |
23554 | res--; |
23555 | DREGu16((Opcode >> 0) & 7) = res; |
23556 | if ((s32)res != -1) |
23557 | { |
23558 | u32 newPC; |
23559 | |
be26eb23 |
23560 | newPC = GET_PC; |
70357ce5 |
23561 | newPC += GET_SWORD; |
23562 | SET_PC(newPC); |
23563 | CHECK_BRANCH_EXCEPTION(newPC) |
23564 | RET(10) |
23565 | } |
23566 | } |
23567 | else |
23568 | { |
23569 | PC++; |
23570 | RET(12) |
23571 | } |
23572 | PC++; |
23573 | RET(14) |
23574 | } |
23575 | |
23576 | // DBCC |
23577 | OPCODE(0x55C8) |
23578 | { |
23579 | u32 adr, res; |
23580 | u32 src, dst; |
23581 | |
ecc8036e |
23582 | NOT_POLLING |
23583 | |
70357ce5 |
23584 | if (!(flag_C & 0x100)) |
23585 | { |
23586 | res = DREGu16((Opcode >> 0) & 7); |
23587 | res--; |
23588 | DREGu16((Opcode >> 0) & 7) = res; |
23589 | if ((s32)res != -1) |
23590 | { |
23591 | u32 newPC; |
23592 | |
be26eb23 |
23593 | newPC = GET_PC; |
70357ce5 |
23594 | newPC += GET_SWORD; |
23595 | SET_PC(newPC); |
23596 | CHECK_BRANCH_EXCEPTION(newPC) |
23597 | RET(10) |
23598 | } |
23599 | } |
23600 | else |
23601 | { |
23602 | PC++; |
23603 | RET(12) |
23604 | } |
23605 | PC++; |
23606 | RET(14) |
23607 | } |
23608 | |
23609 | // DBCC |
23610 | OPCODE(0x56C8) |
23611 | { |
23612 | u32 adr, res; |
23613 | u32 src, dst; |
23614 | |
ecc8036e |
23615 | NOT_POLLING |
23616 | |
70357ce5 |
23617 | if (!flag_NotZ) |
23618 | { |
23619 | res = DREGu16((Opcode >> 0) & 7); |
23620 | res--; |
23621 | DREGu16((Opcode >> 0) & 7) = res; |
23622 | if ((s32)res != -1) |
23623 | { |
23624 | u32 newPC; |
23625 | |
be26eb23 |
23626 | newPC = GET_PC; |
70357ce5 |
23627 | newPC += GET_SWORD; |
23628 | SET_PC(newPC); |
23629 | CHECK_BRANCH_EXCEPTION(newPC) |
23630 | RET(10) |
23631 | } |
23632 | } |
23633 | else |
23634 | { |
23635 | PC++; |
23636 | RET(12) |
23637 | } |
23638 | PC++; |
23639 | RET(14) |
23640 | } |
23641 | |
23642 | // DBCC |
23643 | OPCODE(0x57C8) |
23644 | { |
23645 | u32 adr, res; |
23646 | u32 src, dst; |
23647 | |
ecc8036e |
23648 | NOT_POLLING |
23649 | |
70357ce5 |
23650 | if (flag_NotZ) |
23651 | { |
23652 | res = DREGu16((Opcode >> 0) & 7); |
23653 | res--; |
23654 | DREGu16((Opcode >> 0) & 7) = res; |
23655 | if ((s32)res != -1) |
23656 | { |
23657 | u32 newPC; |
23658 | |
be26eb23 |
23659 | newPC = GET_PC; |
70357ce5 |
23660 | newPC += GET_SWORD; |
23661 | SET_PC(newPC); |
23662 | CHECK_BRANCH_EXCEPTION(newPC) |
23663 | RET(10) |
23664 | } |
23665 | } |
23666 | else |
23667 | { |
23668 | PC++; |
23669 | RET(12) |
23670 | } |
23671 | PC++; |
23672 | RET(14) |
23673 | } |
23674 | |
23675 | // DBCC |
23676 | OPCODE(0x58C8) |
23677 | { |
23678 | u32 adr, res; |
23679 | u32 src, dst; |
23680 | |
ecc8036e |
23681 | NOT_POLLING |
23682 | |
70357ce5 |
23683 | if (flag_V & 0x80) |
23684 | { |
23685 | res = DREGu16((Opcode >> 0) & 7); |
23686 | res--; |
23687 | DREGu16((Opcode >> 0) & 7) = res; |
23688 | if ((s32)res != -1) |
23689 | { |
23690 | u32 newPC; |
23691 | |
be26eb23 |
23692 | newPC = GET_PC; |
70357ce5 |
23693 | newPC += GET_SWORD; |
23694 | SET_PC(newPC); |
23695 | CHECK_BRANCH_EXCEPTION(newPC) |
23696 | RET(10) |
23697 | } |
23698 | } |
23699 | else |
23700 | { |
23701 | PC++; |
23702 | RET(12) |
23703 | } |
23704 | PC++; |
23705 | RET(14) |
23706 | } |
23707 | |
23708 | // DBCC |
23709 | OPCODE(0x59C8) |
23710 | { |
23711 | u32 adr, res; |
23712 | u32 src, dst; |
23713 | |
ecc8036e |
23714 | NOT_POLLING |
23715 | |
70357ce5 |
23716 | if (!(flag_V & 0x80)) |
23717 | { |
23718 | res = DREGu16((Opcode >> 0) & 7); |
23719 | res--; |
23720 | DREGu16((Opcode >> 0) & 7) = res; |
23721 | if ((s32)res != -1) |
23722 | { |
23723 | u32 newPC; |
23724 | |
be26eb23 |
23725 | newPC = GET_PC; |
70357ce5 |
23726 | newPC += GET_SWORD; |
23727 | SET_PC(newPC); |
23728 | CHECK_BRANCH_EXCEPTION(newPC) |
23729 | RET(10) |
23730 | } |
23731 | } |
23732 | else |
23733 | { |
23734 | PC++; |
23735 | RET(12) |
23736 | } |
23737 | PC++; |
23738 | RET(14) |
23739 | } |
23740 | |
23741 | // DBCC |
23742 | OPCODE(0x5AC8) |
23743 | { |
23744 | u32 adr, res; |
23745 | u32 src, dst; |
23746 | |
ecc8036e |
23747 | NOT_POLLING |
23748 | |
70357ce5 |
23749 | if (flag_N & 0x80) |
23750 | { |
23751 | res = DREGu16((Opcode >> 0) & 7); |
23752 | res--; |
23753 | DREGu16((Opcode >> 0) & 7) = res; |
23754 | if ((s32)res != -1) |
23755 | { |
23756 | u32 newPC; |
23757 | |
be26eb23 |
23758 | newPC = GET_PC; |
70357ce5 |
23759 | newPC += GET_SWORD; |
23760 | SET_PC(newPC); |
23761 | CHECK_BRANCH_EXCEPTION(newPC) |
23762 | RET(10) |
23763 | } |
23764 | } |
23765 | else |
23766 | { |
23767 | PC++; |
23768 | RET(12) |
23769 | } |
23770 | PC++; |
23771 | RET(14) |
23772 | } |
23773 | |
23774 | // DBCC |
23775 | OPCODE(0x5BC8) |
23776 | { |
23777 | u32 adr, res; |
23778 | u32 src, dst; |
23779 | |
ecc8036e |
23780 | NOT_POLLING |
23781 | |
70357ce5 |
23782 | if (!(flag_N & 0x80)) |
23783 | { |
23784 | res = DREGu16((Opcode >> 0) & 7); |
23785 | res--; |
23786 | DREGu16((Opcode >> 0) & 7) = res; |
23787 | if ((s32)res != -1) |
23788 | { |
23789 | u32 newPC; |
23790 | |
be26eb23 |
23791 | newPC = GET_PC; |
70357ce5 |
23792 | newPC += GET_SWORD; |
23793 | SET_PC(newPC); |
23794 | CHECK_BRANCH_EXCEPTION(newPC) |
23795 | RET(10) |
23796 | } |
23797 | } |
23798 | else |
23799 | { |
23800 | PC++; |
23801 | RET(12) |
23802 | } |
23803 | PC++; |
23804 | RET(14) |
23805 | } |
23806 | |
23807 | // DBCC |
23808 | OPCODE(0x5CC8) |
23809 | { |
23810 | u32 adr, res; |
23811 | u32 src, dst; |
23812 | |
ecc8036e |
23813 | NOT_POLLING |
23814 | |
70357ce5 |
23815 | if ((flag_N ^ flag_V) & 0x80) |
23816 | { |
23817 | res = DREGu16((Opcode >> 0) & 7); |
23818 | res--; |
23819 | DREGu16((Opcode >> 0) & 7) = res; |
23820 | if ((s32)res != -1) |
23821 | { |
23822 | u32 newPC; |
23823 | |
be26eb23 |
23824 | newPC = GET_PC; |
70357ce5 |
23825 | newPC += GET_SWORD; |
23826 | SET_PC(newPC); |
23827 | CHECK_BRANCH_EXCEPTION(newPC) |
23828 | RET(10) |
23829 | } |
23830 | } |
23831 | else |
23832 | { |
23833 | PC++; |
23834 | RET(12) |
23835 | } |
23836 | PC++; |
23837 | RET(14) |
23838 | } |
23839 | |
23840 | // DBCC |
23841 | OPCODE(0x5DC8) |
23842 | { |
23843 | u32 adr, res; |
23844 | u32 src, dst; |
23845 | |
ecc8036e |
23846 | NOT_POLLING |
23847 | |
70357ce5 |
23848 | if (!((flag_N ^ flag_V) & 0x80)) |
23849 | { |
23850 | res = DREGu16((Opcode >> 0) & 7); |
23851 | res--; |
23852 | DREGu16((Opcode >> 0) & 7) = res; |
23853 | if ((s32)res != -1) |
23854 | { |
23855 | u32 newPC; |
23856 | |
be26eb23 |
23857 | newPC = GET_PC; |
70357ce5 |
23858 | newPC += GET_SWORD; |
23859 | SET_PC(newPC); |
23860 | CHECK_BRANCH_EXCEPTION(newPC) |
23861 | RET(10) |
23862 | } |
23863 | } |
23864 | else |
23865 | { |
23866 | PC++; |
23867 | RET(12) |
23868 | } |
23869 | PC++; |
23870 | RET(14) |
23871 | } |
23872 | |
23873 | // DBCC |
23874 | OPCODE(0x5EC8) |
23875 | { |
23876 | u32 adr, res; |
23877 | u32 src, dst; |
23878 | |
ecc8036e |
23879 | NOT_POLLING |
23880 | |
70357ce5 |
23881 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
23882 | { |
23883 | res = DREGu16((Opcode >> 0) & 7); |
23884 | res--; |
23885 | DREGu16((Opcode >> 0) & 7) = res; |
23886 | if ((s32)res != -1) |
23887 | { |
23888 | u32 newPC; |
23889 | |
be26eb23 |
23890 | newPC = GET_PC; |
70357ce5 |
23891 | newPC += GET_SWORD; |
23892 | SET_PC(newPC); |
23893 | CHECK_BRANCH_EXCEPTION(newPC) |
23894 | RET(10) |
23895 | } |
23896 | } |
23897 | else |
23898 | { |
23899 | PC++; |
23900 | RET(12) |
23901 | } |
23902 | PC++; |
23903 | RET(14) |
23904 | } |
23905 | |
23906 | // DBCC |
23907 | OPCODE(0x5FC8) |
23908 | { |
23909 | u32 adr, res; |
23910 | u32 src, dst; |
23911 | |
ecc8036e |
23912 | NOT_POLLING |
23913 | |
70357ce5 |
23914 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
23915 | { |
23916 | res = DREGu16((Opcode >> 0) & 7); |
23917 | res--; |
23918 | DREGu16((Opcode >> 0) & 7) = res; |
23919 | if ((s32)res != -1) |
23920 | { |
23921 | u32 newPC; |
23922 | |
be26eb23 |
23923 | newPC = GET_PC; |
70357ce5 |
23924 | newPC += GET_SWORD; |
23925 | SET_PC(newPC); |
23926 | CHECK_BRANCH_EXCEPTION(newPC) |
23927 | RET(10) |
23928 | } |
23929 | } |
23930 | else |
23931 | { |
23932 | PC++; |
23933 | RET(12) |
23934 | } |
23935 | PC++; |
23936 | RET(14) |
23937 | } |
23938 | |
23939 | // ADDQ |
23940 | OPCODE(0x5000) |
23941 | { |
23942 | u32 adr, res; |
23943 | u32 src, dst; |
23944 | |
23945 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23946 | dst = DREGu8((Opcode >> 0) & 7); |
23947 | res = dst + src; |
23948 | flag_N = flag_X = flag_C = res; |
23949 | flag_V = (src ^ res) & (dst ^ res); |
23950 | flag_NotZ = res & 0xFF; |
23951 | DREGu8((Opcode >> 0) & 7) = res; |
23952 | RET(4) |
23953 | } |
23954 | |
23955 | // ADDQ |
23956 | OPCODE(0x5010) |
23957 | { |
23958 | u32 adr, res; |
23959 | u32 src, dst; |
23960 | |
23961 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23962 | adr = AREG((Opcode >> 0) & 7); |
23963 | PRE_IO |
23964 | READ_BYTE_F(adr, dst) |
23965 | res = dst + src; |
23966 | flag_N = flag_X = flag_C = res; |
23967 | flag_V = (src ^ res) & (dst ^ res); |
23968 | flag_NotZ = res & 0xFF; |
23969 | WRITE_BYTE_F(adr, res) |
23970 | POST_IO |
23971 | RET(12) |
23972 | } |
23973 | |
23974 | // ADDQ |
23975 | OPCODE(0x5018) |
23976 | { |
23977 | u32 adr, res; |
23978 | u32 src, dst; |
23979 | |
23980 | src = (((Opcode >> 9) - 1) & 7) + 1; |
23981 | adr = AREG((Opcode >> 0) & 7); |
23982 | AREG((Opcode >> 0) & 7) += 1; |
23983 | PRE_IO |
23984 | READ_BYTE_F(adr, dst) |
23985 | res = dst + src; |
23986 | flag_N = flag_X = flag_C = res; |
23987 | flag_V = (src ^ res) & (dst ^ res); |
23988 | flag_NotZ = res & 0xFF; |
23989 | WRITE_BYTE_F(adr, res) |
23990 | POST_IO |
23991 | RET(12) |
23992 | } |
23993 | |
23994 | // ADDQ |
23995 | OPCODE(0x5020) |
23996 | { |
23997 | u32 adr, res; |
23998 | u32 src, dst; |
23999 | |
24000 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24001 | adr = AREG((Opcode >> 0) & 7) - 1; |
24002 | AREG((Opcode >> 0) & 7) = adr; |
24003 | PRE_IO |
24004 | READ_BYTE_F(adr, dst) |
24005 | res = dst + src; |
24006 | flag_N = flag_X = flag_C = res; |
24007 | flag_V = (src ^ res) & (dst ^ res); |
24008 | flag_NotZ = res & 0xFF; |
24009 | WRITE_BYTE_F(adr, res) |
24010 | POST_IO |
24011 | RET(14) |
24012 | } |
24013 | |
24014 | // ADDQ |
24015 | OPCODE(0x5028) |
24016 | { |
24017 | u32 adr, res; |
24018 | u32 src, dst; |
24019 | |
24020 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24021 | FETCH_SWORD(adr); |
24022 | adr += AREG((Opcode >> 0) & 7); |
24023 | PRE_IO |
24024 | READ_BYTE_F(adr, dst) |
24025 | res = dst + src; |
24026 | flag_N = flag_X = flag_C = res; |
24027 | flag_V = (src ^ res) & (dst ^ res); |
24028 | flag_NotZ = res & 0xFF; |
24029 | WRITE_BYTE_F(adr, res) |
24030 | POST_IO |
24031 | RET(16) |
24032 | } |
24033 | |
24034 | // ADDQ |
24035 | OPCODE(0x5030) |
24036 | { |
24037 | u32 adr, res; |
24038 | u32 src, dst; |
24039 | |
24040 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24041 | adr = AREG((Opcode >> 0) & 7); |
24042 | DECODE_EXT_WORD |
24043 | PRE_IO |
24044 | READ_BYTE_F(adr, dst) |
24045 | res = dst + src; |
24046 | flag_N = flag_X = flag_C = res; |
24047 | flag_V = (src ^ res) & (dst ^ res); |
24048 | flag_NotZ = res & 0xFF; |
24049 | WRITE_BYTE_F(adr, res) |
24050 | POST_IO |
24051 | RET(18) |
24052 | } |
24053 | |
24054 | // ADDQ |
24055 | OPCODE(0x5038) |
24056 | { |
24057 | u32 adr, res; |
24058 | u32 src, dst; |
24059 | |
24060 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24061 | FETCH_SWORD(adr); |
24062 | PRE_IO |
24063 | READ_BYTE_F(adr, dst) |
24064 | res = dst + src; |
24065 | flag_N = flag_X = flag_C = res; |
24066 | flag_V = (src ^ res) & (dst ^ res); |
24067 | flag_NotZ = res & 0xFF; |
24068 | WRITE_BYTE_F(adr, res) |
24069 | POST_IO |
24070 | RET(16) |
24071 | } |
24072 | |
24073 | // ADDQ |
24074 | OPCODE(0x5039) |
24075 | { |
24076 | u32 adr, res; |
24077 | u32 src, dst; |
24078 | |
24079 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24080 | FETCH_LONG(adr); |
24081 | PRE_IO |
24082 | READ_BYTE_F(adr, dst) |
24083 | res = dst + src; |
24084 | flag_N = flag_X = flag_C = res; |
24085 | flag_V = (src ^ res) & (dst ^ res); |
24086 | flag_NotZ = res & 0xFF; |
24087 | WRITE_BYTE_F(adr, res) |
24088 | POST_IO |
24089 | RET(20) |
24090 | } |
24091 | |
24092 | // ADDQ |
24093 | OPCODE(0x501F) |
24094 | { |
24095 | u32 adr, res; |
24096 | u32 src, dst; |
24097 | |
24098 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24099 | adr = AREG(7); |
24100 | AREG(7) += 2; |
24101 | PRE_IO |
24102 | READ_BYTE_F(adr, dst) |
24103 | res = dst + src; |
24104 | flag_N = flag_X = flag_C = res; |
24105 | flag_V = (src ^ res) & (dst ^ res); |
24106 | flag_NotZ = res & 0xFF; |
24107 | WRITE_BYTE_F(adr, res) |
24108 | POST_IO |
24109 | RET(12) |
24110 | } |
24111 | |
24112 | // ADDQ |
24113 | OPCODE(0x5027) |
24114 | { |
24115 | u32 adr, res; |
24116 | u32 src, dst; |
24117 | |
24118 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24119 | adr = AREG(7) - 2; |
24120 | AREG(7) = adr; |
24121 | PRE_IO |
24122 | READ_BYTE_F(adr, dst) |
24123 | res = dst + src; |
24124 | flag_N = flag_X = flag_C = res; |
24125 | flag_V = (src ^ res) & (dst ^ res); |
24126 | flag_NotZ = res & 0xFF; |
24127 | WRITE_BYTE_F(adr, res) |
24128 | POST_IO |
24129 | RET(14) |
24130 | } |
24131 | |
24132 | // ADDQ |
24133 | OPCODE(0x5040) |
24134 | { |
24135 | u32 adr, res; |
24136 | u32 src, dst; |
24137 | |
24138 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24139 | dst = DREGu16((Opcode >> 0) & 7); |
24140 | res = dst + src; |
24141 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24142 | flag_N = flag_X = flag_C = res >> 8; |
24143 | flag_NotZ = res & 0xFFFF; |
24144 | DREGu16((Opcode >> 0) & 7) = res; |
24145 | RET(4) |
24146 | } |
24147 | |
24148 | // ADDQ |
24149 | OPCODE(0x5048) |
24150 | { |
24151 | u32 adr, res; |
24152 | u32 src, dst; |
24153 | |
24154 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24155 | dst = AREGu32((Opcode >> 0) & 7); |
24156 | res = dst + src; |
24157 | AREG((Opcode >> 0) & 7) = res; |
70357ce5 |
24158 | RET(8) |
70357ce5 |
24159 | } |
24160 | |
24161 | // ADDQ |
24162 | OPCODE(0x5050) |
24163 | { |
24164 | u32 adr, res; |
24165 | u32 src, dst; |
24166 | |
24167 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24168 | adr = AREG((Opcode >> 0) & 7); |
24169 | PRE_IO |
24170 | READ_WORD_F(adr, dst) |
24171 | res = dst + src; |
24172 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24173 | flag_N = flag_X = flag_C = res >> 8; |
24174 | flag_NotZ = res & 0xFFFF; |
24175 | WRITE_WORD_F(adr, res) |
24176 | POST_IO |
24177 | RET(12) |
24178 | } |
24179 | |
24180 | // ADDQ |
24181 | OPCODE(0x5058) |
24182 | { |
24183 | u32 adr, res; |
24184 | u32 src, dst; |
24185 | |
24186 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24187 | adr = AREG((Opcode >> 0) & 7); |
24188 | AREG((Opcode >> 0) & 7) += 2; |
24189 | PRE_IO |
24190 | READ_WORD_F(adr, dst) |
24191 | res = dst + src; |
24192 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24193 | flag_N = flag_X = flag_C = res >> 8; |
24194 | flag_NotZ = res & 0xFFFF; |
24195 | WRITE_WORD_F(adr, res) |
24196 | POST_IO |
24197 | RET(12) |
24198 | } |
24199 | |
24200 | // ADDQ |
24201 | OPCODE(0x5060) |
24202 | { |
24203 | u32 adr, res; |
24204 | u32 src, dst; |
24205 | |
24206 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24207 | adr = AREG((Opcode >> 0) & 7) - 2; |
24208 | AREG((Opcode >> 0) & 7) = adr; |
24209 | PRE_IO |
24210 | READ_WORD_F(adr, dst) |
24211 | res = dst + src; |
24212 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24213 | flag_N = flag_X = flag_C = res >> 8; |
24214 | flag_NotZ = res & 0xFFFF; |
24215 | WRITE_WORD_F(adr, res) |
24216 | POST_IO |
24217 | RET(14) |
24218 | } |
24219 | |
24220 | // ADDQ |
24221 | OPCODE(0x5068) |
24222 | { |
24223 | u32 adr, res; |
24224 | u32 src, dst; |
24225 | |
24226 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24227 | FETCH_SWORD(adr); |
24228 | adr += AREG((Opcode >> 0) & 7); |
24229 | PRE_IO |
24230 | READ_WORD_F(adr, dst) |
24231 | res = dst + src; |
24232 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24233 | flag_N = flag_X = flag_C = res >> 8; |
24234 | flag_NotZ = res & 0xFFFF; |
24235 | WRITE_WORD_F(adr, res) |
24236 | POST_IO |
24237 | RET(16) |
24238 | } |
24239 | |
24240 | // ADDQ |
24241 | OPCODE(0x5070) |
24242 | { |
24243 | u32 adr, res; |
24244 | u32 src, dst; |
24245 | |
24246 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24247 | adr = AREG((Opcode >> 0) & 7); |
24248 | DECODE_EXT_WORD |
24249 | PRE_IO |
24250 | READ_WORD_F(adr, dst) |
24251 | res = dst + src; |
24252 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24253 | flag_N = flag_X = flag_C = res >> 8; |
24254 | flag_NotZ = res & 0xFFFF; |
24255 | WRITE_WORD_F(adr, res) |
24256 | POST_IO |
24257 | RET(18) |
24258 | } |
24259 | |
24260 | // ADDQ |
24261 | OPCODE(0x5078) |
24262 | { |
24263 | u32 adr, res; |
24264 | u32 src, dst; |
24265 | |
24266 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24267 | FETCH_SWORD(adr); |
24268 | PRE_IO |
24269 | READ_WORD_F(adr, dst) |
24270 | res = dst + src; |
24271 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24272 | flag_N = flag_X = flag_C = res >> 8; |
24273 | flag_NotZ = res & 0xFFFF; |
24274 | WRITE_WORD_F(adr, res) |
24275 | POST_IO |
24276 | RET(16) |
24277 | } |
24278 | |
24279 | // ADDQ |
24280 | OPCODE(0x5079) |
24281 | { |
24282 | u32 adr, res; |
24283 | u32 src, dst; |
24284 | |
24285 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24286 | FETCH_LONG(adr); |
24287 | PRE_IO |
24288 | READ_WORD_F(adr, dst) |
24289 | res = dst + src; |
24290 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24291 | flag_N = flag_X = flag_C = res >> 8; |
24292 | flag_NotZ = res & 0xFFFF; |
24293 | WRITE_WORD_F(adr, res) |
24294 | POST_IO |
24295 | RET(20) |
24296 | } |
24297 | |
24298 | // ADDQ |
24299 | OPCODE(0x505F) |
24300 | { |
24301 | u32 adr, res; |
24302 | u32 src, dst; |
24303 | |
24304 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24305 | adr = AREG(7); |
24306 | AREG(7) += 2; |
24307 | PRE_IO |
24308 | READ_WORD_F(adr, dst) |
24309 | res = dst + src; |
24310 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24311 | flag_N = flag_X = flag_C = res >> 8; |
24312 | flag_NotZ = res & 0xFFFF; |
24313 | WRITE_WORD_F(adr, res) |
24314 | POST_IO |
24315 | RET(12) |
24316 | } |
24317 | |
24318 | // ADDQ |
24319 | OPCODE(0x5067) |
24320 | { |
24321 | u32 adr, res; |
24322 | u32 src, dst; |
24323 | |
24324 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24325 | adr = AREG(7) - 2; |
24326 | AREG(7) = adr; |
24327 | PRE_IO |
24328 | READ_WORD_F(adr, dst) |
24329 | res = dst + src; |
24330 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
24331 | flag_N = flag_X = flag_C = res >> 8; |
24332 | flag_NotZ = res & 0xFFFF; |
24333 | WRITE_WORD_F(adr, res) |
24334 | POST_IO |
24335 | RET(14) |
24336 | } |
24337 | |
24338 | // ADDQ |
24339 | OPCODE(0x5080) |
24340 | { |
24341 | u32 adr, res; |
24342 | u32 src, dst; |
24343 | |
24344 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24345 | dst = DREGu32((Opcode >> 0) & 7); |
24346 | res = dst + src; |
24347 | flag_NotZ = res; |
24348 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24349 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24350 | flag_N = res >> 24; |
24351 | DREGu32((Opcode >> 0) & 7) = res; |
24352 | RET(8) |
24353 | } |
24354 | |
24355 | // ADDQ |
24356 | OPCODE(0x5088) |
24357 | { |
24358 | u32 adr, res; |
24359 | u32 src, dst; |
24360 | |
24361 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24362 | dst = AREGu32((Opcode >> 0) & 7); |
24363 | res = dst + src; |
24364 | AREG((Opcode >> 0) & 7) = res; |
24365 | RET(8) |
24366 | } |
24367 | |
24368 | // ADDQ |
24369 | OPCODE(0x5090) |
24370 | { |
24371 | u32 adr, res; |
24372 | u32 src, dst; |
24373 | |
24374 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24375 | adr = AREG((Opcode >> 0) & 7); |
24376 | PRE_IO |
24377 | READ_LONG_F(adr, dst) |
24378 | res = dst + src; |
24379 | flag_NotZ = res; |
24380 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24381 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24382 | flag_N = res >> 24; |
24383 | WRITE_LONG_F(adr, res) |
24384 | POST_IO |
24385 | RET(20) |
24386 | } |
24387 | |
24388 | // ADDQ |
24389 | OPCODE(0x5098) |
24390 | { |
24391 | u32 adr, res; |
24392 | u32 src, dst; |
24393 | |
24394 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24395 | adr = AREG((Opcode >> 0) & 7); |
24396 | AREG((Opcode >> 0) & 7) += 4; |
24397 | PRE_IO |
24398 | READ_LONG_F(adr, dst) |
24399 | res = dst + src; |
24400 | flag_NotZ = res; |
24401 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24402 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24403 | flag_N = res >> 24; |
24404 | WRITE_LONG_F(adr, res) |
24405 | POST_IO |
24406 | RET(20) |
24407 | } |
24408 | |
24409 | // ADDQ |
24410 | OPCODE(0x50A0) |
24411 | { |
24412 | u32 adr, res; |
24413 | u32 src, dst; |
24414 | |
24415 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24416 | adr = AREG((Opcode >> 0) & 7) - 4; |
24417 | AREG((Opcode >> 0) & 7) = adr; |
24418 | PRE_IO |
24419 | READ_LONG_F(adr, dst) |
24420 | res = dst + src; |
24421 | flag_NotZ = res; |
24422 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24423 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24424 | flag_N = res >> 24; |
24425 | WRITE_LONG_F(adr, res) |
24426 | POST_IO |
24427 | RET(22) |
24428 | } |
24429 | |
24430 | // ADDQ |
24431 | OPCODE(0x50A8) |
24432 | { |
24433 | u32 adr, res; |
24434 | u32 src, dst; |
24435 | |
24436 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24437 | FETCH_SWORD(adr); |
24438 | adr += AREG((Opcode >> 0) & 7); |
24439 | PRE_IO |
24440 | READ_LONG_F(adr, dst) |
24441 | res = dst + src; |
24442 | flag_NotZ = res; |
24443 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24444 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24445 | flag_N = res >> 24; |
24446 | WRITE_LONG_F(adr, res) |
24447 | POST_IO |
24448 | RET(24) |
24449 | } |
24450 | |
24451 | // ADDQ |
24452 | OPCODE(0x50B0) |
24453 | { |
24454 | u32 adr, res; |
24455 | u32 src, dst; |
24456 | |
24457 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24458 | adr = AREG((Opcode >> 0) & 7); |
24459 | DECODE_EXT_WORD |
24460 | PRE_IO |
24461 | READ_LONG_F(adr, dst) |
24462 | res = dst + src; |
24463 | flag_NotZ = res; |
24464 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24465 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24466 | flag_N = res >> 24; |
24467 | WRITE_LONG_F(adr, res) |
24468 | POST_IO |
24469 | RET(26) |
24470 | } |
24471 | |
24472 | // ADDQ |
24473 | OPCODE(0x50B8) |
24474 | { |
24475 | u32 adr, res; |
24476 | u32 src, dst; |
24477 | |
24478 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24479 | FETCH_SWORD(adr); |
24480 | PRE_IO |
24481 | READ_LONG_F(adr, dst) |
24482 | res = dst + src; |
24483 | flag_NotZ = res; |
24484 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24485 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24486 | flag_N = res >> 24; |
24487 | WRITE_LONG_F(adr, res) |
24488 | POST_IO |
24489 | RET(24) |
24490 | } |
24491 | |
24492 | // ADDQ |
24493 | OPCODE(0x50B9) |
24494 | { |
24495 | u32 adr, res; |
24496 | u32 src, dst; |
24497 | |
24498 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24499 | FETCH_LONG(adr); |
24500 | PRE_IO |
24501 | READ_LONG_F(adr, dst) |
24502 | res = dst + src; |
24503 | flag_NotZ = res; |
24504 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24505 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24506 | flag_N = res >> 24; |
24507 | WRITE_LONG_F(adr, res) |
24508 | POST_IO |
24509 | RET(28) |
24510 | } |
24511 | |
24512 | // ADDQ |
24513 | OPCODE(0x509F) |
24514 | { |
24515 | u32 adr, res; |
24516 | u32 src, dst; |
24517 | |
24518 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24519 | adr = AREG(7); |
24520 | AREG(7) += 4; |
24521 | PRE_IO |
24522 | READ_LONG_F(adr, dst) |
24523 | res = dst + src; |
24524 | flag_NotZ = res; |
24525 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24526 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24527 | flag_N = res >> 24; |
24528 | WRITE_LONG_F(adr, res) |
24529 | POST_IO |
24530 | RET(20) |
24531 | } |
24532 | |
24533 | // ADDQ |
24534 | OPCODE(0x50A7) |
24535 | { |
24536 | u32 adr, res; |
24537 | u32 src, dst; |
24538 | |
24539 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24540 | adr = AREG(7) - 4; |
24541 | AREG(7) = adr; |
24542 | PRE_IO |
24543 | READ_LONG_F(adr, dst) |
24544 | res = dst + src; |
24545 | flag_NotZ = res; |
24546 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
24547 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
24548 | flag_N = res >> 24; |
24549 | WRITE_LONG_F(adr, res) |
24550 | POST_IO |
24551 | RET(22) |
24552 | } |
24553 | |
24554 | // SUBQ |
24555 | OPCODE(0x5100) |
24556 | { |
24557 | u32 adr, res; |
24558 | u32 src, dst; |
24559 | |
24560 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24561 | dst = DREGu8((Opcode >> 0) & 7); |
24562 | res = dst - src; |
24563 | flag_N = flag_X = flag_C = res; |
24564 | flag_V = (src ^ dst) & (res ^ dst); |
24565 | flag_NotZ = res & 0xFF; |
24566 | DREGu8((Opcode >> 0) & 7) = res; |
24567 | RET(4) |
24568 | } |
24569 | |
24570 | // SUBQ |
24571 | OPCODE(0x5110) |
24572 | { |
24573 | u32 adr, res; |
24574 | u32 src, dst; |
24575 | |
24576 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24577 | adr = AREG((Opcode >> 0) & 7); |
24578 | PRE_IO |
24579 | READ_BYTE_F(adr, dst) |
24580 | res = dst - src; |
24581 | flag_N = flag_X = flag_C = res; |
24582 | flag_V = (src ^ dst) & (res ^ dst); |
24583 | flag_NotZ = res & 0xFF; |
24584 | WRITE_BYTE_F(adr, res) |
24585 | POST_IO |
24586 | RET(12) |
24587 | } |
24588 | |
24589 | // SUBQ |
24590 | OPCODE(0x5118) |
24591 | { |
24592 | u32 adr, res; |
24593 | u32 src, dst; |
24594 | |
24595 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24596 | adr = AREG((Opcode >> 0) & 7); |
24597 | AREG((Opcode >> 0) & 7) += 1; |
24598 | PRE_IO |
24599 | READ_BYTE_F(adr, dst) |
24600 | res = dst - src; |
24601 | flag_N = flag_X = flag_C = res; |
24602 | flag_V = (src ^ dst) & (res ^ dst); |
24603 | flag_NotZ = res & 0xFF; |
24604 | WRITE_BYTE_F(adr, res) |
24605 | POST_IO |
24606 | RET(12) |
24607 | } |
24608 | |
24609 | // SUBQ |
24610 | OPCODE(0x5120) |
24611 | { |
24612 | u32 adr, res; |
24613 | u32 src, dst; |
24614 | |
24615 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24616 | adr = AREG((Opcode >> 0) & 7) - 1; |
24617 | AREG((Opcode >> 0) & 7) = adr; |
24618 | PRE_IO |
24619 | READ_BYTE_F(adr, dst) |
24620 | res = dst - src; |
24621 | flag_N = flag_X = flag_C = res; |
24622 | flag_V = (src ^ dst) & (res ^ dst); |
24623 | flag_NotZ = res & 0xFF; |
24624 | WRITE_BYTE_F(adr, res) |
24625 | POST_IO |
24626 | RET(14) |
24627 | } |
24628 | |
24629 | // SUBQ |
24630 | OPCODE(0x5128) |
24631 | { |
24632 | u32 adr, res; |
24633 | u32 src, dst; |
24634 | |
24635 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24636 | FETCH_SWORD(adr); |
24637 | adr += AREG((Opcode >> 0) & 7); |
24638 | PRE_IO |
24639 | READ_BYTE_F(adr, dst) |
24640 | res = dst - src; |
24641 | flag_N = flag_X = flag_C = res; |
24642 | flag_V = (src ^ dst) & (res ^ dst); |
24643 | flag_NotZ = res & 0xFF; |
24644 | WRITE_BYTE_F(adr, res) |
24645 | POST_IO |
24646 | RET(16) |
24647 | } |
24648 | |
24649 | // SUBQ |
24650 | OPCODE(0x5130) |
24651 | { |
24652 | u32 adr, res; |
24653 | u32 src, dst; |
24654 | |
24655 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24656 | adr = AREG((Opcode >> 0) & 7); |
24657 | DECODE_EXT_WORD |
24658 | PRE_IO |
24659 | READ_BYTE_F(adr, dst) |
24660 | res = dst - src; |
24661 | flag_N = flag_X = flag_C = res; |
24662 | flag_V = (src ^ dst) & (res ^ dst); |
24663 | flag_NotZ = res & 0xFF; |
24664 | WRITE_BYTE_F(adr, res) |
24665 | POST_IO |
24666 | RET(18) |
24667 | } |
24668 | |
24669 | // SUBQ |
24670 | OPCODE(0x5138) |
24671 | { |
24672 | u32 adr, res; |
24673 | u32 src, dst; |
24674 | |
24675 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24676 | FETCH_SWORD(adr); |
24677 | PRE_IO |
24678 | READ_BYTE_F(adr, dst) |
24679 | res = dst - src; |
24680 | flag_N = flag_X = flag_C = res; |
24681 | flag_V = (src ^ dst) & (res ^ dst); |
24682 | flag_NotZ = res & 0xFF; |
24683 | WRITE_BYTE_F(adr, res) |
24684 | POST_IO |
24685 | RET(16) |
24686 | } |
24687 | |
24688 | // SUBQ |
24689 | OPCODE(0x5139) |
24690 | { |
24691 | u32 adr, res; |
24692 | u32 src, dst; |
24693 | |
24694 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24695 | FETCH_LONG(adr); |
24696 | PRE_IO |
24697 | READ_BYTE_F(adr, dst) |
24698 | res = dst - src; |
24699 | flag_N = flag_X = flag_C = res; |
24700 | flag_V = (src ^ dst) & (res ^ dst); |
24701 | flag_NotZ = res & 0xFF; |
24702 | WRITE_BYTE_F(adr, res) |
24703 | POST_IO |
24704 | RET(20) |
24705 | } |
24706 | |
24707 | // SUBQ |
24708 | OPCODE(0x511F) |
24709 | { |
24710 | u32 adr, res; |
24711 | u32 src, dst; |
24712 | |
24713 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24714 | adr = AREG(7); |
24715 | AREG(7) += 2; |
24716 | PRE_IO |
24717 | READ_BYTE_F(adr, dst) |
24718 | res = dst - src; |
24719 | flag_N = flag_X = flag_C = res; |
24720 | flag_V = (src ^ dst) & (res ^ dst); |
24721 | flag_NotZ = res & 0xFF; |
24722 | WRITE_BYTE_F(adr, res) |
24723 | POST_IO |
24724 | RET(12) |
24725 | } |
24726 | |
24727 | // SUBQ |
24728 | OPCODE(0x5127) |
24729 | { |
24730 | u32 adr, res; |
24731 | u32 src, dst; |
24732 | |
24733 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24734 | adr = AREG(7) - 2; |
24735 | AREG(7) = adr; |
24736 | PRE_IO |
24737 | READ_BYTE_F(adr, dst) |
24738 | res = dst - src; |
24739 | flag_N = flag_X = flag_C = res; |
24740 | flag_V = (src ^ dst) & (res ^ dst); |
24741 | flag_NotZ = res & 0xFF; |
24742 | WRITE_BYTE_F(adr, res) |
24743 | POST_IO |
24744 | RET(14) |
24745 | } |
24746 | |
24747 | // SUBQ |
24748 | OPCODE(0x5140) |
24749 | { |
24750 | u32 adr, res; |
24751 | u32 src, dst; |
24752 | |
24753 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24754 | dst = DREGu16((Opcode >> 0) & 7); |
24755 | res = dst - src; |
24756 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24757 | flag_N = flag_X = flag_C = res >> 8; |
24758 | flag_NotZ = res & 0xFFFF; |
24759 | DREGu16((Opcode >> 0) & 7) = res; |
24760 | RET(4) |
24761 | } |
24762 | |
24763 | // SUBQ |
24764 | OPCODE(0x5148) |
24765 | { |
24766 | u32 adr, res; |
24767 | u32 src, dst; |
24768 | |
24769 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24770 | dst = AREGu32((Opcode >> 0) & 7); |
24771 | res = dst - src; |
24772 | AREG((Opcode >> 0) & 7) = res; |
24773 | RET(8) |
24774 | } |
24775 | |
24776 | // SUBQ |
24777 | OPCODE(0x5150) |
24778 | { |
24779 | u32 adr, res; |
24780 | u32 src, dst; |
24781 | |
24782 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24783 | adr = AREG((Opcode >> 0) & 7); |
24784 | PRE_IO |
24785 | READ_WORD_F(adr, dst) |
24786 | res = dst - src; |
24787 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24788 | flag_N = flag_X = flag_C = res >> 8; |
24789 | flag_NotZ = res & 0xFFFF; |
24790 | WRITE_WORD_F(adr, res) |
24791 | POST_IO |
24792 | RET(12) |
24793 | } |
24794 | |
24795 | // SUBQ |
24796 | OPCODE(0x5158) |
24797 | { |
24798 | u32 adr, res; |
24799 | u32 src, dst; |
24800 | |
24801 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24802 | adr = AREG((Opcode >> 0) & 7); |
24803 | AREG((Opcode >> 0) & 7) += 2; |
24804 | PRE_IO |
24805 | READ_WORD_F(adr, dst) |
24806 | res = dst - src; |
24807 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24808 | flag_N = flag_X = flag_C = res >> 8; |
24809 | flag_NotZ = res & 0xFFFF; |
24810 | WRITE_WORD_F(adr, res) |
24811 | POST_IO |
24812 | RET(12) |
24813 | } |
24814 | |
24815 | // SUBQ |
24816 | OPCODE(0x5160) |
24817 | { |
24818 | u32 adr, res; |
24819 | u32 src, dst; |
24820 | |
24821 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24822 | adr = AREG((Opcode >> 0) & 7) - 2; |
24823 | AREG((Opcode >> 0) & 7) = adr; |
24824 | PRE_IO |
24825 | READ_WORD_F(adr, dst) |
24826 | res = dst - src; |
24827 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24828 | flag_N = flag_X = flag_C = res >> 8; |
24829 | flag_NotZ = res & 0xFFFF; |
24830 | WRITE_WORD_F(adr, res) |
24831 | POST_IO |
24832 | RET(14) |
24833 | } |
24834 | |
24835 | // SUBQ |
24836 | OPCODE(0x5168) |
24837 | { |
24838 | u32 adr, res; |
24839 | u32 src, dst; |
24840 | |
24841 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24842 | FETCH_SWORD(adr); |
24843 | adr += AREG((Opcode >> 0) & 7); |
24844 | PRE_IO |
24845 | READ_WORD_F(adr, dst) |
24846 | res = dst - src; |
24847 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24848 | flag_N = flag_X = flag_C = res >> 8; |
24849 | flag_NotZ = res & 0xFFFF; |
24850 | WRITE_WORD_F(adr, res) |
24851 | POST_IO |
24852 | RET(16) |
24853 | } |
24854 | |
24855 | // SUBQ |
24856 | OPCODE(0x5170) |
24857 | { |
24858 | u32 adr, res; |
24859 | u32 src, dst; |
24860 | |
24861 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24862 | adr = AREG((Opcode >> 0) & 7); |
24863 | DECODE_EXT_WORD |
24864 | PRE_IO |
24865 | READ_WORD_F(adr, dst) |
24866 | res = dst - src; |
24867 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24868 | flag_N = flag_X = flag_C = res >> 8; |
24869 | flag_NotZ = res & 0xFFFF; |
24870 | WRITE_WORD_F(adr, res) |
24871 | POST_IO |
24872 | RET(18) |
24873 | } |
24874 | |
24875 | // SUBQ |
24876 | OPCODE(0x5178) |
24877 | { |
24878 | u32 adr, res; |
24879 | u32 src, dst; |
24880 | |
24881 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24882 | FETCH_SWORD(adr); |
24883 | PRE_IO |
24884 | READ_WORD_F(adr, dst) |
24885 | res = dst - src; |
24886 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24887 | flag_N = flag_X = flag_C = res >> 8; |
24888 | flag_NotZ = res & 0xFFFF; |
24889 | WRITE_WORD_F(adr, res) |
24890 | POST_IO |
24891 | RET(16) |
24892 | } |
24893 | |
24894 | // SUBQ |
24895 | OPCODE(0x5179) |
24896 | { |
24897 | u32 adr, res; |
24898 | u32 src, dst; |
24899 | |
24900 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24901 | FETCH_LONG(adr); |
24902 | PRE_IO |
24903 | READ_WORD_F(adr, dst) |
24904 | res = dst - src; |
24905 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24906 | flag_N = flag_X = flag_C = res >> 8; |
24907 | flag_NotZ = res & 0xFFFF; |
24908 | WRITE_WORD_F(adr, res) |
24909 | POST_IO |
24910 | RET(20) |
24911 | } |
24912 | |
24913 | // SUBQ |
24914 | OPCODE(0x515F) |
24915 | { |
24916 | u32 adr, res; |
24917 | u32 src, dst; |
24918 | |
24919 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24920 | adr = AREG(7); |
24921 | AREG(7) += 2; |
24922 | PRE_IO |
24923 | READ_WORD_F(adr, dst) |
24924 | res = dst - src; |
24925 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24926 | flag_N = flag_X = flag_C = res >> 8; |
24927 | flag_NotZ = res & 0xFFFF; |
24928 | WRITE_WORD_F(adr, res) |
24929 | POST_IO |
24930 | RET(12) |
24931 | } |
24932 | |
24933 | // SUBQ |
24934 | OPCODE(0x5167) |
24935 | { |
24936 | u32 adr, res; |
24937 | u32 src, dst; |
24938 | |
24939 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24940 | adr = AREG(7) - 2; |
24941 | AREG(7) = adr; |
24942 | PRE_IO |
24943 | READ_WORD_F(adr, dst) |
24944 | res = dst - src; |
24945 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
24946 | flag_N = flag_X = flag_C = res >> 8; |
24947 | flag_NotZ = res & 0xFFFF; |
24948 | WRITE_WORD_F(adr, res) |
24949 | POST_IO |
24950 | RET(14) |
24951 | } |
24952 | |
24953 | // SUBQ |
24954 | OPCODE(0x5180) |
24955 | { |
24956 | u32 adr, res; |
24957 | u32 src, dst; |
24958 | |
24959 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24960 | dst = DREGu32((Opcode >> 0) & 7); |
24961 | res = dst - src; |
24962 | flag_NotZ = res; |
24963 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24964 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24965 | flag_N = res >> 24; |
24966 | DREGu32((Opcode >> 0) & 7) = res; |
24967 | RET(8) |
24968 | } |
24969 | |
24970 | // SUBQ |
24971 | OPCODE(0x5188) |
24972 | { |
24973 | u32 adr, res; |
24974 | u32 src, dst; |
24975 | |
24976 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24977 | dst = AREGu32((Opcode >> 0) & 7); |
24978 | res = dst - src; |
24979 | AREG((Opcode >> 0) & 7) = res; |
24980 | RET(8) |
24981 | } |
24982 | |
24983 | // SUBQ |
24984 | OPCODE(0x5190) |
24985 | { |
24986 | u32 adr, res; |
24987 | u32 src, dst; |
24988 | |
24989 | src = (((Opcode >> 9) - 1) & 7) + 1; |
24990 | adr = AREG((Opcode >> 0) & 7); |
24991 | PRE_IO |
24992 | READ_LONG_F(adr, dst) |
24993 | res = dst - src; |
24994 | flag_NotZ = res; |
24995 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
24996 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
24997 | flag_N = res >> 24; |
24998 | WRITE_LONG_F(adr, res) |
24999 | POST_IO |
25000 | RET(20) |
25001 | } |
25002 | |
25003 | // SUBQ |
25004 | OPCODE(0x5198) |
25005 | { |
25006 | u32 adr, res; |
25007 | u32 src, dst; |
25008 | |
25009 | src = (((Opcode >> 9) - 1) & 7) + 1; |
25010 | adr = AREG((Opcode >> 0) & 7); |
25011 | AREG((Opcode >> 0) & 7) += 4; |
25012 | PRE_IO |
25013 | READ_LONG_F(adr, dst) |
25014 | res = dst - src; |
25015 | flag_NotZ = res; |
25016 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
25017 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
25018 | flag_N = res >> 24; |
25019 | WRITE_LONG_F(adr, res) |
25020 | POST_IO |
25021 | RET(20) |
25022 | } |
25023 | |
25024 | // SUBQ |
25025 | OPCODE(0x51A0) |
25026 | { |
25027 | u32 adr, res; |
25028 | u32 src, dst; |
25029 | |
25030 | src = (((Opcode >> 9) - 1) & 7) + 1; |
25031 | adr = AREG((Opcode >> 0) & 7) - 4; |
25032 | AREG((Opcode >> 0) & 7) = adr; |
25033 | PRE_IO |
25034 | READ_LONG_F(adr, dst) |
25035 | res = dst - src; |
25036 | flag_NotZ = res; |
25037 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
25038 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
25039 | flag_N = res >> 24; |
25040 | WRITE_LONG_F(adr, res) |
25041 | POST_IO |
25042 | RET(22) |
25043 | } |
25044 | |
25045 | // SUBQ |
25046 | OPCODE(0x51A8) |
25047 | { |
25048 | u32 adr, res; |
25049 | u32 src, dst; |
25050 | |
25051 | src = (((Opcode >> 9) - 1) & 7) + 1; |
25052 | FETCH_SWORD(adr); |
25053 | adr += AREG((Opcode >> 0) & 7); |
25054 | PRE_IO |
25055 | READ_LONG_F(adr, dst) |
25056 | res = dst - src; |
25057 | flag_NotZ = res; |
25058 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
25059 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
25060 | flag_N = res >> 24; |
25061 | WRITE_LONG_F(adr, res) |
25062 | POST_IO |
25063 | RET(24) |
25064 | } |
25065 | |
25066 | // SUBQ |
25067 | OPCODE(0x51B0) |
25068 | { |
25069 | u32 adr, res; |
25070 | u32 src, dst; |
25071 | |
25072 | src = (((Opcode >> 9) - 1) & 7) + 1; |
25073 | adr = AREG((Opcode >> 0) & 7); |
25074 | DECODE_EXT_WORD |
25075 | PRE_IO |
25076 | READ_LONG_F(adr, dst) |
25077 | res = dst - src; |
25078 | flag_NotZ = res; |
25079 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
25080 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
25081 | flag_N = res >> 24; |
25082 | WRITE_LONG_F(adr, res) |
25083 | POST_IO |
25084 | RET(26) |
25085 | } |
25086 | |
25087 | // SUBQ |
25088 | OPCODE(0x51B8) |
25089 | { |
25090 | u32 adr, res; |
25091 | u32 src, dst; |
25092 | |
25093 | src = (((Opcode >> 9) - 1) & 7) + 1; |
25094 | FETCH_SWORD(adr); |
25095 | PRE_IO |
25096 | READ_LONG_F(adr, dst) |
25097 | res = dst - src; |
25098 | flag_NotZ = res; |
25099 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
25100 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
25101 | flag_N = res >> 24; |
25102 | WRITE_LONG_F(adr, res) |
25103 | POST_IO |
25104 | RET(24) |
25105 | } |
25106 | |
25107 | // SUBQ |
25108 | OPCODE(0x51B9) |
25109 | { |
25110 | u32 adr, res; |
25111 | u32 src, dst; |
25112 | |
25113 | src = (((Opcode >> 9) - 1) & 7) + 1; |
25114 | FETCH_LONG(adr); |
25115 | PRE_IO |
25116 | READ_LONG_F(adr, dst) |
25117 | res = dst - src; |
25118 | flag_NotZ = res; |
25119 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
25120 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
25121 | flag_N = res >> 24; |
25122 | WRITE_LONG_F(adr, res) |
25123 | POST_IO |
25124 | RET(28) |
25125 | } |
25126 | |
25127 | // SUBQ |
25128 | OPCODE(0x519F) |
25129 | { |
25130 | u32 adr, res; |
25131 | u32 src, dst; |
25132 | |
25133 | src = (((Opcode >> 9) - 1) & 7) + 1; |
25134 | adr = AREG(7); |
25135 | AREG(7) += 4; |
25136 | PRE_IO |
25137 | READ_LONG_F(adr, dst) |
25138 | res = dst - src; |
25139 | flag_NotZ = res; |
25140 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
25141 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
25142 | flag_N = res >> 24; |
25143 | WRITE_LONG_F(adr, res) |
25144 | POST_IO |
25145 | RET(20) |
25146 | } |
25147 | |
25148 | // SUBQ |
25149 | OPCODE(0x51A7) |
25150 | { |
25151 | u32 adr, res; |
25152 | u32 src, dst; |
25153 | |
25154 | src = (((Opcode >> 9) - 1) & 7) + 1; |
25155 | adr = AREG(7) - 4; |
25156 | AREG(7) = adr; |
25157 | PRE_IO |
25158 | READ_LONG_F(adr, dst) |
25159 | res = dst - src; |
25160 | flag_NotZ = res; |
25161 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
25162 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
25163 | flag_N = res >> 24; |
25164 | WRITE_LONG_F(adr, res) |
25165 | POST_IO |
25166 | RET(22) |
25167 | } |
25168 | |
25169 | // BCC |
25170 | OPCODE(0x6201) |
25171 | { |
25172 | u32 adr, res; |
25173 | u32 src, dst; |
25174 | |
25175 | if (flag_NotZ && (!(flag_C & 0x100))) |
25176 | { |
25177 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25178 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25179 | } |
25180 | RET(8) |
25181 | } |
25182 | |
25183 | // BCC |
25184 | OPCODE(0x6301) |
25185 | { |
25186 | u32 adr, res; |
25187 | u32 src, dst; |
25188 | |
25189 | if ((!flag_NotZ) || (flag_C & 0x100)) |
25190 | { |
25191 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25192 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25193 | } |
25194 | RET(8) |
25195 | } |
25196 | |
25197 | // BCC |
25198 | OPCODE(0x6401) |
25199 | { |
25200 | u32 adr, res; |
25201 | u32 src, dst; |
25202 | |
25203 | if (!(flag_C & 0x100)) |
25204 | { |
25205 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25206 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25207 | } |
25208 | RET(8) |
25209 | } |
25210 | |
25211 | // BCC |
25212 | OPCODE(0x6501) |
25213 | { |
25214 | u32 adr, res; |
25215 | u32 src, dst; |
25216 | |
25217 | if (flag_C & 0x100) |
25218 | { |
25219 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25220 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25221 | } |
25222 | RET(8) |
25223 | } |
25224 | |
25225 | // BCC |
25226 | OPCODE(0x6601) |
25227 | { |
25228 | u32 adr, res; |
25229 | u32 src, dst; |
25230 | |
25231 | if (flag_NotZ) |
25232 | { |
25233 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25234 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25235 | } |
25236 | RET(8) |
25237 | } |
25238 | |
25239 | // BCC |
25240 | OPCODE(0x6701) |
25241 | { |
25242 | u32 adr, res; |
25243 | u32 src, dst; |
25244 | |
25245 | if (!flag_NotZ) |
25246 | { |
25247 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25248 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25249 | } |
25250 | RET(8) |
25251 | } |
25252 | |
25253 | // BCC |
25254 | OPCODE(0x6801) |
25255 | { |
25256 | u32 adr, res; |
25257 | u32 src, dst; |
25258 | |
25259 | if (!(flag_V & 0x80)) |
25260 | { |
25261 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25262 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25263 | } |
25264 | RET(8) |
25265 | } |
25266 | |
25267 | // BCC |
25268 | OPCODE(0x6901) |
25269 | { |
25270 | u32 adr, res; |
25271 | u32 src, dst; |
25272 | |
25273 | if (flag_V & 0x80) |
25274 | { |
25275 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25276 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25277 | } |
25278 | RET(8) |
25279 | } |
25280 | |
25281 | // BCC |
25282 | OPCODE(0x6A01) |
25283 | { |
25284 | u32 adr, res; |
25285 | u32 src, dst; |
25286 | |
25287 | if (!(flag_N & 0x80)) |
25288 | { |
25289 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25290 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25291 | } |
25292 | RET(8) |
25293 | } |
25294 | |
25295 | // BCC |
25296 | OPCODE(0x6B01) |
25297 | { |
25298 | u32 adr, res; |
25299 | u32 src, dst; |
25300 | |
25301 | if (flag_N & 0x80) |
25302 | { |
25303 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25304 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25305 | } |
25306 | RET(8) |
25307 | } |
25308 | |
25309 | // BCC |
25310 | OPCODE(0x6C01) |
25311 | { |
25312 | u32 adr, res; |
25313 | u32 src, dst; |
25314 | |
25315 | if (!((flag_N ^ flag_V) & 0x80)) |
25316 | { |
25317 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25318 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25319 | } |
25320 | RET(8) |
25321 | } |
25322 | |
25323 | // BCC |
25324 | OPCODE(0x6D01) |
25325 | { |
25326 | u32 adr, res; |
25327 | u32 src, dst; |
25328 | |
25329 | if ((flag_N ^ flag_V) & 0x80) |
25330 | { |
25331 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25332 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25333 | } |
25334 | RET(8) |
25335 | } |
25336 | |
25337 | // BCC |
25338 | OPCODE(0x6E01) |
25339 | { |
25340 | u32 adr, res; |
25341 | u32 src, dst; |
25342 | |
25343 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25344 | { |
25345 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25346 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25347 | } |
25348 | RET(8) |
25349 | } |
25350 | |
25351 | // BCC |
25352 | OPCODE(0x6F01) |
25353 | { |
25354 | u32 adr, res; |
25355 | u32 src, dst; |
25356 | |
25357 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25358 | { |
25359 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
7669591e |
25360 | ctx->io_cycle_counter -= 2; |
70357ce5 |
25361 | } |
25362 | RET(8) |
25363 | } |
25364 | |
25365 | // BCC16 |
25366 | OPCODE(0x6200) |
25367 | { |
25368 | u32 adr, res; |
25369 | u32 src, dst; |
25370 | |
25371 | if (flag_NotZ && (!(flag_C & 0x100))) |
25372 | { |
25373 | u32 newPC; |
25374 | |
be26eb23 |
25375 | newPC = GET_PC; |
70357ce5 |
25376 | newPC += GET_SWORD; |
25377 | SET_PC(newPC); |
25378 | CHECK_BRANCH_EXCEPTION(newPC) |
25379 | RET(10) |
25380 | } |
25381 | PC++; |
25382 | RET(12) |
25383 | } |
25384 | |
25385 | // BCC16 |
25386 | OPCODE(0x6300) |
25387 | { |
25388 | u32 adr, res; |
25389 | u32 src, dst; |
25390 | |
25391 | if ((!flag_NotZ) || (flag_C & 0x100)) |
25392 | { |
25393 | u32 newPC; |
25394 | |
be26eb23 |
25395 | newPC = GET_PC; |
70357ce5 |
25396 | newPC += GET_SWORD; |
25397 | SET_PC(newPC); |
25398 | CHECK_BRANCH_EXCEPTION(newPC) |
25399 | RET(10) |
25400 | } |
25401 | PC++; |
25402 | RET(12) |
25403 | } |
25404 | |
25405 | // BCC16 |
25406 | OPCODE(0x6400) |
25407 | { |
25408 | u32 adr, res; |
25409 | u32 src, dst; |
25410 | |
25411 | if (!(flag_C & 0x100)) |
25412 | { |
25413 | u32 newPC; |
25414 | |
be26eb23 |
25415 | newPC = GET_PC; |
70357ce5 |
25416 | newPC += GET_SWORD; |
25417 | SET_PC(newPC); |
25418 | CHECK_BRANCH_EXCEPTION(newPC) |
25419 | RET(10) |
25420 | } |
25421 | PC++; |
25422 | RET(12) |
25423 | } |
25424 | |
25425 | // BCC16 |
25426 | OPCODE(0x6500) |
25427 | { |
25428 | u32 adr, res; |
25429 | u32 src, dst; |
25430 | |
25431 | if (flag_C & 0x100) |
25432 | { |
25433 | u32 newPC; |
25434 | |
be26eb23 |
25435 | newPC = GET_PC; |
70357ce5 |
25436 | newPC += GET_SWORD; |
25437 | SET_PC(newPC); |
25438 | CHECK_BRANCH_EXCEPTION(newPC) |
25439 | RET(10) |
25440 | } |
25441 | PC++; |
25442 | RET(12) |
25443 | } |
25444 | |
25445 | // BCC16 |
25446 | OPCODE(0x6600) |
25447 | { |
25448 | u32 adr, res; |
25449 | u32 src, dst; |
25450 | |
25451 | if (flag_NotZ) |
25452 | { |
25453 | u32 newPC; |
25454 | |
be26eb23 |
25455 | newPC = GET_PC; |
70357ce5 |
25456 | newPC += GET_SWORD; |
25457 | SET_PC(newPC); |
25458 | CHECK_BRANCH_EXCEPTION(newPC) |
25459 | RET(10) |
25460 | } |
25461 | PC++; |
25462 | RET(12) |
25463 | } |
25464 | |
25465 | // BCC16 |
25466 | OPCODE(0x6700) |
25467 | { |
25468 | u32 adr, res; |
25469 | u32 src, dst; |
25470 | |
25471 | if (!flag_NotZ) |
25472 | { |
25473 | u32 newPC; |
25474 | |
be26eb23 |
25475 | newPC = GET_PC; |
70357ce5 |
25476 | newPC += GET_SWORD; |
25477 | SET_PC(newPC); |
25478 | CHECK_BRANCH_EXCEPTION(newPC) |
25479 | RET(10) |
25480 | } |
25481 | PC++; |
25482 | RET(12) |
25483 | } |
25484 | |
25485 | // BCC16 |
25486 | OPCODE(0x6800) |
25487 | { |
25488 | u32 adr, res; |
25489 | u32 src, dst; |
25490 | |
25491 | if (!(flag_V & 0x80)) |
25492 | { |
25493 | u32 newPC; |
25494 | |
be26eb23 |
25495 | newPC = GET_PC; |
70357ce5 |
25496 | newPC += GET_SWORD; |
25497 | SET_PC(newPC); |
25498 | CHECK_BRANCH_EXCEPTION(newPC) |
25499 | RET(10) |
25500 | } |
25501 | PC++; |
25502 | RET(12) |
25503 | } |
25504 | |
25505 | // BCC16 |
25506 | OPCODE(0x6900) |
25507 | { |
25508 | u32 adr, res; |
25509 | u32 src, dst; |
25510 | |
25511 | if (flag_V & 0x80) |
25512 | { |
25513 | u32 newPC; |
25514 | |
be26eb23 |
25515 | newPC = GET_PC; |
70357ce5 |
25516 | newPC += GET_SWORD; |
25517 | SET_PC(newPC); |
25518 | CHECK_BRANCH_EXCEPTION(newPC) |
25519 | RET(10) |
25520 | } |
25521 | PC++; |
25522 | RET(12) |
25523 | } |
25524 | |
25525 | // BCC16 |
25526 | OPCODE(0x6A00) |
25527 | { |
25528 | u32 adr, res; |
25529 | u32 src, dst; |
25530 | |
25531 | if (!(flag_N & 0x80)) |
25532 | { |
25533 | u32 newPC; |
25534 | |
be26eb23 |
25535 | newPC = GET_PC; |
70357ce5 |
25536 | newPC += GET_SWORD; |
25537 | SET_PC(newPC); |
25538 | CHECK_BRANCH_EXCEPTION(newPC) |
25539 | RET(10) |
25540 | } |
25541 | PC++; |
25542 | RET(12) |
25543 | } |
25544 | |
25545 | // BCC16 |
25546 | OPCODE(0x6B00) |
25547 | { |
25548 | u32 adr, res; |
25549 | u32 src, dst; |
25550 | |
25551 | if (flag_N & 0x80) |
25552 | { |
25553 | u32 newPC; |
25554 | |
be26eb23 |
25555 | newPC = GET_PC; |
70357ce5 |
25556 | newPC += GET_SWORD; |
25557 | SET_PC(newPC); |
25558 | CHECK_BRANCH_EXCEPTION(newPC) |
25559 | RET(10) |
25560 | } |
25561 | PC++; |
25562 | RET(12) |
25563 | } |
25564 | |
25565 | // BCC16 |
25566 | OPCODE(0x6C00) |
25567 | { |
25568 | u32 adr, res; |
25569 | u32 src, dst; |
25570 | |
25571 | if (!((flag_N ^ flag_V) & 0x80)) |
25572 | { |
25573 | u32 newPC; |
25574 | |
be26eb23 |
25575 | newPC = GET_PC; |
70357ce5 |
25576 | newPC += GET_SWORD; |
25577 | SET_PC(newPC); |
25578 | CHECK_BRANCH_EXCEPTION(newPC) |
25579 | RET(10) |
25580 | } |
25581 | PC++; |
25582 | RET(12) |
25583 | } |
25584 | |
25585 | // BCC16 |
25586 | OPCODE(0x6D00) |
25587 | { |
25588 | u32 adr, res; |
25589 | u32 src, dst; |
25590 | |
25591 | if ((flag_N ^ flag_V) & 0x80) |
25592 | { |
25593 | u32 newPC; |
25594 | |
be26eb23 |
25595 | newPC = GET_PC; |
70357ce5 |
25596 | newPC += GET_SWORD; |
25597 | SET_PC(newPC); |
25598 | CHECK_BRANCH_EXCEPTION(newPC) |
25599 | RET(10) |
25600 | } |
25601 | PC++; |
25602 | RET(12) |
25603 | } |
25604 | |
25605 | // BCC16 |
25606 | OPCODE(0x6E00) |
25607 | { |
25608 | u32 adr, res; |
25609 | u32 src, dst; |
25610 | |
25611 | if (flag_NotZ && (!((flag_N ^ flag_V) & 0x80))) |
25612 | { |
25613 | u32 newPC; |
25614 | |
be26eb23 |
25615 | newPC = GET_PC; |
70357ce5 |
25616 | newPC += GET_SWORD; |
25617 | SET_PC(newPC); |
25618 | CHECK_BRANCH_EXCEPTION(newPC) |
25619 | RET(10) |
25620 | } |
25621 | PC++; |
25622 | RET(12) |
25623 | } |
25624 | |
25625 | // BCC16 |
25626 | OPCODE(0x6F00) |
25627 | { |
25628 | u32 adr, res; |
25629 | u32 src, dst; |
25630 | |
25631 | if ((!flag_NotZ) || ((flag_N ^ flag_V) & 0x80)) |
25632 | { |
25633 | u32 newPC; |
25634 | |
be26eb23 |
25635 | newPC = GET_PC; |
70357ce5 |
25636 | newPC += GET_SWORD; |
25637 | SET_PC(newPC); |
25638 | CHECK_BRANCH_EXCEPTION(newPC) |
25639 | RET(10) |
25640 | } |
25641 | PC++; |
25642 | RET(12) |
25643 | } |
25644 | |
25645 | // BRA |
25646 | OPCODE(0x6001) |
25647 | { |
25648 | #ifdef FAMEC_CHECK_BRANCHES |
be26eb23 |
25649 | u32 newPC = GET_PC; |
70357ce5 |
25650 | s8 offs=Opcode; |
25651 | newPC += offs; |
25652 | SET_PC(newPC); |
25653 | CHECK_BRANCH_EXCEPTION(offs) |
25654 | #else |
25655 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25656 | #endif |
25657 | RET(10) |
25658 | } |
25659 | |
25660 | // BRA16 |
25661 | OPCODE(0x6000) |
25662 | { |
25663 | u32 adr, res; |
25664 | u32 src, dst; |
25665 | |
25666 | { |
25667 | u32 newPC; |
25668 | |
be26eb23 |
25669 | newPC = GET_PC; |
70357ce5 |
25670 | newPC += GET_SWORD; |
25671 | SET_PC(newPC); |
25672 | CHECK_BRANCH_EXCEPTION(newPC) |
25673 | } |
25674 | RET(10) |
25675 | } |
25676 | |
25677 | // BSR |
25678 | OPCODE(0x6101) |
25679 | { |
25680 | u32 adr, res; |
25681 | u32 src, dst; |
25682 | u32 oldPC; |
25683 | s8 offs; |
25684 | |
25685 | PRE_IO |
25686 | |
be26eb23 |
25687 | oldPC = GET_PC; |
70357ce5 |
25688 | PUSH_32_F(oldPC) |
25689 | #ifdef FAMEC_CHECK_BRANCHES |
25690 | offs = Opcode; |
25691 | oldPC += offs; |
25692 | SET_PC(oldPC); |
25693 | CHECK_BRANCH_EXCEPTION(offs) |
25694 | #else |
25695 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
25696 | #endif |
25697 | POST_IO |
25698 | RET(18) |
25699 | } |
25700 | |
25701 | // BSR16 |
25702 | OPCODE(0x6100) |
25703 | { |
25704 | u32 adr, res; |
25705 | u32 src, dst; |
25706 | |
25707 | PRE_IO |
25708 | { |
25709 | u32 oldPC, newPC; |
25710 | |
be26eb23 |
25711 | newPC = GET_PC; |
70357ce5 |
25712 | oldPC = newPC + 2; |
25713 | PUSH_32_F(oldPC) |
25714 | newPC += GET_SWORD; |
25715 | SET_PC(newPC); |
25716 | CHECK_BRANCH_EXCEPTION(newPC) |
25717 | } |
25718 | POST_IO |
25719 | RET(18) |
25720 | } |
25721 | |
25722 | // MOVEQ |
25723 | OPCODE(0x7000) |
25724 | { |
25725 | u32 adr, res; |
25726 | u32 src, dst; |
25727 | |
25728 | res = (s32)(s8)Opcode; |
25729 | flag_C = flag_V = 0; |
25730 | flag_N = flag_NotZ = res; |
25731 | DREGu32((Opcode >> 9) & 7) = res; |
25732 | RET(4) |
25733 | } |
25734 | |
25735 | // ORaD |
25736 | OPCODE(0x8000) |
25737 | { |
25738 | u32 adr, res; |
25739 | u32 src, dst; |
25740 | |
25741 | src = DREGu8((Opcode >> 0) & 7); |
25742 | res = DREGu8((Opcode >> 9) & 7); |
25743 | res |= src; |
25744 | flag_C = 0; |
25745 | flag_V = 0; |
25746 | flag_NotZ = res; |
25747 | flag_N = res; |
25748 | DREGu8((Opcode >> 9) & 7) = res; |
25749 | RET(4) |
25750 | } |
25751 | |
25752 | // ORaD |
25753 | OPCODE(0x8010) |
25754 | { |
25755 | u32 adr, res; |
25756 | u32 src, dst; |
25757 | |
25758 | adr = AREG((Opcode >> 0) & 7); |
25759 | PRE_IO |
25760 | READ_BYTE_F(adr, src) |
25761 | res = DREGu8((Opcode >> 9) & 7); |
25762 | res |= src; |
25763 | flag_C = 0; |
25764 | flag_V = 0; |
25765 | flag_NotZ = res; |
25766 | flag_N = res; |
25767 | DREGu8((Opcode >> 9) & 7) = res; |
25768 | POST_IO |
25769 | RET(8) |
25770 | } |
25771 | |
25772 | // ORaD |
25773 | OPCODE(0x8018) |
25774 | { |
25775 | u32 adr, res; |
25776 | u32 src, dst; |
25777 | |
25778 | adr = AREG((Opcode >> 0) & 7); |
25779 | AREG((Opcode >> 0) & 7) += 1; |
25780 | PRE_IO |
25781 | READ_BYTE_F(adr, src) |
25782 | res = DREGu8((Opcode >> 9) & 7); |
25783 | res |= src; |
25784 | flag_C = 0; |
25785 | flag_V = 0; |
25786 | flag_NotZ = res; |
25787 | flag_N = res; |
25788 | DREGu8((Opcode >> 9) & 7) = res; |
25789 | POST_IO |
25790 | RET(8) |
25791 | } |
25792 | |
25793 | // ORaD |
25794 | OPCODE(0x8020) |
25795 | { |
25796 | u32 adr, res; |
25797 | u32 src, dst; |
25798 | |
25799 | adr = AREG((Opcode >> 0) & 7) - 1; |
25800 | AREG((Opcode >> 0) & 7) = adr; |
25801 | PRE_IO |
25802 | READ_BYTE_F(adr, src) |
25803 | res = DREGu8((Opcode >> 9) & 7); |
25804 | res |= src; |
25805 | flag_C = 0; |
25806 | flag_V = 0; |
25807 | flag_NotZ = res; |
25808 | flag_N = res; |
25809 | DREGu8((Opcode >> 9) & 7) = res; |
25810 | POST_IO |
25811 | RET(10) |
25812 | } |
25813 | |
25814 | // ORaD |
25815 | OPCODE(0x8028) |
25816 | { |
25817 | u32 adr, res; |
25818 | u32 src, dst; |
25819 | |
25820 | FETCH_SWORD(adr); |
25821 | adr += AREG((Opcode >> 0) & 7); |
25822 | PRE_IO |
25823 | READ_BYTE_F(adr, src) |
25824 | res = DREGu8((Opcode >> 9) & 7); |
25825 | res |= src; |
25826 | flag_C = 0; |
25827 | flag_V = 0; |
25828 | flag_NotZ = res; |
25829 | flag_N = res; |
25830 | DREGu8((Opcode >> 9) & 7) = res; |
25831 | POST_IO |
25832 | RET(12) |
25833 | } |
25834 | |
25835 | // ORaD |
25836 | OPCODE(0x8030) |
25837 | { |
25838 | u32 adr, res; |
25839 | u32 src, dst; |
25840 | |
25841 | adr = AREG((Opcode >> 0) & 7); |
25842 | DECODE_EXT_WORD |
25843 | PRE_IO |
25844 | READ_BYTE_F(adr, src) |
25845 | res = DREGu8((Opcode >> 9) & 7); |
25846 | res |= src; |
25847 | flag_C = 0; |
25848 | flag_V = 0; |
25849 | flag_NotZ = res; |
25850 | flag_N = res; |
25851 | DREGu8((Opcode >> 9) & 7) = res; |
25852 | POST_IO |
25853 | RET(14) |
25854 | } |
25855 | |
25856 | // ORaD |
25857 | OPCODE(0x8038) |
25858 | { |
25859 | u32 adr, res; |
25860 | u32 src, dst; |
25861 | |
25862 | FETCH_SWORD(adr); |
25863 | PRE_IO |
25864 | READ_BYTE_F(adr, src) |
25865 | res = DREGu8((Opcode >> 9) & 7); |
25866 | res |= src; |
25867 | flag_C = 0; |
25868 | flag_V = 0; |
25869 | flag_NotZ = res; |
25870 | flag_N = res; |
25871 | DREGu8((Opcode >> 9) & 7) = res; |
25872 | POST_IO |
25873 | RET(12) |
25874 | } |
25875 | |
25876 | // ORaD |
25877 | OPCODE(0x8039) |
25878 | { |
25879 | u32 adr, res; |
25880 | u32 src, dst; |
25881 | |
25882 | FETCH_LONG(adr); |
25883 | PRE_IO |
25884 | READ_BYTE_F(adr, src) |
25885 | res = DREGu8((Opcode >> 9) & 7); |
25886 | res |= src; |
25887 | flag_C = 0; |
25888 | flag_V = 0; |
25889 | flag_NotZ = res; |
25890 | flag_N = res; |
25891 | DREGu8((Opcode >> 9) & 7) = res; |
25892 | POST_IO |
25893 | RET(16) |
25894 | } |
25895 | |
25896 | // ORaD |
25897 | OPCODE(0x803A) |
25898 | { |
25899 | u32 adr, res; |
25900 | u32 src, dst; |
25901 | |
be26eb23 |
25902 | adr = GET_SWORD + GET_PC; |
70357ce5 |
25903 | PC++; |
25904 | PRE_IO |
25905 | READ_BYTE_F(adr, src) |
25906 | res = DREGu8((Opcode >> 9) & 7); |
25907 | res |= src; |
25908 | flag_C = 0; |
25909 | flag_V = 0; |
25910 | flag_NotZ = res; |
25911 | flag_N = res; |
25912 | DREGu8((Opcode >> 9) & 7) = res; |
25913 | POST_IO |
25914 | RET(12) |
25915 | } |
25916 | |
25917 | // ORaD |
25918 | OPCODE(0x803B) |
25919 | { |
25920 | u32 adr, res; |
25921 | u32 src, dst; |
25922 | |
be26eb23 |
25923 | adr = GET_PC; |
70357ce5 |
25924 | DECODE_EXT_WORD |
25925 | PRE_IO |
25926 | READ_BYTE_F(adr, src) |
25927 | res = DREGu8((Opcode >> 9) & 7); |
25928 | res |= src; |
25929 | flag_C = 0; |
25930 | flag_V = 0; |
25931 | flag_NotZ = res; |
25932 | flag_N = res; |
25933 | DREGu8((Opcode >> 9) & 7) = res; |
25934 | POST_IO |
25935 | RET(14) |
25936 | } |
25937 | |
25938 | // ORaD |
25939 | OPCODE(0x803C) |
25940 | { |
25941 | u32 adr, res; |
25942 | u32 src, dst; |
25943 | |
25944 | FETCH_BYTE(src); |
25945 | res = DREGu8((Opcode >> 9) & 7); |
25946 | res |= src; |
25947 | flag_C = 0; |
25948 | flag_V = 0; |
25949 | flag_NotZ = res; |
25950 | flag_N = res; |
25951 | DREGu8((Opcode >> 9) & 7) = res; |
25952 | RET(8) |
25953 | } |
25954 | |
25955 | // ORaD |
25956 | OPCODE(0x801F) |
25957 | { |
25958 | u32 adr, res; |
25959 | u32 src, dst; |
25960 | |
25961 | adr = AREG(7); |
25962 | AREG(7) += 2; |
25963 | PRE_IO |
25964 | READ_BYTE_F(adr, src) |
25965 | res = DREGu8((Opcode >> 9) & 7); |
25966 | res |= src; |
25967 | flag_C = 0; |
25968 | flag_V = 0; |
25969 | flag_NotZ = res; |
25970 | flag_N = res; |
25971 | DREGu8((Opcode >> 9) & 7) = res; |
25972 | POST_IO |
25973 | RET(8) |
25974 | } |
25975 | |
25976 | // ORaD |
25977 | OPCODE(0x8027) |
25978 | { |
25979 | u32 adr, res; |
25980 | u32 src, dst; |
25981 | |
25982 | adr = AREG(7) - 2; |
25983 | AREG(7) = adr; |
25984 | PRE_IO |
25985 | READ_BYTE_F(adr, src) |
25986 | res = DREGu8((Opcode >> 9) & 7); |
25987 | res |= src; |
25988 | flag_C = 0; |
25989 | flag_V = 0; |
25990 | flag_NotZ = res; |
25991 | flag_N = res; |
25992 | DREGu8((Opcode >> 9) & 7) = res; |
25993 | POST_IO |
25994 | RET(10) |
25995 | } |
25996 | |
25997 | // ORaD |
25998 | OPCODE(0x8040) |
25999 | { |
26000 | u32 adr, res; |
26001 | u32 src, dst; |
26002 | |
26003 | src = DREGu16((Opcode >> 0) & 7); |
26004 | res = DREGu16((Opcode >> 9) & 7); |
26005 | res |= src; |
26006 | flag_C = 0; |
26007 | flag_V = 0; |
26008 | flag_NotZ = res; |
26009 | flag_N = res >> 8; |
26010 | DREGu16((Opcode >> 9) & 7) = res; |
26011 | RET(4) |
26012 | } |
26013 | |
26014 | // ORaD |
26015 | OPCODE(0x8050) |
26016 | { |
26017 | u32 adr, res; |
26018 | u32 src, dst; |
26019 | |
26020 | adr = AREG((Opcode >> 0) & 7); |
26021 | PRE_IO |
26022 | READ_WORD_F(adr, src) |
26023 | res = DREGu16((Opcode >> 9) & 7); |
26024 | res |= src; |
26025 | flag_C = 0; |
26026 | flag_V = 0; |
26027 | flag_NotZ = res; |
26028 | flag_N = res >> 8; |
26029 | DREGu16((Opcode >> 9) & 7) = res; |
26030 | POST_IO |
26031 | RET(8) |
26032 | } |
26033 | |
26034 | // ORaD |
26035 | OPCODE(0x8058) |
26036 | { |
26037 | u32 adr, res; |
26038 | u32 src, dst; |
26039 | |
26040 | adr = AREG((Opcode >> 0) & 7); |
26041 | AREG((Opcode >> 0) & 7) += 2; |
26042 | PRE_IO |
26043 | READ_WORD_F(adr, src) |
26044 | res = DREGu16((Opcode >> 9) & 7); |
26045 | res |= src; |
26046 | flag_C = 0; |
26047 | flag_V = 0; |
26048 | flag_NotZ = res; |
26049 | flag_N = res >> 8; |
26050 | DREGu16((Opcode >> 9) & 7) = res; |
26051 | POST_IO |
26052 | RET(8) |
26053 | } |
26054 | |
26055 | // ORaD |
26056 | OPCODE(0x8060) |
26057 | { |
26058 | u32 adr, res; |
26059 | u32 src, dst; |
26060 | |
26061 | adr = AREG((Opcode >> 0) & 7) - 2; |
26062 | AREG((Opcode >> 0) & 7) = adr; |
26063 | PRE_IO |
26064 | READ_WORD_F(adr, src) |
26065 | res = DREGu16((Opcode >> 9) & 7); |
26066 | res |= src; |
26067 | flag_C = 0; |
26068 | flag_V = 0; |
26069 | flag_NotZ = res; |
26070 | flag_N = res >> 8; |
26071 | DREGu16((Opcode >> 9) & 7) = res; |
26072 | POST_IO |
26073 | RET(10) |
26074 | } |
26075 | |
26076 | // ORaD |
26077 | OPCODE(0x8068) |
26078 | { |
26079 | u32 adr, res; |
26080 | u32 src, dst; |
26081 | |
26082 | FETCH_SWORD(adr); |
26083 | adr += AREG((Opcode >> 0) & 7); |
26084 | PRE_IO |
26085 | READ_WORD_F(adr, src) |
26086 | res = DREGu16((Opcode >> 9) & 7); |
26087 | res |= src; |
26088 | flag_C = 0; |
26089 | flag_V = 0; |
26090 | flag_NotZ = res; |
26091 | flag_N = res >> 8; |
26092 | DREGu16((Opcode >> 9) & 7) = res; |
26093 | POST_IO |
26094 | RET(12) |
26095 | } |
26096 | |
26097 | // ORaD |
26098 | OPCODE(0x8070) |
26099 | { |
26100 | u32 adr, res; |
26101 | u32 src, dst; |
26102 | |
26103 | adr = AREG((Opcode >> 0) & 7); |
26104 | DECODE_EXT_WORD |
26105 | PRE_IO |
26106 | READ_WORD_F(adr, src) |
26107 | res = DREGu16((Opcode >> 9) & 7); |
26108 | res |= src; |
26109 | flag_C = 0; |
26110 | flag_V = 0; |
26111 | flag_NotZ = res; |
26112 | flag_N = res >> 8; |
26113 | DREGu16((Opcode >> 9) & 7) = res; |
26114 | POST_IO |
26115 | RET(14) |
26116 | } |
26117 | |
26118 | // ORaD |
26119 | OPCODE(0x8078) |
26120 | { |
26121 | u32 adr, res; |
26122 | u32 src, dst; |
26123 | |
26124 | FETCH_SWORD(adr); |
26125 | PRE_IO |
26126 | READ_WORD_F(adr, src) |
26127 | res = DREGu16((Opcode >> 9) & 7); |
26128 | res |= src; |
26129 | flag_C = 0; |
26130 | flag_V = 0; |
26131 | flag_NotZ = res; |
26132 | flag_N = res >> 8; |
26133 | DREGu16((Opcode >> 9) & 7) = res; |
26134 | POST_IO |
26135 | RET(12) |
26136 | } |
26137 | |
26138 | // ORaD |
26139 | OPCODE(0x8079) |
26140 | { |
26141 | u32 adr, res; |
26142 | u32 src, dst; |
26143 | |
26144 | FETCH_LONG(adr); |
26145 | PRE_IO |
26146 | READ_WORD_F(adr, src) |
26147 | res = DREGu16((Opcode >> 9) & 7); |
26148 | res |= src; |
26149 | flag_C = 0; |
26150 | flag_V = 0; |
26151 | flag_NotZ = res; |
26152 | flag_N = res >> 8; |
26153 | DREGu16((Opcode >> 9) & 7) = res; |
26154 | POST_IO |
26155 | RET(16) |
26156 | } |
26157 | |
26158 | // ORaD |
26159 | OPCODE(0x807A) |
26160 | { |
26161 | u32 adr, res; |
26162 | u32 src, dst; |
26163 | |
be26eb23 |
26164 | adr = GET_SWORD + GET_PC; |
70357ce5 |
26165 | PC++; |
26166 | PRE_IO |
26167 | READ_WORD_F(adr, src) |
26168 | res = DREGu16((Opcode >> 9) & 7); |
26169 | res |= src; |
26170 | flag_C = 0; |
26171 | flag_V = 0; |
26172 | flag_NotZ = res; |
26173 | flag_N = res >> 8; |
26174 | DREGu16((Opcode >> 9) & 7) = res; |
26175 | POST_IO |
26176 | RET(12) |
26177 | } |
26178 | |
26179 | // ORaD |
26180 | OPCODE(0x807B) |
26181 | { |
26182 | u32 adr, res; |
26183 | u32 src, dst; |
26184 | |
be26eb23 |
26185 | adr = GET_PC; |
70357ce5 |
26186 | DECODE_EXT_WORD |
26187 | PRE_IO |
26188 | READ_WORD_F(adr, src) |
26189 | res = DREGu16((Opcode >> 9) & 7); |
26190 | res |= src; |
26191 | flag_C = 0; |
26192 | flag_V = 0; |
26193 | flag_NotZ = res; |
26194 | flag_N = res >> 8; |
26195 | DREGu16((Opcode >> 9) & 7) = res; |
26196 | POST_IO |
26197 | RET(14) |
26198 | } |
26199 | |
26200 | // ORaD |
26201 | OPCODE(0x807C) |
26202 | { |
26203 | u32 adr, res; |
26204 | u32 src, dst; |
26205 | |
26206 | FETCH_WORD(src); |
26207 | res = DREGu16((Opcode >> 9) & 7); |
26208 | res |= src; |
26209 | flag_C = 0; |
26210 | flag_V = 0; |
26211 | flag_NotZ = res; |
26212 | flag_N = res >> 8; |
26213 | DREGu16((Opcode >> 9) & 7) = res; |
26214 | RET(8) |
26215 | } |
26216 | |
26217 | // ORaD |
26218 | OPCODE(0x805F) |
26219 | { |
26220 | u32 adr, res; |
26221 | u32 src, dst; |
26222 | |
26223 | adr = AREG(7); |
26224 | AREG(7) += 2; |
26225 | PRE_IO |
26226 | READ_WORD_F(adr, src) |
26227 | res = DREGu16((Opcode >> 9) & 7); |
26228 | res |= src; |
26229 | flag_C = 0; |
26230 | flag_V = 0; |
26231 | flag_NotZ = res; |
26232 | flag_N = res >> 8; |
26233 | DREGu16((Opcode >> 9) & 7) = res; |
26234 | POST_IO |
26235 | RET(8) |
26236 | } |
26237 | |
26238 | // ORaD |
26239 | OPCODE(0x8067) |
26240 | { |
26241 | u32 adr, res; |
26242 | u32 src, dst; |
26243 | |
26244 | adr = AREG(7) - 2; |
26245 | AREG(7) = adr; |
26246 | PRE_IO |
26247 | READ_WORD_F(adr, src) |
26248 | res = DREGu16((Opcode >> 9) & 7); |
26249 | res |= src; |
26250 | flag_C = 0; |
26251 | flag_V = 0; |
26252 | flag_NotZ = res; |
26253 | flag_N = res >> 8; |
26254 | DREGu16((Opcode >> 9) & 7) = res; |
26255 | POST_IO |
26256 | RET(10) |
26257 | } |
26258 | |
26259 | // ORaD |
26260 | OPCODE(0x8080) |
26261 | { |
26262 | u32 adr, res; |
26263 | u32 src, dst; |
26264 | |
26265 | src = DREGu32((Opcode >> 0) & 7); |
26266 | res = DREGu32((Opcode >> 9) & 7); |
26267 | res |= src; |
26268 | flag_C = 0; |
26269 | flag_V = 0; |
26270 | flag_NotZ = res; |
26271 | flag_N = res >> 24; |
26272 | DREGu32((Opcode >> 9) & 7) = res; |
26273 | RET(8) |
26274 | } |
26275 | |
26276 | // ORaD |
26277 | OPCODE(0x8090) |
26278 | { |
26279 | u32 adr, res; |
26280 | u32 src, dst; |
26281 | |
26282 | adr = AREG((Opcode >> 0) & 7); |
26283 | PRE_IO |
26284 | READ_LONG_F(adr, src) |
26285 | res = DREGu32((Opcode >> 9) & 7); |
26286 | res |= src; |
26287 | flag_C = 0; |
26288 | flag_V = 0; |
26289 | flag_NotZ = res; |
26290 | flag_N = res >> 24; |
26291 | DREGu32((Opcode >> 9) & 7) = res; |
26292 | POST_IO |
26293 | RET(14) |
26294 | } |
26295 | |
26296 | // ORaD |
26297 | OPCODE(0x8098) |
26298 | { |
26299 | u32 adr, res; |
26300 | u32 src, dst; |
26301 | |
26302 | adr = AREG((Opcode >> 0) & 7); |
26303 | AREG((Opcode >> 0) & 7) += 4; |
26304 | PRE_IO |
26305 | READ_LONG_F(adr, src) |
26306 | res = DREGu32((Opcode >> 9) & 7); |
26307 | res |= src; |
26308 | flag_C = 0; |
26309 | flag_V = 0; |
26310 | flag_NotZ = res; |
26311 | flag_N = res >> 24; |
26312 | DREGu32((Opcode >> 9) & 7) = res; |
26313 | POST_IO |
26314 | RET(14) |
26315 | } |
26316 | |
26317 | // ORaD |
26318 | OPCODE(0x80A0) |
26319 | { |
26320 | u32 adr, res; |
26321 | u32 src, dst; |
26322 | |
26323 | adr = AREG((Opcode >> 0) & 7) - 4; |
26324 | AREG((Opcode >> 0) & 7) = adr; |
26325 | PRE_IO |
26326 | READ_LONG_F(adr, src) |
26327 | res = DREGu32((Opcode >> 9) & 7); |
26328 | res |= src; |
26329 | flag_C = 0; |
26330 | flag_V = 0; |
26331 | flag_NotZ = res; |
26332 | flag_N = res >> 24; |
26333 | DREGu32((Opcode >> 9) & 7) = res; |
26334 | POST_IO |
26335 | RET(16) |
26336 | } |
26337 | |
26338 | // ORaD |
26339 | OPCODE(0x80A8) |
26340 | { |
26341 | u32 adr, res; |
26342 | u32 src, dst; |
26343 | |
26344 | FETCH_SWORD(adr); |
26345 | adr += AREG((Opcode >> 0) & 7); |
26346 | PRE_IO |
26347 | READ_LONG_F(adr, src) |
26348 | res = DREGu32((Opcode >> 9) & 7); |
26349 | res |= src; |
26350 | flag_C = 0; |
26351 | flag_V = 0; |
26352 | flag_NotZ = res; |
26353 | flag_N = res >> 24; |
26354 | DREGu32((Opcode >> 9) & 7) = res; |
26355 | POST_IO |
26356 | RET(18) |
26357 | } |
26358 | |
26359 | // ORaD |
26360 | OPCODE(0x80B0) |
26361 | { |
26362 | u32 adr, res; |
26363 | u32 src, dst; |
26364 | |
26365 | adr = AREG((Opcode >> 0) & 7); |
26366 | DECODE_EXT_WORD |
26367 | PRE_IO |
26368 | READ_LONG_F(adr, src) |
26369 | res = DREGu32((Opcode >> 9) & 7); |
26370 | res |= src; |
26371 | flag_C = 0; |
26372 | flag_V = 0; |
26373 | flag_NotZ = res; |
26374 | flag_N = res >> 24; |
26375 | DREGu32((Opcode >> 9) & 7) = res; |
26376 | POST_IO |
26377 | RET(20) |
26378 | } |
26379 | |
26380 | // ORaD |
26381 | OPCODE(0x80B8) |
26382 | { |
26383 | u32 adr, res; |
26384 | u32 src, dst; |
26385 | |
26386 | FETCH_SWORD(adr); |
26387 | PRE_IO |
26388 | READ_LONG_F(adr, src) |
26389 | res = DREGu32((Opcode >> 9) & 7); |
26390 | res |= src; |
26391 | flag_C = 0; |
26392 | flag_V = 0; |
26393 | flag_NotZ = res; |
26394 | flag_N = res >> 24; |
26395 | DREGu32((Opcode >> 9) & 7) = res; |
26396 | POST_IO |
26397 | RET(18) |
26398 | } |
26399 | |
26400 | // ORaD |
26401 | OPCODE(0x80B9) |
26402 | { |
26403 | u32 adr, res; |
26404 | u32 src, dst; |
26405 | |
26406 | FETCH_LONG(adr); |
26407 | PRE_IO |
26408 | READ_LONG_F(adr, src) |
26409 | res = DREGu32((Opcode >> 9) & 7); |
26410 | res |= src; |
26411 | flag_C = 0; |
26412 | flag_V = 0; |
26413 | flag_NotZ = res; |
26414 | flag_N = res >> 24; |
26415 | DREGu32((Opcode >> 9) & 7) = res; |
26416 | POST_IO |
26417 | RET(22) |
26418 | } |
26419 | |
26420 | // ORaD |
26421 | OPCODE(0x80BA) |
26422 | { |
26423 | u32 adr, res; |
26424 | u32 src, dst; |
26425 | |
be26eb23 |
26426 | adr = GET_SWORD + GET_PC; |
70357ce5 |
26427 | PC++; |
26428 | PRE_IO |
26429 | READ_LONG_F(adr, src) |
26430 | res = DREGu32((Opcode >> 9) & 7); |
26431 | res |= src; |
26432 | flag_C = 0; |
26433 | flag_V = 0; |
26434 | flag_NotZ = res; |
26435 | flag_N = res >> 24; |
26436 | DREGu32((Opcode >> 9) & 7) = res; |
26437 | POST_IO |
26438 | RET(18) |
26439 | } |
26440 | |
26441 | // ORaD |
26442 | OPCODE(0x80BB) |
26443 | { |
26444 | u32 adr, res; |
26445 | u32 src, dst; |
26446 | |
be26eb23 |
26447 | adr = GET_PC; |
70357ce5 |
26448 | DECODE_EXT_WORD |
26449 | PRE_IO |
26450 | READ_LONG_F(adr, src) |
26451 | res = DREGu32((Opcode >> 9) & 7); |
26452 | res |= src; |
26453 | flag_C = 0; |
26454 | flag_V = 0; |
26455 | flag_NotZ = res; |
26456 | flag_N = res >> 24; |
26457 | DREGu32((Opcode >> 9) & 7) = res; |
26458 | POST_IO |
26459 | RET(20) |
26460 | } |
26461 | |
26462 | // ORaD |
26463 | OPCODE(0x80BC) |
26464 | { |
26465 | u32 adr, res; |
26466 | u32 src, dst; |
26467 | |
26468 | FETCH_LONG(src); |
26469 | res = DREGu32((Opcode >> 9) & 7); |
26470 | res |= src; |
26471 | flag_C = 0; |
26472 | flag_V = 0; |
26473 | flag_NotZ = res; |
26474 | flag_N = res >> 24; |
26475 | DREGu32((Opcode >> 9) & 7) = res; |
26476 | RET(16) |
26477 | } |
26478 | |
26479 | // ORaD |
26480 | OPCODE(0x809F) |
26481 | { |
26482 | u32 adr, res; |
26483 | u32 src, dst; |
26484 | |
26485 | adr = AREG(7); |
26486 | AREG(7) += 4; |
26487 | PRE_IO |
26488 | READ_LONG_F(adr, src) |
26489 | res = DREGu32((Opcode >> 9) & 7); |
26490 | res |= src; |
26491 | flag_C = 0; |
26492 | flag_V = 0; |
26493 | flag_NotZ = res; |
26494 | flag_N = res >> 24; |
26495 | DREGu32((Opcode >> 9) & 7) = res; |
26496 | POST_IO |
26497 | RET(14) |
26498 | } |
26499 | |
26500 | // ORaD |
26501 | OPCODE(0x80A7) |
26502 | { |
26503 | u32 adr, res; |
26504 | u32 src, dst; |
26505 | |
26506 | adr = AREG(7) - 4; |
26507 | AREG(7) = adr; |
26508 | PRE_IO |
26509 | READ_LONG_F(adr, src) |
26510 | res = DREGu32((Opcode >> 9) & 7); |
26511 | res |= src; |
26512 | flag_C = 0; |
26513 | flag_V = 0; |
26514 | flag_NotZ = res; |
26515 | flag_N = res >> 24; |
26516 | DREGu32((Opcode >> 9) & 7) = res; |
26517 | POST_IO |
26518 | RET(16) |
26519 | } |
26520 | |
26521 | // ORDa |
26522 | OPCODE(0x8110) |
26523 | { |
26524 | u32 adr, res; |
26525 | u32 src, dst; |
26526 | |
26527 | src = DREGu8((Opcode >> 9) & 7); |
26528 | adr = AREG((Opcode >> 0) & 7); |
26529 | PRE_IO |
26530 | READ_BYTE_F(adr, res) |
26531 | res |= src; |
26532 | flag_C = 0; |
26533 | flag_V = 0; |
26534 | flag_NotZ = res; |
26535 | flag_N = res; |
26536 | WRITE_BYTE_F(adr, res) |
26537 | POST_IO |
26538 | RET(12) |
26539 | } |
26540 | |
26541 | // ORDa |
26542 | OPCODE(0x8118) |
26543 | { |
26544 | u32 adr, res; |
26545 | u32 src, dst; |
26546 | |
26547 | src = DREGu8((Opcode >> 9) & 7); |
26548 | adr = AREG((Opcode >> 0) & 7); |
26549 | AREG((Opcode >> 0) & 7) += 1; |
26550 | PRE_IO |
26551 | READ_BYTE_F(adr, res) |
26552 | res |= src; |
26553 | flag_C = 0; |
26554 | flag_V = 0; |
26555 | flag_NotZ = res; |
26556 | flag_N = res; |
26557 | WRITE_BYTE_F(adr, res) |
26558 | POST_IO |
26559 | RET(12) |
26560 | } |
26561 | |
26562 | // ORDa |
26563 | OPCODE(0x8120) |
26564 | { |
26565 | u32 adr, res; |
26566 | u32 src, dst; |
26567 | |
26568 | src = DREGu8((Opcode >> 9) & 7); |
26569 | adr = AREG((Opcode >> 0) & 7) - 1; |
26570 | AREG((Opcode >> 0) & 7) = adr; |
26571 | PRE_IO |
26572 | READ_BYTE_F(adr, res) |
26573 | res |= src; |
26574 | flag_C = 0; |
26575 | flag_V = 0; |
26576 | flag_NotZ = res; |
26577 | flag_N = res; |
26578 | WRITE_BYTE_F(adr, res) |
26579 | POST_IO |
26580 | RET(14) |
26581 | } |
26582 | |
26583 | // ORDa |
26584 | OPCODE(0x8128) |
26585 | { |
26586 | u32 adr, res; |
26587 | u32 src, dst; |
26588 | |
26589 | src = DREGu8((Opcode >> 9) & 7); |
26590 | FETCH_SWORD(adr); |
26591 | adr += AREG((Opcode >> 0) & 7); |
26592 | PRE_IO |
26593 | READ_BYTE_F(adr, res) |
26594 | res |= src; |
26595 | flag_C = 0; |
26596 | flag_V = 0; |
26597 | flag_NotZ = res; |
26598 | flag_N = res; |
26599 | WRITE_BYTE_F(adr, res) |
26600 | POST_IO |
26601 | RET(16) |
26602 | } |
26603 | |
26604 | // ORDa |
26605 | OPCODE(0x8130) |
26606 | { |
26607 | u32 adr, res; |
26608 | u32 src, dst; |
26609 | |
26610 | src = DREGu8((Opcode >> 9) & 7); |
26611 | adr = AREG((Opcode >> 0) & 7); |
26612 | DECODE_EXT_WORD |
26613 | PRE_IO |
26614 | READ_BYTE_F(adr, res) |
26615 | res |= src; |
26616 | flag_C = 0; |
26617 | flag_V = 0; |
26618 | flag_NotZ = res; |
26619 | flag_N = res; |
26620 | WRITE_BYTE_F(adr, res) |
26621 | POST_IO |
26622 | RET(18) |
26623 | } |
26624 | |
26625 | // ORDa |
26626 | OPCODE(0x8138) |
26627 | { |
26628 | u32 adr, res; |
26629 | u32 src, dst; |
26630 | |
26631 | src = DREGu8((Opcode >> 9) & 7); |
26632 | FETCH_SWORD(adr); |
26633 | PRE_IO |
26634 | READ_BYTE_F(adr, res) |
26635 | res |= src; |
26636 | flag_C = 0; |
26637 | flag_V = 0; |
26638 | flag_NotZ = res; |
26639 | flag_N = res; |
26640 | WRITE_BYTE_F(adr, res) |
26641 | POST_IO |
26642 | RET(16) |
26643 | } |
26644 | |
26645 | // ORDa |
26646 | OPCODE(0x8139) |
26647 | { |
26648 | u32 adr, res; |
26649 | u32 src, dst; |
26650 | |
26651 | src = DREGu8((Opcode >> 9) & 7); |
26652 | FETCH_LONG(adr); |
26653 | PRE_IO |
26654 | READ_BYTE_F(adr, res) |
26655 | res |= src; |
26656 | flag_C = 0; |
26657 | flag_V = 0; |
26658 | flag_NotZ = res; |
26659 | flag_N = res; |
26660 | WRITE_BYTE_F(adr, res) |
26661 | POST_IO |
26662 | RET(20) |
26663 | } |
26664 | |
26665 | // ORDa |
26666 | OPCODE(0x811F) |
26667 | { |
26668 | u32 adr, res; |
26669 | u32 src, dst; |
26670 | |
26671 | src = DREGu8((Opcode >> 9) & 7); |
26672 | adr = AREG(7); |
26673 | AREG(7) += 2; |
26674 | PRE_IO |
26675 | READ_BYTE_F(adr, res) |
26676 | res |= src; |
26677 | flag_C = 0; |
26678 | flag_V = 0; |
26679 | flag_NotZ = res; |
26680 | flag_N = res; |
26681 | WRITE_BYTE_F(adr, res) |
26682 | POST_IO |
26683 | RET(12) |
26684 | } |
26685 | |
26686 | // ORDa |
26687 | OPCODE(0x8127) |
26688 | { |
26689 | u32 adr, res; |
26690 | u32 src, dst; |
26691 | |
26692 | src = DREGu8((Opcode >> 9) & 7); |
26693 | adr = AREG(7) - 2; |
26694 | AREG(7) = adr; |
26695 | PRE_IO |
26696 | READ_BYTE_F(adr, res) |
26697 | res |= src; |
26698 | flag_C = 0; |
26699 | flag_V = 0; |
26700 | flag_NotZ = res; |
26701 | flag_N = res; |
26702 | WRITE_BYTE_F(adr, res) |
26703 | POST_IO |
26704 | RET(14) |
26705 | } |
26706 | |
26707 | // ORDa |
26708 | OPCODE(0x8150) |
26709 | { |
26710 | u32 adr, res; |
26711 | u32 src, dst; |
26712 | |
26713 | src = DREGu16((Opcode >> 9) & 7); |
26714 | adr = AREG((Opcode >> 0) & 7); |
26715 | PRE_IO |
26716 | READ_WORD_F(adr, res) |
26717 | res |= src; |
26718 | flag_C = 0; |
26719 | flag_V = 0; |
26720 | flag_NotZ = res; |
26721 | flag_N = res >> 8; |
26722 | WRITE_WORD_F(adr, res) |
26723 | POST_IO |
26724 | RET(12) |
26725 | } |
26726 | |
26727 | // ORDa |
26728 | OPCODE(0x8158) |
26729 | { |
26730 | u32 adr, res; |
26731 | u32 src, dst; |
26732 | |
26733 | src = DREGu16((Opcode >> 9) & 7); |
26734 | adr = AREG((Opcode >> 0) & 7); |
26735 | AREG((Opcode >> 0) & 7) += 2; |
26736 | PRE_IO |
26737 | READ_WORD_F(adr, res) |
26738 | res |= src; |
26739 | flag_C = 0; |
26740 | flag_V = 0; |
26741 | flag_NotZ = res; |
26742 | flag_N = res >> 8; |
26743 | WRITE_WORD_F(adr, res) |
26744 | POST_IO |
26745 | RET(12) |
26746 | } |
26747 | |
26748 | // ORDa |
26749 | OPCODE(0x8160) |
26750 | { |
26751 | u32 adr, res; |
26752 | u32 src, dst; |
26753 | |
26754 | src = DREGu16((Opcode >> 9) & 7); |
26755 | adr = AREG((Opcode >> 0) & 7) - 2; |
26756 | AREG((Opcode >> 0) & 7) = adr; |
26757 | PRE_IO |
26758 | READ_WORD_F(adr, res) |
26759 | res |= src; |
26760 | flag_C = 0; |
26761 | flag_V = 0; |
26762 | flag_NotZ = res; |
26763 | flag_N = res >> 8; |
26764 | WRITE_WORD_F(adr, res) |
26765 | POST_IO |
26766 | RET(14) |
26767 | } |
26768 | |
26769 | // ORDa |
26770 | OPCODE(0x8168) |
26771 | { |
26772 | u32 adr, res; |
26773 | u32 src, dst; |
26774 | |
26775 | src = DREGu16((Opcode >> 9) & 7); |
26776 | FETCH_SWORD(adr); |
26777 | adr += AREG((Opcode >> 0) & 7); |
26778 | PRE_IO |
26779 | READ_WORD_F(adr, res) |
26780 | res |= src; |
26781 | flag_C = 0; |
26782 | flag_V = 0; |
26783 | flag_NotZ = res; |
26784 | flag_N = res >> 8; |
26785 | WRITE_WORD_F(adr, res) |
26786 | POST_IO |
26787 | RET(16) |
26788 | } |
26789 | |
26790 | // ORDa |
26791 | OPCODE(0x8170) |
26792 | { |
26793 | u32 adr, res; |
26794 | u32 src, dst; |
26795 | |
26796 | src = DREGu16((Opcode >> 9) & 7); |
26797 | adr = AREG((Opcode >> 0) & 7); |
26798 | DECODE_EXT_WORD |
26799 | PRE_IO |
26800 | READ_WORD_F(adr, res) |
26801 | res |= src; |
26802 | flag_C = 0; |
26803 | flag_V = 0; |
26804 | flag_NotZ = res; |
26805 | flag_N = res >> 8; |
26806 | WRITE_WORD_F(adr, res) |
26807 | POST_IO |
26808 | RET(18) |
26809 | } |
26810 | |
26811 | // ORDa |
26812 | OPCODE(0x8178) |
26813 | { |
26814 | u32 adr, res; |
26815 | u32 src, dst; |
26816 | |
26817 | src = DREGu16((Opcode >> 9) & 7); |
26818 | FETCH_SWORD(adr); |
26819 | PRE_IO |
26820 | READ_WORD_F(adr, res) |
26821 | res |= src; |
26822 | flag_C = 0; |
26823 | flag_V = 0; |
26824 | flag_NotZ = res; |
26825 | flag_N = res >> 8; |
26826 | WRITE_WORD_F(adr, res) |
26827 | POST_IO |
26828 | RET(16) |
26829 | } |
26830 | |
26831 | // ORDa |
26832 | OPCODE(0x8179) |
26833 | { |
26834 | u32 adr, res; |
26835 | u32 src, dst; |
26836 | |
26837 | src = DREGu16((Opcode >> 9) & 7); |
26838 | FETCH_LONG(adr); |
26839 | PRE_IO |
26840 | READ_WORD_F(adr, res) |
26841 | res |= src; |
26842 | flag_C = 0; |
26843 | flag_V = 0; |
26844 | flag_NotZ = res; |
26845 | flag_N = res >> 8; |
26846 | WRITE_WORD_F(adr, res) |
26847 | POST_IO |
26848 | RET(20) |
26849 | } |
26850 | |
26851 | // ORDa |
26852 | OPCODE(0x815F) |
26853 | { |
26854 | u32 adr, res; |
26855 | u32 src, dst; |
26856 | |
26857 | src = DREGu16((Opcode >> 9) & 7); |
26858 | adr = AREG(7); |
26859 | AREG(7) += 2; |
26860 | PRE_IO |
26861 | READ_WORD_F(adr, res) |
26862 | res |= src; |
26863 | flag_C = 0; |
26864 | flag_V = 0; |
26865 | flag_NotZ = res; |
26866 | flag_N = res >> 8; |
26867 | WRITE_WORD_F(adr, res) |
26868 | POST_IO |
26869 | RET(12) |
26870 | } |
26871 | |
26872 | // ORDa |
26873 | OPCODE(0x8167) |
26874 | { |
26875 | u32 adr, res; |
26876 | u32 src, dst; |
26877 | |
26878 | src = DREGu16((Opcode >> 9) & 7); |
26879 | adr = AREG(7) - 2; |
26880 | AREG(7) = adr; |
26881 | PRE_IO |
26882 | READ_WORD_F(adr, res) |
26883 | res |= src; |
26884 | flag_C = 0; |
26885 | flag_V = 0; |
26886 | flag_NotZ = res; |
26887 | flag_N = res >> 8; |
26888 | WRITE_WORD_F(adr, res) |
26889 | POST_IO |
26890 | RET(14) |
26891 | } |
26892 | |
26893 | // ORDa |
26894 | OPCODE(0x8190) |
26895 | { |
26896 | u32 adr, res; |
26897 | u32 src, dst; |
26898 | |
26899 | src = DREGu32((Opcode >> 9) & 7); |
26900 | adr = AREG((Opcode >> 0) & 7); |
26901 | PRE_IO |
26902 | READ_LONG_F(adr, res) |
26903 | res |= src; |
26904 | flag_C = 0; |
26905 | flag_V = 0; |
26906 | flag_NotZ = res; |
26907 | flag_N = res >> 24; |
26908 | WRITE_LONG_F(adr, res) |
26909 | POST_IO |
26910 | RET(20) |
26911 | } |
26912 | |
26913 | // ORDa |
26914 | OPCODE(0x8198) |
26915 | { |
26916 | u32 adr, res; |
26917 | u32 src, dst; |
26918 | |
26919 | src = DREGu32((Opcode >> 9) & 7); |
26920 | adr = AREG((Opcode >> 0) & 7); |
26921 | AREG((Opcode >> 0) & 7) += 4; |
26922 | PRE_IO |
26923 | READ_LONG_F(adr, res) |
26924 | res |= src; |
26925 | flag_C = 0; |
26926 | flag_V = 0; |
26927 | flag_NotZ = res; |
26928 | flag_N = res >> 24; |
26929 | WRITE_LONG_F(adr, res) |
26930 | POST_IO |
26931 | RET(20) |
26932 | } |
26933 | |
26934 | // ORDa |
26935 | OPCODE(0x81A0) |
26936 | { |
26937 | u32 adr, res; |
26938 | u32 src, dst; |
26939 | |
26940 | src = DREGu32((Opcode >> 9) & 7); |
26941 | adr = AREG((Opcode >> 0) & 7) - 4; |
26942 | AREG((Opcode >> 0) & 7) = adr; |
26943 | PRE_IO |
26944 | READ_LONG_F(adr, res) |
26945 | res |= src; |
26946 | flag_C = 0; |
26947 | flag_V = 0; |
26948 | flag_NotZ = res; |
26949 | flag_N = res >> 24; |
26950 | WRITE_LONG_F(adr, res) |
26951 | POST_IO |
26952 | RET(22) |
26953 | } |
26954 | |
26955 | // ORDa |
26956 | OPCODE(0x81A8) |
26957 | { |
26958 | u32 adr, res; |
26959 | u32 src, dst; |
26960 | |
26961 | src = DREGu32((Opcode >> 9) & 7); |
26962 | FETCH_SWORD(adr); |
26963 | adr += AREG((Opcode >> 0) & 7); |
26964 | PRE_IO |
26965 | READ_LONG_F(adr, res) |
26966 | res |= src; |
26967 | flag_C = 0; |
26968 | flag_V = 0; |
26969 | flag_NotZ = res; |
26970 | flag_N = res >> 24; |
26971 | WRITE_LONG_F(adr, res) |
26972 | POST_IO |
26973 | RET(24) |
26974 | } |
26975 | |
26976 | // ORDa |
26977 | OPCODE(0x81B0) |
26978 | { |
26979 | u32 adr, res; |
26980 | u32 src, dst; |
26981 | |
26982 | src = DREGu32((Opcode >> 9) & 7); |
26983 | adr = AREG((Opcode >> 0) & 7); |
26984 | DECODE_EXT_WORD |
26985 | PRE_IO |
26986 | READ_LONG_F(adr, res) |
26987 | res |= src; |
26988 | flag_C = 0; |
26989 | flag_V = 0; |
26990 | flag_NotZ = res; |
26991 | flag_N = res >> 24; |
26992 | WRITE_LONG_F(adr, res) |
26993 | POST_IO |
26994 | RET(26) |
26995 | } |
26996 | |
26997 | // ORDa |
26998 | OPCODE(0x81B8) |
26999 | { |
27000 | u32 adr, res; |
27001 | u32 src, dst; |
27002 | |
27003 | src = DREGu32((Opcode >> 9) & 7); |
27004 | FETCH_SWORD(adr); |
27005 | PRE_IO |
27006 | READ_LONG_F(adr, res) |
27007 | res |= src; |
27008 | flag_C = 0; |
27009 | flag_V = 0; |
27010 | flag_NotZ = res; |
27011 | flag_N = res >> 24; |
27012 | WRITE_LONG_F(adr, res) |
27013 | POST_IO |
27014 | RET(24) |
27015 | } |
27016 | |
27017 | // ORDa |
27018 | OPCODE(0x81B9) |
27019 | { |
27020 | u32 adr, res; |
27021 | u32 src, dst; |
27022 | |
27023 | src = DREGu32((Opcode >> 9) & 7); |
27024 | FETCH_LONG(adr); |
27025 | PRE_IO |
27026 | READ_LONG_F(adr, res) |
27027 | res |= src; |
27028 | flag_C = 0; |
27029 | flag_V = 0; |
27030 | flag_NotZ = res; |
27031 | flag_N = res >> 24; |
27032 | WRITE_LONG_F(adr, res) |
27033 | POST_IO |
27034 | RET(28) |
27035 | } |
27036 | |
27037 | // ORDa |
27038 | OPCODE(0x819F) |
27039 | { |
27040 | u32 adr, res; |
27041 | u32 src, dst; |
27042 | |
27043 | src = DREGu32((Opcode >> 9) & 7); |
27044 | adr = AREG(7); |
27045 | AREG(7) += 4; |
27046 | PRE_IO |
27047 | READ_LONG_F(adr, res) |
27048 | res |= src; |
27049 | flag_C = 0; |
27050 | flag_V = 0; |
27051 | flag_NotZ = res; |
27052 | flag_N = res >> 24; |
27053 | WRITE_LONG_F(adr, res) |
27054 | POST_IO |
27055 | RET(20) |
27056 | } |
27057 | |
27058 | // ORDa |
27059 | OPCODE(0x81A7) |
27060 | { |
27061 | u32 adr, res; |
27062 | u32 src, dst; |
27063 | |
27064 | src = DREGu32((Opcode >> 9) & 7); |
27065 | adr = AREG(7) - 4; |
27066 | AREG(7) = adr; |
27067 | PRE_IO |
27068 | READ_LONG_F(adr, res) |
27069 | res |= src; |
27070 | flag_C = 0; |
27071 | flag_V = 0; |
27072 | flag_NotZ = res; |
27073 | flag_N = res >> 24; |
27074 | WRITE_LONG_F(adr, res) |
27075 | POST_IO |
27076 | RET(22) |
27077 | } |
27078 | |
27079 | // SBCD |
27080 | OPCODE(0x8100) |
27081 | { |
27082 | u32 adr, res; |
27083 | u32 src, dst; |
c6e1e977 |
27084 | u32 corf = 0; |
70357ce5 |
27085 | |
27086 | src = DREGu8((Opcode >> 0) & 7); |
27087 | dst = DREGu8((Opcode >> 9) & 7); |
27088 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
27089 | if (res > 0xF) corf = 6; |
70357ce5 |
27090 | res += (dst & 0xF0) - (src & 0xF0); |
c6e1e977 |
27091 | flag_V = res; |
27092 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
27093 | if (res > 0xff) res += 0xA0; |
27094 | res = (res - corf) & 0xFF; |
27095 | flag_V &= ~res; |
27096 | flag_NotZ |= res; |
70357ce5 |
27097 | flag_N = res; |
27098 | DREGu8((Opcode >> 9) & 7) = res; |
27099 | RET(6) |
27100 | } |
27101 | |
27102 | // SBCDM |
27103 | OPCODE(0x8108) |
27104 | { |
27105 | u32 adr, res; |
27106 | u32 src, dst; |
c6e1e977 |
27107 | u32 corf = 0; |
70357ce5 |
27108 | |
27109 | adr = AREG((Opcode >> 0) & 7) - 1; |
27110 | AREG((Opcode >> 0) & 7) = adr; |
27111 | PRE_IO |
27112 | READ_BYTE_F(adr, src) |
27113 | adr = AREG((Opcode >> 9) & 7) - 1; |
27114 | AREG((Opcode >> 9) & 7) = adr; |
27115 | READ_BYTE_F(adr, dst) |
27116 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
27117 | if (res > 0xF) corf = 6; |
70357ce5 |
27118 | res += (dst & 0xF0) - (src & 0xF0); |
c6e1e977 |
27119 | flag_V = res; |
27120 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
27121 | if (res > 0xff) res += 0xA0; |
27122 | res = (res - corf) & 0xFF; |
27123 | flag_V &= ~res; |
27124 | flag_NotZ |= res; |
70357ce5 |
27125 | flag_N = res; |
27126 | WRITE_BYTE_F(adr, res) |
27127 | POST_IO |
27128 | RET(18) |
27129 | } |
27130 | |
27131 | // SBCD7M |
27132 | OPCODE(0x810F) |
27133 | { |
27134 | u32 adr, res; |
27135 | u32 src, dst; |
c6e1e977 |
27136 | u32 corf = 0; |
70357ce5 |
27137 | |
27138 | adr = AREG(7) - 2; |
27139 | AREG(7) = adr; |
27140 | PRE_IO |
27141 | READ_BYTE_F(adr, src) |
27142 | adr = AREG((Opcode >> 9) & 7) - 1; |
27143 | AREG((Opcode >> 9) & 7) = adr; |
27144 | READ_BYTE_F(adr, dst) |
27145 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
27146 | if (res > 0xF) corf = 6; |
70357ce5 |
27147 | res += (dst & 0xF0) - (src & 0xF0); |
c6e1e977 |
27148 | flag_V = res; |
27149 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
27150 | if (res > 0xff) res += 0xA0; |
27151 | res = (res - corf) & 0xFF; |
27152 | flag_V &= ~res; |
27153 | flag_NotZ |= res; |
70357ce5 |
27154 | flag_N = res; |
27155 | WRITE_BYTE_F(adr, res) |
27156 | POST_IO |
27157 | RET(18) |
27158 | } |
27159 | |
27160 | // SBCDM7 |
27161 | OPCODE(0x8F08) |
27162 | { |
27163 | u32 adr, res; |
27164 | u32 src, dst; |
c6e1e977 |
27165 | u32 corf = 0; |
70357ce5 |
27166 | |
27167 | adr = AREG((Opcode >> 0) & 7) - 1; |
27168 | AREG((Opcode >> 0) & 7) = adr; |
27169 | PRE_IO |
27170 | READ_BYTE_F(adr, src) |
27171 | adr = AREG(7) - 2; |
27172 | AREG(7) = adr; |
27173 | READ_BYTE_F(adr, dst) |
27174 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
27175 | if (res > 0xF) corf = 6; |
70357ce5 |
27176 | res += (dst & 0xF0) - (src & 0xF0); |
c6e1e977 |
27177 | flag_V = res; |
27178 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
27179 | if (res > 0xff) res += 0xA0; |
27180 | res = (res - corf) & 0xFF; |
27181 | flag_V &= ~res; |
27182 | flag_NotZ |= res; |
70357ce5 |
27183 | flag_N = res; |
27184 | WRITE_BYTE_F(adr, res) |
27185 | POST_IO |
27186 | RET(18) |
27187 | } |
27188 | |
27189 | // SBCD7M7 |
27190 | OPCODE(0x8F0F) |
27191 | { |
27192 | u32 adr, res; |
27193 | u32 src, dst; |
c6e1e977 |
27194 | u32 corf = 0; |
70357ce5 |
27195 | |
27196 | adr = AREG(7) - 2; |
27197 | AREG(7) = adr; |
27198 | PRE_IO |
27199 | READ_BYTE_F(adr, src) |
27200 | adr = AREG(7) - 2; |
27201 | AREG(7) = adr; |
27202 | READ_BYTE_F(adr, dst) |
27203 | res = (dst & 0xF) - (src & 0xF) - ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
27204 | if (res > 0xF) corf = 6; |
70357ce5 |
27205 | res += (dst & 0xF0) - (src & 0xF0); |
c6e1e977 |
27206 | flag_V = res; |
27207 | flag_X = flag_C = (s32)res < (s32)corf ? M68K_SR_C : 0; |
27208 | if (res > 0xff) res += 0xA0; |
27209 | res = (res - corf) & 0xFF; |
27210 | flag_V &= ~res; |
27211 | flag_NotZ |= res; |
70357ce5 |
27212 | flag_N = res; |
27213 | WRITE_BYTE_F(adr, res) |
27214 | POST_IO |
27215 | RET(18) |
27216 | } |
27217 | |
27218 | // DIVU |
27219 | OPCODE(0x80C0) |
27220 | { |
27221 | u32 adr, res; |
27222 | u32 src, dst; |
27223 | |
27224 | src = DREGu16((Opcode >> 0) & 7); |
27225 | if (src == 0) |
27226 | { |
7669591e |
27227 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27228 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27229 | RET(4) |
70357ce5 |
27230 | #else |
3f591822 |
27231 | RET(14) |
70357ce5 |
27232 | #endif |
27233 | } |
27234 | dst = DREGu32((Opcode >> 9) & 7); |
27235 | { |
27236 | u32 q, r; |
27237 | |
27238 | q = dst / src; |
27239 | r = dst % src; |
27240 | |
27241 | if (q & 0xFFFF0000) |
27242 | { |
27243 | flag_V = M68K_SR_V; |
27244 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27245 | RET(10) |
70357ce5 |
27246 | #else |
27247 | RET(70) |
27248 | #endif |
27249 | } |
27250 | q &= 0x0000FFFF; |
27251 | flag_NotZ = q; |
27252 | flag_N = q >> 8; |
27253 | flag_V = flag_C = 0; |
27254 | res = q | (r << 16); |
27255 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27256 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27257 | RET(138-BITCOUNT(res,q)*2) |
70357ce5 |
27258 | #else |
27259 | RET(90) |
27260 | #endif |
3f591822 |
27261 | } |
70357ce5 |
27262 | } |
27263 | |
27264 | // DIVU |
27265 | OPCODE(0x80D0) |
27266 | { |
27267 | u32 adr, res; |
27268 | u32 src, dst; |
27269 | |
27270 | adr = AREG((Opcode >> 0) & 7); |
27271 | PRE_IO |
27272 | READ_WORD_F(adr, src) |
27273 | if (src == 0) |
27274 | { |
7669591e |
27275 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27276 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27277 | RET(8) |
70357ce5 |
27278 | #else |
3f591822 |
27279 | RET(18) |
70357ce5 |
27280 | #endif |
27281 | } |
27282 | dst = DREGu32((Opcode >> 9) & 7); |
27283 | { |
27284 | u32 q, r; |
27285 | |
27286 | q = dst / src; |
27287 | r = dst % src; |
27288 | |
27289 | if (q & 0xFFFF0000) |
27290 | { |
27291 | flag_V = M68K_SR_V; |
27292 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27293 | RET(14) |
70357ce5 |
27294 | #else |
27295 | RET(74) |
27296 | #endif |
27297 | } |
27298 | q &= 0x0000FFFF; |
27299 | flag_NotZ = q; |
27300 | flag_N = q >> 8; |
27301 | flag_V = flag_C = 0; |
27302 | res = q | (r << 16); |
27303 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27304 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27305 | RET(142-BITCOUNT(res,q)*2) |
70357ce5 |
27306 | #else |
27307 | RET(94) |
27308 | #endif |
3f591822 |
27309 | } |
70357ce5 |
27310 | } |
27311 | |
27312 | // DIVU |
27313 | OPCODE(0x80D8) |
27314 | { |
27315 | u32 adr, res; |
27316 | u32 src, dst; |
27317 | |
27318 | adr = AREG((Opcode >> 0) & 7); |
27319 | AREG((Opcode >> 0) & 7) += 2; |
27320 | PRE_IO |
27321 | READ_WORD_F(adr, src) |
27322 | if (src == 0) |
27323 | { |
7669591e |
27324 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27325 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27326 | RET(8) |
70357ce5 |
27327 | #else |
3f591822 |
27328 | RET(18) |
70357ce5 |
27329 | #endif |
27330 | } |
27331 | dst = DREGu32((Opcode >> 9) & 7); |
27332 | { |
27333 | u32 q, r; |
27334 | |
27335 | q = dst / src; |
27336 | r = dst % src; |
27337 | |
27338 | if (q & 0xFFFF0000) |
27339 | { |
27340 | flag_V = M68K_SR_V; |
27341 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27342 | RET(14) |
70357ce5 |
27343 | #else |
27344 | RET(74) |
27345 | #endif |
27346 | } |
27347 | q &= 0x0000FFFF; |
27348 | flag_NotZ = q; |
27349 | flag_N = q >> 8; |
27350 | flag_V = flag_C = 0; |
27351 | res = q | (r << 16); |
27352 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27353 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27354 | RET(142-BITCOUNT(res,q)*2) |
70357ce5 |
27355 | #else |
27356 | RET(94) |
27357 | #endif |
3f591822 |
27358 | } |
70357ce5 |
27359 | } |
27360 | |
27361 | // DIVU |
27362 | OPCODE(0x80E0) |
27363 | { |
27364 | u32 adr, res; |
27365 | u32 src, dst; |
27366 | |
27367 | adr = AREG((Opcode >> 0) & 7) - 2; |
27368 | AREG((Opcode >> 0) & 7) = adr; |
27369 | PRE_IO |
27370 | READ_WORD_F(adr, src) |
27371 | if (src == 0) |
27372 | { |
7669591e |
27373 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27374 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27375 | RET(10) |
70357ce5 |
27376 | #else |
3f591822 |
27377 | RET(20) |
70357ce5 |
27378 | #endif |
27379 | } |
27380 | dst = DREGu32((Opcode >> 9) & 7); |
27381 | { |
27382 | u32 q, r; |
27383 | |
27384 | q = dst / src; |
27385 | r = dst % src; |
27386 | |
27387 | if (q & 0xFFFF0000) |
27388 | { |
27389 | flag_V = M68K_SR_V; |
27390 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27391 | RET(16) |
70357ce5 |
27392 | #else |
27393 | RET(76) |
27394 | #endif |
27395 | } |
27396 | q &= 0x0000FFFF; |
27397 | flag_NotZ = q; |
27398 | flag_N = q >> 8; |
27399 | flag_V = flag_C = 0; |
27400 | res = q | (r << 16); |
27401 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27402 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27403 | RET(144-BITCOUNT(res,q)*2) |
70357ce5 |
27404 | #else |
27405 | RET(96) |
27406 | #endif |
3f591822 |
27407 | } |
70357ce5 |
27408 | } |
27409 | |
27410 | // DIVU |
27411 | OPCODE(0x80E8) |
27412 | { |
27413 | u32 adr, res; |
27414 | u32 src, dst; |
27415 | |
27416 | FETCH_SWORD(adr); |
27417 | adr += AREG((Opcode >> 0) & 7); |
27418 | PRE_IO |
27419 | READ_WORD_F(adr, src) |
27420 | if (src == 0) |
27421 | { |
7669591e |
27422 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27423 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27424 | RET(12) |
70357ce5 |
27425 | #else |
3f591822 |
27426 | RET(22) |
70357ce5 |
27427 | #endif |
27428 | } |
27429 | dst = DREGu32((Opcode >> 9) & 7); |
27430 | { |
27431 | u32 q, r; |
27432 | |
27433 | q = dst / src; |
27434 | r = dst % src; |
27435 | |
27436 | if (q & 0xFFFF0000) |
27437 | { |
27438 | flag_V = M68K_SR_V; |
27439 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27440 | RET(18) |
70357ce5 |
27441 | #else |
27442 | RET(78) |
27443 | #endif |
27444 | } |
27445 | q &= 0x0000FFFF; |
27446 | flag_NotZ = q; |
27447 | flag_N = q >> 8; |
27448 | flag_V = flag_C = 0; |
27449 | res = q | (r << 16); |
27450 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27451 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27452 | RET(146-BITCOUNT(res,q)*2) |
70357ce5 |
27453 | #else |
27454 | RET(98) |
27455 | #endif |
3f591822 |
27456 | } |
70357ce5 |
27457 | } |
27458 | |
27459 | // DIVU |
27460 | OPCODE(0x80F0) |
27461 | { |
27462 | u32 adr, res; |
27463 | u32 src, dst; |
27464 | |
27465 | adr = AREG((Opcode >> 0) & 7); |
27466 | DECODE_EXT_WORD |
27467 | PRE_IO |
27468 | READ_WORD_F(adr, src) |
27469 | if (src == 0) |
27470 | { |
7669591e |
27471 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27472 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27473 | RET(14) |
70357ce5 |
27474 | #else |
3f591822 |
27475 | RET(24) |
70357ce5 |
27476 | #endif |
27477 | } |
27478 | dst = DREGu32((Opcode >> 9) & 7); |
27479 | { |
27480 | u32 q, r; |
27481 | |
27482 | q = dst / src; |
27483 | r = dst % src; |
27484 | |
27485 | if (q & 0xFFFF0000) |
27486 | { |
27487 | flag_V = M68K_SR_V; |
27488 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27489 | RET(20) |
70357ce5 |
27490 | #else |
27491 | RET(80) |
27492 | #endif |
27493 | } |
27494 | q &= 0x0000FFFF; |
27495 | flag_NotZ = q; |
27496 | flag_N = q >> 8; |
27497 | flag_V = flag_C = 0; |
27498 | res = q | (r << 16); |
27499 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27500 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27501 | RET(148-BITCOUNT(res,q)*2) |
70357ce5 |
27502 | #else |
27503 | RET(100) |
27504 | #endif |
3f591822 |
27505 | } |
70357ce5 |
27506 | } |
27507 | |
27508 | // DIVU |
27509 | OPCODE(0x80F8) |
27510 | { |
27511 | u32 adr, res; |
27512 | u32 src, dst; |
27513 | |
27514 | FETCH_SWORD(adr); |
27515 | PRE_IO |
27516 | READ_WORD_F(adr, src) |
27517 | if (src == 0) |
27518 | { |
7669591e |
27519 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27520 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27521 | RET(12) |
70357ce5 |
27522 | #else |
3f591822 |
27523 | RET(22) |
70357ce5 |
27524 | #endif |
27525 | } |
27526 | dst = DREGu32((Opcode >> 9) & 7); |
27527 | { |
27528 | u32 q, r; |
27529 | |
27530 | q = dst / src; |
27531 | r = dst % src; |
27532 | |
27533 | if (q & 0xFFFF0000) |
27534 | { |
27535 | flag_V = M68K_SR_V; |
27536 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27537 | RET(18) |
70357ce5 |
27538 | #else |
27539 | RET(78) |
27540 | #endif |
27541 | } |
27542 | q &= 0x0000FFFF; |
27543 | flag_NotZ = q; |
27544 | flag_N = q >> 8; |
27545 | flag_V = flag_C = 0; |
27546 | res = q | (r << 16); |
27547 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27548 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27549 | RET(146-BITCOUNT(res,q)*2) |
70357ce5 |
27550 | #else |
27551 | RET(98) |
27552 | #endif |
3f591822 |
27553 | } |
70357ce5 |
27554 | } |
27555 | |
27556 | // DIVU |
27557 | OPCODE(0x80F9) |
27558 | { |
27559 | u32 adr, res; |
27560 | u32 src, dst; |
27561 | |
27562 | FETCH_LONG(adr); |
27563 | PRE_IO |
27564 | READ_WORD_F(adr, src) |
27565 | if (src == 0) |
27566 | { |
7669591e |
27567 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27568 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27569 | RET(16) |
70357ce5 |
27570 | #else |
3f591822 |
27571 | RET(26) |
70357ce5 |
27572 | #endif |
27573 | } |
27574 | dst = DREGu32((Opcode >> 9) & 7); |
27575 | { |
27576 | u32 q, r; |
27577 | |
27578 | q = dst / src; |
27579 | r = dst % src; |
27580 | |
27581 | if (q & 0xFFFF0000) |
27582 | { |
27583 | flag_V = M68K_SR_V; |
27584 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27585 | RET(22) |
70357ce5 |
27586 | #else |
27587 | RET(82) |
27588 | #endif |
27589 | } |
27590 | q &= 0x0000FFFF; |
27591 | flag_NotZ = q; |
27592 | flag_N = q >> 8; |
27593 | flag_V = flag_C = 0; |
27594 | res = q | (r << 16); |
27595 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27596 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27597 | RET(150-BITCOUNT(res,q)*2) |
70357ce5 |
27598 | #else |
27599 | RET(102) |
27600 | #endif |
3f591822 |
27601 | } |
70357ce5 |
27602 | } |
27603 | |
27604 | // DIVU |
27605 | OPCODE(0x80FA) |
27606 | { |
27607 | u32 adr, res; |
27608 | u32 src, dst; |
27609 | |
be26eb23 |
27610 | adr = GET_SWORD + GET_PC; |
70357ce5 |
27611 | PC++; |
27612 | PRE_IO |
27613 | READ_WORD_F(adr, src) |
27614 | if (src == 0) |
27615 | { |
7669591e |
27616 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27617 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27618 | RET(12) |
70357ce5 |
27619 | #else |
3f591822 |
27620 | RET(22) |
70357ce5 |
27621 | #endif |
27622 | } |
27623 | dst = DREGu32((Opcode >> 9) & 7); |
27624 | { |
27625 | u32 q, r; |
27626 | |
27627 | q = dst / src; |
27628 | r = dst % src; |
27629 | |
27630 | if (q & 0xFFFF0000) |
27631 | { |
27632 | flag_V = M68K_SR_V; |
27633 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27634 | RET(18) |
70357ce5 |
27635 | #else |
27636 | RET(78) |
27637 | #endif |
27638 | } |
27639 | q &= 0x0000FFFF; |
27640 | flag_NotZ = q; |
27641 | flag_N = q >> 8; |
27642 | flag_V = flag_C = 0; |
27643 | res = q | (r << 16); |
27644 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27645 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27646 | RET(146-BITCOUNT(res,q)*2) |
70357ce5 |
27647 | #else |
27648 | RET(98) |
27649 | #endif |
3f591822 |
27650 | } |
70357ce5 |
27651 | } |
27652 | |
27653 | // DIVU |
27654 | OPCODE(0x80FB) |
27655 | { |
27656 | u32 adr, res; |
27657 | u32 src, dst; |
27658 | |
be26eb23 |
27659 | adr = GET_PC; |
70357ce5 |
27660 | DECODE_EXT_WORD |
27661 | PRE_IO |
27662 | READ_WORD_F(adr, src) |
27663 | if (src == 0) |
27664 | { |
7669591e |
27665 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27666 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27667 | RET(14) |
70357ce5 |
27668 | #else |
3f591822 |
27669 | RET(24) |
70357ce5 |
27670 | #endif |
27671 | } |
27672 | dst = DREGu32((Opcode >> 9) & 7); |
27673 | { |
27674 | u32 q, r; |
27675 | |
27676 | q = dst / src; |
27677 | r = dst % src; |
27678 | |
27679 | if (q & 0xFFFF0000) |
27680 | { |
27681 | flag_V = M68K_SR_V; |
27682 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27683 | RET(20) |
70357ce5 |
27684 | #else |
27685 | RET(80) |
27686 | #endif |
27687 | } |
27688 | q &= 0x0000FFFF; |
27689 | flag_NotZ = q; |
27690 | flag_N = q >> 8; |
27691 | flag_V = flag_C = 0; |
27692 | res = q | (r << 16); |
27693 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27694 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27695 | RET(148-BITCOUNT(res,q)*2) |
70357ce5 |
27696 | #else |
27697 | RET(100) |
27698 | #endif |
3f591822 |
27699 | } |
70357ce5 |
27700 | } |
27701 | |
27702 | // DIVU |
27703 | OPCODE(0x80FC) |
27704 | { |
27705 | u32 adr, res; |
27706 | u32 src, dst; |
27707 | |
27708 | FETCH_WORD(src); |
27709 | if (src == 0) |
27710 | { |
7669591e |
27711 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27712 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27713 | RET(8) |
70357ce5 |
27714 | #else |
3f591822 |
27715 | RET(18) |
70357ce5 |
27716 | #endif |
27717 | } |
27718 | dst = DREGu32((Opcode >> 9) & 7); |
27719 | { |
27720 | u32 q, r; |
27721 | |
27722 | q = dst / src; |
27723 | r = dst % src; |
27724 | |
27725 | if (q & 0xFFFF0000) |
27726 | { |
27727 | flag_V = M68K_SR_V; |
27728 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27729 | RET(14) |
70357ce5 |
27730 | #else |
27731 | RET(74) |
27732 | #endif |
27733 | } |
27734 | q &= 0x0000FFFF; |
27735 | flag_NotZ = q; |
27736 | flag_N = q >> 8; |
27737 | flag_V = flag_C = 0; |
27738 | res = q | (r << 16); |
27739 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27740 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27741 | RET(142-BITCOUNT(res,q)*2) |
70357ce5 |
27742 | #else |
27743 | RET(94) |
27744 | #endif |
3f591822 |
27745 | } |
70357ce5 |
27746 | } |
27747 | |
27748 | // DIVU |
27749 | OPCODE(0x80DF) |
27750 | { |
27751 | u32 adr, res; |
27752 | u32 src, dst; |
27753 | |
27754 | adr = AREG(7); |
27755 | AREG(7) += 2; |
27756 | PRE_IO |
27757 | READ_WORD_F(adr, src) |
27758 | if (src == 0) |
27759 | { |
7669591e |
27760 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27761 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27762 | RET(8) |
70357ce5 |
27763 | #else |
3f591822 |
27764 | RET(18) |
70357ce5 |
27765 | #endif |
27766 | } |
27767 | dst = DREGu32((Opcode >> 9) & 7); |
27768 | { |
27769 | u32 q, r; |
27770 | |
27771 | q = dst / src; |
27772 | r = dst % src; |
27773 | |
27774 | if (q & 0xFFFF0000) |
27775 | { |
27776 | flag_V = M68K_SR_V; |
27777 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27778 | RET(14) |
70357ce5 |
27779 | #else |
27780 | RET(74) |
27781 | #endif |
27782 | } |
27783 | q &= 0x0000FFFF; |
27784 | flag_NotZ = q; |
27785 | flag_N = q >> 8; |
27786 | flag_V = flag_C = 0; |
27787 | res = q | (r << 16); |
27788 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27789 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27790 | RET(142-BITCOUNT(res,q)*2) |
70357ce5 |
27791 | #else |
27792 | RET(94) |
27793 | #endif |
3f591822 |
27794 | } |
70357ce5 |
27795 | } |
27796 | |
27797 | // DIVU |
27798 | OPCODE(0x80E7) |
27799 | { |
27800 | u32 adr, res; |
27801 | u32 src, dst; |
27802 | |
27803 | adr = AREG(7) - 2; |
27804 | AREG(7) = adr; |
27805 | PRE_IO |
27806 | READ_WORD_F(adr, src) |
27807 | if (src == 0) |
27808 | { |
7669591e |
27809 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27810 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27811 | RET(10) |
70357ce5 |
27812 | #else |
3f591822 |
27813 | RET(20) |
70357ce5 |
27814 | #endif |
27815 | } |
27816 | dst = DREGu32((Opcode >> 9) & 7); |
27817 | { |
27818 | u32 q, r; |
27819 | |
27820 | q = dst / src; |
27821 | r = dst % src; |
27822 | |
27823 | if (q & 0xFFFF0000) |
27824 | { |
27825 | flag_V = M68K_SR_V; |
27826 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27827 | RET(16) |
70357ce5 |
27828 | #else |
27829 | RET(76) |
27830 | #endif |
27831 | } |
27832 | q &= 0x0000FFFF; |
27833 | flag_NotZ = q; |
27834 | flag_N = q >> 8; |
27835 | flag_V = flag_C = 0; |
27836 | res = q | (r << 16); |
27837 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27838 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27839 | RET(144-BITCOUNT(res,q)*2) |
70357ce5 |
27840 | #else |
27841 | RET(96) |
27842 | #endif |
3f591822 |
27843 | } |
70357ce5 |
27844 | } |
27845 | |
27846 | // DIVS |
27847 | OPCODE(0x81C0) |
27848 | { |
27849 | u32 adr, res; |
27850 | u32 src, dst; |
27851 | |
27852 | src = (s32)DREGs16((Opcode >> 0) & 7); |
27853 | if (src == 0) |
27854 | { |
7669591e |
27855 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27856 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27857 | RET(4) |
27858 | #else |
27859 | RET(14) |
70357ce5 |
27860 | #endif |
70357ce5 |
27861 | } |
27862 | dst = DREGu32((Opcode >> 9) & 7); |
27863 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27864 | { |
27865 | flag_NotZ = flag_N = 0; |
27866 | flag_V = flag_C = 0; |
27867 | res = 0; |
27868 | DREGu32((Opcode >> 9) & 7) = res; |
27869 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27870 | RET(16+(dst>>31)*2) |
27871 | #else |
70357ce5 |
27872 | RET(50) |
3f591822 |
27873 | #endif |
70357ce5 |
27874 | } |
27875 | { |
27876 | s32 q, r; |
27877 | |
27878 | q = (s32)dst / (s32)src; |
27879 | r = (s32)dst % (s32)src; |
27880 | |
27881 | if ((q > 0x7FFF) || (q < -0x8000)) |
27882 | { |
27883 | flag_V = M68K_SR_V; |
27884 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27885 | if (q > 0xFFFF || q < -0x10000) { |
27886 | RET(16+(dst>>31)*2) |
1ab87d2b |
27887 | } else RET(152+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
27888 | #else |
70357ce5 |
27889 | RET(80) |
3f591822 |
27890 | #endif |
70357ce5 |
27891 | } |
27892 | q &= 0x0000FFFF; |
27893 | flag_NotZ = q; |
27894 | flag_N = q >> 8; |
27895 | flag_V = flag_C = 0; |
27896 | res = q | (r << 16); |
27897 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27898 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
27899 | RET(152+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
27900 | #else |
70357ce5 |
27901 | RET(108) |
3f591822 |
27902 | #endif |
27903 | } |
70357ce5 |
27904 | } |
27905 | |
27906 | // DIVS |
27907 | OPCODE(0x81D0) |
27908 | { |
27909 | u32 adr, res; |
27910 | u32 src, dst; |
27911 | |
27912 | adr = AREG((Opcode >> 0) & 7); |
27913 | PRE_IO |
27914 | READSX_WORD_F(adr, src) |
27915 | if (src == 0) |
27916 | { |
7669591e |
27917 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27918 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27919 | RET(8) |
27920 | #else |
27921 | RET(18) |
70357ce5 |
27922 | #endif |
70357ce5 |
27923 | } |
27924 | dst = DREGu32((Opcode >> 9) & 7); |
27925 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27926 | { |
27927 | flag_NotZ = flag_N = 0; |
27928 | flag_V = flag_C = 0; |
27929 | res = 0; |
27930 | DREGu32((Opcode >> 9) & 7) = res; |
27931 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27932 | RET(20+(dst>>31)*2) |
27933 | #else |
70357ce5 |
27934 | RET(54) |
3f591822 |
27935 | #endif |
70357ce5 |
27936 | } |
27937 | { |
27938 | s32 q, r; |
27939 | |
27940 | q = (s32)dst / (s32)src; |
27941 | r = (s32)dst % (s32)src; |
27942 | |
27943 | if ((q > 0x7FFF) || (q < -0x8000)) |
27944 | { |
27945 | flag_V = M68K_SR_V; |
27946 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27947 | if (q > 0xFFFF || q < -0x10000) { |
27948 | RET(20+(dst>>31)*2) |
1ab87d2b |
27949 | } else RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
27950 | #else |
70357ce5 |
27951 | RET(84) |
3f591822 |
27952 | #endif |
70357ce5 |
27953 | } |
27954 | q &= 0x0000FFFF; |
27955 | flag_NotZ = q; |
27956 | flag_N = q >> 8; |
27957 | flag_V = flag_C = 0; |
27958 | res = q | (r << 16); |
27959 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
27960 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
27961 | RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
27962 | #else |
70357ce5 |
27963 | RET(112) |
3f591822 |
27964 | #endif |
27965 | } |
70357ce5 |
27966 | } |
27967 | |
27968 | // DIVS |
27969 | OPCODE(0x81D8) |
27970 | { |
27971 | u32 adr, res; |
27972 | u32 src, dst; |
27973 | |
27974 | adr = AREG((Opcode >> 0) & 7); |
27975 | AREG((Opcode >> 0) & 7) += 2; |
27976 | PRE_IO |
27977 | READSX_WORD_F(adr, src) |
27978 | if (src == 0) |
27979 | { |
7669591e |
27980 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
27981 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27982 | RET(8) |
27983 | #else |
27984 | RET(18) |
70357ce5 |
27985 | #endif |
70357ce5 |
27986 | } |
27987 | dst = DREGu32((Opcode >> 9) & 7); |
27988 | if ((dst == 0x80000000) && (src == (u32)-1)) |
27989 | { |
27990 | flag_NotZ = flag_N = 0; |
27991 | flag_V = flag_C = 0; |
27992 | res = 0; |
27993 | DREGu32((Opcode >> 9) & 7) = res; |
27994 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
27995 | RET(20+(dst>>31)*2) |
27996 | #else |
70357ce5 |
27997 | RET(54) |
3f591822 |
27998 | #endif |
70357ce5 |
27999 | } |
28000 | { |
28001 | s32 q, r; |
28002 | |
28003 | q = (s32)dst / (s32)src; |
28004 | r = (s32)dst % (s32)src; |
28005 | |
28006 | if ((q > 0x7FFF) || (q < -0x8000)) |
28007 | { |
28008 | flag_V = M68K_SR_V; |
28009 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28010 | if (q > 0xFFFF || q < -0x10000) { |
28011 | RET(20+(dst>>31)*2) |
1ab87d2b |
28012 | } else RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28013 | #else |
70357ce5 |
28014 | RET(84) |
3f591822 |
28015 | #endif |
70357ce5 |
28016 | } |
28017 | q &= 0x0000FFFF; |
28018 | flag_NotZ = q; |
28019 | flag_N = q >> 8; |
28020 | flag_V = flag_C = 0; |
28021 | res = q | (r << 16); |
28022 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28023 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28024 | RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28025 | #else |
70357ce5 |
28026 | RET(112) |
3f591822 |
28027 | #endif |
28028 | } |
70357ce5 |
28029 | } |
28030 | |
28031 | // DIVS |
28032 | OPCODE(0x81E0) |
28033 | { |
28034 | u32 adr, res; |
28035 | u32 src, dst; |
28036 | |
28037 | adr = AREG((Opcode >> 0) & 7) - 2; |
28038 | AREG((Opcode >> 0) & 7) = adr; |
28039 | PRE_IO |
28040 | READSX_WORD_F(adr, src) |
28041 | if (src == 0) |
28042 | { |
7669591e |
28043 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28044 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28045 | RET(10) |
28046 | #else |
28047 | RET(20) |
70357ce5 |
28048 | #endif |
70357ce5 |
28049 | } |
28050 | dst = DREGu32((Opcode >> 9) & 7); |
28051 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28052 | { |
28053 | flag_NotZ = flag_N = 0; |
28054 | flag_V = flag_C = 0; |
28055 | res = 0; |
28056 | DREGu32((Opcode >> 9) & 7) = res; |
28057 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28058 | RET(22+(dst>>31)*2) |
28059 | #else |
70357ce5 |
28060 | RET(56) |
3f591822 |
28061 | #endif |
70357ce5 |
28062 | } |
28063 | { |
28064 | s32 q, r; |
28065 | |
28066 | q = (s32)dst / (s32)src; |
28067 | r = (s32)dst % (s32)src; |
28068 | |
28069 | if ((q > 0x7FFF) || (q < -0x8000)) |
28070 | { |
28071 | flag_V = M68K_SR_V; |
28072 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28073 | if (q > 0xFFFF || q < -0x10000) { |
28074 | RET(22+(dst>>31)*2) |
1ab87d2b |
28075 | } else RET(158+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28076 | #else |
70357ce5 |
28077 | RET(86) |
3f591822 |
28078 | #endif |
70357ce5 |
28079 | } |
28080 | q &= 0x0000FFFF; |
28081 | flag_NotZ = q; |
28082 | flag_N = q >> 8; |
28083 | flag_V = flag_C = 0; |
28084 | res = q | (r << 16); |
28085 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28086 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28087 | RET(158+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28088 | #else |
70357ce5 |
28089 | RET(114) |
3f591822 |
28090 | #endif |
28091 | } |
70357ce5 |
28092 | } |
28093 | |
28094 | // DIVS |
28095 | OPCODE(0x81E8) |
28096 | { |
28097 | u32 adr, res; |
28098 | u32 src, dst; |
28099 | |
28100 | FETCH_SWORD(adr); |
28101 | adr += AREG((Opcode >> 0) & 7); |
28102 | PRE_IO |
28103 | READSX_WORD_F(adr, src) |
28104 | if (src == 0) |
28105 | { |
7669591e |
28106 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28107 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28108 | RET(12) |
28109 | #else |
28110 | RET(22) |
70357ce5 |
28111 | #endif |
70357ce5 |
28112 | } |
28113 | dst = DREGu32((Opcode >> 9) & 7); |
28114 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28115 | { |
28116 | flag_NotZ = flag_N = 0; |
28117 | flag_V = flag_C = 0; |
28118 | res = 0; |
28119 | DREGu32((Opcode >> 9) & 7) = res; |
28120 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28121 | RET(24+(dst>>31)*2) |
28122 | #else |
70357ce5 |
28123 | RET(58) |
3f591822 |
28124 | #endif |
70357ce5 |
28125 | } |
28126 | { |
28127 | s32 q, r; |
28128 | |
28129 | q = (s32)dst / (s32)src; |
28130 | r = (s32)dst % (s32)src; |
28131 | |
28132 | if ((q > 0x7FFF) || (q < -0x8000)) |
28133 | { |
28134 | flag_V = M68K_SR_V; |
28135 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28136 | if (q > 0xFFFF || q < -0x10000) { |
28137 | RET(24+(dst>>31)*2) |
1ab87d2b |
28138 | } else RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28139 | #else |
70357ce5 |
28140 | RET(88) |
3f591822 |
28141 | #endif |
70357ce5 |
28142 | } |
28143 | q &= 0x0000FFFF; |
28144 | flag_NotZ = q; |
28145 | flag_N = q >> 8; |
28146 | flag_V = flag_C = 0; |
28147 | res = q | (r << 16); |
28148 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28149 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28150 | RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28151 | #else |
70357ce5 |
28152 | RET(116) |
3f591822 |
28153 | #endif |
28154 | } |
70357ce5 |
28155 | } |
28156 | |
28157 | // DIVS |
28158 | OPCODE(0x81F0) |
28159 | { |
28160 | u32 adr, res; |
28161 | u32 src, dst; |
28162 | |
28163 | adr = AREG((Opcode >> 0) & 7); |
28164 | DECODE_EXT_WORD |
28165 | PRE_IO |
28166 | READSX_WORD_F(adr, src) |
28167 | if (src == 0) |
28168 | { |
7669591e |
28169 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28170 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28171 | RET(14) |
28172 | #else |
28173 | RET(24) |
70357ce5 |
28174 | #endif |
70357ce5 |
28175 | } |
28176 | dst = DREGu32((Opcode >> 9) & 7); |
28177 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28178 | { |
28179 | flag_NotZ = flag_N = 0; |
28180 | flag_V = flag_C = 0; |
28181 | res = 0; |
28182 | DREGu32((Opcode >> 9) & 7) = res; |
28183 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28184 | RET(26+(dst>>31)*2) |
28185 | #else |
70357ce5 |
28186 | RET(60) |
3f591822 |
28187 | #endif |
70357ce5 |
28188 | } |
28189 | { |
28190 | s32 q, r; |
28191 | |
28192 | q = (s32)dst / (s32)src; |
28193 | r = (s32)dst % (s32)src; |
28194 | |
28195 | if ((q > 0x7FFF) || (q < -0x8000)) |
28196 | { |
28197 | flag_V = M68K_SR_V; |
28198 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28199 | if (q > 0xFFFF || q < -0x10000) { |
28200 | RET(26+(dst>>31)*2) |
1ab87d2b |
28201 | } else RET(162+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28202 | #else |
70357ce5 |
28203 | RET(90) |
3f591822 |
28204 | #endif |
70357ce5 |
28205 | } |
28206 | q &= 0x0000FFFF; |
28207 | flag_NotZ = q; |
28208 | flag_N = q >> 8; |
28209 | flag_V = flag_C = 0; |
28210 | res = q | (r << 16); |
28211 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28212 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28213 | RET(162+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28214 | #else |
70357ce5 |
28215 | RET(118) |
3f591822 |
28216 | #endif |
28217 | } |
70357ce5 |
28218 | } |
28219 | |
28220 | // DIVS |
28221 | OPCODE(0x81F8) |
28222 | { |
28223 | u32 adr, res; |
28224 | u32 src, dst; |
28225 | |
28226 | FETCH_SWORD(adr); |
28227 | PRE_IO |
28228 | READSX_WORD_F(adr, src) |
28229 | if (src == 0) |
28230 | { |
7669591e |
28231 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28232 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28233 | RET(12) |
28234 | #else |
28235 | RET(22) |
70357ce5 |
28236 | #endif |
70357ce5 |
28237 | } |
28238 | dst = DREGu32((Opcode >> 9) & 7); |
28239 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28240 | { |
28241 | flag_NotZ = flag_N = 0; |
28242 | flag_V = flag_C = 0; |
28243 | res = 0; |
28244 | DREGu32((Opcode >> 9) & 7) = res; |
28245 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28246 | RET(24+(dst>>31)*2) |
28247 | #else |
70357ce5 |
28248 | RET(58) |
3f591822 |
28249 | #endif |
70357ce5 |
28250 | } |
28251 | { |
28252 | s32 q, r; |
28253 | |
28254 | q = (s32)dst / (s32)src; |
28255 | r = (s32)dst % (s32)src; |
28256 | |
28257 | if ((q > 0x7FFF) || (q < -0x8000)) |
28258 | { |
28259 | flag_V = M68K_SR_V; |
28260 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28261 | if (q > 0xFFFF || q < -0x10000) { |
28262 | RET(24+(dst>>31)*2) |
1ab87d2b |
28263 | } else RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28264 | #else |
70357ce5 |
28265 | RET(88) |
3f591822 |
28266 | #endif |
70357ce5 |
28267 | } |
28268 | q &= 0x0000FFFF; |
28269 | flag_NotZ = q; |
28270 | flag_N = q >> 8; |
28271 | flag_V = flag_C = 0; |
28272 | res = q | (r << 16); |
28273 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28274 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28275 | RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28276 | #else |
70357ce5 |
28277 | RET(116) |
3f591822 |
28278 | #endif |
28279 | } |
70357ce5 |
28280 | } |
28281 | |
28282 | // DIVS |
28283 | OPCODE(0x81F9) |
28284 | { |
28285 | u32 adr, res; |
28286 | u32 src, dst; |
28287 | |
28288 | FETCH_LONG(adr); |
28289 | PRE_IO |
28290 | READSX_WORD_F(adr, src) |
28291 | if (src == 0) |
28292 | { |
7669591e |
28293 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28294 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28295 | RET(16) |
28296 | #else |
28297 | RET(26) |
70357ce5 |
28298 | #endif |
70357ce5 |
28299 | } |
28300 | dst = DREGu32((Opcode >> 9) & 7); |
28301 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28302 | { |
28303 | flag_NotZ = flag_N = 0; |
28304 | flag_V = flag_C = 0; |
28305 | res = 0; |
28306 | DREGu32((Opcode >> 9) & 7) = res; |
28307 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28308 | RET(28+(dst>>31)*2) |
28309 | #else |
70357ce5 |
28310 | RET(62) |
3f591822 |
28311 | #endif |
70357ce5 |
28312 | } |
28313 | { |
28314 | s32 q, r; |
28315 | |
28316 | q = (s32)dst / (s32)src; |
28317 | r = (s32)dst % (s32)src; |
28318 | |
28319 | if ((q > 0x7FFF) || (q < -0x8000)) |
28320 | { |
28321 | flag_V = M68K_SR_V; |
28322 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28323 | if (q > 0xFFFF || q < -0x10000) { |
28324 | RET(28+(dst>>31)*2) |
1ab87d2b |
28325 | } else RET(164+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28326 | #else |
70357ce5 |
28327 | RET(92) |
3f591822 |
28328 | #endif |
70357ce5 |
28329 | } |
28330 | q &= 0x0000FFFF; |
28331 | flag_NotZ = q; |
28332 | flag_N = q >> 8; |
28333 | flag_V = flag_C = 0; |
28334 | res = q | (r << 16); |
28335 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28336 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28337 | RET(164+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28338 | #else |
70357ce5 |
28339 | RET(120) |
3f591822 |
28340 | #endif |
28341 | } |
70357ce5 |
28342 | } |
28343 | |
28344 | // DIVS |
28345 | OPCODE(0x81FA) |
28346 | { |
28347 | u32 adr, res; |
28348 | u32 src, dst; |
28349 | |
be26eb23 |
28350 | adr = GET_SWORD + GET_PC; |
70357ce5 |
28351 | PC++; |
28352 | PRE_IO |
28353 | READSX_WORD_F(adr, src) |
28354 | if (src == 0) |
28355 | { |
7669591e |
28356 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28357 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28358 | RET(12) |
28359 | #else |
28360 | RET(22) |
70357ce5 |
28361 | #endif |
70357ce5 |
28362 | } |
28363 | dst = DREGu32((Opcode >> 9) & 7); |
28364 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28365 | { |
28366 | flag_NotZ = flag_N = 0; |
28367 | flag_V = flag_C = 0; |
28368 | res = 0; |
28369 | DREGu32((Opcode >> 9) & 7) = res; |
28370 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28371 | RET(24+(dst>>31)*2) |
28372 | #else |
70357ce5 |
28373 | RET(58) |
3f591822 |
28374 | #endif |
70357ce5 |
28375 | } |
28376 | { |
28377 | s32 q, r; |
28378 | |
28379 | q = (s32)dst / (s32)src; |
28380 | r = (s32)dst % (s32)src; |
28381 | |
28382 | if ((q > 0x7FFF) || (q < -0x8000)) |
28383 | { |
28384 | flag_V = M68K_SR_V; |
28385 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28386 | if (q > 0xFFFF || q < -0x10000) { |
28387 | RET(24+(dst>>31)*2) |
1ab87d2b |
28388 | } else RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28389 | #else |
70357ce5 |
28390 | RET(88) |
3f591822 |
28391 | #endif |
70357ce5 |
28392 | } |
28393 | q &= 0x0000FFFF; |
28394 | flag_NotZ = q; |
28395 | flag_N = q >> 8; |
28396 | flag_V = flag_C = 0; |
28397 | res = q | (r << 16); |
28398 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28399 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28400 | RET(160+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28401 | #else |
70357ce5 |
28402 | RET(116) |
3f591822 |
28403 | #endif |
28404 | } |
70357ce5 |
28405 | } |
28406 | |
28407 | // DIVS |
28408 | OPCODE(0x81FB) |
28409 | { |
28410 | u32 adr, res; |
28411 | u32 src, dst; |
28412 | |
be26eb23 |
28413 | adr = GET_PC; |
70357ce5 |
28414 | DECODE_EXT_WORD |
28415 | PRE_IO |
28416 | READSX_WORD_F(adr, src) |
28417 | if (src == 0) |
28418 | { |
7669591e |
28419 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28420 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28421 | RET(14) |
28422 | #else |
28423 | RET(24) |
70357ce5 |
28424 | #endif |
70357ce5 |
28425 | } |
28426 | dst = DREGu32((Opcode >> 9) & 7); |
28427 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28428 | { |
28429 | flag_NotZ = flag_N = 0; |
28430 | flag_V = flag_C = 0; |
28431 | res = 0; |
28432 | DREGu32((Opcode >> 9) & 7) = res; |
28433 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28434 | RET(26+(dst>>31)*2) |
28435 | #else |
70357ce5 |
28436 | RET(60) |
3f591822 |
28437 | #endif |
70357ce5 |
28438 | } |
28439 | { |
28440 | s32 q, r; |
28441 | |
28442 | q = (s32)dst / (s32)src; |
28443 | r = (s32)dst % (s32)src; |
28444 | |
28445 | if ((q > 0x7FFF) || (q < -0x8000)) |
28446 | { |
28447 | flag_V = M68K_SR_V; |
28448 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28449 | if (q > 0xFFFF || q < -0x10000) { |
28450 | RET(26+(dst>>31)*2) |
1ab87d2b |
28451 | } else RET(162+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28452 | #else |
70357ce5 |
28453 | RET(90) |
3f591822 |
28454 | #endif |
70357ce5 |
28455 | } |
28456 | q &= 0x0000FFFF; |
28457 | flag_NotZ = q; |
28458 | flag_N = q >> 8; |
28459 | flag_V = flag_C = 0; |
28460 | res = q | (r << 16); |
28461 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28462 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28463 | RET(162+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28464 | #else |
70357ce5 |
28465 | RET(118) |
3f591822 |
28466 | #endif |
28467 | } |
70357ce5 |
28468 | } |
28469 | |
28470 | // DIVS |
28471 | OPCODE(0x81FC) |
28472 | { |
28473 | u32 adr, res; |
28474 | u32 src, dst; |
28475 | |
28476 | FETCH_SWORD(src); |
28477 | if (src == 0) |
28478 | { |
7669591e |
28479 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28480 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28481 | RET(8) |
28482 | #else |
28483 | RET(18) |
70357ce5 |
28484 | #endif |
70357ce5 |
28485 | } |
28486 | dst = DREGu32((Opcode >> 9) & 7); |
28487 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28488 | { |
28489 | flag_NotZ = flag_N = 0; |
28490 | flag_V = flag_C = 0; |
28491 | res = 0; |
28492 | DREGu32((Opcode >> 9) & 7) = res; |
28493 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28494 | RET(20+(dst>>31)*2) |
28495 | #else |
70357ce5 |
28496 | RET(54) |
3f591822 |
28497 | #endif |
70357ce5 |
28498 | } |
28499 | { |
28500 | s32 q, r; |
28501 | |
28502 | q = (s32)dst / (s32)src; |
28503 | r = (s32)dst % (s32)src; |
28504 | |
28505 | if ((q > 0x7FFF) || (q < -0x8000)) |
28506 | { |
28507 | flag_V = M68K_SR_V; |
28508 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28509 | if (q > 0xFFFF || q < -0x10000) { |
28510 | RET(20+(dst>>31)*2) |
1ab87d2b |
28511 | } else RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28512 | #else |
70357ce5 |
28513 | RET(84) |
3f591822 |
28514 | #endif |
70357ce5 |
28515 | } |
28516 | q &= 0x0000FFFF; |
28517 | flag_NotZ = q; |
28518 | flag_N = q >> 8; |
28519 | flag_V = flag_C = 0; |
28520 | res = q | (r << 16); |
28521 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28522 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28523 | RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28524 | #else |
70357ce5 |
28525 | RET(112) |
3f591822 |
28526 | #endif |
28527 | } |
70357ce5 |
28528 | } |
28529 | |
28530 | // DIVS |
28531 | OPCODE(0x81DF) |
28532 | { |
28533 | u32 adr, res; |
28534 | u32 src, dst; |
28535 | |
28536 | adr = AREG(7); |
28537 | AREG(7) += 2; |
28538 | PRE_IO |
28539 | READSX_WORD_F(adr, src) |
28540 | if (src == 0) |
28541 | { |
7669591e |
28542 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28543 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28544 | RET(8) |
28545 | #else |
28546 | RET(18) |
70357ce5 |
28547 | #endif |
70357ce5 |
28548 | } |
28549 | dst = DREGu32((Opcode >> 9) & 7); |
28550 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28551 | { |
28552 | flag_NotZ = flag_N = 0; |
28553 | flag_V = flag_C = 0; |
28554 | res = 0; |
28555 | DREGu32((Opcode >> 9) & 7) = res; |
28556 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28557 | RET(20+(dst>>31)*2) |
28558 | #else |
70357ce5 |
28559 | RET(54) |
3f591822 |
28560 | #endif |
70357ce5 |
28561 | } |
28562 | { |
28563 | s32 q, r; |
28564 | |
28565 | q = (s32)dst / (s32)src; |
28566 | r = (s32)dst % (s32)src; |
28567 | |
28568 | if ((q > 0x7FFF) || (q < -0x8000)) |
28569 | { |
28570 | flag_V = M68K_SR_V; |
28571 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28572 | if (q > 0xFFFF || q < -0x10000) { |
28573 | RET(20+(dst>>31)*2) |
1ab87d2b |
28574 | } else RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28575 | #else |
70357ce5 |
28576 | RET(84) |
3f591822 |
28577 | #endif |
70357ce5 |
28578 | } |
28579 | q &= 0x0000FFFF; |
28580 | flag_NotZ = q; |
28581 | flag_N = q >> 8; |
28582 | flag_V = flag_C = 0; |
28583 | res = q | (r << 16); |
28584 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28585 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28586 | RET(156+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28587 | #else |
70357ce5 |
28588 | RET(112) |
3f591822 |
28589 | #endif |
28590 | } |
70357ce5 |
28591 | } |
28592 | |
28593 | // DIVS |
28594 | OPCODE(0x81E7) |
28595 | { |
28596 | u32 adr, res; |
28597 | u32 src, dst; |
28598 | |
28599 | adr = AREG(7) - 2; |
28600 | AREG(7) = adr; |
28601 | PRE_IO |
28602 | READSX_WORD_F(adr, src) |
28603 | if (src == 0) |
28604 | { |
7669591e |
28605 | SET_PC(execute_exception(ctx, M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR)); |
70357ce5 |
28606 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28607 | RET(10) |
28608 | #else |
28609 | RET(20) |
70357ce5 |
28610 | #endif |
70357ce5 |
28611 | } |
28612 | dst = DREGu32((Opcode >> 9) & 7); |
28613 | if ((dst == 0x80000000) && (src == (u32)-1)) |
28614 | { |
28615 | flag_NotZ = flag_N = 0; |
28616 | flag_V = flag_C = 0; |
28617 | res = 0; |
28618 | DREGu32((Opcode >> 9) & 7) = res; |
28619 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28620 | RET(22+(dst>>31)*2) |
28621 | #else |
70357ce5 |
28622 | RET(56) |
3f591822 |
28623 | #endif |
70357ce5 |
28624 | } |
28625 | { |
28626 | s32 q, r; |
28627 | |
28628 | q = (s32)dst / (s32)src; |
28629 | r = (s32)dst % (s32)src; |
28630 | |
28631 | if ((q > 0x7FFF) || (q < -0x8000)) |
28632 | { |
28633 | flag_V = M68K_SR_V; |
28634 | #ifdef USE_CYCLONE_TIMING_DIV |
3f591822 |
28635 | if (q > 0xFFFF || q < -0x10000) { |
28636 | RET(22+(dst>>31)*2) |
1ab87d2b |
28637 | } else RET(158+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28638 | #else |
70357ce5 |
28639 | RET(86) |
3f591822 |
28640 | #endif |
70357ce5 |
28641 | } |
28642 | q &= 0x0000FFFF; |
28643 | flag_NotZ = q; |
28644 | flag_N = q >> 8; |
28645 | flag_V = flag_C = 0; |
28646 | res = q | (r << 16); |
28647 | DREGu32((Opcode >> 9) & 7) = res; |
70357ce5 |
28648 | #ifdef USE_CYCLONE_TIMING_DIV |
1ab87d2b |
28649 | RET(158+(dst>>31)*4-(q>>31)*2-BITCOUNT(res,abs(q))*2) |
3f591822 |
28650 | #else |
70357ce5 |
28651 | RET(114) |
3f591822 |
28652 | #endif |
28653 | } |
70357ce5 |
28654 | } |
28655 | |
28656 | // SUBaD |
28657 | OPCODE(0x9000) |
28658 | { |
28659 | u32 adr, res; |
28660 | u32 src, dst; |
28661 | |
28662 | src = DREGu8((Opcode >> 0) & 7); |
28663 | dst = DREGu8((Opcode >> 9) & 7); |
28664 | res = dst - src; |
28665 | flag_N = flag_X = flag_C = res; |
28666 | flag_V = (src ^ dst) & (res ^ dst); |
28667 | flag_NotZ = res & 0xFF; |
28668 | DREGu8((Opcode >> 9) & 7) = res; |
28669 | RET(4) |
28670 | } |
28671 | |
28672 | // SUBaD |
03e4f2a3 |
28673 | #if 0 |
70357ce5 |
28674 | OPCODE(0x9008) |
28675 | { |
28676 | u32 adr, res; |
28677 | u32 src, dst; |
28678 | |
28679 | // can't read byte from Ax registers ! |
7669591e |
28680 | ctx->execinfo |= M68K_FAULTED; |
28681 | ctx->io_cycle_counter = 0; |
70357ce5 |
28682 | /* |
28683 | goto famec_Exec_End; |
28684 | dst = DREGu8((Opcode >> 9) & 7); |
28685 | res = dst - src; |
28686 | flag_N = flag_X = flag_C = res; |
28687 | flag_V = (src ^ dst) & (res ^ dst); |
28688 | flag_NotZ = res & 0xFF; |
28689 | DREGu8((Opcode >> 9) & 7) = res; |
28690 | */ |
28691 | RET(4) |
28692 | } |
03e4f2a3 |
28693 | #endif |
70357ce5 |
28694 | |
28695 | // SUBaD |
28696 | OPCODE(0x9010) |
28697 | { |
28698 | u32 adr, res; |
28699 | u32 src, dst; |
28700 | |
28701 | adr = AREG((Opcode >> 0) & 7); |
28702 | PRE_IO |
28703 | READ_BYTE_F(adr, src) |
28704 | dst = DREGu8((Opcode >> 9) & 7); |
28705 | res = dst - src; |
28706 | flag_N = flag_X = flag_C = res; |
28707 | flag_V = (src ^ dst) & (res ^ dst); |
28708 | flag_NotZ = res & 0xFF; |
28709 | DREGu8((Opcode >> 9) & 7) = res; |
28710 | POST_IO |
28711 | RET(8) |
28712 | } |
28713 | |
28714 | // SUBaD |
28715 | OPCODE(0x9018) |
28716 | { |
28717 | u32 adr, res; |
28718 | u32 src, dst; |
28719 | |
28720 | adr = AREG((Opcode >> 0) & 7); |
28721 | AREG((Opcode >> 0) & 7) += 1; |
28722 | PRE_IO |
28723 | READ_BYTE_F(adr, src) |
28724 | dst = DREGu8((Opcode >> 9) & 7); |
28725 | res = dst - src; |
28726 | flag_N = flag_X = flag_C = res; |
28727 | flag_V = (src ^ dst) & (res ^ dst); |
28728 | flag_NotZ = res & 0xFF; |
28729 | DREGu8((Opcode >> 9) & 7) = res; |
28730 | POST_IO |
28731 | RET(8) |
28732 | } |
28733 | |
28734 | // SUBaD |
28735 | OPCODE(0x9020) |
28736 | { |
28737 | u32 adr, res; |
28738 | u32 src, dst; |
28739 | |
28740 | adr = AREG((Opcode >> 0) & 7) - 1; |
28741 | AREG((Opcode >> 0) & 7) = adr; |
28742 | PRE_IO |
28743 | READ_BYTE_F(adr, src) |
28744 | dst = DREGu8((Opcode >> 9) & 7); |
28745 | res = dst - src; |
28746 | flag_N = flag_X = flag_C = res; |
28747 | flag_V = (src ^ dst) & (res ^ dst); |
28748 | flag_NotZ = res & 0xFF; |
28749 | DREGu8((Opcode >> 9) & 7) = res; |
28750 | POST_IO |
28751 | RET(10) |
28752 | } |
28753 | |
28754 | // SUBaD |
28755 | OPCODE(0x9028) |
28756 | { |
28757 | u32 adr, res; |
28758 | u32 src, dst; |
28759 | |
28760 | FETCH_SWORD(adr); |
28761 | adr += AREG((Opcode >> 0) & 7); |
28762 | PRE_IO |
28763 | READ_BYTE_F(adr, src) |
28764 | dst = DREGu8((Opcode >> 9) & 7); |
28765 | res = dst - src; |
28766 | flag_N = flag_X = flag_C = res; |
28767 | flag_V = (src ^ dst) & (res ^ dst); |
28768 | flag_NotZ = res & 0xFF; |
28769 | DREGu8((Opcode >> 9) & 7) = res; |
28770 | POST_IO |
28771 | RET(12) |
28772 | } |
28773 | |
28774 | // SUBaD |
28775 | OPCODE(0x9030) |
28776 | { |
28777 | u32 adr, res; |
28778 | u32 src, dst; |
28779 | |
28780 | adr = AREG((Opcode >> 0) & 7); |
28781 | DECODE_EXT_WORD |
28782 | PRE_IO |
28783 | READ_BYTE_F(adr, src) |
28784 | dst = DREGu8((Opcode >> 9) & 7); |
28785 | res = dst - src; |
28786 | flag_N = flag_X = flag_C = res; |
28787 | flag_V = (src ^ dst) & (res ^ dst); |
28788 | flag_NotZ = res & 0xFF; |
28789 | DREGu8((Opcode >> 9) & 7) = res; |
28790 | POST_IO |
28791 | RET(14) |
28792 | } |
28793 | |
28794 | // SUBaD |
28795 | OPCODE(0x9038) |
28796 | { |
28797 | u32 adr, res; |
28798 | u32 src, dst; |
28799 | |
28800 | FETCH_SWORD(adr); |
28801 | PRE_IO |
28802 | READ_BYTE_F(adr, src) |
28803 | dst = DREGu8((Opcode >> 9) & 7); |
28804 | res = dst - src; |
28805 | flag_N = flag_X = flag_C = res; |
28806 | flag_V = (src ^ dst) & (res ^ dst); |
28807 | flag_NotZ = res & 0xFF; |
28808 | DREGu8((Opcode >> 9) & 7) = res; |
28809 | POST_IO |
28810 | RET(12) |
28811 | } |
28812 | |
28813 | // SUBaD |
28814 | OPCODE(0x9039) |
28815 | { |
28816 | u32 adr, res; |
28817 | u32 src, dst; |
28818 | |
28819 | FETCH_LONG(adr); |
28820 | PRE_IO |
28821 | READ_BYTE_F(adr, src) |
28822 | dst = DREGu8((Opcode >> 9) & 7); |
28823 | res = dst - src; |
28824 | flag_N = flag_X = flag_C = res; |
28825 | flag_V = (src ^ dst) & (res ^ dst); |
28826 | flag_NotZ = res & 0xFF; |
28827 | DREGu8((Opcode >> 9) & 7) = res; |
28828 | POST_IO |
28829 | RET(16) |
28830 | } |
28831 | |
28832 | // SUBaD |
28833 | OPCODE(0x903A) |
28834 | { |
28835 | u32 adr, res; |
28836 | u32 src, dst; |
28837 | |
be26eb23 |
28838 | adr = GET_SWORD + GET_PC; |
70357ce5 |
28839 | PC++; |
28840 | PRE_IO |
28841 | READ_BYTE_F(adr, src) |
28842 | dst = DREGu8((Opcode >> 9) & 7); |
28843 | res = dst - src; |
28844 | flag_N = flag_X = flag_C = res; |
28845 | flag_V = (src ^ dst) & (res ^ dst); |
28846 | flag_NotZ = res & 0xFF; |
28847 | DREGu8((Opcode >> 9) & 7) = res; |
28848 | POST_IO |
28849 | RET(12) |
28850 | } |
28851 | |
28852 | // SUBaD |
28853 | OPCODE(0x903B) |
28854 | { |
28855 | u32 adr, res; |
28856 | u32 src, dst; |
28857 | |
be26eb23 |
28858 | adr = GET_PC; |
70357ce5 |
28859 | DECODE_EXT_WORD |
28860 | PRE_IO |
28861 | READ_BYTE_F(adr, src) |
28862 | dst = DREGu8((Opcode >> 9) & 7); |
28863 | res = dst - src; |
28864 | flag_N = flag_X = flag_C = res; |
28865 | flag_V = (src ^ dst) & (res ^ dst); |
28866 | flag_NotZ = res & 0xFF; |
28867 | DREGu8((Opcode >> 9) & 7) = res; |
28868 | POST_IO |
28869 | RET(14) |
28870 | } |
28871 | |
28872 | // SUBaD |
28873 | OPCODE(0x903C) |
28874 | { |
28875 | u32 adr, res; |
28876 | u32 src, dst; |
28877 | |
28878 | FETCH_BYTE(src); |
28879 | dst = DREGu8((Opcode >> 9) & 7); |
28880 | res = dst - src; |
28881 | flag_N = flag_X = flag_C = res; |
28882 | flag_V = (src ^ dst) & (res ^ dst); |
28883 | flag_NotZ = res & 0xFF; |
28884 | DREGu8((Opcode >> 9) & 7) = res; |
28885 | RET(8) |
28886 | } |
28887 | |
28888 | // SUBaD |
28889 | OPCODE(0x901F) |
28890 | { |
28891 | u32 adr, res; |
28892 | u32 src, dst; |
28893 | |
28894 | adr = AREG(7); |
28895 | AREG(7) += 2; |
28896 | PRE_IO |
28897 | READ_BYTE_F(adr, src) |
28898 | dst = DREGu8((Opcode >> 9) & 7); |
28899 | res = dst - src; |
28900 | flag_N = flag_X = flag_C = res; |
28901 | flag_V = (src ^ dst) & (res ^ dst); |
28902 | flag_NotZ = res & 0xFF; |
28903 | DREGu8((Opcode >> 9) & 7) = res; |
28904 | POST_IO |
28905 | RET(8) |
28906 | } |
28907 | |
28908 | // SUBaD |
28909 | OPCODE(0x9027) |
28910 | { |
28911 | u32 adr, res; |
28912 | u32 src, dst; |
28913 | |
28914 | adr = AREG(7) - 2; |
28915 | AREG(7) = adr; |
28916 | PRE_IO |
28917 | READ_BYTE_F(adr, src) |
28918 | dst = DREGu8((Opcode >> 9) & 7); |
28919 | res = dst - src; |
28920 | flag_N = flag_X = flag_C = res; |
28921 | flag_V = (src ^ dst) & (res ^ dst); |
28922 | flag_NotZ = res & 0xFF; |
28923 | DREGu8((Opcode >> 9) & 7) = res; |
28924 | POST_IO |
28925 | RET(10) |
28926 | } |
28927 | |
28928 | // SUBaD |
28929 | OPCODE(0x9040) |
28930 | { |
28931 | u32 adr, res; |
28932 | u32 src, dst; |
28933 | |
28934 | src = DREGu16((Opcode >> 0) & 7); |
28935 | dst = DREGu16((Opcode >> 9) & 7); |
28936 | res = dst - src; |
28937 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28938 | flag_N = flag_X = flag_C = res >> 8; |
28939 | flag_NotZ = res & 0xFFFF; |
28940 | DREGu16((Opcode >> 9) & 7) = res; |
28941 | RET(4) |
28942 | } |
28943 | |
28944 | // SUBaD |
28945 | OPCODE(0x9048) |
28946 | { |
28947 | u32 adr, res; |
28948 | u32 src, dst; |
28949 | |
28950 | src = AREGu16((Opcode >> 0) & 7); |
28951 | dst = DREGu16((Opcode >> 9) & 7); |
28952 | res = dst - src; |
28953 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28954 | flag_N = flag_X = flag_C = res >> 8; |
28955 | flag_NotZ = res & 0xFFFF; |
28956 | DREGu16((Opcode >> 9) & 7) = res; |
28957 | RET(4) |
28958 | } |
28959 | |
28960 | // SUBaD |
28961 | OPCODE(0x9050) |
28962 | { |
28963 | u32 adr, res; |
28964 | u32 src, dst; |
28965 | |
28966 | adr = AREG((Opcode >> 0) & 7); |
28967 | PRE_IO |
28968 | READ_WORD_F(adr, src) |
28969 | dst = DREGu16((Opcode >> 9) & 7); |
28970 | res = dst - src; |
28971 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28972 | flag_N = flag_X = flag_C = res >> 8; |
28973 | flag_NotZ = res & 0xFFFF; |
28974 | DREGu16((Opcode >> 9) & 7) = res; |
28975 | POST_IO |
28976 | RET(8) |
28977 | } |
28978 | |
28979 | // SUBaD |
28980 | OPCODE(0x9058) |
28981 | { |
28982 | u32 adr, res; |
28983 | u32 src, dst; |
28984 | |
28985 | adr = AREG((Opcode >> 0) & 7); |
28986 | AREG((Opcode >> 0) & 7) += 2; |
28987 | PRE_IO |
28988 | READ_WORD_F(adr, src) |
28989 | dst = DREGu16((Opcode >> 9) & 7); |
28990 | res = dst - src; |
28991 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
28992 | flag_N = flag_X = flag_C = res >> 8; |
28993 | flag_NotZ = res & 0xFFFF; |
28994 | DREGu16((Opcode >> 9) & 7) = res; |
28995 | POST_IO |
28996 | RET(8) |
28997 | } |
28998 | |
28999 | // SUBaD |
29000 | OPCODE(0x9060) |
29001 | { |
29002 | u32 adr, res; |
29003 | u32 src, dst; |
29004 | |
29005 | adr = AREG((Opcode >> 0) & 7) - 2; |
29006 | AREG((Opcode >> 0) & 7) = adr; |
29007 | PRE_IO |
29008 | READ_WORD_F(adr, src) |
29009 | dst = DREGu16((Opcode >> 9) & 7); |
29010 | res = dst - src; |
29011 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29012 | flag_N = flag_X = flag_C = res >> 8; |
29013 | flag_NotZ = res & 0xFFFF; |
29014 | DREGu16((Opcode >> 9) & 7) = res; |
29015 | POST_IO |
29016 | RET(10) |
29017 | } |
29018 | |
29019 | // SUBaD |
29020 | OPCODE(0x9068) |
29021 | { |
29022 | u32 adr, res; |
29023 | u32 src, dst; |
29024 | |
29025 | FETCH_SWORD(adr); |
29026 | adr += AREG((Opcode >> 0) & 7); |
29027 | PRE_IO |
29028 | READ_WORD_F(adr, src) |
29029 | dst = DREGu16((Opcode >> 9) & 7); |
29030 | res = dst - src; |
29031 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29032 | flag_N = flag_X = flag_C = res >> 8; |
29033 | flag_NotZ = res & 0xFFFF; |
29034 | DREGu16((Opcode >> 9) & 7) = res; |
29035 | POST_IO |
29036 | RET(12) |
29037 | } |
29038 | |
29039 | // SUBaD |
29040 | OPCODE(0x9070) |
29041 | { |
29042 | u32 adr, res; |
29043 | u32 src, dst; |
29044 | |
29045 | adr = AREG((Opcode >> 0) & 7); |
29046 | DECODE_EXT_WORD |
29047 | PRE_IO |
29048 | READ_WORD_F(adr, src) |
29049 | dst = DREGu16((Opcode >> 9) & 7); |
29050 | res = dst - src; |
29051 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29052 | flag_N = flag_X = flag_C = res >> 8; |
29053 | flag_NotZ = res & 0xFFFF; |
29054 | DREGu16((Opcode >> 9) & 7) = res; |
29055 | POST_IO |
29056 | RET(14) |
29057 | } |
29058 | |
29059 | // SUBaD |
29060 | OPCODE(0x9078) |
29061 | { |
29062 | u32 adr, res; |
29063 | u32 src, dst; |
29064 | |
29065 | FETCH_SWORD(adr); |
29066 | PRE_IO |
29067 | READ_WORD_F(adr, src) |
29068 | dst = DREGu16((Opcode >> 9) & 7); |
29069 | res = dst - src; |
29070 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29071 | flag_N = flag_X = flag_C = res >> 8; |
29072 | flag_NotZ = res & 0xFFFF; |
29073 | DREGu16((Opcode >> 9) & 7) = res; |
29074 | POST_IO |
29075 | RET(12) |
29076 | } |
29077 | |
29078 | // SUBaD |
29079 | OPCODE(0x9079) |
29080 | { |
29081 | u32 adr, res; |
29082 | u32 src, dst; |
29083 | |
29084 | FETCH_LONG(adr); |
29085 | PRE_IO |
29086 | READ_WORD_F(adr, src) |
29087 | dst = DREGu16((Opcode >> 9) & 7); |
29088 | res = dst - src; |
29089 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29090 | flag_N = flag_X = flag_C = res >> 8; |
29091 | flag_NotZ = res & 0xFFFF; |
29092 | DREGu16((Opcode >> 9) & 7) = res; |
29093 | POST_IO |
29094 | RET(16) |
29095 | } |
29096 | |
29097 | // SUBaD |
29098 | OPCODE(0x907A) |
29099 | { |
29100 | u32 adr, res; |
29101 | u32 src, dst; |
29102 | |
be26eb23 |
29103 | adr = GET_SWORD + GET_PC; |
70357ce5 |
29104 | PC++; |
29105 | PRE_IO |
29106 | READ_WORD_F(adr, src) |
29107 | dst = DREGu16((Opcode >> 9) & 7); |
29108 | res = dst - src; |
29109 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29110 | flag_N = flag_X = flag_C = res >> 8; |
29111 | flag_NotZ = res & 0xFFFF; |
29112 | DREGu16((Opcode >> 9) & 7) = res; |
29113 | POST_IO |
29114 | RET(12) |
29115 | } |
29116 | |
29117 | // SUBaD |
29118 | OPCODE(0x907B) |
29119 | { |
29120 | u32 adr, res; |
29121 | u32 src, dst; |
29122 | |
be26eb23 |
29123 | adr = GET_PC; |
70357ce5 |
29124 | DECODE_EXT_WORD |
29125 | PRE_IO |
29126 | READ_WORD_F(adr, src) |
29127 | dst = DREGu16((Opcode >> 9) & 7); |
29128 | res = dst - src; |
29129 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29130 | flag_N = flag_X = flag_C = res >> 8; |
29131 | flag_NotZ = res & 0xFFFF; |
29132 | DREGu16((Opcode >> 9) & 7) = res; |
29133 | POST_IO |
29134 | RET(14) |
29135 | } |
29136 | |
29137 | // SUBaD |
29138 | OPCODE(0x907C) |
29139 | { |
29140 | u32 adr, res; |
29141 | u32 src, dst; |
29142 | |
29143 | FETCH_WORD(src); |
29144 | dst = DREGu16((Opcode >> 9) & 7); |
29145 | res = dst - src; |
29146 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29147 | flag_N = flag_X = flag_C = res >> 8; |
29148 | flag_NotZ = res & 0xFFFF; |
29149 | DREGu16((Opcode >> 9) & 7) = res; |
29150 | RET(8) |
29151 | } |
29152 | |
29153 | // SUBaD |
29154 | OPCODE(0x905F) |
29155 | { |
29156 | u32 adr, res; |
29157 | u32 src, dst; |
29158 | |
29159 | adr = AREG(7); |
29160 | AREG(7) += 2; |
29161 | PRE_IO |
29162 | READ_WORD_F(adr, src) |
29163 | dst = DREGu16((Opcode >> 9) & 7); |
29164 | res = dst - src; |
29165 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29166 | flag_N = flag_X = flag_C = res >> 8; |
29167 | flag_NotZ = res & 0xFFFF; |
29168 | DREGu16((Opcode >> 9) & 7) = res; |
29169 | POST_IO |
29170 | RET(8) |
29171 | } |
29172 | |
29173 | // SUBaD |
29174 | OPCODE(0x9067) |
29175 | { |
29176 | u32 adr, res; |
29177 | u32 src, dst; |
29178 | |
29179 | adr = AREG(7) - 2; |
29180 | AREG(7) = adr; |
29181 | PRE_IO |
29182 | READ_WORD_F(adr, src) |
29183 | dst = DREGu16((Opcode >> 9) & 7); |
29184 | res = dst - src; |
29185 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29186 | flag_N = flag_X = flag_C = res >> 8; |
29187 | flag_NotZ = res & 0xFFFF; |
29188 | DREGu16((Opcode >> 9) & 7) = res; |
29189 | POST_IO |
29190 | RET(10) |
29191 | } |
29192 | |
29193 | // SUBaD |
29194 | OPCODE(0x9080) |
29195 | { |
29196 | u32 adr, res; |
29197 | u32 src, dst; |
29198 | |
29199 | src = DREGu32((Opcode >> 0) & 7); |
29200 | dst = DREGu32((Opcode >> 9) & 7); |
29201 | res = dst - src; |
29202 | flag_NotZ = res; |
29203 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29204 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29205 | flag_N = res >> 24; |
29206 | DREGu32((Opcode >> 9) & 7) = res; |
29207 | RET(8) |
29208 | } |
29209 | |
29210 | // SUBaD |
29211 | OPCODE(0x9088) |
29212 | { |
29213 | u32 adr, res; |
29214 | u32 src, dst; |
29215 | |
29216 | src = AREGu32((Opcode >> 0) & 7); |
29217 | dst = DREGu32((Opcode >> 9) & 7); |
29218 | res = dst - src; |
29219 | flag_NotZ = res; |
29220 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29221 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29222 | flag_N = res >> 24; |
29223 | DREGu32((Opcode >> 9) & 7) = res; |
29224 | RET(8) |
29225 | } |
29226 | |
29227 | // SUBaD |
29228 | OPCODE(0x9090) |
29229 | { |
29230 | u32 adr, res; |
29231 | u32 src, dst; |
29232 | |
29233 | adr = AREG((Opcode >> 0) & 7); |
29234 | PRE_IO |
29235 | READ_LONG_F(adr, src) |
29236 | dst = DREGu32((Opcode >> 9) & 7); |
29237 | res = dst - src; |
29238 | flag_NotZ = res; |
29239 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29240 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29241 | flag_N = res >> 24; |
29242 | DREGu32((Opcode >> 9) & 7) = res; |
29243 | POST_IO |
29244 | RET(14) |
29245 | } |
29246 | |
29247 | // SUBaD |
29248 | OPCODE(0x9098) |
29249 | { |
29250 | u32 adr, res; |
29251 | u32 src, dst; |
29252 | |
29253 | adr = AREG((Opcode >> 0) & 7); |
29254 | AREG((Opcode >> 0) & 7) += 4; |
29255 | PRE_IO |
29256 | READ_LONG_F(adr, src) |
29257 | dst = DREGu32((Opcode >> 9) & 7); |
29258 | res = dst - src; |
29259 | flag_NotZ = res; |
29260 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29261 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29262 | flag_N = res >> 24; |
29263 | DREGu32((Opcode >> 9) & 7) = res; |
29264 | POST_IO |
29265 | RET(14) |
29266 | } |
29267 | |
29268 | // SUBaD |
29269 | OPCODE(0x90A0) |
29270 | { |
29271 | u32 adr, res; |
29272 | u32 src, dst; |
29273 | |
29274 | adr = AREG((Opcode >> 0) & 7) - 4; |
29275 | AREG((Opcode >> 0) & 7) = adr; |
29276 | PRE_IO |
29277 | READ_LONG_F(adr, src) |
29278 | dst = DREGu32((Opcode >> 9) & 7); |
29279 | res = dst - src; |
29280 | flag_NotZ = res; |
29281 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29282 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29283 | flag_N = res >> 24; |
29284 | DREGu32((Opcode >> 9) & 7) = res; |
29285 | POST_IO |
29286 | RET(16) |
29287 | } |
29288 | |
29289 | // SUBaD |
29290 | OPCODE(0x90A8) |
29291 | { |
29292 | u32 adr, res; |
29293 | u32 src, dst; |
29294 | |
29295 | FETCH_SWORD(adr); |
29296 | adr += AREG((Opcode >> 0) & 7); |
29297 | PRE_IO |
29298 | READ_LONG_F(adr, src) |
29299 | dst = DREGu32((Opcode >> 9) & 7); |
29300 | res = dst - src; |
29301 | flag_NotZ = res; |
29302 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29303 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29304 | flag_N = res >> 24; |
29305 | DREGu32((Opcode >> 9) & 7) = res; |
29306 | POST_IO |
29307 | RET(18) |
29308 | } |
29309 | |
29310 | // SUBaD |
29311 | OPCODE(0x90B0) |
29312 | { |
29313 | u32 adr, res; |
29314 | u32 src, dst; |
29315 | |
29316 | adr = AREG((Opcode >> 0) & 7); |
29317 | DECODE_EXT_WORD |
29318 | PRE_IO |
29319 | READ_LONG_F(adr, src) |
29320 | dst = DREGu32((Opcode >> 9) & 7); |
29321 | res = dst - src; |
29322 | flag_NotZ = res; |
29323 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29324 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29325 | flag_N = res >> 24; |
29326 | DREGu32((Opcode >> 9) & 7) = res; |
29327 | POST_IO |
29328 | RET(20) |
29329 | } |
29330 | |
29331 | // SUBaD |
29332 | OPCODE(0x90B8) |
29333 | { |
29334 | u32 adr, res; |
29335 | u32 src, dst; |
29336 | |
29337 | FETCH_SWORD(adr); |
29338 | PRE_IO |
29339 | READ_LONG_F(adr, src) |
29340 | dst = DREGu32((Opcode >> 9) & 7); |
29341 | res = dst - src; |
29342 | flag_NotZ = res; |
29343 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29344 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29345 | flag_N = res >> 24; |
29346 | DREGu32((Opcode >> 9) & 7) = res; |
29347 | POST_IO |
29348 | RET(18) |
29349 | } |
29350 | |
29351 | // SUBaD |
29352 | OPCODE(0x90B9) |
29353 | { |
29354 | u32 adr, res; |
29355 | u32 src, dst; |
29356 | |
29357 | FETCH_LONG(adr); |
29358 | PRE_IO |
29359 | READ_LONG_F(adr, src) |
29360 | dst = DREGu32((Opcode >> 9) & 7); |
29361 | res = dst - src; |
29362 | flag_NotZ = res; |
29363 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29364 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29365 | flag_N = res >> 24; |
29366 | DREGu32((Opcode >> 9) & 7) = res; |
29367 | POST_IO |
29368 | RET(22) |
29369 | } |
29370 | |
29371 | // SUBaD |
29372 | OPCODE(0x90BA) |
29373 | { |
29374 | u32 adr, res; |
29375 | u32 src, dst; |
29376 | |
be26eb23 |
29377 | adr = GET_SWORD + GET_PC; |
70357ce5 |
29378 | PC++; |
29379 | PRE_IO |
29380 | READ_LONG_F(adr, src) |
29381 | dst = DREGu32((Opcode >> 9) & 7); |
29382 | res = dst - src; |
29383 | flag_NotZ = res; |
29384 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29385 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29386 | flag_N = res >> 24; |
29387 | DREGu32((Opcode >> 9) & 7) = res; |
29388 | POST_IO |
29389 | RET(18) |
29390 | } |
29391 | |
29392 | // SUBaD |
29393 | OPCODE(0x90BB) |
29394 | { |
29395 | u32 adr, res; |
29396 | u32 src, dst; |
29397 | |
be26eb23 |
29398 | adr = GET_PC; |
70357ce5 |
29399 | DECODE_EXT_WORD |
29400 | PRE_IO |
29401 | READ_LONG_F(adr, src) |
29402 | dst = DREGu32((Opcode >> 9) & 7); |
29403 | res = dst - src; |
29404 | flag_NotZ = res; |
29405 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29406 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29407 | flag_N = res >> 24; |
29408 | DREGu32((Opcode >> 9) & 7) = res; |
29409 | POST_IO |
29410 | RET(20) |
29411 | } |
29412 | |
29413 | // SUBaD |
29414 | OPCODE(0x90BC) |
29415 | { |
29416 | u32 adr, res; |
29417 | u32 src, dst; |
29418 | |
29419 | FETCH_LONG(src); |
29420 | dst = DREGu32((Opcode >> 9) & 7); |
29421 | res = dst - src; |
29422 | flag_NotZ = res; |
29423 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29424 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29425 | flag_N = res >> 24; |
29426 | DREGu32((Opcode >> 9) & 7) = res; |
29427 | RET(16) |
29428 | } |
29429 | |
29430 | // SUBaD |
29431 | OPCODE(0x909F) |
29432 | { |
29433 | u32 adr, res; |
29434 | u32 src, dst; |
29435 | |
29436 | adr = AREG(7); |
29437 | AREG(7) += 4; |
29438 | PRE_IO |
29439 | READ_LONG_F(adr, src) |
29440 | dst = DREGu32((Opcode >> 9) & 7); |
29441 | res = dst - src; |
29442 | flag_NotZ = res; |
29443 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29444 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29445 | flag_N = res >> 24; |
29446 | DREGu32((Opcode >> 9) & 7) = res; |
29447 | POST_IO |
29448 | RET(14) |
29449 | } |
29450 | |
29451 | // SUBaD |
29452 | OPCODE(0x90A7) |
29453 | { |
29454 | u32 adr, res; |
29455 | u32 src, dst; |
29456 | |
29457 | adr = AREG(7) - 4; |
29458 | AREG(7) = adr; |
29459 | PRE_IO |
29460 | READ_LONG_F(adr, src) |
29461 | dst = DREGu32((Opcode >> 9) & 7); |
29462 | res = dst - src; |
29463 | flag_NotZ = res; |
29464 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29465 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29466 | flag_N = res >> 24; |
29467 | DREGu32((Opcode >> 9) & 7) = res; |
29468 | POST_IO |
29469 | RET(16) |
29470 | } |
29471 | |
29472 | // SUBDa |
29473 | OPCODE(0x9110) |
29474 | { |
29475 | u32 adr, res; |
29476 | u32 src, dst; |
29477 | |
29478 | src = DREGu8((Opcode >> 9) & 7); |
29479 | adr = AREG((Opcode >> 0) & 7); |
29480 | PRE_IO |
29481 | READ_BYTE_F(adr, dst) |
29482 | res = dst - src; |
29483 | flag_N = flag_X = flag_C = res; |
29484 | flag_V = (src ^ dst) & (res ^ dst); |
29485 | flag_NotZ = res & 0xFF; |
29486 | WRITE_BYTE_F(adr, res) |
29487 | POST_IO |
29488 | RET(12) |
29489 | } |
29490 | |
29491 | // SUBDa |
29492 | OPCODE(0x9118) |
29493 | { |
29494 | u32 adr, res; |
29495 | u32 src, dst; |
29496 | |
29497 | src = DREGu8((Opcode >> 9) & 7); |
29498 | adr = AREG((Opcode >> 0) & 7); |
29499 | AREG((Opcode >> 0) & 7) += 1; |
29500 | PRE_IO |
29501 | READ_BYTE_F(adr, dst) |
29502 | res = dst - src; |
29503 | flag_N = flag_X = flag_C = res; |
29504 | flag_V = (src ^ dst) & (res ^ dst); |
29505 | flag_NotZ = res & 0xFF; |
29506 | WRITE_BYTE_F(adr, res) |
29507 | POST_IO |
29508 | RET(12) |
29509 | } |
29510 | |
29511 | // SUBDa |
29512 | OPCODE(0x9120) |
29513 | { |
29514 | u32 adr, res; |
29515 | u32 src, dst; |
29516 | |
29517 | src = DREGu8((Opcode >> 9) & 7); |
29518 | adr = AREG((Opcode >> 0) & 7) - 1; |
29519 | AREG((Opcode >> 0) & 7) = adr; |
29520 | PRE_IO |
29521 | READ_BYTE_F(adr, dst) |
29522 | res = dst - src; |
29523 | flag_N = flag_X = flag_C = res; |
29524 | flag_V = (src ^ dst) & (res ^ dst); |
29525 | flag_NotZ = res & 0xFF; |
29526 | WRITE_BYTE_F(adr, res) |
29527 | POST_IO |
29528 | RET(14) |
29529 | } |
29530 | |
29531 | // SUBDa |
29532 | OPCODE(0x9128) |
29533 | { |
29534 | u32 adr, res; |
29535 | u32 src, dst; |
29536 | |
29537 | src = DREGu8((Opcode >> 9) & 7); |
29538 | FETCH_SWORD(adr); |
29539 | adr += AREG((Opcode >> 0) & 7); |
29540 | PRE_IO |
29541 | READ_BYTE_F(adr, dst) |
29542 | res = dst - src; |
29543 | flag_N = flag_X = flag_C = res; |
29544 | flag_V = (src ^ dst) & (res ^ dst); |
29545 | flag_NotZ = res & 0xFF; |
29546 | WRITE_BYTE_F(adr, res) |
29547 | POST_IO |
29548 | RET(16) |
29549 | } |
29550 | |
29551 | // SUBDa |
29552 | OPCODE(0x9130) |
29553 | { |
29554 | u32 adr, res; |
29555 | u32 src, dst; |
29556 | |
29557 | src = DREGu8((Opcode >> 9) & 7); |
29558 | adr = AREG((Opcode >> 0) & 7); |
29559 | DECODE_EXT_WORD |
29560 | PRE_IO |
29561 | READ_BYTE_F(adr, dst) |
29562 | res = dst - src; |
29563 | flag_N = flag_X = flag_C = res; |
29564 | flag_V = (src ^ dst) & (res ^ dst); |
29565 | flag_NotZ = res & 0xFF; |
29566 | WRITE_BYTE_F(adr, res) |
29567 | POST_IO |
29568 | RET(18) |
29569 | } |
29570 | |
29571 | // SUBDa |
29572 | OPCODE(0x9138) |
29573 | { |
29574 | u32 adr, res; |
29575 | u32 src, dst; |
29576 | |
29577 | src = DREGu8((Opcode >> 9) & 7); |
29578 | FETCH_SWORD(adr); |
29579 | PRE_IO |
29580 | READ_BYTE_F(adr, dst) |
29581 | res = dst - src; |
29582 | flag_N = flag_X = flag_C = res; |
29583 | flag_V = (src ^ dst) & (res ^ dst); |
29584 | flag_NotZ = res & 0xFF; |
29585 | WRITE_BYTE_F(adr, res) |
29586 | POST_IO |
29587 | RET(16) |
29588 | } |
29589 | |
29590 | // SUBDa |
29591 | OPCODE(0x9139) |
29592 | { |
29593 | u32 adr, res; |
29594 | u32 src, dst; |
29595 | |
29596 | src = DREGu8((Opcode >> 9) & 7); |
29597 | FETCH_LONG(adr); |
29598 | PRE_IO |
29599 | READ_BYTE_F(adr, dst) |
29600 | res = dst - src; |
29601 | flag_N = flag_X = flag_C = res; |
29602 | flag_V = (src ^ dst) & (res ^ dst); |
29603 | flag_NotZ = res & 0xFF; |
29604 | WRITE_BYTE_F(adr, res) |
29605 | POST_IO |
29606 | RET(20) |
29607 | } |
29608 | |
29609 | // SUBDa |
29610 | OPCODE(0x911F) |
29611 | { |
29612 | u32 adr, res; |
29613 | u32 src, dst; |
29614 | |
29615 | src = DREGu8((Opcode >> 9) & 7); |
29616 | adr = AREG(7); |
29617 | AREG(7) += 2; |
29618 | PRE_IO |
29619 | READ_BYTE_F(adr, dst) |
29620 | res = dst - src; |
29621 | flag_N = flag_X = flag_C = res; |
29622 | flag_V = (src ^ dst) & (res ^ dst); |
29623 | flag_NotZ = res & 0xFF; |
29624 | WRITE_BYTE_F(adr, res) |
29625 | POST_IO |
29626 | RET(12) |
29627 | } |
29628 | |
29629 | // SUBDa |
29630 | OPCODE(0x9127) |
29631 | { |
29632 | u32 adr, res; |
29633 | u32 src, dst; |
29634 | |
29635 | src = DREGu8((Opcode >> 9) & 7); |
29636 | adr = AREG(7) - 2; |
29637 | AREG(7) = adr; |
29638 | PRE_IO |
29639 | READ_BYTE_F(adr, dst) |
29640 | res = dst - src; |
29641 | flag_N = flag_X = flag_C = res; |
29642 | flag_V = (src ^ dst) & (res ^ dst); |
29643 | flag_NotZ = res & 0xFF; |
29644 | WRITE_BYTE_F(adr, res) |
29645 | POST_IO |
29646 | RET(14) |
29647 | } |
29648 | |
29649 | // SUBDa |
29650 | OPCODE(0x9150) |
29651 | { |
29652 | u32 adr, res; |
29653 | u32 src, dst; |
29654 | |
29655 | src = DREGu16((Opcode >> 9) & 7); |
29656 | adr = AREG((Opcode >> 0) & 7); |
29657 | PRE_IO |
29658 | READ_WORD_F(adr, dst) |
29659 | res = dst - src; |
29660 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29661 | flag_N = flag_X = flag_C = res >> 8; |
29662 | flag_NotZ = res & 0xFFFF; |
29663 | WRITE_WORD_F(adr, res) |
29664 | POST_IO |
29665 | RET(12) |
29666 | } |
29667 | |
29668 | // SUBDa |
29669 | OPCODE(0x9158) |
29670 | { |
29671 | u32 adr, res; |
29672 | u32 src, dst; |
29673 | |
29674 | src = DREGu16((Opcode >> 9) & 7); |
29675 | adr = AREG((Opcode >> 0) & 7); |
29676 | AREG((Opcode >> 0) & 7) += 2; |
29677 | PRE_IO |
29678 | READ_WORD_F(adr, dst) |
29679 | res = dst - src; |
29680 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29681 | flag_N = flag_X = flag_C = res >> 8; |
29682 | flag_NotZ = res & 0xFFFF; |
29683 | WRITE_WORD_F(adr, res) |
29684 | POST_IO |
29685 | RET(12) |
29686 | } |
29687 | |
29688 | // SUBDa |
29689 | OPCODE(0x9160) |
29690 | { |
29691 | u32 adr, res; |
29692 | u32 src, dst; |
29693 | |
29694 | src = DREGu16((Opcode >> 9) & 7); |
29695 | adr = AREG((Opcode >> 0) & 7) - 2; |
29696 | AREG((Opcode >> 0) & 7) = adr; |
29697 | PRE_IO |
29698 | READ_WORD_F(adr, dst) |
29699 | res = dst - src; |
29700 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29701 | flag_N = flag_X = flag_C = res >> 8; |
29702 | flag_NotZ = res & 0xFFFF; |
29703 | WRITE_WORD_F(adr, res) |
29704 | POST_IO |
29705 | RET(14) |
29706 | } |
29707 | |
29708 | // SUBDa |
29709 | OPCODE(0x9168) |
29710 | { |
29711 | u32 adr, res; |
29712 | u32 src, dst; |
29713 | |
29714 | src = DREGu16((Opcode >> 9) & 7); |
29715 | FETCH_SWORD(adr); |
29716 | adr += AREG((Opcode >> 0) & 7); |
29717 | PRE_IO |
29718 | READ_WORD_F(adr, dst) |
29719 | res = dst - src; |
29720 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29721 | flag_N = flag_X = flag_C = res >> 8; |
29722 | flag_NotZ = res & 0xFFFF; |
29723 | WRITE_WORD_F(adr, res) |
29724 | POST_IO |
29725 | RET(16) |
29726 | } |
29727 | |
29728 | // SUBDa |
29729 | OPCODE(0x9170) |
29730 | { |
29731 | u32 adr, res; |
29732 | u32 src, dst; |
29733 | |
29734 | src = DREGu16((Opcode >> 9) & 7); |
29735 | adr = AREG((Opcode >> 0) & 7); |
29736 | DECODE_EXT_WORD |
29737 | PRE_IO |
29738 | READ_WORD_F(adr, dst) |
29739 | res = dst - src; |
29740 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29741 | flag_N = flag_X = flag_C = res >> 8; |
29742 | flag_NotZ = res & 0xFFFF; |
29743 | WRITE_WORD_F(adr, res) |
29744 | POST_IO |
29745 | RET(18) |
29746 | } |
29747 | |
29748 | // SUBDa |
29749 | OPCODE(0x9178) |
29750 | { |
29751 | u32 adr, res; |
29752 | u32 src, dst; |
29753 | |
29754 | src = DREGu16((Opcode >> 9) & 7); |
29755 | FETCH_SWORD(adr); |
29756 | PRE_IO |
29757 | READ_WORD_F(adr, dst) |
29758 | res = dst - src; |
29759 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29760 | flag_N = flag_X = flag_C = res >> 8; |
29761 | flag_NotZ = res & 0xFFFF; |
29762 | WRITE_WORD_F(adr, res) |
29763 | POST_IO |
29764 | RET(16) |
29765 | } |
29766 | |
29767 | // SUBDa |
29768 | OPCODE(0x9179) |
29769 | { |
29770 | u32 adr, res; |
29771 | u32 src, dst; |
29772 | |
29773 | src = DREGu16((Opcode >> 9) & 7); |
29774 | FETCH_LONG(adr); |
29775 | PRE_IO |
29776 | READ_WORD_F(adr, dst) |
29777 | res = dst - src; |
29778 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29779 | flag_N = flag_X = flag_C = res >> 8; |
29780 | flag_NotZ = res & 0xFFFF; |
29781 | WRITE_WORD_F(adr, res) |
29782 | POST_IO |
29783 | RET(20) |
29784 | } |
29785 | |
29786 | // SUBDa |
29787 | OPCODE(0x915F) |
29788 | { |
29789 | u32 adr, res; |
29790 | u32 src, dst; |
29791 | |
29792 | src = DREGu16((Opcode >> 9) & 7); |
29793 | adr = AREG(7); |
29794 | AREG(7) += 2; |
29795 | PRE_IO |
29796 | READ_WORD_F(adr, dst) |
29797 | res = dst - src; |
29798 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29799 | flag_N = flag_X = flag_C = res >> 8; |
29800 | flag_NotZ = res & 0xFFFF; |
29801 | WRITE_WORD_F(adr, res) |
29802 | POST_IO |
29803 | RET(12) |
29804 | } |
29805 | |
29806 | // SUBDa |
29807 | OPCODE(0x9167) |
29808 | { |
29809 | u32 adr, res; |
29810 | u32 src, dst; |
29811 | |
29812 | src = DREGu16((Opcode >> 9) & 7); |
29813 | adr = AREG(7) - 2; |
29814 | AREG(7) = adr; |
29815 | PRE_IO |
29816 | READ_WORD_F(adr, dst) |
29817 | res = dst - src; |
29818 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
29819 | flag_N = flag_X = flag_C = res >> 8; |
29820 | flag_NotZ = res & 0xFFFF; |
29821 | WRITE_WORD_F(adr, res) |
29822 | POST_IO |
29823 | RET(14) |
29824 | } |
29825 | |
29826 | // SUBDa |
29827 | OPCODE(0x9190) |
29828 | { |
29829 | u32 adr, res; |
29830 | u32 src, dst; |
29831 | |
29832 | src = DREGu32((Opcode >> 9) & 7); |
29833 | adr = AREG((Opcode >> 0) & 7); |
29834 | PRE_IO |
29835 | READ_LONG_F(adr, dst) |
29836 | res = dst - src; |
29837 | flag_NotZ = res; |
29838 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29839 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29840 | flag_N = res >> 24; |
29841 | WRITE_LONG_F(adr, res) |
29842 | POST_IO |
29843 | RET(20) |
29844 | } |
29845 | |
29846 | // SUBDa |
29847 | OPCODE(0x9198) |
29848 | { |
29849 | u32 adr, res; |
29850 | u32 src, dst; |
29851 | |
29852 | src = DREGu32((Opcode >> 9) & 7); |
29853 | adr = AREG((Opcode >> 0) & 7); |
29854 | AREG((Opcode >> 0) & 7) += 4; |
29855 | PRE_IO |
29856 | READ_LONG_F(adr, dst) |
29857 | res = dst - src; |
29858 | flag_NotZ = res; |
29859 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29860 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29861 | flag_N = res >> 24; |
29862 | WRITE_LONG_F(adr, res) |
29863 | POST_IO |
29864 | RET(20) |
29865 | } |
29866 | |
29867 | // SUBDa |
29868 | OPCODE(0x91A0) |
29869 | { |
29870 | u32 adr, res; |
29871 | u32 src, dst; |
29872 | |
29873 | src = DREGu32((Opcode >> 9) & 7); |
29874 | adr = AREG((Opcode >> 0) & 7) - 4; |
29875 | AREG((Opcode >> 0) & 7) = adr; |
29876 | PRE_IO |
29877 | READ_LONG_F(adr, dst) |
29878 | res = dst - src; |
29879 | flag_NotZ = res; |
29880 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29881 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29882 | flag_N = res >> 24; |
29883 | WRITE_LONG_F(adr, res) |
29884 | POST_IO |
29885 | RET(22) |
29886 | } |
29887 | |
29888 | // SUBDa |
29889 | OPCODE(0x91A8) |
29890 | { |
29891 | u32 adr, res; |
29892 | u32 src, dst; |
29893 | |
29894 | src = DREGu32((Opcode >> 9) & 7); |
29895 | FETCH_SWORD(adr); |
29896 | adr += AREG((Opcode >> 0) & 7); |
29897 | PRE_IO |
29898 | READ_LONG_F(adr, dst) |
29899 | res = dst - src; |
29900 | flag_NotZ = res; |
29901 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29902 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29903 | flag_N = res >> 24; |
29904 | WRITE_LONG_F(adr, res) |
29905 | POST_IO |
29906 | RET(24) |
29907 | } |
29908 | |
29909 | // SUBDa |
29910 | OPCODE(0x91B0) |
29911 | { |
29912 | u32 adr, res; |
29913 | u32 src, dst; |
29914 | |
29915 | src = DREGu32((Opcode >> 9) & 7); |
29916 | adr = AREG((Opcode >> 0) & 7); |
29917 | DECODE_EXT_WORD |
29918 | PRE_IO |
29919 | READ_LONG_F(adr, dst) |
29920 | res = dst - src; |
29921 | flag_NotZ = res; |
29922 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29923 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29924 | flag_N = res >> 24; |
29925 | WRITE_LONG_F(adr, res) |
29926 | POST_IO |
29927 | RET(26) |
29928 | } |
29929 | |
29930 | // SUBDa |
29931 | OPCODE(0x91B8) |
29932 | { |
29933 | u32 adr, res; |
29934 | u32 src, dst; |
29935 | |
29936 | src = DREGu32((Opcode >> 9) & 7); |
29937 | FETCH_SWORD(adr); |
29938 | PRE_IO |
29939 | READ_LONG_F(adr, dst) |
29940 | res = dst - src; |
29941 | flag_NotZ = res; |
29942 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29943 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29944 | flag_N = res >> 24; |
29945 | WRITE_LONG_F(adr, res) |
29946 | POST_IO |
29947 | RET(24) |
29948 | } |
29949 | |
29950 | // SUBDa |
29951 | OPCODE(0x91B9) |
29952 | { |
29953 | u32 adr, res; |
29954 | u32 src, dst; |
29955 | |
29956 | src = DREGu32((Opcode >> 9) & 7); |
29957 | FETCH_LONG(adr); |
29958 | PRE_IO |
29959 | READ_LONG_F(adr, dst) |
29960 | res = dst - src; |
29961 | flag_NotZ = res; |
29962 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29963 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29964 | flag_N = res >> 24; |
29965 | WRITE_LONG_F(adr, res) |
29966 | POST_IO |
29967 | RET(28) |
29968 | } |
29969 | |
29970 | // SUBDa |
29971 | OPCODE(0x919F) |
29972 | { |
29973 | u32 adr, res; |
29974 | u32 src, dst; |
29975 | |
29976 | src = DREGu32((Opcode >> 9) & 7); |
29977 | adr = AREG(7); |
29978 | AREG(7) += 4; |
29979 | PRE_IO |
29980 | READ_LONG_F(adr, dst) |
29981 | res = dst - src; |
29982 | flag_NotZ = res; |
29983 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
29984 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
29985 | flag_N = res >> 24; |
29986 | WRITE_LONG_F(adr, res) |
29987 | POST_IO |
29988 | RET(20) |
29989 | } |
29990 | |
29991 | // SUBDa |
29992 | OPCODE(0x91A7) |
29993 | { |
29994 | u32 adr, res; |
29995 | u32 src, dst; |
29996 | |
29997 | src = DREGu32((Opcode >> 9) & 7); |
29998 | adr = AREG(7) - 4; |
29999 | AREG(7) = adr; |
30000 | PRE_IO |
30001 | READ_LONG_F(adr, dst) |
30002 | res = dst - src; |
30003 | flag_NotZ = res; |
30004 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30005 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30006 | flag_N = res >> 24; |
30007 | WRITE_LONG_F(adr, res) |
30008 | POST_IO |
30009 | RET(22) |
30010 | } |
30011 | |
30012 | // SUBX |
30013 | OPCODE(0x9100) |
30014 | { |
30015 | u32 adr, res; |
30016 | u32 src, dst; |
30017 | |
30018 | src = DREGu8((Opcode >> 0) & 7); |
30019 | dst = DREGu8((Opcode >> 9) & 7); |
30020 | res = dst - src - ((flag_X >> 8) & 1); |
30021 | flag_N = flag_X = flag_C = res; |
30022 | flag_V = (src ^ dst) & (res ^ dst); |
30023 | flag_NotZ |= res & 0xFF; |
30024 | DREGu8((Opcode >> 9) & 7) = res; |
30025 | RET(4) |
30026 | } |
30027 | |
30028 | // SUBX |
30029 | OPCODE(0x9140) |
30030 | { |
30031 | u32 adr, res; |
30032 | u32 src, dst; |
30033 | |
30034 | src = DREGu16((Opcode >> 0) & 7); |
30035 | dst = DREGu16((Opcode >> 9) & 7); |
30036 | res = dst - src - ((flag_X >> 8) & 1); |
30037 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30038 | flag_N = flag_X = flag_C = res >> 8; |
30039 | flag_NotZ |= res & 0xFFFF; |
30040 | DREGu16((Opcode >> 9) & 7) = res; |
30041 | RET(4) |
30042 | } |
30043 | |
30044 | // SUBX |
30045 | OPCODE(0x9180) |
30046 | { |
30047 | u32 adr, res; |
30048 | u32 src, dst; |
30049 | |
30050 | src = DREGu32((Opcode >> 0) & 7); |
30051 | dst = DREGu32((Opcode >> 9) & 7); |
30052 | res = dst - src - ((flag_X >> 8) & 1); |
30053 | flag_NotZ |= res; |
30054 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30055 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30056 | flag_N = res >> 24; |
30057 | DREGu32((Opcode >> 9) & 7) = res; |
30058 | RET(8) |
30059 | } |
30060 | |
30061 | // SUBXM |
30062 | OPCODE(0x9108) |
30063 | { |
30064 | u32 adr, res; |
30065 | u32 src, dst; |
30066 | |
30067 | adr = AREG((Opcode >> 0) & 7) - 1; |
30068 | AREG((Opcode >> 0) & 7) = adr; |
30069 | PRE_IO |
30070 | READ_BYTE_F(adr, src) |
30071 | adr = AREG((Opcode >> 9) & 7) - 1; |
30072 | AREG((Opcode >> 9) & 7) = adr; |
30073 | READ_BYTE_F(adr, dst) |
30074 | res = dst - src - ((flag_X >> 8) & 1); |
30075 | flag_N = flag_X = flag_C = res; |
30076 | flag_V = (src ^ dst) & (res ^ dst); |
30077 | flag_NotZ |= res & 0xFF; |
30078 | WRITE_BYTE_F(adr, res) |
30079 | POST_IO |
30080 | RET(18) |
30081 | } |
30082 | |
30083 | // SUBXM |
30084 | OPCODE(0x9148) |
30085 | { |
30086 | u32 adr, res; |
30087 | u32 src, dst; |
30088 | |
30089 | adr = AREG((Opcode >> 0) & 7) - 2; |
30090 | AREG((Opcode >> 0) & 7) = adr; |
30091 | PRE_IO |
30092 | READ_WORD_F(adr, src) |
30093 | adr = AREG((Opcode >> 9) & 7) - 2; |
30094 | AREG((Opcode >> 9) & 7) = adr; |
30095 | READ_WORD_F(adr, dst) |
30096 | res = dst - src - ((flag_X >> 8) & 1); |
30097 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30098 | flag_N = flag_X = flag_C = res >> 8; |
30099 | flag_NotZ |= res & 0xFFFF; |
30100 | WRITE_WORD_F(adr, res) |
30101 | POST_IO |
30102 | RET(18) |
30103 | } |
30104 | |
30105 | // SUBXM |
30106 | OPCODE(0x9188) |
30107 | { |
30108 | u32 adr, res; |
30109 | u32 src, dst; |
30110 | |
30111 | adr = AREG((Opcode >> 0) & 7) - 4; |
30112 | AREG((Opcode >> 0) & 7) = adr; |
30113 | PRE_IO |
30114 | READ_LONG_F(adr, src) |
30115 | adr = AREG((Opcode >> 9) & 7) - 4; |
30116 | AREG((Opcode >> 9) & 7) = adr; |
30117 | READ_LONG_F(adr, dst) |
30118 | res = dst - src - ((flag_X >> 8) & 1); |
30119 | flag_NotZ |= res; |
30120 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30121 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30122 | flag_N = res >> 24; |
30123 | WRITE_LONG_F(adr, res) |
30124 | POST_IO |
30125 | RET(30) |
30126 | } |
30127 | |
30128 | // SUBX7M |
30129 | OPCODE(0x910F) |
30130 | { |
30131 | u32 adr, res; |
30132 | u32 src, dst; |
30133 | |
30134 | adr = AREG(7) - 2; |
30135 | AREG(7) = adr; |
30136 | PRE_IO |
30137 | READ_BYTE_F(adr, src) |
30138 | adr = AREG((Opcode >> 9) & 7) - 1; |
30139 | AREG((Opcode >> 9) & 7) = adr; |
30140 | READ_BYTE_F(adr, dst) |
30141 | res = dst - src - ((flag_X >> 8) & 1); |
30142 | flag_N = flag_X = flag_C = res; |
30143 | flag_V = (src ^ dst) & (res ^ dst); |
30144 | flag_NotZ |= res & 0xFF; |
30145 | WRITE_BYTE_F(adr, res) |
30146 | POST_IO |
30147 | RET(18) |
30148 | } |
30149 | |
30150 | // SUBX7M |
30151 | OPCODE(0x914F) |
30152 | { |
30153 | u32 adr, res; |
30154 | u32 src, dst; |
30155 | |
30156 | adr = AREG(7) - 2; |
30157 | AREG(7) = adr; |
30158 | PRE_IO |
30159 | READ_WORD_F(adr, src) |
30160 | adr = AREG((Opcode >> 9) & 7) - 2; |
30161 | AREG((Opcode >> 9) & 7) = adr; |
30162 | READ_WORD_F(adr, dst) |
30163 | res = dst - src - ((flag_X >> 8) & 1); |
30164 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30165 | flag_N = flag_X = flag_C = res >> 8; |
30166 | flag_NotZ |= res & 0xFFFF; |
30167 | WRITE_WORD_F(adr, res) |
30168 | POST_IO |
30169 | RET(18) |
30170 | } |
30171 | |
30172 | // SUBX7M |
30173 | OPCODE(0x918F) |
30174 | { |
30175 | u32 adr, res; |
30176 | u32 src, dst; |
30177 | |
30178 | adr = AREG(7) - 4; |
30179 | AREG(7) = adr; |
30180 | PRE_IO |
30181 | READ_LONG_F(adr, src) |
30182 | adr = AREG((Opcode >> 9) & 7) - 4; |
30183 | AREG((Opcode >> 9) & 7) = adr; |
30184 | READ_LONG_F(adr, dst) |
30185 | res = dst - src - ((flag_X >> 8) & 1); |
30186 | flag_NotZ |= res; |
30187 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30188 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30189 | flag_N = res >> 24; |
30190 | WRITE_LONG_F(adr, res) |
30191 | POST_IO |
30192 | RET(30) |
30193 | } |
30194 | |
30195 | // SUBXM7 |
30196 | OPCODE(0x9F08) |
30197 | { |
30198 | u32 adr, res; |
30199 | u32 src, dst; |
30200 | |
30201 | adr = AREG((Opcode >> 0) & 7) - 1; |
30202 | AREG((Opcode >> 0) & 7) = adr; |
30203 | PRE_IO |
30204 | READ_BYTE_F(adr, src) |
30205 | adr = AREG(7) - 2; |
30206 | AREG(7) = adr; |
30207 | READ_BYTE_F(adr, dst) |
30208 | res = dst - src - ((flag_X >> 8) & 1); |
30209 | flag_N = flag_X = flag_C = res; |
30210 | flag_V = (src ^ dst) & (res ^ dst); |
30211 | flag_NotZ |= res & 0xFF; |
30212 | WRITE_BYTE_F(adr, res) |
30213 | POST_IO |
30214 | RET(18) |
30215 | } |
30216 | |
30217 | // SUBXM7 |
30218 | OPCODE(0x9F48) |
30219 | { |
30220 | u32 adr, res; |
30221 | u32 src, dst; |
30222 | |
30223 | adr = AREG((Opcode >> 0) & 7) - 2; |
30224 | AREG((Opcode >> 0) & 7) = adr; |
30225 | PRE_IO |
30226 | READ_WORD_F(adr, src) |
30227 | adr = AREG(7) - 2; |
30228 | AREG(7) = adr; |
30229 | READ_WORD_F(adr, dst) |
30230 | res = dst - src - ((flag_X >> 8) & 1); |
30231 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30232 | flag_N = flag_X = flag_C = res >> 8; |
30233 | flag_NotZ |= res & 0xFFFF; |
30234 | WRITE_WORD_F(adr, res) |
30235 | POST_IO |
30236 | RET(18) |
30237 | } |
30238 | |
30239 | // SUBXM7 |
30240 | OPCODE(0x9F88) |
30241 | { |
30242 | u32 adr, res; |
30243 | u32 src, dst; |
30244 | |
30245 | adr = AREG((Opcode >> 0) & 7) - 4; |
30246 | AREG((Opcode >> 0) & 7) = adr; |
30247 | PRE_IO |
30248 | READ_LONG_F(adr, src) |
30249 | adr = AREG(7) - 4; |
30250 | AREG(7) = adr; |
30251 | READ_LONG_F(adr, dst) |
30252 | res = dst - src - ((flag_X >> 8) & 1); |
30253 | flag_NotZ |= res; |
30254 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30255 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30256 | flag_N = res >> 24; |
30257 | WRITE_LONG_F(adr, res) |
30258 | POST_IO |
30259 | RET(30) |
30260 | } |
30261 | |
30262 | // SUBX7M7 |
30263 | OPCODE(0x9F0F) |
30264 | { |
30265 | u32 adr, res; |
30266 | u32 src, dst; |
30267 | |
30268 | adr = AREG(7) - 2; |
30269 | AREG(7) = adr; |
30270 | PRE_IO |
30271 | READ_BYTE_F(adr, src) |
30272 | adr = AREG(7) - 2; |
30273 | AREG(7) = adr; |
30274 | READ_BYTE_F(adr, dst) |
30275 | res = dst - src - ((flag_X >> 8) & 1); |
30276 | flag_N = flag_X = flag_C = res; |
30277 | flag_V = (src ^ dst) & (res ^ dst); |
30278 | flag_NotZ |= res & 0xFF; |
30279 | WRITE_BYTE_F(adr, res) |
30280 | POST_IO |
30281 | RET(18) |
30282 | } |
30283 | |
30284 | // SUBX7M7 |
30285 | OPCODE(0x9F4F) |
30286 | { |
30287 | u32 adr, res; |
30288 | u32 src, dst; |
30289 | |
30290 | adr = AREG(7) - 2; |
30291 | AREG(7) = adr; |
30292 | PRE_IO |
30293 | READ_WORD_F(adr, src) |
30294 | adr = AREG(7) - 2; |
30295 | AREG(7) = adr; |
30296 | READ_WORD_F(adr, dst) |
30297 | res = dst - src - ((flag_X >> 8) & 1); |
30298 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
30299 | flag_N = flag_X = flag_C = res >> 8; |
30300 | flag_NotZ |= res & 0xFFFF; |
30301 | WRITE_WORD_F(adr, res) |
30302 | POST_IO |
30303 | RET(18) |
30304 | } |
30305 | |
30306 | // SUBX7M7 |
30307 | OPCODE(0x9F8F) |
30308 | { |
30309 | u32 adr, res; |
30310 | u32 src, dst; |
30311 | |
30312 | adr = AREG(7) - 4; |
30313 | AREG(7) = adr; |
30314 | PRE_IO |
30315 | READ_LONG_F(adr, src) |
30316 | adr = AREG(7) - 4; |
30317 | AREG(7) = adr; |
30318 | READ_LONG_F(adr, dst) |
30319 | res = dst - src - ((flag_X >> 8) & 1); |
30320 | flag_NotZ |= res; |
30321 | flag_X = flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
30322 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
30323 | flag_N = res >> 24; |
30324 | WRITE_LONG_F(adr, res) |
30325 | POST_IO |
30326 | RET(30) |
30327 | } |
30328 | |
30329 | // SUBA |
30330 | OPCODE(0x90C0) |
30331 | { |
30332 | u32 adr, res; |
30333 | u32 src, dst; |
30334 | |
30335 | src = (s32)DREGs16((Opcode >> 0) & 7); |
30336 | dst = AREGu32((Opcode >> 9) & 7); |
30337 | res = dst - src; |
30338 | AREG((Opcode >> 9) & 7) = res; |
30339 | RET(8) |
30340 | } |
30341 | |
30342 | // SUBA |
30343 | OPCODE(0x90C8) |
30344 | { |
30345 | u32 adr, res; |
30346 | u32 src, dst; |
30347 | |
30348 | src = (s32)AREGs16((Opcode >> 0) & 7); |
30349 | dst = AREGu32((Opcode >> 9) & 7); |
30350 | res = dst - src; |
30351 | AREG((Opcode >> 9) & 7) = res; |
30352 | RET(8) |
30353 | } |
30354 | |
30355 | // SUBA |
30356 | OPCODE(0x90D0) |
30357 | { |
30358 | u32 adr, res; |
30359 | u32 src, dst; |
30360 | |
30361 | adr = AREG((Opcode >> 0) & 7); |
30362 | PRE_IO |
30363 | READSX_WORD_F(adr, src) |
30364 | dst = AREGu32((Opcode >> 9) & 7); |
30365 | res = dst - src; |
30366 | AREG((Opcode >> 9) & 7) = res; |
30367 | POST_IO |
9d917eea |
30368 | #ifdef USE_CYCLONE_TIMING |
30369 | RET(12) |
30370 | #else |
70357ce5 |
30371 | RET(10) |
9d917eea |
30372 | #endif |
70357ce5 |
30373 | } |
30374 | |
30375 | // SUBA |
30376 | OPCODE(0x90D8) |
30377 | { |
30378 | u32 adr, res; |
30379 | u32 src, dst; |
30380 | |
30381 | adr = AREG((Opcode >> 0) & 7); |
30382 | AREG((Opcode >> 0) & 7) += 2; |
30383 | PRE_IO |
30384 | READSX_WORD_F(adr, src) |
30385 | dst = AREGu32((Opcode >> 9) & 7); |
30386 | res = dst - src; |
30387 | AREG((Opcode >> 9) & 7) = res; |
30388 | POST_IO |
9d917eea |
30389 | #ifdef USE_CYCLONE_TIMING |
30390 | RET(12) |
30391 | #else |
70357ce5 |
30392 | RET(10) |
9d917eea |
30393 | #endif |
70357ce5 |
30394 | } |
30395 | |
30396 | // SUBA |
30397 | OPCODE(0x90E0) |
30398 | { |
30399 | u32 adr, res; |
30400 | u32 src, dst; |
30401 | |
30402 | adr = AREG((Opcode >> 0) & 7) - 2; |
30403 | AREG((Opcode >> 0) & 7) = adr; |
30404 | PRE_IO |
30405 | READSX_WORD_F(adr, src) |
30406 | dst = AREGu32((Opcode >> 9) & 7); |
30407 | res = dst - src; |
30408 | AREG((Opcode >> 9) & 7) = res; |
30409 | POST_IO |
9d917eea |
30410 | #ifdef USE_CYCLONE_TIMING |
30411 | RET(14) |
30412 | #else |
70357ce5 |
30413 | RET(12) |
9d917eea |
30414 | #endif |
70357ce5 |
30415 | } |
30416 | |
30417 | // SUBA |
30418 | OPCODE(0x90E8) |
30419 | { |
30420 | u32 adr, res; |
30421 | u32 src, dst; |
30422 | |
30423 | FETCH_SWORD(adr); |
30424 | adr += AREG((Opcode >> 0) & 7); |
30425 | PRE_IO |
30426 | READSX_WORD_F(adr, src) |
30427 | dst = AREGu32((Opcode >> 9) & 7); |
30428 | res = dst - src; |
30429 | AREG((Opcode >> 9) & 7) = res; |
30430 | POST_IO |
9d917eea |
30431 | #ifdef USE_CYCLONE_TIMING |
30432 | RET(16) |
30433 | #else |
70357ce5 |
30434 | RET(14) |
9d917eea |
30435 | #endif |
70357ce5 |
30436 | } |
30437 | |
30438 | // SUBA |
30439 | OPCODE(0x90F0) |
30440 | { |
30441 | u32 adr, res; |
30442 | u32 src, dst; |
30443 | |
30444 | adr = AREG((Opcode >> 0) & 7); |
30445 | DECODE_EXT_WORD |
30446 | PRE_IO |
30447 | READSX_WORD_F(adr, src) |
30448 | dst = AREGu32((Opcode >> 9) & 7); |
30449 | res = dst - src; |
30450 | AREG((Opcode >> 9) & 7) = res; |
30451 | POST_IO |
9d917eea |
30452 | #ifdef USE_CYCLONE_TIMING |
30453 | RET(18) |
30454 | #else |
70357ce5 |
30455 | RET(16) |
9d917eea |
30456 | #endif |
70357ce5 |
30457 | } |
30458 | |
30459 | // SUBA |
30460 | OPCODE(0x90F8) |
30461 | { |
30462 | u32 adr, res; |
30463 | u32 src, dst; |
30464 | |
30465 | FETCH_SWORD(adr); |
30466 | PRE_IO |
30467 | READSX_WORD_F(adr, src) |
30468 | dst = AREGu32((Opcode >> 9) & 7); |
30469 | res = dst - src; |
30470 | AREG((Opcode >> 9) & 7) = res; |
30471 | POST_IO |
9d917eea |
30472 | #ifdef USE_CYCLONE_TIMING |
30473 | RET(16) |
30474 | #else |
70357ce5 |
30475 | RET(14) |
9d917eea |
30476 | #endif |
70357ce5 |
30477 | } |
30478 | |
30479 | // SUBA |
30480 | OPCODE(0x90F9) |
30481 | { |
30482 | u32 adr, res; |
30483 | u32 src, dst; |
30484 | |
30485 | FETCH_LONG(adr); |
30486 | PRE_IO |
30487 | READSX_WORD_F(adr, src) |
30488 | dst = AREGu32((Opcode >> 9) & 7); |
30489 | res = dst - src; |
30490 | AREG((Opcode >> 9) & 7) = res; |
30491 | POST_IO |
9d917eea |
30492 | #ifdef USE_CYCLONE_TIMING |
30493 | RET(20) |
30494 | #else |
70357ce5 |
30495 | RET(18) |
9d917eea |
30496 | #endif |
70357ce5 |
30497 | } |
30498 | |
30499 | // SUBA |
30500 | OPCODE(0x90FA) |
30501 | { |
30502 | u32 adr, res; |
30503 | u32 src, dst; |
30504 | |
be26eb23 |
30505 | adr = GET_SWORD + GET_PC; |
70357ce5 |
30506 | PC++; |
30507 | PRE_IO |
30508 | READSX_WORD_F(adr, src) |
30509 | dst = AREGu32((Opcode >> 9) & 7); |
30510 | res = dst - src; |
30511 | AREG((Opcode >> 9) & 7) = res; |
30512 | POST_IO |
9d917eea |
30513 | #ifdef USE_CYCLONE_TIMING |
30514 | RET(16) |
30515 | #else |
70357ce5 |
30516 | RET(14) |
9d917eea |
30517 | #endif |
70357ce5 |
30518 | } |
30519 | |
30520 | // SUBA |
30521 | OPCODE(0x90FB) |
30522 | { |
30523 | u32 adr, res; |
30524 | u32 src, dst; |
30525 | |
be26eb23 |
30526 | adr = GET_PC; |
70357ce5 |
30527 | DECODE_EXT_WORD |
30528 | PRE_IO |
30529 | READSX_WORD_F(adr, src) |
30530 | dst = AREGu32((Opcode >> 9) & 7); |
30531 | res = dst - src; |
30532 | AREG((Opcode >> 9) & 7) = res; |
30533 | POST_IO |
9d917eea |
30534 | #ifdef USE_CYCLONE_TIMING |
30535 | RET(18) |
30536 | #else |
70357ce5 |
30537 | RET(16) |
9d917eea |
30538 | #endif |
70357ce5 |
30539 | } |
30540 | |
30541 | // SUBA |
30542 | OPCODE(0x90FC) |
30543 | { |
30544 | u32 adr, res; |
30545 | u32 src, dst; |
30546 | |
30547 | FETCH_SWORD(src); |
30548 | dst = AREGu32((Opcode >> 9) & 7); |
30549 | res = dst - src; |
30550 | AREG((Opcode >> 9) & 7) = res; |
30551 | RET(12) |
30552 | } |
30553 | |
30554 | // SUBA |
30555 | OPCODE(0x90DF) |
30556 | { |
30557 | u32 adr, res; |
30558 | u32 src, dst; |
30559 | |
30560 | adr = AREG(7); |
30561 | AREG(7) += 2; |
30562 | PRE_IO |
30563 | READSX_WORD_F(adr, src) |
30564 | dst = AREGu32((Opcode >> 9) & 7); |
30565 | res = dst - src; |
30566 | AREG((Opcode >> 9) & 7) = res; |
30567 | POST_IO |
9d917eea |
30568 | #ifdef USE_CYCLONE_TIMING |
30569 | RET(12) |
30570 | #else |
70357ce5 |
30571 | RET(10) |
9d917eea |
30572 | #endif |
70357ce5 |
30573 | } |
30574 | |
30575 | // SUBA |
30576 | OPCODE(0x90E7) |
30577 | { |
30578 | u32 adr, res; |
30579 | u32 src, dst; |
30580 | |
30581 | adr = AREG(7) - 2; |
30582 | AREG(7) = adr; |
30583 | PRE_IO |
30584 | READSX_WORD_F(adr, src) |
30585 | dst = AREGu32((Opcode >> 9) & 7); |
30586 | res = dst - src; |
30587 | AREG((Opcode >> 9) & 7) = res; |
30588 | POST_IO |
9d917eea |
30589 | #ifdef USE_CYCLONE_TIMING |
30590 | RET(14) |
30591 | #else |
70357ce5 |
30592 | RET(12) |
9d917eea |
30593 | #endif |
70357ce5 |
30594 | } |
30595 | |
30596 | // SUBA |
30597 | OPCODE(0x91C0) |
30598 | { |
30599 | u32 adr, res; |
30600 | u32 src, dst; |
30601 | |
30602 | src = (s32)DREGs32((Opcode >> 0) & 7); |
30603 | dst = AREGu32((Opcode >> 9) & 7); |
30604 | res = dst - src; |
30605 | AREG((Opcode >> 9) & 7) = res; |
30606 | #ifdef USE_CYCLONE_TIMING |
30607 | RET(8) |
30608 | #else |
30609 | RET(6) |
30610 | #endif |
30611 | } |
30612 | |
30613 | // SUBA |
30614 | OPCODE(0x91C8) |
30615 | { |
30616 | u32 adr, res; |
30617 | u32 src, dst; |
30618 | |
30619 | src = (s32)AREGs32((Opcode >> 0) & 7); |
30620 | dst = AREGu32((Opcode >> 9) & 7); |
30621 | res = dst - src; |
30622 | AREG((Opcode >> 9) & 7) = res; |
30623 | #ifdef USE_CYCLONE_TIMING |
30624 | RET(8) |
30625 | #else |
30626 | RET(6) |
30627 | #endif |
30628 | } |
30629 | |
30630 | // SUBA |
30631 | OPCODE(0x91D0) |
30632 | { |
30633 | u32 adr, res; |
30634 | u32 src, dst; |
30635 | |
30636 | adr = AREG((Opcode >> 0) & 7); |
30637 | PRE_IO |
30638 | READSX_LONG_F(adr, src) |
30639 | dst = AREGu32((Opcode >> 9) & 7); |
30640 | res = dst - src; |
30641 | AREG((Opcode >> 9) & 7) = res; |
30642 | POST_IO |
30643 | RET(14) |
30644 | } |
30645 | |
30646 | // SUBA |
30647 | OPCODE(0x91D8) |
30648 | { |
30649 | u32 adr, res; |
30650 | u32 src, dst; |
30651 | |
30652 | adr = AREG((Opcode >> 0) & 7); |
30653 | AREG((Opcode >> 0) & 7) += 4; |
30654 | PRE_IO |
30655 | READSX_LONG_F(adr, src) |
30656 | dst = AREGu32((Opcode >> 9) & 7); |
30657 | res = dst - src; |
30658 | AREG((Opcode >> 9) & 7) = res; |
30659 | POST_IO |
30660 | RET(14) |
30661 | } |
30662 | |
30663 | // SUBA |
30664 | OPCODE(0x91E0) |
30665 | { |
30666 | u32 adr, res; |
30667 | u32 src, dst; |
30668 | |
30669 | adr = AREG((Opcode >> 0) & 7) - 4; |
30670 | AREG((Opcode >> 0) & 7) = adr; |
30671 | PRE_IO |
30672 | READSX_LONG_F(adr, src) |
30673 | dst = AREGu32((Opcode >> 9) & 7); |
30674 | res = dst - src; |
30675 | AREG((Opcode >> 9) & 7) = res; |
30676 | POST_IO |
30677 | RET(16) |
30678 | } |
30679 | |
30680 | // SUBA |
30681 | OPCODE(0x91E8) |
30682 | { |
30683 | u32 adr, res; |
30684 | u32 src, dst; |
30685 | |
30686 | FETCH_SWORD(adr); |
30687 | adr += AREG((Opcode >> 0) & 7); |
30688 | PRE_IO |
30689 | READSX_LONG_F(adr, src) |
30690 | dst = AREGu32((Opcode >> 9) & 7); |
30691 | res = dst - src; |
30692 | AREG((Opcode >> 9) & 7) = res; |
30693 | POST_IO |
30694 | RET(18) |
30695 | } |
30696 | |
30697 | // SUBA |
30698 | OPCODE(0x91F0) |
30699 | { |
30700 | u32 adr, res; |
30701 | u32 src, dst; |
30702 | |
30703 | adr = AREG((Opcode >> 0) & 7); |
30704 | DECODE_EXT_WORD |
30705 | PRE_IO |
30706 | READSX_LONG_F(adr, src) |
30707 | dst = AREGu32((Opcode >> 9) & 7); |
30708 | res = dst - src; |
30709 | AREG((Opcode >> 9) & 7) = res; |
30710 | POST_IO |
30711 | RET(20) |
30712 | } |
30713 | |
30714 | // SUBA |
30715 | OPCODE(0x91F8) |
30716 | { |
30717 | u32 adr, res; |
30718 | u32 src, dst; |
30719 | |
30720 | FETCH_SWORD(adr); |
30721 | PRE_IO |
30722 | READSX_LONG_F(adr, src) |
30723 | dst = AREGu32((Opcode >> 9) & 7); |
30724 | res = dst - src; |
30725 | AREG((Opcode >> 9) & 7) = res; |
30726 | POST_IO |
30727 | RET(18) |
30728 | } |
30729 | |
30730 | // SUBA |
30731 | OPCODE(0x91F9) |
30732 | { |
30733 | u32 adr, res; |
30734 | u32 src, dst; |
30735 | |
30736 | FETCH_LONG(adr); |
30737 | PRE_IO |
30738 | READSX_LONG_F(adr, src) |
30739 | dst = AREGu32((Opcode >> 9) & 7); |
30740 | res = dst - src; |
30741 | AREG((Opcode >> 9) & 7) = res; |
30742 | POST_IO |
30743 | RET(22) |
30744 | } |
30745 | |
30746 | // SUBA |
30747 | OPCODE(0x91FA) |
30748 | { |
30749 | u32 adr, res; |
30750 | u32 src, dst; |
30751 | |
be26eb23 |
30752 | adr = GET_SWORD + GET_PC; |
70357ce5 |
30753 | PC++; |
30754 | PRE_IO |
30755 | READSX_LONG_F(adr, src) |
30756 | dst = AREGu32((Opcode >> 9) & 7); |
30757 | res = dst - src; |
30758 | AREG((Opcode >> 9) & 7) = res; |
30759 | POST_IO |
30760 | RET(18) |
30761 | } |
30762 | |
30763 | // SUBA |
30764 | OPCODE(0x91FB) |
30765 | { |
30766 | u32 adr, res; |
30767 | u32 src, dst; |
30768 | |
be26eb23 |
30769 | adr = GET_PC; |
70357ce5 |
30770 | DECODE_EXT_WORD |
30771 | PRE_IO |
30772 | READSX_LONG_F(adr, src) |
30773 | dst = AREGu32((Opcode >> 9) & 7); |
30774 | res = dst - src; |
30775 | AREG((Opcode >> 9) & 7) = res; |
30776 | POST_IO |
30777 | RET(20) |
30778 | } |
30779 | |
30780 | // SUBA |
30781 | OPCODE(0x91FC) |
30782 | { |
30783 | u32 adr, res; |
30784 | u32 src, dst; |
30785 | |
30786 | FETCH_LONG(src); |
30787 | dst = AREGu32((Opcode >> 9) & 7); |
30788 | res = dst - src; |
30789 | AREG((Opcode >> 9) & 7) = res; |
30790 | #ifdef USE_CYCLONE_TIMING |
30791 | RET(16) |
30792 | #else |
30793 | RET(14) |
30794 | #endif |
30795 | } |
30796 | |
30797 | // SUBA |
30798 | OPCODE(0x91DF) |
30799 | { |
30800 | u32 adr, res; |
30801 | u32 src, dst; |
30802 | |
30803 | adr = AREG(7); |
30804 | AREG(7) += 4; |
30805 | PRE_IO |
30806 | READSX_LONG_F(adr, src) |
30807 | dst = AREGu32((Opcode >> 9) & 7); |
30808 | res = dst - src; |
30809 | AREG((Opcode >> 9) & 7) = res; |
30810 | POST_IO |
30811 | RET(14) |
30812 | } |
30813 | |
30814 | // SUBA |
30815 | OPCODE(0x91E7) |
30816 | { |
30817 | u32 adr, res; |
30818 | u32 src, dst; |
30819 | |
30820 | adr = AREG(7) - 4; |
30821 | AREG(7) = adr; |
30822 | PRE_IO |
30823 | READSX_LONG_F(adr, src) |
30824 | dst = AREGu32((Opcode >> 9) & 7); |
30825 | res = dst - src; |
30826 | AREG((Opcode >> 9) & 7) = res; |
30827 | POST_IO |
30828 | RET(16) |
30829 | } |
30830 | |
30831 | // CMP |
30832 | OPCODE(0xB000) |
30833 | { |
30834 | u32 adr, res; |
30835 | u32 src, dst; |
30836 | |
30837 | src = DREGu8((Opcode >> 0) & 7); |
30838 | dst = DREGu8((Opcode >> 9) & 7); |
30839 | res = dst - src; |
30840 | flag_N = flag_C = res; |
30841 | flag_V = (src ^ dst) & (res ^ dst); |
30842 | flag_NotZ = res & 0xFF; |
30843 | RET(4) |
30844 | } |
30845 | |
30846 | // CMP |
03e4f2a3 |
30847 | #if 0 |
70357ce5 |
30848 | OPCODE(0xB008) |
30849 | { |
30850 | u32 adr, res; |
30851 | u32 src, dst; |
30852 | |
30853 | // can't read byte from Ax registers ! |
7669591e |
30854 | ctx->execinfo |= M68K_FAULTED; |
30855 | ctx->io_cycle_counter = 0; |
70357ce5 |
30856 | /* |
30857 | goto famec_Exec_End; |
30858 | dst = DREGu8((Opcode >> 9) & 7); |
30859 | res = dst - src; |
30860 | flag_N = flag_C = res; |
30861 | flag_V = (src ^ dst) & (res ^ dst); |
30862 | flag_NotZ = res & 0xFF; |
30863 | */ |
30864 | RET(4) |
30865 | } |
03e4f2a3 |
30866 | #endif |
70357ce5 |
30867 | |
30868 | // CMP |
30869 | OPCODE(0xB010) |
30870 | { |
30871 | u32 adr, res; |
30872 | u32 src, dst; |
30873 | |
30874 | adr = AREG((Opcode >> 0) & 7); |
30875 | PRE_IO |
30876 | READ_BYTE_F(adr, src) |
30877 | dst = DREGu8((Opcode >> 9) & 7); |
30878 | res = dst - src; |
30879 | flag_N = flag_C = res; |
30880 | flag_V = (src ^ dst) & (res ^ dst); |
30881 | flag_NotZ = res & 0xFF; |
30882 | POST_IO |
30883 | RET(8) |
30884 | } |
30885 | |
30886 | // CMP |
30887 | OPCODE(0xB018) |
30888 | { |
30889 | u32 adr, res; |
30890 | u32 src, dst; |
30891 | |
30892 | adr = AREG((Opcode >> 0) & 7); |
30893 | AREG((Opcode >> 0) & 7) += 1; |
30894 | PRE_IO |
30895 | READ_BYTE_F(adr, src) |
30896 | dst = DREGu8((Opcode >> 9) & 7); |
30897 | res = dst - src; |
30898 | flag_N = flag_C = res; |
30899 | flag_V = (src ^ dst) & (res ^ dst); |
30900 | flag_NotZ = res & 0xFF; |
30901 | POST_IO |
30902 | RET(8) |
30903 | } |
30904 | |
30905 | // CMP |
30906 | OPCODE(0xB020) |
30907 | { |
30908 | u32 adr, res; |
30909 | u32 src, dst; |
30910 | |
30911 | adr = AREG((Opcode >> 0) & 7) - 1; |
30912 | AREG((Opcode >> 0) & 7) = adr; |
30913 | PRE_IO |
30914 | READ_BYTE_F(adr, src) |
30915 | dst = DREGu8((Opcode >> 9) & 7); |
30916 | res = dst - src; |
30917 | flag_N = flag_C = res; |
30918 | flag_V = (src ^ dst) & (res ^ dst); |
30919 | flag_NotZ = res & 0xFF; |
30920 | POST_IO |
30921 | RET(10) |
30922 | } |
30923 | |
30924 | // CMP |
30925 | OPCODE(0xB028) |
30926 | { |
30927 | u32 adr, res; |
30928 | u32 src, dst; |
30929 | |
30930 | FETCH_SWORD(adr); |
30931 | adr += AREG((Opcode >> 0) & 7); |
30932 | PRE_IO |
30933 | READ_BYTE_F(adr, src) |
30934 | dst = DREGu8((Opcode >> 9) & 7); |
30935 | res = dst - src; |
30936 | flag_N = flag_C = res; |
30937 | flag_V = (src ^ dst) & (res ^ dst); |
30938 | flag_NotZ = res & 0xFF; |
30939 | POST_IO |
30940 | RET(12) |
30941 | } |
30942 | |
30943 | // CMP |
30944 | OPCODE(0xB030) |
30945 | { |
30946 | u32 adr, res; |
30947 | u32 src, dst; |
30948 | |
30949 | adr = AREG((Opcode >> 0) & 7); |
30950 | DECODE_EXT_WORD |
30951 | PRE_IO |
30952 | READ_BYTE_F(adr, src) |
30953 | dst = DREGu8((Opcode >> 9) & 7); |
30954 | res = dst - src; |
30955 | flag_N = flag_C = res; |
30956 | flag_V = (src ^ dst) & (res ^ dst); |
30957 | flag_NotZ = res & 0xFF; |
30958 | POST_IO |
30959 | RET(14) |
30960 | } |
30961 | |
30962 | // CMP |
30963 | OPCODE(0xB038) |
30964 | { |
30965 | u32 adr, res; |
30966 | u32 src, dst; |
30967 | |
30968 | FETCH_SWORD(adr); |
30969 | PRE_IO |
30970 | READ_BYTE_F(adr, src) |
30971 | dst = DREGu8((Opcode >> 9) & 7); |
30972 | res = dst - src; |
30973 | flag_N = flag_C = res; |
30974 | flag_V = (src ^ dst) & (res ^ dst); |
30975 | flag_NotZ = res & 0xFF; |
30976 | POST_IO |
30977 | RET(12) |
30978 | } |
30979 | |
30980 | // CMP |
30981 | OPCODE(0xB039) |
30982 | { |
30983 | u32 adr, res; |
30984 | u32 src, dst; |
30985 | |
30986 | FETCH_LONG(adr); |
30987 | PRE_IO |
30988 | READ_BYTE_F(adr, src) |
30989 | dst = DREGu8((Opcode >> 9) & 7); |
30990 | res = dst - src; |
30991 | flag_N = flag_C = res; |
30992 | flag_V = (src ^ dst) & (res ^ dst); |
30993 | flag_NotZ = res & 0xFF; |
30994 | POST_IO |
30995 | RET(16) |
30996 | } |
30997 | |
30998 | // CMP |
30999 | OPCODE(0xB03A) |
31000 | { |
31001 | u32 adr, res; |
31002 | u32 src, dst; |
31003 | |
be26eb23 |
31004 | adr = GET_SWORD + GET_PC; |
70357ce5 |
31005 | PC++; |
31006 | PRE_IO |
31007 | READ_BYTE_F(adr, src) |
31008 | dst = DREGu8((Opcode >> 9) & 7); |
31009 | res = dst - src; |
31010 | flag_N = flag_C = res; |
31011 | flag_V = (src ^ dst) & (res ^ dst); |
31012 | flag_NotZ = res & 0xFF; |
31013 | POST_IO |
31014 | RET(12) |
31015 | } |
31016 | |
31017 | // CMP |
31018 | OPCODE(0xB03B) |
31019 | { |
31020 | u32 adr, res; |
31021 | u32 src, dst; |
31022 | |
be26eb23 |
31023 | adr = GET_PC; |
70357ce5 |
31024 | DECODE_EXT_WORD |
31025 | PRE_IO |
31026 | READ_BYTE_F(adr, src) |
31027 | dst = DREGu8((Opcode >> 9) & 7); |
31028 | res = dst - src; |
31029 | flag_N = flag_C = res; |
31030 | flag_V = (src ^ dst) & (res ^ dst); |
31031 | flag_NotZ = res & 0xFF; |
31032 | POST_IO |
31033 | RET(14) |
31034 | } |
31035 | |
31036 | // CMP |
31037 | OPCODE(0xB03C) |
31038 | { |
31039 | u32 adr, res; |
31040 | u32 src, dst; |
31041 | |
31042 | FETCH_BYTE(src); |
31043 | dst = DREGu8((Opcode >> 9) & 7); |
31044 | res = dst - src; |
31045 | flag_N = flag_C = res; |
31046 | flag_V = (src ^ dst) & (res ^ dst); |
31047 | flag_NotZ = res & 0xFF; |
31048 | RET(8) |
31049 | } |
31050 | |
31051 | // CMP |
31052 | OPCODE(0xB01F) |
31053 | { |
31054 | u32 adr, res; |
31055 | u32 src, dst; |
31056 | |
31057 | adr = AREG(7); |
31058 | AREG(7) += 2; |
31059 | PRE_IO |
31060 | READ_BYTE_F(adr, src) |
31061 | dst = DREGu8((Opcode >> 9) & 7); |
31062 | res = dst - src; |
31063 | flag_N = flag_C = res; |
31064 | flag_V = (src ^ dst) & (res ^ dst); |
31065 | flag_NotZ = res & 0xFF; |
31066 | POST_IO |
31067 | RET(8) |
31068 | } |
31069 | |
31070 | // CMP |
31071 | OPCODE(0xB027) |
31072 | { |
31073 | u32 adr, res; |
31074 | u32 src, dst; |
31075 | |
31076 | adr = AREG(7) - 2; |
31077 | AREG(7) = adr; |
31078 | PRE_IO |
31079 | READ_BYTE_F(adr, src) |
31080 | dst = DREGu8((Opcode >> 9) & 7); |
31081 | res = dst - src; |
31082 | flag_N = flag_C = res; |
31083 | flag_V = (src ^ dst) & (res ^ dst); |
31084 | flag_NotZ = res & 0xFF; |
31085 | POST_IO |
31086 | RET(10) |
31087 | } |
31088 | |
31089 | // CMP |
31090 | OPCODE(0xB040) |
31091 | { |
31092 | u32 adr, res; |
31093 | u32 src, dst; |
31094 | |
31095 | src = DREGu16((Opcode >> 0) & 7); |
31096 | dst = DREGu16((Opcode >> 9) & 7); |
31097 | res = dst - src; |
31098 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31099 | flag_N = flag_C = res >> 8; |
31100 | flag_NotZ = res & 0xFFFF; |
31101 | RET(4) |
31102 | } |
31103 | |
31104 | // CMP |
31105 | OPCODE(0xB048) |
31106 | { |
31107 | u32 adr, res; |
31108 | u32 src, dst; |
31109 | |
31110 | src = AREGu16((Opcode >> 0) & 7); |
31111 | dst = DREGu16((Opcode >> 9) & 7); |
31112 | res = dst - src; |
31113 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31114 | flag_N = flag_C = res >> 8; |
31115 | flag_NotZ = res & 0xFFFF; |
31116 | RET(4) |
31117 | } |
31118 | |
31119 | // CMP |
31120 | OPCODE(0xB050) |
31121 | { |
31122 | u32 adr, res; |
31123 | u32 src, dst; |
31124 | |
31125 | adr = AREG((Opcode >> 0) & 7); |
31126 | PRE_IO |
31127 | READ_WORD_F(adr, src) |
31128 | dst = DREGu16((Opcode >> 9) & 7); |
31129 | res = dst - src; |
31130 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31131 | flag_N = flag_C = res >> 8; |
31132 | flag_NotZ = res & 0xFFFF; |
31133 | POST_IO |
31134 | RET(8) |
31135 | } |
31136 | |
31137 | // CMP |
31138 | OPCODE(0xB058) |
31139 | { |
31140 | u32 adr, res; |
31141 | u32 src, dst; |
31142 | |
31143 | adr = AREG((Opcode >> 0) & 7); |
31144 | AREG((Opcode >> 0) & 7) += 2; |
31145 | PRE_IO |
31146 | READ_WORD_F(adr, src) |
31147 | dst = DREGu16((Opcode >> 9) & 7); |
31148 | res = dst - src; |
31149 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31150 | flag_N = flag_C = res >> 8; |
31151 | flag_NotZ = res & 0xFFFF; |
31152 | POST_IO |
31153 | RET(8) |
31154 | } |
31155 | |
31156 | // CMP |
31157 | OPCODE(0xB060) |
31158 | { |
31159 | u32 adr, res; |
31160 | u32 src, dst; |
31161 | |
31162 | adr = AREG((Opcode >> 0) & 7) - 2; |
31163 | AREG((Opcode >> 0) & 7) = adr; |
31164 | PRE_IO |
31165 | READ_WORD_F(adr, src) |
31166 | dst = DREGu16((Opcode >> 9) & 7); |
31167 | res = dst - src; |
31168 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31169 | flag_N = flag_C = res >> 8; |
31170 | flag_NotZ = res & 0xFFFF; |
31171 | POST_IO |
31172 | RET(10) |
31173 | } |
31174 | |
31175 | // CMP |
31176 | OPCODE(0xB068) |
31177 | { |
31178 | u32 adr, res; |
31179 | u32 src, dst; |
31180 | |
31181 | FETCH_SWORD(adr); |
31182 | adr += AREG((Opcode >> 0) & 7); |
31183 | PRE_IO |
31184 | READ_WORD_F(adr, src) |
31185 | dst = DREGu16((Opcode >> 9) & 7); |
31186 | res = dst - src; |
31187 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31188 | flag_N = flag_C = res >> 8; |
31189 | flag_NotZ = res & 0xFFFF; |
31190 | POST_IO |
31191 | RET(12) |
31192 | } |
31193 | |
31194 | // CMP |
31195 | OPCODE(0xB070) |
31196 | { |
31197 | u32 adr, res; |
31198 | u32 src, dst; |
31199 | |
31200 | adr = AREG((Opcode >> 0) & 7); |
31201 | DECODE_EXT_WORD |
31202 | PRE_IO |
31203 | READ_WORD_F(adr, src) |
31204 | dst = DREGu16((Opcode >> 9) & 7); |
31205 | res = dst - src; |
31206 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31207 | flag_N = flag_C = res >> 8; |
31208 | flag_NotZ = res & 0xFFFF; |
31209 | POST_IO |
31210 | RET(14) |
31211 | } |
31212 | |
31213 | // CMP |
31214 | OPCODE(0xB078) |
31215 | { |
31216 | u32 adr, res; |
31217 | u32 src, dst; |
31218 | |
31219 | FETCH_SWORD(adr); |
31220 | PRE_IO |
31221 | READ_WORD_F(adr, src) |
31222 | dst = DREGu16((Opcode >> 9) & 7); |
31223 | res = dst - src; |
31224 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31225 | flag_N = flag_C = res >> 8; |
31226 | flag_NotZ = res & 0xFFFF; |
31227 | POST_IO |
31228 | RET(12) |
31229 | } |
31230 | |
31231 | // CMP |
31232 | OPCODE(0xB079) |
31233 | { |
31234 | u32 adr, res; |
31235 | u32 src, dst; |
31236 | |
31237 | FETCH_LONG(adr); |
31238 | PRE_IO |
31239 | READ_WORD_F(adr, src) |
31240 | dst = DREGu16((Opcode >> 9) & 7); |
31241 | res = dst - src; |
31242 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31243 | flag_N = flag_C = res >> 8; |
31244 | flag_NotZ = res & 0xFFFF; |
31245 | POST_IO |
31246 | RET(16) |
31247 | } |
31248 | |
31249 | // CMP |
31250 | OPCODE(0xB07A) |
31251 | { |
31252 | u32 adr, res; |
31253 | u32 src, dst; |
31254 | |
be26eb23 |
31255 | adr = GET_SWORD + GET_PC; |
70357ce5 |
31256 | PC++; |
31257 | PRE_IO |
31258 | READ_WORD_F(adr, src) |
31259 | dst = DREGu16((Opcode >> 9) & 7); |
31260 | res = dst - src; |
31261 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31262 | flag_N = flag_C = res >> 8; |
31263 | flag_NotZ = res & 0xFFFF; |
31264 | POST_IO |
31265 | RET(12) |
31266 | } |
31267 | |
31268 | // CMP |
31269 | OPCODE(0xB07B) |
31270 | { |
31271 | u32 adr, res; |
31272 | u32 src, dst; |
31273 | |
be26eb23 |
31274 | adr = GET_PC; |
70357ce5 |
31275 | DECODE_EXT_WORD |
31276 | PRE_IO |
31277 | READ_WORD_F(adr, src) |
31278 | dst = DREGu16((Opcode >> 9) & 7); |
31279 | res = dst - src; |
31280 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31281 | flag_N = flag_C = res >> 8; |
31282 | flag_NotZ = res & 0xFFFF; |
31283 | POST_IO |
31284 | RET(14) |
31285 | } |
31286 | |
31287 | // CMP |
31288 | OPCODE(0xB07C) |
31289 | { |
31290 | u32 adr, res; |
31291 | u32 src, dst; |
31292 | |
31293 | FETCH_WORD(src); |
31294 | dst = DREGu16((Opcode >> 9) & 7); |
31295 | res = dst - src; |
31296 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31297 | flag_N = flag_C = res >> 8; |
31298 | flag_NotZ = res & 0xFFFF; |
31299 | RET(8) |
31300 | } |
31301 | |
31302 | // CMP |
31303 | OPCODE(0xB05F) |
31304 | { |
31305 | u32 adr, res; |
31306 | u32 src, dst; |
31307 | |
31308 | adr = AREG(7); |
31309 | AREG(7) += 2; |
31310 | PRE_IO |
31311 | READ_WORD_F(adr, src) |
31312 | dst = DREGu16((Opcode >> 9) & 7); |
31313 | res = dst - src; |
31314 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31315 | flag_N = flag_C = res >> 8; |
31316 | flag_NotZ = res & 0xFFFF; |
31317 | POST_IO |
31318 | RET(8) |
31319 | } |
31320 | |
31321 | // CMP |
31322 | OPCODE(0xB067) |
31323 | { |
31324 | u32 adr, res; |
31325 | u32 src, dst; |
31326 | |
31327 | adr = AREG(7) - 2; |
31328 | AREG(7) = adr; |
31329 | PRE_IO |
31330 | READ_WORD_F(adr, src) |
31331 | dst = DREGu16((Opcode >> 9) & 7); |
31332 | res = dst - src; |
31333 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31334 | flag_N = flag_C = res >> 8; |
31335 | flag_NotZ = res & 0xFFFF; |
31336 | POST_IO |
31337 | RET(10) |
31338 | } |
31339 | |
31340 | // CMP |
31341 | OPCODE(0xB080) |
31342 | { |
31343 | u32 adr, res; |
31344 | u32 src, dst; |
31345 | |
31346 | src = DREGu32((Opcode >> 0) & 7); |
31347 | dst = DREGu32((Opcode >> 9) & 7); |
31348 | res = dst - src; |
31349 | flag_NotZ = res; |
31350 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31351 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31352 | flag_N = res >> 24; |
31353 | RET(6) |
31354 | } |
31355 | |
31356 | // CMP |
31357 | OPCODE(0xB088) |
31358 | { |
31359 | u32 adr, res; |
31360 | u32 src, dst; |
31361 | |
31362 | src = AREGu32((Opcode >> 0) & 7); |
31363 | dst = DREGu32((Opcode >> 9) & 7); |
31364 | res = dst - src; |
31365 | flag_NotZ = res; |
31366 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31367 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31368 | flag_N = res >> 24; |
31369 | RET(6) |
31370 | } |
31371 | |
31372 | // CMP |
31373 | OPCODE(0xB090) |
31374 | { |
31375 | u32 adr, res; |
31376 | u32 src, dst; |
31377 | |
31378 | adr = AREG((Opcode >> 0) & 7); |
31379 | PRE_IO |
31380 | READ_LONG_F(adr, src) |
31381 | dst = DREGu32((Opcode >> 9) & 7); |
31382 | res = dst - src; |
31383 | flag_NotZ = res; |
31384 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31385 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31386 | flag_N = res >> 24; |
31387 | POST_IO |
31388 | RET(14) |
31389 | } |
31390 | |
31391 | // CMP |
31392 | OPCODE(0xB098) |
31393 | { |
31394 | u32 adr, res; |
31395 | u32 src, dst; |
31396 | |
31397 | adr = AREG((Opcode >> 0) & 7); |
31398 | AREG((Opcode >> 0) & 7) += 4; |
31399 | PRE_IO |
31400 | READ_LONG_F(adr, src) |
31401 | dst = DREGu32((Opcode >> 9) & 7); |
31402 | res = dst - src; |
31403 | flag_NotZ = res; |
31404 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31405 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31406 | flag_N = res >> 24; |
31407 | POST_IO |
31408 | RET(14) |
31409 | } |
31410 | |
31411 | // CMP |
31412 | OPCODE(0xB0A0) |
31413 | { |
31414 | u32 adr, res; |
31415 | u32 src, dst; |
31416 | |
31417 | adr = AREG((Opcode >> 0) & 7) - 4; |
31418 | AREG((Opcode >> 0) & 7) = adr; |
31419 | PRE_IO |
31420 | READ_LONG_F(adr, src) |
31421 | dst = DREGu32((Opcode >> 9) & 7); |
31422 | res = dst - src; |
31423 | flag_NotZ = res; |
31424 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31425 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31426 | flag_N = res >> 24; |
31427 | POST_IO |
31428 | RET(16) |
31429 | } |
31430 | |
31431 | // CMP |
31432 | OPCODE(0xB0A8) |
31433 | { |
31434 | u32 adr, res; |
31435 | u32 src, dst; |
31436 | |
31437 | FETCH_SWORD(adr); |
31438 | adr += AREG((Opcode >> 0) & 7); |
31439 | PRE_IO |
31440 | READ_LONG_F(adr, src) |
31441 | dst = DREGu32((Opcode >> 9) & 7); |
31442 | res = dst - src; |
31443 | flag_NotZ = res; |
31444 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31445 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31446 | flag_N = res >> 24; |
31447 | POST_IO |
31448 | RET(18) |
31449 | } |
31450 | |
31451 | // CMP |
31452 | OPCODE(0xB0B0) |
31453 | { |
31454 | u32 adr, res; |
31455 | u32 src, dst; |
31456 | |
31457 | adr = AREG((Opcode >> 0) & 7); |
31458 | DECODE_EXT_WORD |
31459 | PRE_IO |
31460 | READ_LONG_F(adr, src) |
31461 | dst = DREGu32((Opcode >> 9) & 7); |
31462 | res = dst - src; |
31463 | flag_NotZ = res; |
31464 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31465 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31466 | flag_N = res >> 24; |
31467 | POST_IO |
31468 | RET(20) |
31469 | } |
31470 | |
31471 | // CMP |
31472 | OPCODE(0xB0B8) |
31473 | { |
31474 | u32 adr, res; |
31475 | u32 src, dst; |
31476 | |
31477 | FETCH_SWORD(adr); |
31478 | PRE_IO |
31479 | READ_LONG_F(adr, src) |
31480 | dst = DREGu32((Opcode >> 9) & 7); |
31481 | res = dst - src; |
31482 | flag_NotZ = res; |
31483 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31484 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31485 | flag_N = res >> 24; |
31486 | POST_IO |
31487 | RET(18) |
31488 | } |
31489 | |
31490 | // CMP |
31491 | OPCODE(0xB0B9) |
31492 | { |
31493 | u32 adr, res; |
31494 | u32 src, dst; |
31495 | |
31496 | FETCH_LONG(adr); |
31497 | PRE_IO |
31498 | READ_LONG_F(adr, src) |
31499 | dst = DREGu32((Opcode >> 9) & 7); |
31500 | res = dst - src; |
31501 | flag_NotZ = res; |
31502 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31503 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31504 | flag_N = res >> 24; |
31505 | POST_IO |
31506 | RET(22) |
31507 | } |
31508 | |
31509 | // CMP |
31510 | OPCODE(0xB0BA) |
31511 | { |
31512 | u32 adr, res; |
31513 | u32 src, dst; |
31514 | |
be26eb23 |
31515 | adr = GET_SWORD + GET_PC; |
70357ce5 |
31516 | PC++; |
31517 | PRE_IO |
31518 | READ_LONG_F(adr, src) |
31519 | dst = DREGu32((Opcode >> 9) & 7); |
31520 | res = dst - src; |
31521 | flag_NotZ = res; |
31522 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31523 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31524 | flag_N = res >> 24; |
31525 | POST_IO |
31526 | RET(18) |
31527 | } |
31528 | |
31529 | // CMP |
31530 | OPCODE(0xB0BB) |
31531 | { |
31532 | u32 adr, res; |
31533 | u32 src, dst; |
31534 | |
be26eb23 |
31535 | adr = GET_PC; |
70357ce5 |
31536 | DECODE_EXT_WORD |
31537 | PRE_IO |
31538 | READ_LONG_F(adr, src) |
31539 | dst = DREGu32((Opcode >> 9) & 7); |
31540 | res = dst - src; |
31541 | flag_NotZ = res; |
31542 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31543 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31544 | flag_N = res >> 24; |
31545 | POST_IO |
31546 | RET(20) |
31547 | } |
31548 | |
31549 | // CMP |
31550 | OPCODE(0xB0BC) |
31551 | { |
31552 | u32 adr, res; |
31553 | u32 src, dst; |
31554 | |
31555 | FETCH_LONG(src); |
31556 | dst = DREGu32((Opcode >> 9) & 7); |
31557 | res = dst - src; |
31558 | flag_NotZ = res; |
31559 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31560 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31561 | flag_N = res >> 24; |
31562 | RET(14) |
31563 | } |
31564 | |
31565 | // CMP |
31566 | OPCODE(0xB09F) |
31567 | { |
31568 | u32 adr, res; |
31569 | u32 src, dst; |
31570 | |
31571 | adr = AREG(7); |
31572 | AREG(7) += 4; |
31573 | PRE_IO |
31574 | READ_LONG_F(adr, src) |
31575 | dst = DREGu32((Opcode >> 9) & 7); |
31576 | res = dst - src; |
31577 | flag_NotZ = res; |
31578 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31579 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31580 | flag_N = res >> 24; |
31581 | POST_IO |
31582 | RET(14) |
31583 | } |
31584 | |
31585 | // CMP |
31586 | OPCODE(0xB0A7) |
31587 | { |
31588 | u32 adr, res; |
31589 | u32 src, dst; |
31590 | |
31591 | adr = AREG(7) - 4; |
31592 | AREG(7) = adr; |
31593 | PRE_IO |
31594 | READ_LONG_F(adr, src) |
31595 | dst = DREGu32((Opcode >> 9) & 7); |
31596 | res = dst - src; |
31597 | flag_NotZ = res; |
31598 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31599 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31600 | flag_N = res >> 24; |
31601 | POST_IO |
31602 | RET(16) |
31603 | } |
31604 | |
31605 | // CMPM |
31606 | OPCODE(0xB108) |
31607 | { |
31608 | u32 adr, res; |
31609 | u32 src, dst; |
31610 | |
31611 | adr = AREG((Opcode >> 0) & 7); |
31612 | AREG((Opcode >> 0) & 7) += 1; |
31613 | PRE_IO |
31614 | READ_BYTE_F(adr, src) |
31615 | adr = AREG((Opcode >> 9) & 7); |
31616 | AREG((Opcode >> 9) & 7) += 1; |
31617 | READ_BYTE_F(adr, dst) |
31618 | res = dst - src; |
31619 | flag_N = flag_C = res; |
31620 | flag_V = (src ^ dst) & (res ^ dst); |
31621 | flag_NotZ = res & 0xFF; |
31622 | POST_IO |
31623 | RET(12) |
31624 | } |
31625 | |
31626 | // CMPM |
31627 | OPCODE(0xB148) |
31628 | { |
31629 | u32 adr, res; |
31630 | u32 src, dst; |
31631 | |
31632 | adr = AREG((Opcode >> 0) & 7); |
31633 | AREG((Opcode >> 0) & 7) += 2; |
31634 | PRE_IO |
31635 | READ_WORD_F(adr, src) |
31636 | adr = AREG((Opcode >> 9) & 7); |
31637 | AREG((Opcode >> 9) & 7) += 2; |
31638 | READ_WORD_F(adr, dst) |
31639 | res = dst - src; |
31640 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31641 | flag_N = flag_C = res >> 8; |
31642 | flag_NotZ = res & 0xFFFF; |
31643 | POST_IO |
31644 | RET(12) |
31645 | } |
31646 | |
31647 | // CMPM |
31648 | OPCODE(0xB188) |
31649 | { |
31650 | u32 adr, res; |
31651 | u32 src, dst; |
31652 | |
31653 | adr = AREG((Opcode >> 0) & 7); |
31654 | AREG((Opcode >> 0) & 7) += 4; |
31655 | PRE_IO |
31656 | READ_LONG_F(adr, src) |
31657 | adr = AREG((Opcode >> 9) & 7); |
31658 | AREG((Opcode >> 9) & 7) += 4; |
31659 | READ_LONG_F(adr, dst) |
31660 | res = dst - src; |
31661 | flag_NotZ = res; |
31662 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31663 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31664 | flag_N = res >> 24; |
31665 | POST_IO |
31666 | RET(20) |
31667 | } |
31668 | |
31669 | // CMP7M |
31670 | OPCODE(0xB10F) |
31671 | { |
31672 | u32 adr, res; |
31673 | u32 src, dst; |
31674 | |
31675 | adr = AREG(7); |
31676 | AREG(7) += 2; |
31677 | PRE_IO |
31678 | READ_BYTE_F(adr, src) |
31679 | adr = AREG((Opcode >> 9) & 7); |
31680 | AREG((Opcode >> 9) & 7) += 1; |
31681 | READ_BYTE_F(adr, dst) |
31682 | res = dst - src; |
31683 | flag_N = flag_C = res; |
31684 | flag_V = (src ^ dst) & (res ^ dst); |
31685 | flag_NotZ = res & 0xFF; |
31686 | POST_IO |
31687 | RET(12) |
31688 | } |
31689 | |
31690 | // CMP7M |
31691 | OPCODE(0xB14F) |
31692 | { |
31693 | u32 adr, res; |
31694 | u32 src, dst; |
31695 | |
31696 | adr = AREG(7); |
31697 | AREG(7) += 2; |
31698 | PRE_IO |
31699 | READ_WORD_F(adr, src) |
31700 | adr = AREG((Opcode >> 9) & 7); |
31701 | AREG((Opcode >> 9) & 7) += 2; |
31702 | READ_WORD_F(adr, dst) |
31703 | res = dst - src; |
31704 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31705 | flag_N = flag_C = res >> 8; |
31706 | flag_NotZ = res & 0xFFFF; |
31707 | POST_IO |
31708 | RET(12) |
31709 | } |
31710 | |
31711 | // CMP7M |
31712 | OPCODE(0xB18F) |
31713 | { |
31714 | u32 adr, res; |
31715 | u32 src, dst; |
31716 | |
31717 | adr = AREG(7); |
31718 | AREG(7) += 4; |
31719 | PRE_IO |
31720 | READ_LONG_F(adr, src) |
31721 | adr = AREG((Opcode >> 9) & 7); |
31722 | AREG((Opcode >> 9) & 7) += 4; |
31723 | READ_LONG_F(adr, dst) |
31724 | res = dst - src; |
31725 | flag_NotZ = res; |
31726 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31727 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31728 | flag_N = res >> 24; |
31729 | POST_IO |
31730 | RET(20) |
31731 | } |
31732 | |
31733 | // CMPM7 |
31734 | OPCODE(0xBF08) |
31735 | { |
31736 | u32 adr, res; |
31737 | u32 src, dst; |
31738 | |
31739 | adr = AREG((Opcode >> 0) & 7); |
31740 | AREG((Opcode >> 0) & 7) += 1; |
31741 | PRE_IO |
31742 | READ_BYTE_F(adr, src) |
31743 | adr = AREG(7); |
31744 | AREG(7) += 2; |
31745 | READ_BYTE_F(adr, dst) |
31746 | res = dst - src; |
31747 | flag_N = flag_C = res; |
31748 | flag_V = (src ^ dst) & (res ^ dst); |
31749 | flag_NotZ = res & 0xFF; |
31750 | POST_IO |
31751 | RET(12) |
31752 | } |
31753 | |
31754 | // CMPM7 |
31755 | OPCODE(0xBF48) |
31756 | { |
31757 | u32 adr, res; |
31758 | u32 src, dst; |
31759 | |
31760 | adr = AREG((Opcode >> 0) & 7); |
31761 | AREG((Opcode >> 0) & 7) += 2; |
31762 | PRE_IO |
31763 | READ_WORD_F(adr, src) |
31764 | adr = AREG(7); |
31765 | AREG(7) += 2; |
31766 | READ_WORD_F(adr, dst) |
31767 | res = dst - src; |
31768 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31769 | flag_N = flag_C = res >> 8; |
31770 | flag_NotZ = res & 0xFFFF; |
31771 | POST_IO |
31772 | RET(12) |
31773 | } |
31774 | |
31775 | // CMPM7 |
31776 | OPCODE(0xBF88) |
31777 | { |
31778 | u32 adr, res; |
31779 | u32 src, dst; |
31780 | |
31781 | adr = AREG((Opcode >> 0) & 7); |
31782 | AREG((Opcode >> 0) & 7) += 4; |
31783 | PRE_IO |
31784 | READ_LONG_F(adr, src) |
31785 | adr = AREG(7); |
31786 | AREG(7) += 4; |
31787 | READ_LONG_F(adr, dst) |
31788 | res = dst - src; |
31789 | flag_NotZ = res; |
31790 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31791 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31792 | flag_N = res >> 24; |
31793 | POST_IO |
31794 | RET(20) |
31795 | } |
31796 | |
31797 | // CMP7M7 |
31798 | OPCODE(0xBF0F) |
31799 | { |
31800 | u32 adr, res; |
31801 | u32 src, dst; |
31802 | |
31803 | adr = AREG(7); |
31804 | AREG(7) += 2; |
31805 | PRE_IO |
31806 | READ_BYTE_F(adr, src) |
31807 | adr = AREG(7); |
31808 | AREG(7) += 2; |
31809 | READ_BYTE_F(adr, dst) |
31810 | res = dst - src; |
31811 | flag_N = flag_C = res; |
31812 | flag_V = (src ^ dst) & (res ^ dst); |
31813 | flag_NotZ = res & 0xFF; |
31814 | POST_IO |
31815 | RET(12) |
31816 | } |
31817 | |
31818 | // CMP7M7 |
31819 | OPCODE(0xBF4F) |
31820 | { |
31821 | u32 adr, res; |
31822 | u32 src, dst; |
31823 | |
31824 | adr = AREG(7); |
31825 | AREG(7) += 2; |
31826 | PRE_IO |
31827 | READ_WORD_F(adr, src) |
31828 | adr = AREG(7); |
31829 | AREG(7) += 2; |
31830 | READ_WORD_F(adr, dst) |
31831 | res = dst - src; |
31832 | flag_V = ((src ^ dst) & (res ^ dst)) >> 8; |
31833 | flag_N = flag_C = res >> 8; |
31834 | flag_NotZ = res & 0xFFFF; |
31835 | POST_IO |
31836 | RET(12) |
31837 | } |
31838 | |
31839 | // CMP7M7 |
31840 | OPCODE(0xBF8F) |
31841 | { |
31842 | u32 adr, res; |
31843 | u32 src, dst; |
31844 | |
31845 | adr = AREG(7); |
31846 | AREG(7) += 4; |
31847 | PRE_IO |
31848 | READ_LONG_F(adr, src) |
31849 | adr = AREG(7); |
31850 | AREG(7) += 4; |
31851 | READ_LONG_F(adr, dst) |
31852 | res = dst - src; |
31853 | flag_NotZ = res; |
31854 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
31855 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
31856 | flag_N = res >> 24; |
31857 | POST_IO |
31858 | RET(20) |
31859 | } |
31860 | |
31861 | // EORDa |
31862 | OPCODE(0xB100) |
31863 | { |
31864 | u32 adr, res; |
31865 | u32 src, dst; |
31866 | |
31867 | src = DREGu8((Opcode >> 9) & 7); |
31868 | res = DREGu8((Opcode >> 0) & 7); |
31869 | res ^= src; |
31870 | flag_C = 0; |
31871 | flag_V = 0; |
31872 | flag_NotZ = res; |
31873 | flag_N = res; |
31874 | DREGu8((Opcode >> 0) & 7) = res; |
31875 | RET(4) |
31876 | } |
31877 | |
31878 | // EORDa |
31879 | OPCODE(0xB110) |
31880 | { |
31881 | u32 adr, res; |
31882 | u32 src, dst; |
31883 | |
31884 | src = DREGu8((Opcode >> 9) & 7); |
31885 | adr = AREG((Opcode >> 0) & 7); |
31886 | PRE_IO |
31887 | READ_BYTE_F(adr, res) |
31888 | res ^= src; |
31889 | flag_C = 0; |
31890 | flag_V = 0; |
31891 | flag_NotZ = res; |
31892 | flag_N = res; |
31893 | WRITE_BYTE_F(adr, res) |
31894 | POST_IO |
31895 | RET(12) |
31896 | } |
31897 | |
31898 | // EORDa |
31899 | OPCODE(0xB118) |
31900 | { |
31901 | u32 adr, res; |
31902 | u32 src, dst; |
31903 | |
31904 | src = DREGu8((Opcode >> 9) & 7); |
31905 | adr = AREG((Opcode >> 0) & 7); |
31906 | AREG((Opcode >> 0) & 7) += 1; |
31907 | PRE_IO |
31908 | READ_BYTE_F(adr, res) |
31909 | res ^= src; |
31910 | flag_C = 0; |
31911 | flag_V = 0; |
31912 | flag_NotZ = res; |
31913 | flag_N = res; |
31914 | WRITE_BYTE_F(adr, res) |
31915 | POST_IO |
31916 | RET(12) |
31917 | } |
31918 | |
31919 | // EORDa |
31920 | OPCODE(0xB120) |
31921 | { |
31922 | u32 adr, res; |
31923 | u32 src, dst; |
31924 | |
31925 | src = DREGu8((Opcode >> 9) & 7); |
31926 | adr = AREG((Opcode >> 0) & 7) - 1; |
31927 | AREG((Opcode >> 0) & 7) = adr; |
31928 | PRE_IO |
31929 | READ_BYTE_F(adr, res) |
31930 | res ^= src; |
31931 | flag_C = 0; |
31932 | flag_V = 0; |
31933 | flag_NotZ = res; |
31934 | flag_N = res; |
31935 | WRITE_BYTE_F(adr, res) |
31936 | POST_IO |
31937 | RET(14) |
31938 | } |
31939 | |
31940 | // EORDa |
31941 | OPCODE(0xB128) |
31942 | { |
31943 | u32 adr, res; |
31944 | u32 src, dst; |
31945 | |
31946 | src = DREGu8((Opcode >> 9) & 7); |
31947 | FETCH_SWORD(adr); |
31948 | adr += AREG((Opcode >> 0) & 7); |
31949 | PRE_IO |
31950 | READ_BYTE_F(adr, res) |
31951 | res ^= src; |
31952 | flag_C = 0; |
31953 | flag_V = 0; |
31954 | flag_NotZ = res; |
31955 | flag_N = res; |
31956 | WRITE_BYTE_F(adr, res) |
31957 | POST_IO |
31958 | RET(16) |
31959 | } |
31960 | |
31961 | // EORDa |
31962 | OPCODE(0xB130) |
31963 | { |
31964 | u32 adr, res; |
31965 | u32 src, dst; |
31966 | |
31967 | src = DREGu8((Opcode >> 9) & 7); |
31968 | adr = AREG((Opcode >> 0) & 7); |
31969 | DECODE_EXT_WORD |
31970 | PRE_IO |
31971 | READ_BYTE_F(adr, res) |
31972 | res ^= src; |
31973 | flag_C = 0; |
31974 | flag_V = 0; |
31975 | flag_NotZ = res; |
31976 | flag_N = res; |
31977 | WRITE_BYTE_F(adr, res) |
31978 | POST_IO |
31979 | RET(18) |
31980 | } |
31981 | |
31982 | // EORDa |
31983 | OPCODE(0xB138) |
31984 | { |
31985 | u32 adr, res; |
31986 | u32 src, dst; |
31987 | |
31988 | src = DREGu8((Opcode >> 9) & 7); |
31989 | FETCH_SWORD(adr); |
31990 | PRE_IO |
31991 | READ_BYTE_F(adr, res) |
31992 | res ^= src; |
31993 | flag_C = 0; |
31994 | flag_V = 0; |
31995 | flag_NotZ = res; |
31996 | flag_N = res; |
31997 | WRITE_BYTE_F(adr, res) |
31998 | POST_IO |
31999 | RET(16) |
32000 | } |
32001 | |
32002 | // EORDa |
32003 | OPCODE(0xB139) |
32004 | { |
32005 | u32 adr, res; |
32006 | u32 src, dst; |
32007 | |
32008 | src = DREGu8((Opcode >> 9) & 7); |
32009 | FETCH_LONG(adr); |
32010 | PRE_IO |
32011 | READ_BYTE_F(adr, res) |
32012 | res ^= src; |
32013 | flag_C = 0; |
32014 | flag_V = 0; |
32015 | flag_NotZ = res; |
32016 | flag_N = res; |
32017 | WRITE_BYTE_F(adr, res) |
32018 | POST_IO |
32019 | RET(20) |
32020 | } |
32021 | |
32022 | // EORDa |
32023 | OPCODE(0xB11F) |
32024 | { |
32025 | u32 adr, res; |
32026 | u32 src, dst; |
32027 | |
32028 | src = DREGu8((Opcode >> 9) & 7); |
32029 | adr = AREG(7); |
32030 | AREG(7) += 2; |
32031 | PRE_IO |
32032 | READ_BYTE_F(adr, res) |
32033 | res ^= src; |
32034 | flag_C = 0; |
32035 | flag_V = 0; |
32036 | flag_NotZ = res; |
32037 | flag_N = res; |
32038 | WRITE_BYTE_F(adr, res) |
32039 | POST_IO |
32040 | RET(12) |
32041 | } |
32042 | |
32043 | // EORDa |
32044 | OPCODE(0xB127) |
32045 | { |
32046 | u32 adr, res; |
32047 | u32 src, dst; |
32048 | |
32049 | src = DREGu8((Opcode >> 9) & 7); |
32050 | adr = AREG(7) - 2; |
32051 | AREG(7) = adr; |
32052 | PRE_IO |
32053 | READ_BYTE_F(adr, res) |
32054 | res ^= src; |
32055 | flag_C = 0; |
32056 | flag_V = 0; |
32057 | flag_NotZ = res; |
32058 | flag_N = res; |
32059 | WRITE_BYTE_F(adr, res) |
32060 | POST_IO |
32061 | RET(14) |
32062 | } |
32063 | |
32064 | // EORDa |
32065 | OPCODE(0xB140) |
32066 | { |
32067 | u32 adr, res; |
32068 | u32 src, dst; |
32069 | |
32070 | src = DREGu16((Opcode >> 9) & 7); |
32071 | res = DREGu16((Opcode >> 0) & 7); |
32072 | res ^= src; |
32073 | flag_C = 0; |
32074 | flag_V = 0; |
32075 | flag_NotZ = res; |
32076 | flag_N = res >> 8; |
32077 | DREGu16((Opcode >> 0) & 7) = res; |
32078 | RET(4) |
32079 | } |
32080 | |
32081 | // EORDa |
32082 | OPCODE(0xB150) |
32083 | { |
32084 | u32 adr, res; |
32085 | u32 src, dst; |
32086 | |
32087 | src = DREGu16((Opcode >> 9) & 7); |
32088 | adr = AREG((Opcode >> 0) & 7); |
32089 | PRE_IO |
32090 | READ_WORD_F(adr, res) |
32091 | res ^= src; |
32092 | flag_C = 0; |
32093 | flag_V = 0; |
32094 | flag_NotZ = res; |
32095 | flag_N = res >> 8; |
32096 | WRITE_WORD_F(adr, res) |
32097 | POST_IO |
32098 | RET(12) |
32099 | } |
32100 | |
32101 | // EORDa |
32102 | OPCODE(0xB158) |
32103 | { |
32104 | u32 adr, res; |
32105 | u32 src, dst; |
32106 | |
32107 | src = DREGu16((Opcode >> 9) & 7); |
32108 | adr = AREG((Opcode >> 0) & 7); |
32109 | AREG((Opcode >> 0) & 7) += 2; |
32110 | PRE_IO |
32111 | READ_WORD_F(adr, res) |
32112 | res ^= src; |
32113 | flag_C = 0; |
32114 | flag_V = 0; |
32115 | flag_NotZ = res; |
32116 | flag_N = res >> 8; |
32117 | WRITE_WORD_F(adr, res) |
32118 | POST_IO |
32119 | RET(12) |
32120 | } |
32121 | |
32122 | // EORDa |
32123 | OPCODE(0xB160) |
32124 | { |
32125 | u32 adr, res; |
32126 | u32 src, dst; |
32127 | |
32128 | src = DREGu16((Opcode >> 9) & 7); |
32129 | adr = AREG((Opcode >> 0) & 7) - 2; |
32130 | AREG((Opcode >> 0) & 7) = adr; |
32131 | PRE_IO |
32132 | READ_WORD_F(adr, res) |
32133 | res ^= src; |
32134 | flag_C = 0; |
32135 | flag_V = 0; |
32136 | flag_NotZ = res; |
32137 | flag_N = res >> 8; |
32138 | WRITE_WORD_F(adr, res) |
32139 | POST_IO |
32140 | RET(14) |
32141 | } |
32142 | |
32143 | // EORDa |
32144 | OPCODE(0xB168) |
32145 | { |
32146 | u32 adr, res; |
32147 | u32 src, dst; |
32148 | |
32149 | src = DREGu16((Opcode >> 9) & 7); |
32150 | FETCH_SWORD(adr); |
32151 | adr += AREG((Opcode >> 0) & 7); |
32152 | PRE_IO |
32153 | READ_WORD_F(adr, res) |
32154 | res ^= src; |
32155 | flag_C = 0; |
32156 | flag_V = 0; |
32157 | flag_NotZ = res; |
32158 | flag_N = res >> 8; |
32159 | WRITE_WORD_F(adr, res) |
32160 | POST_IO |
32161 | RET(16) |
32162 | } |
32163 | |
32164 | // EORDa |
32165 | OPCODE(0xB170) |
32166 | { |
32167 | u32 adr, res; |
32168 | u32 src, dst; |
32169 | |
32170 | src = DREGu16((Opcode >> 9) & 7); |
32171 | adr = AREG((Opcode >> 0) & 7); |
32172 | DECODE_EXT_WORD |
32173 | PRE_IO |
32174 | READ_WORD_F(adr, res) |
32175 | res ^= src; |
32176 | flag_C = 0; |
32177 | flag_V = 0; |
32178 | flag_NotZ = res; |
32179 | flag_N = res >> 8; |
32180 | WRITE_WORD_F(adr, res) |
32181 | POST_IO |
32182 | RET(18) |
32183 | } |
32184 | |
32185 | // EORDa |
32186 | OPCODE(0xB178) |
32187 | { |
32188 | u32 adr, res; |
32189 | u32 src, dst; |
32190 | |
32191 | src = DREGu16((Opcode >> 9) & 7); |
32192 | FETCH_SWORD(adr); |
32193 | PRE_IO |
32194 | READ_WORD_F(adr, res) |
32195 | res ^= src; |
32196 | flag_C = 0; |
32197 | flag_V = 0; |
32198 | flag_NotZ = res; |
32199 | flag_N = res >> 8; |
32200 | WRITE_WORD_F(adr, res) |
32201 | POST_IO |
32202 | RET(16) |
32203 | } |
32204 | |
32205 | // EORDa |
32206 | OPCODE(0xB179) |
32207 | { |
32208 | u32 adr, res; |
32209 | u32 src, dst; |
32210 | |
32211 | src = DREGu16((Opcode >> 9) & 7); |
32212 | FETCH_LONG(adr); |
32213 | PRE_IO |
32214 | READ_WORD_F(adr, res) |
32215 | res ^= src; |
32216 | flag_C = 0; |
32217 | flag_V = 0; |
32218 | flag_NotZ = res; |
32219 | flag_N = res >> 8; |
32220 | WRITE_WORD_F(adr, res) |
32221 | POST_IO |
32222 | RET(20) |
32223 | } |
32224 | |
32225 | // EORDa |
32226 | OPCODE(0xB15F) |
32227 | { |
32228 | u32 adr, res; |
32229 | u32 src, dst; |
32230 | |
32231 | src = DREGu16((Opcode >> 9) & 7); |
32232 | adr = AREG(7); |
32233 | AREG(7) += 2; |
32234 | PRE_IO |
32235 | READ_WORD_F(adr, res) |
32236 | res ^= src; |
32237 | flag_C = 0; |
32238 | flag_V = 0; |
32239 | flag_NotZ = res; |
32240 | flag_N = res >> 8; |
32241 | WRITE_WORD_F(adr, res) |
32242 | POST_IO |
32243 | RET(12) |
32244 | } |
32245 | |
32246 | // EORDa |
32247 | OPCODE(0xB167) |
32248 | { |
32249 | u32 adr, res; |
32250 | u32 src, dst; |
32251 | |
32252 | src = DREGu16((Opcode >> 9) & 7); |
32253 | adr = AREG(7) - 2; |
32254 | AREG(7) = adr; |
32255 | PRE_IO |
32256 | READ_WORD_F(adr, res) |
32257 | res ^= src; |
32258 | flag_C = 0; |
32259 | flag_V = 0; |
32260 | flag_NotZ = res; |
32261 | flag_N = res >> 8; |
32262 | WRITE_WORD_F(adr, res) |
32263 | POST_IO |
32264 | RET(14) |
32265 | } |
32266 | |
32267 | // EORDa |
32268 | OPCODE(0xB180) |
32269 | { |
32270 | u32 adr, res; |
32271 | u32 src, dst; |
32272 | |
32273 | src = DREGu32((Opcode >> 9) & 7); |
32274 | res = DREGu32((Opcode >> 0) & 7); |
32275 | res ^= src; |
32276 | flag_C = 0; |
32277 | flag_V = 0; |
32278 | flag_NotZ = res; |
32279 | flag_N = res >> 24; |
32280 | DREGu32((Opcode >> 0) & 7) = res; |
32281 | RET(8) |
32282 | } |
32283 | |
32284 | // EORDa |
32285 | OPCODE(0xB190) |
32286 | { |
32287 | u32 adr, res; |
32288 | u32 src, dst; |
32289 | |
32290 | src = DREGu32((Opcode >> 9) & 7); |
32291 | adr = AREG((Opcode >> 0) & 7); |
32292 | PRE_IO |
32293 | READ_LONG_F(adr, res) |
32294 | res ^= src; |
32295 | flag_C = 0; |
32296 | flag_V = 0; |
32297 | flag_NotZ = res; |
32298 | flag_N = res >> 24; |
32299 | WRITE_LONG_F(adr, res) |
32300 | POST_IO |
32301 | RET(20) |
32302 | } |
32303 | |
32304 | // EORDa |
32305 | OPCODE(0xB198) |
32306 | { |
32307 | u32 adr, res; |
32308 | u32 src, dst; |
32309 | |
32310 | src = DREGu32((Opcode >> 9) & 7); |
32311 | adr = AREG((Opcode >> 0) & 7); |
32312 | AREG((Opcode >> 0) & 7) += 4; |
32313 | PRE_IO |
32314 | READ_LONG_F(adr, res) |
32315 | res ^= src; |
32316 | flag_C = 0; |
32317 | flag_V = 0; |
32318 | flag_NotZ = res; |
32319 | flag_N = res >> 24; |
32320 | WRITE_LONG_F(adr, res) |
32321 | POST_IO |
32322 | RET(20) |
32323 | } |
32324 | |
32325 | // EORDa |
32326 | OPCODE(0xB1A0) |
32327 | { |
32328 | u32 adr, res; |
32329 | u32 src, dst; |
32330 | |
32331 | src = DREGu32((Opcode >> 9) & 7); |
32332 | adr = AREG((Opcode >> 0) & 7) - 4; |
32333 | AREG((Opcode >> 0) & 7) = adr; |
32334 | PRE_IO |
32335 | READ_LONG_F(adr, res) |
32336 | res ^= src; |
32337 | flag_C = 0; |
32338 | flag_V = 0; |
32339 | flag_NotZ = res; |
32340 | flag_N = res >> 24; |
32341 | WRITE_LONG_F(adr, res) |
32342 | POST_IO |
32343 | RET(22) |
32344 | } |
32345 | |
32346 | // EORDa |
32347 | OPCODE(0xB1A8) |
32348 | { |
32349 | u32 adr, res; |
32350 | u32 src, dst; |
32351 | |
32352 | src = DREGu32((Opcode >> 9) & 7); |
32353 | FETCH_SWORD(adr); |
32354 | adr += AREG((Opcode >> 0) & 7); |
32355 | PRE_IO |
32356 | READ_LONG_F(adr, res) |
32357 | res ^= src; |
32358 | flag_C = 0; |
32359 | flag_V = 0; |
32360 | flag_NotZ = res; |
32361 | flag_N = res >> 24; |
32362 | WRITE_LONG_F(adr, res) |
32363 | POST_IO |
32364 | RET(24) |
32365 | } |
32366 | |
32367 | // EORDa |
32368 | OPCODE(0xB1B0) |
32369 | { |
32370 | u32 adr, res; |
32371 | u32 src, dst; |
32372 | |
32373 | src = DREGu32((Opcode >> 9) & 7); |
32374 | adr = AREG((Opcode >> 0) & 7); |
32375 | DECODE_EXT_WORD |
32376 | PRE_IO |
32377 | READ_LONG_F(adr, res) |
32378 | res ^= src; |
32379 | flag_C = 0; |
32380 | flag_V = 0; |
32381 | flag_NotZ = res; |
32382 | flag_N = res >> 24; |
32383 | WRITE_LONG_F(adr, res) |
32384 | POST_IO |
32385 | RET(26) |
32386 | } |
32387 | |
32388 | // EORDa |
32389 | OPCODE(0xB1B8) |
32390 | { |
32391 | u32 adr, res; |
32392 | u32 src, dst; |
32393 | |
32394 | src = DREGu32((Opcode >> 9) & 7); |
32395 | FETCH_SWORD(adr); |
32396 | PRE_IO |
32397 | READ_LONG_F(adr, res) |
32398 | res ^= src; |
32399 | flag_C = 0; |
32400 | flag_V = 0; |
32401 | flag_NotZ = res; |
32402 | flag_N = res >> 24; |
32403 | WRITE_LONG_F(adr, res) |
32404 | POST_IO |
32405 | RET(24) |
32406 | } |
32407 | |
32408 | // EORDa |
32409 | OPCODE(0xB1B9) |
32410 | { |
32411 | u32 adr, res; |
32412 | u32 src, dst; |
32413 | |
32414 | src = DREGu32((Opcode >> 9) & 7); |
32415 | FETCH_LONG(adr); |
32416 | PRE_IO |
32417 | READ_LONG_F(adr, res) |
32418 | res ^= src; |
32419 | flag_C = 0; |
32420 | flag_V = 0; |
32421 | flag_NotZ = res; |
32422 | flag_N = res >> 24; |
32423 | WRITE_LONG_F(adr, res) |
32424 | POST_IO |
32425 | RET(28) |
32426 | } |
32427 | |
32428 | // EORDa |
32429 | OPCODE(0xB19F) |
32430 | { |
32431 | u32 adr, res; |
32432 | u32 src, dst; |
32433 | |
32434 | src = DREGu32((Opcode >> 9) & 7); |
32435 | adr = AREG(7); |
32436 | AREG(7) += 4; |
32437 | PRE_IO |
32438 | READ_LONG_F(adr, res) |
32439 | res ^= src; |
32440 | flag_C = 0; |
32441 | flag_V = 0; |
32442 | flag_NotZ = res; |
32443 | flag_N = res >> 24; |
32444 | WRITE_LONG_F(adr, res) |
32445 | POST_IO |
32446 | RET(20) |
32447 | } |
32448 | |
32449 | // EORDa |
32450 | OPCODE(0xB1A7) |
32451 | { |
32452 | u32 adr, res; |
32453 | u32 src, dst; |
32454 | |
32455 | src = DREGu32((Opcode >> 9) & 7); |
32456 | adr = AREG(7) - 4; |
32457 | AREG(7) = adr; |
32458 | PRE_IO |
32459 | READ_LONG_F(adr, res) |
32460 | res ^= src; |
32461 | flag_C = 0; |
32462 | flag_V = 0; |
32463 | flag_NotZ = res; |
32464 | flag_N = res >> 24; |
32465 | WRITE_LONG_F(adr, res) |
32466 | POST_IO |
32467 | RET(22) |
32468 | } |
32469 | |
32470 | // CMPA |
32471 | OPCODE(0xB0C0) |
32472 | { |
32473 | u32 adr, res; |
32474 | u32 src, dst; |
32475 | |
32476 | src = (s32)DREGs16((Opcode >> 0) & 7); |
32477 | dst = AREGu32((Opcode >> 9) & 7); |
32478 | res = dst - src; |
32479 | flag_NotZ = res; |
32480 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32481 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32482 | flag_N = res >> 24; |
32483 | RET(6) |
32484 | } |
32485 | |
32486 | // CMPA |
32487 | OPCODE(0xB0C8) |
32488 | { |
32489 | u32 adr, res; |
32490 | u32 src, dst; |
32491 | |
32492 | src = (s32)AREGs16((Opcode >> 0) & 7); |
32493 | dst = AREGu32((Opcode >> 9) & 7); |
32494 | res = dst - src; |
32495 | flag_NotZ = res; |
32496 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32497 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32498 | flag_N = res >> 24; |
32499 | RET(6) |
32500 | } |
32501 | |
32502 | // CMPA |
32503 | OPCODE(0xB0D0) |
32504 | { |
32505 | u32 adr, res; |
32506 | u32 src, dst; |
32507 | |
32508 | adr = AREG((Opcode >> 0) & 7); |
32509 | PRE_IO |
32510 | READSX_WORD_F(adr, src) |
32511 | dst = AREGu32((Opcode >> 9) & 7); |
32512 | res = dst - src; |
32513 | flag_NotZ = res; |
32514 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32515 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32516 | flag_N = res >> 24; |
32517 | POST_IO |
32518 | RET(10) |
32519 | } |
32520 | |
32521 | // CMPA |
32522 | OPCODE(0xB0D8) |
32523 | { |
32524 | u32 adr, res; |
32525 | u32 src, dst; |
32526 | |
32527 | adr = AREG((Opcode >> 0) & 7); |
32528 | AREG((Opcode >> 0) & 7) += 2; |
32529 | PRE_IO |
32530 | READSX_WORD_F(adr, src) |
32531 | dst = AREGu32((Opcode >> 9) & 7); |
32532 | res = dst - src; |
32533 | flag_NotZ = res; |
32534 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32535 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32536 | flag_N = res >> 24; |
32537 | POST_IO |
32538 | RET(10) |
32539 | } |
32540 | |
32541 | // CMPA |
32542 | OPCODE(0xB0E0) |
32543 | { |
32544 | u32 adr, res; |
32545 | u32 src, dst; |
32546 | |
32547 | adr = AREG((Opcode >> 0) & 7) - 2; |
32548 | AREG((Opcode >> 0) & 7) = adr; |
32549 | PRE_IO |
32550 | READSX_WORD_F(adr, src) |
32551 | dst = AREGu32((Opcode >> 9) & 7); |
32552 | res = dst - src; |
32553 | flag_NotZ = res; |
32554 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32555 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32556 | flag_N = res >> 24; |
32557 | POST_IO |
32558 | RET(12) |
32559 | } |
32560 | |
32561 | // CMPA |
32562 | OPCODE(0xB0E8) |
32563 | { |
32564 | u32 adr, res; |
32565 | u32 src, dst; |
32566 | |
32567 | FETCH_SWORD(adr); |
32568 | adr += AREG((Opcode >> 0) & 7); |
32569 | PRE_IO |
32570 | READSX_WORD_F(adr, src) |
32571 | dst = AREGu32((Opcode >> 9) & 7); |
32572 | res = dst - src; |
32573 | flag_NotZ = res; |
32574 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32575 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32576 | flag_N = res >> 24; |
32577 | POST_IO |
32578 | RET(14) |
32579 | } |
32580 | |
32581 | // CMPA |
32582 | OPCODE(0xB0F0) |
32583 | { |
32584 | u32 adr, res; |
32585 | u32 src, dst; |
32586 | |
32587 | adr = AREG((Opcode >> 0) & 7); |
32588 | DECODE_EXT_WORD |
32589 | PRE_IO |
32590 | READSX_WORD_F(adr, src) |
32591 | dst = AREGu32((Opcode >> 9) & 7); |
32592 | res = dst - src; |
32593 | flag_NotZ = res; |
32594 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32595 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32596 | flag_N = res >> 24; |
32597 | POST_IO |
32598 | RET(16) |
32599 | } |
32600 | |
32601 | // CMPA |
32602 | OPCODE(0xB0F8) |
32603 | { |
32604 | u32 adr, res; |
32605 | u32 src, dst; |
32606 | |
32607 | FETCH_SWORD(adr); |
32608 | PRE_IO |
32609 | READSX_WORD_F(adr, src) |
32610 | dst = AREGu32((Opcode >> 9) & 7); |
32611 | res = dst - src; |
32612 | flag_NotZ = res; |
32613 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32614 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32615 | flag_N = res >> 24; |
32616 | POST_IO |
32617 | RET(14) |
32618 | } |
32619 | |
32620 | // CMPA |
32621 | OPCODE(0xB0F9) |
32622 | { |
32623 | u32 adr, res; |
32624 | u32 src, dst; |
32625 | |
32626 | FETCH_LONG(adr); |
32627 | PRE_IO |
32628 | READSX_WORD_F(adr, src) |
32629 | dst = AREGu32((Opcode >> 9) & 7); |
32630 | res = dst - src; |
32631 | flag_NotZ = res; |
32632 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32633 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32634 | flag_N = res >> 24; |
32635 | POST_IO |
32636 | RET(18) |
32637 | } |
32638 | |
32639 | // CMPA |
32640 | OPCODE(0xB0FA) |
32641 | { |
32642 | u32 adr, res; |
32643 | u32 src, dst; |
32644 | |
be26eb23 |
32645 | adr = GET_SWORD + GET_PC; |
70357ce5 |
32646 | PC++; |
32647 | PRE_IO |
32648 | READSX_WORD_F(adr, src) |
32649 | dst = AREGu32((Opcode >> 9) & 7); |
32650 | res = dst - src; |
32651 | flag_NotZ = res; |
32652 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32653 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32654 | flag_N = res >> 24; |
32655 | POST_IO |
32656 | RET(14) |
32657 | } |
32658 | |
32659 | // CMPA |
32660 | OPCODE(0xB0FB) |
32661 | { |
32662 | u32 adr, res; |
32663 | u32 src, dst; |
32664 | |
be26eb23 |
32665 | adr = GET_PC; |
70357ce5 |
32666 | DECODE_EXT_WORD |
32667 | PRE_IO |
32668 | READSX_WORD_F(adr, src) |
32669 | dst = AREGu32((Opcode >> 9) & 7); |
32670 | res = dst - src; |
32671 | flag_NotZ = res; |
32672 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32673 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32674 | flag_N = res >> 24; |
32675 | POST_IO |
32676 | RET(16) |
32677 | } |
32678 | |
32679 | // CMPA |
32680 | OPCODE(0xB0FC) |
32681 | { |
32682 | u32 adr, res; |
32683 | u32 src, dst; |
32684 | |
32685 | FETCH_SWORD(src); |
32686 | dst = AREGu32((Opcode >> 9) & 7); |
32687 | res = dst - src; |
32688 | flag_NotZ = res; |
32689 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32690 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32691 | flag_N = res >> 24; |
32692 | RET(10) |
32693 | } |
32694 | |
32695 | // CMPA |
32696 | OPCODE(0xB0DF) |
32697 | { |
32698 | u32 adr, res; |
32699 | u32 src, dst; |
32700 | |
32701 | adr = AREG(7); |
32702 | AREG(7) += 2; |
32703 | PRE_IO |
32704 | READSX_WORD_F(adr, src) |
32705 | dst = AREGu32((Opcode >> 9) & 7); |
32706 | res = dst - src; |
32707 | flag_NotZ = res; |
32708 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32709 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32710 | flag_N = res >> 24; |
32711 | POST_IO |
32712 | RET(10) |
32713 | } |
32714 | |
32715 | // CMPA |
32716 | OPCODE(0xB0E7) |
32717 | { |
32718 | u32 adr, res; |
32719 | u32 src, dst; |
32720 | |
32721 | adr = AREG(7) - 2; |
32722 | AREG(7) = adr; |
32723 | PRE_IO |
32724 | READSX_WORD_F(adr, src) |
32725 | dst = AREGu32((Opcode >> 9) & 7); |
32726 | res = dst - src; |
32727 | flag_NotZ = res; |
32728 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32729 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32730 | flag_N = res >> 24; |
32731 | POST_IO |
32732 | RET(12) |
32733 | } |
32734 | |
32735 | // CMPA |
32736 | OPCODE(0xB1C0) |
32737 | { |
32738 | u32 adr, res; |
32739 | u32 src, dst; |
32740 | |
32741 | src = (s32)DREGs32((Opcode >> 0) & 7); |
32742 | dst = AREGu32((Opcode >> 9) & 7); |
32743 | res = dst - src; |
32744 | flag_NotZ = res; |
32745 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32746 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32747 | flag_N = res >> 24; |
32748 | RET(6) |
32749 | } |
32750 | |
32751 | // CMPA |
32752 | OPCODE(0xB1C8) |
32753 | { |
32754 | u32 adr, res; |
32755 | u32 src, dst; |
32756 | |
32757 | src = (s32)AREGs32((Opcode >> 0) & 7); |
32758 | dst = AREGu32((Opcode >> 9) & 7); |
32759 | res = dst - src; |
32760 | flag_NotZ = res; |
32761 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32762 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32763 | flag_N = res >> 24; |
32764 | RET(6) |
32765 | } |
32766 | |
32767 | // CMPA |
32768 | OPCODE(0xB1D0) |
32769 | { |
32770 | u32 adr, res; |
32771 | u32 src, dst; |
32772 | |
32773 | adr = AREG((Opcode >> 0) & 7); |
32774 | PRE_IO |
32775 | READSX_LONG_F(adr, src) |
32776 | dst = AREGu32((Opcode >> 9) & 7); |
32777 | res = dst - src; |
32778 | flag_NotZ = res; |
32779 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32780 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32781 | flag_N = res >> 24; |
32782 | POST_IO |
32783 | RET(14) |
32784 | } |
32785 | |
32786 | // CMPA |
32787 | OPCODE(0xB1D8) |
32788 | { |
32789 | u32 adr, res; |
32790 | u32 src, dst; |
32791 | |
32792 | adr = AREG((Opcode >> 0) & 7); |
32793 | AREG((Opcode >> 0) & 7) += 4; |
32794 | PRE_IO |
32795 | READSX_LONG_F(adr, src) |
32796 | dst = AREGu32((Opcode >> 9) & 7); |
32797 | res = dst - src; |
32798 | flag_NotZ = res; |
32799 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32800 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32801 | flag_N = res >> 24; |
32802 | POST_IO |
32803 | RET(14) |
32804 | } |
32805 | |
32806 | // CMPA |
32807 | OPCODE(0xB1E0) |
32808 | { |
32809 | u32 adr, res; |
32810 | u32 src, dst; |
32811 | |
32812 | adr = AREG((Opcode >> 0) & 7) - 4; |
32813 | AREG((Opcode >> 0) & 7) = adr; |
32814 | PRE_IO |
32815 | READSX_LONG_F(adr, src) |
32816 | dst = AREGu32((Opcode >> 9) & 7); |
32817 | res = dst - src; |
32818 | flag_NotZ = res; |
32819 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32820 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32821 | flag_N = res >> 24; |
32822 | POST_IO |
32823 | RET(16) |
32824 | } |
32825 | |
32826 | // CMPA |
32827 | OPCODE(0xB1E8) |
32828 | { |
32829 | u32 adr, res; |
32830 | u32 src, dst; |
32831 | |
32832 | FETCH_SWORD(adr); |
32833 | adr += AREG((Opcode >> 0) & 7); |
32834 | PRE_IO |
32835 | READSX_LONG_F(adr, src) |
32836 | dst = AREGu32((Opcode >> 9) & 7); |
32837 | res = dst - src; |
32838 | flag_NotZ = res; |
32839 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32840 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32841 | flag_N = res >> 24; |
32842 | POST_IO |
32843 | RET(18) |
32844 | } |
32845 | |
32846 | // CMPA |
32847 | OPCODE(0xB1F0) |
32848 | { |
32849 | u32 adr, res; |
32850 | u32 src, dst; |
32851 | |
32852 | adr = AREG((Opcode >> 0) & 7); |
32853 | DECODE_EXT_WORD |
32854 | PRE_IO |
32855 | READSX_LONG_F(adr, src) |
32856 | dst = AREGu32((Opcode >> 9) & 7); |
32857 | res = dst - src; |
32858 | flag_NotZ = res; |
32859 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32860 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32861 | flag_N = res >> 24; |
32862 | POST_IO |
32863 | RET(20) |
32864 | } |
32865 | |
32866 | // CMPA |
32867 | OPCODE(0xB1F8) |
32868 | { |
32869 | u32 adr, res; |
32870 | u32 src, dst; |
32871 | |
32872 | FETCH_SWORD(adr); |
32873 | PRE_IO |
32874 | READSX_LONG_F(adr, src) |
32875 | dst = AREGu32((Opcode >> 9) & 7); |
32876 | res = dst - src; |
32877 | flag_NotZ = res; |
32878 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32879 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32880 | flag_N = res >> 24; |
32881 | POST_IO |
32882 | RET(18) |
32883 | } |
32884 | |
32885 | // CMPA |
32886 | OPCODE(0xB1F9) |
32887 | { |
32888 | u32 adr, res; |
32889 | u32 src, dst; |
32890 | |
32891 | FETCH_LONG(adr); |
32892 | PRE_IO |
32893 | READSX_LONG_F(adr, src) |
32894 | dst = AREGu32((Opcode >> 9) & 7); |
32895 | res = dst - src; |
32896 | flag_NotZ = res; |
32897 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32898 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32899 | flag_N = res >> 24; |
32900 | POST_IO |
32901 | RET(22) |
32902 | } |
32903 | |
32904 | // CMPA |
32905 | OPCODE(0xB1FA) |
32906 | { |
32907 | u32 adr, res; |
32908 | u32 src, dst; |
32909 | |
be26eb23 |
32910 | adr = GET_SWORD + GET_PC; |
70357ce5 |
32911 | PC++; |
32912 | PRE_IO |
32913 | READSX_LONG_F(adr, src) |
32914 | dst = AREGu32((Opcode >> 9) & 7); |
32915 | res = dst - src; |
32916 | flag_NotZ = res; |
32917 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32918 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32919 | flag_N = res >> 24; |
32920 | POST_IO |
32921 | RET(18) |
32922 | } |
32923 | |
32924 | // CMPA |
32925 | OPCODE(0xB1FB) |
32926 | { |
32927 | u32 adr, res; |
32928 | u32 src, dst; |
32929 | |
be26eb23 |
32930 | adr = GET_PC; |
70357ce5 |
32931 | DECODE_EXT_WORD |
32932 | PRE_IO |
32933 | READSX_LONG_F(adr, src) |
32934 | dst = AREGu32((Opcode >> 9) & 7); |
32935 | res = dst - src; |
32936 | flag_NotZ = res; |
32937 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32938 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32939 | flag_N = res >> 24; |
32940 | POST_IO |
32941 | RET(20) |
32942 | } |
32943 | |
32944 | // CMPA |
32945 | OPCODE(0xB1FC) |
32946 | { |
32947 | u32 adr, res; |
32948 | u32 src, dst; |
32949 | |
32950 | FETCH_LONG(src); |
32951 | dst = AREGu32((Opcode >> 9) & 7); |
32952 | res = dst - src; |
32953 | flag_NotZ = res; |
32954 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32955 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32956 | flag_N = res >> 24; |
32957 | RET(14) |
32958 | } |
32959 | |
32960 | // CMPA |
32961 | OPCODE(0xB1DF) |
32962 | { |
32963 | u32 adr, res; |
32964 | u32 src, dst; |
32965 | |
32966 | adr = AREG(7); |
32967 | AREG(7) += 4; |
32968 | PRE_IO |
32969 | READSX_LONG_F(adr, src) |
32970 | dst = AREGu32((Opcode >> 9) & 7); |
32971 | res = dst - src; |
32972 | flag_NotZ = res; |
32973 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32974 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32975 | flag_N = res >> 24; |
32976 | POST_IO |
32977 | RET(14) |
32978 | } |
32979 | |
32980 | // CMPA |
32981 | OPCODE(0xB1E7) |
32982 | { |
32983 | u32 adr, res; |
32984 | u32 src, dst; |
32985 | |
32986 | adr = AREG(7) - 4; |
32987 | AREG(7) = adr; |
32988 | PRE_IO |
32989 | READSX_LONG_F(adr, src) |
32990 | dst = AREGu32((Opcode >> 9) & 7); |
32991 | res = dst - src; |
32992 | flag_NotZ = res; |
32993 | flag_C = ((src & res & 1) + (src >> 1) + (res >> 1)) >> 23; |
32994 | flag_V = ((src ^ dst) & (res ^ dst)) >> 24; |
32995 | flag_N = res >> 24; |
32996 | POST_IO |
32997 | RET(16) |
32998 | } |
32999 | |
33000 | // ANDaD |
33001 | OPCODE(0xC000) |
33002 | { |
33003 | u32 adr, res; |
33004 | u32 src, dst; |
33005 | |
33006 | src = DREGu8((Opcode >> 0) & 7); |
33007 | res = DREGu8((Opcode >> 9) & 7); |
33008 | res &= src; |
33009 | flag_C = 0; |
33010 | flag_V = 0; |
33011 | flag_NotZ = res; |
33012 | flag_N = res; |
33013 | DREGu8((Opcode >> 9) & 7) = res; |
33014 | RET(4) |
33015 | } |
33016 | |
33017 | // ANDaD |
33018 | OPCODE(0xC010) |
33019 | { |
33020 | u32 adr, res; |
33021 | u32 src, dst; |
33022 | |
33023 | adr = AREG((Opcode >> 0) & 7); |
33024 | PRE_IO |
33025 | READ_BYTE_F(adr, src) |
33026 | res = DREGu8((Opcode >> 9) & 7); |
33027 | res &= src; |
33028 | flag_C = 0; |
33029 | flag_V = 0; |
33030 | flag_NotZ = res; |
33031 | flag_N = res; |
33032 | DREGu8((Opcode >> 9) & 7) = res; |
33033 | POST_IO |
33034 | RET(8) |
33035 | } |
33036 | |
33037 | // ANDaD |
33038 | OPCODE(0xC018) |
33039 | { |
33040 | u32 adr, res; |
33041 | u32 src, dst; |
33042 | |
33043 | adr = AREG((Opcode >> 0) & 7); |
33044 | AREG((Opcode >> 0) & 7) += 1; |
33045 | PRE_IO |
33046 | READ_BYTE_F(adr, src) |
33047 | res = DREGu8((Opcode >> 9) & 7); |
33048 | res &= src; |
33049 | flag_C = 0; |
33050 | flag_V = 0; |
33051 | flag_NotZ = res; |
33052 | flag_N = res; |
33053 | DREGu8((Opcode >> 9) & 7) = res; |
33054 | POST_IO |
33055 | RET(8) |
33056 | } |
33057 | |
33058 | // ANDaD |
33059 | OPCODE(0xC020) |
33060 | { |
33061 | u32 adr, res; |
33062 | u32 src, dst; |
33063 | |
33064 | adr = AREG((Opcode >> 0) & 7) - 1; |
33065 | AREG((Opcode >> 0) & 7) = adr; |
33066 | PRE_IO |
33067 | READ_BYTE_F(adr, src) |
33068 | res = DREGu8((Opcode >> 9) & 7); |
33069 | res &= src; |
33070 | flag_C = 0; |
33071 | flag_V = 0; |
33072 | flag_NotZ = res; |
33073 | flag_N = res; |
33074 | DREGu8((Opcode >> 9) & 7) = res; |
33075 | POST_IO |
33076 | RET(10) |
33077 | } |
33078 | |
33079 | // ANDaD |
33080 | OPCODE(0xC028) |
33081 | { |
33082 | u32 adr, res; |
33083 | u32 src, dst; |
33084 | |
33085 | FETCH_SWORD(adr); |
33086 | adr += AREG((Opcode >> 0) & 7); |
33087 | PRE_IO |
33088 | READ_BYTE_F(adr, src) |
33089 | res = DREGu8((Opcode >> 9) & 7); |
33090 | res &= src; |
33091 | flag_C = 0; |
33092 | flag_V = 0; |
33093 | flag_NotZ = res; |
33094 | flag_N = res; |
33095 | DREGu8((Opcode >> 9) & 7) = res; |
33096 | POST_IO |
33097 | RET(12) |
33098 | } |
33099 | |
33100 | // ANDaD |
33101 | OPCODE(0xC030) |
33102 | { |
33103 | u32 adr, res; |
33104 | u32 src, dst; |
33105 | |
33106 | adr = AREG((Opcode >> 0) & 7); |
33107 | DECODE_EXT_WORD |
33108 | PRE_IO |
33109 | READ_BYTE_F(adr, src) |
33110 | res = DREGu8((Opcode >> 9) & 7); |
33111 | res &= src; |
33112 | flag_C = 0; |
33113 | flag_V = 0; |
33114 | flag_NotZ = res; |
33115 | flag_N = res; |
33116 | DREGu8((Opcode >> 9) & 7) = res; |
33117 | POST_IO |
33118 | RET(14) |
33119 | } |
33120 | |
33121 | // ANDaD |
33122 | OPCODE(0xC038) |
33123 | { |
33124 | u32 adr, res; |
33125 | u32 src, dst; |
33126 | |
33127 | FETCH_SWORD(adr); |
33128 | PRE_IO |
33129 | READ_BYTE_F(adr, src) |
33130 | res = DREGu8((Opcode >> 9) & 7); |
33131 | res &= src; |
33132 | flag_C = 0; |
33133 | flag_V = 0; |
33134 | flag_NotZ = res; |
33135 | flag_N = res; |
33136 | DREGu8((Opcode >> 9) & 7) = res; |
33137 | POST_IO |
33138 | RET(12) |
33139 | } |
33140 | |
33141 | // ANDaD |
33142 | OPCODE(0xC039) |
33143 | { |
33144 | u32 adr, res; |
33145 | u32 src, dst; |
33146 | |
33147 | FETCH_LONG(adr); |
33148 | PRE_IO |
33149 | READ_BYTE_F(adr, src) |
33150 | res = DREGu8((Opcode >> 9) & 7); |
33151 | res &= src; |
33152 | flag_C = 0; |
33153 | flag_V = 0; |
33154 | flag_NotZ = res; |
33155 | flag_N = res; |
33156 | DREGu8((Opcode >> 9) & 7) = res; |
33157 | POST_IO |
33158 | RET(16) |
33159 | } |
33160 | |
33161 | // ANDaD |
33162 | OPCODE(0xC03A) |
33163 | { |
33164 | u32 adr, res; |
33165 | u32 src, dst; |
33166 | |
be26eb23 |
33167 | adr = GET_SWORD + GET_PC; |
70357ce5 |
33168 | PC++; |
33169 | PRE_IO |
33170 | READ_BYTE_F(adr, src) |
33171 | res = DREGu8((Opcode >> 9) & 7); |
33172 | res &= src; |
33173 | flag_C = 0; |
33174 | flag_V = 0; |
33175 | flag_NotZ = res; |
33176 | flag_N = res; |
33177 | DREGu8((Opcode >> 9) & 7) = res; |
33178 | POST_IO |
33179 | RET(12) |
33180 | } |
33181 | |
33182 | // ANDaD |
33183 | OPCODE(0xC03B) |
33184 | { |
33185 | u32 adr, res; |
33186 | u32 src, dst; |
33187 | |
be26eb23 |
33188 | adr = GET_PC; |
70357ce5 |
33189 | DECODE_EXT_WORD |
33190 | PRE_IO |
33191 | READ_BYTE_F(adr, src) |
33192 | res = DREGu8((Opcode >> 9) & 7); |
33193 | res &= src; |
33194 | flag_C = 0; |
33195 | flag_V = 0; |
33196 | flag_NotZ = res; |
33197 | flag_N = res; |
33198 | DREGu8((Opcode >> 9) & 7) = res; |
33199 | POST_IO |
33200 | RET(14) |
33201 | } |
33202 | |
33203 | // ANDaD |
33204 | OPCODE(0xC03C) |
33205 | { |
33206 | u32 adr, res; |
33207 | u32 src, dst; |
33208 | |
33209 | FETCH_BYTE(src); |
33210 | res = DREGu8((Opcode >> 9) & 7); |
33211 | res &= src; |
33212 | flag_C = 0; |
33213 | flag_V = 0; |
33214 | flag_NotZ = res; |
33215 | flag_N = res; |
33216 | DREGu8((Opcode >> 9) & 7) = res; |
33217 | RET(8) |
33218 | } |
33219 | |
33220 | // ANDaD |
33221 | OPCODE(0xC01F) |
33222 | { |
33223 | u32 adr, res; |
33224 | u32 src, dst; |
33225 | |
33226 | adr = AREG(7); |
33227 | AREG(7) += 2; |
33228 | PRE_IO |
33229 | READ_BYTE_F(adr, src) |
33230 | res = DREGu8((Opcode >> 9) & 7); |
33231 | res &= src; |
33232 | flag_C = 0; |
33233 | flag_V = 0; |
33234 | flag_NotZ = res; |
33235 | flag_N = res; |
33236 | DREGu8((Opcode >> 9) & 7) = res; |
33237 | POST_IO |
33238 | RET(8) |
33239 | } |
33240 | |
33241 | // ANDaD |
33242 | OPCODE(0xC027) |
33243 | { |
33244 | u32 adr, res; |
33245 | u32 src, dst; |
33246 | |
33247 | adr = AREG(7) - 2; |
33248 | AREG(7) = adr; |
33249 | PRE_IO |
33250 | READ_BYTE_F(adr, src) |
33251 | res = DREGu8((Opcode >> 9) & 7); |
33252 | res &= src; |
33253 | flag_C = 0; |
33254 | flag_V = 0; |
33255 | flag_NotZ = res; |
33256 | flag_N = res; |
33257 | DREGu8((Opcode >> 9) & 7) = res; |
33258 | POST_IO |
33259 | RET(10) |
33260 | } |
33261 | |
33262 | // ANDaD |
33263 | OPCODE(0xC040) |
33264 | { |
33265 | u32 adr, res; |
33266 | u32 src, dst; |
33267 | |
33268 | src = DREGu16((Opcode >> 0) & 7); |
33269 | res = DREGu16((Opcode >> 9) & 7); |
33270 | res &= src; |
33271 | flag_C = 0; |
33272 | flag_V = 0; |
33273 | flag_NotZ = res; |
33274 | flag_N = res >> 8; |
33275 | DREGu16((Opcode >> 9) & 7) = res; |
33276 | RET(4) |
33277 | } |
33278 | |
33279 | // ANDaD |
33280 | OPCODE(0xC050) |
33281 | { |
33282 | u32 adr, res; |
33283 | u32 src, dst; |
33284 | |
33285 | adr = AREG((Opcode >> 0) & 7); |
33286 | PRE_IO |
33287 | READ_WORD_F(adr, src) |
33288 | res = DREGu16((Opcode >> 9) & 7); |
33289 | res &= src; |
33290 | flag_C = 0; |
33291 | flag_V = 0; |
33292 | flag_NotZ = res; |
33293 | flag_N = res >> 8; |
33294 | DREGu16((Opcode >> 9) & 7) = res; |
33295 | POST_IO |
33296 | RET(8) |
33297 | } |
33298 | |
33299 | // ANDaD |
33300 | OPCODE(0xC058) |
33301 | { |
33302 | u32 adr, res; |
33303 | u32 src, dst; |
33304 | |
33305 | adr = AREG((Opcode >> 0) & 7); |
33306 | AREG((Opcode >> 0) & 7) += 2; |
33307 | PRE_IO |
33308 | READ_WORD_F(adr, src) |
33309 | res = DREGu16((Opcode >> 9) & 7); |
33310 | res &= src; |
33311 | flag_C = 0; |
33312 | flag_V = 0; |
33313 | flag_NotZ = res; |
33314 | flag_N = res >> 8; |
33315 | DREGu16((Opcode >> 9) & 7) = res; |
33316 | POST_IO |
33317 | RET(8) |
33318 | } |
33319 | |
33320 | // ANDaD |
33321 | OPCODE(0xC060) |
33322 | { |
33323 | u32 adr, res; |
33324 | u32 src, dst; |
33325 | |
33326 | adr = AREG((Opcode >> 0) & 7) - 2; |
33327 | AREG((Opcode >> 0) & 7) = adr; |
33328 | PRE_IO |
33329 | READ_WORD_F(adr, src) |
33330 | res = DREGu16((Opcode >> 9) & 7); |
33331 | res &= src; |
33332 | flag_C = 0; |
33333 | flag_V = 0; |
33334 | flag_NotZ = res; |
33335 | flag_N = res >> 8; |
33336 | DREGu16((Opcode >> 9) & 7) = res; |
33337 | POST_IO |
33338 | RET(10) |
33339 | } |
33340 | |
33341 | // ANDaD |
33342 | OPCODE(0xC068) |
33343 | { |
33344 | u32 adr, res; |
33345 | u32 src, dst; |
33346 | |
33347 | FETCH_SWORD(adr); |
33348 | adr += AREG((Opcode >> 0) & 7); |
33349 | PRE_IO |
33350 | READ_WORD_F(adr, src) |
33351 | res = DREGu16((Opcode >> 9) & 7); |
33352 | res &= src; |
33353 | flag_C = 0; |
33354 | flag_V = 0; |
33355 | flag_NotZ = res; |
33356 | flag_N = res >> 8; |
33357 | DREGu16((Opcode >> 9) & 7) = res; |
33358 | POST_IO |
33359 | RET(12) |
33360 | } |
33361 | |
33362 | // ANDaD |
33363 | OPCODE(0xC070) |
33364 | { |
33365 | u32 adr, res; |
33366 | u32 src, dst; |
33367 | |
33368 | adr = AREG((Opcode >> 0) & 7); |
33369 | DECODE_EXT_WORD |
33370 | PRE_IO |
33371 | READ_WORD_F(adr, src) |
33372 | res = DREGu16((Opcode >> 9) & 7); |
33373 | res &= src; |
33374 | flag_C = 0; |
33375 | flag_V = 0; |
33376 | flag_NotZ = res; |
33377 | flag_N = res >> 8; |
33378 | DREGu16((Opcode >> 9) & 7) = res; |
33379 | POST_IO |
33380 | RET(14) |
33381 | } |
33382 | |
33383 | // ANDaD |
33384 | OPCODE(0xC078) |
33385 | { |
33386 | u32 adr, res; |
33387 | u32 src, dst; |
33388 | |
33389 | FETCH_SWORD(adr); |
33390 | PRE_IO |
33391 | READ_WORD_F(adr, src) |
33392 | res = DREGu16((Opcode >> 9) & 7); |
33393 | res &= src; |
33394 | flag_C = 0; |
33395 | flag_V = 0; |
33396 | flag_NotZ = res; |
33397 | flag_N = res >> 8; |
33398 | DREGu16((Opcode >> 9) & 7) = res; |
33399 | POST_IO |
33400 | RET(12) |
33401 | } |
33402 | |
33403 | // ANDaD |
33404 | OPCODE(0xC079) |
33405 | { |
33406 | u32 adr, res; |
33407 | u32 src, dst; |
33408 | |
33409 | FETCH_LONG(adr); |
33410 | PRE_IO |
33411 | READ_WORD_F(adr, src) |
33412 | res = DREGu16((Opcode >> 9) & 7); |
33413 | res &= src; |
33414 | flag_C = 0; |
33415 | flag_V = 0; |
33416 | flag_NotZ = res; |
33417 | flag_N = res >> 8; |
33418 | DREGu16((Opcode >> 9) & 7) = res; |
33419 | POST_IO |
33420 | RET(16) |
33421 | } |
33422 | |
33423 | // ANDaD |
33424 | OPCODE(0xC07A) |
33425 | { |
33426 | u32 adr, res; |
33427 | u32 src, dst; |
33428 | |
be26eb23 |
33429 | adr = GET_SWORD + GET_PC; |
70357ce5 |
33430 | PC++; |
33431 | PRE_IO |
33432 | READ_WORD_F(adr, src) |
33433 | res = DREGu16((Opcode >> 9) & 7); |
33434 | res &= src; |
33435 | flag_C = 0; |
33436 | flag_V = 0; |
33437 | flag_NotZ = res; |
33438 | flag_N = res >> 8; |
33439 | DREGu16((Opcode >> 9) & 7) = res; |
33440 | POST_IO |
33441 | RET(12) |
33442 | } |
33443 | |
33444 | // ANDaD |
33445 | OPCODE(0xC07B) |
33446 | { |
33447 | u32 adr, res; |
33448 | u32 src, dst; |
33449 | |
be26eb23 |
33450 | adr = GET_PC; |
70357ce5 |
33451 | DECODE_EXT_WORD |
33452 | PRE_IO |
33453 | READ_WORD_F(adr, src) |
33454 | res = DREGu16((Opcode >> 9) & 7); |
33455 | res &= src; |
33456 | flag_C = 0; |
33457 | flag_V = 0; |
33458 | flag_NotZ = res; |
33459 | flag_N = res >> 8; |
33460 | DREGu16((Opcode >> 9) & 7) = res; |
33461 | POST_IO |
33462 | RET(14) |
33463 | } |
33464 | |
33465 | // ANDaD |
33466 | OPCODE(0xC07C) |
33467 | { |
33468 | u32 adr, res; |
33469 | u32 src, dst; |
33470 | |
33471 | FETCH_WORD(src); |
33472 | res = DREGu16((Opcode >> 9) & 7); |
33473 | res &= src; |
33474 | flag_C = 0; |
33475 | flag_V = 0; |
33476 | flag_NotZ = res; |
33477 | flag_N = res >> 8; |
33478 | DREGu16((Opcode >> 9) & 7) = res; |
33479 | RET(8) |
33480 | } |
33481 | |
33482 | // ANDaD |
33483 | OPCODE(0xC05F) |
33484 | { |
33485 | u32 adr, res; |
33486 | u32 src, dst; |
33487 | |
33488 | adr = AREG(7); |
33489 | AREG(7) += 2; |
33490 | PRE_IO |
33491 | READ_WORD_F(adr, src) |
33492 | res = DREGu16((Opcode >> 9) & 7); |
33493 | res &= src; |
33494 | flag_C = 0; |
33495 | flag_V = 0; |
33496 | flag_NotZ = res; |
33497 | flag_N = res >> 8; |
33498 | DREGu16((Opcode >> 9) & 7) = res; |
33499 | POST_IO |
33500 | RET(8) |
33501 | } |
33502 | |
33503 | // ANDaD |
33504 | OPCODE(0xC067) |
33505 | { |
33506 | u32 adr, res; |
33507 | u32 src, dst; |
33508 | |
33509 | adr = AREG(7) - 2; |
33510 | AREG(7) = adr; |
33511 | PRE_IO |
33512 | READ_WORD_F(adr, src) |
33513 | res = DREGu16((Opcode >> 9) & 7); |
33514 | res &= src; |
33515 | flag_C = 0; |
33516 | flag_V = 0; |
33517 | flag_NotZ = res; |
33518 | flag_N = res >> 8; |
33519 | DREGu16((Opcode >> 9) & 7) = res; |
33520 | POST_IO |
33521 | RET(10) |
33522 | } |
33523 | |
33524 | // ANDaD |
33525 | OPCODE(0xC080) |
33526 | { |
33527 | u32 adr, res; |
33528 | u32 src, dst; |
33529 | |
33530 | src = DREGu32((Opcode >> 0) & 7); |
33531 | res = DREGu32((Opcode >> 9) & 7); |
33532 | res &= src; |
33533 | flag_C = 0; |
33534 | flag_V = 0; |
33535 | flag_NotZ = res; |
33536 | flag_N = res >> 24; |
33537 | DREGu32((Opcode >> 9) & 7) = res; |
33538 | RET(8) |
33539 | } |
33540 | |
33541 | // ANDaD |
33542 | OPCODE(0xC090) |
33543 | { |
33544 | u32 adr, res; |
33545 | u32 src, dst; |
33546 | |
33547 | adr = AREG((Opcode >> 0) & 7); |
33548 | PRE_IO |
33549 | READ_LONG_F(adr, src) |
33550 | res = DREGu32((Opcode >> 9) & 7); |
33551 | res &= src; |
33552 | flag_C = 0; |
33553 | flag_V = 0; |
33554 | flag_NotZ = res; |
33555 | flag_N = res >> 24; |
33556 | DREGu32((Opcode >> 9) & 7) = res; |
33557 | POST_IO |
33558 | RET(14) |
33559 | } |
33560 | |
33561 | // ANDaD |
33562 | OPCODE(0xC098) |
33563 | { |
33564 | u32 adr, res; |
33565 | u32 src, dst; |
33566 | |
33567 | adr = AREG((Opcode >> 0) & 7); |
33568 | AREG((Opcode >> 0) & 7) += 4; |
33569 | PRE_IO |
33570 | READ_LONG_F(adr, src) |
33571 | res = DREGu32((Opcode >> 9) & 7); |
33572 | res &= src; |
33573 | flag_C = 0; |
33574 | flag_V = 0; |
33575 | flag_NotZ = res; |
33576 | flag_N = res >> 24; |
33577 | DREGu32((Opcode >> 9) & 7) = res; |
33578 | POST_IO |
33579 | RET(14) |
33580 | } |
33581 | |
33582 | // ANDaD |
33583 | OPCODE(0xC0A0) |
33584 | { |
33585 | u32 adr, res; |
33586 | u32 src, dst; |
33587 | |
33588 | adr = AREG((Opcode >> 0) & 7) - 4; |
33589 | AREG((Opcode >> 0) & 7) = adr; |
33590 | PRE_IO |
33591 | READ_LONG_F(adr, src) |
33592 | res = DREGu32((Opcode >> 9) & 7); |
33593 | res &= src; |
33594 | flag_C = 0; |
33595 | flag_V = 0; |
33596 | flag_NotZ = res; |
33597 | flag_N = res >> 24; |
33598 | DREGu32((Opcode >> 9) & 7) = res; |
33599 | POST_IO |
33600 | RET(16) |
33601 | } |
33602 | |
33603 | // ANDaD |
33604 | OPCODE(0xC0A8) |
33605 | { |
33606 | u32 adr, res; |
33607 | u32 src, dst; |
33608 | |
33609 | FETCH_SWORD(adr); |
33610 | adr += AREG((Opcode >> 0) & 7); |
33611 | PRE_IO |
33612 | READ_LONG_F(adr, src) |
33613 | res = DREGu32((Opcode >> 9) & 7); |
33614 | res &= src; |
33615 | flag_C = 0; |
33616 | flag_V = 0; |
33617 | flag_NotZ = res; |
33618 | flag_N = res >> 24; |
33619 | DREGu32((Opcode >> 9) & 7) = res; |
33620 | POST_IO |
33621 | RET(18) |
33622 | } |
33623 | |
33624 | // ANDaD |
33625 | OPCODE(0xC0B0) |
33626 | { |
33627 | u32 adr, res; |
33628 | u32 src, dst; |
33629 | |
33630 | adr = AREG((Opcode >> 0) & 7); |
33631 | DECODE_EXT_WORD |
33632 | PRE_IO |
33633 | READ_LONG_F(adr, src) |
33634 | res = DREGu32((Opcode >> 9) & 7); |
33635 | res &= src; |
33636 | flag_C = 0; |
33637 | flag_V = 0; |
33638 | flag_NotZ = res; |
33639 | flag_N = res >> 24; |
33640 | DREGu32((Opcode >> 9) & 7) = res; |
33641 | POST_IO |
33642 | RET(20) |
33643 | } |
33644 | |
33645 | // ANDaD |
33646 | OPCODE(0xC0B8) |
33647 | { |
33648 | u32 adr, res; |
33649 | u32 src, dst; |
33650 | |
33651 | FETCH_SWORD(adr); |
33652 | PRE_IO |
33653 | READ_LONG_F(adr, src) |
33654 | res = DREGu32((Opcode >> 9) & 7); |
33655 | res &= src; |
33656 | flag_C = 0; |
33657 | flag_V = 0; |
33658 | flag_NotZ = res; |
33659 | flag_N = res >> 24; |
33660 | DREGu32((Opcode >> 9) & 7) = res; |
33661 | POST_IO |
33662 | RET(18) |
33663 | } |
33664 | |
33665 | // ANDaD |
33666 | OPCODE(0xC0B9) |
33667 | { |
33668 | u32 adr, res; |
33669 | u32 src, dst; |
33670 | |
33671 | FETCH_LONG(adr); |
33672 | PRE_IO |
33673 | READ_LONG_F(adr, src) |
33674 | res = DREGu32((Opcode >> 9) & 7); |
33675 | res &= src; |
33676 | flag_C = 0; |
33677 | flag_V = 0; |
33678 | flag_NotZ = res; |
33679 | flag_N = res >> 24; |
33680 | DREGu32((Opcode >> 9) & 7) = res; |
33681 | POST_IO |
33682 | RET(22) |
33683 | } |
33684 | |
33685 | // ANDaD |
33686 | OPCODE(0xC0BA) |
33687 | { |
33688 | u32 adr, res; |
33689 | u32 src, dst; |
33690 | |
be26eb23 |
33691 | adr = GET_SWORD + GET_PC; |
70357ce5 |
33692 | PC++; |
33693 | PRE_IO |
33694 | READ_LONG_F(adr, src) |
33695 | res = DREGu32((Opcode >> 9) & 7); |
33696 | res &= src; |
33697 | flag_C = 0; |
33698 | flag_V = 0; |
33699 | flag_NotZ = res; |
33700 | flag_N = res >> 24; |
33701 | DREGu32((Opcode >> 9) & 7) = res; |
33702 | POST_IO |
33703 | RET(18) |
33704 | } |
33705 | |
33706 | // ANDaD |
33707 | OPCODE(0xC0BB) |
33708 | { |
33709 | u32 adr, res; |
33710 | u32 src, dst; |
33711 | |
be26eb23 |
33712 | adr = GET_PC; |
70357ce5 |
33713 | DECODE_EXT_WORD |
33714 | PRE_IO |
33715 | READ_LONG_F(adr, src) |
33716 | res = DREGu32((Opcode >> 9) & 7); |
33717 | res &= src; |
33718 | flag_C = 0; |
33719 | flag_V = 0; |
33720 | flag_NotZ = res; |
33721 | flag_N = res >> 24; |
33722 | DREGu32((Opcode >> 9) & 7) = res; |
33723 | POST_IO |
33724 | RET(20) |
33725 | } |
33726 | |
33727 | // ANDaD |
33728 | OPCODE(0xC0BC) |
33729 | { |
33730 | u32 adr, res; |
33731 | u32 src, dst; |
33732 | |
33733 | FETCH_LONG(src); |
33734 | res = DREGu32((Opcode >> 9) & 7); |
33735 | res &= src; |
33736 | flag_C = 0; |
33737 | flag_V = 0; |
33738 | flag_NotZ = res; |
33739 | flag_N = res >> 24; |
33740 | DREGu32((Opcode >> 9) & 7) = res; |
33741 | RET(16) |
33742 | } |
33743 | |
33744 | // ANDaD |
33745 | OPCODE(0xC09F) |
33746 | { |
33747 | u32 adr, res; |
33748 | u32 src, dst; |
33749 | |
33750 | adr = AREG(7); |
33751 | AREG(7) += 4; |
33752 | PRE_IO |
33753 | READ_LONG_F(adr, src) |
33754 | res = DREGu32((Opcode >> 9) & 7); |
33755 | res &= src; |
33756 | flag_C = 0; |
33757 | flag_V = 0; |
33758 | flag_NotZ = res; |
33759 | flag_N = res >> 24; |
33760 | DREGu32((Opcode >> 9) & 7) = res; |
33761 | POST_IO |
33762 | RET(14) |
33763 | } |
33764 | |
33765 | // ANDaD |
33766 | OPCODE(0xC0A7) |
33767 | { |
33768 | u32 adr, res; |
33769 | u32 src, dst; |
33770 | |
33771 | adr = AREG(7) - 4; |
33772 | AREG(7) = adr; |
33773 | PRE_IO |
33774 | READ_LONG_F(adr, src) |
33775 | res = DREGu32((Opcode >> 9) & 7); |
33776 | res &= src; |
33777 | flag_C = 0; |
33778 | flag_V = 0; |
33779 | flag_NotZ = res; |
33780 | flag_N = res >> 24; |
33781 | DREGu32((Opcode >> 9) & 7) = res; |
33782 | POST_IO |
33783 | RET(16) |
33784 | } |
33785 | |
33786 | // ANDDa |
33787 | OPCODE(0xC110) |
33788 | { |
33789 | u32 adr, res; |
33790 | u32 src, dst; |
33791 | |
33792 | src = DREGu8((Opcode >> 9) & 7); |
33793 | adr = AREG((Opcode >> 0) & 7); |
33794 | PRE_IO |
33795 | READ_BYTE_F(adr, res) |
33796 | res &= src; |
33797 | flag_C = 0; |
33798 | flag_V = 0; |
33799 | flag_NotZ = res; |
33800 | flag_N = res; |
33801 | WRITE_BYTE_F(adr, res) |
33802 | POST_IO |
33803 | RET(12) |
33804 | } |
33805 | |
33806 | // ANDDa |
33807 | OPCODE(0xC118) |
33808 | { |
33809 | u32 adr, res; |
33810 | u32 src, dst; |
33811 | |
33812 | src = DREGu8((Opcode >> 9) & 7); |
33813 | adr = AREG((Opcode >> 0) & 7); |
33814 | AREG((Opcode >> 0) & 7) += 1; |
33815 | PRE_IO |
33816 | READ_BYTE_F(adr, res) |
33817 | res &= src; |
33818 | flag_C = 0; |
33819 | flag_V = 0; |
33820 | flag_NotZ = res; |
33821 | flag_N = res; |
33822 | WRITE_BYTE_F(adr, res) |
33823 | POST_IO |
33824 | RET(12) |
33825 | } |
33826 | |
33827 | // ANDDa |
33828 | OPCODE(0xC120) |
33829 | { |
33830 | u32 adr, res; |
33831 | u32 src, dst; |
33832 | |
33833 | src = DREGu8((Opcode >> 9) & 7); |
33834 | adr = AREG((Opcode >> 0) & 7) - 1; |
33835 | AREG((Opcode >> 0) & 7) = adr; |
33836 | PRE_IO |
33837 | READ_BYTE_F(adr, res) |
33838 | res &= src; |
33839 | flag_C = 0; |
33840 | flag_V = 0; |
33841 | flag_NotZ = res; |
33842 | flag_N = res; |
33843 | WRITE_BYTE_F(adr, res) |
33844 | POST_IO |
33845 | RET(14) |
33846 | } |
33847 | |
33848 | // ANDDa |
33849 | OPCODE(0xC128) |
33850 | { |
33851 | u32 adr, res; |
33852 | u32 src, dst; |
33853 | |
33854 | src = DREGu8((Opcode >> 9) & 7); |
33855 | FETCH_SWORD(adr); |
33856 | adr += AREG((Opcode >> 0) & 7); |
33857 | PRE_IO |
33858 | READ_BYTE_F(adr, res) |
33859 | res &= src; |
33860 | flag_C = 0; |
33861 | flag_V = 0; |
33862 | flag_NotZ = res; |
33863 | flag_N = res; |
33864 | WRITE_BYTE_F(adr, res) |
33865 | POST_IO |
33866 | RET(16) |
33867 | } |
33868 | |
33869 | // ANDDa |
33870 | OPCODE(0xC130) |
33871 | { |
33872 | u32 adr, res; |
33873 | u32 src, dst; |
33874 | |
33875 | src = DREGu8((Opcode >> 9) & 7); |
33876 | adr = AREG((Opcode >> 0) & 7); |
33877 | DECODE_EXT_WORD |
33878 | PRE_IO |
33879 | READ_BYTE_F(adr, res) |
33880 | res &= src; |
33881 | flag_C = 0; |
33882 | flag_V = 0; |
33883 | flag_NotZ = res; |
33884 | flag_N = res; |
33885 | WRITE_BYTE_F(adr, res) |
33886 | POST_IO |
33887 | RET(18) |
33888 | } |
33889 | |
33890 | // ANDDa |
33891 | OPCODE(0xC138) |
33892 | { |
33893 | u32 adr, res; |
33894 | u32 src, dst; |
33895 | |
33896 | src = DREGu8((Opcode >> 9) & 7); |
33897 | FETCH_SWORD(adr); |
33898 | PRE_IO |
33899 | READ_BYTE_F(adr, res) |
33900 | res &= src; |
33901 | flag_C = 0; |
33902 | flag_V = 0; |
33903 | flag_NotZ = res; |
33904 | flag_N = res; |
33905 | WRITE_BYTE_F(adr, res) |
33906 | POST_IO |
33907 | RET(16) |
33908 | } |
33909 | |
33910 | // ANDDa |
33911 | OPCODE(0xC139) |
33912 | { |
33913 | u32 adr, res; |
33914 | u32 src, dst; |
33915 | |
33916 | src = DREGu8((Opcode >> 9) & 7); |
33917 | FETCH_LONG(adr); |
33918 | PRE_IO |
33919 | READ_BYTE_F(adr, res) |
33920 | res &= src; |
33921 | flag_C = 0; |
33922 | flag_V = 0; |
33923 | flag_NotZ = res; |
33924 | flag_N = res; |
33925 | WRITE_BYTE_F(adr, res) |
33926 | POST_IO |
33927 | RET(20) |
33928 | } |
33929 | |
33930 | // ANDDa |
33931 | OPCODE(0xC11F) |
33932 | { |
33933 | u32 adr, res; |
33934 | u32 src, dst; |
33935 | |
33936 | src = DREGu8((Opcode >> 9) & 7); |
33937 | adr = AREG(7); |
33938 | AREG(7) += 2; |
33939 | PRE_IO |
33940 | READ_BYTE_F(adr, res) |
33941 | res &= src; |
33942 | flag_C = 0; |
33943 | flag_V = 0; |
33944 | flag_NotZ = res; |
33945 | flag_N = res; |
33946 | WRITE_BYTE_F(adr, res) |
33947 | POST_IO |
33948 | RET(12) |
33949 | } |
33950 | |
33951 | // ANDDa |
33952 | OPCODE(0xC127) |
33953 | { |
33954 | u32 adr, res; |
33955 | u32 src, dst; |
33956 | |
33957 | src = DREGu8((Opcode >> 9) & 7); |
33958 | adr = AREG(7) - 2; |
33959 | AREG(7) = adr; |
33960 | PRE_IO |
33961 | READ_BYTE_F(adr, res) |
33962 | res &= src; |
33963 | flag_C = 0; |
33964 | flag_V = 0; |
33965 | flag_NotZ = res; |
33966 | flag_N = res; |
33967 | WRITE_BYTE_F(adr, res) |
33968 | POST_IO |
33969 | RET(14) |
33970 | } |
33971 | |
33972 | // ANDDa |
33973 | OPCODE(0xC150) |
33974 | { |
33975 | u32 adr, res; |
33976 | u32 src, dst; |
33977 | |
33978 | src = DREGu16((Opcode >> 9) & 7); |
33979 | adr = AREG((Opcode >> 0) & 7); |
33980 | PRE_IO |
33981 | READ_WORD_F(adr, res) |
33982 | res &= src; |
33983 | flag_C = 0; |
33984 | flag_V = 0; |
33985 | flag_NotZ = res; |
33986 | flag_N = res >> 8; |
33987 | WRITE_WORD_F(adr, res) |
33988 | POST_IO |
33989 | RET(12) |
33990 | } |
33991 | |
33992 | // ANDDa |
33993 | OPCODE(0xC158) |
33994 | { |
33995 | u32 adr, res; |
33996 | u32 src, dst; |
33997 | |
33998 | src = DREGu16((Opcode >> 9) & 7); |
33999 | adr = AREG((Opcode >> 0) & 7); |
34000 | AREG((Opcode >> 0) & 7) += 2; |
34001 | PRE_IO |
34002 | READ_WORD_F(adr, res) |
34003 | res &= src; |
34004 | flag_C = 0; |
34005 | flag_V = 0; |
34006 | flag_NotZ = res; |
34007 | flag_N = res >> 8; |
34008 | WRITE_WORD_F(adr, res) |
34009 | POST_IO |
34010 | RET(12) |
34011 | } |
34012 | |
34013 | // ANDDa |
34014 | OPCODE(0xC160) |
34015 | { |
34016 | u32 adr, res; |
34017 | u32 src, dst; |
34018 | |
34019 | src = DREGu16((Opcode >> 9) & 7); |
34020 | adr = AREG((Opcode >> 0) & 7) - 2; |
34021 | AREG((Opcode >> 0) & 7) = adr; |
34022 | PRE_IO |
34023 | READ_WORD_F(adr, res) |
34024 | res &= src; |
34025 | flag_C = 0; |
34026 | flag_V = 0; |
34027 | flag_NotZ = res; |
34028 | flag_N = res >> 8; |
34029 | WRITE_WORD_F(adr, res) |
34030 | POST_IO |
34031 | RET(14) |
34032 | } |
34033 | |
34034 | // ANDDa |
34035 | OPCODE(0xC168) |
34036 | { |
34037 | u32 adr, res; |
34038 | u32 src, dst; |
34039 | |
34040 | src = DREGu16((Opcode >> 9) & 7); |
34041 | FETCH_SWORD(adr); |
34042 | adr += AREG((Opcode >> 0) & 7); |
34043 | PRE_IO |
34044 | READ_WORD_F(adr, res) |
34045 | res &= src; |
34046 | flag_C = 0; |
34047 | flag_V = 0; |
34048 | flag_NotZ = res; |
34049 | flag_N = res >> 8; |
34050 | WRITE_WORD_F(adr, res) |
34051 | POST_IO |
34052 | RET(16) |
34053 | } |
34054 | |
34055 | // ANDDa |
34056 | OPCODE(0xC170) |
34057 | { |
34058 | u32 adr, res; |
34059 | u32 src, dst; |
34060 | |
34061 | src = DREGu16((Opcode >> 9) & 7); |
34062 | adr = AREG((Opcode >> 0) & 7); |
34063 | DECODE_EXT_WORD |
34064 | PRE_IO |
34065 | READ_WORD_F(adr, res) |
34066 | res &= src; |
34067 | flag_C = 0; |
34068 | flag_V = 0; |
34069 | flag_NotZ = res; |
34070 | flag_N = res >> 8; |
34071 | WRITE_WORD_F(adr, res) |
34072 | POST_IO |
34073 | RET(18) |
34074 | } |
34075 | |
34076 | // ANDDa |
34077 | OPCODE(0xC178) |
34078 | { |
34079 | u32 adr, res; |
34080 | u32 src, dst; |
34081 | |
34082 | src = DREGu16((Opcode >> 9) & 7); |
34083 | FETCH_SWORD(adr); |
34084 | PRE_IO |
34085 | READ_WORD_F(adr, res) |
34086 | res &= src; |
34087 | flag_C = 0; |
34088 | flag_V = 0; |
34089 | flag_NotZ = res; |
34090 | flag_N = res >> 8; |
34091 | WRITE_WORD_F(adr, res) |
34092 | POST_IO |
34093 | RET(16) |
34094 | } |
34095 | |
34096 | // ANDDa |
34097 | OPCODE(0xC179) |
34098 | { |
34099 | u32 adr, res; |
34100 | u32 src, dst; |
34101 | |
34102 | src = DREGu16((Opcode >> 9) & 7); |
34103 | FETCH_LONG(adr); |
34104 | PRE_IO |
34105 | READ_WORD_F(adr, res) |
34106 | res &= src; |
34107 | flag_C = 0; |
34108 | flag_V = 0; |
34109 | flag_NotZ = res; |
34110 | flag_N = res >> 8; |
34111 | WRITE_WORD_F(adr, res) |
34112 | POST_IO |
34113 | RET(20) |
34114 | } |
34115 | |
34116 | // ANDDa |
34117 | OPCODE(0xC15F) |
34118 | { |
34119 | u32 adr, res; |
34120 | u32 src, dst; |
34121 | |
34122 | src = DREGu16((Opcode >> 9) & 7); |
34123 | adr = AREG(7); |
34124 | AREG(7) += 2; |
34125 | PRE_IO |
34126 | READ_WORD_F(adr, res) |
34127 | res &= src; |
34128 | flag_C = 0; |
34129 | flag_V = 0; |
34130 | flag_NotZ = res; |
34131 | flag_N = res >> 8; |
34132 | WRITE_WORD_F(adr, res) |
34133 | POST_IO |
34134 | RET(12) |
34135 | } |
34136 | |
34137 | // ANDDa |
34138 | OPCODE(0xC167) |
34139 | { |
34140 | u32 adr, res; |
34141 | u32 src, dst; |
34142 | |
34143 | src = DREGu16((Opcode >> 9) & 7); |
34144 | adr = AREG(7) - 2; |
34145 | AREG(7) = adr; |
34146 | PRE_IO |
34147 | READ_WORD_F(adr, res) |
34148 | res &= src; |
34149 | flag_C = 0; |
34150 | flag_V = 0; |
34151 | flag_NotZ = res; |
34152 | flag_N = res >> 8; |
34153 | WRITE_WORD_F(adr, res) |
34154 | POST_IO |
34155 | RET(14) |
34156 | } |
34157 | |
34158 | // ANDDa |
34159 | OPCODE(0xC190) |
34160 | { |
34161 | u32 adr, res; |
34162 | u32 src, dst; |
34163 | |
34164 | src = DREGu32((Opcode >> 9) & 7); |
34165 | adr = AREG((Opcode >> 0) & 7); |
34166 | PRE_IO |
34167 | READ_LONG_F(adr, res) |
34168 | res &= src; |
34169 | flag_C = 0; |
34170 | flag_V = 0; |
34171 | flag_NotZ = res; |
34172 | flag_N = res >> 24; |
34173 | WRITE_LONG_F(adr, res) |
34174 | POST_IO |
34175 | RET(20) |
34176 | } |
34177 | |
34178 | // ANDDa |
34179 | OPCODE(0xC198) |
34180 | { |
34181 | u32 adr, res; |
34182 | u32 src, dst; |
34183 | |
34184 | src = DREGu32((Opcode >> 9) & 7); |
34185 | adr = AREG((Opcode >> 0) & 7); |
34186 | AREG((Opcode >> 0) & 7) += 4; |
34187 | PRE_IO |
34188 | READ_LONG_F(adr, res) |
34189 | res &= src; |
34190 | flag_C = 0; |
34191 | flag_V = 0; |
34192 | flag_NotZ = res; |
34193 | flag_N = res >> 24; |
34194 | WRITE_LONG_F(adr, res) |
34195 | POST_IO |
34196 | RET(20) |
34197 | } |
34198 | |
34199 | // ANDDa |
34200 | OPCODE(0xC1A0) |
34201 | { |
34202 | u32 adr, res; |
34203 | u32 src, dst; |
34204 | |
34205 | src = DREGu32((Opcode >> 9) & 7); |
34206 | adr = AREG((Opcode >> 0) & 7) - 4; |
34207 | AREG((Opcode >> 0) & 7) = adr; |
34208 | PRE_IO |
34209 | READ_LONG_F(adr, res) |
34210 | res &= src; |
34211 | flag_C = 0; |
34212 | flag_V = 0; |
34213 | flag_NotZ = res; |
34214 | flag_N = res >> 24; |
34215 | WRITE_LONG_F(adr, res) |
34216 | POST_IO |
34217 | RET(22) |
34218 | } |
34219 | |
34220 | // ANDDa |
34221 | OPCODE(0xC1A8) |
34222 | { |
34223 | u32 adr, res; |
34224 | u32 src, dst; |
34225 | |
34226 | src = DREGu32((Opcode >> 9) & 7); |
34227 | FETCH_SWORD(adr); |
34228 | adr += AREG((Opcode >> 0) & 7); |
34229 | PRE_IO |
34230 | READ_LONG_F(adr, res) |
34231 | res &= src; |
34232 | flag_C = 0; |
34233 | flag_V = 0; |
34234 | flag_NotZ = res; |
34235 | flag_N = res >> 24; |
34236 | WRITE_LONG_F(adr, res) |
34237 | POST_IO |
34238 | RET(24) |
34239 | } |
34240 | |
34241 | // ANDDa |
34242 | OPCODE(0xC1B0) |
34243 | { |
34244 | u32 adr, res; |
34245 | u32 src, dst; |
34246 | |
34247 | src = DREGu32((Opcode >> 9) & 7); |
34248 | adr = AREG((Opcode >> 0) & 7); |
34249 | DECODE_EXT_WORD |
34250 | PRE_IO |
34251 | READ_LONG_F(adr, res) |
34252 | res &= src; |
34253 | flag_C = 0; |
34254 | flag_V = 0; |
34255 | flag_NotZ = res; |
34256 | flag_N = res >> 24; |
34257 | WRITE_LONG_F(adr, res) |
34258 | POST_IO |
34259 | RET(26) |
34260 | } |
34261 | |
34262 | // ANDDa |
34263 | OPCODE(0xC1B8) |
34264 | { |
34265 | u32 adr, res; |
34266 | u32 src, dst; |
34267 | |
34268 | src = DREGu32((Opcode >> 9) & 7); |
34269 | FETCH_SWORD(adr); |
34270 | PRE_IO |
34271 | READ_LONG_F(adr, res) |
34272 | res &= src; |
34273 | flag_C = 0; |
34274 | flag_V = 0; |
34275 | flag_NotZ = res; |
34276 | flag_N = res >> 24; |
34277 | WRITE_LONG_F(adr, res) |
34278 | POST_IO |
34279 | RET(24) |
34280 | } |
34281 | |
34282 | // ANDDa |
34283 | OPCODE(0xC1B9) |
34284 | { |
34285 | u32 adr, res; |
34286 | u32 src, dst; |
34287 | |
34288 | src = DREGu32((Opcode >> 9) & 7); |
34289 | FETCH_LONG(adr); |
34290 | PRE_IO |
34291 | READ_LONG_F(adr, res) |
34292 | res &= src; |
34293 | flag_C = 0; |
34294 | flag_V = 0; |
34295 | flag_NotZ = res; |
34296 | flag_N = res >> 24; |
34297 | WRITE_LONG_F(adr, res) |
34298 | POST_IO |
34299 | RET(28) |
34300 | } |
34301 | |
34302 | // ANDDa |
34303 | OPCODE(0xC19F) |
34304 | { |
34305 | u32 adr, res; |
34306 | u32 src, dst; |
34307 | |
34308 | src = DREGu32((Opcode >> 9) & 7); |
34309 | adr = AREG(7); |
34310 | AREG(7) += 4; |
34311 | PRE_IO |
34312 | READ_LONG_F(adr, res) |
34313 | res &= src; |
34314 | flag_C = 0; |
34315 | flag_V = 0; |
34316 | flag_NotZ = res; |
34317 | flag_N = res >> 24; |
34318 | WRITE_LONG_F(adr, res) |
34319 | POST_IO |
34320 | RET(20) |
34321 | } |
34322 | |
34323 | // ANDDa |
34324 | OPCODE(0xC1A7) |
34325 | { |
34326 | u32 adr, res; |
34327 | u32 src, dst; |
34328 | |
34329 | src = DREGu32((Opcode >> 9) & 7); |
34330 | adr = AREG(7) - 4; |
34331 | AREG(7) = adr; |
34332 | PRE_IO |
34333 | READ_LONG_F(adr, res) |
34334 | res &= src; |
34335 | flag_C = 0; |
34336 | flag_V = 0; |
34337 | flag_NotZ = res; |
34338 | flag_N = res >> 24; |
34339 | WRITE_LONG_F(adr, res) |
34340 | POST_IO |
34341 | RET(22) |
34342 | } |
34343 | |
34344 | // ABCD |
34345 | OPCODE(0xC100) |
34346 | { |
34347 | u32 adr, res; |
34348 | u32 src, dst; |
c6e1e977 |
34349 | u32 corf = 0; |
70357ce5 |
34350 | |
34351 | src = DREGu8((Opcode >> 0) & 7); |
34352 | dst = DREGu8((Opcode >> 9) & 7); |
34353 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
34354 | if (res > 9) corf = 6; |
70357ce5 |
34355 | res += (dst & 0xF0) + (src & 0xF0); |
c6e1e977 |
34356 | flag_V = ~res; |
34357 | res += corf; |
34358 | if (res > 0x9F) |
70357ce5 |
34359 | { |
34360 | res -= 0xA0; |
34361 | flag_X = flag_C = M68K_SR_C; |
34362 | } |
34363 | else flag_X = flag_C = 0; |
c6e1e977 |
34364 | flag_V &= res; |
70357ce5 |
34365 | flag_NotZ |= res & 0xFF; |
34366 | flag_N = res; |
34367 | DREGu8((Opcode >> 9) & 7) = res; |
34368 | RET(6) |
34369 | } |
34370 | |
34371 | // ABCDM |
34372 | OPCODE(0xC108) |
34373 | { |
34374 | u32 adr, res; |
34375 | u32 src, dst; |
c6e1e977 |
34376 | u32 corf = 0; |
70357ce5 |
34377 | |
34378 | adr = AREG((Opcode >> 0) & 7) - 1; |
34379 | AREG((Opcode >> 0) & 7) = adr; |
34380 | PRE_IO |
34381 | READ_BYTE_F(adr, src) |
34382 | adr = AREG((Opcode >> 9) & 7) - 1; |
34383 | AREG((Opcode >> 9) & 7) = adr; |
34384 | READ_BYTE_F(adr, dst) |
34385 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
34386 | if (res > 9) corf = 6; |
70357ce5 |
34387 | res += (dst & 0xF0) + (src & 0xF0); |
c6e1e977 |
34388 | flag_V = ~res; |
34389 | res += corf; |
34390 | if (res > 0x9F) |
70357ce5 |
34391 | { |
34392 | res -= 0xA0; |
34393 | flag_X = flag_C = M68K_SR_C; |
34394 | } |
34395 | else flag_X = flag_C = 0; |
c6e1e977 |
34396 | flag_V &= res; |
70357ce5 |
34397 | flag_NotZ |= res & 0xFF; |
34398 | flag_N = res; |
34399 | WRITE_BYTE_F(adr, res) |
34400 | POST_IO |
34401 | RET(18) |
34402 | } |
34403 | |
34404 | // ABCD7M |
34405 | OPCODE(0xC10F) |
34406 | { |
34407 | u32 adr, res; |
34408 | u32 src, dst; |
c6e1e977 |
34409 | u32 corf = 0; |
70357ce5 |
34410 | |
34411 | adr = AREG(7) - 2; |
34412 | AREG(7) = adr; |
34413 | PRE_IO |
34414 | READ_BYTE_F(adr, src) |
34415 | adr = AREG((Opcode >> 9) & 7) - 1; |
34416 | AREG((Opcode >> 9) & 7) = adr; |
34417 | READ_BYTE_F(adr, dst) |
34418 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
34419 | if (res > 9) corf = 6; |
70357ce5 |
34420 | res += (dst & 0xF0) + (src & 0xF0); |
c6e1e977 |
34421 | flag_V = ~res; |
34422 | res += corf; |
34423 | if (res > 0x9F) |
70357ce5 |
34424 | { |
34425 | res -= 0xA0; |
34426 | flag_X = flag_C = M68K_SR_C; |
34427 | } |
34428 | else flag_X = flag_C = 0; |
c6e1e977 |
34429 | flag_V &= res; |
70357ce5 |
34430 | flag_NotZ |= res & 0xFF; |
34431 | flag_N = res; |
34432 | WRITE_BYTE_F(adr, res) |
34433 | POST_IO |
34434 | RET(18) |
34435 | } |
34436 | |
34437 | // ABCDM7 |
34438 | OPCODE(0xCF08) |
34439 | { |
34440 | u32 adr, res; |
34441 | u32 src, dst; |
c6e1e977 |
34442 | u32 corf = 0; |
70357ce5 |
34443 | |
34444 | adr = AREG((Opcode >> 0) & 7) - 1; |
34445 | AREG((Opcode >> 0) & 7) = adr; |
34446 | PRE_IO |
34447 | READ_BYTE_F(adr, src) |
34448 | adr = AREG(7) - 2; |
34449 | AREG(7) = adr; |
34450 | READ_BYTE_F(adr, dst) |
34451 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
34452 | if (res > 9) corf = 6; |
70357ce5 |
34453 | res += (dst & 0xF0) + (src & 0xF0); |
c6e1e977 |
34454 | flag_V = ~res; |
34455 | res += corf; |
34456 | if (res > 0x9F) |
70357ce5 |
34457 | { |
34458 | res -= 0xA0; |
34459 | flag_X = flag_C = M68K_SR_C; |
34460 | } |
34461 | else flag_X = flag_C = 0; |
c6e1e977 |
34462 | flag_V &= res; |
70357ce5 |
34463 | flag_NotZ |= res & 0xFF; |
34464 | flag_N = res; |
34465 | WRITE_BYTE_F(adr, res) |
34466 | POST_IO |
34467 | RET(18) |
34468 | } |
34469 | |
34470 | // ABCD7M7 |
34471 | OPCODE(0xCF0F) |
34472 | { |
34473 | u32 adr, res; |
34474 | u32 src, dst; |
c6e1e977 |
34475 | u32 corf = 0; |
70357ce5 |
34476 | |
34477 | adr = AREG(7) - 2; |
34478 | AREG(7) = adr; |
34479 | PRE_IO |
34480 | READ_BYTE_F(adr, src) |
34481 | adr = AREG(7) - 2; |
34482 | AREG(7) = adr; |
34483 | READ_BYTE_F(adr, dst) |
34484 | res = (dst & 0xF) + (src & 0xF) + ((flag_X >> M68K_SR_X_SFT) & 1); |
c6e1e977 |
34485 | if (res > 9) corf = 6; |
70357ce5 |
34486 | res += (dst & 0xF0) + (src & 0xF0); |
c6e1e977 |
34487 | flag_V = ~res; |
34488 | res += corf; |
34489 | if (res > 0x9F) |
70357ce5 |
34490 | { |
34491 | res -= 0xA0; |
34492 | flag_X = flag_C = M68K_SR_C; |
34493 | } |
34494 | else flag_X = flag_C = 0; |
c6e1e977 |
34495 | flag_V &= res; |
70357ce5 |
34496 | flag_NotZ |= res & 0xFF; |
34497 | flag_N = res; |
34498 | WRITE_BYTE_F(adr, res) |
34499 | POST_IO |
34500 | RET(18) |
34501 | } |
34502 | |
34503 | // MULU |
34504 | OPCODE(0xC0C0) |
34505 | { |
34506 | u32 adr, res; |
34507 | u32 src, dst; |
34508 | |
34509 | src = DREGu16((Opcode >> 0) & 7); |
34510 | res = DREGu16((Opcode >> 9) & 7); |
34511 | res *= src; |
34512 | flag_N = res >> 24; |
34513 | flag_NotZ = res; |
34514 | flag_V = flag_C = 0; |
34515 | DREGu32((Opcode >> 9) & 7) = res; |
34516 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34517 | RET(38+BITCOUNT(res,src)*2) |
70357ce5 |
34518 | #else |
34519 | RET(50) |
34520 | #endif |
34521 | } |
34522 | |
34523 | // MULU |
34524 | OPCODE(0xC0D0) |
34525 | { |
34526 | u32 adr, res; |
34527 | u32 src, dst; |
34528 | |
34529 | adr = AREG((Opcode >> 0) & 7); |
34530 | PRE_IO |
34531 | READ_WORD_F(adr, src) |
34532 | res = DREGu16((Opcode >> 9) & 7); |
34533 | res *= src; |
34534 | flag_N = res >> 24; |
34535 | flag_NotZ = res; |
34536 | flag_V = flag_C = 0; |
34537 | DREGu32((Opcode >> 9) & 7) = res; |
34538 | POST_IO |
34539 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34540 | RET(42+BITCOUNT(res,src)*2) |
70357ce5 |
34541 | #else |
34542 | RET(54) |
34543 | #endif |
34544 | } |
34545 | |
34546 | // MULU |
34547 | OPCODE(0xC0D8) |
34548 | { |
34549 | u32 adr, res; |
34550 | u32 src, dst; |
34551 | |
34552 | adr = AREG((Opcode >> 0) & 7); |
34553 | AREG((Opcode >> 0) & 7) += 2; |
34554 | PRE_IO |
34555 | READ_WORD_F(adr, src) |
34556 | res = DREGu16((Opcode >> 9) & 7); |
34557 | res *= src; |
34558 | flag_N = res >> 24; |
34559 | flag_NotZ = res; |
34560 | flag_V = flag_C = 0; |
34561 | DREGu32((Opcode >> 9) & 7) = res; |
34562 | POST_IO |
34563 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34564 | RET(42+BITCOUNT(res,src)*2) |
70357ce5 |
34565 | #else |
34566 | RET(54) |
34567 | #endif |
34568 | } |
34569 | |
34570 | // MULU |
34571 | OPCODE(0xC0E0) |
34572 | { |
34573 | u32 adr, res; |
34574 | u32 src, dst; |
34575 | |
34576 | adr = AREG((Opcode >> 0) & 7) - 2; |
34577 | AREG((Opcode >> 0) & 7) = adr; |
34578 | PRE_IO |
34579 | READ_WORD_F(adr, src) |
34580 | res = DREGu16((Opcode >> 9) & 7); |
34581 | res *= src; |
34582 | flag_N = res >> 24; |
34583 | flag_NotZ = res; |
34584 | flag_V = flag_C = 0; |
34585 | DREGu32((Opcode >> 9) & 7) = res; |
34586 | POST_IO |
34587 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34588 | RET(44+BITCOUNT(res,src)*2) |
70357ce5 |
34589 | #else |
34590 | RET(56) |
34591 | #endif |
34592 | } |
34593 | |
34594 | // MULU |
34595 | OPCODE(0xC0E8) |
34596 | { |
34597 | u32 adr, res; |
34598 | u32 src, dst; |
34599 | |
34600 | FETCH_SWORD(adr); |
34601 | adr += AREG((Opcode >> 0) & 7); |
34602 | PRE_IO |
34603 | READ_WORD_F(adr, src) |
34604 | res = DREGu16((Opcode >> 9) & 7); |
34605 | res *= src; |
34606 | flag_N = res >> 24; |
34607 | flag_NotZ = res; |
34608 | flag_V = flag_C = 0; |
34609 | DREGu32((Opcode >> 9) & 7) = res; |
34610 | POST_IO |
34611 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34612 | RET(46+BITCOUNT(res,src)*2) |
70357ce5 |
34613 | #else |
34614 | RET(58) |
34615 | #endif |
34616 | } |
34617 | |
34618 | // MULU |
34619 | OPCODE(0xC0F0) |
34620 | { |
34621 | u32 adr, res; |
34622 | u32 src, dst; |
34623 | |
34624 | adr = AREG((Opcode >> 0) & 7); |
34625 | DECODE_EXT_WORD |
34626 | PRE_IO |
34627 | READ_WORD_F(adr, src) |
34628 | res = DREGu16((Opcode >> 9) & 7); |
34629 | res *= src; |
34630 | flag_N = res >> 24; |
34631 | flag_NotZ = res; |
34632 | flag_V = flag_C = 0; |
34633 | DREGu32((Opcode >> 9) & 7) = res; |
34634 | POST_IO |
34635 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34636 | RET(48+BITCOUNT(res,src)*2) |
70357ce5 |
34637 | #else |
34638 | RET(60) |
34639 | #endif |
34640 | } |
34641 | |
34642 | // MULU |
34643 | OPCODE(0xC0F8) |
34644 | { |
34645 | u32 adr, res; |
34646 | u32 src, dst; |
34647 | |
34648 | FETCH_SWORD(adr); |
34649 | PRE_IO |
34650 | READ_WORD_F(adr, src) |
34651 | res = DREGu16((Opcode >> 9) & 7); |
34652 | res *= src; |
34653 | flag_N = res >> 24; |
34654 | flag_NotZ = res; |
34655 | flag_V = flag_C = 0; |
34656 | DREGu32((Opcode >> 9) & 7) = res; |
34657 | POST_IO |
34658 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34659 | RET(46+BITCOUNT(res,src)*2) |
70357ce5 |
34660 | #else |
34661 | RET(58) |
34662 | #endif |
34663 | } |
34664 | |
34665 | // MULU |
34666 | OPCODE(0xC0F9) |
34667 | { |
34668 | u32 adr, res; |
34669 | u32 src, dst; |
34670 | |
34671 | FETCH_LONG(adr); |
34672 | PRE_IO |
34673 | READ_WORD_F(adr, src) |
34674 | res = DREGu16((Opcode >> 9) & 7); |
34675 | res *= src; |
34676 | flag_N = res >> 24; |
34677 | flag_NotZ = res; |
34678 | flag_V = flag_C = 0; |
34679 | DREGu32((Opcode >> 9) & 7) = res; |
34680 | POST_IO |
34681 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34682 | RET(50+BITCOUNT(res,src)*2) |
70357ce5 |
34683 | #else |
34684 | RET(62) |
34685 | #endif |
34686 | } |
34687 | |
34688 | // MULU |
34689 | OPCODE(0xC0FA) |
34690 | { |
34691 | u32 adr, res; |
34692 | u32 src, dst; |
34693 | |
be26eb23 |
34694 | adr = GET_SWORD + GET_PC; |
70357ce5 |
34695 | PC++; |
34696 | PRE_IO |
34697 | READ_WORD_F(adr, src) |
34698 | res = DREGu16((Opcode >> 9) & 7); |
34699 | res *= src; |
34700 | flag_N = res >> 24; |
34701 | flag_NotZ = res; |
34702 | flag_V = flag_C = 0; |
34703 | DREGu32((Opcode >> 9) & 7) = res; |
34704 | POST_IO |
34705 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34706 | RET(46+BITCOUNT(res,src)*2) |
70357ce5 |
34707 | #else |
34708 | RET(58) |
34709 | #endif |
34710 | } |
34711 | |
34712 | // MULU |
34713 | OPCODE(0xC0FB) |
34714 | { |
34715 | u32 adr, res; |
34716 | u32 src, dst; |
34717 | |
be26eb23 |
34718 | adr = GET_PC; |
70357ce5 |
34719 | DECODE_EXT_WORD |
34720 | PRE_IO |
34721 | READ_WORD_F(adr, src) |
34722 | res = DREGu16((Opcode >> 9) & 7); |
34723 | res *= src; |
34724 | flag_N = res >> 24; |
34725 | flag_NotZ = res; |
34726 | flag_V = flag_C = 0; |
34727 | DREGu32((Opcode >> 9) & 7) = res; |
34728 | POST_IO |
34729 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34730 | RET(48+BITCOUNT(res,src)*2) |
70357ce5 |
34731 | #else |
34732 | RET(60) |
34733 | #endif |
34734 | } |
34735 | |
34736 | // MULU |
34737 | OPCODE(0xC0FC) |
34738 | { |
34739 | u32 adr, res; |
34740 | u32 src, dst; |
34741 | |
34742 | FETCH_WORD(src); |
34743 | res = DREGu16((Opcode >> 9) & 7); |
34744 | res *= src; |
34745 | flag_N = res >> 24; |
34746 | flag_NotZ = res; |
34747 | flag_V = flag_C = 0; |
34748 | DREGu32((Opcode >> 9) & 7) = res; |
34749 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34750 | RET(42+BITCOUNT(res,src)*2) |
70357ce5 |
34751 | #else |
34752 | RET(54) |
34753 | #endif |
34754 | } |
34755 | |
34756 | // MULU |
34757 | OPCODE(0xC0DF) |
34758 | { |
34759 | u32 adr, res; |
34760 | u32 src, dst; |
34761 | |
34762 | adr = AREG(7); |
34763 | AREG(7) += 2; |
34764 | PRE_IO |
34765 | READ_WORD_F(adr, src) |
34766 | res = DREGu16((Opcode >> 9) & 7); |
34767 | res *= src; |
34768 | flag_N = res >> 24; |
34769 | flag_NotZ = res; |
34770 | flag_V = flag_C = 0; |
34771 | DREGu32((Opcode >> 9) & 7) = res; |
34772 | POST_IO |
34773 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34774 | RET(42+BITCOUNT(res,src)*2) |
70357ce5 |
34775 | #else |
34776 | RET(54) |
34777 | #endif |
34778 | } |
34779 | |
34780 | // MULU |
34781 | OPCODE(0xC0E7) |
34782 | { |
34783 | u32 adr, res; |
34784 | u32 src, dst; |
34785 | |
34786 | adr = AREG(7) - 2; |
34787 | AREG(7) = adr; |
34788 | PRE_IO |
34789 | READ_WORD_F(adr, src) |
34790 | res = DREGu16((Opcode >> 9) & 7); |
34791 | res *= src; |
34792 | flag_N = res >> 24; |
34793 | flag_NotZ = res; |
34794 | flag_V = flag_C = 0; |
34795 | DREGu32((Opcode >> 9) & 7) = res; |
34796 | POST_IO |
34797 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34798 | RET(44+BITCOUNT(res,src)*2) |
70357ce5 |
34799 | #else |
34800 | RET(56) |
34801 | #endif |
34802 | } |
34803 | |
34804 | // MULS |
34805 | OPCODE(0xC1C0) |
34806 | { |
34807 | u32 adr, res; |
34808 | u32 src, dst; |
34809 | |
34810 | src = (s32)DREGs16((Opcode >> 0) & 7); |
34811 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34812 | res = ((s32)res) * ((s32)src); |
34813 | flag_N = res >> 24; |
34814 | flag_NotZ = res; |
34815 | flag_V = flag_C = 0; |
34816 | DREGu32((Opcode >> 9) & 7) = res; |
34817 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34818 | RET(38+BITCOUNT(res,src^(src<<1))) |
70357ce5 |
34819 | #else |
34820 | RET(50) |
34821 | #endif |
34822 | } |
34823 | |
34824 | // MULS |
34825 | OPCODE(0xC1D0) |
34826 | { |
34827 | u32 adr, res; |
34828 | u32 src, dst; |
34829 | |
34830 | adr = AREG((Opcode >> 0) & 7); |
34831 | PRE_IO |
34832 | READSX_WORD_F(adr, src) |
34833 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34834 | res = ((s32)res) * ((s32)src); |
34835 | flag_N = res >> 24; |
34836 | flag_NotZ = res; |
34837 | flag_V = flag_C = 0; |
34838 | DREGu32((Opcode >> 9) & 7) = res; |
34839 | POST_IO |
34840 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34841 | RET(42+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
34842 | #else |
34843 | RET(54) |
34844 | #endif |
34845 | } |
34846 | |
34847 | // MULS |
34848 | OPCODE(0xC1D8) |
34849 | { |
34850 | u32 adr, res; |
34851 | u32 src, dst; |
34852 | |
34853 | adr = AREG((Opcode >> 0) & 7); |
34854 | AREG((Opcode >> 0) & 7) += 2; |
34855 | PRE_IO |
34856 | READSX_WORD_F(adr, src) |
34857 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34858 | res = ((s32)res) * ((s32)src); |
34859 | flag_N = res >> 24; |
34860 | flag_NotZ = res; |
34861 | flag_V = flag_C = 0; |
34862 | DREGu32((Opcode >> 9) & 7) = res; |
34863 | POST_IO |
34864 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34865 | RET(42+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
34866 | #else |
34867 | RET(54) |
34868 | #endif |
34869 | } |
34870 | |
34871 | // MULS |
34872 | OPCODE(0xC1E0) |
34873 | { |
34874 | u32 adr, res; |
34875 | u32 src, dst; |
34876 | |
34877 | adr = AREG((Opcode >> 0) & 7) - 2; |
34878 | AREG((Opcode >> 0) & 7) = adr; |
34879 | PRE_IO |
34880 | READSX_WORD_F(adr, src) |
34881 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34882 | res = ((s32)res) * ((s32)src); |
34883 | flag_N = res >> 24; |
34884 | flag_NotZ = res; |
34885 | flag_V = flag_C = 0; |
34886 | DREGu32((Opcode >> 9) & 7) = res; |
34887 | POST_IO |
34888 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34889 | RET(44+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
34890 | #else |
34891 | RET(56) |
34892 | #endif |
34893 | } |
34894 | |
34895 | // MULS |
34896 | OPCODE(0xC1E8) |
34897 | { |
34898 | u32 adr, res; |
34899 | u32 src, dst; |
34900 | |
34901 | FETCH_SWORD(adr); |
34902 | adr += AREG((Opcode >> 0) & 7); |
34903 | PRE_IO |
34904 | READSX_WORD_F(adr, src) |
34905 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34906 | res = ((s32)res) * ((s32)src); |
34907 | flag_N = res >> 24; |
34908 | flag_NotZ = res; |
34909 | flag_V = flag_C = 0; |
34910 | DREGu32((Opcode >> 9) & 7) = res; |
34911 | POST_IO |
34912 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34913 | RET(46+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
34914 | #else |
34915 | RET(58) |
34916 | #endif |
34917 | } |
34918 | |
34919 | // MULS |
34920 | OPCODE(0xC1F0) |
34921 | { |
34922 | u32 adr, res; |
34923 | u32 src, dst; |
34924 | |
34925 | adr = AREG((Opcode >> 0) & 7); |
34926 | DECODE_EXT_WORD |
34927 | PRE_IO |
34928 | READSX_WORD_F(adr, src) |
34929 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34930 | res = ((s32)res) * ((s32)src); |
34931 | flag_N = res >> 24; |
34932 | flag_NotZ = res; |
34933 | flag_V = flag_C = 0; |
34934 | DREGu32((Opcode >> 9) & 7) = res; |
34935 | POST_IO |
34936 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34937 | RET(48+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
34938 | #else |
34939 | RET(60) |
34940 | #endif |
34941 | } |
34942 | |
34943 | // MULS |
34944 | OPCODE(0xC1F8) |
34945 | { |
34946 | u32 adr, res; |
34947 | u32 src, dst; |
34948 | |
34949 | FETCH_SWORD(adr); |
34950 | PRE_IO |
34951 | READSX_WORD_F(adr, src) |
34952 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34953 | res = ((s32)res) * ((s32)src); |
34954 | flag_N = res >> 24; |
34955 | flag_NotZ = res; |
34956 | flag_V = flag_C = 0; |
34957 | DREGu32((Opcode >> 9) & 7) = res; |
34958 | POST_IO |
34959 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34960 | RET(46+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
34961 | #else |
34962 | RET(58) |
34963 | #endif |
34964 | } |
34965 | |
34966 | // MULS |
34967 | OPCODE(0xC1F9) |
34968 | { |
34969 | u32 adr, res; |
34970 | u32 src, dst; |
34971 | |
34972 | FETCH_LONG(adr); |
34973 | PRE_IO |
34974 | READSX_WORD_F(adr, src) |
34975 | res = (s32)DREGs16((Opcode >> 9) & 7); |
34976 | res = ((s32)res) * ((s32)src); |
34977 | flag_N = res >> 24; |
34978 | flag_NotZ = res; |
34979 | flag_V = flag_C = 0; |
34980 | DREGu32((Opcode >> 9) & 7) = res; |
34981 | POST_IO |
34982 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
34983 | RET(50+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
34984 | #else |
34985 | RET(62) |
34986 | #endif |
34987 | } |
34988 | |
34989 | // MULS |
34990 | OPCODE(0xC1FA) |
34991 | { |
34992 | u32 adr, res; |
34993 | u32 src, dst; |
34994 | |
be26eb23 |
34995 | adr = GET_SWORD + GET_PC; |
70357ce5 |
34996 | PC++; |
34997 | PRE_IO |
34998 | READSX_WORD_F(adr, src) |
34999 | res = (s32)DREGs16((Opcode >> 9) & 7); |
35000 | res = ((s32)res) * ((s32)src); |
35001 | flag_N = res >> 24; |
35002 | flag_NotZ = res; |
35003 | flag_V = flag_C = 0; |
35004 | DREGu32((Opcode >> 9) & 7) = res; |
35005 | POST_IO |
35006 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
35007 | RET(46+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
35008 | #else |
35009 | RET(58) |
35010 | #endif |
35011 | } |
35012 | |
35013 | // MULS |
35014 | OPCODE(0xC1FB) |
35015 | { |
35016 | u32 adr, res; |
35017 | u32 src, dst; |
35018 | |
be26eb23 |
35019 | adr = GET_PC; |
70357ce5 |
35020 | DECODE_EXT_WORD |
35021 | PRE_IO |
35022 | READSX_WORD_F(adr, src) |
35023 | res = (s32)DREGs16((Opcode >> 9) & 7); |
35024 | res = ((s32)res) * ((s32)src); |
35025 | flag_N = res >> 24; |
35026 | flag_NotZ = res; |
35027 | flag_V = flag_C = 0; |
35028 | DREGu32((Opcode >> 9) & 7) = res; |
35029 | POST_IO |
35030 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
35031 | RET(48+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
35032 | #else |
35033 | RET(60) |
35034 | #endif |
35035 | } |
35036 | |
35037 | // MULS |
35038 | OPCODE(0xC1FC) |
35039 | { |
35040 | u32 adr, res; |
35041 | u32 src, dst; |
35042 | |
35043 | FETCH_SWORD(src); |
35044 | res = (s32)DREGs16((Opcode >> 9) & 7); |
35045 | res = ((s32)res) * ((s32)src); |
35046 | flag_N = res >> 24; |
35047 | flag_NotZ = res; |
35048 | flag_V = flag_C = 0; |
35049 | DREGu32((Opcode >> 9) & 7) = res; |
35050 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
35051 | RET(42+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
35052 | #else |
35053 | RET(54) |
35054 | #endif |
35055 | } |
35056 | |
35057 | // MULS |
35058 | OPCODE(0xC1DF) |
35059 | { |
35060 | u32 adr, res; |
35061 | u32 src, dst; |
35062 | |
35063 | adr = AREG(7); |
35064 | AREG(7) += 2; |
35065 | PRE_IO |
35066 | READSX_WORD_F(adr, src) |
35067 | res = (s32)DREGs16((Opcode >> 9) & 7); |
35068 | res = ((s32)res) * ((s32)src); |
35069 | flag_N = res >> 24; |
35070 | flag_NotZ = res; |
35071 | flag_V = flag_C = 0; |
35072 | DREGu32((Opcode >> 9) & 7) = res; |
35073 | POST_IO |
35074 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
35075 | RET(42+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
35076 | #else |
35077 | RET(54) |
35078 | #endif |
35079 | } |
35080 | |
35081 | // MULS |
35082 | OPCODE(0xC1E7) |
35083 | { |
35084 | u32 adr, res; |
35085 | u32 src, dst; |
35086 | |
35087 | adr = AREG(7) - 2; |
35088 | AREG(7) = adr; |
35089 | PRE_IO |
35090 | READSX_WORD_F(adr, src) |
35091 | res = (s32)DREGs16((Opcode >> 9) & 7); |
35092 | res = ((s32)res) * ((s32)src); |
35093 | flag_N = res >> 24; |
35094 | flag_NotZ = res; |
35095 | flag_V = flag_C = 0; |
35096 | DREGu32((Opcode >> 9) & 7) = res; |
35097 | POST_IO |
35098 | #ifdef USE_CYCLONE_TIMING |
3f591822 |
35099 | RET(44+BITCOUNT(res,src^(src<<1))*2) |
70357ce5 |
35100 | #else |
35101 | RET(56) |
35102 | #endif |
35103 | } |
35104 | |
35105 | // EXGDD |
35106 | OPCODE(0xC140) |
35107 | { |
35108 | u32 adr, res; |
35109 | u32 src, dst; |
35110 | |
35111 | res = DREGu32((Opcode >> 0) & 7); |
35112 | src = DREGu32((Opcode >> 9) & 7); |
35113 | DREGu32((Opcode >> 9) & 7) = res; |
35114 | res = src; |
35115 | DREGu32((Opcode >> 0) & 7) = res; |
35116 | RET(6) |
35117 | } |
35118 | |
35119 | // EXGAA |
35120 | OPCODE(0xC148) |
35121 | { |
35122 | u32 adr, res; |
35123 | u32 src, dst; |
35124 | |
35125 | res = AREGu32((Opcode >> 0) & 7); |
35126 | src = AREGu32((Opcode >> 9) & 7); |
35127 | AREG((Opcode >> 9) & 7) = res; |
35128 | res = src; |
35129 | AREG((Opcode >> 0) & 7) = res; |
35130 | RET(6) |
35131 | } |
35132 | |
35133 | // EXGAD |
35134 | OPCODE(0xC188) |
35135 | { |
35136 | u32 adr, res; |
35137 | u32 src, dst; |
35138 | |
35139 | res = AREGu32((Opcode >> 0) & 7); |
35140 | src = DREGu32((Opcode >> 9) & 7); |
35141 | DREGu32((Opcode >> 9) & 7) = res; |
35142 | res = src; |
35143 | AREG((Opcode >> 0) & 7) = res; |
35144 | RET(6) |
35145 | } |
35146 | |
35147 | // ADDaD |
35148 | OPCODE(0xD000) |
35149 | { |
35150 | u32 adr, res; |
35151 | u32 src, dst; |
35152 | |
35153 | src = DREGu8((Opcode >> 0) & 7); |
35154 | dst = DREGu8((Opcode >> 9) & 7); |
35155 | res = dst + src; |
35156 | flag_N = flag_X = flag_C = res; |
35157 | flag_V = (src ^ res) & (dst ^ res); |
35158 | flag_NotZ = res & 0xFF; |
35159 | DREGu8((Opcode >> 9) & 7) = res; |
35160 | RET(4) |
35161 | } |
35162 | |
35163 | // ADDaD |
03e4f2a3 |
35164 | #if 0 |
70357ce5 |
35165 | OPCODE(0xD008) |
35166 | { |
35167 | u32 adr, res; |
35168 | u32 src, dst; |
35169 | |
35170 | // can't read byte from Ax registers ! |
7669591e |
35171 | ctx->execinfo |= M68K_FAULTED; |
35172 | ctx->io_cycle_counter = 0; |
70357ce5 |
35173 | /* |
35174 | goto famec_Exec_End; |
35175 | dst = DREGu8((Opcode >> 9) & 7); |
35176 | res = dst + src; |
35177 | flag_N = flag_X = flag_C = res; |
35178 | flag_V = (src ^ res) & (dst ^ res); |
35179 | flag_NotZ = res & 0xFF; |
35180 | DREGu8((Opcode >> 9) & 7) = res; |
35181 | */ |
35182 | RET(4) |
35183 | } |
03e4f2a3 |
35184 | #endif |
70357ce5 |
35185 | |
35186 | // ADDaD |
35187 | OPCODE(0xD010) |
35188 | { |
35189 | u32 adr, res; |
35190 | u32 src, dst; |
35191 | |
35192 | adr = AREG((Opcode >> 0) & 7); |
35193 | PRE_IO |
35194 | READ_BYTE_F(adr, src) |
35195 | dst = DREGu8((Opcode >> 9) & 7); |
35196 | res = dst + src; |
35197 | flag_N = flag_X = flag_C = res; |
35198 | flag_V = (src ^ res) & (dst ^ res); |
35199 | flag_NotZ = res & 0xFF; |
35200 | DREGu8((Opcode >> 9) & 7) = res; |
35201 | POST_IO |
35202 | RET(8) |
35203 | } |
35204 | |
35205 | // ADDaD |
35206 | OPCODE(0xD018) |
35207 | { |
35208 | u32 adr, res; |
35209 | u32 src, dst; |
35210 | |
35211 | adr = AREG((Opcode >> 0) & 7); |
35212 | AREG((Opcode >> 0) & 7) += 1; |
35213 | PRE_IO |
35214 | READ_BYTE_F(adr, src) |
35215 | dst = DREGu8((Opcode >> 9) & 7); |
35216 | res = dst + src; |
35217 | flag_N = flag_X = flag_C = res; |
35218 | flag_V = (src ^ res) & (dst ^ res); |
35219 | flag_NotZ = res & 0xFF; |
35220 | DREGu8((Opcode >> 9) & 7) = res; |
35221 | POST_IO |
35222 | RET(8) |
35223 | } |
35224 | |
35225 | // ADDaD |
35226 | OPCODE(0xD020) |
35227 | { |
35228 | u32 adr, res; |
35229 | u32 src, dst; |
35230 | |
35231 | adr = AREG((Opcode >> 0) & 7) - 1; |
35232 | AREG((Opcode >> 0) & 7) = adr; |
35233 | PRE_IO |
35234 | READ_BYTE_F(adr, src) |
35235 | dst = DREGu8((Opcode >> 9) & 7); |
35236 | res = dst + src; |
35237 | flag_N = flag_X = flag_C = res; |
35238 | flag_V = (src ^ res) & (dst ^ res); |
35239 | flag_NotZ = res & 0xFF; |
35240 | DREGu8((Opcode >> 9) & 7) = res; |
35241 | POST_IO |
35242 | RET(10) |
35243 | } |
35244 | |
35245 | // ADDaD |
35246 | OPCODE(0xD028) |
35247 | { |
35248 | u32 adr, res; |
35249 | u32 src, dst; |
35250 | |
35251 | FETCH_SWORD(adr); |
35252 | adr += AREG((Opcode >> 0) & 7); |
35253 | PRE_IO |
35254 | READ_BYTE_F(adr, src) |
35255 | dst = DREGu8((Opcode >> 9) & 7); |
35256 | res = dst + src; |
35257 | flag_N = flag_X = flag_C = res; |
35258 | flag_V = (src ^ res) & (dst ^ res); |
35259 | flag_NotZ = res & 0xFF; |
35260 | DREGu8((Opcode >> 9) & 7) = res; |
35261 | POST_IO |
35262 | RET(12) |
35263 | } |
35264 | |
35265 | // ADDaD |
35266 | OPCODE(0xD030) |
35267 | { |
35268 | u32 adr, res; |
35269 | u32 src, dst; |
35270 | |
35271 | adr = AREG((Opcode >> 0) & 7); |
35272 | DECODE_EXT_WORD |
35273 | PRE_IO |
35274 | READ_BYTE_F(adr, src) |
35275 | dst = DREGu8((Opcode >> 9) & 7); |
35276 | res = dst + src; |
35277 | flag_N = flag_X = flag_C = res; |
35278 | flag_V = (src ^ res) & (dst ^ res); |
35279 | flag_NotZ = res & 0xFF; |
35280 | DREGu8((Opcode >> 9) & 7) = res; |
35281 | POST_IO |
35282 | RET(14) |
35283 | } |
35284 | |
35285 | // ADDaD |
35286 | OPCODE(0xD038) |
35287 | { |
35288 | u32 adr, res; |
35289 | u32 src, dst; |
35290 | |
35291 | FETCH_SWORD(adr); |
35292 | PRE_IO |
35293 | READ_BYTE_F(adr, src) |
35294 | dst = DREGu8((Opcode >> 9) & 7); |
35295 | res = dst + src; |
35296 | flag_N = flag_X = flag_C = res; |
35297 | flag_V = (src ^ res) & (dst ^ res); |
35298 | flag_NotZ = res & 0xFF; |
35299 | DREGu8((Opcode >> 9) & 7) = res; |
35300 | POST_IO |
35301 | RET(12) |
35302 | } |
35303 | |
35304 | // ADDaD |
35305 | OPCODE(0xD039) |
35306 | { |
35307 | u32 adr, res; |
35308 | u32 src, dst; |
35309 | |
35310 | FETCH_LONG(adr); |
35311 | PRE_IO |
35312 | READ_BYTE_F(adr, src) |
35313 | dst = DREGu8((Opcode >> 9) & 7); |
35314 | res = dst + src; |
35315 | flag_N = flag_X = flag_C = res; |
35316 | flag_V = (src ^ res) & (dst ^ res); |
35317 | flag_NotZ = res & 0xFF; |
35318 | DREGu8((Opcode >> 9) & 7) = res; |
35319 | POST_IO |
35320 | RET(16) |
35321 | } |
35322 | |
35323 | // ADDaD |
35324 | OPCODE(0xD03A) |
35325 | { |
35326 | u32 adr, res; |
35327 | u32 src, dst; |
35328 | |
be26eb23 |
35329 | adr = GET_SWORD + GET_PC; |
70357ce5 |
35330 | PC++; |
35331 | PRE_IO |
35332 | READ_BYTE_F(adr, src) |
35333 | dst = DREGu8((Opcode >> 9) & 7); |
35334 | res = dst + src; |
35335 | flag_N = flag_X = flag_C = res; |
35336 | flag_V = (src ^ res) & (dst ^ res); |
35337 | flag_NotZ = res & 0xFF; |
35338 | DREGu8((Opcode >> 9) & 7) = res; |
35339 | POST_IO |
35340 | RET(12) |
35341 | } |
35342 | |
35343 | // ADDaD |
35344 | OPCODE(0xD03B) |
35345 | { |
35346 | u32 adr, res; |
35347 | u32 src, dst; |
35348 | |
be26eb23 |
35349 | adr = GET_PC; |
70357ce5 |
35350 | DECODE_EXT_WORD |
35351 | PRE_IO |
35352 | READ_BYTE_F(adr, src) |
35353 | dst = DREGu8((Opcode >> 9) & 7); |
35354 | res = dst + src; |
35355 | flag_N = flag_X = flag_C = res; |
35356 | flag_V = (src ^ res) & (dst ^ res); |
35357 | flag_NotZ = res & 0xFF; |
35358 | DREGu8((Opcode >> 9) & 7) = res; |
35359 | POST_IO |
35360 | RET(14) |
35361 | } |
35362 | |
35363 | // ADDaD |
35364 | OPCODE(0xD03C) |
35365 | { |
35366 | u32 adr, res; |
35367 | u32 src, dst; |
35368 | |
35369 | FETCH_BYTE(src); |
35370 | dst = DREGu8((Opcode >> 9) & 7); |
35371 | res = dst + src; |
35372 | flag_N = flag_X = flag_C = res; |
35373 | flag_V = (src ^ res) & (dst ^ res); |
35374 | flag_NotZ = res & 0xFF; |
35375 | DREGu8((Opcode >> 9) & 7) = res; |
35376 | RET(8) |
35377 | } |
35378 | |
35379 | // ADDaD |
35380 | OPCODE(0xD01F) |
35381 | { |
35382 | u32 adr, res; |
35383 | u32 src, dst; |
35384 | |
35385 | adr = AREG(7); |
35386 | AREG(7) += 2; |
35387 | PRE_IO |
35388 | READ_BYTE_F(adr, src) |
35389 | dst = DREGu8((Opcode >> 9) & 7); |
35390 | res = dst + src; |
35391 | flag_N = flag_X = flag_C = res; |
35392 | flag_V = (src ^ res) & (dst ^ res); |
35393 | flag_NotZ = res & 0xFF; |
35394 | DREGu8((Opcode >> 9) & 7) = res; |
35395 | POST_IO |
35396 | RET(8) |
35397 | } |
35398 | |
35399 | // ADDaD |
35400 | OPCODE(0xD027) |
35401 | { |
35402 | u32 adr, res; |
35403 | u32 src, dst; |
35404 | |
35405 | adr = AREG(7) - 2; |
35406 | AREG(7) = adr; |
35407 | PRE_IO |
35408 | READ_BYTE_F(adr, src) |
35409 | dst = DREGu8((Opcode >> 9) & 7); |
35410 | res = dst + src; |
35411 | flag_N = flag_X = flag_C = res; |
35412 | flag_V = (src ^ res) & (dst ^ res); |
35413 | flag_NotZ = res & 0xFF; |
35414 | DREGu8((Opcode >> 9) & 7) = res; |
35415 | POST_IO |
35416 | RET(10) |
35417 | } |
35418 | |
35419 | // ADDaD |
35420 | OPCODE(0xD040) |
35421 | { |
35422 | u32 adr, res; |
35423 | u32 src, dst; |
35424 | |
35425 | src = DREGu16((Opcode >> 0) & 7); |
35426 | dst = DREGu16((Opcode >> 9) & 7); |
35427 | res = dst + src; |
35428 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35429 | flag_N = flag_X = flag_C = res >> 8; |
35430 | flag_NotZ = res & 0xFFFF; |
35431 | DREGu16((Opcode >> 9) & 7) = res; |
35432 | RET(4) |
35433 | } |
35434 | |
35435 | // ADDaD |
35436 | OPCODE(0xD048) |
35437 | { |
35438 | u32 adr, res; |
35439 | u32 src, dst; |
35440 | |
35441 | src = AREGu16((Opcode >> 0) & 7); |
35442 | dst = DREGu16((Opcode >> 9) & 7); |
35443 | res = dst + src; |
35444 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35445 | flag_N = flag_X = flag_C = res >> 8; |
35446 | flag_NotZ = res & 0xFFFF; |
35447 | DREGu16((Opcode >> 9) & 7) = res; |
35448 | RET(4) |
35449 | } |
35450 | |
35451 | // ADDaD |
35452 | OPCODE(0xD050) |
35453 | { |
35454 | u32 adr, res; |
35455 | u32 src, dst; |
35456 | |
35457 | adr = AREG((Opcode >> 0) & 7); |
35458 | PRE_IO |
35459 | READ_WORD_F(adr, src) |
35460 | dst = DREGu16((Opcode >> 9) & 7); |
35461 | res = dst + src; |
35462 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35463 | flag_N = flag_X = flag_C = res >> 8; |
35464 | flag_NotZ = res & 0xFFFF; |
35465 | DREGu16((Opcode >> 9) & 7) = res; |
35466 | POST_IO |
35467 | RET(8) |
35468 | } |
35469 | |
35470 | // ADDaD |
35471 | OPCODE(0xD058) |
35472 | { |
35473 | u32 adr, res; |
35474 | u32 src, dst; |
35475 | |
35476 | adr = AREG((Opcode >> 0) & 7); |
35477 | AREG((Opcode >> 0) & 7) += 2; |
35478 | PRE_IO |
35479 | READ_WORD_F(adr, src) |
35480 | dst = DREGu16((Opcode >> 9) & 7); |
35481 | res = dst + src; |
35482 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35483 | flag_N = flag_X = flag_C = res >> 8; |
35484 | flag_NotZ = res & 0xFFFF; |
35485 | DREGu16((Opcode >> 9) & 7) = res; |
35486 | POST_IO |
35487 | RET(8) |
35488 | } |
35489 | |
35490 | // ADDaD |
35491 | OPCODE(0xD060) |
35492 | { |
35493 | u32 adr, res; |
35494 | u32 src, dst; |
35495 | |
35496 | adr = AREG((Opcode >> 0) & 7) - 2; |
35497 | AREG((Opcode >> 0) & 7) = adr; |
35498 | PRE_IO |
35499 | READ_WORD_F(adr, src) |
35500 | dst = DREGu16((Opcode >> 9) & 7); |
35501 | res = dst + src; |
35502 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35503 | flag_N = flag_X = flag_C = res >> 8; |
35504 | flag_NotZ = res & 0xFFFF; |
35505 | DREGu16((Opcode >> 9) & 7) = res; |
35506 | POST_IO |
35507 | RET(10) |
35508 | } |
35509 | |
35510 | // ADDaD |
35511 | OPCODE(0xD068) |
35512 | { |
35513 | u32 adr, res; |
35514 | u32 src, dst; |
35515 | |
35516 | FETCH_SWORD(adr); |
35517 | adr += AREG((Opcode >> 0) & 7); |
35518 | PRE_IO |
35519 | READ_WORD_F(adr, src) |
35520 | dst = DREGu16((Opcode >> 9) & 7); |
35521 | res = dst + src; |
35522 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35523 | flag_N = flag_X = flag_C = res >> 8; |
35524 | flag_NotZ = res & 0xFFFF; |
35525 | DREGu16((Opcode >> 9) & 7) = res; |
35526 | POST_IO |
35527 | RET(12) |
35528 | } |
35529 | |
35530 | // ADDaD |
35531 | OPCODE(0xD070) |
35532 | { |
35533 | u32 adr, res; |
35534 | u32 src, dst; |
35535 | |
35536 | adr = AREG((Opcode >> 0) & 7); |
35537 | DECODE_EXT_WORD |
35538 | PRE_IO |
35539 | READ_WORD_F(adr, src) |
35540 | dst = DREGu16((Opcode >> 9) & 7); |
35541 | res = dst + src; |
35542 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35543 | flag_N = flag_X = flag_C = res >> 8; |
35544 | flag_NotZ = res & 0xFFFF; |
35545 | DREGu16((Opcode >> 9) & 7) = res; |
35546 | POST_IO |
35547 | RET(14) |
35548 | } |
35549 | |
35550 | // ADDaD |
35551 | OPCODE(0xD078) |
35552 | { |
35553 | u32 adr, res; |
35554 | u32 src, dst; |
35555 | |
35556 | FETCH_SWORD(adr); |
35557 | PRE_IO |
35558 | READ_WORD_F(adr, src) |
35559 | dst = DREGu16((Opcode >> 9) & 7); |
35560 | res = dst + src; |
35561 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35562 | flag_N = flag_X = flag_C = res >> 8; |
35563 | flag_NotZ = res & 0xFFFF; |
35564 | DREGu16((Opcode >> 9) & 7) = res; |
35565 | POST_IO |
35566 | RET(12) |
35567 | } |
35568 | |
35569 | // ADDaD |
35570 | OPCODE(0xD079) |
35571 | { |
35572 | u32 adr, res; |
35573 | u32 src, dst; |
35574 | |
35575 | FETCH_LONG(adr); |
35576 | PRE_IO |
35577 | READ_WORD_F(adr, src) |
35578 | dst = DREGu16((Opcode >> 9) & 7); |
35579 | res = dst + src; |
35580 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35581 | flag_N = flag_X = flag_C = res >> 8; |
35582 | flag_NotZ = res & 0xFFFF; |
35583 | DREGu16((Opcode >> 9) & 7) = res; |
35584 | POST_IO |
35585 | RET(16) |
35586 | } |
35587 | |
35588 | // ADDaD |
35589 | OPCODE(0xD07A) |
35590 | { |
35591 | u32 adr, res; |
35592 | u32 src, dst; |
35593 | |
be26eb23 |
35594 | adr = GET_SWORD + GET_PC; |
70357ce5 |
35595 | PC++; |
35596 | PRE_IO |
35597 | READ_WORD_F(adr, src) |
35598 | dst = DREGu16((Opcode >> 9) & 7); |
35599 | res = dst + src; |
35600 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35601 | flag_N = flag_X = flag_C = res >> 8; |
35602 | flag_NotZ = res & 0xFFFF; |
35603 | DREGu16((Opcode >> 9) & 7) = res; |
35604 | POST_IO |
35605 | RET(12) |
35606 | } |
35607 | |
35608 | // ADDaD |
35609 | OPCODE(0xD07B) |
35610 | { |
35611 | u32 adr, res; |
35612 | u32 src, dst; |
35613 | |
be26eb23 |
35614 | adr = GET_PC; |
70357ce5 |
35615 | DECODE_EXT_WORD |
35616 | PRE_IO |
35617 | READ_WORD_F(adr, src) |
35618 | dst = DREGu16((Opcode >> 9) & 7); |
35619 | res = dst + src; |
35620 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35621 | flag_N = flag_X = flag_C = res >> 8; |
35622 | flag_NotZ = res & 0xFFFF; |
35623 | DREGu16((Opcode >> 9) & 7) = res; |
35624 | POST_IO |
35625 | RET(14) |
35626 | } |
35627 | |
35628 | // ADDaD |
35629 | OPCODE(0xD07C) |
35630 | { |
35631 | u32 adr, res; |
35632 | u32 src, dst; |
35633 | |
35634 | FETCH_WORD(src); |
35635 | dst = DREGu16((Opcode >> 9) & 7); |
35636 | res = dst + src; |
35637 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35638 | flag_N = flag_X = flag_C = res >> 8; |
35639 | flag_NotZ = res & 0xFFFF; |
35640 | DREGu16((Opcode >> 9) & 7) = res; |
35641 | RET(8) |
35642 | } |
35643 | |
35644 | // ADDaD |
35645 | OPCODE(0xD05F) |
35646 | { |
35647 | u32 adr, res; |
35648 | u32 src, dst; |
35649 | |
35650 | adr = AREG(7); |
35651 | AREG(7) += 2; |
35652 | PRE_IO |
35653 | READ_WORD_F(adr, src) |
35654 | dst = DREGu16((Opcode >> 9) & 7); |
35655 | res = dst + src; |
35656 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35657 | flag_N = flag_X = flag_C = res >> 8; |
35658 | flag_NotZ = res & 0xFFFF; |
35659 | DREGu16((Opcode >> 9) & 7) = res; |
35660 | POST_IO |
35661 | RET(8) |
35662 | } |
35663 | |
35664 | // ADDaD |
35665 | OPCODE(0xD067) |
35666 | { |
35667 | u32 adr, res; |
35668 | u32 src, dst; |
35669 | |
35670 | adr = AREG(7) - 2; |
35671 | AREG(7) = adr; |
35672 | PRE_IO |
35673 | READ_WORD_F(adr, src) |
35674 | dst = DREGu16((Opcode >> 9) & 7); |
35675 | res = dst + src; |
35676 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
35677 | flag_N = flag_X = flag_C = res >> 8; |
35678 | flag_NotZ = res & 0xFFFF; |
35679 | DREGu16((Opcode >> 9) & 7) = res; |
35680 | POST_IO |
35681 | RET(10) |
35682 | } |
35683 | |
35684 | // ADDaD |
35685 | OPCODE(0xD080) |
35686 | { |
35687 | u32 adr, res; |
35688 | u32 src, dst; |
35689 | |
35690 | src = DREGu32((Opcode >> 0) & 7); |
35691 | dst = DREGu32((Opcode >> 9) & 7); |
35692 | res = dst + src; |
35693 | flag_NotZ = res; |
35694 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35695 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35696 | flag_N = res >> 24; |
35697 | DREGu32((Opcode >> 9) & 7) = res; |
35698 | RET(8) |
35699 | } |
35700 | |
35701 | // ADDaD |
35702 | OPCODE(0xD088) |
35703 | { |
35704 | u32 adr, res; |
35705 | u32 src, dst; |
35706 | |
35707 | src = AREGu32((Opcode >> 0) & 7); |
35708 | dst = DREGu32((Opcode >> 9) & 7); |
35709 | res = dst + src; |
35710 | flag_NotZ = res; |
35711 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35712 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35713 | flag_N = res >> 24; |
35714 | DREGu32((Opcode >> 9) & 7) = res; |
35715 | RET(8) |
35716 | } |
35717 | |
35718 | // ADDaD |
35719 | OPCODE(0xD090) |
35720 | { |
35721 | u32 adr, res; |
35722 | u32 src, dst; |
35723 | |
35724 | adr = AREG((Opcode >> 0) & 7); |
35725 | PRE_IO |
35726 | READ_LONG_F(adr, src) |
35727 | dst = DREGu32((Opcode >> 9) & 7); |
35728 | res = dst + src; |
35729 | flag_NotZ = res; |
35730 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35731 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35732 | flag_N = res >> 24; |
35733 | DREGu32((Opcode >> 9) & 7) = res; |
35734 | POST_IO |
35735 | RET(14) |
35736 | } |
35737 | |
35738 | // ADDaD |
35739 | OPCODE(0xD098) |
35740 | { |
35741 | u32 adr, res; |
35742 | u32 src, dst; |
35743 | |
35744 | adr = AREG((Opcode >> 0) & 7); |
35745 | AREG((Opcode >> 0) & 7) += 4; |
35746 | PRE_IO |
35747 | READ_LONG_F(adr, src) |
35748 | dst = DREGu32((Opcode >> 9) & 7); |
35749 | res = dst + src; |
35750 | flag_NotZ = res; |
35751 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35752 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35753 | flag_N = res >> 24; |
35754 | DREGu32((Opcode >> 9) & 7) = res; |
35755 | POST_IO |
35756 | RET(14) |
35757 | } |
35758 | |
35759 | // ADDaD |
35760 | OPCODE(0xD0A0) |
35761 | { |
35762 | u32 adr, res; |
35763 | u32 src, dst; |
35764 | |
35765 | adr = AREG((Opcode >> 0) & 7) - 4; |
35766 | AREG((Opcode >> 0) & 7) = adr; |
35767 | PRE_IO |
35768 | READ_LONG_F(adr, src) |
35769 | dst = DREGu32((Opcode >> 9) & 7); |
35770 | res = dst + src; |
35771 | flag_NotZ = res; |
35772 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35773 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35774 | flag_N = res >> 24; |
35775 | DREGu32((Opcode >> 9) & 7) = res; |
35776 | POST_IO |
35777 | RET(16) |
35778 | } |
35779 | |
35780 | // ADDaD |
35781 | OPCODE(0xD0A8) |
35782 | { |
35783 | u32 adr, res; |
35784 | u32 src, dst; |
35785 | |
35786 | FETCH_SWORD(adr); |
35787 | adr += AREG((Opcode >> 0) & 7); |
35788 | PRE_IO |
35789 | READ_LONG_F(adr, src) |
35790 | dst = DREGu32((Opcode >> 9) & 7); |
35791 | res = dst + src; |
35792 | flag_NotZ = res; |
35793 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35794 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35795 | flag_N = res >> 24; |
35796 | DREGu32((Opcode >> 9) & 7) = res; |
35797 | POST_IO |
35798 | RET(18) |
35799 | } |
35800 | |
35801 | // ADDaD |
35802 | OPCODE(0xD0B0) |
35803 | { |
35804 | u32 adr, res; |
35805 | u32 src, dst; |
35806 | |
35807 | adr = AREG((Opcode >> 0) & 7); |
35808 | DECODE_EXT_WORD |
35809 | PRE_IO |
35810 | READ_LONG_F(adr, src) |
35811 | dst = DREGu32((Opcode >> 9) & 7); |
35812 | res = dst + src; |
35813 | flag_NotZ = res; |
35814 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35815 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35816 | flag_N = res >> 24; |
35817 | DREGu32((Opcode >> 9) & 7) = res; |
35818 | POST_IO |
35819 | RET(20) |
35820 | } |
35821 | |
35822 | // ADDaD |
35823 | OPCODE(0xD0B8) |
35824 | { |
35825 | u32 adr, res; |
35826 | u32 src, dst; |
35827 | |
35828 | FETCH_SWORD(adr); |
35829 | PRE_IO |
35830 | READ_LONG_F(adr, src) |
35831 | dst = DREGu32((Opcode >> 9) & 7); |
35832 | res = dst + src; |
35833 | flag_NotZ = res; |
35834 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35835 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35836 | flag_N = res >> 24; |
35837 | DREGu32((Opcode >> 9) & 7) = res; |
35838 | POST_IO |
35839 | RET(18) |
35840 | } |
35841 | |
35842 | // ADDaD |
35843 | OPCODE(0xD0B9) |
35844 | { |
35845 | u32 adr, res; |
35846 | u32 src, dst; |
35847 | |
35848 | FETCH_LONG(adr); |
35849 | PRE_IO |
35850 | READ_LONG_F(adr, src) |
35851 | dst = DREGu32((Opcode >> 9) & 7); |
35852 | res = dst + src; |
35853 | flag_NotZ = res; |
35854 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35855 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35856 | flag_N = res >> 24; |
35857 | DREGu32((Opcode >> 9) & 7) = res; |
35858 | POST_IO |
35859 | RET(22) |
35860 | } |
35861 | |
35862 | // ADDaD |
35863 | OPCODE(0xD0BA) |
35864 | { |
35865 | u32 adr, res; |
35866 | u32 src, dst; |
35867 | |
be26eb23 |
35868 | adr = GET_SWORD + GET_PC; |
70357ce5 |
35869 | PC++; |
35870 | PRE_IO |
35871 | READ_LONG_F(adr, src) |
35872 | dst = DREGu32((Opcode >> 9) & 7); |
35873 | res = dst + src; |
35874 | flag_NotZ = res; |
35875 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35876 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35877 | flag_N = res >> 24; |
35878 | DREGu32((Opcode >> 9) & 7) = res; |
35879 | POST_IO |
35880 | RET(18) |
35881 | } |
35882 | |
35883 | // ADDaD |
35884 | OPCODE(0xD0BB) |
35885 | { |
35886 | u32 adr, res; |
35887 | u32 src, dst; |
35888 | |
be26eb23 |
35889 | adr = GET_PC; |
70357ce5 |
35890 | DECODE_EXT_WORD |
35891 | PRE_IO |
35892 | READ_LONG_F(adr, src) |
35893 | dst = DREGu32((Opcode >> 9) & 7); |
35894 | res = dst + src; |
35895 | flag_NotZ = res; |
35896 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35897 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35898 | flag_N = res >> 24; |
35899 | DREGu32((Opcode >> 9) & 7) = res; |
35900 | POST_IO |
35901 | RET(20) |
35902 | } |
35903 | |
35904 | // ADDaD |
35905 | OPCODE(0xD0BC) |
35906 | { |
35907 | u32 adr, res; |
35908 | u32 src, dst; |
35909 | |
35910 | FETCH_LONG(src); |
35911 | dst = DREGu32((Opcode >> 9) & 7); |
35912 | res = dst + src; |
35913 | flag_NotZ = res; |
35914 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35915 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35916 | flag_N = res >> 24; |
35917 | DREGu32((Opcode >> 9) & 7) = res; |
35918 | RET(16) |
35919 | } |
35920 | |
35921 | // ADDaD |
35922 | OPCODE(0xD09F) |
35923 | { |
35924 | u32 adr, res; |
35925 | u32 src, dst; |
35926 | |
35927 | adr = AREG(7); |
35928 | AREG(7) += 4; |
35929 | PRE_IO |
35930 | READ_LONG_F(adr, src) |
35931 | dst = DREGu32((Opcode >> 9) & 7); |
35932 | res = dst + src; |
35933 | flag_NotZ = res; |
35934 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35935 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35936 | flag_N = res >> 24; |
35937 | DREGu32((Opcode >> 9) & 7) = res; |
35938 | POST_IO |
35939 | RET(14) |
35940 | } |
35941 | |
35942 | // ADDaD |
35943 | OPCODE(0xD0A7) |
35944 | { |
35945 | u32 adr, res; |
35946 | u32 src, dst; |
35947 | |
35948 | adr = AREG(7) - 4; |
35949 | AREG(7) = adr; |
35950 | PRE_IO |
35951 | READ_LONG_F(adr, src) |
35952 | dst = DREGu32((Opcode >> 9) & 7); |
35953 | res = dst + src; |
35954 | flag_NotZ = res; |
35955 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
35956 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
35957 | flag_N = res >> 24; |
35958 | DREGu32((Opcode >> 9) & 7) = res; |
35959 | POST_IO |
35960 | RET(16) |
35961 | } |
35962 | |
35963 | // ADDDa |
35964 | OPCODE(0xD110) |
35965 | { |
35966 | u32 adr, res; |
35967 | u32 src, dst; |
35968 | |
35969 | src = DREGu8((Opcode >> 9) & 7); |
35970 | adr = AREG((Opcode >> 0) & 7); |
35971 | PRE_IO |
35972 | READ_BYTE_F(adr, dst) |
35973 | res = dst + src; |
35974 | flag_N = flag_X = flag_C = res; |
35975 | flag_V = (src ^ res) & (dst ^ res); |
35976 | flag_NotZ = res & 0xFF; |
35977 | WRITE_BYTE_F(adr, res) |
35978 | POST_IO |
35979 | RET(12) |
35980 | } |
35981 | |
35982 | // ADDDa |
35983 | OPCODE(0xD118) |
35984 | { |
35985 | u32 adr, res; |
35986 | u32 src, dst; |
35987 | |
35988 | src = DREGu8((Opcode >> 9) & 7); |
35989 | adr = AREG((Opcode >> 0) & 7); |
35990 | AREG((Opcode >> 0) & 7) += 1; |
35991 | PRE_IO |
35992 | READ_BYTE_F(adr, dst) |
35993 | res = dst + src; |
35994 | flag_N = flag_X = flag_C = res; |
35995 | flag_V = (src ^ res) & (dst ^ res); |
35996 | flag_NotZ = res & 0xFF; |
35997 | WRITE_BYTE_F(adr, res) |
35998 | POST_IO |
35999 | RET(12) |
36000 | } |
36001 | |
36002 | // ADDDa |
36003 | OPCODE(0xD120) |
36004 | { |
36005 | u32 adr, res; |
36006 | u32 src, dst; |
36007 | |
36008 | src = DREGu8((Opcode >> 9) & 7); |
36009 | adr = AREG((Opcode >> 0) & 7) - 1; |
36010 | AREG((Opcode >> 0) & 7) = adr; |
36011 | PRE_IO |
36012 | READ_BYTE_F(adr, dst) |
36013 | res = dst + src; |
36014 | flag_N = flag_X = flag_C = res; |
36015 | flag_V = (src ^ res) & (dst ^ res); |
36016 | flag_NotZ = res & 0xFF; |
36017 | WRITE_BYTE_F(adr, res) |
36018 | POST_IO |
36019 | RET(14) |
36020 | } |
36021 | |
36022 | // ADDDa |
36023 | OPCODE(0xD128) |
36024 | { |
36025 | u32 adr, res; |
36026 | u32 src, dst; |
36027 | |
36028 | src = DREGu8((Opcode >> 9) & 7); |
36029 | FETCH_SWORD(adr); |
36030 | adr += AREG((Opcode >> 0) & 7); |
36031 | PRE_IO |
36032 | READ_BYTE_F(adr, dst) |
36033 | res = dst + src; |
36034 | flag_N = flag_X = flag_C = res; |
36035 | flag_V = (src ^ res) & (dst ^ res); |
36036 | flag_NotZ = res & 0xFF; |
36037 | WRITE_BYTE_F(adr, res) |
36038 | POST_IO |
36039 | RET(16) |
36040 | } |
36041 | |
36042 | // ADDDa |
36043 | OPCODE(0xD130) |
36044 | { |
36045 | u32 adr, res; |
36046 | u32 src, dst; |
36047 | |
36048 | src = DREGu8((Opcode >> 9) & 7); |
36049 | adr = AREG((Opcode >> 0) & 7); |
36050 | DECODE_EXT_WORD |
36051 | PRE_IO |
36052 | READ_BYTE_F(adr, dst) |
36053 | res = dst + src; |
36054 | flag_N = flag_X = flag_C = res; |
36055 | flag_V = (src ^ res) & (dst ^ res); |
36056 | flag_NotZ = res & 0xFF; |
36057 | WRITE_BYTE_F(adr, res) |
36058 | POST_IO |
36059 | RET(18) |
36060 | } |
36061 | |
36062 | // ADDDa |
36063 | OPCODE(0xD138) |
36064 | { |
36065 | u32 adr, res; |
36066 | u32 src, dst; |
36067 | |
36068 | src = DREGu8((Opcode >> 9) & 7); |
36069 | FETCH_SWORD(adr); |
36070 | PRE_IO |
36071 | READ_BYTE_F(adr, dst) |
36072 | res = dst + src; |
36073 | flag_N = flag_X = flag_C = res; |
36074 | flag_V = (src ^ res) & (dst ^ res); |
36075 | flag_NotZ = res & 0xFF; |
36076 | WRITE_BYTE_F(adr, res) |
36077 | POST_IO |
36078 | RET(16) |
36079 | } |
36080 | |
36081 | // ADDDa |
36082 | OPCODE(0xD139) |
36083 | { |
36084 | u32 adr, res; |
36085 | u32 src, dst; |
36086 | |
36087 | src = DREGu8((Opcode >> 9) & 7); |
36088 | FETCH_LONG(adr); |
36089 | PRE_IO |
36090 | READ_BYTE_F(adr, dst) |
36091 | res = dst + src; |
36092 | flag_N = flag_X = flag_C = res; |
36093 | flag_V = (src ^ res) & (dst ^ res); |
36094 | flag_NotZ = res & 0xFF; |
36095 | WRITE_BYTE_F(adr, res) |
36096 | POST_IO |
36097 | RET(20) |
36098 | } |
36099 | |
36100 | // ADDDa |
36101 | OPCODE(0xD11F) |
36102 | { |
36103 | u32 adr, res; |
36104 | u32 src, dst; |
36105 | |
36106 | src = DREGu8((Opcode >> 9) & 7); |
36107 | adr = AREG(7); |
36108 | AREG(7) += 2; |
36109 | PRE_IO |
36110 | READ_BYTE_F(adr, dst) |
36111 | res = dst + src; |
36112 | flag_N = flag_X = flag_C = res; |
36113 | flag_V = (src ^ res) & (dst ^ res); |
36114 | flag_NotZ = res & 0xFF; |
36115 | WRITE_BYTE_F(adr, res) |
36116 | POST_IO |
36117 | RET(12) |
36118 | } |
36119 | |
36120 | // ADDDa |
36121 | OPCODE(0xD127) |
36122 | { |
36123 | u32 adr, res; |
36124 | u32 src, dst; |
36125 | |
36126 | src = DREGu8((Opcode >> 9) & 7); |
36127 | adr = AREG(7) - 2; |
36128 | AREG(7) = adr; |
36129 | PRE_IO |
36130 | READ_BYTE_F(adr, dst) |
36131 | res = dst + src; |
36132 | flag_N = flag_X = flag_C = res; |
36133 | flag_V = (src ^ res) & (dst ^ res); |
36134 | flag_NotZ = res & 0xFF; |
36135 | WRITE_BYTE_F(adr, res) |
36136 | POST_IO |
36137 | RET(14) |
36138 | } |
36139 | |
36140 | // ADDDa |
36141 | OPCODE(0xD150) |
36142 | { |
36143 | u32 adr, res; |
36144 | u32 src, dst; |
36145 | |
36146 | src = DREGu16((Opcode >> 9) & 7); |
36147 | adr = AREG((Opcode >> 0) & 7); |
36148 | PRE_IO |
36149 | READ_WORD_F(adr, dst) |
36150 | res = dst + src; |
36151 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36152 | flag_N = flag_X = flag_C = res >> 8; |
36153 | flag_NotZ = res & 0xFFFF; |
36154 | WRITE_WORD_F(adr, res) |
36155 | POST_IO |
36156 | RET(12) |
36157 | } |
36158 | |
36159 | // ADDDa |
36160 | OPCODE(0xD158) |
36161 | { |
36162 | u32 adr, res; |
36163 | u32 src, dst; |
36164 | |
36165 | src = DREGu16((Opcode >> 9) & 7); |
36166 | adr = AREG((Opcode >> 0) & 7); |
36167 | AREG((Opcode >> 0) & 7) += 2; |
36168 | PRE_IO |
36169 | READ_WORD_F(adr, dst) |
36170 | res = dst + src; |
36171 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36172 | flag_N = flag_X = flag_C = res >> 8; |
36173 | flag_NotZ = res & 0xFFFF; |
36174 | WRITE_WORD_F(adr, res) |
36175 | POST_IO |
36176 | RET(12) |
36177 | } |
36178 | |
36179 | // ADDDa |
36180 | OPCODE(0xD160) |
36181 | { |
36182 | u32 adr, res; |
36183 | u32 src, dst; |
36184 | |
36185 | src = DREGu16((Opcode >> 9) & 7); |
36186 | adr = AREG((Opcode >> 0) & 7) - 2; |
36187 | AREG((Opcode >> 0) & 7) = adr; |
36188 | PRE_IO |
36189 | READ_WORD_F(adr, dst) |
36190 | res = dst + src; |
36191 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36192 | flag_N = flag_X = flag_C = res >> 8; |
36193 | flag_NotZ = res & 0xFFFF; |
36194 | WRITE_WORD_F(adr, res) |
36195 | POST_IO |
36196 | RET(14) |
36197 | } |
36198 | |
36199 | // ADDDa |
36200 | OPCODE(0xD168) |
36201 | { |
36202 | u32 adr, res; |
36203 | u32 src, dst; |
36204 | |
36205 | src = DREGu16((Opcode >> 9) & 7); |
36206 | FETCH_SWORD(adr); |
36207 | adr += AREG((Opcode >> 0) & 7); |
36208 | PRE_IO |
36209 | READ_WORD_F(adr, dst) |
36210 | res = dst + src; |
36211 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36212 | flag_N = flag_X = flag_C = res >> 8; |
36213 | flag_NotZ = res & 0xFFFF; |
36214 | WRITE_WORD_F(adr, res) |
36215 | POST_IO |
36216 | RET(16) |
36217 | } |
36218 | |
36219 | // ADDDa |
36220 | OPCODE(0xD170) |
36221 | { |
36222 | u32 adr, res; |
36223 | u32 src, dst; |
36224 | |
36225 | src = DREGu16((Opcode >> 9) & 7); |
36226 | adr = AREG((Opcode >> 0) & 7); |
36227 | DECODE_EXT_WORD |
36228 | PRE_IO |
36229 | READ_WORD_F(adr, dst) |
36230 | res = dst + src; |
36231 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36232 | flag_N = flag_X = flag_C = res >> 8; |
36233 | flag_NotZ = res & 0xFFFF; |
36234 | WRITE_WORD_F(adr, res) |
36235 | POST_IO |
36236 | RET(18) |
36237 | } |
36238 | |
36239 | // ADDDa |
36240 | OPCODE(0xD178) |
36241 | { |
36242 | u32 adr, res; |
36243 | u32 src, dst; |
36244 | |
36245 | src = DREGu16((Opcode >> 9) & 7); |
36246 | FETCH_SWORD(adr); |
36247 | PRE_IO |
36248 | READ_WORD_F(adr, dst) |
36249 | res = dst + src; |
36250 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36251 | flag_N = flag_X = flag_C = res >> 8; |
36252 | flag_NotZ = res & 0xFFFF; |
36253 | WRITE_WORD_F(adr, res) |
36254 | POST_IO |
36255 | RET(16) |
36256 | } |
36257 | |
36258 | // ADDDa |
36259 | OPCODE(0xD179) |
36260 | { |
36261 | u32 adr, res; |
36262 | u32 src, dst; |
36263 | |
36264 | src = DREGu16((Opcode >> 9) & 7); |
36265 | FETCH_LONG(adr); |
36266 | PRE_IO |
36267 | READ_WORD_F(adr, dst) |
36268 | res = dst + src; |
36269 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36270 | flag_N = flag_X = flag_C = res >> 8; |
36271 | flag_NotZ = res & 0xFFFF; |
36272 | WRITE_WORD_F(adr, res) |
36273 | POST_IO |
36274 | RET(20) |
36275 | } |
36276 | |
36277 | // ADDDa |
36278 | OPCODE(0xD15F) |
36279 | { |
36280 | u32 adr, res; |
36281 | u32 src, dst; |
36282 | |
36283 | src = DREGu16((Opcode >> 9) & 7); |
36284 | adr = AREG(7); |
36285 | AREG(7) += 2; |
36286 | PRE_IO |
36287 | READ_WORD_F(adr, dst) |
36288 | res = dst + src; |
36289 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36290 | flag_N = flag_X = flag_C = res >> 8; |
36291 | flag_NotZ = res & 0xFFFF; |
36292 | WRITE_WORD_F(adr, res) |
36293 | POST_IO |
36294 | RET(12) |
36295 | } |
36296 | |
36297 | // ADDDa |
36298 | OPCODE(0xD167) |
36299 | { |
36300 | u32 adr, res; |
36301 | u32 src, dst; |
36302 | |
36303 | src = DREGu16((Opcode >> 9) & 7); |
36304 | adr = AREG(7) - 2; |
36305 | AREG(7) = adr; |
36306 | PRE_IO |
36307 | READ_WORD_F(adr, dst) |
36308 | res = dst + src; |
36309 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36310 | flag_N = flag_X = flag_C = res >> 8; |
36311 | flag_NotZ = res & 0xFFFF; |
36312 | WRITE_WORD_F(adr, res) |
36313 | POST_IO |
36314 | RET(14) |
36315 | } |
36316 | |
36317 | // ADDDa |
36318 | OPCODE(0xD190) |
36319 | { |
36320 | u32 adr, res; |
36321 | u32 src, dst; |
36322 | |
36323 | src = DREGu32((Opcode >> 9) & 7); |
36324 | adr = AREG((Opcode >> 0) & 7); |
36325 | PRE_IO |
36326 | READ_LONG_F(adr, dst) |
36327 | res = dst + src; |
36328 | flag_NotZ = res; |
36329 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36330 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36331 | flag_N = res >> 24; |
36332 | WRITE_LONG_F(adr, res) |
36333 | POST_IO |
36334 | RET(20) |
36335 | } |
36336 | |
36337 | // ADDDa |
36338 | OPCODE(0xD198) |
36339 | { |
36340 | u32 adr, res; |
36341 | u32 src, dst; |
36342 | |
36343 | src = DREGu32((Opcode >> 9) & 7); |
36344 | adr = AREG((Opcode >> 0) & 7); |
36345 | AREG((Opcode >> 0) & 7) += 4; |
36346 | PRE_IO |
36347 | READ_LONG_F(adr, dst) |
36348 | res = dst + src; |
36349 | flag_NotZ = res; |
36350 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36351 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36352 | flag_N = res >> 24; |
36353 | WRITE_LONG_F(adr, res) |
36354 | POST_IO |
36355 | RET(20) |
36356 | } |
36357 | |
36358 | // ADDDa |
36359 | OPCODE(0xD1A0) |
36360 | { |
36361 | u32 adr, res; |
36362 | u32 src, dst; |
36363 | |
36364 | src = DREGu32((Opcode >> 9) & 7); |
36365 | adr = AREG((Opcode >> 0) & 7) - 4; |
36366 | AREG((Opcode >> 0) & 7) = adr; |
36367 | PRE_IO |
36368 | READ_LONG_F(adr, dst) |
36369 | res = dst + src; |
36370 | flag_NotZ = res; |
36371 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36372 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36373 | flag_N = res >> 24; |
36374 | WRITE_LONG_F(adr, res) |
36375 | POST_IO |
36376 | RET(22) |
36377 | } |
36378 | |
36379 | // ADDDa |
36380 | OPCODE(0xD1A8) |
36381 | { |
36382 | u32 adr, res; |
36383 | u32 src, dst; |
36384 | |
36385 | src = DREGu32((Opcode >> 9) & 7); |
36386 | FETCH_SWORD(adr); |
36387 | adr += AREG((Opcode >> 0) & 7); |
36388 | PRE_IO |
36389 | READ_LONG_F(adr, dst) |
36390 | res = dst + src; |
36391 | flag_NotZ = res; |
36392 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36393 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36394 | flag_N = res >> 24; |
36395 | WRITE_LONG_F(adr, res) |
36396 | POST_IO |
36397 | RET(24) |
36398 | } |
36399 | |
36400 | // ADDDa |
36401 | OPCODE(0xD1B0) |
36402 | { |
36403 | u32 adr, res; |
36404 | u32 src, dst; |
36405 | |
36406 | src = DREGu32((Opcode >> 9) & 7); |
36407 | adr = AREG((Opcode >> 0) & 7); |
36408 | DECODE_EXT_WORD |
36409 | PRE_IO |
36410 | READ_LONG_F(adr, dst) |
36411 | res = dst + src; |
36412 | flag_NotZ = res; |
36413 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36414 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36415 | flag_N = res >> 24; |
36416 | WRITE_LONG_F(adr, res) |
36417 | POST_IO |
36418 | RET(26) |
36419 | } |
36420 | |
36421 | // ADDDa |
36422 | OPCODE(0xD1B8) |
36423 | { |
36424 | u32 adr, res; |
36425 | u32 src, dst; |
36426 | |
36427 | src = DREGu32((Opcode >> 9) & 7); |
36428 | FETCH_SWORD(adr); |
36429 | PRE_IO |
36430 | READ_LONG_F(adr, dst) |
36431 | res = dst + src; |
36432 | flag_NotZ = res; |
36433 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36434 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36435 | flag_N = res >> 24; |
36436 | WRITE_LONG_F(adr, res) |
36437 | POST_IO |
36438 | RET(24) |
36439 | } |
36440 | |
36441 | // ADDDa |
36442 | OPCODE(0xD1B9) |
36443 | { |
36444 | u32 adr, res; |
36445 | u32 src, dst; |
36446 | |
36447 | src = DREGu32((Opcode >> 9) & 7); |
36448 | FETCH_LONG(adr); |
36449 | PRE_IO |
36450 | READ_LONG_F(adr, dst) |
36451 | res = dst + src; |
36452 | flag_NotZ = res; |
36453 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36454 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36455 | flag_N = res >> 24; |
36456 | WRITE_LONG_F(adr, res) |
36457 | POST_IO |
36458 | RET(28) |
36459 | } |
36460 | |
36461 | // ADDDa |
36462 | OPCODE(0xD19F) |
36463 | { |
36464 | u32 adr, res; |
36465 | u32 src, dst; |
36466 | |
36467 | src = DREGu32((Opcode >> 9) & 7); |
36468 | adr = AREG(7); |
36469 | AREG(7) += 4; |
36470 | PRE_IO |
36471 | READ_LONG_F(adr, dst) |
36472 | res = dst + src; |
36473 | flag_NotZ = res; |
36474 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36475 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36476 | flag_N = res >> 24; |
36477 | WRITE_LONG_F(adr, res) |
36478 | POST_IO |
36479 | RET(20) |
36480 | } |
36481 | |
36482 | // ADDDa |
36483 | OPCODE(0xD1A7) |
36484 | { |
36485 | u32 adr, res; |
36486 | u32 src, dst; |
36487 | |
36488 | src = DREGu32((Opcode >> 9) & 7); |
36489 | adr = AREG(7) - 4; |
36490 | AREG(7) = adr; |
36491 | PRE_IO |
36492 | READ_LONG_F(adr, dst) |
36493 | res = dst + src; |
36494 | flag_NotZ = res; |
36495 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36496 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36497 | flag_N = res >> 24; |
36498 | WRITE_LONG_F(adr, res) |
36499 | POST_IO |
36500 | RET(22) |
36501 | } |
36502 | |
36503 | // ADDX |
36504 | OPCODE(0xD100) |
36505 | { |
36506 | u32 adr, res; |
36507 | u32 src, dst; |
36508 | |
36509 | src = DREGu8((Opcode >> 0) & 7); |
36510 | dst = DREGu8((Opcode >> 9) & 7); |
36511 | res = dst + src + ((flag_X >> 8) & 1); |
36512 | flag_N = flag_X = flag_C = res; |
36513 | flag_V = (src ^ res) & (dst ^ res); |
36514 | flag_NotZ |= res & 0xFF; |
36515 | DREGu8((Opcode >> 9) & 7) = res; |
36516 | RET(4) |
36517 | } |
36518 | |
36519 | // ADDX |
36520 | OPCODE(0xD140) |
36521 | { |
36522 | u32 adr, res; |
36523 | u32 src, dst; |
36524 | |
36525 | src = DREGu16((Opcode >> 0) & 7); |
36526 | dst = DREGu16((Opcode >> 9) & 7); |
36527 | res = dst + src + ((flag_X >> 8) & 1); |
36528 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36529 | flag_N = flag_X = flag_C = res >> 8; |
36530 | flag_NotZ |= res & 0xFFFF; |
36531 | DREGu16((Opcode >> 9) & 7) = res; |
36532 | RET(4) |
36533 | } |
36534 | |
36535 | // ADDX |
36536 | OPCODE(0xD180) |
36537 | { |
36538 | u32 adr, res; |
36539 | u32 src, dst; |
36540 | |
36541 | src = DREGu32((Opcode >> 0) & 7); |
36542 | dst = DREGu32((Opcode >> 9) & 7); |
36543 | res = dst + src + ((flag_X >> 8) & 1); |
36544 | flag_NotZ |= res; |
36545 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36546 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36547 | flag_N = res >> 24; |
36548 | DREGu32((Opcode >> 9) & 7) = res; |
36549 | RET(8) |
36550 | } |
36551 | |
36552 | // ADDXM |
36553 | OPCODE(0xD108) |
36554 | { |
36555 | u32 adr, res; |
36556 | u32 src, dst; |
36557 | |
36558 | adr = AREG((Opcode >> 0) & 7) - 1; |
36559 | AREG((Opcode >> 0) & 7) = adr; |
36560 | PRE_IO |
36561 | READ_BYTE_F(adr, src) |
36562 | adr = AREG((Opcode >> 9) & 7) - 1; |
36563 | AREG((Opcode >> 9) & 7) = adr; |
36564 | READ_BYTE_F(adr, dst) |
36565 | res = dst + src + ((flag_X >> 8) & 1); |
36566 | flag_N = flag_X = flag_C = res; |
36567 | flag_V = (src ^ res) & (dst ^ res); |
36568 | flag_NotZ |= res & 0xFF; |
36569 | WRITE_BYTE_F(adr, res) |
36570 | POST_IO |
36571 | RET(18) |
36572 | } |
36573 | |
36574 | // ADDXM |
36575 | OPCODE(0xD148) |
36576 | { |
36577 | u32 adr, res; |
36578 | u32 src, dst; |
36579 | |
36580 | adr = AREG((Opcode >> 0) & 7) - 2; |
36581 | AREG((Opcode >> 0) & 7) = adr; |
36582 | PRE_IO |
36583 | READ_WORD_F(adr, src) |
36584 | adr = AREG((Opcode >> 9) & 7) - 2; |
36585 | AREG((Opcode >> 9) & 7) = adr; |
36586 | READ_WORD_F(adr, dst) |
36587 | res = dst + src + ((flag_X >> 8) & 1); |
36588 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36589 | flag_N = flag_X = flag_C = res >> 8; |
36590 | flag_NotZ |= res & 0xFFFF; |
36591 | WRITE_WORD_F(adr, res) |
36592 | POST_IO |
36593 | RET(18) |
36594 | } |
36595 | |
36596 | // ADDXM |
36597 | OPCODE(0xD188) |
36598 | { |
36599 | u32 adr, res; |
36600 | u32 src, dst; |
36601 | |
36602 | adr = AREG((Opcode >> 0) & 7) - 4; |
36603 | AREG((Opcode >> 0) & 7) = adr; |
36604 | PRE_IO |
36605 | READ_LONG_F(adr, src) |
36606 | adr = AREG((Opcode >> 9) & 7) - 4; |
36607 | AREG((Opcode >> 9) & 7) = adr; |
36608 | READ_LONG_F(adr, dst) |
36609 | res = dst + src + ((flag_X >> 8) & 1); |
36610 | flag_NotZ |= res; |
36611 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36612 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36613 | flag_N = res >> 24; |
36614 | WRITE_LONG_F(adr, res) |
36615 | POST_IO |
36616 | RET(30) |
36617 | } |
36618 | |
36619 | // ADDX7M |
36620 | OPCODE(0xD10F) |
36621 | { |
36622 | u32 adr, res; |
36623 | u32 src, dst; |
36624 | |
36625 | adr = AREG(7) - 2; |
36626 | AREG(7) = adr; |
36627 | PRE_IO |
36628 | READ_BYTE_F(adr, src) |
36629 | adr = AREG((Opcode >> 9) & 7) - 1; |
36630 | AREG((Opcode >> 9) & 7) = adr; |
36631 | READ_BYTE_F(adr, dst) |
36632 | res = dst + src + ((flag_X >> 8) & 1); |
36633 | flag_N = flag_X = flag_C = res; |
36634 | flag_V = (src ^ res) & (dst ^ res); |
36635 | flag_NotZ |= res & 0xFF; |
36636 | WRITE_BYTE_F(adr, res) |
36637 | POST_IO |
36638 | RET(18) |
36639 | } |
36640 | |
36641 | // ADDX7M |
36642 | OPCODE(0xD14F) |
36643 | { |
36644 | u32 adr, res; |
36645 | u32 src, dst; |
36646 | |
36647 | adr = AREG(7) - 2; |
36648 | AREG(7) = adr; |
36649 | PRE_IO |
36650 | READ_WORD_F(adr, src) |
36651 | adr = AREG((Opcode >> 9) & 7) - 2; |
36652 | AREG((Opcode >> 9) & 7) = adr; |
36653 | READ_WORD_F(adr, dst) |
36654 | res = dst + src + ((flag_X >> 8) & 1); |
36655 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36656 | flag_N = flag_X = flag_C = res >> 8; |
36657 | flag_NotZ |= res & 0xFFFF; |
36658 | WRITE_WORD_F(adr, res) |
36659 | POST_IO |
36660 | RET(18) |
36661 | } |
36662 | |
36663 | // ADDX7M |
36664 | OPCODE(0xD18F) |
36665 | { |
36666 | u32 adr, res; |
36667 | u32 src, dst; |
36668 | |
36669 | adr = AREG(7) - 4; |
36670 | AREG(7) = adr; |
36671 | PRE_IO |
36672 | READ_LONG_F(adr, src) |
36673 | adr = AREG((Opcode >> 9) & 7) - 4; |
36674 | AREG((Opcode >> 9) & 7) = adr; |
36675 | READ_LONG_F(adr, dst) |
36676 | res = dst + src + ((flag_X >> 8) & 1); |
36677 | flag_NotZ |= res; |
36678 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36679 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36680 | flag_N = res >> 24; |
36681 | WRITE_LONG_F(adr, res) |
36682 | POST_IO |
36683 | RET(30) |
36684 | } |
36685 | |
36686 | // ADDXM7 |
36687 | OPCODE(0xDF08) |
36688 | { |
36689 | u32 adr, res; |
36690 | u32 src, dst; |
36691 | |
36692 | adr = AREG((Opcode >> 0) & 7) - 1; |
36693 | AREG((Opcode >> 0) & 7) = adr; |
36694 | PRE_IO |
36695 | READ_BYTE_F(adr, src) |
36696 | adr = AREG(7) - 2; |
36697 | AREG(7) = adr; |
36698 | READ_BYTE_F(adr, dst) |
36699 | res = dst + src + ((flag_X >> 8) & 1); |
36700 | flag_N = flag_X = flag_C = res; |
36701 | flag_V = (src ^ res) & (dst ^ res); |
36702 | flag_NotZ |= res & 0xFF; |
36703 | WRITE_BYTE_F(adr, res) |
36704 | POST_IO |
36705 | RET(18) |
36706 | } |
36707 | |
36708 | // ADDXM7 |
36709 | OPCODE(0xDF48) |
36710 | { |
36711 | u32 adr, res; |
36712 | u32 src, dst; |
36713 | |
36714 | adr = AREG((Opcode >> 0) & 7) - 2; |
36715 | AREG((Opcode >> 0) & 7) = adr; |
36716 | PRE_IO |
36717 | READ_WORD_F(adr, src) |
36718 | adr = AREG(7) - 2; |
36719 | AREG(7) = adr; |
36720 | READ_WORD_F(adr, dst) |
36721 | res = dst + src + ((flag_X >> 8) & 1); |
36722 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36723 | flag_N = flag_X = flag_C = res >> 8; |
36724 | flag_NotZ |= res & 0xFFFF; |
36725 | WRITE_WORD_F(adr, res) |
36726 | POST_IO |
36727 | RET(18) |
36728 | } |
36729 | |
36730 | // ADDXM7 |
36731 | OPCODE(0xDF88) |
36732 | { |
36733 | u32 adr, res; |
36734 | u32 src, dst; |
36735 | |
36736 | adr = AREG((Opcode >> 0) & 7) - 4; |
36737 | AREG((Opcode >> 0) & 7) = adr; |
36738 | PRE_IO |
36739 | READ_LONG_F(adr, src) |
36740 | adr = AREG(7) - 4; |
36741 | AREG(7) = adr; |
36742 | READ_LONG_F(adr, dst) |
36743 | res = dst + src + ((flag_X >> 8) & 1); |
36744 | flag_NotZ |= res; |
36745 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36746 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36747 | flag_N = res >> 24; |
36748 | WRITE_LONG_F(adr, res) |
36749 | POST_IO |
36750 | RET(30) |
36751 | } |
36752 | |
36753 | // ADDX7M7 |
36754 | OPCODE(0xDF0F) |
36755 | { |
36756 | u32 adr, res; |
36757 | u32 src, dst; |
36758 | |
36759 | adr = AREG(7) - 2; |
36760 | AREG(7) = adr; |
36761 | PRE_IO |
36762 | READ_BYTE_F(adr, src) |
36763 | adr = AREG(7) - 2; |
36764 | AREG(7) = adr; |
36765 | READ_BYTE_F(adr, dst) |
36766 | res = dst + src + ((flag_X >> 8) & 1); |
36767 | flag_N = flag_X = flag_C = res; |
36768 | flag_V = (src ^ res) & (dst ^ res); |
36769 | flag_NotZ |= res & 0xFF; |
36770 | WRITE_BYTE_F(adr, res) |
36771 | POST_IO |
36772 | RET(18) |
36773 | } |
36774 | |
36775 | // ADDX7M7 |
36776 | OPCODE(0xDF4F) |
36777 | { |
36778 | u32 adr, res; |
36779 | u32 src, dst; |
36780 | |
36781 | adr = AREG(7) - 2; |
36782 | AREG(7) = adr; |
36783 | PRE_IO |
36784 | READ_WORD_F(adr, src) |
36785 | adr = AREG(7) - 2; |
36786 | AREG(7) = adr; |
36787 | READ_WORD_F(adr, dst) |
36788 | res = dst + src + ((flag_X >> 8) & 1); |
36789 | flag_V = ((src ^ res) & (dst ^ res)) >> 8; |
36790 | flag_N = flag_X = flag_C = res >> 8; |
36791 | flag_NotZ |= res & 0xFFFF; |
36792 | WRITE_WORD_F(adr, res) |
36793 | POST_IO |
36794 | RET(18) |
36795 | } |
36796 | |
36797 | // ADDX7M7 |
36798 | OPCODE(0xDF8F) |
36799 | { |
36800 | u32 adr, res; |
36801 | u32 src, dst; |
36802 | |
36803 | adr = AREG(7) - 4; |
36804 | AREG(7) = adr; |
36805 | PRE_IO |
36806 | READ_LONG_F(adr, src) |
36807 | adr = AREG(7) - 4; |
36808 | AREG(7) = adr; |
36809 | READ_LONG_F(adr, dst) |
36810 | res = dst + src + ((flag_X >> 8) & 1); |
36811 | flag_NotZ |= res; |
36812 | flag_X = flag_C = ((src & dst & 1) + (src >> 1) + (dst >> 1)) >> 23; |
36813 | flag_V = ((src ^ res) & (dst ^ res)) >> 24; |
36814 | flag_N = res >> 24; |
36815 | WRITE_LONG_F(adr, res) |
36816 | POST_IO |
36817 | RET(30) |
36818 | } |
36819 | |
36820 | // ADDA |
36821 | OPCODE(0xD0C0) |
36822 | { |
36823 | u32 adr, res; |
36824 | u32 src, dst; |
36825 | |
36826 | src = (s32)DREGs16((Opcode >> 0) & 7); |
36827 | dst = AREGu32((Opcode >> 9) & 7); |
36828 | res = dst + src; |
36829 | AREG((Opcode >> 9) & 7) = res; |
36830 | RET(8) |
36831 | } |
36832 | |
36833 | // ADDA |
36834 | OPCODE(0xD0C8) |
36835 | { |
36836 | u32 adr, res; |
36837 | u32 src, dst; |
36838 | |
36839 | src = (s32)AREGs16((Opcode >> 0) & 7); |
36840 | dst = AREGu32((Opcode >> 9) & 7); |
36841 | res = dst + src; |
36842 | AREG((Opcode >> 9) & 7) = res; |
36843 | RET(8) |
36844 | } |
36845 | |
36846 | // ADDA |
36847 | OPCODE(0xD0D0) |
36848 | { |
36849 | u32 adr, res; |
36850 | u32 src, dst; |
36851 | |
36852 | adr = AREG((Opcode >> 0) & 7); |
36853 | PRE_IO |
36854 | READSX_WORD_F(adr, src) |
36855 | dst = AREGu32((Opcode >> 9) & 7); |
36856 | res = dst + src; |
36857 | AREG((Opcode >> 9) & 7) = res; |
36858 | POST_IO |
03e4f2a3 |
36859 | #ifdef USE_CYCLONE_TIMING |
36860 | RET(12) |
36861 | #else |
70357ce5 |
36862 | RET(10) |
03e4f2a3 |
36863 | #endif |
70357ce5 |
36864 | } |
36865 | |
36866 | // ADDA |
36867 | OPCODE(0xD0D8) |
36868 | { |
36869 | u32 adr, res; |
36870 | u32 src, dst; |
36871 | |
36872 | adr = AREG((Opcode >> 0) & 7); |
36873 | AREG((Opcode >> 0) & 7) += 2; |
36874 | PRE_IO |
36875 | READSX_WORD_F(adr, src) |
36876 | dst = AREGu32((Opcode >> 9) & 7); |
36877 | res = dst + src; |
36878 | AREG((Opcode >> 9) & 7) = res; |
36879 | POST_IO |
03e4f2a3 |
36880 | #ifdef USE_CYCLONE_TIMING |
36881 | RET(12) |
36882 | #else |
70357ce5 |
36883 | RET(10) |
03e4f2a3 |
36884 | #endif |
70357ce5 |
36885 | } |
36886 | |
36887 | // ADDA |
36888 | OPCODE(0xD0E0) |
36889 | { |
36890 | u32 adr, res; |
36891 | u32 src, dst; |
36892 | |
36893 | adr = AREG((Opcode >> 0) & 7) - 2; |
36894 | AREG((Opcode >> 0) & 7) = adr; |
36895 | PRE_IO |
36896 | READSX_WORD_F(adr, src) |
36897 | dst = AREGu32((Opcode >> 9) & 7); |
36898 | res = dst + src; |
36899 | AREG((Opcode >> 9) & 7) = res; |
36900 | POST_IO |
03e4f2a3 |
36901 | #ifdef USE_CYCLONE_TIMING |
36902 | RET(14) |
36903 | #else |
70357ce5 |
36904 | RET(12) |
03e4f2a3 |
36905 | #endif |
70357ce5 |
36906 | } |
36907 | |
36908 | // ADDA |
36909 | OPCODE(0xD0E8) |
36910 | { |
36911 | u32 adr, res; |
36912 | u32 src, dst; |
36913 | |
36914 | FETCH_SWORD(adr); |
36915 | adr += AREG((Opcode >> 0) & 7); |
36916 | PRE_IO |
36917 | READSX_WORD_F(adr, src) |
36918 | dst = AREGu32((Opcode >> 9) & 7); |
36919 | res = dst + src; |
36920 | AREG((Opcode >> 9) & 7) = res; |
36921 | POST_IO |
03e4f2a3 |
36922 | #ifdef USE_CYCLONE_TIMING |
36923 | RET(16) |
36924 | #else |
70357ce5 |
36925 | RET(14) |
03e4f2a3 |
36926 | #endif |
70357ce5 |
36927 | } |
36928 | |
36929 | // ADDA |
36930 | OPCODE(0xD0F0) |
36931 | { |
36932 | u32 adr, res; |
36933 | u32 src, dst; |
36934 | |
36935 | adr = AREG((Opcode >> 0) & 7); |
36936 | DECODE_EXT_WORD |
36937 | PRE_IO |
36938 | READSX_WORD_F(adr, src) |
36939 | dst = AREGu32((Opcode >> 9) & 7); |
36940 | res = dst + src; |
36941 | AREG((Opcode >> 9) & 7) = res; |
36942 | POST_IO |
03e4f2a3 |
36943 | #ifdef USE_CYCLONE_TIMING |
36944 | RET(18) |
36945 | #else |
70357ce5 |
36946 | RET(16) |
03e4f2a3 |
36947 | #endif |
70357ce5 |
36948 | } |
36949 | |
36950 | // ADDA |
36951 | OPCODE(0xD0F8) |
36952 | { |
36953 | u32 adr, res; |
36954 | u32 src, dst; |
36955 | |
36956 | FETCH_SWORD(adr); |
36957 | PRE_IO |
36958 | READSX_WORD_F(adr, src) |
36959 | dst = AREGu32((Opcode >> 9) & 7); |
36960 | res = dst + src; |
36961 | AREG((Opcode >> 9) & 7) = res; |
36962 | POST_IO |
03e4f2a3 |
36963 | #ifdef USE_CYCLONE_TIMING |
36964 | RET(16) |
36965 | #else |
70357ce5 |
36966 | RET(14) |
03e4f2a3 |
36967 | #endif |
70357ce5 |
36968 | } |
36969 | |
36970 | // ADDA |
36971 | OPCODE(0xD0F9) |
36972 | { |
36973 | u32 adr, res; |
36974 | u32 src, dst; |
36975 | |
36976 | FETCH_LONG(adr); |
36977 | PRE_IO |
36978 | READSX_WORD_F(adr, src) |
36979 | dst = AREGu32((Opcode >> 9) & 7); |
36980 | res = dst + src; |
36981 | AREG((Opcode >> 9) & 7) = res; |
36982 | POST_IO |
03e4f2a3 |
36983 | #ifdef USE_CYCLONE_TIMING |
36984 | RET(20) |
36985 | #else |
70357ce5 |
36986 | RET(18) |
03e4f2a3 |
36987 | #endif |
70357ce5 |
36988 | } |
36989 | |
36990 | // ADDA |
36991 | OPCODE(0xD0FA) |
36992 | { |
36993 | u32 adr, res; |
36994 | u32 src, dst; |
36995 | |
be26eb23 |
36996 | adr = GET_SWORD + GET_PC; |
70357ce5 |
36997 | PC++; |
36998 | PRE_IO |
36999 | READSX_WORD_F(adr, src) |
37000 | dst = AREGu32((Opcode >> 9) & 7); |
37001 | res = dst + src; |
37002 | AREG((Opcode >> 9) & 7) = res; |
37003 | POST_IO |
03e4f2a3 |
37004 | #ifdef USE_CYCLONE_TIMING |
37005 | RET(16) |
37006 | #else |
70357ce5 |
37007 | RET(14) |
03e4f2a3 |
37008 | #endif |
70357ce5 |
37009 | } |
37010 | |
37011 | // ADDA |
37012 | OPCODE(0xD0FB) |
37013 | { |
37014 | u32 adr, res; |
37015 | u32 src, dst; |
37016 | |
be26eb23 |
37017 | adr = GET_PC; |
70357ce5 |
37018 | DECODE_EXT_WORD |
37019 | PRE_IO |
37020 | READSX_WORD_F(adr, src) |
37021 | dst = AREGu32((Opcode >> 9) & 7); |
37022 | res = dst + src; |
37023 | AREG((Opcode >> 9) & 7) = res; |
37024 | POST_IO |
03e4f2a3 |
37025 | #ifdef USE_CYCLONE_TIMING |
37026 | RET(18) |
37027 | #else |
70357ce5 |
37028 | RET(16) |
03e4f2a3 |
37029 | #endif |
70357ce5 |
37030 | } |
37031 | |
37032 | // ADDA |
37033 | OPCODE(0xD0FC) |
37034 | { |
37035 | u32 adr, res; |
37036 | u32 src, dst; |
37037 | |
37038 | FETCH_SWORD(src); |
37039 | dst = AREGu32((Opcode >> 9) & 7); |
37040 | res = dst + src; |
37041 | AREG((Opcode >> 9) & 7) = res; |
37042 | RET(12) |
37043 | } |
37044 | |
37045 | // ADDA |
37046 | OPCODE(0xD0DF) |
37047 | { |
37048 | u32 adr, res; |
37049 | u32 src, dst; |
37050 | |
37051 | adr = AREG(7); |
37052 | AREG(7) += 2; |
37053 | PRE_IO |
37054 | READSX_WORD_F(adr, src) |
37055 | dst = AREGu32((Opcode >> 9) & 7); |
37056 | res = dst + src; |
37057 | AREG((Opcode >> 9) & 7) = res; |
37058 | POST_IO |
03e4f2a3 |
37059 | #ifdef USE_CYCLONE_TIMING |
37060 | RET(12) |
37061 | #else |
70357ce5 |
37062 | RET(10) |
03e4f2a3 |
37063 | #endif |
70357ce5 |
37064 | } |
37065 | |
37066 | // ADDA |
37067 | OPCODE(0xD0E7) |
37068 | { |
37069 | u32 adr, res; |
37070 | u32 src, dst; |
37071 | |
37072 | adr = AREG(7) - 2; |
37073 | AREG(7) = adr; |
37074 | PRE_IO |
37075 | READSX_WORD_F(adr, src) |
37076 | dst = AREGu32((Opcode >> 9) & 7); |
37077 | res = dst + src; |
37078 | AREG((Opcode >> 9) & 7) = res; |
37079 | POST_IO |
03e4f2a3 |
37080 | #ifdef USE_CYCLONE_TIMING |
37081 | RET(14) |
37082 | #else |
70357ce5 |
37083 | RET(12) |
03e4f2a3 |
37084 | #endif |
70357ce5 |
37085 | } |
37086 | |
37087 | // ADDA |
37088 | OPCODE(0xD1C0) |
37089 | { |
37090 | u32 adr, res; |
37091 | u32 src, dst; |
37092 | |
37093 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37094 | dst = AREGu32((Opcode >> 9) & 7); |
37095 | res = dst + src; |
37096 | AREG((Opcode >> 9) & 7) = res; |
37097 | #ifdef USE_CYCLONE_TIMING |
37098 | RET(8) |
37099 | #else |
37100 | RET(6) |
37101 | #endif |
37102 | } |
37103 | |
37104 | // ADDA |
37105 | OPCODE(0xD1C8) |
37106 | { |
37107 | u32 adr, res; |
37108 | u32 src, dst; |
37109 | |
37110 | src = (s32)AREGs32((Opcode >> 0) & 7); |
37111 | dst = AREGu32((Opcode >> 9) & 7); |
37112 | res = dst + src; |
37113 | AREG((Opcode >> 9) & 7) = res; |
37114 | #ifdef USE_CYCLONE_TIMING |
37115 | RET(8) |
37116 | #else |
37117 | RET(6) |
37118 | #endif |
37119 | } |
37120 | |
37121 | // ADDA |
37122 | OPCODE(0xD1D0) |
37123 | { |
37124 | u32 adr, res; |
37125 | u32 src, dst; |
37126 | |
37127 | adr = AREG((Opcode >> 0) & 7); |
37128 | PRE_IO |
37129 | READSX_LONG_F(adr, src) |
37130 | dst = AREGu32((Opcode >> 9) & 7); |
37131 | res = dst + src; |
37132 | AREG((Opcode >> 9) & 7) = res; |
37133 | POST_IO |
37134 | RET(14) |
37135 | } |
37136 | |
37137 | // ADDA |
37138 | OPCODE(0xD1D8) |
37139 | { |
37140 | u32 adr, res; |
37141 | u32 src, dst; |
37142 | |
37143 | adr = AREG((Opcode >> 0) & 7); |
37144 | AREG((Opcode >> 0) & 7) += 4; |
37145 | PRE_IO |
37146 | READSX_LONG_F(adr, src) |
37147 | dst = AREGu32((Opcode >> 9) & 7); |
37148 | res = dst + src; |
37149 | AREG((Opcode >> 9) & 7) = res; |
37150 | POST_IO |
37151 | RET(14) |
37152 | } |
37153 | |
37154 | // ADDA |
37155 | OPCODE(0xD1E0) |
37156 | { |
37157 | u32 adr, res; |
37158 | u32 src, dst; |
37159 | |
37160 | adr = AREG((Opcode >> 0) & 7) - 4; |
37161 | AREG((Opcode >> 0) & 7) = adr; |
37162 | PRE_IO |
37163 | READSX_LONG_F(adr, src) |
37164 | dst = AREGu32((Opcode >> 9) & 7); |
37165 | res = dst + src; |
37166 | AREG((Opcode >> 9) & 7) = res; |
37167 | POST_IO |
37168 | RET(16) |
37169 | } |
37170 | |
37171 | // ADDA |
37172 | OPCODE(0xD1E8) |
37173 | { |
37174 | u32 adr, res; |
37175 | u32 src, dst; |
37176 | |
37177 | FETCH_SWORD(adr); |
37178 | adr += AREG((Opcode >> 0) & 7); |
37179 | PRE_IO |
37180 | READSX_LONG_F(adr, src) |
37181 | dst = AREGu32((Opcode >> 9) & 7); |
37182 | res = dst + src; |
37183 | AREG((Opcode >> 9) & 7) = res; |
37184 | POST_IO |
37185 | RET(18) |
37186 | } |
37187 | |
37188 | // ADDA |
37189 | OPCODE(0xD1F0) |
37190 | { |
37191 | u32 adr, res; |
37192 | u32 src, dst; |
37193 | |
37194 | adr = AREG((Opcode >> 0) & 7); |
37195 | DECODE_EXT_WORD |
37196 | PRE_IO |
37197 | READSX_LONG_F(adr, src) |
37198 | dst = AREGu32((Opcode >> 9) & 7); |
37199 | res = dst + src; |
37200 | AREG((Opcode >> 9) & 7) = res; |
37201 | POST_IO |
37202 | RET(20) |
37203 | } |
37204 | |
37205 | // ADDA |
37206 | OPCODE(0xD1F8) |
37207 | { |
37208 | u32 adr, res; |
37209 | u32 src, dst; |
37210 | |
37211 | FETCH_SWORD(adr); |
37212 | PRE_IO |
37213 | READSX_LONG_F(adr, src) |
37214 | dst = AREGu32((Opcode >> 9) & 7); |
37215 | res = dst + src; |
37216 | AREG((Opcode >> 9) & 7) = res; |
37217 | POST_IO |
37218 | RET(18) |
37219 | } |
37220 | |
37221 | // ADDA |
37222 | OPCODE(0xD1F9) |
37223 | { |
37224 | u32 adr, res; |
37225 | u32 src, dst; |
37226 | |
37227 | FETCH_LONG(adr); |
37228 | PRE_IO |
37229 | READSX_LONG_F(adr, src) |
37230 | dst = AREGu32((Opcode >> 9) & 7); |
37231 | res = dst + src; |
37232 | AREG((Opcode >> 9) & 7) = res; |
37233 | POST_IO |
37234 | RET(22) |
37235 | } |
37236 | |
37237 | // ADDA |
37238 | OPCODE(0xD1FA) |
37239 | { |
37240 | u32 adr, res; |
37241 | u32 src, dst; |
37242 | |
be26eb23 |
37243 | adr = GET_SWORD + GET_PC; |
70357ce5 |
37244 | PC++; |
37245 | PRE_IO |
37246 | READSX_LONG_F(adr, src) |
37247 | dst = AREGu32((Opcode >> 9) & 7); |
37248 | res = dst + src; |
37249 | AREG((Opcode >> 9) & 7) = res; |
37250 | POST_IO |
37251 | RET(18) |
37252 | } |
37253 | |
37254 | // ADDA |
37255 | OPCODE(0xD1FB) |
37256 | { |
37257 | u32 adr, res; |
37258 | u32 src, dst; |
37259 | |
be26eb23 |
37260 | adr = GET_PC; |
70357ce5 |
37261 | DECODE_EXT_WORD |
37262 | PRE_IO |
37263 | READSX_LONG_F(adr, src) |
37264 | dst = AREGu32((Opcode >> 9) & 7); |
37265 | res = dst + src; |
37266 | AREG((Opcode >> 9) & 7) = res; |
37267 | POST_IO |
37268 | RET(20) |
37269 | } |
37270 | |
37271 | // ADDA |
37272 | OPCODE(0xD1FC) |
37273 | { |
37274 | u32 adr, res; |
37275 | u32 src, dst; |
37276 | |
37277 | FETCH_LONG(src); |
37278 | dst = AREGu32((Opcode >> 9) & 7); |
37279 | res = dst + src; |
37280 | AREG((Opcode >> 9) & 7) = res; |
37281 | #ifdef USE_CYCLONE_TIMING |
37282 | RET(16) |
37283 | #else |
37284 | RET(14) |
37285 | #endif |
37286 | } |
37287 | |
37288 | // ADDA |
37289 | OPCODE(0xD1DF) |
37290 | { |
37291 | u32 adr, res; |
37292 | u32 src, dst; |
37293 | |
37294 | adr = AREG(7); |
37295 | AREG(7) += 4; |
37296 | PRE_IO |
37297 | READSX_LONG_F(adr, src) |
37298 | dst = AREGu32((Opcode >> 9) & 7); |
37299 | res = dst + src; |
37300 | AREG((Opcode >> 9) & 7) = res; |
37301 | POST_IO |
37302 | RET(14) |
37303 | } |
37304 | |
37305 | // ADDA |
37306 | OPCODE(0xD1E7) |
37307 | { |
37308 | u32 adr, res; |
37309 | u32 src, dst; |
37310 | |
37311 | adr = AREG(7) - 4; |
37312 | AREG(7) = adr; |
37313 | PRE_IO |
37314 | READSX_LONG_F(adr, src) |
37315 | dst = AREGu32((Opcode >> 9) & 7); |
37316 | res = dst + src; |
37317 | AREG((Opcode >> 9) & 7) = res; |
37318 | POST_IO |
37319 | RET(16) |
37320 | } |
37321 | |
37322 | // ASRk |
37323 | OPCODE(0xE000) |
37324 | { |
37325 | u32 adr, res; |
37326 | u32 src, dst; |
37327 | |
37328 | u32 sft; |
37329 | |
37330 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37331 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37332 | src = (s32)DREGs8((Opcode >> 0) & 7); |
37333 | flag_V = 0; |
37334 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37335 | res = ((s32)src) >> sft; |
37336 | flag_N = res >> 0; |
37337 | flag_NotZ = res; |
37338 | DREGu8((Opcode >> 0) & 7) = res; |
37339 | RET(6) |
37340 | } |
37341 | |
37342 | // ASRk |
37343 | OPCODE(0xE040) |
37344 | { |
37345 | u32 adr, res; |
37346 | u32 src, dst; |
37347 | |
37348 | u32 sft; |
37349 | |
37350 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37351 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37352 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37353 | flag_V = 0; |
37354 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37355 | res = ((s32)src) >> sft; |
37356 | flag_N = res >> 8; |
37357 | flag_NotZ = res; |
37358 | DREGu16((Opcode >> 0) & 7) = res; |
37359 | RET(6) |
37360 | } |
37361 | |
37362 | // ASRk |
37363 | OPCODE(0xE080) |
37364 | { |
37365 | u32 adr, res; |
37366 | u32 src, dst; |
37367 | |
37368 | u32 sft; |
37369 | |
37370 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37371 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37372 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37373 | flag_V = 0; |
37374 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37375 | res = ((s32)src) >> sft; |
37376 | flag_N = res >> 24; |
37377 | flag_NotZ = res; |
37378 | DREGu32((Opcode >> 0) & 7) = res; |
37379 | RET(8) |
37380 | } |
37381 | |
37382 | // LSRk |
37383 | OPCODE(0xE008) |
37384 | { |
37385 | u32 adr, res; |
37386 | u32 src, dst; |
37387 | |
37388 | u32 sft; |
37389 | |
37390 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37391 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37392 | src = DREGu8((Opcode >> 0) & 7); |
37393 | flag_N = flag_V = 0; |
37394 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37395 | res = src >> sft; |
37396 | flag_NotZ = res; |
37397 | DREGu8((Opcode >> 0) & 7) = res; |
37398 | RET(6) |
37399 | } |
37400 | |
37401 | // LSRk |
37402 | OPCODE(0xE048) |
37403 | { |
37404 | u32 adr, res; |
37405 | u32 src, dst; |
37406 | |
37407 | u32 sft; |
37408 | |
37409 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37410 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37411 | src = DREGu16((Opcode >> 0) & 7); |
37412 | flag_N = flag_V = 0; |
37413 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37414 | res = src >> sft; |
37415 | flag_NotZ = res; |
37416 | DREGu16((Opcode >> 0) & 7) = res; |
37417 | RET(6) |
37418 | } |
37419 | |
37420 | // LSRk |
37421 | OPCODE(0xE088) |
37422 | { |
37423 | u32 adr, res; |
37424 | u32 src, dst; |
37425 | |
37426 | u32 sft; |
37427 | |
37428 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37429 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37430 | src = DREGu32((Opcode >> 0) & 7); |
37431 | flag_N = flag_V = 0; |
37432 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37433 | res = src >> sft; |
37434 | flag_NotZ = res; |
37435 | DREGu32((Opcode >> 0) & 7) = res; |
37436 | RET(8) |
37437 | } |
37438 | |
37439 | // ROXRk |
37440 | OPCODE(0xE010) |
37441 | { |
37442 | u32 adr, res; |
37443 | u32 src, dst; |
37444 | |
37445 | u32 sft; |
37446 | |
37447 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37448 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37449 | src = DREGu8((Opcode >> 0) & 7); |
37450 | src |= (flag_X & M68K_SR_X) << 0; |
37451 | res = (src >> sft) | (src << (9 - sft)); |
37452 | flag_X = flag_C = res >> 0; |
37453 | flag_V = 0; |
37454 | flag_N = res >> 0; |
37455 | flag_NotZ = res & 0x000000FF; |
37456 | DREGu8((Opcode >> 0) & 7) = res; |
37457 | RET(6) |
37458 | } |
37459 | |
37460 | // ROXRk |
37461 | OPCODE(0xE050) |
37462 | { |
37463 | u32 adr, res; |
37464 | u32 src, dst; |
37465 | |
37466 | u32 sft; |
37467 | |
37468 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37469 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37470 | src = DREGu16((Opcode >> 0) & 7); |
37471 | src |= (flag_X & M68K_SR_X) << 8; |
37472 | res = (src >> sft) | (src << (17 - sft)); |
37473 | flag_X = flag_C = res >> 8; |
37474 | flag_V = 0; |
37475 | flag_N = res >> 8; |
37476 | flag_NotZ = res & 0x0000FFFF; |
37477 | DREGu16((Opcode >> 0) & 7) = res; |
37478 | RET(6) |
37479 | } |
37480 | |
37481 | // ROXRk |
37482 | OPCODE(0xE090) |
37483 | { |
37484 | u32 adr, res; |
37485 | u32 src, dst; |
37486 | |
37487 | u32 sft; |
37488 | |
37489 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37490 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37491 | src = DREGu32((Opcode >> 0) & 7); |
37492 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37493 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
37494 | else res = (src >> sft) | (src << (33 - sft)) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + sft))); |
37495 | flag_X = flag_C; |
37496 | flag_V = 0; |
37497 | flag_N = res >> 24; |
37498 | flag_NotZ = res; |
37499 | DREGu32((Opcode >> 0) & 7) = res; |
37500 | RET(8) |
37501 | } |
37502 | |
37503 | // RORk |
37504 | OPCODE(0xE018) |
37505 | { |
37506 | u32 adr, res; |
37507 | u32 src, dst; |
37508 | |
37509 | u32 sft; |
37510 | |
37511 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37512 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37513 | src = DREGu8((Opcode >> 0) & 7); |
37514 | flag_V = 0; |
37515 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37516 | res = (src >> sft) | (src << (8 - sft)); |
37517 | flag_N = res >> 0; |
37518 | flag_NotZ = res & 0x000000FF; |
37519 | DREGu8((Opcode >> 0) & 7) = res; |
37520 | RET(6) |
37521 | } |
37522 | |
37523 | // RORk |
37524 | OPCODE(0xE058) |
37525 | { |
37526 | u32 adr, res; |
37527 | u32 src, dst; |
37528 | |
37529 | u32 sft; |
37530 | |
37531 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37532 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37533 | src = DREGu16((Opcode >> 0) & 7); |
37534 | flag_V = 0; |
37535 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37536 | res = (src >> sft) | (src << (16 - sft)); |
37537 | flag_N = res >> 8; |
37538 | flag_NotZ = res & 0x0000FFFF; |
37539 | DREGu16((Opcode >> 0) & 7) = res; |
37540 | RET(6) |
37541 | } |
37542 | |
37543 | // RORk |
37544 | OPCODE(0xE098) |
37545 | { |
37546 | u32 adr, res; |
37547 | u32 src, dst; |
37548 | |
37549 | u32 sft; |
37550 | |
37551 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37552 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37553 | src = DREGu32((Opcode >> 0) & 7); |
37554 | flag_V = 0; |
37555 | flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37556 | res = (src >> sft) | (src << (32 - sft)); |
37557 | flag_N = res >> 24; |
37558 | flag_NotZ = res; |
37559 | DREGu32((Opcode >> 0) & 7) = res; |
37560 | RET(8) |
37561 | } |
37562 | |
37563 | // ASLk |
37564 | OPCODE(0xE100) |
37565 | { |
37566 | u32 adr, res; |
37567 | u32 src, dst; |
37568 | |
37569 | u32 sft; |
37570 | |
37571 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37572 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37573 | src = DREGu8((Opcode >> 0) & 7); |
37574 | if (sft < 8) |
37575 | { |
37576 | flag_X = flag_C = src << (0 + sft); |
37577 | res = src << sft; |
37578 | flag_N = res >> 0; |
37579 | flag_NotZ = res & 0x000000FF; |
37580 | DREGu8((Opcode >> 0) & 7) = res; |
37581 | flag_V = 0; |
37582 | if ((sft > 7) && (src)) flag_V = M68K_SR_V; |
37583 | else |
37584 | { |
37585 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
37586 | src &= msk; |
37587 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37588 | } |
37589 | RET(6) |
37590 | } |
37591 | |
37592 | if (src) flag_V = M68K_SR_V; |
37593 | else flag_V = 0; |
37594 | flag_X = flag_C = src << M68K_SR_C_SFT; |
37595 | res = 0; |
37596 | DREGu8((Opcode >> 0) & 7) = res; |
37597 | flag_N = 0; |
37598 | flag_NotZ = 0; |
37599 | RET(6) |
37600 | } |
37601 | |
37602 | // ASLk |
37603 | OPCODE(0xE140) |
37604 | { |
37605 | u32 adr, res; |
37606 | u32 src, dst; |
37607 | |
37608 | u32 sft; |
37609 | |
37610 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37611 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37612 | src = DREGu16((Opcode >> 0) & 7); |
37613 | flag_X = flag_C = src >> (8 - sft); |
37614 | res = src << sft; |
37615 | flag_N = res >> 8; |
37616 | flag_NotZ = res & 0x0000FFFF; |
37617 | DREGu16((Opcode >> 0) & 7) = res; |
37618 | flag_V = 0; |
37619 | { |
37620 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
37621 | src &= msk; |
37622 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37623 | } |
37624 | RET(6) |
37625 | } |
37626 | |
37627 | // ASLk |
37628 | OPCODE(0xE180) |
37629 | { |
37630 | u32 adr, res; |
37631 | u32 src, dst; |
37632 | |
37633 | u32 sft; |
37634 | |
37635 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37636 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37637 | src = DREGu32((Opcode >> 0) & 7); |
37638 | flag_X = flag_C = src >> (24 - sft); |
37639 | res = src << sft; |
37640 | flag_N = res >> 24; |
37641 | flag_NotZ = res & 0xFFFFFFFF; |
37642 | DREGu32((Opcode >> 0) & 7) = res; |
37643 | flag_V = 0; |
37644 | { |
37645 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
37646 | src &= msk; |
37647 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
37648 | } |
37649 | RET(8) |
37650 | } |
37651 | |
37652 | // LSLk |
37653 | OPCODE(0xE108) |
37654 | { |
37655 | u32 adr, res; |
37656 | u32 src, dst; |
37657 | |
37658 | u32 sft; |
37659 | |
37660 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37661 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37662 | src = DREGu8((Opcode >> 0) & 7); |
37663 | flag_V = 0; |
37664 | flag_X = flag_C = src << (0 + sft); |
37665 | res = src << sft; |
37666 | flag_N = res >> 0; |
37667 | flag_NotZ = res & 0x000000FF; |
37668 | DREGu8((Opcode >> 0) & 7) = res; |
37669 | RET(6) |
37670 | } |
37671 | |
37672 | // LSLk |
37673 | OPCODE(0xE148) |
37674 | { |
37675 | u32 adr, res; |
37676 | u32 src, dst; |
37677 | |
37678 | u32 sft; |
37679 | |
37680 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37681 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37682 | src = DREGu16((Opcode >> 0) & 7); |
37683 | flag_V = 0; |
37684 | flag_X = flag_C = src >> (8 - sft); |
37685 | res = src << sft; |
37686 | flag_N = res >> 8; |
37687 | flag_NotZ = res & 0x0000FFFF; |
37688 | DREGu16((Opcode >> 0) & 7) = res; |
37689 | RET(6) |
37690 | } |
37691 | |
37692 | // LSLk |
37693 | OPCODE(0xE188) |
37694 | { |
37695 | u32 adr, res; |
37696 | u32 src, dst; |
37697 | |
37698 | u32 sft; |
37699 | |
37700 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37701 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37702 | src = DREGu32((Opcode >> 0) & 7); |
37703 | flag_V = 0; |
37704 | flag_X = flag_C = src >> (24 - sft); |
37705 | res = src << sft; |
37706 | flag_N = res >> 24; |
37707 | flag_NotZ = res & 0xFFFFFFFF; |
37708 | DREGu32((Opcode >> 0) & 7) = res; |
37709 | RET(8) |
37710 | } |
37711 | |
37712 | // ROXLk |
37713 | OPCODE(0xE110) |
37714 | { |
37715 | u32 adr, res; |
37716 | u32 src, dst; |
37717 | |
37718 | u32 sft; |
37719 | |
37720 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37721 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37722 | src = DREGu8((Opcode >> 0) & 7); |
37723 | src |= (flag_X & M68K_SR_X) << 0; |
37724 | res = (src << sft) | (src >> (9 - sft)); |
37725 | flag_X = flag_C = res >> 0; |
37726 | flag_V = 0; |
37727 | flag_N = res >> 0; |
37728 | flag_NotZ = res & 0x000000FF; |
37729 | DREGu8((Opcode >> 0) & 7) = res; |
37730 | RET(6) |
37731 | } |
37732 | |
37733 | // ROXLk |
37734 | OPCODE(0xE150) |
37735 | { |
37736 | u32 adr, res; |
37737 | u32 src, dst; |
37738 | |
37739 | u32 sft; |
37740 | |
37741 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37742 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37743 | src = DREGu16((Opcode >> 0) & 7); |
37744 | src |= (flag_X & M68K_SR_X) << 8; |
37745 | res = (src << sft) | (src >> (17 - sft)); |
37746 | flag_X = flag_C = res >> 8; |
37747 | flag_V = 0; |
37748 | flag_N = res >> 8; |
37749 | flag_NotZ = res & 0x0000FFFF; |
37750 | DREGu16((Opcode >> 0) & 7) = res; |
37751 | RET(6) |
37752 | } |
37753 | |
37754 | // ROXLk |
37755 | OPCODE(0xE190) |
37756 | { |
37757 | u32 adr, res; |
37758 | u32 src, dst; |
37759 | |
37760 | u32 sft; |
37761 | |
37762 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37763 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37764 | src = DREGu32((Opcode >> 0) & 7); |
37765 | flag_C = src >> ((32 - M68K_SR_C_SFT) - sft); |
37766 | if (sft == 1) res = (src << 1) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - 1)); |
37767 | else res = (src << sft) | (src >> (33 - sft)) | ((flag_X & M68K_SR_X) >> ((M68K_SR_X_SFT + 1) - sft)); |
37768 | flag_X = flag_C; |
37769 | flag_V = 0; |
37770 | flag_N = res >> 24; |
37771 | flag_NotZ = res; |
37772 | DREGu32((Opcode >> 0) & 7) = res; |
37773 | RET(8) |
37774 | } |
37775 | |
37776 | // ROLk |
37777 | OPCODE(0xE118) |
37778 | { |
37779 | u32 adr, res; |
37780 | u32 src, dst; |
37781 | |
37782 | u32 sft; |
37783 | |
37784 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37785 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37786 | src = DREGu8((Opcode >> 0) & 7); |
37787 | flag_V = 0; |
37788 | flag_C = src << (0 + sft); |
37789 | res = (src << sft) | (src >> (8 - sft)); |
37790 | flag_N = res >> 0; |
37791 | flag_NotZ = res & 0x000000FF; |
37792 | DREGu8((Opcode >> 0) & 7) = res; |
37793 | RET(6) |
37794 | } |
37795 | |
37796 | // ROLk |
37797 | OPCODE(0xE158) |
37798 | { |
37799 | u32 adr, res; |
37800 | u32 src, dst; |
37801 | |
37802 | u32 sft; |
37803 | |
37804 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37805 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37806 | src = DREGu16((Opcode >> 0) & 7); |
37807 | flag_V = 0; |
37808 | flag_C = src >> (8 - sft); |
37809 | res = (src << sft) | (src >> (16 - sft)); |
37810 | flag_N = res >> 8; |
37811 | flag_NotZ = res & 0x0000FFFF; |
37812 | DREGu16((Opcode >> 0) & 7) = res; |
37813 | RET(6) |
37814 | } |
37815 | |
37816 | // ROLk |
37817 | OPCODE(0xE198) |
37818 | { |
37819 | u32 adr, res; |
37820 | u32 src, dst; |
37821 | |
37822 | u32 sft; |
37823 | |
37824 | sft = (((Opcode >> 9) - 1) & 7) + 1; |
7669591e |
37825 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37826 | src = DREGu32((Opcode >> 0) & 7); |
37827 | flag_V = 0; |
37828 | flag_C = src >> (24 - sft); |
37829 | res = (src << sft) | (src >> (32 - sft)); |
37830 | flag_N = res >> 24; |
37831 | flag_NotZ = res; |
37832 | DREGu32((Opcode >> 0) & 7) = res; |
37833 | RET(8) |
37834 | } |
37835 | |
37836 | // ASRD |
37837 | OPCODE(0xE020) |
37838 | { |
37839 | u32 adr, res; |
37840 | u32 src, dst; |
37841 | |
37842 | u32 sft; |
37843 | |
37844 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37845 | src = (s32)DREGs8((Opcode >> 0) & 7); |
37846 | if (sft) |
37847 | { |
7669591e |
37848 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37849 | if (sft < 8) |
37850 | { |
37851 | flag_V = 0; |
37852 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
37853 | res = ((s32)src) >> sft; |
37854 | flag_N = res >> 0; |
37855 | flag_NotZ = res; |
37856 | DREGu8((Opcode >> 0) & 7) = res; |
37857 | RET(6) |
37858 | } |
37859 | |
37860 | if (src & (1 << 7)) |
37861 | { |
37862 | flag_N = M68K_SR_N; |
37863 | flag_NotZ = 1; |
37864 | flag_V = 0; |
37865 | flag_C = M68K_SR_C; |
37866 | flag_X = M68K_SR_X; |
37867 | res = 0x000000FF; |
37868 | DREGu8((Opcode >> 0) & 7) = res; |
37869 | RET(6) |
37870 | } |
37871 | |
37872 | flag_N = 0; |
37873 | flag_NotZ = 0; |
37874 | flag_V = 0; |
37875 | flag_C = 0; |
37876 | flag_X = 0; |
37877 | res = 0; |
37878 | DREGu8((Opcode >> 0) & 7) = res; |
37879 | RET(6) |
37880 | } |
37881 | |
37882 | flag_V = 0; |
37883 | flag_C = 0; |
37884 | flag_N = src >> 0; |
37885 | flag_NotZ = src; |
37886 | RET(6) |
37887 | } |
37888 | |
37889 | // ASRD |
37890 | OPCODE(0xE060) |
37891 | { |
37892 | u32 adr, res; |
37893 | u32 src, dst; |
37894 | |
37895 | u32 sft; |
37896 | |
37897 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37898 | src = (s32)DREGs16((Opcode >> 0) & 7); |
37899 | if (sft) |
37900 | { |
7669591e |
37901 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37902 | if (sft < 16) |
37903 | { |
37904 | flag_V = 0; |
37905 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37906 | res = ((s32)src) >> sft; |
37907 | flag_N = res >> 8; |
37908 | flag_NotZ = res; |
37909 | DREGu16((Opcode >> 0) & 7) = res; |
37910 | RET(6) |
37911 | } |
37912 | |
37913 | if (src & (1 << 15)) |
37914 | { |
37915 | flag_N = M68K_SR_N; |
37916 | flag_NotZ = 1; |
37917 | flag_V = 0; |
37918 | flag_C = M68K_SR_C; |
37919 | flag_X = M68K_SR_X; |
37920 | res = 0x0000FFFF; |
37921 | DREGu16((Opcode >> 0) & 7) = res; |
37922 | RET(6) |
37923 | } |
37924 | |
37925 | flag_N = 0; |
37926 | flag_NotZ = 0; |
37927 | flag_V = 0; |
37928 | flag_C = 0; |
37929 | flag_X = 0; |
37930 | res = 0; |
37931 | DREGu16((Opcode >> 0) & 7) = res; |
37932 | RET(6) |
37933 | } |
37934 | |
37935 | flag_V = 0; |
37936 | flag_C = 0; |
37937 | flag_N = src >> 8; |
37938 | flag_NotZ = src; |
37939 | RET(6) |
37940 | } |
37941 | |
37942 | // ASRD |
37943 | OPCODE(0xE0A0) |
37944 | { |
37945 | #ifdef USE_CYCLONE_TIMING |
37946 | #define CYC 8 |
37947 | #else |
37948 | #define CYC 6 |
37949 | #endif |
37950 | u32 adr, res; |
37951 | u32 src, dst; |
37952 | |
37953 | u32 sft; |
37954 | |
37955 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
37956 | src = (s32)DREGs32((Opcode >> 0) & 7); |
37957 | if (sft) |
37958 | { |
7669591e |
37959 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
37960 | if (sft < 32) |
37961 | { |
37962 | flag_V = 0; |
37963 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
37964 | res = ((s32)src) >> sft; |
37965 | flag_N = res >> 24; |
37966 | flag_NotZ = res; |
37967 | DREGu32((Opcode >> 0) & 7) = res; |
37968 | RET(CYC) |
37969 | } |
37970 | |
37971 | if (src & (1 << 31)) |
37972 | { |
37973 | flag_N = M68K_SR_N; |
37974 | flag_NotZ = 1; |
37975 | flag_V = 0; |
37976 | flag_C = M68K_SR_C; |
37977 | flag_X = M68K_SR_X; |
37978 | res = 0xFFFFFFFF; |
37979 | DREGu32((Opcode >> 0) & 7) = res; |
37980 | RET(CYC) |
37981 | } |
37982 | |
37983 | flag_N = 0; |
37984 | flag_NotZ = 0; |
37985 | flag_V = 0; |
37986 | flag_C = 0; |
37987 | flag_X = 0; |
37988 | res = 0; |
37989 | DREGu32((Opcode >> 0) & 7) = res; |
37990 | RET(CYC) |
37991 | } |
37992 | |
37993 | flag_V = 0; |
37994 | flag_C = 0; |
37995 | flag_N = src >> 24; |
37996 | flag_NotZ = src; |
37997 | RET(CYC) |
37998 | #undef CYC |
37999 | } |
38000 | |
38001 | // LSRD |
38002 | OPCODE(0xE028) |
38003 | { |
38004 | u32 adr, res; |
38005 | u32 src, dst; |
38006 | |
38007 | u32 sft; |
38008 | |
38009 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38010 | src = DREGu8((Opcode >> 0) & 7); |
38011 | if (sft) |
38012 | { |
7669591e |
38013 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38014 | if (sft <= 8) |
38015 | { |
38016 | flag_N = flag_V = 0; |
38017 | flag_X = flag_C = src << ((M68K_SR_C_SFT + 1) - sft); |
38018 | res = src >> sft; |
38019 | flag_NotZ = res; |
38020 | DREGu8((Opcode >> 0) & 7) = res; |
38021 | RET(6) |
38022 | } |
38023 | |
38024 | flag_X = flag_C = 0; |
38025 | flag_N = 0; |
38026 | flag_NotZ = 0; |
38027 | flag_V = 0; |
38028 | res = 0; |
38029 | DREGu8((Opcode >> 0) & 7) = res; |
38030 | RET(6) |
38031 | } |
38032 | |
38033 | flag_V = 0; |
38034 | flag_C = 0; |
38035 | flag_N = src >> 0; |
38036 | flag_NotZ = src; |
38037 | RET(6) |
38038 | } |
38039 | |
38040 | // LSRD |
38041 | OPCODE(0xE068) |
38042 | { |
38043 | u32 adr, res; |
38044 | u32 src, dst; |
38045 | |
38046 | u32 sft; |
38047 | |
38048 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38049 | src = DREGu16((Opcode >> 0) & 7); |
38050 | if (sft) |
38051 | { |
7669591e |
38052 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38053 | if (sft <= 16) |
38054 | { |
38055 | flag_N = flag_V = 0; |
38056 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
38057 | res = src >> sft; |
38058 | flag_NotZ = res; |
38059 | DREGu16((Opcode >> 0) & 7) = res; |
38060 | RET(6) |
38061 | } |
38062 | |
38063 | flag_X = flag_C = 0; |
38064 | flag_N = 0; |
38065 | flag_NotZ = 0; |
38066 | flag_V = 0; |
38067 | res = 0; |
38068 | DREGu16((Opcode >> 0) & 7) = res; |
38069 | RET(6) |
38070 | } |
38071 | |
38072 | flag_V = 0; |
38073 | flag_C = 0; |
38074 | flag_N = src >> 8; |
38075 | flag_NotZ = src; |
38076 | RET(6) |
38077 | } |
38078 | |
38079 | // LSRD |
38080 | OPCODE(0xE0A8) |
38081 | { |
38082 | #ifdef USE_CYCLONE_TIMING |
38083 | #define CYC 8 |
38084 | #else |
38085 | #define CYC 6 |
38086 | #endif |
38087 | u32 adr, res; |
38088 | u32 src, dst; |
38089 | |
38090 | u32 sft; |
38091 | |
38092 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38093 | src = DREGu32((Opcode >> 0) & 7); |
38094 | if (sft) |
38095 | { |
7669591e |
38096 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38097 | if (sft < 32) |
38098 | { |
38099 | flag_N = flag_V = 0; |
38100 | flag_X = flag_C = (src >> (sft - 1)) << M68K_SR_C_SFT; |
38101 | res = src >> sft; |
38102 | flag_NotZ = res; |
38103 | DREGu32((Opcode >> 0) & 7) = res; |
38104 | RET(CYC) |
38105 | } |
38106 | |
38107 | if (sft == 32) flag_C = src >> (31 - M68K_SR_C_SFT); |
38108 | else flag_C = 0; |
38109 | flag_X = flag_C; |
38110 | flag_N = 0; |
38111 | flag_NotZ = 0; |
38112 | flag_V = 0; |
38113 | res = 0; |
38114 | DREGu32((Opcode >> 0) & 7) = res; |
38115 | RET(CYC) |
38116 | } |
38117 | |
38118 | flag_V = 0; |
38119 | flag_C = 0; |
38120 | flag_N = src >> 24; |
38121 | flag_NotZ = src; |
38122 | RET(CYC) |
38123 | #undef CYC |
38124 | } |
38125 | |
38126 | // ROXRD |
38127 | OPCODE(0xE030) |
38128 | { |
38129 | u32 adr, res; |
38130 | u32 src, dst; |
38131 | |
38132 | u32 sft; |
38133 | |
38134 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38135 | src = DREGu8((Opcode >> 0) & 7); |
38136 | if (sft) |
38137 | { |
7669591e |
38138 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38139 | sft %= 9; |
38140 | |
38141 | src |= (flag_X & M68K_SR_X) << 0; |
38142 | res = (src >> sft) | (src << (9 - sft)); |
38143 | flag_X = flag_C = res >> 0; |
38144 | flag_V = 0; |
38145 | flag_N = res >> 0; |
38146 | flag_NotZ = res & 0x000000FF; |
38147 | DREGu8((Opcode >> 0) & 7) = res; |
38148 | RET(6) |
38149 | } |
38150 | |
38151 | flag_V = 0; |
38152 | flag_C = flag_X; |
38153 | flag_N = src >> 0; |
38154 | flag_NotZ = src; |
38155 | RET(6) |
38156 | } |
38157 | |
38158 | // ROXRD |
38159 | OPCODE(0xE070) |
38160 | { |
38161 | u32 adr, res; |
38162 | u32 src, dst; |
38163 | |
38164 | u32 sft; |
38165 | |
38166 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38167 | src = DREGu16((Opcode >> 0) & 7); |
38168 | if (sft) |
38169 | { |
7669591e |
38170 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38171 | sft %= 17; |
38172 | |
38173 | src |= (flag_X & M68K_SR_X) << 8; |
38174 | res = (src >> sft) | (src << (17 - sft)); |
38175 | flag_X = flag_C = res >> 8; |
38176 | flag_V = 0; |
38177 | flag_N = res >> 8; |
38178 | flag_NotZ = res & 0x0000FFFF; |
38179 | DREGu16((Opcode >> 0) & 7) = res; |
38180 | RET(6) |
38181 | } |
38182 | |
38183 | flag_V = 0; |
38184 | flag_C = flag_X; |
38185 | flag_N = src >> 8; |
38186 | flag_NotZ = src; |
38187 | RET(6) |
38188 | } |
38189 | |
38190 | // ROXRD |
38191 | OPCODE(0xE0B0) |
38192 | { |
38193 | #ifdef USE_CYCLONE_TIMING |
38194 | #define CYC 8 |
38195 | #else |
38196 | #define CYC 6 |
38197 | #endif |
38198 | u32 adr, res; |
38199 | u32 src, dst; |
38200 | |
38201 | u32 sft; |
38202 | |
38203 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38204 | src = DREGu32((Opcode >> 0) & 7); |
38205 | if (sft) |
38206 | { |
7669591e |
38207 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38208 | sft %= 33; |
38209 | |
38210 | if (sft != 0) |
38211 | { |
38212 | if (sft == 1) res = (src >> 1) | ((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))); |
38213 | else res = (src >> sft) | (src << (33 - sft)) | (((flag_X & M68K_SR_X) << (32 - (M68K_SR_X_SFT + 1))) >> (sft - 1)); |
c0413089 |
38214 | flag_X = (src >> (sft - 1)) << M68K_SR_X_SFT; |
70357ce5 |
38215 | } |
38216 | else res = src; |
38217 | flag_C = flag_X; |
38218 | flag_V = 0; |
38219 | flag_N = res >> 24; |
38220 | flag_NotZ = res; |
38221 | DREGu32((Opcode >> 0) & 7) = res; |
38222 | RET(CYC) |
38223 | } |
38224 | |
38225 | flag_V = 0; |
38226 | flag_C = flag_X; |
38227 | flag_N = src >> 24; |
38228 | flag_NotZ = src; |
38229 | RET(CYC) |
38230 | #undef CYC |
38231 | } |
38232 | |
38233 | // RORD |
38234 | OPCODE(0xE038) |
38235 | { |
38236 | u32 adr, res; |
38237 | u32 src, dst; |
38238 | |
38239 | u32 sft; |
38240 | |
38241 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38242 | src = DREGu8((Opcode >> 0) & 7); |
38243 | if (sft) |
38244 | { |
7669591e |
38245 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38246 | sft &= 0x07; |
38247 | |
38248 | flag_C = src << (M68K_SR_C_SFT - ((sft - 1) & 7)); |
38249 | res = (src >> sft) | (src << (8 - sft)); |
38250 | flag_V = 0; |
38251 | flag_N = res >> 0; |
38252 | flag_NotZ = res & 0x000000FF; |
38253 | DREGu8((Opcode >> 0) & 7) = res; |
38254 | RET(6) |
38255 | } |
38256 | |
38257 | flag_V = 0; |
38258 | flag_C = 0; |
38259 | flag_N = src >> 0; |
38260 | flag_NotZ = src; |
38261 | RET(6) |
38262 | } |
38263 | |
38264 | // RORD |
38265 | OPCODE(0xE078) |
38266 | { |
38267 | u32 adr, res; |
38268 | u32 src, dst; |
38269 | |
38270 | u32 sft; |
38271 | |
38272 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38273 | src = DREGu16((Opcode >> 0) & 7); |
38274 | if (sft) |
38275 | { |
7669591e |
38276 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38277 | sft &= 0x0F; |
38278 | |
38279 | flag_C = (src >> ((sft - 1) & 15)) << M68K_SR_C_SFT; |
38280 | res = (src >> sft) | (src << (16 - sft)); |
38281 | flag_V = 0; |
38282 | flag_N = res >> 8; |
38283 | flag_NotZ = res & 0x0000FFFF; |
38284 | DREGu16((Opcode >> 0) & 7) = res; |
38285 | RET(6) |
38286 | } |
38287 | |
38288 | flag_V = 0; |
38289 | flag_C = 0; |
38290 | flag_N = src >> 8; |
38291 | flag_NotZ = src; |
38292 | RET(6) |
38293 | } |
38294 | |
38295 | // RORD |
38296 | OPCODE(0xE0B8) |
38297 | { |
38298 | #ifdef USE_CYCLONE_TIMING |
38299 | #define CYC 8 |
38300 | #else |
38301 | #define CYC 6 |
38302 | #endif |
38303 | u32 adr, res; |
38304 | u32 src, dst; |
38305 | |
38306 | u32 sft; |
38307 | |
38308 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38309 | src = DREGu32((Opcode >> 0) & 7); |
38310 | if (sft) |
38311 | { |
7669591e |
38312 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38313 | sft &= 0x1F; |
38314 | |
38315 | flag_C = (src >> ((sft - 1) & 31)) << M68K_SR_C_SFT; |
38316 | res = (src >> sft) | (src << (32 - sft)); |
38317 | flag_V = 0; |
38318 | flag_N = res >> 24; |
38319 | flag_NotZ = res; |
38320 | DREGu32((Opcode >> 0) & 7) = res; |
38321 | RET(CYC) |
38322 | } |
38323 | |
38324 | flag_V = 0; |
38325 | flag_C = 0; |
38326 | flag_N = src >> 24; |
38327 | flag_NotZ = src; |
38328 | RET(CYC) |
38329 | #undef CYC |
38330 | } |
38331 | |
38332 | // ASLD |
38333 | OPCODE(0xE120) |
38334 | { |
38335 | u32 adr, res; |
38336 | u32 src, dst; |
38337 | |
38338 | u32 sft; |
38339 | |
38340 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38341 | src = DREGu8((Opcode >> 0) & 7); |
38342 | if (sft) |
38343 | { |
7669591e |
38344 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38345 | if (sft < 8) |
38346 | { |
38347 | flag_X = flag_C = (src << sft) >> 0; |
38348 | res = (src << sft) & 0x000000FF; |
38349 | flag_N = res >> 0; |
38350 | flag_NotZ = res; |
38351 | DREGu8((Opcode >> 0) & 7) = res; |
38352 | flag_V = 0; |
38353 | { |
38354 | u32 msk = (((s32)0x80000000) >> (sft + 24)) & 0x000000FF; |
38355 | src &= msk; |
38356 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38357 | } |
38358 | RET(6) |
38359 | } |
38360 | |
38361 | if (sft == 256) flag_C = src << M68K_SR_C_SFT; |
38362 | else flag_C = 0; |
38363 | flag_X = flag_C; |
38364 | if (src) flag_V = M68K_SR_V; |
38365 | else flag_V = 0; |
38366 | res = 0; |
38367 | DREGu8((Opcode >> 0) & 7) = res; |
38368 | flag_N = 0; |
38369 | flag_NotZ = 0; |
38370 | RET(6) |
38371 | } |
38372 | |
38373 | flag_V = 0; |
38374 | flag_C = 0; |
38375 | flag_N = src >> 0; |
38376 | flag_NotZ = src; |
38377 | RET(6) |
38378 | } |
38379 | |
38380 | // ASLD |
38381 | OPCODE(0xE160) |
38382 | { |
38383 | u32 adr, res; |
38384 | u32 src, dst; |
38385 | |
38386 | u32 sft; |
38387 | |
38388 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38389 | src = DREGu16((Opcode >> 0) & 7); |
38390 | if (sft) |
38391 | { |
7669591e |
38392 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38393 | if (sft < 16) |
38394 | { |
38395 | flag_X = flag_C = (src << sft) >> 8; |
38396 | res = (src << sft) & 0x0000FFFF; |
38397 | flag_N = res >> 8; |
38398 | flag_NotZ = res; |
38399 | DREGu16((Opcode >> 0) & 7) = res; |
38400 | flag_V = 0; |
38401 | { |
38402 | u32 msk = (((s32)0x80000000) >> (sft + 16)) & 0x0000FFFF; |
38403 | src &= msk; |
38404 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38405 | } |
38406 | RET(6) |
38407 | } |
38408 | |
38409 | if (sft == 65536) flag_C = src << M68K_SR_C_SFT; |
38410 | else flag_C = 0; |
38411 | flag_X = flag_C; |
38412 | if (src) flag_V = M68K_SR_V; |
38413 | else flag_V = 0; |
38414 | res = 0; |
38415 | DREGu16((Opcode >> 0) & 7) = res; |
38416 | flag_N = 0; |
38417 | flag_NotZ = 0; |
38418 | RET(6) |
38419 | } |
38420 | |
38421 | flag_V = 0; |
38422 | flag_C = 0; |
38423 | flag_N = src >> 8; |
38424 | flag_NotZ = src; |
38425 | RET(6) |
38426 | } |
38427 | |
38428 | // ASLD |
38429 | OPCODE(0xE1A0) |
38430 | { |
38431 | #ifdef USE_CYCLONE_TIMING |
38432 | #define CYC 8 |
38433 | #else |
38434 | #define CYC 6 |
38435 | #endif |
38436 | u32 adr, res; |
38437 | u32 src, dst; |
38438 | |
38439 | u32 sft; |
38440 | |
38441 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38442 | src = DREGu32((Opcode >> 0) & 7); |
38443 | if (sft) |
38444 | { |
7669591e |
38445 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38446 | if (sft < 32) |
38447 | { |
38448 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38449 | res = src << sft; |
38450 | flag_N = res >> 24; |
38451 | flag_NotZ = res; |
38452 | DREGu32((Opcode >> 0) & 7) = res; |
38453 | flag_V = 0; |
38454 | { |
38455 | u32 msk = (((s32)0x80000000) >> (sft + 0)) & 0xFFFFFFFF; |
38456 | src &= msk; |
38457 | if ((src) && (src != msk)) flag_V = M68K_SR_V; |
38458 | } |
38459 | RET(CYC) |
38460 | } |
38461 | |
38462 | if (sft == 0) flag_C = src << M68K_SR_C_SFT; |
38463 | else flag_C = 0; |
38464 | flag_X = flag_C; |
38465 | if (src) flag_V = M68K_SR_V; |
38466 | else flag_V = 0; |
38467 | res = 0; |
38468 | DREGu32((Opcode >> 0) & 7) = res; |
38469 | flag_N = 0; |
38470 | flag_NotZ = 0; |
38471 | RET(CYC) |
38472 | } |
38473 | |
38474 | flag_V = 0; |
38475 | flag_C = 0; |
38476 | flag_N = src >> 24; |
38477 | flag_NotZ = src; |
38478 | RET(CYC) |
38479 | #undef CYC |
38480 | } |
38481 | |
38482 | // LSLD |
38483 | OPCODE(0xE128) |
38484 | { |
38485 | u32 adr, res; |
38486 | u32 src, dst; |
38487 | |
38488 | u32 sft; |
38489 | |
38490 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38491 | src = DREGu8((Opcode >> 0) & 7); |
38492 | if (sft) |
38493 | { |
7669591e |
38494 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38495 | if (sft <= 8) |
38496 | { |
38497 | flag_X = flag_C = (src << sft) >> 0; |
38498 | res = (src << sft) & 0x000000FF; |
38499 | flag_V = 0; |
38500 | flag_N = res >> 0; |
38501 | flag_NotZ = res; |
38502 | DREGu8((Opcode >> 0) & 7) = res; |
38503 | RET(6) |
38504 | } |
38505 | |
38506 | flag_X = flag_C = 0; |
38507 | flag_N = 0; |
38508 | flag_NotZ = 0; |
38509 | flag_V = 0; |
38510 | res = 0; |
38511 | DREGu8((Opcode >> 0) & 7) = res; |
38512 | RET(6) |
38513 | } |
38514 | |
38515 | flag_V = 0; |
38516 | flag_C = 0; |
38517 | flag_N = src >> 0; |
38518 | flag_NotZ = src; |
38519 | RET(6) |
38520 | } |
38521 | |
38522 | // LSLD |
38523 | OPCODE(0xE168) |
38524 | { |
38525 | u32 adr, res; |
38526 | u32 src, dst; |
38527 | |
38528 | u32 sft; |
38529 | |
38530 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38531 | src = DREGu16((Opcode >> 0) & 7); |
38532 | if (sft) |
38533 | { |
7669591e |
38534 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38535 | if (sft <= 16) |
38536 | { |
38537 | flag_X = flag_C = (src << sft) >> 8; |
38538 | res = (src << sft) & 0x0000FFFF; |
38539 | flag_V = 0; |
38540 | flag_N = res >> 8; |
38541 | flag_NotZ = res; |
38542 | DREGu16((Opcode >> 0) & 7) = res; |
38543 | RET(6) |
38544 | } |
38545 | |
38546 | flag_X = flag_C = 0; |
38547 | flag_N = 0; |
38548 | flag_NotZ = 0; |
38549 | flag_V = 0; |
38550 | res = 0; |
38551 | DREGu16((Opcode >> 0) & 7) = res; |
38552 | RET(6) |
38553 | } |
38554 | |
38555 | flag_V = 0; |
38556 | flag_C = 0; |
38557 | flag_N = src >> 8; |
38558 | flag_NotZ = src; |
38559 | RET(6) |
38560 | } |
38561 | |
38562 | // LSLD |
38563 | OPCODE(0xE1A8) |
38564 | { |
38565 | #ifdef USE_CYCLONE_TIMING |
38566 | #define CYC 8 |
38567 | #else |
38568 | #define CYC 6 |
38569 | #endif |
38570 | u32 adr, res; |
38571 | u32 src, dst; |
38572 | |
38573 | u32 sft; |
38574 | |
38575 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38576 | src = DREGu32((Opcode >> 0) & 7); |
38577 | if (sft) |
38578 | { |
7669591e |
38579 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38580 | if (sft < 32) |
38581 | { |
38582 | flag_X = flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38583 | res = src << sft; |
38584 | flag_V = 0; |
38585 | flag_N = res >> 24; |
38586 | flag_NotZ = res; |
38587 | DREGu32((Opcode >> 0) & 7) = res; |
38588 | RET(CYC) |
38589 | } |
38590 | |
38591 | if (sft == 32) flag_C = src << M68K_SR_C_SFT; |
38592 | else flag_C = 0; |
38593 | flag_X = flag_C; |
38594 | flag_N = 0; |
38595 | flag_NotZ = 0; |
38596 | flag_V = 0; |
38597 | res = 0; |
38598 | DREGu32((Opcode >> 0) & 7) = res; |
38599 | RET(CYC) |
38600 | } |
38601 | |
38602 | flag_V = 0; |
38603 | flag_C = 0; |
38604 | flag_N = src >> 24; |
38605 | flag_NotZ = src; |
38606 | RET(CYC) |
38607 | #undef CYC |
38608 | } |
38609 | |
38610 | // ROXLD |
38611 | OPCODE(0xE130) |
38612 | { |
38613 | u32 adr, res; |
38614 | u32 src, dst; |
38615 | |
38616 | u32 sft; |
38617 | |
38618 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38619 | src = DREGu8((Opcode >> 0) & 7); |
38620 | if (sft) |
38621 | { |
7669591e |
38622 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38623 | sft %= 9; |
38624 | |
38625 | src |= (flag_X & M68K_SR_X) << 0; |
38626 | res = (src << sft) | (src >> (9 - sft)); |
38627 | flag_X = flag_C = res >> 0; |
38628 | flag_V = 0; |
38629 | flag_N = res >> 0; |
38630 | flag_NotZ = res & 0x000000FF; |
38631 | DREGu8((Opcode >> 0) & 7) = res; |
38632 | RET(6) |
38633 | } |
38634 | |
38635 | flag_V = 0; |
38636 | flag_C = flag_X; |
38637 | flag_N = src >> 0; |
38638 | flag_NotZ = src; |
38639 | RET(6) |
38640 | } |
38641 | |
38642 | // ROXLD |
38643 | OPCODE(0xE170) |
38644 | { |
38645 | u32 adr, res; |
38646 | u32 src, dst; |
38647 | |
38648 | u32 sft; |
38649 | |
38650 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38651 | src = DREGu16((Opcode >> 0) & 7); |
38652 | if (sft) |
38653 | { |
7669591e |
38654 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38655 | sft %= 17; |
38656 | |
38657 | src |= (flag_X & M68K_SR_X) << 8; |
38658 | res = (src << sft) | (src >> (17 - sft)); |
38659 | flag_X = flag_C = res >> 8; |
38660 | flag_V = 0; |
38661 | flag_N = res >> 8; |
38662 | flag_NotZ = res & 0x0000FFFF; |
38663 | DREGu16((Opcode >> 0) & 7) = res; |
38664 | RET(6) |
38665 | } |
38666 | |
38667 | flag_V = 0; |
38668 | flag_C = flag_X; |
38669 | flag_N = src >> 8; |
38670 | flag_NotZ = src; |
38671 | RET(6) |
38672 | } |
38673 | |
38674 | // ROXLD |
38675 | OPCODE(0xE1B0) |
38676 | { |
38677 | #ifdef USE_CYCLONE_TIMING |
38678 | #define CYC 8 |
38679 | #else |
38680 | #define CYC 6 |
38681 | #endif |
38682 | u32 adr, res; |
38683 | u32 src, dst; |
38684 | |
38685 | u32 sft; |
38686 | |
38687 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38688 | src = DREGu32((Opcode >> 0) & 7); |
38689 | if (sft) |
38690 | { |
7669591e |
38691 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38692 | sft %= 33; |
38693 | |
38694 | if (sft != 0) |
38695 | { |
38696 | if (sft == 1) res = (src << 1) | ((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1); |
38697 | else res = (src << sft) | (src >> (33 - sft)) | (((flag_X >> ((M68K_SR_X_SFT + 1) - 1)) & 1) << (sft - 1)); |
38698 | flag_X = (src >> (32 - sft)) << M68K_SR_X_SFT; |
38699 | } |
38700 | else res = src; |
38701 | flag_C = flag_X; |
38702 | flag_V = 0; |
38703 | flag_N = res >> 24; |
38704 | flag_NotZ = res; |
38705 | DREGu32((Opcode >> 0) & 7) = res; |
38706 | RET(CYC) |
38707 | } |
38708 | |
38709 | flag_V = 0; |
38710 | flag_C = flag_X; |
38711 | flag_N = src >> 24; |
38712 | flag_NotZ = src; |
38713 | RET(CYC) |
38714 | #undef CYC |
38715 | } |
38716 | |
38717 | // ROLD |
38718 | OPCODE(0xE138) |
38719 | { |
38720 | u32 adr, res; |
38721 | u32 src, dst; |
38722 | |
38723 | u32 sft; |
38724 | |
38725 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38726 | src = DREGu8((Opcode >> 0) & 7); |
38727 | if (sft) |
38728 | { |
7669591e |
38729 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38730 | if (sft &= 0x07) |
38731 | { |
38732 | flag_C = (src << sft) >> 0; |
38733 | res = ((src << sft) | (src >> (8 - sft))) & 0x000000FF; |
38734 | flag_V = 0; |
38735 | flag_N = res >> 0; |
38736 | flag_NotZ = res; |
38737 | DREGu8((Opcode >> 0) & 7) = res; |
38738 | RET(6) |
38739 | } |
38740 | |
38741 | flag_V = 0; |
38742 | flag_C = src << M68K_SR_C_SFT; |
38743 | flag_N = src >> 0; |
38744 | flag_NotZ = src; |
38745 | RET(6) |
38746 | } |
38747 | |
38748 | flag_V = 0; |
38749 | flag_C = 0; |
38750 | flag_N = src >> 0; |
38751 | flag_NotZ = src; |
38752 | RET(6) |
38753 | } |
38754 | |
38755 | // ROLD |
38756 | OPCODE(0xE178) |
38757 | { |
38758 | u32 adr, res; |
38759 | u32 src, dst; |
38760 | |
38761 | u32 sft; |
38762 | |
38763 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38764 | src = DREGu16((Opcode >> 0) & 7); |
38765 | if (sft) |
38766 | { |
7669591e |
38767 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38768 | if (sft &= 0x0F) |
38769 | { |
38770 | flag_C = (src << sft) >> 8; |
38771 | res = ((src << sft) | (src >> (16 - sft))) & 0x0000FFFF; |
38772 | flag_V = 0; |
38773 | flag_N = res >> 8; |
38774 | flag_NotZ = res; |
38775 | DREGu16((Opcode >> 0) & 7) = res; |
38776 | RET(6) |
38777 | } |
38778 | |
38779 | flag_V = 0; |
38780 | flag_C = src << M68K_SR_C_SFT; |
38781 | flag_N = src >> 8; |
38782 | flag_NotZ = src; |
38783 | RET(6) |
38784 | } |
38785 | |
38786 | flag_V = 0; |
38787 | flag_C = 0; |
38788 | flag_N = src >> 8; |
38789 | flag_NotZ = src; |
38790 | RET(6) |
38791 | } |
38792 | |
38793 | // ROLD |
38794 | OPCODE(0xE1B8) |
38795 | { |
38796 | #ifdef USE_CYCLONE_TIMING |
38797 | #define CYC 8 |
38798 | #else |
38799 | #define CYC 6 |
38800 | #endif |
38801 | u32 adr, res; |
38802 | u32 src, dst; |
38803 | |
38804 | u32 sft; |
38805 | |
38806 | sft = DREG((Opcode >> 9) & 7) & 0x3F; |
38807 | src = DREGu32((Opcode >> 0) & 7); |
38808 | if (sft) |
38809 | { |
7669591e |
38810 | ctx->io_cycle_counter -= sft * 2; |
70357ce5 |
38811 | if (sft &= 0x1F) |
38812 | { |
38813 | flag_C = (src >> (32 - sft)) << M68K_SR_C_SFT; |
38814 | res = (src << sft) | (src >> (32 - sft)); |
38815 | flag_V = 0; |
38816 | flag_N = res >> 24; |
38817 | flag_NotZ = res; |
38818 | DREGu32((Opcode >> 0) & 7) = res; |
38819 | RET(CYC) |
38820 | } |
38821 | |
38822 | flag_V = 0; |
38823 | flag_C = src << M68K_SR_C_SFT; |
38824 | flag_N = src >> 24; |
38825 | flag_NotZ = src; |
38826 | RET(CYC) |
38827 | } |
38828 | |
38829 | flag_V = 0; |
38830 | flag_C = 0; |
38831 | flag_N = src >> 24; |
38832 | flag_NotZ = src; |
38833 | RET(CYC) |
38834 | #undef CYC |
38835 | } |
38836 | |
38837 | // ASR |
38838 | OPCODE(0xE0D0) |
38839 | { |
38840 | u32 adr, res; |
38841 | u32 src, dst; |
38842 | |
38843 | adr = AREG((Opcode >> 0) & 7); |
38844 | PRE_IO |
38845 | READ_WORD_F(adr, src) |
38846 | flag_V = 0; |
38847 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38848 | res = (src >> 1) | (src & (1 << 15)); |
38849 | flag_N = res >> 8; |
38850 | flag_NotZ = res; |
38851 | WRITE_WORD_F(adr, res) |
38852 | POST_IO |
38853 | RET(12) |
38854 | } |
38855 | |
38856 | // ASR |
38857 | OPCODE(0xE0D8) |
38858 | { |
38859 | u32 adr, res; |
38860 | u32 src, dst; |
38861 | |
38862 | adr = AREG((Opcode >> 0) & 7); |
38863 | AREG((Opcode >> 0) & 7) += 2; |
38864 | PRE_IO |
38865 | READ_WORD_F(adr, src) |
38866 | flag_V = 0; |
38867 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38868 | res = (src >> 1) | (src & (1 << 15)); |
38869 | flag_N = res >> 8; |
38870 | flag_NotZ = res; |
38871 | WRITE_WORD_F(adr, res) |
38872 | POST_IO |
38873 | RET(12) |
38874 | } |
38875 | |
38876 | // ASR |
38877 | OPCODE(0xE0E0) |
38878 | { |
38879 | u32 adr, res; |
38880 | u32 src, dst; |
38881 | |
38882 | adr = AREG((Opcode >> 0) & 7) - 2; |
38883 | AREG((Opcode >> 0) & 7) = adr; |
38884 | PRE_IO |
38885 | READ_WORD_F(adr, src) |
38886 | flag_V = 0; |
38887 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38888 | res = (src >> 1) | (src & (1 << 15)); |
38889 | flag_N = res >> 8; |
38890 | flag_NotZ = res; |
38891 | WRITE_WORD_F(adr, res) |
38892 | POST_IO |
38893 | RET(14) |
38894 | } |
38895 | |
38896 | // ASR |
38897 | OPCODE(0xE0E8) |
38898 | { |
38899 | u32 adr, res; |
38900 | u32 src, dst; |
38901 | |
38902 | FETCH_SWORD(adr); |
38903 | adr += AREG((Opcode >> 0) & 7); |
38904 | PRE_IO |
38905 | READ_WORD_F(adr, src) |
38906 | flag_V = 0; |
38907 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38908 | res = (src >> 1) | (src & (1 << 15)); |
38909 | flag_N = res >> 8; |
38910 | flag_NotZ = res; |
38911 | WRITE_WORD_F(adr, res) |
38912 | POST_IO |
38913 | RET(16) |
38914 | } |
38915 | |
38916 | // ASR |
38917 | OPCODE(0xE0F0) |
38918 | { |
38919 | u32 adr, res; |
38920 | u32 src, dst; |
38921 | |
38922 | adr = AREG((Opcode >> 0) & 7); |
38923 | DECODE_EXT_WORD |
38924 | PRE_IO |
38925 | READ_WORD_F(adr, src) |
38926 | flag_V = 0; |
38927 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38928 | res = (src >> 1) | (src & (1 << 15)); |
38929 | flag_N = res >> 8; |
38930 | flag_NotZ = res; |
38931 | WRITE_WORD_F(adr, res) |
38932 | POST_IO |
38933 | RET(18) |
38934 | } |
38935 | |
38936 | // ASR |
38937 | OPCODE(0xE0F8) |
38938 | { |
38939 | u32 adr, res; |
38940 | u32 src, dst; |
38941 | |
38942 | FETCH_SWORD(adr); |
38943 | PRE_IO |
38944 | READ_WORD_F(adr, src) |
38945 | flag_V = 0; |
38946 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38947 | res = (src >> 1) | (src & (1 << 15)); |
38948 | flag_N = res >> 8; |
38949 | flag_NotZ = res; |
38950 | WRITE_WORD_F(adr, res) |
38951 | POST_IO |
38952 | RET(16) |
38953 | } |
38954 | |
38955 | // ASR |
38956 | OPCODE(0xE0F9) |
38957 | { |
38958 | u32 adr, res; |
38959 | u32 src, dst; |
38960 | |
38961 | FETCH_LONG(adr); |
38962 | PRE_IO |
38963 | READ_WORD_F(adr, src) |
38964 | flag_V = 0; |
38965 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38966 | res = (src >> 1) | (src & (1 << 15)); |
38967 | flag_N = res >> 8; |
38968 | flag_NotZ = res; |
38969 | WRITE_WORD_F(adr, res) |
38970 | POST_IO |
38971 | RET(20) |
38972 | } |
38973 | |
38974 | // ASR |
38975 | OPCODE(0xE0DF) |
38976 | { |
38977 | u32 adr, res; |
38978 | u32 src, dst; |
38979 | |
38980 | adr = AREG(7); |
38981 | AREG(7) += 2; |
38982 | PRE_IO |
38983 | READ_WORD_F(adr, src) |
38984 | flag_V = 0; |
38985 | flag_X = flag_C = src << M68K_SR_C_SFT; |
38986 | res = (src >> 1) | (src & (1 << 15)); |
38987 | flag_N = res >> 8; |
38988 | flag_NotZ = res; |
38989 | WRITE_WORD_F(adr, res) |
38990 | POST_IO |
38991 | RET(12) |
38992 | } |
38993 | |
38994 | // ASR |
38995 | OPCODE(0xE0E7) |
38996 | { |
38997 | u32 adr, res; |
38998 | u32 src, dst; |
38999 | |
39000 | adr = AREG(7) - 2; |
39001 | AREG(7) = adr; |
39002 | PRE_IO |
39003 | READ_WORD_F(adr, src) |
39004 | flag_V = 0; |
39005 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39006 | res = (src >> 1) | (src & (1 << 15)); |
39007 | flag_N = res >> 8; |
39008 | flag_NotZ = res; |
39009 | WRITE_WORD_F(adr, res) |
39010 | POST_IO |
39011 | RET(14) |
39012 | } |
39013 | |
39014 | // LSR |
39015 | OPCODE(0xE2D0) |
39016 | { |
39017 | u32 adr, res; |
39018 | u32 src, dst; |
39019 | |
39020 | adr = AREG((Opcode >> 0) & 7); |
39021 | PRE_IO |
39022 | READ_WORD_F(adr, src) |
39023 | flag_N = flag_V = 0; |
39024 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39025 | res = src >> 1; |
39026 | flag_NotZ = res; |
39027 | WRITE_WORD_F(adr, res) |
39028 | POST_IO |
39029 | RET(12) |
39030 | } |
39031 | |
39032 | // LSR |
39033 | OPCODE(0xE2D8) |
39034 | { |
39035 | u32 adr, res; |
39036 | u32 src, dst; |
39037 | |
39038 | adr = AREG((Opcode >> 0) & 7); |
39039 | AREG((Opcode >> 0) & 7) += 2; |
39040 | PRE_IO |
39041 | READ_WORD_F(adr, src) |
39042 | flag_N = flag_V = 0; |
39043 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39044 | res = src >> 1; |
39045 | flag_NotZ = res; |
39046 | WRITE_WORD_F(adr, res) |
39047 | POST_IO |
39048 | RET(12) |
39049 | } |
39050 | |
39051 | // LSR |
39052 | OPCODE(0xE2E0) |
39053 | { |
39054 | u32 adr, res; |
39055 | u32 src, dst; |
39056 | |
39057 | adr = AREG((Opcode >> 0) & 7) - 2; |
39058 | AREG((Opcode >> 0) & 7) = adr; |
39059 | PRE_IO |
39060 | READ_WORD_F(adr, src) |
39061 | flag_N = flag_V = 0; |
39062 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39063 | res = src >> 1; |
39064 | flag_NotZ = res; |
39065 | WRITE_WORD_F(adr, res) |
39066 | POST_IO |
39067 | RET(14) |
39068 | } |
39069 | |
39070 | // LSR |
39071 | OPCODE(0xE2E8) |
39072 | { |
39073 | u32 adr, res; |
39074 | u32 src, dst; |
39075 | |
39076 | FETCH_SWORD(adr); |
39077 | adr += AREG((Opcode >> 0) & 7); |
39078 | PRE_IO |
39079 | READ_WORD_F(adr, src) |
39080 | flag_N = flag_V = 0; |
39081 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39082 | res = src >> 1; |
39083 | flag_NotZ = res; |
39084 | WRITE_WORD_F(adr, res) |
39085 | POST_IO |
39086 | RET(16) |
39087 | } |
39088 | |
39089 | // LSR |
39090 | OPCODE(0xE2F0) |
39091 | { |
39092 | u32 adr, res; |
39093 | u32 src, dst; |
39094 | |
39095 | adr = AREG((Opcode >> 0) & 7); |
39096 | DECODE_EXT_WORD |
39097 | PRE_IO |
39098 | READ_WORD_F(adr, src) |
39099 | flag_N = flag_V = 0; |
39100 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39101 | res = src >> 1; |
39102 | flag_NotZ = res; |
39103 | WRITE_WORD_F(adr, res) |
39104 | POST_IO |
39105 | RET(18) |
39106 | } |
39107 | |
39108 | // LSR |
39109 | OPCODE(0xE2F8) |
39110 | { |
39111 | u32 adr, res; |
39112 | u32 src, dst; |
39113 | |
39114 | FETCH_SWORD(adr); |
39115 | PRE_IO |
39116 | READ_WORD_F(adr, src) |
39117 | flag_N = flag_V = 0; |
39118 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39119 | res = src >> 1; |
39120 | flag_NotZ = res; |
39121 | WRITE_WORD_F(adr, res) |
39122 | POST_IO |
39123 | RET(16) |
39124 | } |
39125 | |
39126 | // LSR |
39127 | OPCODE(0xE2F9) |
39128 | { |
39129 | u32 adr, res; |
39130 | u32 src, dst; |
39131 | |
39132 | FETCH_LONG(adr); |
39133 | PRE_IO |
39134 | READ_WORD_F(adr, src) |
39135 | flag_N = flag_V = 0; |
39136 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39137 | res = src >> 1; |
39138 | flag_NotZ = res; |
39139 | WRITE_WORD_F(adr, res) |
39140 | POST_IO |
39141 | RET(20) |
39142 | } |
39143 | |
39144 | // LSR |
39145 | OPCODE(0xE2DF) |
39146 | { |
39147 | u32 adr, res; |
39148 | u32 src, dst; |
39149 | |
39150 | adr = AREG(7); |
39151 | AREG(7) += 2; |
39152 | PRE_IO |
39153 | READ_WORD_F(adr, src) |
39154 | flag_N = flag_V = 0; |
39155 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39156 | res = src >> 1; |
39157 | flag_NotZ = res; |
39158 | WRITE_WORD_F(adr, res) |
39159 | POST_IO |
39160 | RET(12) |
39161 | } |
39162 | |
39163 | // LSR |
39164 | OPCODE(0xE2E7) |
39165 | { |
39166 | u32 adr, res; |
39167 | u32 src, dst; |
39168 | |
39169 | adr = AREG(7) - 2; |
39170 | AREG(7) = adr; |
39171 | PRE_IO |
39172 | READ_WORD_F(adr, src) |
39173 | flag_N = flag_V = 0; |
39174 | flag_X = flag_C = src << M68K_SR_C_SFT; |
39175 | res = src >> 1; |
39176 | flag_NotZ = res; |
39177 | WRITE_WORD_F(adr, res) |
39178 | POST_IO |
39179 | RET(14) |
39180 | } |
39181 | |
39182 | // ROXR |
39183 | OPCODE(0xE4D0) |
39184 | { |
39185 | u32 adr, res; |
39186 | u32 src, dst; |
39187 | |
39188 | adr = AREG((Opcode >> 0) & 7); |
39189 | PRE_IO |
39190 | READ_WORD_F(adr, src) |
39191 | flag_V = 0; |
39192 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39193 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39194 | flag_N = res >> 8; |
39195 | flag_NotZ = res; |
39196 | WRITE_WORD_F(adr, res) |
39197 | POST_IO |
39198 | RET(12) |
39199 | } |
39200 | |
39201 | // ROXR |
39202 | OPCODE(0xE4D8) |
39203 | { |
39204 | u32 adr, res; |
39205 | u32 src, dst; |
39206 | |
39207 | adr = AREG((Opcode >> 0) & 7); |
39208 | AREG((Opcode >> 0) & 7) += 2; |
39209 | PRE_IO |
39210 | READ_WORD_F(adr, src) |
39211 | flag_V = 0; |
39212 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39213 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39214 | flag_N = res >> 8; |
39215 | flag_NotZ = res; |
39216 | WRITE_WORD_F(adr, res) |
39217 | POST_IO |
39218 | RET(12) |
39219 | } |
39220 | |
39221 | // ROXR |
39222 | OPCODE(0xE4E0) |
39223 | { |
39224 | u32 adr, res; |
39225 | u32 src, dst; |
39226 | |
39227 | adr = AREG((Opcode >> 0) & 7) - 2; |
39228 | AREG((Opcode >> 0) & 7) = adr; |
39229 | PRE_IO |
39230 | READ_WORD_F(adr, src) |
39231 | flag_V = 0; |
39232 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39233 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39234 | flag_N = res >> 8; |
39235 | flag_NotZ = res; |
39236 | WRITE_WORD_F(adr, res) |
39237 | POST_IO |
39238 | RET(14) |
39239 | } |
39240 | |
39241 | // ROXR |
39242 | OPCODE(0xE4E8) |
39243 | { |
39244 | u32 adr, res; |
39245 | u32 src, dst; |
39246 | |
39247 | FETCH_SWORD(adr); |
39248 | adr += AREG((Opcode >> 0) & 7); |
39249 | PRE_IO |
39250 | READ_WORD_F(adr, src) |
39251 | flag_V = 0; |
39252 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39253 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39254 | flag_N = res >> 8; |
39255 | flag_NotZ = res; |
39256 | WRITE_WORD_F(adr, res) |
39257 | POST_IO |
39258 | RET(16) |
39259 | } |
39260 | |
39261 | // ROXR |
39262 | OPCODE(0xE4F0) |
39263 | { |
39264 | u32 adr, res; |
39265 | u32 src, dst; |
39266 | |
39267 | adr = AREG((Opcode >> 0) & 7); |
39268 | DECODE_EXT_WORD |
39269 | PRE_IO |
39270 | READ_WORD_F(adr, src) |
39271 | flag_V = 0; |
39272 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39273 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39274 | flag_N = res >> 8; |
39275 | flag_NotZ = res; |
39276 | WRITE_WORD_F(adr, res) |
39277 | POST_IO |
39278 | RET(18) |
39279 | } |
39280 | |
39281 | // ROXR |
39282 | OPCODE(0xE4F8) |
39283 | { |
39284 | u32 adr, res; |
39285 | u32 src, dst; |
39286 | |
39287 | FETCH_SWORD(adr); |
39288 | PRE_IO |
39289 | READ_WORD_F(adr, src) |
39290 | flag_V = 0; |
39291 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39292 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39293 | flag_N = res >> 8; |
39294 | flag_NotZ = res; |
39295 | WRITE_WORD_F(adr, res) |
39296 | POST_IO |
39297 | RET(16) |
39298 | } |
39299 | |
39300 | // ROXR |
39301 | OPCODE(0xE4F9) |
39302 | { |
39303 | u32 adr, res; |
39304 | u32 src, dst; |
39305 | |
39306 | FETCH_LONG(adr); |
39307 | PRE_IO |
39308 | READ_WORD_F(adr, src) |
39309 | flag_V = 0; |
39310 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39311 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39312 | flag_N = res >> 8; |
39313 | flag_NotZ = res; |
39314 | WRITE_WORD_F(adr, res) |
39315 | POST_IO |
39316 | RET(20) |
39317 | } |
39318 | |
39319 | // ROXR |
39320 | OPCODE(0xE4DF) |
39321 | { |
39322 | u32 adr, res; |
39323 | u32 src, dst; |
39324 | |
39325 | adr = AREG(7); |
39326 | AREG(7) += 2; |
39327 | PRE_IO |
39328 | READ_WORD_F(adr, src) |
39329 | flag_V = 0; |
39330 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39331 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39332 | flag_N = res >> 8; |
39333 | flag_NotZ = res; |
39334 | WRITE_WORD_F(adr, res) |
39335 | POST_IO |
39336 | RET(12) |
39337 | } |
39338 | |
39339 | // ROXR |
39340 | OPCODE(0xE4E7) |
39341 | { |
39342 | u32 adr, res; |
39343 | u32 src, dst; |
39344 | |
39345 | adr = AREG(7) - 2; |
39346 | AREG(7) = adr; |
39347 | PRE_IO |
39348 | READ_WORD_F(adr, src) |
39349 | flag_V = 0; |
39350 | res = (src >> 1) | ((flag_X & M68K_SR_X) << 7); |
39351 | flag_C = flag_X = src << M68K_SR_C_SFT; |
39352 | flag_N = res >> 8; |
39353 | flag_NotZ = res; |
39354 | WRITE_WORD_F(adr, res) |
39355 | POST_IO |
39356 | RET(14) |
39357 | } |
39358 | |
39359 | // ROR |
39360 | OPCODE(0xE6D0) |
39361 | { |
39362 | u32 adr, res; |
39363 | u32 src, dst; |
39364 | |
39365 | adr = AREG((Opcode >> 0) & 7); |
39366 | PRE_IO |
39367 | READ_WORD_F(adr, src) |
39368 | flag_V = 0; |
39369 | flag_C = src << M68K_SR_C_SFT; |
39370 | res = (src >> 1) | (src << 15); |
39371 | flag_N = res >> 8; |
39372 | flag_NotZ = res & 0x0000FFFF; |
39373 | WRITE_WORD_F(adr, res) |
39374 | POST_IO |
39375 | RET(12) |
39376 | } |
39377 | |
39378 | // ROR |
39379 | OPCODE(0xE6D8) |
39380 | { |
39381 | u32 adr, res; |
39382 | u32 src, dst; |
39383 | |
39384 | adr = AREG((Opcode >> 0) & 7); |
39385 | AREG((Opcode >> 0) & 7) += 2; |
39386 | PRE_IO |
39387 | READ_WORD_F(adr, src) |
39388 | flag_V = 0; |
39389 | flag_C = src << M68K_SR_C_SFT; |
39390 | res = (src >> 1) | (src << 15); |
39391 | flag_N = res >> 8; |
39392 | flag_NotZ = res & 0x0000FFFF; |
39393 | WRITE_WORD_F(adr, res) |
39394 | POST_IO |
39395 | RET(12) |
39396 | } |
39397 | |
39398 | // ROR |
39399 | OPCODE(0xE6E0) |
39400 | { |
39401 | u32 adr, res; |
39402 | u32 src, dst; |
39403 | |
39404 | adr = AREG((Opcode >> 0) & 7) - 2; |
39405 | AREG((Opcode >> 0) & 7) = adr; |
39406 | PRE_IO |
39407 | READ_WORD_F(adr, src) |
39408 | flag_V = 0; |
39409 | flag_C = src << M68K_SR_C_SFT; |
39410 | res = (src >> 1) | (src << 15); |
39411 | flag_N = res >> 8; |
39412 | flag_NotZ = res & 0x0000FFFF; |
39413 | WRITE_WORD_F(adr, res) |
39414 | POST_IO |
39415 | RET(14) |
39416 | } |
39417 | |
39418 | // ROR |
39419 | OPCODE(0xE6E8) |
39420 | { |
39421 | u32 adr, res; |
39422 | u32 src, dst; |
39423 | |
39424 | FETCH_SWORD(adr); |
39425 | adr += AREG((Opcode >> 0) & 7); |
39426 | PRE_IO |
39427 | READ_WORD_F(adr, src) |
39428 | flag_V = 0; |
39429 | flag_C = src << M68K_SR_C_SFT; |
39430 | res = (src >> 1) | (src << 15); |
39431 | flag_N = res >> 8; |
39432 | flag_NotZ = res & 0x0000FFFF; |
39433 | WRITE_WORD_F(adr, res) |
39434 | POST_IO |
39435 | RET(16) |
39436 | } |
39437 | |
39438 | // ROR |
39439 | OPCODE(0xE6F0) |
39440 | { |
39441 | u32 adr, res; |
39442 | u32 src, dst; |
39443 | |
39444 | adr = AREG((Opcode >> 0) & 7); |
39445 | DECODE_EXT_WORD |
39446 | PRE_IO |
39447 | READ_WORD_F(adr, src) |
39448 | flag_V = 0; |
39449 | flag_C = src << M68K_SR_C_SFT; |
39450 | res = (src >> 1) | (src << 15); |
39451 | flag_N = res >> 8; |
39452 | flag_NotZ = res & 0x0000FFFF; |
39453 | WRITE_WORD_F(adr, res) |
39454 | POST_IO |
39455 | RET(18) |
39456 | } |
39457 | |
39458 | // ROR |
39459 | OPCODE(0xE6F8) |
39460 | { |
39461 | u32 adr, res; |
39462 | u32 src, dst; |
39463 | |
39464 | FETCH_SWORD(adr); |
39465 | PRE_IO |
39466 | READ_WORD_F(adr, src) |
39467 | flag_V = 0; |
39468 | flag_C = src << M68K_SR_C_SFT; |
39469 | res = (src >> 1) | (src << 15); |
39470 | flag_N = res >> 8; |
39471 | flag_NotZ = res & 0x0000FFFF; |
39472 | WRITE_WORD_F(adr, res) |
39473 | POST_IO |
39474 | RET(16) |
39475 | } |
39476 | |
39477 | // ROR |
39478 | OPCODE(0xE6F9) |
39479 | { |
39480 | u32 adr, res; |
39481 | u32 src, dst; |
39482 | |
39483 | FETCH_LONG(adr); |
39484 | PRE_IO |
39485 | READ_WORD_F(adr, src) |
39486 | flag_V = 0; |
39487 | flag_C = src << M68K_SR_C_SFT; |
39488 | res = (src >> 1) | (src << 15); |
39489 | flag_N = res >> 8; |
39490 | flag_NotZ = res & 0x0000FFFF; |
39491 | WRITE_WORD_F(adr, res) |
39492 | POST_IO |
39493 | RET(20) |
39494 | } |
39495 | |
39496 | // ROR |
39497 | OPCODE(0xE6DF) |
39498 | { |
39499 | u32 adr, res; |
39500 | u32 src, dst; |
39501 | |
39502 | adr = AREG(7); |
39503 | AREG(7) += 2; |
39504 | PRE_IO |
39505 | READ_WORD_F(adr, src) |
39506 | flag_V = 0; |
39507 | flag_C = src << M68K_SR_C_SFT; |
39508 | res = (src >> 1) | (src << 15); |
39509 | flag_N = res >> 8; |
39510 | flag_NotZ = res & 0x0000FFFF; |
39511 | WRITE_WORD_F(adr, res) |
39512 | POST_IO |
39513 | RET(12) |
39514 | } |
39515 | |
39516 | // ROR |
39517 | OPCODE(0xE6E7) |
39518 | { |
39519 | u32 adr, res; |
39520 | u32 src, dst; |
39521 | |
39522 | adr = AREG(7) - 2; |
39523 | AREG(7) = adr; |
39524 | PRE_IO |
39525 | READ_WORD_F(adr, src) |
39526 | flag_V = 0; |
39527 | flag_C = src << M68K_SR_C_SFT; |
39528 | res = (src >> 1) | (src << 15); |
39529 | flag_N = res >> 8; |
39530 | flag_NotZ = res & 0x0000FFFF; |
39531 | WRITE_WORD_F(adr, res) |
39532 | POST_IO |
39533 | RET(14) |
39534 | } |
39535 | |
39536 | // ASL |
39537 | OPCODE(0xE1D0) |
39538 | { |
39539 | u32 adr, res; |
39540 | u32 src, dst; |
39541 | |
39542 | adr = AREG((Opcode >> 0) & 7); |
39543 | PRE_IO |
39544 | READ_WORD_F(adr, src) |
39545 | flag_X = flag_C = src >> 7; |
39546 | res = src << 1; |
39547 | flag_V = (src ^ res) >> 8; |
39548 | flag_N = res >> 8; |
39549 | flag_NotZ = res & 0x0000FFFF; |
39550 | WRITE_WORD_F(adr, res) |
39551 | POST_IO |
39552 | RET(12) |
39553 | } |
39554 | |
39555 | // ASL |
39556 | OPCODE(0xE1D8) |
39557 | { |
39558 | u32 adr, res; |
39559 | u32 src, dst; |
39560 | |
39561 | adr = AREG((Opcode >> 0) & 7); |
39562 | AREG((Opcode >> 0) & 7) += 2; |
39563 | PRE_IO |
39564 | READ_WORD_F(adr, src) |
39565 | flag_X = flag_C = src >> 7; |
39566 | res = src << 1; |
39567 | flag_V = (src ^ res) >> 8; |
39568 | flag_N = res >> 8; |
39569 | flag_NotZ = res & 0x0000FFFF; |
39570 | WRITE_WORD_F(adr, res) |
39571 | POST_IO |
39572 | RET(12) |
39573 | } |
39574 | |
39575 | // ASL |
39576 | OPCODE(0xE1E0) |
39577 | { |
39578 | u32 adr, res; |
39579 | u32 src, dst; |
39580 | |
39581 | adr = AREG((Opcode >> 0) & 7) - 2; |
39582 | AREG((Opcode >> 0) & 7) = adr; |
39583 | PRE_IO |
39584 | READ_WORD_F(adr, src) |
39585 | flag_X = flag_C = src >> 7; |
39586 | res = src << 1; |
39587 | flag_V = (src ^ res) >> 8; |
39588 | flag_N = res >> 8; |
39589 | flag_NotZ = res & 0x0000FFFF; |
39590 | WRITE_WORD_F(adr, res) |
39591 | POST_IO |
39592 | RET(14) |
39593 | } |
39594 | |
39595 | // ASL |
39596 | OPCODE(0xE1E8) |
39597 | { |
39598 | u32 adr, res; |
39599 | u32 src, dst; |
39600 | |
39601 | FETCH_SWORD(adr); |
39602 | adr += AREG((Opcode >> 0) & 7); |
39603 | PRE_IO |
39604 | READ_WORD_F(adr, src) |
39605 | flag_X = flag_C = src >> 7; |
39606 | res = src << 1; |
39607 | flag_V = (src ^ res) >> 8; |
39608 | flag_N = res >> 8; |
39609 | flag_NotZ = res & 0x0000FFFF; |
39610 | WRITE_WORD_F(adr, res) |
39611 | POST_IO |
39612 | RET(16) |
39613 | } |
39614 | |
39615 | // ASL |
39616 | OPCODE(0xE1F0) |
39617 | { |
39618 | u32 adr, res; |
39619 | u32 src, dst; |
39620 | |
39621 | adr = AREG((Opcode >> 0) & 7); |
39622 | DECODE_EXT_WORD |
39623 | PRE_IO |
39624 | READ_WORD_F(adr, src) |
39625 | flag_X = flag_C = src >> 7; |
39626 | res = src << 1; |
39627 | flag_V = (src ^ res) >> 8; |
39628 | flag_N = res >> 8; |
39629 | flag_NotZ = res & 0x0000FFFF; |
39630 | WRITE_WORD_F(adr, res) |
39631 | POST_IO |
39632 | RET(18) |
39633 | } |
39634 | |
39635 | // ASL |
39636 | OPCODE(0xE1F8) |
39637 | { |
39638 | u32 adr, res; |
39639 | u32 src, dst; |
39640 | |
39641 | FETCH_SWORD(adr); |
39642 | PRE_IO |
39643 | READ_WORD_F(adr, src) |
39644 | flag_X = flag_C = src >> 7; |
39645 | res = src << 1; |
39646 | flag_V = (src ^ res) >> 8; |
39647 | flag_N = res >> 8; |
39648 | flag_NotZ = res & 0x0000FFFF; |
39649 | WRITE_WORD_F(adr, res) |
39650 | POST_IO |
39651 | RET(16) |
39652 | } |
39653 | |
39654 | // ASL |
39655 | OPCODE(0xE1F9) |
39656 | { |
39657 | u32 adr, res; |
39658 | u32 src, dst; |
39659 | |
39660 | FETCH_LONG(adr); |
39661 | PRE_IO |
39662 | READ_WORD_F(adr, src) |
39663 | flag_X = flag_C = src >> 7; |
39664 | res = src << 1; |
39665 | flag_V = (src ^ res) >> 8; |
39666 | flag_N = res >> 8; |
39667 | flag_NotZ = res & 0x0000FFFF; |
39668 | WRITE_WORD_F(adr, res) |
39669 | POST_IO |
39670 | RET(20) |
39671 | } |
39672 | |
39673 | // ASL |
39674 | OPCODE(0xE1DF) |
39675 | { |
39676 | u32 adr, res; |
39677 | u32 src, dst; |
39678 | |
39679 | adr = AREG(7); |
39680 | AREG(7) += 2; |
39681 | PRE_IO |
39682 | READ_WORD_F(adr, src) |
39683 | flag_X = flag_C = src >> 7; |
39684 | res = src << 1; |
39685 | flag_V = (src ^ res) >> 8; |
39686 | flag_N = res >> 8; |
39687 | flag_NotZ = res & 0x0000FFFF; |
39688 | WRITE_WORD_F(adr, res) |
39689 | POST_IO |
39690 | RET(12) |
39691 | } |
39692 | |
39693 | // ASL |
39694 | OPCODE(0xE1E7) |
39695 | { |
39696 | u32 adr, res; |
39697 | u32 src, dst; |
39698 | |
39699 | adr = AREG(7) - 2; |
39700 | AREG(7) = adr; |
39701 | PRE_IO |
39702 | READ_WORD_F(adr, src) |
39703 | flag_X = flag_C = src >> 7; |
39704 | res = src << 1; |
39705 | flag_V = (src ^ res) >> 8; |
39706 | flag_N = res >> 8; |
39707 | flag_NotZ = res & 0x0000FFFF; |
39708 | WRITE_WORD_F(adr, res) |
39709 | POST_IO |
39710 | RET(14) |
39711 | } |
39712 | |
39713 | // LSL |
39714 | OPCODE(0xE3D0) |
39715 | { |
39716 | u32 adr, res; |
39717 | u32 src, dst; |
39718 | |
39719 | adr = AREG((Opcode >> 0) & 7); |
39720 | PRE_IO |
39721 | READ_WORD_F(adr, src) |
39722 | flag_V = 0; |
39723 | flag_X = flag_C = src >> 7; |
39724 | res = src << 1; |
39725 | flag_N = res >> 8; |
39726 | flag_NotZ = res & 0x0000FFFF; |
39727 | WRITE_WORD_F(adr, res) |
39728 | POST_IO |
39729 | RET(12) |
39730 | } |
39731 | |
39732 | // LSL |
39733 | OPCODE(0xE3D8) |
39734 | { |
39735 | u32 adr, res; |
39736 | u32 src, dst; |
39737 | |
39738 | adr = AREG((Opcode >> 0) & 7); |
39739 | AREG((Opcode >> 0) & 7) += 2; |
39740 | PRE_IO |
39741 | READ_WORD_F(adr, src) |
39742 | flag_V = 0; |
39743 | flag_X = flag_C = src >> 7; |
39744 | res = src << 1; |
39745 | flag_N = res >> 8; |
39746 | flag_NotZ = res & 0x0000FFFF; |
39747 | WRITE_WORD_F(adr, res) |
39748 | POST_IO |
39749 | RET(12) |
39750 | } |
39751 | |
39752 | // LSL |
39753 | OPCODE(0xE3E0) |
39754 | { |
39755 | u32 adr, res; |
39756 | u32 src, dst; |
39757 | |
39758 | adr = AREG((Opcode >> 0) & 7) - 2; |
39759 | AREG((Opcode >> 0) & 7) = adr; |
39760 | PRE_IO |
39761 | READ_WORD_F(adr, src) |
39762 | flag_V = 0; |
39763 | flag_X = flag_C = src >> 7; |
39764 | res = src << 1; |
39765 | flag_N = res >> 8; |
39766 | flag_NotZ = res & 0x0000FFFF; |
39767 | WRITE_WORD_F(adr, res) |
39768 | POST_IO |
39769 | RET(14) |
39770 | } |
39771 | |
39772 | // LSL |
39773 | OPCODE(0xE3E8) |
39774 | { |
39775 | u32 adr, res; |
39776 | u32 src, dst; |
39777 | |
39778 | FETCH_SWORD(adr); |
39779 | adr += AREG((Opcode >> 0) & 7); |
39780 | PRE_IO |
39781 | READ_WORD_F(adr, src) |
39782 | flag_V = 0; |
39783 | flag_X = flag_C = src >> 7; |
39784 | res = src << 1; |
39785 | flag_N = res >> 8; |
39786 | flag_NotZ = res & 0x0000FFFF; |
39787 | WRITE_WORD_F(adr, res) |
39788 | POST_IO |
39789 | RET(16) |
39790 | } |
39791 | |
39792 | // LSL |
39793 | OPCODE(0xE3F0) |
39794 | { |
39795 | u32 adr, res; |
39796 | u32 src, dst; |
39797 | |
39798 | adr = AREG((Opcode >> 0) & 7); |
39799 | DECODE_EXT_WORD |
39800 | PRE_IO |
39801 | READ_WORD_F(adr, src) |
39802 | flag_V = 0; |
39803 | flag_X = flag_C = src >> 7; |
39804 | res = src << 1; |
39805 | flag_N = res >> 8; |
39806 | flag_NotZ = res & 0x0000FFFF; |
39807 | WRITE_WORD_F(adr, res) |
39808 | POST_IO |
39809 | RET(18) |
39810 | } |
39811 | |
39812 | // LSL |
39813 | OPCODE(0xE3F8) |
39814 | { |
39815 | u32 adr, res; |
39816 | u32 src, dst; |
39817 | |
39818 | FETCH_SWORD(adr); |
39819 | PRE_IO |
39820 | READ_WORD_F(adr, src) |
39821 | flag_V = 0; |
39822 | flag_X = flag_C = src >> 7; |
39823 | res = src << 1; |
39824 | flag_N = res >> 8; |
39825 | flag_NotZ = res & 0x0000FFFF; |
39826 | WRITE_WORD_F(adr, res) |
39827 | POST_IO |
39828 | RET(16) |
39829 | } |
39830 | |
39831 | // LSL |
39832 | OPCODE(0xE3F9) |
39833 | { |
39834 | u32 adr, res; |
39835 | u32 src, dst; |
39836 | |
39837 | FETCH_LONG(adr); |
39838 | PRE_IO |
39839 | READ_WORD_F(adr, src) |
39840 | flag_V = 0; |
39841 | flag_X = flag_C = src >> 7; |
39842 | res = src << 1; |
39843 | flag_N = res >> 8; |
39844 | flag_NotZ = res & 0x0000FFFF; |
39845 | WRITE_WORD_F(adr, res) |
39846 | POST_IO |
39847 | RET(20) |
39848 | } |
39849 | |
39850 | // LSL |
39851 | OPCODE(0xE3DF) |
39852 | { |
39853 | u32 adr, res; |
39854 | u32 src, dst; |
39855 | |
39856 | adr = AREG(7); |
39857 | AREG(7) += 2; |
39858 | PRE_IO |
39859 | READ_WORD_F(adr, src) |
39860 | flag_V = 0; |
39861 | flag_X = flag_C = src >> 7; |
39862 | res = src << 1; |
39863 | flag_N = res >> 8; |
39864 | flag_NotZ = res & 0x0000FFFF; |
39865 | WRITE_WORD_F(adr, res) |
39866 | POST_IO |
39867 | RET(12) |
39868 | } |
39869 | |
39870 | // LSL |
39871 | OPCODE(0xE3E7) |
39872 | { |
39873 | u32 adr, res; |
39874 | u32 src, dst; |
39875 | |
39876 | adr = AREG(7) - 2; |
39877 | AREG(7) = adr; |
39878 | PRE_IO |
39879 | READ_WORD_F(adr, src) |
39880 | flag_V = 0; |
39881 | flag_X = flag_C = src >> 7; |
39882 | res = src << 1; |
39883 | flag_N = res >> 8; |
39884 | flag_NotZ = res & 0x0000FFFF; |
39885 | WRITE_WORD_F(adr, res) |
39886 | POST_IO |
39887 | RET(14) |
39888 | } |
39889 | |
39890 | // ROXL |
39891 | OPCODE(0xE5D0) |
39892 | { |
39893 | u32 adr, res; |
39894 | u32 src, dst; |
39895 | |
39896 | adr = AREG((Opcode >> 0) & 7); |
39897 | PRE_IO |
39898 | READ_WORD_F(adr, src) |
39899 | flag_V = 0; |
39900 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39901 | flag_X = flag_C = src >> 7; |
39902 | flag_N = res >> 8; |
39903 | flag_NotZ = res & 0x0000FFFF; |
39904 | WRITE_WORD_F(adr, res) |
39905 | POST_IO |
39906 | RET(12) |
39907 | } |
39908 | |
39909 | // ROXL |
39910 | OPCODE(0xE5D8) |
39911 | { |
39912 | u32 adr, res; |
39913 | u32 src, dst; |
39914 | |
39915 | adr = AREG((Opcode >> 0) & 7); |
39916 | AREG((Opcode >> 0) & 7) += 2; |
39917 | PRE_IO |
39918 | READ_WORD_F(adr, src) |
39919 | flag_V = 0; |
39920 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39921 | flag_X = flag_C = src >> 7; |
39922 | flag_N = res >> 8; |
39923 | flag_NotZ = res & 0x0000FFFF; |
39924 | WRITE_WORD_F(adr, res) |
39925 | POST_IO |
39926 | RET(12) |
39927 | } |
39928 | |
39929 | // ROXL |
39930 | OPCODE(0xE5E0) |
39931 | { |
39932 | u32 adr, res; |
39933 | u32 src, dst; |
39934 | |
39935 | adr = AREG((Opcode >> 0) & 7) - 2; |
39936 | AREG((Opcode >> 0) & 7) = adr; |
39937 | PRE_IO |
39938 | READ_WORD_F(adr, src) |
39939 | flag_V = 0; |
39940 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39941 | flag_X = flag_C = src >> 7; |
39942 | flag_N = res >> 8; |
39943 | flag_NotZ = res & 0x0000FFFF; |
39944 | WRITE_WORD_F(adr, res) |
39945 | POST_IO |
39946 | RET(14) |
39947 | } |
39948 | |
39949 | // ROXL |
39950 | OPCODE(0xE5E8) |
39951 | { |
39952 | u32 adr, res; |
39953 | u32 src, dst; |
39954 | |
39955 | FETCH_SWORD(adr); |
39956 | adr += AREG((Opcode >> 0) & 7); |
39957 | PRE_IO |
39958 | READ_WORD_F(adr, src) |
39959 | flag_V = 0; |
39960 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39961 | flag_X = flag_C = src >> 7; |
39962 | flag_N = res >> 8; |
39963 | flag_NotZ = res & 0x0000FFFF; |
39964 | WRITE_WORD_F(adr, res) |
39965 | POST_IO |
39966 | RET(16) |
39967 | } |
39968 | |
39969 | // ROXL |
39970 | OPCODE(0xE5F0) |
39971 | { |
39972 | u32 adr, res; |
39973 | u32 src, dst; |
39974 | |
39975 | adr = AREG((Opcode >> 0) & 7); |
39976 | DECODE_EXT_WORD |
39977 | PRE_IO |
39978 | READ_WORD_F(adr, src) |
39979 | flag_V = 0; |
39980 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
39981 | flag_X = flag_C = src >> 7; |
39982 | flag_N = res >> 8; |
39983 | flag_NotZ = res & 0x0000FFFF; |
39984 | WRITE_WORD_F(adr, res) |
39985 | POST_IO |
39986 | RET(18) |
39987 | } |
39988 | |
39989 | // ROXL |
39990 | OPCODE(0xE5F8) |
39991 | { |
39992 | u32 adr, res; |
39993 | u32 src, dst; |
39994 | |
39995 | FETCH_SWORD(adr); |
39996 | PRE_IO |
39997 | READ_WORD_F(adr, src) |
39998 | flag_V = 0; |
39999 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
40000 | flag_X = flag_C = src >> 7; |
40001 | flag_N = res >> 8; |
40002 | flag_NotZ = res & 0x0000FFFF; |
40003 | WRITE_WORD_F(adr, res) |
40004 | POST_IO |
40005 | RET(16) |
40006 | } |
40007 | |
40008 | // ROXL |
40009 | OPCODE(0xE5F9) |
40010 | { |
40011 | u32 adr, res; |
40012 | u32 src, dst; |
40013 | |
40014 | FETCH_LONG(adr); |
40015 | PRE_IO |
40016 | READ_WORD_F(adr, src) |
40017 | flag_V = 0; |
40018 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
40019 | flag_X = flag_C = src >> 7; |
40020 | flag_N = res >> 8; |
40021 | flag_NotZ = res & 0x0000FFFF; |
40022 | WRITE_WORD_F(adr, res) |
40023 | POST_IO |
40024 | RET(20) |
40025 | } |
40026 | |
40027 | // ROXL |
40028 | OPCODE(0xE5DF) |
40029 | { |
40030 | u32 adr, res; |
40031 | u32 src, dst; |
40032 | |
40033 | adr = AREG(7); |
40034 | AREG(7) += 2; |
40035 | PRE_IO |
40036 | READ_WORD_F(adr, src) |
40037 | flag_V = 0; |
40038 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
40039 | flag_X = flag_C = src >> 7; |
40040 | flag_N = res >> 8; |
40041 | flag_NotZ = res & 0x0000FFFF; |
40042 | WRITE_WORD_F(adr, res) |
40043 | POST_IO |
40044 | RET(12) |
40045 | } |
40046 | |
40047 | // ROXL |
40048 | OPCODE(0xE5E7) |
40049 | { |
40050 | u32 adr, res; |
40051 | u32 src, dst; |
40052 | |
40053 | adr = AREG(7) - 2; |
40054 | AREG(7) = adr; |
40055 | PRE_IO |
40056 | READ_WORD_F(adr, src) |
40057 | flag_V = 0; |
40058 | res = (src << 1) | ((flag_X & M68K_SR_X) >> 8); |
40059 | flag_X = flag_C = src >> 7; |
40060 | flag_N = res >> 8; |
40061 | flag_NotZ = res & 0x0000FFFF; |
40062 | WRITE_WORD_F(adr, res) |
40063 | POST_IO |
40064 | RET(14) |
40065 | } |
40066 | |
40067 | // ROL |
40068 | OPCODE(0xE7D0) |
40069 | { |
40070 | u32 adr, res; |
40071 | u32 src, dst; |
40072 | |
40073 | adr = AREG((Opcode >> 0) & 7); |
40074 | PRE_IO |
40075 | READ_WORD_F(adr, src) |
40076 | flag_V = 0; |
40077 | flag_C = src >> 7; |
40078 | res = (src << 1) | (src >> 15); |
40079 | flag_N = res >> 8; |
40080 | flag_NotZ = res & 0x0000FFFF; |
40081 | WRITE_WORD_F(adr, res) |
40082 | POST_IO |
40083 | RET(12) |
40084 | } |
40085 | |
40086 | // ROL |
40087 | OPCODE(0xE7D8) |
40088 | { |
40089 | u32 adr, res; |
40090 | u32 src, dst; |
40091 | |
40092 | adr = AREG((Opcode >> 0) & 7); |
40093 | AREG((Opcode >> 0) & 7) += 2; |
40094 | PRE_IO |
40095 | READ_WORD_F(adr, src) |
40096 | flag_V = 0; |
40097 | flag_C = src >> 7; |
40098 | res = (src << 1) | (src >> 15); |
40099 | flag_N = res >> 8; |
40100 | flag_NotZ = res & 0x0000FFFF; |
40101 | WRITE_WORD_F(adr, res) |
40102 | POST_IO |
40103 | RET(12) |
40104 | } |
40105 | |
40106 | // ROL |
40107 | OPCODE(0xE7E0) |
40108 | { |
40109 | u32 adr, res; |
40110 | u32 src, dst; |
40111 | |
40112 | adr = AREG((Opcode >> 0) & 7) - 2; |
40113 | AREG((Opcode >> 0) & 7) = adr; |
40114 | PRE_IO |
40115 | READ_WORD_F(adr, src) |
40116 | flag_V = 0; |
40117 | flag_C = src >> 7; |
40118 | res = (src << 1) | (src >> 15); |
40119 | flag_N = res >> 8; |
40120 | flag_NotZ = res & 0x0000FFFF; |
40121 | WRITE_WORD_F(adr, res) |
40122 | POST_IO |
40123 | RET(14) |
40124 | } |
40125 | |
40126 | // ROL |
40127 | OPCODE(0xE7E8) |
40128 | { |
40129 | u32 adr, res; |
40130 | u32 src, dst; |
40131 | |
40132 | FETCH_SWORD(adr); |
40133 | adr += AREG((Opcode >> 0) & 7); |
40134 | PRE_IO |
40135 | READ_WORD_F(adr, src) |
40136 | flag_V = 0; |
40137 | flag_C = src >> 7; |
40138 | res = (src << 1) | (src >> 15); |
40139 | flag_N = res >> 8; |
40140 | flag_NotZ = res & 0x0000FFFF; |
40141 | WRITE_WORD_F(adr, res) |
40142 | POST_IO |
40143 | RET(16) |
40144 | } |
40145 | |
40146 | // ROL |
40147 | OPCODE(0xE7F0) |
40148 | { |
40149 | u32 adr, res; |
40150 | u32 src, dst; |
40151 | |
40152 | adr = AREG((Opcode >> 0) & 7); |
40153 | DECODE_EXT_WORD |
40154 | PRE_IO |
40155 | READ_WORD_F(adr, src) |
40156 | flag_V = 0; |
40157 | flag_C = src >> 7; |
40158 | res = (src << 1) | (src >> 15); |
40159 | flag_N = res >> 8; |
40160 | flag_NotZ = res & 0x0000FFFF; |
40161 | WRITE_WORD_F(adr, res) |
40162 | POST_IO |
40163 | RET(18) |
40164 | } |
40165 | |
40166 | // ROL |
40167 | OPCODE(0xE7F8) |
40168 | { |
40169 | u32 adr, res; |
40170 | u32 src, dst; |
40171 | |
40172 | FETCH_SWORD(adr); |
40173 | PRE_IO |
40174 | READ_WORD_F(adr, src) |
40175 | flag_V = 0; |
40176 | flag_C = src >> 7; |
40177 | res = (src << 1) | (src >> 15); |
40178 | flag_N = res >> 8; |
40179 | flag_NotZ = res & 0x0000FFFF; |
40180 | WRITE_WORD_F(adr, res) |
40181 | POST_IO |
40182 | RET(16) |
40183 | } |
40184 | |
40185 | // ROL |
40186 | OPCODE(0xE7F9) |
40187 | { |
40188 | u32 adr, res; |
40189 | u32 src, dst; |
40190 | |
40191 | FETCH_LONG(adr); |
40192 | PRE_IO |
40193 | READ_WORD_F(adr, src) |
40194 | flag_V = 0; |
40195 | flag_C = src >> 7; |
40196 | res = (src << 1) | (src >> 15); |
40197 | flag_N = res >> 8; |
40198 | flag_NotZ = res & 0x0000FFFF; |
40199 | WRITE_WORD_F(adr, res) |
40200 | POST_IO |
40201 | RET(20) |
40202 | } |
40203 | |
40204 | // ROL |
40205 | OPCODE(0xE7DF) |
40206 | { |
40207 | u32 adr, res; |
40208 | u32 src, dst; |
40209 | |
40210 | adr = AREG(7); |
40211 | AREG(7) += 2; |
40212 | PRE_IO |
40213 | READ_WORD_F(adr, src) |
40214 | flag_V = 0; |
40215 | flag_C = src >> 7; |
40216 | res = (src << 1) | (src >> 15); |
40217 | flag_N = res >> 8; |
40218 | flag_NotZ = res & 0x0000FFFF; |
40219 | WRITE_WORD_F(adr, res) |
40220 | POST_IO |
40221 | RET(12) |
40222 | } |
40223 | |
40224 | // ROL |
40225 | OPCODE(0xE7E7) |
40226 | { |
40227 | u32 adr, res; |
40228 | u32 src, dst; |
40229 | |
40230 | adr = AREG(7) - 2; |
40231 | AREG(7) = adr; |
40232 | PRE_IO |
40233 | READ_WORD_F(adr, src) |
40234 | flag_V = 0; |
40235 | flag_C = src >> 7; |
40236 | res = (src << 1) | (src >> 15); |
40237 | flag_N = res >> 8; |
40238 | flag_NotZ = res & 0x0000FFFF; |
40239 | WRITE_WORD_F(adr, res) |
40240 | POST_IO |
40241 | RET(14) |
40242 | } |
40243 | |
c060a9ab |
40244 | #ifdef PICODRIVE_HACK |
8187ba84 |
40245 | #if 0 |
40246 | #define UPDATE_IDLE_COUNT { \ |
40247 | extern int idle_hit_counter; \ |
40248 | idle_hit_counter++; \ |
40249 | } |
40250 | #else |
40251 | #define UPDATE_IDLE_COUNT |
40252 | #endif |
40253 | |
c060a9ab |
40254 | // BRA |
40255 | OPCODE(0x6001_idle) |
40256 | { |
40257 | #ifdef FAMEC_CHECK_BRANCHES |
be26eb23 |
40258 | u32 newPC = GET_PC; |
c060a9ab |
40259 | s8 offs=Opcode; |
40260 | newPC += offs; |
40261 | SET_PC(newPC); |
40262 | CHECK_BRANCH_EXCEPTION(offs) |
40263 | #else |
40264 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
40265 | #endif |
8187ba84 |
40266 | UPDATE_IDLE_COUNT |
fcf94fcc |
40267 | RET0() |
c060a9ab |
40268 | } |
40269 | |
40270 | // BCC |
40271 | OPCODE(0x6601_idle) |
40272 | { |
40273 | if (flag_NotZ) |
40274 | { |
8187ba84 |
40275 | UPDATE_IDLE_COUNT |
c060a9ab |
40276 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
fcf94fcc |
40277 | //if (idle_hit) |
40278 | RET0() |
c060a9ab |
40279 | } |
40280 | RET(8) |
40281 | } |
40282 | |
40283 | OPCODE(0x6701_idle) |
40284 | { |
40285 | if (!flag_NotZ) |
40286 | { |
8187ba84 |
40287 | UPDATE_IDLE_COUNT |
c060a9ab |
40288 | PC += ((s8)(Opcode & 0xFE)) >> 1; |
fcf94fcc |
40289 | //if (idle_hit) |
40290 | RET0() |
c060a9ab |
40291 | } |
40292 | RET(8) |
40293 | } |
40294 | |
40295 | |
0219d379 |
40296 | extern int SekIsIdleReady(void); |
c060a9ab |
40297 | extern int SekIsIdleCode(unsigned short *dst, int bytes); |
5ed2a20e |
40298 | extern int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx); |
c060a9ab |
40299 | |
40300 | OPCODE(idle_detector_bcc8) |
40301 | { |
c060a9ab |
40302 | int frame_count, cond_true, bytes, ret, newop; |
40303 | u16 *dest_pc; |
40304 | |
40305 | dest_pc = PC + (((s8)(Opcode & 0xFE)) >> 1); |
40306 | |
0219d379 |
40307 | if (!SekIsIdleReady()) |
c060a9ab |
40308 | goto end; |
40309 | |
40310 | bytes = 0 - (s8)(Opcode & 0xFE) - 2; |
40311 | ret = SekIsIdleCode(dest_pc, bytes); |
40312 | newop = (Opcode & 0xfe) | 0x7100; |
40313 | if (!ret) newop |= 0x200; |
5ed2a20e |
40314 | if ( Opcode & 0x0100) newop |= 0x400; // beq |
40315 | if (!(Opcode & 0x0f00)) newop |= 0xc00; // bra |
c060a9ab |
40316 | |
7669591e |
40317 | ret = SekRegisterIdlePatch(GET_PC - 2, Opcode, newop, ctx); |
c060a9ab |
40318 | switch (ret) |
40319 | { |
40320 | case 0: PC[-1] = newop; break; |
40321 | case 1: break; |
5ed2a20e |
40322 | case 2: JumpTable[Opcode] = (Opcode & 0x0f00) ? |
40323 | ((Opcode & 0x0100) ? CAST_OP(0x6701) : CAST_OP(0x6601)) : |
40324 | CAST_OP(0x6001); break; |
c060a9ab |
40325 | } |
40326 | |
40327 | end: |
5ed2a20e |
40328 | if ((Opcode & 0xff00) == 0x6000) cond_true = 1; |
40329 | else cond_true = (Opcode & 0x0100) ? !flag_NotZ : flag_NotZ; // beq? |
c060a9ab |
40330 | if (cond_true) |
40331 | { |
40332 | PC = dest_pc; |
7669591e |
40333 | ctx->io_cycle_counter -= 2; |
c060a9ab |
40334 | } |
40335 | RET(8) |
40336 | } |
40337 | |
c060a9ab |
40338 | #endif // PICODRIVE_HACK |