cc68a136 |
1 | /* ======================================================================== */\r |
2 | /* ========================= LICENSING & COPYRIGHT ======================== */\r |
3 | /* ======================================================================== */\r |
4 | /*\r |
5 | * MUSASHI\r |
6 | * Version 3.3\r |
7 | *\r |
8 | * A portable Motorola M680x0 processor emulation engine.\r |
9 | * Copyright 1998-2001 Karl Stenerud. All rights reserved.\r |
10 | *\r |
11 | * This code may be freely used for non-commercial purposes as long as this\r |
12 | * copyright notice remains unaltered in the source code and any binary files\r |
13 | * containing this code in compiled form.\r |
14 | *\r |
15 | * All other lisencing terms must be negotiated with the author\r |
16 | * (Karl Stenerud).\r |
17 | *\r |
18 | * The latest version of this code can be obtained at:\r |
19 | * http://kstenerud.cjb.net\r |
20 | */\r |
21 | \r |
22 | \r |
23 | \r |
24 | /* ======================================================================== */\r |
25 | /* ================================ INCLUDES ============================== */\r |
26 | /* ======================================================================== */\r |
27 | \r |
28 | #include <stdlib.h>\r |
29 | #include <stdio.h>\r |
30 | #include <string.h>\r |
31 | #include "m68k.h"\r |
32 | \r |
33 | #ifndef DECL_SPEC\r |
34 | #define DECL_SPEC\r |
35 | #endif\r |
36 | \r |
37 | /* ======================================================================== */\r |
38 | /* ============================ GENERAL DEFINES =========================== */\r |
39 | /* ======================================================================== */\r |
40 | \r |
41 | /* unsigned int and int must be at least 32 bits wide */\r |
42 | #undef uint\r |
43 | #define uint unsigned int\r |
44 | \r |
45 | /* Bit Isolation Functions */\r |
46 | #define BIT_0(A) ((A) & 0x00000001)\r |
47 | #define BIT_1(A) ((A) & 0x00000002)\r |
48 | #define BIT_2(A) ((A) & 0x00000004)\r |
49 | #define BIT_3(A) ((A) & 0x00000008)\r |
50 | #define BIT_4(A) ((A) & 0x00000010)\r |
51 | #define BIT_5(A) ((A) & 0x00000020)\r |
52 | #define BIT_6(A) ((A) & 0x00000040)\r |
53 | #define BIT_7(A) ((A) & 0x00000080)\r |
54 | #define BIT_8(A) ((A) & 0x00000100)\r |
55 | #define BIT_9(A) ((A) & 0x00000200)\r |
56 | #define BIT_A(A) ((A) & 0x00000400)\r |
57 | #define BIT_B(A) ((A) & 0x00000800)\r |
58 | #define BIT_C(A) ((A) & 0x00001000)\r |
59 | #define BIT_D(A) ((A) & 0x00002000)\r |
60 | #define BIT_E(A) ((A) & 0x00004000)\r |
61 | #define BIT_F(A) ((A) & 0x00008000)\r |
62 | #define BIT_10(A) ((A) & 0x00010000)\r |
63 | #define BIT_11(A) ((A) & 0x00020000)\r |
64 | #define BIT_12(A) ((A) & 0x00040000)\r |
65 | #define BIT_13(A) ((A) & 0x00080000)\r |
66 | #define BIT_14(A) ((A) & 0x00100000)\r |
67 | #define BIT_15(A) ((A) & 0x00200000)\r |
68 | #define BIT_16(A) ((A) & 0x00400000)\r |
69 | #define BIT_17(A) ((A) & 0x00800000)\r |
70 | #define BIT_18(A) ((A) & 0x01000000)\r |
71 | #define BIT_19(A) ((A) & 0x02000000)\r |
72 | #define BIT_1A(A) ((A) & 0x04000000)\r |
73 | #define BIT_1B(A) ((A) & 0x08000000)\r |
74 | #define BIT_1C(A) ((A) & 0x10000000)\r |
75 | #define BIT_1D(A) ((A) & 0x20000000)\r |
76 | #define BIT_1E(A) ((A) & 0x40000000)\r |
77 | #define BIT_1F(A) ((A) & 0x80000000)\r |
78 | \r |
79 | /* These are the CPU types understood by this disassembler */\r |
80 | #define TYPE_68000 1\r |
81 | #define TYPE_68008 2\r |
82 | #define TYPE_68010 4\r |
83 | #define TYPE_68020 8\r |
84 | #define TYPE_68030 16\r |
85 | #define TYPE_68040 32\r |
86 | \r |
87 | #define M68000_ONLY (TYPE_68000 | TYPE_68008)\r |
88 | \r |
89 | #define M68010_ONLY TYPE_68010\r |
90 | #define M68010_LESS (TYPE_68000 | TYPE_68008 | TYPE_68010)\r |
91 | #define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040)\r |
92 | \r |
93 | #define M68020_ONLY TYPE_68020\r |
94 | #define M68020_LESS (TYPE_68010 | TYPE_68020)\r |
95 | #define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040)\r |
96 | \r |
97 | #define M68030_ONLY TYPE_68030\r |
98 | #define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030)\r |
99 | #define M68030_PLUS (TYPE_68030 | TYPE_68040)\r |
100 | \r |
101 | #define M68040_PLUS TYPE_68040\r |
102 | \r |
103 | \r |
104 | /* Extension word formats */\r |
105 | #define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff)\r |
106 | #define EXT_FULL(A) BIT_8(A)\r |
107 | #define EXT_EFFECTIVE_ZERO(A) (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0)\r |
108 | #define EXT_BASE_REGISTER_PRESENT(A) (!BIT_7(A))\r |
109 | #define EXT_INDEX_REGISTER_PRESENT(A) (!BIT_6(A))\r |
110 | #define EXT_INDEX_REGISTER(A) (((A)>>12)&7)\r |
111 | #define EXT_INDEX_PRE_POST(A) (EXT_INDEX_PRESENT(A) && (A)&3)\r |
112 | #define EXT_INDEX_PRE(A) (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0)\r |
113 | #define EXT_INDEX_POST(A) (EXT_INDEX_PRESENT(A) && ((A)&7) > 4)\r |
114 | #define EXT_INDEX_SCALE(A) (((A)>>9)&3)\r |
115 | #define EXT_INDEX_LONG(A) BIT_B(A)\r |
116 | #define EXT_INDEX_AR(A) BIT_F(A)\r |
117 | #define EXT_BASE_DISPLACEMENT_PRESENT(A) (((A)&0x30) > 0x10)\r |
118 | #define EXT_BASE_DISPLACEMENT_WORD(A) (((A)&0x30) == 0x20)\r |
119 | #define EXT_BASE_DISPLACEMENT_LONG(A) (((A)&0x30) == 0x30)\r |
120 | #define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44)\r |
121 | #define EXT_OUTER_DISPLACEMENT_WORD(A) (((A)&3) == 2 && ((A)&0x47) < 0x44)\r |
122 | #define EXT_OUTER_DISPLACEMENT_LONG(A) (((A)&3) == 3 && ((A)&0x47) < 0x44)\r |
123 | \r |
124 | \r |
125 | /* Opcode flags */\r |
126 | #if M68K_COMPILE_FOR_MAME == OPT_ON\r |
127 | #define SET_OPCODE_FLAGS(x) g_opcode_type = x;\r |
128 | #define COMBINE_OPCODE_FLAGS(x) ((x) | g_opcode_type | DASMFLAG_SUPPORTED)\r |
129 | #else\r |
130 | #define SET_OPCODE_FLAGS(x)\r |
131 | #define COMBINE_OPCODE_FLAGS(x) (x)\r |
132 | #endif\r |
133 | \r |
134 | \r |
135 | /* ======================================================================== */\r |
136 | /* =============================== PROTOTYPES ============================= */\r |
137 | /* ======================================================================== */\r |
138 | \r |
139 | /* Read data at the PC and increment PC */\r |
140 | uint read_imm_8(void);\r |
141 | uint read_imm_16(void);\r |
142 | uint read_imm_32(void);\r |
143 | \r |
144 | /* Read data at the PC but don't imcrement the PC */\r |
145 | uint peek_imm_8(void);\r |
146 | uint peek_imm_16(void);\r |
147 | uint peek_imm_32(void);\r |
148 | \r |
149 | /* make signed integers 100% portably */\r |
150 | static int make_int_8(int value);\r |
151 | static int make_int_16(int value);\r |
152 | \r |
153 | /* make a string of a hex value */\r |
154 | static char* make_signed_hex_str_8(uint val);\r |
155 | static char* make_signed_hex_str_16(uint val);\r |
156 | static char* make_signed_hex_str_32(uint val);\r |
157 | \r |
158 | /* make string of ea mode */\r |
159 | static char* get_ea_mode_str(uint instruction, uint size);\r |
160 | \r |
161 | char* get_ea_mode_str_8(uint instruction);\r |
162 | char* get_ea_mode_str_16(uint instruction);\r |
163 | char* get_ea_mode_str_32(uint instruction);\r |
164 | \r |
165 | /* make string of immediate value */\r |
166 | static char* get_imm_str_s(uint size);\r |
167 | static char* get_imm_str_u(uint size);\r |
168 | \r |
169 | char* get_imm_str_s8(void);\r |
170 | char* get_imm_str_s16(void);\r |
171 | char* get_imm_str_s32(void);\r |
172 | \r |
173 | /* Stuff to build the opcode handler jump table */\r |
174 | static void build_opcode_table(void);\r |
175 | static int valid_ea(uint opcode, uint mask);\r |
176 | static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr);\r |
177 | \r |
178 | /* used to build opcode handler jump table */\r |
179 | typedef struct\r |
180 | {\r |
181 | void (*opcode_handler)(void); /* handler function */\r |
182 | uint mask; /* mask on opcode */\r |
183 | uint match; /* what to match after masking */\r |
184 | uint ea_mask; /* what ea modes are allowed */\r |
185 | } opcode_struct;\r |
186 | \r |
187 | \r |
188 | \r |
189 | /* ======================================================================== */\r |
190 | /* ================================= DATA ================================= */\r |
191 | /* ======================================================================== */\r |
192 | \r |
193 | /* Opcode handler jump table */\r |
194 | static void (*g_instruction_table[0x10000])(void);\r |
195 | /* Flag if disassembler initialized */\r |
196 | static int g_initialized = 0;\r |
197 | \r |
198 | /* Address mask to simulate address lines */\r |
199 | static unsigned int g_address_mask = 0xffffffff;\r |
200 | \r |
201 | static char g_dasm_str[100]; /* string to hold disassembly */\r |
202 | static char g_helper_str[100]; /* string to hold helpful info */\r |
203 | static uint g_cpu_pc; /* program counter */\r |
204 | static uint g_cpu_ir; /* instruction register */\r |
205 | static uint g_cpu_type;\r |
206 | static uint g_opcode_type;\r |
207 | static unsigned char* g_rawop;\r |
208 | static uint g_rawbasepc;\r |
209 | static uint g_rawlength;\r |
210 | \r |
211 | /* used by ops like asr, ror, addq, etc */\r |
212 | static uint g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};\r |
213 | \r |
214 | static uint g_5bit_data_table[32] =\r |
215 | {\r |
216 | 32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\r |
217 | 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31\r |
218 | };\r |
219 | \r |
220 | static const char* g_cc[16] =\r |
221 | {"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"};\r |
222 | \r |
223 | static const char* g_cpcc[64] =\r |
224 | {/* 000 001 010 011 100 101 110 111 */\r |
225 | "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */\r |
226 | "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */\r |
227 | "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */\r |
228 | "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */\r |
229 | "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */\r |
230 | "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */\r |
231 | "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */\r |
232 | "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */\r |
233 | };\r |
234 | \r |
235 | \r |
236 | /* ======================================================================== */\r |
237 | /* =========================== UTILITY FUNCTIONS ========================== */\r |
238 | /* ======================================================================== */\r |
239 | \r |
240 | #define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \\r |
241 | if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \\r |
242 | { \\r |
243 | if((g_cpu_ir & 0xf000) == 0xf000) \\r |
244 | d68000_1111(); \\r |
245 | else d68000_illegal(); \\r |
246 | return; \\r |
247 | }\r |
248 | \r |
249 | static uint dasm_read_imm_8(uint advance)\r |
250 | {\r |
251 | uint result;\r |
252 | if (g_rawop)\r |
253 | result = g_rawop[g_cpu_pc + 1 - g_rawbasepc];\r |
254 | else\r |
255 | result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xff;\r |
256 | g_cpu_pc += advance;\r |
257 | return result;\r |
258 | }\r |
259 | \r |
260 | static uint dasm_read_imm_16(uint advance)\r |
261 | {\r |
262 | uint result;\r |
263 | if (g_rawop)\r |
264 | result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) |\r |
265 | g_rawop[g_cpu_pc + 1 - g_rawbasepc];\r |
266 | else\r |
267 | result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xffff; // & 0xff; ??\r |
268 | g_cpu_pc += advance;\r |
269 | return result;\r |
270 | }\r |
271 | \r |
272 | static uint dasm_read_imm_32(uint advance)\r |
273 | {\r |
274 | uint result;\r |
275 | if (g_rawop)\r |
276 | result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 24) |\r |
277 | (g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) |\r |
278 | (g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) |\r |
279 | g_rawop[g_cpu_pc + 3 - g_rawbasepc];\r |
280 | else\r |
281 | result = m68k_read_disassembler_32(g_cpu_pc & g_address_mask); // & 0xff; ??\r |
282 | g_cpu_pc += advance;\r |
283 | return result;\r |
284 | }\r |
285 | \r |
286 | #define read_imm_8() dasm_read_imm_8(2)\r |
287 | #define read_imm_16() dasm_read_imm_16(2)\r |
288 | #define read_imm_32() dasm_read_imm_32(4)\r |
289 | \r |
290 | #define peek_imm_8() dasm_read_imm_8(0)\r |
291 | #define peek_imm_16() dasm_read_imm_16(0)\r |
292 | #define peek_imm_32() dasm_read_imm_32(0)\r |
293 | \r |
294 | /* Fake a split interface */\r |
295 | #define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0)\r |
296 | #define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1)\r |
297 | #define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2)\r |
298 | \r |
299 | #define get_imm_str_s8() get_imm_str_s(0)\r |
300 | #define get_imm_str_s16() get_imm_str_s(1)\r |
301 | #define get_imm_str_s32() get_imm_str_s(2)\r |
302 | \r |
303 | #define get_imm_str_u8() get_imm_str_u(0)\r |
304 | #define get_imm_str_u16() get_imm_str_u(1)\r |
305 | #define get_imm_str_u32() get_imm_str_u(2)\r |
306 | \r |
307 | \r |
308 | /* 100% portable signed int generators */\r |
309 | static int make_int_8(int value)\r |
310 | {\r |
311 | return (value & 0x80) ? value | ~0xff : value & 0xff;\r |
312 | }\r |
313 | \r |
314 | static int make_int_16(int value)\r |
315 | {\r |
316 | return (value & 0x8000) ? value | ~0xffff : value & 0xffff;\r |
317 | }\r |
318 | \r |
319 | \r |
320 | /* Get string representation of hex values */\r |
321 | static char* make_signed_hex_str_8(uint val)\r |
322 | {\r |
323 | static char str[20];\r |
324 | \r |
325 | val &= 0xff;\r |
326 | \r |
327 | if(val == 0x80)\r |
328 | sprintf(str, "-$80");\r |
329 | else if(val & 0x80)\r |
330 | sprintf(str, "-$%x", (0-val) & 0x7f);\r |
331 | else\r |
332 | sprintf(str, "$%x", val & 0x7f);\r |
333 | \r |
334 | return str;\r |
335 | }\r |
336 | \r |
337 | static char* make_signed_hex_str_16(uint val)\r |
338 | {\r |
339 | static char str[20];\r |
340 | \r |
341 | val &= 0xffff;\r |
342 | \r |
343 | if(val == 0x8000)\r |
344 | sprintf(str, "-$8000");\r |
345 | else if(val & 0x8000)\r |
346 | sprintf(str, "-$%x", (0-val) & 0x7fff);\r |
347 | else\r |
348 | sprintf(str, "$%x", val & 0x7fff);\r |
349 | \r |
350 | return str;\r |
351 | }\r |
352 | \r |
353 | static char* make_signed_hex_str_32(uint val)\r |
354 | {\r |
355 | static char str[20];\r |
356 | \r |
357 | val &= 0xffffffff;\r |
358 | \r |
359 | if(val == 0x80000000)\r |
360 | sprintf(str, "-$80000000");\r |
361 | else if(val & 0x80000000)\r |
362 | sprintf(str, "-$%x", (0-val) & 0x7fffffff);\r |
363 | else\r |
364 | sprintf(str, "$%x", val & 0x7fffffff);\r |
365 | \r |
366 | return str;\r |
367 | }\r |
368 | \r |
369 | \r |
370 | /* make string of immediate value */\r |
371 | static char* get_imm_str_s(uint size)\r |
372 | {\r |
373 | static char str[15];\r |
374 | if(size == 0)\r |
375 | sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8()));\r |
376 | else if(size == 1)\r |
377 | sprintf(str, "#%s", make_signed_hex_str_16(read_imm_16()));\r |
378 | else\r |
379 | sprintf(str, "#%s", make_signed_hex_str_32(read_imm_32()));\r |
380 | return str;\r |
381 | }\r |
382 | \r |
383 | static char* get_imm_str_u(uint size)\r |
384 | {\r |
385 | static char str[15];\r |
386 | if(size == 0)\r |
387 | sprintf(str, "#$%x", read_imm_8() & 0xff);\r |
388 | else if(size == 1)\r |
389 | sprintf(str, "#$%x", read_imm_16() & 0xffff);\r |
390 | else\r |
391 | sprintf(str, "#$%x", read_imm_32() & 0xffffffff);\r |
392 | return str;\r |
393 | }\r |
394 | \r |
395 | /* Make string of effective address mode */\r |
396 | static char* get_ea_mode_str(uint instruction, uint size)\r |
397 | {\r |
398 | static char b1[64];\r |
399 | static char b2[64];\r |
400 | static char* mode = b2;\r |
401 | uint extension;\r |
402 | uint base;\r |
403 | uint outer;\r |
404 | char base_reg[4];\r |
405 | char index_reg[8];\r |
406 | uint preindex;\r |
407 | uint postindex;\r |
408 | uint comma = 0;\r |
409 | uint temp_value;\r |
410 | char invalid_mode = 0;\r |
411 | \r |
412 | /* Switch buffers so we don't clobber on a double-call to this function */\r |
413 | mode = mode == b1 ? b2 : b1;\r |
414 | \r |
415 | switch(instruction & 0x3f)\r |
416 | {\r |
417 | case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:\r |
418 | /* data register direct */\r |
419 | sprintf(mode, "D%d", instruction&7);\r |
420 | break;\r |
421 | case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:\r |
422 | /* address register direct */\r |
423 | sprintf(mode, "A%d", instruction&7);\r |
424 | break;\r |
425 | case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:\r |
426 | /* address register indirect */\r |
427 | sprintf(mode, "(A%d)", instruction&7);\r |
428 | break;\r |
429 | case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:\r |
430 | /* address register indirect with postincrement */\r |
431 | sprintf(mode, "(A%d)+", instruction&7);\r |
432 | break;\r |
433 | case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:\r |
434 | /* address register indirect with predecrement */\r |
435 | sprintf(mode, "-(A%d)", instruction&7);\r |
436 | break;\r |
437 | case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:\r |
438 | /* address register indirect with displacement*/\r |
439 | sprintf(mode, "(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7);\r |
440 | break;\r |
441 | case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:\r |
442 | /* address register indirect with index */\r |
443 | extension = read_imm_16();\r |
444 | \r |
445 | if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))\r |
446 | {\r |
447 | invalid_mode = 1;\r |
448 | break;\r |
449 | }\r |
450 | \r |
451 | if(EXT_FULL(extension))\r |
452 | {\r |
453 | if(g_cpu_type & M68010_LESS)\r |
454 | {\r |
455 | invalid_mode = 1;\r |
456 | break;\r |
457 | }\r |
458 | \r |
459 | if(EXT_EFFECTIVE_ZERO(extension))\r |
460 | {\r |
461 | strcpy(mode, "0");\r |
462 | break;\r |
463 | }\r |
464 | \r |
465 | base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;\r |
466 | outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;\r |
467 | if(EXT_BASE_REGISTER_PRESENT(extension))\r |
468 | sprintf(base_reg, "A%d", instruction&7);\r |
469 | else\r |
470 | *base_reg = 0;\r |
471 | if(EXT_INDEX_REGISTER_PRESENT(extension))\r |
472 | {\r |
473 | sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r |
474 | if(EXT_INDEX_SCALE(extension))\r |
475 | sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));\r |
476 | }\r |
477 | else\r |
478 | *index_reg = 0;\r |
479 | preindex = (extension&7) > 0 && (extension&7) < 4;\r |
480 | postindex = (extension&7) > 4;\r |
481 | \r |
482 | strcpy(mode, "(");\r |
483 | if(preindex || postindex)\r |
484 | strcat(mode, "[");\r |
485 | if(base)\r |
486 | {\r |
487 | strcat(mode, make_signed_hex_str_16(base));\r |
488 | comma = 1;\r |
489 | }\r |
490 | if(*base_reg)\r |
491 | {\r |
492 | if(comma)\r |
493 | strcat(mode, ",");\r |
494 | strcat(mode, base_reg);\r |
495 | comma = 1;\r |
496 | }\r |
497 | if(postindex)\r |
498 | {\r |
499 | strcat(mode, "]");\r |
500 | comma = 1;\r |
501 | }\r |
502 | if(*index_reg)\r |
503 | {\r |
504 | if(comma)\r |
505 | strcat(mode, ",");\r |
506 | strcat(mode, index_reg);\r |
507 | comma = 1;\r |
508 | }\r |
509 | if(preindex)\r |
510 | {\r |
511 | strcat(mode, "]");\r |
512 | comma = 1;\r |
513 | }\r |
514 | if(outer)\r |
515 | {\r |
516 | if(comma)\r |
517 | strcat(mode, ",");\r |
518 | strcat(mode, make_signed_hex_str_16(outer));\r |
519 | }\r |
520 | strcat(mode, ")");\r |
521 | break;\r |
522 | }\r |
523 | \r |
524 | if(EXT_8BIT_DISPLACEMENT(extension) == 0)\r |
525 | sprintf(mode, "(A%d,%c%d.%c", instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r |
526 | else\r |
527 | sprintf(mode, "(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r |
528 | if(EXT_INDEX_SCALE(extension))\r |
529 | sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));\r |
530 | strcat(mode, ")");\r |
531 | break;\r |
532 | case 0x38:\r |
533 | /* absolute short address */\r |
534 | sprintf(mode, "$%x.w", read_imm_16());\r |
535 | break;\r |
536 | case 0x39:\r |
537 | /* absolute long address */\r |
538 | sprintf(mode, "$%x.l", read_imm_32());\r |
539 | break;\r |
540 | case 0x3a:\r |
541 | /* program counter with displacement */\r |
542 | temp_value = read_imm_16();\r |
543 | sprintf(mode, "(%s,PC)", make_signed_hex_str_16(temp_value));\r |
544 | sprintf(g_helper_str, "; ($%x)", (make_int_16(temp_value) + g_cpu_pc-2) & 0xffffffff);\r |
545 | break;\r |
546 | case 0x3b:\r |
547 | /* program counter with index */\r |
548 | extension = read_imm_16();\r |
549 | \r |
550 | if((g_cpu_type & M68010_LESS) && EXT_INDEX_SCALE(extension))\r |
551 | {\r |
552 | invalid_mode = 1;\r |
553 | break;\r |
554 | }\r |
555 | \r |
556 | if(EXT_FULL(extension))\r |
557 | {\r |
558 | if(g_cpu_type & M68010_LESS)\r |
559 | {\r |
560 | invalid_mode = 1;\r |
561 | break;\r |
562 | }\r |
563 | \r |
564 | if(EXT_EFFECTIVE_ZERO(extension))\r |
565 | {\r |
566 | strcpy(mode, "0");\r |
567 | break;\r |
568 | }\r |
569 | base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;\r |
570 | outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;\r |
571 | if(EXT_BASE_REGISTER_PRESENT(extension))\r |
572 | strcpy(base_reg, "PC");\r |
573 | else\r |
574 | *base_reg = 0;\r |
575 | if(EXT_INDEX_REGISTER_PRESENT(extension))\r |
576 | {\r |
577 | sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r |
578 | if(EXT_INDEX_SCALE(extension))\r |
579 | sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));\r |
580 | }\r |
581 | else\r |
582 | *index_reg = 0;\r |
583 | preindex = (extension&7) > 0 && (extension&7) < 4;\r |
584 | postindex = (extension&7) > 4;\r |
585 | \r |
586 | strcpy(mode, "(");\r |
587 | if(preindex || postindex)\r |
588 | strcat(mode, "[");\r |
589 | if(base)\r |
590 | {\r |
591 | strcat(mode, make_signed_hex_str_16(base));\r |
592 | comma = 1;\r |
593 | }\r |
594 | if(*base_reg)\r |
595 | {\r |
596 | if(comma)\r |
597 | strcat(mode, ",");\r |
598 | strcat(mode, base_reg);\r |
599 | comma = 1;\r |
600 | }\r |
601 | if(postindex)\r |
602 | {\r |
603 | strcat(mode, "]");\r |
604 | comma = 1;\r |
605 | }\r |
606 | if(*index_reg)\r |
607 | {\r |
608 | if(comma)\r |
609 | strcat(mode, ",");\r |
610 | strcat(mode, index_reg);\r |
611 | comma = 1;\r |
612 | }\r |
613 | if(preindex)\r |
614 | {\r |
615 | strcat(mode, "]");\r |
616 | comma = 1;\r |
617 | }\r |
618 | if(outer)\r |
619 | {\r |
620 | if(comma)\r |
621 | strcat(mode, ",");\r |
622 | strcat(mode, make_signed_hex_str_16(outer));\r |
623 | }\r |
624 | strcat(mode, ")");\r |
625 | break;\r |
626 | }\r |
627 | \r |
628 | if(EXT_8BIT_DISPLACEMENT(extension) == 0)\r |
629 | sprintf(mode, "(PC,%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r |
630 | else\r |
631 | sprintf(mode, "(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');\r |
632 | if(EXT_INDEX_SCALE(extension))\r |
633 | sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));\r |
634 | strcat(mode, ")");\r |
635 | break;\r |
636 | case 0x3c:\r |
637 | /* Immediate */\r |
638 | sprintf(mode, "%s", get_imm_str_u(size));\r |
639 | break;\r |
640 | default:\r |
641 | invalid_mode = 1;\r |
642 | }\r |
643 | \r |
644 | if(invalid_mode)\r |
645 | sprintf(mode, "INVALID %x", instruction & 0x3f);\r |
646 | \r |
647 | return mode;\r |
648 | }\r |
649 | \r |
650 | \r |
651 | \r |
652 | /* ======================================================================== */\r |
653 | /* ========================= INSTRUCTION HANDLERS ========================= */\r |
654 | /* ======================================================================== */\r |
655 | /* Instruction handler function names follow this convention:\r |
656 | *\r |
657 | * d68000_NAME_EXTENSIONS(void)\r |
658 | * where NAME is the name of the opcode it handles and EXTENSIONS are any\r |
659 | * extensions for special instances of that opcode.\r |
660 | *\r |
661 | * Examples:\r |
662 | * d68000_add_er_8(): add opcode, from effective address to register,\r |
663 | * size = byte\r |
664 | *\r |
665 | * d68000_asr_s_8(): arithmetic shift right, static count, size = byte\r |
666 | *\r |
667 | *\r |
668 | * Common extensions:\r |
669 | * 8 : size = byte\r |
670 | * 16 : size = word\r |
671 | * 32 : size = long\r |
672 | * rr : register to register\r |
673 | * mm : memory to memory\r |
674 | * r : register\r |
675 | * s : static\r |
676 | * er : effective address -> register\r |
677 | * re : register -> effective address\r |
678 | * ea : using effective address mode of operation\r |
679 | * d : data register direct\r |
680 | * a : address register direct\r |
681 | * ai : address register indirect\r |
682 | * pi : address register indirect with postincrement\r |
683 | * pd : address register indirect with predecrement\r |
684 | * di : address register indirect with displacement\r |
685 | * ix : address register indirect with index\r |
686 | * aw : absolute word\r |
687 | * al : absolute long\r |
688 | */\r |
689 | \r |
690 | static void d68000_illegal(void)\r |
691 | {\r |
692 | sprintf(g_dasm_str, "dc.w $%04x; ILLEGAL", g_cpu_ir);\r |
693 | }\r |
694 | \r |
695 | static void d68000_1010(void)\r |
696 | {\r |
697 | sprintf(g_dasm_str, "dc.w $%04x; opcode 1010", g_cpu_ir);\r |
698 | }\r |
699 | \r |
700 | \r |
701 | static void d68000_1111(void)\r |
702 | {\r |
703 | sprintf(g_dasm_str, "dc.w $%04x; opcode 1111", g_cpu_ir);\r |
704 | }\r |
705 | \r |
706 | \r |
707 | static void d68000_abcd_rr(void)\r |
708 | {\r |
709 | sprintf(g_dasm_str, "abcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
710 | }\r |
711 | \r |
712 | \r |
713 | static void d68000_abcd_mm(void)\r |
714 | {\r |
715 | sprintf(g_dasm_str, "abcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
716 | }\r |
717 | \r |
718 | static void d68000_add_er_8(void)\r |
719 | {\r |
720 | sprintf(g_dasm_str, "add.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
721 | }\r |
722 | \r |
723 | \r |
724 | static void d68000_add_er_16(void)\r |
725 | {\r |
726 | sprintf(g_dasm_str, "add.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
727 | }\r |
728 | \r |
729 | static void d68000_add_er_32(void)\r |
730 | {\r |
731 | sprintf(g_dasm_str, "add.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
732 | }\r |
733 | \r |
734 | static void d68000_add_re_8(void)\r |
735 | {\r |
736 | sprintf(g_dasm_str, "add.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
737 | }\r |
738 | \r |
739 | static void d68000_add_re_16(void)\r |
740 | {\r |
741 | sprintf(g_dasm_str, "add.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r |
742 | }\r |
743 | \r |
744 | static void d68000_add_re_32(void)\r |
745 | {\r |
746 | sprintf(g_dasm_str, "add.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r |
747 | }\r |
748 | \r |
749 | static void d68000_adda_16(void)\r |
750 | {\r |
751 | sprintf(g_dasm_str, "adda.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
752 | }\r |
753 | \r |
754 | static void d68000_adda_32(void)\r |
755 | {\r |
756 | sprintf(g_dasm_str, "adda.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
757 | }\r |
758 | \r |
759 | static void d68000_addi_8(void)\r |
760 | {\r |
761 | char* str = get_imm_str_s8();\r |
762 | sprintf(g_dasm_str, "addi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
763 | }\r |
764 | \r |
765 | static void d68000_addi_16(void)\r |
766 | {\r |
767 | char* str = get_imm_str_s16();\r |
768 | sprintf(g_dasm_str, "addi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r |
769 | }\r |
770 | \r |
771 | static void d68000_addi_32(void)\r |
772 | {\r |
773 | char* str = get_imm_str_s32();\r |
774 | sprintf(g_dasm_str, "addi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r |
775 | }\r |
776 | \r |
777 | static void d68000_addq_8(void)\r |
778 | {\r |
779 | sprintf(g_dasm_str, "addq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));\r |
780 | }\r |
781 | \r |
782 | static void d68000_addq_16(void)\r |
783 | {\r |
784 | sprintf(g_dasm_str, "addq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));\r |
785 | }\r |
786 | \r |
787 | static void d68000_addq_32(void)\r |
788 | {\r |
789 | sprintf(g_dasm_str, "addq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));\r |
790 | }\r |
791 | \r |
792 | static void d68000_addx_rr_8(void)\r |
793 | {\r |
794 | sprintf(g_dasm_str, "addx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
795 | }\r |
796 | \r |
797 | static void d68000_addx_rr_16(void)\r |
798 | {\r |
799 | sprintf(g_dasm_str, "addx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
800 | }\r |
801 | \r |
802 | static void d68000_addx_rr_32(void)\r |
803 | {\r |
804 | sprintf(g_dasm_str, "addx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
805 | }\r |
806 | \r |
807 | static void d68000_addx_mm_8(void)\r |
808 | {\r |
809 | sprintf(g_dasm_str, "addx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
810 | }\r |
811 | \r |
812 | static void d68000_addx_mm_16(void)\r |
813 | {\r |
814 | sprintf(g_dasm_str, "addx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
815 | }\r |
816 | \r |
817 | static void d68000_addx_mm_32(void)\r |
818 | {\r |
819 | sprintf(g_dasm_str, "addx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
820 | }\r |
821 | \r |
822 | static void d68000_and_er_8(void)\r |
823 | {\r |
824 | sprintf(g_dasm_str, "and.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
825 | }\r |
826 | \r |
827 | static void d68000_and_er_16(void)\r |
828 | {\r |
829 | sprintf(g_dasm_str, "and.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
830 | }\r |
831 | \r |
832 | static void d68000_and_er_32(void)\r |
833 | {\r |
834 | sprintf(g_dasm_str, "and.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
835 | }\r |
836 | \r |
837 | static void d68000_and_re_8(void)\r |
838 | {\r |
839 | sprintf(g_dasm_str, "and.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
840 | }\r |
841 | \r |
842 | static void d68000_and_re_16(void)\r |
843 | {\r |
844 | sprintf(g_dasm_str, "and.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r |
845 | }\r |
846 | \r |
847 | static void d68000_and_re_32(void)\r |
848 | {\r |
849 | sprintf(g_dasm_str, "and.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r |
850 | }\r |
851 | \r |
852 | static void d68000_andi_8(void)\r |
853 | {\r |
854 | char* str = get_imm_str_u8();\r |
855 | sprintf(g_dasm_str, "andi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
856 | }\r |
857 | \r |
858 | static void d68000_andi_16(void)\r |
859 | {\r |
860 | char* str = get_imm_str_u16();\r |
861 | sprintf(g_dasm_str, "andi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r |
862 | }\r |
863 | \r |
864 | static void d68000_andi_32(void)\r |
865 | {\r |
866 | char* str = get_imm_str_u32();\r |
867 | sprintf(g_dasm_str, "andi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r |
868 | }\r |
869 | \r |
870 | static void d68000_andi_to_ccr(void)\r |
871 | {\r |
872 | sprintf(g_dasm_str, "andi %s, CCR", get_imm_str_u8());\r |
873 | }\r |
874 | \r |
875 | static void d68000_andi_to_sr(void)\r |
876 | {\r |
877 | sprintf(g_dasm_str, "andi %s, SR", get_imm_str_u16());\r |
878 | }\r |
879 | \r |
880 | static void d68000_asr_s_8(void)\r |
881 | {\r |
882 | sprintf(g_dasm_str, "asr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
883 | }\r |
884 | \r |
885 | static void d68000_asr_s_16(void)\r |
886 | {\r |
887 | sprintf(g_dasm_str, "asr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
888 | }\r |
889 | \r |
890 | static void d68000_asr_s_32(void)\r |
891 | {\r |
892 | sprintf(g_dasm_str, "asr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
893 | }\r |
894 | \r |
895 | static void d68000_asr_r_8(void)\r |
896 | {\r |
897 | sprintf(g_dasm_str, "asr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
898 | }\r |
899 | \r |
900 | static void d68000_asr_r_16(void)\r |
901 | {\r |
902 | sprintf(g_dasm_str, "asr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
903 | }\r |
904 | \r |
905 | static void d68000_asr_r_32(void)\r |
906 | {\r |
907 | sprintf(g_dasm_str, "asr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
908 | }\r |
909 | \r |
910 | static void d68000_asr_ea(void)\r |
911 | {\r |
912 | sprintf(g_dasm_str, "asr.w %s", get_ea_mode_str_16(g_cpu_ir));\r |
913 | }\r |
914 | \r |
915 | static void d68000_asl_s_8(void)\r |
916 | {\r |
917 | sprintf(g_dasm_str, "asl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
918 | }\r |
919 | \r |
920 | static void d68000_asl_s_16(void)\r |
921 | {\r |
922 | sprintf(g_dasm_str, "asl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
923 | }\r |
924 | \r |
925 | static void d68000_asl_s_32(void)\r |
926 | {\r |
927 | sprintf(g_dasm_str, "asl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
928 | }\r |
929 | \r |
930 | static void d68000_asl_r_8(void)\r |
931 | {\r |
932 | sprintf(g_dasm_str, "asl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
933 | }\r |
934 | \r |
935 | static void d68000_asl_r_16(void)\r |
936 | {\r |
937 | sprintf(g_dasm_str, "asl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
938 | }\r |
939 | \r |
940 | static void d68000_asl_r_32(void)\r |
941 | {\r |
942 | sprintf(g_dasm_str, "asl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
943 | }\r |
944 | \r |
945 | static void d68000_asl_ea(void)\r |
946 | {\r |
947 | sprintf(g_dasm_str, "asl.w %s", get_ea_mode_str_16(g_cpu_ir));\r |
948 | }\r |
949 | \r |
950 | static void d68000_bcc_8(void)\r |
951 | {\r |
952 | uint temp_pc = g_cpu_pc;\r |
953 | sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir));\r |
954 | }\r |
955 | \r |
956 | static void d68000_bcc_16(void)\r |
957 | {\r |
958 | uint temp_pc = g_cpu_pc;\r |
959 | sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));\r |
960 | }\r |
961 | \r |
962 | static void d68020_bcc_32(void)\r |
963 | {\r |
964 | uint temp_pc = g_cpu_pc;\r |
965 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
966 | sprintf(g_dasm_str, "b%-2s $%x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32());\r |
967 | }\r |
968 | \r |
969 | static void d68000_bchg_r(void)\r |
970 | {\r |
971 | sprintf(g_dasm_str, "bchg D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
972 | }\r |
973 | \r |
974 | static void d68000_bchg_s(void)\r |
975 | {\r |
976 | char* str = get_imm_str_u8();\r |
977 | sprintf(g_dasm_str, "bchg %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
978 | }\r |
979 | \r |
980 | static void d68000_bclr_r(void)\r |
981 | {\r |
982 | sprintf(g_dasm_str, "bclr D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
983 | }\r |
984 | \r |
985 | static void d68000_bclr_s(void)\r |
986 | {\r |
987 | char* str = get_imm_str_u8();\r |
988 | sprintf(g_dasm_str, "bclr %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
989 | }\r |
990 | \r |
991 | static void d68010_bkpt(void)\r |
992 | {\r |
993 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
994 | sprintf(g_dasm_str, "bkpt #%d; (1+)", g_cpu_ir&7);\r |
995 | }\r |
996 | \r |
997 | static void d68020_bfchg(void)\r |
998 | {\r |
999 | uint extension;\r |
1000 | char offset[3];\r |
1001 | char width[3];\r |
1002 | \r |
1003 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1004 | \r |
1005 | extension = read_imm_16();\r |
1006 | \r |
1007 | if(BIT_B(extension))\r |
1008 | sprintf(offset, "D%d", (extension>>6)&7);\r |
1009 | else\r |
1010 | sprintf(offset, "%d", (extension>>6)&31);\r |
1011 | if(BIT_5(extension))\r |
1012 | sprintf(width, "D%d", extension&7);\r |
1013 | else\r |
1014 | sprintf(width, "%d", g_5bit_data_table[extension&31]);\r |
1015 | sprintf(g_dasm_str, "bfchg %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);\r |
1016 | }\r |
1017 | \r |
1018 | static void d68020_bfclr(void)\r |
1019 | {\r |
1020 | uint extension;\r |
1021 | char offset[3];\r |
1022 | char width[3];\r |
1023 | \r |
1024 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1025 | \r |
1026 | extension = read_imm_16();\r |
1027 | \r |
1028 | if(BIT_B(extension))\r |
1029 | sprintf(offset, "D%d", (extension>>6)&7);\r |
1030 | else\r |
1031 | sprintf(offset, "%d", (extension>>6)&31);\r |
1032 | if(BIT_5(extension))\r |
1033 | sprintf(width, "D%d", extension&7);\r |
1034 | else\r |
1035 | sprintf(width, "%d", g_5bit_data_table[extension&31]);\r |
1036 | sprintf(g_dasm_str, "bfclr %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);\r |
1037 | }\r |
1038 | \r |
1039 | static void d68020_bfexts(void)\r |
1040 | {\r |
1041 | uint extension;\r |
1042 | char offset[3];\r |
1043 | char width[3];\r |
1044 | \r |
1045 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1046 | \r |
1047 | extension = read_imm_16();\r |
1048 | \r |
1049 | if(BIT_B(extension))\r |
1050 | sprintf(offset, "D%d", (extension>>6)&7);\r |
1051 | else\r |
1052 | sprintf(offset, "%d", (extension>>6)&31);\r |
1053 | if(BIT_5(extension))\r |
1054 | sprintf(width, "D%d", extension&7);\r |
1055 | else\r |
1056 | sprintf(width, "%d", g_5bit_data_table[extension&31]);\r |
1057 | sprintf(g_dasm_str, "bfexts D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);\r |
1058 | }\r |
1059 | \r |
1060 | static void d68020_bfextu(void)\r |
1061 | {\r |
1062 | uint extension;\r |
1063 | char offset[3];\r |
1064 | char width[3];\r |
1065 | \r |
1066 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1067 | \r |
1068 | extension = read_imm_16();\r |
1069 | \r |
1070 | if(BIT_B(extension))\r |
1071 | sprintf(offset, "D%d", (extension>>6)&7);\r |
1072 | else\r |
1073 | sprintf(offset, "%d", (extension>>6)&31);\r |
1074 | if(BIT_5(extension))\r |
1075 | sprintf(width, "D%d", extension&7);\r |
1076 | else\r |
1077 | sprintf(width, "%d", g_5bit_data_table[extension&31]);\r |
1078 | sprintf(g_dasm_str, "bfextu D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);\r |
1079 | }\r |
1080 | \r |
1081 | static void d68020_bfffo(void)\r |
1082 | {\r |
1083 | uint extension;\r |
1084 | char offset[3];\r |
1085 | char width[3];\r |
1086 | \r |
1087 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1088 | \r |
1089 | extension = read_imm_16();\r |
1090 | \r |
1091 | if(BIT_B(extension))\r |
1092 | sprintf(offset, "D%d", (extension>>6)&7);\r |
1093 | else\r |
1094 | sprintf(offset, "%d", (extension>>6)&31);\r |
1095 | if(BIT_5(extension))\r |
1096 | sprintf(width, "D%d", extension&7);\r |
1097 | else\r |
1098 | sprintf(width, "%d", g_5bit_data_table[extension&31]);\r |
1099 | sprintf(g_dasm_str, "bfffo D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);\r |
1100 | }\r |
1101 | \r |
1102 | static void d68020_bfins(void)\r |
1103 | {\r |
1104 | uint extension;\r |
1105 | char offset[3];\r |
1106 | char width[3];\r |
1107 | \r |
1108 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1109 | \r |
1110 | extension = read_imm_16();\r |
1111 | \r |
1112 | if(BIT_B(extension))\r |
1113 | sprintf(offset, "D%d", (extension>>6)&7);\r |
1114 | else\r |
1115 | sprintf(offset, "%d", (extension>>6)&31);\r |
1116 | if(BIT_5(extension))\r |
1117 | sprintf(width, "D%d", extension&7);\r |
1118 | else\r |
1119 | sprintf(width, "%d", g_5bit_data_table[extension&31]);\r |
1120 | sprintf(g_dasm_str, "bfins D%d, %s {%s:%s}; (2+)", (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir), offset, width);\r |
1121 | }\r |
1122 | \r |
1123 | static void d68020_bfset(void)\r |
1124 | {\r |
1125 | uint extension;\r |
1126 | char offset[3];\r |
1127 | char width[3];\r |
1128 | \r |
1129 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1130 | \r |
1131 | extension = read_imm_16();\r |
1132 | \r |
1133 | if(BIT_B(extension))\r |
1134 | sprintf(offset, "D%d", (extension>>6)&7);\r |
1135 | else\r |
1136 | sprintf(offset, "%d", (extension>>6)&31);\r |
1137 | if(BIT_5(extension))\r |
1138 | sprintf(width, "D%d", extension&7);\r |
1139 | else\r |
1140 | sprintf(width, "%d", g_5bit_data_table[extension&31]);\r |
1141 | sprintf(g_dasm_str, "bfset %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);\r |
1142 | }\r |
1143 | \r |
1144 | static void d68020_bftst(void)\r |
1145 | {\r |
1146 | uint extension;\r |
1147 | char offset[3];\r |
1148 | char width[3];\r |
1149 | \r |
1150 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1151 | \r |
1152 | extension = read_imm_16();\r |
1153 | \r |
1154 | if(BIT_B(extension))\r |
1155 | sprintf(offset, "D%d", (extension>>6)&7);\r |
1156 | else\r |
1157 | sprintf(offset, "%d", (extension>>6)&31);\r |
1158 | if(BIT_5(extension))\r |
1159 | sprintf(width, "D%d", extension&7);\r |
1160 | else\r |
1161 | sprintf(width, "%d", g_5bit_data_table[extension&31]);\r |
1162 | sprintf(g_dasm_str, "bftst %s {%s:%s}; (2+)", get_ea_mode_str_8(g_cpu_ir), offset, width);\r |
1163 | }\r |
1164 | \r |
1165 | static void d68000_bra_8(void)\r |
1166 | {\r |
1167 | uint temp_pc = g_cpu_pc;\r |
1168 | sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_8(g_cpu_ir));\r |
1169 | }\r |
1170 | \r |
1171 | static void d68000_bra_16(void)\r |
1172 | {\r |
1173 | uint temp_pc = g_cpu_pc;\r |
1174 | sprintf(g_dasm_str, "bra $%x", temp_pc + make_int_16(read_imm_16()));\r |
1175 | }\r |
1176 | \r |
1177 | static void d68020_bra_32(void)\r |
1178 | {\r |
1179 | uint temp_pc = g_cpu_pc;\r |
1180 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1181 | sprintf(g_dasm_str, "bra $%x; (2+)", temp_pc + read_imm_32());\r |
1182 | }\r |
1183 | \r |
1184 | static void d68000_bset_r(void)\r |
1185 | {\r |
1186 | sprintf(g_dasm_str, "bset D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
1187 | }\r |
1188 | \r |
1189 | static void d68000_bset_s(void)\r |
1190 | {\r |
1191 | char* str = get_imm_str_u8();\r |
1192 | sprintf(g_dasm_str, "bset %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
1193 | }\r |
1194 | \r |
1195 | static void d68000_bsr_8(void)\r |
1196 | {\r |
1197 | uint temp_pc = g_cpu_pc;\r |
1198 | sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_8(g_cpu_ir));\r |
1199 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
1200 | }\r |
1201 | \r |
1202 | static void d68000_bsr_16(void)\r |
1203 | {\r |
1204 | uint temp_pc = g_cpu_pc;\r |
1205 | sprintf(g_dasm_str, "bsr $%x", temp_pc + make_int_16(read_imm_16()));\r |
1206 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
1207 | }\r |
1208 | \r |
1209 | static void d68020_bsr_32(void)\r |
1210 | {\r |
1211 | uint temp_pc = g_cpu_pc;\r |
1212 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1213 | sprintf(g_dasm_str, "bsr $%x; (2+)", temp_pc + read_imm_32());\r |
1214 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
1215 | }\r |
1216 | \r |
1217 | static void d68000_btst_r(void)\r |
1218 | {\r |
1219 | sprintf(g_dasm_str, "btst D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
1220 | }\r |
1221 | \r |
1222 | static void d68000_btst_s(void)\r |
1223 | {\r |
1224 | char* str = get_imm_str_u8();\r |
1225 | sprintf(g_dasm_str, "btst %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
1226 | }\r |
1227 | \r |
1228 | static void d68020_callm(void)\r |
1229 | {\r |
1230 | char* str;\r |
1231 | LIMIT_CPU_TYPES(M68020_ONLY);\r |
1232 | str = get_imm_str_u8();\r |
1233 | \r |
1234 | sprintf(g_dasm_str, "callm %s, %s; (2)", str, get_ea_mode_str_8(g_cpu_ir));\r |
1235 | }\r |
1236 | \r |
1237 | static void d68020_cas_8(void)\r |
1238 | {\r |
1239 | uint extension;\r |
1240 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1241 | extension = read_imm_16();\r |
1242 | sprintf(g_dasm_str, "cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(g_cpu_ir));\r |
1243 | }\r |
1244 | \r |
1245 | static void d68020_cas_16(void)\r |
1246 | {\r |
1247 | uint extension;\r |
1248 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1249 | extension = read_imm_16();\r |
1250 | sprintf(g_dasm_str, "cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(g_cpu_ir));\r |
1251 | }\r |
1252 | \r |
1253 | static void d68020_cas_32(void)\r |
1254 | {\r |
1255 | uint extension;\r |
1256 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1257 | extension = read_imm_16();\r |
1258 | sprintf(g_dasm_str, "cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(g_cpu_ir));\r |
1259 | }\r |
1260 | \r |
1261 | static void d68020_cas2_16(void)\r |
1262 | {\r |
1263 | /* CAS2 Dc1:Dc2,Du1:Dc2:(Rn1):(Rn2)\r |
1264 | f e d c b a 9 8 7 6 5 4 3 2 1 0\r |
1265 | DARn1 0 0 0 Du1 0 0 0 Dc1\r |
1266 | DARn2 0 0 0 Du2 0 0 0 Dc2\r |
1267 | */\r |
1268 | \r |
1269 | uint extension;\r |
1270 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1271 | extension = read_imm_32();\r |
1272 | sprintf(g_dasm_str, "cas2.w D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",\r |
1273 | (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,\r |
1274 | BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,\r |
1275 | BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r |
1276 | }\r |
1277 | \r |
1278 | static void d68020_cas2_32(void)\r |
1279 | {\r |
1280 | uint extension;\r |
1281 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1282 | extension = read_imm_32();\r |
1283 | sprintf(g_dasm_str, "cas2.l D%d:D%d:D%d:D%d, (%c%d):(%c%d); (2+)",\r |
1284 | (extension>>16)&7, extension&7, (extension>>22)&7, (extension>>6)&7,\r |
1285 | BIT_1F(extension) ? 'A' : 'D', (extension>>28)&7,\r |
1286 | BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r |
1287 | }\r |
1288 | \r |
1289 | static void d68000_chk_16(void)\r |
1290 | {\r |
1291 | sprintf(g_dasm_str, "chk.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1292 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
1293 | }\r |
1294 | \r |
1295 | static void d68020_chk_32(void)\r |
1296 | {\r |
1297 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1298 | sprintf(g_dasm_str, "chk.l %s, D%d; (2+)", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1299 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
1300 | }\r |
1301 | \r |
1302 | static void d68020_chk2_cmp2_8(void)\r |
1303 | {\r |
1304 | uint extension;\r |
1305 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1306 | extension = read_imm_16();\r |
1307 | sprintf(g_dasm_str, "%s.b %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r |
1308 | }\r |
1309 | \r |
1310 | static void d68020_chk2_cmp2_16(void)\r |
1311 | {\r |
1312 | uint extension;\r |
1313 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1314 | extension = read_imm_16();\r |
1315 | sprintf(g_dasm_str, "%s.w %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r |
1316 | }\r |
1317 | \r |
1318 | static void d68020_chk2_cmp2_32(void)\r |
1319 | {\r |
1320 | uint extension;\r |
1321 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1322 | extension = read_imm_16();\r |
1323 | sprintf(g_dasm_str, "%s.l %s, %c%d; (2+)", BIT_B(extension) ? "chk2" : "cmp2", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r |
1324 | }\r |
1325 | \r |
1326 | static void d68040_cinv(void)\r |
1327 | {\r |
1328 | LIMIT_CPU_TYPES(M68040_PLUS);\r |
1329 | switch((g_cpu_ir>>3)&3)\r |
1330 | {\r |
1331 | case 0:\r |
1332 | sprintf(g_dasm_str, "cinv (illegal scope); (4)");\r |
1333 | break;\r |
1334 | case 1:\r |
1335 | sprintf(g_dasm_str, "cinvl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);\r |
1336 | break;\r |
1337 | case 2:\r |
1338 | sprintf(g_dasm_str, "cinvp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);\r |
1339 | break;\r |
1340 | case 3:\r |
1341 | sprintf(g_dasm_str, "cinva %d; (4)", (g_cpu_ir>>6)&3);\r |
1342 | break;\r |
1343 | }\r |
1344 | }\r |
1345 | \r |
1346 | static void d68000_clr_8(void)\r |
1347 | {\r |
1348 | sprintf(g_dasm_str, "clr.b %s", get_ea_mode_str_8(g_cpu_ir));\r |
1349 | }\r |
1350 | \r |
1351 | static void d68000_clr_16(void)\r |
1352 | {\r |
1353 | sprintf(g_dasm_str, "clr.w %s", get_ea_mode_str_16(g_cpu_ir));\r |
1354 | }\r |
1355 | \r |
1356 | static void d68000_clr_32(void)\r |
1357 | {\r |
1358 | sprintf(g_dasm_str, "clr.l %s", get_ea_mode_str_32(g_cpu_ir));\r |
1359 | }\r |
1360 | \r |
1361 | static void d68000_cmp_8(void)\r |
1362 | {\r |
1363 | sprintf(g_dasm_str, "cmp.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1364 | }\r |
1365 | \r |
1366 | static void d68000_cmp_16(void)\r |
1367 | {\r |
1368 | sprintf(g_dasm_str, "cmp.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1369 | }\r |
1370 | \r |
1371 | static void d68000_cmp_32(void)\r |
1372 | {\r |
1373 | sprintf(g_dasm_str, "cmp.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1374 | }\r |
1375 | \r |
1376 | static void d68000_cmpa_16(void)\r |
1377 | {\r |
1378 | sprintf(g_dasm_str, "cmpa.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1379 | }\r |
1380 | \r |
1381 | static void d68000_cmpa_32(void)\r |
1382 | {\r |
1383 | sprintf(g_dasm_str, "cmpa.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1384 | }\r |
1385 | \r |
1386 | static void d68000_cmpi_8(void)\r |
1387 | {\r |
1388 | char* str = get_imm_str_s8();\r |
1389 | sprintf(g_dasm_str, "cmpi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
1390 | }\r |
1391 | \r |
1392 | static void d68020_cmpi_pcdi_8(void)\r |
1393 | {\r |
1394 | char* str;\r |
1395 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
1396 | str = get_imm_str_s8();\r |
1397 | sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));\r |
1398 | }\r |
1399 | \r |
1400 | static void d68020_cmpi_pcix_8(void)\r |
1401 | {\r |
1402 | char* str;\r |
1403 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
1404 | str = get_imm_str_s8();\r |
1405 | sprintf(g_dasm_str, "cmpi.b %s, %s; (2+)", str, get_ea_mode_str_8(g_cpu_ir));\r |
1406 | }\r |
1407 | \r |
1408 | static void d68000_cmpi_16(void)\r |
1409 | {\r |
1410 | char* str;\r |
1411 | str = get_imm_str_s16();\r |
1412 | sprintf(g_dasm_str, "cmpi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r |
1413 | }\r |
1414 | \r |
1415 | static void d68020_cmpi_pcdi_16(void)\r |
1416 | {\r |
1417 | char* str;\r |
1418 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
1419 | str = get_imm_str_s16();\r |
1420 | sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));\r |
1421 | }\r |
1422 | \r |
1423 | static void d68020_cmpi_pcix_16(void)\r |
1424 | {\r |
1425 | char* str;\r |
1426 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
1427 | str = get_imm_str_s16();\r |
1428 | sprintf(g_dasm_str, "cmpi.w %s, %s; (2+)", str, get_ea_mode_str_16(g_cpu_ir));\r |
1429 | }\r |
1430 | \r |
1431 | static void d68000_cmpi_32(void)\r |
1432 | {\r |
1433 | char* str;\r |
1434 | str = get_imm_str_s32();\r |
1435 | sprintf(g_dasm_str, "cmpi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r |
1436 | }\r |
1437 | \r |
1438 | static void d68020_cmpi_pcdi_32(void)\r |
1439 | {\r |
1440 | char* str;\r |
1441 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
1442 | str = get_imm_str_s32();\r |
1443 | sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));\r |
1444 | }\r |
1445 | \r |
1446 | static void d68020_cmpi_pcix_32(void)\r |
1447 | {\r |
1448 | char* str;\r |
1449 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
1450 | str = get_imm_str_s32();\r |
1451 | sprintf(g_dasm_str, "cmpi.l %s, %s; (2+)", str, get_ea_mode_str_32(g_cpu_ir));\r |
1452 | }\r |
1453 | \r |
1454 | static void d68000_cmpm_8(void)\r |
1455 | {\r |
1456 | sprintf(g_dasm_str, "cmpm.b (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
1457 | }\r |
1458 | \r |
1459 | static void d68000_cmpm_16(void)\r |
1460 | {\r |
1461 | sprintf(g_dasm_str, "cmpm.w (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
1462 | }\r |
1463 | \r |
1464 | static void d68000_cmpm_32(void)\r |
1465 | {\r |
1466 | sprintf(g_dasm_str, "cmpm.l (A%d)+, (A%d)+", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
1467 | }\r |
1468 | \r |
1469 | static void d68020_cpbcc_16(void)\r |
1470 | {\r |
1471 | uint extension;\r |
1472 | uint new_pc = g_cpu_pc;\r |
1473 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1474 | extension = read_imm_16();\r |
1475 | new_pc += make_int_16(read_imm_16());\r |
1476 | sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);\r |
1477 | }\r |
1478 | \r |
1479 | static void d68020_cpbcc_32(void)\r |
1480 | {\r |
1481 | uint extension;\r |
1482 | uint new_pc = g_cpu_pc;\r |
1483 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1484 | extension = read_imm_16();\r |
1485 | new_pc += read_imm_32();\r |
1486 | sprintf(g_dasm_str, "%db%-4s %s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[g_cpu_ir&0x3f], get_imm_str_s16(), new_pc, extension);\r |
1487 | }\r |
1488 | \r |
1489 | static void d68020_cpdbcc(void)\r |
1490 | {\r |
1491 | uint extension1;\r |
1492 | uint extension2;\r |
1493 | uint new_pc = g_cpu_pc;\r |
1494 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1495 | extension1 = read_imm_16();\r |
1496 | extension2 = read_imm_16();\r |
1497 | new_pc += make_int_16(read_imm_16());\r |
1498 | sprintf(g_dasm_str, "%ddb%-4s D%d,%s; %x (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], g_cpu_ir&7, get_imm_str_s16(), new_pc, extension2);\r |
1499 | }\r |
1500 | \r |
1501 | static void d68020_cpgen(void)\r |
1502 | {\r |
1503 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1504 | sprintf(g_dasm_str, "%dgen %s; (2-3)", (g_cpu_ir>>9)&7, get_imm_str_u32());\r |
1505 | }\r |
1506 | \r |
1507 | static void d68020_cprestore(void)\r |
1508 | {\r |
1509 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1510 | sprintf(g_dasm_str, "%drestore %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
1511 | }\r |
1512 | \r |
1513 | static void d68020_cpsave(void)\r |
1514 | {\r |
1515 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1516 | sprintf(g_dasm_str, "%dsave %s; (2-3)", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
1517 | }\r |
1518 | \r |
1519 | static void d68020_cpscc(void)\r |
1520 | {\r |
1521 | uint extension1;\r |
1522 | uint extension2;\r |
1523 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1524 | extension1 = read_imm_16();\r |
1525 | extension2 = read_imm_16();\r |
1526 | sprintf(g_dasm_str, "%ds%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_ea_mode_str_8(g_cpu_ir), extension2);\r |
1527 | }\r |
1528 | \r |
1529 | static void d68020_cptrapcc_0(void)\r |
1530 | {\r |
1531 | uint extension1;\r |
1532 | uint extension2;\r |
1533 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1534 | extension1 = read_imm_16();\r |
1535 | extension2 = read_imm_16();\r |
1536 | sprintf(g_dasm_str, "%dtrap%-4s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], extension2);\r |
1537 | }\r |
1538 | \r |
1539 | static void d68020_cptrapcc_16(void)\r |
1540 | {\r |
1541 | uint extension1;\r |
1542 | uint extension2;\r |
1543 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1544 | extension1 = read_imm_16();\r |
1545 | extension2 = read_imm_16();\r |
1546 | sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u16(), extension2);\r |
1547 | }\r |
1548 | \r |
1549 | static void d68020_cptrapcc_32(void)\r |
1550 | {\r |
1551 | uint extension1;\r |
1552 | uint extension2;\r |
1553 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1554 | extension1 = read_imm_16();\r |
1555 | extension2 = read_imm_16();\r |
1556 | sprintf(g_dasm_str, "%dtrap%-4s %s; (extension = %x) (2-3)", (g_cpu_ir>>9)&7, g_cpcc[extension1&0x3f], get_imm_str_u32(), extension2);\r |
1557 | }\r |
1558 | \r |
1559 | static void d68040_cpush(void)\r |
1560 | {\r |
1561 | LIMIT_CPU_TYPES(M68040_PLUS);\r |
1562 | switch((g_cpu_ir>>3)&3)\r |
1563 | {\r |
1564 | case 0:\r |
1565 | sprintf(g_dasm_str, "cpush (illegal scope); (4)");\r |
1566 | break;\r |
1567 | case 1:\r |
1568 | sprintf(g_dasm_str, "cpushl %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);\r |
1569 | break;\r |
1570 | case 2:\r |
1571 | sprintf(g_dasm_str, "cpushp %d, (A%d); (4)", (g_cpu_ir>>6)&3, g_cpu_ir&7);\r |
1572 | break;\r |
1573 | case 3:\r |
1574 | sprintf(g_dasm_str, "cpusha %d; (4)", (g_cpu_ir>>6)&3);\r |
1575 | break;\r |
1576 | }\r |
1577 | }\r |
1578 | \r |
1579 | static void d68000_dbra(void)\r |
1580 | {\r |
1581 | uint temp_pc = g_cpu_pc;\r |
1582 | sprintf(g_dasm_str, "dbra D%d, $%x", g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));\r |
1583 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
1584 | }\r |
1585 | \r |
1586 | static void d68000_dbcc(void)\r |
1587 | {\r |
1588 | uint temp_pc = g_cpu_pc;\r |
1589 | sprintf(g_dasm_str, "db%-2s D%d, $%x", g_cc[(g_cpu_ir>>8)&0xf], g_cpu_ir & 7, temp_pc + make_int_16(read_imm_16()));\r |
1590 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
1591 | }\r |
1592 | \r |
1593 | static void d68000_divs(void)\r |
1594 | {\r |
1595 | sprintf(g_dasm_str, "divs.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1596 | }\r |
1597 | \r |
1598 | static void d68000_divu(void)\r |
1599 | {\r |
1600 | sprintf(g_dasm_str, "divu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1601 | }\r |
1602 | \r |
1603 | static void d68020_divl(void)\r |
1604 | {\r |
1605 | uint extension;\r |
1606 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1607 | extension = read_imm_16();\r |
1608 | \r |
1609 | if(BIT_A(extension))\r |
1610 | sprintf(g_dasm_str, "div%c.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);\r |
1611 | else if((extension&7) == ((extension>>12)&7))\r |
1612 | sprintf(g_dasm_str, "div%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);\r |
1613 | else\r |
1614 | sprintf(g_dasm_str, "div%cl.l %s, D%d:D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);\r |
1615 | }\r |
1616 | \r |
1617 | static void d68000_eor_8(void)\r |
1618 | {\r |
1619 | sprintf(g_dasm_str, "eor.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
1620 | }\r |
1621 | \r |
1622 | static void d68000_eor_16(void)\r |
1623 | {\r |
1624 | sprintf(g_dasm_str, "eor.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r |
1625 | }\r |
1626 | \r |
1627 | static void d68000_eor_32(void)\r |
1628 | {\r |
1629 | sprintf(g_dasm_str, "eor.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r |
1630 | }\r |
1631 | \r |
1632 | static void d68000_eori_8(void)\r |
1633 | {\r |
1634 | char* str = get_imm_str_u8();\r |
1635 | sprintf(g_dasm_str, "eori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
1636 | }\r |
1637 | \r |
1638 | static void d68000_eori_16(void)\r |
1639 | {\r |
1640 | char* str = get_imm_str_u16();\r |
1641 | sprintf(g_dasm_str, "eori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r |
1642 | }\r |
1643 | \r |
1644 | static void d68000_eori_32(void)\r |
1645 | {\r |
1646 | char* str = get_imm_str_u32();\r |
1647 | sprintf(g_dasm_str, "eori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r |
1648 | }\r |
1649 | \r |
1650 | static void d68000_eori_to_ccr(void)\r |
1651 | {\r |
1652 | sprintf(g_dasm_str, "eori %s, CCR", get_imm_str_u8());\r |
1653 | }\r |
1654 | \r |
1655 | static void d68000_eori_to_sr(void)\r |
1656 | {\r |
1657 | sprintf(g_dasm_str, "eori %s, SR", get_imm_str_u16());\r |
1658 | }\r |
1659 | \r |
1660 | static void d68000_exg_dd(void)\r |
1661 | {\r |
1662 | sprintf(g_dasm_str, "exg D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
1663 | }\r |
1664 | \r |
1665 | static void d68000_exg_aa(void)\r |
1666 | {\r |
1667 | sprintf(g_dasm_str, "exg A%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
1668 | }\r |
1669 | \r |
1670 | static void d68000_exg_da(void)\r |
1671 | {\r |
1672 | sprintf(g_dasm_str, "exg D%d, A%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
1673 | }\r |
1674 | \r |
1675 | static void d68000_ext_16(void)\r |
1676 | {\r |
1677 | sprintf(g_dasm_str, "ext.w D%d", g_cpu_ir&7);\r |
1678 | }\r |
1679 | \r |
1680 | static void d68000_ext_32(void)\r |
1681 | {\r |
1682 | sprintf(g_dasm_str, "ext.l D%d", g_cpu_ir&7);\r |
1683 | }\r |
1684 | \r |
1685 | static void d68020_extb_32(void)\r |
1686 | {\r |
1687 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1688 | sprintf(g_dasm_str, "extb.l D%d; (2+)", g_cpu_ir&7);\r |
1689 | }\r |
1690 | \r |
1691 | static void d68000_jmp(void)\r |
1692 | {\r |
1693 | sprintf(g_dasm_str, "jmp %s", get_ea_mode_str_32(g_cpu_ir));\r |
1694 | }\r |
1695 | \r |
1696 | static void d68000_jsr(void)\r |
1697 | {\r |
1698 | sprintf(g_dasm_str, "jsr %s", get_ea_mode_str_32(g_cpu_ir));\r |
1699 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
1700 | }\r |
1701 | \r |
1702 | static void d68000_lea(void)\r |
1703 | {\r |
1704 | sprintf(g_dasm_str, "lea %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1705 | }\r |
1706 | \r |
1707 | static void d68000_link_16(void)\r |
1708 | {\r |
1709 | sprintf(g_dasm_str, "link A%d, %s", g_cpu_ir&7, get_imm_str_s16());\r |
1710 | }\r |
1711 | \r |
1712 | static void d68020_link_32(void)\r |
1713 | {\r |
1714 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
1715 | sprintf(g_dasm_str, "link A%d, %s; (2+)", g_cpu_ir&7, get_imm_str_s32());\r |
1716 | }\r |
1717 | \r |
1718 | static void d68000_lsr_s_8(void)\r |
1719 | {\r |
1720 | sprintf(g_dasm_str, "lsr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
1721 | }\r |
1722 | \r |
1723 | static void d68000_lsr_s_16(void)\r |
1724 | {\r |
1725 | sprintf(g_dasm_str, "lsr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
1726 | }\r |
1727 | \r |
1728 | static void d68000_lsr_s_32(void)\r |
1729 | {\r |
1730 | sprintf(g_dasm_str, "lsr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
1731 | }\r |
1732 | \r |
1733 | static void d68000_lsr_r_8(void)\r |
1734 | {\r |
1735 | sprintf(g_dasm_str, "lsr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
1736 | }\r |
1737 | \r |
1738 | static void d68000_lsr_r_16(void)\r |
1739 | {\r |
1740 | sprintf(g_dasm_str, "lsr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
1741 | }\r |
1742 | \r |
1743 | static void d68000_lsr_r_32(void)\r |
1744 | {\r |
1745 | sprintf(g_dasm_str, "lsr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
1746 | }\r |
1747 | \r |
1748 | static void d68000_lsr_ea(void)\r |
1749 | {\r |
1750 | sprintf(g_dasm_str, "lsr.w %s", get_ea_mode_str_32(g_cpu_ir));\r |
1751 | }\r |
1752 | \r |
1753 | static void d68000_lsl_s_8(void)\r |
1754 | {\r |
1755 | sprintf(g_dasm_str, "lsl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
1756 | }\r |
1757 | \r |
1758 | static void d68000_lsl_s_16(void)\r |
1759 | {\r |
1760 | sprintf(g_dasm_str, "lsl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
1761 | }\r |
1762 | \r |
1763 | static void d68000_lsl_s_32(void)\r |
1764 | {\r |
1765 | sprintf(g_dasm_str, "lsl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
1766 | }\r |
1767 | \r |
1768 | static void d68000_lsl_r_8(void)\r |
1769 | {\r |
1770 | sprintf(g_dasm_str, "lsl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
1771 | }\r |
1772 | \r |
1773 | static void d68000_lsl_r_16(void)\r |
1774 | {\r |
1775 | sprintf(g_dasm_str, "lsl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
1776 | }\r |
1777 | \r |
1778 | static void d68000_lsl_r_32(void)\r |
1779 | {\r |
1780 | sprintf(g_dasm_str, "lsl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
1781 | }\r |
1782 | \r |
1783 | static void d68000_lsl_ea(void)\r |
1784 | {\r |
1785 | sprintf(g_dasm_str, "lsl.w %s", get_ea_mode_str_32(g_cpu_ir));\r |
1786 | }\r |
1787 | \r |
1788 | static void d68000_move_8(void)\r |
1789 | {\r |
1790 | char* str = get_ea_mode_str_8(g_cpu_ir);\r |
1791 | sprintf(g_dasm_str, "move.b %s, %s", str, get_ea_mode_str_8(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));\r |
1792 | }\r |
1793 | \r |
1794 | static void d68000_move_16(void)\r |
1795 | {\r |
1796 | char* str = get_ea_mode_str_16(g_cpu_ir);\r |
1797 | sprintf(g_dasm_str, "move.w %s, %s", str, get_ea_mode_str_16(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));\r |
1798 | }\r |
1799 | \r |
1800 | static void d68000_move_32(void)\r |
1801 | {\r |
1802 | char* str = get_ea_mode_str_32(g_cpu_ir);\r |
1803 | sprintf(g_dasm_str, "move.l %s, %s", str, get_ea_mode_str_32(((g_cpu_ir>>9) & 7) | ((g_cpu_ir>>3) & 0x38)));\r |
1804 | }\r |
1805 | \r |
1806 | static void d68000_movea_16(void)\r |
1807 | {\r |
1808 | sprintf(g_dasm_str, "movea.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1809 | }\r |
1810 | \r |
1811 | static void d68000_movea_32(void)\r |
1812 | {\r |
1813 | sprintf(g_dasm_str, "movea.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
1814 | }\r |
1815 | \r |
1816 | static void d68000_move_to_ccr(void)\r |
1817 | {\r |
1818 | sprintf(g_dasm_str, "move %s, CCR", get_ea_mode_str_8(g_cpu_ir));\r |
1819 | }\r |
1820 | \r |
1821 | static void d68010_move_fr_ccr(void)\r |
1822 | {\r |
1823 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
1824 | sprintf(g_dasm_str, "move CCR, %s; (1+)", get_ea_mode_str_8(g_cpu_ir));\r |
1825 | }\r |
1826 | \r |
1827 | static void d68000_move_fr_sr(void)\r |
1828 | {\r |
1829 | sprintf(g_dasm_str, "move SR, %s", get_ea_mode_str_16(g_cpu_ir));\r |
1830 | }\r |
1831 | \r |
1832 | static void d68000_move_to_sr(void)\r |
1833 | {\r |
1834 | sprintf(g_dasm_str, "move %s, SR", get_ea_mode_str_16(g_cpu_ir));\r |
1835 | }\r |
1836 | \r |
1837 | static void d68000_move_fr_usp(void)\r |
1838 | {\r |
1839 | sprintf(g_dasm_str, "move USP, A%d", g_cpu_ir&7);\r |
1840 | }\r |
1841 | \r |
1842 | static void d68000_move_to_usp(void)\r |
1843 | {\r |
1844 | sprintf(g_dasm_str, "move A%d, USP", g_cpu_ir&7);\r |
1845 | }\r |
1846 | \r |
1847 | static void d68010_movec(void)\r |
1848 | {\r |
1849 | uint extension;\r |
1850 | const char* reg_name;\r |
1851 | const char* processor;\r |
1852 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
1853 | extension = read_imm_16();\r |
1854 | \r |
1855 | switch(extension & 0xfff)\r |
1856 | {\r |
1857 | case 0x000:\r |
1858 | reg_name = "SFC";\r |
1859 | processor = "1+";\r |
1860 | break;\r |
1861 | case 0x001:\r |
1862 | reg_name = "DFC";\r |
1863 | processor = "1+";\r |
1864 | break;\r |
1865 | case 0x800:\r |
1866 | reg_name = "USP";\r |
1867 | processor = "1+";\r |
1868 | break;\r |
1869 | case 0x801:\r |
1870 | reg_name = "VBR";\r |
1871 | processor = "1+";\r |
1872 | break;\r |
1873 | case 0x002:\r |
1874 | reg_name = "CACR";\r |
1875 | processor = "2+";\r |
1876 | break;\r |
1877 | case 0x802:\r |
1878 | reg_name = "CAAR";\r |
1879 | processor = "2,3";\r |
1880 | break;\r |
1881 | case 0x803:\r |
1882 | reg_name = "MSP";\r |
1883 | processor = "2+";\r |
1884 | break;\r |
1885 | case 0x804:\r |
1886 | reg_name = "ISP";\r |
1887 | processor = "2+";\r |
1888 | break;\r |
1889 | case 0x003:\r |
1890 | reg_name = "TC";\r |
1891 | processor = "4+";\r |
1892 | break;\r |
1893 | case 0x004:\r |
1894 | reg_name = "ITT0";\r |
1895 | processor = "4+";\r |
1896 | break;\r |
1897 | case 0x005:\r |
1898 | reg_name = "ITT1";\r |
1899 | processor = "4+";\r |
1900 | break;\r |
1901 | case 0x006:\r |
1902 | reg_name = "DTT0";\r |
1903 | processor = "4+";\r |
1904 | break;\r |
1905 | case 0x007:\r |
1906 | reg_name = "DTT1";\r |
1907 | processor = "4+";\r |
1908 | break;\r |
1909 | case 0x805:\r |
1910 | reg_name = "MMUSR";\r |
1911 | processor = "4+";\r |
1912 | break;\r |
1913 | case 0x806:\r |
1914 | reg_name = "URP";\r |
1915 | processor = "4+";\r |
1916 | break;\r |
1917 | case 0x807:\r |
1918 | reg_name = "SRP";\r |
1919 | processor = "4+";\r |
1920 | break;\r |
1921 | default:\r |
1922 | reg_name = make_signed_hex_str_16(extension & 0xfff);\r |
1923 | processor = "?";\r |
1924 | }\r |
1925 | \r |
1926 | if(BIT_1(g_cpu_ir))\r |
1927 | sprintf(g_dasm_str, "movec %c%d, %s; (%s)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, reg_name, processor);\r |
1928 | else\r |
1929 | sprintf(g_dasm_str, "movec %s, %c%d; (%s)", reg_name, BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, processor);\r |
1930 | }\r |
1931 | \r |
1932 | static void d68000_movem_pd_16(void)\r |
1933 | {\r |
1934 | uint data = read_imm_16();\r |
1935 | char buffer[40];\r |
1936 | uint first;\r |
1937 | uint run_length;\r |
1938 | uint i;\r |
1939 | \r |
1940 | buffer[0] = 0;\r |
1941 | for(i=0;i<8;i++)\r |
1942 | {\r |
1943 | if(data&(1<<(15-i)))\r |
1944 | {\r |
1945 | first = i;\r |
1946 | run_length = 0;\r |
1947 | while(i<7 && (data&(1<<(15-(i+1)))))\r |
1948 | {\r |
1949 | i++;\r |
1950 | run_length++;\r |
1951 | }\r |
1952 | if(buffer[0] != 0)\r |
1953 | strcat(buffer, "/");\r |
1954 | sprintf(buffer+strlen(buffer), "D%d", first);\r |
1955 | if(run_length > 0)\r |
1956 | sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r |
1957 | }\r |
1958 | }\r |
1959 | for(i=0;i<8;i++)\r |
1960 | {\r |
1961 | if(data&(1<<(7-i)))\r |
1962 | {\r |
1963 | first = i;\r |
1964 | run_length = 0;\r |
1965 | while(i<7 && (data&(1<<(7-(i+1)))))\r |
1966 | {\r |
1967 | i++;\r |
1968 | run_length++;\r |
1969 | }\r |
1970 | if(buffer[0] != 0)\r |
1971 | strcat(buffer, "/");\r |
1972 | sprintf(buffer+strlen(buffer), "A%d", first);\r |
1973 | if(run_length > 0)\r |
1974 | sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r |
1975 | }\r |
1976 | }\r |
1977 | sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));\r |
1978 | }\r |
1979 | \r |
1980 | static void d68000_movem_pd_32(void)\r |
1981 | {\r |
1982 | uint data = read_imm_16();\r |
1983 | char buffer[40];\r |
1984 | uint first;\r |
1985 | uint run_length;\r |
1986 | uint i;\r |
1987 | \r |
1988 | buffer[0] = 0;\r |
1989 | for(i=0;i<8;i++)\r |
1990 | {\r |
1991 | if(data&(1<<(15-i)))\r |
1992 | {\r |
1993 | first = i;\r |
1994 | run_length = 0;\r |
1995 | while(i<7 && (data&(1<<(15-(i+1)))))\r |
1996 | {\r |
1997 | i++;\r |
1998 | run_length++;\r |
1999 | }\r |
2000 | if(buffer[0] != 0)\r |
2001 | strcat(buffer, "/");\r |
2002 | sprintf(buffer+strlen(buffer), "D%d", first);\r |
2003 | if(run_length > 0)\r |
2004 | sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r |
2005 | }\r |
2006 | }\r |
2007 | for(i=0;i<8;i++)\r |
2008 | {\r |
2009 | if(data&(1<<(7-i)))\r |
2010 | {\r |
2011 | first = i;\r |
2012 | run_length = 0;\r |
2013 | while(i<7 && (data&(1<<(7-(i+1)))))\r |
2014 | {\r |
2015 | i++;\r |
2016 | run_length++;\r |
2017 | }\r |
2018 | if(buffer[0] != 0)\r |
2019 | strcat(buffer, "/");\r |
2020 | sprintf(buffer+strlen(buffer), "A%d", first);\r |
2021 | if(run_length > 0)\r |
2022 | sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r |
2023 | }\r |
2024 | }\r |
2025 | sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));\r |
2026 | }\r |
2027 | \r |
2028 | static void d68000_movem_er_16(void)\r |
2029 | {\r |
2030 | uint data = read_imm_16();\r |
2031 | char buffer[40];\r |
2032 | uint first;\r |
2033 | uint run_length;\r |
2034 | uint i;\r |
2035 | \r |
2036 | buffer[0] = 0;\r |
2037 | for(i=0;i<8;i++)\r |
2038 | {\r |
2039 | if(data&(1<<i))\r |
2040 | {\r |
2041 | first = i;\r |
2042 | run_length = 0;\r |
2043 | while(i<7 && (data&(1<<(i+1))))\r |
2044 | {\r |
2045 | i++;\r |
2046 | run_length++;\r |
2047 | }\r |
2048 | if(buffer[0] != 0)\r |
2049 | strcat(buffer, "/");\r |
2050 | sprintf(buffer+strlen(buffer), "D%d", first);\r |
2051 | if(run_length > 0)\r |
2052 | sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r |
2053 | }\r |
2054 | }\r |
2055 | for(i=0;i<8;i++)\r |
2056 | {\r |
2057 | if(data&(1<<(i+8)))\r |
2058 | {\r |
2059 | first = i;\r |
2060 | run_length = 0;\r |
2061 | while(i<7 && (data&(1<<(i+8+1))))\r |
2062 | {\r |
2063 | i++;\r |
2064 | run_length++;\r |
2065 | }\r |
2066 | if(buffer[0] != 0)\r |
2067 | strcat(buffer, "/");\r |
2068 | sprintf(buffer+strlen(buffer), "A%d", first);\r |
2069 | if(run_length > 0)\r |
2070 | sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r |
2071 | }\r |
2072 | }\r |
2073 | sprintf(g_dasm_str, "movem.w %s, %s", get_ea_mode_str_16(g_cpu_ir), buffer);\r |
2074 | }\r |
2075 | \r |
2076 | static void d68000_movem_er_32(void)\r |
2077 | {\r |
2078 | uint data = read_imm_16();\r |
2079 | char buffer[40];\r |
2080 | uint first;\r |
2081 | uint run_length;\r |
2082 | uint i;\r |
2083 | \r |
2084 | buffer[0] = 0;\r |
2085 | for(i=0;i<8;i++)\r |
2086 | {\r |
2087 | if(data&(1<<i))\r |
2088 | {\r |
2089 | first = i;\r |
2090 | run_length = 0;\r |
2091 | while(i<7 && (data&(1<<(i+1))))\r |
2092 | {\r |
2093 | i++;\r |
2094 | run_length++;\r |
2095 | }\r |
2096 | if(buffer[0] != 0)\r |
2097 | strcat(buffer, "/");\r |
2098 | sprintf(buffer+strlen(buffer), "D%d", first);\r |
2099 | if(run_length > 0)\r |
2100 | sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r |
2101 | }\r |
2102 | }\r |
2103 | for(i=0;i<8;i++)\r |
2104 | {\r |
2105 | if(data&(1<<(i+8)))\r |
2106 | {\r |
2107 | first = i;\r |
2108 | run_length = 0;\r |
2109 | while(i<7 && (data&(1<<(i+8+1))))\r |
2110 | {\r |
2111 | i++;\r |
2112 | run_length++;\r |
2113 | }\r |
2114 | if(buffer[0] != 0)\r |
2115 | strcat(buffer, "/");\r |
2116 | sprintf(buffer+strlen(buffer), "A%d", first);\r |
2117 | if(run_length > 0)\r |
2118 | sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r |
2119 | }\r |
2120 | }\r |
2121 | sprintf(g_dasm_str, "movem.l %s, %s", get_ea_mode_str_32(g_cpu_ir), buffer);\r |
2122 | }\r |
2123 | \r |
2124 | static void d68000_movem_re_16(void)\r |
2125 | {\r |
2126 | uint data = read_imm_16();\r |
2127 | char buffer[40];\r |
2128 | uint first;\r |
2129 | uint run_length;\r |
2130 | uint i;\r |
2131 | \r |
2132 | buffer[0] = 0;\r |
2133 | for(i=0;i<8;i++)\r |
2134 | {\r |
2135 | if(data&(1<<i))\r |
2136 | {\r |
2137 | first = i;\r |
2138 | run_length = 0;\r |
2139 | while(i<7 && (data&(1<<(i+1))))\r |
2140 | {\r |
2141 | i++;\r |
2142 | run_length++;\r |
2143 | }\r |
2144 | if(buffer[0] != 0)\r |
2145 | strcat(buffer, "/");\r |
2146 | sprintf(buffer+strlen(buffer), "D%d", first);\r |
2147 | if(run_length > 0)\r |
2148 | sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r |
2149 | }\r |
2150 | }\r |
2151 | for(i=0;i<8;i++)\r |
2152 | {\r |
2153 | if(data&(1<<(i+8)))\r |
2154 | {\r |
2155 | first = i;\r |
2156 | run_length = 0;\r |
2157 | while(i<7 && (data&(1<<(i+8+1))))\r |
2158 | {\r |
2159 | i++;\r |
2160 | run_length++;\r |
2161 | }\r |
2162 | if(buffer[0] != 0)\r |
2163 | strcat(buffer, "/");\r |
2164 | sprintf(buffer+strlen(buffer), "A%d", first);\r |
2165 | if(run_length > 0)\r |
2166 | sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r |
2167 | }\r |
2168 | }\r |
2169 | sprintf(g_dasm_str, "movem.w %s, %s", buffer, get_ea_mode_str_16(g_cpu_ir));\r |
2170 | }\r |
2171 | \r |
2172 | static void d68000_movem_re_32(void)\r |
2173 | {\r |
2174 | uint data = read_imm_16();\r |
2175 | char buffer[40];\r |
2176 | uint first;\r |
2177 | uint run_length;\r |
2178 | uint i;\r |
2179 | \r |
2180 | buffer[0] = 0;\r |
2181 | for(i=0;i<8;i++)\r |
2182 | {\r |
2183 | if(data&(1<<i))\r |
2184 | {\r |
2185 | first = i;\r |
2186 | run_length = 0;\r |
2187 | while(i<7 && (data&(1<<(i+1))))\r |
2188 | {\r |
2189 | i++;\r |
2190 | run_length++;\r |
2191 | }\r |
2192 | if(buffer[0] != 0)\r |
2193 | strcat(buffer, "/");\r |
2194 | sprintf(buffer+strlen(buffer), "D%d", first);\r |
2195 | if(run_length > 0)\r |
2196 | sprintf(buffer+strlen(buffer), "-D%d", first + run_length);\r |
2197 | }\r |
2198 | }\r |
2199 | for(i=0;i<8;i++)\r |
2200 | {\r |
2201 | if(data&(1<<(i+8)))\r |
2202 | {\r |
2203 | first = i;\r |
2204 | run_length = 0;\r |
2205 | while(i<7 && (data&(1<<(i+8+1))))\r |
2206 | {\r |
2207 | i++;\r |
2208 | run_length++;\r |
2209 | }\r |
2210 | if(buffer[0] != 0)\r |
2211 | strcat(buffer, "/");\r |
2212 | sprintf(buffer+strlen(buffer), "A%d", first);\r |
2213 | if(run_length > 0)\r |
2214 | sprintf(buffer+strlen(buffer), "-A%d", first + run_length);\r |
2215 | }\r |
2216 | }\r |
2217 | sprintf(g_dasm_str, "movem.l %s, %s", buffer, get_ea_mode_str_32(g_cpu_ir));\r |
2218 | }\r |
2219 | \r |
2220 | static void d68000_movep_re_16(void)\r |
2221 | {\r |
2222 | sprintf(g_dasm_str, "movep.w D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);\r |
2223 | }\r |
2224 | \r |
2225 | static void d68000_movep_re_32(void)\r |
2226 | {\r |
2227 | sprintf(g_dasm_str, "movep.l D%d, ($%x,A%d)", (g_cpu_ir>>9)&7, read_imm_16(), g_cpu_ir&7);\r |
2228 | }\r |
2229 | \r |
2230 | static void d68000_movep_er_16(void)\r |
2231 | {\r |
2232 | sprintf(g_dasm_str, "movep.w ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2233 | }\r |
2234 | \r |
2235 | static void d68000_movep_er_32(void)\r |
2236 | {\r |
2237 | sprintf(g_dasm_str, "movep.l ($%x,A%d), D%d", read_imm_16(), g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2238 | }\r |
2239 | \r |
2240 | static void d68010_moves_8(void)\r |
2241 | {\r |
2242 | uint extension;\r |
2243 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
2244 | extension = read_imm_16();\r |
2245 | if(BIT_B(extension))\r |
2246 | sprintf(g_dasm_str, "moves.b %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_8(g_cpu_ir));\r |
2247 | else\r |
2248 | sprintf(g_dasm_str, "moves.b %s, %c%d; (1+)", get_ea_mode_str_8(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r |
2249 | }\r |
2250 | \r |
2251 | static void d68010_moves_16(void)\r |
2252 | {\r |
2253 | uint extension;\r |
2254 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
2255 | extension = read_imm_16();\r |
2256 | if(BIT_B(extension))\r |
2257 | sprintf(g_dasm_str, "moves.w %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_16(g_cpu_ir));\r |
2258 | else\r |
2259 | sprintf(g_dasm_str, "moves.w %s, %c%d; (1+)", get_ea_mode_str_16(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r |
2260 | }\r |
2261 | \r |
2262 | static void d68010_moves_32(void)\r |
2263 | {\r |
2264 | uint extension;\r |
2265 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
2266 | extension = read_imm_16();\r |
2267 | if(BIT_B(extension))\r |
2268 | sprintf(g_dasm_str, "moves.l %c%d, %s; (1+)", BIT_F(extension) ? 'A' : 'D', (extension>>12)&7, get_ea_mode_str_32(g_cpu_ir));\r |
2269 | else\r |
2270 | sprintf(g_dasm_str, "moves.l %s, %c%d; (1+)", get_ea_mode_str_32(g_cpu_ir), BIT_F(extension) ? 'A' : 'D', (extension>>12)&7);\r |
2271 | }\r |
2272 | \r |
2273 | static void d68000_moveq(void)\r |
2274 | {\r |
2275 | sprintf(g_dasm_str, "moveq #%s, D%d", make_signed_hex_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2276 | }\r |
2277 | \r |
2278 | static void d68040_move16_pi_pi(void)\r |
2279 | {\r |
2280 | LIMIT_CPU_TYPES(M68040_PLUS);\r |
2281 | sprintf(g_dasm_str, "move16 (A%d)+, (A%d)+; (4)", g_cpu_ir&7, (read_imm_16()>>12)&7);\r |
2282 | }\r |
2283 | \r |
2284 | static void d68040_move16_pi_al(void)\r |
2285 | {\r |
2286 | LIMIT_CPU_TYPES(M68040_PLUS);\r |
2287 | sprintf(g_dasm_str, "move16 (A%d)+, %s; (4)", g_cpu_ir&7, get_imm_str_u32());\r |
2288 | }\r |
2289 | \r |
2290 | static void d68040_move16_al_pi(void)\r |
2291 | {\r |
2292 | LIMIT_CPU_TYPES(M68040_PLUS);\r |
2293 | sprintf(g_dasm_str, "move16 %s, (A%d)+; (4)", get_imm_str_u32(), g_cpu_ir&7);\r |
2294 | }\r |
2295 | \r |
2296 | static void d68040_move16_ai_al(void)\r |
2297 | {\r |
2298 | LIMIT_CPU_TYPES(M68040_PLUS);\r |
2299 | sprintf(g_dasm_str, "move16 (A%d), %s; (4)", g_cpu_ir&7, get_imm_str_u32());\r |
2300 | }\r |
2301 | \r |
2302 | static void d68040_move16_al_ai(void)\r |
2303 | {\r |
2304 | LIMIT_CPU_TYPES(M68040_PLUS);\r |
2305 | sprintf(g_dasm_str, "move16 %s, (A%d); (4)", get_imm_str_u32(), g_cpu_ir&7);\r |
2306 | }\r |
2307 | \r |
2308 | static void d68000_muls(void)\r |
2309 | {\r |
2310 | sprintf(g_dasm_str, "muls.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2311 | }\r |
2312 | \r |
2313 | static void d68000_mulu(void)\r |
2314 | {\r |
2315 | sprintf(g_dasm_str, "mulu.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2316 | }\r |
2317 | \r |
2318 | static void d68020_mull(void)\r |
2319 | {\r |
2320 | uint extension;\r |
2321 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2322 | extension = read_imm_16();\r |
2323 | \r |
2324 | if(BIT_A(extension))\r |
2325 | sprintf(g_dasm_str, "mul%c.l %s, D%d-D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), extension&7, (extension>>12)&7);\r |
2326 | else\r |
2327 | sprintf(g_dasm_str, "mul%c.l %s, D%d; (2+)", BIT_B(extension) ? 's' : 'u', get_ea_mode_str_32(g_cpu_ir), (extension>>12)&7);\r |
2328 | }\r |
2329 | \r |
2330 | static void d68000_nbcd(void)\r |
2331 | {\r |
2332 | sprintf(g_dasm_str, "nbcd %s", get_ea_mode_str_8(g_cpu_ir));\r |
2333 | }\r |
2334 | \r |
2335 | static void d68000_neg_8(void)\r |
2336 | {\r |
2337 | sprintf(g_dasm_str, "neg.b %s", get_ea_mode_str_8(g_cpu_ir));\r |
2338 | }\r |
2339 | \r |
2340 | static void d68000_neg_16(void)\r |
2341 | {\r |
2342 | sprintf(g_dasm_str, "neg.w %s", get_ea_mode_str_16(g_cpu_ir));\r |
2343 | }\r |
2344 | \r |
2345 | static void d68000_neg_32(void)\r |
2346 | {\r |
2347 | sprintf(g_dasm_str, "neg.l %s", get_ea_mode_str_32(g_cpu_ir));\r |
2348 | }\r |
2349 | \r |
2350 | static void d68000_negx_8(void)\r |
2351 | {\r |
2352 | sprintf(g_dasm_str, "negx.b %s", get_ea_mode_str_8(g_cpu_ir));\r |
2353 | }\r |
2354 | \r |
2355 | static void d68000_negx_16(void)\r |
2356 | {\r |
2357 | sprintf(g_dasm_str, "negx.w %s", get_ea_mode_str_16(g_cpu_ir));\r |
2358 | }\r |
2359 | \r |
2360 | static void d68000_negx_32(void)\r |
2361 | {\r |
2362 | sprintf(g_dasm_str, "negx.l %s", get_ea_mode_str_32(g_cpu_ir));\r |
2363 | }\r |
2364 | \r |
2365 | static void d68000_nop(void)\r |
2366 | {\r |
2367 | sprintf(g_dasm_str, "nop");\r |
2368 | }\r |
2369 | \r |
2370 | static void d68000_not_8(void)\r |
2371 | {\r |
2372 | sprintf(g_dasm_str, "not.b %s", get_ea_mode_str_8(g_cpu_ir));\r |
2373 | }\r |
2374 | \r |
2375 | static void d68000_not_16(void)\r |
2376 | {\r |
2377 | sprintf(g_dasm_str, "not.w %s", get_ea_mode_str_16(g_cpu_ir));\r |
2378 | }\r |
2379 | \r |
2380 | static void d68000_not_32(void)\r |
2381 | {\r |
2382 | sprintf(g_dasm_str, "not.l %s", get_ea_mode_str_32(g_cpu_ir));\r |
2383 | }\r |
2384 | \r |
2385 | static void d68000_or_er_8(void)\r |
2386 | {\r |
2387 | sprintf(g_dasm_str, "or.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2388 | }\r |
2389 | \r |
2390 | static void d68000_or_er_16(void)\r |
2391 | {\r |
2392 | sprintf(g_dasm_str, "or.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2393 | }\r |
2394 | \r |
2395 | static void d68000_or_er_32(void)\r |
2396 | {\r |
2397 | sprintf(g_dasm_str, "or.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2398 | }\r |
2399 | \r |
2400 | static void d68000_or_re_8(void)\r |
2401 | {\r |
2402 | sprintf(g_dasm_str, "or.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
2403 | }\r |
2404 | \r |
2405 | static void d68000_or_re_16(void)\r |
2406 | {\r |
2407 | sprintf(g_dasm_str, "or.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r |
2408 | }\r |
2409 | \r |
2410 | static void d68000_or_re_32(void)\r |
2411 | {\r |
2412 | sprintf(g_dasm_str, "or.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r |
2413 | }\r |
2414 | \r |
2415 | static void d68000_ori_8(void)\r |
2416 | {\r |
2417 | char* str = get_imm_str_u8();\r |
2418 | sprintf(g_dasm_str, "ori.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
2419 | }\r |
2420 | \r |
2421 | static void d68000_ori_16(void)\r |
2422 | {\r |
2423 | char* str = get_imm_str_u16();\r |
2424 | sprintf(g_dasm_str, "ori.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r |
2425 | }\r |
2426 | \r |
2427 | static void d68000_ori_32(void)\r |
2428 | {\r |
2429 | char* str = get_imm_str_u32();\r |
2430 | sprintf(g_dasm_str, "ori.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r |
2431 | }\r |
2432 | \r |
2433 | static void d68000_ori_to_ccr(void)\r |
2434 | {\r |
2435 | sprintf(g_dasm_str, "ori %s, CCR", get_imm_str_u8());\r |
2436 | }\r |
2437 | \r |
2438 | static void d68000_ori_to_sr(void)\r |
2439 | {\r |
2440 | sprintf(g_dasm_str, "ori %s, SR", get_imm_str_u16());\r |
2441 | }\r |
2442 | \r |
2443 | static void d68020_pack_rr(void)\r |
2444 | {\r |
2445 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2446 | sprintf(g_dasm_str, "pack D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());\r |
2447 | }\r |
2448 | \r |
2449 | static void d68020_pack_mm(void)\r |
2450 | {\r |
2451 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2452 | sprintf(g_dasm_str, "pack -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());\r |
2453 | }\r |
2454 | \r |
2455 | static void d68000_pea(void)\r |
2456 | {\r |
2457 | sprintf(g_dasm_str, "pea %s", get_ea_mode_str_32(g_cpu_ir));\r |
2458 | }\r |
2459 | \r |
2460 | static void d68040_pflush(void)\r |
2461 | {\r |
2462 | LIMIT_CPU_TYPES(M68040_PLUS);\r |
2463 | \r |
2464 | if (g_cpu_ir & 0x10)\r |
2465 | {\r |
2466 | sprintf(g_dasm_str, "pflusha%s", (g_cpu_ir & 8) ? "" : "n");\r |
2467 | }\r |
2468 | else\r |
2469 | {\r |
2470 | sprintf(g_dasm_str, "pflush%s(A%d)", (g_cpu_ir & 8) ? "" : "n", g_cpu_ir & 7);\r |
2471 | }\r |
2472 | }\r |
2473 | \r |
2474 | static void d68000_reset(void)\r |
2475 | {\r |
2476 | sprintf(g_dasm_str, "reset");\r |
2477 | }\r |
2478 | \r |
2479 | static void d68000_ror_s_8(void)\r |
2480 | {\r |
2481 | sprintf(g_dasm_str, "ror.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2482 | }\r |
2483 | \r |
2484 | static void d68000_ror_s_16(void)\r |
2485 | {\r |
2486 | sprintf(g_dasm_str, "ror.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7],g_cpu_ir&7);\r |
2487 | }\r |
2488 | \r |
2489 | static void d68000_ror_s_32(void)\r |
2490 | {\r |
2491 | sprintf(g_dasm_str, "ror.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2492 | }\r |
2493 | \r |
2494 | static void d68000_ror_r_8(void)\r |
2495 | {\r |
2496 | sprintf(g_dasm_str, "ror.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2497 | }\r |
2498 | \r |
2499 | static void d68000_ror_r_16(void)\r |
2500 | {\r |
2501 | sprintf(g_dasm_str, "ror.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2502 | }\r |
2503 | \r |
2504 | static void d68000_ror_r_32(void)\r |
2505 | {\r |
2506 | sprintf(g_dasm_str, "ror.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2507 | }\r |
2508 | \r |
2509 | static void d68000_ror_ea(void)\r |
2510 | {\r |
2511 | sprintf(g_dasm_str, "ror.w %s", get_ea_mode_str_32(g_cpu_ir));\r |
2512 | }\r |
2513 | \r |
2514 | static void d68000_rol_s_8(void)\r |
2515 | {\r |
2516 | sprintf(g_dasm_str, "rol.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2517 | }\r |
2518 | \r |
2519 | static void d68000_rol_s_16(void)\r |
2520 | {\r |
2521 | sprintf(g_dasm_str, "rol.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2522 | }\r |
2523 | \r |
2524 | static void d68000_rol_s_32(void)\r |
2525 | {\r |
2526 | sprintf(g_dasm_str, "rol.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2527 | }\r |
2528 | \r |
2529 | static void d68000_rol_r_8(void)\r |
2530 | {\r |
2531 | sprintf(g_dasm_str, "rol.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2532 | }\r |
2533 | \r |
2534 | static void d68000_rol_r_16(void)\r |
2535 | {\r |
2536 | sprintf(g_dasm_str, "rol.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2537 | }\r |
2538 | \r |
2539 | static void d68000_rol_r_32(void)\r |
2540 | {\r |
2541 | sprintf(g_dasm_str, "rol.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2542 | }\r |
2543 | \r |
2544 | static void d68000_rol_ea(void)\r |
2545 | {\r |
2546 | sprintf(g_dasm_str, "rol.w %s", get_ea_mode_str_32(g_cpu_ir));\r |
2547 | }\r |
2548 | \r |
2549 | static void d68000_roxr_s_8(void)\r |
2550 | {\r |
2551 | sprintf(g_dasm_str, "roxr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2552 | }\r |
2553 | \r |
2554 | static void d68000_roxr_s_16(void)\r |
2555 | {\r |
2556 | sprintf(g_dasm_str, "roxr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2557 | }\r |
2558 | \r |
2559 | \r |
2560 | static void d68000_roxr_s_32(void)\r |
2561 | {\r |
2562 | sprintf(g_dasm_str, "roxr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2563 | }\r |
2564 | \r |
2565 | static void d68000_roxr_r_8(void)\r |
2566 | {\r |
2567 | sprintf(g_dasm_str, "roxr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2568 | }\r |
2569 | \r |
2570 | static void d68000_roxr_r_16(void)\r |
2571 | {\r |
2572 | sprintf(g_dasm_str, "roxr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2573 | }\r |
2574 | \r |
2575 | static void d68000_roxr_r_32(void)\r |
2576 | {\r |
2577 | sprintf(g_dasm_str, "roxr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2578 | }\r |
2579 | \r |
2580 | static void d68000_roxr_ea(void)\r |
2581 | {\r |
2582 | sprintf(g_dasm_str, "roxr.w %s", get_ea_mode_str_32(g_cpu_ir));\r |
2583 | }\r |
2584 | \r |
2585 | static void d68000_roxl_s_8(void)\r |
2586 | {\r |
2587 | sprintf(g_dasm_str, "roxl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2588 | }\r |
2589 | \r |
2590 | static void d68000_roxl_s_16(void)\r |
2591 | {\r |
2592 | sprintf(g_dasm_str, "roxl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2593 | }\r |
2594 | \r |
2595 | static void d68000_roxl_s_32(void)\r |
2596 | {\r |
2597 | sprintf(g_dasm_str, "roxl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);\r |
2598 | }\r |
2599 | \r |
2600 | static void d68000_roxl_r_8(void)\r |
2601 | {\r |
2602 | sprintf(g_dasm_str, "roxl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2603 | }\r |
2604 | \r |
2605 | static void d68000_roxl_r_16(void)\r |
2606 | {\r |
2607 | sprintf(g_dasm_str, "roxl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2608 | }\r |
2609 | \r |
2610 | static void d68000_roxl_r_32(void)\r |
2611 | {\r |
2612 | sprintf(g_dasm_str, "roxl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);\r |
2613 | }\r |
2614 | \r |
2615 | static void d68000_roxl_ea(void)\r |
2616 | {\r |
2617 | sprintf(g_dasm_str, "roxl.w %s", get_ea_mode_str_32(g_cpu_ir));\r |
2618 | }\r |
2619 | \r |
2620 | static void d68010_rtd(void)\r |
2621 | {\r |
2622 | LIMIT_CPU_TYPES(M68010_PLUS);\r |
2623 | sprintf(g_dasm_str, "rtd %s; (1+)", get_imm_str_s16());\r |
2624 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r |
2625 | }\r |
2626 | \r |
2627 | static void d68000_rte(void)\r |
2628 | {\r |
2629 | sprintf(g_dasm_str, "rte");\r |
2630 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r |
2631 | }\r |
2632 | \r |
2633 | static void d68020_rtm(void)\r |
2634 | {\r |
2635 | LIMIT_CPU_TYPES(M68020_ONLY);\r |
2636 | sprintf(g_dasm_str, "rtm %c%d; (2+)", BIT_3(g_cpu_ir) ? 'A' : 'D', g_cpu_ir&7);\r |
2637 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r |
2638 | }\r |
2639 | \r |
2640 | static void d68000_rtr(void)\r |
2641 | {\r |
2642 | sprintf(g_dasm_str, "rtr");\r |
2643 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r |
2644 | }\r |
2645 | \r |
2646 | static void d68000_rts(void)\r |
2647 | {\r |
2648 | sprintf(g_dasm_str, "rts");\r |
2649 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OUT);\r |
2650 | }\r |
2651 | \r |
2652 | static void d68000_sbcd_rr(void)\r |
2653 | {\r |
2654 | sprintf(g_dasm_str, "sbcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2655 | }\r |
2656 | \r |
2657 | static void d68000_sbcd_mm(void)\r |
2658 | {\r |
2659 | sprintf(g_dasm_str, "sbcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2660 | }\r |
2661 | \r |
2662 | static void d68000_scc(void)\r |
2663 | {\r |
2664 | sprintf(g_dasm_str, "s%-2s %s", g_cc[(g_cpu_ir>>8)&0xf], get_ea_mode_str_8(g_cpu_ir));\r |
2665 | }\r |
2666 | \r |
2667 | static void d68000_stop(void)\r |
2668 | {\r |
2669 | sprintf(g_dasm_str, "stop %s", get_imm_str_s16());\r |
2670 | }\r |
2671 | \r |
2672 | static void d68000_sub_er_8(void)\r |
2673 | {\r |
2674 | sprintf(g_dasm_str, "sub.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2675 | }\r |
2676 | \r |
2677 | static void d68000_sub_er_16(void)\r |
2678 | {\r |
2679 | sprintf(g_dasm_str, "sub.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2680 | }\r |
2681 | \r |
2682 | static void d68000_sub_er_32(void)\r |
2683 | {\r |
2684 | sprintf(g_dasm_str, "sub.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2685 | }\r |
2686 | \r |
2687 | static void d68000_sub_re_8(void)\r |
2688 | {\r |
2689 | sprintf(g_dasm_str, "sub.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));\r |
2690 | }\r |
2691 | \r |
2692 | static void d68000_sub_re_16(void)\r |
2693 | {\r |
2694 | sprintf(g_dasm_str, "sub.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));\r |
2695 | }\r |
2696 | \r |
2697 | static void d68000_sub_re_32(void)\r |
2698 | {\r |
2699 | sprintf(g_dasm_str, "sub.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));\r |
2700 | }\r |
2701 | \r |
2702 | static void d68000_suba_16(void)\r |
2703 | {\r |
2704 | sprintf(g_dasm_str, "suba.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2705 | }\r |
2706 | \r |
2707 | static void d68000_suba_32(void)\r |
2708 | {\r |
2709 | sprintf(g_dasm_str, "suba.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);\r |
2710 | }\r |
2711 | \r |
2712 | static void d68000_subi_8(void)\r |
2713 | {\r |
2714 | char* str = get_imm_str_s8();\r |
2715 | sprintf(g_dasm_str, "subi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));\r |
2716 | }\r |
2717 | \r |
2718 | static void d68000_subi_16(void)\r |
2719 | {\r |
2720 | char* str = get_imm_str_s16();\r |
2721 | sprintf(g_dasm_str, "subi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));\r |
2722 | }\r |
2723 | \r |
2724 | static void d68000_subi_32(void)\r |
2725 | {\r |
2726 | char* str = get_imm_str_s32();\r |
2727 | sprintf(g_dasm_str, "subi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));\r |
2728 | }\r |
2729 | \r |
2730 | static void d68000_subq_8(void)\r |
2731 | {\r |
2732 | sprintf(g_dasm_str, "subq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));\r |
2733 | }\r |
2734 | \r |
2735 | static void d68000_subq_16(void)\r |
2736 | {\r |
2737 | sprintf(g_dasm_str, "subq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));\r |
2738 | }\r |
2739 | \r |
2740 | static void d68000_subq_32(void)\r |
2741 | {\r |
2742 | sprintf(g_dasm_str, "subq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));\r |
2743 | }\r |
2744 | \r |
2745 | static void d68000_subx_rr_8(void)\r |
2746 | {\r |
2747 | sprintf(g_dasm_str, "subx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2748 | }\r |
2749 | \r |
2750 | static void d68000_subx_rr_16(void)\r |
2751 | {\r |
2752 | sprintf(g_dasm_str, "subx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2753 | }\r |
2754 | \r |
2755 | static void d68000_subx_rr_32(void)\r |
2756 | {\r |
2757 | sprintf(g_dasm_str, "subx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2758 | }\r |
2759 | \r |
2760 | static void d68000_subx_mm_8(void)\r |
2761 | {\r |
2762 | sprintf(g_dasm_str, "subx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2763 | }\r |
2764 | \r |
2765 | static void d68000_subx_mm_16(void)\r |
2766 | {\r |
2767 | sprintf(g_dasm_str, "subx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2768 | }\r |
2769 | \r |
2770 | static void d68000_subx_mm_32(void)\r |
2771 | {\r |
2772 | sprintf(g_dasm_str, "subx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);\r |
2773 | }\r |
2774 | \r |
2775 | static void d68000_swap(void)\r |
2776 | {\r |
2777 | sprintf(g_dasm_str, "swap D%d", g_cpu_ir&7);\r |
2778 | }\r |
2779 | \r |
2780 | static void d68000_tas(void)\r |
2781 | {\r |
2782 | sprintf(g_dasm_str, "tas %s", get_ea_mode_str_8(g_cpu_ir));\r |
2783 | }\r |
2784 | \r |
2785 | static void d68000_trap(void)\r |
2786 | {\r |
2787 | sprintf(g_dasm_str, "trap #$%x", g_cpu_ir&0xf);\r |
2788 | }\r |
2789 | \r |
2790 | static void d68020_trapcc_0(void)\r |
2791 | {\r |
2792 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2793 | sprintf(g_dasm_str, "trap%-2s; (2+)", g_cc[(g_cpu_ir>>8)&0xf]);\r |
2794 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
2795 | }\r |
2796 | \r |
2797 | static void d68020_trapcc_16(void)\r |
2798 | {\r |
2799 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2800 | sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u16());\r |
2801 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
2802 | }\r |
2803 | \r |
2804 | static void d68020_trapcc_32(void)\r |
2805 | {\r |
2806 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2807 | sprintf(g_dasm_str, "trap%-2s %s; (2+)", g_cc[(g_cpu_ir>>8)&0xf], get_imm_str_u32());\r |
2808 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
2809 | }\r |
2810 | \r |
2811 | static void d68000_trapv(void)\r |
2812 | {\r |
2813 | sprintf(g_dasm_str, "trapv");\r |
2814 | SET_OPCODE_FLAGS(DASMFLAG_STEP_OVER);\r |
2815 | }\r |
2816 | \r |
2817 | static void d68000_tst_8(void)\r |
2818 | {\r |
2819 | sprintf(g_dasm_str, "tst.b %s", get_ea_mode_str_8(g_cpu_ir));\r |
2820 | }\r |
2821 | \r |
2822 | static void d68020_tst_pcdi_8(void)\r |
2823 | {\r |
2824 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2825 | sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));\r |
2826 | }\r |
2827 | \r |
2828 | static void d68020_tst_pcix_8(void)\r |
2829 | {\r |
2830 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2831 | sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));\r |
2832 | }\r |
2833 | \r |
2834 | static void d68020_tst_i_8(void)\r |
2835 | {\r |
2836 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2837 | sprintf(g_dasm_str, "tst.b %s; (2+)", get_ea_mode_str_8(g_cpu_ir));\r |
2838 | }\r |
2839 | \r |
2840 | static void d68000_tst_16(void)\r |
2841 | {\r |
2842 | sprintf(g_dasm_str, "tst.w %s", get_ea_mode_str_16(g_cpu_ir));\r |
2843 | }\r |
2844 | \r |
2845 | static void d68020_tst_a_16(void)\r |
2846 | {\r |
2847 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2848 | sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));\r |
2849 | }\r |
2850 | \r |
2851 | static void d68020_tst_pcdi_16(void)\r |
2852 | {\r |
2853 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2854 | sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));\r |
2855 | }\r |
2856 | \r |
2857 | static void d68020_tst_pcix_16(void)\r |
2858 | {\r |
2859 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2860 | sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));\r |
2861 | }\r |
2862 | \r |
2863 | static void d68020_tst_i_16(void)\r |
2864 | {\r |
2865 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2866 | sprintf(g_dasm_str, "tst.w %s; (2+)", get_ea_mode_str_16(g_cpu_ir));\r |
2867 | }\r |
2868 | \r |
2869 | static void d68000_tst_32(void)\r |
2870 | {\r |
2871 | sprintf(g_dasm_str, "tst.l %s", get_ea_mode_str_32(g_cpu_ir));\r |
2872 | }\r |
2873 | \r |
2874 | static void d68020_tst_a_32(void)\r |
2875 | {\r |
2876 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2877 | sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));\r |
2878 | }\r |
2879 | \r |
2880 | static void d68020_tst_pcdi_32(void)\r |
2881 | {\r |
2882 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2883 | sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));\r |
2884 | }\r |
2885 | \r |
2886 | static void d68020_tst_pcix_32(void)\r |
2887 | {\r |
2888 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2889 | sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));\r |
2890 | }\r |
2891 | \r |
2892 | static void d68020_tst_i_32(void)\r |
2893 | {\r |
2894 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2895 | sprintf(g_dasm_str, "tst.l %s; (2+)", get_ea_mode_str_32(g_cpu_ir));\r |
2896 | }\r |
2897 | \r |
2898 | static void d68000_unlk(void)\r |
2899 | {\r |
2900 | sprintf(g_dasm_str, "unlk A%d", g_cpu_ir&7);\r |
2901 | }\r |
2902 | \r |
2903 | static void d68020_unpk_rr(void)\r |
2904 | {\r |
2905 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2906 | sprintf(g_dasm_str, "unpk D%d, D%d, %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());\r |
2907 | }\r |
2908 | \r |
2909 | static void d68020_unpk_mm(void)\r |
2910 | {\r |
2911 | LIMIT_CPU_TYPES(M68020_PLUS);\r |
2912 | sprintf(g_dasm_str, "unpk -(A%d), -(A%d), %s; (2+)", g_cpu_ir&7, (g_cpu_ir>>9)&7, get_imm_str_u16());\r |
2913 | }\r |
2914 | \r |
2915 | \r |
2916 | \r |
2917 | /* ======================================================================== */\r |
2918 | /* ======================= INSTRUCTION TABLE BUILDER ====================== */\r |
2919 | /* ======================================================================== */\r |
2920 | \r |
2921 | /* EA Masks:\r |
2922 | 800 = data register direct\r |
2923 | 400 = address register direct\r |
2924 | 200 = address register indirect\r |
2925 | 100 = ARI postincrement\r |
2926 | 80 = ARI pre-decrement\r |
2927 | 40 = ARI displacement\r |
2928 | 20 = ARI index\r |
2929 | 10 = absolute short\r |
2930 | 8 = absolute long\r |
2931 | 4 = immediate / sr\r |
2932 | 2 = pc displacement\r |
2933 | 1 = pc idx\r |
2934 | */\r |
2935 | \r |
2936 | static opcode_struct g_opcode_info[] =\r |
2937 | {\r |
2938 | /* opcode handler mask match ea mask */\r |
2939 | {d68000_1010 , 0xf000, 0xa000, 0x000},\r |
2940 | {d68000_1111 , 0xf000, 0xf000, 0x000},\r |
2941 | {d68000_abcd_rr , 0xf1f8, 0xc100, 0x000},\r |
2942 | {d68000_abcd_mm , 0xf1f8, 0xc108, 0x000},\r |
2943 | {d68000_add_er_8 , 0xf1c0, 0xd000, 0xbff},\r |
2944 | {d68000_add_er_16 , 0xf1c0, 0xd040, 0xfff},\r |
2945 | {d68000_add_er_32 , 0xf1c0, 0xd080, 0xfff},\r |
2946 | {d68000_add_re_8 , 0xf1c0, 0xd100, 0x3f8},\r |
2947 | {d68000_add_re_16 , 0xf1c0, 0xd140, 0x3f8},\r |
2948 | {d68000_add_re_32 , 0xf1c0, 0xd180, 0x3f8},\r |
2949 | {d68000_adda_16 , 0xf1c0, 0xd0c0, 0xfff},\r |
2950 | {d68000_adda_32 , 0xf1c0, 0xd1c0, 0xfff},\r |
2951 | {d68000_addi_8 , 0xffc0, 0x0600, 0xbf8},\r |
2952 | {d68000_addi_16 , 0xffc0, 0x0640, 0xbf8},\r |
2953 | {d68000_addi_32 , 0xffc0, 0x0680, 0xbf8},\r |
2954 | {d68000_addq_8 , 0xf1c0, 0x5000, 0xbf8},\r |
2955 | {d68000_addq_16 , 0xf1c0, 0x5040, 0xff8},\r |
2956 | {d68000_addq_32 , 0xf1c0, 0x5080, 0xff8},\r |
2957 | {d68000_addx_rr_8 , 0xf1f8, 0xd100, 0x000},\r |
2958 | {d68000_addx_rr_16 , 0xf1f8, 0xd140, 0x000},\r |
2959 | {d68000_addx_rr_32 , 0xf1f8, 0xd180, 0x000},\r |
2960 | {d68000_addx_mm_8 , 0xf1f8, 0xd108, 0x000},\r |
2961 | {d68000_addx_mm_16 , 0xf1f8, 0xd148, 0x000},\r |
2962 | {d68000_addx_mm_32 , 0xf1f8, 0xd188, 0x000},\r |
2963 | {d68000_and_er_8 , 0xf1c0, 0xc000, 0xbff},\r |
2964 | {d68000_and_er_16 , 0xf1c0, 0xc040, 0xbff},\r |
2965 | {d68000_and_er_32 , 0xf1c0, 0xc080, 0xbff},\r |
2966 | {d68000_and_re_8 , 0xf1c0, 0xc100, 0x3f8},\r |
2967 | {d68000_and_re_16 , 0xf1c0, 0xc140, 0x3f8},\r |
2968 | {d68000_and_re_32 , 0xf1c0, 0xc180, 0x3f8},\r |
2969 | {d68000_andi_to_ccr , 0xffff, 0x023c, 0x000},\r |
2970 | {d68000_andi_to_sr , 0xffff, 0x027c, 0x000},\r |
2971 | {d68000_andi_8 , 0xffc0, 0x0200, 0xbf8},\r |
2972 | {d68000_andi_16 , 0xffc0, 0x0240, 0xbf8},\r |
2973 | {d68000_andi_32 , 0xffc0, 0x0280, 0xbf8},\r |
2974 | {d68000_asr_s_8 , 0xf1f8, 0xe000, 0x000},\r |
2975 | {d68000_asr_s_16 , 0xf1f8, 0xe040, 0x000},\r |
2976 | {d68000_asr_s_32 , 0xf1f8, 0xe080, 0x000},\r |
2977 | {d68000_asr_r_8 , 0xf1f8, 0xe020, 0x000},\r |
2978 | {d68000_asr_r_16 , 0xf1f8, 0xe060, 0x000},\r |
2979 | {d68000_asr_r_32 , 0xf1f8, 0xe0a0, 0x000},\r |
2980 | {d68000_asr_ea , 0xffc0, 0xe0c0, 0x3f8},\r |
2981 | {d68000_asl_s_8 , 0xf1f8, 0xe100, 0x000},\r |
2982 | {d68000_asl_s_16 , 0xf1f8, 0xe140, 0x000},\r |
2983 | {d68000_asl_s_32 , 0xf1f8, 0xe180, 0x000},\r |
2984 | {d68000_asl_r_8 , 0xf1f8, 0xe120, 0x000},\r |
2985 | {d68000_asl_r_16 , 0xf1f8, 0xe160, 0x000},\r |
2986 | {d68000_asl_r_32 , 0xf1f8, 0xe1a0, 0x000},\r |
2987 | {d68000_asl_ea , 0xffc0, 0xe1c0, 0x3f8},\r |
2988 | {d68000_bcc_8 , 0xf000, 0x6000, 0x000},\r |
2989 | {d68000_bcc_16 , 0xf0ff, 0x6000, 0x000},\r |
2990 | {d68020_bcc_32 , 0xf0ff, 0x60ff, 0x000},\r |
2991 | {d68000_bchg_r , 0xf1c0, 0x0140, 0xbf8},\r |
2992 | {d68000_bchg_s , 0xffc0, 0x0840, 0xbf8},\r |
2993 | {d68000_bclr_r , 0xf1c0, 0x0180, 0xbf8},\r |
2994 | {d68000_bclr_s , 0xffc0, 0x0880, 0xbf8},\r |
2995 | {d68020_bfchg , 0xffc0, 0xeac0, 0xa78},\r |
2996 | {d68020_bfclr , 0xffc0, 0xecc0, 0xa78},\r |
2997 | {d68020_bfexts , 0xffc0, 0xebc0, 0xa7b},\r |
2998 | {d68020_bfextu , 0xffc0, 0xe9c0, 0xa7b},\r |
2999 | {d68020_bfffo , 0xffc0, 0xedc0, 0xa7b},\r |
3000 | {d68020_bfins , 0xffc0, 0xefc0, 0xa78},\r |
3001 | {d68020_bfset , 0xffc0, 0xeec0, 0xa78},\r |
3002 | {d68020_bftst , 0xffc0, 0xe8c0, 0xa7b},\r |
3003 | {d68010_bkpt , 0xfff8, 0x4848, 0x000},\r |
3004 | {d68000_bra_8 , 0xff00, 0x6000, 0x000},\r |
3005 | {d68000_bra_16 , 0xffff, 0x6000, 0x000},\r |
3006 | {d68020_bra_32 , 0xffff, 0x60ff, 0x000},\r |
3007 | {d68000_bset_r , 0xf1c0, 0x01c0, 0xbf8},\r |
3008 | {d68000_bset_s , 0xffc0, 0x08c0, 0xbf8},\r |
3009 | {d68000_bsr_8 , 0xff00, 0x6100, 0x000},\r |
3010 | {d68000_bsr_16 , 0xffff, 0x6100, 0x000},\r |
3011 | {d68020_bsr_32 , 0xffff, 0x61ff, 0x000},\r |
3012 | {d68000_btst_r , 0xf1c0, 0x0100, 0xbff},\r |
3013 | {d68000_btst_s , 0xffc0, 0x0800, 0xbfb},\r |
3014 | {d68020_callm , 0xffc0, 0x06c0, 0x27b},\r |
3015 | {d68020_cas_8 , 0xffc0, 0x0ac0, 0x3f8},\r |
3016 | {d68020_cas_16 , 0xffc0, 0x0cc0, 0x3f8},\r |
3017 | {d68020_cas_32 , 0xffc0, 0x0ec0, 0x3f8},\r |
3018 | {d68020_cas2_16 , 0xffff, 0x0cfc, 0x000},\r |
3019 | {d68020_cas2_32 , 0xffff, 0x0efc, 0x000},\r |
3020 | {d68000_chk_16 , 0xf1c0, 0x4180, 0xbff},\r |
3021 | {d68020_chk_32 , 0xf1c0, 0x4100, 0xbff},\r |
3022 | {d68020_chk2_cmp2_8 , 0xffc0, 0x00c0, 0x27b},\r |
3023 | {d68020_chk2_cmp2_16 , 0xffc0, 0x02c0, 0x27b},\r |
3024 | {d68020_chk2_cmp2_32 , 0xffc0, 0x04c0, 0x27b},\r |
3025 | {d68040_cinv , 0xff20, 0xf400, 0x000},\r |
3026 | {d68000_clr_8 , 0xffc0, 0x4200, 0xbf8},\r |
3027 | {d68000_clr_16 , 0xffc0, 0x4240, 0xbf8},\r |
3028 | {d68000_clr_32 , 0xffc0, 0x4280, 0xbf8},\r |
3029 | {d68000_cmp_8 , 0xf1c0, 0xb000, 0xbff},\r |
3030 | {d68000_cmp_16 , 0xf1c0, 0xb040, 0xfff},\r |
3031 | {d68000_cmp_32 , 0xf1c0, 0xb080, 0xfff},\r |
3032 | {d68000_cmpa_16 , 0xf1c0, 0xb0c0, 0xfff},\r |
3033 | {d68000_cmpa_32 , 0xf1c0, 0xb1c0, 0xfff},\r |
3034 | {d68000_cmpi_8 , 0xffc0, 0x0c00, 0xbf8},\r |
3035 | {d68020_cmpi_pcdi_8 , 0xffff, 0x0c3a, 0x000},\r |
3036 | {d68020_cmpi_pcix_8 , 0xffff, 0x0c3b, 0x000},\r |
3037 | {d68000_cmpi_16 , 0xffc0, 0x0c40, 0xbf8},\r |
3038 | {d68020_cmpi_pcdi_16 , 0xffff, 0x0c7a, 0x000},\r |
3039 | {d68020_cmpi_pcix_16 , 0xffff, 0x0c7b, 0x000},\r |
3040 | {d68000_cmpi_32 , 0xffc0, 0x0c80, 0xbf8},\r |
3041 | {d68020_cmpi_pcdi_32 , 0xffff, 0x0cba, 0x000},\r |
3042 | {d68020_cmpi_pcix_32 , 0xffff, 0x0cbb, 0x000},\r |
3043 | {d68000_cmpm_8 , 0xf1f8, 0xb108, 0x000},\r |
3044 | {d68000_cmpm_16 , 0xf1f8, 0xb148, 0x000},\r |
3045 | {d68000_cmpm_32 , 0xf1f8, 0xb188, 0x000},\r |
3046 | {d68020_cpbcc_16 , 0xf1c0, 0xf080, 0x000},\r |
3047 | {d68020_cpbcc_32 , 0xf1c0, 0xf0c0, 0x000},\r |
3048 | {d68020_cpdbcc , 0xf1f8, 0xf048, 0x000},\r |
3049 | {d68020_cpgen , 0xf1c0, 0xf000, 0x000},\r |
3050 | {d68020_cprestore , 0xf1c0, 0xf140, 0x37f},\r |
3051 | {d68020_cpsave , 0xf1c0, 0xf100, 0x2f8},\r |
3052 | {d68020_cpscc , 0xf1c0, 0xf040, 0xbf8},\r |
3053 | {d68020_cptrapcc_0 , 0xf1ff, 0xf07c, 0x000},\r |
3054 | {d68020_cptrapcc_16 , 0xf1ff, 0xf07a, 0x000},\r |
3055 | {d68020_cptrapcc_32 , 0xf1ff, 0xf07b, 0x000},\r |
3056 | {d68040_cpush , 0xff20, 0xf420, 0x000},\r |
3057 | {d68000_dbcc , 0xf0f8, 0x50c8, 0x000},\r |
3058 | {d68000_dbra , 0xfff8, 0x51c8, 0x000},\r |
3059 | {d68000_divs , 0xf1c0, 0x81c0, 0xbff},\r |
3060 | {d68000_divu , 0xf1c0, 0x80c0, 0xbff},\r |
3061 | {d68020_divl , 0xffc0, 0x4c40, 0xbff},\r |
3062 | {d68000_eor_8 , 0xf1c0, 0xb100, 0xbf8},\r |
3063 | {d68000_eor_16 , 0xf1c0, 0xb140, 0xbf8},\r |
3064 | {d68000_eor_32 , 0xf1c0, 0xb180, 0xbf8},\r |
3065 | {d68000_eori_to_ccr , 0xffff, 0x0a3c, 0x000},\r |
3066 | {d68000_eori_to_sr , 0xffff, 0x0a7c, 0x000},\r |
3067 | {d68000_eori_8 , 0xffc0, 0x0a00, 0xbf8},\r |
3068 | {d68000_eori_16 , 0xffc0, 0x0a40, 0xbf8},\r |
3069 | {d68000_eori_32 , 0xffc0, 0x0a80, 0xbf8},\r |
3070 | {d68000_exg_dd , 0xf1f8, 0xc140, 0x000},\r |
3071 | {d68000_exg_aa , 0xf1f8, 0xc148, 0x000},\r |
3072 | {d68000_exg_da , 0xf1f8, 0xc188, 0x000},\r |
3073 | {d68020_extb_32 , 0xfff8, 0x49c0, 0x000},\r |
3074 | {d68000_ext_16 , 0xfff8, 0x4880, 0x000},\r |
3075 | {d68000_ext_32 , 0xfff8, 0x48c0, 0x000},\r |
3076 | {d68000_illegal , 0xffff, 0x4afc, 0x000},\r |
3077 | {d68000_jmp , 0xffc0, 0x4ec0, 0x27b},\r |
3078 | {d68000_jsr , 0xffc0, 0x4e80, 0x27b},\r |
3079 | {d68000_lea , 0xf1c0, 0x41c0, 0x27b},\r |
3080 | {d68000_link_16 , 0xfff8, 0x4e50, 0x000},\r |
3081 | {d68020_link_32 , 0xfff8, 0x4808, 0x000},\r |
3082 | {d68000_lsr_s_8 , 0xf1f8, 0xe008, 0x000},\r |
3083 | {d68000_lsr_s_16 , 0xf1f8, 0xe048, 0x000},\r |
3084 | {d68000_lsr_s_32 , 0xf1f8, 0xe088, 0x000},\r |
3085 | {d68000_lsr_r_8 , 0xf1f8, 0xe028, 0x000},\r |
3086 | {d68000_lsr_r_16 , 0xf1f8, 0xe068, 0x000},\r |
3087 | {d68000_lsr_r_32 , 0xf1f8, 0xe0a8, 0x000},\r |
3088 | {d68000_lsr_ea , 0xffc0, 0xe2c0, 0x3f8},\r |
3089 | {d68000_lsl_s_8 , 0xf1f8, 0xe108, 0x000},\r |
3090 | {d68000_lsl_s_16 , 0xf1f8, 0xe148, 0x000},\r |
3091 | {d68000_lsl_s_32 , 0xf1f8, 0xe188, 0x000},\r |
3092 | {d68000_lsl_r_8 , 0xf1f8, 0xe128, 0x000},\r |
3093 | {d68000_lsl_r_16 , 0xf1f8, 0xe168, 0x000},\r |
3094 | {d68000_lsl_r_32 , 0xf1f8, 0xe1a8, 0x000},\r |
3095 | {d68000_lsl_ea , 0xffc0, 0xe3c0, 0x3f8},\r |
3096 | {d68000_move_8 , 0xf000, 0x1000, 0xbff},\r |
3097 | {d68000_move_16 , 0xf000, 0x3000, 0xfff},\r |
3098 | {d68000_move_32 , 0xf000, 0x2000, 0xfff},\r |
3099 | {d68000_movea_16 , 0xf1c0, 0x3040, 0xfff},\r |
3100 | {d68000_movea_32 , 0xf1c0, 0x2040, 0xfff},\r |
3101 | {d68000_move_to_ccr , 0xffc0, 0x44c0, 0xbff},\r |
3102 | {d68010_move_fr_ccr , 0xffc0, 0x42c0, 0xbf8},\r |
3103 | {d68000_move_to_sr , 0xffc0, 0x46c0, 0xbff},\r |
3104 | {d68000_move_fr_sr , 0xffc0, 0x40c0, 0xbf8},\r |
3105 | {d68000_move_to_usp , 0xfff8, 0x4e60, 0x000},\r |
3106 | {d68000_move_fr_usp , 0xfff8, 0x4e68, 0x000},\r |
3107 | {d68010_movec , 0xfffe, 0x4e7a, 0x000},\r |
3108 | {d68000_movem_pd_16 , 0xfff8, 0x48a0, 0x000},\r |
3109 | {d68000_movem_pd_32 , 0xfff8, 0x48e0, 0x000},\r |
3110 | {d68000_movem_re_16 , 0xffc0, 0x4880, 0x2f8},\r |
3111 | {d68000_movem_re_32 , 0xffc0, 0x48c0, 0x2f8},\r |
3112 | {d68000_movem_er_16 , 0xffc0, 0x4c80, 0x37b},\r |
3113 | {d68000_movem_er_32 , 0xffc0, 0x4cc0, 0x37b},\r |
3114 | {d68000_movep_er_16 , 0xf1f8, 0x0108, 0x000},\r |
3115 | {d68000_movep_er_32 , 0xf1f8, 0x0148, 0x000},\r |
3116 | {d68000_movep_re_16 , 0xf1f8, 0x0188, 0x000},\r |
3117 | {d68000_movep_re_32 , 0xf1f8, 0x01c8, 0x000},\r |
3118 | {d68010_moves_8 , 0xffc0, 0x0e00, 0x3f8},\r |
3119 | {d68010_moves_16 , 0xffc0, 0x0e40, 0x3f8},\r |
3120 | {d68010_moves_32 , 0xffc0, 0x0e80, 0x3f8},\r |
3121 | {d68000_moveq , 0xf100, 0x7000, 0x000},\r |
3122 | {d68040_move16_pi_pi , 0xfff8, 0xf620, 0x000},\r |
3123 | {d68040_move16_pi_al , 0xfff8, 0xf600, 0x000},\r |
3124 | {d68040_move16_al_pi , 0xfff8, 0xf608, 0x000},\r |
3125 | {d68040_move16_ai_al , 0xfff8, 0xf610, 0x000},\r |
3126 | {d68040_move16_al_ai , 0xfff8, 0xf618, 0x000},\r |
3127 | {d68000_muls , 0xf1c0, 0xc1c0, 0xbff},\r |
3128 | {d68000_mulu , 0xf1c0, 0xc0c0, 0xbff},\r |
3129 | {d68020_mull , 0xffc0, 0x4c00, 0xbff},\r |
3130 | {d68000_nbcd , 0xffc0, 0x4800, 0xbf8},\r |
3131 | {d68000_neg_8 , 0xffc0, 0x4400, 0xbf8},\r |
3132 | {d68000_neg_16 , 0xffc0, 0x4440, 0xbf8},\r |
3133 | {d68000_neg_32 , 0xffc0, 0x4480, 0xbf8},\r |
3134 | {d68000_negx_8 , 0xffc0, 0x4000, 0xbf8},\r |
3135 | {d68000_negx_16 , 0xffc0, 0x4040, 0xbf8},\r |
3136 | {d68000_negx_32 , 0xffc0, 0x4080, 0xbf8},\r |
3137 | {d68000_nop , 0xffff, 0x4e71, 0x000},\r |
3138 | {d68000_not_8 , 0xffc0, 0x4600, 0xbf8},\r |
3139 | {d68000_not_16 , 0xffc0, 0x4640, 0xbf8},\r |
3140 | {d68000_not_32 , 0xffc0, 0x4680, 0xbf8},\r |
3141 | {d68000_or_er_8 , 0xf1c0, 0x8000, 0xbff},\r |
3142 | {d68000_or_er_16 , 0xf1c0, 0x8040, 0xbff},\r |
3143 | {d68000_or_er_32 , 0xf1c0, 0x8080, 0xbff},\r |
3144 | {d68000_or_re_8 , 0xf1c0, 0x8100, 0x3f8},\r |
3145 | {d68000_or_re_16 , 0xf1c0, 0x8140, 0x3f8},\r |
3146 | {d68000_or_re_32 , 0xf1c0, 0x8180, 0x3f8},\r |
3147 | {d68000_ori_to_ccr , 0xffff, 0x003c, 0x000},\r |
3148 | {d68000_ori_to_sr , 0xffff, 0x007c, 0x000},\r |
3149 | {d68000_ori_8 , 0xffc0, 0x0000, 0xbf8},\r |
3150 | {d68000_ori_16 , 0xffc0, 0x0040, 0xbf8},\r |
3151 | {d68000_ori_32 , 0xffc0, 0x0080, 0xbf8},\r |
3152 | {d68020_pack_rr , 0xf1f8, 0x8140, 0x000},\r |
3153 | {d68020_pack_mm , 0xf1f8, 0x8148, 0x000},\r |
3154 | {d68000_pea , 0xffc0, 0x4840, 0x27b},\r |
3155 | {d68040_pflush , 0xffe0, 0xf500, 0x000},\r |
3156 | {d68000_reset , 0xffff, 0x4e70, 0x000},\r |
3157 | {d68000_ror_s_8 , 0xf1f8, 0xe018, 0x000},\r |
3158 | {d68000_ror_s_16 , 0xf1f8, 0xe058, 0x000},\r |
3159 | {d68000_ror_s_32 , 0xf1f8, 0xe098, 0x000},\r |
3160 | {d68000_ror_r_8 , 0xf1f8, 0xe038, 0x000},\r |
3161 | {d68000_ror_r_16 , 0xf1f8, 0xe078, 0x000},\r |
3162 | {d68000_ror_r_32 , 0xf1f8, 0xe0b8, 0x000},\r |
3163 | {d68000_ror_ea , 0xffc0, 0xe6c0, 0x3f8},\r |
3164 | {d68000_rol_s_8 , 0xf1f8, 0xe118, 0x000},\r |
3165 | {d68000_rol_s_16 , 0xf1f8, 0xe158, 0x000},\r |
3166 | {d68000_rol_s_32 , 0xf1f8, 0xe198, 0x000},\r |
3167 | {d68000_rol_r_8 , 0xf1f8, 0xe138, 0x000},\r |
3168 | {d68000_rol_r_16 , 0xf1f8, 0xe178, 0x000},\r |
3169 | {d68000_rol_r_32 , 0xf1f8, 0xe1b8, 0x000},\r |
3170 | {d68000_rol_ea , 0xffc0, 0xe7c0, 0x3f8},\r |
3171 | {d68000_roxr_s_8 , 0xf1f8, 0xe010, 0x000},\r |
3172 | {d68000_roxr_s_16 , 0xf1f8, 0xe050, 0x000},\r |
3173 | {d68000_roxr_s_32 , 0xf1f8, 0xe090, 0x000},\r |
3174 | {d68000_roxr_r_8 , 0xf1f8, 0xe030, 0x000},\r |
3175 | {d68000_roxr_r_16 , 0xf1f8, 0xe070, 0x000},\r |
3176 | {d68000_roxr_r_32 , 0xf1f8, 0xe0b0, 0x000},\r |
3177 | {d68000_roxr_ea , 0xffc0, 0xe4c0, 0x3f8},\r |
3178 | {d68000_roxl_s_8 , 0xf1f8, 0xe110, 0x000},\r |
3179 | {d68000_roxl_s_16 , 0xf1f8, 0xe150, 0x000},\r |
3180 | {d68000_roxl_s_32 , 0xf1f8, 0xe190, 0x000},\r |
3181 | {d68000_roxl_r_8 , 0xf1f8, 0xe130, 0x000},\r |
3182 | {d68000_roxl_r_16 , 0xf1f8, 0xe170, 0x000},\r |
3183 | {d68000_roxl_r_32 , 0xf1f8, 0xe1b0, 0x000},\r |
3184 | {d68000_roxl_ea , 0xffc0, 0xe5c0, 0x3f8},\r |
3185 | {d68010_rtd , 0xffff, 0x4e74, 0x000},\r |
3186 | {d68000_rte , 0xffff, 0x4e73, 0x000},\r |
3187 | {d68020_rtm , 0xfff0, 0x06c0, 0x000},\r |
3188 | {d68000_rtr , 0xffff, 0x4e77, 0x000},\r |
3189 | {d68000_rts , 0xffff, 0x4e75, 0x000},\r |
3190 | {d68000_sbcd_rr , 0xf1f8, 0x8100, 0x000},\r |
3191 | {d68000_sbcd_mm , 0xf1f8, 0x8108, 0x000},\r |
3192 | {d68000_scc , 0xf0c0, 0x50c0, 0xbf8},\r |
3193 | {d68000_stop , 0xffff, 0x4e72, 0x000},\r |
3194 | {d68000_sub_er_8 , 0xf1c0, 0x9000, 0xbff},\r |
3195 | {d68000_sub_er_16 , 0xf1c0, 0x9040, 0xfff},\r |
3196 | {d68000_sub_er_32 , 0xf1c0, 0x9080, 0xfff},\r |
3197 | {d68000_sub_re_8 , 0xf1c0, 0x9100, 0x3f8},\r |
3198 | {d68000_sub_re_16 , 0xf1c0, 0x9140, 0x3f8},\r |
3199 | {d68000_sub_re_32 , 0xf1c0, 0x9180, 0x3f8},\r |
3200 | {d68000_suba_16 , 0xf1c0, 0x90c0, 0xfff},\r |
3201 | {d68000_suba_32 , 0xf1c0, 0x91c0, 0xfff},\r |
3202 | {d68000_subi_8 , 0xffc0, 0x0400, 0xbf8},\r |
3203 | {d68000_subi_16 , 0xffc0, 0x0440, 0xbf8},\r |
3204 | {d68000_subi_32 , 0xffc0, 0x0480, 0xbf8},\r |
3205 | {d68000_subq_8 , 0xf1c0, 0x5100, 0xbf8},\r |
3206 | {d68000_subq_16 , 0xf1c0, 0x5140, 0xff8},\r |
3207 | {d68000_subq_32 , 0xf1c0, 0x5180, 0xff8},\r |
3208 | {d68000_subx_rr_8 , 0xf1f8, 0x9100, 0x000},\r |
3209 | {d68000_subx_rr_16 , 0xf1f8, 0x9140, 0x000},\r |
3210 | {d68000_subx_rr_32 , 0xf1f8, 0x9180, 0x000},\r |
3211 | {d68000_subx_mm_8 , 0xf1f8, 0x9108, 0x000},\r |
3212 | {d68000_subx_mm_16 , 0xf1f8, 0x9148, 0x000},\r |
3213 | {d68000_subx_mm_32 , 0xf1f8, 0x9188, 0x000},\r |
3214 | {d68000_swap , 0xfff8, 0x4840, 0x000},\r |
3215 | {d68000_tas , 0xffc0, 0x4ac0, 0xbf8},\r |
3216 | {d68000_trap , 0xfff0, 0x4e40, 0x000},\r |
3217 | {d68020_trapcc_0 , 0xf0ff, 0x50fc, 0x000},\r |
3218 | {d68020_trapcc_16 , 0xf0ff, 0x50fa, 0x000},\r |
3219 | {d68020_trapcc_32 , 0xf0ff, 0x50fb, 0x000},\r |
3220 | {d68000_trapv , 0xffff, 0x4e76, 0x000},\r |
3221 | {d68000_tst_8 , 0xffc0, 0x4a00, 0xbf8},\r |
3222 | {d68020_tst_pcdi_8 , 0xffff, 0x4a3a, 0x000},\r |
3223 | {d68020_tst_pcix_8 , 0xffff, 0x4a3b, 0x000},\r |
3224 | {d68020_tst_i_8 , 0xffff, 0x4a3c, 0x000},\r |
3225 | {d68000_tst_16 , 0xffc0, 0x4a40, 0xbf8},\r |
3226 | {d68020_tst_a_16 , 0xfff8, 0x4a48, 0x000},\r |
3227 | {d68020_tst_pcdi_16 , 0xffff, 0x4a7a, 0x000},\r |
3228 | {d68020_tst_pcix_16 , 0xffff, 0x4a7b, 0x000},\r |
3229 | {d68020_tst_i_16 , 0xffff, 0x4a7c, 0x000},\r |
3230 | {d68000_tst_32 , 0xffc0, 0x4a80, 0xbf8},\r |
3231 | {d68020_tst_a_32 , 0xfff8, 0x4a88, 0x000},\r |
3232 | {d68020_tst_pcdi_32 , 0xffff, 0x4aba, 0x000},\r |
3233 | {d68020_tst_pcix_32 , 0xffff, 0x4abb, 0x000},\r |
3234 | {d68020_tst_i_32 , 0xffff, 0x4abc, 0x000},\r |
3235 | {d68000_unlk , 0xfff8, 0x4e58, 0x000},\r |
3236 | {d68020_unpk_rr , 0xf1f8, 0x8180, 0x000},\r |
3237 | {d68020_unpk_mm , 0xf1f8, 0x8188, 0x000},\r |
3238 | {0, 0, 0, 0}\r |
3239 | };\r |
3240 | \r |
3241 | /* Check if opcode is using a valid ea mode */\r |
3242 | static int valid_ea(uint opcode, uint mask)\r |
3243 | {\r |
3244 | if(mask == 0)\r |
3245 | return 1;\r |
3246 | \r |
3247 | switch(opcode & 0x3f)\r |
3248 | {\r |
3249 | case 0x00: case 0x01: case 0x02: case 0x03:\r |
3250 | case 0x04: case 0x05: case 0x06: case 0x07:\r |
3251 | return (mask & 0x800) != 0;\r |
3252 | case 0x08: case 0x09: case 0x0a: case 0x0b:\r |
3253 | case 0x0c: case 0x0d: case 0x0e: case 0x0f:\r |
3254 | return (mask & 0x400) != 0;\r |
3255 | case 0x10: case 0x11: case 0x12: case 0x13:\r |
3256 | case 0x14: case 0x15: case 0x16: case 0x17:\r |
3257 | return (mask & 0x200) != 0;\r |
3258 | case 0x18: case 0x19: case 0x1a: case 0x1b:\r |
3259 | case 0x1c: case 0x1d: case 0x1e: case 0x1f:\r |
3260 | return (mask & 0x100) != 0;\r |
3261 | case 0x20: case 0x21: case 0x22: case 0x23:\r |
3262 | case 0x24: case 0x25: case 0x26: case 0x27:\r |
3263 | return (mask & 0x080) != 0;\r |
3264 | case 0x28: case 0x29: case 0x2a: case 0x2b:\r |
3265 | case 0x2c: case 0x2d: case 0x2e: case 0x2f:\r |
3266 | return (mask & 0x040) != 0;\r |
3267 | case 0x30: case 0x31: case 0x32: case 0x33:\r |
3268 | case 0x34: case 0x35: case 0x36: case 0x37:\r |
3269 | return (mask & 0x020) != 0;\r |
3270 | case 0x38:\r |
3271 | return (mask & 0x010) != 0;\r |
3272 | case 0x39:\r |
3273 | return (mask & 0x008) != 0;\r |
3274 | case 0x3a:\r |
3275 | return (mask & 0x002) != 0;\r |
3276 | case 0x3b:\r |
3277 | return (mask & 0x001) != 0;\r |
3278 | case 0x3c:\r |
3279 | return (mask & 0x004) != 0;\r |
3280 | }\r |
3281 | return 0;\r |
3282 | \r |
3283 | }\r |
3284 | \r |
3285 | /* Used by qsort */\r |
3286 | static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr)\r |
3287 | {\r |
3288 | uint a = ((const opcode_struct*)aptr)->mask;\r |
3289 | uint b = ((const opcode_struct*)bptr)->mask;\r |
3290 | \r |
3291 | a = ((a & 0xAAAA) >> 1) + (a & 0x5555);\r |
3292 | a = ((a & 0xCCCC) >> 2) + (a & 0x3333);\r |
3293 | a = ((a & 0xF0F0) >> 4) + (a & 0x0F0F);\r |
3294 | a = ((a & 0xFF00) >> 8) + (a & 0x00FF);\r |
3295 | \r |
3296 | b = ((b & 0xAAAA) >> 1) + (b & 0x5555);\r |
3297 | b = ((b & 0xCCCC) >> 2) + (b & 0x3333);\r |
3298 | b = ((b & 0xF0F0) >> 4) + (b & 0x0F0F);\r |
3299 | b = ((b & 0xFF00) >> 8) + (b & 0x00FF);\r |
3300 | \r |
3301 | return b - a; /* reversed to get greatest to least sorting */\r |
3302 | }\r |
3303 | \r |
3304 | /* build the opcode handler jump table */\r |
3305 | static void build_opcode_table(void)\r |
3306 | {\r |
3307 | uint i;\r |
3308 | uint opcode;\r |
3309 | opcode_struct* ostruct;\r |
3310 | uint opcode_info_length = 0;\r |
3311 | \r |
3312 | for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)\r |
3313 | opcode_info_length++;\r |
3314 | \r |
3315 | qsort((void *)g_opcode_info, opcode_info_length, sizeof(g_opcode_info[0]), compare_nof_true_bits);\r |
3316 | \r |
3317 | for(i=0;i<0x10000;i++)\r |
3318 | {\r |
3319 | g_instruction_table[i] = d68000_illegal; /* default to illegal */\r |
3320 | opcode = i;\r |
3321 | /* search through opcode info for a match */\r |
3322 | for(ostruct = g_opcode_info;ostruct->opcode_handler != 0;ostruct++)\r |
3323 | {\r |
3324 | /* match opcode mask and allowed ea modes */\r |
3325 | if((opcode & ostruct->mask) == ostruct->match)\r |
3326 | {\r |
3327 | /* Handle destination ea for move instructions */\r |
3328 | if((ostruct->opcode_handler == d68000_move_8 ||\r |
3329 | ostruct->opcode_handler == d68000_move_16 ||\r |
3330 | ostruct->opcode_handler == d68000_move_32) &&\r |
3331 | !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8))\r |
3332 | continue;\r |
3333 | if(valid_ea(opcode, ostruct->ea_mask))\r |
3334 | {\r |
3335 | g_instruction_table[i] = ostruct->opcode_handler;\r |
3336 | break;\r |
3337 | }\r |
3338 | }\r |
3339 | }\r |
3340 | }\r |
3341 | }\r |
3342 | \r |
3343 | \r |
3344 | \r |
3345 | /* ======================================================================== */\r |
3346 | /* ================================= API ================================== */\r |
3347 | /* ======================================================================== */\r |
3348 | \r |
3349 | /* Disasemble one instruction at pc and store in str_buff */\r |
3350 | unsigned int m68k_disassemble(char* str_buff, unsigned int pc, unsigned int cpu_type)\r |
3351 | {\r |
3352 | if(!g_initialized)\r |
3353 | {\r |
3354 | build_opcode_table();\r |
3355 | g_initialized = 1;\r |
3356 | }\r |
3357 | switch(cpu_type)\r |
3358 | {\r |
3359 | case M68K_CPU_TYPE_68000:\r |
3360 | g_cpu_type = TYPE_68000;\r |
3361 | g_address_mask = 0x00ffffff;\r |
3362 | break;\r |
3363 | case M68K_CPU_TYPE_68008:\r |
3364 | g_cpu_type = TYPE_68008;\r |
3365 | g_address_mask = 0x003fffff;\r |
3366 | break;\r |
3367 | case M68K_CPU_TYPE_68010:\r |
3368 | g_cpu_type = TYPE_68010;\r |
3369 | g_address_mask = 0x00ffffff;\r |
3370 | break;\r |
3371 | case M68K_CPU_TYPE_68EC020:\r |
3372 | g_cpu_type = TYPE_68020;\r |
3373 | g_address_mask = 0x00ffffff;\r |
3374 | break;\r |
3375 | case M68K_CPU_TYPE_68020:\r |
3376 | g_cpu_type = TYPE_68020;\r |
3377 | g_address_mask = 0xffffffff;\r |
3378 | break;\r |
3379 | case M68K_CPU_TYPE_68030:\r |
3380 | g_cpu_type = TYPE_68030;\r |
3381 | g_address_mask = 0xffffffff;\r |
3382 | break;\r |
3383 | case M68K_CPU_TYPE_68040:\r |
3384 | g_cpu_type = TYPE_68040;\r |
3385 | g_address_mask = 0xffffffff;\r |
3386 | break;\r |
3387 | default:\r |
3388 | return 0;\r |
3389 | }\r |
3390 | \r |
3391 | g_cpu_pc = pc;\r |
3392 | g_helper_str[0] = 0;\r |
3393 | g_cpu_ir = read_imm_16();\r |
3394 | g_opcode_type = 0;\r |
3395 | g_instruction_table[g_cpu_ir]();\r |
3396 | sprintf(str_buff, "%s%s", g_dasm_str, g_helper_str);\r |
3397 | return COMBINE_OPCODE_FLAGS(g_cpu_pc - pc);\r |
3398 | }\r |
3399 | \r |
3400 | char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type)\r |
3401 | {\r |
3402 | static char buff[100];\r |
3403 | buff[0] = 0;\r |
3404 | m68k_disassemble(buff, pc, cpu_type);\r |
3405 | return buff;\r |
3406 | }\r |
3407 | \r |
3408 | unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, unsigned char* opdata, unsigned char* argdata, int length, unsigned int cpu_type)\r |
3409 | {\r |
3410 | unsigned int result;\r |
3411 | \r |
3412 | g_rawop = opdata;\r |
3413 | g_rawbasepc = pc;\r |
3414 | g_rawlength = length;\r |
3415 | result = m68k_disassemble(str_buff, pc, cpu_type);\r |
3416 | g_rawop = NULL;\r |
3417 | return result;\r |
3418 | }\r |
3419 | \r |
3420 | /* Check if the instruction is a valid one */\r |
3421 | unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cpu_type)\r |
3422 | {\r |
3423 | if(!g_initialized)\r |
3424 | {\r |
3425 | build_opcode_table();\r |
3426 | g_initialized = 1;\r |
3427 | }\r |
3428 | \r |
3429 | instruction &= 0xffff;\r |
3430 | if(g_instruction_table[instruction] == d68000_illegal)\r |
3431 | return 0;\r |
3432 | \r |
3433 | switch(cpu_type)\r |
3434 | {\r |
3435 | case M68K_CPU_TYPE_68000:\r |
3436 | case M68K_CPU_TYPE_68008:\r |
3437 | if(g_instruction_table[instruction] == d68010_bkpt)\r |
3438 | return 0;\r |
3439 | if(g_instruction_table[instruction] == d68010_move_fr_ccr)\r |
3440 | return 0;\r |
3441 | if(g_instruction_table[instruction] == d68010_movec)\r |
3442 | return 0;\r |
3443 | if(g_instruction_table[instruction] == d68010_moves_8)\r |
3444 | return 0;\r |
3445 | if(g_instruction_table[instruction] == d68010_moves_16)\r |
3446 | return 0;\r |
3447 | if(g_instruction_table[instruction] == d68010_moves_32)\r |
3448 | return 0;\r |
3449 | if(g_instruction_table[instruction] == d68010_rtd)\r |
3450 | return 0;\r |
3451 | case M68K_CPU_TYPE_68010:\r |
3452 | if(g_instruction_table[instruction] == d68020_bcc_32)\r |
3453 | return 0;\r |
3454 | if(g_instruction_table[instruction] == d68020_bfchg)\r |
3455 | return 0;\r |
3456 | if(g_instruction_table[instruction] == d68020_bfclr)\r |
3457 | return 0;\r |
3458 | if(g_instruction_table[instruction] == d68020_bfexts)\r |
3459 | return 0;\r |
3460 | if(g_instruction_table[instruction] == d68020_bfextu)\r |
3461 | return 0;\r |
3462 | if(g_instruction_table[instruction] == d68020_bfffo)\r |
3463 | return 0;\r |
3464 | if(g_instruction_table[instruction] == d68020_bfins)\r |
3465 | return 0;\r |
3466 | if(g_instruction_table[instruction] == d68020_bfset)\r |
3467 | return 0;\r |
3468 | if(g_instruction_table[instruction] == d68020_bftst)\r |
3469 | return 0;\r |
3470 | if(g_instruction_table[instruction] == d68020_bra_32)\r |
3471 | return 0;\r |
3472 | if(g_instruction_table[instruction] == d68020_bsr_32)\r |
3473 | return 0;\r |
3474 | if(g_instruction_table[instruction] == d68020_callm)\r |
3475 | return 0;\r |
3476 | if(g_instruction_table[instruction] == d68020_cas_8)\r |
3477 | return 0;\r |
3478 | if(g_instruction_table[instruction] == d68020_cas_16)\r |
3479 | return 0;\r |
3480 | if(g_instruction_table[instruction] == d68020_cas_32)\r |
3481 | return 0;\r |
3482 | if(g_instruction_table[instruction] == d68020_cas2_16)\r |
3483 | return 0;\r |
3484 | if(g_instruction_table[instruction] == d68020_cas2_32)\r |
3485 | return 0;\r |
3486 | if(g_instruction_table[instruction] == d68020_chk_32)\r |
3487 | return 0;\r |
3488 | if(g_instruction_table[instruction] == d68020_chk2_cmp2_8)\r |
3489 | return 0;\r |
3490 | if(g_instruction_table[instruction] == d68020_chk2_cmp2_16)\r |
3491 | return 0;\r |
3492 | if(g_instruction_table[instruction] == d68020_chk2_cmp2_32)\r |
3493 | return 0;\r |
3494 | if(g_instruction_table[instruction] == d68020_cmpi_pcdi_8)\r |
3495 | return 0;\r |
3496 | if(g_instruction_table[instruction] == d68020_cmpi_pcix_8)\r |
3497 | return 0;\r |
3498 | if(g_instruction_table[instruction] == d68020_cmpi_pcdi_16)\r |
3499 | return 0;\r |
3500 | if(g_instruction_table[instruction] == d68020_cmpi_pcix_16)\r |
3501 | return 0;\r |
3502 | if(g_instruction_table[instruction] == d68020_cmpi_pcdi_32)\r |
3503 | return 0;\r |
3504 | if(g_instruction_table[instruction] == d68020_cmpi_pcix_32)\r |
3505 | return 0;\r |
3506 | if(g_instruction_table[instruction] == d68020_cpbcc_16)\r |
3507 | return 0;\r |
3508 | if(g_instruction_table[instruction] == d68020_cpbcc_32)\r |
3509 | return 0;\r |
3510 | if(g_instruction_table[instruction] == d68020_cpdbcc)\r |
3511 | return 0;\r |
3512 | if(g_instruction_table[instruction] == d68020_cpgen)\r |
3513 | return 0;\r |
3514 | if(g_instruction_table[instruction] == d68020_cprestore)\r |
3515 | return 0;\r |
3516 | if(g_instruction_table[instruction] == d68020_cpsave)\r |
3517 | return 0;\r |
3518 | if(g_instruction_table[instruction] == d68020_cpscc)\r |
3519 | return 0;\r |
3520 | if(g_instruction_table[instruction] == d68020_cptrapcc_0)\r |
3521 | return 0;\r |
3522 | if(g_instruction_table[instruction] == d68020_cptrapcc_16)\r |
3523 | return 0;\r |
3524 | if(g_instruction_table[instruction] == d68020_cptrapcc_32)\r |
3525 | return 0;\r |
3526 | if(g_instruction_table[instruction] == d68020_divl)\r |
3527 | return 0;\r |
3528 | if(g_instruction_table[instruction] == d68020_extb_32)\r |
3529 | return 0;\r |
3530 | if(g_instruction_table[instruction] == d68020_link_32)\r |
3531 | return 0;\r |
3532 | if(g_instruction_table[instruction] == d68020_mull)\r |
3533 | return 0;\r |
3534 | if(g_instruction_table[instruction] == d68020_pack_rr)\r |
3535 | return 0;\r |
3536 | if(g_instruction_table[instruction] == d68020_pack_mm)\r |
3537 | return 0;\r |
3538 | if(g_instruction_table[instruction] == d68020_rtm)\r |
3539 | return 0;\r |
3540 | if(g_instruction_table[instruction] == d68020_trapcc_0)\r |
3541 | return 0;\r |
3542 | if(g_instruction_table[instruction] == d68020_trapcc_16)\r |
3543 | return 0;\r |
3544 | if(g_instruction_table[instruction] == d68020_trapcc_32)\r |
3545 | return 0;\r |
3546 | if(g_instruction_table[instruction] == d68020_tst_pcdi_8)\r |
3547 | return 0;\r |
3548 | if(g_instruction_table[instruction] == d68020_tst_pcix_8)\r |
3549 | return 0;\r |
3550 | if(g_instruction_table[instruction] == d68020_tst_i_8)\r |
3551 | return 0;\r |
3552 | if(g_instruction_table[instruction] == d68020_tst_a_16)\r |
3553 | return 0;\r |
3554 | if(g_instruction_table[instruction] == d68020_tst_pcdi_16)\r |
3555 | return 0;\r |
3556 | if(g_instruction_table[instruction] == d68020_tst_pcix_16)\r |
3557 | return 0;\r |
3558 | if(g_instruction_table[instruction] == d68020_tst_i_16)\r |
3559 | return 0;\r |
3560 | if(g_instruction_table[instruction] == d68020_tst_a_32)\r |
3561 | return 0;\r |
3562 | if(g_instruction_table[instruction] == d68020_tst_pcdi_32)\r |
3563 | return 0;\r |
3564 | if(g_instruction_table[instruction] == d68020_tst_pcix_32)\r |
3565 | return 0;\r |
3566 | if(g_instruction_table[instruction] == d68020_tst_i_32)\r |
3567 | return 0;\r |
3568 | if(g_instruction_table[instruction] == d68020_unpk_rr)\r |
3569 | return 0;\r |
3570 | if(g_instruction_table[instruction] == d68020_unpk_mm)\r |
3571 | return 0;\r |
3572 | case M68K_CPU_TYPE_68EC020:\r |
3573 | case M68K_CPU_TYPE_68020:\r |
3574 | case M68K_CPU_TYPE_68030:\r |
3575 | if(g_instruction_table[instruction] == d68040_cinv)\r |
3576 | return 0;\r |
3577 | if(g_instruction_table[instruction] == d68040_cpush)\r |
3578 | return 0;\r |
3579 | if(g_instruction_table[instruction] == d68040_move16_pi_pi)\r |
3580 | return 0;\r |
3581 | if(g_instruction_table[instruction] == d68040_move16_pi_al)\r |
3582 | return 0;\r |
3583 | if(g_instruction_table[instruction] == d68040_move16_al_pi)\r |
3584 | return 0;\r |
3585 | if(g_instruction_table[instruction] == d68040_move16_ai_al)\r |
3586 | return 0;\r |
3587 | if(g_instruction_table[instruction] == d68040_move16_al_ai)\r |
3588 | return 0;\r |
3589 | if(g_instruction_table[instruction] == d68040_pflush)\r |
3590 | return 0;\r |
3591 | }\r |
3592 | if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 &&\r |
3593 | (g_instruction_table[instruction] == d68020_callm ||\r |
3594 | g_instruction_table[instruction] == d68020_rtm))\r |
3595 | return 0;\r |
3596 | \r |
3597 | return 1;\r |
3598 | }\r |
3599 | \r |
3600 | \r |
3601 | \r |
3602 | /* ======================================================================== */\r |
3603 | /* ============================== END OF FILE ============================= */\r |
3604 | /* ======================================================================== */\r |