cc68a136 |
1 | #include "m68kcpu.h"\r |
2 | \r |
3 | /* ======================================================================== */\r |
4 | /* ========================= INSTRUCTION HANDLERS ========================= */\r |
5 | /* ======================================================================== */\r |
6 | \r |
7 | \r |
8 | void m68k_op_1010(void)\r |
9 | {\r |
10 | m68ki_exception_1010();\r |
11 | }\r |
12 | \r |
13 | \r |
14 | void m68k_op_1111(void)\r |
15 | {\r |
16 | m68ki_exception_1111();\r |
17 | }\r |
18 | \r |
19 | \r |
20 | void m68k_op_abcd_8_rr(void)\r |
21 | {\r |
22 | uint* r_dst = &DX;\r |
23 | uint src = DY;\r |
24 | uint dst = *r_dst;\r |
25 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();\r |
26 | \r |
27 | FLAG_V = ~res; /* Undefined V behavior */\r |
28 | \r |
29 | if(res > 9)\r |
30 | res += 6;\r |
31 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);\r |
32 | FLAG_X = FLAG_C = (res > 0x99) << 8;\r |
33 | if(FLAG_C)\r |
34 | res -= 0xa0;\r |
35 | \r |
36 | FLAG_V &= res; /* Undefined V behavior part II */\r |
37 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
38 | \r |
39 | res = MASK_OUT_ABOVE_8(res);\r |
40 | FLAG_Z |= res;\r |
41 | \r |
42 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
43 | }\r |
44 | \r |
45 | \r |
46 | void m68k_op_abcd_8_mm_ax7(void)\r |
47 | {\r |
48 | uint src = OPER_AY_PD_8();\r |
49 | uint ea = EA_A7_PD_8();\r |
50 | uint dst = m68ki_read_8(ea);\r |
51 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();\r |
52 | \r |
53 | FLAG_V = ~res; /* Undefined V behavior */\r |
54 | \r |
55 | if(res > 9)\r |
56 | res += 6;\r |
57 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);\r |
58 | FLAG_X = FLAG_C = (res > 0x99) << 8;\r |
59 | if(FLAG_C)\r |
60 | res -= 0xa0;\r |
61 | \r |
62 | FLAG_V &= res; /* Undefined V behavior part II */\r |
63 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
64 | \r |
65 | res = MASK_OUT_ABOVE_8(res);\r |
66 | FLAG_Z |= res;\r |
67 | \r |
68 | m68ki_write_8(ea, res);\r |
69 | }\r |
70 | \r |
71 | \r |
72 | void m68k_op_abcd_8_mm_ay7(void)\r |
73 | {\r |
74 | uint src = OPER_A7_PD_8();\r |
75 | uint ea = EA_AX_PD_8();\r |
76 | uint dst = m68ki_read_8(ea);\r |
77 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();\r |
78 | \r |
79 | FLAG_V = ~res; /* Undefined V behavior */\r |
80 | \r |
81 | if(res > 9)\r |
82 | res += 6;\r |
83 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);\r |
84 | FLAG_X = FLAG_C = (res > 0x99) << 8;\r |
85 | if(FLAG_C)\r |
86 | res -= 0xa0;\r |
87 | \r |
88 | FLAG_V &= res; /* Undefined V behavior part II */\r |
89 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
90 | \r |
91 | res = MASK_OUT_ABOVE_8(res);\r |
92 | FLAG_Z |= res;\r |
93 | \r |
94 | m68ki_write_8(ea, res);\r |
95 | }\r |
96 | \r |
97 | \r |
98 | void m68k_op_abcd_8_mm_axy7(void)\r |
99 | {\r |
100 | uint src = OPER_A7_PD_8();\r |
101 | uint ea = EA_A7_PD_8();\r |
102 | uint dst = m68ki_read_8(ea);\r |
103 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();\r |
104 | \r |
105 | FLAG_V = ~res; /* Undefined V behavior */\r |
106 | \r |
107 | if(res > 9)\r |
108 | res += 6;\r |
109 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);\r |
110 | FLAG_X = FLAG_C = (res > 0x99) << 8;\r |
111 | if(FLAG_C)\r |
112 | res -= 0xa0;\r |
113 | \r |
114 | FLAG_V &= res; /* Undefined V behavior part II */\r |
115 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
116 | \r |
117 | res = MASK_OUT_ABOVE_8(res);\r |
118 | FLAG_Z |= res;\r |
119 | \r |
120 | m68ki_write_8(ea, res);\r |
121 | }\r |
122 | \r |
123 | \r |
124 | void m68k_op_abcd_8_mm(void)\r |
125 | {\r |
126 | uint src = OPER_AY_PD_8();\r |
127 | uint ea = EA_AX_PD_8();\r |
128 | uint dst = m68ki_read_8(ea);\r |
129 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();\r |
130 | \r |
131 | FLAG_V = ~res; /* Undefined V behavior */\r |
132 | \r |
133 | if(res > 9)\r |
134 | res += 6;\r |
135 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);\r |
136 | FLAG_X = FLAG_C = (res > 0x99) << 8;\r |
137 | if(FLAG_C)\r |
138 | res -= 0xa0;\r |
139 | \r |
140 | FLAG_V &= res; /* Undefined V behavior part II */\r |
141 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
142 | \r |
143 | res = MASK_OUT_ABOVE_8(res);\r |
144 | FLAG_Z |= res;\r |
145 | \r |
146 | m68ki_write_8(ea, res);\r |
147 | }\r |
148 | \r |
149 | \r |
150 | void m68k_op_add_8_er_d(void)\r |
151 | {\r |
152 | uint* r_dst = &DX;\r |
153 | uint src = MASK_OUT_ABOVE_8(DY);\r |
154 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
155 | uint res = src + dst;\r |
156 | \r |
157 | FLAG_N = NFLAG_8(res);\r |
158 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
159 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
160 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
161 | \r |
162 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
163 | }\r |
164 | \r |
165 | \r |
166 | void m68k_op_add_8_er_ai(void)\r |
167 | {\r |
168 | uint* r_dst = &DX;\r |
169 | uint src = OPER_AY_AI_8();\r |
170 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
171 | uint res = src + dst;\r |
172 | \r |
173 | FLAG_N = NFLAG_8(res);\r |
174 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
175 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
176 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
177 | \r |
178 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
179 | }\r |
180 | \r |
181 | \r |
182 | void m68k_op_add_8_er_pi(void)\r |
183 | {\r |
184 | uint* r_dst = &DX;\r |
185 | uint src = OPER_AY_PI_8();\r |
186 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
187 | uint res = src + dst;\r |
188 | \r |
189 | FLAG_N = NFLAG_8(res);\r |
190 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
191 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
192 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
193 | \r |
194 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
195 | }\r |
196 | \r |
197 | \r |
198 | void m68k_op_add_8_er_pi7(void)\r |
199 | {\r |
200 | uint* r_dst = &DX;\r |
201 | uint src = OPER_A7_PI_8();\r |
202 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
203 | uint res = src + dst;\r |
204 | \r |
205 | FLAG_N = NFLAG_8(res);\r |
206 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
207 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
208 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
209 | \r |
210 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
211 | }\r |
212 | \r |
213 | \r |
214 | void m68k_op_add_8_er_pd(void)\r |
215 | {\r |
216 | uint* r_dst = &DX;\r |
217 | uint src = OPER_AY_PD_8();\r |
218 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
219 | uint res = src + dst;\r |
220 | \r |
221 | FLAG_N = NFLAG_8(res);\r |
222 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
223 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
224 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
225 | \r |
226 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
227 | }\r |
228 | \r |
229 | \r |
230 | void m68k_op_add_8_er_pd7(void)\r |
231 | {\r |
232 | uint* r_dst = &DX;\r |
233 | uint src = OPER_A7_PD_8();\r |
234 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
235 | uint res = src + dst;\r |
236 | \r |
237 | FLAG_N = NFLAG_8(res);\r |
238 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
239 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
240 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
241 | \r |
242 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
243 | }\r |
244 | \r |
245 | \r |
246 | void m68k_op_add_8_er_di(void)\r |
247 | {\r |
248 | uint* r_dst = &DX;\r |
249 | uint src = OPER_AY_DI_8();\r |
250 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
251 | uint res = src + dst;\r |
252 | \r |
253 | FLAG_N = NFLAG_8(res);\r |
254 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
255 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
256 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
257 | \r |
258 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
259 | }\r |
260 | \r |
261 | \r |
262 | void m68k_op_add_8_er_ix(void)\r |
263 | {\r |
264 | uint* r_dst = &DX;\r |
265 | uint src = OPER_AY_IX_8();\r |
266 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
267 | uint res = src + dst;\r |
268 | \r |
269 | FLAG_N = NFLAG_8(res);\r |
270 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
271 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
272 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
273 | \r |
274 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
275 | }\r |
276 | \r |
277 | \r |
278 | void m68k_op_add_8_er_aw(void)\r |
279 | {\r |
280 | uint* r_dst = &DX;\r |
281 | uint src = OPER_AW_8();\r |
282 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
283 | uint res = src + dst;\r |
284 | \r |
285 | FLAG_N = NFLAG_8(res);\r |
286 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
287 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
288 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
289 | \r |
290 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
291 | }\r |
292 | \r |
293 | \r |
294 | void m68k_op_add_8_er_al(void)\r |
295 | {\r |
296 | uint* r_dst = &DX;\r |
297 | uint src = OPER_AL_8();\r |
298 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
299 | uint res = src + dst;\r |
300 | \r |
301 | FLAG_N = NFLAG_8(res);\r |
302 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
303 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
304 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
305 | \r |
306 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
307 | }\r |
308 | \r |
309 | \r |
310 | void m68k_op_add_8_er_pcdi(void)\r |
311 | {\r |
312 | uint* r_dst = &DX;\r |
313 | uint src = OPER_PCDI_8();\r |
314 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
315 | uint res = src + dst;\r |
316 | \r |
317 | FLAG_N = NFLAG_8(res);\r |
318 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
319 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
320 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
321 | \r |
322 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
323 | }\r |
324 | \r |
325 | \r |
326 | void m68k_op_add_8_er_pcix(void)\r |
327 | {\r |
328 | uint* r_dst = &DX;\r |
329 | uint src = OPER_PCIX_8();\r |
330 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
331 | uint res = src + dst;\r |
332 | \r |
333 | FLAG_N = NFLAG_8(res);\r |
334 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
335 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
336 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
337 | \r |
338 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
339 | }\r |
340 | \r |
341 | \r |
342 | void m68k_op_add_8_er_i(void)\r |
343 | {\r |
344 | uint* r_dst = &DX;\r |
345 | uint src = OPER_I_8();\r |
346 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
347 | uint res = src + dst;\r |
348 | \r |
349 | FLAG_N = NFLAG_8(res);\r |
350 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
351 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
352 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
353 | \r |
354 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
355 | }\r |
356 | \r |
357 | \r |
358 | void m68k_op_add_16_er_d(void)\r |
359 | {\r |
360 | uint* r_dst = &DX;\r |
361 | uint src = MASK_OUT_ABOVE_16(DY);\r |
362 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
363 | uint res = src + dst;\r |
364 | \r |
365 | FLAG_N = NFLAG_16(res);\r |
366 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
367 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
368 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
369 | \r |
370 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
371 | }\r |
372 | \r |
373 | \r |
374 | void m68k_op_add_16_er_a(void)\r |
375 | {\r |
376 | uint* r_dst = &DX;\r |
377 | uint src = MASK_OUT_ABOVE_16(AY);\r |
378 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
379 | uint res = src + dst;\r |
380 | \r |
381 | FLAG_N = NFLAG_16(res);\r |
382 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
383 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
384 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
385 | \r |
386 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
387 | }\r |
388 | \r |
389 | \r |
390 | void m68k_op_add_16_er_ai(void)\r |
391 | {\r |
392 | uint* r_dst = &DX;\r |
393 | uint src = OPER_AY_AI_16();\r |
394 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
395 | uint res = src + dst;\r |
396 | \r |
397 | FLAG_N = NFLAG_16(res);\r |
398 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
399 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
400 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
401 | \r |
402 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
403 | }\r |
404 | \r |
405 | \r |
406 | void m68k_op_add_16_er_pi(void)\r |
407 | {\r |
408 | uint* r_dst = &DX;\r |
409 | uint src = OPER_AY_PI_16();\r |
410 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
411 | uint res = src + dst;\r |
412 | \r |
413 | FLAG_N = NFLAG_16(res);\r |
414 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
415 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
416 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
417 | \r |
418 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
419 | }\r |
420 | \r |
421 | \r |
422 | void m68k_op_add_16_er_pd(void)\r |
423 | {\r |
424 | uint* r_dst = &DX;\r |
425 | uint src = OPER_AY_PD_16();\r |
426 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
427 | uint res = src + dst;\r |
428 | \r |
429 | FLAG_N = NFLAG_16(res);\r |
430 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
431 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
432 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
433 | \r |
434 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
435 | }\r |
436 | \r |
437 | \r |
438 | void m68k_op_add_16_er_di(void)\r |
439 | {\r |
440 | uint* r_dst = &DX;\r |
441 | uint src = OPER_AY_DI_16();\r |
442 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
443 | uint res = src + dst;\r |
444 | \r |
445 | FLAG_N = NFLAG_16(res);\r |
446 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
447 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
448 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
449 | \r |
450 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
451 | }\r |
452 | \r |
453 | \r |
454 | void m68k_op_add_16_er_ix(void)\r |
455 | {\r |
456 | uint* r_dst = &DX;\r |
457 | uint src = OPER_AY_IX_16();\r |
458 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
459 | uint res = src + dst;\r |
460 | \r |
461 | FLAG_N = NFLAG_16(res);\r |
462 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
463 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
464 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
465 | \r |
466 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
467 | }\r |
468 | \r |
469 | \r |
470 | void m68k_op_add_16_er_aw(void)\r |
471 | {\r |
472 | uint* r_dst = &DX;\r |
473 | uint src = OPER_AW_16();\r |
474 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
475 | uint res = src + dst;\r |
476 | \r |
477 | FLAG_N = NFLAG_16(res);\r |
478 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
479 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
480 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
481 | \r |
482 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
483 | }\r |
484 | \r |
485 | \r |
486 | void m68k_op_add_16_er_al(void)\r |
487 | {\r |
488 | uint* r_dst = &DX;\r |
489 | uint src = OPER_AL_16();\r |
490 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
491 | uint res = src + dst;\r |
492 | \r |
493 | FLAG_N = NFLAG_16(res);\r |
494 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
495 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
496 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
497 | \r |
498 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
499 | }\r |
500 | \r |
501 | \r |
502 | void m68k_op_add_16_er_pcdi(void)\r |
503 | {\r |
504 | uint* r_dst = &DX;\r |
505 | uint src = OPER_PCDI_16();\r |
506 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
507 | uint res = src + dst;\r |
508 | \r |
509 | FLAG_N = NFLAG_16(res);\r |
510 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
511 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
512 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
513 | \r |
514 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
515 | }\r |
516 | \r |
517 | \r |
518 | void m68k_op_add_16_er_pcix(void)\r |
519 | {\r |
520 | uint* r_dst = &DX;\r |
521 | uint src = OPER_PCIX_16();\r |
522 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
523 | uint res = src + dst;\r |
524 | \r |
525 | FLAG_N = NFLAG_16(res);\r |
526 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
527 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
528 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
529 | \r |
530 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
531 | }\r |
532 | \r |
533 | \r |
534 | void m68k_op_add_16_er_i(void)\r |
535 | {\r |
536 | uint* r_dst = &DX;\r |
537 | uint src = OPER_I_16();\r |
538 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
539 | uint res = src + dst;\r |
540 | \r |
541 | FLAG_N = NFLAG_16(res);\r |
542 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
543 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
544 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
545 | \r |
546 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
547 | }\r |
548 | \r |
549 | \r |
550 | void m68k_op_add_32_er_d(void)\r |
551 | {\r |
552 | uint* r_dst = &DX;\r |
553 | uint src = DY;\r |
554 | uint dst = *r_dst;\r |
555 | uint res = src + dst;\r |
556 | \r |
557 | FLAG_N = NFLAG_32(res);\r |
558 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
559 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
560 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
561 | \r |
562 | *r_dst = FLAG_Z;\r |
563 | }\r |
564 | \r |
565 | \r |
566 | void m68k_op_add_32_er_a(void)\r |
567 | {\r |
568 | uint* r_dst = &DX;\r |
569 | uint src = AY;\r |
570 | uint dst = *r_dst;\r |
571 | uint res = src + dst;\r |
572 | \r |
573 | FLAG_N = NFLAG_32(res);\r |
574 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
575 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
576 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
577 | \r |
578 | *r_dst = FLAG_Z;\r |
579 | }\r |
580 | \r |
581 | \r |
582 | void m68k_op_add_32_er_ai(void)\r |
583 | {\r |
584 | uint* r_dst = &DX;\r |
585 | uint src = OPER_AY_AI_32();\r |
586 | uint dst = *r_dst;\r |
587 | uint res = src + dst;\r |
588 | \r |
589 | FLAG_N = NFLAG_32(res);\r |
590 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
591 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
592 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
593 | \r |
594 | *r_dst = FLAG_Z;\r |
595 | }\r |
596 | \r |
597 | \r |
598 | void m68k_op_add_32_er_pi(void)\r |
599 | {\r |
600 | uint* r_dst = &DX;\r |
601 | uint src = OPER_AY_PI_32();\r |
602 | uint dst = *r_dst;\r |
603 | uint res = src + dst;\r |
604 | \r |
605 | FLAG_N = NFLAG_32(res);\r |
606 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
607 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
608 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
609 | \r |
610 | *r_dst = FLAG_Z;\r |
611 | }\r |
612 | \r |
613 | \r |
614 | void m68k_op_add_32_er_pd(void)\r |
615 | {\r |
616 | uint* r_dst = &DX;\r |
617 | uint src = OPER_AY_PD_32();\r |
618 | uint dst = *r_dst;\r |
619 | uint res = src + dst;\r |
620 | \r |
621 | FLAG_N = NFLAG_32(res);\r |
622 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
623 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
624 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
625 | \r |
626 | *r_dst = FLAG_Z;\r |
627 | }\r |
628 | \r |
629 | \r |
630 | void m68k_op_add_32_er_di(void)\r |
631 | {\r |
632 | uint* r_dst = &DX;\r |
633 | uint src = OPER_AY_DI_32();\r |
634 | uint dst = *r_dst;\r |
635 | uint res = src + dst;\r |
636 | \r |
637 | FLAG_N = NFLAG_32(res);\r |
638 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
639 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
640 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
641 | \r |
642 | *r_dst = FLAG_Z;\r |
643 | }\r |
644 | \r |
645 | \r |
646 | void m68k_op_add_32_er_ix(void)\r |
647 | {\r |
648 | uint* r_dst = &DX;\r |
649 | uint src = OPER_AY_IX_32();\r |
650 | uint dst = *r_dst;\r |
651 | uint res = src + dst;\r |
652 | \r |
653 | FLAG_N = NFLAG_32(res);\r |
654 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
655 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
656 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
657 | \r |
658 | *r_dst = FLAG_Z;\r |
659 | }\r |
660 | \r |
661 | \r |
662 | void m68k_op_add_32_er_aw(void)\r |
663 | {\r |
664 | uint* r_dst = &DX;\r |
665 | uint src = OPER_AW_32();\r |
666 | uint dst = *r_dst;\r |
667 | uint res = src + dst;\r |
668 | \r |
669 | FLAG_N = NFLAG_32(res);\r |
670 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
671 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
672 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
673 | \r |
674 | *r_dst = FLAG_Z;\r |
675 | }\r |
676 | \r |
677 | \r |
678 | void m68k_op_add_32_er_al(void)\r |
679 | {\r |
680 | uint* r_dst = &DX;\r |
681 | uint src = OPER_AL_32();\r |
682 | uint dst = *r_dst;\r |
683 | uint res = src + dst;\r |
684 | \r |
685 | FLAG_N = NFLAG_32(res);\r |
686 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
687 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
688 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
689 | \r |
690 | *r_dst = FLAG_Z;\r |
691 | }\r |
692 | \r |
693 | \r |
694 | void m68k_op_add_32_er_pcdi(void)\r |
695 | {\r |
696 | uint* r_dst = &DX;\r |
697 | uint src = OPER_PCDI_32();\r |
698 | uint dst = *r_dst;\r |
699 | uint res = src + dst;\r |
700 | \r |
701 | FLAG_N = NFLAG_32(res);\r |
702 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
703 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
704 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
705 | \r |
706 | *r_dst = FLAG_Z;\r |
707 | }\r |
708 | \r |
709 | \r |
710 | void m68k_op_add_32_er_pcix(void)\r |
711 | {\r |
712 | uint* r_dst = &DX;\r |
713 | uint src = OPER_PCIX_32();\r |
714 | uint dst = *r_dst;\r |
715 | uint res = src + dst;\r |
716 | \r |
717 | FLAG_N = NFLAG_32(res);\r |
718 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
719 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
720 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
721 | \r |
722 | *r_dst = FLAG_Z;\r |
723 | }\r |
724 | \r |
725 | \r |
726 | void m68k_op_add_32_er_i(void)\r |
727 | {\r |
728 | uint* r_dst = &DX;\r |
729 | uint src = OPER_I_32();\r |
730 | uint dst = *r_dst;\r |
731 | uint res = src + dst;\r |
732 | \r |
733 | FLAG_N = NFLAG_32(res);\r |
734 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
735 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
736 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
737 | \r |
738 | *r_dst = FLAG_Z;\r |
739 | }\r |
740 | \r |
741 | \r |
742 | void m68k_op_add_8_re_ai(void)\r |
743 | {\r |
744 | uint ea = EA_AY_AI_8();\r |
745 | uint src = MASK_OUT_ABOVE_8(DX);\r |
746 | uint dst = m68ki_read_8(ea);\r |
747 | uint res = src + dst;\r |
748 | \r |
749 | FLAG_N = NFLAG_8(res);\r |
750 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
751 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
752 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
753 | \r |
754 | m68ki_write_8(ea, FLAG_Z);\r |
755 | }\r |
756 | \r |
757 | \r |
758 | void m68k_op_add_8_re_pi(void)\r |
759 | {\r |
760 | uint ea = EA_AY_PI_8();\r |
761 | uint src = MASK_OUT_ABOVE_8(DX);\r |
762 | uint dst = m68ki_read_8(ea);\r |
763 | uint res = src + dst;\r |
764 | \r |
765 | FLAG_N = NFLAG_8(res);\r |
766 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
767 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
768 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
769 | \r |
770 | m68ki_write_8(ea, FLAG_Z);\r |
771 | }\r |
772 | \r |
773 | \r |
774 | void m68k_op_add_8_re_pi7(void)\r |
775 | {\r |
776 | uint ea = EA_A7_PI_8();\r |
777 | uint src = MASK_OUT_ABOVE_8(DX);\r |
778 | uint dst = m68ki_read_8(ea);\r |
779 | uint res = src + dst;\r |
780 | \r |
781 | FLAG_N = NFLAG_8(res);\r |
782 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
783 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
784 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
785 | \r |
786 | m68ki_write_8(ea, FLAG_Z);\r |
787 | }\r |
788 | \r |
789 | \r |
790 | void m68k_op_add_8_re_pd(void)\r |
791 | {\r |
792 | uint ea = EA_AY_PD_8();\r |
793 | uint src = MASK_OUT_ABOVE_8(DX);\r |
794 | uint dst = m68ki_read_8(ea);\r |
795 | uint res = src + dst;\r |
796 | \r |
797 | FLAG_N = NFLAG_8(res);\r |
798 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
799 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
800 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
801 | \r |
802 | m68ki_write_8(ea, FLAG_Z);\r |
803 | }\r |
804 | \r |
805 | \r |
806 | void m68k_op_add_8_re_pd7(void)\r |
807 | {\r |
808 | uint ea = EA_A7_PD_8();\r |
809 | uint src = MASK_OUT_ABOVE_8(DX);\r |
810 | uint dst = m68ki_read_8(ea);\r |
811 | uint res = src + dst;\r |
812 | \r |
813 | FLAG_N = NFLAG_8(res);\r |
814 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
815 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
816 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
817 | \r |
818 | m68ki_write_8(ea, FLAG_Z);\r |
819 | }\r |
820 | \r |
821 | \r |
822 | void m68k_op_add_8_re_di(void)\r |
823 | {\r |
824 | uint ea = EA_AY_DI_8();\r |
825 | uint src = MASK_OUT_ABOVE_8(DX);\r |
826 | uint dst = m68ki_read_8(ea);\r |
827 | uint res = src + dst;\r |
828 | \r |
829 | FLAG_N = NFLAG_8(res);\r |
830 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
831 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
832 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
833 | \r |
834 | m68ki_write_8(ea, FLAG_Z);\r |
835 | }\r |
836 | \r |
837 | \r |
838 | void m68k_op_add_8_re_ix(void)\r |
839 | {\r |
840 | uint ea = EA_AY_IX_8();\r |
841 | uint src = MASK_OUT_ABOVE_8(DX);\r |
842 | uint dst = m68ki_read_8(ea);\r |
843 | uint res = src + dst;\r |
844 | \r |
845 | FLAG_N = NFLAG_8(res);\r |
846 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
847 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
848 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
849 | \r |
850 | m68ki_write_8(ea, FLAG_Z);\r |
851 | }\r |
852 | \r |
853 | \r |
854 | void m68k_op_add_8_re_aw(void)\r |
855 | {\r |
856 | uint ea = EA_AW_8();\r |
857 | uint src = MASK_OUT_ABOVE_8(DX);\r |
858 | uint dst = m68ki_read_8(ea);\r |
859 | uint res = src + dst;\r |
860 | \r |
861 | FLAG_N = NFLAG_8(res);\r |
862 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
863 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
864 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
865 | \r |
866 | m68ki_write_8(ea, FLAG_Z);\r |
867 | }\r |
868 | \r |
869 | \r |
870 | void m68k_op_add_8_re_al(void)\r |
871 | {\r |
872 | uint ea = EA_AL_8();\r |
873 | uint src = MASK_OUT_ABOVE_8(DX);\r |
874 | uint dst = m68ki_read_8(ea);\r |
875 | uint res = src + dst;\r |
876 | \r |
877 | FLAG_N = NFLAG_8(res);\r |
878 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
879 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
880 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
881 | \r |
882 | m68ki_write_8(ea, FLAG_Z);\r |
883 | }\r |
884 | \r |
885 | \r |
886 | void m68k_op_add_16_re_ai(void)\r |
887 | {\r |
888 | uint ea = EA_AY_AI_16();\r |
889 | uint src = MASK_OUT_ABOVE_16(DX);\r |
890 | uint dst = m68ki_read_16(ea);\r |
891 | uint res = src + dst;\r |
892 | \r |
893 | FLAG_N = NFLAG_16(res);\r |
894 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
895 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
896 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
897 | \r |
898 | m68ki_write_16(ea, FLAG_Z);\r |
899 | }\r |
900 | \r |
901 | \r |
902 | void m68k_op_add_16_re_pi(void)\r |
903 | {\r |
904 | uint ea = EA_AY_PI_16();\r |
905 | uint src = MASK_OUT_ABOVE_16(DX);\r |
906 | uint dst = m68ki_read_16(ea);\r |
907 | uint res = src + dst;\r |
908 | \r |
909 | FLAG_N = NFLAG_16(res);\r |
910 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
911 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
912 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
913 | \r |
914 | m68ki_write_16(ea, FLAG_Z);\r |
915 | }\r |
916 | \r |
917 | \r |
918 | void m68k_op_add_16_re_pd(void)\r |
919 | {\r |
920 | uint ea = EA_AY_PD_16();\r |
921 | uint src = MASK_OUT_ABOVE_16(DX);\r |
922 | uint dst = m68ki_read_16(ea);\r |
923 | uint res = src + dst;\r |
924 | \r |
925 | FLAG_N = NFLAG_16(res);\r |
926 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
927 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
928 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
929 | \r |
930 | m68ki_write_16(ea, FLAG_Z);\r |
931 | }\r |
932 | \r |
933 | \r |
934 | void m68k_op_add_16_re_di(void)\r |
935 | {\r |
936 | uint ea = EA_AY_DI_16();\r |
937 | uint src = MASK_OUT_ABOVE_16(DX);\r |
938 | uint dst = m68ki_read_16(ea);\r |
939 | uint res = src + dst;\r |
940 | \r |
941 | FLAG_N = NFLAG_16(res);\r |
942 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
943 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
944 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
945 | \r |
946 | m68ki_write_16(ea, FLAG_Z);\r |
947 | }\r |
948 | \r |
949 | \r |
950 | void m68k_op_add_16_re_ix(void)\r |
951 | {\r |
952 | uint ea = EA_AY_IX_16();\r |
953 | uint src = MASK_OUT_ABOVE_16(DX);\r |
954 | uint dst = m68ki_read_16(ea);\r |
955 | uint res = src + dst;\r |
956 | \r |
957 | FLAG_N = NFLAG_16(res);\r |
958 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
959 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
960 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
961 | \r |
962 | m68ki_write_16(ea, FLAG_Z);\r |
963 | }\r |
964 | \r |
965 | \r |
966 | void m68k_op_add_16_re_aw(void)\r |
967 | {\r |
968 | uint ea = EA_AW_16();\r |
969 | uint src = MASK_OUT_ABOVE_16(DX);\r |
970 | uint dst = m68ki_read_16(ea);\r |
971 | uint res = src + dst;\r |
972 | \r |
973 | FLAG_N = NFLAG_16(res);\r |
974 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
975 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
976 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
977 | \r |
978 | m68ki_write_16(ea, FLAG_Z);\r |
979 | }\r |
980 | \r |
981 | \r |
982 | void m68k_op_add_16_re_al(void)\r |
983 | {\r |
984 | uint ea = EA_AL_16();\r |
985 | uint src = MASK_OUT_ABOVE_16(DX);\r |
986 | uint dst = m68ki_read_16(ea);\r |
987 | uint res = src + dst;\r |
988 | \r |
989 | FLAG_N = NFLAG_16(res);\r |
990 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
991 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
992 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
993 | \r |
994 | m68ki_write_16(ea, FLAG_Z);\r |
995 | }\r |
996 | \r |
997 | \r |
998 | void m68k_op_add_32_re_ai(void)\r |
999 | {\r |
1000 | uint ea = EA_AY_AI_32();\r |
1001 | uint src = DX;\r |
1002 | uint dst = m68ki_read_32(ea);\r |
1003 | uint res = src + dst;\r |
1004 | \r |
1005 | FLAG_N = NFLAG_32(res);\r |
1006 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1007 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1008 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1009 | \r |
1010 | m68ki_write_32(ea, FLAG_Z);\r |
1011 | }\r |
1012 | \r |
1013 | \r |
1014 | void m68k_op_add_32_re_pi(void)\r |
1015 | {\r |
1016 | uint ea = EA_AY_PI_32();\r |
1017 | uint src = DX;\r |
1018 | uint dst = m68ki_read_32(ea);\r |
1019 | uint res = src + dst;\r |
1020 | \r |
1021 | FLAG_N = NFLAG_32(res);\r |
1022 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1023 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1024 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1025 | \r |
1026 | m68ki_write_32(ea, FLAG_Z);\r |
1027 | }\r |
1028 | \r |
1029 | \r |
1030 | void m68k_op_add_32_re_pd(void)\r |
1031 | {\r |
1032 | uint ea = EA_AY_PD_32();\r |
1033 | uint src = DX;\r |
1034 | uint dst = m68ki_read_32(ea);\r |
1035 | uint res = src + dst;\r |
1036 | \r |
1037 | FLAG_N = NFLAG_32(res);\r |
1038 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1039 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1040 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1041 | \r |
1042 | m68ki_write_32(ea, FLAG_Z);\r |
1043 | }\r |
1044 | \r |
1045 | \r |
1046 | void m68k_op_add_32_re_di(void)\r |
1047 | {\r |
1048 | uint ea = EA_AY_DI_32();\r |
1049 | uint src = DX;\r |
1050 | uint dst = m68ki_read_32(ea);\r |
1051 | uint res = src + dst;\r |
1052 | \r |
1053 | FLAG_N = NFLAG_32(res);\r |
1054 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1055 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1056 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1057 | \r |
1058 | m68ki_write_32(ea, FLAG_Z);\r |
1059 | }\r |
1060 | \r |
1061 | \r |
1062 | void m68k_op_add_32_re_ix(void)\r |
1063 | {\r |
1064 | uint ea = EA_AY_IX_32();\r |
1065 | uint src = DX;\r |
1066 | uint dst = m68ki_read_32(ea);\r |
1067 | uint res = src + dst;\r |
1068 | \r |
1069 | FLAG_N = NFLAG_32(res);\r |
1070 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1071 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1072 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1073 | \r |
1074 | m68ki_write_32(ea, FLAG_Z);\r |
1075 | }\r |
1076 | \r |
1077 | \r |
1078 | void m68k_op_add_32_re_aw(void)\r |
1079 | {\r |
1080 | uint ea = EA_AW_32();\r |
1081 | uint src = DX;\r |
1082 | uint dst = m68ki_read_32(ea);\r |
1083 | uint res = src + dst;\r |
1084 | \r |
1085 | FLAG_N = NFLAG_32(res);\r |
1086 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1087 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1088 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1089 | \r |
1090 | m68ki_write_32(ea, FLAG_Z);\r |
1091 | }\r |
1092 | \r |
1093 | \r |
1094 | void m68k_op_add_32_re_al(void)\r |
1095 | {\r |
1096 | uint ea = EA_AL_32();\r |
1097 | uint src = DX;\r |
1098 | uint dst = m68ki_read_32(ea);\r |
1099 | uint res = src + dst;\r |
1100 | \r |
1101 | FLAG_N = NFLAG_32(res);\r |
1102 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1103 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1104 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1105 | \r |
1106 | m68ki_write_32(ea, FLAG_Z);\r |
1107 | }\r |
1108 | \r |
1109 | \r |
1110 | void m68k_op_adda_16_d(void)\r |
1111 | {\r |
1112 | uint* r_dst = &AX;\r |
1113 | \r |
1114 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY));\r |
1115 | }\r |
1116 | \r |
1117 | \r |
1118 | void m68k_op_adda_16_a(void)\r |
1119 | {\r |
1120 | uint* r_dst = &AX;\r |
1121 | \r |
1122 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY));\r |
1123 | }\r |
1124 | \r |
1125 | \r |
1126 | void m68k_op_adda_16_ai(void)\r |
1127 | {\r |
1128 | uint* r_dst = &AX;\r |
1129 | \r |
1130 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_AI_16()));\r |
1131 | }\r |
1132 | \r |
1133 | \r |
1134 | void m68k_op_adda_16_pi(void)\r |
1135 | {\r |
1136 | uint* r_dst = &AX;\r |
1137 | \r |
1138 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_PI_16()));\r |
1139 | }\r |
1140 | \r |
1141 | \r |
1142 | void m68k_op_adda_16_pd(void)\r |
1143 | {\r |
1144 | uint* r_dst = &AX;\r |
1145 | \r |
1146 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_PD_16()));\r |
1147 | }\r |
1148 | \r |
1149 | \r |
1150 | void m68k_op_adda_16_di(void)\r |
1151 | {\r |
1152 | uint* r_dst = &AX;\r |
1153 | \r |
1154 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_DI_16()));\r |
1155 | }\r |
1156 | \r |
1157 | \r |
1158 | void m68k_op_adda_16_ix(void)\r |
1159 | {\r |
1160 | uint* r_dst = &AX;\r |
1161 | \r |
1162 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AY_IX_16()));\r |
1163 | }\r |
1164 | \r |
1165 | \r |
1166 | void m68k_op_adda_16_aw(void)\r |
1167 | {\r |
1168 | uint* r_dst = &AX;\r |
1169 | \r |
1170 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AW_16()));\r |
1171 | }\r |
1172 | \r |
1173 | \r |
1174 | void m68k_op_adda_16_al(void)\r |
1175 | {\r |
1176 | uint* r_dst = &AX;\r |
1177 | \r |
1178 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_AL_16()));\r |
1179 | }\r |
1180 | \r |
1181 | \r |
1182 | void m68k_op_adda_16_pcdi(void)\r |
1183 | {\r |
1184 | uint* r_dst = &AX;\r |
1185 | \r |
1186 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_PCDI_16()));\r |
1187 | }\r |
1188 | \r |
1189 | \r |
1190 | void m68k_op_adda_16_pcix(void)\r |
1191 | {\r |
1192 | uint* r_dst = &AX;\r |
1193 | \r |
1194 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_PCIX_16()));\r |
1195 | }\r |
1196 | \r |
1197 | \r |
1198 | void m68k_op_adda_16_i(void)\r |
1199 | {\r |
1200 | uint* r_dst = &AX;\r |
1201 | \r |
1202 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(OPER_I_16()));\r |
1203 | }\r |
1204 | \r |
1205 | \r |
1206 | void m68k_op_adda_32_d(void)\r |
1207 | {\r |
1208 | uint* r_dst = &AX;\r |
1209 | \r |
1210 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY);\r |
1211 | }\r |
1212 | \r |
1213 | \r |
1214 | void m68k_op_adda_32_a(void)\r |
1215 | {\r |
1216 | uint* r_dst = &AX;\r |
1217 | \r |
1218 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY);\r |
1219 | }\r |
1220 | \r |
1221 | \r |
1222 | void m68k_op_adda_32_ai(void)\r |
1223 | {\r |
1224 | uint* r_dst = &AX;\r |
1225 | \r |
1226 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_AI_32());\r |
1227 | }\r |
1228 | \r |
1229 | \r |
1230 | void m68k_op_adda_32_pi(void)\r |
1231 | {\r |
1232 | uint* r_dst = &AX;\r |
1233 | \r |
1234 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_PI_32());\r |
1235 | }\r |
1236 | \r |
1237 | \r |
1238 | void m68k_op_adda_32_pd(void)\r |
1239 | {\r |
1240 | uint* r_dst = &AX;\r |
1241 | \r |
1242 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_PD_32());\r |
1243 | }\r |
1244 | \r |
1245 | \r |
1246 | void m68k_op_adda_32_di(void)\r |
1247 | {\r |
1248 | uint* r_dst = &AX;\r |
1249 | \r |
1250 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_DI_32());\r |
1251 | }\r |
1252 | \r |
1253 | \r |
1254 | void m68k_op_adda_32_ix(void)\r |
1255 | {\r |
1256 | uint* r_dst = &AX;\r |
1257 | \r |
1258 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AY_IX_32());\r |
1259 | }\r |
1260 | \r |
1261 | \r |
1262 | void m68k_op_adda_32_aw(void)\r |
1263 | {\r |
1264 | uint* r_dst = &AX;\r |
1265 | \r |
1266 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AW_32());\r |
1267 | }\r |
1268 | \r |
1269 | \r |
1270 | void m68k_op_adda_32_al(void)\r |
1271 | {\r |
1272 | uint* r_dst = &AX;\r |
1273 | \r |
1274 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_AL_32());\r |
1275 | }\r |
1276 | \r |
1277 | \r |
1278 | void m68k_op_adda_32_pcdi(void)\r |
1279 | {\r |
1280 | uint* r_dst = &AX;\r |
1281 | \r |
1282 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_PCDI_32());\r |
1283 | }\r |
1284 | \r |
1285 | \r |
1286 | void m68k_op_adda_32_pcix(void)\r |
1287 | {\r |
1288 | uint* r_dst = &AX;\r |
1289 | \r |
1290 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_PCIX_32());\r |
1291 | }\r |
1292 | \r |
1293 | \r |
1294 | void m68k_op_adda_32_i(void)\r |
1295 | {\r |
1296 | uint* r_dst = &AX;\r |
1297 | \r |
1298 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + OPER_I_32());\r |
1299 | }\r |
1300 | \r |
1301 | \r |
1302 | void m68k_op_addi_8_d(void)\r |
1303 | {\r |
1304 | uint* r_dst = &DY;\r |
1305 | uint src = OPER_I_8();\r |
1306 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
1307 | uint res = src + dst;\r |
1308 | \r |
1309 | FLAG_N = NFLAG_8(res);\r |
1310 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1311 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1312 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1313 | \r |
1314 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
1315 | }\r |
1316 | \r |
1317 | \r |
1318 | void m68k_op_addi_8_ai(void)\r |
1319 | {\r |
1320 | uint src = OPER_I_8();\r |
1321 | uint ea = EA_AY_AI_8();\r |
1322 | uint dst = m68ki_read_8(ea);\r |
1323 | uint res = src + dst;\r |
1324 | \r |
1325 | FLAG_N = NFLAG_8(res);\r |
1326 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1327 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1328 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1329 | \r |
1330 | m68ki_write_8(ea, FLAG_Z);\r |
1331 | }\r |
1332 | \r |
1333 | \r |
1334 | void m68k_op_addi_8_pi(void)\r |
1335 | {\r |
1336 | uint src = OPER_I_8();\r |
1337 | uint ea = EA_AY_PI_8();\r |
1338 | uint dst = m68ki_read_8(ea);\r |
1339 | uint res = src + dst;\r |
1340 | \r |
1341 | FLAG_N = NFLAG_8(res);\r |
1342 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1343 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1344 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1345 | \r |
1346 | m68ki_write_8(ea, FLAG_Z);\r |
1347 | }\r |
1348 | \r |
1349 | \r |
1350 | void m68k_op_addi_8_pi7(void)\r |
1351 | {\r |
1352 | uint src = OPER_I_8();\r |
1353 | uint ea = EA_A7_PI_8();\r |
1354 | uint dst = m68ki_read_8(ea);\r |
1355 | uint res = src + dst;\r |
1356 | \r |
1357 | FLAG_N = NFLAG_8(res);\r |
1358 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1359 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1360 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1361 | \r |
1362 | m68ki_write_8(ea, FLAG_Z);\r |
1363 | }\r |
1364 | \r |
1365 | \r |
1366 | void m68k_op_addi_8_pd(void)\r |
1367 | {\r |
1368 | uint src = OPER_I_8();\r |
1369 | uint ea = EA_AY_PD_8();\r |
1370 | uint dst = m68ki_read_8(ea);\r |
1371 | uint res = src + dst;\r |
1372 | \r |
1373 | FLAG_N = NFLAG_8(res);\r |
1374 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1375 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1376 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1377 | \r |
1378 | m68ki_write_8(ea, FLAG_Z);\r |
1379 | }\r |
1380 | \r |
1381 | \r |
1382 | void m68k_op_addi_8_pd7(void)\r |
1383 | {\r |
1384 | uint src = OPER_I_8();\r |
1385 | uint ea = EA_A7_PD_8();\r |
1386 | uint dst = m68ki_read_8(ea);\r |
1387 | uint res = src + dst;\r |
1388 | \r |
1389 | FLAG_N = NFLAG_8(res);\r |
1390 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1391 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1392 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1393 | \r |
1394 | m68ki_write_8(ea, FLAG_Z);\r |
1395 | }\r |
1396 | \r |
1397 | \r |
1398 | void m68k_op_addi_8_di(void)\r |
1399 | {\r |
1400 | uint src = OPER_I_8();\r |
1401 | uint ea = EA_AY_DI_8();\r |
1402 | uint dst = m68ki_read_8(ea);\r |
1403 | uint res = src + dst;\r |
1404 | \r |
1405 | FLAG_N = NFLAG_8(res);\r |
1406 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1407 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1408 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1409 | \r |
1410 | m68ki_write_8(ea, FLAG_Z);\r |
1411 | }\r |
1412 | \r |
1413 | \r |
1414 | void m68k_op_addi_8_ix(void)\r |
1415 | {\r |
1416 | uint src = OPER_I_8();\r |
1417 | uint ea = EA_AY_IX_8();\r |
1418 | uint dst = m68ki_read_8(ea);\r |
1419 | uint res = src + dst;\r |
1420 | \r |
1421 | FLAG_N = NFLAG_8(res);\r |
1422 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1423 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1424 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1425 | \r |
1426 | m68ki_write_8(ea, FLAG_Z);\r |
1427 | }\r |
1428 | \r |
1429 | \r |
1430 | void m68k_op_addi_8_aw(void)\r |
1431 | {\r |
1432 | uint src = OPER_I_8();\r |
1433 | uint ea = EA_AW_8();\r |
1434 | uint dst = m68ki_read_8(ea);\r |
1435 | uint res = src + dst;\r |
1436 | \r |
1437 | FLAG_N = NFLAG_8(res);\r |
1438 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1439 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1440 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1441 | \r |
1442 | m68ki_write_8(ea, FLAG_Z);\r |
1443 | }\r |
1444 | \r |
1445 | \r |
1446 | void m68k_op_addi_8_al(void)\r |
1447 | {\r |
1448 | uint src = OPER_I_8();\r |
1449 | uint ea = EA_AL_8();\r |
1450 | uint dst = m68ki_read_8(ea);\r |
1451 | uint res = src + dst;\r |
1452 | \r |
1453 | FLAG_N = NFLAG_8(res);\r |
1454 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1455 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1456 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1457 | \r |
1458 | m68ki_write_8(ea, FLAG_Z);\r |
1459 | }\r |
1460 | \r |
1461 | \r |
1462 | void m68k_op_addi_16_d(void)\r |
1463 | {\r |
1464 | uint* r_dst = &DY;\r |
1465 | uint src = OPER_I_16();\r |
1466 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
1467 | uint res = src + dst;\r |
1468 | \r |
1469 | FLAG_N = NFLAG_16(res);\r |
1470 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1471 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1472 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1473 | \r |
1474 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
1475 | }\r |
1476 | \r |
1477 | \r |
1478 | void m68k_op_addi_16_ai(void)\r |
1479 | {\r |
1480 | uint src = OPER_I_16();\r |
1481 | uint ea = EA_AY_AI_16();\r |
1482 | uint dst = m68ki_read_16(ea);\r |
1483 | uint res = src + dst;\r |
1484 | \r |
1485 | FLAG_N = NFLAG_16(res);\r |
1486 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1487 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1488 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1489 | \r |
1490 | m68ki_write_16(ea, FLAG_Z);\r |
1491 | }\r |
1492 | \r |
1493 | \r |
1494 | void m68k_op_addi_16_pi(void)\r |
1495 | {\r |
1496 | uint src = OPER_I_16();\r |
1497 | uint ea = EA_AY_PI_16();\r |
1498 | uint dst = m68ki_read_16(ea);\r |
1499 | uint res = src + dst;\r |
1500 | \r |
1501 | FLAG_N = NFLAG_16(res);\r |
1502 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1503 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1504 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1505 | \r |
1506 | m68ki_write_16(ea, FLAG_Z);\r |
1507 | }\r |
1508 | \r |
1509 | \r |
1510 | void m68k_op_addi_16_pd(void)\r |
1511 | {\r |
1512 | uint src = OPER_I_16();\r |
1513 | uint ea = EA_AY_PD_16();\r |
1514 | uint dst = m68ki_read_16(ea);\r |
1515 | uint res = src + dst;\r |
1516 | \r |
1517 | FLAG_N = NFLAG_16(res);\r |
1518 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1519 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1520 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1521 | \r |
1522 | m68ki_write_16(ea, FLAG_Z);\r |
1523 | }\r |
1524 | \r |
1525 | \r |
1526 | void m68k_op_addi_16_di(void)\r |
1527 | {\r |
1528 | uint src = OPER_I_16();\r |
1529 | uint ea = EA_AY_DI_16();\r |
1530 | uint dst = m68ki_read_16(ea);\r |
1531 | uint res = src + dst;\r |
1532 | \r |
1533 | FLAG_N = NFLAG_16(res);\r |
1534 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1535 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1536 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1537 | \r |
1538 | m68ki_write_16(ea, FLAG_Z);\r |
1539 | }\r |
1540 | \r |
1541 | \r |
1542 | void m68k_op_addi_16_ix(void)\r |
1543 | {\r |
1544 | uint src = OPER_I_16();\r |
1545 | uint ea = EA_AY_IX_16();\r |
1546 | uint dst = m68ki_read_16(ea);\r |
1547 | uint res = src + dst;\r |
1548 | \r |
1549 | FLAG_N = NFLAG_16(res);\r |
1550 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1551 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1552 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1553 | \r |
1554 | m68ki_write_16(ea, FLAG_Z);\r |
1555 | }\r |
1556 | \r |
1557 | \r |
1558 | void m68k_op_addi_16_aw(void)\r |
1559 | {\r |
1560 | uint src = OPER_I_16();\r |
1561 | uint ea = EA_AW_16();\r |
1562 | uint dst = m68ki_read_16(ea);\r |
1563 | uint res = src + dst;\r |
1564 | \r |
1565 | FLAG_N = NFLAG_16(res);\r |
1566 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1567 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1568 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1569 | \r |
1570 | m68ki_write_16(ea, FLAG_Z);\r |
1571 | }\r |
1572 | \r |
1573 | \r |
1574 | void m68k_op_addi_16_al(void)\r |
1575 | {\r |
1576 | uint src = OPER_I_16();\r |
1577 | uint ea = EA_AL_16();\r |
1578 | uint dst = m68ki_read_16(ea);\r |
1579 | uint res = src + dst;\r |
1580 | \r |
1581 | FLAG_N = NFLAG_16(res);\r |
1582 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1583 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1584 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1585 | \r |
1586 | m68ki_write_16(ea, FLAG_Z);\r |
1587 | }\r |
1588 | \r |
1589 | \r |
1590 | void m68k_op_addi_32_d(void)\r |
1591 | {\r |
1592 | uint* r_dst = &DY;\r |
1593 | uint src = OPER_I_32();\r |
1594 | uint dst = *r_dst;\r |
1595 | uint res = src + dst;\r |
1596 | \r |
1597 | FLAG_N = NFLAG_32(res);\r |
1598 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1599 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1600 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1601 | \r |
1602 | *r_dst = FLAG_Z;\r |
1603 | }\r |
1604 | \r |
1605 | \r |
1606 | void m68k_op_addi_32_ai(void)\r |
1607 | {\r |
1608 | uint src = OPER_I_32();\r |
1609 | uint ea = EA_AY_AI_32();\r |
1610 | uint dst = m68ki_read_32(ea);\r |
1611 | uint res = src + dst;\r |
1612 | \r |
1613 | FLAG_N = NFLAG_32(res);\r |
1614 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1615 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1616 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1617 | \r |
1618 | m68ki_write_32(ea, FLAG_Z);\r |
1619 | }\r |
1620 | \r |
1621 | \r |
1622 | void m68k_op_addi_32_pi(void)\r |
1623 | {\r |
1624 | uint src = OPER_I_32();\r |
1625 | uint ea = EA_AY_PI_32();\r |
1626 | uint dst = m68ki_read_32(ea);\r |
1627 | uint res = src + dst;\r |
1628 | \r |
1629 | FLAG_N = NFLAG_32(res);\r |
1630 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1631 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1632 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1633 | \r |
1634 | m68ki_write_32(ea, FLAG_Z);\r |
1635 | }\r |
1636 | \r |
1637 | \r |
1638 | void m68k_op_addi_32_pd(void)\r |
1639 | {\r |
1640 | uint src = OPER_I_32();\r |
1641 | uint ea = EA_AY_PD_32();\r |
1642 | uint dst = m68ki_read_32(ea);\r |
1643 | uint res = src + dst;\r |
1644 | \r |
1645 | FLAG_N = NFLAG_32(res);\r |
1646 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1647 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1648 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1649 | \r |
1650 | m68ki_write_32(ea, FLAG_Z);\r |
1651 | }\r |
1652 | \r |
1653 | \r |
1654 | void m68k_op_addi_32_di(void)\r |
1655 | {\r |
1656 | uint src = OPER_I_32();\r |
1657 | uint ea = EA_AY_DI_32();\r |
1658 | uint dst = m68ki_read_32(ea);\r |
1659 | uint res = src + dst;\r |
1660 | \r |
1661 | FLAG_N = NFLAG_32(res);\r |
1662 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1663 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1664 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1665 | \r |
1666 | m68ki_write_32(ea, FLAG_Z);\r |
1667 | }\r |
1668 | \r |
1669 | \r |
1670 | void m68k_op_addi_32_ix(void)\r |
1671 | {\r |
1672 | uint src = OPER_I_32();\r |
1673 | uint ea = EA_AY_IX_32();\r |
1674 | uint dst = m68ki_read_32(ea);\r |
1675 | uint res = src + dst;\r |
1676 | \r |
1677 | FLAG_N = NFLAG_32(res);\r |
1678 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1679 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1680 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1681 | \r |
1682 | m68ki_write_32(ea, FLAG_Z);\r |
1683 | }\r |
1684 | \r |
1685 | \r |
1686 | void m68k_op_addi_32_aw(void)\r |
1687 | {\r |
1688 | uint src = OPER_I_32();\r |
1689 | uint ea = EA_AW_32();\r |
1690 | uint dst = m68ki_read_32(ea);\r |
1691 | uint res = src + dst;\r |
1692 | \r |
1693 | FLAG_N = NFLAG_32(res);\r |
1694 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1695 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1696 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1697 | \r |
1698 | m68ki_write_32(ea, FLAG_Z);\r |
1699 | }\r |
1700 | \r |
1701 | \r |
1702 | void m68k_op_addi_32_al(void)\r |
1703 | {\r |
1704 | uint src = OPER_I_32();\r |
1705 | uint ea = EA_AL_32();\r |
1706 | uint dst = m68ki_read_32(ea);\r |
1707 | uint res = src + dst;\r |
1708 | \r |
1709 | FLAG_N = NFLAG_32(res);\r |
1710 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
1711 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
1712 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
1713 | \r |
1714 | m68ki_write_32(ea, FLAG_Z);\r |
1715 | }\r |
1716 | \r |
1717 | \r |
1718 | void m68k_op_addq_8_d(void)\r |
1719 | {\r |
1720 | uint* r_dst = &DY;\r |
1721 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1722 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
1723 | uint res = src + dst;\r |
1724 | \r |
1725 | FLAG_N = NFLAG_8(res);\r |
1726 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1727 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1728 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1729 | \r |
1730 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
1731 | }\r |
1732 | \r |
1733 | \r |
1734 | void m68k_op_addq_8_ai(void)\r |
1735 | {\r |
1736 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1737 | uint ea = EA_AY_AI_8();\r |
1738 | uint dst = m68ki_read_8(ea);\r |
1739 | uint res = src + dst;\r |
1740 | \r |
1741 | FLAG_N = NFLAG_8(res);\r |
1742 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1743 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1744 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1745 | \r |
1746 | m68ki_write_8(ea, FLAG_Z);\r |
1747 | }\r |
1748 | \r |
1749 | \r |
1750 | void m68k_op_addq_8_pi(void)\r |
1751 | {\r |
1752 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1753 | uint ea = EA_AY_PI_8();\r |
1754 | uint dst = m68ki_read_8(ea);\r |
1755 | uint res = src + dst;\r |
1756 | \r |
1757 | FLAG_N = NFLAG_8(res);\r |
1758 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1759 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1760 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1761 | \r |
1762 | m68ki_write_8(ea, FLAG_Z);\r |
1763 | }\r |
1764 | \r |
1765 | \r |
1766 | void m68k_op_addq_8_pi7(void)\r |
1767 | {\r |
1768 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1769 | uint ea = EA_A7_PI_8();\r |
1770 | uint dst = m68ki_read_8(ea);\r |
1771 | uint res = src + dst;\r |
1772 | \r |
1773 | FLAG_N = NFLAG_8(res);\r |
1774 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1775 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1776 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1777 | \r |
1778 | m68ki_write_8(ea, FLAG_Z);\r |
1779 | }\r |
1780 | \r |
1781 | \r |
1782 | void m68k_op_addq_8_pd(void)\r |
1783 | {\r |
1784 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1785 | uint ea = EA_AY_PD_8();\r |
1786 | uint dst = m68ki_read_8(ea);\r |
1787 | uint res = src + dst;\r |
1788 | \r |
1789 | FLAG_N = NFLAG_8(res);\r |
1790 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1791 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1792 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1793 | \r |
1794 | m68ki_write_8(ea, FLAG_Z);\r |
1795 | }\r |
1796 | \r |
1797 | \r |
1798 | void m68k_op_addq_8_pd7(void)\r |
1799 | {\r |
1800 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1801 | uint ea = EA_A7_PD_8();\r |
1802 | uint dst = m68ki_read_8(ea);\r |
1803 | uint res = src + dst;\r |
1804 | \r |
1805 | FLAG_N = NFLAG_8(res);\r |
1806 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1807 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1808 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1809 | \r |
1810 | m68ki_write_8(ea, FLAG_Z);\r |
1811 | }\r |
1812 | \r |
1813 | \r |
1814 | void m68k_op_addq_8_di(void)\r |
1815 | {\r |
1816 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1817 | uint ea = EA_AY_DI_8();\r |
1818 | uint dst = m68ki_read_8(ea);\r |
1819 | uint res = src + dst;\r |
1820 | \r |
1821 | FLAG_N = NFLAG_8(res);\r |
1822 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1823 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1824 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1825 | \r |
1826 | m68ki_write_8(ea, FLAG_Z);\r |
1827 | }\r |
1828 | \r |
1829 | \r |
1830 | void m68k_op_addq_8_ix(void)\r |
1831 | {\r |
1832 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1833 | uint ea = EA_AY_IX_8();\r |
1834 | uint dst = m68ki_read_8(ea);\r |
1835 | uint res = src + dst;\r |
1836 | \r |
1837 | FLAG_N = NFLAG_8(res);\r |
1838 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1839 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1840 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1841 | \r |
1842 | m68ki_write_8(ea, FLAG_Z);\r |
1843 | }\r |
1844 | \r |
1845 | \r |
1846 | void m68k_op_addq_8_aw(void)\r |
1847 | {\r |
1848 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1849 | uint ea = EA_AW_8();\r |
1850 | uint dst = m68ki_read_8(ea);\r |
1851 | uint res = src + dst;\r |
1852 | \r |
1853 | FLAG_N = NFLAG_8(res);\r |
1854 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1855 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1856 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1857 | \r |
1858 | m68ki_write_8(ea, FLAG_Z);\r |
1859 | }\r |
1860 | \r |
1861 | \r |
1862 | void m68k_op_addq_8_al(void)\r |
1863 | {\r |
1864 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1865 | uint ea = EA_AL_8();\r |
1866 | uint dst = m68ki_read_8(ea);\r |
1867 | uint res = src + dst;\r |
1868 | \r |
1869 | FLAG_N = NFLAG_8(res);\r |
1870 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
1871 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
1872 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
1873 | \r |
1874 | m68ki_write_8(ea, FLAG_Z);\r |
1875 | }\r |
1876 | \r |
1877 | \r |
1878 | void m68k_op_addq_16_d(void)\r |
1879 | {\r |
1880 | uint* r_dst = &DY;\r |
1881 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1882 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
1883 | uint res = src + dst;\r |
1884 | \r |
1885 | FLAG_N = NFLAG_16(res);\r |
1886 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1887 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1888 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1889 | \r |
1890 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
1891 | }\r |
1892 | \r |
1893 | \r |
1894 | void m68k_op_addq_16_a(void)\r |
1895 | {\r |
1896 | uint* r_dst = &AY;\r |
1897 | \r |
1898 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);\r |
1899 | }\r |
1900 | \r |
1901 | \r |
1902 | void m68k_op_addq_16_ai(void)\r |
1903 | {\r |
1904 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1905 | uint ea = EA_AY_AI_16();\r |
1906 | uint dst = m68ki_read_16(ea);\r |
1907 | uint res = src + dst;\r |
1908 | \r |
1909 | FLAG_N = NFLAG_16(res);\r |
1910 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1911 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1912 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1913 | \r |
1914 | m68ki_write_16(ea, FLAG_Z);\r |
1915 | }\r |
1916 | \r |
1917 | \r |
1918 | void m68k_op_addq_16_pi(void)\r |
1919 | {\r |
1920 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1921 | uint ea = EA_AY_PI_16();\r |
1922 | uint dst = m68ki_read_16(ea);\r |
1923 | uint res = src + dst;\r |
1924 | \r |
1925 | FLAG_N = NFLAG_16(res);\r |
1926 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1927 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1928 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1929 | \r |
1930 | m68ki_write_16(ea, FLAG_Z);\r |
1931 | }\r |
1932 | \r |
1933 | \r |
1934 | void m68k_op_addq_16_pd(void)\r |
1935 | {\r |
1936 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1937 | uint ea = EA_AY_PD_16();\r |
1938 | uint dst = m68ki_read_16(ea);\r |
1939 | uint res = src + dst;\r |
1940 | \r |
1941 | FLAG_N = NFLAG_16(res);\r |
1942 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1943 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1944 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1945 | \r |
1946 | m68ki_write_16(ea, FLAG_Z);\r |
1947 | }\r |
1948 | \r |
1949 | \r |
1950 | void m68k_op_addq_16_di(void)\r |
1951 | {\r |
1952 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1953 | uint ea = EA_AY_DI_16();\r |
1954 | uint dst = m68ki_read_16(ea);\r |
1955 | uint res = src + dst;\r |
1956 | \r |
1957 | FLAG_N = NFLAG_16(res);\r |
1958 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1959 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1960 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1961 | \r |
1962 | m68ki_write_16(ea, FLAG_Z);\r |
1963 | }\r |
1964 | \r |
1965 | \r |
1966 | void m68k_op_addq_16_ix(void)\r |
1967 | {\r |
1968 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1969 | uint ea = EA_AY_IX_16();\r |
1970 | uint dst = m68ki_read_16(ea);\r |
1971 | uint res = src + dst;\r |
1972 | \r |
1973 | FLAG_N = NFLAG_16(res);\r |
1974 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1975 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1976 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1977 | \r |
1978 | m68ki_write_16(ea, FLAG_Z);\r |
1979 | }\r |
1980 | \r |
1981 | \r |
1982 | void m68k_op_addq_16_aw(void)\r |
1983 | {\r |
1984 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
1985 | uint ea = EA_AW_16();\r |
1986 | uint dst = m68ki_read_16(ea);\r |
1987 | uint res = src + dst;\r |
1988 | \r |
1989 | FLAG_N = NFLAG_16(res);\r |
1990 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
1991 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1992 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
1993 | \r |
1994 | m68ki_write_16(ea, FLAG_Z);\r |
1995 | }\r |
1996 | \r |
1997 | \r |
1998 | void m68k_op_addq_16_al(void)\r |
1999 | {\r |
2000 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2001 | uint ea = EA_AL_16();\r |
2002 | uint dst = m68ki_read_16(ea);\r |
2003 | uint res = src + dst;\r |
2004 | \r |
2005 | FLAG_N = NFLAG_16(res);\r |
2006 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
2007 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
2008 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
2009 | \r |
2010 | m68ki_write_16(ea, FLAG_Z);\r |
2011 | }\r |
2012 | \r |
2013 | \r |
2014 | void m68k_op_addq_32_d(void)\r |
2015 | {\r |
2016 | uint* r_dst = &DY;\r |
2017 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2018 | uint dst = *r_dst;\r |
2019 | uint res = src + dst;\r |
2020 | \r |
2021 | FLAG_N = NFLAG_32(res);\r |
2022 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2023 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2024 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
2025 | \r |
2026 | *r_dst = FLAG_Z;\r |
2027 | }\r |
2028 | \r |
2029 | \r |
2030 | void m68k_op_addq_32_a(void)\r |
2031 | {\r |
2032 | uint* r_dst = &AY;\r |
2033 | \r |
2034 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);\r |
2035 | }\r |
2036 | \r |
2037 | \r |
2038 | void m68k_op_addq_32_ai(void)\r |
2039 | {\r |
2040 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2041 | uint ea = EA_AY_AI_32();\r |
2042 | uint dst = m68ki_read_32(ea);\r |
2043 | uint res = src + dst;\r |
2044 | \r |
2045 | \r |
2046 | FLAG_N = NFLAG_32(res);\r |
2047 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2048 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2049 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
2050 | \r |
2051 | m68ki_write_32(ea, FLAG_Z);\r |
2052 | }\r |
2053 | \r |
2054 | \r |
2055 | void m68k_op_addq_32_pi(void)\r |
2056 | {\r |
2057 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2058 | uint ea = EA_AY_PI_32();\r |
2059 | uint dst = m68ki_read_32(ea);\r |
2060 | uint res = src + dst;\r |
2061 | \r |
2062 | \r |
2063 | FLAG_N = NFLAG_32(res);\r |
2064 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2065 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2066 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
2067 | \r |
2068 | m68ki_write_32(ea, FLAG_Z);\r |
2069 | }\r |
2070 | \r |
2071 | \r |
2072 | void m68k_op_addq_32_pd(void)\r |
2073 | {\r |
2074 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2075 | uint ea = EA_AY_PD_32();\r |
2076 | uint dst = m68ki_read_32(ea);\r |
2077 | uint res = src + dst;\r |
2078 | \r |
2079 | \r |
2080 | FLAG_N = NFLAG_32(res);\r |
2081 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2082 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2083 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
2084 | \r |
2085 | m68ki_write_32(ea, FLAG_Z);\r |
2086 | }\r |
2087 | \r |
2088 | \r |
2089 | void m68k_op_addq_32_di(void)\r |
2090 | {\r |
2091 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2092 | uint ea = EA_AY_DI_32();\r |
2093 | uint dst = m68ki_read_32(ea);\r |
2094 | uint res = src + dst;\r |
2095 | \r |
2096 | \r |
2097 | FLAG_N = NFLAG_32(res);\r |
2098 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2099 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2100 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
2101 | \r |
2102 | m68ki_write_32(ea, FLAG_Z);\r |
2103 | }\r |
2104 | \r |
2105 | \r |
2106 | void m68k_op_addq_32_ix(void)\r |
2107 | {\r |
2108 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2109 | uint ea = EA_AY_IX_32();\r |
2110 | uint dst = m68ki_read_32(ea);\r |
2111 | uint res = src + dst;\r |
2112 | \r |
2113 | \r |
2114 | FLAG_N = NFLAG_32(res);\r |
2115 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2116 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2117 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
2118 | \r |
2119 | m68ki_write_32(ea, FLAG_Z);\r |
2120 | }\r |
2121 | \r |
2122 | \r |
2123 | void m68k_op_addq_32_aw(void)\r |
2124 | {\r |
2125 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2126 | uint ea = EA_AW_32();\r |
2127 | uint dst = m68ki_read_32(ea);\r |
2128 | uint res = src + dst;\r |
2129 | \r |
2130 | \r |
2131 | FLAG_N = NFLAG_32(res);\r |
2132 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2133 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2134 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
2135 | \r |
2136 | m68ki_write_32(ea, FLAG_Z);\r |
2137 | }\r |
2138 | \r |
2139 | \r |
2140 | void m68k_op_addq_32_al(void)\r |
2141 | {\r |
2142 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2143 | uint ea = EA_AL_32();\r |
2144 | uint dst = m68ki_read_32(ea);\r |
2145 | uint res = src + dst;\r |
2146 | \r |
2147 | \r |
2148 | FLAG_N = NFLAG_32(res);\r |
2149 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2150 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2151 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
2152 | \r |
2153 | m68ki_write_32(ea, FLAG_Z);\r |
2154 | }\r |
2155 | \r |
2156 | \r |
2157 | void m68k_op_addx_8_rr(void)\r |
2158 | {\r |
2159 | uint* r_dst = &DX;\r |
2160 | uint src = MASK_OUT_ABOVE_8(DY);\r |
2161 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
2162 | uint res = src + dst + XFLAG_AS_1();\r |
2163 | \r |
2164 | FLAG_N = NFLAG_8(res);\r |
2165 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
2166 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
2167 | \r |
2168 | res = MASK_OUT_ABOVE_8(res);\r |
2169 | FLAG_Z |= res;\r |
2170 | \r |
2171 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
2172 | }\r |
2173 | \r |
2174 | \r |
2175 | void m68k_op_addx_16_rr(void)\r |
2176 | {\r |
2177 | uint* r_dst = &DX;\r |
2178 | uint src = MASK_OUT_ABOVE_16(DY);\r |
2179 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
2180 | uint res = src + dst + XFLAG_AS_1();\r |
2181 | \r |
2182 | FLAG_N = NFLAG_16(res);\r |
2183 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
2184 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
2185 | \r |
2186 | res = MASK_OUT_ABOVE_16(res);\r |
2187 | FLAG_Z |= res;\r |
2188 | \r |
2189 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
2190 | }\r |
2191 | \r |
2192 | \r |
2193 | void m68k_op_addx_32_rr(void)\r |
2194 | {\r |
2195 | uint* r_dst = &DX;\r |
2196 | uint src = DY;\r |
2197 | uint dst = *r_dst;\r |
2198 | uint res = src + dst + XFLAG_AS_1();\r |
2199 | \r |
2200 | FLAG_N = NFLAG_32(res);\r |
2201 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2202 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2203 | \r |
2204 | res = MASK_OUT_ABOVE_32(res);\r |
2205 | FLAG_Z |= res;\r |
2206 | \r |
2207 | *r_dst = res;\r |
2208 | }\r |
2209 | \r |
2210 | \r |
2211 | void m68k_op_addx_8_mm_ax7(void)\r |
2212 | {\r |
2213 | uint src = OPER_AY_PD_8();\r |
2214 | uint ea = EA_A7_PD_8();\r |
2215 | uint dst = m68ki_read_8(ea);\r |
2216 | uint res = src + dst + XFLAG_AS_1();\r |
2217 | \r |
2218 | FLAG_N = NFLAG_8(res);\r |
2219 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
2220 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
2221 | \r |
2222 | res = MASK_OUT_ABOVE_8(res);\r |
2223 | FLAG_Z |= res;\r |
2224 | \r |
2225 | m68ki_write_8(ea, res);\r |
2226 | }\r |
2227 | \r |
2228 | \r |
2229 | void m68k_op_addx_8_mm_ay7(void)\r |
2230 | {\r |
2231 | uint src = OPER_A7_PD_8();\r |
2232 | uint ea = EA_AX_PD_8();\r |
2233 | uint dst = m68ki_read_8(ea);\r |
2234 | uint res = src + dst + XFLAG_AS_1();\r |
2235 | \r |
2236 | FLAG_N = NFLAG_8(res);\r |
2237 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
2238 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
2239 | \r |
2240 | res = MASK_OUT_ABOVE_8(res);\r |
2241 | FLAG_Z |= res;\r |
2242 | \r |
2243 | m68ki_write_8(ea, res);\r |
2244 | }\r |
2245 | \r |
2246 | \r |
2247 | void m68k_op_addx_8_mm_axy7(void)\r |
2248 | {\r |
2249 | uint src = OPER_A7_PD_8();\r |
2250 | uint ea = EA_A7_PD_8();\r |
2251 | uint dst = m68ki_read_8(ea);\r |
2252 | uint res = src + dst + XFLAG_AS_1();\r |
2253 | \r |
2254 | FLAG_N = NFLAG_8(res);\r |
2255 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
2256 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
2257 | \r |
2258 | res = MASK_OUT_ABOVE_8(res);\r |
2259 | FLAG_Z |= res;\r |
2260 | \r |
2261 | m68ki_write_8(ea, res);\r |
2262 | }\r |
2263 | \r |
2264 | \r |
2265 | void m68k_op_addx_8_mm(void)\r |
2266 | {\r |
2267 | uint src = OPER_AY_PD_8();\r |
2268 | uint ea = EA_AX_PD_8();\r |
2269 | uint dst = m68ki_read_8(ea);\r |
2270 | uint res = src + dst + XFLAG_AS_1();\r |
2271 | \r |
2272 | FLAG_N = NFLAG_8(res);\r |
2273 | FLAG_V = VFLAG_ADD_8(src, dst, res);\r |
2274 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
2275 | \r |
2276 | res = MASK_OUT_ABOVE_8(res);\r |
2277 | FLAG_Z |= res;\r |
2278 | \r |
2279 | m68ki_write_8(ea, res);\r |
2280 | }\r |
2281 | \r |
2282 | \r |
2283 | void m68k_op_addx_16_mm(void)\r |
2284 | {\r |
2285 | uint src = OPER_AY_PD_16();\r |
2286 | uint ea = EA_AX_PD_16();\r |
2287 | uint dst = m68ki_read_16(ea);\r |
2288 | uint res = src + dst + XFLAG_AS_1();\r |
2289 | \r |
2290 | FLAG_N = NFLAG_16(res);\r |
2291 | FLAG_V = VFLAG_ADD_16(src, dst, res);\r |
2292 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
2293 | \r |
2294 | res = MASK_OUT_ABOVE_16(res);\r |
2295 | FLAG_Z |= res;\r |
2296 | \r |
2297 | m68ki_write_16(ea, res);\r |
2298 | }\r |
2299 | \r |
2300 | \r |
2301 | void m68k_op_addx_32_mm(void)\r |
2302 | {\r |
2303 | uint src = OPER_AY_PD_32();\r |
2304 | uint ea = EA_AX_PD_32();\r |
2305 | uint dst = m68ki_read_32(ea);\r |
2306 | uint res = src + dst + XFLAG_AS_1();\r |
2307 | \r |
2308 | FLAG_N = NFLAG_32(res);\r |
2309 | FLAG_V = VFLAG_ADD_32(src, dst, res);\r |
2310 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);\r |
2311 | \r |
2312 | res = MASK_OUT_ABOVE_32(res);\r |
2313 | FLAG_Z |= res;\r |
2314 | \r |
2315 | m68ki_write_32(ea, res);\r |
2316 | }\r |
2317 | \r |
2318 | \r |
2319 | void m68k_op_and_8_er_d(void)\r |
2320 | {\r |
2321 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (DY | 0xffffff00));\r |
2322 | \r |
2323 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2324 | FLAG_C = CFLAG_CLEAR;\r |
2325 | FLAG_V = VFLAG_CLEAR;\r |
2326 | }\r |
2327 | \r |
2328 | \r |
2329 | void m68k_op_and_8_er_ai(void)\r |
2330 | {\r |
2331 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_AI_8() | 0xffffff00));\r |
2332 | \r |
2333 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2334 | FLAG_C = CFLAG_CLEAR;\r |
2335 | FLAG_V = VFLAG_CLEAR;\r |
2336 | }\r |
2337 | \r |
2338 | \r |
2339 | void m68k_op_and_8_er_pi(void)\r |
2340 | {\r |
2341 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_PI_8() | 0xffffff00));\r |
2342 | \r |
2343 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2344 | FLAG_C = CFLAG_CLEAR;\r |
2345 | FLAG_V = VFLAG_CLEAR;\r |
2346 | }\r |
2347 | \r |
2348 | \r |
2349 | void m68k_op_and_8_er_pi7(void)\r |
2350 | {\r |
2351 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_A7_PI_8() | 0xffffff00));\r |
2352 | \r |
2353 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2354 | FLAG_C = CFLAG_CLEAR;\r |
2355 | FLAG_V = VFLAG_CLEAR;\r |
2356 | }\r |
2357 | \r |
2358 | \r |
2359 | void m68k_op_and_8_er_pd(void)\r |
2360 | {\r |
2361 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_PD_8() | 0xffffff00));\r |
2362 | \r |
2363 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2364 | FLAG_C = CFLAG_CLEAR;\r |
2365 | FLAG_V = VFLAG_CLEAR;\r |
2366 | }\r |
2367 | \r |
2368 | \r |
2369 | void m68k_op_and_8_er_pd7(void)\r |
2370 | {\r |
2371 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_A7_PD_8() | 0xffffff00));\r |
2372 | \r |
2373 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2374 | FLAG_C = CFLAG_CLEAR;\r |
2375 | FLAG_V = VFLAG_CLEAR;\r |
2376 | }\r |
2377 | \r |
2378 | \r |
2379 | void m68k_op_and_8_er_di(void)\r |
2380 | {\r |
2381 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_DI_8() | 0xffffff00));\r |
2382 | \r |
2383 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2384 | FLAG_C = CFLAG_CLEAR;\r |
2385 | FLAG_V = VFLAG_CLEAR;\r |
2386 | }\r |
2387 | \r |
2388 | \r |
2389 | void m68k_op_and_8_er_ix(void)\r |
2390 | {\r |
2391 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_IX_8() | 0xffffff00));\r |
2392 | \r |
2393 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2394 | FLAG_C = CFLAG_CLEAR;\r |
2395 | FLAG_V = VFLAG_CLEAR;\r |
2396 | }\r |
2397 | \r |
2398 | \r |
2399 | void m68k_op_and_8_er_aw(void)\r |
2400 | {\r |
2401 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AW_8() | 0xffffff00));\r |
2402 | \r |
2403 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2404 | FLAG_C = CFLAG_CLEAR;\r |
2405 | FLAG_V = VFLAG_CLEAR;\r |
2406 | }\r |
2407 | \r |
2408 | \r |
2409 | void m68k_op_and_8_er_al(void)\r |
2410 | {\r |
2411 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AL_8() | 0xffffff00));\r |
2412 | \r |
2413 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2414 | FLAG_C = CFLAG_CLEAR;\r |
2415 | FLAG_V = VFLAG_CLEAR;\r |
2416 | }\r |
2417 | \r |
2418 | \r |
2419 | void m68k_op_and_8_er_pcdi(void)\r |
2420 | {\r |
2421 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_PCDI_8() | 0xffffff00));\r |
2422 | \r |
2423 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2424 | FLAG_C = CFLAG_CLEAR;\r |
2425 | FLAG_V = VFLAG_CLEAR;\r |
2426 | }\r |
2427 | \r |
2428 | \r |
2429 | void m68k_op_and_8_er_pcix(void)\r |
2430 | {\r |
2431 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_PCIX_8() | 0xffffff00));\r |
2432 | \r |
2433 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2434 | FLAG_C = CFLAG_CLEAR;\r |
2435 | FLAG_V = VFLAG_CLEAR;\r |
2436 | }\r |
2437 | \r |
2438 | \r |
2439 | void m68k_op_and_8_er_i(void)\r |
2440 | {\r |
2441 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_I_8() | 0xffffff00));\r |
2442 | \r |
2443 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2444 | FLAG_C = CFLAG_CLEAR;\r |
2445 | FLAG_V = VFLAG_CLEAR;\r |
2446 | }\r |
2447 | \r |
2448 | \r |
2449 | void m68k_op_and_16_er_d(void)\r |
2450 | {\r |
2451 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (DY | 0xffff0000));\r |
2452 | \r |
2453 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2454 | FLAG_C = CFLAG_CLEAR;\r |
2455 | FLAG_V = VFLAG_CLEAR;\r |
2456 | }\r |
2457 | \r |
2458 | \r |
2459 | void m68k_op_and_16_er_ai(void)\r |
2460 | {\r |
2461 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_AI_16() | 0xffff0000));\r |
2462 | \r |
2463 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2464 | FLAG_C = CFLAG_CLEAR;\r |
2465 | FLAG_V = VFLAG_CLEAR;\r |
2466 | }\r |
2467 | \r |
2468 | \r |
2469 | void m68k_op_and_16_er_pi(void)\r |
2470 | {\r |
2471 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_PI_16() | 0xffff0000));\r |
2472 | \r |
2473 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2474 | FLAG_C = CFLAG_CLEAR;\r |
2475 | FLAG_V = VFLAG_CLEAR;\r |
2476 | }\r |
2477 | \r |
2478 | \r |
2479 | void m68k_op_and_16_er_pd(void)\r |
2480 | {\r |
2481 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_PD_16() | 0xffff0000));\r |
2482 | \r |
2483 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2484 | FLAG_C = CFLAG_CLEAR;\r |
2485 | FLAG_V = VFLAG_CLEAR;\r |
2486 | }\r |
2487 | \r |
2488 | \r |
2489 | void m68k_op_and_16_er_di(void)\r |
2490 | {\r |
2491 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_DI_16() | 0xffff0000));\r |
2492 | \r |
2493 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2494 | FLAG_C = CFLAG_CLEAR;\r |
2495 | FLAG_V = VFLAG_CLEAR;\r |
2496 | }\r |
2497 | \r |
2498 | \r |
2499 | void m68k_op_and_16_er_ix(void)\r |
2500 | {\r |
2501 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_IX_16() | 0xffff0000));\r |
2502 | \r |
2503 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2504 | FLAG_C = CFLAG_CLEAR;\r |
2505 | FLAG_V = VFLAG_CLEAR;\r |
2506 | }\r |
2507 | \r |
2508 | \r |
2509 | void m68k_op_and_16_er_aw(void)\r |
2510 | {\r |
2511 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AW_16() | 0xffff0000));\r |
2512 | \r |
2513 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2514 | FLAG_C = CFLAG_CLEAR;\r |
2515 | FLAG_V = VFLAG_CLEAR;\r |
2516 | }\r |
2517 | \r |
2518 | \r |
2519 | void m68k_op_and_16_er_al(void)\r |
2520 | {\r |
2521 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AL_16() | 0xffff0000));\r |
2522 | \r |
2523 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2524 | FLAG_C = CFLAG_CLEAR;\r |
2525 | FLAG_V = VFLAG_CLEAR;\r |
2526 | }\r |
2527 | \r |
2528 | \r |
2529 | void m68k_op_and_16_er_pcdi(void)\r |
2530 | {\r |
2531 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_PCDI_16() | 0xffff0000));\r |
2532 | \r |
2533 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2534 | FLAG_C = CFLAG_CLEAR;\r |
2535 | FLAG_V = VFLAG_CLEAR;\r |
2536 | }\r |
2537 | \r |
2538 | \r |
2539 | void m68k_op_and_16_er_pcix(void)\r |
2540 | {\r |
2541 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_PCIX_16() | 0xffff0000));\r |
2542 | \r |
2543 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2544 | FLAG_C = CFLAG_CLEAR;\r |
2545 | FLAG_V = VFLAG_CLEAR;\r |
2546 | }\r |
2547 | \r |
2548 | \r |
2549 | void m68k_op_and_16_er_i(void)\r |
2550 | {\r |
2551 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_I_16() | 0xffff0000));\r |
2552 | \r |
2553 | FLAG_N = NFLAG_16(FLAG_Z);\r |
2554 | FLAG_C = CFLAG_CLEAR;\r |
2555 | FLAG_V = VFLAG_CLEAR;\r |
2556 | }\r |
2557 | \r |
2558 | \r |
2559 | void m68k_op_and_32_er_d(void)\r |
2560 | {\r |
2561 | FLAG_Z = DX &= DY;\r |
2562 | \r |
2563 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2564 | FLAG_C = CFLAG_CLEAR;\r |
2565 | FLAG_V = VFLAG_CLEAR;\r |
2566 | }\r |
2567 | \r |
2568 | \r |
2569 | void m68k_op_and_32_er_ai(void)\r |
2570 | {\r |
2571 | FLAG_Z = DX &= OPER_AY_AI_32();\r |
2572 | \r |
2573 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2574 | FLAG_C = CFLAG_CLEAR;\r |
2575 | FLAG_V = VFLAG_CLEAR;\r |
2576 | }\r |
2577 | \r |
2578 | \r |
2579 | void m68k_op_and_32_er_pi(void)\r |
2580 | {\r |
2581 | FLAG_Z = DX &= OPER_AY_PI_32();\r |
2582 | \r |
2583 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2584 | FLAG_C = CFLAG_CLEAR;\r |
2585 | FLAG_V = VFLAG_CLEAR;\r |
2586 | }\r |
2587 | \r |
2588 | \r |
2589 | void m68k_op_and_32_er_pd(void)\r |
2590 | {\r |
2591 | FLAG_Z = DX &= OPER_AY_PD_32();\r |
2592 | \r |
2593 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2594 | FLAG_C = CFLAG_CLEAR;\r |
2595 | FLAG_V = VFLAG_CLEAR;\r |
2596 | }\r |
2597 | \r |
2598 | \r |
2599 | void m68k_op_and_32_er_di(void)\r |
2600 | {\r |
2601 | FLAG_Z = DX &= OPER_AY_DI_32();\r |
2602 | \r |
2603 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2604 | FLAG_C = CFLAG_CLEAR;\r |
2605 | FLAG_V = VFLAG_CLEAR;\r |
2606 | }\r |
2607 | \r |
2608 | \r |
2609 | void m68k_op_and_32_er_ix(void)\r |
2610 | {\r |
2611 | FLAG_Z = DX &= OPER_AY_IX_32();\r |
2612 | \r |
2613 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2614 | FLAG_C = CFLAG_CLEAR;\r |
2615 | FLAG_V = VFLAG_CLEAR;\r |
2616 | }\r |
2617 | \r |
2618 | \r |
2619 | void m68k_op_and_32_er_aw(void)\r |
2620 | {\r |
2621 | FLAG_Z = DX &= OPER_AW_32();\r |
2622 | \r |
2623 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2624 | FLAG_C = CFLAG_CLEAR;\r |
2625 | FLAG_V = VFLAG_CLEAR;\r |
2626 | }\r |
2627 | \r |
2628 | \r |
2629 | void m68k_op_and_32_er_al(void)\r |
2630 | {\r |
2631 | FLAG_Z = DX &= OPER_AL_32();\r |
2632 | \r |
2633 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2634 | FLAG_C = CFLAG_CLEAR;\r |
2635 | FLAG_V = VFLAG_CLEAR;\r |
2636 | }\r |
2637 | \r |
2638 | \r |
2639 | void m68k_op_and_32_er_pcdi(void)\r |
2640 | {\r |
2641 | FLAG_Z = DX &= OPER_PCDI_32();\r |
2642 | \r |
2643 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2644 | FLAG_C = CFLAG_CLEAR;\r |
2645 | FLAG_V = VFLAG_CLEAR;\r |
2646 | }\r |
2647 | \r |
2648 | \r |
2649 | void m68k_op_and_32_er_pcix(void)\r |
2650 | {\r |
2651 | FLAG_Z = DX &= OPER_PCIX_32();\r |
2652 | \r |
2653 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2654 | FLAG_C = CFLAG_CLEAR;\r |
2655 | FLAG_V = VFLAG_CLEAR;\r |
2656 | }\r |
2657 | \r |
2658 | \r |
2659 | void m68k_op_and_32_er_i(void)\r |
2660 | {\r |
2661 | FLAG_Z = DX &= OPER_I_32();\r |
2662 | \r |
2663 | FLAG_N = NFLAG_32(FLAG_Z);\r |
2664 | FLAG_C = CFLAG_CLEAR;\r |
2665 | FLAG_V = VFLAG_CLEAR;\r |
2666 | }\r |
2667 | \r |
2668 | \r |
2669 | void m68k_op_and_8_re_ai(void)\r |
2670 | {\r |
2671 | uint ea = EA_AY_AI_8();\r |
2672 | uint res = DX & m68ki_read_8(ea);\r |
2673 | \r |
2674 | FLAG_N = NFLAG_8(res);\r |
2675 | FLAG_C = CFLAG_CLEAR;\r |
2676 | FLAG_V = VFLAG_CLEAR;\r |
2677 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
2678 | \r |
2679 | m68ki_write_8(ea, FLAG_Z);\r |
2680 | }\r |
2681 | \r |
2682 | \r |
2683 | void m68k_op_and_8_re_pi(void)\r |
2684 | {\r |
2685 | uint ea = EA_AY_PI_8();\r |
2686 | uint res = DX & m68ki_read_8(ea);\r |
2687 | \r |
2688 | FLAG_N = NFLAG_8(res);\r |
2689 | FLAG_C = CFLAG_CLEAR;\r |
2690 | FLAG_V = VFLAG_CLEAR;\r |
2691 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
2692 | \r |
2693 | m68ki_write_8(ea, FLAG_Z);\r |
2694 | }\r |
2695 | \r |
2696 | \r |
2697 | void m68k_op_and_8_re_pi7(void)\r |
2698 | {\r |
2699 | uint ea = EA_A7_PI_8();\r |
2700 | uint res = DX & m68ki_read_8(ea);\r |
2701 | \r |
2702 | FLAG_N = NFLAG_8(res);\r |
2703 | FLAG_C = CFLAG_CLEAR;\r |
2704 | FLAG_V = VFLAG_CLEAR;\r |
2705 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
2706 | \r |
2707 | m68ki_write_8(ea, FLAG_Z);\r |
2708 | }\r |
2709 | \r |
2710 | \r |
2711 | void m68k_op_and_8_re_pd(void)\r |
2712 | {\r |
2713 | uint ea = EA_AY_PD_8();\r |
2714 | uint res = DX & m68ki_read_8(ea);\r |
2715 | \r |
2716 | FLAG_N = NFLAG_8(res);\r |
2717 | FLAG_C = CFLAG_CLEAR;\r |
2718 | FLAG_V = VFLAG_CLEAR;\r |
2719 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
2720 | \r |
2721 | m68ki_write_8(ea, FLAG_Z);\r |
2722 | }\r |
2723 | \r |
2724 | \r |
2725 | void m68k_op_and_8_re_pd7(void)\r |
2726 | {\r |
2727 | uint ea = EA_A7_PD_8();\r |
2728 | uint res = DX & m68ki_read_8(ea);\r |
2729 | \r |
2730 | FLAG_N = NFLAG_8(res);\r |
2731 | FLAG_C = CFLAG_CLEAR;\r |
2732 | FLAG_V = VFLAG_CLEAR;\r |
2733 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
2734 | \r |
2735 | m68ki_write_8(ea, FLAG_Z);\r |
2736 | }\r |
2737 | \r |
2738 | \r |
2739 | void m68k_op_and_8_re_di(void)\r |
2740 | {\r |
2741 | uint ea = EA_AY_DI_8();\r |
2742 | uint res = DX & m68ki_read_8(ea);\r |
2743 | \r |
2744 | FLAG_N = NFLAG_8(res);\r |
2745 | FLAG_C = CFLAG_CLEAR;\r |
2746 | FLAG_V = VFLAG_CLEAR;\r |
2747 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
2748 | \r |
2749 | m68ki_write_8(ea, FLAG_Z);\r |
2750 | }\r |
2751 | \r |
2752 | \r |
2753 | void m68k_op_and_8_re_ix(void)\r |
2754 | {\r |
2755 | uint ea = EA_AY_IX_8();\r |
2756 | uint res = DX & m68ki_read_8(ea);\r |
2757 | \r |
2758 | FLAG_N = NFLAG_8(res);\r |
2759 | FLAG_C = CFLAG_CLEAR;\r |
2760 | FLAG_V = VFLAG_CLEAR;\r |
2761 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
2762 | \r |
2763 | m68ki_write_8(ea, FLAG_Z);\r |
2764 | }\r |
2765 | \r |
2766 | \r |
2767 | void m68k_op_and_8_re_aw(void)\r |
2768 | {\r |
2769 | uint ea = EA_AW_8();\r |
2770 | uint res = DX & m68ki_read_8(ea);\r |
2771 | \r |
2772 | FLAG_N = NFLAG_8(res);\r |
2773 | FLAG_C = CFLAG_CLEAR;\r |
2774 | FLAG_V = VFLAG_CLEAR;\r |
2775 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
2776 | \r |
2777 | m68ki_write_8(ea, FLAG_Z);\r |
2778 | }\r |
2779 | \r |
2780 | \r |
2781 | void m68k_op_and_8_re_al(void)\r |
2782 | {\r |
2783 | uint ea = EA_AL_8();\r |
2784 | uint res = DX & m68ki_read_8(ea);\r |
2785 | \r |
2786 | FLAG_N = NFLAG_8(res);\r |
2787 | FLAG_C = CFLAG_CLEAR;\r |
2788 | FLAG_V = VFLAG_CLEAR;\r |
2789 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
2790 | \r |
2791 | m68ki_write_8(ea, FLAG_Z);\r |
2792 | }\r |
2793 | \r |
2794 | \r |
2795 | void m68k_op_and_16_re_ai(void)\r |
2796 | {\r |
2797 | uint ea = EA_AY_AI_16();\r |
2798 | uint res = DX & m68ki_read_16(ea);\r |
2799 | \r |
2800 | FLAG_N = NFLAG_16(res);\r |
2801 | FLAG_C = CFLAG_CLEAR;\r |
2802 | FLAG_V = VFLAG_CLEAR;\r |
2803 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
2804 | \r |
2805 | m68ki_write_16(ea, FLAG_Z);\r |
2806 | }\r |
2807 | \r |
2808 | \r |
2809 | void m68k_op_and_16_re_pi(void)\r |
2810 | {\r |
2811 | uint ea = EA_AY_PI_16();\r |
2812 | uint res = DX & m68ki_read_16(ea);\r |
2813 | \r |
2814 | FLAG_N = NFLAG_16(res);\r |
2815 | FLAG_C = CFLAG_CLEAR;\r |
2816 | FLAG_V = VFLAG_CLEAR;\r |
2817 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
2818 | \r |
2819 | m68ki_write_16(ea, FLAG_Z);\r |
2820 | }\r |
2821 | \r |
2822 | \r |
2823 | void m68k_op_and_16_re_pd(void)\r |
2824 | {\r |
2825 | uint ea = EA_AY_PD_16();\r |
2826 | uint res = DX & m68ki_read_16(ea);\r |
2827 | \r |
2828 | FLAG_N = NFLAG_16(res);\r |
2829 | FLAG_C = CFLAG_CLEAR;\r |
2830 | FLAG_V = VFLAG_CLEAR;\r |
2831 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
2832 | \r |
2833 | m68ki_write_16(ea, FLAG_Z);\r |
2834 | }\r |
2835 | \r |
2836 | \r |
2837 | void m68k_op_and_16_re_di(void)\r |
2838 | {\r |
2839 | uint ea = EA_AY_DI_16();\r |
2840 | uint res = DX & m68ki_read_16(ea);\r |
2841 | \r |
2842 | FLAG_N = NFLAG_16(res);\r |
2843 | FLAG_C = CFLAG_CLEAR;\r |
2844 | FLAG_V = VFLAG_CLEAR;\r |
2845 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
2846 | \r |
2847 | m68ki_write_16(ea, FLAG_Z);\r |
2848 | }\r |
2849 | \r |
2850 | \r |
2851 | void m68k_op_and_16_re_ix(void)\r |
2852 | {\r |
2853 | uint ea = EA_AY_IX_16();\r |
2854 | uint res = DX & m68ki_read_16(ea);\r |
2855 | \r |
2856 | FLAG_N = NFLAG_16(res);\r |
2857 | FLAG_C = CFLAG_CLEAR;\r |
2858 | FLAG_V = VFLAG_CLEAR;\r |
2859 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
2860 | \r |
2861 | m68ki_write_16(ea, FLAG_Z);\r |
2862 | }\r |
2863 | \r |
2864 | \r |
2865 | void m68k_op_and_16_re_aw(void)\r |
2866 | {\r |
2867 | uint ea = EA_AW_16();\r |
2868 | uint res = DX & m68ki_read_16(ea);\r |
2869 | \r |
2870 | FLAG_N = NFLAG_16(res);\r |
2871 | FLAG_C = CFLAG_CLEAR;\r |
2872 | FLAG_V = VFLAG_CLEAR;\r |
2873 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
2874 | \r |
2875 | m68ki_write_16(ea, FLAG_Z);\r |
2876 | }\r |
2877 | \r |
2878 | \r |
2879 | void m68k_op_and_16_re_al(void)\r |
2880 | {\r |
2881 | uint ea = EA_AL_16();\r |
2882 | uint res = DX & m68ki_read_16(ea);\r |
2883 | \r |
2884 | FLAG_N = NFLAG_16(res);\r |
2885 | FLAG_C = CFLAG_CLEAR;\r |
2886 | FLAG_V = VFLAG_CLEAR;\r |
2887 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
2888 | \r |
2889 | m68ki_write_16(ea, FLAG_Z);\r |
2890 | }\r |
2891 | \r |
2892 | \r |
2893 | void m68k_op_and_32_re_ai(void)\r |
2894 | {\r |
2895 | uint ea = EA_AY_AI_32();\r |
2896 | uint res = DX & m68ki_read_32(ea);\r |
2897 | \r |
2898 | FLAG_N = NFLAG_32(res);\r |
2899 | FLAG_Z = res;\r |
2900 | FLAG_C = CFLAG_CLEAR;\r |
2901 | FLAG_V = VFLAG_CLEAR;\r |
2902 | \r |
2903 | m68ki_write_32(ea, res);\r |
2904 | }\r |
2905 | \r |
2906 | \r |
2907 | void m68k_op_and_32_re_pi(void)\r |
2908 | {\r |
2909 | uint ea = EA_AY_PI_32();\r |
2910 | uint res = DX & m68ki_read_32(ea);\r |
2911 | \r |
2912 | FLAG_N = NFLAG_32(res);\r |
2913 | FLAG_Z = res;\r |
2914 | FLAG_C = CFLAG_CLEAR;\r |
2915 | FLAG_V = VFLAG_CLEAR;\r |
2916 | \r |
2917 | m68ki_write_32(ea, res);\r |
2918 | }\r |
2919 | \r |
2920 | \r |
2921 | void m68k_op_and_32_re_pd(void)\r |
2922 | {\r |
2923 | uint ea = EA_AY_PD_32();\r |
2924 | uint res = DX & m68ki_read_32(ea);\r |
2925 | \r |
2926 | FLAG_N = NFLAG_32(res);\r |
2927 | FLAG_Z = res;\r |
2928 | FLAG_C = CFLAG_CLEAR;\r |
2929 | FLAG_V = VFLAG_CLEAR;\r |
2930 | \r |
2931 | m68ki_write_32(ea, res);\r |
2932 | }\r |
2933 | \r |
2934 | \r |
2935 | void m68k_op_and_32_re_di(void)\r |
2936 | {\r |
2937 | uint ea = EA_AY_DI_32();\r |
2938 | uint res = DX & m68ki_read_32(ea);\r |
2939 | \r |
2940 | FLAG_N = NFLAG_32(res);\r |
2941 | FLAG_Z = res;\r |
2942 | FLAG_C = CFLAG_CLEAR;\r |
2943 | FLAG_V = VFLAG_CLEAR;\r |
2944 | \r |
2945 | m68ki_write_32(ea, res);\r |
2946 | }\r |
2947 | \r |
2948 | \r |
2949 | void m68k_op_and_32_re_ix(void)\r |
2950 | {\r |
2951 | uint ea = EA_AY_IX_32();\r |
2952 | uint res = DX & m68ki_read_32(ea);\r |
2953 | \r |
2954 | FLAG_N = NFLAG_32(res);\r |
2955 | FLAG_Z = res;\r |
2956 | FLAG_C = CFLAG_CLEAR;\r |
2957 | FLAG_V = VFLAG_CLEAR;\r |
2958 | \r |
2959 | m68ki_write_32(ea, res);\r |
2960 | }\r |
2961 | \r |
2962 | \r |
2963 | void m68k_op_and_32_re_aw(void)\r |
2964 | {\r |
2965 | uint ea = EA_AW_32();\r |
2966 | uint res = DX & m68ki_read_32(ea);\r |
2967 | \r |
2968 | FLAG_N = NFLAG_32(res);\r |
2969 | FLAG_Z = res;\r |
2970 | FLAG_C = CFLAG_CLEAR;\r |
2971 | FLAG_V = VFLAG_CLEAR;\r |
2972 | \r |
2973 | m68ki_write_32(ea, res);\r |
2974 | }\r |
2975 | \r |
2976 | \r |
2977 | void m68k_op_and_32_re_al(void)\r |
2978 | {\r |
2979 | uint ea = EA_AL_32();\r |
2980 | uint res = DX & m68ki_read_32(ea);\r |
2981 | \r |
2982 | FLAG_N = NFLAG_32(res);\r |
2983 | FLAG_Z = res;\r |
2984 | FLAG_C = CFLAG_CLEAR;\r |
2985 | FLAG_V = VFLAG_CLEAR;\r |
2986 | \r |
2987 | m68ki_write_32(ea, res);\r |
2988 | }\r |
2989 | \r |
2990 | \r |
2991 | void m68k_op_andi_8_d(void)\r |
2992 | {\r |
2993 | FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00));\r |
2994 | \r |
2995 | FLAG_N = NFLAG_8(FLAG_Z);\r |
2996 | FLAG_C = CFLAG_CLEAR;\r |
2997 | FLAG_V = VFLAG_CLEAR;\r |
2998 | }\r |
2999 | \r |
3000 | \r |
3001 | void m68k_op_andi_8_ai(void)\r |
3002 | {\r |
3003 | uint src = OPER_I_8();\r |
3004 | uint ea = EA_AY_AI_8();\r |
3005 | uint res = src & m68ki_read_8(ea);\r |
3006 | \r |
3007 | FLAG_N = NFLAG_8(res);\r |
3008 | FLAG_Z = res;\r |
3009 | FLAG_C = CFLAG_CLEAR;\r |
3010 | FLAG_V = VFLAG_CLEAR;\r |
3011 | \r |
3012 | m68ki_write_8(ea, res);\r |
3013 | }\r |
3014 | \r |
3015 | \r |
3016 | void m68k_op_andi_8_pi(void)\r |
3017 | {\r |
3018 | uint src = OPER_I_8();\r |
3019 | uint ea = EA_AY_PI_8();\r |
3020 | uint res = src & m68ki_read_8(ea);\r |
3021 | \r |
3022 | FLAG_N = NFLAG_8(res);\r |
3023 | FLAG_Z = res;\r |
3024 | FLAG_C = CFLAG_CLEAR;\r |
3025 | FLAG_V = VFLAG_CLEAR;\r |
3026 | \r |
3027 | m68ki_write_8(ea, res);\r |
3028 | }\r |
3029 | \r |
3030 | \r |
3031 | void m68k_op_andi_8_pi7(void)\r |
3032 | {\r |
3033 | uint src = OPER_I_8();\r |
3034 | uint ea = EA_A7_PI_8();\r |
3035 | uint res = src & m68ki_read_8(ea);\r |
3036 | \r |
3037 | FLAG_N = NFLAG_8(res);\r |
3038 | FLAG_Z = res;\r |
3039 | FLAG_C = CFLAG_CLEAR;\r |
3040 | FLAG_V = VFLAG_CLEAR;\r |
3041 | \r |
3042 | m68ki_write_8(ea, res);\r |
3043 | }\r |
3044 | \r |
3045 | \r |
3046 | void m68k_op_andi_8_pd(void)\r |
3047 | {\r |
3048 | uint src = OPER_I_8();\r |
3049 | uint ea = EA_AY_PD_8();\r |
3050 | uint res = src & m68ki_read_8(ea);\r |
3051 | \r |
3052 | FLAG_N = NFLAG_8(res);\r |
3053 | FLAG_Z = res;\r |
3054 | FLAG_C = CFLAG_CLEAR;\r |
3055 | FLAG_V = VFLAG_CLEAR;\r |
3056 | \r |
3057 | m68ki_write_8(ea, res);\r |
3058 | }\r |
3059 | \r |
3060 | \r |
3061 | void m68k_op_andi_8_pd7(void)\r |
3062 | {\r |
3063 | uint src = OPER_I_8();\r |
3064 | uint ea = EA_A7_PD_8();\r |
3065 | uint res = src & m68ki_read_8(ea);\r |
3066 | \r |
3067 | FLAG_N = NFLAG_8(res);\r |
3068 | FLAG_Z = res;\r |
3069 | FLAG_C = CFLAG_CLEAR;\r |
3070 | FLAG_V = VFLAG_CLEAR;\r |
3071 | \r |
3072 | m68ki_write_8(ea, res);\r |
3073 | }\r |
3074 | \r |
3075 | \r |
3076 | void m68k_op_andi_8_di(void)\r |
3077 | {\r |
3078 | uint src = OPER_I_8();\r |
3079 | uint ea = EA_AY_DI_8();\r |
3080 | uint res = src & m68ki_read_8(ea);\r |
3081 | \r |
3082 | FLAG_N = NFLAG_8(res);\r |
3083 | FLAG_Z = res;\r |
3084 | FLAG_C = CFLAG_CLEAR;\r |
3085 | FLAG_V = VFLAG_CLEAR;\r |
3086 | \r |
3087 | m68ki_write_8(ea, res);\r |
3088 | }\r |
3089 | \r |
3090 | \r |
3091 | void m68k_op_andi_8_ix(void)\r |
3092 | {\r |
3093 | uint src = OPER_I_8();\r |
3094 | uint ea = EA_AY_IX_8();\r |
3095 | uint res = src & m68ki_read_8(ea);\r |
3096 | \r |
3097 | FLAG_N = NFLAG_8(res);\r |
3098 | FLAG_Z = res;\r |
3099 | FLAG_C = CFLAG_CLEAR;\r |
3100 | FLAG_V = VFLAG_CLEAR;\r |
3101 | \r |
3102 | m68ki_write_8(ea, res);\r |
3103 | }\r |
3104 | \r |
3105 | \r |
3106 | void m68k_op_andi_8_aw(void)\r |
3107 | {\r |
3108 | uint src = OPER_I_8();\r |
3109 | uint ea = EA_AW_8();\r |
3110 | uint res = src & m68ki_read_8(ea);\r |
3111 | \r |
3112 | FLAG_N = NFLAG_8(res);\r |
3113 | FLAG_Z = res;\r |
3114 | FLAG_C = CFLAG_CLEAR;\r |
3115 | FLAG_V = VFLAG_CLEAR;\r |
3116 | \r |
3117 | m68ki_write_8(ea, res);\r |
3118 | }\r |
3119 | \r |
3120 | \r |
3121 | void m68k_op_andi_8_al(void)\r |
3122 | {\r |
3123 | uint src = OPER_I_8();\r |
3124 | uint ea = EA_AL_8();\r |
3125 | uint res = src & m68ki_read_8(ea);\r |
3126 | \r |
3127 | FLAG_N = NFLAG_8(res);\r |
3128 | FLAG_Z = res;\r |
3129 | FLAG_C = CFLAG_CLEAR;\r |
3130 | FLAG_V = VFLAG_CLEAR;\r |
3131 | \r |
3132 | m68ki_write_8(ea, res);\r |
3133 | }\r |
3134 | \r |
3135 | \r |
3136 | void m68k_op_andi_16_d(void)\r |
3137 | {\r |
3138 | FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000));\r |
3139 | \r |
3140 | FLAG_N = NFLAG_16(FLAG_Z);\r |
3141 | FLAG_C = CFLAG_CLEAR;\r |
3142 | FLAG_V = VFLAG_CLEAR;\r |
3143 | }\r |
3144 | \r |
3145 | \r |
3146 | void m68k_op_andi_16_ai(void)\r |
3147 | {\r |
3148 | uint src = OPER_I_16();\r |
3149 | uint ea = EA_AY_AI_16();\r |
3150 | uint res = src & m68ki_read_16(ea);\r |
3151 | \r |
3152 | FLAG_N = NFLAG_16(res);\r |
3153 | FLAG_Z = res;\r |
3154 | FLAG_C = CFLAG_CLEAR;\r |
3155 | FLAG_V = VFLAG_CLEAR;\r |
3156 | \r |
3157 | m68ki_write_16(ea, res);\r |
3158 | }\r |
3159 | \r |
3160 | \r |
3161 | void m68k_op_andi_16_pi(void)\r |
3162 | {\r |
3163 | uint src = OPER_I_16();\r |
3164 | uint ea = EA_AY_PI_16();\r |
3165 | uint res = src & m68ki_read_16(ea);\r |
3166 | \r |
3167 | FLAG_N = NFLAG_16(res);\r |
3168 | FLAG_Z = res;\r |
3169 | FLAG_C = CFLAG_CLEAR;\r |
3170 | FLAG_V = VFLAG_CLEAR;\r |
3171 | \r |
3172 | m68ki_write_16(ea, res);\r |
3173 | }\r |
3174 | \r |
3175 | \r |
3176 | void m68k_op_andi_16_pd(void)\r |
3177 | {\r |
3178 | uint src = OPER_I_16();\r |
3179 | uint ea = EA_AY_PD_16();\r |
3180 | uint res = src & m68ki_read_16(ea);\r |
3181 | \r |
3182 | FLAG_N = NFLAG_16(res);\r |
3183 | FLAG_Z = res;\r |
3184 | FLAG_C = CFLAG_CLEAR;\r |
3185 | FLAG_V = VFLAG_CLEAR;\r |
3186 | \r |
3187 | m68ki_write_16(ea, res);\r |
3188 | }\r |
3189 | \r |
3190 | \r |
3191 | void m68k_op_andi_16_di(void)\r |
3192 | {\r |
3193 | uint src = OPER_I_16();\r |
3194 | uint ea = EA_AY_DI_16();\r |
3195 | uint res = src & m68ki_read_16(ea);\r |
3196 | \r |
3197 | FLAG_N = NFLAG_16(res);\r |
3198 | FLAG_Z = res;\r |
3199 | FLAG_C = CFLAG_CLEAR;\r |
3200 | FLAG_V = VFLAG_CLEAR;\r |
3201 | \r |
3202 | m68ki_write_16(ea, res);\r |
3203 | }\r |
3204 | \r |
3205 | \r |
3206 | void m68k_op_andi_16_ix(void)\r |
3207 | {\r |
3208 | uint src = OPER_I_16();\r |
3209 | uint ea = EA_AY_IX_16();\r |
3210 | uint res = src & m68ki_read_16(ea);\r |
3211 | \r |
3212 | FLAG_N = NFLAG_16(res);\r |
3213 | FLAG_Z = res;\r |
3214 | FLAG_C = CFLAG_CLEAR;\r |
3215 | FLAG_V = VFLAG_CLEAR;\r |
3216 | \r |
3217 | m68ki_write_16(ea, res);\r |
3218 | }\r |
3219 | \r |
3220 | \r |
3221 | void m68k_op_andi_16_aw(void)\r |
3222 | {\r |
3223 | uint src = OPER_I_16();\r |
3224 | uint ea = EA_AW_16();\r |
3225 | uint res = src & m68ki_read_16(ea);\r |
3226 | \r |
3227 | FLAG_N = NFLAG_16(res);\r |
3228 | FLAG_Z = res;\r |
3229 | FLAG_C = CFLAG_CLEAR;\r |
3230 | FLAG_V = VFLAG_CLEAR;\r |
3231 | \r |
3232 | m68ki_write_16(ea, res);\r |
3233 | }\r |
3234 | \r |
3235 | \r |
3236 | void m68k_op_andi_16_al(void)\r |
3237 | {\r |
3238 | uint src = OPER_I_16();\r |
3239 | uint ea = EA_AL_16();\r |
3240 | uint res = src & m68ki_read_16(ea);\r |
3241 | \r |
3242 | FLAG_N = NFLAG_16(res);\r |
3243 | FLAG_Z = res;\r |
3244 | FLAG_C = CFLAG_CLEAR;\r |
3245 | FLAG_V = VFLAG_CLEAR;\r |
3246 | \r |
3247 | m68ki_write_16(ea, res);\r |
3248 | }\r |
3249 | \r |
3250 | \r |
3251 | void m68k_op_andi_32_d(void)\r |
3252 | {\r |
3253 | FLAG_Z = DY &= (OPER_I_32());\r |
3254 | \r |
3255 | FLAG_N = NFLAG_32(FLAG_Z);\r |
3256 | FLAG_C = CFLAG_CLEAR;\r |
3257 | FLAG_V = VFLAG_CLEAR;\r |
3258 | }\r |
3259 | \r |
3260 | \r |
3261 | void m68k_op_andi_32_ai(void)\r |
3262 | {\r |
3263 | uint src = OPER_I_32();\r |
3264 | uint ea = EA_AY_AI_32();\r |
3265 | uint res = src & m68ki_read_32(ea);\r |
3266 | \r |
3267 | FLAG_N = NFLAG_32(res);\r |
3268 | FLAG_Z = res;\r |
3269 | FLAG_C = CFLAG_CLEAR;\r |
3270 | FLAG_V = VFLAG_CLEAR;\r |
3271 | \r |
3272 | m68ki_write_32(ea, res);\r |
3273 | }\r |
3274 | \r |
3275 | \r |
3276 | void m68k_op_andi_32_pi(void)\r |
3277 | {\r |
3278 | uint src = OPER_I_32();\r |
3279 | uint ea = EA_AY_PI_32();\r |
3280 | uint res = src & m68ki_read_32(ea);\r |
3281 | \r |
3282 | FLAG_N = NFLAG_32(res);\r |
3283 | FLAG_Z = res;\r |
3284 | FLAG_C = CFLAG_CLEAR;\r |
3285 | FLAG_V = VFLAG_CLEAR;\r |
3286 | \r |
3287 | m68ki_write_32(ea, res);\r |
3288 | }\r |
3289 | \r |
3290 | \r |
3291 | void m68k_op_andi_32_pd(void)\r |
3292 | {\r |
3293 | uint src = OPER_I_32();\r |
3294 | uint ea = EA_AY_PD_32();\r |
3295 | uint res = src & m68ki_read_32(ea);\r |
3296 | \r |
3297 | FLAG_N = NFLAG_32(res);\r |
3298 | FLAG_Z = res;\r |
3299 | FLAG_C = CFLAG_CLEAR;\r |
3300 | FLAG_V = VFLAG_CLEAR;\r |
3301 | \r |
3302 | m68ki_write_32(ea, res);\r |
3303 | }\r |
3304 | \r |
3305 | \r |
3306 | void m68k_op_andi_32_di(void)\r |
3307 | {\r |
3308 | uint src = OPER_I_32();\r |
3309 | uint ea = EA_AY_DI_32();\r |
3310 | uint res = src & m68ki_read_32(ea);\r |
3311 | \r |
3312 | FLAG_N = NFLAG_32(res);\r |
3313 | FLAG_Z = res;\r |
3314 | FLAG_C = CFLAG_CLEAR;\r |
3315 | FLAG_V = VFLAG_CLEAR;\r |
3316 | \r |
3317 | m68ki_write_32(ea, res);\r |
3318 | }\r |
3319 | \r |
3320 | \r |
3321 | void m68k_op_andi_32_ix(void)\r |
3322 | {\r |
3323 | uint src = OPER_I_32();\r |
3324 | uint ea = EA_AY_IX_32();\r |
3325 | uint res = src & m68ki_read_32(ea);\r |
3326 | \r |
3327 | FLAG_N = NFLAG_32(res);\r |
3328 | FLAG_Z = res;\r |
3329 | FLAG_C = CFLAG_CLEAR;\r |
3330 | FLAG_V = VFLAG_CLEAR;\r |
3331 | \r |
3332 | m68ki_write_32(ea, res);\r |
3333 | }\r |
3334 | \r |
3335 | \r |
3336 | void m68k_op_andi_32_aw(void)\r |
3337 | {\r |
3338 | uint src = OPER_I_32();\r |
3339 | uint ea = EA_AW_32();\r |
3340 | uint res = src & m68ki_read_32(ea);\r |
3341 | \r |
3342 | FLAG_N = NFLAG_32(res);\r |
3343 | FLAG_Z = res;\r |
3344 | FLAG_C = CFLAG_CLEAR;\r |
3345 | FLAG_V = VFLAG_CLEAR;\r |
3346 | \r |
3347 | m68ki_write_32(ea, res);\r |
3348 | }\r |
3349 | \r |
3350 | \r |
3351 | void m68k_op_andi_32_al(void)\r |
3352 | {\r |
3353 | uint src = OPER_I_32();\r |
3354 | uint ea = EA_AL_32();\r |
3355 | uint res = src & m68ki_read_32(ea);\r |
3356 | \r |
3357 | FLAG_N = NFLAG_32(res);\r |
3358 | FLAG_Z = res;\r |
3359 | FLAG_C = CFLAG_CLEAR;\r |
3360 | FLAG_V = VFLAG_CLEAR;\r |
3361 | \r |
3362 | m68ki_write_32(ea, res);\r |
3363 | }\r |
3364 | \r |
3365 | \r |
3366 | void m68k_op_andi_16_toc(void)\r |
3367 | {\r |
3368 | m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16());\r |
3369 | }\r |
3370 | \r |
3371 | \r |
3372 | void m68k_op_andi_16_tos(void)\r |
3373 | {\r |
3374 | if(FLAG_S)\r |
3375 | {\r |
3376 | uint src = OPER_I_16();\r |
3377 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
3378 | m68ki_set_sr(m68ki_get_sr() & src);\r |
3379 | return;\r |
3380 | }\r |
3381 | m68ki_exception_privilege_violation();\r |
3382 | }\r |
3383 | \r |
3384 | \r |
3385 | void m68k_op_asr_8_s(void)\r |
3386 | {\r |
3387 | uint* r_dst = &DY;\r |
3388 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3389 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3390 | uint res = src >> shift;\r |
3391 | \r |
3392 | if(shift != 0)\r |
3393 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3394 | \r |
3395 | if(GET_MSB_8(src))\r |
3396 | res |= m68ki_shift_8_table[shift];\r |
3397 | \r |
3398 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3399 | \r |
3400 | FLAG_N = NFLAG_8(res);\r |
3401 | FLAG_Z = res;\r |
3402 | FLAG_V = VFLAG_CLEAR;\r |
3403 | FLAG_X = FLAG_C = src << (9-shift);\r |
3404 | }\r |
3405 | \r |
3406 | \r |
3407 | void m68k_op_asr_16_s(void)\r |
3408 | {\r |
3409 | uint* r_dst = &DY;\r |
3410 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3411 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3412 | uint res = src >> shift;\r |
3413 | \r |
3414 | if(shift != 0)\r |
3415 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3416 | \r |
3417 | if(GET_MSB_16(src))\r |
3418 | res |= m68ki_shift_16_table[shift];\r |
3419 | \r |
3420 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3421 | \r |
3422 | FLAG_N = NFLAG_16(res);\r |
3423 | FLAG_Z = res;\r |
3424 | FLAG_V = VFLAG_CLEAR;\r |
3425 | FLAG_X = FLAG_C = src << (9-shift);\r |
3426 | }\r |
3427 | \r |
3428 | \r |
3429 | void m68k_op_asr_32_s(void)\r |
3430 | {\r |
3431 | uint* r_dst = &DY;\r |
3432 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3433 | uint src = *r_dst;\r |
3434 | uint res = src >> shift;\r |
3435 | \r |
3436 | if(shift != 0)\r |
3437 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3438 | \r |
3439 | if(GET_MSB_32(src))\r |
3440 | res |= m68ki_shift_32_table[shift];\r |
3441 | \r |
3442 | *r_dst = res;\r |
3443 | \r |
3444 | FLAG_N = NFLAG_32(res);\r |
3445 | FLAG_Z = res;\r |
3446 | FLAG_V = VFLAG_CLEAR;\r |
3447 | FLAG_X = FLAG_C = src << (9-shift);\r |
3448 | }\r |
3449 | \r |
3450 | \r |
3451 | void m68k_op_asr_8_r(void)\r |
3452 | {\r |
3453 | uint* r_dst = &DY;\r |
3454 | uint shift = DX & 0x3f;\r |
3455 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3456 | uint res = src >> shift;\r |
3457 | \r |
3458 | if(shift != 0)\r |
3459 | {\r |
3460 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3461 | \r |
3462 | if(shift < 8)\r |
3463 | {\r |
3464 | if(GET_MSB_8(src))\r |
3465 | res |= m68ki_shift_8_table[shift];\r |
3466 | \r |
3467 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3468 | \r |
3469 | FLAG_X = FLAG_C = src << (9-shift);\r |
3470 | FLAG_N = NFLAG_8(res);\r |
3471 | FLAG_Z = res;\r |
3472 | FLAG_V = VFLAG_CLEAR;\r |
3473 | return;\r |
3474 | }\r |
3475 | \r |
3476 | if(GET_MSB_8(src))\r |
3477 | {\r |
3478 | *r_dst |= 0xff;\r |
3479 | FLAG_C = CFLAG_SET;\r |
3480 | FLAG_X = XFLAG_SET;\r |
3481 | FLAG_N = NFLAG_SET;\r |
3482 | FLAG_Z = ZFLAG_CLEAR;\r |
3483 | FLAG_V = VFLAG_CLEAR;\r |
3484 | return;\r |
3485 | }\r |
3486 | \r |
3487 | *r_dst &= 0xffffff00;\r |
3488 | FLAG_C = CFLAG_CLEAR;\r |
3489 | FLAG_X = XFLAG_CLEAR;\r |
3490 | FLAG_N = NFLAG_CLEAR;\r |
3491 | FLAG_Z = ZFLAG_SET;\r |
3492 | FLAG_V = VFLAG_CLEAR;\r |
3493 | return;\r |
3494 | }\r |
3495 | \r |
3496 | FLAG_C = CFLAG_CLEAR;\r |
3497 | FLAG_N = NFLAG_8(src);\r |
3498 | FLAG_Z = src;\r |
3499 | FLAG_V = VFLAG_CLEAR;\r |
3500 | }\r |
3501 | \r |
3502 | \r |
3503 | void m68k_op_asr_16_r(void)\r |
3504 | {\r |
3505 | uint* r_dst = &DY;\r |
3506 | uint shift = DX & 0x3f;\r |
3507 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3508 | uint res = src >> shift;\r |
3509 | \r |
3510 | if(shift != 0)\r |
3511 | {\r |
3512 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3513 | \r |
3514 | if(shift < 16)\r |
3515 | {\r |
3516 | if(GET_MSB_16(src))\r |
3517 | res |= m68ki_shift_16_table[shift];\r |
3518 | \r |
3519 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3520 | \r |
3521 | FLAG_C = FLAG_X = (src >> (shift - 1))<<8;\r |
3522 | FLAG_N = NFLAG_16(res);\r |
3523 | FLAG_Z = res;\r |
3524 | FLAG_V = VFLAG_CLEAR;\r |
3525 | return;\r |
3526 | }\r |
3527 | \r |
3528 | if(GET_MSB_16(src))\r |
3529 | {\r |
3530 | *r_dst |= 0xffff;\r |
3531 | FLAG_C = CFLAG_SET;\r |
3532 | FLAG_X = XFLAG_SET;\r |
3533 | FLAG_N = NFLAG_SET;\r |
3534 | FLAG_Z = ZFLAG_CLEAR;\r |
3535 | FLAG_V = VFLAG_CLEAR;\r |
3536 | return;\r |
3537 | }\r |
3538 | \r |
3539 | *r_dst &= 0xffff0000;\r |
3540 | FLAG_C = CFLAG_CLEAR;\r |
3541 | FLAG_X = XFLAG_CLEAR;\r |
3542 | FLAG_N = NFLAG_CLEAR;\r |
3543 | FLAG_Z = ZFLAG_SET;\r |
3544 | FLAG_V = VFLAG_CLEAR;\r |
3545 | return;\r |
3546 | }\r |
3547 | \r |
3548 | FLAG_C = CFLAG_CLEAR;\r |
3549 | FLAG_N = NFLAG_16(src);\r |
3550 | FLAG_Z = src;\r |
3551 | FLAG_V = VFLAG_CLEAR;\r |
3552 | }\r |
3553 | \r |
3554 | \r |
3555 | void m68k_op_asr_32_r(void)\r |
3556 | {\r |
3557 | uint* r_dst = &DY;\r |
3558 | uint shift = DX & 0x3f;\r |
3559 | uint src = *r_dst;\r |
3560 | uint res = src >> shift;\r |
3561 | \r |
3562 | if(shift != 0)\r |
3563 | {\r |
3564 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3565 | \r |
3566 | if(shift < 32)\r |
3567 | {\r |
3568 | if(GET_MSB_32(src))\r |
3569 | res |= m68ki_shift_32_table[shift];\r |
3570 | \r |
3571 | *r_dst = res;\r |
3572 | \r |
3573 | FLAG_C = FLAG_X = (src >> (shift - 1))<<8;\r |
3574 | FLAG_N = NFLAG_32(res);\r |
3575 | FLAG_Z = res;\r |
3576 | FLAG_V = VFLAG_CLEAR;\r |
3577 | return;\r |
3578 | }\r |
3579 | \r |
3580 | if(GET_MSB_32(src))\r |
3581 | {\r |
3582 | *r_dst = 0xffffffff;\r |
3583 | FLAG_C = CFLAG_SET;\r |
3584 | FLAG_X = XFLAG_SET;\r |
3585 | FLAG_N = NFLAG_SET;\r |
3586 | FLAG_Z = ZFLAG_CLEAR;\r |
3587 | FLAG_V = VFLAG_CLEAR;\r |
3588 | return;\r |
3589 | }\r |
3590 | \r |
3591 | *r_dst = 0;\r |
3592 | FLAG_C = CFLAG_CLEAR;\r |
3593 | FLAG_X = XFLAG_CLEAR;\r |
3594 | FLAG_N = NFLAG_CLEAR;\r |
3595 | FLAG_Z = ZFLAG_SET;\r |
3596 | FLAG_V = VFLAG_CLEAR;\r |
3597 | return;\r |
3598 | }\r |
3599 | \r |
3600 | FLAG_C = CFLAG_CLEAR;\r |
3601 | FLAG_N = NFLAG_32(src);\r |
3602 | FLAG_Z = src;\r |
3603 | FLAG_V = VFLAG_CLEAR;\r |
3604 | }\r |
3605 | \r |
3606 | \r |
3607 | void m68k_op_asr_16_ai(void)\r |
3608 | {\r |
3609 | uint ea = EA_AY_AI_16();\r |
3610 | uint src = m68ki_read_16(ea);\r |
3611 | uint res = src >> 1;\r |
3612 | \r |
3613 | if(GET_MSB_16(src))\r |
3614 | res |= 0x8000;\r |
3615 | \r |
3616 | m68ki_write_16(ea, res);\r |
3617 | \r |
3618 | FLAG_N = NFLAG_16(res);\r |
3619 | FLAG_Z = res;\r |
3620 | FLAG_V = VFLAG_CLEAR;\r |
3621 | FLAG_C = FLAG_X = src << 8;\r |
3622 | }\r |
3623 | \r |
3624 | \r |
3625 | void m68k_op_asr_16_pi(void)\r |
3626 | {\r |
3627 | uint ea = EA_AY_PI_16();\r |
3628 | uint src = m68ki_read_16(ea);\r |
3629 | uint res = src >> 1;\r |
3630 | \r |
3631 | if(GET_MSB_16(src))\r |
3632 | res |= 0x8000;\r |
3633 | \r |
3634 | m68ki_write_16(ea, res);\r |
3635 | \r |
3636 | FLAG_N = NFLAG_16(res);\r |
3637 | FLAG_Z = res;\r |
3638 | FLAG_V = VFLAG_CLEAR;\r |
3639 | FLAG_C = FLAG_X = src << 8;\r |
3640 | }\r |
3641 | \r |
3642 | \r |
3643 | void m68k_op_asr_16_pd(void)\r |
3644 | {\r |
3645 | uint ea = EA_AY_PD_16();\r |
3646 | uint src = m68ki_read_16(ea);\r |
3647 | uint res = src >> 1;\r |
3648 | \r |
3649 | if(GET_MSB_16(src))\r |
3650 | res |= 0x8000;\r |
3651 | \r |
3652 | m68ki_write_16(ea, res);\r |
3653 | \r |
3654 | FLAG_N = NFLAG_16(res);\r |
3655 | FLAG_Z = res;\r |
3656 | FLAG_V = VFLAG_CLEAR;\r |
3657 | FLAG_C = FLAG_X = src << 8;\r |
3658 | }\r |
3659 | \r |
3660 | \r |
3661 | void m68k_op_asr_16_di(void)\r |
3662 | {\r |
3663 | uint ea = EA_AY_DI_16();\r |
3664 | uint src = m68ki_read_16(ea);\r |
3665 | uint res = src >> 1;\r |
3666 | \r |
3667 | if(GET_MSB_16(src))\r |
3668 | res |= 0x8000;\r |
3669 | \r |
3670 | m68ki_write_16(ea, res);\r |
3671 | \r |
3672 | FLAG_N = NFLAG_16(res);\r |
3673 | FLAG_Z = res;\r |
3674 | FLAG_V = VFLAG_CLEAR;\r |
3675 | FLAG_C = FLAG_X = src << 8;\r |
3676 | }\r |
3677 | \r |
3678 | \r |
3679 | void m68k_op_asr_16_ix(void)\r |
3680 | {\r |
3681 | uint ea = EA_AY_IX_16();\r |
3682 | uint src = m68ki_read_16(ea);\r |
3683 | uint res = src >> 1;\r |
3684 | \r |
3685 | if(GET_MSB_16(src))\r |
3686 | res |= 0x8000;\r |
3687 | \r |
3688 | m68ki_write_16(ea, res);\r |
3689 | \r |
3690 | FLAG_N = NFLAG_16(res);\r |
3691 | FLAG_Z = res;\r |
3692 | FLAG_V = VFLAG_CLEAR;\r |
3693 | FLAG_C = FLAG_X = src << 8;\r |
3694 | }\r |
3695 | \r |
3696 | \r |
3697 | void m68k_op_asr_16_aw(void)\r |
3698 | {\r |
3699 | uint ea = EA_AW_16();\r |
3700 | uint src = m68ki_read_16(ea);\r |
3701 | uint res = src >> 1;\r |
3702 | \r |
3703 | if(GET_MSB_16(src))\r |
3704 | res |= 0x8000;\r |
3705 | \r |
3706 | m68ki_write_16(ea, res);\r |
3707 | \r |
3708 | FLAG_N = NFLAG_16(res);\r |
3709 | FLAG_Z = res;\r |
3710 | FLAG_V = VFLAG_CLEAR;\r |
3711 | FLAG_C = FLAG_X = src << 8;\r |
3712 | }\r |
3713 | \r |
3714 | \r |
3715 | void m68k_op_asr_16_al(void)\r |
3716 | {\r |
3717 | uint ea = EA_AL_16();\r |
3718 | uint src = m68ki_read_16(ea);\r |
3719 | uint res = src >> 1;\r |
3720 | \r |
3721 | if(GET_MSB_16(src))\r |
3722 | res |= 0x8000;\r |
3723 | \r |
3724 | m68ki_write_16(ea, res);\r |
3725 | \r |
3726 | FLAG_N = NFLAG_16(res);\r |
3727 | FLAG_Z = res;\r |
3728 | FLAG_V = VFLAG_CLEAR;\r |
3729 | FLAG_C = FLAG_X = src << 8;\r |
3730 | }\r |
3731 | \r |
3732 | \r |
3733 | void m68k_op_asl_8_s(void)\r |
3734 | {\r |
3735 | uint* r_dst = &DY;\r |
3736 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3737 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3738 | uint res = MASK_OUT_ABOVE_8(src << shift);\r |
3739 | \r |
3740 | if(shift != 0)\r |
3741 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3742 | \r |
3743 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3744 | \r |
3745 | FLAG_X = FLAG_C = src << shift;\r |
3746 | FLAG_N = NFLAG_8(res);\r |
3747 | FLAG_Z = res;\r |
3748 | src &= m68ki_shift_8_table[shift + 1];\r |
3749 | FLAG_V = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7;\r |
3750 | }\r |
3751 | \r |
3752 | \r |
3753 | void m68k_op_asl_16_s(void)\r |
3754 | {\r |
3755 | uint* r_dst = &DY;\r |
3756 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3757 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3758 | uint res = MASK_OUT_ABOVE_16(src << shift);\r |
3759 | \r |
3760 | if(shift != 0)\r |
3761 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3762 | \r |
3763 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3764 | \r |
3765 | FLAG_N = NFLAG_16(res);\r |
3766 | FLAG_Z = res;\r |
3767 | FLAG_X = FLAG_C = src >> (8-shift);\r |
3768 | src &= m68ki_shift_16_table[shift + 1];\r |
3769 | FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;\r |
3770 | }\r |
3771 | \r |
3772 | \r |
3773 | void m68k_op_asl_32_s(void)\r |
3774 | {\r |
3775 | uint* r_dst = &DY;\r |
3776 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3777 | uint src = *r_dst;\r |
3778 | uint res = MASK_OUT_ABOVE_32(src << shift);\r |
3779 | \r |
3780 | if(shift != 0)\r |
3781 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3782 | \r |
3783 | *r_dst = res;\r |
3784 | \r |
3785 | FLAG_N = NFLAG_32(res);\r |
3786 | FLAG_Z = res;\r |
3787 | FLAG_X = FLAG_C = src >> (24-shift);\r |
3788 | src &= m68ki_shift_32_table[shift + 1];\r |
3789 | FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;\r |
3790 | }\r |
3791 | \r |
3792 | \r |
3793 | void m68k_op_asl_8_r(void)\r |
3794 | {\r |
3795 | uint* r_dst = &DY;\r |
3796 | uint shift = DX & 0x3f;\r |
3797 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3798 | uint res = MASK_OUT_ABOVE_8(src << shift);\r |
3799 | \r |
3800 | if(shift != 0)\r |
3801 | {\r |
3802 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3803 | \r |
3804 | if(shift < 8)\r |
3805 | {\r |
3806 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3807 | FLAG_X = FLAG_C = src << shift;\r |
3808 | FLAG_N = NFLAG_8(res);\r |
3809 | FLAG_Z = res;\r |
3810 | src &= m68ki_shift_8_table[shift + 1];\r |
3811 | FLAG_V = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7;\r |
3812 | return;\r |
3813 | }\r |
3814 | \r |
3815 | *r_dst &= 0xffffff00;\r |
3816 | FLAG_X = FLAG_C = ((shift == 8 ? src & 1 : 0))<<8;\r |
3817 | FLAG_N = NFLAG_CLEAR;\r |
3818 | FLAG_Z = ZFLAG_SET;\r |
3819 | FLAG_V = (!(src == 0))<<7;\r |
3820 | return;\r |
3821 | }\r |
3822 | \r |
3823 | FLAG_C = CFLAG_CLEAR;\r |
3824 | FLAG_N = NFLAG_8(src);\r |
3825 | FLAG_Z = src;\r |
3826 | FLAG_V = VFLAG_CLEAR;\r |
3827 | }\r |
3828 | \r |
3829 | \r |
3830 | void m68k_op_asl_16_r(void)\r |
3831 | {\r |
3832 | uint* r_dst = &DY;\r |
3833 | uint shift = DX & 0x3f;\r |
3834 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3835 | uint res = MASK_OUT_ABOVE_16(src << shift);\r |
3836 | \r |
3837 | if(shift != 0)\r |
3838 | {\r |
3839 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3840 | \r |
3841 | if(shift < 16)\r |
3842 | {\r |
3843 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3844 | FLAG_X = FLAG_C = (src << shift) >> 8;\r |
3845 | FLAG_N = NFLAG_16(res);\r |
3846 | FLAG_Z = res;\r |
3847 | src &= m68ki_shift_16_table[shift + 1];\r |
3848 | FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;\r |
3849 | return;\r |
3850 | }\r |
3851 | \r |
3852 | *r_dst &= 0xffff0000;\r |
3853 | FLAG_X = FLAG_C = ((shift == 16 ? src & 1 : 0))<<8;\r |
3854 | FLAG_N = NFLAG_CLEAR;\r |
3855 | FLAG_Z = ZFLAG_SET;\r |
3856 | FLAG_V = (!(src == 0))<<7;\r |
3857 | return;\r |
3858 | }\r |
3859 | \r |
3860 | FLAG_C = CFLAG_CLEAR;\r |
3861 | FLAG_N = NFLAG_16(src);\r |
3862 | FLAG_Z = src;\r |
3863 | FLAG_V = VFLAG_CLEAR;\r |
3864 | }\r |
3865 | \r |
3866 | \r |
3867 | void m68k_op_asl_32_r(void)\r |
3868 | {\r |
3869 | uint* r_dst = &DY;\r |
3870 | uint shift = DX & 0x3f;\r |
3871 | uint src = *r_dst;\r |
3872 | uint res = MASK_OUT_ABOVE_32(src << shift);\r |
3873 | \r |
3874 | if(shift != 0)\r |
3875 | {\r |
3876 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3877 | \r |
3878 | if(shift < 32)\r |
3879 | {\r |
3880 | *r_dst = res;\r |
3881 | FLAG_X = FLAG_C = (src >> (32 - shift)) << 8;\r |
3882 | FLAG_N = NFLAG_32(res);\r |
3883 | FLAG_Z = res;\r |
3884 | src &= m68ki_shift_32_table[shift + 1];\r |
3885 | FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;\r |
3886 | return;\r |
3887 | }\r |
3888 | \r |
3889 | *r_dst = 0;\r |
3890 | FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;\r |
3891 | FLAG_N = NFLAG_CLEAR;\r |
3892 | FLAG_Z = ZFLAG_SET;\r |
3893 | FLAG_V = (!(src == 0))<<7;\r |
3894 | return;\r |
3895 | }\r |
3896 | \r |
3897 | FLAG_C = CFLAG_CLEAR;\r |
3898 | FLAG_N = NFLAG_32(src);\r |
3899 | FLAG_Z = src;\r |
3900 | FLAG_V = VFLAG_CLEAR;\r |
3901 | }\r |
3902 | \r |
3903 | \r |
3904 | void m68k_op_asl_16_ai(void)\r |
3905 | {\r |
3906 | uint ea = EA_AY_AI_16();\r |
3907 | uint src = m68ki_read_16(ea);\r |
3908 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
3909 | \r |
3910 | m68ki_write_16(ea, res);\r |
3911 | \r |
3912 | FLAG_N = NFLAG_16(res);\r |
3913 | FLAG_Z = res;\r |
3914 | FLAG_X = FLAG_C = src >> 7;\r |
3915 | src &= 0xc000;\r |
3916 | FLAG_V = (!(src == 0 || src == 0xc000))<<7;\r |
3917 | }\r |
3918 | \r |
3919 | \r |
3920 | void m68k_op_asl_16_pi(void)\r |
3921 | {\r |
3922 | uint ea = EA_AY_PI_16();\r |
3923 | uint src = m68ki_read_16(ea);\r |
3924 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
3925 | \r |
3926 | m68ki_write_16(ea, res);\r |
3927 | \r |
3928 | FLAG_N = NFLAG_16(res);\r |
3929 | FLAG_Z = res;\r |
3930 | FLAG_X = FLAG_C = src >> 7;\r |
3931 | src &= 0xc000;\r |
3932 | FLAG_V = (!(src == 0 || src == 0xc000))<<7;\r |
3933 | }\r |
3934 | \r |
3935 | \r |
3936 | void m68k_op_asl_16_pd(void)\r |
3937 | {\r |
3938 | uint ea = EA_AY_PD_16();\r |
3939 | uint src = m68ki_read_16(ea);\r |
3940 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
3941 | \r |
3942 | m68ki_write_16(ea, res);\r |
3943 | \r |
3944 | FLAG_N = NFLAG_16(res);\r |
3945 | FLAG_Z = res;\r |
3946 | FLAG_X = FLAG_C = src >> 7;\r |
3947 | src &= 0xc000;\r |
3948 | FLAG_V = (!(src == 0 || src == 0xc000))<<7;\r |
3949 | }\r |
3950 | \r |
3951 | \r |
3952 | void m68k_op_asl_16_di(void)\r |
3953 | {\r |
3954 | uint ea = EA_AY_DI_16();\r |
3955 | uint src = m68ki_read_16(ea);\r |
3956 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
3957 | \r |
3958 | m68ki_write_16(ea, res);\r |
3959 | \r |
3960 | FLAG_N = NFLAG_16(res);\r |
3961 | FLAG_Z = res;\r |
3962 | FLAG_X = FLAG_C = src >> 7;\r |
3963 | src &= 0xc000;\r |
3964 | FLAG_V = (!(src == 0 || src == 0xc000))<<7;\r |
3965 | }\r |
3966 | \r |
3967 | \r |
3968 | void m68k_op_asl_16_ix(void)\r |
3969 | {\r |
3970 | uint ea = EA_AY_IX_16();\r |
3971 | uint src = m68ki_read_16(ea);\r |
3972 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
3973 | \r |
3974 | m68ki_write_16(ea, res);\r |
3975 | \r |
3976 | FLAG_N = NFLAG_16(res);\r |
3977 | FLAG_Z = res;\r |
3978 | FLAG_X = FLAG_C = src >> 7;\r |
3979 | src &= 0xc000;\r |
3980 | FLAG_V = (!(src == 0 || src == 0xc000))<<7;\r |
3981 | }\r |
3982 | \r |
3983 | \r |
3984 | void m68k_op_asl_16_aw(void)\r |
3985 | {\r |
3986 | uint ea = EA_AW_16();\r |
3987 | uint src = m68ki_read_16(ea);\r |
3988 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
3989 | \r |
3990 | m68ki_write_16(ea, res);\r |
3991 | \r |
3992 | FLAG_N = NFLAG_16(res);\r |
3993 | FLAG_Z = res;\r |
3994 | FLAG_X = FLAG_C = src >> 7;\r |
3995 | src &= 0xc000;\r |
3996 | FLAG_V = (!(src == 0 || src == 0xc000))<<7;\r |
3997 | }\r |
3998 | \r |
3999 | \r |
4000 | void m68k_op_asl_16_al(void)\r |
4001 | {\r |
4002 | uint ea = EA_AL_16();\r |
4003 | uint src = m68ki_read_16(ea);\r |
4004 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
4005 | \r |
4006 | m68ki_write_16(ea, res);\r |
4007 | \r |
4008 | FLAG_N = NFLAG_16(res);\r |
4009 | FLAG_Z = res;\r |
4010 | FLAG_X = FLAG_C = src >> 7;\r |
4011 | src &= 0xc000;\r |
4012 | FLAG_V = (!(src == 0 || src == 0xc000))<<7;\r |
4013 | }\r |
4014 | \r |
4015 | \r |
4016 | void m68k_op_bhi_8(void)\r |
4017 | {\r |
4018 | if(COND_HI())\r |
4019 | {\r |
4020 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4021 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4022 | return;\r |
4023 | }\r |
4024 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4025 | }\r |
4026 | \r |
4027 | \r |
4028 | void m68k_op_bls_8(void)\r |
4029 | {\r |
4030 | if(COND_LS())\r |
4031 | {\r |
4032 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4033 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4034 | return;\r |
4035 | }\r |
4036 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4037 | }\r |
4038 | \r |
4039 | \r |
4040 | void m68k_op_bcc_8(void)\r |
4041 | {\r |
4042 | if(COND_CC())\r |
4043 | {\r |
4044 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4045 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4046 | return;\r |
4047 | }\r |
4048 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4049 | }\r |
4050 | \r |
4051 | \r |
4052 | void m68k_op_bcs_8(void)\r |
4053 | {\r |
4054 | if(COND_CS())\r |
4055 | {\r |
4056 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4057 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4058 | return;\r |
4059 | }\r |
4060 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4061 | }\r |
4062 | \r |
4063 | \r |
4064 | void m68k_op_bne_8(void)\r |
4065 | {\r |
4066 | if(COND_NE())\r |
4067 | {\r |
4068 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4069 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4070 | return;\r |
4071 | }\r |
4072 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4073 | }\r |
4074 | \r |
4075 | \r |
4076 | void m68k_op_beq_8(void)\r |
4077 | {\r |
4078 | if(COND_EQ())\r |
4079 | {\r |
4080 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4081 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4082 | return;\r |
4083 | }\r |
4084 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4085 | }\r |
4086 | \r |
4087 | \r |
4088 | void m68k_op_bvc_8(void)\r |
4089 | {\r |
4090 | if(COND_VC())\r |
4091 | {\r |
4092 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4093 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4094 | return;\r |
4095 | }\r |
4096 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4097 | }\r |
4098 | \r |
4099 | \r |
4100 | void m68k_op_bvs_8(void)\r |
4101 | {\r |
4102 | if(COND_VS())\r |
4103 | {\r |
4104 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4105 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4106 | return;\r |
4107 | }\r |
4108 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4109 | }\r |
4110 | \r |
4111 | \r |
4112 | void m68k_op_bpl_8(void)\r |
4113 | {\r |
4114 | if(COND_PL())\r |
4115 | {\r |
4116 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4117 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4118 | return;\r |
4119 | }\r |
4120 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4121 | }\r |
4122 | \r |
4123 | \r |
4124 | void m68k_op_bmi_8(void)\r |
4125 | {\r |
4126 | if(COND_MI())\r |
4127 | {\r |
4128 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4129 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4130 | return;\r |
4131 | }\r |
4132 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4133 | }\r |
4134 | \r |
4135 | \r |
4136 | void m68k_op_bge_8(void)\r |
4137 | {\r |
4138 | if(COND_GE())\r |
4139 | {\r |
4140 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4141 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4142 | return;\r |
4143 | }\r |
4144 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4145 | }\r |
4146 | \r |
4147 | \r |
4148 | void m68k_op_blt_8(void)\r |
4149 | {\r |
4150 | if(COND_LT())\r |
4151 | {\r |
4152 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4153 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4154 | return;\r |
4155 | }\r |
4156 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4157 | }\r |
4158 | \r |
4159 | \r |
4160 | void m68k_op_bgt_8(void)\r |
4161 | {\r |
4162 | if(COND_GT())\r |
4163 | {\r |
4164 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4165 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4166 | return;\r |
4167 | }\r |
4168 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4169 | }\r |
4170 | \r |
4171 | \r |
4172 | void m68k_op_ble_8(void)\r |
4173 | {\r |
4174 | if(COND_LE())\r |
4175 | {\r |
4176 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4177 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4178 | return;\r |
4179 | }\r |
4180 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4181 | }\r |
4182 | \r |
4183 | \r |
4184 | void m68k_op_bhi_16(void)\r |
4185 | {\r |
4186 | if(COND_HI())\r |
4187 | {\r |
4188 | uint offset = OPER_I_16();\r |
4189 | REG_PC -= 2;\r |
4190 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4191 | m68ki_branch_16(offset);\r |
4192 | return;\r |
4193 | }\r |
4194 | REG_PC += 2;\r |
4195 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4196 | }\r |
4197 | \r |
4198 | \r |
4199 | void m68k_op_bls_16(void)\r |
4200 | {\r |
4201 | if(COND_LS())\r |
4202 | {\r |
4203 | uint offset = OPER_I_16();\r |
4204 | REG_PC -= 2;\r |
4205 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4206 | m68ki_branch_16(offset);\r |
4207 | return;\r |
4208 | }\r |
4209 | REG_PC += 2;\r |
4210 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4211 | }\r |
4212 | \r |
4213 | \r |
4214 | void m68k_op_bcc_16(void)\r |
4215 | {\r |
4216 | if(COND_CC())\r |
4217 | {\r |
4218 | uint offset = OPER_I_16();\r |
4219 | REG_PC -= 2;\r |
4220 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4221 | m68ki_branch_16(offset);\r |
4222 | return;\r |
4223 | }\r |
4224 | REG_PC += 2;\r |
4225 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4226 | }\r |
4227 | \r |
4228 | \r |
4229 | void m68k_op_bcs_16(void)\r |
4230 | {\r |
4231 | if(COND_CS())\r |
4232 | {\r |
4233 | uint offset = OPER_I_16();\r |
4234 | REG_PC -= 2;\r |
4235 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4236 | m68ki_branch_16(offset);\r |
4237 | return;\r |
4238 | }\r |
4239 | REG_PC += 2;\r |
4240 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4241 | }\r |
4242 | \r |
4243 | \r |
4244 | void m68k_op_bne_16(void)\r |
4245 | {\r |
4246 | if(COND_NE())\r |
4247 | {\r |
4248 | uint offset = OPER_I_16();\r |
4249 | REG_PC -= 2;\r |
4250 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4251 | m68ki_branch_16(offset);\r |
4252 | return;\r |
4253 | }\r |
4254 | REG_PC += 2;\r |
4255 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4256 | }\r |
4257 | \r |
4258 | \r |
4259 | void m68k_op_beq_16(void)\r |
4260 | {\r |
4261 | if(COND_EQ())\r |
4262 | {\r |
4263 | uint offset = OPER_I_16();\r |
4264 | REG_PC -= 2;\r |
4265 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4266 | m68ki_branch_16(offset);\r |
4267 | return;\r |
4268 | }\r |
4269 | REG_PC += 2;\r |
4270 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4271 | }\r |
4272 | \r |
4273 | \r |
4274 | void m68k_op_bvc_16(void)\r |
4275 | {\r |
4276 | if(COND_VC())\r |
4277 | {\r |
4278 | uint offset = OPER_I_16();\r |
4279 | REG_PC -= 2;\r |
4280 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4281 | m68ki_branch_16(offset);\r |
4282 | return;\r |
4283 | }\r |
4284 | REG_PC += 2;\r |
4285 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4286 | }\r |
4287 | \r |
4288 | \r |
4289 | void m68k_op_bvs_16(void)\r |
4290 | {\r |
4291 | if(COND_VS())\r |
4292 | {\r |
4293 | uint offset = OPER_I_16();\r |
4294 | REG_PC -= 2;\r |
4295 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4296 | m68ki_branch_16(offset);\r |
4297 | return;\r |
4298 | }\r |
4299 | REG_PC += 2;\r |
4300 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4301 | }\r |
4302 | \r |
4303 | \r |
4304 | void m68k_op_bpl_16(void)\r |
4305 | {\r |
4306 | if(COND_PL())\r |
4307 | {\r |
4308 | uint offset = OPER_I_16();\r |
4309 | REG_PC -= 2;\r |
4310 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4311 | m68ki_branch_16(offset);\r |
4312 | return;\r |
4313 | }\r |
4314 | REG_PC += 2;\r |
4315 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4316 | }\r |
4317 | \r |
4318 | \r |
4319 | void m68k_op_bmi_16(void)\r |
4320 | {\r |
4321 | if(COND_MI())\r |
4322 | {\r |
4323 | uint offset = OPER_I_16();\r |
4324 | REG_PC -= 2;\r |
4325 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4326 | m68ki_branch_16(offset);\r |
4327 | return;\r |
4328 | }\r |
4329 | REG_PC += 2;\r |
4330 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4331 | }\r |
4332 | \r |
4333 | \r |
4334 | void m68k_op_bge_16(void)\r |
4335 | {\r |
4336 | if(COND_GE())\r |
4337 | {\r |
4338 | uint offset = OPER_I_16();\r |
4339 | REG_PC -= 2;\r |
4340 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4341 | m68ki_branch_16(offset);\r |
4342 | return;\r |
4343 | }\r |
4344 | REG_PC += 2;\r |
4345 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4346 | }\r |
4347 | \r |
4348 | \r |
4349 | void m68k_op_blt_16(void)\r |
4350 | {\r |
4351 | if(COND_LT())\r |
4352 | {\r |
4353 | uint offset = OPER_I_16();\r |
4354 | REG_PC -= 2;\r |
4355 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4356 | m68ki_branch_16(offset);\r |
4357 | return;\r |
4358 | }\r |
4359 | REG_PC += 2;\r |
4360 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4361 | }\r |
4362 | \r |
4363 | \r |
4364 | void m68k_op_bgt_16(void)\r |
4365 | {\r |
4366 | if(COND_GT())\r |
4367 | {\r |
4368 | uint offset = OPER_I_16();\r |
4369 | REG_PC -= 2;\r |
4370 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4371 | m68ki_branch_16(offset);\r |
4372 | return;\r |
4373 | }\r |
4374 | REG_PC += 2;\r |
4375 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4376 | }\r |
4377 | \r |
4378 | \r |
4379 | void m68k_op_ble_16(void)\r |
4380 | {\r |
4381 | if(COND_LE())\r |
4382 | {\r |
4383 | uint offset = OPER_I_16();\r |
4384 | REG_PC -= 2;\r |
4385 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4386 | m68ki_branch_16(offset);\r |
4387 | return;\r |
4388 | }\r |
4389 | REG_PC += 2;\r |
4390 | USE_CYCLES(CYC_BCC_NOTAKE_W);\r |
4391 | }\r |
4392 | \r |
4393 | \r |
4394 | void m68k_op_bhi_32(void)\r |
4395 | {\r |
4396 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4397 | {\r |
4398 | if(COND_HI())\r |
4399 | {\r |
4400 | uint offset = OPER_I_32();\r |
4401 | REG_PC -= 4;\r |
4402 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4403 | m68ki_branch_32(offset);\r |
4404 | return;\r |
4405 | }\r |
4406 | REG_PC += 4;\r |
4407 | return;\r |
4408 | }\r |
4409 | else\r |
4410 | {\r |
4411 | if(COND_HI())\r |
4412 | {\r |
4413 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4414 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4415 | return;\r |
4416 | }\r |
4417 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4418 | }\r |
4419 | }\r |
4420 | \r |
4421 | \r |
4422 | void m68k_op_bls_32(void)\r |
4423 | {\r |
4424 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4425 | {\r |
4426 | if(COND_LS())\r |
4427 | {\r |
4428 | uint offset = OPER_I_32();\r |
4429 | REG_PC -= 4;\r |
4430 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4431 | m68ki_branch_32(offset);\r |
4432 | return;\r |
4433 | }\r |
4434 | REG_PC += 4;\r |
4435 | return;\r |
4436 | }\r |
4437 | else\r |
4438 | {\r |
4439 | if(COND_LS())\r |
4440 | {\r |
4441 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4442 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4443 | return;\r |
4444 | }\r |
4445 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4446 | }\r |
4447 | }\r |
4448 | \r |
4449 | \r |
4450 | void m68k_op_bcc_32(void)\r |
4451 | {\r |
4452 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4453 | {\r |
4454 | if(COND_CC())\r |
4455 | {\r |
4456 | uint offset = OPER_I_32();\r |
4457 | REG_PC -= 4;\r |
4458 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4459 | m68ki_branch_32(offset);\r |
4460 | return;\r |
4461 | }\r |
4462 | REG_PC += 4;\r |
4463 | return;\r |
4464 | }\r |
4465 | else\r |
4466 | {\r |
4467 | if(COND_CC())\r |
4468 | {\r |
4469 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4470 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4471 | return;\r |
4472 | }\r |
4473 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4474 | }\r |
4475 | }\r |
4476 | \r |
4477 | \r |
4478 | void m68k_op_bcs_32(void)\r |
4479 | {\r |
4480 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4481 | {\r |
4482 | if(COND_CS())\r |
4483 | {\r |
4484 | uint offset = OPER_I_32();\r |
4485 | REG_PC -= 4;\r |
4486 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4487 | m68ki_branch_32(offset);\r |
4488 | return;\r |
4489 | }\r |
4490 | REG_PC += 4;\r |
4491 | return;\r |
4492 | }\r |
4493 | else\r |
4494 | {\r |
4495 | if(COND_CS())\r |
4496 | {\r |
4497 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4498 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4499 | return;\r |
4500 | }\r |
4501 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4502 | }\r |
4503 | }\r |
4504 | \r |
4505 | \r |
4506 | void m68k_op_bne_32(void)\r |
4507 | {\r |
4508 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4509 | {\r |
4510 | if(COND_NE())\r |
4511 | {\r |
4512 | uint offset = OPER_I_32();\r |
4513 | REG_PC -= 4;\r |
4514 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4515 | m68ki_branch_32(offset);\r |
4516 | return;\r |
4517 | }\r |
4518 | REG_PC += 4;\r |
4519 | return;\r |
4520 | }\r |
4521 | else\r |
4522 | {\r |
4523 | if(COND_NE())\r |
4524 | {\r |
4525 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4526 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4527 | return;\r |
4528 | }\r |
4529 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4530 | }\r |
4531 | }\r |
4532 | \r |
4533 | \r |
4534 | void m68k_op_beq_32(void)\r |
4535 | {\r |
4536 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4537 | {\r |
4538 | if(COND_EQ())\r |
4539 | {\r |
4540 | uint offset = OPER_I_32();\r |
4541 | REG_PC -= 4;\r |
4542 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4543 | m68ki_branch_32(offset);\r |
4544 | return;\r |
4545 | }\r |
4546 | REG_PC += 4;\r |
4547 | return;\r |
4548 | }\r |
4549 | else\r |
4550 | {\r |
4551 | if(COND_EQ())\r |
4552 | {\r |
4553 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4554 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4555 | return;\r |
4556 | }\r |
4557 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4558 | }\r |
4559 | }\r |
4560 | \r |
4561 | \r |
4562 | void m68k_op_bvc_32(void)\r |
4563 | {\r |
4564 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4565 | {\r |
4566 | if(COND_VC())\r |
4567 | {\r |
4568 | uint offset = OPER_I_32();\r |
4569 | REG_PC -= 4;\r |
4570 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4571 | m68ki_branch_32(offset);\r |
4572 | return;\r |
4573 | }\r |
4574 | REG_PC += 4;\r |
4575 | return;\r |
4576 | }\r |
4577 | else\r |
4578 | {\r |
4579 | if(COND_VC())\r |
4580 | {\r |
4581 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4582 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4583 | return;\r |
4584 | }\r |
4585 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4586 | }\r |
4587 | }\r |
4588 | \r |
4589 | \r |
4590 | void m68k_op_bvs_32(void)\r |
4591 | {\r |
4592 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4593 | {\r |
4594 | if(COND_VS())\r |
4595 | {\r |
4596 | uint offset = OPER_I_32();\r |
4597 | REG_PC -= 4;\r |
4598 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4599 | m68ki_branch_32(offset);\r |
4600 | return;\r |
4601 | }\r |
4602 | REG_PC += 4;\r |
4603 | return;\r |
4604 | }\r |
4605 | else\r |
4606 | {\r |
4607 | if(COND_VS())\r |
4608 | {\r |
4609 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4610 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4611 | return;\r |
4612 | }\r |
4613 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4614 | }\r |
4615 | }\r |
4616 | \r |
4617 | \r |
4618 | void m68k_op_bpl_32(void)\r |
4619 | {\r |
4620 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4621 | {\r |
4622 | if(COND_PL())\r |
4623 | {\r |
4624 | uint offset = OPER_I_32();\r |
4625 | REG_PC -= 4;\r |
4626 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4627 | m68ki_branch_32(offset);\r |
4628 | return;\r |
4629 | }\r |
4630 | REG_PC += 4;\r |
4631 | return;\r |
4632 | }\r |
4633 | else\r |
4634 | {\r |
4635 | if(COND_PL())\r |
4636 | {\r |
4637 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4638 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4639 | return;\r |
4640 | }\r |
4641 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4642 | }\r |
4643 | }\r |
4644 | \r |
4645 | \r |
4646 | void m68k_op_bmi_32(void)\r |
4647 | {\r |
4648 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4649 | {\r |
4650 | if(COND_MI())\r |
4651 | {\r |
4652 | uint offset = OPER_I_32();\r |
4653 | REG_PC -= 4;\r |
4654 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4655 | m68ki_branch_32(offset);\r |
4656 | return;\r |
4657 | }\r |
4658 | REG_PC += 4;\r |
4659 | return;\r |
4660 | }\r |
4661 | else\r |
4662 | {\r |
4663 | if(COND_MI())\r |
4664 | {\r |
4665 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4666 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4667 | return;\r |
4668 | }\r |
4669 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4670 | }\r |
4671 | }\r |
4672 | \r |
4673 | \r |
4674 | void m68k_op_bge_32(void)\r |
4675 | {\r |
4676 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4677 | {\r |
4678 | if(COND_GE())\r |
4679 | {\r |
4680 | uint offset = OPER_I_32();\r |
4681 | REG_PC -= 4;\r |
4682 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4683 | m68ki_branch_32(offset);\r |
4684 | return;\r |
4685 | }\r |
4686 | REG_PC += 4;\r |
4687 | return;\r |
4688 | }\r |
4689 | else\r |
4690 | {\r |
4691 | if(COND_GE())\r |
4692 | {\r |
4693 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4694 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4695 | return;\r |
4696 | }\r |
4697 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4698 | }\r |
4699 | }\r |
4700 | \r |
4701 | \r |
4702 | void m68k_op_blt_32(void)\r |
4703 | {\r |
4704 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4705 | {\r |
4706 | if(COND_LT())\r |
4707 | {\r |
4708 | uint offset = OPER_I_32();\r |
4709 | REG_PC -= 4;\r |
4710 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4711 | m68ki_branch_32(offset);\r |
4712 | return;\r |
4713 | }\r |
4714 | REG_PC += 4;\r |
4715 | return;\r |
4716 | }\r |
4717 | else\r |
4718 | {\r |
4719 | if(COND_LT())\r |
4720 | {\r |
4721 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4722 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4723 | return;\r |
4724 | }\r |
4725 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4726 | }\r |
4727 | }\r |
4728 | \r |
4729 | \r |
4730 | void m68k_op_bgt_32(void)\r |
4731 | {\r |
4732 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4733 | {\r |
4734 | if(COND_GT())\r |
4735 | {\r |
4736 | uint offset = OPER_I_32();\r |
4737 | REG_PC -= 4;\r |
4738 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4739 | m68ki_branch_32(offset);\r |
4740 | return;\r |
4741 | }\r |
4742 | REG_PC += 4;\r |
4743 | return;\r |
4744 | }\r |
4745 | else\r |
4746 | {\r |
4747 | if(COND_GT())\r |
4748 | {\r |
4749 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4750 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4751 | return;\r |
4752 | }\r |
4753 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4754 | }\r |
4755 | }\r |
4756 | \r |
4757 | \r |
4758 | void m68k_op_ble_32(void)\r |
4759 | {\r |
4760 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4761 | {\r |
4762 | if(COND_LE())\r |
4763 | {\r |
4764 | uint offset = OPER_I_32();\r |
4765 | REG_PC -= 4;\r |
4766 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4767 | m68ki_branch_32(offset);\r |
4768 | return;\r |
4769 | }\r |
4770 | REG_PC += 4;\r |
4771 | return;\r |
4772 | }\r |
4773 | else\r |
4774 | {\r |
4775 | if(COND_LE())\r |
4776 | {\r |
4777 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4778 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
4779 | return;\r |
4780 | }\r |
4781 | USE_CYCLES(CYC_BCC_NOTAKE_B);\r |
4782 | }\r |
4783 | }\r |
4784 | \r |
4785 | \r |
4786 | void m68k_op_bchg_32_r_d(void)\r |
4787 | {\r |
4788 | uint* r_dst = &DY;\r |
4789 | uint mask = 1 << (DX & 0x1f);\r |
4790 | \r |
4791 | FLAG_Z = *r_dst & mask;\r |
4792 | *r_dst ^= mask;\r |
4793 | }\r |
4794 | \r |
4795 | \r |
4796 | void m68k_op_bchg_8_r_ai(void)\r |
4797 | {\r |
4798 | uint ea = EA_AY_AI_8();\r |
4799 | uint src = m68ki_read_8(ea);\r |
4800 | uint mask = 1 << (DX & 7);\r |
4801 | \r |
4802 | FLAG_Z = src & mask;\r |
4803 | m68ki_write_8(ea, src ^ mask);\r |
4804 | }\r |
4805 | \r |
4806 | \r |
4807 | void m68k_op_bchg_8_r_pi(void)\r |
4808 | {\r |
4809 | uint ea = EA_AY_PI_8();\r |
4810 | uint src = m68ki_read_8(ea);\r |
4811 | uint mask = 1 << (DX & 7);\r |
4812 | \r |
4813 | FLAG_Z = src & mask;\r |
4814 | m68ki_write_8(ea, src ^ mask);\r |
4815 | }\r |
4816 | \r |
4817 | \r |
4818 | void m68k_op_bchg_8_r_pi7(void)\r |
4819 | {\r |
4820 | uint ea = EA_A7_PI_8();\r |
4821 | uint src = m68ki_read_8(ea);\r |
4822 | uint mask = 1 << (DX & 7);\r |
4823 | \r |
4824 | FLAG_Z = src & mask;\r |
4825 | m68ki_write_8(ea, src ^ mask);\r |
4826 | }\r |
4827 | \r |
4828 | \r |
4829 | void m68k_op_bchg_8_r_pd(void)\r |
4830 | {\r |
4831 | uint ea = EA_AY_PD_8();\r |
4832 | uint src = m68ki_read_8(ea);\r |
4833 | uint mask = 1 << (DX & 7);\r |
4834 | \r |
4835 | FLAG_Z = src & mask;\r |
4836 | m68ki_write_8(ea, src ^ mask);\r |
4837 | }\r |
4838 | \r |
4839 | \r |
4840 | void m68k_op_bchg_8_r_pd7(void)\r |
4841 | {\r |
4842 | uint ea = EA_A7_PD_8();\r |
4843 | uint src = m68ki_read_8(ea);\r |
4844 | uint mask = 1 << (DX & 7);\r |
4845 | \r |
4846 | FLAG_Z = src & mask;\r |
4847 | m68ki_write_8(ea, src ^ mask);\r |
4848 | }\r |
4849 | \r |
4850 | \r |
4851 | void m68k_op_bchg_8_r_di(void)\r |
4852 | {\r |
4853 | uint ea = EA_AY_DI_8();\r |
4854 | uint src = m68ki_read_8(ea);\r |
4855 | uint mask = 1 << (DX & 7);\r |
4856 | \r |
4857 | FLAG_Z = src & mask;\r |
4858 | m68ki_write_8(ea, src ^ mask);\r |
4859 | }\r |
4860 | \r |
4861 | \r |
4862 | void m68k_op_bchg_8_r_ix(void)\r |
4863 | {\r |
4864 | uint ea = EA_AY_IX_8();\r |
4865 | uint src = m68ki_read_8(ea);\r |
4866 | uint mask = 1 << (DX & 7);\r |
4867 | \r |
4868 | FLAG_Z = src & mask;\r |
4869 | m68ki_write_8(ea, src ^ mask);\r |
4870 | }\r |
4871 | \r |
4872 | \r |
4873 | void m68k_op_bchg_8_r_aw(void)\r |
4874 | {\r |
4875 | uint ea = EA_AW_8();\r |
4876 | uint src = m68ki_read_8(ea);\r |
4877 | uint mask = 1 << (DX & 7);\r |
4878 | \r |
4879 | FLAG_Z = src & mask;\r |
4880 | m68ki_write_8(ea, src ^ mask);\r |
4881 | }\r |
4882 | \r |
4883 | \r |
4884 | void m68k_op_bchg_8_r_al(void)\r |
4885 | {\r |
4886 | uint ea = EA_AL_8();\r |
4887 | uint src = m68ki_read_8(ea);\r |
4888 | uint mask = 1 << (DX & 7);\r |
4889 | \r |
4890 | FLAG_Z = src & mask;\r |
4891 | m68ki_write_8(ea, src ^ mask);\r |
4892 | }\r |
4893 | \r |
4894 | \r |
4895 | void m68k_op_bchg_32_s_d(void)\r |
4896 | {\r |
4897 | uint* r_dst = &DY;\r |
4898 | uint mask = 1 << (OPER_I_8() & 0x1f);\r |
4899 | \r |
4900 | FLAG_Z = *r_dst & mask;\r |
4901 | *r_dst ^= mask;\r |
4902 | }\r |
4903 | \r |
4904 | \r |
4905 | void m68k_op_bchg_8_s_ai(void)\r |
4906 | {\r |
4907 | uint mask = 1 << (OPER_I_8() & 7);\r |
4908 | uint ea = EA_AY_AI_8();\r |
4909 | uint src = m68ki_read_8(ea);\r |
4910 | \r |
4911 | FLAG_Z = src & mask;\r |
4912 | m68ki_write_8(ea, src ^ mask);\r |
4913 | }\r |
4914 | \r |
4915 | \r |
4916 | void m68k_op_bchg_8_s_pi(void)\r |
4917 | {\r |
4918 | uint mask = 1 << (OPER_I_8() & 7);\r |
4919 | uint ea = EA_AY_PI_8();\r |
4920 | uint src = m68ki_read_8(ea);\r |
4921 | \r |
4922 | FLAG_Z = src & mask;\r |
4923 | m68ki_write_8(ea, src ^ mask);\r |
4924 | }\r |
4925 | \r |
4926 | \r |
4927 | void m68k_op_bchg_8_s_pi7(void)\r |
4928 | {\r |
4929 | uint mask = 1 << (OPER_I_8() & 7);\r |
4930 | uint ea = EA_A7_PI_8();\r |
4931 | uint src = m68ki_read_8(ea);\r |
4932 | \r |
4933 | FLAG_Z = src & mask;\r |
4934 | m68ki_write_8(ea, src ^ mask);\r |
4935 | }\r |
4936 | \r |
4937 | \r |
4938 | void m68k_op_bchg_8_s_pd(void)\r |
4939 | {\r |
4940 | uint mask = 1 << (OPER_I_8() & 7);\r |
4941 | uint ea = EA_AY_PD_8();\r |
4942 | uint src = m68ki_read_8(ea);\r |
4943 | \r |
4944 | FLAG_Z = src & mask;\r |
4945 | m68ki_write_8(ea, src ^ mask);\r |
4946 | }\r |
4947 | \r |
4948 | \r |
4949 | void m68k_op_bchg_8_s_pd7(void)\r |
4950 | {\r |
4951 | uint mask = 1 << (OPER_I_8() & 7);\r |
4952 | uint ea = EA_A7_PD_8();\r |
4953 | uint src = m68ki_read_8(ea);\r |
4954 | \r |
4955 | FLAG_Z = src & mask;\r |
4956 | m68ki_write_8(ea, src ^ mask);\r |
4957 | }\r |
4958 | \r |
4959 | \r |
4960 | void m68k_op_bchg_8_s_di(void)\r |
4961 | {\r |
4962 | uint mask = 1 << (OPER_I_8() & 7);\r |
4963 | uint ea = EA_AY_DI_8();\r |
4964 | uint src = m68ki_read_8(ea);\r |
4965 | \r |
4966 | FLAG_Z = src & mask;\r |
4967 | m68ki_write_8(ea, src ^ mask);\r |
4968 | }\r |
4969 | \r |
4970 | \r |
4971 | void m68k_op_bchg_8_s_ix(void)\r |
4972 | {\r |
4973 | uint mask = 1 << (OPER_I_8() & 7);\r |
4974 | uint ea = EA_AY_IX_8();\r |
4975 | uint src = m68ki_read_8(ea);\r |
4976 | \r |
4977 | FLAG_Z = src & mask;\r |
4978 | m68ki_write_8(ea, src ^ mask);\r |
4979 | }\r |
4980 | \r |
4981 | \r |
4982 | void m68k_op_bchg_8_s_aw(void)\r |
4983 | {\r |
4984 | uint mask = 1 << (OPER_I_8() & 7);\r |
4985 | uint ea = EA_AW_8();\r |
4986 | uint src = m68ki_read_8(ea);\r |
4987 | \r |
4988 | FLAG_Z = src & mask;\r |
4989 | m68ki_write_8(ea, src ^ mask);\r |
4990 | }\r |
4991 | \r |
4992 | \r |
4993 | void m68k_op_bchg_8_s_al(void)\r |
4994 | {\r |
4995 | uint mask = 1 << (OPER_I_8() & 7);\r |
4996 | uint ea = EA_AL_8();\r |
4997 | uint src = m68ki_read_8(ea);\r |
4998 | \r |
4999 | FLAG_Z = src & mask;\r |
5000 | m68ki_write_8(ea, src ^ mask);\r |
5001 | }\r |
5002 | \r |
5003 | \r |
5004 | void m68k_op_bclr_32_r_d(void)\r |
5005 | {\r |
5006 | uint* r_dst = &DY;\r |
5007 | uint mask = 1 << (DX & 0x1f);\r |
5008 | \r |
5009 | FLAG_Z = *r_dst & mask;\r |
5010 | *r_dst &= ~mask;\r |
5011 | }\r |
5012 | \r |
5013 | \r |
5014 | void m68k_op_bclr_8_r_ai(void)\r |
5015 | {\r |
5016 | uint ea = EA_AY_AI_8();\r |
5017 | uint src = m68ki_read_8(ea);\r |
5018 | uint mask = 1 << (DX & 7);\r |
5019 | \r |
5020 | FLAG_Z = src & mask;\r |
5021 | m68ki_write_8(ea, src & ~mask);\r |
5022 | }\r |
5023 | \r |
5024 | \r |
5025 | void m68k_op_bclr_8_r_pi(void)\r |
5026 | {\r |
5027 | uint ea = EA_AY_PI_8();\r |
5028 | uint src = m68ki_read_8(ea);\r |
5029 | uint mask = 1 << (DX & 7);\r |
5030 | \r |
5031 | FLAG_Z = src & mask;\r |
5032 | m68ki_write_8(ea, src & ~mask);\r |
5033 | }\r |
5034 | \r |
5035 | \r |
5036 | void m68k_op_bclr_8_r_pi7(void)\r |
5037 | {\r |
5038 | uint ea = EA_A7_PI_8();\r |
5039 | uint src = m68ki_read_8(ea);\r |
5040 | uint mask = 1 << (DX & 7);\r |
5041 | \r |
5042 | FLAG_Z = src & mask;\r |
5043 | m68ki_write_8(ea, src & ~mask);\r |
5044 | }\r |
5045 | \r |
5046 | \r |
5047 | void m68k_op_bclr_8_r_pd(void)\r |
5048 | {\r |
5049 | uint ea = EA_AY_PD_8();\r |
5050 | uint src = m68ki_read_8(ea);\r |
5051 | uint mask = 1 << (DX & 7);\r |
5052 | \r |
5053 | FLAG_Z = src & mask;\r |
5054 | m68ki_write_8(ea, src & ~mask);\r |
5055 | }\r |
5056 | \r |
5057 | \r |
5058 | void m68k_op_bclr_8_r_pd7(void)\r |
5059 | {\r |
5060 | uint ea = EA_A7_PD_8();\r |
5061 | uint src = m68ki_read_8(ea);\r |
5062 | uint mask = 1 << (DX & 7);\r |
5063 | \r |
5064 | FLAG_Z = src & mask;\r |
5065 | m68ki_write_8(ea, src & ~mask);\r |
5066 | }\r |
5067 | \r |
5068 | \r |
5069 | void m68k_op_bclr_8_r_di(void)\r |
5070 | {\r |
5071 | uint ea = EA_AY_DI_8();\r |
5072 | uint src = m68ki_read_8(ea);\r |
5073 | uint mask = 1 << (DX & 7);\r |
5074 | \r |
5075 | FLAG_Z = src & mask;\r |
5076 | m68ki_write_8(ea, src & ~mask);\r |
5077 | }\r |
5078 | \r |
5079 | \r |
5080 | void m68k_op_bclr_8_r_ix(void)\r |
5081 | {\r |
5082 | uint ea = EA_AY_IX_8();\r |
5083 | uint src = m68ki_read_8(ea);\r |
5084 | uint mask = 1 << (DX & 7);\r |
5085 | \r |
5086 | FLAG_Z = src & mask;\r |
5087 | m68ki_write_8(ea, src & ~mask);\r |
5088 | }\r |
5089 | \r |
5090 | \r |
5091 | void m68k_op_bclr_8_r_aw(void)\r |
5092 | {\r |
5093 | uint ea = EA_AW_8();\r |
5094 | uint src = m68ki_read_8(ea);\r |
5095 | uint mask = 1 << (DX & 7);\r |
5096 | \r |
5097 | FLAG_Z = src & mask;\r |
5098 | m68ki_write_8(ea, src & ~mask);\r |
5099 | }\r |
5100 | \r |
5101 | \r |
5102 | void m68k_op_bclr_8_r_al(void)\r |
5103 | {\r |
5104 | uint ea = EA_AL_8();\r |
5105 | uint src = m68ki_read_8(ea);\r |
5106 | uint mask = 1 << (DX & 7);\r |
5107 | \r |
5108 | FLAG_Z = src & mask;\r |
5109 | m68ki_write_8(ea, src & ~mask);\r |
5110 | }\r |
5111 | \r |
5112 | \r |
5113 | void m68k_op_bclr_32_s_d(void)\r |
5114 | {\r |
5115 | uint* r_dst = &DY;\r |
5116 | uint mask = 1 << (OPER_I_8() & 0x1f);\r |
5117 | \r |
5118 | FLAG_Z = *r_dst & mask;\r |
5119 | *r_dst &= ~mask;\r |
5120 | }\r |
5121 | \r |
5122 | \r |
5123 | void m68k_op_bclr_8_s_ai(void)\r |
5124 | {\r |
5125 | uint mask = 1 << (OPER_I_8() & 7);\r |
5126 | uint ea = EA_AY_AI_8();\r |
5127 | uint src = m68ki_read_8(ea);\r |
5128 | \r |
5129 | FLAG_Z = src & mask;\r |
5130 | m68ki_write_8(ea, src & ~mask);\r |
5131 | }\r |
5132 | \r |
5133 | \r |
5134 | void m68k_op_bclr_8_s_pi(void)\r |
5135 | {\r |
5136 | uint mask = 1 << (OPER_I_8() & 7);\r |
5137 | uint ea = EA_AY_PI_8();\r |
5138 | uint src = m68ki_read_8(ea);\r |
5139 | \r |
5140 | FLAG_Z = src & mask;\r |
5141 | m68ki_write_8(ea, src & ~mask);\r |
5142 | }\r |
5143 | \r |
5144 | \r |
5145 | void m68k_op_bclr_8_s_pi7(void)\r |
5146 | {\r |
5147 | uint mask = 1 << (OPER_I_8() & 7);\r |
5148 | uint ea = EA_A7_PI_8();\r |
5149 | uint src = m68ki_read_8(ea);\r |
5150 | \r |
5151 | FLAG_Z = src & mask;\r |
5152 | m68ki_write_8(ea, src & ~mask);\r |
5153 | }\r |
5154 | \r |
5155 | \r |
5156 | void m68k_op_bclr_8_s_pd(void)\r |
5157 | {\r |
5158 | uint mask = 1 << (OPER_I_8() & 7);\r |
5159 | uint ea = EA_AY_PD_8();\r |
5160 | uint src = m68ki_read_8(ea);\r |
5161 | \r |
5162 | FLAG_Z = src & mask;\r |
5163 | m68ki_write_8(ea, src & ~mask);\r |
5164 | }\r |
5165 | \r |
5166 | \r |
5167 | void m68k_op_bclr_8_s_pd7(void)\r |
5168 | {\r |
5169 | uint mask = 1 << (OPER_I_8() & 7);\r |
5170 | uint ea = EA_A7_PD_8();\r |
5171 | uint src = m68ki_read_8(ea);\r |
5172 | \r |
5173 | FLAG_Z = src & mask;\r |
5174 | m68ki_write_8(ea, src & ~mask);\r |
5175 | }\r |
5176 | \r |
5177 | \r |
5178 | void m68k_op_bclr_8_s_di(void)\r |
5179 | {\r |
5180 | uint mask = 1 << (OPER_I_8() & 7);\r |
5181 | uint ea = EA_AY_DI_8();\r |
5182 | uint src = m68ki_read_8(ea);\r |
5183 | \r |
5184 | FLAG_Z = src & mask;\r |
5185 | m68ki_write_8(ea, src & ~mask);\r |
5186 | }\r |
5187 | \r |
5188 | \r |
5189 | void m68k_op_bclr_8_s_ix(void)\r |
5190 | {\r |
5191 | uint mask = 1 << (OPER_I_8() & 7);\r |
5192 | uint ea = EA_AY_IX_8();\r |
5193 | uint src = m68ki_read_8(ea);\r |
5194 | \r |
5195 | FLAG_Z = src & mask;\r |
5196 | m68ki_write_8(ea, src & ~mask);\r |
5197 | }\r |
5198 | \r |
5199 | \r |
5200 | void m68k_op_bclr_8_s_aw(void)\r |
5201 | {\r |
5202 | uint mask = 1 << (OPER_I_8() & 7);\r |
5203 | uint ea = EA_AW_8();\r |
5204 | uint src = m68ki_read_8(ea);\r |
5205 | \r |
5206 | FLAG_Z = src & mask;\r |
5207 | m68ki_write_8(ea, src & ~mask);\r |
5208 | }\r |
5209 | \r |
5210 | \r |
5211 | void m68k_op_bclr_8_s_al(void)\r |
5212 | {\r |
5213 | uint mask = 1 << (OPER_I_8() & 7);\r |
5214 | uint ea = EA_AL_8();\r |
5215 | uint src = m68ki_read_8(ea);\r |
5216 | \r |
5217 | FLAG_Z = src & mask;\r |
5218 | m68ki_write_8(ea, src & ~mask);\r |
5219 | }\r |
5220 | \r |
5221 | \r |
5222 | void m68k_op_bfchg_32_d(void)\r |
5223 | {\r |
5224 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5225 | {\r |
5226 | uint word2 = OPER_I_16();\r |
5227 | uint offset = (word2>>6)&31;\r |
5228 | uint width = word2;\r |
5229 | uint* data = &DY;\r |
5230 | uint64 mask;\r |
5231 | \r |
5232 | \r |
5233 | if(BIT_B(word2))\r |
5234 | offset = REG_D[offset&7];\r |
5235 | if(BIT_5(word2))\r |
5236 | width = REG_D[width&7];\r |
5237 | \r |
5238 | offset &= 31;\r |
5239 | width = ((width-1) & 31) + 1;\r |
5240 | \r |
5241 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5242 | mask = ROR_32(mask, offset);\r |
5243 | \r |
5244 | FLAG_N = NFLAG_32(*data<<offset);\r |
5245 | FLAG_Z = *data & mask;\r |
5246 | FLAG_V = VFLAG_CLEAR;\r |
5247 | FLAG_C = CFLAG_CLEAR;\r |
5248 | \r |
5249 | *data ^= mask;\r |
5250 | \r |
5251 | return;\r |
5252 | }\r |
5253 | m68ki_exception_illegal();\r |
5254 | }\r |
5255 | \r |
5256 | \r |
5257 | void m68k_op_bfchg_32_ai(void)\r |
5258 | {\r |
5259 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5260 | {\r |
5261 | uint word2 = OPER_I_16();\r |
5262 | sint offset = (word2>>6)&31;\r |
5263 | uint width = word2;\r |
5264 | uint mask_base;\r |
5265 | uint data_long;\r |
5266 | uint mask_long;\r |
5267 | uint data_byte = 0;\r |
5268 | uint mask_byte = 0;\r |
5269 | uint ea = EA_AY_AI_8();\r |
5270 | \r |
5271 | \r |
5272 | if(BIT_B(word2))\r |
5273 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5274 | if(BIT_5(word2))\r |
5275 | width = REG_D[width&7];\r |
5276 | \r |
5277 | /* Offset is signed so we have to use ugly math =( */\r |
5278 | ea += offset / 8;\r |
5279 | offset %= 8;\r |
5280 | if(offset < 0)\r |
5281 | {\r |
5282 | offset += 8;\r |
5283 | ea--;\r |
5284 | }\r |
5285 | width = ((width-1) & 31) + 1;\r |
5286 | \r |
5287 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5288 | mask_long = mask_base >> offset;\r |
5289 | \r |
5290 | data_long = m68ki_read_32(ea);\r |
5291 | FLAG_N = NFLAG_32(data_long << offset);\r |
5292 | FLAG_Z = data_long & mask_long;\r |
5293 | FLAG_V = VFLAG_CLEAR;\r |
5294 | FLAG_C = CFLAG_CLEAR;\r |
5295 | \r |
5296 | m68ki_write_32(ea, data_long ^ mask_long);\r |
5297 | \r |
5298 | if((width + offset) > 32)\r |
5299 | {\r |
5300 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5301 | data_byte = m68ki_read_8(ea+4);\r |
5302 | FLAG_Z |= (data_byte & mask_byte);\r |
5303 | m68ki_write_8(ea+4, data_byte ^ mask_byte);\r |
5304 | }\r |
5305 | return;\r |
5306 | }\r |
5307 | m68ki_exception_illegal();\r |
5308 | }\r |
5309 | \r |
5310 | \r |
5311 | void m68k_op_bfchg_32_di(void)\r |
5312 | {\r |
5313 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5314 | {\r |
5315 | uint word2 = OPER_I_16();\r |
5316 | sint offset = (word2>>6)&31;\r |
5317 | uint width = word2;\r |
5318 | uint mask_base;\r |
5319 | uint data_long;\r |
5320 | uint mask_long;\r |
5321 | uint data_byte = 0;\r |
5322 | uint mask_byte = 0;\r |
5323 | uint ea = EA_AY_DI_8();\r |
5324 | \r |
5325 | \r |
5326 | if(BIT_B(word2))\r |
5327 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5328 | if(BIT_5(word2))\r |
5329 | width = REG_D[width&7];\r |
5330 | \r |
5331 | /* Offset is signed so we have to use ugly math =( */\r |
5332 | ea += offset / 8;\r |
5333 | offset %= 8;\r |
5334 | if(offset < 0)\r |
5335 | {\r |
5336 | offset += 8;\r |
5337 | ea--;\r |
5338 | }\r |
5339 | width = ((width-1) & 31) + 1;\r |
5340 | \r |
5341 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5342 | mask_long = mask_base >> offset;\r |
5343 | \r |
5344 | data_long = m68ki_read_32(ea);\r |
5345 | FLAG_N = NFLAG_32(data_long << offset);\r |
5346 | FLAG_Z = data_long & mask_long;\r |
5347 | FLAG_V = VFLAG_CLEAR;\r |
5348 | FLAG_C = CFLAG_CLEAR;\r |
5349 | \r |
5350 | m68ki_write_32(ea, data_long ^ mask_long);\r |
5351 | \r |
5352 | if((width + offset) > 32)\r |
5353 | {\r |
5354 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5355 | data_byte = m68ki_read_8(ea+4);\r |
5356 | FLAG_Z |= (data_byte & mask_byte);\r |
5357 | m68ki_write_8(ea+4, data_byte ^ mask_byte);\r |
5358 | }\r |
5359 | return;\r |
5360 | }\r |
5361 | m68ki_exception_illegal();\r |
5362 | }\r |
5363 | \r |
5364 | \r |
5365 | void m68k_op_bfchg_32_ix(void)\r |
5366 | {\r |
5367 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5368 | {\r |
5369 | uint word2 = OPER_I_16();\r |
5370 | sint offset = (word2>>6)&31;\r |
5371 | uint width = word2;\r |
5372 | uint mask_base;\r |
5373 | uint data_long;\r |
5374 | uint mask_long;\r |
5375 | uint data_byte = 0;\r |
5376 | uint mask_byte = 0;\r |
5377 | uint ea = EA_AY_IX_8();\r |
5378 | \r |
5379 | \r |
5380 | if(BIT_B(word2))\r |
5381 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5382 | if(BIT_5(word2))\r |
5383 | width = REG_D[width&7];\r |
5384 | \r |
5385 | /* Offset is signed so we have to use ugly math =( */\r |
5386 | ea += offset / 8;\r |
5387 | offset %= 8;\r |
5388 | if(offset < 0)\r |
5389 | {\r |
5390 | offset += 8;\r |
5391 | ea--;\r |
5392 | }\r |
5393 | width = ((width-1) & 31) + 1;\r |
5394 | \r |
5395 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5396 | mask_long = mask_base >> offset;\r |
5397 | \r |
5398 | data_long = m68ki_read_32(ea);\r |
5399 | FLAG_N = NFLAG_32(data_long << offset);\r |
5400 | FLAG_Z = data_long & mask_long;\r |
5401 | FLAG_V = VFLAG_CLEAR;\r |
5402 | FLAG_C = CFLAG_CLEAR;\r |
5403 | \r |
5404 | m68ki_write_32(ea, data_long ^ mask_long);\r |
5405 | \r |
5406 | if((width + offset) > 32)\r |
5407 | {\r |
5408 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5409 | data_byte = m68ki_read_8(ea+4);\r |
5410 | FLAG_Z |= (data_byte & mask_byte);\r |
5411 | m68ki_write_8(ea+4, data_byte ^ mask_byte);\r |
5412 | }\r |
5413 | return;\r |
5414 | }\r |
5415 | m68ki_exception_illegal();\r |
5416 | }\r |
5417 | \r |
5418 | \r |
5419 | void m68k_op_bfchg_32_aw(void)\r |
5420 | {\r |
5421 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5422 | {\r |
5423 | uint word2 = OPER_I_16();\r |
5424 | sint offset = (word2>>6)&31;\r |
5425 | uint width = word2;\r |
5426 | uint mask_base;\r |
5427 | uint data_long;\r |
5428 | uint mask_long;\r |
5429 | uint data_byte = 0;\r |
5430 | uint mask_byte = 0;\r |
5431 | uint ea = EA_AW_8();\r |
5432 | \r |
5433 | \r |
5434 | if(BIT_B(word2))\r |
5435 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5436 | if(BIT_5(word2))\r |
5437 | width = REG_D[width&7];\r |
5438 | \r |
5439 | /* Offset is signed so we have to use ugly math =( */\r |
5440 | ea += offset / 8;\r |
5441 | offset %= 8;\r |
5442 | if(offset < 0)\r |
5443 | {\r |
5444 | offset += 8;\r |
5445 | ea--;\r |
5446 | }\r |
5447 | width = ((width-1) & 31) + 1;\r |
5448 | \r |
5449 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5450 | mask_long = mask_base >> offset;\r |
5451 | \r |
5452 | data_long = m68ki_read_32(ea);\r |
5453 | FLAG_N = NFLAG_32(data_long << offset);\r |
5454 | FLAG_Z = data_long & mask_long;\r |
5455 | FLAG_V = VFLAG_CLEAR;\r |
5456 | FLAG_C = CFLAG_CLEAR;\r |
5457 | \r |
5458 | m68ki_write_32(ea, data_long ^ mask_long);\r |
5459 | \r |
5460 | if((width + offset) > 32)\r |
5461 | {\r |
5462 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5463 | data_byte = m68ki_read_8(ea+4);\r |
5464 | FLAG_Z |= (data_byte & mask_byte);\r |
5465 | m68ki_write_8(ea+4, data_byte ^ mask_byte);\r |
5466 | }\r |
5467 | return;\r |
5468 | }\r |
5469 | m68ki_exception_illegal();\r |
5470 | }\r |
5471 | \r |
5472 | \r |
5473 | void m68k_op_bfchg_32_al(void)\r |
5474 | {\r |
5475 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5476 | {\r |
5477 | uint word2 = OPER_I_16();\r |
5478 | sint offset = (word2>>6)&31;\r |
5479 | uint width = word2;\r |
5480 | uint mask_base;\r |
5481 | uint data_long;\r |
5482 | uint mask_long;\r |
5483 | uint data_byte = 0;\r |
5484 | uint mask_byte = 0;\r |
5485 | uint ea = EA_AL_8();\r |
5486 | \r |
5487 | \r |
5488 | if(BIT_B(word2))\r |
5489 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5490 | if(BIT_5(word2))\r |
5491 | width = REG_D[width&7];\r |
5492 | \r |
5493 | /* Offset is signed so we have to use ugly math =( */\r |
5494 | ea += offset / 8;\r |
5495 | offset %= 8;\r |
5496 | if(offset < 0)\r |
5497 | {\r |
5498 | offset += 8;\r |
5499 | ea--;\r |
5500 | }\r |
5501 | width = ((width-1) & 31) + 1;\r |
5502 | \r |
5503 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5504 | mask_long = mask_base >> offset;\r |
5505 | \r |
5506 | data_long = m68ki_read_32(ea);\r |
5507 | FLAG_N = NFLAG_32(data_long << offset);\r |
5508 | FLAG_Z = data_long & mask_long;\r |
5509 | FLAG_V = VFLAG_CLEAR;\r |
5510 | FLAG_C = CFLAG_CLEAR;\r |
5511 | \r |
5512 | m68ki_write_32(ea, data_long ^ mask_long);\r |
5513 | \r |
5514 | if((width + offset) > 32)\r |
5515 | {\r |
5516 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5517 | data_byte = m68ki_read_8(ea+4);\r |
5518 | FLAG_Z |= (data_byte & mask_byte);\r |
5519 | m68ki_write_8(ea+4, data_byte ^ mask_byte);\r |
5520 | }\r |
5521 | return;\r |
5522 | }\r |
5523 | m68ki_exception_illegal();\r |
5524 | }\r |
5525 | \r |
5526 | \r |
5527 | void m68k_op_bfclr_32_d(void)\r |
5528 | {\r |
5529 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5530 | {\r |
5531 | uint word2 = OPER_I_16();\r |
5532 | uint offset = (word2>>6)&31;\r |
5533 | uint width = word2;\r |
5534 | uint* data = &DY;\r |
5535 | uint64 mask;\r |
5536 | \r |
5537 | \r |
5538 | if(BIT_B(word2))\r |
5539 | offset = REG_D[offset&7];\r |
5540 | if(BIT_5(word2))\r |
5541 | width = REG_D[width&7];\r |
5542 | \r |
5543 | \r |
5544 | offset &= 31;\r |
5545 | width = ((width-1) & 31) + 1;\r |
5546 | \r |
5547 | \r |
5548 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5549 | mask = ROR_32(mask, offset);\r |
5550 | \r |
5551 | FLAG_N = NFLAG_32(*data<<offset);\r |
5552 | FLAG_Z = *data & mask;\r |
5553 | FLAG_V = VFLAG_CLEAR;\r |
5554 | FLAG_C = CFLAG_CLEAR;\r |
5555 | \r |
5556 | *data &= ~mask;\r |
5557 | \r |
5558 | return;\r |
5559 | }\r |
5560 | m68ki_exception_illegal();\r |
5561 | }\r |
5562 | \r |
5563 | \r |
5564 | void m68k_op_bfclr_32_ai(void)\r |
5565 | {\r |
5566 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5567 | {\r |
5568 | uint word2 = OPER_I_16();\r |
5569 | sint offset = (word2>>6)&31;\r |
5570 | uint width = word2;\r |
5571 | uint mask_base;\r |
5572 | uint data_long;\r |
5573 | uint mask_long;\r |
5574 | uint data_byte = 0;\r |
5575 | uint mask_byte = 0;\r |
5576 | uint ea = EA_AY_AI_8();\r |
5577 | \r |
5578 | \r |
5579 | if(BIT_B(word2))\r |
5580 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5581 | if(BIT_5(word2))\r |
5582 | width = REG_D[width&7];\r |
5583 | \r |
5584 | /* Offset is signed so we have to use ugly math =( */\r |
5585 | ea += offset / 8;\r |
5586 | offset %= 8;\r |
5587 | if(offset < 0)\r |
5588 | {\r |
5589 | offset += 8;\r |
5590 | ea--;\r |
5591 | }\r |
5592 | width = ((width-1) & 31) + 1;\r |
5593 | \r |
5594 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5595 | mask_long = mask_base >> offset;\r |
5596 | \r |
5597 | data_long = m68ki_read_32(ea);\r |
5598 | FLAG_N = NFLAG_32(data_long << offset);\r |
5599 | FLAG_Z = data_long & mask_long;\r |
5600 | FLAG_V = VFLAG_CLEAR;\r |
5601 | FLAG_C = CFLAG_CLEAR;\r |
5602 | \r |
5603 | m68ki_write_32(ea, data_long & ~mask_long);\r |
5604 | \r |
5605 | if((width + offset) > 32)\r |
5606 | {\r |
5607 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5608 | data_byte = m68ki_read_8(ea+4);\r |
5609 | FLAG_Z |= (data_byte & mask_byte);\r |
5610 | m68ki_write_8(ea+4, data_byte & ~mask_byte);\r |
5611 | }\r |
5612 | return;\r |
5613 | }\r |
5614 | m68ki_exception_illegal();\r |
5615 | }\r |
5616 | \r |
5617 | \r |
5618 | void m68k_op_bfclr_32_di(void)\r |
5619 | {\r |
5620 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5621 | {\r |
5622 | uint word2 = OPER_I_16();\r |
5623 | sint offset = (word2>>6)&31;\r |
5624 | uint width = word2;\r |
5625 | uint mask_base;\r |
5626 | uint data_long;\r |
5627 | uint mask_long;\r |
5628 | uint data_byte = 0;\r |
5629 | uint mask_byte = 0;\r |
5630 | uint ea = EA_AY_DI_8();\r |
5631 | \r |
5632 | \r |
5633 | if(BIT_B(word2))\r |
5634 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5635 | if(BIT_5(word2))\r |
5636 | width = REG_D[width&7];\r |
5637 | \r |
5638 | /* Offset is signed so we have to use ugly math =( */\r |
5639 | ea += offset / 8;\r |
5640 | offset %= 8;\r |
5641 | if(offset < 0)\r |
5642 | {\r |
5643 | offset += 8;\r |
5644 | ea--;\r |
5645 | }\r |
5646 | width = ((width-1) & 31) + 1;\r |
5647 | \r |
5648 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5649 | mask_long = mask_base >> offset;\r |
5650 | \r |
5651 | data_long = m68ki_read_32(ea);\r |
5652 | FLAG_N = NFLAG_32(data_long << offset);\r |
5653 | FLAG_Z = data_long & mask_long;\r |
5654 | FLAG_V = VFLAG_CLEAR;\r |
5655 | FLAG_C = CFLAG_CLEAR;\r |
5656 | \r |
5657 | m68ki_write_32(ea, data_long & ~mask_long);\r |
5658 | \r |
5659 | if((width + offset) > 32)\r |
5660 | {\r |
5661 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5662 | data_byte = m68ki_read_8(ea+4);\r |
5663 | FLAG_Z |= (data_byte & mask_byte);\r |
5664 | m68ki_write_8(ea+4, data_byte & ~mask_byte);\r |
5665 | }\r |
5666 | return;\r |
5667 | }\r |
5668 | m68ki_exception_illegal();\r |
5669 | }\r |
5670 | \r |
5671 | \r |
5672 | void m68k_op_bfclr_32_ix(void)\r |
5673 | {\r |
5674 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5675 | {\r |
5676 | uint word2 = OPER_I_16();\r |
5677 | sint offset = (word2>>6)&31;\r |
5678 | uint width = word2;\r |
5679 | uint mask_base;\r |
5680 | uint data_long;\r |
5681 | uint mask_long;\r |
5682 | uint data_byte = 0;\r |
5683 | uint mask_byte = 0;\r |
5684 | uint ea = EA_AY_IX_8();\r |
5685 | \r |
5686 | \r |
5687 | if(BIT_B(word2))\r |
5688 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5689 | if(BIT_5(word2))\r |
5690 | width = REG_D[width&7];\r |
5691 | \r |
5692 | /* Offset is signed so we have to use ugly math =( */\r |
5693 | ea += offset / 8;\r |
5694 | offset %= 8;\r |
5695 | if(offset < 0)\r |
5696 | {\r |
5697 | offset += 8;\r |
5698 | ea--;\r |
5699 | }\r |
5700 | width = ((width-1) & 31) + 1;\r |
5701 | \r |
5702 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5703 | mask_long = mask_base >> offset;\r |
5704 | \r |
5705 | data_long = m68ki_read_32(ea);\r |
5706 | FLAG_N = NFLAG_32(data_long << offset);\r |
5707 | FLAG_Z = data_long & mask_long;\r |
5708 | FLAG_V = VFLAG_CLEAR;\r |
5709 | FLAG_C = CFLAG_CLEAR;\r |
5710 | \r |
5711 | m68ki_write_32(ea, data_long & ~mask_long);\r |
5712 | \r |
5713 | if((width + offset) > 32)\r |
5714 | {\r |
5715 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5716 | data_byte = m68ki_read_8(ea+4);\r |
5717 | FLAG_Z |= (data_byte & mask_byte);\r |
5718 | m68ki_write_8(ea+4, data_byte & ~mask_byte);\r |
5719 | }\r |
5720 | return;\r |
5721 | }\r |
5722 | m68ki_exception_illegal();\r |
5723 | }\r |
5724 | \r |
5725 | \r |
5726 | void m68k_op_bfclr_32_aw(void)\r |
5727 | {\r |
5728 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5729 | {\r |
5730 | uint word2 = OPER_I_16();\r |
5731 | sint offset = (word2>>6)&31;\r |
5732 | uint width = word2;\r |
5733 | uint mask_base;\r |
5734 | uint data_long;\r |
5735 | uint mask_long;\r |
5736 | uint data_byte = 0;\r |
5737 | uint mask_byte = 0;\r |
5738 | uint ea = EA_AW_8();\r |
5739 | \r |
5740 | \r |
5741 | if(BIT_B(word2))\r |
5742 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5743 | if(BIT_5(word2))\r |
5744 | width = REG_D[width&7];\r |
5745 | \r |
5746 | /* Offset is signed so we have to use ugly math =( */\r |
5747 | ea += offset / 8;\r |
5748 | offset %= 8;\r |
5749 | if(offset < 0)\r |
5750 | {\r |
5751 | offset += 8;\r |
5752 | ea--;\r |
5753 | }\r |
5754 | width = ((width-1) & 31) + 1;\r |
5755 | \r |
5756 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5757 | mask_long = mask_base >> offset;\r |
5758 | \r |
5759 | data_long = m68ki_read_32(ea);\r |
5760 | FLAG_N = NFLAG_32(data_long << offset);\r |
5761 | FLAG_Z = data_long & mask_long;\r |
5762 | FLAG_V = VFLAG_CLEAR;\r |
5763 | FLAG_C = CFLAG_CLEAR;\r |
5764 | \r |
5765 | m68ki_write_32(ea, data_long & ~mask_long);\r |
5766 | \r |
5767 | if((width + offset) > 32)\r |
5768 | {\r |
5769 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5770 | data_byte = m68ki_read_8(ea+4);\r |
5771 | FLAG_Z |= (data_byte & mask_byte);\r |
5772 | m68ki_write_8(ea+4, data_byte & ~mask_byte);\r |
5773 | }\r |
5774 | return;\r |
5775 | }\r |
5776 | m68ki_exception_illegal();\r |
5777 | }\r |
5778 | \r |
5779 | \r |
5780 | void m68k_op_bfclr_32_al(void)\r |
5781 | {\r |
5782 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5783 | {\r |
5784 | uint word2 = OPER_I_16();\r |
5785 | sint offset = (word2>>6)&31;\r |
5786 | uint width = word2;\r |
5787 | uint mask_base;\r |
5788 | uint data_long;\r |
5789 | uint mask_long;\r |
5790 | uint data_byte = 0;\r |
5791 | uint mask_byte = 0;\r |
5792 | uint ea = EA_AL_8();\r |
5793 | \r |
5794 | \r |
5795 | if(BIT_B(word2))\r |
5796 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5797 | if(BIT_5(word2))\r |
5798 | width = REG_D[width&7];\r |
5799 | \r |
5800 | /* Offset is signed so we have to use ugly math =( */\r |
5801 | ea += offset / 8;\r |
5802 | offset %= 8;\r |
5803 | if(offset < 0)\r |
5804 | {\r |
5805 | offset += 8;\r |
5806 | ea--;\r |
5807 | }\r |
5808 | width = ((width-1) & 31) + 1;\r |
5809 | \r |
5810 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
5811 | mask_long = mask_base >> offset;\r |
5812 | \r |
5813 | data_long = m68ki_read_32(ea);\r |
5814 | FLAG_N = NFLAG_32(data_long << offset);\r |
5815 | FLAG_Z = data_long & mask_long;\r |
5816 | FLAG_V = VFLAG_CLEAR;\r |
5817 | FLAG_C = CFLAG_CLEAR;\r |
5818 | \r |
5819 | m68ki_write_32(ea, data_long & ~mask_long);\r |
5820 | \r |
5821 | if((width + offset) > 32)\r |
5822 | {\r |
5823 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
5824 | data_byte = m68ki_read_8(ea+4);\r |
5825 | FLAG_Z |= (data_byte & mask_byte);\r |
5826 | m68ki_write_8(ea+4, data_byte & ~mask_byte);\r |
5827 | }\r |
5828 | return;\r |
5829 | }\r |
5830 | m68ki_exception_illegal();\r |
5831 | }\r |
5832 | \r |
5833 | \r |
5834 | void m68k_op_bfexts_32_d(void)\r |
5835 | {\r |
5836 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5837 | {\r |
5838 | uint word2 = OPER_I_16();\r |
5839 | uint offset = (word2>>6)&31;\r |
5840 | uint width = word2;\r |
5841 | uint64 data = DY;\r |
5842 | \r |
5843 | \r |
5844 | if(BIT_B(word2))\r |
5845 | offset = REG_D[offset&7];\r |
5846 | if(BIT_5(word2))\r |
5847 | width = REG_D[width&7];\r |
5848 | \r |
5849 | offset &= 31;\r |
5850 | width = ((width-1) & 31) + 1;\r |
5851 | \r |
5852 | data = ROL_32(data, offset);\r |
5853 | FLAG_N = NFLAG_32(data);\r |
5854 | data = MAKE_INT_32(data) >> (32 - width);\r |
5855 | \r |
5856 | FLAG_Z = data;\r |
5857 | FLAG_V = VFLAG_CLEAR;\r |
5858 | FLAG_C = CFLAG_CLEAR;\r |
5859 | \r |
5860 | REG_D[(word2>>12)&7] = data;\r |
5861 | \r |
5862 | return;\r |
5863 | }\r |
5864 | m68ki_exception_illegal();\r |
5865 | }\r |
5866 | \r |
5867 | \r |
5868 | void m68k_op_bfexts_32_ai(void)\r |
5869 | {\r |
5870 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5871 | {\r |
5872 | uint word2 = OPER_I_16();\r |
5873 | sint offset = (word2>>6)&31;\r |
5874 | uint width = word2;\r |
5875 | uint data;\r |
5876 | uint ea = EA_AY_AI_8();\r |
5877 | \r |
5878 | \r |
5879 | if(BIT_B(word2))\r |
5880 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5881 | if(BIT_5(word2))\r |
5882 | width = REG_D[width&7];\r |
5883 | \r |
5884 | /* Offset is signed so we have to use ugly math =( */\r |
5885 | ea += offset / 8;\r |
5886 | offset %= 8;\r |
5887 | if(offset < 0)\r |
5888 | {\r |
5889 | offset += 8;\r |
5890 | ea--;\r |
5891 | }\r |
5892 | width = ((width-1) & 31) + 1;\r |
5893 | \r |
5894 | data = m68ki_read_32(ea);\r |
5895 | \r |
5896 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
5897 | \r |
5898 | if((offset+width) > 32)\r |
5899 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
5900 | \r |
5901 | FLAG_N = NFLAG_32(data);\r |
5902 | data = MAKE_INT_32(data) >> (32 - width);\r |
5903 | \r |
5904 | FLAG_Z = data;\r |
5905 | FLAG_V = VFLAG_CLEAR;\r |
5906 | FLAG_C = CFLAG_CLEAR;\r |
5907 | \r |
5908 | REG_D[(word2 >> 12) & 7] = data;\r |
5909 | \r |
5910 | return;\r |
5911 | }\r |
5912 | m68ki_exception_illegal();\r |
5913 | }\r |
5914 | \r |
5915 | \r |
5916 | void m68k_op_bfexts_32_di(void)\r |
5917 | {\r |
5918 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5919 | {\r |
5920 | uint word2 = OPER_I_16();\r |
5921 | sint offset = (word2>>6)&31;\r |
5922 | uint width = word2;\r |
5923 | uint data;\r |
5924 | uint ea = EA_AY_DI_8();\r |
5925 | \r |
5926 | \r |
5927 | if(BIT_B(word2))\r |
5928 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5929 | if(BIT_5(word2))\r |
5930 | width = REG_D[width&7];\r |
5931 | \r |
5932 | /* Offset is signed so we have to use ugly math =( */\r |
5933 | ea += offset / 8;\r |
5934 | offset %= 8;\r |
5935 | if(offset < 0)\r |
5936 | {\r |
5937 | offset += 8;\r |
5938 | ea--;\r |
5939 | }\r |
5940 | width = ((width-1) & 31) + 1;\r |
5941 | \r |
5942 | data = m68ki_read_32(ea);\r |
5943 | \r |
5944 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
5945 | \r |
5946 | if((offset+width) > 32)\r |
5947 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
5948 | \r |
5949 | FLAG_N = NFLAG_32(data);\r |
5950 | data = MAKE_INT_32(data) >> (32 - width);\r |
5951 | \r |
5952 | FLAG_Z = data;\r |
5953 | FLAG_V = VFLAG_CLEAR;\r |
5954 | FLAG_C = CFLAG_CLEAR;\r |
5955 | \r |
5956 | REG_D[(word2 >> 12) & 7] = data;\r |
5957 | \r |
5958 | return;\r |
5959 | }\r |
5960 | m68ki_exception_illegal();\r |
5961 | }\r |
5962 | \r |
5963 | \r |
5964 | void m68k_op_bfexts_32_ix(void)\r |
5965 | {\r |
5966 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
5967 | {\r |
5968 | uint word2 = OPER_I_16();\r |
5969 | sint offset = (word2>>6)&31;\r |
5970 | uint width = word2;\r |
5971 | uint data;\r |
5972 | uint ea = EA_AY_IX_8();\r |
5973 | \r |
5974 | \r |
5975 | if(BIT_B(word2))\r |
5976 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
5977 | if(BIT_5(word2))\r |
5978 | width = REG_D[width&7];\r |
5979 | \r |
5980 | /* Offset is signed so we have to use ugly math =( */\r |
5981 | ea += offset / 8;\r |
5982 | offset %= 8;\r |
5983 | if(offset < 0)\r |
5984 | {\r |
5985 | offset += 8;\r |
5986 | ea--;\r |
5987 | }\r |
5988 | width = ((width-1) & 31) + 1;\r |
5989 | \r |
5990 | data = m68ki_read_32(ea);\r |
5991 | \r |
5992 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
5993 | \r |
5994 | if((offset+width) > 32)\r |
5995 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
5996 | \r |
5997 | FLAG_N = NFLAG_32(data);\r |
5998 | data = MAKE_INT_32(data) >> (32 - width);\r |
5999 | \r |
6000 | FLAG_Z = data;\r |
6001 | FLAG_V = VFLAG_CLEAR;\r |
6002 | FLAG_C = CFLAG_CLEAR;\r |
6003 | \r |
6004 | REG_D[(word2 >> 12) & 7] = data;\r |
6005 | \r |
6006 | return;\r |
6007 | }\r |
6008 | m68ki_exception_illegal();\r |
6009 | }\r |
6010 | \r |
6011 | \r |
6012 | void m68k_op_bfexts_32_aw(void)\r |
6013 | {\r |
6014 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6015 | {\r |
6016 | uint word2 = OPER_I_16();\r |
6017 | sint offset = (word2>>6)&31;\r |
6018 | uint width = word2;\r |
6019 | uint data;\r |
6020 | uint ea = EA_AW_8();\r |
6021 | \r |
6022 | \r |
6023 | if(BIT_B(word2))\r |
6024 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6025 | if(BIT_5(word2))\r |
6026 | width = REG_D[width&7];\r |
6027 | \r |
6028 | /* Offset is signed so we have to use ugly math =( */\r |
6029 | ea += offset / 8;\r |
6030 | offset %= 8;\r |
6031 | if(offset < 0)\r |
6032 | {\r |
6033 | offset += 8;\r |
6034 | ea--;\r |
6035 | }\r |
6036 | width = ((width-1) & 31) + 1;\r |
6037 | \r |
6038 | data = m68ki_read_32(ea);\r |
6039 | \r |
6040 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6041 | \r |
6042 | if((offset+width) > 32)\r |
6043 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6044 | \r |
6045 | FLAG_N = NFLAG_32(data);\r |
6046 | data = MAKE_INT_32(data) >> (32 - width);\r |
6047 | \r |
6048 | FLAG_Z = data;\r |
6049 | FLAG_V = VFLAG_CLEAR;\r |
6050 | FLAG_C = CFLAG_CLEAR;\r |
6051 | \r |
6052 | REG_D[(word2 >> 12) & 7] = data;\r |
6053 | \r |
6054 | return;\r |
6055 | }\r |
6056 | m68ki_exception_illegal();\r |
6057 | }\r |
6058 | \r |
6059 | \r |
6060 | void m68k_op_bfexts_32_al(void)\r |
6061 | {\r |
6062 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6063 | {\r |
6064 | uint word2 = OPER_I_16();\r |
6065 | sint offset = (word2>>6)&31;\r |
6066 | uint width = word2;\r |
6067 | uint data;\r |
6068 | uint ea = EA_AL_8();\r |
6069 | \r |
6070 | \r |
6071 | if(BIT_B(word2))\r |
6072 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6073 | if(BIT_5(word2))\r |
6074 | width = REG_D[width&7];\r |
6075 | \r |
6076 | /* Offset is signed so we have to use ugly math =( */\r |
6077 | ea += offset / 8;\r |
6078 | offset %= 8;\r |
6079 | if(offset < 0)\r |
6080 | {\r |
6081 | offset += 8;\r |
6082 | ea--;\r |
6083 | }\r |
6084 | width = ((width-1) & 31) + 1;\r |
6085 | \r |
6086 | data = m68ki_read_32(ea);\r |
6087 | \r |
6088 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6089 | \r |
6090 | if((offset+width) > 32)\r |
6091 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6092 | \r |
6093 | FLAG_N = NFLAG_32(data);\r |
6094 | data = MAKE_INT_32(data) >> (32 - width);\r |
6095 | \r |
6096 | FLAG_Z = data;\r |
6097 | FLAG_V = VFLAG_CLEAR;\r |
6098 | FLAG_C = CFLAG_CLEAR;\r |
6099 | \r |
6100 | REG_D[(word2 >> 12) & 7] = data;\r |
6101 | \r |
6102 | return;\r |
6103 | }\r |
6104 | m68ki_exception_illegal();\r |
6105 | }\r |
6106 | \r |
6107 | \r |
6108 | void m68k_op_bfexts_32_pcdi(void)\r |
6109 | {\r |
6110 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6111 | {\r |
6112 | uint word2 = OPER_I_16();\r |
6113 | sint offset = (word2>>6)&31;\r |
6114 | uint width = word2;\r |
6115 | uint data;\r |
6116 | uint ea = EA_PCDI_8();\r |
6117 | \r |
6118 | \r |
6119 | if(BIT_B(word2))\r |
6120 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6121 | if(BIT_5(word2))\r |
6122 | width = REG_D[width&7];\r |
6123 | \r |
6124 | /* Offset is signed so we have to use ugly math =( */\r |
6125 | ea += offset / 8;\r |
6126 | offset %= 8;\r |
6127 | if(offset < 0)\r |
6128 | {\r |
6129 | offset += 8;\r |
6130 | ea--;\r |
6131 | }\r |
6132 | width = ((width-1) & 31) + 1;\r |
6133 | \r |
6134 | data = m68ki_read_32(ea);\r |
6135 | \r |
6136 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6137 | \r |
6138 | if((offset+width) > 32)\r |
6139 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6140 | \r |
6141 | FLAG_N = NFLAG_32(data);\r |
6142 | data = MAKE_INT_32(data) >> (32 - width);\r |
6143 | \r |
6144 | FLAG_Z = data;\r |
6145 | FLAG_V = VFLAG_CLEAR;\r |
6146 | FLAG_C = CFLAG_CLEAR;\r |
6147 | \r |
6148 | REG_D[(word2 >> 12) & 7] = data;\r |
6149 | \r |
6150 | return;\r |
6151 | }\r |
6152 | m68ki_exception_illegal();\r |
6153 | }\r |
6154 | \r |
6155 | \r |
6156 | void m68k_op_bfexts_32_pcix(void)\r |
6157 | {\r |
6158 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6159 | {\r |
6160 | uint word2 = OPER_I_16();\r |
6161 | sint offset = (word2>>6)&31;\r |
6162 | uint width = word2;\r |
6163 | uint data;\r |
6164 | uint ea = EA_PCIX_8();\r |
6165 | \r |
6166 | \r |
6167 | if(BIT_B(word2))\r |
6168 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6169 | if(BIT_5(word2))\r |
6170 | width = REG_D[width&7];\r |
6171 | \r |
6172 | /* Offset is signed so we have to use ugly math =( */\r |
6173 | ea += offset / 8;\r |
6174 | offset %= 8;\r |
6175 | if(offset < 0)\r |
6176 | {\r |
6177 | offset += 8;\r |
6178 | ea--;\r |
6179 | }\r |
6180 | width = ((width-1) & 31) + 1;\r |
6181 | \r |
6182 | data = m68ki_read_32(ea);\r |
6183 | \r |
6184 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6185 | \r |
6186 | if((offset+width) > 32)\r |
6187 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6188 | \r |
6189 | FLAG_N = NFLAG_32(data);\r |
6190 | data = MAKE_INT_32(data) >> (32 - width);\r |
6191 | \r |
6192 | FLAG_Z = data;\r |
6193 | FLAG_V = VFLAG_CLEAR;\r |
6194 | FLAG_C = CFLAG_CLEAR;\r |
6195 | \r |
6196 | REG_D[(word2 >> 12) & 7] = data;\r |
6197 | \r |
6198 | return;\r |
6199 | }\r |
6200 | m68ki_exception_illegal();\r |
6201 | }\r |
6202 | \r |
6203 | \r |
6204 | void m68k_op_bfextu_32_d(void)\r |
6205 | {\r |
6206 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6207 | {\r |
6208 | uint word2 = OPER_I_16();\r |
6209 | uint offset = (word2>>6)&31;\r |
6210 | uint width = word2;\r |
6211 | uint64 data = DY;\r |
6212 | \r |
6213 | \r |
6214 | if(BIT_B(word2))\r |
6215 | offset = REG_D[offset&7];\r |
6216 | if(BIT_5(word2))\r |
6217 | width = REG_D[width&7];\r |
6218 | \r |
6219 | offset &= 31;\r |
6220 | width = ((width-1) & 31) + 1;\r |
6221 | \r |
6222 | data = ROL_32(data, offset);\r |
6223 | FLAG_N = NFLAG_32(data);\r |
6224 | data >>= 32 - width;\r |
6225 | \r |
6226 | FLAG_Z = data;\r |
6227 | FLAG_V = VFLAG_CLEAR;\r |
6228 | FLAG_C = CFLAG_CLEAR;\r |
6229 | \r |
6230 | REG_D[(word2>>12)&7] = data;\r |
6231 | \r |
6232 | return;\r |
6233 | }\r |
6234 | m68ki_exception_illegal();\r |
6235 | }\r |
6236 | \r |
6237 | \r |
6238 | void m68k_op_bfextu_32_ai(void)\r |
6239 | {\r |
6240 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6241 | {\r |
6242 | uint word2 = OPER_I_16();\r |
6243 | sint offset = (word2>>6)&31;\r |
6244 | uint width = word2;\r |
6245 | uint data;\r |
6246 | uint ea = EA_AY_AI_8();\r |
6247 | \r |
6248 | \r |
6249 | if(BIT_B(word2))\r |
6250 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6251 | if(BIT_5(word2))\r |
6252 | width = REG_D[width&7];\r |
6253 | \r |
6254 | /* Offset is signed so we have to use ugly math =( */\r |
6255 | ea += offset / 8;\r |
6256 | offset %= 8;\r |
6257 | if(offset < 0)\r |
6258 | {\r |
6259 | offset += 8;\r |
6260 | ea--;\r |
6261 | }\r |
6262 | width = ((width-1) & 31) + 1;\r |
6263 | \r |
6264 | data = m68ki_read_32(ea);\r |
6265 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6266 | \r |
6267 | if((offset+width) > 32)\r |
6268 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6269 | \r |
6270 | FLAG_N = NFLAG_32(data);\r |
6271 | data >>= (32 - width);\r |
6272 | \r |
6273 | FLAG_Z = data;\r |
6274 | FLAG_V = VFLAG_CLEAR;\r |
6275 | FLAG_C = CFLAG_CLEAR;\r |
6276 | \r |
6277 | REG_D[(word2 >> 12) & 7] = data;\r |
6278 | \r |
6279 | return;\r |
6280 | }\r |
6281 | m68ki_exception_illegal();\r |
6282 | }\r |
6283 | \r |
6284 | \r |
6285 | void m68k_op_bfextu_32_di(void)\r |
6286 | {\r |
6287 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6288 | {\r |
6289 | uint word2 = OPER_I_16();\r |
6290 | sint offset = (word2>>6)&31;\r |
6291 | uint width = word2;\r |
6292 | uint data;\r |
6293 | uint ea = EA_AY_DI_8();\r |
6294 | \r |
6295 | \r |
6296 | if(BIT_B(word2))\r |
6297 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6298 | if(BIT_5(word2))\r |
6299 | width = REG_D[width&7];\r |
6300 | \r |
6301 | /* Offset is signed so we have to use ugly math =( */\r |
6302 | ea += offset / 8;\r |
6303 | offset %= 8;\r |
6304 | if(offset < 0)\r |
6305 | {\r |
6306 | offset += 8;\r |
6307 | ea--;\r |
6308 | }\r |
6309 | width = ((width-1) & 31) + 1;\r |
6310 | \r |
6311 | data = m68ki_read_32(ea);\r |
6312 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6313 | \r |
6314 | if((offset+width) > 32)\r |
6315 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6316 | \r |
6317 | FLAG_N = NFLAG_32(data);\r |
6318 | data >>= (32 - width);\r |
6319 | \r |
6320 | FLAG_Z = data;\r |
6321 | FLAG_V = VFLAG_CLEAR;\r |
6322 | FLAG_C = CFLAG_CLEAR;\r |
6323 | \r |
6324 | REG_D[(word2 >> 12) & 7] = data;\r |
6325 | \r |
6326 | return;\r |
6327 | }\r |
6328 | m68ki_exception_illegal();\r |
6329 | }\r |
6330 | \r |
6331 | \r |
6332 | void m68k_op_bfextu_32_ix(void)\r |
6333 | {\r |
6334 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6335 | {\r |
6336 | uint word2 = OPER_I_16();\r |
6337 | sint offset = (word2>>6)&31;\r |
6338 | uint width = word2;\r |
6339 | uint data;\r |
6340 | uint ea = EA_AY_IX_8();\r |
6341 | \r |
6342 | \r |
6343 | if(BIT_B(word2))\r |
6344 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6345 | if(BIT_5(word2))\r |
6346 | width = REG_D[width&7];\r |
6347 | \r |
6348 | /* Offset is signed so we have to use ugly math =( */\r |
6349 | ea += offset / 8;\r |
6350 | offset %= 8;\r |
6351 | if(offset < 0)\r |
6352 | {\r |
6353 | offset += 8;\r |
6354 | ea--;\r |
6355 | }\r |
6356 | width = ((width-1) & 31) + 1;\r |
6357 | \r |
6358 | data = m68ki_read_32(ea);\r |
6359 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6360 | \r |
6361 | if((offset+width) > 32)\r |
6362 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6363 | \r |
6364 | FLAG_N = NFLAG_32(data);\r |
6365 | data >>= (32 - width);\r |
6366 | \r |
6367 | FLAG_Z = data;\r |
6368 | FLAG_V = VFLAG_CLEAR;\r |
6369 | FLAG_C = CFLAG_CLEAR;\r |
6370 | \r |
6371 | REG_D[(word2 >> 12) & 7] = data;\r |
6372 | \r |
6373 | return;\r |
6374 | }\r |
6375 | m68ki_exception_illegal();\r |
6376 | }\r |
6377 | \r |
6378 | \r |
6379 | void m68k_op_bfextu_32_aw(void)\r |
6380 | {\r |
6381 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6382 | {\r |
6383 | uint word2 = OPER_I_16();\r |
6384 | sint offset = (word2>>6)&31;\r |
6385 | uint width = word2;\r |
6386 | uint data;\r |
6387 | uint ea = EA_AW_8();\r |
6388 | \r |
6389 | \r |
6390 | if(BIT_B(word2))\r |
6391 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6392 | if(BIT_5(word2))\r |
6393 | width = REG_D[width&7];\r |
6394 | \r |
6395 | /* Offset is signed so we have to use ugly math =( */\r |
6396 | ea += offset / 8;\r |
6397 | offset %= 8;\r |
6398 | if(offset < 0)\r |
6399 | {\r |
6400 | offset += 8;\r |
6401 | ea--;\r |
6402 | }\r |
6403 | width = ((width-1) & 31) + 1;\r |
6404 | \r |
6405 | data = m68ki_read_32(ea);\r |
6406 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6407 | \r |
6408 | if((offset+width) > 32)\r |
6409 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6410 | \r |
6411 | FLAG_N = NFLAG_32(data);\r |
6412 | data >>= (32 - width);\r |
6413 | \r |
6414 | FLAG_Z = data;\r |
6415 | FLAG_V = VFLAG_CLEAR;\r |
6416 | FLAG_C = CFLAG_CLEAR;\r |
6417 | \r |
6418 | REG_D[(word2 >> 12) & 7] = data;\r |
6419 | \r |
6420 | return;\r |
6421 | }\r |
6422 | m68ki_exception_illegal();\r |
6423 | }\r |
6424 | \r |
6425 | \r |
6426 | void m68k_op_bfextu_32_al(void)\r |
6427 | {\r |
6428 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6429 | {\r |
6430 | uint word2 = OPER_I_16();\r |
6431 | sint offset = (word2>>6)&31;\r |
6432 | uint width = word2;\r |
6433 | uint data;\r |
6434 | uint ea = EA_AL_8();\r |
6435 | \r |
6436 | \r |
6437 | if(BIT_B(word2))\r |
6438 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6439 | if(BIT_5(word2))\r |
6440 | width = REG_D[width&7];\r |
6441 | \r |
6442 | /* Offset is signed so we have to use ugly math =( */\r |
6443 | ea += offset / 8;\r |
6444 | offset %= 8;\r |
6445 | if(offset < 0)\r |
6446 | {\r |
6447 | offset += 8;\r |
6448 | ea--;\r |
6449 | }\r |
6450 | width = ((width-1) & 31) + 1;\r |
6451 | \r |
6452 | data = m68ki_read_32(ea);\r |
6453 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6454 | \r |
6455 | if((offset+width) > 32)\r |
6456 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6457 | \r |
6458 | FLAG_N = NFLAG_32(data);\r |
6459 | data >>= (32 - width);\r |
6460 | \r |
6461 | FLAG_Z = data;\r |
6462 | FLAG_V = VFLAG_CLEAR;\r |
6463 | FLAG_C = CFLAG_CLEAR;\r |
6464 | \r |
6465 | REG_D[(word2 >> 12) & 7] = data;\r |
6466 | \r |
6467 | return;\r |
6468 | }\r |
6469 | m68ki_exception_illegal();\r |
6470 | }\r |
6471 | \r |
6472 | \r |
6473 | void m68k_op_bfextu_32_pcdi(void)\r |
6474 | {\r |
6475 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6476 | {\r |
6477 | uint word2 = OPER_I_16();\r |
6478 | sint offset = (word2>>6)&31;\r |
6479 | uint width = word2;\r |
6480 | uint data;\r |
6481 | uint ea = EA_PCDI_8();\r |
6482 | \r |
6483 | \r |
6484 | if(BIT_B(word2))\r |
6485 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6486 | if(BIT_5(word2))\r |
6487 | width = REG_D[width&7];\r |
6488 | \r |
6489 | /* Offset is signed so we have to use ugly math =( */\r |
6490 | ea += offset / 8;\r |
6491 | offset %= 8;\r |
6492 | if(offset < 0)\r |
6493 | {\r |
6494 | offset += 8;\r |
6495 | ea--;\r |
6496 | }\r |
6497 | width = ((width-1) & 31) + 1;\r |
6498 | \r |
6499 | data = m68ki_read_32(ea);\r |
6500 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6501 | \r |
6502 | if((offset+width) > 32)\r |
6503 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6504 | \r |
6505 | FLAG_N = NFLAG_32(data);\r |
6506 | data >>= (32 - width);\r |
6507 | \r |
6508 | FLAG_Z = data;\r |
6509 | FLAG_V = VFLAG_CLEAR;\r |
6510 | FLAG_C = CFLAG_CLEAR;\r |
6511 | \r |
6512 | REG_D[(word2 >> 12) & 7] = data;\r |
6513 | \r |
6514 | return;\r |
6515 | }\r |
6516 | m68ki_exception_illegal();\r |
6517 | }\r |
6518 | \r |
6519 | \r |
6520 | void m68k_op_bfextu_32_pcix(void)\r |
6521 | {\r |
6522 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6523 | {\r |
6524 | uint word2 = OPER_I_16();\r |
6525 | sint offset = (word2>>6)&31;\r |
6526 | uint width = word2;\r |
6527 | uint data;\r |
6528 | uint ea = EA_PCIX_8();\r |
6529 | \r |
6530 | \r |
6531 | if(BIT_B(word2))\r |
6532 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6533 | if(BIT_5(word2))\r |
6534 | width = REG_D[width&7];\r |
6535 | \r |
6536 | /* Offset is signed so we have to use ugly math =( */\r |
6537 | ea += offset / 8;\r |
6538 | offset %= 8;\r |
6539 | if(offset < 0)\r |
6540 | {\r |
6541 | offset += 8;\r |
6542 | ea--;\r |
6543 | }\r |
6544 | width = ((width-1) & 31) + 1;\r |
6545 | \r |
6546 | data = m68ki_read_32(ea);\r |
6547 | data = MASK_OUT_ABOVE_32(data<<offset);\r |
6548 | \r |
6549 | if((offset+width) > 32)\r |
6550 | data |= (m68ki_read_8(ea+4) << offset) >> 8;\r |
6551 | \r |
6552 | FLAG_N = NFLAG_32(data);\r |
6553 | data >>= (32 - width);\r |
6554 | \r |
6555 | FLAG_Z = data;\r |
6556 | FLAG_V = VFLAG_CLEAR;\r |
6557 | FLAG_C = CFLAG_CLEAR;\r |
6558 | \r |
6559 | REG_D[(word2 >> 12) & 7] = data;\r |
6560 | \r |
6561 | return;\r |
6562 | }\r |
6563 | m68ki_exception_illegal();\r |
6564 | }\r |
6565 | \r |
6566 | \r |
6567 | void m68k_op_bfffo_32_d(void)\r |
6568 | {\r |
6569 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6570 | {\r |
6571 | uint word2 = OPER_I_16();\r |
6572 | uint offset = (word2>>6)&31;\r |
6573 | uint width = word2;\r |
6574 | uint64 data = DY;\r |
6575 | uint bit;\r |
6576 | \r |
6577 | \r |
6578 | if(BIT_B(word2))\r |
6579 | offset = REG_D[offset&7];\r |
6580 | if(BIT_5(word2))\r |
6581 | width = REG_D[width&7];\r |
6582 | \r |
6583 | offset &= 31;\r |
6584 | width = ((width-1) & 31) + 1;\r |
6585 | \r |
6586 | data = ROL_32(data, offset);\r |
6587 | FLAG_N = NFLAG_32(data);\r |
6588 | data >>= 32 - width;\r |
6589 | \r |
6590 | FLAG_Z = data;\r |
6591 | FLAG_V = VFLAG_CLEAR;\r |
6592 | FLAG_C = CFLAG_CLEAR;\r |
6593 | \r |
6594 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)\r |
6595 | offset++;\r |
6596 | \r |
6597 | REG_D[(word2>>12)&7] = offset;\r |
6598 | \r |
6599 | return;\r |
6600 | }\r |
6601 | m68ki_exception_illegal();\r |
6602 | }\r |
6603 | \r |
6604 | \r |
6605 | void m68k_op_bfffo_32_ai(void)\r |
6606 | {\r |
6607 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6608 | {\r |
6609 | uint word2 = OPER_I_16();\r |
6610 | sint offset = (word2>>6)&31;\r |
6611 | sint local_offset;\r |
6612 | uint width = word2;\r |
6613 | uint data;\r |
6614 | uint bit;\r |
6615 | uint ea = EA_AY_AI_8();\r |
6616 | \r |
6617 | \r |
6618 | if(BIT_B(word2))\r |
6619 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6620 | if(BIT_5(word2))\r |
6621 | width = REG_D[width&7];\r |
6622 | \r |
6623 | /* Offset is signed so we have to use ugly math =( */\r |
6624 | ea += offset / 8;\r |
6625 | local_offset = offset % 8;\r |
6626 | if(local_offset < 0)\r |
6627 | {\r |
6628 | local_offset += 8;\r |
6629 | ea--;\r |
6630 | }\r |
6631 | width = ((width-1) & 31) + 1;\r |
6632 | \r |
6633 | data = m68ki_read_32(ea);\r |
6634 | data = MASK_OUT_ABOVE_32(data<<local_offset);\r |
6635 | \r |
6636 | if((local_offset+width) > 32)\r |
6637 | data |= (m68ki_read_8(ea+4) << local_offset) >> 8;\r |
6638 | \r |
6639 | FLAG_N = NFLAG_32(data);\r |
6640 | data >>= (32 - width);\r |
6641 | \r |
6642 | FLAG_Z = data;\r |
6643 | FLAG_V = VFLAG_CLEAR;\r |
6644 | FLAG_C = CFLAG_CLEAR;\r |
6645 | \r |
6646 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)\r |
6647 | offset++;\r |
6648 | \r |
6649 | REG_D[(word2>>12)&7] = offset;\r |
6650 | \r |
6651 | return;\r |
6652 | }\r |
6653 | m68ki_exception_illegal();\r |
6654 | }\r |
6655 | \r |
6656 | \r |
6657 | void m68k_op_bfffo_32_di(void)\r |
6658 | {\r |
6659 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6660 | {\r |
6661 | uint word2 = OPER_I_16();\r |
6662 | sint offset = (word2>>6)&31;\r |
6663 | sint local_offset;\r |
6664 | uint width = word2;\r |
6665 | uint data;\r |
6666 | uint bit;\r |
6667 | uint ea = EA_AY_DI_8();\r |
6668 | \r |
6669 | \r |
6670 | if(BIT_B(word2))\r |
6671 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6672 | if(BIT_5(word2))\r |
6673 | width = REG_D[width&7];\r |
6674 | \r |
6675 | /* Offset is signed so we have to use ugly math =( */\r |
6676 | ea += offset / 8;\r |
6677 | local_offset = offset % 8;\r |
6678 | if(local_offset < 0)\r |
6679 | {\r |
6680 | local_offset += 8;\r |
6681 | ea--;\r |
6682 | }\r |
6683 | width = ((width-1) & 31) + 1;\r |
6684 | \r |
6685 | data = m68ki_read_32(ea);\r |
6686 | data = MASK_OUT_ABOVE_32(data<<local_offset);\r |
6687 | \r |
6688 | if((local_offset+width) > 32)\r |
6689 | data |= (m68ki_read_8(ea+4) << local_offset) >> 8;\r |
6690 | \r |
6691 | FLAG_N = NFLAG_32(data);\r |
6692 | data >>= (32 - width);\r |
6693 | \r |
6694 | FLAG_Z = data;\r |
6695 | FLAG_V = VFLAG_CLEAR;\r |
6696 | FLAG_C = CFLAG_CLEAR;\r |
6697 | \r |
6698 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)\r |
6699 | offset++;\r |
6700 | \r |
6701 | REG_D[(word2>>12)&7] = offset;\r |
6702 | \r |
6703 | return;\r |
6704 | }\r |
6705 | m68ki_exception_illegal();\r |
6706 | }\r |
6707 | \r |
6708 | \r |
6709 | void m68k_op_bfffo_32_ix(void)\r |
6710 | {\r |
6711 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6712 | {\r |
6713 | uint word2 = OPER_I_16();\r |
6714 | sint offset = (word2>>6)&31;\r |
6715 | sint local_offset;\r |
6716 | uint width = word2;\r |
6717 | uint data;\r |
6718 | uint bit;\r |
6719 | uint ea = EA_AY_IX_8();\r |
6720 | \r |
6721 | \r |
6722 | if(BIT_B(word2))\r |
6723 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6724 | if(BIT_5(word2))\r |
6725 | width = REG_D[width&7];\r |
6726 | \r |
6727 | /* Offset is signed so we have to use ugly math =( */\r |
6728 | ea += offset / 8;\r |
6729 | local_offset = offset % 8;\r |
6730 | if(local_offset < 0)\r |
6731 | {\r |
6732 | local_offset += 8;\r |
6733 | ea--;\r |
6734 | }\r |
6735 | width = ((width-1) & 31) + 1;\r |
6736 | \r |
6737 | data = m68ki_read_32(ea);\r |
6738 | data = MASK_OUT_ABOVE_32(data<<local_offset);\r |
6739 | \r |
6740 | if((local_offset+width) > 32)\r |
6741 | data |= (m68ki_read_8(ea+4) << local_offset) >> 8;\r |
6742 | \r |
6743 | FLAG_N = NFLAG_32(data);\r |
6744 | data >>= (32 - width);\r |
6745 | \r |
6746 | FLAG_Z = data;\r |
6747 | FLAG_V = VFLAG_CLEAR;\r |
6748 | FLAG_C = CFLAG_CLEAR;\r |
6749 | \r |
6750 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)\r |
6751 | offset++;\r |
6752 | \r |
6753 | REG_D[(word2>>12)&7] = offset;\r |
6754 | \r |
6755 | return;\r |
6756 | }\r |
6757 | m68ki_exception_illegal();\r |
6758 | }\r |
6759 | \r |
6760 | \r |
6761 | void m68k_op_bfffo_32_aw(void)\r |
6762 | {\r |
6763 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6764 | {\r |
6765 | uint word2 = OPER_I_16();\r |
6766 | sint offset = (word2>>6)&31;\r |
6767 | sint local_offset;\r |
6768 | uint width = word2;\r |
6769 | uint data;\r |
6770 | uint bit;\r |
6771 | uint ea = EA_AW_8();\r |
6772 | \r |
6773 | \r |
6774 | if(BIT_B(word2))\r |
6775 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6776 | if(BIT_5(word2))\r |
6777 | width = REG_D[width&7];\r |
6778 | \r |
6779 | /* Offset is signed so we have to use ugly math =( */\r |
6780 | ea += offset / 8;\r |
6781 | local_offset = offset % 8;\r |
6782 | if(local_offset < 0)\r |
6783 | {\r |
6784 | local_offset += 8;\r |
6785 | ea--;\r |
6786 | }\r |
6787 | width = ((width-1) & 31) + 1;\r |
6788 | \r |
6789 | data = m68ki_read_32(ea);\r |
6790 | data = MASK_OUT_ABOVE_32(data<<local_offset);\r |
6791 | \r |
6792 | if((local_offset+width) > 32)\r |
6793 | data |= (m68ki_read_8(ea+4) << local_offset) >> 8;\r |
6794 | \r |
6795 | FLAG_N = NFLAG_32(data);\r |
6796 | data >>= (32 - width);\r |
6797 | \r |
6798 | FLAG_Z = data;\r |
6799 | FLAG_V = VFLAG_CLEAR;\r |
6800 | FLAG_C = CFLAG_CLEAR;\r |
6801 | \r |
6802 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)\r |
6803 | offset++;\r |
6804 | \r |
6805 | REG_D[(word2>>12)&7] = offset;\r |
6806 | \r |
6807 | return;\r |
6808 | }\r |
6809 | m68ki_exception_illegal();\r |
6810 | }\r |
6811 | \r |
6812 | \r |
6813 | void m68k_op_bfffo_32_al(void)\r |
6814 | {\r |
6815 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6816 | {\r |
6817 | uint word2 = OPER_I_16();\r |
6818 | sint offset = (word2>>6)&31;\r |
6819 | sint local_offset;\r |
6820 | uint width = word2;\r |
6821 | uint data;\r |
6822 | uint bit;\r |
6823 | uint ea = EA_AL_8();\r |
6824 | \r |
6825 | \r |
6826 | if(BIT_B(word2))\r |
6827 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6828 | if(BIT_5(word2))\r |
6829 | width = REG_D[width&7];\r |
6830 | \r |
6831 | /* Offset is signed so we have to use ugly math =( */\r |
6832 | ea += offset / 8;\r |
6833 | local_offset = offset % 8;\r |
6834 | if(local_offset < 0)\r |
6835 | {\r |
6836 | local_offset += 8;\r |
6837 | ea--;\r |
6838 | }\r |
6839 | width = ((width-1) & 31) + 1;\r |
6840 | \r |
6841 | data = m68ki_read_32(ea);\r |
6842 | data = MASK_OUT_ABOVE_32(data<<local_offset);\r |
6843 | \r |
6844 | if((local_offset+width) > 32)\r |
6845 | data |= (m68ki_read_8(ea+4) << local_offset) >> 8;\r |
6846 | \r |
6847 | FLAG_N = NFLAG_32(data);\r |
6848 | data >>= (32 - width);\r |
6849 | \r |
6850 | FLAG_Z = data;\r |
6851 | FLAG_V = VFLAG_CLEAR;\r |
6852 | FLAG_C = CFLAG_CLEAR;\r |
6853 | \r |
6854 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)\r |
6855 | offset++;\r |
6856 | \r |
6857 | REG_D[(word2>>12)&7] = offset;\r |
6858 | \r |
6859 | return;\r |
6860 | }\r |
6861 | m68ki_exception_illegal();\r |
6862 | }\r |
6863 | \r |
6864 | \r |
6865 | void m68k_op_bfffo_32_pcdi(void)\r |
6866 | {\r |
6867 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6868 | {\r |
6869 | uint word2 = OPER_I_16();\r |
6870 | sint offset = (word2>>6)&31;\r |
6871 | sint local_offset;\r |
6872 | uint width = word2;\r |
6873 | uint data;\r |
6874 | uint bit;\r |
6875 | uint ea = EA_PCDI_8();\r |
6876 | \r |
6877 | \r |
6878 | if(BIT_B(word2))\r |
6879 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6880 | if(BIT_5(word2))\r |
6881 | width = REG_D[width&7];\r |
6882 | \r |
6883 | /* Offset is signed so we have to use ugly math =( */\r |
6884 | ea += offset / 8;\r |
6885 | local_offset = offset % 8;\r |
6886 | if(local_offset < 0)\r |
6887 | {\r |
6888 | local_offset += 8;\r |
6889 | ea--;\r |
6890 | }\r |
6891 | width = ((width-1) & 31) + 1;\r |
6892 | \r |
6893 | data = m68ki_read_32(ea);\r |
6894 | data = MASK_OUT_ABOVE_32(data<<local_offset);\r |
6895 | \r |
6896 | if((local_offset+width) > 32)\r |
6897 | data |= (m68ki_read_8(ea+4) << local_offset) >> 8;\r |
6898 | \r |
6899 | FLAG_N = NFLAG_32(data);\r |
6900 | data >>= (32 - width);\r |
6901 | \r |
6902 | FLAG_Z = data;\r |
6903 | FLAG_V = VFLAG_CLEAR;\r |
6904 | FLAG_C = CFLAG_CLEAR;\r |
6905 | \r |
6906 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)\r |
6907 | offset++;\r |
6908 | \r |
6909 | REG_D[(word2>>12)&7] = offset;\r |
6910 | \r |
6911 | return;\r |
6912 | }\r |
6913 | m68ki_exception_illegal();\r |
6914 | }\r |
6915 | \r |
6916 | \r |
6917 | void m68k_op_bfffo_32_pcix(void)\r |
6918 | {\r |
6919 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6920 | {\r |
6921 | uint word2 = OPER_I_16();\r |
6922 | sint offset = (word2>>6)&31;\r |
6923 | sint local_offset;\r |
6924 | uint width = word2;\r |
6925 | uint data;\r |
6926 | uint bit;\r |
6927 | uint ea = EA_PCIX_8();\r |
6928 | \r |
6929 | \r |
6930 | if(BIT_B(word2))\r |
6931 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
6932 | if(BIT_5(word2))\r |
6933 | width = REG_D[width&7];\r |
6934 | \r |
6935 | /* Offset is signed so we have to use ugly math =( */\r |
6936 | ea += offset / 8;\r |
6937 | local_offset = offset % 8;\r |
6938 | if(local_offset < 0)\r |
6939 | {\r |
6940 | local_offset += 8;\r |
6941 | ea--;\r |
6942 | }\r |
6943 | width = ((width-1) & 31) + 1;\r |
6944 | \r |
6945 | data = m68ki_read_32(ea);\r |
6946 | data = MASK_OUT_ABOVE_32(data<<local_offset);\r |
6947 | \r |
6948 | if((local_offset+width) > 32)\r |
6949 | data |= (m68ki_read_8(ea+4) << local_offset) >> 8;\r |
6950 | \r |
6951 | FLAG_N = NFLAG_32(data);\r |
6952 | data >>= (32 - width);\r |
6953 | \r |
6954 | FLAG_Z = data;\r |
6955 | FLAG_V = VFLAG_CLEAR;\r |
6956 | FLAG_C = CFLAG_CLEAR;\r |
6957 | \r |
6958 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)\r |
6959 | offset++;\r |
6960 | \r |
6961 | REG_D[(word2>>12)&7] = offset;\r |
6962 | \r |
6963 | return;\r |
6964 | }\r |
6965 | m68ki_exception_illegal();\r |
6966 | }\r |
6967 | \r |
6968 | \r |
6969 | void m68k_op_bfins_32_d(void)\r |
6970 | {\r |
6971 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
6972 | {\r |
6973 | uint word2 = OPER_I_16();\r |
6974 | uint offset = (word2>>6)&31;\r |
6975 | uint width = word2;\r |
6976 | uint* data = &DY;\r |
6977 | uint64 mask;\r |
6978 | uint64 insert = REG_D[(word2>>12)&7];\r |
6979 | \r |
6980 | \r |
6981 | if(BIT_B(word2))\r |
6982 | offset = REG_D[offset&7];\r |
6983 | if(BIT_5(word2))\r |
6984 | width = REG_D[width&7];\r |
6985 | \r |
6986 | \r |
6987 | offset &= 31;\r |
6988 | width = ((width-1) & 31) + 1;\r |
6989 | \r |
6990 | \r |
6991 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
6992 | mask = ROR_32(mask, offset);\r |
6993 | \r |
6994 | insert = MASK_OUT_ABOVE_32(insert << (32 - width));\r |
6995 | FLAG_N = NFLAG_32(insert);\r |
6996 | FLAG_Z = insert;\r |
6997 | insert = ROR_32(insert, offset);\r |
6998 | \r |
6999 | FLAG_V = VFLAG_CLEAR;\r |
7000 | FLAG_C = CFLAG_CLEAR;\r |
7001 | \r |
7002 | *data &= ~mask;\r |
7003 | *data |= insert;\r |
7004 | \r |
7005 | return;\r |
7006 | }\r |
7007 | m68ki_exception_illegal();\r |
7008 | }\r |
7009 | \r |
7010 | \r |
7011 | void m68k_op_bfins_32_ai(void)\r |
7012 | {\r |
7013 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7014 | {\r |
7015 | uint word2 = OPER_I_16();\r |
7016 | sint offset = (word2>>6)&31;\r |
7017 | uint width = word2;\r |
7018 | uint insert_base = REG_D[(word2>>12)&7];\r |
7019 | uint insert_long;\r |
7020 | uint insert_byte;\r |
7021 | uint mask_base;\r |
7022 | uint data_long;\r |
7023 | uint mask_long;\r |
7024 | uint data_byte = 0;\r |
7025 | uint mask_byte = 0;\r |
7026 | uint ea = EA_AY_AI_8();\r |
7027 | \r |
7028 | \r |
7029 | if(BIT_B(word2))\r |
7030 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7031 | if(BIT_5(word2))\r |
7032 | width = REG_D[width&7];\r |
7033 | \r |
7034 | /* Offset is signed so we have to use ugly math =( */\r |
7035 | ea += offset / 8;\r |
7036 | offset %= 8;\r |
7037 | if(offset < 0)\r |
7038 | {\r |
7039 | offset += 8;\r |
7040 | ea--;\r |
7041 | }\r |
7042 | width = ((width-1) & 31) + 1;\r |
7043 | \r |
7044 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7045 | mask_long = mask_base >> offset;\r |
7046 | \r |
7047 | insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));\r |
7048 | FLAG_N = NFLAG_32(insert_base);\r |
7049 | FLAG_Z = insert_base;\r |
7050 | insert_long = insert_base >> offset;\r |
7051 | \r |
7052 | data_long = m68ki_read_32(ea);\r |
7053 | FLAG_V = VFLAG_CLEAR;\r |
7054 | FLAG_C = CFLAG_CLEAR;\r |
7055 | \r |
7056 | m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);\r |
7057 | \r |
7058 | if((width + offset) > 32)\r |
7059 | {\r |
7060 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7061 | insert_byte = MASK_OUT_ABOVE_8(insert_base);\r |
7062 | data_byte = m68ki_read_8(ea+4);\r |
7063 | FLAG_Z |= (data_byte & mask_byte);\r |
7064 | m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);\r |
7065 | }\r |
7066 | return;\r |
7067 | }\r |
7068 | m68ki_exception_illegal();\r |
7069 | }\r |
7070 | \r |
7071 | \r |
7072 | void m68k_op_bfins_32_di(void)\r |
7073 | {\r |
7074 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7075 | {\r |
7076 | uint word2 = OPER_I_16();\r |
7077 | sint offset = (word2>>6)&31;\r |
7078 | uint width = word2;\r |
7079 | uint insert_base = REG_D[(word2>>12)&7];\r |
7080 | uint insert_long;\r |
7081 | uint insert_byte;\r |
7082 | uint mask_base;\r |
7083 | uint data_long;\r |
7084 | uint mask_long;\r |
7085 | uint data_byte = 0;\r |
7086 | uint mask_byte = 0;\r |
7087 | uint ea = EA_AY_DI_8();\r |
7088 | \r |
7089 | \r |
7090 | if(BIT_B(word2))\r |
7091 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7092 | if(BIT_5(word2))\r |
7093 | width = REG_D[width&7];\r |
7094 | \r |
7095 | /* Offset is signed so we have to use ugly math =( */\r |
7096 | ea += offset / 8;\r |
7097 | offset %= 8;\r |
7098 | if(offset < 0)\r |
7099 | {\r |
7100 | offset += 8;\r |
7101 | ea--;\r |
7102 | }\r |
7103 | width = ((width-1) & 31) + 1;\r |
7104 | \r |
7105 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7106 | mask_long = mask_base >> offset;\r |
7107 | \r |
7108 | insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));\r |
7109 | FLAG_N = NFLAG_32(insert_base);\r |
7110 | FLAG_Z = insert_base;\r |
7111 | insert_long = insert_base >> offset;\r |
7112 | \r |
7113 | data_long = m68ki_read_32(ea);\r |
7114 | FLAG_V = VFLAG_CLEAR;\r |
7115 | FLAG_C = CFLAG_CLEAR;\r |
7116 | \r |
7117 | m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);\r |
7118 | \r |
7119 | if((width + offset) > 32)\r |
7120 | {\r |
7121 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7122 | insert_byte = MASK_OUT_ABOVE_8(insert_base);\r |
7123 | data_byte = m68ki_read_8(ea+4);\r |
7124 | FLAG_Z |= (data_byte & mask_byte);\r |
7125 | m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);\r |
7126 | }\r |
7127 | return;\r |
7128 | }\r |
7129 | m68ki_exception_illegal();\r |
7130 | }\r |
7131 | \r |
7132 | \r |
7133 | void m68k_op_bfins_32_ix(void)\r |
7134 | {\r |
7135 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7136 | {\r |
7137 | uint word2 = OPER_I_16();\r |
7138 | sint offset = (word2>>6)&31;\r |
7139 | uint width = word2;\r |
7140 | uint insert_base = REG_D[(word2>>12)&7];\r |
7141 | uint insert_long;\r |
7142 | uint insert_byte;\r |
7143 | uint mask_base;\r |
7144 | uint data_long;\r |
7145 | uint mask_long;\r |
7146 | uint data_byte = 0;\r |
7147 | uint mask_byte = 0;\r |
7148 | uint ea = EA_AY_IX_8();\r |
7149 | \r |
7150 | \r |
7151 | if(BIT_B(word2))\r |
7152 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7153 | if(BIT_5(word2))\r |
7154 | width = REG_D[width&7];\r |
7155 | \r |
7156 | /* Offset is signed so we have to use ugly math =( */\r |
7157 | ea += offset / 8;\r |
7158 | offset %= 8;\r |
7159 | if(offset < 0)\r |
7160 | {\r |
7161 | offset += 8;\r |
7162 | ea--;\r |
7163 | }\r |
7164 | width = ((width-1) & 31) + 1;\r |
7165 | \r |
7166 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7167 | mask_long = mask_base >> offset;\r |
7168 | \r |
7169 | insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));\r |
7170 | FLAG_N = NFLAG_32(insert_base);\r |
7171 | FLAG_Z = insert_base;\r |
7172 | insert_long = insert_base >> offset;\r |
7173 | \r |
7174 | data_long = m68ki_read_32(ea);\r |
7175 | FLAG_V = VFLAG_CLEAR;\r |
7176 | FLAG_C = CFLAG_CLEAR;\r |
7177 | \r |
7178 | m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);\r |
7179 | \r |
7180 | if((width + offset) > 32)\r |
7181 | {\r |
7182 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7183 | insert_byte = MASK_OUT_ABOVE_8(insert_base);\r |
7184 | data_byte = m68ki_read_8(ea+4);\r |
7185 | FLAG_Z |= (data_byte & mask_byte);\r |
7186 | m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);\r |
7187 | }\r |
7188 | return;\r |
7189 | }\r |
7190 | m68ki_exception_illegal();\r |
7191 | }\r |
7192 | \r |
7193 | \r |
7194 | void m68k_op_bfins_32_aw(void)\r |
7195 | {\r |
7196 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7197 | {\r |
7198 | uint word2 = OPER_I_16();\r |
7199 | sint offset = (word2>>6)&31;\r |
7200 | uint width = word2;\r |
7201 | uint insert_base = REG_D[(word2>>12)&7];\r |
7202 | uint insert_long;\r |
7203 | uint insert_byte;\r |
7204 | uint mask_base;\r |
7205 | uint data_long;\r |
7206 | uint mask_long;\r |
7207 | uint data_byte = 0;\r |
7208 | uint mask_byte = 0;\r |
7209 | uint ea = EA_AW_8();\r |
7210 | \r |
7211 | \r |
7212 | if(BIT_B(word2))\r |
7213 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7214 | if(BIT_5(word2))\r |
7215 | width = REG_D[width&7];\r |
7216 | \r |
7217 | /* Offset is signed so we have to use ugly math =( */\r |
7218 | ea += offset / 8;\r |
7219 | offset %= 8;\r |
7220 | if(offset < 0)\r |
7221 | {\r |
7222 | offset += 8;\r |
7223 | ea--;\r |
7224 | }\r |
7225 | width = ((width-1) & 31) + 1;\r |
7226 | \r |
7227 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7228 | mask_long = mask_base >> offset;\r |
7229 | \r |
7230 | insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));\r |
7231 | FLAG_N = NFLAG_32(insert_base);\r |
7232 | FLAG_Z = insert_base;\r |
7233 | insert_long = insert_base >> offset;\r |
7234 | \r |
7235 | data_long = m68ki_read_32(ea);\r |
7236 | FLAG_V = VFLAG_CLEAR;\r |
7237 | FLAG_C = CFLAG_CLEAR;\r |
7238 | \r |
7239 | m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);\r |
7240 | \r |
7241 | if((width + offset) > 32)\r |
7242 | {\r |
7243 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7244 | insert_byte = MASK_OUT_ABOVE_8(insert_base);\r |
7245 | data_byte = m68ki_read_8(ea+4);\r |
7246 | FLAG_Z |= (data_byte & mask_byte);\r |
7247 | m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);\r |
7248 | }\r |
7249 | return;\r |
7250 | }\r |
7251 | m68ki_exception_illegal();\r |
7252 | }\r |
7253 | \r |
7254 | \r |
7255 | void m68k_op_bfins_32_al(void)\r |
7256 | {\r |
7257 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7258 | {\r |
7259 | uint word2 = OPER_I_16();\r |
7260 | sint offset = (word2>>6)&31;\r |
7261 | uint width = word2;\r |
7262 | uint insert_base = REG_D[(word2>>12)&7];\r |
7263 | uint insert_long;\r |
7264 | uint insert_byte;\r |
7265 | uint mask_base;\r |
7266 | uint data_long;\r |
7267 | uint mask_long;\r |
7268 | uint data_byte = 0;\r |
7269 | uint mask_byte = 0;\r |
7270 | uint ea = EA_AL_8();\r |
7271 | \r |
7272 | \r |
7273 | if(BIT_B(word2))\r |
7274 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7275 | if(BIT_5(word2))\r |
7276 | width = REG_D[width&7];\r |
7277 | \r |
7278 | /* Offset is signed so we have to use ugly math =( */\r |
7279 | ea += offset / 8;\r |
7280 | offset %= 8;\r |
7281 | if(offset < 0)\r |
7282 | {\r |
7283 | offset += 8;\r |
7284 | ea--;\r |
7285 | }\r |
7286 | width = ((width-1) & 31) + 1;\r |
7287 | \r |
7288 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7289 | mask_long = mask_base >> offset;\r |
7290 | \r |
7291 | insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));\r |
7292 | FLAG_N = NFLAG_32(insert_base);\r |
7293 | FLAG_Z = insert_base;\r |
7294 | insert_long = insert_base >> offset;\r |
7295 | \r |
7296 | data_long = m68ki_read_32(ea);\r |
7297 | FLAG_V = VFLAG_CLEAR;\r |
7298 | FLAG_C = CFLAG_CLEAR;\r |
7299 | \r |
7300 | m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);\r |
7301 | \r |
7302 | if((width + offset) > 32)\r |
7303 | {\r |
7304 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7305 | insert_byte = MASK_OUT_ABOVE_8(insert_base);\r |
7306 | data_byte = m68ki_read_8(ea+4);\r |
7307 | FLAG_Z |= (data_byte & mask_byte);\r |
7308 | m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);\r |
7309 | }\r |
7310 | return;\r |
7311 | }\r |
7312 | m68ki_exception_illegal();\r |
7313 | }\r |
7314 | \r |
7315 | \r |
7316 | void m68k_op_bfset_32_d(void)\r |
7317 | {\r |
7318 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7319 | {\r |
7320 | uint word2 = OPER_I_16();\r |
7321 | uint offset = (word2>>6)&31;\r |
7322 | uint width = word2;\r |
7323 | uint* data = &DY;\r |
7324 | uint64 mask;\r |
7325 | \r |
7326 | \r |
7327 | if(BIT_B(word2))\r |
7328 | offset = REG_D[offset&7];\r |
7329 | if(BIT_5(word2))\r |
7330 | width = REG_D[width&7];\r |
7331 | \r |
7332 | \r |
7333 | offset &= 31;\r |
7334 | width = ((width-1) & 31) + 1;\r |
7335 | \r |
7336 | \r |
7337 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7338 | mask = ROR_32(mask, offset);\r |
7339 | \r |
7340 | FLAG_N = NFLAG_32(*data<<offset);\r |
7341 | FLAG_Z = *data & mask;\r |
7342 | FLAG_V = VFLAG_CLEAR;\r |
7343 | FLAG_C = CFLAG_CLEAR;\r |
7344 | \r |
7345 | *data |= mask;\r |
7346 | \r |
7347 | return;\r |
7348 | }\r |
7349 | m68ki_exception_illegal();\r |
7350 | }\r |
7351 | \r |
7352 | \r |
7353 | void m68k_op_bfset_32_ai(void)\r |
7354 | {\r |
7355 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7356 | {\r |
7357 | uint word2 = OPER_I_16();\r |
7358 | sint offset = (word2>>6)&31;\r |
7359 | uint width = word2;\r |
7360 | uint mask_base;\r |
7361 | uint data_long;\r |
7362 | uint mask_long;\r |
7363 | uint data_byte = 0;\r |
7364 | uint mask_byte = 0;\r |
7365 | uint ea = EA_AY_AI_8();\r |
7366 | \r |
7367 | \r |
7368 | if(BIT_B(word2))\r |
7369 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7370 | if(BIT_5(word2))\r |
7371 | width = REG_D[width&7];\r |
7372 | \r |
7373 | /* Offset is signed so we have to use ugly math =( */\r |
7374 | ea += offset / 8;\r |
7375 | offset %= 8;\r |
7376 | if(offset < 0)\r |
7377 | {\r |
7378 | offset += 8;\r |
7379 | ea--;\r |
7380 | }\r |
7381 | width = ((width-1) & 31) + 1;\r |
7382 | \r |
7383 | \r |
7384 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7385 | mask_long = mask_base >> offset;\r |
7386 | \r |
7387 | data_long = m68ki_read_32(ea);\r |
7388 | FLAG_N = NFLAG_32(data_long << offset);\r |
7389 | FLAG_Z = data_long & mask_long;\r |
7390 | FLAG_V = VFLAG_CLEAR;\r |
7391 | FLAG_C = CFLAG_CLEAR;\r |
7392 | \r |
7393 | m68ki_write_32(ea, data_long | mask_long);\r |
7394 | \r |
7395 | if((width + offset) > 32)\r |
7396 | {\r |
7397 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7398 | data_byte = m68ki_read_8(ea+4);\r |
7399 | FLAG_Z |= (data_byte & mask_byte);\r |
7400 | m68ki_write_8(ea+4, data_byte | mask_byte);\r |
7401 | }\r |
7402 | return;\r |
7403 | }\r |
7404 | m68ki_exception_illegal();\r |
7405 | }\r |
7406 | \r |
7407 | \r |
7408 | void m68k_op_bfset_32_di(void)\r |
7409 | {\r |
7410 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7411 | {\r |
7412 | uint word2 = OPER_I_16();\r |
7413 | sint offset = (word2>>6)&31;\r |
7414 | uint width = word2;\r |
7415 | uint mask_base;\r |
7416 | uint data_long;\r |
7417 | uint mask_long;\r |
7418 | uint data_byte = 0;\r |
7419 | uint mask_byte = 0;\r |
7420 | uint ea = EA_AY_DI_8();\r |
7421 | \r |
7422 | \r |
7423 | if(BIT_B(word2))\r |
7424 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7425 | if(BIT_5(word2))\r |
7426 | width = REG_D[width&7];\r |
7427 | \r |
7428 | /* Offset is signed so we have to use ugly math =( */\r |
7429 | ea += offset / 8;\r |
7430 | offset %= 8;\r |
7431 | if(offset < 0)\r |
7432 | {\r |
7433 | offset += 8;\r |
7434 | ea--;\r |
7435 | }\r |
7436 | width = ((width-1) & 31) + 1;\r |
7437 | \r |
7438 | \r |
7439 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7440 | mask_long = mask_base >> offset;\r |
7441 | \r |
7442 | data_long = m68ki_read_32(ea);\r |
7443 | FLAG_N = NFLAG_32(data_long << offset);\r |
7444 | FLAG_Z = data_long & mask_long;\r |
7445 | FLAG_V = VFLAG_CLEAR;\r |
7446 | FLAG_C = CFLAG_CLEAR;\r |
7447 | \r |
7448 | m68ki_write_32(ea, data_long | mask_long);\r |
7449 | \r |
7450 | if((width + offset) > 32)\r |
7451 | {\r |
7452 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7453 | data_byte = m68ki_read_8(ea+4);\r |
7454 | FLAG_Z |= (data_byte & mask_byte);\r |
7455 | m68ki_write_8(ea+4, data_byte | mask_byte);\r |
7456 | }\r |
7457 | return;\r |
7458 | }\r |
7459 | m68ki_exception_illegal();\r |
7460 | }\r |
7461 | \r |
7462 | \r |
7463 | void m68k_op_bfset_32_ix(void)\r |
7464 | {\r |
7465 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7466 | {\r |
7467 | uint word2 = OPER_I_16();\r |
7468 | sint offset = (word2>>6)&31;\r |
7469 | uint width = word2;\r |
7470 | uint mask_base;\r |
7471 | uint data_long;\r |
7472 | uint mask_long;\r |
7473 | uint data_byte = 0;\r |
7474 | uint mask_byte = 0;\r |
7475 | uint ea = EA_AY_IX_8();\r |
7476 | \r |
7477 | \r |
7478 | if(BIT_B(word2))\r |
7479 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7480 | if(BIT_5(word2))\r |
7481 | width = REG_D[width&7];\r |
7482 | \r |
7483 | /* Offset is signed so we have to use ugly math =( */\r |
7484 | ea += offset / 8;\r |
7485 | offset %= 8;\r |
7486 | if(offset < 0)\r |
7487 | {\r |
7488 | offset += 8;\r |
7489 | ea--;\r |
7490 | }\r |
7491 | width = ((width-1) & 31) + 1;\r |
7492 | \r |
7493 | \r |
7494 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7495 | mask_long = mask_base >> offset;\r |
7496 | \r |
7497 | data_long = m68ki_read_32(ea);\r |
7498 | FLAG_N = NFLAG_32(data_long << offset);\r |
7499 | FLAG_Z = data_long & mask_long;\r |
7500 | FLAG_V = VFLAG_CLEAR;\r |
7501 | FLAG_C = CFLAG_CLEAR;\r |
7502 | \r |
7503 | m68ki_write_32(ea, data_long | mask_long);\r |
7504 | \r |
7505 | if((width + offset) > 32)\r |
7506 | {\r |
7507 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7508 | data_byte = m68ki_read_8(ea+4);\r |
7509 | FLAG_Z |= (data_byte & mask_byte);\r |
7510 | m68ki_write_8(ea+4, data_byte | mask_byte);\r |
7511 | }\r |
7512 | return;\r |
7513 | }\r |
7514 | m68ki_exception_illegal();\r |
7515 | }\r |
7516 | \r |
7517 | \r |
7518 | void m68k_op_bfset_32_aw(void)\r |
7519 | {\r |
7520 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7521 | {\r |
7522 | uint word2 = OPER_I_16();\r |
7523 | sint offset = (word2>>6)&31;\r |
7524 | uint width = word2;\r |
7525 | uint mask_base;\r |
7526 | uint data_long;\r |
7527 | uint mask_long;\r |
7528 | uint data_byte = 0;\r |
7529 | uint mask_byte = 0;\r |
7530 | uint ea = EA_AW_8();\r |
7531 | \r |
7532 | \r |
7533 | if(BIT_B(word2))\r |
7534 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7535 | if(BIT_5(word2))\r |
7536 | width = REG_D[width&7];\r |
7537 | \r |
7538 | /* Offset is signed so we have to use ugly math =( */\r |
7539 | ea += offset / 8;\r |
7540 | offset %= 8;\r |
7541 | if(offset < 0)\r |
7542 | {\r |
7543 | offset += 8;\r |
7544 | ea--;\r |
7545 | }\r |
7546 | width = ((width-1) & 31) + 1;\r |
7547 | \r |
7548 | \r |
7549 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7550 | mask_long = mask_base >> offset;\r |
7551 | \r |
7552 | data_long = m68ki_read_32(ea);\r |
7553 | FLAG_N = NFLAG_32(data_long << offset);\r |
7554 | FLAG_Z = data_long & mask_long;\r |
7555 | FLAG_V = VFLAG_CLEAR;\r |
7556 | FLAG_C = CFLAG_CLEAR;\r |
7557 | \r |
7558 | m68ki_write_32(ea, data_long | mask_long);\r |
7559 | \r |
7560 | if((width + offset) > 32)\r |
7561 | {\r |
7562 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7563 | data_byte = m68ki_read_8(ea+4);\r |
7564 | FLAG_Z |= (data_byte & mask_byte);\r |
7565 | m68ki_write_8(ea+4, data_byte | mask_byte);\r |
7566 | }\r |
7567 | return;\r |
7568 | }\r |
7569 | m68ki_exception_illegal();\r |
7570 | }\r |
7571 | \r |
7572 | \r |
7573 | void m68k_op_bfset_32_al(void)\r |
7574 | {\r |
7575 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7576 | {\r |
7577 | uint word2 = OPER_I_16();\r |
7578 | sint offset = (word2>>6)&31;\r |
7579 | uint width = word2;\r |
7580 | uint mask_base;\r |
7581 | uint data_long;\r |
7582 | uint mask_long;\r |
7583 | uint data_byte = 0;\r |
7584 | uint mask_byte = 0;\r |
7585 | uint ea = EA_AL_8();\r |
7586 | \r |
7587 | \r |
7588 | if(BIT_B(word2))\r |
7589 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7590 | if(BIT_5(word2))\r |
7591 | width = REG_D[width&7];\r |
7592 | \r |
7593 | /* Offset is signed so we have to use ugly math =( */\r |
7594 | ea += offset / 8;\r |
7595 | offset %= 8;\r |
7596 | if(offset < 0)\r |
7597 | {\r |
7598 | offset += 8;\r |
7599 | ea--;\r |
7600 | }\r |
7601 | width = ((width-1) & 31) + 1;\r |
7602 | \r |
7603 | \r |
7604 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7605 | mask_long = mask_base >> offset;\r |
7606 | \r |
7607 | data_long = m68ki_read_32(ea);\r |
7608 | FLAG_N = NFLAG_32(data_long << offset);\r |
7609 | FLAG_Z = data_long & mask_long;\r |
7610 | FLAG_V = VFLAG_CLEAR;\r |
7611 | FLAG_C = CFLAG_CLEAR;\r |
7612 | \r |
7613 | m68ki_write_32(ea, data_long | mask_long);\r |
7614 | \r |
7615 | if((width + offset) > 32)\r |
7616 | {\r |
7617 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7618 | data_byte = m68ki_read_8(ea+4);\r |
7619 | FLAG_Z |= (data_byte & mask_byte);\r |
7620 | m68ki_write_8(ea+4, data_byte | mask_byte);\r |
7621 | }\r |
7622 | return;\r |
7623 | }\r |
7624 | m68ki_exception_illegal();\r |
7625 | }\r |
7626 | \r |
7627 | \r |
7628 | void m68k_op_bftst_32_d(void)\r |
7629 | {\r |
7630 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7631 | {\r |
7632 | uint word2 = OPER_I_16();\r |
7633 | uint offset = (word2>>6)&31;\r |
7634 | uint width = word2;\r |
7635 | uint* data = &DY;\r |
7636 | uint64 mask;\r |
7637 | \r |
7638 | \r |
7639 | if(BIT_B(word2))\r |
7640 | offset = REG_D[offset&7];\r |
7641 | if(BIT_5(word2))\r |
7642 | width = REG_D[width&7];\r |
7643 | \r |
7644 | \r |
7645 | offset &= 31;\r |
7646 | width = ((width-1) & 31) + 1;\r |
7647 | \r |
7648 | \r |
7649 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7650 | mask = ROR_32(mask, offset);\r |
7651 | \r |
7652 | FLAG_N = NFLAG_32(*data<<offset);\r |
7653 | FLAG_Z = *data & mask;\r |
7654 | FLAG_V = VFLAG_CLEAR;\r |
7655 | FLAG_C = CFLAG_CLEAR;\r |
7656 | \r |
7657 | return;\r |
7658 | }\r |
7659 | m68ki_exception_illegal();\r |
7660 | }\r |
7661 | \r |
7662 | \r |
7663 | void m68k_op_bftst_32_ai(void)\r |
7664 | {\r |
7665 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7666 | {\r |
7667 | uint word2 = OPER_I_16();\r |
7668 | sint offset = (word2>>6)&31;\r |
7669 | uint width = word2;\r |
7670 | uint mask_base;\r |
7671 | uint data_long;\r |
7672 | uint mask_long;\r |
7673 | uint data_byte = 0;\r |
7674 | uint mask_byte = 0;\r |
7675 | uint ea = EA_AY_AI_8();\r |
7676 | \r |
7677 | if(BIT_B(word2))\r |
7678 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7679 | if(BIT_5(word2))\r |
7680 | width = REG_D[width&7];\r |
7681 | \r |
7682 | /* Offset is signed so we have to use ugly math =( */\r |
7683 | ea += offset / 8;\r |
7684 | offset %= 8;\r |
7685 | if(offset < 0)\r |
7686 | {\r |
7687 | offset += 8;\r |
7688 | ea--;\r |
7689 | }\r |
7690 | width = ((width-1) & 31) + 1;\r |
7691 | \r |
7692 | \r |
7693 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7694 | mask_long = mask_base >> offset;\r |
7695 | \r |
7696 | data_long = m68ki_read_32(ea);\r |
7697 | FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;\r |
7698 | FLAG_Z = data_long & mask_long;\r |
7699 | FLAG_V = VFLAG_CLEAR;\r |
7700 | FLAG_C = CFLAG_CLEAR;\r |
7701 | \r |
7702 | if((width + offset) > 32)\r |
7703 | {\r |
7704 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7705 | data_byte = m68ki_read_8(ea+4);\r |
7706 | FLAG_Z |= (data_byte & mask_byte);\r |
7707 | }\r |
7708 | return;\r |
7709 | }\r |
7710 | m68ki_exception_illegal();\r |
7711 | }\r |
7712 | \r |
7713 | \r |
7714 | void m68k_op_bftst_32_di(void)\r |
7715 | {\r |
7716 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7717 | {\r |
7718 | uint word2 = OPER_I_16();\r |
7719 | sint offset = (word2>>6)&31;\r |
7720 | uint width = word2;\r |
7721 | uint mask_base;\r |
7722 | uint data_long;\r |
7723 | uint mask_long;\r |
7724 | uint data_byte = 0;\r |
7725 | uint mask_byte = 0;\r |
7726 | uint ea = EA_AY_DI_8();\r |
7727 | \r |
7728 | if(BIT_B(word2))\r |
7729 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7730 | if(BIT_5(word2))\r |
7731 | width = REG_D[width&7];\r |
7732 | \r |
7733 | /* Offset is signed so we have to use ugly math =( */\r |
7734 | ea += offset / 8;\r |
7735 | offset %= 8;\r |
7736 | if(offset < 0)\r |
7737 | {\r |
7738 | offset += 8;\r |
7739 | ea--;\r |
7740 | }\r |
7741 | width = ((width-1) & 31) + 1;\r |
7742 | \r |
7743 | \r |
7744 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7745 | mask_long = mask_base >> offset;\r |
7746 | \r |
7747 | data_long = m68ki_read_32(ea);\r |
7748 | FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;\r |
7749 | FLAG_Z = data_long & mask_long;\r |
7750 | FLAG_V = VFLAG_CLEAR;\r |
7751 | FLAG_C = CFLAG_CLEAR;\r |
7752 | \r |
7753 | if((width + offset) > 32)\r |
7754 | {\r |
7755 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7756 | data_byte = m68ki_read_8(ea+4);\r |
7757 | FLAG_Z |= (data_byte & mask_byte);\r |
7758 | }\r |
7759 | return;\r |
7760 | }\r |
7761 | m68ki_exception_illegal();\r |
7762 | }\r |
7763 | \r |
7764 | \r |
7765 | void m68k_op_bftst_32_ix(void)\r |
7766 | {\r |
7767 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7768 | {\r |
7769 | uint word2 = OPER_I_16();\r |
7770 | sint offset = (word2>>6)&31;\r |
7771 | uint width = word2;\r |
7772 | uint mask_base;\r |
7773 | uint data_long;\r |
7774 | uint mask_long;\r |
7775 | uint data_byte = 0;\r |
7776 | uint mask_byte = 0;\r |
7777 | uint ea = EA_AY_IX_8();\r |
7778 | \r |
7779 | if(BIT_B(word2))\r |
7780 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7781 | if(BIT_5(word2))\r |
7782 | width = REG_D[width&7];\r |
7783 | \r |
7784 | /* Offset is signed so we have to use ugly math =( */\r |
7785 | ea += offset / 8;\r |
7786 | offset %= 8;\r |
7787 | if(offset < 0)\r |
7788 | {\r |
7789 | offset += 8;\r |
7790 | ea--;\r |
7791 | }\r |
7792 | width = ((width-1) & 31) + 1;\r |
7793 | \r |
7794 | \r |
7795 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7796 | mask_long = mask_base >> offset;\r |
7797 | \r |
7798 | data_long = m68ki_read_32(ea);\r |
7799 | FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;\r |
7800 | FLAG_Z = data_long & mask_long;\r |
7801 | FLAG_V = VFLAG_CLEAR;\r |
7802 | FLAG_C = CFLAG_CLEAR;\r |
7803 | \r |
7804 | if((width + offset) > 32)\r |
7805 | {\r |
7806 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7807 | data_byte = m68ki_read_8(ea+4);\r |
7808 | FLAG_Z |= (data_byte & mask_byte);\r |
7809 | }\r |
7810 | return;\r |
7811 | }\r |
7812 | m68ki_exception_illegal();\r |
7813 | }\r |
7814 | \r |
7815 | \r |
7816 | void m68k_op_bftst_32_aw(void)\r |
7817 | {\r |
7818 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7819 | {\r |
7820 | uint word2 = OPER_I_16();\r |
7821 | sint offset = (word2>>6)&31;\r |
7822 | uint width = word2;\r |
7823 | uint mask_base;\r |
7824 | uint data_long;\r |
7825 | uint mask_long;\r |
7826 | uint data_byte = 0;\r |
7827 | uint mask_byte = 0;\r |
7828 | uint ea = EA_AW_8();\r |
7829 | \r |
7830 | if(BIT_B(word2))\r |
7831 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7832 | if(BIT_5(word2))\r |
7833 | width = REG_D[width&7];\r |
7834 | \r |
7835 | /* Offset is signed so we have to use ugly math =( */\r |
7836 | ea += offset / 8;\r |
7837 | offset %= 8;\r |
7838 | if(offset < 0)\r |
7839 | {\r |
7840 | offset += 8;\r |
7841 | ea--;\r |
7842 | }\r |
7843 | width = ((width-1) & 31) + 1;\r |
7844 | \r |
7845 | \r |
7846 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7847 | mask_long = mask_base >> offset;\r |
7848 | \r |
7849 | data_long = m68ki_read_32(ea);\r |
7850 | FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;\r |
7851 | FLAG_Z = data_long & mask_long;\r |
7852 | FLAG_V = VFLAG_CLEAR;\r |
7853 | FLAG_C = CFLAG_CLEAR;\r |
7854 | \r |
7855 | if((width + offset) > 32)\r |
7856 | {\r |
7857 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7858 | data_byte = m68ki_read_8(ea+4);\r |
7859 | FLAG_Z |= (data_byte & mask_byte);\r |
7860 | }\r |
7861 | return;\r |
7862 | }\r |
7863 | m68ki_exception_illegal();\r |
7864 | }\r |
7865 | \r |
7866 | \r |
7867 | void m68k_op_bftst_32_al(void)\r |
7868 | {\r |
7869 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7870 | {\r |
7871 | uint word2 = OPER_I_16();\r |
7872 | sint offset = (word2>>6)&31;\r |
7873 | uint width = word2;\r |
7874 | uint mask_base;\r |
7875 | uint data_long;\r |
7876 | uint mask_long;\r |
7877 | uint data_byte = 0;\r |
7878 | uint mask_byte = 0;\r |
7879 | uint ea = EA_AL_8();\r |
7880 | \r |
7881 | if(BIT_B(word2))\r |
7882 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7883 | if(BIT_5(word2))\r |
7884 | width = REG_D[width&7];\r |
7885 | \r |
7886 | /* Offset is signed so we have to use ugly math =( */\r |
7887 | ea += offset / 8;\r |
7888 | offset %= 8;\r |
7889 | if(offset < 0)\r |
7890 | {\r |
7891 | offset += 8;\r |
7892 | ea--;\r |
7893 | }\r |
7894 | width = ((width-1) & 31) + 1;\r |
7895 | \r |
7896 | \r |
7897 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7898 | mask_long = mask_base >> offset;\r |
7899 | \r |
7900 | data_long = m68ki_read_32(ea);\r |
7901 | FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;\r |
7902 | FLAG_Z = data_long & mask_long;\r |
7903 | FLAG_V = VFLAG_CLEAR;\r |
7904 | FLAG_C = CFLAG_CLEAR;\r |
7905 | \r |
7906 | if((width + offset) > 32)\r |
7907 | {\r |
7908 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7909 | data_byte = m68ki_read_8(ea+4);\r |
7910 | FLAG_Z |= (data_byte & mask_byte);\r |
7911 | }\r |
7912 | return;\r |
7913 | }\r |
7914 | m68ki_exception_illegal();\r |
7915 | }\r |
7916 | \r |
7917 | \r |
7918 | void m68k_op_bftst_32_pcdi(void)\r |
7919 | {\r |
7920 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7921 | {\r |
7922 | uint word2 = OPER_I_16();\r |
7923 | sint offset = (word2>>6)&31;\r |
7924 | uint width = word2;\r |
7925 | uint mask_base;\r |
7926 | uint data_long;\r |
7927 | uint mask_long;\r |
7928 | uint data_byte = 0;\r |
7929 | uint mask_byte = 0;\r |
7930 | uint ea = EA_PCDI_8();\r |
7931 | \r |
7932 | if(BIT_B(word2))\r |
7933 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7934 | if(BIT_5(word2))\r |
7935 | width = REG_D[width&7];\r |
7936 | \r |
7937 | /* Offset is signed so we have to use ugly math =( */\r |
7938 | ea += offset / 8;\r |
7939 | offset %= 8;\r |
7940 | if(offset < 0)\r |
7941 | {\r |
7942 | offset += 8;\r |
7943 | ea--;\r |
7944 | }\r |
7945 | width = ((width-1) & 31) + 1;\r |
7946 | \r |
7947 | \r |
7948 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
7949 | mask_long = mask_base >> offset;\r |
7950 | \r |
7951 | data_long = m68ki_read_32(ea);\r |
7952 | FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;\r |
7953 | FLAG_Z = data_long & mask_long;\r |
7954 | FLAG_V = VFLAG_CLEAR;\r |
7955 | FLAG_C = CFLAG_CLEAR;\r |
7956 | \r |
7957 | if((width + offset) > 32)\r |
7958 | {\r |
7959 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
7960 | data_byte = m68ki_read_8(ea+4);\r |
7961 | FLAG_Z |= (data_byte & mask_byte);\r |
7962 | }\r |
7963 | return;\r |
7964 | }\r |
7965 | m68ki_exception_illegal();\r |
7966 | }\r |
7967 | \r |
7968 | \r |
7969 | void m68k_op_bftst_32_pcix(void)\r |
7970 | {\r |
7971 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7972 | {\r |
7973 | uint word2 = OPER_I_16();\r |
7974 | sint offset = (word2>>6)&31;\r |
7975 | uint width = word2;\r |
7976 | uint mask_base;\r |
7977 | uint data_long;\r |
7978 | uint mask_long;\r |
7979 | uint data_byte = 0;\r |
7980 | uint mask_byte = 0;\r |
7981 | uint ea = EA_PCIX_8();\r |
7982 | \r |
7983 | if(BIT_B(word2))\r |
7984 | offset = MAKE_INT_32(REG_D[offset&7]);\r |
7985 | if(BIT_5(word2))\r |
7986 | width = REG_D[width&7];\r |
7987 | \r |
7988 | /* Offset is signed so we have to use ugly math =( */\r |
7989 | ea += offset / 8;\r |
7990 | offset %= 8;\r |
7991 | if(offset < 0)\r |
7992 | {\r |
7993 | offset += 8;\r |
7994 | ea--;\r |
7995 | }\r |
7996 | width = ((width-1) & 31) + 1;\r |
7997 | \r |
7998 | \r |
7999 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));\r |
8000 | mask_long = mask_base >> offset;\r |
8001 | \r |
8002 | data_long = m68ki_read_32(ea);\r |
8003 | FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;\r |
8004 | FLAG_Z = data_long & mask_long;\r |
8005 | FLAG_V = VFLAG_CLEAR;\r |
8006 | FLAG_C = CFLAG_CLEAR;\r |
8007 | \r |
8008 | if((width + offset) > 32)\r |
8009 | {\r |
8010 | mask_byte = MASK_OUT_ABOVE_8(mask_base);\r |
8011 | data_byte = m68ki_read_8(ea+4);\r |
8012 | FLAG_Z |= (data_byte & mask_byte);\r |
8013 | }\r |
8014 | return;\r |
8015 | }\r |
8016 | m68ki_exception_illegal();\r |
8017 | }\r |
8018 | \r |
8019 | \r |
8020 | void m68k_op_bkpt(void)\r |
8021 | {\r |
8022 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
8023 | {\r |
8024 | m68ki_bkpt_ack(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE) ? REG_IR & 7 : 0); /* auto-disable (see m68kcpu.h) */\r |
8025 | }\r |
8026 | m68ki_exception_illegal();\r |
8027 | }\r |
8028 | \r |
8029 | \r |
8030 | void m68k_op_bra_8(void)\r |
8031 | {\r |
8032 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8033 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
8034 | // if(REG_PC == REG_PPC)\r |
8035 | // USE_ALL_CYCLES();\r |
8036 | }\r |
8037 | \r |
8038 | \r |
8039 | void m68k_op_bra_16(void)\r |
8040 | {\r |
8041 | uint offset = OPER_I_16();\r |
8042 | REG_PC -= 2;\r |
8043 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8044 | m68ki_branch_16(offset);\r |
8045 | // if(REG_PC == REG_PPC)\r |
8046 | // USE_ALL_CYCLES();\r |
8047 | }\r |
8048 | \r |
8049 | \r |
8050 | void m68k_op_bra_32(void)\r |
8051 | {\r |
8052 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8053 | {\r |
8054 | uint offset = OPER_I_32();\r |
8055 | REG_PC -= 4;\r |
8056 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8057 | m68ki_branch_32(offset);\r |
8058 | if(REG_PC == REG_PPC)\r |
8059 | USE_ALL_CYCLES();\r |
8060 | return;\r |
8061 | }\r |
8062 | else\r |
8063 | {\r |
8064 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8065 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
8066 | // if(REG_PC == REG_PPC)\r |
8067 | // USE_ALL_CYCLES();\r |
8068 | }\r |
8069 | }\r |
8070 | \r |
8071 | \r |
8072 | void m68k_op_bset_32_r_d(void)\r |
8073 | {\r |
8074 | uint* r_dst = &DY;\r |
8075 | uint mask = 1 << (DX & 0x1f);\r |
8076 | \r |
8077 | FLAG_Z = *r_dst & mask;\r |
8078 | *r_dst |= mask;\r |
8079 | }\r |
8080 | \r |
8081 | \r |
8082 | void m68k_op_bset_8_r_ai(void)\r |
8083 | {\r |
8084 | uint ea = EA_AY_AI_8();\r |
8085 | uint src = m68ki_read_8(ea);\r |
8086 | uint mask = 1 << (DX & 7);\r |
8087 | \r |
8088 | FLAG_Z = src & mask;\r |
8089 | m68ki_write_8(ea, src | mask);\r |
8090 | }\r |
8091 | \r |
8092 | \r |
8093 | void m68k_op_bset_8_r_pi(void)\r |
8094 | {\r |
8095 | uint ea = EA_AY_PI_8();\r |
8096 | uint src = m68ki_read_8(ea);\r |
8097 | uint mask = 1 << (DX & 7);\r |
8098 | \r |
8099 | FLAG_Z = src & mask;\r |
8100 | m68ki_write_8(ea, src | mask);\r |
8101 | }\r |
8102 | \r |
8103 | \r |
8104 | void m68k_op_bset_8_r_pi7(void)\r |
8105 | {\r |
8106 | uint ea = EA_A7_PI_8();\r |
8107 | uint src = m68ki_read_8(ea);\r |
8108 | uint mask = 1 << (DX & 7);\r |
8109 | \r |
8110 | FLAG_Z = src & mask;\r |
8111 | m68ki_write_8(ea, src | mask);\r |
8112 | }\r |
8113 | \r |
8114 | \r |
8115 | void m68k_op_bset_8_r_pd(void)\r |
8116 | {\r |
8117 | uint ea = EA_AY_PD_8();\r |
8118 | uint src = m68ki_read_8(ea);\r |
8119 | uint mask = 1 << (DX & 7);\r |
8120 | \r |
8121 | FLAG_Z = src & mask;\r |
8122 | m68ki_write_8(ea, src | mask);\r |
8123 | }\r |
8124 | \r |
8125 | \r |
8126 | void m68k_op_bset_8_r_pd7(void)\r |
8127 | {\r |
8128 | uint ea = EA_A7_PD_8();\r |
8129 | uint src = m68ki_read_8(ea);\r |
8130 | uint mask = 1 << (DX & 7);\r |
8131 | \r |
8132 | FLAG_Z = src & mask;\r |
8133 | m68ki_write_8(ea, src | mask);\r |
8134 | }\r |
8135 | \r |
8136 | \r |
8137 | void m68k_op_bset_8_r_di(void)\r |
8138 | {\r |
8139 | uint ea = EA_AY_DI_8();\r |
8140 | uint src = m68ki_read_8(ea);\r |
8141 | uint mask = 1 << (DX & 7);\r |
8142 | \r |
8143 | FLAG_Z = src & mask;\r |
8144 | m68ki_write_8(ea, src | mask);\r |
8145 | }\r |
8146 | \r |
8147 | \r |
8148 | void m68k_op_bset_8_r_ix(void)\r |
8149 | {\r |
8150 | uint ea = EA_AY_IX_8();\r |
8151 | uint src = m68ki_read_8(ea);\r |
8152 | uint mask = 1 << (DX & 7);\r |
8153 | \r |
8154 | FLAG_Z = src & mask;\r |
8155 | m68ki_write_8(ea, src | mask);\r |
8156 | }\r |
8157 | \r |
8158 | \r |
8159 | void m68k_op_bset_8_r_aw(void)\r |
8160 | {\r |
8161 | uint ea = EA_AW_8();\r |
8162 | uint src = m68ki_read_8(ea);\r |
8163 | uint mask = 1 << (DX & 7);\r |
8164 | \r |
8165 | FLAG_Z = src & mask;\r |
8166 | m68ki_write_8(ea, src | mask);\r |
8167 | }\r |
8168 | \r |
8169 | \r |
8170 | void m68k_op_bset_8_r_al(void)\r |
8171 | {\r |
8172 | uint ea = EA_AL_8();\r |
8173 | uint src = m68ki_read_8(ea);\r |
8174 | uint mask = 1 << (DX & 7);\r |
8175 | \r |
8176 | FLAG_Z = src & mask;\r |
8177 | m68ki_write_8(ea, src | mask);\r |
8178 | }\r |
8179 | \r |
8180 | \r |
8181 | void m68k_op_bset_32_s_d(void)\r |
8182 | {\r |
8183 | uint* r_dst = &DY;\r |
8184 | uint mask = 1 << (OPER_I_8() & 0x1f);\r |
8185 | \r |
8186 | FLAG_Z = *r_dst & mask;\r |
8187 | *r_dst |= mask;\r |
8188 | }\r |
8189 | \r |
8190 | \r |
8191 | void m68k_op_bset_8_s_ai(void)\r |
8192 | {\r |
8193 | uint mask = 1 << (OPER_I_8() & 7);\r |
8194 | uint ea = EA_AY_AI_8();\r |
8195 | uint src = m68ki_read_8(ea);\r |
8196 | \r |
8197 | FLAG_Z = src & mask;\r |
8198 | m68ki_write_8(ea, src | mask);\r |
8199 | }\r |
8200 | \r |
8201 | \r |
8202 | void m68k_op_bset_8_s_pi(void)\r |
8203 | {\r |
8204 | uint mask = 1 << (OPER_I_8() & 7);\r |
8205 | uint ea = EA_AY_PI_8();\r |
8206 | uint src = m68ki_read_8(ea);\r |
8207 | \r |
8208 | FLAG_Z = src & mask;\r |
8209 | m68ki_write_8(ea, src | mask);\r |
8210 | }\r |
8211 | \r |
8212 | \r |
8213 | void m68k_op_bset_8_s_pi7(void)\r |
8214 | {\r |
8215 | uint mask = 1 << (OPER_I_8() & 7);\r |
8216 | uint ea = EA_A7_PI_8();\r |
8217 | uint src = m68ki_read_8(ea);\r |
8218 | \r |
8219 | FLAG_Z = src & mask;\r |
8220 | m68ki_write_8(ea, src | mask);\r |
8221 | }\r |
8222 | \r |
8223 | \r |
8224 | void m68k_op_bset_8_s_pd(void)\r |
8225 | {\r |
8226 | uint mask = 1 << (OPER_I_8() & 7);\r |
8227 | uint ea = EA_AY_PD_8();\r |
8228 | uint src = m68ki_read_8(ea);\r |
8229 | \r |
8230 | FLAG_Z = src & mask;\r |
8231 | m68ki_write_8(ea, src | mask);\r |
8232 | }\r |
8233 | \r |
8234 | \r |
8235 | void m68k_op_bset_8_s_pd7(void)\r |
8236 | {\r |
8237 | uint mask = 1 << (OPER_I_8() & 7);\r |
8238 | uint ea = EA_A7_PD_8();\r |
8239 | uint src = m68ki_read_8(ea);\r |
8240 | \r |
8241 | FLAG_Z = src & mask;\r |
8242 | m68ki_write_8(ea, src | mask);\r |
8243 | }\r |
8244 | \r |
8245 | \r |
8246 | void m68k_op_bset_8_s_di(void)\r |
8247 | {\r |
8248 | uint mask = 1 << (OPER_I_8() & 7);\r |
8249 | uint ea = EA_AY_DI_8();\r |
8250 | uint src = m68ki_read_8(ea);\r |
8251 | \r |
8252 | FLAG_Z = src & mask;\r |
8253 | m68ki_write_8(ea, src | mask);\r |
8254 | }\r |
8255 | \r |
8256 | \r |
8257 | void m68k_op_bset_8_s_ix(void)\r |
8258 | {\r |
8259 | uint mask = 1 << (OPER_I_8() & 7);\r |
8260 | uint ea = EA_AY_IX_8();\r |
8261 | uint src = m68ki_read_8(ea);\r |
8262 | \r |
8263 | FLAG_Z = src & mask;\r |
8264 | m68ki_write_8(ea, src | mask);\r |
8265 | }\r |
8266 | \r |
8267 | \r |
8268 | void m68k_op_bset_8_s_aw(void)\r |
8269 | {\r |
8270 | uint mask = 1 << (OPER_I_8() & 7);\r |
8271 | uint ea = EA_AW_8();\r |
8272 | uint src = m68ki_read_8(ea);\r |
8273 | \r |
8274 | FLAG_Z = src & mask;\r |
8275 | m68ki_write_8(ea, src | mask);\r |
8276 | }\r |
8277 | \r |
8278 | \r |
8279 | void m68k_op_bset_8_s_al(void)\r |
8280 | {\r |
8281 | uint mask = 1 << (OPER_I_8() & 7);\r |
8282 | uint ea = EA_AL_8();\r |
8283 | uint src = m68ki_read_8(ea);\r |
8284 | \r |
8285 | FLAG_Z = src & mask;\r |
8286 | m68ki_write_8(ea, src | mask);\r |
8287 | }\r |
8288 | \r |
8289 | \r |
8290 | void m68k_op_bsr_8(void)\r |
8291 | {\r |
8292 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8293 | m68ki_push_32(REG_PC);\r |
8294 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
8295 | }\r |
8296 | \r |
8297 | \r |
8298 | void m68k_op_bsr_16(void)\r |
8299 | {\r |
8300 | uint offset = OPER_I_16();\r |
8301 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8302 | m68ki_push_32(REG_PC);\r |
8303 | REG_PC -= 2;\r |
8304 | m68ki_branch_16(offset);\r |
8305 | }\r |
8306 | \r |
8307 | \r |
8308 | void m68k_op_bsr_32(void)\r |
8309 | {\r |
8310 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8311 | {\r |
8312 | uint offset = OPER_I_32();\r |
8313 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8314 | m68ki_push_32(REG_PC);\r |
8315 | REG_PC -= 4;\r |
8316 | m68ki_branch_32(offset);\r |
8317 | return;\r |
8318 | }\r |
8319 | else\r |
8320 | {\r |
8321 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8322 | m68ki_push_32(REG_PC);\r |
8323 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));\r |
8324 | }\r |
8325 | }\r |
8326 | \r |
8327 | \r |
8328 | void m68k_op_btst_32_r_d(void)\r |
8329 | {\r |
8330 | FLAG_Z = DY & (1 << (DX & 0x1f));\r |
8331 | }\r |
8332 | \r |
8333 | \r |
8334 | void m68k_op_btst_8_r_ai(void)\r |
8335 | {\r |
8336 | FLAG_Z = OPER_AY_AI_8() & (1 << (DX & 7));\r |
8337 | }\r |
8338 | \r |
8339 | \r |
8340 | void m68k_op_btst_8_r_pi(void)\r |
8341 | {\r |
8342 | FLAG_Z = OPER_AY_PI_8() & (1 << (DX & 7));\r |
8343 | }\r |
8344 | \r |
8345 | \r |
8346 | void m68k_op_btst_8_r_pi7(void)\r |
8347 | {\r |
8348 | FLAG_Z = OPER_A7_PI_8() & (1 << (DX & 7));\r |
8349 | }\r |
8350 | \r |
8351 | \r |
8352 | void m68k_op_btst_8_r_pd(void)\r |
8353 | {\r |
8354 | FLAG_Z = OPER_AY_PD_8() & (1 << (DX & 7));\r |
8355 | }\r |
8356 | \r |
8357 | \r |
8358 | void m68k_op_btst_8_r_pd7(void)\r |
8359 | {\r |
8360 | FLAG_Z = OPER_A7_PD_8() & (1 << (DX & 7));\r |
8361 | }\r |
8362 | \r |
8363 | \r |
8364 | void m68k_op_btst_8_r_di(void)\r |
8365 | {\r |
8366 | FLAG_Z = OPER_AY_DI_8() & (1 << (DX & 7));\r |
8367 | }\r |
8368 | \r |
8369 | \r |
8370 | void m68k_op_btst_8_r_ix(void)\r |
8371 | {\r |
8372 | FLAG_Z = OPER_AY_IX_8() & (1 << (DX & 7));\r |
8373 | }\r |
8374 | \r |
8375 | \r |
8376 | void m68k_op_btst_8_r_aw(void)\r |
8377 | {\r |
8378 | FLAG_Z = OPER_AW_8() & (1 << (DX & 7));\r |
8379 | }\r |
8380 | \r |
8381 | \r |
8382 | void m68k_op_btst_8_r_al(void)\r |
8383 | {\r |
8384 | FLAG_Z = OPER_AL_8() & (1 << (DX & 7));\r |
8385 | }\r |
8386 | \r |
8387 | \r |
8388 | void m68k_op_btst_8_r_pcdi(void)\r |
8389 | {\r |
8390 | FLAG_Z = OPER_PCDI_8() & (1 << (DX & 7));\r |
8391 | }\r |
8392 | \r |
8393 | \r |
8394 | void m68k_op_btst_8_r_pcix(void)\r |
8395 | {\r |
8396 | FLAG_Z = OPER_PCIX_8() & (1 << (DX & 7));\r |
8397 | }\r |
8398 | \r |
8399 | \r |
8400 | void m68k_op_btst_8_r_i(void)\r |
8401 | {\r |
8402 | FLAG_Z = OPER_I_8() & (1 << (DX & 7));\r |
8403 | }\r |
8404 | \r |
8405 | \r |
8406 | void m68k_op_btst_32_s_d(void)\r |
8407 | {\r |
8408 | FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f));\r |
8409 | }\r |
8410 | \r |
8411 | \r |
8412 | void m68k_op_btst_8_s_ai(void)\r |
8413 | {\r |
8414 | uint bit = OPER_I_8() & 7;\r |
8415 | \r |
8416 | FLAG_Z = OPER_AY_AI_8() & (1 << bit);\r |
8417 | }\r |
8418 | \r |
8419 | \r |
8420 | void m68k_op_btst_8_s_pi(void)\r |
8421 | {\r |
8422 | uint bit = OPER_I_8() & 7;\r |
8423 | \r |
8424 | FLAG_Z = OPER_AY_PI_8() & (1 << bit);\r |
8425 | }\r |
8426 | \r |
8427 | \r |
8428 | void m68k_op_btst_8_s_pi7(void)\r |
8429 | {\r |
8430 | uint bit = OPER_I_8() & 7;\r |
8431 | \r |
8432 | FLAG_Z = OPER_A7_PI_8() & (1 << bit);\r |
8433 | }\r |
8434 | \r |
8435 | \r |
8436 | void m68k_op_btst_8_s_pd(void)\r |
8437 | {\r |
8438 | uint bit = OPER_I_8() & 7;\r |
8439 | \r |
8440 | FLAG_Z = OPER_AY_PD_8() & (1 << bit);\r |
8441 | }\r |
8442 | \r |
8443 | \r |
8444 | void m68k_op_btst_8_s_pd7(void)\r |
8445 | {\r |
8446 | uint bit = OPER_I_8() & 7;\r |
8447 | \r |
8448 | FLAG_Z = OPER_A7_PD_8() & (1 << bit);\r |
8449 | }\r |
8450 | \r |
8451 | \r |
8452 | void m68k_op_btst_8_s_di(void)\r |
8453 | {\r |
8454 | uint bit = OPER_I_8() & 7;\r |
8455 | \r |
8456 | FLAG_Z = OPER_AY_DI_8() & (1 << bit);\r |
8457 | }\r |
8458 | \r |
8459 | \r |
8460 | void m68k_op_btst_8_s_ix(void)\r |
8461 | {\r |
8462 | uint bit = OPER_I_8() & 7;\r |
8463 | \r |
8464 | FLAG_Z = OPER_AY_IX_8() & (1 << bit);\r |
8465 | }\r |
8466 | \r |
8467 | \r |
8468 | void m68k_op_btst_8_s_aw(void)\r |
8469 | {\r |
8470 | uint bit = OPER_I_8() & 7;\r |
8471 | \r |
8472 | FLAG_Z = OPER_AW_8() & (1 << bit);\r |
8473 | }\r |
8474 | \r |
8475 | \r |
8476 | void m68k_op_btst_8_s_al(void)\r |
8477 | {\r |
8478 | uint bit = OPER_I_8() & 7;\r |
8479 | \r |
8480 | FLAG_Z = OPER_AL_8() & (1 << bit);\r |
8481 | }\r |
8482 | \r |
8483 | \r |
8484 | void m68k_op_btst_8_s_pcdi(void)\r |
8485 | {\r |
8486 | uint bit = OPER_I_8() & 7;\r |
8487 | \r |
8488 | FLAG_Z = OPER_PCDI_8() & (1 << bit);\r |
8489 | }\r |
8490 | \r |
8491 | \r |
8492 | void m68k_op_btst_8_s_pcix(void)\r |
8493 | {\r |
8494 | uint bit = OPER_I_8() & 7;\r |
8495 | \r |
8496 | FLAG_Z = OPER_PCIX_8() & (1 << bit);\r |
8497 | }\r |
8498 | \r |
8499 | \r |
8500 | void m68k_op_callm_32_ai(void)\r |
8501 | {\r |
8502 | /* note: watch out for pcrelative modes */\r |
8503 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
8504 | {\r |
8505 | uint ea = EA_AY_AI_32();\r |
8506 | \r |
8507 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8508 | REG_PC += 2;\r |
8509 | (void)ea; /* just to avoid an 'unused variable' warning */\r |
8510 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
8511 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
8512 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
8513 | return;\r |
8514 | }\r |
8515 | m68ki_exception_illegal();\r |
8516 | }\r |
8517 | \r |
8518 | \r |
8519 | void m68k_op_callm_32_di(void)\r |
8520 | {\r |
8521 | /* note: watch out for pcrelative modes */\r |
8522 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
8523 | {\r |
8524 | uint ea = EA_AY_DI_32();\r |
8525 | \r |
8526 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8527 | REG_PC += 2;\r |
8528 | (void)ea; /* just to avoid an 'unused variable' warning */\r |
8529 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
8530 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
8531 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
8532 | return;\r |
8533 | }\r |
8534 | m68ki_exception_illegal();\r |
8535 | }\r |
8536 | \r |
8537 | \r |
8538 | void m68k_op_callm_32_ix(void)\r |
8539 | {\r |
8540 | /* note: watch out for pcrelative modes */\r |
8541 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
8542 | {\r |
8543 | uint ea = EA_AY_IX_32();\r |
8544 | \r |
8545 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8546 | REG_PC += 2;\r |
8547 | (void)ea; /* just to avoid an 'unused variable' warning */\r |
8548 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
8549 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
8550 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
8551 | return;\r |
8552 | }\r |
8553 | m68ki_exception_illegal();\r |
8554 | }\r |
8555 | \r |
8556 | \r |
8557 | void m68k_op_callm_32_aw(void)\r |
8558 | {\r |
8559 | /* note: watch out for pcrelative modes */\r |
8560 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
8561 | {\r |
8562 | uint ea = EA_AW_32();\r |
8563 | \r |
8564 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8565 | REG_PC += 2;\r |
8566 | (void)ea; /* just to avoid an 'unused variable' warning */\r |
8567 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
8568 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
8569 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
8570 | return;\r |
8571 | }\r |
8572 | m68ki_exception_illegal();\r |
8573 | }\r |
8574 | \r |
8575 | \r |
8576 | void m68k_op_callm_32_al(void)\r |
8577 | {\r |
8578 | /* note: watch out for pcrelative modes */\r |
8579 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
8580 | {\r |
8581 | uint ea = EA_AL_32();\r |
8582 | \r |
8583 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8584 | REG_PC += 2;\r |
8585 | (void)ea; /* just to avoid an 'unused variable' warning */\r |
8586 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
8587 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
8588 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
8589 | return;\r |
8590 | }\r |
8591 | m68ki_exception_illegal();\r |
8592 | }\r |
8593 | \r |
8594 | \r |
8595 | void m68k_op_callm_32_pcdi(void)\r |
8596 | {\r |
8597 | /* note: watch out for pcrelative modes */\r |
8598 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
8599 | {\r |
8600 | uint ea = EA_PCDI_32();\r |
8601 | \r |
8602 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8603 | REG_PC += 2;\r |
8604 | (void)ea; /* just to avoid an 'unused variable' warning */\r |
8605 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
8606 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
8607 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
8608 | return;\r |
8609 | }\r |
8610 | m68ki_exception_illegal();\r |
8611 | }\r |
8612 | \r |
8613 | \r |
8614 | void m68k_op_callm_32_pcix(void)\r |
8615 | {\r |
8616 | /* note: watch out for pcrelative modes */\r |
8617 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
8618 | {\r |
8619 | uint ea = EA_PCIX_32();\r |
8620 | \r |
8621 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8622 | REG_PC += 2;\r |
8623 | (void)ea; /* just to avoid an 'unused variable' warning */\r |
8624 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
8625 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
8626 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
8627 | return;\r |
8628 | }\r |
8629 | m68ki_exception_illegal();\r |
8630 | }\r |
8631 | \r |
8632 | \r |
8633 | void m68k_op_cas_8_ai(void)\r |
8634 | {\r |
8635 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8636 | {\r |
8637 | uint word2 = OPER_I_16();\r |
8638 | uint ea = EA_AY_AI_8();\r |
8639 | uint dest = m68ki_read_8(ea);\r |
8640 | uint* compare = ®_D[word2 & 7];\r |
8641 | uint res = dest - MASK_OUT_ABOVE_8(*compare);\r |
8642 | \r |
8643 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8644 | FLAG_N = NFLAG_8(res);\r |
8645 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
8646 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);\r |
8647 | FLAG_C = CFLAG_8(res);\r |
8648 | \r |
8649 | if(COND_NE())\r |
8650 | *compare = MASK_OUT_BELOW_8(*compare) | dest;\r |
8651 | else\r |
8652 | {\r |
8653 | USE_CYCLES(3);\r |
8654 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));\r |
8655 | }\r |
8656 | return;\r |
8657 | }\r |
8658 | m68ki_exception_illegal();\r |
8659 | }\r |
8660 | \r |
8661 | \r |
8662 | void m68k_op_cas_8_pi(void)\r |
8663 | {\r |
8664 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8665 | {\r |
8666 | uint word2 = OPER_I_16();\r |
8667 | uint ea = EA_AY_PI_8();\r |
8668 | uint dest = m68ki_read_8(ea);\r |
8669 | uint* compare = ®_D[word2 & 7];\r |
8670 | uint res = dest - MASK_OUT_ABOVE_8(*compare);\r |
8671 | \r |
8672 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8673 | FLAG_N = NFLAG_8(res);\r |
8674 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
8675 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);\r |
8676 | FLAG_C = CFLAG_8(res);\r |
8677 | \r |
8678 | if(COND_NE())\r |
8679 | *compare = MASK_OUT_BELOW_8(*compare) | dest;\r |
8680 | else\r |
8681 | {\r |
8682 | USE_CYCLES(3);\r |
8683 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));\r |
8684 | }\r |
8685 | return;\r |
8686 | }\r |
8687 | m68ki_exception_illegal();\r |
8688 | }\r |
8689 | \r |
8690 | \r |
8691 | void m68k_op_cas_8_pi7(void)\r |
8692 | {\r |
8693 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8694 | {\r |
8695 | uint word2 = OPER_I_16();\r |
8696 | uint ea = EA_A7_PI_8();\r |
8697 | uint dest = m68ki_read_8(ea);\r |
8698 | uint* compare = ®_D[word2 & 7];\r |
8699 | uint res = dest - MASK_OUT_ABOVE_8(*compare);\r |
8700 | \r |
8701 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8702 | FLAG_N = NFLAG_8(res);\r |
8703 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
8704 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);\r |
8705 | FLAG_C = CFLAG_8(res);\r |
8706 | \r |
8707 | if(COND_NE())\r |
8708 | *compare = MASK_OUT_BELOW_8(*compare) | dest;\r |
8709 | else\r |
8710 | {\r |
8711 | USE_CYCLES(3);\r |
8712 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));\r |
8713 | }\r |
8714 | return;\r |
8715 | }\r |
8716 | m68ki_exception_illegal();\r |
8717 | }\r |
8718 | \r |
8719 | \r |
8720 | void m68k_op_cas_8_pd(void)\r |
8721 | {\r |
8722 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8723 | {\r |
8724 | uint word2 = OPER_I_16();\r |
8725 | uint ea = EA_AY_PD_8();\r |
8726 | uint dest = m68ki_read_8(ea);\r |
8727 | uint* compare = ®_D[word2 & 7];\r |
8728 | uint res = dest - MASK_OUT_ABOVE_8(*compare);\r |
8729 | \r |
8730 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8731 | FLAG_N = NFLAG_8(res);\r |
8732 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
8733 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);\r |
8734 | FLAG_C = CFLAG_8(res);\r |
8735 | \r |
8736 | if(COND_NE())\r |
8737 | *compare = MASK_OUT_BELOW_8(*compare) | dest;\r |
8738 | else\r |
8739 | {\r |
8740 | USE_CYCLES(3);\r |
8741 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));\r |
8742 | }\r |
8743 | return;\r |
8744 | }\r |
8745 | m68ki_exception_illegal();\r |
8746 | }\r |
8747 | \r |
8748 | \r |
8749 | void m68k_op_cas_8_pd7(void)\r |
8750 | {\r |
8751 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8752 | {\r |
8753 | uint word2 = OPER_I_16();\r |
8754 | uint ea = EA_A7_PD_8();\r |
8755 | uint dest = m68ki_read_8(ea);\r |
8756 | uint* compare = ®_D[word2 & 7];\r |
8757 | uint res = dest - MASK_OUT_ABOVE_8(*compare);\r |
8758 | \r |
8759 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8760 | FLAG_N = NFLAG_8(res);\r |
8761 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
8762 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);\r |
8763 | FLAG_C = CFLAG_8(res);\r |
8764 | \r |
8765 | if(COND_NE())\r |
8766 | *compare = MASK_OUT_BELOW_8(*compare) | dest;\r |
8767 | else\r |
8768 | {\r |
8769 | USE_CYCLES(3);\r |
8770 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));\r |
8771 | }\r |
8772 | return;\r |
8773 | }\r |
8774 | m68ki_exception_illegal();\r |
8775 | }\r |
8776 | \r |
8777 | \r |
8778 | void m68k_op_cas_8_di(void)\r |
8779 | {\r |
8780 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8781 | {\r |
8782 | uint word2 = OPER_I_16();\r |
8783 | uint ea = EA_AY_DI_8();\r |
8784 | uint dest = m68ki_read_8(ea);\r |
8785 | uint* compare = ®_D[word2 & 7];\r |
8786 | uint res = dest - MASK_OUT_ABOVE_8(*compare);\r |
8787 | \r |
8788 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8789 | FLAG_N = NFLAG_8(res);\r |
8790 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
8791 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);\r |
8792 | FLAG_C = CFLAG_8(res);\r |
8793 | \r |
8794 | if(COND_NE())\r |
8795 | *compare = MASK_OUT_BELOW_8(*compare) | dest;\r |
8796 | else\r |
8797 | {\r |
8798 | USE_CYCLES(3);\r |
8799 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));\r |
8800 | }\r |
8801 | return;\r |
8802 | }\r |
8803 | m68ki_exception_illegal();\r |
8804 | }\r |
8805 | \r |
8806 | \r |
8807 | void m68k_op_cas_8_ix(void)\r |
8808 | {\r |
8809 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8810 | {\r |
8811 | uint word2 = OPER_I_16();\r |
8812 | uint ea = EA_AY_IX_8();\r |
8813 | uint dest = m68ki_read_8(ea);\r |
8814 | uint* compare = ®_D[word2 & 7];\r |
8815 | uint res = dest - MASK_OUT_ABOVE_8(*compare);\r |
8816 | \r |
8817 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8818 | FLAG_N = NFLAG_8(res);\r |
8819 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
8820 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);\r |
8821 | FLAG_C = CFLAG_8(res);\r |
8822 | \r |
8823 | if(COND_NE())\r |
8824 | *compare = MASK_OUT_BELOW_8(*compare) | dest;\r |
8825 | else\r |
8826 | {\r |
8827 | USE_CYCLES(3);\r |
8828 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));\r |
8829 | }\r |
8830 | return;\r |
8831 | }\r |
8832 | m68ki_exception_illegal();\r |
8833 | }\r |
8834 | \r |
8835 | \r |
8836 | void m68k_op_cas_8_aw(void)\r |
8837 | {\r |
8838 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8839 | {\r |
8840 | uint word2 = OPER_I_16();\r |
8841 | uint ea = EA_AW_8();\r |
8842 | uint dest = m68ki_read_8(ea);\r |
8843 | uint* compare = ®_D[word2 & 7];\r |
8844 | uint res = dest - MASK_OUT_ABOVE_8(*compare);\r |
8845 | \r |
8846 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8847 | FLAG_N = NFLAG_8(res);\r |
8848 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
8849 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);\r |
8850 | FLAG_C = CFLAG_8(res);\r |
8851 | \r |
8852 | if(COND_NE())\r |
8853 | *compare = MASK_OUT_BELOW_8(*compare) | dest;\r |
8854 | else\r |
8855 | {\r |
8856 | USE_CYCLES(3);\r |
8857 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));\r |
8858 | }\r |
8859 | return;\r |
8860 | }\r |
8861 | m68ki_exception_illegal();\r |
8862 | }\r |
8863 | \r |
8864 | \r |
8865 | void m68k_op_cas_8_al(void)\r |
8866 | {\r |
8867 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8868 | {\r |
8869 | uint word2 = OPER_I_16();\r |
8870 | uint ea = EA_AL_8();\r |
8871 | uint dest = m68ki_read_8(ea);\r |
8872 | uint* compare = ®_D[word2 & 7];\r |
8873 | uint res = dest - MASK_OUT_ABOVE_8(*compare);\r |
8874 | \r |
8875 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8876 | FLAG_N = NFLAG_8(res);\r |
8877 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
8878 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);\r |
8879 | FLAG_C = CFLAG_8(res);\r |
8880 | \r |
8881 | if(COND_NE())\r |
8882 | *compare = MASK_OUT_BELOW_8(*compare) | dest;\r |
8883 | else\r |
8884 | {\r |
8885 | USE_CYCLES(3);\r |
8886 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));\r |
8887 | }\r |
8888 | return;\r |
8889 | }\r |
8890 | m68ki_exception_illegal();\r |
8891 | }\r |
8892 | \r |
8893 | \r |
8894 | void m68k_op_cas_16_ai(void)\r |
8895 | {\r |
8896 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8897 | {\r |
8898 | uint word2 = OPER_I_16();\r |
8899 | uint ea = EA_AY_AI_16();\r |
8900 | uint dest = m68ki_read_16(ea);\r |
8901 | uint* compare = ®_D[word2 & 7];\r |
8902 | uint res = dest - MASK_OUT_ABOVE_16(*compare);\r |
8903 | \r |
8904 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8905 | FLAG_N = NFLAG_16(res);\r |
8906 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
8907 | FLAG_V = VFLAG_SUB_16(*compare, dest, res);\r |
8908 | FLAG_C = CFLAG_16(res);\r |
8909 | \r |
8910 | if(COND_NE())\r |
8911 | *compare = MASK_OUT_BELOW_16(*compare) | dest;\r |
8912 | else\r |
8913 | {\r |
8914 | USE_CYCLES(3);\r |
8915 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));\r |
8916 | }\r |
8917 | return;\r |
8918 | }\r |
8919 | m68ki_exception_illegal();\r |
8920 | }\r |
8921 | \r |
8922 | \r |
8923 | void m68k_op_cas_16_pi(void)\r |
8924 | {\r |
8925 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8926 | {\r |
8927 | uint word2 = OPER_I_16();\r |
8928 | uint ea = EA_AY_PI_16();\r |
8929 | uint dest = m68ki_read_16(ea);\r |
8930 | uint* compare = ®_D[word2 & 7];\r |
8931 | uint res = dest - MASK_OUT_ABOVE_16(*compare);\r |
8932 | \r |
8933 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8934 | FLAG_N = NFLAG_16(res);\r |
8935 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
8936 | FLAG_V = VFLAG_SUB_16(*compare, dest, res);\r |
8937 | FLAG_C = CFLAG_16(res);\r |
8938 | \r |
8939 | if(COND_NE())\r |
8940 | *compare = MASK_OUT_BELOW_16(*compare) | dest;\r |
8941 | else\r |
8942 | {\r |
8943 | USE_CYCLES(3);\r |
8944 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));\r |
8945 | }\r |
8946 | return;\r |
8947 | }\r |
8948 | m68ki_exception_illegal();\r |
8949 | }\r |
8950 | \r |
8951 | \r |
8952 | void m68k_op_cas_16_pd(void)\r |
8953 | {\r |
8954 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8955 | {\r |
8956 | uint word2 = OPER_I_16();\r |
8957 | uint ea = EA_AY_PD_16();\r |
8958 | uint dest = m68ki_read_16(ea);\r |
8959 | uint* compare = ®_D[word2 & 7];\r |
8960 | uint res = dest - MASK_OUT_ABOVE_16(*compare);\r |
8961 | \r |
8962 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8963 | FLAG_N = NFLAG_16(res);\r |
8964 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
8965 | FLAG_V = VFLAG_SUB_16(*compare, dest, res);\r |
8966 | FLAG_C = CFLAG_16(res);\r |
8967 | \r |
8968 | if(COND_NE())\r |
8969 | *compare = MASK_OUT_BELOW_16(*compare) | dest;\r |
8970 | else\r |
8971 | {\r |
8972 | USE_CYCLES(3);\r |
8973 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));\r |
8974 | }\r |
8975 | return;\r |
8976 | }\r |
8977 | m68ki_exception_illegal();\r |
8978 | }\r |
8979 | \r |
8980 | \r |
8981 | void m68k_op_cas_16_di(void)\r |
8982 | {\r |
8983 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8984 | {\r |
8985 | uint word2 = OPER_I_16();\r |
8986 | uint ea = EA_AY_DI_16();\r |
8987 | uint dest = m68ki_read_16(ea);\r |
8988 | uint* compare = ®_D[word2 & 7];\r |
8989 | uint res = dest - MASK_OUT_ABOVE_16(*compare);\r |
8990 | \r |
8991 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
8992 | FLAG_N = NFLAG_16(res);\r |
8993 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
8994 | FLAG_V = VFLAG_SUB_16(*compare, dest, res);\r |
8995 | FLAG_C = CFLAG_16(res);\r |
8996 | \r |
8997 | if(COND_NE())\r |
8998 | *compare = MASK_OUT_BELOW_16(*compare) | dest;\r |
8999 | else\r |
9000 | {\r |
9001 | USE_CYCLES(3);\r |
9002 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));\r |
9003 | }\r |
9004 | return;\r |
9005 | }\r |
9006 | m68ki_exception_illegal();\r |
9007 | }\r |
9008 | \r |
9009 | \r |
9010 | void m68k_op_cas_16_ix(void)\r |
9011 | {\r |
9012 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9013 | {\r |
9014 | uint word2 = OPER_I_16();\r |
9015 | uint ea = EA_AY_IX_16();\r |
9016 | uint dest = m68ki_read_16(ea);\r |
9017 | uint* compare = ®_D[word2 & 7];\r |
9018 | uint res = dest - MASK_OUT_ABOVE_16(*compare);\r |
9019 | \r |
9020 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9021 | FLAG_N = NFLAG_16(res);\r |
9022 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
9023 | FLAG_V = VFLAG_SUB_16(*compare, dest, res);\r |
9024 | FLAG_C = CFLAG_16(res);\r |
9025 | \r |
9026 | if(COND_NE())\r |
9027 | *compare = MASK_OUT_BELOW_16(*compare) | dest;\r |
9028 | else\r |
9029 | {\r |
9030 | USE_CYCLES(3);\r |
9031 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));\r |
9032 | }\r |
9033 | return;\r |
9034 | }\r |
9035 | m68ki_exception_illegal();\r |
9036 | }\r |
9037 | \r |
9038 | \r |
9039 | void m68k_op_cas_16_aw(void)\r |
9040 | {\r |
9041 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9042 | {\r |
9043 | uint word2 = OPER_I_16();\r |
9044 | uint ea = EA_AW_16();\r |
9045 | uint dest = m68ki_read_16(ea);\r |
9046 | uint* compare = ®_D[word2 & 7];\r |
9047 | uint res = dest - MASK_OUT_ABOVE_16(*compare);\r |
9048 | \r |
9049 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9050 | FLAG_N = NFLAG_16(res);\r |
9051 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
9052 | FLAG_V = VFLAG_SUB_16(*compare, dest, res);\r |
9053 | FLAG_C = CFLAG_16(res);\r |
9054 | \r |
9055 | if(COND_NE())\r |
9056 | *compare = MASK_OUT_BELOW_16(*compare) | dest;\r |
9057 | else\r |
9058 | {\r |
9059 | USE_CYCLES(3);\r |
9060 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));\r |
9061 | }\r |
9062 | return;\r |
9063 | }\r |
9064 | m68ki_exception_illegal();\r |
9065 | }\r |
9066 | \r |
9067 | \r |
9068 | void m68k_op_cas_16_al(void)\r |
9069 | {\r |
9070 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9071 | {\r |
9072 | uint word2 = OPER_I_16();\r |
9073 | uint ea = EA_AL_16();\r |
9074 | uint dest = m68ki_read_16(ea);\r |
9075 | uint* compare = ®_D[word2 & 7];\r |
9076 | uint res = dest - MASK_OUT_ABOVE_16(*compare);\r |
9077 | \r |
9078 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9079 | FLAG_N = NFLAG_16(res);\r |
9080 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
9081 | FLAG_V = VFLAG_SUB_16(*compare, dest, res);\r |
9082 | FLAG_C = CFLAG_16(res);\r |
9083 | \r |
9084 | if(COND_NE())\r |
9085 | *compare = MASK_OUT_BELOW_16(*compare) | dest;\r |
9086 | else\r |
9087 | {\r |
9088 | USE_CYCLES(3);\r |
9089 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));\r |
9090 | }\r |
9091 | return;\r |
9092 | }\r |
9093 | m68ki_exception_illegal();\r |
9094 | }\r |
9095 | \r |
9096 | \r |
9097 | void m68k_op_cas_32_ai(void)\r |
9098 | {\r |
9099 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9100 | {\r |
9101 | uint word2 = OPER_I_16();\r |
9102 | uint ea = EA_AY_AI_32();\r |
9103 | uint dest = m68ki_read_32(ea);\r |
9104 | uint* compare = ®_D[word2 & 7];\r |
9105 | uint res = dest - *compare;\r |
9106 | \r |
9107 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9108 | FLAG_N = NFLAG_32(res);\r |
9109 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
9110 | FLAG_V = VFLAG_SUB_32(*compare, dest, res);\r |
9111 | FLAG_C = CFLAG_SUB_32(*compare, dest, res);\r |
9112 | \r |
9113 | if(COND_NE())\r |
9114 | *compare = dest;\r |
9115 | else\r |
9116 | {\r |
9117 | USE_CYCLES(3);\r |
9118 | m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);\r |
9119 | }\r |
9120 | return;\r |
9121 | }\r |
9122 | m68ki_exception_illegal();\r |
9123 | }\r |
9124 | \r |
9125 | \r |
9126 | void m68k_op_cas_32_pi(void)\r |
9127 | {\r |
9128 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9129 | {\r |
9130 | uint word2 = OPER_I_16();\r |
9131 | uint ea = EA_AY_PI_32();\r |
9132 | uint dest = m68ki_read_32(ea);\r |
9133 | uint* compare = ®_D[word2 & 7];\r |
9134 | uint res = dest - *compare;\r |
9135 | \r |
9136 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9137 | FLAG_N = NFLAG_32(res);\r |
9138 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
9139 | FLAG_V = VFLAG_SUB_32(*compare, dest, res);\r |
9140 | FLAG_C = CFLAG_SUB_32(*compare, dest, res);\r |
9141 | \r |
9142 | if(COND_NE())\r |
9143 | *compare = dest;\r |
9144 | else\r |
9145 | {\r |
9146 | USE_CYCLES(3);\r |
9147 | m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);\r |
9148 | }\r |
9149 | return;\r |
9150 | }\r |
9151 | m68ki_exception_illegal();\r |
9152 | }\r |
9153 | \r |
9154 | \r |
9155 | void m68k_op_cas_32_pd(void)\r |
9156 | {\r |
9157 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9158 | {\r |
9159 | uint word2 = OPER_I_16();\r |
9160 | uint ea = EA_AY_PD_32();\r |
9161 | uint dest = m68ki_read_32(ea);\r |
9162 | uint* compare = ®_D[word2 & 7];\r |
9163 | uint res = dest - *compare;\r |
9164 | \r |
9165 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9166 | FLAG_N = NFLAG_32(res);\r |
9167 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
9168 | FLAG_V = VFLAG_SUB_32(*compare, dest, res);\r |
9169 | FLAG_C = CFLAG_SUB_32(*compare, dest, res);\r |
9170 | \r |
9171 | if(COND_NE())\r |
9172 | *compare = dest;\r |
9173 | else\r |
9174 | {\r |
9175 | USE_CYCLES(3);\r |
9176 | m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);\r |
9177 | }\r |
9178 | return;\r |
9179 | }\r |
9180 | m68ki_exception_illegal();\r |
9181 | }\r |
9182 | \r |
9183 | \r |
9184 | void m68k_op_cas_32_di(void)\r |
9185 | {\r |
9186 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9187 | {\r |
9188 | uint word2 = OPER_I_16();\r |
9189 | uint ea = EA_AY_DI_32();\r |
9190 | uint dest = m68ki_read_32(ea);\r |
9191 | uint* compare = ®_D[word2 & 7];\r |
9192 | uint res = dest - *compare;\r |
9193 | \r |
9194 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9195 | FLAG_N = NFLAG_32(res);\r |
9196 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
9197 | FLAG_V = VFLAG_SUB_32(*compare, dest, res);\r |
9198 | FLAG_C = CFLAG_SUB_32(*compare, dest, res);\r |
9199 | \r |
9200 | if(COND_NE())\r |
9201 | *compare = dest;\r |
9202 | else\r |
9203 | {\r |
9204 | USE_CYCLES(3);\r |
9205 | m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);\r |
9206 | }\r |
9207 | return;\r |
9208 | }\r |
9209 | m68ki_exception_illegal();\r |
9210 | }\r |
9211 | \r |
9212 | \r |
9213 | void m68k_op_cas_32_ix(void)\r |
9214 | {\r |
9215 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9216 | {\r |
9217 | uint word2 = OPER_I_16();\r |
9218 | uint ea = EA_AY_IX_32();\r |
9219 | uint dest = m68ki_read_32(ea);\r |
9220 | uint* compare = ®_D[word2 & 7];\r |
9221 | uint res = dest - *compare;\r |
9222 | \r |
9223 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9224 | FLAG_N = NFLAG_32(res);\r |
9225 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
9226 | FLAG_V = VFLAG_SUB_32(*compare, dest, res);\r |
9227 | FLAG_C = CFLAG_SUB_32(*compare, dest, res);\r |
9228 | \r |
9229 | if(COND_NE())\r |
9230 | *compare = dest;\r |
9231 | else\r |
9232 | {\r |
9233 | USE_CYCLES(3);\r |
9234 | m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);\r |
9235 | }\r |
9236 | return;\r |
9237 | }\r |
9238 | m68ki_exception_illegal();\r |
9239 | }\r |
9240 | \r |
9241 | \r |
9242 | void m68k_op_cas_32_aw(void)\r |
9243 | {\r |
9244 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9245 | {\r |
9246 | uint word2 = OPER_I_16();\r |
9247 | uint ea = EA_AW_32();\r |
9248 | uint dest = m68ki_read_32(ea);\r |
9249 | uint* compare = ®_D[word2 & 7];\r |
9250 | uint res = dest - *compare;\r |
9251 | \r |
9252 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9253 | FLAG_N = NFLAG_32(res);\r |
9254 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
9255 | FLAG_V = VFLAG_SUB_32(*compare, dest, res);\r |
9256 | FLAG_C = CFLAG_SUB_32(*compare, dest, res);\r |
9257 | \r |
9258 | if(COND_NE())\r |
9259 | *compare = dest;\r |
9260 | else\r |
9261 | {\r |
9262 | USE_CYCLES(3);\r |
9263 | m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);\r |
9264 | }\r |
9265 | return;\r |
9266 | }\r |
9267 | m68ki_exception_illegal();\r |
9268 | }\r |
9269 | \r |
9270 | \r |
9271 | void m68k_op_cas_32_al(void)\r |
9272 | {\r |
9273 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9274 | {\r |
9275 | uint word2 = OPER_I_16();\r |
9276 | uint ea = EA_AL_32();\r |
9277 | uint dest = m68ki_read_32(ea);\r |
9278 | uint* compare = ®_D[word2 & 7];\r |
9279 | uint res = dest - *compare;\r |
9280 | \r |
9281 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9282 | FLAG_N = NFLAG_32(res);\r |
9283 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
9284 | FLAG_V = VFLAG_SUB_32(*compare, dest, res);\r |
9285 | FLAG_C = CFLAG_SUB_32(*compare, dest, res);\r |
9286 | \r |
9287 | if(COND_NE())\r |
9288 | *compare = dest;\r |
9289 | else\r |
9290 | {\r |
9291 | USE_CYCLES(3);\r |
9292 | m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);\r |
9293 | }\r |
9294 | return;\r |
9295 | }\r |
9296 | m68ki_exception_illegal();\r |
9297 | }\r |
9298 | \r |
9299 | \r |
9300 | void m68k_op_cas2_16(void)\r |
9301 | {\r |
9302 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9303 | {\r |
9304 | uint word2 = OPER_I_32();\r |
9305 | uint* compare1 = ®_D[(word2 >> 16) & 7];\r |
9306 | uint ea1 = REG_DA[(word2 >> 28) & 15];\r |
9307 | uint dest1 = m68ki_read_16(ea1);\r |
9308 | uint res1 = dest1 - MASK_OUT_ABOVE_16(*compare1);\r |
9309 | uint* compare2 = ®_D[word2 & 7];\r |
9310 | uint ea2 = REG_DA[(word2 >> 12) & 15];\r |
9311 | uint dest2 = m68ki_read_16(ea2);\r |
9312 | uint res2;\r |
9313 | \r |
9314 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9315 | FLAG_N = NFLAG_16(res1);\r |
9316 | FLAG_Z = MASK_OUT_ABOVE_16(res1);\r |
9317 | FLAG_V = VFLAG_SUB_16(*compare1, dest1, res1);\r |
9318 | FLAG_C = CFLAG_16(res1);\r |
9319 | \r |
9320 | if(COND_EQ())\r |
9321 | {\r |
9322 | res2 = dest2 - MASK_OUT_ABOVE_16(*compare2);\r |
9323 | \r |
9324 | FLAG_N = NFLAG_16(res2);\r |
9325 | FLAG_Z = MASK_OUT_ABOVE_16(res2);\r |
9326 | FLAG_V = VFLAG_SUB_16(*compare2, dest2, res2);\r |
9327 | FLAG_C = CFLAG_16(res2);\r |
9328 | \r |
9329 | if(COND_EQ())\r |
9330 | {\r |
9331 | USE_CYCLES(3);\r |
9332 | m68ki_write_16(ea1, REG_D[(word2 >> 22) & 7]);\r |
9333 | m68ki_write_16(ea2, REG_D[(word2 >> 6) & 7]);\r |
9334 | return;\r |
9335 | }\r |
9336 | }\r |
9337 | *compare1 = BIT_1F(word2) ? MAKE_INT_16(dest1) : MASK_OUT_BELOW_16(*compare1) | dest1;\r |
9338 | *compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2;\r |
9339 | return;\r |
9340 | }\r |
9341 | m68ki_exception_illegal();\r |
9342 | }\r |
9343 | \r |
9344 | \r |
9345 | void m68k_op_cas2_32(void)\r |
9346 | {\r |
9347 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9348 | {\r |
9349 | uint word2 = OPER_I_32();\r |
9350 | uint* compare1 = ®_D[(word2 >> 16) & 7];\r |
9351 | uint ea1 = REG_DA[(word2 >> 28) & 15];\r |
9352 | uint dest1 = m68ki_read_32(ea1);\r |
9353 | uint res1 = dest1 - *compare1;\r |
9354 | uint* compare2 = ®_D[word2 & 7];\r |
9355 | uint ea2 = REG_DA[(word2 >> 12) & 15];\r |
9356 | uint dest2 = m68ki_read_32(ea2);\r |
9357 | uint res2;\r |
9358 | \r |
9359 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9360 | FLAG_N = NFLAG_32(res1);\r |
9361 | FLAG_Z = MASK_OUT_ABOVE_32(res1);\r |
9362 | FLAG_V = VFLAG_SUB_32(*compare1, dest1, res1);\r |
9363 | FLAG_C = CFLAG_SUB_32(*compare1, dest1, res1);\r |
9364 | \r |
9365 | if(COND_EQ())\r |
9366 | {\r |
9367 | res2 = dest2 - *compare2;\r |
9368 | \r |
9369 | FLAG_N = NFLAG_32(res2);\r |
9370 | FLAG_Z = MASK_OUT_ABOVE_32(res2);\r |
9371 | FLAG_V = VFLAG_SUB_32(*compare2, dest2, res2);\r |
9372 | FLAG_C = CFLAG_SUB_32(*compare2, dest2, res2);\r |
9373 | \r |
9374 | if(COND_EQ())\r |
9375 | {\r |
9376 | USE_CYCLES(3);\r |
9377 | m68ki_write_32(ea1, REG_D[(word2 >> 22) & 7]);\r |
9378 | m68ki_write_32(ea2, REG_D[(word2 >> 6) & 7]);\r |
9379 | return;\r |
9380 | }\r |
9381 | }\r |
9382 | *compare1 = dest1;\r |
9383 | *compare2 = dest2;\r |
9384 | return;\r |
9385 | }\r |
9386 | m68ki_exception_illegal();\r |
9387 | }\r |
9388 | \r |
9389 | \r |
9390 | void m68k_op_chk_16_d(void)\r |
9391 | {\r |
9392 | sint src = MAKE_INT_16(DX);\r |
9393 | sint bound = MAKE_INT_16(DY);\r |
9394 | \r |
9395 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9396 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9397 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9398 | \r |
9399 | if(src >= 0 && src <= bound)\r |
9400 | {\r |
9401 | return;\r |
9402 | }\r |
9403 | FLAG_N = (src < 0)<<7;\r |
9404 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9405 | }\r |
9406 | \r |
9407 | \r |
9408 | void m68k_op_chk_16_ai(void)\r |
9409 | {\r |
9410 | sint src = MAKE_INT_16(DX);\r |
9411 | sint bound = MAKE_INT_16(OPER_AY_AI_16());\r |
9412 | \r |
9413 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9414 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9415 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9416 | \r |
9417 | if(src >= 0 && src <= bound)\r |
9418 | {\r |
9419 | return;\r |
9420 | }\r |
9421 | FLAG_N = (src < 0)<<7;\r |
9422 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9423 | }\r |
9424 | \r |
9425 | \r |
9426 | void m68k_op_chk_16_pi(void)\r |
9427 | {\r |
9428 | sint src = MAKE_INT_16(DX);\r |
9429 | sint bound = MAKE_INT_16(OPER_AY_PI_16());\r |
9430 | \r |
9431 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9432 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9433 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9434 | \r |
9435 | if(src >= 0 && src <= bound)\r |
9436 | {\r |
9437 | return;\r |
9438 | }\r |
9439 | FLAG_N = (src < 0)<<7;\r |
9440 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9441 | }\r |
9442 | \r |
9443 | \r |
9444 | void m68k_op_chk_16_pd(void)\r |
9445 | {\r |
9446 | sint src = MAKE_INT_16(DX);\r |
9447 | sint bound = MAKE_INT_16(OPER_AY_PD_16());\r |
9448 | \r |
9449 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9450 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9451 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9452 | \r |
9453 | if(src >= 0 && src <= bound)\r |
9454 | {\r |
9455 | return;\r |
9456 | }\r |
9457 | FLAG_N = (src < 0)<<7;\r |
9458 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9459 | }\r |
9460 | \r |
9461 | \r |
9462 | void m68k_op_chk_16_di(void)\r |
9463 | {\r |
9464 | sint src = MAKE_INT_16(DX);\r |
9465 | sint bound = MAKE_INT_16(OPER_AY_DI_16());\r |
9466 | \r |
9467 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9468 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9469 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9470 | \r |
9471 | if(src >= 0 && src <= bound)\r |
9472 | {\r |
9473 | return;\r |
9474 | }\r |
9475 | FLAG_N = (src < 0)<<7;\r |
9476 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9477 | }\r |
9478 | \r |
9479 | \r |
9480 | void m68k_op_chk_16_ix(void)\r |
9481 | {\r |
9482 | sint src = MAKE_INT_16(DX);\r |
9483 | sint bound = MAKE_INT_16(OPER_AY_IX_16());\r |
9484 | \r |
9485 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9486 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9487 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9488 | \r |
9489 | if(src >= 0 && src <= bound)\r |
9490 | {\r |
9491 | return;\r |
9492 | }\r |
9493 | FLAG_N = (src < 0)<<7;\r |
9494 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9495 | }\r |
9496 | \r |
9497 | \r |
9498 | void m68k_op_chk_16_aw(void)\r |
9499 | {\r |
9500 | sint src = MAKE_INT_16(DX);\r |
9501 | sint bound = MAKE_INT_16(OPER_AW_16());\r |
9502 | \r |
9503 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9504 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9505 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9506 | \r |
9507 | if(src >= 0 && src <= bound)\r |
9508 | {\r |
9509 | return;\r |
9510 | }\r |
9511 | FLAG_N = (src < 0)<<7;\r |
9512 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9513 | }\r |
9514 | \r |
9515 | \r |
9516 | void m68k_op_chk_16_al(void)\r |
9517 | {\r |
9518 | sint src = MAKE_INT_16(DX);\r |
9519 | sint bound = MAKE_INT_16(OPER_AL_16());\r |
9520 | \r |
9521 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9522 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9523 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9524 | \r |
9525 | if(src >= 0 && src <= bound)\r |
9526 | {\r |
9527 | return;\r |
9528 | }\r |
9529 | FLAG_N = (src < 0)<<7;\r |
9530 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9531 | }\r |
9532 | \r |
9533 | \r |
9534 | void m68k_op_chk_16_pcdi(void)\r |
9535 | {\r |
9536 | sint src = MAKE_INT_16(DX);\r |
9537 | sint bound = MAKE_INT_16(OPER_PCDI_16());\r |
9538 | \r |
9539 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9540 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9541 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9542 | \r |
9543 | if(src >= 0 && src <= bound)\r |
9544 | {\r |
9545 | return;\r |
9546 | }\r |
9547 | FLAG_N = (src < 0)<<7;\r |
9548 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9549 | }\r |
9550 | \r |
9551 | \r |
9552 | void m68k_op_chk_16_pcix(void)\r |
9553 | {\r |
9554 | sint src = MAKE_INT_16(DX);\r |
9555 | sint bound = MAKE_INT_16(OPER_PCIX_16());\r |
9556 | \r |
9557 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9558 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9559 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9560 | \r |
9561 | if(src >= 0 && src <= bound)\r |
9562 | {\r |
9563 | return;\r |
9564 | }\r |
9565 | FLAG_N = (src < 0)<<7;\r |
9566 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9567 | }\r |
9568 | \r |
9569 | \r |
9570 | void m68k_op_chk_16_i(void)\r |
9571 | {\r |
9572 | sint src = MAKE_INT_16(DX);\r |
9573 | sint bound = MAKE_INT_16(OPER_I_16());\r |
9574 | \r |
9575 | FLAG_Z = ZFLAG_16(src); /* Undocumented */\r |
9576 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9577 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9578 | \r |
9579 | if(src >= 0 && src <= bound)\r |
9580 | {\r |
9581 | return;\r |
9582 | }\r |
9583 | FLAG_N = (src < 0)<<7;\r |
9584 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9585 | }\r |
9586 | \r |
9587 | \r |
9588 | void m68k_op_chk_32_d(void)\r |
9589 | {\r |
9590 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9591 | {\r |
9592 | sint src = MAKE_INT_32(DX);\r |
9593 | sint bound = MAKE_INT_32(DY);\r |
9594 | \r |
9595 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9596 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9597 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9598 | \r |
9599 | if(src >= 0 && src <= bound)\r |
9600 | {\r |
9601 | return;\r |
9602 | }\r |
9603 | FLAG_N = (src < 0)<<7;\r |
9604 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9605 | return;\r |
9606 | }\r |
9607 | m68ki_exception_illegal();\r |
9608 | }\r |
9609 | \r |
9610 | \r |
9611 | void m68k_op_chk_32_ai(void)\r |
9612 | {\r |
9613 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9614 | {\r |
9615 | sint src = MAKE_INT_32(DX);\r |
9616 | sint bound = MAKE_INT_32(OPER_AY_AI_32());\r |
9617 | \r |
9618 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9619 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9620 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9621 | \r |
9622 | if(src >= 0 && src <= bound)\r |
9623 | {\r |
9624 | return;\r |
9625 | }\r |
9626 | FLAG_N = (src < 0)<<7;\r |
9627 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9628 | return;\r |
9629 | }\r |
9630 | m68ki_exception_illegal();\r |
9631 | }\r |
9632 | \r |
9633 | \r |
9634 | void m68k_op_chk_32_pi(void)\r |
9635 | {\r |
9636 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9637 | {\r |
9638 | sint src = MAKE_INT_32(DX);\r |
9639 | sint bound = MAKE_INT_32(OPER_AY_PI_32());\r |
9640 | \r |
9641 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9642 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9643 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9644 | \r |
9645 | if(src >= 0 && src <= bound)\r |
9646 | {\r |
9647 | return;\r |
9648 | }\r |
9649 | FLAG_N = (src < 0)<<7;\r |
9650 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9651 | return;\r |
9652 | }\r |
9653 | m68ki_exception_illegal();\r |
9654 | }\r |
9655 | \r |
9656 | \r |
9657 | void m68k_op_chk_32_pd(void)\r |
9658 | {\r |
9659 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9660 | {\r |
9661 | sint src = MAKE_INT_32(DX);\r |
9662 | sint bound = MAKE_INT_32(OPER_AY_PD_32());\r |
9663 | \r |
9664 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9665 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9666 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9667 | \r |
9668 | if(src >= 0 && src <= bound)\r |
9669 | {\r |
9670 | return;\r |
9671 | }\r |
9672 | FLAG_N = (src < 0)<<7;\r |
9673 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9674 | return;\r |
9675 | }\r |
9676 | m68ki_exception_illegal();\r |
9677 | }\r |
9678 | \r |
9679 | \r |
9680 | void m68k_op_chk_32_di(void)\r |
9681 | {\r |
9682 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9683 | {\r |
9684 | sint src = MAKE_INT_32(DX);\r |
9685 | sint bound = MAKE_INT_32(OPER_AY_DI_32());\r |
9686 | \r |
9687 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9688 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9689 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9690 | \r |
9691 | if(src >= 0 && src <= bound)\r |
9692 | {\r |
9693 | return;\r |
9694 | }\r |
9695 | FLAG_N = (src < 0)<<7;\r |
9696 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9697 | return;\r |
9698 | }\r |
9699 | m68ki_exception_illegal();\r |
9700 | }\r |
9701 | \r |
9702 | \r |
9703 | void m68k_op_chk_32_ix(void)\r |
9704 | {\r |
9705 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9706 | {\r |
9707 | sint src = MAKE_INT_32(DX);\r |
9708 | sint bound = MAKE_INT_32(OPER_AY_IX_32());\r |
9709 | \r |
9710 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9711 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9712 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9713 | \r |
9714 | if(src >= 0 && src <= bound)\r |
9715 | {\r |
9716 | return;\r |
9717 | }\r |
9718 | FLAG_N = (src < 0)<<7;\r |
9719 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9720 | return;\r |
9721 | }\r |
9722 | m68ki_exception_illegal();\r |
9723 | }\r |
9724 | \r |
9725 | \r |
9726 | void m68k_op_chk_32_aw(void)\r |
9727 | {\r |
9728 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9729 | {\r |
9730 | sint src = MAKE_INT_32(DX);\r |
9731 | sint bound = MAKE_INT_32(OPER_AW_32());\r |
9732 | \r |
9733 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9734 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9735 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9736 | \r |
9737 | if(src >= 0 && src <= bound)\r |
9738 | {\r |
9739 | return;\r |
9740 | }\r |
9741 | FLAG_N = (src < 0)<<7;\r |
9742 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9743 | return;\r |
9744 | }\r |
9745 | m68ki_exception_illegal();\r |
9746 | }\r |
9747 | \r |
9748 | \r |
9749 | void m68k_op_chk_32_al(void)\r |
9750 | {\r |
9751 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9752 | {\r |
9753 | sint src = MAKE_INT_32(DX);\r |
9754 | sint bound = MAKE_INT_32(OPER_AL_32());\r |
9755 | \r |
9756 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9757 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9758 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9759 | \r |
9760 | if(src >= 0 && src <= bound)\r |
9761 | {\r |
9762 | return;\r |
9763 | }\r |
9764 | FLAG_N = (src < 0)<<7;\r |
9765 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9766 | return;\r |
9767 | }\r |
9768 | m68ki_exception_illegal();\r |
9769 | }\r |
9770 | \r |
9771 | \r |
9772 | void m68k_op_chk_32_pcdi(void)\r |
9773 | {\r |
9774 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9775 | {\r |
9776 | sint src = MAKE_INT_32(DX);\r |
9777 | sint bound = MAKE_INT_32(OPER_PCDI_32());\r |
9778 | \r |
9779 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9780 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9781 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9782 | \r |
9783 | if(src >= 0 && src <= bound)\r |
9784 | {\r |
9785 | return;\r |
9786 | }\r |
9787 | FLAG_N = (src < 0)<<7;\r |
9788 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9789 | return;\r |
9790 | }\r |
9791 | m68ki_exception_illegal();\r |
9792 | }\r |
9793 | \r |
9794 | \r |
9795 | void m68k_op_chk_32_pcix(void)\r |
9796 | {\r |
9797 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9798 | {\r |
9799 | sint src = MAKE_INT_32(DX);\r |
9800 | sint bound = MAKE_INT_32(OPER_PCIX_32());\r |
9801 | \r |
9802 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9803 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9804 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9805 | \r |
9806 | if(src >= 0 && src <= bound)\r |
9807 | {\r |
9808 | return;\r |
9809 | }\r |
9810 | FLAG_N = (src < 0)<<7;\r |
9811 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9812 | return;\r |
9813 | }\r |
9814 | m68ki_exception_illegal();\r |
9815 | }\r |
9816 | \r |
9817 | \r |
9818 | void m68k_op_chk_32_i(void)\r |
9819 | {\r |
9820 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9821 | {\r |
9822 | sint src = MAKE_INT_32(DX);\r |
9823 | sint bound = MAKE_INT_32(OPER_I_32());\r |
9824 | \r |
9825 | FLAG_Z = ZFLAG_32(src); /* Undocumented */\r |
9826 | FLAG_V = VFLAG_CLEAR; /* Undocumented */\r |
9827 | FLAG_C = CFLAG_CLEAR; /* Undocumented */\r |
9828 | \r |
9829 | if(src >= 0 && src <= bound)\r |
9830 | {\r |
9831 | return;\r |
9832 | }\r |
9833 | FLAG_N = (src < 0)<<7;\r |
9834 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9835 | return;\r |
9836 | }\r |
9837 | m68ki_exception_illegal();\r |
9838 | }\r |
9839 | \r |
9840 | \r |
9841 | void m68k_op_chk2cmp2_8_pcdi(void)\r |
9842 | {\r |
9843 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9844 | {\r |
9845 | uint word2 = OPER_I_16();\r |
9846 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;\r |
9847 | uint ea = EA_PCDI_8();\r |
9848 | uint lower_bound = m68ki_read_pcrel_8(ea);\r |
9849 | uint upper_bound = m68ki_read_pcrel_8(ea + 1);\r |
9850 | \r |
9851 | if(!BIT_F(word2))\r |
9852 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);\r |
9853 | else\r |
9854 | FLAG_C = compare - lower_bound;\r |
9855 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
9856 | if(COND_CS())\r |
9857 | {\r |
9858 | if(BIT_B(word2))\r |
9859 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9860 | return;\r |
9861 | }\r |
9862 | \r |
9863 | FLAG_C = upper_bound - compare;\r |
9864 | if(COND_CS() && BIT_B(word2))\r |
9865 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9866 | return;\r |
9867 | }\r |
9868 | m68ki_exception_illegal();\r |
9869 | }\r |
9870 | \r |
9871 | \r |
9872 | void m68k_op_chk2cmp2_8_pcix(void)\r |
9873 | {\r |
9874 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9875 | {\r |
9876 | uint word2 = OPER_I_16();\r |
9877 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;\r |
9878 | uint ea = EA_PCIX_8();\r |
9879 | uint lower_bound = m68ki_read_pcrel_8(ea);\r |
9880 | uint upper_bound = m68ki_read_pcrel_8(ea + 1);\r |
9881 | \r |
9882 | if(!BIT_F(word2))\r |
9883 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);\r |
9884 | else\r |
9885 | FLAG_C = compare - lower_bound;\r |
9886 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
9887 | if(COND_CS())\r |
9888 | {\r |
9889 | if(BIT_B(word2))\r |
9890 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9891 | return;\r |
9892 | }\r |
9893 | \r |
9894 | FLAG_C = upper_bound - compare;\r |
9895 | if(COND_CS() && BIT_B(word2))\r |
9896 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9897 | return;\r |
9898 | }\r |
9899 | m68ki_exception_illegal();\r |
9900 | }\r |
9901 | \r |
9902 | \r |
9903 | void m68k_op_chk2cmp2_8_ai(void)\r |
9904 | {\r |
9905 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9906 | {\r |
9907 | uint word2 = OPER_I_16();\r |
9908 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;\r |
9909 | uint ea = EA_AY_AI_8();\r |
9910 | uint lower_bound = m68ki_read_8(ea);\r |
9911 | uint upper_bound = m68ki_read_8(ea + 1);\r |
9912 | \r |
9913 | if(!BIT_F(word2))\r |
9914 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);\r |
9915 | else\r |
9916 | FLAG_C = compare - lower_bound;\r |
9917 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
9918 | if(COND_CS())\r |
9919 | {\r |
9920 | if(BIT_B(word2))\r |
9921 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9922 | return;\r |
9923 | }\r |
9924 | \r |
9925 | FLAG_C = upper_bound - compare;\r |
9926 | if(COND_CS() && BIT_B(word2))\r |
9927 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9928 | return;\r |
9929 | }\r |
9930 | m68ki_exception_illegal();\r |
9931 | }\r |
9932 | \r |
9933 | \r |
9934 | void m68k_op_chk2cmp2_8_di(void)\r |
9935 | {\r |
9936 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9937 | {\r |
9938 | uint word2 = OPER_I_16();\r |
9939 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;\r |
9940 | uint ea = EA_AY_DI_8();\r |
9941 | uint lower_bound = m68ki_read_8(ea);\r |
9942 | uint upper_bound = m68ki_read_8(ea + 1);\r |
9943 | \r |
9944 | if(!BIT_F(word2))\r |
9945 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);\r |
9946 | else\r |
9947 | FLAG_C = compare - lower_bound;\r |
9948 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
9949 | if(COND_CS())\r |
9950 | {\r |
9951 | if(BIT_B(word2))\r |
9952 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9953 | return;\r |
9954 | }\r |
9955 | \r |
9956 | FLAG_C = upper_bound - compare;\r |
9957 | if(COND_CS() && BIT_B(word2))\r |
9958 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9959 | return;\r |
9960 | }\r |
9961 | m68ki_exception_illegal();\r |
9962 | }\r |
9963 | \r |
9964 | \r |
9965 | void m68k_op_chk2cmp2_8_ix(void)\r |
9966 | {\r |
9967 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9968 | {\r |
9969 | uint word2 = OPER_I_16();\r |
9970 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;\r |
9971 | uint ea = EA_AY_IX_8();\r |
9972 | uint lower_bound = m68ki_read_8(ea);\r |
9973 | uint upper_bound = m68ki_read_8(ea + 1);\r |
9974 | \r |
9975 | if(!BIT_F(word2))\r |
9976 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);\r |
9977 | else\r |
9978 | FLAG_C = compare - lower_bound;\r |
9979 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
9980 | if(COND_CS())\r |
9981 | {\r |
9982 | if(BIT_B(word2))\r |
9983 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9984 | return;\r |
9985 | }\r |
9986 | \r |
9987 | FLAG_C = upper_bound - compare;\r |
9988 | if(COND_CS() && BIT_B(word2))\r |
9989 | m68ki_exception_trap(EXCEPTION_CHK);\r |
9990 | return;\r |
9991 | }\r |
9992 | m68ki_exception_illegal();\r |
9993 | }\r |
9994 | \r |
9995 | \r |
9996 | void m68k_op_chk2cmp2_8_aw(void)\r |
9997 | {\r |
9998 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
9999 | {\r |
10000 | uint word2 = OPER_I_16();\r |
10001 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;\r |
10002 | uint ea = EA_AW_8();\r |
10003 | uint lower_bound = m68ki_read_8(ea);\r |
10004 | uint upper_bound = m68ki_read_8(ea + 1);\r |
10005 | \r |
10006 | if(!BIT_F(word2))\r |
10007 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);\r |
10008 | else\r |
10009 | FLAG_C = compare - lower_bound;\r |
10010 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10011 | if(COND_CS())\r |
10012 | {\r |
10013 | if(BIT_B(word2))\r |
10014 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10015 | return;\r |
10016 | }\r |
10017 | \r |
10018 | FLAG_C = upper_bound - compare;\r |
10019 | if(COND_CS() && BIT_B(word2))\r |
10020 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10021 | return;\r |
10022 | }\r |
10023 | m68ki_exception_illegal();\r |
10024 | }\r |
10025 | \r |
10026 | \r |
10027 | void m68k_op_chk2cmp2_8_al(void)\r |
10028 | {\r |
10029 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10030 | {\r |
10031 | uint word2 = OPER_I_16();\r |
10032 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;\r |
10033 | uint ea = EA_AL_8();\r |
10034 | uint lower_bound = m68ki_read_8(ea);\r |
10035 | uint upper_bound = m68ki_read_8(ea + 1);\r |
10036 | \r |
10037 | if(!BIT_F(word2))\r |
10038 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);\r |
10039 | else\r |
10040 | FLAG_C = compare - lower_bound;\r |
10041 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10042 | if(COND_CS())\r |
10043 | {\r |
10044 | if(BIT_B(word2))\r |
10045 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10046 | return;\r |
10047 | }\r |
10048 | \r |
10049 | FLAG_C = upper_bound - compare;\r |
10050 | if(COND_CS() && BIT_B(word2))\r |
10051 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10052 | return;\r |
10053 | }\r |
10054 | m68ki_exception_illegal();\r |
10055 | }\r |
10056 | \r |
10057 | \r |
10058 | void m68k_op_chk2cmp2_16_pcdi(void)\r |
10059 | {\r |
10060 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10061 | {\r |
10062 | uint word2 = OPER_I_16();\r |
10063 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;\r |
10064 | uint ea = EA_PCDI_16();\r |
10065 | uint lower_bound = m68ki_read_pcrel_16(ea);\r |
10066 | uint upper_bound = m68ki_read_pcrel_16(ea + 2);\r |
10067 | \r |
10068 | if(!BIT_F(word2))\r |
10069 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);\r |
10070 | else\r |
10071 | FLAG_C = compare - lower_bound;\r |
10072 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10073 | FLAG_C = CFLAG_16(FLAG_C);\r |
10074 | if(COND_CS())\r |
10075 | {\r |
10076 | if(BIT_B(word2))\r |
10077 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10078 | return;\r |
10079 | }\r |
10080 | \r |
10081 | if(!BIT_F(word2))\r |
10082 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);\r |
10083 | else\r |
10084 | FLAG_C = upper_bound - compare;\r |
10085 | FLAG_C = CFLAG_16(FLAG_C);\r |
10086 | if(COND_CS() && BIT_B(word2))\r |
10087 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10088 | return;\r |
10089 | }\r |
10090 | m68ki_exception_illegal();\r |
10091 | }\r |
10092 | \r |
10093 | \r |
10094 | void m68k_op_chk2cmp2_16_pcix(void)\r |
10095 | {\r |
10096 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10097 | {\r |
10098 | uint word2 = OPER_I_16();\r |
10099 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;\r |
10100 | uint ea = EA_PCIX_16();\r |
10101 | uint lower_bound = m68ki_read_pcrel_16(ea);\r |
10102 | uint upper_bound = m68ki_read_pcrel_16(ea + 2);\r |
10103 | \r |
10104 | if(!BIT_F(word2))\r |
10105 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);\r |
10106 | else\r |
10107 | FLAG_C = compare - lower_bound;\r |
10108 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10109 | FLAG_C = CFLAG_16(FLAG_C);\r |
10110 | if(COND_CS())\r |
10111 | {\r |
10112 | if(BIT_B(word2))\r |
10113 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10114 | return;\r |
10115 | }\r |
10116 | \r |
10117 | if(!BIT_F(word2))\r |
10118 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);\r |
10119 | else\r |
10120 | FLAG_C = upper_bound - compare;\r |
10121 | FLAG_C = CFLAG_16(FLAG_C);\r |
10122 | if(COND_CS() && BIT_B(word2))\r |
10123 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10124 | return;\r |
10125 | }\r |
10126 | m68ki_exception_illegal();\r |
10127 | }\r |
10128 | \r |
10129 | \r |
10130 | void m68k_op_chk2cmp2_16_ai(void)\r |
10131 | {\r |
10132 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10133 | {\r |
10134 | uint word2 = OPER_I_16();\r |
10135 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;\r |
10136 | uint ea = EA_AY_AI_16();\r |
10137 | uint lower_bound = m68ki_read_16(ea);\r |
10138 | uint upper_bound = m68ki_read_16(ea + 2);\r |
10139 | \r |
10140 | if(!BIT_F(word2))\r |
10141 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);\r |
10142 | else\r |
10143 | FLAG_C = compare - lower_bound;\r |
10144 | \r |
10145 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10146 | FLAG_C = CFLAG_16(FLAG_C);\r |
10147 | if(COND_CS())\r |
10148 | {\r |
10149 | if(BIT_B(word2))\r |
10150 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10151 | return;\r |
10152 | }\r |
10153 | if(!BIT_F(word2))\r |
10154 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);\r |
10155 | else\r |
10156 | FLAG_C = upper_bound - compare;\r |
10157 | \r |
10158 | FLAG_C = CFLAG_16(FLAG_C);\r |
10159 | if(COND_CS() && BIT_B(word2))\r |
10160 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10161 | return;\r |
10162 | }\r |
10163 | m68ki_exception_illegal();\r |
10164 | }\r |
10165 | \r |
10166 | \r |
10167 | void m68k_op_chk2cmp2_16_di(void)\r |
10168 | {\r |
10169 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10170 | {\r |
10171 | uint word2 = OPER_I_16();\r |
10172 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;\r |
10173 | uint ea = EA_AY_DI_16();\r |
10174 | uint lower_bound = m68ki_read_16(ea);\r |
10175 | uint upper_bound = m68ki_read_16(ea + 2);\r |
10176 | \r |
10177 | if(!BIT_F(word2))\r |
10178 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);\r |
10179 | else\r |
10180 | FLAG_C = compare - lower_bound;\r |
10181 | \r |
10182 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10183 | FLAG_C = CFLAG_16(FLAG_C);\r |
10184 | if(COND_CS())\r |
10185 | {\r |
10186 | if(BIT_B(word2))\r |
10187 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10188 | return;\r |
10189 | }\r |
10190 | if(!BIT_F(word2))\r |
10191 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);\r |
10192 | else\r |
10193 | FLAG_C = upper_bound - compare;\r |
10194 | \r |
10195 | FLAG_C = CFLAG_16(FLAG_C);\r |
10196 | if(COND_CS() && BIT_B(word2))\r |
10197 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10198 | return;\r |
10199 | }\r |
10200 | m68ki_exception_illegal();\r |
10201 | }\r |
10202 | \r |
10203 | \r |
10204 | void m68k_op_chk2cmp2_16_ix(void)\r |
10205 | {\r |
10206 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10207 | {\r |
10208 | uint word2 = OPER_I_16();\r |
10209 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;\r |
10210 | uint ea = EA_AY_IX_16();\r |
10211 | uint lower_bound = m68ki_read_16(ea);\r |
10212 | uint upper_bound = m68ki_read_16(ea + 2);\r |
10213 | \r |
10214 | if(!BIT_F(word2))\r |
10215 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);\r |
10216 | else\r |
10217 | FLAG_C = compare - lower_bound;\r |
10218 | \r |
10219 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10220 | FLAG_C = CFLAG_16(FLAG_C);\r |
10221 | if(COND_CS())\r |
10222 | {\r |
10223 | if(BIT_B(word2))\r |
10224 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10225 | return;\r |
10226 | }\r |
10227 | if(!BIT_F(word2))\r |
10228 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);\r |
10229 | else\r |
10230 | FLAG_C = upper_bound - compare;\r |
10231 | \r |
10232 | FLAG_C = CFLAG_16(FLAG_C);\r |
10233 | if(COND_CS() && BIT_B(word2))\r |
10234 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10235 | return;\r |
10236 | }\r |
10237 | m68ki_exception_illegal();\r |
10238 | }\r |
10239 | \r |
10240 | \r |
10241 | void m68k_op_chk2cmp2_16_aw(void)\r |
10242 | {\r |
10243 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10244 | {\r |
10245 | uint word2 = OPER_I_16();\r |
10246 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;\r |
10247 | uint ea = EA_AW_16();\r |
10248 | uint lower_bound = m68ki_read_16(ea);\r |
10249 | uint upper_bound = m68ki_read_16(ea + 2);\r |
10250 | \r |
10251 | if(!BIT_F(word2))\r |
10252 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);\r |
10253 | else\r |
10254 | FLAG_C = compare - lower_bound;\r |
10255 | \r |
10256 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10257 | FLAG_C = CFLAG_16(FLAG_C);\r |
10258 | if(COND_CS())\r |
10259 | {\r |
10260 | if(BIT_B(word2))\r |
10261 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10262 | return;\r |
10263 | }\r |
10264 | if(!BIT_F(word2))\r |
10265 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);\r |
10266 | else\r |
10267 | FLAG_C = upper_bound - compare;\r |
10268 | \r |
10269 | FLAG_C = CFLAG_16(FLAG_C);\r |
10270 | if(COND_CS() && BIT_B(word2))\r |
10271 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10272 | return;\r |
10273 | }\r |
10274 | m68ki_exception_illegal();\r |
10275 | }\r |
10276 | \r |
10277 | \r |
10278 | void m68k_op_chk2cmp2_16_al(void)\r |
10279 | {\r |
10280 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10281 | {\r |
10282 | uint word2 = OPER_I_16();\r |
10283 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;\r |
10284 | uint ea = EA_AL_16();\r |
10285 | uint lower_bound = m68ki_read_16(ea);\r |
10286 | uint upper_bound = m68ki_read_16(ea + 2);\r |
10287 | \r |
10288 | if(!BIT_F(word2))\r |
10289 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);\r |
10290 | else\r |
10291 | FLAG_C = compare - lower_bound;\r |
10292 | \r |
10293 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10294 | FLAG_C = CFLAG_16(FLAG_C);\r |
10295 | if(COND_CS())\r |
10296 | {\r |
10297 | if(BIT_B(word2))\r |
10298 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10299 | return;\r |
10300 | }\r |
10301 | if(!BIT_F(word2))\r |
10302 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);\r |
10303 | else\r |
10304 | FLAG_C = upper_bound - compare;\r |
10305 | \r |
10306 | FLAG_C = CFLAG_16(FLAG_C);\r |
10307 | if(COND_CS() && BIT_B(word2))\r |
10308 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10309 | return;\r |
10310 | }\r |
10311 | m68ki_exception_illegal();\r |
10312 | }\r |
10313 | \r |
10314 | \r |
10315 | void m68k_op_chk2cmp2_32_pcdi(void)\r |
10316 | {\r |
10317 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10318 | {\r |
10319 | uint word2 = OPER_I_16();\r |
10320 | uint compare = REG_DA[(word2 >> 12) & 15];\r |
10321 | uint ea = EA_PCDI_32();\r |
10322 | uint lower_bound = m68ki_read_pcrel_32(ea);\r |
10323 | uint upper_bound = m68ki_read_pcrel_32(ea + 4);\r |
10324 | \r |
10325 | FLAG_C = compare - lower_bound;\r |
10326 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10327 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);\r |
10328 | if(COND_CS())\r |
10329 | {\r |
10330 | if(BIT_B(word2))\r |
10331 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10332 | return;\r |
10333 | }\r |
10334 | \r |
10335 | FLAG_C = upper_bound - compare;\r |
10336 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);\r |
10337 | if(COND_CS() && BIT_B(word2))\r |
10338 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10339 | return;\r |
10340 | }\r |
10341 | m68ki_exception_illegal();\r |
10342 | }\r |
10343 | \r |
10344 | \r |
10345 | void m68k_op_chk2cmp2_32_pcix(void)\r |
10346 | {\r |
10347 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10348 | {\r |
10349 | uint word2 = OPER_I_16();\r |
10350 | uint compare = REG_DA[(word2 >> 12) & 15];\r |
10351 | uint ea = EA_PCIX_32();\r |
10352 | uint lower_bound = m68ki_read_pcrel_32(ea);\r |
10353 | uint upper_bound = m68ki_read_pcrel_32(ea + 4);\r |
10354 | \r |
10355 | FLAG_C = compare - lower_bound;\r |
10356 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10357 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);\r |
10358 | if(COND_CS())\r |
10359 | {\r |
10360 | if(BIT_B(word2))\r |
10361 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10362 | return;\r |
10363 | }\r |
10364 | \r |
10365 | FLAG_C = upper_bound - compare;\r |
10366 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);\r |
10367 | if(COND_CS() && BIT_B(word2))\r |
10368 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10369 | return;\r |
10370 | }\r |
10371 | m68ki_exception_illegal();\r |
10372 | }\r |
10373 | \r |
10374 | \r |
10375 | void m68k_op_chk2cmp2_32_ai(void)\r |
10376 | {\r |
10377 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10378 | {\r |
10379 | uint word2 = OPER_I_16();\r |
10380 | uint compare = REG_DA[(word2 >> 12) & 15];\r |
10381 | uint ea = EA_AY_AI_32();\r |
10382 | uint lower_bound = m68ki_read_32(ea);\r |
10383 | uint upper_bound = m68ki_read_32(ea + 4);\r |
10384 | \r |
10385 | FLAG_C = compare - lower_bound;\r |
10386 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10387 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);\r |
10388 | if(COND_CS())\r |
10389 | {\r |
10390 | if(BIT_B(word2))\r |
10391 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10392 | return;\r |
10393 | }\r |
10394 | \r |
10395 | FLAG_C = upper_bound - compare;\r |
10396 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);\r |
10397 | if(COND_CS() && BIT_B(word2))\r |
10398 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10399 | return;\r |
10400 | }\r |
10401 | m68ki_exception_illegal();\r |
10402 | }\r |
10403 | \r |
10404 | \r |
10405 | void m68k_op_chk2cmp2_32_di(void)\r |
10406 | {\r |
10407 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10408 | {\r |
10409 | uint word2 = OPER_I_16();\r |
10410 | uint compare = REG_DA[(word2 >> 12) & 15];\r |
10411 | uint ea = EA_AY_DI_32();\r |
10412 | uint lower_bound = m68ki_read_32(ea);\r |
10413 | uint upper_bound = m68ki_read_32(ea + 4);\r |
10414 | \r |
10415 | FLAG_C = compare - lower_bound;\r |
10416 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10417 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);\r |
10418 | if(COND_CS())\r |
10419 | {\r |
10420 | if(BIT_B(word2))\r |
10421 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10422 | return;\r |
10423 | }\r |
10424 | \r |
10425 | FLAG_C = upper_bound - compare;\r |
10426 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);\r |
10427 | if(COND_CS() && BIT_B(word2))\r |
10428 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10429 | return;\r |
10430 | }\r |
10431 | m68ki_exception_illegal();\r |
10432 | }\r |
10433 | \r |
10434 | \r |
10435 | void m68k_op_chk2cmp2_32_ix(void)\r |
10436 | {\r |
10437 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10438 | {\r |
10439 | uint word2 = OPER_I_16();\r |
10440 | uint compare = REG_DA[(word2 >> 12) & 15];\r |
10441 | uint ea = EA_AY_IX_32();\r |
10442 | uint lower_bound = m68ki_read_32(ea);\r |
10443 | uint upper_bound = m68ki_read_32(ea + 4);\r |
10444 | \r |
10445 | FLAG_C = compare - lower_bound;\r |
10446 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10447 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);\r |
10448 | if(COND_CS())\r |
10449 | {\r |
10450 | if(BIT_B(word2))\r |
10451 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10452 | return;\r |
10453 | }\r |
10454 | \r |
10455 | FLAG_C = upper_bound - compare;\r |
10456 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);\r |
10457 | if(COND_CS() && BIT_B(word2))\r |
10458 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10459 | return;\r |
10460 | }\r |
10461 | m68ki_exception_illegal();\r |
10462 | }\r |
10463 | \r |
10464 | \r |
10465 | void m68k_op_chk2cmp2_32_aw(void)\r |
10466 | {\r |
10467 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10468 | {\r |
10469 | uint word2 = OPER_I_16();\r |
10470 | uint compare = REG_DA[(word2 >> 12) & 15];\r |
10471 | uint ea = EA_AW_32();\r |
10472 | uint lower_bound = m68ki_read_32(ea);\r |
10473 | uint upper_bound = m68ki_read_32(ea + 4);\r |
10474 | \r |
10475 | FLAG_C = compare - lower_bound;\r |
10476 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10477 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);\r |
10478 | if(COND_CS())\r |
10479 | {\r |
10480 | if(BIT_B(word2))\r |
10481 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10482 | return;\r |
10483 | }\r |
10484 | \r |
10485 | FLAG_C = upper_bound - compare;\r |
10486 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);\r |
10487 | if(COND_CS() && BIT_B(word2))\r |
10488 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10489 | return;\r |
10490 | }\r |
10491 | m68ki_exception_illegal();\r |
10492 | }\r |
10493 | \r |
10494 | \r |
10495 | void m68k_op_chk2cmp2_32_al(void)\r |
10496 | {\r |
10497 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10498 | {\r |
10499 | uint word2 = OPER_I_16();\r |
10500 | uint compare = REG_DA[(word2 >> 12) & 15];\r |
10501 | uint ea = EA_AL_32();\r |
10502 | uint lower_bound = m68ki_read_32(ea);\r |
10503 | uint upper_bound = m68ki_read_32(ea + 4);\r |
10504 | \r |
10505 | FLAG_C = compare - lower_bound;\r |
10506 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));\r |
10507 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);\r |
10508 | if(COND_CS())\r |
10509 | {\r |
10510 | if(BIT_B(word2))\r |
10511 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10512 | return;\r |
10513 | }\r |
10514 | \r |
10515 | FLAG_C = upper_bound - compare;\r |
10516 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);\r |
10517 | if(COND_CS() && BIT_B(word2))\r |
10518 | m68ki_exception_trap(EXCEPTION_CHK);\r |
10519 | return;\r |
10520 | }\r |
10521 | m68ki_exception_illegal();\r |
10522 | }\r |
10523 | \r |
10524 | \r |
10525 | void m68k_op_clr_8_d(void)\r |
10526 | {\r |
10527 | DY &= 0xffffff00;\r |
10528 | \r |
10529 | FLAG_N = NFLAG_CLEAR;\r |
10530 | FLAG_V = VFLAG_CLEAR;\r |
10531 | FLAG_C = CFLAG_CLEAR;\r |
10532 | FLAG_Z = ZFLAG_SET;\r |
10533 | }\r |
10534 | \r |
10535 | \r |
10536 | void m68k_op_clr_8_ai(void)\r |
10537 | {\r |
10538 | m68ki_write_8(EA_AY_AI_8(), 0);\r |
10539 | \r |
10540 | FLAG_N = NFLAG_CLEAR;\r |
10541 | FLAG_V = VFLAG_CLEAR;\r |
10542 | FLAG_C = CFLAG_CLEAR;\r |
10543 | FLAG_Z = ZFLAG_SET;\r |
10544 | }\r |
10545 | \r |
10546 | \r |
10547 | void m68k_op_clr_8_pi(void)\r |
10548 | {\r |
10549 | m68ki_write_8(EA_AY_PI_8(), 0);\r |
10550 | \r |
10551 | FLAG_N = NFLAG_CLEAR;\r |
10552 | FLAG_V = VFLAG_CLEAR;\r |
10553 | FLAG_C = CFLAG_CLEAR;\r |
10554 | FLAG_Z = ZFLAG_SET;\r |
10555 | }\r |
10556 | \r |
10557 | \r |
10558 | void m68k_op_clr_8_pi7(void)\r |
10559 | {\r |
10560 | m68ki_write_8(EA_A7_PI_8(), 0);\r |
10561 | \r |
10562 | FLAG_N = NFLAG_CLEAR;\r |
10563 | FLAG_V = VFLAG_CLEAR;\r |
10564 | FLAG_C = CFLAG_CLEAR;\r |
10565 | FLAG_Z = ZFLAG_SET;\r |
10566 | }\r |
10567 | \r |
10568 | \r |
10569 | void m68k_op_clr_8_pd(void)\r |
10570 | {\r |
10571 | m68ki_write_8(EA_AY_PD_8(), 0);\r |
10572 | \r |
10573 | FLAG_N = NFLAG_CLEAR;\r |
10574 | FLAG_V = VFLAG_CLEAR;\r |
10575 | FLAG_C = CFLAG_CLEAR;\r |
10576 | FLAG_Z = ZFLAG_SET;\r |
10577 | }\r |
10578 | \r |
10579 | \r |
10580 | void m68k_op_clr_8_pd7(void)\r |
10581 | {\r |
10582 | m68ki_write_8(EA_A7_PD_8(), 0);\r |
10583 | \r |
10584 | FLAG_N = NFLAG_CLEAR;\r |
10585 | FLAG_V = VFLAG_CLEAR;\r |
10586 | FLAG_C = CFLAG_CLEAR;\r |
10587 | FLAG_Z = ZFLAG_SET;\r |
10588 | }\r |
10589 | \r |
10590 | \r |
10591 | void m68k_op_clr_8_di(void)\r |
10592 | {\r |
10593 | m68ki_write_8(EA_AY_DI_8(), 0);\r |
10594 | \r |
10595 | FLAG_N = NFLAG_CLEAR;\r |
10596 | FLAG_V = VFLAG_CLEAR;\r |
10597 | FLAG_C = CFLAG_CLEAR;\r |
10598 | FLAG_Z = ZFLAG_SET;\r |
10599 | }\r |
10600 | \r |
10601 | \r |
10602 | void m68k_op_clr_8_ix(void)\r |
10603 | {\r |
10604 | m68ki_write_8(EA_AY_IX_8(), 0);\r |
10605 | \r |
10606 | FLAG_N = NFLAG_CLEAR;\r |
10607 | FLAG_V = VFLAG_CLEAR;\r |
10608 | FLAG_C = CFLAG_CLEAR;\r |
10609 | FLAG_Z = ZFLAG_SET;\r |
10610 | }\r |
10611 | \r |
10612 | \r |
10613 | void m68k_op_clr_8_aw(void)\r |
10614 | {\r |
10615 | m68ki_write_8(EA_AW_8(), 0);\r |
10616 | \r |
10617 | FLAG_N = NFLAG_CLEAR;\r |
10618 | FLAG_V = VFLAG_CLEAR;\r |
10619 | FLAG_C = CFLAG_CLEAR;\r |
10620 | FLAG_Z = ZFLAG_SET;\r |
10621 | }\r |
10622 | \r |
10623 | \r |
10624 | void m68k_op_clr_8_al(void)\r |
10625 | {\r |
10626 | m68ki_write_8(EA_AL_8(), 0);\r |
10627 | \r |
10628 | FLAG_N = NFLAG_CLEAR;\r |
10629 | FLAG_V = VFLAG_CLEAR;\r |
10630 | FLAG_C = CFLAG_CLEAR;\r |
10631 | FLAG_Z = ZFLAG_SET;\r |
10632 | }\r |
10633 | \r |
10634 | \r |
10635 | void m68k_op_clr_16_d(void)\r |
10636 | {\r |
10637 | DY &= 0xffff0000;\r |
10638 | \r |
10639 | FLAG_N = NFLAG_CLEAR;\r |
10640 | FLAG_V = VFLAG_CLEAR;\r |
10641 | FLAG_C = CFLAG_CLEAR;\r |
10642 | FLAG_Z = ZFLAG_SET;\r |
10643 | }\r |
10644 | \r |
10645 | \r |
10646 | void m68k_op_clr_16_ai(void)\r |
10647 | {\r |
10648 | m68ki_write_16(EA_AY_AI_16(), 0);\r |
10649 | \r |
10650 | FLAG_N = NFLAG_CLEAR;\r |
10651 | FLAG_V = VFLAG_CLEAR;\r |
10652 | FLAG_C = CFLAG_CLEAR;\r |
10653 | FLAG_Z = ZFLAG_SET;\r |
10654 | }\r |
10655 | \r |
10656 | \r |
10657 | void m68k_op_clr_16_pi(void)\r |
10658 | {\r |
10659 | m68ki_write_16(EA_AY_PI_16(), 0);\r |
10660 | \r |
10661 | FLAG_N = NFLAG_CLEAR;\r |
10662 | FLAG_V = VFLAG_CLEAR;\r |
10663 | FLAG_C = CFLAG_CLEAR;\r |
10664 | FLAG_Z = ZFLAG_SET;\r |
10665 | }\r |
10666 | \r |
10667 | \r |
10668 | void m68k_op_clr_16_pd(void)\r |
10669 | {\r |
10670 | m68ki_write_16(EA_AY_PD_16(), 0);\r |
10671 | \r |
10672 | FLAG_N = NFLAG_CLEAR;\r |
10673 | FLAG_V = VFLAG_CLEAR;\r |
10674 | FLAG_C = CFLAG_CLEAR;\r |
10675 | FLAG_Z = ZFLAG_SET;\r |
10676 | }\r |
10677 | \r |
10678 | \r |
10679 | void m68k_op_clr_16_di(void)\r |
10680 | {\r |
10681 | m68ki_write_16(EA_AY_DI_16(), 0);\r |
10682 | \r |
10683 | FLAG_N = NFLAG_CLEAR;\r |
10684 | FLAG_V = VFLAG_CLEAR;\r |
10685 | FLAG_C = CFLAG_CLEAR;\r |
10686 | FLAG_Z = ZFLAG_SET;\r |
10687 | }\r |
10688 | \r |
10689 | \r |
10690 | void m68k_op_clr_16_ix(void)\r |
10691 | {\r |
10692 | m68ki_write_16(EA_AY_IX_16(), 0);\r |
10693 | \r |
10694 | FLAG_N = NFLAG_CLEAR;\r |
10695 | FLAG_V = VFLAG_CLEAR;\r |
10696 | FLAG_C = CFLAG_CLEAR;\r |
10697 | FLAG_Z = ZFLAG_SET;\r |
10698 | }\r |
10699 | \r |
10700 | \r |
10701 | void m68k_op_clr_16_aw(void)\r |
10702 | {\r |
10703 | m68ki_write_16(EA_AW_16(), 0);\r |
10704 | \r |
10705 | FLAG_N = NFLAG_CLEAR;\r |
10706 | FLAG_V = VFLAG_CLEAR;\r |
10707 | FLAG_C = CFLAG_CLEAR;\r |
10708 | FLAG_Z = ZFLAG_SET;\r |
10709 | }\r |
10710 | \r |
10711 | \r |
10712 | void m68k_op_clr_16_al(void)\r |
10713 | {\r |
10714 | m68ki_write_16(EA_AL_16(), 0);\r |
10715 | \r |
10716 | FLAG_N = NFLAG_CLEAR;\r |
10717 | FLAG_V = VFLAG_CLEAR;\r |
10718 | FLAG_C = CFLAG_CLEAR;\r |
10719 | FLAG_Z = ZFLAG_SET;\r |
10720 | }\r |
10721 | \r |
10722 | \r |
10723 | void m68k_op_clr_32_d(void)\r |
10724 | {\r |
10725 | DY = 0;\r |
10726 | \r |
10727 | FLAG_N = NFLAG_CLEAR;\r |
10728 | FLAG_V = VFLAG_CLEAR;\r |
10729 | FLAG_C = CFLAG_CLEAR;\r |
10730 | FLAG_Z = ZFLAG_SET;\r |
10731 | }\r |
10732 | \r |
10733 | \r |
10734 | void m68k_op_clr_32_ai(void)\r |
10735 | {\r |
10736 | m68ki_write_32(EA_AY_AI_32(), 0);\r |
10737 | \r |
10738 | FLAG_N = NFLAG_CLEAR;\r |
10739 | FLAG_V = VFLAG_CLEAR;\r |
10740 | FLAG_C = CFLAG_CLEAR;\r |
10741 | FLAG_Z = ZFLAG_SET;\r |
10742 | }\r |
10743 | \r |
10744 | \r |
10745 | void m68k_op_clr_32_pi(void)\r |
10746 | {\r |
10747 | m68ki_write_32(EA_AY_PI_32(), 0);\r |
10748 | \r |
10749 | FLAG_N = NFLAG_CLEAR;\r |
10750 | FLAG_V = VFLAG_CLEAR;\r |
10751 | FLAG_C = CFLAG_CLEAR;\r |
10752 | FLAG_Z = ZFLAG_SET;\r |
10753 | }\r |
10754 | \r |
10755 | \r |
10756 | void m68k_op_clr_32_pd(void)\r |
10757 | {\r |
10758 | m68ki_write_32(EA_AY_PD_32(), 0);\r |
10759 | \r |
10760 | FLAG_N = NFLAG_CLEAR;\r |
10761 | FLAG_V = VFLAG_CLEAR;\r |
10762 | FLAG_C = CFLAG_CLEAR;\r |
10763 | FLAG_Z = ZFLAG_SET;\r |
10764 | }\r |
10765 | \r |
10766 | \r |
10767 | void m68k_op_clr_32_di(void)\r |
10768 | {\r |
10769 | m68ki_write_32(EA_AY_DI_32(), 0);\r |
10770 | \r |
10771 | FLAG_N = NFLAG_CLEAR;\r |
10772 | FLAG_V = VFLAG_CLEAR;\r |
10773 | FLAG_C = CFLAG_CLEAR;\r |
10774 | FLAG_Z = ZFLAG_SET;\r |
10775 | }\r |
10776 | \r |
10777 | \r |
10778 | void m68k_op_clr_32_ix(void)\r |
10779 | {\r |
10780 | m68ki_write_32(EA_AY_IX_32(), 0);\r |
10781 | \r |
10782 | FLAG_N = NFLAG_CLEAR;\r |
10783 | FLAG_V = VFLAG_CLEAR;\r |
10784 | FLAG_C = CFLAG_CLEAR;\r |
10785 | FLAG_Z = ZFLAG_SET;\r |
10786 | }\r |
10787 | \r |
10788 | \r |
10789 | void m68k_op_clr_32_aw(void)\r |
10790 | {\r |
10791 | m68ki_write_32(EA_AW_32(), 0);\r |
10792 | \r |
10793 | FLAG_N = NFLAG_CLEAR;\r |
10794 | FLAG_V = VFLAG_CLEAR;\r |
10795 | FLAG_C = CFLAG_CLEAR;\r |
10796 | FLAG_Z = ZFLAG_SET;\r |
10797 | }\r |
10798 | \r |
10799 | \r |
10800 | void m68k_op_clr_32_al(void)\r |
10801 | {\r |
10802 | m68ki_write_32(EA_AL_32(), 0);\r |
10803 | \r |
10804 | FLAG_N = NFLAG_CLEAR;\r |
10805 | FLAG_V = VFLAG_CLEAR;\r |
10806 | FLAG_C = CFLAG_CLEAR;\r |
10807 | FLAG_Z = ZFLAG_SET;\r |
10808 | }\r |
10809 | \r |
10810 | \r |
10811 | void m68k_op_cmp_8_d(void)\r |
10812 | {\r |
10813 | uint src = MASK_OUT_ABOVE_8(DY);\r |
10814 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10815 | uint res = dst - src;\r |
10816 | \r |
10817 | FLAG_N = NFLAG_8(res);\r |
10818 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10819 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10820 | FLAG_C = CFLAG_8(res);\r |
10821 | }\r |
10822 | \r |
10823 | \r |
10824 | void m68k_op_cmp_8_ai(void)\r |
10825 | {\r |
10826 | uint src = OPER_AY_AI_8();\r |
10827 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10828 | uint res = dst - src;\r |
10829 | \r |
10830 | FLAG_N = NFLAG_8(res);\r |
10831 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10832 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10833 | FLAG_C = CFLAG_8(res);\r |
10834 | }\r |
10835 | \r |
10836 | \r |
10837 | void m68k_op_cmp_8_pi(void)\r |
10838 | {\r |
10839 | uint src = OPER_AY_PI_8();\r |
10840 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10841 | uint res = dst - src;\r |
10842 | \r |
10843 | FLAG_N = NFLAG_8(res);\r |
10844 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10845 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10846 | FLAG_C = CFLAG_8(res);\r |
10847 | }\r |
10848 | \r |
10849 | \r |
10850 | void m68k_op_cmp_8_pi7(void)\r |
10851 | {\r |
10852 | uint src = OPER_A7_PI_8();\r |
10853 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10854 | uint res = dst - src;\r |
10855 | \r |
10856 | FLAG_N = NFLAG_8(res);\r |
10857 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10858 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10859 | FLAG_C = CFLAG_8(res);\r |
10860 | }\r |
10861 | \r |
10862 | \r |
10863 | void m68k_op_cmp_8_pd(void)\r |
10864 | {\r |
10865 | uint src = OPER_AY_PD_8();\r |
10866 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10867 | uint res = dst - src;\r |
10868 | \r |
10869 | FLAG_N = NFLAG_8(res);\r |
10870 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10871 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10872 | FLAG_C = CFLAG_8(res);\r |
10873 | }\r |
10874 | \r |
10875 | \r |
10876 | void m68k_op_cmp_8_pd7(void)\r |
10877 | {\r |
10878 | uint src = OPER_A7_PD_8();\r |
10879 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10880 | uint res = dst - src;\r |
10881 | \r |
10882 | FLAG_N = NFLAG_8(res);\r |
10883 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10884 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10885 | FLAG_C = CFLAG_8(res);\r |
10886 | }\r |
10887 | \r |
10888 | \r |
10889 | void m68k_op_cmp_8_di(void)\r |
10890 | {\r |
10891 | uint src = OPER_AY_DI_8();\r |
10892 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10893 | uint res = dst - src;\r |
10894 | \r |
10895 | FLAG_N = NFLAG_8(res);\r |
10896 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10897 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10898 | FLAG_C = CFLAG_8(res);\r |
10899 | }\r |
10900 | \r |
10901 | \r |
10902 | void m68k_op_cmp_8_ix(void)\r |
10903 | {\r |
10904 | uint src = OPER_AY_IX_8();\r |
10905 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10906 | uint res = dst - src;\r |
10907 | \r |
10908 | FLAG_N = NFLAG_8(res);\r |
10909 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10910 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10911 | FLAG_C = CFLAG_8(res);\r |
10912 | }\r |
10913 | \r |
10914 | \r |
10915 | void m68k_op_cmp_8_aw(void)\r |
10916 | {\r |
10917 | uint src = OPER_AW_8();\r |
10918 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10919 | uint res = dst - src;\r |
10920 | \r |
10921 | FLAG_N = NFLAG_8(res);\r |
10922 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10923 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10924 | FLAG_C = CFLAG_8(res);\r |
10925 | }\r |
10926 | \r |
10927 | \r |
10928 | void m68k_op_cmp_8_al(void)\r |
10929 | {\r |
10930 | uint src = OPER_AL_8();\r |
10931 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10932 | uint res = dst - src;\r |
10933 | \r |
10934 | FLAG_N = NFLAG_8(res);\r |
10935 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10936 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10937 | FLAG_C = CFLAG_8(res);\r |
10938 | }\r |
10939 | \r |
10940 | \r |
10941 | void m68k_op_cmp_8_pcdi(void)\r |
10942 | {\r |
10943 | uint src = OPER_PCDI_8();\r |
10944 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10945 | uint res = dst - src;\r |
10946 | \r |
10947 | FLAG_N = NFLAG_8(res);\r |
10948 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10949 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10950 | FLAG_C = CFLAG_8(res);\r |
10951 | }\r |
10952 | \r |
10953 | \r |
10954 | void m68k_op_cmp_8_pcix(void)\r |
10955 | {\r |
10956 | uint src = OPER_PCIX_8();\r |
10957 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10958 | uint res = dst - src;\r |
10959 | \r |
10960 | FLAG_N = NFLAG_8(res);\r |
10961 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10962 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10963 | FLAG_C = CFLAG_8(res);\r |
10964 | }\r |
10965 | \r |
10966 | \r |
10967 | void m68k_op_cmp_8_i(void)\r |
10968 | {\r |
10969 | uint src = OPER_I_8();\r |
10970 | uint dst = MASK_OUT_ABOVE_8(DX);\r |
10971 | uint res = dst - src;\r |
10972 | \r |
10973 | FLAG_N = NFLAG_8(res);\r |
10974 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
10975 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
10976 | FLAG_C = CFLAG_8(res);\r |
10977 | }\r |
10978 | \r |
10979 | \r |
10980 | void m68k_op_cmp_16_d(void)\r |
10981 | {\r |
10982 | uint src = MASK_OUT_ABOVE_16(DY);\r |
10983 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
10984 | uint res = dst - src;\r |
10985 | \r |
10986 | FLAG_N = NFLAG_16(res);\r |
10987 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
10988 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
10989 | FLAG_C = CFLAG_16(res);\r |
10990 | }\r |
10991 | \r |
10992 | \r |
10993 | void m68k_op_cmp_16_a(void)\r |
10994 | {\r |
10995 | uint src = MASK_OUT_ABOVE_16(AY);\r |
10996 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
10997 | uint res = dst - src;\r |
10998 | \r |
10999 | FLAG_N = NFLAG_16(res);\r |
11000 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11001 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11002 | FLAG_C = CFLAG_16(res);\r |
11003 | }\r |
11004 | \r |
11005 | \r |
11006 | void m68k_op_cmp_16_ai(void)\r |
11007 | {\r |
11008 | uint src = OPER_AY_AI_16();\r |
11009 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11010 | uint res = dst - src;\r |
11011 | \r |
11012 | FLAG_N = NFLAG_16(res);\r |
11013 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11014 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11015 | FLAG_C = CFLAG_16(res);\r |
11016 | }\r |
11017 | \r |
11018 | \r |
11019 | void m68k_op_cmp_16_pi(void)\r |
11020 | {\r |
11021 | uint src = OPER_AY_PI_16();\r |
11022 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11023 | uint res = dst - src;\r |
11024 | \r |
11025 | FLAG_N = NFLAG_16(res);\r |
11026 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11027 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11028 | FLAG_C = CFLAG_16(res);\r |
11029 | }\r |
11030 | \r |
11031 | \r |
11032 | void m68k_op_cmp_16_pd(void)\r |
11033 | {\r |
11034 | uint src = OPER_AY_PD_16();\r |
11035 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11036 | uint res = dst - src;\r |
11037 | \r |
11038 | FLAG_N = NFLAG_16(res);\r |
11039 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11040 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11041 | FLAG_C = CFLAG_16(res);\r |
11042 | }\r |
11043 | \r |
11044 | \r |
11045 | void m68k_op_cmp_16_di(void)\r |
11046 | {\r |
11047 | uint src = OPER_AY_DI_16();\r |
11048 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11049 | uint res = dst - src;\r |
11050 | \r |
11051 | FLAG_N = NFLAG_16(res);\r |
11052 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11053 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11054 | FLAG_C = CFLAG_16(res);\r |
11055 | }\r |
11056 | \r |
11057 | \r |
11058 | void m68k_op_cmp_16_ix(void)\r |
11059 | {\r |
11060 | uint src = OPER_AY_IX_16();\r |
11061 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11062 | uint res = dst - src;\r |
11063 | \r |
11064 | FLAG_N = NFLAG_16(res);\r |
11065 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11066 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11067 | FLAG_C = CFLAG_16(res);\r |
11068 | }\r |
11069 | \r |
11070 | \r |
11071 | void m68k_op_cmp_16_aw(void)\r |
11072 | {\r |
11073 | uint src = OPER_AW_16();\r |
11074 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11075 | uint res = dst - src;\r |
11076 | \r |
11077 | FLAG_N = NFLAG_16(res);\r |
11078 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11079 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11080 | FLAG_C = CFLAG_16(res);\r |
11081 | }\r |
11082 | \r |
11083 | \r |
11084 | void m68k_op_cmp_16_al(void)\r |
11085 | {\r |
11086 | uint src = OPER_AL_16();\r |
11087 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11088 | uint res = dst - src;\r |
11089 | \r |
11090 | FLAG_N = NFLAG_16(res);\r |
11091 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11092 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11093 | FLAG_C = CFLAG_16(res);\r |
11094 | }\r |
11095 | \r |
11096 | \r |
11097 | void m68k_op_cmp_16_pcdi(void)\r |
11098 | {\r |
11099 | uint src = OPER_PCDI_16();\r |
11100 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11101 | uint res = dst - src;\r |
11102 | \r |
11103 | FLAG_N = NFLAG_16(res);\r |
11104 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11105 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11106 | FLAG_C = CFLAG_16(res);\r |
11107 | }\r |
11108 | \r |
11109 | \r |
11110 | void m68k_op_cmp_16_pcix(void)\r |
11111 | {\r |
11112 | uint src = OPER_PCIX_16();\r |
11113 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11114 | uint res = dst - src;\r |
11115 | \r |
11116 | FLAG_N = NFLAG_16(res);\r |
11117 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11118 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11119 | FLAG_C = CFLAG_16(res);\r |
11120 | }\r |
11121 | \r |
11122 | \r |
11123 | void m68k_op_cmp_16_i(void)\r |
11124 | {\r |
11125 | uint src = OPER_I_16();\r |
11126 | uint dst = MASK_OUT_ABOVE_16(DX);\r |
11127 | uint res = dst - src;\r |
11128 | \r |
11129 | FLAG_N = NFLAG_16(res);\r |
11130 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11131 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11132 | FLAG_C = CFLAG_16(res);\r |
11133 | }\r |
11134 | \r |
11135 | \r |
11136 | void m68k_op_cmp_32_d(void)\r |
11137 | {\r |
11138 | uint src = DY;\r |
11139 | uint dst = DX;\r |
11140 | uint res = dst - src;\r |
11141 | \r |
11142 | FLAG_N = NFLAG_32(res);\r |
11143 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11144 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11145 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11146 | }\r |
11147 | \r |
11148 | \r |
11149 | void m68k_op_cmp_32_a(void)\r |
11150 | {\r |
11151 | uint src = AY;\r |
11152 | uint dst = DX;\r |
11153 | uint res = dst - src;\r |
11154 | \r |
11155 | FLAG_N = NFLAG_32(res);\r |
11156 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11157 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11158 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11159 | }\r |
11160 | \r |
11161 | \r |
11162 | void m68k_op_cmp_32_ai(void)\r |
11163 | {\r |
11164 | uint src = OPER_AY_AI_32();\r |
11165 | uint dst = DX;\r |
11166 | uint res = dst - src;\r |
11167 | \r |
11168 | FLAG_N = NFLAG_32(res);\r |
11169 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11170 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11171 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11172 | }\r |
11173 | \r |
11174 | \r |
11175 | void m68k_op_cmp_32_pi(void)\r |
11176 | {\r |
11177 | uint src = OPER_AY_PI_32();\r |
11178 | uint dst = DX;\r |
11179 | uint res = dst - src;\r |
11180 | \r |
11181 | FLAG_N = NFLAG_32(res);\r |
11182 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11183 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11184 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11185 | }\r |
11186 | \r |
11187 | \r |
11188 | void m68k_op_cmp_32_pd(void)\r |
11189 | {\r |
11190 | uint src = OPER_AY_PD_32();\r |
11191 | uint dst = DX;\r |
11192 | uint res = dst - src;\r |
11193 | \r |
11194 | FLAG_N = NFLAG_32(res);\r |
11195 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11196 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11197 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11198 | }\r |
11199 | \r |
11200 | \r |
11201 | void m68k_op_cmp_32_di(void)\r |
11202 | {\r |
11203 | uint src = OPER_AY_DI_32();\r |
11204 | uint dst = DX;\r |
11205 | uint res = dst - src;\r |
11206 | \r |
11207 | FLAG_N = NFLAG_32(res);\r |
11208 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11209 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11210 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11211 | }\r |
11212 | \r |
11213 | \r |
11214 | void m68k_op_cmp_32_ix(void)\r |
11215 | {\r |
11216 | uint src = OPER_AY_IX_32();\r |
11217 | uint dst = DX;\r |
11218 | uint res = dst - src;\r |
11219 | \r |
11220 | FLAG_N = NFLAG_32(res);\r |
11221 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11222 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11223 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11224 | }\r |
11225 | \r |
11226 | \r |
11227 | void m68k_op_cmp_32_aw(void)\r |
11228 | {\r |
11229 | uint src = OPER_AW_32();\r |
11230 | uint dst = DX;\r |
11231 | uint res = dst - src;\r |
11232 | \r |
11233 | FLAG_N = NFLAG_32(res);\r |
11234 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11235 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11236 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11237 | }\r |
11238 | \r |
11239 | \r |
11240 | void m68k_op_cmp_32_al(void)\r |
11241 | {\r |
11242 | uint src = OPER_AL_32();\r |
11243 | uint dst = DX;\r |
11244 | uint res = dst - src;\r |
11245 | \r |
11246 | FLAG_N = NFLAG_32(res);\r |
11247 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11248 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11249 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11250 | }\r |
11251 | \r |
11252 | \r |
11253 | void m68k_op_cmp_32_pcdi(void)\r |
11254 | {\r |
11255 | uint src = OPER_PCDI_32();\r |
11256 | uint dst = DX;\r |
11257 | uint res = dst - src;\r |
11258 | \r |
11259 | FLAG_N = NFLAG_32(res);\r |
11260 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11261 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11262 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11263 | }\r |
11264 | \r |
11265 | \r |
11266 | void m68k_op_cmp_32_pcix(void)\r |
11267 | {\r |
11268 | uint src = OPER_PCIX_32();\r |
11269 | uint dst = DX;\r |
11270 | uint res = dst - src;\r |
11271 | \r |
11272 | FLAG_N = NFLAG_32(res);\r |
11273 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11274 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11275 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11276 | }\r |
11277 | \r |
11278 | \r |
11279 | void m68k_op_cmp_32_i(void)\r |
11280 | {\r |
11281 | uint src = OPER_I_32();\r |
11282 | uint dst = DX;\r |
11283 | uint res = dst - src;\r |
11284 | \r |
11285 | FLAG_N = NFLAG_32(res);\r |
11286 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11287 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11288 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11289 | }\r |
11290 | \r |
11291 | \r |
11292 | void m68k_op_cmpa_16_d(void)\r |
11293 | {\r |
11294 | uint src = MAKE_INT_16(DY);\r |
11295 | uint dst = AX;\r |
11296 | uint res = dst - src;\r |
11297 | \r |
11298 | FLAG_N = NFLAG_32(res);\r |
11299 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11300 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11301 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11302 | }\r |
11303 | \r |
11304 | \r |
11305 | void m68k_op_cmpa_16_a(void)\r |
11306 | {\r |
11307 | uint src = MAKE_INT_16(AY);\r |
11308 | uint dst = AX;\r |
11309 | uint res = dst - src;\r |
11310 | \r |
11311 | FLAG_N = NFLAG_32(res);\r |
11312 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11313 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11314 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11315 | }\r |
11316 | \r |
11317 | \r |
11318 | void m68k_op_cmpa_16_ai(void)\r |
11319 | {\r |
11320 | uint src = MAKE_INT_16(OPER_AY_AI_16());\r |
11321 | uint dst = AX;\r |
11322 | uint res = dst - src;\r |
11323 | \r |
11324 | FLAG_N = NFLAG_32(res);\r |
11325 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11326 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11327 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11328 | }\r |
11329 | \r |
11330 | \r |
11331 | void m68k_op_cmpa_16_pi(void)\r |
11332 | {\r |
11333 | uint src = MAKE_INT_16(OPER_AY_PI_16());\r |
11334 | uint dst = AX;\r |
11335 | uint res = dst - src;\r |
11336 | \r |
11337 | FLAG_N = NFLAG_32(res);\r |
11338 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11339 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11340 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11341 | }\r |
11342 | \r |
11343 | \r |
11344 | void m68k_op_cmpa_16_pd(void)\r |
11345 | {\r |
11346 | uint src = MAKE_INT_16(OPER_AY_PD_16());\r |
11347 | uint dst = AX;\r |
11348 | uint res = dst - src;\r |
11349 | \r |
11350 | FLAG_N = NFLAG_32(res);\r |
11351 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11352 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11353 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11354 | }\r |
11355 | \r |
11356 | \r |
11357 | void m68k_op_cmpa_16_di(void)\r |
11358 | {\r |
11359 | uint src = MAKE_INT_16(OPER_AY_DI_16());\r |
11360 | uint dst = AX;\r |
11361 | uint res = dst - src;\r |
11362 | \r |
11363 | FLAG_N = NFLAG_32(res);\r |
11364 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11365 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11366 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11367 | }\r |
11368 | \r |
11369 | \r |
11370 | void m68k_op_cmpa_16_ix(void)\r |
11371 | {\r |
11372 | uint src = MAKE_INT_16(OPER_AY_IX_16());\r |
11373 | uint dst = AX;\r |
11374 | uint res = dst - src;\r |
11375 | \r |
11376 | FLAG_N = NFLAG_32(res);\r |
11377 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11378 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11379 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11380 | }\r |
11381 | \r |
11382 | \r |
11383 | void m68k_op_cmpa_16_aw(void)\r |
11384 | {\r |
11385 | uint src = MAKE_INT_16(OPER_AW_16());\r |
11386 | uint dst = AX;\r |
11387 | uint res = dst - src;\r |
11388 | \r |
11389 | FLAG_N = NFLAG_32(res);\r |
11390 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11391 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11392 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11393 | }\r |
11394 | \r |
11395 | \r |
11396 | void m68k_op_cmpa_16_al(void)\r |
11397 | {\r |
11398 | uint src = MAKE_INT_16(OPER_AL_16());\r |
11399 | uint dst = AX;\r |
11400 | uint res = dst - src;\r |
11401 | \r |
11402 | FLAG_N = NFLAG_32(res);\r |
11403 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11404 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11405 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11406 | }\r |
11407 | \r |
11408 | \r |
11409 | void m68k_op_cmpa_16_pcdi(void)\r |
11410 | {\r |
11411 | uint src = MAKE_INT_16(OPER_PCDI_16());\r |
11412 | uint dst = AX;\r |
11413 | uint res = dst - src;\r |
11414 | \r |
11415 | FLAG_N = NFLAG_32(res);\r |
11416 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11417 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11418 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11419 | }\r |
11420 | \r |
11421 | \r |
11422 | void m68k_op_cmpa_16_pcix(void)\r |
11423 | {\r |
11424 | uint src = MAKE_INT_16(OPER_PCIX_16());\r |
11425 | uint dst = AX;\r |
11426 | uint res = dst - src;\r |
11427 | \r |
11428 | FLAG_N = NFLAG_32(res);\r |
11429 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11430 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11431 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11432 | }\r |
11433 | \r |
11434 | \r |
11435 | void m68k_op_cmpa_16_i(void)\r |
11436 | {\r |
11437 | uint src = MAKE_INT_16(OPER_I_16());\r |
11438 | uint dst = AX;\r |
11439 | uint res = dst - src;\r |
11440 | \r |
11441 | FLAG_N = NFLAG_32(res);\r |
11442 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11443 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11444 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11445 | }\r |
11446 | \r |
11447 | \r |
11448 | void m68k_op_cmpa_32_d(void)\r |
11449 | {\r |
11450 | uint src = DY;\r |
11451 | uint dst = AX;\r |
11452 | uint res = dst - src;\r |
11453 | \r |
11454 | FLAG_N = NFLAG_32(res);\r |
11455 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11456 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11457 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11458 | }\r |
11459 | \r |
11460 | \r |
11461 | void m68k_op_cmpa_32_a(void)\r |
11462 | {\r |
11463 | uint src = AY;\r |
11464 | uint dst = AX;\r |
11465 | uint res = dst - src;\r |
11466 | \r |
11467 | FLAG_N = NFLAG_32(res);\r |
11468 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11469 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11470 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11471 | }\r |
11472 | \r |
11473 | \r |
11474 | void m68k_op_cmpa_32_ai(void)\r |
11475 | {\r |
11476 | uint src = OPER_AY_AI_32();\r |
11477 | uint dst = AX;\r |
11478 | uint res = dst - src;\r |
11479 | \r |
11480 | FLAG_N = NFLAG_32(res);\r |
11481 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11482 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11483 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11484 | }\r |
11485 | \r |
11486 | \r |
11487 | void m68k_op_cmpa_32_pi(void)\r |
11488 | {\r |
11489 | uint src = OPER_AY_PI_32();\r |
11490 | uint dst = AX;\r |
11491 | uint res = dst - src;\r |
11492 | \r |
11493 | FLAG_N = NFLAG_32(res);\r |
11494 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11495 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11496 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11497 | }\r |
11498 | \r |
11499 | \r |
11500 | void m68k_op_cmpa_32_pd(void)\r |
11501 | {\r |
11502 | uint src = OPER_AY_PD_32();\r |
11503 | uint dst = AX;\r |
11504 | uint res = dst - src;\r |
11505 | \r |
11506 | FLAG_N = NFLAG_32(res);\r |
11507 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11508 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11509 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11510 | }\r |
11511 | \r |
11512 | \r |
11513 | void m68k_op_cmpa_32_di(void)\r |
11514 | {\r |
11515 | uint src = OPER_AY_DI_32();\r |
11516 | uint dst = AX;\r |
11517 | uint res = dst - src;\r |
11518 | \r |
11519 | FLAG_N = NFLAG_32(res);\r |
11520 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11521 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11522 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11523 | }\r |
11524 | \r |
11525 | \r |
11526 | void m68k_op_cmpa_32_ix(void)\r |
11527 | {\r |
11528 | uint src = OPER_AY_IX_32();\r |
11529 | uint dst = AX;\r |
11530 | uint res = dst - src;\r |
11531 | \r |
11532 | FLAG_N = NFLAG_32(res);\r |
11533 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11534 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11535 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11536 | }\r |
11537 | \r |
11538 | \r |
11539 | void m68k_op_cmpa_32_aw(void)\r |
11540 | {\r |
11541 | uint src = OPER_AW_32();\r |
11542 | uint dst = AX;\r |
11543 | uint res = dst - src;\r |
11544 | \r |
11545 | FLAG_N = NFLAG_32(res);\r |
11546 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11547 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11548 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11549 | }\r |
11550 | \r |
11551 | \r |
11552 | void m68k_op_cmpa_32_al(void)\r |
11553 | {\r |
11554 | uint src = OPER_AL_32();\r |
11555 | uint dst = AX;\r |
11556 | uint res = dst - src;\r |
11557 | \r |
11558 | FLAG_N = NFLAG_32(res);\r |
11559 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11560 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11561 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11562 | }\r |
11563 | \r |
11564 | \r |
11565 | void m68k_op_cmpa_32_pcdi(void)\r |
11566 | {\r |
11567 | uint src = OPER_PCDI_32();\r |
11568 | uint dst = AX;\r |
11569 | uint res = dst - src;\r |
11570 | \r |
11571 | FLAG_N = NFLAG_32(res);\r |
11572 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11573 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11574 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11575 | }\r |
11576 | \r |
11577 | \r |
11578 | void m68k_op_cmpa_32_pcix(void)\r |
11579 | {\r |
11580 | uint src = OPER_PCIX_32();\r |
11581 | uint dst = AX;\r |
11582 | uint res = dst - src;\r |
11583 | \r |
11584 | FLAG_N = NFLAG_32(res);\r |
11585 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11586 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11587 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11588 | }\r |
11589 | \r |
11590 | \r |
11591 | void m68k_op_cmpa_32_i(void)\r |
11592 | {\r |
11593 | uint src = OPER_I_32();\r |
11594 | uint dst = AX;\r |
11595 | uint res = dst - src;\r |
11596 | \r |
11597 | FLAG_N = NFLAG_32(res);\r |
11598 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11599 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11600 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11601 | }\r |
11602 | \r |
11603 | \r |
11604 | void m68k_op_cmpi_8_d(void)\r |
11605 | {\r |
11606 | uint src = OPER_I_8();\r |
11607 | uint dst = MASK_OUT_ABOVE_8(DY);\r |
11608 | uint res = dst - src;\r |
11609 | \r |
11610 | FLAG_N = NFLAG_8(res);\r |
11611 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11612 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11613 | FLAG_C = CFLAG_8(res);\r |
11614 | }\r |
11615 | \r |
11616 | \r |
11617 | void m68k_op_cmpi_8_ai(void)\r |
11618 | {\r |
11619 | uint src = OPER_I_8();\r |
11620 | uint dst = OPER_AY_AI_8();\r |
11621 | uint res = dst - src;\r |
11622 | \r |
11623 | FLAG_N = NFLAG_8(res);\r |
11624 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11625 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11626 | FLAG_C = CFLAG_8(res);\r |
11627 | }\r |
11628 | \r |
11629 | \r |
11630 | void m68k_op_cmpi_8_pi(void)\r |
11631 | {\r |
11632 | uint src = OPER_I_8();\r |
11633 | uint dst = OPER_AY_PI_8();\r |
11634 | uint res = dst - src;\r |
11635 | \r |
11636 | FLAG_N = NFLAG_8(res);\r |
11637 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11638 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11639 | FLAG_C = CFLAG_8(res);\r |
11640 | }\r |
11641 | \r |
11642 | \r |
11643 | void m68k_op_cmpi_8_pi7(void)\r |
11644 | {\r |
11645 | uint src = OPER_I_8();\r |
11646 | uint dst = OPER_A7_PI_8();\r |
11647 | uint res = dst - src;\r |
11648 | \r |
11649 | FLAG_N = NFLAG_8(res);\r |
11650 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11651 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11652 | FLAG_C = CFLAG_8(res);\r |
11653 | }\r |
11654 | \r |
11655 | \r |
11656 | void m68k_op_cmpi_8_pd(void)\r |
11657 | {\r |
11658 | uint src = OPER_I_8();\r |
11659 | uint dst = OPER_AY_PD_8();\r |
11660 | uint res = dst - src;\r |
11661 | \r |
11662 | FLAG_N = NFLAG_8(res);\r |
11663 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11664 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11665 | FLAG_C = CFLAG_8(res);\r |
11666 | }\r |
11667 | \r |
11668 | \r |
11669 | void m68k_op_cmpi_8_pd7(void)\r |
11670 | {\r |
11671 | uint src = OPER_I_8();\r |
11672 | uint dst = OPER_A7_PD_8();\r |
11673 | uint res = dst - src;\r |
11674 | \r |
11675 | FLAG_N = NFLAG_8(res);\r |
11676 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11677 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11678 | FLAG_C = CFLAG_8(res);\r |
11679 | }\r |
11680 | \r |
11681 | \r |
11682 | void m68k_op_cmpi_8_di(void)\r |
11683 | {\r |
11684 | uint src = OPER_I_8();\r |
11685 | uint dst = OPER_AY_DI_8();\r |
11686 | uint res = dst - src;\r |
11687 | \r |
11688 | FLAG_N = NFLAG_8(res);\r |
11689 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11690 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11691 | FLAG_C = CFLAG_8(res);\r |
11692 | }\r |
11693 | \r |
11694 | \r |
11695 | void m68k_op_cmpi_8_ix(void)\r |
11696 | {\r |
11697 | uint src = OPER_I_8();\r |
11698 | uint dst = OPER_AY_IX_8();\r |
11699 | uint res = dst - src;\r |
11700 | \r |
11701 | FLAG_N = NFLAG_8(res);\r |
11702 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11703 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11704 | FLAG_C = CFLAG_8(res);\r |
11705 | }\r |
11706 | \r |
11707 | \r |
11708 | void m68k_op_cmpi_8_aw(void)\r |
11709 | {\r |
11710 | uint src = OPER_I_8();\r |
11711 | uint dst = OPER_AW_8();\r |
11712 | uint res = dst - src;\r |
11713 | \r |
11714 | FLAG_N = NFLAG_8(res);\r |
11715 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11716 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11717 | FLAG_C = CFLAG_8(res);\r |
11718 | }\r |
11719 | \r |
11720 | \r |
11721 | void m68k_op_cmpi_8_al(void)\r |
11722 | {\r |
11723 | uint src = OPER_I_8();\r |
11724 | uint dst = OPER_AL_8();\r |
11725 | uint res = dst - src;\r |
11726 | \r |
11727 | FLAG_N = NFLAG_8(res);\r |
11728 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11729 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11730 | FLAG_C = CFLAG_8(res);\r |
11731 | }\r |
11732 | \r |
11733 | \r |
11734 | void m68k_op_cmpi_8_pcdi(void)\r |
11735 | {\r |
11736 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
11737 | {\r |
11738 | uint src = OPER_I_8();\r |
11739 | uint dst = OPER_PCDI_8();\r |
11740 | uint res = dst - src;\r |
11741 | \r |
11742 | FLAG_N = NFLAG_8(res);\r |
11743 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11744 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11745 | FLAG_C = CFLAG_8(res);\r |
11746 | return;\r |
11747 | }\r |
11748 | m68ki_exception_illegal();\r |
11749 | }\r |
11750 | \r |
11751 | \r |
11752 | void m68k_op_cmpi_8_pcix(void)\r |
11753 | {\r |
11754 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
11755 | {\r |
11756 | uint src = OPER_I_8();\r |
11757 | uint dst = OPER_PCIX_8();\r |
11758 | uint res = dst - src;\r |
11759 | \r |
11760 | FLAG_N = NFLAG_8(res);\r |
11761 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
11762 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
11763 | FLAG_C = CFLAG_8(res);\r |
11764 | return;\r |
11765 | }\r |
11766 | m68ki_exception_illegal();\r |
11767 | }\r |
11768 | \r |
11769 | \r |
11770 | void m68k_op_cmpi_16_d(void)\r |
11771 | {\r |
11772 | uint src = OPER_I_16();\r |
11773 | uint dst = MASK_OUT_ABOVE_16(DY);\r |
11774 | uint res = dst - src;\r |
11775 | \r |
11776 | FLAG_N = NFLAG_16(res);\r |
11777 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11778 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11779 | FLAG_C = CFLAG_16(res);\r |
11780 | }\r |
11781 | \r |
11782 | \r |
11783 | void m68k_op_cmpi_16_ai(void)\r |
11784 | {\r |
11785 | uint src = OPER_I_16();\r |
11786 | uint dst = OPER_AY_AI_16();\r |
11787 | uint res = dst - src;\r |
11788 | \r |
11789 | FLAG_N = NFLAG_16(res);\r |
11790 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11791 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11792 | FLAG_C = CFLAG_16(res);\r |
11793 | }\r |
11794 | \r |
11795 | \r |
11796 | void m68k_op_cmpi_16_pi(void)\r |
11797 | {\r |
11798 | uint src = OPER_I_16();\r |
11799 | uint dst = OPER_AY_PI_16();\r |
11800 | uint res = dst - src;\r |
11801 | \r |
11802 | FLAG_N = NFLAG_16(res);\r |
11803 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11804 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11805 | FLAG_C = CFLAG_16(res);\r |
11806 | }\r |
11807 | \r |
11808 | \r |
11809 | void m68k_op_cmpi_16_pd(void)\r |
11810 | {\r |
11811 | uint src = OPER_I_16();\r |
11812 | uint dst = OPER_AY_PD_16();\r |
11813 | uint res = dst - src;\r |
11814 | \r |
11815 | FLAG_N = NFLAG_16(res);\r |
11816 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11817 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11818 | FLAG_C = CFLAG_16(res);\r |
11819 | }\r |
11820 | \r |
11821 | \r |
11822 | void m68k_op_cmpi_16_di(void)\r |
11823 | {\r |
11824 | uint src = OPER_I_16();\r |
11825 | uint dst = OPER_AY_DI_16();\r |
11826 | uint res = dst - src;\r |
11827 | \r |
11828 | FLAG_N = NFLAG_16(res);\r |
11829 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11830 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11831 | FLAG_C = CFLAG_16(res);\r |
11832 | }\r |
11833 | \r |
11834 | \r |
11835 | void m68k_op_cmpi_16_ix(void)\r |
11836 | {\r |
11837 | uint src = OPER_I_16();\r |
11838 | uint dst = OPER_AY_IX_16();\r |
11839 | uint res = dst - src;\r |
11840 | \r |
11841 | FLAG_N = NFLAG_16(res);\r |
11842 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11843 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11844 | FLAG_C = CFLAG_16(res);\r |
11845 | }\r |
11846 | \r |
11847 | \r |
11848 | void m68k_op_cmpi_16_aw(void)\r |
11849 | {\r |
11850 | uint src = OPER_I_16();\r |
11851 | uint dst = OPER_AW_16();\r |
11852 | uint res = dst - src;\r |
11853 | \r |
11854 | FLAG_N = NFLAG_16(res);\r |
11855 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11856 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11857 | FLAG_C = CFLAG_16(res);\r |
11858 | }\r |
11859 | \r |
11860 | \r |
11861 | void m68k_op_cmpi_16_al(void)\r |
11862 | {\r |
11863 | uint src = OPER_I_16();\r |
11864 | uint dst = OPER_AL_16();\r |
11865 | uint res = dst - src;\r |
11866 | \r |
11867 | FLAG_N = NFLAG_16(res);\r |
11868 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11869 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11870 | FLAG_C = CFLAG_16(res);\r |
11871 | }\r |
11872 | \r |
11873 | \r |
11874 | void m68k_op_cmpi_16_pcdi(void)\r |
11875 | {\r |
11876 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
11877 | {\r |
11878 | uint src = OPER_I_16();\r |
11879 | uint dst = OPER_PCDI_16();\r |
11880 | uint res = dst - src;\r |
11881 | \r |
11882 | FLAG_N = NFLAG_16(res);\r |
11883 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11884 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11885 | FLAG_C = CFLAG_16(res);\r |
11886 | return;\r |
11887 | }\r |
11888 | m68ki_exception_illegal();\r |
11889 | }\r |
11890 | \r |
11891 | \r |
11892 | void m68k_op_cmpi_16_pcix(void)\r |
11893 | {\r |
11894 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
11895 | {\r |
11896 | uint src = OPER_I_16();\r |
11897 | uint dst = OPER_PCIX_16();\r |
11898 | uint res = dst - src;\r |
11899 | \r |
11900 | FLAG_N = NFLAG_16(res);\r |
11901 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
11902 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
11903 | FLAG_C = CFLAG_16(res);\r |
11904 | return;\r |
11905 | }\r |
11906 | m68ki_exception_illegal();\r |
11907 | }\r |
11908 | \r |
11909 | \r |
11910 | void m68k_op_cmpi_32_d(void)\r |
11911 | {\r |
11912 | uint src = OPER_I_32();\r |
11913 | uint dst = DY;\r |
11914 | uint res = dst - src;\r |
11915 | \r |
11916 | m68ki_cmpild_callback(src, REG_IR & 7); /* auto-disable (see m68kcpu.h) */\r |
11917 | \r |
11918 | FLAG_N = NFLAG_32(res);\r |
11919 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11920 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11921 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11922 | }\r |
11923 | \r |
11924 | \r |
11925 | void m68k_op_cmpi_32_ai(void)\r |
11926 | {\r |
11927 | uint src = OPER_I_32();\r |
11928 | uint dst = OPER_AY_AI_32();\r |
11929 | uint res = dst - src;\r |
11930 | \r |
11931 | FLAG_N = NFLAG_32(res);\r |
11932 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11933 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11934 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11935 | }\r |
11936 | \r |
11937 | \r |
11938 | void m68k_op_cmpi_32_pi(void)\r |
11939 | {\r |
11940 | uint src = OPER_I_32();\r |
11941 | uint dst = OPER_AY_PI_32();\r |
11942 | uint res = dst - src;\r |
11943 | \r |
11944 | FLAG_N = NFLAG_32(res);\r |
11945 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11946 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11947 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11948 | }\r |
11949 | \r |
11950 | \r |
11951 | void m68k_op_cmpi_32_pd(void)\r |
11952 | {\r |
11953 | uint src = OPER_I_32();\r |
11954 | uint dst = OPER_AY_PD_32();\r |
11955 | uint res = dst - src;\r |
11956 | \r |
11957 | FLAG_N = NFLAG_32(res);\r |
11958 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11959 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11960 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11961 | }\r |
11962 | \r |
11963 | \r |
11964 | void m68k_op_cmpi_32_di(void)\r |
11965 | {\r |
11966 | uint src = OPER_I_32();\r |
11967 | uint dst = OPER_AY_DI_32();\r |
11968 | uint res = dst - src;\r |
11969 | \r |
11970 | FLAG_N = NFLAG_32(res);\r |
11971 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11972 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11973 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11974 | }\r |
11975 | \r |
11976 | \r |
11977 | void m68k_op_cmpi_32_ix(void)\r |
11978 | {\r |
11979 | uint src = OPER_I_32();\r |
11980 | uint dst = OPER_AY_IX_32();\r |
11981 | uint res = dst - src;\r |
11982 | \r |
11983 | FLAG_N = NFLAG_32(res);\r |
11984 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11985 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11986 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
11987 | }\r |
11988 | \r |
11989 | \r |
11990 | void m68k_op_cmpi_32_aw(void)\r |
11991 | {\r |
11992 | uint src = OPER_I_32();\r |
11993 | uint dst = OPER_AW_32();\r |
11994 | uint res = dst - src;\r |
11995 | \r |
11996 | FLAG_N = NFLAG_32(res);\r |
11997 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
11998 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
11999 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
12000 | }\r |
12001 | \r |
12002 | \r |
12003 | void m68k_op_cmpi_32_al(void)\r |
12004 | {\r |
12005 | uint src = OPER_I_32();\r |
12006 | uint dst = OPER_AL_32();\r |
12007 | uint res = dst - src;\r |
12008 | \r |
12009 | FLAG_N = NFLAG_32(res);\r |
12010 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12011 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
12012 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
12013 | }\r |
12014 | \r |
12015 | \r |
12016 | void m68k_op_cmpi_32_pcdi(void)\r |
12017 | {\r |
12018 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12019 | {\r |
12020 | uint src = OPER_I_32();\r |
12021 | uint dst = OPER_PCDI_32();\r |
12022 | uint res = dst - src;\r |
12023 | \r |
12024 | FLAG_N = NFLAG_32(res);\r |
12025 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12026 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
12027 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
12028 | return;\r |
12029 | }\r |
12030 | m68ki_exception_illegal();\r |
12031 | }\r |
12032 | \r |
12033 | \r |
12034 | void m68k_op_cmpi_32_pcix(void)\r |
12035 | {\r |
12036 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12037 | {\r |
12038 | uint src = OPER_I_32();\r |
12039 | uint dst = OPER_PCIX_32();\r |
12040 | uint res = dst - src;\r |
12041 | \r |
12042 | FLAG_N = NFLAG_32(res);\r |
12043 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12044 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
12045 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
12046 | return;\r |
12047 | }\r |
12048 | m68ki_exception_illegal();\r |
12049 | }\r |
12050 | \r |
12051 | \r |
12052 | void m68k_op_cmpm_8_ax7(void)\r |
12053 | {\r |
12054 | uint src = OPER_AY_PI_8();\r |
12055 | uint dst = OPER_A7_PI_8();\r |
12056 | uint res = dst - src;\r |
12057 | \r |
12058 | FLAG_N = NFLAG_8(res);\r |
12059 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
12060 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
12061 | FLAG_C = CFLAG_8(res);\r |
12062 | }\r |
12063 | \r |
12064 | \r |
12065 | void m68k_op_cmpm_8_ay7(void)\r |
12066 | {\r |
12067 | uint src = OPER_A7_PI_8();\r |
12068 | uint dst = OPER_AX_PI_8();\r |
12069 | uint res = dst - src;\r |
12070 | \r |
12071 | FLAG_N = NFLAG_8(res);\r |
12072 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
12073 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
12074 | FLAG_C = CFLAG_8(res);\r |
12075 | }\r |
12076 | \r |
12077 | \r |
12078 | void m68k_op_cmpm_8_axy7(void)\r |
12079 | {\r |
12080 | uint src = OPER_A7_PI_8();\r |
12081 | uint dst = OPER_A7_PI_8();\r |
12082 | uint res = dst - src;\r |
12083 | \r |
12084 | FLAG_N = NFLAG_8(res);\r |
12085 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
12086 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
12087 | FLAG_C = CFLAG_8(res);\r |
12088 | }\r |
12089 | \r |
12090 | \r |
12091 | void m68k_op_cmpm_8(void)\r |
12092 | {\r |
12093 | uint src = OPER_AY_PI_8();\r |
12094 | uint dst = OPER_AX_PI_8();\r |
12095 | uint res = dst - src;\r |
12096 | \r |
12097 | FLAG_N = NFLAG_8(res);\r |
12098 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
12099 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
12100 | FLAG_C = CFLAG_8(res);\r |
12101 | }\r |
12102 | \r |
12103 | \r |
12104 | void m68k_op_cmpm_16(void)\r |
12105 | {\r |
12106 | uint src = OPER_AY_PI_16();\r |
12107 | uint dst = OPER_AX_PI_16();\r |
12108 | uint res = dst - src;\r |
12109 | \r |
12110 | FLAG_N = NFLAG_16(res);\r |
12111 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
12112 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
12113 | FLAG_C = CFLAG_16(res);\r |
12114 | }\r |
12115 | \r |
12116 | \r |
12117 | void m68k_op_cmpm_32(void)\r |
12118 | {\r |
12119 | uint src = OPER_AY_PI_32();\r |
12120 | uint dst = OPER_AX_PI_32();\r |
12121 | uint res = dst - src;\r |
12122 | \r |
12123 | FLAG_N = NFLAG_32(res);\r |
12124 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12125 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
12126 | FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
12127 | }\r |
12128 | \r |
12129 | \r |
12130 | void m68k_op_cpbcc_32(void)\r |
12131 | {\r |
12132 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12133 | {\r |
12134 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
12135 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
12136 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
12137 | return;\r |
12138 | }\r |
12139 | m68ki_exception_1111();\r |
12140 | }\r |
12141 | \r |
12142 | \r |
12143 | void m68k_op_cpdbcc_32(void)\r |
12144 | {\r |
12145 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12146 | {\r |
12147 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
12148 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
12149 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
12150 | return;\r |
12151 | }\r |
12152 | m68ki_exception_1111();\r |
12153 | }\r |
12154 | \r |
12155 | \r |
12156 | void m68k_op_cpgen_32(void)\r |
12157 | {\r |
12158 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12159 | {\r |
12160 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
12161 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
12162 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
12163 | return;\r |
12164 | }\r |
12165 | m68ki_exception_1111();\r |
12166 | }\r |
12167 | \r |
12168 | \r |
12169 | void m68k_op_cpscc_32(void)\r |
12170 | {\r |
12171 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12172 | {\r |
12173 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
12174 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
12175 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
12176 | return;\r |
12177 | }\r |
12178 | m68ki_exception_1111();\r |
12179 | }\r |
12180 | \r |
12181 | \r |
12182 | void m68k_op_cptrapcc_32(void)\r |
12183 | {\r |
12184 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12185 | {\r |
12186 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
12187 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
12188 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
12189 | return;\r |
12190 | }\r |
12191 | m68ki_exception_1111();\r |
12192 | }\r |
12193 | \r |
12194 | \r |
12195 | /* ======================================================================== */\r |
12196 | /* ============================== END OF FILE ============================= */\r |
12197 | /* ======================================================================== */\r |
12198 | \r |
12199 | \r |