cc68a136 |
1 | #include "m68kcpu.h"\r |
2 | \r |
3 | /* ======================================================================== */\r |
4 | /* ========================= INSTRUCTION HANDLERS ========================= */\r |
5 | /* ======================================================================== */\r |
6 | \r |
7 | \r |
8 | void m68k_op_dbt_16(void)\r |
9 | {\r |
10 | REG_PC += 2;\r |
11 | }\r |
12 | \r |
13 | \r |
14 | void m68k_op_dbf_16(void)\r |
15 | {\r |
16 | uint* r_dst = &DY;\r |
17 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
18 | \r |
19 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
20 | if(res != 0xffff)\r |
21 | {\r |
22 | uint offset = OPER_I_16();\r |
23 | REG_PC -= 2;\r |
24 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
25 | m68ki_branch_16(offset);\r |
26 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
27 | return;\r |
28 | }\r |
29 | REG_PC += 2;\r |
30 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
31 | }\r |
32 | \r |
33 | \r |
34 | void m68k_op_dbhi_16(void)\r |
35 | {\r |
36 | if(COND_NOT_HI())\r |
37 | {\r |
38 | uint* r_dst = &DY;\r |
39 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
40 | \r |
41 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
42 | if(res != 0xffff)\r |
43 | {\r |
44 | uint offset = OPER_I_16();\r |
45 | REG_PC -= 2;\r |
46 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
47 | m68ki_branch_16(offset);\r |
48 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
49 | return;\r |
50 | }\r |
51 | REG_PC += 2;\r |
52 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
53 | return;\r |
54 | }\r |
55 | REG_PC += 2;\r |
56 | }\r |
57 | \r |
58 | \r |
59 | void m68k_op_dbls_16(void)\r |
60 | {\r |
61 | if(COND_NOT_LS())\r |
62 | {\r |
63 | uint* r_dst = &DY;\r |
64 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
65 | \r |
66 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
67 | if(res != 0xffff)\r |
68 | {\r |
69 | uint offset = OPER_I_16();\r |
70 | REG_PC -= 2;\r |
71 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
72 | m68ki_branch_16(offset);\r |
73 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
74 | return;\r |
75 | }\r |
76 | REG_PC += 2;\r |
77 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
78 | return;\r |
79 | }\r |
80 | REG_PC += 2;\r |
81 | }\r |
82 | \r |
83 | \r |
84 | void m68k_op_dbcc_16(void)\r |
85 | {\r |
86 | if(COND_NOT_CC())\r |
87 | {\r |
88 | uint* r_dst = &DY;\r |
89 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
90 | \r |
91 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
92 | if(res != 0xffff)\r |
93 | {\r |
94 | uint offset = OPER_I_16();\r |
95 | REG_PC -= 2;\r |
96 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
97 | m68ki_branch_16(offset);\r |
98 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
99 | return;\r |
100 | }\r |
101 | REG_PC += 2;\r |
102 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
103 | return;\r |
104 | }\r |
105 | REG_PC += 2;\r |
106 | }\r |
107 | \r |
108 | \r |
109 | void m68k_op_dbcs_16(void)\r |
110 | {\r |
111 | if(COND_NOT_CS())\r |
112 | {\r |
113 | uint* r_dst = &DY;\r |
114 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
115 | \r |
116 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
117 | if(res != 0xffff)\r |
118 | {\r |
119 | uint offset = OPER_I_16();\r |
120 | REG_PC -= 2;\r |
121 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
122 | m68ki_branch_16(offset);\r |
123 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
124 | return;\r |
125 | }\r |
126 | REG_PC += 2;\r |
127 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
128 | return;\r |
129 | }\r |
130 | REG_PC += 2;\r |
131 | }\r |
132 | \r |
133 | \r |
134 | void m68k_op_dbne_16(void)\r |
135 | {\r |
136 | if(COND_NOT_NE())\r |
137 | {\r |
138 | uint* r_dst = &DY;\r |
139 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
140 | \r |
141 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
142 | if(res != 0xffff)\r |
143 | {\r |
144 | uint offset = OPER_I_16();\r |
145 | REG_PC -= 2;\r |
146 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
147 | m68ki_branch_16(offset);\r |
148 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
149 | return;\r |
150 | }\r |
151 | REG_PC += 2;\r |
152 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
153 | return;\r |
154 | }\r |
155 | REG_PC += 2;\r |
156 | }\r |
157 | \r |
158 | \r |
159 | void m68k_op_dbeq_16(void)\r |
160 | {\r |
161 | if(COND_NOT_EQ())\r |
162 | {\r |
163 | uint* r_dst = &DY;\r |
164 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
165 | \r |
166 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
167 | if(res != 0xffff)\r |
168 | {\r |
169 | uint offset = OPER_I_16();\r |
170 | REG_PC -= 2;\r |
171 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
172 | m68ki_branch_16(offset);\r |
173 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
174 | return;\r |
175 | }\r |
176 | REG_PC += 2;\r |
177 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
178 | return;\r |
179 | }\r |
180 | REG_PC += 2;\r |
181 | }\r |
182 | \r |
183 | \r |
184 | void m68k_op_dbvc_16(void)\r |
185 | {\r |
186 | if(COND_NOT_VC())\r |
187 | {\r |
188 | uint* r_dst = &DY;\r |
189 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
190 | \r |
191 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
192 | if(res != 0xffff)\r |
193 | {\r |
194 | uint offset = OPER_I_16();\r |
195 | REG_PC -= 2;\r |
196 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
197 | m68ki_branch_16(offset);\r |
198 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
199 | return;\r |
200 | }\r |
201 | REG_PC += 2;\r |
202 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
203 | return;\r |
204 | }\r |
205 | REG_PC += 2;\r |
206 | }\r |
207 | \r |
208 | \r |
209 | void m68k_op_dbvs_16(void)\r |
210 | {\r |
211 | if(COND_NOT_VS())\r |
212 | {\r |
213 | uint* r_dst = &DY;\r |
214 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
215 | \r |
216 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
217 | if(res != 0xffff)\r |
218 | {\r |
219 | uint offset = OPER_I_16();\r |
220 | REG_PC -= 2;\r |
221 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
222 | m68ki_branch_16(offset);\r |
223 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
224 | return;\r |
225 | }\r |
226 | REG_PC += 2;\r |
227 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
228 | return;\r |
229 | }\r |
230 | REG_PC += 2;\r |
231 | }\r |
232 | \r |
233 | \r |
234 | void m68k_op_dbpl_16(void)\r |
235 | {\r |
236 | if(COND_NOT_PL())\r |
237 | {\r |
238 | uint* r_dst = &DY;\r |
239 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
240 | \r |
241 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
242 | if(res != 0xffff)\r |
243 | {\r |
244 | uint offset = OPER_I_16();\r |
245 | REG_PC -= 2;\r |
246 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
247 | m68ki_branch_16(offset);\r |
248 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
249 | return;\r |
250 | }\r |
251 | REG_PC += 2;\r |
252 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
253 | return;\r |
254 | }\r |
255 | REG_PC += 2;\r |
256 | }\r |
257 | \r |
258 | \r |
259 | void m68k_op_dbmi_16(void)\r |
260 | {\r |
261 | if(COND_NOT_MI())\r |
262 | {\r |
263 | uint* r_dst = &DY;\r |
264 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
265 | \r |
266 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
267 | if(res != 0xffff)\r |
268 | {\r |
269 | uint offset = OPER_I_16();\r |
270 | REG_PC -= 2;\r |
271 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
272 | m68ki_branch_16(offset);\r |
273 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
274 | return;\r |
275 | }\r |
276 | REG_PC += 2;\r |
277 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
278 | return;\r |
279 | }\r |
280 | REG_PC += 2;\r |
281 | }\r |
282 | \r |
283 | \r |
284 | void m68k_op_dbge_16(void)\r |
285 | {\r |
286 | if(COND_NOT_GE())\r |
287 | {\r |
288 | uint* r_dst = &DY;\r |
289 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
290 | \r |
291 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
292 | if(res != 0xffff)\r |
293 | {\r |
294 | uint offset = OPER_I_16();\r |
295 | REG_PC -= 2;\r |
296 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
297 | m68ki_branch_16(offset);\r |
298 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
299 | return;\r |
300 | }\r |
301 | REG_PC += 2;\r |
302 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
303 | return;\r |
304 | }\r |
305 | REG_PC += 2;\r |
306 | }\r |
307 | \r |
308 | \r |
309 | void m68k_op_dblt_16(void)\r |
310 | {\r |
311 | if(COND_NOT_LT())\r |
312 | {\r |
313 | uint* r_dst = &DY;\r |
314 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
315 | \r |
316 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
317 | if(res != 0xffff)\r |
318 | {\r |
319 | uint offset = OPER_I_16();\r |
320 | REG_PC -= 2;\r |
321 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
322 | m68ki_branch_16(offset);\r |
323 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
324 | return;\r |
325 | }\r |
326 | REG_PC += 2;\r |
327 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
328 | return;\r |
329 | }\r |
330 | REG_PC += 2;\r |
331 | }\r |
332 | \r |
333 | \r |
334 | void m68k_op_dbgt_16(void)\r |
335 | {\r |
336 | if(COND_NOT_GT())\r |
337 | {\r |
338 | uint* r_dst = &DY;\r |
339 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
340 | \r |
341 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
342 | if(res != 0xffff)\r |
343 | {\r |
344 | uint offset = OPER_I_16();\r |
345 | REG_PC -= 2;\r |
346 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
347 | m68ki_branch_16(offset);\r |
348 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
349 | return;\r |
350 | }\r |
351 | REG_PC += 2;\r |
352 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
353 | return;\r |
354 | }\r |
355 | REG_PC += 2;\r |
356 | }\r |
357 | \r |
358 | \r |
359 | void m68k_op_dble_16(void)\r |
360 | {\r |
361 | if(COND_NOT_LE())\r |
362 | {\r |
363 | uint* r_dst = &DY;\r |
364 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);\r |
365 | \r |
366 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
367 | if(res != 0xffff)\r |
368 | {\r |
369 | uint offset = OPER_I_16();\r |
370 | REG_PC -= 2;\r |
371 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
372 | m68ki_branch_16(offset);\r |
373 | USE_CYCLES(CYC_DBCC_F_NOEXP);\r |
374 | return;\r |
375 | }\r |
376 | REG_PC += 2;\r |
377 | USE_CYCLES(CYC_DBCC_F_EXP);\r |
378 | return;\r |
379 | }\r |
380 | REG_PC += 2;\r |
381 | }\r |
382 | \r |
383 | \r |
384 | void m68k_op_divs_16_d(void)\r |
385 | {\r |
386 | uint* r_dst = &DX;\r |
387 | sint src = MAKE_INT_16(DY);\r |
388 | sint quotient;\r |
389 | sint remainder;\r |
390 | \r |
391 | if(src != 0)\r |
392 | {\r |
393 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
394 | {\r |
395 | FLAG_Z = 0;\r |
396 | FLAG_N = NFLAG_CLEAR;\r |
397 | FLAG_V = VFLAG_CLEAR;\r |
398 | FLAG_C = CFLAG_CLEAR;\r |
399 | *r_dst = 0;\r |
400 | return;\r |
401 | }\r |
402 | \r |
403 | quotient = MAKE_INT_32(*r_dst) / src;\r |
404 | remainder = MAKE_INT_32(*r_dst) % src;\r |
405 | \r |
406 | if(quotient == MAKE_INT_16(quotient))\r |
407 | {\r |
408 | FLAG_Z = quotient;\r |
409 | FLAG_N = NFLAG_16(quotient);\r |
410 | FLAG_V = VFLAG_CLEAR;\r |
411 | FLAG_C = CFLAG_CLEAR;\r |
412 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
413 | return;\r |
414 | }\r |
415 | FLAG_V = VFLAG_SET;\r |
416 | return;\r |
417 | }\r |
418 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
419 | }\r |
420 | \r |
421 | \r |
422 | void m68k_op_divs_16_ai(void)\r |
423 | {\r |
424 | uint* r_dst = &DX;\r |
425 | sint src = MAKE_INT_16(OPER_AY_AI_16());\r |
426 | sint quotient;\r |
427 | sint remainder;\r |
428 | \r |
429 | if(src != 0)\r |
430 | {\r |
431 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
432 | {\r |
433 | FLAG_Z = 0;\r |
434 | FLAG_N = NFLAG_CLEAR;\r |
435 | FLAG_V = VFLAG_CLEAR;\r |
436 | FLAG_C = CFLAG_CLEAR;\r |
437 | *r_dst = 0;\r |
438 | return;\r |
439 | }\r |
440 | \r |
441 | quotient = MAKE_INT_32(*r_dst) / src;\r |
442 | remainder = MAKE_INT_32(*r_dst) % src;\r |
443 | \r |
444 | if(quotient == MAKE_INT_16(quotient))\r |
445 | {\r |
446 | FLAG_Z = quotient;\r |
447 | FLAG_N = NFLAG_16(quotient);\r |
448 | FLAG_V = VFLAG_CLEAR;\r |
449 | FLAG_C = CFLAG_CLEAR;\r |
450 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
451 | return;\r |
452 | }\r |
453 | FLAG_V = VFLAG_SET;\r |
454 | return;\r |
455 | }\r |
456 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
457 | }\r |
458 | \r |
459 | \r |
460 | void m68k_op_divs_16_pi(void)\r |
461 | {\r |
462 | uint* r_dst = &DX;\r |
463 | sint src = MAKE_INT_16(OPER_AY_PI_16());\r |
464 | sint quotient;\r |
465 | sint remainder;\r |
466 | \r |
467 | if(src != 0)\r |
468 | {\r |
469 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
470 | {\r |
471 | FLAG_Z = 0;\r |
472 | FLAG_N = NFLAG_CLEAR;\r |
473 | FLAG_V = VFLAG_CLEAR;\r |
474 | FLAG_C = CFLAG_CLEAR;\r |
475 | *r_dst = 0;\r |
476 | return;\r |
477 | }\r |
478 | \r |
479 | quotient = MAKE_INT_32(*r_dst) / src;\r |
480 | remainder = MAKE_INT_32(*r_dst) % src;\r |
481 | \r |
482 | if(quotient == MAKE_INT_16(quotient))\r |
483 | {\r |
484 | FLAG_Z = quotient;\r |
485 | FLAG_N = NFLAG_16(quotient);\r |
486 | FLAG_V = VFLAG_CLEAR;\r |
487 | FLAG_C = CFLAG_CLEAR;\r |
488 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
489 | return;\r |
490 | }\r |
491 | FLAG_V = VFLAG_SET;\r |
492 | return;\r |
493 | }\r |
494 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
495 | }\r |
496 | \r |
497 | \r |
498 | void m68k_op_divs_16_pd(void)\r |
499 | {\r |
500 | uint* r_dst = &DX;\r |
501 | sint src = MAKE_INT_16(OPER_AY_PD_16());\r |
502 | sint quotient;\r |
503 | sint remainder;\r |
504 | \r |
505 | if(src != 0)\r |
506 | {\r |
507 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
508 | {\r |
509 | FLAG_Z = 0;\r |
510 | FLAG_N = NFLAG_CLEAR;\r |
511 | FLAG_V = VFLAG_CLEAR;\r |
512 | FLAG_C = CFLAG_CLEAR;\r |
513 | *r_dst = 0;\r |
514 | return;\r |
515 | }\r |
516 | \r |
517 | quotient = MAKE_INT_32(*r_dst) / src;\r |
518 | remainder = MAKE_INT_32(*r_dst) % src;\r |
519 | \r |
520 | if(quotient == MAKE_INT_16(quotient))\r |
521 | {\r |
522 | FLAG_Z = quotient;\r |
523 | FLAG_N = NFLAG_16(quotient);\r |
524 | FLAG_V = VFLAG_CLEAR;\r |
525 | FLAG_C = CFLAG_CLEAR;\r |
526 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
527 | return;\r |
528 | }\r |
529 | FLAG_V = VFLAG_SET;\r |
530 | return;\r |
531 | }\r |
532 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
533 | }\r |
534 | \r |
535 | \r |
536 | void m68k_op_divs_16_di(void)\r |
537 | {\r |
538 | uint* r_dst = &DX;\r |
539 | sint src = MAKE_INT_16(OPER_AY_DI_16());\r |
540 | sint quotient;\r |
541 | sint remainder;\r |
542 | \r |
543 | if(src != 0)\r |
544 | {\r |
545 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
546 | {\r |
547 | FLAG_Z = 0;\r |
548 | FLAG_N = NFLAG_CLEAR;\r |
549 | FLAG_V = VFLAG_CLEAR;\r |
550 | FLAG_C = CFLAG_CLEAR;\r |
551 | *r_dst = 0;\r |
552 | return;\r |
553 | }\r |
554 | \r |
555 | quotient = MAKE_INT_32(*r_dst) / src;\r |
556 | remainder = MAKE_INT_32(*r_dst) % src;\r |
557 | \r |
558 | if(quotient == MAKE_INT_16(quotient))\r |
559 | {\r |
560 | FLAG_Z = quotient;\r |
561 | FLAG_N = NFLAG_16(quotient);\r |
562 | FLAG_V = VFLAG_CLEAR;\r |
563 | FLAG_C = CFLAG_CLEAR;\r |
564 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
565 | return;\r |
566 | }\r |
567 | FLAG_V = VFLAG_SET;\r |
568 | return;\r |
569 | }\r |
570 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
571 | }\r |
572 | \r |
573 | \r |
574 | void m68k_op_divs_16_ix(void)\r |
575 | {\r |
576 | uint* r_dst = &DX;\r |
577 | sint src = MAKE_INT_16(OPER_AY_IX_16());\r |
578 | sint quotient;\r |
579 | sint remainder;\r |
580 | \r |
581 | if(src != 0)\r |
582 | {\r |
583 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
584 | {\r |
585 | FLAG_Z = 0;\r |
586 | FLAG_N = NFLAG_CLEAR;\r |
587 | FLAG_V = VFLAG_CLEAR;\r |
588 | FLAG_C = CFLAG_CLEAR;\r |
589 | *r_dst = 0;\r |
590 | return;\r |
591 | }\r |
592 | \r |
593 | quotient = MAKE_INT_32(*r_dst) / src;\r |
594 | remainder = MAKE_INT_32(*r_dst) % src;\r |
595 | \r |
596 | if(quotient == MAKE_INT_16(quotient))\r |
597 | {\r |
598 | FLAG_Z = quotient;\r |
599 | FLAG_N = NFLAG_16(quotient);\r |
600 | FLAG_V = VFLAG_CLEAR;\r |
601 | FLAG_C = CFLAG_CLEAR;\r |
602 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
603 | return;\r |
604 | }\r |
605 | FLAG_V = VFLAG_SET;\r |
606 | return;\r |
607 | }\r |
608 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
609 | }\r |
610 | \r |
611 | \r |
612 | void m68k_op_divs_16_aw(void)\r |
613 | {\r |
614 | uint* r_dst = &DX;\r |
615 | sint src = MAKE_INT_16(OPER_AW_16());\r |
616 | sint quotient;\r |
617 | sint remainder;\r |
618 | \r |
619 | if(src != 0)\r |
620 | {\r |
621 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
622 | {\r |
623 | FLAG_Z = 0;\r |
624 | FLAG_N = NFLAG_CLEAR;\r |
625 | FLAG_V = VFLAG_CLEAR;\r |
626 | FLAG_C = CFLAG_CLEAR;\r |
627 | *r_dst = 0;\r |
628 | return;\r |
629 | }\r |
630 | \r |
631 | quotient = MAKE_INT_32(*r_dst) / src;\r |
632 | remainder = MAKE_INT_32(*r_dst) % src;\r |
633 | \r |
634 | if(quotient == MAKE_INT_16(quotient))\r |
635 | {\r |
636 | FLAG_Z = quotient;\r |
637 | FLAG_N = NFLAG_16(quotient);\r |
638 | FLAG_V = VFLAG_CLEAR;\r |
639 | FLAG_C = CFLAG_CLEAR;\r |
640 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
641 | return;\r |
642 | }\r |
643 | FLAG_V = VFLAG_SET;\r |
644 | return;\r |
645 | }\r |
646 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
647 | }\r |
648 | \r |
649 | \r |
650 | void m68k_op_divs_16_al(void)\r |
651 | {\r |
652 | uint* r_dst = &DX;\r |
653 | sint src = MAKE_INT_16(OPER_AL_16());\r |
654 | sint quotient;\r |
655 | sint remainder;\r |
656 | \r |
657 | if(src != 0)\r |
658 | {\r |
659 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
660 | {\r |
661 | FLAG_Z = 0;\r |
662 | FLAG_N = NFLAG_CLEAR;\r |
663 | FLAG_V = VFLAG_CLEAR;\r |
664 | FLAG_C = CFLAG_CLEAR;\r |
665 | *r_dst = 0;\r |
666 | return;\r |
667 | }\r |
668 | \r |
669 | quotient = MAKE_INT_32(*r_dst) / src;\r |
670 | remainder = MAKE_INT_32(*r_dst) % src;\r |
671 | \r |
672 | if(quotient == MAKE_INT_16(quotient))\r |
673 | {\r |
674 | FLAG_Z = quotient;\r |
675 | FLAG_N = NFLAG_16(quotient);\r |
676 | FLAG_V = VFLAG_CLEAR;\r |
677 | FLAG_C = CFLAG_CLEAR;\r |
678 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
679 | return;\r |
680 | }\r |
681 | FLAG_V = VFLAG_SET;\r |
682 | return;\r |
683 | }\r |
684 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
685 | }\r |
686 | \r |
687 | \r |
688 | void m68k_op_divs_16_pcdi(void)\r |
689 | {\r |
690 | uint* r_dst = &DX;\r |
691 | sint src = MAKE_INT_16(OPER_PCDI_16());\r |
692 | sint quotient;\r |
693 | sint remainder;\r |
694 | \r |
695 | if(src != 0)\r |
696 | {\r |
697 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
698 | {\r |
699 | FLAG_Z = 0;\r |
700 | FLAG_N = NFLAG_CLEAR;\r |
701 | FLAG_V = VFLAG_CLEAR;\r |
702 | FLAG_C = CFLAG_CLEAR;\r |
703 | *r_dst = 0;\r |
704 | return;\r |
705 | }\r |
706 | \r |
707 | quotient = MAKE_INT_32(*r_dst) / src;\r |
708 | remainder = MAKE_INT_32(*r_dst) % src;\r |
709 | \r |
710 | if(quotient == MAKE_INT_16(quotient))\r |
711 | {\r |
712 | FLAG_Z = quotient;\r |
713 | FLAG_N = NFLAG_16(quotient);\r |
714 | FLAG_V = VFLAG_CLEAR;\r |
715 | FLAG_C = CFLAG_CLEAR;\r |
716 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
717 | return;\r |
718 | }\r |
719 | FLAG_V = VFLAG_SET;\r |
720 | return;\r |
721 | }\r |
722 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
723 | }\r |
724 | \r |
725 | \r |
726 | void m68k_op_divs_16_pcix(void)\r |
727 | {\r |
728 | uint* r_dst = &DX;\r |
729 | sint src = MAKE_INT_16(OPER_PCIX_16());\r |
730 | sint quotient;\r |
731 | sint remainder;\r |
732 | \r |
733 | if(src != 0)\r |
734 | {\r |
735 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
736 | {\r |
737 | FLAG_Z = 0;\r |
738 | FLAG_N = NFLAG_CLEAR;\r |
739 | FLAG_V = VFLAG_CLEAR;\r |
740 | FLAG_C = CFLAG_CLEAR;\r |
741 | *r_dst = 0;\r |
742 | return;\r |
743 | }\r |
744 | \r |
745 | quotient = MAKE_INT_32(*r_dst) / src;\r |
746 | remainder = MAKE_INT_32(*r_dst) % src;\r |
747 | \r |
748 | if(quotient == MAKE_INT_16(quotient))\r |
749 | {\r |
750 | FLAG_Z = quotient;\r |
751 | FLAG_N = NFLAG_16(quotient);\r |
752 | FLAG_V = VFLAG_CLEAR;\r |
753 | FLAG_C = CFLAG_CLEAR;\r |
754 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
755 | return;\r |
756 | }\r |
757 | FLAG_V = VFLAG_SET;\r |
758 | return;\r |
759 | }\r |
760 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
761 | }\r |
762 | \r |
763 | \r |
764 | void m68k_op_divs_16_i(void)\r |
765 | {\r |
766 | uint* r_dst = &DX;\r |
767 | sint src = MAKE_INT_16(OPER_I_16());\r |
768 | sint quotient;\r |
769 | sint remainder;\r |
770 | \r |
771 | if(src != 0)\r |
772 | {\r |
773 | if((uint32)*r_dst == 0x80000000 && src == -1)\r |
774 | {\r |
775 | FLAG_Z = 0;\r |
776 | FLAG_N = NFLAG_CLEAR;\r |
777 | FLAG_V = VFLAG_CLEAR;\r |
778 | FLAG_C = CFLAG_CLEAR;\r |
779 | *r_dst = 0;\r |
780 | return;\r |
781 | }\r |
782 | \r |
783 | quotient = MAKE_INT_32(*r_dst) / src;\r |
784 | remainder = MAKE_INT_32(*r_dst) % src;\r |
785 | \r |
786 | if(quotient == MAKE_INT_16(quotient))\r |
787 | {\r |
788 | FLAG_Z = quotient;\r |
789 | FLAG_N = NFLAG_16(quotient);\r |
790 | FLAG_V = VFLAG_CLEAR;\r |
791 | FLAG_C = CFLAG_CLEAR;\r |
792 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
793 | return;\r |
794 | }\r |
795 | FLAG_V = VFLAG_SET;\r |
796 | return;\r |
797 | }\r |
798 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
799 | }\r |
800 | \r |
801 | \r |
802 | void m68k_op_divu_16_d(void)\r |
803 | {\r |
804 | uint* r_dst = &DX;\r |
805 | uint src = MASK_OUT_ABOVE_16(DY);\r |
806 | \r |
807 | if(src != 0)\r |
808 | {\r |
809 | uint quotient = *r_dst / src;\r |
810 | uint remainder = *r_dst % src;\r |
811 | \r |
812 | if(quotient < 0x10000)\r |
813 | {\r |
814 | FLAG_Z = quotient;\r |
815 | FLAG_N = NFLAG_16(quotient);\r |
816 | FLAG_V = VFLAG_CLEAR;\r |
817 | FLAG_C = CFLAG_CLEAR;\r |
818 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
819 | return;\r |
820 | }\r |
821 | FLAG_V = VFLAG_SET;\r |
822 | return;\r |
823 | }\r |
824 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
825 | }\r |
826 | \r |
827 | \r |
828 | void m68k_op_divu_16_ai(void)\r |
829 | {\r |
830 | uint* r_dst = &DX;\r |
831 | uint src = OPER_AY_AI_16();\r |
832 | \r |
833 | if(src != 0)\r |
834 | {\r |
835 | uint quotient = *r_dst / src;\r |
836 | uint remainder = *r_dst % src;\r |
837 | \r |
838 | if(quotient < 0x10000)\r |
839 | {\r |
840 | FLAG_Z = quotient;\r |
841 | FLAG_N = NFLAG_16(quotient);\r |
842 | FLAG_V = VFLAG_CLEAR;\r |
843 | FLAG_C = CFLAG_CLEAR;\r |
844 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
845 | return;\r |
846 | }\r |
847 | FLAG_V = VFLAG_SET;\r |
848 | return;\r |
849 | }\r |
850 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
851 | }\r |
852 | \r |
853 | \r |
854 | void m68k_op_divu_16_pi(void)\r |
855 | {\r |
856 | uint* r_dst = &DX;\r |
857 | uint src = OPER_AY_PI_16();\r |
858 | \r |
859 | if(src != 0)\r |
860 | {\r |
861 | uint quotient = *r_dst / src;\r |
862 | uint remainder = *r_dst % src;\r |
863 | \r |
864 | if(quotient < 0x10000)\r |
865 | {\r |
866 | FLAG_Z = quotient;\r |
867 | FLAG_N = NFLAG_16(quotient);\r |
868 | FLAG_V = VFLAG_CLEAR;\r |
869 | FLAG_C = CFLAG_CLEAR;\r |
870 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
871 | return;\r |
872 | }\r |
873 | FLAG_V = VFLAG_SET;\r |
874 | return;\r |
875 | }\r |
876 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
877 | }\r |
878 | \r |
879 | \r |
880 | void m68k_op_divu_16_pd(void)\r |
881 | {\r |
882 | uint* r_dst = &DX;\r |
883 | uint src = OPER_AY_PD_16();\r |
884 | \r |
885 | if(src != 0)\r |
886 | {\r |
887 | uint quotient = *r_dst / src;\r |
888 | uint remainder = *r_dst % src;\r |
889 | \r |
890 | if(quotient < 0x10000)\r |
891 | {\r |
892 | FLAG_Z = quotient;\r |
893 | FLAG_N = NFLAG_16(quotient);\r |
894 | FLAG_V = VFLAG_CLEAR;\r |
895 | FLAG_C = CFLAG_CLEAR;\r |
896 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
897 | return;\r |
898 | }\r |
899 | FLAG_V = VFLAG_SET;\r |
900 | return;\r |
901 | }\r |
902 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
903 | }\r |
904 | \r |
905 | \r |
906 | void m68k_op_divu_16_di(void)\r |
907 | {\r |
908 | uint* r_dst = &DX;\r |
909 | uint src = OPER_AY_DI_16();\r |
910 | \r |
911 | if(src != 0)\r |
912 | {\r |
913 | uint quotient = *r_dst / src;\r |
914 | uint remainder = *r_dst % src;\r |
915 | \r |
916 | if(quotient < 0x10000)\r |
917 | {\r |
918 | FLAG_Z = quotient;\r |
919 | FLAG_N = NFLAG_16(quotient);\r |
920 | FLAG_V = VFLAG_CLEAR;\r |
921 | FLAG_C = CFLAG_CLEAR;\r |
922 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
923 | return;\r |
924 | }\r |
925 | FLAG_V = VFLAG_SET;\r |
926 | return;\r |
927 | }\r |
928 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
929 | }\r |
930 | \r |
931 | \r |
932 | void m68k_op_divu_16_ix(void)\r |
933 | {\r |
934 | uint* r_dst = &DX;\r |
935 | uint src = OPER_AY_IX_16();\r |
936 | \r |
937 | if(src != 0)\r |
938 | {\r |
939 | uint quotient = *r_dst / src;\r |
940 | uint remainder = *r_dst % src;\r |
941 | \r |
942 | if(quotient < 0x10000)\r |
943 | {\r |
944 | FLAG_Z = quotient;\r |
945 | FLAG_N = NFLAG_16(quotient);\r |
946 | FLAG_V = VFLAG_CLEAR;\r |
947 | FLAG_C = CFLAG_CLEAR;\r |
948 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
949 | return;\r |
950 | }\r |
951 | FLAG_V = VFLAG_SET;\r |
952 | return;\r |
953 | }\r |
954 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
955 | }\r |
956 | \r |
957 | \r |
958 | void m68k_op_divu_16_aw(void)\r |
959 | {\r |
960 | uint* r_dst = &DX;\r |
961 | uint src = OPER_AW_16();\r |
962 | \r |
963 | if(src != 0)\r |
964 | {\r |
965 | uint quotient = *r_dst / src;\r |
966 | uint remainder = *r_dst % src;\r |
967 | \r |
968 | if(quotient < 0x10000)\r |
969 | {\r |
970 | FLAG_Z = quotient;\r |
971 | FLAG_N = NFLAG_16(quotient);\r |
972 | FLAG_V = VFLAG_CLEAR;\r |
973 | FLAG_C = CFLAG_CLEAR;\r |
974 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
975 | return;\r |
976 | }\r |
977 | FLAG_V = VFLAG_SET;\r |
978 | return;\r |
979 | }\r |
980 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
981 | }\r |
982 | \r |
983 | \r |
984 | void m68k_op_divu_16_al(void)\r |
985 | {\r |
986 | uint* r_dst = &DX;\r |
987 | uint src = OPER_AL_16();\r |
988 | \r |
989 | if(src != 0)\r |
990 | {\r |
991 | uint quotient = *r_dst / src;\r |
992 | uint remainder = *r_dst % src;\r |
993 | \r |
994 | if(quotient < 0x10000)\r |
995 | {\r |
996 | FLAG_Z = quotient;\r |
997 | FLAG_N = NFLAG_16(quotient);\r |
998 | FLAG_V = VFLAG_CLEAR;\r |
999 | FLAG_C = CFLAG_CLEAR;\r |
1000 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
1001 | return;\r |
1002 | }\r |
1003 | FLAG_V = VFLAG_SET;\r |
1004 | return;\r |
1005 | }\r |
1006 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1007 | }\r |
1008 | \r |
1009 | \r |
1010 | void m68k_op_divu_16_pcdi(void)\r |
1011 | {\r |
1012 | uint* r_dst = &DX;\r |
1013 | uint src = OPER_PCDI_16();\r |
1014 | \r |
1015 | if(src != 0)\r |
1016 | {\r |
1017 | uint quotient = *r_dst / src;\r |
1018 | uint remainder = *r_dst % src;\r |
1019 | \r |
1020 | if(quotient < 0x10000)\r |
1021 | {\r |
1022 | FLAG_Z = quotient;\r |
1023 | FLAG_N = NFLAG_16(quotient);\r |
1024 | FLAG_V = VFLAG_CLEAR;\r |
1025 | FLAG_C = CFLAG_CLEAR;\r |
1026 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
1027 | return;\r |
1028 | }\r |
1029 | FLAG_V = VFLAG_SET;\r |
1030 | return;\r |
1031 | }\r |
1032 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1033 | }\r |
1034 | \r |
1035 | \r |
1036 | void m68k_op_divu_16_pcix(void)\r |
1037 | {\r |
1038 | uint* r_dst = &DX;\r |
1039 | uint src = OPER_PCIX_16();\r |
1040 | \r |
1041 | if(src != 0)\r |
1042 | {\r |
1043 | uint quotient = *r_dst / src;\r |
1044 | uint remainder = *r_dst % src;\r |
1045 | \r |
1046 | if(quotient < 0x10000)\r |
1047 | {\r |
1048 | FLAG_Z = quotient;\r |
1049 | FLAG_N = NFLAG_16(quotient);\r |
1050 | FLAG_V = VFLAG_CLEAR;\r |
1051 | FLAG_C = CFLAG_CLEAR;\r |
1052 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
1053 | return;\r |
1054 | }\r |
1055 | FLAG_V = VFLAG_SET;\r |
1056 | return;\r |
1057 | }\r |
1058 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1059 | }\r |
1060 | \r |
1061 | \r |
1062 | void m68k_op_divu_16_i(void)\r |
1063 | {\r |
1064 | uint* r_dst = &DX;\r |
1065 | uint src = OPER_I_16();\r |
1066 | \r |
1067 | if(src != 0)\r |
1068 | {\r |
1069 | uint quotient = *r_dst / src;\r |
1070 | uint remainder = *r_dst % src;\r |
1071 | \r |
1072 | if(quotient < 0x10000)\r |
1073 | {\r |
1074 | FLAG_Z = quotient;\r |
1075 | FLAG_N = NFLAG_16(quotient);\r |
1076 | FLAG_V = VFLAG_CLEAR;\r |
1077 | FLAG_C = CFLAG_CLEAR;\r |
1078 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));\r |
1079 | return;\r |
1080 | }\r |
1081 | FLAG_V = VFLAG_SET;\r |
1082 | return;\r |
1083 | }\r |
1084 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1085 | }\r |
1086 | \r |
1087 | \r |
1088 | void m68k_op_divl_32_d(void)\r |
1089 | {\r |
1090 | #if M68K_USE_64_BIT\r |
1091 | \r |
1092 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
1093 | {\r |
1094 | uint word2 = OPER_I_16();\r |
1095 | uint64 divisor = DY;\r |
1096 | uint64 dividend = 0;\r |
1097 | uint64 quotient = 0;\r |
1098 | uint64 remainder = 0;\r |
1099 | \r |
1100 | if(divisor != 0)\r |
1101 | {\r |
1102 | if(BIT_A(word2)) /* 64 bit */\r |
1103 | {\r |
1104 | dividend = REG_D[word2 & 7];\r |
1105 | dividend <<= 32;\r |
1106 | dividend |= REG_D[(word2 >> 12) & 7];\r |
1107 | \r |
1108 | if(BIT_B(word2)) /* signed */\r |
1109 | {\r |
1110 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
1111 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
1112 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
1113 | {\r |
1114 | FLAG_V = VFLAG_SET;\r |
1115 | return;\r |
1116 | }\r |
1117 | }\r |
1118 | else /* unsigned */\r |
1119 | {\r |
1120 | quotient = dividend / divisor;\r |
1121 | if(quotient > 0xffffffff)\r |
1122 | {\r |
1123 | FLAG_V = VFLAG_SET;\r |
1124 | return;\r |
1125 | }\r |
1126 | remainder = dividend % divisor;\r |
1127 | }\r |
1128 | }\r |
1129 | else /* 32 bit */\r |
1130 | {\r |
1131 | dividend = REG_D[(word2 >> 12) & 7];\r |
1132 | if(BIT_B(word2)) /* signed */\r |
1133 | {\r |
1134 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
1135 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
1136 | }\r |
1137 | else /* unsigned */\r |
1138 | {\r |
1139 | quotient = dividend / divisor;\r |
1140 | remainder = dividend % divisor;\r |
1141 | }\r |
1142 | }\r |
1143 | \r |
1144 | REG_D[word2 & 7] = remainder;\r |
1145 | REG_D[(word2 >> 12) & 7] = quotient;\r |
1146 | \r |
1147 | FLAG_N = NFLAG_32(quotient);\r |
1148 | FLAG_Z = quotient;\r |
1149 | FLAG_V = VFLAG_CLEAR;\r |
1150 | FLAG_C = CFLAG_CLEAR;\r |
1151 | return;\r |
1152 | }\r |
1153 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1154 | return;\r |
1155 | }\r |
1156 | m68ki_exception_illegal();\r |
1157 | \r |
1158 | #else\r |
1159 | \r |
1160 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
1161 | {\r |
1162 | uint word2 = OPER_I_16();\r |
1163 | uint divisor = DY;\r |
1164 | uint dividend_hi = REG_D[word2 & 7];\r |
1165 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
1166 | uint quotient = 0;\r |
1167 | uint remainder = 0;\r |
1168 | uint dividend_neg = 0;\r |
1169 | uint divisor_neg = 0;\r |
1170 | sint i;\r |
1171 | uint overflow;\r |
1172 | \r |
1173 | if(divisor != 0)\r |
1174 | {\r |
1175 | /* quad / long : long quotient, long remainder */\r |
1176 | if(BIT_A(word2))\r |
1177 | {\r |
1178 | if(BIT_B(word2)) /* signed */\r |
1179 | {\r |
1180 | /* special case in signed divide */\r |
1181 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
1182 | {\r |
1183 | REG_D[word2 & 7] = 0;\r |
1184 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
1185 | \r |
1186 | FLAG_N = NFLAG_SET;\r |
1187 | FLAG_Z = ZFLAG_CLEAR;\r |
1188 | FLAG_V = VFLAG_CLEAR;\r |
1189 | FLAG_C = CFLAG_CLEAR;\r |
1190 | return;\r |
1191 | }\r |
1192 | if(GET_MSB_32(dividend_hi))\r |
1193 | {\r |
1194 | dividend_neg = 1;\r |
1195 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
1196 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
1197 | }\r |
1198 | if(GET_MSB_32(divisor))\r |
1199 | {\r |
1200 | divisor_neg = 1;\r |
1201 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
1202 | \r |
1203 | }\r |
1204 | }\r |
1205 | \r |
1206 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
1207 | if(dividend_hi >= divisor)\r |
1208 | {\r |
1209 | FLAG_V = VFLAG_SET;\r |
1210 | return;\r |
1211 | }\r |
1212 | \r |
1213 | for(i = 31; i >= 0; i--)\r |
1214 | {\r |
1215 | quotient <<= 1;\r |
1216 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
1217 | if(remainder >= divisor)\r |
1218 | {\r |
1219 | remainder -= divisor;\r |
1220 | quotient++;\r |
1221 | }\r |
1222 | }\r |
1223 | for(i = 31; i >= 0; i--)\r |
1224 | {\r |
1225 | quotient <<= 1;\r |
1226 | overflow = GET_MSB_32(remainder);\r |
1227 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
1228 | if(remainder >= divisor || overflow)\r |
1229 | {\r |
1230 | remainder -= divisor;\r |
1231 | quotient++;\r |
1232 | }\r |
1233 | }\r |
1234 | \r |
1235 | if(BIT_B(word2)) /* signed */\r |
1236 | {\r |
1237 | if(quotient > 0x7fffffff)\r |
1238 | {\r |
1239 | FLAG_V = VFLAG_SET;\r |
1240 | return;\r |
1241 | }\r |
1242 | if(dividend_neg)\r |
1243 | {\r |
1244 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
1245 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
1246 | }\r |
1247 | if(divisor_neg)\r |
1248 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
1249 | }\r |
1250 | \r |
1251 | REG_D[word2 & 7] = remainder;\r |
1252 | REG_D[(word2 >> 12) & 7] = quotient;\r |
1253 | \r |
1254 | FLAG_N = NFLAG_32(quotient);\r |
1255 | FLAG_Z = quotient;\r |
1256 | FLAG_V = VFLAG_CLEAR;\r |
1257 | FLAG_C = CFLAG_CLEAR;\r |
1258 | return;\r |
1259 | }\r |
1260 | \r |
1261 | /* long / long: long quotient, maybe long remainder */\r |
1262 | if(BIT_B(word2)) /* signed */\r |
1263 | {\r |
1264 | /* Special case in divide */\r |
1265 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
1266 | {\r |
1267 | FLAG_N = NFLAG_SET;\r |
1268 | FLAG_Z = ZFLAG_CLEAR;\r |
1269 | FLAG_V = VFLAG_CLEAR;\r |
1270 | FLAG_C = CFLAG_CLEAR;\r |
1271 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
1272 | REG_D[word2 & 7] = 0;\r |
1273 | return;\r |
1274 | }\r |
1275 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
1276 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
1277 | }\r |
1278 | else\r |
1279 | {\r |
1280 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
1281 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
1282 | }\r |
1283 | \r |
1284 | FLAG_N = NFLAG_32(quotient);\r |
1285 | FLAG_Z = quotient;\r |
1286 | FLAG_V = VFLAG_CLEAR;\r |
1287 | FLAG_C = CFLAG_CLEAR;\r |
1288 | return;\r |
1289 | }\r |
1290 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1291 | return;\r |
1292 | }\r |
1293 | m68ki_exception_illegal();\r |
1294 | \r |
1295 | #endif\r |
1296 | }\r |
1297 | \r |
1298 | \r |
1299 | void m68k_op_divl_32_ai(void)\r |
1300 | {\r |
1301 | #if M68K_USE_64_BIT\r |
1302 | \r |
1303 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
1304 | {\r |
1305 | uint word2 = OPER_I_16();\r |
1306 | uint64 divisor = OPER_AY_AI_32();\r |
1307 | uint64 dividend = 0;\r |
1308 | uint64 quotient = 0;\r |
1309 | uint64 remainder = 0;\r |
1310 | \r |
1311 | if(divisor != 0)\r |
1312 | {\r |
1313 | if(BIT_A(word2)) /* 64 bit */\r |
1314 | {\r |
1315 | dividend = REG_D[word2 & 7];\r |
1316 | dividend <<= 32;\r |
1317 | dividend |= REG_D[(word2 >> 12) & 7];\r |
1318 | \r |
1319 | if(BIT_B(word2)) /* signed */\r |
1320 | {\r |
1321 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
1322 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
1323 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
1324 | {\r |
1325 | FLAG_V = VFLAG_SET;\r |
1326 | return;\r |
1327 | }\r |
1328 | }\r |
1329 | else /* unsigned */\r |
1330 | {\r |
1331 | quotient = dividend / divisor;\r |
1332 | if(quotient > 0xffffffff)\r |
1333 | {\r |
1334 | FLAG_V = VFLAG_SET;\r |
1335 | return;\r |
1336 | }\r |
1337 | remainder = dividend % divisor;\r |
1338 | }\r |
1339 | }\r |
1340 | else /* 32 bit */\r |
1341 | {\r |
1342 | dividend = REG_D[(word2 >> 12) & 7];\r |
1343 | if(BIT_B(word2)) /* signed */\r |
1344 | {\r |
1345 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
1346 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
1347 | }\r |
1348 | else /* unsigned */\r |
1349 | {\r |
1350 | quotient = dividend / divisor;\r |
1351 | remainder = dividend % divisor;\r |
1352 | }\r |
1353 | }\r |
1354 | \r |
1355 | REG_D[word2 & 7] = remainder;\r |
1356 | REG_D[(word2 >> 12) & 7] = quotient;\r |
1357 | \r |
1358 | FLAG_N = NFLAG_32(quotient);\r |
1359 | FLAG_Z = quotient;\r |
1360 | FLAG_V = VFLAG_CLEAR;\r |
1361 | FLAG_C = CFLAG_CLEAR;\r |
1362 | return;\r |
1363 | }\r |
1364 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1365 | return;\r |
1366 | }\r |
1367 | m68ki_exception_illegal();\r |
1368 | \r |
1369 | #else\r |
1370 | \r |
1371 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
1372 | {\r |
1373 | uint word2 = OPER_I_16();\r |
1374 | uint divisor = OPER_AY_AI_32();\r |
1375 | uint dividend_hi = REG_D[word2 & 7];\r |
1376 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
1377 | uint quotient = 0;\r |
1378 | uint remainder = 0;\r |
1379 | uint dividend_neg = 0;\r |
1380 | uint divisor_neg = 0;\r |
1381 | sint i;\r |
1382 | uint overflow;\r |
1383 | \r |
1384 | if(divisor != 0)\r |
1385 | {\r |
1386 | /* quad / long : long quotient, long remainder */\r |
1387 | if(BIT_A(word2))\r |
1388 | {\r |
1389 | if(BIT_B(word2)) /* signed */\r |
1390 | {\r |
1391 | /* special case in signed divide */\r |
1392 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
1393 | {\r |
1394 | REG_D[word2 & 7] = 0;\r |
1395 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
1396 | \r |
1397 | FLAG_N = NFLAG_SET;\r |
1398 | FLAG_Z = ZFLAG_CLEAR;\r |
1399 | FLAG_V = VFLAG_CLEAR;\r |
1400 | FLAG_C = CFLAG_CLEAR;\r |
1401 | return;\r |
1402 | }\r |
1403 | if(GET_MSB_32(dividend_hi))\r |
1404 | {\r |
1405 | dividend_neg = 1;\r |
1406 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
1407 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
1408 | }\r |
1409 | if(GET_MSB_32(divisor))\r |
1410 | {\r |
1411 | divisor_neg = 1;\r |
1412 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
1413 | \r |
1414 | }\r |
1415 | }\r |
1416 | \r |
1417 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
1418 | if(dividend_hi >= divisor)\r |
1419 | {\r |
1420 | FLAG_V = VFLAG_SET;\r |
1421 | return;\r |
1422 | }\r |
1423 | \r |
1424 | for(i = 31; i >= 0; i--)\r |
1425 | {\r |
1426 | quotient <<= 1;\r |
1427 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
1428 | if(remainder >= divisor)\r |
1429 | {\r |
1430 | remainder -= divisor;\r |
1431 | quotient++;\r |
1432 | }\r |
1433 | }\r |
1434 | for(i = 31; i >= 0; i--)\r |
1435 | {\r |
1436 | quotient <<= 1;\r |
1437 | overflow = GET_MSB_32(remainder);\r |
1438 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
1439 | if(remainder >= divisor || overflow)\r |
1440 | {\r |
1441 | remainder -= divisor;\r |
1442 | quotient++;\r |
1443 | }\r |
1444 | }\r |
1445 | \r |
1446 | if(BIT_B(word2)) /* signed */\r |
1447 | {\r |
1448 | if(quotient > 0x7fffffff)\r |
1449 | {\r |
1450 | FLAG_V = VFLAG_SET;\r |
1451 | return;\r |
1452 | }\r |
1453 | if(dividend_neg)\r |
1454 | {\r |
1455 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
1456 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
1457 | }\r |
1458 | if(divisor_neg)\r |
1459 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
1460 | }\r |
1461 | \r |
1462 | REG_D[word2 & 7] = remainder;\r |
1463 | REG_D[(word2 >> 12) & 7] = quotient;\r |
1464 | \r |
1465 | FLAG_N = NFLAG_32(quotient);\r |
1466 | FLAG_Z = quotient;\r |
1467 | FLAG_V = VFLAG_CLEAR;\r |
1468 | FLAG_C = CFLAG_CLEAR;\r |
1469 | return;\r |
1470 | }\r |
1471 | \r |
1472 | /* long / long: long quotient, maybe long remainder */\r |
1473 | if(BIT_B(word2)) /* signed */\r |
1474 | {\r |
1475 | /* Special case in divide */\r |
1476 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
1477 | {\r |
1478 | FLAG_N = NFLAG_SET;\r |
1479 | FLAG_Z = ZFLAG_CLEAR;\r |
1480 | FLAG_V = VFLAG_CLEAR;\r |
1481 | FLAG_C = CFLAG_CLEAR;\r |
1482 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
1483 | REG_D[word2 & 7] = 0;\r |
1484 | return;\r |
1485 | }\r |
1486 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
1487 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
1488 | }\r |
1489 | else\r |
1490 | {\r |
1491 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
1492 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
1493 | }\r |
1494 | \r |
1495 | FLAG_N = NFLAG_32(quotient);\r |
1496 | FLAG_Z = quotient;\r |
1497 | FLAG_V = VFLAG_CLEAR;\r |
1498 | FLAG_C = CFLAG_CLEAR;\r |
1499 | return;\r |
1500 | }\r |
1501 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1502 | return;\r |
1503 | }\r |
1504 | m68ki_exception_illegal();\r |
1505 | \r |
1506 | #endif\r |
1507 | }\r |
1508 | \r |
1509 | \r |
1510 | void m68k_op_divl_32_pi(void)\r |
1511 | {\r |
1512 | #if M68K_USE_64_BIT\r |
1513 | \r |
1514 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
1515 | {\r |
1516 | uint word2 = OPER_I_16();\r |
1517 | uint64 divisor = OPER_AY_PI_32();\r |
1518 | uint64 dividend = 0;\r |
1519 | uint64 quotient = 0;\r |
1520 | uint64 remainder = 0;\r |
1521 | \r |
1522 | if(divisor != 0)\r |
1523 | {\r |
1524 | if(BIT_A(word2)) /* 64 bit */\r |
1525 | {\r |
1526 | dividend = REG_D[word2 & 7];\r |
1527 | dividend <<= 32;\r |
1528 | dividend |= REG_D[(word2 >> 12) & 7];\r |
1529 | \r |
1530 | if(BIT_B(word2)) /* signed */\r |
1531 | {\r |
1532 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
1533 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
1534 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
1535 | {\r |
1536 | FLAG_V = VFLAG_SET;\r |
1537 | return;\r |
1538 | }\r |
1539 | }\r |
1540 | else /* unsigned */\r |
1541 | {\r |
1542 | quotient = dividend / divisor;\r |
1543 | if(quotient > 0xffffffff)\r |
1544 | {\r |
1545 | FLAG_V = VFLAG_SET;\r |
1546 | return;\r |
1547 | }\r |
1548 | remainder = dividend % divisor;\r |
1549 | }\r |
1550 | }\r |
1551 | else /* 32 bit */\r |
1552 | {\r |
1553 | dividend = REG_D[(word2 >> 12) & 7];\r |
1554 | if(BIT_B(word2)) /* signed */\r |
1555 | {\r |
1556 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
1557 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
1558 | }\r |
1559 | else /* unsigned */\r |
1560 | {\r |
1561 | quotient = dividend / divisor;\r |
1562 | remainder = dividend % divisor;\r |
1563 | }\r |
1564 | }\r |
1565 | \r |
1566 | REG_D[word2 & 7] = remainder;\r |
1567 | REG_D[(word2 >> 12) & 7] = quotient;\r |
1568 | \r |
1569 | FLAG_N = NFLAG_32(quotient);\r |
1570 | FLAG_Z = quotient;\r |
1571 | FLAG_V = VFLAG_CLEAR;\r |
1572 | FLAG_C = CFLAG_CLEAR;\r |
1573 | return;\r |
1574 | }\r |
1575 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1576 | return;\r |
1577 | }\r |
1578 | m68ki_exception_illegal();\r |
1579 | \r |
1580 | #else\r |
1581 | \r |
1582 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
1583 | {\r |
1584 | uint word2 = OPER_I_16();\r |
1585 | uint divisor = OPER_AY_PI_32();\r |
1586 | uint dividend_hi = REG_D[word2 & 7];\r |
1587 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
1588 | uint quotient = 0;\r |
1589 | uint remainder = 0;\r |
1590 | uint dividend_neg = 0;\r |
1591 | uint divisor_neg = 0;\r |
1592 | sint i;\r |
1593 | uint overflow;\r |
1594 | \r |
1595 | if(divisor != 0)\r |
1596 | {\r |
1597 | /* quad / long : long quotient, long remainder */\r |
1598 | if(BIT_A(word2))\r |
1599 | {\r |
1600 | if(BIT_B(word2)) /* signed */\r |
1601 | {\r |
1602 | /* special case in signed divide */\r |
1603 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
1604 | {\r |
1605 | REG_D[word2 & 7] = 0;\r |
1606 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
1607 | \r |
1608 | FLAG_N = NFLAG_SET;\r |
1609 | FLAG_Z = ZFLAG_CLEAR;\r |
1610 | FLAG_V = VFLAG_CLEAR;\r |
1611 | FLAG_C = CFLAG_CLEAR;\r |
1612 | return;\r |
1613 | }\r |
1614 | if(GET_MSB_32(dividend_hi))\r |
1615 | {\r |
1616 | dividend_neg = 1;\r |
1617 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
1618 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
1619 | }\r |
1620 | if(GET_MSB_32(divisor))\r |
1621 | {\r |
1622 | divisor_neg = 1;\r |
1623 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
1624 | \r |
1625 | }\r |
1626 | }\r |
1627 | \r |
1628 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
1629 | if(dividend_hi >= divisor)\r |
1630 | {\r |
1631 | FLAG_V = VFLAG_SET;\r |
1632 | return;\r |
1633 | }\r |
1634 | \r |
1635 | for(i = 31; i >= 0; i--)\r |
1636 | {\r |
1637 | quotient <<= 1;\r |
1638 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
1639 | if(remainder >= divisor)\r |
1640 | {\r |
1641 | remainder -= divisor;\r |
1642 | quotient++;\r |
1643 | }\r |
1644 | }\r |
1645 | for(i = 31; i >= 0; i--)\r |
1646 | {\r |
1647 | quotient <<= 1;\r |
1648 | overflow = GET_MSB_32(remainder);\r |
1649 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
1650 | if(remainder >= divisor || overflow)\r |
1651 | {\r |
1652 | remainder -= divisor;\r |
1653 | quotient++;\r |
1654 | }\r |
1655 | }\r |
1656 | \r |
1657 | if(BIT_B(word2)) /* signed */\r |
1658 | {\r |
1659 | if(quotient > 0x7fffffff)\r |
1660 | {\r |
1661 | FLAG_V = VFLAG_SET;\r |
1662 | return;\r |
1663 | }\r |
1664 | if(dividend_neg)\r |
1665 | {\r |
1666 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
1667 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
1668 | }\r |
1669 | if(divisor_neg)\r |
1670 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
1671 | }\r |
1672 | \r |
1673 | REG_D[word2 & 7] = remainder;\r |
1674 | REG_D[(word2 >> 12) & 7] = quotient;\r |
1675 | \r |
1676 | FLAG_N = NFLAG_32(quotient);\r |
1677 | FLAG_Z = quotient;\r |
1678 | FLAG_V = VFLAG_CLEAR;\r |
1679 | FLAG_C = CFLAG_CLEAR;\r |
1680 | return;\r |
1681 | }\r |
1682 | \r |
1683 | /* long / long: long quotient, maybe long remainder */\r |
1684 | if(BIT_B(word2)) /* signed */\r |
1685 | {\r |
1686 | /* Special case in divide */\r |
1687 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
1688 | {\r |
1689 | FLAG_N = NFLAG_SET;\r |
1690 | FLAG_Z = ZFLAG_CLEAR;\r |
1691 | FLAG_V = VFLAG_CLEAR;\r |
1692 | FLAG_C = CFLAG_CLEAR;\r |
1693 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
1694 | REG_D[word2 & 7] = 0;\r |
1695 | return;\r |
1696 | }\r |
1697 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
1698 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
1699 | }\r |
1700 | else\r |
1701 | {\r |
1702 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
1703 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
1704 | }\r |
1705 | \r |
1706 | FLAG_N = NFLAG_32(quotient);\r |
1707 | FLAG_Z = quotient;\r |
1708 | FLAG_V = VFLAG_CLEAR;\r |
1709 | FLAG_C = CFLAG_CLEAR;\r |
1710 | return;\r |
1711 | }\r |
1712 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1713 | return;\r |
1714 | }\r |
1715 | m68ki_exception_illegal();\r |
1716 | \r |
1717 | #endif\r |
1718 | }\r |
1719 | \r |
1720 | \r |
1721 | void m68k_op_divl_32_pd(void)\r |
1722 | {\r |
1723 | #if M68K_USE_64_BIT\r |
1724 | \r |
1725 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
1726 | {\r |
1727 | uint word2 = OPER_I_16();\r |
1728 | uint64 divisor = OPER_AY_PD_32();\r |
1729 | uint64 dividend = 0;\r |
1730 | uint64 quotient = 0;\r |
1731 | uint64 remainder = 0;\r |
1732 | \r |
1733 | if(divisor != 0)\r |
1734 | {\r |
1735 | if(BIT_A(word2)) /* 64 bit */\r |
1736 | {\r |
1737 | dividend = REG_D[word2 & 7];\r |
1738 | dividend <<= 32;\r |
1739 | dividend |= REG_D[(word2 >> 12) & 7];\r |
1740 | \r |
1741 | if(BIT_B(word2)) /* signed */\r |
1742 | {\r |
1743 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
1744 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
1745 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
1746 | {\r |
1747 | FLAG_V = VFLAG_SET;\r |
1748 | return;\r |
1749 | }\r |
1750 | }\r |
1751 | else /* unsigned */\r |
1752 | {\r |
1753 | quotient = dividend / divisor;\r |
1754 | if(quotient > 0xffffffff)\r |
1755 | {\r |
1756 | FLAG_V = VFLAG_SET;\r |
1757 | return;\r |
1758 | }\r |
1759 | remainder = dividend % divisor;\r |
1760 | }\r |
1761 | }\r |
1762 | else /* 32 bit */\r |
1763 | {\r |
1764 | dividend = REG_D[(word2 >> 12) & 7];\r |
1765 | if(BIT_B(word2)) /* signed */\r |
1766 | {\r |
1767 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
1768 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
1769 | }\r |
1770 | else /* unsigned */\r |
1771 | {\r |
1772 | quotient = dividend / divisor;\r |
1773 | remainder = dividend % divisor;\r |
1774 | }\r |
1775 | }\r |
1776 | \r |
1777 | REG_D[word2 & 7] = remainder;\r |
1778 | REG_D[(word2 >> 12) & 7] = quotient;\r |
1779 | \r |
1780 | FLAG_N = NFLAG_32(quotient);\r |
1781 | FLAG_Z = quotient;\r |
1782 | FLAG_V = VFLAG_CLEAR;\r |
1783 | FLAG_C = CFLAG_CLEAR;\r |
1784 | return;\r |
1785 | }\r |
1786 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1787 | return;\r |
1788 | }\r |
1789 | m68ki_exception_illegal();\r |
1790 | \r |
1791 | #else\r |
1792 | \r |
1793 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
1794 | {\r |
1795 | uint word2 = OPER_I_16();\r |
1796 | uint divisor = OPER_AY_PD_32();\r |
1797 | uint dividend_hi = REG_D[word2 & 7];\r |
1798 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
1799 | uint quotient = 0;\r |
1800 | uint remainder = 0;\r |
1801 | uint dividend_neg = 0;\r |
1802 | uint divisor_neg = 0;\r |
1803 | sint i;\r |
1804 | uint overflow;\r |
1805 | \r |
1806 | if(divisor != 0)\r |
1807 | {\r |
1808 | /* quad / long : long quotient, long remainder */\r |
1809 | if(BIT_A(word2))\r |
1810 | {\r |
1811 | if(BIT_B(word2)) /* signed */\r |
1812 | {\r |
1813 | /* special case in signed divide */\r |
1814 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
1815 | {\r |
1816 | REG_D[word2 & 7] = 0;\r |
1817 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
1818 | \r |
1819 | FLAG_N = NFLAG_SET;\r |
1820 | FLAG_Z = ZFLAG_CLEAR;\r |
1821 | FLAG_V = VFLAG_CLEAR;\r |
1822 | FLAG_C = CFLAG_CLEAR;\r |
1823 | return;\r |
1824 | }\r |
1825 | if(GET_MSB_32(dividend_hi))\r |
1826 | {\r |
1827 | dividend_neg = 1;\r |
1828 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
1829 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
1830 | }\r |
1831 | if(GET_MSB_32(divisor))\r |
1832 | {\r |
1833 | divisor_neg = 1;\r |
1834 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
1835 | \r |
1836 | }\r |
1837 | }\r |
1838 | \r |
1839 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
1840 | if(dividend_hi >= divisor)\r |
1841 | {\r |
1842 | FLAG_V = VFLAG_SET;\r |
1843 | return;\r |
1844 | }\r |
1845 | \r |
1846 | for(i = 31; i >= 0; i--)\r |
1847 | {\r |
1848 | quotient <<= 1;\r |
1849 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
1850 | if(remainder >= divisor)\r |
1851 | {\r |
1852 | remainder -= divisor;\r |
1853 | quotient++;\r |
1854 | }\r |
1855 | }\r |
1856 | for(i = 31; i >= 0; i--)\r |
1857 | {\r |
1858 | quotient <<= 1;\r |
1859 | overflow = GET_MSB_32(remainder);\r |
1860 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
1861 | if(remainder >= divisor || overflow)\r |
1862 | {\r |
1863 | remainder -= divisor;\r |
1864 | quotient++;\r |
1865 | }\r |
1866 | }\r |
1867 | \r |
1868 | if(BIT_B(word2)) /* signed */\r |
1869 | {\r |
1870 | if(quotient > 0x7fffffff)\r |
1871 | {\r |
1872 | FLAG_V = VFLAG_SET;\r |
1873 | return;\r |
1874 | }\r |
1875 | if(dividend_neg)\r |
1876 | {\r |
1877 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
1878 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
1879 | }\r |
1880 | if(divisor_neg)\r |
1881 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
1882 | }\r |
1883 | \r |
1884 | REG_D[word2 & 7] = remainder;\r |
1885 | REG_D[(word2 >> 12) & 7] = quotient;\r |
1886 | \r |
1887 | FLAG_N = NFLAG_32(quotient);\r |
1888 | FLAG_Z = quotient;\r |
1889 | FLAG_V = VFLAG_CLEAR;\r |
1890 | FLAG_C = CFLAG_CLEAR;\r |
1891 | return;\r |
1892 | }\r |
1893 | \r |
1894 | /* long / long: long quotient, maybe long remainder */\r |
1895 | if(BIT_B(word2)) /* signed */\r |
1896 | {\r |
1897 | /* Special case in divide */\r |
1898 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
1899 | {\r |
1900 | FLAG_N = NFLAG_SET;\r |
1901 | FLAG_Z = ZFLAG_CLEAR;\r |
1902 | FLAG_V = VFLAG_CLEAR;\r |
1903 | FLAG_C = CFLAG_CLEAR;\r |
1904 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
1905 | REG_D[word2 & 7] = 0;\r |
1906 | return;\r |
1907 | }\r |
1908 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
1909 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
1910 | }\r |
1911 | else\r |
1912 | {\r |
1913 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
1914 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
1915 | }\r |
1916 | \r |
1917 | FLAG_N = NFLAG_32(quotient);\r |
1918 | FLAG_Z = quotient;\r |
1919 | FLAG_V = VFLAG_CLEAR;\r |
1920 | FLAG_C = CFLAG_CLEAR;\r |
1921 | return;\r |
1922 | }\r |
1923 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1924 | return;\r |
1925 | }\r |
1926 | m68ki_exception_illegal();\r |
1927 | \r |
1928 | #endif\r |
1929 | }\r |
1930 | \r |
1931 | \r |
1932 | void m68k_op_divl_32_di(void)\r |
1933 | {\r |
1934 | #if M68K_USE_64_BIT\r |
1935 | \r |
1936 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
1937 | {\r |
1938 | uint word2 = OPER_I_16();\r |
1939 | uint64 divisor = OPER_AY_DI_32();\r |
1940 | uint64 dividend = 0;\r |
1941 | uint64 quotient = 0;\r |
1942 | uint64 remainder = 0;\r |
1943 | \r |
1944 | if(divisor != 0)\r |
1945 | {\r |
1946 | if(BIT_A(word2)) /* 64 bit */\r |
1947 | {\r |
1948 | dividend = REG_D[word2 & 7];\r |
1949 | dividend <<= 32;\r |
1950 | dividend |= REG_D[(word2 >> 12) & 7];\r |
1951 | \r |
1952 | if(BIT_B(word2)) /* signed */\r |
1953 | {\r |
1954 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
1955 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
1956 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
1957 | {\r |
1958 | FLAG_V = VFLAG_SET;\r |
1959 | return;\r |
1960 | }\r |
1961 | }\r |
1962 | else /* unsigned */\r |
1963 | {\r |
1964 | quotient = dividend / divisor;\r |
1965 | if(quotient > 0xffffffff)\r |
1966 | {\r |
1967 | FLAG_V = VFLAG_SET;\r |
1968 | return;\r |
1969 | }\r |
1970 | remainder = dividend % divisor;\r |
1971 | }\r |
1972 | }\r |
1973 | else /* 32 bit */\r |
1974 | {\r |
1975 | dividend = REG_D[(word2 >> 12) & 7];\r |
1976 | if(BIT_B(word2)) /* signed */\r |
1977 | {\r |
1978 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
1979 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
1980 | }\r |
1981 | else /* unsigned */\r |
1982 | {\r |
1983 | quotient = dividend / divisor;\r |
1984 | remainder = dividend % divisor;\r |
1985 | }\r |
1986 | }\r |
1987 | \r |
1988 | REG_D[word2 & 7] = remainder;\r |
1989 | REG_D[(word2 >> 12) & 7] = quotient;\r |
1990 | \r |
1991 | FLAG_N = NFLAG_32(quotient);\r |
1992 | FLAG_Z = quotient;\r |
1993 | FLAG_V = VFLAG_CLEAR;\r |
1994 | FLAG_C = CFLAG_CLEAR;\r |
1995 | return;\r |
1996 | }\r |
1997 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
1998 | return;\r |
1999 | }\r |
2000 | m68ki_exception_illegal();\r |
2001 | \r |
2002 | #else\r |
2003 | \r |
2004 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2005 | {\r |
2006 | uint word2 = OPER_I_16();\r |
2007 | uint divisor = OPER_AY_DI_32();\r |
2008 | uint dividend_hi = REG_D[word2 & 7];\r |
2009 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
2010 | uint quotient = 0;\r |
2011 | uint remainder = 0;\r |
2012 | uint dividend_neg = 0;\r |
2013 | uint divisor_neg = 0;\r |
2014 | sint i;\r |
2015 | uint overflow;\r |
2016 | \r |
2017 | if(divisor != 0)\r |
2018 | {\r |
2019 | /* quad / long : long quotient, long remainder */\r |
2020 | if(BIT_A(word2))\r |
2021 | {\r |
2022 | if(BIT_B(word2)) /* signed */\r |
2023 | {\r |
2024 | /* special case in signed divide */\r |
2025 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2026 | {\r |
2027 | REG_D[word2 & 7] = 0;\r |
2028 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2029 | \r |
2030 | FLAG_N = NFLAG_SET;\r |
2031 | FLAG_Z = ZFLAG_CLEAR;\r |
2032 | FLAG_V = VFLAG_CLEAR;\r |
2033 | FLAG_C = CFLAG_CLEAR;\r |
2034 | return;\r |
2035 | }\r |
2036 | if(GET_MSB_32(dividend_hi))\r |
2037 | {\r |
2038 | dividend_neg = 1;\r |
2039 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
2040 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
2041 | }\r |
2042 | if(GET_MSB_32(divisor))\r |
2043 | {\r |
2044 | divisor_neg = 1;\r |
2045 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
2046 | \r |
2047 | }\r |
2048 | }\r |
2049 | \r |
2050 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
2051 | if(dividend_hi >= divisor)\r |
2052 | {\r |
2053 | FLAG_V = VFLAG_SET;\r |
2054 | return;\r |
2055 | }\r |
2056 | \r |
2057 | for(i = 31; i >= 0; i--)\r |
2058 | {\r |
2059 | quotient <<= 1;\r |
2060 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
2061 | if(remainder >= divisor)\r |
2062 | {\r |
2063 | remainder -= divisor;\r |
2064 | quotient++;\r |
2065 | }\r |
2066 | }\r |
2067 | for(i = 31; i >= 0; i--)\r |
2068 | {\r |
2069 | quotient <<= 1;\r |
2070 | overflow = GET_MSB_32(remainder);\r |
2071 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
2072 | if(remainder >= divisor || overflow)\r |
2073 | {\r |
2074 | remainder -= divisor;\r |
2075 | quotient++;\r |
2076 | }\r |
2077 | }\r |
2078 | \r |
2079 | if(BIT_B(word2)) /* signed */\r |
2080 | {\r |
2081 | if(quotient > 0x7fffffff)\r |
2082 | {\r |
2083 | FLAG_V = VFLAG_SET;\r |
2084 | return;\r |
2085 | }\r |
2086 | if(dividend_neg)\r |
2087 | {\r |
2088 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
2089 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2090 | }\r |
2091 | if(divisor_neg)\r |
2092 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2093 | }\r |
2094 | \r |
2095 | REG_D[word2 & 7] = remainder;\r |
2096 | REG_D[(word2 >> 12) & 7] = quotient;\r |
2097 | \r |
2098 | FLAG_N = NFLAG_32(quotient);\r |
2099 | FLAG_Z = quotient;\r |
2100 | FLAG_V = VFLAG_CLEAR;\r |
2101 | FLAG_C = CFLAG_CLEAR;\r |
2102 | return;\r |
2103 | }\r |
2104 | \r |
2105 | /* long / long: long quotient, maybe long remainder */\r |
2106 | if(BIT_B(word2)) /* signed */\r |
2107 | {\r |
2108 | /* Special case in divide */\r |
2109 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2110 | {\r |
2111 | FLAG_N = NFLAG_SET;\r |
2112 | FLAG_Z = ZFLAG_CLEAR;\r |
2113 | FLAG_V = VFLAG_CLEAR;\r |
2114 | FLAG_C = CFLAG_CLEAR;\r |
2115 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2116 | REG_D[word2 & 7] = 0;\r |
2117 | return;\r |
2118 | }\r |
2119 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
2120 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
2121 | }\r |
2122 | else\r |
2123 | {\r |
2124 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
2125 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
2126 | }\r |
2127 | \r |
2128 | FLAG_N = NFLAG_32(quotient);\r |
2129 | FLAG_Z = quotient;\r |
2130 | FLAG_V = VFLAG_CLEAR;\r |
2131 | FLAG_C = CFLAG_CLEAR;\r |
2132 | return;\r |
2133 | }\r |
2134 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
2135 | return;\r |
2136 | }\r |
2137 | m68ki_exception_illegal();\r |
2138 | \r |
2139 | #endif\r |
2140 | }\r |
2141 | \r |
2142 | \r |
2143 | void m68k_op_divl_32_ix(void)\r |
2144 | {\r |
2145 | #if M68K_USE_64_BIT\r |
2146 | \r |
2147 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2148 | {\r |
2149 | uint word2 = OPER_I_16();\r |
2150 | uint64 divisor = OPER_AY_IX_32();\r |
2151 | uint64 dividend = 0;\r |
2152 | uint64 quotient = 0;\r |
2153 | uint64 remainder = 0;\r |
2154 | \r |
2155 | if(divisor != 0)\r |
2156 | {\r |
2157 | if(BIT_A(word2)) /* 64 bit */\r |
2158 | {\r |
2159 | dividend = REG_D[word2 & 7];\r |
2160 | dividend <<= 32;\r |
2161 | dividend |= REG_D[(word2 >> 12) & 7];\r |
2162 | \r |
2163 | if(BIT_B(word2)) /* signed */\r |
2164 | {\r |
2165 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
2166 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
2167 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
2168 | {\r |
2169 | FLAG_V = VFLAG_SET;\r |
2170 | return;\r |
2171 | }\r |
2172 | }\r |
2173 | else /* unsigned */\r |
2174 | {\r |
2175 | quotient = dividend / divisor;\r |
2176 | if(quotient > 0xffffffff)\r |
2177 | {\r |
2178 | FLAG_V = VFLAG_SET;\r |
2179 | return;\r |
2180 | }\r |
2181 | remainder = dividend % divisor;\r |
2182 | }\r |
2183 | }\r |
2184 | else /* 32 bit */\r |
2185 | {\r |
2186 | dividend = REG_D[(word2 >> 12) & 7];\r |
2187 | if(BIT_B(word2)) /* signed */\r |
2188 | {\r |
2189 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
2190 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
2191 | }\r |
2192 | else /* unsigned */\r |
2193 | {\r |
2194 | quotient = dividend / divisor;\r |
2195 | remainder = dividend % divisor;\r |
2196 | }\r |
2197 | }\r |
2198 | \r |
2199 | REG_D[word2 & 7] = remainder;\r |
2200 | REG_D[(word2 >> 12) & 7] = quotient;\r |
2201 | \r |
2202 | FLAG_N = NFLAG_32(quotient);\r |
2203 | FLAG_Z = quotient;\r |
2204 | FLAG_V = VFLAG_CLEAR;\r |
2205 | FLAG_C = CFLAG_CLEAR;\r |
2206 | return;\r |
2207 | }\r |
2208 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
2209 | return;\r |
2210 | }\r |
2211 | m68ki_exception_illegal();\r |
2212 | \r |
2213 | #else\r |
2214 | \r |
2215 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2216 | {\r |
2217 | uint word2 = OPER_I_16();\r |
2218 | uint divisor = OPER_AY_IX_32();\r |
2219 | uint dividend_hi = REG_D[word2 & 7];\r |
2220 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
2221 | uint quotient = 0;\r |
2222 | uint remainder = 0;\r |
2223 | uint dividend_neg = 0;\r |
2224 | uint divisor_neg = 0;\r |
2225 | sint i;\r |
2226 | uint overflow;\r |
2227 | \r |
2228 | if(divisor != 0)\r |
2229 | {\r |
2230 | /* quad / long : long quotient, long remainder */\r |
2231 | if(BIT_A(word2))\r |
2232 | {\r |
2233 | if(BIT_B(word2)) /* signed */\r |
2234 | {\r |
2235 | /* special case in signed divide */\r |
2236 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2237 | {\r |
2238 | REG_D[word2 & 7] = 0;\r |
2239 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2240 | \r |
2241 | FLAG_N = NFLAG_SET;\r |
2242 | FLAG_Z = ZFLAG_CLEAR;\r |
2243 | FLAG_V = VFLAG_CLEAR;\r |
2244 | FLAG_C = CFLAG_CLEAR;\r |
2245 | return;\r |
2246 | }\r |
2247 | if(GET_MSB_32(dividend_hi))\r |
2248 | {\r |
2249 | dividend_neg = 1;\r |
2250 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
2251 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
2252 | }\r |
2253 | if(GET_MSB_32(divisor))\r |
2254 | {\r |
2255 | divisor_neg = 1;\r |
2256 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
2257 | \r |
2258 | }\r |
2259 | }\r |
2260 | \r |
2261 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
2262 | if(dividend_hi >= divisor)\r |
2263 | {\r |
2264 | FLAG_V = VFLAG_SET;\r |
2265 | return;\r |
2266 | }\r |
2267 | \r |
2268 | for(i = 31; i >= 0; i--)\r |
2269 | {\r |
2270 | quotient <<= 1;\r |
2271 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
2272 | if(remainder >= divisor)\r |
2273 | {\r |
2274 | remainder -= divisor;\r |
2275 | quotient++;\r |
2276 | }\r |
2277 | }\r |
2278 | for(i = 31; i >= 0; i--)\r |
2279 | {\r |
2280 | quotient <<= 1;\r |
2281 | overflow = GET_MSB_32(remainder);\r |
2282 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
2283 | if(remainder >= divisor || overflow)\r |
2284 | {\r |
2285 | remainder -= divisor;\r |
2286 | quotient++;\r |
2287 | }\r |
2288 | }\r |
2289 | \r |
2290 | if(BIT_B(word2)) /* signed */\r |
2291 | {\r |
2292 | if(quotient > 0x7fffffff)\r |
2293 | {\r |
2294 | FLAG_V = VFLAG_SET;\r |
2295 | return;\r |
2296 | }\r |
2297 | if(dividend_neg)\r |
2298 | {\r |
2299 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
2300 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2301 | }\r |
2302 | if(divisor_neg)\r |
2303 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2304 | }\r |
2305 | \r |
2306 | REG_D[word2 & 7] = remainder;\r |
2307 | REG_D[(word2 >> 12) & 7] = quotient;\r |
2308 | \r |
2309 | FLAG_N = NFLAG_32(quotient);\r |
2310 | FLAG_Z = quotient;\r |
2311 | FLAG_V = VFLAG_CLEAR;\r |
2312 | FLAG_C = CFLAG_CLEAR;\r |
2313 | return;\r |
2314 | }\r |
2315 | \r |
2316 | /* long / long: long quotient, maybe long remainder */\r |
2317 | if(BIT_B(word2)) /* signed */\r |
2318 | {\r |
2319 | /* Special case in divide */\r |
2320 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2321 | {\r |
2322 | FLAG_N = NFLAG_SET;\r |
2323 | FLAG_Z = ZFLAG_CLEAR;\r |
2324 | FLAG_V = VFLAG_CLEAR;\r |
2325 | FLAG_C = CFLAG_CLEAR;\r |
2326 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2327 | REG_D[word2 & 7] = 0;\r |
2328 | return;\r |
2329 | }\r |
2330 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
2331 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
2332 | }\r |
2333 | else\r |
2334 | {\r |
2335 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
2336 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
2337 | }\r |
2338 | \r |
2339 | FLAG_N = NFLAG_32(quotient);\r |
2340 | FLAG_Z = quotient;\r |
2341 | FLAG_V = VFLAG_CLEAR;\r |
2342 | FLAG_C = CFLAG_CLEAR;\r |
2343 | return;\r |
2344 | }\r |
2345 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
2346 | return;\r |
2347 | }\r |
2348 | m68ki_exception_illegal();\r |
2349 | \r |
2350 | #endif\r |
2351 | }\r |
2352 | \r |
2353 | \r |
2354 | void m68k_op_divl_32_aw(void)\r |
2355 | {\r |
2356 | #if M68K_USE_64_BIT\r |
2357 | \r |
2358 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2359 | {\r |
2360 | uint word2 = OPER_I_16();\r |
2361 | uint64 divisor = OPER_AW_32();\r |
2362 | uint64 dividend = 0;\r |
2363 | uint64 quotient = 0;\r |
2364 | uint64 remainder = 0;\r |
2365 | \r |
2366 | if(divisor != 0)\r |
2367 | {\r |
2368 | if(BIT_A(word2)) /* 64 bit */\r |
2369 | {\r |
2370 | dividend = REG_D[word2 & 7];\r |
2371 | dividend <<= 32;\r |
2372 | dividend |= REG_D[(word2 >> 12) & 7];\r |
2373 | \r |
2374 | if(BIT_B(word2)) /* signed */\r |
2375 | {\r |
2376 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
2377 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
2378 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
2379 | {\r |
2380 | FLAG_V = VFLAG_SET;\r |
2381 | return;\r |
2382 | }\r |
2383 | }\r |
2384 | else /* unsigned */\r |
2385 | {\r |
2386 | quotient = dividend / divisor;\r |
2387 | if(quotient > 0xffffffff)\r |
2388 | {\r |
2389 | FLAG_V = VFLAG_SET;\r |
2390 | return;\r |
2391 | }\r |
2392 | remainder = dividend % divisor;\r |
2393 | }\r |
2394 | }\r |
2395 | else /* 32 bit */\r |
2396 | {\r |
2397 | dividend = REG_D[(word2 >> 12) & 7];\r |
2398 | if(BIT_B(word2)) /* signed */\r |
2399 | {\r |
2400 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
2401 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
2402 | }\r |
2403 | else /* unsigned */\r |
2404 | {\r |
2405 | quotient = dividend / divisor;\r |
2406 | remainder = dividend % divisor;\r |
2407 | }\r |
2408 | }\r |
2409 | \r |
2410 | REG_D[word2 & 7] = remainder;\r |
2411 | REG_D[(word2 >> 12) & 7] = quotient;\r |
2412 | \r |
2413 | FLAG_N = NFLAG_32(quotient);\r |
2414 | FLAG_Z = quotient;\r |
2415 | FLAG_V = VFLAG_CLEAR;\r |
2416 | FLAG_C = CFLAG_CLEAR;\r |
2417 | return;\r |
2418 | }\r |
2419 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
2420 | return;\r |
2421 | }\r |
2422 | m68ki_exception_illegal();\r |
2423 | \r |
2424 | #else\r |
2425 | \r |
2426 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2427 | {\r |
2428 | uint word2 = OPER_I_16();\r |
2429 | uint divisor = OPER_AW_32();\r |
2430 | uint dividend_hi = REG_D[word2 & 7];\r |
2431 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
2432 | uint quotient = 0;\r |
2433 | uint remainder = 0;\r |
2434 | uint dividend_neg = 0;\r |
2435 | uint divisor_neg = 0;\r |
2436 | sint i;\r |
2437 | uint overflow;\r |
2438 | \r |
2439 | if(divisor != 0)\r |
2440 | {\r |
2441 | /* quad / long : long quotient, long remainder */\r |
2442 | if(BIT_A(word2))\r |
2443 | {\r |
2444 | if(BIT_B(word2)) /* signed */\r |
2445 | {\r |
2446 | /* special case in signed divide */\r |
2447 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2448 | {\r |
2449 | REG_D[word2 & 7] = 0;\r |
2450 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2451 | \r |
2452 | FLAG_N = NFLAG_SET;\r |
2453 | FLAG_Z = ZFLAG_CLEAR;\r |
2454 | FLAG_V = VFLAG_CLEAR;\r |
2455 | FLAG_C = CFLAG_CLEAR;\r |
2456 | return;\r |
2457 | }\r |
2458 | if(GET_MSB_32(dividend_hi))\r |
2459 | {\r |
2460 | dividend_neg = 1;\r |
2461 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
2462 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
2463 | }\r |
2464 | if(GET_MSB_32(divisor))\r |
2465 | {\r |
2466 | divisor_neg = 1;\r |
2467 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
2468 | \r |
2469 | }\r |
2470 | }\r |
2471 | \r |
2472 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
2473 | if(dividend_hi >= divisor)\r |
2474 | {\r |
2475 | FLAG_V = VFLAG_SET;\r |
2476 | return;\r |
2477 | }\r |
2478 | \r |
2479 | for(i = 31; i >= 0; i--)\r |
2480 | {\r |
2481 | quotient <<= 1;\r |
2482 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
2483 | if(remainder >= divisor)\r |
2484 | {\r |
2485 | remainder -= divisor;\r |
2486 | quotient++;\r |
2487 | }\r |
2488 | }\r |
2489 | for(i = 31; i >= 0; i--)\r |
2490 | {\r |
2491 | quotient <<= 1;\r |
2492 | overflow = GET_MSB_32(remainder);\r |
2493 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
2494 | if(remainder >= divisor || overflow)\r |
2495 | {\r |
2496 | remainder -= divisor;\r |
2497 | quotient++;\r |
2498 | }\r |
2499 | }\r |
2500 | \r |
2501 | if(BIT_B(word2)) /* signed */\r |
2502 | {\r |
2503 | if(quotient > 0x7fffffff)\r |
2504 | {\r |
2505 | FLAG_V = VFLAG_SET;\r |
2506 | return;\r |
2507 | }\r |
2508 | if(dividend_neg)\r |
2509 | {\r |
2510 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
2511 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2512 | }\r |
2513 | if(divisor_neg)\r |
2514 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2515 | }\r |
2516 | \r |
2517 | REG_D[word2 & 7] = remainder;\r |
2518 | REG_D[(word2 >> 12) & 7] = quotient;\r |
2519 | \r |
2520 | FLAG_N = NFLAG_32(quotient);\r |
2521 | FLAG_Z = quotient;\r |
2522 | FLAG_V = VFLAG_CLEAR;\r |
2523 | FLAG_C = CFLAG_CLEAR;\r |
2524 | return;\r |
2525 | }\r |
2526 | \r |
2527 | /* long / long: long quotient, maybe long remainder */\r |
2528 | if(BIT_B(word2)) /* signed */\r |
2529 | {\r |
2530 | /* Special case in divide */\r |
2531 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2532 | {\r |
2533 | FLAG_N = NFLAG_SET;\r |
2534 | FLAG_Z = ZFLAG_CLEAR;\r |
2535 | FLAG_V = VFLAG_CLEAR;\r |
2536 | FLAG_C = CFLAG_CLEAR;\r |
2537 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2538 | REG_D[word2 & 7] = 0;\r |
2539 | return;\r |
2540 | }\r |
2541 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
2542 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
2543 | }\r |
2544 | else\r |
2545 | {\r |
2546 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
2547 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
2548 | }\r |
2549 | \r |
2550 | FLAG_N = NFLAG_32(quotient);\r |
2551 | FLAG_Z = quotient;\r |
2552 | FLAG_V = VFLAG_CLEAR;\r |
2553 | FLAG_C = CFLAG_CLEAR;\r |
2554 | return;\r |
2555 | }\r |
2556 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
2557 | return;\r |
2558 | }\r |
2559 | m68ki_exception_illegal();\r |
2560 | \r |
2561 | #endif\r |
2562 | }\r |
2563 | \r |
2564 | \r |
2565 | void m68k_op_divl_32_al(void)\r |
2566 | {\r |
2567 | #if M68K_USE_64_BIT\r |
2568 | \r |
2569 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2570 | {\r |
2571 | uint word2 = OPER_I_16();\r |
2572 | uint64 divisor = OPER_AL_32();\r |
2573 | uint64 dividend = 0;\r |
2574 | uint64 quotient = 0;\r |
2575 | uint64 remainder = 0;\r |
2576 | \r |
2577 | if(divisor != 0)\r |
2578 | {\r |
2579 | if(BIT_A(word2)) /* 64 bit */\r |
2580 | {\r |
2581 | dividend = REG_D[word2 & 7];\r |
2582 | dividend <<= 32;\r |
2583 | dividend |= REG_D[(word2 >> 12) & 7];\r |
2584 | \r |
2585 | if(BIT_B(word2)) /* signed */\r |
2586 | {\r |
2587 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
2588 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
2589 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
2590 | {\r |
2591 | FLAG_V = VFLAG_SET;\r |
2592 | return;\r |
2593 | }\r |
2594 | }\r |
2595 | else /* unsigned */\r |
2596 | {\r |
2597 | quotient = dividend / divisor;\r |
2598 | if(quotient > 0xffffffff)\r |
2599 | {\r |
2600 | FLAG_V = VFLAG_SET;\r |
2601 | return;\r |
2602 | }\r |
2603 | remainder = dividend % divisor;\r |
2604 | }\r |
2605 | }\r |
2606 | else /* 32 bit */\r |
2607 | {\r |
2608 | dividend = REG_D[(word2 >> 12) & 7];\r |
2609 | if(BIT_B(word2)) /* signed */\r |
2610 | {\r |
2611 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
2612 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
2613 | }\r |
2614 | else /* unsigned */\r |
2615 | {\r |
2616 | quotient = dividend / divisor;\r |
2617 | remainder = dividend % divisor;\r |
2618 | }\r |
2619 | }\r |
2620 | \r |
2621 | REG_D[word2 & 7] = remainder;\r |
2622 | REG_D[(word2 >> 12) & 7] = quotient;\r |
2623 | \r |
2624 | FLAG_N = NFLAG_32(quotient);\r |
2625 | FLAG_Z = quotient;\r |
2626 | FLAG_V = VFLAG_CLEAR;\r |
2627 | FLAG_C = CFLAG_CLEAR;\r |
2628 | return;\r |
2629 | }\r |
2630 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
2631 | return;\r |
2632 | }\r |
2633 | m68ki_exception_illegal();\r |
2634 | \r |
2635 | #else\r |
2636 | \r |
2637 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2638 | {\r |
2639 | uint word2 = OPER_I_16();\r |
2640 | uint divisor = OPER_AL_32();\r |
2641 | uint dividend_hi = REG_D[word2 & 7];\r |
2642 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
2643 | uint quotient = 0;\r |
2644 | uint remainder = 0;\r |
2645 | uint dividend_neg = 0;\r |
2646 | uint divisor_neg = 0;\r |
2647 | sint i;\r |
2648 | uint overflow;\r |
2649 | \r |
2650 | if(divisor != 0)\r |
2651 | {\r |
2652 | /* quad / long : long quotient, long remainder */\r |
2653 | if(BIT_A(word2))\r |
2654 | {\r |
2655 | if(BIT_B(word2)) /* signed */\r |
2656 | {\r |
2657 | /* special case in signed divide */\r |
2658 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2659 | {\r |
2660 | REG_D[word2 & 7] = 0;\r |
2661 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2662 | \r |
2663 | FLAG_N = NFLAG_SET;\r |
2664 | FLAG_Z = ZFLAG_CLEAR;\r |
2665 | FLAG_V = VFLAG_CLEAR;\r |
2666 | FLAG_C = CFLAG_CLEAR;\r |
2667 | return;\r |
2668 | }\r |
2669 | if(GET_MSB_32(dividend_hi))\r |
2670 | {\r |
2671 | dividend_neg = 1;\r |
2672 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
2673 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
2674 | }\r |
2675 | if(GET_MSB_32(divisor))\r |
2676 | {\r |
2677 | divisor_neg = 1;\r |
2678 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
2679 | \r |
2680 | }\r |
2681 | }\r |
2682 | \r |
2683 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
2684 | if(dividend_hi >= divisor)\r |
2685 | {\r |
2686 | FLAG_V = VFLAG_SET;\r |
2687 | return;\r |
2688 | }\r |
2689 | \r |
2690 | for(i = 31; i >= 0; i--)\r |
2691 | {\r |
2692 | quotient <<= 1;\r |
2693 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
2694 | if(remainder >= divisor)\r |
2695 | {\r |
2696 | remainder -= divisor;\r |
2697 | quotient++;\r |
2698 | }\r |
2699 | }\r |
2700 | for(i = 31; i >= 0; i--)\r |
2701 | {\r |
2702 | quotient <<= 1;\r |
2703 | overflow = GET_MSB_32(remainder);\r |
2704 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
2705 | if(remainder >= divisor || overflow)\r |
2706 | {\r |
2707 | remainder -= divisor;\r |
2708 | quotient++;\r |
2709 | }\r |
2710 | }\r |
2711 | \r |
2712 | if(BIT_B(word2)) /* signed */\r |
2713 | {\r |
2714 | if(quotient > 0x7fffffff)\r |
2715 | {\r |
2716 | FLAG_V = VFLAG_SET;\r |
2717 | return;\r |
2718 | }\r |
2719 | if(dividend_neg)\r |
2720 | {\r |
2721 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
2722 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2723 | }\r |
2724 | if(divisor_neg)\r |
2725 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2726 | }\r |
2727 | \r |
2728 | REG_D[word2 & 7] = remainder;\r |
2729 | REG_D[(word2 >> 12) & 7] = quotient;\r |
2730 | \r |
2731 | FLAG_N = NFLAG_32(quotient);\r |
2732 | FLAG_Z = quotient;\r |
2733 | FLAG_V = VFLAG_CLEAR;\r |
2734 | FLAG_C = CFLAG_CLEAR;\r |
2735 | return;\r |
2736 | }\r |
2737 | \r |
2738 | /* long / long: long quotient, maybe long remainder */\r |
2739 | if(BIT_B(word2)) /* signed */\r |
2740 | {\r |
2741 | /* Special case in divide */\r |
2742 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2743 | {\r |
2744 | FLAG_N = NFLAG_SET;\r |
2745 | FLAG_Z = ZFLAG_CLEAR;\r |
2746 | FLAG_V = VFLAG_CLEAR;\r |
2747 | FLAG_C = CFLAG_CLEAR;\r |
2748 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2749 | REG_D[word2 & 7] = 0;\r |
2750 | return;\r |
2751 | }\r |
2752 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
2753 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
2754 | }\r |
2755 | else\r |
2756 | {\r |
2757 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
2758 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
2759 | }\r |
2760 | \r |
2761 | FLAG_N = NFLAG_32(quotient);\r |
2762 | FLAG_Z = quotient;\r |
2763 | FLAG_V = VFLAG_CLEAR;\r |
2764 | FLAG_C = CFLAG_CLEAR;\r |
2765 | return;\r |
2766 | }\r |
2767 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
2768 | return;\r |
2769 | }\r |
2770 | m68ki_exception_illegal();\r |
2771 | \r |
2772 | #endif\r |
2773 | }\r |
2774 | \r |
2775 | \r |
2776 | void m68k_op_divl_32_pcdi(void)\r |
2777 | {\r |
2778 | #if M68K_USE_64_BIT\r |
2779 | \r |
2780 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2781 | {\r |
2782 | uint word2 = OPER_I_16();\r |
2783 | uint64 divisor = OPER_PCDI_32();\r |
2784 | uint64 dividend = 0;\r |
2785 | uint64 quotient = 0;\r |
2786 | uint64 remainder = 0;\r |
2787 | \r |
2788 | if(divisor != 0)\r |
2789 | {\r |
2790 | if(BIT_A(word2)) /* 64 bit */\r |
2791 | {\r |
2792 | dividend = REG_D[word2 & 7];\r |
2793 | dividend <<= 32;\r |
2794 | dividend |= REG_D[(word2 >> 12) & 7];\r |
2795 | \r |
2796 | if(BIT_B(word2)) /* signed */\r |
2797 | {\r |
2798 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
2799 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
2800 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
2801 | {\r |
2802 | FLAG_V = VFLAG_SET;\r |
2803 | return;\r |
2804 | }\r |
2805 | }\r |
2806 | else /* unsigned */\r |
2807 | {\r |
2808 | quotient = dividend / divisor;\r |
2809 | if(quotient > 0xffffffff)\r |
2810 | {\r |
2811 | FLAG_V = VFLAG_SET;\r |
2812 | return;\r |
2813 | }\r |
2814 | remainder = dividend % divisor;\r |
2815 | }\r |
2816 | }\r |
2817 | else /* 32 bit */\r |
2818 | {\r |
2819 | dividend = REG_D[(word2 >> 12) & 7];\r |
2820 | if(BIT_B(word2)) /* signed */\r |
2821 | {\r |
2822 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
2823 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
2824 | }\r |
2825 | else /* unsigned */\r |
2826 | {\r |
2827 | quotient = dividend / divisor;\r |
2828 | remainder = dividend % divisor;\r |
2829 | }\r |
2830 | }\r |
2831 | \r |
2832 | REG_D[word2 & 7] = remainder;\r |
2833 | REG_D[(word2 >> 12) & 7] = quotient;\r |
2834 | \r |
2835 | FLAG_N = NFLAG_32(quotient);\r |
2836 | FLAG_Z = quotient;\r |
2837 | FLAG_V = VFLAG_CLEAR;\r |
2838 | FLAG_C = CFLAG_CLEAR;\r |
2839 | return;\r |
2840 | }\r |
2841 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
2842 | return;\r |
2843 | }\r |
2844 | m68ki_exception_illegal();\r |
2845 | \r |
2846 | #else\r |
2847 | \r |
2848 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2849 | {\r |
2850 | uint word2 = OPER_I_16();\r |
2851 | uint divisor = OPER_PCDI_32();\r |
2852 | uint dividend_hi = REG_D[word2 & 7];\r |
2853 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
2854 | uint quotient = 0;\r |
2855 | uint remainder = 0;\r |
2856 | uint dividend_neg = 0;\r |
2857 | uint divisor_neg = 0;\r |
2858 | sint i;\r |
2859 | uint overflow;\r |
2860 | \r |
2861 | if(divisor != 0)\r |
2862 | {\r |
2863 | /* quad / long : long quotient, long remainder */\r |
2864 | if(BIT_A(word2))\r |
2865 | {\r |
2866 | if(BIT_B(word2)) /* signed */\r |
2867 | {\r |
2868 | /* special case in signed divide */\r |
2869 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2870 | {\r |
2871 | REG_D[word2 & 7] = 0;\r |
2872 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2873 | \r |
2874 | FLAG_N = NFLAG_SET;\r |
2875 | FLAG_Z = ZFLAG_CLEAR;\r |
2876 | FLAG_V = VFLAG_CLEAR;\r |
2877 | FLAG_C = CFLAG_CLEAR;\r |
2878 | return;\r |
2879 | }\r |
2880 | if(GET_MSB_32(dividend_hi))\r |
2881 | {\r |
2882 | dividend_neg = 1;\r |
2883 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
2884 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
2885 | }\r |
2886 | if(GET_MSB_32(divisor))\r |
2887 | {\r |
2888 | divisor_neg = 1;\r |
2889 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
2890 | \r |
2891 | }\r |
2892 | }\r |
2893 | \r |
2894 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
2895 | if(dividend_hi >= divisor)\r |
2896 | {\r |
2897 | FLAG_V = VFLAG_SET;\r |
2898 | return;\r |
2899 | }\r |
2900 | \r |
2901 | for(i = 31; i >= 0; i--)\r |
2902 | {\r |
2903 | quotient <<= 1;\r |
2904 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
2905 | if(remainder >= divisor)\r |
2906 | {\r |
2907 | remainder -= divisor;\r |
2908 | quotient++;\r |
2909 | }\r |
2910 | }\r |
2911 | for(i = 31; i >= 0; i--)\r |
2912 | {\r |
2913 | quotient <<= 1;\r |
2914 | overflow = GET_MSB_32(remainder);\r |
2915 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
2916 | if(remainder >= divisor || overflow)\r |
2917 | {\r |
2918 | remainder -= divisor;\r |
2919 | quotient++;\r |
2920 | }\r |
2921 | }\r |
2922 | \r |
2923 | if(BIT_B(word2)) /* signed */\r |
2924 | {\r |
2925 | if(quotient > 0x7fffffff)\r |
2926 | {\r |
2927 | FLAG_V = VFLAG_SET;\r |
2928 | return;\r |
2929 | }\r |
2930 | if(dividend_neg)\r |
2931 | {\r |
2932 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
2933 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2934 | }\r |
2935 | if(divisor_neg)\r |
2936 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
2937 | }\r |
2938 | \r |
2939 | REG_D[word2 & 7] = remainder;\r |
2940 | REG_D[(word2 >> 12) & 7] = quotient;\r |
2941 | \r |
2942 | FLAG_N = NFLAG_32(quotient);\r |
2943 | FLAG_Z = quotient;\r |
2944 | FLAG_V = VFLAG_CLEAR;\r |
2945 | FLAG_C = CFLAG_CLEAR;\r |
2946 | return;\r |
2947 | }\r |
2948 | \r |
2949 | /* long / long: long quotient, maybe long remainder */\r |
2950 | if(BIT_B(word2)) /* signed */\r |
2951 | {\r |
2952 | /* Special case in divide */\r |
2953 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
2954 | {\r |
2955 | FLAG_N = NFLAG_SET;\r |
2956 | FLAG_Z = ZFLAG_CLEAR;\r |
2957 | FLAG_V = VFLAG_CLEAR;\r |
2958 | FLAG_C = CFLAG_CLEAR;\r |
2959 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
2960 | REG_D[word2 & 7] = 0;\r |
2961 | return;\r |
2962 | }\r |
2963 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
2964 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
2965 | }\r |
2966 | else\r |
2967 | {\r |
2968 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
2969 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
2970 | }\r |
2971 | \r |
2972 | FLAG_N = NFLAG_32(quotient);\r |
2973 | FLAG_Z = quotient;\r |
2974 | FLAG_V = VFLAG_CLEAR;\r |
2975 | FLAG_C = CFLAG_CLEAR;\r |
2976 | return;\r |
2977 | }\r |
2978 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
2979 | return;\r |
2980 | }\r |
2981 | m68ki_exception_illegal();\r |
2982 | \r |
2983 | #endif\r |
2984 | }\r |
2985 | \r |
2986 | \r |
2987 | void m68k_op_divl_32_pcix(void)\r |
2988 | {\r |
2989 | #if M68K_USE_64_BIT\r |
2990 | \r |
2991 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2992 | {\r |
2993 | uint word2 = OPER_I_16();\r |
2994 | uint64 divisor = OPER_PCIX_32();\r |
2995 | uint64 dividend = 0;\r |
2996 | uint64 quotient = 0;\r |
2997 | uint64 remainder = 0;\r |
2998 | \r |
2999 | if(divisor != 0)\r |
3000 | {\r |
3001 | if(BIT_A(word2)) /* 64 bit */\r |
3002 | {\r |
3003 | dividend = REG_D[word2 & 7];\r |
3004 | dividend <<= 32;\r |
3005 | dividend |= REG_D[(word2 >> 12) & 7];\r |
3006 | \r |
3007 | if(BIT_B(word2)) /* signed */\r |
3008 | {\r |
3009 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
3010 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
3011 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
3012 | {\r |
3013 | FLAG_V = VFLAG_SET;\r |
3014 | return;\r |
3015 | }\r |
3016 | }\r |
3017 | else /* unsigned */\r |
3018 | {\r |
3019 | quotient = dividend / divisor;\r |
3020 | if(quotient > 0xffffffff)\r |
3021 | {\r |
3022 | FLAG_V = VFLAG_SET;\r |
3023 | return;\r |
3024 | }\r |
3025 | remainder = dividend % divisor;\r |
3026 | }\r |
3027 | }\r |
3028 | else /* 32 bit */\r |
3029 | {\r |
3030 | dividend = REG_D[(word2 >> 12) & 7];\r |
3031 | if(BIT_B(word2)) /* signed */\r |
3032 | {\r |
3033 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
3034 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
3035 | }\r |
3036 | else /* unsigned */\r |
3037 | {\r |
3038 | quotient = dividend / divisor;\r |
3039 | remainder = dividend % divisor;\r |
3040 | }\r |
3041 | }\r |
3042 | \r |
3043 | REG_D[word2 & 7] = remainder;\r |
3044 | REG_D[(word2 >> 12) & 7] = quotient;\r |
3045 | \r |
3046 | FLAG_N = NFLAG_32(quotient);\r |
3047 | FLAG_Z = quotient;\r |
3048 | FLAG_V = VFLAG_CLEAR;\r |
3049 | FLAG_C = CFLAG_CLEAR;\r |
3050 | return;\r |
3051 | }\r |
3052 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
3053 | return;\r |
3054 | }\r |
3055 | m68ki_exception_illegal();\r |
3056 | \r |
3057 | #else\r |
3058 | \r |
3059 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
3060 | {\r |
3061 | uint word2 = OPER_I_16();\r |
3062 | uint divisor = OPER_PCIX_32();\r |
3063 | uint dividend_hi = REG_D[word2 & 7];\r |
3064 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
3065 | uint quotient = 0;\r |
3066 | uint remainder = 0;\r |
3067 | uint dividend_neg = 0;\r |
3068 | uint divisor_neg = 0;\r |
3069 | sint i;\r |
3070 | uint overflow;\r |
3071 | \r |
3072 | if(divisor != 0)\r |
3073 | {\r |
3074 | /* quad / long : long quotient, long remainder */\r |
3075 | if(BIT_A(word2))\r |
3076 | {\r |
3077 | if(BIT_B(word2)) /* signed */\r |
3078 | {\r |
3079 | /* special case in signed divide */\r |
3080 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
3081 | {\r |
3082 | REG_D[word2 & 7] = 0;\r |
3083 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
3084 | \r |
3085 | FLAG_N = NFLAG_SET;\r |
3086 | FLAG_Z = ZFLAG_CLEAR;\r |
3087 | FLAG_V = VFLAG_CLEAR;\r |
3088 | FLAG_C = CFLAG_CLEAR;\r |
3089 | return;\r |
3090 | }\r |
3091 | if(GET_MSB_32(dividend_hi))\r |
3092 | {\r |
3093 | dividend_neg = 1;\r |
3094 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
3095 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
3096 | }\r |
3097 | if(GET_MSB_32(divisor))\r |
3098 | {\r |
3099 | divisor_neg = 1;\r |
3100 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
3101 | \r |
3102 | }\r |
3103 | }\r |
3104 | \r |
3105 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
3106 | if(dividend_hi >= divisor)\r |
3107 | {\r |
3108 | FLAG_V = VFLAG_SET;\r |
3109 | return;\r |
3110 | }\r |
3111 | \r |
3112 | for(i = 31; i >= 0; i--)\r |
3113 | {\r |
3114 | quotient <<= 1;\r |
3115 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
3116 | if(remainder >= divisor)\r |
3117 | {\r |
3118 | remainder -= divisor;\r |
3119 | quotient++;\r |
3120 | }\r |
3121 | }\r |
3122 | for(i = 31; i >= 0; i--)\r |
3123 | {\r |
3124 | quotient <<= 1;\r |
3125 | overflow = GET_MSB_32(remainder);\r |
3126 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
3127 | if(remainder >= divisor || overflow)\r |
3128 | {\r |
3129 | remainder -= divisor;\r |
3130 | quotient++;\r |
3131 | }\r |
3132 | }\r |
3133 | \r |
3134 | if(BIT_B(word2)) /* signed */\r |
3135 | {\r |
3136 | if(quotient > 0x7fffffff)\r |
3137 | {\r |
3138 | FLAG_V = VFLAG_SET;\r |
3139 | return;\r |
3140 | }\r |
3141 | if(dividend_neg)\r |
3142 | {\r |
3143 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
3144 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
3145 | }\r |
3146 | if(divisor_neg)\r |
3147 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
3148 | }\r |
3149 | \r |
3150 | REG_D[word2 & 7] = remainder;\r |
3151 | REG_D[(word2 >> 12) & 7] = quotient;\r |
3152 | \r |
3153 | FLAG_N = NFLAG_32(quotient);\r |
3154 | FLAG_Z = quotient;\r |
3155 | FLAG_V = VFLAG_CLEAR;\r |
3156 | FLAG_C = CFLAG_CLEAR;\r |
3157 | return;\r |
3158 | }\r |
3159 | \r |
3160 | /* long / long: long quotient, maybe long remainder */\r |
3161 | if(BIT_B(word2)) /* signed */\r |
3162 | {\r |
3163 | /* Special case in divide */\r |
3164 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
3165 | {\r |
3166 | FLAG_N = NFLAG_SET;\r |
3167 | FLAG_Z = ZFLAG_CLEAR;\r |
3168 | FLAG_V = VFLAG_CLEAR;\r |
3169 | FLAG_C = CFLAG_CLEAR;\r |
3170 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
3171 | REG_D[word2 & 7] = 0;\r |
3172 | return;\r |
3173 | }\r |
3174 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
3175 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
3176 | }\r |
3177 | else\r |
3178 | {\r |
3179 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
3180 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
3181 | }\r |
3182 | \r |
3183 | FLAG_N = NFLAG_32(quotient);\r |
3184 | FLAG_Z = quotient;\r |
3185 | FLAG_V = VFLAG_CLEAR;\r |
3186 | FLAG_C = CFLAG_CLEAR;\r |
3187 | return;\r |
3188 | }\r |
3189 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
3190 | return;\r |
3191 | }\r |
3192 | m68ki_exception_illegal();\r |
3193 | \r |
3194 | #endif\r |
3195 | }\r |
3196 | \r |
3197 | \r |
3198 | void m68k_op_divl_32_i(void)\r |
3199 | {\r |
3200 | #if M68K_USE_64_BIT\r |
3201 | \r |
3202 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
3203 | {\r |
3204 | uint word2 = OPER_I_16();\r |
3205 | uint64 divisor = OPER_I_32();\r |
3206 | uint64 dividend = 0;\r |
3207 | uint64 quotient = 0;\r |
3208 | uint64 remainder = 0;\r |
3209 | \r |
3210 | if(divisor != 0)\r |
3211 | {\r |
3212 | if(BIT_A(word2)) /* 64 bit */\r |
3213 | {\r |
3214 | dividend = REG_D[word2 & 7];\r |
3215 | dividend <<= 32;\r |
3216 | dividend |= REG_D[(word2 >> 12) & 7];\r |
3217 | \r |
3218 | if(BIT_B(word2)) /* signed */\r |
3219 | {\r |
3220 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));\r |
3221 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));\r |
3222 | if((sint64)quotient != (sint64)((sint32)quotient))\r |
3223 | {\r |
3224 | FLAG_V = VFLAG_SET;\r |
3225 | return;\r |
3226 | }\r |
3227 | }\r |
3228 | else /* unsigned */\r |
3229 | {\r |
3230 | quotient = dividend / divisor;\r |
3231 | if(quotient > 0xffffffff)\r |
3232 | {\r |
3233 | FLAG_V = VFLAG_SET;\r |
3234 | return;\r |
3235 | }\r |
3236 | remainder = dividend % divisor;\r |
3237 | }\r |
3238 | }\r |
3239 | else /* 32 bit */\r |
3240 | {\r |
3241 | dividend = REG_D[(word2 >> 12) & 7];\r |
3242 | if(BIT_B(word2)) /* signed */\r |
3243 | {\r |
3244 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));\r |
3245 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));\r |
3246 | }\r |
3247 | else /* unsigned */\r |
3248 | {\r |
3249 | quotient = dividend / divisor;\r |
3250 | remainder = dividend % divisor;\r |
3251 | }\r |
3252 | }\r |
3253 | \r |
3254 | REG_D[word2 & 7] = remainder;\r |
3255 | REG_D[(word2 >> 12) & 7] = quotient;\r |
3256 | \r |
3257 | FLAG_N = NFLAG_32(quotient);\r |
3258 | FLAG_Z = quotient;\r |
3259 | FLAG_V = VFLAG_CLEAR;\r |
3260 | FLAG_C = CFLAG_CLEAR;\r |
3261 | return;\r |
3262 | }\r |
3263 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
3264 | return;\r |
3265 | }\r |
3266 | m68ki_exception_illegal();\r |
3267 | \r |
3268 | #else\r |
3269 | \r |
3270 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
3271 | {\r |
3272 | uint word2 = OPER_I_16();\r |
3273 | uint divisor = OPER_I_32();\r |
3274 | uint dividend_hi = REG_D[word2 & 7];\r |
3275 | uint dividend_lo = REG_D[(word2 >> 12) & 7];\r |
3276 | uint quotient = 0;\r |
3277 | uint remainder = 0;\r |
3278 | uint dividend_neg = 0;\r |
3279 | uint divisor_neg = 0;\r |
3280 | sint i;\r |
3281 | uint overflow;\r |
3282 | \r |
3283 | if(divisor != 0)\r |
3284 | {\r |
3285 | /* quad / long : long quotient, long remainder */\r |
3286 | if(BIT_A(word2))\r |
3287 | {\r |
3288 | if(BIT_B(word2)) /* signed */\r |
3289 | {\r |
3290 | /* special case in signed divide */\r |
3291 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
3292 | {\r |
3293 | REG_D[word2 & 7] = 0;\r |
3294 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
3295 | \r |
3296 | FLAG_N = NFLAG_SET;\r |
3297 | FLAG_Z = ZFLAG_CLEAR;\r |
3298 | FLAG_V = VFLAG_CLEAR;\r |
3299 | FLAG_C = CFLAG_CLEAR;\r |
3300 | return;\r |
3301 | }\r |
3302 | if(GET_MSB_32(dividend_hi))\r |
3303 | {\r |
3304 | dividend_neg = 1;\r |
3305 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));\r |
3306 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);\r |
3307 | }\r |
3308 | if(GET_MSB_32(divisor))\r |
3309 | {\r |
3310 | divisor_neg = 1;\r |
3311 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);\r |
3312 | \r |
3313 | }\r |
3314 | }\r |
3315 | \r |
3316 | /* if the upper long is greater than the divisor, we're overflowing. */\r |
3317 | if(dividend_hi >= divisor)\r |
3318 | {\r |
3319 | FLAG_V = VFLAG_SET;\r |
3320 | return;\r |
3321 | }\r |
3322 | \r |
3323 | for(i = 31; i >= 0; i--)\r |
3324 | {\r |
3325 | quotient <<= 1;\r |
3326 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);\r |
3327 | if(remainder >= divisor)\r |
3328 | {\r |
3329 | remainder -= divisor;\r |
3330 | quotient++;\r |
3331 | }\r |
3332 | }\r |
3333 | for(i = 31; i >= 0; i--)\r |
3334 | {\r |
3335 | quotient <<= 1;\r |
3336 | overflow = GET_MSB_32(remainder);\r |
3337 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);\r |
3338 | if(remainder >= divisor || overflow)\r |
3339 | {\r |
3340 | remainder -= divisor;\r |
3341 | quotient++;\r |
3342 | }\r |
3343 | }\r |
3344 | \r |
3345 | if(BIT_B(word2)) /* signed */\r |
3346 | {\r |
3347 | if(quotient > 0x7fffffff)\r |
3348 | {\r |
3349 | FLAG_V = VFLAG_SET;\r |
3350 | return;\r |
3351 | }\r |
3352 | if(dividend_neg)\r |
3353 | {\r |
3354 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);\r |
3355 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
3356 | }\r |
3357 | if(divisor_neg)\r |
3358 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);\r |
3359 | }\r |
3360 | \r |
3361 | REG_D[word2 & 7] = remainder;\r |
3362 | REG_D[(word2 >> 12) & 7] = quotient;\r |
3363 | \r |
3364 | FLAG_N = NFLAG_32(quotient);\r |
3365 | FLAG_Z = quotient;\r |
3366 | FLAG_V = VFLAG_CLEAR;\r |
3367 | FLAG_C = CFLAG_CLEAR;\r |
3368 | return;\r |
3369 | }\r |
3370 | \r |
3371 | /* long / long: long quotient, maybe long remainder */\r |
3372 | if(BIT_B(word2)) /* signed */\r |
3373 | {\r |
3374 | /* Special case in divide */\r |
3375 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)\r |
3376 | {\r |
3377 | FLAG_N = NFLAG_SET;\r |
3378 | FLAG_Z = ZFLAG_CLEAR;\r |
3379 | FLAG_V = VFLAG_CLEAR;\r |
3380 | FLAG_C = CFLAG_CLEAR;\r |
3381 | REG_D[(word2 >> 12) & 7] = 0x80000000;\r |
3382 | REG_D[word2 & 7] = 0;\r |
3383 | return;\r |
3384 | }\r |
3385 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);\r |
3386 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);\r |
3387 | }\r |
3388 | else\r |
3389 | {\r |
3390 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);\r |
3391 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);\r |
3392 | }\r |
3393 | \r |
3394 | FLAG_N = NFLAG_32(quotient);\r |
3395 | FLAG_Z = quotient;\r |
3396 | FLAG_V = VFLAG_CLEAR;\r |
3397 | FLAG_C = CFLAG_CLEAR;\r |
3398 | return;\r |
3399 | }\r |
3400 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);\r |
3401 | return;\r |
3402 | }\r |
3403 | m68ki_exception_illegal();\r |
3404 | \r |
3405 | #endif\r |
3406 | }\r |
3407 | \r |
3408 | \r |
3409 | void m68k_op_eor_8_d(void)\r |
3410 | {\r |
3411 | uint res = MASK_OUT_ABOVE_8(DY ^= MASK_OUT_ABOVE_8(DX));\r |
3412 | \r |
3413 | FLAG_N = NFLAG_8(res);\r |
3414 | FLAG_Z = res;\r |
3415 | FLAG_C = CFLAG_CLEAR;\r |
3416 | FLAG_V = VFLAG_CLEAR;\r |
3417 | }\r |
3418 | \r |
3419 | \r |
3420 | void m68k_op_eor_8_ai(void)\r |
3421 | {\r |
3422 | uint ea = EA_AY_AI_8();\r |
3423 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));\r |
3424 | \r |
3425 | m68ki_write_8(ea, res);\r |
3426 | \r |
3427 | FLAG_N = NFLAG_8(res);\r |
3428 | FLAG_Z = res;\r |
3429 | FLAG_C = CFLAG_CLEAR;\r |
3430 | FLAG_V = VFLAG_CLEAR;\r |
3431 | }\r |
3432 | \r |
3433 | \r |
3434 | void m68k_op_eor_8_pi(void)\r |
3435 | {\r |
3436 | uint ea = EA_AY_PI_8();\r |
3437 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));\r |
3438 | \r |
3439 | m68ki_write_8(ea, res);\r |
3440 | \r |
3441 | FLAG_N = NFLAG_8(res);\r |
3442 | FLAG_Z = res;\r |
3443 | FLAG_C = CFLAG_CLEAR;\r |
3444 | FLAG_V = VFLAG_CLEAR;\r |
3445 | }\r |
3446 | \r |
3447 | \r |
3448 | void m68k_op_eor_8_pi7(void)\r |
3449 | {\r |
3450 | uint ea = EA_A7_PI_8();\r |
3451 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));\r |
3452 | \r |
3453 | m68ki_write_8(ea, res);\r |
3454 | \r |
3455 | FLAG_N = NFLAG_8(res);\r |
3456 | FLAG_Z = res;\r |
3457 | FLAG_C = CFLAG_CLEAR;\r |
3458 | FLAG_V = VFLAG_CLEAR;\r |
3459 | }\r |
3460 | \r |
3461 | \r |
3462 | void m68k_op_eor_8_pd(void)\r |
3463 | {\r |
3464 | uint ea = EA_AY_PD_8();\r |
3465 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));\r |
3466 | \r |
3467 | m68ki_write_8(ea, res);\r |
3468 | \r |
3469 | FLAG_N = NFLAG_8(res);\r |
3470 | FLAG_Z = res;\r |
3471 | FLAG_C = CFLAG_CLEAR;\r |
3472 | FLAG_V = VFLAG_CLEAR;\r |
3473 | }\r |
3474 | \r |
3475 | \r |
3476 | void m68k_op_eor_8_pd7(void)\r |
3477 | {\r |
3478 | uint ea = EA_A7_PD_8();\r |
3479 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));\r |
3480 | \r |
3481 | m68ki_write_8(ea, res);\r |
3482 | \r |
3483 | FLAG_N = NFLAG_8(res);\r |
3484 | FLAG_Z = res;\r |
3485 | FLAG_C = CFLAG_CLEAR;\r |
3486 | FLAG_V = VFLAG_CLEAR;\r |
3487 | }\r |
3488 | \r |
3489 | \r |
3490 | void m68k_op_eor_8_di(void)\r |
3491 | {\r |
3492 | uint ea = EA_AY_DI_8();\r |
3493 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));\r |
3494 | \r |
3495 | m68ki_write_8(ea, res);\r |
3496 | \r |
3497 | FLAG_N = NFLAG_8(res);\r |
3498 | FLAG_Z = res;\r |
3499 | FLAG_C = CFLAG_CLEAR;\r |
3500 | FLAG_V = VFLAG_CLEAR;\r |
3501 | }\r |
3502 | \r |
3503 | \r |
3504 | void m68k_op_eor_8_ix(void)\r |
3505 | {\r |
3506 | uint ea = EA_AY_IX_8();\r |
3507 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));\r |
3508 | \r |
3509 | m68ki_write_8(ea, res);\r |
3510 | \r |
3511 | FLAG_N = NFLAG_8(res);\r |
3512 | FLAG_Z = res;\r |
3513 | FLAG_C = CFLAG_CLEAR;\r |
3514 | FLAG_V = VFLAG_CLEAR;\r |
3515 | }\r |
3516 | \r |
3517 | \r |
3518 | void m68k_op_eor_8_aw(void)\r |
3519 | {\r |
3520 | uint ea = EA_AW_8();\r |
3521 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));\r |
3522 | \r |
3523 | m68ki_write_8(ea, res);\r |
3524 | \r |
3525 | FLAG_N = NFLAG_8(res);\r |
3526 | FLAG_Z = res;\r |
3527 | FLAG_C = CFLAG_CLEAR;\r |
3528 | FLAG_V = VFLAG_CLEAR;\r |
3529 | }\r |
3530 | \r |
3531 | \r |
3532 | void m68k_op_eor_8_al(void)\r |
3533 | {\r |
3534 | uint ea = EA_AL_8();\r |
3535 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));\r |
3536 | \r |
3537 | m68ki_write_8(ea, res);\r |
3538 | \r |
3539 | FLAG_N = NFLAG_8(res);\r |
3540 | FLAG_Z = res;\r |
3541 | FLAG_C = CFLAG_CLEAR;\r |
3542 | FLAG_V = VFLAG_CLEAR;\r |
3543 | }\r |
3544 | \r |
3545 | \r |
3546 | void m68k_op_eor_16_d(void)\r |
3547 | {\r |
3548 | uint res = MASK_OUT_ABOVE_16(DY ^= MASK_OUT_ABOVE_16(DX));\r |
3549 | \r |
3550 | FLAG_N = NFLAG_16(res);\r |
3551 | FLAG_Z = res;\r |
3552 | FLAG_C = CFLAG_CLEAR;\r |
3553 | FLAG_V = VFLAG_CLEAR;\r |
3554 | }\r |
3555 | \r |
3556 | \r |
3557 | void m68k_op_eor_16_ai(void)\r |
3558 | {\r |
3559 | uint ea = EA_AY_AI_16();\r |
3560 | uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));\r |
3561 | \r |
3562 | m68ki_write_16(ea, res);\r |
3563 | \r |
3564 | FLAG_N = NFLAG_16(res);\r |
3565 | FLAG_Z = res;\r |
3566 | FLAG_C = CFLAG_CLEAR;\r |
3567 | FLAG_V = VFLAG_CLEAR;\r |
3568 | }\r |
3569 | \r |
3570 | \r |
3571 | void m68k_op_eor_16_pi(void)\r |
3572 | {\r |
3573 | uint ea = EA_AY_PI_16();\r |
3574 | uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));\r |
3575 | \r |
3576 | m68ki_write_16(ea, res);\r |
3577 | \r |
3578 | FLAG_N = NFLAG_16(res);\r |
3579 | FLAG_Z = res;\r |
3580 | FLAG_C = CFLAG_CLEAR;\r |
3581 | FLAG_V = VFLAG_CLEAR;\r |
3582 | }\r |
3583 | \r |
3584 | \r |
3585 | void m68k_op_eor_16_pd(void)\r |
3586 | {\r |
3587 | uint ea = EA_AY_PD_16();\r |
3588 | uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));\r |
3589 | \r |
3590 | m68ki_write_16(ea, res);\r |
3591 | \r |
3592 | FLAG_N = NFLAG_16(res);\r |
3593 | FLAG_Z = res;\r |
3594 | FLAG_C = CFLAG_CLEAR;\r |
3595 | FLAG_V = VFLAG_CLEAR;\r |
3596 | }\r |
3597 | \r |
3598 | \r |
3599 | void m68k_op_eor_16_di(void)\r |
3600 | {\r |
3601 | uint ea = EA_AY_DI_16();\r |
3602 | uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));\r |
3603 | \r |
3604 | m68ki_write_16(ea, res);\r |
3605 | \r |
3606 | FLAG_N = NFLAG_16(res);\r |
3607 | FLAG_Z = res;\r |
3608 | FLAG_C = CFLAG_CLEAR;\r |
3609 | FLAG_V = VFLAG_CLEAR;\r |
3610 | }\r |
3611 | \r |
3612 | \r |
3613 | void m68k_op_eor_16_ix(void)\r |
3614 | {\r |
3615 | uint ea = EA_AY_IX_16();\r |
3616 | uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));\r |
3617 | \r |
3618 | m68ki_write_16(ea, res);\r |
3619 | \r |
3620 | FLAG_N = NFLAG_16(res);\r |
3621 | FLAG_Z = res;\r |
3622 | FLAG_C = CFLAG_CLEAR;\r |
3623 | FLAG_V = VFLAG_CLEAR;\r |
3624 | }\r |
3625 | \r |
3626 | \r |
3627 | void m68k_op_eor_16_aw(void)\r |
3628 | {\r |
3629 | uint ea = EA_AW_16();\r |
3630 | uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));\r |
3631 | \r |
3632 | m68ki_write_16(ea, res);\r |
3633 | \r |
3634 | FLAG_N = NFLAG_16(res);\r |
3635 | FLAG_Z = res;\r |
3636 | FLAG_C = CFLAG_CLEAR;\r |
3637 | FLAG_V = VFLAG_CLEAR;\r |
3638 | }\r |
3639 | \r |
3640 | \r |
3641 | void m68k_op_eor_16_al(void)\r |
3642 | {\r |
3643 | uint ea = EA_AL_16();\r |
3644 | uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));\r |
3645 | \r |
3646 | m68ki_write_16(ea, res);\r |
3647 | \r |
3648 | FLAG_N = NFLAG_16(res);\r |
3649 | FLAG_Z = res;\r |
3650 | FLAG_C = CFLAG_CLEAR;\r |
3651 | FLAG_V = VFLAG_CLEAR;\r |
3652 | }\r |
3653 | \r |
3654 | \r |
3655 | void m68k_op_eor_32_d(void)\r |
3656 | {\r |
3657 | uint res = DY ^= DX;\r |
3658 | \r |
3659 | FLAG_N = NFLAG_32(res);\r |
3660 | FLAG_Z = res;\r |
3661 | FLAG_C = CFLAG_CLEAR;\r |
3662 | FLAG_V = VFLAG_CLEAR;\r |
3663 | }\r |
3664 | \r |
3665 | \r |
3666 | void m68k_op_eor_32_ai(void)\r |
3667 | {\r |
3668 | uint ea = EA_AY_AI_32();\r |
3669 | uint res = DX ^ m68ki_read_32(ea);\r |
3670 | \r |
3671 | m68ki_write_32(ea, res);\r |
3672 | \r |
3673 | FLAG_N = NFLAG_32(res);\r |
3674 | FLAG_Z = res;\r |
3675 | FLAG_C = CFLAG_CLEAR;\r |
3676 | FLAG_V = VFLAG_CLEAR;\r |
3677 | }\r |
3678 | \r |
3679 | \r |
3680 | void m68k_op_eor_32_pi(void)\r |
3681 | {\r |
3682 | uint ea = EA_AY_PI_32();\r |
3683 | uint res = DX ^ m68ki_read_32(ea);\r |
3684 | \r |
3685 | m68ki_write_32(ea, res);\r |
3686 | \r |
3687 | FLAG_N = NFLAG_32(res);\r |
3688 | FLAG_Z = res;\r |
3689 | FLAG_C = CFLAG_CLEAR;\r |
3690 | FLAG_V = VFLAG_CLEAR;\r |
3691 | }\r |
3692 | \r |
3693 | \r |
3694 | void m68k_op_eor_32_pd(void)\r |
3695 | {\r |
3696 | uint ea = EA_AY_PD_32();\r |
3697 | uint res = DX ^ m68ki_read_32(ea);\r |
3698 | \r |
3699 | m68ki_write_32(ea, res);\r |
3700 | \r |
3701 | FLAG_N = NFLAG_32(res);\r |
3702 | FLAG_Z = res;\r |
3703 | FLAG_C = CFLAG_CLEAR;\r |
3704 | FLAG_V = VFLAG_CLEAR;\r |
3705 | }\r |
3706 | \r |
3707 | \r |
3708 | void m68k_op_eor_32_di(void)\r |
3709 | {\r |
3710 | uint ea = EA_AY_DI_32();\r |
3711 | uint res = DX ^ m68ki_read_32(ea);\r |
3712 | \r |
3713 | m68ki_write_32(ea, res);\r |
3714 | \r |
3715 | FLAG_N = NFLAG_32(res);\r |
3716 | FLAG_Z = res;\r |
3717 | FLAG_C = CFLAG_CLEAR;\r |
3718 | FLAG_V = VFLAG_CLEAR;\r |
3719 | }\r |
3720 | \r |
3721 | \r |
3722 | void m68k_op_eor_32_ix(void)\r |
3723 | {\r |
3724 | uint ea = EA_AY_IX_32();\r |
3725 | uint res = DX ^ m68ki_read_32(ea);\r |
3726 | \r |
3727 | m68ki_write_32(ea, res);\r |
3728 | \r |
3729 | FLAG_N = NFLAG_32(res);\r |
3730 | FLAG_Z = res;\r |
3731 | FLAG_C = CFLAG_CLEAR;\r |
3732 | FLAG_V = VFLAG_CLEAR;\r |
3733 | }\r |
3734 | \r |
3735 | \r |
3736 | void m68k_op_eor_32_aw(void)\r |
3737 | {\r |
3738 | uint ea = EA_AW_32();\r |
3739 | uint res = DX ^ m68ki_read_32(ea);\r |
3740 | \r |
3741 | m68ki_write_32(ea, res);\r |
3742 | \r |
3743 | FLAG_N = NFLAG_32(res);\r |
3744 | FLAG_Z = res;\r |
3745 | FLAG_C = CFLAG_CLEAR;\r |
3746 | FLAG_V = VFLAG_CLEAR;\r |
3747 | }\r |
3748 | \r |
3749 | \r |
3750 | void m68k_op_eor_32_al(void)\r |
3751 | {\r |
3752 | uint ea = EA_AL_32();\r |
3753 | uint res = DX ^ m68ki_read_32(ea);\r |
3754 | \r |
3755 | m68ki_write_32(ea, res);\r |
3756 | \r |
3757 | FLAG_N = NFLAG_32(res);\r |
3758 | FLAG_Z = res;\r |
3759 | FLAG_C = CFLAG_CLEAR;\r |
3760 | FLAG_V = VFLAG_CLEAR;\r |
3761 | }\r |
3762 | \r |
3763 | \r |
3764 | void m68k_op_eori_8_d(void)\r |
3765 | {\r |
3766 | uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8());\r |
3767 | \r |
3768 | FLAG_N = NFLAG_8(res);\r |
3769 | FLAG_Z = res;\r |
3770 | FLAG_C = CFLAG_CLEAR;\r |
3771 | FLAG_V = VFLAG_CLEAR;\r |
3772 | }\r |
3773 | \r |
3774 | \r |
3775 | void m68k_op_eori_8_ai(void)\r |
3776 | {\r |
3777 | uint src = OPER_I_8();\r |
3778 | uint ea = EA_AY_AI_8();\r |
3779 | uint res = src ^ m68ki_read_8(ea);\r |
3780 | \r |
3781 | m68ki_write_8(ea, res);\r |
3782 | \r |
3783 | FLAG_N = NFLAG_8(res);\r |
3784 | FLAG_Z = res;\r |
3785 | FLAG_C = CFLAG_CLEAR;\r |
3786 | FLAG_V = VFLAG_CLEAR;\r |
3787 | }\r |
3788 | \r |
3789 | \r |
3790 | void m68k_op_eori_8_pi(void)\r |
3791 | {\r |
3792 | uint src = OPER_I_8();\r |
3793 | uint ea = EA_AY_PI_8();\r |
3794 | uint res = src ^ m68ki_read_8(ea);\r |
3795 | \r |
3796 | m68ki_write_8(ea, res);\r |
3797 | \r |
3798 | FLAG_N = NFLAG_8(res);\r |
3799 | FLAG_Z = res;\r |
3800 | FLAG_C = CFLAG_CLEAR;\r |
3801 | FLAG_V = VFLAG_CLEAR;\r |
3802 | }\r |
3803 | \r |
3804 | \r |
3805 | void m68k_op_eori_8_pi7(void)\r |
3806 | {\r |
3807 | uint src = OPER_I_8();\r |
3808 | uint ea = EA_A7_PI_8();\r |
3809 | uint res = src ^ m68ki_read_8(ea);\r |
3810 | \r |
3811 | m68ki_write_8(ea, res);\r |
3812 | \r |
3813 | FLAG_N = NFLAG_8(res);\r |
3814 | FLAG_Z = res;\r |
3815 | FLAG_C = CFLAG_CLEAR;\r |
3816 | FLAG_V = VFLAG_CLEAR;\r |
3817 | }\r |
3818 | \r |
3819 | \r |
3820 | void m68k_op_eori_8_pd(void)\r |
3821 | {\r |
3822 | uint src = OPER_I_8();\r |
3823 | uint ea = EA_AY_PD_8();\r |
3824 | uint res = src ^ m68ki_read_8(ea);\r |
3825 | \r |
3826 | m68ki_write_8(ea, res);\r |
3827 | \r |
3828 | FLAG_N = NFLAG_8(res);\r |
3829 | FLAG_Z = res;\r |
3830 | FLAG_C = CFLAG_CLEAR;\r |
3831 | FLAG_V = VFLAG_CLEAR;\r |
3832 | }\r |
3833 | \r |
3834 | \r |
3835 | void m68k_op_eori_8_pd7(void)\r |
3836 | {\r |
3837 | uint src = OPER_I_8();\r |
3838 | uint ea = EA_A7_PD_8();\r |
3839 | uint res = src ^ m68ki_read_8(ea);\r |
3840 | \r |
3841 | m68ki_write_8(ea, res);\r |
3842 | \r |
3843 | FLAG_N = NFLAG_8(res);\r |
3844 | FLAG_Z = res;\r |
3845 | FLAG_C = CFLAG_CLEAR;\r |
3846 | FLAG_V = VFLAG_CLEAR;\r |
3847 | }\r |
3848 | \r |
3849 | \r |
3850 | void m68k_op_eori_8_di(void)\r |
3851 | {\r |
3852 | uint src = OPER_I_8();\r |
3853 | uint ea = EA_AY_DI_8();\r |
3854 | uint res = src ^ m68ki_read_8(ea);\r |
3855 | \r |
3856 | m68ki_write_8(ea, res);\r |
3857 | \r |
3858 | FLAG_N = NFLAG_8(res);\r |
3859 | FLAG_Z = res;\r |
3860 | FLAG_C = CFLAG_CLEAR;\r |
3861 | FLAG_V = VFLAG_CLEAR;\r |
3862 | }\r |
3863 | \r |
3864 | \r |
3865 | void m68k_op_eori_8_ix(void)\r |
3866 | {\r |
3867 | uint src = OPER_I_8();\r |
3868 | uint ea = EA_AY_IX_8();\r |
3869 | uint res = src ^ m68ki_read_8(ea);\r |
3870 | \r |
3871 | m68ki_write_8(ea, res);\r |
3872 | \r |
3873 | FLAG_N = NFLAG_8(res);\r |
3874 | FLAG_Z = res;\r |
3875 | FLAG_C = CFLAG_CLEAR;\r |
3876 | FLAG_V = VFLAG_CLEAR;\r |
3877 | }\r |
3878 | \r |
3879 | \r |
3880 | void m68k_op_eori_8_aw(void)\r |
3881 | {\r |
3882 | uint src = OPER_I_8();\r |
3883 | uint ea = EA_AW_8();\r |
3884 | uint res = src ^ m68ki_read_8(ea);\r |
3885 | \r |
3886 | m68ki_write_8(ea, res);\r |
3887 | \r |
3888 | FLAG_N = NFLAG_8(res);\r |
3889 | FLAG_Z = res;\r |
3890 | FLAG_C = CFLAG_CLEAR;\r |
3891 | FLAG_V = VFLAG_CLEAR;\r |
3892 | }\r |
3893 | \r |
3894 | \r |
3895 | void m68k_op_eori_8_al(void)\r |
3896 | {\r |
3897 | uint src = OPER_I_8();\r |
3898 | uint ea = EA_AL_8();\r |
3899 | uint res = src ^ m68ki_read_8(ea);\r |
3900 | \r |
3901 | m68ki_write_8(ea, res);\r |
3902 | \r |
3903 | FLAG_N = NFLAG_8(res);\r |
3904 | FLAG_Z = res;\r |
3905 | FLAG_C = CFLAG_CLEAR;\r |
3906 | FLAG_V = VFLAG_CLEAR;\r |
3907 | }\r |
3908 | \r |
3909 | \r |
3910 | void m68k_op_eori_16_d(void)\r |
3911 | {\r |
3912 | uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16());\r |
3913 | \r |
3914 | FLAG_N = NFLAG_16(res);\r |
3915 | FLAG_Z = res;\r |
3916 | FLAG_C = CFLAG_CLEAR;\r |
3917 | FLAG_V = VFLAG_CLEAR;\r |
3918 | }\r |
3919 | \r |
3920 | \r |
3921 | void m68k_op_eori_16_ai(void)\r |
3922 | {\r |
3923 | uint src = OPER_I_16();\r |
3924 | uint ea = EA_AY_AI_16();\r |
3925 | uint res = src ^ m68ki_read_16(ea);\r |
3926 | \r |
3927 | m68ki_write_16(ea, res);\r |
3928 | \r |
3929 | FLAG_N = NFLAG_16(res);\r |
3930 | FLAG_Z = res;\r |
3931 | FLAG_C = CFLAG_CLEAR;\r |
3932 | FLAG_V = VFLAG_CLEAR;\r |
3933 | }\r |
3934 | \r |
3935 | \r |
3936 | void m68k_op_eori_16_pi(void)\r |
3937 | {\r |
3938 | uint src = OPER_I_16();\r |
3939 | uint ea = EA_AY_PI_16();\r |
3940 | uint res = src ^ m68ki_read_16(ea);\r |
3941 | \r |
3942 | m68ki_write_16(ea, res);\r |
3943 | \r |
3944 | FLAG_N = NFLAG_16(res);\r |
3945 | FLAG_Z = res;\r |
3946 | FLAG_C = CFLAG_CLEAR;\r |
3947 | FLAG_V = VFLAG_CLEAR;\r |
3948 | }\r |
3949 | \r |
3950 | \r |
3951 | void m68k_op_eori_16_pd(void)\r |
3952 | {\r |
3953 | uint src = OPER_I_16();\r |
3954 | uint ea = EA_AY_PD_16();\r |
3955 | uint res = src ^ m68ki_read_16(ea);\r |
3956 | \r |
3957 | m68ki_write_16(ea, res);\r |
3958 | \r |
3959 | FLAG_N = NFLAG_16(res);\r |
3960 | FLAG_Z = res;\r |
3961 | FLAG_C = CFLAG_CLEAR;\r |
3962 | FLAG_V = VFLAG_CLEAR;\r |
3963 | }\r |
3964 | \r |
3965 | \r |
3966 | void m68k_op_eori_16_di(void)\r |
3967 | {\r |
3968 | uint src = OPER_I_16();\r |
3969 | uint ea = EA_AY_DI_16();\r |
3970 | uint res = src ^ m68ki_read_16(ea);\r |
3971 | \r |
3972 | m68ki_write_16(ea, res);\r |
3973 | \r |
3974 | FLAG_N = NFLAG_16(res);\r |
3975 | FLAG_Z = res;\r |
3976 | FLAG_C = CFLAG_CLEAR;\r |
3977 | FLAG_V = VFLAG_CLEAR;\r |
3978 | }\r |
3979 | \r |
3980 | \r |
3981 | void m68k_op_eori_16_ix(void)\r |
3982 | {\r |
3983 | uint src = OPER_I_16();\r |
3984 | uint ea = EA_AY_IX_16();\r |
3985 | uint res = src ^ m68ki_read_16(ea);\r |
3986 | \r |
3987 | m68ki_write_16(ea, res);\r |
3988 | \r |
3989 | FLAG_N = NFLAG_16(res);\r |
3990 | FLAG_Z = res;\r |
3991 | FLAG_C = CFLAG_CLEAR;\r |
3992 | FLAG_V = VFLAG_CLEAR;\r |
3993 | }\r |
3994 | \r |
3995 | \r |
3996 | void m68k_op_eori_16_aw(void)\r |
3997 | {\r |
3998 | uint src = OPER_I_16();\r |
3999 | uint ea = EA_AW_16();\r |
4000 | uint res = src ^ m68ki_read_16(ea);\r |
4001 | \r |
4002 | m68ki_write_16(ea, res);\r |
4003 | \r |
4004 | FLAG_N = NFLAG_16(res);\r |
4005 | FLAG_Z = res;\r |
4006 | FLAG_C = CFLAG_CLEAR;\r |
4007 | FLAG_V = VFLAG_CLEAR;\r |
4008 | }\r |
4009 | \r |
4010 | \r |
4011 | void m68k_op_eori_16_al(void)\r |
4012 | {\r |
4013 | uint src = OPER_I_16();\r |
4014 | uint ea = EA_AL_16();\r |
4015 | uint res = src ^ m68ki_read_16(ea);\r |
4016 | \r |
4017 | m68ki_write_16(ea, res);\r |
4018 | \r |
4019 | FLAG_N = NFLAG_16(res);\r |
4020 | FLAG_Z = res;\r |
4021 | FLAG_C = CFLAG_CLEAR;\r |
4022 | FLAG_V = VFLAG_CLEAR;\r |
4023 | }\r |
4024 | \r |
4025 | \r |
4026 | void m68k_op_eori_32_d(void)\r |
4027 | {\r |
4028 | uint res = DY ^= OPER_I_32();\r |
4029 | \r |
4030 | FLAG_N = NFLAG_32(res);\r |
4031 | FLAG_Z = res;\r |
4032 | FLAG_C = CFLAG_CLEAR;\r |
4033 | FLAG_V = VFLAG_CLEAR;\r |
4034 | }\r |
4035 | \r |
4036 | \r |
4037 | void m68k_op_eori_32_ai(void)\r |
4038 | {\r |
4039 | uint src = OPER_I_32();\r |
4040 | uint ea = EA_AY_AI_32();\r |
4041 | uint res = src ^ m68ki_read_32(ea);\r |
4042 | \r |
4043 | m68ki_write_32(ea, res);\r |
4044 | \r |
4045 | FLAG_N = NFLAG_32(res);\r |
4046 | FLAG_Z = res;\r |
4047 | FLAG_C = CFLAG_CLEAR;\r |
4048 | FLAG_V = VFLAG_CLEAR;\r |
4049 | }\r |
4050 | \r |
4051 | \r |
4052 | void m68k_op_eori_32_pi(void)\r |
4053 | {\r |
4054 | uint src = OPER_I_32();\r |
4055 | uint ea = EA_AY_PI_32();\r |
4056 | uint res = src ^ m68ki_read_32(ea);\r |
4057 | \r |
4058 | m68ki_write_32(ea, res);\r |
4059 | \r |
4060 | FLAG_N = NFLAG_32(res);\r |
4061 | FLAG_Z = res;\r |
4062 | FLAG_C = CFLAG_CLEAR;\r |
4063 | FLAG_V = VFLAG_CLEAR;\r |
4064 | }\r |
4065 | \r |
4066 | \r |
4067 | void m68k_op_eori_32_pd(void)\r |
4068 | {\r |
4069 | uint src = OPER_I_32();\r |
4070 | uint ea = EA_AY_PD_32();\r |
4071 | uint res = src ^ m68ki_read_32(ea);\r |
4072 | \r |
4073 | m68ki_write_32(ea, res);\r |
4074 | \r |
4075 | FLAG_N = NFLAG_32(res);\r |
4076 | FLAG_Z = res;\r |
4077 | FLAG_C = CFLAG_CLEAR;\r |
4078 | FLAG_V = VFLAG_CLEAR;\r |
4079 | }\r |
4080 | \r |
4081 | \r |
4082 | void m68k_op_eori_32_di(void)\r |
4083 | {\r |
4084 | uint src = OPER_I_32();\r |
4085 | uint ea = EA_AY_DI_32();\r |
4086 | uint res = src ^ m68ki_read_32(ea);\r |
4087 | \r |
4088 | m68ki_write_32(ea, res);\r |
4089 | \r |
4090 | FLAG_N = NFLAG_32(res);\r |
4091 | FLAG_Z = res;\r |
4092 | FLAG_C = CFLAG_CLEAR;\r |
4093 | FLAG_V = VFLAG_CLEAR;\r |
4094 | }\r |
4095 | \r |
4096 | \r |
4097 | void m68k_op_eori_32_ix(void)\r |
4098 | {\r |
4099 | uint src = OPER_I_32();\r |
4100 | uint ea = EA_AY_IX_32();\r |
4101 | uint res = src ^ m68ki_read_32(ea);\r |
4102 | \r |
4103 | m68ki_write_32(ea, res);\r |
4104 | \r |
4105 | FLAG_N = NFLAG_32(res);\r |
4106 | FLAG_Z = res;\r |
4107 | FLAG_C = CFLAG_CLEAR;\r |
4108 | FLAG_V = VFLAG_CLEAR;\r |
4109 | }\r |
4110 | \r |
4111 | \r |
4112 | void m68k_op_eori_32_aw(void)\r |
4113 | {\r |
4114 | uint src = OPER_I_32();\r |
4115 | uint ea = EA_AW_32();\r |
4116 | uint res = src ^ m68ki_read_32(ea);\r |
4117 | \r |
4118 | m68ki_write_32(ea, res);\r |
4119 | \r |
4120 | FLAG_N = NFLAG_32(res);\r |
4121 | FLAG_Z = res;\r |
4122 | FLAG_C = CFLAG_CLEAR;\r |
4123 | FLAG_V = VFLAG_CLEAR;\r |
4124 | }\r |
4125 | \r |
4126 | \r |
4127 | void m68k_op_eori_32_al(void)\r |
4128 | {\r |
4129 | uint src = OPER_I_32();\r |
4130 | uint ea = EA_AL_32();\r |
4131 | uint res = src ^ m68ki_read_32(ea);\r |
4132 | \r |
4133 | m68ki_write_32(ea, res);\r |
4134 | \r |
4135 | FLAG_N = NFLAG_32(res);\r |
4136 | FLAG_Z = res;\r |
4137 | FLAG_C = CFLAG_CLEAR;\r |
4138 | FLAG_V = VFLAG_CLEAR;\r |
4139 | }\r |
4140 | \r |
4141 | \r |
4142 | void m68k_op_eori_16_toc(void)\r |
4143 | {\r |
4144 | m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16());\r |
4145 | }\r |
4146 | \r |
4147 | \r |
4148 | void m68k_op_eori_16_tos(void)\r |
4149 | {\r |
4150 | if(FLAG_S)\r |
4151 | {\r |
4152 | uint src = OPER_I_16();\r |
4153 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4154 | m68ki_set_sr(m68ki_get_sr() ^ src);\r |
4155 | return;\r |
4156 | }\r |
4157 | m68ki_exception_privilege_violation();\r |
4158 | }\r |
4159 | \r |
4160 | \r |
4161 | void m68k_op_exg_32_dd(void)\r |
4162 | {\r |
4163 | uint* reg_a = &DX;\r |
4164 | uint* reg_b = &DY;\r |
4165 | uint tmp = *reg_a;\r |
4166 | *reg_a = *reg_b;\r |
4167 | *reg_b = tmp;\r |
4168 | }\r |
4169 | \r |
4170 | \r |
4171 | void m68k_op_exg_32_aa(void)\r |
4172 | {\r |
4173 | uint* reg_a = &AX;\r |
4174 | uint* reg_b = &AY;\r |
4175 | uint tmp = *reg_a;\r |
4176 | *reg_a = *reg_b;\r |
4177 | *reg_b = tmp;\r |
4178 | }\r |
4179 | \r |
4180 | \r |
4181 | void m68k_op_exg_32_da(void)\r |
4182 | {\r |
4183 | uint* reg_a = &DX;\r |
4184 | uint* reg_b = &AY;\r |
4185 | uint tmp = *reg_a;\r |
4186 | *reg_a = *reg_b;\r |
4187 | *reg_b = tmp;\r |
4188 | }\r |
4189 | \r |
4190 | \r |
4191 | void m68k_op_ext_16(void)\r |
4192 | {\r |
4193 | uint* r_dst = &DY;\r |
4194 | \r |
4195 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0);\r |
4196 | \r |
4197 | FLAG_N = NFLAG_16(*r_dst);\r |
4198 | FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);\r |
4199 | FLAG_V = VFLAG_CLEAR;\r |
4200 | FLAG_C = CFLAG_CLEAR;\r |
4201 | }\r |
4202 | \r |
4203 | \r |
4204 | void m68k_op_ext_32(void)\r |
4205 | {\r |
4206 | uint* r_dst = &DY;\r |
4207 | \r |
4208 | *r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0);\r |
4209 | \r |
4210 | FLAG_N = NFLAG_32(*r_dst);\r |
4211 | FLAG_Z = *r_dst;\r |
4212 | FLAG_V = VFLAG_CLEAR;\r |
4213 | FLAG_C = CFLAG_CLEAR;\r |
4214 | }\r |
4215 | \r |
4216 | \r |
4217 | void m68k_op_extb_32(void)\r |
4218 | {\r |
4219 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4220 | {\r |
4221 | uint* r_dst = &DY;\r |
4222 | \r |
4223 | *r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0);\r |
4224 | \r |
4225 | FLAG_N = NFLAG_32(*r_dst);\r |
4226 | FLAG_Z = *r_dst;\r |
4227 | FLAG_V = VFLAG_CLEAR;\r |
4228 | FLAG_C = CFLAG_CLEAR;\r |
4229 | return;\r |
4230 | }\r |
4231 | m68ki_exception_illegal();\r |
4232 | }\r |
4233 | \r |
4234 | \r |
4235 | void m68k_op_illegal(void)\r |
4236 | {\r |
4237 | m68ki_exception_illegal();\r |
4238 | }\r |
4239 | \r |
4240 | \r |
4241 | void m68k_op_jmp_32_ai(void)\r |
4242 | {\r |
4243 | m68ki_jump(EA_AY_AI_32());\r |
4244 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4245 | if(REG_PC == REG_PPC)\r |
4246 | USE_ALL_CYCLES();\r |
4247 | }\r |
4248 | \r |
4249 | \r |
4250 | void m68k_op_jmp_32_di(void)\r |
4251 | {\r |
4252 | m68ki_jump(EA_AY_DI_32());\r |
4253 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4254 | if(REG_PC == REG_PPC)\r |
4255 | USE_ALL_CYCLES();\r |
4256 | }\r |
4257 | \r |
4258 | \r |
4259 | void m68k_op_jmp_32_ix(void)\r |
4260 | {\r |
4261 | m68ki_jump(EA_AY_IX_32());\r |
4262 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4263 | if(REG_PC == REG_PPC)\r |
4264 | USE_ALL_CYCLES();\r |
4265 | }\r |
4266 | \r |
4267 | \r |
4268 | void m68k_op_jmp_32_aw(void)\r |
4269 | {\r |
4270 | m68ki_jump(EA_AW_32());\r |
4271 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4272 | if(REG_PC == REG_PPC)\r |
4273 | USE_ALL_CYCLES();\r |
4274 | }\r |
4275 | \r |
4276 | \r |
4277 | void m68k_op_jmp_32_al(void)\r |
4278 | {\r |
4279 | m68ki_jump(EA_AL_32());\r |
4280 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4281 | if(REG_PC == REG_PPC)\r |
4282 | USE_ALL_CYCLES();\r |
4283 | }\r |
4284 | \r |
4285 | \r |
4286 | void m68k_op_jmp_32_pcdi(void)\r |
4287 | {\r |
4288 | m68ki_jump(EA_PCDI_32());\r |
4289 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4290 | if(REG_PC == REG_PPC)\r |
4291 | USE_ALL_CYCLES();\r |
4292 | }\r |
4293 | \r |
4294 | \r |
4295 | void m68k_op_jmp_32_pcix(void)\r |
4296 | {\r |
4297 | m68ki_jump(EA_PCIX_32());\r |
4298 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4299 | if(REG_PC == REG_PPC)\r |
4300 | USE_ALL_CYCLES();\r |
4301 | }\r |
4302 | \r |
4303 | \r |
4304 | void m68k_op_jsr_32_ai(void)\r |
4305 | {\r |
4306 | uint ea = EA_AY_AI_32();\r |
4307 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4308 | m68ki_push_32(MAKE_INT_24(REG_PC)); // notaz: Cyclone can't handle 32bit PC and I neet to debug it\r |
4309 | m68ki_jump(ea);\r |
4310 | }\r |
4311 | \r |
4312 | \r |
4313 | void m68k_op_jsr_32_di(void)\r |
4314 | {\r |
4315 | uint ea = EA_AY_DI_32();\r |
4316 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4317 | m68ki_push_32(MAKE_INT_24(REG_PC)); // notaz: Cyclone can't handle 32bit PC and I neet to debug it\r |
4318 | m68ki_jump(ea);\r |
4319 | }\r |
4320 | \r |
4321 | \r |
4322 | void m68k_op_jsr_32_ix(void)\r |
4323 | {\r |
4324 | uint ea = EA_AY_IX_32();\r |
4325 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4326 | m68ki_push_32(MAKE_INT_24(REG_PC)); // notaz: Cyclone can't handle 32bit PC and I neet to debug it\r |
4327 | m68ki_jump(ea);\r |
4328 | }\r |
4329 | \r |
4330 | \r |
4331 | void m68k_op_jsr_32_aw(void)\r |
4332 | {\r |
4333 | uint ea = EA_AW_32();\r |
4334 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4335 | m68ki_push_32(MAKE_INT_24(REG_PC)); // notaz: Cyclone can't handle 32bit PC and I neet to debug it\r |
4336 | m68ki_jump(ea);\r |
4337 | }\r |
4338 | \r |
4339 | \r |
4340 | void m68k_op_jsr_32_al(void)\r |
4341 | {\r |
4342 | uint ea = EA_AL_32();\r |
4343 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4344 | m68ki_push_32(MAKE_INT_24(REG_PC)); // notaz: Cyclone can't handle 32bit PC and I neet to debug it\r |
4345 | m68ki_jump(ea);\r |
4346 | }\r |
4347 | \r |
4348 | \r |
4349 | void m68k_op_jsr_32_pcdi(void)\r |
4350 | {\r |
4351 | uint ea = EA_PCDI_32();\r |
4352 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4353 | m68ki_push_32(MAKE_INT_24(REG_PC)); // notaz: Cyclone can't handle 32bit PC and I neet to debug it\r |
4354 | m68ki_jump(ea);\r |
4355 | }\r |
4356 | \r |
4357 | \r |
4358 | void m68k_op_jsr_32_pcix(void)\r |
4359 | {\r |
4360 | uint ea = EA_PCIX_32();\r |
4361 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4362 | m68ki_push_32(MAKE_INT_24(REG_PC)); // notaz: Cyclone can't handle 32bit PC and I neet to debug it\r |
4363 | m68ki_jump(ea);\r |
4364 | }\r |
4365 | \r |
4366 | \r |
4367 | void m68k_op_lea_32_ai(void)\r |
4368 | {\r |
4369 | AX = EA_AY_AI_32();\r |
4370 | }\r |
4371 | \r |
4372 | \r |
4373 | void m68k_op_lea_32_di(void)\r |
4374 | {\r |
4375 | AX = EA_AY_DI_32();\r |
4376 | }\r |
4377 | \r |
4378 | \r |
4379 | void m68k_op_lea_32_ix(void)\r |
4380 | {\r |
4381 | AX = EA_AY_IX_32();\r |
4382 | }\r |
4383 | \r |
4384 | \r |
4385 | void m68k_op_lea_32_aw(void)\r |
4386 | {\r |
4387 | AX = EA_AW_32();\r |
4388 | }\r |
4389 | \r |
4390 | \r |
4391 | void m68k_op_lea_32_al(void)\r |
4392 | {\r |
4393 | AX = EA_AL_32();\r |
4394 | }\r |
4395 | \r |
4396 | \r |
4397 | void m68k_op_lea_32_pcdi(void)\r |
4398 | {\r |
4399 | AX = EA_PCDI_32();\r |
4400 | }\r |
4401 | \r |
4402 | \r |
4403 | void m68k_op_lea_32_pcix(void)\r |
4404 | {\r |
4405 | AX = EA_PCIX_32();\r |
4406 | }\r |
4407 | \r |
4408 | \r |
4409 | void m68k_op_link_16_a7(void)\r |
4410 | {\r |
4411 | REG_A[7] -= 4;\r |
4412 | m68ki_write_32(REG_A[7], REG_A[7]);\r |
4413 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));\r |
4414 | }\r |
4415 | \r |
4416 | \r |
4417 | void m68k_op_link_16(void)\r |
4418 | {\r |
4419 | uint* r_dst = &AY;\r |
4420 | \r |
4421 | m68ki_push_32(*r_dst);\r |
4422 | *r_dst = REG_A[7];\r |
4423 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));\r |
4424 | }\r |
4425 | \r |
4426 | \r |
4427 | void m68k_op_link_32_a7(void)\r |
4428 | {\r |
4429 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4430 | {\r |
4431 | REG_A[7] -= 4;\r |
4432 | m68ki_write_32(REG_A[7], REG_A[7]);\r |
4433 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());\r |
4434 | return;\r |
4435 | }\r |
4436 | m68ki_exception_illegal();\r |
4437 | }\r |
4438 | \r |
4439 | \r |
4440 | void m68k_op_link_32(void)\r |
4441 | {\r |
4442 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
4443 | {\r |
4444 | uint* r_dst = &AY;\r |
4445 | \r |
4446 | m68ki_push_32(*r_dst);\r |
4447 | *r_dst = REG_A[7];\r |
4448 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());\r |
4449 | return;\r |
4450 | }\r |
4451 | m68ki_exception_illegal();\r |
4452 | }\r |
4453 | \r |
4454 | \r |
4455 | void m68k_op_lsr_8_s(void)\r |
4456 | {\r |
4457 | uint* r_dst = &DY;\r |
4458 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
4459 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
4460 | uint res = src >> shift;\r |
4461 | \r |
4462 | if(shift != 0)\r |
4463 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4464 | \r |
4465 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
4466 | \r |
4467 | FLAG_N = NFLAG_CLEAR;\r |
4468 | FLAG_Z = res;\r |
4469 | FLAG_X = FLAG_C = src << (9-shift);\r |
4470 | FLAG_V = VFLAG_CLEAR;\r |
4471 | }\r |
4472 | \r |
4473 | \r |
4474 | void m68k_op_lsr_16_s(void)\r |
4475 | {\r |
4476 | uint* r_dst = &DY;\r |
4477 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
4478 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
4479 | uint res = src >> shift;\r |
4480 | \r |
4481 | if(shift != 0)\r |
4482 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4483 | \r |
4484 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
4485 | \r |
4486 | FLAG_N = NFLAG_CLEAR;\r |
4487 | FLAG_Z = res;\r |
4488 | FLAG_X = FLAG_C = src << (9-shift);\r |
4489 | FLAG_V = VFLAG_CLEAR;\r |
4490 | }\r |
4491 | \r |
4492 | \r |
4493 | void m68k_op_lsr_32_s(void)\r |
4494 | {\r |
4495 | uint* r_dst = &DY;\r |
4496 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
4497 | uint src = *r_dst;\r |
4498 | uint res = src >> shift;\r |
4499 | \r |
4500 | if(shift != 0)\r |
4501 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4502 | \r |
4503 | *r_dst = res;\r |
4504 | \r |
4505 | FLAG_N = NFLAG_CLEAR;\r |
4506 | FLAG_Z = res;\r |
4507 | FLAG_X = FLAG_C = src << (9-shift);\r |
4508 | FLAG_V = VFLAG_CLEAR;\r |
4509 | }\r |
4510 | \r |
4511 | \r |
4512 | void m68k_op_lsr_8_r(void)\r |
4513 | {\r |
4514 | uint* r_dst = &DY;\r |
4515 | uint shift = DX & 0x3f;\r |
4516 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
4517 | uint res = src >> shift;\r |
4518 | \r |
4519 | if(shift != 0)\r |
4520 | {\r |
4521 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4522 | \r |
4523 | if(shift <= 8)\r |
4524 | {\r |
4525 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
4526 | FLAG_X = FLAG_C = src << (9-shift);\r |
4527 | FLAG_N = NFLAG_CLEAR;\r |
4528 | FLAG_Z = res;\r |
4529 | FLAG_V = VFLAG_CLEAR;\r |
4530 | return;\r |
4531 | }\r |
4532 | \r |
4533 | *r_dst &= 0xffffff00;\r |
4534 | FLAG_X = XFLAG_CLEAR;\r |
4535 | FLAG_C = CFLAG_CLEAR;\r |
4536 | FLAG_N = NFLAG_CLEAR;\r |
4537 | FLAG_Z = ZFLAG_SET;\r |
4538 | FLAG_V = VFLAG_CLEAR;\r |
4539 | return;\r |
4540 | }\r |
4541 | \r |
4542 | FLAG_C = CFLAG_CLEAR;\r |
4543 | FLAG_N = NFLAG_8(src);\r |
4544 | FLAG_Z = src;\r |
4545 | FLAG_V = VFLAG_CLEAR;\r |
4546 | }\r |
4547 | \r |
4548 | \r |
4549 | void m68k_op_lsr_16_r(void)\r |
4550 | {\r |
4551 | uint* r_dst = &DY;\r |
4552 | uint shift = DX & 0x3f;\r |
4553 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
4554 | uint res = src >> shift;\r |
4555 | \r |
4556 | if(shift != 0)\r |
4557 | {\r |
4558 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4559 | \r |
4560 | if(shift <= 16)\r |
4561 | {\r |
4562 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
4563 | FLAG_C = FLAG_X = (src >> (shift - 1))<<8;\r |
4564 | FLAG_N = NFLAG_CLEAR;\r |
4565 | FLAG_Z = res;\r |
4566 | FLAG_V = VFLAG_CLEAR;\r |
4567 | return;\r |
4568 | }\r |
4569 | \r |
4570 | *r_dst &= 0xffff0000;\r |
4571 | FLAG_X = XFLAG_CLEAR;\r |
4572 | FLAG_C = CFLAG_CLEAR;\r |
4573 | FLAG_N = NFLAG_CLEAR;\r |
4574 | FLAG_Z = ZFLAG_SET;\r |
4575 | FLAG_V = VFLAG_CLEAR;\r |
4576 | return;\r |
4577 | }\r |
4578 | \r |
4579 | FLAG_C = CFLAG_CLEAR;\r |
4580 | FLAG_N = NFLAG_16(src);\r |
4581 | FLAG_Z = src;\r |
4582 | FLAG_V = VFLAG_CLEAR;\r |
4583 | }\r |
4584 | \r |
4585 | \r |
4586 | void m68k_op_lsr_32_r(void)\r |
4587 | {\r |
4588 | uint* r_dst = &DY;\r |
4589 | uint shift = DX & 0x3f;\r |
4590 | uint src = *r_dst;\r |
4591 | uint res = src >> shift;\r |
4592 | \r |
4593 | if(shift != 0)\r |
4594 | {\r |
4595 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4596 | \r |
4597 | if(shift < 32)\r |
4598 | {\r |
4599 | *r_dst = res;\r |
4600 | FLAG_C = FLAG_X = (src >> (shift - 1))<<8;\r |
4601 | FLAG_N = NFLAG_CLEAR;\r |
4602 | FLAG_Z = res;\r |
4603 | FLAG_V = VFLAG_CLEAR;\r |
4604 | return;\r |
4605 | }\r |
4606 | \r |
4607 | *r_dst = 0;\r |
4608 | FLAG_X = FLAG_C = (shift == 32 ? GET_MSB_32(src)>>23 : 0);\r |
4609 | FLAG_N = NFLAG_CLEAR;\r |
4610 | FLAG_Z = ZFLAG_SET;\r |
4611 | FLAG_V = VFLAG_CLEAR;\r |
4612 | return;\r |
4613 | }\r |
4614 | \r |
4615 | FLAG_C = CFLAG_CLEAR;\r |
4616 | FLAG_N = NFLAG_32(src);\r |
4617 | FLAG_Z = src;\r |
4618 | FLAG_V = VFLAG_CLEAR;\r |
4619 | }\r |
4620 | \r |
4621 | \r |
4622 | void m68k_op_lsr_16_ai(void)\r |
4623 | {\r |
4624 | uint ea = EA_AY_AI_16();\r |
4625 | uint src = m68ki_read_16(ea);\r |
4626 | uint res = src >> 1;\r |
4627 | \r |
4628 | m68ki_write_16(ea, res);\r |
4629 | \r |
4630 | FLAG_N = NFLAG_CLEAR;\r |
4631 | FLAG_Z = res;\r |
4632 | FLAG_C = FLAG_X = src << 8;\r |
4633 | FLAG_V = VFLAG_CLEAR;\r |
4634 | }\r |
4635 | \r |
4636 | \r |
4637 | void m68k_op_lsr_16_pi(void)\r |
4638 | {\r |
4639 | uint ea = EA_AY_PI_16();\r |
4640 | uint src = m68ki_read_16(ea);\r |
4641 | uint res = src >> 1;\r |
4642 | \r |
4643 | m68ki_write_16(ea, res);\r |
4644 | \r |
4645 | FLAG_N = NFLAG_CLEAR;\r |
4646 | FLAG_Z = res;\r |
4647 | FLAG_C = FLAG_X = src << 8;\r |
4648 | FLAG_V = VFLAG_CLEAR;\r |
4649 | }\r |
4650 | \r |
4651 | \r |
4652 | void m68k_op_lsr_16_pd(void)\r |
4653 | {\r |
4654 | uint ea = EA_AY_PD_16();\r |
4655 | uint src = m68ki_read_16(ea);\r |
4656 | uint res = src >> 1;\r |
4657 | \r |
4658 | m68ki_write_16(ea, res);\r |
4659 | \r |
4660 | FLAG_N = NFLAG_CLEAR;\r |
4661 | FLAG_Z = res;\r |
4662 | FLAG_C = FLAG_X = src << 8;\r |
4663 | FLAG_V = VFLAG_CLEAR;\r |
4664 | }\r |
4665 | \r |
4666 | \r |
4667 | void m68k_op_lsr_16_di(void)\r |
4668 | {\r |
4669 | uint ea = EA_AY_DI_16();\r |
4670 | uint src = m68ki_read_16(ea);\r |
4671 | uint res = src >> 1;\r |
4672 | \r |
4673 | m68ki_write_16(ea, res);\r |
4674 | \r |
4675 | FLAG_N = NFLAG_CLEAR;\r |
4676 | FLAG_Z = res;\r |
4677 | FLAG_C = FLAG_X = src << 8;\r |
4678 | FLAG_V = VFLAG_CLEAR;\r |
4679 | }\r |
4680 | \r |
4681 | \r |
4682 | void m68k_op_lsr_16_ix(void)\r |
4683 | {\r |
4684 | uint ea = EA_AY_IX_16();\r |
4685 | uint src = m68ki_read_16(ea);\r |
4686 | uint res = src >> 1;\r |
4687 | \r |
4688 | m68ki_write_16(ea, res);\r |
4689 | \r |
4690 | FLAG_N = NFLAG_CLEAR;\r |
4691 | FLAG_Z = res;\r |
4692 | FLAG_C = FLAG_X = src << 8;\r |
4693 | FLAG_V = VFLAG_CLEAR;\r |
4694 | }\r |
4695 | \r |
4696 | \r |
4697 | void m68k_op_lsr_16_aw(void)\r |
4698 | {\r |
4699 | uint ea = EA_AW_16();\r |
4700 | uint src = m68ki_read_16(ea);\r |
4701 | uint res = src >> 1;\r |
4702 | \r |
4703 | m68ki_write_16(ea, res);\r |
4704 | \r |
4705 | FLAG_N = NFLAG_CLEAR;\r |
4706 | FLAG_Z = res;\r |
4707 | FLAG_C = FLAG_X = src << 8;\r |
4708 | FLAG_V = VFLAG_CLEAR;\r |
4709 | }\r |
4710 | \r |
4711 | \r |
4712 | void m68k_op_lsr_16_al(void)\r |
4713 | {\r |
4714 | uint ea = EA_AL_16();\r |
4715 | uint src = m68ki_read_16(ea);\r |
4716 | uint res = src >> 1;\r |
4717 | \r |
4718 | m68ki_write_16(ea, res);\r |
4719 | \r |
4720 | FLAG_N = NFLAG_CLEAR;\r |
4721 | FLAG_Z = res;\r |
4722 | FLAG_C = FLAG_X = src << 8;\r |
4723 | FLAG_V = VFLAG_CLEAR;\r |
4724 | }\r |
4725 | \r |
4726 | \r |
4727 | void m68k_op_lsl_8_s(void)\r |
4728 | {\r |
4729 | uint* r_dst = &DY;\r |
4730 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
4731 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
4732 | uint res = MASK_OUT_ABOVE_8(src << shift);\r |
4733 | \r |
4734 | if(shift != 0)\r |
4735 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4736 | \r |
4737 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
4738 | \r |
4739 | FLAG_N = NFLAG_8(res);\r |
4740 | FLAG_Z = res;\r |
4741 | FLAG_X = FLAG_C = src << shift;\r |
4742 | FLAG_V = VFLAG_CLEAR;\r |
4743 | }\r |
4744 | \r |
4745 | \r |
4746 | void m68k_op_lsl_16_s(void)\r |
4747 | {\r |
4748 | uint* r_dst = &DY;\r |
4749 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
4750 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
4751 | uint res = MASK_OUT_ABOVE_16(src << shift);\r |
4752 | \r |
4753 | if(shift != 0)\r |
4754 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4755 | \r |
4756 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
4757 | \r |
4758 | FLAG_N = NFLAG_16(res);\r |
4759 | FLAG_Z = res;\r |
4760 | FLAG_X = FLAG_C = src >> (8-shift);\r |
4761 | FLAG_V = VFLAG_CLEAR;\r |
4762 | }\r |
4763 | \r |
4764 | \r |
4765 | void m68k_op_lsl_32_s(void)\r |
4766 | {\r |
4767 | uint* r_dst = &DY;\r |
4768 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
4769 | uint src = *r_dst;\r |
4770 | uint res = MASK_OUT_ABOVE_32(src << shift);\r |
4771 | \r |
4772 | if(shift != 0)\r |
4773 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4774 | \r |
4775 | *r_dst = res;\r |
4776 | \r |
4777 | FLAG_N = NFLAG_32(res);\r |
4778 | FLAG_Z = res;\r |
4779 | FLAG_X = FLAG_C = src >> (24-shift);\r |
4780 | FLAG_V = VFLAG_CLEAR;\r |
4781 | }\r |
4782 | \r |
4783 | \r |
4784 | void m68k_op_lsl_8_r(void)\r |
4785 | {\r |
4786 | uint* r_dst = &DY;\r |
4787 | uint shift = DX & 0x3f;\r |
4788 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
4789 | uint res = MASK_OUT_ABOVE_8(src << shift);\r |
4790 | \r |
4791 | if(shift != 0)\r |
4792 | {\r |
4793 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4794 | \r |
4795 | if(shift <= 8)\r |
4796 | {\r |
4797 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
4798 | FLAG_X = FLAG_C = src << shift;\r |
4799 | FLAG_N = NFLAG_8(res);\r |
4800 | FLAG_Z = res;\r |
4801 | FLAG_V = VFLAG_CLEAR;\r |
4802 | return;\r |
4803 | }\r |
4804 | \r |
4805 | *r_dst &= 0xffffff00;\r |
4806 | FLAG_X = XFLAG_CLEAR;\r |
4807 | FLAG_C = CFLAG_CLEAR;\r |
4808 | FLAG_N = NFLAG_CLEAR;\r |
4809 | FLAG_Z = ZFLAG_SET;\r |
4810 | FLAG_V = VFLAG_CLEAR;\r |
4811 | return;\r |
4812 | }\r |
4813 | \r |
4814 | FLAG_C = CFLAG_CLEAR;\r |
4815 | FLAG_N = NFLAG_8(src);\r |
4816 | FLAG_Z = src;\r |
4817 | FLAG_V = VFLAG_CLEAR;\r |
4818 | }\r |
4819 | \r |
4820 | \r |
4821 | void m68k_op_lsl_16_r(void)\r |
4822 | {\r |
4823 | uint* r_dst = &DY;\r |
4824 | uint shift = DX & 0x3f;\r |
4825 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
4826 | uint res = MASK_OUT_ABOVE_16(src << shift);\r |
4827 | \r |
4828 | if(shift != 0)\r |
4829 | {\r |
4830 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4831 | \r |
4832 | if(shift <= 16)\r |
4833 | {\r |
4834 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
4835 | FLAG_X = FLAG_C = (src << shift) >> 8;\r |
4836 | FLAG_N = NFLAG_16(res);\r |
4837 | FLAG_Z = res;\r |
4838 | FLAG_V = VFLAG_CLEAR;\r |
4839 | return;\r |
4840 | }\r |
4841 | \r |
4842 | *r_dst &= 0xffff0000;\r |
4843 | FLAG_X = XFLAG_CLEAR;\r |
4844 | FLAG_C = CFLAG_CLEAR;\r |
4845 | FLAG_N = NFLAG_CLEAR;\r |
4846 | FLAG_Z = ZFLAG_SET;\r |
4847 | FLAG_V = VFLAG_CLEAR;\r |
4848 | return;\r |
4849 | }\r |
4850 | \r |
4851 | FLAG_C = CFLAG_CLEAR;\r |
4852 | FLAG_N = NFLAG_16(src);\r |
4853 | FLAG_Z = src;\r |
4854 | FLAG_V = VFLAG_CLEAR;\r |
4855 | }\r |
4856 | \r |
4857 | \r |
4858 | void m68k_op_lsl_32_r(void)\r |
4859 | {\r |
4860 | uint* r_dst = &DY;\r |
4861 | uint shift = DX & 0x3f;\r |
4862 | uint src = *r_dst;\r |
4863 | uint res = MASK_OUT_ABOVE_32(src << shift);\r |
4864 | \r |
4865 | if(shift != 0)\r |
4866 | {\r |
4867 | USE_CYCLES(shift<<CYC_SHIFT);\r |
4868 | \r |
4869 | if(shift < 32)\r |
4870 | {\r |
4871 | *r_dst = res;\r |
4872 | FLAG_X = FLAG_C = (src >> (32 - shift)) << 8;\r |
4873 | FLAG_N = NFLAG_32(res);\r |
4874 | FLAG_Z = res;\r |
4875 | FLAG_V = VFLAG_CLEAR;\r |
4876 | return;\r |
4877 | }\r |
4878 | \r |
4879 | *r_dst = 0;\r |
4880 | FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;\r |
4881 | FLAG_N = NFLAG_CLEAR;\r |
4882 | FLAG_Z = ZFLAG_SET;\r |
4883 | FLAG_V = VFLAG_CLEAR;\r |
4884 | return;\r |
4885 | }\r |
4886 | \r |
4887 | FLAG_C = CFLAG_CLEAR;\r |
4888 | FLAG_N = NFLAG_32(src);\r |
4889 | FLAG_Z = src;\r |
4890 | FLAG_V = VFLAG_CLEAR;\r |
4891 | }\r |
4892 | \r |
4893 | \r |
4894 | void m68k_op_lsl_16_ai(void)\r |
4895 | {\r |
4896 | uint ea = EA_AY_AI_16();\r |
4897 | uint src = m68ki_read_16(ea);\r |
4898 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
4899 | \r |
4900 | m68ki_write_16(ea, res);\r |
4901 | \r |
4902 | FLAG_N = NFLAG_16(res);\r |
4903 | FLAG_Z = res;\r |
4904 | FLAG_X = FLAG_C = src >> 7;\r |
4905 | FLAG_V = VFLAG_CLEAR;\r |
4906 | }\r |
4907 | \r |
4908 | \r |
4909 | void m68k_op_lsl_16_pi(void)\r |
4910 | {\r |
4911 | uint ea = EA_AY_PI_16();\r |
4912 | uint src = m68ki_read_16(ea);\r |
4913 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
4914 | \r |
4915 | m68ki_write_16(ea, res);\r |
4916 | \r |
4917 | FLAG_N = NFLAG_16(res);\r |
4918 | FLAG_Z = res;\r |
4919 | FLAG_X = FLAG_C = src >> 7;\r |
4920 | FLAG_V = VFLAG_CLEAR;\r |
4921 | }\r |
4922 | \r |
4923 | \r |
4924 | void m68k_op_lsl_16_pd(void)\r |
4925 | {\r |
4926 | uint ea = EA_AY_PD_16();\r |
4927 | uint src = m68ki_read_16(ea);\r |
4928 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
4929 | \r |
4930 | m68ki_write_16(ea, res);\r |
4931 | \r |
4932 | FLAG_N = NFLAG_16(res);\r |
4933 | FLAG_Z = res;\r |
4934 | FLAG_X = FLAG_C = src >> 7;\r |
4935 | FLAG_V = VFLAG_CLEAR;\r |
4936 | }\r |
4937 | \r |
4938 | \r |
4939 | void m68k_op_lsl_16_di(void)\r |
4940 | {\r |
4941 | uint ea = EA_AY_DI_16();\r |
4942 | uint src = m68ki_read_16(ea);\r |
4943 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
4944 | \r |
4945 | m68ki_write_16(ea, res);\r |
4946 | \r |
4947 | FLAG_N = NFLAG_16(res);\r |
4948 | FLAG_Z = res;\r |
4949 | FLAG_X = FLAG_C = src >> 7;\r |
4950 | FLAG_V = VFLAG_CLEAR;\r |
4951 | }\r |
4952 | \r |
4953 | \r |
4954 | void m68k_op_lsl_16_ix(void)\r |
4955 | {\r |
4956 | uint ea = EA_AY_IX_16();\r |
4957 | uint src = m68ki_read_16(ea);\r |
4958 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
4959 | \r |
4960 | m68ki_write_16(ea, res);\r |
4961 | \r |
4962 | FLAG_N = NFLAG_16(res);\r |
4963 | FLAG_Z = res;\r |
4964 | FLAG_X = FLAG_C = src >> 7;\r |
4965 | FLAG_V = VFLAG_CLEAR;\r |
4966 | }\r |
4967 | \r |
4968 | \r |
4969 | void m68k_op_lsl_16_aw(void)\r |
4970 | {\r |
4971 | uint ea = EA_AW_16();\r |
4972 | uint src = m68ki_read_16(ea);\r |
4973 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
4974 | \r |
4975 | m68ki_write_16(ea, res);\r |
4976 | \r |
4977 | FLAG_N = NFLAG_16(res);\r |
4978 | FLAG_Z = res;\r |
4979 | FLAG_X = FLAG_C = src >> 7;\r |
4980 | FLAG_V = VFLAG_CLEAR;\r |
4981 | }\r |
4982 | \r |
4983 | \r |
4984 | void m68k_op_lsl_16_al(void)\r |
4985 | {\r |
4986 | uint ea = EA_AL_16();\r |
4987 | uint src = m68ki_read_16(ea);\r |
4988 | uint res = MASK_OUT_ABOVE_16(src << 1);\r |
4989 | \r |
4990 | m68ki_write_16(ea, res);\r |
4991 | \r |
4992 | FLAG_N = NFLAG_16(res);\r |
4993 | FLAG_Z = res;\r |
4994 | FLAG_X = FLAG_C = src >> 7;\r |
4995 | FLAG_V = VFLAG_CLEAR;\r |
4996 | }\r |
4997 | \r |
4998 | \r |
4999 | void m68k_op_move_8_d_d(void)\r |
5000 | {\r |
5001 | uint res = MASK_OUT_ABOVE_8(DY);\r |
5002 | uint* r_dst = &DX;\r |
5003 | \r |
5004 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5005 | \r |
5006 | FLAG_N = NFLAG_8(res);\r |
5007 | FLAG_Z = res;\r |
5008 | FLAG_V = VFLAG_CLEAR;\r |
5009 | FLAG_C = CFLAG_CLEAR;\r |
5010 | }\r |
5011 | \r |
5012 | \r |
5013 | void m68k_op_move_8_d_ai(void)\r |
5014 | {\r |
5015 | uint res = OPER_AY_AI_8();\r |
5016 | uint* r_dst = &DX;\r |
5017 | \r |
5018 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5019 | \r |
5020 | FLAG_N = NFLAG_8(res);\r |
5021 | FLAG_Z = res;\r |
5022 | FLAG_V = VFLAG_CLEAR;\r |
5023 | FLAG_C = CFLAG_CLEAR;\r |
5024 | }\r |
5025 | \r |
5026 | \r |
5027 | void m68k_op_move_8_d_pi(void)\r |
5028 | {\r |
5029 | uint res = OPER_AY_PI_8();\r |
5030 | uint* r_dst = &DX;\r |
5031 | \r |
5032 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5033 | \r |
5034 | FLAG_N = NFLAG_8(res);\r |
5035 | FLAG_Z = res;\r |
5036 | FLAG_V = VFLAG_CLEAR;\r |
5037 | FLAG_C = CFLAG_CLEAR;\r |
5038 | }\r |
5039 | \r |
5040 | \r |
5041 | void m68k_op_move_8_d_pi7(void)\r |
5042 | {\r |
5043 | uint res = OPER_A7_PI_8();\r |
5044 | uint* r_dst = &DX;\r |
5045 | \r |
5046 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5047 | \r |
5048 | FLAG_N = NFLAG_8(res);\r |
5049 | FLAG_Z = res;\r |
5050 | FLAG_V = VFLAG_CLEAR;\r |
5051 | FLAG_C = CFLAG_CLEAR;\r |
5052 | }\r |
5053 | \r |
5054 | \r |
5055 | void m68k_op_move_8_d_pd(void)\r |
5056 | {\r |
5057 | uint res = OPER_AY_PD_8();\r |
5058 | uint* r_dst = &DX;\r |
5059 | \r |
5060 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5061 | \r |
5062 | FLAG_N = NFLAG_8(res);\r |
5063 | FLAG_Z = res;\r |
5064 | FLAG_V = VFLAG_CLEAR;\r |
5065 | FLAG_C = CFLAG_CLEAR;\r |
5066 | }\r |
5067 | \r |
5068 | \r |
5069 | void m68k_op_move_8_d_pd7(void)\r |
5070 | {\r |
5071 | uint res = OPER_A7_PD_8();\r |
5072 | uint* r_dst = &DX;\r |
5073 | \r |
5074 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5075 | \r |
5076 | FLAG_N = NFLAG_8(res);\r |
5077 | FLAG_Z = res;\r |
5078 | FLAG_V = VFLAG_CLEAR;\r |
5079 | FLAG_C = CFLAG_CLEAR;\r |
5080 | }\r |
5081 | \r |
5082 | \r |
5083 | void m68k_op_move_8_d_di(void)\r |
5084 | {\r |
5085 | uint res = OPER_AY_DI_8();\r |
5086 | uint* r_dst = &DX;\r |
5087 | \r |
5088 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5089 | \r |
5090 | FLAG_N = NFLAG_8(res);\r |
5091 | FLAG_Z = res;\r |
5092 | FLAG_V = VFLAG_CLEAR;\r |
5093 | FLAG_C = CFLAG_CLEAR;\r |
5094 | }\r |
5095 | \r |
5096 | \r |
5097 | void m68k_op_move_8_d_ix(void)\r |
5098 | {\r |
5099 | uint res = OPER_AY_IX_8();\r |
5100 | uint* r_dst = &DX;\r |
5101 | \r |
5102 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5103 | \r |
5104 | FLAG_N = NFLAG_8(res);\r |
5105 | FLAG_Z = res;\r |
5106 | FLAG_V = VFLAG_CLEAR;\r |
5107 | FLAG_C = CFLAG_CLEAR;\r |
5108 | }\r |
5109 | \r |
5110 | \r |
5111 | void m68k_op_move_8_d_aw(void)\r |
5112 | {\r |
5113 | uint res = OPER_AW_8();\r |
5114 | uint* r_dst = &DX;\r |
5115 | \r |
5116 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5117 | \r |
5118 | FLAG_N = NFLAG_8(res);\r |
5119 | FLAG_Z = res;\r |
5120 | FLAG_V = VFLAG_CLEAR;\r |
5121 | FLAG_C = CFLAG_CLEAR;\r |
5122 | }\r |
5123 | \r |
5124 | \r |
5125 | void m68k_op_move_8_d_al(void)\r |
5126 | {\r |
5127 | uint res = OPER_AL_8();\r |
5128 | uint* r_dst = &DX;\r |
5129 | \r |
5130 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5131 | \r |
5132 | FLAG_N = NFLAG_8(res);\r |
5133 | FLAG_Z = res;\r |
5134 | FLAG_V = VFLAG_CLEAR;\r |
5135 | FLAG_C = CFLAG_CLEAR;\r |
5136 | }\r |
5137 | \r |
5138 | \r |
5139 | void m68k_op_move_8_d_pcdi(void)\r |
5140 | {\r |
5141 | uint res = OPER_PCDI_8();\r |
5142 | uint* r_dst = &DX;\r |
5143 | \r |
5144 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5145 | \r |
5146 | FLAG_N = NFLAG_8(res);\r |
5147 | FLAG_Z = res;\r |
5148 | FLAG_V = VFLAG_CLEAR;\r |
5149 | FLAG_C = CFLAG_CLEAR;\r |
5150 | }\r |
5151 | \r |
5152 | \r |
5153 | void m68k_op_move_8_d_pcix(void)\r |
5154 | {\r |
5155 | uint res = OPER_PCIX_8();\r |
5156 | uint* r_dst = &DX;\r |
5157 | \r |
5158 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5159 | \r |
5160 | FLAG_N = NFLAG_8(res);\r |
5161 | FLAG_Z = res;\r |
5162 | FLAG_V = VFLAG_CLEAR;\r |
5163 | FLAG_C = CFLAG_CLEAR;\r |
5164 | }\r |
5165 | \r |
5166 | \r |
5167 | void m68k_op_move_8_d_i(void)\r |
5168 | {\r |
5169 | uint res = OPER_I_8();\r |
5170 | uint* r_dst = &DX;\r |
5171 | \r |
5172 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
5173 | \r |
5174 | FLAG_N = NFLAG_8(res);\r |
5175 | FLAG_Z = res;\r |
5176 | FLAG_V = VFLAG_CLEAR;\r |
5177 | FLAG_C = CFLAG_CLEAR;\r |
5178 | }\r |
5179 | \r |
5180 | \r |
5181 | void m68k_op_move_8_ai_d(void)\r |
5182 | {\r |
5183 | uint res = MASK_OUT_ABOVE_8(DY);\r |
5184 | uint ea = EA_AX_AI_8();\r |
5185 | \r |
5186 | m68ki_write_8(ea, res);\r |
5187 | \r |
5188 | FLAG_N = NFLAG_8(res);\r |
5189 | FLAG_Z = res;\r |
5190 | FLAG_V = VFLAG_CLEAR;\r |
5191 | FLAG_C = CFLAG_CLEAR;\r |
5192 | }\r |
5193 | \r |
5194 | \r |
5195 | void m68k_op_move_8_ai_ai(void)\r |
5196 | {\r |
5197 | uint res = OPER_AY_AI_8();\r |
5198 | uint ea = EA_AX_AI_8();\r |
5199 | \r |
5200 | m68ki_write_8(ea, res);\r |
5201 | \r |
5202 | FLAG_N = NFLAG_8(res);\r |
5203 | FLAG_Z = res;\r |
5204 | FLAG_V = VFLAG_CLEAR;\r |
5205 | FLAG_C = CFLAG_CLEAR;\r |
5206 | }\r |
5207 | \r |
5208 | \r |
5209 | void m68k_op_move_8_ai_pi(void)\r |
5210 | {\r |
5211 | uint res = OPER_AY_PI_8();\r |
5212 | uint ea = EA_AX_AI_8();\r |
5213 | \r |
5214 | m68ki_write_8(ea, res);\r |
5215 | \r |
5216 | FLAG_N = NFLAG_8(res);\r |
5217 | FLAG_Z = res;\r |
5218 | FLAG_V = VFLAG_CLEAR;\r |
5219 | FLAG_C = CFLAG_CLEAR;\r |
5220 | }\r |
5221 | \r |
5222 | \r |
5223 | void m68k_op_move_8_ai_pi7(void)\r |
5224 | {\r |
5225 | uint res = OPER_A7_PI_8();\r |
5226 | uint ea = EA_AX_AI_8();\r |
5227 | \r |
5228 | m68ki_write_8(ea, res);\r |
5229 | \r |
5230 | FLAG_N = NFLAG_8(res);\r |
5231 | FLAG_Z = res;\r |
5232 | FLAG_V = VFLAG_CLEAR;\r |
5233 | FLAG_C = CFLAG_CLEAR;\r |
5234 | }\r |
5235 | \r |
5236 | \r |
5237 | void m68k_op_move_8_ai_pd(void)\r |
5238 | {\r |
5239 | uint res = OPER_AY_PD_8();\r |
5240 | uint ea = EA_AX_AI_8();\r |
5241 | \r |
5242 | m68ki_write_8(ea, res);\r |
5243 | \r |
5244 | FLAG_N = NFLAG_8(res);\r |
5245 | FLAG_Z = res;\r |
5246 | FLAG_V = VFLAG_CLEAR;\r |
5247 | FLAG_C = CFLAG_CLEAR;\r |
5248 | }\r |
5249 | \r |
5250 | \r |
5251 | void m68k_op_move_8_ai_pd7(void)\r |
5252 | {\r |
5253 | uint res = OPER_A7_PD_8();\r |
5254 | uint ea = EA_AX_AI_8();\r |
5255 | \r |
5256 | m68ki_write_8(ea, res);\r |
5257 | \r |
5258 | FLAG_N = NFLAG_8(res);\r |
5259 | FLAG_Z = res;\r |
5260 | FLAG_V = VFLAG_CLEAR;\r |
5261 | FLAG_C = CFLAG_CLEAR;\r |
5262 | }\r |
5263 | \r |
5264 | \r |
5265 | void m68k_op_move_8_ai_di(void)\r |
5266 | {\r |
5267 | uint res = OPER_AY_DI_8();\r |
5268 | uint ea = EA_AX_AI_8();\r |
5269 | \r |
5270 | m68ki_write_8(ea, res);\r |
5271 | \r |
5272 | FLAG_N = NFLAG_8(res);\r |
5273 | FLAG_Z = res;\r |
5274 | FLAG_V = VFLAG_CLEAR;\r |
5275 | FLAG_C = CFLAG_CLEAR;\r |
5276 | }\r |
5277 | \r |
5278 | \r |
5279 | void m68k_op_move_8_ai_ix(void)\r |
5280 | {\r |
5281 | uint res = OPER_AY_IX_8();\r |
5282 | uint ea = EA_AX_AI_8();\r |
5283 | \r |
5284 | m68ki_write_8(ea, res);\r |
5285 | \r |
5286 | FLAG_N = NFLAG_8(res);\r |
5287 | FLAG_Z = res;\r |
5288 | FLAG_V = VFLAG_CLEAR;\r |
5289 | FLAG_C = CFLAG_CLEAR;\r |
5290 | }\r |
5291 | \r |
5292 | \r |
5293 | void m68k_op_move_8_ai_aw(void)\r |
5294 | {\r |
5295 | uint res = OPER_AW_8();\r |
5296 | uint ea = EA_AX_AI_8();\r |
5297 | \r |
5298 | m68ki_write_8(ea, res);\r |
5299 | \r |
5300 | FLAG_N = NFLAG_8(res);\r |
5301 | FLAG_Z = res;\r |
5302 | FLAG_V = VFLAG_CLEAR;\r |
5303 | FLAG_C = CFLAG_CLEAR;\r |
5304 | }\r |
5305 | \r |
5306 | \r |
5307 | void m68k_op_move_8_ai_al(void)\r |
5308 | {\r |
5309 | uint res = OPER_AL_8();\r |
5310 | uint ea = EA_AX_AI_8();\r |
5311 | \r |
5312 | m68ki_write_8(ea, res);\r |
5313 | \r |
5314 | FLAG_N = NFLAG_8(res);\r |
5315 | FLAG_Z = res;\r |
5316 | FLAG_V = VFLAG_CLEAR;\r |
5317 | FLAG_C = CFLAG_CLEAR;\r |
5318 | }\r |
5319 | \r |
5320 | \r |
5321 | void m68k_op_move_8_ai_pcdi(void)\r |
5322 | {\r |
5323 | uint res = OPER_PCDI_8();\r |
5324 | uint ea = EA_AX_AI_8();\r |
5325 | \r |
5326 | m68ki_write_8(ea, res);\r |
5327 | \r |
5328 | FLAG_N = NFLAG_8(res);\r |
5329 | FLAG_Z = res;\r |
5330 | FLAG_V = VFLAG_CLEAR;\r |
5331 | FLAG_C = CFLAG_CLEAR;\r |
5332 | }\r |
5333 | \r |
5334 | \r |
5335 | void m68k_op_move_8_ai_pcix(void)\r |
5336 | {\r |
5337 | uint res = OPER_PCIX_8();\r |
5338 | uint ea = EA_AX_AI_8();\r |
5339 | \r |
5340 | m68ki_write_8(ea, res);\r |
5341 | \r |
5342 | FLAG_N = NFLAG_8(res);\r |
5343 | FLAG_Z = res;\r |
5344 | FLAG_V = VFLAG_CLEAR;\r |
5345 | FLAG_C = CFLAG_CLEAR;\r |
5346 | }\r |
5347 | \r |
5348 | \r |
5349 | void m68k_op_move_8_ai_i(void)\r |
5350 | {\r |
5351 | uint res = OPER_I_8();\r |
5352 | uint ea = EA_AX_AI_8();\r |
5353 | \r |
5354 | m68ki_write_8(ea, res);\r |
5355 | \r |
5356 | FLAG_N = NFLAG_8(res);\r |
5357 | FLAG_Z = res;\r |
5358 | FLAG_V = VFLAG_CLEAR;\r |
5359 | FLAG_C = CFLAG_CLEAR;\r |
5360 | }\r |
5361 | \r |
5362 | \r |
5363 | void m68k_op_move_8_pi7_d(void)\r |
5364 | {\r |
5365 | uint res = MASK_OUT_ABOVE_8(DY);\r |
5366 | uint ea = EA_A7_PI_8();\r |
5367 | \r |
5368 | m68ki_write_8(ea, res);\r |
5369 | \r |
5370 | FLAG_N = NFLAG_8(res);\r |
5371 | FLAG_Z = res;\r |
5372 | FLAG_V = VFLAG_CLEAR;\r |
5373 | FLAG_C = CFLAG_CLEAR;\r |
5374 | }\r |
5375 | \r |
5376 | \r |
5377 | void m68k_op_move_8_pi_d(void)\r |
5378 | {\r |
5379 | uint res = MASK_OUT_ABOVE_8(DY);\r |
5380 | uint ea = EA_AX_PI_8();\r |
5381 | \r |
5382 | m68ki_write_8(ea, res);\r |
5383 | \r |
5384 | FLAG_N = NFLAG_8(res);\r |
5385 | FLAG_Z = res;\r |
5386 | FLAG_V = VFLAG_CLEAR;\r |
5387 | FLAG_C = CFLAG_CLEAR;\r |
5388 | }\r |
5389 | \r |
5390 | \r |
5391 | void m68k_op_move_8_pi7_ai(void)\r |
5392 | {\r |
5393 | uint res = OPER_AY_AI_8();\r |
5394 | uint ea = EA_A7_PI_8();\r |
5395 | \r |
5396 | m68ki_write_8(ea, res);\r |
5397 | \r |
5398 | FLAG_N = NFLAG_8(res);\r |
5399 | FLAG_Z = res;\r |
5400 | FLAG_V = VFLAG_CLEAR;\r |
5401 | FLAG_C = CFLAG_CLEAR;\r |
5402 | }\r |
5403 | \r |
5404 | \r |
5405 | void m68k_op_move_8_pi7_pi(void)\r |
5406 | {\r |
5407 | uint res = OPER_AY_PI_8();\r |
5408 | uint ea = EA_A7_PI_8();\r |
5409 | \r |
5410 | m68ki_write_8(ea, res);\r |
5411 | \r |
5412 | FLAG_N = NFLAG_8(res);\r |
5413 | FLAG_Z = res;\r |
5414 | FLAG_V = VFLAG_CLEAR;\r |
5415 | FLAG_C = CFLAG_CLEAR;\r |
5416 | }\r |
5417 | \r |
5418 | \r |
5419 | void m68k_op_move_8_pi7_pi7(void)\r |
5420 | {\r |
5421 | uint res = OPER_A7_PI_8();\r |
5422 | uint ea = EA_A7_PI_8();\r |
5423 | \r |
5424 | m68ki_write_8(ea, res);\r |
5425 | \r |
5426 | FLAG_N = NFLAG_8(res);\r |
5427 | FLAG_Z = res;\r |
5428 | FLAG_V = VFLAG_CLEAR;\r |
5429 | FLAG_C = CFLAG_CLEAR;\r |
5430 | }\r |
5431 | \r |
5432 | \r |
5433 | void m68k_op_move_8_pi7_pd(void)\r |
5434 | {\r |
5435 | uint res = OPER_AY_PD_8();\r |
5436 | uint ea = EA_A7_PI_8();\r |
5437 | \r |
5438 | m68ki_write_8(ea, res);\r |
5439 | \r |
5440 | FLAG_N = NFLAG_8(res);\r |
5441 | FLAG_Z = res;\r |
5442 | FLAG_V = VFLAG_CLEAR;\r |
5443 | FLAG_C = CFLAG_CLEAR;\r |
5444 | }\r |
5445 | \r |
5446 | \r |
5447 | void m68k_op_move_8_pi7_pd7(void)\r |
5448 | {\r |
5449 | uint res = OPER_A7_PD_8();\r |
5450 | uint ea = EA_A7_PI_8();\r |
5451 | \r |
5452 | m68ki_write_8(ea, res);\r |
5453 | \r |
5454 | FLAG_N = NFLAG_8(res);\r |
5455 | FLAG_Z = res;\r |
5456 | FLAG_V = VFLAG_CLEAR;\r |
5457 | FLAG_C = CFLAG_CLEAR;\r |
5458 | }\r |
5459 | \r |
5460 | \r |
5461 | void m68k_op_move_8_pi7_di(void)\r |
5462 | {\r |
5463 | uint res = OPER_AY_DI_8();\r |
5464 | uint ea = EA_A7_PI_8();\r |
5465 | \r |
5466 | m68ki_write_8(ea, res);\r |
5467 | \r |
5468 | FLAG_N = NFLAG_8(res);\r |
5469 | FLAG_Z = res;\r |
5470 | FLAG_V = VFLAG_CLEAR;\r |
5471 | FLAG_C = CFLAG_CLEAR;\r |
5472 | }\r |
5473 | \r |
5474 | \r |
5475 | void m68k_op_move_8_pi7_ix(void)\r |
5476 | {\r |
5477 | uint res = OPER_AY_IX_8();\r |
5478 | uint ea = EA_A7_PI_8();\r |
5479 | \r |
5480 | m68ki_write_8(ea, res);\r |
5481 | \r |
5482 | FLAG_N = NFLAG_8(res);\r |
5483 | FLAG_Z = res;\r |
5484 | FLAG_V = VFLAG_CLEAR;\r |
5485 | FLAG_C = CFLAG_CLEAR;\r |
5486 | }\r |
5487 | \r |
5488 | \r |
5489 | void m68k_op_move_8_pi7_aw(void)\r |
5490 | {\r |
5491 | uint res = OPER_AW_8();\r |
5492 | uint ea = EA_A7_PI_8();\r |
5493 | \r |
5494 | m68ki_write_8(ea, res);\r |
5495 | \r |
5496 | FLAG_N = NFLAG_8(res);\r |
5497 | FLAG_Z = res;\r |
5498 | FLAG_V = VFLAG_CLEAR;\r |
5499 | FLAG_C = CFLAG_CLEAR;\r |
5500 | }\r |
5501 | \r |
5502 | \r |
5503 | void m68k_op_move_8_pi7_al(void)\r |
5504 | {\r |
5505 | uint res = OPER_AL_8();\r |
5506 | uint ea = EA_A7_PI_8();\r |
5507 | \r |
5508 | m68ki_write_8(ea, res);\r |
5509 | \r |
5510 | FLAG_N = NFLAG_8(res);\r |
5511 | FLAG_Z = res;\r |
5512 | FLAG_V = VFLAG_CLEAR;\r |
5513 | FLAG_C = CFLAG_CLEAR;\r |
5514 | }\r |
5515 | \r |
5516 | \r |
5517 | void m68k_op_move_8_pi7_pcdi(void)\r |
5518 | {\r |
5519 | uint res = OPER_PCDI_8();\r |
5520 | uint ea = EA_A7_PI_8();\r |
5521 | \r |
5522 | m68ki_write_8(ea, res);\r |
5523 | \r |
5524 | FLAG_N = NFLAG_8(res);\r |
5525 | FLAG_Z = res;\r |
5526 | FLAG_V = VFLAG_CLEAR;\r |
5527 | FLAG_C = CFLAG_CLEAR;\r |
5528 | }\r |
5529 | \r |
5530 | \r |
5531 | void m68k_op_move_8_pi7_pcix(void)\r |
5532 | {\r |
5533 | uint res = OPER_PCIX_8();\r |
5534 | uint ea = EA_A7_PI_8();\r |
5535 | \r |
5536 | m68ki_write_8(ea, res);\r |
5537 | \r |
5538 | FLAG_N = NFLAG_8(res);\r |
5539 | FLAG_Z = res;\r |
5540 | FLAG_V = VFLAG_CLEAR;\r |
5541 | FLAG_C = CFLAG_CLEAR;\r |
5542 | }\r |
5543 | \r |
5544 | \r |
5545 | void m68k_op_move_8_pi7_i(void)\r |
5546 | {\r |
5547 | uint res = OPER_I_8();\r |
5548 | uint ea = EA_A7_PI_8();\r |
5549 | \r |
5550 | m68ki_write_8(ea, res);\r |
5551 | \r |
5552 | FLAG_N = NFLAG_8(res);\r |
5553 | FLAG_Z = res;\r |
5554 | FLAG_V = VFLAG_CLEAR;\r |
5555 | FLAG_C = CFLAG_CLEAR;\r |
5556 | }\r |
5557 | \r |
5558 | \r |
5559 | void m68k_op_move_8_pi_ai(void)\r |
5560 | {\r |
5561 | uint res = OPER_AY_AI_8();\r |
5562 | uint ea = EA_AX_PI_8();\r |
5563 | \r |
5564 | m68ki_write_8(ea, res);\r |
5565 | \r |
5566 | FLAG_N = NFLAG_8(res);\r |
5567 | FLAG_Z = res;\r |
5568 | FLAG_V = VFLAG_CLEAR;\r |
5569 | FLAG_C = CFLAG_CLEAR;\r |
5570 | }\r |
5571 | \r |
5572 | \r |
5573 | void m68k_op_move_8_pi_pi(void)\r |
5574 | {\r |
5575 | uint res = OPER_AY_PI_8();\r |
5576 | uint ea = EA_AX_PI_8();\r |
5577 | \r |
5578 | m68ki_write_8(ea, res);\r |
5579 | \r |
5580 | FLAG_N = NFLAG_8(res);\r |
5581 | FLAG_Z = res;\r |
5582 | FLAG_V = VFLAG_CLEAR;\r |
5583 | FLAG_C = CFLAG_CLEAR;\r |
5584 | }\r |
5585 | \r |
5586 | \r |
5587 | void m68k_op_move_8_pi_pi7(void)\r |
5588 | {\r |
5589 | uint res = OPER_A7_PI_8();\r |
5590 | uint ea = EA_AX_PI_8();\r |
5591 | \r |
5592 | m68ki_write_8(ea, res);\r |
5593 | \r |
5594 | FLAG_N = NFLAG_8(res);\r |
5595 | FLAG_Z = res;\r |
5596 | FLAG_V = VFLAG_CLEAR;\r |
5597 | FLAG_C = CFLAG_CLEAR;\r |
5598 | }\r |
5599 | \r |
5600 | \r |
5601 | void m68k_op_move_8_pi_pd(void)\r |
5602 | {\r |
5603 | uint res = OPER_AY_PD_8();\r |
5604 | uint ea = EA_AX_PI_8();\r |
5605 | \r |
5606 | m68ki_write_8(ea, res);\r |
5607 | \r |
5608 | FLAG_N = NFLAG_8(res);\r |
5609 | FLAG_Z = res;\r |
5610 | FLAG_V = VFLAG_CLEAR;\r |
5611 | FLAG_C = CFLAG_CLEAR;\r |
5612 | }\r |
5613 | \r |
5614 | \r |
5615 | void m68k_op_move_8_pi_pd7(void)\r |
5616 | {\r |
5617 | uint res = OPER_A7_PD_8();\r |
5618 | uint ea = EA_AX_PI_8();\r |
5619 | \r |
5620 | m68ki_write_8(ea, res);\r |
5621 | \r |
5622 | FLAG_N = NFLAG_8(res);\r |
5623 | FLAG_Z = res;\r |
5624 | FLAG_V = VFLAG_CLEAR;\r |
5625 | FLAG_C = CFLAG_CLEAR;\r |
5626 | }\r |
5627 | \r |
5628 | \r |
5629 | void m68k_op_move_8_pi_di(void)\r |
5630 | {\r |
5631 | uint res = OPER_AY_DI_8();\r |
5632 | uint ea = EA_AX_PI_8();\r |
5633 | \r |
5634 | m68ki_write_8(ea, res);\r |
5635 | \r |
5636 | FLAG_N = NFLAG_8(res);\r |
5637 | FLAG_Z = res;\r |
5638 | FLAG_V = VFLAG_CLEAR;\r |
5639 | FLAG_C = CFLAG_CLEAR;\r |
5640 | }\r |
5641 | \r |
5642 | \r |
5643 | void m68k_op_move_8_pi_ix(void)\r |
5644 | {\r |
5645 | uint res = OPER_AY_IX_8();\r |
5646 | uint ea = EA_AX_PI_8();\r |
5647 | \r |
5648 | m68ki_write_8(ea, res);\r |
5649 | \r |
5650 | FLAG_N = NFLAG_8(res);\r |
5651 | FLAG_Z = res;\r |
5652 | FLAG_V = VFLAG_CLEAR;\r |
5653 | FLAG_C = CFLAG_CLEAR;\r |
5654 | }\r |
5655 | \r |
5656 | \r |
5657 | void m68k_op_move_8_pi_aw(void)\r |
5658 | {\r |
5659 | uint res = OPER_AW_8();\r |
5660 | uint ea = EA_AX_PI_8();\r |
5661 | \r |
5662 | m68ki_write_8(ea, res);\r |
5663 | \r |
5664 | FLAG_N = NFLAG_8(res);\r |
5665 | FLAG_Z = res;\r |
5666 | FLAG_V = VFLAG_CLEAR;\r |
5667 | FLAG_C = CFLAG_CLEAR;\r |
5668 | }\r |
5669 | \r |
5670 | \r |
5671 | void m68k_op_move_8_pi_al(void)\r |
5672 | {\r |
5673 | uint res = OPER_AL_8();\r |
5674 | uint ea = EA_AX_PI_8();\r |
5675 | \r |
5676 | m68ki_write_8(ea, res);\r |
5677 | \r |
5678 | FLAG_N = NFLAG_8(res);\r |
5679 | FLAG_Z = res;\r |
5680 | FLAG_V = VFLAG_CLEAR;\r |
5681 | FLAG_C = CFLAG_CLEAR;\r |
5682 | }\r |
5683 | \r |
5684 | \r |
5685 | void m68k_op_move_8_pi_pcdi(void)\r |
5686 | {\r |
5687 | uint res = OPER_PCDI_8();\r |
5688 | uint ea = EA_AX_PI_8();\r |
5689 | \r |
5690 | m68ki_write_8(ea, res);\r |
5691 | \r |
5692 | FLAG_N = NFLAG_8(res);\r |
5693 | FLAG_Z = res;\r |
5694 | FLAG_V = VFLAG_CLEAR;\r |
5695 | FLAG_C = CFLAG_CLEAR;\r |
5696 | }\r |
5697 | \r |
5698 | \r |
5699 | void m68k_op_move_8_pi_pcix(void)\r |
5700 | {\r |
5701 | uint res = OPER_PCIX_8();\r |
5702 | uint ea = EA_AX_PI_8();\r |
5703 | \r |
5704 | m68ki_write_8(ea, res);\r |
5705 | \r |
5706 | FLAG_N = NFLAG_8(res);\r |
5707 | FLAG_Z = res;\r |
5708 | FLAG_V = VFLAG_CLEAR;\r |
5709 | FLAG_C = CFLAG_CLEAR;\r |
5710 | }\r |
5711 | \r |
5712 | \r |
5713 | void m68k_op_move_8_pi_i(void)\r |
5714 | {\r |
5715 | uint res = OPER_I_8();\r |
5716 | uint ea = EA_AX_PI_8();\r |
5717 | \r |
5718 | m68ki_write_8(ea, res);\r |
5719 | \r |
5720 | FLAG_N = NFLAG_8(res);\r |
5721 | FLAG_Z = res;\r |
5722 | FLAG_V = VFLAG_CLEAR;\r |
5723 | FLAG_C = CFLAG_CLEAR;\r |
5724 | }\r |
5725 | \r |
5726 | \r |
5727 | void m68k_op_move_8_pd7_d(void)\r |
5728 | {\r |
5729 | uint res = MASK_OUT_ABOVE_8(DY);\r |
5730 | uint ea = EA_A7_PD_8();\r |
5731 | \r |
5732 | m68ki_write_8(ea, res);\r |
5733 | \r |
5734 | FLAG_N = NFLAG_8(res);\r |
5735 | FLAG_Z = res;\r |
5736 | FLAG_V = VFLAG_CLEAR;\r |
5737 | FLAG_C = CFLAG_CLEAR;\r |
5738 | }\r |
5739 | \r |
5740 | \r |
5741 | void m68k_op_move_8_pd_d(void)\r |
5742 | {\r |
5743 | uint res = MASK_OUT_ABOVE_8(DY);\r |
5744 | uint ea = EA_AX_PD_8();\r |
5745 | \r |
5746 | m68ki_write_8(ea, res);\r |
5747 | \r |
5748 | FLAG_N = NFLAG_8(res);\r |
5749 | FLAG_Z = res;\r |
5750 | FLAG_V = VFLAG_CLEAR;\r |
5751 | FLAG_C = CFLAG_CLEAR;\r |
5752 | }\r |
5753 | \r |
5754 | \r |
5755 | void m68k_op_move_8_pd7_ai(void)\r |
5756 | {\r |
5757 | uint res = OPER_AY_AI_8();\r |
5758 | uint ea = EA_A7_PD_8();\r |
5759 | \r |
5760 | m68ki_write_8(ea, res);\r |
5761 | \r |
5762 | FLAG_N = NFLAG_8(res);\r |
5763 | FLAG_Z = res;\r |
5764 | FLAG_V = VFLAG_CLEAR;\r |
5765 | FLAG_C = CFLAG_CLEAR;\r |
5766 | }\r |
5767 | \r |
5768 | \r |
5769 | void m68k_op_move_8_pd7_pi(void)\r |
5770 | {\r |
5771 | uint res = OPER_AY_PI_8();\r |
5772 | uint ea = EA_A7_PD_8();\r |
5773 | \r |
5774 | m68ki_write_8(ea, res);\r |
5775 | \r |
5776 | FLAG_N = NFLAG_8(res);\r |
5777 | FLAG_Z = res;\r |
5778 | FLAG_V = VFLAG_CLEAR;\r |
5779 | FLAG_C = CFLAG_CLEAR;\r |
5780 | }\r |
5781 | \r |
5782 | \r |
5783 | void m68k_op_move_8_pd7_pi7(void)\r |
5784 | {\r |
5785 | uint res = OPER_A7_PI_8();\r |
5786 | uint ea = EA_A7_PD_8();\r |
5787 | \r |
5788 | m68ki_write_8(ea, res);\r |
5789 | \r |
5790 | FLAG_N = NFLAG_8(res);\r |
5791 | FLAG_Z = res;\r |
5792 | FLAG_V = VFLAG_CLEAR;\r |
5793 | FLAG_C = CFLAG_CLEAR;\r |
5794 | }\r |
5795 | \r |
5796 | \r |
5797 | void m68k_op_move_8_pd7_pd(void)\r |
5798 | {\r |
5799 | uint res = OPER_AY_PD_8();\r |
5800 | uint ea = EA_A7_PD_8();\r |
5801 | \r |
5802 | m68ki_write_8(ea, res);\r |
5803 | \r |
5804 | FLAG_N = NFLAG_8(res);\r |
5805 | FLAG_Z = res;\r |
5806 | FLAG_V = VFLAG_CLEAR;\r |
5807 | FLAG_C = CFLAG_CLEAR;\r |
5808 | }\r |
5809 | \r |
5810 | \r |
5811 | void m68k_op_move_8_pd7_pd7(void)\r |
5812 | {\r |
5813 | uint res = OPER_A7_PD_8();\r |
5814 | uint ea = EA_A7_PD_8();\r |
5815 | \r |
5816 | m68ki_write_8(ea, res);\r |
5817 | \r |
5818 | FLAG_N = NFLAG_8(res);\r |
5819 | FLAG_Z = res;\r |
5820 | FLAG_V = VFLAG_CLEAR;\r |
5821 | FLAG_C = CFLAG_CLEAR;\r |
5822 | }\r |
5823 | \r |
5824 | \r |
5825 | void m68k_op_move_8_pd7_di(void)\r |
5826 | {\r |
5827 | uint res = OPER_AY_DI_8();\r |
5828 | uint ea = EA_A7_PD_8();\r |
5829 | \r |
5830 | m68ki_write_8(ea, res);\r |
5831 | \r |
5832 | FLAG_N = NFLAG_8(res);\r |
5833 | FLAG_Z = res;\r |
5834 | FLAG_V = VFLAG_CLEAR;\r |
5835 | FLAG_C = CFLAG_CLEAR;\r |
5836 | }\r |
5837 | \r |
5838 | \r |
5839 | void m68k_op_move_8_pd7_ix(void)\r |
5840 | {\r |
5841 | uint res = OPER_AY_IX_8();\r |
5842 | uint ea = EA_A7_PD_8();\r |
5843 | \r |
5844 | m68ki_write_8(ea, res);\r |
5845 | \r |
5846 | FLAG_N = NFLAG_8(res);\r |
5847 | FLAG_Z = res;\r |
5848 | FLAG_V = VFLAG_CLEAR;\r |
5849 | FLAG_C = CFLAG_CLEAR;\r |
5850 | }\r |
5851 | \r |
5852 | \r |
5853 | void m68k_op_move_8_pd7_aw(void)\r |
5854 | {\r |
5855 | uint res = OPER_AW_8();\r |
5856 | uint ea = EA_A7_PD_8();\r |
5857 | \r |
5858 | m68ki_write_8(ea, res);\r |
5859 | \r |
5860 | FLAG_N = NFLAG_8(res);\r |
5861 | FLAG_Z = res;\r |
5862 | FLAG_V = VFLAG_CLEAR;\r |
5863 | FLAG_C = CFLAG_CLEAR;\r |
5864 | }\r |
5865 | \r |
5866 | \r |
5867 | void m68k_op_move_8_pd7_al(void)\r |
5868 | {\r |
5869 | uint res = OPER_AL_8();\r |
5870 | uint ea = EA_A7_PD_8();\r |
5871 | \r |
5872 | m68ki_write_8(ea, res);\r |
5873 | \r |
5874 | FLAG_N = NFLAG_8(res);\r |
5875 | FLAG_Z = res;\r |
5876 | FLAG_V = VFLAG_CLEAR;\r |
5877 | FLAG_C = CFLAG_CLEAR;\r |
5878 | }\r |
5879 | \r |
5880 | \r |
5881 | void m68k_op_move_8_pd7_pcdi(void)\r |
5882 | {\r |
5883 | uint res = OPER_PCDI_8();\r |
5884 | uint ea = EA_A7_PD_8();\r |
5885 | \r |
5886 | m68ki_write_8(ea, res);\r |
5887 | \r |
5888 | FLAG_N = NFLAG_8(res);\r |
5889 | FLAG_Z = res;\r |
5890 | FLAG_V = VFLAG_CLEAR;\r |
5891 | FLAG_C = CFLAG_CLEAR;\r |
5892 | }\r |
5893 | \r |
5894 | \r |
5895 | void m68k_op_move_8_pd7_pcix(void)\r |
5896 | {\r |
5897 | uint res = OPER_PCIX_8();\r |
5898 | uint ea = EA_A7_PD_8();\r |
5899 | \r |
5900 | m68ki_write_8(ea, res);\r |
5901 | \r |
5902 | FLAG_N = NFLAG_8(res);\r |
5903 | FLAG_Z = res;\r |
5904 | FLAG_V = VFLAG_CLEAR;\r |
5905 | FLAG_C = CFLAG_CLEAR;\r |
5906 | }\r |
5907 | \r |
5908 | \r |
5909 | void m68k_op_move_8_pd7_i(void)\r |
5910 | {\r |
5911 | uint res = OPER_I_8();\r |
5912 | uint ea = EA_A7_PD_8();\r |
5913 | \r |
5914 | m68ki_write_8(ea, res);\r |
5915 | \r |
5916 | FLAG_N = NFLAG_8(res);\r |
5917 | FLAG_Z = res;\r |
5918 | FLAG_V = VFLAG_CLEAR;\r |
5919 | FLAG_C = CFLAG_CLEAR;\r |
5920 | }\r |
5921 | \r |
5922 | \r |
5923 | void m68k_op_move_8_pd_ai(void)\r |
5924 | {\r |
5925 | uint res = OPER_AY_AI_8();\r |
5926 | uint ea = EA_AX_PD_8();\r |
5927 | \r |
5928 | m68ki_write_8(ea, res);\r |
5929 | \r |
5930 | FLAG_N = NFLAG_8(res);\r |
5931 | FLAG_Z = res;\r |
5932 | FLAG_V = VFLAG_CLEAR;\r |
5933 | FLAG_C = CFLAG_CLEAR;\r |
5934 | }\r |
5935 | \r |
5936 | \r |
5937 | void m68k_op_move_8_pd_pi(void)\r |
5938 | {\r |
5939 | uint res = OPER_AY_PI_8();\r |
5940 | uint ea = EA_AX_PD_8();\r |
5941 | \r |
5942 | m68ki_write_8(ea, res);\r |
5943 | \r |
5944 | FLAG_N = NFLAG_8(res);\r |
5945 | FLAG_Z = res;\r |
5946 | FLAG_V = VFLAG_CLEAR;\r |
5947 | FLAG_C = CFLAG_CLEAR;\r |
5948 | }\r |
5949 | \r |
5950 | \r |
5951 | void m68k_op_move_8_pd_pi7(void)\r |
5952 | {\r |
5953 | uint res = OPER_A7_PI_8();\r |
5954 | uint ea = EA_AX_PD_8();\r |
5955 | \r |
5956 | m68ki_write_8(ea, res);\r |
5957 | \r |
5958 | FLAG_N = NFLAG_8(res);\r |
5959 | FLAG_Z = res;\r |
5960 | FLAG_V = VFLAG_CLEAR;\r |
5961 | FLAG_C = CFLAG_CLEAR;\r |
5962 | }\r |
5963 | \r |
5964 | \r |
5965 | void m68k_op_move_8_pd_pd(void)\r |
5966 | {\r |
5967 | uint res = OPER_AY_PD_8();\r |
5968 | uint ea = EA_AX_PD_8();\r |
5969 | \r |
5970 | m68ki_write_8(ea, res);\r |
5971 | \r |
5972 | FLAG_N = NFLAG_8(res);\r |
5973 | FLAG_Z = res;\r |
5974 | FLAG_V = VFLAG_CLEAR;\r |
5975 | FLAG_C = CFLAG_CLEAR;\r |
5976 | }\r |
5977 | \r |
5978 | \r |
5979 | void m68k_op_move_8_pd_pd7(void)\r |
5980 | {\r |
5981 | uint res = OPER_A7_PD_8();\r |
5982 | uint ea = EA_AX_PD_8();\r |
5983 | \r |
5984 | m68ki_write_8(ea, res);\r |
5985 | \r |
5986 | FLAG_N = NFLAG_8(res);\r |
5987 | FLAG_Z = res;\r |
5988 | FLAG_V = VFLAG_CLEAR;\r |
5989 | FLAG_C = CFLAG_CLEAR;\r |
5990 | }\r |
5991 | \r |
5992 | \r |
5993 | void m68k_op_move_8_pd_di(void)\r |
5994 | {\r |
5995 | uint res = OPER_AY_DI_8();\r |
5996 | uint ea = EA_AX_PD_8();\r |
5997 | \r |
5998 | m68ki_write_8(ea, res);\r |
5999 | \r |
6000 | FLAG_N = NFLAG_8(res);\r |
6001 | FLAG_Z = res;\r |
6002 | FLAG_V = VFLAG_CLEAR;\r |
6003 | FLAG_C = CFLAG_CLEAR;\r |
6004 | }\r |
6005 | \r |
6006 | \r |
6007 | void m68k_op_move_8_pd_ix(void)\r |
6008 | {\r |
6009 | uint res = OPER_AY_IX_8();\r |
6010 | uint ea = EA_AX_PD_8();\r |
6011 | \r |
6012 | m68ki_write_8(ea, res);\r |
6013 | \r |
6014 | FLAG_N = NFLAG_8(res);\r |
6015 | FLAG_Z = res;\r |
6016 | FLAG_V = VFLAG_CLEAR;\r |
6017 | FLAG_C = CFLAG_CLEAR;\r |
6018 | }\r |
6019 | \r |
6020 | \r |
6021 | void m68k_op_move_8_pd_aw(void)\r |
6022 | {\r |
6023 | uint res = OPER_AW_8();\r |
6024 | uint ea = EA_AX_PD_8();\r |
6025 | \r |
6026 | m68ki_write_8(ea, res);\r |
6027 | \r |
6028 | FLAG_N = NFLAG_8(res);\r |
6029 | FLAG_Z = res;\r |
6030 | FLAG_V = VFLAG_CLEAR;\r |
6031 | FLAG_C = CFLAG_CLEAR;\r |
6032 | }\r |
6033 | \r |
6034 | \r |
6035 | void m68k_op_move_8_pd_al(void)\r |
6036 | {\r |
6037 | uint res = OPER_AL_8();\r |
6038 | uint ea = EA_AX_PD_8();\r |
6039 | \r |
6040 | m68ki_write_8(ea, res);\r |
6041 | \r |
6042 | FLAG_N = NFLAG_8(res);\r |
6043 | FLAG_Z = res;\r |
6044 | FLAG_V = VFLAG_CLEAR;\r |
6045 | FLAG_C = CFLAG_CLEAR;\r |
6046 | }\r |
6047 | \r |
6048 | \r |
6049 | void m68k_op_move_8_pd_pcdi(void)\r |
6050 | {\r |
6051 | uint res = OPER_PCDI_8();\r |
6052 | uint ea = EA_AX_PD_8();\r |
6053 | \r |
6054 | m68ki_write_8(ea, res);\r |
6055 | \r |
6056 | FLAG_N = NFLAG_8(res);\r |
6057 | FLAG_Z = res;\r |
6058 | FLAG_V = VFLAG_CLEAR;\r |
6059 | FLAG_C = CFLAG_CLEAR;\r |
6060 | }\r |
6061 | \r |
6062 | \r |
6063 | void m68k_op_move_8_pd_pcix(void)\r |
6064 | {\r |
6065 | uint res = OPER_PCIX_8();\r |
6066 | uint ea = EA_AX_PD_8();\r |
6067 | \r |
6068 | m68ki_write_8(ea, res);\r |
6069 | \r |
6070 | FLAG_N = NFLAG_8(res);\r |
6071 | FLAG_Z = res;\r |
6072 | FLAG_V = VFLAG_CLEAR;\r |
6073 | FLAG_C = CFLAG_CLEAR;\r |
6074 | }\r |
6075 | \r |
6076 | \r |
6077 | void m68k_op_move_8_pd_i(void)\r |
6078 | {\r |
6079 | uint res = OPER_I_8();\r |
6080 | uint ea = EA_AX_PD_8();\r |
6081 | \r |
6082 | m68ki_write_8(ea, res);\r |
6083 | \r |
6084 | FLAG_N = NFLAG_8(res);\r |
6085 | FLAG_Z = res;\r |
6086 | FLAG_V = VFLAG_CLEAR;\r |
6087 | FLAG_C = CFLAG_CLEAR;\r |
6088 | }\r |
6089 | \r |
6090 | \r |
6091 | void m68k_op_move_8_di_d(void)\r |
6092 | {\r |
6093 | uint res = MASK_OUT_ABOVE_8(DY);\r |
6094 | uint ea = EA_AX_DI_8();\r |
6095 | \r |
6096 | m68ki_write_8(ea, res);\r |
6097 | \r |
6098 | FLAG_N = NFLAG_8(res);\r |
6099 | FLAG_Z = res;\r |
6100 | FLAG_V = VFLAG_CLEAR;\r |
6101 | FLAG_C = CFLAG_CLEAR;\r |
6102 | }\r |
6103 | \r |
6104 | \r |
6105 | void m68k_op_move_8_di_ai(void)\r |
6106 | {\r |
6107 | uint res = OPER_AY_AI_8();\r |
6108 | uint ea = EA_AX_DI_8();\r |
6109 | \r |
6110 | m68ki_write_8(ea, res);\r |
6111 | \r |
6112 | FLAG_N = NFLAG_8(res);\r |
6113 | FLAG_Z = res;\r |
6114 | FLAG_V = VFLAG_CLEAR;\r |
6115 | FLAG_C = CFLAG_CLEAR;\r |
6116 | }\r |
6117 | \r |
6118 | \r |
6119 | void m68k_op_move_8_di_pi(void)\r |
6120 | {\r |
6121 | uint res = OPER_AY_PI_8();\r |
6122 | uint ea = EA_AX_DI_8();\r |
6123 | \r |
6124 | m68ki_write_8(ea, res);\r |
6125 | \r |
6126 | FLAG_N = NFLAG_8(res);\r |
6127 | FLAG_Z = res;\r |
6128 | FLAG_V = VFLAG_CLEAR;\r |
6129 | FLAG_C = CFLAG_CLEAR;\r |
6130 | }\r |
6131 | \r |
6132 | \r |
6133 | void m68k_op_move_8_di_pi7(void)\r |
6134 | {\r |
6135 | uint res = OPER_A7_PI_8();\r |
6136 | uint ea = EA_AX_DI_8();\r |
6137 | \r |
6138 | m68ki_write_8(ea, res);\r |
6139 | \r |
6140 | FLAG_N = NFLAG_8(res);\r |
6141 | FLAG_Z = res;\r |
6142 | FLAG_V = VFLAG_CLEAR;\r |
6143 | FLAG_C = CFLAG_CLEAR;\r |
6144 | }\r |
6145 | \r |
6146 | \r |
6147 | void m68k_op_move_8_di_pd(void)\r |
6148 | {\r |
6149 | uint res = OPER_AY_PD_8();\r |
6150 | uint ea = EA_AX_DI_8();\r |
6151 | \r |
6152 | m68ki_write_8(ea, res);\r |
6153 | \r |
6154 | FLAG_N = NFLAG_8(res);\r |
6155 | FLAG_Z = res;\r |
6156 | FLAG_V = VFLAG_CLEAR;\r |
6157 | FLAG_C = CFLAG_CLEAR;\r |
6158 | }\r |
6159 | \r |
6160 | \r |
6161 | void m68k_op_move_8_di_pd7(void)\r |
6162 | {\r |
6163 | uint res = OPER_A7_PD_8();\r |
6164 | uint ea = EA_AX_DI_8();\r |
6165 | \r |
6166 | m68ki_write_8(ea, res);\r |
6167 | \r |
6168 | FLAG_N = NFLAG_8(res);\r |
6169 | FLAG_Z = res;\r |
6170 | FLAG_V = VFLAG_CLEAR;\r |
6171 | FLAG_C = CFLAG_CLEAR;\r |
6172 | }\r |
6173 | \r |
6174 | \r |
6175 | void m68k_op_move_8_di_di(void)\r |
6176 | {\r |
6177 | uint res = OPER_AY_DI_8();\r |
6178 | uint ea = EA_AX_DI_8();\r |
6179 | \r |
6180 | m68ki_write_8(ea, res);\r |
6181 | \r |
6182 | FLAG_N = NFLAG_8(res);\r |
6183 | FLAG_Z = res;\r |
6184 | FLAG_V = VFLAG_CLEAR;\r |
6185 | FLAG_C = CFLAG_CLEAR;\r |
6186 | }\r |
6187 | \r |
6188 | \r |
6189 | void m68k_op_move_8_di_ix(void)\r |
6190 | {\r |
6191 | uint res = OPER_AY_IX_8();\r |
6192 | uint ea = EA_AX_DI_8();\r |
6193 | \r |
6194 | m68ki_write_8(ea, res);\r |
6195 | \r |
6196 | FLAG_N = NFLAG_8(res);\r |
6197 | FLAG_Z = res;\r |
6198 | FLAG_V = VFLAG_CLEAR;\r |
6199 | FLAG_C = CFLAG_CLEAR;\r |
6200 | }\r |
6201 | \r |
6202 | \r |
6203 | void m68k_op_move_8_di_aw(void)\r |
6204 | {\r |
6205 | uint res = OPER_AW_8();\r |
6206 | uint ea = EA_AX_DI_8();\r |
6207 | \r |
6208 | m68ki_write_8(ea, res);\r |
6209 | \r |
6210 | FLAG_N = NFLAG_8(res);\r |
6211 | FLAG_Z = res;\r |
6212 | FLAG_V = VFLAG_CLEAR;\r |
6213 | FLAG_C = CFLAG_CLEAR;\r |
6214 | }\r |
6215 | \r |
6216 | \r |
6217 | void m68k_op_move_8_di_al(void)\r |
6218 | {\r |
6219 | uint res = OPER_AL_8();\r |
6220 | uint ea = EA_AX_DI_8();\r |
6221 | \r |
6222 | m68ki_write_8(ea, res);\r |
6223 | \r |
6224 | FLAG_N = NFLAG_8(res);\r |
6225 | FLAG_Z = res;\r |
6226 | FLAG_V = VFLAG_CLEAR;\r |
6227 | FLAG_C = CFLAG_CLEAR;\r |
6228 | }\r |
6229 | \r |
6230 | \r |
6231 | void m68k_op_move_8_di_pcdi(void)\r |
6232 | {\r |
6233 | uint res = OPER_PCDI_8();\r |
6234 | uint ea = EA_AX_DI_8();\r |
6235 | \r |
6236 | m68ki_write_8(ea, res);\r |
6237 | \r |
6238 | FLAG_N = NFLAG_8(res);\r |
6239 | FLAG_Z = res;\r |
6240 | FLAG_V = VFLAG_CLEAR;\r |
6241 | FLAG_C = CFLAG_CLEAR;\r |
6242 | }\r |
6243 | \r |
6244 | \r |
6245 | void m68k_op_move_8_di_pcix(void)\r |
6246 | {\r |
6247 | uint res = OPER_PCIX_8();\r |
6248 | uint ea = EA_AX_DI_8();\r |
6249 | \r |
6250 | m68ki_write_8(ea, res);\r |
6251 | \r |
6252 | FLAG_N = NFLAG_8(res);\r |
6253 | FLAG_Z = res;\r |
6254 | FLAG_V = VFLAG_CLEAR;\r |
6255 | FLAG_C = CFLAG_CLEAR;\r |
6256 | }\r |
6257 | \r |
6258 | \r |
6259 | void m68k_op_move_8_di_i(void)\r |
6260 | {\r |
6261 | uint res = OPER_I_8();\r |
6262 | uint ea = EA_AX_DI_8();\r |
6263 | \r |
6264 | m68ki_write_8(ea, res);\r |
6265 | \r |
6266 | FLAG_N = NFLAG_8(res);\r |
6267 | FLAG_Z = res;\r |
6268 | FLAG_V = VFLAG_CLEAR;\r |
6269 | FLAG_C = CFLAG_CLEAR;\r |
6270 | }\r |
6271 | \r |
6272 | \r |
6273 | void m68k_op_move_8_ix_d(void)\r |
6274 | {\r |
6275 | uint res = MASK_OUT_ABOVE_8(DY);\r |
6276 | uint ea = EA_AX_IX_8();\r |
6277 | \r |
6278 | m68ki_write_8(ea, res);\r |
6279 | \r |
6280 | FLAG_N = NFLAG_8(res);\r |
6281 | FLAG_Z = res;\r |
6282 | FLAG_V = VFLAG_CLEAR;\r |
6283 | FLAG_C = CFLAG_CLEAR;\r |
6284 | }\r |
6285 | \r |
6286 | \r |
6287 | void m68k_op_move_8_ix_ai(void)\r |
6288 | {\r |
6289 | uint res = OPER_AY_AI_8();\r |
6290 | uint ea = EA_AX_IX_8();\r |
6291 | \r |
6292 | m68ki_write_8(ea, res);\r |
6293 | \r |
6294 | FLAG_N = NFLAG_8(res);\r |
6295 | FLAG_Z = res;\r |
6296 | FLAG_V = VFLAG_CLEAR;\r |
6297 | FLAG_C = CFLAG_CLEAR;\r |
6298 | }\r |
6299 | \r |
6300 | \r |
6301 | void m68k_op_move_8_ix_pi(void)\r |
6302 | {\r |
6303 | uint res = OPER_AY_PI_8();\r |
6304 | uint ea = EA_AX_IX_8();\r |
6305 | \r |
6306 | m68ki_write_8(ea, res);\r |
6307 | \r |
6308 | FLAG_N = NFLAG_8(res);\r |
6309 | FLAG_Z = res;\r |
6310 | FLAG_V = VFLAG_CLEAR;\r |
6311 | FLAG_C = CFLAG_CLEAR;\r |
6312 | }\r |
6313 | \r |
6314 | \r |
6315 | void m68k_op_move_8_ix_pi7(void)\r |
6316 | {\r |
6317 | uint res = OPER_A7_PI_8();\r |
6318 | uint ea = EA_AX_IX_8();\r |
6319 | \r |
6320 | m68ki_write_8(ea, res);\r |
6321 | \r |
6322 | FLAG_N = NFLAG_8(res);\r |
6323 | FLAG_Z = res;\r |
6324 | FLAG_V = VFLAG_CLEAR;\r |
6325 | FLAG_C = CFLAG_CLEAR;\r |
6326 | }\r |
6327 | \r |
6328 | \r |
6329 | void m68k_op_move_8_ix_pd(void)\r |
6330 | {\r |
6331 | uint res = OPER_AY_PD_8();\r |
6332 | uint ea = EA_AX_IX_8();\r |
6333 | \r |
6334 | m68ki_write_8(ea, res);\r |
6335 | \r |
6336 | FLAG_N = NFLAG_8(res);\r |
6337 | FLAG_Z = res;\r |
6338 | FLAG_V = VFLAG_CLEAR;\r |
6339 | FLAG_C = CFLAG_CLEAR;\r |
6340 | }\r |
6341 | \r |
6342 | \r |
6343 | void m68k_op_move_8_ix_pd7(void)\r |
6344 | {\r |
6345 | uint res = OPER_A7_PD_8();\r |
6346 | uint ea = EA_AX_IX_8();\r |
6347 | \r |
6348 | m68ki_write_8(ea, res);\r |
6349 | \r |
6350 | FLAG_N = NFLAG_8(res);\r |
6351 | FLAG_Z = res;\r |
6352 | FLAG_V = VFLAG_CLEAR;\r |
6353 | FLAG_C = CFLAG_CLEAR;\r |
6354 | }\r |
6355 | \r |
6356 | \r |
6357 | void m68k_op_move_8_ix_di(void)\r |
6358 | {\r |
6359 | uint res = OPER_AY_DI_8();\r |
6360 | uint ea = EA_AX_IX_8();\r |
6361 | \r |
6362 | m68ki_write_8(ea, res);\r |
6363 | \r |
6364 | FLAG_N = NFLAG_8(res);\r |
6365 | FLAG_Z = res;\r |
6366 | FLAG_V = VFLAG_CLEAR;\r |
6367 | FLAG_C = CFLAG_CLEAR;\r |
6368 | }\r |
6369 | \r |
6370 | \r |
6371 | void m68k_op_move_8_ix_ix(void)\r |
6372 | {\r |
6373 | uint res = OPER_AY_IX_8();\r |
6374 | uint ea = EA_AX_IX_8();\r |
6375 | \r |
6376 | m68ki_write_8(ea, res);\r |
6377 | \r |
6378 | FLAG_N = NFLAG_8(res);\r |
6379 | FLAG_Z = res;\r |
6380 | FLAG_V = VFLAG_CLEAR;\r |
6381 | FLAG_C = CFLAG_CLEAR;\r |
6382 | }\r |
6383 | \r |
6384 | \r |
6385 | void m68k_op_move_8_ix_aw(void)\r |
6386 | {\r |
6387 | uint res = OPER_AW_8();\r |
6388 | uint ea = EA_AX_IX_8();\r |
6389 | \r |
6390 | m68ki_write_8(ea, res);\r |
6391 | \r |
6392 | FLAG_N = NFLAG_8(res);\r |
6393 | FLAG_Z = res;\r |
6394 | FLAG_V = VFLAG_CLEAR;\r |
6395 | FLAG_C = CFLAG_CLEAR;\r |
6396 | }\r |
6397 | \r |
6398 | \r |
6399 | void m68k_op_move_8_ix_al(void)\r |
6400 | {\r |
6401 | uint res = OPER_AL_8();\r |
6402 | uint ea = EA_AX_IX_8();\r |
6403 | \r |
6404 | m68ki_write_8(ea, res);\r |
6405 | \r |
6406 | FLAG_N = NFLAG_8(res);\r |
6407 | FLAG_Z = res;\r |
6408 | FLAG_V = VFLAG_CLEAR;\r |
6409 | FLAG_C = CFLAG_CLEAR;\r |
6410 | }\r |
6411 | \r |
6412 | \r |
6413 | void m68k_op_move_8_ix_pcdi(void)\r |
6414 | {\r |
6415 | uint res = OPER_PCDI_8();\r |
6416 | uint ea = EA_AX_IX_8();\r |
6417 | \r |
6418 | m68ki_write_8(ea, res);\r |
6419 | \r |
6420 | FLAG_N = NFLAG_8(res);\r |
6421 | FLAG_Z = res;\r |
6422 | FLAG_V = VFLAG_CLEAR;\r |
6423 | FLAG_C = CFLAG_CLEAR;\r |
6424 | }\r |
6425 | \r |
6426 | \r |
6427 | void m68k_op_move_8_ix_pcix(void)\r |
6428 | {\r |
6429 | uint res = OPER_PCIX_8();\r |
6430 | uint ea = EA_AX_IX_8();\r |
6431 | \r |
6432 | m68ki_write_8(ea, res);\r |
6433 | \r |
6434 | FLAG_N = NFLAG_8(res);\r |
6435 | FLAG_Z = res;\r |
6436 | FLAG_V = VFLAG_CLEAR;\r |
6437 | FLAG_C = CFLAG_CLEAR;\r |
6438 | }\r |
6439 | \r |
6440 | \r |
6441 | void m68k_op_move_8_ix_i(void)\r |
6442 | {\r |
6443 | uint res = OPER_I_8();\r |
6444 | uint ea = EA_AX_IX_8();\r |
6445 | \r |
6446 | m68ki_write_8(ea, res);\r |
6447 | \r |
6448 | FLAG_N = NFLAG_8(res);\r |
6449 | FLAG_Z = res;\r |
6450 | FLAG_V = VFLAG_CLEAR;\r |
6451 | FLAG_C = CFLAG_CLEAR;\r |
6452 | }\r |
6453 | \r |
6454 | \r |
6455 | void m68k_op_move_8_aw_d(void)\r |
6456 | {\r |
6457 | uint res = MASK_OUT_ABOVE_8(DY);\r |
6458 | uint ea = EA_AW_8();\r |
6459 | \r |
6460 | m68ki_write_8(ea, res);\r |
6461 | \r |
6462 | FLAG_N = NFLAG_8(res);\r |
6463 | FLAG_Z = res;\r |
6464 | FLAG_V = VFLAG_CLEAR;\r |
6465 | FLAG_C = CFLAG_CLEAR;\r |
6466 | }\r |
6467 | \r |
6468 | \r |
6469 | void m68k_op_move_8_aw_ai(void)\r |
6470 | {\r |
6471 | uint res = OPER_AY_AI_8();\r |
6472 | uint ea = EA_AW_8();\r |
6473 | \r |
6474 | m68ki_write_8(ea, res);\r |
6475 | \r |
6476 | FLAG_N = NFLAG_8(res);\r |
6477 | FLAG_Z = res;\r |
6478 | FLAG_V = VFLAG_CLEAR;\r |
6479 | FLAG_C = CFLAG_CLEAR;\r |
6480 | }\r |
6481 | \r |
6482 | \r |
6483 | void m68k_op_move_8_aw_pi(void)\r |
6484 | {\r |
6485 | uint res = OPER_AY_PI_8();\r |
6486 | uint ea = EA_AW_8();\r |
6487 | \r |
6488 | m68ki_write_8(ea, res);\r |
6489 | \r |
6490 | FLAG_N = NFLAG_8(res);\r |
6491 | FLAG_Z = res;\r |
6492 | FLAG_V = VFLAG_CLEAR;\r |
6493 | FLAG_C = CFLAG_CLEAR;\r |
6494 | }\r |
6495 | \r |
6496 | \r |
6497 | void m68k_op_move_8_aw_pi7(void)\r |
6498 | {\r |
6499 | uint res = OPER_A7_PI_8();\r |
6500 | uint ea = EA_AW_8();\r |
6501 | \r |
6502 | m68ki_write_8(ea, res);\r |
6503 | \r |
6504 | FLAG_N = NFLAG_8(res);\r |
6505 | FLAG_Z = res;\r |
6506 | FLAG_V = VFLAG_CLEAR;\r |
6507 | FLAG_C = CFLAG_CLEAR;\r |
6508 | }\r |
6509 | \r |
6510 | \r |
6511 | void m68k_op_move_8_aw_pd(void)\r |
6512 | {\r |
6513 | uint res = OPER_AY_PD_8();\r |
6514 | uint ea = EA_AW_8();\r |
6515 | \r |
6516 | m68ki_write_8(ea, res);\r |
6517 | \r |
6518 | FLAG_N = NFLAG_8(res);\r |
6519 | FLAG_Z = res;\r |
6520 | FLAG_V = VFLAG_CLEAR;\r |
6521 | FLAG_C = CFLAG_CLEAR;\r |
6522 | }\r |
6523 | \r |
6524 | \r |
6525 | void m68k_op_move_8_aw_pd7(void)\r |
6526 | {\r |
6527 | uint res = OPER_A7_PD_8();\r |
6528 | uint ea = EA_AW_8();\r |
6529 | \r |
6530 | m68ki_write_8(ea, res);\r |
6531 | \r |
6532 | FLAG_N = NFLAG_8(res);\r |
6533 | FLAG_Z = res;\r |
6534 | FLAG_V = VFLAG_CLEAR;\r |
6535 | FLAG_C = CFLAG_CLEAR;\r |
6536 | }\r |
6537 | \r |
6538 | \r |
6539 | void m68k_op_move_8_aw_di(void)\r |
6540 | {\r |
6541 | uint res = OPER_AY_DI_8();\r |
6542 | uint ea = EA_AW_8();\r |
6543 | \r |
6544 | m68ki_write_8(ea, res);\r |
6545 | \r |
6546 | FLAG_N = NFLAG_8(res);\r |
6547 | FLAG_Z = res;\r |
6548 | FLAG_V = VFLAG_CLEAR;\r |
6549 | FLAG_C = CFLAG_CLEAR;\r |
6550 | }\r |
6551 | \r |
6552 | \r |
6553 | void m68k_op_move_8_aw_ix(void)\r |
6554 | {\r |
6555 | uint res = OPER_AY_IX_8();\r |
6556 | uint ea = EA_AW_8();\r |
6557 | \r |
6558 | m68ki_write_8(ea, res);\r |
6559 | \r |
6560 | FLAG_N = NFLAG_8(res);\r |
6561 | FLAG_Z = res;\r |
6562 | FLAG_V = VFLAG_CLEAR;\r |
6563 | FLAG_C = CFLAG_CLEAR;\r |
6564 | }\r |
6565 | \r |
6566 | \r |
6567 | void m68k_op_move_8_aw_aw(void)\r |
6568 | {\r |
6569 | uint res = OPER_AW_8();\r |
6570 | uint ea = EA_AW_8();\r |
6571 | \r |
6572 | m68ki_write_8(ea, res);\r |
6573 | \r |
6574 | FLAG_N = NFLAG_8(res);\r |
6575 | FLAG_Z = res;\r |
6576 | FLAG_V = VFLAG_CLEAR;\r |
6577 | FLAG_C = CFLAG_CLEAR;\r |
6578 | }\r |
6579 | \r |
6580 | \r |
6581 | void m68k_op_move_8_aw_al(void)\r |
6582 | {\r |
6583 | uint res = OPER_AL_8();\r |
6584 | uint ea = EA_AW_8();\r |
6585 | \r |
6586 | m68ki_write_8(ea, res);\r |
6587 | \r |
6588 | FLAG_N = NFLAG_8(res);\r |
6589 | FLAG_Z = res;\r |
6590 | FLAG_V = VFLAG_CLEAR;\r |
6591 | FLAG_C = CFLAG_CLEAR;\r |
6592 | }\r |
6593 | \r |
6594 | \r |
6595 | void m68k_op_move_8_aw_pcdi(void)\r |
6596 | {\r |
6597 | uint res = OPER_PCDI_8();\r |
6598 | uint ea = EA_AW_8();\r |
6599 | \r |
6600 | m68ki_write_8(ea, res);\r |
6601 | \r |
6602 | FLAG_N = NFLAG_8(res);\r |
6603 | FLAG_Z = res;\r |
6604 | FLAG_V = VFLAG_CLEAR;\r |
6605 | FLAG_C = CFLAG_CLEAR;\r |
6606 | }\r |
6607 | \r |
6608 | \r |
6609 | void m68k_op_move_8_aw_pcix(void)\r |
6610 | {\r |
6611 | uint res = OPER_PCIX_8();\r |
6612 | uint ea = EA_AW_8();\r |
6613 | \r |
6614 | m68ki_write_8(ea, res);\r |
6615 | \r |
6616 | FLAG_N = NFLAG_8(res);\r |
6617 | FLAG_Z = res;\r |
6618 | FLAG_V = VFLAG_CLEAR;\r |
6619 | FLAG_C = CFLAG_CLEAR;\r |
6620 | }\r |
6621 | \r |
6622 | \r |
6623 | void m68k_op_move_8_aw_i(void)\r |
6624 | {\r |
6625 | uint res = OPER_I_8();\r |
6626 | uint ea = EA_AW_8();\r |
6627 | \r |
6628 | m68ki_write_8(ea, res);\r |
6629 | \r |
6630 | FLAG_N = NFLAG_8(res);\r |
6631 | FLAG_Z = res;\r |
6632 | FLAG_V = VFLAG_CLEAR;\r |
6633 | FLAG_C = CFLAG_CLEAR;\r |
6634 | }\r |
6635 | \r |
6636 | \r |
6637 | void m68k_op_move_8_al_d(void)\r |
6638 | {\r |
6639 | uint res = MASK_OUT_ABOVE_8(DY);\r |
6640 | uint ea = EA_AL_8();\r |
6641 | \r |
6642 | m68ki_write_8(ea, res);\r |
6643 | \r |
6644 | FLAG_N = NFLAG_8(res);\r |
6645 | FLAG_Z = res;\r |
6646 | FLAG_V = VFLAG_CLEAR;\r |
6647 | FLAG_C = CFLAG_CLEAR;\r |
6648 | }\r |
6649 | \r |
6650 | \r |
6651 | void m68k_op_move_8_al_ai(void)\r |
6652 | {\r |
6653 | uint res = OPER_AY_AI_8();\r |
6654 | uint ea = EA_AL_8();\r |
6655 | \r |
6656 | m68ki_write_8(ea, res);\r |
6657 | \r |
6658 | FLAG_N = NFLAG_8(res);\r |
6659 | FLAG_Z = res;\r |
6660 | FLAG_V = VFLAG_CLEAR;\r |
6661 | FLAG_C = CFLAG_CLEAR;\r |
6662 | }\r |
6663 | \r |
6664 | \r |
6665 | void m68k_op_move_8_al_pi(void)\r |
6666 | {\r |
6667 | uint res = OPER_AY_PI_8();\r |
6668 | uint ea = EA_AL_8();\r |
6669 | \r |
6670 | m68ki_write_8(ea, res);\r |
6671 | \r |
6672 | FLAG_N = NFLAG_8(res);\r |
6673 | FLAG_Z = res;\r |
6674 | FLAG_V = VFLAG_CLEAR;\r |
6675 | FLAG_C = CFLAG_CLEAR;\r |
6676 | }\r |
6677 | \r |
6678 | \r |
6679 | void m68k_op_move_8_al_pi7(void)\r |
6680 | {\r |
6681 | uint res = OPER_A7_PI_8();\r |
6682 | uint ea = EA_AL_8();\r |
6683 | \r |
6684 | m68ki_write_8(ea, res);\r |
6685 | \r |
6686 | FLAG_N = NFLAG_8(res);\r |
6687 | FLAG_Z = res;\r |
6688 | FLAG_V = VFLAG_CLEAR;\r |
6689 | FLAG_C = CFLAG_CLEAR;\r |
6690 | }\r |
6691 | \r |
6692 | \r |
6693 | void m68k_op_move_8_al_pd(void)\r |
6694 | {\r |
6695 | uint res = OPER_AY_PD_8();\r |
6696 | uint ea = EA_AL_8();\r |
6697 | \r |
6698 | m68ki_write_8(ea, res);\r |
6699 | \r |
6700 | FLAG_N = NFLAG_8(res);\r |
6701 | FLAG_Z = res;\r |
6702 | FLAG_V = VFLAG_CLEAR;\r |
6703 | FLAG_C = CFLAG_CLEAR;\r |
6704 | }\r |
6705 | \r |
6706 | \r |
6707 | void m68k_op_move_8_al_pd7(void)\r |
6708 | {\r |
6709 | uint res = OPER_A7_PD_8();\r |
6710 | uint ea = EA_AL_8();\r |
6711 | \r |
6712 | m68ki_write_8(ea, res);\r |
6713 | \r |
6714 | FLAG_N = NFLAG_8(res);\r |
6715 | FLAG_Z = res;\r |
6716 | FLAG_V = VFLAG_CLEAR;\r |
6717 | FLAG_C = CFLAG_CLEAR;\r |
6718 | }\r |
6719 | \r |
6720 | \r |
6721 | void m68k_op_move_8_al_di(void)\r |
6722 | {\r |
6723 | uint res = OPER_AY_DI_8();\r |
6724 | uint ea = EA_AL_8();\r |
6725 | \r |
6726 | m68ki_write_8(ea, res);\r |
6727 | \r |
6728 | FLAG_N = NFLAG_8(res);\r |
6729 | FLAG_Z = res;\r |
6730 | FLAG_V = VFLAG_CLEAR;\r |
6731 | FLAG_C = CFLAG_CLEAR;\r |
6732 | }\r |
6733 | \r |
6734 | \r |
6735 | void m68k_op_move_8_al_ix(void)\r |
6736 | {\r |
6737 | uint res = OPER_AY_IX_8();\r |
6738 | uint ea = EA_AL_8();\r |
6739 | \r |
6740 | m68ki_write_8(ea, res);\r |
6741 | \r |
6742 | FLAG_N = NFLAG_8(res);\r |
6743 | FLAG_Z = res;\r |
6744 | FLAG_V = VFLAG_CLEAR;\r |
6745 | FLAG_C = CFLAG_CLEAR;\r |
6746 | }\r |
6747 | \r |
6748 | \r |
6749 | void m68k_op_move_8_al_aw(void)\r |
6750 | {\r |
6751 | uint res = OPER_AW_8();\r |
6752 | uint ea = EA_AL_8();\r |
6753 | \r |
6754 | m68ki_write_8(ea, res);\r |
6755 | \r |
6756 | FLAG_N = NFLAG_8(res);\r |
6757 | FLAG_Z = res;\r |
6758 | FLAG_V = VFLAG_CLEAR;\r |
6759 | FLAG_C = CFLAG_CLEAR;\r |
6760 | }\r |
6761 | \r |
6762 | \r |
6763 | void m68k_op_move_8_al_al(void)\r |
6764 | {\r |
6765 | uint res = OPER_AL_8();\r |
6766 | uint ea = EA_AL_8();\r |
6767 | \r |
6768 | m68ki_write_8(ea, res);\r |
6769 | \r |
6770 | FLAG_N = NFLAG_8(res);\r |
6771 | FLAG_Z = res;\r |
6772 | FLAG_V = VFLAG_CLEAR;\r |
6773 | FLAG_C = CFLAG_CLEAR;\r |
6774 | }\r |
6775 | \r |
6776 | \r |
6777 | void m68k_op_move_8_al_pcdi(void)\r |
6778 | {\r |
6779 | uint res = OPER_PCDI_8();\r |
6780 | uint ea = EA_AL_8();\r |
6781 | \r |
6782 | m68ki_write_8(ea, res);\r |
6783 | \r |
6784 | FLAG_N = NFLAG_8(res);\r |
6785 | FLAG_Z = res;\r |
6786 | FLAG_V = VFLAG_CLEAR;\r |
6787 | FLAG_C = CFLAG_CLEAR;\r |
6788 | }\r |
6789 | \r |
6790 | \r |
6791 | void m68k_op_move_8_al_pcix(void)\r |
6792 | {\r |
6793 | uint res = OPER_PCIX_8();\r |
6794 | uint ea = EA_AL_8();\r |
6795 | \r |
6796 | m68ki_write_8(ea, res);\r |
6797 | \r |
6798 | FLAG_N = NFLAG_8(res);\r |
6799 | FLAG_Z = res;\r |
6800 | FLAG_V = VFLAG_CLEAR;\r |
6801 | FLAG_C = CFLAG_CLEAR;\r |
6802 | }\r |
6803 | \r |
6804 | \r |
6805 | void m68k_op_move_8_al_i(void)\r |
6806 | {\r |
6807 | uint res = OPER_I_8();\r |
6808 | uint ea = EA_AL_8();\r |
6809 | \r |
6810 | m68ki_write_8(ea, res);\r |
6811 | \r |
6812 | FLAG_N = NFLAG_8(res);\r |
6813 | FLAG_Z = res;\r |
6814 | FLAG_V = VFLAG_CLEAR;\r |
6815 | FLAG_C = CFLAG_CLEAR;\r |
6816 | }\r |
6817 | \r |
6818 | \r |
6819 | void m68k_op_move_16_d_d(void)\r |
6820 | {\r |
6821 | uint res = MASK_OUT_ABOVE_16(DY);\r |
6822 | uint* r_dst = &DX;\r |
6823 | \r |
6824 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6825 | \r |
6826 | FLAG_N = NFLAG_16(res);\r |
6827 | FLAG_Z = res;\r |
6828 | FLAG_V = VFLAG_CLEAR;\r |
6829 | FLAG_C = CFLAG_CLEAR;\r |
6830 | }\r |
6831 | \r |
6832 | \r |
6833 | void m68k_op_move_16_d_a(void)\r |
6834 | {\r |
6835 | uint res = MASK_OUT_ABOVE_16(AY);\r |
6836 | uint* r_dst = &DX;\r |
6837 | \r |
6838 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6839 | \r |
6840 | FLAG_N = NFLAG_16(res);\r |
6841 | FLAG_Z = res;\r |
6842 | FLAG_V = VFLAG_CLEAR;\r |
6843 | FLAG_C = CFLAG_CLEAR;\r |
6844 | }\r |
6845 | \r |
6846 | \r |
6847 | void m68k_op_move_16_d_ai(void)\r |
6848 | {\r |
6849 | uint res = OPER_AY_AI_16();\r |
6850 | uint* r_dst = &DX;\r |
6851 | \r |
6852 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6853 | \r |
6854 | FLAG_N = NFLAG_16(res);\r |
6855 | FLAG_Z = res;\r |
6856 | FLAG_V = VFLAG_CLEAR;\r |
6857 | FLAG_C = CFLAG_CLEAR;\r |
6858 | }\r |
6859 | \r |
6860 | \r |
6861 | void m68k_op_move_16_d_pi(void)\r |
6862 | {\r |
6863 | uint res = OPER_AY_PI_16();\r |
6864 | uint* r_dst = &DX;\r |
6865 | \r |
6866 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6867 | \r |
6868 | FLAG_N = NFLAG_16(res);\r |
6869 | FLAG_Z = res;\r |
6870 | FLAG_V = VFLAG_CLEAR;\r |
6871 | FLAG_C = CFLAG_CLEAR;\r |
6872 | }\r |
6873 | \r |
6874 | \r |
6875 | void m68k_op_move_16_d_pd(void)\r |
6876 | {\r |
6877 | uint res = OPER_AY_PD_16();\r |
6878 | uint* r_dst = &DX;\r |
6879 | \r |
6880 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6881 | \r |
6882 | FLAG_N = NFLAG_16(res);\r |
6883 | FLAG_Z = res;\r |
6884 | FLAG_V = VFLAG_CLEAR;\r |
6885 | FLAG_C = CFLAG_CLEAR;\r |
6886 | }\r |
6887 | \r |
6888 | \r |
6889 | void m68k_op_move_16_d_di(void)\r |
6890 | {\r |
6891 | uint res = OPER_AY_DI_16();\r |
6892 | uint* r_dst = &DX;\r |
6893 | \r |
6894 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6895 | \r |
6896 | FLAG_N = NFLAG_16(res);\r |
6897 | FLAG_Z = res;\r |
6898 | FLAG_V = VFLAG_CLEAR;\r |
6899 | FLAG_C = CFLAG_CLEAR;\r |
6900 | }\r |
6901 | \r |
6902 | \r |
6903 | void m68k_op_move_16_d_ix(void)\r |
6904 | {\r |
6905 | uint res = OPER_AY_IX_16();\r |
6906 | uint* r_dst = &DX;\r |
6907 | \r |
6908 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6909 | \r |
6910 | FLAG_N = NFLAG_16(res);\r |
6911 | FLAG_Z = res;\r |
6912 | FLAG_V = VFLAG_CLEAR;\r |
6913 | FLAG_C = CFLAG_CLEAR;\r |
6914 | }\r |
6915 | \r |
6916 | \r |
6917 | void m68k_op_move_16_d_aw(void)\r |
6918 | {\r |
6919 | uint res = OPER_AW_16();\r |
6920 | uint* r_dst = &DX;\r |
6921 | \r |
6922 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6923 | \r |
6924 | FLAG_N = NFLAG_16(res);\r |
6925 | FLAG_Z = res;\r |
6926 | FLAG_V = VFLAG_CLEAR;\r |
6927 | FLAG_C = CFLAG_CLEAR;\r |
6928 | }\r |
6929 | \r |
6930 | \r |
6931 | void m68k_op_move_16_d_al(void)\r |
6932 | {\r |
6933 | uint res = OPER_AL_16();\r |
6934 | uint* r_dst = &DX;\r |
6935 | \r |
6936 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6937 | \r |
6938 | FLAG_N = NFLAG_16(res);\r |
6939 | FLAG_Z = res;\r |
6940 | FLAG_V = VFLAG_CLEAR;\r |
6941 | FLAG_C = CFLAG_CLEAR;\r |
6942 | }\r |
6943 | \r |
6944 | \r |
6945 | void m68k_op_move_16_d_pcdi(void)\r |
6946 | {\r |
6947 | uint res = OPER_PCDI_16();\r |
6948 | uint* r_dst = &DX;\r |
6949 | \r |
6950 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6951 | \r |
6952 | FLAG_N = NFLAG_16(res);\r |
6953 | FLAG_Z = res;\r |
6954 | FLAG_V = VFLAG_CLEAR;\r |
6955 | FLAG_C = CFLAG_CLEAR;\r |
6956 | }\r |
6957 | \r |
6958 | \r |
6959 | void m68k_op_move_16_d_pcix(void)\r |
6960 | {\r |
6961 | uint res = OPER_PCIX_16();\r |
6962 | uint* r_dst = &DX;\r |
6963 | \r |
6964 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6965 | \r |
6966 | FLAG_N = NFLAG_16(res);\r |
6967 | FLAG_Z = res;\r |
6968 | FLAG_V = VFLAG_CLEAR;\r |
6969 | FLAG_C = CFLAG_CLEAR;\r |
6970 | }\r |
6971 | \r |
6972 | \r |
6973 | void m68k_op_move_16_d_i(void)\r |
6974 | {\r |
6975 | uint res = OPER_I_16();\r |
6976 | uint* r_dst = &DX;\r |
6977 | \r |
6978 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
6979 | \r |
6980 | FLAG_N = NFLAG_16(res);\r |
6981 | FLAG_Z = res;\r |
6982 | FLAG_V = VFLAG_CLEAR;\r |
6983 | FLAG_C = CFLAG_CLEAR;\r |
6984 | }\r |
6985 | \r |
6986 | \r |
6987 | void m68k_op_move_16_ai_d(void)\r |
6988 | {\r |
6989 | uint res = MASK_OUT_ABOVE_16(DY);\r |
6990 | uint ea = EA_AX_AI_16();\r |
6991 | \r |
6992 | m68ki_write_16(ea, res);\r |
6993 | \r |
6994 | FLAG_N = NFLAG_16(res);\r |
6995 | FLAG_Z = res;\r |
6996 | FLAG_V = VFLAG_CLEAR;\r |
6997 | FLAG_C = CFLAG_CLEAR;\r |
6998 | }\r |
6999 | \r |
7000 | \r |
7001 | void m68k_op_move_16_ai_a(void)\r |
7002 | {\r |
7003 | uint res = MASK_OUT_ABOVE_16(AY);\r |
7004 | uint ea = EA_AX_AI_16();\r |
7005 | \r |
7006 | m68ki_write_16(ea, res);\r |
7007 | \r |
7008 | FLAG_N = NFLAG_16(res);\r |
7009 | FLAG_Z = res;\r |
7010 | FLAG_V = VFLAG_CLEAR;\r |
7011 | FLAG_C = CFLAG_CLEAR;\r |
7012 | }\r |
7013 | \r |
7014 | \r |
7015 | void m68k_op_move_16_ai_ai(void)\r |
7016 | {\r |
7017 | uint res = OPER_AY_AI_16();\r |
7018 | uint ea = EA_AX_AI_16();\r |
7019 | \r |
7020 | m68ki_write_16(ea, res);\r |
7021 | \r |
7022 | FLAG_N = NFLAG_16(res);\r |
7023 | FLAG_Z = res;\r |
7024 | FLAG_V = VFLAG_CLEAR;\r |
7025 | FLAG_C = CFLAG_CLEAR;\r |
7026 | }\r |
7027 | \r |
7028 | \r |
7029 | void m68k_op_move_16_ai_pi(void)\r |
7030 | {\r |
7031 | uint res = OPER_AY_PI_16();\r |
7032 | uint ea = EA_AX_AI_16();\r |
7033 | \r |
7034 | m68ki_write_16(ea, res);\r |
7035 | \r |
7036 | FLAG_N = NFLAG_16(res);\r |
7037 | FLAG_Z = res;\r |
7038 | FLAG_V = VFLAG_CLEAR;\r |
7039 | FLAG_C = CFLAG_CLEAR;\r |
7040 | }\r |
7041 | \r |
7042 | \r |
7043 | void m68k_op_move_16_ai_pd(void)\r |
7044 | {\r |
7045 | uint res = OPER_AY_PD_16();\r |
7046 | uint ea = EA_AX_AI_16();\r |
7047 | \r |
7048 | m68ki_write_16(ea, res);\r |
7049 | \r |
7050 | FLAG_N = NFLAG_16(res);\r |
7051 | FLAG_Z = res;\r |
7052 | FLAG_V = VFLAG_CLEAR;\r |
7053 | FLAG_C = CFLAG_CLEAR;\r |
7054 | }\r |
7055 | \r |
7056 | \r |
7057 | void m68k_op_move_16_ai_di(void)\r |
7058 | {\r |
7059 | uint res = OPER_AY_DI_16();\r |
7060 | uint ea = EA_AX_AI_16();\r |
7061 | \r |
7062 | m68ki_write_16(ea, res);\r |
7063 | \r |
7064 | FLAG_N = NFLAG_16(res);\r |
7065 | FLAG_Z = res;\r |
7066 | FLAG_V = VFLAG_CLEAR;\r |
7067 | FLAG_C = CFLAG_CLEAR;\r |
7068 | }\r |
7069 | \r |
7070 | \r |
7071 | void m68k_op_move_16_ai_ix(void)\r |
7072 | {\r |
7073 | uint res = OPER_AY_IX_16();\r |
7074 | uint ea = EA_AX_AI_16();\r |
7075 | \r |
7076 | m68ki_write_16(ea, res);\r |
7077 | \r |
7078 | FLAG_N = NFLAG_16(res);\r |
7079 | FLAG_Z = res;\r |
7080 | FLAG_V = VFLAG_CLEAR;\r |
7081 | FLAG_C = CFLAG_CLEAR;\r |
7082 | }\r |
7083 | \r |
7084 | \r |
7085 | void m68k_op_move_16_ai_aw(void)\r |
7086 | {\r |
7087 | uint res = OPER_AW_16();\r |
7088 | uint ea = EA_AX_AI_16();\r |
7089 | \r |
7090 | m68ki_write_16(ea, res);\r |
7091 | \r |
7092 | FLAG_N = NFLAG_16(res);\r |
7093 | FLAG_Z = res;\r |
7094 | FLAG_V = VFLAG_CLEAR;\r |
7095 | FLAG_C = CFLAG_CLEAR;\r |
7096 | }\r |
7097 | \r |
7098 | \r |
7099 | void m68k_op_move_16_ai_al(void)\r |
7100 | {\r |
7101 | uint res = OPER_AL_16();\r |
7102 | uint ea = EA_AX_AI_16();\r |
7103 | \r |
7104 | m68ki_write_16(ea, res);\r |
7105 | \r |
7106 | FLAG_N = NFLAG_16(res);\r |
7107 | FLAG_Z = res;\r |
7108 | FLAG_V = VFLAG_CLEAR;\r |
7109 | FLAG_C = CFLAG_CLEAR;\r |
7110 | }\r |
7111 | \r |
7112 | \r |
7113 | void m68k_op_move_16_ai_pcdi(void)\r |
7114 | {\r |
7115 | uint res = OPER_PCDI_16();\r |
7116 | uint ea = EA_AX_AI_16();\r |
7117 | \r |
7118 | m68ki_write_16(ea, res);\r |
7119 | \r |
7120 | FLAG_N = NFLAG_16(res);\r |
7121 | FLAG_Z = res;\r |
7122 | FLAG_V = VFLAG_CLEAR;\r |
7123 | FLAG_C = CFLAG_CLEAR;\r |
7124 | }\r |
7125 | \r |
7126 | \r |
7127 | void m68k_op_move_16_ai_pcix(void)\r |
7128 | {\r |
7129 | uint res = OPER_PCIX_16();\r |
7130 | uint ea = EA_AX_AI_16();\r |
7131 | \r |
7132 | m68ki_write_16(ea, res);\r |
7133 | \r |
7134 | FLAG_N = NFLAG_16(res);\r |
7135 | FLAG_Z = res;\r |
7136 | FLAG_V = VFLAG_CLEAR;\r |
7137 | FLAG_C = CFLAG_CLEAR;\r |
7138 | }\r |
7139 | \r |
7140 | \r |
7141 | void m68k_op_move_16_ai_i(void)\r |
7142 | {\r |
7143 | uint res = OPER_I_16();\r |
7144 | uint ea = EA_AX_AI_16();\r |
7145 | \r |
7146 | m68ki_write_16(ea, res);\r |
7147 | \r |
7148 | FLAG_N = NFLAG_16(res);\r |
7149 | FLAG_Z = res;\r |
7150 | FLAG_V = VFLAG_CLEAR;\r |
7151 | FLAG_C = CFLAG_CLEAR;\r |
7152 | }\r |
7153 | \r |
7154 | \r |
7155 | void m68k_op_move_16_pi_d(void)\r |
7156 | {\r |
7157 | uint res = MASK_OUT_ABOVE_16(DY);\r |
7158 | uint ea = EA_AX_PI_16();\r |
7159 | \r |
7160 | m68ki_write_16(ea, res);\r |
7161 | \r |
7162 | FLAG_N = NFLAG_16(res);\r |
7163 | FLAG_Z = res;\r |
7164 | FLAG_V = VFLAG_CLEAR;\r |
7165 | FLAG_C = CFLAG_CLEAR;\r |
7166 | }\r |
7167 | \r |
7168 | \r |
7169 | void m68k_op_move_16_pi_a(void)\r |
7170 | {\r |
7171 | uint res = MASK_OUT_ABOVE_16(AY);\r |
7172 | uint ea = EA_AX_PI_16();\r |
7173 | \r |
7174 | m68ki_write_16(ea, res);\r |
7175 | \r |
7176 | FLAG_N = NFLAG_16(res);\r |
7177 | FLAG_Z = res;\r |
7178 | FLAG_V = VFLAG_CLEAR;\r |
7179 | FLAG_C = CFLAG_CLEAR;\r |
7180 | }\r |
7181 | \r |
7182 | \r |
7183 | void m68k_op_move_16_pi_ai(void)\r |
7184 | {\r |
7185 | uint res = OPER_AY_AI_16();\r |
7186 | uint ea = EA_AX_PI_16();\r |
7187 | \r |
7188 | m68ki_write_16(ea, res);\r |
7189 | \r |
7190 | FLAG_N = NFLAG_16(res);\r |
7191 | FLAG_Z = res;\r |
7192 | FLAG_V = VFLAG_CLEAR;\r |
7193 | FLAG_C = CFLAG_CLEAR;\r |
7194 | }\r |
7195 | \r |
7196 | \r |
7197 | void m68k_op_move_16_pi_pi(void)\r |
7198 | {\r |
7199 | uint res = OPER_AY_PI_16();\r |
7200 | uint ea = EA_AX_PI_16();\r |
7201 | \r |
7202 | m68ki_write_16(ea, res);\r |
7203 | \r |
7204 | FLAG_N = NFLAG_16(res);\r |
7205 | FLAG_Z = res;\r |
7206 | FLAG_V = VFLAG_CLEAR;\r |
7207 | FLAG_C = CFLAG_CLEAR;\r |
7208 | }\r |
7209 | \r |
7210 | \r |
7211 | void m68k_op_move_16_pi_pd(void)\r |
7212 | {\r |
7213 | uint res = OPER_AY_PD_16();\r |
7214 | uint ea = EA_AX_PI_16();\r |
7215 | \r |
7216 | m68ki_write_16(ea, res);\r |
7217 | \r |
7218 | FLAG_N = NFLAG_16(res);\r |
7219 | FLAG_Z = res;\r |
7220 | FLAG_V = VFLAG_CLEAR;\r |
7221 | FLAG_C = CFLAG_CLEAR;\r |
7222 | }\r |
7223 | \r |
7224 | \r |
7225 | void m68k_op_move_16_pi_di(void)\r |
7226 | {\r |
7227 | uint res = OPER_AY_DI_16();\r |
7228 | uint ea = EA_AX_PI_16();\r |
7229 | \r |
7230 | m68ki_write_16(ea, res);\r |
7231 | \r |
7232 | FLAG_N = NFLAG_16(res);\r |
7233 | FLAG_Z = res;\r |
7234 | FLAG_V = VFLAG_CLEAR;\r |
7235 | FLAG_C = CFLAG_CLEAR;\r |
7236 | }\r |
7237 | \r |
7238 | \r |
7239 | void m68k_op_move_16_pi_ix(void)\r |
7240 | {\r |
7241 | uint res = OPER_AY_IX_16();\r |
7242 | uint ea = EA_AX_PI_16();\r |
7243 | \r |
7244 | m68ki_write_16(ea, res);\r |
7245 | \r |
7246 | FLAG_N = NFLAG_16(res);\r |
7247 | FLAG_Z = res;\r |
7248 | FLAG_V = VFLAG_CLEAR;\r |
7249 | FLAG_C = CFLAG_CLEAR;\r |
7250 | }\r |
7251 | \r |
7252 | \r |
7253 | void m68k_op_move_16_pi_aw(void)\r |
7254 | {\r |
7255 | uint res = OPER_AW_16();\r |
7256 | uint ea = EA_AX_PI_16();\r |
7257 | \r |
7258 | m68ki_write_16(ea, res);\r |
7259 | \r |
7260 | FLAG_N = NFLAG_16(res);\r |
7261 | FLAG_Z = res;\r |
7262 | FLAG_V = VFLAG_CLEAR;\r |
7263 | FLAG_C = CFLAG_CLEAR;\r |
7264 | }\r |
7265 | \r |
7266 | \r |
7267 | void m68k_op_move_16_pi_al(void)\r |
7268 | {\r |
7269 | uint res = OPER_AL_16();\r |
7270 | uint ea = EA_AX_PI_16();\r |
7271 | \r |
7272 | m68ki_write_16(ea, res);\r |
7273 | \r |
7274 | FLAG_N = NFLAG_16(res);\r |
7275 | FLAG_Z = res;\r |
7276 | FLAG_V = VFLAG_CLEAR;\r |
7277 | FLAG_C = CFLAG_CLEAR;\r |
7278 | }\r |
7279 | \r |
7280 | \r |
7281 | void m68k_op_move_16_pi_pcdi(void)\r |
7282 | {\r |
7283 | uint res = OPER_PCDI_16();\r |
7284 | uint ea = EA_AX_PI_16();\r |
7285 | \r |
7286 | m68ki_write_16(ea, res);\r |
7287 | \r |
7288 | FLAG_N = NFLAG_16(res);\r |
7289 | FLAG_Z = res;\r |
7290 | FLAG_V = VFLAG_CLEAR;\r |
7291 | FLAG_C = CFLAG_CLEAR;\r |
7292 | }\r |
7293 | \r |
7294 | \r |
7295 | void m68k_op_move_16_pi_pcix(void)\r |
7296 | {\r |
7297 | uint res = OPER_PCIX_16();\r |
7298 | uint ea = EA_AX_PI_16();\r |
7299 | \r |
7300 | m68ki_write_16(ea, res);\r |
7301 | \r |
7302 | FLAG_N = NFLAG_16(res);\r |
7303 | FLAG_Z = res;\r |
7304 | FLAG_V = VFLAG_CLEAR;\r |
7305 | FLAG_C = CFLAG_CLEAR;\r |
7306 | }\r |
7307 | \r |
7308 | \r |
7309 | void m68k_op_move_16_pi_i(void)\r |
7310 | {\r |
7311 | uint res = OPER_I_16();\r |
7312 | uint ea = EA_AX_PI_16();\r |
7313 | \r |
7314 | m68ki_write_16(ea, res);\r |
7315 | \r |
7316 | FLAG_N = NFLAG_16(res);\r |
7317 | FLAG_Z = res;\r |
7318 | FLAG_V = VFLAG_CLEAR;\r |
7319 | FLAG_C = CFLAG_CLEAR;\r |
7320 | }\r |
7321 | \r |
7322 | \r |
7323 | void m68k_op_move_16_pd_d(void)\r |
7324 | {\r |
7325 | uint res = MASK_OUT_ABOVE_16(DY);\r |
7326 | uint ea = EA_AX_PD_16();\r |
7327 | \r |
7328 | m68ki_write_16(ea, res);\r |
7329 | \r |
7330 | FLAG_N = NFLAG_16(res);\r |
7331 | FLAG_Z = res;\r |
7332 | FLAG_V = VFLAG_CLEAR;\r |
7333 | FLAG_C = CFLAG_CLEAR;\r |
7334 | }\r |
7335 | \r |
7336 | \r |
7337 | void m68k_op_move_16_pd_a(void)\r |
7338 | {\r |
7339 | uint res = MASK_OUT_ABOVE_16(AY);\r |
7340 | uint ea = EA_AX_PD_16();\r |
7341 | \r |
7342 | m68ki_write_16(ea, res);\r |
7343 | \r |
7344 | FLAG_N = NFLAG_16(res);\r |
7345 | FLAG_Z = res;\r |
7346 | FLAG_V = VFLAG_CLEAR;\r |
7347 | FLAG_C = CFLAG_CLEAR;\r |
7348 | }\r |
7349 | \r |
7350 | \r |
7351 | void m68k_op_move_16_pd_ai(void)\r |
7352 | {\r |
7353 | uint res = OPER_AY_AI_16();\r |
7354 | uint ea = EA_AX_PD_16();\r |
7355 | \r |
7356 | m68ki_write_16(ea, res);\r |
7357 | \r |
7358 | FLAG_N = NFLAG_16(res);\r |
7359 | FLAG_Z = res;\r |
7360 | FLAG_V = VFLAG_CLEAR;\r |
7361 | FLAG_C = CFLAG_CLEAR;\r |
7362 | }\r |
7363 | \r |
7364 | \r |
7365 | void m68k_op_move_16_pd_pi(void)\r |
7366 | {\r |
7367 | uint res = OPER_AY_PI_16();\r |
7368 | uint ea = EA_AX_PD_16();\r |
7369 | \r |
7370 | m68ki_write_16(ea, res);\r |
7371 | \r |
7372 | FLAG_N = NFLAG_16(res);\r |
7373 | FLAG_Z = res;\r |
7374 | FLAG_V = VFLAG_CLEAR;\r |
7375 | FLAG_C = CFLAG_CLEAR;\r |
7376 | }\r |
7377 | \r |
7378 | \r |
7379 | void m68k_op_move_16_pd_pd(void)\r |
7380 | {\r |
7381 | uint res = OPER_AY_PD_16();\r |
7382 | uint ea = EA_AX_PD_16();\r |
7383 | \r |
7384 | m68ki_write_16(ea, res);\r |
7385 | \r |
7386 | FLAG_N = NFLAG_16(res);\r |
7387 | FLAG_Z = res;\r |
7388 | FLAG_V = VFLAG_CLEAR;\r |
7389 | FLAG_C = CFLAG_CLEAR;\r |
7390 | }\r |
7391 | \r |
7392 | \r |
7393 | void m68k_op_move_16_pd_di(void)\r |
7394 | {\r |
7395 | uint res = OPER_AY_DI_16();\r |
7396 | uint ea = EA_AX_PD_16();\r |
7397 | \r |
7398 | m68ki_write_16(ea, res);\r |
7399 | \r |
7400 | FLAG_N = NFLAG_16(res);\r |
7401 | FLAG_Z = res;\r |
7402 | FLAG_V = VFLAG_CLEAR;\r |
7403 | FLAG_C = CFLAG_CLEAR;\r |
7404 | }\r |
7405 | \r |
7406 | \r |
7407 | void m68k_op_move_16_pd_ix(void)\r |
7408 | {\r |
7409 | uint res = OPER_AY_IX_16();\r |
7410 | uint ea = EA_AX_PD_16();\r |
7411 | \r |
7412 | m68ki_write_16(ea, res);\r |
7413 | \r |
7414 | FLAG_N = NFLAG_16(res);\r |
7415 | FLAG_Z = res;\r |
7416 | FLAG_V = VFLAG_CLEAR;\r |
7417 | FLAG_C = CFLAG_CLEAR;\r |
7418 | }\r |
7419 | \r |
7420 | \r |
7421 | void m68k_op_move_16_pd_aw(void)\r |
7422 | {\r |
7423 | uint res = OPER_AW_16();\r |
7424 | uint ea = EA_AX_PD_16();\r |
7425 | \r |
7426 | m68ki_write_16(ea, res);\r |
7427 | \r |
7428 | FLAG_N = NFLAG_16(res);\r |
7429 | FLAG_Z = res;\r |
7430 | FLAG_V = VFLAG_CLEAR;\r |
7431 | FLAG_C = CFLAG_CLEAR;\r |
7432 | }\r |
7433 | \r |
7434 | \r |
7435 | void m68k_op_move_16_pd_al(void)\r |
7436 | {\r |
7437 | uint res = OPER_AL_16();\r |
7438 | uint ea = EA_AX_PD_16();\r |
7439 | \r |
7440 | m68ki_write_16(ea, res);\r |
7441 | \r |
7442 | FLAG_N = NFLAG_16(res);\r |
7443 | FLAG_Z = res;\r |
7444 | FLAG_V = VFLAG_CLEAR;\r |
7445 | FLAG_C = CFLAG_CLEAR;\r |
7446 | }\r |
7447 | \r |
7448 | \r |
7449 | void m68k_op_move_16_pd_pcdi(void)\r |
7450 | {\r |
7451 | uint res = OPER_PCDI_16();\r |
7452 | uint ea = EA_AX_PD_16();\r |
7453 | \r |
7454 | m68ki_write_16(ea, res);\r |
7455 | \r |
7456 | FLAG_N = NFLAG_16(res);\r |
7457 | FLAG_Z = res;\r |
7458 | FLAG_V = VFLAG_CLEAR;\r |
7459 | FLAG_C = CFLAG_CLEAR;\r |
7460 | }\r |
7461 | \r |
7462 | \r |
7463 | void m68k_op_move_16_pd_pcix(void)\r |
7464 | {\r |
7465 | uint res = OPER_PCIX_16();\r |
7466 | uint ea = EA_AX_PD_16();\r |
7467 | \r |
7468 | m68ki_write_16(ea, res);\r |
7469 | \r |
7470 | FLAG_N = NFLAG_16(res);\r |
7471 | FLAG_Z = res;\r |
7472 | FLAG_V = VFLAG_CLEAR;\r |
7473 | FLAG_C = CFLAG_CLEAR;\r |
7474 | }\r |
7475 | \r |
7476 | \r |
7477 | void m68k_op_move_16_pd_i(void)\r |
7478 | {\r |
7479 | uint res = OPER_I_16();\r |
7480 | uint ea = EA_AX_PD_16();\r |
7481 | \r |
7482 | m68ki_write_16(ea, res);\r |
7483 | \r |
7484 | FLAG_N = NFLAG_16(res);\r |
7485 | FLAG_Z = res;\r |
7486 | FLAG_V = VFLAG_CLEAR;\r |
7487 | FLAG_C = CFLAG_CLEAR;\r |
7488 | }\r |
7489 | \r |
7490 | \r |
7491 | void m68k_op_move_16_di_d(void)\r |
7492 | {\r |
7493 | uint res = MASK_OUT_ABOVE_16(DY);\r |
7494 | uint ea = EA_AX_DI_16();\r |
7495 | \r |
7496 | m68ki_write_16(ea, res);\r |
7497 | \r |
7498 | FLAG_N = NFLAG_16(res);\r |
7499 | FLAG_Z = res;\r |
7500 | FLAG_V = VFLAG_CLEAR;\r |
7501 | FLAG_C = CFLAG_CLEAR;\r |
7502 | }\r |
7503 | \r |
7504 | \r |
7505 | void m68k_op_move_16_di_a(void)\r |
7506 | {\r |
7507 | uint res = MASK_OUT_ABOVE_16(AY);\r |
7508 | uint ea = EA_AX_DI_16();\r |
7509 | \r |
7510 | m68ki_write_16(ea, res);\r |
7511 | \r |
7512 | FLAG_N = NFLAG_16(res);\r |
7513 | FLAG_Z = res;\r |
7514 | FLAG_V = VFLAG_CLEAR;\r |
7515 | FLAG_C = CFLAG_CLEAR;\r |
7516 | }\r |
7517 | \r |
7518 | \r |
7519 | void m68k_op_move_16_di_ai(void)\r |
7520 | {\r |
7521 | uint res = OPER_AY_AI_16();\r |
7522 | uint ea = EA_AX_DI_16();\r |
7523 | \r |
7524 | m68ki_write_16(ea, res);\r |
7525 | \r |
7526 | FLAG_N = NFLAG_16(res);\r |
7527 | FLAG_Z = res;\r |
7528 | FLAG_V = VFLAG_CLEAR;\r |
7529 | FLAG_C = CFLAG_CLEAR;\r |
7530 | }\r |
7531 | \r |
7532 | \r |
7533 | void m68k_op_move_16_di_pi(void)\r |
7534 | {\r |
7535 | uint res = OPER_AY_PI_16();\r |
7536 | uint ea = EA_AX_DI_16();\r |
7537 | \r |
7538 | m68ki_write_16(ea, res);\r |
7539 | \r |
7540 | FLAG_N = NFLAG_16(res);\r |
7541 | FLAG_Z = res;\r |
7542 | FLAG_V = VFLAG_CLEAR;\r |
7543 | FLAG_C = CFLAG_CLEAR;\r |
7544 | }\r |
7545 | \r |
7546 | \r |
7547 | void m68k_op_move_16_di_pd(void)\r |
7548 | {\r |
7549 | uint res = OPER_AY_PD_16();\r |
7550 | uint ea = EA_AX_DI_16();\r |
7551 | \r |
7552 | m68ki_write_16(ea, res);\r |
7553 | \r |
7554 | FLAG_N = NFLAG_16(res);\r |
7555 | FLAG_Z = res;\r |
7556 | FLAG_V = VFLAG_CLEAR;\r |
7557 | FLAG_C = CFLAG_CLEAR;\r |
7558 | }\r |
7559 | \r |
7560 | \r |
7561 | void m68k_op_move_16_di_di(void)\r |
7562 | {\r |
7563 | uint res = OPER_AY_DI_16();\r |
7564 | uint ea = EA_AX_DI_16();\r |
7565 | \r |
7566 | m68ki_write_16(ea, res);\r |
7567 | \r |
7568 | FLAG_N = NFLAG_16(res);\r |
7569 | FLAG_Z = res;\r |
7570 | FLAG_V = VFLAG_CLEAR;\r |
7571 | FLAG_C = CFLAG_CLEAR;\r |
7572 | }\r |
7573 | \r |
7574 | \r |
7575 | void m68k_op_move_16_di_ix(void)\r |
7576 | {\r |
7577 | uint res = OPER_AY_IX_16();\r |
7578 | uint ea = EA_AX_DI_16();\r |
7579 | \r |
7580 | m68ki_write_16(ea, res);\r |
7581 | \r |
7582 | FLAG_N = NFLAG_16(res);\r |
7583 | FLAG_Z = res;\r |
7584 | FLAG_V = VFLAG_CLEAR;\r |
7585 | FLAG_C = CFLAG_CLEAR;\r |
7586 | }\r |
7587 | \r |
7588 | \r |
7589 | void m68k_op_move_16_di_aw(void)\r |
7590 | {\r |
7591 | uint res = OPER_AW_16();\r |
7592 | uint ea = EA_AX_DI_16();\r |
7593 | \r |
7594 | m68ki_write_16(ea, res);\r |
7595 | \r |
7596 | FLAG_N = NFLAG_16(res);\r |
7597 | FLAG_Z = res;\r |
7598 | FLAG_V = VFLAG_CLEAR;\r |
7599 | FLAG_C = CFLAG_CLEAR;\r |
7600 | }\r |
7601 | \r |
7602 | \r |
7603 | void m68k_op_move_16_di_al(void)\r |
7604 | {\r |
7605 | uint res = OPER_AL_16();\r |
7606 | uint ea = EA_AX_DI_16();\r |
7607 | \r |
7608 | m68ki_write_16(ea, res);\r |
7609 | \r |
7610 | FLAG_N = NFLAG_16(res);\r |
7611 | FLAG_Z = res;\r |
7612 | FLAG_V = VFLAG_CLEAR;\r |
7613 | FLAG_C = CFLAG_CLEAR;\r |
7614 | }\r |
7615 | \r |
7616 | \r |
7617 | void m68k_op_move_16_di_pcdi(void)\r |
7618 | {\r |
7619 | uint res = OPER_PCDI_16();\r |
7620 | uint ea = EA_AX_DI_16();\r |
7621 | \r |
7622 | m68ki_write_16(ea, res);\r |
7623 | \r |
7624 | FLAG_N = NFLAG_16(res);\r |
7625 | FLAG_Z = res;\r |
7626 | FLAG_V = VFLAG_CLEAR;\r |
7627 | FLAG_C = CFLAG_CLEAR;\r |
7628 | }\r |
7629 | \r |
7630 | \r |
7631 | void m68k_op_move_16_di_pcix(void)\r |
7632 | {\r |
7633 | uint res = OPER_PCIX_16();\r |
7634 | uint ea = EA_AX_DI_16();\r |
7635 | \r |
7636 | m68ki_write_16(ea, res);\r |
7637 | \r |
7638 | FLAG_N = NFLAG_16(res);\r |
7639 | FLAG_Z = res;\r |
7640 | FLAG_V = VFLAG_CLEAR;\r |
7641 | FLAG_C = CFLAG_CLEAR;\r |
7642 | }\r |
7643 | \r |
7644 | \r |
7645 | void m68k_op_move_16_di_i(void)\r |
7646 | {\r |
7647 | uint res = OPER_I_16();\r |
7648 | uint ea = EA_AX_DI_16();\r |
7649 | \r |
7650 | m68ki_write_16(ea, res);\r |
7651 | \r |
7652 | FLAG_N = NFLAG_16(res);\r |
7653 | FLAG_Z = res;\r |
7654 | FLAG_V = VFLAG_CLEAR;\r |
7655 | FLAG_C = CFLAG_CLEAR;\r |
7656 | }\r |
7657 | \r |
7658 | \r |
7659 | void m68k_op_move_16_ix_d(void)\r |
7660 | {\r |
7661 | uint res = MASK_OUT_ABOVE_16(DY);\r |
7662 | uint ea = EA_AX_IX_16();\r |
7663 | \r |
7664 | m68ki_write_16(ea, res);\r |
7665 | \r |
7666 | FLAG_N = NFLAG_16(res);\r |
7667 | FLAG_Z = res;\r |
7668 | FLAG_V = VFLAG_CLEAR;\r |
7669 | FLAG_C = CFLAG_CLEAR;\r |
7670 | }\r |
7671 | \r |
7672 | \r |
7673 | void m68k_op_move_16_ix_a(void)\r |
7674 | {\r |
7675 | uint res = MASK_OUT_ABOVE_16(AY);\r |
7676 | uint ea = EA_AX_IX_16();\r |
7677 | \r |
7678 | m68ki_write_16(ea, res);\r |
7679 | \r |
7680 | FLAG_N = NFLAG_16(res);\r |
7681 | FLAG_Z = res;\r |
7682 | FLAG_V = VFLAG_CLEAR;\r |
7683 | FLAG_C = CFLAG_CLEAR;\r |
7684 | }\r |
7685 | \r |
7686 | \r |
7687 | void m68k_op_move_16_ix_ai(void)\r |
7688 | {\r |
7689 | uint res = OPER_AY_AI_16();\r |
7690 | uint ea = EA_AX_IX_16();\r |
7691 | \r |
7692 | m68ki_write_16(ea, res);\r |
7693 | \r |
7694 | FLAG_N = NFLAG_16(res);\r |
7695 | FLAG_Z = res;\r |
7696 | FLAG_V = VFLAG_CLEAR;\r |
7697 | FLAG_C = CFLAG_CLEAR;\r |
7698 | }\r |
7699 | \r |
7700 | \r |
7701 | void m68k_op_move_16_ix_pi(void)\r |
7702 | {\r |
7703 | uint res = OPER_AY_PI_16();\r |
7704 | uint ea = EA_AX_IX_16();\r |
7705 | \r |
7706 | m68ki_write_16(ea, res);\r |
7707 | \r |
7708 | FLAG_N = NFLAG_16(res);\r |
7709 | FLAG_Z = res;\r |
7710 | FLAG_V = VFLAG_CLEAR;\r |
7711 | FLAG_C = CFLAG_CLEAR;\r |
7712 | }\r |
7713 | \r |
7714 | \r |
7715 | void m68k_op_move_16_ix_pd(void)\r |
7716 | {\r |
7717 | uint res = OPER_AY_PD_16();\r |
7718 | uint ea = EA_AX_IX_16();\r |
7719 | \r |
7720 | m68ki_write_16(ea, res);\r |
7721 | \r |
7722 | FLAG_N = NFLAG_16(res);\r |
7723 | FLAG_Z = res;\r |
7724 | FLAG_V = VFLAG_CLEAR;\r |
7725 | FLAG_C = CFLAG_CLEAR;\r |
7726 | }\r |
7727 | \r |
7728 | \r |
7729 | void m68k_op_move_16_ix_di(void)\r |
7730 | {\r |
7731 | uint res = OPER_AY_DI_16();\r |
7732 | uint ea = EA_AX_IX_16();\r |
7733 | \r |
7734 | m68ki_write_16(ea, res);\r |
7735 | \r |
7736 | FLAG_N = NFLAG_16(res);\r |
7737 | FLAG_Z = res;\r |
7738 | FLAG_V = VFLAG_CLEAR;\r |
7739 | FLAG_C = CFLAG_CLEAR;\r |
7740 | }\r |
7741 | \r |
7742 | \r |
7743 | void m68k_op_move_16_ix_ix(void)\r |
7744 | {\r |
7745 | uint res = OPER_AY_IX_16();\r |
7746 | uint ea = EA_AX_IX_16();\r |
7747 | \r |
7748 | m68ki_write_16(ea, res);\r |
7749 | \r |
7750 | FLAG_N = NFLAG_16(res);\r |
7751 | FLAG_Z = res;\r |
7752 | FLAG_V = VFLAG_CLEAR;\r |
7753 | FLAG_C = CFLAG_CLEAR;\r |
7754 | }\r |
7755 | \r |
7756 | \r |
7757 | void m68k_op_move_16_ix_aw(void)\r |
7758 | {\r |
7759 | uint res = OPER_AW_16();\r |
7760 | uint ea = EA_AX_IX_16();\r |
7761 | \r |
7762 | m68ki_write_16(ea, res);\r |
7763 | \r |
7764 | FLAG_N = NFLAG_16(res);\r |
7765 | FLAG_Z = res;\r |
7766 | FLAG_V = VFLAG_CLEAR;\r |
7767 | FLAG_C = CFLAG_CLEAR;\r |
7768 | }\r |
7769 | \r |
7770 | \r |
7771 | void m68k_op_move_16_ix_al(void)\r |
7772 | {\r |
7773 | uint res = OPER_AL_16();\r |
7774 | uint ea = EA_AX_IX_16();\r |
7775 | \r |
7776 | m68ki_write_16(ea, res);\r |
7777 | \r |
7778 | FLAG_N = NFLAG_16(res);\r |
7779 | FLAG_Z = res;\r |
7780 | FLAG_V = VFLAG_CLEAR;\r |
7781 | FLAG_C = CFLAG_CLEAR;\r |
7782 | }\r |
7783 | \r |
7784 | \r |
7785 | void m68k_op_move_16_ix_pcdi(void)\r |
7786 | {\r |
7787 | uint res = OPER_PCDI_16();\r |
7788 | uint ea = EA_AX_IX_16();\r |
7789 | \r |
7790 | m68ki_write_16(ea, res);\r |
7791 | \r |
7792 | FLAG_N = NFLAG_16(res);\r |
7793 | FLAG_Z = res;\r |
7794 | FLAG_V = VFLAG_CLEAR;\r |
7795 | FLAG_C = CFLAG_CLEAR;\r |
7796 | }\r |
7797 | \r |
7798 | \r |
7799 | void m68k_op_move_16_ix_pcix(void)\r |
7800 | {\r |
7801 | uint res = OPER_PCIX_16();\r |
7802 | uint ea = EA_AX_IX_16();\r |
7803 | \r |
7804 | m68ki_write_16(ea, res);\r |
7805 | \r |
7806 | FLAG_N = NFLAG_16(res);\r |
7807 | FLAG_Z = res;\r |
7808 | FLAG_V = VFLAG_CLEAR;\r |
7809 | FLAG_C = CFLAG_CLEAR;\r |
7810 | }\r |
7811 | \r |
7812 | \r |
7813 | void m68k_op_move_16_ix_i(void)\r |
7814 | {\r |
7815 | uint res = OPER_I_16();\r |
7816 | uint ea = EA_AX_IX_16();\r |
7817 | \r |
7818 | m68ki_write_16(ea, res);\r |
7819 | \r |
7820 | FLAG_N = NFLAG_16(res);\r |
7821 | FLAG_Z = res;\r |
7822 | FLAG_V = VFLAG_CLEAR;\r |
7823 | FLAG_C = CFLAG_CLEAR;\r |
7824 | }\r |
7825 | \r |
7826 | \r |
7827 | void m68k_op_move_16_aw_d(void)\r |
7828 | {\r |
7829 | uint res = MASK_OUT_ABOVE_16(DY);\r |
7830 | uint ea = EA_AW_16();\r |
7831 | \r |
7832 | m68ki_write_16(ea, res);\r |
7833 | \r |
7834 | FLAG_N = NFLAG_16(res);\r |
7835 | FLAG_Z = res;\r |
7836 | FLAG_V = VFLAG_CLEAR;\r |
7837 | FLAG_C = CFLAG_CLEAR;\r |
7838 | }\r |
7839 | \r |
7840 | \r |
7841 | void m68k_op_move_16_aw_a(void)\r |
7842 | {\r |
7843 | uint res = MASK_OUT_ABOVE_16(AY);\r |
7844 | uint ea = EA_AW_16();\r |
7845 | \r |
7846 | m68ki_write_16(ea, res);\r |
7847 | \r |
7848 | FLAG_N = NFLAG_16(res);\r |
7849 | FLAG_Z = res;\r |
7850 | FLAG_V = VFLAG_CLEAR;\r |
7851 | FLAG_C = CFLAG_CLEAR;\r |
7852 | }\r |
7853 | \r |
7854 | \r |
7855 | void m68k_op_move_16_aw_ai(void)\r |
7856 | {\r |
7857 | uint res = OPER_AY_AI_16();\r |
7858 | uint ea = EA_AW_16();\r |
7859 | \r |
7860 | m68ki_write_16(ea, res);\r |
7861 | \r |
7862 | FLAG_N = NFLAG_16(res);\r |
7863 | FLAG_Z = res;\r |
7864 | FLAG_V = VFLAG_CLEAR;\r |
7865 | FLAG_C = CFLAG_CLEAR;\r |
7866 | }\r |
7867 | \r |
7868 | \r |
7869 | void m68k_op_move_16_aw_pi(void)\r |
7870 | {\r |
7871 | uint res = OPER_AY_PI_16();\r |
7872 | uint ea = EA_AW_16();\r |
7873 | \r |
7874 | m68ki_write_16(ea, res);\r |
7875 | \r |
7876 | FLAG_N = NFLAG_16(res);\r |
7877 | FLAG_Z = res;\r |
7878 | FLAG_V = VFLAG_CLEAR;\r |
7879 | FLAG_C = CFLAG_CLEAR;\r |
7880 | }\r |
7881 | \r |
7882 | \r |
7883 | void m68k_op_move_16_aw_pd(void)\r |
7884 | {\r |
7885 | uint res = OPER_AY_PD_16();\r |
7886 | uint ea = EA_AW_16();\r |
7887 | \r |
7888 | m68ki_write_16(ea, res);\r |
7889 | \r |
7890 | FLAG_N = NFLAG_16(res);\r |
7891 | FLAG_Z = res;\r |
7892 | FLAG_V = VFLAG_CLEAR;\r |
7893 | FLAG_C = CFLAG_CLEAR;\r |
7894 | }\r |
7895 | \r |
7896 | \r |
7897 | void m68k_op_move_16_aw_di(void)\r |
7898 | {\r |
7899 | uint res = OPER_AY_DI_16();\r |
7900 | uint ea = EA_AW_16();\r |
7901 | \r |
7902 | m68ki_write_16(ea, res);\r |
7903 | \r |
7904 | FLAG_N = NFLAG_16(res);\r |
7905 | FLAG_Z = res;\r |
7906 | FLAG_V = VFLAG_CLEAR;\r |
7907 | FLAG_C = CFLAG_CLEAR;\r |
7908 | }\r |
7909 | \r |
7910 | \r |
7911 | void m68k_op_move_16_aw_ix(void)\r |
7912 | {\r |
7913 | uint res = OPER_AY_IX_16();\r |
7914 | uint ea = EA_AW_16();\r |
7915 | \r |
7916 | m68ki_write_16(ea, res);\r |
7917 | \r |
7918 | FLAG_N = NFLAG_16(res);\r |
7919 | FLAG_Z = res;\r |
7920 | FLAG_V = VFLAG_CLEAR;\r |
7921 | FLAG_C = CFLAG_CLEAR;\r |
7922 | }\r |
7923 | \r |
7924 | \r |
7925 | void m68k_op_move_16_aw_aw(void)\r |
7926 | {\r |
7927 | uint res = OPER_AW_16();\r |
7928 | uint ea = EA_AW_16();\r |
7929 | \r |
7930 | m68ki_write_16(ea, res);\r |
7931 | \r |
7932 | FLAG_N = NFLAG_16(res);\r |
7933 | FLAG_Z = res;\r |
7934 | FLAG_V = VFLAG_CLEAR;\r |
7935 | FLAG_C = CFLAG_CLEAR;\r |
7936 | }\r |
7937 | \r |
7938 | \r |
7939 | void m68k_op_move_16_aw_al(void)\r |
7940 | {\r |
7941 | uint res = OPER_AL_16();\r |
7942 | uint ea = EA_AW_16();\r |
7943 | \r |
7944 | m68ki_write_16(ea, res);\r |
7945 | \r |
7946 | FLAG_N = NFLAG_16(res);\r |
7947 | FLAG_Z = res;\r |
7948 | FLAG_V = VFLAG_CLEAR;\r |
7949 | FLAG_C = CFLAG_CLEAR;\r |
7950 | }\r |
7951 | \r |
7952 | \r |
7953 | void m68k_op_move_16_aw_pcdi(void)\r |
7954 | {\r |
7955 | uint res = OPER_PCDI_16();\r |
7956 | uint ea = EA_AW_16();\r |
7957 | \r |
7958 | m68ki_write_16(ea, res);\r |
7959 | \r |
7960 | FLAG_N = NFLAG_16(res);\r |
7961 | FLAG_Z = res;\r |
7962 | FLAG_V = VFLAG_CLEAR;\r |
7963 | FLAG_C = CFLAG_CLEAR;\r |
7964 | }\r |
7965 | \r |
7966 | \r |
7967 | void m68k_op_move_16_aw_pcix(void)\r |
7968 | {\r |
7969 | uint res = OPER_PCIX_16();\r |
7970 | uint ea = EA_AW_16();\r |
7971 | \r |
7972 | m68ki_write_16(ea, res);\r |
7973 | \r |
7974 | FLAG_N = NFLAG_16(res);\r |
7975 | FLAG_Z = res;\r |
7976 | FLAG_V = VFLAG_CLEAR;\r |
7977 | FLAG_C = CFLAG_CLEAR;\r |
7978 | }\r |
7979 | \r |
7980 | \r |
7981 | void m68k_op_move_16_aw_i(void)\r |
7982 | {\r |
7983 | uint res = OPER_I_16();\r |
7984 | uint ea = EA_AW_16();\r |
7985 | \r |
7986 | m68ki_write_16(ea, res);\r |
7987 | \r |
7988 | FLAG_N = NFLAG_16(res);\r |
7989 | FLAG_Z = res;\r |
7990 | FLAG_V = VFLAG_CLEAR;\r |
7991 | FLAG_C = CFLAG_CLEAR;\r |
7992 | }\r |
7993 | \r |
7994 | \r |
7995 | void m68k_op_move_16_al_d(void)\r |
7996 | {\r |
7997 | uint res = MASK_OUT_ABOVE_16(DY);\r |
7998 | uint ea = EA_AL_16();\r |
7999 | \r |
8000 | m68ki_write_16(ea, res);\r |
8001 | \r |
8002 | FLAG_N = NFLAG_16(res);\r |
8003 | FLAG_Z = res;\r |
8004 | FLAG_V = VFLAG_CLEAR;\r |
8005 | FLAG_C = CFLAG_CLEAR;\r |
8006 | }\r |
8007 | \r |
8008 | \r |
8009 | void m68k_op_move_16_al_a(void)\r |
8010 | {\r |
8011 | uint res = MASK_OUT_ABOVE_16(AY);\r |
8012 | uint ea = EA_AL_16();\r |
8013 | \r |
8014 | m68ki_write_16(ea, res);\r |
8015 | \r |
8016 | FLAG_N = NFLAG_16(res);\r |
8017 | FLAG_Z = res;\r |
8018 | FLAG_V = VFLAG_CLEAR;\r |
8019 | FLAG_C = CFLAG_CLEAR;\r |
8020 | }\r |
8021 | \r |
8022 | \r |
8023 | void m68k_op_move_16_al_ai(void)\r |
8024 | {\r |
8025 | uint res = OPER_AY_AI_16();\r |
8026 | uint ea = EA_AL_16();\r |
8027 | \r |
8028 | m68ki_write_16(ea, res);\r |
8029 | \r |
8030 | FLAG_N = NFLAG_16(res);\r |
8031 | FLAG_Z = res;\r |
8032 | FLAG_V = VFLAG_CLEAR;\r |
8033 | FLAG_C = CFLAG_CLEAR;\r |
8034 | }\r |
8035 | \r |
8036 | \r |
8037 | void m68k_op_move_16_al_pi(void)\r |
8038 | {\r |
8039 | uint res = OPER_AY_PI_16();\r |
8040 | uint ea = EA_AL_16();\r |
8041 | \r |
8042 | m68ki_write_16(ea, res);\r |
8043 | \r |
8044 | FLAG_N = NFLAG_16(res);\r |
8045 | FLAG_Z = res;\r |
8046 | FLAG_V = VFLAG_CLEAR;\r |
8047 | FLAG_C = CFLAG_CLEAR;\r |
8048 | }\r |
8049 | \r |
8050 | \r |
8051 | void m68k_op_move_16_al_pd(void)\r |
8052 | {\r |
8053 | uint res = OPER_AY_PD_16();\r |
8054 | uint ea = EA_AL_16();\r |
8055 | \r |
8056 | m68ki_write_16(ea, res);\r |
8057 | \r |
8058 | FLAG_N = NFLAG_16(res);\r |
8059 | FLAG_Z = res;\r |
8060 | FLAG_V = VFLAG_CLEAR;\r |
8061 | FLAG_C = CFLAG_CLEAR;\r |
8062 | }\r |
8063 | \r |
8064 | \r |
8065 | void m68k_op_move_16_al_di(void)\r |
8066 | {\r |
8067 | uint res = OPER_AY_DI_16();\r |
8068 | uint ea = EA_AL_16();\r |
8069 | \r |
8070 | m68ki_write_16(ea, res);\r |
8071 | \r |
8072 | FLAG_N = NFLAG_16(res);\r |
8073 | FLAG_Z = res;\r |
8074 | FLAG_V = VFLAG_CLEAR;\r |
8075 | FLAG_C = CFLAG_CLEAR;\r |
8076 | }\r |
8077 | \r |
8078 | \r |
8079 | void m68k_op_move_16_al_ix(void)\r |
8080 | {\r |
8081 | uint res = OPER_AY_IX_16();\r |
8082 | uint ea = EA_AL_16();\r |
8083 | \r |
8084 | m68ki_write_16(ea, res);\r |
8085 | \r |
8086 | FLAG_N = NFLAG_16(res);\r |
8087 | FLAG_Z = res;\r |
8088 | FLAG_V = VFLAG_CLEAR;\r |
8089 | FLAG_C = CFLAG_CLEAR;\r |
8090 | }\r |
8091 | \r |
8092 | \r |
8093 | void m68k_op_move_16_al_aw(void)\r |
8094 | {\r |
8095 | uint res = OPER_AW_16();\r |
8096 | uint ea = EA_AL_16();\r |
8097 | \r |
8098 | m68ki_write_16(ea, res);\r |
8099 | \r |
8100 | FLAG_N = NFLAG_16(res);\r |
8101 | FLAG_Z = res;\r |
8102 | FLAG_V = VFLAG_CLEAR;\r |
8103 | FLAG_C = CFLAG_CLEAR;\r |
8104 | }\r |
8105 | \r |
8106 | \r |
8107 | void m68k_op_move_16_al_al(void)\r |
8108 | {\r |
8109 | uint res = OPER_AL_16();\r |
8110 | uint ea = EA_AL_16();\r |
8111 | \r |
8112 | m68ki_write_16(ea, res);\r |
8113 | \r |
8114 | FLAG_N = NFLAG_16(res);\r |
8115 | FLAG_Z = res;\r |
8116 | FLAG_V = VFLAG_CLEAR;\r |
8117 | FLAG_C = CFLAG_CLEAR;\r |
8118 | }\r |
8119 | \r |
8120 | \r |
8121 | void m68k_op_move_16_al_pcdi(void)\r |
8122 | {\r |
8123 | uint res = OPER_PCDI_16();\r |
8124 | uint ea = EA_AL_16();\r |
8125 | \r |
8126 | m68ki_write_16(ea, res);\r |
8127 | \r |
8128 | FLAG_N = NFLAG_16(res);\r |
8129 | FLAG_Z = res;\r |
8130 | FLAG_V = VFLAG_CLEAR;\r |
8131 | FLAG_C = CFLAG_CLEAR;\r |
8132 | }\r |
8133 | \r |
8134 | \r |
8135 | void m68k_op_move_16_al_pcix(void)\r |
8136 | {\r |
8137 | uint res = OPER_PCIX_16();\r |
8138 | uint ea = EA_AL_16();\r |
8139 | \r |
8140 | m68ki_write_16(ea, res);\r |
8141 | \r |
8142 | FLAG_N = NFLAG_16(res);\r |
8143 | FLAG_Z = res;\r |
8144 | FLAG_V = VFLAG_CLEAR;\r |
8145 | FLAG_C = CFLAG_CLEAR;\r |
8146 | }\r |
8147 | \r |
8148 | \r |
8149 | void m68k_op_move_16_al_i(void)\r |
8150 | {\r |
8151 | uint res = OPER_I_16();\r |
8152 | uint ea = EA_AL_16();\r |
8153 | \r |
8154 | m68ki_write_16(ea, res);\r |
8155 | \r |
8156 | FLAG_N = NFLAG_16(res);\r |
8157 | FLAG_Z = res;\r |
8158 | FLAG_V = VFLAG_CLEAR;\r |
8159 | FLAG_C = CFLAG_CLEAR;\r |
8160 | }\r |
8161 | \r |
8162 | \r |
8163 | void m68k_op_move_32_d_d(void)\r |
8164 | {\r |
8165 | uint res = DY;\r |
8166 | uint* r_dst = &DX;\r |
8167 | \r |
8168 | *r_dst = res;\r |
8169 | \r |
8170 | FLAG_N = NFLAG_32(res);\r |
8171 | FLAG_Z = res;\r |
8172 | FLAG_V = VFLAG_CLEAR;\r |
8173 | FLAG_C = CFLAG_CLEAR;\r |
8174 | }\r |
8175 | \r |
8176 | \r |
8177 | void m68k_op_move_32_d_a(void)\r |
8178 | {\r |
8179 | uint res = AY;\r |
8180 | uint* r_dst = &DX;\r |
8181 | \r |
8182 | *r_dst = res;\r |
8183 | \r |
8184 | FLAG_N = NFLAG_32(res);\r |
8185 | FLAG_Z = res;\r |
8186 | FLAG_V = VFLAG_CLEAR;\r |
8187 | FLAG_C = CFLAG_CLEAR;\r |
8188 | }\r |
8189 | \r |
8190 | \r |
8191 | void m68k_op_move_32_d_ai(void)\r |
8192 | {\r |
8193 | uint res = OPER_AY_AI_32();\r |
8194 | uint* r_dst = &DX;\r |
8195 | \r |
8196 | *r_dst = res;\r |
8197 | \r |
8198 | FLAG_N = NFLAG_32(res);\r |
8199 | FLAG_Z = res;\r |
8200 | FLAG_V = VFLAG_CLEAR;\r |
8201 | FLAG_C = CFLAG_CLEAR;\r |
8202 | }\r |
8203 | \r |
8204 | \r |
8205 | void m68k_op_move_32_d_pi(void)\r |
8206 | {\r |
8207 | uint res = OPER_AY_PI_32();\r |
8208 | uint* r_dst = &DX;\r |
8209 | \r |
8210 | *r_dst = res;\r |
8211 | \r |
8212 | FLAG_N = NFLAG_32(res);\r |
8213 | FLAG_Z = res;\r |
8214 | FLAG_V = VFLAG_CLEAR;\r |
8215 | FLAG_C = CFLAG_CLEAR;\r |
8216 | }\r |
8217 | \r |
8218 | \r |
8219 | void m68k_op_move_32_d_pd(void)\r |
8220 | {\r |
8221 | uint res = OPER_AY_PD_32();\r |
8222 | uint* r_dst = &DX;\r |
8223 | \r |
8224 | *r_dst = res;\r |
8225 | \r |
8226 | FLAG_N = NFLAG_32(res);\r |
8227 | FLAG_Z = res;\r |
8228 | FLAG_V = VFLAG_CLEAR;\r |
8229 | FLAG_C = CFLAG_CLEAR;\r |
8230 | }\r |
8231 | \r |
8232 | \r |
8233 | void m68k_op_move_32_d_di(void)\r |
8234 | {\r |
8235 | uint res = OPER_AY_DI_32();\r |
8236 | uint* r_dst = &DX;\r |
8237 | \r |
8238 | *r_dst = res;\r |
8239 | \r |
8240 | FLAG_N = NFLAG_32(res);\r |
8241 | FLAG_Z = res;\r |
8242 | FLAG_V = VFLAG_CLEAR;\r |
8243 | FLAG_C = CFLAG_CLEAR;\r |
8244 | }\r |
8245 | \r |
8246 | \r |
8247 | void m68k_op_move_32_d_ix(void)\r |
8248 | {\r |
8249 | uint res = OPER_AY_IX_32();\r |
8250 | uint* r_dst = &DX;\r |
8251 | \r |
8252 | *r_dst = res;\r |
8253 | \r |
8254 | FLAG_N = NFLAG_32(res);\r |
8255 | FLAG_Z = res;\r |
8256 | FLAG_V = VFLAG_CLEAR;\r |
8257 | FLAG_C = CFLAG_CLEAR;\r |
8258 | }\r |
8259 | \r |
8260 | \r |
8261 | void m68k_op_move_32_d_aw(void)\r |
8262 | {\r |
8263 | uint res = OPER_AW_32();\r |
8264 | uint* r_dst = &DX;\r |
8265 | \r |
8266 | *r_dst = res;\r |
8267 | \r |
8268 | FLAG_N = NFLAG_32(res);\r |
8269 | FLAG_Z = res;\r |
8270 | FLAG_V = VFLAG_CLEAR;\r |
8271 | FLAG_C = CFLAG_CLEAR;\r |
8272 | }\r |
8273 | \r |
8274 | \r |
8275 | void m68k_op_move_32_d_al(void)\r |
8276 | {\r |
8277 | uint res = OPER_AL_32();\r |
8278 | uint* r_dst = &DX;\r |
8279 | \r |
8280 | *r_dst = res;\r |
8281 | \r |
8282 | FLAG_N = NFLAG_32(res);\r |
8283 | FLAG_Z = res;\r |
8284 | FLAG_V = VFLAG_CLEAR;\r |
8285 | FLAG_C = CFLAG_CLEAR;\r |
8286 | }\r |
8287 | \r |
8288 | \r |
8289 | void m68k_op_move_32_d_pcdi(void)\r |
8290 | {\r |
8291 | uint res = OPER_PCDI_32();\r |
8292 | uint* r_dst = &DX;\r |
8293 | \r |
8294 | *r_dst = res;\r |
8295 | \r |
8296 | FLAG_N = NFLAG_32(res);\r |
8297 | FLAG_Z = res;\r |
8298 | FLAG_V = VFLAG_CLEAR;\r |
8299 | FLAG_C = CFLAG_CLEAR;\r |
8300 | }\r |
8301 | \r |
8302 | \r |
8303 | void m68k_op_move_32_d_pcix(void)\r |
8304 | {\r |
8305 | uint res = OPER_PCIX_32();\r |
8306 | uint* r_dst = &DX;\r |
8307 | \r |
8308 | *r_dst = res;\r |
8309 | \r |
8310 | FLAG_N = NFLAG_32(res);\r |
8311 | FLAG_Z = res;\r |
8312 | FLAG_V = VFLAG_CLEAR;\r |
8313 | FLAG_C = CFLAG_CLEAR;\r |
8314 | }\r |
8315 | \r |
8316 | \r |
8317 | void m68k_op_move_32_d_i(void)\r |
8318 | {\r |
8319 | uint res = OPER_I_32();\r |
8320 | uint* r_dst = &DX;\r |
8321 | \r |
8322 | *r_dst = res;\r |
8323 | \r |
8324 | FLAG_N = NFLAG_32(res);\r |
8325 | FLAG_Z = res;\r |
8326 | FLAG_V = VFLAG_CLEAR;\r |
8327 | FLAG_C = CFLAG_CLEAR;\r |
8328 | }\r |
8329 | \r |
8330 | \r |
8331 | void m68k_op_move_32_ai_d(void)\r |
8332 | {\r |
8333 | uint res = DY;\r |
8334 | uint ea = EA_AX_AI_32();\r |
8335 | \r |
8336 | m68ki_write_32(ea, res);\r |
8337 | \r |
8338 | FLAG_N = NFLAG_32(res);\r |
8339 | FLAG_Z = res;\r |
8340 | FLAG_V = VFLAG_CLEAR;\r |
8341 | FLAG_C = CFLAG_CLEAR;\r |
8342 | }\r |
8343 | \r |
8344 | \r |
8345 | void m68k_op_move_32_ai_a(void)\r |
8346 | {\r |
8347 | uint res = AY;\r |
8348 | uint ea = EA_AX_AI_32();\r |
8349 | \r |
8350 | m68ki_write_32(ea, res);\r |
8351 | \r |
8352 | FLAG_N = NFLAG_32(res);\r |
8353 | FLAG_Z = res;\r |
8354 | FLAG_V = VFLAG_CLEAR;\r |
8355 | FLAG_C = CFLAG_CLEAR;\r |
8356 | }\r |
8357 | \r |
8358 | \r |
8359 | void m68k_op_move_32_ai_ai(void)\r |
8360 | {\r |
8361 | uint res = OPER_AY_AI_32();\r |
8362 | uint ea = EA_AX_AI_32();\r |
8363 | \r |
8364 | m68ki_write_32(ea, res);\r |
8365 | \r |
8366 | FLAG_N = NFLAG_32(res);\r |
8367 | FLAG_Z = res;\r |
8368 | FLAG_V = VFLAG_CLEAR;\r |
8369 | FLAG_C = CFLAG_CLEAR;\r |
8370 | }\r |
8371 | \r |
8372 | \r |
8373 | void m68k_op_move_32_ai_pi(void)\r |
8374 | {\r |
8375 | uint res = OPER_AY_PI_32();\r |
8376 | uint ea = EA_AX_AI_32();\r |
8377 | \r |
8378 | m68ki_write_32(ea, res);\r |
8379 | \r |
8380 | FLAG_N = NFLAG_32(res);\r |
8381 | FLAG_Z = res;\r |
8382 | FLAG_V = VFLAG_CLEAR;\r |
8383 | FLAG_C = CFLAG_CLEAR;\r |
8384 | }\r |
8385 | \r |
8386 | \r |
8387 | void m68k_op_move_32_ai_pd(void)\r |
8388 | {\r |
8389 | uint res = OPER_AY_PD_32();\r |
8390 | uint ea = EA_AX_AI_32();\r |
8391 | \r |
8392 | m68ki_write_32(ea, res);\r |
8393 | \r |
8394 | FLAG_N = NFLAG_32(res);\r |
8395 | FLAG_Z = res;\r |
8396 | FLAG_V = VFLAG_CLEAR;\r |
8397 | FLAG_C = CFLAG_CLEAR;\r |
8398 | }\r |
8399 | \r |
8400 | \r |
8401 | void m68k_op_move_32_ai_di(void)\r |
8402 | {\r |
8403 | uint res = OPER_AY_DI_32();\r |
8404 | uint ea = EA_AX_AI_32();\r |
8405 | \r |
8406 | m68ki_write_32(ea, res);\r |
8407 | \r |
8408 | FLAG_N = NFLAG_32(res);\r |
8409 | FLAG_Z = res;\r |
8410 | FLAG_V = VFLAG_CLEAR;\r |
8411 | FLAG_C = CFLAG_CLEAR;\r |
8412 | }\r |
8413 | \r |
8414 | \r |
8415 | void m68k_op_move_32_ai_ix(void)\r |
8416 | {\r |
8417 | uint res = OPER_AY_IX_32();\r |
8418 | uint ea = EA_AX_AI_32();\r |
8419 | \r |
8420 | m68ki_write_32(ea, res);\r |
8421 | \r |
8422 | FLAG_N = NFLAG_32(res);\r |
8423 | FLAG_Z = res;\r |
8424 | FLAG_V = VFLAG_CLEAR;\r |
8425 | FLAG_C = CFLAG_CLEAR;\r |
8426 | }\r |
8427 | \r |
8428 | \r |
8429 | void m68k_op_move_32_ai_aw(void)\r |
8430 | {\r |
8431 | uint res = OPER_AW_32();\r |
8432 | uint ea = EA_AX_AI_32();\r |
8433 | \r |
8434 | m68ki_write_32(ea, res);\r |
8435 | \r |
8436 | FLAG_N = NFLAG_32(res);\r |
8437 | FLAG_Z = res;\r |
8438 | FLAG_V = VFLAG_CLEAR;\r |
8439 | FLAG_C = CFLAG_CLEAR;\r |
8440 | }\r |
8441 | \r |
8442 | \r |
8443 | void m68k_op_move_32_ai_al(void)\r |
8444 | {\r |
8445 | uint res = OPER_AL_32();\r |
8446 | uint ea = EA_AX_AI_32();\r |
8447 | \r |
8448 | m68ki_write_32(ea, res);\r |
8449 | \r |
8450 | FLAG_N = NFLAG_32(res);\r |
8451 | FLAG_Z = res;\r |
8452 | FLAG_V = VFLAG_CLEAR;\r |
8453 | FLAG_C = CFLAG_CLEAR;\r |
8454 | }\r |
8455 | \r |
8456 | \r |
8457 | void m68k_op_move_32_ai_pcdi(void)\r |
8458 | {\r |
8459 | uint res = OPER_PCDI_32();\r |
8460 | uint ea = EA_AX_AI_32();\r |
8461 | \r |
8462 | m68ki_write_32(ea, res);\r |
8463 | \r |
8464 | FLAG_N = NFLAG_32(res);\r |
8465 | FLAG_Z = res;\r |
8466 | FLAG_V = VFLAG_CLEAR;\r |
8467 | FLAG_C = CFLAG_CLEAR;\r |
8468 | }\r |
8469 | \r |
8470 | \r |
8471 | void m68k_op_move_32_ai_pcix(void)\r |
8472 | {\r |
8473 | uint res = OPER_PCIX_32();\r |
8474 | uint ea = EA_AX_AI_32();\r |
8475 | \r |
8476 | m68ki_write_32(ea, res);\r |
8477 | \r |
8478 | FLAG_N = NFLAG_32(res);\r |
8479 | FLAG_Z = res;\r |
8480 | FLAG_V = VFLAG_CLEAR;\r |
8481 | FLAG_C = CFLAG_CLEAR;\r |
8482 | }\r |
8483 | \r |
8484 | \r |
8485 | void m68k_op_move_32_ai_i(void)\r |
8486 | {\r |
8487 | uint res = OPER_I_32();\r |
8488 | uint ea = EA_AX_AI_32();\r |
8489 | \r |
8490 | m68ki_write_32(ea, res);\r |
8491 | \r |
8492 | FLAG_N = NFLAG_32(res);\r |
8493 | FLAG_Z = res;\r |
8494 | FLAG_V = VFLAG_CLEAR;\r |
8495 | FLAG_C = CFLAG_CLEAR;\r |
8496 | }\r |
8497 | \r |
8498 | \r |
8499 | void m68k_op_move_32_pi_d(void)\r |
8500 | {\r |
8501 | uint res = DY;\r |
8502 | uint ea = EA_AX_PI_32();\r |
8503 | \r |
8504 | m68ki_write_32(ea, res);\r |
8505 | \r |
8506 | FLAG_N = NFLAG_32(res);\r |
8507 | FLAG_Z = res;\r |
8508 | FLAG_V = VFLAG_CLEAR;\r |
8509 | FLAG_C = CFLAG_CLEAR;\r |
8510 | }\r |
8511 | \r |
8512 | \r |
8513 | void m68k_op_move_32_pi_a(void)\r |
8514 | {\r |
8515 | uint res = AY;\r |
8516 | uint ea = EA_AX_PI_32();\r |
8517 | \r |
8518 | m68ki_write_32(ea, res);\r |
8519 | \r |
8520 | FLAG_N = NFLAG_32(res);\r |
8521 | FLAG_Z = res;\r |
8522 | FLAG_V = VFLAG_CLEAR;\r |
8523 | FLAG_C = CFLAG_CLEAR;\r |
8524 | }\r |
8525 | \r |
8526 | \r |
8527 | void m68k_op_move_32_pi_ai(void)\r |
8528 | {\r |
8529 | uint res = OPER_AY_AI_32();\r |
8530 | uint ea = EA_AX_PI_32();\r |
8531 | \r |
8532 | m68ki_write_32(ea, res);\r |
8533 | \r |
8534 | FLAG_N = NFLAG_32(res);\r |
8535 | FLAG_Z = res;\r |
8536 | FLAG_V = VFLAG_CLEAR;\r |
8537 | FLAG_C = CFLAG_CLEAR;\r |
8538 | }\r |
8539 | \r |
8540 | \r |
8541 | void m68k_op_move_32_pi_pi(void)\r |
8542 | {\r |
8543 | uint res = OPER_AY_PI_32();\r |
8544 | uint ea = EA_AX_PI_32();\r |
8545 | \r |
8546 | m68ki_write_32(ea, res);\r |
8547 | \r |
8548 | FLAG_N = NFLAG_32(res);\r |
8549 | FLAG_Z = res;\r |
8550 | FLAG_V = VFLAG_CLEAR;\r |
8551 | FLAG_C = CFLAG_CLEAR;\r |
8552 | }\r |
8553 | \r |
8554 | \r |
8555 | void m68k_op_move_32_pi_pd(void)\r |
8556 | {\r |
8557 | uint res = OPER_AY_PD_32();\r |
8558 | uint ea = EA_AX_PI_32();\r |
8559 | \r |
8560 | m68ki_write_32(ea, res);\r |
8561 | \r |
8562 | FLAG_N = NFLAG_32(res);\r |
8563 | FLAG_Z = res;\r |
8564 | FLAG_V = VFLAG_CLEAR;\r |
8565 | FLAG_C = CFLAG_CLEAR;\r |
8566 | }\r |
8567 | \r |
8568 | \r |
8569 | void m68k_op_move_32_pi_di(void)\r |
8570 | {\r |
8571 | uint res = OPER_AY_DI_32();\r |
8572 | uint ea = EA_AX_PI_32();\r |
8573 | \r |
8574 | m68ki_write_32(ea, res);\r |
8575 | \r |
8576 | FLAG_N = NFLAG_32(res);\r |
8577 | FLAG_Z = res;\r |
8578 | FLAG_V = VFLAG_CLEAR;\r |
8579 | FLAG_C = CFLAG_CLEAR;\r |
8580 | }\r |
8581 | \r |
8582 | \r |
8583 | void m68k_op_move_32_pi_ix(void)\r |
8584 | {\r |
8585 | uint res = OPER_AY_IX_32();\r |
8586 | uint ea = EA_AX_PI_32();\r |
8587 | \r |
8588 | m68ki_write_32(ea, res);\r |
8589 | \r |
8590 | FLAG_N = NFLAG_32(res);\r |
8591 | FLAG_Z = res;\r |
8592 | FLAG_V = VFLAG_CLEAR;\r |
8593 | FLAG_C = CFLAG_CLEAR;\r |
8594 | }\r |
8595 | \r |
8596 | \r |
8597 | void m68k_op_move_32_pi_aw(void)\r |
8598 | {\r |
8599 | uint res = OPER_AW_32();\r |
8600 | uint ea = EA_AX_PI_32();\r |
8601 | \r |
8602 | m68ki_write_32(ea, res);\r |
8603 | \r |
8604 | FLAG_N = NFLAG_32(res);\r |
8605 | FLAG_Z = res;\r |
8606 | FLAG_V = VFLAG_CLEAR;\r |
8607 | FLAG_C = CFLAG_CLEAR;\r |
8608 | }\r |
8609 | \r |
8610 | \r |
8611 | void m68k_op_move_32_pi_al(void)\r |
8612 | {\r |
8613 | uint res = OPER_AL_32();\r |
8614 | uint ea = EA_AX_PI_32();\r |
8615 | \r |
8616 | m68ki_write_32(ea, res);\r |
8617 | \r |
8618 | FLAG_N = NFLAG_32(res);\r |
8619 | FLAG_Z = res;\r |
8620 | FLAG_V = VFLAG_CLEAR;\r |
8621 | FLAG_C = CFLAG_CLEAR;\r |
8622 | }\r |
8623 | \r |
8624 | \r |
8625 | void m68k_op_move_32_pi_pcdi(void)\r |
8626 | {\r |
8627 | uint res = OPER_PCDI_32();\r |
8628 | uint ea = EA_AX_PI_32();\r |
8629 | \r |
8630 | m68ki_write_32(ea, res);\r |
8631 | \r |
8632 | FLAG_N = NFLAG_32(res);\r |
8633 | FLAG_Z = res;\r |
8634 | FLAG_V = VFLAG_CLEAR;\r |
8635 | FLAG_C = CFLAG_CLEAR;\r |
8636 | }\r |
8637 | \r |
8638 | \r |
8639 | void m68k_op_move_32_pi_pcix(void)\r |
8640 | {\r |
8641 | uint res = OPER_PCIX_32();\r |
8642 | uint ea = EA_AX_PI_32();\r |
8643 | \r |
8644 | m68ki_write_32(ea, res);\r |
8645 | \r |
8646 | FLAG_N = NFLAG_32(res);\r |
8647 | FLAG_Z = res;\r |
8648 | FLAG_V = VFLAG_CLEAR;\r |
8649 | FLAG_C = CFLAG_CLEAR;\r |
8650 | }\r |
8651 | \r |
8652 | \r |
8653 | void m68k_op_move_32_pi_i(void)\r |
8654 | {\r |
8655 | uint res = OPER_I_32();\r |
8656 | uint ea = EA_AX_PI_32();\r |
8657 | \r |
8658 | m68ki_write_32(ea, res);\r |
8659 | \r |
8660 | FLAG_N = NFLAG_32(res);\r |
8661 | FLAG_Z = res;\r |
8662 | FLAG_V = VFLAG_CLEAR;\r |
8663 | FLAG_C = CFLAG_CLEAR;\r |
8664 | }\r |
8665 | \r |
8666 | \r |
8667 | void m68k_op_move_32_pd_d(void)\r |
8668 | {\r |
8669 | uint res = DY;\r |
8670 | uint ea = EA_AX_PD_32();\r |
8671 | \r |
8672 | m68ki_write_32(ea, res);\r |
8673 | \r |
8674 | FLAG_N = NFLAG_32(res);\r |
8675 | FLAG_Z = res;\r |
8676 | FLAG_V = VFLAG_CLEAR;\r |
8677 | FLAG_C = CFLAG_CLEAR;\r |
8678 | }\r |
8679 | \r |
8680 | \r |
8681 | void m68k_op_move_32_pd_a(void)\r |
8682 | {\r |
8683 | uint res = AY;\r |
8684 | uint ea = EA_AX_PD_32();\r |
8685 | \r |
8686 | m68ki_write_32(ea, res);\r |
8687 | \r |
8688 | FLAG_N = NFLAG_32(res);\r |
8689 | FLAG_Z = res;\r |
8690 | FLAG_V = VFLAG_CLEAR;\r |
8691 | FLAG_C = CFLAG_CLEAR;\r |
8692 | }\r |
8693 | \r |
8694 | \r |
8695 | void m68k_op_move_32_pd_ai(void)\r |
8696 | {\r |
8697 | uint res = OPER_AY_AI_32();\r |
8698 | uint ea = EA_AX_PD_32();\r |
8699 | \r |
8700 | m68ki_write_32(ea, res);\r |
8701 | \r |
8702 | FLAG_N = NFLAG_32(res);\r |
8703 | FLAG_Z = res;\r |
8704 | FLAG_V = VFLAG_CLEAR;\r |
8705 | FLAG_C = CFLAG_CLEAR;\r |
8706 | }\r |
8707 | \r |
8708 | \r |
8709 | void m68k_op_move_32_pd_pi(void)\r |
8710 | {\r |
8711 | uint res = OPER_AY_PI_32();\r |
8712 | uint ea = EA_AX_PD_32();\r |
8713 | \r |
8714 | m68ki_write_32(ea, res);\r |
8715 | \r |
8716 | FLAG_N = NFLAG_32(res);\r |
8717 | FLAG_Z = res;\r |
8718 | FLAG_V = VFLAG_CLEAR;\r |
8719 | FLAG_C = CFLAG_CLEAR;\r |
8720 | }\r |
8721 | \r |
8722 | \r |
8723 | void m68k_op_move_32_pd_pd(void)\r |
8724 | {\r |
8725 | uint res = OPER_AY_PD_32();\r |
8726 | uint ea = EA_AX_PD_32();\r |
8727 | \r |
8728 | m68ki_write_32(ea, res);\r |
8729 | \r |
8730 | FLAG_N = NFLAG_32(res);\r |
8731 | FLAG_Z = res;\r |
8732 | FLAG_V = VFLAG_CLEAR;\r |
8733 | FLAG_C = CFLAG_CLEAR;\r |
8734 | }\r |
8735 | \r |
8736 | \r |
8737 | void m68k_op_move_32_pd_di(void)\r |
8738 | {\r |
8739 | uint res = OPER_AY_DI_32();\r |
8740 | uint ea = EA_AX_PD_32();\r |
8741 | \r |
8742 | m68ki_write_32(ea, res);\r |
8743 | \r |
8744 | FLAG_N = NFLAG_32(res);\r |
8745 | FLAG_Z = res;\r |
8746 | FLAG_V = VFLAG_CLEAR;\r |
8747 | FLAG_C = CFLAG_CLEAR;\r |
8748 | }\r |
8749 | \r |
8750 | \r |
8751 | void m68k_op_move_32_pd_ix(void)\r |
8752 | {\r |
8753 | uint res = OPER_AY_IX_32();\r |
8754 | uint ea = EA_AX_PD_32();\r |
8755 | \r |
8756 | m68ki_write_32(ea, res);\r |
8757 | \r |
8758 | FLAG_N = NFLAG_32(res);\r |
8759 | FLAG_Z = res;\r |
8760 | FLAG_V = VFLAG_CLEAR;\r |
8761 | FLAG_C = CFLAG_CLEAR;\r |
8762 | }\r |
8763 | \r |
8764 | \r |
8765 | void m68k_op_move_32_pd_aw(void)\r |
8766 | {\r |
8767 | uint res = OPER_AW_32();\r |
8768 | uint ea = EA_AX_PD_32();\r |
8769 | \r |
8770 | m68ki_write_32(ea, res);\r |
8771 | \r |
8772 | FLAG_N = NFLAG_32(res);\r |
8773 | FLAG_Z = res;\r |
8774 | FLAG_V = VFLAG_CLEAR;\r |
8775 | FLAG_C = CFLAG_CLEAR;\r |
8776 | }\r |
8777 | \r |
8778 | \r |
8779 | void m68k_op_move_32_pd_al(void)\r |
8780 | {\r |
8781 | uint res = OPER_AL_32();\r |
8782 | uint ea = EA_AX_PD_32();\r |
8783 | \r |
8784 | m68ki_write_32(ea, res);\r |
8785 | \r |
8786 | FLAG_N = NFLAG_32(res);\r |
8787 | FLAG_Z = res;\r |
8788 | FLAG_V = VFLAG_CLEAR;\r |
8789 | FLAG_C = CFLAG_CLEAR;\r |
8790 | }\r |
8791 | \r |
8792 | \r |
8793 | void m68k_op_move_32_pd_pcdi(void)\r |
8794 | {\r |
8795 | uint res = OPER_PCDI_32();\r |
8796 | uint ea = EA_AX_PD_32();\r |
8797 | \r |
8798 | m68ki_write_32(ea, res);\r |
8799 | \r |
8800 | FLAG_N = NFLAG_32(res);\r |
8801 | FLAG_Z = res;\r |
8802 | FLAG_V = VFLAG_CLEAR;\r |
8803 | FLAG_C = CFLAG_CLEAR;\r |
8804 | }\r |
8805 | \r |
8806 | \r |
8807 | void m68k_op_move_32_pd_pcix(void)\r |
8808 | {\r |
8809 | uint res = OPER_PCIX_32();\r |
8810 | uint ea = EA_AX_PD_32();\r |
8811 | \r |
8812 | m68ki_write_32(ea, res);\r |
8813 | \r |
8814 | FLAG_N = NFLAG_32(res);\r |
8815 | FLAG_Z = res;\r |
8816 | FLAG_V = VFLAG_CLEAR;\r |
8817 | FLAG_C = CFLAG_CLEAR;\r |
8818 | }\r |
8819 | \r |
8820 | \r |
8821 | void m68k_op_move_32_pd_i(void)\r |
8822 | {\r |
8823 | uint res = OPER_I_32();\r |
8824 | uint ea = EA_AX_PD_32();\r |
8825 | \r |
8826 | m68ki_write_32(ea, res);\r |
8827 | \r |
8828 | FLAG_N = NFLAG_32(res);\r |
8829 | FLAG_Z = res;\r |
8830 | FLAG_V = VFLAG_CLEAR;\r |
8831 | FLAG_C = CFLAG_CLEAR;\r |
8832 | }\r |
8833 | \r |
8834 | \r |
8835 | void m68k_op_move_32_di_d(void)\r |
8836 | {\r |
8837 | uint res = DY;\r |
8838 | uint ea = EA_AX_DI_32();\r |
8839 | \r |
8840 | m68ki_write_32(ea, res);\r |
8841 | \r |
8842 | FLAG_N = NFLAG_32(res);\r |
8843 | FLAG_Z = res;\r |
8844 | FLAG_V = VFLAG_CLEAR;\r |
8845 | FLAG_C = CFLAG_CLEAR;\r |
8846 | }\r |
8847 | \r |
8848 | \r |
8849 | void m68k_op_move_32_di_a(void)\r |
8850 | {\r |
8851 | uint res = AY;\r |
8852 | uint ea = EA_AX_DI_32();\r |
8853 | \r |
8854 | m68ki_write_32(ea, res);\r |
8855 | \r |
8856 | FLAG_N = NFLAG_32(res);\r |
8857 | FLAG_Z = res;\r |
8858 | FLAG_V = VFLAG_CLEAR;\r |
8859 | FLAG_C = CFLAG_CLEAR;\r |
8860 | }\r |
8861 | \r |
8862 | \r |
8863 | void m68k_op_move_32_di_ai(void)\r |
8864 | {\r |
8865 | uint res = OPER_AY_AI_32();\r |
8866 | uint ea = EA_AX_DI_32();\r |
8867 | \r |
8868 | m68ki_write_32(ea, res);\r |
8869 | \r |
8870 | FLAG_N = NFLAG_32(res);\r |
8871 | FLAG_Z = res;\r |
8872 | FLAG_V = VFLAG_CLEAR;\r |
8873 | FLAG_C = CFLAG_CLEAR;\r |
8874 | }\r |
8875 | \r |
8876 | \r |
8877 | void m68k_op_move_32_di_pi(void)\r |
8878 | {\r |
8879 | uint res = OPER_AY_PI_32();\r |
8880 | uint ea = EA_AX_DI_32();\r |
8881 | \r |
8882 | m68ki_write_32(ea, res);\r |
8883 | \r |
8884 | FLAG_N = NFLAG_32(res);\r |
8885 | FLAG_Z = res;\r |
8886 | FLAG_V = VFLAG_CLEAR;\r |
8887 | FLAG_C = CFLAG_CLEAR;\r |
8888 | }\r |
8889 | \r |
8890 | \r |
8891 | void m68k_op_move_32_di_pd(void)\r |
8892 | {\r |
8893 | uint res = OPER_AY_PD_32();\r |
8894 | uint ea = EA_AX_DI_32();\r |
8895 | \r |
8896 | m68ki_write_32(ea, res);\r |
8897 | \r |
8898 | FLAG_N = NFLAG_32(res);\r |
8899 | FLAG_Z = res;\r |
8900 | FLAG_V = VFLAG_CLEAR;\r |
8901 | FLAG_C = CFLAG_CLEAR;\r |
8902 | }\r |
8903 | \r |
8904 | \r |
8905 | void m68k_op_move_32_di_di(void)\r |
8906 | {\r |
8907 | uint res = OPER_AY_DI_32();\r |
8908 | uint ea = EA_AX_DI_32();\r |
8909 | \r |
8910 | m68ki_write_32(ea, res);\r |
8911 | \r |
8912 | FLAG_N = NFLAG_32(res);\r |
8913 | FLAG_Z = res;\r |
8914 | FLAG_V = VFLAG_CLEAR;\r |
8915 | FLAG_C = CFLAG_CLEAR;\r |
8916 | }\r |
8917 | \r |
8918 | \r |
8919 | void m68k_op_move_32_di_ix(void)\r |
8920 | {\r |
8921 | uint res = OPER_AY_IX_32();\r |
8922 | uint ea = EA_AX_DI_32();\r |
8923 | \r |
8924 | m68ki_write_32(ea, res);\r |
8925 | \r |
8926 | FLAG_N = NFLAG_32(res);\r |
8927 | FLAG_Z = res;\r |
8928 | FLAG_V = VFLAG_CLEAR;\r |
8929 | FLAG_C = CFLAG_CLEAR;\r |
8930 | }\r |
8931 | \r |
8932 | \r |
8933 | void m68k_op_move_32_di_aw(void)\r |
8934 | {\r |
8935 | uint res = OPER_AW_32();\r |
8936 | uint ea = EA_AX_DI_32();\r |
8937 | \r |
8938 | m68ki_write_32(ea, res);\r |
8939 | \r |
8940 | FLAG_N = NFLAG_32(res);\r |
8941 | FLAG_Z = res;\r |
8942 | FLAG_V = VFLAG_CLEAR;\r |
8943 | FLAG_C = CFLAG_CLEAR;\r |
8944 | }\r |
8945 | \r |
8946 | \r |
8947 | void m68k_op_move_32_di_al(void)\r |
8948 | {\r |
8949 | uint res = OPER_AL_32();\r |
8950 | uint ea = EA_AX_DI_32();\r |
8951 | \r |
8952 | m68ki_write_32(ea, res);\r |
8953 | \r |
8954 | FLAG_N = NFLAG_32(res);\r |
8955 | FLAG_Z = res;\r |
8956 | FLAG_V = VFLAG_CLEAR;\r |
8957 | FLAG_C = CFLAG_CLEAR;\r |
8958 | }\r |
8959 | \r |
8960 | \r |
8961 | void m68k_op_move_32_di_pcdi(void)\r |
8962 | {\r |
8963 | uint res = OPER_PCDI_32();\r |
8964 | uint ea = EA_AX_DI_32();\r |
8965 | \r |
8966 | m68ki_write_32(ea, res);\r |
8967 | \r |
8968 | FLAG_N = NFLAG_32(res);\r |
8969 | FLAG_Z = res;\r |
8970 | FLAG_V = VFLAG_CLEAR;\r |
8971 | FLAG_C = CFLAG_CLEAR;\r |
8972 | }\r |
8973 | \r |
8974 | \r |
8975 | void m68k_op_move_32_di_pcix(void)\r |
8976 | {\r |
8977 | uint res = OPER_PCIX_32();\r |
8978 | uint ea = EA_AX_DI_32();\r |
8979 | \r |
8980 | m68ki_write_32(ea, res);\r |
8981 | \r |
8982 | FLAG_N = NFLAG_32(res);\r |
8983 | FLAG_Z = res;\r |
8984 | FLAG_V = VFLAG_CLEAR;\r |
8985 | FLAG_C = CFLAG_CLEAR;\r |
8986 | }\r |
8987 | \r |
8988 | \r |
8989 | void m68k_op_move_32_di_i(void)\r |
8990 | {\r |
8991 | uint res = OPER_I_32();\r |
8992 | uint ea = EA_AX_DI_32();\r |
8993 | \r |
8994 | m68ki_write_32(ea, res);\r |
8995 | \r |
8996 | FLAG_N = NFLAG_32(res);\r |
8997 | FLAG_Z = res;\r |
8998 | FLAG_V = VFLAG_CLEAR;\r |
8999 | FLAG_C = CFLAG_CLEAR;\r |
9000 | }\r |
9001 | \r |
9002 | \r |
9003 | void m68k_op_move_32_ix_d(void)\r |
9004 | {\r |
9005 | uint res = DY;\r |
9006 | uint ea = EA_AX_IX_32();\r |
9007 | \r |
9008 | m68ki_write_32(ea, res);\r |
9009 | \r |
9010 | FLAG_N = NFLAG_32(res);\r |
9011 | FLAG_Z = res;\r |
9012 | FLAG_V = VFLAG_CLEAR;\r |
9013 | FLAG_C = CFLAG_CLEAR;\r |
9014 | }\r |
9015 | \r |
9016 | \r |
9017 | void m68k_op_move_32_ix_a(void)\r |
9018 | {\r |
9019 | uint res = AY;\r |
9020 | uint ea = EA_AX_IX_32();\r |
9021 | \r |
9022 | m68ki_write_32(ea, res);\r |
9023 | \r |
9024 | FLAG_N = NFLAG_32(res);\r |
9025 | FLAG_Z = res;\r |
9026 | FLAG_V = VFLAG_CLEAR;\r |
9027 | FLAG_C = CFLAG_CLEAR;\r |
9028 | }\r |
9029 | \r |
9030 | \r |
9031 | void m68k_op_move_32_ix_ai(void)\r |
9032 | {\r |
9033 | uint res = OPER_AY_AI_32();\r |
9034 | uint ea = EA_AX_IX_32();\r |
9035 | \r |
9036 | m68ki_write_32(ea, res);\r |
9037 | \r |
9038 | FLAG_N = NFLAG_32(res);\r |
9039 | FLAG_Z = res;\r |
9040 | FLAG_V = VFLAG_CLEAR;\r |
9041 | FLAG_C = CFLAG_CLEAR;\r |
9042 | }\r |
9043 | \r |
9044 | \r |
9045 | void m68k_op_move_32_ix_pi(void)\r |
9046 | {\r |
9047 | uint res = OPER_AY_PI_32();\r |
9048 | uint ea = EA_AX_IX_32();\r |
9049 | \r |
9050 | m68ki_write_32(ea, res);\r |
9051 | \r |
9052 | FLAG_N = NFLAG_32(res);\r |
9053 | FLAG_Z = res;\r |
9054 | FLAG_V = VFLAG_CLEAR;\r |
9055 | FLAG_C = CFLAG_CLEAR;\r |
9056 | }\r |
9057 | \r |
9058 | \r |
9059 | void m68k_op_move_32_ix_pd(void)\r |
9060 | {\r |
9061 | uint res = OPER_AY_PD_32();\r |
9062 | uint ea = EA_AX_IX_32();\r |
9063 | \r |
9064 | m68ki_write_32(ea, res);\r |
9065 | \r |
9066 | FLAG_N = NFLAG_32(res);\r |
9067 | FLAG_Z = res;\r |
9068 | FLAG_V = VFLAG_CLEAR;\r |
9069 | FLAG_C = CFLAG_CLEAR;\r |
9070 | }\r |
9071 | \r |
9072 | \r |
9073 | void m68k_op_move_32_ix_di(void)\r |
9074 | {\r |
9075 | uint res = OPER_AY_DI_32();\r |
9076 | uint ea = EA_AX_IX_32();\r |
9077 | \r |
9078 | m68ki_write_32(ea, res);\r |
9079 | \r |
9080 | FLAG_N = NFLAG_32(res);\r |
9081 | FLAG_Z = res;\r |
9082 | FLAG_V = VFLAG_CLEAR;\r |
9083 | FLAG_C = CFLAG_CLEAR;\r |
9084 | }\r |
9085 | \r |
9086 | \r |
9087 | void m68k_op_move_32_ix_ix(void)\r |
9088 | {\r |
9089 | uint res = OPER_AY_IX_32();\r |
9090 | uint ea = EA_AX_IX_32();\r |
9091 | \r |
9092 | m68ki_write_32(ea, res);\r |
9093 | \r |
9094 | FLAG_N = NFLAG_32(res);\r |
9095 | FLAG_Z = res;\r |
9096 | FLAG_V = VFLAG_CLEAR;\r |
9097 | FLAG_C = CFLAG_CLEAR;\r |
9098 | }\r |
9099 | \r |
9100 | \r |
9101 | void m68k_op_move_32_ix_aw(void)\r |
9102 | {\r |
9103 | uint res = OPER_AW_32();\r |
9104 | uint ea = EA_AX_IX_32();\r |
9105 | \r |
9106 | m68ki_write_32(ea, res);\r |
9107 | \r |
9108 | FLAG_N = NFLAG_32(res);\r |
9109 | FLAG_Z = res;\r |
9110 | FLAG_V = VFLAG_CLEAR;\r |
9111 | FLAG_C = CFLAG_CLEAR;\r |
9112 | }\r |
9113 | \r |
9114 | \r |
9115 | void m68k_op_move_32_ix_al(void)\r |
9116 | {\r |
9117 | uint res = OPER_AL_32();\r |
9118 | uint ea = EA_AX_IX_32();\r |
9119 | \r |
9120 | m68ki_write_32(ea, res);\r |
9121 | \r |
9122 | FLAG_N = NFLAG_32(res);\r |
9123 | FLAG_Z = res;\r |
9124 | FLAG_V = VFLAG_CLEAR;\r |
9125 | FLAG_C = CFLAG_CLEAR;\r |
9126 | }\r |
9127 | \r |
9128 | \r |
9129 | void m68k_op_move_32_ix_pcdi(void)\r |
9130 | {\r |
9131 | uint res = OPER_PCDI_32();\r |
9132 | uint ea = EA_AX_IX_32();\r |
9133 | \r |
9134 | m68ki_write_32(ea, res);\r |
9135 | \r |
9136 | FLAG_N = NFLAG_32(res);\r |
9137 | FLAG_Z = res;\r |
9138 | FLAG_V = VFLAG_CLEAR;\r |
9139 | FLAG_C = CFLAG_CLEAR;\r |
9140 | }\r |
9141 | \r |
9142 | \r |
9143 | void m68k_op_move_32_ix_pcix(void)\r |
9144 | {\r |
9145 | uint res = OPER_PCIX_32();\r |
9146 | uint ea = EA_AX_IX_32();\r |
9147 | \r |
9148 | m68ki_write_32(ea, res);\r |
9149 | \r |
9150 | FLAG_N = NFLAG_32(res);\r |
9151 | FLAG_Z = res;\r |
9152 | FLAG_V = VFLAG_CLEAR;\r |
9153 | FLAG_C = CFLAG_CLEAR;\r |
9154 | }\r |
9155 | \r |
9156 | \r |
9157 | void m68k_op_move_32_ix_i(void)\r |
9158 | {\r |
9159 | uint res = OPER_I_32();\r |
9160 | uint ea = EA_AX_IX_32();\r |
9161 | \r |
9162 | m68ki_write_32(ea, res);\r |
9163 | \r |
9164 | FLAG_N = NFLAG_32(res);\r |
9165 | FLAG_Z = res;\r |
9166 | FLAG_V = VFLAG_CLEAR;\r |
9167 | FLAG_C = CFLAG_CLEAR;\r |
9168 | }\r |
9169 | \r |
9170 | \r |
9171 | void m68k_op_move_32_aw_d(void)\r |
9172 | {\r |
9173 | uint res = DY;\r |
9174 | uint ea = EA_AW_32();\r |
9175 | \r |
9176 | m68ki_write_32(ea, res);\r |
9177 | \r |
9178 | FLAG_N = NFLAG_32(res);\r |
9179 | FLAG_Z = res;\r |
9180 | FLAG_V = VFLAG_CLEAR;\r |
9181 | FLAG_C = CFLAG_CLEAR;\r |
9182 | }\r |
9183 | \r |
9184 | \r |
9185 | void m68k_op_move_32_aw_a(void)\r |
9186 | {\r |
9187 | uint res = AY;\r |
9188 | uint ea = EA_AW_32();\r |
9189 | \r |
9190 | m68ki_write_32(ea, res);\r |
9191 | \r |
9192 | FLAG_N = NFLAG_32(res);\r |
9193 | FLAG_Z = res;\r |
9194 | FLAG_V = VFLAG_CLEAR;\r |
9195 | FLAG_C = CFLAG_CLEAR;\r |
9196 | }\r |
9197 | \r |
9198 | \r |
9199 | void m68k_op_move_32_aw_ai(void)\r |
9200 | {\r |
9201 | uint res = OPER_AY_AI_32();\r |
9202 | uint ea = EA_AW_32();\r |
9203 | \r |
9204 | m68ki_write_32(ea, res);\r |
9205 | \r |
9206 | FLAG_N = NFLAG_32(res);\r |
9207 | FLAG_Z = res;\r |
9208 | FLAG_V = VFLAG_CLEAR;\r |
9209 | FLAG_C = CFLAG_CLEAR;\r |
9210 | }\r |
9211 | \r |
9212 | \r |
9213 | void m68k_op_move_32_aw_pi(void)\r |
9214 | {\r |
9215 | uint res = OPER_AY_PI_32();\r |
9216 | uint ea = EA_AW_32();\r |
9217 | \r |
9218 | m68ki_write_32(ea, res);\r |
9219 | \r |
9220 | FLAG_N = NFLAG_32(res);\r |
9221 | FLAG_Z = res;\r |
9222 | FLAG_V = VFLAG_CLEAR;\r |
9223 | FLAG_C = CFLAG_CLEAR;\r |
9224 | }\r |
9225 | \r |
9226 | \r |
9227 | void m68k_op_move_32_aw_pd(void)\r |
9228 | {\r |
9229 | uint res = OPER_AY_PD_32();\r |
9230 | uint ea = EA_AW_32();\r |
9231 | \r |
9232 | m68ki_write_32(ea, res);\r |
9233 | \r |
9234 | FLAG_N = NFLAG_32(res);\r |
9235 | FLAG_Z = res;\r |
9236 | FLAG_V = VFLAG_CLEAR;\r |
9237 | FLAG_C = CFLAG_CLEAR;\r |
9238 | }\r |
9239 | \r |
9240 | \r |
9241 | void m68k_op_move_32_aw_di(void)\r |
9242 | {\r |
9243 | uint res = OPER_AY_DI_32();\r |
9244 | uint ea = EA_AW_32();\r |
9245 | \r |
9246 | m68ki_write_32(ea, res);\r |
9247 | \r |
9248 | FLAG_N = NFLAG_32(res);\r |
9249 | FLAG_Z = res;\r |
9250 | FLAG_V = VFLAG_CLEAR;\r |
9251 | FLAG_C = CFLAG_CLEAR;\r |
9252 | }\r |
9253 | \r |
9254 | \r |
9255 | void m68k_op_move_32_aw_ix(void)\r |
9256 | {\r |
9257 | uint res = OPER_AY_IX_32();\r |
9258 | uint ea = EA_AW_32();\r |
9259 | \r |
9260 | m68ki_write_32(ea, res);\r |
9261 | \r |
9262 | FLAG_N = NFLAG_32(res);\r |
9263 | FLAG_Z = res;\r |
9264 | FLAG_V = VFLAG_CLEAR;\r |
9265 | FLAG_C = CFLAG_CLEAR;\r |
9266 | }\r |
9267 | \r |
9268 | \r |
9269 | void m68k_op_move_32_aw_aw(void)\r |
9270 | {\r |
9271 | uint res = OPER_AW_32();\r |
9272 | uint ea = EA_AW_32();\r |
9273 | \r |
9274 | m68ki_write_32(ea, res);\r |
9275 | \r |
9276 | FLAG_N = NFLAG_32(res);\r |
9277 | FLAG_Z = res;\r |
9278 | FLAG_V = VFLAG_CLEAR;\r |
9279 | FLAG_C = CFLAG_CLEAR;\r |
9280 | }\r |
9281 | \r |
9282 | \r |
9283 | void m68k_op_move_32_aw_al(void)\r |
9284 | {\r |
9285 | uint res = OPER_AL_32();\r |
9286 | uint ea = EA_AW_32();\r |
9287 | \r |
9288 | m68ki_write_32(ea, res);\r |
9289 | \r |
9290 | FLAG_N = NFLAG_32(res);\r |
9291 | FLAG_Z = res;\r |
9292 | FLAG_V = VFLAG_CLEAR;\r |
9293 | FLAG_C = CFLAG_CLEAR;\r |
9294 | }\r |
9295 | \r |
9296 | \r |
9297 | void m68k_op_move_32_aw_pcdi(void)\r |
9298 | {\r |
9299 | uint res = OPER_PCDI_32();\r |
9300 | uint ea = EA_AW_32();\r |
9301 | \r |
9302 | m68ki_write_32(ea, res);\r |
9303 | \r |
9304 | FLAG_N = NFLAG_32(res);\r |
9305 | FLAG_Z = res;\r |
9306 | FLAG_V = VFLAG_CLEAR;\r |
9307 | FLAG_C = CFLAG_CLEAR;\r |
9308 | }\r |
9309 | \r |
9310 | \r |
9311 | void m68k_op_move_32_aw_pcix(void)\r |
9312 | {\r |
9313 | uint res = OPER_PCIX_32();\r |
9314 | uint ea = EA_AW_32();\r |
9315 | \r |
9316 | m68ki_write_32(ea, res);\r |
9317 | \r |
9318 | FLAG_N = NFLAG_32(res);\r |
9319 | FLAG_Z = res;\r |
9320 | FLAG_V = VFLAG_CLEAR;\r |
9321 | FLAG_C = CFLAG_CLEAR;\r |
9322 | }\r |
9323 | \r |
9324 | \r |
9325 | void m68k_op_move_32_aw_i(void)\r |
9326 | {\r |
9327 | uint res = OPER_I_32();\r |
9328 | uint ea = EA_AW_32();\r |
9329 | \r |
9330 | m68ki_write_32(ea, res);\r |
9331 | \r |
9332 | FLAG_N = NFLAG_32(res);\r |
9333 | FLAG_Z = res;\r |
9334 | FLAG_V = VFLAG_CLEAR;\r |
9335 | FLAG_C = CFLAG_CLEAR;\r |
9336 | }\r |
9337 | \r |
9338 | \r |
9339 | void m68k_op_move_32_al_d(void)\r |
9340 | {\r |
9341 | uint res = DY;\r |
9342 | uint ea = EA_AL_32();\r |
9343 | \r |
9344 | m68ki_write_32(ea, res);\r |
9345 | \r |
9346 | FLAG_N = NFLAG_32(res);\r |
9347 | FLAG_Z = res;\r |
9348 | FLAG_V = VFLAG_CLEAR;\r |
9349 | FLAG_C = CFLAG_CLEAR;\r |
9350 | }\r |
9351 | \r |
9352 | \r |
9353 | void m68k_op_move_32_al_a(void)\r |
9354 | {\r |
9355 | uint res = AY;\r |
9356 | uint ea = EA_AL_32();\r |
9357 | \r |
9358 | m68ki_write_32(ea, res);\r |
9359 | \r |
9360 | FLAG_N = NFLAG_32(res);\r |
9361 | FLAG_Z = res;\r |
9362 | FLAG_V = VFLAG_CLEAR;\r |
9363 | FLAG_C = CFLAG_CLEAR;\r |
9364 | }\r |
9365 | \r |
9366 | \r |
9367 | void m68k_op_move_32_al_ai(void)\r |
9368 | {\r |
9369 | uint res = OPER_AY_AI_32();\r |
9370 | uint ea = EA_AL_32();\r |
9371 | \r |
9372 | m68ki_write_32(ea, res);\r |
9373 | \r |
9374 | FLAG_N = NFLAG_32(res);\r |
9375 | FLAG_Z = res;\r |
9376 | FLAG_V = VFLAG_CLEAR;\r |
9377 | FLAG_C = CFLAG_CLEAR;\r |
9378 | }\r |
9379 | \r |
9380 | \r |
9381 | void m68k_op_move_32_al_pi(void)\r |
9382 | {\r |
9383 | uint res = OPER_AY_PI_32();\r |
9384 | uint ea = EA_AL_32();\r |
9385 | \r |
9386 | m68ki_write_32(ea, res);\r |
9387 | \r |
9388 | FLAG_N = NFLAG_32(res);\r |
9389 | FLAG_Z = res;\r |
9390 | FLAG_V = VFLAG_CLEAR;\r |
9391 | FLAG_C = CFLAG_CLEAR;\r |
9392 | }\r |
9393 | \r |
9394 | \r |
9395 | void m68k_op_move_32_al_pd(void)\r |
9396 | {\r |
9397 | uint res = OPER_AY_PD_32();\r |
9398 | uint ea = EA_AL_32();\r |
9399 | \r |
9400 | m68ki_write_32(ea, res);\r |
9401 | \r |
9402 | FLAG_N = NFLAG_32(res);\r |
9403 | FLAG_Z = res;\r |
9404 | FLAG_V = VFLAG_CLEAR;\r |
9405 | FLAG_C = CFLAG_CLEAR;\r |
9406 | }\r |
9407 | \r |
9408 | \r |
9409 | void m68k_op_move_32_al_di(void)\r |
9410 | {\r |
9411 | uint res = OPER_AY_DI_32();\r |
9412 | uint ea = EA_AL_32();\r |
9413 | \r |
9414 | m68ki_write_32(ea, res);\r |
9415 | \r |
9416 | FLAG_N = NFLAG_32(res);\r |
9417 | FLAG_Z = res;\r |
9418 | FLAG_V = VFLAG_CLEAR;\r |
9419 | FLAG_C = CFLAG_CLEAR;\r |
9420 | }\r |
9421 | \r |
9422 | \r |
9423 | void m68k_op_move_32_al_ix(void)\r |
9424 | {\r |
9425 | uint res = OPER_AY_IX_32();\r |
9426 | uint ea = EA_AL_32();\r |
9427 | \r |
9428 | m68ki_write_32(ea, res);\r |
9429 | \r |
9430 | FLAG_N = NFLAG_32(res);\r |
9431 | FLAG_Z = res;\r |
9432 | FLAG_V = VFLAG_CLEAR;\r |
9433 | FLAG_C = CFLAG_CLEAR;\r |
9434 | }\r |
9435 | \r |
9436 | \r |
9437 | void m68k_op_move_32_al_aw(void)\r |
9438 | {\r |
9439 | uint res = OPER_AW_32();\r |
9440 | uint ea = EA_AL_32();\r |
9441 | \r |
9442 | m68ki_write_32(ea, res);\r |
9443 | \r |
9444 | FLAG_N = NFLAG_32(res);\r |
9445 | FLAG_Z = res;\r |
9446 | FLAG_V = VFLAG_CLEAR;\r |
9447 | FLAG_C = CFLAG_CLEAR;\r |
9448 | }\r |
9449 | \r |
9450 | \r |
9451 | void m68k_op_move_32_al_al(void)\r |
9452 | {\r |
9453 | uint res = OPER_AL_32();\r |
9454 | uint ea = EA_AL_32();\r |
9455 | \r |
9456 | m68ki_write_32(ea, res);\r |
9457 | \r |
9458 | FLAG_N = NFLAG_32(res);\r |
9459 | FLAG_Z = res;\r |
9460 | FLAG_V = VFLAG_CLEAR;\r |
9461 | FLAG_C = CFLAG_CLEAR;\r |
9462 | }\r |
9463 | \r |
9464 | \r |
9465 | void m68k_op_move_32_al_pcdi(void)\r |
9466 | {\r |
9467 | uint res = OPER_PCDI_32();\r |
9468 | uint ea = EA_AL_32();\r |
9469 | \r |
9470 | m68ki_write_32(ea, res);\r |
9471 | \r |
9472 | FLAG_N = NFLAG_32(res);\r |
9473 | FLAG_Z = res;\r |
9474 | FLAG_V = VFLAG_CLEAR;\r |
9475 | FLAG_C = CFLAG_CLEAR;\r |
9476 | }\r |
9477 | \r |
9478 | \r |
9479 | void m68k_op_move_32_al_pcix(void)\r |
9480 | {\r |
9481 | uint res = OPER_PCIX_32();\r |
9482 | uint ea = EA_AL_32();\r |
9483 | \r |
9484 | m68ki_write_32(ea, res);\r |
9485 | \r |
9486 | FLAG_N = NFLAG_32(res);\r |
9487 | FLAG_Z = res;\r |
9488 | FLAG_V = VFLAG_CLEAR;\r |
9489 | FLAG_C = CFLAG_CLEAR;\r |
9490 | }\r |
9491 | \r |
9492 | \r |
9493 | void m68k_op_move_32_al_i(void)\r |
9494 | {\r |
9495 | uint res = OPER_I_32();\r |
9496 | uint ea = EA_AL_32();\r |
9497 | \r |
9498 | m68ki_write_32(ea, res);\r |
9499 | \r |
9500 | FLAG_N = NFLAG_32(res);\r |
9501 | FLAG_Z = res;\r |
9502 | FLAG_V = VFLAG_CLEAR;\r |
9503 | FLAG_C = CFLAG_CLEAR;\r |
9504 | }\r |
9505 | \r |
9506 | \r |
9507 | void m68k_op_movea_16_d(void)\r |
9508 | {\r |
9509 | AX = MAKE_INT_16(DY);\r |
9510 | }\r |
9511 | \r |
9512 | \r |
9513 | void m68k_op_movea_16_a(void)\r |
9514 | {\r |
9515 | AX = MAKE_INT_16(AY);\r |
9516 | }\r |
9517 | \r |
9518 | \r |
9519 | void m68k_op_movea_16_ai(void)\r |
9520 | {\r |
9521 | AX = MAKE_INT_16(OPER_AY_AI_16());\r |
9522 | }\r |
9523 | \r |
9524 | \r |
9525 | void m68k_op_movea_16_pi(void)\r |
9526 | {\r |
9527 | AX = MAKE_INT_16(OPER_AY_PI_16());\r |
9528 | }\r |
9529 | \r |
9530 | \r |
9531 | void m68k_op_movea_16_pd(void)\r |
9532 | {\r |
9533 | AX = MAKE_INT_16(OPER_AY_PD_16());\r |
9534 | }\r |
9535 | \r |
9536 | \r |
9537 | void m68k_op_movea_16_di(void)\r |
9538 | {\r |
9539 | AX = MAKE_INT_16(OPER_AY_DI_16());\r |
9540 | }\r |
9541 | \r |
9542 | \r |
9543 | void m68k_op_movea_16_ix(void)\r |
9544 | {\r |
9545 | AX = MAKE_INT_16(OPER_AY_IX_16());\r |
9546 | }\r |
9547 | \r |
9548 | \r |
9549 | void m68k_op_movea_16_aw(void)\r |
9550 | {\r |
9551 | AX = MAKE_INT_16(OPER_AW_16());\r |
9552 | }\r |
9553 | \r |
9554 | \r |
9555 | void m68k_op_movea_16_al(void)\r |
9556 | {\r |
9557 | AX = MAKE_INT_16(OPER_AL_16());\r |
9558 | }\r |
9559 | \r |
9560 | \r |
9561 | void m68k_op_movea_16_pcdi(void)\r |
9562 | {\r |
9563 | AX = MAKE_INT_16(OPER_PCDI_16());\r |
9564 | }\r |
9565 | \r |
9566 | \r |
9567 | void m68k_op_movea_16_pcix(void)\r |
9568 | {\r |
9569 | AX = MAKE_INT_16(OPER_PCIX_16());\r |
9570 | }\r |
9571 | \r |
9572 | \r |
9573 | void m68k_op_movea_16_i(void)\r |
9574 | {\r |
9575 | AX = MAKE_INT_16(OPER_I_16());\r |
9576 | }\r |
9577 | \r |
9578 | \r |
9579 | void m68k_op_movea_32_d(void)\r |
9580 | {\r |
9581 | AX = DY;\r |
9582 | }\r |
9583 | \r |
9584 | \r |
9585 | void m68k_op_movea_32_a(void)\r |
9586 | {\r |
9587 | AX = AY;\r |
9588 | }\r |
9589 | \r |
9590 | \r |
9591 | void m68k_op_movea_32_ai(void)\r |
9592 | {\r |
9593 | AX = OPER_AY_AI_32();\r |
9594 | }\r |
9595 | \r |
9596 | \r |
9597 | void m68k_op_movea_32_pi(void)\r |
9598 | {\r |
9599 | AX = OPER_AY_PI_32();\r |
9600 | }\r |
9601 | \r |
9602 | \r |
9603 | void m68k_op_movea_32_pd(void)\r |
9604 | {\r |
9605 | AX = OPER_AY_PD_32();\r |
9606 | }\r |
9607 | \r |
9608 | \r |
9609 | void m68k_op_movea_32_di(void)\r |
9610 | {\r |
9611 | AX = OPER_AY_DI_32();\r |
9612 | }\r |
9613 | \r |
9614 | \r |
9615 | void m68k_op_movea_32_ix(void)\r |
9616 | {\r |
9617 | AX = OPER_AY_IX_32();\r |
9618 | }\r |
9619 | \r |
9620 | \r |
9621 | void m68k_op_movea_32_aw(void)\r |
9622 | {\r |
9623 | AX = OPER_AW_32();\r |
9624 | }\r |
9625 | \r |
9626 | \r |
9627 | void m68k_op_movea_32_al(void)\r |
9628 | {\r |
9629 | AX = OPER_AL_32();\r |
9630 | }\r |
9631 | \r |
9632 | \r |
9633 | void m68k_op_movea_32_pcdi(void)\r |
9634 | {\r |
9635 | AX = OPER_PCDI_32();\r |
9636 | }\r |
9637 | \r |
9638 | \r |
9639 | void m68k_op_movea_32_pcix(void)\r |
9640 | {\r |
9641 | AX = OPER_PCIX_32();\r |
9642 | }\r |
9643 | \r |
9644 | \r |
9645 | void m68k_op_movea_32_i(void)\r |
9646 | {\r |
9647 | AX = OPER_I_32();\r |
9648 | }\r |
9649 | \r |
9650 | \r |
9651 | void m68k_op_move_16_frc_d(void)\r |
9652 | {\r |
9653 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
9654 | {\r |
9655 | DY = MASK_OUT_BELOW_16(DY) | m68ki_get_ccr();\r |
9656 | return;\r |
9657 | }\r |
9658 | m68ki_exception_illegal();\r |
9659 | }\r |
9660 | \r |
9661 | \r |
9662 | void m68k_op_move_16_frc_ai(void)\r |
9663 | {\r |
9664 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
9665 | {\r |
9666 | m68ki_write_16(EA_AY_AI_16(), m68ki_get_ccr());\r |
9667 | return;\r |
9668 | }\r |
9669 | m68ki_exception_illegal();\r |
9670 | }\r |
9671 | \r |
9672 | \r |
9673 | void m68k_op_move_16_frc_pi(void)\r |
9674 | {\r |
9675 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
9676 | {\r |
9677 | m68ki_write_16(EA_AY_PI_16(), m68ki_get_ccr());\r |
9678 | return;\r |
9679 | }\r |
9680 | m68ki_exception_illegal();\r |
9681 | }\r |
9682 | \r |
9683 | \r |
9684 | void m68k_op_move_16_frc_pd(void)\r |
9685 | {\r |
9686 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
9687 | {\r |
9688 | m68ki_write_16(EA_AY_PD_16(), m68ki_get_ccr());\r |
9689 | return;\r |
9690 | }\r |
9691 | m68ki_exception_illegal();\r |
9692 | }\r |
9693 | \r |
9694 | \r |
9695 | void m68k_op_move_16_frc_di(void)\r |
9696 | {\r |
9697 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
9698 | {\r |
9699 | m68ki_write_16(EA_AY_DI_16(), m68ki_get_ccr());\r |
9700 | return;\r |
9701 | }\r |
9702 | m68ki_exception_illegal();\r |
9703 | }\r |
9704 | \r |
9705 | \r |
9706 | void m68k_op_move_16_frc_ix(void)\r |
9707 | {\r |
9708 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
9709 | {\r |
9710 | m68ki_write_16(EA_AY_IX_16(), m68ki_get_ccr());\r |
9711 | return;\r |
9712 | }\r |
9713 | m68ki_exception_illegal();\r |
9714 | }\r |
9715 | \r |
9716 | \r |
9717 | void m68k_op_move_16_frc_aw(void)\r |
9718 | {\r |
9719 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
9720 | {\r |
9721 | m68ki_write_16(EA_AW_16(), m68ki_get_ccr());\r |
9722 | return;\r |
9723 | }\r |
9724 | m68ki_exception_illegal();\r |
9725 | }\r |
9726 | \r |
9727 | \r |
9728 | void m68k_op_move_16_frc_al(void)\r |
9729 | {\r |
9730 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
9731 | {\r |
9732 | m68ki_write_16(EA_AL_16(), m68ki_get_ccr());\r |
9733 | return;\r |
9734 | }\r |
9735 | m68ki_exception_illegal();\r |
9736 | }\r |
9737 | \r |
9738 | \r |
9739 | void m68k_op_move_16_toc_d(void)\r |
9740 | {\r |
9741 | m68ki_set_ccr(DY);\r |
9742 | }\r |
9743 | \r |
9744 | \r |
9745 | void m68k_op_move_16_toc_ai(void)\r |
9746 | {\r |
9747 | m68ki_set_ccr(OPER_AY_AI_16());\r |
9748 | }\r |
9749 | \r |
9750 | \r |
9751 | void m68k_op_move_16_toc_pi(void)\r |
9752 | {\r |
9753 | m68ki_set_ccr(OPER_AY_PI_16());\r |
9754 | }\r |
9755 | \r |
9756 | \r |
9757 | void m68k_op_move_16_toc_pd(void)\r |
9758 | {\r |
9759 | m68ki_set_ccr(OPER_AY_PD_16());\r |
9760 | }\r |
9761 | \r |
9762 | \r |
9763 | void m68k_op_move_16_toc_di(void)\r |
9764 | {\r |
9765 | m68ki_set_ccr(OPER_AY_DI_16());\r |
9766 | }\r |
9767 | \r |
9768 | \r |
9769 | void m68k_op_move_16_toc_ix(void)\r |
9770 | {\r |
9771 | m68ki_set_ccr(OPER_AY_IX_16());\r |
9772 | }\r |
9773 | \r |
9774 | \r |
9775 | void m68k_op_move_16_toc_aw(void)\r |
9776 | {\r |
9777 | m68ki_set_ccr(OPER_AW_16());\r |
9778 | }\r |
9779 | \r |
9780 | \r |
9781 | void m68k_op_move_16_toc_al(void)\r |
9782 | {\r |
9783 | m68ki_set_ccr(OPER_AL_16());\r |
9784 | }\r |
9785 | \r |
9786 | \r |
9787 | void m68k_op_move_16_toc_pcdi(void)\r |
9788 | {\r |
9789 | m68ki_set_ccr(OPER_PCDI_16());\r |
9790 | }\r |
9791 | \r |
9792 | \r |
9793 | void m68k_op_move_16_toc_pcix(void)\r |
9794 | {\r |
9795 | m68ki_set_ccr(OPER_PCIX_16());\r |
9796 | }\r |
9797 | \r |
9798 | \r |
9799 | void m68k_op_move_16_toc_i(void)\r |
9800 | {\r |
9801 | m68ki_set_ccr(OPER_I_16());\r |
9802 | }\r |
9803 | \r |
9804 | \r |
9805 | void m68k_op_move_16_frs_d(void)\r |
9806 | {\r |
9807 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */\r |
9808 | {\r |
9809 | DY = MASK_OUT_BELOW_16(DY) | m68ki_get_sr();\r |
9810 | return;\r |
9811 | }\r |
9812 | m68ki_exception_privilege_violation();\r |
9813 | }\r |
9814 | \r |
9815 | \r |
9816 | void m68k_op_move_16_frs_ai(void)\r |
9817 | {\r |
9818 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */\r |
9819 | {\r |
9820 | uint ea = EA_AY_AI_16();\r |
9821 | m68ki_write_16(ea, m68ki_get_sr());\r |
9822 | return;\r |
9823 | }\r |
9824 | m68ki_exception_privilege_violation();\r |
9825 | }\r |
9826 | \r |
9827 | \r |
9828 | void m68k_op_move_16_frs_pi(void)\r |
9829 | {\r |
9830 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */\r |
9831 | {\r |
9832 | uint ea = EA_AY_PI_16();\r |
9833 | m68ki_write_16(ea, m68ki_get_sr());\r |
9834 | return;\r |
9835 | }\r |
9836 | m68ki_exception_privilege_violation();\r |
9837 | }\r |
9838 | \r |
9839 | \r |
9840 | void m68k_op_move_16_frs_pd(void)\r |
9841 | {\r |
9842 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */\r |
9843 | {\r |
9844 | uint ea = EA_AY_PD_16();\r |
9845 | m68ki_write_16(ea, m68ki_get_sr());\r |
9846 | return;\r |
9847 | }\r |
9848 | m68ki_exception_privilege_violation();\r |
9849 | }\r |
9850 | \r |
9851 | \r |
9852 | void m68k_op_move_16_frs_di(void)\r |
9853 | {\r |
9854 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */\r |
9855 | {\r |
9856 | uint ea = EA_AY_DI_16();\r |
9857 | m68ki_write_16(ea, m68ki_get_sr());\r |
9858 | return;\r |
9859 | }\r |
9860 | m68ki_exception_privilege_violation();\r |
9861 | }\r |
9862 | \r |
9863 | \r |
9864 | void m68k_op_move_16_frs_ix(void)\r |
9865 | {\r |
9866 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */\r |
9867 | {\r |
9868 | uint ea = EA_AY_IX_16();\r |
9869 | m68ki_write_16(ea, m68ki_get_sr());\r |
9870 | return;\r |
9871 | }\r |
9872 | m68ki_exception_privilege_violation();\r |
9873 | }\r |
9874 | \r |
9875 | \r |
9876 | void m68k_op_move_16_frs_aw(void)\r |
9877 | {\r |
9878 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */\r |
9879 | {\r |
9880 | uint ea = EA_AW_16();\r |
9881 | m68ki_write_16(ea, m68ki_get_sr());\r |
9882 | return;\r |
9883 | }\r |
9884 | m68ki_exception_privilege_violation();\r |
9885 | }\r |
9886 | \r |
9887 | \r |
9888 | void m68k_op_move_16_frs_al(void)\r |
9889 | {\r |
9890 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */\r |
9891 | {\r |
9892 | uint ea = EA_AL_16();\r |
9893 | m68ki_write_16(ea, m68ki_get_sr());\r |
9894 | return;\r |
9895 | }\r |
9896 | m68ki_exception_privilege_violation();\r |
9897 | }\r |
9898 | \r |
9899 | \r |
9900 | void m68k_op_move_16_tos_d(void)\r |
9901 | {\r |
9902 | if(FLAG_S)\r |
9903 | {\r |
9904 | m68ki_set_sr(DY);\r |
9905 | return;\r |
9906 | }\r |
9907 | m68ki_exception_privilege_violation();\r |
9908 | }\r |
9909 | \r |
9910 | \r |
9911 | void m68k_op_move_16_tos_ai(void)\r |
9912 | {\r |
9913 | if(FLAG_S)\r |
9914 | {\r |
9915 | uint new_sr = OPER_AY_AI_16();\r |
9916 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9917 | m68ki_set_sr(new_sr);\r |
9918 | return;\r |
9919 | }\r |
9920 | m68ki_exception_privilege_violation();\r |
9921 | }\r |
9922 | \r |
9923 | \r |
9924 | void m68k_op_move_16_tos_pi(void)\r |
9925 | {\r |
9926 | if(FLAG_S)\r |
9927 | {\r |
9928 | uint new_sr = OPER_AY_PI_16();\r |
9929 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9930 | m68ki_set_sr(new_sr);\r |
9931 | return;\r |
9932 | }\r |
9933 | m68ki_exception_privilege_violation();\r |
9934 | }\r |
9935 | \r |
9936 | \r |
9937 | void m68k_op_move_16_tos_pd(void)\r |
9938 | {\r |
9939 | if(FLAG_S)\r |
9940 | {\r |
9941 | uint new_sr = OPER_AY_PD_16();\r |
9942 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9943 | m68ki_set_sr(new_sr);\r |
9944 | return;\r |
9945 | }\r |
9946 | m68ki_exception_privilege_violation();\r |
9947 | }\r |
9948 | \r |
9949 | \r |
9950 | void m68k_op_move_16_tos_di(void)\r |
9951 | {\r |
9952 | if(FLAG_S)\r |
9953 | {\r |
9954 | uint new_sr = OPER_AY_DI_16();\r |
9955 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9956 | m68ki_set_sr(new_sr);\r |
9957 | return;\r |
9958 | }\r |
9959 | m68ki_exception_privilege_violation();\r |
9960 | }\r |
9961 | \r |
9962 | \r |
9963 | void m68k_op_move_16_tos_ix(void)\r |
9964 | {\r |
9965 | if(FLAG_S)\r |
9966 | {\r |
9967 | uint new_sr = OPER_AY_IX_16();\r |
9968 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9969 | m68ki_set_sr(new_sr);\r |
9970 | return;\r |
9971 | }\r |
9972 | m68ki_exception_privilege_violation();\r |
9973 | }\r |
9974 | \r |
9975 | \r |
9976 | void m68k_op_move_16_tos_aw(void)\r |
9977 | {\r |
9978 | if(FLAG_S)\r |
9979 | {\r |
9980 | uint new_sr = OPER_AW_16();\r |
9981 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9982 | m68ki_set_sr(new_sr);\r |
9983 | return;\r |
9984 | }\r |
9985 | m68ki_exception_privilege_violation();\r |
9986 | }\r |
9987 | \r |
9988 | \r |
9989 | void m68k_op_move_16_tos_al(void)\r |
9990 | {\r |
9991 | if(FLAG_S)\r |
9992 | {\r |
9993 | uint new_sr = OPER_AL_16();\r |
9994 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
9995 | m68ki_set_sr(new_sr);\r |
9996 | return;\r |
9997 | }\r |
9998 | m68ki_exception_privilege_violation();\r |
9999 | }\r |
10000 | \r |
10001 | \r |
10002 | void m68k_op_move_16_tos_pcdi(void)\r |
10003 | {\r |
10004 | if(FLAG_S)\r |
10005 | {\r |
10006 | uint new_sr = OPER_PCDI_16();\r |
10007 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
10008 | m68ki_set_sr(new_sr);\r |
10009 | return;\r |
10010 | }\r |
10011 | m68ki_exception_privilege_violation();\r |
10012 | }\r |
10013 | \r |
10014 | \r |
10015 | void m68k_op_move_16_tos_pcix(void)\r |
10016 | {\r |
10017 | if(FLAG_S)\r |
10018 | {\r |
10019 | uint new_sr = OPER_PCIX_16();\r |
10020 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
10021 | m68ki_set_sr(new_sr);\r |
10022 | return;\r |
10023 | }\r |
10024 | m68ki_exception_privilege_violation();\r |
10025 | }\r |
10026 | \r |
10027 | \r |
10028 | void m68k_op_move_16_tos_i(void)\r |
10029 | {\r |
10030 | if(FLAG_S)\r |
10031 | {\r |
10032 | uint new_sr = OPER_I_16();\r |
10033 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
10034 | m68ki_set_sr(new_sr);\r |
10035 | return;\r |
10036 | }\r |
10037 | m68ki_exception_privilege_violation();\r |
10038 | }\r |
10039 | \r |
10040 | \r |
10041 | void m68k_op_move_32_fru(void)\r |
10042 | {\r |
10043 | if(FLAG_S)\r |
10044 | {\r |
10045 | AY = REG_USP;\r |
10046 | return;\r |
10047 | }\r |
10048 | m68ki_exception_privilege_violation();\r |
10049 | }\r |
10050 | \r |
10051 | \r |
10052 | void m68k_op_move_32_tou(void)\r |
10053 | {\r |
10054 | if(FLAG_S)\r |
10055 | {\r |
10056 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
10057 | REG_USP = AY;\r |
10058 | return;\r |
10059 | }\r |
10060 | m68ki_exception_privilege_violation();\r |
10061 | }\r |
10062 | \r |
10063 | \r |
10064 | void m68k_op_movec_32_cr(void)\r |
10065 | {\r |
10066 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
10067 | {\r |
10068 | if(FLAG_S)\r |
10069 | {\r |
10070 | uint word2 = OPER_I_16();\r |
10071 | \r |
10072 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
10073 | switch (word2 & 0xfff)\r |
10074 | {\r |
10075 | case 0x000: /* SFC */\r |
10076 | REG_DA[(word2 >> 12) & 15] = REG_SFC;\r |
10077 | return;\r |
10078 | case 0x001: /* DFC */\r |
10079 | REG_DA[(word2 >> 12) & 15] = REG_DFC;\r |
10080 | return;\r |
10081 | case 0x002: /* CACR */\r |
10082 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10083 | {\r |
10084 | REG_DA[(word2 >> 12) & 15] = REG_CACR;\r |
10085 | return;\r |
10086 | }\r |
10087 | return;\r |
10088 | case 0x800: /* USP */\r |
10089 | REG_DA[(word2 >> 12) & 15] = REG_USP;\r |
10090 | return;\r |
10091 | case 0x801: /* VBR */\r |
10092 | REG_DA[(word2 >> 12) & 15] = REG_VBR;\r |
10093 | return;\r |
10094 | case 0x802: /* CAAR */\r |
10095 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10096 | {\r |
10097 | REG_DA[(word2 >> 12) & 15] = REG_CAAR;\r |
10098 | return;\r |
10099 | }\r |
10100 | m68ki_exception_illegal();\r |
10101 | break;\r |
10102 | case 0x803: /* MSP */\r |
10103 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10104 | {\r |
10105 | REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_SP : REG_MSP;\r |
10106 | return;\r |
10107 | }\r |
10108 | m68ki_exception_illegal();\r |
10109 | return;\r |
10110 | case 0x804: /* ISP */\r |
10111 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10112 | {\r |
10113 | REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_ISP : REG_SP;\r |
10114 | return;\r |
10115 | }\r |
10116 | m68ki_exception_illegal();\r |
10117 | return;\r |
10118 | case 0x003: /* TC */\r |
10119 | if(CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10120 | {\r |
10121 | /* TODO */\r |
10122 | return;\r |
10123 | }\r |
10124 | m68ki_exception_illegal();\r |
10125 | return;\r |
10126 | case 0x004: /* ITT0 */\r |
10127 | if(CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10128 | {\r |
10129 | /* TODO */\r |
10130 | return;\r |
10131 | }\r |
10132 | m68ki_exception_illegal();\r |
10133 | return;\r |
10134 | case 0x005: /* ITT1 */\r |
10135 | if(CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10136 | {\r |
10137 | /* TODO */\r |
10138 | return;\r |
10139 | }\r |
10140 | m68ki_exception_illegal();\r |
10141 | return;\r |
10142 | case 0x006: /* DTT0 */\r |
10143 | if(CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10144 | {\r |
10145 | /* TODO */\r |
10146 | return;\r |
10147 | }\r |
10148 | m68ki_exception_illegal();\r |
10149 | return;\r |
10150 | case 0x007: /* DTT1 */\r |
10151 | if(CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10152 | {\r |
10153 | /* TODO */\r |
10154 | return;\r |
10155 | }\r |
10156 | m68ki_exception_illegal();\r |
10157 | return;\r |
10158 | case 0x805: /* MMUSR */\r |
10159 | if(CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10160 | {\r |
10161 | /* TODO */\r |
10162 | return;\r |
10163 | }\r |
10164 | m68ki_exception_illegal();\r |
10165 | return;\r |
10166 | case 0x806: /* URP */\r |
10167 | if(CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10168 | {\r |
10169 | /* TODO */\r |
10170 | return;\r |
10171 | }\r |
10172 | m68ki_exception_illegal();\r |
10173 | return;\r |
10174 | case 0x807: /* SRP */\r |
10175 | if(CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10176 | {\r |
10177 | /* TODO */\r |
10178 | return;\r |
10179 | }\r |
10180 | m68ki_exception_illegal();\r |
10181 | return;\r |
10182 | default:\r |
10183 | m68ki_exception_illegal();\r |
10184 | return;\r |
10185 | }\r |
10186 | }\r |
10187 | m68ki_exception_privilege_violation();\r |
10188 | return;\r |
10189 | }\r |
10190 | m68ki_exception_illegal();\r |
10191 | }\r |
10192 | \r |
10193 | \r |
10194 | void m68k_op_movec_32_rc(void)\r |
10195 | {\r |
10196 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
10197 | {\r |
10198 | if(FLAG_S)\r |
10199 | {\r |
10200 | uint word2 = OPER_I_16();\r |
10201 | \r |
10202 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
10203 | switch (word2 & 0xfff)\r |
10204 | {\r |
10205 | case 0x000: /* SFC */\r |
10206 | REG_SFC = REG_DA[(word2 >> 12) & 15] & 7;\r |
10207 | return;\r |
10208 | case 0x001: /* DFC */\r |
10209 | REG_DFC = REG_DA[(word2 >> 12) & 15] & 7;\r |
10210 | return;\r |
10211 | case 0x002: /* CACR */\r |
10212 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10213 | {\r |
10214 | REG_CACR = REG_DA[(word2 >> 12) & 15];\r |
10215 | return;\r |
10216 | }\r |
10217 | m68ki_exception_illegal();\r |
10218 | return;\r |
10219 | case 0x800: /* USP */\r |
10220 | REG_USP = REG_DA[(word2 >> 12) & 15];\r |
10221 | return;\r |
10222 | case 0x801: /* VBR */\r |
10223 | REG_VBR = REG_DA[(word2 >> 12) & 15];\r |
10224 | return;\r |
10225 | case 0x802: /* CAAR */\r |
10226 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10227 | {\r |
10228 | REG_CAAR = REG_DA[(word2 >> 12) & 15];\r |
10229 | return;\r |
10230 | }\r |
10231 | m68ki_exception_illegal();\r |
10232 | return;\r |
10233 | case 0x803: /* MSP */\r |
10234 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10235 | {\r |
10236 | /* we are in supervisor mode so just check for M flag */\r |
10237 | if(!FLAG_M)\r |
10238 | {\r |
10239 | REG_MSP = REG_DA[(word2 >> 12) & 15];\r |
10240 | return;\r |
10241 | }\r |
10242 | REG_SP = REG_DA[(word2 >> 12) & 15];\r |
10243 | return;\r |
10244 | }\r |
10245 | m68ki_exception_illegal();\r |
10246 | return;\r |
10247 | case 0x804: /* ISP */\r |
10248 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
10249 | {\r |
10250 | if(!FLAG_M)\r |
10251 | {\r |
10252 | REG_SP = REG_DA[(word2 >> 12) & 15];\r |
10253 | return;\r |
10254 | }\r |
10255 | REG_ISP = REG_DA[(word2 >> 12) & 15];\r |
10256 | return;\r |
10257 | }\r |
10258 | m68ki_exception_illegal();\r |
10259 | return;\r |
10260 | case 0x003: /* TC */\r |
10261 | if (CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10262 | {\r |
10263 | /* TODO */\r |
10264 | return;\r |
10265 | }\r |
10266 | m68ki_exception_illegal();\r |
10267 | return;\r |
10268 | case 0x004: /* ITT0 */\r |
10269 | if (CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10270 | {\r |
10271 | /* TODO */\r |
10272 | return;\r |
10273 | }\r |
10274 | m68ki_exception_illegal();\r |
10275 | return;\r |
10276 | case 0x005: /* ITT1 */\r |
10277 | if (CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10278 | {\r |
10279 | /* TODO */\r |
10280 | return;\r |
10281 | }\r |
10282 | m68ki_exception_illegal();\r |
10283 | return;\r |
10284 | case 0x006: /* DTT0 */\r |
10285 | if (CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10286 | {\r |
10287 | /* TODO */\r |
10288 | return;\r |
10289 | }\r |
10290 | m68ki_exception_illegal();\r |
10291 | return;\r |
10292 | case 0x007: /* DTT1 */\r |
10293 | if (CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10294 | {\r |
10295 | /* TODO */\r |
10296 | return;\r |
10297 | }\r |
10298 | m68ki_exception_illegal();\r |
10299 | return;\r |
10300 | case 0x805: /* MMUSR */\r |
10301 | if (CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10302 | {\r |
10303 | /* TODO */\r |
10304 | return;\r |
10305 | }\r |
10306 | m68ki_exception_illegal();\r |
10307 | return;\r |
10308 | case 0x806: /* URP */\r |
10309 | if (CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10310 | {\r |
10311 | /* TODO */\r |
10312 | return;\r |
10313 | }\r |
10314 | m68ki_exception_illegal();\r |
10315 | return;\r |
10316 | case 0x807: /* SRP */\r |
10317 | if (CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
10318 | {\r |
10319 | /* TODO */\r |
10320 | return;\r |
10321 | }\r |
10322 | m68ki_exception_illegal();\r |
10323 | return;\r |
10324 | default:\r |
10325 | m68ki_exception_illegal();\r |
10326 | return;\r |
10327 | }\r |
10328 | }\r |
10329 | m68ki_exception_privilege_violation();\r |
10330 | return;\r |
10331 | }\r |
10332 | m68ki_exception_illegal();\r |
10333 | }\r |
10334 | \r |
10335 | \r |
10336 | void m68k_op_movem_16_re_pd(void)\r |
10337 | {\r |
10338 | uint i = 0;\r |
10339 | uint register_list = OPER_I_16();\r |
10340 | uint ea = AY;\r |
10341 | uint count = 0;\r |
10342 | \r |
10343 | for(; i < 16; i++)\r |
10344 | if(register_list & (1 << i))\r |
10345 | {\r |
10346 | ea -= 2;\r |
10347 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[15-i]));\r |
10348 | count++;\r |
10349 | }\r |
10350 | AY = ea;\r |
10351 | \r |
10352 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10353 | }\r |
10354 | \r |
10355 | \r |
10356 | void m68k_op_movem_16_re_ai(void)\r |
10357 | {\r |
10358 | uint i = 0;\r |
10359 | uint register_list = OPER_I_16();\r |
10360 | uint ea = EA_AY_AI_16();\r |
10361 | uint count = 0;\r |
10362 | \r |
10363 | for(; i < 16; i++)\r |
10364 | if(register_list & (1 << i))\r |
10365 | {\r |
10366 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i]));\r |
10367 | ea += 2;\r |
10368 | count++;\r |
10369 | }\r |
10370 | \r |
10371 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10372 | }\r |
10373 | \r |
10374 | \r |
10375 | void m68k_op_movem_16_re_di(void)\r |
10376 | {\r |
10377 | uint i = 0;\r |
10378 | uint register_list = OPER_I_16();\r |
10379 | uint ea = EA_AY_DI_16();\r |
10380 | uint count = 0;\r |
10381 | \r |
10382 | for(; i < 16; i++)\r |
10383 | if(register_list & (1 << i))\r |
10384 | {\r |
10385 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i]));\r |
10386 | ea += 2;\r |
10387 | count++;\r |
10388 | }\r |
10389 | \r |
10390 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10391 | }\r |
10392 | \r |
10393 | \r |
10394 | void m68k_op_movem_16_re_ix(void)\r |
10395 | {\r |
10396 | uint i = 0;\r |
10397 | uint register_list = OPER_I_16();\r |
10398 | uint ea = EA_AY_IX_16();\r |
10399 | uint count = 0;\r |
10400 | \r |
10401 | for(; i < 16; i++)\r |
10402 | if(register_list & (1 << i))\r |
10403 | {\r |
10404 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i]));\r |
10405 | ea += 2;\r |
10406 | count++;\r |
10407 | }\r |
10408 | \r |
10409 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10410 | }\r |
10411 | \r |
10412 | \r |
10413 | void m68k_op_movem_16_re_aw(void)\r |
10414 | {\r |
10415 | uint i = 0;\r |
10416 | uint register_list = OPER_I_16();\r |
10417 | uint ea = EA_AW_16();\r |
10418 | uint count = 0;\r |
10419 | \r |
10420 | for(; i < 16; i++)\r |
10421 | if(register_list & (1 << i))\r |
10422 | {\r |
10423 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i]));\r |
10424 | ea += 2;\r |
10425 | count++;\r |
10426 | }\r |
10427 | \r |
10428 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10429 | }\r |
10430 | \r |
10431 | \r |
10432 | void m68k_op_movem_16_re_al(void)\r |
10433 | {\r |
10434 | uint i = 0;\r |
10435 | uint register_list = OPER_I_16();\r |
10436 | uint ea = EA_AL_16();\r |
10437 | uint count = 0;\r |
10438 | \r |
10439 | for(; i < 16; i++)\r |
10440 | if(register_list & (1 << i))\r |
10441 | {\r |
10442 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i]));\r |
10443 | ea += 2;\r |
10444 | count++;\r |
10445 | }\r |
10446 | \r |
10447 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10448 | }\r |
10449 | \r |
10450 | \r |
10451 | void m68k_op_movem_32_re_pd(void)\r |
10452 | {\r |
10453 | uint i = 0;\r |
10454 | uint register_list = OPER_I_16();\r |
10455 | uint ea = AY;\r |
10456 | uint count = 0;\r |
10457 | \r |
10458 | for(; i < 16; i++)\r |
10459 | if(register_list & (1 << i))\r |
10460 | {\r |
10461 | ea -= 4;\r |
10462 | m68ki_write_32(ea, REG_DA[15-i]);\r |
10463 | count++;\r |
10464 | }\r |
10465 | AY = ea;\r |
10466 | \r |
10467 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10468 | }\r |
10469 | \r |
10470 | \r |
10471 | void m68k_op_movem_32_re_ai(void)\r |
10472 | {\r |
10473 | uint i = 0;\r |
10474 | uint register_list = OPER_I_16();\r |
10475 | uint ea = EA_AY_AI_32();\r |
10476 | uint count = 0;\r |
10477 | \r |
10478 | for(; i < 16; i++)\r |
10479 | if(register_list & (1 << i))\r |
10480 | {\r |
10481 | m68ki_write_32(ea, REG_DA[i]);\r |
10482 | ea += 4;\r |
10483 | count++;\r |
10484 | }\r |
10485 | \r |
10486 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10487 | }\r |
10488 | \r |
10489 | \r |
10490 | void m68k_op_movem_32_re_di(void)\r |
10491 | {\r |
10492 | uint i = 0;\r |
10493 | uint register_list = OPER_I_16();\r |
10494 | uint ea = EA_AY_DI_32();\r |
10495 | uint count = 0;\r |
10496 | \r |
10497 | for(; i < 16; i++)\r |
10498 | if(register_list & (1 << i))\r |
10499 | {\r |
10500 | m68ki_write_32(ea, REG_DA[i]);\r |
10501 | ea += 4;\r |
10502 | count++;\r |
10503 | }\r |
10504 | \r |
10505 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10506 | }\r |
10507 | \r |
10508 | \r |
10509 | void m68k_op_movem_32_re_ix(void)\r |
10510 | {\r |
10511 | uint i = 0;\r |
10512 | uint register_list = OPER_I_16();\r |
10513 | uint ea = EA_AY_IX_32();\r |
10514 | uint count = 0;\r |
10515 | \r |
10516 | for(; i < 16; i++)\r |
10517 | if(register_list & (1 << i))\r |
10518 | {\r |
10519 | m68ki_write_32(ea, REG_DA[i]);\r |
10520 | ea += 4;\r |
10521 | count++;\r |
10522 | }\r |
10523 | \r |
10524 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10525 | }\r |
10526 | \r |
10527 | \r |
10528 | void m68k_op_movem_32_re_aw(void)\r |
10529 | {\r |
10530 | uint i = 0;\r |
10531 | uint register_list = OPER_I_16();\r |
10532 | uint ea = EA_AW_32();\r |
10533 | uint count = 0;\r |
10534 | \r |
10535 | for(; i < 16; i++)\r |
10536 | if(register_list & (1 << i))\r |
10537 | {\r |
10538 | m68ki_write_32(ea, REG_DA[i]);\r |
10539 | ea += 4;\r |
10540 | count++;\r |
10541 | }\r |
10542 | \r |
10543 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10544 | }\r |
10545 | \r |
10546 | \r |
10547 | void m68k_op_movem_32_re_al(void)\r |
10548 | {\r |
10549 | uint i = 0;\r |
10550 | uint register_list = OPER_I_16();\r |
10551 | uint ea = EA_AL_32();\r |
10552 | uint count = 0;\r |
10553 | \r |
10554 | for(; i < 16; i++)\r |
10555 | if(register_list & (1 << i))\r |
10556 | {\r |
10557 | m68ki_write_32(ea, REG_DA[i]);\r |
10558 | ea += 4;\r |
10559 | count++;\r |
10560 | }\r |
10561 | \r |
10562 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10563 | }\r |
10564 | \r |
10565 | \r |
10566 | void m68k_op_movem_16_er_pi(void)\r |
10567 | {\r |
10568 | uint i = 0;\r |
10569 | uint register_list = OPER_I_16();\r |
10570 | uint ea = AY;\r |
10571 | uint count = 0;\r |
10572 | \r |
10573 | for(; i < 16; i++)\r |
10574 | if(register_list & (1 << i))\r |
10575 | {\r |
10576 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));\r |
10577 | ea += 2;\r |
10578 | count++;\r |
10579 | }\r |
10580 | AY = ea;\r |
10581 | \r |
10582 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10583 | }\r |
10584 | \r |
10585 | \r |
10586 | void m68k_op_movem_16_er_pcdi(void)\r |
10587 | {\r |
10588 | uint i = 0;\r |
10589 | uint register_list = OPER_I_16();\r |
10590 | uint ea = EA_PCDI_16();\r |
10591 | uint count = 0;\r |
10592 | \r |
10593 | for(; i < 16; i++)\r |
10594 | if(register_list & (1 << i))\r |
10595 | {\r |
10596 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16(ea)));\r |
10597 | ea += 2;\r |
10598 | count++;\r |
10599 | }\r |
10600 | \r |
10601 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10602 | }\r |
10603 | \r |
10604 | \r |
10605 | void m68k_op_movem_16_er_pcix(void)\r |
10606 | {\r |
10607 | uint i = 0;\r |
10608 | uint register_list = OPER_I_16();\r |
10609 | uint ea = EA_PCIX_16();\r |
10610 | uint count = 0;\r |
10611 | \r |
10612 | for(; i < 16; i++)\r |
10613 | if(register_list & (1 << i))\r |
10614 | {\r |
10615 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16(ea)));\r |
10616 | ea += 2;\r |
10617 | count++;\r |
10618 | }\r |
10619 | \r |
10620 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10621 | }\r |
10622 | \r |
10623 | \r |
10624 | void m68k_op_movem_16_er_ai(void)\r |
10625 | {\r |
10626 | uint i = 0;\r |
10627 | uint register_list = OPER_I_16();\r |
10628 | uint ea = EA_AY_AI_16();\r |
10629 | uint count = 0;\r |
10630 | \r |
10631 | for(; i < 16; i++)\r |
10632 | if(register_list & (1 << i))\r |
10633 | {\r |
10634 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));\r |
10635 | ea += 2;\r |
10636 | count++;\r |
10637 | }\r |
10638 | \r |
10639 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10640 | }\r |
10641 | \r |
10642 | \r |
10643 | void m68k_op_movem_16_er_di(void)\r |
10644 | {\r |
10645 | uint i = 0;\r |
10646 | uint register_list = OPER_I_16();\r |
10647 | uint ea = EA_AY_DI_16();\r |
10648 | uint count = 0;\r |
10649 | \r |
10650 | for(; i < 16; i++)\r |
10651 | if(register_list & (1 << i))\r |
10652 | {\r |
10653 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));\r |
10654 | ea += 2;\r |
10655 | count++;\r |
10656 | }\r |
10657 | \r |
10658 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10659 | }\r |
10660 | \r |
10661 | \r |
10662 | void m68k_op_movem_16_er_ix(void)\r |
10663 | {\r |
10664 | uint i = 0;\r |
10665 | uint register_list = OPER_I_16();\r |
10666 | uint ea = EA_AY_IX_16();\r |
10667 | uint count = 0;\r |
10668 | \r |
10669 | for(; i < 16; i++)\r |
10670 | if(register_list & (1 << i))\r |
10671 | {\r |
10672 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));\r |
10673 | ea += 2;\r |
10674 | count++;\r |
10675 | }\r |
10676 | \r |
10677 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10678 | }\r |
10679 | \r |
10680 | \r |
10681 | void m68k_op_movem_16_er_aw(void)\r |
10682 | {\r |
10683 | uint i = 0;\r |
10684 | uint register_list = OPER_I_16();\r |
10685 | uint ea = EA_AW_16();\r |
10686 | uint count = 0;\r |
10687 | \r |
10688 | for(; i < 16; i++)\r |
10689 | if(register_list & (1 << i))\r |
10690 | {\r |
10691 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));\r |
10692 | ea += 2;\r |
10693 | count++;\r |
10694 | }\r |
10695 | \r |
10696 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10697 | }\r |
10698 | \r |
10699 | \r |
10700 | void m68k_op_movem_16_er_al(void)\r |
10701 | {\r |
10702 | uint i = 0;\r |
10703 | uint register_list = OPER_I_16();\r |
10704 | uint ea = EA_AL_16();\r |
10705 | uint count = 0;\r |
10706 | \r |
10707 | for(; i < 16; i++)\r |
10708 | if(register_list & (1 << i))\r |
10709 | {\r |
10710 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));\r |
10711 | ea += 2;\r |
10712 | count++;\r |
10713 | }\r |
10714 | \r |
10715 | USE_CYCLES(count<<CYC_MOVEM_W);\r |
10716 | }\r |
10717 | \r |
10718 | \r |
10719 | void m68k_op_movem_32_er_pi(void)\r |
10720 | {\r |
10721 | uint i = 0;\r |
10722 | uint register_list = OPER_I_16();\r |
10723 | uint ea = AY;\r |
10724 | uint count = 0;\r |
10725 | \r |
10726 | for(; i < 16; i++)\r |
10727 | if(register_list & (1 << i))\r |
10728 | {\r |
10729 | REG_DA[i] = m68ki_read_32(ea);\r |
10730 | ea += 4;\r |
10731 | count++;\r |
10732 | }\r |
10733 | AY = ea;\r |
10734 | \r |
10735 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10736 | }\r |
10737 | \r |
10738 | \r |
10739 | void m68k_op_movem_32_er_pcdi(void)\r |
10740 | {\r |
10741 | uint i = 0;\r |
10742 | uint register_list = OPER_I_16();\r |
10743 | uint ea = EA_PCDI_32();\r |
10744 | uint count = 0;\r |
10745 | \r |
10746 | for(; i < 16; i++)\r |
10747 | if(register_list & (1 << i))\r |
10748 | {\r |
10749 | REG_DA[i] = m68ki_read_pcrel_32(ea);\r |
10750 | ea += 4;\r |
10751 | count++;\r |
10752 | }\r |
10753 | \r |
10754 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10755 | }\r |
10756 | \r |
10757 | \r |
10758 | void m68k_op_movem_32_er_pcix(void)\r |
10759 | {\r |
10760 | uint i = 0;\r |
10761 | uint register_list = OPER_I_16();\r |
10762 | uint ea = EA_PCIX_32();\r |
10763 | uint count = 0;\r |
10764 | \r |
10765 | for(; i < 16; i++)\r |
10766 | if(register_list & (1 << i))\r |
10767 | {\r |
10768 | REG_DA[i] = m68ki_read_pcrel_32(ea);\r |
10769 | ea += 4;\r |
10770 | count++;\r |
10771 | }\r |
10772 | \r |
10773 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10774 | }\r |
10775 | \r |
10776 | \r |
10777 | void m68k_op_movem_32_er_ai(void)\r |
10778 | {\r |
10779 | uint i = 0;\r |
10780 | uint register_list = OPER_I_16();\r |
10781 | uint ea = EA_AY_AI_32();\r |
10782 | uint count = 0;\r |
10783 | \r |
10784 | for(; i < 16; i++)\r |
10785 | if(register_list & (1 << i))\r |
10786 | {\r |
10787 | REG_DA[i] = m68ki_read_32(ea);\r |
10788 | ea += 4;\r |
10789 | count++;\r |
10790 | }\r |
10791 | \r |
10792 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10793 | }\r |
10794 | \r |
10795 | \r |
10796 | void m68k_op_movem_32_er_di(void)\r |
10797 | {\r |
10798 | uint i = 0;\r |
10799 | uint register_list = OPER_I_16();\r |
10800 | uint ea = EA_AY_DI_32();\r |
10801 | uint count = 0;\r |
10802 | \r |
10803 | for(; i < 16; i++)\r |
10804 | if(register_list & (1 << i))\r |
10805 | {\r |
10806 | REG_DA[i] = m68ki_read_32(ea);\r |
10807 | ea += 4;\r |
10808 | count++;\r |
10809 | }\r |
10810 | \r |
10811 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10812 | }\r |
10813 | \r |
10814 | \r |
10815 | void m68k_op_movem_32_er_ix(void)\r |
10816 | {\r |
10817 | uint i = 0;\r |
10818 | uint register_list = OPER_I_16();\r |
10819 | uint ea = EA_AY_IX_32();\r |
10820 | uint count = 0;\r |
10821 | \r |
10822 | for(; i < 16; i++)\r |
10823 | if(register_list & (1 << i))\r |
10824 | {\r |
10825 | REG_DA[i] = m68ki_read_32(ea);\r |
10826 | ea += 4;\r |
10827 | count++;\r |
10828 | }\r |
10829 | \r |
10830 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10831 | }\r |
10832 | \r |
10833 | \r |
10834 | void m68k_op_movem_32_er_aw(void)\r |
10835 | {\r |
10836 | uint i = 0;\r |
10837 | uint register_list = OPER_I_16();\r |
10838 | uint ea = EA_AW_32();\r |
10839 | uint count = 0;\r |
10840 | \r |
10841 | for(; i < 16; i++)\r |
10842 | if(register_list & (1 << i))\r |
10843 | {\r |
10844 | REG_DA[i] = m68ki_read_32(ea);\r |
10845 | ea += 4;\r |
10846 | count++;\r |
10847 | }\r |
10848 | \r |
10849 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10850 | }\r |
10851 | \r |
10852 | \r |
10853 | void m68k_op_movem_32_er_al(void)\r |
10854 | {\r |
10855 | uint i = 0;\r |
10856 | uint register_list = OPER_I_16();\r |
10857 | uint ea = EA_AL_32();\r |
10858 | uint count = 0;\r |
10859 | \r |
10860 | for(; i < 16; i++)\r |
10861 | if(register_list & (1 << i))\r |
10862 | {\r |
10863 | REG_DA[i] = m68ki_read_32(ea);\r |
10864 | ea += 4;\r |
10865 | count++;\r |
10866 | }\r |
10867 | \r |
10868 | USE_CYCLES(count<<CYC_MOVEM_L);\r |
10869 | }\r |
10870 | \r |
10871 | \r |
10872 | void m68k_op_movep_16_re(void)\r |
10873 | {\r |
10874 | uint ea = EA_AY_DI_16();\r |
10875 | uint src = DX;\r |
10876 | \r |
10877 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 8));\r |
10878 | m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));\r |
10879 | }\r |
10880 | \r |
10881 | \r |
10882 | void m68k_op_movep_32_re(void)\r |
10883 | {\r |
10884 | uint ea = EA_AY_DI_32();\r |
10885 | uint src = DX;\r |
10886 | \r |
10887 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24));\r |
10888 | m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16));\r |
10889 | m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8));\r |
10890 | m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));\r |
10891 | }\r |
10892 | \r |
10893 | \r |
10894 | void m68k_op_movep_16_er(void)\r |
10895 | {\r |
10896 | uint ea = EA_AY_DI_16();\r |
10897 | uint* r_dst = &DX;\r |
10898 | \r |
10899 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2));\r |
10900 | }\r |
10901 | \r |
10902 | \r |
10903 | void m68k_op_movep_32_er(void)\r |
10904 | {\r |
10905 | uint ea = EA_AY_DI_32();\r |
10906 | \r |
10907 | DX = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16)\r |
10908 | + (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6);\r |
10909 | }\r |
10910 | \r |
10911 | \r |
10912 | void m68k_op_moves_8_ai(void)\r |
10913 | {\r |
10914 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
10915 | {\r |
10916 | if(FLAG_S)\r |
10917 | {\r |
10918 | uint word2 = OPER_I_16();\r |
10919 | uint ea = EA_AY_AI_8();\r |
10920 | \r |
10921 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
10922 | if(BIT_B(word2)) /* Register to memory */\r |
10923 | {\r |
10924 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));\r |
10925 | return;\r |
10926 | }\r |
10927 | if(BIT_F(word2)) /* Memory to address register */\r |
10928 | {\r |
10929 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));\r |
10930 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
10931 | USE_CYCLES(2);\r |
10932 | return;\r |
10933 | }\r |
10934 | /* Memory to data register */\r |
10935 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);\r |
10936 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
10937 | USE_CYCLES(2);\r |
10938 | return;\r |
10939 | }\r |
10940 | m68ki_exception_privilege_violation();\r |
10941 | return;\r |
10942 | }\r |
10943 | m68ki_exception_illegal();\r |
10944 | }\r |
10945 | \r |
10946 | \r |
10947 | void m68k_op_moves_8_pi(void)\r |
10948 | {\r |
10949 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
10950 | {\r |
10951 | if(FLAG_S)\r |
10952 | {\r |
10953 | uint word2 = OPER_I_16();\r |
10954 | uint ea = EA_AY_PI_8();\r |
10955 | \r |
10956 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
10957 | if(BIT_B(word2)) /* Register to memory */\r |
10958 | {\r |
10959 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));\r |
10960 | return;\r |
10961 | }\r |
10962 | if(BIT_F(word2)) /* Memory to address register */\r |
10963 | {\r |
10964 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));\r |
10965 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
10966 | USE_CYCLES(2);\r |
10967 | return;\r |
10968 | }\r |
10969 | /* Memory to data register */\r |
10970 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);\r |
10971 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
10972 | USE_CYCLES(2);\r |
10973 | return;\r |
10974 | }\r |
10975 | m68ki_exception_privilege_violation();\r |
10976 | return;\r |
10977 | }\r |
10978 | m68ki_exception_illegal();\r |
10979 | }\r |
10980 | \r |
10981 | \r |
10982 | void m68k_op_moves_8_pi7(void)\r |
10983 | {\r |
10984 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
10985 | {\r |
10986 | if(FLAG_S)\r |
10987 | {\r |
10988 | uint word2 = OPER_I_16();\r |
10989 | uint ea = EA_A7_PI_8();\r |
10990 | \r |
10991 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
10992 | if(BIT_B(word2)) /* Register to memory */\r |
10993 | {\r |
10994 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));\r |
10995 | return;\r |
10996 | }\r |
10997 | if(BIT_F(word2)) /* Memory to address register */\r |
10998 | {\r |
10999 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));\r |
11000 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11001 | USE_CYCLES(2);\r |
11002 | return;\r |
11003 | }\r |
11004 | /* Memory to data register */\r |
11005 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);\r |
11006 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11007 | USE_CYCLES(2);\r |
11008 | return;\r |
11009 | }\r |
11010 | m68ki_exception_privilege_violation();\r |
11011 | return;\r |
11012 | }\r |
11013 | m68ki_exception_illegal();\r |
11014 | }\r |
11015 | \r |
11016 | \r |
11017 | void m68k_op_moves_8_pd(void)\r |
11018 | {\r |
11019 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11020 | {\r |
11021 | if(FLAG_S)\r |
11022 | {\r |
11023 | uint word2 = OPER_I_16();\r |
11024 | uint ea = EA_AY_PD_8();\r |
11025 | \r |
11026 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11027 | if(BIT_B(word2)) /* Register to memory */\r |
11028 | {\r |
11029 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));\r |
11030 | return;\r |
11031 | }\r |
11032 | if(BIT_F(word2)) /* Memory to address register */\r |
11033 | {\r |
11034 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));\r |
11035 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11036 | USE_CYCLES(2);\r |
11037 | return;\r |
11038 | }\r |
11039 | /* Memory to data register */\r |
11040 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);\r |
11041 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11042 | USE_CYCLES(2);\r |
11043 | return;\r |
11044 | }\r |
11045 | m68ki_exception_privilege_violation();\r |
11046 | return;\r |
11047 | }\r |
11048 | m68ki_exception_illegal();\r |
11049 | }\r |
11050 | \r |
11051 | \r |
11052 | void m68k_op_moves_8_pd7(void)\r |
11053 | {\r |
11054 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11055 | {\r |
11056 | if(FLAG_S)\r |
11057 | {\r |
11058 | uint word2 = OPER_I_16();\r |
11059 | uint ea = EA_A7_PD_8();\r |
11060 | \r |
11061 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11062 | if(BIT_B(word2)) /* Register to memory */\r |
11063 | {\r |
11064 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));\r |
11065 | return;\r |
11066 | }\r |
11067 | if(BIT_F(word2)) /* Memory to address register */\r |
11068 | {\r |
11069 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));\r |
11070 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11071 | USE_CYCLES(2);\r |
11072 | return;\r |
11073 | }\r |
11074 | /* Memory to data register */\r |
11075 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);\r |
11076 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11077 | USE_CYCLES(2);\r |
11078 | return;\r |
11079 | }\r |
11080 | m68ki_exception_privilege_violation();\r |
11081 | return;\r |
11082 | }\r |
11083 | m68ki_exception_illegal();\r |
11084 | }\r |
11085 | \r |
11086 | \r |
11087 | void m68k_op_moves_8_di(void)\r |
11088 | {\r |
11089 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11090 | {\r |
11091 | if(FLAG_S)\r |
11092 | {\r |
11093 | uint word2 = OPER_I_16();\r |
11094 | uint ea = EA_AY_DI_8();\r |
11095 | \r |
11096 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11097 | if(BIT_B(word2)) /* Register to memory */\r |
11098 | {\r |
11099 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));\r |
11100 | return;\r |
11101 | }\r |
11102 | if(BIT_F(word2)) /* Memory to address register */\r |
11103 | {\r |
11104 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));\r |
11105 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11106 | USE_CYCLES(2);\r |
11107 | return;\r |
11108 | }\r |
11109 | /* Memory to data register */\r |
11110 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);\r |
11111 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11112 | USE_CYCLES(2);\r |
11113 | return;\r |
11114 | }\r |
11115 | m68ki_exception_privilege_violation();\r |
11116 | return;\r |
11117 | }\r |
11118 | m68ki_exception_illegal();\r |
11119 | }\r |
11120 | \r |
11121 | \r |
11122 | void m68k_op_moves_8_ix(void)\r |
11123 | {\r |
11124 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11125 | {\r |
11126 | if(FLAG_S)\r |
11127 | {\r |
11128 | uint word2 = OPER_I_16();\r |
11129 | uint ea = EA_AY_IX_8();\r |
11130 | \r |
11131 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11132 | if(BIT_B(word2)) /* Register to memory */\r |
11133 | {\r |
11134 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));\r |
11135 | return;\r |
11136 | }\r |
11137 | if(BIT_F(word2)) /* Memory to address register */\r |
11138 | {\r |
11139 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));\r |
11140 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11141 | USE_CYCLES(2);\r |
11142 | return;\r |
11143 | }\r |
11144 | /* Memory to data register */\r |
11145 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);\r |
11146 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11147 | USE_CYCLES(2);\r |
11148 | return;\r |
11149 | }\r |
11150 | m68ki_exception_privilege_violation();\r |
11151 | return;\r |
11152 | }\r |
11153 | m68ki_exception_illegal();\r |
11154 | }\r |
11155 | \r |
11156 | \r |
11157 | void m68k_op_moves_8_aw(void)\r |
11158 | {\r |
11159 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11160 | {\r |
11161 | if(FLAG_S)\r |
11162 | {\r |
11163 | uint word2 = OPER_I_16();\r |
11164 | uint ea = EA_AW_8();\r |
11165 | \r |
11166 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11167 | if(BIT_B(word2)) /* Register to memory */\r |
11168 | {\r |
11169 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));\r |
11170 | return;\r |
11171 | }\r |
11172 | if(BIT_F(word2)) /* Memory to address register */\r |
11173 | {\r |
11174 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));\r |
11175 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11176 | USE_CYCLES(2);\r |
11177 | return;\r |
11178 | }\r |
11179 | /* Memory to data register */\r |
11180 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);\r |
11181 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11182 | USE_CYCLES(2);\r |
11183 | return;\r |
11184 | }\r |
11185 | m68ki_exception_privilege_violation();\r |
11186 | return;\r |
11187 | }\r |
11188 | m68ki_exception_illegal();\r |
11189 | }\r |
11190 | \r |
11191 | \r |
11192 | void m68k_op_moves_8_al(void)\r |
11193 | {\r |
11194 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11195 | {\r |
11196 | if(FLAG_S)\r |
11197 | {\r |
11198 | uint word2 = OPER_I_16();\r |
11199 | uint ea = EA_AL_8();\r |
11200 | \r |
11201 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11202 | if(BIT_B(word2)) /* Register to memory */\r |
11203 | {\r |
11204 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));\r |
11205 | return;\r |
11206 | }\r |
11207 | if(BIT_F(word2)) /* Memory to address register */\r |
11208 | {\r |
11209 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));\r |
11210 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11211 | USE_CYCLES(2);\r |
11212 | return;\r |
11213 | }\r |
11214 | /* Memory to data register */\r |
11215 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);\r |
11216 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11217 | USE_CYCLES(2);\r |
11218 | return;\r |
11219 | }\r |
11220 | m68ki_exception_privilege_violation();\r |
11221 | return;\r |
11222 | }\r |
11223 | m68ki_exception_illegal();\r |
11224 | }\r |
11225 | \r |
11226 | \r |
11227 | void m68k_op_moves_16_ai(void)\r |
11228 | {\r |
11229 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11230 | {\r |
11231 | if(FLAG_S)\r |
11232 | {\r |
11233 | uint word2 = OPER_I_16();\r |
11234 | uint ea = EA_AY_AI_16();\r |
11235 | \r |
11236 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11237 | if(BIT_B(word2)) /* Register to memory */\r |
11238 | {\r |
11239 | m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));\r |
11240 | return;\r |
11241 | }\r |
11242 | if(BIT_F(word2)) /* Memory to address register */\r |
11243 | {\r |
11244 | REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));\r |
11245 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11246 | USE_CYCLES(2);\r |
11247 | return;\r |
11248 | }\r |
11249 | /* Memory to data register */\r |
11250 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);\r |
11251 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11252 | USE_CYCLES(2);\r |
11253 | return;\r |
11254 | }\r |
11255 | m68ki_exception_privilege_violation();\r |
11256 | return;\r |
11257 | }\r |
11258 | m68ki_exception_illegal();\r |
11259 | }\r |
11260 | \r |
11261 | \r |
11262 | void m68k_op_moves_16_pi(void)\r |
11263 | {\r |
11264 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11265 | {\r |
11266 | if(FLAG_S)\r |
11267 | {\r |
11268 | uint word2 = OPER_I_16();\r |
11269 | uint ea = EA_AY_PI_16();\r |
11270 | \r |
11271 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11272 | if(BIT_B(word2)) /* Register to memory */\r |
11273 | {\r |
11274 | m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));\r |
11275 | return;\r |
11276 | }\r |
11277 | if(BIT_F(word2)) /* Memory to address register */\r |
11278 | {\r |
11279 | REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));\r |
11280 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11281 | USE_CYCLES(2);\r |
11282 | return;\r |
11283 | }\r |
11284 | /* Memory to data register */\r |
11285 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);\r |
11286 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11287 | USE_CYCLES(2);\r |
11288 | return;\r |
11289 | }\r |
11290 | m68ki_exception_privilege_violation();\r |
11291 | return;\r |
11292 | }\r |
11293 | m68ki_exception_illegal();\r |
11294 | }\r |
11295 | \r |
11296 | \r |
11297 | void m68k_op_moves_16_pd(void)\r |
11298 | {\r |
11299 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11300 | {\r |
11301 | if(FLAG_S)\r |
11302 | {\r |
11303 | uint word2 = OPER_I_16();\r |
11304 | uint ea = EA_AY_PD_16();\r |
11305 | \r |
11306 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11307 | if(BIT_B(word2)) /* Register to memory */\r |
11308 | {\r |
11309 | m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));\r |
11310 | return;\r |
11311 | }\r |
11312 | if(BIT_F(word2)) /* Memory to address register */\r |
11313 | {\r |
11314 | REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));\r |
11315 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11316 | USE_CYCLES(2);\r |
11317 | return;\r |
11318 | }\r |
11319 | /* Memory to data register */\r |
11320 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);\r |
11321 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11322 | USE_CYCLES(2);\r |
11323 | return;\r |
11324 | }\r |
11325 | m68ki_exception_privilege_violation();\r |
11326 | return;\r |
11327 | }\r |
11328 | m68ki_exception_illegal();\r |
11329 | }\r |
11330 | \r |
11331 | \r |
11332 | void m68k_op_moves_16_di(void)\r |
11333 | {\r |
11334 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11335 | {\r |
11336 | if(FLAG_S)\r |
11337 | {\r |
11338 | uint word2 = OPER_I_16();\r |
11339 | uint ea = EA_AY_DI_16();\r |
11340 | \r |
11341 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11342 | if(BIT_B(word2)) /* Register to memory */\r |
11343 | {\r |
11344 | m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));\r |
11345 | return;\r |
11346 | }\r |
11347 | if(BIT_F(word2)) /* Memory to address register */\r |
11348 | {\r |
11349 | REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));\r |
11350 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11351 | USE_CYCLES(2);\r |
11352 | return;\r |
11353 | }\r |
11354 | /* Memory to data register */\r |
11355 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);\r |
11356 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11357 | USE_CYCLES(2);\r |
11358 | return;\r |
11359 | }\r |
11360 | m68ki_exception_privilege_violation();\r |
11361 | return;\r |
11362 | }\r |
11363 | m68ki_exception_illegal();\r |
11364 | }\r |
11365 | \r |
11366 | \r |
11367 | void m68k_op_moves_16_ix(void)\r |
11368 | {\r |
11369 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11370 | {\r |
11371 | if(FLAG_S)\r |
11372 | {\r |
11373 | uint word2 = OPER_I_16();\r |
11374 | uint ea = EA_AY_IX_16();\r |
11375 | \r |
11376 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11377 | if(BIT_B(word2)) /* Register to memory */\r |
11378 | {\r |
11379 | m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));\r |
11380 | return;\r |
11381 | }\r |
11382 | if(BIT_F(word2)) /* Memory to address register */\r |
11383 | {\r |
11384 | REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));\r |
11385 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11386 | USE_CYCLES(2);\r |
11387 | return;\r |
11388 | }\r |
11389 | /* Memory to data register */\r |
11390 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);\r |
11391 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11392 | USE_CYCLES(2);\r |
11393 | return;\r |
11394 | }\r |
11395 | m68ki_exception_privilege_violation();\r |
11396 | return;\r |
11397 | }\r |
11398 | m68ki_exception_illegal();\r |
11399 | }\r |
11400 | \r |
11401 | \r |
11402 | void m68k_op_moves_16_aw(void)\r |
11403 | {\r |
11404 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11405 | {\r |
11406 | if(FLAG_S)\r |
11407 | {\r |
11408 | uint word2 = OPER_I_16();\r |
11409 | uint ea = EA_AW_16();\r |
11410 | \r |
11411 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11412 | if(BIT_B(word2)) /* Register to memory */\r |
11413 | {\r |
11414 | m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));\r |
11415 | return;\r |
11416 | }\r |
11417 | if(BIT_F(word2)) /* Memory to address register */\r |
11418 | {\r |
11419 | REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));\r |
11420 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11421 | USE_CYCLES(2);\r |
11422 | return;\r |
11423 | }\r |
11424 | /* Memory to data register */\r |
11425 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);\r |
11426 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11427 | USE_CYCLES(2);\r |
11428 | return;\r |
11429 | }\r |
11430 | m68ki_exception_privilege_violation();\r |
11431 | return;\r |
11432 | }\r |
11433 | m68ki_exception_illegal();\r |
11434 | }\r |
11435 | \r |
11436 | \r |
11437 | void m68k_op_moves_16_al(void)\r |
11438 | {\r |
11439 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11440 | {\r |
11441 | if(FLAG_S)\r |
11442 | {\r |
11443 | uint word2 = OPER_I_16();\r |
11444 | uint ea = EA_AL_16();\r |
11445 | \r |
11446 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11447 | if(BIT_B(word2)) /* Register to memory */\r |
11448 | {\r |
11449 | m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));\r |
11450 | return;\r |
11451 | }\r |
11452 | if(BIT_F(word2)) /* Memory to address register */\r |
11453 | {\r |
11454 | REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));\r |
11455 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11456 | USE_CYCLES(2);\r |
11457 | return;\r |
11458 | }\r |
11459 | /* Memory to data register */\r |
11460 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);\r |
11461 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11462 | USE_CYCLES(2);\r |
11463 | return;\r |
11464 | }\r |
11465 | m68ki_exception_privilege_violation();\r |
11466 | return;\r |
11467 | }\r |
11468 | m68ki_exception_illegal();\r |
11469 | }\r |
11470 | \r |
11471 | \r |
11472 | void m68k_op_moves_32_ai(void)\r |
11473 | {\r |
11474 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11475 | {\r |
11476 | if(FLAG_S)\r |
11477 | {\r |
11478 | uint word2 = OPER_I_16();\r |
11479 | uint ea = EA_AY_AI_32();\r |
11480 | \r |
11481 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11482 | if(BIT_B(word2)) /* Register to memory */\r |
11483 | {\r |
11484 | m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);\r |
11485 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11486 | USE_CYCLES(2);\r |
11487 | return;\r |
11488 | }\r |
11489 | /* Memory to register */\r |
11490 | REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);\r |
11491 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11492 | USE_CYCLES(2);\r |
11493 | return;\r |
11494 | }\r |
11495 | m68ki_exception_privilege_violation();\r |
11496 | return;\r |
11497 | }\r |
11498 | m68ki_exception_illegal();\r |
11499 | }\r |
11500 | \r |
11501 | \r |
11502 | void m68k_op_moves_32_pi(void)\r |
11503 | {\r |
11504 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11505 | {\r |
11506 | if(FLAG_S)\r |
11507 | {\r |
11508 | uint word2 = OPER_I_16();\r |
11509 | uint ea = EA_AY_PI_32();\r |
11510 | \r |
11511 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11512 | if(BIT_B(word2)) /* Register to memory */\r |
11513 | {\r |
11514 | m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);\r |
11515 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11516 | USE_CYCLES(2);\r |
11517 | return;\r |
11518 | }\r |
11519 | /* Memory to register */\r |
11520 | REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);\r |
11521 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11522 | USE_CYCLES(2);\r |
11523 | return;\r |
11524 | }\r |
11525 | m68ki_exception_privilege_violation();\r |
11526 | return;\r |
11527 | }\r |
11528 | m68ki_exception_illegal();\r |
11529 | }\r |
11530 | \r |
11531 | \r |
11532 | void m68k_op_moves_32_pd(void)\r |
11533 | {\r |
11534 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11535 | {\r |
11536 | if(FLAG_S)\r |
11537 | {\r |
11538 | uint word2 = OPER_I_16();\r |
11539 | uint ea = EA_AY_PD_32();\r |
11540 | \r |
11541 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11542 | if(BIT_B(word2)) /* Register to memory */\r |
11543 | {\r |
11544 | m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);\r |
11545 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11546 | USE_CYCLES(2);\r |
11547 | return;\r |
11548 | }\r |
11549 | /* Memory to register */\r |
11550 | REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);\r |
11551 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11552 | USE_CYCLES(2);\r |
11553 | return;\r |
11554 | }\r |
11555 | m68ki_exception_privilege_violation();\r |
11556 | return;\r |
11557 | }\r |
11558 | m68ki_exception_illegal();\r |
11559 | }\r |
11560 | \r |
11561 | \r |
11562 | void m68k_op_moves_32_di(void)\r |
11563 | {\r |
11564 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11565 | {\r |
11566 | if(FLAG_S)\r |
11567 | {\r |
11568 | uint word2 = OPER_I_16();\r |
11569 | uint ea = EA_AY_DI_32();\r |
11570 | \r |
11571 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11572 | if(BIT_B(word2)) /* Register to memory */\r |
11573 | {\r |
11574 | m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);\r |
11575 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11576 | USE_CYCLES(2);\r |
11577 | return;\r |
11578 | }\r |
11579 | /* Memory to register */\r |
11580 | REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);\r |
11581 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11582 | USE_CYCLES(2);\r |
11583 | return;\r |
11584 | }\r |
11585 | m68ki_exception_privilege_violation();\r |
11586 | return;\r |
11587 | }\r |
11588 | m68ki_exception_illegal();\r |
11589 | }\r |
11590 | \r |
11591 | \r |
11592 | void m68k_op_moves_32_ix(void)\r |
11593 | {\r |
11594 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11595 | {\r |
11596 | if(FLAG_S)\r |
11597 | {\r |
11598 | uint word2 = OPER_I_16();\r |
11599 | uint ea = EA_AY_IX_32();\r |
11600 | \r |
11601 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11602 | if(BIT_B(word2)) /* Register to memory */\r |
11603 | {\r |
11604 | m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);\r |
11605 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11606 | USE_CYCLES(2);\r |
11607 | return;\r |
11608 | }\r |
11609 | /* Memory to register */\r |
11610 | REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);\r |
11611 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11612 | USE_CYCLES(2);\r |
11613 | return;\r |
11614 | }\r |
11615 | m68ki_exception_privilege_violation();\r |
11616 | return;\r |
11617 | }\r |
11618 | m68ki_exception_illegal();\r |
11619 | }\r |
11620 | \r |
11621 | \r |
11622 | void m68k_op_moves_32_aw(void)\r |
11623 | {\r |
11624 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11625 | {\r |
11626 | if(FLAG_S)\r |
11627 | {\r |
11628 | uint word2 = OPER_I_16();\r |
11629 | uint ea = EA_AW_32();\r |
11630 | \r |
11631 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11632 | if(BIT_B(word2)) /* Register to memory */\r |
11633 | {\r |
11634 | m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);\r |
11635 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11636 | USE_CYCLES(2);\r |
11637 | return;\r |
11638 | }\r |
11639 | /* Memory to register */\r |
11640 | REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);\r |
11641 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11642 | USE_CYCLES(2);\r |
11643 | return;\r |
11644 | }\r |
11645 | m68ki_exception_privilege_violation();\r |
11646 | return;\r |
11647 | }\r |
11648 | m68ki_exception_illegal();\r |
11649 | }\r |
11650 | \r |
11651 | \r |
11652 | void m68k_op_moves_32_al(void)\r |
11653 | {\r |
11654 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
11655 | {\r |
11656 | if(FLAG_S)\r |
11657 | {\r |
11658 | uint word2 = OPER_I_16();\r |
11659 | uint ea = EA_AL_32();\r |
11660 | \r |
11661 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
11662 | if(BIT_B(word2)) /* Register to memory */\r |
11663 | {\r |
11664 | m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);\r |
11665 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11666 | USE_CYCLES(2);\r |
11667 | return;\r |
11668 | }\r |
11669 | /* Memory to register */\r |
11670 | REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);\r |
11671 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
11672 | USE_CYCLES(2);\r |
11673 | return;\r |
11674 | }\r |
11675 | m68ki_exception_privilege_violation();\r |
11676 | return;\r |
11677 | }\r |
11678 | m68ki_exception_illegal();\r |
11679 | }\r |
11680 | \r |
11681 | \r |
11682 | void m68k_op_moveq_32(void)\r |
11683 | {\r |
11684 | uint res = DX = MAKE_INT_8(MASK_OUT_ABOVE_8(REG_IR));\r |
11685 | \r |
11686 | FLAG_N = NFLAG_32(res);\r |
11687 | FLAG_Z = res;\r |
11688 | FLAG_V = VFLAG_CLEAR;\r |
11689 | FLAG_C = CFLAG_CLEAR;\r |
11690 | }\r |
11691 | \r |
11692 | \r |
11693 | void m68k_op_move16_32(void)\r |
11694 | {\r |
11695 | UINT16 w2 = OPER_I_16();\r |
11696 | int ax = REG_IR & 7;\r |
11697 | int ay = (w2 >> 12) & 7;\r |
11698 | \r |
11699 | m68ki_write_32(REG_A[ay], m68ki_read_32(REG_A[ax]));\r |
11700 | m68ki_write_32(REG_A[ay]+4, m68ki_read_32(REG_A[ax]+4));\r |
11701 | m68ki_write_32(REG_A[ay]+8, m68ki_read_32(REG_A[ax]+8));\r |
11702 | m68ki_write_32(REG_A[ay]+12, m68ki_read_32(REG_A[ax]+12));\r |
11703 | \r |
11704 | REG_A[ax] += 16;\r |
11705 | REG_A[ay] += 16;\r |
11706 | }\r |
11707 | \r |
11708 | \r |
11709 | void m68k_op_muls_16_d(void)\r |
11710 | {\r |
11711 | uint* r_dst = &DX;\r |
11712 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11713 | \r |
11714 | *r_dst = res;\r |
11715 | \r |
11716 | FLAG_Z = res;\r |
11717 | FLAG_N = NFLAG_32(res);\r |
11718 | FLAG_V = VFLAG_CLEAR;\r |
11719 | FLAG_C = CFLAG_CLEAR;\r |
11720 | }\r |
11721 | \r |
11722 | \r |
11723 | void m68k_op_muls_16_ai(void)\r |
11724 | {\r |
11725 | uint* r_dst = &DX;\r |
11726 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_AI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11727 | \r |
11728 | *r_dst = res;\r |
11729 | \r |
11730 | FLAG_Z = res;\r |
11731 | FLAG_N = NFLAG_32(res);\r |
11732 | FLAG_V = VFLAG_CLEAR;\r |
11733 | FLAG_C = CFLAG_CLEAR;\r |
11734 | }\r |
11735 | \r |
11736 | \r |
11737 | void m68k_op_muls_16_pi(void)\r |
11738 | {\r |
11739 | uint* r_dst = &DX;\r |
11740 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_PI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11741 | \r |
11742 | *r_dst = res;\r |
11743 | \r |
11744 | FLAG_Z = res;\r |
11745 | FLAG_N = NFLAG_32(res);\r |
11746 | FLAG_V = VFLAG_CLEAR;\r |
11747 | FLAG_C = CFLAG_CLEAR;\r |
11748 | }\r |
11749 | \r |
11750 | \r |
11751 | void m68k_op_muls_16_pd(void)\r |
11752 | {\r |
11753 | uint* r_dst = &DX;\r |
11754 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_PD_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11755 | \r |
11756 | *r_dst = res;\r |
11757 | \r |
11758 | FLAG_Z = res;\r |
11759 | FLAG_N = NFLAG_32(res);\r |
11760 | FLAG_V = VFLAG_CLEAR;\r |
11761 | FLAG_C = CFLAG_CLEAR;\r |
11762 | }\r |
11763 | \r |
11764 | \r |
11765 | void m68k_op_muls_16_di(void)\r |
11766 | {\r |
11767 | uint* r_dst = &DX;\r |
11768 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_DI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11769 | \r |
11770 | *r_dst = res;\r |
11771 | \r |
11772 | FLAG_Z = res;\r |
11773 | FLAG_N = NFLAG_32(res);\r |
11774 | FLAG_V = VFLAG_CLEAR;\r |
11775 | FLAG_C = CFLAG_CLEAR;\r |
11776 | }\r |
11777 | \r |
11778 | \r |
11779 | void m68k_op_muls_16_ix(void)\r |
11780 | {\r |
11781 | uint* r_dst = &DX;\r |
11782 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_IX_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11783 | \r |
11784 | *r_dst = res;\r |
11785 | \r |
11786 | FLAG_Z = res;\r |
11787 | FLAG_N = NFLAG_32(res);\r |
11788 | FLAG_V = VFLAG_CLEAR;\r |
11789 | FLAG_C = CFLAG_CLEAR;\r |
11790 | }\r |
11791 | \r |
11792 | \r |
11793 | void m68k_op_muls_16_aw(void)\r |
11794 | {\r |
11795 | uint* r_dst = &DX;\r |
11796 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AW_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11797 | \r |
11798 | *r_dst = res;\r |
11799 | \r |
11800 | FLAG_Z = res;\r |
11801 | FLAG_N = NFLAG_32(res);\r |
11802 | FLAG_V = VFLAG_CLEAR;\r |
11803 | FLAG_C = CFLAG_CLEAR;\r |
11804 | }\r |
11805 | \r |
11806 | \r |
11807 | void m68k_op_muls_16_al(void)\r |
11808 | {\r |
11809 | uint* r_dst = &DX;\r |
11810 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AL_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11811 | \r |
11812 | *r_dst = res;\r |
11813 | \r |
11814 | FLAG_Z = res;\r |
11815 | FLAG_N = NFLAG_32(res);\r |
11816 | FLAG_V = VFLAG_CLEAR;\r |
11817 | FLAG_C = CFLAG_CLEAR;\r |
11818 | }\r |
11819 | \r |
11820 | \r |
11821 | void m68k_op_muls_16_pcdi(void)\r |
11822 | {\r |
11823 | uint* r_dst = &DX;\r |
11824 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_PCDI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11825 | \r |
11826 | *r_dst = res;\r |
11827 | \r |
11828 | FLAG_Z = res;\r |
11829 | FLAG_N = NFLAG_32(res);\r |
11830 | FLAG_V = VFLAG_CLEAR;\r |
11831 | FLAG_C = CFLAG_CLEAR;\r |
11832 | }\r |
11833 | \r |
11834 | \r |
11835 | void m68k_op_muls_16_pcix(void)\r |
11836 | {\r |
11837 | uint* r_dst = &DX;\r |
11838 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_PCIX_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11839 | \r |
11840 | *r_dst = res;\r |
11841 | \r |
11842 | FLAG_Z = res;\r |
11843 | FLAG_N = NFLAG_32(res);\r |
11844 | FLAG_V = VFLAG_CLEAR;\r |
11845 | FLAG_C = CFLAG_CLEAR;\r |
11846 | }\r |
11847 | \r |
11848 | \r |
11849 | void m68k_op_muls_16_i(void)\r |
11850 | {\r |
11851 | uint* r_dst = &DX;\r |
11852 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_I_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));\r |
11853 | \r |
11854 | *r_dst = res;\r |
11855 | \r |
11856 | FLAG_Z = res;\r |
11857 | FLAG_N = NFLAG_32(res);\r |
11858 | FLAG_V = VFLAG_CLEAR;\r |
11859 | FLAG_C = CFLAG_CLEAR;\r |
11860 | }\r |
11861 | \r |
11862 | \r |
11863 | void m68k_op_mulu_16_d(void)\r |
11864 | {\r |
11865 | uint* r_dst = &DX;\r |
11866 | uint res = MASK_OUT_ABOVE_16(DY) * MASK_OUT_ABOVE_16(*r_dst);\r |
11867 | \r |
11868 | *r_dst = res;\r |
11869 | \r |
11870 | FLAG_Z = res;\r |
11871 | FLAG_N = NFLAG_32(res);\r |
11872 | FLAG_V = VFLAG_CLEAR;\r |
11873 | FLAG_C = CFLAG_CLEAR;\r |
11874 | }\r |
11875 | \r |
11876 | \r |
11877 | void m68k_op_mulu_16_ai(void)\r |
11878 | {\r |
11879 | uint* r_dst = &DX;\r |
11880 | uint res = OPER_AY_AI_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
11881 | \r |
11882 | *r_dst = res;\r |
11883 | \r |
11884 | FLAG_Z = res;\r |
11885 | FLAG_N = NFLAG_32(res);\r |
11886 | FLAG_V = VFLAG_CLEAR;\r |
11887 | FLAG_C = CFLAG_CLEAR;\r |
11888 | }\r |
11889 | \r |
11890 | \r |
11891 | void m68k_op_mulu_16_pi(void)\r |
11892 | {\r |
11893 | uint* r_dst = &DX;\r |
11894 | uint res = OPER_AY_PI_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
11895 | \r |
11896 | *r_dst = res;\r |
11897 | \r |
11898 | FLAG_Z = res;\r |
11899 | FLAG_N = NFLAG_32(res);\r |
11900 | FLAG_V = VFLAG_CLEAR;\r |
11901 | FLAG_C = CFLAG_CLEAR;\r |
11902 | }\r |
11903 | \r |
11904 | \r |
11905 | void m68k_op_mulu_16_pd(void)\r |
11906 | {\r |
11907 | uint* r_dst = &DX;\r |
11908 | uint res = OPER_AY_PD_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
11909 | \r |
11910 | *r_dst = res;\r |
11911 | \r |
11912 | FLAG_Z = res;\r |
11913 | FLAG_N = NFLAG_32(res);\r |
11914 | FLAG_V = VFLAG_CLEAR;\r |
11915 | FLAG_C = CFLAG_CLEAR;\r |
11916 | }\r |
11917 | \r |
11918 | \r |
11919 | void m68k_op_mulu_16_di(void)\r |
11920 | {\r |
11921 | uint* r_dst = &DX;\r |
11922 | uint res = OPER_AY_DI_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
11923 | \r |
11924 | *r_dst = res;\r |
11925 | \r |
11926 | FLAG_Z = res;\r |
11927 | FLAG_N = NFLAG_32(res);\r |
11928 | FLAG_V = VFLAG_CLEAR;\r |
11929 | FLAG_C = CFLAG_CLEAR;\r |
11930 | }\r |
11931 | \r |
11932 | \r |
11933 | void m68k_op_mulu_16_ix(void)\r |
11934 | {\r |
11935 | uint* r_dst = &DX;\r |
11936 | uint res = OPER_AY_IX_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
11937 | \r |
11938 | *r_dst = res;\r |
11939 | \r |
11940 | FLAG_Z = res;\r |
11941 | FLAG_N = NFLAG_32(res);\r |
11942 | FLAG_V = VFLAG_CLEAR;\r |
11943 | FLAG_C = CFLAG_CLEAR;\r |
11944 | }\r |
11945 | \r |
11946 | \r |
11947 | void m68k_op_mulu_16_aw(void)\r |
11948 | {\r |
11949 | uint* r_dst = &DX;\r |
11950 | uint res = OPER_AW_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
11951 | \r |
11952 | *r_dst = res;\r |
11953 | \r |
11954 | FLAG_Z = res;\r |
11955 | FLAG_N = NFLAG_32(res);\r |
11956 | FLAG_V = VFLAG_CLEAR;\r |
11957 | FLAG_C = CFLAG_CLEAR;\r |
11958 | }\r |
11959 | \r |
11960 | \r |
11961 | void m68k_op_mulu_16_al(void)\r |
11962 | {\r |
11963 | uint* r_dst = &DX;\r |
11964 | uint res = OPER_AL_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
11965 | \r |
11966 | *r_dst = res;\r |
11967 | \r |
11968 | FLAG_Z = res;\r |
11969 | FLAG_N = NFLAG_32(res);\r |
11970 | FLAG_V = VFLAG_CLEAR;\r |
11971 | FLAG_C = CFLAG_CLEAR;\r |
11972 | }\r |
11973 | \r |
11974 | \r |
11975 | void m68k_op_mulu_16_pcdi(void)\r |
11976 | {\r |
11977 | uint* r_dst = &DX;\r |
11978 | uint res = OPER_PCDI_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
11979 | \r |
11980 | *r_dst = res;\r |
11981 | \r |
11982 | FLAG_Z = res;\r |
11983 | FLAG_N = NFLAG_32(res);\r |
11984 | FLAG_V = VFLAG_CLEAR;\r |
11985 | FLAG_C = CFLAG_CLEAR;\r |
11986 | }\r |
11987 | \r |
11988 | \r |
11989 | void m68k_op_mulu_16_pcix(void)\r |
11990 | {\r |
11991 | uint* r_dst = &DX;\r |
11992 | uint res = OPER_PCIX_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
11993 | \r |
11994 | *r_dst = res;\r |
11995 | \r |
11996 | FLAG_Z = res;\r |
11997 | FLAG_N = NFLAG_32(res);\r |
11998 | FLAG_V = VFLAG_CLEAR;\r |
11999 | FLAG_C = CFLAG_CLEAR;\r |
12000 | }\r |
12001 | \r |
12002 | \r |
12003 | void m68k_op_mulu_16_i(void)\r |
12004 | {\r |
12005 | uint* r_dst = &DX;\r |
12006 | uint res = OPER_I_16() * MASK_OUT_ABOVE_16(*r_dst);\r |
12007 | \r |
12008 | *r_dst = res;\r |
12009 | \r |
12010 | FLAG_Z = res;\r |
12011 | FLAG_N = NFLAG_32(res);\r |
12012 | FLAG_V = VFLAG_CLEAR;\r |
12013 | FLAG_C = CFLAG_CLEAR;\r |
12014 | }\r |
12015 | \r |
12016 | \r |
12017 | void m68k_op_mull_32_d(void)\r |
12018 | {\r |
12019 | #if M68K_USE_64_BIT\r |
12020 | \r |
12021 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12022 | {\r |
12023 | uint word2 = OPER_I_16();\r |
12024 | uint64 src = DY;\r |
12025 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
12026 | uint64 res;\r |
12027 | \r |
12028 | FLAG_C = CFLAG_CLEAR;\r |
12029 | \r |
12030 | if(BIT_B(word2)) /* signed */\r |
12031 | {\r |
12032 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
12033 | if(!BIT_A(word2))\r |
12034 | {\r |
12035 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12036 | FLAG_N = NFLAG_32(res);\r |
12037 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
12038 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12039 | return;\r |
12040 | }\r |
12041 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12042 | FLAG_N = NFLAG_64(res);\r |
12043 | FLAG_V = VFLAG_CLEAR;\r |
12044 | REG_D[word2 & 7] = (res >> 32);\r |
12045 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12046 | return;\r |
12047 | }\r |
12048 | \r |
12049 | res = src * dst;\r |
12050 | if(!BIT_A(word2))\r |
12051 | {\r |
12052 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12053 | FLAG_N = NFLAG_32(res);\r |
12054 | FLAG_V = (res > 0xffffffff)<<7;\r |
12055 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12056 | return;\r |
12057 | }\r |
12058 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12059 | FLAG_N = NFLAG_64(res);\r |
12060 | FLAG_V = VFLAG_CLEAR;\r |
12061 | REG_D[word2 & 7] = (res >> 32);\r |
12062 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12063 | return;\r |
12064 | }\r |
12065 | m68ki_exception_illegal();\r |
12066 | \r |
12067 | #else\r |
12068 | \r |
12069 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12070 | {\r |
12071 | uint word2 = OPER_I_16();\r |
12072 | uint src = DY;\r |
12073 | uint dst = REG_D[(word2 >> 12) & 7];\r |
12074 | uint neg = GET_MSB_32(src ^ dst);\r |
12075 | uint src1;\r |
12076 | uint src2;\r |
12077 | uint dst1;\r |
12078 | uint dst2;\r |
12079 | uint r1;\r |
12080 | uint r2;\r |
12081 | uint r3;\r |
12082 | uint r4;\r |
12083 | uint lo;\r |
12084 | uint hi;\r |
12085 | \r |
12086 | FLAG_C = CFLAG_CLEAR;\r |
12087 | \r |
12088 | if(BIT_B(word2)) /* signed */\r |
12089 | {\r |
12090 | if(GET_MSB_32(src))\r |
12091 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
12092 | if(GET_MSB_32(dst))\r |
12093 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
12094 | }\r |
12095 | \r |
12096 | src1 = MASK_OUT_ABOVE_16(src);\r |
12097 | src2 = src>>16;\r |
12098 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
12099 | dst2 = dst>>16;\r |
12100 | \r |
12101 | \r |
12102 | r1 = src1 * dst1;\r |
12103 | r2 = src1 * dst2;\r |
12104 | r3 = src2 * dst1;\r |
12105 | r4 = src2 * dst2;\r |
12106 | \r |
12107 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
12108 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
12109 | \r |
12110 | if(BIT_B(word2) && neg)\r |
12111 | {\r |
12112 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
12113 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
12114 | }\r |
12115 | \r |
12116 | if(BIT_A(word2))\r |
12117 | {\r |
12118 | REG_D[word2 & 7] = hi;\r |
12119 | REG_D[(word2 >> 12) & 7] = lo;\r |
12120 | FLAG_N = NFLAG_32(hi);\r |
12121 | FLAG_Z = hi | lo;\r |
12122 | FLAG_V = VFLAG_CLEAR;\r |
12123 | return;\r |
12124 | }\r |
12125 | \r |
12126 | REG_D[(word2 >> 12) & 7] = lo;\r |
12127 | FLAG_N = NFLAG_32(lo);\r |
12128 | FLAG_Z = lo;\r |
12129 | if(BIT_B(word2))\r |
12130 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
12131 | else\r |
12132 | FLAG_V = (hi != 0) << 7;\r |
12133 | return;\r |
12134 | }\r |
12135 | m68ki_exception_illegal();\r |
12136 | \r |
12137 | #endif\r |
12138 | }\r |
12139 | \r |
12140 | \r |
12141 | void m68k_op_mull_32_ai(void)\r |
12142 | {\r |
12143 | #if M68K_USE_64_BIT\r |
12144 | \r |
12145 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12146 | {\r |
12147 | uint word2 = OPER_I_16();\r |
12148 | uint64 src = OPER_AY_AI_32();\r |
12149 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
12150 | uint64 res;\r |
12151 | \r |
12152 | FLAG_C = CFLAG_CLEAR;\r |
12153 | \r |
12154 | if(BIT_B(word2)) /* signed */\r |
12155 | {\r |
12156 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
12157 | if(!BIT_A(word2))\r |
12158 | {\r |
12159 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12160 | FLAG_N = NFLAG_32(res);\r |
12161 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
12162 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12163 | return;\r |
12164 | }\r |
12165 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12166 | FLAG_N = NFLAG_64(res);\r |
12167 | FLAG_V = VFLAG_CLEAR;\r |
12168 | REG_D[word2 & 7] = (res >> 32);\r |
12169 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12170 | return;\r |
12171 | }\r |
12172 | \r |
12173 | res = src * dst;\r |
12174 | if(!BIT_A(word2))\r |
12175 | {\r |
12176 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12177 | FLAG_N = NFLAG_32(res);\r |
12178 | FLAG_V = (res > 0xffffffff)<<7;\r |
12179 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12180 | return;\r |
12181 | }\r |
12182 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12183 | FLAG_N = NFLAG_64(res);\r |
12184 | FLAG_V = VFLAG_CLEAR;\r |
12185 | REG_D[word2 & 7] = (res >> 32);\r |
12186 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12187 | return;\r |
12188 | }\r |
12189 | m68ki_exception_illegal();\r |
12190 | \r |
12191 | #else\r |
12192 | \r |
12193 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12194 | {\r |
12195 | uint word2 = OPER_I_16();\r |
12196 | uint src = OPER_AY_AI_32();\r |
12197 | uint dst = REG_D[(word2 >> 12) & 7];\r |
12198 | uint neg = GET_MSB_32(src ^ dst);\r |
12199 | uint src1;\r |
12200 | uint src2;\r |
12201 | uint dst1;\r |
12202 | uint dst2;\r |
12203 | uint r1;\r |
12204 | uint r2;\r |
12205 | uint r3;\r |
12206 | uint r4;\r |
12207 | uint lo;\r |
12208 | uint hi;\r |
12209 | \r |
12210 | FLAG_C = CFLAG_CLEAR;\r |
12211 | \r |
12212 | if(BIT_B(word2)) /* signed */\r |
12213 | {\r |
12214 | if(GET_MSB_32(src))\r |
12215 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
12216 | if(GET_MSB_32(dst))\r |
12217 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
12218 | }\r |
12219 | \r |
12220 | src1 = MASK_OUT_ABOVE_16(src);\r |
12221 | src2 = src>>16;\r |
12222 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
12223 | dst2 = dst>>16;\r |
12224 | \r |
12225 | \r |
12226 | r1 = src1 * dst1;\r |
12227 | r2 = src1 * dst2;\r |
12228 | r3 = src2 * dst1;\r |
12229 | r4 = src2 * dst2;\r |
12230 | \r |
12231 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
12232 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
12233 | \r |
12234 | if(BIT_B(word2) && neg)\r |
12235 | {\r |
12236 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
12237 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
12238 | }\r |
12239 | \r |
12240 | if(BIT_A(word2))\r |
12241 | {\r |
12242 | REG_D[word2 & 7] = hi;\r |
12243 | REG_D[(word2 >> 12) & 7] = lo;\r |
12244 | FLAG_N = NFLAG_32(hi);\r |
12245 | FLAG_Z = hi | lo;\r |
12246 | FLAG_V = VFLAG_CLEAR;\r |
12247 | return;\r |
12248 | }\r |
12249 | \r |
12250 | REG_D[(word2 >> 12) & 7] = lo;\r |
12251 | FLAG_N = NFLAG_32(lo);\r |
12252 | FLAG_Z = lo;\r |
12253 | if(BIT_B(word2))\r |
12254 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
12255 | else\r |
12256 | FLAG_V = (hi != 0) << 7;\r |
12257 | return;\r |
12258 | }\r |
12259 | m68ki_exception_illegal();\r |
12260 | \r |
12261 | #endif\r |
12262 | }\r |
12263 | \r |
12264 | \r |
12265 | void m68k_op_mull_32_pi(void)\r |
12266 | {\r |
12267 | #if M68K_USE_64_BIT\r |
12268 | \r |
12269 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12270 | {\r |
12271 | uint word2 = OPER_I_16();\r |
12272 | uint64 src = OPER_AY_PI_32();\r |
12273 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
12274 | uint64 res;\r |
12275 | \r |
12276 | FLAG_C = CFLAG_CLEAR;\r |
12277 | \r |
12278 | if(BIT_B(word2)) /* signed */\r |
12279 | {\r |
12280 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
12281 | if(!BIT_A(word2))\r |
12282 | {\r |
12283 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12284 | FLAG_N = NFLAG_32(res);\r |
12285 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
12286 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12287 | return;\r |
12288 | }\r |
12289 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12290 | FLAG_N = NFLAG_64(res);\r |
12291 | FLAG_V = VFLAG_CLEAR;\r |
12292 | REG_D[word2 & 7] = (res >> 32);\r |
12293 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12294 | return;\r |
12295 | }\r |
12296 | \r |
12297 | res = src * dst;\r |
12298 | if(!BIT_A(word2))\r |
12299 | {\r |
12300 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12301 | FLAG_N = NFLAG_32(res);\r |
12302 | FLAG_V = (res > 0xffffffff)<<7;\r |
12303 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12304 | return;\r |
12305 | }\r |
12306 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12307 | FLAG_N = NFLAG_64(res);\r |
12308 | FLAG_V = VFLAG_CLEAR;\r |
12309 | REG_D[word2 & 7] = (res >> 32);\r |
12310 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12311 | return;\r |
12312 | }\r |
12313 | m68ki_exception_illegal();\r |
12314 | \r |
12315 | #else\r |
12316 | \r |
12317 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12318 | {\r |
12319 | uint word2 = OPER_I_16();\r |
12320 | uint src = OPER_AY_PI_32();\r |
12321 | uint dst = REG_D[(word2 >> 12) & 7];\r |
12322 | uint neg = GET_MSB_32(src ^ dst);\r |
12323 | uint src1;\r |
12324 | uint src2;\r |
12325 | uint dst1;\r |
12326 | uint dst2;\r |
12327 | uint r1;\r |
12328 | uint r2;\r |
12329 | uint r3;\r |
12330 | uint r4;\r |
12331 | uint lo;\r |
12332 | uint hi;\r |
12333 | \r |
12334 | FLAG_C = CFLAG_CLEAR;\r |
12335 | \r |
12336 | if(BIT_B(word2)) /* signed */\r |
12337 | {\r |
12338 | if(GET_MSB_32(src))\r |
12339 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
12340 | if(GET_MSB_32(dst))\r |
12341 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
12342 | }\r |
12343 | \r |
12344 | src1 = MASK_OUT_ABOVE_16(src);\r |
12345 | src2 = src>>16;\r |
12346 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
12347 | dst2 = dst>>16;\r |
12348 | \r |
12349 | \r |
12350 | r1 = src1 * dst1;\r |
12351 | r2 = src1 * dst2;\r |
12352 | r3 = src2 * dst1;\r |
12353 | r4 = src2 * dst2;\r |
12354 | \r |
12355 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
12356 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
12357 | \r |
12358 | if(BIT_B(word2) && neg)\r |
12359 | {\r |
12360 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
12361 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
12362 | }\r |
12363 | \r |
12364 | if(BIT_A(word2))\r |
12365 | {\r |
12366 | REG_D[word2 & 7] = hi;\r |
12367 | REG_D[(word2 >> 12) & 7] = lo;\r |
12368 | FLAG_N = NFLAG_32(hi);\r |
12369 | FLAG_Z = hi | lo;\r |
12370 | FLAG_V = VFLAG_CLEAR;\r |
12371 | return;\r |
12372 | }\r |
12373 | \r |
12374 | REG_D[(word2 >> 12) & 7] = lo;\r |
12375 | FLAG_N = NFLAG_32(lo);\r |
12376 | FLAG_Z = lo;\r |
12377 | if(BIT_B(word2))\r |
12378 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
12379 | else\r |
12380 | FLAG_V = (hi != 0) << 7;\r |
12381 | return;\r |
12382 | }\r |
12383 | m68ki_exception_illegal();\r |
12384 | \r |
12385 | #endif\r |
12386 | }\r |
12387 | \r |
12388 | \r |
12389 | void m68k_op_mull_32_pd(void)\r |
12390 | {\r |
12391 | #if M68K_USE_64_BIT\r |
12392 | \r |
12393 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12394 | {\r |
12395 | uint word2 = OPER_I_16();\r |
12396 | uint64 src = OPER_AY_PD_32();\r |
12397 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
12398 | uint64 res;\r |
12399 | \r |
12400 | FLAG_C = CFLAG_CLEAR;\r |
12401 | \r |
12402 | if(BIT_B(word2)) /* signed */\r |
12403 | {\r |
12404 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
12405 | if(!BIT_A(word2))\r |
12406 | {\r |
12407 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12408 | FLAG_N = NFLAG_32(res);\r |
12409 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
12410 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12411 | return;\r |
12412 | }\r |
12413 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12414 | FLAG_N = NFLAG_64(res);\r |
12415 | FLAG_V = VFLAG_CLEAR;\r |
12416 | REG_D[word2 & 7] = (res >> 32);\r |
12417 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12418 | return;\r |
12419 | }\r |
12420 | \r |
12421 | res = src * dst;\r |
12422 | if(!BIT_A(word2))\r |
12423 | {\r |
12424 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12425 | FLAG_N = NFLAG_32(res);\r |
12426 | FLAG_V = (res > 0xffffffff)<<7;\r |
12427 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12428 | return;\r |
12429 | }\r |
12430 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12431 | FLAG_N = NFLAG_64(res);\r |
12432 | FLAG_V = VFLAG_CLEAR;\r |
12433 | REG_D[word2 & 7] = (res >> 32);\r |
12434 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12435 | return;\r |
12436 | }\r |
12437 | m68ki_exception_illegal();\r |
12438 | \r |
12439 | #else\r |
12440 | \r |
12441 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12442 | {\r |
12443 | uint word2 = OPER_I_16();\r |
12444 | uint src = OPER_AY_PD_32();\r |
12445 | uint dst = REG_D[(word2 >> 12) & 7];\r |
12446 | uint neg = GET_MSB_32(src ^ dst);\r |
12447 | uint src1;\r |
12448 | uint src2;\r |
12449 | uint dst1;\r |
12450 | uint dst2;\r |
12451 | uint r1;\r |
12452 | uint r2;\r |
12453 | uint r3;\r |
12454 | uint r4;\r |
12455 | uint lo;\r |
12456 | uint hi;\r |
12457 | \r |
12458 | FLAG_C = CFLAG_CLEAR;\r |
12459 | \r |
12460 | if(BIT_B(word2)) /* signed */\r |
12461 | {\r |
12462 | if(GET_MSB_32(src))\r |
12463 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
12464 | if(GET_MSB_32(dst))\r |
12465 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
12466 | }\r |
12467 | \r |
12468 | src1 = MASK_OUT_ABOVE_16(src);\r |
12469 | src2 = src>>16;\r |
12470 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
12471 | dst2 = dst>>16;\r |
12472 | \r |
12473 | \r |
12474 | r1 = src1 * dst1;\r |
12475 | r2 = src1 * dst2;\r |
12476 | r3 = src2 * dst1;\r |
12477 | r4 = src2 * dst2;\r |
12478 | \r |
12479 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
12480 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
12481 | \r |
12482 | if(BIT_B(word2) && neg)\r |
12483 | {\r |
12484 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
12485 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
12486 | }\r |
12487 | \r |
12488 | if(BIT_A(word2))\r |
12489 | {\r |
12490 | REG_D[word2 & 7] = hi;\r |
12491 | REG_D[(word2 >> 12) & 7] = lo;\r |
12492 | FLAG_N = NFLAG_32(hi);\r |
12493 | FLAG_Z = hi | lo;\r |
12494 | FLAG_V = VFLAG_CLEAR;\r |
12495 | return;\r |
12496 | }\r |
12497 | \r |
12498 | REG_D[(word2 >> 12) & 7] = lo;\r |
12499 | FLAG_N = NFLAG_32(lo);\r |
12500 | FLAG_Z = lo;\r |
12501 | if(BIT_B(word2))\r |
12502 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
12503 | else\r |
12504 | FLAG_V = (hi != 0) << 7;\r |
12505 | return;\r |
12506 | }\r |
12507 | m68ki_exception_illegal();\r |
12508 | \r |
12509 | #endif\r |
12510 | }\r |
12511 | \r |
12512 | \r |
12513 | void m68k_op_mull_32_di(void)\r |
12514 | {\r |
12515 | #if M68K_USE_64_BIT\r |
12516 | \r |
12517 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12518 | {\r |
12519 | uint word2 = OPER_I_16();\r |
12520 | uint64 src = OPER_AY_DI_32();\r |
12521 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
12522 | uint64 res;\r |
12523 | \r |
12524 | FLAG_C = CFLAG_CLEAR;\r |
12525 | \r |
12526 | if(BIT_B(word2)) /* signed */\r |
12527 | {\r |
12528 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
12529 | if(!BIT_A(word2))\r |
12530 | {\r |
12531 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12532 | FLAG_N = NFLAG_32(res);\r |
12533 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
12534 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12535 | return;\r |
12536 | }\r |
12537 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12538 | FLAG_N = NFLAG_64(res);\r |
12539 | FLAG_V = VFLAG_CLEAR;\r |
12540 | REG_D[word2 & 7] = (res >> 32);\r |
12541 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12542 | return;\r |
12543 | }\r |
12544 | \r |
12545 | res = src * dst;\r |
12546 | if(!BIT_A(word2))\r |
12547 | {\r |
12548 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12549 | FLAG_N = NFLAG_32(res);\r |
12550 | FLAG_V = (res > 0xffffffff)<<7;\r |
12551 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12552 | return;\r |
12553 | }\r |
12554 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12555 | FLAG_N = NFLAG_64(res);\r |
12556 | FLAG_V = VFLAG_CLEAR;\r |
12557 | REG_D[word2 & 7] = (res >> 32);\r |
12558 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12559 | return;\r |
12560 | }\r |
12561 | m68ki_exception_illegal();\r |
12562 | \r |
12563 | #else\r |
12564 | \r |
12565 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12566 | {\r |
12567 | uint word2 = OPER_I_16();\r |
12568 | uint src = OPER_AY_DI_32();\r |
12569 | uint dst = REG_D[(word2 >> 12) & 7];\r |
12570 | uint neg = GET_MSB_32(src ^ dst);\r |
12571 | uint src1;\r |
12572 | uint src2;\r |
12573 | uint dst1;\r |
12574 | uint dst2;\r |
12575 | uint r1;\r |
12576 | uint r2;\r |
12577 | uint r3;\r |
12578 | uint r4;\r |
12579 | uint lo;\r |
12580 | uint hi;\r |
12581 | \r |
12582 | FLAG_C = CFLAG_CLEAR;\r |
12583 | \r |
12584 | if(BIT_B(word2)) /* signed */\r |
12585 | {\r |
12586 | if(GET_MSB_32(src))\r |
12587 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
12588 | if(GET_MSB_32(dst))\r |
12589 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
12590 | }\r |
12591 | \r |
12592 | src1 = MASK_OUT_ABOVE_16(src);\r |
12593 | src2 = src>>16;\r |
12594 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
12595 | dst2 = dst>>16;\r |
12596 | \r |
12597 | \r |
12598 | r1 = src1 * dst1;\r |
12599 | r2 = src1 * dst2;\r |
12600 | r3 = src2 * dst1;\r |
12601 | r4 = src2 * dst2;\r |
12602 | \r |
12603 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
12604 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
12605 | \r |
12606 | if(BIT_B(word2) && neg)\r |
12607 | {\r |
12608 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
12609 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
12610 | }\r |
12611 | \r |
12612 | if(BIT_A(word2))\r |
12613 | {\r |
12614 | REG_D[word2 & 7] = hi;\r |
12615 | REG_D[(word2 >> 12) & 7] = lo;\r |
12616 | FLAG_N = NFLAG_32(hi);\r |
12617 | FLAG_Z = hi | lo;\r |
12618 | FLAG_V = VFLAG_CLEAR;\r |
12619 | return;\r |
12620 | }\r |
12621 | \r |
12622 | REG_D[(word2 >> 12) & 7] = lo;\r |
12623 | FLAG_N = NFLAG_32(lo);\r |
12624 | FLAG_Z = lo;\r |
12625 | if(BIT_B(word2))\r |
12626 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
12627 | else\r |
12628 | FLAG_V = (hi != 0) << 7;\r |
12629 | return;\r |
12630 | }\r |
12631 | m68ki_exception_illegal();\r |
12632 | \r |
12633 | #endif\r |
12634 | }\r |
12635 | \r |
12636 | \r |
12637 | void m68k_op_mull_32_ix(void)\r |
12638 | {\r |
12639 | #if M68K_USE_64_BIT\r |
12640 | \r |
12641 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12642 | {\r |
12643 | uint word2 = OPER_I_16();\r |
12644 | uint64 src = OPER_AY_IX_32();\r |
12645 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
12646 | uint64 res;\r |
12647 | \r |
12648 | FLAG_C = CFLAG_CLEAR;\r |
12649 | \r |
12650 | if(BIT_B(word2)) /* signed */\r |
12651 | {\r |
12652 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
12653 | if(!BIT_A(word2))\r |
12654 | {\r |
12655 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12656 | FLAG_N = NFLAG_32(res);\r |
12657 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
12658 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12659 | return;\r |
12660 | }\r |
12661 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12662 | FLAG_N = NFLAG_64(res);\r |
12663 | FLAG_V = VFLAG_CLEAR;\r |
12664 | REG_D[word2 & 7] = (res >> 32);\r |
12665 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12666 | return;\r |
12667 | }\r |
12668 | \r |
12669 | res = src * dst;\r |
12670 | if(!BIT_A(word2))\r |
12671 | {\r |
12672 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12673 | FLAG_N = NFLAG_32(res);\r |
12674 | FLAG_V = (res > 0xffffffff)<<7;\r |
12675 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12676 | return;\r |
12677 | }\r |
12678 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12679 | FLAG_N = NFLAG_64(res);\r |
12680 | FLAG_V = VFLAG_CLEAR;\r |
12681 | REG_D[word2 & 7] = (res >> 32);\r |
12682 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12683 | return;\r |
12684 | }\r |
12685 | m68ki_exception_illegal();\r |
12686 | \r |
12687 | #else\r |
12688 | \r |
12689 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12690 | {\r |
12691 | uint word2 = OPER_I_16();\r |
12692 | uint src = OPER_AY_IX_32();\r |
12693 | uint dst = REG_D[(word2 >> 12) & 7];\r |
12694 | uint neg = GET_MSB_32(src ^ dst);\r |
12695 | uint src1;\r |
12696 | uint src2;\r |
12697 | uint dst1;\r |
12698 | uint dst2;\r |
12699 | uint r1;\r |
12700 | uint r2;\r |
12701 | uint r3;\r |
12702 | uint r4;\r |
12703 | uint lo;\r |
12704 | uint hi;\r |
12705 | \r |
12706 | FLAG_C = CFLAG_CLEAR;\r |
12707 | \r |
12708 | if(BIT_B(word2)) /* signed */\r |
12709 | {\r |
12710 | if(GET_MSB_32(src))\r |
12711 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
12712 | if(GET_MSB_32(dst))\r |
12713 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
12714 | }\r |
12715 | \r |
12716 | src1 = MASK_OUT_ABOVE_16(src);\r |
12717 | src2 = src>>16;\r |
12718 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
12719 | dst2 = dst>>16;\r |
12720 | \r |
12721 | \r |
12722 | r1 = src1 * dst1;\r |
12723 | r2 = src1 * dst2;\r |
12724 | r3 = src2 * dst1;\r |
12725 | r4 = src2 * dst2;\r |
12726 | \r |
12727 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
12728 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
12729 | \r |
12730 | if(BIT_B(word2) && neg)\r |
12731 | {\r |
12732 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
12733 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
12734 | }\r |
12735 | \r |
12736 | if(BIT_A(word2))\r |
12737 | {\r |
12738 | REG_D[word2 & 7] = hi;\r |
12739 | REG_D[(word2 >> 12) & 7] = lo;\r |
12740 | FLAG_N = NFLAG_32(hi);\r |
12741 | FLAG_Z = hi | lo;\r |
12742 | FLAG_V = VFLAG_CLEAR;\r |
12743 | return;\r |
12744 | }\r |
12745 | \r |
12746 | REG_D[(word2 >> 12) & 7] = lo;\r |
12747 | FLAG_N = NFLAG_32(lo);\r |
12748 | FLAG_Z = lo;\r |
12749 | if(BIT_B(word2))\r |
12750 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
12751 | else\r |
12752 | FLAG_V = (hi != 0) << 7;\r |
12753 | return;\r |
12754 | }\r |
12755 | m68ki_exception_illegal();\r |
12756 | \r |
12757 | #endif\r |
12758 | }\r |
12759 | \r |
12760 | \r |
12761 | void m68k_op_mull_32_aw(void)\r |
12762 | {\r |
12763 | #if M68K_USE_64_BIT\r |
12764 | \r |
12765 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12766 | {\r |
12767 | uint word2 = OPER_I_16();\r |
12768 | uint64 src = OPER_AW_32();\r |
12769 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
12770 | uint64 res;\r |
12771 | \r |
12772 | FLAG_C = CFLAG_CLEAR;\r |
12773 | \r |
12774 | if(BIT_B(word2)) /* signed */\r |
12775 | {\r |
12776 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
12777 | if(!BIT_A(word2))\r |
12778 | {\r |
12779 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12780 | FLAG_N = NFLAG_32(res);\r |
12781 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
12782 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12783 | return;\r |
12784 | }\r |
12785 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12786 | FLAG_N = NFLAG_64(res);\r |
12787 | FLAG_V = VFLAG_CLEAR;\r |
12788 | REG_D[word2 & 7] = (res >> 32);\r |
12789 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12790 | return;\r |
12791 | }\r |
12792 | \r |
12793 | res = src * dst;\r |
12794 | if(!BIT_A(word2))\r |
12795 | {\r |
12796 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12797 | FLAG_N = NFLAG_32(res);\r |
12798 | FLAG_V = (res > 0xffffffff)<<7;\r |
12799 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12800 | return;\r |
12801 | }\r |
12802 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12803 | FLAG_N = NFLAG_64(res);\r |
12804 | FLAG_V = VFLAG_CLEAR;\r |
12805 | REG_D[word2 & 7] = (res >> 32);\r |
12806 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12807 | return;\r |
12808 | }\r |
12809 | m68ki_exception_illegal();\r |
12810 | \r |
12811 | #else\r |
12812 | \r |
12813 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12814 | {\r |
12815 | uint word2 = OPER_I_16();\r |
12816 | uint src = OPER_AW_32();\r |
12817 | uint dst = REG_D[(word2 >> 12) & 7];\r |
12818 | uint neg = GET_MSB_32(src ^ dst);\r |
12819 | uint src1;\r |
12820 | uint src2;\r |
12821 | uint dst1;\r |
12822 | uint dst2;\r |
12823 | uint r1;\r |
12824 | uint r2;\r |
12825 | uint r3;\r |
12826 | uint r4;\r |
12827 | uint lo;\r |
12828 | uint hi;\r |
12829 | \r |
12830 | FLAG_C = CFLAG_CLEAR;\r |
12831 | \r |
12832 | if(BIT_B(word2)) /* signed */\r |
12833 | {\r |
12834 | if(GET_MSB_32(src))\r |
12835 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
12836 | if(GET_MSB_32(dst))\r |
12837 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
12838 | }\r |
12839 | \r |
12840 | src1 = MASK_OUT_ABOVE_16(src);\r |
12841 | src2 = src>>16;\r |
12842 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
12843 | dst2 = dst>>16;\r |
12844 | \r |
12845 | \r |
12846 | r1 = src1 * dst1;\r |
12847 | r2 = src1 * dst2;\r |
12848 | r3 = src2 * dst1;\r |
12849 | r4 = src2 * dst2;\r |
12850 | \r |
12851 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
12852 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
12853 | \r |
12854 | if(BIT_B(word2) && neg)\r |
12855 | {\r |
12856 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
12857 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
12858 | }\r |
12859 | \r |
12860 | if(BIT_A(word2))\r |
12861 | {\r |
12862 | REG_D[word2 & 7] = hi;\r |
12863 | REG_D[(word2 >> 12) & 7] = lo;\r |
12864 | FLAG_N = NFLAG_32(hi);\r |
12865 | FLAG_Z = hi | lo;\r |
12866 | FLAG_V = VFLAG_CLEAR;\r |
12867 | return;\r |
12868 | }\r |
12869 | \r |
12870 | REG_D[(word2 >> 12) & 7] = lo;\r |
12871 | FLAG_N = NFLAG_32(lo);\r |
12872 | FLAG_Z = lo;\r |
12873 | if(BIT_B(word2))\r |
12874 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
12875 | else\r |
12876 | FLAG_V = (hi != 0) << 7;\r |
12877 | return;\r |
12878 | }\r |
12879 | m68ki_exception_illegal();\r |
12880 | \r |
12881 | #endif\r |
12882 | }\r |
12883 | \r |
12884 | \r |
12885 | void m68k_op_mull_32_al(void)\r |
12886 | {\r |
12887 | #if M68K_USE_64_BIT\r |
12888 | \r |
12889 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12890 | {\r |
12891 | uint word2 = OPER_I_16();\r |
12892 | uint64 src = OPER_AL_32();\r |
12893 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
12894 | uint64 res;\r |
12895 | \r |
12896 | FLAG_C = CFLAG_CLEAR;\r |
12897 | \r |
12898 | if(BIT_B(word2)) /* signed */\r |
12899 | {\r |
12900 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
12901 | if(!BIT_A(word2))\r |
12902 | {\r |
12903 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12904 | FLAG_N = NFLAG_32(res);\r |
12905 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
12906 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12907 | return;\r |
12908 | }\r |
12909 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12910 | FLAG_N = NFLAG_64(res);\r |
12911 | FLAG_V = VFLAG_CLEAR;\r |
12912 | REG_D[word2 & 7] = (res >> 32);\r |
12913 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12914 | return;\r |
12915 | }\r |
12916 | \r |
12917 | res = src * dst;\r |
12918 | if(!BIT_A(word2))\r |
12919 | {\r |
12920 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
12921 | FLAG_N = NFLAG_32(res);\r |
12922 | FLAG_V = (res > 0xffffffff)<<7;\r |
12923 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
12924 | return;\r |
12925 | }\r |
12926 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
12927 | FLAG_N = NFLAG_64(res);\r |
12928 | FLAG_V = VFLAG_CLEAR;\r |
12929 | REG_D[word2 & 7] = (res >> 32);\r |
12930 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
12931 | return;\r |
12932 | }\r |
12933 | m68ki_exception_illegal();\r |
12934 | \r |
12935 | #else\r |
12936 | \r |
12937 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
12938 | {\r |
12939 | uint word2 = OPER_I_16();\r |
12940 | uint src = OPER_AL_32();\r |
12941 | uint dst = REG_D[(word2 >> 12) & 7];\r |
12942 | uint neg = GET_MSB_32(src ^ dst);\r |
12943 | uint src1;\r |
12944 | uint src2;\r |
12945 | uint dst1;\r |
12946 | uint dst2;\r |
12947 | uint r1;\r |
12948 | uint r2;\r |
12949 | uint r3;\r |
12950 | uint r4;\r |
12951 | uint lo;\r |
12952 | uint hi;\r |
12953 | \r |
12954 | FLAG_C = CFLAG_CLEAR;\r |
12955 | \r |
12956 | if(BIT_B(word2)) /* signed */\r |
12957 | {\r |
12958 | if(GET_MSB_32(src))\r |
12959 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
12960 | if(GET_MSB_32(dst))\r |
12961 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
12962 | }\r |
12963 | \r |
12964 | src1 = MASK_OUT_ABOVE_16(src);\r |
12965 | src2 = src>>16;\r |
12966 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
12967 | dst2 = dst>>16;\r |
12968 | \r |
12969 | \r |
12970 | r1 = src1 * dst1;\r |
12971 | r2 = src1 * dst2;\r |
12972 | r3 = src2 * dst1;\r |
12973 | r4 = src2 * dst2;\r |
12974 | \r |
12975 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
12976 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
12977 | \r |
12978 | if(BIT_B(word2) && neg)\r |
12979 | {\r |
12980 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
12981 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
12982 | }\r |
12983 | \r |
12984 | if(BIT_A(word2))\r |
12985 | {\r |
12986 | REG_D[word2 & 7] = hi;\r |
12987 | REG_D[(word2 >> 12) & 7] = lo;\r |
12988 | FLAG_N = NFLAG_32(hi);\r |
12989 | FLAG_Z = hi | lo;\r |
12990 | FLAG_V = VFLAG_CLEAR;\r |
12991 | return;\r |
12992 | }\r |
12993 | \r |
12994 | REG_D[(word2 >> 12) & 7] = lo;\r |
12995 | FLAG_N = NFLAG_32(lo);\r |
12996 | FLAG_Z = lo;\r |
12997 | if(BIT_B(word2))\r |
12998 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
12999 | else\r |
13000 | FLAG_V = (hi != 0) << 7;\r |
13001 | return;\r |
13002 | }\r |
13003 | m68ki_exception_illegal();\r |
13004 | \r |
13005 | #endif\r |
13006 | }\r |
13007 | \r |
13008 | \r |
13009 | void m68k_op_mull_32_pcdi(void)\r |
13010 | {\r |
13011 | #if M68K_USE_64_BIT\r |
13012 | \r |
13013 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
13014 | {\r |
13015 | uint word2 = OPER_I_16();\r |
13016 | uint64 src = OPER_PCDI_32();\r |
13017 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
13018 | uint64 res;\r |
13019 | \r |
13020 | FLAG_C = CFLAG_CLEAR;\r |
13021 | \r |
13022 | if(BIT_B(word2)) /* signed */\r |
13023 | {\r |
13024 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
13025 | if(!BIT_A(word2))\r |
13026 | {\r |
13027 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
13028 | FLAG_N = NFLAG_32(res);\r |
13029 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
13030 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
13031 | return;\r |
13032 | }\r |
13033 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
13034 | FLAG_N = NFLAG_64(res);\r |
13035 | FLAG_V = VFLAG_CLEAR;\r |
13036 | REG_D[word2 & 7] = (res >> 32);\r |
13037 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
13038 | return;\r |
13039 | }\r |
13040 | \r |
13041 | res = src * dst;\r |
13042 | if(!BIT_A(word2))\r |
13043 | {\r |
13044 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
13045 | FLAG_N = NFLAG_32(res);\r |
13046 | FLAG_V = (res > 0xffffffff)<<7;\r |
13047 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
13048 | return;\r |
13049 | }\r |
13050 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
13051 | FLAG_N = NFLAG_64(res);\r |
13052 | FLAG_V = VFLAG_CLEAR;\r |
13053 | REG_D[word2 & 7] = (res >> 32);\r |
13054 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
13055 | return;\r |
13056 | }\r |
13057 | m68ki_exception_illegal();\r |
13058 | \r |
13059 | #else\r |
13060 | \r |
13061 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
13062 | {\r |
13063 | uint word2 = OPER_I_16();\r |
13064 | uint src = OPER_PCDI_32();\r |
13065 | uint dst = REG_D[(word2 >> 12) & 7];\r |
13066 | uint neg = GET_MSB_32(src ^ dst);\r |
13067 | uint src1;\r |
13068 | uint src2;\r |
13069 | uint dst1;\r |
13070 | uint dst2;\r |
13071 | uint r1;\r |
13072 | uint r2;\r |
13073 | uint r3;\r |
13074 | uint r4;\r |
13075 | uint lo;\r |
13076 | uint hi;\r |
13077 | \r |
13078 | FLAG_C = CFLAG_CLEAR;\r |
13079 | \r |
13080 | if(BIT_B(word2)) /* signed */\r |
13081 | {\r |
13082 | if(GET_MSB_32(src))\r |
13083 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
13084 | if(GET_MSB_32(dst))\r |
13085 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
13086 | }\r |
13087 | \r |
13088 | src1 = MASK_OUT_ABOVE_16(src);\r |
13089 | src2 = src>>16;\r |
13090 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
13091 | dst2 = dst>>16;\r |
13092 | \r |
13093 | \r |
13094 | r1 = src1 * dst1;\r |
13095 | r2 = src1 * dst2;\r |
13096 | r3 = src2 * dst1;\r |
13097 | r4 = src2 * dst2;\r |
13098 | \r |
13099 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
13100 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
13101 | \r |
13102 | if(BIT_B(word2) && neg)\r |
13103 | {\r |
13104 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
13105 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
13106 | }\r |
13107 | \r |
13108 | if(BIT_A(word2))\r |
13109 | {\r |
13110 | REG_D[word2 & 7] = hi;\r |
13111 | REG_D[(word2 >> 12) & 7] = lo;\r |
13112 | FLAG_N = NFLAG_32(hi);\r |
13113 | FLAG_Z = hi | lo;\r |
13114 | FLAG_V = VFLAG_CLEAR;\r |
13115 | return;\r |
13116 | }\r |
13117 | \r |
13118 | REG_D[(word2 >> 12) & 7] = lo;\r |
13119 | FLAG_N = NFLAG_32(lo);\r |
13120 | FLAG_Z = lo;\r |
13121 | if(BIT_B(word2))\r |
13122 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
13123 | else\r |
13124 | FLAG_V = (hi != 0) << 7;\r |
13125 | return;\r |
13126 | }\r |
13127 | m68ki_exception_illegal();\r |
13128 | \r |
13129 | #endif\r |
13130 | }\r |
13131 | \r |
13132 | \r |
13133 | void m68k_op_mull_32_pcix(void)\r |
13134 | {\r |
13135 | #if M68K_USE_64_BIT\r |
13136 | \r |
13137 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
13138 | {\r |
13139 | uint word2 = OPER_I_16();\r |
13140 | uint64 src = OPER_PCIX_32();\r |
13141 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
13142 | uint64 res;\r |
13143 | \r |
13144 | FLAG_C = CFLAG_CLEAR;\r |
13145 | \r |
13146 | if(BIT_B(word2)) /* signed */\r |
13147 | {\r |
13148 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
13149 | if(!BIT_A(word2))\r |
13150 | {\r |
13151 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
13152 | FLAG_N = NFLAG_32(res);\r |
13153 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
13154 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
13155 | return;\r |
13156 | }\r |
13157 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
13158 | FLAG_N = NFLAG_64(res);\r |
13159 | FLAG_V = VFLAG_CLEAR;\r |
13160 | REG_D[word2 & 7] = (res >> 32);\r |
13161 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
13162 | return;\r |
13163 | }\r |
13164 | \r |
13165 | res = src * dst;\r |
13166 | if(!BIT_A(word2))\r |
13167 | {\r |
13168 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
13169 | FLAG_N = NFLAG_32(res);\r |
13170 | FLAG_V = (res > 0xffffffff)<<7;\r |
13171 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
13172 | return;\r |
13173 | }\r |
13174 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
13175 | FLAG_N = NFLAG_64(res);\r |
13176 | FLAG_V = VFLAG_CLEAR;\r |
13177 | REG_D[word2 & 7] = (res >> 32);\r |
13178 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
13179 | return;\r |
13180 | }\r |
13181 | m68ki_exception_illegal();\r |
13182 | \r |
13183 | #else\r |
13184 | \r |
13185 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
13186 | {\r |
13187 | uint word2 = OPER_I_16();\r |
13188 | uint src = OPER_PCIX_32();\r |
13189 | uint dst = REG_D[(word2 >> 12) & 7];\r |
13190 | uint neg = GET_MSB_32(src ^ dst);\r |
13191 | uint src1;\r |
13192 | uint src2;\r |
13193 | uint dst1;\r |
13194 | uint dst2;\r |
13195 | uint r1;\r |
13196 | uint r2;\r |
13197 | uint r3;\r |
13198 | uint r4;\r |
13199 | uint lo;\r |
13200 | uint hi;\r |
13201 | \r |
13202 | FLAG_C = CFLAG_CLEAR;\r |
13203 | \r |
13204 | if(BIT_B(word2)) /* signed */\r |
13205 | {\r |
13206 | if(GET_MSB_32(src))\r |
13207 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
13208 | if(GET_MSB_32(dst))\r |
13209 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
13210 | }\r |
13211 | \r |
13212 | src1 = MASK_OUT_ABOVE_16(src);\r |
13213 | src2 = src>>16;\r |
13214 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
13215 | dst2 = dst>>16;\r |
13216 | \r |
13217 | \r |
13218 | r1 = src1 * dst1;\r |
13219 | r2 = src1 * dst2;\r |
13220 | r3 = src2 * dst1;\r |
13221 | r4 = src2 * dst2;\r |
13222 | \r |
13223 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
13224 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
13225 | \r |
13226 | if(BIT_B(word2) && neg)\r |
13227 | {\r |
13228 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
13229 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
13230 | }\r |
13231 | \r |
13232 | if(BIT_A(word2))\r |
13233 | {\r |
13234 | REG_D[word2 & 7] = hi;\r |
13235 | REG_D[(word2 >> 12) & 7] = lo;\r |
13236 | FLAG_N = NFLAG_32(hi);\r |
13237 | FLAG_Z = hi | lo;\r |
13238 | FLAG_V = VFLAG_CLEAR;\r |
13239 | return;\r |
13240 | }\r |
13241 | \r |
13242 | REG_D[(word2 >> 12) & 7] = lo;\r |
13243 | FLAG_N = NFLAG_32(lo);\r |
13244 | FLAG_Z = lo;\r |
13245 | if(BIT_B(word2))\r |
13246 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
13247 | else\r |
13248 | FLAG_V = (hi != 0) << 7;\r |
13249 | return;\r |
13250 | }\r |
13251 | m68ki_exception_illegal();\r |
13252 | \r |
13253 | #endif\r |
13254 | }\r |
13255 | \r |
13256 | \r |
13257 | void m68k_op_mull_32_i(void)\r |
13258 | {\r |
13259 | #if M68K_USE_64_BIT\r |
13260 | \r |
13261 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
13262 | {\r |
13263 | uint word2 = OPER_I_16();\r |
13264 | uint64 src = OPER_I_32();\r |
13265 | uint64 dst = REG_D[(word2 >> 12) & 7];\r |
13266 | uint64 res;\r |
13267 | \r |
13268 | FLAG_C = CFLAG_CLEAR;\r |
13269 | \r |
13270 | if(BIT_B(word2)) /* signed */\r |
13271 | {\r |
13272 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);\r |
13273 | if(!BIT_A(word2))\r |
13274 | {\r |
13275 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
13276 | FLAG_N = NFLAG_32(res);\r |
13277 | FLAG_V = ((sint64)res != (sint32)res)<<7;\r |
13278 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
13279 | return;\r |
13280 | }\r |
13281 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
13282 | FLAG_N = NFLAG_64(res);\r |
13283 | FLAG_V = VFLAG_CLEAR;\r |
13284 | REG_D[word2 & 7] = (res >> 32);\r |
13285 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
13286 | return;\r |
13287 | }\r |
13288 | \r |
13289 | res = src * dst;\r |
13290 | if(!BIT_A(word2))\r |
13291 | {\r |
13292 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
13293 | FLAG_N = NFLAG_32(res);\r |
13294 | FLAG_V = (res > 0xffffffff)<<7;\r |
13295 | REG_D[(word2 >> 12) & 7] = FLAG_Z;\r |
13296 | return;\r |
13297 | }\r |
13298 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);\r |
13299 | FLAG_N = NFLAG_64(res);\r |
13300 | FLAG_V = VFLAG_CLEAR;\r |
13301 | REG_D[word2 & 7] = (res >> 32);\r |
13302 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);\r |
13303 | return;\r |
13304 | }\r |
13305 | m68ki_exception_illegal();\r |
13306 | \r |
13307 | #else\r |
13308 | \r |
13309 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
13310 | {\r |
13311 | uint word2 = OPER_I_16();\r |
13312 | uint src = OPER_I_32();\r |
13313 | uint dst = REG_D[(word2 >> 12) & 7];\r |
13314 | uint neg = GET_MSB_32(src ^ dst);\r |
13315 | uint src1;\r |
13316 | uint src2;\r |
13317 | uint dst1;\r |
13318 | uint dst2;\r |
13319 | uint r1;\r |
13320 | uint r2;\r |
13321 | uint r3;\r |
13322 | uint r4;\r |
13323 | uint lo;\r |
13324 | uint hi;\r |
13325 | \r |
13326 | FLAG_C = CFLAG_CLEAR;\r |
13327 | \r |
13328 | if(BIT_B(word2)) /* signed */\r |
13329 | {\r |
13330 | if(GET_MSB_32(src))\r |
13331 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);\r |
13332 | if(GET_MSB_32(dst))\r |
13333 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);\r |
13334 | }\r |
13335 | \r |
13336 | src1 = MASK_OUT_ABOVE_16(src);\r |
13337 | src2 = src>>16;\r |
13338 | dst1 = MASK_OUT_ABOVE_16(dst);\r |
13339 | dst2 = dst>>16;\r |
13340 | \r |
13341 | \r |
13342 | r1 = src1 * dst1;\r |
13343 | r2 = src1 * dst2;\r |
13344 | r3 = src2 * dst1;\r |
13345 | r4 = src2 * dst2;\r |
13346 | \r |
13347 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);\r |
13348 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);\r |
13349 | \r |
13350 | if(BIT_B(word2) && neg)\r |
13351 | {\r |
13352 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));\r |
13353 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);\r |
13354 | }\r |
13355 | \r |
13356 | if(BIT_A(word2))\r |
13357 | {\r |
13358 | REG_D[word2 & 7] = hi;\r |
13359 | REG_D[(word2 >> 12) & 7] = lo;\r |
13360 | FLAG_N = NFLAG_32(hi);\r |
13361 | FLAG_Z = hi | lo;\r |
13362 | FLAG_V = VFLAG_CLEAR;\r |
13363 | return;\r |
13364 | }\r |
13365 | \r |
13366 | REG_D[(word2 >> 12) & 7] = lo;\r |
13367 | FLAG_N = NFLAG_32(lo);\r |
13368 | FLAG_Z = lo;\r |
13369 | if(BIT_B(word2))\r |
13370 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;\r |
13371 | else\r |
13372 | FLAG_V = (hi != 0) << 7;\r |
13373 | return;\r |
13374 | }\r |
13375 | m68ki_exception_illegal();\r |
13376 | \r |
13377 | #endif\r |
13378 | }\r |
13379 | \r |
13380 | \r |
13381 | /* ======================================================================== */\r |
13382 | /* ============================== END OF FILE ============================= */\r |
13383 | /* ======================================================================== */\r |
13384 | \r |
13385 | \r |