cc68a136 |
1 | #include "m68kcpu.h"\r |
2 | \r |
3 | /* ======================================================================== */\r |
4 | /* ========================= INSTRUCTION HANDLERS ========================= */\r |
5 | /* ======================================================================== */\r |
6 | \r |
7 | \r |
8 | void m68k_op_nbcd_8_d(void)\r |
9 | {\r |
10 | uint* r_dst = &DY;\r |
11 | uint dst = *r_dst;\r |
12 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
13 | \r |
14 | if(res != 0x9a)\r |
15 | {\r |
16 | FLAG_V = ~res; /* Undefined V behavior */\r |
17 | \r |
18 | if((res & 0x0f) == 0xa)\r |
19 | res = (res & 0xf0) + 0x10;\r |
20 | \r |
21 | res = MASK_OUT_ABOVE_8(res);\r |
22 | \r |
23 | FLAG_V &= res; /* Undefined V behavior part II */\r |
24 | \r |
25 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
26 | \r |
27 | FLAG_Z |= res;\r |
28 | FLAG_C = CFLAG_SET;\r |
29 | FLAG_X = XFLAG_SET;\r |
30 | }\r |
31 | else\r |
32 | {\r |
33 | FLAG_V = VFLAG_CLEAR;\r |
34 | FLAG_C = CFLAG_CLEAR;\r |
35 | FLAG_X = XFLAG_CLEAR;\r |
36 | }\r |
37 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
38 | }\r |
39 | \r |
40 | \r |
41 | void m68k_op_nbcd_8_ai(void)\r |
42 | {\r |
43 | uint ea = EA_AY_AI_8();\r |
44 | uint dst = m68ki_read_8(ea);\r |
45 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
46 | \r |
47 | if(res != 0x9a)\r |
48 | {\r |
49 | FLAG_V = ~res; /* Undefined V behavior */\r |
50 | \r |
51 | if((res & 0x0f) == 0xa)\r |
52 | res = (res & 0xf0) + 0x10;\r |
53 | \r |
54 | res = MASK_OUT_ABOVE_8(res);\r |
55 | \r |
56 | FLAG_V &= res; /* Undefined V behavior part II */\r |
57 | \r |
58 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));\r |
59 | \r |
60 | FLAG_Z |= res;\r |
61 | FLAG_C = CFLAG_SET;\r |
62 | FLAG_X = XFLAG_SET;\r |
63 | }\r |
64 | else\r |
65 | {\r |
66 | FLAG_V = VFLAG_CLEAR;\r |
67 | FLAG_C = CFLAG_CLEAR;\r |
68 | FLAG_X = XFLAG_CLEAR;\r |
69 | }\r |
70 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
71 | }\r |
72 | \r |
73 | \r |
74 | void m68k_op_nbcd_8_pi(void)\r |
75 | {\r |
76 | uint ea = EA_AY_PI_8();\r |
77 | uint dst = m68ki_read_8(ea);\r |
78 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
79 | \r |
80 | if(res != 0x9a)\r |
81 | {\r |
82 | FLAG_V = ~res; /* Undefined V behavior */\r |
83 | \r |
84 | if((res & 0x0f) == 0xa)\r |
85 | res = (res & 0xf0) + 0x10;\r |
86 | \r |
87 | res = MASK_OUT_ABOVE_8(res);\r |
88 | \r |
89 | FLAG_V &= res; /* Undefined V behavior part II */\r |
90 | \r |
91 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));\r |
92 | \r |
93 | FLAG_Z |= res;\r |
94 | FLAG_C = CFLAG_SET;\r |
95 | FLAG_X = XFLAG_SET;\r |
96 | }\r |
97 | else\r |
98 | {\r |
99 | FLAG_V = VFLAG_CLEAR;\r |
100 | FLAG_C = CFLAG_CLEAR;\r |
101 | FLAG_X = XFLAG_CLEAR;\r |
102 | }\r |
103 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
104 | }\r |
105 | \r |
106 | \r |
107 | void m68k_op_nbcd_8_pi7(void)\r |
108 | {\r |
109 | uint ea = EA_A7_PI_8();\r |
110 | uint dst = m68ki_read_8(ea);\r |
111 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
112 | \r |
113 | if(res != 0x9a)\r |
114 | {\r |
115 | FLAG_V = ~res; /* Undefined V behavior */\r |
116 | \r |
117 | if((res & 0x0f) == 0xa)\r |
118 | res = (res & 0xf0) + 0x10;\r |
119 | \r |
120 | res = MASK_OUT_ABOVE_8(res);\r |
121 | \r |
122 | FLAG_V &= res; /* Undefined V behavior part II */\r |
123 | \r |
124 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));\r |
125 | \r |
126 | FLAG_Z |= res;\r |
127 | FLAG_C = CFLAG_SET;\r |
128 | FLAG_X = XFLAG_SET;\r |
129 | }\r |
130 | else\r |
131 | {\r |
132 | FLAG_V = VFLAG_CLEAR;\r |
133 | FLAG_C = CFLAG_CLEAR;\r |
134 | FLAG_X = XFLAG_CLEAR;\r |
135 | }\r |
136 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
137 | }\r |
138 | \r |
139 | \r |
140 | void m68k_op_nbcd_8_pd(void)\r |
141 | {\r |
142 | uint ea = EA_AY_PD_8();\r |
143 | uint dst = m68ki_read_8(ea);\r |
144 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
145 | \r |
146 | if(res != 0x9a)\r |
147 | {\r |
148 | FLAG_V = ~res; /* Undefined V behavior */\r |
149 | \r |
150 | if((res & 0x0f) == 0xa)\r |
151 | res = (res & 0xf0) + 0x10;\r |
152 | \r |
153 | res = MASK_OUT_ABOVE_8(res);\r |
154 | \r |
155 | FLAG_V &= res; /* Undefined V behavior part II */\r |
156 | \r |
157 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));\r |
158 | \r |
159 | FLAG_Z |= res;\r |
160 | FLAG_C = CFLAG_SET;\r |
161 | FLAG_X = XFLAG_SET;\r |
162 | }\r |
163 | else\r |
164 | {\r |
165 | FLAG_V = VFLAG_CLEAR;\r |
166 | FLAG_C = CFLAG_CLEAR;\r |
167 | FLAG_X = XFLAG_CLEAR;\r |
168 | }\r |
169 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
170 | }\r |
171 | \r |
172 | \r |
173 | void m68k_op_nbcd_8_pd7(void)\r |
174 | {\r |
175 | uint ea = EA_A7_PD_8();\r |
176 | uint dst = m68ki_read_8(ea);\r |
177 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
178 | \r |
179 | if(res != 0x9a)\r |
180 | {\r |
181 | FLAG_V = ~res; /* Undefined V behavior */\r |
182 | \r |
183 | if((res & 0x0f) == 0xa)\r |
184 | res = (res & 0xf0) + 0x10;\r |
185 | \r |
186 | res = MASK_OUT_ABOVE_8(res);\r |
187 | \r |
188 | FLAG_V &= res; /* Undefined V behavior part II */\r |
189 | \r |
190 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));\r |
191 | \r |
192 | FLAG_Z |= res;\r |
193 | FLAG_C = CFLAG_SET;\r |
194 | FLAG_X = XFLAG_SET;\r |
195 | }\r |
196 | else\r |
197 | {\r |
198 | FLAG_V = VFLAG_CLEAR;\r |
199 | FLAG_C = CFLAG_CLEAR;\r |
200 | FLAG_X = XFLAG_CLEAR;\r |
201 | }\r |
202 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
203 | }\r |
204 | \r |
205 | \r |
206 | void m68k_op_nbcd_8_di(void)\r |
207 | {\r |
208 | uint ea = EA_AY_DI_8();\r |
209 | uint dst = m68ki_read_8(ea);\r |
210 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
211 | \r |
212 | if(res != 0x9a)\r |
213 | {\r |
214 | FLAG_V = ~res; /* Undefined V behavior */\r |
215 | \r |
216 | if((res & 0x0f) == 0xa)\r |
217 | res = (res & 0xf0) + 0x10;\r |
218 | \r |
219 | res = MASK_OUT_ABOVE_8(res);\r |
220 | \r |
221 | FLAG_V &= res; /* Undefined V behavior part II */\r |
222 | \r |
223 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));\r |
224 | \r |
225 | FLAG_Z |= res;\r |
226 | FLAG_C = CFLAG_SET;\r |
227 | FLAG_X = XFLAG_SET;\r |
228 | }\r |
229 | else\r |
230 | {\r |
231 | FLAG_V = VFLAG_CLEAR;\r |
232 | FLAG_C = CFLAG_CLEAR;\r |
233 | FLAG_X = XFLAG_CLEAR;\r |
234 | }\r |
235 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
236 | }\r |
237 | \r |
238 | \r |
239 | void m68k_op_nbcd_8_ix(void)\r |
240 | {\r |
241 | uint ea = EA_AY_IX_8();\r |
242 | uint dst = m68ki_read_8(ea);\r |
243 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
244 | \r |
245 | if(res != 0x9a)\r |
246 | {\r |
247 | FLAG_V = ~res; /* Undefined V behavior */\r |
248 | \r |
249 | if((res & 0x0f) == 0xa)\r |
250 | res = (res & 0xf0) + 0x10;\r |
251 | \r |
252 | res = MASK_OUT_ABOVE_8(res);\r |
253 | \r |
254 | FLAG_V &= res; /* Undefined V behavior part II */\r |
255 | \r |
256 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));\r |
257 | \r |
258 | FLAG_Z |= res;\r |
259 | FLAG_C = CFLAG_SET;\r |
260 | FLAG_X = XFLAG_SET;\r |
261 | }\r |
262 | else\r |
263 | {\r |
264 | FLAG_V = VFLAG_CLEAR;\r |
265 | FLAG_C = CFLAG_CLEAR;\r |
266 | FLAG_X = XFLAG_CLEAR;\r |
267 | }\r |
268 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
269 | }\r |
270 | \r |
271 | \r |
272 | void m68k_op_nbcd_8_aw(void)\r |
273 | {\r |
274 | uint ea = EA_AW_8();\r |
275 | uint dst = m68ki_read_8(ea);\r |
276 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
277 | \r |
278 | if(res != 0x9a)\r |
279 | {\r |
280 | FLAG_V = ~res; /* Undefined V behavior */\r |
281 | \r |
282 | if((res & 0x0f) == 0xa)\r |
283 | res = (res & 0xf0) + 0x10;\r |
284 | \r |
285 | res = MASK_OUT_ABOVE_8(res);\r |
286 | \r |
287 | FLAG_V &= res; /* Undefined V behavior part II */\r |
288 | \r |
289 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));\r |
290 | \r |
291 | FLAG_Z |= res;\r |
292 | FLAG_C = CFLAG_SET;\r |
293 | FLAG_X = XFLAG_SET;\r |
294 | }\r |
295 | else\r |
296 | {\r |
297 | FLAG_V = VFLAG_CLEAR;\r |
298 | FLAG_C = CFLAG_CLEAR;\r |
299 | FLAG_X = XFLAG_CLEAR;\r |
300 | }\r |
301 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
302 | }\r |
303 | \r |
304 | \r |
305 | void m68k_op_nbcd_8_al(void)\r |
306 | {\r |
307 | uint ea = EA_AL_8();\r |
308 | uint dst = m68ki_read_8(ea);\r |
309 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());\r |
310 | \r |
311 | if(res != 0x9a)\r |
312 | {\r |
313 | FLAG_V = ~res; /* Undefined V behavior */\r |
314 | \r |
315 | if((res & 0x0f) == 0xa)\r |
316 | res = (res & 0xf0) + 0x10;\r |
317 | \r |
318 | res = MASK_OUT_ABOVE_8(res);\r |
319 | \r |
320 | FLAG_V &= res; /* Undefined V behavior part II */\r |
321 | \r |
322 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));\r |
323 | \r |
324 | FLAG_Z |= res;\r |
325 | FLAG_C = CFLAG_SET;\r |
326 | FLAG_X = XFLAG_SET;\r |
327 | }\r |
328 | else\r |
329 | {\r |
330 | FLAG_V = VFLAG_CLEAR;\r |
331 | FLAG_C = CFLAG_CLEAR;\r |
332 | FLAG_X = XFLAG_CLEAR;\r |
333 | }\r |
334 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
335 | }\r |
336 | \r |
337 | \r |
338 | void m68k_op_neg_8_d(void)\r |
339 | {\r |
340 | uint* r_dst = &DY;\r |
341 | uint res = 0 - MASK_OUT_ABOVE_8(*r_dst);\r |
342 | \r |
343 | FLAG_N = NFLAG_8(res);\r |
344 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
345 | FLAG_V = *r_dst & res;\r |
346 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
347 | \r |
348 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
349 | }\r |
350 | \r |
351 | \r |
352 | void m68k_op_neg_8_ai(void)\r |
353 | {\r |
354 | uint ea = EA_AY_AI_8();\r |
355 | uint src = m68ki_read_8(ea);\r |
356 | uint res = 0 - src;\r |
357 | \r |
358 | FLAG_N = NFLAG_8(res);\r |
359 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
360 | FLAG_V = src & res;\r |
361 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
362 | \r |
363 | m68ki_write_8(ea, FLAG_Z);\r |
364 | }\r |
365 | \r |
366 | \r |
367 | void m68k_op_neg_8_pi(void)\r |
368 | {\r |
369 | uint ea = EA_AY_PI_8();\r |
370 | uint src = m68ki_read_8(ea);\r |
371 | uint res = 0 - src;\r |
372 | \r |
373 | FLAG_N = NFLAG_8(res);\r |
374 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
375 | FLAG_V = src & res;\r |
376 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
377 | \r |
378 | m68ki_write_8(ea, FLAG_Z);\r |
379 | }\r |
380 | \r |
381 | \r |
382 | void m68k_op_neg_8_pi7(void)\r |
383 | {\r |
384 | uint ea = EA_A7_PI_8();\r |
385 | uint src = m68ki_read_8(ea);\r |
386 | uint res = 0 - src;\r |
387 | \r |
388 | FLAG_N = NFLAG_8(res);\r |
389 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
390 | FLAG_V = src & res;\r |
391 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
392 | \r |
393 | m68ki_write_8(ea, FLAG_Z);\r |
394 | }\r |
395 | \r |
396 | \r |
397 | void m68k_op_neg_8_pd(void)\r |
398 | {\r |
399 | uint ea = EA_AY_PD_8();\r |
400 | uint src = m68ki_read_8(ea);\r |
401 | uint res = 0 - src;\r |
402 | \r |
403 | FLAG_N = NFLAG_8(res);\r |
404 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
405 | FLAG_V = src & res;\r |
406 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
407 | \r |
408 | m68ki_write_8(ea, FLAG_Z);\r |
409 | }\r |
410 | \r |
411 | \r |
412 | void m68k_op_neg_8_pd7(void)\r |
413 | {\r |
414 | uint ea = EA_A7_PD_8();\r |
415 | uint src = m68ki_read_8(ea);\r |
416 | uint res = 0 - src;\r |
417 | \r |
418 | FLAG_N = NFLAG_8(res);\r |
419 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
420 | FLAG_V = src & res;\r |
421 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
422 | \r |
423 | m68ki_write_8(ea, FLAG_Z);\r |
424 | }\r |
425 | \r |
426 | \r |
427 | void m68k_op_neg_8_di(void)\r |
428 | {\r |
429 | uint ea = EA_AY_DI_8();\r |
430 | uint src = m68ki_read_8(ea);\r |
431 | uint res = 0 - src;\r |
432 | \r |
433 | FLAG_N = NFLAG_8(res);\r |
434 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
435 | FLAG_V = src & res;\r |
436 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
437 | \r |
438 | m68ki_write_8(ea, FLAG_Z);\r |
439 | }\r |
440 | \r |
441 | \r |
442 | void m68k_op_neg_8_ix(void)\r |
443 | {\r |
444 | uint ea = EA_AY_IX_8();\r |
445 | uint src = m68ki_read_8(ea);\r |
446 | uint res = 0 - src;\r |
447 | \r |
448 | FLAG_N = NFLAG_8(res);\r |
449 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
450 | FLAG_V = src & res;\r |
451 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
452 | \r |
453 | m68ki_write_8(ea, FLAG_Z);\r |
454 | }\r |
455 | \r |
456 | \r |
457 | void m68k_op_neg_8_aw(void)\r |
458 | {\r |
459 | uint ea = EA_AW_8();\r |
460 | uint src = m68ki_read_8(ea);\r |
461 | uint res = 0 - src;\r |
462 | \r |
463 | FLAG_N = NFLAG_8(res);\r |
464 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
465 | FLAG_V = src & res;\r |
466 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
467 | \r |
468 | m68ki_write_8(ea, FLAG_Z);\r |
469 | }\r |
470 | \r |
471 | \r |
472 | void m68k_op_neg_8_al(void)\r |
473 | {\r |
474 | uint ea = EA_AL_8();\r |
475 | uint src = m68ki_read_8(ea);\r |
476 | uint res = 0 - src;\r |
477 | \r |
478 | FLAG_N = NFLAG_8(res);\r |
479 | FLAG_C = FLAG_X = CFLAG_8(res);\r |
480 | FLAG_V = src & res;\r |
481 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
482 | \r |
483 | m68ki_write_8(ea, FLAG_Z);\r |
484 | }\r |
485 | \r |
486 | \r |
487 | void m68k_op_neg_16_d(void)\r |
488 | {\r |
489 | uint* r_dst = &DY;\r |
490 | uint res = 0 - MASK_OUT_ABOVE_16(*r_dst);\r |
491 | \r |
492 | FLAG_N = NFLAG_16(res);\r |
493 | FLAG_C = FLAG_X = CFLAG_16(res);\r |
494 | FLAG_V = (*r_dst & res)>>8;\r |
495 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
496 | \r |
497 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
498 | }\r |
499 | \r |
500 | \r |
501 | void m68k_op_neg_16_ai(void)\r |
502 | {\r |
503 | uint ea = EA_AY_AI_16();\r |
504 | uint src = m68ki_read_16(ea);\r |
505 | uint res = 0 - src;\r |
506 | \r |
507 | FLAG_N = NFLAG_16(res);\r |
508 | FLAG_C = FLAG_X = CFLAG_16(res);\r |
509 | FLAG_V = (src & res)>>8;\r |
510 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
511 | \r |
512 | m68ki_write_16(ea, FLAG_Z);\r |
513 | }\r |
514 | \r |
515 | \r |
516 | void m68k_op_neg_16_pi(void)\r |
517 | {\r |
518 | uint ea = EA_AY_PI_16();\r |
519 | uint src = m68ki_read_16(ea);\r |
520 | uint res = 0 - src;\r |
521 | \r |
522 | FLAG_N = NFLAG_16(res);\r |
523 | FLAG_C = FLAG_X = CFLAG_16(res);\r |
524 | FLAG_V = (src & res)>>8;\r |
525 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
526 | \r |
527 | m68ki_write_16(ea, FLAG_Z);\r |
528 | }\r |
529 | \r |
530 | \r |
531 | void m68k_op_neg_16_pd(void)\r |
532 | {\r |
533 | uint ea = EA_AY_PD_16();\r |
534 | uint src = m68ki_read_16(ea);\r |
535 | uint res = 0 - src;\r |
536 | \r |
537 | FLAG_N = NFLAG_16(res);\r |
538 | FLAG_C = FLAG_X = CFLAG_16(res);\r |
539 | FLAG_V = (src & res)>>8;\r |
540 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
541 | \r |
542 | m68ki_write_16(ea, FLAG_Z);\r |
543 | }\r |
544 | \r |
545 | \r |
546 | void m68k_op_neg_16_di(void)\r |
547 | {\r |
548 | uint ea = EA_AY_DI_16();\r |
549 | uint src = m68ki_read_16(ea);\r |
550 | uint res = 0 - src;\r |
551 | \r |
552 | FLAG_N = NFLAG_16(res);\r |
553 | FLAG_C = FLAG_X = CFLAG_16(res);\r |
554 | FLAG_V = (src & res)>>8;\r |
555 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
556 | \r |
557 | m68ki_write_16(ea, FLAG_Z);\r |
558 | }\r |
559 | \r |
560 | \r |
561 | void m68k_op_neg_16_ix(void)\r |
562 | {\r |
563 | uint ea = EA_AY_IX_16();\r |
564 | uint src = m68ki_read_16(ea);\r |
565 | uint res = 0 - src;\r |
566 | \r |
567 | FLAG_N = NFLAG_16(res);\r |
568 | FLAG_C = FLAG_X = CFLAG_16(res);\r |
569 | FLAG_V = (src & res)>>8;\r |
570 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
571 | \r |
572 | m68ki_write_16(ea, FLAG_Z);\r |
573 | }\r |
574 | \r |
575 | \r |
576 | void m68k_op_neg_16_aw(void)\r |
577 | {\r |
578 | uint ea = EA_AW_16();\r |
579 | uint src = m68ki_read_16(ea);\r |
580 | uint res = 0 - src;\r |
581 | \r |
582 | FLAG_N = NFLAG_16(res);\r |
583 | FLAG_C = FLAG_X = CFLAG_16(res);\r |
584 | FLAG_V = (src & res)>>8;\r |
585 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
586 | \r |
587 | m68ki_write_16(ea, FLAG_Z);\r |
588 | }\r |
589 | \r |
590 | \r |
591 | void m68k_op_neg_16_al(void)\r |
592 | {\r |
593 | uint ea = EA_AL_16();\r |
594 | uint src = m68ki_read_16(ea);\r |
595 | uint res = 0 - src;\r |
596 | \r |
597 | FLAG_N = NFLAG_16(res);\r |
598 | FLAG_C = FLAG_X = CFLAG_16(res);\r |
599 | FLAG_V = (src & res)>>8;\r |
600 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
601 | \r |
602 | m68ki_write_16(ea, FLAG_Z);\r |
603 | }\r |
604 | \r |
605 | \r |
606 | void m68k_op_neg_32_d(void)\r |
607 | {\r |
608 | uint* r_dst = &DY;\r |
609 | uint res = 0 - *r_dst;\r |
610 | \r |
611 | FLAG_N = NFLAG_32(res);\r |
612 | FLAG_C = FLAG_X = CFLAG_SUB_32(*r_dst, 0, res);\r |
613 | FLAG_V = (*r_dst & res)>>24;\r |
614 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
615 | \r |
616 | *r_dst = FLAG_Z;\r |
617 | }\r |
618 | \r |
619 | \r |
620 | void m68k_op_neg_32_ai(void)\r |
621 | {\r |
622 | uint ea = EA_AY_AI_32();\r |
623 | uint src = m68ki_read_32(ea);\r |
624 | uint res = 0 - src;\r |
625 | \r |
626 | FLAG_N = NFLAG_32(res);\r |
627 | FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);\r |
628 | FLAG_V = (src & res)>>24;\r |
629 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
630 | \r |
631 | m68ki_write_32(ea, FLAG_Z);\r |
632 | }\r |
633 | \r |
634 | \r |
635 | void m68k_op_neg_32_pi(void)\r |
636 | {\r |
637 | uint ea = EA_AY_PI_32();\r |
638 | uint src = m68ki_read_32(ea);\r |
639 | uint res = 0 - src;\r |
640 | \r |
641 | FLAG_N = NFLAG_32(res);\r |
642 | FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);\r |
643 | FLAG_V = (src & res)>>24;\r |
644 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
645 | \r |
646 | m68ki_write_32(ea, FLAG_Z);\r |
647 | }\r |
648 | \r |
649 | \r |
650 | void m68k_op_neg_32_pd(void)\r |
651 | {\r |
652 | uint ea = EA_AY_PD_32();\r |
653 | uint src = m68ki_read_32(ea);\r |
654 | uint res = 0 - src;\r |
655 | \r |
656 | FLAG_N = NFLAG_32(res);\r |
657 | FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);\r |
658 | FLAG_V = (src & res)>>24;\r |
659 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
660 | \r |
661 | m68ki_write_32(ea, FLAG_Z);\r |
662 | }\r |
663 | \r |
664 | \r |
665 | void m68k_op_neg_32_di(void)\r |
666 | {\r |
667 | uint ea = EA_AY_DI_32();\r |
668 | uint src = m68ki_read_32(ea);\r |
669 | uint res = 0 - src;\r |
670 | \r |
671 | FLAG_N = NFLAG_32(res);\r |
672 | FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);\r |
673 | FLAG_V = (src & res)>>24;\r |
674 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
675 | \r |
676 | m68ki_write_32(ea, FLAG_Z);\r |
677 | }\r |
678 | \r |
679 | \r |
680 | void m68k_op_neg_32_ix(void)\r |
681 | {\r |
682 | uint ea = EA_AY_IX_32();\r |
683 | uint src = m68ki_read_32(ea);\r |
684 | uint res = 0 - src;\r |
685 | \r |
686 | FLAG_N = NFLAG_32(res);\r |
687 | FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);\r |
688 | FLAG_V = (src & res)>>24;\r |
689 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
690 | \r |
691 | m68ki_write_32(ea, FLAG_Z);\r |
692 | }\r |
693 | \r |
694 | \r |
695 | void m68k_op_neg_32_aw(void)\r |
696 | {\r |
697 | uint ea = EA_AW_32();\r |
698 | uint src = m68ki_read_32(ea);\r |
699 | uint res = 0 - src;\r |
700 | \r |
701 | FLAG_N = NFLAG_32(res);\r |
702 | FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);\r |
703 | FLAG_V = (src & res)>>24;\r |
704 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
705 | \r |
706 | m68ki_write_32(ea, FLAG_Z);\r |
707 | }\r |
708 | \r |
709 | \r |
710 | void m68k_op_neg_32_al(void)\r |
711 | {\r |
712 | uint ea = EA_AL_32();\r |
713 | uint src = m68ki_read_32(ea);\r |
714 | uint res = 0 - src;\r |
715 | \r |
716 | FLAG_N = NFLAG_32(res);\r |
717 | FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);\r |
718 | FLAG_V = (src & res)>>24;\r |
719 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
720 | \r |
721 | m68ki_write_32(ea, FLAG_Z);\r |
722 | }\r |
723 | \r |
724 | \r |
725 | void m68k_op_negx_8_d(void)\r |
726 | {\r |
727 | uint* r_dst = &DY;\r |
728 | uint res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1();\r |
729 | \r |
730 | FLAG_N = NFLAG_8(res);\r |
731 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
732 | FLAG_V = *r_dst & res;\r |
733 | \r |
734 | res = MASK_OUT_ABOVE_8(res);\r |
735 | FLAG_Z |= res;\r |
736 | \r |
737 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
738 | }\r |
739 | \r |
740 | \r |
741 | void m68k_op_negx_8_ai(void)\r |
742 | {\r |
743 | uint ea = EA_AY_AI_8();\r |
744 | uint src = m68ki_read_8(ea);\r |
745 | uint res = 0 - src - XFLAG_AS_1();\r |
746 | \r |
747 | FLAG_N = NFLAG_8(res);\r |
748 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
749 | FLAG_V = src & res;\r |
750 | \r |
751 | res = MASK_OUT_ABOVE_8(res);\r |
752 | FLAG_Z |= res;\r |
753 | \r |
754 | m68ki_write_8(ea, res);\r |
755 | }\r |
756 | \r |
757 | \r |
758 | void m68k_op_negx_8_pi(void)\r |
759 | {\r |
760 | uint ea = EA_AY_PI_8();\r |
761 | uint src = m68ki_read_8(ea);\r |
762 | uint res = 0 - src - XFLAG_AS_1();\r |
763 | \r |
764 | FLAG_N = NFLAG_8(res);\r |
765 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
766 | FLAG_V = src & res;\r |
767 | \r |
768 | res = MASK_OUT_ABOVE_8(res);\r |
769 | FLAG_Z |= res;\r |
770 | \r |
771 | m68ki_write_8(ea, res);\r |
772 | }\r |
773 | \r |
774 | \r |
775 | void m68k_op_negx_8_pi7(void)\r |
776 | {\r |
777 | uint ea = EA_A7_PI_8();\r |
778 | uint src = m68ki_read_8(ea);\r |
779 | uint res = 0 - src - XFLAG_AS_1();\r |
780 | \r |
781 | FLAG_N = NFLAG_8(res);\r |
782 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
783 | FLAG_V = src & res;\r |
784 | \r |
785 | res = MASK_OUT_ABOVE_8(res);\r |
786 | FLAG_Z |= res;\r |
787 | \r |
788 | m68ki_write_8(ea, res);\r |
789 | }\r |
790 | \r |
791 | \r |
792 | void m68k_op_negx_8_pd(void)\r |
793 | {\r |
794 | uint ea = EA_AY_PD_8();\r |
795 | uint src = m68ki_read_8(ea);\r |
796 | uint res = 0 - src - XFLAG_AS_1();\r |
797 | \r |
798 | FLAG_N = NFLAG_8(res);\r |
799 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
800 | FLAG_V = src & res;\r |
801 | \r |
802 | res = MASK_OUT_ABOVE_8(res);\r |
803 | FLAG_Z |= res;\r |
804 | \r |
805 | m68ki_write_8(ea, res);\r |
806 | }\r |
807 | \r |
808 | \r |
809 | void m68k_op_negx_8_pd7(void)\r |
810 | {\r |
811 | uint ea = EA_A7_PD_8();\r |
812 | uint src = m68ki_read_8(ea);\r |
813 | uint res = 0 - src - XFLAG_AS_1();\r |
814 | \r |
815 | FLAG_N = NFLAG_8(res);\r |
816 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
817 | FLAG_V = src & res;\r |
818 | \r |
819 | res = MASK_OUT_ABOVE_8(res);\r |
820 | FLAG_Z |= res;\r |
821 | \r |
822 | m68ki_write_8(ea, res);\r |
823 | }\r |
824 | \r |
825 | \r |
826 | void m68k_op_negx_8_di(void)\r |
827 | {\r |
828 | uint ea = EA_AY_DI_8();\r |
829 | uint src = m68ki_read_8(ea);\r |
830 | uint res = 0 - src - XFLAG_AS_1();\r |
831 | \r |
832 | FLAG_N = NFLAG_8(res);\r |
833 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
834 | FLAG_V = src & res;\r |
835 | \r |
836 | res = MASK_OUT_ABOVE_8(res);\r |
837 | FLAG_Z |= res;\r |
838 | \r |
839 | m68ki_write_8(ea, res);\r |
840 | }\r |
841 | \r |
842 | \r |
843 | void m68k_op_negx_8_ix(void)\r |
844 | {\r |
845 | uint ea = EA_AY_IX_8();\r |
846 | uint src = m68ki_read_8(ea);\r |
847 | uint res = 0 - src - XFLAG_AS_1();\r |
848 | \r |
849 | FLAG_N = NFLAG_8(res);\r |
850 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
851 | FLAG_V = src & res;\r |
852 | \r |
853 | res = MASK_OUT_ABOVE_8(res);\r |
854 | FLAG_Z |= res;\r |
855 | \r |
856 | m68ki_write_8(ea, res);\r |
857 | }\r |
858 | \r |
859 | \r |
860 | void m68k_op_negx_8_aw(void)\r |
861 | {\r |
862 | uint ea = EA_AW_8();\r |
863 | uint src = m68ki_read_8(ea);\r |
864 | uint res = 0 - src - XFLAG_AS_1();\r |
865 | \r |
866 | FLAG_N = NFLAG_8(res);\r |
867 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
868 | FLAG_V = src & res;\r |
869 | \r |
870 | res = MASK_OUT_ABOVE_8(res);\r |
871 | FLAG_Z |= res;\r |
872 | \r |
873 | m68ki_write_8(ea, res);\r |
874 | }\r |
875 | \r |
876 | \r |
877 | void m68k_op_negx_8_al(void)\r |
878 | {\r |
879 | uint ea = EA_AL_8();\r |
880 | uint src = m68ki_read_8(ea);\r |
881 | uint res = 0 - src - XFLAG_AS_1();\r |
882 | \r |
883 | FLAG_N = NFLAG_8(res);\r |
884 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
885 | FLAG_V = src & res;\r |
886 | \r |
887 | res = MASK_OUT_ABOVE_8(res);\r |
888 | FLAG_Z |= res;\r |
889 | \r |
890 | m68ki_write_8(ea, res);\r |
891 | }\r |
892 | \r |
893 | \r |
894 | void m68k_op_negx_16_d(void)\r |
895 | {\r |
896 | uint* r_dst = &DY;\r |
897 | uint res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1();\r |
898 | \r |
899 | FLAG_N = NFLAG_16(res);\r |
900 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
901 | FLAG_V = (*r_dst & res)>>8;\r |
902 | \r |
903 | res = MASK_OUT_ABOVE_16(res);\r |
904 | FLAG_Z |= res;\r |
905 | \r |
906 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
907 | }\r |
908 | \r |
909 | \r |
910 | void m68k_op_negx_16_ai(void)\r |
911 | {\r |
912 | uint ea = EA_AY_AI_16();\r |
913 | uint src = m68ki_read_16(ea);\r |
914 | uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();\r |
915 | \r |
916 | FLAG_N = NFLAG_16(res);\r |
917 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
918 | FLAG_V = (src & res)>>8;\r |
919 | \r |
920 | res = MASK_OUT_ABOVE_16(res);\r |
921 | FLAG_Z |= res;\r |
922 | \r |
923 | m68ki_write_16(ea, res);\r |
924 | }\r |
925 | \r |
926 | \r |
927 | void m68k_op_negx_16_pi(void)\r |
928 | {\r |
929 | uint ea = EA_AY_PI_16();\r |
930 | uint src = m68ki_read_16(ea);\r |
931 | uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();\r |
932 | \r |
933 | FLAG_N = NFLAG_16(res);\r |
934 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
935 | FLAG_V = (src & res)>>8;\r |
936 | \r |
937 | res = MASK_OUT_ABOVE_16(res);\r |
938 | FLAG_Z |= res;\r |
939 | \r |
940 | m68ki_write_16(ea, res);\r |
941 | }\r |
942 | \r |
943 | \r |
944 | void m68k_op_negx_16_pd(void)\r |
945 | {\r |
946 | uint ea = EA_AY_PD_16();\r |
947 | uint src = m68ki_read_16(ea);\r |
948 | uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();\r |
949 | \r |
950 | FLAG_N = NFLAG_16(res);\r |
951 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
952 | FLAG_V = (src & res)>>8;\r |
953 | \r |
954 | res = MASK_OUT_ABOVE_16(res);\r |
955 | FLAG_Z |= res;\r |
956 | \r |
957 | m68ki_write_16(ea, res);\r |
958 | }\r |
959 | \r |
960 | \r |
961 | void m68k_op_negx_16_di(void)\r |
962 | {\r |
963 | uint ea = EA_AY_DI_16();\r |
964 | uint src = m68ki_read_16(ea);\r |
965 | uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();\r |
966 | \r |
967 | FLAG_N = NFLAG_16(res);\r |
968 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
969 | FLAG_V = (src & res)>>8;\r |
970 | \r |
971 | res = MASK_OUT_ABOVE_16(res);\r |
972 | FLAG_Z |= res;\r |
973 | \r |
974 | m68ki_write_16(ea, res);\r |
975 | }\r |
976 | \r |
977 | \r |
978 | void m68k_op_negx_16_ix(void)\r |
979 | {\r |
980 | uint ea = EA_AY_IX_16();\r |
981 | uint src = m68ki_read_16(ea);\r |
982 | uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();\r |
983 | \r |
984 | FLAG_N = NFLAG_16(res);\r |
985 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
986 | FLAG_V = (src & res)>>8;\r |
987 | \r |
988 | res = MASK_OUT_ABOVE_16(res);\r |
989 | FLAG_Z |= res;\r |
990 | \r |
991 | m68ki_write_16(ea, res);\r |
992 | }\r |
993 | \r |
994 | \r |
995 | void m68k_op_negx_16_aw(void)\r |
996 | {\r |
997 | uint ea = EA_AW_16();\r |
998 | uint src = m68ki_read_16(ea);\r |
999 | uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();\r |
1000 | \r |
1001 | FLAG_N = NFLAG_16(res);\r |
1002 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1003 | FLAG_V = (src & res)>>8;\r |
1004 | \r |
1005 | res = MASK_OUT_ABOVE_16(res);\r |
1006 | FLAG_Z |= res;\r |
1007 | \r |
1008 | m68ki_write_16(ea, res);\r |
1009 | }\r |
1010 | \r |
1011 | \r |
1012 | void m68k_op_negx_16_al(void)\r |
1013 | {\r |
1014 | uint ea = EA_AL_16();\r |
1015 | uint src = m68ki_read_16(ea);\r |
1016 | uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();\r |
1017 | \r |
1018 | FLAG_N = NFLAG_16(res);\r |
1019 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
1020 | FLAG_V = (src & res)>>8;\r |
1021 | \r |
1022 | res = MASK_OUT_ABOVE_16(res);\r |
1023 | FLAG_Z |= res;\r |
1024 | \r |
1025 | m68ki_write_16(ea, res);\r |
1026 | }\r |
1027 | \r |
1028 | \r |
1029 | void m68k_op_negx_32_d(void)\r |
1030 | {\r |
1031 | uint* r_dst = &DY;\r |
1032 | uint res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1();\r |
1033 | \r |
1034 | FLAG_N = NFLAG_32(res);\r |
1035 | FLAG_X = FLAG_C = CFLAG_SUB_32(*r_dst, 0, res);\r |
1036 | FLAG_V = (*r_dst & res)>>24;\r |
1037 | \r |
1038 | res = MASK_OUT_ABOVE_32(res);\r |
1039 | FLAG_Z |= res;\r |
1040 | \r |
1041 | *r_dst = res;\r |
1042 | }\r |
1043 | \r |
1044 | \r |
1045 | void m68k_op_negx_32_ai(void)\r |
1046 | {\r |
1047 | uint ea = EA_AY_AI_32();\r |
1048 | uint src = m68ki_read_32(ea);\r |
1049 | uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();\r |
1050 | \r |
1051 | FLAG_N = NFLAG_32(res);\r |
1052 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);\r |
1053 | FLAG_V = (src & res)>>24;\r |
1054 | \r |
1055 | res = MASK_OUT_ABOVE_32(res);\r |
1056 | FLAG_Z |= res;\r |
1057 | \r |
1058 | m68ki_write_32(ea, res);\r |
1059 | }\r |
1060 | \r |
1061 | \r |
1062 | void m68k_op_negx_32_pi(void)\r |
1063 | {\r |
1064 | uint ea = EA_AY_PI_32();\r |
1065 | uint src = m68ki_read_32(ea);\r |
1066 | uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();\r |
1067 | \r |
1068 | FLAG_N = NFLAG_32(res);\r |
1069 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);\r |
1070 | FLAG_V = (src & res)>>24;\r |
1071 | \r |
1072 | res = MASK_OUT_ABOVE_32(res);\r |
1073 | FLAG_Z |= res;\r |
1074 | \r |
1075 | m68ki_write_32(ea, res);\r |
1076 | }\r |
1077 | \r |
1078 | \r |
1079 | void m68k_op_negx_32_pd(void)\r |
1080 | {\r |
1081 | uint ea = EA_AY_PD_32();\r |
1082 | uint src = m68ki_read_32(ea);\r |
1083 | uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();\r |
1084 | \r |
1085 | FLAG_N = NFLAG_32(res);\r |
1086 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);\r |
1087 | FLAG_V = (src & res)>>24;\r |
1088 | \r |
1089 | res = MASK_OUT_ABOVE_32(res);\r |
1090 | FLAG_Z |= res;\r |
1091 | \r |
1092 | m68ki_write_32(ea, res);\r |
1093 | }\r |
1094 | \r |
1095 | \r |
1096 | void m68k_op_negx_32_di(void)\r |
1097 | {\r |
1098 | uint ea = EA_AY_DI_32();\r |
1099 | uint src = m68ki_read_32(ea);\r |
1100 | uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();\r |
1101 | \r |
1102 | FLAG_N = NFLAG_32(res);\r |
1103 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);\r |
1104 | FLAG_V = (src & res)>>24;\r |
1105 | \r |
1106 | res = MASK_OUT_ABOVE_32(res);\r |
1107 | FLAG_Z |= res;\r |
1108 | \r |
1109 | m68ki_write_32(ea, res);\r |
1110 | }\r |
1111 | \r |
1112 | \r |
1113 | void m68k_op_negx_32_ix(void)\r |
1114 | {\r |
1115 | uint ea = EA_AY_IX_32();\r |
1116 | uint src = m68ki_read_32(ea);\r |
1117 | uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();\r |
1118 | \r |
1119 | FLAG_N = NFLAG_32(res);\r |
1120 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);\r |
1121 | FLAG_V = (src & res)>>24;\r |
1122 | \r |
1123 | res = MASK_OUT_ABOVE_32(res);\r |
1124 | FLAG_Z |= res;\r |
1125 | \r |
1126 | m68ki_write_32(ea, res);\r |
1127 | }\r |
1128 | \r |
1129 | \r |
1130 | void m68k_op_negx_32_aw(void)\r |
1131 | {\r |
1132 | uint ea = EA_AW_32();\r |
1133 | uint src = m68ki_read_32(ea);\r |
1134 | uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();\r |
1135 | \r |
1136 | FLAG_N = NFLAG_32(res);\r |
1137 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);\r |
1138 | FLAG_V = (src & res)>>24;\r |
1139 | \r |
1140 | res = MASK_OUT_ABOVE_32(res);\r |
1141 | FLAG_Z |= res;\r |
1142 | \r |
1143 | m68ki_write_32(ea, res);\r |
1144 | }\r |
1145 | \r |
1146 | \r |
1147 | void m68k_op_negx_32_al(void)\r |
1148 | {\r |
1149 | uint ea = EA_AL_32();\r |
1150 | uint src = m68ki_read_32(ea);\r |
1151 | uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();\r |
1152 | \r |
1153 | FLAG_N = NFLAG_32(res);\r |
1154 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);\r |
1155 | FLAG_V = (src & res)>>24;\r |
1156 | \r |
1157 | res = MASK_OUT_ABOVE_32(res);\r |
1158 | FLAG_Z |= res;\r |
1159 | \r |
1160 | m68ki_write_32(ea, res);\r |
1161 | }\r |
1162 | \r |
1163 | \r |
1164 | void m68k_op_nop(void)\r |
1165 | {\r |
1166 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
1167 | }\r |
1168 | \r |
1169 | \r |
1170 | void m68k_op_not_8_d(void)\r |
1171 | {\r |
1172 | uint* r_dst = &DY;\r |
1173 | uint res = MASK_OUT_ABOVE_8(~*r_dst);\r |
1174 | \r |
1175 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
1176 | \r |
1177 | FLAG_N = NFLAG_8(res);\r |
1178 | FLAG_Z = res;\r |
1179 | FLAG_C = CFLAG_CLEAR;\r |
1180 | FLAG_V = VFLAG_CLEAR;\r |
1181 | }\r |
1182 | \r |
1183 | \r |
1184 | void m68k_op_not_8_ai(void)\r |
1185 | {\r |
1186 | uint ea = EA_AY_AI_8();\r |
1187 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));\r |
1188 | \r |
1189 | m68ki_write_8(ea, res);\r |
1190 | \r |
1191 | FLAG_N = NFLAG_8(res);\r |
1192 | FLAG_Z = res;\r |
1193 | FLAG_C = CFLAG_CLEAR;\r |
1194 | FLAG_V = VFLAG_CLEAR;\r |
1195 | }\r |
1196 | \r |
1197 | \r |
1198 | void m68k_op_not_8_pi(void)\r |
1199 | {\r |
1200 | uint ea = EA_AY_PI_8();\r |
1201 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));\r |
1202 | \r |
1203 | m68ki_write_8(ea, res);\r |
1204 | \r |
1205 | FLAG_N = NFLAG_8(res);\r |
1206 | FLAG_Z = res;\r |
1207 | FLAG_C = CFLAG_CLEAR;\r |
1208 | FLAG_V = VFLAG_CLEAR;\r |
1209 | }\r |
1210 | \r |
1211 | \r |
1212 | void m68k_op_not_8_pi7(void)\r |
1213 | {\r |
1214 | uint ea = EA_A7_PI_8();\r |
1215 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));\r |
1216 | \r |
1217 | m68ki_write_8(ea, res);\r |
1218 | \r |
1219 | FLAG_N = NFLAG_8(res);\r |
1220 | FLAG_Z = res;\r |
1221 | FLAG_C = CFLAG_CLEAR;\r |
1222 | FLAG_V = VFLAG_CLEAR;\r |
1223 | }\r |
1224 | \r |
1225 | \r |
1226 | void m68k_op_not_8_pd(void)\r |
1227 | {\r |
1228 | uint ea = EA_AY_PD_8();\r |
1229 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));\r |
1230 | \r |
1231 | m68ki_write_8(ea, res);\r |
1232 | \r |
1233 | FLAG_N = NFLAG_8(res);\r |
1234 | FLAG_Z = res;\r |
1235 | FLAG_C = CFLAG_CLEAR;\r |
1236 | FLAG_V = VFLAG_CLEAR;\r |
1237 | }\r |
1238 | \r |
1239 | \r |
1240 | void m68k_op_not_8_pd7(void)\r |
1241 | {\r |
1242 | uint ea = EA_A7_PD_8();\r |
1243 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));\r |
1244 | \r |
1245 | m68ki_write_8(ea, res);\r |
1246 | \r |
1247 | FLAG_N = NFLAG_8(res);\r |
1248 | FLAG_Z = res;\r |
1249 | FLAG_C = CFLAG_CLEAR;\r |
1250 | FLAG_V = VFLAG_CLEAR;\r |
1251 | }\r |
1252 | \r |
1253 | \r |
1254 | void m68k_op_not_8_di(void)\r |
1255 | {\r |
1256 | uint ea = EA_AY_DI_8();\r |
1257 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));\r |
1258 | \r |
1259 | m68ki_write_8(ea, res);\r |
1260 | \r |
1261 | FLAG_N = NFLAG_8(res);\r |
1262 | FLAG_Z = res;\r |
1263 | FLAG_C = CFLAG_CLEAR;\r |
1264 | FLAG_V = VFLAG_CLEAR;\r |
1265 | }\r |
1266 | \r |
1267 | \r |
1268 | void m68k_op_not_8_ix(void)\r |
1269 | {\r |
1270 | uint ea = EA_AY_IX_8();\r |
1271 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));\r |
1272 | \r |
1273 | m68ki_write_8(ea, res);\r |
1274 | \r |
1275 | FLAG_N = NFLAG_8(res);\r |
1276 | FLAG_Z = res;\r |
1277 | FLAG_C = CFLAG_CLEAR;\r |
1278 | FLAG_V = VFLAG_CLEAR;\r |
1279 | }\r |
1280 | \r |
1281 | \r |
1282 | void m68k_op_not_8_aw(void)\r |
1283 | {\r |
1284 | uint ea = EA_AW_8();\r |
1285 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));\r |
1286 | \r |
1287 | m68ki_write_8(ea, res);\r |
1288 | \r |
1289 | FLAG_N = NFLAG_8(res);\r |
1290 | FLAG_Z = res;\r |
1291 | FLAG_C = CFLAG_CLEAR;\r |
1292 | FLAG_V = VFLAG_CLEAR;\r |
1293 | }\r |
1294 | \r |
1295 | \r |
1296 | void m68k_op_not_8_al(void)\r |
1297 | {\r |
1298 | uint ea = EA_AL_8();\r |
1299 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));\r |
1300 | \r |
1301 | m68ki_write_8(ea, res);\r |
1302 | \r |
1303 | FLAG_N = NFLAG_8(res);\r |
1304 | FLAG_Z = res;\r |
1305 | FLAG_C = CFLAG_CLEAR;\r |
1306 | FLAG_V = VFLAG_CLEAR;\r |
1307 | }\r |
1308 | \r |
1309 | \r |
1310 | void m68k_op_not_16_d(void)\r |
1311 | {\r |
1312 | uint* r_dst = &DY;\r |
1313 | uint res = MASK_OUT_ABOVE_16(~*r_dst);\r |
1314 | \r |
1315 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
1316 | \r |
1317 | FLAG_N = NFLAG_16(res);\r |
1318 | FLAG_Z = res;\r |
1319 | FLAG_C = CFLAG_CLEAR;\r |
1320 | FLAG_V = VFLAG_CLEAR;\r |
1321 | }\r |
1322 | \r |
1323 | \r |
1324 | void m68k_op_not_16_ai(void)\r |
1325 | {\r |
1326 | uint ea = EA_AY_AI_16();\r |
1327 | uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));\r |
1328 | \r |
1329 | m68ki_write_16(ea, res);\r |
1330 | \r |
1331 | FLAG_N = NFLAG_16(res);\r |
1332 | FLAG_Z = res;\r |
1333 | FLAG_C = CFLAG_CLEAR;\r |
1334 | FLAG_V = VFLAG_CLEAR;\r |
1335 | }\r |
1336 | \r |
1337 | \r |
1338 | void m68k_op_not_16_pi(void)\r |
1339 | {\r |
1340 | uint ea = EA_AY_PI_16();\r |
1341 | uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));\r |
1342 | \r |
1343 | m68ki_write_16(ea, res);\r |
1344 | \r |
1345 | FLAG_N = NFLAG_16(res);\r |
1346 | FLAG_Z = res;\r |
1347 | FLAG_C = CFLAG_CLEAR;\r |
1348 | FLAG_V = VFLAG_CLEAR;\r |
1349 | }\r |
1350 | \r |
1351 | \r |
1352 | void m68k_op_not_16_pd(void)\r |
1353 | {\r |
1354 | uint ea = EA_AY_PD_16();\r |
1355 | uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));\r |
1356 | \r |
1357 | m68ki_write_16(ea, res);\r |
1358 | \r |
1359 | FLAG_N = NFLAG_16(res);\r |
1360 | FLAG_Z = res;\r |
1361 | FLAG_C = CFLAG_CLEAR;\r |
1362 | FLAG_V = VFLAG_CLEAR;\r |
1363 | }\r |
1364 | \r |
1365 | \r |
1366 | void m68k_op_not_16_di(void)\r |
1367 | {\r |
1368 | uint ea = EA_AY_DI_16();\r |
1369 | uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));\r |
1370 | \r |
1371 | m68ki_write_16(ea, res);\r |
1372 | \r |
1373 | FLAG_N = NFLAG_16(res);\r |
1374 | FLAG_Z = res;\r |
1375 | FLAG_C = CFLAG_CLEAR;\r |
1376 | FLAG_V = VFLAG_CLEAR;\r |
1377 | }\r |
1378 | \r |
1379 | \r |
1380 | void m68k_op_not_16_ix(void)\r |
1381 | {\r |
1382 | uint ea = EA_AY_IX_16();\r |
1383 | uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));\r |
1384 | \r |
1385 | m68ki_write_16(ea, res);\r |
1386 | \r |
1387 | FLAG_N = NFLAG_16(res);\r |
1388 | FLAG_Z = res;\r |
1389 | FLAG_C = CFLAG_CLEAR;\r |
1390 | FLAG_V = VFLAG_CLEAR;\r |
1391 | }\r |
1392 | \r |
1393 | \r |
1394 | void m68k_op_not_16_aw(void)\r |
1395 | {\r |
1396 | uint ea = EA_AW_16();\r |
1397 | uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));\r |
1398 | \r |
1399 | m68ki_write_16(ea, res);\r |
1400 | \r |
1401 | FLAG_N = NFLAG_16(res);\r |
1402 | FLAG_Z = res;\r |
1403 | FLAG_C = CFLAG_CLEAR;\r |
1404 | FLAG_V = VFLAG_CLEAR;\r |
1405 | }\r |
1406 | \r |
1407 | \r |
1408 | void m68k_op_not_16_al(void)\r |
1409 | {\r |
1410 | uint ea = EA_AL_16();\r |
1411 | uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));\r |
1412 | \r |
1413 | m68ki_write_16(ea, res);\r |
1414 | \r |
1415 | FLAG_N = NFLAG_16(res);\r |
1416 | FLAG_Z = res;\r |
1417 | FLAG_C = CFLAG_CLEAR;\r |
1418 | FLAG_V = VFLAG_CLEAR;\r |
1419 | }\r |
1420 | \r |
1421 | \r |
1422 | void m68k_op_not_32_d(void)\r |
1423 | {\r |
1424 | uint* r_dst = &DY;\r |
1425 | uint res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst);\r |
1426 | \r |
1427 | FLAG_N = NFLAG_32(res);\r |
1428 | FLAG_Z = res;\r |
1429 | FLAG_C = CFLAG_CLEAR;\r |
1430 | FLAG_V = VFLAG_CLEAR;\r |
1431 | }\r |
1432 | \r |
1433 | \r |
1434 | void m68k_op_not_32_ai(void)\r |
1435 | {\r |
1436 | uint ea = EA_AY_AI_32();\r |
1437 | uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));\r |
1438 | \r |
1439 | m68ki_write_32(ea, res);\r |
1440 | \r |
1441 | FLAG_N = NFLAG_32(res);\r |
1442 | FLAG_Z = res;\r |
1443 | FLAG_C = CFLAG_CLEAR;\r |
1444 | FLAG_V = VFLAG_CLEAR;\r |
1445 | }\r |
1446 | \r |
1447 | \r |
1448 | void m68k_op_not_32_pi(void)\r |
1449 | {\r |
1450 | uint ea = EA_AY_PI_32();\r |
1451 | uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));\r |
1452 | \r |
1453 | m68ki_write_32(ea, res);\r |
1454 | \r |
1455 | FLAG_N = NFLAG_32(res);\r |
1456 | FLAG_Z = res;\r |
1457 | FLAG_C = CFLAG_CLEAR;\r |
1458 | FLAG_V = VFLAG_CLEAR;\r |
1459 | }\r |
1460 | \r |
1461 | \r |
1462 | void m68k_op_not_32_pd(void)\r |
1463 | {\r |
1464 | uint ea = EA_AY_PD_32();\r |
1465 | uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));\r |
1466 | \r |
1467 | m68ki_write_32(ea, res);\r |
1468 | \r |
1469 | FLAG_N = NFLAG_32(res);\r |
1470 | FLAG_Z = res;\r |
1471 | FLAG_C = CFLAG_CLEAR;\r |
1472 | FLAG_V = VFLAG_CLEAR;\r |
1473 | }\r |
1474 | \r |
1475 | \r |
1476 | void m68k_op_not_32_di(void)\r |
1477 | {\r |
1478 | uint ea = EA_AY_DI_32();\r |
1479 | uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));\r |
1480 | \r |
1481 | m68ki_write_32(ea, res);\r |
1482 | \r |
1483 | FLAG_N = NFLAG_32(res);\r |
1484 | FLAG_Z = res;\r |
1485 | FLAG_C = CFLAG_CLEAR;\r |
1486 | FLAG_V = VFLAG_CLEAR;\r |
1487 | }\r |
1488 | \r |
1489 | \r |
1490 | void m68k_op_not_32_ix(void)\r |
1491 | {\r |
1492 | uint ea = EA_AY_IX_32();\r |
1493 | uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));\r |
1494 | \r |
1495 | m68ki_write_32(ea, res);\r |
1496 | \r |
1497 | FLAG_N = NFLAG_32(res);\r |
1498 | FLAG_Z = res;\r |
1499 | FLAG_C = CFLAG_CLEAR;\r |
1500 | FLAG_V = VFLAG_CLEAR;\r |
1501 | }\r |
1502 | \r |
1503 | \r |
1504 | void m68k_op_not_32_aw(void)\r |
1505 | {\r |
1506 | uint ea = EA_AW_32();\r |
1507 | uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));\r |
1508 | \r |
1509 | m68ki_write_32(ea, res);\r |
1510 | \r |
1511 | FLAG_N = NFLAG_32(res);\r |
1512 | FLAG_Z = res;\r |
1513 | FLAG_C = CFLAG_CLEAR;\r |
1514 | FLAG_V = VFLAG_CLEAR;\r |
1515 | }\r |
1516 | \r |
1517 | \r |
1518 | void m68k_op_not_32_al(void)\r |
1519 | {\r |
1520 | uint ea = EA_AL_32();\r |
1521 | uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));\r |
1522 | \r |
1523 | m68ki_write_32(ea, res);\r |
1524 | \r |
1525 | FLAG_N = NFLAG_32(res);\r |
1526 | FLAG_Z = res;\r |
1527 | FLAG_C = CFLAG_CLEAR;\r |
1528 | FLAG_V = VFLAG_CLEAR;\r |
1529 | }\r |
1530 | \r |
1531 | \r |
1532 | void m68k_op_or_8_er_d(void)\r |
1533 | {\r |
1534 | uint res = MASK_OUT_ABOVE_8((DX |= MASK_OUT_ABOVE_8(DY)));\r |
1535 | \r |
1536 | FLAG_N = NFLAG_8(res);\r |
1537 | FLAG_Z = res;\r |
1538 | FLAG_C = CFLAG_CLEAR;\r |
1539 | FLAG_V = VFLAG_CLEAR;\r |
1540 | }\r |
1541 | \r |
1542 | \r |
1543 | void m68k_op_or_8_er_ai(void)\r |
1544 | {\r |
1545 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_AI_8()));\r |
1546 | \r |
1547 | FLAG_N = NFLAG_8(res);\r |
1548 | FLAG_Z = res;\r |
1549 | FLAG_C = CFLAG_CLEAR;\r |
1550 | FLAG_V = VFLAG_CLEAR;\r |
1551 | }\r |
1552 | \r |
1553 | \r |
1554 | void m68k_op_or_8_er_pi(void)\r |
1555 | {\r |
1556 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_PI_8()));\r |
1557 | \r |
1558 | FLAG_N = NFLAG_8(res);\r |
1559 | FLAG_Z = res;\r |
1560 | FLAG_C = CFLAG_CLEAR;\r |
1561 | FLAG_V = VFLAG_CLEAR;\r |
1562 | }\r |
1563 | \r |
1564 | \r |
1565 | void m68k_op_or_8_er_pi7(void)\r |
1566 | {\r |
1567 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_A7_PI_8()));\r |
1568 | \r |
1569 | FLAG_N = NFLAG_8(res);\r |
1570 | FLAG_Z = res;\r |
1571 | FLAG_C = CFLAG_CLEAR;\r |
1572 | FLAG_V = VFLAG_CLEAR;\r |
1573 | }\r |
1574 | \r |
1575 | \r |
1576 | void m68k_op_or_8_er_pd(void)\r |
1577 | {\r |
1578 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_PD_8()));\r |
1579 | \r |
1580 | FLAG_N = NFLAG_8(res);\r |
1581 | FLAG_Z = res;\r |
1582 | FLAG_C = CFLAG_CLEAR;\r |
1583 | FLAG_V = VFLAG_CLEAR;\r |
1584 | }\r |
1585 | \r |
1586 | \r |
1587 | void m68k_op_or_8_er_pd7(void)\r |
1588 | {\r |
1589 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_A7_PD_8()));\r |
1590 | \r |
1591 | FLAG_N = NFLAG_8(res);\r |
1592 | FLAG_Z = res;\r |
1593 | FLAG_C = CFLAG_CLEAR;\r |
1594 | FLAG_V = VFLAG_CLEAR;\r |
1595 | }\r |
1596 | \r |
1597 | \r |
1598 | void m68k_op_or_8_er_di(void)\r |
1599 | {\r |
1600 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_DI_8()));\r |
1601 | \r |
1602 | FLAG_N = NFLAG_8(res);\r |
1603 | FLAG_Z = res;\r |
1604 | FLAG_C = CFLAG_CLEAR;\r |
1605 | FLAG_V = VFLAG_CLEAR;\r |
1606 | }\r |
1607 | \r |
1608 | \r |
1609 | void m68k_op_or_8_er_ix(void)\r |
1610 | {\r |
1611 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_IX_8()));\r |
1612 | \r |
1613 | FLAG_N = NFLAG_8(res);\r |
1614 | FLAG_Z = res;\r |
1615 | FLAG_C = CFLAG_CLEAR;\r |
1616 | FLAG_V = VFLAG_CLEAR;\r |
1617 | }\r |
1618 | \r |
1619 | \r |
1620 | void m68k_op_or_8_er_aw(void)\r |
1621 | {\r |
1622 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_AW_8()));\r |
1623 | \r |
1624 | FLAG_N = NFLAG_8(res);\r |
1625 | FLAG_Z = res;\r |
1626 | FLAG_C = CFLAG_CLEAR;\r |
1627 | FLAG_V = VFLAG_CLEAR;\r |
1628 | }\r |
1629 | \r |
1630 | \r |
1631 | void m68k_op_or_8_er_al(void)\r |
1632 | {\r |
1633 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_AL_8()));\r |
1634 | \r |
1635 | FLAG_N = NFLAG_8(res);\r |
1636 | FLAG_Z = res;\r |
1637 | FLAG_C = CFLAG_CLEAR;\r |
1638 | FLAG_V = VFLAG_CLEAR;\r |
1639 | }\r |
1640 | \r |
1641 | \r |
1642 | void m68k_op_or_8_er_pcdi(void)\r |
1643 | {\r |
1644 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_PCDI_8()));\r |
1645 | \r |
1646 | FLAG_N = NFLAG_8(res);\r |
1647 | FLAG_Z = res;\r |
1648 | FLAG_C = CFLAG_CLEAR;\r |
1649 | FLAG_V = VFLAG_CLEAR;\r |
1650 | }\r |
1651 | \r |
1652 | \r |
1653 | void m68k_op_or_8_er_pcix(void)\r |
1654 | {\r |
1655 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_PCIX_8()));\r |
1656 | \r |
1657 | FLAG_N = NFLAG_8(res);\r |
1658 | FLAG_Z = res;\r |
1659 | FLAG_C = CFLAG_CLEAR;\r |
1660 | FLAG_V = VFLAG_CLEAR;\r |
1661 | }\r |
1662 | \r |
1663 | \r |
1664 | void m68k_op_or_8_er_i(void)\r |
1665 | {\r |
1666 | uint res = MASK_OUT_ABOVE_8((DX |= OPER_I_8()));\r |
1667 | \r |
1668 | FLAG_N = NFLAG_8(res);\r |
1669 | FLAG_Z = res;\r |
1670 | FLAG_C = CFLAG_CLEAR;\r |
1671 | FLAG_V = VFLAG_CLEAR;\r |
1672 | }\r |
1673 | \r |
1674 | \r |
1675 | void m68k_op_or_16_er_d(void)\r |
1676 | {\r |
1677 | uint res = MASK_OUT_ABOVE_16((DX |= MASK_OUT_ABOVE_16(DY)));\r |
1678 | \r |
1679 | FLAG_N = NFLAG_16(res);\r |
1680 | FLAG_Z = res;\r |
1681 | FLAG_C = CFLAG_CLEAR;\r |
1682 | FLAG_V = VFLAG_CLEAR;\r |
1683 | }\r |
1684 | \r |
1685 | \r |
1686 | void m68k_op_or_16_er_ai(void)\r |
1687 | {\r |
1688 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_AI_16()));\r |
1689 | \r |
1690 | FLAG_N = NFLAG_16(res);\r |
1691 | FLAG_Z = res;\r |
1692 | FLAG_C = CFLAG_CLEAR;\r |
1693 | FLAG_V = VFLAG_CLEAR;\r |
1694 | }\r |
1695 | \r |
1696 | \r |
1697 | void m68k_op_or_16_er_pi(void)\r |
1698 | {\r |
1699 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_PI_16()));\r |
1700 | \r |
1701 | FLAG_N = NFLAG_16(res);\r |
1702 | FLAG_Z = res;\r |
1703 | FLAG_C = CFLAG_CLEAR;\r |
1704 | FLAG_V = VFLAG_CLEAR;\r |
1705 | }\r |
1706 | \r |
1707 | \r |
1708 | void m68k_op_or_16_er_pd(void)\r |
1709 | {\r |
1710 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_PD_16()));\r |
1711 | \r |
1712 | FLAG_N = NFLAG_16(res);\r |
1713 | FLAG_Z = res;\r |
1714 | FLAG_C = CFLAG_CLEAR;\r |
1715 | FLAG_V = VFLAG_CLEAR;\r |
1716 | }\r |
1717 | \r |
1718 | \r |
1719 | void m68k_op_or_16_er_di(void)\r |
1720 | {\r |
1721 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_DI_16()));\r |
1722 | \r |
1723 | FLAG_N = NFLAG_16(res);\r |
1724 | FLAG_Z = res;\r |
1725 | FLAG_C = CFLAG_CLEAR;\r |
1726 | FLAG_V = VFLAG_CLEAR;\r |
1727 | }\r |
1728 | \r |
1729 | \r |
1730 | void m68k_op_or_16_er_ix(void)\r |
1731 | {\r |
1732 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_IX_16()));\r |
1733 | \r |
1734 | FLAG_N = NFLAG_16(res);\r |
1735 | FLAG_Z = res;\r |
1736 | FLAG_C = CFLAG_CLEAR;\r |
1737 | FLAG_V = VFLAG_CLEAR;\r |
1738 | }\r |
1739 | \r |
1740 | \r |
1741 | void m68k_op_or_16_er_aw(void)\r |
1742 | {\r |
1743 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_AW_16()));\r |
1744 | \r |
1745 | FLAG_N = NFLAG_16(res);\r |
1746 | FLAG_Z = res;\r |
1747 | FLAG_C = CFLAG_CLEAR;\r |
1748 | FLAG_V = VFLAG_CLEAR;\r |
1749 | }\r |
1750 | \r |
1751 | \r |
1752 | void m68k_op_or_16_er_al(void)\r |
1753 | {\r |
1754 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_AL_16()));\r |
1755 | \r |
1756 | FLAG_N = NFLAG_16(res);\r |
1757 | FLAG_Z = res;\r |
1758 | FLAG_C = CFLAG_CLEAR;\r |
1759 | FLAG_V = VFLAG_CLEAR;\r |
1760 | }\r |
1761 | \r |
1762 | \r |
1763 | void m68k_op_or_16_er_pcdi(void)\r |
1764 | {\r |
1765 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_PCDI_16()));\r |
1766 | \r |
1767 | FLAG_N = NFLAG_16(res);\r |
1768 | FLAG_Z = res;\r |
1769 | FLAG_C = CFLAG_CLEAR;\r |
1770 | FLAG_V = VFLAG_CLEAR;\r |
1771 | }\r |
1772 | \r |
1773 | \r |
1774 | void m68k_op_or_16_er_pcix(void)\r |
1775 | {\r |
1776 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_PCIX_16()));\r |
1777 | \r |
1778 | FLAG_N = NFLAG_16(res);\r |
1779 | FLAG_Z = res;\r |
1780 | FLAG_C = CFLAG_CLEAR;\r |
1781 | FLAG_V = VFLAG_CLEAR;\r |
1782 | }\r |
1783 | \r |
1784 | \r |
1785 | void m68k_op_or_16_er_i(void)\r |
1786 | {\r |
1787 | uint res = MASK_OUT_ABOVE_16((DX |= OPER_I_16()));\r |
1788 | \r |
1789 | FLAG_N = NFLAG_16(res);\r |
1790 | FLAG_Z = res;\r |
1791 | FLAG_C = CFLAG_CLEAR;\r |
1792 | FLAG_V = VFLAG_CLEAR;\r |
1793 | }\r |
1794 | \r |
1795 | \r |
1796 | void m68k_op_or_32_er_d(void)\r |
1797 | {\r |
1798 | uint res = DX |= DY;\r |
1799 | \r |
1800 | FLAG_N = NFLAG_32(res);\r |
1801 | FLAG_Z = res;\r |
1802 | FLAG_C = CFLAG_CLEAR;\r |
1803 | FLAG_V = VFLAG_CLEAR;\r |
1804 | }\r |
1805 | \r |
1806 | \r |
1807 | void m68k_op_or_32_er_ai(void)\r |
1808 | {\r |
1809 | uint res = DX |= OPER_AY_AI_32();\r |
1810 | \r |
1811 | FLAG_N = NFLAG_32(res);\r |
1812 | FLAG_Z = res;\r |
1813 | FLAG_C = CFLAG_CLEAR;\r |
1814 | FLAG_V = VFLAG_CLEAR;\r |
1815 | }\r |
1816 | \r |
1817 | \r |
1818 | void m68k_op_or_32_er_pi(void)\r |
1819 | {\r |
1820 | uint res = DX |= OPER_AY_PI_32();\r |
1821 | \r |
1822 | FLAG_N = NFLAG_32(res);\r |
1823 | FLAG_Z = res;\r |
1824 | FLAG_C = CFLAG_CLEAR;\r |
1825 | FLAG_V = VFLAG_CLEAR;\r |
1826 | }\r |
1827 | \r |
1828 | \r |
1829 | void m68k_op_or_32_er_pd(void)\r |
1830 | {\r |
1831 | uint res = DX |= OPER_AY_PD_32();\r |
1832 | \r |
1833 | FLAG_N = NFLAG_32(res);\r |
1834 | FLAG_Z = res;\r |
1835 | FLAG_C = CFLAG_CLEAR;\r |
1836 | FLAG_V = VFLAG_CLEAR;\r |
1837 | }\r |
1838 | \r |
1839 | \r |
1840 | void m68k_op_or_32_er_di(void)\r |
1841 | {\r |
1842 | uint res = DX |= OPER_AY_DI_32();\r |
1843 | \r |
1844 | FLAG_N = NFLAG_32(res);\r |
1845 | FLAG_Z = res;\r |
1846 | FLAG_C = CFLAG_CLEAR;\r |
1847 | FLAG_V = VFLAG_CLEAR;\r |
1848 | }\r |
1849 | \r |
1850 | \r |
1851 | void m68k_op_or_32_er_ix(void)\r |
1852 | {\r |
1853 | uint res = DX |= OPER_AY_IX_32();\r |
1854 | \r |
1855 | FLAG_N = NFLAG_32(res);\r |
1856 | FLAG_Z = res;\r |
1857 | FLAG_C = CFLAG_CLEAR;\r |
1858 | FLAG_V = VFLAG_CLEAR;\r |
1859 | }\r |
1860 | \r |
1861 | \r |
1862 | void m68k_op_or_32_er_aw(void)\r |
1863 | {\r |
1864 | uint res = DX |= OPER_AW_32();\r |
1865 | \r |
1866 | FLAG_N = NFLAG_32(res);\r |
1867 | FLAG_Z = res;\r |
1868 | FLAG_C = CFLAG_CLEAR;\r |
1869 | FLAG_V = VFLAG_CLEAR;\r |
1870 | }\r |
1871 | \r |
1872 | \r |
1873 | void m68k_op_or_32_er_al(void)\r |
1874 | {\r |
1875 | uint res = DX |= OPER_AL_32();\r |
1876 | \r |
1877 | FLAG_N = NFLAG_32(res);\r |
1878 | FLAG_Z = res;\r |
1879 | FLAG_C = CFLAG_CLEAR;\r |
1880 | FLAG_V = VFLAG_CLEAR;\r |
1881 | }\r |
1882 | \r |
1883 | \r |
1884 | void m68k_op_or_32_er_pcdi(void)\r |
1885 | {\r |
1886 | uint res = DX |= OPER_PCDI_32();\r |
1887 | \r |
1888 | FLAG_N = NFLAG_32(res);\r |
1889 | FLAG_Z = res;\r |
1890 | FLAG_C = CFLAG_CLEAR;\r |
1891 | FLAG_V = VFLAG_CLEAR;\r |
1892 | }\r |
1893 | \r |
1894 | \r |
1895 | void m68k_op_or_32_er_pcix(void)\r |
1896 | {\r |
1897 | uint res = DX |= OPER_PCIX_32();\r |
1898 | \r |
1899 | FLAG_N = NFLAG_32(res);\r |
1900 | FLAG_Z = res;\r |
1901 | FLAG_C = CFLAG_CLEAR;\r |
1902 | FLAG_V = VFLAG_CLEAR;\r |
1903 | }\r |
1904 | \r |
1905 | \r |
1906 | void m68k_op_or_32_er_i(void)\r |
1907 | {\r |
1908 | uint res = DX |= OPER_I_32();\r |
1909 | \r |
1910 | FLAG_N = NFLAG_32(res);\r |
1911 | FLAG_Z = res;\r |
1912 | FLAG_C = CFLAG_CLEAR;\r |
1913 | FLAG_V = VFLAG_CLEAR;\r |
1914 | }\r |
1915 | \r |
1916 | \r |
1917 | void m68k_op_or_8_re_ai(void)\r |
1918 | {\r |
1919 | uint ea = EA_AY_AI_8();\r |
1920 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));\r |
1921 | \r |
1922 | m68ki_write_8(ea, res);\r |
1923 | \r |
1924 | FLAG_N = NFLAG_8(res);\r |
1925 | FLAG_Z = res;\r |
1926 | FLAG_C = CFLAG_CLEAR;\r |
1927 | FLAG_V = VFLAG_CLEAR;\r |
1928 | }\r |
1929 | \r |
1930 | \r |
1931 | void m68k_op_or_8_re_pi(void)\r |
1932 | {\r |
1933 | uint ea = EA_AY_PI_8();\r |
1934 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));\r |
1935 | \r |
1936 | m68ki_write_8(ea, res);\r |
1937 | \r |
1938 | FLAG_N = NFLAG_8(res);\r |
1939 | FLAG_Z = res;\r |
1940 | FLAG_C = CFLAG_CLEAR;\r |
1941 | FLAG_V = VFLAG_CLEAR;\r |
1942 | }\r |
1943 | \r |
1944 | \r |
1945 | void m68k_op_or_8_re_pi7(void)\r |
1946 | {\r |
1947 | uint ea = EA_A7_PI_8();\r |
1948 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));\r |
1949 | \r |
1950 | m68ki_write_8(ea, res);\r |
1951 | \r |
1952 | FLAG_N = NFLAG_8(res);\r |
1953 | FLAG_Z = res;\r |
1954 | FLAG_C = CFLAG_CLEAR;\r |
1955 | FLAG_V = VFLAG_CLEAR;\r |
1956 | }\r |
1957 | \r |
1958 | \r |
1959 | void m68k_op_or_8_re_pd(void)\r |
1960 | {\r |
1961 | uint ea = EA_AY_PD_8();\r |
1962 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));\r |
1963 | \r |
1964 | m68ki_write_8(ea, res);\r |
1965 | \r |
1966 | FLAG_N = NFLAG_8(res);\r |
1967 | FLAG_Z = res;\r |
1968 | FLAG_C = CFLAG_CLEAR;\r |
1969 | FLAG_V = VFLAG_CLEAR;\r |
1970 | }\r |
1971 | \r |
1972 | \r |
1973 | void m68k_op_or_8_re_pd7(void)\r |
1974 | {\r |
1975 | uint ea = EA_A7_PD_8();\r |
1976 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));\r |
1977 | \r |
1978 | m68ki_write_8(ea, res);\r |
1979 | \r |
1980 | FLAG_N = NFLAG_8(res);\r |
1981 | FLAG_Z = res;\r |
1982 | FLAG_C = CFLAG_CLEAR;\r |
1983 | FLAG_V = VFLAG_CLEAR;\r |
1984 | }\r |
1985 | \r |
1986 | \r |
1987 | void m68k_op_or_8_re_di(void)\r |
1988 | {\r |
1989 | uint ea = EA_AY_DI_8();\r |
1990 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));\r |
1991 | \r |
1992 | m68ki_write_8(ea, res);\r |
1993 | \r |
1994 | FLAG_N = NFLAG_8(res);\r |
1995 | FLAG_Z = res;\r |
1996 | FLAG_C = CFLAG_CLEAR;\r |
1997 | FLAG_V = VFLAG_CLEAR;\r |
1998 | }\r |
1999 | \r |
2000 | \r |
2001 | void m68k_op_or_8_re_ix(void)\r |
2002 | {\r |
2003 | uint ea = EA_AY_IX_8();\r |
2004 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));\r |
2005 | \r |
2006 | m68ki_write_8(ea, res);\r |
2007 | \r |
2008 | FLAG_N = NFLAG_8(res);\r |
2009 | FLAG_Z = res;\r |
2010 | FLAG_C = CFLAG_CLEAR;\r |
2011 | FLAG_V = VFLAG_CLEAR;\r |
2012 | }\r |
2013 | \r |
2014 | \r |
2015 | void m68k_op_or_8_re_aw(void)\r |
2016 | {\r |
2017 | uint ea = EA_AW_8();\r |
2018 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));\r |
2019 | \r |
2020 | m68ki_write_8(ea, res);\r |
2021 | \r |
2022 | FLAG_N = NFLAG_8(res);\r |
2023 | FLAG_Z = res;\r |
2024 | FLAG_C = CFLAG_CLEAR;\r |
2025 | FLAG_V = VFLAG_CLEAR;\r |
2026 | }\r |
2027 | \r |
2028 | \r |
2029 | void m68k_op_or_8_re_al(void)\r |
2030 | {\r |
2031 | uint ea = EA_AL_8();\r |
2032 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));\r |
2033 | \r |
2034 | m68ki_write_8(ea, res);\r |
2035 | \r |
2036 | FLAG_N = NFLAG_8(res);\r |
2037 | FLAG_Z = res;\r |
2038 | FLAG_C = CFLAG_CLEAR;\r |
2039 | FLAG_V = VFLAG_CLEAR;\r |
2040 | }\r |
2041 | \r |
2042 | \r |
2043 | void m68k_op_or_16_re_ai(void)\r |
2044 | {\r |
2045 | uint ea = EA_AY_AI_16();\r |
2046 | uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));\r |
2047 | \r |
2048 | m68ki_write_16(ea, res);\r |
2049 | \r |
2050 | FLAG_N = NFLAG_16(res);\r |
2051 | FLAG_Z = res;\r |
2052 | FLAG_C = CFLAG_CLEAR;\r |
2053 | FLAG_V = VFLAG_CLEAR;\r |
2054 | }\r |
2055 | \r |
2056 | \r |
2057 | void m68k_op_or_16_re_pi(void)\r |
2058 | {\r |
2059 | uint ea = EA_AY_PI_16();\r |
2060 | uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));\r |
2061 | \r |
2062 | m68ki_write_16(ea, res);\r |
2063 | \r |
2064 | FLAG_N = NFLAG_16(res);\r |
2065 | FLAG_Z = res;\r |
2066 | FLAG_C = CFLAG_CLEAR;\r |
2067 | FLAG_V = VFLAG_CLEAR;\r |
2068 | }\r |
2069 | \r |
2070 | \r |
2071 | void m68k_op_or_16_re_pd(void)\r |
2072 | {\r |
2073 | uint ea = EA_AY_PD_16();\r |
2074 | uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));\r |
2075 | \r |
2076 | m68ki_write_16(ea, res);\r |
2077 | \r |
2078 | FLAG_N = NFLAG_16(res);\r |
2079 | FLAG_Z = res;\r |
2080 | FLAG_C = CFLAG_CLEAR;\r |
2081 | FLAG_V = VFLAG_CLEAR;\r |
2082 | }\r |
2083 | \r |
2084 | \r |
2085 | void m68k_op_or_16_re_di(void)\r |
2086 | {\r |
2087 | uint ea = EA_AY_DI_16();\r |
2088 | uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));\r |
2089 | \r |
2090 | m68ki_write_16(ea, res);\r |
2091 | \r |
2092 | FLAG_N = NFLAG_16(res);\r |
2093 | FLAG_Z = res;\r |
2094 | FLAG_C = CFLAG_CLEAR;\r |
2095 | FLAG_V = VFLAG_CLEAR;\r |
2096 | }\r |
2097 | \r |
2098 | \r |
2099 | void m68k_op_or_16_re_ix(void)\r |
2100 | {\r |
2101 | uint ea = EA_AY_IX_16();\r |
2102 | uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));\r |
2103 | \r |
2104 | m68ki_write_16(ea, res);\r |
2105 | \r |
2106 | FLAG_N = NFLAG_16(res);\r |
2107 | FLAG_Z = res;\r |
2108 | FLAG_C = CFLAG_CLEAR;\r |
2109 | FLAG_V = VFLAG_CLEAR;\r |
2110 | }\r |
2111 | \r |
2112 | \r |
2113 | void m68k_op_or_16_re_aw(void)\r |
2114 | {\r |
2115 | uint ea = EA_AW_16();\r |
2116 | uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));\r |
2117 | \r |
2118 | m68ki_write_16(ea, res);\r |
2119 | \r |
2120 | FLAG_N = NFLAG_16(res);\r |
2121 | FLAG_Z = res;\r |
2122 | FLAG_C = CFLAG_CLEAR;\r |
2123 | FLAG_V = VFLAG_CLEAR;\r |
2124 | }\r |
2125 | \r |
2126 | \r |
2127 | void m68k_op_or_16_re_al(void)\r |
2128 | {\r |
2129 | uint ea = EA_AL_16();\r |
2130 | uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));\r |
2131 | \r |
2132 | m68ki_write_16(ea, res);\r |
2133 | \r |
2134 | FLAG_N = NFLAG_16(res);\r |
2135 | FLAG_Z = res;\r |
2136 | FLAG_C = CFLAG_CLEAR;\r |
2137 | FLAG_V = VFLAG_CLEAR;\r |
2138 | }\r |
2139 | \r |
2140 | \r |
2141 | void m68k_op_or_32_re_ai(void)\r |
2142 | {\r |
2143 | uint ea = EA_AY_AI_32();\r |
2144 | uint res = DX | m68ki_read_32(ea);\r |
2145 | \r |
2146 | m68ki_write_32(ea, res);\r |
2147 | \r |
2148 | FLAG_N = NFLAG_32(res);\r |
2149 | FLAG_Z = res;\r |
2150 | FLAG_C = CFLAG_CLEAR;\r |
2151 | FLAG_V = VFLAG_CLEAR;\r |
2152 | }\r |
2153 | \r |
2154 | \r |
2155 | void m68k_op_or_32_re_pi(void)\r |
2156 | {\r |
2157 | uint ea = EA_AY_PI_32();\r |
2158 | uint res = DX | m68ki_read_32(ea);\r |
2159 | \r |
2160 | m68ki_write_32(ea, res);\r |
2161 | \r |
2162 | FLAG_N = NFLAG_32(res);\r |
2163 | FLAG_Z = res;\r |
2164 | FLAG_C = CFLAG_CLEAR;\r |
2165 | FLAG_V = VFLAG_CLEAR;\r |
2166 | }\r |
2167 | \r |
2168 | \r |
2169 | void m68k_op_or_32_re_pd(void)\r |
2170 | {\r |
2171 | uint ea = EA_AY_PD_32();\r |
2172 | uint res = DX | m68ki_read_32(ea);\r |
2173 | \r |
2174 | m68ki_write_32(ea, res);\r |
2175 | \r |
2176 | FLAG_N = NFLAG_32(res);\r |
2177 | FLAG_Z = res;\r |
2178 | FLAG_C = CFLAG_CLEAR;\r |
2179 | FLAG_V = VFLAG_CLEAR;\r |
2180 | }\r |
2181 | \r |
2182 | \r |
2183 | void m68k_op_or_32_re_di(void)\r |
2184 | {\r |
2185 | uint ea = EA_AY_DI_32();\r |
2186 | uint res = DX | m68ki_read_32(ea);\r |
2187 | \r |
2188 | m68ki_write_32(ea, res);\r |
2189 | \r |
2190 | FLAG_N = NFLAG_32(res);\r |
2191 | FLAG_Z = res;\r |
2192 | FLAG_C = CFLAG_CLEAR;\r |
2193 | FLAG_V = VFLAG_CLEAR;\r |
2194 | }\r |
2195 | \r |
2196 | \r |
2197 | void m68k_op_or_32_re_ix(void)\r |
2198 | {\r |
2199 | uint ea = EA_AY_IX_32();\r |
2200 | uint res = DX | m68ki_read_32(ea);\r |
2201 | \r |
2202 | m68ki_write_32(ea, res);\r |
2203 | \r |
2204 | FLAG_N = NFLAG_32(res);\r |
2205 | FLAG_Z = res;\r |
2206 | FLAG_C = CFLAG_CLEAR;\r |
2207 | FLAG_V = VFLAG_CLEAR;\r |
2208 | }\r |
2209 | \r |
2210 | \r |
2211 | void m68k_op_or_32_re_aw(void)\r |
2212 | {\r |
2213 | uint ea = EA_AW_32();\r |
2214 | uint res = DX | m68ki_read_32(ea);\r |
2215 | \r |
2216 | m68ki_write_32(ea, res);\r |
2217 | \r |
2218 | FLAG_N = NFLAG_32(res);\r |
2219 | FLAG_Z = res;\r |
2220 | FLAG_C = CFLAG_CLEAR;\r |
2221 | FLAG_V = VFLAG_CLEAR;\r |
2222 | }\r |
2223 | \r |
2224 | \r |
2225 | void m68k_op_or_32_re_al(void)\r |
2226 | {\r |
2227 | uint ea = EA_AL_32();\r |
2228 | uint res = DX | m68ki_read_32(ea);\r |
2229 | \r |
2230 | m68ki_write_32(ea, res);\r |
2231 | \r |
2232 | FLAG_N = NFLAG_32(res);\r |
2233 | FLAG_Z = res;\r |
2234 | FLAG_C = CFLAG_CLEAR;\r |
2235 | FLAG_V = VFLAG_CLEAR;\r |
2236 | }\r |
2237 | \r |
2238 | \r |
2239 | void m68k_op_ori_8_d(void)\r |
2240 | {\r |
2241 | uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8()));\r |
2242 | \r |
2243 | FLAG_N = NFLAG_8(res);\r |
2244 | FLAG_Z = res;\r |
2245 | FLAG_C = CFLAG_CLEAR;\r |
2246 | FLAG_V = VFLAG_CLEAR;\r |
2247 | }\r |
2248 | \r |
2249 | \r |
2250 | void m68k_op_ori_8_ai(void)\r |
2251 | {\r |
2252 | uint src = OPER_I_8();\r |
2253 | uint ea = EA_AY_AI_8();\r |
2254 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));\r |
2255 | \r |
2256 | m68ki_write_8(ea, res);\r |
2257 | \r |
2258 | FLAG_N = NFLAG_8(res);\r |
2259 | FLAG_Z = res;\r |
2260 | FLAG_C = CFLAG_CLEAR;\r |
2261 | FLAG_V = VFLAG_CLEAR;\r |
2262 | }\r |
2263 | \r |
2264 | \r |
2265 | void m68k_op_ori_8_pi(void)\r |
2266 | {\r |
2267 | uint src = OPER_I_8();\r |
2268 | uint ea = EA_AY_PI_8();\r |
2269 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));\r |
2270 | \r |
2271 | m68ki_write_8(ea, res);\r |
2272 | \r |
2273 | FLAG_N = NFLAG_8(res);\r |
2274 | FLAG_Z = res;\r |
2275 | FLAG_C = CFLAG_CLEAR;\r |
2276 | FLAG_V = VFLAG_CLEAR;\r |
2277 | }\r |
2278 | \r |
2279 | \r |
2280 | void m68k_op_ori_8_pi7(void)\r |
2281 | {\r |
2282 | uint src = OPER_I_8();\r |
2283 | uint ea = EA_A7_PI_8();\r |
2284 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));\r |
2285 | \r |
2286 | m68ki_write_8(ea, res);\r |
2287 | \r |
2288 | FLAG_N = NFLAG_8(res);\r |
2289 | FLAG_Z = res;\r |
2290 | FLAG_C = CFLAG_CLEAR;\r |
2291 | FLAG_V = VFLAG_CLEAR;\r |
2292 | }\r |
2293 | \r |
2294 | \r |
2295 | void m68k_op_ori_8_pd(void)\r |
2296 | {\r |
2297 | uint src = OPER_I_8();\r |
2298 | uint ea = EA_AY_PD_8();\r |
2299 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));\r |
2300 | \r |
2301 | m68ki_write_8(ea, res);\r |
2302 | \r |
2303 | FLAG_N = NFLAG_8(res);\r |
2304 | FLAG_Z = res;\r |
2305 | FLAG_C = CFLAG_CLEAR;\r |
2306 | FLAG_V = VFLAG_CLEAR;\r |
2307 | }\r |
2308 | \r |
2309 | \r |
2310 | void m68k_op_ori_8_pd7(void)\r |
2311 | {\r |
2312 | uint src = OPER_I_8();\r |
2313 | uint ea = EA_A7_PD_8();\r |
2314 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));\r |
2315 | \r |
2316 | m68ki_write_8(ea, res);\r |
2317 | \r |
2318 | FLAG_N = NFLAG_8(res);\r |
2319 | FLAG_Z = res;\r |
2320 | FLAG_C = CFLAG_CLEAR;\r |
2321 | FLAG_V = VFLAG_CLEAR;\r |
2322 | }\r |
2323 | \r |
2324 | \r |
2325 | void m68k_op_ori_8_di(void)\r |
2326 | {\r |
2327 | uint src = OPER_I_8();\r |
2328 | uint ea = EA_AY_DI_8();\r |
2329 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));\r |
2330 | \r |
2331 | m68ki_write_8(ea, res);\r |
2332 | \r |
2333 | FLAG_N = NFLAG_8(res);\r |
2334 | FLAG_Z = res;\r |
2335 | FLAG_C = CFLAG_CLEAR;\r |
2336 | FLAG_V = VFLAG_CLEAR;\r |
2337 | }\r |
2338 | \r |
2339 | \r |
2340 | void m68k_op_ori_8_ix(void)\r |
2341 | {\r |
2342 | uint src = OPER_I_8();\r |
2343 | uint ea = EA_AY_IX_8();\r |
2344 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));\r |
2345 | \r |
2346 | m68ki_write_8(ea, res);\r |
2347 | \r |
2348 | FLAG_N = NFLAG_8(res);\r |
2349 | FLAG_Z = res;\r |
2350 | FLAG_C = CFLAG_CLEAR;\r |
2351 | FLAG_V = VFLAG_CLEAR;\r |
2352 | }\r |
2353 | \r |
2354 | \r |
2355 | void m68k_op_ori_8_aw(void)\r |
2356 | {\r |
2357 | uint src = OPER_I_8();\r |
2358 | uint ea = EA_AW_8();\r |
2359 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));\r |
2360 | \r |
2361 | m68ki_write_8(ea, res);\r |
2362 | \r |
2363 | FLAG_N = NFLAG_8(res);\r |
2364 | FLAG_Z = res;\r |
2365 | FLAG_C = CFLAG_CLEAR;\r |
2366 | FLAG_V = VFLAG_CLEAR;\r |
2367 | }\r |
2368 | \r |
2369 | \r |
2370 | void m68k_op_ori_8_al(void)\r |
2371 | {\r |
2372 | uint src = OPER_I_8();\r |
2373 | uint ea = EA_AL_8();\r |
2374 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));\r |
2375 | \r |
2376 | m68ki_write_8(ea, res);\r |
2377 | \r |
2378 | FLAG_N = NFLAG_8(res);\r |
2379 | FLAG_Z = res;\r |
2380 | FLAG_C = CFLAG_CLEAR;\r |
2381 | FLAG_V = VFLAG_CLEAR;\r |
2382 | }\r |
2383 | \r |
2384 | \r |
2385 | void m68k_op_ori_16_d(void)\r |
2386 | {\r |
2387 | uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16());\r |
2388 | \r |
2389 | FLAG_N = NFLAG_16(res);\r |
2390 | FLAG_Z = res;\r |
2391 | FLAG_C = CFLAG_CLEAR;\r |
2392 | FLAG_V = VFLAG_CLEAR;\r |
2393 | }\r |
2394 | \r |
2395 | \r |
2396 | void m68k_op_ori_16_ai(void)\r |
2397 | {\r |
2398 | uint src = OPER_I_16();\r |
2399 | uint ea = EA_AY_AI_16();\r |
2400 | uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));\r |
2401 | \r |
2402 | m68ki_write_16(ea, res);\r |
2403 | \r |
2404 | FLAG_N = NFLAG_16(res);\r |
2405 | FLAG_Z = res;\r |
2406 | FLAG_C = CFLAG_CLEAR;\r |
2407 | FLAG_V = VFLAG_CLEAR;\r |
2408 | }\r |
2409 | \r |
2410 | \r |
2411 | void m68k_op_ori_16_pi(void)\r |
2412 | {\r |
2413 | uint src = OPER_I_16();\r |
2414 | uint ea = EA_AY_PI_16();\r |
2415 | uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));\r |
2416 | \r |
2417 | m68ki_write_16(ea, res);\r |
2418 | \r |
2419 | FLAG_N = NFLAG_16(res);\r |
2420 | FLAG_Z = res;\r |
2421 | FLAG_C = CFLAG_CLEAR;\r |
2422 | FLAG_V = VFLAG_CLEAR;\r |
2423 | }\r |
2424 | \r |
2425 | \r |
2426 | void m68k_op_ori_16_pd(void)\r |
2427 | {\r |
2428 | uint src = OPER_I_16();\r |
2429 | uint ea = EA_AY_PD_16();\r |
2430 | uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));\r |
2431 | \r |
2432 | m68ki_write_16(ea, res);\r |
2433 | \r |
2434 | FLAG_N = NFLAG_16(res);\r |
2435 | FLAG_Z = res;\r |
2436 | FLAG_C = CFLAG_CLEAR;\r |
2437 | FLAG_V = VFLAG_CLEAR;\r |
2438 | }\r |
2439 | \r |
2440 | \r |
2441 | void m68k_op_ori_16_di(void)\r |
2442 | {\r |
2443 | uint src = OPER_I_16();\r |
2444 | uint ea = EA_AY_DI_16();\r |
2445 | uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));\r |
2446 | \r |
2447 | m68ki_write_16(ea, res);\r |
2448 | \r |
2449 | FLAG_N = NFLAG_16(res);\r |
2450 | FLAG_Z = res;\r |
2451 | FLAG_C = CFLAG_CLEAR;\r |
2452 | FLAG_V = VFLAG_CLEAR;\r |
2453 | }\r |
2454 | \r |
2455 | \r |
2456 | void m68k_op_ori_16_ix(void)\r |
2457 | {\r |
2458 | uint src = OPER_I_16();\r |
2459 | uint ea = EA_AY_IX_16();\r |
2460 | uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));\r |
2461 | \r |
2462 | m68ki_write_16(ea, res);\r |
2463 | \r |
2464 | FLAG_N = NFLAG_16(res);\r |
2465 | FLAG_Z = res;\r |
2466 | FLAG_C = CFLAG_CLEAR;\r |
2467 | FLAG_V = VFLAG_CLEAR;\r |
2468 | }\r |
2469 | \r |
2470 | \r |
2471 | void m68k_op_ori_16_aw(void)\r |
2472 | {\r |
2473 | uint src = OPER_I_16();\r |
2474 | uint ea = EA_AW_16();\r |
2475 | uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));\r |
2476 | \r |
2477 | m68ki_write_16(ea, res);\r |
2478 | \r |
2479 | FLAG_N = NFLAG_16(res);\r |
2480 | FLAG_Z = res;\r |
2481 | FLAG_C = CFLAG_CLEAR;\r |
2482 | FLAG_V = VFLAG_CLEAR;\r |
2483 | }\r |
2484 | \r |
2485 | \r |
2486 | void m68k_op_ori_16_al(void)\r |
2487 | {\r |
2488 | uint src = OPER_I_16();\r |
2489 | uint ea = EA_AL_16();\r |
2490 | uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));\r |
2491 | \r |
2492 | m68ki_write_16(ea, res);\r |
2493 | \r |
2494 | FLAG_N = NFLAG_16(res);\r |
2495 | FLAG_Z = res;\r |
2496 | FLAG_C = CFLAG_CLEAR;\r |
2497 | FLAG_V = VFLAG_CLEAR;\r |
2498 | }\r |
2499 | \r |
2500 | \r |
2501 | void m68k_op_ori_32_d(void)\r |
2502 | {\r |
2503 | uint res = DY |= OPER_I_32();\r |
2504 | \r |
2505 | FLAG_N = NFLAG_32(res);\r |
2506 | FLAG_Z = res;\r |
2507 | FLAG_C = CFLAG_CLEAR;\r |
2508 | FLAG_V = VFLAG_CLEAR;\r |
2509 | }\r |
2510 | \r |
2511 | \r |
2512 | void m68k_op_ori_32_ai(void)\r |
2513 | {\r |
2514 | uint src = OPER_I_32();\r |
2515 | uint ea = EA_AY_AI_32();\r |
2516 | uint res = src | m68ki_read_32(ea);\r |
2517 | \r |
2518 | m68ki_write_32(ea, res);\r |
2519 | \r |
2520 | FLAG_N = NFLAG_32(res);\r |
2521 | FLAG_Z = res;\r |
2522 | FLAG_C = CFLAG_CLEAR;\r |
2523 | FLAG_V = VFLAG_CLEAR;\r |
2524 | }\r |
2525 | \r |
2526 | \r |
2527 | void m68k_op_ori_32_pi(void)\r |
2528 | {\r |
2529 | uint src = OPER_I_32();\r |
2530 | uint ea = EA_AY_PI_32();\r |
2531 | uint res = src | m68ki_read_32(ea);\r |
2532 | \r |
2533 | m68ki_write_32(ea, res);\r |
2534 | \r |
2535 | FLAG_N = NFLAG_32(res);\r |
2536 | FLAG_Z = res;\r |
2537 | FLAG_C = CFLAG_CLEAR;\r |
2538 | FLAG_V = VFLAG_CLEAR;\r |
2539 | }\r |
2540 | \r |
2541 | \r |
2542 | void m68k_op_ori_32_pd(void)\r |
2543 | {\r |
2544 | uint src = OPER_I_32();\r |
2545 | uint ea = EA_AY_PD_32();\r |
2546 | uint res = src | m68ki_read_32(ea);\r |
2547 | \r |
2548 | m68ki_write_32(ea, res);\r |
2549 | \r |
2550 | FLAG_N = NFLAG_32(res);\r |
2551 | FLAG_Z = res;\r |
2552 | FLAG_C = CFLAG_CLEAR;\r |
2553 | FLAG_V = VFLAG_CLEAR;\r |
2554 | }\r |
2555 | \r |
2556 | \r |
2557 | void m68k_op_ori_32_di(void)\r |
2558 | {\r |
2559 | uint src = OPER_I_32();\r |
2560 | uint ea = EA_AY_DI_32();\r |
2561 | uint res = src | m68ki_read_32(ea);\r |
2562 | \r |
2563 | m68ki_write_32(ea, res);\r |
2564 | \r |
2565 | FLAG_N = NFLAG_32(res);\r |
2566 | FLAG_Z = res;\r |
2567 | FLAG_C = CFLAG_CLEAR;\r |
2568 | FLAG_V = VFLAG_CLEAR;\r |
2569 | }\r |
2570 | \r |
2571 | \r |
2572 | void m68k_op_ori_32_ix(void)\r |
2573 | {\r |
2574 | uint src = OPER_I_32();\r |
2575 | uint ea = EA_AY_IX_32();\r |
2576 | uint res = src | m68ki_read_32(ea);\r |
2577 | \r |
2578 | m68ki_write_32(ea, res);\r |
2579 | \r |
2580 | FLAG_N = NFLAG_32(res);\r |
2581 | FLAG_Z = res;\r |
2582 | FLAG_C = CFLAG_CLEAR;\r |
2583 | FLAG_V = VFLAG_CLEAR;\r |
2584 | }\r |
2585 | \r |
2586 | \r |
2587 | void m68k_op_ori_32_aw(void)\r |
2588 | {\r |
2589 | uint src = OPER_I_32();\r |
2590 | uint ea = EA_AW_32();\r |
2591 | uint res = src | m68ki_read_32(ea);\r |
2592 | \r |
2593 | m68ki_write_32(ea, res);\r |
2594 | \r |
2595 | FLAG_N = NFLAG_32(res);\r |
2596 | FLAG_Z = res;\r |
2597 | FLAG_C = CFLAG_CLEAR;\r |
2598 | FLAG_V = VFLAG_CLEAR;\r |
2599 | }\r |
2600 | \r |
2601 | \r |
2602 | void m68k_op_ori_32_al(void)\r |
2603 | {\r |
2604 | uint src = OPER_I_32();\r |
2605 | uint ea = EA_AL_32();\r |
2606 | uint res = src | m68ki_read_32(ea);\r |
2607 | \r |
2608 | m68ki_write_32(ea, res);\r |
2609 | \r |
2610 | FLAG_N = NFLAG_32(res);\r |
2611 | FLAG_Z = res;\r |
2612 | FLAG_C = CFLAG_CLEAR;\r |
2613 | FLAG_V = VFLAG_CLEAR;\r |
2614 | }\r |
2615 | \r |
2616 | \r |
2617 | void m68k_op_ori_16_toc(void)\r |
2618 | {\r |
2619 | m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16());\r |
2620 | }\r |
2621 | \r |
2622 | \r |
2623 | void m68k_op_ori_16_tos(void)\r |
2624 | {\r |
2625 | if(FLAG_S)\r |
2626 | {\r |
2627 | uint src = OPER_I_16();\r |
2628 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
2629 | m68ki_set_sr(m68ki_get_sr() | src);\r |
2630 | return;\r |
2631 | }\r |
2632 | m68ki_exception_privilege_violation();\r |
2633 | }\r |
2634 | \r |
2635 | \r |
2636 | void m68k_op_pack_16_rr(void)\r |
2637 | {\r |
2638 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2639 | {\r |
2640 | /* Note: DX and DY are reversed in Motorola's docs */\r |
2641 | uint src = DY + OPER_I_16();\r |
2642 | uint* r_dst = &DX;\r |
2643 | \r |
2644 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f);\r |
2645 | return;\r |
2646 | }\r |
2647 | m68ki_exception_illegal();\r |
2648 | }\r |
2649 | \r |
2650 | \r |
2651 | void m68k_op_pack_16_mm_ax7(void)\r |
2652 | {\r |
2653 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2654 | {\r |
2655 | /* Note: AX and AY are reversed in Motorola's docs */\r |
2656 | uint ea_src = EA_AY_PD_8();\r |
2657 | uint src = m68ki_read_8(ea_src);\r |
2658 | ea_src = EA_AY_PD_8();\r |
2659 | src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();\r |
2660 | \r |
2661 | m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));\r |
2662 | return;\r |
2663 | }\r |
2664 | m68ki_exception_illegal();\r |
2665 | }\r |
2666 | \r |
2667 | \r |
2668 | void m68k_op_pack_16_mm_ay7(void)\r |
2669 | {\r |
2670 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2671 | {\r |
2672 | /* Note: AX and AY are reversed in Motorola's docs */\r |
2673 | uint ea_src = EA_A7_PD_8();\r |
2674 | uint src = m68ki_read_8(ea_src);\r |
2675 | ea_src = EA_A7_PD_8();\r |
2676 | src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();\r |
2677 | \r |
2678 | m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));\r |
2679 | return;\r |
2680 | }\r |
2681 | m68ki_exception_illegal();\r |
2682 | }\r |
2683 | \r |
2684 | \r |
2685 | void m68k_op_pack_16_mm_axy7(void)\r |
2686 | {\r |
2687 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2688 | {\r |
2689 | uint ea_src = EA_A7_PD_8();\r |
2690 | uint src = m68ki_read_8(ea_src);\r |
2691 | ea_src = EA_A7_PD_8();\r |
2692 | src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();\r |
2693 | \r |
2694 | m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));\r |
2695 | return;\r |
2696 | }\r |
2697 | m68ki_exception_illegal();\r |
2698 | }\r |
2699 | \r |
2700 | \r |
2701 | void m68k_op_pack_16_mm(void)\r |
2702 | {\r |
2703 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
2704 | {\r |
2705 | /* Note: AX and AY are reversed in Motorola's docs */\r |
2706 | uint ea_src = EA_AY_PD_8();\r |
2707 | uint src = m68ki_read_8(ea_src);\r |
2708 | ea_src = EA_AY_PD_8();\r |
2709 | src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();\r |
2710 | \r |
2711 | m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));\r |
2712 | return;\r |
2713 | }\r |
2714 | m68ki_exception_illegal();\r |
2715 | }\r |
2716 | \r |
2717 | \r |
2718 | void m68k_op_pea_32_ai(void)\r |
2719 | {\r |
2720 | uint ea = EA_AY_AI_32();\r |
2721 | \r |
2722 | m68ki_push_32(ea);\r |
2723 | }\r |
2724 | \r |
2725 | \r |
2726 | void m68k_op_pea_32_di(void)\r |
2727 | {\r |
2728 | uint ea = EA_AY_DI_32();\r |
2729 | \r |
2730 | m68ki_push_32(ea);\r |
2731 | }\r |
2732 | \r |
2733 | \r |
2734 | void m68k_op_pea_32_ix(void)\r |
2735 | {\r |
2736 | uint ea = EA_AY_IX_32();\r |
2737 | \r |
2738 | m68ki_push_32(ea);\r |
2739 | }\r |
2740 | \r |
2741 | \r |
2742 | void m68k_op_pea_32_aw(void)\r |
2743 | {\r |
2744 | uint ea = EA_AW_32();\r |
2745 | \r |
2746 | m68ki_push_32(ea);\r |
2747 | }\r |
2748 | \r |
2749 | \r |
2750 | void m68k_op_pea_32_al(void)\r |
2751 | {\r |
2752 | uint ea = EA_AL_32();\r |
2753 | \r |
2754 | m68ki_push_32(ea);\r |
2755 | }\r |
2756 | \r |
2757 | \r |
2758 | void m68k_op_pea_32_pcdi(void)\r |
2759 | {\r |
2760 | uint ea = EA_PCDI_32();\r |
2761 | \r |
2762 | m68ki_push_32(ea);\r |
2763 | }\r |
2764 | \r |
2765 | \r |
2766 | void m68k_op_pea_32_pcix(void)\r |
2767 | {\r |
2768 | uint ea = EA_PCIX_32();\r |
2769 | \r |
2770 | m68ki_push_32(ea);\r |
2771 | }\r |
2772 | \r |
2773 | \r |
2774 | void m68k_op_pflush_32(void)\r |
2775 | {\r |
2776 | if(CPU_TYPE_IS_040_PLUS(CPU_TYPE))\r |
2777 | {\r |
2778 | // Nothing to do, unless address translation cache is emulated\r |
2779 | return;\r |
2780 | }\r |
2781 | m68ki_exception_illegal();\r |
2782 | }\r |
2783 | \r |
2784 | \r |
2785 | void m68k_op_reset(void)\r |
2786 | {\r |
2787 | if(FLAG_S)\r |
2788 | {\r |
2789 | m68ki_output_reset(); /* auto-disable (see m68kcpu.h) */\r |
2790 | USE_CYCLES(CYC_RESET);\r |
2791 | return;\r |
2792 | }\r |
2793 | m68ki_exception_privilege_violation();\r |
2794 | }\r |
2795 | \r |
2796 | \r |
2797 | void m68k_op_ror_8_s(void)\r |
2798 | {\r |
2799 | uint* r_dst = &DY;\r |
2800 | uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2801 | uint shift = orig_shift & 7;\r |
2802 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
2803 | uint res = ROR_8(src, shift);\r |
2804 | \r |
2805 | if(orig_shift != 0)\r |
2806 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
2807 | \r |
2808 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
2809 | \r |
2810 | FLAG_N = NFLAG_8(res);\r |
2811 | FLAG_Z = res;\r |
2812 | FLAG_C = src << (9-orig_shift);\r |
2813 | FLAG_V = VFLAG_CLEAR;\r |
2814 | }\r |
2815 | \r |
2816 | \r |
2817 | void m68k_op_ror_16_s(void)\r |
2818 | {\r |
2819 | uint* r_dst = &DY;\r |
2820 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2821 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
2822 | uint res = ROR_16(src, shift);\r |
2823 | \r |
2824 | if(shift != 0)\r |
2825 | USE_CYCLES(shift<<CYC_SHIFT);\r |
2826 | \r |
2827 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
2828 | \r |
2829 | FLAG_N = NFLAG_16(res);\r |
2830 | FLAG_Z = res;\r |
2831 | FLAG_C = src << (9-shift);\r |
2832 | FLAG_V = VFLAG_CLEAR;\r |
2833 | }\r |
2834 | \r |
2835 | \r |
2836 | void m68k_op_ror_32_s(void)\r |
2837 | {\r |
2838 | uint* r_dst = &DY;\r |
2839 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
2840 | uint64 src = *r_dst;\r |
2841 | uint res = ROR_32(src, shift);\r |
2842 | \r |
2843 | if(shift != 0)\r |
2844 | USE_CYCLES(shift<<CYC_SHIFT);\r |
2845 | \r |
2846 | *r_dst = res;\r |
2847 | \r |
2848 | FLAG_N = NFLAG_32(res);\r |
2849 | FLAG_Z = res;\r |
2850 | FLAG_C = src << (9-shift);\r |
2851 | FLAG_V = VFLAG_CLEAR;\r |
2852 | }\r |
2853 | \r |
2854 | \r |
2855 | void m68k_op_ror_8_r(void)\r |
2856 | {\r |
2857 | uint* r_dst = &DY;\r |
2858 | uint orig_shift = DX & 0x3f;\r |
2859 | uint shift = orig_shift & 7;\r |
2860 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
2861 | uint res = ROR_8(src, shift);\r |
2862 | \r |
2863 | if(orig_shift != 0)\r |
2864 | {\r |
2865 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
2866 | \r |
2867 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
2868 | FLAG_C = src << (8-((shift-1)&7));\r |
2869 | FLAG_N = NFLAG_8(res);\r |
2870 | FLAG_Z = res;\r |
2871 | FLAG_V = VFLAG_CLEAR;\r |
2872 | return;\r |
2873 | }\r |
2874 | \r |
2875 | FLAG_C = CFLAG_CLEAR;\r |
2876 | FLAG_N = NFLAG_8(src);\r |
2877 | FLAG_Z = src;\r |
2878 | FLAG_V = VFLAG_CLEAR;\r |
2879 | }\r |
2880 | \r |
2881 | \r |
2882 | void m68k_op_ror_16_r(void)\r |
2883 | {\r |
2884 | uint* r_dst = &DY;\r |
2885 | uint orig_shift = DX & 0x3f;\r |
2886 | uint shift = orig_shift & 15;\r |
2887 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
2888 | uint res = ROR_16(src, shift);\r |
2889 | \r |
2890 | if(orig_shift != 0)\r |
2891 | {\r |
2892 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
2893 | \r |
2894 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
2895 | FLAG_C = (src >> ((shift - 1) & 15)) << 8;\r |
2896 | FLAG_N = NFLAG_16(res);\r |
2897 | FLAG_Z = res;\r |
2898 | FLAG_V = VFLAG_CLEAR;\r |
2899 | return;\r |
2900 | }\r |
2901 | \r |
2902 | FLAG_C = CFLAG_CLEAR;\r |
2903 | FLAG_N = NFLAG_16(src);\r |
2904 | FLAG_Z = src;\r |
2905 | FLAG_V = VFLAG_CLEAR;\r |
2906 | }\r |
2907 | \r |
2908 | \r |
2909 | void m68k_op_ror_32_r(void)\r |
2910 | {\r |
2911 | uint* r_dst = &DY;\r |
2912 | uint orig_shift = DX & 0x3f;\r |
2913 | uint shift = orig_shift & 31;\r |
2914 | uint64 src = *r_dst;\r |
2915 | uint res = ROR_32(src, shift);\r |
2916 | \r |
2917 | if(orig_shift != 0)\r |
2918 | {\r |
2919 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
2920 | \r |
2921 | *r_dst = res;\r |
2922 | FLAG_C = (src >> ((shift - 1) & 31)) << 8;\r |
2923 | FLAG_N = NFLAG_32(res);\r |
2924 | FLAG_Z = res;\r |
2925 | FLAG_V = VFLAG_CLEAR;\r |
2926 | return;\r |
2927 | }\r |
2928 | \r |
2929 | FLAG_C = CFLAG_CLEAR;\r |
2930 | FLAG_N = NFLAG_32(src);\r |
2931 | FLAG_Z = src;\r |
2932 | FLAG_V = VFLAG_CLEAR;\r |
2933 | }\r |
2934 | \r |
2935 | \r |
2936 | void m68k_op_ror_16_ai(void)\r |
2937 | {\r |
2938 | uint ea = EA_AY_AI_16();\r |
2939 | uint src = m68ki_read_16(ea);\r |
2940 | uint res = ROR_16(src, 1);\r |
2941 | \r |
2942 | m68ki_write_16(ea, res);\r |
2943 | \r |
2944 | FLAG_N = NFLAG_16(res);\r |
2945 | FLAG_Z = res;\r |
2946 | FLAG_C = src << 8;\r |
2947 | FLAG_V = VFLAG_CLEAR;\r |
2948 | }\r |
2949 | \r |
2950 | \r |
2951 | void m68k_op_ror_16_pi(void)\r |
2952 | {\r |
2953 | uint ea = EA_AY_PI_16();\r |
2954 | uint src = m68ki_read_16(ea);\r |
2955 | uint res = ROR_16(src, 1);\r |
2956 | \r |
2957 | m68ki_write_16(ea, res);\r |
2958 | \r |
2959 | FLAG_N = NFLAG_16(res);\r |
2960 | FLAG_Z = res;\r |
2961 | FLAG_C = src << 8;\r |
2962 | FLAG_V = VFLAG_CLEAR;\r |
2963 | }\r |
2964 | \r |
2965 | \r |
2966 | void m68k_op_ror_16_pd(void)\r |
2967 | {\r |
2968 | uint ea = EA_AY_PD_16();\r |
2969 | uint src = m68ki_read_16(ea);\r |
2970 | uint res = ROR_16(src, 1);\r |
2971 | \r |
2972 | m68ki_write_16(ea, res);\r |
2973 | \r |
2974 | FLAG_N = NFLAG_16(res);\r |
2975 | FLAG_Z = res;\r |
2976 | FLAG_C = src << 8;\r |
2977 | FLAG_V = VFLAG_CLEAR;\r |
2978 | }\r |
2979 | \r |
2980 | \r |
2981 | void m68k_op_ror_16_di(void)\r |
2982 | {\r |
2983 | uint ea = EA_AY_DI_16();\r |
2984 | uint src = m68ki_read_16(ea);\r |
2985 | uint res = ROR_16(src, 1);\r |
2986 | \r |
2987 | m68ki_write_16(ea, res);\r |
2988 | \r |
2989 | FLAG_N = NFLAG_16(res);\r |
2990 | FLAG_Z = res;\r |
2991 | FLAG_C = src << 8;\r |
2992 | FLAG_V = VFLAG_CLEAR;\r |
2993 | }\r |
2994 | \r |
2995 | \r |
2996 | void m68k_op_ror_16_ix(void)\r |
2997 | {\r |
2998 | uint ea = EA_AY_IX_16();\r |
2999 | uint src = m68ki_read_16(ea);\r |
3000 | uint res = ROR_16(src, 1);\r |
3001 | \r |
3002 | m68ki_write_16(ea, res);\r |
3003 | \r |
3004 | FLAG_N = NFLAG_16(res);\r |
3005 | FLAG_Z = res;\r |
3006 | FLAG_C = src << 8;\r |
3007 | FLAG_V = VFLAG_CLEAR;\r |
3008 | }\r |
3009 | \r |
3010 | \r |
3011 | void m68k_op_ror_16_aw(void)\r |
3012 | {\r |
3013 | uint ea = EA_AW_16();\r |
3014 | uint src = m68ki_read_16(ea);\r |
3015 | uint res = ROR_16(src, 1);\r |
3016 | \r |
3017 | m68ki_write_16(ea, res);\r |
3018 | \r |
3019 | FLAG_N = NFLAG_16(res);\r |
3020 | FLAG_Z = res;\r |
3021 | FLAG_C = src << 8;\r |
3022 | FLAG_V = VFLAG_CLEAR;\r |
3023 | }\r |
3024 | \r |
3025 | \r |
3026 | void m68k_op_ror_16_al(void)\r |
3027 | {\r |
3028 | uint ea = EA_AL_16();\r |
3029 | uint src = m68ki_read_16(ea);\r |
3030 | uint res = ROR_16(src, 1);\r |
3031 | \r |
3032 | m68ki_write_16(ea, res);\r |
3033 | \r |
3034 | FLAG_N = NFLAG_16(res);\r |
3035 | FLAG_Z = res;\r |
3036 | FLAG_C = src << 8;\r |
3037 | FLAG_V = VFLAG_CLEAR;\r |
3038 | }\r |
3039 | \r |
3040 | \r |
3041 | void m68k_op_rol_8_s(void)\r |
3042 | {\r |
3043 | uint* r_dst = &DY;\r |
3044 | uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3045 | uint shift = orig_shift & 7;\r |
3046 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3047 | uint res = ROL_8(src, shift);\r |
3048 | \r |
3049 | if(orig_shift != 0)\r |
3050 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3051 | \r |
3052 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3053 | \r |
3054 | FLAG_N = NFLAG_8(res);\r |
3055 | FLAG_Z = res;\r |
3056 | FLAG_C = src << orig_shift;\r |
3057 | FLAG_V = VFLAG_CLEAR;\r |
3058 | }\r |
3059 | \r |
3060 | \r |
3061 | void m68k_op_rol_16_s(void)\r |
3062 | {\r |
3063 | uint* r_dst = &DY;\r |
3064 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3065 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3066 | uint res = ROL_16(src, shift);\r |
3067 | \r |
3068 | if(shift != 0)\r |
3069 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3070 | \r |
3071 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3072 | \r |
3073 | FLAG_N = NFLAG_16(res);\r |
3074 | FLAG_Z = res;\r |
3075 | FLAG_C = src >> (8-shift);\r |
3076 | FLAG_V = VFLAG_CLEAR;\r |
3077 | }\r |
3078 | \r |
3079 | \r |
3080 | void m68k_op_rol_32_s(void)\r |
3081 | {\r |
3082 | uint* r_dst = &DY;\r |
3083 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3084 | uint64 src = *r_dst;\r |
3085 | uint res = ROL_32(src, shift);\r |
3086 | \r |
3087 | if(shift != 0)\r |
3088 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3089 | \r |
3090 | *r_dst = res;\r |
3091 | \r |
3092 | FLAG_N = NFLAG_32(res);\r |
3093 | FLAG_Z = res;\r |
3094 | FLAG_C = src >> (24-shift);\r |
3095 | FLAG_V = VFLAG_CLEAR;\r |
3096 | }\r |
3097 | \r |
3098 | \r |
3099 | void m68k_op_rol_8_r(void)\r |
3100 | {\r |
3101 | uint* r_dst = &DY;\r |
3102 | uint orig_shift = DX & 0x3f;\r |
3103 | uint shift = orig_shift & 7;\r |
3104 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3105 | uint res = ROL_8(src, shift);\r |
3106 | \r |
3107 | if(orig_shift != 0)\r |
3108 | {\r |
3109 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3110 | \r |
3111 | if(shift != 0)\r |
3112 | {\r |
3113 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3114 | FLAG_C = src << shift;\r |
3115 | FLAG_N = NFLAG_8(res);\r |
3116 | FLAG_Z = res;\r |
3117 | FLAG_V = VFLAG_CLEAR;\r |
3118 | return;\r |
3119 | }\r |
3120 | FLAG_C = (src & 1)<<8;\r |
3121 | FLAG_N = NFLAG_8(src);\r |
3122 | FLAG_Z = src;\r |
3123 | FLAG_V = VFLAG_CLEAR;\r |
3124 | return;\r |
3125 | }\r |
3126 | \r |
3127 | FLAG_C = CFLAG_CLEAR;\r |
3128 | FLAG_N = NFLAG_8(src);\r |
3129 | FLAG_Z = src;\r |
3130 | FLAG_V = VFLAG_CLEAR;\r |
3131 | }\r |
3132 | \r |
3133 | \r |
3134 | void m68k_op_rol_16_r(void)\r |
3135 | {\r |
3136 | uint* r_dst = &DY;\r |
3137 | uint orig_shift = DX & 0x3f;\r |
3138 | uint shift = orig_shift & 15;\r |
3139 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3140 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, shift));\r |
3141 | \r |
3142 | if(orig_shift != 0)\r |
3143 | {\r |
3144 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3145 | \r |
3146 | if(shift != 0)\r |
3147 | {\r |
3148 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3149 | FLAG_C = (src << shift) >> 8;\r |
3150 | FLAG_N = NFLAG_16(res);\r |
3151 | FLAG_Z = res;\r |
3152 | FLAG_V = VFLAG_CLEAR;\r |
3153 | return;\r |
3154 | }\r |
3155 | FLAG_C = (src & 1)<<8;\r |
3156 | FLAG_N = NFLAG_16(src);\r |
3157 | FLAG_Z = src;\r |
3158 | FLAG_V = VFLAG_CLEAR;\r |
3159 | return;\r |
3160 | }\r |
3161 | \r |
3162 | FLAG_C = CFLAG_CLEAR;\r |
3163 | FLAG_N = NFLAG_16(src);\r |
3164 | FLAG_Z = src;\r |
3165 | FLAG_V = VFLAG_CLEAR;\r |
3166 | }\r |
3167 | \r |
3168 | \r |
3169 | void m68k_op_rol_32_r(void)\r |
3170 | {\r |
3171 | uint* r_dst = &DY;\r |
3172 | uint orig_shift = DX & 0x3f;\r |
3173 | uint shift = orig_shift & 31;\r |
3174 | uint64 src = *r_dst;\r |
3175 | uint res = ROL_32(src, shift);\r |
3176 | \r |
3177 | if(orig_shift != 0)\r |
3178 | {\r |
3179 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3180 | \r |
3181 | *r_dst = res;\r |
3182 | \r |
3183 | FLAG_C = (src >> (32 - shift)) << 8;\r |
3184 | FLAG_N = NFLAG_32(res);\r |
3185 | FLAG_Z = res;\r |
3186 | FLAG_V = VFLAG_CLEAR;\r |
3187 | return;\r |
3188 | }\r |
3189 | \r |
3190 | FLAG_C = CFLAG_CLEAR;\r |
3191 | FLAG_N = NFLAG_32(src);\r |
3192 | FLAG_Z = src;\r |
3193 | FLAG_V = VFLAG_CLEAR;\r |
3194 | }\r |
3195 | \r |
3196 | \r |
3197 | void m68k_op_rol_16_ai(void)\r |
3198 | {\r |
3199 | uint ea = EA_AY_AI_16();\r |
3200 | uint src = m68ki_read_16(ea);\r |
3201 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));\r |
3202 | \r |
3203 | m68ki_write_16(ea, res);\r |
3204 | \r |
3205 | FLAG_N = NFLAG_16(res);\r |
3206 | FLAG_Z = res;\r |
3207 | FLAG_C = src >> 7;\r |
3208 | FLAG_V = VFLAG_CLEAR;\r |
3209 | }\r |
3210 | \r |
3211 | \r |
3212 | void m68k_op_rol_16_pi(void)\r |
3213 | {\r |
3214 | uint ea = EA_AY_PI_16();\r |
3215 | uint src = m68ki_read_16(ea);\r |
3216 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));\r |
3217 | \r |
3218 | m68ki_write_16(ea, res);\r |
3219 | \r |
3220 | FLAG_N = NFLAG_16(res);\r |
3221 | FLAG_Z = res;\r |
3222 | FLAG_C = src >> 7;\r |
3223 | FLAG_V = VFLAG_CLEAR;\r |
3224 | }\r |
3225 | \r |
3226 | \r |
3227 | void m68k_op_rol_16_pd(void)\r |
3228 | {\r |
3229 | uint ea = EA_AY_PD_16();\r |
3230 | uint src = m68ki_read_16(ea);\r |
3231 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));\r |
3232 | \r |
3233 | m68ki_write_16(ea, res);\r |
3234 | \r |
3235 | FLAG_N = NFLAG_16(res);\r |
3236 | FLAG_Z = res;\r |
3237 | FLAG_C = src >> 7;\r |
3238 | FLAG_V = VFLAG_CLEAR;\r |
3239 | }\r |
3240 | \r |
3241 | \r |
3242 | void m68k_op_rol_16_di(void)\r |
3243 | {\r |
3244 | uint ea = EA_AY_DI_16();\r |
3245 | uint src = m68ki_read_16(ea);\r |
3246 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));\r |
3247 | \r |
3248 | m68ki_write_16(ea, res);\r |
3249 | \r |
3250 | FLAG_N = NFLAG_16(res);\r |
3251 | FLAG_Z = res;\r |
3252 | FLAG_C = src >> 7;\r |
3253 | FLAG_V = VFLAG_CLEAR;\r |
3254 | }\r |
3255 | \r |
3256 | \r |
3257 | void m68k_op_rol_16_ix(void)\r |
3258 | {\r |
3259 | uint ea = EA_AY_IX_16();\r |
3260 | uint src = m68ki_read_16(ea);\r |
3261 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));\r |
3262 | \r |
3263 | m68ki_write_16(ea, res);\r |
3264 | \r |
3265 | FLAG_N = NFLAG_16(res);\r |
3266 | FLAG_Z = res;\r |
3267 | FLAG_C = src >> 7;\r |
3268 | FLAG_V = VFLAG_CLEAR;\r |
3269 | }\r |
3270 | \r |
3271 | \r |
3272 | void m68k_op_rol_16_aw(void)\r |
3273 | {\r |
3274 | uint ea = EA_AW_16();\r |
3275 | uint src = m68ki_read_16(ea);\r |
3276 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));\r |
3277 | \r |
3278 | m68ki_write_16(ea, res);\r |
3279 | \r |
3280 | FLAG_N = NFLAG_16(res);\r |
3281 | FLAG_Z = res;\r |
3282 | FLAG_C = src >> 7;\r |
3283 | FLAG_V = VFLAG_CLEAR;\r |
3284 | }\r |
3285 | \r |
3286 | \r |
3287 | void m68k_op_rol_16_al(void)\r |
3288 | {\r |
3289 | uint ea = EA_AL_16();\r |
3290 | uint src = m68ki_read_16(ea);\r |
3291 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));\r |
3292 | \r |
3293 | m68ki_write_16(ea, res);\r |
3294 | \r |
3295 | FLAG_N = NFLAG_16(res);\r |
3296 | FLAG_Z = res;\r |
3297 | FLAG_C = src >> 7;\r |
3298 | FLAG_V = VFLAG_CLEAR;\r |
3299 | }\r |
3300 | \r |
3301 | \r |
3302 | void m68k_op_roxr_8_s(void)\r |
3303 | {\r |
3304 | uint* r_dst = &DY;\r |
3305 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3306 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3307 | uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift);\r |
3308 | \r |
3309 | if(shift != 0)\r |
3310 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3311 | \r |
3312 | FLAG_C = FLAG_X = res;\r |
3313 | res = MASK_OUT_ABOVE_8(res);\r |
3314 | \r |
3315 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3316 | \r |
3317 | FLAG_N = NFLAG_8(res);\r |
3318 | FLAG_Z = res;\r |
3319 | FLAG_V = VFLAG_CLEAR;\r |
3320 | }\r |
3321 | \r |
3322 | \r |
3323 | void m68k_op_roxr_16_s(void)\r |
3324 | {\r |
3325 | uint* r_dst = &DY;\r |
3326 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3327 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3328 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift);\r |
3329 | \r |
3330 | if(shift != 0)\r |
3331 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3332 | \r |
3333 | FLAG_C = FLAG_X = res >> 8;\r |
3334 | res = MASK_OUT_ABOVE_16(res);\r |
3335 | \r |
3336 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3337 | \r |
3338 | FLAG_N = NFLAG_16(res);\r |
3339 | FLAG_Z = res;\r |
3340 | FLAG_V = VFLAG_CLEAR;\r |
3341 | }\r |
3342 | \r |
3343 | \r |
3344 | void m68k_op_roxr_32_s(void)\r |
3345 | {\r |
3346 | #if M68K_USE_64_BIT\r |
3347 | \r |
3348 | uint* r_dst = &DY;\r |
3349 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3350 | uint64 src = *r_dst;\r |
3351 | uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);\r |
3352 | \r |
3353 | if(shift != 0)\r |
3354 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3355 | \r |
3356 | res = ROR_33_64(res, shift);\r |
3357 | \r |
3358 | FLAG_C = FLAG_X = res >> 24;\r |
3359 | res = MASK_OUT_ABOVE_32(res);\r |
3360 | \r |
3361 | *r_dst = res;\r |
3362 | \r |
3363 | FLAG_N = NFLAG_32(res);\r |
3364 | FLAG_Z = res;\r |
3365 | FLAG_V = VFLAG_CLEAR;\r |
3366 | \r |
3367 | #else\r |
3368 | \r |
3369 | uint* r_dst = &DY;\r |
3370 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3371 | uint src = *r_dst;\r |
3372 | uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));\r |
3373 | uint new_x_flag = src & (1 << (shift - 1));\r |
3374 | \r |
3375 | if(shift != 0)\r |
3376 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3377 | \r |
3378 | *r_dst = res;\r |
3379 | \r |
3380 | FLAG_C = FLAG_X = (new_x_flag != 0)<<8;\r |
3381 | FLAG_N = NFLAG_32(res);\r |
3382 | FLAG_Z = res;\r |
3383 | FLAG_V = VFLAG_CLEAR;\r |
3384 | \r |
3385 | #endif\r |
3386 | }\r |
3387 | \r |
3388 | \r |
3389 | void m68k_op_roxr_8_r(void)\r |
3390 | {\r |
3391 | uint* r_dst = &DY;\r |
3392 | uint orig_shift = DX & 0x3f;\r |
3393 | \r |
3394 | if(orig_shift != 0)\r |
3395 | {\r |
3396 | uint shift = orig_shift % 9;\r |
3397 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3398 | uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift);\r |
3399 | \r |
3400 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3401 | \r |
3402 | FLAG_C = FLAG_X = res;\r |
3403 | res = MASK_OUT_ABOVE_8(res);\r |
3404 | \r |
3405 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3406 | FLAG_N = NFLAG_8(res);\r |
3407 | FLAG_Z = res;\r |
3408 | FLAG_V = VFLAG_CLEAR;\r |
3409 | return;\r |
3410 | }\r |
3411 | \r |
3412 | FLAG_C = FLAG_X;\r |
3413 | FLAG_N = NFLAG_8(*r_dst);\r |
3414 | FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);\r |
3415 | FLAG_V = VFLAG_CLEAR;\r |
3416 | }\r |
3417 | \r |
3418 | \r |
3419 | void m68k_op_roxr_16_r(void)\r |
3420 | {\r |
3421 | uint* r_dst = &DY;\r |
3422 | uint orig_shift = DX & 0x3f;\r |
3423 | \r |
3424 | if(orig_shift != 0)\r |
3425 | {\r |
3426 | uint shift = orig_shift % 17;\r |
3427 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3428 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift);\r |
3429 | \r |
3430 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3431 | \r |
3432 | FLAG_C = FLAG_X = res >> 8;\r |
3433 | res = MASK_OUT_ABOVE_16(res);\r |
3434 | \r |
3435 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3436 | FLAG_N = NFLAG_16(res);\r |
3437 | FLAG_Z = res;\r |
3438 | FLAG_V = VFLAG_CLEAR;\r |
3439 | return;\r |
3440 | }\r |
3441 | \r |
3442 | FLAG_C = FLAG_X;\r |
3443 | FLAG_N = NFLAG_16(*r_dst);\r |
3444 | FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);\r |
3445 | FLAG_V = VFLAG_CLEAR;\r |
3446 | }\r |
3447 | \r |
3448 | \r |
3449 | void m68k_op_roxr_32_r(void)\r |
3450 | {\r |
3451 | #if M68K_USE_64_BIT\r |
3452 | \r |
3453 | uint* r_dst = &DY;\r |
3454 | uint orig_shift = DX & 0x3f;\r |
3455 | \r |
3456 | if(orig_shift != 0)\r |
3457 | {\r |
3458 | uint shift = orig_shift % 33;\r |
3459 | uint64 src = *r_dst;\r |
3460 | uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);\r |
3461 | \r |
3462 | res = ROR_33_64(res, shift);\r |
3463 | \r |
3464 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3465 | \r |
3466 | FLAG_C = FLAG_X = res >> 24;\r |
3467 | res = MASK_OUT_ABOVE_32(res);\r |
3468 | \r |
3469 | *r_dst = res;\r |
3470 | FLAG_N = NFLAG_32(res);\r |
3471 | FLAG_Z = res;\r |
3472 | FLAG_V = VFLAG_CLEAR;\r |
3473 | return;\r |
3474 | }\r |
3475 | \r |
3476 | FLAG_C = FLAG_X;\r |
3477 | FLAG_N = NFLAG_32(*r_dst);\r |
3478 | FLAG_Z = *r_dst;\r |
3479 | FLAG_V = VFLAG_CLEAR;\r |
3480 | \r |
3481 | #else\r |
3482 | \r |
3483 | uint* r_dst = &DY;\r |
3484 | uint orig_shift = DX & 0x3f;\r |
3485 | uint shift = orig_shift % 33;\r |
3486 | uint src = *r_dst;\r |
3487 | uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));\r |
3488 | uint new_x_flag = src & (1 << (shift - 1));\r |
3489 | \r |
3490 | if(orig_shift != 0)\r |
3491 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3492 | \r |
3493 | if(shift != 0)\r |
3494 | {\r |
3495 | *r_dst = res;\r |
3496 | FLAG_X = (new_x_flag != 0)<<8;\r |
3497 | }\r |
3498 | else\r |
3499 | res = src;\r |
3500 | FLAG_C = FLAG_X;\r |
3501 | FLAG_N = NFLAG_32(res);\r |
3502 | FLAG_Z = res;\r |
3503 | FLAG_V = VFLAG_CLEAR;\r |
3504 | \r |
3505 | #endif\r |
3506 | }\r |
3507 | \r |
3508 | \r |
3509 | void m68k_op_roxr_16_ai(void)\r |
3510 | {\r |
3511 | uint ea = EA_AY_AI_16();\r |
3512 | uint src = m68ki_read_16(ea);\r |
3513 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);\r |
3514 | \r |
3515 | FLAG_C = FLAG_X = res >> 8;\r |
3516 | res = MASK_OUT_ABOVE_16(res);\r |
3517 | \r |
3518 | m68ki_write_16(ea, res);\r |
3519 | \r |
3520 | FLAG_N = NFLAG_16(res);\r |
3521 | FLAG_Z = res;\r |
3522 | FLAG_V = VFLAG_CLEAR;\r |
3523 | }\r |
3524 | \r |
3525 | \r |
3526 | void m68k_op_roxr_16_pi(void)\r |
3527 | {\r |
3528 | uint ea = EA_AY_PI_16();\r |
3529 | uint src = m68ki_read_16(ea);\r |
3530 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);\r |
3531 | \r |
3532 | FLAG_C = FLAG_X = res >> 8;\r |
3533 | res = MASK_OUT_ABOVE_16(res);\r |
3534 | \r |
3535 | m68ki_write_16(ea, res);\r |
3536 | \r |
3537 | FLAG_N = NFLAG_16(res);\r |
3538 | FLAG_Z = res;\r |
3539 | FLAG_V = VFLAG_CLEAR;\r |
3540 | }\r |
3541 | \r |
3542 | \r |
3543 | void m68k_op_roxr_16_pd(void)\r |
3544 | {\r |
3545 | uint ea = EA_AY_PD_16();\r |
3546 | uint src = m68ki_read_16(ea);\r |
3547 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);\r |
3548 | \r |
3549 | FLAG_C = FLAG_X = res >> 8;\r |
3550 | res = MASK_OUT_ABOVE_16(res);\r |
3551 | \r |
3552 | m68ki_write_16(ea, res);\r |
3553 | \r |
3554 | FLAG_N = NFLAG_16(res);\r |
3555 | FLAG_Z = res;\r |
3556 | FLAG_V = VFLAG_CLEAR;\r |
3557 | }\r |
3558 | \r |
3559 | \r |
3560 | void m68k_op_roxr_16_di(void)\r |
3561 | {\r |
3562 | uint ea = EA_AY_DI_16();\r |
3563 | uint src = m68ki_read_16(ea);\r |
3564 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);\r |
3565 | \r |
3566 | FLAG_C = FLAG_X = res >> 8;\r |
3567 | res = MASK_OUT_ABOVE_16(res);\r |
3568 | \r |
3569 | m68ki_write_16(ea, res);\r |
3570 | \r |
3571 | FLAG_N = NFLAG_16(res);\r |
3572 | FLAG_Z = res;\r |
3573 | FLAG_V = VFLAG_CLEAR;\r |
3574 | }\r |
3575 | \r |
3576 | \r |
3577 | void m68k_op_roxr_16_ix(void)\r |
3578 | {\r |
3579 | uint ea = EA_AY_IX_16();\r |
3580 | uint src = m68ki_read_16(ea);\r |
3581 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);\r |
3582 | \r |
3583 | FLAG_C = FLAG_X = res >> 8;\r |
3584 | res = MASK_OUT_ABOVE_16(res);\r |
3585 | \r |
3586 | m68ki_write_16(ea, res);\r |
3587 | \r |
3588 | FLAG_N = NFLAG_16(res);\r |
3589 | FLAG_Z = res;\r |
3590 | FLAG_V = VFLAG_CLEAR;\r |
3591 | }\r |
3592 | \r |
3593 | \r |
3594 | void m68k_op_roxr_16_aw(void)\r |
3595 | {\r |
3596 | uint ea = EA_AW_16();\r |
3597 | uint src = m68ki_read_16(ea);\r |
3598 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);\r |
3599 | \r |
3600 | FLAG_C = FLAG_X = res >> 8;\r |
3601 | res = MASK_OUT_ABOVE_16(res);\r |
3602 | \r |
3603 | m68ki_write_16(ea, res);\r |
3604 | \r |
3605 | FLAG_N = NFLAG_16(res);\r |
3606 | FLAG_Z = res;\r |
3607 | FLAG_V = VFLAG_CLEAR;\r |
3608 | }\r |
3609 | \r |
3610 | \r |
3611 | void m68k_op_roxr_16_al(void)\r |
3612 | {\r |
3613 | uint ea = EA_AL_16();\r |
3614 | uint src = m68ki_read_16(ea);\r |
3615 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);\r |
3616 | \r |
3617 | FLAG_C = FLAG_X = res >> 8;\r |
3618 | res = MASK_OUT_ABOVE_16(res);\r |
3619 | \r |
3620 | m68ki_write_16(ea, res);\r |
3621 | \r |
3622 | FLAG_N = NFLAG_16(res);\r |
3623 | FLAG_Z = res;\r |
3624 | FLAG_V = VFLAG_CLEAR;\r |
3625 | }\r |
3626 | \r |
3627 | \r |
3628 | void m68k_op_roxl_8_s(void)\r |
3629 | {\r |
3630 | uint* r_dst = &DY;\r |
3631 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3632 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3633 | uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift);\r |
3634 | \r |
3635 | if(shift != 0)\r |
3636 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3637 | \r |
3638 | FLAG_C = FLAG_X = res;\r |
3639 | res = MASK_OUT_ABOVE_8(res);\r |
3640 | \r |
3641 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3642 | \r |
3643 | FLAG_N = NFLAG_8(res);\r |
3644 | FLAG_Z = res;\r |
3645 | FLAG_V = VFLAG_CLEAR;\r |
3646 | }\r |
3647 | \r |
3648 | \r |
3649 | void m68k_op_roxl_16_s(void)\r |
3650 | {\r |
3651 | uint* r_dst = &DY;\r |
3652 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3653 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3654 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift);\r |
3655 | \r |
3656 | if(shift != 0)\r |
3657 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3658 | \r |
3659 | FLAG_C = FLAG_X = res >> 8;\r |
3660 | res = MASK_OUT_ABOVE_16(res);\r |
3661 | \r |
3662 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3663 | \r |
3664 | FLAG_N = NFLAG_16(res);\r |
3665 | FLAG_Z = res;\r |
3666 | FLAG_V = VFLAG_CLEAR;\r |
3667 | }\r |
3668 | \r |
3669 | \r |
3670 | void m68k_op_roxl_32_s(void)\r |
3671 | {\r |
3672 | #if M68K_USE_64_BIT\r |
3673 | \r |
3674 | uint* r_dst = &DY;\r |
3675 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3676 | uint64 src = *r_dst;\r |
3677 | uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);\r |
3678 | \r |
3679 | if(shift != 0)\r |
3680 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3681 | \r |
3682 | res = ROL_33_64(res, shift);\r |
3683 | \r |
3684 | FLAG_C = FLAG_X = res >> 24;\r |
3685 | res = MASK_OUT_ABOVE_32(res);\r |
3686 | \r |
3687 | *r_dst = res;\r |
3688 | \r |
3689 | FLAG_N = NFLAG_32(res);\r |
3690 | FLAG_Z = res;\r |
3691 | FLAG_V = VFLAG_CLEAR;\r |
3692 | \r |
3693 | #else\r |
3694 | \r |
3695 | uint* r_dst = &DY;\r |
3696 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;\r |
3697 | uint src = *r_dst;\r |
3698 | uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));\r |
3699 | uint new_x_flag = src & (1 << (32 - shift));\r |
3700 | \r |
3701 | if(shift != 0)\r |
3702 | USE_CYCLES(shift<<CYC_SHIFT);\r |
3703 | \r |
3704 | *r_dst = res;\r |
3705 | \r |
3706 | FLAG_C = FLAG_X = (new_x_flag != 0)<<8;\r |
3707 | FLAG_N = NFLAG_32(res);\r |
3708 | FLAG_Z = res;\r |
3709 | FLAG_V = VFLAG_CLEAR;\r |
3710 | \r |
3711 | #endif\r |
3712 | }\r |
3713 | \r |
3714 | \r |
3715 | void m68k_op_roxl_8_r(void)\r |
3716 | {\r |
3717 | uint* r_dst = &DY;\r |
3718 | uint orig_shift = DX & 0x3f;\r |
3719 | \r |
3720 | \r |
3721 | if(orig_shift != 0)\r |
3722 | {\r |
3723 | uint shift = orig_shift % 9;\r |
3724 | uint src = MASK_OUT_ABOVE_8(*r_dst);\r |
3725 | uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift);\r |
3726 | \r |
3727 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3728 | \r |
3729 | FLAG_C = FLAG_X = res;\r |
3730 | res = MASK_OUT_ABOVE_8(res);\r |
3731 | \r |
3732 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
3733 | FLAG_N = NFLAG_8(res);\r |
3734 | FLAG_Z = res;\r |
3735 | FLAG_V = VFLAG_CLEAR;\r |
3736 | return;\r |
3737 | }\r |
3738 | \r |
3739 | FLAG_C = FLAG_X;\r |
3740 | FLAG_N = NFLAG_8(*r_dst);\r |
3741 | FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);\r |
3742 | FLAG_V = VFLAG_CLEAR;\r |
3743 | }\r |
3744 | \r |
3745 | \r |
3746 | void m68k_op_roxl_16_r(void)\r |
3747 | {\r |
3748 | uint* r_dst = &DY;\r |
3749 | uint orig_shift = DX & 0x3f;\r |
3750 | \r |
3751 | if(orig_shift != 0)\r |
3752 | {\r |
3753 | uint shift = orig_shift % 17;\r |
3754 | uint src = MASK_OUT_ABOVE_16(*r_dst);\r |
3755 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift);\r |
3756 | \r |
3757 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3758 | \r |
3759 | FLAG_C = FLAG_X = res >> 8;\r |
3760 | res = MASK_OUT_ABOVE_16(res);\r |
3761 | \r |
3762 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
3763 | FLAG_N = NFLAG_16(res);\r |
3764 | FLAG_Z = res;\r |
3765 | FLAG_V = VFLAG_CLEAR;\r |
3766 | return;\r |
3767 | }\r |
3768 | \r |
3769 | FLAG_C = FLAG_X;\r |
3770 | FLAG_N = NFLAG_16(*r_dst);\r |
3771 | FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);\r |
3772 | FLAG_V = VFLAG_CLEAR;\r |
3773 | }\r |
3774 | \r |
3775 | \r |
3776 | void m68k_op_roxl_32_r(void)\r |
3777 | {\r |
3778 | #if M68K_USE_64_BIT\r |
3779 | \r |
3780 | uint* r_dst = &DY;\r |
3781 | uint orig_shift = DX & 0x3f;\r |
3782 | \r |
3783 | if(orig_shift != 0)\r |
3784 | {\r |
3785 | uint shift = orig_shift % 33;\r |
3786 | uint64 src = *r_dst;\r |
3787 | uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);\r |
3788 | \r |
3789 | res = ROL_33_64(res, shift);\r |
3790 | \r |
3791 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3792 | \r |
3793 | FLAG_C = FLAG_X = res >> 24;\r |
3794 | res = MASK_OUT_ABOVE_32(res);\r |
3795 | \r |
3796 | *r_dst = res;\r |
3797 | FLAG_N = NFLAG_32(res);\r |
3798 | FLAG_Z = res;\r |
3799 | FLAG_V = VFLAG_CLEAR;\r |
3800 | return;\r |
3801 | }\r |
3802 | \r |
3803 | FLAG_C = FLAG_X;\r |
3804 | FLAG_N = NFLAG_32(*r_dst);\r |
3805 | FLAG_Z = *r_dst;\r |
3806 | FLAG_V = VFLAG_CLEAR;\r |
3807 | \r |
3808 | #else\r |
3809 | \r |
3810 | uint* r_dst = &DY;\r |
3811 | uint orig_shift = DX & 0x3f;\r |
3812 | uint shift = orig_shift % 33;\r |
3813 | uint src = *r_dst;\r |
3814 | uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));\r |
3815 | uint new_x_flag = src & (1 << (32 - shift));\r |
3816 | \r |
3817 | if(orig_shift != 0)\r |
3818 | USE_CYCLES(orig_shift<<CYC_SHIFT);\r |
3819 | \r |
3820 | if(shift != 0)\r |
3821 | {\r |
3822 | *r_dst = res;\r |
3823 | FLAG_X = (new_x_flag != 0)<<8;\r |
3824 | }\r |
3825 | else\r |
3826 | res = src;\r |
3827 | FLAG_C = FLAG_X;\r |
3828 | FLAG_N = NFLAG_32(res);\r |
3829 | FLAG_Z = res;\r |
3830 | FLAG_V = VFLAG_CLEAR;\r |
3831 | \r |
3832 | #endif\r |
3833 | }\r |
3834 | \r |
3835 | \r |
3836 | void m68k_op_roxl_16_ai(void)\r |
3837 | {\r |
3838 | uint ea = EA_AY_AI_16();\r |
3839 | uint src = m68ki_read_16(ea);\r |
3840 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);\r |
3841 | \r |
3842 | FLAG_C = FLAG_X = res >> 8;\r |
3843 | res = MASK_OUT_ABOVE_16(res);\r |
3844 | \r |
3845 | m68ki_write_16(ea, res);\r |
3846 | \r |
3847 | FLAG_N = NFLAG_16(res);\r |
3848 | FLAG_Z = res;\r |
3849 | FLAG_V = VFLAG_CLEAR;\r |
3850 | }\r |
3851 | \r |
3852 | \r |
3853 | void m68k_op_roxl_16_pi(void)\r |
3854 | {\r |
3855 | uint ea = EA_AY_PI_16();\r |
3856 | uint src = m68ki_read_16(ea);\r |
3857 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);\r |
3858 | \r |
3859 | FLAG_C = FLAG_X = res >> 8;\r |
3860 | res = MASK_OUT_ABOVE_16(res);\r |
3861 | \r |
3862 | m68ki_write_16(ea, res);\r |
3863 | \r |
3864 | FLAG_N = NFLAG_16(res);\r |
3865 | FLAG_Z = res;\r |
3866 | FLAG_V = VFLAG_CLEAR;\r |
3867 | }\r |
3868 | \r |
3869 | \r |
3870 | void m68k_op_roxl_16_pd(void)\r |
3871 | {\r |
3872 | uint ea = EA_AY_PD_16();\r |
3873 | uint src = m68ki_read_16(ea);\r |
3874 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);\r |
3875 | \r |
3876 | FLAG_C = FLAG_X = res >> 8;\r |
3877 | res = MASK_OUT_ABOVE_16(res);\r |
3878 | \r |
3879 | m68ki_write_16(ea, res);\r |
3880 | \r |
3881 | FLAG_N = NFLAG_16(res);\r |
3882 | FLAG_Z = res;\r |
3883 | FLAG_V = VFLAG_CLEAR;\r |
3884 | }\r |
3885 | \r |
3886 | \r |
3887 | void m68k_op_roxl_16_di(void)\r |
3888 | {\r |
3889 | uint ea = EA_AY_DI_16();\r |
3890 | uint src = m68ki_read_16(ea);\r |
3891 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);\r |
3892 | \r |
3893 | FLAG_C = FLAG_X = res >> 8;\r |
3894 | res = MASK_OUT_ABOVE_16(res);\r |
3895 | \r |
3896 | m68ki_write_16(ea, res);\r |
3897 | \r |
3898 | FLAG_N = NFLAG_16(res);\r |
3899 | FLAG_Z = res;\r |
3900 | FLAG_V = VFLAG_CLEAR;\r |
3901 | }\r |
3902 | \r |
3903 | \r |
3904 | void m68k_op_roxl_16_ix(void)\r |
3905 | {\r |
3906 | uint ea = EA_AY_IX_16();\r |
3907 | uint src = m68ki_read_16(ea);\r |
3908 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);\r |
3909 | \r |
3910 | FLAG_C = FLAG_X = res >> 8;\r |
3911 | res = MASK_OUT_ABOVE_16(res);\r |
3912 | \r |
3913 | m68ki_write_16(ea, res);\r |
3914 | \r |
3915 | FLAG_N = NFLAG_16(res);\r |
3916 | FLAG_Z = res;\r |
3917 | FLAG_V = VFLAG_CLEAR;\r |
3918 | }\r |
3919 | \r |
3920 | \r |
3921 | void m68k_op_roxl_16_aw(void)\r |
3922 | {\r |
3923 | uint ea = EA_AW_16();\r |
3924 | uint src = m68ki_read_16(ea);\r |
3925 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);\r |
3926 | \r |
3927 | FLAG_C = FLAG_X = res >> 8;\r |
3928 | res = MASK_OUT_ABOVE_16(res);\r |
3929 | \r |
3930 | m68ki_write_16(ea, res);\r |
3931 | \r |
3932 | FLAG_N = NFLAG_16(res);\r |
3933 | FLAG_Z = res;\r |
3934 | FLAG_V = VFLAG_CLEAR;\r |
3935 | }\r |
3936 | \r |
3937 | \r |
3938 | void m68k_op_roxl_16_al(void)\r |
3939 | {\r |
3940 | uint ea = EA_AL_16();\r |
3941 | uint src = m68ki_read_16(ea);\r |
3942 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);\r |
3943 | \r |
3944 | FLAG_C = FLAG_X = res >> 8;\r |
3945 | res = MASK_OUT_ABOVE_16(res);\r |
3946 | \r |
3947 | m68ki_write_16(ea, res);\r |
3948 | \r |
3949 | FLAG_N = NFLAG_16(res);\r |
3950 | FLAG_Z = res;\r |
3951 | FLAG_V = VFLAG_CLEAR;\r |
3952 | }\r |
3953 | \r |
3954 | \r |
3955 | void m68k_op_rtd_32(void)\r |
3956 | {\r |
3957 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))\r |
3958 | {\r |
3959 | uint new_pc = m68ki_pull_32();\r |
3960 | \r |
3961 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
3962 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));\r |
3963 | m68ki_jump(new_pc);\r |
3964 | return;\r |
3965 | }\r |
3966 | m68ki_exception_illegal();\r |
3967 | }\r |
3968 | \r |
3969 | \r |
3970 | void m68k_op_rte_32(void)\r |
3971 | {\r |
3972 | if(FLAG_S)\r |
3973 | {\r |
3974 | uint new_sr;\r |
3975 | uint new_pc;\r |
3976 | uint format_word;\r |
3977 | \r |
3978 | m68ki_rte_callback(); /* auto-disable (see m68kcpu.h) */\r |
3979 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
3980 | \r |
3981 | if(CPU_TYPE_IS_000(CPU_TYPE))\r |
3982 | {\r |
3983 | new_sr = m68ki_pull_16();\r |
3984 | new_pc = m68ki_pull_32();\r |
3985 | m68ki_jump(new_pc);\r |
3986 | m68ki_set_sr(new_sr);\r |
3987 | \r |
3988 | CPU_INSTR_MODE = INSTRUCTION_YES;\r |
3989 | CPU_RUN_MODE = RUN_MODE_NORMAL;\r |
3990 | \r |
3991 | return;\r |
3992 | }\r |
3993 | \r |
3994 | if(CPU_TYPE_IS_010(CPU_TYPE))\r |
3995 | {\r |
3996 | format_word = m68ki_read_16(REG_A[7]+6) >> 12;\r |
3997 | if(format_word == 0)\r |
3998 | {\r |
3999 | new_sr = m68ki_pull_16();\r |
4000 | new_pc = m68ki_pull_32();\r |
4001 | m68ki_fake_pull_16(); /* format word */\r |
4002 | m68ki_jump(new_pc);\r |
4003 | m68ki_set_sr(new_sr);\r |
4004 | CPU_INSTR_MODE = INSTRUCTION_YES;\r |
4005 | CPU_RUN_MODE = RUN_MODE_NORMAL;\r |
4006 | return;\r |
4007 | }\r |
4008 | CPU_INSTR_MODE = INSTRUCTION_YES;\r |
4009 | CPU_RUN_MODE = RUN_MODE_NORMAL;\r |
4010 | /* Not handling bus fault (9) */\r |
4011 | m68ki_exception_format_error();\r |
4012 | return;\r |
4013 | }\r |
4014 | \r |
4015 | /* Otherwise it's 020 */\r |
4016 | rte_loop:\r |
4017 | format_word = m68ki_read_16(REG_A[7]+6) >> 12;\r |
4018 | switch(format_word)\r |
4019 | {\r |
4020 | case 0: /* Normal */\r |
4021 | new_sr = m68ki_pull_16();\r |
4022 | new_pc = m68ki_pull_32();\r |
4023 | m68ki_fake_pull_16(); /* format word */\r |
4024 | m68ki_jump(new_pc);\r |
4025 | m68ki_set_sr(new_sr);\r |
4026 | CPU_INSTR_MODE = INSTRUCTION_YES;\r |
4027 | CPU_RUN_MODE = RUN_MODE_NORMAL;\r |
4028 | return;\r |
4029 | case 1: /* Throwaway */\r |
4030 | new_sr = m68ki_pull_16();\r |
4031 | m68ki_fake_pull_32(); /* program counter */\r |
4032 | m68ki_fake_pull_16(); /* format word */\r |
4033 | m68ki_set_sr_noint(new_sr);\r |
4034 | goto rte_loop;\r |
4035 | case 2: /* Trap */\r |
4036 | new_sr = m68ki_pull_16();\r |
4037 | new_pc = m68ki_pull_32();\r |
4038 | m68ki_fake_pull_16(); /* format word */\r |
4039 | m68ki_fake_pull_32(); /* address */\r |
4040 | m68ki_jump(new_pc);\r |
4041 | m68ki_set_sr(new_sr);\r |
4042 | CPU_INSTR_MODE = INSTRUCTION_YES;\r |
4043 | CPU_RUN_MODE = RUN_MODE_NORMAL;\r |
4044 | return;\r |
4045 | }\r |
4046 | /* Not handling long or short bus fault */\r |
4047 | CPU_INSTR_MODE = INSTRUCTION_YES;\r |
4048 | CPU_RUN_MODE = RUN_MODE_NORMAL;\r |
4049 | m68ki_exception_format_error();\r |
4050 | return;\r |
4051 | }\r |
4052 | m68ki_exception_privilege_violation();\r |
4053 | }\r |
4054 | \r |
4055 | \r |
4056 | void m68k_op_rtm_32(void)\r |
4057 | {\r |
4058 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))\r |
4059 | {\r |
4060 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4061 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",\r |
4062 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,\r |
4063 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));\r |
4064 | return;\r |
4065 | }\r |
4066 | m68ki_exception_illegal();\r |
4067 | }\r |
4068 | \r |
4069 | \r |
4070 | void m68k_op_rtr_32(void)\r |
4071 | {\r |
4072 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4073 | m68ki_set_ccr(m68ki_pull_16());\r |
4074 | m68ki_jump(m68ki_pull_32());\r |
4075 | }\r |
4076 | \r |
4077 | \r |
4078 | void m68k_op_rts_32(void)\r |
4079 | {\r |
4080 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
4081 | m68ki_jump(m68ki_pull_32());\r |
4082 | }\r |
4083 | \r |
4084 | \r |
4085 | void m68k_op_sbcd_8_rr(void)\r |
4086 | {\r |
4087 | uint* r_dst = &DX;\r |
4088 | uint src = DY;\r |
4089 | uint dst = *r_dst;\r |
4090 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();\r |
4091 | \r |
4092 | // FLAG_V = ~res; /* Undefined V behavior */\r |
4093 | FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to assume cleared. */\r |
4094 | \r |
4095 | if(res > 9)\r |
4096 | res -= 6;\r |
4097 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);\r |
4098 | if(res > 0x99)\r |
4099 | {\r |
4100 | res += 0xa0;\r |
4101 | FLAG_X = FLAG_C = CFLAG_SET;\r |
4102 | FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */\r |
4103 | }\r |
4104 | else\r |
4105 | FLAG_N = FLAG_X = FLAG_C = 0;\r |
4106 | \r |
4107 | res = MASK_OUT_ABOVE_8(res);\r |
4108 | \r |
4109 | // FLAG_V &= res; /* Undefined V behavior part II */\r |
4110 | // FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
4111 | FLAG_Z |= res;\r |
4112 | \r |
4113 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
4114 | }\r |
4115 | \r |
4116 | \r |
4117 | void m68k_op_sbcd_8_mm_ax7(void)\r |
4118 | {\r |
4119 | uint src = OPER_AY_PD_8();\r |
4120 | uint ea = EA_A7_PD_8();\r |
4121 | uint dst = m68ki_read_8(ea);\r |
4122 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();\r |
4123 | \r |
4124 | // FLAG_V = ~res; /* Undefined V behavior */\r |
4125 | FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */\r |
4126 | \r |
4127 | if(res > 9)\r |
4128 | res -= 6;\r |
4129 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);\r |
4130 | if(res > 0x99)\r |
4131 | {\r |
4132 | res += 0xa0;\r |
4133 | FLAG_X = FLAG_C = CFLAG_SET;\r |
4134 | FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */\r |
4135 | }\r |
4136 | else\r |
4137 | FLAG_N = FLAG_X = FLAG_C = 0;\r |
4138 | \r |
4139 | res = MASK_OUT_ABOVE_8(res);\r |
4140 | \r |
4141 | // FLAG_V &= res; /* Undefined V behavior part II */\r |
4142 | // FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
4143 | FLAG_Z |= res;\r |
4144 | \r |
4145 | m68ki_write_8(ea, res);\r |
4146 | }\r |
4147 | \r |
4148 | \r |
4149 | void m68k_op_sbcd_8_mm_ay7(void)\r |
4150 | {\r |
4151 | uint src = OPER_A7_PD_8();\r |
4152 | uint ea = EA_AX_PD_8();\r |
4153 | uint dst = m68ki_read_8(ea);\r |
4154 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();\r |
4155 | \r |
4156 | // FLAG_V = ~res; /* Undefined V behavior */\r |
4157 | FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */\r |
4158 | \r |
4159 | if(res > 9)\r |
4160 | res -= 6;\r |
4161 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);\r |
4162 | if(res > 0x99)\r |
4163 | {\r |
4164 | res += 0xa0;\r |
4165 | FLAG_X = FLAG_C = CFLAG_SET;\r |
4166 | FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */\r |
4167 | }\r |
4168 | else\r |
4169 | FLAG_N = FLAG_X = FLAG_C = 0;\r |
4170 | \r |
4171 | res = MASK_OUT_ABOVE_8(res);\r |
4172 | \r |
4173 | // FLAG_V &= res; /* Undefined V behavior part II */\r |
4174 | // FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
4175 | FLAG_Z |= res;\r |
4176 | \r |
4177 | m68ki_write_8(ea, res);\r |
4178 | }\r |
4179 | \r |
4180 | \r |
4181 | void m68k_op_sbcd_8_mm_axy7(void)\r |
4182 | {\r |
4183 | uint src = OPER_A7_PD_8();\r |
4184 | uint ea = EA_A7_PD_8();\r |
4185 | uint dst = m68ki_read_8(ea);\r |
4186 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();\r |
4187 | \r |
4188 | // FLAG_V = ~res; /* Undefined V behavior */\r |
4189 | FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */\r |
4190 | \r |
4191 | if(res > 9)\r |
4192 | res -= 6;\r |
4193 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);\r |
4194 | if(res > 0x99)\r |
4195 | {\r |
4196 | res += 0xa0;\r |
4197 | FLAG_X = FLAG_C = CFLAG_SET;\r |
4198 | FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */\r |
4199 | }\r |
4200 | else\r |
4201 | FLAG_N = FLAG_X = FLAG_C = 0;\r |
4202 | \r |
4203 | res = MASK_OUT_ABOVE_8(res);\r |
4204 | \r |
4205 | // FLAG_V &= res; /* Undefined V behavior part II */\r |
4206 | // FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
4207 | FLAG_Z |= res;\r |
4208 | \r |
4209 | m68ki_write_8(ea, res);\r |
4210 | }\r |
4211 | \r |
4212 | \r |
4213 | void m68k_op_sbcd_8_mm(void)\r |
4214 | {\r |
4215 | uint src = OPER_AY_PD_8();\r |
4216 | uint ea = EA_AX_PD_8();\r |
4217 | uint dst = m68ki_read_8(ea);\r |
4218 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();\r |
4219 | \r |
4220 | // FLAG_V = ~res; /* Undefined V behavior */\r |
4221 | FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */\r |
4222 | \r |
4223 | if(res > 9)\r |
4224 | res -= 6;\r |
4225 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);\r |
4226 | if(res > 0x99)\r |
4227 | {\r |
4228 | res += 0xa0;\r |
4229 | FLAG_X = FLAG_C = CFLAG_SET;\r |
4230 | FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */\r |
4231 | }\r |
4232 | else\r |
4233 | FLAG_N = FLAG_X = FLAG_C = 0;\r |
4234 | \r |
4235 | res = MASK_OUT_ABOVE_8(res);\r |
4236 | \r |
4237 | // FLAG_V &= res; /* Undefined V behavior part II */\r |
4238 | // FLAG_N = NFLAG_8(res); /* Undefined N behavior */\r |
4239 | FLAG_Z |= res;\r |
4240 | \r |
4241 | m68ki_write_8(ea, res);\r |
4242 | }\r |
4243 | \r |
4244 | \r |
4245 | void m68k_op_st_8_d(void)\r |
4246 | {\r |
4247 | DY |= 0xff;\r |
4248 | }\r |
4249 | \r |
4250 | \r |
4251 | void m68k_op_st_8_ai(void)\r |
4252 | {\r |
4253 | m68ki_write_8(EA_AY_AI_8(), 0xff);\r |
4254 | }\r |
4255 | \r |
4256 | \r |
4257 | void m68k_op_st_8_pi(void)\r |
4258 | {\r |
4259 | m68ki_write_8(EA_AY_PI_8(), 0xff);\r |
4260 | }\r |
4261 | \r |
4262 | \r |
4263 | void m68k_op_st_8_pi7(void)\r |
4264 | {\r |
4265 | m68ki_write_8(EA_A7_PI_8(), 0xff);\r |
4266 | }\r |
4267 | \r |
4268 | \r |
4269 | void m68k_op_st_8_pd(void)\r |
4270 | {\r |
4271 | m68ki_write_8(EA_AY_PD_8(), 0xff);\r |
4272 | }\r |
4273 | \r |
4274 | \r |
4275 | void m68k_op_st_8_pd7(void)\r |
4276 | {\r |
4277 | m68ki_write_8(EA_A7_PD_8(), 0xff);\r |
4278 | }\r |
4279 | \r |
4280 | \r |
4281 | void m68k_op_st_8_di(void)\r |
4282 | {\r |
4283 | m68ki_write_8(EA_AY_DI_8(), 0xff);\r |
4284 | }\r |
4285 | \r |
4286 | \r |
4287 | void m68k_op_st_8_ix(void)\r |
4288 | {\r |
4289 | m68ki_write_8(EA_AY_IX_8(), 0xff);\r |
4290 | }\r |
4291 | \r |
4292 | \r |
4293 | void m68k_op_st_8_aw(void)\r |
4294 | {\r |
4295 | m68ki_write_8(EA_AW_8(), 0xff);\r |
4296 | }\r |
4297 | \r |
4298 | \r |
4299 | void m68k_op_st_8_al(void)\r |
4300 | {\r |
4301 | m68ki_write_8(EA_AL_8(), 0xff);\r |
4302 | }\r |
4303 | \r |
4304 | \r |
4305 | void m68k_op_sf_8_d(void)\r |
4306 | {\r |
4307 | DY &= 0xffffff00;\r |
4308 | }\r |
4309 | \r |
4310 | \r |
4311 | void m68k_op_sf_8_ai(void)\r |
4312 | {\r |
4313 | m68ki_write_8(EA_AY_AI_8(), 0);\r |
4314 | }\r |
4315 | \r |
4316 | \r |
4317 | void m68k_op_sf_8_pi(void)\r |
4318 | {\r |
4319 | m68ki_write_8(EA_AY_PI_8(), 0);\r |
4320 | }\r |
4321 | \r |
4322 | \r |
4323 | void m68k_op_sf_8_pi7(void)\r |
4324 | {\r |
4325 | m68ki_write_8(EA_A7_PI_8(), 0);\r |
4326 | }\r |
4327 | \r |
4328 | \r |
4329 | void m68k_op_sf_8_pd(void)\r |
4330 | {\r |
4331 | m68ki_write_8(EA_AY_PD_8(), 0);\r |
4332 | }\r |
4333 | \r |
4334 | \r |
4335 | void m68k_op_sf_8_pd7(void)\r |
4336 | {\r |
4337 | m68ki_write_8(EA_A7_PD_8(), 0);\r |
4338 | }\r |
4339 | \r |
4340 | \r |
4341 | void m68k_op_sf_8_di(void)\r |
4342 | {\r |
4343 | m68ki_write_8(EA_AY_DI_8(), 0);\r |
4344 | }\r |
4345 | \r |
4346 | \r |
4347 | void m68k_op_sf_8_ix(void)\r |
4348 | {\r |
4349 | m68ki_write_8(EA_AY_IX_8(), 0);\r |
4350 | }\r |
4351 | \r |
4352 | \r |
4353 | void m68k_op_sf_8_aw(void)\r |
4354 | {\r |
4355 | m68ki_write_8(EA_AW_8(), 0);\r |
4356 | }\r |
4357 | \r |
4358 | \r |
4359 | void m68k_op_sf_8_al(void)\r |
4360 | {\r |
4361 | m68ki_write_8(EA_AL_8(), 0);\r |
4362 | }\r |
4363 | \r |
4364 | \r |
4365 | void m68k_op_shi_8_d(void)\r |
4366 | {\r |
4367 | if(COND_HI())\r |
4368 | {\r |
4369 | DY |= 0xff;\r |
4370 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4371 | return;\r |
4372 | }\r |
4373 | DY &= 0xffffff00;\r |
4374 | }\r |
4375 | \r |
4376 | \r |
4377 | void m68k_op_sls_8_d(void)\r |
4378 | {\r |
4379 | if(COND_LS())\r |
4380 | {\r |
4381 | DY |= 0xff;\r |
4382 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4383 | return;\r |
4384 | }\r |
4385 | DY &= 0xffffff00;\r |
4386 | }\r |
4387 | \r |
4388 | \r |
4389 | void m68k_op_scc_8_d(void)\r |
4390 | {\r |
4391 | if(COND_CC())\r |
4392 | {\r |
4393 | DY |= 0xff;\r |
4394 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4395 | return;\r |
4396 | }\r |
4397 | DY &= 0xffffff00;\r |
4398 | }\r |
4399 | \r |
4400 | \r |
4401 | void m68k_op_scs_8_d(void)\r |
4402 | {\r |
4403 | if(COND_CS())\r |
4404 | {\r |
4405 | DY |= 0xff;\r |
4406 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4407 | return;\r |
4408 | }\r |
4409 | DY &= 0xffffff00;\r |
4410 | }\r |
4411 | \r |
4412 | \r |
4413 | void m68k_op_sne_8_d(void)\r |
4414 | {\r |
4415 | if(COND_NE())\r |
4416 | {\r |
4417 | DY |= 0xff;\r |
4418 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4419 | return;\r |
4420 | }\r |
4421 | DY &= 0xffffff00;\r |
4422 | }\r |
4423 | \r |
4424 | \r |
4425 | void m68k_op_seq_8_d(void)\r |
4426 | {\r |
4427 | if(COND_EQ())\r |
4428 | {\r |
4429 | DY |= 0xff;\r |
4430 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4431 | return;\r |
4432 | }\r |
4433 | DY &= 0xffffff00;\r |
4434 | }\r |
4435 | \r |
4436 | \r |
4437 | void m68k_op_svc_8_d(void)\r |
4438 | {\r |
4439 | if(COND_VC())\r |
4440 | {\r |
4441 | DY |= 0xff;\r |
4442 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4443 | return;\r |
4444 | }\r |
4445 | DY &= 0xffffff00;\r |
4446 | }\r |
4447 | \r |
4448 | \r |
4449 | void m68k_op_svs_8_d(void)\r |
4450 | {\r |
4451 | if(COND_VS())\r |
4452 | {\r |
4453 | DY |= 0xff;\r |
4454 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4455 | return;\r |
4456 | }\r |
4457 | DY &= 0xffffff00;\r |
4458 | }\r |
4459 | \r |
4460 | \r |
4461 | void m68k_op_spl_8_d(void)\r |
4462 | {\r |
4463 | if(COND_PL())\r |
4464 | {\r |
4465 | DY |= 0xff;\r |
4466 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4467 | return;\r |
4468 | }\r |
4469 | DY &= 0xffffff00;\r |
4470 | }\r |
4471 | \r |
4472 | \r |
4473 | void m68k_op_smi_8_d(void)\r |
4474 | {\r |
4475 | if(COND_MI())\r |
4476 | {\r |
4477 | DY |= 0xff;\r |
4478 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4479 | return;\r |
4480 | }\r |
4481 | DY &= 0xffffff00;\r |
4482 | }\r |
4483 | \r |
4484 | \r |
4485 | void m68k_op_sge_8_d(void)\r |
4486 | {\r |
4487 | if(COND_GE())\r |
4488 | {\r |
4489 | DY |= 0xff;\r |
4490 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4491 | return;\r |
4492 | }\r |
4493 | DY &= 0xffffff00;\r |
4494 | }\r |
4495 | \r |
4496 | \r |
4497 | void m68k_op_slt_8_d(void)\r |
4498 | {\r |
4499 | if(COND_LT())\r |
4500 | {\r |
4501 | DY |= 0xff;\r |
4502 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4503 | return;\r |
4504 | }\r |
4505 | DY &= 0xffffff00;\r |
4506 | }\r |
4507 | \r |
4508 | \r |
4509 | void m68k_op_sgt_8_d(void)\r |
4510 | {\r |
4511 | if(COND_GT())\r |
4512 | {\r |
4513 | DY |= 0xff;\r |
4514 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4515 | return;\r |
4516 | }\r |
4517 | DY &= 0xffffff00;\r |
4518 | }\r |
4519 | \r |
4520 | \r |
4521 | void m68k_op_sle_8_d(void)\r |
4522 | {\r |
4523 | if(COND_LE())\r |
4524 | {\r |
4525 | DY |= 0xff;\r |
4526 | USE_CYCLES(CYC_SCC_R_TRUE);\r |
4527 | return;\r |
4528 | }\r |
4529 | DY &= 0xffffff00;\r |
4530 | }\r |
4531 | \r |
4532 | \r |
4533 | void m68k_op_shi_8_ai(void)\r |
4534 | {\r |
4535 | m68ki_write_8(EA_AY_AI_8(), COND_HI() ? 0xff : 0);\r |
4536 | }\r |
4537 | \r |
4538 | \r |
4539 | void m68k_op_shi_8_pi(void)\r |
4540 | {\r |
4541 | m68ki_write_8(EA_AY_PI_8(), COND_HI() ? 0xff : 0);\r |
4542 | }\r |
4543 | \r |
4544 | \r |
4545 | void m68k_op_shi_8_pi7(void)\r |
4546 | {\r |
4547 | m68ki_write_8(EA_A7_PI_8(), COND_HI() ? 0xff : 0);\r |
4548 | }\r |
4549 | \r |
4550 | \r |
4551 | void m68k_op_shi_8_pd(void)\r |
4552 | {\r |
4553 | m68ki_write_8(EA_AY_PD_8(), COND_HI() ? 0xff : 0);\r |
4554 | }\r |
4555 | \r |
4556 | \r |
4557 | void m68k_op_shi_8_pd7(void)\r |
4558 | {\r |
4559 | m68ki_write_8(EA_A7_PD_8(), COND_HI() ? 0xff : 0);\r |
4560 | }\r |
4561 | \r |
4562 | \r |
4563 | void m68k_op_shi_8_di(void)\r |
4564 | {\r |
4565 | m68ki_write_8(EA_AY_DI_8(), COND_HI() ? 0xff : 0);\r |
4566 | }\r |
4567 | \r |
4568 | \r |
4569 | void m68k_op_shi_8_ix(void)\r |
4570 | {\r |
4571 | m68ki_write_8(EA_AY_IX_8(), COND_HI() ? 0xff : 0);\r |
4572 | }\r |
4573 | \r |
4574 | \r |
4575 | void m68k_op_shi_8_aw(void)\r |
4576 | {\r |
4577 | m68ki_write_8(EA_AW_8(), COND_HI() ? 0xff : 0);\r |
4578 | }\r |
4579 | \r |
4580 | \r |
4581 | void m68k_op_shi_8_al(void)\r |
4582 | {\r |
4583 | m68ki_write_8(EA_AL_8(), COND_HI() ? 0xff : 0);\r |
4584 | }\r |
4585 | \r |
4586 | \r |
4587 | void m68k_op_sls_8_ai(void)\r |
4588 | {\r |
4589 | m68ki_write_8(EA_AY_AI_8(), COND_LS() ? 0xff : 0);\r |
4590 | }\r |
4591 | \r |
4592 | \r |
4593 | void m68k_op_sls_8_pi(void)\r |
4594 | {\r |
4595 | m68ki_write_8(EA_AY_PI_8(), COND_LS() ? 0xff : 0);\r |
4596 | }\r |
4597 | \r |
4598 | \r |
4599 | void m68k_op_sls_8_pi7(void)\r |
4600 | {\r |
4601 | m68ki_write_8(EA_A7_PI_8(), COND_LS() ? 0xff : 0);\r |
4602 | }\r |
4603 | \r |
4604 | \r |
4605 | void m68k_op_sls_8_pd(void)\r |
4606 | {\r |
4607 | m68ki_write_8(EA_AY_PD_8(), COND_LS() ? 0xff : 0);\r |
4608 | }\r |
4609 | \r |
4610 | \r |
4611 | void m68k_op_sls_8_pd7(void)\r |
4612 | {\r |
4613 | m68ki_write_8(EA_A7_PD_8(), COND_LS() ? 0xff : 0);\r |
4614 | }\r |
4615 | \r |
4616 | \r |
4617 | void m68k_op_sls_8_di(void)\r |
4618 | {\r |
4619 | m68ki_write_8(EA_AY_DI_8(), COND_LS() ? 0xff : 0);\r |
4620 | }\r |
4621 | \r |
4622 | \r |
4623 | void m68k_op_sls_8_ix(void)\r |
4624 | {\r |
4625 | m68ki_write_8(EA_AY_IX_8(), COND_LS() ? 0xff : 0);\r |
4626 | }\r |
4627 | \r |
4628 | \r |
4629 | void m68k_op_sls_8_aw(void)\r |
4630 | {\r |
4631 | m68ki_write_8(EA_AW_8(), COND_LS() ? 0xff : 0);\r |
4632 | }\r |
4633 | \r |
4634 | \r |
4635 | void m68k_op_sls_8_al(void)\r |
4636 | {\r |
4637 | m68ki_write_8(EA_AL_8(), COND_LS() ? 0xff : 0);\r |
4638 | }\r |
4639 | \r |
4640 | \r |
4641 | void m68k_op_scc_8_ai(void)\r |
4642 | {\r |
4643 | m68ki_write_8(EA_AY_AI_8(), COND_CC() ? 0xff : 0);\r |
4644 | }\r |
4645 | \r |
4646 | \r |
4647 | void m68k_op_scc_8_pi(void)\r |
4648 | {\r |
4649 | m68ki_write_8(EA_AY_PI_8(), COND_CC() ? 0xff : 0);\r |
4650 | }\r |
4651 | \r |
4652 | \r |
4653 | void m68k_op_scc_8_pi7(void)\r |
4654 | {\r |
4655 | m68ki_write_8(EA_A7_PI_8(), COND_CC() ? 0xff : 0);\r |
4656 | }\r |
4657 | \r |
4658 | \r |
4659 | void m68k_op_scc_8_pd(void)\r |
4660 | {\r |
4661 | m68ki_write_8(EA_AY_PD_8(), COND_CC() ? 0xff : 0);\r |
4662 | }\r |
4663 | \r |
4664 | \r |
4665 | void m68k_op_scc_8_pd7(void)\r |
4666 | {\r |
4667 | m68ki_write_8(EA_A7_PD_8(), COND_CC() ? 0xff : 0);\r |
4668 | }\r |
4669 | \r |
4670 | \r |
4671 | void m68k_op_scc_8_di(void)\r |
4672 | {\r |
4673 | m68ki_write_8(EA_AY_DI_8(), COND_CC() ? 0xff : 0);\r |
4674 | }\r |
4675 | \r |
4676 | \r |
4677 | void m68k_op_scc_8_ix(void)\r |
4678 | {\r |
4679 | m68ki_write_8(EA_AY_IX_8(), COND_CC() ? 0xff : 0);\r |
4680 | }\r |
4681 | \r |
4682 | \r |
4683 | void m68k_op_scc_8_aw(void)\r |
4684 | {\r |
4685 | m68ki_write_8(EA_AW_8(), COND_CC() ? 0xff : 0);\r |
4686 | }\r |
4687 | \r |
4688 | \r |
4689 | void m68k_op_scc_8_al(void)\r |
4690 | {\r |
4691 | m68ki_write_8(EA_AL_8(), COND_CC() ? 0xff : 0);\r |
4692 | }\r |
4693 | \r |
4694 | \r |
4695 | void m68k_op_scs_8_ai(void)\r |
4696 | {\r |
4697 | m68ki_write_8(EA_AY_AI_8(), COND_CS() ? 0xff : 0);\r |
4698 | }\r |
4699 | \r |
4700 | \r |
4701 | void m68k_op_scs_8_pi(void)\r |
4702 | {\r |
4703 | m68ki_write_8(EA_AY_PI_8(), COND_CS() ? 0xff : 0);\r |
4704 | }\r |
4705 | \r |
4706 | \r |
4707 | void m68k_op_scs_8_pi7(void)\r |
4708 | {\r |
4709 | m68ki_write_8(EA_A7_PI_8(), COND_CS() ? 0xff : 0);\r |
4710 | }\r |
4711 | \r |
4712 | \r |
4713 | void m68k_op_scs_8_pd(void)\r |
4714 | {\r |
4715 | m68ki_write_8(EA_AY_PD_8(), COND_CS() ? 0xff : 0);\r |
4716 | }\r |
4717 | \r |
4718 | \r |
4719 | void m68k_op_scs_8_pd7(void)\r |
4720 | {\r |
4721 | m68ki_write_8(EA_A7_PD_8(), COND_CS() ? 0xff : 0);\r |
4722 | }\r |
4723 | \r |
4724 | \r |
4725 | void m68k_op_scs_8_di(void)\r |
4726 | {\r |
4727 | m68ki_write_8(EA_AY_DI_8(), COND_CS() ? 0xff : 0);\r |
4728 | }\r |
4729 | \r |
4730 | \r |
4731 | void m68k_op_scs_8_ix(void)\r |
4732 | {\r |
4733 | m68ki_write_8(EA_AY_IX_8(), COND_CS() ? 0xff : 0);\r |
4734 | }\r |
4735 | \r |
4736 | \r |
4737 | void m68k_op_scs_8_aw(void)\r |
4738 | {\r |
4739 | m68ki_write_8(EA_AW_8(), COND_CS() ? 0xff : 0);\r |
4740 | }\r |
4741 | \r |
4742 | \r |
4743 | void m68k_op_scs_8_al(void)\r |
4744 | {\r |
4745 | m68ki_write_8(EA_AL_8(), COND_CS() ? 0xff : 0);\r |
4746 | }\r |
4747 | \r |
4748 | \r |
4749 | void m68k_op_sne_8_ai(void)\r |
4750 | {\r |
4751 | m68ki_write_8(EA_AY_AI_8(), COND_NE() ? 0xff : 0);\r |
4752 | }\r |
4753 | \r |
4754 | \r |
4755 | void m68k_op_sne_8_pi(void)\r |
4756 | {\r |
4757 | m68ki_write_8(EA_AY_PI_8(), COND_NE() ? 0xff : 0);\r |
4758 | }\r |
4759 | \r |
4760 | \r |
4761 | void m68k_op_sne_8_pi7(void)\r |
4762 | {\r |
4763 | m68ki_write_8(EA_A7_PI_8(), COND_NE() ? 0xff : 0);\r |
4764 | }\r |
4765 | \r |
4766 | \r |
4767 | void m68k_op_sne_8_pd(void)\r |
4768 | {\r |
4769 | m68ki_write_8(EA_AY_PD_8(), COND_NE() ? 0xff : 0);\r |
4770 | }\r |
4771 | \r |
4772 | \r |
4773 | void m68k_op_sne_8_pd7(void)\r |
4774 | {\r |
4775 | m68ki_write_8(EA_A7_PD_8(), COND_NE() ? 0xff : 0);\r |
4776 | }\r |
4777 | \r |
4778 | \r |
4779 | void m68k_op_sne_8_di(void)\r |
4780 | {\r |
4781 | m68ki_write_8(EA_AY_DI_8(), COND_NE() ? 0xff : 0);\r |
4782 | }\r |
4783 | \r |
4784 | \r |
4785 | void m68k_op_sne_8_ix(void)\r |
4786 | {\r |
4787 | m68ki_write_8(EA_AY_IX_8(), COND_NE() ? 0xff : 0);\r |
4788 | }\r |
4789 | \r |
4790 | \r |
4791 | void m68k_op_sne_8_aw(void)\r |
4792 | {\r |
4793 | m68ki_write_8(EA_AW_8(), COND_NE() ? 0xff : 0);\r |
4794 | }\r |
4795 | \r |
4796 | \r |
4797 | void m68k_op_sne_8_al(void)\r |
4798 | {\r |
4799 | m68ki_write_8(EA_AL_8(), COND_NE() ? 0xff : 0);\r |
4800 | }\r |
4801 | \r |
4802 | \r |
4803 | void m68k_op_seq_8_ai(void)\r |
4804 | {\r |
4805 | m68ki_write_8(EA_AY_AI_8(), COND_EQ() ? 0xff : 0);\r |
4806 | }\r |
4807 | \r |
4808 | \r |
4809 | void m68k_op_seq_8_pi(void)\r |
4810 | {\r |
4811 | m68ki_write_8(EA_AY_PI_8(), COND_EQ() ? 0xff : 0);\r |
4812 | }\r |
4813 | \r |
4814 | \r |
4815 | void m68k_op_seq_8_pi7(void)\r |
4816 | {\r |
4817 | m68ki_write_8(EA_A7_PI_8(), COND_EQ() ? 0xff : 0);\r |
4818 | }\r |
4819 | \r |
4820 | \r |
4821 | void m68k_op_seq_8_pd(void)\r |
4822 | {\r |
4823 | m68ki_write_8(EA_AY_PD_8(), COND_EQ() ? 0xff : 0);\r |
4824 | }\r |
4825 | \r |
4826 | \r |
4827 | void m68k_op_seq_8_pd7(void)\r |
4828 | {\r |
4829 | m68ki_write_8(EA_A7_PD_8(), COND_EQ() ? 0xff : 0);\r |
4830 | }\r |
4831 | \r |
4832 | \r |
4833 | void m68k_op_seq_8_di(void)\r |
4834 | {\r |
4835 | m68ki_write_8(EA_AY_DI_8(), COND_EQ() ? 0xff : 0);\r |
4836 | }\r |
4837 | \r |
4838 | \r |
4839 | void m68k_op_seq_8_ix(void)\r |
4840 | {\r |
4841 | m68ki_write_8(EA_AY_IX_8(), COND_EQ() ? 0xff : 0);\r |
4842 | }\r |
4843 | \r |
4844 | \r |
4845 | void m68k_op_seq_8_aw(void)\r |
4846 | {\r |
4847 | m68ki_write_8(EA_AW_8(), COND_EQ() ? 0xff : 0);\r |
4848 | }\r |
4849 | \r |
4850 | \r |
4851 | void m68k_op_seq_8_al(void)\r |
4852 | {\r |
4853 | m68ki_write_8(EA_AL_8(), COND_EQ() ? 0xff : 0);\r |
4854 | }\r |
4855 | \r |
4856 | \r |
4857 | void m68k_op_svc_8_ai(void)\r |
4858 | {\r |
4859 | m68ki_write_8(EA_AY_AI_8(), COND_VC() ? 0xff : 0);\r |
4860 | }\r |
4861 | \r |
4862 | \r |
4863 | void m68k_op_svc_8_pi(void)\r |
4864 | {\r |
4865 | m68ki_write_8(EA_AY_PI_8(), COND_VC() ? 0xff : 0);\r |
4866 | }\r |
4867 | \r |
4868 | \r |
4869 | void m68k_op_svc_8_pi7(void)\r |
4870 | {\r |
4871 | m68ki_write_8(EA_A7_PI_8(), COND_VC() ? 0xff : 0);\r |
4872 | }\r |
4873 | \r |
4874 | \r |
4875 | void m68k_op_svc_8_pd(void)\r |
4876 | {\r |
4877 | m68ki_write_8(EA_AY_PD_8(), COND_VC() ? 0xff : 0);\r |
4878 | }\r |
4879 | \r |
4880 | \r |
4881 | void m68k_op_svc_8_pd7(void)\r |
4882 | {\r |
4883 | m68ki_write_8(EA_A7_PD_8(), COND_VC() ? 0xff : 0);\r |
4884 | }\r |
4885 | \r |
4886 | \r |
4887 | void m68k_op_svc_8_di(void)\r |
4888 | {\r |
4889 | m68ki_write_8(EA_AY_DI_8(), COND_VC() ? 0xff : 0);\r |
4890 | }\r |
4891 | \r |
4892 | \r |
4893 | void m68k_op_svc_8_ix(void)\r |
4894 | {\r |
4895 | m68ki_write_8(EA_AY_IX_8(), COND_VC() ? 0xff : 0);\r |
4896 | }\r |
4897 | \r |
4898 | \r |
4899 | void m68k_op_svc_8_aw(void)\r |
4900 | {\r |
4901 | m68ki_write_8(EA_AW_8(), COND_VC() ? 0xff : 0);\r |
4902 | }\r |
4903 | \r |
4904 | \r |
4905 | void m68k_op_svc_8_al(void)\r |
4906 | {\r |
4907 | m68ki_write_8(EA_AL_8(), COND_VC() ? 0xff : 0);\r |
4908 | }\r |
4909 | \r |
4910 | \r |
4911 | void m68k_op_svs_8_ai(void)\r |
4912 | {\r |
4913 | m68ki_write_8(EA_AY_AI_8(), COND_VS() ? 0xff : 0);\r |
4914 | }\r |
4915 | \r |
4916 | \r |
4917 | void m68k_op_svs_8_pi(void)\r |
4918 | {\r |
4919 | m68ki_write_8(EA_AY_PI_8(), COND_VS() ? 0xff : 0);\r |
4920 | }\r |
4921 | \r |
4922 | \r |
4923 | void m68k_op_svs_8_pi7(void)\r |
4924 | {\r |
4925 | m68ki_write_8(EA_A7_PI_8(), COND_VS() ? 0xff : 0);\r |
4926 | }\r |
4927 | \r |
4928 | \r |
4929 | void m68k_op_svs_8_pd(void)\r |
4930 | {\r |
4931 | m68ki_write_8(EA_AY_PD_8(), COND_VS() ? 0xff : 0);\r |
4932 | }\r |
4933 | \r |
4934 | \r |
4935 | void m68k_op_svs_8_pd7(void)\r |
4936 | {\r |
4937 | m68ki_write_8(EA_A7_PD_8(), COND_VS() ? 0xff : 0);\r |
4938 | }\r |
4939 | \r |
4940 | \r |
4941 | void m68k_op_svs_8_di(void)\r |
4942 | {\r |
4943 | m68ki_write_8(EA_AY_DI_8(), COND_VS() ? 0xff : 0);\r |
4944 | }\r |
4945 | \r |
4946 | \r |
4947 | void m68k_op_svs_8_ix(void)\r |
4948 | {\r |
4949 | m68ki_write_8(EA_AY_IX_8(), COND_VS() ? 0xff : 0);\r |
4950 | }\r |
4951 | \r |
4952 | \r |
4953 | void m68k_op_svs_8_aw(void)\r |
4954 | {\r |
4955 | m68ki_write_8(EA_AW_8(), COND_VS() ? 0xff : 0);\r |
4956 | }\r |
4957 | \r |
4958 | \r |
4959 | void m68k_op_svs_8_al(void)\r |
4960 | {\r |
4961 | m68ki_write_8(EA_AL_8(), COND_VS() ? 0xff : 0);\r |
4962 | }\r |
4963 | \r |
4964 | \r |
4965 | void m68k_op_spl_8_ai(void)\r |
4966 | {\r |
4967 | m68ki_write_8(EA_AY_AI_8(), COND_PL() ? 0xff : 0);\r |
4968 | }\r |
4969 | \r |
4970 | \r |
4971 | void m68k_op_spl_8_pi(void)\r |
4972 | {\r |
4973 | m68ki_write_8(EA_AY_PI_8(), COND_PL() ? 0xff : 0);\r |
4974 | }\r |
4975 | \r |
4976 | \r |
4977 | void m68k_op_spl_8_pi7(void)\r |
4978 | {\r |
4979 | m68ki_write_8(EA_A7_PI_8(), COND_PL() ? 0xff : 0);\r |
4980 | }\r |
4981 | \r |
4982 | \r |
4983 | void m68k_op_spl_8_pd(void)\r |
4984 | {\r |
4985 | m68ki_write_8(EA_AY_PD_8(), COND_PL() ? 0xff : 0);\r |
4986 | }\r |
4987 | \r |
4988 | \r |
4989 | void m68k_op_spl_8_pd7(void)\r |
4990 | {\r |
4991 | m68ki_write_8(EA_A7_PD_8(), COND_PL() ? 0xff : 0);\r |
4992 | }\r |
4993 | \r |
4994 | \r |
4995 | void m68k_op_spl_8_di(void)\r |
4996 | {\r |
4997 | m68ki_write_8(EA_AY_DI_8(), COND_PL() ? 0xff : 0);\r |
4998 | }\r |
4999 | \r |
5000 | \r |
5001 | void m68k_op_spl_8_ix(void)\r |
5002 | {\r |
5003 | m68ki_write_8(EA_AY_IX_8(), COND_PL() ? 0xff : 0);\r |
5004 | }\r |
5005 | \r |
5006 | \r |
5007 | void m68k_op_spl_8_aw(void)\r |
5008 | {\r |
5009 | m68ki_write_8(EA_AW_8(), COND_PL() ? 0xff : 0);\r |
5010 | }\r |
5011 | \r |
5012 | \r |
5013 | void m68k_op_spl_8_al(void)\r |
5014 | {\r |
5015 | m68ki_write_8(EA_AL_8(), COND_PL() ? 0xff : 0);\r |
5016 | }\r |
5017 | \r |
5018 | \r |
5019 | void m68k_op_smi_8_ai(void)\r |
5020 | {\r |
5021 | m68ki_write_8(EA_AY_AI_8(), COND_MI() ? 0xff : 0);\r |
5022 | }\r |
5023 | \r |
5024 | \r |
5025 | void m68k_op_smi_8_pi(void)\r |
5026 | {\r |
5027 | m68ki_write_8(EA_AY_PI_8(), COND_MI() ? 0xff : 0);\r |
5028 | }\r |
5029 | \r |
5030 | \r |
5031 | void m68k_op_smi_8_pi7(void)\r |
5032 | {\r |
5033 | m68ki_write_8(EA_A7_PI_8(), COND_MI() ? 0xff : 0);\r |
5034 | }\r |
5035 | \r |
5036 | \r |
5037 | void m68k_op_smi_8_pd(void)\r |
5038 | {\r |
5039 | m68ki_write_8(EA_AY_PD_8(), COND_MI() ? 0xff : 0);\r |
5040 | }\r |
5041 | \r |
5042 | \r |
5043 | void m68k_op_smi_8_pd7(void)\r |
5044 | {\r |
5045 | m68ki_write_8(EA_A7_PD_8(), COND_MI() ? 0xff : 0);\r |
5046 | }\r |
5047 | \r |
5048 | \r |
5049 | void m68k_op_smi_8_di(void)\r |
5050 | {\r |
5051 | m68ki_write_8(EA_AY_DI_8(), COND_MI() ? 0xff : 0);\r |
5052 | }\r |
5053 | \r |
5054 | \r |
5055 | void m68k_op_smi_8_ix(void)\r |
5056 | {\r |
5057 | m68ki_write_8(EA_AY_IX_8(), COND_MI() ? 0xff : 0);\r |
5058 | }\r |
5059 | \r |
5060 | \r |
5061 | void m68k_op_smi_8_aw(void)\r |
5062 | {\r |
5063 | m68ki_write_8(EA_AW_8(), COND_MI() ? 0xff : 0);\r |
5064 | }\r |
5065 | \r |
5066 | \r |
5067 | void m68k_op_smi_8_al(void)\r |
5068 | {\r |
5069 | m68ki_write_8(EA_AL_8(), COND_MI() ? 0xff : 0);\r |
5070 | }\r |
5071 | \r |
5072 | \r |
5073 | void m68k_op_sge_8_ai(void)\r |
5074 | {\r |
5075 | m68ki_write_8(EA_AY_AI_8(), COND_GE() ? 0xff : 0);\r |
5076 | }\r |
5077 | \r |
5078 | \r |
5079 | void m68k_op_sge_8_pi(void)\r |
5080 | {\r |
5081 | m68ki_write_8(EA_AY_PI_8(), COND_GE() ? 0xff : 0);\r |
5082 | }\r |
5083 | \r |
5084 | \r |
5085 | void m68k_op_sge_8_pi7(void)\r |
5086 | {\r |
5087 | m68ki_write_8(EA_A7_PI_8(), COND_GE() ? 0xff : 0);\r |
5088 | }\r |
5089 | \r |
5090 | \r |
5091 | void m68k_op_sge_8_pd(void)\r |
5092 | {\r |
5093 | m68ki_write_8(EA_AY_PD_8(), COND_GE() ? 0xff : 0);\r |
5094 | }\r |
5095 | \r |
5096 | \r |
5097 | void m68k_op_sge_8_pd7(void)\r |
5098 | {\r |
5099 | m68ki_write_8(EA_A7_PD_8(), COND_GE() ? 0xff : 0);\r |
5100 | }\r |
5101 | \r |
5102 | \r |
5103 | void m68k_op_sge_8_di(void)\r |
5104 | {\r |
5105 | m68ki_write_8(EA_AY_DI_8(), COND_GE() ? 0xff : 0);\r |
5106 | }\r |
5107 | \r |
5108 | \r |
5109 | void m68k_op_sge_8_ix(void)\r |
5110 | {\r |
5111 | m68ki_write_8(EA_AY_IX_8(), COND_GE() ? 0xff : 0);\r |
5112 | }\r |
5113 | \r |
5114 | \r |
5115 | void m68k_op_sge_8_aw(void)\r |
5116 | {\r |
5117 | m68ki_write_8(EA_AW_8(), COND_GE() ? 0xff : 0);\r |
5118 | }\r |
5119 | \r |
5120 | \r |
5121 | void m68k_op_sge_8_al(void)\r |
5122 | {\r |
5123 | m68ki_write_8(EA_AL_8(), COND_GE() ? 0xff : 0);\r |
5124 | }\r |
5125 | \r |
5126 | \r |
5127 | void m68k_op_slt_8_ai(void)\r |
5128 | {\r |
5129 | m68ki_write_8(EA_AY_AI_8(), COND_LT() ? 0xff : 0);\r |
5130 | }\r |
5131 | \r |
5132 | \r |
5133 | void m68k_op_slt_8_pi(void)\r |
5134 | {\r |
5135 | m68ki_write_8(EA_AY_PI_8(), COND_LT() ? 0xff : 0);\r |
5136 | }\r |
5137 | \r |
5138 | \r |
5139 | void m68k_op_slt_8_pi7(void)\r |
5140 | {\r |
5141 | m68ki_write_8(EA_A7_PI_8(), COND_LT() ? 0xff : 0);\r |
5142 | }\r |
5143 | \r |
5144 | \r |
5145 | void m68k_op_slt_8_pd(void)\r |
5146 | {\r |
5147 | m68ki_write_8(EA_AY_PD_8(), COND_LT() ? 0xff : 0);\r |
5148 | }\r |
5149 | \r |
5150 | \r |
5151 | void m68k_op_slt_8_pd7(void)\r |
5152 | {\r |
5153 | m68ki_write_8(EA_A7_PD_8(), COND_LT() ? 0xff : 0);\r |
5154 | }\r |
5155 | \r |
5156 | \r |
5157 | void m68k_op_slt_8_di(void)\r |
5158 | {\r |
5159 | m68ki_write_8(EA_AY_DI_8(), COND_LT() ? 0xff : 0);\r |
5160 | }\r |
5161 | \r |
5162 | \r |
5163 | void m68k_op_slt_8_ix(void)\r |
5164 | {\r |
5165 | m68ki_write_8(EA_AY_IX_8(), COND_LT() ? 0xff : 0);\r |
5166 | }\r |
5167 | \r |
5168 | \r |
5169 | void m68k_op_slt_8_aw(void)\r |
5170 | {\r |
5171 | m68ki_write_8(EA_AW_8(), COND_LT() ? 0xff : 0);\r |
5172 | }\r |
5173 | \r |
5174 | \r |
5175 | void m68k_op_slt_8_al(void)\r |
5176 | {\r |
5177 | m68ki_write_8(EA_AL_8(), COND_LT() ? 0xff : 0);\r |
5178 | }\r |
5179 | \r |
5180 | \r |
5181 | void m68k_op_sgt_8_ai(void)\r |
5182 | {\r |
5183 | m68ki_write_8(EA_AY_AI_8(), COND_GT() ? 0xff : 0);\r |
5184 | }\r |
5185 | \r |
5186 | \r |
5187 | void m68k_op_sgt_8_pi(void)\r |
5188 | {\r |
5189 | m68ki_write_8(EA_AY_PI_8(), COND_GT() ? 0xff : 0);\r |
5190 | }\r |
5191 | \r |
5192 | \r |
5193 | void m68k_op_sgt_8_pi7(void)\r |
5194 | {\r |
5195 | m68ki_write_8(EA_A7_PI_8(), COND_GT() ? 0xff : 0);\r |
5196 | }\r |
5197 | \r |
5198 | \r |
5199 | void m68k_op_sgt_8_pd(void)\r |
5200 | {\r |
5201 | m68ki_write_8(EA_AY_PD_8(), COND_GT() ? 0xff : 0);\r |
5202 | }\r |
5203 | \r |
5204 | \r |
5205 | void m68k_op_sgt_8_pd7(void)\r |
5206 | {\r |
5207 | m68ki_write_8(EA_A7_PD_8(), COND_GT() ? 0xff : 0);\r |
5208 | }\r |
5209 | \r |
5210 | \r |
5211 | void m68k_op_sgt_8_di(void)\r |
5212 | {\r |
5213 | m68ki_write_8(EA_AY_DI_8(), COND_GT() ? 0xff : 0);\r |
5214 | }\r |
5215 | \r |
5216 | \r |
5217 | void m68k_op_sgt_8_ix(void)\r |
5218 | {\r |
5219 | m68ki_write_8(EA_AY_IX_8(), COND_GT() ? 0xff : 0);\r |
5220 | }\r |
5221 | \r |
5222 | \r |
5223 | void m68k_op_sgt_8_aw(void)\r |
5224 | {\r |
5225 | m68ki_write_8(EA_AW_8(), COND_GT() ? 0xff : 0);\r |
5226 | }\r |
5227 | \r |
5228 | \r |
5229 | void m68k_op_sgt_8_al(void)\r |
5230 | {\r |
5231 | m68ki_write_8(EA_AL_8(), COND_GT() ? 0xff : 0);\r |
5232 | }\r |
5233 | \r |
5234 | \r |
5235 | void m68k_op_sle_8_ai(void)\r |
5236 | {\r |
5237 | m68ki_write_8(EA_AY_AI_8(), COND_LE() ? 0xff : 0);\r |
5238 | }\r |
5239 | \r |
5240 | \r |
5241 | void m68k_op_sle_8_pi(void)\r |
5242 | {\r |
5243 | m68ki_write_8(EA_AY_PI_8(), COND_LE() ? 0xff : 0);\r |
5244 | }\r |
5245 | \r |
5246 | \r |
5247 | void m68k_op_sle_8_pi7(void)\r |
5248 | {\r |
5249 | m68ki_write_8(EA_A7_PI_8(), COND_LE() ? 0xff : 0);\r |
5250 | }\r |
5251 | \r |
5252 | \r |
5253 | void m68k_op_sle_8_pd(void)\r |
5254 | {\r |
5255 | m68ki_write_8(EA_AY_PD_8(), COND_LE() ? 0xff : 0);\r |
5256 | }\r |
5257 | \r |
5258 | \r |
5259 | void m68k_op_sle_8_pd7(void)\r |
5260 | {\r |
5261 | m68ki_write_8(EA_A7_PD_8(), COND_LE() ? 0xff : 0);\r |
5262 | }\r |
5263 | \r |
5264 | \r |
5265 | void m68k_op_sle_8_di(void)\r |
5266 | {\r |
5267 | m68ki_write_8(EA_AY_DI_8(), COND_LE() ? 0xff : 0);\r |
5268 | }\r |
5269 | \r |
5270 | \r |
5271 | void m68k_op_sle_8_ix(void)\r |
5272 | {\r |
5273 | m68ki_write_8(EA_AY_IX_8(), COND_LE() ? 0xff : 0);\r |
5274 | }\r |
5275 | \r |
5276 | \r |
5277 | void m68k_op_sle_8_aw(void)\r |
5278 | {\r |
5279 | m68ki_write_8(EA_AW_8(), COND_LE() ? 0xff : 0);\r |
5280 | }\r |
5281 | \r |
5282 | \r |
5283 | void m68k_op_sle_8_al(void)\r |
5284 | {\r |
5285 | m68ki_write_8(EA_AL_8(), COND_LE() ? 0xff : 0);\r |
5286 | }\r |
5287 | \r |
5288 | \r |
5289 | void m68k_op_stop(void)\r |
5290 | {\r |
5291 | if(FLAG_S)\r |
5292 | {\r |
5293 | uint new_sr = OPER_I_16();\r |
5294 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */\r |
5295 | CPU_STOPPED |= STOP_LEVEL_STOP;\r |
5296 | m68ki_set_sr(new_sr);\r |
5297 | m68ki_remaining_cycles = 0;\r |
5298 | return;\r |
5299 | }\r |
5300 | m68ki_exception_privilege_violation();\r |
5301 | }\r |
5302 | \r |
5303 | \r |
5304 | void m68k_op_sub_8_er_d(void)\r |
5305 | {\r |
5306 | uint* r_dst = &DX;\r |
5307 | uint src = MASK_OUT_ABOVE_8(DY);\r |
5308 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5309 | uint res = dst - src;\r |
5310 | \r |
5311 | FLAG_N = NFLAG_8(res);\r |
5312 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5313 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5314 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5315 | \r |
5316 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5317 | }\r |
5318 | \r |
5319 | \r |
5320 | void m68k_op_sub_8_er_ai(void)\r |
5321 | {\r |
5322 | uint* r_dst = &DX;\r |
5323 | uint src = OPER_AY_AI_8();\r |
5324 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5325 | uint res = dst - src;\r |
5326 | \r |
5327 | FLAG_N = NFLAG_8(res);\r |
5328 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5329 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5330 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5331 | \r |
5332 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5333 | }\r |
5334 | \r |
5335 | \r |
5336 | void m68k_op_sub_8_er_pi(void)\r |
5337 | {\r |
5338 | uint* r_dst = &DX;\r |
5339 | uint src = OPER_AY_PI_8();\r |
5340 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5341 | uint res = dst - src;\r |
5342 | \r |
5343 | FLAG_N = NFLAG_8(res);\r |
5344 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5345 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5346 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5347 | \r |
5348 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5349 | }\r |
5350 | \r |
5351 | \r |
5352 | void m68k_op_sub_8_er_pi7(void)\r |
5353 | {\r |
5354 | uint* r_dst = &DX;\r |
5355 | uint src = OPER_A7_PI_8();\r |
5356 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5357 | uint res = dst - src;\r |
5358 | \r |
5359 | FLAG_N = NFLAG_8(res);\r |
5360 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5361 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5362 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5363 | \r |
5364 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5365 | }\r |
5366 | \r |
5367 | \r |
5368 | void m68k_op_sub_8_er_pd(void)\r |
5369 | {\r |
5370 | uint* r_dst = &DX;\r |
5371 | uint src = OPER_AY_PD_8();\r |
5372 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5373 | uint res = dst - src;\r |
5374 | \r |
5375 | FLAG_N = NFLAG_8(res);\r |
5376 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5377 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5378 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5379 | \r |
5380 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5381 | }\r |
5382 | \r |
5383 | \r |
5384 | void m68k_op_sub_8_er_pd7(void)\r |
5385 | {\r |
5386 | uint* r_dst = &DX;\r |
5387 | uint src = OPER_A7_PD_8();\r |
5388 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5389 | uint res = dst - src;\r |
5390 | \r |
5391 | FLAG_N = NFLAG_8(res);\r |
5392 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5393 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5394 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5395 | \r |
5396 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5397 | }\r |
5398 | \r |
5399 | \r |
5400 | void m68k_op_sub_8_er_di(void)\r |
5401 | {\r |
5402 | uint* r_dst = &DX;\r |
5403 | uint src = OPER_AY_DI_8();\r |
5404 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5405 | uint res = dst - src;\r |
5406 | \r |
5407 | FLAG_N = NFLAG_8(res);\r |
5408 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5409 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5410 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5411 | \r |
5412 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5413 | }\r |
5414 | \r |
5415 | \r |
5416 | void m68k_op_sub_8_er_ix(void)\r |
5417 | {\r |
5418 | uint* r_dst = &DX;\r |
5419 | uint src = OPER_AY_IX_8();\r |
5420 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5421 | uint res = dst - src;\r |
5422 | \r |
5423 | FLAG_N = NFLAG_8(res);\r |
5424 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5425 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5426 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5427 | \r |
5428 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5429 | }\r |
5430 | \r |
5431 | \r |
5432 | void m68k_op_sub_8_er_aw(void)\r |
5433 | {\r |
5434 | uint* r_dst = &DX;\r |
5435 | uint src = OPER_AW_8();\r |
5436 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5437 | uint res = dst - src;\r |
5438 | \r |
5439 | FLAG_N = NFLAG_8(res);\r |
5440 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5441 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5442 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5443 | \r |
5444 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5445 | }\r |
5446 | \r |
5447 | \r |
5448 | void m68k_op_sub_8_er_al(void)\r |
5449 | {\r |
5450 | uint* r_dst = &DX;\r |
5451 | uint src = OPER_AL_8();\r |
5452 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5453 | uint res = dst - src;\r |
5454 | \r |
5455 | FLAG_N = NFLAG_8(res);\r |
5456 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5457 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5458 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5459 | \r |
5460 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5461 | }\r |
5462 | \r |
5463 | \r |
5464 | void m68k_op_sub_8_er_pcdi(void)\r |
5465 | {\r |
5466 | uint* r_dst = &DX;\r |
5467 | uint src = OPER_PCDI_8();\r |
5468 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5469 | uint res = dst - src;\r |
5470 | \r |
5471 | FLAG_N = NFLAG_8(res);\r |
5472 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5473 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5474 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5475 | \r |
5476 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5477 | }\r |
5478 | \r |
5479 | \r |
5480 | void m68k_op_sub_8_er_pcix(void)\r |
5481 | {\r |
5482 | uint* r_dst = &DX;\r |
5483 | uint src = OPER_PCIX_8();\r |
5484 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5485 | uint res = dst - src;\r |
5486 | \r |
5487 | FLAG_N = NFLAG_8(res);\r |
5488 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5489 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5490 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5491 | \r |
5492 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5493 | }\r |
5494 | \r |
5495 | \r |
5496 | void m68k_op_sub_8_er_i(void)\r |
5497 | {\r |
5498 | uint* r_dst = &DX;\r |
5499 | uint src = OPER_I_8();\r |
5500 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
5501 | uint res = dst - src;\r |
5502 | \r |
5503 | FLAG_N = NFLAG_8(res);\r |
5504 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5505 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5506 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5507 | \r |
5508 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
5509 | }\r |
5510 | \r |
5511 | \r |
5512 | void m68k_op_sub_16_er_d(void)\r |
5513 | {\r |
5514 | uint* r_dst = &DX;\r |
5515 | uint src = MASK_OUT_ABOVE_16(DY);\r |
5516 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5517 | uint res = dst - src;\r |
5518 | \r |
5519 | FLAG_N = NFLAG_16(res);\r |
5520 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5521 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5522 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5523 | \r |
5524 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5525 | }\r |
5526 | \r |
5527 | \r |
5528 | void m68k_op_sub_16_er_a(void)\r |
5529 | {\r |
5530 | uint* r_dst = &DX;\r |
5531 | uint src = MASK_OUT_ABOVE_16(AY);\r |
5532 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5533 | uint res = dst - src;\r |
5534 | \r |
5535 | FLAG_N = NFLAG_16(res);\r |
5536 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5537 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5538 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5539 | \r |
5540 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5541 | }\r |
5542 | \r |
5543 | \r |
5544 | void m68k_op_sub_16_er_ai(void)\r |
5545 | {\r |
5546 | uint* r_dst = &DX;\r |
5547 | uint src = OPER_AY_AI_16();\r |
5548 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5549 | uint res = dst - src;\r |
5550 | \r |
5551 | FLAG_N = NFLAG_16(res);\r |
5552 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5553 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5554 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5555 | \r |
5556 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5557 | }\r |
5558 | \r |
5559 | \r |
5560 | void m68k_op_sub_16_er_pi(void)\r |
5561 | {\r |
5562 | uint* r_dst = &DX;\r |
5563 | uint src = OPER_AY_PI_16();\r |
5564 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5565 | uint res = dst - src;\r |
5566 | \r |
5567 | FLAG_N = NFLAG_16(res);\r |
5568 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5569 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5570 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5571 | \r |
5572 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5573 | }\r |
5574 | \r |
5575 | \r |
5576 | void m68k_op_sub_16_er_pd(void)\r |
5577 | {\r |
5578 | uint* r_dst = &DX;\r |
5579 | uint src = OPER_AY_PD_16();\r |
5580 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5581 | uint res = dst - src;\r |
5582 | \r |
5583 | FLAG_N = NFLAG_16(res);\r |
5584 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5585 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5586 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5587 | \r |
5588 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5589 | }\r |
5590 | \r |
5591 | \r |
5592 | void m68k_op_sub_16_er_di(void)\r |
5593 | {\r |
5594 | uint* r_dst = &DX;\r |
5595 | uint src = OPER_AY_DI_16();\r |
5596 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5597 | uint res = dst - src;\r |
5598 | \r |
5599 | FLAG_N = NFLAG_16(res);\r |
5600 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5601 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5602 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5603 | \r |
5604 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5605 | }\r |
5606 | \r |
5607 | \r |
5608 | void m68k_op_sub_16_er_ix(void)\r |
5609 | {\r |
5610 | uint* r_dst = &DX;\r |
5611 | uint src = OPER_AY_IX_16();\r |
5612 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5613 | uint res = dst - src;\r |
5614 | \r |
5615 | FLAG_N = NFLAG_16(res);\r |
5616 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5617 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5618 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5619 | \r |
5620 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5621 | }\r |
5622 | \r |
5623 | \r |
5624 | void m68k_op_sub_16_er_aw(void)\r |
5625 | {\r |
5626 | uint* r_dst = &DX;\r |
5627 | uint src = OPER_AW_16();\r |
5628 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5629 | uint res = dst - src;\r |
5630 | \r |
5631 | FLAG_N = NFLAG_16(res);\r |
5632 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5633 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5634 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5635 | \r |
5636 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5637 | }\r |
5638 | \r |
5639 | \r |
5640 | void m68k_op_sub_16_er_al(void)\r |
5641 | {\r |
5642 | uint* r_dst = &DX;\r |
5643 | uint src = OPER_AL_16();\r |
5644 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5645 | uint res = dst - src;\r |
5646 | \r |
5647 | FLAG_N = NFLAG_16(res);\r |
5648 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5649 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5650 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5651 | \r |
5652 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5653 | }\r |
5654 | \r |
5655 | \r |
5656 | void m68k_op_sub_16_er_pcdi(void)\r |
5657 | {\r |
5658 | uint* r_dst = &DX;\r |
5659 | uint src = OPER_PCDI_16();\r |
5660 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5661 | uint res = dst - src;\r |
5662 | \r |
5663 | FLAG_N = NFLAG_16(res);\r |
5664 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5665 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5666 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5667 | \r |
5668 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5669 | }\r |
5670 | \r |
5671 | \r |
5672 | void m68k_op_sub_16_er_pcix(void)\r |
5673 | {\r |
5674 | uint* r_dst = &DX;\r |
5675 | uint src = OPER_PCIX_16();\r |
5676 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5677 | uint res = dst - src;\r |
5678 | \r |
5679 | FLAG_N = NFLAG_16(res);\r |
5680 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5681 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5682 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5683 | \r |
5684 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5685 | }\r |
5686 | \r |
5687 | \r |
5688 | void m68k_op_sub_16_er_i(void)\r |
5689 | {\r |
5690 | uint* r_dst = &DX;\r |
5691 | uint src = OPER_I_16();\r |
5692 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
5693 | uint res = dst - src;\r |
5694 | \r |
5695 | FLAG_N = NFLAG_16(res);\r |
5696 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
5697 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
5698 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
5699 | \r |
5700 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
5701 | }\r |
5702 | \r |
5703 | \r |
5704 | void m68k_op_sub_32_er_d(void)\r |
5705 | {\r |
5706 | uint* r_dst = &DX;\r |
5707 | uint src = DY;\r |
5708 | uint dst = *r_dst;\r |
5709 | uint res = dst - src;\r |
5710 | \r |
5711 | FLAG_N = NFLAG_32(res);\r |
5712 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5713 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5714 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5715 | \r |
5716 | *r_dst = FLAG_Z;\r |
5717 | }\r |
5718 | \r |
5719 | \r |
5720 | void m68k_op_sub_32_er_a(void)\r |
5721 | {\r |
5722 | uint* r_dst = &DX;\r |
5723 | uint src = AY;\r |
5724 | uint dst = *r_dst;\r |
5725 | uint res = dst - src;\r |
5726 | \r |
5727 | FLAG_N = NFLAG_32(res);\r |
5728 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5729 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5730 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5731 | \r |
5732 | *r_dst = FLAG_Z;\r |
5733 | }\r |
5734 | \r |
5735 | \r |
5736 | void m68k_op_sub_32_er_ai(void)\r |
5737 | {\r |
5738 | uint* r_dst = &DX;\r |
5739 | uint src = OPER_AY_AI_32();\r |
5740 | uint dst = *r_dst;\r |
5741 | uint res = dst - src;\r |
5742 | \r |
5743 | FLAG_N = NFLAG_32(res);\r |
5744 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5745 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5746 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5747 | \r |
5748 | *r_dst = FLAG_Z;\r |
5749 | }\r |
5750 | \r |
5751 | \r |
5752 | void m68k_op_sub_32_er_pi(void)\r |
5753 | {\r |
5754 | uint* r_dst = &DX;\r |
5755 | uint src = OPER_AY_PI_32();\r |
5756 | uint dst = *r_dst;\r |
5757 | uint res = dst - src;\r |
5758 | \r |
5759 | FLAG_N = NFLAG_32(res);\r |
5760 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5761 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5762 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5763 | \r |
5764 | *r_dst = FLAG_Z;\r |
5765 | }\r |
5766 | \r |
5767 | \r |
5768 | void m68k_op_sub_32_er_pd(void)\r |
5769 | {\r |
5770 | uint* r_dst = &DX;\r |
5771 | uint src = OPER_AY_PD_32();\r |
5772 | uint dst = *r_dst;\r |
5773 | uint res = dst - src;\r |
5774 | \r |
5775 | FLAG_N = NFLAG_32(res);\r |
5776 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5777 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5778 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5779 | \r |
5780 | *r_dst = FLAG_Z;\r |
5781 | }\r |
5782 | \r |
5783 | \r |
5784 | void m68k_op_sub_32_er_di(void)\r |
5785 | {\r |
5786 | uint* r_dst = &DX;\r |
5787 | uint src = OPER_AY_DI_32();\r |
5788 | uint dst = *r_dst;\r |
5789 | uint res = dst - src;\r |
5790 | \r |
5791 | FLAG_N = NFLAG_32(res);\r |
5792 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5793 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5794 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5795 | \r |
5796 | *r_dst = FLAG_Z;\r |
5797 | }\r |
5798 | \r |
5799 | \r |
5800 | void m68k_op_sub_32_er_ix(void)\r |
5801 | {\r |
5802 | uint* r_dst = &DX;\r |
5803 | uint src = OPER_AY_IX_32();\r |
5804 | uint dst = *r_dst;\r |
5805 | uint res = dst - src;\r |
5806 | \r |
5807 | FLAG_N = NFLAG_32(res);\r |
5808 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5809 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5810 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5811 | \r |
5812 | *r_dst = FLAG_Z;\r |
5813 | }\r |
5814 | \r |
5815 | \r |
5816 | void m68k_op_sub_32_er_aw(void)\r |
5817 | {\r |
5818 | uint* r_dst = &DX;\r |
5819 | uint src = OPER_AW_32();\r |
5820 | uint dst = *r_dst;\r |
5821 | uint res = dst - src;\r |
5822 | \r |
5823 | FLAG_N = NFLAG_32(res);\r |
5824 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5825 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5826 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5827 | \r |
5828 | *r_dst = FLAG_Z;\r |
5829 | }\r |
5830 | \r |
5831 | \r |
5832 | void m68k_op_sub_32_er_al(void)\r |
5833 | {\r |
5834 | uint* r_dst = &DX;\r |
5835 | uint src = OPER_AL_32();\r |
5836 | uint dst = *r_dst;\r |
5837 | uint res = dst - src;\r |
5838 | \r |
5839 | FLAG_N = NFLAG_32(res);\r |
5840 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5841 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5842 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5843 | \r |
5844 | *r_dst = FLAG_Z;\r |
5845 | }\r |
5846 | \r |
5847 | \r |
5848 | void m68k_op_sub_32_er_pcdi(void)\r |
5849 | {\r |
5850 | uint* r_dst = &DX;\r |
5851 | uint src = OPER_PCDI_32();\r |
5852 | uint dst = *r_dst;\r |
5853 | uint res = dst - src;\r |
5854 | \r |
5855 | FLAG_N = NFLAG_32(res);\r |
5856 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5857 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5858 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5859 | \r |
5860 | *r_dst = FLAG_Z;\r |
5861 | }\r |
5862 | \r |
5863 | \r |
5864 | void m68k_op_sub_32_er_pcix(void)\r |
5865 | {\r |
5866 | uint* r_dst = &DX;\r |
5867 | uint src = OPER_PCIX_32();\r |
5868 | uint dst = *r_dst;\r |
5869 | uint res = dst - src;\r |
5870 | \r |
5871 | FLAG_N = NFLAG_32(res);\r |
5872 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5873 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5874 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5875 | \r |
5876 | *r_dst = FLAG_Z;\r |
5877 | }\r |
5878 | \r |
5879 | \r |
5880 | void m68k_op_sub_32_er_i(void)\r |
5881 | {\r |
5882 | uint* r_dst = &DX;\r |
5883 | uint src = OPER_I_32();\r |
5884 | uint dst = *r_dst;\r |
5885 | uint res = dst - src;\r |
5886 | \r |
5887 | FLAG_N = NFLAG_32(res);\r |
5888 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
5889 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
5890 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
5891 | \r |
5892 | *r_dst = FLAG_Z;\r |
5893 | }\r |
5894 | \r |
5895 | \r |
5896 | void m68k_op_sub_8_re_ai(void)\r |
5897 | {\r |
5898 | uint ea = EA_AY_AI_8();\r |
5899 | uint src = MASK_OUT_ABOVE_8(DX);\r |
5900 | uint dst = m68ki_read_8(ea);\r |
5901 | uint res = dst - src;\r |
5902 | \r |
5903 | FLAG_N = NFLAG_8(res);\r |
5904 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5905 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5906 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5907 | \r |
5908 | m68ki_write_8(ea, FLAG_Z);\r |
5909 | }\r |
5910 | \r |
5911 | \r |
5912 | void m68k_op_sub_8_re_pi(void)\r |
5913 | {\r |
5914 | uint ea = EA_AY_PI_8();\r |
5915 | uint src = MASK_OUT_ABOVE_8(DX);\r |
5916 | uint dst = m68ki_read_8(ea);\r |
5917 | uint res = dst - src;\r |
5918 | \r |
5919 | FLAG_N = NFLAG_8(res);\r |
5920 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5921 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5922 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5923 | \r |
5924 | m68ki_write_8(ea, FLAG_Z);\r |
5925 | }\r |
5926 | \r |
5927 | \r |
5928 | void m68k_op_sub_8_re_pi7(void)\r |
5929 | {\r |
5930 | uint ea = EA_A7_PI_8();\r |
5931 | uint src = MASK_OUT_ABOVE_8(DX);\r |
5932 | uint dst = m68ki_read_8(ea);\r |
5933 | uint res = dst - src;\r |
5934 | \r |
5935 | FLAG_N = NFLAG_8(res);\r |
5936 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5937 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5938 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5939 | \r |
5940 | m68ki_write_8(ea, FLAG_Z);\r |
5941 | }\r |
5942 | \r |
5943 | \r |
5944 | void m68k_op_sub_8_re_pd(void)\r |
5945 | {\r |
5946 | uint ea = EA_AY_PD_8();\r |
5947 | uint src = MASK_OUT_ABOVE_8(DX);\r |
5948 | uint dst = m68ki_read_8(ea);\r |
5949 | uint res = dst - src;\r |
5950 | \r |
5951 | FLAG_N = NFLAG_8(res);\r |
5952 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5953 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5954 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5955 | \r |
5956 | m68ki_write_8(ea, FLAG_Z);\r |
5957 | }\r |
5958 | \r |
5959 | \r |
5960 | void m68k_op_sub_8_re_pd7(void)\r |
5961 | {\r |
5962 | uint ea = EA_A7_PD_8();\r |
5963 | uint src = MASK_OUT_ABOVE_8(DX);\r |
5964 | uint dst = m68ki_read_8(ea);\r |
5965 | uint res = dst - src;\r |
5966 | \r |
5967 | FLAG_N = NFLAG_8(res);\r |
5968 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5969 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5970 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5971 | \r |
5972 | m68ki_write_8(ea, FLAG_Z);\r |
5973 | }\r |
5974 | \r |
5975 | \r |
5976 | void m68k_op_sub_8_re_di(void)\r |
5977 | {\r |
5978 | uint ea = EA_AY_DI_8();\r |
5979 | uint src = MASK_OUT_ABOVE_8(DX);\r |
5980 | uint dst = m68ki_read_8(ea);\r |
5981 | uint res = dst - src;\r |
5982 | \r |
5983 | FLAG_N = NFLAG_8(res);\r |
5984 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
5985 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
5986 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
5987 | \r |
5988 | m68ki_write_8(ea, FLAG_Z);\r |
5989 | }\r |
5990 | \r |
5991 | \r |
5992 | void m68k_op_sub_8_re_ix(void)\r |
5993 | {\r |
5994 | uint ea = EA_AY_IX_8();\r |
5995 | uint src = MASK_OUT_ABOVE_8(DX);\r |
5996 | uint dst = m68ki_read_8(ea);\r |
5997 | uint res = dst - src;\r |
5998 | \r |
5999 | FLAG_N = NFLAG_8(res);\r |
6000 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6001 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6002 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6003 | \r |
6004 | m68ki_write_8(ea, FLAG_Z);\r |
6005 | }\r |
6006 | \r |
6007 | \r |
6008 | void m68k_op_sub_8_re_aw(void)\r |
6009 | {\r |
6010 | uint ea = EA_AW_8();\r |
6011 | uint src = MASK_OUT_ABOVE_8(DX);\r |
6012 | uint dst = m68ki_read_8(ea);\r |
6013 | uint res = dst - src;\r |
6014 | \r |
6015 | FLAG_N = NFLAG_8(res);\r |
6016 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6017 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6018 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6019 | \r |
6020 | m68ki_write_8(ea, FLAG_Z);\r |
6021 | }\r |
6022 | \r |
6023 | \r |
6024 | void m68k_op_sub_8_re_al(void)\r |
6025 | {\r |
6026 | uint ea = EA_AL_8();\r |
6027 | uint src = MASK_OUT_ABOVE_8(DX);\r |
6028 | uint dst = m68ki_read_8(ea);\r |
6029 | uint res = dst - src;\r |
6030 | \r |
6031 | FLAG_N = NFLAG_8(res);\r |
6032 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6033 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6034 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6035 | \r |
6036 | m68ki_write_8(ea, FLAG_Z);\r |
6037 | }\r |
6038 | \r |
6039 | \r |
6040 | void m68k_op_sub_16_re_ai(void)\r |
6041 | {\r |
6042 | uint ea = EA_AY_AI_16();\r |
6043 | uint src = MASK_OUT_ABOVE_16(DX);\r |
6044 | uint dst = m68ki_read_16(ea);\r |
6045 | uint res = dst - src;\r |
6046 | \r |
6047 | FLAG_N = NFLAG_16(res);\r |
6048 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6049 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6050 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6051 | \r |
6052 | m68ki_write_16(ea, FLAG_Z);\r |
6053 | }\r |
6054 | \r |
6055 | \r |
6056 | void m68k_op_sub_16_re_pi(void)\r |
6057 | {\r |
6058 | uint ea = EA_AY_PI_16();\r |
6059 | uint src = MASK_OUT_ABOVE_16(DX);\r |
6060 | uint dst = m68ki_read_16(ea);\r |
6061 | uint res = dst - src;\r |
6062 | \r |
6063 | FLAG_N = NFLAG_16(res);\r |
6064 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6065 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6066 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6067 | \r |
6068 | m68ki_write_16(ea, FLAG_Z);\r |
6069 | }\r |
6070 | \r |
6071 | \r |
6072 | void m68k_op_sub_16_re_pd(void)\r |
6073 | {\r |
6074 | uint ea = EA_AY_PD_16();\r |
6075 | uint src = MASK_OUT_ABOVE_16(DX);\r |
6076 | uint dst = m68ki_read_16(ea);\r |
6077 | uint res = dst - src;\r |
6078 | \r |
6079 | FLAG_N = NFLAG_16(res);\r |
6080 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6081 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6082 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6083 | \r |
6084 | m68ki_write_16(ea, FLAG_Z);\r |
6085 | }\r |
6086 | \r |
6087 | \r |
6088 | void m68k_op_sub_16_re_di(void)\r |
6089 | {\r |
6090 | uint ea = EA_AY_DI_16();\r |
6091 | uint src = MASK_OUT_ABOVE_16(DX);\r |
6092 | uint dst = m68ki_read_16(ea);\r |
6093 | uint res = dst - src;\r |
6094 | \r |
6095 | FLAG_N = NFLAG_16(res);\r |
6096 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6097 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6098 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6099 | \r |
6100 | m68ki_write_16(ea, FLAG_Z);\r |
6101 | }\r |
6102 | \r |
6103 | \r |
6104 | void m68k_op_sub_16_re_ix(void)\r |
6105 | {\r |
6106 | uint ea = EA_AY_IX_16();\r |
6107 | uint src = MASK_OUT_ABOVE_16(DX);\r |
6108 | uint dst = m68ki_read_16(ea);\r |
6109 | uint res = dst - src;\r |
6110 | \r |
6111 | FLAG_N = NFLAG_16(res);\r |
6112 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6113 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6114 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6115 | \r |
6116 | m68ki_write_16(ea, FLAG_Z);\r |
6117 | }\r |
6118 | \r |
6119 | \r |
6120 | void m68k_op_sub_16_re_aw(void)\r |
6121 | {\r |
6122 | uint ea = EA_AW_16();\r |
6123 | uint src = MASK_OUT_ABOVE_16(DX);\r |
6124 | uint dst = m68ki_read_16(ea);\r |
6125 | uint res = dst - src;\r |
6126 | \r |
6127 | FLAG_N = NFLAG_16(res);\r |
6128 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6129 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6130 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6131 | \r |
6132 | m68ki_write_16(ea, FLAG_Z);\r |
6133 | }\r |
6134 | \r |
6135 | \r |
6136 | void m68k_op_sub_16_re_al(void)\r |
6137 | {\r |
6138 | uint ea = EA_AL_16();\r |
6139 | uint src = MASK_OUT_ABOVE_16(DX);\r |
6140 | uint dst = m68ki_read_16(ea);\r |
6141 | uint res = dst - src;\r |
6142 | \r |
6143 | FLAG_N = NFLAG_16(res);\r |
6144 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6145 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6146 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6147 | \r |
6148 | m68ki_write_16(ea, FLAG_Z);\r |
6149 | }\r |
6150 | \r |
6151 | \r |
6152 | void m68k_op_sub_32_re_ai(void)\r |
6153 | {\r |
6154 | uint ea = EA_AY_AI_32();\r |
6155 | uint src = DX;\r |
6156 | uint dst = m68ki_read_32(ea);\r |
6157 | uint res = dst - src;\r |
6158 | \r |
6159 | FLAG_N = NFLAG_32(res);\r |
6160 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6161 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6162 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6163 | \r |
6164 | m68ki_write_32(ea, FLAG_Z);\r |
6165 | }\r |
6166 | \r |
6167 | \r |
6168 | void m68k_op_sub_32_re_pi(void)\r |
6169 | {\r |
6170 | uint ea = EA_AY_PI_32();\r |
6171 | uint src = DX;\r |
6172 | uint dst = m68ki_read_32(ea);\r |
6173 | uint res = dst - src;\r |
6174 | \r |
6175 | FLAG_N = NFLAG_32(res);\r |
6176 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6177 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6178 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6179 | \r |
6180 | m68ki_write_32(ea, FLAG_Z);\r |
6181 | }\r |
6182 | \r |
6183 | \r |
6184 | void m68k_op_sub_32_re_pd(void)\r |
6185 | {\r |
6186 | uint ea = EA_AY_PD_32();\r |
6187 | uint src = DX;\r |
6188 | uint dst = m68ki_read_32(ea);\r |
6189 | uint res = dst - src;\r |
6190 | \r |
6191 | FLAG_N = NFLAG_32(res);\r |
6192 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6193 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6194 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6195 | \r |
6196 | m68ki_write_32(ea, FLAG_Z);\r |
6197 | }\r |
6198 | \r |
6199 | \r |
6200 | void m68k_op_sub_32_re_di(void)\r |
6201 | {\r |
6202 | uint ea = EA_AY_DI_32();\r |
6203 | uint src = DX;\r |
6204 | uint dst = m68ki_read_32(ea);\r |
6205 | uint res = dst - src;\r |
6206 | \r |
6207 | FLAG_N = NFLAG_32(res);\r |
6208 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6209 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6210 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6211 | \r |
6212 | m68ki_write_32(ea, FLAG_Z);\r |
6213 | }\r |
6214 | \r |
6215 | \r |
6216 | void m68k_op_sub_32_re_ix(void)\r |
6217 | {\r |
6218 | uint ea = EA_AY_IX_32();\r |
6219 | uint src = DX;\r |
6220 | uint dst = m68ki_read_32(ea);\r |
6221 | uint res = dst - src;\r |
6222 | \r |
6223 | FLAG_N = NFLAG_32(res);\r |
6224 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6225 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6226 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6227 | \r |
6228 | m68ki_write_32(ea, FLAG_Z);\r |
6229 | }\r |
6230 | \r |
6231 | \r |
6232 | void m68k_op_sub_32_re_aw(void)\r |
6233 | {\r |
6234 | uint ea = EA_AW_32();\r |
6235 | uint src = DX;\r |
6236 | uint dst = m68ki_read_32(ea);\r |
6237 | uint res = dst - src;\r |
6238 | \r |
6239 | FLAG_N = NFLAG_32(res);\r |
6240 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6241 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6242 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6243 | \r |
6244 | m68ki_write_32(ea, FLAG_Z);\r |
6245 | }\r |
6246 | \r |
6247 | \r |
6248 | void m68k_op_sub_32_re_al(void)\r |
6249 | {\r |
6250 | uint ea = EA_AL_32();\r |
6251 | uint src = DX;\r |
6252 | uint dst = m68ki_read_32(ea);\r |
6253 | uint res = dst - src;\r |
6254 | \r |
6255 | FLAG_N = NFLAG_32(res);\r |
6256 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6257 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6258 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6259 | \r |
6260 | m68ki_write_32(ea, FLAG_Z);\r |
6261 | }\r |
6262 | \r |
6263 | \r |
6264 | void m68k_op_suba_16_d(void)\r |
6265 | {\r |
6266 | uint* r_dst = &AX;\r |
6267 | \r |
6268 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY));\r |
6269 | }\r |
6270 | \r |
6271 | \r |
6272 | void m68k_op_suba_16_a(void)\r |
6273 | {\r |
6274 | uint* r_dst = &AX;\r |
6275 | \r |
6276 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY));\r |
6277 | }\r |
6278 | \r |
6279 | \r |
6280 | void m68k_op_suba_16_ai(void)\r |
6281 | {\r |
6282 | uint* r_dst = &AX;\r |
6283 | \r |
6284 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_AI_16()));\r |
6285 | }\r |
6286 | \r |
6287 | \r |
6288 | void m68k_op_suba_16_pi(void)\r |
6289 | {\r |
6290 | uint* r_dst = &AX;\r |
6291 | \r |
6292 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_PI_16()));\r |
6293 | }\r |
6294 | \r |
6295 | \r |
6296 | void m68k_op_suba_16_pd(void)\r |
6297 | {\r |
6298 | uint* r_dst = &AX;\r |
6299 | \r |
6300 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_PD_16()));\r |
6301 | }\r |
6302 | \r |
6303 | \r |
6304 | void m68k_op_suba_16_di(void)\r |
6305 | {\r |
6306 | uint* r_dst = &AX;\r |
6307 | \r |
6308 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_DI_16()));\r |
6309 | }\r |
6310 | \r |
6311 | \r |
6312 | void m68k_op_suba_16_ix(void)\r |
6313 | {\r |
6314 | uint* r_dst = &AX;\r |
6315 | \r |
6316 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AY_IX_16()));\r |
6317 | }\r |
6318 | \r |
6319 | \r |
6320 | void m68k_op_suba_16_aw(void)\r |
6321 | {\r |
6322 | uint* r_dst = &AX;\r |
6323 | \r |
6324 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AW_16()));\r |
6325 | }\r |
6326 | \r |
6327 | \r |
6328 | void m68k_op_suba_16_al(void)\r |
6329 | {\r |
6330 | uint* r_dst = &AX;\r |
6331 | \r |
6332 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_AL_16()));\r |
6333 | }\r |
6334 | \r |
6335 | \r |
6336 | void m68k_op_suba_16_pcdi(void)\r |
6337 | {\r |
6338 | uint* r_dst = &AX;\r |
6339 | \r |
6340 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_PCDI_16()));\r |
6341 | }\r |
6342 | \r |
6343 | \r |
6344 | void m68k_op_suba_16_pcix(void)\r |
6345 | {\r |
6346 | uint* r_dst = &AX;\r |
6347 | \r |
6348 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_PCIX_16()));\r |
6349 | }\r |
6350 | \r |
6351 | \r |
6352 | void m68k_op_suba_16_i(void)\r |
6353 | {\r |
6354 | uint* r_dst = &AX;\r |
6355 | \r |
6356 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(OPER_I_16()));\r |
6357 | }\r |
6358 | \r |
6359 | \r |
6360 | void m68k_op_suba_32_d(void)\r |
6361 | {\r |
6362 | uint* r_dst = &AX;\r |
6363 | \r |
6364 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY);\r |
6365 | }\r |
6366 | \r |
6367 | \r |
6368 | void m68k_op_suba_32_a(void)\r |
6369 | {\r |
6370 | uint* r_dst = &AX;\r |
6371 | \r |
6372 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY);\r |
6373 | }\r |
6374 | \r |
6375 | \r |
6376 | void m68k_op_suba_32_ai(void)\r |
6377 | {\r |
6378 | uint* r_dst = &AX;\r |
6379 | \r |
6380 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_AI_32());\r |
6381 | }\r |
6382 | \r |
6383 | \r |
6384 | void m68k_op_suba_32_pi(void)\r |
6385 | {\r |
6386 | uint* r_dst = &AX;\r |
6387 | \r |
6388 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_PI_32());\r |
6389 | }\r |
6390 | \r |
6391 | \r |
6392 | void m68k_op_suba_32_pd(void)\r |
6393 | {\r |
6394 | uint* r_dst = &AX;\r |
6395 | \r |
6396 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_PD_32());\r |
6397 | }\r |
6398 | \r |
6399 | \r |
6400 | void m68k_op_suba_32_di(void)\r |
6401 | {\r |
6402 | uint* r_dst = &AX;\r |
6403 | \r |
6404 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_DI_32());\r |
6405 | }\r |
6406 | \r |
6407 | \r |
6408 | void m68k_op_suba_32_ix(void)\r |
6409 | {\r |
6410 | uint* r_dst = &AX;\r |
6411 | \r |
6412 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AY_IX_32());\r |
6413 | }\r |
6414 | \r |
6415 | \r |
6416 | void m68k_op_suba_32_aw(void)\r |
6417 | {\r |
6418 | uint* r_dst = &AX;\r |
6419 | \r |
6420 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AW_32());\r |
6421 | }\r |
6422 | \r |
6423 | \r |
6424 | void m68k_op_suba_32_al(void)\r |
6425 | {\r |
6426 | uint* r_dst = &AX;\r |
6427 | \r |
6428 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_AL_32());\r |
6429 | }\r |
6430 | \r |
6431 | \r |
6432 | void m68k_op_suba_32_pcdi(void)\r |
6433 | {\r |
6434 | uint* r_dst = &AX;\r |
6435 | \r |
6436 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_PCDI_32());\r |
6437 | }\r |
6438 | \r |
6439 | \r |
6440 | void m68k_op_suba_32_pcix(void)\r |
6441 | {\r |
6442 | uint* r_dst = &AX;\r |
6443 | \r |
6444 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_PCIX_32());\r |
6445 | }\r |
6446 | \r |
6447 | \r |
6448 | void m68k_op_suba_32_i(void)\r |
6449 | {\r |
6450 | uint* r_dst = &AX;\r |
6451 | \r |
6452 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - OPER_I_32());\r |
6453 | }\r |
6454 | \r |
6455 | \r |
6456 | void m68k_op_subi_8_d(void)\r |
6457 | {\r |
6458 | uint* r_dst = &DY;\r |
6459 | uint src = OPER_I_8();\r |
6460 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
6461 | uint res = dst - src;\r |
6462 | \r |
6463 | FLAG_N = NFLAG_8(res);\r |
6464 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6465 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6466 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6467 | \r |
6468 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
6469 | }\r |
6470 | \r |
6471 | \r |
6472 | void m68k_op_subi_8_ai(void)\r |
6473 | {\r |
6474 | uint src = OPER_I_8();\r |
6475 | uint ea = EA_AY_AI_8();\r |
6476 | uint dst = m68ki_read_8(ea);\r |
6477 | uint res = dst - src;\r |
6478 | \r |
6479 | FLAG_N = NFLAG_8(res);\r |
6480 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6481 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6482 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6483 | \r |
6484 | m68ki_write_8(ea, FLAG_Z);\r |
6485 | }\r |
6486 | \r |
6487 | \r |
6488 | void m68k_op_subi_8_pi(void)\r |
6489 | {\r |
6490 | uint src = OPER_I_8();\r |
6491 | uint ea = EA_AY_PI_8();\r |
6492 | uint dst = m68ki_read_8(ea);\r |
6493 | uint res = dst - src;\r |
6494 | \r |
6495 | FLAG_N = NFLAG_8(res);\r |
6496 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6497 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6498 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6499 | \r |
6500 | m68ki_write_8(ea, FLAG_Z);\r |
6501 | }\r |
6502 | \r |
6503 | \r |
6504 | void m68k_op_subi_8_pi7(void)\r |
6505 | {\r |
6506 | uint src = OPER_I_8();\r |
6507 | uint ea = EA_A7_PI_8();\r |
6508 | uint dst = m68ki_read_8(ea);\r |
6509 | uint res = dst - src;\r |
6510 | \r |
6511 | FLAG_N = NFLAG_8(res);\r |
6512 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6513 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6514 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6515 | \r |
6516 | m68ki_write_8(ea, FLAG_Z);\r |
6517 | }\r |
6518 | \r |
6519 | \r |
6520 | void m68k_op_subi_8_pd(void)\r |
6521 | {\r |
6522 | uint src = OPER_I_8();\r |
6523 | uint ea = EA_AY_PD_8();\r |
6524 | uint dst = m68ki_read_8(ea);\r |
6525 | uint res = dst - src;\r |
6526 | \r |
6527 | FLAG_N = NFLAG_8(res);\r |
6528 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6529 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6530 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6531 | \r |
6532 | m68ki_write_8(ea, FLAG_Z);\r |
6533 | }\r |
6534 | \r |
6535 | \r |
6536 | void m68k_op_subi_8_pd7(void)\r |
6537 | {\r |
6538 | uint src = OPER_I_8();\r |
6539 | uint ea = EA_A7_PD_8();\r |
6540 | uint dst = m68ki_read_8(ea);\r |
6541 | uint res = dst - src;\r |
6542 | \r |
6543 | FLAG_N = NFLAG_8(res);\r |
6544 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6545 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6546 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6547 | \r |
6548 | m68ki_write_8(ea, FLAG_Z);\r |
6549 | }\r |
6550 | \r |
6551 | \r |
6552 | void m68k_op_subi_8_di(void)\r |
6553 | {\r |
6554 | uint src = OPER_I_8();\r |
6555 | uint ea = EA_AY_DI_8();\r |
6556 | uint dst = m68ki_read_8(ea);\r |
6557 | uint res = dst - src;\r |
6558 | \r |
6559 | FLAG_N = NFLAG_8(res);\r |
6560 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6561 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6562 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6563 | \r |
6564 | m68ki_write_8(ea, FLAG_Z);\r |
6565 | }\r |
6566 | \r |
6567 | \r |
6568 | void m68k_op_subi_8_ix(void)\r |
6569 | {\r |
6570 | uint src = OPER_I_8();\r |
6571 | uint ea = EA_AY_IX_8();\r |
6572 | uint dst = m68ki_read_8(ea);\r |
6573 | uint res = dst - src;\r |
6574 | \r |
6575 | FLAG_N = NFLAG_8(res);\r |
6576 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6577 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6578 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6579 | \r |
6580 | m68ki_write_8(ea, FLAG_Z);\r |
6581 | }\r |
6582 | \r |
6583 | \r |
6584 | void m68k_op_subi_8_aw(void)\r |
6585 | {\r |
6586 | uint src = OPER_I_8();\r |
6587 | uint ea = EA_AW_8();\r |
6588 | uint dst = m68ki_read_8(ea);\r |
6589 | uint res = dst - src;\r |
6590 | \r |
6591 | FLAG_N = NFLAG_8(res);\r |
6592 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6593 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6594 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6595 | \r |
6596 | m68ki_write_8(ea, FLAG_Z);\r |
6597 | }\r |
6598 | \r |
6599 | \r |
6600 | void m68k_op_subi_8_al(void)\r |
6601 | {\r |
6602 | uint src = OPER_I_8();\r |
6603 | uint ea = EA_AL_8();\r |
6604 | uint dst = m68ki_read_8(ea);\r |
6605 | uint res = dst - src;\r |
6606 | \r |
6607 | FLAG_N = NFLAG_8(res);\r |
6608 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6609 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6610 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6611 | \r |
6612 | m68ki_write_8(ea, FLAG_Z);\r |
6613 | }\r |
6614 | \r |
6615 | \r |
6616 | void m68k_op_subi_16_d(void)\r |
6617 | {\r |
6618 | uint* r_dst = &DY;\r |
6619 | uint src = OPER_I_16();\r |
6620 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
6621 | uint res = dst - src;\r |
6622 | \r |
6623 | FLAG_N = NFLAG_16(res);\r |
6624 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6625 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6626 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6627 | \r |
6628 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
6629 | }\r |
6630 | \r |
6631 | \r |
6632 | void m68k_op_subi_16_ai(void)\r |
6633 | {\r |
6634 | uint src = OPER_I_16();\r |
6635 | uint ea = EA_AY_AI_16();\r |
6636 | uint dst = m68ki_read_16(ea);\r |
6637 | uint res = dst - src;\r |
6638 | \r |
6639 | FLAG_N = NFLAG_16(res);\r |
6640 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6641 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6642 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6643 | \r |
6644 | m68ki_write_16(ea, FLAG_Z);\r |
6645 | }\r |
6646 | \r |
6647 | \r |
6648 | void m68k_op_subi_16_pi(void)\r |
6649 | {\r |
6650 | uint src = OPER_I_16();\r |
6651 | uint ea = EA_AY_PI_16();\r |
6652 | uint dst = m68ki_read_16(ea);\r |
6653 | uint res = dst - src;\r |
6654 | \r |
6655 | FLAG_N = NFLAG_16(res);\r |
6656 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6657 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6658 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6659 | \r |
6660 | m68ki_write_16(ea, FLAG_Z);\r |
6661 | }\r |
6662 | \r |
6663 | \r |
6664 | void m68k_op_subi_16_pd(void)\r |
6665 | {\r |
6666 | uint src = OPER_I_16();\r |
6667 | uint ea = EA_AY_PD_16();\r |
6668 | uint dst = m68ki_read_16(ea);\r |
6669 | uint res = dst - src;\r |
6670 | \r |
6671 | FLAG_N = NFLAG_16(res);\r |
6672 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6673 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6674 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6675 | \r |
6676 | m68ki_write_16(ea, FLAG_Z);\r |
6677 | }\r |
6678 | \r |
6679 | \r |
6680 | void m68k_op_subi_16_di(void)\r |
6681 | {\r |
6682 | uint src = OPER_I_16();\r |
6683 | uint ea = EA_AY_DI_16();\r |
6684 | uint dst = m68ki_read_16(ea);\r |
6685 | uint res = dst - src;\r |
6686 | \r |
6687 | FLAG_N = NFLAG_16(res);\r |
6688 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6689 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6690 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6691 | \r |
6692 | m68ki_write_16(ea, FLAG_Z);\r |
6693 | }\r |
6694 | \r |
6695 | \r |
6696 | void m68k_op_subi_16_ix(void)\r |
6697 | {\r |
6698 | uint src = OPER_I_16();\r |
6699 | uint ea = EA_AY_IX_16();\r |
6700 | uint dst = m68ki_read_16(ea);\r |
6701 | uint res = dst - src;\r |
6702 | \r |
6703 | FLAG_N = NFLAG_16(res);\r |
6704 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6705 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6706 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6707 | \r |
6708 | m68ki_write_16(ea, FLAG_Z);\r |
6709 | }\r |
6710 | \r |
6711 | \r |
6712 | void m68k_op_subi_16_aw(void)\r |
6713 | {\r |
6714 | uint src = OPER_I_16();\r |
6715 | uint ea = EA_AW_16();\r |
6716 | uint dst = m68ki_read_16(ea);\r |
6717 | uint res = dst - src;\r |
6718 | \r |
6719 | FLAG_N = NFLAG_16(res);\r |
6720 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6721 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6722 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6723 | \r |
6724 | m68ki_write_16(ea, FLAG_Z);\r |
6725 | }\r |
6726 | \r |
6727 | \r |
6728 | void m68k_op_subi_16_al(void)\r |
6729 | {\r |
6730 | uint src = OPER_I_16();\r |
6731 | uint ea = EA_AL_16();\r |
6732 | uint dst = m68ki_read_16(ea);\r |
6733 | uint res = dst - src;\r |
6734 | \r |
6735 | FLAG_N = NFLAG_16(res);\r |
6736 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
6737 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
6738 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
6739 | \r |
6740 | m68ki_write_16(ea, FLAG_Z);\r |
6741 | }\r |
6742 | \r |
6743 | \r |
6744 | void m68k_op_subi_32_d(void)\r |
6745 | {\r |
6746 | uint* r_dst = &DY;\r |
6747 | uint src = OPER_I_32();\r |
6748 | uint dst = *r_dst;\r |
6749 | uint res = dst - src;\r |
6750 | \r |
6751 | FLAG_N = NFLAG_32(res);\r |
6752 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6753 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6754 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6755 | \r |
6756 | *r_dst = FLAG_Z;\r |
6757 | }\r |
6758 | \r |
6759 | \r |
6760 | void m68k_op_subi_32_ai(void)\r |
6761 | {\r |
6762 | uint src = OPER_I_32();\r |
6763 | uint ea = EA_AY_AI_32();\r |
6764 | uint dst = m68ki_read_32(ea);\r |
6765 | uint res = dst - src;\r |
6766 | \r |
6767 | FLAG_N = NFLAG_32(res);\r |
6768 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6769 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6770 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6771 | \r |
6772 | m68ki_write_32(ea, FLAG_Z);\r |
6773 | }\r |
6774 | \r |
6775 | \r |
6776 | void m68k_op_subi_32_pi(void)\r |
6777 | {\r |
6778 | uint src = OPER_I_32();\r |
6779 | uint ea = EA_AY_PI_32();\r |
6780 | uint dst = m68ki_read_32(ea);\r |
6781 | uint res = dst - src;\r |
6782 | \r |
6783 | FLAG_N = NFLAG_32(res);\r |
6784 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6785 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6786 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6787 | \r |
6788 | m68ki_write_32(ea, FLAG_Z);\r |
6789 | }\r |
6790 | \r |
6791 | \r |
6792 | void m68k_op_subi_32_pd(void)\r |
6793 | {\r |
6794 | uint src = OPER_I_32();\r |
6795 | uint ea = EA_AY_PD_32();\r |
6796 | uint dst = m68ki_read_32(ea);\r |
6797 | uint res = dst - src;\r |
6798 | \r |
6799 | FLAG_N = NFLAG_32(res);\r |
6800 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6801 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6802 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6803 | \r |
6804 | m68ki_write_32(ea, FLAG_Z);\r |
6805 | }\r |
6806 | \r |
6807 | \r |
6808 | void m68k_op_subi_32_di(void)\r |
6809 | {\r |
6810 | uint src = OPER_I_32();\r |
6811 | uint ea = EA_AY_DI_32();\r |
6812 | uint dst = m68ki_read_32(ea);\r |
6813 | uint res = dst - src;\r |
6814 | \r |
6815 | FLAG_N = NFLAG_32(res);\r |
6816 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6817 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6818 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6819 | \r |
6820 | m68ki_write_32(ea, FLAG_Z);\r |
6821 | }\r |
6822 | \r |
6823 | \r |
6824 | void m68k_op_subi_32_ix(void)\r |
6825 | {\r |
6826 | uint src = OPER_I_32();\r |
6827 | uint ea = EA_AY_IX_32();\r |
6828 | uint dst = m68ki_read_32(ea);\r |
6829 | uint res = dst - src;\r |
6830 | \r |
6831 | FLAG_N = NFLAG_32(res);\r |
6832 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6833 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6834 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6835 | \r |
6836 | m68ki_write_32(ea, FLAG_Z);\r |
6837 | }\r |
6838 | \r |
6839 | \r |
6840 | void m68k_op_subi_32_aw(void)\r |
6841 | {\r |
6842 | uint src = OPER_I_32();\r |
6843 | uint ea = EA_AW_32();\r |
6844 | uint dst = m68ki_read_32(ea);\r |
6845 | uint res = dst - src;\r |
6846 | \r |
6847 | FLAG_N = NFLAG_32(res);\r |
6848 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6849 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6850 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6851 | \r |
6852 | m68ki_write_32(ea, FLAG_Z);\r |
6853 | }\r |
6854 | \r |
6855 | \r |
6856 | void m68k_op_subi_32_al(void)\r |
6857 | {\r |
6858 | uint src = OPER_I_32();\r |
6859 | uint ea = EA_AL_32();\r |
6860 | uint dst = m68ki_read_32(ea);\r |
6861 | uint res = dst - src;\r |
6862 | \r |
6863 | FLAG_N = NFLAG_32(res);\r |
6864 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
6865 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
6866 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
6867 | \r |
6868 | m68ki_write_32(ea, FLAG_Z);\r |
6869 | }\r |
6870 | \r |
6871 | \r |
6872 | void m68k_op_subq_8_d(void)\r |
6873 | {\r |
6874 | uint* r_dst = &DY;\r |
6875 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
6876 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
6877 | uint res = dst - src;\r |
6878 | \r |
6879 | FLAG_N = NFLAG_8(res);\r |
6880 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6881 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6882 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6883 | \r |
6884 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;\r |
6885 | }\r |
6886 | \r |
6887 | \r |
6888 | void m68k_op_subq_8_ai(void)\r |
6889 | {\r |
6890 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
6891 | uint ea = EA_AY_AI_8();\r |
6892 | uint dst = m68ki_read_8(ea);\r |
6893 | uint res = dst - src;\r |
6894 | \r |
6895 | FLAG_N = NFLAG_8(res);\r |
6896 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6897 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6898 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6899 | \r |
6900 | m68ki_write_8(ea, FLAG_Z);\r |
6901 | }\r |
6902 | \r |
6903 | \r |
6904 | void m68k_op_subq_8_pi(void)\r |
6905 | {\r |
6906 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
6907 | uint ea = EA_AY_PI_8();\r |
6908 | uint dst = m68ki_read_8(ea);\r |
6909 | uint res = dst - src;\r |
6910 | \r |
6911 | FLAG_N = NFLAG_8(res);\r |
6912 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6913 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6914 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6915 | \r |
6916 | m68ki_write_8(ea, FLAG_Z);\r |
6917 | }\r |
6918 | \r |
6919 | \r |
6920 | void m68k_op_subq_8_pi7(void)\r |
6921 | {\r |
6922 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
6923 | uint ea = EA_A7_PI_8();\r |
6924 | uint dst = m68ki_read_8(ea);\r |
6925 | uint res = dst - src;\r |
6926 | \r |
6927 | FLAG_N = NFLAG_8(res);\r |
6928 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6929 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6930 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6931 | \r |
6932 | m68ki_write_8(ea, FLAG_Z);\r |
6933 | }\r |
6934 | \r |
6935 | \r |
6936 | void m68k_op_subq_8_pd(void)\r |
6937 | {\r |
6938 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
6939 | uint ea = EA_AY_PD_8();\r |
6940 | uint dst = m68ki_read_8(ea);\r |
6941 | uint res = dst - src;\r |
6942 | \r |
6943 | FLAG_N = NFLAG_8(res);\r |
6944 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6945 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6946 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6947 | \r |
6948 | m68ki_write_8(ea, FLAG_Z);\r |
6949 | }\r |
6950 | \r |
6951 | \r |
6952 | void m68k_op_subq_8_pd7(void)\r |
6953 | {\r |
6954 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
6955 | uint ea = EA_A7_PD_8();\r |
6956 | uint dst = m68ki_read_8(ea);\r |
6957 | uint res = dst - src;\r |
6958 | \r |
6959 | FLAG_N = NFLAG_8(res);\r |
6960 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6961 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6962 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6963 | \r |
6964 | m68ki_write_8(ea, FLAG_Z);\r |
6965 | }\r |
6966 | \r |
6967 | \r |
6968 | void m68k_op_subq_8_di(void)\r |
6969 | {\r |
6970 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
6971 | uint ea = EA_AY_DI_8();\r |
6972 | uint dst = m68ki_read_8(ea);\r |
6973 | uint res = dst - src;\r |
6974 | \r |
6975 | FLAG_N = NFLAG_8(res);\r |
6976 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6977 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6978 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6979 | \r |
6980 | m68ki_write_8(ea, FLAG_Z);\r |
6981 | }\r |
6982 | \r |
6983 | \r |
6984 | void m68k_op_subq_8_ix(void)\r |
6985 | {\r |
6986 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
6987 | uint ea = EA_AY_IX_8();\r |
6988 | uint dst = m68ki_read_8(ea);\r |
6989 | uint res = dst - src;\r |
6990 | \r |
6991 | FLAG_N = NFLAG_8(res);\r |
6992 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
6993 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
6994 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
6995 | \r |
6996 | m68ki_write_8(ea, FLAG_Z);\r |
6997 | }\r |
6998 | \r |
6999 | \r |
7000 | void m68k_op_subq_8_aw(void)\r |
7001 | {\r |
7002 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7003 | uint ea = EA_AW_8();\r |
7004 | uint dst = m68ki_read_8(ea);\r |
7005 | uint res = dst - src;\r |
7006 | \r |
7007 | FLAG_N = NFLAG_8(res);\r |
7008 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
7009 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
7010 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
7011 | \r |
7012 | m68ki_write_8(ea, FLAG_Z);\r |
7013 | }\r |
7014 | \r |
7015 | \r |
7016 | void m68k_op_subq_8_al(void)\r |
7017 | {\r |
7018 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7019 | uint ea = EA_AL_8();\r |
7020 | uint dst = m68ki_read_8(ea);\r |
7021 | uint res = dst - src;\r |
7022 | \r |
7023 | FLAG_N = NFLAG_8(res);\r |
7024 | FLAG_Z = MASK_OUT_ABOVE_8(res);\r |
7025 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
7026 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
7027 | \r |
7028 | m68ki_write_8(ea, FLAG_Z);\r |
7029 | }\r |
7030 | \r |
7031 | \r |
7032 | void m68k_op_subq_16_d(void)\r |
7033 | {\r |
7034 | uint* r_dst = &DY;\r |
7035 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7036 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
7037 | uint res = dst - src;\r |
7038 | \r |
7039 | FLAG_N = NFLAG_16(res);\r |
7040 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
7041 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7042 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7043 | \r |
7044 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;\r |
7045 | }\r |
7046 | \r |
7047 | \r |
7048 | void m68k_op_subq_16_a(void)\r |
7049 | {\r |
7050 | uint* r_dst = &AY;\r |
7051 | \r |
7052 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));\r |
7053 | }\r |
7054 | \r |
7055 | \r |
7056 | void m68k_op_subq_16_ai(void)\r |
7057 | {\r |
7058 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7059 | uint ea = EA_AY_AI_16();\r |
7060 | uint dst = m68ki_read_16(ea);\r |
7061 | uint res = dst - src;\r |
7062 | \r |
7063 | FLAG_N = NFLAG_16(res);\r |
7064 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
7065 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7066 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7067 | \r |
7068 | m68ki_write_16(ea, FLAG_Z);\r |
7069 | }\r |
7070 | \r |
7071 | \r |
7072 | void m68k_op_subq_16_pi(void)\r |
7073 | {\r |
7074 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7075 | uint ea = EA_AY_PI_16();\r |
7076 | uint dst = m68ki_read_16(ea);\r |
7077 | uint res = dst - src;\r |
7078 | \r |
7079 | FLAG_N = NFLAG_16(res);\r |
7080 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
7081 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7082 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7083 | \r |
7084 | m68ki_write_16(ea, FLAG_Z);\r |
7085 | }\r |
7086 | \r |
7087 | \r |
7088 | void m68k_op_subq_16_pd(void)\r |
7089 | {\r |
7090 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7091 | uint ea = EA_AY_PD_16();\r |
7092 | uint dst = m68ki_read_16(ea);\r |
7093 | uint res = dst - src;\r |
7094 | \r |
7095 | FLAG_N = NFLAG_16(res);\r |
7096 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
7097 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7098 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7099 | \r |
7100 | m68ki_write_16(ea, FLAG_Z);\r |
7101 | }\r |
7102 | \r |
7103 | \r |
7104 | void m68k_op_subq_16_di(void)\r |
7105 | {\r |
7106 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7107 | uint ea = EA_AY_DI_16();\r |
7108 | uint dst = m68ki_read_16(ea);\r |
7109 | uint res = dst - src;\r |
7110 | \r |
7111 | FLAG_N = NFLAG_16(res);\r |
7112 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
7113 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7114 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7115 | \r |
7116 | m68ki_write_16(ea, FLAG_Z);\r |
7117 | }\r |
7118 | \r |
7119 | \r |
7120 | void m68k_op_subq_16_ix(void)\r |
7121 | {\r |
7122 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7123 | uint ea = EA_AY_IX_16();\r |
7124 | uint dst = m68ki_read_16(ea);\r |
7125 | uint res = dst - src;\r |
7126 | \r |
7127 | FLAG_N = NFLAG_16(res);\r |
7128 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
7129 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7130 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7131 | \r |
7132 | m68ki_write_16(ea, FLAG_Z);\r |
7133 | }\r |
7134 | \r |
7135 | \r |
7136 | void m68k_op_subq_16_aw(void)\r |
7137 | {\r |
7138 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7139 | uint ea = EA_AW_16();\r |
7140 | uint dst = m68ki_read_16(ea);\r |
7141 | uint res = dst - src;\r |
7142 | \r |
7143 | FLAG_N = NFLAG_16(res);\r |
7144 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
7145 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7146 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7147 | \r |
7148 | m68ki_write_16(ea, FLAG_Z);\r |
7149 | }\r |
7150 | \r |
7151 | \r |
7152 | void m68k_op_subq_16_al(void)\r |
7153 | {\r |
7154 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7155 | uint ea = EA_AL_16();\r |
7156 | uint dst = m68ki_read_16(ea);\r |
7157 | uint res = dst - src;\r |
7158 | \r |
7159 | FLAG_N = NFLAG_16(res);\r |
7160 | FLAG_Z = MASK_OUT_ABOVE_16(res);\r |
7161 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7162 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7163 | \r |
7164 | m68ki_write_16(ea, FLAG_Z);\r |
7165 | }\r |
7166 | \r |
7167 | \r |
7168 | void m68k_op_subq_32_d(void)\r |
7169 | {\r |
7170 | uint* r_dst = &DY;\r |
7171 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7172 | uint dst = *r_dst;\r |
7173 | uint res = dst - src;\r |
7174 | \r |
7175 | FLAG_N = NFLAG_32(res);\r |
7176 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
7177 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7178 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7179 | \r |
7180 | *r_dst = FLAG_Z;\r |
7181 | }\r |
7182 | \r |
7183 | \r |
7184 | void m68k_op_subq_32_a(void)\r |
7185 | {\r |
7186 | uint* r_dst = &AY;\r |
7187 | \r |
7188 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));\r |
7189 | }\r |
7190 | \r |
7191 | \r |
7192 | void m68k_op_subq_32_ai(void)\r |
7193 | {\r |
7194 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7195 | uint ea = EA_AY_AI_32();\r |
7196 | uint dst = m68ki_read_32(ea);\r |
7197 | uint res = dst - src;\r |
7198 | \r |
7199 | FLAG_N = NFLAG_32(res);\r |
7200 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
7201 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7202 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7203 | \r |
7204 | m68ki_write_32(ea, FLAG_Z);\r |
7205 | }\r |
7206 | \r |
7207 | \r |
7208 | void m68k_op_subq_32_pi(void)\r |
7209 | {\r |
7210 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7211 | uint ea = EA_AY_PI_32();\r |
7212 | uint dst = m68ki_read_32(ea);\r |
7213 | uint res = dst - src;\r |
7214 | \r |
7215 | FLAG_N = NFLAG_32(res);\r |
7216 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
7217 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7218 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7219 | \r |
7220 | m68ki_write_32(ea, FLAG_Z);\r |
7221 | }\r |
7222 | \r |
7223 | \r |
7224 | void m68k_op_subq_32_pd(void)\r |
7225 | {\r |
7226 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7227 | uint ea = EA_AY_PD_32();\r |
7228 | uint dst = m68ki_read_32(ea);\r |
7229 | uint res = dst - src;\r |
7230 | \r |
7231 | FLAG_N = NFLAG_32(res);\r |
7232 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
7233 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7234 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7235 | \r |
7236 | m68ki_write_32(ea, FLAG_Z);\r |
7237 | }\r |
7238 | \r |
7239 | \r |
7240 | void m68k_op_subq_32_di(void)\r |
7241 | {\r |
7242 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7243 | uint ea = EA_AY_DI_32();\r |
7244 | uint dst = m68ki_read_32(ea);\r |
7245 | uint res = dst - src;\r |
7246 | \r |
7247 | FLAG_N = NFLAG_32(res);\r |
7248 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
7249 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7250 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7251 | \r |
7252 | m68ki_write_32(ea, FLAG_Z);\r |
7253 | }\r |
7254 | \r |
7255 | \r |
7256 | void m68k_op_subq_32_ix(void)\r |
7257 | {\r |
7258 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7259 | uint ea = EA_AY_IX_32();\r |
7260 | uint dst = m68ki_read_32(ea);\r |
7261 | uint res = dst - src;\r |
7262 | \r |
7263 | FLAG_N = NFLAG_32(res);\r |
7264 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
7265 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7266 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7267 | \r |
7268 | m68ki_write_32(ea, FLAG_Z);\r |
7269 | }\r |
7270 | \r |
7271 | \r |
7272 | void m68k_op_subq_32_aw(void)\r |
7273 | {\r |
7274 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7275 | uint ea = EA_AW_32();\r |
7276 | uint dst = m68ki_read_32(ea);\r |
7277 | uint res = dst - src;\r |
7278 | \r |
7279 | FLAG_N = NFLAG_32(res);\r |
7280 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
7281 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7282 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7283 | \r |
7284 | m68ki_write_32(ea, FLAG_Z);\r |
7285 | }\r |
7286 | \r |
7287 | \r |
7288 | void m68k_op_subq_32_al(void)\r |
7289 | {\r |
7290 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;\r |
7291 | uint ea = EA_AL_32();\r |
7292 | uint dst = m68ki_read_32(ea);\r |
7293 | uint res = dst - src;\r |
7294 | \r |
7295 | FLAG_N = NFLAG_32(res);\r |
7296 | FLAG_Z = MASK_OUT_ABOVE_32(res);\r |
7297 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7298 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7299 | \r |
7300 | m68ki_write_32(ea, FLAG_Z);\r |
7301 | }\r |
7302 | \r |
7303 | \r |
7304 | void m68k_op_subx_8_rr(void)\r |
7305 | {\r |
7306 | uint* r_dst = &DX;\r |
7307 | uint src = MASK_OUT_ABOVE_8(DY);\r |
7308 | uint dst = MASK_OUT_ABOVE_8(*r_dst);\r |
7309 | uint res = dst - src - XFLAG_AS_1();\r |
7310 | \r |
7311 | FLAG_N = NFLAG_8(res);\r |
7312 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
7313 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
7314 | \r |
7315 | res = MASK_OUT_ABOVE_8(res);\r |
7316 | FLAG_Z |= res;\r |
7317 | \r |
7318 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;\r |
7319 | }\r |
7320 | \r |
7321 | \r |
7322 | void m68k_op_subx_16_rr(void)\r |
7323 | {\r |
7324 | uint* r_dst = &DX;\r |
7325 | uint src = MASK_OUT_ABOVE_16(DY);\r |
7326 | uint dst = MASK_OUT_ABOVE_16(*r_dst);\r |
7327 | uint res = dst - src - XFLAG_AS_1();\r |
7328 | \r |
7329 | FLAG_N = NFLAG_16(res);\r |
7330 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7331 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7332 | \r |
7333 | res = MASK_OUT_ABOVE_16(res);\r |
7334 | FLAG_Z |= res;\r |
7335 | \r |
7336 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;\r |
7337 | }\r |
7338 | \r |
7339 | \r |
7340 | void m68k_op_subx_32_rr(void)\r |
7341 | {\r |
7342 | uint* r_dst = &DX;\r |
7343 | uint src = DY;\r |
7344 | uint dst = *r_dst;\r |
7345 | uint res = dst - src - XFLAG_AS_1();\r |
7346 | \r |
7347 | FLAG_N = NFLAG_32(res);\r |
7348 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7349 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7350 | \r |
7351 | res = MASK_OUT_ABOVE_32(res);\r |
7352 | FLAG_Z |= res;\r |
7353 | \r |
7354 | *r_dst = res;\r |
7355 | }\r |
7356 | \r |
7357 | \r |
7358 | void m68k_op_subx_8_mm_ax7(void)\r |
7359 | {\r |
7360 | uint src = OPER_AY_PD_8();\r |
7361 | uint ea = EA_A7_PD_8();\r |
7362 | uint dst = m68ki_read_8(ea);\r |
7363 | uint res = dst - src - XFLAG_AS_1();\r |
7364 | \r |
7365 | FLAG_N = NFLAG_8(res);\r |
7366 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
7367 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
7368 | \r |
7369 | res = MASK_OUT_ABOVE_8(res);\r |
7370 | FLAG_Z |= res;\r |
7371 | \r |
7372 | m68ki_write_8(ea, res);\r |
7373 | }\r |
7374 | \r |
7375 | \r |
7376 | void m68k_op_subx_8_mm_ay7(void)\r |
7377 | {\r |
7378 | uint src = OPER_A7_PD_8();\r |
7379 | uint ea = EA_AX_PD_8();\r |
7380 | uint dst = m68ki_read_8(ea);\r |
7381 | uint res = dst - src - XFLAG_AS_1();\r |
7382 | \r |
7383 | FLAG_N = NFLAG_8(res);\r |
7384 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
7385 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
7386 | \r |
7387 | res = MASK_OUT_ABOVE_8(res);\r |
7388 | FLAG_Z |= res;\r |
7389 | \r |
7390 | m68ki_write_8(ea, res);\r |
7391 | }\r |
7392 | \r |
7393 | \r |
7394 | void m68k_op_subx_8_mm_axy7(void)\r |
7395 | {\r |
7396 | uint src = OPER_A7_PD_8();\r |
7397 | uint ea = EA_A7_PD_8();\r |
7398 | uint dst = m68ki_read_8(ea);\r |
7399 | uint res = dst - src - XFLAG_AS_1();\r |
7400 | \r |
7401 | FLAG_N = NFLAG_8(res);\r |
7402 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
7403 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
7404 | \r |
7405 | res = MASK_OUT_ABOVE_8(res);\r |
7406 | FLAG_Z |= res;\r |
7407 | \r |
7408 | m68ki_write_8(ea, res);\r |
7409 | }\r |
7410 | \r |
7411 | \r |
7412 | void m68k_op_subx_8_mm(void)\r |
7413 | {\r |
7414 | uint src = OPER_AY_PD_8();\r |
7415 | uint ea = EA_AX_PD_8();\r |
7416 | uint dst = m68ki_read_8(ea);\r |
7417 | uint res = dst - src - XFLAG_AS_1();\r |
7418 | \r |
7419 | FLAG_N = NFLAG_8(res);\r |
7420 | FLAG_X = FLAG_C = CFLAG_8(res);\r |
7421 | FLAG_V = VFLAG_SUB_8(src, dst, res);\r |
7422 | \r |
7423 | res = MASK_OUT_ABOVE_8(res);\r |
7424 | FLAG_Z |= res;\r |
7425 | \r |
7426 | m68ki_write_8(ea, res);\r |
7427 | }\r |
7428 | \r |
7429 | \r |
7430 | void m68k_op_subx_16_mm(void)\r |
7431 | {\r |
7432 | uint src = OPER_AY_PD_16();\r |
7433 | uint ea = EA_AX_PD_16();\r |
7434 | uint dst = m68ki_read_16(ea);\r |
7435 | uint res = dst - src - XFLAG_AS_1();\r |
7436 | \r |
7437 | FLAG_N = NFLAG_16(res);\r |
7438 | FLAG_X = FLAG_C = CFLAG_16(res);\r |
7439 | FLAG_V = VFLAG_SUB_16(src, dst, res);\r |
7440 | \r |
7441 | res = MASK_OUT_ABOVE_16(res);\r |
7442 | FLAG_Z |= res;\r |
7443 | \r |
7444 | m68ki_write_16(ea, res);\r |
7445 | }\r |
7446 | \r |
7447 | \r |
7448 | void m68k_op_subx_32_mm(void)\r |
7449 | {\r |
7450 | uint src = OPER_AY_PD_32();\r |
7451 | uint ea = EA_AX_PD_32();\r |
7452 | uint dst = m68ki_read_32(ea);\r |
7453 | uint res = dst - src - XFLAG_AS_1();\r |
7454 | \r |
7455 | FLAG_N = NFLAG_32(res);\r |
7456 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);\r |
7457 | FLAG_V = VFLAG_SUB_32(src, dst, res);\r |
7458 | \r |
7459 | res = MASK_OUT_ABOVE_32(res);\r |
7460 | FLAG_Z |= res;\r |
7461 | \r |
7462 | m68ki_write_32(ea, res);\r |
7463 | }\r |
7464 | \r |
7465 | \r |
7466 | void m68k_op_swap_32(void)\r |
7467 | {\r |
7468 | uint* r_dst = &DY;\r |
7469 | \r |
7470 | FLAG_Z = MASK_OUT_ABOVE_32(*r_dst<<16);\r |
7471 | *r_dst = (*r_dst>>16) | FLAG_Z;\r |
7472 | \r |
7473 | FLAG_Z = *r_dst;\r |
7474 | FLAG_N = NFLAG_32(*r_dst);\r |
7475 | FLAG_C = CFLAG_CLEAR;\r |
7476 | FLAG_V = VFLAG_CLEAR;\r |
7477 | }\r |
7478 | \r |
7479 | \r |
7480 | void m68k_op_tas_8_d(void)\r |
7481 | {\r |
7482 | uint* r_dst = &DY;\r |
7483 | \r |
7484 | FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);\r |
7485 | FLAG_N = NFLAG_8(*r_dst);\r |
7486 | FLAG_V = VFLAG_CLEAR;\r |
7487 | FLAG_C = CFLAG_CLEAR;\r |
7488 | *r_dst |= 0x80;\r |
7489 | }\r |
7490 | \r |
7491 | \r |
7492 | void m68k_op_tas_8_ai(void)\r |
7493 | {\r |
7494 | uint ea = EA_AY_AI_8();\r |
7495 | uint dst = m68ki_read_8(ea);\r |
7496 | \r |
7497 | FLAG_Z = dst;\r |
7498 | FLAG_N = NFLAG_8(dst);\r |
7499 | FLAG_V = VFLAG_CLEAR;\r |
7500 | FLAG_C = CFLAG_CLEAR;\r |
7501 | // m68ki_write_8(ea, dst | 0x80); // notaz: genesis, but only to mem\r |
7502 | }\r |
7503 | \r |
7504 | \r |
7505 | void m68k_op_tas_8_pi(void)\r |
7506 | {\r |
7507 | uint ea = EA_AY_PI_8();\r |
7508 | uint dst = m68ki_read_8(ea);\r |
7509 | \r |
7510 | FLAG_Z = dst;\r |
7511 | FLAG_N = NFLAG_8(dst);\r |
7512 | FLAG_V = VFLAG_CLEAR;\r |
7513 | FLAG_C = CFLAG_CLEAR;\r |
7514 | // m68ki_write_8(ea, dst | 0x80); // notaz: genesis, but only to mem\r |
7515 | }\r |
7516 | \r |
7517 | \r |
7518 | void m68k_op_tas_8_pi7(void)\r |
7519 | {\r |
7520 | uint ea = EA_A7_PI_8();\r |
7521 | uint dst = m68ki_read_8(ea);\r |
7522 | \r |
7523 | FLAG_Z = dst;\r |
7524 | FLAG_N = NFLAG_8(dst);\r |
7525 | FLAG_V = VFLAG_CLEAR;\r |
7526 | FLAG_C = CFLAG_CLEAR;\r |
7527 | // m68ki_write_8(ea, dst | 0x80); // notaz: genesis, but only to mem\r |
7528 | }\r |
7529 | \r |
7530 | \r |
7531 | void m68k_op_tas_8_pd(void)\r |
7532 | {\r |
7533 | uint ea = EA_AY_PD_8();\r |
7534 | uint dst = m68ki_read_8(ea);\r |
7535 | \r |
7536 | FLAG_Z = dst;\r |
7537 | FLAG_N = NFLAG_8(dst);\r |
7538 | FLAG_V = VFLAG_CLEAR;\r |
7539 | FLAG_C = CFLAG_CLEAR;\r |
7540 | // m68ki_write_8(ea, dst | 0x80); // notaz: genesis, but only to mem\r |
7541 | }\r |
7542 | \r |
7543 | \r |
7544 | void m68k_op_tas_8_pd7(void)\r |
7545 | {\r |
7546 | uint ea = EA_A7_PD_8();\r |
7547 | uint dst = m68ki_read_8(ea);\r |
7548 | \r |
7549 | FLAG_Z = dst;\r |
7550 | FLAG_N = NFLAG_8(dst);\r |
7551 | FLAG_V = VFLAG_CLEAR;\r |
7552 | FLAG_C = CFLAG_CLEAR;\r |
7553 | // m68ki_write_8(ea, dst | 0x80); // notaz: genesis, but only to mem\r |
7554 | }\r |
7555 | \r |
7556 | \r |
7557 | void m68k_op_tas_8_di(void)\r |
7558 | {\r |
7559 | uint ea = EA_AY_DI_8();\r |
7560 | uint dst = m68ki_read_8(ea);\r |
7561 | \r |
7562 | FLAG_Z = dst;\r |
7563 | FLAG_N = NFLAG_8(dst);\r |
7564 | FLAG_V = VFLAG_CLEAR;\r |
7565 | FLAG_C = CFLAG_CLEAR;\r |
7566 | // m68ki_write_8(ea, dst | 0x80); // notaz: genesis, but only to mem\r |
7567 | }\r |
7568 | \r |
7569 | \r |
7570 | void m68k_op_tas_8_ix(void)\r |
7571 | {\r |
7572 | uint ea = EA_AY_IX_8();\r |
7573 | uint dst = m68ki_read_8(ea);\r |
7574 | \r |
7575 | FLAG_Z = dst;\r |
7576 | FLAG_N = NFLAG_8(dst);\r |
7577 | FLAG_V = VFLAG_CLEAR;\r |
7578 | FLAG_C = CFLAG_CLEAR;\r |
7579 | // m68ki_write_8(ea, dst | 0x80); // notaz: genesis, but only to mem\r |
7580 | }\r |
7581 | \r |
7582 | \r |
7583 | void m68k_op_tas_8_aw(void)\r |
7584 | {\r |
7585 | uint ea = EA_AW_8();\r |
7586 | uint dst = m68ki_read_8(ea);\r |
7587 | \r |
7588 | FLAG_Z = dst;\r |
7589 | FLAG_N = NFLAG_8(dst);\r |
7590 | FLAG_V = VFLAG_CLEAR;\r |
7591 | FLAG_C = CFLAG_CLEAR;\r |
7592 | // m68ki_write_8(ea, dst | 0x80); // notaz: genesis, but only to mem\r |
7593 | }\r |
7594 | \r |
7595 | \r |
7596 | void m68k_op_tas_8_al(void)\r |
7597 | {\r |
7598 | uint ea = EA_AL_8();\r |
7599 | uint dst = m68ki_read_8(ea);\r |
7600 | \r |
7601 | FLAG_Z = dst;\r |
7602 | FLAG_N = NFLAG_8(dst);\r |
7603 | FLAG_V = VFLAG_CLEAR;\r |
7604 | FLAG_C = CFLAG_CLEAR;\r |
7605 | // m68ki_write_8(ea, dst | 0x80); // notaz: genesis, but only to mem\r |
7606 | }\r |
7607 | \r |
7608 | \r |
7609 | void m68k_op_trap(void)\r |
7610 | {\r |
7611 | /* Trap#n stacks exception frame type 0 */\r |
7612 | m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (REG_IR & 0xf)); /* HJB 990403 */\r |
7613 | }\r |
7614 | \r |
7615 | \r |
7616 | void m68k_op_trapt(void)\r |
7617 | {\r |
7618 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7619 | {\r |
7620 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7621 | return;\r |
7622 | }\r |
7623 | m68ki_exception_illegal();\r |
7624 | }\r |
7625 | \r |
7626 | \r |
7627 | void m68k_op_trapt_16(void)\r |
7628 | {\r |
7629 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7630 | {\r |
7631 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7632 | return;\r |
7633 | }\r |
7634 | m68ki_exception_illegal();\r |
7635 | }\r |
7636 | \r |
7637 | \r |
7638 | void m68k_op_trapt_32(void)\r |
7639 | {\r |
7640 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7641 | {\r |
7642 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7643 | return;\r |
7644 | }\r |
7645 | m68ki_exception_illegal();\r |
7646 | }\r |
7647 | \r |
7648 | \r |
7649 | void m68k_op_trapf(void)\r |
7650 | {\r |
7651 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7652 | {\r |
7653 | return;\r |
7654 | }\r |
7655 | m68ki_exception_illegal();\r |
7656 | }\r |
7657 | \r |
7658 | \r |
7659 | void m68k_op_trapf_16(void)\r |
7660 | {\r |
7661 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7662 | {\r |
7663 | REG_PC += 2;\r |
7664 | return;\r |
7665 | }\r |
7666 | m68ki_exception_illegal();\r |
7667 | }\r |
7668 | \r |
7669 | \r |
7670 | void m68k_op_trapf_32(void)\r |
7671 | {\r |
7672 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7673 | {\r |
7674 | REG_PC += 4;\r |
7675 | return;\r |
7676 | }\r |
7677 | m68ki_exception_illegal();\r |
7678 | }\r |
7679 | \r |
7680 | \r |
7681 | void m68k_op_traphi(void)\r |
7682 | {\r |
7683 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7684 | {\r |
7685 | if(COND_HI())\r |
7686 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7687 | return;\r |
7688 | }\r |
7689 | m68ki_exception_illegal();\r |
7690 | }\r |
7691 | \r |
7692 | \r |
7693 | void m68k_op_trapls(void)\r |
7694 | {\r |
7695 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7696 | {\r |
7697 | if(COND_LS())\r |
7698 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7699 | return;\r |
7700 | }\r |
7701 | m68ki_exception_illegal();\r |
7702 | }\r |
7703 | \r |
7704 | \r |
7705 | void m68k_op_trapcc(void)\r |
7706 | {\r |
7707 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7708 | {\r |
7709 | if(COND_CC())\r |
7710 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7711 | return;\r |
7712 | }\r |
7713 | m68ki_exception_illegal();\r |
7714 | }\r |
7715 | \r |
7716 | \r |
7717 | void m68k_op_trapcs(void)\r |
7718 | {\r |
7719 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7720 | {\r |
7721 | if(COND_CS())\r |
7722 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7723 | return;\r |
7724 | }\r |
7725 | m68ki_exception_illegal();\r |
7726 | }\r |
7727 | \r |
7728 | \r |
7729 | void m68k_op_trapne(void)\r |
7730 | {\r |
7731 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7732 | {\r |
7733 | if(COND_NE())\r |
7734 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7735 | return;\r |
7736 | }\r |
7737 | m68ki_exception_illegal();\r |
7738 | }\r |
7739 | \r |
7740 | \r |
7741 | void m68k_op_trapeq(void)\r |
7742 | {\r |
7743 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7744 | {\r |
7745 | if(COND_EQ())\r |
7746 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7747 | return;\r |
7748 | }\r |
7749 | m68ki_exception_illegal();\r |
7750 | }\r |
7751 | \r |
7752 | \r |
7753 | void m68k_op_trapvc(void)\r |
7754 | {\r |
7755 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7756 | {\r |
7757 | if(COND_VC())\r |
7758 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7759 | return;\r |
7760 | }\r |
7761 | m68ki_exception_illegal();\r |
7762 | }\r |
7763 | \r |
7764 | \r |
7765 | void m68k_op_trapvs(void)\r |
7766 | {\r |
7767 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7768 | {\r |
7769 | if(COND_VS())\r |
7770 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7771 | return;\r |
7772 | }\r |
7773 | m68ki_exception_illegal();\r |
7774 | }\r |
7775 | \r |
7776 | \r |
7777 | void m68k_op_trappl(void)\r |
7778 | {\r |
7779 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7780 | {\r |
7781 | if(COND_PL())\r |
7782 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7783 | return;\r |
7784 | }\r |
7785 | m68ki_exception_illegal();\r |
7786 | }\r |
7787 | \r |
7788 | \r |
7789 | void m68k_op_trapmi(void)\r |
7790 | {\r |
7791 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7792 | {\r |
7793 | if(COND_MI())\r |
7794 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7795 | return;\r |
7796 | }\r |
7797 | m68ki_exception_illegal();\r |
7798 | }\r |
7799 | \r |
7800 | \r |
7801 | void m68k_op_trapge(void)\r |
7802 | {\r |
7803 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7804 | {\r |
7805 | if(COND_GE())\r |
7806 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7807 | return;\r |
7808 | }\r |
7809 | m68ki_exception_illegal();\r |
7810 | }\r |
7811 | \r |
7812 | \r |
7813 | void m68k_op_traplt(void)\r |
7814 | {\r |
7815 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7816 | {\r |
7817 | if(COND_LT())\r |
7818 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7819 | return;\r |
7820 | }\r |
7821 | m68ki_exception_illegal();\r |
7822 | }\r |
7823 | \r |
7824 | \r |
7825 | void m68k_op_trapgt(void)\r |
7826 | {\r |
7827 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7828 | {\r |
7829 | if(COND_GT())\r |
7830 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7831 | return;\r |
7832 | }\r |
7833 | m68ki_exception_illegal();\r |
7834 | }\r |
7835 | \r |
7836 | \r |
7837 | void m68k_op_traple(void)\r |
7838 | {\r |
7839 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7840 | {\r |
7841 | if(COND_LE())\r |
7842 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7843 | return;\r |
7844 | }\r |
7845 | m68ki_exception_illegal();\r |
7846 | }\r |
7847 | \r |
7848 | \r |
7849 | void m68k_op_traphi_16(void)\r |
7850 | {\r |
7851 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7852 | {\r |
7853 | if(COND_HI())\r |
7854 | {\r |
7855 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7856 | return;\r |
7857 | }\r |
7858 | REG_PC += 2;\r |
7859 | return;\r |
7860 | }\r |
7861 | m68ki_exception_illegal();\r |
7862 | }\r |
7863 | \r |
7864 | \r |
7865 | void m68k_op_trapls_16(void)\r |
7866 | {\r |
7867 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7868 | {\r |
7869 | if(COND_LS())\r |
7870 | {\r |
7871 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7872 | return;\r |
7873 | }\r |
7874 | REG_PC += 2;\r |
7875 | return;\r |
7876 | }\r |
7877 | m68ki_exception_illegal();\r |
7878 | }\r |
7879 | \r |
7880 | \r |
7881 | void m68k_op_trapcc_16(void)\r |
7882 | {\r |
7883 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7884 | {\r |
7885 | if(COND_CC())\r |
7886 | {\r |
7887 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7888 | return;\r |
7889 | }\r |
7890 | REG_PC += 2;\r |
7891 | return;\r |
7892 | }\r |
7893 | m68ki_exception_illegal();\r |
7894 | }\r |
7895 | \r |
7896 | \r |
7897 | void m68k_op_trapcs_16(void)\r |
7898 | {\r |
7899 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7900 | {\r |
7901 | if(COND_CS())\r |
7902 | {\r |
7903 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7904 | return;\r |
7905 | }\r |
7906 | REG_PC += 2;\r |
7907 | return;\r |
7908 | }\r |
7909 | m68ki_exception_illegal();\r |
7910 | }\r |
7911 | \r |
7912 | \r |
7913 | void m68k_op_trapne_16(void)\r |
7914 | {\r |
7915 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7916 | {\r |
7917 | if(COND_NE())\r |
7918 | {\r |
7919 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7920 | return;\r |
7921 | }\r |
7922 | REG_PC += 2;\r |
7923 | return;\r |
7924 | }\r |
7925 | m68ki_exception_illegal();\r |
7926 | }\r |
7927 | \r |
7928 | \r |
7929 | void m68k_op_trapeq_16(void)\r |
7930 | {\r |
7931 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7932 | {\r |
7933 | if(COND_EQ())\r |
7934 | {\r |
7935 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7936 | return;\r |
7937 | }\r |
7938 | REG_PC += 2;\r |
7939 | return;\r |
7940 | }\r |
7941 | m68ki_exception_illegal();\r |
7942 | }\r |
7943 | \r |
7944 | \r |
7945 | void m68k_op_trapvc_16(void)\r |
7946 | {\r |
7947 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7948 | {\r |
7949 | if(COND_VC())\r |
7950 | {\r |
7951 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7952 | return;\r |
7953 | }\r |
7954 | REG_PC += 2;\r |
7955 | return;\r |
7956 | }\r |
7957 | m68ki_exception_illegal();\r |
7958 | }\r |
7959 | \r |
7960 | \r |
7961 | void m68k_op_trapvs_16(void)\r |
7962 | {\r |
7963 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7964 | {\r |
7965 | if(COND_VS())\r |
7966 | {\r |
7967 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7968 | return;\r |
7969 | }\r |
7970 | REG_PC += 2;\r |
7971 | return;\r |
7972 | }\r |
7973 | m68ki_exception_illegal();\r |
7974 | }\r |
7975 | \r |
7976 | \r |
7977 | void m68k_op_trappl_16(void)\r |
7978 | {\r |
7979 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7980 | {\r |
7981 | if(COND_PL())\r |
7982 | {\r |
7983 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
7984 | return;\r |
7985 | }\r |
7986 | REG_PC += 2;\r |
7987 | return;\r |
7988 | }\r |
7989 | m68ki_exception_illegal();\r |
7990 | }\r |
7991 | \r |
7992 | \r |
7993 | void m68k_op_trapmi_16(void)\r |
7994 | {\r |
7995 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
7996 | {\r |
7997 | if(COND_MI())\r |
7998 | {\r |
7999 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8000 | return;\r |
8001 | }\r |
8002 | REG_PC += 2;\r |
8003 | return;\r |
8004 | }\r |
8005 | m68ki_exception_illegal();\r |
8006 | }\r |
8007 | \r |
8008 | \r |
8009 | void m68k_op_trapge_16(void)\r |
8010 | {\r |
8011 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8012 | {\r |
8013 | if(COND_GE())\r |
8014 | {\r |
8015 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8016 | return;\r |
8017 | }\r |
8018 | REG_PC += 2;\r |
8019 | return;\r |
8020 | }\r |
8021 | m68ki_exception_illegal();\r |
8022 | }\r |
8023 | \r |
8024 | \r |
8025 | void m68k_op_traplt_16(void)\r |
8026 | {\r |
8027 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8028 | {\r |
8029 | if(COND_LT())\r |
8030 | {\r |
8031 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8032 | return;\r |
8033 | }\r |
8034 | REG_PC += 2;\r |
8035 | return;\r |
8036 | }\r |
8037 | m68ki_exception_illegal();\r |
8038 | }\r |
8039 | \r |
8040 | \r |
8041 | void m68k_op_trapgt_16(void)\r |
8042 | {\r |
8043 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8044 | {\r |
8045 | if(COND_GT())\r |
8046 | {\r |
8047 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8048 | return;\r |
8049 | }\r |
8050 | REG_PC += 2;\r |
8051 | return;\r |
8052 | }\r |
8053 | m68ki_exception_illegal();\r |
8054 | }\r |
8055 | \r |
8056 | \r |
8057 | void m68k_op_traple_16(void)\r |
8058 | {\r |
8059 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8060 | {\r |
8061 | if(COND_LE())\r |
8062 | {\r |
8063 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8064 | return;\r |
8065 | }\r |
8066 | REG_PC += 2;\r |
8067 | return;\r |
8068 | }\r |
8069 | m68ki_exception_illegal();\r |
8070 | }\r |
8071 | \r |
8072 | \r |
8073 | void m68k_op_traphi_32(void)\r |
8074 | {\r |
8075 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8076 | {\r |
8077 | if(COND_HI())\r |
8078 | {\r |
8079 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8080 | return;\r |
8081 | }\r |
8082 | REG_PC += 4;\r |
8083 | return;\r |
8084 | }\r |
8085 | m68ki_exception_illegal();\r |
8086 | }\r |
8087 | \r |
8088 | \r |
8089 | void m68k_op_trapls_32(void)\r |
8090 | {\r |
8091 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8092 | {\r |
8093 | if(COND_LS())\r |
8094 | {\r |
8095 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8096 | return;\r |
8097 | }\r |
8098 | REG_PC += 4;\r |
8099 | return;\r |
8100 | }\r |
8101 | m68ki_exception_illegal();\r |
8102 | }\r |
8103 | \r |
8104 | \r |
8105 | void m68k_op_trapcc_32(void)\r |
8106 | {\r |
8107 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8108 | {\r |
8109 | if(COND_CC())\r |
8110 | {\r |
8111 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8112 | return;\r |
8113 | }\r |
8114 | REG_PC += 4;\r |
8115 | return;\r |
8116 | }\r |
8117 | m68ki_exception_illegal();\r |
8118 | }\r |
8119 | \r |
8120 | \r |
8121 | void m68k_op_trapcs_32(void)\r |
8122 | {\r |
8123 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8124 | {\r |
8125 | if(COND_CS())\r |
8126 | {\r |
8127 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8128 | return;\r |
8129 | }\r |
8130 | REG_PC += 4;\r |
8131 | return;\r |
8132 | }\r |
8133 | m68ki_exception_illegal();\r |
8134 | }\r |
8135 | \r |
8136 | \r |
8137 | void m68k_op_trapne_32(void)\r |
8138 | {\r |
8139 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8140 | {\r |
8141 | if(COND_NE())\r |
8142 | {\r |
8143 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8144 | return;\r |
8145 | }\r |
8146 | REG_PC += 4;\r |
8147 | return;\r |
8148 | }\r |
8149 | m68ki_exception_illegal();\r |
8150 | }\r |
8151 | \r |
8152 | \r |
8153 | void m68k_op_trapeq_32(void)\r |
8154 | {\r |
8155 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8156 | {\r |
8157 | if(COND_EQ())\r |
8158 | {\r |
8159 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8160 | return;\r |
8161 | }\r |
8162 | REG_PC += 4;\r |
8163 | return;\r |
8164 | }\r |
8165 | m68ki_exception_illegal();\r |
8166 | }\r |
8167 | \r |
8168 | \r |
8169 | void m68k_op_trapvc_32(void)\r |
8170 | {\r |
8171 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8172 | {\r |
8173 | if(COND_VC())\r |
8174 | {\r |
8175 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8176 | return;\r |
8177 | }\r |
8178 | REG_PC += 4;\r |
8179 | return;\r |
8180 | }\r |
8181 | m68ki_exception_illegal();\r |
8182 | }\r |
8183 | \r |
8184 | \r |
8185 | void m68k_op_trapvs_32(void)\r |
8186 | {\r |
8187 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8188 | {\r |
8189 | if(COND_VS())\r |
8190 | {\r |
8191 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8192 | return;\r |
8193 | }\r |
8194 | REG_PC += 4;\r |
8195 | return;\r |
8196 | }\r |
8197 | m68ki_exception_illegal();\r |
8198 | }\r |
8199 | \r |
8200 | \r |
8201 | void m68k_op_trappl_32(void)\r |
8202 | {\r |
8203 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8204 | {\r |
8205 | if(COND_PL())\r |
8206 | {\r |
8207 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8208 | return;\r |
8209 | }\r |
8210 | REG_PC += 4;\r |
8211 | return;\r |
8212 | }\r |
8213 | m68ki_exception_illegal();\r |
8214 | }\r |
8215 | \r |
8216 | \r |
8217 | void m68k_op_trapmi_32(void)\r |
8218 | {\r |
8219 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8220 | {\r |
8221 | if(COND_MI())\r |
8222 | {\r |
8223 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8224 | return;\r |
8225 | }\r |
8226 | REG_PC += 4;\r |
8227 | return;\r |
8228 | }\r |
8229 | m68ki_exception_illegal();\r |
8230 | }\r |
8231 | \r |
8232 | \r |
8233 | void m68k_op_trapge_32(void)\r |
8234 | {\r |
8235 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8236 | {\r |
8237 | if(COND_GE())\r |
8238 | {\r |
8239 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8240 | return;\r |
8241 | }\r |
8242 | REG_PC += 4;\r |
8243 | return;\r |
8244 | }\r |
8245 | m68ki_exception_illegal();\r |
8246 | }\r |
8247 | \r |
8248 | \r |
8249 | void m68k_op_traplt_32(void)\r |
8250 | {\r |
8251 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8252 | {\r |
8253 | if(COND_LT())\r |
8254 | {\r |
8255 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8256 | return;\r |
8257 | }\r |
8258 | REG_PC += 4;\r |
8259 | return;\r |
8260 | }\r |
8261 | m68ki_exception_illegal();\r |
8262 | }\r |
8263 | \r |
8264 | \r |
8265 | void m68k_op_trapgt_32(void)\r |
8266 | {\r |
8267 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8268 | {\r |
8269 | if(COND_GT())\r |
8270 | {\r |
8271 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8272 | return;\r |
8273 | }\r |
8274 | REG_PC += 4;\r |
8275 | return;\r |
8276 | }\r |
8277 | m68ki_exception_illegal();\r |
8278 | }\r |
8279 | \r |
8280 | \r |
8281 | void m68k_op_traple_32(void)\r |
8282 | {\r |
8283 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8284 | {\r |
8285 | if(COND_LE())\r |
8286 | {\r |
8287 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8288 | return;\r |
8289 | }\r |
8290 | REG_PC += 4;\r |
8291 | return;\r |
8292 | }\r |
8293 | m68ki_exception_illegal();\r |
8294 | }\r |
8295 | \r |
8296 | \r |
8297 | void m68k_op_trapv(void)\r |
8298 | {\r |
8299 | if(COND_VC())\r |
8300 | {\r |
8301 | return;\r |
8302 | }\r |
8303 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */\r |
8304 | }\r |
8305 | \r |
8306 | \r |
8307 | void m68k_op_tst_8_d(void)\r |
8308 | {\r |
8309 | uint res = MASK_OUT_ABOVE_8(DY);\r |
8310 | \r |
8311 | FLAG_N = NFLAG_8(res);\r |
8312 | FLAG_Z = res;\r |
8313 | FLAG_V = VFLAG_CLEAR;\r |
8314 | FLAG_C = CFLAG_CLEAR;\r |
8315 | }\r |
8316 | \r |
8317 | \r |
8318 | void m68k_op_tst_8_ai(void)\r |
8319 | {\r |
8320 | uint res = OPER_AY_AI_8();\r |
8321 | \r |
8322 | FLAG_N = NFLAG_8(res);\r |
8323 | FLAG_Z = res;\r |
8324 | FLAG_V = VFLAG_CLEAR;\r |
8325 | FLAG_C = CFLAG_CLEAR;\r |
8326 | }\r |
8327 | \r |
8328 | \r |
8329 | void m68k_op_tst_8_pi(void)\r |
8330 | {\r |
8331 | uint res = OPER_AY_PI_8();\r |
8332 | \r |
8333 | FLAG_N = NFLAG_8(res);\r |
8334 | FLAG_Z = res;\r |
8335 | FLAG_V = VFLAG_CLEAR;\r |
8336 | FLAG_C = CFLAG_CLEAR;\r |
8337 | }\r |
8338 | \r |
8339 | \r |
8340 | void m68k_op_tst_8_pi7(void)\r |
8341 | {\r |
8342 | uint res = OPER_A7_PI_8();\r |
8343 | \r |
8344 | FLAG_N = NFLAG_8(res);\r |
8345 | FLAG_Z = res;\r |
8346 | FLAG_V = VFLAG_CLEAR;\r |
8347 | FLAG_C = CFLAG_CLEAR;\r |
8348 | }\r |
8349 | \r |
8350 | \r |
8351 | void m68k_op_tst_8_pd(void)\r |
8352 | {\r |
8353 | uint res = OPER_AY_PD_8();\r |
8354 | \r |
8355 | FLAG_N = NFLAG_8(res);\r |
8356 | FLAG_Z = res;\r |
8357 | FLAG_V = VFLAG_CLEAR;\r |
8358 | FLAG_C = CFLAG_CLEAR;\r |
8359 | }\r |
8360 | \r |
8361 | \r |
8362 | void m68k_op_tst_8_pd7(void)\r |
8363 | {\r |
8364 | uint res = OPER_A7_PD_8();\r |
8365 | \r |
8366 | FLAG_N = NFLAG_8(res);\r |
8367 | FLAG_Z = res;\r |
8368 | FLAG_V = VFLAG_CLEAR;\r |
8369 | FLAG_C = CFLAG_CLEAR;\r |
8370 | }\r |
8371 | \r |
8372 | \r |
8373 | void m68k_op_tst_8_di(void)\r |
8374 | {\r |
8375 | uint res = OPER_AY_DI_8();\r |
8376 | \r |
8377 | FLAG_N = NFLAG_8(res);\r |
8378 | FLAG_Z = res;\r |
8379 | FLAG_V = VFLAG_CLEAR;\r |
8380 | FLAG_C = CFLAG_CLEAR;\r |
8381 | }\r |
8382 | \r |
8383 | \r |
8384 | void m68k_op_tst_8_ix(void)\r |
8385 | {\r |
8386 | uint res = OPER_AY_IX_8();\r |
8387 | \r |
8388 | FLAG_N = NFLAG_8(res);\r |
8389 | FLAG_Z = res;\r |
8390 | FLAG_V = VFLAG_CLEAR;\r |
8391 | FLAG_C = CFLAG_CLEAR;\r |
8392 | }\r |
8393 | \r |
8394 | \r |
8395 | void m68k_op_tst_8_aw(void)\r |
8396 | {\r |
8397 | uint res = OPER_AW_8();\r |
8398 | \r |
8399 | FLAG_N = NFLAG_8(res);\r |
8400 | FLAG_Z = res;\r |
8401 | FLAG_V = VFLAG_CLEAR;\r |
8402 | FLAG_C = CFLAG_CLEAR;\r |
8403 | }\r |
8404 | \r |
8405 | \r |
8406 | void m68k_op_tst_8_al(void)\r |
8407 | {\r |
8408 | uint res = OPER_AL_8();\r |
8409 | \r |
8410 | FLAG_N = NFLAG_8(res);\r |
8411 | FLAG_Z = res;\r |
8412 | FLAG_V = VFLAG_CLEAR;\r |
8413 | FLAG_C = CFLAG_CLEAR;\r |
8414 | }\r |
8415 | \r |
8416 | \r |
8417 | void m68k_op_tst_8_pcdi(void)\r |
8418 | {\r |
8419 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8420 | {\r |
8421 | uint res = OPER_PCDI_8();\r |
8422 | \r |
8423 | FLAG_N = NFLAG_8(res);\r |
8424 | FLAG_Z = res;\r |
8425 | FLAG_V = VFLAG_CLEAR;\r |
8426 | FLAG_C = CFLAG_CLEAR;\r |
8427 | return;\r |
8428 | }\r |
8429 | m68ki_exception_illegal();\r |
8430 | }\r |
8431 | \r |
8432 | \r |
8433 | void m68k_op_tst_8_pcix(void)\r |
8434 | {\r |
8435 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8436 | {\r |
8437 | uint res = OPER_PCIX_8();\r |
8438 | \r |
8439 | FLAG_N = NFLAG_8(res);\r |
8440 | FLAG_Z = res;\r |
8441 | FLAG_V = VFLAG_CLEAR;\r |
8442 | FLAG_C = CFLAG_CLEAR;\r |
8443 | return;\r |
8444 | }\r |
8445 | m68ki_exception_illegal();\r |
8446 | }\r |
8447 | \r |
8448 | \r |
8449 | void m68k_op_tst_8_i(void)\r |
8450 | {\r |
8451 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8452 | {\r |
8453 | uint res = OPER_I_8();\r |
8454 | \r |
8455 | FLAG_N = NFLAG_8(res);\r |
8456 | FLAG_Z = res;\r |
8457 | FLAG_V = VFLAG_CLEAR;\r |
8458 | FLAG_C = CFLAG_CLEAR;\r |
8459 | return;\r |
8460 | }\r |
8461 | m68ki_exception_illegal();\r |
8462 | }\r |
8463 | \r |
8464 | \r |
8465 | void m68k_op_tst_16_d(void)\r |
8466 | {\r |
8467 | uint res = MASK_OUT_ABOVE_16(DY);\r |
8468 | \r |
8469 | FLAG_N = NFLAG_16(res);\r |
8470 | FLAG_Z = res;\r |
8471 | FLAG_V = VFLAG_CLEAR;\r |
8472 | FLAG_C = CFLAG_CLEAR;\r |
8473 | }\r |
8474 | \r |
8475 | \r |
8476 | void m68k_op_tst_16_a(void)\r |
8477 | {\r |
8478 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8479 | {\r |
8480 | uint res = MAKE_INT_16(AY);\r |
8481 | \r |
8482 | FLAG_N = NFLAG_16(res);\r |
8483 | FLAG_Z = res;\r |
8484 | FLAG_V = VFLAG_CLEAR;\r |
8485 | FLAG_C = CFLAG_CLEAR;\r |
8486 | return;\r |
8487 | }\r |
8488 | m68ki_exception_illegal();\r |
8489 | }\r |
8490 | \r |
8491 | \r |
8492 | void m68k_op_tst_16_ai(void)\r |
8493 | {\r |
8494 | uint res = OPER_AY_AI_16();\r |
8495 | \r |
8496 | FLAG_N = NFLAG_16(res);\r |
8497 | FLAG_Z = res;\r |
8498 | FLAG_V = VFLAG_CLEAR;\r |
8499 | FLAG_C = CFLAG_CLEAR;\r |
8500 | }\r |
8501 | \r |
8502 | \r |
8503 | void m68k_op_tst_16_pi(void)\r |
8504 | {\r |
8505 | uint res = OPER_AY_PI_16();\r |
8506 | \r |
8507 | FLAG_N = NFLAG_16(res);\r |
8508 | FLAG_Z = res;\r |
8509 | FLAG_V = VFLAG_CLEAR;\r |
8510 | FLAG_C = CFLAG_CLEAR;\r |
8511 | }\r |
8512 | \r |
8513 | \r |
8514 | void m68k_op_tst_16_pd(void)\r |
8515 | {\r |
8516 | uint res = OPER_AY_PD_16();\r |
8517 | \r |
8518 | FLAG_N = NFLAG_16(res);\r |
8519 | FLAG_Z = res;\r |
8520 | FLAG_V = VFLAG_CLEAR;\r |
8521 | FLAG_C = CFLAG_CLEAR;\r |
8522 | }\r |
8523 | \r |
8524 | \r |
8525 | void m68k_op_tst_16_di(void)\r |
8526 | {\r |
8527 | uint res = OPER_AY_DI_16();\r |
8528 | \r |
8529 | FLAG_N = NFLAG_16(res);\r |
8530 | FLAG_Z = res;\r |
8531 | FLAG_V = VFLAG_CLEAR;\r |
8532 | FLAG_C = CFLAG_CLEAR;\r |
8533 | }\r |
8534 | \r |
8535 | \r |
8536 | void m68k_op_tst_16_ix(void)\r |
8537 | {\r |
8538 | uint res = OPER_AY_IX_16();\r |
8539 | \r |
8540 | FLAG_N = NFLAG_16(res);\r |
8541 | FLAG_Z = res;\r |
8542 | FLAG_V = VFLAG_CLEAR;\r |
8543 | FLAG_C = CFLAG_CLEAR;\r |
8544 | }\r |
8545 | \r |
8546 | \r |
8547 | void m68k_op_tst_16_aw(void)\r |
8548 | {\r |
8549 | uint res = OPER_AW_16();\r |
8550 | \r |
8551 | FLAG_N = NFLAG_16(res);\r |
8552 | FLAG_Z = res;\r |
8553 | FLAG_V = VFLAG_CLEAR;\r |
8554 | FLAG_C = CFLAG_CLEAR;\r |
8555 | }\r |
8556 | \r |
8557 | \r |
8558 | void m68k_op_tst_16_al(void)\r |
8559 | {\r |
8560 | uint res = OPER_AL_16();\r |
8561 | \r |
8562 | FLAG_N = NFLAG_16(res);\r |
8563 | FLAG_Z = res;\r |
8564 | FLAG_V = VFLAG_CLEAR;\r |
8565 | FLAG_C = CFLAG_CLEAR;\r |
8566 | }\r |
8567 | \r |
8568 | \r |
8569 | void m68k_op_tst_16_pcdi(void)\r |
8570 | {\r |
8571 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8572 | {\r |
8573 | uint res = OPER_PCDI_16();\r |
8574 | \r |
8575 | FLAG_N = NFLAG_16(res);\r |
8576 | FLAG_Z = res;\r |
8577 | FLAG_V = VFLAG_CLEAR;\r |
8578 | FLAG_C = CFLAG_CLEAR;\r |
8579 | return;\r |
8580 | }\r |
8581 | m68ki_exception_illegal();\r |
8582 | }\r |
8583 | \r |
8584 | \r |
8585 | void m68k_op_tst_16_pcix(void)\r |
8586 | {\r |
8587 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8588 | {\r |
8589 | uint res = OPER_PCIX_16();\r |
8590 | \r |
8591 | FLAG_N = NFLAG_16(res);\r |
8592 | FLAG_Z = res;\r |
8593 | FLAG_V = VFLAG_CLEAR;\r |
8594 | FLAG_C = CFLAG_CLEAR;\r |
8595 | return;\r |
8596 | }\r |
8597 | m68ki_exception_illegal();\r |
8598 | }\r |
8599 | \r |
8600 | \r |
8601 | void m68k_op_tst_16_i(void)\r |
8602 | {\r |
8603 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8604 | {\r |
8605 | uint res = OPER_I_16();\r |
8606 | \r |
8607 | FLAG_N = NFLAG_16(res);\r |
8608 | FLAG_Z = res;\r |
8609 | FLAG_V = VFLAG_CLEAR;\r |
8610 | FLAG_C = CFLAG_CLEAR;\r |
8611 | return;\r |
8612 | }\r |
8613 | m68ki_exception_illegal();\r |
8614 | }\r |
8615 | \r |
8616 | \r |
8617 | void m68k_op_tst_32_d(void)\r |
8618 | {\r |
8619 | uint res = DY;\r |
8620 | \r |
8621 | FLAG_N = NFLAG_32(res);\r |
8622 | FLAG_Z = res;\r |
8623 | FLAG_V = VFLAG_CLEAR;\r |
8624 | FLAG_C = CFLAG_CLEAR;\r |
8625 | }\r |
8626 | \r |
8627 | \r |
8628 | void m68k_op_tst_32_a(void)\r |
8629 | {\r |
8630 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8631 | {\r |
8632 | uint res = AY;\r |
8633 | \r |
8634 | FLAG_N = NFLAG_32(res);\r |
8635 | FLAG_Z = res;\r |
8636 | FLAG_V = VFLAG_CLEAR;\r |
8637 | FLAG_C = CFLAG_CLEAR;\r |
8638 | return;\r |
8639 | }\r |
8640 | m68ki_exception_illegal();\r |
8641 | }\r |
8642 | \r |
8643 | \r |
8644 | void m68k_op_tst_32_ai(void)\r |
8645 | {\r |
8646 | uint res = OPER_AY_AI_32();\r |
8647 | \r |
8648 | FLAG_N = NFLAG_32(res);\r |
8649 | FLAG_Z = res;\r |
8650 | FLAG_V = VFLAG_CLEAR;\r |
8651 | FLAG_C = CFLAG_CLEAR;\r |
8652 | }\r |
8653 | \r |
8654 | \r |
8655 | void m68k_op_tst_32_pi(void)\r |
8656 | {\r |
8657 | uint res = OPER_AY_PI_32();\r |
8658 | \r |
8659 | FLAG_N = NFLAG_32(res);\r |
8660 | FLAG_Z = res;\r |
8661 | FLAG_V = VFLAG_CLEAR;\r |
8662 | FLAG_C = CFLAG_CLEAR;\r |
8663 | }\r |
8664 | \r |
8665 | \r |
8666 | void m68k_op_tst_32_pd(void)\r |
8667 | {\r |
8668 | uint res = OPER_AY_PD_32();\r |
8669 | \r |
8670 | FLAG_N = NFLAG_32(res);\r |
8671 | FLAG_Z = res;\r |
8672 | FLAG_V = VFLAG_CLEAR;\r |
8673 | FLAG_C = CFLAG_CLEAR;\r |
8674 | }\r |
8675 | \r |
8676 | \r |
8677 | void m68k_op_tst_32_di(void)\r |
8678 | {\r |
8679 | uint res = OPER_AY_DI_32();\r |
8680 | \r |
8681 | FLAG_N = NFLAG_32(res);\r |
8682 | FLAG_Z = res;\r |
8683 | FLAG_V = VFLAG_CLEAR;\r |
8684 | FLAG_C = CFLAG_CLEAR;\r |
8685 | }\r |
8686 | \r |
8687 | \r |
8688 | void m68k_op_tst_32_ix(void)\r |
8689 | {\r |
8690 | uint res = OPER_AY_IX_32();\r |
8691 | \r |
8692 | FLAG_N = NFLAG_32(res);\r |
8693 | FLAG_Z = res;\r |
8694 | FLAG_V = VFLAG_CLEAR;\r |
8695 | FLAG_C = CFLAG_CLEAR;\r |
8696 | }\r |
8697 | \r |
8698 | \r |
8699 | void m68k_op_tst_32_aw(void)\r |
8700 | {\r |
8701 | uint res = OPER_AW_32();\r |
8702 | \r |
8703 | FLAG_N = NFLAG_32(res);\r |
8704 | FLAG_Z = res;\r |
8705 | FLAG_V = VFLAG_CLEAR;\r |
8706 | FLAG_C = CFLAG_CLEAR;\r |
8707 | }\r |
8708 | \r |
8709 | \r |
8710 | void m68k_op_tst_32_al(void)\r |
8711 | {\r |
8712 | uint res = OPER_AL_32();\r |
8713 | \r |
8714 | FLAG_N = NFLAG_32(res);\r |
8715 | FLAG_Z = res;\r |
8716 | FLAG_V = VFLAG_CLEAR;\r |
8717 | FLAG_C = CFLAG_CLEAR;\r |
8718 | }\r |
8719 | \r |
8720 | \r |
8721 | void m68k_op_tst_32_pcdi(void)\r |
8722 | {\r |
8723 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8724 | {\r |
8725 | uint res = OPER_PCDI_32();\r |
8726 | \r |
8727 | FLAG_N = NFLAG_32(res);\r |
8728 | FLAG_Z = res;\r |
8729 | FLAG_V = VFLAG_CLEAR;\r |
8730 | FLAG_C = CFLAG_CLEAR;\r |
8731 | return;\r |
8732 | }\r |
8733 | m68ki_exception_illegal();\r |
8734 | }\r |
8735 | \r |
8736 | \r |
8737 | void m68k_op_tst_32_pcix(void)\r |
8738 | {\r |
8739 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8740 | {\r |
8741 | uint res = OPER_PCIX_32();\r |
8742 | \r |
8743 | FLAG_N = NFLAG_32(res);\r |
8744 | FLAG_Z = res;\r |
8745 | FLAG_V = VFLAG_CLEAR;\r |
8746 | FLAG_C = CFLAG_CLEAR;\r |
8747 | return;\r |
8748 | }\r |
8749 | m68ki_exception_illegal();\r |
8750 | }\r |
8751 | \r |
8752 | \r |
8753 | void m68k_op_tst_32_i(void)\r |
8754 | {\r |
8755 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8756 | {\r |
8757 | uint res = OPER_I_32();\r |
8758 | \r |
8759 | FLAG_N = NFLAG_32(res);\r |
8760 | FLAG_Z = res;\r |
8761 | FLAG_V = VFLAG_CLEAR;\r |
8762 | FLAG_C = CFLAG_CLEAR;\r |
8763 | return;\r |
8764 | }\r |
8765 | m68ki_exception_illegal();\r |
8766 | }\r |
8767 | \r |
8768 | \r |
8769 | void m68k_op_unlk_32_a7(void)\r |
8770 | {\r |
8771 | REG_A[7] = m68ki_read_32(REG_A[7]);\r |
8772 | }\r |
8773 | \r |
8774 | \r |
8775 | void m68k_op_unlk_32(void)\r |
8776 | {\r |
8777 | uint* r_dst = &AY;\r |
8778 | \r |
8779 | REG_A[7] = *r_dst;\r |
8780 | *r_dst = m68ki_pull_32();\r |
8781 | }\r |
8782 | \r |
8783 | \r |
8784 | void m68k_op_unpk_16_rr(void)\r |
8785 | {\r |
8786 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8787 | {\r |
8788 | /* Note: DX and DY are reversed in Motorola's docs */\r |
8789 | uint src = DY;\r |
8790 | uint* r_dst = &DX;\r |
8791 | \r |
8792 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff);\r |
8793 | return;\r |
8794 | }\r |
8795 | m68ki_exception_illegal();\r |
8796 | }\r |
8797 | \r |
8798 | \r |
8799 | void m68k_op_unpk_16_mm_ax7(void)\r |
8800 | {\r |
8801 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8802 | {\r |
8803 | /* Note: AX and AY are reversed in Motorola's docs */\r |
8804 | uint src = OPER_AY_PD_8();\r |
8805 | uint ea_dst;\r |
8806 | \r |
8807 | src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();\r |
8808 | ea_dst = EA_A7_PD_8();\r |
8809 | m68ki_write_8(ea_dst, (src >> 8) & 0xff);\r |
8810 | ea_dst = EA_A7_PD_8();\r |
8811 | m68ki_write_8(ea_dst, src & 0xff);\r |
8812 | return;\r |
8813 | }\r |
8814 | m68ki_exception_illegal();\r |
8815 | }\r |
8816 | \r |
8817 | \r |
8818 | void m68k_op_unpk_16_mm_ay7(void)\r |
8819 | {\r |
8820 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8821 | {\r |
8822 | /* Note: AX and AY are reversed in Motorola's docs */\r |
8823 | uint src = OPER_A7_PD_8();\r |
8824 | uint ea_dst;\r |
8825 | \r |
8826 | src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();\r |
8827 | ea_dst = EA_AX_PD_8();\r |
8828 | m68ki_write_8(ea_dst, (src >> 8) & 0xff);\r |
8829 | ea_dst = EA_AX_PD_8();\r |
8830 | m68ki_write_8(ea_dst, src & 0xff);\r |
8831 | return;\r |
8832 | }\r |
8833 | m68ki_exception_illegal();\r |
8834 | }\r |
8835 | \r |
8836 | \r |
8837 | void m68k_op_unpk_16_mm_axy7(void)\r |
8838 | {\r |
8839 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8840 | {\r |
8841 | uint src = OPER_A7_PD_8();\r |
8842 | uint ea_dst;\r |
8843 | \r |
8844 | src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();\r |
8845 | ea_dst = EA_A7_PD_8();\r |
8846 | m68ki_write_8(ea_dst, (src >> 8) & 0xff);\r |
8847 | ea_dst = EA_A7_PD_8();\r |
8848 | m68ki_write_8(ea_dst, src & 0xff);\r |
8849 | return;\r |
8850 | }\r |
8851 | m68ki_exception_illegal();\r |
8852 | }\r |
8853 | \r |
8854 | \r |
8855 | void m68k_op_unpk_16_mm(void)\r |
8856 | {\r |
8857 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))\r |
8858 | {\r |
8859 | /* Note: AX and AY are reversed in Motorola's docs */\r |
8860 | uint src = OPER_AY_PD_8();\r |
8861 | uint ea_dst;\r |
8862 | \r |
8863 | src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();\r |
8864 | ea_dst = EA_AX_PD_8();\r |
8865 | m68ki_write_8(ea_dst, (src >> 8) & 0xff);\r |
8866 | ea_dst = EA_AX_PD_8();\r |
8867 | m68ki_write_8(ea_dst, src & 0xff);\r |
8868 | return;\r |
8869 | }\r |
8870 | m68ki_exception_illegal();\r |
8871 | }\r |
8872 | \r |
8873 | \r |
8874 | /* ======================================================================== */\r |
8875 | /* ============================== END OF FILE ============================= */\r |
8876 | /* ======================================================================== */\r |
8877 | \r |
8878 | \r |