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32x: drc: first implementation finished, no more interpreter dep
[picodrive.git] / cpu / sh2 / mame / sh2.c
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eaa10a6e 1/*****************************************************************************\r
2 *\r
3 * sh2.c\r
4 * Portable Hitachi SH-2 (SH7600 family) emulator\r
5 *\r
6 * Copyright Juergen Buchmueller <pullmoll@t-online.de>,\r
7 * all rights reserved.\r
8 *\r
9 * - This source code is released as freeware for non-commercial purposes.\r
10 * - You are free to use and redistribute this code in modified or\r
11 * unmodified form, provided you list me in the credits.\r
12 * - If you modify this source code, you must add a notice to each modified\r
13 * source file that it has been changed. If you're a nice person, you\r
14 * will clearly mark each change too. :)\r
15 * - If you wish to use this for commercial purposes, please contact me at\r
16 * pullmoll@t-online.de\r
17 * - The author of this copywritten work reserves the right to change the\r
18 * terms of its usage and license at any time, including retroactively\r
19 * - This entire notice must remain in the source code.\r
20 *\r
21 * This work is based on <tiraniddo@hotmail.com> C/C++ implementation of\r
22 * the SH-2 CPU core and was adapted to the MAME CPU core requirements.\r
23 * Thanks also go to Chuck Mason <chukjr@sundail.net> and Olivier Galibert\r
24 * <galibert@pobox.com> for letting me peek into their SEMU code :-)\r
25 *\r
26 *****************************************************************************/\r
27\r
28/*****************************************************************************\r
29 Changes\r
30 20051129 Mariusz Wojcieszek\r
31 - introduced memory_decrypted_read_word() for opcode fetching\r
32\r
33 20050813 Mariusz Wojcieszek\r
34 - fixed 64 bit / 32 bit division in division unit\r
35\r
36 20031015 O. Galibert\r
37 - dma fixes, thanks to sthief\r
38\r
39 20031013 O. Galibert, A. Giles\r
40 - timer fixes\r
41 - multi-cpu simplifications\r
42\r
43 20030915 O. Galibert\r
44 - fix DMA1 irq vector\r
45 - ignore writes to DRCRx\r
46 - fix cpu number issues\r
47 - fix slave/master recognition\r
48 - fix wrong-cpu-in-context problem with the timers\r
49\r
50 20021020 O. Galibert\r
51 - DMA implementation, lightly tested\r
52 - delay slot in debugger fixed\r
53 - add divide box mirrors\r
54 - Nicola-ify the indentation\r
55 - Uncrapify sh2_internal_*\r
56 - Put back nmi support that had been lost somehow\r
57\r
58 20020914 R. Belmont\r
59 - Initial SH2 internal timers implementation, based on code by O. Galibert.\r
60 Makes music work in galspanic4/s/s2, panic street, cyvern, other SKNS games.\r
61 - Fix to external division, thanks to "spice" on the E2J board.\r
62 Corrects behavior of s1945ii turret boss.\r
63\r
64 20020302 Olivier Galibert (galibert@mame.net)\r
65 - Fixed interrupt in delay slot\r
66 - Fixed rotcr\r
67 - Fixed div1\r
68 - Fixed mulu\r
69 - Fixed negc\r
70\r
71 20020301 R. Belmont\r
72 - Fixed external division\r
73\r
74 20020225 Olivier Galibert (galibert@mame.net)\r
75 - Fixed interrupt handling\r
76\r
77 20010207 Sylvain Glaize (mokona@puupuu.org)\r
78\r
79 - Bug fix in INLINE void MOVBM(UINT32 m, UINT32 n) (see comment)\r
80 - Support of full 32 bit addressing (RB, RW, RL and WB, WW, WL functions)\r
81 reason : when the two high bits of the address are set, access is\r
82 done directly in the cache data array. The SUPER KANEKO NOVA SYSTEM\r
83 sets the stack pointer here, using these addresses as usual RAM access.\r
84\r
85 No real cache support has been added.\r
86 - Read/Write memory format correction (_bew to _bedw) (see also SH2\r
87 definition in cpuintrf.c and DasmSH2(..) in sh2dasm.c )\r
88\r
89 20010623 James Forshaw (TyRaNiD@totalise.net)\r
90\r
91 - Modified operation of sh2_exception. Done cause mame irq system is stupid, and\r
92 doesnt really seem designed for any more than 8 interrupt lines.\r
93\r
94 20010701 James Forshaw (TyRaNiD@totalise.net)\r
95\r
96 - Fixed DIV1 operation. Q bit now correctly generated\r
97\r
98 20020218 Added save states (mokona@puupuu.org)\r
99\r
100 *****************************************************************************/\r
101\r
102//#include "debugger.h"\r
41397701 103//#include "sh2.h"\r
eaa10a6e 104//#include "sh2comn.h"\r
105#define INLINE static\r
106\r
107//CPU_DISASSEMBLE( sh2 );\r
108\r
109#ifndef USE_SH2DRC\r
110\r
111/* speed up delay loops, bail out of tight loops */\r
112#define BUSY_LOOP_HACKS 1\r
113\r
114#define VERBOSE 0\r
115\r
116#define LOG(x) do { if (VERBOSE) logerror x; } while (0)\r
117\r
41397701 118//int sh2_icount;\r
f0d7b1fa 119//SH2 *sh2;\r
eaa10a6e 120\r
121#if 0\r
122INLINE UINT8 RB(offs_t A)\r
123{\r
124 if (A >= 0xe0000000)\r
125 return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xff << (((~A) & 3)*8)) >> (((~A) & 3)*8);\r
126\r
127 if (A >= 0xc0000000)\r
128 return memory_read_byte_32be(sh2->program, A);\r
129\r
130 if (A >= 0x40000000)\r
131 return 0xa5;\r
132\r
133 return memory_read_byte_32be(sh2->program, A & AM);\r
134}\r
135\r
136INLINE UINT16 RW(offs_t A)\r
137{\r
138 if (A >= 0xe0000000)\r
139 return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);\r
140\r
141 if (A >= 0xc0000000)\r
142 return memory_read_word_32be(sh2->program, A);\r
143\r
144 if (A >= 0x40000000)\r
145 return 0xa5a5;\r
146\r
147 return memory_read_word_32be(sh2->program, A & AM);\r
148}\r
149\r
150INLINE UINT32 RL(offs_t A)\r
151{\r
152 if (A >= 0xe0000000)\r
153 return sh2_internal_r(sh2->internal, (A & 0x1fc)>>2, 0xffffffff);\r
154\r
155 if (A >= 0xc0000000)\r
156 return memory_read_dword_32be(sh2->program, A);\r
157\r
158 if (A >= 0x40000000)\r
159 return 0xa5a5a5a5;\r
160\r
161 return memory_read_dword_32be(sh2->program, A & AM);\r
162}\r
163\r
164INLINE void WB(offs_t A, UINT8 V)\r
165{\r
166\r
167 if (A >= 0xe0000000)\r
168 {\r
169 sh2_internal_w(sh2->internal, (A & 0x1fc)>>2, V << (((~A) & 3)*8), 0xff << (((~A) & 3)*8));\r
170 return;\r
171 }\r
172\r
173 if (A >= 0xc0000000)\r
174 {\r
175 memory_write_byte_32be(sh2->program, A,V);\r
176 return;\r
177 }\r
178\r
179 if (A >= 0x40000000)\r
180 return;\r
181\r
182 memory_write_byte_32be(sh2->program, A & AM,V);\r
183}\r
184\r
185INLINE void WW(offs_t A, UINT16 V)\r
186{\r
187 if (A >= 0xe0000000)\r
188 {\r
189 sh2_internal_w(sh2->internal, (A & 0x1fc)>>2, V << (((~A) & 2)*8), 0xffff << (((~A) & 2)*8));\r
190 return;\r
191 }\r
192\r
193 if (A >= 0xc0000000)\r
194 {\r
195 memory_write_word_32be(sh2->program, A,V);\r
196 return;\r
197 }\r
198\r
199 if (A >= 0x40000000)\r
200 return;\r
201\r
202 memory_write_word_32be(sh2->program, A & AM,V);\r
203}\r
204\r
205INLINE void WL(offs_t A, UINT32 V)\r
206{\r
207 if (A >= 0xe0000000)\r
208 {\r
209 sh2_internal_w(sh2->internal, (A & 0x1fc)>>2, V, 0xffffffff);\r
210 return;\r
211 }\r
212\r
213 if (A >= 0xc0000000)\r
214 {\r
215 memory_write_dword_32be(sh2->program, A,V);\r
216 return;\r
217 }\r
218\r
219 if (A >= 0x40000000)\r
220 return;\r
221\r
222 memory_write_dword_32be(sh2->program, A & AM,V);\r
223}\r
224#endif\r
225\r
226/* code cycles t-bit\r
227 * 0011 nnnn mmmm 1100 1 -\r
228 * ADD Rm,Rn\r
229 */\r
230INLINE void ADD(UINT32 m, UINT32 n)\r
231{\r
232 sh2->r[n] += sh2->r[m];\r
233}\r
234\r
235/* code cycles t-bit\r
236 * 0111 nnnn iiii iiii 1 -\r
237 * ADD #imm,Rn\r
238 */\r
239INLINE void ADDI(UINT32 i, UINT32 n)\r
240{\r
241 sh2->r[n] += (INT32)(INT16)(INT8)i;\r
242}\r
243\r
244/* code cycles t-bit\r
245 * 0011 nnnn mmmm 1110 1 carry\r
246 * ADDC Rm,Rn\r
247 */\r
248INLINE void ADDC(UINT32 m, UINT32 n)\r
249{\r
250 UINT32 tmp0, tmp1;\r
251\r
252 tmp1 = sh2->r[n] + sh2->r[m];\r
253 tmp0 = sh2->r[n];\r
254 sh2->r[n] = tmp1 + (sh2->sr & T);\r
255 if (tmp0 > tmp1)\r
256 sh2->sr |= T;\r
257 else\r
258 sh2->sr &= ~T;\r
259 if (tmp1 > sh2->r[n])\r
260 sh2->sr |= T;\r
261}\r
262\r
263/* code cycles t-bit\r
264 * 0011 nnnn mmmm 1111 1 overflow\r
265 * ADDV Rm,Rn\r
266 */\r
267INLINE void ADDV(UINT32 m, UINT32 n)\r
268{\r
269 INT32 dest, src, ans;\r
270\r
271 if ((INT32) sh2->r[n] >= 0)\r
272 dest = 0;\r
273 else\r
274 dest = 1;\r
275 if ((INT32) sh2->r[m] >= 0)\r
276 src = 0;\r
277 else\r
278 src = 1;\r
279 src += dest;\r
280 sh2->r[n] += sh2->r[m];\r
281 if ((INT32) sh2->r[n] >= 0)\r
282 ans = 0;\r
283 else\r
284 ans = 1;\r
285 ans += dest;\r
286 if (src == 0 || src == 2)\r
287 {\r
288 if (ans == 1)\r
289 sh2->sr |= T;\r
290 else\r
291 sh2->sr &= ~T;\r
292 }\r
293 else\r
294 sh2->sr &= ~T;\r
295}\r
296\r
297/* code cycles t-bit\r
298 * 0010 nnnn mmmm 1001 1 -\r
299 * AND Rm,Rn\r
300 */\r
301INLINE void AND(UINT32 m, UINT32 n)\r
302{\r
303 sh2->r[n] &= sh2->r[m];\r
304}\r
305\r
306\r
307/* code cycles t-bit\r
308 * 1100 1001 iiii iiii 1 -\r
309 * AND #imm,R0\r
310 */\r
311INLINE void ANDI(UINT32 i)\r
312{\r
313 sh2->r[0] &= i;\r
314}\r
315\r
316/* code cycles t-bit\r
317 * 1100 1101 iiii iiii 1 -\r
318 * AND.B #imm,@(R0,GBR)\r
319 */\r
320INLINE void ANDM(UINT32 i)\r
321{\r
322 UINT32 temp;\r
323\r
324 sh2->ea = sh2->gbr + sh2->r[0];\r
325 temp = i & RB( sh2->ea );\r
326 WB( sh2->ea, temp );\r
327 sh2_icount -= 2;\r
328}\r
329\r
330/* code cycles t-bit\r
331 * 1000 1011 dddd dddd 3/1 -\r
332 * BF disp8\r
333 */\r
334INLINE void BF(UINT32 d)\r
335{\r
336 if ((sh2->sr & T) == 0)\r
337 {\r
338 INT32 disp = ((INT32)d << 24) >> 24;\r
339 sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;\r
340 sh2_icount -= 2;\r
341 }\r
342}\r
343\r
344/* code cycles t-bit\r
345 * 1000 1111 dddd dddd 3/1 -\r
346 * BFS disp8\r
347 */\r
348INLINE void BFS(UINT32 d)\r
349{\r
350 if ((sh2->sr & T) == 0)\r
351 {\r
352 INT32 disp = ((INT32)d << 24) >> 24;\r
353 sh2->delay = sh2->pc;\r
354 sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;\r
355 sh2_icount--;\r
356 }\r
357}\r
358\r
359/* code cycles t-bit\r
360 * 1010 dddd dddd dddd 2 -\r
361 * BRA disp12\r
362 */\r
363INLINE void BRA(UINT32 d)\r
364{\r
365 INT32 disp = ((INT32)d << 20) >> 20;\r
366\r
367#if BUSY_LOOP_HACKS\r
368 if (disp == -2)\r
369 {\r
a44737c1 370 UINT32 next_opcode = RW(sh2->pc & AM);\r
eaa10a6e 371 /* BRA $\r
372 * NOP\r
373 */\r
374 if (next_opcode == 0x0009)\r
375 sh2_icount %= 3; /* cycles for BRA $ and NOP taken (3) */\r
376 }\r
377#endif\r
378 sh2->delay = sh2->pc;\r
379 sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;\r
380 sh2_icount--;\r
381}\r
382\r
383/* code cycles t-bit\r
384 * 0000 mmmm 0010 0011 2 -\r
385 * BRAF Rm\r
386 */\r
387INLINE void BRAF(UINT32 m)\r
388{\r
389 sh2->delay = sh2->pc;\r
390 sh2->pc += sh2->r[m] + 2;\r
391 sh2_icount--;\r
392}\r
393\r
394/* code cycles t-bit\r
395 * 1011 dddd dddd dddd 2 -\r
396 * BSR disp12\r
397 */\r
398INLINE void BSR(UINT32 d)\r
399{\r
400 INT32 disp = ((INT32)d << 20) >> 20;\r
401\r
402 sh2->pr = sh2->pc + 2;\r
403 sh2->delay = sh2->pc;\r
404 sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;\r
405 sh2_icount--;\r
406}\r
407\r
408/* code cycles t-bit\r
409 * 0000 mmmm 0000 0011 2 -\r
410 * BSRF Rm\r
411 */\r
412INLINE void BSRF(UINT32 m)\r
413{\r
414 sh2->pr = sh2->pc + 2;\r
415 sh2->delay = sh2->pc;\r
416 sh2->pc += sh2->r[m] + 2;\r
417 sh2_icount--;\r
418}\r
419\r
420/* code cycles t-bit\r
421 * 1000 1001 dddd dddd 3/1 -\r
422 * BT disp8\r
423 */\r
424INLINE void BT(UINT32 d)\r
425{\r
426 if ((sh2->sr & T) != 0)\r
427 {\r
428 INT32 disp = ((INT32)d << 24) >> 24;\r
429 sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;\r
430 sh2_icount -= 2;\r
431 }\r
432}\r
433\r
434/* code cycles t-bit\r
435 * 1000 1101 dddd dddd 2/1 -\r
436 * BTS disp8\r
437 */\r
438INLINE void BTS(UINT32 d)\r
439{\r
440 if ((sh2->sr & T) != 0)\r
441 {\r
442 INT32 disp = ((INT32)d << 24) >> 24;\r
443 sh2->delay = sh2->pc;\r
444 sh2->pc = sh2->ea = sh2->pc + disp * 2 + 2;\r
445 sh2_icount--;\r
446 }\r
447}\r
448\r
449/* code cycles t-bit\r
450 * 0000 0000 0010 1000 1 -\r
451 * CLRMAC\r
452 */\r
453INLINE void CLRMAC(void)\r
454{\r
455 sh2->mach = 0;\r
456 sh2->macl = 0;\r
457}\r
458\r
459/* code cycles t-bit\r
460 * 0000 0000 0000 1000 1 -\r
461 * CLRT\r
462 */\r
463INLINE void CLRT(void)\r
464{\r
465 sh2->sr &= ~T;\r
466}\r
467\r
468/* code cycles t-bit\r
469 * 0011 nnnn mmmm 0000 1 comparison result\r
470 * CMP_EQ Rm,Rn\r
471 */\r
472INLINE void CMPEQ(UINT32 m, UINT32 n)\r
473{\r
474 if (sh2->r[n] == sh2->r[m])\r
475 sh2->sr |= T;\r
476 else\r
477 sh2->sr &= ~T;\r
478}\r
479\r
480/* code cycles t-bit\r
481 * 0011 nnnn mmmm 0011 1 comparison result\r
482 * CMP_GE Rm,Rn\r
483 */\r
484INLINE void CMPGE(UINT32 m, UINT32 n)\r
485{\r
486 if ((INT32) sh2->r[n] >= (INT32) sh2->r[m])\r
487 sh2->sr |= T;\r
488 else\r
489 sh2->sr &= ~T;\r
490}\r
491\r
492/* code cycles t-bit\r
493 * 0011 nnnn mmmm 0111 1 comparison result\r
494 * CMP_GT Rm,Rn\r
495 */\r
496INLINE void CMPGT(UINT32 m, UINT32 n)\r
497{\r
498 if ((INT32) sh2->r[n] > (INT32) sh2->r[m])\r
499 sh2->sr |= T;\r
500 else\r
501 sh2->sr &= ~T;\r
502}\r
503\r
504/* code cycles t-bit\r
505 * 0011 nnnn mmmm 0110 1 comparison result\r
506 * CMP_HI Rm,Rn\r
507 */\r
508INLINE void CMPHI(UINT32 m, UINT32 n)\r
509{\r
510 if ((UINT32) sh2->r[n] > (UINT32) sh2->r[m])\r
511 sh2->sr |= T;\r
512 else\r
513 sh2->sr &= ~T;\r
514}\r
515\r
516/* code cycles t-bit\r
517 * 0011 nnnn mmmm 0010 1 comparison result\r
518 * CMP_HS Rm,Rn\r
519 */\r
520INLINE void CMPHS(UINT32 m, UINT32 n)\r
521{\r
522 if ((UINT32) sh2->r[n] >= (UINT32) sh2->r[m])\r
523 sh2->sr |= T;\r
524 else\r
525 sh2->sr &= ~T;\r
526}\r
527\r
528\r
529/* code cycles t-bit\r
530 * 0100 nnnn 0001 0101 1 comparison result\r
531 * CMP_PL Rn\r
532 */\r
533INLINE void CMPPL(UINT32 n)\r
534{\r
535 if ((INT32) sh2->r[n] > 0)\r
536 sh2->sr |= T;\r
537 else\r
538 sh2->sr &= ~T;\r
539}\r
540\r
541/* code cycles t-bit\r
542 * 0100 nnnn 0001 0001 1 comparison result\r
543 * CMP_PZ Rn\r
544 */\r
545INLINE void CMPPZ(UINT32 n)\r
546{\r
547 if ((INT32) sh2->r[n] >= 0)\r
548 sh2->sr |= T;\r
549 else\r
550 sh2->sr &= ~T;\r
551}\r
552\r
553/* code cycles t-bit\r
554 * 0010 nnnn mmmm 1100 1 comparison result\r
555 * CMP_STR Rm,Rn\r
556 */\r
557INLINE void CMPSTR(UINT32 m, UINT32 n)\r
558 {\r
559 UINT32 temp;\r
560 INT32 HH, HL, LH, LL;\r
561 temp = sh2->r[n] ^ sh2->r[m];\r
562 HH = (temp >> 24) & 0xff;\r
563 HL = (temp >> 16) & 0xff;\r
564 LH = (temp >> 8) & 0xff;\r
565 LL = temp & 0xff;\r
566 if (HH && HL && LH && LL)\r
567 sh2->sr &= ~T;\r
568 else\r
569 sh2->sr |= T;\r
570 }\r
571\r
572\r
573/* code cycles t-bit\r
574 * 1000 1000 iiii iiii 1 comparison result\r
575 * CMP/EQ #imm,R0\r
576 */\r
577INLINE void CMPIM(UINT32 i)\r
578{\r
579 UINT32 imm = (UINT32)(INT32)(INT16)(INT8)i;\r
580\r
581 if (sh2->r[0] == imm)\r
582 sh2->sr |= T;\r
583 else\r
584 sh2->sr &= ~T;\r
585}\r
586\r
587/* code cycles t-bit\r
588 * 0010 nnnn mmmm 0111 1 calculation result\r
589 * DIV0S Rm,Rn\r
590 */\r
591INLINE void DIV0S(UINT32 m, UINT32 n)\r
592{\r
593 if ((sh2->r[n] & 0x80000000) == 0)\r
594 sh2->sr &= ~Q;\r
595 else\r
596 sh2->sr |= Q;\r
597 if ((sh2->r[m] & 0x80000000) == 0)\r
598 sh2->sr &= ~M;\r
599 else\r
600 sh2->sr |= M;\r
601 if ((sh2->r[m] ^ sh2->r[n]) & 0x80000000)\r
602 sh2->sr |= T;\r
603 else\r
604 sh2->sr &= ~T;\r
605}\r
606\r
607/* code cycles t-bit\r
608 * 0000 0000 0001 1001 1 0\r
609 * DIV0U\r
610 */\r
611INLINE void DIV0U(void)\r
612{\r
613 sh2->sr &= ~(M | Q | T);\r
614}\r
615\r
616/* code cycles t-bit\r
617 * 0011 nnnn mmmm 0100 1 calculation result\r
618 * DIV1 Rm,Rn\r
619 */\r
620INLINE void DIV1(UINT32 m, UINT32 n)\r
621{\r
622 UINT32 tmp0;\r
623 UINT32 old_q;\r
624\r
625 old_q = sh2->sr & Q;\r
626 if (0x80000000 & sh2->r[n])\r
627 sh2->sr |= Q;\r
628 else\r
629 sh2->sr &= ~Q;\r
630\r
631 sh2->r[n] = (sh2->r[n] << 1) | (sh2->sr & T);\r
632\r
633 if (!old_q)\r
634 {\r
635 if (!(sh2->sr & M))\r
636 {\r
637 tmp0 = sh2->r[n];\r
638 sh2->r[n] -= sh2->r[m];\r
639 if(!(sh2->sr & Q))\r
640 if(sh2->r[n] > tmp0)\r
641 sh2->sr |= Q;\r
642 else\r
643 sh2->sr &= ~Q;\r
644 else\r
645 if(sh2->r[n] > tmp0)\r
646 sh2->sr &= ~Q;\r
647 else\r
648 sh2->sr |= Q;\r
649 }\r
650 else\r
651 {\r
652 tmp0 = sh2->r[n];\r
653 sh2->r[n] += sh2->r[m];\r
654 if(!(sh2->sr & Q))\r
655 {\r
656 if(sh2->r[n] < tmp0)\r
657 sh2->sr &= ~Q;\r
658 else\r
659 sh2->sr |= Q;\r
660 }\r
661 else\r
662 {\r
663 if(sh2->r[n] < tmp0)\r
664 sh2->sr |= Q;\r
665 else\r
666 sh2->sr &= ~Q;\r
667 }\r
668 }\r
669 }\r
670 else\r
671 {\r
672 if (!(sh2->sr & M))\r
673 {\r
674 tmp0 = sh2->r[n];\r
675 sh2->r[n] += sh2->r[m];\r
676 if(!(sh2->sr & Q))\r
677 if(sh2->r[n] < tmp0)\r
678 sh2->sr |= Q;\r
679 else\r
680 sh2->sr &= ~Q;\r
681 else\r
682 if(sh2->r[n] < tmp0)\r
683 sh2->sr &= ~Q;\r
684 else\r
685 sh2->sr |= Q;\r
686 }\r
687 else\r
688 {\r
689 tmp0 = sh2->r[n];\r
690 sh2->r[n] -= sh2->r[m];\r
691 if(!(sh2->sr & Q))\r
692 if(sh2->r[n] > tmp0)\r
693 sh2->sr &= ~Q;\r
694 else\r
695 sh2->sr |= Q;\r
696 else\r
697 if(sh2->r[n] > tmp0)\r
698 sh2->sr |= Q;\r
699 else\r
700 sh2->sr &= ~Q;\r
701 }\r
702 }\r
703\r
704 tmp0 = (sh2->sr & (Q | M));\r
705 if((!tmp0) || (tmp0 == 0x300)) /* if Q == M set T else clear T */\r
706 sh2->sr |= T;\r
707 else\r
708 sh2->sr &= ~T;\r
709}\r
710\r
711/* DMULS.L Rm,Rn */\r
712INLINE void DMULS(UINT32 m, UINT32 n)\r
713{\r
714 UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;\r
715 UINT32 temp0, temp1, temp2, temp3;\r
716 INT32 tempm, tempn, fnLmL;\r
717\r
718 tempn = (INT32) sh2->r[n];\r
719 tempm = (INT32) sh2->r[m];\r
720 if (tempn < 0)\r
721 tempn = 0 - tempn;\r
722 if (tempm < 0)\r
723 tempm = 0 - tempm;\r
724 if ((INT32) (sh2->r[n] ^ sh2->r[m]) < 0)\r
725 fnLmL = -1;\r
726 else\r
727 fnLmL = 0;\r
728 temp1 = (UINT32) tempn;\r
729 temp2 = (UINT32) tempm;\r
730 RnL = temp1 & 0x0000ffff;\r
731 RnH = (temp1 >> 16) & 0x0000ffff;\r
732 RmL = temp2 & 0x0000ffff;\r
733 RmH = (temp2 >> 16) & 0x0000ffff;\r
734 temp0 = RmL * RnL;\r
735 temp1 = RmH * RnL;\r
736 temp2 = RmL * RnH;\r
737 temp3 = RmH * RnH;\r
738 Res2 = 0;\r
739 Res1 = temp1 + temp2;\r
740 if (Res1 < temp1)\r
741 Res2 += 0x00010000;\r
742 temp1 = (Res1 << 16) & 0xffff0000;\r
743 Res0 = temp0 + temp1;\r
744 if (Res0 < temp0)\r
745 Res2++;\r
746 Res2 = Res2 + ((Res1 >> 16) & 0x0000ffff) + temp3;\r
747 if (fnLmL < 0)\r
748 {\r
749 Res2 = ~Res2;\r
750 if (Res0 == 0)\r
751 Res2++;\r
752 else\r
753 Res0 = (~Res0) + 1;\r
754 }\r
755 sh2->mach = Res2;\r
756 sh2->macl = Res0;\r
757 sh2_icount--;\r
758}\r
759\r
760/* DMULU.L Rm,Rn */\r
761INLINE void DMULU(UINT32 m, UINT32 n)\r
762{\r
763 UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;\r
764 UINT32 temp0, temp1, temp2, temp3;\r
765\r
766 RnL = sh2->r[n] & 0x0000ffff;\r
767 RnH = (sh2->r[n] >> 16) & 0x0000ffff;\r
768 RmL = sh2->r[m] & 0x0000ffff;\r
769 RmH = (sh2->r[m] >> 16) & 0x0000ffff;\r
770 temp0 = RmL * RnL;\r
771 temp1 = RmH * RnL;\r
772 temp2 = RmL * RnH;\r
773 temp3 = RmH * RnH;\r
774 Res2 = 0;\r
775 Res1 = temp1 + temp2;\r
776 if (Res1 < temp1)\r
777 Res2 += 0x00010000;\r
778 temp1 = (Res1 << 16) & 0xffff0000;\r
779 Res0 = temp0 + temp1;\r
780 if (Res0 < temp0)\r
781 Res2++;\r
782 Res2 = Res2 + ((Res1 >> 16) & 0x0000ffff) + temp3;\r
783 sh2->mach = Res2;\r
784 sh2->macl = Res0;\r
785 sh2_icount--;\r
786}\r
787\r
788/* DT Rn */\r
789INLINE void DT(UINT32 n)\r
790{\r
791 sh2->r[n]--;\r
792 if (sh2->r[n] == 0)\r
793 sh2->sr |= T;\r
794 else\r
795 sh2->sr &= ~T;\r
796#if BUSY_LOOP_HACKS\r
797 {\r
a44737c1 798 UINT32 next_opcode = RW(sh2->pc & AM);\r
eaa10a6e 799 /* DT Rn\r
800 * BF $-2\r
801 */\r
802 if (next_opcode == 0x8bfd)\r
803 {\r
804 while (sh2->r[n] > 1 && sh2_icount > 4)\r
805 {\r
806 sh2->r[n]--;\r
807 sh2_icount -= 4; /* cycles for DT (1) and BF taken (3) */\r
808 }\r
809 }\r
810 }\r
811#endif\r
812}\r
813\r
814/* EXTS.B Rm,Rn */\r
815INLINE void EXTSB(UINT32 m, UINT32 n)\r
816{\r
817 sh2->r[n] = ((INT32)sh2->r[m] << 24) >> 24;\r
818}\r
819\r
820/* EXTS.W Rm,Rn */\r
821INLINE void EXTSW(UINT32 m, UINT32 n)\r
822{\r
823 sh2->r[n] = ((INT32)sh2->r[m] << 16) >> 16;\r
824}\r
825\r
826/* EXTU.B Rm,Rn */\r
827INLINE void EXTUB(UINT32 m, UINT32 n)\r
828{\r
829 sh2->r[n] = sh2->r[m] & 0x000000ff;\r
830}\r
831\r
832/* EXTU.W Rm,Rn */\r
833INLINE void EXTUW(UINT32 m, UINT32 n)\r
834{\r
835 sh2->r[n] = sh2->r[m] & 0x0000ffff;\r
836}\r
837\r
838/* JMP @Rm */\r
839INLINE void JMP(UINT32 m)\r
840{\r
841 sh2->delay = sh2->pc;\r
842 sh2->pc = sh2->ea = sh2->r[m];\r
843}\r
844\r
845/* JSR @Rm */\r
846INLINE void JSR(UINT32 m)\r
847{\r
848 sh2->delay = sh2->pc;\r
849 sh2->pr = sh2->pc + 2;\r
850 sh2->pc = sh2->ea = sh2->r[m];\r
851 sh2_icount--;\r
852}\r
853\r
854\r
855/* LDC Rm,SR */\r
856INLINE void LDCSR(UINT32 m)\r
857{\r
a8b03e2d 858 sh2->sr &= ~0xfff;\r
859 sh2->sr |= sh2->r[m] & FLAGS;\r
eaa10a6e 860 sh2->test_irq = 1;\r
861}\r
862\r
863/* LDC Rm,GBR */\r
864INLINE void LDCGBR(UINT32 m)\r
865{\r
866 sh2->gbr = sh2->r[m];\r
867}\r
868\r
869/* LDC Rm,VBR */\r
870INLINE void LDCVBR(UINT32 m)\r
871{\r
872 sh2->vbr = sh2->r[m];\r
873}\r
874\r
875/* LDC.L @Rm+,SR */\r
876INLINE void LDCMSR(UINT32 m)\r
877{\r
878 sh2->ea = sh2->r[m];\r
a8b03e2d 879 sh2->sr &= ~0xfff;\r
880 sh2->sr |= RL( sh2->ea ) & FLAGS;\r
eaa10a6e 881 sh2->r[m] += 4;\r
882 sh2_icount -= 2;\r
883 sh2->test_irq = 1;\r
884}\r
885\r
886/* LDC.L @Rm+,GBR */\r
887INLINE void LDCMGBR(UINT32 m)\r
888{\r
889 sh2->ea = sh2->r[m];\r
890 sh2->gbr = RL( sh2->ea );\r
891 sh2->r[m] += 4;\r
892 sh2_icount -= 2;\r
893}\r
894\r
895/* LDC.L @Rm+,VBR */\r
896INLINE void LDCMVBR(UINT32 m)\r
897{\r
898 sh2->ea = sh2->r[m];\r
899 sh2->vbr = RL( sh2->ea );\r
900 sh2->r[m] += 4;\r
901 sh2_icount -= 2;\r
902}\r
903\r
904/* LDS Rm,MACH */\r
905INLINE void LDSMACH(UINT32 m)\r
906{\r
907 sh2->mach = sh2->r[m];\r
908}\r
909\r
910/* LDS Rm,MACL */\r
911INLINE void LDSMACL(UINT32 m)\r
912{\r
913 sh2->macl = sh2->r[m];\r
914}\r
915\r
916/* LDS Rm,PR */\r
917INLINE void LDSPR(UINT32 m)\r
918{\r
919 sh2->pr = sh2->r[m];\r
920}\r
921\r
922/* LDS.L @Rm+,MACH */\r
923INLINE void LDSMMACH(UINT32 m)\r
924{\r
925 sh2->ea = sh2->r[m];\r
926 sh2->mach = RL( sh2->ea );\r
927 sh2->r[m] += 4;\r
928}\r
929\r
930/* LDS.L @Rm+,MACL */\r
931INLINE void LDSMMACL(UINT32 m)\r
932{\r
933 sh2->ea = sh2->r[m];\r
934 sh2->macl = RL( sh2->ea );\r
935 sh2->r[m] += 4;\r
936}\r
937\r
938/* LDS.L @Rm+,PR */\r
939INLINE void LDSMPR(UINT32 m)\r
940{\r
941 sh2->ea = sh2->r[m];\r
942 sh2->pr = RL( sh2->ea );\r
943 sh2->r[m] += 4;\r
944}\r
945\r
946/* MAC.L @Rm+,@Rn+ */\r
947INLINE void MAC_L(UINT32 m, UINT32 n)\r
948{\r
949 UINT32 RnL, RnH, RmL, RmH, Res0, Res1, Res2;\r
950 UINT32 temp0, temp1, temp2, temp3;\r
951 INT32 tempm, tempn, fnLmL;\r
952\r
953 tempn = (INT32) RL( sh2->r[n] );\r
954 sh2->r[n] += 4;\r
955 tempm = (INT32) RL( sh2->r[m] );\r
956 sh2->r[m] += 4;\r
957 if ((INT32) (tempn ^ tempm) < 0)\r
958 fnLmL = -1;\r
959 else\r
960 fnLmL = 0;\r
961 if (tempn < 0)\r
962 tempn = 0 - tempn;\r
963 if (tempm < 0)\r
964 tempm = 0 - tempm;\r
965 temp1 = (UINT32) tempn;\r
966 temp2 = (UINT32) tempm;\r
967 RnL = temp1 & 0x0000ffff;\r
968 RnH = (temp1 >> 16) & 0x0000ffff;\r
969 RmL = temp2 & 0x0000ffff;\r
970 RmH = (temp2 >> 16) & 0x0000ffff;\r
971 temp0 = RmL * RnL;\r
972 temp1 = RmH * RnL;\r
973 temp2 = RmL * RnH;\r
974 temp3 = RmH * RnH;\r
975 Res2 = 0;\r
976 Res1 = temp1 + temp2;\r
977 if (Res1 < temp1)\r
978 Res2 += 0x00010000;\r
979 temp1 = (Res1 << 16) & 0xffff0000;\r
980 Res0 = temp0 + temp1;\r
981 if (Res0 < temp0)\r
982 Res2++;\r
983 Res2 = Res2 + ((Res1 >> 16) & 0x0000ffff) + temp3;\r
984 if (fnLmL < 0)\r
985 {\r
986 Res2 = ~Res2;\r
987 if (Res0 == 0)\r
988 Res2++;\r
989 else\r
990 Res0 = (~Res0) + 1;\r
991 }\r
992 if (sh2->sr & S)\r
993 {\r
994 Res0 = sh2->macl + Res0;\r
995 if (sh2->macl > Res0)\r
996 Res2++;\r
997 Res2 += (sh2->mach & 0x0000ffff);\r
998 if (((INT32) Res2 < 0) && (Res2 < 0xffff8000))\r
999 {\r
1000 Res2 = 0x00008000;\r
1001 Res0 = 0x00000000;\r
1002 }\r
1003 else if (((INT32) Res2 > 0) && (Res2 > 0x00007fff))\r
1004 {\r
1005 Res2 = 0x00007fff;\r
1006 Res0 = 0xffffffff;\r
1007 }\r
1008 sh2->mach = Res2;\r
1009 sh2->macl = Res0;\r
1010 }\r
1011 else\r
1012 {\r
1013 Res0 = sh2->macl + Res0;\r
1014 if (sh2->macl > Res0)\r
1015 Res2++;\r
1016 Res2 += sh2->mach;\r
1017 sh2->mach = Res2;\r
1018 sh2->macl = Res0;\r
1019 }\r
1020 sh2_icount -= 2;\r
1021}\r
1022\r
1023/* MAC.W @Rm+,@Rn+ */\r
1024INLINE void MAC_W(UINT32 m, UINT32 n)\r
1025{\r
1026 INT32 tempm, tempn, dest, src, ans;\r
1027 UINT32 templ;\r
1028\r
1029 tempn = (INT32) RW( sh2->r[n] );\r
1030 sh2->r[n] += 2;\r
1031 tempm = (INT32) RW( sh2->r[m] );\r
1032 sh2->r[m] += 2;\r
1033 templ = sh2->macl;\r
1034 tempm = ((INT32) (short) tempn * (INT32) (short) tempm);\r
1035 if ((INT32) sh2->macl >= 0)\r
1036 dest = 0;\r
1037 else\r
1038 dest = 1;\r
1039 if ((INT32) tempm >= 0)\r
1040 {\r
1041 src = 0;\r
1042 tempn = 0;\r
1043 }\r
1044 else\r
1045 {\r
1046 src = 1;\r
1047 tempn = 0xffffffff;\r
1048 }\r
1049 src += dest;\r
1050 sh2->macl += tempm;\r
1051 if ((INT32) sh2->macl >= 0)\r
1052 ans = 0;\r
1053 else\r
1054 ans = 1;\r
1055 ans += dest;\r
1056 if (sh2->sr & S)\r
1057 {\r
1058 if (ans == 1)\r
1059 {\r
1060 if (src == 0)\r
1061 sh2->macl = 0x7fffffff;\r
1062 if (src == 2)\r
1063 sh2->macl = 0x80000000;\r
1064 }\r
1065 }\r
1066 else\r
1067 {\r
1068 sh2->mach += tempn;\r
1069 if (templ > sh2->macl)\r
1070 sh2->mach += 1;\r
1071 }\r
1072 sh2_icount -= 2;\r
1073}\r
1074\r
1075/* MOV Rm,Rn */\r
1076INLINE void MOV(UINT32 m, UINT32 n)\r
1077{\r
1078 sh2->r[n] = sh2->r[m];\r
1079}\r
1080\r
1081/* MOV.B Rm,@Rn */\r
1082INLINE void MOVBS(UINT32 m, UINT32 n)\r
1083{\r
1084 sh2->ea = sh2->r[n];\r
1085 WB( sh2->ea, sh2->r[m] & 0x000000ff);\r
1086}\r
1087\r
1088/* MOV.W Rm,@Rn */\r
1089INLINE void MOVWS(UINT32 m, UINT32 n)\r
1090{\r
1091 sh2->ea = sh2->r[n];\r
1092 WW( sh2->ea, sh2->r[m] & 0x0000ffff);\r
1093}\r
1094\r
1095/* MOV.L Rm,@Rn */\r
1096INLINE void MOVLS(UINT32 m, UINT32 n)\r
1097{\r
1098 sh2->ea = sh2->r[n];\r
1099 WL( sh2->ea, sh2->r[m] );\r
1100}\r
1101\r
1102/* MOV.B @Rm,Rn */\r
1103INLINE void MOVBL(UINT32 m, UINT32 n)\r
1104{\r
1105 sh2->ea = sh2->r[m];\r
1106 sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea );\r
1107}\r
1108\r
1109/* MOV.W @Rm,Rn */\r
1110INLINE void MOVWL(UINT32 m, UINT32 n)\r
1111{\r
1112 sh2->ea = sh2->r[m];\r
1113 sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->ea );\r
1114}\r
1115\r
1116/* MOV.L @Rm,Rn */\r
1117INLINE void MOVLL(UINT32 m, UINT32 n)\r
1118{\r
1119 sh2->ea = sh2->r[m];\r
1120 sh2->r[n] = RL( sh2->ea );\r
1121}\r
1122\r
1123/* MOV.B Rm,@-Rn */\r
1124INLINE void MOVBM(UINT32 m, UINT32 n)\r
1125{\r
1126 /* SMG : bug fix, was reading sh2->r[n] */\r
1127 UINT32 data = sh2->r[m] & 0x000000ff;\r
1128\r
1129 sh2->r[n] -= 1;\r
1130 WB( sh2->r[n], data );\r
1131}\r
1132\r
1133/* MOV.W Rm,@-Rn */\r
1134INLINE void MOVWM(UINT32 m, UINT32 n)\r
1135{\r
1136 UINT32 data = sh2->r[m] & 0x0000ffff;\r
1137\r
1138 sh2->r[n] -= 2;\r
1139 WW( sh2->r[n], data );\r
1140}\r
1141\r
1142/* MOV.L Rm,@-Rn */\r
1143INLINE void MOVLM(UINT32 m, UINT32 n)\r
1144{\r
1145 UINT32 data = sh2->r[m];\r
1146\r
1147 sh2->r[n] -= 4;\r
1148 WL( sh2->r[n], data );\r
1149}\r
1150\r
1151/* MOV.B @Rm+,Rn */\r
1152INLINE void MOVBP(UINT32 m, UINT32 n)\r
1153{\r
1154 sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->r[m] );\r
1155 if (n != m)\r
1156 sh2->r[m] += 1;\r
1157}\r
1158\r
1159/* MOV.W @Rm+,Rn */\r
1160INLINE void MOVWP(UINT32 m, UINT32 n)\r
1161{\r
1162 sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->r[m] );\r
1163 if (n != m)\r
1164 sh2->r[m] += 2;\r
1165}\r
1166\r
1167/* MOV.L @Rm+,Rn */\r
1168INLINE void MOVLP(UINT32 m, UINT32 n)\r
1169{\r
1170 sh2->r[n] = RL( sh2->r[m] );\r
1171 if (n != m)\r
1172 sh2->r[m] += 4;\r
1173}\r
1174\r
1175/* MOV.B Rm,@(R0,Rn) */\r
1176INLINE void MOVBS0(UINT32 m, UINT32 n)\r
1177{\r
1178 sh2->ea = sh2->r[n] + sh2->r[0];\r
1179 WB( sh2->ea, sh2->r[m] & 0x000000ff );\r
1180}\r
1181\r
1182/* MOV.W Rm,@(R0,Rn) */\r
1183INLINE void MOVWS0(UINT32 m, UINT32 n)\r
1184{\r
1185 sh2->ea = sh2->r[n] + sh2->r[0];\r
1186 WW( sh2->ea, sh2->r[m] & 0x0000ffff );\r
1187}\r
1188\r
1189/* MOV.L Rm,@(R0,Rn) */\r
1190INLINE void MOVLS0(UINT32 m, UINT32 n)\r
1191{\r
1192 sh2->ea = sh2->r[n] + sh2->r[0];\r
1193 WL( sh2->ea, sh2->r[m] );\r
1194}\r
1195\r
1196/* MOV.B @(R0,Rm),Rn */\r
1197INLINE void MOVBL0(UINT32 m, UINT32 n)\r
1198{\r
1199 sh2->ea = sh2->r[m] + sh2->r[0];\r
1200 sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea );\r
1201}\r
1202\r
1203/* MOV.W @(R0,Rm),Rn */\r
1204INLINE void MOVWL0(UINT32 m, UINT32 n)\r
1205{\r
1206 sh2->ea = sh2->r[m] + sh2->r[0];\r
1207 sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->ea );\r
1208}\r
1209\r
1210/* MOV.L @(R0,Rm),Rn */\r
1211INLINE void MOVLL0(UINT32 m, UINT32 n)\r
1212{\r
1213 sh2->ea = sh2->r[m] + sh2->r[0];\r
1214 sh2->r[n] = RL( sh2->ea );\r
1215}\r
1216\r
1217/* MOV #imm,Rn */\r
1218INLINE void MOVI(UINT32 i, UINT32 n)\r
1219{\r
1220 sh2->r[n] = (UINT32)(INT32)(INT16)(INT8) i;\r
1221}\r
1222\r
1223/* MOV.W @(disp8,PC),Rn */\r
1224INLINE void MOVWI(UINT32 d, UINT32 n)\r
1225{\r
1226 UINT32 disp = d & 0xff;\r
1227 sh2->ea = sh2->pc + disp * 2 + 2;\r
1228 sh2->r[n] = (UINT32)(INT32)(INT16) RW( sh2->ea );\r
1229}\r
1230\r
1231/* MOV.L @(disp8,PC),Rn */\r
1232INLINE void MOVLI(UINT32 d, UINT32 n)\r
1233{\r
1234 UINT32 disp = d & 0xff;\r
1235 sh2->ea = ((sh2->pc + 2) & ~3) + disp * 4;\r
1236 sh2->r[n] = RL( sh2->ea );\r
1237}\r
1238\r
1239/* MOV.B @(disp8,GBR),R0 */\r
1240INLINE void MOVBLG(UINT32 d)\r
1241{\r
1242 UINT32 disp = d & 0xff;\r
1243 sh2->ea = sh2->gbr + disp;\r
1244 sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea );\r
1245}\r
1246\r
1247/* MOV.W @(disp8,GBR),R0 */\r
1248INLINE void MOVWLG(UINT32 d)\r
1249{\r
1250 UINT32 disp = d & 0xff;\r
1251 sh2->ea = sh2->gbr + disp * 2;\r
1252 sh2->r[0] = (INT32)(INT16) RW( sh2->ea );\r
1253}\r
1254\r
1255/* MOV.L @(disp8,GBR),R0 */\r
1256INLINE void MOVLLG(UINT32 d)\r
1257{\r
1258 UINT32 disp = d & 0xff;\r
1259 sh2->ea = sh2->gbr + disp * 4;\r
1260 sh2->r[0] = RL( sh2->ea );\r
1261}\r
1262\r
1263/* MOV.B R0,@(disp8,GBR) */\r
1264INLINE void MOVBSG(UINT32 d)\r
1265{\r
1266 UINT32 disp = d & 0xff;\r
1267 sh2->ea = sh2->gbr + disp;\r
1268 WB( sh2->ea, sh2->r[0] & 0x000000ff );\r
1269}\r
1270\r
1271/* MOV.W R0,@(disp8,GBR) */\r
1272INLINE void MOVWSG(UINT32 d)\r
1273{\r
1274 UINT32 disp = d & 0xff;\r
1275 sh2->ea = sh2->gbr + disp * 2;\r
1276 WW( sh2->ea, sh2->r[0] & 0x0000ffff );\r
1277}\r
1278\r
1279/* MOV.L R0,@(disp8,GBR) */\r
1280INLINE void MOVLSG(UINT32 d)\r
1281{\r
1282 UINT32 disp = d & 0xff;\r
1283 sh2->ea = sh2->gbr + disp * 4;\r
1284 WL( sh2->ea, sh2->r[0] );\r
1285}\r
1286\r
1287/* MOV.B R0,@(disp4,Rn) */\r
1288INLINE void MOVBS4(UINT32 d, UINT32 n)\r
1289{\r
1290 UINT32 disp = d & 0x0f;\r
1291 sh2->ea = sh2->r[n] + disp;\r
1292 WB( sh2->ea, sh2->r[0] & 0x000000ff );\r
1293}\r
1294\r
1295/* MOV.W R0,@(disp4,Rn) */\r
1296INLINE void MOVWS4(UINT32 d, UINT32 n)\r
1297{\r
1298 UINT32 disp = d & 0x0f;\r
1299 sh2->ea = sh2->r[n] + disp * 2;\r
1300 WW( sh2->ea, sh2->r[0] & 0x0000ffff );\r
1301}\r
1302\r
1303/* MOV.L Rm,@(disp4,Rn) */\r
1304INLINE void MOVLS4(UINT32 m, UINT32 d, UINT32 n)\r
1305{\r
1306 UINT32 disp = d & 0x0f;\r
1307 sh2->ea = sh2->r[n] + disp * 4;\r
1308 WL( sh2->ea, sh2->r[m] );\r
1309}\r
1310\r
1311/* MOV.B @(disp4,Rm),R0 */\r
1312INLINE void MOVBL4(UINT32 m, UINT32 d)\r
1313{\r
1314 UINT32 disp = d & 0x0f;\r
1315 sh2->ea = sh2->r[m] + disp;\r
1316 sh2->r[0] = (UINT32)(INT32)(INT16)(INT8) RB( sh2->ea );\r
1317}\r
1318\r
1319/* MOV.W @(disp4,Rm),R0 */\r
1320INLINE void MOVWL4(UINT32 m, UINT32 d)\r
1321{\r
1322 UINT32 disp = d & 0x0f;\r
1323 sh2->ea = sh2->r[m] + disp * 2;\r
1324 sh2->r[0] = (UINT32)(INT32)(INT16) RW( sh2->ea );\r
1325}\r
1326\r
1327/* MOV.L @(disp4,Rm),Rn */\r
1328INLINE void MOVLL4(UINT32 m, UINT32 d, UINT32 n)\r
1329{\r
1330 UINT32 disp = d & 0x0f;\r
1331 sh2->ea = sh2->r[m] + disp * 4;\r
1332 sh2->r[n] = RL( sh2->ea );\r
1333}\r
1334\r
1335/* MOVA @(disp8,PC),R0 */\r
1336INLINE void MOVA(UINT32 d)\r
1337{\r
1338 UINT32 disp = d & 0xff;\r
1339 sh2->ea = ((sh2->pc + 2) & ~3) + disp * 4;\r
1340 sh2->r[0] = sh2->ea;\r
1341}\r
1342\r
1343/* MOVT Rn */\r
1344INLINE void MOVT(UINT32 n)\r
1345{\r
1346 sh2->r[n] = sh2->sr & T;\r
1347}\r
1348\r
1349/* MUL.L Rm,Rn */\r
1350INLINE void MULL(UINT32 m, UINT32 n)\r
1351{\r
1352 sh2->macl = sh2->r[n] * sh2->r[m];\r
1353 sh2_icount--;\r
1354}\r
1355\r
1356/* MULS Rm,Rn */\r
1357INLINE void MULS(UINT32 m, UINT32 n)\r
1358{\r
1359 sh2->macl = (INT16) sh2->r[n] * (INT16) sh2->r[m];\r
1360}\r
1361\r
1362/* MULU Rm,Rn */\r
1363INLINE void MULU(UINT32 m, UINT32 n)\r
1364{\r
1365 sh2->macl = (UINT16) sh2->r[n] * (UINT16) sh2->r[m];\r
1366}\r
1367\r
1368/* NEG Rm,Rn */\r
1369INLINE void NEG(UINT32 m, UINT32 n)\r
1370{\r
1371 sh2->r[n] = 0 - sh2->r[m];\r
1372}\r
1373\r
1374/* NEGC Rm,Rn */\r
1375INLINE void NEGC(UINT32 m, UINT32 n)\r
1376{\r
1377 UINT32 temp;\r
1378\r
1379 temp = sh2->r[m];\r
1380 sh2->r[n] = -temp - (sh2->sr & T);\r
1381 if (temp || (sh2->sr & T))\r
1382 sh2->sr |= T;\r
1383 else\r
1384 sh2->sr &= ~T;\r
1385}\r
1386\r
1387/* NOP */\r
1388INLINE void NOP(void)\r
1389{\r
1390}\r
1391\r
1392/* NOT Rm,Rn */\r
1393INLINE void NOT(UINT32 m, UINT32 n)\r
1394{\r
1395 sh2->r[n] = ~sh2->r[m];\r
1396}\r
1397\r
1398/* OR Rm,Rn */\r
1399INLINE void OR(UINT32 m, UINT32 n)\r
1400{\r
1401 sh2->r[n] |= sh2->r[m];\r
1402}\r
1403\r
1404/* OR #imm,R0 */\r
1405INLINE void ORI(UINT32 i)\r
1406{\r
1407 sh2->r[0] |= i;\r
1408 sh2_icount -= 2;\r
1409}\r
1410\r
1411/* OR.B #imm,@(R0,GBR) */\r
1412INLINE void ORM(UINT32 i)\r
1413{\r
1414 UINT32 temp;\r
1415\r
1416 sh2->ea = sh2->gbr + sh2->r[0];\r
1417 temp = RB( sh2->ea );\r
1418 temp |= i;\r
1419 WB( sh2->ea, temp );\r
1420}\r
1421\r
1422/* ROTCL Rn */\r
1423INLINE void ROTCL(UINT32 n)\r
1424{\r
1425 UINT32 temp;\r
1426\r
1427 temp = (sh2->r[n] >> 31) & T;\r
1428 sh2->r[n] = (sh2->r[n] << 1) | (sh2->sr & T);\r
1429 sh2->sr = (sh2->sr & ~T) | temp;\r
1430}\r
1431\r
1432/* ROTCR Rn */\r
1433INLINE void ROTCR(UINT32 n)\r
1434{\r
1435 UINT32 temp;\r
1436 temp = (sh2->sr & T) << 31;\r
1437 if (sh2->r[n] & T)\r
1438 sh2->sr |= T;\r
1439 else\r
1440 sh2->sr &= ~T;\r
1441 sh2->r[n] = (sh2->r[n] >> 1) | temp;\r
1442}\r
1443\r
1444/* ROTL Rn */\r
1445INLINE void ROTL(UINT32 n)\r
1446{\r
1447 sh2->sr = (sh2->sr & ~T) | ((sh2->r[n] >> 31) & T);\r
1448 sh2->r[n] = (sh2->r[n] << 1) | (sh2->r[n] >> 31);\r
1449}\r
1450\r
1451/* ROTR Rn */\r
1452INLINE void ROTR(UINT32 n)\r
1453{\r
1454 sh2->sr = (sh2->sr & ~T) | (sh2->r[n] & T);\r
1455 sh2->r[n] = (sh2->r[n] >> 1) | (sh2->r[n] << 31);\r
1456}\r
1457\r
1458/* RTE */\r
1459INLINE void RTE(void)\r
1460{\r
1461 sh2->ea = sh2->r[15];\r
1462 sh2->delay = sh2->pc;\r
1463 sh2->pc = RL( sh2->ea );\r
1464 sh2->r[15] += 4;\r
1465 sh2->ea = sh2->r[15];\r
a8b03e2d 1466 sh2->sr &= ~0xfff;\r
1467 sh2->sr |= RL( sh2->ea ) & FLAGS;\r
eaa10a6e 1468 sh2->r[15] += 4;\r
1469 sh2_icount -= 3;\r
1470 sh2->test_irq = 1;\r
1471}\r
1472\r
1473/* RTS */\r
1474INLINE void RTS(void)\r
1475{\r
1476 sh2->delay = sh2->pc;\r
1477 sh2->pc = sh2->ea = sh2->pr;\r
1478 sh2_icount--;\r
1479}\r
1480\r
1481/* SETT */\r
1482INLINE void SETT(void)\r
1483{\r
1484 sh2->sr |= T;\r
1485}\r
1486\r
1487/* SHAL Rn (same as SHLL) */\r
1488INLINE void SHAL(UINT32 n)\r
1489{\r
1490 sh2->sr = (sh2->sr & ~T) | ((sh2->r[n] >> 31) & T);\r
1491 sh2->r[n] <<= 1;\r
1492}\r
1493\r
1494/* SHAR Rn */\r
1495INLINE void SHAR(UINT32 n)\r
1496{\r
1497 sh2->sr = (sh2->sr & ~T) | (sh2->r[n] & T);\r
1498 sh2->r[n] = (UINT32)((INT32)sh2->r[n] >> 1);\r
1499}\r
1500\r
1501/* SHLL Rn (same as SHAL) */\r
1502INLINE void SHLL(UINT32 n)\r
1503{\r
1504 sh2->sr = (sh2->sr & ~T) | ((sh2->r[n] >> 31) & T);\r
1505 sh2->r[n] <<= 1;\r
1506}\r
1507\r
1508/* SHLL2 Rn */\r
1509INLINE void SHLL2(UINT32 n)\r
1510{\r
1511 sh2->r[n] <<= 2;\r
1512}\r
1513\r
1514/* SHLL8 Rn */\r
1515INLINE void SHLL8(UINT32 n)\r
1516{\r
1517 sh2->r[n] <<= 8;\r
1518}\r
1519\r
1520/* SHLL16 Rn */\r
1521INLINE void SHLL16(UINT32 n)\r
1522{\r
1523 sh2->r[n] <<= 16;\r
1524}\r
1525\r
1526/* SHLR Rn */\r
1527INLINE void SHLR(UINT32 n)\r
1528{\r
1529 sh2->sr = (sh2->sr & ~T) | (sh2->r[n] & T);\r
1530 sh2->r[n] >>= 1;\r
1531}\r
1532\r
1533/* SHLR2 Rn */\r
1534INLINE void SHLR2(UINT32 n)\r
1535{\r
1536 sh2->r[n] >>= 2;\r
1537}\r
1538\r
1539/* SHLR8 Rn */\r
1540INLINE void SHLR8(UINT32 n)\r
1541{\r
1542 sh2->r[n] >>= 8;\r
1543}\r
1544\r
1545/* SHLR16 Rn */\r
1546INLINE void SHLR16(UINT32 n)\r
1547{\r
1548 sh2->r[n] >>= 16;\r
1549}\r
1550\r
1551/* SLEEP */\r
1552INLINE void SLEEP(void)\r
1553{\r
1554 sh2->pc -= 2;\r
1555 sh2_icount -= 2;\r
1556 /* Wait_for_exception; */\r
1557}\r
1558\r
1559/* STC SR,Rn */\r
1560INLINE void STCSR(UINT32 n)\r
1561{\r
a8b03e2d 1562 sh2->r[n] = sh2->sr & FLAGS;\r
eaa10a6e 1563}\r
1564\r
1565/* STC GBR,Rn */\r
1566INLINE void STCGBR(UINT32 n)\r
1567{\r
1568 sh2->r[n] = sh2->gbr;\r
1569}\r
1570\r
1571/* STC VBR,Rn */\r
1572INLINE void STCVBR(UINT32 n)\r
1573{\r
1574 sh2->r[n] = sh2->vbr;\r
1575}\r
1576\r
1577/* STC.L SR,@-Rn */\r
1578INLINE void STCMSR(UINT32 n)\r
1579{\r
1580 sh2->r[n] -= 4;\r
1581 sh2->ea = sh2->r[n];\r
a8b03e2d 1582 WL( sh2->ea, sh2->sr & FLAGS );\r
eaa10a6e 1583 sh2_icount--;\r
1584}\r
1585\r
1586/* STC.L GBR,@-Rn */\r
1587INLINE void STCMGBR(UINT32 n)\r
1588{\r
1589 sh2->r[n] -= 4;\r
1590 sh2->ea = sh2->r[n];\r
1591 WL( sh2->ea, sh2->gbr );\r
1592 sh2_icount--;\r
1593}\r
1594\r
1595/* STC.L VBR,@-Rn */\r
1596INLINE void STCMVBR(UINT32 n)\r
1597{\r
1598 sh2->r[n] -= 4;\r
1599 sh2->ea = sh2->r[n];\r
1600 WL( sh2->ea, sh2->vbr );\r
1601 sh2_icount--;\r
1602}\r
1603\r
1604/* STS MACH,Rn */\r
1605INLINE void STSMACH(UINT32 n)\r
1606{\r
1607 sh2->r[n] = sh2->mach;\r
1608}\r
1609\r
1610/* STS MACL,Rn */\r
1611INLINE void STSMACL(UINT32 n)\r
1612{\r
1613 sh2->r[n] = sh2->macl;\r
1614}\r
1615\r
1616/* STS PR,Rn */\r
1617INLINE void STSPR(UINT32 n)\r
1618{\r
1619 sh2->r[n] = sh2->pr;\r
1620}\r
1621\r
1622/* STS.L MACH,@-Rn */\r
1623INLINE void STSMMACH(UINT32 n)\r
1624{\r
1625 sh2->r[n] -= 4;\r
1626 sh2->ea = sh2->r[n];\r
1627 WL( sh2->ea, sh2->mach );\r
1628}\r
1629\r
1630/* STS.L MACL,@-Rn */\r
1631INLINE void STSMMACL(UINT32 n)\r
1632{\r
1633 sh2->r[n] -= 4;\r
1634 sh2->ea = sh2->r[n];\r
1635 WL( sh2->ea, sh2->macl );\r
1636}\r
1637\r
1638/* STS.L PR,@-Rn */\r
1639INLINE void STSMPR(UINT32 n)\r
1640{\r
1641 sh2->r[n] -= 4;\r
1642 sh2->ea = sh2->r[n];\r
1643 WL( sh2->ea, sh2->pr );\r
1644}\r
1645\r
1646/* SUB Rm,Rn */\r
1647INLINE void SUB(UINT32 m, UINT32 n)\r
1648{\r
1649 sh2->r[n] -= sh2->r[m];\r
1650}\r
1651\r
1652/* SUBC Rm,Rn */\r
1653INLINE void SUBC(UINT32 m, UINT32 n)\r
1654{\r
1655 UINT32 tmp0, tmp1;\r
1656\r
1657 tmp1 = sh2->r[n] - sh2->r[m];\r
1658 tmp0 = sh2->r[n];\r
1659 sh2->r[n] = tmp1 - (sh2->sr & T);\r
1660 if (tmp0 < tmp1)\r
1661 sh2->sr |= T;\r
1662 else\r
1663 sh2->sr &= ~T;\r
1664 if (tmp1 < sh2->r[n])\r
1665 sh2->sr |= T;\r
1666}\r
1667\r
1668/* SUBV Rm,Rn */\r
1669INLINE void SUBV(UINT32 m, UINT32 n)\r
1670{\r
1671 INT32 dest, src, ans;\r
1672\r
1673 if ((INT32) sh2->r[n] >= 0)\r
1674 dest = 0;\r
1675 else\r
1676 dest = 1;\r
1677 if ((INT32) sh2->r[m] >= 0)\r
1678 src = 0;\r
1679 else\r
1680 src = 1;\r
1681 src += dest;\r
1682 sh2->r[n] -= sh2->r[m];\r
1683 if ((INT32) sh2->r[n] >= 0)\r
1684 ans = 0;\r
1685 else\r
1686 ans = 1;\r
1687 ans += dest;\r
1688 if (src == 1)\r
1689 {\r
1690 if (ans == 1)\r
1691 sh2->sr |= T;\r
1692 else\r
1693 sh2->sr &= ~T;\r
1694 }\r
1695 else\r
1696 sh2->sr &= ~T;\r
1697}\r
1698\r
1699/* SWAP.B Rm,Rn */\r
1700INLINE void SWAPB(UINT32 m, UINT32 n)\r
1701{\r
1702 UINT32 temp0, temp1;\r
1703\r
1704 temp0 = sh2->r[m] & 0xffff0000;\r
1705 temp1 = (sh2->r[m] & 0x000000ff) << 8;\r
1706 sh2->r[n] = (sh2->r[m] >> 8) & 0x000000ff;\r
1707 sh2->r[n] = sh2->r[n] | temp1 | temp0;\r
1708}\r
1709\r
1710/* SWAP.W Rm,Rn */\r
1711INLINE void SWAPW(UINT32 m, UINT32 n)\r
1712{\r
1713 UINT32 temp;\r
1714\r
1715 temp = (sh2->r[m] >> 16) & 0x0000ffff;\r
1716 sh2->r[n] = (sh2->r[m] << 16) | temp;\r
1717}\r
1718\r
1719/* TAS.B @Rn */\r
1720INLINE void TAS(UINT32 n)\r
1721{\r
1722 UINT32 temp;\r
1723 sh2->ea = sh2->r[n];\r
1724 /* Bus Lock enable */\r
1725 temp = RB( sh2->ea );\r
1726 if (temp == 0)\r
1727 sh2->sr |= T;\r
1728 else\r
1729 sh2->sr &= ~T;\r
1730 temp |= 0x80;\r
1731 /* Bus Lock disable */\r
1732 WB( sh2->ea, temp );\r
1733 sh2_icount -= 3;\r
1734}\r
1735\r
1736/* TRAPA #imm */\r
1737INLINE void TRAPA(UINT32 i)\r
1738{\r
1739 UINT32 imm = i & 0xff;\r
1740\r
1741 sh2->ea = sh2->vbr + imm * 4;\r
1742\r
1743 sh2->r[15] -= 4;\r
a8b03e2d 1744 WL( sh2->r[15], sh2->sr & FLAGS );\r
eaa10a6e 1745 sh2->r[15] -= 4;\r
1746 WL( sh2->r[15], sh2->pc );\r
1747\r
1748 sh2->pc = RL( sh2->ea );\r
1749\r
1750 sh2_icount -= 7;\r
1751}\r
1752\r
1753/* TST Rm,Rn */\r
1754INLINE void TST(UINT32 m, UINT32 n)\r
1755{\r
1756 if ((sh2->r[n] & sh2->r[m]) == 0)\r
1757 sh2->sr |= T;\r
1758 else\r
1759 sh2->sr &= ~T;\r
1760}\r
1761\r
1762/* TST #imm,R0 */\r
1763INLINE void TSTI(UINT32 i)\r
1764{\r
1765 UINT32 imm = i & 0xff;\r
1766\r
1767 if ((imm & sh2->r[0]) == 0)\r
1768 sh2->sr |= T;\r
1769 else\r
1770 sh2->sr &= ~T;\r
1771}\r
1772\r
1773/* TST.B #imm,@(R0,GBR) */\r
1774INLINE void TSTM(UINT32 i)\r
1775{\r
1776 UINT32 imm = i & 0xff;\r
1777\r
1778 sh2->ea = sh2->gbr + sh2->r[0];\r
1779 if ((imm & RB( sh2->ea )) == 0)\r
1780 sh2->sr |= T;\r
1781 else\r
1782 sh2->sr &= ~T;\r
1783 sh2_icount -= 2;\r
1784}\r
1785\r
1786/* XOR Rm,Rn */\r
1787INLINE void XOR(UINT32 m, UINT32 n)\r
1788{\r
1789 sh2->r[n] ^= sh2->r[m];\r
1790}\r
1791\r
1792/* XOR #imm,R0 */\r
1793INLINE void XORI(UINT32 i)\r
1794{\r
1795 UINT32 imm = i & 0xff;\r
1796 sh2->r[0] ^= imm;\r
1797}\r
1798\r
1799/* XOR.B #imm,@(R0,GBR) */\r
1800INLINE void XORM(UINT32 i)\r
1801{\r
1802 UINT32 imm = i & 0xff;\r
1803 UINT32 temp;\r
1804\r
1805 sh2->ea = sh2->gbr + sh2->r[0];\r
1806 temp = RB( sh2->ea );\r
1807 temp ^= imm;\r
1808 WB( sh2->ea, temp );\r
1809 sh2_icount -= 2;\r
1810}\r
1811\r
1812/* XTRCT Rm,Rn */\r
1813INLINE void XTRCT(UINT32 m, UINT32 n)\r
1814{\r
1815 UINT32 temp;\r
1816\r
1817 temp = (sh2->r[m] << 16) & 0xffff0000;\r
1818 sh2->r[n] = (sh2->r[n] >> 16) & 0x0000ffff;\r
1819 sh2->r[n] |= temp;\r
1820}\r
1821\r
1822/*****************************************************************************\r
1823 * OPCODE DISPATCHERS\r
1824 *****************************************************************************/\r
1825\r
1826INLINE void op0000(UINT16 opcode)\r
1827{\r
1828 switch (opcode & 0x3F)\r
1829 {\r
1830 case 0x00: NOP(); break;\r
1831 case 0x01: NOP(); break;\r
1832 case 0x02: STCSR(Rn); break;\r
1833 case 0x03: BSRF(Rn); break;\r
1834 case 0x04: MOVBS0(Rm, Rn); break;\r
1835 case 0x05: MOVWS0(Rm, Rn); break;\r
1836 case 0x06: MOVLS0(Rm, Rn); break;\r
1837 case 0x07: MULL(Rm, Rn); break;\r
1838 case 0x08: CLRT(); break;\r
1839 case 0x09: NOP(); break;\r
1840 case 0x0a: STSMACH(Rn); break;\r
1841 case 0x0b: RTS(); break;\r
1842 case 0x0c: MOVBL0(Rm, Rn); break;\r
1843 case 0x0d: MOVWL0(Rm, Rn); break;\r
1844 case 0x0e: MOVLL0(Rm, Rn); break;\r
1845 case 0x0f: MAC_L(Rm, Rn); break;\r
1846\r
1847 case 0x10: NOP(); break;\r
1848 case 0x11: NOP(); break;\r
1849 case 0x12: STCGBR(Rn); break;\r
1850 case 0x13: NOP(); break;\r
1851 case 0x14: MOVBS0(Rm, Rn); break;\r
1852 case 0x15: MOVWS0(Rm, Rn); break;\r
1853 case 0x16: MOVLS0(Rm, Rn); break;\r
1854 case 0x17: MULL(Rm, Rn); break;\r
1855 case 0x18: SETT(); break;\r
1856 case 0x19: DIV0U(); break;\r
1857 case 0x1a: STSMACL(Rn); break;\r
1858 case 0x1b: SLEEP(); break;\r
1859 case 0x1c: MOVBL0(Rm, Rn); break;\r
1860 case 0x1d: MOVWL0(Rm, Rn); break;\r
1861 case 0x1e: MOVLL0(Rm, Rn); break;\r
1862 case 0x1f: MAC_L(Rm, Rn); break;\r
1863\r
1864 case 0x20: NOP(); break;\r
1865 case 0x21: NOP(); break;\r
1866 case 0x22: STCVBR(Rn); break;\r
1867 case 0x23: BRAF(Rn); break;\r
1868 case 0x24: MOVBS0(Rm, Rn); break;\r
1869 case 0x25: MOVWS0(Rm, Rn); break;\r
1870 case 0x26: MOVLS0(Rm, Rn); break;\r
1871 case 0x27: MULL(Rm, Rn); break;\r
1872 case 0x28: CLRMAC(); break;\r
1873 case 0x29: MOVT(Rn); break;\r
1874 case 0x2a: STSPR(Rn); break;\r
1875 case 0x2b: RTE(); break;\r
1876 case 0x2c: MOVBL0(Rm, Rn); break;\r
1877 case 0x2d: MOVWL0(Rm, Rn); break;\r
1878 case 0x2e: MOVLL0(Rm, Rn); break;\r
1879 case 0x2f: MAC_L(Rm, Rn); break;\r
1880\r
1881 case 0x30: NOP(); break;\r
1882 case 0x31: NOP(); break;\r
1883 case 0x32: NOP(); break;\r
1884 case 0x33: NOP(); break;\r
1885 case 0x34: MOVBS0(Rm, Rn); break;\r
1886 case 0x35: MOVWS0(Rm, Rn); break;\r
1887 case 0x36: MOVLS0(Rm, Rn); break;\r
1888 case 0x37: MULL(Rm, Rn); break;\r
1889 case 0x38: NOP(); break;\r
1890 case 0x39: NOP(); break;\r
1891 case 0x3c: MOVBL0(Rm, Rn); break;\r
1892 case 0x3d: MOVWL0(Rm, Rn); break;\r
1893 case 0x3e: MOVLL0(Rm, Rn); break;\r
1894 case 0x3f: MAC_L(Rm, Rn); break;\r
1895 case 0x3a: NOP(); break;\r
1896 case 0x3b: NOP(); break;\r
1897\r
1898\r
1899\r
1900 }\r
1901}\r
1902\r
1903INLINE void op0001(UINT16 opcode)\r
1904{\r
1905 MOVLS4(Rm, opcode & 0x0f, Rn);\r
1906}\r
1907\r
1908INLINE void op0010(UINT16 opcode)\r
1909{\r
1910 switch (opcode & 15)\r
1911 {\r
1912 case 0: MOVBS(Rm, Rn); break;\r
1913 case 1: MOVWS(Rm, Rn); break;\r
1914 case 2: MOVLS(Rm, Rn); break;\r
1915 case 3: NOP(); break;\r
1916 case 4: MOVBM(Rm, Rn); break;\r
1917 case 5: MOVWM(Rm, Rn); break;\r
1918 case 6: MOVLM(Rm, Rn); break;\r
1919 case 7: DIV0S(Rm, Rn); break;\r
1920 case 8: TST(Rm, Rn); break;\r
1921 case 9: AND(Rm, Rn); break;\r
1922 case 10: XOR(Rm, Rn); break;\r
1923 case 11: OR(Rm, Rn); break;\r
1924 case 12: CMPSTR(Rm, Rn); break;\r
1925 case 13: XTRCT(Rm, Rn); break;\r
1926 case 14: MULU(Rm, Rn); break;\r
1927 case 15: MULS(Rm, Rn); break;\r
1928 }\r
1929}\r
1930\r
1931INLINE void op0011(UINT16 opcode)\r
1932{\r
1933 switch (opcode & 15)\r
1934 {\r
1935 case 0: CMPEQ(Rm, Rn); break;\r
1936 case 1: NOP(); break;\r
1937 case 2: CMPHS(Rm, Rn); break;\r
1938 case 3: CMPGE(Rm, Rn); break;\r
1939 case 4: DIV1(Rm, Rn); break;\r
1940 case 5: DMULU(Rm, Rn); break;\r
1941 case 6: CMPHI(Rm, Rn); break;\r
1942 case 7: CMPGT(Rm, Rn); break;\r
1943 case 8: SUB(Rm, Rn); break;\r
1944 case 9: NOP(); break;\r
1945 case 10: SUBC(Rm, Rn); break;\r
1946 case 11: SUBV(Rm, Rn); break;\r
1947 case 12: ADD(Rm, Rn); break;\r
1948 case 13: DMULS(Rm, Rn); break;\r
1949 case 14: ADDC(Rm, Rn); break;\r
1950 case 15: ADDV(Rm, Rn); break;\r
1951 }\r
1952}\r
1953\r
1954INLINE void op0100(UINT16 opcode)\r
1955{\r
1956 switch (opcode & 0x3F)\r
1957 {\r
1958 case 0x00: SHLL(Rn); break;\r
1959 case 0x01: SHLR(Rn); break;\r
1960 case 0x02: STSMMACH(Rn); break;\r
1961 case 0x03: STCMSR(Rn); break;\r
1962 case 0x04: ROTL(Rn); break;\r
1963 case 0x05: ROTR(Rn); break;\r
1964 case 0x06: LDSMMACH(Rn); break;\r
1965 case 0x07: LDCMSR(Rn); break;\r
1966 case 0x08: SHLL2(Rn); break;\r
1967 case 0x09: SHLR2(Rn); break;\r
1968 case 0x0a: LDSMACH(Rn); break;\r
1969 case 0x0b: JSR(Rn); break;\r
1970 case 0x0c: NOP(); break;\r
1971 case 0x0d: NOP(); break;\r
1972 case 0x0e: LDCSR(Rn); break;\r
1973 case 0x0f: MAC_W(Rm, Rn); break;\r
1974\r
1975 case 0x10: DT(Rn); break;\r
1976 case 0x11: CMPPZ(Rn); break;\r
1977 case 0x12: STSMMACL(Rn); break;\r
1978 case 0x13: STCMGBR(Rn); break;\r
1979 case 0x14: NOP(); break;\r
1980 case 0x15: CMPPL(Rn); break;\r
1981 case 0x16: LDSMMACL(Rn); break;\r
1982 case 0x17: LDCMGBR(Rn); break;\r
1983 case 0x18: SHLL8(Rn); break;\r
1984 case 0x19: SHLR8(Rn); break;\r
1985 case 0x1a: LDSMACL(Rn); break;\r
1986 case 0x1b: TAS(Rn); break;\r
1987 case 0x1c: NOP(); break;\r
1988 case 0x1d: NOP(); break;\r
1989 case 0x1e: LDCGBR(Rn); break;\r
1990 case 0x1f: MAC_W(Rm, Rn); break;\r
1991\r
1992 case 0x20: SHAL(Rn); break;\r
1993 case 0x21: SHAR(Rn); break;\r
1994 case 0x22: STSMPR(Rn); break;\r
1995 case 0x23: STCMVBR(Rn); break;\r
1996 case 0x24: ROTCL(Rn); break;\r
1997 case 0x25: ROTCR(Rn); break;\r
1998 case 0x26: LDSMPR(Rn); break;\r
1999 case 0x27: LDCMVBR(Rn); break;\r
2000 case 0x28: SHLL16(Rn); break;\r
2001 case 0x29: SHLR16(Rn); break;\r
2002 case 0x2a: LDSPR(Rn); break;\r
2003 case 0x2b: JMP(Rn); break;\r
2004 case 0x2c: NOP(); break;\r
2005 case 0x2d: NOP(); break;\r
2006 case 0x2e: LDCVBR(Rn); break;\r
2007 case 0x2f: MAC_W(Rm, Rn); break;\r
2008\r
2009 case 0x30: NOP(); break;\r
2010 case 0x31: NOP(); break;\r
2011 case 0x32: NOP(); break;\r
2012 case 0x33: NOP(); break;\r
2013 case 0x34: NOP(); break;\r
2014 case 0x35: NOP(); break;\r
2015 case 0x36: NOP(); break;\r
2016 case 0x37: NOP(); break;\r
2017 case 0x38: NOP(); break;\r
2018 case 0x39: NOP(); break;\r
2019 case 0x3a: NOP(); break;\r
2020 case 0x3b: NOP(); break;\r
2021 case 0x3c: NOP(); break;\r
2022 case 0x3d: NOP(); break;\r
2023 case 0x3e: NOP(); break;\r
2024 case 0x3f: MAC_W(Rm, Rn); break;\r
2025\r
2026 }\r
2027}\r
2028\r
2029INLINE void op0101(UINT16 opcode)\r
2030{\r
2031 MOVLL4(Rm, opcode & 0x0f, Rn);\r
2032}\r
2033\r
2034INLINE void op0110(UINT16 opcode)\r
2035{\r
2036 switch (opcode & 15)\r
2037 {\r
2038 case 0: MOVBL(Rm, Rn); break;\r
2039 case 1: MOVWL(Rm, Rn); break;\r
2040 case 2: MOVLL(Rm, Rn); break;\r
2041 case 3: MOV(Rm, Rn); break;\r
2042 case 4: MOVBP(Rm, Rn); break;\r
2043 case 5: MOVWP(Rm, Rn); break;\r
2044 case 6: MOVLP(Rm, Rn); break;\r
2045 case 7: NOT(Rm, Rn); break;\r
2046 case 8: SWAPB(Rm, Rn); break;\r
2047 case 9: SWAPW(Rm, Rn); break;\r
2048 case 10: NEGC(Rm, Rn); break;\r
2049 case 11: NEG(Rm, Rn); break;\r
2050 case 12: EXTUB(Rm, Rn); break;\r
2051 case 13: EXTUW(Rm, Rn); break;\r
2052 case 14: EXTSB(Rm, Rn); break;\r
2053 case 15: EXTSW(Rm, Rn); break;\r
2054 }\r
2055}\r
2056\r
2057INLINE void op0111(UINT16 opcode)\r
2058{\r
2059 ADDI(opcode & 0xff, Rn);\r
2060}\r
2061\r
2062INLINE void op1000(UINT16 opcode)\r
2063{\r
2064 switch ( opcode & (15<<8) )\r
2065 {\r
2066 case 0 << 8: MOVBS4(opcode & 0x0f, Rm); break;\r
2067 case 1 << 8: MOVWS4(opcode & 0x0f, Rm); break;\r
2068 case 2<< 8: NOP(); break;\r
2069 case 3<< 8: NOP(); break;\r
2070 case 4<< 8: MOVBL4(Rm, opcode & 0x0f); break;\r
2071 case 5<< 8: MOVWL4(Rm, opcode & 0x0f); break;\r
2072 case 6<< 8: NOP(); break;\r
2073 case 7<< 8: NOP(); break;\r
2074 case 8<< 8: CMPIM(opcode & 0xff); break;\r
2075 case 9<< 8: BT(opcode & 0xff); break;\r
2076 case 10<< 8: NOP(); break;\r
2077 case 11<< 8: BF(opcode & 0xff); break;\r
2078 case 12<< 8: NOP(); break;\r
2079 case 13<< 8: BTS(opcode & 0xff); break;\r
2080 case 14<< 8: NOP(); break;\r
2081 case 15<< 8: BFS(opcode & 0xff); break;\r
2082 }\r
2083}\r
2084\r
2085\r
2086INLINE void op1001(UINT16 opcode)\r
2087{\r
2088 MOVWI(opcode & 0xff, Rn);\r
2089}\r
2090\r
2091INLINE void op1010(UINT16 opcode)\r
2092{\r
2093 BRA(opcode & 0xfff);\r
2094}\r
2095\r
2096INLINE void op1011(UINT16 opcode)\r
2097{\r
2098 BSR(opcode & 0xfff);\r
2099}\r
2100\r
2101INLINE void op1100(UINT16 opcode)\r
2102{\r
2103 switch (opcode & (15<<8))\r
2104 {\r
2105 case 0<<8: MOVBSG(opcode & 0xff); break;\r
2106 case 1<<8: MOVWSG(opcode & 0xff); break;\r
2107 case 2<<8: MOVLSG(opcode & 0xff); break;\r
2108 case 3<<8: TRAPA(opcode & 0xff); break;\r
2109 case 4<<8: MOVBLG(opcode & 0xff); break;\r
2110 case 5<<8: MOVWLG(opcode & 0xff); break;\r
2111 case 6<<8: MOVLLG(opcode & 0xff); break;\r
2112 case 7<<8: MOVA(opcode & 0xff); break;\r
2113 case 8<<8: TSTI(opcode & 0xff); break;\r
2114 case 9<<8: ANDI(opcode & 0xff); break;\r
2115 case 10<<8: XORI(opcode & 0xff); break;\r
2116 case 11<<8: ORI(opcode & 0xff); break;\r
2117 case 12<<8: TSTM(opcode & 0xff); break;\r
2118 case 13<<8: ANDM(opcode & 0xff); break;\r
2119 case 14<<8: XORM(opcode & 0xff); break;\r
2120 case 15<<8: ORM(opcode & 0xff); break;\r
2121 }\r
2122}\r
2123\r
2124INLINE void op1101(UINT16 opcode)\r
2125{\r
2126 MOVLI(opcode & 0xff, Rn);\r
2127}\r
2128\r
2129INLINE void op1110(UINT16 opcode)\r
2130{\r
2131 MOVI(opcode & 0xff, Rn);\r
2132}\r
2133\r
2134INLINE void op1111(UINT16 opcode)\r
2135{\r
2136 NOP();\r
2137}\r
2138\r
2139#endif\r
fast MegaDrive/MegaCD/32X emulator