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1 | #include <string.h> |
| 2 | |
| 3 | // MAME types |
| 4 | typedef signed char INT8; |
| 5 | typedef signed short INT16; |
| 6 | typedef signed int INT32; |
| 7 | typedef unsigned int UINT32; |
| 8 | typedef unsigned short UINT16; |
| 9 | typedef unsigned char UINT8; |
| 10 | |
| 11 | // pico memhandlers |
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12 | unsigned int p32x_sh2_read8(unsigned int a); |
| 13 | unsigned int p32x_sh2_read16(unsigned int a); |
| 14 | unsigned int p32x_sh2_read32(unsigned int a); |
| 15 | void p32x_sh2_write8(unsigned int a, unsigned int d); |
| 16 | void p32x_sh2_write16(unsigned int a, unsigned int d); |
| 17 | void p32x_sh2_write32(unsigned int a, unsigned int d); |
| 18 | |
| 19 | #define RB p32x_sh2_read8 |
| 20 | #define RW p32x_sh2_read16 |
| 21 | #define RL p32x_sh2_read32 |
| 22 | #define WB p32x_sh2_write8 |
| 23 | #define WW p32x_sh2_write16 |
| 24 | #define WL p32x_sh2_write32 |
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25 | |
| 26 | // some stuff from sh2comn.h |
| 27 | #define T 0x00000001 |
| 28 | #define S 0x00000002 |
| 29 | #define I 0x000000f0 |
| 30 | #define Q 0x00000100 |
| 31 | #define M 0x00000200 |
| 32 | |
| 33 | #define AM 0xc7ffffff |
| 34 | |
| 35 | #define FLAGS (M|Q|I|S|T) |
| 36 | |
| 37 | #define Rn ((opcode>>8)&15) |
| 38 | #define Rm ((opcode>>4)&15) |
| 39 | |
| 40 | #include "sh2.c" |
| 41 | |
| 42 | void sh2_reset(SH2 *sh2) |
| 43 | { |
| 44 | int save_is_slave; |
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45 | void *save_irqcallback; |
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46 | |
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47 | save_irqcallback = sh2->irq_callback; |
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48 | save_is_slave = sh2->is_slave; |
| 49 | |
| 50 | memset(sh2, 0, sizeof(SH2)); |
| 51 | |
| 52 | sh2->is_slave = save_is_slave; |
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53 | sh2->irq_callback = save_irqcallback; |
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54 | |
| 55 | sh2->pc = RL(0); |
| 56 | sh2->r[15] = RL(4); |
| 57 | sh2->sr = I; |
| 58 | |
| 59 | sh2->internal_irq_level = -1; |
| 60 | } |
| 61 | |
| 62 | /* Execute cycles - returns number of cycles actually run */ |
| 63 | int sh2_execute(SH2 *sh2_, int cycles) |
| 64 | { |
| 65 | sh2 = sh2_; |
| 66 | sh2_icount = cycles; |
| 67 | |
| 68 | do |
| 69 | { |
| 70 | UINT32 opcode; |
| 71 | |
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72 | if (sh2->delay) |
| 73 | { |
| 74 | opcode = RW(sh2->delay); |
| 75 | sh2->pc -= 2; |
| 76 | } |
| 77 | else |
| 78 | opcode = RW(sh2->pc); |
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79 | |
| 80 | sh2->delay = 0; |
| 81 | sh2->pc += 2; |
| 82 | sh2->ppc = sh2->pc; |
| 83 | |
| 84 | switch (opcode & ( 15 << 12)) |
| 85 | { |
| 86 | case 0<<12: op0000(opcode); break; |
| 87 | case 1<<12: op0001(opcode); break; |
| 88 | case 2<<12: op0010(opcode); break; |
| 89 | case 3<<12: op0011(opcode); break; |
| 90 | case 4<<12: op0100(opcode); break; |
| 91 | case 5<<12: op0101(opcode); break; |
| 92 | case 6<<12: op0110(opcode); break; |
| 93 | case 7<<12: op0111(opcode); break; |
| 94 | case 8<<12: op1000(opcode); break; |
| 95 | case 9<<12: op1001(opcode); break; |
| 96 | case 10<<12: op1010(opcode); break; |
| 97 | case 11<<12: op1011(opcode); break; |
| 98 | case 12<<12: op1100(opcode); break; |
| 99 | case 13<<12: op1101(opcode); break; |
| 100 | case 14<<12: op1110(opcode); break; |
| 101 | default: op1111(opcode); break; |
| 102 | } |
| 103 | |
| 104 | if (sh2->test_irq && !sh2->delay) |
| 105 | { |
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106 | if (sh2->pending_irq) |
| 107 | sh2_irl_irq(sh2, sh2->pending_irq); |
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108 | sh2->test_irq = 0; |
| 109 | } |
| 110 | sh2_icount--; |
| 111 | } |
| 112 | while (sh2_icount > 0); |
| 113 | |
| 114 | return cycles - sh2_icount; |
| 115 | } |
| 116 | |
| 117 | void sh2_init(SH2 *sh2) |
| 118 | { |
| 119 | memset(sh2, 0, sizeof(*sh2)); |
| 120 | } |
| 121 | |
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122 | void sh2_irl_irq(SH2 *sh2, int level) |
| 123 | { |
| 124 | int vector; |
| 125 | |
| 126 | sh2->pending_irq = level; |
| 127 | |
| 128 | if (level <= ((sh2->sr >> 4) & 0x0f)) |
| 129 | /* masked */ |
| 130 | return; |
| 131 | |
| 132 | sh2->irq_callback(level); |
| 133 | vector = 64 + level/2; |
| 134 | |
| 135 | sh2->r[15] -= 4; |
| 136 | WL(sh2->r[15], sh2->sr); /* push SR onto stack */ |
| 137 | sh2->r[15] -= 4; |
| 138 | WL(sh2->r[15], sh2->pc); /* push PC onto stack */ |
| 139 | |
| 140 | /* set I flags in SR */ |
| 141 | sh2->sr = (sh2->sr & ~I) | (level << 4); |
| 142 | |
| 143 | /* fetch PC */ |
| 144 | sh2->pc = RL(sh2->vbr + vector * 4); |
| 145 | |
| 146 | /* 13 cycles at best */ |
| 147 | sh2_icount -= 13; |
| 148 | } |
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149 | |
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