Commit | Line | Data |
---|---|---|
4a71579b | 1 | /* |
79bfeef6 | 2 | * Copyright (C) 2012-2023 Free Software Foundation, Inc. |
4a71579b PC |
3 | * |
4 | * This file is part of GNU lightning. | |
5 | * | |
6 | * GNU lightning is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU Lesser General Public License as published | |
8 | * by the Free Software Foundation; either version 3, or (at your option) | |
9 | * any later version. | |
10 | * | |
11 | * GNU lightning is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public | |
14 | * License for more details. | |
15 | * | |
16 | * Authors: | |
17 | * Paulo Cesar Pereira de Andrade | |
18 | */ | |
19 | ||
20 | #ifndef _jit_x86_h | |
21 | #define _jit_x86_h | |
22 | ||
23 | #define JIT_HASH_CONSTS 1 | |
24 | #define JIT_NUM_OPERANDS 2 | |
25 | ||
26 | /* | |
27 | * Types | |
28 | */ | |
29 | #define jit_sse2_p() jit_cpu.sse2 | |
30 | #define jit_x87_reg_p(reg) ((reg) >= _ST0 && (reg) <= _ST6) | |
31 | #if __WORDSIZE == 32 | |
32 | # if defined(__x86_64__) | |
33 | # define __X64_32 1 | |
34 | # define __X64 1 | |
35 | # else | |
36 | # define __X32 1 | |
37 | # endif | |
38 | #else | |
39 | # define __X64 1 | |
40 | #endif | |
41 | ||
42 | #define JIT_FP _RBP | |
43 | typedef enum { | |
44 | #if __X32 | |
45 | # define jit_r(i) (_RAX + (i)) | |
46 | # define jit_r_num() 3 | |
47 | # define jit_v(i) (_RBX + (i)) | |
48 | # define jit_v_num() 3 | |
49 | # define jit_f(i) (jit_cpu.sse2 ? _XMM0 + (i) : _ST0 + (i)) | |
50 | # define jit_f_num() (jit_cpu.sse2 ? 8 : 6) | |
51 | # define JIT_R0 _RAX | |
52 | # define JIT_R1 _RCX | |
53 | # define JIT_R2 _RDX | |
54 | _RAX, _RCX, _RDX, | |
55 | # define JIT_V0 _RBX | |
56 | # define JIT_V1 _RSI | |
57 | # define JIT_V2 _RDI | |
58 | _RBX, _RSI, _RDI, | |
59 | _RSP, _RBP, | |
60 | # define JIT_F0 (jit_sse2_p() ? _XMM0 : _ST0) | |
61 | # define JIT_F1 (jit_sse2_p() ? _XMM1 : _ST1) | |
62 | # define JIT_F2 (jit_sse2_p() ? _XMM2 : _ST2) | |
63 | # define JIT_F3 (jit_sse2_p() ? _XMM3 : _ST3) | |
64 | # define JIT_F4 (jit_sse2_p() ? _XMM4 : _ST4) | |
65 | # define JIT_F5 (jit_sse2_p() ? _XMM5 : _ST5) | |
66 | # define JIT_F6 (jit_sse2_p() ? _XMM6 : _ST6) | |
67 | _XMM0, _XMM1, _XMM2, _XMM3, _XMM4, _XMM5, _XMM6, _XMM7, | |
68 | # define jit_sse_reg_p(reg) ((reg) >= _XMM0 && (reg) <= _XMM7) | |
69 | #else | |
70 | # if __CYGWIN__ || _WIN32 | |
71 | # define jit_r(i) (_RAX + (i)) | |
72 | # define jit_r_num() 3 | |
73 | # define jit_v(i) (_RBX + (i)) | |
74 | # define jit_v_num() 7 | |
75 | # define jit_f(index) (_XMM4 + (index)) | |
76 | # define jit_f_num() 12 | |
77 | # define JIT_R0 _RAX | |
78 | # define JIT_R1 _R10 | |
79 | # define JIT_R2 _R11 | |
80 | # define JIT_V0 _RBX | |
81 | # define JIT_V1 _RDI | |
82 | # define JIT_V2 _RSI | |
83 | # define JIT_V3 _R12 | |
84 | # define JIT_V4 _R13 | |
85 | # define JIT_V5 _R14 | |
86 | # define JIT_V6 _R15 | |
87 | /* Volatile - Return value register */ | |
88 | _RAX, | |
89 | /* Volatile */ | |
90 | _R10, _R11, | |
91 | /* Nonvolatile */ | |
92 | _RBX, _RDI, _RSI, | |
93 | _R12, _R13, _R14, _R15, | |
94 | /* Volatile - Integer arguments (4 to 1) */ | |
95 | _R9, _R8, _RDX, _RCX, | |
96 | /* Nonvolatile */ | |
97 | _RSP, _RBP, | |
98 | # define JIT_F0 _XMM4 | |
99 | # define JIT_F1 _XMM5 | |
100 | # define JIT_F2 _XMM6 | |
101 | # define JIT_F3 _XMM7 | |
102 | # define JIT_F4 _XMM8 | |
103 | # define JIT_F5 _XMM9 | |
104 | # define JIT_F6 _XMM10 | |
105 | # define JIT_F7 _XMM11 | |
106 | # define JIT_F8 _XMM12 | |
107 | # define JIT_F9 _XMM13 | |
108 | # define JIT_F10 _XMM14 | |
109 | # define JIT_F11 _XMM15 | |
110 | /* Volatile */ | |
111 | _XMM4, _XMM5, | |
112 | /* Nonvolatile */ | |
113 | _XMM6, _XMM7, _XMM8, _XMM9, _XMM10, | |
114 | _XMM11, _XMM12, _XMM13, _XMM14, _XMM15, | |
115 | /* Volatile - FP arguments (4 to 1) */ | |
116 | _XMM3, _XMM2, _XMM1, _XMM0, | |
117 | # define jit_sse_reg_p(reg) ((reg) >= _XMM4 && (reg) <= _XMM0) | |
118 | # else | |
119 | # define jit_r(i) (_RAX + (i)) | |
120 | # define jit_r_num() 3 | |
121 | # define jit_v(i) (_RBX + (i)) | |
122 | # define jit_v_num() 5 | |
123 | # define jit_f(index) (_XMM8 + (index)) | |
124 | # define jit_f_num() 8 | |
125 | # define JIT_R0 _RAX | |
126 | # define JIT_R1 _R10 | |
127 | # define JIT_R2 _R11 | |
128 | _RAX, _R10, _R11, | |
129 | # define JIT_V0 _RBX | |
130 | # define JIT_V1 _R13 | |
131 | # define JIT_V2 _R14 | |
132 | # define JIT_V3 _R15 | |
133 | # define JIT_V4 _R12 | |
134 | _RBX, _R13, _R14, _R15, _R12, | |
135 | _R9, _R8, _RCX, _RDX, _RSI, _RDI, | |
136 | _RSP, _RBP, | |
137 | # define JIT_F0 _XMM8 | |
138 | # define JIT_F1 _XMM9 | |
139 | # define JIT_F2 _XMM10 | |
140 | # define JIT_F3 _XMM11 | |
141 | # define JIT_F4 _XMM12 | |
142 | # define JIT_F5 _XMM13 | |
143 | # define JIT_F6 _XMM14 | |
144 | # define JIT_F7 _XMM15 | |
145 | _XMM8, _XMM9, _XMM10, _XMM11, _XMM12, _XMM13, _XMM14, _XMM15, | |
146 | _XMM7, _XMM6, _XMM5, _XMM4, _XMM3, _XMM2, _XMM1, _XMM0, | |
147 | # define jit_sse_reg_p(reg) ((reg) >= _XMM8 && (reg) <= _XMM0) | |
148 | # endif | |
149 | #endif | |
150 | _ST0, _ST1, _ST2, _ST3, _ST4, _ST5, _ST6, | |
151 | # define JIT_NOREG _NOREG | |
152 | _NOREG, | |
153 | } jit_reg_t; | |
154 | ||
155 | typedef struct { | |
156 | /* x87 present */ | |
157 | jit_uint32_t fpu : 1; | |
158 | /* cmpxchg8b instruction */ | |
159 | jit_uint32_t cmpxchg8b : 1; | |
160 | /* cmov and fcmov branchless conditional mov */ | |
161 | jit_uint32_t cmov : 1; | |
162 | /* mmx registers/instructions available */ | |
163 | jit_uint32_t mmx : 1; | |
164 | /* sse registers/instructions available */ | |
165 | jit_uint32_t sse : 1; | |
166 | /* sse2 registers/instructions available */ | |
167 | jit_uint32_t sse2 : 1; | |
168 | /* sse3 instructions available */ | |
169 | jit_uint32_t sse3 : 1; | |
170 | /* pcmulqdq instruction */ | |
171 | jit_uint32_t pclmulqdq : 1; | |
172 | /* ssse3 suplemental sse3 instructions available */ | |
173 | jit_uint32_t ssse3 : 1; | |
174 | /* fused multiply/add using ymm state */ | |
175 | jit_uint32_t fma : 1; | |
176 | /* cmpxchg16b instruction */ | |
177 | jit_uint32_t cmpxchg16b : 1; | |
178 | /* sse4.1 instructions available */ | |
179 | jit_uint32_t sse4_1 : 1; | |
180 | /* sse4.2 instructions available */ | |
181 | jit_uint32_t sse4_2 : 1; | |
182 | /* movbe instruction available */ | |
183 | jit_uint32_t movbe : 1; | |
184 | /* popcnt instruction available */ | |
185 | jit_uint32_t popcnt : 1; | |
186 | /* aes instructions available */ | |
187 | jit_uint32_t aes : 1; | |
188 | /* avx instructions available */ | |
189 | jit_uint32_t avx : 1; | |
190 | /* lahf/sahf available in 64 bits mode */ | |
191 | jit_uint32_t lahf : 1; | |
79bfeef6 PC |
192 | /* lzcnt and tzcnt? */ |
193 | jit_uint32_t abm : 1; | |
194 | /* adcx and adox instructions available? */ | |
195 | jit_uint32_t adx : 1; | |
4a71579b PC |
196 | } jit_cpu_t; |
197 | ||
198 | /* | |
199 | * Initialization | |
200 | */ | |
201 | extern jit_cpu_t jit_cpu; | |
202 | ||
203 | #endif /* _jit_x86_h */ |