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Merge pull request #663 from bslenul/rumble-fix
[pcsx_rearmed.git] / deps / lightning / lib / jit_aarch64-cpu.c
CommitLineData
4a71579b
PC		 1/*
2 * Copyright (C) 2013-2019 Free Software Foundation, Inc.
3 *
4 * This file is part of GNU lightning.
5 *
6 * GNU lightning is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU Lesser General Public License as published
8 * by the Free Software Foundation; either version 3, or (at your option)
9 * any later version.
10 *
11 * GNU lightning is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
14 * License for more details.
15 *
16 * Authors:
17 * Paulo Cesar Pereira de Andrade
18 */
19
20#if PROTO
21typedef union {
22/* aarch64-opc.c */
23# define ui jit_uint32_t
24# if __BYTE_ORDER == __LITTLE_ENDIAN
25 /* cond2: condition in truly conditional-executed inst. */
26 struct { ui b: 4; } cond2;
27 /* nzcv: flag bit specifier, encoded in the "nzcv" field. */
28 struct { ui b: 4; } nzcv;
29 /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
30 struct { ui _: 5; ui b: 5; } defgh;
31 /* abc: a:b:c bits in AdvSIMD modified immediate. */
32 struct { ui _: 16; ui b: 3; } abc;
33 /* imm19: e.g. in CBZ. */
34 struct { ui _: 5; ui b: 19; } imm19;
35 /* immhi: e.g. in ADRP. */
36 struct { ui _: 5; ui b: 19; } immhi;
37 /* immlo: e.g. in ADRP. */
38 struct { ui _: 29; ui b: 2; } immlo;
39 /* size: in most AdvSIMD and floating-point instructions. */
40 struct { ui _: 22; ui b: 2; } size;
41 /* vldst_size: size field in the AdvSIMD load/store inst. */
42 struct { ui _: 10; ui b: 2; } vldst_size;
43 /* op: in AdvSIMD modified immediate instructions. */
44 struct { ui _: 29; ui b: 1; } op;
45 /* Q: in most AdvSIMD instructions. */
46 struct { ui _: 30; ui b: 1; } Q;
47 /* Rt: in load/store instructions. */
48 struct { ui b: 5; } Rt;
49 /* Rd: in many integer instructions. */
50 struct { ui b: 5; } Rd;
51 /* Rn: in many integer instructions. */
52 struct { ui _: 5; ui b: 5; } Rn;
53 /* Rt2: in load/store pair instructions. */
54 struct { ui _: 10; ui b: 5; } Rt2;
55 /* Ra: in fp instructions. */
56 struct { ui _: 10; ui b: 5; } Ra;
57 /* op2: in the system instructions. */
58 struct { ui _: 5; ui b: 3; } op2;
59 /* CRm: in the system instructions. */
60 struct { ui _: 8; ui b: 4; } CRm;
61 /* CRn: in the system instructions. */
62 struct { ui _: 12; ui b: 4; } CRn;
63 /* op1: in the system instructions. */
64 struct { ui _: 16; ui b: 3; } op1;
65 /* op0: in the system instructions. */
66 struct { ui _: 19; ui b: 2; } op0;
67 /* imm3: in add/sub extended reg instructions. */
68 struct { ui _: 10; ui b: 3; } imm3;
69 /* cond: condition flags as a source operand. */
70 struct { ui _: 12; ui b: 4; } cond;
71 /* opcode: in advsimd load/store instructions. */
72 struct { ui _: 12; ui b: 4; } opcode;
73 /* cmode: in advsimd modified immediate instructions. */
74 struct { ui _: 12; ui b: 4; } cmode;
75 /* asisdlso_opcode: opcode in advsimd ld/st single element. */
76 struct { ui _: 13; ui b: 3; } asisdlso_opcode;
77 /* len: in advsimd tbl/tbx instructions. */
78 struct { ui _: 13; ui b: 2; } len;
79 /* Rm: in ld/st reg offset and some integer inst. */
80 struct { ui _: 16; ui b: 5; } Rm;
81 /* Rs: in load/store exclusive instructions. */
82 struct { ui _: 16; ui b: 5; } Rs;
83 /* option: in ld/st reg offset + add/sub extended reg inst. */
84 struct { ui _: 13; ui b: 3; } option;
85 /* S: in load/store reg offset instructions. */
86 struct { ui _: 12; ui b: 1; } S;
87 /* hw: in move wide constant instructions. */
88 struct { ui _: 21; ui b: 2; } hw;
89 /* opc: in load/store reg offset instructions. */
90 struct { ui _: 22; ui b: 2; } opc;
91 /* opc1: in load/store reg offset instructions. */
92 struct { ui _: 23; ui b: 1; } opc1;
93 /* shift: in add/sub reg/imm shifted instructions. */
94 struct { ui _: 22; ui b: 2; } shift;
95 /* type: floating point type field in fp data inst. */
96 struct { ui _: 22; ui b: 2; } type;
97 /* ldst_size: size field in ld/st reg offset inst. */
98 struct { ui _: 30; ui b: 2; } ldst_size;
99 /* imm6: in add/sub reg shifted instructions. */
100 struct { ui _: 10; ui b: 6; } imm6;
101 /* imm4: in advsimd ext and advsimd ins instructions. */
102 struct { ui _: 11; ui b: 4; } imm4;
103 /* imm5: in conditional compare (immediate) instructions. */
104 struct { ui _: 16; ui b: 5; } imm5;
105 /* imm7: in load/store pair pre/post index instructions. */
106 struct { ui _: 15; ui b: 7; } imm7;
107 /* imm8: in floating-point scalar move immediate inst. */
108 struct { ui _: 13; ui b: 8; } imm8;
109 /* imm9: in load/store pre/post index instructions. */
110 struct { ui _: 12; ui b: 9; } imm9;
111 /* imm12: in ld/st unsigned imm or add/sub shifted inst. */
112 struct { ui _: 10; ui b: 12; } imm12;
113 /* imm14: in test bit and branch instructions. */
114 struct { ui _: 5; ui b: 14; } imm14;
115 /* imm16: in exception instructions. */
116 struct { ui _: 5; ui b: 16; } imm16;
117 /* imm26: in unconditional branch instructions. */
118 struct { ui b: 26; } imm26;
119 /* imms: in bitfield and logical immediate instructions. */
120 struct { ui _: 10; ui b: 6; } imms;
121 /* immr: in bitfield and logical immediate instructions. */
122 struct { ui _: 16; ui b: 6; } immr;
123 /* immb: in advsimd shift by immediate instructions. */
124 struct { ui _: 16; ui b: 3; } immb;
125 /* immh: in advsimd shift by immediate instructions. */
126 struct { ui _: 19; ui b: 4; } immh;
127 /* N: in logical (immediate) instructions. */
128 struct { ui _: 22; ui b: 1; } N;
129 /* index: in ld/st inst deciding the pre/post-index. */
130 struct { ui _: 11; ui b: 1; } index;
131 /* index2: in ld/st pair inst deciding the pre/post-index. */
132 struct { ui _: 24; ui b: 1; } index2;
133 /* sf: in integer data processing instructions. */
134 struct { ui _: 31; ui b: 1; } sf;
135 /* H: in advsimd scalar x indexed element instructions. */
136 struct { ui _: 11; ui b: 1; } H;
137 /* L: in advsimd scalar x indexed element instructions. */
138 struct { ui _: 21; ui b: 1; } L;
139 /* M: in advsimd scalar x indexed element instructions. */
140 struct { ui _: 20; ui b: 1; } M;
141 /* b5: in the test bit and branch instructions. */
142 struct { ui _: 31; ui b: 1; } b5;
143 /* b40: in the test bit and branch instructions. */
144 struct { ui _: 19; ui b: 5; } b40;
145 /* scale: in the fixed-point scalar to fp converting inst. */
146 struct { ui _: 10; ui b: 6; } scale;
147# else
148 struct { ui _: 28; ui b: 4; } cond2;
149 struct { ui _: 28; ui b: 4; } nzcv;
150 struct { ui _: 22; ui b: 5; } defgh;
151 struct { ui _: 13; ui b: 3; } abc;
152 struct { ui _: 8; ui b: 19; } imm19;
153 struct { ui _: 8; ui b: 19; } immhi;
154 struct { ui _: 1; ui b: 29; } immlo;
155 struct { ui _: 8; ui b: 2; } size;
156 struct { ui _: 20; ui b: 2; } vldst_size;
157 struct { ui _: 2; ui b: 1; } op;
158 struct { ui _: 1; ui b: 1; } Q;
159 struct { ui _: 27; ui b: 1; } Rt;
160 struct { ui _: 27; ui b: 1; } Rd;
161 struct { ui _: 22; ui b: 5; } Rn;
162 struct { ui _: 17; ui b: 5; } Rt2;
163 struct { ui _: 17; ui b: 5; } Ra;
164 struct { ui _: 24; ui b: 3; } op2;
165 struct { ui _: 20; ui b: 4; } CRm;
166 struct { ui _: 16; ui b: 4; } CRn;
167 struct { ui _: 13; ui b: 3; } op1;
168 struct { ui _: 11; ui b: 2; } op0;
169 struct { ui _: 19; ui b: 3; } imm3;
170 struct { ui _: 16; ui b: 4; } cond;
171 struct { ui _: 16; ui b: 4; } opcode;
172 struct { ui _: 16; ui b: 4; } cmode;
173 struct { ui _: 16; ui b: 3; } asisdlso_opcode;
174 struct { ui _: 17; ui b: 2; } len;
175 struct { ui _: 11; ui b: 5; } Rm;
176 struct { ui _: 11; ui b: 5; } Rs;
177 struct { ui _: 16; ui b: 3; } option;
178 struct { ui _: 19; ui b: 1; } S;
179 struct { ui _: 9; ui b: 2; } hw;
180 struct { ui _: 8; ui b: 2; } opc;
181 struct { ui _: 8; ui b: 1; } opc1;
182 struct { ui _: 8; ui b: 2; } shift;
183 struct { ui _: 8; ui b: 2; } type;
184 struct { ui b: 2; } ldst_size;
185 struct { ui _: 16; ui b: 6; } imm6;
186 struct { ui _: 17; ui b: 4; } imm4;
187 struct { ui _: 11; ui b: 5; } imm5;
188 struct { ui _: 10; ui b: 7; } imm7;
189 struct { ui _: 11; ui b: 8; } imm8;
190 struct { ui _: 11; ui b: 9; } imm9;
191 struct { ui _: 10; ui b: 12; } imm12;
192 struct { ui _: 13; ui b: 14; } imm14;
193 struct { ui _: 11; ui b: 16; } imm16;
194 struct { ui _: 6; ui b: 26; } imm26;
195 struct { ui _: 16; ui b: 6; } imms;
196 struct { ui _: 10; ui b: 6; } immr;
197 struct { ui _: 13; ui b: 3; } immb;
198 struct { ui _: 9; ui b: 4; } immh;
199 struct { ui _: 9; ui b: 1; } N;
200 struct { ui _: 20; ui b: 1; } index;
201 struct { ui _: 7; ui b: 1; } index2;
202 struct { ui b: 1; } sf;
203 struct { ui _: 20; ui b: 1; } H;
204 struct { ui _: 10; ui b: 1; } L;
205 struct { ui _: 11; ui b: 1; } M;
206 struct { ui b: 1; } b5;
207 struct { ui _: 8; ui b: 5; } b40;
208 struct { ui _: 16; ui b: 6; } scale;
209# endif
210 jit_int32_t w;
211# undef ui
212} instr_t;
213# define stack_framesize 160
214# define ii(i) *_jit->pc.ui++ = i
215# define ldr(r0,r1) ldr_l(r0,r1)
216# define ldxr(r0,r1,r2) ldxr_l(r0,r1,r2)
217# define ldxi(r0,r1,i0) ldxi_l(r0,r1,i0)
218# define stxi(i0,r0,r1) stxi_l(i0,r0,r1)
219# define FP_REGNO 0x1d
220# define LR_REGNO 0x1e
221# define SP_REGNO 0x1f
222# define XZR_REGNO 0x1f
223# define WZR_REGNO XZR_REGNO
224# define LSL_12 0x00400000
225# define MOVI_LSL_16 0x00200000
226# define MOVI_LSL_32 0x00400000
227# define MOVI_LSL_48 0x00600000
228# define XS 0x80000000 /* Wn -> Xn */
229# define DS 0x00400000 /* Sn -> Dn */
230# define CC_NE 0x0
231# define CC_EQ 0x1
232# define CC_CC 0x2
233# define CC_LO CC_CC
234# define CC_CS 0x3
235# define CC_HS CC_CS
236# define CC_PL 0x4
237# define CC_MI 0x5
238# define CC_VC 0x6
239# define CC_VS 0x7
240# define CC_LS 0x8
241# define CC_HI 0x9
242# define CC_LT 0xa
243# define CC_GE 0xb
244# define CC_LE 0xc
245# define CC_GT 0xd
246# define CC_NV 0xe
247# define CC_AL 0xf
248/* Branches need inverted condition */
249# define BCC_EQ 0x0
250# define BCC_NE 0x1
251# define BCC_CS 0x2
252# define BCC_HS BCC_CS
253# define BCC_CC 0x3
254# define BCC_LO BCC_CC
255# define BCC_MI 0x4
256# define BCC_PL 0x5
257# define BCC_VS 0x6
258# define BCC_VC 0x7
259# define BCC_HI 0x8
260# define BCC_LS 0x9
261# define BCC_GE 0xa
262# define BCC_LT 0xb
263# define BCC_GT 0xc
264# define BCC_LE 0xd
265# define BCC_AL 0xe
266# define BCC_NV 0xf
267/* adapted and cut down to only tested and required by lightning,
268 * from data in binutils/aarch64-tbl.h */
269# define A64_ADCS 0x3a000000
270# define A64_SBCS 0x7a000000
271# define A64_ADDI 0x11000000
272# define A64_ADDSI 0xb1000000
273# define A64_SUBI 0x51000000
274# define A64_SUBSI 0x71000000
275# define A64_ADD 0x0b000000
276# define A64_ADDS 0x2b000000
277# define A64_SUB 0x4b000000
278# define A64_NEG 0x4b0003e0
279# define A64_SUBS 0x6b000000
280# define A64_CMP 0x6b00001f
281# define A64_SBFM 0x93400000
282# define A64_UBFM 0x53400000
283# define A64_UBFX 0x53000000
284# define A64_B 0x14000000
285# define A64_BL 0x94000000
286# define A64_BR 0xd61f0000
287# define A64_BLR 0xd63f0000
288# define A64_RET 0xd65f0000
289# define A64_CBZ 0x34000000
290# define A64_CBNZ 0x35000000
291# define A64_B_C 0x54000000
292# define A64_CSINC 0x1a800400
e0659411 293# define A64_CSSEL 0x1a800000
4a71579b
PC		 294# define A64_REV 0xdac00c00
295# define A64_UDIV 0x1ac00800
296# define A64_SDIV 0x1ac00c00
297# define A64_LSL 0x1ac02000
298# define A64_LSR 0x1ac02400
299# define A64_ASR 0x1ac02800
300# define A64_MUL 0x1b007c00
301# define A64_SMULL 0x9b207c00
302# define A64_SMULH 0x9b407c00
303# define A64_UMULL 0x9ba07c00
304# define A64_UMULH 0x9bc07c00
305# define A64_STRBI 0x39000000
306# define A64_LDRBI 0x39400000
307# define A64_LDRSBI 0x39800000
308# define A64_STRI 0xf9000000
309# define A64_LDRI 0xf9400000
310# define A64_STRHI 0x79000000
311# define A64_LDRHI 0x79400000
312# define A64_LDRSHI 0x79800000
313# define A64_STRWI 0xb9000000
314# define A64_LDRWI 0xb9400000
315# define A64_LDRSWI 0xb9800000
316# define A64_STRB 0x38206800
317# define A64_LDRB 0x38606800
318# define A64_LDRSB 0x38e06800
319# define A64_STR 0xf8206800
320# define A64_LDR 0xf8606800
321# define A64_STRH 0x78206800
322# define A64_LDRH 0x78606800
323# define A64_LDRSH 0x78a06800
324# define A64_STRW 0xb8206800
325# define A64_LDRW 0xb8606800
326# define A64_LDRSW 0xb8a06800
327# define A64_STURB 0x38000000
328# define A64_LDURB 0x38400000
329# define A64_LDURSB 0x38800000
330# define A64_STUR 0xf8000000
331# define A64_LDUR 0xf8400000
332# define A64_STURH 0x78000000
333# define A64_LDURH 0x78400000
334# define A64_LDURSH 0x78800000
335# define A64_STURW 0xb8000000
336# define A64_LDURW 0xb8400000
337# define A64_LDURSW 0xb8800000
338# define A64_STP 0x29000000
339# define A64_LDP 0x29400000
340# define A64_STP_POS 0x29800000
341# define A64_LDP_PRE 0x28c00000
342# define A64_ANDI 0x12400000
343# define A64_ORRI 0x32400000
344# define A64_EORI 0x52400000
345# define A64_ANDSI 0x72000000
346# define A64_AND 0x0a000000
347# define A64_ORR 0x2a000000
348# define A64_MOV 0x2a0003e0 /* AKA orr Rd,xzr,Rm */
349# define A64_MVN 0x2a2003e0
350# define A64_UXTW 0x2a0003e0 /* AKA MOV */
351# define A64_EOR 0x4a000000
352# define A64_ANDS 0x6a000000
353# define A64_MOVN 0x12800000
354# define A64_MOVZ 0x52800000
355# define A64_MOVK 0x72800000
356# define SBFM(Rd,Rn,ImmR,ImmS) oxxrs(A64_SBFM|XS,Rd,Rn,ImmR,ImmS)
357# define UBFM(Rd,Rn,ImmR,ImmS) oxxrs(A64_UBFM|XS,Rd,Rn,ImmR,ImmS)
358# define UBFX(Rd,Rn,ImmR,ImmS) oxxrs(A64_UBFX,Rd,Rn,ImmR,ImmS)
359# define CMP(Rn,Rm) oxx_(A64_CMP|XS,Rn,Rm)
360# define CMPI(Rn,Imm12) oxxi(A64_SUBSI|XS,XZR_REGNO,Rn,Imm12)
361# define CMPI_12(Rn,Imm12) oxxi(A64_SUBSI|XS|LSL_12,XZR_REGNO,Rn,Imm12)
362# define CMNI(Rn,Imm12) oxxi(A64_ADDSI|XS,XZR_REGNO,Rn,Imm12)
363# define CMNI_12(Rn,Imm12) oxxi(A64_ADDSI|XS|LSL_12,XZR_REGNO,Rn,Imm12)
364# define CSINC(Rd,Rn,Rm,Cc) oxxxc(A64_CSINC|XS,Rd,Rn,Rm,Cc)
365# define TST(Rn,Rm) oxxx(A64_ANDS|XS,XZR_REGNO,Rn,Rm)
366/* actually should use oxxrs but logical_immediate returns proper encoding */
367# define TSTI(Rn,Imm12) oxxi(A64_ANDSI,XZR_REGNO,Rn,Imm12)
368# define MOV(Rd,Rm) ox_x(A64_MOV|XS,Rd,Rm)
369# define MVN(Rd,Rm) ox_x(A64_MVN|XS,Rd,Rm)
370# define NEG(Rd,Rm) ox_x(A64_NEG|XS,Rd,Rm)
371# define MOVN(Rd,Imm16) ox_h(A64_MOVN|XS,Rd,Imm16)
372# define MOVN_16(Rd,Imm16) ox_h(A64_MOVN|XS|MOVI_LSL_16,Rd,Imm16)
373# define MOVN_32(Rd,Imm16) ox_h(A64_MOVN|XS|MOVI_LSL_32,Rd,Imm16)
374# define MOVN_48(Rd,Imm16) ox_h(A64_MOVN|XS|MOVI_LSL_48,Rd,Imm16)
375# define MOVZ(Rd,Imm16) ox_h(A64_MOVZ|XS,Rd,Imm16)
376# define MOVZ_16(Rd,Imm16) ox_h(A64_MOVZ|XS|MOVI_LSL_16,Rd,Imm16)
377# define MOVZ_32(Rd,Imm16) ox_h(A64_MOVZ|XS|MOVI_LSL_32,Rd,Imm16)
378# define MOVZ_48(Rd,Imm16) ox_h(A64_MOVZ|XS|MOVI_LSL_48,Rd,Imm16)
379# define MOVK(Rd,Imm16) ox_h(A64_MOVK|XS,Rd,Imm16)
380# define MOVK_16(Rd,Imm16) ox_h(A64_MOVK|XS|MOVI_LSL_16,Rd,Imm16)
381# define MOVK_32(Rd,Imm16) ox_h(A64_MOVK|XS|MOVI_LSL_32,Rd,Imm16)
382# define MOVK_48(Rd,Imm16) ox_h(A64_MOVK|XS|MOVI_LSL_48,Rd,Imm16)
383# define ADD(Rd,Rn,Rm) oxxx(A64_ADD|XS,Rd,Rn,Rm)
384# define ADDI(Rd,Rn,Imm12) oxxi(A64_ADDI|XS,Rd,Rn,Imm12)
385# define ADDI_12(Rd,Rn,Imm12) oxxi(A64_ADDI|XS|LSL_12,Rd,Rn,Imm12)
386# define MOV_XSP(Rd,Rn) ADDI(Rd,Rn,0)
387# define ADDS(Rd,Rn,Rm) oxxx(A64_ADDS|XS,Rd,Rn,Rm)
388# define ADDSI(Rd,Rn,Imm12) oxxi(A64_ADDSI|XS,Rd,Rn,Imm12)
389# define ADDSI_12(Rd,Rn,Imm12) oxxi(A64_ADDSI|XS|LSL_12,Rd,Rn,Imm12)
390# define ADCS(Rd,Rn,Rm) oxxx(A64_ADCS|XS,Rd,Rn,Rm)
391# define SUB(Rd,Rn,Rm) oxxx(A64_SUB|XS,Rd,Rn,Rm)
392# define SUBI(Rd,Rn,Imm12) oxxi(A64_SUBI|XS,Rd,Rn,Imm12)
393# define SUBI_12(Rd,Rn,Imm12) oxxi(A64_SUBI|XS|LSL_12,Rd,Rn,Imm12)
394# define SUBS(Rd,Rn,Rm) oxxx(A64_SUBS|XS,Rd,Rn,Rm)
395# define SUBSI(Rd,Rn,Imm12) oxxi(A64_SUBSI|XS,Rd,Rn,Imm12)
396# define SUBSI_12(Rd,Rn,Imm12) oxxi(A64_SUBSI|XS|LSL_12,Rd,Rn,Imm12)
397# define SBCS(Rd,Rn,Rm) oxxx(A64_SBCS|XS,Rd,Rn,Rm)
398# define MUL(Rd,Rn,Rm) oxxx(A64_MUL|XS,Rd,Rn,Rm)
399# define SMULL(Rd,Rn,Rm) oxxx(A64_SMULL,Rd,Rn,Rm)
400# define SMULH(Rd,Rn,Rm) oxxx(A64_SMULH,Rd,Rn,Rm)
401# define UMULL(Rd,Rn,Rm) oxxx(A64_UMULL,Rd,Rn,Rm)
402# define UMULH(Rd,Rn,Rm) oxxx(A64_UMULH,Rd,Rn,Rm)
403# define SDIV(Rd,Rn,Rm) oxxx(A64_SDIV|XS,Rd,Rn,Rm)
404# define UDIV(Rd,Rn,Rm) oxxx(A64_UDIV|XS,Rd,Rn,Rm)
405# define LSL(Rd,Rn,Rm) oxxx(A64_LSL|XS,Rd,Rn,Rm)
406# define LSLI(r0,r1,i0) UBFM(r0,r1,(64-i0)&63,63-i0)
407# define ASR(Rd,Rn,Rm) oxxx(A64_ASR|XS,Rd,Rn,Rm)
408# define ASRI(r0,r1,i0) SBFM(r0,r1,i0,63)
409# define LSR(Rd,Rn,Rm) oxxx(A64_LSR|XS,Rd,Rn,Rm)
410# define LSRI(r0,r1,i0) UBFM(r0,r1,i0,63)
411# define AND(Rd,Rn,Rm) oxxx(A64_AND|XS,Rd,Rn,Rm)
412/* actually should use oxxrs but logical_immediate returns proper encoding */
413# define ANDI(Rd,Rn,Imm12) oxxi(A64_ANDI|XS,Rd,Rn,Imm12)
414# define ORR(Rd,Rn,Rm) oxxx(A64_ORR|XS,Rd,Rn,Rm)
415/* actually should use oxxrs but logical_immediate returns proper encoding */
416# define ORRI(Rd,Rn,Imm12) oxxi(A64_ORRI|XS,Rd,Rn,Imm12)
417# define EOR(Rd,Rn,Rm) oxxx(A64_EOR|XS,Rd,Rn,Rm)
418/* actually should use oxxrs but logical_immediate returns proper encoding */
419# define EORI(Rd,Rn,Imm12) oxxi(A64_EORI|XS,Rd,Rn,Imm12)
420# define SXTB(Rd,Rn) SBFM(Rd,Rn,0,7)
421# define SXTH(Rd,Rn) SBFM(Rd,Rn,0,15)
422# define SXTW(Rd,Rn) SBFM(Rd,Rn,0,31)
423# define UXTB(Rd,Rn) UBFX(Rd,Rn,0,7)
424# define UXTH(Rd,Rn) UBFX(Rd,Rn,0,15)
425# define UXTW(Rd,Rm) ox_x(A64_UXTW,Rd,Rm)
426# define REV(Rd,Rn) o_xx(A64_REV,Rd,Rn)
427# define LDRSB(Rt,Rn,Rm) oxxx(A64_LDRSB,Rt,Rn,Rm)
428# define LDRSBI(Rt,Rn,Imm12) oxxi(A64_LDRSBI,Rt,Rn,Imm12)
429# define LDURSB(Rt,Rn,Imm9) oxx9(A64_LDURSB,Rt,Rn,Imm9)
430# define LDRB(Rt,Rn,Rm) oxxx(A64_LDRB,Rt,Rn,Rm)
431# define LDRBI(Rt,Rn,Imm12) oxxi(A64_LDRBI,Rt,Rn,Imm12)
432# define LDURB(Rt,Rn,Imm9) oxx9(A64_LDURB,Rt,Rn,Imm9)
433# define LDRSH(Rt,Rn,Rm) oxxx(A64_LDRSH,Rt,Rn,Rm)
434# define LDRSHI(Rt,Rn,Imm12) oxxi(A64_LDRSHI,Rt,Rn,Imm12)
435# define LDURSH(Rt,Rn,Imm9) oxx9(A64_LDURSH,Rt,Rn,Imm9)
436# define LDRH(Rt,Rn,Rm) oxxx(A64_LDRH,Rt,Rn,Rm)
437# define LDRHI(Rt,Rn,Imm12) oxxi(A64_LDRHI,Rt,Rn,Imm12)
438# define LDURH(Rt,Rn,Imm9) oxx9(A64_LDURH,Rt,Rn,Imm9)
439# define LDRSW(Rt,Rn,Rm) oxxx(A64_LDRSW,Rt,Rn,Rm)
440# define LDRSWI(Rt,Rn,Imm12) oxxi(A64_LDRSWI,Rt,Rn,Imm12)
441# define LDURSW(Rt,Rn,Imm9) oxx9(A64_LDURSW,Rt,Rn,Imm9)
442# define LDRW(Rt,Rn,Rm) oxxx(A64_LDRW,Rt,Rn,Rm)
443# define LDRWI(Rt,Rn,Imm12) oxxi(A64_LDRWI,Rt,Rn,Imm12)
444# define LDURW(Rt,Rn,Imm9) oxx9(A64_LDURW,Rt,Rn,Imm9)
445# define LDR(Rt,Rn,Rm) oxxx(A64_LDR,Rt,Rn,Rm)
446# define LDRI(Rt,Rn,Imm12) oxxi(A64_LDRI,Rt,Rn,Imm12)
447# define LDUR(Rt,Rn,Imm9) oxx9(A64_LDUR,Rt,Rn,Imm9)
448# define STRB(Rt,Rn,Rm) oxxx(A64_STRB,Rt,Rn,Rm)
449# define STRBI(Rt,Rn,Imm12) oxxi(A64_STRBI,Rt,Rn,Imm12)
450# define STURB(Rt,Rn,Imm9) oxx9(A64_STURB,Rt,Rn,Imm9)
451# define STRH(Rt,Rn,Rm) oxxx(A64_STRH,Rt,Rn,Rm)
452# define STRHI(Rt,Rn,Imm12) oxxi(A64_STRHI,Rt,Rn,Imm12)
453# define STURH(Rt,Rn,Imm9) oxx9(A64_STURH,Rt,Rn,Imm9)
454# define STRW(Rt,Rn,Rm) oxxx(A64_STRW,Rt,Rn,Rm)
455# define STRWI(Rt,Rn,Imm12) oxxi(A64_STRWI,Rt,Rn,Imm12)
456# define STURW(Rt,Rn,Imm9) oxx9(A64_STURW,Rt,Rn,Imm9)
457# define STR(Rt,Rn,Rm) oxxx(A64_STR,Rt,Rn,Rm)
458# define STRI(Rt,Rn,Imm12) oxxi(A64_STRI,Rt,Rn,Imm12)
459# define STUR(Rt,Rn,Imm9) oxx9(A64_STUR,Rt,Rn,Imm9)
460# define LDPI(Rt,Rt2,Rn,Simm7) oxxx7(A64_LDP|XS,Rt,Rt2,Rn,Simm7)
461# define STPI(Rt,Rt2,Rn,Simm7) oxxx7(A64_STP|XS,Rt,Rt2,Rn,Simm7)
462# define LDPI_PRE(Rt,Rt2,Rn,Simm7) oxxx7(A64_LDP_PRE|XS,Rt,Rt2,Rn,Simm7)
463# define STPI_POS(Rt,Rt2,Rn,Simm7) oxxx7(A64_STP_POS|XS,Rt,Rt2,Rn,Simm7)
464# define CSET(Rd,Cc) CSINC(Rd,XZR_REGNO,XZR_REGNO,Cc)
e0659411 465# define CSEL(Rd,Rn,Rm,Cc) oxxxc(A64_CSSEL|XS,Rd,Rn,Rm,Cc)
4a71579b
PC		 466# define B(Simm26) o26(A64_B,Simm26)
467# define BL(Simm26) o26(A64_BL,Simm26)
468# define BR(Rn) o_x_(A64_BR,Rn)
469# define BLR(Rn) o_x_(A64_BLR,Rn)
470# define RET() o_x_(A64_RET,LR_REGNO)
471# define B_C(Cc,Simm19) oc19(A64_B_C,Cc,Simm19)
472# define CBZ(Rd,Simm19) ox19(A64_CBZ|XS,Rd,Simm19)
473# define CBNZ(Rd,Simm19) ox19(A64_CBNZ|XS,Rd,Simm19)
474# define NOP() ii(0xd503201f)
475static jit_int32_t logical_immediate(jit_word_t);
476# define oxxx(Op,Rd,Rn,Rm) _oxxx(_jit,Op,Rd,Rn,Rm)
477static void _oxxx(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
478# define oxxi(Op,Rd,Rn,Imm12) _oxxi(_jit,Op,Rd,Rn,Imm12)
479static void _oxxi(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
480# define oxx9(Op,Rd,Rn,Imm9) _oxx9(_jit,Op,Rd,Rn,Imm9)
481static void _oxx9(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
482# define ox19(Op,Rd,Simm19) _ox19(_jit,Op,Rd,Simm19)
483static void _ox19(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
484# define oc19(Op,Cc,Simm19) _oc19(_jit,Op,Cc,Simm19)
485static void _oc19(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
486# define o26(Op,Simm26) _o26(_jit,Op,Simm26)
487static void _oc26(jit_state_t*,jit_int32_t,jit_int32_t);
488# define ox_x(Op,Rd,Rn) _ox_x(_jit,Op,Rd,Rn)
489static void _ox_x(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
490# define o_xx(Op,Rd,Rn) _o_xx(_jit,Op,Rd,Rn)
491static void _o_xx(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
492# define oxx_(Op,Rn,Rm) _oxx_(_jit,Op,Rn,Rm)
493static void _oxx_(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
494# define o_x_(Op,Rn) _o_x_(_jit,Op,Rn)
495static void _o_x_(jit_state_t*,jit_int32_t,jit_int32_t);
496# define ox_h(Op,Rd,Imm16) _ox_h(_jit,Op,Rd,Imm16)
497static void _ox_h(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
498# define oxxrs(Op,Rd,Rn,R,S) _oxxrs(_jit,Op,Rd,Rn,R,S)
499static void _oxxrs(jit_state_t*,jit_int32_t,jit_int32_t,
500 jit_int32_t,jit_int32_t,jit_int32_t);
501# define oxxxc(Op,Rd,Rn,Rm,Cc) _oxxxc(_jit,Op,Rd,Rn,Rm,Cc)
502static void _oxxxc(jit_state_t*,jit_int32_t,jit_int32_t,
503 jit_int32_t,jit_int32_t,jit_int32_t);
504# define oxxx7(Op,Rt,Rt2,Rn,Simm7) _oxxx7(_jit,Op,Rt,Rt2,Rn,Simm7)
505static void _oxxx7(jit_state_t*,jit_int32_t,
506 jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
507# define nop(i0) _nop(_jit,i0)
508static void _nop(jit_state_t*,jit_int32_t);
509# define addr(r0,r1,r2) ADD(r0,r1,r2)
510# define addi(r0,r1,i0) _addi(_jit,r0,r1,i0)
511static void _addi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
512# define addcr(r0,r1,r2) ADDS(r0,r1,r2)
513# define addci(r0,r1,i0) _addci(_jit,r0,r1,i0)
514static void _addci(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
515# define addxr(r0,r1,r2) ADCS(r0,r1,r2)
516# define addxi(r0,r1,i0) _addxi(_jit,r0,r1,i0)
517static void _addxi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
518# define subr(r0,r1,r2) SUB(r0,r1,r2)
519# define subi(r0,r1,i0) _subi(_jit,r0,r1,i0)
520static void _subi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
521# define subcr(r0,r1,r2) SUBS(r0,r1,r2)
522# define subci(r0,r1,i0) _subci(_jit,r0,r1,i0)
523static void _subci(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
524# define subxr(r0,r1,r2) SBCS(r0,r1,r2)
525# define subxi(r0,r1,i0) _subxi(_jit,r0,r1,i0)
526static void _subxi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
527# define rsbi(r0, r1, i0) _rsbi(_jit, r0, r1, i0)
528static void _rsbi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
529# define mulr(r0,r1,r2) MUL(r0,r1,r2)
530# define muli(r0,r1,i0) _muli(_jit,r0,r1,i0)
531static void _muli(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
532# define qmulr(r0,r1,r2,r3) _qmulr(_jit,r0,r1,r2,r3)
533static void _qmulr(jit_state_t*,jit_int32_t,
534 jit_int32_t,jit_int32_t,jit_int32_t);
535# define qmuli(r0,r1,r2,i0) _qmuli(_jit,r0,r1,r2,i0)
536static void _qmuli(jit_state_t*,jit_int32_t,
537 jit_int32_t,jit_int32_t,jit_word_t);
538# define qmulr_u(r0,r1,r2,r3) _qmulr_u(_jit,r0,r1,r2,r3)
539static void _qmulr_u(jit_state_t*,jit_int32_t,
540 jit_int32_t,jit_int32_t,jit_int32_t);
541# define qmuli_u(r0,r1,r2,i0) _qmuli_u(_jit,r0,r1,r2,i0)
542static void _qmuli_u(jit_state_t*,jit_int32_t,
543 jit_int32_t,jit_int32_t,jit_word_t);
544# define divr(r0,r1,r2) SDIV(r0,r1,r2)
545# define divi(r0,r1,i0) _divi(_jit,r0,r1,i0)
546static void _divi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
547# define divr_u(r0,r1,r2) UDIV(r0,r1,r2)
548# define divi_u(r0,r1,i0) _divi_u(_jit,r0,r1,i0)
549static void _divi_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
550# define qdivr(r0,r1,r2,r3) _iqdivr(_jit,1,r0,r1,r2,r3)
551# define qdivr_u(r0,r1,r2,r3) _iqdivr(_jit,0,r0,r1,r2,r3)
552static void _iqdivr(jit_state_t*,jit_bool_t,
553 jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
554# define qdivi(r0,r1,r2,i0) _qdivi(_jit,r0,r1,r2,i0)
555static void _qdivi(jit_state_t*,jit_int32_t,
556 jit_int32_t,jit_int32_t,jit_word_t);
557# define qdivi_u(r0,r1,r2,i0) _qdivi_u(_jit,r0,r1,r2,i0)
558static void _qdivi_u(jit_state_t*,jit_int32_t,
559 jit_int32_t,jit_int32_t,jit_word_t);
560# define remr(r0,r1,r2) _remr(_jit,r0,r1,r2)
561static void _remr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
562# define remi(r0,r1,i0) _remi(_jit,r0,r1,i0)
563static void _remi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
564# define remr_u(r0,r1,r2) _remr_u(_jit,r0,r1,r2)
565static void _remr_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
566# define remi_u(r0,r1,i0) _remi_u(_jit,r0,r1,i0)
567static void _remi_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
568# define lshr(r0,r1,r2) LSL(r0,r1,r2)
569# define lshi(r0,r1,i0) _lshi(_jit,r0,r1,i0)
570static void _lshi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
571# define rshr(r0,r1,r2) ASR(r0,r1,r2)
572# define rshi(r0,r1,i0) _rshi(_jit,r0,r1,i0)
573static void _rshi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
574# define rshr_u(r0,r1,r2) LSR(r0,r1,r2)
575# define rshi_u(r0,r1,i0) _rshi_u(_jit,r0,r1,i0)
576static void _rshi_u(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
e0659411
PC		 577# define movnr(r0,r1,r2) _movnr(_jit,r0,r1,r2)
578static void _movnr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
579# define movzr(r0,r1,r2) _movzr(_jit,r0,r1,r2)
580static void _movzr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
4a71579b
PC		 581# define negr(r0,r1) NEG(r0,r1)
582# define comr(r0,r1) MVN(r0,r1)
583# define andr(r0,r1,r2) AND(r0,r1,r2)
584# define andi(r0,r1,i0) _andi(_jit,r0,r1,i0)
585static void _andi(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
586# define orr(r0,r1,r2) ORR(r0,r1,r2)
587# define ori(r0,r1,i0) _ori(_jit,r0,r1,i0)
588static void _ori(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
589# define xorr(r0,r1,r2) EOR(r0,r1,r2)
590# define xori(r0,r1,i0) _xori(_jit,r0,r1,i0)
591static void _xori(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
592# define ldr_c(r0,r1) LDRSBI(r0,r1,0)
593# define ldi_c(r0,i0) _ldi_c(_jit,r0,i0)
594static void _ldi_c(jit_state_t*,jit_int32_t,jit_word_t);
595# define ldr_uc(r0,r1) _ldr_uc(_jit,r0,r1)
596static void _ldr_uc(jit_state_t*,jit_int32_t,jit_int32_t);
597# define ldi_uc(r0,i0) _ldi_uc(_jit,r0,i0)
598static void _ldi_uc(jit_state_t*,jit_int32_t,jit_word_t);
599# define ldr_s(r0,r1) LDRSHI(r0,r1,0)
600# define ldi_s(r0,i0) _ldi_s(_jit,r0,i0)
601static void _ldi_s(jit_state_t*,jit_int32_t,jit_word_t);
602# define ldr_us(r0,r1) _ldr_us(_jit,r0,r1)
603static void _ldr_us(jit_state_t*,jit_int32_t,jit_int32_t);
604# define ldi_us(r0,i0) _ldi_us(_jit,r0,i0)
605static void _ldi_us(jit_state_t*,jit_int32_t,jit_word_t);
606# define ldr_i(r0,r1) LDRSWI(r0,r1,0)
607# define ldi_i(r0,i0) _ldi_i(_jit,r0,i0)
608static void _ldi_i(jit_state_t*,jit_int32_t,jit_word_t);
609# define ldr_ui(r0,r1) _ldr_ui(_jit,r0,r1)
610static void _ldr_ui(jit_state_t*,jit_int32_t,jit_int32_t);
611# define ldi_ui(r0,i0) _ldi_ui(_jit,r0,i0)
612static void _ldi_ui(jit_state_t*,jit_int32_t,jit_word_t);
613# define ldr_l(r0,r1) LDRI(r0,r1,0)
614static void _ldr_l(jit_state_t*,jit_int32_t,jit_int32_t);
615# define ldi_l(r0,i0) _ldi_l(_jit,r0,i0)
616static void _ldi_l(jit_state_t*,jit_int32_t,jit_word_t);
617# define ldxr_c(r0,r1,r2) _ldxr_c(_jit,r0,r1,r2)
618static void _ldxr_c(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
619# define ldxi_c(r0,r1,i0) _ldxi_c(_jit,r0,r1,i0)
620static void _ldxi_c(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
621# define ldxr_uc(r0,r1,r2) _ldxr_uc(_jit,r0,r1,r2)
622static void _ldxr_uc(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
623# define ldxi_uc(r0,r1,i0) _ldxi_uc(_jit,r0,r1,i0)
624static void _ldxi_uc(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
625# define ldxr_s(r0,r1,r2) LDRSH(r0,r1,r2)
626# define ldxi_s(r0,r1,i0) _ldxi_s(_jit,r0,r1,i0)
627static void _ldxi_s(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
628# define ldxr_us(r0,r1,r2) _ldxr_us(_jit,r0,r1,r2)
629static void _ldxr_us(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
630# define ldxi_us(r0,r1,i0) _ldxi_us(_jit,r0,r1,i0)
631static void _ldxi_us(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
632# define ldxr_i(r0,r1,r2) LDRSW(r0,r1,r2)
633# define ldxi_i(r0,r1,i0) _ldxi_i(_jit,r0,r1,i0)
634static void _ldxi_i(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
635# define ldxr_ui(r0,r1,r2) _ldxr_ui(_jit,r0,r1,r2)
636static void _ldxr_ui(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t);
637# define ldxi_ui(r0,r1,i0) _ldxi_ui(_jit,r0,r1,i0)
638static void _ldxi_ui(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
639# define ldxr_l(r0,r1,r2) LDR(r0,r1,r2)
640# define ldxi_l(r0,r1,i0) _ldxi_l(_jit,r0,r1,i0)
641static void _ldxi_l(jit_state_t*,jit_int32_t,jit_int32_t,jit_word_t);
642# define str_c(r0,r1) STRBI(r1,r0,0)
643# define sti_c(i0,r0) _sti_c(_jit,i0,r0)
644static void _sti_c(jit_state_t*,jit_word_t,jit_int32_t);
645# define str_s(r0,r1) STRHI(r1,r0,0)
646# define sti_s(i0,r0) _sti_s(_jit,i0,r0)
647static void _sti_s(jit_state_t*,jit_word_t,jit_int32_t);
648# define str_i(r0,r1) STRWI(r1,r0,0)
649# define sti_i(i0,r0) _sti_i(_jit,i0,r0)
650static void _sti_i(jit_state_t*,jit_word_t,jit_int32_t);
651# define str_l(r0,r1) STRI(r1,r0,0)
652# define sti_l(i0,r0) _sti_l(_jit,i0,r0)
653static void _sti_l(jit_state_t*,jit_word_t,jit_int32_t);
654# define stxr_c(r0,r1,r2) STRB(r2,r1,r0)
655# define stxi_c(i0,r0,r1) _stxi_c(_jit,i0,r0,r1)
656static void _stxi_c(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
657# define stxr_s(r0,r1,r2) STRH(r2,r1,r0)
658# define stxi_s(i0,r0,r1) _stxi_s(_jit,i0,r0,r1)
659static void _stxi_s(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
660# define stxr_i(r0,r1,r2) STRW(r2,r1,r0)
661# define stxi_i(i0,r0,r1) _stxi_i(_jit,i0,r0,r1)
662static void _stxi_i(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
663# define stxr_l(r0,r1,r2) STR(r2,r1,r0)
664# define stxi_l(i0,r0,r1) _stxi_l(_jit,i0,r0,r1)
665static void _stxi_l(jit_state_t*,jit_word_t,jit_int32_t,jit_int32_t);
40a44dcb
PC		 666# define bswapr_us(r0,r1) _bswapr_us(_jit,r0,r1)
667static void _bswapr_us(jit_state_t*,jit_int32_t,jit_int32_t);
668# define bswapr_ui(r0,r1) _bswapr_ui(_jit,r0,r1)
669static void _bswapr_ui(jit_state_t*,jit_int32_t,jit_int32_t);
670# define bswapr_ul(r0,r1) REV(r0,r1)
4a71579b
PC		 671# define extr_c(r0,r1) SXTB(r0,r1)
672# define extr_uc(r0,r1) UXTB(r0,r1)
673# define extr_s(r0,r1) SXTH(r0,r1)
674# define extr_us(r0,r1) UXTH(r0,r1)
675# define extr_i(r0,r1) SXTW(r0,r1)
676# define extr_ui(r0,r1) UXTW(r0,r1)
677# define movr(r0,r1) _movr(_jit,r0,r1)
678static void _movr(jit_state_t*,jit_int32_t,jit_int32_t);
679# define movi(r0,i0) _movi(_jit,r0,i0)
680static void _movi(jit_state_t*,jit_int32_t,jit_word_t);
681# define movi_p(r0,i0) _movi_p(_jit,r0,i0)
682static jit_word_t _movi_p(jit_state_t*,jit_int32_t,jit_word_t);
683# define ccr(cc,r0,r1,r2) _ccr(_jit,cc,r0,r1,r2)
684static void _ccr(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
685# define cci(cc,r0,r1,i0) _cci(_jit,cc,r0,r1,i0)
686static void _cci(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,jit_word_t);
687# define ltr(r0,r1,r2) ccr(CC_LT,r0,r1,r2)
688# define lti(r0,r1,i0) cci(CC_LT,r0,r1,i0)
689# define ltr_u(r0,r1,r2) ccr(CC_CC,r0,r1,r2)
690# define lti_u(r0,r1,i0) cci(CC_CC,r0,r1,i0)
691# define ler(r0,r1,r2) ccr(CC_LE,r0,r1,r2)
692# define lei(r0,r1,i0) cci(CC_LE,r0,r1,i0)
693# define ler_u(r0,r1,r2) ccr(CC_LS,r0,r1,r2)
694# define lei_u(r0,r1,i0) cci(CC_LS,r0,r1,i0)
695# define eqr(r0,r1,r2) ccr(CC_EQ,r0,r1,r2)
696# define eqi(r0,r1,i0) cci(CC_EQ,r0,r1,i0)
697# define ger(r0,r1,r2) ccr(CC_GE,r0,r1,r2)
698# define gei(r0,r1,i0) cci(CC_GE,r0,r1,i0)
699# define ger_u(r0,r1,r2) ccr(CC_CS,r0,r1,r2)
700# define gei_u(r0,r1,i0) cci(CC_CS,r0,r1,i0)
701# define gtr(r0,r1,r2) ccr(CC_GT,r0,r1,r2)
702# define gti(r0,r1,i0) cci(CC_GT,r0,r1,i0)
703# define gtr_u(r0,r1,r2) ccr(CC_HI,r0,r1,r2)
704# define gti_u(r0,r1,i0) cci(CC_HI,r0,r1,i0)
705# define ner(r0,r1,r2) ccr(CC_NE,r0,r1,r2)
706# define nei(r0,r1,i0) cci(CC_NE,r0,r1,i0)
707# define bccr(cc,i0,r0,r1) _bccr(_jit,cc,i0,r0,r1)
708static jit_word_t
709_bccr(jit_state_t*,jit_int32_t,jit_word_t,jit_int32_t,jit_int32_t);
710# define bcci(cc,i0,r0,i1) _bcci(_jit,cc,i0,r0,i1)
711static jit_word_t
712_bcci(jit_state_t*,jit_int32_t,jit_word_t,jit_int32_t,jit_word_t);
713# define bltr(i0,r0,r1) bccr(BCC_LT,i0,r0,r1)
714# define blti(i0,r0,i1) bcci(BCC_LT,i0,r0,i1)
715# define bltr_u(i0,r0,r1) bccr(BCC_CC,i0,r0,r1)
716# define blti_u(i0,r0,i1) bcci(BCC_CC,i0,r0,i1)
717# define bler(i0,r0,r1) bccr(BCC_LE,i0,r0,r1)
718# define blei(i0,r0,i1) bcci(BCC_LE,i0,r0,i1)
719# define bler_u(i0,r0,r1) bccr(BCC_LS,i0,r0,r1)
720# define blei_u(i0,r0,i1) bcci(BCC_LS,i0,r0,i1)
721# define beqr(i0,r0,r1) bccr(BCC_EQ,i0,r0,r1)
722# define beqi(i0,r0,i1) _beqi(_jit,i0,r0,i1)
723static jit_word_t _beqi(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
724# define bger(i0,r0,r1) bccr(BCC_GE,i0,r0,r1)
725# define bgei(i0,r0,i1) bcci(BCC_GE,i0,r0,i1)
726# define bger_u(i0,r0,r1) bccr(BCC_CS,i0,r0,r1)
727# define bgei_u(i0,r0,i1) bcci(BCC_CS,i0,r0,i1)
728# define bgtr(i0,r0,r1) bccr(BCC_GT,i0,r0,r1)
729# define bgti(i0,r0,i1) bcci(BCC_GT,i0,r0,i1)
730# define bgtr_u(i0,r0,r1) bccr(BCC_HI,i0,r0,r1)
731# define bgti_u(i0,r0,i1) bcci(BCC_HI,i0,r0,i1)
732# define bner(i0,r0,r1) bccr(BCC_NE,i0,r0,r1)
733# define bnei(i0,r0,i1) _bnei(_jit,i0,r0,i1)
734static jit_word_t _bnei(jit_state_t*,jit_word_t,jit_int32_t,jit_word_t);
735# define baddr(cc,i0,r0,r1) _baddr(_jit,cc,i0,r0,r1)
736static jit_word_t
737_baddr(jit_state_t*,jit_int32_t,jit_word_t,jit_int32_t,jit_int32_t);
738# define baddi(cc,i0,r0,i1) _baddi(_jit,cc,i0,r0,i1)
739static jit_word_t
740_baddi(jit_state_t*,jit_int32_t,jit_word_t,jit_int32_t,jit_word_t);
741# define boaddr(i0,r0,r1) baddr(BCC_VS,i0,r0,r1)
742# define boaddi(i0,r0,i1) baddi(BCC_VS,i0,r0,i1)
743# define boaddr_u(i0,r0,r1) baddr(BCC_HS,i0,r0,r1)
744# define boaddi_u(i0,r0,i1) baddi(BCC_HS,i0,r0,i1)
745# define bxaddr(i0,r0,r1) baddr(BCC_VC,i0,r0,r1)
746# define bxaddi(i0,r0,i1) baddi(BCC_VC,i0,r0,i1)
747# define bxaddr_u(i0,r0,r1) baddr(BCC_LO,i0,r0,r1)
748# define bxaddi_u(i0,r0,i1) baddi(BCC_LO,i0,r0,i1)
749# define bsubr(cc,i0,r0,r1) _bsubr(_jit,cc,i0,r0,r1)
750static jit_word_t
751_bsubr(jit_state_t*,jit_int32_t,jit_word_t,jit_int32_t,jit_int32_t);
752# define bsubi(cc,i0,r0,i1) _bsubi(_jit,cc,i0,r0,i1)
753static jit_word_t
754_bsubi(jit_state_t*,jit_int32_t,jit_word_t,jit_int32_t,jit_word_t);
755# define bosubr(i0,r0,r1) bsubr(BCC_VS,i0,r0,r1)
756# define bosubi(i0,r0,i1) bsubi(BCC_VS,i0,r0,i1)
757# define bosubr_u(i0,r0,r1) bsubr(BCC_LO,i0,r0,r1)
758# define bosubi_u(i0,r0,i1) bsubi(BCC_LO,i0,r0,i1)
759# define bxsubr(i0,r0,r1) bsubr(BCC_VC,i0,r0,r1)
760# define bxsubi(i0,r0,i1) bsubi(BCC_VC,i0,r0,i1)
761# define bxsubr_u(i0,r0,r1) bsubr(BCC_HS,i0,r0,r1)
762# define bxsubi_u(i0,r0,i1) bsubi(BCC_HS,i0,r0,i1)
763# define bmxr(cc,i0,r0,r1) _bmxr(_jit,cc,i0,r0,r1)
764static jit_word_t
765_bmxr(jit_state_t*,jit_int32_t,jit_word_t,jit_int32_t,jit_int32_t);
766# define bmxi(cc,i0,r0,r1) _bmxi(_jit,cc,i0,r0,r1)
767static jit_word_t
768_bmxi(jit_state_t*,jit_int32_t,jit_word_t,jit_int32_t,jit_word_t);
769# define bmsr(i0,r0,r1) bmxr(BCC_NE,i0,r0,r1)
770# define bmsi(i0,r0,i1) bmxi(BCC_NE,i0,r0,i1)
771# define bmcr(i0,r0,r1) bmxr(BCC_EQ,i0,r0,r1)
772# define bmci(i0,r0,i1) bmxi(BCC_EQ,i0,r0,i1)
773# define jmpr(r0) BR(r0)
774# define jmpi(i0) _jmpi(_jit,i0)
775static void _jmpi(jit_state_t*,jit_word_t);
776# define jmpi_p(i0) _jmpi_p(_jit,i0)
777static jit_word_t _jmpi_p(jit_state_t*,jit_word_t);
778# define callr(r0) BLR(r0)
779# define calli(i0) _calli(_jit,i0)
780static void _calli(jit_state_t*,jit_word_t);
781# define calli_p(i0) _calli_p(_jit,i0)
782static jit_word_t _calli_p(jit_state_t*,jit_word_t);
783# define prolog(i0) _prolog(_jit,i0)
784static void _prolog(jit_state_t*,jit_node_t*);
785# define epilog(i0) _epilog(_jit,i0)
786static void _epilog(jit_state_t*,jit_node_t*);
787# define vastart(r0) _vastart(_jit, r0)
788static void _vastart(jit_state_t*, jit_int32_t);
789# define vaarg(r0, r1) _vaarg(_jit, r0, r1)
790static void _vaarg(jit_state_t*, jit_int32_t, jit_int32_t);
791# define patch_at(jump,label) _patch_at(_jit,jump,label)
792static void _patch_at(jit_state_t*,jit_word_t,jit_word_t);
793#endif
794
795#if CODE
796static jit_int32_t
797logical_immediate(jit_word_t imm)
798{
799 /* There are 5334 possible immediate values, but to avoid the
800 * need of either too complex code or large lookup tables,
801 * only check for (simply) encodable common/small values */
802 switch (imm) {
803 case -16: return (0xf3b);
804 case -15: return (0xf3c);
805 case -13: return (0xf3d);
806 case -9: return (0xf3e);
807 case -8: return (0xf7c);
808 case -7: return (0xf7d);
809 case -5: return (0xf7e);
810 case -4: return (0xfbd);
811 case -3: return (0xfbe);
812 case -2: return (0xffe);
813 case 1: return (0x000);
814 case 2: return (0xfc0);
815 case 3: return (0x001);
816 case 4: return (0xf80);
817 case 6: return (0xfc1);
818 case 7: return (0x002);
819 case 8: return (0xf40);
820 case 12: return (0xf81);
821 case 14: return (0xfc2);
822 case 15: return (0x003);
823 case 16: return (0xf00);
824 default: return (-1);
825 }
826}
827
828static void
829_oxxx(jit_state_t *_jit, jit_int32_t Op,
830 jit_int32_t Rd, jit_int32_t Rn, jit_int32_t Rm)
831{
832 instr_t i;
833 assert(!(Rd & ~0x1f));
834 assert(!(Rn & ~0x1f));
835 assert(!(Rm & ~0x1f));
836 assert(!(Op & ~0xffe0fc00));
837 i.w = Op;
838 i.Rd.b = Rd;
839 i.Rn.b = Rn;
840 i.Rm.b = Rm;
841 ii(i.w);
842}
843
844static void
845_oxxi(jit_state_t *_jit, jit_int32_t Op,
846 jit_int32_t Rd, jit_int32_t Rn, jit_int32_t Imm12)
847{
848 instr_t i;
849 assert(!(Rd & ~0x1f));
850 assert(!(Rn & ~0x1f));
851 assert(!(Imm12 & ~0xfff));
852 assert(!(Op & ~0xffe00000));
853 i.w = Op;
854 i.Rd.b = Rd;
855 i.Rn.b = Rn;
856 i.imm12.b = Imm12;
857 ii(i.w);
858}
859
860static void
861_oxx9(jit_state_t *_jit, jit_int32_t Op,
862 jit_int32_t Rd, jit_int32_t Rn, jit_int32_t Imm9)
863{
864 instr_t i;
865 assert(!(Rd & ~0x1f));
866 assert(!(Rn & ~0x1f));
867 assert(!(Imm9 & ~0x1ff));
868 assert(!(Op & ~0xffe00000));
869 i.w = Op;
870 i.Rd.b = Rd;
871 i.Rn.b = Rn;
872 i.imm9.b = Imm9;
873 ii(i.w);
874}
875
876static void
877_ox19(jit_state_t *_jit, jit_int32_t Op, jit_int32_t Rd, jit_int32_t Simm19)
878{
879 instr_t i;
880 assert(!(Rd & ~0x1f));
881 assert(Simm19 >= -262148 && Simm19 <= 262143);
882 assert(!(Op & ~0xff000000));
883 i.w = Op;
884 i.Rd.b = Rd;
885 i.imm19.b = Simm19;
886 ii(i.w);
887}
888
889static void
890_oc19(jit_state_t *_jit, jit_int32_t Op, jit_int32_t Cc, jit_int32_t Simm19)
891{
892 instr_t i;
893 assert(!(Cc & ~0xf));
894 assert(Simm19 >= -262148 && Simm19 <= 262143);
895 assert(!(Op & ~0xff000000));
896 i.w = Op;
897 i.cond2.b = Cc;
898 i.imm19.b = Simm19;
899 ii(i.w);
900}
901
902static void
903_o26(jit_state_t *_jit, jit_int32_t Op, jit_int32_t Simm26)
904{
905 instr_t i;
906 assert(Simm26 >= -33554432 && Simm26 <= 33554431);
907 assert(!(Op & ~0xfc000000));
908 i.w = Op;
909 i.imm26.b = Simm26;
910 ii(i.w);
911}
912
913static void
914_ox_x(jit_state_t *_jit, jit_int32_t Op, jit_int32_t Rd, jit_int32_t Rm)
915{
916 instr_t i;
917 assert(!(Rd & ~0x1f));
918 assert(!(Rm & ~0x1f));
919 assert(!(Op & ~0xffe0ffe0));
920 i.w = Op;
921 i.Rd.b = Rd;
922 i.Rm.b = Rm;
923 ii(i.w);
924}
925
926static void
927_o_xx(jit_state_t *_jit, jit_int32_t Op, jit_int32_t Rd, jit_int32_t Rn)
928{
929 instr_t i;
930 assert(!(Rd & ~0x1f));
931 assert(!(Rn & ~0x1f));
932 assert(!(Op & ~0xfffffc00));
933 i.w = Op;
934 i.Rd.b = Rd;
935 i.Rn.b = Rn;
936 ii(i.w);
937}
938
939static void
940_oxx_(jit_state_t *_jit, jit_int32_t Op, jit_int32_t Rn, jit_int32_t Rm)
941{
942 instr_t i;
943 assert(!(Rn & ~0x1f));
944 assert(!(Rm & ~0x1f));
945 assert(!(Op & ~0xffc0fc1f));
946 i.w = Op;
947 i.Rn.b = Rn;
948 i.Rm.b = Rm;
949 ii(i.w);
950}
951
952static void
953_o_x_(jit_state_t *_jit, jit_int32_t Op, jit_int32_t Rn)
954{
955 instr_t i;
956 assert(!(Rn & ~0x1f));
957 assert(!(Op & 0x3e0));
958 i.w = Op;
959 i.Rn.b = Rn;
960 ii(i.w);
961}
962
963static void
964_ox_h(jit_state_t *_jit, jit_int32_t Op, jit_int32_t Rd, jit_int32_t Imm16)
965{
966 instr_t i;
967 assert(!(Rd & ~0x1f));
968 assert(!(Imm16 & ~0xffff));
969 assert(!(Op & ~0xffe00000));
970 i.w = Op;
971 i.Rd.b = Rd;
972 i.imm16.b = Imm16;
973 ii(i.w);
974}
975
976static void
977_oxxrs(jit_state_t *_jit, jit_int32_t Op,
978 jit_int32_t Rd, jit_int32_t Rn, jit_int32_t R, jit_int32_t S)
979{
980 instr_t i;
981 assert(!(Rd & ~0x1f));
982 assert(!(Rn & ~0x1f));
983 assert(!(R & ~0x3f));
984 assert(!(S & ~0x3f));
985 assert(!(Op & ~0xffc00000));
986 i.w = Op;
987 i.Rd.b = Rd;
988 i.Rn.b = Rn;
989 i.immr.b = R;
990 i.imms.b = S;
991 ii(i.w);
992}
993
994static void
995_oxxxc(jit_state_t *_jit, jit_int32_t Op,
996 jit_int32_t Rd, jit_int32_t Rn, jit_int32_t Rm, jit_int32_t Cc)
997{
998 instr_t i;
999 assert(!(Rd & ~0x1f));
1000 assert(!(Rn & ~0x1f));
1001 assert(!(Rm & ~0x1f));
1002 assert(!(Cc & ~0xf));
1003 assert(!(Op & ~0xffc00c00));
1004 i.w = Op;
1005 i.Rd.b = Rd;
1006 i.Rn.b = Rn;
1007 i.Rm.b = Rm;
1008 i.cond.b = Cc;
1009 ii(i.w);
1010}
1011
1012static void
1013_oxxx7(jit_state_t *_jit, jit_int32_t Op,
1014 jit_int32_t Rt, jit_int32_t Rt2, jit_int32_t Rn, jit_int32_t Simm7)
1015{
1016 instr_t i;
1017 assert(!(Rt & ~0x1f));
1018 assert(!(Rt2 & ~0x1f));
1019 assert(!(Rn & ~0x1f));
1020 assert(Simm7 >= -128 && Simm7 <= 127);
1021 assert(!(Op & ~0xffc003e0));
1022 i.w = Op;
1023 i.Rt.b = Rt;
1024 i.Rt2.b = Rt2;
1025 i.Rn.b = Rn;
1026 i.imm7.b = Simm7;
1027 ii(i.w);
1028}
1029
1030static void
1031_nop(jit_state_t *_jit, jit_int32_t i0)
1032{
1033 for (; i0 > 0; i0 -= 4)
1034 NOP();
1035 assert(i0 == 0);
1036}
1037
1038static void
1039_addi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1040{
1041 jit_int32_t reg;
1042 jit_word_t is = i0 >> 12;
1043 jit_word_t in = -i0;
1044 jit_word_t iS = in >> 12;
1045 if ( i0 >= 0 && i0 <= 0xfff)
1046 ADDI (r0, r1, i0);
1047 else if ((is << 12) == i0 && is >= 0 && is <= 0xfff)
1048 ADDI_12(r0, r1, is);
1049 else if ( in >= 0 && in <= 0xfff)
1050 SUBI (r0, r1, in);
1051 else if ((iS << 12) == is && iS >= 0 && iS <= 0xfff)
1052 SUBI_12(r0, r1, iS);
1053 else {
1054 reg = jit_get_reg(jit_class_gpr);
1055 movi(rn(reg), i0);
1056 addr(r0, r1, rn(reg));
1057 jit_unget_reg(reg);
1058 }
1059}
1060
1061static void
1062_addci(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1063{
1064 jit_int32_t reg;
1065 jit_word_t is = i0 >> 12;
1066 jit_word_t in = -i0;
1067 jit_word_t iS = in >> 12;
1068 if ( i0 >= 0 && i0 <= 0xfff)
1069 ADDSI (r0, r1, i0);
1070 else if ((is << 12) == i0 && is >= 0 && is <= 0xfff)
1071 ADDSI_12(r0, r1, is);
1072 else if ( in >= 0 && in <= 0xfff)
1073 SUBSI (r0, r1, in);
1074 else if ((iS << 12) == is && iS >= 0 && iS <= 0xfff)
1075 SUBSI_12(r0, r1, iS);
1076 else {
1077 reg = jit_get_reg(jit_class_gpr);
1078 movi(rn(reg), i0);
1079 addcr(r0, r1, rn(reg));
1080 jit_unget_reg(reg);
1081 }
1082}
1083
1084static void
1085_addxi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1086{
1087 jit_int32_t reg;
1088 reg = jit_get_reg(jit_class_gpr);
1089 movi(rn(reg), i0);
1090 addxr(r0, r1, rn(reg));
1091 jit_unget_reg(reg);
1092}
1093
1094static void
1095_subi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1096{
1097 jit_int32_t reg;
1098 jit_word_t is = i0 >> 12;
1099 if ( i0 >= 0 && i0 <= 0xfff)
1100 SUBI (r0, r1, i0);
1101 else if ((is << 12) == i0 && is >= 0 && is <= 0xfff)
1102 SUBI_12(r0, r1, is);
1103 else {
1104 reg = jit_get_reg(jit_class_gpr);
1105 movi(rn(reg), i0);
1106 subr(r0, r1, rn(reg));
1107 jit_unget_reg(reg);
1108 }
1109}
1110
1111static void
1112_subci(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1113{
1114 jit_int32_t reg;
1115 jit_word_t is = i0 >> 12;
1116 if ( i0 >= 0 && i0 <= 0xfff)
1117 SUBSI (r0, r1, i0);
1118 else if ((is << 12) == i0 && is >= 0 && is <= 0xfff)
1119 SUBSI_12(r0, r1, is);
1120 else {
1121 reg = jit_get_reg(jit_class_gpr);
1122 movi(rn(reg), i0);
1123 subcr(r0, r1, rn(reg));
1124 jit_unget_reg(reg);
1125 }
1126}
1127
1128static void
1129_subxi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1130{
1131 jit_int32_t reg;
1132 reg = jit_get_reg(jit_class_gpr);
1133 movi(rn(reg), i0);
1134 subxr(r0, r1, rn(reg));
1135 jit_unget_reg(reg);
1136}
1137
1138static void
1139_rsbi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1140{
1141 subi(r0, r1, i0);
1142 negr(r0, r0);
1143}
1144
1145static void
1146_muli(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1147{
1148 jit_int32_t reg;
1149 reg = jit_get_reg(jit_class_gpr);
1150 movi(rn(reg), i0);
1151 mulr(r0, r1, rn(reg));
1152 jit_unget_reg(reg);
1153}
1154
1155static void
1156_qmulr(jit_state_t *_jit, jit_int32_t r0,
1157 jit_int32_t r1, jit_int32_t r2, jit_int32_t r3)
1158{
1159 jit_int32_t reg;
1160 if (r0 == r2 || r0 == r3) {
1161 reg = jit_get_reg(jit_class_gpr);
1162 mulr(rn(reg), r2, r3);
1163 }
1164 else
1165 mulr(r0, r2, r3);
1166 SMULH(r1, r2, r3);
1167 if (r0 == r2 || r0 == r3) {
1168 movr(r0, rn(reg));
1169 jit_unget_reg(reg);
1170 }
1171}
1172
1173static void
1174_qmuli(jit_state_t *_jit, jit_int32_t r0,
1175 jit_int32_t r1, jit_int32_t r2, jit_word_t i0)
1176{
1177 jit_int32_t reg;
1178 reg = jit_get_reg(jit_class_gpr);
1179 movi(rn(reg), i0);
1180 qmulr(r0, r1, r2, rn(reg));
1181 jit_unget_reg(reg);
1182}
1183
1184static void
1185_qmulr_u(jit_state_t *_jit, jit_int32_t r0,
1186 jit_int32_t r1, jit_int32_t r2, jit_int32_t r3)
1187{
1188 jit_int32_t reg;
1189 if (r0 == r2 || r0 == r3) {
1190 reg = jit_get_reg(jit_class_gpr);
1191 mulr(rn(reg), r2, r3);
1192 }
1193 else
1194 mulr(r0, r2, r3);
1195 UMULH(r1, r2, r3);
1196 if (r0 == r2 || r0 == r3) {
1197 movr(r0, rn(reg));
1198 jit_unget_reg(reg);
1199 }
1200}
1201
1202static void
1203_qmuli_u(jit_state_t *_jit, jit_int32_t r0,
1204 jit_int32_t r1, jit_int32_t r2, jit_word_t i0)
1205{
1206 jit_int32_t reg;
1207 reg = jit_get_reg(jit_class_gpr);
1208 movi(rn(reg), i0);
1209 qmulr_u(r0, r1, r2, rn(reg));
1210 jit_unget_reg(reg);
1211}
1212
1213static void
1214_divi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1215{
1216 jit_int32_t reg;
1217 reg = jit_get_reg(jit_class_gpr);
1218 movi(rn(reg), i0);
1219 divr(r0, r1, rn(reg));
1220 jit_unget_reg(reg);
1221}
1222
1223static void
1224_divi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1225{
1226 jit_int32_t reg;
1227 reg = jit_get_reg(jit_class_gpr);
1228 movi(rn(reg), i0);
1229 divr_u(r0, r1, rn(reg));
1230 jit_unget_reg(reg);
1231}
1232
1233static void
1234_iqdivr(jit_state_t *_jit, jit_bool_t sign,
1235 jit_int32_t r0, jit_int32_t r1, jit_int32_t r2, jit_int32_t r3)
1236{
1237 jit_int32_t sv0, rg0;
1238 jit_int32_t sv1, rg1;
1239 if (r0 == r2 || r0 == r3) {
1240 sv0 = jit_get_reg(jit_class_gpr);
1241 rg0 = rn(sv0);
1242 }
1243 else
1244 rg0 = r0;
1245 if (r1 == r2 || r1 == r3) {
1246 sv1 = jit_get_reg(jit_class_gpr);
1247 rg1 = rn(sv1);
1248 }
1249 else
1250 rg1 = r1;
1251 if (sign)
1252 divr(rg0, r2, r3);
1253 else
1254 divr_u(rg0, r2, r3);
1255 mulr(rg1, r3, rg0);
1256 subr(rg1, r2, rg1);
1257 if (rg0 != r0) {
1258 movr(r0, rg0);
1259 jit_unget_reg(sv0);
1260 }
1261 if (rg1 != r1) {
1262 movr(r1, rg1);
1263 jit_unget_reg(sv1);
1264 }
1265}
1266
1267static void
1268_qdivi(jit_state_t *_jit, jit_int32_t r0,
1269 jit_int32_t r1, jit_int32_t r2, jit_word_t i0)
1270{
1271 jit_int32_t reg;
1272 reg = jit_get_reg(jit_class_gpr);
1273 movi(rn(reg), i0);
1274 qdivr(r0, r1, r2, rn(reg));
1275 jit_unget_reg(reg);
1276}
1277
1278static void
1279_qdivi_u(jit_state_t *_jit, jit_int32_t r0,
1280 jit_int32_t r1, jit_int32_t r2, jit_word_t i0)
1281{
1282 jit_int32_t reg;
1283 reg = jit_get_reg(jit_class_gpr);
1284 movi(rn(reg), i0);
1285 qdivr_u(r0, r1, r2, rn(reg));
1286 jit_unget_reg(reg);
1287}
1288
1289static void
1290_remr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1291{
1292 jit_int32_t reg;
1293 if (r0 == r1 || r0 == r2) {
1294 reg = jit_get_reg(jit_class_gpr);
1295 divr(rn(reg), r1, r2);
1296 mulr(rn(reg), r2, rn(reg));
1297 subr(r0, r1, rn(reg));
1298 jit_unget_reg(reg);
1299 }
1300 else {
1301 divr(r0, r1, r2);
1302 mulr(r0, r2, r0);
1303 subr(r0, r1, r0);
1304 }
1305}
1306
1307static void
1308_remi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1309{
1310 jit_int32_t reg;
1311 reg = jit_get_reg(jit_class_gpr);
1312 movi(rn(reg), i0);
1313 remr(r0, r1, rn(reg));
1314 jit_unget_reg(reg);
1315}
1316
1317static void
1318_remr_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1319{
1320 jit_int32_t reg;
1321 if (r0 == r1 || r0 == r2) {
1322 reg = jit_get_reg(jit_class_gpr);
1323 divr_u(rn(reg), r1, r2);
1324 mulr(rn(reg), r2, rn(reg));
1325 subr(r0, r1, rn(reg));
1326 jit_unget_reg(reg);
1327 }
1328 else {
1329 divr_u(r0, r1, r2);
1330 mulr(r0, r2, r0);
1331 subr(r0, r1, r0);
1332 }
1333}
1334
1335static void
1336_remi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1337{
1338 jit_int32_t reg;
1339 reg = jit_get_reg(jit_class_gpr);
1340 movi(rn(reg), i0);
1341 remr_u(r0, r1, rn(reg));
1342 jit_unget_reg(reg);
1343}
1344
1345static void
1346_lshi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1347{
1348 if (i0 == 0)
1349 movr(r0, r1);
1350 else {
1351 assert(i0 > 0 && i0 < 64);
1352 LSLI(r0, r1, i0);
1353 }
1354}
1355
1356static void
1357_rshi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1358{
1359 if (i0 == 0)
1360 movr(r0, r1);
1361 else {
1362 assert(i0 > 0 && i0 < 64);
1363 ASRI(r0, r1, i0);
1364 }
1365}
1366
1367static void
1368_rshi_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1369{
1370 if (i0 == 0)
1371 movr(r0, r1);
1372 else {
1373 assert(i0 > 0 && i0 < 64);
1374 LSRI(r0, r1, i0);
1375 }
1376}
1377
e0659411
PC		 1378static void
1379_movnr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1380{
1381 CMPI(r2, 0);
1382 CSEL(r0, r0, r1, CC_NE);
1383}
1384
1385static void
1386_movzr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1387{
1388 CMPI(r2, 0);
1389 CSEL(r0, r0, r1, CC_EQ);
1390}
1391
4a71579b
PC		 1392static void
1393_andi(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1394{
1395 jit_int32_t reg;
1396 jit_int32_t imm;
1397 if (i0 == 0)
1398 movi(r0, 0);
1399 else if (i0 == -1)
1400 movr(r0, r1);
1401 else {
1402 imm = logical_immediate(i0);
1403 if (imm != -1)
1404 ANDI(r0, r1, imm);
1405 else {
1406 reg = jit_get_reg(jit_class_gpr);
1407 movi(rn(reg), i0);
1408 andr(r0, r1, rn(reg));
1409 jit_unget_reg(reg);
1410 }
1411 }
1412}
1413
1414static void
1415_ori(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1416{
1417 jit_int32_t reg;
1418 jit_int32_t imm;
1419 if (i0 == 0)
1420 movr(r0, r1);
1421 else if (i0 == -1)
1422 movi(r0, -1);
1423 else {
1424 imm = logical_immediate(i0);
1425 if (imm != -1)
1426 ORRI(r0, r1, imm);
1427 else {
1428 reg = jit_get_reg(jit_class_gpr);
1429 movi(rn(reg), i0);
1430 orr(r0, r1, rn(reg));
1431 jit_unget_reg(reg);
1432 }
1433 }
1434}
1435
1436static void
1437_xori(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1438{
1439 jit_int32_t reg;
1440 jit_int32_t imm;
1441 if (i0 == 0)
1442 movr(r0, r1);
1443 else if (i0 == -1)
1444 comr(r0, r1);
1445 else {
1446 imm = logical_immediate(i0);
1447 if (imm != -1)
1448 EORI(r0, r1, imm);
1449 else {
1450 reg = jit_get_reg(jit_class_gpr);
1451 movi(rn(reg), i0);
1452 xorr(r0, r1, rn(reg));
1453 jit_unget_reg(reg);
1454 }
1455 }
1456}
1457
4a71579b 1458static void
40a44dcb 1459_bswapr_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
4a71579b 1460{
40a44dcb 1461 bswapr_ul(r0, r1);
4a71579b
PC		 1462 rshi_u(r0, r0, 48);
1463}
1464
1465static void
40a44dcb 1466_bswapr_ui(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
4a71579b 1467{
40a44dcb 1468 bswapr_ul(r0, r1);
4a71579b
PC		 1469 rshi_u(r0, r0, 32);
1470}
4a71579b
PC		 1471
1472static void
1473_ldi_c(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
1474{
1475 jit_int32_t reg;
1476 reg = jit_get_reg(jit_class_gpr);
1477 movi(rn(reg), i0);
1478 ldr_c(r0, rn(reg));
1479 jit_unget_reg(reg);
1480}
1481
1482static void
1483_ldr_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
1484{
1485 LDRBI(r0, r1, 0);
1486#if 0
1487 extr_uc(r0, r0);
1488#endif
1489}
1490
1491static void
1492_ldi_uc(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
1493{
1494 jit_int32_t reg;
1495 reg = jit_get_reg(jit_class_gpr);
1496 movi(rn(reg), i0);
1497 ldr_uc(r0, rn(reg));
1498 jit_unget_reg(reg);
1499}
1500
1501static void
1502_ldi_s(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
1503{
1504 jit_int32_t reg;
1505 reg = jit_get_reg(jit_class_gpr);
1506 movi(rn(reg), i0);
1507 ldr_s(r0, rn(reg));
1508 jit_unget_reg(reg);
1509}
1510
1511static void
1512_ldr_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
1513{
1514 LDRHI(r0, r1, 0);
1515#if 0
1516 extr_us(r0, r0);
1517#endif
1518}
1519
1520static void
1521_ldi_us(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
1522{
1523 jit_int32_t reg;
1524 reg = jit_get_reg(jit_class_gpr);
1525 movi(rn(reg), i0);
1526 ldr_us(r0, rn(reg));
1527 jit_unget_reg(reg);
1528}
1529
1530static void
1531_ldi_i(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
1532{
1533 jit_int32_t reg;
1534 reg = jit_get_reg(jit_class_gpr);
1535 movi(rn(reg), i0);
1536 ldr_i(r0, rn(reg));
1537 jit_unget_reg(reg);
1538}
1539
1540static void
1541_ldr_ui(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
1542{
1543 LDRWI(r0, r1, 0);
1544#if 0
1545 extr_ui(r0, r0);
1546#endif
1547}
1548
1549static void
1550_ldi_ui(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
1551{
1552 jit_int32_t reg;
1553 reg = jit_get_reg(jit_class_gpr);
1554 movi(rn(reg), i0);
1555 ldr_ui(r0, rn(reg));
1556 jit_unget_reg(reg);
1557}
1558
1559static void
1560_ldi_l(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
1561{
1562 jit_int32_t reg;
1563 reg = jit_get_reg(jit_class_gpr);
1564 movi(rn(reg), i0);
1565 ldr_l(r0, rn(reg));
1566 jit_unget_reg(reg);
1567}
1568
1569static void
1570_ldxr_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1571{
1572 LDRSB(r0, r1, r2);
1573 extr_c(r0, r0);
1574}
1575
1576static void
1577_ldxi_c(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1578{
1579 jit_int32_t reg;
1580 if (i0 >= 0 && i0 <= 4095)
1581 LDRSBI(r0, r1, i0);
1582 else if (i0 > -256 && i0 < 0)
1583 LDURSB(r0, r1, i0 & 0x1ff);
1584 else {
1585 reg = jit_get_reg(jit_class_gpr);
1586 movi(rn(reg), i0);
1587 LDRSB(r0, r1, rn(reg));
1588 jit_unget_reg(reg);
1589 }
1590 extr_c(r0, r0);
1591}
1592
1593static void
1594_ldxr_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1595{
1596 LDRB(r0, r1, r2);
1597#if 0
1598 extr_uc(r0, r0);
1599#endif
1600}
1601
1602static void
1603_ldxi_uc(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1604{
1605 jit_int32_t reg;
1606 if (i0 >= 0 && i0 <= 4095)
1607 LDRBI(r0, r1, i0);
1608 else if (i0 > -256 && i0 < 0)
1609 LDURB(r0, r1, i0 & 0x1ff);
1610 else {
1611 reg = jit_get_reg(jit_class_gpr);
1612 addi(rn(reg), r1, i0);
1613 ldr_uc(r0, rn(reg));
1614 jit_unget_reg(reg);
1615 }
1616#if 0
1617 extr_uc(r0, r0);
1618#endif
1619}
1620
1621static void
1622_ldxi_s(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1623{
1624 jit_int32_t reg;
519a9ea1 1625 if (i0 >= 0 && i0 <= 8191 && !(i0 & 1))
4a71579b
PC		 1626 LDRSHI(r0, r1, i0 >> 1);
1627 else if (i0 > -256 && i0 < 0)
1628 LDURSH(r0, r1, i0 & 0x1ff);
1629 else {
1630 reg = jit_get_reg(jit_class_gpr);
1631 movi(rn(reg), i0);
1632 LDRSH(r0, r1, rn(reg));
1633 jit_unget_reg(reg);
1634 }
1635}
1636
1637static void
1638_ldxr_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1639{
1640 LDRH(r0, r1, r2);
1641#if 0
1642 extr_us(r0, r0);
1643#endif
1644}
1645
1646static void
1647_ldxi_us(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1648{
1649 jit_int32_t reg;
519a9ea1 1650 if (i0 >= 0 && i0 <= 8191 && !(i0 & 1))
4a71579b
PC		 1651 LDRHI(r0, r1, i0 >> 1);
1652 else if (i0 > -256 && i0 < 0)
1653 LDURH(r0, r1, i0 & 0x1ff);
1654 else {
1655 reg = jit_get_reg(jit_class_gpr);
1656 movi(rn(reg), i0);
1657 LDRH(r0, r1, rn(reg));
1658 jit_unget_reg(reg);
1659 }
1660#if 0
1661 extr_us(r0, r0);
1662#endif
1663}
1664
1665static void
1666_ldxi_i(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1667{
1668 jit_int32_t reg;
519a9ea1 1669 if (i0 >= 0 && i0 <= 16383 && !(i0 & 3))
4a71579b
PC		 1670 LDRSWI(r0, r1, i0 >> 2);
1671 else if (i0 > -256 && i0 < 0)
1672 LDURSW(r0, r1, i0 & 0x1ff);
1673 else {
1674 reg = jit_get_reg(jit_class_gpr);
1675 addi(rn(reg), r1, i0);
1676 ldr_i(r0, rn(reg));
1677 jit_unget_reg(reg);
1678 }
1679}
1680
1681static void
1682_ldxr_ui(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1683{
1684 LDRW(r0, r1, r2);
1685#if 0
1686 extr_ui(r0, r0);
1687#endif
1688}
1689
1690static void
1691_ldxi_ui(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1692{
1693 jit_int32_t reg;
519a9ea1 1694 if (i0 >= 0 && i0 <= 16383 && !(i0 & 3))
4a71579b
PC		 1695 LDRWI(r0, r1, i0 >> 2);
1696 else if (i0 > -256 && i0 < 0)
1697 LDURW(r0, r1, i0 & 0x1ff);
1698 else {
1699 reg = jit_get_reg(jit_class_gpr);
1700 movi(rn(reg), i0);
1701 LDRW(r0, r1, rn(reg));
1702 jit_unget_reg(reg);
1703 }
1704#if 0
1705 extr_ui(r0, r0);
1706#endif
1707}
1708
1709static void
1710_ldxi_l(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1711{
1712 jit_int32_t reg;
519a9ea1 1713 if (i0 >= 0 && i0 <= 32767 && !(i0 & 7))
4a71579b
PC		 1714 LDRI(r0, r1, i0 >> 3);
1715 else if (i0 > -256 && i0 < 0)
1716 LDUR(r0, r1, i0 & 0x1ff);
1717 else {
1718 reg = jit_get_reg(jit_class_gpr);
1719 addi(rn(reg), r1, i0);
1720 ldr_l(r0, rn(reg));
1721 jit_unget_reg(reg);
1722 }
1723}
1724
1725static void
1726_sti_c(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
1727{
1728 jit_int32_t reg;
1729 reg = jit_get_reg(jit_class_gpr);
1730 movi(rn(reg), i0);
1731 str_c(rn(reg), r0);
1732 jit_unget_reg(reg);
1733}
1734
1735static void
1736_sti_s(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
1737{
1738 jit_int32_t reg;
1739 reg = jit_get_reg(jit_class_gpr);
1740 movi(rn(reg), i0);
1741 str_s(rn(reg), r0);
1742 jit_unget_reg(reg);
1743}
1744
1745static void
1746_sti_i(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
1747{
1748 jit_int32_t reg;
1749 reg = jit_get_reg(jit_class_gpr);
1750 movi(rn(reg), i0);
1751 str_i(rn(reg), r0);
1752 jit_unget_reg(reg);
1753}
1754
1755static void
1756_sti_l(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0)
1757{
1758 jit_int32_t reg;
1759 reg = jit_get_reg(jit_class_gpr);
1760 movi(rn(reg), i0);
1761 str_l(rn(reg), r0);
1762 jit_unget_reg(reg);
1763}
1764
1765static void
1766_stxi_c(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
1767{
1768 jit_int32_t reg;
1769 if (i0 >= 0 && i0 <= 4095)
1770 STRBI(r1, r0, i0);
1771 else if (i0 > -256 && i0 < 0)
1772 STURB(r1, r0, i0 & 0x1ff);
1773 else {
1774 reg = jit_get_reg(jit_class_gpr);
1775 addi(rn(reg), r0, i0);
1776 str_c(rn(reg), r1);
1777 jit_unget_reg(reg);
1778 }
1779}
1780
1781static void
1782_stxi_s(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
1783{
1784 jit_int32_t reg;
519a9ea1 1785 if (i0 >= 0 && i0 <= 8191 && !(i0 & 1))
4a71579b
PC		 1786 STRHI(r1, r0, i0 >> 1);
1787 else if (i0 > -256 && i0 < 0)
1788 STURH(r1, r0, i0 & 0x1ff);
1789 else {
1790 reg = jit_get_reg(jit_class_gpr);
1791 addi(rn(reg), r0, i0);
1792 str_s(rn(reg), r1);
1793 jit_unget_reg(reg);
1794 }
1795}
1796
1797static void
1798_stxi_i(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
1799{
1800 jit_int32_t reg;
519a9ea1 1801 if (i0 >= 0 && i0 <= 16383 && !(i0 & 3))
4a71579b
PC		 1802 STRWI(r1, r0, i0 >> 2);
1803 else if (i0 > -256 && i0 < 0)
1804 STURW(r1, r0, i0 & 0x1ff);
1805 else {
1806 reg = jit_get_reg(jit_class_gpr);
1807 addi(rn(reg), r0, i0);
1808 str_i(rn(reg), r1);
1809 jit_unget_reg(reg);
1810 }
1811}
1812
1813static void
1814_stxi_l(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
1815{
1816 jit_int32_t reg;
519a9ea1 1817 if (i0 >= 0 && i0 <= 32767 && !(i0 & 7))
4a71579b
PC		 1818 STRI(r1, r0, i0 >> 3);
1819 else if (i0 > -256 && i0 < 0)
1820 STUR(r1, r0, i0 & 0x1ff);
1821 else {
1822 reg = jit_get_reg(jit_class_gpr);
1823 addi(rn(reg), r0, i0);
1824 str_l(rn(reg), r1);
1825 jit_unget_reg(reg);
1826 }
1827}
1828
1829static void
1830_movr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
1831{
1832 if (r0 != r1)
1833 MOV(r0, r1);
1834}
1835
1836static void
1837_movi(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
1838{
1839 jit_word_t n0, ibit, nbit;
1840 n0 = ~i0;
1841 ibit = nbit = 0;
1842 if (i0 & 0x000000000000ffffL) ibit |= 1;
1843 if (i0 & 0x00000000ffff0000L) ibit |= 2;
1844 if (i0 & 0x0000ffff00000000L) ibit |= 4;
1845 if (i0 & 0xffff000000000000L) ibit |= 8;
1846 if (n0 & 0x000000000000ffffL) nbit |= 1;
1847 if (n0 & 0x00000000ffff0000L) nbit |= 2;
1848 if (n0 & 0x0000ffff00000000L) nbit |= 4;
1849 if (n0 & 0xffff000000000000L) nbit |= 8;
1850 switch (ibit) {
1851 case 0:
1852 MOVZ (r0, 0);
1853 break;
1854 case 1:
1855 MOVZ (r0, i0 & 0xffff);
1856 break;
1857 case 2:
1858 MOVZ_16(r0, (i0 >> 16) & 0xffff);
1859 break;
1860 case 3:
1861 MOVZ (r0, i0 & 0xffff);
1862 MOVK_16(r0, (i0 >> 16) & 0xffff);
1863 break;
1864 case 4:
1865 MOVZ_32(r0, (i0 >> 32) & 0xffff);
1866 break;
1867 case 5:
1868 MOVZ (r0, i0 & 0xffff);
1869 MOVK_32(r0, (i0 >> 32) & 0xffff);
1870 break;
1871 case 6:
1872 MOVZ_16(r0, (i0 >> 16) & 0xffff);
1873 MOVK_32(r0, (i0 >> 32) & 0xffff);
1874 break;
1875 case 7:
1876 if (nbit == 8)
1877 MOVN_48(r0, (n0 >> 48) & 0xffff);
1878 else {
1879 MOVZ (r0, i0 & 0xffff);
1880 MOVK_16(r0, (i0 >> 16) & 0xffff);
1881 MOVK_32(r0, (i0 >> 32) & 0xffff);
1882 }
1883 break;
1884 case 8:
1885 MOVZ_48(r0, (i0 >> 48) & 0xffff);
1886 break;
1887 case 9:
1888 MOVZ (r0, i0 & 0xffff);
1889 MOVK_48(r0, (i0 >> 48) & 0xffff);
1890 break;
1891 case 10:
1892 MOVZ_16(r0, (i0 >> 16) & 0xffff);
1893 MOVK_48(r0, (i0 >> 48) & 0xffff);
1894 break;
1895 case 11:
1896 if (nbit == 4)
1897 MOVN_32(r0, (n0 >> 32) & 0xffff);
1898 else {
1899 MOVZ (r0, i0 & 0xffff);
1900 MOVK_16(r0, (i0 >> 16) & 0xffff);
1901 MOVK_48(r0, (i0 >> 48) & 0xffff);
1902 }
1903 break;
1904 case 12:
1905 MOVZ_32(r0, (i0 >> 32) & 0xffff);
1906 MOVK_48(r0, (i0 >> 48) & 0xffff);
1907 break;
1908 case 13:
1909 if (nbit == 2)
1910 MOVN_16(r0, (n0 >> 16) & 0xffff);
1911 else {
1912 MOVZ (r0, i0 & 0xffff);
1913 MOVK_32(r0, (i0 >> 32) & 0xffff);
1914 MOVK_48(r0, (i0 >> 48) & 0xffff);
1915 }
1916 break;
1917 case 14:
1918 if (nbit == 1)
1919 MOVN (r0, (n0) & 0xffff);
1920 else {
1921 MOVZ_16(r0, (i0 >> 16) & 0xffff);
1922 MOVK_32(r0, (i0 >> 32) & 0xffff);
1923 MOVK_48(r0, (i0 >> 48) & 0xffff);
1924 }
1925 break;
1926 case 15:
1927 if (nbit == 0)
1928 MOVN (r0, 0);
1929 else if (nbit == 1)
1930 MOVN (r0, n0 & 0xffff);
1931 else if (nbit == 8)
1932 MOVN_48(r0, (n0 >> 48) & 0xffff);
1933 else {
1934 MOVZ (r0, i0 & 0xffff);
1935 MOVK_16(r0, (i0 >> 16) & 0xffff);
1936 MOVK_32(r0, (i0 >> 32) & 0xffff);
1937 MOVK_48(r0, (i0 >> 48) & 0xffff);
1938 }
1939 break;
1940 default:
1941 abort();
1942 }
1943}
1944
1945static jit_word_t
1946_movi_p(jit_state_t *_jit, jit_int32_t r0, jit_word_t i0)
1947{
1948 jit_word_t w;
1949 w = _jit->pc.w;
1950 MOVZ (r0, i0 & 0xffff);
1951 MOVK_16(r0, (i0 >> 16) & 0xffff);
1952 MOVK_32(r0, (i0 >> 32) & 0xffff);
1953 MOVK_48(r0, (i0 >> 48) & 0xffff);
1954 return (w);
1955}
1956
1957static void
1958_ccr(jit_state_t *_jit, jit_int32_t cc,
1959 jit_int32_t r0, jit_int32_t r1, jit_int32_t r2)
1960{
1961 CMP(r1, r2);
1962 CSET(r0, cc);
1963}
1964
1965static void
1966_cci(jit_state_t *_jit, jit_int32_t cc,
1967 jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
1968{
1969 jit_int32_t reg;
1970 jit_word_t is = i0 >> 12;
1971 jit_word_t in = -i0;
1972 jit_word_t iS = in >> 12;
1973 if ( i0 >= 0 && i0 <= 0xfff)
1974 CMPI (r1, i0);
1975 else if ((is << 12) == i0 && is >= 0 && is <= 0xfff)
1976 CMPI_12(r1, is);
1977 else if ( in >= 0 && in <= 0xfff)
1978 CMNI (r1, in);
1979 else if ((iS << 12) == is && iS >= 0 && iS <= 0xfff)
1980 CMNI_12(r1, iS);
1981 else {
1982 reg = jit_get_reg(jit_class_gpr);
1983 movi(rn(reg), i0);
1984 CMP(r1, rn(reg));
1985 jit_unget_reg(reg);
1986 }
1987 CSET(r0, cc);
1988}
1989
1990static jit_word_t
1991_bccr(jit_state_t *_jit, jit_int32_t cc,
1992 jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
1993{
1994 jit_word_t w, d;
1995 CMP(r0, r1);
1996 w = _jit->pc.w;
1997 d = (i0 - w) >> 2;
1998 B_C(cc, d);
1999 return (w);
2000}
2001
2002static jit_word_t
2003_bcci(jit_state_t *_jit, jit_int32_t cc,
2004 jit_word_t i0, jit_int32_t r0, jit_word_t i1)
2005{
2006 jit_int32_t reg;
2007 jit_word_t w, d;
2008 jit_word_t is = i1 >> 12;
2009 jit_word_t in = -i1;
2010 jit_word_t iS = in >> 12;
2011 if ( i1 >= 0 && i1 <= 0xfff)
2012 CMPI (r0, i1);
2013 else if ((is << 12) == i1 && is >= 0 && is <= 0xfff)
2014 CMPI_12(r0, is);
2015 else if ( in >= 0 && in <= 0xfff)
2016 CMNI (r0, in);
2017 else if ((iS << 12) == is && iS >= 0 && iS <= 0xfff)
2018 CMNI_12(r0, iS);
2019 else {
2020 reg = jit_get_reg(jit_class_gpr);
2021 movi(rn(reg), i1);
2022 CMP(r0, rn(reg));
2023 jit_unget_reg(reg);
2024 }
2025 w = _jit->pc.w;
2026 d = (i0 - w) >> 2;
2027 B_C(cc, d);
2028 return (w);
2029}
2030
2031static jit_word_t
2032_beqi(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
2033{
2034 jit_word_t w;
2035 if (i1 == 0) {
2036 w = _jit->pc.w;
2037 CBZ(r0, (i0 - w) >> 2);
2038 }
2039 else
2040 w = bcci(BCC_EQ, i0, r0, i1);
2041 return (w);
2042}
2043
2044static jit_word_t
2045_bnei(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0, jit_word_t i1)
2046{
2047 jit_word_t w;
2048 if (i1 == 0) {
2049 w = _jit->pc.w;
2050 CBNZ(r0, (i0 - w) >> 2);
2051 }
2052 else
2053 w = bcci(BCC_NE, i0, r0, i1);
2054 return (w);
2055}
2056
2057static jit_word_t
2058_baddr(jit_state_t *_jit, jit_int32_t cc,
2059 jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
2060{
2061 jit_word_t w;
2062 addcr(r0, r0, r1);
2063 w = _jit->pc.w;
2064 B_C(cc, (i0 - w) >> 2);
2065 return (w);
2066}
2067
2068static jit_word_t
2069_baddi(jit_state_t *_jit, jit_int32_t cc,
2070 jit_word_t i0, jit_int32_t r0, jit_word_t i1)
2071{
2072 jit_word_t w;
2073 addci(r0, r0, i1);
2074 w = _jit->pc.w;
2075 B_C(cc, (i0 - w) >> 2);
2076 return (w);
2077}
2078
2079static jit_word_t
2080_bsubr(jit_state_t *_jit, jit_int32_t cc,
2081 jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
2082{
2083 jit_word_t w;
2084 subcr(r0, r0, r1);
2085 w = _jit->pc.w;
2086 B_C(cc, (i0 - w) >> 2);
2087 return (w);
2088}
2089
2090static jit_word_t
2091_bsubi(jit_state_t *_jit, jit_int32_t cc,
2092 jit_word_t i0, jit_int32_t r0, jit_word_t i1)
2093{
2094 jit_word_t w;
2095 subci(r0, r0, i1);
2096 w = _jit->pc.w;
2097 B_C(cc, (i0 - w) >> 2);
2098 return (w);
2099}
2100
2101static jit_word_t
2102_bmxr(jit_state_t *_jit, jit_int32_t cc,
2103 jit_word_t i0, jit_int32_t r0, jit_int32_t r1)
2104{
2105 jit_word_t w;
2106 TST(r0, r1);
2107 w = _jit->pc.w;
2108 B_C(cc, (i0 - w) >> 2);
2109 return (w);
2110}
2111
2112static jit_word_t
2113_bmxi(jit_state_t *_jit, jit_int32_t cc,
2114 jit_word_t i0, jit_int32_t r0, jit_word_t i1)
2115{
2116 jit_word_t w;
2117 jit_int32_t reg;
2118 jit_int32_t imm;
2119 imm = logical_immediate(i1);
2120 if (imm != -1)
2121 TSTI(r0, imm);
2122 else {
2123 reg = jit_get_reg(jit_class_gpr);
2124 movi(rn(reg), i1);
2125 TST(r0, rn(reg));
2126 jit_unget_reg(reg);
2127 }
2128 w = _jit->pc.w;
2129 B_C(cc, (i0 - w) >> 2);
2130 return (w);
2131}
2132
2133static void
2134_jmpi(jit_state_t *_jit, jit_word_t i0)
2135{
2136 jit_word_t w;
2137 jit_int32_t reg;
2138 w = (i0 - _jit->pc.w) >> 2;
2139 if (w >= -33554432 && w <= 33554431)
2140 B(w);
2141 else {
2142 reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
2143 movi(rn(reg), i0);
2144 jmpr(rn(reg));
2145 jit_unget_reg(reg);
2146 }
2147}
2148
2149static jit_word_t
2150_jmpi_p(jit_state_t *_jit, jit_word_t i0)
2151{
2152 jit_word_t w;
2153 jit_int32_t reg;
2154 reg = jit_get_reg(jit_class_gpr|jit_class_nospill);
2155 w = movi_p(rn(reg), i0);
2156 jmpr(rn(reg));
2157 jit_unget_reg(reg);
2158 return (w);
2159}
2160
2161static void
2162_calli(jit_state_t *_jit, jit_word_t i0)
2163{
2164 jit_word_t w;
2165 jit_int32_t reg;
2166 w = (i0 - _jit->pc.w) >> 2;
2167 if (w >= -33554432 && w <= 33554431)
2168 BL(w);
2169 else {
2170 reg = jit_get_reg(jit_class_gpr);
2171 movi(rn(reg), i0);
2172 callr(rn(reg));
2173 jit_unget_reg(reg);
2174 }
2175}
2176
2177static jit_word_t
2178_calli_p(jit_state_t *_jit, jit_word_t i0)
2179{
2180 jit_word_t w;
2181 jit_int32_t reg;
2182 reg = jit_get_reg(jit_class_gpr);
2183 w = movi_p(rn(reg), i0);
2184 callr(rn(reg));
2185 jit_unget_reg(reg);
2186 return (w);
2187}
2188
2189/*
2190 * prolog and epilog not as "optimized" as one would like, but the
2191 * problem of overallocating stack space to save callee save registers
2192 * exists on all ports, and is still a todo to use a variable
2193 * stack_framesize
2194 * value, what would cause needing to patch some calls, most likely
2195 * the offset of jit_arg* of stack arguments.
2196 */
2197static void
2198_prolog(jit_state_t *_jit, jit_node_t *node)
2199{
2200 jit_int32_t reg;
2201 if (_jitc->function->define_frame || _jitc->function->assume_frame) {
2202 jit_int32_t frame = -_jitc->function->frame;
2203 assert(_jitc->function->self.aoff >= frame);
2204 if (_jitc->function->assume_frame)
2205 return;
2206 _jitc->function->self.aoff = frame;
2207 }
2208 if (_jitc->function->allocar)
2209 _jitc->function->self.aoff &= -16;
2210 _jitc->function->stack = ((_jitc->function->self.alen -
2211 /* align stack at 16 bytes */
2212 _jitc->function->self.aoff) + 15) & -16;
2213 STPI_POS(FP_REGNO, LR_REGNO, SP_REGNO, -(stack_framesize >> 3));
2214 MOV_XSP(FP_REGNO, SP_REGNO);
2215#define SPILL(L, R, O) \
2216 do { \
2217 if (jit_regset_tstbit(&_jitc->function->regset, _R##L)) { \
2218 if (jit_regset_tstbit(&_jitc->function->regset, _R##R)) \
2219 STPI(L, R, SP_REGNO, O); \
2220 else \
2221 STRI(L, SP_REGNO, O); \
2222 } \
2223 else if (jit_regset_tstbit(&_jitc->function->regset, _R##R)) \
2224 STRI(R, SP_REGNO, O + 1); \
2225 } while (0)
2226 SPILL(19, 20, 2);
2227 SPILL(21, 22, 4);
2228 SPILL(23, 24, 6);
2229 SPILL(25, 26, 8);
2230 SPILL(27, 28, 10);
2231#undef SPILL
2232#define SPILL(R, O) \
2233 do { \
2234 if (jit_regset_tstbit(&_jitc->function->regset, _V##R)) \
2235 stxi_d(O, SP_REGNO, R); \
2236 } while (0)
2237 SPILL( 8, 96);
2238 SPILL( 9, 104);
2239 SPILL(10, 112);
2240 SPILL(11, 120);
2241 SPILL(12, 128);
2242 SPILL(13, 136);
2243 SPILL(14, 144);
2244 SPILL(15, 152);
2245#undef SPILL
2246 if (_jitc->function->stack)
2247 subi(SP_REGNO, SP_REGNO, _jitc->function->stack);
2248 if (_jitc->function->allocar) {
2249 reg = jit_get_reg(jit_class_gpr);
2250 movi(rn(reg), _jitc->function->self.aoff);
2251 stxi_i(_jitc->function->aoffoff, FP_REGNO, rn(reg));
2252 jit_unget_reg(reg);
2253 }
2254
2255 if (_jitc->function->self.call & jit_call_varargs) {
2256 /* Save gp registers in the save area, if any is a vararg */
2257 for (reg = 8 - _jitc->function->vagp / -8;
2258 jit_arg_reg_p(reg); ++reg)
2259 stxi(_jitc->function->vaoff + offsetof(jit_va_list_t, x0) +
2260 reg * 8, FP_REGNO, rn(JIT_RA0 - reg));
2261
2262 for (reg = 8 - _jitc->function->vafp / -16;
2263 jit_arg_f_reg_p(reg); ++reg)
2264 /* Save fp registers in the save area, if any is a vararg */
2265 /* Note that the full 16 byte register is not saved, because
2266 * lightning only handles float and double, and, while
2267 * attempting to provide a va_list compatible pointer as
2268 * jit_va_start return, does not guarantee it (on all ports). */
2269 stxi_d(_jitc->function->vaoff + offsetof(jit_va_list_t, q0) +
2270 reg * 16 + offsetof(jit_qreg_t, l), FP_REGNO, rn(_V0 - reg));
2271 }
2272}
2273
2274static void
2275_epilog(jit_state_t *_jit, jit_node_t *node)
2276{
2277 if (_jitc->function->assume_frame)
2278 return;
2279 if (_jitc->function->stack)
2280 MOV_XSP(SP_REGNO, FP_REGNO);
2281#define LOAD(L, R, O) \
2282 do { \
2283 if (jit_regset_tstbit(&_jitc->function->regset, _R##L)) { \
2284 if (jit_regset_tstbit(&_jitc->function->regset, _R##R)) \
2285 LDPI(L, R, SP_REGNO, O); \
2286 else \
2287 LDRI(L, SP_REGNO, O); \
2288 } \
2289 else if (jit_regset_tstbit(&_jitc->function->regset, _R##R)) \
2290 LDRI(R, SP_REGNO, O + 1); \
2291 } while (0)
2292 LOAD(19, 20, 2);
2293 LOAD(21, 22, 4);
2294 LOAD(23, 24, 6);
2295 LOAD(25, 26, 8);
2296 LOAD(27, 28, 10);
2297#undef LOAD
2298#define LOAD(R, O) \
2299 do { \
2300 if (jit_regset_tstbit(&_jitc->function->regset, _V##R)) \
2301 ldxi_d(R, SP_REGNO, O); \
2302 } while (0)
2303 LOAD( 8, 96);
2304 LOAD( 9, 104);
2305 LOAD(10, 112);
2306 LOAD(11, 120);
2307 LOAD(12, 128);
2308 LOAD(13, 136);
2309 LOAD(14, 144);
2310 LOAD(15, 152);
2311#undef LOAD
2312 LDPI_PRE(FP_REGNO, LR_REGNO, SP_REGNO, stack_framesize >> 3);
2313 RET();
2314}
2315
2316static void
2317_vastart(jit_state_t *_jit, jit_int32_t r0)
2318{
2319 jit_int32_t reg;
2320
2321 assert(_jitc->function->self.call & jit_call_varargs);
2322
2323 /* Return jit_va_list_t in the register argument */
2324 addi(r0, FP_REGNO, _jitc->function->vaoff);
2325
2326 reg = jit_get_reg(jit_class_gpr);
2327
2328 /* Initialize stack pointer to the first stack argument. */
2329 addi(rn(reg), FP_REGNO, _jitc->function->self.size);
2330 stxi(offsetof(jit_va_list_t, stack), r0, rn(reg));
2331
2332 /* Initialize gp top pointer to the first stack argument. */
2333 addi(rn(reg), r0, va_gp_top_offset);
2334 stxi(offsetof(jit_va_list_t, gptop), r0, rn(reg));
2335
2336 /* Initialize fp top pointer to the first stack argument. */
2337 addi(rn(reg), r0, va_fp_top_offset);
2338 stxi(offsetof(jit_va_list_t, fptop), r0, rn(reg));
2339
2340 /* Initialize gp offset in the save area. */
2341 movi(rn(reg), _jitc->function->vagp);
2342 stxi_i(offsetof(jit_va_list_t, gpoff), r0, rn(reg));
2343
2344 /* Initialize fp offset in the save area. */
2345 movi(rn(reg), _jitc->function->vafp);
2346 stxi_i(offsetof(jit_va_list_t, fpoff), r0, rn(reg));
2347
2348 jit_unget_reg(reg);
2349}
2350
2351static void
2352_vaarg(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
2353{
2354 jit_word_t ge_code;
2355 jit_word_t lt_code;
2356 jit_int32_t rg0, rg1;
2357
2358 assert(_jitc->function->self.call & jit_call_varargs);
2359
2360 rg0 = jit_get_reg(jit_class_gpr);
2361 rg1 = jit_get_reg(jit_class_gpr);
2362
2363 /* Load the gp offset in save area in the first temporary. */
2364 ldxi_i(rn(rg0), r1, offsetof(jit_va_list_t, gpoff));
2365
2366 /* Jump over if there are no remaining arguments in the save area. */
2367 ge_code = bgei(_jit->pc.w, rn(rg0), 0);
2368
2369 /* Load the gp save pointer in the second temporary. */
2370 ldxi(rn(rg1), r1, offsetof(jit_va_list_t, gptop));
2371
2372 /* Load the vararg argument in the first argument. */
2373 ldxr(r0, rn(rg1), rn(rg0));
2374
2375 /* Update the gp offset. */
2376 addi(rn(rg0), rn(rg0), 8);
2377 stxi_i(offsetof(jit_va_list_t, gpoff), r1, rn(rg0));
2378
2379 /* Will only need one temporary register below. */
2380 jit_unget_reg(rg1);
2381
2382 /* Jump over overflow code. */
2383 lt_code = jmpi_p(_jit->pc.w);
2384
2385 /* Where to land if argument is in overflow area. */
2386 patch_at(ge_code, _jit->pc.w);
2387
2388 /* Load stack pointer. */
2389 ldxi(rn(rg0), r1, offsetof(jit_va_list_t, stack));
2390
2391 /* Load argument. */
2392 ldr(r0, rn(rg0));
2393
2394 /* Update stack pointer. */
2395 addi(rn(rg0), rn(rg0), 8);
2396 stxi(offsetof(jit_va_list_t, stack), r1, rn(rg0));
2397
2398 /* Where to land if argument is in gp save area. */
2399 patch_at(lt_code, _jit->pc.w);
2400
2401 jit_unget_reg(rg0);
2402}
2403
2404static void
2405_patch_at(jit_state_t *_jit, jit_word_t instr, jit_word_t label)
2406{
2407 instr_t i;
2408 jit_word_t d;
2409 jit_int32_t fc, ff, ffc;
2410 union {
2411 jit_int32_t *i;
2412 jit_word_t w;
2413 } u;
2414 u.w = instr;
2415 i.w = u.i[0];
2416 fc = i.w & 0xfc000000;
2417 ff = i.w & 0xff000000;
2418 ffc = i.w & 0xffc00000;
2419 if (fc == A64_B || fc == A64_BL) {
2420 d = (label - instr) >> 2;
2421 assert(d >= -33554432 && d <= 33554431);
2422 i.imm26.b = d;
2423 u.i[0] = i.w;
2424 }
2425 else if (ff == A64_B_C || ff == (A64_CBZ|XS) || ff == (A64_CBNZ|XS)) {
2426 d = (label - instr) >> 2;
2427 assert(d >= -262148 && d <= 262143);
2428 i.imm19.b = d;
2429 u.i[0] = i.w;
2430 }
2431 else if (ffc == (A64_MOVZ|XS)) {
2432 i.imm16.b = label;
2433 u.i[0] = i.w;
2434 i.w = u.i[1];
2435 assert((i.w & 0xffe00000) == (A64_MOVK|XS|MOVI_LSL_16));
2436 i.imm16.b = label >> 16;
2437 u.i[1] = i.w;
2438 i.w = u.i[2];
2439 assert((i.w & 0xffe00000) == (A64_MOVK|XS|MOVI_LSL_32));
2440 i.imm16.b = label >> 32;
2441 u.i[2] = i.w;
2442 i.w = u.i[3];
2443 assert((i.w & 0xffe00000) == (A64_MOVK|XS|MOVI_LSL_48));
2444 i.imm16.b = label >> 48;
2445 u.i[3] = i.w;
2446 }
2447 else
2448 abort();
2449}
2450#endif
ARM optimized PCSX fork