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98fa08a5 | 1 | // SPDX-License-Identifier: LGPL-2.1-or-later |
d16005f8 | 2 | /* |
98fa08a5 | 3 | * Copyright (C) 2014-2021 Paul Cercueil <paul@crapouillou.net> |
d16005f8 PC |
4 | */ |
5 | ||
6 | #include "blockcache.h" | |
7 | #include "debug.h" | |
8 | #include "disassembler.h" | |
9 | #include "emitter.h" | |
98fa08a5 | 10 | #include "lightning-wrapper.h" |
d16005f8 PC |
11 | #include "optimizer.h" |
12 | #include "regcache.h" | |
13 | ||
d16005f8 PC |
14 | #include <stdbool.h> |
15 | #include <stddef.h> | |
16 | ||
5459088b PC |
17 | #define LIGHTNING_UNALIGNED_32BIT 4 |
18 | ||
98fa08a5 | 19 | typedef void (*lightrec_rec_func_t)(struct lightrec_cstate *, const struct block *, u16); |
d16005f8 PC |
20 | |
21 | /* Forward declarations */ | |
98fa08a5 PC |
22 | static void rec_SPECIAL(struct lightrec_cstate *state, const struct block *block, u16 offset); |
23 | static void rec_REGIMM(struct lightrec_cstate *state, const struct block *block, u16 offset); | |
24 | static void rec_CP0(struct lightrec_cstate *state, const struct block *block, u16 offset); | |
25 | static void rec_CP2(struct lightrec_cstate *state, const struct block *block, u16 offset); | |
cb72ea13 | 26 | static void rec_META(struct lightrec_cstate *state, const struct block *block, u16 offset); |
9259d748 PC |
27 | static void rec_cp2_do_mtc2(struct lightrec_cstate *state, |
28 | const struct block *block, u16 offset, u8 reg, u8 in_reg); | |
29 | static void rec_cp2_do_mfc2(struct lightrec_cstate *state, | |
30 | const struct block *block, u16 offset, | |
31 | u8 reg, u8 out_reg); | |
d16005f8 | 32 | |
ba3814c1 | 33 | static void |
cb72ea13 | 34 | lightrec_jump_to_fn(jit_state_t *_jit, void (*fn)(void)) |
ba3814c1 PC |
35 | { |
36 | /* Prevent jit_jmpi() from using our cycles register as a temporary */ | |
37 | jit_live(LIGHTREC_REG_CYCLE); | |
38 | ||
cb72ea13 PC |
39 | jit_patch_abs(jit_jmpi(), fn); |
40 | } | |
41 | ||
42 | static void | |
43 | lightrec_jump_to_eob(struct lightrec_cstate *state, jit_state_t *_jit) | |
44 | { | |
45 | lightrec_jump_to_fn(_jit, state->state->eob_wrapper_func); | |
46 | } | |
47 | ||
48 | static void | |
49 | lightrec_jump_to_ds_check(struct lightrec_cstate *state, jit_state_t *_jit) | |
50 | { | |
51 | lightrec_jump_to_fn(_jit, state->state->ds_check_func); | |
ba3814c1 PC |
52 | } |
53 | ||
9259d748 PC |
54 | static void update_ra_register(struct regcache *reg_cache, jit_state_t *_jit, |
55 | u8 ra_reg, u32 pc, u32 link) | |
56 | { | |
57 | u8 link_reg; | |
58 | ||
59 | link_reg = lightrec_alloc_reg_out(reg_cache, _jit, ra_reg, 0); | |
60 | lightrec_load_imm(reg_cache, _jit, link_reg, pc, link); | |
61 | lightrec_free_reg(reg_cache, link_reg); | |
62 | } | |
63 | ||
98fa08a5 PC |
64 | static void lightrec_emit_end_of_block(struct lightrec_cstate *state, |
65 | const struct block *block, u16 offset, | |
d16005f8 PC |
66 | s8 reg_new_pc, u32 imm, u8 ra_reg, |
67 | u32 link, bool update_cycles) | |
68 | { | |
d16005f8 | 69 | struct regcache *reg_cache = state->reg_cache; |
d16005f8 | 70 | jit_state_t *_jit = block->_jit; |
98fa08a5 | 71 | const struct opcode *op = &block->opcode_list[offset], |
cb72ea13 | 72 | *ds = get_delay_slot(block->opcode_list, offset); |
684432ad | 73 | u32 cycles = state->cycles + lightrec_cycles_of_opcode(state->state, op->c); |
d75d83f7 | 74 | bool has_ds = has_delay_slot(op->c); |
d16005f8 PC |
75 | |
76 | jit_note(__FILE__, __LINE__); | |
77 | ||
9259d748 PC |
78 | if (link && ra_reg != reg_new_pc) |
79 | update_ra_register(reg_cache, _jit, ra_reg, block->pc, link); | |
d16005f8 | 80 | |
9259d748 PC |
81 | if (reg_new_pc < 0) |
82 | lightrec_load_next_pc_imm(reg_cache, _jit, block->pc, imm); | |
83 | else | |
84 | lightrec_load_next_pc(reg_cache, _jit, reg_new_pc); | |
d16005f8 | 85 | |
9259d748 PC |
86 | if (link && ra_reg == reg_new_pc) { |
87 | /* Handle the special case: JALR $r0, $r0 | |
88 | * In that case the target PC should be the old value of the | |
89 | * register. */ | |
90 | update_ra_register(reg_cache, _jit, ra_reg, block->pc, link); | |
d16005f8 PC |
91 | } |
92 | ||
d75d83f7 | 93 | if (has_ds && !op_flag_no_ds(op->flags) && !op_flag_local_branch(op->flags)) { |
684432ad | 94 | cycles += lightrec_cycles_of_opcode(state->state, ds->c); |
d16005f8 PC |
95 | |
96 | /* Recompile the delay slot */ | |
cb72ea13 | 97 | if (ds->c.opcode) |
98fa08a5 | 98 | lightrec_rec_opcode(state, block, offset + 1); |
d16005f8 PC |
99 | } |
100 | ||
03535202 PC |
101 | /* Clean the remaining registers */ |
102 | lightrec_clean_regs(reg_cache, _jit); | |
d16005f8 | 103 | |
d16005f8 PC |
104 | if (cycles && update_cycles) { |
105 | jit_subi(LIGHTREC_REG_CYCLE, LIGHTREC_REG_CYCLE, cycles); | |
106 | pr_debug("EOB: %u cycles\n", cycles); | |
107 | } | |
108 | ||
d75d83f7 | 109 | if (has_ds && op_flag_load_delay(ds->flags) |
cb72ea13 PC |
110 | && opcode_is_load(ds->c) && !state->no_load_delay) { |
111 | /* If the delay slot is a load opcode, its target register | |
112 | * will be written after the first opcode of the target is | |
113 | * executed. Handle this by jumping to a special section of | |
114 | * the dispatcher. It expects the loaded value to be in | |
115 | * REG_TEMP, and the target register number to be in JIT_V1.*/ | |
116 | jit_movi(JIT_V1, ds->c.i.rt); | |
117 | ||
118 | lightrec_jump_to_ds_check(state, _jit); | |
119 | } else { | |
120 | lightrec_jump_to_eob(state, _jit); | |
121 | } | |
0e720fb1 PC |
122 | |
123 | lightrec_regcache_reset(reg_cache); | |
d16005f8 PC |
124 | } |
125 | ||
cb72ea13 PC |
126 | void lightrec_emit_jump_to_interpreter(struct lightrec_cstate *state, |
127 | const struct block *block, u16 offset) | |
128 | { | |
129 | struct regcache *reg_cache = state->reg_cache; | |
130 | jit_state_t *_jit = block->_jit; | |
131 | ||
132 | lightrec_clean_regs(reg_cache, _jit); | |
133 | ||
134 | /* Call the interpreter with the block's address in JIT_V1 and the | |
135 | * PC (which might have an offset) in JIT_V0. */ | |
136 | lightrec_load_imm(reg_cache, _jit, JIT_V0, block->pc, | |
137 | block->pc + (offset << 2)); | |
0e720fb1 PC |
138 | if (lightrec_store_next_pc()) { |
139 | jit_stxi_i(offsetof(struct lightrec_state, next_pc), | |
140 | LIGHTREC_REG_STATE, JIT_V0); | |
141 | } | |
142 | ||
cb72ea13 PC |
143 | jit_movi(JIT_V1, (uintptr_t)block); |
144 | ||
145 | jit_subi(LIGHTREC_REG_CYCLE, LIGHTREC_REG_CYCLE, state->cycles); | |
146 | lightrec_jump_to_fn(_jit, state->state->interpreter_func); | |
147 | } | |
148 | ||
149 | static void lightrec_emit_eob(struct lightrec_cstate *state, | |
150 | const struct block *block, u16 offset) | |
d16005f8 | 151 | { |
d16005f8 PC |
152 | struct regcache *reg_cache = state->reg_cache; |
153 | jit_state_t *_jit = block->_jit; | |
154 | ||
03535202 | 155 | lightrec_clean_regs(reg_cache, _jit); |
d16005f8 | 156 | |
9259d748 PC |
157 | lightrec_load_imm(reg_cache, _jit, JIT_V0, block->pc, |
158 | block->pc + (offset << 2)); | |
0e720fb1 PC |
159 | if (lightrec_store_next_pc()) { |
160 | jit_stxi_i(offsetof(struct lightrec_state, next_pc), | |
161 | LIGHTREC_REG_STATE, JIT_V0); | |
162 | } | |
163 | ||
13b02197 | 164 | jit_subi(LIGHTREC_REG_CYCLE, LIGHTREC_REG_CYCLE, state->cycles); |
d16005f8 | 165 | |
ba3814c1 | 166 | lightrec_jump_to_eob(state, _jit); |
d16005f8 PC |
167 | } |
168 | ||
98fa08a5 | 169 | static void rec_special_JR(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 | 170 | { |
9259d748 | 171 | union code c = block->opcode_list[offset].c; |
d16005f8 PC |
172 | |
173 | _jit_name(block->_jit, __func__); | |
9259d748 | 174 | lightrec_emit_end_of_block(state, block, offset, c.r.rs, 0, 31, 0, true); |
98fa08a5 PC |
175 | } |
176 | ||
177 | static void rec_special_JALR(struct lightrec_cstate *state, const struct block *block, u16 offset) | |
178 | { | |
98fa08a5 PC |
179 | union code c = block->opcode_list[offset].c; |
180 | ||
181 | _jit_name(block->_jit, __func__); | |
9259d748 | 182 | lightrec_emit_end_of_block(state, block, offset, c.r.rs, 0, c.r.rd, |
98fa08a5 | 183 | get_branch_pc(block, offset, 2), true); |
d16005f8 PC |
184 | } |
185 | ||
98fa08a5 | 186 | static void rec_J(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 | 187 | { |
98fa08a5 PC |
188 | union code c = block->opcode_list[offset].c; |
189 | ||
d16005f8 | 190 | _jit_name(block->_jit, __func__); |
98fa08a5 PC |
191 | lightrec_emit_end_of_block(state, block, offset, -1, |
192 | (block->pc & 0xf0000000) | (c.j.imm << 2), | |
193 | 31, 0, true); | |
d16005f8 PC |
194 | } |
195 | ||
98fa08a5 | 196 | static void rec_JAL(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 | 197 | { |
98fa08a5 PC |
198 | union code c = block->opcode_list[offset].c; |
199 | ||
d16005f8 | 200 | _jit_name(block->_jit, __func__); |
98fa08a5 PC |
201 | lightrec_emit_end_of_block(state, block, offset, -1, |
202 | (block->pc & 0xf0000000) | (c.j.imm << 2), | |
203 | 31, get_branch_pc(block, offset, 2), true); | |
d16005f8 PC |
204 | } |
205 | ||
03535202 PC |
206 | static void lightrec_do_early_unload(struct lightrec_cstate *state, |
207 | const struct block *block, u16 offset) | |
208 | { | |
209 | struct regcache *reg_cache = state->reg_cache; | |
210 | const struct opcode *op = &block->opcode_list[offset]; | |
211 | jit_state_t *_jit = block->_jit; | |
212 | unsigned int i; | |
213 | u8 reg; | |
214 | struct { | |
215 | u8 reg, op; | |
216 | } reg_ops[3] = { | |
217 | { op->r.rd, LIGHTREC_FLAGS_GET_RD(op->flags), }, | |
218 | { op->i.rt, LIGHTREC_FLAGS_GET_RT(op->flags), }, | |
219 | { op->i.rs, LIGHTREC_FLAGS_GET_RS(op->flags), }, | |
220 | }; | |
221 | ||
222 | for (i = 0; i < ARRAY_SIZE(reg_ops); i++) { | |
223 | reg = reg_ops[i].reg; | |
224 | ||
225 | switch (reg_ops[i].op) { | |
226 | case LIGHTREC_REG_UNLOAD: | |
227 | lightrec_clean_reg_if_loaded(reg_cache, _jit, reg, true); | |
228 | break; | |
229 | ||
230 | case LIGHTREC_REG_DISCARD: | |
231 | lightrec_discard_reg_if_loaded(reg_cache, reg); | |
232 | break; | |
233 | ||
234 | case LIGHTREC_REG_CLEAN: | |
235 | lightrec_clean_reg_if_loaded(reg_cache, _jit, reg, false); | |
236 | break; | |
237 | default: | |
238 | break; | |
239 | }; | |
240 | } | |
241 | } | |
242 | ||
98fa08a5 | 243 | static void rec_b(struct lightrec_cstate *state, const struct block *block, u16 offset, |
ba3814c1 | 244 | jit_code_t code, jit_code_t code2, u32 link, bool unconditional, bool bz) |
d16005f8 | 245 | { |
98fa08a5 | 246 | struct regcache *reg_cache = state->reg_cache; |
d16005f8 PC |
247 | struct native_register *regs_backup; |
248 | jit_state_t *_jit = block->_jit; | |
249 | struct lightrec_branch *branch; | |
98fa08a5 | 250 | const struct opcode *op = &block->opcode_list[offset], |
cb72ea13 | 251 | *ds = get_delay_slot(block->opcode_list, offset); |
d16005f8 | 252 | jit_node_t *addr; |
cb72ea13 | 253 | bool is_forward = (s16)op->i.imm >= 0; |
684432ad | 254 | int op_cycles = lightrec_cycles_of_opcode(state->state, op->c); |
03535202 | 255 | u32 target_offset, cycles = state->cycles + op_cycles; |
ba3814c1 | 256 | bool no_indirection = false; |
98fa08a5 | 257 | u32 next_pc; |
9259d748 | 258 | u8 rs, rt; |
d16005f8 PC |
259 | |
260 | jit_note(__FILE__, __LINE__); | |
261 | ||
03535202 | 262 | if (!op_flag_no_ds(op->flags)) |
684432ad | 263 | cycles += lightrec_cycles_of_opcode(state->state, ds->c); |
d16005f8 | 264 | |
03535202 PC |
265 | state->cycles = -op_cycles; |
266 | ||
267 | if (!unconditional) { | |
268 | rs = lightrec_alloc_reg_in(reg_cache, _jit, op->i.rs, REG_EXT); | |
269 | rt = bz ? 0 : lightrec_alloc_reg_in(reg_cache, | |
270 | _jit, op->i.rt, REG_EXT); | |
271 | ||
272 | /* Unload dead registers before evaluating the branch */ | |
273 | if (OPT_EARLY_UNLOAD) | |
274 | lightrec_do_early_unload(state, block, offset); | |
ba3814c1 PC |
275 | |
276 | if (op_flag_local_branch(op->flags) && | |
cb72ea13 | 277 | (op_flag_no_ds(op->flags) || !ds->opcode) && |
ba3814c1 PC |
278 | is_forward && !lightrec_has_dirty_regs(reg_cache)) |
279 | no_indirection = true; | |
280 | ||
281 | if (no_indirection) | |
282 | pr_debug("Using no indirection for branch at offset 0x%hx\n", offset << 2); | |
03535202 | 283 | } |
d16005f8 PC |
284 | |
285 | if (cycles) | |
286 | jit_subi(LIGHTREC_REG_CYCLE, LIGHTREC_REG_CYCLE, cycles); | |
287 | ||
288 | if (!unconditional) { | |
d16005f8 | 289 | /* Generate the branch opcode */ |
ba3814c1 PC |
290 | if (!no_indirection) |
291 | addr = jit_new_node_pww(code, NULL, rs, rt); | |
d16005f8 PC |
292 | |
293 | lightrec_free_regs(reg_cache); | |
294 | regs_backup = lightrec_regcache_enter_branch(reg_cache); | |
295 | } | |
296 | ||
03535202 PC |
297 | if (op_flag_local_branch(op->flags)) { |
298 | /* Recompile the delay slot */ | |
cb72ea13 PC |
299 | if (!op_flag_no_ds(op->flags) && ds->opcode) { |
300 | /* Never handle load delays with local branches. */ | |
301 | state->no_load_delay = true; | |
03535202 | 302 | lightrec_rec_opcode(state, block, offset + 1); |
cb72ea13 | 303 | } |
d16005f8 | 304 | |
9259d748 PC |
305 | if (link) |
306 | update_ra_register(reg_cache, _jit, 31, block->pc, link); | |
d16005f8 | 307 | |
03535202 PC |
308 | /* Clean remaining registers */ |
309 | lightrec_clean_regs(reg_cache, _jit); | |
d16005f8 | 310 | |
98fa08a5 | 311 | target_offset = offset + 1 + (s16)op->i.imm |
03535202 | 312 | - !!op_flag_no_ds(op->flags); |
98fa08a5 PC |
313 | pr_debug("Adding local branch to offset 0x%x\n", |
314 | target_offset << 2); | |
315 | branch = &state->local_branches[ | |
316 | state->nb_local_branches++]; | |
d16005f8 | 317 | |
98fa08a5 | 318 | branch->target = target_offset; |
ba3814c1 PC |
319 | |
320 | if (no_indirection) | |
321 | branch->branch = jit_new_node_pww(code2, NULL, rs, rt); | |
322 | else if (is_forward) | |
22eee2ac | 323 | branch->branch = jit_b(); |
d16005f8 PC |
324 | else |
325 | branch->branch = jit_bgti(LIGHTREC_REG_CYCLE, 0); | |
326 | } | |
327 | ||
03535202 | 328 | if (!op_flag_local_branch(op->flags) || !is_forward) { |
98fa08a5 | 329 | next_pc = get_branch_pc(block, offset, 1 + (s16)op->i.imm); |
cb72ea13 | 330 | state->no_load_delay = op_flag_local_branch(op->flags); |
98fa08a5 | 331 | lightrec_emit_end_of_block(state, block, offset, -1, next_pc, |
d16005f8 PC |
332 | 31, link, false); |
333 | } | |
334 | ||
335 | if (!unconditional) { | |
ba3814c1 PC |
336 | if (!no_indirection) |
337 | jit_patch(addr); | |
338 | ||
d16005f8 PC |
339 | lightrec_regcache_leave_branch(reg_cache, regs_backup); |
340 | ||
9259d748 PC |
341 | if (bz && link) |
342 | update_ra_register(reg_cache, _jit, 31, block->pc, link); | |
d16005f8 | 343 | |
cb72ea13 PC |
344 | if (!op_flag_no_ds(op->flags) && ds->opcode) { |
345 | state->no_load_delay = true; | |
98fa08a5 | 346 | lightrec_rec_opcode(state, block, offset + 1); |
cb72ea13 | 347 | } |
d16005f8 PC |
348 | } |
349 | } | |
350 | ||
98fa08a5 PC |
351 | static void rec_BNE(struct lightrec_cstate *state, |
352 | const struct block *block, u16 offset) | |
d16005f8 | 353 | { |
98fa08a5 PC |
354 | union code c = block->opcode_list[offset].c; |
355 | ||
d16005f8 | 356 | _jit_name(block->_jit, __func__); |
98fa08a5 PC |
357 | |
358 | if (c.i.rt == 0) | |
ba3814c1 | 359 | rec_b(state, block, offset, jit_code_beqi, jit_code_bnei, 0, false, true); |
98fa08a5 | 360 | else |
ba3814c1 | 361 | rec_b(state, block, offset, jit_code_beqr, jit_code_bner, 0, false, false); |
d16005f8 PC |
362 | } |
363 | ||
98fa08a5 PC |
364 | static void rec_BEQ(struct lightrec_cstate *state, |
365 | const struct block *block, u16 offset) | |
d16005f8 | 366 | { |
98fa08a5 PC |
367 | union code c = block->opcode_list[offset].c; |
368 | ||
d16005f8 | 369 | _jit_name(block->_jit, __func__); |
98fa08a5 PC |
370 | |
371 | if (c.i.rt == 0) | |
ba3814c1 | 372 | rec_b(state, block, offset, jit_code_bnei, jit_code_beqi, 0, c.i.rs == 0, true); |
98fa08a5 | 373 | else |
ba3814c1 | 374 | rec_b(state, block, offset, jit_code_bner, jit_code_beqr, 0, c.i.rs == c.i.rt, false); |
d16005f8 PC |
375 | } |
376 | ||
98fa08a5 PC |
377 | static void rec_BLEZ(struct lightrec_cstate *state, |
378 | const struct block *block, u16 offset) | |
d16005f8 | 379 | { |
98fa08a5 PC |
380 | union code c = block->opcode_list[offset].c; |
381 | ||
d16005f8 | 382 | _jit_name(block->_jit, __func__); |
ba3814c1 | 383 | rec_b(state, block, offset, jit_code_bgti, jit_code_blei, 0, c.i.rs == 0, true); |
d16005f8 PC |
384 | } |
385 | ||
98fa08a5 PC |
386 | static void rec_BGTZ(struct lightrec_cstate *state, |
387 | const struct block *block, u16 offset) | |
d16005f8 PC |
388 | { |
389 | _jit_name(block->_jit, __func__); | |
ba3814c1 | 390 | rec_b(state, block, offset, jit_code_blei, jit_code_bgti, 0, false, true); |
d16005f8 PC |
391 | } |
392 | ||
98fa08a5 PC |
393 | static void rec_regimm_BLTZ(struct lightrec_cstate *state, |
394 | const struct block *block, u16 offset) | |
d16005f8 PC |
395 | { |
396 | _jit_name(block->_jit, __func__); | |
ba3814c1 | 397 | rec_b(state, block, offset, jit_code_bgei, jit_code_blti, 0, false, true); |
d16005f8 PC |
398 | } |
399 | ||
98fa08a5 PC |
400 | static void rec_regimm_BLTZAL(struct lightrec_cstate *state, |
401 | const struct block *block, u16 offset) | |
d16005f8 PC |
402 | { |
403 | _jit_name(block->_jit, __func__); | |
ba3814c1 | 404 | rec_b(state, block, offset, jit_code_bgei, jit_code_blti, |
98fa08a5 | 405 | get_branch_pc(block, offset, 2), false, true); |
d16005f8 PC |
406 | } |
407 | ||
98fa08a5 PC |
408 | static void rec_regimm_BGEZ(struct lightrec_cstate *state, |
409 | const struct block *block, u16 offset) | |
d16005f8 | 410 | { |
98fa08a5 PC |
411 | union code c = block->opcode_list[offset].c; |
412 | ||
d16005f8 | 413 | _jit_name(block->_jit, __func__); |
ba3814c1 | 414 | rec_b(state, block, offset, jit_code_blti, jit_code_bgei, 0, !c.i.rs, true); |
d16005f8 PC |
415 | } |
416 | ||
98fa08a5 PC |
417 | static void rec_regimm_BGEZAL(struct lightrec_cstate *state, |
418 | const struct block *block, u16 offset) | |
d16005f8 | 419 | { |
98fa08a5 | 420 | const struct opcode *op = &block->opcode_list[offset]; |
d16005f8 | 421 | _jit_name(block->_jit, __func__); |
ba3814c1 | 422 | rec_b(state, block, offset, jit_code_blti, jit_code_bgei, |
98fa08a5 PC |
423 | get_branch_pc(block, offset, 2), |
424 | !op->i.rs, true); | |
d16005f8 PC |
425 | } |
426 | ||
684432ad PC |
427 | static void rec_alloc_rs_rd(struct regcache *reg_cache, |
428 | jit_state_t *_jit, | |
429 | const struct opcode *op, | |
430 | u8 rs, u8 rd, | |
431 | u8 in_flags, u8 out_flags, | |
432 | u8 *rs_out, u8 *rd_out) | |
433 | { | |
434 | bool unload, discard; | |
435 | u32 unload_flags; | |
436 | ||
437 | if (OPT_EARLY_UNLOAD) { | |
438 | unload_flags = LIGHTREC_FLAGS_GET_RS(op->flags); | |
439 | unload = unload_flags == LIGHTREC_REG_UNLOAD; | |
440 | discard = unload_flags == LIGHTREC_REG_DISCARD; | |
441 | } | |
442 | ||
443 | if (OPT_EARLY_UNLOAD && rs && rd != rs && (unload || discard)) { | |
444 | rs = lightrec_alloc_reg_in(reg_cache, _jit, rs, in_flags); | |
445 | lightrec_remap_reg(reg_cache, _jit, rs, rd, discard); | |
446 | lightrec_set_reg_out_flags(reg_cache, rs, out_flags); | |
447 | rd = rs; | |
448 | } else { | |
449 | rs = lightrec_alloc_reg_in(reg_cache, _jit, rs, in_flags); | |
450 | rd = lightrec_alloc_reg_out(reg_cache, _jit, rd, out_flags); | |
451 | } | |
452 | ||
453 | *rs_out = rs; | |
454 | *rd_out = rd; | |
455 | } | |
456 | ||
98fa08a5 PC |
457 | static void rec_alu_imm(struct lightrec_cstate *state, const struct block *block, |
458 | u16 offset, jit_code_t code, bool slti) | |
d16005f8 | 459 | { |
98fa08a5 PC |
460 | struct regcache *reg_cache = state->reg_cache; |
461 | union code c = block->opcode_list[offset].c; | |
d16005f8 | 462 | jit_state_t *_jit = block->_jit; |
98fa08a5 PC |
463 | u8 rs, rt, out_flags = REG_EXT; |
464 | ||
465 | if (slti) | |
466 | out_flags |= REG_ZEXT; | |
d16005f8 PC |
467 | |
468 | jit_note(__FILE__, __LINE__); | |
684432ad PC |
469 | |
470 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], | |
471 | c.i.rs, c.i.rt, REG_EXT, out_flags, &rs, &rt); | |
d16005f8 | 472 | |
98fa08a5 | 473 | jit_new_node_www(code, rt, rs, (s32)(s16) c.i.imm); |
d16005f8 PC |
474 | |
475 | lightrec_free_reg(reg_cache, rs); | |
476 | lightrec_free_reg(reg_cache, rt); | |
477 | } | |
478 | ||
98fa08a5 PC |
479 | static void rec_alu_special(struct lightrec_cstate *state, const struct block *block, |
480 | u16 offset, jit_code_t code, bool out_ext) | |
d16005f8 | 481 | { |
98fa08a5 PC |
482 | struct regcache *reg_cache = state->reg_cache; |
483 | union code c = block->opcode_list[offset].c; | |
d16005f8 PC |
484 | jit_state_t *_jit = block->_jit; |
485 | u8 rd, rt, rs; | |
486 | ||
487 | jit_note(__FILE__, __LINE__); | |
684432ad | 488 | |
98fa08a5 | 489 | rt = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rt, REG_EXT); |
684432ad PC |
490 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], |
491 | c.r.rs, c.r.rd, REG_EXT, | |
492 | out_ext ? REG_EXT | REG_ZEXT : 0, &rs, &rd); | |
d16005f8 PC |
493 | |
494 | jit_new_node_www(code, rd, rs, rt); | |
495 | ||
496 | lightrec_free_reg(reg_cache, rs); | |
497 | lightrec_free_reg(reg_cache, rt); | |
498 | lightrec_free_reg(reg_cache, rd); | |
499 | } | |
500 | ||
98fa08a5 PC |
501 | static void rec_alu_shiftv(struct lightrec_cstate *state, const struct block *block, |
502 | u16 offset, jit_code_t code) | |
d16005f8 | 503 | { |
98fa08a5 PC |
504 | struct regcache *reg_cache = state->reg_cache; |
505 | union code c = block->opcode_list[offset].c; | |
d16005f8 | 506 | jit_state_t *_jit = block->_jit; |
98fa08a5 | 507 | u8 rd, rt, rs, temp, flags = 0; |
d16005f8 PC |
508 | |
509 | jit_note(__FILE__, __LINE__); | |
d16005f8 | 510 | |
98fa08a5 PC |
511 | if (code == jit_code_rshr) |
512 | flags = REG_EXT; | |
513 | else if (code == jit_code_rshr_u) | |
514 | flags = REG_ZEXT; | |
d16005f8 | 515 | |
684432ad PC |
516 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rs, 0); |
517 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], | |
518 | c.r.rt, c.r.rd, flags, flags, &rt, &rd); | |
d16005f8 | 519 | |
684432ad | 520 | if (rt != rd) { |
98fa08a5 PC |
521 | jit_andi(rd, rs, 0x1f); |
522 | jit_new_node_www(code, rd, rt, rd); | |
523 | } else { | |
524 | temp = lightrec_alloc_reg_temp(reg_cache, _jit); | |
525 | jit_andi(temp, rs, 0x1f); | |
d16005f8 | 526 | jit_new_node_www(code, rd, rt, temp); |
98fa08a5 PC |
527 | lightrec_free_reg(reg_cache, temp); |
528 | } | |
d16005f8 PC |
529 | |
530 | lightrec_free_reg(reg_cache, rs); | |
d16005f8 PC |
531 | lightrec_free_reg(reg_cache, rt); |
532 | lightrec_free_reg(reg_cache, rd); | |
533 | } | |
534 | ||
02487de7 PC |
535 | static void rec_movi(struct lightrec_cstate *state, |
536 | const struct block *block, u16 offset) | |
537 | { | |
538 | struct regcache *reg_cache = state->reg_cache; | |
539 | union code c = block->opcode_list[offset].c; | |
540 | jit_state_t *_jit = block->_jit; | |
541 | u16 flags = REG_EXT; | |
684432ad | 542 | s32 value = (s32)(s16) c.i.imm; |
02487de7 PC |
543 | u8 rt; |
544 | ||
684432ad PC |
545 | if (block->opcode_list[offset].flags & LIGHTREC_MOVI) |
546 | value += (s32)((u32)state->movi_temp[c.i.rt] << 16); | |
547 | ||
548 | if (value >= 0) | |
02487de7 PC |
549 | flags |= REG_ZEXT; |
550 | ||
551 | rt = lightrec_alloc_reg_out(reg_cache, _jit, c.i.rt, flags); | |
552 | ||
684432ad | 553 | jit_movi(rt, value); |
02487de7 PC |
554 | |
555 | lightrec_free_reg(reg_cache, rt); | |
556 | } | |
557 | ||
98fa08a5 PC |
558 | static void rec_ADDIU(struct lightrec_cstate *state, |
559 | const struct block *block, u16 offset) | |
d16005f8 | 560 | { |
684432ad PC |
561 | const struct opcode *op = &block->opcode_list[offset]; |
562 | ||
d16005f8 | 563 | _jit_name(block->_jit, __func__); |
02487de7 | 564 | |
684432ad | 565 | if (op->i.rs && !(op->flags & LIGHTREC_MOVI)) |
02487de7 PC |
566 | rec_alu_imm(state, block, offset, jit_code_addi, false); |
567 | else | |
568 | rec_movi(state, block, offset); | |
d16005f8 PC |
569 | } |
570 | ||
98fa08a5 PC |
571 | static void rec_ADDI(struct lightrec_cstate *state, |
572 | const struct block *block, u16 offset) | |
d16005f8 PC |
573 | { |
574 | /* TODO: Handle the exception? */ | |
575 | _jit_name(block->_jit, __func__); | |
02487de7 | 576 | rec_ADDIU(state, block, offset); |
d16005f8 PC |
577 | } |
578 | ||
98fa08a5 PC |
579 | static void rec_SLTIU(struct lightrec_cstate *state, |
580 | const struct block *block, u16 offset) | |
d16005f8 PC |
581 | { |
582 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 583 | rec_alu_imm(state, block, offset, jit_code_lti_u, true); |
d16005f8 PC |
584 | } |
585 | ||
98fa08a5 PC |
586 | static void rec_SLTI(struct lightrec_cstate *state, |
587 | const struct block *block, u16 offset) | |
d16005f8 PC |
588 | { |
589 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 590 | rec_alu_imm(state, block, offset, jit_code_lti, true); |
d16005f8 PC |
591 | } |
592 | ||
98fa08a5 PC |
593 | static void rec_ANDI(struct lightrec_cstate *state, |
594 | const struct block *block, u16 offset) | |
d16005f8 | 595 | { |
98fa08a5 PC |
596 | struct regcache *reg_cache = state->reg_cache; |
597 | union code c = block->opcode_list[offset].c; | |
d16005f8 PC |
598 | jit_state_t *_jit = block->_jit; |
599 | u8 rs, rt; | |
600 | ||
601 | _jit_name(block->_jit, __func__); | |
602 | jit_note(__FILE__, __LINE__); | |
684432ad PC |
603 | |
604 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], | |
605 | c.i.rs, c.i.rt, 0, REG_EXT | REG_ZEXT, &rs, &rt); | |
d16005f8 PC |
606 | |
607 | /* PSX code uses ANDI 0xff / ANDI 0xffff a lot, which are basically | |
608 | * casts to uint8_t / uint16_t. */ | |
98fa08a5 | 609 | if (c.i.imm == 0xff) |
d16005f8 | 610 | jit_extr_uc(rt, rs); |
98fa08a5 | 611 | else if (c.i.imm == 0xffff) |
d16005f8 PC |
612 | jit_extr_us(rt, rs); |
613 | else | |
98fa08a5 PC |
614 | jit_andi(rt, rs, (u32)(u16) c.i.imm); |
615 | ||
616 | lightrec_free_reg(reg_cache, rs); | |
617 | lightrec_free_reg(reg_cache, rt); | |
618 | } | |
619 | ||
620 | static void rec_alu_or_xor(struct lightrec_cstate *state, const struct block *block, | |
621 | u16 offset, jit_code_t code) | |
622 | { | |
623 | struct regcache *reg_cache = state->reg_cache; | |
624 | union code c = block->opcode_list[offset].c; | |
625 | jit_state_t *_jit = block->_jit; | |
626 | u8 rs, rt, flags; | |
627 | ||
628 | jit_note(__FILE__, __LINE__); | |
684432ad PC |
629 | |
630 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], | |
631 | c.i.rs, c.i.rt, 0, 0, &rs, &rt); | |
98fa08a5 PC |
632 | |
633 | flags = lightrec_get_reg_in_flags(reg_cache, rs); | |
634 | lightrec_set_reg_out_flags(reg_cache, rt, flags); | |
635 | ||
636 | jit_new_node_www(code, rt, rs, (u32)(u16) c.i.imm); | |
d16005f8 PC |
637 | |
638 | lightrec_free_reg(reg_cache, rs); | |
639 | lightrec_free_reg(reg_cache, rt); | |
640 | } | |
641 | ||
98fa08a5 PC |
642 | |
643 | static void rec_ORI(struct lightrec_cstate *state, | |
644 | const struct block *block, u16 offset) | |
d16005f8 | 645 | { |
684432ad PC |
646 | const struct opcode *op = &block->opcode_list[offset]; |
647 | struct regcache *reg_cache = state->reg_cache; | |
648 | jit_state_t *_jit = block->_jit; | |
649 | s32 val; | |
650 | u8 rt; | |
651 | ||
652 | _jit_name(_jit, __func__); | |
653 | ||
654 | if (op->flags & LIGHTREC_MOVI) { | |
655 | rt = lightrec_alloc_reg_out(reg_cache, _jit, op->i.rt, REG_EXT); | |
656 | ||
657 | val = ((u32)state->movi_temp[op->i.rt] << 16) | op->i.imm; | |
658 | jit_movi(rt, val); | |
659 | ||
660 | lightrec_free_reg(reg_cache, rt); | |
661 | } else { | |
662 | rec_alu_or_xor(state, block, offset, jit_code_ori); | |
663 | } | |
d16005f8 PC |
664 | } |
665 | ||
98fa08a5 PC |
666 | static void rec_XORI(struct lightrec_cstate *state, |
667 | const struct block *block, u16 offset) | |
d16005f8 PC |
668 | { |
669 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 670 | rec_alu_or_xor(state, block, offset, jit_code_xori); |
d16005f8 PC |
671 | } |
672 | ||
98fa08a5 PC |
673 | static void rec_LUI(struct lightrec_cstate *state, |
674 | const struct block *block, u16 offset) | |
d16005f8 | 675 | { |
98fa08a5 PC |
676 | struct regcache *reg_cache = state->reg_cache; |
677 | union code c = block->opcode_list[offset].c; | |
d16005f8 | 678 | jit_state_t *_jit = block->_jit; |
98fa08a5 | 679 | u8 rt, flags = REG_EXT; |
d16005f8 | 680 | |
684432ad PC |
681 | if (block->opcode_list[offset].flags & LIGHTREC_MOVI) { |
682 | state->movi_temp[c.i.rt] = c.i.imm; | |
683 | return; | |
684 | } | |
685 | ||
d16005f8 PC |
686 | jit_name(__func__); |
687 | jit_note(__FILE__, __LINE__); | |
d16005f8 | 688 | |
98fa08a5 PC |
689 | if (!(c.i.imm & BIT(15))) |
690 | flags |= REG_ZEXT; | |
691 | ||
692 | rt = lightrec_alloc_reg_out(reg_cache, _jit, c.i.rt, flags); | |
693 | ||
694 | jit_movi(rt, (s32)(c.i.imm << 16)); | |
d16005f8 PC |
695 | |
696 | lightrec_free_reg(reg_cache, rt); | |
697 | } | |
698 | ||
98fa08a5 PC |
699 | static void rec_special_ADDU(struct lightrec_cstate *state, |
700 | const struct block *block, u16 offset) | |
d16005f8 PC |
701 | { |
702 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 703 | rec_alu_special(state, block, offset, jit_code_addr, false); |
d16005f8 PC |
704 | } |
705 | ||
98fa08a5 PC |
706 | static void rec_special_ADD(struct lightrec_cstate *state, |
707 | const struct block *block, u16 offset) | |
d16005f8 PC |
708 | { |
709 | /* TODO: Handle the exception? */ | |
710 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 711 | rec_alu_special(state, block, offset, jit_code_addr, false); |
d16005f8 PC |
712 | } |
713 | ||
98fa08a5 PC |
714 | static void rec_special_SUBU(struct lightrec_cstate *state, |
715 | const struct block *block, u16 offset) | |
d16005f8 PC |
716 | { |
717 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 718 | rec_alu_special(state, block, offset, jit_code_subr, false); |
d16005f8 PC |
719 | } |
720 | ||
98fa08a5 PC |
721 | static void rec_special_SUB(struct lightrec_cstate *state, |
722 | const struct block *block, u16 offset) | |
d16005f8 PC |
723 | { |
724 | /* TODO: Handle the exception? */ | |
725 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 726 | rec_alu_special(state, block, offset, jit_code_subr, false); |
d16005f8 PC |
727 | } |
728 | ||
98fa08a5 PC |
729 | static void rec_special_AND(struct lightrec_cstate *state, |
730 | const struct block *block, u16 offset) | |
d16005f8 | 731 | { |
98fa08a5 PC |
732 | struct regcache *reg_cache = state->reg_cache; |
733 | union code c = block->opcode_list[offset].c; | |
734 | jit_state_t *_jit = block->_jit; | |
735 | u8 rd, rt, rs, flags_rs, flags_rt, flags_rd; | |
736 | ||
d16005f8 | 737 | _jit_name(block->_jit, __func__); |
98fa08a5 | 738 | jit_note(__FILE__, __LINE__); |
684432ad | 739 | |
98fa08a5 | 740 | rt = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rt, 0); |
684432ad PC |
741 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], |
742 | c.r.rs, c.r.rd, 0, 0, &rs, &rd); | |
98fa08a5 PC |
743 | |
744 | flags_rs = lightrec_get_reg_in_flags(reg_cache, rs); | |
745 | flags_rt = lightrec_get_reg_in_flags(reg_cache, rt); | |
746 | ||
747 | /* Z(rd) = Z(rs) | Z(rt) */ | |
748 | flags_rd = REG_ZEXT & (flags_rs | flags_rt); | |
749 | ||
750 | /* E(rd) = (E(rt) & Z(rt)) | (E(rs) & Z(rs)) | (E(rs) & E(rt)) */ | |
751 | if (((flags_rs & REG_EXT) && (flags_rt & REG_ZEXT)) || | |
752 | ((flags_rt & REG_EXT) && (flags_rs & REG_ZEXT)) || | |
753 | (REG_EXT & flags_rs & flags_rt)) | |
754 | flags_rd |= REG_EXT; | |
755 | ||
756 | lightrec_set_reg_out_flags(reg_cache, rd, flags_rd); | |
757 | ||
758 | jit_andr(rd, rs, rt); | |
759 | ||
760 | lightrec_free_reg(reg_cache, rs); | |
761 | lightrec_free_reg(reg_cache, rt); | |
762 | lightrec_free_reg(reg_cache, rd); | |
d16005f8 PC |
763 | } |
764 | ||
98fa08a5 PC |
765 | static void rec_special_or_nor(struct lightrec_cstate *state, |
766 | const struct block *block, u16 offset, bool nor) | |
767 | { | |
768 | struct regcache *reg_cache = state->reg_cache; | |
769 | union code c = block->opcode_list[offset].c; | |
770 | jit_state_t *_jit = block->_jit; | |
771 | u8 rd, rt, rs, flags_rs, flags_rt, flags_rd = 0; | |
772 | ||
773 | jit_note(__FILE__, __LINE__); | |
684432ad | 774 | |
98fa08a5 | 775 | rt = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rt, 0); |
684432ad PC |
776 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], |
777 | c.r.rs, c.r.rd, 0, 0, &rs, &rd); | |
98fa08a5 PC |
778 | |
779 | flags_rs = lightrec_get_reg_in_flags(reg_cache, rs); | |
780 | flags_rt = lightrec_get_reg_in_flags(reg_cache, rt); | |
781 | ||
782 | /* or: Z(rd) = Z(rs) & Z(rt) | |
783 | * nor: Z(rd) = 0 */ | |
784 | if (!nor) | |
785 | flags_rd = REG_ZEXT & flags_rs & flags_rt; | |
786 | ||
6ce0b00a PC |
787 | /* E(rd) = E(rs) & E(rt) */ |
788 | if (REG_EXT & flags_rs & flags_rt) | |
98fa08a5 PC |
789 | flags_rd |= REG_EXT; |
790 | ||
791 | lightrec_set_reg_out_flags(reg_cache, rd, flags_rd); | |
792 | ||
793 | jit_orr(rd, rs, rt); | |
794 | ||
795 | if (nor) | |
796 | jit_comr(rd, rd); | |
797 | ||
798 | lightrec_free_reg(reg_cache, rs); | |
799 | lightrec_free_reg(reg_cache, rt); | |
800 | lightrec_free_reg(reg_cache, rd); | |
801 | } | |
802 | ||
803 | static void rec_special_OR(struct lightrec_cstate *state, | |
804 | const struct block *block, u16 offset) | |
d16005f8 PC |
805 | { |
806 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 807 | rec_special_or_nor(state, block, offset, false); |
d16005f8 PC |
808 | } |
809 | ||
98fa08a5 PC |
810 | static void rec_special_NOR(struct lightrec_cstate *state, |
811 | const struct block *block, u16 offset) | |
d16005f8 PC |
812 | { |
813 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 814 | rec_special_or_nor(state, block, offset, true); |
d16005f8 PC |
815 | } |
816 | ||
98fa08a5 PC |
817 | static void rec_special_XOR(struct lightrec_cstate *state, |
818 | const struct block *block, u16 offset) | |
d16005f8 | 819 | { |
98fa08a5 PC |
820 | struct regcache *reg_cache = state->reg_cache; |
821 | union code c = block->opcode_list[offset].c; | |
d16005f8 | 822 | jit_state_t *_jit = block->_jit; |
98fa08a5 | 823 | u8 rd, rt, rs, flags_rs, flags_rt, flags_rd; |
d16005f8 | 824 | |
98fa08a5 PC |
825 | _jit_name(block->_jit, __func__); |
826 | ||
827 | jit_note(__FILE__, __LINE__); | |
684432ad | 828 | |
98fa08a5 | 829 | rt = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rt, 0); |
684432ad PC |
830 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], |
831 | c.r.rs, c.r.rd, 0, 0, &rs, &rd); | |
d16005f8 | 832 | |
98fa08a5 PC |
833 | flags_rs = lightrec_get_reg_in_flags(reg_cache, rs); |
834 | flags_rt = lightrec_get_reg_in_flags(reg_cache, rt); | |
d16005f8 | 835 | |
98fa08a5 PC |
836 | /* Z(rd) = Z(rs) & Z(rt) */ |
837 | flags_rd = REG_ZEXT & flags_rs & flags_rt; | |
838 | ||
839 | /* E(rd) = E(rs) & E(rt) */ | |
840 | flags_rd |= REG_EXT & flags_rs & flags_rt; | |
841 | ||
842 | lightrec_set_reg_out_flags(reg_cache, rd, flags_rd); | |
843 | ||
844 | jit_xorr(rd, rs, rt); | |
845 | ||
846 | lightrec_free_reg(reg_cache, rs); | |
847 | lightrec_free_reg(reg_cache, rt); | |
d16005f8 PC |
848 | lightrec_free_reg(reg_cache, rd); |
849 | } | |
850 | ||
98fa08a5 PC |
851 | static void rec_special_SLTU(struct lightrec_cstate *state, |
852 | const struct block *block, u16 offset) | |
d16005f8 PC |
853 | { |
854 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 855 | rec_alu_special(state, block, offset, jit_code_ltr_u, true); |
d16005f8 PC |
856 | } |
857 | ||
98fa08a5 PC |
858 | static void rec_special_SLT(struct lightrec_cstate *state, |
859 | const struct block *block, u16 offset) | |
d16005f8 PC |
860 | { |
861 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 862 | rec_alu_special(state, block, offset, jit_code_ltr, true); |
d16005f8 PC |
863 | } |
864 | ||
98fa08a5 PC |
865 | static void rec_special_SLLV(struct lightrec_cstate *state, |
866 | const struct block *block, u16 offset) | |
d16005f8 PC |
867 | { |
868 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 869 | rec_alu_shiftv(state, block, offset, jit_code_lshr); |
d16005f8 PC |
870 | } |
871 | ||
98fa08a5 PC |
872 | static void rec_special_SRLV(struct lightrec_cstate *state, |
873 | const struct block *block, u16 offset) | |
d16005f8 PC |
874 | { |
875 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 876 | rec_alu_shiftv(state, block, offset, jit_code_rshr_u); |
d16005f8 PC |
877 | } |
878 | ||
98fa08a5 PC |
879 | static void rec_special_SRAV(struct lightrec_cstate *state, |
880 | const struct block *block, u16 offset) | |
d16005f8 PC |
881 | { |
882 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 883 | rec_alu_shiftv(state, block, offset, jit_code_rshr); |
d16005f8 PC |
884 | } |
885 | ||
98fa08a5 PC |
886 | static void rec_alu_shift(struct lightrec_cstate *state, const struct block *block, |
887 | u16 offset, jit_code_t code) | |
d16005f8 | 888 | { |
98fa08a5 PC |
889 | struct regcache *reg_cache = state->reg_cache; |
890 | union code c = block->opcode_list[offset].c; | |
d16005f8 | 891 | jit_state_t *_jit = block->_jit; |
684432ad | 892 | u8 rd, rt, flags = 0, out_flags = 0; |
d16005f8 PC |
893 | |
894 | jit_note(__FILE__, __LINE__); | |
895 | ||
98fa08a5 PC |
896 | if (code == jit_code_rshi) |
897 | flags = REG_EXT; | |
898 | else if (code == jit_code_rshi_u) | |
899 | flags = REG_ZEXT; | |
d16005f8 | 900 | |
98fa08a5 PC |
901 | /* Input reg is zero-extended, if we SRL at least by one bit, we know |
902 | * the output reg will be both zero-extended and sign-extended. */ | |
684432ad | 903 | out_flags = flags; |
98fa08a5 | 904 | if (code == jit_code_rshi_u && c.r.imm) |
684432ad PC |
905 | out_flags |= REG_EXT; |
906 | ||
907 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], | |
908 | c.r.rt, c.r.rd, flags, out_flags, &rt, &rd); | |
98fa08a5 PC |
909 | |
910 | jit_new_node_www(code, rd, rt, c.r.imm); | |
d16005f8 PC |
911 | |
912 | lightrec_free_reg(reg_cache, rt); | |
913 | lightrec_free_reg(reg_cache, rd); | |
914 | } | |
915 | ||
98fa08a5 PC |
916 | static void rec_special_SLL(struct lightrec_cstate *state, |
917 | const struct block *block, u16 offset) | |
d16005f8 PC |
918 | { |
919 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 920 | rec_alu_shift(state, block, offset, jit_code_lshi); |
d16005f8 PC |
921 | } |
922 | ||
98fa08a5 PC |
923 | static void rec_special_SRL(struct lightrec_cstate *state, |
924 | const struct block *block, u16 offset) | |
d16005f8 PC |
925 | { |
926 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 927 | rec_alu_shift(state, block, offset, jit_code_rshi_u); |
d16005f8 PC |
928 | } |
929 | ||
98fa08a5 PC |
930 | static void rec_special_SRA(struct lightrec_cstate *state, |
931 | const struct block *block, u16 offset) | |
d16005f8 PC |
932 | { |
933 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 934 | rec_alu_shift(state, block, offset, jit_code_rshi); |
d16005f8 PC |
935 | } |
936 | ||
98fa08a5 PC |
937 | static void rec_alu_mult(struct lightrec_cstate *state, |
938 | const struct block *block, u16 offset, bool is_signed) | |
d16005f8 | 939 | { |
98fa08a5 PC |
940 | struct regcache *reg_cache = state->reg_cache; |
941 | union code c = block->opcode_list[offset].c; | |
03535202 | 942 | u32 flags = block->opcode_list[offset].flags; |
98fa08a5 PC |
943 | u8 reg_lo = get_mult_div_lo(c); |
944 | u8 reg_hi = get_mult_div_hi(c); | |
d16005f8 | 945 | jit_state_t *_jit = block->_jit; |
98fa08a5 | 946 | u8 lo, hi, rs, rt, rflags = 0; |
5459088b PC |
947 | bool no_lo = op_flag_no_lo(flags); |
948 | bool no_hi = op_flag_no_hi(flags); | |
d16005f8 PC |
949 | |
950 | jit_note(__FILE__, __LINE__); | |
951 | ||
98fa08a5 PC |
952 | if (is_signed) |
953 | rflags = REG_EXT; | |
954 | else | |
955 | rflags = REG_ZEXT; | |
956 | ||
957 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rs, rflags); | |
958 | rt = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rt, rflags); | |
959 | ||
5459088b | 960 | if (!no_lo) |
98fa08a5 | 961 | lo = lightrec_alloc_reg_out(reg_cache, _jit, reg_lo, 0); |
98fa08a5 | 962 | |
5459088b | 963 | if (!no_hi) |
98fa08a5 PC |
964 | hi = lightrec_alloc_reg_out(reg_cache, _jit, reg_hi, REG_EXT); |
965 | ||
966 | if (__WORDSIZE == 32) { | |
967 | /* On 32-bit systems, do a 32*32->64 bit operation, or a 32*32->32 bit | |
968 | * operation if the MULT was detected a 32-bit only. */ | |
5459088b | 969 | if (no_lo) { |
98fa08a5 | 970 | if (is_signed) |
5459088b | 971 | jit_hmulr(hi, rs, rt); |
98fa08a5 | 972 | else |
5459088b PC |
973 | jit_hmulr_u(hi, rs, rt); |
974 | } else if (no_hi) { | |
98fa08a5 | 975 | jit_mulr(lo, rs, rt); |
5459088b PC |
976 | } else if (is_signed) { |
977 | jit_qmulr(lo, hi, rs, rt); | |
978 | } else { | |
979 | jit_qmulr_u(lo, hi, rs, rt); | |
98fa08a5 | 980 | } |
d16005f8 | 981 | } else { |
98fa08a5 | 982 | /* On 64-bit systems, do a 64*64->64 bit operation. */ |
5459088b | 983 | if (no_lo) { |
98fa08a5 PC |
984 | jit_mulr(hi, rs, rt); |
985 | jit_rshi(hi, hi, 32); | |
986 | } else { | |
987 | jit_mulr(lo, rs, rt); | |
d16005f8 | 988 | |
98fa08a5 | 989 | /* The 64-bit output value is in $lo, store the upper 32 bits in $hi */ |
5459088b | 990 | if (!no_hi) |
98fa08a5 PC |
991 | jit_rshi(hi, lo, 32); |
992 | } | |
d16005f8 PC |
993 | } |
994 | ||
d16005f8 PC |
995 | lightrec_free_reg(reg_cache, rs); |
996 | lightrec_free_reg(reg_cache, rt); | |
5459088b | 997 | if (!no_lo) |
98fa08a5 | 998 | lightrec_free_reg(reg_cache, lo); |
5459088b | 999 | if (!no_hi) |
d16005f8 PC |
1000 | lightrec_free_reg(reg_cache, hi); |
1001 | } | |
1002 | ||
98fa08a5 PC |
1003 | static void rec_alu_div(struct lightrec_cstate *state, |
1004 | const struct block *block, u16 offset, bool is_signed) | |
d16005f8 | 1005 | { |
98fa08a5 PC |
1006 | struct regcache *reg_cache = state->reg_cache; |
1007 | union code c = block->opcode_list[offset].c; | |
03535202 PC |
1008 | u32 flags = block->opcode_list[offset].flags; |
1009 | bool no_check = op_flag_no_div_check(flags); | |
98fa08a5 PC |
1010 | u8 reg_lo = get_mult_div_lo(c); |
1011 | u8 reg_hi = get_mult_div_hi(c); | |
d16005f8 PC |
1012 | jit_state_t *_jit = block->_jit; |
1013 | jit_node_t *branch, *to_end; | |
fd58fa32 | 1014 | u8 lo = 0, hi = 0, rs, rt, rflags = 0; |
d16005f8 PC |
1015 | |
1016 | jit_note(__FILE__, __LINE__); | |
d16005f8 | 1017 | |
98fa08a5 PC |
1018 | if (is_signed) |
1019 | rflags = REG_EXT; | |
1020 | else | |
1021 | rflags = REG_ZEXT; | |
1022 | ||
1023 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rs, rflags); | |
1024 | rt = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rt, rflags); | |
1025 | ||
03535202 | 1026 | if (!op_flag_no_lo(flags)) |
98fa08a5 PC |
1027 | lo = lightrec_alloc_reg_out(reg_cache, _jit, reg_lo, 0); |
1028 | ||
03535202 | 1029 | if (!op_flag_no_hi(flags)) |
98fa08a5 | 1030 | hi = lightrec_alloc_reg_out(reg_cache, _jit, reg_hi, 0); |
d16005f8 PC |
1031 | |
1032 | /* Jump to special handler if dividing by zero */ | |
98fa08a5 PC |
1033 | if (!no_check) |
1034 | branch = jit_beqi(rt, 0); | |
d16005f8 | 1035 | |
03535202 | 1036 | if (op_flag_no_lo(flags)) { |
98fa08a5 PC |
1037 | if (is_signed) |
1038 | jit_remr(hi, rs, rt); | |
1039 | else | |
1040 | jit_remr_u(hi, rs, rt); | |
03535202 | 1041 | } else if (op_flag_no_hi(flags)) { |
98fa08a5 PC |
1042 | if (is_signed) |
1043 | jit_divr(lo, rs, rt); | |
1044 | else | |
1045 | jit_divr_u(lo, rs, rt); | |
d16005f8 | 1046 | } else { |
98fa08a5 PC |
1047 | if (is_signed) |
1048 | jit_qdivr(lo, hi, rs, rt); | |
1049 | else | |
1050 | jit_qdivr_u(lo, hi, rs, rt); | |
d16005f8 | 1051 | } |
d16005f8 | 1052 | |
98fa08a5 | 1053 | if (!no_check) { |
98fa08a5 | 1054 | /* Jump above the div-by-zero handler */ |
22eee2ac | 1055 | to_end = jit_b(); |
d16005f8 | 1056 | |
98fa08a5 PC |
1057 | jit_patch(branch); |
1058 | ||
03535202 | 1059 | if (!op_flag_no_lo(flags)) { |
98fa08a5 | 1060 | if (is_signed) { |
9259d748 | 1061 | jit_ltr(lo, rs, rt); |
98fa08a5 PC |
1062 | jit_lshi(lo, lo, 1); |
1063 | jit_subi(lo, lo, 1); | |
1064 | } else { | |
9259d748 | 1065 | jit_subi(lo, rt, 1); |
98fa08a5 PC |
1066 | } |
1067 | } | |
d16005f8 | 1068 | |
03535202 | 1069 | if (!op_flag_no_hi(flags)) |
98fa08a5 | 1070 | jit_movr(hi, rs); |
d16005f8 | 1071 | |
98fa08a5 PC |
1072 | jit_patch(to_end); |
1073 | } | |
d16005f8 PC |
1074 | |
1075 | lightrec_free_reg(reg_cache, rs); | |
1076 | lightrec_free_reg(reg_cache, rt); | |
98fa08a5 | 1077 | |
03535202 | 1078 | if (!op_flag_no_lo(flags)) |
98fa08a5 PC |
1079 | lightrec_free_reg(reg_cache, lo); |
1080 | ||
03535202 | 1081 | if (!op_flag_no_hi(flags)) |
98fa08a5 | 1082 | lightrec_free_reg(reg_cache, hi); |
d16005f8 PC |
1083 | } |
1084 | ||
98fa08a5 PC |
1085 | static void rec_special_MULT(struct lightrec_cstate *state, |
1086 | const struct block *block, u16 offset) | |
d16005f8 PC |
1087 | { |
1088 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 1089 | rec_alu_mult(state, block, offset, true); |
d16005f8 PC |
1090 | } |
1091 | ||
98fa08a5 PC |
1092 | static void rec_special_MULTU(struct lightrec_cstate *state, |
1093 | const struct block *block, u16 offset) | |
d16005f8 PC |
1094 | { |
1095 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 1096 | rec_alu_mult(state, block, offset, false); |
d16005f8 PC |
1097 | } |
1098 | ||
98fa08a5 PC |
1099 | static void rec_special_DIV(struct lightrec_cstate *state, |
1100 | const struct block *block, u16 offset) | |
d16005f8 PC |
1101 | { |
1102 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 1103 | rec_alu_div(state, block, offset, true); |
d16005f8 PC |
1104 | } |
1105 | ||
98fa08a5 PC |
1106 | static void rec_special_DIVU(struct lightrec_cstate *state, |
1107 | const struct block *block, u16 offset) | |
d16005f8 PC |
1108 | { |
1109 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 1110 | rec_alu_div(state, block, offset, false); |
d16005f8 PC |
1111 | } |
1112 | ||
98fa08a5 | 1113 | static void rec_alu_mv_lo_hi(struct lightrec_cstate *state, |
684432ad PC |
1114 | const struct block *block, u16 offset, |
1115 | u8 dst, u8 src) | |
d16005f8 | 1116 | { |
98fa08a5 | 1117 | struct regcache *reg_cache = state->reg_cache; |
d16005f8 PC |
1118 | jit_state_t *_jit = block->_jit; |
1119 | ||
1120 | jit_note(__FILE__, __LINE__); | |
684432ad PC |
1121 | |
1122 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], | |
1123 | src, dst, 0, REG_EXT, &src, &dst); | |
d16005f8 | 1124 | |
d16005f8 | 1125 | jit_extr_i(dst, src); |
d16005f8 PC |
1126 | |
1127 | lightrec_free_reg(reg_cache, src); | |
1128 | lightrec_free_reg(reg_cache, dst); | |
1129 | } | |
1130 | ||
98fa08a5 PC |
1131 | static void rec_special_MFHI(struct lightrec_cstate *state, |
1132 | const struct block *block, u16 offset) | |
d16005f8 | 1133 | { |
98fa08a5 PC |
1134 | union code c = block->opcode_list[offset].c; |
1135 | ||
d16005f8 | 1136 | _jit_name(block->_jit, __func__); |
684432ad | 1137 | rec_alu_mv_lo_hi(state, block, offset, c.r.rd, REG_HI); |
d16005f8 PC |
1138 | } |
1139 | ||
98fa08a5 PC |
1140 | static void rec_special_MTHI(struct lightrec_cstate *state, |
1141 | const struct block *block, u16 offset) | |
d16005f8 | 1142 | { |
98fa08a5 PC |
1143 | union code c = block->opcode_list[offset].c; |
1144 | ||
d16005f8 | 1145 | _jit_name(block->_jit, __func__); |
684432ad | 1146 | rec_alu_mv_lo_hi(state, block, offset, REG_HI, c.r.rs); |
d16005f8 PC |
1147 | } |
1148 | ||
98fa08a5 PC |
1149 | static void rec_special_MFLO(struct lightrec_cstate *state, |
1150 | const struct block *block, u16 offset) | |
d16005f8 | 1151 | { |
98fa08a5 PC |
1152 | union code c = block->opcode_list[offset].c; |
1153 | ||
d16005f8 | 1154 | _jit_name(block->_jit, __func__); |
684432ad | 1155 | rec_alu_mv_lo_hi(state, block, offset, c.r.rd, REG_LO); |
d16005f8 PC |
1156 | } |
1157 | ||
98fa08a5 PC |
1158 | static void rec_special_MTLO(struct lightrec_cstate *state, |
1159 | const struct block *block, u16 offset) | |
d16005f8 | 1160 | { |
98fa08a5 PC |
1161 | union code c = block->opcode_list[offset].c; |
1162 | ||
d16005f8 | 1163 | _jit_name(block->_jit, __func__); |
684432ad | 1164 | rec_alu_mv_lo_hi(state, block, offset, REG_LO, c.r.rs); |
d16005f8 PC |
1165 | } |
1166 | ||
ba3814c1 PC |
1167 | static void call_to_c_wrapper(struct lightrec_cstate *state, |
1168 | const struct block *block, u32 arg, | |
1169 | enum c_wrappers wrapper) | |
d16005f8 | 1170 | { |
98fa08a5 | 1171 | struct regcache *reg_cache = state->reg_cache; |
d16005f8 | 1172 | jit_state_t *_jit = block->_jit; |
ba3814c1 | 1173 | s8 tmp, tmp2; |
d16005f8 | 1174 | |
ba3814c1 PC |
1175 | /* Make sure JIT_R1 is not mapped; it will be used in the C wrapper. */ |
1176 | tmp2 = lightrec_alloc_reg(reg_cache, _jit, JIT_R1); | |
d16005f8 | 1177 | |
ba3814c1 PC |
1178 | tmp = lightrec_get_reg_with_value(reg_cache, |
1179 | (intptr_t) state->state->wrappers_eps[wrapper]); | |
1180 | if (tmp < 0) { | |
1181 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); | |
1182 | jit_ldxi(tmp, LIGHTREC_REG_STATE, | |
1183 | offsetof(struct lightrec_state, wrappers_eps[wrapper])); | |
1184 | ||
1185 | lightrec_temp_set_value(reg_cache, tmp, | |
1186 | (intptr_t) state->state->wrappers_eps[wrapper]); | |
22eee2ac PC |
1187 | } |
1188 | ||
ba3814c1 PC |
1189 | lightrec_free_reg(reg_cache, tmp2); |
1190 | ||
1191 | #ifdef __mips__ | |
1192 | /* On MIPS, register t9 is always used as the target register for JALR. | |
1193 | * Therefore if it does not contain the target address we must | |
1194 | * invalidate it. */ | |
1195 | if (tmp != _T9) | |
1196 | lightrec_unload_reg(reg_cache, _jit, _T9); | |
1197 | #endif | |
1198 | ||
1199 | jit_prepare(); | |
1200 | jit_pushargi(arg); | |
1201 | ||
22eee2ac | 1202 | lightrec_regcache_mark_live(reg_cache, _jit); |
98fa08a5 | 1203 | jit_callr(tmp); |
d16005f8 | 1204 | |
98fa08a5 | 1205 | lightrec_free_reg(reg_cache, tmp); |
98fa08a5 PC |
1206 | lightrec_regcache_mark_live(reg_cache, _jit); |
1207 | } | |
1208 | ||
1209 | static void rec_io(struct lightrec_cstate *state, | |
1210 | const struct block *block, u16 offset, | |
1211 | bool load_rt, bool read_rt) | |
1212 | { | |
1213 | struct regcache *reg_cache = state->reg_cache; | |
1214 | jit_state_t *_jit = block->_jit; | |
1215 | union code c = block->opcode_list[offset].c; | |
03535202 | 1216 | u32 flags = block->opcode_list[offset].flags; |
22eee2ac | 1217 | bool is_tagged = LIGHTREC_FLAGS_GET_IO_MODE(flags); |
98fa08a5 | 1218 | u32 lut_entry; |
cb72ea13 | 1219 | u8 zero; |
d16005f8 | 1220 | |
98fa08a5 | 1221 | jit_note(__FILE__, __LINE__); |
d16005f8 | 1222 | |
98fa08a5 PC |
1223 | lightrec_clean_reg_if_loaded(reg_cache, _jit, c.i.rs, false); |
1224 | ||
1225 | if (read_rt && likely(c.i.rt)) | |
1226 | lightrec_clean_reg_if_loaded(reg_cache, _jit, c.i.rt, true); | |
d16005f8 | 1227 | else if (load_rt) |
98fa08a5 | 1228 | lightrec_clean_reg_if_loaded(reg_cache, _jit, c.i.rt, false); |
d16005f8 | 1229 | |
cb72ea13 PC |
1230 | if (op_flag_load_delay(flags) && !state->no_load_delay) { |
1231 | /* Clear state->in_delay_slot_n. This notifies the lightrec_rw | |
1232 | * wrapper that it should write the REG_TEMP register instead of | |
1233 | * the actual output register of the opcode. */ | |
1234 | zero = lightrec_alloc_reg_in(reg_cache, _jit, 0, 0); | |
1235 | jit_stxi_c(offsetof(struct lightrec_state, in_delay_slot_n), | |
1236 | LIGHTREC_REG_STATE, zero); | |
1237 | lightrec_free_reg(reg_cache, zero); | |
1238 | } | |
1239 | ||
d16005f8 | 1240 | if (is_tagged) { |
ba3814c1 | 1241 | call_to_c_wrapper(state, block, c.opcode, C_WRAPPER_RW); |
d16005f8 | 1242 | } else { |
98fa08a5 PC |
1243 | lut_entry = lightrec_get_lut_entry(block); |
1244 | call_to_c_wrapper(state, block, (lut_entry << 16) | offset, | |
ba3814c1 | 1245 | C_WRAPPER_RW_GENERIC); |
d16005f8 | 1246 | } |
d16005f8 PC |
1247 | } |
1248 | ||
f5ee77ca | 1249 | static u32 rec_ram_mask(const struct lightrec_state *state) |
02487de7 PC |
1250 | { |
1251 | return (RAM_SIZE << (state->mirrors_mapped * 2)) - 1; | |
1252 | } | |
1253 | ||
13b02197 PC |
1254 | static u32 rec_io_mask(const struct lightrec_state *state) |
1255 | { | |
1256 | u32 length = state->maps[PSX_MAP_HW_REGISTERS].length; | |
1257 | ||
2ec79b77 | 1258 | return 0x1f800000 | GENMASK(31 - clz32(length - 1), 0); |
13b02197 PC |
1259 | } |
1260 | ||
22eee2ac PC |
1261 | static void rec_store_memory(struct lightrec_cstate *cstate, |
1262 | const struct block *block, | |
1263 | u16 offset, jit_code_t code, | |
02487de7 | 1264 | jit_code_t swap_code, |
22eee2ac PC |
1265 | uintptr_t addr_offset, u32 addr_mask, |
1266 | bool invalidate) | |
1267 | { | |
02487de7 | 1268 | const struct lightrec_state *state = cstate->state; |
22eee2ac PC |
1269 | struct regcache *reg_cache = cstate->reg_cache; |
1270 | struct opcode *op = &block->opcode_list[offset]; | |
1271 | jit_state_t *_jit = block->_jit; | |
1272 | union code c = op->c; | |
f5ee77ca | 1273 | u8 rs, rt, tmp = 0, tmp2 = 0, tmp3, addr_reg, addr_reg2; |
22eee2ac | 1274 | s16 imm = (s16)c.i.imm; |
02487de7 | 1275 | s32 simm = (s32)imm << (1 - lut_is_32bit(state)); |
22eee2ac | 1276 | s32 lut_offt = offsetof(struct lightrec_state, code_lut); |
03535202 | 1277 | bool no_mask = op_flag_no_mask(op->flags); |
02487de7 | 1278 | bool add_imm = c.i.imm && |
5459088b PC |
1279 | (c.i.op == OP_META_SWU |
1280 | || (!state->mirrors_mapped && !no_mask) || (invalidate && | |
02487de7 | 1281 | ((imm & 0x3) || simm + lut_offt != (s16)(simm + lut_offt)))); |
684432ad | 1282 | bool need_tmp = !no_mask || add_imm || invalidate; |
9259d748 | 1283 | bool swc2 = c.i.op == OP_SWC2; |
cb72ea13 | 1284 | u8 in_reg = swc2 ? REG_TEMP : c.i.rt; |
684432ad | 1285 | s8 reg_imm; |
22eee2ac | 1286 | |
22eee2ac PC |
1287 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.i.rs, 0); |
1288 | if (need_tmp) | |
1289 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); | |
1290 | ||
1291 | addr_reg = rs; | |
1292 | ||
1293 | if (add_imm) { | |
1294 | jit_addi(tmp, addr_reg, (s16)c.i.imm); | |
0e720fb1 | 1295 | lightrec_free_reg(reg_cache, rs); |
22eee2ac PC |
1296 | addr_reg = tmp; |
1297 | imm = 0; | |
1298 | } else if (simm) { | |
1299 | lut_offt += simm; | |
1300 | } | |
1301 | ||
1302 | if (!no_mask) { | |
684432ad PC |
1303 | reg_imm = lightrec_alloc_reg_temp_with_value(reg_cache, _jit, |
1304 | addr_mask); | |
1305 | ||
1306 | jit_andr(tmp, addr_reg, reg_imm); | |
22eee2ac | 1307 | addr_reg = tmp; |
684432ad PC |
1308 | |
1309 | lightrec_free_reg(reg_cache, reg_imm); | |
22eee2ac PC |
1310 | } |
1311 | ||
22eee2ac | 1312 | if (addr_offset) { |
684432ad PC |
1313 | reg_imm = lightrec_alloc_reg_temp_with_value(reg_cache, _jit, |
1314 | addr_offset); | |
ba3814c1 | 1315 | tmp2 = lightrec_alloc_reg_temp(reg_cache, _jit); |
684432ad | 1316 | jit_addr(tmp2, addr_reg, reg_imm); |
22eee2ac | 1317 | addr_reg2 = tmp2; |
684432ad PC |
1318 | |
1319 | lightrec_free_reg(reg_cache, reg_imm); | |
22eee2ac PC |
1320 | } else { |
1321 | addr_reg2 = addr_reg; | |
1322 | } | |
1323 | ||
684432ad PC |
1324 | rt = lightrec_alloc_reg_in(reg_cache, _jit, in_reg, 0); |
1325 | ||
9259d748 | 1326 | if (is_big_endian() && swap_code && in_reg) { |
02487de7 PC |
1327 | tmp3 = lightrec_alloc_reg_temp(reg_cache, _jit); |
1328 | ||
1329 | jit_new_node_ww(swap_code, tmp3, rt); | |
5459088b PC |
1330 | |
1331 | if (c.i.op == OP_META_SWU) | |
1332 | jit_unstr(addr_reg2, tmp3, LIGHTNING_UNALIGNED_32BIT); | |
1333 | else | |
1334 | jit_new_node_www(code, imm, addr_reg2, tmp3); | |
02487de7 PC |
1335 | |
1336 | lightrec_free_reg(reg_cache, tmp3); | |
5459088b PC |
1337 | } else if (c.i.op == OP_META_SWU) { |
1338 | jit_unstr(addr_reg2, rt, LIGHTNING_UNALIGNED_32BIT); | |
02487de7 PC |
1339 | } else { |
1340 | jit_new_node_www(code, imm, addr_reg2, rt); | |
1341 | } | |
1342 | ||
22eee2ac PC |
1343 | lightrec_free_reg(reg_cache, rt); |
1344 | ||
1345 | if (invalidate) { | |
1346 | tmp3 = lightrec_alloc_reg_in(reg_cache, _jit, 0, 0); | |
1347 | ||
1348 | if (c.i.op != OP_SW) { | |
ba3814c1 PC |
1349 | jit_andi(tmp, addr_reg, ~3); |
1350 | addr_reg = tmp; | |
22eee2ac PC |
1351 | } |
1352 | ||
02487de7 | 1353 | if (!lut_is_32bit(state)) { |
ba3814c1 PC |
1354 | jit_lshi(tmp, addr_reg, 1); |
1355 | addr_reg = tmp; | |
22eee2ac PC |
1356 | } |
1357 | ||
02487de7 PC |
1358 | if (addr_reg == rs && c.i.rs == 0) { |
1359 | addr_reg = LIGHTREC_REG_STATE; | |
1360 | } else { | |
cb72ea13 | 1361 | jit_add_state(tmp, addr_reg); |
ba3814c1 | 1362 | addr_reg = tmp; |
22eee2ac PC |
1363 | } |
1364 | ||
02487de7 PC |
1365 | if (lut_is_32bit(state)) |
1366 | jit_stxi_i(lut_offt, addr_reg, tmp3); | |
1367 | else | |
1368 | jit_stxi(lut_offt, addr_reg, tmp3); | |
22eee2ac PC |
1369 | |
1370 | lightrec_free_reg(reg_cache, tmp3); | |
1371 | } | |
1372 | ||
ba3814c1 | 1373 | if (addr_offset) |
22eee2ac PC |
1374 | lightrec_free_reg(reg_cache, tmp2); |
1375 | if (need_tmp) | |
1376 | lightrec_free_reg(reg_cache, tmp); | |
1377 | lightrec_free_reg(reg_cache, rs); | |
1378 | } | |
1379 | ||
1380 | static void rec_store_ram(struct lightrec_cstate *cstate, | |
1381 | const struct block *block, | |
1382 | u16 offset, jit_code_t code, | |
02487de7 | 1383 | jit_code_t swap_code, bool invalidate) |
22eee2ac | 1384 | { |
f5ee77ca | 1385 | const struct lightrec_state *state = cstate->state; |
02487de7 | 1386 | |
22eee2ac PC |
1387 | _jit_note(block->_jit, __FILE__, __LINE__); |
1388 | ||
02487de7 PC |
1389 | return rec_store_memory(cstate, block, offset, code, swap_code, |
1390 | state->offset_ram, rec_ram_mask(state), | |
1391 | invalidate); | |
22eee2ac PC |
1392 | } |
1393 | ||
1394 | static void rec_store_scratch(struct lightrec_cstate *cstate, | |
02487de7 PC |
1395 | const struct block *block, u16 offset, |
1396 | jit_code_t code, jit_code_t swap_code) | |
22eee2ac PC |
1397 | { |
1398 | _jit_note(block->_jit, __FILE__, __LINE__); | |
1399 | ||
02487de7 | 1400 | return rec_store_memory(cstate, block, offset, code, swap_code, |
22eee2ac PC |
1401 | cstate->state->offset_scratch, |
1402 | 0x1fffffff, false); | |
1403 | } | |
1404 | ||
ba3814c1 PC |
1405 | static void rec_store_io(struct lightrec_cstate *cstate, |
1406 | const struct block *block, u16 offset, | |
1407 | jit_code_t code, jit_code_t swap_code) | |
1408 | { | |
1409 | _jit_note(block->_jit, __FILE__, __LINE__); | |
1410 | ||
1411 | return rec_store_memory(cstate, block, offset, code, swap_code, | |
1412 | cstate->state->offset_io, | |
13b02197 | 1413 | rec_io_mask(cstate->state), false); |
ba3814c1 PC |
1414 | } |
1415 | ||
98fa08a5 PC |
1416 | static void rec_store_direct_no_invalidate(struct lightrec_cstate *cstate, |
1417 | const struct block *block, | |
02487de7 PC |
1418 | u16 offset, jit_code_t code, |
1419 | jit_code_t swap_code) | |
d16005f8 | 1420 | { |
f5ee77ca | 1421 | const struct lightrec_state *state = cstate->state; |
98fa08a5 PC |
1422 | struct regcache *reg_cache = cstate->reg_cache; |
1423 | union code c = block->opcode_list[offset].c; | |
d16005f8 PC |
1424 | jit_state_t *_jit = block->_jit; |
1425 | jit_node_t *to_not_ram, *to_end; | |
9259d748 | 1426 | bool swc2 = c.i.op == OP_SWC2; |
684432ad PC |
1427 | u8 tmp, tmp2 = 0, rs, rt, in_reg = swc2 ? REG_TEMP : c.i.rt; |
1428 | u32 addr_mask; | |
1429 | s32 reg_imm; | |
d16005f8 PC |
1430 | s16 imm; |
1431 | ||
1432 | jit_note(__FILE__, __LINE__); | |
98fa08a5 | 1433 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.i.rs, 0); |
d16005f8 | 1434 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); |
98fa08a5 | 1435 | |
684432ad PC |
1436 | if (state->mirrors_mapped) |
1437 | addr_mask = 0x1f800000 | (4 * RAM_SIZE - 1); | |
1438 | else | |
1439 | addr_mask = 0x1f800000 | (RAM_SIZE - 1); | |
1440 | ||
1441 | reg_imm = lightrec_alloc_reg_temp_with_value(reg_cache, _jit, addr_mask); | |
d16005f8 PC |
1442 | |
1443 | /* Convert to KUNSEG and avoid RAM mirrors */ | |
5459088b | 1444 | if ((c.i.op == OP_META_SWU || !state->mirrors_mapped) && c.i.imm) { |
d16005f8 | 1445 | imm = 0; |
98fa08a5 | 1446 | jit_addi(tmp, rs, (s16)c.i.imm); |
684432ad | 1447 | jit_andr(tmp, tmp, reg_imm); |
d16005f8 | 1448 | } else { |
684432ad PC |
1449 | imm = (s16)c.i.imm; |
1450 | jit_andr(tmp, rs, reg_imm); | |
d16005f8 PC |
1451 | } |
1452 | ||
1453 | lightrec_free_reg(reg_cache, rs); | |
684432ad | 1454 | lightrec_free_reg(reg_cache, reg_imm); |
d16005f8 PC |
1455 | |
1456 | if (state->offset_ram != state->offset_scratch) { | |
684432ad PC |
1457 | tmp2 = lightrec_alloc_reg_temp(reg_cache, _jit); |
1458 | ||
d16005f8 PC |
1459 | to_not_ram = jit_bmsi(tmp, BIT(28)); |
1460 | ||
1461 | jit_movi(tmp2, state->offset_ram); | |
1462 | ||
22eee2ac | 1463 | to_end = jit_b(); |
d16005f8 PC |
1464 | jit_patch(to_not_ram); |
1465 | ||
1466 | jit_movi(tmp2, state->offset_scratch); | |
1467 | jit_patch(to_end); | |
1468 | } else if (state->offset_ram) { | |
684432ad PC |
1469 | tmp2 = lightrec_alloc_reg_temp_with_value(reg_cache, _jit, |
1470 | state->offset_ram); | |
d16005f8 PC |
1471 | } |
1472 | ||
684432ad | 1473 | if (state->offset_ram || state->offset_scratch) { |
d16005f8 | 1474 | jit_addr(tmp, tmp, tmp2); |
98fa08a5 PC |
1475 | lightrec_free_reg(reg_cache, tmp2); |
1476 | } | |
d16005f8 | 1477 | |
9259d748 | 1478 | rt = lightrec_alloc_reg_in(reg_cache, _jit, in_reg, 0); |
ba3814c1 | 1479 | |
9259d748 | 1480 | if (is_big_endian() && swap_code && in_reg) { |
02487de7 PC |
1481 | tmp2 = lightrec_alloc_reg_temp(reg_cache, _jit); |
1482 | ||
1483 | jit_new_node_ww(swap_code, tmp2, rt); | |
5459088b PC |
1484 | |
1485 | if (c.i.op == OP_META_SWU) | |
1486 | jit_unstr(tmp, tmp2, LIGHTNING_UNALIGNED_32BIT); | |
1487 | else | |
1488 | jit_new_node_www(code, imm, tmp, tmp2); | |
02487de7 PC |
1489 | |
1490 | lightrec_free_reg(reg_cache, tmp2); | |
5459088b PC |
1491 | } else if (c.i.op == OP_META_SWU) { |
1492 | jit_unstr(tmp, rt, LIGHTNING_UNALIGNED_32BIT); | |
02487de7 PC |
1493 | } else { |
1494 | jit_new_node_www(code, imm, tmp, rt); | |
1495 | } | |
d16005f8 PC |
1496 | |
1497 | lightrec_free_reg(reg_cache, rt); | |
1498 | lightrec_free_reg(reg_cache, tmp); | |
1499 | } | |
1500 | ||
98fa08a5 | 1501 | static void rec_store_direct(struct lightrec_cstate *cstate, const struct block *block, |
02487de7 | 1502 | u16 offset, jit_code_t code, jit_code_t swap_code) |
d16005f8 | 1503 | { |
f5ee77ca | 1504 | const struct lightrec_state *state = cstate->state; |
98fa08a5 PC |
1505 | u32 ram_size = state->mirrors_mapped ? RAM_SIZE * 4 : RAM_SIZE; |
1506 | struct regcache *reg_cache = cstate->reg_cache; | |
1507 | union code c = block->opcode_list[offset].c; | |
d16005f8 | 1508 | jit_state_t *_jit = block->_jit; |
98fa08a5 | 1509 | jit_node_t *to_not_ram, *to_end; |
9259d748 PC |
1510 | bool swc2 = c.i.op == OP_SWC2; |
1511 | u8 tmp, tmp2, tmp3, masked_reg, rs, rt; | |
cb72ea13 | 1512 | u8 in_reg = swc2 ? REG_TEMP : c.i.rt; |
684432ad | 1513 | u32 addr_mask = 0x1f800000 | (ram_size - 1); |
f5ee77ca | 1514 | bool different_offsets = state->offset_ram != state->offset_scratch; |
684432ad | 1515 | s32 reg_imm; |
d16005f8 PC |
1516 | |
1517 | jit_note(__FILE__, __LINE__); | |
1518 | ||
98fa08a5 | 1519 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.i.rs, 0); |
d16005f8 | 1520 | tmp2 = lightrec_alloc_reg_temp(reg_cache, _jit); |
98fa08a5 | 1521 | tmp3 = lightrec_alloc_reg_in(reg_cache, _jit, 0, 0); |
d16005f8 | 1522 | |
684432ad PC |
1523 | reg_imm = lightrec_alloc_reg_temp_with_value(reg_cache, _jit, addr_mask); |
1524 | ||
d16005f8 | 1525 | /* Convert to KUNSEG and avoid RAM mirrors */ |
98fa08a5 PC |
1526 | if (c.i.imm) { |
1527 | jit_addi(tmp2, rs, (s16)c.i.imm); | |
684432ad | 1528 | jit_andr(tmp2, tmp2, reg_imm); |
d16005f8 | 1529 | } else { |
684432ad | 1530 | jit_andr(tmp2, rs, reg_imm); |
d16005f8 PC |
1531 | } |
1532 | ||
1533 | lightrec_free_reg(reg_cache, rs); | |
684432ad | 1534 | lightrec_free_reg(reg_cache, reg_imm); |
d16005f8 PC |
1535 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); |
1536 | ||
f5ee77ca | 1537 | if (different_offsets) { |
9259d748 PC |
1538 | to_not_ram = jit_bgti(tmp2, ram_size); |
1539 | masked_reg = tmp2; | |
1540 | } else { | |
1541 | jit_lti_u(tmp, tmp2, ram_size); | |
1542 | jit_movnr(tmp, tmp2, tmp); | |
1543 | masked_reg = tmp; | |
1544 | } | |
98fa08a5 | 1545 | |
d16005f8 | 1546 | /* Compute the offset to the code LUT */ |
9259d748 PC |
1547 | if (c.i.op == OP_SW) |
1548 | jit_andi(tmp, masked_reg, RAM_SIZE - 1); | |
1549 | else | |
1550 | jit_andi(tmp, masked_reg, (RAM_SIZE - 1) & ~3); | |
1551 | ||
02487de7 | 1552 | if (!lut_is_32bit(state)) |
98fa08a5 | 1553 | jit_lshi(tmp, tmp, 1); |
cb72ea13 | 1554 | jit_add_state(tmp, tmp); |
d16005f8 PC |
1555 | |
1556 | /* Write NULL to the code LUT to invalidate any block that's there */ | |
02487de7 PC |
1557 | if (lut_is_32bit(state)) |
1558 | jit_stxi_i(offsetof(struct lightrec_state, code_lut), tmp, tmp3); | |
1559 | else | |
1560 | jit_stxi(offsetof(struct lightrec_state, code_lut), tmp, tmp3); | |
d16005f8 | 1561 | |
5459088b PC |
1562 | if (c.i.op == OP_META_SWU) { |
1563 | /* With a SWU opcode, we might have touched the following 32-bit | |
1564 | * word, so invalidate it as well */ | |
1565 | if (lut_is_32bit(state)) { | |
1566 | jit_stxi_i(offsetof(struct lightrec_state, code_lut) + 4, | |
1567 | tmp, tmp3); | |
1568 | } else { | |
1569 | jit_stxi(offsetof(struct lightrec_state, code_lut) | |
1570 | + sizeof(uintptr_t), tmp, tmp3); | |
1571 | } | |
1572 | } | |
1573 | ||
f5ee77ca | 1574 | if (different_offsets) { |
d16005f8 PC |
1575 | jit_movi(tmp, state->offset_ram); |
1576 | ||
22eee2ac | 1577 | to_end = jit_b(); |
9259d748 | 1578 | jit_patch(to_not_ram); |
d16005f8 PC |
1579 | } |
1580 | ||
d16005f8 PC |
1581 | if (state->offset_ram || state->offset_scratch) |
1582 | jit_movi(tmp, state->offset_scratch); | |
1583 | ||
f5ee77ca | 1584 | if (different_offsets) |
d16005f8 PC |
1585 | jit_patch(to_end); |
1586 | ||
1587 | if (state->offset_ram || state->offset_scratch) | |
1588 | jit_addr(tmp2, tmp2, tmp); | |
1589 | ||
1590 | lightrec_free_reg(reg_cache, tmp); | |
1591 | lightrec_free_reg(reg_cache, tmp3); | |
1592 | ||
9259d748 | 1593 | rt = lightrec_alloc_reg_in(reg_cache, _jit, in_reg, 0); |
02487de7 | 1594 | |
9259d748 | 1595 | if (is_big_endian() && swap_code && in_reg) { |
02487de7 PC |
1596 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); |
1597 | ||
1598 | jit_new_node_ww(swap_code, tmp, rt); | |
5459088b PC |
1599 | |
1600 | if (c.i.op == OP_META_SWU) | |
1601 | jit_unstr(tmp2, tmp, LIGHTNING_UNALIGNED_32BIT); | |
1602 | else | |
1603 | jit_new_node_www(code, 0, tmp2, tmp); | |
02487de7 PC |
1604 | |
1605 | lightrec_free_reg(reg_cache, tmp); | |
5459088b PC |
1606 | } else if (c.i.op == OP_META_SWU) { |
1607 | jit_unstr(tmp2, rt, LIGHTNING_UNALIGNED_32BIT); | |
02487de7 PC |
1608 | } else { |
1609 | jit_new_node_www(code, 0, tmp2, rt); | |
1610 | } | |
d16005f8 PC |
1611 | |
1612 | lightrec_free_reg(reg_cache, rt); | |
1613 | lightrec_free_reg(reg_cache, tmp2); | |
1614 | } | |
1615 | ||
98fa08a5 | 1616 | static void rec_store(struct lightrec_cstate *state, |
02487de7 PC |
1617 | const struct block *block, u16 offset, |
1618 | jit_code_t code, jit_code_t swap_code) | |
d16005f8 | 1619 | { |
03535202 | 1620 | u32 flags = block->opcode_list[offset].flags; |
9259d748 | 1621 | u32 mode = LIGHTREC_FLAGS_GET_IO_MODE(flags); |
03535202 | 1622 | bool no_invalidate = op_flag_no_invalidate(flags) || |
684432ad | 1623 | (state->state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY); |
9259d748 PC |
1624 | union code c = block->opcode_list[offset].c; |
1625 | bool is_swc2 = c.i.op == OP_SWC2; | |
1626 | ||
1627 | if (is_swc2) { | |
1628 | switch (mode) { | |
1629 | case LIGHTREC_IO_RAM: | |
1630 | case LIGHTREC_IO_SCRATCH: | |
1631 | case LIGHTREC_IO_DIRECT: | |
1632 | case LIGHTREC_IO_DIRECT_HW: | |
cb72ea13 | 1633 | rec_cp2_do_mfc2(state, block, offset, c.i.rt, REG_TEMP); |
9259d748 PC |
1634 | break; |
1635 | default: | |
1636 | break; | |
1637 | } | |
1638 | } | |
22eee2ac | 1639 | |
9259d748 | 1640 | switch (mode) { |
22eee2ac | 1641 | case LIGHTREC_IO_RAM: |
02487de7 PC |
1642 | rec_store_ram(state, block, offset, code, |
1643 | swap_code, !no_invalidate); | |
22eee2ac PC |
1644 | break; |
1645 | case LIGHTREC_IO_SCRATCH: | |
02487de7 | 1646 | rec_store_scratch(state, block, offset, code, swap_code); |
22eee2ac PC |
1647 | break; |
1648 | case LIGHTREC_IO_DIRECT: | |
02487de7 PC |
1649 | if (no_invalidate) { |
1650 | rec_store_direct_no_invalidate(state, block, offset, | |
1651 | code, swap_code); | |
1652 | } else { | |
1653 | rec_store_direct(state, block, offset, code, swap_code); | |
1654 | } | |
22eee2ac | 1655 | break; |
ba3814c1 PC |
1656 | case LIGHTREC_IO_DIRECT_HW: |
1657 | rec_store_io(state, block, offset, code, swap_code); | |
1658 | break; | |
22eee2ac | 1659 | default: |
98fa08a5 | 1660 | rec_io(state, block, offset, true, false); |
9259d748 | 1661 | return; |
d16005f8 | 1662 | } |
9259d748 PC |
1663 | |
1664 | if (is_swc2) | |
cb72ea13 | 1665 | lightrec_discard_reg_if_loaded(state->reg_cache, REG_TEMP); |
d16005f8 PC |
1666 | } |
1667 | ||
98fa08a5 PC |
1668 | static void rec_SB(struct lightrec_cstate *state, |
1669 | const struct block *block, u16 offset) | |
d16005f8 PC |
1670 | { |
1671 | _jit_name(block->_jit, __func__); | |
02487de7 | 1672 | rec_store(state, block, offset, jit_code_stxi_c, 0); |
d16005f8 PC |
1673 | } |
1674 | ||
98fa08a5 PC |
1675 | static void rec_SH(struct lightrec_cstate *state, |
1676 | const struct block *block, u16 offset) | |
d16005f8 PC |
1677 | { |
1678 | _jit_name(block->_jit, __func__); | |
02487de7 PC |
1679 | rec_store(state, block, offset, |
1680 | jit_code_stxi_s, jit_code_bswapr_us); | |
d16005f8 PC |
1681 | } |
1682 | ||
98fa08a5 PC |
1683 | static void rec_SW(struct lightrec_cstate *state, |
1684 | const struct block *block, u16 offset) | |
1685 | ||
d16005f8 | 1686 | { |
9259d748 PC |
1687 | union code c = block->opcode_list[offset].c; |
1688 | ||
1689 | _jit_name(block->_jit, c.i.op == OP_SWC2 ? "rec_SWC2" : "rec_SW"); | |
02487de7 PC |
1690 | rec_store(state, block, offset, |
1691 | jit_code_stxi_i, jit_code_bswapr_ui); | |
d16005f8 PC |
1692 | } |
1693 | ||
98fa08a5 PC |
1694 | static void rec_SWL(struct lightrec_cstate *state, |
1695 | const struct block *block, u16 offset) | |
d16005f8 PC |
1696 | { |
1697 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 1698 | rec_io(state, block, offset, true, false); |
d16005f8 PC |
1699 | } |
1700 | ||
98fa08a5 PC |
1701 | static void rec_SWR(struct lightrec_cstate *state, |
1702 | const struct block *block, u16 offset) | |
d16005f8 PC |
1703 | { |
1704 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 1705 | rec_io(state, block, offset, true, false); |
d16005f8 PC |
1706 | } |
1707 | ||
22eee2ac | 1708 | static void rec_load_memory(struct lightrec_cstate *cstate, |
02487de7 PC |
1709 | const struct block *block, u16 offset, |
1710 | jit_code_t code, jit_code_t swap_code, bool is_unsigned, | |
22eee2ac PC |
1711 | uintptr_t addr_offset, u32 addr_mask) |
1712 | { | |
1713 | struct regcache *reg_cache = cstate->reg_cache; | |
1714 | struct opcode *op = &block->opcode_list[offset]; | |
cb72ea13 | 1715 | bool load_delay = op_flag_load_delay(op->flags) && !cstate->no_load_delay; |
22eee2ac | 1716 | jit_state_t *_jit = block->_jit; |
9259d748 | 1717 | u8 rs, rt, out_reg, addr_reg, flags = REG_EXT; |
03535202 | 1718 | bool no_mask = op_flag_no_mask(op->flags); |
22eee2ac | 1719 | union code c = op->c; |
684432ad | 1720 | s8 reg_imm; |
02487de7 | 1721 | s16 imm; |
22eee2ac | 1722 | |
cb72ea13 PC |
1723 | if (load_delay || c.i.op == OP_LWC2) |
1724 | out_reg = REG_TEMP; | |
9259d748 PC |
1725 | else if (c.i.rt) |
1726 | out_reg = c.i.rt; | |
1727 | else | |
22eee2ac PC |
1728 | return; |
1729 | ||
1730 | if (is_unsigned) | |
1731 | flags |= REG_ZEXT; | |
1732 | ||
1733 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.i.rs, 0); | |
9259d748 | 1734 | rt = lightrec_alloc_reg_out(reg_cache, _jit, out_reg, flags); |
22eee2ac | 1735 | |
5459088b PC |
1736 | if ((op->i.op == OP_META_LWU && c.i.imm) |
1737 | || (!cstate->state->mirrors_mapped && c.i.imm && !no_mask)) { | |
02487de7 | 1738 | jit_addi(rt, rs, (s16)c.i.imm); |
22eee2ac | 1739 | addr_reg = rt; |
02487de7 | 1740 | imm = 0; |
22eee2ac PC |
1741 | } else { |
1742 | addr_reg = rs; | |
02487de7 PC |
1743 | imm = (s16)c.i.imm; |
1744 | } | |
1745 | ||
5459088b PC |
1746 | if (op->i.op == OP_META_LWU) |
1747 | imm = LIGHTNING_UNALIGNED_32BIT; | |
1748 | ||
02487de7 | 1749 | if (!no_mask) { |
684432ad PC |
1750 | reg_imm = lightrec_alloc_reg_temp_with_value(reg_cache, _jit, |
1751 | addr_mask); | |
1752 | ||
1753 | jit_andr(rt, addr_reg, reg_imm); | |
02487de7 | 1754 | addr_reg = rt; |
684432ad PC |
1755 | |
1756 | lightrec_free_reg(reg_cache, reg_imm); | |
22eee2ac PC |
1757 | } |
1758 | ||
1759 | if (addr_offset) { | |
684432ad PC |
1760 | reg_imm = lightrec_alloc_reg_temp_with_value(reg_cache, _jit, |
1761 | addr_offset); | |
1762 | ||
1763 | jit_addr(rt, addr_reg, reg_imm); | |
22eee2ac | 1764 | addr_reg = rt; |
684432ad PC |
1765 | |
1766 | lightrec_free_reg(reg_cache, reg_imm); | |
22eee2ac PC |
1767 | } |
1768 | ||
02487de7 PC |
1769 | jit_new_node_www(code, rt, addr_reg, imm); |
1770 | ||
1771 | if (is_big_endian() && swap_code) { | |
1772 | jit_new_node_ww(swap_code, rt, rt); | |
1773 | ||
1774 | if (c.i.op == OP_LH) | |
1775 | jit_extr_s(rt, rt); | |
1776 | else if (c.i.op == OP_LW && __WORDSIZE == 64) | |
1777 | jit_extr_i(rt, rt); | |
1778 | } | |
22eee2ac PC |
1779 | |
1780 | lightrec_free_reg(reg_cache, rs); | |
1781 | lightrec_free_reg(reg_cache, rt); | |
1782 | } | |
1783 | ||
1784 | static void rec_load_ram(struct lightrec_cstate *cstate, | |
02487de7 PC |
1785 | const struct block *block, u16 offset, |
1786 | jit_code_t code, jit_code_t swap_code, bool is_unsigned) | |
22eee2ac PC |
1787 | { |
1788 | _jit_note(block->_jit, __FILE__, __LINE__); | |
1789 | ||
02487de7 PC |
1790 | rec_load_memory(cstate, block, offset, code, swap_code, is_unsigned, |
1791 | cstate->state->offset_ram, rec_ram_mask(cstate->state)); | |
22eee2ac PC |
1792 | } |
1793 | ||
1794 | static void rec_load_bios(struct lightrec_cstate *cstate, | |
02487de7 PC |
1795 | const struct block *block, u16 offset, |
1796 | jit_code_t code, jit_code_t swap_code, bool is_unsigned) | |
22eee2ac PC |
1797 | { |
1798 | _jit_note(block->_jit, __FILE__, __LINE__); | |
1799 | ||
02487de7 | 1800 | rec_load_memory(cstate, block, offset, code, swap_code, is_unsigned, |
22eee2ac PC |
1801 | cstate->state->offset_bios, 0x1fffffff); |
1802 | } | |
1803 | ||
1804 | static void rec_load_scratch(struct lightrec_cstate *cstate, | |
02487de7 PC |
1805 | const struct block *block, u16 offset, |
1806 | jit_code_t code, jit_code_t swap_code, bool is_unsigned) | |
22eee2ac PC |
1807 | { |
1808 | _jit_note(block->_jit, __FILE__, __LINE__); | |
1809 | ||
02487de7 | 1810 | rec_load_memory(cstate, block, offset, code, swap_code, is_unsigned, |
22eee2ac PC |
1811 | cstate->state->offset_scratch, 0x1fffffff); |
1812 | } | |
1813 | ||
ba3814c1 PC |
1814 | static void rec_load_io(struct lightrec_cstate *cstate, |
1815 | const struct block *block, u16 offset, | |
1816 | jit_code_t code, jit_code_t swap_code, bool is_unsigned) | |
1817 | { | |
1818 | _jit_note(block->_jit, __FILE__, __LINE__); | |
1819 | ||
1820 | rec_load_memory(cstate, block, offset, code, swap_code, is_unsigned, | |
13b02197 | 1821 | cstate->state->offset_io, rec_io_mask(cstate->state)); |
ba3814c1 PC |
1822 | } |
1823 | ||
02487de7 PC |
1824 | static void rec_load_direct(struct lightrec_cstate *cstate, |
1825 | const struct block *block, u16 offset, | |
1826 | jit_code_t code, jit_code_t swap_code, | |
1827 | bool is_unsigned) | |
d16005f8 | 1828 | { |
f5ee77ca | 1829 | const struct lightrec_state *state = cstate->state; |
98fa08a5 | 1830 | struct regcache *reg_cache = cstate->reg_cache; |
cb72ea13 PC |
1831 | struct opcode *op = &block->opcode_list[offset]; |
1832 | bool load_delay = op_flag_load_delay(op->flags) && !cstate->no_load_delay; | |
d16005f8 | 1833 | jit_state_t *_jit = block->_jit; |
98fa08a5 | 1834 | jit_node_t *to_not_ram, *to_not_bios, *to_end, *to_end2; |
9259d748 | 1835 | u8 tmp, rs, rt, out_reg, addr_reg, flags = REG_EXT; |
f5ee77ca | 1836 | bool different_offsets = state->offset_bios != state->offset_scratch; |
cb72ea13 | 1837 | union code c = op->c; |
684432ad PC |
1838 | s32 addr_mask; |
1839 | u32 reg_imm; | |
1840 | s8 offt_reg; | |
d16005f8 PC |
1841 | s16 imm; |
1842 | ||
cb72ea13 PC |
1843 | if (load_delay || c.i.op == OP_LWC2) |
1844 | out_reg = REG_TEMP; | |
9259d748 PC |
1845 | else if (c.i.rt) |
1846 | out_reg = c.i.rt; | |
1847 | else | |
d16005f8 PC |
1848 | return; |
1849 | ||
98fa08a5 PC |
1850 | if (is_unsigned) |
1851 | flags |= REG_ZEXT; | |
1852 | ||
d16005f8 | 1853 | jit_note(__FILE__, __LINE__); |
98fa08a5 | 1854 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.i.rs, 0); |
9259d748 | 1855 | rt = lightrec_alloc_reg_out(reg_cache, _jit, out_reg, flags); |
d16005f8 PC |
1856 | |
1857 | if ((state->offset_ram == state->offset_bios && | |
1858 | state->offset_ram == state->offset_scratch && | |
5459088b PC |
1859 | state->mirrors_mapped && c.i.op != OP_META_LWU) |
1860 | || !c.i.imm) { | |
d16005f8 | 1861 | addr_reg = rs; |
98fa08a5 | 1862 | imm = (s16)c.i.imm; |
d16005f8 | 1863 | } else { |
98fa08a5 | 1864 | jit_addi(rt, rs, (s16)c.i.imm); |
d16005f8 PC |
1865 | addr_reg = rt; |
1866 | imm = 0; | |
1867 | ||
98fa08a5 | 1868 | if (c.i.rs != c.i.rt) |
d16005f8 PC |
1869 | lightrec_free_reg(reg_cache, rs); |
1870 | } | |
1871 | ||
5459088b PC |
1872 | if (op->i.op == OP_META_LWU) |
1873 | imm = LIGHTNING_UNALIGNED_32BIT; | |
1874 | ||
d16005f8 PC |
1875 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); |
1876 | ||
1877 | if (state->offset_ram == state->offset_bios && | |
1878 | state->offset_ram == state->offset_scratch) { | |
684432ad PC |
1879 | if (!state->mirrors_mapped) |
1880 | addr_mask = 0x1f800000 | (RAM_SIZE - 1); | |
1881 | else | |
1882 | addr_mask = 0x1fffffff; | |
1883 | ||
1884 | reg_imm = lightrec_alloc_reg_temp_with_value(reg_cache, _jit, | |
1885 | addr_mask); | |
d16005f8 PC |
1886 | if (!state->mirrors_mapped) { |
1887 | jit_andi(tmp, addr_reg, BIT(28)); | |
1888 | jit_rshi_u(tmp, tmp, 28 - 22); | |
684432ad | 1889 | jit_orr(tmp, tmp, reg_imm); |
d16005f8 PC |
1890 | jit_andr(rt, addr_reg, tmp); |
1891 | } else { | |
684432ad | 1892 | jit_andr(rt, addr_reg, reg_imm); |
d16005f8 PC |
1893 | } |
1894 | ||
684432ad PC |
1895 | lightrec_free_reg(reg_cache, reg_imm); |
1896 | ||
1897 | if (state->offset_ram) { | |
1898 | offt_reg = lightrec_get_reg_with_value(reg_cache, | |
1899 | state->offset_ram); | |
1900 | if (offt_reg < 0) { | |
1901 | jit_movi(tmp, state->offset_ram); | |
1902 | lightrec_temp_set_value(reg_cache, tmp, | |
1903 | state->offset_ram); | |
1904 | } else { | |
1905 | lightrec_free_reg(reg_cache, tmp); | |
1906 | tmp = offt_reg; | |
1907 | } | |
1908 | } | |
d16005f8 PC |
1909 | } else { |
1910 | to_not_ram = jit_bmsi(addr_reg, BIT(28)); | |
1911 | ||
1912 | /* Convert to KUNSEG and avoid RAM mirrors */ | |
1913 | jit_andi(rt, addr_reg, RAM_SIZE - 1); | |
1914 | ||
1915 | if (state->offset_ram) | |
1916 | jit_movi(tmp, state->offset_ram); | |
1917 | ||
22eee2ac | 1918 | to_end = jit_b(); |
d16005f8 PC |
1919 | |
1920 | jit_patch(to_not_ram); | |
1921 | ||
f5ee77ca | 1922 | if (different_offsets) |
d16005f8 PC |
1923 | to_not_bios = jit_bmci(addr_reg, BIT(22)); |
1924 | ||
1925 | /* Convert to KUNSEG */ | |
1926 | jit_andi(rt, addr_reg, 0x1fc00000 | (BIOS_SIZE - 1)); | |
1927 | ||
1928 | jit_movi(tmp, state->offset_bios); | |
1929 | ||
f5ee77ca | 1930 | if (different_offsets) { |
22eee2ac | 1931 | to_end2 = jit_b(); |
d16005f8 PC |
1932 | |
1933 | jit_patch(to_not_bios); | |
1934 | ||
1935 | /* Convert to KUNSEG */ | |
1936 | jit_andi(rt, addr_reg, 0x1f800fff); | |
1937 | ||
1938 | if (state->offset_scratch) | |
1939 | jit_movi(tmp, state->offset_scratch); | |
1940 | ||
1941 | jit_patch(to_end2); | |
1942 | } | |
1943 | ||
1944 | jit_patch(to_end); | |
1945 | } | |
1946 | ||
1947 | if (state->offset_ram || state->offset_bios || state->offset_scratch) | |
1948 | jit_addr(rt, rt, tmp); | |
1949 | ||
1950 | jit_new_node_www(code, rt, rt, imm); | |
1951 | ||
02487de7 PC |
1952 | if (is_big_endian() && swap_code) { |
1953 | jit_new_node_ww(swap_code, rt, rt); | |
1954 | ||
1955 | if (c.i.op == OP_LH) | |
1956 | jit_extr_s(rt, rt); | |
1957 | else if (c.i.op == OP_LW && __WORDSIZE == 64) | |
1958 | jit_extr_i(rt, rt); | |
1959 | } | |
1960 | ||
d16005f8 PC |
1961 | lightrec_free_reg(reg_cache, addr_reg); |
1962 | lightrec_free_reg(reg_cache, rt); | |
1963 | lightrec_free_reg(reg_cache, tmp); | |
1964 | } | |
1965 | ||
98fa08a5 | 1966 | static void rec_load(struct lightrec_cstate *state, const struct block *block, |
02487de7 PC |
1967 | u16 offset, jit_code_t code, jit_code_t swap_code, |
1968 | bool is_unsigned) | |
d16005f8 | 1969 | { |
9259d748 PC |
1970 | const struct opcode *op = &block->opcode_list[offset]; |
1971 | u32 flags = op->flags; | |
98fa08a5 | 1972 | |
22eee2ac PC |
1973 | switch (LIGHTREC_FLAGS_GET_IO_MODE(flags)) { |
1974 | case LIGHTREC_IO_RAM: | |
02487de7 | 1975 | rec_load_ram(state, block, offset, code, swap_code, is_unsigned); |
22eee2ac PC |
1976 | break; |
1977 | case LIGHTREC_IO_BIOS: | |
02487de7 | 1978 | rec_load_bios(state, block, offset, code, swap_code, is_unsigned); |
22eee2ac PC |
1979 | break; |
1980 | case LIGHTREC_IO_SCRATCH: | |
02487de7 | 1981 | rec_load_scratch(state, block, offset, code, swap_code, is_unsigned); |
22eee2ac | 1982 | break; |
ba3814c1 PC |
1983 | case LIGHTREC_IO_DIRECT_HW: |
1984 | rec_load_io(state, block, offset, code, swap_code, is_unsigned); | |
1985 | break; | |
22eee2ac | 1986 | case LIGHTREC_IO_DIRECT: |
02487de7 | 1987 | rec_load_direct(state, block, offset, code, swap_code, is_unsigned); |
22eee2ac PC |
1988 | break; |
1989 | default: | |
98fa08a5 | 1990 | rec_io(state, block, offset, false, true); |
9259d748 PC |
1991 | return; |
1992 | } | |
1993 | ||
1994 | if (op->i.op == OP_LWC2) { | |
cb72ea13 PC |
1995 | rec_cp2_do_mtc2(state, block, offset, op->i.rt, REG_TEMP); |
1996 | lightrec_discard_reg_if_loaded(state->reg_cache, REG_TEMP); | |
22eee2ac | 1997 | } |
d16005f8 PC |
1998 | } |
1999 | ||
98fa08a5 | 2000 | static void rec_LB(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 PC |
2001 | { |
2002 | _jit_name(block->_jit, __func__); | |
02487de7 | 2003 | rec_load(state, block, offset, jit_code_ldxi_c, 0, false); |
d16005f8 PC |
2004 | } |
2005 | ||
98fa08a5 | 2006 | static void rec_LBU(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 PC |
2007 | { |
2008 | _jit_name(block->_jit, __func__); | |
02487de7 | 2009 | rec_load(state, block, offset, jit_code_ldxi_uc, 0, true); |
d16005f8 PC |
2010 | } |
2011 | ||
98fa08a5 | 2012 | static void rec_LH(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 | 2013 | { |
ba3814c1 PC |
2014 | jit_code_t code = is_big_endian() ? jit_code_ldxi_us : jit_code_ldxi_s; |
2015 | ||
d16005f8 | 2016 | _jit_name(block->_jit, __func__); |
ba3814c1 | 2017 | rec_load(state, block, offset, code, jit_code_bswapr_us, false); |
d16005f8 PC |
2018 | } |
2019 | ||
98fa08a5 | 2020 | static void rec_LHU(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 PC |
2021 | { |
2022 | _jit_name(block->_jit, __func__); | |
02487de7 | 2023 | rec_load(state, block, offset, jit_code_ldxi_us, jit_code_bswapr_us, true); |
d16005f8 PC |
2024 | } |
2025 | ||
98fa08a5 | 2026 | static void rec_LWL(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 PC |
2027 | { |
2028 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 2029 | rec_io(state, block, offset, true, true); |
d16005f8 PC |
2030 | } |
2031 | ||
98fa08a5 | 2032 | static void rec_LWR(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 PC |
2033 | { |
2034 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 2035 | rec_io(state, block, offset, true, true); |
d16005f8 PC |
2036 | } |
2037 | ||
98fa08a5 | 2038 | static void rec_LW(struct lightrec_cstate *state, const struct block *block, u16 offset) |
d16005f8 | 2039 | { |
9259d748 | 2040 | union code c = block->opcode_list[offset].c; |
ba3814c1 PC |
2041 | jit_code_t code; |
2042 | ||
2043 | if (is_big_endian() && __WORDSIZE == 64) | |
2044 | code = jit_code_ldxi_ui; | |
2045 | else | |
2046 | code = jit_code_ldxi_i; | |
2047 | ||
9259d748 | 2048 | _jit_name(block->_jit, c.i.op == OP_LWC2 ? "rec_LWC2" : "rec_LW"); |
ba3814c1 | 2049 | rec_load(state, block, offset, code, jit_code_bswapr_ui, false); |
d16005f8 PC |
2050 | } |
2051 | ||
e26c79a8 PC |
2052 | static void rec_exit_early(struct lightrec_cstate *state, |
2053 | const struct block *block, u16 offset, | |
2054 | u32 exit_code, u32 pc) | |
d16005f8 | 2055 | { |
ba3814c1 PC |
2056 | struct regcache *reg_cache = state->reg_cache; |
2057 | jit_state_t *_jit = block->_jit; | |
2058 | u8 tmp; | |
2059 | ||
98fa08a5 | 2060 | _jit_note(block->_jit, __FILE__, __LINE__); |
d16005f8 | 2061 | |
ba3814c1 PC |
2062 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); |
2063 | ||
2064 | jit_movi(tmp, exit_code); | |
2065 | jit_stxi_i(offsetof(struct lightrec_state, exit_flags), | |
2066 | LIGHTREC_REG_STATE, tmp); | |
2067 | ||
cb72ea13 PC |
2068 | jit_ldxi_i(tmp, LIGHTREC_REG_STATE, |
2069 | offsetof(struct lightrec_state, target_cycle)); | |
2070 | jit_subr(tmp, tmp, LIGHTREC_REG_CYCLE); | |
2071 | jit_movi(LIGHTREC_REG_CYCLE, 0); | |
2072 | jit_stxi_i(offsetof(struct lightrec_state, target_cycle), | |
2073 | LIGHTREC_REG_STATE, tmp); | |
2074 | jit_stxi_i(offsetof(struct lightrec_state, current_cycle), | |
2075 | LIGHTREC_REG_STATE, tmp); | |
2076 | ||
ba3814c1 | 2077 | lightrec_free_reg(reg_cache, tmp); |
d16005f8 | 2078 | |
e26c79a8 | 2079 | lightrec_emit_end_of_block(state, block, offset, -1, pc, 31, 0, true); |
d16005f8 PC |
2080 | } |
2081 | ||
98fa08a5 PC |
2082 | static void rec_special_SYSCALL(struct lightrec_cstate *state, |
2083 | const struct block *block, u16 offset) | |
d16005f8 PC |
2084 | { |
2085 | _jit_name(block->_jit, __func__); | |
e26c79a8 PC |
2086 | |
2087 | /* TODO: the return address should be "pc - 4" if we're a delay slot */ | |
2088 | rec_exit_early(state, block, offset, LIGHTREC_EXIT_SYSCALL, | |
2089 | get_ds_pc(block, offset, 0)); | |
d16005f8 PC |
2090 | } |
2091 | ||
98fa08a5 PC |
2092 | static void rec_special_BREAK(struct lightrec_cstate *state, |
2093 | const struct block *block, u16 offset) | |
d16005f8 PC |
2094 | { |
2095 | _jit_name(block->_jit, __func__); | |
e26c79a8 PC |
2096 | rec_exit_early(state, block, offset, LIGHTREC_EXIT_BREAK, |
2097 | get_ds_pc(block, offset, 0)); | |
d16005f8 PC |
2098 | } |
2099 | ||
fdf33147 PC |
2100 | static void rec_mfc(struct lightrec_cstate *state, const struct block *block, u16 offset) |
2101 | { | |
2102 | struct regcache *reg_cache = state->reg_cache; | |
2103 | union code c = block->opcode_list[offset].c; | |
2104 | jit_state_t *_jit = block->_jit; | |
2105 | ||
2106 | jit_note(__FILE__, __LINE__); | |
9259d748 PC |
2107 | |
2108 | if (c.i.op != OP_SWC2) | |
2109 | lightrec_clean_reg_if_loaded(reg_cache, _jit, c.i.rt, true); | |
fdf33147 PC |
2110 | |
2111 | call_to_c_wrapper(state, block, c.opcode, C_WRAPPER_MFC); | |
2112 | } | |
2113 | ||
fd58fa32 | 2114 | static void rec_mtc(struct lightrec_cstate *state, const struct block *block, u16 offset) |
98fa08a5 PC |
2115 | { |
2116 | struct regcache *reg_cache = state->reg_cache; | |
2117 | union code c = block->opcode_list[offset].c; | |
2118 | jit_state_t *_jit = block->_jit; | |
d16005f8 | 2119 | |
98fa08a5 PC |
2120 | jit_note(__FILE__, __LINE__); |
2121 | lightrec_clean_reg_if_loaded(reg_cache, _jit, c.i.rs, false); | |
2122 | lightrec_clean_reg_if_loaded(reg_cache, _jit, c.i.rt, false); | |
cb72ea13 | 2123 | lightrec_clean_reg_if_loaded(reg_cache, _jit, REG_TEMP, false); |
d16005f8 | 2124 | |
ba3814c1 | 2125 | call_to_c_wrapper(state, block, c.opcode, C_WRAPPER_MTC); |
d16005f8 | 2126 | |
98fa08a5 | 2127 | if (c.i.op == OP_CP0 && |
03535202 | 2128 | !op_flag_no_ds(block->opcode_list[offset].flags) && |
98fa08a5 PC |
2129 | (c.r.rd == 12 || c.r.rd == 13)) |
2130 | lightrec_emit_end_of_block(state, block, offset, -1, | |
2131 | get_ds_pc(block, offset, 1), | |
2132 | 0, 0, true); | |
d16005f8 PC |
2133 | } |
2134 | ||
98fa08a5 PC |
2135 | static void |
2136 | rec_mfc0(struct lightrec_cstate *state, const struct block *block, u16 offset) | |
d16005f8 | 2137 | { |
d16005f8 | 2138 | struct regcache *reg_cache = state->reg_cache; |
98fa08a5 | 2139 | union code c = block->opcode_list[offset].c; |
d16005f8 | 2140 | jit_state_t *_jit = block->_jit; |
98fa08a5 | 2141 | u8 rt; |
d16005f8 PC |
2142 | |
2143 | jit_note(__FILE__, __LINE__); | |
2144 | ||
98fa08a5 | 2145 | rt = lightrec_alloc_reg_out(reg_cache, _jit, c.i.rt, REG_EXT); |
d16005f8 | 2146 | |
98fa08a5 PC |
2147 | jit_ldxi_i(rt, LIGHTREC_REG_STATE, |
2148 | offsetof(struct lightrec_state, regs.cp0[c.r.rd])); | |
d16005f8 | 2149 | |
98fa08a5 PC |
2150 | lightrec_free_reg(reg_cache, rt); |
2151 | } | |
d16005f8 | 2152 | |
cb72ea13 PC |
2153 | static bool block_uses_icache(const struct lightrec_cstate *state, |
2154 | const struct block *block) | |
98fa08a5 | 2155 | { |
cb72ea13 | 2156 | const struct lightrec_mem_map *map = &state->state->maps[PSX_MAP_KERNEL_USER_RAM]; |
98fa08a5 | 2157 | u32 pc = kunseg(block->pc); |
d16005f8 | 2158 | |
cb72ea13 PC |
2159 | if (pc < map->pc || pc >= map->pc + map->length) |
2160 | return false; | |
2161 | ||
2162 | return (block->pc >> 28) < 0xa; | |
d16005f8 PC |
2163 | } |
2164 | ||
98fa08a5 PC |
2165 | static void |
2166 | rec_mtc0(struct lightrec_cstate *state, const struct block *block, u16 offset) | |
d16005f8 | 2167 | { |
98fa08a5 PC |
2168 | struct regcache *reg_cache = state->reg_cache; |
2169 | const union code c = block->opcode_list[offset].c; | |
2170 | jit_state_t *_jit = block->_jit; | |
fd58fa32 | 2171 | u8 rt, tmp = 0, tmp2, status; |
0cf41071 | 2172 | jit_node_t *to_end; |
98fa08a5 PC |
2173 | |
2174 | jit_note(__FILE__, __LINE__); | |
2175 | ||
2176 | switch(c.r.rd) { | |
2177 | case 1: | |
2178 | case 4: | |
2179 | case 8: | |
2180 | case 14: | |
2181 | case 15: | |
2182 | /* Those registers are read-only */ | |
2183 | return; | |
2184 | default: | |
2185 | break; | |
2186 | } | |
2187 | ||
cb72ea13 PC |
2188 | if (!block_uses_icache(state, block) && c.r.rd == 12) { |
2189 | /* If we are not running code from the RAM through kuseg or | |
2190 | * kseg0, handle writes to the Status register in C; as the | |
2191 | * code may toggle bit 16 which isolates the cache. Code | |
2192 | * running from kuseg or kseg0 in RAM cannot do that. */ | |
98fa08a5 PC |
2193 | rec_mtc(state, block, offset); |
2194 | return; | |
2195 | } | |
2196 | ||
2197 | rt = lightrec_alloc_reg_in(reg_cache, _jit, c.i.rt, 0); | |
2198 | ||
2199 | if (c.r.rd != 13) { | |
2200 | jit_stxi_i(offsetof(struct lightrec_state, regs.cp0[c.r.rd]), | |
2201 | LIGHTREC_REG_STATE, rt); | |
2202 | } | |
2203 | ||
2204 | if (c.r.rd == 12 || c.r.rd == 13) { | |
2205 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); | |
2206 | jit_ldxi_i(tmp, LIGHTREC_REG_STATE, | |
2207 | offsetof(struct lightrec_state, regs.cp0[13])); | |
fd58fa32 PC |
2208 | |
2209 | tmp2 = lightrec_alloc_reg_temp(reg_cache, _jit); | |
98fa08a5 PC |
2210 | } |
2211 | ||
2212 | if (c.r.rd == 12) { | |
2213 | status = rt; | |
2214 | } else if (c.r.rd == 13) { | |
98fa08a5 PC |
2215 | /* Cause = (Cause & ~0x0300) | (value & 0x0300) */ |
2216 | jit_andi(tmp2, rt, 0x0300); | |
2217 | jit_ori(tmp, tmp, 0x0300); | |
2218 | jit_xori(tmp, tmp, 0x0300); | |
2219 | jit_orr(tmp, tmp, tmp2); | |
2220 | jit_ldxi_i(tmp2, LIGHTREC_REG_STATE, | |
2221 | offsetof(struct lightrec_state, regs.cp0[12])); | |
2222 | jit_stxi_i(offsetof(struct lightrec_state, regs.cp0[13]), | |
2223 | LIGHTREC_REG_STATE, tmp); | |
2224 | status = tmp2; | |
2225 | } | |
2226 | ||
2227 | if (c.r.rd == 12 || c.r.rd == 13) { | |
2228 | /* Exit dynarec in case there's a software interrupt. | |
2229 | * exit_flags = !!(status & tmp & 0x0300) & status; */ | |
2230 | jit_andr(tmp, tmp, status); | |
2231 | jit_andi(tmp, tmp, 0x0300); | |
2232 | jit_nei(tmp, tmp, 0); | |
2233 | jit_andr(tmp, tmp, status); | |
fd58fa32 PC |
2234 | } |
2235 | ||
2236 | if (c.r.rd == 12) { | |
2237 | /* Exit dynarec in case we unmask a hardware interrupt. | |
2238 | * exit_flags = !(~status & 0x401) */ | |
2239 | ||
2240 | jit_comr(tmp2, status); | |
2241 | jit_andi(tmp2, tmp2, 0x401); | |
2242 | jit_eqi(tmp2, tmp2, 0); | |
2243 | jit_orr(tmp, tmp, tmp2); | |
2244 | } | |
2245 | ||
0cf41071 PC |
2246 | lightrec_free_reg(reg_cache, rt); |
2247 | ||
fd58fa32 | 2248 | if (c.r.rd == 12 || c.r.rd == 13) { |
0cf41071 | 2249 | to_end = jit_beqi(tmp, 0); |
98fa08a5 | 2250 | |
0cf41071 PC |
2251 | jit_ldxi_i(tmp2, LIGHTREC_REG_STATE, |
2252 | offsetof(struct lightrec_state, target_cycle)); | |
2253 | jit_subr(tmp2, tmp2, LIGHTREC_REG_CYCLE); | |
2254 | jit_movi(LIGHTREC_REG_CYCLE, 0); | |
2255 | jit_stxi_i(offsetof(struct lightrec_state, target_cycle), | |
2256 | LIGHTREC_REG_STATE, tmp2); | |
2257 | jit_stxi_i(offsetof(struct lightrec_state, current_cycle), | |
2258 | LIGHTREC_REG_STATE, tmp2); | |
98fa08a5 | 2259 | |
0cf41071 PC |
2260 | |
2261 | jit_patch(to_end); | |
2262 | } | |
98fa08a5 | 2263 | |
03535202 | 2264 | if (!op_flag_no_ds(block->opcode_list[offset].flags) && |
13b02197 | 2265 | (c.r.rd == 12 || c.r.rd == 13)) { |
684432ad | 2266 | state->cycles += lightrec_cycles_of_opcode(state->state, c); |
13b02197 PC |
2267 | lightrec_emit_eob(state, block, offset + 1); |
2268 | } | |
d16005f8 PC |
2269 | } |
2270 | ||
98fa08a5 PC |
2271 | static void rec_cp0_MFC0(struct lightrec_cstate *state, |
2272 | const struct block *block, u16 offset) | |
d16005f8 PC |
2273 | { |
2274 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 2275 | rec_mfc0(state, block, offset); |
d16005f8 PC |
2276 | } |
2277 | ||
98fa08a5 PC |
2278 | static void rec_cp0_CFC0(struct lightrec_cstate *state, |
2279 | const struct block *block, u16 offset) | |
d16005f8 PC |
2280 | { |
2281 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 2282 | rec_mfc0(state, block, offset); |
d16005f8 PC |
2283 | } |
2284 | ||
98fa08a5 PC |
2285 | static void rec_cp0_MTC0(struct lightrec_cstate *state, |
2286 | const struct block *block, u16 offset) | |
d16005f8 PC |
2287 | { |
2288 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 2289 | rec_mtc0(state, block, offset); |
d16005f8 PC |
2290 | } |
2291 | ||
98fa08a5 PC |
2292 | static void rec_cp0_CTC0(struct lightrec_cstate *state, |
2293 | const struct block *block, u16 offset) | |
d16005f8 PC |
2294 | { |
2295 | _jit_name(block->_jit, __func__); | |
98fa08a5 | 2296 | rec_mtc0(state, block, offset); |
d16005f8 PC |
2297 | } |
2298 | ||
02487de7 PC |
2299 | static unsigned int cp2d_i_offset(u8 reg) |
2300 | { | |
2301 | return offsetof(struct lightrec_state, regs.cp2d[reg]); | |
2302 | } | |
2303 | ||
2304 | static unsigned int cp2d_s_offset(u8 reg) | |
2305 | { | |
2306 | return cp2d_i_offset(reg) + is_big_endian() * 2; | |
2307 | } | |
2308 | ||
2309 | static unsigned int cp2c_i_offset(u8 reg) | |
2310 | { | |
2311 | return offsetof(struct lightrec_state, regs.cp2c[reg]); | |
2312 | } | |
2313 | ||
2314 | static unsigned int cp2c_s_offset(u8 reg) | |
2315 | { | |
2316 | return cp2c_i_offset(reg) + is_big_endian() * 2; | |
2317 | } | |
2318 | ||
9259d748 PC |
2319 | static void rec_cp2_do_mfc2(struct lightrec_cstate *state, |
2320 | const struct block *block, u16 offset, | |
2321 | u8 reg, u8 out_reg) | |
d16005f8 | 2322 | { |
fd58fa32 | 2323 | struct regcache *reg_cache = state->reg_cache; |
fd58fa32 PC |
2324 | jit_state_t *_jit = block->_jit; |
2325 | const u32 zext_regs = 0x300f0080; | |
2326 | u8 rt, tmp, tmp2, tmp3, out, flags; | |
fd58fa32 PC |
2327 | unsigned int i; |
2328 | ||
d16005f8 | 2329 | _jit_name(block->_jit, __func__); |
fd58fa32 | 2330 | |
fdf33147 PC |
2331 | if (state->state->ops.cop2_notify) { |
2332 | /* We must call cop2_notify, handle that in C. */ | |
2333 | rec_mfc(state, block, offset); | |
2334 | return; | |
2335 | } | |
2336 | ||
fd58fa32 | 2337 | flags = (zext_regs & BIT(reg)) ? REG_ZEXT : REG_EXT; |
9259d748 PC |
2338 | rt = lightrec_alloc_reg_out(reg_cache, _jit, out_reg, flags); |
2339 | ||
2340 | if (reg == 15) | |
2341 | reg = 14; | |
fd58fa32 PC |
2342 | |
2343 | switch (reg) { | |
2344 | case 1: | |
2345 | case 3: | |
2346 | case 5: | |
2347 | case 8: | |
2348 | case 9: | |
2349 | case 10: | |
2350 | case 11: | |
02487de7 | 2351 | jit_ldxi_s(rt, LIGHTREC_REG_STATE, cp2d_s_offset(reg)); |
fd58fa32 PC |
2352 | break; |
2353 | case 7: | |
2354 | case 16: | |
2355 | case 17: | |
2356 | case 18: | |
2357 | case 19: | |
02487de7 | 2358 | jit_ldxi_us(rt, LIGHTREC_REG_STATE, cp2d_s_offset(reg)); |
fd58fa32 PC |
2359 | break; |
2360 | case 28: | |
2361 | case 29: | |
2362 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); | |
2363 | tmp2 = lightrec_alloc_reg_temp(reg_cache, _jit); | |
2364 | tmp3 = lightrec_alloc_reg_temp(reg_cache, _jit); | |
2365 | ||
2366 | for (i = 0; i < 3; i++) { | |
2367 | out = i == 0 ? rt : tmp; | |
2368 | ||
02487de7 | 2369 | jit_ldxi_s(tmp, LIGHTREC_REG_STATE, cp2d_s_offset(9 + i)); |
fd58fa32 PC |
2370 | jit_movi(tmp2, 0x1f); |
2371 | jit_rshi(out, tmp, 7); | |
2372 | ||
2373 | jit_ltr(tmp3, tmp2, out); | |
2374 | jit_movnr(out, tmp2, tmp3); | |
2375 | ||
2376 | jit_gei(tmp2, out, 0); | |
2377 | jit_movzr(out, tmp2, tmp2); | |
2378 | ||
2379 | if (i > 0) { | |
2380 | jit_lshi(tmp, tmp, 5 * i); | |
2381 | jit_orr(rt, rt, tmp); | |
2382 | } | |
2383 | } | |
2384 | ||
2385 | ||
2386 | lightrec_free_reg(reg_cache, tmp); | |
2387 | lightrec_free_reg(reg_cache, tmp2); | |
2388 | lightrec_free_reg(reg_cache, tmp3); | |
2389 | break; | |
2390 | default: | |
02487de7 | 2391 | jit_ldxi_i(rt, LIGHTREC_REG_STATE, cp2d_i_offset(reg)); |
fd58fa32 PC |
2392 | break; |
2393 | } | |
2394 | ||
2395 | lightrec_free_reg(reg_cache, rt); | |
d16005f8 PC |
2396 | } |
2397 | ||
9259d748 PC |
2398 | static void rec_cp2_basic_MFC2(struct lightrec_cstate *state, |
2399 | const struct block *block, u16 offset) | |
2400 | { | |
2401 | const union code c = block->opcode_list[offset].c; | |
2402 | ||
2403 | rec_cp2_do_mfc2(state, block, offset, c.r.rd, c.r.rt); | |
2404 | } | |
2405 | ||
98fa08a5 PC |
2406 | static void rec_cp2_basic_CFC2(struct lightrec_cstate *state, |
2407 | const struct block *block, u16 offset) | |
d16005f8 | 2408 | { |
fd58fa32 PC |
2409 | struct regcache *reg_cache = state->reg_cache; |
2410 | const union code c = block->opcode_list[offset].c; | |
2411 | jit_state_t *_jit = block->_jit; | |
2412 | u8 rt; | |
2413 | ||
d16005f8 | 2414 | _jit_name(block->_jit, __func__); |
fd58fa32 | 2415 | |
fdf33147 PC |
2416 | if (state->state->ops.cop2_notify) { |
2417 | /* We must call cop2_notify, handle that in C. */ | |
2418 | rec_mfc(state, block, offset); | |
2419 | return; | |
2420 | } | |
2421 | ||
fd58fa32 PC |
2422 | switch (c.r.rd) { |
2423 | case 4: | |
2424 | case 12: | |
2425 | case 20: | |
2426 | case 26: | |
2427 | case 27: | |
2428 | case 29: | |
2429 | case 30: | |
2430 | rt = lightrec_alloc_reg_out(reg_cache, _jit, c.r.rt, REG_EXT); | |
02487de7 | 2431 | jit_ldxi_s(rt, LIGHTREC_REG_STATE, cp2c_s_offset(c.r.rd)); |
fd58fa32 PC |
2432 | break; |
2433 | default: | |
2434 | rt = lightrec_alloc_reg_out(reg_cache, _jit, c.r.rt, REG_ZEXT); | |
0cf41071 | 2435 | jit_ldxi_ui(rt, LIGHTREC_REG_STATE, cp2c_i_offset(c.r.rd)); |
fd58fa32 PC |
2436 | break; |
2437 | } | |
2438 | ||
2439 | lightrec_free_reg(reg_cache, rt); | |
d16005f8 PC |
2440 | } |
2441 | ||
9259d748 PC |
2442 | static void rec_cp2_do_mtc2(struct lightrec_cstate *state, |
2443 | const struct block *block, u16 offset, | |
2444 | u8 reg, u8 in_reg) | |
d16005f8 | 2445 | { |
fd58fa32 | 2446 | struct regcache *reg_cache = state->reg_cache; |
fd58fa32 | 2447 | jit_state_t *_jit = block->_jit; |
fd58fa32 PC |
2448 | u8 rt, tmp, tmp2, flags = 0; |
2449 | ||
d16005f8 | 2450 | _jit_name(block->_jit, __func__); |
fd58fa32 | 2451 | |
fdf33147 PC |
2452 | if (state->state->ops.cop2_notify) { |
2453 | /* We must call cop2_notify, handle that in C. */ | |
2454 | rec_mtc(state, block, offset); | |
2455 | return; | |
2456 | } | |
2457 | ||
9259d748 | 2458 | if (reg == 31) |
fd58fa32 PC |
2459 | return; |
2460 | ||
9259d748 | 2461 | if (reg == 30) |
fd58fa32 PC |
2462 | flags |= REG_EXT; |
2463 | ||
9259d748 | 2464 | rt = lightrec_alloc_reg_in(reg_cache, _jit, in_reg, flags); |
fd58fa32 | 2465 | |
9259d748 | 2466 | switch (reg) { |
fd58fa32 PC |
2467 | case 15: |
2468 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); | |
02487de7 | 2469 | jit_ldxi_i(tmp, LIGHTREC_REG_STATE, cp2d_i_offset(13)); |
fd58fa32 PC |
2470 | |
2471 | tmp2 = lightrec_alloc_reg_temp(reg_cache, _jit); | |
02487de7 | 2472 | jit_ldxi_i(tmp2, LIGHTREC_REG_STATE, cp2d_i_offset(14)); |
fd58fa32 | 2473 | |
02487de7 PC |
2474 | jit_stxi_i(cp2d_i_offset(12), LIGHTREC_REG_STATE, tmp); |
2475 | jit_stxi_i(cp2d_i_offset(13), LIGHTREC_REG_STATE, tmp2); | |
2476 | jit_stxi_i(cp2d_i_offset(14), LIGHTREC_REG_STATE, rt); | |
fd58fa32 PC |
2477 | |
2478 | lightrec_free_reg(reg_cache, tmp); | |
2479 | lightrec_free_reg(reg_cache, tmp2); | |
2480 | break; | |
2481 | case 28: | |
2482 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); | |
2483 | ||
2484 | jit_lshi(tmp, rt, 7); | |
2485 | jit_andi(tmp, tmp, 0xf80); | |
02487de7 | 2486 | jit_stxi_s(cp2d_s_offset(9), LIGHTREC_REG_STATE, tmp); |
fd58fa32 PC |
2487 | |
2488 | jit_lshi(tmp, rt, 2); | |
2489 | jit_andi(tmp, tmp, 0xf80); | |
02487de7 | 2490 | jit_stxi_s(cp2d_s_offset(10), LIGHTREC_REG_STATE, tmp); |
fd58fa32 PC |
2491 | |
2492 | jit_rshi(tmp, rt, 3); | |
2493 | jit_andi(tmp, tmp, 0xf80); | |
02487de7 | 2494 | jit_stxi_s(cp2d_s_offset(11), LIGHTREC_REG_STATE, tmp); |
fd58fa32 PC |
2495 | |
2496 | lightrec_free_reg(reg_cache, tmp); | |
2497 | break; | |
2498 | case 30: | |
2499 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); | |
fd58fa32 PC |
2500 | |
2501 | /* if (rt < 0) rt = ~rt; */ | |
2502 | jit_rshi(tmp, rt, 31); | |
2503 | jit_xorr(tmp, rt, tmp); | |
2504 | ||
cb72ea13 PC |
2505 | /* Count leading zeros */ |
2506 | jit_clzr(tmp, tmp); | |
2507 | if (__WORDSIZE != 32) | |
2508 | jit_subi(tmp, tmp, __WORDSIZE - 32); | |
fd58fa32 | 2509 | |
cb72ea13 | 2510 | jit_stxi_i(cp2d_i_offset(31), LIGHTREC_REG_STATE, tmp); |
fd58fa32 PC |
2511 | |
2512 | lightrec_free_reg(reg_cache, tmp); | |
cb72ea13 | 2513 | fallthrough; |
fd58fa32 | 2514 | default: |
9259d748 | 2515 | jit_stxi_i(cp2d_i_offset(reg), LIGHTREC_REG_STATE, rt); |
fd58fa32 PC |
2516 | break; |
2517 | } | |
2518 | ||
2519 | lightrec_free_reg(reg_cache, rt); | |
d16005f8 PC |
2520 | } |
2521 | ||
9259d748 PC |
2522 | static void rec_cp2_basic_MTC2(struct lightrec_cstate *state, |
2523 | const struct block *block, u16 offset) | |
2524 | { | |
2525 | const union code c = block->opcode_list[offset].c; | |
2526 | ||
2527 | rec_cp2_do_mtc2(state, block, offset, c.r.rd, c.r.rt); | |
2528 | } | |
2529 | ||
98fa08a5 PC |
2530 | static void rec_cp2_basic_CTC2(struct lightrec_cstate *state, |
2531 | const struct block *block, u16 offset) | |
d16005f8 | 2532 | { |
fd58fa32 PC |
2533 | struct regcache *reg_cache = state->reg_cache; |
2534 | const union code c = block->opcode_list[offset].c; | |
2535 | jit_state_t *_jit = block->_jit; | |
2536 | u8 rt, tmp, tmp2; | |
2537 | ||
98fa08a5 | 2538 | _jit_name(block->_jit, __func__); |
fd58fa32 | 2539 | |
fdf33147 PC |
2540 | if (state->state->ops.cop2_notify) { |
2541 | /* We must call cop2_notify, handle that in C. */ | |
2542 | rec_mtc(state, block, offset); | |
2543 | return; | |
2544 | } | |
2545 | ||
fd58fa32 PC |
2546 | rt = lightrec_alloc_reg_in(reg_cache, _jit, c.r.rt, 0); |
2547 | ||
2548 | switch (c.r.rd) { | |
2549 | case 4: | |
2550 | case 12: | |
2551 | case 20: | |
2552 | case 26: | |
2553 | case 27: | |
2554 | case 29: | |
2555 | case 30: | |
02487de7 | 2556 | jit_stxi_s(cp2c_s_offset(c.r.rd), LIGHTREC_REG_STATE, rt); |
fd58fa32 PC |
2557 | break; |
2558 | case 31: | |
2559 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); | |
2560 | tmp2 = lightrec_alloc_reg_temp(reg_cache, _jit); | |
2561 | ||
2562 | jit_andi(tmp, rt, 0x7f87e000); | |
2563 | jit_nei(tmp, tmp, 0); | |
2564 | jit_lshi(tmp, tmp, 31); | |
2565 | ||
2566 | jit_andi(tmp2, rt, 0x7ffff000); | |
2567 | jit_orr(tmp, tmp2, tmp); | |
2568 | ||
02487de7 | 2569 | jit_stxi_i(cp2c_i_offset(31), LIGHTREC_REG_STATE, tmp); |
fd58fa32 PC |
2570 | |
2571 | lightrec_free_reg(reg_cache, tmp); | |
2572 | lightrec_free_reg(reg_cache, tmp2); | |
2573 | break; | |
2574 | ||
2575 | default: | |
02487de7 | 2576 | jit_stxi_i(cp2c_i_offset(c.r.rd), LIGHTREC_REG_STATE, rt); |
fd58fa32 PC |
2577 | } |
2578 | ||
2579 | lightrec_free_reg(reg_cache, rt); | |
d16005f8 PC |
2580 | } |
2581 | ||
98fa08a5 PC |
2582 | static void rec_cp0_RFE(struct lightrec_cstate *state, |
2583 | const struct block *block, u16 offset) | |
d16005f8 | 2584 | { |
98fa08a5 | 2585 | struct regcache *reg_cache = state->reg_cache; |
d16005f8 | 2586 | jit_state_t *_jit = block->_jit; |
98fa08a5 | 2587 | u8 status, tmp; |
d16005f8 PC |
2588 | |
2589 | jit_name(__func__); | |
2590 | jit_note(__FILE__, __LINE__); | |
2591 | ||
98fa08a5 PC |
2592 | status = lightrec_alloc_reg_temp(reg_cache, _jit); |
2593 | jit_ldxi_i(status, LIGHTREC_REG_STATE, | |
2594 | offsetof(struct lightrec_state, regs.cp0[12])); | |
d16005f8 | 2595 | |
98fa08a5 | 2596 | tmp = lightrec_alloc_reg_temp(reg_cache, _jit); |
d16005f8 | 2597 | |
98fa08a5 PC |
2598 | /* status = ((status >> 2) & 0xf) | status & ~0xf; */ |
2599 | jit_rshi(tmp, status, 2); | |
2600 | jit_andi(tmp, tmp, 0xf); | |
2601 | jit_andi(status, status, ~0xful); | |
2602 | jit_orr(status, status, tmp); | |
2603 | ||
2604 | jit_ldxi_i(tmp, LIGHTREC_REG_STATE, | |
2605 | offsetof(struct lightrec_state, regs.cp0[13])); | |
2606 | jit_stxi_i(offsetof(struct lightrec_state, regs.cp0[12]), | |
2607 | LIGHTREC_REG_STATE, status); | |
2608 | ||
2609 | /* Exit dynarec in case there's a software interrupt. | |
2610 | * exit_flags = !!(status & cause & 0x0300) & status; */ | |
2611 | jit_andr(tmp, tmp, status); | |
2612 | jit_andi(tmp, tmp, 0x0300); | |
2613 | jit_nei(tmp, tmp, 0); | |
2614 | jit_andr(tmp, tmp, status); | |
2615 | jit_stxi_i(offsetof(struct lightrec_state, exit_flags), | |
2616 | LIGHTREC_REG_STATE, tmp); | |
2617 | ||
2618 | lightrec_free_reg(reg_cache, status); | |
d16005f8 | 2619 | lightrec_free_reg(reg_cache, tmp); |
d16005f8 PC |
2620 | } |
2621 | ||
98fa08a5 PC |
2622 | static void rec_CP(struct lightrec_cstate *state, |
2623 | const struct block *block, u16 offset) | |
d16005f8 | 2624 | { |
98fa08a5 | 2625 | union code c = block->opcode_list[offset].c; |
d16005f8 PC |
2626 | jit_state_t *_jit = block->_jit; |
2627 | ||
2628 | jit_name(__func__); | |
2629 | jit_note(__FILE__, __LINE__); | |
2630 | ||
ba3814c1 | 2631 | call_to_c_wrapper(state, block, c.opcode, C_WRAPPER_CP); |
d16005f8 PC |
2632 | } |
2633 | ||
98fa08a5 PC |
2634 | static void rec_meta_MOV(struct lightrec_cstate *state, |
2635 | const struct block *block, u16 offset) | |
d16005f8 | 2636 | { |
d16005f8 | 2637 | struct regcache *reg_cache = state->reg_cache; |
9259d748 PC |
2638 | const struct opcode *op = &block->opcode_list[offset]; |
2639 | union code c = op->c; | |
d16005f8 | 2640 | jit_state_t *_jit = block->_jit; |
9259d748 | 2641 | bool unload_rd; |
684432ad | 2642 | bool unload_rs, discard_rs; |
d16005f8 PC |
2643 | u8 rs, rd; |
2644 | ||
2645 | _jit_name(block->_jit, __func__); | |
2646 | jit_note(__FILE__, __LINE__); | |
9259d748 | 2647 | |
684432ad PC |
2648 | unload_rs = OPT_EARLY_UNLOAD |
2649 | && LIGHTREC_FLAGS_GET_RS(op->flags) == LIGHTREC_REG_UNLOAD; | |
2650 | discard_rs = OPT_EARLY_UNLOAD | |
2651 | && LIGHTREC_FLAGS_GET_RS(op->flags) == LIGHTREC_REG_DISCARD; | |
2652 | ||
2653 | if ((unload_rs || discard_rs) && c.m.rs) { | |
2654 | /* If the source register is going to be unloaded or discarded, | |
2655 | * then we can simply mark its host register as now pointing to | |
2656 | * the destination register. */ | |
2657 | pr_debug("Remap %s to %s at offset 0x%x\n", | |
2658 | lightrec_reg_name(c.m.rs), lightrec_reg_name(c.m.rd), | |
2659 | offset << 2); | |
2660 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.m.rs, 0); | |
2661 | lightrec_remap_reg(reg_cache, _jit, rs, c.m.rd, discard_rs); | |
2662 | lightrec_free_reg(reg_cache, rs); | |
2663 | return; | |
2664 | } | |
2665 | ||
9259d748 PC |
2666 | unload_rd = OPT_EARLY_UNLOAD |
2667 | && LIGHTREC_FLAGS_GET_RD(op->flags) == LIGHTREC_REG_UNLOAD; | |
2668 | ||
cb72ea13 PC |
2669 | if (c.m.rs && !lightrec_reg_is_loaded(reg_cache, c.m.rs)) { |
2670 | /* The source register is not yet loaded - we can load its value | |
2671 | * from the register cache directly into the target register. */ | |
2672 | rd = lightrec_alloc_reg_out(reg_cache, _jit, c.m.rd, REG_EXT); | |
2673 | ||
2674 | jit_ldxi_i(rd, LIGHTREC_REG_STATE, | |
2675 | offsetof(struct lightrec_state, regs.gpr) + (c.m.rs << 2)); | |
d16005f8 | 2676 | |
cb72ea13 PC |
2677 | lightrec_free_reg(reg_cache, rd); |
2678 | } else if (unload_rd) { | |
9259d748 PC |
2679 | /* If the destination register will be unloaded right after the |
2680 | * MOV meta-opcode, we don't actually need to write any host | |
2681 | * register - we can just store the source register directly to | |
2682 | * the register cache, at the offset corresponding to the | |
2683 | * destination register. */ | |
cb72ea13 PC |
2684 | lightrec_discard_reg_if_loaded(reg_cache, c.m.rd); |
2685 | ||
2686 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.m.rs, 0); | |
9259d748 PC |
2687 | |
2688 | jit_stxi_i(offsetof(struct lightrec_state, regs.gpr) | |
cb72ea13 | 2689 | + (c.m.rd << 2), LIGHTREC_REG_STATE, rs); |
d16005f8 | 2690 | |
98fa08a5 | 2691 | lightrec_free_reg(reg_cache, rs); |
9259d748 | 2692 | } else { |
cb72ea13 PC |
2693 | if (c.m.rs) |
2694 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.m.rs, 0); | |
2695 | ||
2696 | rd = lightrec_alloc_reg_out(reg_cache, _jit, c.m.rd, REG_EXT); | |
9259d748 | 2697 | |
cb72ea13 | 2698 | if (c.m.rs == 0) { |
9259d748 | 2699 | jit_movi(rd, 0); |
cb72ea13 | 2700 | } else { |
9259d748 | 2701 | jit_extr_i(rd, rs); |
cb72ea13 PC |
2702 | lightrec_free_reg(reg_cache, rs); |
2703 | } | |
9259d748 PC |
2704 | |
2705 | lightrec_free_reg(reg_cache, rd); | |
2706 | } | |
d16005f8 PC |
2707 | } |
2708 | ||
98fa08a5 PC |
2709 | static void rec_meta_EXTC_EXTS(struct lightrec_cstate *state, |
2710 | const struct block *block, | |
2711 | u16 offset) | |
d16005f8 | 2712 | { |
98fa08a5 PC |
2713 | struct regcache *reg_cache = state->reg_cache; |
2714 | union code c = block->opcode_list[offset].c; | |
d16005f8 | 2715 | jit_state_t *_jit = block->_jit; |
cb72ea13 | 2716 | u8 rs, rd; |
d16005f8 | 2717 | |
98fa08a5 | 2718 | _jit_name(block->_jit, __func__); |
d16005f8 PC |
2719 | jit_note(__FILE__, __LINE__); |
2720 | ||
684432ad PC |
2721 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], |
2722 | c.m.rs, c.m.rd, 0, REG_EXT, &rs, &rd); | |
d16005f8 | 2723 | |
cb72ea13 PC |
2724 | if (c.m.op == OP_META_EXTC) |
2725 | jit_extr_c(rd, rs); | |
98fa08a5 | 2726 | else |
cb72ea13 | 2727 | jit_extr_s(rd, rs); |
d16005f8 | 2728 | |
98fa08a5 | 2729 | lightrec_free_reg(reg_cache, rs); |
cb72ea13 | 2730 | lightrec_free_reg(reg_cache, rd); |
d16005f8 PC |
2731 | } |
2732 | ||
ba3814c1 PC |
2733 | static void rec_meta_MULT2(struct lightrec_cstate *state, |
2734 | const struct block *block, | |
2735 | u16 offset) | |
2736 | { | |
2737 | struct regcache *reg_cache = state->reg_cache; | |
2738 | union code c = block->opcode_list[offset].c; | |
2739 | jit_state_t *_jit = block->_jit; | |
2740 | u8 reg_lo = get_mult_div_lo(c); | |
2741 | u8 reg_hi = get_mult_div_hi(c); | |
2742 | u32 flags = block->opcode_list[offset].flags; | |
2743 | bool is_signed = c.i.op == OP_META_MULT2; | |
2744 | u8 rs, lo, hi, rflags = 0, hiflags = 0; | |
0cf41071 | 2745 | unsigned int i; |
ba3814c1 PC |
2746 | |
2747 | if (!op_flag_no_hi(flags) && c.r.op < 32) { | |
2748 | rflags = is_signed ? REG_EXT : REG_ZEXT; | |
2749 | hiflags = is_signed ? REG_EXT : (REG_EXT | REG_ZEXT); | |
2750 | } | |
2751 | ||
2752 | _jit_name(block->_jit, __func__); | |
2753 | jit_note(__FILE__, __LINE__); | |
2754 | ||
2755 | rs = lightrec_alloc_reg_in(reg_cache, _jit, c.i.rs, rflags); | |
2756 | ||
0cf41071 PC |
2757 | /* |
2758 | * We must handle the case where one of the output registers is our rs | |
2759 | * input register. Thanksfully, computing LO/HI can be done in any | |
2760 | * order. Here, we make sure that the computation that overwrites the | |
2761 | * input register is always performed last. | |
2762 | */ | |
2763 | for (i = 0; i < 2; i++) { | |
2764 | if ((!i ^ (reg_lo == c.i.rs)) && !op_flag_no_lo(flags)) { | |
2765 | lo = lightrec_alloc_reg_out(reg_cache, _jit, reg_lo, 0); | |
2766 | ||
2767 | if (c.r.op < 32) | |
2768 | jit_lshi(lo, rs, c.r.op); | |
2769 | else | |
2770 | jit_movi(lo, 0); | |
ba3814c1 | 2771 | |
0cf41071 PC |
2772 | lightrec_free_reg(reg_cache, lo); |
2773 | continue; | |
2774 | } | |
ba3814c1 | 2775 | |
0cf41071 PC |
2776 | if ((!!i ^ (reg_lo == c.i.rs)) && !op_flag_no_hi(flags)) { |
2777 | hi = lightrec_alloc_reg_out(reg_cache, _jit, | |
2778 | reg_hi, hiflags); | |
ba3814c1 | 2779 | |
f5ee77ca | 2780 | if (c.r.op >= 32) { |
0cf41071 | 2781 | jit_lshi(hi, rs, c.r.op - 32); |
f5ee77ca PC |
2782 | } else if (is_signed) { |
2783 | if (c.r.op) | |
2784 | jit_rshi(hi, rs, 32 - c.r.op); | |
2785 | else | |
2786 | jit_rshi(hi, rs, 31); | |
2787 | } else { | |
2788 | if (c.r.op) | |
2789 | jit_rshi_u(hi, rs, 32 - c.r.op); | |
2790 | else | |
2791 | jit_movi(hi, 0); | |
2792 | } | |
ba3814c1 | 2793 | |
0cf41071 PC |
2794 | lightrec_free_reg(reg_cache, hi); |
2795 | } | |
ba3814c1 PC |
2796 | } |
2797 | ||
2798 | lightrec_free_reg(reg_cache, rs); | |
2799 | ||
2800 | _jit_name(block->_jit, __func__); | |
2801 | jit_note(__FILE__, __LINE__); | |
2802 | } | |
2803 | ||
cb72ea13 PC |
2804 | static void rec_meta_COM(struct lightrec_cstate *state, |
2805 | const struct block *block, u16 offset) | |
2806 | { | |
2807 | struct regcache *reg_cache = state->reg_cache; | |
2808 | union code c = block->opcode_list[offset].c; | |
2809 | jit_state_t *_jit = block->_jit; | |
2810 | u8 rd, rs, flags; | |
2811 | ||
2812 | jit_note(__FILE__, __LINE__); | |
684432ad PC |
2813 | |
2814 | rec_alloc_rs_rd(reg_cache, _jit, &block->opcode_list[offset], | |
2815 | c.m.rs, c.m.rd, 0, 0, &rs, &rd); | |
cb72ea13 PC |
2816 | |
2817 | flags = lightrec_get_reg_in_flags(reg_cache, rs); | |
2818 | ||
2819 | lightrec_set_reg_out_flags(reg_cache, rd, | |
2820 | flags & REG_EXT); | |
2821 | ||
2822 | jit_comr(rd, rs); | |
2823 | ||
2824 | lightrec_free_reg(reg_cache, rs); | |
2825 | lightrec_free_reg(reg_cache, rd); | |
2826 | } | |
2827 | ||
5459088b PC |
2828 | static void rec_meta_LWU(struct lightrec_cstate *state, |
2829 | const struct block *block, | |
2830 | u16 offset) | |
2831 | { | |
2832 | jit_code_t code; | |
2833 | ||
2834 | if (is_big_endian() && __WORDSIZE == 64) | |
2835 | code = jit_code_unldr_u; | |
2836 | else | |
2837 | code = jit_code_unldr; | |
2838 | ||
2839 | _jit_name(block->_jit, __func__); | |
2840 | rec_load(state, block, offset, code, jit_code_bswapr_ui, false); | |
2841 | } | |
2842 | ||
2843 | static void rec_meta_SWU(struct lightrec_cstate *state, | |
2844 | const struct block *block, | |
2845 | u16 offset) | |
2846 | { | |
2847 | _jit_name(block->_jit, __func__); | |
2848 | rec_store(state, block, offset, jit_code_unstr, jit_code_bswapr_ui); | |
2849 | } | |
2850 | ||
e26c79a8 PC |
2851 | static void unknown_opcode(struct lightrec_cstate *state, |
2852 | const struct block *block, u16 offset) | |
2853 | { | |
2854 | rec_exit_early(state, block, offset, LIGHTREC_EXIT_UNKNOWN_OP, | |
2855 | block->pc + (offset << 2)); | |
2856 | } | |
2857 | ||
d16005f8 | 2858 | static const lightrec_rec_func_t rec_standard[64] = { |
98fa08a5 | 2859 | SET_DEFAULT_ELM(rec_standard, unknown_opcode), |
d16005f8 PC |
2860 | [OP_SPECIAL] = rec_SPECIAL, |
2861 | [OP_REGIMM] = rec_REGIMM, | |
2862 | [OP_J] = rec_J, | |
2863 | [OP_JAL] = rec_JAL, | |
2864 | [OP_BEQ] = rec_BEQ, | |
2865 | [OP_BNE] = rec_BNE, | |
2866 | [OP_BLEZ] = rec_BLEZ, | |
2867 | [OP_BGTZ] = rec_BGTZ, | |
2868 | [OP_ADDI] = rec_ADDI, | |
2869 | [OP_ADDIU] = rec_ADDIU, | |
2870 | [OP_SLTI] = rec_SLTI, | |
2871 | [OP_SLTIU] = rec_SLTIU, | |
2872 | [OP_ANDI] = rec_ANDI, | |
2873 | [OP_ORI] = rec_ORI, | |
2874 | [OP_XORI] = rec_XORI, | |
2875 | [OP_LUI] = rec_LUI, | |
2876 | [OP_CP0] = rec_CP0, | |
2877 | [OP_CP2] = rec_CP2, | |
2878 | [OP_LB] = rec_LB, | |
2879 | [OP_LH] = rec_LH, | |
2880 | [OP_LWL] = rec_LWL, | |
2881 | [OP_LW] = rec_LW, | |
2882 | [OP_LBU] = rec_LBU, | |
2883 | [OP_LHU] = rec_LHU, | |
2884 | [OP_LWR] = rec_LWR, | |
2885 | [OP_SB] = rec_SB, | |
2886 | [OP_SH] = rec_SH, | |
2887 | [OP_SWL] = rec_SWL, | |
2888 | [OP_SW] = rec_SW, | |
2889 | [OP_SWR] = rec_SWR, | |
9259d748 PC |
2890 | [OP_LWC2] = rec_LW, |
2891 | [OP_SWC2] = rec_SW, | |
d16005f8 | 2892 | |
cb72ea13 | 2893 | [OP_META] = rec_META, |
ba3814c1 PC |
2894 | [OP_META_MULT2] = rec_meta_MULT2, |
2895 | [OP_META_MULTU2] = rec_meta_MULT2, | |
5459088b PC |
2896 | [OP_META_LWU] = rec_meta_LWU, |
2897 | [OP_META_SWU] = rec_meta_SWU, | |
d16005f8 PC |
2898 | }; |
2899 | ||
2900 | static const lightrec_rec_func_t rec_special[64] = { | |
98fa08a5 | 2901 | SET_DEFAULT_ELM(rec_special, unknown_opcode), |
d16005f8 PC |
2902 | [OP_SPECIAL_SLL] = rec_special_SLL, |
2903 | [OP_SPECIAL_SRL] = rec_special_SRL, | |
2904 | [OP_SPECIAL_SRA] = rec_special_SRA, | |
2905 | [OP_SPECIAL_SLLV] = rec_special_SLLV, | |
2906 | [OP_SPECIAL_SRLV] = rec_special_SRLV, | |
2907 | [OP_SPECIAL_SRAV] = rec_special_SRAV, | |
2908 | [OP_SPECIAL_JR] = rec_special_JR, | |
2909 | [OP_SPECIAL_JALR] = rec_special_JALR, | |
2910 | [OP_SPECIAL_SYSCALL] = rec_special_SYSCALL, | |
2911 | [OP_SPECIAL_BREAK] = rec_special_BREAK, | |
2912 | [OP_SPECIAL_MFHI] = rec_special_MFHI, | |
2913 | [OP_SPECIAL_MTHI] = rec_special_MTHI, | |
2914 | [OP_SPECIAL_MFLO] = rec_special_MFLO, | |
2915 | [OP_SPECIAL_MTLO] = rec_special_MTLO, | |
2916 | [OP_SPECIAL_MULT] = rec_special_MULT, | |
2917 | [OP_SPECIAL_MULTU] = rec_special_MULTU, | |
2918 | [OP_SPECIAL_DIV] = rec_special_DIV, | |
2919 | [OP_SPECIAL_DIVU] = rec_special_DIVU, | |
2920 | [OP_SPECIAL_ADD] = rec_special_ADD, | |
2921 | [OP_SPECIAL_ADDU] = rec_special_ADDU, | |
2922 | [OP_SPECIAL_SUB] = rec_special_SUB, | |
2923 | [OP_SPECIAL_SUBU] = rec_special_SUBU, | |
2924 | [OP_SPECIAL_AND] = rec_special_AND, | |
2925 | [OP_SPECIAL_OR] = rec_special_OR, | |
2926 | [OP_SPECIAL_XOR] = rec_special_XOR, | |
2927 | [OP_SPECIAL_NOR] = rec_special_NOR, | |
2928 | [OP_SPECIAL_SLT] = rec_special_SLT, | |
2929 | [OP_SPECIAL_SLTU] = rec_special_SLTU, | |
2930 | }; | |
2931 | ||
2932 | static const lightrec_rec_func_t rec_regimm[64] = { | |
98fa08a5 | 2933 | SET_DEFAULT_ELM(rec_regimm, unknown_opcode), |
d16005f8 PC |
2934 | [OP_REGIMM_BLTZ] = rec_regimm_BLTZ, |
2935 | [OP_REGIMM_BGEZ] = rec_regimm_BGEZ, | |
2936 | [OP_REGIMM_BLTZAL] = rec_regimm_BLTZAL, | |
2937 | [OP_REGIMM_BGEZAL] = rec_regimm_BGEZAL, | |
2938 | }; | |
2939 | ||
2940 | static const lightrec_rec_func_t rec_cp0[64] = { | |
98fa08a5 | 2941 | SET_DEFAULT_ELM(rec_cp0, rec_CP), |
d16005f8 PC |
2942 | [OP_CP0_MFC0] = rec_cp0_MFC0, |
2943 | [OP_CP0_CFC0] = rec_cp0_CFC0, | |
2944 | [OP_CP0_MTC0] = rec_cp0_MTC0, | |
2945 | [OP_CP0_CTC0] = rec_cp0_CTC0, | |
2946 | [OP_CP0_RFE] = rec_cp0_RFE, | |
2947 | }; | |
2948 | ||
2949 | static const lightrec_rec_func_t rec_cp2_basic[64] = { | |
98fa08a5 | 2950 | SET_DEFAULT_ELM(rec_cp2_basic, rec_CP), |
d16005f8 PC |
2951 | [OP_CP2_BASIC_MFC2] = rec_cp2_basic_MFC2, |
2952 | [OP_CP2_BASIC_CFC2] = rec_cp2_basic_CFC2, | |
2953 | [OP_CP2_BASIC_MTC2] = rec_cp2_basic_MTC2, | |
2954 | [OP_CP2_BASIC_CTC2] = rec_cp2_basic_CTC2, | |
2955 | }; | |
2956 | ||
cb72ea13 PC |
2957 | static const lightrec_rec_func_t rec_meta[64] = { |
2958 | SET_DEFAULT_ELM(rec_meta, unknown_opcode), | |
2959 | [OP_META_MOV] = rec_meta_MOV, | |
2960 | [OP_META_EXTC] = rec_meta_EXTC_EXTS, | |
2961 | [OP_META_EXTS] = rec_meta_EXTC_EXTS, | |
2962 | [OP_META_COM] = rec_meta_COM, | |
2963 | }; | |
2964 | ||
98fa08a5 PC |
2965 | static void rec_SPECIAL(struct lightrec_cstate *state, |
2966 | const struct block *block, u16 offset) | |
d16005f8 | 2967 | { |
98fa08a5 PC |
2968 | union code c = block->opcode_list[offset].c; |
2969 | lightrec_rec_func_t f = rec_special[c.r.op]; | |
2970 | ||
2971 | if (!HAS_DEFAULT_ELM && unlikely(!f)) | |
2972 | unknown_opcode(state, block, offset); | |
d16005f8 | 2973 | else |
98fa08a5 | 2974 | (*f)(state, block, offset); |
d16005f8 PC |
2975 | } |
2976 | ||
98fa08a5 PC |
2977 | static void rec_REGIMM(struct lightrec_cstate *state, |
2978 | const struct block *block, u16 offset) | |
d16005f8 | 2979 | { |
98fa08a5 PC |
2980 | union code c = block->opcode_list[offset].c; |
2981 | lightrec_rec_func_t f = rec_regimm[c.r.rt]; | |
2982 | ||
2983 | if (!HAS_DEFAULT_ELM && unlikely(!f)) | |
2984 | unknown_opcode(state, block, offset); | |
d16005f8 | 2985 | else |
98fa08a5 | 2986 | (*f)(state, block, offset); |
d16005f8 PC |
2987 | } |
2988 | ||
98fa08a5 PC |
2989 | static void rec_CP0(struct lightrec_cstate *state, |
2990 | const struct block *block, u16 offset) | |
d16005f8 | 2991 | { |
98fa08a5 PC |
2992 | union code c = block->opcode_list[offset].c; |
2993 | lightrec_rec_func_t f = rec_cp0[c.r.rs]; | |
2994 | ||
2995 | if (!HAS_DEFAULT_ELM && unlikely(!f)) | |
2996 | rec_CP(state, block, offset); | |
d16005f8 | 2997 | else |
98fa08a5 | 2998 | (*f)(state, block, offset); |
d16005f8 PC |
2999 | } |
3000 | ||
98fa08a5 PC |
3001 | static void rec_CP2(struct lightrec_cstate *state, |
3002 | const struct block *block, u16 offset) | |
d16005f8 | 3003 | { |
98fa08a5 PC |
3004 | union code c = block->opcode_list[offset].c; |
3005 | ||
3006 | if (c.r.op == OP_CP2_BASIC) { | |
3007 | lightrec_rec_func_t f = rec_cp2_basic[c.r.rs]; | |
3008 | ||
3009 | if (HAS_DEFAULT_ELM || likely(f)) { | |
3010 | (*f)(state, block, offset); | |
d16005f8 PC |
3011 | return; |
3012 | } | |
3013 | } | |
3014 | ||
98fa08a5 | 3015 | rec_CP(state, block, offset); |
d16005f8 PC |
3016 | } |
3017 | ||
cb72ea13 PC |
3018 | static void rec_META(struct lightrec_cstate *state, |
3019 | const struct block *block, u16 offset) | |
3020 | { | |
3021 | union code c = block->opcode_list[offset].c; | |
3022 | lightrec_rec_func_t f = rec_meta[c.m.op]; | |
3023 | ||
3024 | if (!HAS_DEFAULT_ELM && unlikely(!f)) | |
3025 | unknown_opcode(state, block, offset); | |
3026 | else | |
3027 | (*f)(state, block, offset); | |
3028 | } | |
3029 | ||
98fa08a5 PC |
3030 | void lightrec_rec_opcode(struct lightrec_cstate *state, |
3031 | const struct block *block, u16 offset) | |
d16005f8 | 3032 | { |
98fa08a5 PC |
3033 | struct regcache *reg_cache = state->reg_cache; |
3034 | struct lightrec_branch_target *target; | |
3035 | const struct opcode *op = &block->opcode_list[offset]; | |
3036 | jit_state_t *_jit = block->_jit; | |
3037 | lightrec_rec_func_t f; | |
03535202 | 3038 | u16 unload_offset; |
98fa08a5 | 3039 | |
03535202 PC |
3040 | if (op_flag_sync(op->flags)) { |
3041 | if (state->cycles) | |
3042 | jit_subi(LIGHTREC_REG_CYCLE, LIGHTREC_REG_CYCLE, state->cycles); | |
98fa08a5 PC |
3043 | state->cycles = 0; |
3044 | ||
3045 | lightrec_storeback_regs(reg_cache, _jit); | |
3046 | lightrec_regcache_reset(reg_cache); | |
3047 | ||
3048 | pr_debug("Adding branch target at offset 0x%x\n", offset << 2); | |
3049 | target = &state->targets[state->nb_targets++]; | |
3050 | target->offset = offset; | |
3051 | target->label = jit_indirect(); | |
3052 | } | |
3053 | ||
3054 | if (likely(op->opcode)) { | |
3055 | f = rec_standard[op->i.op]; | |
3056 | ||
3057 | if (!HAS_DEFAULT_ELM && unlikely(!f)) | |
3058 | unknown_opcode(state, block, offset); | |
3059 | else | |
3060 | (*f)(state, block, offset); | |
3061 | } | |
3062 | ||
03535202 PC |
3063 | if (OPT_EARLY_UNLOAD) { |
3064 | unload_offset = offset + | |
3065 | (has_delay_slot(op->c) && !op_flag_no_ds(op->flags)); | |
3066 | ||
3067 | lightrec_do_early_unload(state, block, unload_offset); | |
98fa08a5 | 3068 | } |
cb72ea13 PC |
3069 | |
3070 | state->no_load_delay = false; | |
d16005f8 | 3071 | } |