Commit | Line | Data |
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98fa08a5 | 1 | // SPDX-License-Identifier: LGPL-2.1-or-later |
d16005f8 | 2 | /* |
98fa08a5 | 3 | * Copyright (C) 2014-2021 Paul Cercueil <paul@crapouillou.net> |
d16005f8 PC |
4 | */ |
5 | ||
3107c849 | 6 | #include "arch.h" |
d16005f8 | 7 | #include "blockcache.h" |
d16005f8 PC |
8 | #include "debug.h" |
9 | #include "disassembler.h" | |
10 | #include "emitter.h" | |
11 | #include "interpreter.h" | |
98fa08a5 PC |
12 | #include "lightrec-config.h" |
13 | #include "lightning-wrapper.h" | |
d16005f8 PC |
14 | #include "lightrec.h" |
15 | #include "memmanager.h" | |
a59e5536 | 16 | #include "reaper.h" |
d16005f8 PC |
17 | #include "recompiler.h" |
18 | #include "regcache.h" | |
19 | #include "optimizer.h" | |
02487de7 | 20 | #include "tlsf/tlsf.h" |
d16005f8 PC |
21 | |
22 | #include <errno.h> | |
98fa08a5 | 23 | #include <inttypes.h> |
d16005f8 PC |
24 | #include <limits.h> |
25 | #if ENABLE_THREADED_COMPILER | |
26 | #include <stdatomic.h> | |
27 | #endif | |
28 | #include <stdbool.h> | |
29 | #include <stddef.h> | |
30 | #include <string.h> | |
d16005f8 | 31 | |
d16005f8 PC |
32 | static struct block * lightrec_precompile_block(struct lightrec_state *state, |
33 | u32 pc); | |
98fa08a5 PC |
34 | static bool lightrec_block_is_fully_tagged(const struct block *block); |
35 | ||
36 | static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data); | |
37 | static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg); | |
d16005f8 | 38 | |
a5a6f7b8 PC |
39 | static void lightrec_reap_block(struct lightrec_state *state, void *data); |
40 | ||
a59e5536 | 41 | static void lightrec_default_sb(struct lightrec_state *state, u32 opcode, |
2e6c828e | 42 | void *host, u32 addr, u32 data) |
a59e5536 | 43 | { |
2e6c828e | 44 | *(u8 *)host = (u8)data; |
a59e5536 | 45 | |
684432ad | 46 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) |
a59e5536 | 47 | lightrec_invalidate(state, addr, 1); |
48 | } | |
49 | ||
50 | static void lightrec_default_sh(struct lightrec_state *state, u32 opcode, | |
2e6c828e | 51 | void *host, u32 addr, u32 data) |
a59e5536 | 52 | { |
2e6c828e | 53 | *(u16 *)host = HTOLE16((u16)data); |
a59e5536 | 54 | |
684432ad | 55 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) |
a59e5536 | 56 | lightrec_invalidate(state, addr, 2); |
57 | } | |
58 | ||
59 | static void lightrec_default_sw(struct lightrec_state *state, u32 opcode, | |
60 | void *host, u32 addr, u32 data) | |
61 | { | |
62 | *(u32 *)host = HTOLE32(data); | |
63 | ||
684432ad | 64 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) |
a59e5536 | 65 | lightrec_invalidate(state, addr, 4); |
66 | } | |
67 | ||
68 | static u8 lightrec_default_lb(struct lightrec_state *state, | |
69 | u32 opcode, void *host, u32 addr) | |
70 | { | |
71 | return *(u8 *)host; | |
72 | } | |
73 | ||
74 | static u16 lightrec_default_lh(struct lightrec_state *state, | |
75 | u32 opcode, void *host, u32 addr) | |
76 | { | |
77 | return LE16TOH(*(u16 *)host); | |
78 | } | |
79 | ||
80 | static u32 lightrec_default_lw(struct lightrec_state *state, | |
81 | u32 opcode, void *host, u32 addr) | |
82 | { | |
83 | return LE32TOH(*(u32 *)host); | |
84 | } | |
85 | ||
5459088b PC |
86 | static u32 lightrec_default_lwu(struct lightrec_state *state, |
87 | u32 opcode, void *host, u32 addr) | |
88 | { | |
89 | u32 val; | |
90 | ||
91 | memcpy(&val, host, 4); | |
92 | ||
93 | return LE32TOH(val); | |
94 | } | |
95 | ||
96 | static void lightrec_default_swu(struct lightrec_state *state, u32 opcode, | |
97 | void *host, u32 addr, u32 data) | |
98 | { | |
99 | data = HTOLE32(data); | |
100 | ||
101 | memcpy(host, &data, 4); | |
102 | ||
103 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) | |
104 | lightrec_invalidate(state, addr & ~0x3, 8); | |
105 | } | |
106 | ||
a59e5536 | 107 | static const struct lightrec_mem_map_ops lightrec_default_ops = { |
108 | .sb = lightrec_default_sb, | |
109 | .sh = lightrec_default_sh, | |
110 | .sw = lightrec_default_sw, | |
111 | .lb = lightrec_default_lb, | |
112 | .lh = lightrec_default_lh, | |
113 | .lw = lightrec_default_lw, | |
5459088b PC |
114 | .lwu = lightrec_default_lwu, |
115 | .swu = lightrec_default_swu, | |
a59e5536 | 116 | }; |
117 | ||
98fa08a5 PC |
118 | static void __segfault_cb(struct lightrec_state *state, u32 addr, |
119 | const struct block *block) | |
d16005f8 PC |
120 | { |
121 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); | |
122 | pr_err("Segmentation fault in recompiled code: invalid " | |
f5ee77ca | 123 | "load/store at address "PC_FMT"\n", addr); |
98fa08a5 | 124 | if (block) |
f5ee77ca | 125 | pr_err("Was executing block "PC_FMT"\n", block->pc); |
d16005f8 PC |
126 | } |
127 | ||
a59e5536 | 128 | static void lightrec_swl(struct lightrec_state *state, |
129 | const struct lightrec_mem_map_ops *ops, | |
130 | u32 opcode, void *host, u32 addr, u32 data) | |
d16005f8 | 131 | { |
a59e5536 | 132 | unsigned int shift = addr & 0x3; |
13b02197 | 133 | unsigned int mask = shift < 3 ? GENMASK(31, (shift + 1) * 8) : 0; |
a59e5536 | 134 | u32 old_data; |
135 | ||
136 | /* Align to 32 bits */ | |
137 | addr &= ~3; | |
138 | host = (void *)((uintptr_t)host & ~3); | |
139 | ||
140 | old_data = ops->lw(state, opcode, host, addr); | |
141 | ||
142 | data = (data >> ((3 - shift) * 8)) | (old_data & mask); | |
143 | ||
144 | ops->sw(state, opcode, host, addr, data); | |
145 | } | |
146 | ||
147 | static void lightrec_swr(struct lightrec_state *state, | |
148 | const struct lightrec_mem_map_ops *ops, | |
149 | u32 opcode, void *host, u32 addr, u32 data) | |
150 | { | |
151 | unsigned int shift = addr & 0x3; | |
152 | unsigned int mask = (1 << (shift * 8)) - 1; | |
153 | u32 old_data; | |
154 | ||
155 | /* Align to 32 bits */ | |
156 | addr &= ~3; | |
157 | host = (void *)((uintptr_t)host & ~3); | |
158 | ||
159 | old_data = ops->lw(state, opcode, host, addr); | |
160 | ||
161 | data = (data << (shift * 8)) | (old_data & mask); | |
162 | ||
163 | ops->sw(state, opcode, host, addr, data); | |
164 | } | |
165 | ||
166 | static void lightrec_swc2(struct lightrec_state *state, union code op, | |
167 | const struct lightrec_mem_map_ops *ops, | |
168 | void *host, u32 addr) | |
169 | { | |
98fa08a5 | 170 | u32 data = lightrec_mfc2(state, op.i.rt); |
a59e5536 | 171 | |
172 | ops->sw(state, op.opcode, host, addr, data); | |
173 | } | |
174 | ||
175 | static u32 lightrec_lwl(struct lightrec_state *state, | |
176 | const struct lightrec_mem_map_ops *ops, | |
177 | u32 opcode, void *host, u32 addr, u32 data) | |
178 | { | |
179 | unsigned int shift = addr & 0x3; | |
180 | unsigned int mask = (1 << (24 - shift * 8)) - 1; | |
181 | u32 old_data; | |
182 | ||
183 | /* Align to 32 bits */ | |
184 | addr &= ~3; | |
185 | host = (void *)((uintptr_t)host & ~3); | |
186 | ||
187 | old_data = ops->lw(state, opcode, host, addr); | |
188 | ||
189 | return (data & mask) | (old_data << (24 - shift * 8)); | |
190 | } | |
191 | ||
192 | static u32 lightrec_lwr(struct lightrec_state *state, | |
193 | const struct lightrec_mem_map_ops *ops, | |
194 | u32 opcode, void *host, u32 addr, u32 data) | |
195 | { | |
196 | unsigned int shift = addr & 0x3; | |
13b02197 | 197 | unsigned int mask = shift ? GENMASK(31, 32 - shift * 8) : 0; |
a59e5536 | 198 | u32 old_data; |
199 | ||
200 | /* Align to 32 bits */ | |
201 | addr &= ~3; | |
202 | host = (void *)((uintptr_t)host & ~3); | |
203 | ||
204 | old_data = ops->lw(state, opcode, host, addr); | |
205 | ||
206 | return (data & mask) | (old_data >> (shift * 8)); | |
207 | } | |
208 | ||
209 | static void lightrec_lwc2(struct lightrec_state *state, union code op, | |
210 | const struct lightrec_mem_map_ops *ops, | |
211 | void *host, u32 addr) | |
212 | { | |
213 | u32 data = ops->lw(state, op.opcode, host, addr); | |
214 | ||
98fa08a5 | 215 | lightrec_mtc2(state, op.i.rt, data); |
d16005f8 PC |
216 | } |
217 | ||
218 | static void lightrec_invalidate_map(struct lightrec_state *state, | |
98fa08a5 | 219 | const struct lightrec_mem_map *map, u32 addr, u32 len) |
d16005f8 | 220 | { |
98fa08a5 | 221 | if (map == &state->maps[PSX_MAP_KERNEL_USER_RAM]) { |
02487de7 PC |
222 | memset(lut_address(state, lut_offset(addr)), 0, |
223 | ((len + 3) / 4) * lut_elm_size(state)); | |
98fa08a5 | 224 | } |
d16005f8 PC |
225 | } |
226 | ||
9259d748 | 227 | static enum psx_map |
02487de7 | 228 | lightrec_get_map_idx(struct lightrec_state *state, u32 kaddr) |
d16005f8 | 229 | { |
98fa08a5 | 230 | const struct lightrec_mem_map *map; |
d16005f8 PC |
231 | unsigned int i; |
232 | ||
233 | for (i = 0; i < state->nb_maps; i++) { | |
02487de7 | 234 | map = &state->maps[i]; |
d16005f8 | 235 | |
02487de7 PC |
236 | if (kaddr >= map->pc && kaddr < map->pc + map->length) |
237 | return (enum psx_map) i; | |
d16005f8 PC |
238 | } |
239 | ||
02487de7 PC |
240 | return PSX_MAP_UNKNOWN; |
241 | } | |
242 | ||
243 | const struct lightrec_mem_map * | |
244 | lightrec_get_map(struct lightrec_state *state, void **host, u32 kaddr) | |
245 | { | |
246 | const struct lightrec_mem_map *map; | |
247 | enum psx_map idx; | |
248 | u32 addr; | |
249 | ||
250 | idx = lightrec_get_map_idx(state, kaddr); | |
251 | if (idx == PSX_MAP_UNKNOWN) | |
98fa08a5 PC |
252 | return NULL; |
253 | ||
02487de7 | 254 | map = &state->maps[idx]; |
98fa08a5 PC |
255 | addr = kaddr - map->pc; |
256 | ||
257 | while (map->mirror_of) | |
258 | map = map->mirror_of; | |
259 | ||
260 | if (host) | |
261 | *host = map->address + addr; | |
262 | ||
263 | return map; | |
d16005f8 PC |
264 | } |
265 | ||
cb72ea13 PC |
266 | u32 lightrec_rw(struct lightrec_state *state, union code op, u32 base, |
267 | u32 data, u32 *flags, struct block *block, u16 offset) | |
d16005f8 PC |
268 | { |
269 | const struct lightrec_mem_map *map; | |
a59e5536 | 270 | const struct lightrec_mem_map_ops *ops; |
98fa08a5 | 271 | u32 opcode = op.opcode; |
cb72ea13 PC |
272 | bool was_tagged = true; |
273 | u16 old_flags; | |
274 | u32 addr; | |
a59e5536 | 275 | void *host; |
d16005f8 | 276 | |
cb72ea13 | 277 | addr = kunseg(base + (s16) op.i.imm); |
d16005f8 | 278 | |
cb72ea13 | 279 | map = lightrec_get_map(state, &host, addr); |
d16005f8 | 280 | if (!map) { |
98fa08a5 | 281 | __segfault_cb(state, addr, block); |
d16005f8 PC |
282 | return 0; |
283 | } | |
284 | ||
cb72ea13 PC |
285 | if (flags) |
286 | was_tagged = LIGHTREC_FLAGS_GET_IO_MODE(*flags); | |
d16005f8 | 287 | |
6ce0b00a | 288 | if (likely(!map->ops)) { |
cb72ea13 PC |
289 | if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags)) { |
290 | /* Force parallel port accesses as HW accesses, because | |
291 | * the direct-I/O emitters can't differenciate it. */ | |
292 | if (unlikely(map == &state->maps[PSX_MAP_PARALLEL_PORT])) | |
293 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW); | |
294 | /* If the base register is 0x0, be extra suspicious. | |
295 | * Some games (e.g. Sled Storm) actually do segmentation | |
296 | * faults by using uninitialized pointers, which are | |
297 | * later initialized to point to hardware registers. */ | |
298 | else if (op.i.rs && base == 0x0) | |
299 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW); | |
300 | else | |
301 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_DIRECT); | |
302 | } | |
d16005f8 | 303 | |
a59e5536 | 304 | ops = &lightrec_default_ops; |
6ce0b00a PC |
305 | } else if (flags && |
306 | LIGHTREC_FLAGS_GET_IO_MODE(*flags) == LIGHTREC_IO_DIRECT_HW) { | |
307 | ops = &lightrec_default_ops; | |
308 | } else { | |
309 | if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags)) | |
310 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW); | |
311 | ||
312 | ops = map->ops; | |
a59e5536 | 313 | } |
d16005f8 | 314 | |
cb72ea13 PC |
315 | if (!was_tagged) { |
316 | old_flags = block_set_flags(block, BLOCK_SHOULD_RECOMPILE); | |
317 | ||
318 | if (!(old_flags & BLOCK_SHOULD_RECOMPILE)) { | |
f5ee77ca | 319 | pr_debug("Opcode of block at "PC_FMT" has been tagged" |
cb72ea13 PC |
320 | " - flag for recompilation\n", block->pc); |
321 | ||
322 | lut_write(state, lut_offset(block->pc), NULL); | |
323 | } | |
324 | } | |
325 | ||
d16005f8 PC |
326 | switch (op.i.op) { |
327 | case OP_SB: | |
2e6c828e | 328 | ops->sb(state, opcode, host, addr, data); |
d16005f8 PC |
329 | return 0; |
330 | case OP_SH: | |
2e6c828e | 331 | ops->sh(state, opcode, host, addr, data); |
d16005f8 PC |
332 | return 0; |
333 | case OP_SWL: | |
a59e5536 | 334 | lightrec_swl(state, ops, opcode, host, addr, data); |
d16005f8 PC |
335 | return 0; |
336 | case OP_SWR: | |
a59e5536 | 337 | lightrec_swr(state, ops, opcode, host, addr, data); |
d16005f8 PC |
338 | return 0; |
339 | case OP_SW: | |
a59e5536 | 340 | ops->sw(state, opcode, host, addr, data); |
d16005f8 PC |
341 | return 0; |
342 | case OP_SWC2: | |
a59e5536 | 343 | lightrec_swc2(state, op, ops, host, addr); |
d16005f8 PC |
344 | return 0; |
345 | case OP_LB: | |
a59e5536 | 346 | return (s32) (s8) ops->lb(state, opcode, host, addr); |
d16005f8 | 347 | case OP_LBU: |
a59e5536 | 348 | return ops->lb(state, opcode, host, addr); |
d16005f8 | 349 | case OP_LH: |
a59e5536 | 350 | return (s32) (s16) ops->lh(state, opcode, host, addr); |
d16005f8 | 351 | case OP_LHU: |
a59e5536 | 352 | return ops->lh(state, opcode, host, addr); |
d16005f8 | 353 | case OP_LWC2: |
a59e5536 | 354 | lightrec_lwc2(state, op, ops, host, addr); |
d16005f8 | 355 | return 0; |
a59e5536 | 356 | case OP_LWL: |
357 | return lightrec_lwl(state, ops, opcode, host, addr, data); | |
358 | case OP_LWR: | |
359 | return lightrec_lwr(state, ops, opcode, host, addr, data); | |
5459088b PC |
360 | case OP_META_LWU: |
361 | return ops->lwu(state, opcode, host, addr); | |
362 | case OP_META_SWU: | |
363 | ops->swu(state, opcode, host, addr, data); | |
364 | return 0; | |
d16005f8 PC |
365 | case OP_LW: |
366 | default: | |
a59e5536 | 367 | return ops->lw(state, opcode, host, addr); |
d16005f8 PC |
368 | } |
369 | } | |
370 | ||
371 | static void lightrec_rw_helper(struct lightrec_state *state, | |
03535202 | 372 | union code op, u32 *flags, |
cb72ea13 | 373 | struct block *block, u16 offset) |
d16005f8 | 374 | { |
98fa08a5 | 375 | u32 ret = lightrec_rw(state, op, state->regs.gpr[op.i.rs], |
cb72ea13 | 376 | state->regs.gpr[op.i.rt], flags, block, offset); |
d16005f8 PC |
377 | |
378 | switch (op.i.op) { | |
379 | case OP_LB: | |
380 | case OP_LBU: | |
381 | case OP_LH: | |
382 | case OP_LHU: | |
383 | case OP_LWL: | |
384 | case OP_LWR: | |
385 | case OP_LW: | |
5459088b | 386 | case OP_META_LWU: |
cb72ea13 PC |
387 | if (OPT_HANDLE_LOAD_DELAYS && unlikely(!state->in_delay_slot_n)) { |
388 | state->temp_reg = ret; | |
389 | state->in_delay_slot_n = 0xff; | |
390 | } else if (op.i.rt) { | |
98fa08a5 | 391 | state->regs.gpr[op.i.rt] = ret; |
cb72ea13 | 392 | } |
d8b04acd PC |
393 | fallthrough; |
394 | default: | |
d16005f8 PC |
395 | break; |
396 | } | |
397 | } | |
398 | ||
03535202 | 399 | static void lightrec_rw_cb(struct lightrec_state *state, u32 arg) |
d16005f8 | 400 | { |
cb72ea13 | 401 | lightrec_rw_helper(state, (union code) arg, NULL, NULL, 0); |
d16005f8 PC |
402 | } |
403 | ||
03535202 | 404 | static void lightrec_rw_generic_cb(struct lightrec_state *state, u32 arg) |
d16005f8 | 405 | { |
98fa08a5 PC |
406 | struct block *block; |
407 | struct opcode *op; | |
98fa08a5 PC |
408 | u16 offset = (u16)arg; |
409 | ||
410 | block = lightrec_find_block_from_lut(state->block_cache, | |
0e720fb1 | 411 | arg >> 16, state->curr_pc); |
98fa08a5 | 412 | if (unlikely(!block)) { |
f5ee77ca | 413 | pr_err("rw_generic: No block found in LUT for "PC_FMT" offset 0x%"PRIx16"\n", |
0e720fb1 | 414 | state->curr_pc, offset); |
ba3814c1 | 415 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); |
98fa08a5 PC |
416 | return; |
417 | } | |
418 | ||
419 | op = &block->opcode_list[offset]; | |
cb72ea13 | 420 | lightrec_rw_helper(state, op->c, &op->flags, block, offset); |
d16005f8 PC |
421 | } |
422 | ||
98fa08a5 | 423 | static u32 clamp_s32(s32 val, s32 min, s32 max) |
d16005f8 | 424 | { |
98fa08a5 PC |
425 | return val < min ? min : val > max ? max : val; |
426 | } | |
d16005f8 | 427 | |
11357fef PC |
428 | static u16 load_u16(u32 *ptr) |
429 | { | |
430 | return ((struct u16x2 *) ptr)->l; | |
431 | } | |
432 | ||
433 | static void store_u16(u32 *ptr, u16 value) | |
434 | { | |
435 | ((struct u16x2 *) ptr)->l = value; | |
436 | } | |
437 | ||
98fa08a5 PC |
438 | static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg) |
439 | { | |
440 | s16 gteir1, gteir2, gteir3; | |
441 | ||
442 | switch (reg) { | |
443 | case 1: | |
444 | case 3: | |
445 | case 5: | |
446 | case 8: | |
447 | case 9: | |
448 | case 10: | |
449 | case 11: | |
11357fef | 450 | return (s32)(s16) load_u16(&state->regs.cp2d[reg]); |
98fa08a5 PC |
451 | case 7: |
452 | case 16: | |
453 | case 17: | |
454 | case 18: | |
455 | case 19: | |
11357fef | 456 | return load_u16(&state->regs.cp2d[reg]); |
98fa08a5 PC |
457 | case 28: |
458 | case 29: | |
11357fef PC |
459 | gteir1 = (s16) load_u16(&state->regs.cp2d[9]); |
460 | gteir2 = (s16) load_u16(&state->regs.cp2d[10]); | |
461 | gteir3 = (s16) load_u16(&state->regs.cp2d[11]); | |
98fa08a5 PC |
462 | |
463 | return clamp_s32(gteir1 >> 7, 0, 0x1f) << 0 | | |
464 | clamp_s32(gteir2 >> 7, 0, 0x1f) << 5 | | |
465 | clamp_s32(gteir3 >> 7, 0, 0x1f) << 10; | |
466 | case 15: | |
467 | reg = 14; | |
d8b04acd PC |
468 | fallthrough; |
469 | default: | |
98fa08a5 PC |
470 | return state->regs.cp2d[reg]; |
471 | } | |
472 | } | |
d16005f8 | 473 | |
98fa08a5 PC |
474 | u32 lightrec_mfc(struct lightrec_state *state, union code op) |
475 | { | |
ba3814c1 PC |
476 | u32 val; |
477 | ||
98fa08a5 PC |
478 | if (op.i.op == OP_CP0) |
479 | return state->regs.cp0[op.r.rd]; | |
9259d748 PC |
480 | |
481 | if (op.i.op == OP_SWC2) { | |
482 | val = lightrec_mfc2(state, op.i.rt); | |
483 | } else if (op.r.rs == OP_CP2_BASIC_MFC2) | |
fdf33147 PC |
484 | val = lightrec_mfc2(state, op.r.rd); |
485 | else { | |
486 | val = state->regs.cp2c[op.r.rd]; | |
487 | ||
488 | switch (op.r.rd) { | |
489 | case 4: | |
490 | case 12: | |
491 | case 20: | |
492 | case 26: | |
493 | case 27: | |
494 | case 29: | |
495 | case 30: | |
496 | val = (u32)(s16)val; | |
497 | fallthrough; | |
498 | default: | |
499 | break; | |
500 | } | |
501 | } | |
ba3814c1 | 502 | |
fdf33147 PC |
503 | if (state->ops.cop2_notify) |
504 | (*state->ops.cop2_notify)(state, op.opcode, val); | |
ba3814c1 | 505 | |
fdf33147 PC |
506 | return val; |
507 | } | |
508 | ||
509 | static void lightrec_mfc_cb(struct lightrec_state *state, union code op) | |
510 | { | |
511 | u32 rt = lightrec_mfc(state, op); | |
512 | ||
9259d748 | 513 | if (op.i.op == OP_SWC2) |
cb72ea13 | 514 | state->temp_reg = rt; |
9259d748 | 515 | else if (op.r.rt) |
fdf33147 | 516 | state->regs.gpr[op.r.rt] = rt; |
d16005f8 PC |
517 | } |
518 | ||
98fa08a5 | 519 | static void lightrec_mtc0(struct lightrec_state *state, u8 reg, u32 data) |
d16005f8 | 520 | { |
fd58fa32 | 521 | u32 status, oldstatus, cause; |
98fa08a5 PC |
522 | |
523 | switch (reg) { | |
524 | case 1: | |
525 | case 4: | |
526 | case 8: | |
527 | case 14: | |
528 | case 15: | |
529 | /* Those registers are read-only */ | |
530 | return; | |
fd58fa32 | 531 | default: |
98fa08a5 PC |
532 | break; |
533 | } | |
d16005f8 | 534 | |
98fa08a5 PC |
535 | if (reg == 12) { |
536 | status = state->regs.cp0[12]; | |
fd58fa32 | 537 | oldstatus = status; |
d16005f8 | 538 | |
98fa08a5 PC |
539 | if (status & ~data & BIT(16)) { |
540 | state->ops.enable_ram(state, true); | |
541 | lightrec_invalidate_all(state); | |
542 | } else if (~status & data & BIT(16)) { | |
543 | state->ops.enable_ram(state, false); | |
544 | } | |
545 | } | |
546 | ||
fd58fa32 PC |
547 | if (reg == 13) { |
548 | state->regs.cp0[13] &= ~0x300; | |
549 | state->regs.cp0[13] |= data & 0x300; | |
550 | } else { | |
551 | state->regs.cp0[reg] = data; | |
552 | } | |
98fa08a5 PC |
553 | |
554 | if (reg == 12 || reg == 13) { | |
555 | cause = state->regs.cp0[13]; | |
556 | status = state->regs.cp0[12]; | |
557 | ||
fd58fa32 | 558 | /* Handle software interrupts */ |
684432ad | 559 | if ((!!(status & cause & 0x300)) & status) |
98fa08a5 | 560 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT); |
fd58fa32 PC |
561 | |
562 | /* Handle hardware interrupts */ | |
563 | if (reg == 12 && !(~status & 0x401) && (~oldstatus & 0x401)) | |
564 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT); | |
98fa08a5 PC |
565 | } |
566 | } | |
567 | ||
568 | static u32 count_leading_bits(s32 data) | |
569 | { | |
98fa08a5 PC |
570 | u32 cnt = 33; |
571 | ||
de742fa0 PC |
572 | #ifdef __has_builtin |
573 | #if __has_builtin(__builtin_clrsb) | |
574 | return 1 + __builtin_clrsb(data); | |
575 | #endif | |
576 | #endif | |
577 | ||
98fa08a5 PC |
578 | data = (data ^ (data >> 31)) << 1; |
579 | ||
580 | do { | |
581 | cnt -= 1; | |
582 | data >>= 1; | |
583 | } while (data); | |
584 | ||
585 | return cnt; | |
98fa08a5 PC |
586 | } |
587 | ||
588 | static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data) | |
589 | { | |
590 | switch (reg) { | |
591 | case 15: | |
592 | state->regs.cp2d[12] = state->regs.cp2d[13]; | |
593 | state->regs.cp2d[13] = state->regs.cp2d[14]; | |
594 | state->regs.cp2d[14] = data; | |
595 | break; | |
596 | case 28: | |
597 | state->regs.cp2d[9] = (data << 7) & 0xf80; | |
598 | state->regs.cp2d[10] = (data << 2) & 0xf80; | |
599 | state->regs.cp2d[11] = (data >> 3) & 0xf80; | |
600 | break; | |
601 | case 31: | |
602 | return; | |
603 | case 30: | |
604 | state->regs.cp2d[31] = count_leading_bits((s32) data); | |
d8b04acd PC |
605 | fallthrough; |
606 | default: | |
98fa08a5 PC |
607 | state->regs.cp2d[reg] = data; |
608 | break; | |
609 | } | |
610 | } | |
d16005f8 | 611 | |
98fa08a5 PC |
612 | static void lightrec_ctc2(struct lightrec_state *state, u8 reg, u32 data) |
613 | { | |
614 | switch (reg) { | |
615 | case 4: | |
616 | case 12: | |
617 | case 20: | |
618 | case 26: | |
619 | case 27: | |
620 | case 29: | |
621 | case 30: | |
11357fef | 622 | store_u16(&state->regs.cp2c[reg], data); |
98fa08a5 PC |
623 | break; |
624 | case 31: | |
625 | data = (data & 0x7ffff000) | !!(data & 0x7f87e000) << 31; | |
d8b04acd PC |
626 | fallthrough; |
627 | default: | |
11357fef | 628 | state->regs.cp2c[reg] = data; |
98fa08a5 PC |
629 | break; |
630 | } | |
98fa08a5 PC |
631 | } |
632 | ||
9259d748 | 633 | void lightrec_mtc(struct lightrec_state *state, union code op, u8 reg, u32 data) |
98fa08a5 | 634 | { |
fdf33147 | 635 | if (op.i.op == OP_CP0) { |
9259d748 | 636 | lightrec_mtc0(state, reg, data); |
fdf33147 | 637 | } else { |
9259d748 PC |
638 | if (op.i.op == OP_LWC2 || op.r.rs != OP_CP2_BASIC_CTC2) |
639 | lightrec_mtc2(state, reg, data); | |
fdf33147 | 640 | else |
9259d748 | 641 | lightrec_ctc2(state, reg, data); |
fdf33147 PC |
642 | |
643 | if (state->ops.cop2_notify) | |
644 | (*state->ops.cop2_notify)(state, op.opcode, data); | |
645 | } | |
d16005f8 PC |
646 | } |
647 | ||
03535202 | 648 | static void lightrec_mtc_cb(struct lightrec_state *state, u32 arg) |
d16005f8 | 649 | { |
03535202 | 650 | union code op = (union code) arg; |
9259d748 PC |
651 | u32 data; |
652 | u8 reg; | |
653 | ||
654 | if (op.i.op == OP_LWC2) { | |
cb72ea13 | 655 | data = state->temp_reg; |
9259d748 PC |
656 | reg = op.i.rt; |
657 | } else { | |
658 | data = state->regs.gpr[op.r.rt]; | |
659 | reg = op.r.rd; | |
660 | } | |
22eee2ac | 661 | |
9259d748 | 662 | lightrec_mtc(state, op, reg, data); |
d16005f8 PC |
663 | } |
664 | ||
98fa08a5 | 665 | void lightrec_rfe(struct lightrec_state *state) |
d16005f8 PC |
666 | { |
667 | u32 status; | |
668 | ||
669 | /* Read CP0 Status register (r12) */ | |
98fa08a5 | 670 | status = state->regs.cp0[12]; |
d16005f8 PC |
671 | |
672 | /* Switch the bits */ | |
673 | status = ((status & 0x3c) >> 2) | (status & ~0xf); | |
674 | ||
675 | /* Write it back */ | |
98fa08a5 | 676 | lightrec_mtc0(state, 12, status); |
d16005f8 PC |
677 | } |
678 | ||
98fa08a5 | 679 | void lightrec_cp(struct lightrec_state *state, union code op) |
d16005f8 | 680 | { |
98fa08a5 PC |
681 | if (op.i.op == OP_CP0) { |
682 | pr_err("Invalid CP opcode to coprocessor #0\n"); | |
683 | return; | |
684 | } | |
d16005f8 | 685 | |
98fa08a5 | 686 | (*state->ops.cop2_op)(state, op.opcode); |
d16005f8 PC |
687 | } |
688 | ||
03535202 | 689 | static void lightrec_cp_cb(struct lightrec_state *state, u32 arg) |
22eee2ac | 690 | { |
03535202 | 691 | lightrec_cp(state, (union code) arg); |
22eee2ac PC |
692 | } |
693 | ||
03535202 | 694 | static struct block * lightrec_get_block(struct lightrec_state *state, u32 pc) |
d16005f8 PC |
695 | { |
696 | struct block *block = lightrec_find_block(state->block_cache, pc); | |
ba3814c1 | 697 | u8 old_flags; |
d16005f8 | 698 | |
98fa08a5 | 699 | if (block && lightrec_block_is_outdated(state, block)) { |
f5ee77ca | 700 | pr_debug("Block at "PC_FMT" is outdated!\n", block->pc); |
d16005f8 | 701 | |
ba3814c1 PC |
702 | old_flags = block_set_flags(block, BLOCK_IS_DEAD); |
703 | if (!(old_flags & BLOCK_IS_DEAD)) { | |
704 | /* Make sure the recompiler isn't processing the block | |
705 | * we'll destroy */ | |
706 | if (ENABLE_THREADED_COMPILER) | |
707 | lightrec_recompiler_remove(state->rec, block); | |
708 | ||
ba3814c1 | 709 | remove_from_code_lut(state->block_cache, block); |
a5a6f7b8 PC |
710 | |
711 | if (ENABLE_THREADED_COMPILER) { | |
712 | lightrec_reaper_add(state->reaper, | |
713 | lightrec_reap_block, block); | |
714 | } else { | |
715 | lightrec_unregister_block(state->block_cache, block); | |
716 | lightrec_free_block(state, block); | |
717 | } | |
ba3814c1 | 718 | } |
d16005f8 | 719 | |
d16005f8 PC |
720 | block = NULL; |
721 | } | |
722 | ||
723 | if (!block) { | |
724 | block = lightrec_precompile_block(state, pc); | |
725 | if (!block) { | |
f5ee77ca | 726 | pr_err("Unable to recompile block at "PC_FMT"\n", pc); |
d16005f8 PC |
727 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); |
728 | return NULL; | |
729 | } | |
730 | ||
731 | lightrec_register_block(state->block_cache, block); | |
732 | } | |
733 | ||
734 | return block; | |
735 | } | |
736 | ||
737 | static void * get_next_block_func(struct lightrec_state *state, u32 pc) | |
738 | { | |
739 | struct block *block; | |
740 | bool should_recompile; | |
741 | void *func; | |
d8b04acd | 742 | int err; |
d16005f8 | 743 | |
9259d748 | 744 | do { |
d8b04acd | 745 | func = lut_read(state, lut_offset(pc)); |
d16005f8 | 746 | if (func && func != state->get_next_block) |
98fa08a5 | 747 | break; |
d16005f8 PC |
748 | |
749 | block = lightrec_get_block(state, pc); | |
750 | ||
751 | if (unlikely(!block)) | |
98fa08a5 PC |
752 | break; |
753 | ||
ba3814c1 PC |
754 | if (OPT_REPLACE_MEMSET && |
755 | block_has_flag(block, BLOCK_IS_MEMSET)) { | |
98fa08a5 PC |
756 | func = state->memset_func; |
757 | break; | |
758 | } | |
d16005f8 | 759 | |
ba3814c1 | 760 | should_recompile = block_has_flag(block, BLOCK_SHOULD_RECOMPILE) && |
cb72ea13 | 761 | !block_has_flag(block, BLOCK_NEVER_COMPILE) && |
ba3814c1 | 762 | !block_has_flag(block, BLOCK_IS_DEAD); |
d16005f8 PC |
763 | |
764 | if (unlikely(should_recompile)) { | |
f5ee77ca | 765 | pr_debug("Block at "PC_FMT" should recompile\n", pc); |
d16005f8 | 766 | |
d8b04acd | 767 | if (ENABLE_THREADED_COMPILER) { |
a59e5536 | 768 | lightrec_recompiler_add(state->rec, block); |
d8b04acd PC |
769 | } else { |
770 | err = lightrec_compile_block(state->cstate, block); | |
771 | if (err) { | |
772 | state->exit_flags = LIGHTREC_EXIT_NOMEM; | |
773 | return NULL; | |
774 | } | |
775 | } | |
d16005f8 PC |
776 | } |
777 | ||
778 | if (ENABLE_THREADED_COMPILER && likely(!should_recompile)) | |
98fa08a5 | 779 | func = lightrec_recompiler_run_first_pass(state, block, &pc); |
d16005f8 PC |
780 | else |
781 | func = block->function; | |
782 | ||
783 | if (likely(func)) | |
98fa08a5 | 784 | break; |
d16005f8 | 785 | |
ba3814c1 | 786 | if (unlikely(block_has_flag(block, BLOCK_NEVER_COMPILE))) { |
98fa08a5 PC |
787 | pc = lightrec_emulate_block(state, block, pc); |
788 | ||
789 | } else if (!ENABLE_THREADED_COMPILER) { | |
790 | /* Block wasn't compiled yet - run the interpreter */ | |
ba3814c1 | 791 | if (block_has_flag(block, BLOCK_FULLY_TAGGED)) |
98fa08a5 PC |
792 | pr_debug("Block fully tagged, skipping first pass\n"); |
793 | else if (ENABLE_FIRST_PASS && likely(!should_recompile)) | |
794 | pc = lightrec_emulate_block(state, block, pc); | |
d16005f8 | 795 | |
d16005f8 | 796 | /* Then compile it using the profiled data */ |
d8b04acd PC |
797 | err = lightrec_compile_block(state->cstate, block); |
798 | if (err) { | |
799 | state->exit_flags = LIGHTREC_EXIT_NOMEM; | |
800 | return NULL; | |
801 | } | |
ba3814c1 PC |
802 | } else if (unlikely(block_has_flag(block, BLOCK_IS_DEAD))) { |
803 | /* | |
804 | * If the block is dead but has never been compiled, | |
805 | * then its function pointer is NULL and we cannot | |
806 | * execute the block. In that case, reap all the dead | |
807 | * blocks now, and in the next loop we will create a | |
808 | * new block. | |
809 | */ | |
810 | lightrec_reaper_reap(state->reaper); | |
98fa08a5 PC |
811 | } else { |
812 | lightrec_recompiler_add(state->rec, block); | |
d16005f8 | 813 | } |
9259d748 PC |
814 | } while (state->exit_flags == LIGHTREC_EXIT_NORMAL |
815 | && state->current_cycle < state->target_cycle); | |
d16005f8 | 816 | |
0e720fb1 | 817 | state->curr_pc = pc; |
98fa08a5 | 818 | return func; |
d16005f8 PC |
819 | } |
820 | ||
d8b04acd PC |
821 | static void * lightrec_alloc_code(struct lightrec_state *state, size_t size) |
822 | { | |
823 | void *code; | |
824 | ||
825 | if (ENABLE_THREADED_COMPILER) | |
826 | lightrec_code_alloc_lock(state); | |
827 | ||
828 | code = tlsf_malloc(state->tlsf, size); | |
829 | ||
830 | if (ENABLE_THREADED_COMPILER) | |
831 | lightrec_code_alloc_unlock(state); | |
832 | ||
833 | return code; | |
834 | } | |
835 | ||
836 | static void lightrec_realloc_code(struct lightrec_state *state, | |
837 | void *ptr, size_t size) | |
838 | { | |
839 | /* NOTE: 'size' MUST be smaller than the size specified during | |
840 | * the allocation. */ | |
841 | ||
842 | if (ENABLE_THREADED_COMPILER) | |
843 | lightrec_code_alloc_lock(state); | |
844 | ||
845 | tlsf_realloc(state->tlsf, ptr, size); | |
846 | ||
847 | if (ENABLE_THREADED_COMPILER) | |
848 | lightrec_code_alloc_unlock(state); | |
849 | } | |
850 | ||
851 | static void lightrec_free_code(struct lightrec_state *state, void *ptr) | |
852 | { | |
853 | if (ENABLE_THREADED_COMPILER) | |
854 | lightrec_code_alloc_lock(state); | |
855 | ||
856 | tlsf_free(state->tlsf, ptr); | |
857 | ||
858 | if (ENABLE_THREADED_COMPILER) | |
859 | lightrec_code_alloc_unlock(state); | |
860 | } | |
861 | ||
cb72ea13 PC |
862 | static char lightning_code_data[0x80000]; |
863 | ||
02487de7 | 864 | static void * lightrec_emit_code(struct lightrec_state *state, |
d8b04acd | 865 | const struct block *block, |
02487de7 PC |
866 | jit_state_t *_jit, unsigned int *size) |
867 | { | |
868 | bool has_code_buffer = ENABLE_CODE_BUFFER && state->tlsf; | |
869 | jit_word_t code_size, new_code_size; | |
870 | void *code; | |
871 | ||
872 | jit_realize(); | |
873 | ||
cb72ea13 PC |
874 | if (ENABLE_DISASSEMBLER) |
875 | jit_set_data(lightning_code_data, sizeof(lightning_code_data), 0); | |
876 | else | |
02487de7 PC |
877 | jit_set_data(NULL, 0, JIT_DISABLE_DATA | JIT_DISABLE_NOTE); |
878 | ||
879 | if (has_code_buffer) { | |
880 | jit_get_code(&code_size); | |
878e6cda PC |
881 | |
882 | #ifdef __i386__ | |
883 | /* Lightning's code size estimation routine is buggy on x86 and | |
884 | * will return a value that's too small. */ | |
885 | code_size *= 2; | |
886 | #endif | |
887 | ||
d8b04acd PC |
888 | code = lightrec_alloc_code(state, (size_t) code_size); |
889 | ||
890 | if (!code) { | |
891 | if (ENABLE_THREADED_COMPILER) { | |
892 | /* If we're using the threaded compiler, return | |
893 | * an allocation error here. The threaded | |
894 | * compiler will then empty its job queue and | |
895 | * request a code flush using the reaper. */ | |
896 | return NULL; | |
897 | } | |
898 | ||
899 | /* Remove outdated blocks, and try again */ | |
900 | lightrec_remove_outdated_blocks(state->block_cache, block); | |
901 | ||
902 | pr_debug("Re-try to alloc %zu bytes...\n", code_size); | |
903 | ||
904 | code = lightrec_alloc_code(state, code_size); | |
905 | if (!code) { | |
906 | pr_err("Could not alloc even after removing old blocks!\n"); | |
907 | return NULL; | |
908 | } | |
909 | } | |
02487de7 PC |
910 | |
911 | jit_set_code(code, code_size); | |
912 | } | |
913 | ||
914 | code = jit_emit(); | |
878e6cda PC |
915 | if (!code) { |
916 | if (has_code_buffer) | |
917 | lightrec_free_code(state, code); | |
918 | ||
919 | return NULL; | |
920 | } | |
02487de7 PC |
921 | |
922 | jit_get_code(&new_code_size); | |
923 | lightrec_register(MEM_FOR_CODE, new_code_size); | |
924 | ||
925 | if (has_code_buffer) { | |
d8b04acd | 926 | lightrec_realloc_code(state, code, (size_t) new_code_size); |
02487de7 PC |
927 | |
928 | pr_debug("Creating code block at address 0x%" PRIxPTR ", " | |
929 | "code size: %" PRIuPTR " new: %" PRIuPTR "\n", | |
930 | (uintptr_t) code, code_size, new_code_size); | |
931 | } | |
932 | ||
933 | *size = (unsigned int) new_code_size; | |
934 | ||
9259d748 PC |
935 | if (state->ops.code_inv) |
936 | state->ops.code_inv(code, new_code_size); | |
937 | ||
02487de7 PC |
938 | return code; |
939 | } | |
940 | ||
98fa08a5 | 941 | static struct block * generate_wrapper(struct lightrec_state *state) |
d16005f8 PC |
942 | { |
943 | struct block *block; | |
944 | jit_state_t *_jit; | |
945 | unsigned int i; | |
cb72ea13 | 946 | |
d16005f8 PC |
947 | block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block)); |
948 | if (!block) | |
949 | goto err_no_mem; | |
950 | ||
951 | _jit = jit_new_state(); | |
952 | if (!_jit) | |
953 | goto err_free_block; | |
954 | ||
955 | jit_name("RW wrapper"); | |
956 | jit_note(__FILE__, __LINE__); | |
957 | ||
958 | /* Wrapper entry point */ | |
959 | jit_prolog(); | |
fd58fa32 PC |
960 | jit_tramp(256); |
961 | ||
8afce295 | 962 | /* Load pointer to C wrapper */ |
5eecf06d | 963 | jit_add_state(JIT_R1, JIT_R1); |
8afce295 | 964 | jit_ldxi(JIT_R1, JIT_R1, lightrec_offset(c_wrappers)); |
ba3814c1 | 965 | |
fd58fa32 PC |
966 | jit_epilog(); |
967 | jit_prolog(); | |
d16005f8 | 968 | |
fd58fa32 | 969 | /* Save all temporaries on stack */ |
ba3814c1 PC |
970 | for (i = 0; i < NUM_TEMPS; i++) { |
971 | if (i + FIRST_TEMP != 1) { | |
8afce295 | 972 | jit_stxi(lightrec_offset(wrapper_regs[i]), |
ba3814c1 PC |
973 | LIGHTREC_REG_STATE, JIT_R(i + FIRST_TEMP)); |
974 | } | |
975 | } | |
d16005f8 | 976 | |
ba3814c1 | 977 | jit_getarg(JIT_R2, jit_arg()); |
03535202 | 978 | |
ba3814c1 PC |
979 | jit_prepare(); |
980 | jit_pushargr(LIGHTREC_REG_STATE); | |
981 | jit_pushargr(JIT_R2); | |
d16005f8 | 982 | |
8afce295 | 983 | jit_ldxi_ui(JIT_R2, LIGHTREC_REG_STATE, lightrec_offset(target_cycle)); |
d16005f8 | 984 | |
ba3814c1 PC |
985 | /* state->current_cycle = state->target_cycle - delta; */ |
986 | jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, LIGHTREC_REG_CYCLE); | |
8afce295 | 987 | jit_stxi_i(lightrec_offset(current_cycle), LIGHTREC_REG_STATE, LIGHTREC_REG_CYCLE); |
d16005f8 | 988 | |
ba3814c1 PC |
989 | /* Call the wrapper function */ |
990 | jit_finishr(JIT_R1); | |
d16005f8 | 991 | |
ba3814c1 | 992 | /* delta = state->target_cycle - state->current_cycle */; |
8afce295 PC |
993 | jit_ldxi_ui(LIGHTREC_REG_CYCLE, LIGHTREC_REG_STATE, lightrec_offset(current_cycle)); |
994 | jit_ldxi_ui(JIT_R1, LIGHTREC_REG_STATE, lightrec_offset(target_cycle)); | |
ba3814c1 | 995 | jit_subr(LIGHTREC_REG_CYCLE, JIT_R1, LIGHTREC_REG_CYCLE); |
fd58fa32 | 996 | |
ba3814c1 PC |
997 | /* Restore temporaries from stack */ |
998 | for (i = 0; i < NUM_TEMPS; i++) { | |
999 | if (i + FIRST_TEMP != 1) { | |
1000 | jit_ldxi(JIT_R(i + FIRST_TEMP), LIGHTREC_REG_STATE, | |
8afce295 | 1001 | lightrec_offset(wrapper_regs[i])); |
ba3814c1 PC |
1002 | } |
1003 | } | |
d16005f8 | 1004 | |
ba3814c1 | 1005 | jit_ret(); |
d16005f8 PC |
1006 | jit_epilog(); |
1007 | ||
d16005f8 | 1008 | block->_jit = _jit; |
d16005f8 | 1009 | block->opcode_list = NULL; |
ba3814c1 | 1010 | block->flags = BLOCK_NO_OPCODE_LIST; |
d16005f8 PC |
1011 | block->nb_ops = 0; |
1012 | ||
d8b04acd | 1013 | block->function = lightrec_emit_code(state, block, _jit, |
02487de7 PC |
1014 | &block->code_size); |
1015 | if (!block->function) | |
878e6cda | 1016 | goto err_free_jit; |
02487de7 | 1017 | |
8afce295 | 1018 | state->c_wrapper = block->function; |
fd58fa32 | 1019 | |
d16005f8 PC |
1020 | if (ENABLE_DISASSEMBLER) { |
1021 | pr_debug("Wrapper block:\n"); | |
1022 | jit_disassemble(); | |
1023 | } | |
1024 | ||
1025 | jit_clear_state(); | |
1026 | return block; | |
1027 | ||
878e6cda PC |
1028 | err_free_jit: |
1029 | jit_destroy_state(); | |
d16005f8 PC |
1030 | err_free_block: |
1031 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); | |
1032 | err_no_mem: | |
1033 | pr_err("Unable to compile wrapper: Out of memory\n"); | |
1034 | return NULL; | |
1035 | } | |
1036 | ||
98fa08a5 PC |
1037 | static u32 lightrec_memset(struct lightrec_state *state) |
1038 | { | |
1039 | u32 kunseg_pc = kunseg(state->regs.gpr[4]); | |
1040 | void *host; | |
1041 | const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg_pc); | |
1042 | u32 length = state->regs.gpr[5] * 4; | |
1043 | ||
1044 | if (!map) { | |
f5ee77ca PC |
1045 | pr_err("Unable to find memory map for memset target address "PC_FMT"\n", |
1046 | kunseg_pc); | |
98fa08a5 PC |
1047 | return 0; |
1048 | } | |
1049 | ||
5eecf06d | 1050 | pr_debug("Calling host memset, "PC_FMT" (host address 0x%"PRIxPTR") for %"PRIu32" bytes\n", |
98fa08a5 PC |
1051 | kunseg_pc, (uintptr_t)host, length); |
1052 | memset(host, 0, length); | |
1053 | ||
684432ad | 1054 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) |
98fa08a5 PC |
1055 | lightrec_invalidate_map(state, map, kunseg_pc, length); |
1056 | ||
1057 | /* Rough estimation of the number of cycles consumed */ | |
1058 | return 8 + 5 * (length + 3 / 4); | |
1059 | } | |
1060 | ||
cb72ea13 PC |
1061 | static u32 lightrec_check_load_delay(struct lightrec_state *state, u32 pc, u8 reg) |
1062 | { | |
1063 | struct block *block; | |
1064 | union code first_op; | |
1065 | ||
1066 | first_op = lightrec_read_opcode(state, pc); | |
1067 | ||
1068 | if (likely(!opcode_reads_register(first_op, reg))) { | |
1069 | state->regs.gpr[reg] = state->temp_reg; | |
1070 | } else { | |
1071 | block = lightrec_get_block(state, pc); | |
1072 | if (unlikely(!block)) { | |
f5ee77ca | 1073 | pr_err("Unable to get block at "PC_FMT"\n", pc); |
cb72ea13 PC |
1074 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); |
1075 | pc = 0; | |
1076 | } else { | |
1077 | pc = lightrec_handle_load_delay(state, block, pc, reg); | |
1078 | } | |
1079 | } | |
1080 | ||
1081 | return pc; | |
1082 | } | |
1083 | ||
1084 | static void update_cycle_counter_before_c(jit_state_t *_jit) | |
1085 | { | |
1086 | /* update state->current_cycle */ | |
8afce295 | 1087 | jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE, lightrec_offset(target_cycle)); |
cb72ea13 | 1088 | jit_subr(JIT_R1, JIT_R2, LIGHTREC_REG_CYCLE); |
8afce295 | 1089 | jit_stxi_i(lightrec_offset(current_cycle), LIGHTREC_REG_STATE, JIT_R1); |
cb72ea13 PC |
1090 | } |
1091 | ||
1092 | static void update_cycle_counter_after_c(jit_state_t *_jit) | |
1093 | { | |
1094 | /* Recalc the delta */ | |
8afce295 PC |
1095 | jit_ldxi_i(JIT_R1, LIGHTREC_REG_STATE, lightrec_offset(current_cycle)); |
1096 | jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE, lightrec_offset(target_cycle)); | |
cb72ea13 PC |
1097 | jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, JIT_R1); |
1098 | } | |
1099 | ||
0e720fb1 PC |
1100 | static void sync_next_pc(jit_state_t *_jit) |
1101 | { | |
1102 | if (lightrec_store_next_pc()) { | |
684432ad | 1103 | jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, |
8afce295 | 1104 | lightrec_offset(next_pc)); |
0e720fb1 PC |
1105 | } |
1106 | } | |
1107 | ||
d16005f8 PC |
1108 | static struct block * generate_dispatcher(struct lightrec_state *state) |
1109 | { | |
1110 | struct block *block; | |
1111 | jit_state_t *_jit; | |
8afce295 PC |
1112 | jit_node_t *to_end, *loop, *loop2, |
1113 | *addr, *addr2, *addr3, *addr4, *addr5; | |
d16005f8 | 1114 | unsigned int i; |
02487de7 | 1115 | u32 offset; |
d16005f8 PC |
1116 | |
1117 | block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block)); | |
1118 | if (!block) | |
1119 | goto err_no_mem; | |
1120 | ||
1121 | _jit = jit_new_state(); | |
1122 | if (!_jit) | |
1123 | goto err_free_block; | |
1124 | ||
1125 | jit_name("dispatcher"); | |
1126 | jit_note(__FILE__, __LINE__); | |
1127 | ||
1128 | jit_prolog(); | |
1129 | jit_frame(256); | |
1130 | ||
9259d748 PC |
1131 | jit_getarg(LIGHTREC_REG_STATE, jit_arg()); |
1132 | jit_getarg(JIT_V0, jit_arg()); | |
ba3814c1 | 1133 | jit_getarg(JIT_V1, jit_arg()); |
d16005f8 | 1134 | jit_getarg_i(LIGHTREC_REG_CYCLE, jit_arg()); |
d16005f8 PC |
1135 | |
1136 | /* Force all callee-saved registers to be pushed on the stack */ | |
1137 | for (i = 0; i < NUM_REGS; i++) | |
ba3814c1 | 1138 | jit_movr(JIT_V(i + FIRST_REG), JIT_V(i + FIRST_REG)); |
d16005f8 | 1139 | |
d16005f8 PC |
1140 | loop = jit_label(); |
1141 | ||
3107c849 PC |
1142 | if (!arch_has_fast_mask()) |
1143 | jit_movi(JIT_R1, 0x1fffffff); | |
1144 | ||
d16005f8 | 1145 | /* Call the block's code */ |
ba3814c1 | 1146 | jit_jmpr(JIT_V1); |
d16005f8 | 1147 | |
0e720fb1 PC |
1148 | /* The block will jump here, with the number of cycles remaining in |
1149 | * LIGHTREC_REG_CYCLE */ | |
1150 | addr2 = jit_indirect(); | |
1151 | ||
1152 | sync_next_pc(_jit); | |
1153 | ||
8afce295 | 1154 | loop2 = jit_label(); |
98fa08a5 | 1155 | |
d16005f8 PC |
1156 | /* Jump to end if state->target_cycle < state->current_cycle */ |
1157 | to_end = jit_blei(LIGHTREC_REG_CYCLE, 0); | |
1158 | ||
1159 | /* Convert next PC to KUNSEG and avoid mirrors */ | |
878e6cda | 1160 | jit_andi(JIT_V1, JIT_V0, RAM_SIZE - 1); |
02487de7 | 1161 | jit_andi(JIT_R2, JIT_V0, BIOS_SIZE - 1); |
878e6cda | 1162 | jit_andi(JIT_R1, JIT_V0, BIT(28)); |
02487de7 | 1163 | jit_addi(JIT_R2, JIT_R2, RAM_SIZE); |
ba3814c1 | 1164 | jit_movnr(JIT_V1, JIT_R2, JIT_R1); |
02487de7 PC |
1165 | |
1166 | /* If possible, use the code LUT */ | |
1167 | if (!lut_is_32bit(state)) | |
ba3814c1 | 1168 | jit_lshi(JIT_V1, JIT_V1, 1); |
cb72ea13 | 1169 | jit_add_state(JIT_V1, JIT_V1); |
02487de7 | 1170 | |
8afce295 | 1171 | offset = lightrec_offset(code_lut); |
02487de7 | 1172 | if (lut_is_32bit(state)) |
ba3814c1 | 1173 | jit_ldxi_ui(JIT_V1, JIT_V1, offset); |
02487de7 | 1174 | else |
ba3814c1 | 1175 | jit_ldxi(JIT_V1, JIT_V1, offset); |
d16005f8 | 1176 | |
8afce295 PC |
1177 | /* Store back the current PC to the lightrec_state structure */ |
1178 | jit_stxi_i(lightrec_offset(curr_pc), LIGHTREC_REG_STATE, JIT_V0); | |
1179 | ||
d16005f8 | 1180 | /* If we get non-NULL, loop */ |
ba3814c1 PC |
1181 | jit_patch_at(jit_bnei(JIT_V1, 0), loop); |
1182 | ||
1183 | /* The code LUT will be set to this address when the block at the target | |
1184 | * PC has been preprocessed but not yet compiled by the threaded | |
1185 | * recompiler */ | |
1186 | addr = jit_indirect(); | |
d16005f8 PC |
1187 | |
1188 | /* Slow path: call C function get_next_block_func() */ | |
d16005f8 | 1189 | |
98fa08a5 | 1190 | if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) { |
d16005f8 | 1191 | /* We may call the interpreter - update state->current_cycle */ |
cb72ea13 | 1192 | update_cycle_counter_before_c(_jit); |
d16005f8 PC |
1193 | } |
1194 | ||
d16005f8 PC |
1195 | jit_prepare(); |
1196 | jit_pushargr(LIGHTREC_REG_STATE); | |
1197 | jit_pushargr(JIT_V0); | |
ba3814c1 PC |
1198 | |
1199 | /* Save the cycles register if needed */ | |
1200 | if (!(ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES)) | |
1201 | jit_movr(JIT_V0, LIGHTREC_REG_CYCLE); | |
1202 | ||
1203 | /* Get the next block */ | |
d16005f8 | 1204 | jit_finishi(&get_next_block_func); |
ba3814c1 | 1205 | jit_retval(JIT_V1); |
d16005f8 | 1206 | |
98fa08a5 | 1207 | if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) { |
d16005f8 PC |
1208 | /* The interpreter may have updated state->current_cycle and |
1209 | * state->target_cycle - recalc the delta */ | |
cb72ea13 | 1210 | update_cycle_counter_after_c(_jit); |
ba3814c1 PC |
1211 | } else { |
1212 | jit_movr(LIGHTREC_REG_CYCLE, JIT_V0); | |
d16005f8 PC |
1213 | } |
1214 | ||
9259d748 | 1215 | /* Reset JIT_V0 to the next PC */ |
8afce295 | 1216 | jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, lightrec_offset(curr_pc)); |
9259d748 | 1217 | |
d16005f8 | 1218 | /* If we get non-NULL, loop */ |
ba3814c1 | 1219 | jit_patch_at(jit_bnei(JIT_V1, 0), loop); |
d16005f8 | 1220 | |
d16005f8 PC |
1221 | /* When exiting, the recompiled code will jump to that address */ |
1222 | jit_note(__FILE__, __LINE__); | |
1223 | jit_patch(to_end); | |
1224 | ||
8afce295 PC |
1225 | /* Store back the current PC to the lightrec_state structure */ |
1226 | jit_stxi_i(lightrec_offset(curr_pc), LIGHTREC_REG_STATE, JIT_V0); | |
1227 | ||
d16005f8 | 1228 | jit_retr(LIGHTREC_REG_CYCLE); |
8afce295 PC |
1229 | |
1230 | if (OPT_REPLACE_MEMSET) { | |
1231 | /* Blocks will jump here when they need to call | |
1232 | * lightrec_memset() */ | |
1233 | addr3 = jit_indirect(); | |
1234 | ||
1235 | jit_movr(JIT_V1, LIGHTREC_REG_CYCLE); | |
1236 | ||
1237 | jit_prepare(); | |
1238 | jit_pushargr(LIGHTREC_REG_STATE); | |
1239 | ||
1240 | jit_finishi(lightrec_memset); | |
1241 | jit_retval(LIGHTREC_REG_CYCLE); | |
1242 | ||
1243 | jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, lightrec_offset(regs.gpr[31])); | |
1244 | ||
1245 | jit_subr(LIGHTREC_REG_CYCLE, JIT_V1, LIGHTREC_REG_CYCLE); | |
1246 | ||
1247 | jit_patch_at(jit_b(), loop2); | |
1248 | } | |
1249 | ||
1250 | if (OPT_DETECT_IMPOSSIBLE_BRANCHES) { | |
1251 | /* Blocks will jump here when they reach a branch that should | |
1252 | * be executed with the interpreter, passing the branch's PC | |
1253 | * in JIT_V0 and the address of the block in JIT_V1. */ | |
1254 | addr4 = jit_indirect(); | |
1255 | ||
1256 | sync_next_pc(_jit); | |
1257 | update_cycle_counter_before_c(_jit); | |
1258 | ||
1259 | jit_prepare(); | |
1260 | jit_pushargr(LIGHTREC_REG_STATE); | |
1261 | jit_pushargr(JIT_V1); | |
1262 | jit_pushargr(JIT_V0); | |
1263 | jit_finishi(lightrec_emulate_block); | |
1264 | ||
1265 | jit_retval(JIT_V0); | |
1266 | ||
1267 | update_cycle_counter_after_c(_jit); | |
1268 | ||
1269 | jit_patch_at(jit_b(), loop2); | |
1270 | ||
1271 | } | |
1272 | ||
1273 | if (OPT_HANDLE_LOAD_DELAYS) { | |
1274 | /* Blocks will jump here when they reach a branch with a load | |
1275 | * opcode in its delay slot. The delay slot has already been | |
1276 | * executed; the load value is in (state->temp_reg), and the | |
1277 | * register number is in JIT_V1. | |
1278 | * Jump to a C function which will evaluate the branch target's | |
1279 | * first opcode, to make sure that it does not read the register | |
1280 | * in question; and if it does, handle it accordingly. */ | |
1281 | addr5 = jit_indirect(); | |
1282 | ||
1283 | sync_next_pc(_jit); | |
1284 | update_cycle_counter_before_c(_jit); | |
1285 | ||
1286 | jit_prepare(); | |
1287 | jit_pushargr(LIGHTREC_REG_STATE); | |
1288 | jit_pushargr(JIT_V0); | |
1289 | jit_pushargr(JIT_V1); | |
1290 | jit_finishi(lightrec_check_load_delay); | |
1291 | ||
1292 | jit_retval(JIT_V0); | |
1293 | ||
1294 | update_cycle_counter_after_c(_jit); | |
1295 | ||
1296 | jit_patch_at(jit_b(), loop2); | |
1297 | } | |
1298 | ||
d16005f8 PC |
1299 | jit_epilog(); |
1300 | ||
d16005f8 | 1301 | block->_jit = _jit; |
d16005f8 | 1302 | block->opcode_list = NULL; |
ba3814c1 | 1303 | block->flags = BLOCK_NO_OPCODE_LIST; |
d16005f8 PC |
1304 | block->nb_ops = 0; |
1305 | ||
d8b04acd | 1306 | block->function = lightrec_emit_code(state, block, _jit, |
02487de7 PC |
1307 | &block->code_size); |
1308 | if (!block->function) | |
878e6cda | 1309 | goto err_free_jit; |
d16005f8 PC |
1310 | |
1311 | state->eob_wrapper_func = jit_address(addr2); | |
cb72ea13 PC |
1312 | if (OPT_DETECT_IMPOSSIBLE_BRANCHES) |
1313 | state->interpreter_func = jit_address(addr4); | |
1314 | if (OPT_HANDLE_LOAD_DELAYS) | |
1315 | state->ds_check_func = jit_address(addr5); | |
98fa08a5 PC |
1316 | if (OPT_REPLACE_MEMSET) |
1317 | state->memset_func = jit_address(addr3); | |
d16005f8 PC |
1318 | state->get_next_block = jit_address(addr); |
1319 | ||
1320 | if (ENABLE_DISASSEMBLER) { | |
1321 | pr_debug("Dispatcher block:\n"); | |
1322 | jit_disassemble(); | |
1323 | } | |
1324 | ||
1325 | /* We're done! */ | |
1326 | jit_clear_state(); | |
1327 | return block; | |
1328 | ||
878e6cda PC |
1329 | err_free_jit: |
1330 | jit_destroy_state(); | |
d16005f8 PC |
1331 | err_free_block: |
1332 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); | |
1333 | err_no_mem: | |
1334 | pr_err("Unable to compile dispatcher: Out of memory\n"); | |
1335 | return NULL; | |
1336 | } | |
1337 | ||
1338 | union code lightrec_read_opcode(struct lightrec_state *state, u32 pc) | |
1339 | { | |
fd58fa32 | 1340 | void *host = NULL; |
d16005f8 | 1341 | |
98fa08a5 | 1342 | lightrec_get_map(state, &host, kunseg(pc)); |
d16005f8 | 1343 | |
98fa08a5 | 1344 | const u32 *code = (u32 *)host; |
02487de7 | 1345 | return (union code) LE32TOH(*code); |
98fa08a5 | 1346 | } |
d16005f8 | 1347 | |
684432ad PC |
1348 | unsigned int lightrec_cycles_of_opcode(const struct lightrec_state *state, |
1349 | union code code) | |
98fa08a5 | 1350 | { |
684432ad | 1351 | return state->cycles_per_op; |
98fa08a5 | 1352 | } |
d16005f8 | 1353 | |
ba3814c1 | 1354 | void lightrec_free_opcode_list(struct lightrec_state *state, struct opcode *ops) |
98fa08a5 | 1355 | { |
ba3814c1 PC |
1356 | struct opcode_list *list = container_of(ops, struct opcode_list, ops); |
1357 | ||
98fa08a5 | 1358 | lightrec_free(state, MEM_FOR_IR, |
ba3814c1 PC |
1359 | sizeof(*list) + list->nb_ops * sizeof(struct opcode), |
1360 | list); | |
98fa08a5 PC |
1361 | } |
1362 | ||
1363 | static unsigned int lightrec_get_mips_block_len(const u32 *src) | |
1364 | { | |
1365 | unsigned int i; | |
1366 | union code c; | |
1367 | ||
1368 | for (i = 1; ; i++) { | |
1369 | c.opcode = LE32TOH(*src++); | |
1370 | ||
1371 | if (is_syscall(c)) | |
1372 | return i; | |
1373 | ||
1374 | if (is_unconditional_jump(c)) | |
1375 | return i + 1; | |
1376 | } | |
1377 | } | |
1378 | ||
1379 | static struct opcode * lightrec_disassemble(struct lightrec_state *state, | |
1380 | const u32 *src, unsigned int *len) | |
1381 | { | |
ba3814c1 | 1382 | struct opcode_list *list; |
98fa08a5 PC |
1383 | unsigned int i, length; |
1384 | ||
1385 | length = lightrec_get_mips_block_len(src); | |
1386 | ||
ba3814c1 PC |
1387 | list = lightrec_malloc(state, MEM_FOR_IR, |
1388 | sizeof(*list) + sizeof(struct opcode) * length); | |
98fa08a5 PC |
1389 | if (!list) { |
1390 | pr_err("Unable to allocate memory\n"); | |
1391 | return NULL; | |
1392 | } | |
1393 | ||
ba3814c1 PC |
1394 | list->nb_ops = (u16) length; |
1395 | ||
98fa08a5 | 1396 | for (i = 0; i < length; i++) { |
ba3814c1 PC |
1397 | list->ops[i].opcode = LE32TOH(src[i]); |
1398 | list->ops[i].flags = 0; | |
98fa08a5 PC |
1399 | } |
1400 | ||
1401 | *len = length * sizeof(u32); | |
1402 | ||
ba3814c1 | 1403 | return list->ops; |
d16005f8 PC |
1404 | } |
1405 | ||
1406 | static struct block * lightrec_precompile_block(struct lightrec_state *state, | |
1407 | u32 pc) | |
1408 | { | |
1409 | struct opcode *list; | |
1410 | struct block *block; | |
ba3814c1 | 1411 | void *host, *addr; |
98fa08a5 PC |
1412 | const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg(pc)); |
1413 | const u32 *code = (u32 *) host; | |
d16005f8 | 1414 | unsigned int length; |
98fa08a5 | 1415 | bool fully_tagged; |
ba3814c1 | 1416 | u8 block_flags = 0; |
d16005f8 PC |
1417 | |
1418 | if (!map) | |
1419 | return NULL; | |
1420 | ||
d16005f8 PC |
1421 | block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block)); |
1422 | if (!block) { | |
1423 | pr_err("Unable to recompile block: Out of memory\n"); | |
1424 | return NULL; | |
1425 | } | |
1426 | ||
1427 | list = lightrec_disassemble(state, code, &length); | |
1428 | if (!list) { | |
1429 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); | |
1430 | return NULL; | |
1431 | } | |
1432 | ||
1433 | block->pc = pc; | |
d16005f8 PC |
1434 | block->_jit = NULL; |
1435 | block->function = NULL; | |
1436 | block->opcode_list = list; | |
98fa08a5 | 1437 | block->code = code; |
d16005f8 PC |
1438 | block->next = NULL; |
1439 | block->flags = 0; | |
1440 | block->code_size = 0; | |
d8b04acd | 1441 | block->precompile_date = state->current_cycle; |
d16005f8 PC |
1442 | block->nb_ops = length / sizeof(u32); |
1443 | ||
98fa08a5 | 1444 | lightrec_optimize(state, block); |
d16005f8 PC |
1445 | |
1446 | length = block->nb_ops * sizeof(u32); | |
1447 | ||
1448 | lightrec_register(MEM_FOR_MIPS_CODE, length); | |
1449 | ||
1450 | if (ENABLE_DISASSEMBLER) { | |
8afce295 | 1451 | pr_debug("Disassembled block at "PC_FMT"\n", block->pc); |
98fa08a5 | 1452 | lightrec_print_disassembly(block, code); |
d16005f8 PC |
1453 | } |
1454 | ||
98fa08a5 | 1455 | pr_debug("Block size: %hu opcodes\n", block->nb_ops); |
d16005f8 | 1456 | |
98fa08a5 PC |
1457 | fully_tagged = lightrec_block_is_fully_tagged(block); |
1458 | if (fully_tagged) | |
ba3814c1 | 1459 | block_flags |= BLOCK_FULLY_TAGGED; |
98fa08a5 | 1460 | |
ba3814c1 PC |
1461 | if (block_flags) |
1462 | block_set_flags(block, block_flags); | |
98fa08a5 | 1463 | |
d16005f8 PC |
1464 | block->hash = lightrec_calculate_block_hash(block); |
1465 | ||
ba3814c1 PC |
1466 | if (OPT_REPLACE_MEMSET && block_has_flag(block, BLOCK_IS_MEMSET)) |
1467 | addr = state->memset_func; | |
1468 | else | |
1469 | addr = state->get_next_block; | |
1470 | lut_write(state, lut_offset(pc), addr); | |
1471 | ||
cb72ea13 | 1472 | pr_debug("Blocks created: %u\n", ++state->nb_precompile); |
a59e5536 | 1473 | |
d16005f8 PC |
1474 | return block; |
1475 | } | |
1476 | ||
98fa08a5 | 1477 | static bool lightrec_block_is_fully_tagged(const struct block *block) |
d16005f8 | 1478 | { |
98fa08a5 PC |
1479 | const struct opcode *op; |
1480 | unsigned int i; | |
1481 | ||
1482 | for (i = 0; i < block->nb_ops; i++) { | |
1483 | op = &block->opcode_list[i]; | |
d16005f8 | 1484 | |
cb72ea13 PC |
1485 | /* If we have one branch that must be emulated, we cannot trash |
1486 | * the opcode list. */ | |
1487 | if (should_emulate(op)) | |
1488 | return false; | |
1489 | ||
1490 | /* Check all loads/stores of the opcode list and mark the | |
d16005f8 PC |
1491 | * block as fully compiled if they all have been tagged. */ |
1492 | switch (op->c.i.op) { | |
1493 | case OP_LB: | |
1494 | case OP_LH: | |
1495 | case OP_LWL: | |
1496 | case OP_LW: | |
1497 | case OP_LBU: | |
1498 | case OP_LHU: | |
1499 | case OP_LWR: | |
1500 | case OP_SB: | |
1501 | case OP_SH: | |
1502 | case OP_SWL: | |
1503 | case OP_SW: | |
1504 | case OP_SWR: | |
1505 | case OP_LWC2: | |
1506 | case OP_SWC2: | |
5459088b PC |
1507 | case OP_META_LWU: |
1508 | case OP_META_SWU: | |
22eee2ac | 1509 | if (!LIGHTREC_FLAGS_GET_IO_MODE(op->flags)) |
d16005f8 | 1510 | return false; |
d8b04acd PC |
1511 | fallthrough; |
1512 | default: | |
d16005f8 PC |
1513 | continue; |
1514 | } | |
1515 | } | |
1516 | ||
1517 | return true; | |
1518 | } | |
1519 | ||
98fa08a5 | 1520 | static void lightrec_reap_block(struct lightrec_state *state, void *data) |
a59e5536 | 1521 | { |
1522 | struct block *block = data; | |
1523 | ||
f5ee77ca | 1524 | pr_debug("Reap dead block at "PC_FMT"\n", block->pc); |
98fa08a5 PC |
1525 | lightrec_unregister_block(state->block_cache, block); |
1526 | lightrec_free_block(state, block); | |
a59e5536 | 1527 | } |
1528 | ||
98fa08a5 | 1529 | static void lightrec_reap_jit(struct lightrec_state *state, void *data) |
a59e5536 | 1530 | { |
1531 | _jit_destroy_state(data); | |
1532 | } | |
1533 | ||
02487de7 PC |
1534 | static void lightrec_free_function(struct lightrec_state *state, void *fn) |
1535 | { | |
1536 | if (ENABLE_CODE_BUFFER && state->tlsf) { | |
1537 | pr_debug("Freeing code block at 0x%" PRIxPTR "\n", (uintptr_t) fn); | |
d8b04acd | 1538 | lightrec_free_code(state, fn); |
02487de7 PC |
1539 | } |
1540 | } | |
1541 | ||
1542 | static void lightrec_reap_function(struct lightrec_state *state, void *data) | |
1543 | { | |
1544 | lightrec_free_function(state, data); | |
1545 | } | |
1546 | ||
ba3814c1 PC |
1547 | static void lightrec_reap_opcode_list(struct lightrec_state *state, void *data) |
1548 | { | |
1549 | lightrec_free_opcode_list(state, data); | |
1550 | } | |
1551 | ||
98fa08a5 PC |
1552 | int lightrec_compile_block(struct lightrec_cstate *cstate, |
1553 | struct block *block) | |
d16005f8 | 1554 | { |
a5a6f7b8 | 1555 | struct block *dead_blocks[ARRAY_SIZE(cstate->targets)]; |
564156dc | 1556 | u32 was_dead[ARRAY_SIZE(cstate->targets) / 8]; |
98fa08a5 | 1557 | struct lightrec_state *state = cstate->state; |
a59e5536 | 1558 | struct lightrec_branch_target *target; |
ba3814c1 | 1559 | bool fully_tagged = false; |
a59e5536 | 1560 | struct block *block2; |
d16005f8 | 1561 | struct opcode *elm; |
a59e5536 | 1562 | jit_state_t *_jit, *oldjit; |
d16005f8 PC |
1563 | jit_node_t *start_of_block; |
1564 | bool skip_next = false; | |
d8b04acd | 1565 | void *old_fn, *new_fn; |
ba3814c1 | 1566 | size_t old_code_size; |
d16005f8 | 1567 | unsigned int i, j; |
ba3814c1 | 1568 | u8 old_flags; |
98fa08a5 | 1569 | u32 offset; |
d16005f8 PC |
1570 | |
1571 | fully_tagged = lightrec_block_is_fully_tagged(block); | |
1572 | if (fully_tagged) | |
ba3814c1 | 1573 | block_set_flags(block, BLOCK_FULLY_TAGGED); |
d16005f8 PC |
1574 | |
1575 | _jit = jit_new_state(); | |
1576 | if (!_jit) | |
1577 | return -ENOMEM; | |
1578 | ||
a59e5536 | 1579 | oldjit = block->_jit; |
02487de7 | 1580 | old_fn = block->function; |
ba3814c1 | 1581 | old_code_size = block->code_size; |
d16005f8 PC |
1582 | block->_jit = _jit; |
1583 | ||
98fa08a5 | 1584 | lightrec_regcache_reset(cstate->reg_cache); |
684432ad PC |
1585 | |
1586 | if (OPT_PRELOAD_PC && (block->flags & BLOCK_PRELOAD_PC)) | |
1587 | lightrec_preload_pc(cstate->reg_cache, _jit); | |
9259d748 | 1588 | |
3107c849 PC |
1589 | if (!arch_has_fast_mask()) |
1590 | lightrec_preload_imm(cstate->reg_cache, _jit, JIT_R1, 0x1fffffff); | |
1591 | ||
98fa08a5 | 1592 | cstate->cycles = 0; |
98fa08a5 PC |
1593 | cstate->nb_local_branches = 0; |
1594 | cstate->nb_targets = 0; | |
cb72ea13 | 1595 | cstate->no_load_delay = false; |
d16005f8 PC |
1596 | |
1597 | jit_prolog(); | |
1598 | jit_tramp(256); | |
1599 | ||
1600 | start_of_block = jit_label(); | |
1601 | ||
98fa08a5 PC |
1602 | for (i = 0; i < block->nb_ops; i++) { |
1603 | elm = &block->opcode_list[i]; | |
d16005f8 PC |
1604 | |
1605 | if (skip_next) { | |
1606 | skip_next = false; | |
1607 | continue; | |
1608 | } | |
1609 | ||
98fa08a5 | 1610 | if (should_emulate(elm)) { |
d16005f8 | 1611 | pr_debug("Branch at offset 0x%x will be emulated\n", |
98fa08a5 PC |
1612 | i << 2); |
1613 | ||
cb72ea13 | 1614 | lightrec_emit_jump_to_interpreter(cstate, block, i); |
03535202 | 1615 | skip_next = !op_flag_no_ds(elm->flags); |
98fa08a5 PC |
1616 | } else { |
1617 | lightrec_rec_opcode(cstate, block, i); | |
03535202 | 1618 | skip_next = !op_flag_no_ds(elm->flags) && has_delay_slot(elm->c); |
d16005f8 PC |
1619 | #if _WIN32 |
1620 | /* FIXME: GNU Lightning on Windows seems to use our | |
1621 | * mapped registers as temporaries. Until the actual bug | |
1622 | * is found and fixed, unconditionally mark our | |
1623 | * registers as live here. */ | |
98fa08a5 | 1624 | lightrec_regcache_mark_live(cstate->reg_cache, _jit); |
d16005f8 PC |
1625 | #endif |
1626 | } | |
03535202 | 1627 | |
684432ad | 1628 | cstate->cycles += lightrec_cycles_of_opcode(state, elm->c); |
d16005f8 PC |
1629 | } |
1630 | ||
98fa08a5 PC |
1631 | for (i = 0; i < cstate->nb_local_branches; i++) { |
1632 | struct lightrec_branch *branch = &cstate->local_branches[i]; | |
d16005f8 | 1633 | |
5eecf06d | 1634 | pr_debug("Patch local branch to offset 0x%"PRIx32"\n", |
d16005f8 PC |
1635 | branch->target << 2); |
1636 | ||
1637 | if (branch->target == 0) { | |
1638 | jit_patch_at(branch->branch, start_of_block); | |
1639 | continue; | |
1640 | } | |
1641 | ||
98fa08a5 PC |
1642 | for (j = 0; j < cstate->nb_targets; j++) { |
1643 | if (cstate->targets[j].offset == branch->target) { | |
d16005f8 | 1644 | jit_patch_at(branch->branch, |
98fa08a5 | 1645 | cstate->targets[j].label); |
d16005f8 PC |
1646 | break; |
1647 | } | |
1648 | } | |
1649 | ||
98fa08a5 | 1650 | if (j == cstate->nb_targets) |
d16005f8 PC |
1651 | pr_err("Unable to find branch target\n"); |
1652 | } | |
1653 | ||
d16005f8 PC |
1654 | jit_ret(); |
1655 | jit_epilog(); | |
1656 | ||
d8b04acd PC |
1657 | new_fn = lightrec_emit_code(state, block, _jit, &block->code_size); |
1658 | if (!new_fn) { | |
1659 | if (!ENABLE_THREADED_COMPILER) | |
1660 | pr_err("Unable to compile block!\n"); | |
1661 | block->_jit = oldjit; | |
ba3814c1 | 1662 | jit_clear_state(); |
d8b04acd PC |
1663 | _jit_destroy_state(_jit); |
1664 | return -ENOMEM; | |
02487de7 PC |
1665 | } |
1666 | ||
ba3814c1 PC |
1667 | /* Pause the reaper, because lightrec_reset_lut_offset() may try to set |
1668 | * the old block->function pointer to the code LUT. */ | |
1669 | if (ENABLE_THREADED_COMPILER) | |
1670 | lightrec_reaper_pause(state->reaper); | |
1671 | ||
d8b04acd | 1672 | block->function = new_fn; |
ba3814c1 | 1673 | block_clear_flags(block, BLOCK_SHOULD_RECOMPILE); |
d16005f8 PC |
1674 | |
1675 | /* Add compiled function to the LUT */ | |
02487de7 | 1676 | lut_write(state, lut_offset(block->pc), block->function); |
d16005f8 | 1677 | |
a59e5536 | 1678 | /* Detect old blocks that have been covered by the new one */ |
564156dc | 1679 | for (i = 0; ENABLE_THREADED_COMPILER && i < cstate->nb_targets; i++) { |
98fa08a5 | 1680 | target = &cstate->targets[i]; |
a59e5536 | 1681 | |
1682 | if (!target->offset) | |
1683 | continue; | |
1684 | ||
1685 | offset = block->pc + target->offset * sizeof(u32); | |
ba3814c1 | 1686 | |
a59e5536 | 1687 | block2 = lightrec_find_block(state->block_cache, offset); |
1688 | if (block2) { | |
1689 | /* No need to check if block2 is compilable - it must | |
1690 | * be, otherwise block wouldn't be compilable either */ | |
1691 | ||
98fa08a5 PC |
1692 | /* Set the "block dead" flag to prevent the dynarec from |
1693 | * recompiling this block */ | |
ba3814c1 | 1694 | old_flags = block_set_flags(block2, BLOCK_IS_DEAD); |
564156dc PC |
1695 | |
1696 | if (old_flags & BLOCK_IS_DEAD) | |
1697 | was_dead[i / 32] |= BIT(i % 32); | |
1698 | else | |
1699 | was_dead[i / 32] &= ~BIT(i % 32); | |
ba3814c1 PC |
1700 | } |
1701 | ||
a5a6f7b8 PC |
1702 | dead_blocks[i] = block2; |
1703 | ||
564156dc PC |
1704 | /* If block2 was pending for compilation, cancel it. |
1705 | * If it's being compiled right now, wait until it finishes. */ | |
1706 | if (block2) | |
1707 | lightrec_recompiler_remove(state->rec, block2); | |
1708 | } | |
a59e5536 | 1709 | |
564156dc PC |
1710 | for (i = 0; i < cstate->nb_targets; i++) { |
1711 | target = &cstate->targets[i]; | |
1712 | ||
1713 | if (!target->offset) | |
1714 | continue; | |
98fa08a5 | 1715 | |
fd58fa32 PC |
1716 | /* We know from now on that block2 (if present) isn't going to |
1717 | * be compiled. We can override the LUT entry with our new | |
1718 | * block's entry point. */ | |
1719 | offset = lut_offset(block->pc) + target->offset; | |
02487de7 | 1720 | lut_write(state, offset, jit_address(target->label)); |
98fa08a5 | 1721 | |
a5a6f7b8 PC |
1722 | if (ENABLE_THREADED_COMPILER) { |
1723 | block2 = dead_blocks[i]; | |
1724 | } else { | |
1725 | offset = block->pc + target->offset * sizeof(u32); | |
1726 | block2 = lightrec_find_block(state->block_cache, offset); | |
1727 | } | |
fd58fa32 | 1728 | if (block2) { |
8afce295 PC |
1729 | pr_debug("Reap block "X32_FMT" as it's covered by block " |
1730 | X32_FMT"\n", block2->pc, block->pc); | |
a59e5536 | 1731 | |
98fa08a5 | 1732 | /* Finally, reap the block. */ |
ba3814c1 PC |
1733 | if (!ENABLE_THREADED_COMPILER) { |
1734 | lightrec_unregister_block(state->block_cache, block2); | |
1735 | lightrec_free_block(state, block2); | |
564156dc | 1736 | } else if (!(was_dead[i / 32] & BIT(i % 32))) { |
a59e5536 | 1737 | lightrec_reaper_add(state->reaper, |
1738 | lightrec_reap_block, | |
1739 | block2); | |
a59e5536 | 1740 | } |
1741 | } | |
1742 | } | |
1743 | ||
564156dc PC |
1744 | if (ENABLE_THREADED_COMPILER) |
1745 | lightrec_reaper_continue(state->reaper); | |
1746 | ||
d16005f8 | 1747 | if (ENABLE_DISASSEMBLER) { |
8afce295 | 1748 | pr_debug("Compiling block at "PC_FMT"\n", block->pc); |
d16005f8 PC |
1749 | jit_disassemble(); |
1750 | } | |
1751 | ||
1752 | jit_clear_state(); | |
1753 | ||
d16005f8 | 1754 | if (fully_tagged) |
ba3814c1 PC |
1755 | old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST); |
1756 | ||
1757 | if (fully_tagged && !(old_flags & BLOCK_NO_OPCODE_LIST)) { | |
f5ee77ca | 1758 | pr_debug("Block "PC_FMT" is fully tagged" |
d16005f8 | 1759 | " - free opcode list\n", block->pc); |
ba3814c1 PC |
1760 | |
1761 | if (ENABLE_THREADED_COMPILER) { | |
1762 | lightrec_reaper_add(state->reaper, | |
1763 | lightrec_reap_opcode_list, | |
1764 | block->opcode_list); | |
1765 | } else { | |
1766 | lightrec_free_opcode_list(state, block->opcode_list); | |
1767 | } | |
d16005f8 PC |
1768 | } |
1769 | ||
a59e5536 | 1770 | if (oldjit) { |
8afce295 | 1771 | pr_debug("Block "X32_FMT" recompiled, reaping old jit context.\n", |
a59e5536 | 1772 | block->pc); |
1773 | ||
02487de7 | 1774 | if (ENABLE_THREADED_COMPILER) { |
a59e5536 | 1775 | lightrec_reaper_add(state->reaper, |
1776 | lightrec_reap_jit, oldjit); | |
02487de7 PC |
1777 | lightrec_reaper_add(state->reaper, |
1778 | lightrec_reap_function, old_fn); | |
1779 | } else { | |
a59e5536 | 1780 | _jit_destroy_state(oldjit); |
02487de7 PC |
1781 | lightrec_free_function(state, old_fn); |
1782 | } | |
ba3814c1 PC |
1783 | |
1784 | lightrec_unregister(MEM_FOR_CODE, old_code_size); | |
a59e5536 | 1785 | } |
1786 | ||
cb72ea13 PC |
1787 | pr_debug("Blocks compiled: %u\n", ++state->nb_compile); |
1788 | ||
d16005f8 PC |
1789 | return 0; |
1790 | } | |
1791 | ||
98fa08a5 PC |
1792 | static void lightrec_print_info(struct lightrec_state *state) |
1793 | { | |
1794 | if ((state->current_cycle & ~0xfffffff) != state->old_cycle_counter) { | |
1795 | pr_info("Lightrec RAM usage: IR %u KiB, CODE %u KiB, " | |
1796 | "MIPS %u KiB, TOTAL %u KiB, avg. IPI %f\n", | |
1797 | lightrec_get_mem_usage(MEM_FOR_IR) / 1024, | |
1798 | lightrec_get_mem_usage(MEM_FOR_CODE) / 1024, | |
1799 | lightrec_get_mem_usage(MEM_FOR_MIPS_CODE) / 1024, | |
1800 | lightrec_get_total_mem_usage() / 1024, | |
1801 | lightrec_get_average_ipi()); | |
1802 | state->old_cycle_counter = state->current_cycle & ~0xfffffff; | |
1803 | } | |
1804 | } | |
1805 | ||
d16005f8 PC |
1806 | u32 lightrec_execute(struct lightrec_state *state, u32 pc, u32 target_cycle) |
1807 | { | |
9259d748 | 1808 | s32 (*func)(struct lightrec_state *, u32, void *, s32) = (void *)state->dispatcher->function; |
d16005f8 PC |
1809 | void *block_trace; |
1810 | s32 cycles_delta; | |
1811 | ||
1812 | state->exit_flags = LIGHTREC_EXIT_NORMAL; | |
1813 | ||
1814 | /* Handle the cycle counter overflowing */ | |
1815 | if (unlikely(target_cycle < state->current_cycle)) | |
1816 | target_cycle = UINT_MAX; | |
1817 | ||
1818 | state->target_cycle = target_cycle; | |
0e720fb1 | 1819 | state->curr_pc = pc; |
d16005f8 PC |
1820 | |
1821 | block_trace = get_next_block_func(state, pc); | |
1822 | if (block_trace) { | |
1823 | cycles_delta = state->target_cycle - state->current_cycle; | |
1824 | ||
0e720fb1 | 1825 | cycles_delta = (*func)(state, state->curr_pc, |
9259d748 | 1826 | block_trace, cycles_delta); |
d16005f8 PC |
1827 | |
1828 | state->current_cycle = state->target_cycle - cycles_delta; | |
1829 | } | |
1830 | ||
a59e5536 | 1831 | if (ENABLE_THREADED_COMPILER) |
1832 | lightrec_reaper_reap(state->reaper); | |
1833 | ||
98fa08a5 PC |
1834 | if (LOG_LEVEL >= INFO_L) |
1835 | lightrec_print_info(state); | |
1836 | ||
0e720fb1 | 1837 | return state->curr_pc; |
d16005f8 PC |
1838 | } |
1839 | ||
ba3814c1 PC |
1840 | u32 lightrec_run_interpreter(struct lightrec_state *state, u32 pc, |
1841 | u32 target_cycle) | |
d16005f8 | 1842 | { |
ba3814c1 | 1843 | struct block *block; |
d16005f8 PC |
1844 | |
1845 | state->exit_flags = LIGHTREC_EXIT_NORMAL; | |
ba3814c1 PC |
1846 | state->target_cycle = target_cycle; |
1847 | ||
1848 | do { | |
1849 | block = lightrec_get_block(state, pc); | |
1850 | if (!block) | |
1851 | break; | |
1852 | ||
1853 | pc = lightrec_emulate_block(state, block, pc); | |
d16005f8 | 1854 | |
ba3814c1 PC |
1855 | if (ENABLE_THREADED_COMPILER) |
1856 | lightrec_reaper_reap(state->reaper); | |
1857 | } while (state->current_cycle < state->target_cycle); | |
98fa08a5 PC |
1858 | |
1859 | if (LOG_LEVEL >= INFO_L) | |
1860 | lightrec_print_info(state); | |
1861 | ||
1862 | return pc; | |
d16005f8 PC |
1863 | } |
1864 | ||
98fa08a5 | 1865 | void lightrec_free_block(struct lightrec_state *state, struct block *block) |
d16005f8 | 1866 | { |
ba3814c1 PC |
1867 | u8 old_flags; |
1868 | ||
d16005f8 | 1869 | lightrec_unregister(MEM_FOR_MIPS_CODE, block->nb_ops * sizeof(u32)); |
ba3814c1 PC |
1870 | old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST); |
1871 | ||
1872 | if (!(old_flags & BLOCK_NO_OPCODE_LIST)) | |
1873 | lightrec_free_opcode_list(state, block->opcode_list); | |
d16005f8 PC |
1874 | if (block->_jit) |
1875 | _jit_destroy_state(block->_jit); | |
d8b04acd PC |
1876 | if (block->function) { |
1877 | lightrec_free_function(state, block->function); | |
1878 | lightrec_unregister(MEM_FOR_CODE, block->code_size); | |
1879 | } | |
98fa08a5 PC |
1880 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); |
1881 | } | |
1882 | ||
1883 | struct lightrec_cstate * lightrec_create_cstate(struct lightrec_state *state) | |
1884 | { | |
1885 | struct lightrec_cstate *cstate; | |
1886 | ||
1887 | cstate = lightrec_malloc(state, MEM_FOR_LIGHTREC, sizeof(*cstate)); | |
1888 | if (!cstate) | |
1889 | return NULL; | |
1890 | ||
1891 | cstate->reg_cache = lightrec_regcache_init(state); | |
1892 | if (!cstate->reg_cache) { | |
1893 | lightrec_free(state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate); | |
1894 | return NULL; | |
1895 | } | |
1896 | ||
1897 | cstate->state = state; | |
1898 | ||
1899 | return cstate; | |
1900 | } | |
1901 | ||
1902 | void lightrec_free_cstate(struct lightrec_cstate *cstate) | |
1903 | { | |
1904 | lightrec_free_regcache(cstate->reg_cache); | |
1905 | lightrec_free(cstate->state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate); | |
d16005f8 PC |
1906 | } |
1907 | ||
1908 | struct lightrec_state * lightrec_init(char *argv0, | |
878e6cda | 1909 | const struct lightrec_mem_map *maps, |
d16005f8 PC |
1910 | size_t nb, |
1911 | const struct lightrec_ops *ops) | |
1912 | { | |
878e6cda PC |
1913 | const struct lightrec_mem_map *codebuf_map = &maps[PSX_MAP_CODE_BUFFER]; |
1914 | const struct lightrec_mem_map *map; | |
d16005f8 | 1915 | struct lightrec_state *state; |
02487de7 PC |
1916 | uintptr_t addr; |
1917 | void *tlsf = NULL; | |
1918 | bool with_32bit_lut = false; | |
1919 | size_t lut_size; | |
d16005f8 PC |
1920 | |
1921 | /* Sanity-check ops */ | |
98fa08a5 | 1922 | if (!ops || !ops->cop2_op || !ops->enable_ram) { |
d16005f8 PC |
1923 | pr_err("Missing callbacks in lightrec_ops structure\n"); |
1924 | return NULL; | |
1925 | } | |
1926 | ||
fdf33147 PC |
1927 | if (ops->cop2_notify) |
1928 | pr_debug("Optional cop2_notify callback in lightrec_ops\n"); | |
1929 | else | |
1930 | pr_debug("No optional cop2_notify callback in lightrec_ops\n"); | |
1931 | ||
d8b04acd PC |
1932 | if (ENABLE_CODE_BUFFER && nb > PSX_MAP_CODE_BUFFER |
1933 | && codebuf_map->address) { | |
02487de7 PC |
1934 | tlsf = tlsf_create_with_pool(codebuf_map->address, |
1935 | codebuf_map->length); | |
1936 | if (!tlsf) { | |
1937 | pr_err("Unable to initialize code buffer\n"); | |
1938 | return NULL; | |
1939 | } | |
1940 | ||
1941 | if (__WORDSIZE == 64) { | |
1942 | addr = (uintptr_t) codebuf_map->address + codebuf_map->length - 1; | |
1943 | with_32bit_lut = addr == (u32) addr; | |
1944 | } | |
1945 | } | |
1946 | ||
1947 | if (with_32bit_lut) | |
1948 | lut_size = CODE_LUT_SIZE * 4; | |
1949 | else | |
1950 | lut_size = CODE_LUT_SIZE * sizeof(void *); | |
1951 | ||
fb67ea33 | 1952 | init_jit_with_debug(argv0, stdout); |
d16005f8 | 1953 | |
02487de7 | 1954 | state = calloc(1, sizeof(*state) + lut_size); |
d16005f8 PC |
1955 | if (!state) |
1956 | goto err_finish_jit; | |
1957 | ||
02487de7 PC |
1958 | lightrec_register(MEM_FOR_LIGHTREC, sizeof(*state) + lut_size); |
1959 | ||
1960 | state->tlsf = tlsf; | |
1961 | state->with_32bit_lut = with_32bit_lut; | |
cb72ea13 | 1962 | state->in_delay_slot_n = 0xff; |
684432ad | 1963 | state->cycles_per_op = 2; |
d16005f8 | 1964 | |
d16005f8 PC |
1965 | state->block_cache = lightrec_blockcache_init(state); |
1966 | if (!state->block_cache) | |
d8b04acd | 1967 | goto err_free_state; |
d16005f8 | 1968 | |
d16005f8 PC |
1969 | if (ENABLE_THREADED_COMPILER) { |
1970 | state->rec = lightrec_recompiler_init(state); | |
1971 | if (!state->rec) | |
98fa08a5 | 1972 | goto err_free_block_cache; |
a59e5536 | 1973 | |
1974 | state->reaper = lightrec_reaper_init(state); | |
1975 | if (!state->reaper) | |
1976 | goto err_free_recompiler; | |
98fa08a5 PC |
1977 | } else { |
1978 | state->cstate = lightrec_create_cstate(state); | |
1979 | if (!state->cstate) | |
1980 | goto err_free_block_cache; | |
d16005f8 PC |
1981 | } |
1982 | ||
1983 | state->nb_maps = nb; | |
878e6cda | 1984 | state->maps = maps; |
d16005f8 PC |
1985 | |
1986 | memcpy(&state->ops, ops, sizeof(*ops)); | |
1987 | ||
1988 | state->dispatcher = generate_dispatcher(state); | |
1989 | if (!state->dispatcher) | |
a59e5536 | 1990 | goto err_free_reaper; |
d16005f8 | 1991 | |
98fa08a5 PC |
1992 | state->c_wrapper_block = generate_wrapper(state); |
1993 | if (!state->c_wrapper_block) | |
d16005f8 PC |
1994 | goto err_free_dispatcher; |
1995 | ||
98fa08a5 PC |
1996 | state->c_wrappers[C_WRAPPER_RW] = lightrec_rw_cb; |
1997 | state->c_wrappers[C_WRAPPER_RW_GENERIC] = lightrec_rw_generic_cb; | |
fdf33147 | 1998 | state->c_wrappers[C_WRAPPER_MFC] = lightrec_mfc_cb; |
98fa08a5 | 1999 | state->c_wrappers[C_WRAPPER_MTC] = lightrec_mtc_cb; |
22eee2ac | 2000 | state->c_wrappers[C_WRAPPER_CP] = lightrec_cp_cb; |
d16005f8 | 2001 | |
878e6cda | 2002 | map = &maps[PSX_MAP_BIOS]; |
d16005f8 PC |
2003 | state->offset_bios = (uintptr_t)map->address - map->pc; |
2004 | ||
878e6cda | 2005 | map = &maps[PSX_MAP_SCRATCH_PAD]; |
d16005f8 PC |
2006 | state->offset_scratch = (uintptr_t)map->address - map->pc; |
2007 | ||
878e6cda | 2008 | map = &maps[PSX_MAP_HW_REGISTERS]; |
ba3814c1 PC |
2009 | state->offset_io = (uintptr_t)map->address - map->pc; |
2010 | ||
878e6cda | 2011 | map = &maps[PSX_MAP_KERNEL_USER_RAM]; |
d16005f8 PC |
2012 | state->offset_ram = (uintptr_t)map->address - map->pc; |
2013 | ||
878e6cda PC |
2014 | if (maps[PSX_MAP_MIRROR1].address == map->address + 0x200000 && |
2015 | maps[PSX_MAP_MIRROR2].address == map->address + 0x400000 && | |
2016 | maps[PSX_MAP_MIRROR3].address == map->address + 0x600000) | |
d16005f8 PC |
2017 | state->mirrors_mapped = true; |
2018 | ||
98fa08a5 PC |
2019 | if (state->offset_bios == 0 && |
2020 | state->offset_scratch == 0 && | |
2021 | state->offset_ram == 0 && | |
ba3814c1 | 2022 | state->offset_io == 0 && |
98fa08a5 PC |
2023 | state->mirrors_mapped) { |
2024 | pr_info("Memory map is perfect. Emitted code will be best.\n"); | |
2025 | } else { | |
2026 | pr_info("Memory map is sub-par. Emitted code will be slow.\n"); | |
2027 | } | |
2028 | ||
02487de7 PC |
2029 | if (state->with_32bit_lut) |
2030 | pr_info("Using 32-bit LUT\n"); | |
2031 | ||
d16005f8 PC |
2032 | return state; |
2033 | ||
d16005f8 | 2034 | err_free_dispatcher: |
98fa08a5 | 2035 | lightrec_free_block(state, state->dispatcher); |
a59e5536 | 2036 | err_free_reaper: |
2037 | if (ENABLE_THREADED_COMPILER) | |
2038 | lightrec_reaper_destroy(state->reaper); | |
d16005f8 PC |
2039 | err_free_recompiler: |
2040 | if (ENABLE_THREADED_COMPILER) | |
2041 | lightrec_free_recompiler(state->rec); | |
98fa08a5 PC |
2042 | else |
2043 | lightrec_free_cstate(state->cstate); | |
d16005f8 PC |
2044 | err_free_block_cache: |
2045 | lightrec_free_block_cache(state->block_cache); | |
d16005f8 | 2046 | err_free_state: |
d16005f8 | 2047 | lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) + |
02487de7 | 2048 | lut_elm_size(state) * CODE_LUT_SIZE); |
d16005f8 PC |
2049 | free(state); |
2050 | err_finish_jit: | |
2051 | finish_jit(); | |
02487de7 PC |
2052 | if (ENABLE_CODE_BUFFER && tlsf) |
2053 | tlsf_destroy(tlsf); | |
d16005f8 PC |
2054 | return NULL; |
2055 | } | |
2056 | ||
2057 | void lightrec_destroy(struct lightrec_state *state) | |
2058 | { | |
98fa08a5 PC |
2059 | /* Force a print info on destroy*/ |
2060 | state->current_cycle = ~state->current_cycle; | |
2061 | lightrec_print_info(state); | |
2062 | ||
03535202 PC |
2063 | lightrec_free_block_cache(state->block_cache); |
2064 | lightrec_free_block(state, state->dispatcher); | |
2065 | lightrec_free_block(state, state->c_wrapper_block); | |
2066 | ||
a59e5536 | 2067 | if (ENABLE_THREADED_COMPILER) { |
d16005f8 | 2068 | lightrec_free_recompiler(state->rec); |
a59e5536 | 2069 | lightrec_reaper_destroy(state->reaper); |
98fa08a5 PC |
2070 | } else { |
2071 | lightrec_free_cstate(state->cstate); | |
a59e5536 | 2072 | } |
d16005f8 | 2073 | |
d16005f8 | 2074 | finish_jit(); |
02487de7 PC |
2075 | if (ENABLE_CODE_BUFFER && state->tlsf) |
2076 | tlsf_destroy(state->tlsf); | |
d16005f8 | 2077 | |
d16005f8 | 2078 | lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) + |
02487de7 | 2079 | lut_elm_size(state) * CODE_LUT_SIZE); |
d16005f8 PC |
2080 | free(state); |
2081 | } | |
2082 | ||
2083 | void lightrec_invalidate(struct lightrec_state *state, u32 addr, u32 len) | |
2084 | { | |
2085 | u32 kaddr = kunseg(addr & ~0x3); | |
d8b04acd | 2086 | enum psx_map idx = lightrec_get_map_idx(state, kaddr); |
d16005f8 | 2087 | |
d8b04acd PC |
2088 | switch (idx) { |
2089 | case PSX_MAP_MIRROR1: | |
2090 | case PSX_MAP_MIRROR2: | |
2091 | case PSX_MAP_MIRROR3: | |
d16005f8 | 2092 | /* Handle mirrors */ |
d8b04acd PC |
2093 | kaddr &= RAM_SIZE - 1; |
2094 | fallthrough; | |
2095 | case PSX_MAP_KERNEL_USER_RAM: | |
2096 | break; | |
2097 | default: | |
2098 | return; | |
d16005f8 | 2099 | } |
d8b04acd PC |
2100 | |
2101 | memset(lut_address(state, lut_offset(kaddr)), 0, | |
2102 | ((len + 3) / 4) * lut_elm_size(state)); | |
d16005f8 PC |
2103 | } |
2104 | ||
2105 | void lightrec_invalidate_all(struct lightrec_state *state) | |
2106 | { | |
02487de7 | 2107 | memset(state->code_lut, 0, lut_elm_size(state) * CODE_LUT_SIZE); |
d16005f8 PC |
2108 | } |
2109 | ||
684432ad | 2110 | void lightrec_set_unsafe_opt_flags(struct lightrec_state *state, u32 flags) |
d16005f8 | 2111 | { |
684432ad | 2112 | if ((flags ^ state->opt_flags) & LIGHTREC_OPT_INV_DMA_ONLY) |
d16005f8 PC |
2113 | lightrec_invalidate_all(state); |
2114 | ||
684432ad | 2115 | state->opt_flags = flags; |
d16005f8 PC |
2116 | } |
2117 | ||
2118 | void lightrec_set_exit_flags(struct lightrec_state *state, u32 flags) | |
2119 | { | |
2120 | if (flags != LIGHTREC_EXIT_NORMAL) { | |
2121 | state->exit_flags |= flags; | |
2122 | state->target_cycle = state->current_cycle; | |
2123 | } | |
2124 | } | |
2125 | ||
2126 | u32 lightrec_exit_flags(struct lightrec_state *state) | |
2127 | { | |
2128 | return state->exit_flags; | |
2129 | } | |
2130 | ||
d16005f8 PC |
2131 | u32 lightrec_current_cycle_count(const struct lightrec_state *state) |
2132 | { | |
2133 | return state->current_cycle; | |
2134 | } | |
2135 | ||
2136 | void lightrec_reset_cycle_count(struct lightrec_state *state, u32 cycles) | |
2137 | { | |
2138 | state->current_cycle = cycles; | |
2139 | ||
2140 | if (state->target_cycle < cycles) | |
2141 | state->target_cycle = cycles; | |
2142 | } | |
2143 | ||
2144 | void lightrec_set_target_cycle_count(struct lightrec_state *state, u32 cycles) | |
2145 | { | |
2146 | if (state->exit_flags == LIGHTREC_EXIT_NORMAL) { | |
2147 | if (cycles < state->current_cycle) | |
2148 | cycles = state->current_cycle; | |
2149 | ||
2150 | state->target_cycle = cycles; | |
2151 | } | |
2152 | } | |
98fa08a5 PC |
2153 | |
2154 | struct lightrec_registers * lightrec_get_registers(struct lightrec_state *state) | |
2155 | { | |
2156 | return &state->regs; | |
2157 | } | |
684432ad PC |
2158 | |
2159 | void lightrec_set_cycles_per_opcode(struct lightrec_state *state, u32 cycles) | |
2160 | { | |
878e6cda PC |
2161 | if (state->cycles_per_op == cycles) |
2162 | return; | |
2163 | ||
684432ad | 2164 | state->cycles_per_op = cycles; |
878e6cda PC |
2165 | |
2166 | if (ENABLE_THREADED_COMPILER) { | |
2167 | lightrec_recompiler_pause(state->rec); | |
2168 | lightrec_reaper_reap(state->reaper); | |
2169 | } | |
2170 | ||
2171 | lightrec_invalidate_all(state); | |
2172 | lightrec_free_all_blocks(state->block_cache); | |
2173 | ||
2174 | if (ENABLE_THREADED_COMPILER) | |
2175 | lightrec_recompiler_unpause(state->rec); | |
684432ad | 2176 | } |