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dev-release: try to make it work
[pcsx_rearmed.git] / deps / lightrec / lightrec.c
CommitLineData
98fa08a5 1// SPDX-License-Identifier: LGPL-2.1-or-later
d16005f8 2/*
98fa08a5 3 * Copyright (C) 2014-2021 Paul Cercueil <paul@crapouillou.net>
d16005f8
PC		 4 */
5
3107c849 6#include "arch.h"
d16005f8 7#include "blockcache.h"
d16005f8
PC		 8#include "debug.h"
9#include "disassembler.h"
10#include "emitter.h"
11#include "interpreter.h"
98fa08a5
PC		 12#include "lightrec-config.h"
13#include "lightning-wrapper.h"
d16005f8
PC		 14#include "lightrec.h"
15#include "memmanager.h"
a59e5536 16#include "reaper.h"
d16005f8
PC		 17#include "recompiler.h"
18#include "regcache.h"
19#include "optimizer.h"
02487de7 20#include "tlsf/tlsf.h"
d16005f8
PC		 21
22#include <errno.h>
98fa08a5 23#include <inttypes.h>
d16005f8
PC		 24#include <limits.h>
25#if ENABLE_THREADED_COMPILER
26#include <stdatomic.h>
27#endif
28#include <stdbool.h>
29#include <stddef.h>
30#include <string.h>
d16005f8 31
d16005f8
PC		 32static struct block * lightrec_precompile_block(struct lightrec_state *state,
33 u32 pc);
98fa08a5
PC		 34static bool lightrec_block_is_fully_tagged(const struct block *block);
35
36static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data);
37static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg);
d16005f8 38
a5a6f7b8
PC		 39static void lightrec_reap_block(struct lightrec_state *state, void *data);
40
a59e5536 41static void lightrec_default_sb(struct lightrec_state *state, u32 opcode,
2e6c828e 42 void *host, u32 addr, u32 data)
a59e5536 43{
2e6c828e 44 *(u8 *)host = (u8)data;
a59e5536 45
684432ad 46 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
a59e5536 47 lightrec_invalidate(state, addr, 1);
48}
49
50static void lightrec_default_sh(struct lightrec_state *state, u32 opcode,
2e6c828e 51 void *host, u32 addr, u32 data)
a59e5536 52{
2e6c828e 53 *(u16 *)host = HTOLE16((u16)data);
a59e5536 54
684432ad 55 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
a59e5536 56 lightrec_invalidate(state, addr, 2);
57}
58
59static void lightrec_default_sw(struct lightrec_state *state, u32 opcode,
60 void *host, u32 addr, u32 data)
61{
62 *(u32 *)host = HTOLE32(data);
63
684432ad 64 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
a59e5536 65 lightrec_invalidate(state, addr, 4);
66}
67
68static u8 lightrec_default_lb(struct lightrec_state *state,
69 u32 opcode, void *host, u32 addr)
70{
71 return *(u8 *)host;
72}
73
74static u16 lightrec_default_lh(struct lightrec_state *state,
75 u32 opcode, void *host, u32 addr)
76{
77 return LE16TOH(*(u16 *)host);
78}
79
80static u32 lightrec_default_lw(struct lightrec_state *state,
81 u32 opcode, void *host, u32 addr)
82{
83 return LE32TOH(*(u32 *)host);
84}
85
5459088b
PC		 86static u32 lightrec_default_lwu(struct lightrec_state *state,
87 u32 opcode, void *host, u32 addr)
88{
89 u32 val;
90
91 memcpy(&val, host, 4);
92
93 return LE32TOH(val);
94}
95
96static void lightrec_default_swu(struct lightrec_state *state, u32 opcode,
97 void *host, u32 addr, u32 data)
98{
99 data = HTOLE32(data);
100
101 memcpy(host, &data, 4);
102
103 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
104 lightrec_invalidate(state, addr & ~0x3, 8);
105}
106
a59e5536 107static const struct lightrec_mem_map_ops lightrec_default_ops = {
108 .sb = lightrec_default_sb,
109 .sh = lightrec_default_sh,
110 .sw = lightrec_default_sw,
111 .lb = lightrec_default_lb,
112 .lh = lightrec_default_lh,
113 .lw = lightrec_default_lw,
5459088b
PC		 114 .lwu = lightrec_default_lwu,
115 .swu = lightrec_default_swu,
a59e5536 116};
117
98fa08a5
PC		 118static void __segfault_cb(struct lightrec_state *state, u32 addr,
119 const struct block *block)
d16005f8
PC		 120{
121 lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT);
122 pr_err("Segmentation fault in recompiled code: invalid "
f5ee77ca 123 "load/store at address "PC_FMT"\n", addr);
98fa08a5 124 if (block)
f5ee77ca 125 pr_err("Was executing block "PC_FMT"\n", block->pc);
d16005f8
PC		 126}
127
a59e5536 128static void lightrec_swl(struct lightrec_state *state,
129 const struct lightrec_mem_map_ops *ops,
130 u32 opcode, void *host, u32 addr, u32 data)
d16005f8 131{
a59e5536 132 unsigned int shift = addr & 0x3;
13b02197 133 unsigned int mask = shift < 3 ? GENMASK(31, (shift + 1) * 8) : 0;
a59e5536 134 u32 old_data;
135
136 /* Align to 32 bits */
137 addr &= ~3;
138 host = (void *)((uintptr_t)host & ~3);
139
140 old_data = ops->lw(state, opcode, host, addr);
141
142 data = (data >> ((3 - shift) * 8)) | (old_data & mask);
143
144 ops->sw(state, opcode, host, addr, data);
145}
146
147static void lightrec_swr(struct lightrec_state *state,
148 const struct lightrec_mem_map_ops *ops,
149 u32 opcode, void *host, u32 addr, u32 data)
150{
151 unsigned int shift = addr & 0x3;
152 unsigned int mask = (1 << (shift * 8)) - 1;
153 u32 old_data;
154
155 /* Align to 32 bits */
156 addr &= ~3;
157 host = (void *)((uintptr_t)host & ~3);
158
159 old_data = ops->lw(state, opcode, host, addr);
160
161 data = (data << (shift * 8)) | (old_data & mask);
162
163 ops->sw(state, opcode, host, addr, data);
164}
165
166static void lightrec_swc2(struct lightrec_state *state, union code op,
167 const struct lightrec_mem_map_ops *ops,
168 void *host, u32 addr)
169{
98fa08a5 170 u32 data = lightrec_mfc2(state, op.i.rt);
a59e5536 171
172 ops->sw(state, op.opcode, host, addr, data);
173}
174
175static u32 lightrec_lwl(struct lightrec_state *state,
176 const struct lightrec_mem_map_ops *ops,
177 u32 opcode, void *host, u32 addr, u32 data)
178{
179 unsigned int shift = addr & 0x3;
180 unsigned int mask = (1 << (24 - shift * 8)) - 1;
181 u32 old_data;
182
183 /* Align to 32 bits */
184 addr &= ~3;
185 host = (void *)((uintptr_t)host & ~3);
186
187 old_data = ops->lw(state, opcode, host, addr);
188
189 return (data & mask) | (old_data << (24 - shift * 8));
190}
191
192static u32 lightrec_lwr(struct lightrec_state *state,
193 const struct lightrec_mem_map_ops *ops,
194 u32 opcode, void *host, u32 addr, u32 data)
195{
196 unsigned int shift = addr & 0x3;
13b02197 197 unsigned int mask = shift ? GENMASK(31, 32 - shift * 8) : 0;
a59e5536 198 u32 old_data;
199
200 /* Align to 32 bits */
201 addr &= ~3;
202 host = (void *)((uintptr_t)host & ~3);
203
204 old_data = ops->lw(state, opcode, host, addr);
205
206 return (data & mask) | (old_data >> (shift * 8));
207}
208
209static void lightrec_lwc2(struct lightrec_state *state, union code op,
210 const struct lightrec_mem_map_ops *ops,
211 void *host, u32 addr)
212{
213 u32 data = ops->lw(state, op.opcode, host, addr);
214
98fa08a5 215 lightrec_mtc2(state, op.i.rt, data);
d16005f8
PC		 216}
217
218static void lightrec_invalidate_map(struct lightrec_state *state,
98fa08a5 219 const struct lightrec_mem_map *map, u32 addr, u32 len)
d16005f8 220{
98fa08a5 221 if (map == &state->maps[PSX_MAP_KERNEL_USER_RAM]) {
02487de7
PC		 222 memset(lut_address(state, lut_offset(addr)), 0,
223 ((len + 3) / 4) * lut_elm_size(state));
98fa08a5 224 }
d16005f8
PC		 225}
226
9259d748 227static enum psx_map
02487de7 228lightrec_get_map_idx(struct lightrec_state *state, u32 kaddr)
d16005f8 229{
98fa08a5 230 const struct lightrec_mem_map *map;
d16005f8
PC		 231 unsigned int i;
232
233 for (i = 0; i < state->nb_maps; i++) {
02487de7 234 map = &state->maps[i];
d16005f8 235
02487de7
PC		 236 if (kaddr >= map->pc && kaddr < map->pc + map->length)
237 return (enum psx_map) i;
d16005f8
PC		 238 }
239
02487de7
PC		 240 return PSX_MAP_UNKNOWN;
241}
242
243const struct lightrec_mem_map *
244lightrec_get_map(struct lightrec_state *state, void **host, u32 kaddr)
245{
246 const struct lightrec_mem_map *map;
247 enum psx_map idx;
248 u32 addr;
249
250 idx = lightrec_get_map_idx(state, kaddr);
251 if (idx == PSX_MAP_UNKNOWN)
98fa08a5
PC		 252 return NULL;
253
02487de7 254 map = &state->maps[idx];
98fa08a5
PC		 255 addr = kaddr - map->pc;
256
257 while (map->mirror_of)
258 map = map->mirror_of;
259
260 if (host)
261 *host = map->address + addr;
262
263 return map;
d16005f8
PC		 264}
265
cb72ea13
PC		 266u32 lightrec_rw(struct lightrec_state *state, union code op, u32 base,
267 u32 data, u32 *flags, struct block *block, u16 offset)
d16005f8
PC		 268{
269 const struct lightrec_mem_map *map;
a59e5536 270 const struct lightrec_mem_map_ops *ops;
98fa08a5 271 u32 opcode = op.opcode;
cb72ea13
PC		 272 bool was_tagged = true;
273 u16 old_flags;
274 u32 addr;
a59e5536 275 void *host;
d16005f8 276
cb72ea13 277 addr = kunseg(base + (s16) op.i.imm);
d16005f8 278
cb72ea13 279 map = lightrec_get_map(state, &host, addr);
d16005f8 280 if (!map) {
98fa08a5 281 __segfault_cb(state, addr, block);
d16005f8
PC		 282 return 0;
283 }
284
cb72ea13
PC		 285 if (flags)
286 was_tagged = LIGHTREC_FLAGS_GET_IO_MODE(*flags);
d16005f8 287
6ce0b00a 288 if (likely(!map->ops)) {
cb72ea13
PC		 289 if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags)) {
290 /* Force parallel port accesses as HW accesses, because
291 * the direct-I/O emitters can't differenciate it. */
292 if (unlikely(map == &state->maps[PSX_MAP_PARALLEL_PORT]))
293 *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW);
294 /* If the base register is 0x0, be extra suspicious.
295 * Some games (e.g. Sled Storm) actually do segmentation
296 * faults by using uninitialized pointers, which are
297 * later initialized to point to hardware registers. */
298 else if (op.i.rs && base == 0x0)
299 *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW);
300 else
301 *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_DIRECT);
302 }
d16005f8 303
a59e5536 304 ops = &lightrec_default_ops;
6ce0b00a
PC		 305 } else if (flags &&
306 LIGHTREC_FLAGS_GET_IO_MODE(*flags) == LIGHTREC_IO_DIRECT_HW) {
307 ops = &lightrec_default_ops;
308 } else {
309 if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags))
310 *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW);
311
312 ops = map->ops;
a59e5536 313 }
d16005f8 314
cb72ea13
PC		 315 if (!was_tagged) {
316 old_flags = block_set_flags(block, BLOCK_SHOULD_RECOMPILE);
317
318 if (!(old_flags & BLOCK_SHOULD_RECOMPILE)) {
f5ee77ca 319 pr_debug("Opcode of block at "PC_FMT" has been tagged"
cb72ea13
PC		 320 " - flag for recompilation\n", block->pc);
321
322 lut_write(state, lut_offset(block->pc), NULL);
323 }
324 }
325
d16005f8
PC		 326 switch (op.i.op) {
327 case OP_SB:
2e6c828e 328 ops->sb(state, opcode, host, addr, data);
d16005f8
PC		 329 return 0;
330 case OP_SH:
2e6c828e 331 ops->sh(state, opcode, host, addr, data);
d16005f8
PC		 332 return 0;
333 case OP_SWL:
a59e5536 334 lightrec_swl(state, ops, opcode, host, addr, data);
d16005f8
PC		 335 return 0;
336 case OP_SWR:
a59e5536 337 lightrec_swr(state, ops, opcode, host, addr, data);
d16005f8
PC		 338 return 0;
339 case OP_SW:
a59e5536 340 ops->sw(state, opcode, host, addr, data);
d16005f8
PC		 341 return 0;
342 case OP_SWC2:
a59e5536 343 lightrec_swc2(state, op, ops, host, addr);
d16005f8
PC		 344 return 0;
345 case OP_LB:
a59e5536 346 return (s32) (s8) ops->lb(state, opcode, host, addr);
d16005f8 347 case OP_LBU:
a59e5536 348 return ops->lb(state, opcode, host, addr);
d16005f8 349 case OP_LH:
a59e5536 350 return (s32) (s16) ops->lh(state, opcode, host, addr);
d16005f8 351 case OP_LHU:
a59e5536 352 return ops->lh(state, opcode, host, addr);
d16005f8 353 case OP_LWC2:
a59e5536 354 lightrec_lwc2(state, op, ops, host, addr);
d16005f8 355 return 0;
a59e5536 356 case OP_LWL:
357 return lightrec_lwl(state, ops, opcode, host, addr, data);
358 case OP_LWR:
359 return lightrec_lwr(state, ops, opcode, host, addr, data);
5459088b
PC		 360 case OP_META_LWU:
361 return ops->lwu(state, opcode, host, addr);
362 case OP_META_SWU:
363 ops->swu(state, opcode, host, addr, data);
364 return 0;
d16005f8
PC		 365 case OP_LW:
366 default:
a59e5536 367 return ops->lw(state, opcode, host, addr);
d16005f8
PC		 368 }
369}
370
371static void lightrec_rw_helper(struct lightrec_state *state,
03535202 372 union code op, u32 *flags,
cb72ea13 373 struct block *block, u16 offset)
d16005f8 374{
98fa08a5 375 u32 ret = lightrec_rw(state, op, state->regs.gpr[op.i.rs],
cb72ea13 376 state->regs.gpr[op.i.rt], flags, block, offset);
d16005f8
PC		 377
378 switch (op.i.op) {
379 case OP_LB:
380 case OP_LBU:
381 case OP_LH:
382 case OP_LHU:
383 case OP_LWL:
384 case OP_LWR:
385 case OP_LW:
5459088b 386 case OP_META_LWU:
cb72ea13
PC		 387 if (OPT_HANDLE_LOAD_DELAYS && unlikely(!state->in_delay_slot_n)) {
388 state->temp_reg = ret;
389 state->in_delay_slot_n = 0xff;
390 } else if (op.i.rt) {
98fa08a5 391 state->regs.gpr[op.i.rt] = ret;
cb72ea13 392 }
d8b04acd
PC		 393 fallthrough;
394 default:
d16005f8
PC		 395 break;
396 }
397}
398
03535202 399static void lightrec_rw_cb(struct lightrec_state *state, u32 arg)
d16005f8 400{
cb72ea13 401 lightrec_rw_helper(state, (union code) arg, NULL, NULL, 0);
d16005f8
PC		 402}
403
03535202 404static void lightrec_rw_generic_cb(struct lightrec_state *state, u32 arg)
d16005f8 405{
98fa08a5
PC		 406 struct block *block;
407 struct opcode *op;
98fa08a5
PC		 408 u16 offset = (u16)arg;
409
410 block = lightrec_find_block_from_lut(state->block_cache,
0e720fb1 411 arg >> 16, state->curr_pc);
98fa08a5 412 if (unlikely(!block)) {
f5ee77ca 413 pr_err("rw_generic: No block found in LUT for "PC_FMT" offset 0x%"PRIx16"\n",
0e720fb1 414 state->curr_pc, offset);
ba3814c1 415 lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT);
98fa08a5
PC		 416 return;
417 }
418
419 op = &block->opcode_list[offset];
cb72ea13 420 lightrec_rw_helper(state, op->c, &op->flags, block, offset);
d16005f8
PC		 421}
422
98fa08a5 423static u32 clamp_s32(s32 val, s32 min, s32 max)
d16005f8 424{
98fa08a5
PC		 425 return val < min ? min : val > max ? max : val;
426}
d16005f8 427
11357fef
PC		 428static u16 load_u16(u32 *ptr)
429{
430 return ((struct u16x2 *) ptr)->l;
431}
432
433static void store_u16(u32 *ptr, u16 value)
434{
435 ((struct u16x2 *) ptr)->l = value;
436}
437
98fa08a5
PC		 438static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg)
439{
440 s16 gteir1, gteir2, gteir3;
441
442 switch (reg) {
443 case 1:
444 case 3:
445 case 5:
446 case 8:
447 case 9:
448 case 10:
449 case 11:
11357fef 450 return (s32)(s16) load_u16(&state->regs.cp2d[reg]);
98fa08a5
PC		 451 case 7:
452 case 16:
453 case 17:
454 case 18:
455 case 19:
11357fef 456 return load_u16(&state->regs.cp2d[reg]);
98fa08a5
PC		 457 case 28:
458 case 29:
11357fef
PC		 459 gteir1 = (s16) load_u16(&state->regs.cp2d[9]);
460 gteir2 = (s16) load_u16(&state->regs.cp2d[10]);
461 gteir3 = (s16) load_u16(&state->regs.cp2d[11]);
98fa08a5
PC		 462
463 return clamp_s32(gteir1 >> 7, 0, 0x1f) << 0 |
464 clamp_s32(gteir2 >> 7, 0, 0x1f) << 5 |
465 clamp_s32(gteir3 >> 7, 0, 0x1f) << 10;
466 case 15:
467 reg = 14;
d8b04acd
PC		 468 fallthrough;
469 default:
98fa08a5
PC		 470 return state->regs.cp2d[reg];
471 }
472}
d16005f8 473
98fa08a5
PC		 474u32 lightrec_mfc(struct lightrec_state *state, union code op)
475{
ba3814c1
PC		 476 u32 val;
477
98fa08a5
PC		 478 if (op.i.op == OP_CP0)
479 return state->regs.cp0[op.r.rd];
9259d748
PC		 480
481 if (op.i.op == OP_SWC2) {
482 val = lightrec_mfc2(state, op.i.rt);
483 } else if (op.r.rs == OP_CP2_BASIC_MFC2)
fdf33147
PC		 484 val = lightrec_mfc2(state, op.r.rd);
485 else {
486 val = state->regs.cp2c[op.r.rd];
487
488 switch (op.r.rd) {
489 case 4:
490 case 12:
491 case 20:
492 case 26:
493 case 27:
494 case 29:
495 case 30:
496 val = (u32)(s16)val;
497 fallthrough;
498 default:
499 break;
500 }
501 }
ba3814c1 502
fdf33147
PC		 503 if (state->ops.cop2_notify)
504 (*state->ops.cop2_notify)(state, op.opcode, val);
ba3814c1 505
fdf33147
PC		 506 return val;
507}
508
509static void lightrec_mfc_cb(struct lightrec_state *state, union code op)
510{
511 u32 rt = lightrec_mfc(state, op);
512
9259d748 513 if (op.i.op == OP_SWC2)
cb72ea13 514 state->temp_reg = rt;
9259d748 515 else if (op.r.rt)
fdf33147 516 state->regs.gpr[op.r.rt] = rt;
d16005f8
PC		 517}
518
98fa08a5 519static void lightrec_mtc0(struct lightrec_state *state, u8 reg, u32 data)
d16005f8 520{
fd58fa32 521 u32 status, oldstatus, cause;
98fa08a5
PC		 522
523 switch (reg) {
524 case 1:
525 case 4:
526 case 8:
527 case 14:
528 case 15:
529 /* Those registers are read-only */
530 return;
fd58fa32 531 default:
98fa08a5
PC		 532 break;
533 }
d16005f8 534
98fa08a5
PC		 535 if (reg == 12) {
536 status = state->regs.cp0[12];
fd58fa32 537 oldstatus = status;
d16005f8 538
98fa08a5
PC		 539 if (status & ~data & BIT(16)) {
540 state->ops.enable_ram(state, true);
541 lightrec_invalidate_all(state);
542 } else if (~status & data & BIT(16)) {
543 state->ops.enable_ram(state, false);
544 }
545 }
546
fd58fa32
PC		 547 if (reg == 13) {
548 state->regs.cp0[13] &= ~0x300;
549 state->regs.cp0[13] |= data & 0x300;
550 } else {
551 state->regs.cp0[reg] = data;
552 }
98fa08a5
PC		 553
554 if (reg == 12 || reg == 13) {
555 cause = state->regs.cp0[13];
556 status = state->regs.cp0[12];
557
fd58fa32 558 /* Handle software interrupts */
684432ad 559 if ((!!(status & cause & 0x300)) & status)
98fa08a5 560 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
fd58fa32
PC		 561
562 /* Handle hardware interrupts */
563 if (reg == 12 && !(~status & 0x401) && (~oldstatus & 0x401))
564 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
98fa08a5
PC		 565 }
566}
567
568static u32 count_leading_bits(s32 data)
569{
6091efb4 570#ifdef __has_builtin
571#if __has_builtin(__builtin_clrsb)
de742fa0 572 return 1 + __builtin_clrsb(data);
6091efb4 573#endif
574#endif
fff9a1d4 575 data ^= data >> 31;
576 return data ? clz32(data) : 32;
98fa08a5
PC		 577}
578
579static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data)
580{
581 switch (reg) {
582 case 15:
583 state->regs.cp2d[12] = state->regs.cp2d[13];
584 state->regs.cp2d[13] = state->regs.cp2d[14];
585 state->regs.cp2d[14] = data;
586 break;
587 case 28:
588 state->regs.cp2d[9] = (data << 7) & 0xf80;
589 state->regs.cp2d[10] = (data << 2) & 0xf80;
590 state->regs.cp2d[11] = (data >> 3) & 0xf80;
591 break;
592 case 31:
593 return;
594 case 30:
595 state->regs.cp2d[31] = count_leading_bits((s32) data);
d8b04acd
PC		 596 fallthrough;
597 default:
98fa08a5
PC		 598 state->regs.cp2d[reg] = data;
599 break;
600 }
601}
d16005f8 602
98fa08a5
PC		 603static void lightrec_ctc2(struct lightrec_state *state, u8 reg, u32 data)
604{
605 switch (reg) {
606 case 4:
607 case 12:
608 case 20:
609 case 26:
610 case 27:
611 case 29:
612 case 30:
11357fef 613 store_u16(&state->regs.cp2c[reg], data);
98fa08a5
PC		 614 break;
615 case 31:
616 data = (data & 0x7ffff000) | !!(data & 0x7f87e000) << 31;
d8b04acd
PC		 617 fallthrough;
618 default:
11357fef 619 state->regs.cp2c[reg] = data;
98fa08a5
PC		 620 break;
621 }
98fa08a5
PC		 622}
623
9259d748 624void lightrec_mtc(struct lightrec_state *state, union code op, u8 reg, u32 data)
98fa08a5 625{
fdf33147 626 if (op.i.op == OP_CP0) {
9259d748 627 lightrec_mtc0(state, reg, data);
fdf33147 628 } else {
9259d748
PC		 629 if (op.i.op == OP_LWC2 || op.r.rs != OP_CP2_BASIC_CTC2)
630 lightrec_mtc2(state, reg, data);
fdf33147 631 else
9259d748 632 lightrec_ctc2(state, reg, data);
fdf33147
PC		 633
634 if (state->ops.cop2_notify)
635 (*state->ops.cop2_notify)(state, op.opcode, data);
636 }
d16005f8
PC		 637}
638
03535202 639static void lightrec_mtc_cb(struct lightrec_state *state, u32 arg)
d16005f8 640{
03535202 641 union code op = (union code) arg;
9259d748
PC		 642 u32 data;
643 u8 reg;
644
645 if (op.i.op == OP_LWC2) {
cb72ea13 646 data = state->temp_reg;
9259d748
PC		 647 reg = op.i.rt;
648 } else {
649 data = state->regs.gpr[op.r.rt];
650 reg = op.r.rd;
651 }
22eee2ac 652
9259d748 653 lightrec_mtc(state, op, reg, data);
d16005f8
PC		 654}
655
98fa08a5 656void lightrec_rfe(struct lightrec_state *state)
d16005f8
PC		 657{
658 u32 status;
659
660 /* Read CP0 Status register (r12) */
98fa08a5 661 status = state->regs.cp0[12];
d16005f8
PC		 662
663 /* Switch the bits */
664 status = ((status & 0x3c) >> 2) | (status & ~0xf);
665
666 /* Write it back */
98fa08a5 667 lightrec_mtc0(state, 12, status);
d16005f8
PC		 668}
669
98fa08a5 670void lightrec_cp(struct lightrec_state *state, union code op)
d16005f8 671{
98fa08a5
PC		 672 if (op.i.op == OP_CP0) {
673 pr_err("Invalid CP opcode to coprocessor #0\n");
674 return;
675 }
d16005f8 676
98fa08a5 677 (*state->ops.cop2_op)(state, op.opcode);
d16005f8
PC		 678}
679
03535202 680static void lightrec_cp_cb(struct lightrec_state *state, u32 arg)
22eee2ac 681{
03535202 682 lightrec_cp(state, (union code) arg);
22eee2ac
PC		 683}
684
03535202 685static struct block * lightrec_get_block(struct lightrec_state *state, u32 pc)
d16005f8
PC		 686{
687 struct block *block = lightrec_find_block(state->block_cache, pc);
ba3814c1 688 u8 old_flags;
d16005f8 689
98fa08a5 690 if (block && lightrec_block_is_outdated(state, block)) {
f5ee77ca 691 pr_debug("Block at "PC_FMT" is outdated!\n", block->pc);
d16005f8 692
ba3814c1
PC		 693 old_flags = block_set_flags(block, BLOCK_IS_DEAD);
694 if (!(old_flags & BLOCK_IS_DEAD)) {
695 /* Make sure the recompiler isn't processing the block
696 * we'll destroy */
697 if (ENABLE_THREADED_COMPILER)
698 lightrec_recompiler_remove(state->rec, block);
699
ba3814c1 700 remove_from_code_lut(state->block_cache, block);
a5a6f7b8
PC		 701
702 if (ENABLE_THREADED_COMPILER) {
703 lightrec_reaper_add(state->reaper,
704 lightrec_reap_block, block);
705 } else {
706 lightrec_unregister_block(state->block_cache, block);
707 lightrec_free_block(state, block);
708 }
ba3814c1 709 }
d16005f8 710
d16005f8
PC		 711 block = NULL;
712 }
713
714 if (!block) {
715 block = lightrec_precompile_block(state, pc);
716 if (!block) {
f5ee77ca 717 pr_err("Unable to recompile block at "PC_FMT"\n", pc);
d16005f8
PC		 718 lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT);
719 return NULL;
720 }
721
722 lightrec_register_block(state->block_cache, block);
723 }
724
725 return block;
726}
727
728static void * get_next_block_func(struct lightrec_state *state, u32 pc)
729{
730 struct block *block;
731 bool should_recompile;
732 void *func;
d8b04acd 733 int err;
d16005f8 734
9259d748 735 do {
d8b04acd 736 func = lut_read(state, lut_offset(pc));
d16005f8 737 if (func && func != state->get_next_block)
98fa08a5 738 break;
d16005f8
PC		 739
740 block = lightrec_get_block(state, pc);
741
742 if (unlikely(!block))
98fa08a5
PC		 743 break;
744
ba3814c1
PC		 745 if (OPT_REPLACE_MEMSET &&
746 block_has_flag(block, BLOCK_IS_MEMSET)) {
98fa08a5
PC		 747 func = state->memset_func;
748 break;
749 }
d16005f8 750
ba3814c1 751 should_recompile = block_has_flag(block, BLOCK_SHOULD_RECOMPILE) &&
cb72ea13 752 !block_has_flag(block, BLOCK_NEVER_COMPILE) &&
ba3814c1 753 !block_has_flag(block, BLOCK_IS_DEAD);
d16005f8
PC		 754
755 if (unlikely(should_recompile)) {
f5ee77ca 756 pr_debug("Block at "PC_FMT" should recompile\n", pc);
d16005f8 757
d8b04acd 758 if (ENABLE_THREADED_COMPILER) {
a59e5536 759 lightrec_recompiler_add(state->rec, block);
d8b04acd
PC		 760 } else {
761 err = lightrec_compile_block(state->cstate, block);
762 if (err) {
763 state->exit_flags = LIGHTREC_EXIT_NOMEM;
764 return NULL;
765 }
766 }
d16005f8
PC		 767 }
768
769 if (ENABLE_THREADED_COMPILER && likely(!should_recompile))
98fa08a5 770 func = lightrec_recompiler_run_first_pass(state, block, &pc);
d16005f8
PC		 771 else
772 func = block->function;
773
774 if (likely(func))
98fa08a5 775 break;
d16005f8 776
ba3814c1 777 if (unlikely(block_has_flag(block, BLOCK_NEVER_COMPILE))) {
98fa08a5
PC		 778 pc = lightrec_emulate_block(state, block, pc);
779
780 } else if (!ENABLE_THREADED_COMPILER) {
781 /* Block wasn't compiled yet - run the interpreter */
ba3814c1 782 if (block_has_flag(block, BLOCK_FULLY_TAGGED))
98fa08a5
PC		 783 pr_debug("Block fully tagged, skipping first pass\n");
784 else if (ENABLE_FIRST_PASS && likely(!should_recompile))
785 pc = lightrec_emulate_block(state, block, pc);
d16005f8 786
d16005f8 787 /* Then compile it using the profiled data */
d8b04acd
PC		 788 err = lightrec_compile_block(state->cstate, block);
789 if (err) {
790 state->exit_flags = LIGHTREC_EXIT_NOMEM;
791 return NULL;
792 }
ba3814c1
PC		 793 } else if (unlikely(block_has_flag(block, BLOCK_IS_DEAD))) {
794 /*
795 * If the block is dead but has never been compiled,
796 * then its function pointer is NULL and we cannot
797 * execute the block. In that case, reap all the dead
798 * blocks now, and in the next loop we will create a
799 * new block.
800 */
801 lightrec_reaper_reap(state->reaper);
98fa08a5
PC		 802 } else {
803 lightrec_recompiler_add(state->rec, block);
d16005f8 804 }
9259d748
PC		 805 } while (state->exit_flags == LIGHTREC_EXIT_NORMAL
806 && state->current_cycle < state->target_cycle);
d16005f8 807
0e720fb1 808 state->curr_pc = pc;
98fa08a5 809 return func;
d16005f8
PC		 810}
811
d8b04acd
PC		 812static void * lightrec_alloc_code(struct lightrec_state *state, size_t size)
813{
814 void *code;
815
816 if (ENABLE_THREADED_COMPILER)
817 lightrec_code_alloc_lock(state);
818
819 code = tlsf_malloc(state->tlsf, size);
820
821 if (ENABLE_THREADED_COMPILER)
822 lightrec_code_alloc_unlock(state);
823
824 return code;
825}
826
827static void lightrec_realloc_code(struct lightrec_state *state,
828 void *ptr, size_t size)
829{
830 /* NOTE: 'size' MUST be smaller than the size specified during
831 * the allocation. */
832
833 if (ENABLE_THREADED_COMPILER)
834 lightrec_code_alloc_lock(state);
835
836 tlsf_realloc(state->tlsf, ptr, size);
837
838 if (ENABLE_THREADED_COMPILER)
839 lightrec_code_alloc_unlock(state);
840}
841
842static void lightrec_free_code(struct lightrec_state *state, void *ptr)
843{
844 if (ENABLE_THREADED_COMPILER)
845 lightrec_code_alloc_lock(state);
846
847 tlsf_free(state->tlsf, ptr);
848
849 if (ENABLE_THREADED_COMPILER)
850 lightrec_code_alloc_unlock(state);
851}
852
cb72ea13
PC		 853static char lightning_code_data[0x80000];
854
02487de7 855static void * lightrec_emit_code(struct lightrec_state *state,
d8b04acd 856 const struct block *block,
02487de7
PC		 857 jit_state_t *_jit, unsigned int *size)
858{
859 bool has_code_buffer = ENABLE_CODE_BUFFER && state->tlsf;
860 jit_word_t code_size, new_code_size;
861 void *code;
862
863 jit_realize();
864
cb72ea13
PC		 865 if (ENABLE_DISASSEMBLER)
866 jit_set_data(lightning_code_data, sizeof(lightning_code_data), 0);
867 else
02487de7
PC		 868 jit_set_data(NULL, 0, JIT_DISABLE_DATA | JIT_DISABLE_NOTE);
869
870 if (has_code_buffer) {
871 jit_get_code(&code_size);
878e6cda
PC		 872
873#ifdef __i386__
874 /* Lightning's code size estimation routine is buggy on x86 and
875 * will return a value that's too small. */
876 code_size *= 2;
877#endif
878
d8b04acd
PC		 879 code = lightrec_alloc_code(state, (size_t) code_size);
880
881 if (!code) {
882 if (ENABLE_THREADED_COMPILER) {
883 /* If we're using the threaded compiler, return
884 * an allocation error here. The threaded
885 * compiler will then empty its job queue and
886 * request a code flush using the reaper. */
887 return NULL;
888 }
889
890 /* Remove outdated blocks, and try again */
891 lightrec_remove_outdated_blocks(state->block_cache, block);
892
893 pr_debug("Re-try to alloc %zu bytes...\n", code_size);
894
895 code = lightrec_alloc_code(state, code_size);
896 if (!code) {
897 pr_err("Could not alloc even after removing old blocks!\n");
898 return NULL;
899 }
900 }
02487de7
PC		 901
902 jit_set_code(code, code_size);
903 }
904
905 code = jit_emit();
878e6cda
PC		 906 if (!code) {
907 if (has_code_buffer)
908 lightrec_free_code(state, code);
909
910 return NULL;
911 }
02487de7
PC		 912
913 jit_get_code(&new_code_size);
914 lightrec_register(MEM_FOR_CODE, new_code_size);
915
916 if (has_code_buffer) {
d8b04acd 917 lightrec_realloc_code(state, code, (size_t) new_code_size);
02487de7
PC		 918
919 pr_debug("Creating code block at address 0x%" PRIxPTR ", "
920 "code size: %" PRIuPTR " new: %" PRIuPTR "\n",
921 (uintptr_t) code, code_size, new_code_size);
922 }
923
924 *size = (unsigned int) new_code_size;
925
9259d748
PC		 926 if (state->ops.code_inv)
927 state->ops.code_inv(code, new_code_size);
928
02487de7
PC		 929 return code;
930}
931
98fa08a5 932static struct block * generate_wrapper(struct lightrec_state *state)
d16005f8
PC		 933{
934 struct block *block;
935 jit_state_t *_jit;
936 unsigned int i;
cb72ea13 937
d16005f8
PC		 938 block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block));
939 if (!block)
940 goto err_no_mem;
941
942 _jit = jit_new_state();
943 if (!_jit)
944 goto err_free_block;
945
946 jit_name("RW wrapper");
947 jit_note(__FILE__, __LINE__);
948
949 /* Wrapper entry point */
950 jit_prolog();
fd58fa32
PC		 951 jit_tramp(256);
952
8afce295 953 /* Load pointer to C wrapper */
5eecf06d 954 jit_add_state(JIT_R1, JIT_R1);
8afce295 955 jit_ldxi(JIT_R1, JIT_R1, lightrec_offset(c_wrappers));
ba3814c1 956
fd58fa32
PC		 957 jit_epilog();
958 jit_prolog();
d16005f8 959
fd58fa32 960 /* Save all temporaries on stack */
ba3814c1
PC		 961 for (i = 0; i < NUM_TEMPS; i++) {
962 if (i + FIRST_TEMP != 1) {
8afce295 963 jit_stxi(lightrec_offset(wrapper_regs[i]),
ba3814c1
PC		 964 LIGHTREC_REG_STATE, JIT_R(i + FIRST_TEMP));
965 }
966 }
d16005f8 967
ba3814c1 968 jit_getarg(JIT_R2, jit_arg());
03535202 969
ba3814c1
PC		 970 jit_prepare();
971 jit_pushargr(LIGHTREC_REG_STATE);
972 jit_pushargr(JIT_R2);
d16005f8 973
8afce295 974 jit_ldxi_ui(JIT_R2, LIGHTREC_REG_STATE, lightrec_offset(target_cycle));
d16005f8 975
ba3814c1
PC		 976 /* state->current_cycle = state->target_cycle - delta; */
977 jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, LIGHTREC_REG_CYCLE);
8afce295 978 jit_stxi_i(lightrec_offset(current_cycle), LIGHTREC_REG_STATE, LIGHTREC_REG_CYCLE);
d16005f8 979
ba3814c1
PC		 980 /* Call the wrapper function */
981 jit_finishr(JIT_R1);
d16005f8 982
ba3814c1 983 /* delta = state->target_cycle - state->current_cycle */;
8afce295
PC		 984 jit_ldxi_ui(LIGHTREC_REG_CYCLE, LIGHTREC_REG_STATE, lightrec_offset(current_cycle));
985 jit_ldxi_ui(JIT_R1, LIGHTREC_REG_STATE, lightrec_offset(target_cycle));
ba3814c1 986 jit_subr(LIGHTREC_REG_CYCLE, JIT_R1, LIGHTREC_REG_CYCLE);
fd58fa32 987
ba3814c1
PC		 988 /* Restore temporaries from stack */
989 for (i = 0; i < NUM_TEMPS; i++) {
990 if (i + FIRST_TEMP != 1) {
991 jit_ldxi(JIT_R(i + FIRST_TEMP), LIGHTREC_REG_STATE,
8afce295 992 lightrec_offset(wrapper_regs[i]));
ba3814c1
PC		 993 }
994 }
d16005f8 995
ba3814c1 996 jit_ret();
d16005f8
PC		 997 jit_epilog();
998
d16005f8 999 block->_jit = _jit;
d16005f8 1000 block->opcode_list = NULL;
ba3814c1 1001 block->flags = BLOCK_NO_OPCODE_LIST;
d16005f8
PC		 1002 block->nb_ops = 0;
1003
d8b04acd 1004 block->function = lightrec_emit_code(state, block, _jit,
02487de7
PC		 1005 &block->code_size);
1006 if (!block->function)
878e6cda 1007 goto err_free_jit;
02487de7 1008
8afce295 1009 state->c_wrapper = block->function;
fd58fa32 1010
d16005f8
PC		 1011 if (ENABLE_DISASSEMBLER) {
1012 pr_debug("Wrapper block:\n");
1013 jit_disassemble();
1014 }
1015
1016 jit_clear_state();
1017 return block;
1018
878e6cda
PC		 1019err_free_jit:
1020 jit_destroy_state();
d16005f8
PC		 1021err_free_block:
1022 lightrec_free(state, MEM_FOR_IR, sizeof(*block), block);
1023err_no_mem:
1024 pr_err("Unable to compile wrapper: Out of memory\n");
1025 return NULL;
1026}
1027
98fa08a5
PC		 1028static u32 lightrec_memset(struct lightrec_state *state)
1029{
1030 u32 kunseg_pc = kunseg(state->regs.gpr[4]);
1031 void *host;
1032 const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg_pc);
1033 u32 length = state->regs.gpr[5] * 4;
1034
1035 if (!map) {
f5ee77ca
PC		 1036 pr_err("Unable to find memory map for memset target address "PC_FMT"\n",
1037 kunseg_pc);
98fa08a5
PC		 1038 return 0;
1039 }
1040
5eecf06d 1041 pr_debug("Calling host memset, "PC_FMT" (host address 0x%"PRIxPTR") for %"PRIu32" bytes\n",
98fa08a5
PC		 1042 kunseg_pc, (uintptr_t)host, length);
1043 memset(host, 0, length);
1044
684432ad 1045 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
98fa08a5
PC		 1046 lightrec_invalidate_map(state, map, kunseg_pc, length);
1047
1048 /* Rough estimation of the number of cycles consumed */
1049 return 8 + 5 * (length + 3 / 4);
1050}
1051
cb72ea13
PC		 1052static u32 lightrec_check_load_delay(struct lightrec_state *state, u32 pc, u8 reg)
1053{
1054 struct block *block;
1055 union code first_op;
1056
1057 first_op = lightrec_read_opcode(state, pc);
1058
1059 if (likely(!opcode_reads_register(first_op, reg))) {
1060 state->regs.gpr[reg] = state->temp_reg;
1061 } else {
1062 block = lightrec_get_block(state, pc);
1063 if (unlikely(!block)) {
f5ee77ca 1064 pr_err("Unable to get block at "PC_FMT"\n", pc);
cb72ea13
PC		 1065 lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT);
1066 pc = 0;
1067 } else {
1068 pc = lightrec_handle_load_delay(state, block, pc, reg);
1069 }
1070 }
1071
1072 return pc;
1073}
1074
1075static void update_cycle_counter_before_c(jit_state_t *_jit)
1076{
1077 /* update state->current_cycle */
8afce295 1078 jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE, lightrec_offset(target_cycle));
cb72ea13 1079 jit_subr(JIT_R1, JIT_R2, LIGHTREC_REG_CYCLE);
8afce295 1080 jit_stxi_i(lightrec_offset(current_cycle), LIGHTREC_REG_STATE, JIT_R1);
cb72ea13
PC		 1081}
1082
1083static void update_cycle_counter_after_c(jit_state_t *_jit)
1084{
1085 /* Recalc the delta */
8afce295
PC		 1086 jit_ldxi_i(JIT_R1, LIGHTREC_REG_STATE, lightrec_offset(current_cycle));
1087 jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE, lightrec_offset(target_cycle));
cb72ea13
PC		 1088 jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, JIT_R1);
1089}
1090
0e720fb1
PC		 1091static void sync_next_pc(jit_state_t *_jit)
1092{
1093 if (lightrec_store_next_pc()) {
684432ad 1094 jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE,
8afce295 1095 lightrec_offset(next_pc));
0e720fb1
PC		 1096 }
1097}
1098
d16005f8
PC		 1099static struct block * generate_dispatcher(struct lightrec_state *state)
1100{
1101 struct block *block;
1102 jit_state_t *_jit;
8afce295
PC		 1103 jit_node_t *to_end, *loop, *loop2,
1104 *addr, *addr2, *addr3, *addr4, *addr5;
d16005f8 1105 unsigned int i;
02487de7 1106 u32 offset;
d16005f8
PC		 1107
1108 block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block));
1109 if (!block)
1110 goto err_no_mem;
1111
1112 _jit = jit_new_state();
1113 if (!_jit)
1114 goto err_free_block;
1115
1116 jit_name("dispatcher");
1117 jit_note(__FILE__, __LINE__);
1118
1119 jit_prolog();
1120 jit_frame(256);
1121
9259d748
PC		 1122 jit_getarg(LIGHTREC_REG_STATE, jit_arg());
1123 jit_getarg(JIT_V0, jit_arg());
ba3814c1 1124 jit_getarg(JIT_V1, jit_arg());
d16005f8 1125 jit_getarg_i(LIGHTREC_REG_CYCLE, jit_arg());
d16005f8
PC		 1126
1127 /* Force all callee-saved registers to be pushed on the stack */
1128 for (i = 0; i < NUM_REGS; i++)
ba3814c1 1129 jit_movr(JIT_V(i + FIRST_REG), JIT_V(i + FIRST_REG));
d16005f8 1130
d16005f8
PC		 1131 loop = jit_label();
1132
3107c849
PC		 1133 if (!arch_has_fast_mask())
1134 jit_movi(JIT_R1, 0x1fffffff);
1135
d16005f8 1136 /* Call the block's code */
ba3814c1 1137 jit_jmpr(JIT_V1);
d16005f8 1138
0e720fb1
PC		 1139 /* The block will jump here, with the number of cycles remaining in
1140 * LIGHTREC_REG_CYCLE */
1141 addr2 = jit_indirect();
1142
1143 sync_next_pc(_jit);
1144
8afce295 1145 loop2 = jit_label();
98fa08a5 1146
d16005f8
PC		 1147 /* Jump to end if state->target_cycle < state->current_cycle */
1148 to_end = jit_blei(LIGHTREC_REG_CYCLE, 0);
1149
1150 /* Convert next PC to KUNSEG and avoid mirrors */
878e6cda 1151 jit_andi(JIT_V1, JIT_V0, RAM_SIZE - 1);
02487de7 1152 jit_andi(JIT_R2, JIT_V0, BIOS_SIZE - 1);
878e6cda 1153 jit_andi(JIT_R1, JIT_V0, BIT(28));
02487de7 1154 jit_addi(JIT_R2, JIT_R2, RAM_SIZE);
ba3814c1 1155 jit_movnr(JIT_V1, JIT_R2, JIT_R1);
02487de7
PC		 1156
1157 /* If possible, use the code LUT */
1158 if (!lut_is_32bit(state))
ba3814c1 1159 jit_lshi(JIT_V1, JIT_V1, 1);
cb72ea13 1160 jit_add_state(JIT_V1, JIT_V1);
02487de7 1161
8afce295 1162 offset = lightrec_offset(code_lut);
02487de7 1163 if (lut_is_32bit(state))
ba3814c1 1164 jit_ldxi_ui(JIT_V1, JIT_V1, offset);
02487de7 1165 else
ba3814c1 1166 jit_ldxi(JIT_V1, JIT_V1, offset);
d16005f8 1167
8afce295
PC		 1168 /* Store back the current PC to the lightrec_state structure */
1169 jit_stxi_i(lightrec_offset(curr_pc), LIGHTREC_REG_STATE, JIT_V0);
1170
d16005f8 1171 /* If we get non-NULL, loop */
ba3814c1
PC		 1172 jit_patch_at(jit_bnei(JIT_V1, 0), loop);
1173
1174 /* The code LUT will be set to this address when the block at the target
1175 * PC has been preprocessed but not yet compiled by the threaded
1176 * recompiler */
1177 addr = jit_indirect();
d16005f8
PC		 1178
1179 /* Slow path: call C function get_next_block_func() */
d16005f8 1180
98fa08a5 1181 if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) {
d16005f8 1182 /* We may call the interpreter - update state->current_cycle */
cb72ea13 1183 update_cycle_counter_before_c(_jit);
d16005f8
PC		 1184 }
1185
d16005f8
PC		 1186 jit_prepare();
1187 jit_pushargr(LIGHTREC_REG_STATE);
1188 jit_pushargr(JIT_V0);
ba3814c1
PC		 1189
1190 /* Save the cycles register if needed */
1191 if (!(ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES))
1192 jit_movr(JIT_V0, LIGHTREC_REG_CYCLE);
1193
1194 /* Get the next block */
d16005f8 1195 jit_finishi(&get_next_block_func);
ba3814c1 1196 jit_retval(JIT_V1);
d16005f8 1197
98fa08a5 1198 if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) {
d16005f8
PC		 1199 /* The interpreter may have updated state->current_cycle and
1200 * state->target_cycle - recalc the delta */
cb72ea13 1201 update_cycle_counter_after_c(_jit);
ba3814c1
PC		 1202 } else {
1203 jit_movr(LIGHTREC_REG_CYCLE, JIT_V0);
d16005f8
PC		 1204 }
1205
9259d748 1206 /* Reset JIT_V0 to the next PC */
8afce295 1207 jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, lightrec_offset(curr_pc));
9259d748 1208
d16005f8 1209 /* If we get non-NULL, loop */
ba3814c1 1210 jit_patch_at(jit_bnei(JIT_V1, 0), loop);
d16005f8 1211
d16005f8
PC		 1212 /* When exiting, the recompiled code will jump to that address */
1213 jit_note(__FILE__, __LINE__);
1214 jit_patch(to_end);
1215
8afce295
PC		 1216 /* Store back the current PC to the lightrec_state structure */
1217 jit_stxi_i(lightrec_offset(curr_pc), LIGHTREC_REG_STATE, JIT_V0);
1218
d16005f8 1219 jit_retr(LIGHTREC_REG_CYCLE);
8afce295
PC		 1220
1221 if (OPT_REPLACE_MEMSET) {
1222 /* Blocks will jump here when they need to call
1223 * lightrec_memset() */
1224 addr3 = jit_indirect();
1225
1226 jit_movr(JIT_V1, LIGHTREC_REG_CYCLE);
1227
1228 jit_prepare();
1229 jit_pushargr(LIGHTREC_REG_STATE);
1230
1231 jit_finishi(lightrec_memset);
1232 jit_retval(LIGHTREC_REG_CYCLE);
1233
1234 jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, lightrec_offset(regs.gpr[31]));
1235
1236 jit_subr(LIGHTREC_REG_CYCLE, JIT_V1, LIGHTREC_REG_CYCLE);
1237
1238 jit_patch_at(jit_b(), loop2);
1239 }
1240
1241 if (OPT_DETECT_IMPOSSIBLE_BRANCHES) {
1242 /* Blocks will jump here when they reach a branch that should
1243 * be executed with the interpreter, passing the branch's PC
1244 * in JIT_V0 and the address of the block in JIT_V1. */
1245 addr4 = jit_indirect();
1246
1247 sync_next_pc(_jit);
1248 update_cycle_counter_before_c(_jit);
1249
1250 jit_prepare();
1251 jit_pushargr(LIGHTREC_REG_STATE);
1252 jit_pushargr(JIT_V1);
1253 jit_pushargr(JIT_V0);
1254 jit_finishi(lightrec_emulate_block);
1255
1256 jit_retval(JIT_V0);
1257
1258 update_cycle_counter_after_c(_jit);
1259
1260 jit_patch_at(jit_b(), loop2);
1261
1262 }
1263
1264 if (OPT_HANDLE_LOAD_DELAYS) {
1265 /* Blocks will jump here when they reach a branch with a load
1266 * opcode in its delay slot. The delay slot has already been
1267 * executed; the load value is in (state->temp_reg), and the
1268 * register number is in JIT_V1.
1269 * Jump to a C function which will evaluate the branch target's
1270 * first opcode, to make sure that it does not read the register
1271 * in question; and if it does, handle it accordingly. */
1272 addr5 = jit_indirect();
1273
1274 sync_next_pc(_jit);
1275 update_cycle_counter_before_c(_jit);
1276
1277 jit_prepare();
1278 jit_pushargr(LIGHTREC_REG_STATE);
1279 jit_pushargr(JIT_V0);
1280 jit_pushargr(JIT_V1);
1281 jit_finishi(lightrec_check_load_delay);
1282
1283 jit_retval(JIT_V0);
1284
1285 update_cycle_counter_after_c(_jit);
1286
1287 jit_patch_at(jit_b(), loop2);
1288 }
1289
d16005f8
PC		 1290 jit_epilog();
1291
d16005f8 1292 block->_jit = _jit;
d16005f8 1293 block->opcode_list = NULL;
ba3814c1 1294 block->flags = BLOCK_NO_OPCODE_LIST;
d16005f8
PC		 1295 block->nb_ops = 0;
1296
d8b04acd 1297 block->function = lightrec_emit_code(state, block, _jit,
02487de7
PC		 1298 &block->code_size);
1299 if (!block->function)
878e6cda 1300 goto err_free_jit;
d16005f8
PC		 1301
1302 state->eob_wrapper_func = jit_address(addr2);
cb72ea13
PC		 1303 if (OPT_DETECT_IMPOSSIBLE_BRANCHES)
1304 state->interpreter_func = jit_address(addr4);
1305 if (OPT_HANDLE_LOAD_DELAYS)
1306 state->ds_check_func = jit_address(addr5);
98fa08a5
PC		 1307 if (OPT_REPLACE_MEMSET)
1308 state->memset_func = jit_address(addr3);
d16005f8
PC		 1309 state->get_next_block = jit_address(addr);
1310
1311 if (ENABLE_DISASSEMBLER) {
1312 pr_debug("Dispatcher block:\n");
1313 jit_disassemble();
1314 }
1315
1316 /* We're done! */
1317 jit_clear_state();
1318 return block;
1319
878e6cda
PC		 1320err_free_jit:
1321 jit_destroy_state();
d16005f8
PC		 1322err_free_block:
1323 lightrec_free(state, MEM_FOR_IR, sizeof(*block), block);
1324err_no_mem:
1325 pr_err("Unable to compile dispatcher: Out of memory\n");
1326 return NULL;
1327}
1328
1329union code lightrec_read_opcode(struct lightrec_state *state, u32 pc)
1330{
fd58fa32 1331 void *host = NULL;
d16005f8 1332
98fa08a5 1333 lightrec_get_map(state, &host, kunseg(pc));
d16005f8 1334
98fa08a5 1335 const u32 *code = (u32 *)host;
02487de7 1336 return (union code) LE32TOH(*code);
98fa08a5 1337}
d16005f8 1338
684432ad
PC		 1339unsigned int lightrec_cycles_of_opcode(const struct lightrec_state *state,
1340 union code code)
98fa08a5 1341{
684432ad 1342 return state->cycles_per_op;
98fa08a5 1343}
d16005f8 1344
ba3814c1 1345void lightrec_free_opcode_list(struct lightrec_state *state, struct opcode *ops)
98fa08a5 1346{
ba3814c1
PC		 1347 struct opcode_list *list = container_of(ops, struct opcode_list, ops);
1348
98fa08a5 1349 lightrec_free(state, MEM_FOR_IR,
ba3814c1
PC		 1350 sizeof(*list) + list->nb_ops * sizeof(struct opcode),
1351 list);
98fa08a5
PC		 1352}
1353
1354static unsigned int lightrec_get_mips_block_len(const u32 *src)
1355{
1356 unsigned int i;
1357 union code c;
1358
1359 for (i = 1; ; i++) {
1360 c.opcode = LE32TOH(*src++);
1361
1362 if (is_syscall(c))
1363 return i;
1364
1365 if (is_unconditional_jump(c))
1366 return i + 1;
1367 }
1368}
1369
1370static struct opcode * lightrec_disassemble(struct lightrec_state *state,
1371 const u32 *src, unsigned int *len)
1372{
ba3814c1 1373 struct opcode_list *list;
98fa08a5
PC		 1374 unsigned int i, length;
1375
1376 length = lightrec_get_mips_block_len(src);
1377
ba3814c1
PC		 1378 list = lightrec_malloc(state, MEM_FOR_IR,
1379 sizeof(*list) + sizeof(struct opcode) * length);
98fa08a5
PC		 1380 if (!list) {
1381 pr_err("Unable to allocate memory\n");
1382 return NULL;
1383 }
1384
ba3814c1
PC		 1385 list->nb_ops = (u16) length;
1386
98fa08a5 1387 for (i = 0; i < length; i++) {
ba3814c1
PC		 1388 list->ops[i].opcode = LE32TOH(src[i]);
1389 list->ops[i].flags = 0;
98fa08a5
PC		 1390 }
1391
1392 *len = length * sizeof(u32);
1393
ba3814c1 1394 return list->ops;
d16005f8
PC		 1395}
1396
1397static struct block * lightrec_precompile_block(struct lightrec_state *state,
1398 u32 pc)
1399{
1400 struct opcode *list;
1401 struct block *block;
ba3814c1 1402 void *host, *addr;
98fa08a5
PC		 1403 const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg(pc));
1404 const u32 *code = (u32 *) host;
d16005f8 1405 unsigned int length;
98fa08a5 1406 bool fully_tagged;
ba3814c1 1407 u8 block_flags = 0;
d16005f8
PC		 1408
1409 if (!map)
1410 return NULL;
1411
d16005f8
PC		 1412 block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block));
1413 if (!block) {
1414 pr_err("Unable to recompile block: Out of memory\n");
1415 return NULL;
1416 }
1417
1418 list = lightrec_disassemble(state, code, &length);
1419 if (!list) {
1420 lightrec_free(state, MEM_FOR_IR, sizeof(*block), block);
1421 return NULL;
1422 }
1423
1424 block->pc = pc;
d16005f8
PC		 1425 block->_jit = NULL;
1426 block->function = NULL;
1427 block->opcode_list = list;
98fa08a5 1428 block->code = code;
d16005f8
PC		 1429 block->next = NULL;
1430 block->flags = 0;
1431 block->code_size = 0;
d8b04acd 1432 block->precompile_date = state->current_cycle;
d16005f8
PC		 1433 block->nb_ops = length / sizeof(u32);
1434
98fa08a5 1435 lightrec_optimize(state, block);
d16005f8
PC		 1436
1437 length = block->nb_ops * sizeof(u32);
1438
1439 lightrec_register(MEM_FOR_MIPS_CODE, length);
1440
1441 if (ENABLE_DISASSEMBLER) {
8afce295 1442 pr_debug("Disassembled block at "PC_FMT"\n", block->pc);
98fa08a5 1443 lightrec_print_disassembly(block, code);
d16005f8
PC		 1444 }
1445
98fa08a5 1446 pr_debug("Block size: %hu opcodes\n", block->nb_ops);
d16005f8 1447
98fa08a5
PC		 1448 fully_tagged = lightrec_block_is_fully_tagged(block);
1449 if (fully_tagged)
ba3814c1 1450 block_flags |= BLOCK_FULLY_TAGGED;
98fa08a5 1451
ba3814c1
PC		 1452 if (block_flags)
1453 block_set_flags(block, block_flags);
98fa08a5 1454
d16005f8
PC		 1455 block->hash = lightrec_calculate_block_hash(block);
1456
ba3814c1
PC		 1457 if (OPT_REPLACE_MEMSET && block_has_flag(block, BLOCK_IS_MEMSET))
1458 addr = state->memset_func;
1459 else
1460 addr = state->get_next_block;
1461 lut_write(state, lut_offset(pc), addr);
1462
cb72ea13 1463 pr_debug("Blocks created: %u\n", ++state->nb_precompile);
a59e5536 1464
d16005f8
PC		 1465 return block;
1466}
1467
98fa08a5 1468static bool lightrec_block_is_fully_tagged(const struct block *block)
d16005f8 1469{
98fa08a5
PC		 1470 const struct opcode *op;
1471 unsigned int i;
1472
1473 for (i = 0; i < block->nb_ops; i++) {
1474 op = &block->opcode_list[i];
d16005f8 1475
cb72ea13
PC		 1476 /* If we have one branch that must be emulated, we cannot trash
1477 * the opcode list. */
1478 if (should_emulate(op))
1479 return false;
1480
1481 /* Check all loads/stores of the opcode list and mark the
d16005f8
PC		 1482 * block as fully compiled if they all have been tagged. */
1483 switch (op->c.i.op) {
1484 case OP_LB:
1485 case OP_LH:
1486 case OP_LWL:
1487 case OP_LW:
1488 case OP_LBU:
1489 case OP_LHU:
1490 case OP_LWR:
1491 case OP_SB:
1492 case OP_SH:
1493 case OP_SWL:
1494 case OP_SW:
1495 case OP_SWR:
1496 case OP_LWC2:
1497 case OP_SWC2:
5459088b
PC		 1498 case OP_META_LWU:
1499 case OP_META_SWU:
22eee2ac 1500 if (!LIGHTREC_FLAGS_GET_IO_MODE(op->flags))
d16005f8 1501 return false;
d8b04acd
PC		 1502 fallthrough;
1503 default:
d16005f8
PC		 1504 continue;
1505 }
1506 }
1507
1508 return true;
1509}
1510
98fa08a5 1511static void lightrec_reap_block(struct lightrec_state *state, void *data)
a59e5536 1512{
1513 struct block *block = data;
1514
f5ee77ca 1515 pr_debug("Reap dead block at "PC_FMT"\n", block->pc);
98fa08a5
PC		 1516 lightrec_unregister_block(state->block_cache, block);
1517 lightrec_free_block(state, block);
a59e5536 1518}
1519
98fa08a5 1520static void lightrec_reap_jit(struct lightrec_state *state, void *data)
a59e5536 1521{
1522 _jit_destroy_state(data);
1523}
1524
02487de7
PC		 1525static void lightrec_free_function(struct lightrec_state *state, void *fn)
1526{
1527 if (ENABLE_CODE_BUFFER && state->tlsf) {
1528 pr_debug("Freeing code block at 0x%" PRIxPTR "\n", (uintptr_t) fn);
d8b04acd 1529 lightrec_free_code(state, fn);
02487de7
PC		 1530 }
1531}
1532
1533static void lightrec_reap_function(struct lightrec_state *state, void *data)
1534{
1535 lightrec_free_function(state, data);
1536}
1537
ba3814c1
PC		 1538static void lightrec_reap_opcode_list(struct lightrec_state *state, void *data)
1539{
1540 lightrec_free_opcode_list(state, data);
1541}
1542
98fa08a5
PC		 1543int lightrec_compile_block(struct lightrec_cstate *cstate,
1544 struct block *block)
d16005f8 1545{
a5a6f7b8 1546 struct block *dead_blocks[ARRAY_SIZE(cstate->targets)];
564156dc 1547 u32 was_dead[ARRAY_SIZE(cstate->targets) / 8];
98fa08a5 1548 struct lightrec_state *state = cstate->state;
a59e5536 1549 struct lightrec_branch_target *target;
ba3814c1 1550 bool fully_tagged = false;
a59e5536 1551 struct block *block2;
d16005f8 1552 struct opcode *elm;
a59e5536 1553 jit_state_t *_jit, *oldjit;
d16005f8
PC		 1554 jit_node_t *start_of_block;
1555 bool skip_next = false;
d8b04acd 1556 void *old_fn, *new_fn;
ba3814c1 1557 size_t old_code_size;
d16005f8 1558 unsigned int i, j;
ba3814c1 1559 u8 old_flags;
98fa08a5 1560 u32 offset;
d16005f8
PC		 1561
1562 fully_tagged = lightrec_block_is_fully_tagged(block);
1563 if (fully_tagged)
ba3814c1 1564 block_set_flags(block, BLOCK_FULLY_TAGGED);
d16005f8
PC		 1565
1566 _jit = jit_new_state();
1567 if (!_jit)
1568 return -ENOMEM;
1569
a59e5536 1570 oldjit = block->_jit;
02487de7 1571 old_fn = block->function;
ba3814c1 1572 old_code_size = block->code_size;
d16005f8
PC		 1573 block->_jit = _jit;
1574
98fa08a5 1575 lightrec_regcache_reset(cstate->reg_cache);
684432ad
PC		 1576
1577 if (OPT_PRELOAD_PC && (block->flags & BLOCK_PRELOAD_PC))
1578 lightrec_preload_pc(cstate->reg_cache, _jit);
9259d748 1579
3107c849
PC		 1580 if (!arch_has_fast_mask())
1581 lightrec_preload_imm(cstate->reg_cache, _jit, JIT_R1, 0x1fffffff);
1582
98fa08a5 1583 cstate->cycles = 0;
98fa08a5
PC		 1584 cstate->nb_local_branches = 0;
1585 cstate->nb_targets = 0;
cb72ea13 1586 cstate->no_load_delay = false;
d16005f8
PC		 1587
1588 jit_prolog();
1589 jit_tramp(256);
1590
1591 start_of_block = jit_label();
1592
98fa08a5
PC		 1593 for (i = 0; i < block->nb_ops; i++) {
1594 elm = &block->opcode_list[i];
d16005f8
PC		 1595
1596 if (skip_next) {
1597 skip_next = false;
1598 continue;
1599 }
1600
98fa08a5 1601 if (should_emulate(elm)) {
d16005f8 1602 pr_debug("Branch at offset 0x%x will be emulated\n",
98fa08a5
PC		 1603 i << 2);
1604
cb72ea13 1605 lightrec_emit_jump_to_interpreter(cstate, block, i);
03535202 1606 skip_next = !op_flag_no_ds(elm->flags);
98fa08a5
PC		 1607 } else {
1608 lightrec_rec_opcode(cstate, block, i);
03535202 1609 skip_next = !op_flag_no_ds(elm->flags) && has_delay_slot(elm->c);
d16005f8
PC		 1610#if _WIN32
1611 /* FIXME: GNU Lightning on Windows seems to use our
1612 * mapped registers as temporaries. Until the actual bug
1613 * is found and fixed, unconditionally mark our
1614 * registers as live here. */
98fa08a5 1615 lightrec_regcache_mark_live(cstate->reg_cache, _jit);
d16005f8
PC		 1616#endif
1617 }
03535202 1618
684432ad 1619 cstate->cycles += lightrec_cycles_of_opcode(state, elm->c);
d16005f8
PC		 1620 }
1621
98fa08a5
PC		 1622 for (i = 0; i < cstate->nb_local_branches; i++) {
1623 struct lightrec_branch *branch = &cstate->local_branches[i];
d16005f8 1624
5eecf06d 1625 pr_debug("Patch local branch to offset 0x%"PRIx32"\n",
d16005f8
PC		 1626 branch->target << 2);
1627
1628 if (branch->target == 0) {
1629 jit_patch_at(branch->branch, start_of_block);
1630 continue;
1631 }
1632
98fa08a5
PC		 1633 for (j = 0; j < cstate->nb_targets; j++) {
1634 if (cstate->targets[j].offset == branch->target) {
d16005f8 1635 jit_patch_at(branch->branch,
98fa08a5 1636 cstate->targets[j].label);
d16005f8
PC		 1637 break;
1638 }
1639 }
1640
98fa08a5 1641 if (j == cstate->nb_targets)
d16005f8
PC		 1642 pr_err("Unable to find branch target\n");
1643 }
1644
d16005f8
PC		 1645 jit_ret();
1646 jit_epilog();
1647
d8b04acd
PC		 1648 new_fn = lightrec_emit_code(state, block, _jit, &block->code_size);
1649 if (!new_fn) {
1650 if (!ENABLE_THREADED_COMPILER)
1651 pr_err("Unable to compile block!\n");
1652 block->_jit = oldjit;
ba3814c1 1653 jit_clear_state();
d8b04acd
PC		 1654 _jit_destroy_state(_jit);
1655 return -ENOMEM;
02487de7
PC		 1656 }
1657
ba3814c1
PC		 1658 /* Pause the reaper, because lightrec_reset_lut_offset() may try to set
1659 * the old block->function pointer to the code LUT. */
1660 if (ENABLE_THREADED_COMPILER)
1661 lightrec_reaper_pause(state->reaper);
1662
d8b04acd 1663 block->function = new_fn;
ba3814c1 1664 block_clear_flags(block, BLOCK_SHOULD_RECOMPILE);
d16005f8
PC		 1665
1666 /* Add compiled function to the LUT */
02487de7 1667 lut_write(state, lut_offset(block->pc), block->function);
d16005f8 1668
a59e5536 1669 /* Detect old blocks that have been covered by the new one */
564156dc 1670 for (i = 0; ENABLE_THREADED_COMPILER && i < cstate->nb_targets; i++) {
98fa08a5 1671 target = &cstate->targets[i];
a59e5536 1672
1673 if (!target->offset)
1674 continue;
1675
1676 offset = block->pc + target->offset * sizeof(u32);
ba3814c1 1677
a59e5536 1678 block2 = lightrec_find_block(state->block_cache, offset);
1679 if (block2) {
1680 /* No need to check if block2 is compilable - it must
1681 * be, otherwise block wouldn't be compilable either */
1682
98fa08a5
PC		 1683 /* Set the "block dead" flag to prevent the dynarec from
1684 * recompiling this block */
ba3814c1 1685 old_flags = block_set_flags(block2, BLOCK_IS_DEAD);
564156dc
PC		 1686
1687 if (old_flags & BLOCK_IS_DEAD)
1688 was_dead[i / 32] |= BIT(i % 32);
1689 else
1690 was_dead[i / 32] &= ~BIT(i % 32);
ba3814c1
PC		 1691 }
1692
a5a6f7b8
PC		 1693 dead_blocks[i] = block2;
1694
564156dc
PC		 1695 /* If block2 was pending for compilation, cancel it.
1696 * If it's being compiled right now, wait until it finishes. */
1697 if (block2)
1698 lightrec_recompiler_remove(state->rec, block2);
1699 }
a59e5536 1700
564156dc
PC		 1701 for (i = 0; i < cstate->nb_targets; i++) {
1702 target = &cstate->targets[i];
1703
1704 if (!target->offset)
1705 continue;
98fa08a5 1706
fd58fa32
PC		 1707 /* We know from now on that block2 (if present) isn't going to
1708 * be compiled. We can override the LUT entry with our new
1709 * block's entry point. */
1710 offset = lut_offset(block->pc) + target->offset;
02487de7 1711 lut_write(state, offset, jit_address(target->label));
98fa08a5 1712
a5a6f7b8
PC		 1713 if (ENABLE_THREADED_COMPILER) {
1714 block2 = dead_blocks[i];
1715 } else {
1716 offset = block->pc + target->offset * sizeof(u32);
1717 block2 = lightrec_find_block(state->block_cache, offset);
1718 }
fd58fa32 1719 if (block2) {
8afce295
PC		 1720 pr_debug("Reap block "X32_FMT" as it's covered by block "
1721 X32_FMT"\n", block2->pc, block->pc);
a59e5536 1722
98fa08a5 1723 /* Finally, reap the block. */
ba3814c1
PC		 1724 if (!ENABLE_THREADED_COMPILER) {
1725 lightrec_unregister_block(state->block_cache, block2);
1726 lightrec_free_block(state, block2);
564156dc 1727 } else if (!(was_dead[i / 32] & BIT(i % 32))) {
a59e5536 1728 lightrec_reaper_add(state->reaper,
1729 lightrec_reap_block,
1730 block2);
a59e5536 1731 }
1732 }
1733 }
1734
564156dc
PC		 1735 if (ENABLE_THREADED_COMPILER)
1736 lightrec_reaper_continue(state->reaper);
1737
d16005f8 1738 if (ENABLE_DISASSEMBLER) {
8afce295 1739 pr_debug("Compiling block at "PC_FMT"\n", block->pc);
d16005f8
PC		 1740 jit_disassemble();
1741 }
1742
1743 jit_clear_state();
1744
d16005f8 1745 if (fully_tagged)
ba3814c1
PC		 1746 old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST);
1747
1748 if (fully_tagged && !(old_flags & BLOCK_NO_OPCODE_LIST)) {
f5ee77ca 1749 pr_debug("Block "PC_FMT" is fully tagged"
d16005f8 1750 " - free opcode list\n", block->pc);
ba3814c1
PC		 1751
1752 if (ENABLE_THREADED_COMPILER) {
1753 lightrec_reaper_add(state->reaper,
1754 lightrec_reap_opcode_list,
1755 block->opcode_list);
1756 } else {
1757 lightrec_free_opcode_list(state, block->opcode_list);
1758 }
d16005f8
PC		 1759 }
1760
a59e5536 1761 if (oldjit) {
8afce295 1762 pr_debug("Block "X32_FMT" recompiled, reaping old jit context.\n",
a59e5536 1763 block->pc);
1764
02487de7 1765 if (ENABLE_THREADED_COMPILER) {
a59e5536 1766 lightrec_reaper_add(state->reaper,
1767 lightrec_reap_jit, oldjit);
02487de7
PC		 1768 lightrec_reaper_add(state->reaper,
1769 lightrec_reap_function, old_fn);
1770 } else {
a59e5536 1771 _jit_destroy_state(oldjit);
02487de7
PC		 1772 lightrec_free_function(state, old_fn);
1773 }
ba3814c1
PC		 1774
1775 lightrec_unregister(MEM_FOR_CODE, old_code_size);
a59e5536 1776 }
1777
cb72ea13
PC		 1778 pr_debug("Blocks compiled: %u\n", ++state->nb_compile);
1779
d16005f8
PC		 1780 return 0;
1781}
1782
98fa08a5
PC		 1783static void lightrec_print_info(struct lightrec_state *state)
1784{
1785 if ((state->current_cycle & ~0xfffffff) != state->old_cycle_counter) {
1786 pr_info("Lightrec RAM usage: IR %u KiB, CODE %u KiB, "
1787 "MIPS %u KiB, TOTAL %u KiB, avg. IPI %f\n",
1788 lightrec_get_mem_usage(MEM_FOR_IR) / 1024,
1789 lightrec_get_mem_usage(MEM_FOR_CODE) / 1024,
1790 lightrec_get_mem_usage(MEM_FOR_MIPS_CODE) / 1024,
1791 lightrec_get_total_mem_usage() / 1024,
1792 lightrec_get_average_ipi());
1793 state->old_cycle_counter = state->current_cycle & ~0xfffffff;
1794 }
1795}
1796
d16005f8
PC		 1797u32 lightrec_execute(struct lightrec_state *state, u32 pc, u32 target_cycle)
1798{
9259d748 1799 s32 (*func)(struct lightrec_state *, u32, void *, s32) = (void *)state->dispatcher->function;
d16005f8
PC		 1800 void *block_trace;
1801 s32 cycles_delta;
1802
1803 state->exit_flags = LIGHTREC_EXIT_NORMAL;
1804
1805 /* Handle the cycle counter overflowing */
1806 if (unlikely(target_cycle < state->current_cycle))
1807 target_cycle = UINT_MAX;
1808
1809 state->target_cycle = target_cycle;
0e720fb1 1810 state->curr_pc = pc;
d16005f8
PC		 1811
1812 block_trace = get_next_block_func(state, pc);
1813 if (block_trace) {
1814 cycles_delta = state->target_cycle - state->current_cycle;
1815
0e720fb1 1816 cycles_delta = (*func)(state, state->curr_pc,
9259d748 1817 block_trace, cycles_delta);
d16005f8
PC		 1818
1819 state->current_cycle = state->target_cycle - cycles_delta;
1820 }
1821
a59e5536 1822 if (ENABLE_THREADED_COMPILER)
1823 lightrec_reaper_reap(state->reaper);
1824
98fa08a5
PC		 1825 if (LOG_LEVEL >= INFO_L)
1826 lightrec_print_info(state);
1827
0e720fb1 1828 return state->curr_pc;
d16005f8
PC		 1829}
1830
ba3814c1
PC		 1831u32 lightrec_run_interpreter(struct lightrec_state *state, u32 pc,
1832 u32 target_cycle)
d16005f8 1833{
ba3814c1 1834 struct block *block;
d16005f8
PC		 1835
1836 state->exit_flags = LIGHTREC_EXIT_NORMAL;
ba3814c1
PC		 1837 state->target_cycle = target_cycle;
1838
1839 do {
1840 block = lightrec_get_block(state, pc);
1841 if (!block)
1842 break;
1843
1844 pc = lightrec_emulate_block(state, block, pc);
d16005f8 1845
ba3814c1
PC		 1846 if (ENABLE_THREADED_COMPILER)
1847 lightrec_reaper_reap(state->reaper);
1848 } while (state->current_cycle < state->target_cycle);
98fa08a5
PC		 1849
1850 if (LOG_LEVEL >= INFO_L)
1851 lightrec_print_info(state);
1852
1853 return pc;
d16005f8
PC		 1854}
1855
98fa08a5 1856void lightrec_free_block(struct lightrec_state *state, struct block *block)
d16005f8 1857{
ba3814c1
PC		 1858 u8 old_flags;
1859
d16005f8 1860 lightrec_unregister(MEM_FOR_MIPS_CODE, block->nb_ops * sizeof(u32));
ba3814c1
PC		 1861 old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST);
1862
1863 if (!(old_flags & BLOCK_NO_OPCODE_LIST))
1864 lightrec_free_opcode_list(state, block->opcode_list);
d16005f8
PC		 1865 if (block->_jit)
1866 _jit_destroy_state(block->_jit);
d8b04acd
PC		 1867 if (block->function) {
1868 lightrec_free_function(state, block->function);
1869 lightrec_unregister(MEM_FOR_CODE, block->code_size);
1870 }
98fa08a5
PC		 1871 lightrec_free(state, MEM_FOR_IR, sizeof(*block), block);
1872}
1873
1874struct lightrec_cstate * lightrec_create_cstate(struct lightrec_state *state)
1875{
1876 struct lightrec_cstate *cstate;
1877
1878 cstate = lightrec_malloc(state, MEM_FOR_LIGHTREC, sizeof(*cstate));
1879 if (!cstate)
1880 return NULL;
1881
1882 cstate->reg_cache = lightrec_regcache_init(state);
1883 if (!cstate->reg_cache) {
1884 lightrec_free(state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate);
1885 return NULL;
1886 }
1887
1888 cstate->state = state;
1889
1890 return cstate;
1891}
1892
1893void lightrec_free_cstate(struct lightrec_cstate *cstate)
1894{
1895 lightrec_free_regcache(cstate->reg_cache);
1896 lightrec_free(cstate->state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate);
d16005f8
PC		 1897}
1898
1899struct lightrec_state * lightrec_init(char *argv0,
878e6cda 1900 const struct lightrec_mem_map *maps,
d16005f8
PC		 1901 size_t nb,
1902 const struct lightrec_ops *ops)
1903{
878e6cda
PC		 1904 const struct lightrec_mem_map *codebuf_map = &maps[PSX_MAP_CODE_BUFFER];
1905 const struct lightrec_mem_map *map;
d16005f8 1906 struct lightrec_state *state;
02487de7
PC		 1907 uintptr_t addr;
1908 void *tlsf = NULL;
1909 bool with_32bit_lut = false;
1910 size_t lut_size;
d16005f8
PC		 1911
1912 /* Sanity-check ops */
98fa08a5 1913 if (!ops || !ops->cop2_op || !ops->enable_ram) {
d16005f8
PC		 1914 pr_err("Missing callbacks in lightrec_ops structure\n");
1915 return NULL;
1916 }
1917
fdf33147
PC		 1918 if (ops->cop2_notify)
1919 pr_debug("Optional cop2_notify callback in lightrec_ops\n");
1920 else
1921 pr_debug("No optional cop2_notify callback in lightrec_ops\n");
1922
d8b04acd
PC		 1923 if (ENABLE_CODE_BUFFER && nb > PSX_MAP_CODE_BUFFER
1924 && codebuf_map->address) {
02487de7
PC		 1925 tlsf = tlsf_create_with_pool(codebuf_map->address,
1926 codebuf_map->length);
1927 if (!tlsf) {
1928 pr_err("Unable to initialize code buffer\n");
1929 return NULL;
1930 }
1931
1932 if (__WORDSIZE == 64) {
1933 addr = (uintptr_t) codebuf_map->address + codebuf_map->length - 1;
1934 with_32bit_lut = addr == (u32) addr;
1935 }
1936 }
1937
1938 if (with_32bit_lut)
1939 lut_size = CODE_LUT_SIZE * 4;
1940 else
1941 lut_size = CODE_LUT_SIZE * sizeof(void *);
1942
fb67ea33 1943 init_jit_with_debug(argv0, stdout);
d16005f8 1944
02487de7 1945 state = calloc(1, sizeof(*state) + lut_size);
d16005f8
PC		 1946 if (!state)
1947 goto err_finish_jit;
1948
02487de7
PC		 1949 lightrec_register(MEM_FOR_LIGHTREC, sizeof(*state) + lut_size);
1950
1951 state->tlsf = tlsf;
1952 state->with_32bit_lut = with_32bit_lut;
cb72ea13 1953 state->in_delay_slot_n = 0xff;
684432ad 1954 state->cycles_per_op = 2;
d16005f8 1955
d16005f8
PC		 1956 state->block_cache = lightrec_blockcache_init(state);
1957 if (!state->block_cache)
d8b04acd 1958 goto err_free_state;
d16005f8 1959
d16005f8
PC		 1960 if (ENABLE_THREADED_COMPILER) {
1961 state->rec = lightrec_recompiler_init(state);
1962 if (!state->rec)
98fa08a5 1963 goto err_free_block_cache;
a59e5536 1964
1965 state->reaper = lightrec_reaper_init(state);
1966 if (!state->reaper)
1967 goto err_free_recompiler;
98fa08a5
PC		 1968 } else {
1969 state->cstate = lightrec_create_cstate(state);
1970 if (!state->cstate)
1971 goto err_free_block_cache;
d16005f8
PC		 1972 }
1973
1974 state->nb_maps = nb;
878e6cda 1975 state->maps = maps;
d16005f8
PC		 1976
1977 memcpy(&state->ops, ops, sizeof(*ops));
1978
1979 state->dispatcher = generate_dispatcher(state);
1980 if (!state->dispatcher)
a59e5536 1981 goto err_free_reaper;
d16005f8 1982
98fa08a5
PC		 1983 state->c_wrapper_block = generate_wrapper(state);
1984 if (!state->c_wrapper_block)
d16005f8
PC		 1985 goto err_free_dispatcher;
1986
98fa08a5
PC		 1987 state->c_wrappers[C_WRAPPER_RW] = lightrec_rw_cb;
1988 state->c_wrappers[C_WRAPPER_RW_GENERIC] = lightrec_rw_generic_cb;
fdf33147 1989 state->c_wrappers[C_WRAPPER_MFC] = lightrec_mfc_cb;
98fa08a5 1990 state->c_wrappers[C_WRAPPER_MTC] = lightrec_mtc_cb;
22eee2ac 1991 state->c_wrappers[C_WRAPPER_CP] = lightrec_cp_cb;
d16005f8 1992
878e6cda 1993 map = &maps[PSX_MAP_BIOS];
d16005f8
PC		 1994 state->offset_bios = (uintptr_t)map->address - map->pc;
1995
878e6cda 1996 map = &maps[PSX_MAP_SCRATCH_PAD];
d16005f8
PC		 1997 state->offset_scratch = (uintptr_t)map->address - map->pc;
1998
878e6cda 1999 map = &maps[PSX_MAP_HW_REGISTERS];
ba3814c1
PC		 2000 state->offset_io = (uintptr_t)map->address - map->pc;
2001
878e6cda 2002 map = &maps[PSX_MAP_KERNEL_USER_RAM];
d16005f8
PC		 2003 state->offset_ram = (uintptr_t)map->address - map->pc;
2004
878e6cda
PC		 2005 if (maps[PSX_MAP_MIRROR1].address == map->address + 0x200000 &&
2006 maps[PSX_MAP_MIRROR2].address == map->address + 0x400000 &&
2007 maps[PSX_MAP_MIRROR3].address == map->address + 0x600000)
d16005f8
PC		 2008 state->mirrors_mapped = true;
2009
98fa08a5
PC		 2010 if (state->offset_bios == 0 &&
2011 state->offset_scratch == 0 &&
2012 state->offset_ram == 0 &&
ba3814c1 2013 state->offset_io == 0 &&
98fa08a5
PC		 2014 state->mirrors_mapped) {
2015 pr_info("Memory map is perfect. Emitted code will be best.\n");
2016 } else {
2017 pr_info("Memory map is sub-par. Emitted code will be slow.\n");
2018 }
2019
02487de7
PC		 2020 if (state->with_32bit_lut)
2021 pr_info("Using 32-bit LUT\n");
2022
d16005f8
PC		 2023 return state;
2024
d16005f8 2025err_free_dispatcher:
98fa08a5 2026 lightrec_free_block(state, state->dispatcher);
a59e5536 2027err_free_reaper:
2028 if (ENABLE_THREADED_COMPILER)
2029 lightrec_reaper_destroy(state->reaper);
d16005f8
PC		 2030err_free_recompiler:
2031 if (ENABLE_THREADED_COMPILER)
2032 lightrec_free_recompiler(state->rec);
98fa08a5
PC		 2033 else
2034 lightrec_free_cstate(state->cstate);
d16005f8
PC		 2035err_free_block_cache:
2036 lightrec_free_block_cache(state->block_cache);
d16005f8 2037err_free_state:
d16005f8 2038 lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) +
02487de7 2039 lut_elm_size(state) * CODE_LUT_SIZE);
d16005f8
PC		 2040 free(state);
2041err_finish_jit:
2042 finish_jit();
02487de7
PC		 2043 if (ENABLE_CODE_BUFFER && tlsf)
2044 tlsf_destroy(tlsf);
d16005f8
PC		 2045 return NULL;
2046}
2047
2048void lightrec_destroy(struct lightrec_state *state)
2049{
98fa08a5
PC		 2050 /* Force a print info on destroy*/
2051 state->current_cycle = ~state->current_cycle;
2052 lightrec_print_info(state);
2053
03535202
PC		 2054 lightrec_free_block_cache(state->block_cache);
2055 lightrec_free_block(state, state->dispatcher);
2056 lightrec_free_block(state, state->c_wrapper_block);
2057
a59e5536 2058 if (ENABLE_THREADED_COMPILER) {
d16005f8 2059 lightrec_free_recompiler(state->rec);
a59e5536 2060 lightrec_reaper_destroy(state->reaper);
98fa08a5
PC		 2061 } else {
2062 lightrec_free_cstate(state->cstate);
a59e5536 2063 }
d16005f8 2064
d16005f8 2065 finish_jit();
02487de7
PC		 2066 if (ENABLE_CODE_BUFFER && state->tlsf)
2067 tlsf_destroy(state->tlsf);
d16005f8 2068
d16005f8 2069 lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) +
02487de7 2070 lut_elm_size(state) * CODE_LUT_SIZE);
d16005f8
PC		 2071 free(state);
2072}
2073
2074void lightrec_invalidate(struct lightrec_state *state, u32 addr, u32 len)
2075{
2076 u32 kaddr = kunseg(addr & ~0x3);
d8b04acd 2077 enum psx_map idx = lightrec_get_map_idx(state, kaddr);
d16005f8 2078
d8b04acd
PC		 2079 switch (idx) {
2080 case PSX_MAP_MIRROR1:
2081 case PSX_MAP_MIRROR2:
2082 case PSX_MAP_MIRROR3:
d16005f8 2083 /* Handle mirrors */
d8b04acd
PC		 2084 kaddr &= RAM_SIZE - 1;
2085 fallthrough;
2086 case PSX_MAP_KERNEL_USER_RAM:
2087 break;
2088 default:
2089 return;
d16005f8 2090 }
d8b04acd
PC		 2091
2092 memset(lut_address(state, lut_offset(kaddr)), 0,
2093 ((len + 3) / 4) * lut_elm_size(state));
d16005f8
PC		 2094}
2095
2096void lightrec_invalidate_all(struct lightrec_state *state)
2097{
02487de7 2098 memset(state->code_lut, 0, lut_elm_size(state) * CODE_LUT_SIZE);
d16005f8
PC		 2099}
2100
684432ad 2101void lightrec_set_unsafe_opt_flags(struct lightrec_state *state, u32 flags)
d16005f8 2102{
684432ad 2103 if ((flags ^ state->opt_flags) & LIGHTREC_OPT_INV_DMA_ONLY)
d16005f8
PC		 2104 lightrec_invalidate_all(state);
2105
684432ad 2106 state->opt_flags = flags;
d16005f8
PC		 2107}
2108
2109void lightrec_set_exit_flags(struct lightrec_state *state, u32 flags)
2110{
2111 if (flags != LIGHTREC_EXIT_NORMAL) {
2112 state->exit_flags |= flags;
2113 state->target_cycle = state->current_cycle;
2114 }
2115}
2116
2117u32 lightrec_exit_flags(struct lightrec_state *state)
2118{
2119 return state->exit_flags;
2120}
2121
d16005f8
PC		 2122u32 lightrec_current_cycle_count(const struct lightrec_state *state)
2123{
2124 return state->current_cycle;
2125}
2126
2127void lightrec_reset_cycle_count(struct lightrec_state *state, u32 cycles)
2128{
2129 state->current_cycle = cycles;
2130
2131 if (state->target_cycle < cycles)
2132 state->target_cycle = cycles;
2133}
2134
2135void lightrec_set_target_cycle_count(struct lightrec_state *state, u32 cycles)
2136{
2137 if (state->exit_flags == LIGHTREC_EXIT_NORMAL) {
2138 if (cycles < state->current_cycle)
2139 cycles = state->current_cycle;
2140
2141 state->target_cycle = cycles;
2142 }
2143}
98fa08a5
PC		 2144
2145struct lightrec_registers * lightrec_get_registers(struct lightrec_state *state)
2146{
2147 return &state->regs;
2148}
684432ad
PC		 2149
2150void lightrec_set_cycles_per_opcode(struct lightrec_state *state, u32 cycles)
2151{
878e6cda
PC		 2152 if (state->cycles_per_op == cycles)
2153 return;
2154
684432ad 2155 state->cycles_per_op = cycles;
878e6cda
PC		 2156
2157 if (ENABLE_THREADED_COMPILER) {
2158 lightrec_recompiler_pause(state->rec);
2159 lightrec_reaper_reap(state->reaper);
2160 }
2161
2162 lightrec_invalidate_all(state);
2163 lightrec_free_all_blocks(state->block_cache);
2164
2165 if (ENABLE_THREADED_COMPILER)
2166 lightrec_recompiler_unpause(state->rec);
684432ad 2167}
ARM optimized PCSX fork