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98fa08a5 | 1 | // SPDX-License-Identifier: LGPL-2.1-or-later |
d16005f8 | 2 | /* |
98fa08a5 | 3 | * Copyright (C) 2014-2021 Paul Cercueil <paul@crapouillou.net> |
d16005f8 PC |
4 | */ |
5 | ||
6 | #include "blockcache.h" | |
d16005f8 PC |
7 | #include "debug.h" |
8 | #include "disassembler.h" | |
9 | #include "emitter.h" | |
10 | #include "interpreter.h" | |
98fa08a5 PC |
11 | #include "lightrec-config.h" |
12 | #include "lightning-wrapper.h" | |
d16005f8 PC |
13 | #include "lightrec.h" |
14 | #include "memmanager.h" | |
a59e5536 | 15 | #include "reaper.h" |
d16005f8 PC |
16 | #include "recompiler.h" |
17 | #include "regcache.h" | |
18 | #include "optimizer.h" | |
02487de7 | 19 | #include "tlsf/tlsf.h" |
d16005f8 PC |
20 | |
21 | #include <errno.h> | |
98fa08a5 | 22 | #include <inttypes.h> |
d16005f8 PC |
23 | #include <limits.h> |
24 | #if ENABLE_THREADED_COMPILER | |
25 | #include <stdatomic.h> | |
26 | #endif | |
27 | #include <stdbool.h> | |
28 | #include <stddef.h> | |
29 | #include <string.h> | |
d16005f8 | 30 | |
d16005f8 PC |
31 | static struct block * lightrec_precompile_block(struct lightrec_state *state, |
32 | u32 pc); | |
98fa08a5 PC |
33 | static bool lightrec_block_is_fully_tagged(const struct block *block); |
34 | ||
35 | static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data); | |
36 | static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg); | |
d16005f8 | 37 | |
a59e5536 | 38 | static void lightrec_default_sb(struct lightrec_state *state, u32 opcode, |
39 | void *host, u32 addr, u8 data) | |
40 | { | |
41 | *(u8 *)host = data; | |
42 | ||
43 | if (!state->invalidate_from_dma_only) | |
44 | lightrec_invalidate(state, addr, 1); | |
45 | } | |
46 | ||
47 | static void lightrec_default_sh(struct lightrec_state *state, u32 opcode, | |
48 | void *host, u32 addr, u16 data) | |
49 | { | |
50 | *(u16 *)host = HTOLE16(data); | |
51 | ||
52 | if (!state->invalidate_from_dma_only) | |
53 | lightrec_invalidate(state, addr, 2); | |
54 | } | |
55 | ||
56 | static void lightrec_default_sw(struct lightrec_state *state, u32 opcode, | |
57 | void *host, u32 addr, u32 data) | |
58 | { | |
59 | *(u32 *)host = HTOLE32(data); | |
60 | ||
61 | if (!state->invalidate_from_dma_only) | |
62 | lightrec_invalidate(state, addr, 4); | |
63 | } | |
64 | ||
65 | static u8 lightrec_default_lb(struct lightrec_state *state, | |
66 | u32 opcode, void *host, u32 addr) | |
67 | { | |
68 | return *(u8 *)host; | |
69 | } | |
70 | ||
71 | static u16 lightrec_default_lh(struct lightrec_state *state, | |
72 | u32 opcode, void *host, u32 addr) | |
73 | { | |
74 | return LE16TOH(*(u16 *)host); | |
75 | } | |
76 | ||
77 | static u32 lightrec_default_lw(struct lightrec_state *state, | |
78 | u32 opcode, void *host, u32 addr) | |
79 | { | |
80 | return LE32TOH(*(u32 *)host); | |
81 | } | |
82 | ||
83 | static const struct lightrec_mem_map_ops lightrec_default_ops = { | |
84 | .sb = lightrec_default_sb, | |
85 | .sh = lightrec_default_sh, | |
86 | .sw = lightrec_default_sw, | |
87 | .lb = lightrec_default_lb, | |
88 | .lh = lightrec_default_lh, | |
89 | .lw = lightrec_default_lw, | |
90 | }; | |
91 | ||
98fa08a5 PC |
92 | static void __segfault_cb(struct lightrec_state *state, u32 addr, |
93 | const struct block *block) | |
d16005f8 PC |
94 | { |
95 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); | |
96 | pr_err("Segmentation fault in recompiled code: invalid " | |
97 | "load/store at address 0x%08x\n", addr); | |
98fa08a5 PC |
98 | if (block) |
99 | pr_err("Was executing block PC 0x%08x\n", block->pc); | |
d16005f8 PC |
100 | } |
101 | ||
a59e5536 | 102 | static void lightrec_swl(struct lightrec_state *state, |
103 | const struct lightrec_mem_map_ops *ops, | |
104 | u32 opcode, void *host, u32 addr, u32 data) | |
d16005f8 | 105 | { |
a59e5536 | 106 | unsigned int shift = addr & 0x3; |
13b02197 | 107 | unsigned int mask = shift < 3 ? GENMASK(31, (shift + 1) * 8) : 0; |
a59e5536 | 108 | u32 old_data; |
109 | ||
110 | /* Align to 32 bits */ | |
111 | addr &= ~3; | |
112 | host = (void *)((uintptr_t)host & ~3); | |
113 | ||
114 | old_data = ops->lw(state, opcode, host, addr); | |
115 | ||
116 | data = (data >> ((3 - shift) * 8)) | (old_data & mask); | |
117 | ||
118 | ops->sw(state, opcode, host, addr, data); | |
119 | } | |
120 | ||
121 | static void lightrec_swr(struct lightrec_state *state, | |
122 | const struct lightrec_mem_map_ops *ops, | |
123 | u32 opcode, void *host, u32 addr, u32 data) | |
124 | { | |
125 | unsigned int shift = addr & 0x3; | |
126 | unsigned int mask = (1 << (shift * 8)) - 1; | |
127 | u32 old_data; | |
128 | ||
129 | /* Align to 32 bits */ | |
130 | addr &= ~3; | |
131 | host = (void *)((uintptr_t)host & ~3); | |
132 | ||
133 | old_data = ops->lw(state, opcode, host, addr); | |
134 | ||
135 | data = (data << (shift * 8)) | (old_data & mask); | |
136 | ||
137 | ops->sw(state, opcode, host, addr, data); | |
138 | } | |
139 | ||
140 | static void lightrec_swc2(struct lightrec_state *state, union code op, | |
141 | const struct lightrec_mem_map_ops *ops, | |
142 | void *host, u32 addr) | |
143 | { | |
98fa08a5 | 144 | u32 data = lightrec_mfc2(state, op.i.rt); |
a59e5536 | 145 | |
146 | ops->sw(state, op.opcode, host, addr, data); | |
147 | } | |
148 | ||
149 | static u32 lightrec_lwl(struct lightrec_state *state, | |
150 | const struct lightrec_mem_map_ops *ops, | |
151 | u32 opcode, void *host, u32 addr, u32 data) | |
152 | { | |
153 | unsigned int shift = addr & 0x3; | |
154 | unsigned int mask = (1 << (24 - shift * 8)) - 1; | |
155 | u32 old_data; | |
156 | ||
157 | /* Align to 32 bits */ | |
158 | addr &= ~3; | |
159 | host = (void *)((uintptr_t)host & ~3); | |
160 | ||
161 | old_data = ops->lw(state, opcode, host, addr); | |
162 | ||
163 | return (data & mask) | (old_data << (24 - shift * 8)); | |
164 | } | |
165 | ||
166 | static u32 lightrec_lwr(struct lightrec_state *state, | |
167 | const struct lightrec_mem_map_ops *ops, | |
168 | u32 opcode, void *host, u32 addr, u32 data) | |
169 | { | |
170 | unsigned int shift = addr & 0x3; | |
13b02197 | 171 | unsigned int mask = shift ? GENMASK(31, 32 - shift * 8) : 0; |
a59e5536 | 172 | u32 old_data; |
173 | ||
174 | /* Align to 32 bits */ | |
175 | addr &= ~3; | |
176 | host = (void *)((uintptr_t)host & ~3); | |
177 | ||
178 | old_data = ops->lw(state, opcode, host, addr); | |
179 | ||
180 | return (data & mask) | (old_data >> (shift * 8)); | |
181 | } | |
182 | ||
183 | static void lightrec_lwc2(struct lightrec_state *state, union code op, | |
184 | const struct lightrec_mem_map_ops *ops, | |
185 | void *host, u32 addr) | |
186 | { | |
187 | u32 data = ops->lw(state, op.opcode, host, addr); | |
188 | ||
98fa08a5 | 189 | lightrec_mtc2(state, op.i.rt, data); |
d16005f8 PC |
190 | } |
191 | ||
192 | static void lightrec_invalidate_map(struct lightrec_state *state, | |
98fa08a5 | 193 | const struct lightrec_mem_map *map, u32 addr, u32 len) |
d16005f8 | 194 | { |
98fa08a5 | 195 | if (map == &state->maps[PSX_MAP_KERNEL_USER_RAM]) { |
02487de7 PC |
196 | memset(lut_address(state, lut_offset(addr)), 0, |
197 | ((len + 3) / 4) * lut_elm_size(state)); | |
98fa08a5 | 198 | } |
d16005f8 PC |
199 | } |
200 | ||
9259d748 | 201 | static enum psx_map |
02487de7 | 202 | lightrec_get_map_idx(struct lightrec_state *state, u32 kaddr) |
d16005f8 | 203 | { |
98fa08a5 | 204 | const struct lightrec_mem_map *map; |
d16005f8 PC |
205 | unsigned int i; |
206 | ||
207 | for (i = 0; i < state->nb_maps; i++) { | |
02487de7 | 208 | map = &state->maps[i]; |
d16005f8 | 209 | |
02487de7 PC |
210 | if (kaddr >= map->pc && kaddr < map->pc + map->length) |
211 | return (enum psx_map) i; | |
d16005f8 PC |
212 | } |
213 | ||
02487de7 PC |
214 | return PSX_MAP_UNKNOWN; |
215 | } | |
216 | ||
217 | const struct lightrec_mem_map * | |
218 | lightrec_get_map(struct lightrec_state *state, void **host, u32 kaddr) | |
219 | { | |
220 | const struct lightrec_mem_map *map; | |
221 | enum psx_map idx; | |
222 | u32 addr; | |
223 | ||
224 | idx = lightrec_get_map_idx(state, kaddr); | |
225 | if (idx == PSX_MAP_UNKNOWN) | |
98fa08a5 PC |
226 | return NULL; |
227 | ||
02487de7 | 228 | map = &state->maps[idx]; |
98fa08a5 PC |
229 | addr = kaddr - map->pc; |
230 | ||
231 | while (map->mirror_of) | |
232 | map = map->mirror_of; | |
233 | ||
234 | if (host) | |
235 | *host = map->address + addr; | |
236 | ||
237 | return map; | |
d16005f8 PC |
238 | } |
239 | ||
cb72ea13 PC |
240 | u32 lightrec_rw(struct lightrec_state *state, union code op, u32 base, |
241 | u32 data, u32 *flags, struct block *block, u16 offset) | |
d16005f8 PC |
242 | { |
243 | const struct lightrec_mem_map *map; | |
a59e5536 | 244 | const struct lightrec_mem_map_ops *ops; |
98fa08a5 | 245 | u32 opcode = op.opcode; |
cb72ea13 PC |
246 | bool was_tagged = true; |
247 | u16 old_flags; | |
248 | u32 addr; | |
a59e5536 | 249 | void *host; |
d16005f8 | 250 | |
cb72ea13 | 251 | addr = kunseg(base + (s16) op.i.imm); |
d16005f8 | 252 | |
cb72ea13 | 253 | map = lightrec_get_map(state, &host, addr); |
d16005f8 | 254 | if (!map) { |
98fa08a5 | 255 | __segfault_cb(state, addr, block); |
d16005f8 PC |
256 | return 0; |
257 | } | |
258 | ||
cb72ea13 PC |
259 | if (flags) |
260 | was_tagged = LIGHTREC_FLAGS_GET_IO_MODE(*flags); | |
d16005f8 | 261 | |
6ce0b00a | 262 | if (likely(!map->ops)) { |
cb72ea13 PC |
263 | if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags)) { |
264 | /* Force parallel port accesses as HW accesses, because | |
265 | * the direct-I/O emitters can't differenciate it. */ | |
266 | if (unlikely(map == &state->maps[PSX_MAP_PARALLEL_PORT])) | |
267 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW); | |
268 | /* If the base register is 0x0, be extra suspicious. | |
269 | * Some games (e.g. Sled Storm) actually do segmentation | |
270 | * faults by using uninitialized pointers, which are | |
271 | * later initialized to point to hardware registers. */ | |
272 | else if (op.i.rs && base == 0x0) | |
273 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW); | |
274 | else | |
275 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_DIRECT); | |
276 | } | |
d16005f8 | 277 | |
a59e5536 | 278 | ops = &lightrec_default_ops; |
6ce0b00a PC |
279 | } else if (flags && |
280 | LIGHTREC_FLAGS_GET_IO_MODE(*flags) == LIGHTREC_IO_DIRECT_HW) { | |
281 | ops = &lightrec_default_ops; | |
282 | } else { | |
283 | if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags)) | |
284 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW); | |
285 | ||
286 | ops = map->ops; | |
a59e5536 | 287 | } |
d16005f8 | 288 | |
cb72ea13 PC |
289 | if (!was_tagged) { |
290 | old_flags = block_set_flags(block, BLOCK_SHOULD_RECOMPILE); | |
291 | ||
292 | if (!(old_flags & BLOCK_SHOULD_RECOMPILE)) { | |
293 | pr_debug("Opcode of block at PC 0x%08x has been tagged" | |
294 | " - flag for recompilation\n", block->pc); | |
295 | ||
296 | lut_write(state, lut_offset(block->pc), NULL); | |
297 | } | |
298 | } | |
299 | ||
d16005f8 PC |
300 | switch (op.i.op) { |
301 | case OP_SB: | |
a59e5536 | 302 | ops->sb(state, opcode, host, addr, (u8) data); |
d16005f8 PC |
303 | return 0; |
304 | case OP_SH: | |
a59e5536 | 305 | ops->sh(state, opcode, host, addr, (u16) data); |
d16005f8 PC |
306 | return 0; |
307 | case OP_SWL: | |
a59e5536 | 308 | lightrec_swl(state, ops, opcode, host, addr, data); |
d16005f8 PC |
309 | return 0; |
310 | case OP_SWR: | |
a59e5536 | 311 | lightrec_swr(state, ops, opcode, host, addr, data); |
d16005f8 PC |
312 | return 0; |
313 | case OP_SW: | |
a59e5536 | 314 | ops->sw(state, opcode, host, addr, data); |
d16005f8 PC |
315 | return 0; |
316 | case OP_SWC2: | |
a59e5536 | 317 | lightrec_swc2(state, op, ops, host, addr); |
d16005f8 PC |
318 | return 0; |
319 | case OP_LB: | |
a59e5536 | 320 | return (s32) (s8) ops->lb(state, opcode, host, addr); |
d16005f8 | 321 | case OP_LBU: |
a59e5536 | 322 | return ops->lb(state, opcode, host, addr); |
d16005f8 | 323 | case OP_LH: |
a59e5536 | 324 | return (s32) (s16) ops->lh(state, opcode, host, addr); |
d16005f8 | 325 | case OP_LHU: |
a59e5536 | 326 | return ops->lh(state, opcode, host, addr); |
d16005f8 | 327 | case OP_LWC2: |
a59e5536 | 328 | lightrec_lwc2(state, op, ops, host, addr); |
d16005f8 | 329 | return 0; |
a59e5536 | 330 | case OP_LWL: |
331 | return lightrec_lwl(state, ops, opcode, host, addr, data); | |
332 | case OP_LWR: | |
333 | return lightrec_lwr(state, ops, opcode, host, addr, data); | |
d16005f8 PC |
334 | case OP_LW: |
335 | default: | |
a59e5536 | 336 | return ops->lw(state, opcode, host, addr); |
d16005f8 PC |
337 | } |
338 | } | |
339 | ||
340 | static void lightrec_rw_helper(struct lightrec_state *state, | |
03535202 | 341 | union code op, u32 *flags, |
cb72ea13 | 342 | struct block *block, u16 offset) |
d16005f8 | 343 | { |
98fa08a5 | 344 | u32 ret = lightrec_rw(state, op, state->regs.gpr[op.i.rs], |
cb72ea13 | 345 | state->regs.gpr[op.i.rt], flags, block, offset); |
d16005f8 PC |
346 | |
347 | switch (op.i.op) { | |
348 | case OP_LB: | |
349 | case OP_LBU: | |
350 | case OP_LH: | |
351 | case OP_LHU: | |
352 | case OP_LWL: | |
353 | case OP_LWR: | |
354 | case OP_LW: | |
cb72ea13 PC |
355 | if (OPT_HANDLE_LOAD_DELAYS && unlikely(!state->in_delay_slot_n)) { |
356 | state->temp_reg = ret; | |
357 | state->in_delay_slot_n = 0xff; | |
358 | } else if (op.i.rt) { | |
98fa08a5 | 359 | state->regs.gpr[op.i.rt] = ret; |
cb72ea13 | 360 | } |
d8b04acd PC |
361 | fallthrough; |
362 | default: | |
d16005f8 PC |
363 | break; |
364 | } | |
365 | } | |
366 | ||
03535202 | 367 | static void lightrec_rw_cb(struct lightrec_state *state, u32 arg) |
d16005f8 | 368 | { |
cb72ea13 | 369 | lightrec_rw_helper(state, (union code) arg, NULL, NULL, 0); |
d16005f8 PC |
370 | } |
371 | ||
03535202 | 372 | static void lightrec_rw_generic_cb(struct lightrec_state *state, u32 arg) |
d16005f8 | 373 | { |
98fa08a5 PC |
374 | struct block *block; |
375 | struct opcode *op; | |
98fa08a5 PC |
376 | u16 offset = (u16)arg; |
377 | ||
378 | block = lightrec_find_block_from_lut(state->block_cache, | |
379 | arg >> 16, state->next_pc); | |
380 | if (unlikely(!block)) { | |
381 | pr_err("rw_generic: No block found in LUT for PC 0x%x offset 0x%x\n", | |
382 | state->next_pc, offset); | |
ba3814c1 | 383 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); |
98fa08a5 PC |
384 | return; |
385 | } | |
386 | ||
387 | op = &block->opcode_list[offset]; | |
cb72ea13 | 388 | lightrec_rw_helper(state, op->c, &op->flags, block, offset); |
d16005f8 PC |
389 | } |
390 | ||
98fa08a5 | 391 | static u32 clamp_s32(s32 val, s32 min, s32 max) |
d16005f8 | 392 | { |
98fa08a5 PC |
393 | return val < min ? min : val > max ? max : val; |
394 | } | |
d16005f8 | 395 | |
11357fef PC |
396 | static u16 load_u16(u32 *ptr) |
397 | { | |
398 | return ((struct u16x2 *) ptr)->l; | |
399 | } | |
400 | ||
401 | static void store_u16(u32 *ptr, u16 value) | |
402 | { | |
403 | ((struct u16x2 *) ptr)->l = value; | |
404 | } | |
405 | ||
98fa08a5 PC |
406 | static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg) |
407 | { | |
408 | s16 gteir1, gteir2, gteir3; | |
409 | ||
410 | switch (reg) { | |
411 | case 1: | |
412 | case 3: | |
413 | case 5: | |
414 | case 8: | |
415 | case 9: | |
416 | case 10: | |
417 | case 11: | |
11357fef | 418 | return (s32)(s16) load_u16(&state->regs.cp2d[reg]); |
98fa08a5 PC |
419 | case 7: |
420 | case 16: | |
421 | case 17: | |
422 | case 18: | |
423 | case 19: | |
11357fef | 424 | return load_u16(&state->regs.cp2d[reg]); |
98fa08a5 PC |
425 | case 28: |
426 | case 29: | |
11357fef PC |
427 | gteir1 = (s16) load_u16(&state->regs.cp2d[9]); |
428 | gteir2 = (s16) load_u16(&state->regs.cp2d[10]); | |
429 | gteir3 = (s16) load_u16(&state->regs.cp2d[11]); | |
98fa08a5 PC |
430 | |
431 | return clamp_s32(gteir1 >> 7, 0, 0x1f) << 0 | | |
432 | clamp_s32(gteir2 >> 7, 0, 0x1f) << 5 | | |
433 | clamp_s32(gteir3 >> 7, 0, 0x1f) << 10; | |
434 | case 15: | |
435 | reg = 14; | |
d8b04acd PC |
436 | fallthrough; |
437 | default: | |
98fa08a5 PC |
438 | return state->regs.cp2d[reg]; |
439 | } | |
440 | } | |
d16005f8 | 441 | |
98fa08a5 PC |
442 | u32 lightrec_mfc(struct lightrec_state *state, union code op) |
443 | { | |
ba3814c1 PC |
444 | u32 val; |
445 | ||
98fa08a5 PC |
446 | if (op.i.op == OP_CP0) |
447 | return state->regs.cp0[op.r.rd]; | |
9259d748 PC |
448 | |
449 | if (op.i.op == OP_SWC2) { | |
450 | val = lightrec_mfc2(state, op.i.rt); | |
451 | } else if (op.r.rs == OP_CP2_BASIC_MFC2) | |
fdf33147 PC |
452 | val = lightrec_mfc2(state, op.r.rd); |
453 | else { | |
454 | val = state->regs.cp2c[op.r.rd]; | |
455 | ||
456 | switch (op.r.rd) { | |
457 | case 4: | |
458 | case 12: | |
459 | case 20: | |
460 | case 26: | |
461 | case 27: | |
462 | case 29: | |
463 | case 30: | |
464 | val = (u32)(s16)val; | |
465 | fallthrough; | |
466 | default: | |
467 | break; | |
468 | } | |
469 | } | |
ba3814c1 | 470 | |
fdf33147 PC |
471 | if (state->ops.cop2_notify) |
472 | (*state->ops.cop2_notify)(state, op.opcode, val); | |
ba3814c1 | 473 | |
fdf33147 PC |
474 | return val; |
475 | } | |
476 | ||
477 | static void lightrec_mfc_cb(struct lightrec_state *state, union code op) | |
478 | { | |
479 | u32 rt = lightrec_mfc(state, op); | |
480 | ||
9259d748 | 481 | if (op.i.op == OP_SWC2) |
cb72ea13 | 482 | state->temp_reg = rt; |
9259d748 | 483 | else if (op.r.rt) |
fdf33147 | 484 | state->regs.gpr[op.r.rt] = rt; |
d16005f8 PC |
485 | } |
486 | ||
98fa08a5 | 487 | static void lightrec_mtc0(struct lightrec_state *state, u8 reg, u32 data) |
d16005f8 | 488 | { |
fd58fa32 | 489 | u32 status, oldstatus, cause; |
98fa08a5 PC |
490 | |
491 | switch (reg) { | |
492 | case 1: | |
493 | case 4: | |
494 | case 8: | |
495 | case 14: | |
496 | case 15: | |
497 | /* Those registers are read-only */ | |
498 | return; | |
fd58fa32 | 499 | default: |
98fa08a5 PC |
500 | break; |
501 | } | |
d16005f8 | 502 | |
98fa08a5 PC |
503 | if (reg == 12) { |
504 | status = state->regs.cp0[12]; | |
fd58fa32 | 505 | oldstatus = status; |
d16005f8 | 506 | |
98fa08a5 PC |
507 | if (status & ~data & BIT(16)) { |
508 | state->ops.enable_ram(state, true); | |
509 | lightrec_invalidate_all(state); | |
510 | } else if (~status & data & BIT(16)) { | |
511 | state->ops.enable_ram(state, false); | |
512 | } | |
513 | } | |
514 | ||
fd58fa32 PC |
515 | if (reg == 13) { |
516 | state->regs.cp0[13] &= ~0x300; | |
517 | state->regs.cp0[13] |= data & 0x300; | |
518 | } else { | |
519 | state->regs.cp0[reg] = data; | |
520 | } | |
98fa08a5 PC |
521 | |
522 | if (reg == 12 || reg == 13) { | |
523 | cause = state->regs.cp0[13]; | |
524 | status = state->regs.cp0[12]; | |
525 | ||
fd58fa32 | 526 | /* Handle software interrupts */ |
98fa08a5 PC |
527 | if (!!(status & cause & 0x300) & status) |
528 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT); | |
fd58fa32 PC |
529 | |
530 | /* Handle hardware interrupts */ | |
531 | if (reg == 12 && !(~status & 0x401) && (~oldstatus & 0x401)) | |
532 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT); | |
98fa08a5 PC |
533 | } |
534 | } | |
535 | ||
536 | static u32 count_leading_bits(s32 data) | |
537 | { | |
98fa08a5 PC |
538 | u32 cnt = 33; |
539 | ||
de742fa0 PC |
540 | #ifdef __has_builtin |
541 | #if __has_builtin(__builtin_clrsb) | |
542 | return 1 + __builtin_clrsb(data); | |
543 | #endif | |
544 | #endif | |
545 | ||
98fa08a5 PC |
546 | data = (data ^ (data >> 31)) << 1; |
547 | ||
548 | do { | |
549 | cnt -= 1; | |
550 | data >>= 1; | |
551 | } while (data); | |
552 | ||
553 | return cnt; | |
98fa08a5 PC |
554 | } |
555 | ||
556 | static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data) | |
557 | { | |
558 | switch (reg) { | |
559 | case 15: | |
560 | state->regs.cp2d[12] = state->regs.cp2d[13]; | |
561 | state->regs.cp2d[13] = state->regs.cp2d[14]; | |
562 | state->regs.cp2d[14] = data; | |
563 | break; | |
564 | case 28: | |
565 | state->regs.cp2d[9] = (data << 7) & 0xf80; | |
566 | state->regs.cp2d[10] = (data << 2) & 0xf80; | |
567 | state->regs.cp2d[11] = (data >> 3) & 0xf80; | |
568 | break; | |
569 | case 31: | |
570 | return; | |
571 | case 30: | |
572 | state->regs.cp2d[31] = count_leading_bits((s32) data); | |
d8b04acd PC |
573 | fallthrough; |
574 | default: | |
98fa08a5 PC |
575 | state->regs.cp2d[reg] = data; |
576 | break; | |
577 | } | |
578 | } | |
d16005f8 | 579 | |
98fa08a5 PC |
580 | static void lightrec_ctc2(struct lightrec_state *state, u8 reg, u32 data) |
581 | { | |
582 | switch (reg) { | |
583 | case 4: | |
584 | case 12: | |
585 | case 20: | |
586 | case 26: | |
587 | case 27: | |
588 | case 29: | |
589 | case 30: | |
11357fef | 590 | store_u16(&state->regs.cp2c[reg], data); |
98fa08a5 PC |
591 | break; |
592 | case 31: | |
593 | data = (data & 0x7ffff000) | !!(data & 0x7f87e000) << 31; | |
d8b04acd PC |
594 | fallthrough; |
595 | default: | |
11357fef | 596 | state->regs.cp2c[reg] = data; |
98fa08a5 PC |
597 | break; |
598 | } | |
98fa08a5 PC |
599 | } |
600 | ||
9259d748 | 601 | void lightrec_mtc(struct lightrec_state *state, union code op, u8 reg, u32 data) |
98fa08a5 | 602 | { |
fdf33147 | 603 | if (op.i.op == OP_CP0) { |
9259d748 | 604 | lightrec_mtc0(state, reg, data); |
fdf33147 | 605 | } else { |
9259d748 PC |
606 | if (op.i.op == OP_LWC2 || op.r.rs != OP_CP2_BASIC_CTC2) |
607 | lightrec_mtc2(state, reg, data); | |
fdf33147 | 608 | else |
9259d748 | 609 | lightrec_ctc2(state, reg, data); |
fdf33147 PC |
610 | |
611 | if (state->ops.cop2_notify) | |
612 | (*state->ops.cop2_notify)(state, op.opcode, data); | |
613 | } | |
d16005f8 PC |
614 | } |
615 | ||
03535202 | 616 | static void lightrec_mtc_cb(struct lightrec_state *state, u32 arg) |
d16005f8 | 617 | { |
03535202 | 618 | union code op = (union code) arg; |
9259d748 PC |
619 | u32 data; |
620 | u8 reg; | |
621 | ||
622 | if (op.i.op == OP_LWC2) { | |
cb72ea13 | 623 | data = state->temp_reg; |
9259d748 PC |
624 | reg = op.i.rt; |
625 | } else { | |
626 | data = state->regs.gpr[op.r.rt]; | |
627 | reg = op.r.rd; | |
628 | } | |
22eee2ac | 629 | |
9259d748 | 630 | lightrec_mtc(state, op, reg, data); |
d16005f8 PC |
631 | } |
632 | ||
98fa08a5 | 633 | void lightrec_rfe(struct lightrec_state *state) |
d16005f8 PC |
634 | { |
635 | u32 status; | |
636 | ||
637 | /* Read CP0 Status register (r12) */ | |
98fa08a5 | 638 | status = state->regs.cp0[12]; |
d16005f8 PC |
639 | |
640 | /* Switch the bits */ | |
641 | status = ((status & 0x3c) >> 2) | (status & ~0xf); | |
642 | ||
643 | /* Write it back */ | |
98fa08a5 | 644 | lightrec_mtc0(state, 12, status); |
d16005f8 PC |
645 | } |
646 | ||
98fa08a5 | 647 | void lightrec_cp(struct lightrec_state *state, union code op) |
d16005f8 | 648 | { |
98fa08a5 PC |
649 | if (op.i.op == OP_CP0) { |
650 | pr_err("Invalid CP opcode to coprocessor #0\n"); | |
651 | return; | |
652 | } | |
d16005f8 | 653 | |
98fa08a5 | 654 | (*state->ops.cop2_op)(state, op.opcode); |
d16005f8 PC |
655 | } |
656 | ||
03535202 | 657 | static void lightrec_cp_cb(struct lightrec_state *state, u32 arg) |
22eee2ac | 658 | { |
03535202 | 659 | lightrec_cp(state, (union code) arg); |
22eee2ac PC |
660 | } |
661 | ||
03535202 | 662 | static struct block * lightrec_get_block(struct lightrec_state *state, u32 pc) |
d16005f8 PC |
663 | { |
664 | struct block *block = lightrec_find_block(state->block_cache, pc); | |
ba3814c1 | 665 | u8 old_flags; |
d16005f8 | 666 | |
98fa08a5 | 667 | if (block && lightrec_block_is_outdated(state, block)) { |
d16005f8 PC |
668 | pr_debug("Block at PC 0x%08x is outdated!\n", block->pc); |
669 | ||
ba3814c1 PC |
670 | old_flags = block_set_flags(block, BLOCK_IS_DEAD); |
671 | if (!(old_flags & BLOCK_IS_DEAD)) { | |
672 | /* Make sure the recompiler isn't processing the block | |
673 | * we'll destroy */ | |
674 | if (ENABLE_THREADED_COMPILER) | |
675 | lightrec_recompiler_remove(state->rec, block); | |
676 | ||
677 | lightrec_unregister_block(state->block_cache, block); | |
678 | remove_from_code_lut(state->block_cache, block); | |
679 | lightrec_free_block(state, block); | |
680 | } | |
d16005f8 | 681 | |
d16005f8 PC |
682 | block = NULL; |
683 | } | |
684 | ||
685 | if (!block) { | |
686 | block = lightrec_precompile_block(state, pc); | |
687 | if (!block) { | |
688 | pr_err("Unable to recompile block at PC 0x%x\n", pc); | |
689 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); | |
690 | return NULL; | |
691 | } | |
692 | ||
693 | lightrec_register_block(state->block_cache, block); | |
694 | } | |
695 | ||
696 | return block; | |
697 | } | |
698 | ||
699 | static void * get_next_block_func(struct lightrec_state *state, u32 pc) | |
700 | { | |
701 | struct block *block; | |
702 | bool should_recompile; | |
703 | void *func; | |
d8b04acd | 704 | int err; |
d16005f8 | 705 | |
9259d748 | 706 | do { |
d8b04acd | 707 | func = lut_read(state, lut_offset(pc)); |
d16005f8 | 708 | if (func && func != state->get_next_block) |
98fa08a5 | 709 | break; |
d16005f8 PC |
710 | |
711 | block = lightrec_get_block(state, pc); | |
712 | ||
713 | if (unlikely(!block)) | |
98fa08a5 PC |
714 | break; |
715 | ||
ba3814c1 PC |
716 | if (OPT_REPLACE_MEMSET && |
717 | block_has_flag(block, BLOCK_IS_MEMSET)) { | |
98fa08a5 PC |
718 | func = state->memset_func; |
719 | break; | |
720 | } | |
d16005f8 | 721 | |
ba3814c1 | 722 | should_recompile = block_has_flag(block, BLOCK_SHOULD_RECOMPILE) && |
cb72ea13 | 723 | !block_has_flag(block, BLOCK_NEVER_COMPILE) && |
ba3814c1 | 724 | !block_has_flag(block, BLOCK_IS_DEAD); |
d16005f8 PC |
725 | |
726 | if (unlikely(should_recompile)) { | |
a59e5536 | 727 | pr_debug("Block at PC 0x%08x should recompile\n", pc); |
d16005f8 | 728 | |
d8b04acd | 729 | if (ENABLE_THREADED_COMPILER) { |
a59e5536 | 730 | lightrec_recompiler_add(state->rec, block); |
d8b04acd PC |
731 | } else { |
732 | err = lightrec_compile_block(state->cstate, block); | |
733 | if (err) { | |
734 | state->exit_flags = LIGHTREC_EXIT_NOMEM; | |
735 | return NULL; | |
736 | } | |
737 | } | |
d16005f8 PC |
738 | } |
739 | ||
740 | if (ENABLE_THREADED_COMPILER && likely(!should_recompile)) | |
98fa08a5 | 741 | func = lightrec_recompiler_run_first_pass(state, block, &pc); |
d16005f8 PC |
742 | else |
743 | func = block->function; | |
744 | ||
745 | if (likely(func)) | |
98fa08a5 | 746 | break; |
d16005f8 | 747 | |
ba3814c1 | 748 | if (unlikely(block_has_flag(block, BLOCK_NEVER_COMPILE))) { |
98fa08a5 PC |
749 | pc = lightrec_emulate_block(state, block, pc); |
750 | ||
751 | } else if (!ENABLE_THREADED_COMPILER) { | |
752 | /* Block wasn't compiled yet - run the interpreter */ | |
ba3814c1 | 753 | if (block_has_flag(block, BLOCK_FULLY_TAGGED)) |
98fa08a5 PC |
754 | pr_debug("Block fully tagged, skipping first pass\n"); |
755 | else if (ENABLE_FIRST_PASS && likely(!should_recompile)) | |
756 | pc = lightrec_emulate_block(state, block, pc); | |
d16005f8 | 757 | |
d16005f8 | 758 | /* Then compile it using the profiled data */ |
d8b04acd PC |
759 | err = lightrec_compile_block(state->cstate, block); |
760 | if (err) { | |
761 | state->exit_flags = LIGHTREC_EXIT_NOMEM; | |
762 | return NULL; | |
763 | } | |
ba3814c1 PC |
764 | } else if (unlikely(block_has_flag(block, BLOCK_IS_DEAD))) { |
765 | /* | |
766 | * If the block is dead but has never been compiled, | |
767 | * then its function pointer is NULL and we cannot | |
768 | * execute the block. In that case, reap all the dead | |
769 | * blocks now, and in the next loop we will create a | |
770 | * new block. | |
771 | */ | |
772 | lightrec_reaper_reap(state->reaper); | |
98fa08a5 PC |
773 | } else { |
774 | lightrec_recompiler_add(state->rec, block); | |
d16005f8 | 775 | } |
9259d748 PC |
776 | } while (state->exit_flags == LIGHTREC_EXIT_NORMAL |
777 | && state->current_cycle < state->target_cycle); | |
d16005f8 | 778 | |
98fa08a5 PC |
779 | state->next_pc = pc; |
780 | return func; | |
d16005f8 PC |
781 | } |
782 | ||
d8b04acd PC |
783 | static void * lightrec_alloc_code(struct lightrec_state *state, size_t size) |
784 | { | |
785 | void *code; | |
786 | ||
787 | if (ENABLE_THREADED_COMPILER) | |
788 | lightrec_code_alloc_lock(state); | |
789 | ||
790 | code = tlsf_malloc(state->tlsf, size); | |
791 | ||
792 | if (ENABLE_THREADED_COMPILER) | |
793 | lightrec_code_alloc_unlock(state); | |
794 | ||
795 | return code; | |
796 | } | |
797 | ||
798 | static void lightrec_realloc_code(struct lightrec_state *state, | |
799 | void *ptr, size_t size) | |
800 | { | |
801 | /* NOTE: 'size' MUST be smaller than the size specified during | |
802 | * the allocation. */ | |
803 | ||
804 | if (ENABLE_THREADED_COMPILER) | |
805 | lightrec_code_alloc_lock(state); | |
806 | ||
807 | tlsf_realloc(state->tlsf, ptr, size); | |
808 | ||
809 | if (ENABLE_THREADED_COMPILER) | |
810 | lightrec_code_alloc_unlock(state); | |
811 | } | |
812 | ||
813 | static void lightrec_free_code(struct lightrec_state *state, void *ptr) | |
814 | { | |
815 | if (ENABLE_THREADED_COMPILER) | |
816 | lightrec_code_alloc_lock(state); | |
817 | ||
818 | tlsf_free(state->tlsf, ptr); | |
819 | ||
820 | if (ENABLE_THREADED_COMPILER) | |
821 | lightrec_code_alloc_unlock(state); | |
822 | } | |
823 | ||
cb72ea13 PC |
824 | static char lightning_code_data[0x80000]; |
825 | ||
02487de7 | 826 | static void * lightrec_emit_code(struct lightrec_state *state, |
d8b04acd | 827 | const struct block *block, |
02487de7 PC |
828 | jit_state_t *_jit, unsigned int *size) |
829 | { | |
830 | bool has_code_buffer = ENABLE_CODE_BUFFER && state->tlsf; | |
831 | jit_word_t code_size, new_code_size; | |
832 | void *code; | |
833 | ||
834 | jit_realize(); | |
835 | ||
cb72ea13 PC |
836 | if (ENABLE_DISASSEMBLER) |
837 | jit_set_data(lightning_code_data, sizeof(lightning_code_data), 0); | |
838 | else | |
02487de7 PC |
839 | jit_set_data(NULL, 0, JIT_DISABLE_DATA | JIT_DISABLE_NOTE); |
840 | ||
841 | if (has_code_buffer) { | |
842 | jit_get_code(&code_size); | |
d8b04acd PC |
843 | code = lightrec_alloc_code(state, (size_t) code_size); |
844 | ||
845 | if (!code) { | |
846 | if (ENABLE_THREADED_COMPILER) { | |
847 | /* If we're using the threaded compiler, return | |
848 | * an allocation error here. The threaded | |
849 | * compiler will then empty its job queue and | |
850 | * request a code flush using the reaper. */ | |
851 | return NULL; | |
852 | } | |
853 | ||
854 | /* Remove outdated blocks, and try again */ | |
855 | lightrec_remove_outdated_blocks(state->block_cache, block); | |
856 | ||
857 | pr_debug("Re-try to alloc %zu bytes...\n", code_size); | |
858 | ||
859 | code = lightrec_alloc_code(state, code_size); | |
860 | if (!code) { | |
861 | pr_err("Could not alloc even after removing old blocks!\n"); | |
862 | return NULL; | |
863 | } | |
864 | } | |
02487de7 PC |
865 | |
866 | jit_set_code(code, code_size); | |
867 | } | |
868 | ||
869 | code = jit_emit(); | |
870 | ||
871 | jit_get_code(&new_code_size); | |
872 | lightrec_register(MEM_FOR_CODE, new_code_size); | |
873 | ||
874 | if (has_code_buffer) { | |
d8b04acd | 875 | lightrec_realloc_code(state, code, (size_t) new_code_size); |
02487de7 PC |
876 | |
877 | pr_debug("Creating code block at address 0x%" PRIxPTR ", " | |
878 | "code size: %" PRIuPTR " new: %" PRIuPTR "\n", | |
879 | (uintptr_t) code, code_size, new_code_size); | |
880 | } | |
881 | ||
882 | *size = (unsigned int) new_code_size; | |
883 | ||
9259d748 PC |
884 | if (state->ops.code_inv) |
885 | state->ops.code_inv(code, new_code_size); | |
886 | ||
02487de7 PC |
887 | return code; |
888 | } | |
889 | ||
98fa08a5 | 890 | static struct block * generate_wrapper(struct lightrec_state *state) |
d16005f8 PC |
891 | { |
892 | struct block *block; | |
893 | jit_state_t *_jit; | |
894 | unsigned int i; | |
fd58fa32 | 895 | jit_node_t *addr[C_WRAPPERS_COUNT - 1]; |
ba3814c1 | 896 | jit_node_t *to_end[C_WRAPPERS_COUNT - 1]; |
cb72ea13 PC |
897 | u8 tmp = JIT_R1; |
898 | ||
899 | #ifdef __sh__ | |
900 | /* On SH, GBR-relative loads target the r0 register. | |
901 | * Use it as the temporary register to factorize the move to | |
902 | * JIT_R1. */ | |
903 | if (LIGHTREC_REG_STATE == _GBR) | |
904 | tmp = _R0; | |
905 | #endif | |
d16005f8 PC |
906 | |
907 | block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block)); | |
908 | if (!block) | |
909 | goto err_no_mem; | |
910 | ||
911 | _jit = jit_new_state(); | |
912 | if (!_jit) | |
913 | goto err_free_block; | |
914 | ||
915 | jit_name("RW wrapper"); | |
916 | jit_note(__FILE__, __LINE__); | |
917 | ||
918 | /* Wrapper entry point */ | |
919 | jit_prolog(); | |
fd58fa32 PC |
920 | jit_tramp(256); |
921 | ||
ba3814c1 | 922 | /* Add entry points */ |
fd58fa32 | 923 | for (i = C_WRAPPERS_COUNT - 1; i > 0; i--) { |
cb72ea13 | 924 | jit_ldxi(tmp, LIGHTREC_REG_STATE, |
ba3814c1 PC |
925 | offsetof(struct lightrec_state, c_wrappers[i])); |
926 | to_end[i - 1] = jit_b(); | |
fd58fa32 PC |
927 | addr[i - 1] = jit_indirect(); |
928 | } | |
929 | ||
cb72ea13 | 930 | jit_ldxi(tmp, LIGHTREC_REG_STATE, |
ba3814c1 PC |
931 | offsetof(struct lightrec_state, c_wrappers[0])); |
932 | ||
933 | for (i = 0; i < C_WRAPPERS_COUNT - 1; i++) | |
934 | jit_patch(to_end[i]); | |
cb72ea13 | 935 | jit_movr(JIT_R1, tmp); |
ba3814c1 | 936 | |
fd58fa32 PC |
937 | jit_epilog(); |
938 | jit_prolog(); | |
d16005f8 | 939 | |
fd58fa32 | 940 | /* Save all temporaries on stack */ |
ba3814c1 PC |
941 | for (i = 0; i < NUM_TEMPS; i++) { |
942 | if (i + FIRST_TEMP != 1) { | |
943 | jit_stxi(offsetof(struct lightrec_state, wrapper_regs[i]), | |
944 | LIGHTREC_REG_STATE, JIT_R(i + FIRST_TEMP)); | |
945 | } | |
946 | } | |
d16005f8 | 947 | |
ba3814c1 | 948 | jit_getarg(JIT_R2, jit_arg()); |
03535202 | 949 | |
ba3814c1 PC |
950 | jit_prepare(); |
951 | jit_pushargr(LIGHTREC_REG_STATE); | |
952 | jit_pushargr(JIT_R2); | |
d16005f8 | 953 | |
ba3814c1 PC |
954 | jit_ldxi_ui(JIT_R2, LIGHTREC_REG_STATE, |
955 | offsetof(struct lightrec_state, target_cycle)); | |
d16005f8 | 956 | |
ba3814c1 PC |
957 | /* state->current_cycle = state->target_cycle - delta; */ |
958 | jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, LIGHTREC_REG_CYCLE); | |
959 | jit_stxi_i(offsetof(struct lightrec_state, current_cycle), | |
960 | LIGHTREC_REG_STATE, LIGHTREC_REG_CYCLE); | |
d16005f8 | 961 | |
ba3814c1 PC |
962 | /* Call the wrapper function */ |
963 | jit_finishr(JIT_R1); | |
d16005f8 | 964 | |
ba3814c1 PC |
965 | /* delta = state->target_cycle - state->current_cycle */; |
966 | jit_ldxi_ui(LIGHTREC_REG_CYCLE, LIGHTREC_REG_STATE, | |
967 | offsetof(struct lightrec_state, current_cycle)); | |
968 | jit_ldxi_ui(JIT_R1, LIGHTREC_REG_STATE, | |
969 | offsetof(struct lightrec_state, target_cycle)); | |
970 | jit_subr(LIGHTREC_REG_CYCLE, JIT_R1, LIGHTREC_REG_CYCLE); | |
fd58fa32 | 971 | |
ba3814c1 PC |
972 | /* Restore temporaries from stack */ |
973 | for (i = 0; i < NUM_TEMPS; i++) { | |
974 | if (i + FIRST_TEMP != 1) { | |
975 | jit_ldxi(JIT_R(i + FIRST_TEMP), LIGHTREC_REG_STATE, | |
976 | offsetof(struct lightrec_state, wrapper_regs[i])); | |
977 | } | |
978 | } | |
d16005f8 | 979 | |
ba3814c1 | 980 | jit_ret(); |
d16005f8 PC |
981 | jit_epilog(); |
982 | ||
d16005f8 | 983 | block->_jit = _jit; |
d16005f8 | 984 | block->opcode_list = NULL; |
ba3814c1 | 985 | block->flags = BLOCK_NO_OPCODE_LIST; |
d16005f8 PC |
986 | block->nb_ops = 0; |
987 | ||
d8b04acd | 988 | block->function = lightrec_emit_code(state, block, _jit, |
02487de7 PC |
989 | &block->code_size); |
990 | if (!block->function) | |
991 | goto err_free_block; | |
992 | ||
fd58fa32 PC |
993 | state->wrappers_eps[C_WRAPPERS_COUNT - 1] = block->function; |
994 | ||
995 | for (i = 0; i < C_WRAPPERS_COUNT - 1; i++) | |
996 | state->wrappers_eps[i] = jit_address(addr[i]); | |
997 | ||
d16005f8 PC |
998 | if (ENABLE_DISASSEMBLER) { |
999 | pr_debug("Wrapper block:\n"); | |
1000 | jit_disassemble(); | |
1001 | } | |
1002 | ||
1003 | jit_clear_state(); | |
1004 | return block; | |
1005 | ||
1006 | err_free_block: | |
1007 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); | |
1008 | err_no_mem: | |
1009 | pr_err("Unable to compile wrapper: Out of memory\n"); | |
1010 | return NULL; | |
1011 | } | |
1012 | ||
98fa08a5 PC |
1013 | static u32 lightrec_memset(struct lightrec_state *state) |
1014 | { | |
1015 | u32 kunseg_pc = kunseg(state->regs.gpr[4]); | |
1016 | void *host; | |
1017 | const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg_pc); | |
1018 | u32 length = state->regs.gpr[5] * 4; | |
1019 | ||
1020 | if (!map) { | |
1021 | pr_err("Unable to find memory map for memset target address " | |
1022 | "0x%x\n", kunseg_pc); | |
1023 | return 0; | |
1024 | } | |
1025 | ||
1026 | pr_debug("Calling host memset, PC 0x%x (host address 0x%" PRIxPTR ") for %u bytes\n", | |
1027 | kunseg_pc, (uintptr_t)host, length); | |
1028 | memset(host, 0, length); | |
1029 | ||
1030 | if (!state->invalidate_from_dma_only) | |
1031 | lightrec_invalidate_map(state, map, kunseg_pc, length); | |
1032 | ||
1033 | /* Rough estimation of the number of cycles consumed */ | |
1034 | return 8 + 5 * (length + 3 / 4); | |
1035 | } | |
1036 | ||
cb72ea13 PC |
1037 | static u32 lightrec_check_load_delay(struct lightrec_state *state, u32 pc, u8 reg) |
1038 | { | |
1039 | struct block *block; | |
1040 | union code first_op; | |
1041 | ||
1042 | first_op = lightrec_read_opcode(state, pc); | |
1043 | ||
1044 | if (likely(!opcode_reads_register(first_op, reg))) { | |
1045 | state->regs.gpr[reg] = state->temp_reg; | |
1046 | } else { | |
1047 | block = lightrec_get_block(state, pc); | |
1048 | if (unlikely(!block)) { | |
1049 | pr_err("Unable to get block at PC 0x%08x\n", pc); | |
1050 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); | |
1051 | pc = 0; | |
1052 | } else { | |
1053 | pc = lightrec_handle_load_delay(state, block, pc, reg); | |
1054 | } | |
1055 | } | |
1056 | ||
1057 | return pc; | |
1058 | } | |
1059 | ||
1060 | static void update_cycle_counter_before_c(jit_state_t *_jit) | |
1061 | { | |
1062 | /* update state->current_cycle */ | |
1063 | jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE, | |
1064 | offsetof(struct lightrec_state, target_cycle)); | |
1065 | jit_subr(JIT_R1, JIT_R2, LIGHTREC_REG_CYCLE); | |
1066 | jit_stxi_i(offsetof(struct lightrec_state, current_cycle), | |
1067 | LIGHTREC_REG_STATE, JIT_R1); | |
1068 | } | |
1069 | ||
1070 | static void update_cycle_counter_after_c(jit_state_t *_jit) | |
1071 | { | |
1072 | /* Recalc the delta */ | |
1073 | jit_ldxi_i(JIT_R1, LIGHTREC_REG_STATE, | |
1074 | offsetof(struct lightrec_state, current_cycle)); | |
1075 | jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE, | |
1076 | offsetof(struct lightrec_state, target_cycle)); | |
1077 | jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, JIT_R1); | |
1078 | } | |
1079 | ||
d16005f8 PC |
1080 | static struct block * generate_dispatcher(struct lightrec_state *state) |
1081 | { | |
1082 | struct block *block; | |
1083 | jit_state_t *_jit; | |
cb72ea13 | 1084 | jit_node_t *to_end, *loop, *addr, *addr2, *addr3, *addr4, *addr5, *jmp, *jmp2; |
d16005f8 | 1085 | unsigned int i; |
02487de7 | 1086 | u32 offset; |
d16005f8 PC |
1087 | |
1088 | block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block)); | |
1089 | if (!block) | |
1090 | goto err_no_mem; | |
1091 | ||
1092 | _jit = jit_new_state(); | |
1093 | if (!_jit) | |
1094 | goto err_free_block; | |
1095 | ||
1096 | jit_name("dispatcher"); | |
1097 | jit_note(__FILE__, __LINE__); | |
1098 | ||
1099 | jit_prolog(); | |
1100 | jit_frame(256); | |
1101 | ||
9259d748 PC |
1102 | jit_getarg(LIGHTREC_REG_STATE, jit_arg()); |
1103 | jit_getarg(JIT_V0, jit_arg()); | |
ba3814c1 | 1104 | jit_getarg(JIT_V1, jit_arg()); |
d16005f8 | 1105 | jit_getarg_i(LIGHTREC_REG_CYCLE, jit_arg()); |
d16005f8 PC |
1106 | |
1107 | /* Force all callee-saved registers to be pushed on the stack */ | |
1108 | for (i = 0; i < NUM_REGS; i++) | |
ba3814c1 | 1109 | jit_movr(JIT_V(i + FIRST_REG), JIT_V(i + FIRST_REG)); |
d16005f8 | 1110 | |
d16005f8 PC |
1111 | loop = jit_label(); |
1112 | ||
1113 | /* Call the block's code */ | |
ba3814c1 | 1114 | jit_jmpr(JIT_V1); |
d16005f8 | 1115 | |
98fa08a5 PC |
1116 | if (OPT_REPLACE_MEMSET) { |
1117 | /* Blocks will jump here when they need to call | |
1118 | * lightrec_memset() */ | |
1119 | addr3 = jit_indirect(); | |
1120 | ||
ba3814c1 PC |
1121 | jit_movr(JIT_V1, LIGHTREC_REG_CYCLE); |
1122 | ||
98fa08a5 PC |
1123 | jit_prepare(); |
1124 | jit_pushargr(LIGHTREC_REG_STATE); | |
cb72ea13 | 1125 | |
98fa08a5 | 1126 | jit_finishi(lightrec_memset); |
cb72ea13 | 1127 | jit_retval(LIGHTREC_REG_CYCLE); |
98fa08a5 PC |
1128 | |
1129 | jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, | |
1130 | offsetof(struct lightrec_state, regs.gpr[31])); | |
ba3814c1 | 1131 | jit_subr(LIGHTREC_REG_CYCLE, JIT_V1, LIGHTREC_REG_CYCLE); |
cb72ea13 PC |
1132 | |
1133 | if (OPT_DETECT_IMPOSSIBLE_BRANCHES || OPT_HANDLE_LOAD_DELAYS) | |
1134 | jmp = jit_b(); | |
1135 | } | |
1136 | ||
1137 | if (OPT_DETECT_IMPOSSIBLE_BRANCHES) { | |
1138 | /* Blocks will jump here when they reach a branch that should | |
1139 | * be executed with the interpreter, passing the branch's PC | |
1140 | * in JIT_V0 and the address of the block in JIT_V1. */ | |
1141 | addr4 = jit_indirect(); | |
1142 | ||
1143 | update_cycle_counter_before_c(_jit); | |
1144 | ||
1145 | jit_prepare(); | |
1146 | jit_pushargr(LIGHTREC_REG_STATE); | |
1147 | jit_pushargr(JIT_V1); | |
1148 | jit_pushargr(JIT_V0); | |
1149 | jit_finishi(lightrec_emulate_block); | |
1150 | ||
1151 | jit_retval(JIT_V0); | |
1152 | ||
1153 | update_cycle_counter_after_c(_jit); | |
1154 | ||
1155 | if (OPT_HANDLE_LOAD_DELAYS) | |
1156 | jmp2 = jit_b(); | |
1157 | ||
1158 | } | |
1159 | ||
1160 | if (OPT_HANDLE_LOAD_DELAYS) { | |
1161 | /* Blocks will jump here when they reach a branch with a load | |
1162 | * opcode in its delay slot. The delay slot has already been | |
1163 | * executed; the load value is in (state->temp_reg), and the | |
1164 | * register number is in JIT_V1. | |
1165 | * Jump to a C function which will evaluate the branch target's | |
1166 | * first opcode, to make sure that it does not read the register | |
1167 | * in question; and if it does, handle it accordingly. */ | |
1168 | addr5 = jit_indirect(); | |
1169 | ||
1170 | update_cycle_counter_before_c(_jit); | |
1171 | ||
1172 | jit_prepare(); | |
1173 | jit_pushargr(LIGHTREC_REG_STATE); | |
1174 | jit_pushargr(JIT_V0); | |
1175 | jit_pushargr(JIT_V1); | |
1176 | jit_finishi(lightrec_check_load_delay); | |
1177 | ||
1178 | jit_retval(JIT_V0); | |
1179 | ||
1180 | update_cycle_counter_after_c(_jit); | |
1181 | ||
1182 | if (OPT_DETECT_IMPOSSIBLE_BRANCHES) | |
1183 | jit_patch(jmp2); | |
1184 | } | |
1185 | ||
1186 | if (OPT_REPLACE_MEMSET | |
1187 | && (OPT_DETECT_IMPOSSIBLE_BRANCHES || OPT_HANDLE_LOAD_DELAYS)) { | |
1188 | jit_patch(jmp); | |
98fa08a5 PC |
1189 | } |
1190 | ||
d16005f8 PC |
1191 | /* The block will jump here, with the number of cycles remaining in |
1192 | * LIGHTREC_REG_CYCLE */ | |
1193 | addr2 = jit_indirect(); | |
1194 | ||
98fa08a5 PC |
1195 | /* Store back the next_pc to the lightrec_state structure */ |
1196 | offset = offsetof(struct lightrec_state, next_pc); | |
1197 | jit_stxi_i(offset, LIGHTREC_REG_STATE, JIT_V0); | |
1198 | ||
d16005f8 PC |
1199 | /* Jump to end if state->target_cycle < state->current_cycle */ |
1200 | to_end = jit_blei(LIGHTREC_REG_CYCLE, 0); | |
1201 | ||
1202 | /* Convert next PC to KUNSEG and avoid mirrors */ | |
ba3814c1 PC |
1203 | jit_andi(JIT_V1, JIT_V0, 0x10000000 | (RAM_SIZE - 1)); |
1204 | jit_rshi_u(JIT_R1, JIT_V1, 28); | |
02487de7 PC |
1205 | jit_andi(JIT_R2, JIT_V0, BIOS_SIZE - 1); |
1206 | jit_addi(JIT_R2, JIT_R2, RAM_SIZE); | |
ba3814c1 | 1207 | jit_movnr(JIT_V1, JIT_R2, JIT_R1); |
02487de7 PC |
1208 | |
1209 | /* If possible, use the code LUT */ | |
1210 | if (!lut_is_32bit(state)) | |
ba3814c1 | 1211 | jit_lshi(JIT_V1, JIT_V1, 1); |
cb72ea13 | 1212 | jit_add_state(JIT_V1, JIT_V1); |
02487de7 PC |
1213 | |
1214 | offset = offsetof(struct lightrec_state, code_lut); | |
1215 | if (lut_is_32bit(state)) | |
ba3814c1 | 1216 | jit_ldxi_ui(JIT_V1, JIT_V1, offset); |
02487de7 | 1217 | else |
ba3814c1 | 1218 | jit_ldxi(JIT_V1, JIT_V1, offset); |
d16005f8 PC |
1219 | |
1220 | /* If we get non-NULL, loop */ | |
ba3814c1 PC |
1221 | jit_patch_at(jit_bnei(JIT_V1, 0), loop); |
1222 | ||
1223 | /* The code LUT will be set to this address when the block at the target | |
1224 | * PC has been preprocessed but not yet compiled by the threaded | |
1225 | * recompiler */ | |
1226 | addr = jit_indirect(); | |
d16005f8 PC |
1227 | |
1228 | /* Slow path: call C function get_next_block_func() */ | |
d16005f8 | 1229 | |
98fa08a5 | 1230 | if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) { |
d16005f8 | 1231 | /* We may call the interpreter - update state->current_cycle */ |
cb72ea13 | 1232 | update_cycle_counter_before_c(_jit); |
d16005f8 PC |
1233 | } |
1234 | ||
d16005f8 PC |
1235 | jit_prepare(); |
1236 | jit_pushargr(LIGHTREC_REG_STATE); | |
1237 | jit_pushargr(JIT_V0); | |
ba3814c1 PC |
1238 | |
1239 | /* Save the cycles register if needed */ | |
1240 | if (!(ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES)) | |
1241 | jit_movr(JIT_V0, LIGHTREC_REG_CYCLE); | |
1242 | ||
1243 | /* Get the next block */ | |
d16005f8 | 1244 | jit_finishi(&get_next_block_func); |
ba3814c1 | 1245 | jit_retval(JIT_V1); |
d16005f8 | 1246 | |
98fa08a5 | 1247 | if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) { |
d16005f8 PC |
1248 | /* The interpreter may have updated state->current_cycle and |
1249 | * state->target_cycle - recalc the delta */ | |
cb72ea13 | 1250 | update_cycle_counter_after_c(_jit); |
ba3814c1 PC |
1251 | } else { |
1252 | jit_movr(LIGHTREC_REG_CYCLE, JIT_V0); | |
d16005f8 PC |
1253 | } |
1254 | ||
9259d748 PC |
1255 | /* Reset JIT_V0 to the next PC */ |
1256 | jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, | |
1257 | offsetof(struct lightrec_state, next_pc)); | |
1258 | ||
d16005f8 | 1259 | /* If we get non-NULL, loop */ |
ba3814c1 | 1260 | jit_patch_at(jit_bnei(JIT_V1, 0), loop); |
d16005f8 | 1261 | |
d16005f8 PC |
1262 | /* When exiting, the recompiled code will jump to that address */ |
1263 | jit_note(__FILE__, __LINE__); | |
1264 | jit_patch(to_end); | |
1265 | ||
d16005f8 PC |
1266 | jit_retr(LIGHTREC_REG_CYCLE); |
1267 | jit_epilog(); | |
1268 | ||
d16005f8 | 1269 | block->_jit = _jit; |
d16005f8 | 1270 | block->opcode_list = NULL; |
ba3814c1 | 1271 | block->flags = BLOCK_NO_OPCODE_LIST; |
d16005f8 PC |
1272 | block->nb_ops = 0; |
1273 | ||
d8b04acd | 1274 | block->function = lightrec_emit_code(state, block, _jit, |
02487de7 PC |
1275 | &block->code_size); |
1276 | if (!block->function) | |
1277 | goto err_free_block; | |
d16005f8 PC |
1278 | |
1279 | state->eob_wrapper_func = jit_address(addr2); | |
cb72ea13 PC |
1280 | if (OPT_DETECT_IMPOSSIBLE_BRANCHES) |
1281 | state->interpreter_func = jit_address(addr4); | |
1282 | if (OPT_HANDLE_LOAD_DELAYS) | |
1283 | state->ds_check_func = jit_address(addr5); | |
98fa08a5 PC |
1284 | if (OPT_REPLACE_MEMSET) |
1285 | state->memset_func = jit_address(addr3); | |
d16005f8 PC |
1286 | state->get_next_block = jit_address(addr); |
1287 | ||
1288 | if (ENABLE_DISASSEMBLER) { | |
1289 | pr_debug("Dispatcher block:\n"); | |
1290 | jit_disassemble(); | |
1291 | } | |
1292 | ||
1293 | /* We're done! */ | |
1294 | jit_clear_state(); | |
1295 | return block; | |
1296 | ||
1297 | err_free_block: | |
1298 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); | |
1299 | err_no_mem: | |
1300 | pr_err("Unable to compile dispatcher: Out of memory\n"); | |
1301 | return NULL; | |
1302 | } | |
1303 | ||
1304 | union code lightrec_read_opcode(struct lightrec_state *state, u32 pc) | |
1305 | { | |
fd58fa32 | 1306 | void *host = NULL; |
d16005f8 | 1307 | |
98fa08a5 | 1308 | lightrec_get_map(state, &host, kunseg(pc)); |
d16005f8 | 1309 | |
98fa08a5 | 1310 | const u32 *code = (u32 *)host; |
02487de7 | 1311 | return (union code) LE32TOH(*code); |
98fa08a5 | 1312 | } |
d16005f8 | 1313 | |
cb72ea13 | 1314 | __cnst unsigned int lightrec_cycles_of_opcode(union code code) |
98fa08a5 PC |
1315 | { |
1316 | return 2; | |
1317 | } | |
d16005f8 | 1318 | |
ba3814c1 | 1319 | void lightrec_free_opcode_list(struct lightrec_state *state, struct opcode *ops) |
98fa08a5 | 1320 | { |
ba3814c1 PC |
1321 | struct opcode_list *list = container_of(ops, struct opcode_list, ops); |
1322 | ||
98fa08a5 | 1323 | lightrec_free(state, MEM_FOR_IR, |
ba3814c1 PC |
1324 | sizeof(*list) + list->nb_ops * sizeof(struct opcode), |
1325 | list); | |
98fa08a5 PC |
1326 | } |
1327 | ||
1328 | static unsigned int lightrec_get_mips_block_len(const u32 *src) | |
1329 | { | |
1330 | unsigned int i; | |
1331 | union code c; | |
1332 | ||
1333 | for (i = 1; ; i++) { | |
1334 | c.opcode = LE32TOH(*src++); | |
1335 | ||
1336 | if (is_syscall(c)) | |
1337 | return i; | |
1338 | ||
1339 | if (is_unconditional_jump(c)) | |
1340 | return i + 1; | |
1341 | } | |
1342 | } | |
1343 | ||
1344 | static struct opcode * lightrec_disassemble(struct lightrec_state *state, | |
1345 | const u32 *src, unsigned int *len) | |
1346 | { | |
ba3814c1 | 1347 | struct opcode_list *list; |
98fa08a5 PC |
1348 | unsigned int i, length; |
1349 | ||
1350 | length = lightrec_get_mips_block_len(src); | |
1351 | ||
ba3814c1 PC |
1352 | list = lightrec_malloc(state, MEM_FOR_IR, |
1353 | sizeof(*list) + sizeof(struct opcode) * length); | |
98fa08a5 PC |
1354 | if (!list) { |
1355 | pr_err("Unable to allocate memory\n"); | |
1356 | return NULL; | |
1357 | } | |
1358 | ||
ba3814c1 PC |
1359 | list->nb_ops = (u16) length; |
1360 | ||
98fa08a5 | 1361 | for (i = 0; i < length; i++) { |
ba3814c1 PC |
1362 | list->ops[i].opcode = LE32TOH(src[i]); |
1363 | list->ops[i].flags = 0; | |
98fa08a5 PC |
1364 | } |
1365 | ||
1366 | *len = length * sizeof(u32); | |
1367 | ||
ba3814c1 | 1368 | return list->ops; |
d16005f8 PC |
1369 | } |
1370 | ||
1371 | static struct block * lightrec_precompile_block(struct lightrec_state *state, | |
1372 | u32 pc) | |
1373 | { | |
1374 | struct opcode *list; | |
1375 | struct block *block; | |
ba3814c1 | 1376 | void *host, *addr; |
98fa08a5 PC |
1377 | const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg(pc)); |
1378 | const u32 *code = (u32 *) host; | |
d16005f8 | 1379 | unsigned int length; |
98fa08a5 | 1380 | bool fully_tagged; |
ba3814c1 | 1381 | u8 block_flags = 0; |
d16005f8 PC |
1382 | |
1383 | if (!map) | |
1384 | return NULL; | |
1385 | ||
d16005f8 PC |
1386 | block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block)); |
1387 | if (!block) { | |
1388 | pr_err("Unable to recompile block: Out of memory\n"); | |
1389 | return NULL; | |
1390 | } | |
1391 | ||
1392 | list = lightrec_disassemble(state, code, &length); | |
1393 | if (!list) { | |
1394 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); | |
1395 | return NULL; | |
1396 | } | |
1397 | ||
1398 | block->pc = pc; | |
d16005f8 PC |
1399 | block->_jit = NULL; |
1400 | block->function = NULL; | |
1401 | block->opcode_list = list; | |
98fa08a5 | 1402 | block->code = code; |
d16005f8 PC |
1403 | block->next = NULL; |
1404 | block->flags = 0; | |
1405 | block->code_size = 0; | |
d8b04acd | 1406 | block->precompile_date = state->current_cycle; |
d16005f8 PC |
1407 | block->nb_ops = length / sizeof(u32); |
1408 | ||
98fa08a5 | 1409 | lightrec_optimize(state, block); |
d16005f8 PC |
1410 | |
1411 | length = block->nb_ops * sizeof(u32); | |
1412 | ||
1413 | lightrec_register(MEM_FOR_MIPS_CODE, length); | |
1414 | ||
1415 | if (ENABLE_DISASSEMBLER) { | |
98fa08a5 PC |
1416 | pr_debug("Disassembled block at PC: 0x%08x\n", block->pc); |
1417 | lightrec_print_disassembly(block, code); | |
d16005f8 PC |
1418 | } |
1419 | ||
98fa08a5 | 1420 | pr_debug("Block size: %hu opcodes\n", block->nb_ops); |
d16005f8 | 1421 | |
98fa08a5 PC |
1422 | fully_tagged = lightrec_block_is_fully_tagged(block); |
1423 | if (fully_tagged) | |
ba3814c1 | 1424 | block_flags |= BLOCK_FULLY_TAGGED; |
98fa08a5 | 1425 | |
ba3814c1 PC |
1426 | if (block_flags) |
1427 | block_set_flags(block, block_flags); | |
98fa08a5 | 1428 | |
d16005f8 PC |
1429 | block->hash = lightrec_calculate_block_hash(block); |
1430 | ||
ba3814c1 PC |
1431 | if (OPT_REPLACE_MEMSET && block_has_flag(block, BLOCK_IS_MEMSET)) |
1432 | addr = state->memset_func; | |
1433 | else | |
1434 | addr = state->get_next_block; | |
1435 | lut_write(state, lut_offset(pc), addr); | |
1436 | ||
cb72ea13 | 1437 | pr_debug("Blocks created: %u\n", ++state->nb_precompile); |
a59e5536 | 1438 | |
d16005f8 PC |
1439 | return block; |
1440 | } | |
1441 | ||
98fa08a5 | 1442 | static bool lightrec_block_is_fully_tagged(const struct block *block) |
d16005f8 | 1443 | { |
98fa08a5 PC |
1444 | const struct opcode *op; |
1445 | unsigned int i; | |
1446 | ||
1447 | for (i = 0; i < block->nb_ops; i++) { | |
1448 | op = &block->opcode_list[i]; | |
d16005f8 | 1449 | |
cb72ea13 PC |
1450 | /* If we have one branch that must be emulated, we cannot trash |
1451 | * the opcode list. */ | |
1452 | if (should_emulate(op)) | |
1453 | return false; | |
1454 | ||
1455 | /* Check all loads/stores of the opcode list and mark the | |
d16005f8 PC |
1456 | * block as fully compiled if they all have been tagged. */ |
1457 | switch (op->c.i.op) { | |
1458 | case OP_LB: | |
1459 | case OP_LH: | |
1460 | case OP_LWL: | |
1461 | case OP_LW: | |
1462 | case OP_LBU: | |
1463 | case OP_LHU: | |
1464 | case OP_LWR: | |
1465 | case OP_SB: | |
1466 | case OP_SH: | |
1467 | case OP_SWL: | |
1468 | case OP_SW: | |
1469 | case OP_SWR: | |
1470 | case OP_LWC2: | |
1471 | case OP_SWC2: | |
22eee2ac | 1472 | if (!LIGHTREC_FLAGS_GET_IO_MODE(op->flags)) |
d16005f8 | 1473 | return false; |
d8b04acd PC |
1474 | fallthrough; |
1475 | default: | |
d16005f8 PC |
1476 | continue; |
1477 | } | |
1478 | } | |
1479 | ||
1480 | return true; | |
1481 | } | |
1482 | ||
98fa08a5 | 1483 | static void lightrec_reap_block(struct lightrec_state *state, void *data) |
a59e5536 | 1484 | { |
1485 | struct block *block = data; | |
1486 | ||
1487 | pr_debug("Reap dead block at PC 0x%08x\n", block->pc); | |
98fa08a5 PC |
1488 | lightrec_unregister_block(state->block_cache, block); |
1489 | lightrec_free_block(state, block); | |
a59e5536 | 1490 | } |
1491 | ||
98fa08a5 | 1492 | static void lightrec_reap_jit(struct lightrec_state *state, void *data) |
a59e5536 | 1493 | { |
1494 | _jit_destroy_state(data); | |
1495 | } | |
1496 | ||
02487de7 PC |
1497 | static void lightrec_free_function(struct lightrec_state *state, void *fn) |
1498 | { | |
1499 | if (ENABLE_CODE_BUFFER && state->tlsf) { | |
1500 | pr_debug("Freeing code block at 0x%" PRIxPTR "\n", (uintptr_t) fn); | |
d8b04acd | 1501 | lightrec_free_code(state, fn); |
02487de7 PC |
1502 | } |
1503 | } | |
1504 | ||
1505 | static void lightrec_reap_function(struct lightrec_state *state, void *data) | |
1506 | { | |
1507 | lightrec_free_function(state, data); | |
1508 | } | |
1509 | ||
ba3814c1 PC |
1510 | static void lightrec_reap_opcode_list(struct lightrec_state *state, void *data) |
1511 | { | |
1512 | lightrec_free_opcode_list(state, data); | |
1513 | } | |
1514 | ||
98fa08a5 PC |
1515 | int lightrec_compile_block(struct lightrec_cstate *cstate, |
1516 | struct block *block) | |
d16005f8 | 1517 | { |
98fa08a5 | 1518 | struct lightrec_state *state = cstate->state; |
a59e5536 | 1519 | struct lightrec_branch_target *target; |
ba3814c1 | 1520 | bool fully_tagged = false; |
a59e5536 | 1521 | struct block *block2; |
d16005f8 | 1522 | struct opcode *elm; |
a59e5536 | 1523 | jit_state_t *_jit, *oldjit; |
d16005f8 PC |
1524 | jit_node_t *start_of_block; |
1525 | bool skip_next = false; | |
d8b04acd | 1526 | void *old_fn, *new_fn; |
ba3814c1 | 1527 | size_t old_code_size; |
d16005f8 | 1528 | unsigned int i, j; |
ba3814c1 | 1529 | u8 old_flags; |
98fa08a5 | 1530 | u32 offset; |
d16005f8 PC |
1531 | |
1532 | fully_tagged = lightrec_block_is_fully_tagged(block); | |
1533 | if (fully_tagged) | |
ba3814c1 | 1534 | block_set_flags(block, BLOCK_FULLY_TAGGED); |
d16005f8 PC |
1535 | |
1536 | _jit = jit_new_state(); | |
1537 | if (!_jit) | |
1538 | return -ENOMEM; | |
1539 | ||
a59e5536 | 1540 | oldjit = block->_jit; |
02487de7 | 1541 | old_fn = block->function; |
ba3814c1 | 1542 | old_code_size = block->code_size; |
d16005f8 PC |
1543 | block->_jit = _jit; |
1544 | ||
98fa08a5 | 1545 | lightrec_regcache_reset(cstate->reg_cache); |
9259d748 PC |
1546 | lightrec_preload_pc(cstate->reg_cache); |
1547 | ||
98fa08a5 | 1548 | cstate->cycles = 0; |
98fa08a5 PC |
1549 | cstate->nb_local_branches = 0; |
1550 | cstate->nb_targets = 0; | |
cb72ea13 | 1551 | cstate->no_load_delay = false; |
d16005f8 PC |
1552 | |
1553 | jit_prolog(); | |
1554 | jit_tramp(256); | |
1555 | ||
1556 | start_of_block = jit_label(); | |
1557 | ||
98fa08a5 PC |
1558 | for (i = 0; i < block->nb_ops; i++) { |
1559 | elm = &block->opcode_list[i]; | |
d16005f8 PC |
1560 | |
1561 | if (skip_next) { | |
1562 | skip_next = false; | |
1563 | continue; | |
1564 | } | |
1565 | ||
98fa08a5 | 1566 | if (should_emulate(elm)) { |
d16005f8 | 1567 | pr_debug("Branch at offset 0x%x will be emulated\n", |
98fa08a5 PC |
1568 | i << 2); |
1569 | ||
cb72ea13 | 1570 | lightrec_emit_jump_to_interpreter(cstate, block, i); |
03535202 | 1571 | skip_next = !op_flag_no_ds(elm->flags); |
98fa08a5 PC |
1572 | } else { |
1573 | lightrec_rec_opcode(cstate, block, i); | |
03535202 | 1574 | skip_next = !op_flag_no_ds(elm->flags) && has_delay_slot(elm->c); |
d16005f8 PC |
1575 | #if _WIN32 |
1576 | /* FIXME: GNU Lightning on Windows seems to use our | |
1577 | * mapped registers as temporaries. Until the actual bug | |
1578 | * is found and fixed, unconditionally mark our | |
1579 | * registers as live here. */ | |
98fa08a5 | 1580 | lightrec_regcache_mark_live(cstate->reg_cache, _jit); |
d16005f8 PC |
1581 | #endif |
1582 | } | |
03535202 PC |
1583 | |
1584 | cstate->cycles += lightrec_cycles_of_opcode(elm->c); | |
d16005f8 PC |
1585 | } |
1586 | ||
98fa08a5 PC |
1587 | for (i = 0; i < cstate->nb_local_branches; i++) { |
1588 | struct lightrec_branch *branch = &cstate->local_branches[i]; | |
d16005f8 PC |
1589 | |
1590 | pr_debug("Patch local branch to offset 0x%x\n", | |
1591 | branch->target << 2); | |
1592 | ||
1593 | if (branch->target == 0) { | |
1594 | jit_patch_at(branch->branch, start_of_block); | |
1595 | continue; | |
1596 | } | |
1597 | ||
98fa08a5 PC |
1598 | for (j = 0; j < cstate->nb_targets; j++) { |
1599 | if (cstate->targets[j].offset == branch->target) { | |
d16005f8 | 1600 | jit_patch_at(branch->branch, |
98fa08a5 | 1601 | cstate->targets[j].label); |
d16005f8 PC |
1602 | break; |
1603 | } | |
1604 | } | |
1605 | ||
98fa08a5 | 1606 | if (j == cstate->nb_targets) |
d16005f8 PC |
1607 | pr_err("Unable to find branch target\n"); |
1608 | } | |
1609 | ||
d16005f8 PC |
1610 | jit_ret(); |
1611 | jit_epilog(); | |
1612 | ||
d8b04acd PC |
1613 | new_fn = lightrec_emit_code(state, block, _jit, &block->code_size); |
1614 | if (!new_fn) { | |
1615 | if (!ENABLE_THREADED_COMPILER) | |
1616 | pr_err("Unable to compile block!\n"); | |
1617 | block->_jit = oldjit; | |
ba3814c1 | 1618 | jit_clear_state(); |
d8b04acd PC |
1619 | _jit_destroy_state(_jit); |
1620 | return -ENOMEM; | |
02487de7 PC |
1621 | } |
1622 | ||
ba3814c1 PC |
1623 | /* Pause the reaper, because lightrec_reset_lut_offset() may try to set |
1624 | * the old block->function pointer to the code LUT. */ | |
1625 | if (ENABLE_THREADED_COMPILER) | |
1626 | lightrec_reaper_pause(state->reaper); | |
1627 | ||
d8b04acd | 1628 | block->function = new_fn; |
ba3814c1 | 1629 | block_clear_flags(block, BLOCK_SHOULD_RECOMPILE); |
d16005f8 PC |
1630 | |
1631 | /* Add compiled function to the LUT */ | |
02487de7 | 1632 | lut_write(state, lut_offset(block->pc), block->function); |
d16005f8 | 1633 | |
ba3814c1 PC |
1634 | if (ENABLE_THREADED_COMPILER) |
1635 | lightrec_reaper_continue(state->reaper); | |
a59e5536 | 1636 | |
1637 | /* Detect old blocks that have been covered by the new one */ | |
98fa08a5 PC |
1638 | for (i = 0; i < cstate->nb_targets; i++) { |
1639 | target = &cstate->targets[i]; | |
a59e5536 | 1640 | |
1641 | if (!target->offset) | |
1642 | continue; | |
1643 | ||
1644 | offset = block->pc + target->offset * sizeof(u32); | |
ba3814c1 PC |
1645 | |
1646 | /* Pause the reaper while we search for the block until we set | |
1647 | * the BLOCK_IS_DEAD flag, otherwise the block may be removed | |
1648 | * under our feet. */ | |
1649 | if (ENABLE_THREADED_COMPILER) | |
1650 | lightrec_reaper_pause(state->reaper); | |
1651 | ||
a59e5536 | 1652 | block2 = lightrec_find_block(state->block_cache, offset); |
1653 | if (block2) { | |
1654 | /* No need to check if block2 is compilable - it must | |
1655 | * be, otherwise block wouldn't be compilable either */ | |
1656 | ||
98fa08a5 PC |
1657 | /* Set the "block dead" flag to prevent the dynarec from |
1658 | * recompiling this block */ | |
ba3814c1 PC |
1659 | old_flags = block_set_flags(block2, BLOCK_IS_DEAD); |
1660 | } | |
1661 | ||
1662 | if (ENABLE_THREADED_COMPILER) { | |
1663 | lightrec_reaper_continue(state->reaper); | |
a59e5536 | 1664 | |
98fa08a5 PC |
1665 | /* If block2 was pending for compilation, cancel it. |
1666 | * If it's being compiled right now, wait until it | |
1667 | * finishes. */ | |
ba3814c1 | 1668 | if (block2) |
98fa08a5 | 1669 | lightrec_recompiler_remove(state->rec, block2); |
fd58fa32 | 1670 | } |
98fa08a5 | 1671 | |
fd58fa32 PC |
1672 | /* We know from now on that block2 (if present) isn't going to |
1673 | * be compiled. We can override the LUT entry with our new | |
1674 | * block's entry point. */ | |
1675 | offset = lut_offset(block->pc) + target->offset; | |
02487de7 | 1676 | lut_write(state, offset, jit_address(target->label)); |
98fa08a5 | 1677 | |
fd58fa32 | 1678 | if (block2) { |
a59e5536 | 1679 | pr_debug("Reap block 0x%08x as it's covered by block " |
1680 | "0x%08x\n", block2->pc, block->pc); | |
1681 | ||
98fa08a5 | 1682 | /* Finally, reap the block. */ |
ba3814c1 PC |
1683 | if (!ENABLE_THREADED_COMPILER) { |
1684 | lightrec_unregister_block(state->block_cache, block2); | |
1685 | lightrec_free_block(state, block2); | |
1686 | } else if (!(old_flags & BLOCK_IS_DEAD)) { | |
a59e5536 | 1687 | lightrec_reaper_add(state->reaper, |
1688 | lightrec_reap_block, | |
1689 | block2); | |
a59e5536 | 1690 | } |
1691 | } | |
1692 | } | |
1693 | ||
d16005f8 | 1694 | if (ENABLE_DISASSEMBLER) { |
98fa08a5 | 1695 | pr_debug("Compiling block at PC: 0x%08x\n", block->pc); |
d16005f8 PC |
1696 | jit_disassemble(); |
1697 | } | |
1698 | ||
1699 | jit_clear_state(); | |
1700 | ||
d16005f8 | 1701 | if (fully_tagged) |
ba3814c1 PC |
1702 | old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST); |
1703 | ||
1704 | if (fully_tagged && !(old_flags & BLOCK_NO_OPCODE_LIST)) { | |
d16005f8 PC |
1705 | pr_debug("Block PC 0x%08x is fully tagged" |
1706 | " - free opcode list\n", block->pc); | |
ba3814c1 PC |
1707 | |
1708 | if (ENABLE_THREADED_COMPILER) { | |
1709 | lightrec_reaper_add(state->reaper, | |
1710 | lightrec_reap_opcode_list, | |
1711 | block->opcode_list); | |
1712 | } else { | |
1713 | lightrec_free_opcode_list(state, block->opcode_list); | |
1714 | } | |
d16005f8 PC |
1715 | } |
1716 | ||
a59e5536 | 1717 | if (oldjit) { |
1718 | pr_debug("Block 0x%08x recompiled, reaping old jit context.\n", | |
1719 | block->pc); | |
1720 | ||
02487de7 | 1721 | if (ENABLE_THREADED_COMPILER) { |
a59e5536 | 1722 | lightrec_reaper_add(state->reaper, |
1723 | lightrec_reap_jit, oldjit); | |
02487de7 PC |
1724 | lightrec_reaper_add(state->reaper, |
1725 | lightrec_reap_function, old_fn); | |
1726 | } else { | |
a59e5536 | 1727 | _jit_destroy_state(oldjit); |
02487de7 PC |
1728 | lightrec_free_function(state, old_fn); |
1729 | } | |
ba3814c1 PC |
1730 | |
1731 | lightrec_unregister(MEM_FOR_CODE, old_code_size); | |
a59e5536 | 1732 | } |
1733 | ||
cb72ea13 PC |
1734 | pr_debug("Blocks compiled: %u\n", ++state->nb_compile); |
1735 | ||
d16005f8 PC |
1736 | return 0; |
1737 | } | |
1738 | ||
98fa08a5 PC |
1739 | static void lightrec_print_info(struct lightrec_state *state) |
1740 | { | |
1741 | if ((state->current_cycle & ~0xfffffff) != state->old_cycle_counter) { | |
1742 | pr_info("Lightrec RAM usage: IR %u KiB, CODE %u KiB, " | |
1743 | "MIPS %u KiB, TOTAL %u KiB, avg. IPI %f\n", | |
1744 | lightrec_get_mem_usage(MEM_FOR_IR) / 1024, | |
1745 | lightrec_get_mem_usage(MEM_FOR_CODE) / 1024, | |
1746 | lightrec_get_mem_usage(MEM_FOR_MIPS_CODE) / 1024, | |
1747 | lightrec_get_total_mem_usage() / 1024, | |
1748 | lightrec_get_average_ipi()); | |
1749 | state->old_cycle_counter = state->current_cycle & ~0xfffffff; | |
1750 | } | |
1751 | } | |
1752 | ||
d16005f8 PC |
1753 | u32 lightrec_execute(struct lightrec_state *state, u32 pc, u32 target_cycle) |
1754 | { | |
9259d748 | 1755 | s32 (*func)(struct lightrec_state *, u32, void *, s32) = (void *)state->dispatcher->function; |
d16005f8 PC |
1756 | void *block_trace; |
1757 | s32 cycles_delta; | |
1758 | ||
1759 | state->exit_flags = LIGHTREC_EXIT_NORMAL; | |
1760 | ||
1761 | /* Handle the cycle counter overflowing */ | |
1762 | if (unlikely(target_cycle < state->current_cycle)) | |
1763 | target_cycle = UINT_MAX; | |
1764 | ||
1765 | state->target_cycle = target_cycle; | |
98fa08a5 | 1766 | state->next_pc = pc; |
d16005f8 PC |
1767 | |
1768 | block_trace = get_next_block_func(state, pc); | |
1769 | if (block_trace) { | |
1770 | cycles_delta = state->target_cycle - state->current_cycle; | |
1771 | ||
9259d748 PC |
1772 | cycles_delta = (*func)(state, state->next_pc, |
1773 | block_trace, cycles_delta); | |
d16005f8 PC |
1774 | |
1775 | state->current_cycle = state->target_cycle - cycles_delta; | |
1776 | } | |
1777 | ||
a59e5536 | 1778 | if (ENABLE_THREADED_COMPILER) |
1779 | lightrec_reaper_reap(state->reaper); | |
1780 | ||
98fa08a5 PC |
1781 | if (LOG_LEVEL >= INFO_L) |
1782 | lightrec_print_info(state); | |
1783 | ||
d16005f8 PC |
1784 | return state->next_pc; |
1785 | } | |
1786 | ||
ba3814c1 PC |
1787 | u32 lightrec_run_interpreter(struct lightrec_state *state, u32 pc, |
1788 | u32 target_cycle) | |
d16005f8 | 1789 | { |
ba3814c1 | 1790 | struct block *block; |
d16005f8 PC |
1791 | |
1792 | state->exit_flags = LIGHTREC_EXIT_NORMAL; | |
ba3814c1 PC |
1793 | state->target_cycle = target_cycle; |
1794 | ||
1795 | do { | |
1796 | block = lightrec_get_block(state, pc); | |
1797 | if (!block) | |
1798 | break; | |
1799 | ||
1800 | pc = lightrec_emulate_block(state, block, pc); | |
d16005f8 | 1801 | |
ba3814c1 PC |
1802 | if (ENABLE_THREADED_COMPILER) |
1803 | lightrec_reaper_reap(state->reaper); | |
1804 | } while (state->current_cycle < state->target_cycle); | |
98fa08a5 PC |
1805 | |
1806 | if (LOG_LEVEL >= INFO_L) | |
1807 | lightrec_print_info(state); | |
1808 | ||
1809 | return pc; | |
d16005f8 PC |
1810 | } |
1811 | ||
98fa08a5 | 1812 | void lightrec_free_block(struct lightrec_state *state, struct block *block) |
d16005f8 | 1813 | { |
ba3814c1 PC |
1814 | u8 old_flags; |
1815 | ||
d16005f8 | 1816 | lightrec_unregister(MEM_FOR_MIPS_CODE, block->nb_ops * sizeof(u32)); |
ba3814c1 PC |
1817 | old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST); |
1818 | ||
1819 | if (!(old_flags & BLOCK_NO_OPCODE_LIST)) | |
1820 | lightrec_free_opcode_list(state, block->opcode_list); | |
d16005f8 PC |
1821 | if (block->_jit) |
1822 | _jit_destroy_state(block->_jit); | |
d8b04acd PC |
1823 | if (block->function) { |
1824 | lightrec_free_function(state, block->function); | |
1825 | lightrec_unregister(MEM_FOR_CODE, block->code_size); | |
1826 | } | |
98fa08a5 PC |
1827 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); |
1828 | } | |
1829 | ||
1830 | struct lightrec_cstate * lightrec_create_cstate(struct lightrec_state *state) | |
1831 | { | |
1832 | struct lightrec_cstate *cstate; | |
1833 | ||
1834 | cstate = lightrec_malloc(state, MEM_FOR_LIGHTREC, sizeof(*cstate)); | |
1835 | if (!cstate) | |
1836 | return NULL; | |
1837 | ||
1838 | cstate->reg_cache = lightrec_regcache_init(state); | |
1839 | if (!cstate->reg_cache) { | |
1840 | lightrec_free(state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate); | |
1841 | return NULL; | |
1842 | } | |
1843 | ||
1844 | cstate->state = state; | |
1845 | ||
1846 | return cstate; | |
1847 | } | |
1848 | ||
1849 | void lightrec_free_cstate(struct lightrec_cstate *cstate) | |
1850 | { | |
1851 | lightrec_free_regcache(cstate->reg_cache); | |
1852 | lightrec_free(cstate->state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate); | |
d16005f8 PC |
1853 | } |
1854 | ||
1855 | struct lightrec_state * lightrec_init(char *argv0, | |
1856 | const struct lightrec_mem_map *map, | |
1857 | size_t nb, | |
1858 | const struct lightrec_ops *ops) | |
1859 | { | |
d8b04acd | 1860 | const struct lightrec_mem_map *codebuf_map = &map[PSX_MAP_CODE_BUFFER]; |
d16005f8 | 1861 | struct lightrec_state *state; |
02487de7 PC |
1862 | uintptr_t addr; |
1863 | void *tlsf = NULL; | |
1864 | bool with_32bit_lut = false; | |
1865 | size_t lut_size; | |
d16005f8 PC |
1866 | |
1867 | /* Sanity-check ops */ | |
98fa08a5 | 1868 | if (!ops || !ops->cop2_op || !ops->enable_ram) { |
d16005f8 PC |
1869 | pr_err("Missing callbacks in lightrec_ops structure\n"); |
1870 | return NULL; | |
1871 | } | |
1872 | ||
fdf33147 PC |
1873 | if (ops->cop2_notify) |
1874 | pr_debug("Optional cop2_notify callback in lightrec_ops\n"); | |
1875 | else | |
1876 | pr_debug("No optional cop2_notify callback in lightrec_ops\n"); | |
1877 | ||
d8b04acd PC |
1878 | if (ENABLE_CODE_BUFFER && nb > PSX_MAP_CODE_BUFFER |
1879 | && codebuf_map->address) { | |
02487de7 PC |
1880 | tlsf = tlsf_create_with_pool(codebuf_map->address, |
1881 | codebuf_map->length); | |
1882 | if (!tlsf) { | |
1883 | pr_err("Unable to initialize code buffer\n"); | |
1884 | return NULL; | |
1885 | } | |
1886 | ||
1887 | if (__WORDSIZE == 64) { | |
1888 | addr = (uintptr_t) codebuf_map->address + codebuf_map->length - 1; | |
1889 | with_32bit_lut = addr == (u32) addr; | |
1890 | } | |
1891 | } | |
1892 | ||
1893 | if (with_32bit_lut) | |
1894 | lut_size = CODE_LUT_SIZE * 4; | |
1895 | else | |
1896 | lut_size = CODE_LUT_SIZE * sizeof(void *); | |
1897 | ||
d16005f8 PC |
1898 | init_jit(argv0); |
1899 | ||
02487de7 | 1900 | state = calloc(1, sizeof(*state) + lut_size); |
d16005f8 PC |
1901 | if (!state) |
1902 | goto err_finish_jit; | |
1903 | ||
02487de7 PC |
1904 | lightrec_register(MEM_FOR_LIGHTREC, sizeof(*state) + lut_size); |
1905 | ||
1906 | state->tlsf = tlsf; | |
1907 | state->with_32bit_lut = with_32bit_lut; | |
cb72ea13 | 1908 | state->in_delay_slot_n = 0xff; |
d16005f8 | 1909 | |
d16005f8 PC |
1910 | state->block_cache = lightrec_blockcache_init(state); |
1911 | if (!state->block_cache) | |
d8b04acd | 1912 | goto err_free_state; |
d16005f8 | 1913 | |
d16005f8 PC |
1914 | if (ENABLE_THREADED_COMPILER) { |
1915 | state->rec = lightrec_recompiler_init(state); | |
1916 | if (!state->rec) | |
98fa08a5 | 1917 | goto err_free_block_cache; |
a59e5536 | 1918 | |
1919 | state->reaper = lightrec_reaper_init(state); | |
1920 | if (!state->reaper) | |
1921 | goto err_free_recompiler; | |
98fa08a5 PC |
1922 | } else { |
1923 | state->cstate = lightrec_create_cstate(state); | |
1924 | if (!state->cstate) | |
1925 | goto err_free_block_cache; | |
d16005f8 PC |
1926 | } |
1927 | ||
1928 | state->nb_maps = nb; | |
1929 | state->maps = map; | |
1930 | ||
1931 | memcpy(&state->ops, ops, sizeof(*ops)); | |
1932 | ||
1933 | state->dispatcher = generate_dispatcher(state); | |
1934 | if (!state->dispatcher) | |
a59e5536 | 1935 | goto err_free_reaper; |
d16005f8 | 1936 | |
98fa08a5 PC |
1937 | state->c_wrapper_block = generate_wrapper(state); |
1938 | if (!state->c_wrapper_block) | |
d16005f8 PC |
1939 | goto err_free_dispatcher; |
1940 | ||
98fa08a5 PC |
1941 | state->c_wrappers[C_WRAPPER_RW] = lightrec_rw_cb; |
1942 | state->c_wrappers[C_WRAPPER_RW_GENERIC] = lightrec_rw_generic_cb; | |
fdf33147 | 1943 | state->c_wrappers[C_WRAPPER_MFC] = lightrec_mfc_cb; |
98fa08a5 | 1944 | state->c_wrappers[C_WRAPPER_MTC] = lightrec_mtc_cb; |
22eee2ac | 1945 | state->c_wrappers[C_WRAPPER_CP] = lightrec_cp_cb; |
d16005f8 PC |
1946 | |
1947 | map = &state->maps[PSX_MAP_BIOS]; | |
1948 | state->offset_bios = (uintptr_t)map->address - map->pc; | |
1949 | ||
1950 | map = &state->maps[PSX_MAP_SCRATCH_PAD]; | |
1951 | state->offset_scratch = (uintptr_t)map->address - map->pc; | |
1952 | ||
ba3814c1 PC |
1953 | map = &state->maps[PSX_MAP_HW_REGISTERS]; |
1954 | state->offset_io = (uintptr_t)map->address - map->pc; | |
1955 | ||
d16005f8 PC |
1956 | map = &state->maps[PSX_MAP_KERNEL_USER_RAM]; |
1957 | state->offset_ram = (uintptr_t)map->address - map->pc; | |
1958 | ||
1959 | if (state->maps[PSX_MAP_MIRROR1].address == map->address + 0x200000 && | |
1960 | state->maps[PSX_MAP_MIRROR2].address == map->address + 0x400000 && | |
1961 | state->maps[PSX_MAP_MIRROR3].address == map->address + 0x600000) | |
1962 | state->mirrors_mapped = true; | |
1963 | ||
98fa08a5 PC |
1964 | if (state->offset_bios == 0 && |
1965 | state->offset_scratch == 0 && | |
1966 | state->offset_ram == 0 && | |
ba3814c1 | 1967 | state->offset_io == 0 && |
98fa08a5 PC |
1968 | state->mirrors_mapped) { |
1969 | pr_info("Memory map is perfect. Emitted code will be best.\n"); | |
1970 | } else { | |
1971 | pr_info("Memory map is sub-par. Emitted code will be slow.\n"); | |
1972 | } | |
1973 | ||
02487de7 PC |
1974 | if (state->with_32bit_lut) |
1975 | pr_info("Using 32-bit LUT\n"); | |
1976 | ||
d16005f8 PC |
1977 | return state; |
1978 | ||
d16005f8 | 1979 | err_free_dispatcher: |
98fa08a5 | 1980 | lightrec_free_block(state, state->dispatcher); |
a59e5536 | 1981 | err_free_reaper: |
1982 | if (ENABLE_THREADED_COMPILER) | |
1983 | lightrec_reaper_destroy(state->reaper); | |
d16005f8 PC |
1984 | err_free_recompiler: |
1985 | if (ENABLE_THREADED_COMPILER) | |
1986 | lightrec_free_recompiler(state->rec); | |
98fa08a5 PC |
1987 | else |
1988 | lightrec_free_cstate(state->cstate); | |
d16005f8 PC |
1989 | err_free_block_cache: |
1990 | lightrec_free_block_cache(state->block_cache); | |
d16005f8 | 1991 | err_free_state: |
d16005f8 | 1992 | lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) + |
02487de7 | 1993 | lut_elm_size(state) * CODE_LUT_SIZE); |
d16005f8 PC |
1994 | free(state); |
1995 | err_finish_jit: | |
1996 | finish_jit(); | |
02487de7 PC |
1997 | if (ENABLE_CODE_BUFFER && tlsf) |
1998 | tlsf_destroy(tlsf); | |
d16005f8 PC |
1999 | return NULL; |
2000 | } | |
2001 | ||
2002 | void lightrec_destroy(struct lightrec_state *state) | |
2003 | { | |
98fa08a5 PC |
2004 | /* Force a print info on destroy*/ |
2005 | state->current_cycle = ~state->current_cycle; | |
2006 | lightrec_print_info(state); | |
2007 | ||
03535202 PC |
2008 | lightrec_free_block_cache(state->block_cache); |
2009 | lightrec_free_block(state, state->dispatcher); | |
2010 | lightrec_free_block(state, state->c_wrapper_block); | |
2011 | ||
a59e5536 | 2012 | if (ENABLE_THREADED_COMPILER) { |
d16005f8 | 2013 | lightrec_free_recompiler(state->rec); |
a59e5536 | 2014 | lightrec_reaper_destroy(state->reaper); |
98fa08a5 PC |
2015 | } else { |
2016 | lightrec_free_cstate(state->cstate); | |
a59e5536 | 2017 | } |
d16005f8 | 2018 | |
d16005f8 | 2019 | finish_jit(); |
02487de7 PC |
2020 | if (ENABLE_CODE_BUFFER && state->tlsf) |
2021 | tlsf_destroy(state->tlsf); | |
d16005f8 | 2022 | |
d16005f8 | 2023 | lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) + |
02487de7 | 2024 | lut_elm_size(state) * CODE_LUT_SIZE); |
d16005f8 PC |
2025 | free(state); |
2026 | } | |
2027 | ||
2028 | void lightrec_invalidate(struct lightrec_state *state, u32 addr, u32 len) | |
2029 | { | |
2030 | u32 kaddr = kunseg(addr & ~0x3); | |
d8b04acd | 2031 | enum psx_map idx = lightrec_get_map_idx(state, kaddr); |
d16005f8 | 2032 | |
d8b04acd PC |
2033 | switch (idx) { |
2034 | case PSX_MAP_MIRROR1: | |
2035 | case PSX_MAP_MIRROR2: | |
2036 | case PSX_MAP_MIRROR3: | |
d16005f8 | 2037 | /* Handle mirrors */ |
d8b04acd PC |
2038 | kaddr &= RAM_SIZE - 1; |
2039 | fallthrough; | |
2040 | case PSX_MAP_KERNEL_USER_RAM: | |
2041 | break; | |
2042 | default: | |
2043 | return; | |
d16005f8 | 2044 | } |
d8b04acd PC |
2045 | |
2046 | memset(lut_address(state, lut_offset(kaddr)), 0, | |
2047 | ((len + 3) / 4) * lut_elm_size(state)); | |
d16005f8 PC |
2048 | } |
2049 | ||
2050 | void lightrec_invalidate_all(struct lightrec_state *state) | |
2051 | { | |
02487de7 | 2052 | memset(state->code_lut, 0, lut_elm_size(state) * CODE_LUT_SIZE); |
d16005f8 PC |
2053 | } |
2054 | ||
2055 | void lightrec_set_invalidate_mode(struct lightrec_state *state, bool dma_only) | |
2056 | { | |
2057 | if (state->invalidate_from_dma_only != dma_only) | |
2058 | lightrec_invalidate_all(state); | |
2059 | ||
2060 | state->invalidate_from_dma_only = dma_only; | |
2061 | } | |
2062 | ||
2063 | void lightrec_set_exit_flags(struct lightrec_state *state, u32 flags) | |
2064 | { | |
2065 | if (flags != LIGHTREC_EXIT_NORMAL) { | |
2066 | state->exit_flags |= flags; | |
2067 | state->target_cycle = state->current_cycle; | |
2068 | } | |
2069 | } | |
2070 | ||
2071 | u32 lightrec_exit_flags(struct lightrec_state *state) | |
2072 | { | |
2073 | return state->exit_flags; | |
2074 | } | |
2075 | ||
d16005f8 PC |
2076 | u32 lightrec_current_cycle_count(const struct lightrec_state *state) |
2077 | { | |
2078 | return state->current_cycle; | |
2079 | } | |
2080 | ||
2081 | void lightrec_reset_cycle_count(struct lightrec_state *state, u32 cycles) | |
2082 | { | |
2083 | state->current_cycle = cycles; | |
2084 | ||
2085 | if (state->target_cycle < cycles) | |
2086 | state->target_cycle = cycles; | |
2087 | } | |
2088 | ||
2089 | void lightrec_set_target_cycle_count(struct lightrec_state *state, u32 cycles) | |
2090 | { | |
2091 | if (state->exit_flags == LIGHTREC_EXIT_NORMAL) { | |
2092 | if (cycles < state->current_cycle) | |
2093 | cycles = state->current_cycle; | |
2094 | ||
2095 | state->target_cycle = cycles; | |
2096 | } | |
2097 | } | |
98fa08a5 PC |
2098 | |
2099 | struct lightrec_registers * lightrec_get_registers(struct lightrec_state *state) | |
2100 | { | |
2101 | return &state->regs; | |
2102 | } |