Commit | Line | Data |
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98fa08a5 | 1 | // SPDX-License-Identifier: LGPL-2.1-or-later |
d16005f8 | 2 | /* |
98fa08a5 | 3 | * Copyright (C) 2014-2021 Paul Cercueil <paul@crapouillou.net> |
d16005f8 PC |
4 | */ |
5 | ||
6 | #include "blockcache.h" | |
d16005f8 PC |
7 | #include "debug.h" |
8 | #include "disassembler.h" | |
9 | #include "emitter.h" | |
10 | #include "interpreter.h" | |
98fa08a5 PC |
11 | #include "lightrec-config.h" |
12 | #include "lightning-wrapper.h" | |
d16005f8 PC |
13 | #include "lightrec.h" |
14 | #include "memmanager.h" | |
a59e5536 | 15 | #include "reaper.h" |
d16005f8 PC |
16 | #include "recompiler.h" |
17 | #include "regcache.h" | |
18 | #include "optimizer.h" | |
02487de7 | 19 | #include "tlsf/tlsf.h" |
d16005f8 PC |
20 | |
21 | #include <errno.h> | |
98fa08a5 | 22 | #include <inttypes.h> |
d16005f8 PC |
23 | #include <limits.h> |
24 | #if ENABLE_THREADED_COMPILER | |
25 | #include <stdatomic.h> | |
26 | #endif | |
27 | #include <stdbool.h> | |
28 | #include <stddef.h> | |
29 | #include <string.h> | |
d16005f8 | 30 | |
d16005f8 PC |
31 | static struct block * lightrec_precompile_block(struct lightrec_state *state, |
32 | u32 pc); | |
98fa08a5 PC |
33 | static bool lightrec_block_is_fully_tagged(const struct block *block); |
34 | ||
35 | static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data); | |
36 | static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg); | |
d16005f8 | 37 | |
a5a6f7b8 PC |
38 | static void lightrec_reap_block(struct lightrec_state *state, void *data); |
39 | ||
a59e5536 | 40 | static void lightrec_default_sb(struct lightrec_state *state, u32 opcode, |
2e6c828e | 41 | void *host, u32 addr, u32 data) |
a59e5536 | 42 | { |
2e6c828e | 43 | *(u8 *)host = (u8)data; |
a59e5536 | 44 | |
684432ad | 45 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) |
a59e5536 | 46 | lightrec_invalidate(state, addr, 1); |
47 | } | |
48 | ||
49 | static void lightrec_default_sh(struct lightrec_state *state, u32 opcode, | |
2e6c828e | 50 | void *host, u32 addr, u32 data) |
a59e5536 | 51 | { |
2e6c828e | 52 | *(u16 *)host = HTOLE16((u16)data); |
a59e5536 | 53 | |
684432ad | 54 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) |
a59e5536 | 55 | lightrec_invalidate(state, addr, 2); |
56 | } | |
57 | ||
58 | static void lightrec_default_sw(struct lightrec_state *state, u32 opcode, | |
59 | void *host, u32 addr, u32 data) | |
60 | { | |
61 | *(u32 *)host = HTOLE32(data); | |
62 | ||
684432ad | 63 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) |
a59e5536 | 64 | lightrec_invalidate(state, addr, 4); |
65 | } | |
66 | ||
67 | static u8 lightrec_default_lb(struct lightrec_state *state, | |
68 | u32 opcode, void *host, u32 addr) | |
69 | { | |
70 | return *(u8 *)host; | |
71 | } | |
72 | ||
73 | static u16 lightrec_default_lh(struct lightrec_state *state, | |
74 | u32 opcode, void *host, u32 addr) | |
75 | { | |
76 | return LE16TOH(*(u16 *)host); | |
77 | } | |
78 | ||
79 | static u32 lightrec_default_lw(struct lightrec_state *state, | |
80 | u32 opcode, void *host, u32 addr) | |
81 | { | |
82 | return LE32TOH(*(u32 *)host); | |
83 | } | |
84 | ||
5459088b PC |
85 | static u32 lightrec_default_lwu(struct lightrec_state *state, |
86 | u32 opcode, void *host, u32 addr) | |
87 | { | |
88 | u32 val; | |
89 | ||
90 | memcpy(&val, host, 4); | |
91 | ||
92 | return LE32TOH(val); | |
93 | } | |
94 | ||
95 | static void lightrec_default_swu(struct lightrec_state *state, u32 opcode, | |
96 | void *host, u32 addr, u32 data) | |
97 | { | |
98 | data = HTOLE32(data); | |
99 | ||
100 | memcpy(host, &data, 4); | |
101 | ||
102 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) | |
103 | lightrec_invalidate(state, addr & ~0x3, 8); | |
104 | } | |
105 | ||
a59e5536 | 106 | static const struct lightrec_mem_map_ops lightrec_default_ops = { |
107 | .sb = lightrec_default_sb, | |
108 | .sh = lightrec_default_sh, | |
109 | .sw = lightrec_default_sw, | |
110 | .lb = lightrec_default_lb, | |
111 | .lh = lightrec_default_lh, | |
112 | .lw = lightrec_default_lw, | |
5459088b PC |
113 | .lwu = lightrec_default_lwu, |
114 | .swu = lightrec_default_swu, | |
a59e5536 | 115 | }; |
116 | ||
98fa08a5 PC |
117 | static void __segfault_cb(struct lightrec_state *state, u32 addr, |
118 | const struct block *block) | |
d16005f8 PC |
119 | { |
120 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); | |
121 | pr_err("Segmentation fault in recompiled code: invalid " | |
f5ee77ca | 122 | "load/store at address "PC_FMT"\n", addr); |
98fa08a5 | 123 | if (block) |
f5ee77ca | 124 | pr_err("Was executing block "PC_FMT"\n", block->pc); |
d16005f8 PC |
125 | } |
126 | ||
a59e5536 | 127 | static void lightrec_swl(struct lightrec_state *state, |
128 | const struct lightrec_mem_map_ops *ops, | |
129 | u32 opcode, void *host, u32 addr, u32 data) | |
d16005f8 | 130 | { |
a59e5536 | 131 | unsigned int shift = addr & 0x3; |
13b02197 | 132 | unsigned int mask = shift < 3 ? GENMASK(31, (shift + 1) * 8) : 0; |
a59e5536 | 133 | u32 old_data; |
134 | ||
135 | /* Align to 32 bits */ | |
136 | addr &= ~3; | |
137 | host = (void *)((uintptr_t)host & ~3); | |
138 | ||
139 | old_data = ops->lw(state, opcode, host, addr); | |
140 | ||
141 | data = (data >> ((3 - shift) * 8)) | (old_data & mask); | |
142 | ||
143 | ops->sw(state, opcode, host, addr, data); | |
144 | } | |
145 | ||
146 | static void lightrec_swr(struct lightrec_state *state, | |
147 | const struct lightrec_mem_map_ops *ops, | |
148 | u32 opcode, void *host, u32 addr, u32 data) | |
149 | { | |
150 | unsigned int shift = addr & 0x3; | |
151 | unsigned int mask = (1 << (shift * 8)) - 1; | |
152 | u32 old_data; | |
153 | ||
154 | /* Align to 32 bits */ | |
155 | addr &= ~3; | |
156 | host = (void *)((uintptr_t)host & ~3); | |
157 | ||
158 | old_data = ops->lw(state, opcode, host, addr); | |
159 | ||
160 | data = (data << (shift * 8)) | (old_data & mask); | |
161 | ||
162 | ops->sw(state, opcode, host, addr, data); | |
163 | } | |
164 | ||
165 | static void lightrec_swc2(struct lightrec_state *state, union code op, | |
166 | const struct lightrec_mem_map_ops *ops, | |
167 | void *host, u32 addr) | |
168 | { | |
98fa08a5 | 169 | u32 data = lightrec_mfc2(state, op.i.rt); |
a59e5536 | 170 | |
171 | ops->sw(state, op.opcode, host, addr, data); | |
172 | } | |
173 | ||
174 | static u32 lightrec_lwl(struct lightrec_state *state, | |
175 | const struct lightrec_mem_map_ops *ops, | |
176 | u32 opcode, void *host, u32 addr, u32 data) | |
177 | { | |
178 | unsigned int shift = addr & 0x3; | |
179 | unsigned int mask = (1 << (24 - shift * 8)) - 1; | |
180 | u32 old_data; | |
181 | ||
182 | /* Align to 32 bits */ | |
183 | addr &= ~3; | |
184 | host = (void *)((uintptr_t)host & ~3); | |
185 | ||
186 | old_data = ops->lw(state, opcode, host, addr); | |
187 | ||
188 | return (data & mask) | (old_data << (24 - shift * 8)); | |
189 | } | |
190 | ||
191 | static u32 lightrec_lwr(struct lightrec_state *state, | |
192 | const struct lightrec_mem_map_ops *ops, | |
193 | u32 opcode, void *host, u32 addr, u32 data) | |
194 | { | |
195 | unsigned int shift = addr & 0x3; | |
13b02197 | 196 | unsigned int mask = shift ? GENMASK(31, 32 - shift * 8) : 0; |
a59e5536 | 197 | u32 old_data; |
198 | ||
199 | /* Align to 32 bits */ | |
200 | addr &= ~3; | |
201 | host = (void *)((uintptr_t)host & ~3); | |
202 | ||
203 | old_data = ops->lw(state, opcode, host, addr); | |
204 | ||
205 | return (data & mask) | (old_data >> (shift * 8)); | |
206 | } | |
207 | ||
208 | static void lightrec_lwc2(struct lightrec_state *state, union code op, | |
209 | const struct lightrec_mem_map_ops *ops, | |
210 | void *host, u32 addr) | |
211 | { | |
212 | u32 data = ops->lw(state, op.opcode, host, addr); | |
213 | ||
98fa08a5 | 214 | lightrec_mtc2(state, op.i.rt, data); |
d16005f8 PC |
215 | } |
216 | ||
217 | static void lightrec_invalidate_map(struct lightrec_state *state, | |
98fa08a5 | 218 | const struct lightrec_mem_map *map, u32 addr, u32 len) |
d16005f8 | 219 | { |
98fa08a5 | 220 | if (map == &state->maps[PSX_MAP_KERNEL_USER_RAM]) { |
02487de7 PC |
221 | memset(lut_address(state, lut_offset(addr)), 0, |
222 | ((len + 3) / 4) * lut_elm_size(state)); | |
98fa08a5 | 223 | } |
d16005f8 PC |
224 | } |
225 | ||
9259d748 | 226 | static enum psx_map |
02487de7 | 227 | lightrec_get_map_idx(struct lightrec_state *state, u32 kaddr) |
d16005f8 | 228 | { |
98fa08a5 | 229 | const struct lightrec_mem_map *map; |
d16005f8 PC |
230 | unsigned int i; |
231 | ||
232 | for (i = 0; i < state->nb_maps; i++) { | |
02487de7 | 233 | map = &state->maps[i]; |
d16005f8 | 234 | |
02487de7 PC |
235 | if (kaddr >= map->pc && kaddr < map->pc + map->length) |
236 | return (enum psx_map) i; | |
d16005f8 PC |
237 | } |
238 | ||
02487de7 PC |
239 | return PSX_MAP_UNKNOWN; |
240 | } | |
241 | ||
242 | const struct lightrec_mem_map * | |
243 | lightrec_get_map(struct lightrec_state *state, void **host, u32 kaddr) | |
244 | { | |
245 | const struct lightrec_mem_map *map; | |
246 | enum psx_map idx; | |
247 | u32 addr; | |
248 | ||
249 | idx = lightrec_get_map_idx(state, kaddr); | |
250 | if (idx == PSX_MAP_UNKNOWN) | |
98fa08a5 PC |
251 | return NULL; |
252 | ||
02487de7 | 253 | map = &state->maps[idx]; |
98fa08a5 PC |
254 | addr = kaddr - map->pc; |
255 | ||
256 | while (map->mirror_of) | |
257 | map = map->mirror_of; | |
258 | ||
259 | if (host) | |
260 | *host = map->address + addr; | |
261 | ||
262 | return map; | |
d16005f8 PC |
263 | } |
264 | ||
cb72ea13 PC |
265 | u32 lightrec_rw(struct lightrec_state *state, union code op, u32 base, |
266 | u32 data, u32 *flags, struct block *block, u16 offset) | |
d16005f8 PC |
267 | { |
268 | const struct lightrec_mem_map *map; | |
a59e5536 | 269 | const struct lightrec_mem_map_ops *ops; |
98fa08a5 | 270 | u32 opcode = op.opcode; |
cb72ea13 PC |
271 | bool was_tagged = true; |
272 | u16 old_flags; | |
273 | u32 addr; | |
a59e5536 | 274 | void *host; |
d16005f8 | 275 | |
cb72ea13 | 276 | addr = kunseg(base + (s16) op.i.imm); |
d16005f8 | 277 | |
cb72ea13 | 278 | map = lightrec_get_map(state, &host, addr); |
d16005f8 | 279 | if (!map) { |
98fa08a5 | 280 | __segfault_cb(state, addr, block); |
d16005f8 PC |
281 | return 0; |
282 | } | |
283 | ||
cb72ea13 PC |
284 | if (flags) |
285 | was_tagged = LIGHTREC_FLAGS_GET_IO_MODE(*flags); | |
d16005f8 | 286 | |
6ce0b00a | 287 | if (likely(!map->ops)) { |
cb72ea13 PC |
288 | if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags)) { |
289 | /* Force parallel port accesses as HW accesses, because | |
290 | * the direct-I/O emitters can't differenciate it. */ | |
291 | if (unlikely(map == &state->maps[PSX_MAP_PARALLEL_PORT])) | |
292 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW); | |
293 | /* If the base register is 0x0, be extra suspicious. | |
294 | * Some games (e.g. Sled Storm) actually do segmentation | |
295 | * faults by using uninitialized pointers, which are | |
296 | * later initialized to point to hardware registers. */ | |
297 | else if (op.i.rs && base == 0x0) | |
298 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW); | |
299 | else | |
300 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_DIRECT); | |
301 | } | |
d16005f8 | 302 | |
a59e5536 | 303 | ops = &lightrec_default_ops; |
6ce0b00a PC |
304 | } else if (flags && |
305 | LIGHTREC_FLAGS_GET_IO_MODE(*flags) == LIGHTREC_IO_DIRECT_HW) { | |
306 | ops = &lightrec_default_ops; | |
307 | } else { | |
308 | if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags)) | |
309 | *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW); | |
310 | ||
311 | ops = map->ops; | |
a59e5536 | 312 | } |
d16005f8 | 313 | |
cb72ea13 PC |
314 | if (!was_tagged) { |
315 | old_flags = block_set_flags(block, BLOCK_SHOULD_RECOMPILE); | |
316 | ||
317 | if (!(old_flags & BLOCK_SHOULD_RECOMPILE)) { | |
f5ee77ca | 318 | pr_debug("Opcode of block at "PC_FMT" has been tagged" |
cb72ea13 PC |
319 | " - flag for recompilation\n", block->pc); |
320 | ||
321 | lut_write(state, lut_offset(block->pc), NULL); | |
322 | } | |
323 | } | |
324 | ||
d16005f8 PC |
325 | switch (op.i.op) { |
326 | case OP_SB: | |
2e6c828e | 327 | ops->sb(state, opcode, host, addr, data); |
d16005f8 PC |
328 | return 0; |
329 | case OP_SH: | |
2e6c828e | 330 | ops->sh(state, opcode, host, addr, data); |
d16005f8 PC |
331 | return 0; |
332 | case OP_SWL: | |
a59e5536 | 333 | lightrec_swl(state, ops, opcode, host, addr, data); |
d16005f8 PC |
334 | return 0; |
335 | case OP_SWR: | |
a59e5536 | 336 | lightrec_swr(state, ops, opcode, host, addr, data); |
d16005f8 PC |
337 | return 0; |
338 | case OP_SW: | |
a59e5536 | 339 | ops->sw(state, opcode, host, addr, data); |
d16005f8 PC |
340 | return 0; |
341 | case OP_SWC2: | |
a59e5536 | 342 | lightrec_swc2(state, op, ops, host, addr); |
d16005f8 PC |
343 | return 0; |
344 | case OP_LB: | |
a59e5536 | 345 | return (s32) (s8) ops->lb(state, opcode, host, addr); |
d16005f8 | 346 | case OP_LBU: |
a59e5536 | 347 | return ops->lb(state, opcode, host, addr); |
d16005f8 | 348 | case OP_LH: |
a59e5536 | 349 | return (s32) (s16) ops->lh(state, opcode, host, addr); |
d16005f8 | 350 | case OP_LHU: |
a59e5536 | 351 | return ops->lh(state, opcode, host, addr); |
d16005f8 | 352 | case OP_LWC2: |
a59e5536 | 353 | lightrec_lwc2(state, op, ops, host, addr); |
d16005f8 | 354 | return 0; |
a59e5536 | 355 | case OP_LWL: |
356 | return lightrec_lwl(state, ops, opcode, host, addr, data); | |
357 | case OP_LWR: | |
358 | return lightrec_lwr(state, ops, opcode, host, addr, data); | |
5459088b PC |
359 | case OP_META_LWU: |
360 | return ops->lwu(state, opcode, host, addr); | |
361 | case OP_META_SWU: | |
362 | ops->swu(state, opcode, host, addr, data); | |
363 | return 0; | |
d16005f8 PC |
364 | case OP_LW: |
365 | default: | |
a59e5536 | 366 | return ops->lw(state, opcode, host, addr); |
d16005f8 PC |
367 | } |
368 | } | |
369 | ||
370 | static void lightrec_rw_helper(struct lightrec_state *state, | |
03535202 | 371 | union code op, u32 *flags, |
cb72ea13 | 372 | struct block *block, u16 offset) |
d16005f8 | 373 | { |
98fa08a5 | 374 | u32 ret = lightrec_rw(state, op, state->regs.gpr[op.i.rs], |
cb72ea13 | 375 | state->regs.gpr[op.i.rt], flags, block, offset); |
d16005f8 PC |
376 | |
377 | switch (op.i.op) { | |
378 | case OP_LB: | |
379 | case OP_LBU: | |
380 | case OP_LH: | |
381 | case OP_LHU: | |
382 | case OP_LWL: | |
383 | case OP_LWR: | |
384 | case OP_LW: | |
5459088b | 385 | case OP_META_LWU: |
cb72ea13 PC |
386 | if (OPT_HANDLE_LOAD_DELAYS && unlikely(!state->in_delay_slot_n)) { |
387 | state->temp_reg = ret; | |
388 | state->in_delay_slot_n = 0xff; | |
389 | } else if (op.i.rt) { | |
98fa08a5 | 390 | state->regs.gpr[op.i.rt] = ret; |
cb72ea13 | 391 | } |
d8b04acd PC |
392 | fallthrough; |
393 | default: | |
d16005f8 PC |
394 | break; |
395 | } | |
396 | } | |
397 | ||
03535202 | 398 | static void lightrec_rw_cb(struct lightrec_state *state, u32 arg) |
d16005f8 | 399 | { |
cb72ea13 | 400 | lightrec_rw_helper(state, (union code) arg, NULL, NULL, 0); |
d16005f8 PC |
401 | } |
402 | ||
03535202 | 403 | static void lightrec_rw_generic_cb(struct lightrec_state *state, u32 arg) |
d16005f8 | 404 | { |
98fa08a5 PC |
405 | struct block *block; |
406 | struct opcode *op; | |
98fa08a5 PC |
407 | u16 offset = (u16)arg; |
408 | ||
409 | block = lightrec_find_block_from_lut(state->block_cache, | |
0e720fb1 | 410 | arg >> 16, state->curr_pc); |
98fa08a5 | 411 | if (unlikely(!block)) { |
f5ee77ca | 412 | pr_err("rw_generic: No block found in LUT for "PC_FMT" offset 0x%"PRIx16"\n", |
0e720fb1 | 413 | state->curr_pc, offset); |
ba3814c1 | 414 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); |
98fa08a5 PC |
415 | return; |
416 | } | |
417 | ||
418 | op = &block->opcode_list[offset]; | |
cb72ea13 | 419 | lightrec_rw_helper(state, op->c, &op->flags, block, offset); |
d16005f8 PC |
420 | } |
421 | ||
98fa08a5 | 422 | static u32 clamp_s32(s32 val, s32 min, s32 max) |
d16005f8 | 423 | { |
98fa08a5 PC |
424 | return val < min ? min : val > max ? max : val; |
425 | } | |
d16005f8 | 426 | |
11357fef PC |
427 | static u16 load_u16(u32 *ptr) |
428 | { | |
429 | return ((struct u16x2 *) ptr)->l; | |
430 | } | |
431 | ||
432 | static void store_u16(u32 *ptr, u16 value) | |
433 | { | |
434 | ((struct u16x2 *) ptr)->l = value; | |
435 | } | |
436 | ||
98fa08a5 PC |
437 | static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg) |
438 | { | |
439 | s16 gteir1, gteir2, gteir3; | |
440 | ||
441 | switch (reg) { | |
442 | case 1: | |
443 | case 3: | |
444 | case 5: | |
445 | case 8: | |
446 | case 9: | |
447 | case 10: | |
448 | case 11: | |
11357fef | 449 | return (s32)(s16) load_u16(&state->regs.cp2d[reg]); |
98fa08a5 PC |
450 | case 7: |
451 | case 16: | |
452 | case 17: | |
453 | case 18: | |
454 | case 19: | |
11357fef | 455 | return load_u16(&state->regs.cp2d[reg]); |
98fa08a5 PC |
456 | case 28: |
457 | case 29: | |
11357fef PC |
458 | gteir1 = (s16) load_u16(&state->regs.cp2d[9]); |
459 | gteir2 = (s16) load_u16(&state->regs.cp2d[10]); | |
460 | gteir3 = (s16) load_u16(&state->regs.cp2d[11]); | |
98fa08a5 PC |
461 | |
462 | return clamp_s32(gteir1 >> 7, 0, 0x1f) << 0 | | |
463 | clamp_s32(gteir2 >> 7, 0, 0x1f) << 5 | | |
464 | clamp_s32(gteir3 >> 7, 0, 0x1f) << 10; | |
465 | case 15: | |
466 | reg = 14; | |
d8b04acd PC |
467 | fallthrough; |
468 | default: | |
98fa08a5 PC |
469 | return state->regs.cp2d[reg]; |
470 | } | |
471 | } | |
d16005f8 | 472 | |
98fa08a5 PC |
473 | u32 lightrec_mfc(struct lightrec_state *state, union code op) |
474 | { | |
ba3814c1 PC |
475 | u32 val; |
476 | ||
98fa08a5 PC |
477 | if (op.i.op == OP_CP0) |
478 | return state->regs.cp0[op.r.rd]; | |
9259d748 PC |
479 | |
480 | if (op.i.op == OP_SWC2) { | |
481 | val = lightrec_mfc2(state, op.i.rt); | |
482 | } else if (op.r.rs == OP_CP2_BASIC_MFC2) | |
fdf33147 PC |
483 | val = lightrec_mfc2(state, op.r.rd); |
484 | else { | |
485 | val = state->regs.cp2c[op.r.rd]; | |
486 | ||
487 | switch (op.r.rd) { | |
488 | case 4: | |
489 | case 12: | |
490 | case 20: | |
491 | case 26: | |
492 | case 27: | |
493 | case 29: | |
494 | case 30: | |
495 | val = (u32)(s16)val; | |
496 | fallthrough; | |
497 | default: | |
498 | break; | |
499 | } | |
500 | } | |
ba3814c1 | 501 | |
fdf33147 PC |
502 | if (state->ops.cop2_notify) |
503 | (*state->ops.cop2_notify)(state, op.opcode, val); | |
ba3814c1 | 504 | |
fdf33147 PC |
505 | return val; |
506 | } | |
507 | ||
508 | static void lightrec_mfc_cb(struct lightrec_state *state, union code op) | |
509 | { | |
510 | u32 rt = lightrec_mfc(state, op); | |
511 | ||
9259d748 | 512 | if (op.i.op == OP_SWC2) |
cb72ea13 | 513 | state->temp_reg = rt; |
9259d748 | 514 | else if (op.r.rt) |
fdf33147 | 515 | state->regs.gpr[op.r.rt] = rt; |
d16005f8 PC |
516 | } |
517 | ||
98fa08a5 | 518 | static void lightrec_mtc0(struct lightrec_state *state, u8 reg, u32 data) |
d16005f8 | 519 | { |
fd58fa32 | 520 | u32 status, oldstatus, cause; |
98fa08a5 PC |
521 | |
522 | switch (reg) { | |
523 | case 1: | |
524 | case 4: | |
525 | case 8: | |
526 | case 14: | |
527 | case 15: | |
528 | /* Those registers are read-only */ | |
529 | return; | |
fd58fa32 | 530 | default: |
98fa08a5 PC |
531 | break; |
532 | } | |
d16005f8 | 533 | |
98fa08a5 PC |
534 | if (reg == 12) { |
535 | status = state->regs.cp0[12]; | |
fd58fa32 | 536 | oldstatus = status; |
d16005f8 | 537 | |
98fa08a5 PC |
538 | if (status & ~data & BIT(16)) { |
539 | state->ops.enable_ram(state, true); | |
540 | lightrec_invalidate_all(state); | |
541 | } else if (~status & data & BIT(16)) { | |
542 | state->ops.enable_ram(state, false); | |
543 | } | |
544 | } | |
545 | ||
fd58fa32 PC |
546 | if (reg == 13) { |
547 | state->regs.cp0[13] &= ~0x300; | |
548 | state->regs.cp0[13] |= data & 0x300; | |
549 | } else { | |
550 | state->regs.cp0[reg] = data; | |
551 | } | |
98fa08a5 PC |
552 | |
553 | if (reg == 12 || reg == 13) { | |
554 | cause = state->regs.cp0[13]; | |
555 | status = state->regs.cp0[12]; | |
556 | ||
fd58fa32 | 557 | /* Handle software interrupts */ |
684432ad | 558 | if ((!!(status & cause & 0x300)) & status) |
98fa08a5 | 559 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT); |
fd58fa32 PC |
560 | |
561 | /* Handle hardware interrupts */ | |
562 | if (reg == 12 && !(~status & 0x401) && (~oldstatus & 0x401)) | |
563 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT); | |
98fa08a5 PC |
564 | } |
565 | } | |
566 | ||
567 | static u32 count_leading_bits(s32 data) | |
568 | { | |
98fa08a5 PC |
569 | u32 cnt = 33; |
570 | ||
de742fa0 PC |
571 | #ifdef __has_builtin |
572 | #if __has_builtin(__builtin_clrsb) | |
573 | return 1 + __builtin_clrsb(data); | |
574 | #endif | |
575 | #endif | |
576 | ||
98fa08a5 PC |
577 | data = (data ^ (data >> 31)) << 1; |
578 | ||
579 | do { | |
580 | cnt -= 1; | |
581 | data >>= 1; | |
582 | } while (data); | |
583 | ||
584 | return cnt; | |
98fa08a5 PC |
585 | } |
586 | ||
587 | static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data) | |
588 | { | |
589 | switch (reg) { | |
590 | case 15: | |
591 | state->regs.cp2d[12] = state->regs.cp2d[13]; | |
592 | state->regs.cp2d[13] = state->regs.cp2d[14]; | |
593 | state->regs.cp2d[14] = data; | |
594 | break; | |
595 | case 28: | |
596 | state->regs.cp2d[9] = (data << 7) & 0xf80; | |
597 | state->regs.cp2d[10] = (data << 2) & 0xf80; | |
598 | state->regs.cp2d[11] = (data >> 3) & 0xf80; | |
599 | break; | |
600 | case 31: | |
601 | return; | |
602 | case 30: | |
603 | state->regs.cp2d[31] = count_leading_bits((s32) data); | |
d8b04acd PC |
604 | fallthrough; |
605 | default: | |
98fa08a5 PC |
606 | state->regs.cp2d[reg] = data; |
607 | break; | |
608 | } | |
609 | } | |
d16005f8 | 610 | |
98fa08a5 PC |
611 | static void lightrec_ctc2(struct lightrec_state *state, u8 reg, u32 data) |
612 | { | |
613 | switch (reg) { | |
614 | case 4: | |
615 | case 12: | |
616 | case 20: | |
617 | case 26: | |
618 | case 27: | |
619 | case 29: | |
620 | case 30: | |
11357fef | 621 | store_u16(&state->regs.cp2c[reg], data); |
98fa08a5 PC |
622 | break; |
623 | case 31: | |
624 | data = (data & 0x7ffff000) | !!(data & 0x7f87e000) << 31; | |
d8b04acd PC |
625 | fallthrough; |
626 | default: | |
11357fef | 627 | state->regs.cp2c[reg] = data; |
98fa08a5 PC |
628 | break; |
629 | } | |
98fa08a5 PC |
630 | } |
631 | ||
9259d748 | 632 | void lightrec_mtc(struct lightrec_state *state, union code op, u8 reg, u32 data) |
98fa08a5 | 633 | { |
fdf33147 | 634 | if (op.i.op == OP_CP0) { |
9259d748 | 635 | lightrec_mtc0(state, reg, data); |
fdf33147 | 636 | } else { |
9259d748 PC |
637 | if (op.i.op == OP_LWC2 || op.r.rs != OP_CP2_BASIC_CTC2) |
638 | lightrec_mtc2(state, reg, data); | |
fdf33147 | 639 | else |
9259d748 | 640 | lightrec_ctc2(state, reg, data); |
fdf33147 PC |
641 | |
642 | if (state->ops.cop2_notify) | |
643 | (*state->ops.cop2_notify)(state, op.opcode, data); | |
644 | } | |
d16005f8 PC |
645 | } |
646 | ||
03535202 | 647 | static void lightrec_mtc_cb(struct lightrec_state *state, u32 arg) |
d16005f8 | 648 | { |
03535202 | 649 | union code op = (union code) arg; |
9259d748 PC |
650 | u32 data; |
651 | u8 reg; | |
652 | ||
653 | if (op.i.op == OP_LWC2) { | |
cb72ea13 | 654 | data = state->temp_reg; |
9259d748 PC |
655 | reg = op.i.rt; |
656 | } else { | |
657 | data = state->regs.gpr[op.r.rt]; | |
658 | reg = op.r.rd; | |
659 | } | |
22eee2ac | 660 | |
9259d748 | 661 | lightrec_mtc(state, op, reg, data); |
d16005f8 PC |
662 | } |
663 | ||
98fa08a5 | 664 | void lightrec_rfe(struct lightrec_state *state) |
d16005f8 PC |
665 | { |
666 | u32 status; | |
667 | ||
668 | /* Read CP0 Status register (r12) */ | |
98fa08a5 | 669 | status = state->regs.cp0[12]; |
d16005f8 PC |
670 | |
671 | /* Switch the bits */ | |
672 | status = ((status & 0x3c) >> 2) | (status & ~0xf); | |
673 | ||
674 | /* Write it back */ | |
98fa08a5 | 675 | lightrec_mtc0(state, 12, status); |
d16005f8 PC |
676 | } |
677 | ||
98fa08a5 | 678 | void lightrec_cp(struct lightrec_state *state, union code op) |
d16005f8 | 679 | { |
98fa08a5 PC |
680 | if (op.i.op == OP_CP0) { |
681 | pr_err("Invalid CP opcode to coprocessor #0\n"); | |
682 | return; | |
683 | } | |
d16005f8 | 684 | |
98fa08a5 | 685 | (*state->ops.cop2_op)(state, op.opcode); |
d16005f8 PC |
686 | } |
687 | ||
03535202 | 688 | static void lightrec_cp_cb(struct lightrec_state *state, u32 arg) |
22eee2ac | 689 | { |
03535202 | 690 | lightrec_cp(state, (union code) arg); |
22eee2ac PC |
691 | } |
692 | ||
03535202 | 693 | static struct block * lightrec_get_block(struct lightrec_state *state, u32 pc) |
d16005f8 PC |
694 | { |
695 | struct block *block = lightrec_find_block(state->block_cache, pc); | |
ba3814c1 | 696 | u8 old_flags; |
d16005f8 | 697 | |
98fa08a5 | 698 | if (block && lightrec_block_is_outdated(state, block)) { |
f5ee77ca | 699 | pr_debug("Block at "PC_FMT" is outdated!\n", block->pc); |
d16005f8 | 700 | |
ba3814c1 PC |
701 | old_flags = block_set_flags(block, BLOCK_IS_DEAD); |
702 | if (!(old_flags & BLOCK_IS_DEAD)) { | |
703 | /* Make sure the recompiler isn't processing the block | |
704 | * we'll destroy */ | |
705 | if (ENABLE_THREADED_COMPILER) | |
706 | lightrec_recompiler_remove(state->rec, block); | |
707 | ||
ba3814c1 | 708 | remove_from_code_lut(state->block_cache, block); |
a5a6f7b8 PC |
709 | |
710 | if (ENABLE_THREADED_COMPILER) { | |
711 | lightrec_reaper_add(state->reaper, | |
712 | lightrec_reap_block, block); | |
713 | } else { | |
714 | lightrec_unregister_block(state->block_cache, block); | |
715 | lightrec_free_block(state, block); | |
716 | } | |
ba3814c1 | 717 | } |
d16005f8 | 718 | |
d16005f8 PC |
719 | block = NULL; |
720 | } | |
721 | ||
722 | if (!block) { | |
723 | block = lightrec_precompile_block(state, pc); | |
724 | if (!block) { | |
f5ee77ca | 725 | pr_err("Unable to recompile block at "PC_FMT"\n", pc); |
d16005f8 PC |
726 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); |
727 | return NULL; | |
728 | } | |
729 | ||
730 | lightrec_register_block(state->block_cache, block); | |
731 | } | |
732 | ||
733 | return block; | |
734 | } | |
735 | ||
736 | static void * get_next_block_func(struct lightrec_state *state, u32 pc) | |
737 | { | |
738 | struct block *block; | |
739 | bool should_recompile; | |
740 | void *func; | |
d8b04acd | 741 | int err; |
d16005f8 | 742 | |
9259d748 | 743 | do { |
d8b04acd | 744 | func = lut_read(state, lut_offset(pc)); |
d16005f8 | 745 | if (func && func != state->get_next_block) |
98fa08a5 | 746 | break; |
d16005f8 PC |
747 | |
748 | block = lightrec_get_block(state, pc); | |
749 | ||
750 | if (unlikely(!block)) | |
98fa08a5 PC |
751 | break; |
752 | ||
ba3814c1 PC |
753 | if (OPT_REPLACE_MEMSET && |
754 | block_has_flag(block, BLOCK_IS_MEMSET)) { | |
98fa08a5 PC |
755 | func = state->memset_func; |
756 | break; | |
757 | } | |
d16005f8 | 758 | |
ba3814c1 | 759 | should_recompile = block_has_flag(block, BLOCK_SHOULD_RECOMPILE) && |
cb72ea13 | 760 | !block_has_flag(block, BLOCK_NEVER_COMPILE) && |
ba3814c1 | 761 | !block_has_flag(block, BLOCK_IS_DEAD); |
d16005f8 PC |
762 | |
763 | if (unlikely(should_recompile)) { | |
f5ee77ca | 764 | pr_debug("Block at "PC_FMT" should recompile\n", pc); |
d16005f8 | 765 | |
d8b04acd | 766 | if (ENABLE_THREADED_COMPILER) { |
a59e5536 | 767 | lightrec_recompiler_add(state->rec, block); |
d8b04acd PC |
768 | } else { |
769 | err = lightrec_compile_block(state->cstate, block); | |
770 | if (err) { | |
771 | state->exit_flags = LIGHTREC_EXIT_NOMEM; | |
772 | return NULL; | |
773 | } | |
774 | } | |
d16005f8 PC |
775 | } |
776 | ||
777 | if (ENABLE_THREADED_COMPILER && likely(!should_recompile)) | |
98fa08a5 | 778 | func = lightrec_recompiler_run_first_pass(state, block, &pc); |
d16005f8 PC |
779 | else |
780 | func = block->function; | |
781 | ||
782 | if (likely(func)) | |
98fa08a5 | 783 | break; |
d16005f8 | 784 | |
ba3814c1 | 785 | if (unlikely(block_has_flag(block, BLOCK_NEVER_COMPILE))) { |
98fa08a5 PC |
786 | pc = lightrec_emulate_block(state, block, pc); |
787 | ||
788 | } else if (!ENABLE_THREADED_COMPILER) { | |
789 | /* Block wasn't compiled yet - run the interpreter */ | |
ba3814c1 | 790 | if (block_has_flag(block, BLOCK_FULLY_TAGGED)) |
98fa08a5 PC |
791 | pr_debug("Block fully tagged, skipping first pass\n"); |
792 | else if (ENABLE_FIRST_PASS && likely(!should_recompile)) | |
793 | pc = lightrec_emulate_block(state, block, pc); | |
d16005f8 | 794 | |
d16005f8 | 795 | /* Then compile it using the profiled data */ |
d8b04acd PC |
796 | err = lightrec_compile_block(state->cstate, block); |
797 | if (err) { | |
798 | state->exit_flags = LIGHTREC_EXIT_NOMEM; | |
799 | return NULL; | |
800 | } | |
ba3814c1 PC |
801 | } else if (unlikely(block_has_flag(block, BLOCK_IS_DEAD))) { |
802 | /* | |
803 | * If the block is dead but has never been compiled, | |
804 | * then its function pointer is NULL and we cannot | |
805 | * execute the block. In that case, reap all the dead | |
806 | * blocks now, and in the next loop we will create a | |
807 | * new block. | |
808 | */ | |
809 | lightrec_reaper_reap(state->reaper); | |
98fa08a5 PC |
810 | } else { |
811 | lightrec_recompiler_add(state->rec, block); | |
d16005f8 | 812 | } |
9259d748 PC |
813 | } while (state->exit_flags == LIGHTREC_EXIT_NORMAL |
814 | && state->current_cycle < state->target_cycle); | |
d16005f8 | 815 | |
0e720fb1 | 816 | state->curr_pc = pc; |
98fa08a5 | 817 | return func; |
d16005f8 PC |
818 | } |
819 | ||
d8b04acd PC |
820 | static void * lightrec_alloc_code(struct lightrec_state *state, size_t size) |
821 | { | |
822 | void *code; | |
823 | ||
824 | if (ENABLE_THREADED_COMPILER) | |
825 | lightrec_code_alloc_lock(state); | |
826 | ||
827 | code = tlsf_malloc(state->tlsf, size); | |
828 | ||
829 | if (ENABLE_THREADED_COMPILER) | |
830 | lightrec_code_alloc_unlock(state); | |
831 | ||
832 | return code; | |
833 | } | |
834 | ||
835 | static void lightrec_realloc_code(struct lightrec_state *state, | |
836 | void *ptr, size_t size) | |
837 | { | |
838 | /* NOTE: 'size' MUST be smaller than the size specified during | |
839 | * the allocation. */ | |
840 | ||
841 | if (ENABLE_THREADED_COMPILER) | |
842 | lightrec_code_alloc_lock(state); | |
843 | ||
844 | tlsf_realloc(state->tlsf, ptr, size); | |
845 | ||
846 | if (ENABLE_THREADED_COMPILER) | |
847 | lightrec_code_alloc_unlock(state); | |
848 | } | |
849 | ||
850 | static void lightrec_free_code(struct lightrec_state *state, void *ptr) | |
851 | { | |
852 | if (ENABLE_THREADED_COMPILER) | |
853 | lightrec_code_alloc_lock(state); | |
854 | ||
855 | tlsf_free(state->tlsf, ptr); | |
856 | ||
857 | if (ENABLE_THREADED_COMPILER) | |
858 | lightrec_code_alloc_unlock(state); | |
859 | } | |
860 | ||
cb72ea13 PC |
861 | static char lightning_code_data[0x80000]; |
862 | ||
02487de7 | 863 | static void * lightrec_emit_code(struct lightrec_state *state, |
d8b04acd | 864 | const struct block *block, |
02487de7 PC |
865 | jit_state_t *_jit, unsigned int *size) |
866 | { | |
867 | bool has_code_buffer = ENABLE_CODE_BUFFER && state->tlsf; | |
868 | jit_word_t code_size, new_code_size; | |
869 | void *code; | |
870 | ||
871 | jit_realize(); | |
872 | ||
cb72ea13 PC |
873 | if (ENABLE_DISASSEMBLER) |
874 | jit_set_data(lightning_code_data, sizeof(lightning_code_data), 0); | |
875 | else | |
02487de7 PC |
876 | jit_set_data(NULL, 0, JIT_DISABLE_DATA | JIT_DISABLE_NOTE); |
877 | ||
878 | if (has_code_buffer) { | |
879 | jit_get_code(&code_size); | |
878e6cda PC |
880 | |
881 | #ifdef __i386__ | |
882 | /* Lightning's code size estimation routine is buggy on x86 and | |
883 | * will return a value that's too small. */ | |
884 | code_size *= 2; | |
885 | #endif | |
886 | ||
d8b04acd PC |
887 | code = lightrec_alloc_code(state, (size_t) code_size); |
888 | ||
889 | if (!code) { | |
890 | if (ENABLE_THREADED_COMPILER) { | |
891 | /* If we're using the threaded compiler, return | |
892 | * an allocation error here. The threaded | |
893 | * compiler will then empty its job queue and | |
894 | * request a code flush using the reaper. */ | |
895 | return NULL; | |
896 | } | |
897 | ||
898 | /* Remove outdated blocks, and try again */ | |
899 | lightrec_remove_outdated_blocks(state->block_cache, block); | |
900 | ||
901 | pr_debug("Re-try to alloc %zu bytes...\n", code_size); | |
902 | ||
903 | code = lightrec_alloc_code(state, code_size); | |
904 | if (!code) { | |
905 | pr_err("Could not alloc even after removing old blocks!\n"); | |
906 | return NULL; | |
907 | } | |
908 | } | |
02487de7 PC |
909 | |
910 | jit_set_code(code, code_size); | |
911 | } | |
912 | ||
913 | code = jit_emit(); | |
878e6cda PC |
914 | if (!code) { |
915 | if (has_code_buffer) | |
916 | lightrec_free_code(state, code); | |
917 | ||
918 | return NULL; | |
919 | } | |
02487de7 PC |
920 | |
921 | jit_get_code(&new_code_size); | |
922 | lightrec_register(MEM_FOR_CODE, new_code_size); | |
923 | ||
924 | if (has_code_buffer) { | |
d8b04acd | 925 | lightrec_realloc_code(state, code, (size_t) new_code_size); |
02487de7 PC |
926 | |
927 | pr_debug("Creating code block at address 0x%" PRIxPTR ", " | |
928 | "code size: %" PRIuPTR " new: %" PRIuPTR "\n", | |
929 | (uintptr_t) code, code_size, new_code_size); | |
930 | } | |
931 | ||
932 | *size = (unsigned int) new_code_size; | |
933 | ||
9259d748 PC |
934 | if (state->ops.code_inv) |
935 | state->ops.code_inv(code, new_code_size); | |
936 | ||
02487de7 PC |
937 | return code; |
938 | } | |
939 | ||
98fa08a5 | 940 | static struct block * generate_wrapper(struct lightrec_state *state) |
d16005f8 PC |
941 | { |
942 | struct block *block; | |
943 | jit_state_t *_jit; | |
944 | unsigned int i; | |
cb72ea13 | 945 | |
d16005f8 PC |
946 | block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block)); |
947 | if (!block) | |
948 | goto err_no_mem; | |
949 | ||
950 | _jit = jit_new_state(); | |
951 | if (!_jit) | |
952 | goto err_free_block; | |
953 | ||
954 | jit_name("RW wrapper"); | |
955 | jit_note(__FILE__, __LINE__); | |
956 | ||
957 | /* Wrapper entry point */ | |
958 | jit_prolog(); | |
fd58fa32 PC |
959 | jit_tramp(256); |
960 | ||
8afce295 PC |
961 | /* Load pointer to C wrapper */ |
962 | jit_addr(JIT_R1, JIT_R1, LIGHTREC_REG_STATE); | |
963 | jit_ldxi(JIT_R1, JIT_R1, lightrec_offset(c_wrappers)); | |
ba3814c1 | 964 | |
fd58fa32 PC |
965 | jit_epilog(); |
966 | jit_prolog(); | |
d16005f8 | 967 | |
fd58fa32 | 968 | /* Save all temporaries on stack */ |
ba3814c1 PC |
969 | for (i = 0; i < NUM_TEMPS; i++) { |
970 | if (i + FIRST_TEMP != 1) { | |
8afce295 | 971 | jit_stxi(lightrec_offset(wrapper_regs[i]), |
ba3814c1 PC |
972 | LIGHTREC_REG_STATE, JIT_R(i + FIRST_TEMP)); |
973 | } | |
974 | } | |
d16005f8 | 975 | |
ba3814c1 | 976 | jit_getarg(JIT_R2, jit_arg()); |
03535202 | 977 | |
ba3814c1 PC |
978 | jit_prepare(); |
979 | jit_pushargr(LIGHTREC_REG_STATE); | |
980 | jit_pushargr(JIT_R2); | |
d16005f8 | 981 | |
8afce295 | 982 | jit_ldxi_ui(JIT_R2, LIGHTREC_REG_STATE, lightrec_offset(target_cycle)); |
d16005f8 | 983 | |
ba3814c1 PC |
984 | /* state->current_cycle = state->target_cycle - delta; */ |
985 | jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, LIGHTREC_REG_CYCLE); | |
8afce295 | 986 | jit_stxi_i(lightrec_offset(current_cycle), LIGHTREC_REG_STATE, LIGHTREC_REG_CYCLE); |
d16005f8 | 987 | |
ba3814c1 PC |
988 | /* Call the wrapper function */ |
989 | jit_finishr(JIT_R1); | |
d16005f8 | 990 | |
ba3814c1 | 991 | /* delta = state->target_cycle - state->current_cycle */; |
8afce295 PC |
992 | jit_ldxi_ui(LIGHTREC_REG_CYCLE, LIGHTREC_REG_STATE, lightrec_offset(current_cycle)); |
993 | jit_ldxi_ui(JIT_R1, LIGHTREC_REG_STATE, lightrec_offset(target_cycle)); | |
ba3814c1 | 994 | jit_subr(LIGHTREC_REG_CYCLE, JIT_R1, LIGHTREC_REG_CYCLE); |
fd58fa32 | 995 | |
ba3814c1 PC |
996 | /* Restore temporaries from stack */ |
997 | for (i = 0; i < NUM_TEMPS; i++) { | |
998 | if (i + FIRST_TEMP != 1) { | |
999 | jit_ldxi(JIT_R(i + FIRST_TEMP), LIGHTREC_REG_STATE, | |
8afce295 | 1000 | lightrec_offset(wrapper_regs[i])); |
ba3814c1 PC |
1001 | } |
1002 | } | |
d16005f8 | 1003 | |
ba3814c1 | 1004 | jit_ret(); |
d16005f8 PC |
1005 | jit_epilog(); |
1006 | ||
d16005f8 | 1007 | block->_jit = _jit; |
d16005f8 | 1008 | block->opcode_list = NULL; |
ba3814c1 | 1009 | block->flags = BLOCK_NO_OPCODE_LIST; |
d16005f8 PC |
1010 | block->nb_ops = 0; |
1011 | ||
d8b04acd | 1012 | block->function = lightrec_emit_code(state, block, _jit, |
02487de7 PC |
1013 | &block->code_size); |
1014 | if (!block->function) | |
878e6cda | 1015 | goto err_free_jit; |
02487de7 | 1016 | |
8afce295 | 1017 | state->c_wrapper = block->function; |
fd58fa32 | 1018 | |
d16005f8 PC |
1019 | if (ENABLE_DISASSEMBLER) { |
1020 | pr_debug("Wrapper block:\n"); | |
1021 | jit_disassemble(); | |
1022 | } | |
1023 | ||
1024 | jit_clear_state(); | |
1025 | return block; | |
1026 | ||
878e6cda PC |
1027 | err_free_jit: |
1028 | jit_destroy_state(); | |
d16005f8 PC |
1029 | err_free_block: |
1030 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); | |
1031 | err_no_mem: | |
1032 | pr_err("Unable to compile wrapper: Out of memory\n"); | |
1033 | return NULL; | |
1034 | } | |
1035 | ||
98fa08a5 PC |
1036 | static u32 lightrec_memset(struct lightrec_state *state) |
1037 | { | |
1038 | u32 kunseg_pc = kunseg(state->regs.gpr[4]); | |
1039 | void *host; | |
1040 | const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg_pc); | |
1041 | u32 length = state->regs.gpr[5] * 4; | |
1042 | ||
1043 | if (!map) { | |
f5ee77ca PC |
1044 | pr_err("Unable to find memory map for memset target address "PC_FMT"\n", |
1045 | kunseg_pc); | |
98fa08a5 PC |
1046 | return 0; |
1047 | } | |
1048 | ||
f5ee77ca | 1049 | pr_debug("Calling host memset, "PC_FMT" (host address 0x%"PRIxPTR") for %u bytes\n", |
98fa08a5 PC |
1050 | kunseg_pc, (uintptr_t)host, length); |
1051 | memset(host, 0, length); | |
1052 | ||
684432ad | 1053 | if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY)) |
98fa08a5 PC |
1054 | lightrec_invalidate_map(state, map, kunseg_pc, length); |
1055 | ||
1056 | /* Rough estimation of the number of cycles consumed */ | |
1057 | return 8 + 5 * (length + 3 / 4); | |
1058 | } | |
1059 | ||
cb72ea13 PC |
1060 | static u32 lightrec_check_load_delay(struct lightrec_state *state, u32 pc, u8 reg) |
1061 | { | |
1062 | struct block *block; | |
1063 | union code first_op; | |
1064 | ||
1065 | first_op = lightrec_read_opcode(state, pc); | |
1066 | ||
1067 | if (likely(!opcode_reads_register(first_op, reg))) { | |
1068 | state->regs.gpr[reg] = state->temp_reg; | |
1069 | } else { | |
1070 | block = lightrec_get_block(state, pc); | |
1071 | if (unlikely(!block)) { | |
f5ee77ca | 1072 | pr_err("Unable to get block at "PC_FMT"\n", pc); |
cb72ea13 PC |
1073 | lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT); |
1074 | pc = 0; | |
1075 | } else { | |
1076 | pc = lightrec_handle_load_delay(state, block, pc, reg); | |
1077 | } | |
1078 | } | |
1079 | ||
1080 | return pc; | |
1081 | } | |
1082 | ||
1083 | static void update_cycle_counter_before_c(jit_state_t *_jit) | |
1084 | { | |
1085 | /* update state->current_cycle */ | |
8afce295 | 1086 | jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE, lightrec_offset(target_cycle)); |
cb72ea13 | 1087 | jit_subr(JIT_R1, JIT_R2, LIGHTREC_REG_CYCLE); |
8afce295 | 1088 | jit_stxi_i(lightrec_offset(current_cycle), LIGHTREC_REG_STATE, JIT_R1); |
cb72ea13 PC |
1089 | } |
1090 | ||
1091 | static void update_cycle_counter_after_c(jit_state_t *_jit) | |
1092 | { | |
1093 | /* Recalc the delta */ | |
8afce295 PC |
1094 | jit_ldxi_i(JIT_R1, LIGHTREC_REG_STATE, lightrec_offset(current_cycle)); |
1095 | jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE, lightrec_offset(target_cycle)); | |
cb72ea13 PC |
1096 | jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, JIT_R1); |
1097 | } | |
1098 | ||
0e720fb1 PC |
1099 | static void sync_next_pc(jit_state_t *_jit) |
1100 | { | |
1101 | if (lightrec_store_next_pc()) { | |
684432ad | 1102 | jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, |
8afce295 | 1103 | lightrec_offset(next_pc)); |
0e720fb1 PC |
1104 | } |
1105 | } | |
1106 | ||
d16005f8 PC |
1107 | static struct block * generate_dispatcher(struct lightrec_state *state) |
1108 | { | |
1109 | struct block *block; | |
1110 | jit_state_t *_jit; | |
8afce295 PC |
1111 | jit_node_t *to_end, *loop, *loop2, |
1112 | *addr, *addr2, *addr3, *addr4, *addr5; | |
d16005f8 | 1113 | unsigned int i; |
02487de7 | 1114 | u32 offset; |
d16005f8 PC |
1115 | |
1116 | block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block)); | |
1117 | if (!block) | |
1118 | goto err_no_mem; | |
1119 | ||
1120 | _jit = jit_new_state(); | |
1121 | if (!_jit) | |
1122 | goto err_free_block; | |
1123 | ||
1124 | jit_name("dispatcher"); | |
1125 | jit_note(__FILE__, __LINE__); | |
1126 | ||
1127 | jit_prolog(); | |
1128 | jit_frame(256); | |
1129 | ||
9259d748 PC |
1130 | jit_getarg(LIGHTREC_REG_STATE, jit_arg()); |
1131 | jit_getarg(JIT_V0, jit_arg()); | |
ba3814c1 | 1132 | jit_getarg(JIT_V1, jit_arg()); |
d16005f8 | 1133 | jit_getarg_i(LIGHTREC_REG_CYCLE, jit_arg()); |
d16005f8 PC |
1134 | |
1135 | /* Force all callee-saved registers to be pushed on the stack */ | |
1136 | for (i = 0; i < NUM_REGS; i++) | |
ba3814c1 | 1137 | jit_movr(JIT_V(i + FIRST_REG), JIT_V(i + FIRST_REG)); |
d16005f8 | 1138 | |
d16005f8 PC |
1139 | loop = jit_label(); |
1140 | ||
1141 | /* Call the block's code */ | |
ba3814c1 | 1142 | jit_jmpr(JIT_V1); |
d16005f8 | 1143 | |
0e720fb1 PC |
1144 | /* The block will jump here, with the number of cycles remaining in |
1145 | * LIGHTREC_REG_CYCLE */ | |
1146 | addr2 = jit_indirect(); | |
1147 | ||
1148 | sync_next_pc(_jit); | |
1149 | ||
8afce295 | 1150 | loop2 = jit_label(); |
98fa08a5 | 1151 | |
d16005f8 PC |
1152 | /* Jump to end if state->target_cycle < state->current_cycle */ |
1153 | to_end = jit_blei(LIGHTREC_REG_CYCLE, 0); | |
1154 | ||
1155 | /* Convert next PC to KUNSEG and avoid mirrors */ | |
878e6cda | 1156 | jit_andi(JIT_V1, JIT_V0, RAM_SIZE - 1); |
02487de7 | 1157 | jit_andi(JIT_R2, JIT_V0, BIOS_SIZE - 1); |
878e6cda | 1158 | jit_andi(JIT_R1, JIT_V0, BIT(28)); |
02487de7 | 1159 | jit_addi(JIT_R2, JIT_R2, RAM_SIZE); |
ba3814c1 | 1160 | jit_movnr(JIT_V1, JIT_R2, JIT_R1); |
02487de7 PC |
1161 | |
1162 | /* If possible, use the code LUT */ | |
1163 | if (!lut_is_32bit(state)) | |
ba3814c1 | 1164 | jit_lshi(JIT_V1, JIT_V1, 1); |
cb72ea13 | 1165 | jit_add_state(JIT_V1, JIT_V1); |
02487de7 | 1166 | |
8afce295 | 1167 | offset = lightrec_offset(code_lut); |
02487de7 | 1168 | if (lut_is_32bit(state)) |
ba3814c1 | 1169 | jit_ldxi_ui(JIT_V1, JIT_V1, offset); |
02487de7 | 1170 | else |
ba3814c1 | 1171 | jit_ldxi(JIT_V1, JIT_V1, offset); |
d16005f8 | 1172 | |
8afce295 PC |
1173 | /* Store back the current PC to the lightrec_state structure */ |
1174 | jit_stxi_i(lightrec_offset(curr_pc), LIGHTREC_REG_STATE, JIT_V0); | |
1175 | ||
d16005f8 | 1176 | /* If we get non-NULL, loop */ |
ba3814c1 PC |
1177 | jit_patch_at(jit_bnei(JIT_V1, 0), loop); |
1178 | ||
1179 | /* The code LUT will be set to this address when the block at the target | |
1180 | * PC has been preprocessed but not yet compiled by the threaded | |
1181 | * recompiler */ | |
1182 | addr = jit_indirect(); | |
d16005f8 PC |
1183 | |
1184 | /* Slow path: call C function get_next_block_func() */ | |
d16005f8 | 1185 | |
98fa08a5 | 1186 | if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) { |
d16005f8 | 1187 | /* We may call the interpreter - update state->current_cycle */ |
cb72ea13 | 1188 | update_cycle_counter_before_c(_jit); |
d16005f8 PC |
1189 | } |
1190 | ||
d16005f8 PC |
1191 | jit_prepare(); |
1192 | jit_pushargr(LIGHTREC_REG_STATE); | |
1193 | jit_pushargr(JIT_V0); | |
ba3814c1 PC |
1194 | |
1195 | /* Save the cycles register if needed */ | |
1196 | if (!(ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES)) | |
1197 | jit_movr(JIT_V0, LIGHTREC_REG_CYCLE); | |
1198 | ||
1199 | /* Get the next block */ | |
d16005f8 | 1200 | jit_finishi(&get_next_block_func); |
ba3814c1 | 1201 | jit_retval(JIT_V1); |
d16005f8 | 1202 | |
98fa08a5 | 1203 | if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) { |
d16005f8 PC |
1204 | /* The interpreter may have updated state->current_cycle and |
1205 | * state->target_cycle - recalc the delta */ | |
cb72ea13 | 1206 | update_cycle_counter_after_c(_jit); |
ba3814c1 PC |
1207 | } else { |
1208 | jit_movr(LIGHTREC_REG_CYCLE, JIT_V0); | |
d16005f8 PC |
1209 | } |
1210 | ||
9259d748 | 1211 | /* Reset JIT_V0 to the next PC */ |
8afce295 | 1212 | jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, lightrec_offset(curr_pc)); |
9259d748 | 1213 | |
d16005f8 | 1214 | /* If we get non-NULL, loop */ |
ba3814c1 | 1215 | jit_patch_at(jit_bnei(JIT_V1, 0), loop); |
d16005f8 | 1216 | |
d16005f8 PC |
1217 | /* When exiting, the recompiled code will jump to that address */ |
1218 | jit_note(__FILE__, __LINE__); | |
1219 | jit_patch(to_end); | |
1220 | ||
8afce295 PC |
1221 | /* Store back the current PC to the lightrec_state structure */ |
1222 | jit_stxi_i(lightrec_offset(curr_pc), LIGHTREC_REG_STATE, JIT_V0); | |
1223 | ||
d16005f8 | 1224 | jit_retr(LIGHTREC_REG_CYCLE); |
8afce295 PC |
1225 | |
1226 | if (OPT_REPLACE_MEMSET) { | |
1227 | /* Blocks will jump here when they need to call | |
1228 | * lightrec_memset() */ | |
1229 | addr3 = jit_indirect(); | |
1230 | ||
1231 | jit_movr(JIT_V1, LIGHTREC_REG_CYCLE); | |
1232 | ||
1233 | jit_prepare(); | |
1234 | jit_pushargr(LIGHTREC_REG_STATE); | |
1235 | ||
1236 | jit_finishi(lightrec_memset); | |
1237 | jit_retval(LIGHTREC_REG_CYCLE); | |
1238 | ||
1239 | jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE, lightrec_offset(regs.gpr[31])); | |
1240 | ||
1241 | jit_subr(LIGHTREC_REG_CYCLE, JIT_V1, LIGHTREC_REG_CYCLE); | |
1242 | ||
1243 | jit_patch_at(jit_b(), loop2); | |
1244 | } | |
1245 | ||
1246 | if (OPT_DETECT_IMPOSSIBLE_BRANCHES) { | |
1247 | /* Blocks will jump here when they reach a branch that should | |
1248 | * be executed with the interpreter, passing the branch's PC | |
1249 | * in JIT_V0 and the address of the block in JIT_V1. */ | |
1250 | addr4 = jit_indirect(); | |
1251 | ||
1252 | sync_next_pc(_jit); | |
1253 | update_cycle_counter_before_c(_jit); | |
1254 | ||
1255 | jit_prepare(); | |
1256 | jit_pushargr(LIGHTREC_REG_STATE); | |
1257 | jit_pushargr(JIT_V1); | |
1258 | jit_pushargr(JIT_V0); | |
1259 | jit_finishi(lightrec_emulate_block); | |
1260 | ||
1261 | jit_retval(JIT_V0); | |
1262 | ||
1263 | update_cycle_counter_after_c(_jit); | |
1264 | ||
1265 | jit_patch_at(jit_b(), loop2); | |
1266 | ||
1267 | } | |
1268 | ||
1269 | if (OPT_HANDLE_LOAD_DELAYS) { | |
1270 | /* Blocks will jump here when they reach a branch with a load | |
1271 | * opcode in its delay slot. The delay slot has already been | |
1272 | * executed; the load value is in (state->temp_reg), and the | |
1273 | * register number is in JIT_V1. | |
1274 | * Jump to a C function which will evaluate the branch target's | |
1275 | * first opcode, to make sure that it does not read the register | |
1276 | * in question; and if it does, handle it accordingly. */ | |
1277 | addr5 = jit_indirect(); | |
1278 | ||
1279 | sync_next_pc(_jit); | |
1280 | update_cycle_counter_before_c(_jit); | |
1281 | ||
1282 | jit_prepare(); | |
1283 | jit_pushargr(LIGHTREC_REG_STATE); | |
1284 | jit_pushargr(JIT_V0); | |
1285 | jit_pushargr(JIT_V1); | |
1286 | jit_finishi(lightrec_check_load_delay); | |
1287 | ||
1288 | jit_retval(JIT_V0); | |
1289 | ||
1290 | update_cycle_counter_after_c(_jit); | |
1291 | ||
1292 | jit_patch_at(jit_b(), loop2); | |
1293 | } | |
1294 | ||
d16005f8 PC |
1295 | jit_epilog(); |
1296 | ||
d16005f8 | 1297 | block->_jit = _jit; |
d16005f8 | 1298 | block->opcode_list = NULL; |
ba3814c1 | 1299 | block->flags = BLOCK_NO_OPCODE_LIST; |
d16005f8 PC |
1300 | block->nb_ops = 0; |
1301 | ||
d8b04acd | 1302 | block->function = lightrec_emit_code(state, block, _jit, |
02487de7 PC |
1303 | &block->code_size); |
1304 | if (!block->function) | |
878e6cda | 1305 | goto err_free_jit; |
d16005f8 PC |
1306 | |
1307 | state->eob_wrapper_func = jit_address(addr2); | |
cb72ea13 PC |
1308 | if (OPT_DETECT_IMPOSSIBLE_BRANCHES) |
1309 | state->interpreter_func = jit_address(addr4); | |
1310 | if (OPT_HANDLE_LOAD_DELAYS) | |
1311 | state->ds_check_func = jit_address(addr5); | |
98fa08a5 PC |
1312 | if (OPT_REPLACE_MEMSET) |
1313 | state->memset_func = jit_address(addr3); | |
d16005f8 PC |
1314 | state->get_next_block = jit_address(addr); |
1315 | ||
1316 | if (ENABLE_DISASSEMBLER) { | |
1317 | pr_debug("Dispatcher block:\n"); | |
1318 | jit_disassemble(); | |
1319 | } | |
1320 | ||
1321 | /* We're done! */ | |
1322 | jit_clear_state(); | |
1323 | return block; | |
1324 | ||
878e6cda PC |
1325 | err_free_jit: |
1326 | jit_destroy_state(); | |
d16005f8 PC |
1327 | err_free_block: |
1328 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); | |
1329 | err_no_mem: | |
1330 | pr_err("Unable to compile dispatcher: Out of memory\n"); | |
1331 | return NULL; | |
1332 | } | |
1333 | ||
1334 | union code lightrec_read_opcode(struct lightrec_state *state, u32 pc) | |
1335 | { | |
fd58fa32 | 1336 | void *host = NULL; |
d16005f8 | 1337 | |
98fa08a5 | 1338 | lightrec_get_map(state, &host, kunseg(pc)); |
d16005f8 | 1339 | |
98fa08a5 | 1340 | const u32 *code = (u32 *)host; |
02487de7 | 1341 | return (union code) LE32TOH(*code); |
98fa08a5 | 1342 | } |
d16005f8 | 1343 | |
684432ad PC |
1344 | unsigned int lightrec_cycles_of_opcode(const struct lightrec_state *state, |
1345 | union code code) | |
98fa08a5 | 1346 | { |
684432ad | 1347 | return state->cycles_per_op; |
98fa08a5 | 1348 | } |
d16005f8 | 1349 | |
ba3814c1 | 1350 | void lightrec_free_opcode_list(struct lightrec_state *state, struct opcode *ops) |
98fa08a5 | 1351 | { |
ba3814c1 PC |
1352 | struct opcode_list *list = container_of(ops, struct opcode_list, ops); |
1353 | ||
98fa08a5 | 1354 | lightrec_free(state, MEM_FOR_IR, |
ba3814c1 PC |
1355 | sizeof(*list) + list->nb_ops * sizeof(struct opcode), |
1356 | list); | |
98fa08a5 PC |
1357 | } |
1358 | ||
1359 | static unsigned int lightrec_get_mips_block_len(const u32 *src) | |
1360 | { | |
1361 | unsigned int i; | |
1362 | union code c; | |
1363 | ||
1364 | for (i = 1; ; i++) { | |
1365 | c.opcode = LE32TOH(*src++); | |
1366 | ||
1367 | if (is_syscall(c)) | |
1368 | return i; | |
1369 | ||
1370 | if (is_unconditional_jump(c)) | |
1371 | return i + 1; | |
1372 | } | |
1373 | } | |
1374 | ||
1375 | static struct opcode * lightrec_disassemble(struct lightrec_state *state, | |
1376 | const u32 *src, unsigned int *len) | |
1377 | { | |
ba3814c1 | 1378 | struct opcode_list *list; |
98fa08a5 PC |
1379 | unsigned int i, length; |
1380 | ||
1381 | length = lightrec_get_mips_block_len(src); | |
1382 | ||
ba3814c1 PC |
1383 | list = lightrec_malloc(state, MEM_FOR_IR, |
1384 | sizeof(*list) + sizeof(struct opcode) * length); | |
98fa08a5 PC |
1385 | if (!list) { |
1386 | pr_err("Unable to allocate memory\n"); | |
1387 | return NULL; | |
1388 | } | |
1389 | ||
ba3814c1 PC |
1390 | list->nb_ops = (u16) length; |
1391 | ||
98fa08a5 | 1392 | for (i = 0; i < length; i++) { |
ba3814c1 PC |
1393 | list->ops[i].opcode = LE32TOH(src[i]); |
1394 | list->ops[i].flags = 0; | |
98fa08a5 PC |
1395 | } |
1396 | ||
1397 | *len = length * sizeof(u32); | |
1398 | ||
ba3814c1 | 1399 | return list->ops; |
d16005f8 PC |
1400 | } |
1401 | ||
1402 | static struct block * lightrec_precompile_block(struct lightrec_state *state, | |
1403 | u32 pc) | |
1404 | { | |
1405 | struct opcode *list; | |
1406 | struct block *block; | |
ba3814c1 | 1407 | void *host, *addr; |
98fa08a5 PC |
1408 | const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg(pc)); |
1409 | const u32 *code = (u32 *) host; | |
d16005f8 | 1410 | unsigned int length; |
98fa08a5 | 1411 | bool fully_tagged; |
ba3814c1 | 1412 | u8 block_flags = 0; |
d16005f8 PC |
1413 | |
1414 | if (!map) | |
1415 | return NULL; | |
1416 | ||
d16005f8 PC |
1417 | block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block)); |
1418 | if (!block) { | |
1419 | pr_err("Unable to recompile block: Out of memory\n"); | |
1420 | return NULL; | |
1421 | } | |
1422 | ||
1423 | list = lightrec_disassemble(state, code, &length); | |
1424 | if (!list) { | |
1425 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); | |
1426 | return NULL; | |
1427 | } | |
1428 | ||
1429 | block->pc = pc; | |
d16005f8 PC |
1430 | block->_jit = NULL; |
1431 | block->function = NULL; | |
1432 | block->opcode_list = list; | |
98fa08a5 | 1433 | block->code = code; |
d16005f8 PC |
1434 | block->next = NULL; |
1435 | block->flags = 0; | |
1436 | block->code_size = 0; | |
d8b04acd | 1437 | block->precompile_date = state->current_cycle; |
d16005f8 PC |
1438 | block->nb_ops = length / sizeof(u32); |
1439 | ||
98fa08a5 | 1440 | lightrec_optimize(state, block); |
d16005f8 PC |
1441 | |
1442 | length = block->nb_ops * sizeof(u32); | |
1443 | ||
1444 | lightrec_register(MEM_FOR_MIPS_CODE, length); | |
1445 | ||
1446 | if (ENABLE_DISASSEMBLER) { | |
8afce295 | 1447 | pr_debug("Disassembled block at "PC_FMT"\n", block->pc); |
98fa08a5 | 1448 | lightrec_print_disassembly(block, code); |
d16005f8 PC |
1449 | } |
1450 | ||
98fa08a5 | 1451 | pr_debug("Block size: %hu opcodes\n", block->nb_ops); |
d16005f8 | 1452 | |
98fa08a5 PC |
1453 | fully_tagged = lightrec_block_is_fully_tagged(block); |
1454 | if (fully_tagged) | |
ba3814c1 | 1455 | block_flags |= BLOCK_FULLY_TAGGED; |
98fa08a5 | 1456 | |
ba3814c1 PC |
1457 | if (block_flags) |
1458 | block_set_flags(block, block_flags); | |
98fa08a5 | 1459 | |
d16005f8 PC |
1460 | block->hash = lightrec_calculate_block_hash(block); |
1461 | ||
ba3814c1 PC |
1462 | if (OPT_REPLACE_MEMSET && block_has_flag(block, BLOCK_IS_MEMSET)) |
1463 | addr = state->memset_func; | |
1464 | else | |
1465 | addr = state->get_next_block; | |
1466 | lut_write(state, lut_offset(pc), addr); | |
1467 | ||
cb72ea13 | 1468 | pr_debug("Blocks created: %u\n", ++state->nb_precompile); |
a59e5536 | 1469 | |
d16005f8 PC |
1470 | return block; |
1471 | } | |
1472 | ||
98fa08a5 | 1473 | static bool lightrec_block_is_fully_tagged(const struct block *block) |
d16005f8 | 1474 | { |
98fa08a5 PC |
1475 | const struct opcode *op; |
1476 | unsigned int i; | |
1477 | ||
1478 | for (i = 0; i < block->nb_ops; i++) { | |
1479 | op = &block->opcode_list[i]; | |
d16005f8 | 1480 | |
cb72ea13 PC |
1481 | /* If we have one branch that must be emulated, we cannot trash |
1482 | * the opcode list. */ | |
1483 | if (should_emulate(op)) | |
1484 | return false; | |
1485 | ||
1486 | /* Check all loads/stores of the opcode list and mark the | |
d16005f8 PC |
1487 | * block as fully compiled if they all have been tagged. */ |
1488 | switch (op->c.i.op) { | |
1489 | case OP_LB: | |
1490 | case OP_LH: | |
1491 | case OP_LWL: | |
1492 | case OP_LW: | |
1493 | case OP_LBU: | |
1494 | case OP_LHU: | |
1495 | case OP_LWR: | |
1496 | case OP_SB: | |
1497 | case OP_SH: | |
1498 | case OP_SWL: | |
1499 | case OP_SW: | |
1500 | case OP_SWR: | |
1501 | case OP_LWC2: | |
1502 | case OP_SWC2: | |
5459088b PC |
1503 | case OP_META_LWU: |
1504 | case OP_META_SWU: | |
22eee2ac | 1505 | if (!LIGHTREC_FLAGS_GET_IO_MODE(op->flags)) |
d16005f8 | 1506 | return false; |
d8b04acd PC |
1507 | fallthrough; |
1508 | default: | |
d16005f8 PC |
1509 | continue; |
1510 | } | |
1511 | } | |
1512 | ||
1513 | return true; | |
1514 | } | |
1515 | ||
98fa08a5 | 1516 | static void lightrec_reap_block(struct lightrec_state *state, void *data) |
a59e5536 | 1517 | { |
1518 | struct block *block = data; | |
1519 | ||
f5ee77ca | 1520 | pr_debug("Reap dead block at "PC_FMT"\n", block->pc); |
98fa08a5 PC |
1521 | lightrec_unregister_block(state->block_cache, block); |
1522 | lightrec_free_block(state, block); | |
a59e5536 | 1523 | } |
1524 | ||
98fa08a5 | 1525 | static void lightrec_reap_jit(struct lightrec_state *state, void *data) |
a59e5536 | 1526 | { |
1527 | _jit_destroy_state(data); | |
1528 | } | |
1529 | ||
02487de7 PC |
1530 | static void lightrec_free_function(struct lightrec_state *state, void *fn) |
1531 | { | |
1532 | if (ENABLE_CODE_BUFFER && state->tlsf) { | |
1533 | pr_debug("Freeing code block at 0x%" PRIxPTR "\n", (uintptr_t) fn); | |
d8b04acd | 1534 | lightrec_free_code(state, fn); |
02487de7 PC |
1535 | } |
1536 | } | |
1537 | ||
1538 | static void lightrec_reap_function(struct lightrec_state *state, void *data) | |
1539 | { | |
1540 | lightrec_free_function(state, data); | |
1541 | } | |
1542 | ||
ba3814c1 PC |
1543 | static void lightrec_reap_opcode_list(struct lightrec_state *state, void *data) |
1544 | { | |
1545 | lightrec_free_opcode_list(state, data); | |
1546 | } | |
1547 | ||
98fa08a5 PC |
1548 | int lightrec_compile_block(struct lightrec_cstate *cstate, |
1549 | struct block *block) | |
d16005f8 | 1550 | { |
a5a6f7b8 | 1551 | struct block *dead_blocks[ARRAY_SIZE(cstate->targets)]; |
564156dc | 1552 | u32 was_dead[ARRAY_SIZE(cstate->targets) / 8]; |
98fa08a5 | 1553 | struct lightrec_state *state = cstate->state; |
a59e5536 | 1554 | struct lightrec_branch_target *target; |
ba3814c1 | 1555 | bool fully_tagged = false; |
a59e5536 | 1556 | struct block *block2; |
d16005f8 | 1557 | struct opcode *elm; |
a59e5536 | 1558 | jit_state_t *_jit, *oldjit; |
d16005f8 PC |
1559 | jit_node_t *start_of_block; |
1560 | bool skip_next = false; | |
d8b04acd | 1561 | void *old_fn, *new_fn; |
ba3814c1 | 1562 | size_t old_code_size; |
d16005f8 | 1563 | unsigned int i, j; |
ba3814c1 | 1564 | u8 old_flags; |
98fa08a5 | 1565 | u32 offset; |
d16005f8 PC |
1566 | |
1567 | fully_tagged = lightrec_block_is_fully_tagged(block); | |
1568 | if (fully_tagged) | |
ba3814c1 | 1569 | block_set_flags(block, BLOCK_FULLY_TAGGED); |
d16005f8 PC |
1570 | |
1571 | _jit = jit_new_state(); | |
1572 | if (!_jit) | |
1573 | return -ENOMEM; | |
1574 | ||
a59e5536 | 1575 | oldjit = block->_jit; |
02487de7 | 1576 | old_fn = block->function; |
ba3814c1 | 1577 | old_code_size = block->code_size; |
d16005f8 PC |
1578 | block->_jit = _jit; |
1579 | ||
98fa08a5 | 1580 | lightrec_regcache_reset(cstate->reg_cache); |
684432ad PC |
1581 | |
1582 | if (OPT_PRELOAD_PC && (block->flags & BLOCK_PRELOAD_PC)) | |
1583 | lightrec_preload_pc(cstate->reg_cache, _jit); | |
9259d748 | 1584 | |
98fa08a5 | 1585 | cstate->cycles = 0; |
98fa08a5 PC |
1586 | cstate->nb_local_branches = 0; |
1587 | cstate->nb_targets = 0; | |
cb72ea13 | 1588 | cstate->no_load_delay = false; |
d16005f8 PC |
1589 | |
1590 | jit_prolog(); | |
1591 | jit_tramp(256); | |
1592 | ||
1593 | start_of_block = jit_label(); | |
1594 | ||
98fa08a5 PC |
1595 | for (i = 0; i < block->nb_ops; i++) { |
1596 | elm = &block->opcode_list[i]; | |
d16005f8 PC |
1597 | |
1598 | if (skip_next) { | |
1599 | skip_next = false; | |
1600 | continue; | |
1601 | } | |
1602 | ||
98fa08a5 | 1603 | if (should_emulate(elm)) { |
d16005f8 | 1604 | pr_debug("Branch at offset 0x%x will be emulated\n", |
98fa08a5 PC |
1605 | i << 2); |
1606 | ||
cb72ea13 | 1607 | lightrec_emit_jump_to_interpreter(cstate, block, i); |
03535202 | 1608 | skip_next = !op_flag_no_ds(elm->flags); |
98fa08a5 PC |
1609 | } else { |
1610 | lightrec_rec_opcode(cstate, block, i); | |
03535202 | 1611 | skip_next = !op_flag_no_ds(elm->flags) && has_delay_slot(elm->c); |
d16005f8 PC |
1612 | #if _WIN32 |
1613 | /* FIXME: GNU Lightning on Windows seems to use our | |
1614 | * mapped registers as temporaries. Until the actual bug | |
1615 | * is found and fixed, unconditionally mark our | |
1616 | * registers as live here. */ | |
98fa08a5 | 1617 | lightrec_regcache_mark_live(cstate->reg_cache, _jit); |
d16005f8 PC |
1618 | #endif |
1619 | } | |
03535202 | 1620 | |
684432ad | 1621 | cstate->cycles += lightrec_cycles_of_opcode(state, elm->c); |
d16005f8 PC |
1622 | } |
1623 | ||
98fa08a5 PC |
1624 | for (i = 0; i < cstate->nb_local_branches; i++) { |
1625 | struct lightrec_branch *branch = &cstate->local_branches[i]; | |
d16005f8 PC |
1626 | |
1627 | pr_debug("Patch local branch to offset 0x%x\n", | |
1628 | branch->target << 2); | |
1629 | ||
1630 | if (branch->target == 0) { | |
1631 | jit_patch_at(branch->branch, start_of_block); | |
1632 | continue; | |
1633 | } | |
1634 | ||
98fa08a5 PC |
1635 | for (j = 0; j < cstate->nb_targets; j++) { |
1636 | if (cstate->targets[j].offset == branch->target) { | |
d16005f8 | 1637 | jit_patch_at(branch->branch, |
98fa08a5 | 1638 | cstate->targets[j].label); |
d16005f8 PC |
1639 | break; |
1640 | } | |
1641 | } | |
1642 | ||
98fa08a5 | 1643 | if (j == cstate->nb_targets) |
d16005f8 PC |
1644 | pr_err("Unable to find branch target\n"); |
1645 | } | |
1646 | ||
d16005f8 PC |
1647 | jit_ret(); |
1648 | jit_epilog(); | |
1649 | ||
d8b04acd PC |
1650 | new_fn = lightrec_emit_code(state, block, _jit, &block->code_size); |
1651 | if (!new_fn) { | |
1652 | if (!ENABLE_THREADED_COMPILER) | |
1653 | pr_err("Unable to compile block!\n"); | |
1654 | block->_jit = oldjit; | |
ba3814c1 | 1655 | jit_clear_state(); |
d8b04acd PC |
1656 | _jit_destroy_state(_jit); |
1657 | return -ENOMEM; | |
02487de7 PC |
1658 | } |
1659 | ||
ba3814c1 PC |
1660 | /* Pause the reaper, because lightrec_reset_lut_offset() may try to set |
1661 | * the old block->function pointer to the code LUT. */ | |
1662 | if (ENABLE_THREADED_COMPILER) | |
1663 | lightrec_reaper_pause(state->reaper); | |
1664 | ||
d8b04acd | 1665 | block->function = new_fn; |
ba3814c1 | 1666 | block_clear_flags(block, BLOCK_SHOULD_RECOMPILE); |
d16005f8 PC |
1667 | |
1668 | /* Add compiled function to the LUT */ | |
02487de7 | 1669 | lut_write(state, lut_offset(block->pc), block->function); |
d16005f8 | 1670 | |
a59e5536 | 1671 | /* Detect old blocks that have been covered by the new one */ |
564156dc | 1672 | for (i = 0; ENABLE_THREADED_COMPILER && i < cstate->nb_targets; i++) { |
98fa08a5 | 1673 | target = &cstate->targets[i]; |
a59e5536 | 1674 | |
1675 | if (!target->offset) | |
1676 | continue; | |
1677 | ||
1678 | offset = block->pc + target->offset * sizeof(u32); | |
ba3814c1 | 1679 | |
a59e5536 | 1680 | block2 = lightrec_find_block(state->block_cache, offset); |
1681 | if (block2) { | |
1682 | /* No need to check if block2 is compilable - it must | |
1683 | * be, otherwise block wouldn't be compilable either */ | |
1684 | ||
98fa08a5 PC |
1685 | /* Set the "block dead" flag to prevent the dynarec from |
1686 | * recompiling this block */ | |
ba3814c1 | 1687 | old_flags = block_set_flags(block2, BLOCK_IS_DEAD); |
564156dc PC |
1688 | |
1689 | if (old_flags & BLOCK_IS_DEAD) | |
1690 | was_dead[i / 32] |= BIT(i % 32); | |
1691 | else | |
1692 | was_dead[i / 32] &= ~BIT(i % 32); | |
ba3814c1 PC |
1693 | } |
1694 | ||
a5a6f7b8 PC |
1695 | dead_blocks[i] = block2; |
1696 | ||
564156dc PC |
1697 | /* If block2 was pending for compilation, cancel it. |
1698 | * If it's being compiled right now, wait until it finishes. */ | |
1699 | if (block2) | |
1700 | lightrec_recompiler_remove(state->rec, block2); | |
1701 | } | |
a59e5536 | 1702 | |
564156dc PC |
1703 | for (i = 0; i < cstate->nb_targets; i++) { |
1704 | target = &cstate->targets[i]; | |
1705 | ||
1706 | if (!target->offset) | |
1707 | continue; | |
98fa08a5 | 1708 | |
fd58fa32 PC |
1709 | /* We know from now on that block2 (if present) isn't going to |
1710 | * be compiled. We can override the LUT entry with our new | |
1711 | * block's entry point. */ | |
1712 | offset = lut_offset(block->pc) + target->offset; | |
02487de7 | 1713 | lut_write(state, offset, jit_address(target->label)); |
98fa08a5 | 1714 | |
a5a6f7b8 PC |
1715 | if (ENABLE_THREADED_COMPILER) { |
1716 | block2 = dead_blocks[i]; | |
1717 | } else { | |
1718 | offset = block->pc + target->offset * sizeof(u32); | |
1719 | block2 = lightrec_find_block(state->block_cache, offset); | |
1720 | } | |
fd58fa32 | 1721 | if (block2) { |
8afce295 PC |
1722 | pr_debug("Reap block "X32_FMT" as it's covered by block " |
1723 | X32_FMT"\n", block2->pc, block->pc); | |
a59e5536 | 1724 | |
98fa08a5 | 1725 | /* Finally, reap the block. */ |
ba3814c1 PC |
1726 | if (!ENABLE_THREADED_COMPILER) { |
1727 | lightrec_unregister_block(state->block_cache, block2); | |
1728 | lightrec_free_block(state, block2); | |
564156dc | 1729 | } else if (!(was_dead[i / 32] & BIT(i % 32))) { |
a59e5536 | 1730 | lightrec_reaper_add(state->reaper, |
1731 | lightrec_reap_block, | |
1732 | block2); | |
a59e5536 | 1733 | } |
1734 | } | |
1735 | } | |
1736 | ||
564156dc PC |
1737 | if (ENABLE_THREADED_COMPILER) |
1738 | lightrec_reaper_continue(state->reaper); | |
1739 | ||
d16005f8 | 1740 | if (ENABLE_DISASSEMBLER) { |
8afce295 | 1741 | pr_debug("Compiling block at "PC_FMT"\n", block->pc); |
d16005f8 PC |
1742 | jit_disassemble(); |
1743 | } | |
1744 | ||
1745 | jit_clear_state(); | |
1746 | ||
d16005f8 | 1747 | if (fully_tagged) |
ba3814c1 PC |
1748 | old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST); |
1749 | ||
1750 | if (fully_tagged && !(old_flags & BLOCK_NO_OPCODE_LIST)) { | |
f5ee77ca | 1751 | pr_debug("Block "PC_FMT" is fully tagged" |
d16005f8 | 1752 | " - free opcode list\n", block->pc); |
ba3814c1 PC |
1753 | |
1754 | if (ENABLE_THREADED_COMPILER) { | |
1755 | lightrec_reaper_add(state->reaper, | |
1756 | lightrec_reap_opcode_list, | |
1757 | block->opcode_list); | |
1758 | } else { | |
1759 | lightrec_free_opcode_list(state, block->opcode_list); | |
1760 | } | |
d16005f8 PC |
1761 | } |
1762 | ||
a59e5536 | 1763 | if (oldjit) { |
8afce295 | 1764 | pr_debug("Block "X32_FMT" recompiled, reaping old jit context.\n", |
a59e5536 | 1765 | block->pc); |
1766 | ||
02487de7 | 1767 | if (ENABLE_THREADED_COMPILER) { |
a59e5536 | 1768 | lightrec_reaper_add(state->reaper, |
1769 | lightrec_reap_jit, oldjit); | |
02487de7 PC |
1770 | lightrec_reaper_add(state->reaper, |
1771 | lightrec_reap_function, old_fn); | |
1772 | } else { | |
a59e5536 | 1773 | _jit_destroy_state(oldjit); |
02487de7 PC |
1774 | lightrec_free_function(state, old_fn); |
1775 | } | |
ba3814c1 PC |
1776 | |
1777 | lightrec_unregister(MEM_FOR_CODE, old_code_size); | |
a59e5536 | 1778 | } |
1779 | ||
cb72ea13 PC |
1780 | pr_debug("Blocks compiled: %u\n", ++state->nb_compile); |
1781 | ||
d16005f8 PC |
1782 | return 0; |
1783 | } | |
1784 | ||
98fa08a5 PC |
1785 | static void lightrec_print_info(struct lightrec_state *state) |
1786 | { | |
1787 | if ((state->current_cycle & ~0xfffffff) != state->old_cycle_counter) { | |
1788 | pr_info("Lightrec RAM usage: IR %u KiB, CODE %u KiB, " | |
1789 | "MIPS %u KiB, TOTAL %u KiB, avg. IPI %f\n", | |
1790 | lightrec_get_mem_usage(MEM_FOR_IR) / 1024, | |
1791 | lightrec_get_mem_usage(MEM_FOR_CODE) / 1024, | |
1792 | lightrec_get_mem_usage(MEM_FOR_MIPS_CODE) / 1024, | |
1793 | lightrec_get_total_mem_usage() / 1024, | |
1794 | lightrec_get_average_ipi()); | |
1795 | state->old_cycle_counter = state->current_cycle & ~0xfffffff; | |
1796 | } | |
1797 | } | |
1798 | ||
d16005f8 PC |
1799 | u32 lightrec_execute(struct lightrec_state *state, u32 pc, u32 target_cycle) |
1800 | { | |
9259d748 | 1801 | s32 (*func)(struct lightrec_state *, u32, void *, s32) = (void *)state->dispatcher->function; |
d16005f8 PC |
1802 | void *block_trace; |
1803 | s32 cycles_delta; | |
1804 | ||
1805 | state->exit_flags = LIGHTREC_EXIT_NORMAL; | |
1806 | ||
1807 | /* Handle the cycle counter overflowing */ | |
1808 | if (unlikely(target_cycle < state->current_cycle)) | |
1809 | target_cycle = UINT_MAX; | |
1810 | ||
1811 | state->target_cycle = target_cycle; | |
0e720fb1 | 1812 | state->curr_pc = pc; |
d16005f8 PC |
1813 | |
1814 | block_trace = get_next_block_func(state, pc); | |
1815 | if (block_trace) { | |
1816 | cycles_delta = state->target_cycle - state->current_cycle; | |
1817 | ||
0e720fb1 | 1818 | cycles_delta = (*func)(state, state->curr_pc, |
9259d748 | 1819 | block_trace, cycles_delta); |
d16005f8 PC |
1820 | |
1821 | state->current_cycle = state->target_cycle - cycles_delta; | |
1822 | } | |
1823 | ||
a59e5536 | 1824 | if (ENABLE_THREADED_COMPILER) |
1825 | lightrec_reaper_reap(state->reaper); | |
1826 | ||
98fa08a5 PC |
1827 | if (LOG_LEVEL >= INFO_L) |
1828 | lightrec_print_info(state); | |
1829 | ||
0e720fb1 | 1830 | return state->curr_pc; |
d16005f8 PC |
1831 | } |
1832 | ||
ba3814c1 PC |
1833 | u32 lightrec_run_interpreter(struct lightrec_state *state, u32 pc, |
1834 | u32 target_cycle) | |
d16005f8 | 1835 | { |
ba3814c1 | 1836 | struct block *block; |
d16005f8 PC |
1837 | |
1838 | state->exit_flags = LIGHTREC_EXIT_NORMAL; | |
ba3814c1 PC |
1839 | state->target_cycle = target_cycle; |
1840 | ||
1841 | do { | |
1842 | block = lightrec_get_block(state, pc); | |
1843 | if (!block) | |
1844 | break; | |
1845 | ||
1846 | pc = lightrec_emulate_block(state, block, pc); | |
d16005f8 | 1847 | |
ba3814c1 PC |
1848 | if (ENABLE_THREADED_COMPILER) |
1849 | lightrec_reaper_reap(state->reaper); | |
1850 | } while (state->current_cycle < state->target_cycle); | |
98fa08a5 PC |
1851 | |
1852 | if (LOG_LEVEL >= INFO_L) | |
1853 | lightrec_print_info(state); | |
1854 | ||
1855 | return pc; | |
d16005f8 PC |
1856 | } |
1857 | ||
98fa08a5 | 1858 | void lightrec_free_block(struct lightrec_state *state, struct block *block) |
d16005f8 | 1859 | { |
ba3814c1 PC |
1860 | u8 old_flags; |
1861 | ||
d16005f8 | 1862 | lightrec_unregister(MEM_FOR_MIPS_CODE, block->nb_ops * sizeof(u32)); |
ba3814c1 PC |
1863 | old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST); |
1864 | ||
1865 | if (!(old_flags & BLOCK_NO_OPCODE_LIST)) | |
1866 | lightrec_free_opcode_list(state, block->opcode_list); | |
d16005f8 PC |
1867 | if (block->_jit) |
1868 | _jit_destroy_state(block->_jit); | |
d8b04acd PC |
1869 | if (block->function) { |
1870 | lightrec_free_function(state, block->function); | |
1871 | lightrec_unregister(MEM_FOR_CODE, block->code_size); | |
1872 | } | |
98fa08a5 PC |
1873 | lightrec_free(state, MEM_FOR_IR, sizeof(*block), block); |
1874 | } | |
1875 | ||
1876 | struct lightrec_cstate * lightrec_create_cstate(struct lightrec_state *state) | |
1877 | { | |
1878 | struct lightrec_cstate *cstate; | |
1879 | ||
1880 | cstate = lightrec_malloc(state, MEM_FOR_LIGHTREC, sizeof(*cstate)); | |
1881 | if (!cstate) | |
1882 | return NULL; | |
1883 | ||
1884 | cstate->reg_cache = lightrec_regcache_init(state); | |
1885 | if (!cstate->reg_cache) { | |
1886 | lightrec_free(state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate); | |
1887 | return NULL; | |
1888 | } | |
1889 | ||
1890 | cstate->state = state; | |
1891 | ||
1892 | return cstate; | |
1893 | } | |
1894 | ||
1895 | void lightrec_free_cstate(struct lightrec_cstate *cstate) | |
1896 | { | |
1897 | lightrec_free_regcache(cstate->reg_cache); | |
1898 | lightrec_free(cstate->state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate); | |
d16005f8 PC |
1899 | } |
1900 | ||
1901 | struct lightrec_state * lightrec_init(char *argv0, | |
878e6cda | 1902 | const struct lightrec_mem_map *maps, |
d16005f8 PC |
1903 | size_t nb, |
1904 | const struct lightrec_ops *ops) | |
1905 | { | |
878e6cda PC |
1906 | const struct lightrec_mem_map *codebuf_map = &maps[PSX_MAP_CODE_BUFFER]; |
1907 | const struct lightrec_mem_map *map; | |
d16005f8 | 1908 | struct lightrec_state *state; |
02487de7 PC |
1909 | uintptr_t addr; |
1910 | void *tlsf = NULL; | |
1911 | bool with_32bit_lut = false; | |
1912 | size_t lut_size; | |
d16005f8 PC |
1913 | |
1914 | /* Sanity-check ops */ | |
98fa08a5 | 1915 | if (!ops || !ops->cop2_op || !ops->enable_ram) { |
d16005f8 PC |
1916 | pr_err("Missing callbacks in lightrec_ops structure\n"); |
1917 | return NULL; | |
1918 | } | |
1919 | ||
fdf33147 PC |
1920 | if (ops->cop2_notify) |
1921 | pr_debug("Optional cop2_notify callback in lightrec_ops\n"); | |
1922 | else | |
1923 | pr_debug("No optional cop2_notify callback in lightrec_ops\n"); | |
1924 | ||
d8b04acd PC |
1925 | if (ENABLE_CODE_BUFFER && nb > PSX_MAP_CODE_BUFFER |
1926 | && codebuf_map->address) { | |
02487de7 PC |
1927 | tlsf = tlsf_create_with_pool(codebuf_map->address, |
1928 | codebuf_map->length); | |
1929 | if (!tlsf) { | |
1930 | pr_err("Unable to initialize code buffer\n"); | |
1931 | return NULL; | |
1932 | } | |
1933 | ||
1934 | if (__WORDSIZE == 64) { | |
1935 | addr = (uintptr_t) codebuf_map->address + codebuf_map->length - 1; | |
1936 | with_32bit_lut = addr == (u32) addr; | |
1937 | } | |
1938 | } | |
1939 | ||
1940 | if (with_32bit_lut) | |
1941 | lut_size = CODE_LUT_SIZE * 4; | |
1942 | else | |
1943 | lut_size = CODE_LUT_SIZE * sizeof(void *); | |
1944 | ||
fb67ea33 | 1945 | init_jit_with_debug(argv0, stdout); |
d16005f8 | 1946 | |
02487de7 | 1947 | state = calloc(1, sizeof(*state) + lut_size); |
d16005f8 PC |
1948 | if (!state) |
1949 | goto err_finish_jit; | |
1950 | ||
02487de7 PC |
1951 | lightrec_register(MEM_FOR_LIGHTREC, sizeof(*state) + lut_size); |
1952 | ||
1953 | state->tlsf = tlsf; | |
1954 | state->with_32bit_lut = with_32bit_lut; | |
cb72ea13 | 1955 | state->in_delay_slot_n = 0xff; |
684432ad | 1956 | state->cycles_per_op = 2; |
d16005f8 | 1957 | |
d16005f8 PC |
1958 | state->block_cache = lightrec_blockcache_init(state); |
1959 | if (!state->block_cache) | |
d8b04acd | 1960 | goto err_free_state; |
d16005f8 | 1961 | |
d16005f8 PC |
1962 | if (ENABLE_THREADED_COMPILER) { |
1963 | state->rec = lightrec_recompiler_init(state); | |
1964 | if (!state->rec) | |
98fa08a5 | 1965 | goto err_free_block_cache; |
a59e5536 | 1966 | |
1967 | state->reaper = lightrec_reaper_init(state); | |
1968 | if (!state->reaper) | |
1969 | goto err_free_recompiler; | |
98fa08a5 PC |
1970 | } else { |
1971 | state->cstate = lightrec_create_cstate(state); | |
1972 | if (!state->cstate) | |
1973 | goto err_free_block_cache; | |
d16005f8 PC |
1974 | } |
1975 | ||
1976 | state->nb_maps = nb; | |
878e6cda | 1977 | state->maps = maps; |
d16005f8 PC |
1978 | |
1979 | memcpy(&state->ops, ops, sizeof(*ops)); | |
1980 | ||
1981 | state->dispatcher = generate_dispatcher(state); | |
1982 | if (!state->dispatcher) | |
a59e5536 | 1983 | goto err_free_reaper; |
d16005f8 | 1984 | |
98fa08a5 PC |
1985 | state->c_wrapper_block = generate_wrapper(state); |
1986 | if (!state->c_wrapper_block) | |
d16005f8 PC |
1987 | goto err_free_dispatcher; |
1988 | ||
98fa08a5 PC |
1989 | state->c_wrappers[C_WRAPPER_RW] = lightrec_rw_cb; |
1990 | state->c_wrappers[C_WRAPPER_RW_GENERIC] = lightrec_rw_generic_cb; | |
fdf33147 | 1991 | state->c_wrappers[C_WRAPPER_MFC] = lightrec_mfc_cb; |
98fa08a5 | 1992 | state->c_wrappers[C_WRAPPER_MTC] = lightrec_mtc_cb; |
22eee2ac | 1993 | state->c_wrappers[C_WRAPPER_CP] = lightrec_cp_cb; |
d16005f8 | 1994 | |
878e6cda | 1995 | map = &maps[PSX_MAP_BIOS]; |
d16005f8 PC |
1996 | state->offset_bios = (uintptr_t)map->address - map->pc; |
1997 | ||
878e6cda | 1998 | map = &maps[PSX_MAP_SCRATCH_PAD]; |
d16005f8 PC |
1999 | state->offset_scratch = (uintptr_t)map->address - map->pc; |
2000 | ||
878e6cda | 2001 | map = &maps[PSX_MAP_HW_REGISTERS]; |
ba3814c1 PC |
2002 | state->offset_io = (uintptr_t)map->address - map->pc; |
2003 | ||
878e6cda | 2004 | map = &maps[PSX_MAP_KERNEL_USER_RAM]; |
d16005f8 PC |
2005 | state->offset_ram = (uintptr_t)map->address - map->pc; |
2006 | ||
878e6cda PC |
2007 | if (maps[PSX_MAP_MIRROR1].address == map->address + 0x200000 && |
2008 | maps[PSX_MAP_MIRROR2].address == map->address + 0x400000 && | |
2009 | maps[PSX_MAP_MIRROR3].address == map->address + 0x600000) | |
d16005f8 PC |
2010 | state->mirrors_mapped = true; |
2011 | ||
98fa08a5 PC |
2012 | if (state->offset_bios == 0 && |
2013 | state->offset_scratch == 0 && | |
2014 | state->offset_ram == 0 && | |
ba3814c1 | 2015 | state->offset_io == 0 && |
98fa08a5 PC |
2016 | state->mirrors_mapped) { |
2017 | pr_info("Memory map is perfect. Emitted code will be best.\n"); | |
2018 | } else { | |
2019 | pr_info("Memory map is sub-par. Emitted code will be slow.\n"); | |
2020 | } | |
2021 | ||
02487de7 PC |
2022 | if (state->with_32bit_lut) |
2023 | pr_info("Using 32-bit LUT\n"); | |
2024 | ||
d16005f8 PC |
2025 | return state; |
2026 | ||
d16005f8 | 2027 | err_free_dispatcher: |
98fa08a5 | 2028 | lightrec_free_block(state, state->dispatcher); |
a59e5536 | 2029 | err_free_reaper: |
2030 | if (ENABLE_THREADED_COMPILER) | |
2031 | lightrec_reaper_destroy(state->reaper); | |
d16005f8 PC |
2032 | err_free_recompiler: |
2033 | if (ENABLE_THREADED_COMPILER) | |
2034 | lightrec_free_recompiler(state->rec); | |
98fa08a5 PC |
2035 | else |
2036 | lightrec_free_cstate(state->cstate); | |
d16005f8 PC |
2037 | err_free_block_cache: |
2038 | lightrec_free_block_cache(state->block_cache); | |
d16005f8 | 2039 | err_free_state: |
d16005f8 | 2040 | lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) + |
02487de7 | 2041 | lut_elm_size(state) * CODE_LUT_SIZE); |
d16005f8 PC |
2042 | free(state); |
2043 | err_finish_jit: | |
2044 | finish_jit(); | |
02487de7 PC |
2045 | if (ENABLE_CODE_BUFFER && tlsf) |
2046 | tlsf_destroy(tlsf); | |
d16005f8 PC |
2047 | return NULL; |
2048 | } | |
2049 | ||
2050 | void lightrec_destroy(struct lightrec_state *state) | |
2051 | { | |
98fa08a5 PC |
2052 | /* Force a print info on destroy*/ |
2053 | state->current_cycle = ~state->current_cycle; | |
2054 | lightrec_print_info(state); | |
2055 | ||
03535202 PC |
2056 | lightrec_free_block_cache(state->block_cache); |
2057 | lightrec_free_block(state, state->dispatcher); | |
2058 | lightrec_free_block(state, state->c_wrapper_block); | |
2059 | ||
a59e5536 | 2060 | if (ENABLE_THREADED_COMPILER) { |
d16005f8 | 2061 | lightrec_free_recompiler(state->rec); |
a59e5536 | 2062 | lightrec_reaper_destroy(state->reaper); |
98fa08a5 PC |
2063 | } else { |
2064 | lightrec_free_cstate(state->cstate); | |
a59e5536 | 2065 | } |
d16005f8 | 2066 | |
d16005f8 | 2067 | finish_jit(); |
02487de7 PC |
2068 | if (ENABLE_CODE_BUFFER && state->tlsf) |
2069 | tlsf_destroy(state->tlsf); | |
d16005f8 | 2070 | |
d16005f8 | 2071 | lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) + |
02487de7 | 2072 | lut_elm_size(state) * CODE_LUT_SIZE); |
d16005f8 PC |
2073 | free(state); |
2074 | } | |
2075 | ||
2076 | void lightrec_invalidate(struct lightrec_state *state, u32 addr, u32 len) | |
2077 | { | |
2078 | u32 kaddr = kunseg(addr & ~0x3); | |
d8b04acd | 2079 | enum psx_map idx = lightrec_get_map_idx(state, kaddr); |
d16005f8 | 2080 | |
d8b04acd PC |
2081 | switch (idx) { |
2082 | case PSX_MAP_MIRROR1: | |
2083 | case PSX_MAP_MIRROR2: | |
2084 | case PSX_MAP_MIRROR3: | |
d16005f8 | 2085 | /* Handle mirrors */ |
d8b04acd PC |
2086 | kaddr &= RAM_SIZE - 1; |
2087 | fallthrough; | |
2088 | case PSX_MAP_KERNEL_USER_RAM: | |
2089 | break; | |
2090 | default: | |
2091 | return; | |
d16005f8 | 2092 | } |
d8b04acd PC |
2093 | |
2094 | memset(lut_address(state, lut_offset(kaddr)), 0, | |
2095 | ((len + 3) / 4) * lut_elm_size(state)); | |
d16005f8 PC |
2096 | } |
2097 | ||
2098 | void lightrec_invalidate_all(struct lightrec_state *state) | |
2099 | { | |
02487de7 | 2100 | memset(state->code_lut, 0, lut_elm_size(state) * CODE_LUT_SIZE); |
d16005f8 PC |
2101 | } |
2102 | ||
684432ad | 2103 | void lightrec_set_unsafe_opt_flags(struct lightrec_state *state, u32 flags) |
d16005f8 | 2104 | { |
684432ad | 2105 | if ((flags ^ state->opt_flags) & LIGHTREC_OPT_INV_DMA_ONLY) |
d16005f8 PC |
2106 | lightrec_invalidate_all(state); |
2107 | ||
684432ad | 2108 | state->opt_flags = flags; |
d16005f8 PC |
2109 | } |
2110 | ||
2111 | void lightrec_set_exit_flags(struct lightrec_state *state, u32 flags) | |
2112 | { | |
2113 | if (flags != LIGHTREC_EXIT_NORMAL) { | |
2114 | state->exit_flags |= flags; | |
2115 | state->target_cycle = state->current_cycle; | |
2116 | } | |
2117 | } | |
2118 | ||
2119 | u32 lightrec_exit_flags(struct lightrec_state *state) | |
2120 | { | |
2121 | return state->exit_flags; | |
2122 | } | |
2123 | ||
d16005f8 PC |
2124 | u32 lightrec_current_cycle_count(const struct lightrec_state *state) |
2125 | { | |
2126 | return state->current_cycle; | |
2127 | } | |
2128 | ||
2129 | void lightrec_reset_cycle_count(struct lightrec_state *state, u32 cycles) | |
2130 | { | |
2131 | state->current_cycle = cycles; | |
2132 | ||
2133 | if (state->target_cycle < cycles) | |
2134 | state->target_cycle = cycles; | |
2135 | } | |
2136 | ||
2137 | void lightrec_set_target_cycle_count(struct lightrec_state *state, u32 cycles) | |
2138 | { | |
2139 | if (state->exit_flags == LIGHTREC_EXIT_NORMAL) { | |
2140 | if (cycles < state->current_cycle) | |
2141 | cycles = state->current_cycle; | |
2142 | ||
2143 | state->target_cycle = cycles; | |
2144 | } | |
2145 | } | |
98fa08a5 PC |
2146 | |
2147 | struct lightrec_registers * lightrec_get_registers(struct lightrec_state *state) | |
2148 | { | |
2149 | return &state->regs; | |
2150 | } | |
684432ad PC |
2151 | |
2152 | void lightrec_set_cycles_per_opcode(struct lightrec_state *state, u32 cycles) | |
2153 | { | |
878e6cda PC |
2154 | if (state->cycles_per_op == cycles) |
2155 | return; | |
2156 | ||
684432ad | 2157 | state->cycles_per_op = cycles; |
878e6cda PC |
2158 | |
2159 | if (ENABLE_THREADED_COMPILER) { | |
2160 | lightrec_recompiler_pause(state->rec); | |
2161 | lightrec_reaper_reap(state->reaper); | |
2162 | } | |
2163 | ||
2164 | lightrec_invalidate_all(state); | |
2165 | lightrec_free_all_blocks(state->block_cache); | |
2166 | ||
2167 | if (ENABLE_THREADED_COMPILER) | |
2168 | lightrec_recompiler_unpause(state->rec); | |
684432ad | 2169 | } |