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Merge pull request #835 from pcercuei/misc-fixes
[pcsx_rearmed.git] / deps / lightrec / lightrec.c
CommitLineData
98fa08a5 1// SPDX-License-Identifier: LGPL-2.1-or-later
d16005f8 2/*
98fa08a5 3 * Copyright (C) 2014-2021 Paul Cercueil <paul@crapouillou.net>
d16005f8
PC		 4 */
5
6#include "blockcache.h"
d16005f8
PC		 7#include "debug.h"
8#include "disassembler.h"
9#include "emitter.h"
10#include "interpreter.h"
98fa08a5
PC		 11#include "lightrec-config.h"
12#include "lightning-wrapper.h"
d16005f8
PC		 13#include "lightrec.h"
14#include "memmanager.h"
a59e5536 15#include "reaper.h"
d16005f8
PC		 16#include "recompiler.h"
17#include "regcache.h"
18#include "optimizer.h"
02487de7 19#include "tlsf/tlsf.h"
d16005f8
PC		 20
21#include <errno.h>
98fa08a5 22#include <inttypes.h>
d16005f8
PC		 23#include <limits.h>
24#if ENABLE_THREADED_COMPILER
25#include <stdatomic.h>
26#endif
27#include <stdbool.h>
28#include <stddef.h>
29#include <string.h>
d16005f8 30
d16005f8
PC		 31static struct block * lightrec_precompile_block(struct lightrec_state *state,
32 u32 pc);
98fa08a5
PC		 33static bool lightrec_block_is_fully_tagged(const struct block *block);
34
35static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data);
36static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg);
d16005f8 37
a5a6f7b8
PC		 38static void lightrec_reap_block(struct lightrec_state *state, void *data);
39
a59e5536 40static void lightrec_default_sb(struct lightrec_state *state, u32 opcode,
2e6c828e 41 void *host, u32 addr, u32 data)
a59e5536 42{
2e6c828e 43 *(u8 *)host = (u8)data;
a59e5536 44
684432ad 45 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
a59e5536 46 lightrec_invalidate(state, addr, 1);
47}
48
49static void lightrec_default_sh(struct lightrec_state *state, u32 opcode,
2e6c828e 50 void *host, u32 addr, u32 data)
a59e5536 51{
2e6c828e 52 *(u16 *)host = HTOLE16((u16)data);
a59e5536 53
684432ad 54 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
a59e5536 55 lightrec_invalidate(state, addr, 2);
56}
57
58static void lightrec_default_sw(struct lightrec_state *state, u32 opcode,
59 void *host, u32 addr, u32 data)
60{
61 *(u32 *)host = HTOLE32(data);
62
684432ad 63 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
a59e5536 64 lightrec_invalidate(state, addr, 4);
65}
66
67static u8 lightrec_default_lb(struct lightrec_state *state,
68 u32 opcode, void *host, u32 addr)
69{
70 return *(u8 *)host;
71}
72
73static u16 lightrec_default_lh(struct lightrec_state *state,
74 u32 opcode, void *host, u32 addr)
75{
76 return LE16TOH(*(u16 *)host);
77}
78
79static u32 lightrec_default_lw(struct lightrec_state *state,
80 u32 opcode, void *host, u32 addr)
81{
82 return LE32TOH(*(u32 *)host);
83}
84
5459088b
PC		 85static u32 lightrec_default_lwu(struct lightrec_state *state,
86 u32 opcode, void *host, u32 addr)
87{
88 u32 val;
89
90 memcpy(&val, host, 4);
91
92 return LE32TOH(val);
93}
94
95static void lightrec_default_swu(struct lightrec_state *state, u32 opcode,
96 void *host, u32 addr, u32 data)
97{
98 data = HTOLE32(data);
99
100 memcpy(host, &data, 4);
101
102 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
103 lightrec_invalidate(state, addr & ~0x3, 8);
104}
105
a59e5536 106static const struct lightrec_mem_map_ops lightrec_default_ops = {
107 .sb = lightrec_default_sb,
108 .sh = lightrec_default_sh,
109 .sw = lightrec_default_sw,
110 .lb = lightrec_default_lb,
111 .lh = lightrec_default_lh,
112 .lw = lightrec_default_lw,
5459088b
PC		 113 .lwu = lightrec_default_lwu,
114 .swu = lightrec_default_swu,
a59e5536 115};
116
98fa08a5
PC		 117static void __segfault_cb(struct lightrec_state *state, u32 addr,
118 const struct block *block)
d16005f8
PC		 119{
120 lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT);
121 pr_err("Segmentation fault in recompiled code: invalid "
f5ee77ca 122 "load/store at address "PC_FMT"\n", addr);
98fa08a5 123 if (block)
f5ee77ca 124 pr_err("Was executing block "PC_FMT"\n", block->pc);
d16005f8
PC		 125}
126
a59e5536 127static void lightrec_swl(struct lightrec_state *state,
128 const struct lightrec_mem_map_ops *ops,
129 u32 opcode, void *host, u32 addr, u32 data)
d16005f8 130{
a59e5536 131 unsigned int shift = addr & 0x3;
13b02197 132 unsigned int mask = shift < 3 ? GENMASK(31, (shift + 1) * 8) : 0;
a59e5536 133 u32 old_data;
134
135 /* Align to 32 bits */
136 addr &= ~3;
137 host = (void *)((uintptr_t)host & ~3);
138
139 old_data = ops->lw(state, opcode, host, addr);
140
141 data = (data >> ((3 - shift) * 8)) | (old_data & mask);
142
143 ops->sw(state, opcode, host, addr, data);
144}
145
146static void lightrec_swr(struct lightrec_state *state,
147 const struct lightrec_mem_map_ops *ops,
148 u32 opcode, void *host, u32 addr, u32 data)
149{
150 unsigned int shift = addr & 0x3;
151 unsigned int mask = (1 << (shift * 8)) - 1;
152 u32 old_data;
153
154 /* Align to 32 bits */
155 addr &= ~3;
156 host = (void *)((uintptr_t)host & ~3);
157
158 old_data = ops->lw(state, opcode, host, addr);
159
160 data = (data << (shift * 8)) | (old_data & mask);
161
162 ops->sw(state, opcode, host, addr, data);
163}
164
165static void lightrec_swc2(struct lightrec_state *state, union code op,
166 const struct lightrec_mem_map_ops *ops,
167 void *host, u32 addr)
168{
98fa08a5 169 u32 data = lightrec_mfc2(state, op.i.rt);
a59e5536 170
171 ops->sw(state, op.opcode, host, addr, data);
172}
173
174static u32 lightrec_lwl(struct lightrec_state *state,
175 const struct lightrec_mem_map_ops *ops,
176 u32 opcode, void *host, u32 addr, u32 data)
177{
178 unsigned int shift = addr & 0x3;
179 unsigned int mask = (1 << (24 - shift * 8)) - 1;
180 u32 old_data;
181
182 /* Align to 32 bits */
183 addr &= ~3;
184 host = (void *)((uintptr_t)host & ~3);
185
186 old_data = ops->lw(state, opcode, host, addr);
187
188 return (data & mask) | (old_data << (24 - shift * 8));
189}
190
191static u32 lightrec_lwr(struct lightrec_state *state,
192 const struct lightrec_mem_map_ops *ops,
193 u32 opcode, void *host, u32 addr, u32 data)
194{
195 unsigned int shift = addr & 0x3;
13b02197 196 unsigned int mask = shift ? GENMASK(31, 32 - shift * 8) : 0;
a59e5536 197 u32 old_data;
198
199 /* Align to 32 bits */
200 addr &= ~3;
201 host = (void *)((uintptr_t)host & ~3);
202
203 old_data = ops->lw(state, opcode, host, addr);
204
205 return (data & mask) | (old_data >> (shift * 8));
206}
207
208static void lightrec_lwc2(struct lightrec_state *state, union code op,
209 const struct lightrec_mem_map_ops *ops,
210 void *host, u32 addr)
211{
212 u32 data = ops->lw(state, op.opcode, host, addr);
213
98fa08a5 214 lightrec_mtc2(state, op.i.rt, data);
d16005f8
PC		 215}
216
217static void lightrec_invalidate_map(struct lightrec_state *state,
98fa08a5 218 const struct lightrec_mem_map *map, u32 addr, u32 len)
d16005f8 219{
98fa08a5 220 if (map == &state->maps[PSX_MAP_KERNEL_USER_RAM]) {
02487de7
PC		 221 memset(lut_address(state, lut_offset(addr)), 0,
222 ((len + 3) / 4) * lut_elm_size(state));
98fa08a5 223 }
d16005f8
PC		 224}
225
9259d748 226static enum psx_map
02487de7 227lightrec_get_map_idx(struct lightrec_state *state, u32 kaddr)
d16005f8 228{
98fa08a5 229 const struct lightrec_mem_map *map;
d16005f8
PC		 230 unsigned int i;
231
232 for (i = 0; i < state->nb_maps; i++) {
02487de7 233 map = &state->maps[i];
d16005f8 234
02487de7
PC		 235 if (kaddr >= map->pc && kaddr < map->pc + map->length)
236 return (enum psx_map) i;
d16005f8
PC		 237 }
238
02487de7
PC		 239 return PSX_MAP_UNKNOWN;
240}
241
242const struct lightrec_mem_map *
243lightrec_get_map(struct lightrec_state *state, void **host, u32 kaddr)
244{
245 const struct lightrec_mem_map *map;
246 enum psx_map idx;
247 u32 addr;
248
249 idx = lightrec_get_map_idx(state, kaddr);
250 if (idx == PSX_MAP_UNKNOWN)
98fa08a5
PC		 251 return NULL;
252
02487de7 253 map = &state->maps[idx];
98fa08a5
PC		 254 addr = kaddr - map->pc;
255
256 while (map->mirror_of)
257 map = map->mirror_of;
258
259 if (host)
260 *host = map->address + addr;
261
262 return map;
d16005f8
PC		 263}
264
cb72ea13
PC		 265u32 lightrec_rw(struct lightrec_state *state, union code op, u32 base,
266 u32 data, u32 *flags, struct block *block, u16 offset)
d16005f8
PC		 267{
268 const struct lightrec_mem_map *map;
a59e5536 269 const struct lightrec_mem_map_ops *ops;
98fa08a5 270 u32 opcode = op.opcode;
cb72ea13
PC		 271 bool was_tagged = true;
272 u16 old_flags;
273 u32 addr;
a59e5536 274 void *host;
d16005f8 275
cb72ea13 276 addr = kunseg(base + (s16) op.i.imm);
d16005f8 277
cb72ea13 278 map = lightrec_get_map(state, &host, addr);
d16005f8 279 if (!map) {
98fa08a5 280 __segfault_cb(state, addr, block);
d16005f8
PC		 281 return 0;
282 }
283
cb72ea13
PC		 284 if (flags)
285 was_tagged = LIGHTREC_FLAGS_GET_IO_MODE(*flags);
d16005f8 286
6ce0b00a 287 if (likely(!map->ops)) {
cb72ea13
PC		 288 if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags)) {
289 /* Force parallel port accesses as HW accesses, because
290 * the direct-I/O emitters can't differenciate it. */
291 if (unlikely(map == &state->maps[PSX_MAP_PARALLEL_PORT]))
292 *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW);
293 /* If the base register is 0x0, be extra suspicious.
294 * Some games (e.g. Sled Storm) actually do segmentation
295 * faults by using uninitialized pointers, which are
296 * later initialized to point to hardware registers. */
297 else if (op.i.rs && base == 0x0)
298 *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW);
299 else
300 *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_DIRECT);
301 }
d16005f8 302
a59e5536 303 ops = &lightrec_default_ops;
6ce0b00a
PC		 304 } else if (flags &&
305 LIGHTREC_FLAGS_GET_IO_MODE(*flags) == LIGHTREC_IO_DIRECT_HW) {
306 ops = &lightrec_default_ops;
307 } else {
308 if (flags && !LIGHTREC_FLAGS_GET_IO_MODE(*flags))
309 *flags |= LIGHTREC_IO_MODE(LIGHTREC_IO_HW);
310
311 ops = map->ops;
a59e5536 312 }
d16005f8 313
cb72ea13
PC		 314 if (!was_tagged) {
315 old_flags = block_set_flags(block, BLOCK_SHOULD_RECOMPILE);
316
317 if (!(old_flags & BLOCK_SHOULD_RECOMPILE)) {
f5ee77ca 318 pr_debug("Opcode of block at "PC_FMT" has been tagged"
cb72ea13
PC		 319 " - flag for recompilation\n", block->pc);
320
321 lut_write(state, lut_offset(block->pc), NULL);
322 }
323 }
324
d16005f8
PC		 325 switch (op.i.op) {
326 case OP_SB:
2e6c828e 327 ops->sb(state, opcode, host, addr, data);
d16005f8
PC		 328 return 0;
329 case OP_SH:
2e6c828e 330 ops->sh(state, opcode, host, addr, data);
d16005f8
PC		 331 return 0;
332 case OP_SWL:
a59e5536 333 lightrec_swl(state, ops, opcode, host, addr, data);
d16005f8
PC		 334 return 0;
335 case OP_SWR:
a59e5536 336 lightrec_swr(state, ops, opcode, host, addr, data);
d16005f8
PC		 337 return 0;
338 case OP_SW:
a59e5536 339 ops->sw(state, opcode, host, addr, data);
d16005f8
PC		 340 return 0;
341 case OP_SWC2:
a59e5536 342 lightrec_swc2(state, op, ops, host, addr);
d16005f8
PC		 343 return 0;
344 case OP_LB:
a59e5536 345 return (s32) (s8) ops->lb(state, opcode, host, addr);
d16005f8 346 case OP_LBU:
a59e5536 347 return ops->lb(state, opcode, host, addr);
d16005f8 348 case OP_LH:
a59e5536 349 return (s32) (s16) ops->lh(state, opcode, host, addr);
d16005f8 350 case OP_LHU:
a59e5536 351 return ops->lh(state, opcode, host, addr);
d16005f8 352 case OP_LWC2:
a59e5536 353 lightrec_lwc2(state, op, ops, host, addr);
d16005f8 354 return 0;
a59e5536 355 case OP_LWL:
356 return lightrec_lwl(state, ops, opcode, host, addr, data);
357 case OP_LWR:
358 return lightrec_lwr(state, ops, opcode, host, addr, data);
5459088b
PC		 359 case OP_META_LWU:
360 return ops->lwu(state, opcode, host, addr);
361 case OP_META_SWU:
362 ops->swu(state, opcode, host, addr, data);
363 return 0;
d16005f8
PC		 364 case OP_LW:
365 default:
a59e5536 366 return ops->lw(state, opcode, host, addr);
d16005f8
PC		 367 }
368}
369
370static void lightrec_rw_helper(struct lightrec_state *state,
03535202 371 union code op, u32 *flags,
cb72ea13 372 struct block *block, u16 offset)
d16005f8 373{
98fa08a5 374 u32 ret = lightrec_rw(state, op, state->regs.gpr[op.i.rs],
cb72ea13 375 state->regs.gpr[op.i.rt], flags, block, offset);
d16005f8
PC		 376
377 switch (op.i.op) {
378 case OP_LB:
379 case OP_LBU:
380 case OP_LH:
381 case OP_LHU:
382 case OP_LWL:
383 case OP_LWR:
384 case OP_LW:
5459088b 385 case OP_META_LWU:
cb72ea13
PC		 386 if (OPT_HANDLE_LOAD_DELAYS && unlikely(!state->in_delay_slot_n)) {
387 state->temp_reg = ret;
388 state->in_delay_slot_n = 0xff;
389 } else if (op.i.rt) {
98fa08a5 390 state->regs.gpr[op.i.rt] = ret;
cb72ea13 391 }
d8b04acd
PC		 392 fallthrough;
393 default:
d16005f8
PC		 394 break;
395 }
396}
397
03535202 398static void lightrec_rw_cb(struct lightrec_state *state, u32 arg)
d16005f8 399{
cb72ea13 400 lightrec_rw_helper(state, (union code) arg, NULL, NULL, 0);
d16005f8
PC		 401}
402
03535202 403static void lightrec_rw_generic_cb(struct lightrec_state *state, u32 arg)
d16005f8 404{
98fa08a5
PC		 405 struct block *block;
406 struct opcode *op;
98fa08a5
PC		 407 u16 offset = (u16)arg;
408
409 block = lightrec_find_block_from_lut(state->block_cache,
0e720fb1 410 arg >> 16, state->curr_pc);
98fa08a5 411 if (unlikely(!block)) {
f5ee77ca 412 pr_err("rw_generic: No block found in LUT for "PC_FMT" offset 0x%"PRIx16"\n",
0e720fb1 413 state->curr_pc, offset);
ba3814c1 414 lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT);
98fa08a5
PC		 415 return;
416 }
417
418 op = &block->opcode_list[offset];
cb72ea13 419 lightrec_rw_helper(state, op->c, &op->flags, block, offset);
d16005f8
PC		 420}
421
98fa08a5 422static u32 clamp_s32(s32 val, s32 min, s32 max)
d16005f8 423{
98fa08a5
PC		 424 return val < min ? min : val > max ? max : val;
425}
d16005f8 426
11357fef
PC		 427static u16 load_u16(u32 *ptr)
428{
429 return ((struct u16x2 *) ptr)->l;
430}
431
432static void store_u16(u32 *ptr, u16 value)
433{
434 ((struct u16x2 *) ptr)->l = value;
435}
436
98fa08a5
PC		 437static u32 lightrec_mfc2(struct lightrec_state *state, u8 reg)
438{
439 s16 gteir1, gteir2, gteir3;
440
441 switch (reg) {
442 case 1:
443 case 3:
444 case 5:
445 case 8:
446 case 9:
447 case 10:
448 case 11:
11357fef 449 return (s32)(s16) load_u16(&state->regs.cp2d[reg]);
98fa08a5
PC		 450 case 7:
451 case 16:
452 case 17:
453 case 18:
454 case 19:
11357fef 455 return load_u16(&state->regs.cp2d[reg]);
98fa08a5
PC		 456 case 28:
457 case 29:
11357fef
PC		 458 gteir1 = (s16) load_u16(&state->regs.cp2d[9]);
459 gteir2 = (s16) load_u16(&state->regs.cp2d[10]);
460 gteir3 = (s16) load_u16(&state->regs.cp2d[11]);
98fa08a5
PC		 461
462 return clamp_s32(gteir1 >> 7, 0, 0x1f) << 0 |
463 clamp_s32(gteir2 >> 7, 0, 0x1f) << 5 |
464 clamp_s32(gteir3 >> 7, 0, 0x1f) << 10;
465 case 15:
466 reg = 14;
d8b04acd
PC		 467 fallthrough;
468 default:
98fa08a5
PC		 469 return state->regs.cp2d[reg];
470 }
471}
d16005f8 472
98fa08a5
PC		 473u32 lightrec_mfc(struct lightrec_state *state, union code op)
474{
ba3814c1
PC		 475 u32 val;
476
98fa08a5
PC		 477 if (op.i.op == OP_CP0)
478 return state->regs.cp0[op.r.rd];
9259d748
PC		 479
480 if (op.i.op == OP_SWC2) {
481 val = lightrec_mfc2(state, op.i.rt);
482 } else if (op.r.rs == OP_CP2_BASIC_MFC2)
fdf33147
PC		 483 val = lightrec_mfc2(state, op.r.rd);
484 else {
485 val = state->regs.cp2c[op.r.rd];
486
487 switch (op.r.rd) {
488 case 4:
489 case 12:
490 case 20:
491 case 26:
492 case 27:
493 case 29:
494 case 30:
495 val = (u32)(s16)val;
496 fallthrough;
497 default:
498 break;
499 }
500 }
ba3814c1 501
fdf33147
PC		 502 if (state->ops.cop2_notify)
503 (*state->ops.cop2_notify)(state, op.opcode, val);
ba3814c1 504
fdf33147
PC		 505 return val;
506}
507
508static void lightrec_mfc_cb(struct lightrec_state *state, union code op)
509{
510 u32 rt = lightrec_mfc(state, op);
511
9259d748 512 if (op.i.op == OP_SWC2)
cb72ea13 513 state->temp_reg = rt;
9259d748 514 else if (op.r.rt)
fdf33147 515 state->regs.gpr[op.r.rt] = rt;
d16005f8
PC		 516}
517
98fa08a5 518static void lightrec_mtc0(struct lightrec_state *state, u8 reg, u32 data)
d16005f8 519{
fd58fa32 520 u32 status, oldstatus, cause;
98fa08a5
PC		 521
522 switch (reg) {
523 case 1:
524 case 4:
525 case 8:
526 case 14:
527 case 15:
528 /* Those registers are read-only */
529 return;
fd58fa32 530 default:
98fa08a5
PC		 531 break;
532 }
d16005f8 533
98fa08a5
PC		 534 if (reg == 12) {
535 status = state->regs.cp0[12];
fd58fa32 536 oldstatus = status;
d16005f8 537
98fa08a5
PC		 538 if (status & ~data & BIT(16)) {
539 state->ops.enable_ram(state, true);
540 lightrec_invalidate_all(state);
541 } else if (~status & data & BIT(16)) {
542 state->ops.enable_ram(state, false);
543 }
544 }
545
fd58fa32
PC		 546 if (reg == 13) {
547 state->regs.cp0[13] &= ~0x300;
548 state->regs.cp0[13] |= data & 0x300;
549 } else {
550 state->regs.cp0[reg] = data;
551 }
98fa08a5
PC		 552
553 if (reg == 12 || reg == 13) {
554 cause = state->regs.cp0[13];
555 status = state->regs.cp0[12];
556
fd58fa32 557 /* Handle software interrupts */
684432ad 558 if ((!!(status & cause & 0x300)) & status)
98fa08a5 559 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
fd58fa32
PC		 560
561 /* Handle hardware interrupts */
562 if (reg == 12 && !(~status & 0x401) && (~oldstatus & 0x401))
563 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
98fa08a5
PC		 564 }
565}
566
567static u32 count_leading_bits(s32 data)
568{
98fa08a5
PC		 569 u32 cnt = 33;
570
de742fa0
PC		 571#ifdef __has_builtin
572#if __has_builtin(__builtin_clrsb)
573 return 1 + __builtin_clrsb(data);
574#endif
575#endif
576
98fa08a5
PC		 577 data = (data ^ (data >> 31)) << 1;
578
579 do {
580 cnt -= 1;
581 data >>= 1;
582 } while (data);
583
584 return cnt;
98fa08a5
PC		 585}
586
587static void lightrec_mtc2(struct lightrec_state *state, u8 reg, u32 data)
588{
589 switch (reg) {
590 case 15:
591 state->regs.cp2d[12] = state->regs.cp2d[13];
592 state->regs.cp2d[13] = state->regs.cp2d[14];
593 state->regs.cp2d[14] = data;
594 break;
595 case 28:
596 state->regs.cp2d[9] = (data << 7) & 0xf80;
597 state->regs.cp2d[10] = (data << 2) & 0xf80;
598 state->regs.cp2d[11] = (data >> 3) & 0xf80;
599 break;
600 case 31:
601 return;
602 case 30:
603 state->regs.cp2d[31] = count_leading_bits((s32) data);
d8b04acd
PC		 604 fallthrough;
605 default:
98fa08a5
PC		 606 state->regs.cp2d[reg] = data;
607 break;
608 }
609}
d16005f8 610
98fa08a5
PC		 611static void lightrec_ctc2(struct lightrec_state *state, u8 reg, u32 data)
612{
613 switch (reg) {
614 case 4:
615 case 12:
616 case 20:
617 case 26:
618 case 27:
619 case 29:
620 case 30:
11357fef 621 store_u16(&state->regs.cp2c[reg], data);
98fa08a5
PC		 622 break;
623 case 31:
624 data = (data & 0x7ffff000) | !!(data & 0x7f87e000) << 31;
d8b04acd
PC		 625 fallthrough;
626 default:
11357fef 627 state->regs.cp2c[reg] = data;
98fa08a5
PC		 628 break;
629 }
98fa08a5
PC		 630}
631
9259d748 632void lightrec_mtc(struct lightrec_state *state, union code op, u8 reg, u32 data)
98fa08a5 633{
fdf33147 634 if (op.i.op == OP_CP0) {
9259d748 635 lightrec_mtc0(state, reg, data);
fdf33147 636 } else {
9259d748
PC		 637 if (op.i.op == OP_LWC2 || op.r.rs != OP_CP2_BASIC_CTC2)
638 lightrec_mtc2(state, reg, data);
fdf33147 639 else
9259d748 640 lightrec_ctc2(state, reg, data);
fdf33147
PC		 641
642 if (state->ops.cop2_notify)
643 (*state->ops.cop2_notify)(state, op.opcode, data);
644 }
d16005f8
PC		 645}
646
03535202 647static void lightrec_mtc_cb(struct lightrec_state *state, u32 arg)
d16005f8 648{
03535202 649 union code op = (union code) arg;
9259d748
PC		 650 u32 data;
651 u8 reg;
652
653 if (op.i.op == OP_LWC2) {
cb72ea13 654 data = state->temp_reg;
9259d748
PC		 655 reg = op.i.rt;
656 } else {
657 data = state->regs.gpr[op.r.rt];
658 reg = op.r.rd;
659 }
22eee2ac 660
9259d748 661 lightrec_mtc(state, op, reg, data);
d16005f8
PC		 662}
663
98fa08a5 664void lightrec_rfe(struct lightrec_state *state)
d16005f8
PC		 665{
666 u32 status;
667
668 /* Read CP0 Status register (r12) */
98fa08a5 669 status = state->regs.cp0[12];
d16005f8
PC		 670
671 /* Switch the bits */
672 status = ((status & 0x3c) >> 2) | (status & ~0xf);
673
674 /* Write it back */
98fa08a5 675 lightrec_mtc0(state, 12, status);
d16005f8
PC		 676}
677
98fa08a5 678void lightrec_cp(struct lightrec_state *state, union code op)
d16005f8 679{
98fa08a5
PC		 680 if (op.i.op == OP_CP0) {
681 pr_err("Invalid CP opcode to coprocessor #0\n");
682 return;
683 }
d16005f8 684
98fa08a5 685 (*state->ops.cop2_op)(state, op.opcode);
d16005f8
PC		 686}
687
03535202 688static void lightrec_cp_cb(struct lightrec_state *state, u32 arg)
22eee2ac 689{
03535202 690 lightrec_cp(state, (union code) arg);
22eee2ac
PC		 691}
692
03535202 693static struct block * lightrec_get_block(struct lightrec_state *state, u32 pc)
d16005f8
PC		 694{
695 struct block *block = lightrec_find_block(state->block_cache, pc);
ba3814c1 696 u8 old_flags;
d16005f8 697
98fa08a5 698 if (block && lightrec_block_is_outdated(state, block)) {
f5ee77ca 699 pr_debug("Block at "PC_FMT" is outdated!\n", block->pc);
d16005f8 700
ba3814c1
PC		 701 old_flags = block_set_flags(block, BLOCK_IS_DEAD);
702 if (!(old_flags & BLOCK_IS_DEAD)) {
703 /* Make sure the recompiler isn't processing the block
704 * we'll destroy */
705 if (ENABLE_THREADED_COMPILER)
706 lightrec_recompiler_remove(state->rec, block);
707
ba3814c1 708 remove_from_code_lut(state->block_cache, block);
a5a6f7b8
PC		 709
710 if (ENABLE_THREADED_COMPILER) {
711 lightrec_reaper_add(state->reaper,
712 lightrec_reap_block, block);
713 } else {
714 lightrec_unregister_block(state->block_cache, block);
715 lightrec_free_block(state, block);
716 }
ba3814c1 717 }
d16005f8 718
d16005f8
PC		 719 block = NULL;
720 }
721
722 if (!block) {
723 block = lightrec_precompile_block(state, pc);
724 if (!block) {
f5ee77ca 725 pr_err("Unable to recompile block at "PC_FMT"\n", pc);
d16005f8
PC		 726 lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT);
727 return NULL;
728 }
729
730 lightrec_register_block(state->block_cache, block);
731 }
732
733 return block;
734}
735
736static void * get_next_block_func(struct lightrec_state *state, u32 pc)
737{
738 struct block *block;
739 bool should_recompile;
740 void *func;
d8b04acd 741 int err;
d16005f8 742
9259d748 743 do {
d8b04acd 744 func = lut_read(state, lut_offset(pc));
d16005f8 745 if (func && func != state->get_next_block)
98fa08a5 746 break;
d16005f8
PC		 747
748 block = lightrec_get_block(state, pc);
749
750 if (unlikely(!block))
98fa08a5
PC		 751 break;
752
ba3814c1
PC		 753 if (OPT_REPLACE_MEMSET &&
754 block_has_flag(block, BLOCK_IS_MEMSET)) {
98fa08a5
PC		 755 func = state->memset_func;
756 break;
757 }
d16005f8 758
ba3814c1 759 should_recompile = block_has_flag(block, BLOCK_SHOULD_RECOMPILE) &&
cb72ea13 760 !block_has_flag(block, BLOCK_NEVER_COMPILE) &&
ba3814c1 761 !block_has_flag(block, BLOCK_IS_DEAD);
d16005f8
PC		 762
763 if (unlikely(should_recompile)) {
f5ee77ca 764 pr_debug("Block at "PC_FMT" should recompile\n", pc);
d16005f8 765
d8b04acd 766 if (ENABLE_THREADED_COMPILER) {
a59e5536 767 lightrec_recompiler_add(state->rec, block);
d8b04acd
PC		 768 } else {
769 err = lightrec_compile_block(state->cstate, block);
770 if (err) {
771 state->exit_flags = LIGHTREC_EXIT_NOMEM;
772 return NULL;
773 }
774 }
d16005f8
PC		 775 }
776
777 if (ENABLE_THREADED_COMPILER && likely(!should_recompile))
98fa08a5 778 func = lightrec_recompiler_run_first_pass(state, block, &pc);
d16005f8
PC		 779 else
780 func = block->function;
781
782 if (likely(func))
98fa08a5 783 break;
d16005f8 784
ba3814c1 785 if (unlikely(block_has_flag(block, BLOCK_NEVER_COMPILE))) {
98fa08a5
PC		 786 pc = lightrec_emulate_block(state, block, pc);
787
788 } else if (!ENABLE_THREADED_COMPILER) {
789 /* Block wasn't compiled yet - run the interpreter */
ba3814c1 790 if (block_has_flag(block, BLOCK_FULLY_TAGGED))
98fa08a5
PC		 791 pr_debug("Block fully tagged, skipping first pass\n");
792 else if (ENABLE_FIRST_PASS && likely(!should_recompile))
793 pc = lightrec_emulate_block(state, block, pc);
d16005f8 794
d16005f8 795 /* Then compile it using the profiled data */
d8b04acd
PC		 796 err = lightrec_compile_block(state->cstate, block);
797 if (err) {
798 state->exit_flags = LIGHTREC_EXIT_NOMEM;
799 return NULL;
800 }
ba3814c1
PC		 801 } else if (unlikely(block_has_flag(block, BLOCK_IS_DEAD))) {
802 /*
803 * If the block is dead but has never been compiled,
804 * then its function pointer is NULL and we cannot
805 * execute the block. In that case, reap all the dead
806 * blocks now, and in the next loop we will create a
807 * new block.
808 */
809 lightrec_reaper_reap(state->reaper);
98fa08a5
PC		 810 } else {
811 lightrec_recompiler_add(state->rec, block);
d16005f8 812 }
9259d748
PC		 813 } while (state->exit_flags == LIGHTREC_EXIT_NORMAL
814 && state->current_cycle < state->target_cycle);
d16005f8 815
0e720fb1 816 state->curr_pc = pc;
98fa08a5 817 return func;
d16005f8
PC		 818}
819
d8b04acd
PC		 820static void * lightrec_alloc_code(struct lightrec_state *state, size_t size)
821{
822 void *code;
823
824 if (ENABLE_THREADED_COMPILER)
825 lightrec_code_alloc_lock(state);
826
827 code = tlsf_malloc(state->tlsf, size);
828
829 if (ENABLE_THREADED_COMPILER)
830 lightrec_code_alloc_unlock(state);
831
832 return code;
833}
834
835static void lightrec_realloc_code(struct lightrec_state *state,
836 void *ptr, size_t size)
837{
838 /* NOTE: 'size' MUST be smaller than the size specified during
839 * the allocation. */
840
841 if (ENABLE_THREADED_COMPILER)
842 lightrec_code_alloc_lock(state);
843
844 tlsf_realloc(state->tlsf, ptr, size);
845
846 if (ENABLE_THREADED_COMPILER)
847 lightrec_code_alloc_unlock(state);
848}
849
850static void lightrec_free_code(struct lightrec_state *state, void *ptr)
851{
852 if (ENABLE_THREADED_COMPILER)
853 lightrec_code_alloc_lock(state);
854
855 tlsf_free(state->tlsf, ptr);
856
857 if (ENABLE_THREADED_COMPILER)
858 lightrec_code_alloc_unlock(state);
859}
860
cb72ea13
PC		 861static char lightning_code_data[0x80000];
862
02487de7 863static void * lightrec_emit_code(struct lightrec_state *state,
d8b04acd 864 const struct block *block,
02487de7
PC		 865 jit_state_t *_jit, unsigned int *size)
866{
867 bool has_code_buffer = ENABLE_CODE_BUFFER && state->tlsf;
868 jit_word_t code_size, new_code_size;
869 void *code;
870
871 jit_realize();
872
cb72ea13
PC		 873 if (ENABLE_DISASSEMBLER)
874 jit_set_data(lightning_code_data, sizeof(lightning_code_data), 0);
875 else
02487de7
PC		 876 jit_set_data(NULL, 0, JIT_DISABLE_DATA | JIT_DISABLE_NOTE);
877
878 if (has_code_buffer) {
879 jit_get_code(&code_size);
878e6cda
PC		 880
881#ifdef __i386__
882 /* Lightning's code size estimation routine is buggy on x86 and
883 * will return a value that's too small. */
884 code_size *= 2;
885#endif
886
d8b04acd
PC		 887 code = lightrec_alloc_code(state, (size_t) code_size);
888
889 if (!code) {
890 if (ENABLE_THREADED_COMPILER) {
891 /* If we're using the threaded compiler, return
892 * an allocation error here. The threaded
893 * compiler will then empty its job queue and
894 * request a code flush using the reaper. */
895 return NULL;
896 }
897
898 /* Remove outdated blocks, and try again */
899 lightrec_remove_outdated_blocks(state->block_cache, block);
900
901 pr_debug("Re-try to alloc %zu bytes...\n", code_size);
902
903 code = lightrec_alloc_code(state, code_size);
904 if (!code) {
905 pr_err("Could not alloc even after removing old blocks!\n");
906 return NULL;
907 }
908 }
02487de7
PC		 909
910 jit_set_code(code, code_size);
911 }
912
913 code = jit_emit();
878e6cda
PC		 914 if (!code) {
915 if (has_code_buffer)
916 lightrec_free_code(state, code);
917
918 return NULL;
919 }
02487de7
PC		 920
921 jit_get_code(&new_code_size);
922 lightrec_register(MEM_FOR_CODE, new_code_size);
923
924 if (has_code_buffer) {
d8b04acd 925 lightrec_realloc_code(state, code, (size_t) new_code_size);
02487de7
PC		 926
927 pr_debug("Creating code block at address 0x%" PRIxPTR ", "
928 "code size: %" PRIuPTR " new: %" PRIuPTR "\n",
929 (uintptr_t) code, code_size, new_code_size);
930 }
931
932 *size = (unsigned int) new_code_size;
933
9259d748
PC		 934 if (state->ops.code_inv)
935 state->ops.code_inv(code, new_code_size);
936
02487de7
PC		 937 return code;
938}
939
98fa08a5 940static struct block * generate_wrapper(struct lightrec_state *state)
d16005f8
PC		 941{
942 struct block *block;
943 jit_state_t *_jit;
944 unsigned int i;
fd58fa32 945 jit_node_t *addr[C_WRAPPERS_COUNT - 1];
ba3814c1 946 jit_node_t *to_end[C_WRAPPERS_COUNT - 1];
cb72ea13
PC		 947 u8 tmp = JIT_R1;
948
d16005f8
PC		 949 block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block));
950 if (!block)
951 goto err_no_mem;
952
953 _jit = jit_new_state();
954 if (!_jit)
955 goto err_free_block;
956
957 jit_name("RW wrapper");
958 jit_note(__FILE__, __LINE__);
959
960 /* Wrapper entry point */
961 jit_prolog();
fd58fa32
PC		 962 jit_tramp(256);
963
ba3814c1 964 /* Add entry points */
fd58fa32 965 for (i = C_WRAPPERS_COUNT - 1; i > 0; i--) {
cb72ea13 966 jit_ldxi(tmp, LIGHTREC_REG_STATE,
ba3814c1
PC		 967 offsetof(struct lightrec_state, c_wrappers[i]));
968 to_end[i - 1] = jit_b();
fd58fa32
PC		 969 addr[i - 1] = jit_indirect();
970 }
971
cb72ea13 972 jit_ldxi(tmp, LIGHTREC_REG_STATE,
ba3814c1
PC		 973 offsetof(struct lightrec_state, c_wrappers[0]));
974
975 for (i = 0; i < C_WRAPPERS_COUNT - 1; i++)
976 jit_patch(to_end[i]);
cb72ea13 977 jit_movr(JIT_R1, tmp);
ba3814c1 978
fd58fa32
PC		 979 jit_epilog();
980 jit_prolog();
d16005f8 981
fd58fa32 982 /* Save all temporaries on stack */
ba3814c1
PC		 983 for (i = 0; i < NUM_TEMPS; i++) {
984 if (i + FIRST_TEMP != 1) {
985 jit_stxi(offsetof(struct lightrec_state, wrapper_regs[i]),
986 LIGHTREC_REG_STATE, JIT_R(i + FIRST_TEMP));
987 }
988 }
d16005f8 989
ba3814c1 990 jit_getarg(JIT_R2, jit_arg());
03535202 991
ba3814c1
PC		 992 jit_prepare();
993 jit_pushargr(LIGHTREC_REG_STATE);
994 jit_pushargr(JIT_R2);
d16005f8 995
ba3814c1
PC		 996 jit_ldxi_ui(JIT_R2, LIGHTREC_REG_STATE,
997 offsetof(struct lightrec_state, target_cycle));
d16005f8 998
ba3814c1
PC		 999 /* state->current_cycle = state->target_cycle - delta; */
1000 jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, LIGHTREC_REG_CYCLE);
1001 jit_stxi_i(offsetof(struct lightrec_state, current_cycle),
1002 LIGHTREC_REG_STATE, LIGHTREC_REG_CYCLE);
d16005f8 1003
ba3814c1
PC		 1004 /* Call the wrapper function */
1005 jit_finishr(JIT_R1);
d16005f8 1006
ba3814c1
PC		 1007 /* delta = state->target_cycle - state->current_cycle */;
1008 jit_ldxi_ui(LIGHTREC_REG_CYCLE, LIGHTREC_REG_STATE,
1009 offsetof(struct lightrec_state, current_cycle));
1010 jit_ldxi_ui(JIT_R1, LIGHTREC_REG_STATE,
1011 offsetof(struct lightrec_state, target_cycle));
1012 jit_subr(LIGHTREC_REG_CYCLE, JIT_R1, LIGHTREC_REG_CYCLE);
fd58fa32 1013
ba3814c1
PC		 1014 /* Restore temporaries from stack */
1015 for (i = 0; i < NUM_TEMPS; i++) {
1016 if (i + FIRST_TEMP != 1) {
1017 jit_ldxi(JIT_R(i + FIRST_TEMP), LIGHTREC_REG_STATE,
1018 offsetof(struct lightrec_state, wrapper_regs[i]));
1019 }
1020 }
d16005f8 1021
ba3814c1 1022 jit_ret();
d16005f8
PC		 1023 jit_epilog();
1024
d16005f8 1025 block->_jit = _jit;
d16005f8 1026 block->opcode_list = NULL;
ba3814c1 1027 block->flags = BLOCK_NO_OPCODE_LIST;
d16005f8
PC		 1028 block->nb_ops = 0;
1029
d8b04acd 1030 block->function = lightrec_emit_code(state, block, _jit,
02487de7
PC		 1031 &block->code_size);
1032 if (!block->function)
878e6cda 1033 goto err_free_jit;
02487de7 1034
fd58fa32
PC		 1035 state->wrappers_eps[C_WRAPPERS_COUNT - 1] = block->function;
1036
1037 for (i = 0; i < C_WRAPPERS_COUNT - 1; i++)
1038 state->wrappers_eps[i] = jit_address(addr[i]);
1039
d16005f8
PC		 1040 if (ENABLE_DISASSEMBLER) {
1041 pr_debug("Wrapper block:\n");
1042 jit_disassemble();
1043 }
1044
1045 jit_clear_state();
1046 return block;
1047
878e6cda
PC		 1048err_free_jit:
1049 jit_destroy_state();
d16005f8
PC		 1050err_free_block:
1051 lightrec_free(state, MEM_FOR_IR, sizeof(*block), block);
1052err_no_mem:
1053 pr_err("Unable to compile wrapper: Out of memory\n");
1054 return NULL;
1055}
1056
98fa08a5
PC		 1057static u32 lightrec_memset(struct lightrec_state *state)
1058{
1059 u32 kunseg_pc = kunseg(state->regs.gpr[4]);
1060 void *host;
1061 const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg_pc);
1062 u32 length = state->regs.gpr[5] * 4;
1063
1064 if (!map) {
f5ee77ca
PC		 1065 pr_err("Unable to find memory map for memset target address "PC_FMT"\n",
1066 kunseg_pc);
98fa08a5
PC		 1067 return 0;
1068 }
1069
f5ee77ca 1070 pr_debug("Calling host memset, "PC_FMT" (host address 0x%"PRIxPTR") for %u bytes\n",
98fa08a5
PC		 1071 kunseg_pc, (uintptr_t)host, length);
1072 memset(host, 0, length);
1073
684432ad 1074 if (!(state->opt_flags & LIGHTREC_OPT_INV_DMA_ONLY))
98fa08a5
PC		 1075 lightrec_invalidate_map(state, map, kunseg_pc, length);
1076
1077 /* Rough estimation of the number of cycles consumed */
1078 return 8 + 5 * (length + 3 / 4);
1079}
1080
cb72ea13
PC		 1081static u32 lightrec_check_load_delay(struct lightrec_state *state, u32 pc, u8 reg)
1082{
1083 struct block *block;
1084 union code first_op;
1085
1086 first_op = lightrec_read_opcode(state, pc);
1087
1088 if (likely(!opcode_reads_register(first_op, reg))) {
1089 state->regs.gpr[reg] = state->temp_reg;
1090 } else {
1091 block = lightrec_get_block(state, pc);
1092 if (unlikely(!block)) {
f5ee77ca 1093 pr_err("Unable to get block at "PC_FMT"\n", pc);
cb72ea13
PC		 1094 lightrec_set_exit_flags(state, LIGHTREC_EXIT_SEGFAULT);
1095 pc = 0;
1096 } else {
1097 pc = lightrec_handle_load_delay(state, block, pc, reg);
1098 }
1099 }
1100
1101 return pc;
1102}
1103
1104static void update_cycle_counter_before_c(jit_state_t *_jit)
1105{
1106 /* update state->current_cycle */
1107 jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE,
1108 offsetof(struct lightrec_state, target_cycle));
1109 jit_subr(JIT_R1, JIT_R2, LIGHTREC_REG_CYCLE);
1110 jit_stxi_i(offsetof(struct lightrec_state, current_cycle),
1111 LIGHTREC_REG_STATE, JIT_R1);
1112}
1113
1114static void update_cycle_counter_after_c(jit_state_t *_jit)
1115{
1116 /* Recalc the delta */
1117 jit_ldxi_i(JIT_R1, LIGHTREC_REG_STATE,
1118 offsetof(struct lightrec_state, current_cycle));
1119 jit_ldxi_i(JIT_R2, LIGHTREC_REG_STATE,
1120 offsetof(struct lightrec_state, target_cycle));
1121 jit_subr(LIGHTREC_REG_CYCLE, JIT_R2, JIT_R1);
1122}
1123
0e720fb1
PC		 1124static void sync_next_pc(jit_state_t *_jit)
1125{
1126 if (lightrec_store_next_pc()) {
684432ad
PC		 1127 jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE,
1128 offsetof(struct lightrec_state, next_pc));
0e720fb1
PC		 1129 }
1130}
1131
d16005f8
PC		 1132static struct block * generate_dispatcher(struct lightrec_state *state)
1133{
1134 struct block *block;
1135 jit_state_t *_jit;
cb72ea13 1136 jit_node_t *to_end, *loop, *addr, *addr2, *addr3, *addr4, *addr5, *jmp, *jmp2;
d16005f8 1137 unsigned int i;
02487de7 1138 u32 offset;
d16005f8
PC		 1139
1140 block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block));
1141 if (!block)
1142 goto err_no_mem;
1143
1144 _jit = jit_new_state();
1145 if (!_jit)
1146 goto err_free_block;
1147
1148 jit_name("dispatcher");
1149 jit_note(__FILE__, __LINE__);
1150
1151 jit_prolog();
1152 jit_frame(256);
1153
9259d748
PC		 1154 jit_getarg(LIGHTREC_REG_STATE, jit_arg());
1155 jit_getarg(JIT_V0, jit_arg());
ba3814c1 1156 jit_getarg(JIT_V1, jit_arg());
d16005f8 1157 jit_getarg_i(LIGHTREC_REG_CYCLE, jit_arg());
d16005f8
PC		 1158
1159 /* Force all callee-saved registers to be pushed on the stack */
1160 for (i = 0; i < NUM_REGS; i++)
ba3814c1 1161 jit_movr(JIT_V(i + FIRST_REG), JIT_V(i + FIRST_REG));
d16005f8 1162
d16005f8
PC		 1163 loop = jit_label();
1164
1165 /* Call the block's code */
ba3814c1 1166 jit_jmpr(JIT_V1);
d16005f8 1167
98fa08a5
PC		 1168 if (OPT_REPLACE_MEMSET) {
1169 /* Blocks will jump here when they need to call
1170 * lightrec_memset() */
1171 addr3 = jit_indirect();
1172
ba3814c1
PC		 1173 jit_movr(JIT_V1, LIGHTREC_REG_CYCLE);
1174
98fa08a5
PC		 1175 jit_prepare();
1176 jit_pushargr(LIGHTREC_REG_STATE);
cb72ea13 1177
98fa08a5 1178 jit_finishi(lightrec_memset);
cb72ea13 1179 jit_retval(LIGHTREC_REG_CYCLE);
98fa08a5
PC		 1180
1181 jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE,
1182 offsetof(struct lightrec_state, regs.gpr[31]));
ba3814c1 1183 jit_subr(LIGHTREC_REG_CYCLE, JIT_V1, LIGHTREC_REG_CYCLE);
cb72ea13
PC		 1184
1185 if (OPT_DETECT_IMPOSSIBLE_BRANCHES || OPT_HANDLE_LOAD_DELAYS)
1186 jmp = jit_b();
1187 }
1188
1189 if (OPT_DETECT_IMPOSSIBLE_BRANCHES) {
1190 /* Blocks will jump here when they reach a branch that should
1191 * be executed with the interpreter, passing the branch's PC
1192 * in JIT_V0 and the address of the block in JIT_V1. */
1193 addr4 = jit_indirect();
1194
0e720fb1 1195 sync_next_pc(_jit);
cb72ea13
PC		 1196 update_cycle_counter_before_c(_jit);
1197
1198 jit_prepare();
1199 jit_pushargr(LIGHTREC_REG_STATE);
1200 jit_pushargr(JIT_V1);
1201 jit_pushargr(JIT_V0);
1202 jit_finishi(lightrec_emulate_block);
1203
1204 jit_retval(JIT_V0);
1205
1206 update_cycle_counter_after_c(_jit);
1207
1208 if (OPT_HANDLE_LOAD_DELAYS)
1209 jmp2 = jit_b();
1210
1211 }
1212
1213 if (OPT_HANDLE_LOAD_DELAYS) {
1214 /* Blocks will jump here when they reach a branch with a load
1215 * opcode in its delay slot. The delay slot has already been
1216 * executed; the load value is in (state->temp_reg), and the
1217 * register number is in JIT_V1.
1218 * Jump to a C function which will evaluate the branch target's
1219 * first opcode, to make sure that it does not read the register
1220 * in question; and if it does, handle it accordingly. */
1221 addr5 = jit_indirect();
1222
0e720fb1 1223 sync_next_pc(_jit);
cb72ea13
PC		 1224 update_cycle_counter_before_c(_jit);
1225
1226 jit_prepare();
1227 jit_pushargr(LIGHTREC_REG_STATE);
1228 jit_pushargr(JIT_V0);
1229 jit_pushargr(JIT_V1);
1230 jit_finishi(lightrec_check_load_delay);
1231
1232 jit_retval(JIT_V0);
1233
1234 update_cycle_counter_after_c(_jit);
cb72ea13
PC		 1235 }
1236
0e720fb1
PC		 1237 /* The block will jump here, with the number of cycles remaining in
1238 * LIGHTREC_REG_CYCLE */
1239 addr2 = jit_indirect();
1240
1241 sync_next_pc(_jit);
1242
1243 if (OPT_HANDLE_LOAD_DELAYS && OPT_DETECT_IMPOSSIBLE_BRANCHES)
1244 jit_patch(jmp2);
1245
cb72ea13
PC		 1246 if (OPT_REPLACE_MEMSET
1247 && (OPT_DETECT_IMPOSSIBLE_BRANCHES || OPT_HANDLE_LOAD_DELAYS)) {
1248 jit_patch(jmp);
98fa08a5
PC		 1249 }
1250
0e720fb1
PC		 1251 /* Store back the next PC to the lightrec_state structure */
1252 offset = offsetof(struct lightrec_state, curr_pc);
98fa08a5
PC		 1253 jit_stxi_i(offset, LIGHTREC_REG_STATE, JIT_V0);
1254
d16005f8
PC		 1255 /* Jump to end if state->target_cycle < state->current_cycle */
1256 to_end = jit_blei(LIGHTREC_REG_CYCLE, 0);
1257
1258 /* Convert next PC to KUNSEG and avoid mirrors */
878e6cda 1259 jit_andi(JIT_V1, JIT_V0, RAM_SIZE - 1);
02487de7 1260 jit_andi(JIT_R2, JIT_V0, BIOS_SIZE - 1);
878e6cda 1261 jit_andi(JIT_R1, JIT_V0, BIT(28));
02487de7 1262 jit_addi(JIT_R2, JIT_R2, RAM_SIZE);
ba3814c1 1263 jit_movnr(JIT_V1, JIT_R2, JIT_R1);
02487de7
PC		 1264
1265 /* If possible, use the code LUT */
1266 if (!lut_is_32bit(state))
ba3814c1 1267 jit_lshi(JIT_V1, JIT_V1, 1);
cb72ea13 1268 jit_add_state(JIT_V1, JIT_V1);
02487de7
PC		 1269
1270 offset = offsetof(struct lightrec_state, code_lut);
1271 if (lut_is_32bit(state))
ba3814c1 1272 jit_ldxi_ui(JIT_V1, JIT_V1, offset);
02487de7 1273 else
ba3814c1 1274 jit_ldxi(JIT_V1, JIT_V1, offset);
d16005f8
PC		 1275
1276 /* If we get non-NULL, loop */
ba3814c1
PC		 1277 jit_patch_at(jit_bnei(JIT_V1, 0), loop);
1278
1279 /* The code LUT will be set to this address when the block at the target
1280 * PC has been preprocessed but not yet compiled by the threaded
1281 * recompiler */
1282 addr = jit_indirect();
d16005f8
PC		 1283
1284 /* Slow path: call C function get_next_block_func() */
d16005f8 1285
98fa08a5 1286 if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) {
d16005f8 1287 /* We may call the interpreter - update state->current_cycle */
cb72ea13 1288 update_cycle_counter_before_c(_jit);
d16005f8
PC		 1289 }
1290
d16005f8
PC		 1291 jit_prepare();
1292 jit_pushargr(LIGHTREC_REG_STATE);
1293 jit_pushargr(JIT_V0);
ba3814c1
PC		 1294
1295 /* Save the cycles register if needed */
1296 if (!(ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES))
1297 jit_movr(JIT_V0, LIGHTREC_REG_CYCLE);
1298
1299 /* Get the next block */
d16005f8 1300 jit_finishi(&get_next_block_func);
ba3814c1 1301 jit_retval(JIT_V1);
d16005f8 1302
98fa08a5 1303 if (ENABLE_FIRST_PASS || OPT_DETECT_IMPOSSIBLE_BRANCHES) {
d16005f8
PC		 1304 /* The interpreter may have updated state->current_cycle and
1305 * state->target_cycle - recalc the delta */
cb72ea13 1306 update_cycle_counter_after_c(_jit);
ba3814c1
PC		 1307 } else {
1308 jit_movr(LIGHTREC_REG_CYCLE, JIT_V0);
d16005f8
PC		 1309 }
1310
9259d748
PC		 1311 /* Reset JIT_V0 to the next PC */
1312 jit_ldxi_ui(JIT_V0, LIGHTREC_REG_STATE,
0e720fb1 1313 offsetof(struct lightrec_state, curr_pc));
9259d748 1314
d16005f8 1315 /* If we get non-NULL, loop */
ba3814c1 1316 jit_patch_at(jit_bnei(JIT_V1, 0), loop);
d16005f8 1317
d16005f8
PC		 1318 /* When exiting, the recompiled code will jump to that address */
1319 jit_note(__FILE__, __LINE__);
1320 jit_patch(to_end);
1321
d16005f8
PC		 1322 jit_retr(LIGHTREC_REG_CYCLE);
1323 jit_epilog();
1324
d16005f8 1325 block->_jit = _jit;
d16005f8 1326 block->opcode_list = NULL;
ba3814c1 1327 block->flags = BLOCK_NO_OPCODE_LIST;
d16005f8
PC		 1328 block->nb_ops = 0;
1329
d8b04acd 1330 block->function = lightrec_emit_code(state, block, _jit,
02487de7
PC		 1331 &block->code_size);
1332 if (!block->function)
878e6cda 1333 goto err_free_jit;
d16005f8
PC		 1334
1335 state->eob_wrapper_func = jit_address(addr2);
cb72ea13
PC		 1336 if (OPT_DETECT_IMPOSSIBLE_BRANCHES)
1337 state->interpreter_func = jit_address(addr4);
1338 if (OPT_HANDLE_LOAD_DELAYS)
1339 state->ds_check_func = jit_address(addr5);
98fa08a5
PC		 1340 if (OPT_REPLACE_MEMSET)
1341 state->memset_func = jit_address(addr3);
d16005f8
PC		 1342 state->get_next_block = jit_address(addr);
1343
1344 if (ENABLE_DISASSEMBLER) {
1345 pr_debug("Dispatcher block:\n");
1346 jit_disassemble();
1347 }
1348
1349 /* We're done! */
1350 jit_clear_state();
1351 return block;
1352
878e6cda
PC		 1353err_free_jit:
1354 jit_destroy_state();
d16005f8
PC		 1355err_free_block:
1356 lightrec_free(state, MEM_FOR_IR, sizeof(*block), block);
1357err_no_mem:
1358 pr_err("Unable to compile dispatcher: Out of memory\n");
1359 return NULL;
1360}
1361
1362union code lightrec_read_opcode(struct lightrec_state *state, u32 pc)
1363{
fd58fa32 1364 void *host = NULL;
d16005f8 1365
98fa08a5 1366 lightrec_get_map(state, &host, kunseg(pc));
d16005f8 1367
98fa08a5 1368 const u32 *code = (u32 *)host;
02487de7 1369 return (union code) LE32TOH(*code);
98fa08a5 1370}
d16005f8 1371
684432ad
PC		 1372unsigned int lightrec_cycles_of_opcode(const struct lightrec_state *state,
1373 union code code)
98fa08a5 1374{
684432ad 1375 return state->cycles_per_op;
98fa08a5 1376}
d16005f8 1377
ba3814c1 1378void lightrec_free_opcode_list(struct lightrec_state *state, struct opcode *ops)
98fa08a5 1379{
ba3814c1
PC		 1380 struct opcode_list *list = container_of(ops, struct opcode_list, ops);
1381
98fa08a5 1382 lightrec_free(state, MEM_FOR_IR,
ba3814c1
PC		 1383 sizeof(*list) + list->nb_ops * sizeof(struct opcode),
1384 list);
98fa08a5
PC		 1385}
1386
1387static unsigned int lightrec_get_mips_block_len(const u32 *src)
1388{
1389 unsigned int i;
1390 union code c;
1391
1392 for (i = 1; ; i++) {
1393 c.opcode = LE32TOH(*src++);
1394
1395 if (is_syscall(c))
1396 return i;
1397
1398 if (is_unconditional_jump(c))
1399 return i + 1;
1400 }
1401}
1402
1403static struct opcode * lightrec_disassemble(struct lightrec_state *state,
1404 const u32 *src, unsigned int *len)
1405{
ba3814c1 1406 struct opcode_list *list;
98fa08a5
PC		 1407 unsigned int i, length;
1408
1409 length = lightrec_get_mips_block_len(src);
1410
ba3814c1
PC		 1411 list = lightrec_malloc(state, MEM_FOR_IR,
1412 sizeof(*list) + sizeof(struct opcode) * length);
98fa08a5
PC		 1413 if (!list) {
1414 pr_err("Unable to allocate memory\n");
1415 return NULL;
1416 }
1417
ba3814c1
PC		 1418 list->nb_ops = (u16) length;
1419
98fa08a5 1420 for (i = 0; i < length; i++) {
ba3814c1
PC		 1421 list->ops[i].opcode = LE32TOH(src[i]);
1422 list->ops[i].flags = 0;
98fa08a5
PC		 1423 }
1424
1425 *len = length * sizeof(u32);
1426
ba3814c1 1427 return list->ops;
d16005f8
PC		 1428}
1429
1430static struct block * lightrec_precompile_block(struct lightrec_state *state,
1431 u32 pc)
1432{
1433 struct opcode *list;
1434 struct block *block;
ba3814c1 1435 void *host, *addr;
98fa08a5
PC		 1436 const struct lightrec_mem_map *map = lightrec_get_map(state, &host, kunseg(pc));
1437 const u32 *code = (u32 *) host;
d16005f8 1438 unsigned int length;
98fa08a5 1439 bool fully_tagged;
ba3814c1 1440 u8 block_flags = 0;
d16005f8
PC		 1441
1442 if (!map)
1443 return NULL;
1444
d16005f8
PC		 1445 block = lightrec_malloc(state, MEM_FOR_IR, sizeof(*block));
1446 if (!block) {
1447 pr_err("Unable to recompile block: Out of memory\n");
1448 return NULL;
1449 }
1450
1451 list = lightrec_disassemble(state, code, &length);
1452 if (!list) {
1453 lightrec_free(state, MEM_FOR_IR, sizeof(*block), block);
1454 return NULL;
1455 }
1456
1457 block->pc = pc;
d16005f8
PC		 1458 block->_jit = NULL;
1459 block->function = NULL;
1460 block->opcode_list = list;
98fa08a5 1461 block->code = code;
d16005f8
PC		 1462 block->next = NULL;
1463 block->flags = 0;
1464 block->code_size = 0;
d8b04acd 1465 block->precompile_date = state->current_cycle;
d16005f8
PC		 1466 block->nb_ops = length / sizeof(u32);
1467
98fa08a5 1468 lightrec_optimize(state, block);
d16005f8
PC		 1469
1470 length = block->nb_ops * sizeof(u32);
1471
1472 lightrec_register(MEM_FOR_MIPS_CODE, length);
1473
1474 if (ENABLE_DISASSEMBLER) {
98fa08a5
PC		 1475 pr_debug("Disassembled block at PC: 0x%08x\n", block->pc);
1476 lightrec_print_disassembly(block, code);
d16005f8
PC		 1477 }
1478
98fa08a5 1479 pr_debug("Block size: %hu opcodes\n", block->nb_ops);
d16005f8 1480
98fa08a5
PC		 1481 fully_tagged = lightrec_block_is_fully_tagged(block);
1482 if (fully_tagged)
ba3814c1 1483 block_flags |= BLOCK_FULLY_TAGGED;
98fa08a5 1484
ba3814c1
PC		 1485 if (block_flags)
1486 block_set_flags(block, block_flags);
98fa08a5 1487
d16005f8
PC		 1488 block->hash = lightrec_calculate_block_hash(block);
1489
ba3814c1
PC		 1490 if (OPT_REPLACE_MEMSET && block_has_flag(block, BLOCK_IS_MEMSET))
1491 addr = state->memset_func;
1492 else
1493 addr = state->get_next_block;
1494 lut_write(state, lut_offset(pc), addr);
1495
cb72ea13 1496 pr_debug("Blocks created: %u\n", ++state->nb_precompile);
a59e5536 1497
d16005f8
PC		 1498 return block;
1499}
1500
98fa08a5 1501static bool lightrec_block_is_fully_tagged(const struct block *block)
d16005f8 1502{
98fa08a5
PC		 1503 const struct opcode *op;
1504 unsigned int i;
1505
1506 for (i = 0; i < block->nb_ops; i++) {
1507 op = &block->opcode_list[i];
d16005f8 1508
cb72ea13
PC		 1509 /* If we have one branch that must be emulated, we cannot trash
1510 * the opcode list. */
1511 if (should_emulate(op))
1512 return false;
1513
1514 /* Check all loads/stores of the opcode list and mark the
d16005f8
PC		 1515 * block as fully compiled if they all have been tagged. */
1516 switch (op->c.i.op) {
1517 case OP_LB:
1518 case OP_LH:
1519 case OP_LWL:
1520 case OP_LW:
1521 case OP_LBU:
1522 case OP_LHU:
1523 case OP_LWR:
1524 case OP_SB:
1525 case OP_SH:
1526 case OP_SWL:
1527 case OP_SW:
1528 case OP_SWR:
1529 case OP_LWC2:
1530 case OP_SWC2:
5459088b
PC		 1531 case OP_META_LWU:
1532 case OP_META_SWU:
22eee2ac 1533 if (!LIGHTREC_FLAGS_GET_IO_MODE(op->flags))
d16005f8 1534 return false;
d8b04acd
PC		 1535 fallthrough;
1536 default:
d16005f8
PC		 1537 continue;
1538 }
1539 }
1540
1541 return true;
1542}
1543
98fa08a5 1544static void lightrec_reap_block(struct lightrec_state *state, void *data)
a59e5536 1545{
1546 struct block *block = data;
1547
f5ee77ca 1548 pr_debug("Reap dead block at "PC_FMT"\n", block->pc);
98fa08a5
PC		 1549 lightrec_unregister_block(state->block_cache, block);
1550 lightrec_free_block(state, block);
a59e5536 1551}
1552
98fa08a5 1553static void lightrec_reap_jit(struct lightrec_state *state, void *data)
a59e5536 1554{
1555 _jit_destroy_state(data);
1556}
1557
02487de7
PC		 1558static void lightrec_free_function(struct lightrec_state *state, void *fn)
1559{
1560 if (ENABLE_CODE_BUFFER && state->tlsf) {
1561 pr_debug("Freeing code block at 0x%" PRIxPTR "\n", (uintptr_t) fn);
d8b04acd 1562 lightrec_free_code(state, fn);
02487de7
PC		 1563 }
1564}
1565
1566static void lightrec_reap_function(struct lightrec_state *state, void *data)
1567{
1568 lightrec_free_function(state, data);
1569}
1570
ba3814c1
PC		 1571static void lightrec_reap_opcode_list(struct lightrec_state *state, void *data)
1572{
1573 lightrec_free_opcode_list(state, data);
1574}
1575
98fa08a5
PC		 1576int lightrec_compile_block(struct lightrec_cstate *cstate,
1577 struct block *block)
d16005f8 1578{
a5a6f7b8 1579 struct block *dead_blocks[ARRAY_SIZE(cstate->targets)];
564156dc 1580 u32 was_dead[ARRAY_SIZE(cstate->targets) / 8];
98fa08a5 1581 struct lightrec_state *state = cstate->state;
a59e5536 1582 struct lightrec_branch_target *target;
ba3814c1 1583 bool fully_tagged = false;
a59e5536 1584 struct block *block2;
d16005f8 1585 struct opcode *elm;
a59e5536 1586 jit_state_t *_jit, *oldjit;
d16005f8
PC		 1587 jit_node_t *start_of_block;
1588 bool skip_next = false;
d8b04acd 1589 void *old_fn, *new_fn;
ba3814c1 1590 size_t old_code_size;
d16005f8 1591 unsigned int i, j;
ba3814c1 1592 u8 old_flags;
98fa08a5 1593 u32 offset;
d16005f8
PC		 1594
1595 fully_tagged = lightrec_block_is_fully_tagged(block);
1596 if (fully_tagged)
ba3814c1 1597 block_set_flags(block, BLOCK_FULLY_TAGGED);
d16005f8
PC		 1598
1599 _jit = jit_new_state();
1600 if (!_jit)
1601 return -ENOMEM;
1602
a59e5536 1603 oldjit = block->_jit;
02487de7 1604 old_fn = block->function;
ba3814c1 1605 old_code_size = block->code_size;
d16005f8
PC		 1606 block->_jit = _jit;
1607
98fa08a5 1608 lightrec_regcache_reset(cstate->reg_cache);
684432ad
PC		 1609
1610 if (OPT_PRELOAD_PC && (block->flags & BLOCK_PRELOAD_PC))
1611 lightrec_preload_pc(cstate->reg_cache, _jit);
9259d748 1612
98fa08a5 1613 cstate->cycles = 0;
98fa08a5
PC		 1614 cstate->nb_local_branches = 0;
1615 cstate->nb_targets = 0;
cb72ea13 1616 cstate->no_load_delay = false;
d16005f8
PC		 1617
1618 jit_prolog();
1619 jit_tramp(256);
1620
1621 start_of_block = jit_label();
1622
98fa08a5
PC		 1623 for (i = 0; i < block->nb_ops; i++) {
1624 elm = &block->opcode_list[i];
d16005f8
PC		 1625
1626 if (skip_next) {
1627 skip_next = false;
1628 continue;
1629 }
1630
98fa08a5 1631 if (should_emulate(elm)) {
d16005f8 1632 pr_debug("Branch at offset 0x%x will be emulated\n",
98fa08a5
PC		 1633 i << 2);
1634
cb72ea13 1635 lightrec_emit_jump_to_interpreter(cstate, block, i);
03535202 1636 skip_next = !op_flag_no_ds(elm->flags);
98fa08a5
PC		 1637 } else {
1638 lightrec_rec_opcode(cstate, block, i);
03535202 1639 skip_next = !op_flag_no_ds(elm->flags) && has_delay_slot(elm->c);
d16005f8
PC		 1640#if _WIN32
1641 /* FIXME: GNU Lightning on Windows seems to use our
1642 * mapped registers as temporaries. Until the actual bug
1643 * is found and fixed, unconditionally mark our
1644 * registers as live here. */
98fa08a5 1645 lightrec_regcache_mark_live(cstate->reg_cache, _jit);
d16005f8
PC		 1646#endif
1647 }
03535202 1648
684432ad 1649 cstate->cycles += lightrec_cycles_of_opcode(state, elm->c);
d16005f8
PC		 1650 }
1651
98fa08a5
PC		 1652 for (i = 0; i < cstate->nb_local_branches; i++) {
1653 struct lightrec_branch *branch = &cstate->local_branches[i];
d16005f8
PC		 1654
1655 pr_debug("Patch local branch to offset 0x%x\n",
1656 branch->target << 2);
1657
1658 if (branch->target == 0) {
1659 jit_patch_at(branch->branch, start_of_block);
1660 continue;
1661 }
1662
98fa08a5
PC		 1663 for (j = 0; j < cstate->nb_targets; j++) {
1664 if (cstate->targets[j].offset == branch->target) {
d16005f8 1665 jit_patch_at(branch->branch,
98fa08a5 1666 cstate->targets[j].label);
d16005f8
PC		 1667 break;
1668 }
1669 }
1670
98fa08a5 1671 if (j == cstate->nb_targets)
d16005f8
PC		 1672 pr_err("Unable to find branch target\n");
1673 }
1674
d16005f8
PC		 1675 jit_ret();
1676 jit_epilog();
1677
d8b04acd
PC		 1678 new_fn = lightrec_emit_code(state, block, _jit, &block->code_size);
1679 if (!new_fn) {
1680 if (!ENABLE_THREADED_COMPILER)
1681 pr_err("Unable to compile block!\n");
1682 block->_jit = oldjit;
ba3814c1 1683 jit_clear_state();
d8b04acd
PC		 1684 _jit_destroy_state(_jit);
1685 return -ENOMEM;
02487de7
PC		 1686 }
1687
ba3814c1
PC		 1688 /* Pause the reaper, because lightrec_reset_lut_offset() may try to set
1689 * the old block->function pointer to the code LUT. */
1690 if (ENABLE_THREADED_COMPILER)
1691 lightrec_reaper_pause(state->reaper);
1692
d8b04acd 1693 block->function = new_fn;
ba3814c1 1694 block_clear_flags(block, BLOCK_SHOULD_RECOMPILE);
d16005f8
PC		 1695
1696 /* Add compiled function to the LUT */
02487de7 1697 lut_write(state, lut_offset(block->pc), block->function);
d16005f8 1698
a59e5536 1699 /* Detect old blocks that have been covered by the new one */
564156dc 1700 for (i = 0; ENABLE_THREADED_COMPILER && i < cstate->nb_targets; i++) {
98fa08a5 1701 target = &cstate->targets[i];
a59e5536 1702
1703 if (!target->offset)
1704 continue;
1705
1706 offset = block->pc + target->offset * sizeof(u32);
ba3814c1 1707
a59e5536 1708 block2 = lightrec_find_block(state->block_cache, offset);
1709 if (block2) {
1710 /* No need to check if block2 is compilable - it must
1711 * be, otherwise block wouldn't be compilable either */
1712
98fa08a5
PC		 1713 /* Set the "block dead" flag to prevent the dynarec from
1714 * recompiling this block */
ba3814c1 1715 old_flags = block_set_flags(block2, BLOCK_IS_DEAD);
564156dc
PC		 1716
1717 if (old_flags & BLOCK_IS_DEAD)
1718 was_dead[i / 32] |= BIT(i % 32);
1719 else
1720 was_dead[i / 32] &= ~BIT(i % 32);
ba3814c1
PC		 1721 }
1722
a5a6f7b8
PC		 1723 dead_blocks[i] = block2;
1724
564156dc
PC		 1725 /* If block2 was pending for compilation, cancel it.
1726 * If it's being compiled right now, wait until it finishes. */
1727 if (block2)
1728 lightrec_recompiler_remove(state->rec, block2);
1729 }
a59e5536 1730
564156dc
PC		 1731 for (i = 0; i < cstate->nb_targets; i++) {
1732 target = &cstate->targets[i];
1733
1734 if (!target->offset)
1735 continue;
98fa08a5 1736
fd58fa32
PC		 1737 /* We know from now on that block2 (if present) isn't going to
1738 * be compiled. We can override the LUT entry with our new
1739 * block's entry point. */
1740 offset = lut_offset(block->pc) + target->offset;
02487de7 1741 lut_write(state, offset, jit_address(target->label));
98fa08a5 1742
a5a6f7b8
PC		 1743 if (ENABLE_THREADED_COMPILER) {
1744 block2 = dead_blocks[i];
1745 } else {
1746 offset = block->pc + target->offset * sizeof(u32);
1747 block2 = lightrec_find_block(state->block_cache, offset);
1748 }
fd58fa32 1749 if (block2) {
a59e5536 1750 pr_debug("Reap block 0x%08x as it's covered by block "
1751 "0x%08x\n", block2->pc, block->pc);
1752
98fa08a5 1753 /* Finally, reap the block. */
ba3814c1
PC		 1754 if (!ENABLE_THREADED_COMPILER) {
1755 lightrec_unregister_block(state->block_cache, block2);
1756 lightrec_free_block(state, block2);
564156dc 1757 } else if (!(was_dead[i / 32] & BIT(i % 32))) {
a59e5536 1758 lightrec_reaper_add(state->reaper,
1759 lightrec_reap_block,
1760 block2);
a59e5536 1761 }
1762 }
1763 }
1764
564156dc
PC		 1765 if (ENABLE_THREADED_COMPILER)
1766 lightrec_reaper_continue(state->reaper);
1767
d16005f8 1768 if (ENABLE_DISASSEMBLER) {
98fa08a5 1769 pr_debug("Compiling block at PC: 0x%08x\n", block->pc);
d16005f8
PC		 1770 jit_disassemble();
1771 }
1772
1773 jit_clear_state();
1774
d16005f8 1775 if (fully_tagged)
ba3814c1
PC		 1776 old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST);
1777
1778 if (fully_tagged && !(old_flags & BLOCK_NO_OPCODE_LIST)) {
f5ee77ca 1779 pr_debug("Block "PC_FMT" is fully tagged"
d16005f8 1780 " - free opcode list\n", block->pc);
ba3814c1
PC		 1781
1782 if (ENABLE_THREADED_COMPILER) {
1783 lightrec_reaper_add(state->reaper,
1784 lightrec_reap_opcode_list,
1785 block->opcode_list);
1786 } else {
1787 lightrec_free_opcode_list(state, block->opcode_list);
1788 }
d16005f8
PC		 1789 }
1790
a59e5536 1791 if (oldjit) {
1792 pr_debug("Block 0x%08x recompiled, reaping old jit context.\n",
1793 block->pc);
1794
02487de7 1795 if (ENABLE_THREADED_COMPILER) {
a59e5536 1796 lightrec_reaper_add(state->reaper,
1797 lightrec_reap_jit, oldjit);
02487de7
PC		 1798 lightrec_reaper_add(state->reaper,
1799 lightrec_reap_function, old_fn);
1800 } else {
a59e5536 1801 _jit_destroy_state(oldjit);
02487de7
PC		 1802 lightrec_free_function(state, old_fn);
1803 }
ba3814c1
PC		 1804
1805 lightrec_unregister(MEM_FOR_CODE, old_code_size);
a59e5536 1806 }
1807
cb72ea13
PC		 1808 pr_debug("Blocks compiled: %u\n", ++state->nb_compile);
1809
d16005f8
PC		 1810 return 0;
1811}
1812
98fa08a5
PC		 1813static void lightrec_print_info(struct lightrec_state *state)
1814{
1815 if ((state->current_cycle & ~0xfffffff) != state->old_cycle_counter) {
1816 pr_info("Lightrec RAM usage: IR %u KiB, CODE %u KiB, "
1817 "MIPS %u KiB, TOTAL %u KiB, avg. IPI %f\n",
1818 lightrec_get_mem_usage(MEM_FOR_IR) / 1024,
1819 lightrec_get_mem_usage(MEM_FOR_CODE) / 1024,
1820 lightrec_get_mem_usage(MEM_FOR_MIPS_CODE) / 1024,
1821 lightrec_get_total_mem_usage() / 1024,
1822 lightrec_get_average_ipi());
1823 state->old_cycle_counter = state->current_cycle & ~0xfffffff;
1824 }
1825}
1826
d16005f8
PC		 1827u32 lightrec_execute(struct lightrec_state *state, u32 pc, u32 target_cycle)
1828{
9259d748 1829 s32 (*func)(struct lightrec_state *, u32, void *, s32) = (void *)state->dispatcher->function;
d16005f8
PC		 1830 void *block_trace;
1831 s32 cycles_delta;
1832
1833 state->exit_flags = LIGHTREC_EXIT_NORMAL;
1834
1835 /* Handle the cycle counter overflowing */
1836 if (unlikely(target_cycle < state->current_cycle))
1837 target_cycle = UINT_MAX;
1838
1839 state->target_cycle = target_cycle;
0e720fb1 1840 state->curr_pc = pc;
d16005f8
PC		 1841
1842 block_trace = get_next_block_func(state, pc);
1843 if (block_trace) {
1844 cycles_delta = state->target_cycle - state->current_cycle;
1845
0e720fb1 1846 cycles_delta = (*func)(state, state->curr_pc,
9259d748 1847 block_trace, cycles_delta);
d16005f8
PC		 1848
1849 state->current_cycle = state->target_cycle - cycles_delta;
1850 }
1851
a59e5536 1852 if (ENABLE_THREADED_COMPILER)
1853 lightrec_reaper_reap(state->reaper);
1854
98fa08a5
PC		 1855 if (LOG_LEVEL >= INFO_L)
1856 lightrec_print_info(state);
1857
0e720fb1 1858 return state->curr_pc;
d16005f8
PC		 1859}
1860
ba3814c1
PC		 1861u32 lightrec_run_interpreter(struct lightrec_state *state, u32 pc,
1862 u32 target_cycle)
d16005f8 1863{
ba3814c1 1864 struct block *block;
d16005f8
PC		 1865
1866 state->exit_flags = LIGHTREC_EXIT_NORMAL;
ba3814c1
PC		 1867 state->target_cycle = target_cycle;
1868
1869 do {
1870 block = lightrec_get_block(state, pc);
1871 if (!block)
1872 break;
1873
1874 pc = lightrec_emulate_block(state, block, pc);
d16005f8 1875
ba3814c1
PC		 1876 if (ENABLE_THREADED_COMPILER)
1877 lightrec_reaper_reap(state->reaper);
1878 } while (state->current_cycle < state->target_cycle);
98fa08a5
PC		 1879
1880 if (LOG_LEVEL >= INFO_L)
1881 lightrec_print_info(state);
1882
1883 return pc;
d16005f8
PC		 1884}
1885
98fa08a5 1886void lightrec_free_block(struct lightrec_state *state, struct block *block)
d16005f8 1887{
ba3814c1
PC		 1888 u8 old_flags;
1889
d16005f8 1890 lightrec_unregister(MEM_FOR_MIPS_CODE, block->nb_ops * sizeof(u32));
ba3814c1
PC		 1891 old_flags = block_set_flags(block, BLOCK_NO_OPCODE_LIST);
1892
1893 if (!(old_flags & BLOCK_NO_OPCODE_LIST))
1894 lightrec_free_opcode_list(state, block->opcode_list);
d16005f8
PC		 1895 if (block->_jit)
1896 _jit_destroy_state(block->_jit);
d8b04acd
PC		 1897 if (block->function) {
1898 lightrec_free_function(state, block->function);
1899 lightrec_unregister(MEM_FOR_CODE, block->code_size);
1900 }
98fa08a5
PC		 1901 lightrec_free(state, MEM_FOR_IR, sizeof(*block), block);
1902}
1903
1904struct lightrec_cstate * lightrec_create_cstate(struct lightrec_state *state)
1905{
1906 struct lightrec_cstate *cstate;
1907
1908 cstate = lightrec_malloc(state, MEM_FOR_LIGHTREC, sizeof(*cstate));
1909 if (!cstate)
1910 return NULL;
1911
1912 cstate->reg_cache = lightrec_regcache_init(state);
1913 if (!cstate->reg_cache) {
1914 lightrec_free(state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate);
1915 return NULL;
1916 }
1917
1918 cstate->state = state;
1919
1920 return cstate;
1921}
1922
1923void lightrec_free_cstate(struct lightrec_cstate *cstate)
1924{
1925 lightrec_free_regcache(cstate->reg_cache);
1926 lightrec_free(cstate->state, MEM_FOR_LIGHTREC, sizeof(*cstate), cstate);
d16005f8
PC		 1927}
1928
1929struct lightrec_state * lightrec_init(char *argv0,
878e6cda 1930 const struct lightrec_mem_map *maps,
d16005f8
PC		 1931 size_t nb,
1932 const struct lightrec_ops *ops)
1933{
878e6cda
PC		 1934 const struct lightrec_mem_map *codebuf_map = &maps[PSX_MAP_CODE_BUFFER];
1935 const struct lightrec_mem_map *map;
d16005f8 1936 struct lightrec_state *state;
02487de7
PC		 1937 uintptr_t addr;
1938 void *tlsf = NULL;
1939 bool with_32bit_lut = false;
1940 size_t lut_size;
d16005f8
PC		 1941
1942 /* Sanity-check ops */
98fa08a5 1943 if (!ops || !ops->cop2_op || !ops->enable_ram) {
d16005f8
PC		 1944 pr_err("Missing callbacks in lightrec_ops structure\n");
1945 return NULL;
1946 }
1947
fdf33147
PC		 1948 if (ops->cop2_notify)
1949 pr_debug("Optional cop2_notify callback in lightrec_ops\n");
1950 else
1951 pr_debug("No optional cop2_notify callback in lightrec_ops\n");
1952
d8b04acd
PC		 1953 if (ENABLE_CODE_BUFFER && nb > PSX_MAP_CODE_BUFFER
1954 && codebuf_map->address) {
02487de7
PC		 1955 tlsf = tlsf_create_with_pool(codebuf_map->address,
1956 codebuf_map->length);
1957 if (!tlsf) {
1958 pr_err("Unable to initialize code buffer\n");
1959 return NULL;
1960 }
1961
1962 if (__WORDSIZE == 64) {
1963 addr = (uintptr_t) codebuf_map->address + codebuf_map->length - 1;
1964 with_32bit_lut = addr == (u32) addr;
1965 }
1966 }
1967
1968 if (with_32bit_lut)
1969 lut_size = CODE_LUT_SIZE * 4;
1970 else
1971 lut_size = CODE_LUT_SIZE * sizeof(void *);
1972
fb67ea33 1973 init_jit_with_debug(argv0, stdout);
d16005f8 1974
02487de7 1975 state = calloc(1, sizeof(*state) + lut_size);
d16005f8
PC		 1976 if (!state)
1977 goto err_finish_jit;
1978
02487de7
PC		 1979 lightrec_register(MEM_FOR_LIGHTREC, sizeof(*state) + lut_size);
1980
1981 state->tlsf = tlsf;
1982 state->with_32bit_lut = with_32bit_lut;
cb72ea13 1983 state->in_delay_slot_n = 0xff;
684432ad 1984 state->cycles_per_op = 2;
d16005f8 1985
d16005f8
PC		 1986 state->block_cache = lightrec_blockcache_init(state);
1987 if (!state->block_cache)
d8b04acd 1988 goto err_free_state;
d16005f8 1989
d16005f8
PC		 1990 if (ENABLE_THREADED_COMPILER) {
1991 state->rec = lightrec_recompiler_init(state);
1992 if (!state->rec)
98fa08a5 1993 goto err_free_block_cache;
a59e5536 1994
1995 state->reaper = lightrec_reaper_init(state);
1996 if (!state->reaper)
1997 goto err_free_recompiler;
98fa08a5
PC		 1998 } else {
1999 state->cstate = lightrec_create_cstate(state);
2000 if (!state->cstate)
2001 goto err_free_block_cache;
d16005f8
PC		 2002 }
2003
2004 state->nb_maps = nb;
878e6cda 2005 state->maps = maps;
d16005f8
PC		 2006
2007 memcpy(&state->ops, ops, sizeof(*ops));
2008
2009 state->dispatcher = generate_dispatcher(state);
2010 if (!state->dispatcher)
a59e5536 2011 goto err_free_reaper;
d16005f8 2012
98fa08a5
PC		 2013 state->c_wrapper_block = generate_wrapper(state);
2014 if (!state->c_wrapper_block)
d16005f8
PC		 2015 goto err_free_dispatcher;
2016
98fa08a5
PC		 2017 state->c_wrappers[C_WRAPPER_RW] = lightrec_rw_cb;
2018 state->c_wrappers[C_WRAPPER_RW_GENERIC] = lightrec_rw_generic_cb;
fdf33147 2019 state->c_wrappers[C_WRAPPER_MFC] = lightrec_mfc_cb;
98fa08a5 2020 state->c_wrappers[C_WRAPPER_MTC] = lightrec_mtc_cb;
22eee2ac 2021 state->c_wrappers[C_WRAPPER_CP] = lightrec_cp_cb;
d16005f8 2022
878e6cda 2023 map = &maps[PSX_MAP_BIOS];
d16005f8
PC		 2024 state->offset_bios = (uintptr_t)map->address - map->pc;
2025
878e6cda 2026 map = &maps[PSX_MAP_SCRATCH_PAD];
d16005f8
PC		 2027 state->offset_scratch = (uintptr_t)map->address - map->pc;
2028
878e6cda 2029 map = &maps[PSX_MAP_HW_REGISTERS];
ba3814c1
PC		 2030 state->offset_io = (uintptr_t)map->address - map->pc;
2031
878e6cda 2032 map = &maps[PSX_MAP_KERNEL_USER_RAM];
d16005f8
PC		 2033 state->offset_ram = (uintptr_t)map->address - map->pc;
2034
878e6cda
PC		 2035 if (maps[PSX_MAP_MIRROR1].address == map->address + 0x200000 &&
2036 maps[PSX_MAP_MIRROR2].address == map->address + 0x400000 &&
2037 maps[PSX_MAP_MIRROR3].address == map->address + 0x600000)
d16005f8
PC		 2038 state->mirrors_mapped = true;
2039
98fa08a5
PC		 2040 if (state->offset_bios == 0 &&
2041 state->offset_scratch == 0 &&
2042 state->offset_ram == 0 &&
ba3814c1 2043 state->offset_io == 0 &&
98fa08a5
PC		 2044 state->mirrors_mapped) {
2045 pr_info("Memory map is perfect. Emitted code will be best.\n");
2046 } else {
2047 pr_info("Memory map is sub-par. Emitted code will be slow.\n");
2048 }
2049
02487de7
PC		 2050 if (state->with_32bit_lut)
2051 pr_info("Using 32-bit LUT\n");
2052
d16005f8
PC		 2053 return state;
2054
d16005f8 2055err_free_dispatcher:
98fa08a5 2056 lightrec_free_block(state, state->dispatcher);
a59e5536 2057err_free_reaper:
2058 if (ENABLE_THREADED_COMPILER)
2059 lightrec_reaper_destroy(state->reaper);
d16005f8
PC		 2060err_free_recompiler:
2061 if (ENABLE_THREADED_COMPILER)
2062 lightrec_free_recompiler(state->rec);
98fa08a5
PC		 2063 else
2064 lightrec_free_cstate(state->cstate);
d16005f8
PC		 2065err_free_block_cache:
2066 lightrec_free_block_cache(state->block_cache);
d16005f8 2067err_free_state:
d16005f8 2068 lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) +
02487de7 2069 lut_elm_size(state) * CODE_LUT_SIZE);
d16005f8
PC		 2070 free(state);
2071err_finish_jit:
2072 finish_jit();
02487de7
PC		 2073 if (ENABLE_CODE_BUFFER && tlsf)
2074 tlsf_destroy(tlsf);
d16005f8
PC		 2075 return NULL;
2076}
2077
2078void lightrec_destroy(struct lightrec_state *state)
2079{
98fa08a5
PC		 2080 /* Force a print info on destroy*/
2081 state->current_cycle = ~state->current_cycle;
2082 lightrec_print_info(state);
2083
03535202
PC		 2084 lightrec_free_block_cache(state->block_cache);
2085 lightrec_free_block(state, state->dispatcher);
2086 lightrec_free_block(state, state->c_wrapper_block);
2087
a59e5536 2088 if (ENABLE_THREADED_COMPILER) {
d16005f8 2089 lightrec_free_recompiler(state->rec);
a59e5536 2090 lightrec_reaper_destroy(state->reaper);
98fa08a5
PC		 2091 } else {
2092 lightrec_free_cstate(state->cstate);
a59e5536 2093 }
d16005f8 2094
d16005f8 2095 finish_jit();
02487de7
PC		 2096 if (ENABLE_CODE_BUFFER && state->tlsf)
2097 tlsf_destroy(state->tlsf);
d16005f8 2098
d16005f8 2099 lightrec_unregister(MEM_FOR_LIGHTREC, sizeof(*state) +
02487de7 2100 lut_elm_size(state) * CODE_LUT_SIZE);
d16005f8
PC		 2101 free(state);
2102}
2103
2104void lightrec_invalidate(struct lightrec_state *state, u32 addr, u32 len)
2105{
2106 u32 kaddr = kunseg(addr & ~0x3);
d8b04acd 2107 enum psx_map idx = lightrec_get_map_idx(state, kaddr);
d16005f8 2108
d8b04acd
PC		 2109 switch (idx) {
2110 case PSX_MAP_MIRROR1:
2111 case PSX_MAP_MIRROR2:
2112 case PSX_MAP_MIRROR3:
d16005f8 2113 /* Handle mirrors */
d8b04acd
PC		 2114 kaddr &= RAM_SIZE - 1;
2115 fallthrough;
2116 case PSX_MAP_KERNEL_USER_RAM:
2117 break;
2118 default:
2119 return;
d16005f8 2120 }
d8b04acd
PC		 2121
2122 memset(lut_address(state, lut_offset(kaddr)), 0,
2123 ((len + 3) / 4) * lut_elm_size(state));
d16005f8
PC		 2124}
2125
2126void lightrec_invalidate_all(struct lightrec_state *state)
2127{
02487de7 2128 memset(state->code_lut, 0, lut_elm_size(state) * CODE_LUT_SIZE);
d16005f8
PC		 2129}
2130
684432ad 2131void lightrec_set_unsafe_opt_flags(struct lightrec_state *state, u32 flags)
d16005f8 2132{
684432ad 2133 if ((flags ^ state->opt_flags) & LIGHTREC_OPT_INV_DMA_ONLY)
d16005f8
PC		 2134 lightrec_invalidate_all(state);
2135
684432ad 2136 state->opt_flags = flags;
d16005f8
PC		 2137}
2138
2139void lightrec_set_exit_flags(struct lightrec_state *state, u32 flags)
2140{
2141 if (flags != LIGHTREC_EXIT_NORMAL) {
2142 state->exit_flags |= flags;
2143 state->target_cycle = state->current_cycle;
2144 }
2145}
2146
2147u32 lightrec_exit_flags(struct lightrec_state *state)
2148{
2149 return state->exit_flags;
2150}
2151
d16005f8
PC		 2152u32 lightrec_current_cycle_count(const struct lightrec_state *state)
2153{
2154 return state->current_cycle;
2155}
2156
2157void lightrec_reset_cycle_count(struct lightrec_state *state, u32 cycles)
2158{
2159 state->current_cycle = cycles;
2160
2161 if (state->target_cycle < cycles)
2162 state->target_cycle = cycles;
2163}
2164
2165void lightrec_set_target_cycle_count(struct lightrec_state *state, u32 cycles)
2166{
2167 if (state->exit_flags == LIGHTREC_EXIT_NORMAL) {
2168 if (cycles < state->current_cycle)
2169 cycles = state->current_cycle;
2170
2171 state->target_cycle = cycles;
2172 }
2173}
98fa08a5
PC		 2174
2175struct lightrec_registers * lightrec_get_registers(struct lightrec_state *state)
2176{
2177 return &state->regs;
2178}
684432ad
PC		 2179
2180void lightrec_set_cycles_per_opcode(struct lightrec_state *state, u32 cycles)
2181{
878e6cda
PC		 2182 if (state->cycles_per_op == cycles)
2183 return;
2184
684432ad 2185 state->cycles_per_op = cycles;
878e6cda
PC		 2186
2187 if (ENABLE_THREADED_COMPILER) {
2188 lightrec_recompiler_pause(state->rec);
2189 lightrec_reaper_reap(state->reaper);
2190 }
2191
2192 lightrec_invalidate_all(state);
2193 lightrec_free_all_blocks(state->block_cache);
2194
2195 if (ENABLE_THREADED_COMPILER)
2196 lightrec_recompiler_unpause(state->rec);
684432ad 2197}
ARM optimized PCSX fork