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1 | /* |
2 | * (C) GraÅžvydas "notaz" Ignotas, 2010 |
3 | * |
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4 | * This work is licensed under the terms of any of these licenses |
5 | * (at your option): |
6 | * - GNU GPL, version 2 or later. |
7 | * - GNU LGPL, version 2.1 or later. |
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8 | * See the COPYING file in the top-level directory. |
9 | */ |
10 | |
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11 | #include "arm_features.h" |
12 | |
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13 | /* sanity check */ |
14 | #ifndef __ARM_NEON__ |
15 | #error Compiling NEON code, but appropriate preprocessor flag is missing |
16 | #error This usually means -mfpu=neon or -mfloat-abi= is not correctly specified |
17 | #endif |
18 | |
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19 | .text |
20 | .align 2 |
21 | |
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22 | FUNCTION(bgr555_to_rgb565): |
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23 | pld [r1] |
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24 | mov r3, #0x07c0 |
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25 | vdup.16 q15, r3 |
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26 | subs r2, r2, #64 |
27 | blt btr16_end64 |
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28 | 0: |
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29 | pld [r1, #64*2] |
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30 | vldmia r1!, {q0-q3} |
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31 | vshl.u16 q4, q0, #11 |
32 | vshl.u16 q5, q1, #11 |
33 | vshl.u16 q6, q2, #11 |
34 | vshl.u16 q7, q3, #11 |
35 | vsri.u16 q4, q0, #10 |
36 | vsri.u16 q5, q1, #10 |
37 | vsri.u16 q6, q2, #10 |
38 | vsri.u16 q7, q3, #10 |
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39 | vshl.u16 q0, q0, #1 |
40 | vshl.u16 q1, q1, #1 |
41 | vshl.u16 q2, q2, #1 |
42 | vshl.u16 q3, q3, #1 |
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43 | vbit q4, q0, q15 |
44 | vbit q5, q1, q15 |
45 | vbit q6, q2, q15 |
46 | vbit q7, q3, q15 |
47 | vstmia r0!, {q4-q7} |
48 | subs r2, r2, #64 |
49 | bge 0b |
50 | |
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51 | btr16_end64: |
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52 | adds r2, r2, #64 |
53 | bxeq lr |
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54 | subs r2, r2, #16 |
55 | blt btr16_end16 |
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56 | |
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57 | @ handle the remainder (reasonably rare) |
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58 | 0: |
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59 | vld1.16 {q0}, [r1]! |
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60 | vshl.u16 q1, q0, #11 |
61 | vshl.u16 q2, q0, #1 |
62 | vsri.u16 q1, q0, #10 |
63 | vbit q1, q2, q15 |
64 | subs r2, r2, #16 |
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65 | vst1.16 {q1}, [r0]! |
66 | bge 0b |
67 | |
68 | btr16_end16: |
69 | adds r2, r2, #16 |
70 | bxeq lr |
71 | subs r2, r2, #8 |
72 | bxlt lr |
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73 | |
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74 | @ very rare |
75 | vld1.16 d0, [r1]! |
76 | vshl.u16 d1, d0, #11 |
77 | vshl.u16 d2, d0, #1 |
78 | vsri.u16 d1, d0, #10 |
79 | vbit d1, d2, d30 |
80 | vst1.16 d1, [r0]! |
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81 | bx lr |
82 | |
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83 | |
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84 | FUNCTION(bgr888_to_rgb888): |
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85 | pld [r1] |
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86 | @ r2 /= 48 |
87 | mov r2, r2, lsr #4 |
88 | movw r3, #0x5556 |
89 | movt r3, #0x5555 |
90 | umull r12,r2, r3, r2 |
91 | 0: |
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92 | pld [r1, #48*3] |
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93 | vld3.8 {d0-d2}, [r1, :64]! |
94 | vld3.8 {d3-d5}, [r1, :64]! |
95 | vswp d0, d2 |
96 | vswp d3, d5 |
97 | vst3.8 {d0-d2}, [r0, :64]! |
98 | vst3.8 {d3-d5}, [r0, :64]! |
99 | subs r2, r2, #1 |
100 | bne 0b |
101 | |
102 | bx lr |
103 | |
104 | |
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105 | FUNCTION(bgr888_to_rgb565): |
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106 | pld [r1] |
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107 | @ r2 /= 48 |
108 | mov r2, r2, lsr #4 |
109 | movw r3, #0x5556 |
110 | movt r3, #0x5555 |
111 | umull r12,r2, r3, r2 |
112 | |
113 | mov r3, #0x07e0 |
114 | vdup.16 q15, r3 |
115 | 0: |
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116 | pld [r1, #48*3] |
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117 | vld3.8 {d1-d3}, [r1, :64]! |
118 | vld3.8 {d5-d7}, [r1, :64]! |
119 | |
120 | vshll.u8 q8, d2, #3 @ g |
121 | vshll.u8 q9, d6, #3 |
122 | vshr.u8 d0, d3, #3 @ b |
123 | vshr.u8 d4, d7, #3 |
124 | vzip.8 d0, d1 @ rb |
125 | vzip.8 d4, d5 |
126 | vbit q0, q8, q15 |
127 | vbit q2, q9, q15 |
128 | |
129 | vstmia r0!, {d0,d1} |
130 | vstmia r0!, {d4,d5} |
131 | subs r2, r2, #1 |
132 | bne 0b |
133 | |
134 | bx lr |
135 | |
136 | |
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137 | FUNCTION(rgb888_to_rgb565): |
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138 | pld [r1] |
139 | @ r2 /= 48 |
140 | mov r2, r2, lsr #4 |
141 | movw r3, #0x5556 |
142 | movt r3, #0x5555 |
143 | umull r12,r2, r3, r2 |
144 | |
145 | mov r3, #0x07e0 |
146 | vdup.16 q15, r3 |
147 | 0: |
148 | pld [r1, #48*3] |
149 | vld3.8 {d1-d3}, [r1, :64]! |
150 | vld3.8 {d5-d7}, [r1, :64]! |
151 | |
152 | vshll.u8 q8, d2, #3 @ g |
153 | vshll.u8 q9, d6, #3 |
154 | vshr.u8 d2, d1, #3 @ b |
155 | vshr.u8 d6, d5, #3 |
156 | vzip.8 d2, d3 @ rb |
157 | vzip.8 d6, d7 |
158 | vbit q1, q8, q15 |
159 | vbit q3, q9, q15 |
160 | |
161 | vstmia r0!, {d2,d3} |
162 | vstmia r0!, {d6,d7} |
163 | subs r2, r2, #1 |
164 | bne 0b |
165 | |
166 | bx lr |
167 | |
168 | |
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169 | @ vim:filetype=armasm |