8689c962 |
1 | ############################################################################### |
2 | # |
3 | # Copyright (c) 2011, GraÅžvydas Ignotas |
4 | # All rights reserved. |
5 | # |
6 | # Redistribution and use in source and binary forms, with or without |
7 | # modification, are permitted provided that the following conditions are met: |
8 | # * Redistributions of source code must retain the above copyright |
9 | # notice, this list of conditions and the following disclaimer. |
10 | # * Redistributions in binary form must reproduce the above copyright |
11 | # notice, this list of conditions and the following disclaimer in the |
12 | # documentation and/or other materials provided with the distribution. |
13 | # * Neither the name of the organization nor the |
14 | # names of its contributors may be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED ''AS IS'' AND ANY |
18 | # EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
19 | # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
20 | # DISCLAIMED. IN NO EVENT SHALL <copyright holder> BE LIABLE FOR ANY |
21 | # DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
22 | # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
23 | # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
24 | # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
26 | # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
28 | # Assemble with gas |
29 | # --register-prefix-optional --bitwise-or |
30 | # |
31 | |
32 | #include "transfer.h" |
33 | |
34 | .text |
35 | .globl do_transfer |
36 | |
37 | |
38 | # receive 1 byte to d0 |
39 | # in: a1 - data port |
40 | # trash: d1 |
41 | .macro recv_one_byte is_last=0 |
42 | move.b #0,(a1) /* clear TH */ |
43 | |
44 | 0: /*L_wait_tl_low*/ |
45 | move.b (a1),d1 |
46 | btst.b #4,d1 |
47 | bne 0b /*L_wait_tl_low*/ |
48 | |
49 | move.b #0x40,(a1) /* set TH */ |
50 | and.b #0x0f,d1 |
51 | |
52 | 0: /*L_wait_tl_hi*/ |
53 | move.b (a1),d0 |
54 | btst.b #4,d0 |
55 | beq 0b /*L_wait_tl_hi*/ |
56 | |
57 | .if !\is_last |
58 | move.b #0,(a1) /* clear TH - ready for next */ |
59 | .endif |
60 | lsl.b #4,d0 |
61 | or.b d1,d0 |
62 | .endm |
63 | |
64 | # send 1 byte in d0 |
65 | # in: a1 - data port |
66 | # trash: d1,d2 |
67 | .macro send_one_byte |
68 | move.b d0,d2 |
69 | and.b #0x0f,d2 |
70 | |
71 | 0: /*Lwait_tl_low:*/ |
72 | move.b (a1),d1 |
73 | btst.b #4,d1 |
74 | bne 0b /*Lwait_tl_low*/ |
75 | |
76 | move.b d2,(a1) /* clears TH and writes data */ |
77 | |
78 | move.b d0,d2 |
79 | lsr.b #4,d2 |
80 | bset.b #6,d2 /* prepare TH */ |
81 | |
82 | 0: /*wait_tl_hi*/ |
83 | move.b (a1),d1 |
84 | btst.b #4,d1 |
85 | beq 0b /*wait_tl_hi1*/ |
86 | |
87 | move.b d2,(a1) |
88 | .endm |
89 | |
90 | recv_byte: |
91 | recv_one_byte 1 |
92 | rts |
93 | |
94 | # receive address/size to d0 (3 bytes BE) |
95 | # in: a1 - data port |
96 | # trash: d1,d2 |
97 | recv_ad: |
98 | moveq.l #0,d2 |
99 | bsr recv_byte |
100 | move.b d0,d2 |
101 | bsr recv_byte |
102 | lsl.l #8,d2 |
103 | move.b d0,d2 |
104 | bsr recv_byte |
105 | lsl.l #8,d2 |
106 | move.b d0,d2 |
107 | move.l d2,d0 |
108 | rts |
109 | |
110 | |
111 | do_transfer: |
112 | lea 0xa10005,a1 |
113 | move.b #0x40,(0xa1000b).l /* ctrl - all inputs except TH */ |
114 | move.b #0x00,(a1) |
115 | |
116 | bsr recv_byte |
117 | cmp.b #CMD_PREFIX,d0 |
118 | bne return |
119 | |
120 | bsr recv_byte |
121 | cmp.b #CMD_MD_SEND,d0 /* sent to us */ |
122 | beq transfer_recv |
123 | cmp.b #CMD_MD_RECV,d0 /* recv from us */ |
124 | beq transfer_send |
125 | bra return |
126 | |
127 | |
128 | transfer_recv: |
129 | bsr recv_ad |
130 | move.l d0,a0 |
131 | bsr recv_ad |
132 | move.l d0,d3 |
133 | |
134 | tr_recv_loop: |
135 | recv_one_byte |
136 | move.b d0,(a0)+ |
137 | subq.l #1,d3 |
138 | bne tr_recv_loop |
139 | bra return |
140 | |
141 | transfer_send: |
142 | bsr recv_ad |
143 | move.l d0,a0 |
144 | bsr recv_ad |
145 | move.l d0,d3 |
146 | |
147 | 0: /*Lwait_tl_low:*/ |
148 | move.b (a1),d0 |
149 | btst.b #4,d0 |
150 | bne 0b /*Lwait_tl_low*/ |
151 | |
152 | move.b #0x4f,(0xa1000b).l |
153 | move.b #0x40,(a1) |
154 | |
155 | tr_send_loop: |
156 | move.b (a0)+,d0 |
157 | send_one_byte |
158 | subq.l #1,d3 |
159 | bne tr_send_loop |
160 | bra return |
161 | |
162 | |
163 | return: |
164 | move.b #0,(0xa1000b).l /* all inputs */ |
165 | move.l #0xffe000,a1 |
166 | move.l d0,(a1)+ /* last state for debug */ |
167 | move.l d1,(a1)+ |
168 | move.l d2,(a1)+ |
169 | move.l d3,(a1)+ |
170 | move.l a0,(a1)+ |
171 | bra return_to_main |
172 | |
173 | |
174 | # vim:filetype=asmM68k |