[megadrive.git] / idc / mida.idc

//\r
//	IDC File to disassemble Sega Genesis/Megadrive rom\r
//	by Kaneda\r
//\r
//	Useage:\r
//	  launch IDA with "idag -a -p68000 -Smida.idc"\r
//	  Select your .bin file\r
//	  Press OK to the 2 dialog boxes following\r
//\r
//	0.1 (12 Nov 2004 ): Initial release\r
//  0.2 (01 Jun 2005 ): Support for start adress <0x200 (skip header)\r
//\r
//	Update on http://www.consoledev.fr.st\r
//\r
\r
#include <idc.idc>\r
\r
//-------------------------------------------------------------------------\r
static CW(off,name,cmt) {\r
  auto x;\r
  x = off;\r
  MakeWord(x);\r
  MakeName(x,name);\r
  MakeRptCmt(x,cmt);\r
}\r
\r
//-------------------------------------------------------------------------\r
static CD(off,name,cmt) {\r
  auto x;\r
  x = off;\r
  MakeDword(x);\r
  MakeName(x,name);\r
  MakeRptCmt(x,cmt);\r
}\r
\r
//-------------------------------------------------------------------------\r
static CB(off,name,cmt) {\r
  auto x;\r
  x = off;\r
  MakeByte(x);\r
  MakeName(x,name);\r
  MakeRptCmt(x,cmt);\r
}\r
\r
static CS(off,end,name,cmt) {\r
  auto x;\r
  x = off;\r
  MakeStr(x, end);\r
  MakeName(x,name);\r
  MakeRptCmt(x,cmt);\r
}\r
\r
static mdVector(  ) {\r
auto i, addr;\r
\r
CD(0x00, "initStack", "Initial Stack");\r
CD(0x04, "startAddress", "Start Address");\r
CD(0x08, "", "Bus Error");\r
CD(0x0C, "", "Address Error");\r
CD(0x10, "", "Illegal instruction");\r
CD(0x14, "", "Zero Divide");\r
CD(0x18, "", "CHK instruction");\r
CD(0x1C, "", "TRAPV instruction");\r
CD(0x20, "", "Privilege Violation");\r
CD(0x24, "", "Trace");\r
CD(0x28, "", "Line 1010 Emulator");\r
CD(0x2C, "", "Line 1111 Emulator");\r
CD(0x30, "", "Reserved");\r
CD(0x34, "", "Reserved");\r
CD(0x38, "", "Reserved");\r
CD(0x3C, "", "Unitialized Interrrupt");\r
CD(0x40, "", "Reserved");\r
CD(0x44, "", "Reserved");\r
CD(0x48, "", "Reserved");\r
CD(0x4C, "", "Reserved");\r
CD(0x50, "", "Reserved");\r
CD(0x54, "", "Reserved");\r
CD(0x58, "", "Reserved");\r
CD(0x5C, "", "Reserved");\r
CD(0x60, "", "Spurious Interrupt");\r
CD(0x64, "", "Level 1 interrupt");\r
CD(0x68, "", "Level 2/External  interrupt");\r
CD(0x6C, "", "Level 3 interrupt");\r
CD(0x70, "", "Level 4/Horizontal interrupt");\r
CD(0x74, "", "Level 5 interrupt");\r
CD(0x78, "", "Level 6/Vertical interrupt");\r
CD(0x7C,"", "Level 7 interrupt");\r
\r
i=0x80;\r
while (i <= 0xBC){\r
  CD(i,"", "Trap");\r
  i = i+1;\r
}\r
\r
i=0xC0;\r
while (i <= 0xFF){\r
  CD(i,"", "Reserved");\r
  i = i+1;\r
  }\r
\r
for ( i=0x08; i< 0x200; i=i+4 ) {\r
  addr = Dword( i );\r
  MakeCode(addr);\r
  }\r
}\r
\r
static mdHeader( ) {\r
auto addr;\r
\r
addr =  Dword( 0x04 );\r
if (addr < 0x200)\r
{\r
	Warning("Start address unusual");\r
    return;\r
}\r
CS(0x100,0x110,"","");\r
 CS(0x110,0x120,"","");\r
 CS(0x120,0x130,"","");\r
 CS(0x130,0x140,"","");\r
 CS(0x140,0x150,"","");\r
 CS(0x150,0x160,"","");\r
 CS(0x160,0x170,"","");\r
 CS(0x170,0x180,"","");\r
 CS(0x180,0x18D,"","Serial Number");\r
 CW(0x18E, "CheckSum","");\r
 CS(0x190,0x1A0,"","");\r
 CD(0x1A0, "RomStartAdr", "Rom Start Adress");\r
 CD(0x1A4, "RomEndAdr", "Rom End Adress");\r
 CD(0x1A8, "RamStartAdr", "Ram Start Adress");\r
 CD(0x1AC, "RamEndAdr", "Ram End Adress");\r
 CS(0x1B0, 0x1BC, "", "SRam data");\r
 CS(0x1BC, 0x1C8, "", "Modem data");\r
 CS(0x1C8, 0x1DC, "", "Memo");\r
 CS(0x1DC, 0x1F0, "", "");\r
 CS(0x1F0, 0x200, "Country", "Countries codes");\r
 }\r
 \r
static mdAddress( ){\r
 CD(0xC00000, "VDP_Data","");\r
 CD(0xC00004, "VDP_Control",""); \r
 CD(0xC00008, "HV_Counter",""); \r
 CB(0xC00011, "PSG",""); \r
\r
 CW(0xA10001, "HW_Info","7-MODE  (R)  0: Domestic Model\n"\r
		        "             1: Overseas Model\n"\r
		        "6-VMOD  (R)  0: NTSC CPU clock 7.67 MHz\n"\r
                        "             1: PAL CPU clock 7.60 MHz\n"\r
                        "5-DISK  (R)  0: FDD unit connected\n"\r
		        "             1: FDD unit not connected\n"\r
		        "4-RSV   (R)  Currently not used\n"\r
		        "3-0 VER (R)  MEGA DRIVE version ($0 to $F)");\r
\r
 CW(0xA10003,"DATA1",	"PD7 (RW)\n"\r
           		"PD6 (RW) TH\n"\r
           		"PD5 (RW) TR\n"\r
           		"PD4 (RW) TL\n"\r
           		"PD3 (RW) RIGHT\n"\r
           		"PD2 (RW) LEFT\n"\r
           		"PD1 (RW) DOWN\n"\r
           		"PDO (RW) UP\n" );\r
 CW(0xA10005,"DATA2","");\r
 CW(0xA10007,"DATA3","");\r
 CW(0xA10009,"CTRL1",	"INT (RW) 0: TH-INT PROHIBITED\n"\r
                     	"         1: TH-INT ALLOWED\n"\r
		     	"PC6 (RW) 0: PD6 INPUT MODE\n"\r
                     	"         1: OUTPUT MODE\n"\r
			"PC5 (RW) 0: PD5 INPUT MODE\n"\r
			"         1: OUTPUT MODE\n"\r
			"PC4 (RW) 0: PD4 INPUT MODE\n"\r
			"         1: OUTPUT MODE\n"\r
			"PC3 (RW) 0: PD3 INPUT MODE\n"\r
			"         1: OUTPUT MODE\n"\r
			"PC2 (RW) 0: PD2 INPUT MODE\n"\r
			"         1: OUTPUT MODE\n"\r
			"PC1 (RW) 0: PD1 INPUT MODE\n"\r
			"         1: OUTPUT MODE\n"\r
			"PCO (RW) 0: PDO INPUT MODE\n"\r
			"         1: OUTPUT MODE");\r
 CW(0xA1000B,"CTRL2","");\r
 CW(0xA1000D,"CTRL3","");\r
 CW(0xA1000F,"TxDATA1","");\r
 CW(0xA10011,"RxDATA1","");\r
 CW(0xA10013,"SCTRL1","");\r
 CW(0xA10015,"TxDATA2","");\r
 CW(0xA10017,"RxDATA2","");\r
 CW(0xA10019,"SCTRL2","");\r
 CW(0xA1001B,"TxDATA3","");\r
 CW(0xA1001D,"RxDATA3","");\r
 CW(0xA1001F,"SCTRL3","");\r
\r
 CW(0xA11000,"MemMode",	"D8 ( W)   0: ROM MODE\n"\r
                        "          1: D-RAM MODE");\r
 \r
 CW(0xA11100,"Z80BusReq","D8 ( W)   0: BUSREQ CANCEL\n"\r
                         "          1: BUSREQ REQUEST\n"\r
                         "   ( R)   0: CPU FUNCTION STOP ACCESSIBLE\n"\r
                         "          1: FUNCTIONING");\r
 CW(0xA11200,"Z80BusReset","D8 ( W)   0: RESET REQUEST\n"\r
                           "          1: RESET CANCEL"); \r
}\r
 \r
//-------------------------------------------------------------------------\r
static main() {\r
  auto addr;\r
  \r
  SetPrcsr( "68000");\r
\r
  SegCreate(0x000000,0x3FFFFF,0,1,0,2);\r
  SegRename(0x000000,"ROM");\r
\r
  SegCreate(0xA00000,0xA0FFFF,0,1,0,2);\r
  SegRename(0xA00000,"Z80");\r
\r
  SegCreate(0xA10000,0xA10FFF,0,1,0,2);\r
  SegRename(0xA10000,"IO");\r
\r
  SegCreate(0xA11000,0xA11FFF,0,1,0,2);\r
  SegRename(0xA11000,"Control");\r
\r
  SegCreate(0xC00000,0xDFFFFF,0,1,0,2);\r
  SegRename(0xC00000,"VDP");\r
\r
  SegCreate(0xFF0000,0xFFFFFF,0,1,0,2);\r
  SegRename(0xFF0000,"RAM");\r
  \r
  mdVector( );\r
  mdHeader( );\r
  mdAddress( );\r
 \r
  addr =  Dword( 0x04 );\r
  MakeName(addr,"main");\r
  //MakeCode(addr);\r
  MakeFunction(addr,BADADDR);\r
   Wait( );\r
   \r
  addr =  Dword( 0x68 );\r
  MakeName(addr,"EInt");\r
  //MakeCode(addr);\r
  MakeFunction(addr,BADADDR);\r
  Wait( ); \r
  \r
  addr =  Dword( 0x70 );\r
  MakeName(addr,"HInt");\r
  //MakeCode(addr);\r
  MakeFunction(addr,BADADDR);\r
  Wait( ); \r
\r
  addr =  Dword( 0x78 );\r
  MakeName(addr,"VInt");\r
  //MakeCode(addr);\r
  MakeFunction(addr,BADADDR);\r
  Wait( );  \r
}\r
Commit	Line	Data
5e6cf6b2	1	//\r
	2	// IDC File to disassemble Sega Genesis/Megadrive rom\r
	3	// by Kaneda\r
	4	//\r
	5	// Useage:\r
	6	// launch IDA with "idag -a -p68000 -Smida.idc"\r
	7	// Select your .bin file\r
	8	// Press OK to the 2 dialog boxes following\r
	9	//\r
	10	// 0.1 (12 Nov 2004 ): Initial release\r
	11	// 0.2 (01 Jun 2005 ): Support for start adress <0x200 (skip header)\r
	12	//\r
	13	// Update on http://www.consoledev.fr.st\r
	14	//\r
	15	\r
	16	#include <idc.idc>\r
	17	\r
	18	//-------------------------------------------------------------------------\r
	19	static CW(off,name,cmt) {\r
	20	auto x;\r
	21	x = off;\r
	22	MakeWord(x);\r
	23	MakeName(x,name);\r
	24	MakeRptCmt(x,cmt);\r
	25	}\r
	26	\r
	27	//-------------------------------------------------------------------------\r
	28	static CD(off,name,cmt) {\r
	29	auto x;\r
	30	x = off;\r
	31	MakeDword(x);\r
	32	MakeName(x,name);\r
	33	MakeRptCmt(x,cmt);\r
	34	}\r
	35	\r
	36	//-------------------------------------------------------------------------\r
	37	static CB(off,name,cmt) {\r
	38	auto x;\r
	39	x = off;\r
	40	MakeByte(x);\r
	41	MakeName(x,name);\r
	42	MakeRptCmt(x,cmt);\r
	43	}\r
	44	\r
	45	static CS(off,end,name,cmt) {\r
	46	auto x;\r
	47	x = off;\r
	48	MakeStr(x, end);\r
	49	MakeName(x,name);\r
	50	MakeRptCmt(x,cmt);\r
	51	}\r
	52	\r
	53	static mdVector( ) {\r
	54	auto i, addr;\r
	55	\r
	56	CD(0x00, "initStack", "Initial Stack");\r
	57	CD(0x04, "startAddress", "Start Address");\r
	58	CD(0x08, "", "Bus Error");\r
	59	CD(0x0C, "", "Address Error");\r
	60	CD(0x10, "", "Illegal instruction");\r
	61	CD(0x14, "", "Zero Divide");\r
	62	CD(0x18, "", "CHK instruction");\r
	63	CD(0x1C, "", "TRAPV instruction");\r
	64	CD(0x20, "", "Privilege Violation");\r
65	CD(0x24, "", "Trace");\r
66	CD(0x28, "", "Line 1010 Emulator");\r
67	CD(0x2C, "", "Line 1111 Emulator");\r
68	CD(0x30, "", "Reserved");\r
69	CD(0x34, "", "Reserved");\r
70	CD(0x38, "", "Reserved");\r
71	CD(0x3C, "", "Unitialized Interrrupt");\r
72	CD(0x40, "", "Reserved");\r
73	CD(0x44, "", "Reserved");\r
74	CD(0x48, "", "Reserved");\r
75	CD(0x4C, "", "Reserved");\r
76	CD(0x50, "", "Reserved");\r
77	CD(0x54, "", "Reserved");\r
78	CD(0x58, "", "Reserved");\r
79	CD(0x5C, "", "Reserved");\r
80	CD(0x60, "", "Spurious Interrupt");\r
81	CD(0x64, "", "Level 1 interrupt");\r
82	CD(0x68, "", "Level 2/External interrupt");\r
83	CD(0x6C, "", "Level 3 interrupt");\r
84	CD(0x70, "", "Level 4/Horizontal interrupt");\r
85	CD(0x74, "", "Level 5 interrupt");\r
86	CD(0x78, "", "Level 6/Vertical interrupt");\r
87	CD(0x7C,"", "Level 7 interrupt");\r
88	\r
89	i=0x80;\r
90	while (i <= 0xBC){\r
91	CD(i,"", "Trap");\r
92	i = i+1;\r
93	}\r
94	\r
95	i=0xC0;\r
96	while (i <= 0xFF){\r
97	CD(i,"", "Reserved");\r
98	i = i+1;\r
99	}\r
100	\r
101	for ( i=0x08; i< 0x200; i=i+4 ) {\r
102	addr = Dword( i );\r
103	MakeCode(addr);\r
104	}\r
105	}\r
106	\r
107	static mdHeader( ) {\r
108	auto addr;\r
109	\r
110	addr = Dword( 0x04 );\r
111	if (addr < 0x200)\r
112	{\r
113	Warning("Start address unusual");\r
114	return;\r
115	}\r
116	CS(0x100,0x110,"","");\r
117	CS(0x110,0x120,"","");\r
118	CS(0x120,0x130,"","");\r
119	CS(0x130,0x140,"","");\r
120	CS(0x140,0x150,"","");\r
121	CS(0x150,0x160,"","");\r
122	CS(0x160,0x170,"","");\r
123	CS(0x170,0x180,"","");\r
124	CS(0x180,0x18D,"","Serial Number");\r
125	CW(0x18E, "CheckSum","");\r
126	CS(0x190,0x1A0,"","");\r
127	CD(0x1A0, "RomStartAdr", "Rom Start Adress");\r
128	CD(0x1A4, "RomEndAdr", "Rom End Adress");\r
129	CD(0x1A8, "RamStartAdr", "Ram Start Adress");\r
130	CD(0x1AC, "RamEndAdr", "Ram End Adress");\r
131	CS(0x1B0, 0x1BC, "", "SRam data");\r
132	CS(0x1BC, 0x1C8, "", "Modem data");\r
133	CS(0x1C8, 0x1DC, "", "Memo");\r
134	CS(0x1DC, 0x1F0, "", "");\r
135	CS(0x1F0, 0x200, "Country", "Countries codes");\r
136	}\r
137	\r
138	static mdAddress( ){\r
139	CD(0xC00000, "VDP_Data","");\r
140	CD(0xC00004, "VDP_Control",""); \r
141	CD(0xC00008, "HV_Counter",""); \r
142	CB(0xC00011, "PSG",""); \r
143	\r
144	CW(0xA10001, "HW_Info","7-MODE (R) 0: Domestic Model\n"\r
145	" 1: Overseas Model\n"\r
146	"6-VMOD (R) 0: NTSC CPU clock 7.67 MHz\n"\r
147	" 1: PAL CPU clock 7.60 MHz\n"\r
148	"5-DISK (R) 0: FDD unit connected\n"\r
149	" 1: FDD unit not connected\n"\r
150	"4-RSV (R) Currently not used\n"\r
151	"3-0 VER (R) MEGA DRIVE version ($0 to $F)");\r
152	\r
153	CW(0xA10003,"DATA1", "PD7 (RW)\n"\r
154	"PD6 (RW) TH\n"\r
155	"PD5 (RW) TR\n"\r
156	"PD4 (RW) TL\n"\r
157	"PD3 (RW) RIGHT\n"\r
158	"PD2 (RW) LEFT\n"\r
159	"PD1 (RW) DOWN\n"\r
160	"PDO (RW) UP\n" );\r
161	CW(0xA10005,"DATA2","");\r
162	CW(0xA10007,"DATA3","");\r
163	CW(0xA10009,"CTRL1", "INT (RW) 0: TH-INT PROHIBITED\n"\r
164	" 1: TH-INT ALLOWED\n"\r
165	"PC6 (RW) 0: PD6 INPUT MODE\n"\r
166	" 1: OUTPUT MODE\n"\r
167	"PC5 (RW) 0: PD5 INPUT MODE\n"\r
168	" 1: OUTPUT MODE\n"\r
169	"PC4 (RW) 0: PD4 INPUT MODE\n"\r
170	" 1: OUTPUT MODE\n"\r
171	"PC3 (RW) 0: PD3 INPUT MODE\n"\r
172	" 1: OUTPUT MODE\n"\r
173	"PC2 (RW) 0: PD2 INPUT MODE\n"\r
174	" 1: OUTPUT MODE\n"\r
175	"PC1 (RW) 0: PD1 INPUT MODE\n"\r
176	" 1: OUTPUT MODE\n"\r
177	"PCO (RW) 0: PDO INPUT MODE\n"\r
178	" 1: OUTPUT MODE");\r
179	CW(0xA1000B,"CTRL2","");\r
180	CW(0xA1000D,"CTRL3","");\r
181	CW(0xA1000F,"TxDATA1","");\r
182	CW(0xA10011,"RxDATA1","");\r
183	CW(0xA10013,"SCTRL1","");\r
184	CW(0xA10015,"TxDATA2","");\r
185	CW(0xA10017,"RxDATA2","");\r
186	CW(0xA10019,"SCTRL2","");\r
187	CW(0xA1001B,"TxDATA3","");\r
188	CW(0xA1001D,"RxDATA3","");\r
189	CW(0xA1001F,"SCTRL3","");\r
190	\r
191	CW(0xA11000,"MemMode", "D8 ( W) 0: ROM MODE\n"\r
192	" 1: D-RAM MODE");\r
193	\r
194	CW(0xA11100,"Z80BusReq","D8 ( W) 0: BUSREQ CANCEL\n"\r
195	" 1: BUSREQ REQUEST\n"\r
196	" ( R) 0: CPU FUNCTION STOP ACCESSIBLE\n"\r
197	" 1: FUNCTIONING");\r
198	CW(0xA11200,"Z80BusReset","D8 ( W) 0: RESET REQUEST\n"\r
199	" 1: RESET CANCEL"); \r
200	}\r
201	\r
202	//-------------------------------------------------------------------------\r
203	static main() {\r
204	auto addr;\r
205	\r
206	SetPrcsr( "68000");\r
207	\r
208	SegCreate(0x000000,0x3FFFFF,0,1,0,2);\r
209	SegRename(0x000000,"ROM");\r
210	\r
211	SegCreate(0xA00000,0xA0FFFF,0,1,0,2);\r
212	SegRename(0xA00000,"Z80");\r
213	\r
214	SegCreate(0xA10000,0xA10FFF,0,1,0,2);\r
215	SegRename(0xA10000,"IO");\r
216	\r
217	SegCreate(0xA11000,0xA11FFF,0,1,0,2);\r
218	SegRename(0xA11000,"Control");\r
219	\r
220	SegCreate(0xC00000,0xDFFFFF,0,1,0,2);\r
221	SegRename(0xC00000,"VDP");\r
222	\r
223	SegCreate(0xFF0000,0xFFFFFF,0,1,0,2);\r
224	SegRename(0xFF0000,"RAM");\r
225	\r
226	mdVector( );\r
227	mdHeader( );\r
228	mdAddress( );\r
229	\r
230	addr = Dword( 0x04 );\r
231	MakeName(addr,"main");\r
232	//MakeCode(addr);\r
233	MakeFunction(addr,BADADDR);\r
234	Wait( );\r
235	\r
236	addr = Dword( 0x68 );\r
237	MakeName(addr,"EInt");\r
238	//MakeCode(addr);\r
239	MakeFunction(addr,BADADDR);\r
240	Wait( ); \r
241	\r
242	addr = Dword( 0x70 );\r
243	MakeName(addr,"HInt");\r
244	//MakeCode(addr);\r
245	MakeFunction(addr,BADADDR);\r
246	Wait( ); \r
247	\r
248	addr = Dword( 0x78 );\r
249	MakeName(addr,"VInt");\r
250	//MakeCode(addr);\r
251	MakeFunction(addr,BADADDR);\r
252	Wait( ); \r
253	}\r