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1 | #define HOST_REGS 13 |
2 | #define HOST_CCREG 10 |
3 | #define HOST_BTREG 8 |
4 | #define EXCLUDE_REG 11 |
5 | |
6 | #define HOST_IMM8 1 |
7 | #define HAVE_CMOV_IMM 1 |
8 | #define CORTEX_A8_BRANCH_PREDICTION_HACK 1 |
9 | #define USE_MINI_HT 1 |
10 | //#define REG_PREFETCH 1 |
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11 | #define DISABLE_TLB 1 |
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12 | //#define MUPEN64 |
13 | #define FORCE32 1 |
14 | #define DISABLE_COP1 1 |
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15 | #define PCSX 1 |
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16 | |
17 | #ifdef FORCE32 |
18 | #define REG_SHIFT 2 |
19 | #else |
20 | #define REG_SHIFT 3 |
21 | #endif |
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22 | |
23 | /* ARM calling convention: |
24 | r0-r3, r12: caller-save |
25 | r4-r11: callee-save */ |
26 | |
27 | #define ARG1_REG 0 |
28 | #define ARG2_REG 1 |
29 | #define ARG3_REG 2 |
30 | #define ARG4_REG 3 |
31 | |
32 | /* GCC register naming convention: |
33 | r10 = sl (base) |
34 | r11 = fp (frame pointer) |
35 | r12 = ip (scratch) |
36 | r13 = sp (stack pointer) |
37 | r14 = lr (link register) |
38 | r15 = pc (program counter) */ |
39 | |
40 | #define FP 11 |
41 | #define LR 14 |
42 | #define HOST_TEMPREG 14 |
43 | |
44 | // Note: FP is set to &dynarec_local when executing generated code. |
45 | // Thus the local variables are actually global and not on the stack. |
46 | |
47 | extern char *invc_ptr; |
48 | |
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49 | #define BASE_ADDR 0x1000000 // Code generator target address |
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50 | #define TARGET_SIZE_2 24 // 2^24 = 16 megabytes |
51 | |
52 | // This is defined in linkage_arm.s, but gcc -O3 likes this better |
53 | #define rdram ((unsigned int *)0x80000000) |