a151a8d8 |
1 | diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S |
37387d8b |
2 | index 1d8cefa..528929f 100644 |
a151a8d8 |
3 | --- a/libpcsxcore/new_dynarec/linkage_arm.S |
4 | +++ b/libpcsxcore/new_dynarec/linkage_arm.S |
37387d8b |
5 | @@ -438,7 +438,7 @@ FUNCTION(cc_interrupt): |
a151a8d8 |
6 | str r1, [fp, #LO_pending_exception] |
7 | and r2, r2, r10, lsr #17 |
8 | add r3, fp, #LO_restore_candidate |
9 | - str r10, [fp, #LO_cycle] /* PCSX cycles */ |
10 | +@@@ str r10, [fp, #LO_cycle] /* PCSX cycles */ |
11 | @@ str r10, [fp, #LO_reg_cop0+36] /* Count */ |
12 | ldr r4, [r2, r3] |
13 | mov r10, lr |
37387d8b |
14 | @@ -528,7 +528,7 @@ FUNCTION(new_dyna_leave): |
a151a8d8 |
15 | ldr r0, [fp, #LO_last_count] |
16 | add r12, fp, #28 |
17 | add r10, r0, r10 |
18 | - str r10, [fp, #LO_cycle] |
19 | +@@@ str r10, [fp, #LO_cycle] |
20 | ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc} |
21 | .size new_dyna_leave, .-new_dyna_leave |
22 | |
37387d8b |
23 | @@ -645,7 +645,7 @@ FUNCTION(new_dyna_start): |
a151a8d8 |
24 | \readop r0, [r1, r3, lsl #\tab_shift] |
25 | .endif |
26 | movcc pc, lr |
27 | - str r2, [fp, #LO_cycle] |
28 | +@@@ str r2, [fp, #LO_cycle] |
29 | bx r1 |
30 | .endm |
31 | |
37387d8b |
32 | @@ -680,7 +680,7 @@ FUNCTION(jump_handler_read32): |
a151a8d8 |
33 | mov r0, r1 |
34 | add r2, r2, r12 |
35 | push {r2, lr} |
36 | - str r2, [fp, #LO_cycle] |
37 | +@@@ str r2, [fp, #LO_cycle] |
38 | blx r3 |
39 | |
40 | ldr r0, [fp, #LO_next_interupt] |
37387d8b |
41 | @@ -708,7 +708,7 @@ FUNCTION(jump_handler_write_h): |
a151a8d8 |
42 | add r2, r2, r12 |
43 | mov r0, r1 |
44 | push {r2, lr} |
45 | - str r2, [fp, #LO_cycle] |
46 | +@@@ str r2, [fp, #LO_cycle] |
47 | blx r3 |
48 | |
49 | ldr r0, [fp, #LO_next_interupt] |
d1e4ebd9 |
50 | diff --git a/libpcsxcore/new_dynarec/linkage_arm64.S b/libpcsxcore/new_dynarec/linkage_arm64.S |
37387d8b |
51 | index 7df82b4..79298e4 100644 |
d1e4ebd9 |
52 | --- a/libpcsxcore/new_dynarec/linkage_arm64.S |
53 | +++ b/libpcsxcore/new_dynarec/linkage_arm64.S |
37387d8b |
54 | @@ -123,7 +123,7 @@ FUNCTION(cc_interrupt): |
d1e4ebd9 |
55 | str wzr, [rFP, #LO_pending_exception] |
56 | and w2, w2, rCC, lsr #17 |
57 | add x3, rFP, #LO_restore_candidate |
58 | - str rCC, [rFP, #LO_cycle] /* PCSX cycles */ |
59 | +## str rCC, [rFP, #LO_cycle] /* PCSX cycles */ |
60 | # str rCC, [rFP, #LO_reg_cop0+36] /* Count */ |
61 | ldr w19, [x3, w2, uxtw] |
62 | mov x21, lr |
37387d8b |
63 | @@ -231,7 +231,7 @@ FUNCTION(new_dyna_start): |
d1e4ebd9 |
64 | FUNCTION(new_dyna_leave): |
65 | ldr w0, [rFP, #LO_last_count] |
66 | add rCC, rCC, w0 |
67 | - str rCC, [rFP, #LO_cycle] |
68 | +## str rCC, [rFP, #LO_cycle] |
69 | ldp x19, x20, [sp, #16*1] |
70 | ldp x21, x22, [sp, #16*2] |
71 | ldp x23, x24, [sp, #16*3] |
37387d8b |
72 | @@ -249,7 +249,7 @@ FUNCTION(new_dyna_leave): |
d1e4ebd9 |
73 | /* w0 = adddr/data, x1 = rhandler, w2 = cycles, x3 = whandler */ |
74 | ldr w4, [rFP, #LO_last_count] |
75 | add w4, w4, w2 |
76 | - str w4, [rFP, #LO_cycle] |
77 | +## str w4, [rFP, #LO_cycle] |
78 | .endm |
79 | |
80 | .macro memhandler_post |
a151a8d8 |
81 | diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c |
37387d8b |
82 | index 2f77516..21481bc 100644 |
a151a8d8 |
83 | --- a/libpcsxcore/new_dynarec/new_dynarec.c |
84 | +++ b/libpcsxcore/new_dynarec/new_dynarec.c |
37387d8b |
85 | @@ -521,6 +521,9 @@ static int doesnt_expire_soon(void *tcaddr) |
a151a8d8 |
86 | // This is called from the recompiled JR/JALR instructions |
d1e4ebd9 |
87 | void noinline *get_addr(u_int vaddr) |
a151a8d8 |
88 | { |
89 | +#ifdef DRC_DBG |
90 | +printf("get_addr %08x, pc=%08x\n", vaddr, psxRegs.pc); |
91 | +#endif |
92 | u_int page=get_page(vaddr); |
93 | u_int vpage=get_vpage(vaddr); |
94 | struct ll_entry *head; |
37387d8b |
95 | @@ -4790,13 +4793,15 @@ void do_cc(int i,signed char i_regmap[],int *adj,int addr,int taken,int invert) |
96 | #endif |
a151a8d8 |
97 | emit_addimm_and_set_flags(cycles,HOST_CCREG); |
d1e4ebd9 |
98 | jaddr=out; |
a151a8d8 |
99 | - emit_jns(0); |
d1e4ebd9 |
100 | + //emit_jns(0); |
101 | + emit_jmp(0); |
a151a8d8 |
102 | } |
103 | else |
104 | { |
105 | emit_cmpimm(HOST_CCREG,-CLOCK_ADJUST(count+2)); |
d1e4ebd9 |
106 | jaddr=out; |
a151a8d8 |
107 | - emit_jns(0); |
d1e4ebd9 |
108 | + //emit_jns(0); |
109 | + emit_jmp(0); |
a151a8d8 |
110 | } |
d1e4ebd9 |
111 | add_stub(CC_STUB,jaddr,idle?idle:out,(*adj==0||invert||idle)?0:(count+2),i,addr,taken,0); |
a151a8d8 |
112 | } |
37387d8b |
113 | @@ -5204,7 +5209,8 @@ static void rjump_assemble(int i,struct regstat *i_regs) |
a151a8d8 |
114 | // special case for RFE |
115 | emit_jmp(0); |
116 | else |
117 | - emit_jns(0); |
118 | + //emit_jns(0); |
d1e4ebd9 |
119 | + emit_jmp(0); |
120 | //load_regs_bt(branch_regs[i].regmap,branch_regs[i].dirty,-1); |
a151a8d8 |
121 | #ifdef USE_MINI_HT |
37387d8b |
122 | if(dops[i].rs1==31) { |
123 | @@ -5309,7 +5315,8 @@ static void cjump_assemble(int i,struct regstat *i_regs) |
a151a8d8 |
124 | else if(nop) { |
125 | emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),cc); |
d1e4ebd9 |
126 | void *jaddr=out; |
a151a8d8 |
127 | - emit_jns(0); |
d1e4ebd9 |
128 | + //emit_jns(0); |
129 | + emit_jmp(0); |
130 | add_stub(CC_STUB,jaddr,out,0,i,start+i*4+8,NOTTAKEN,0); |
a151a8d8 |
131 | } |
132 | else { |
37387d8b |
133 | @@ -5496,7 +5503,8 @@ static void cjump_assemble(int i,struct regstat *i_regs) |
a151a8d8 |
134 | emit_loadreg(CCREG,HOST_CCREG); |
135 | emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),HOST_CCREG); |
d1e4ebd9 |
136 | void *jaddr=out; |
a151a8d8 |
137 | - emit_jns(0); |
d1e4ebd9 |
138 | + //emit_jns(0); |
139 | + emit_jmp(0); |
140 | add_stub(CC_STUB,jaddr,out,0,i,start+i*4+8,NOTTAKEN,0); |
a151a8d8 |
141 | emit_storereg(CCREG,HOST_CCREG); |
142 | } |
37387d8b |
143 | @@ -5505,7 +5513,8 @@ static void cjump_assemble(int i,struct regstat *i_regs) |
a151a8d8 |
144 | assert(cc==HOST_CCREG); |
145 | emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),cc); |
d1e4ebd9 |
146 | void *jaddr=out; |
a151a8d8 |
147 | - emit_jns(0); |
d1e4ebd9 |
148 | + //emit_jns(0); |
149 | + emit_jmp(0); |
37387d8b |
150 | add_stub(CC_STUB,jaddr,out,0,i,start+i*4+8,NOTTAKEN,0); |
a151a8d8 |
151 | } |
152 | } |
37387d8b |
153 | @@ -5607,7 +5616,8 @@ static void sjump_assemble(int i,struct regstat *i_regs) |
a151a8d8 |
154 | else if(nevertaken) { |
155 | emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),cc); |
d1e4ebd9 |
156 | void *jaddr=out; |
a151a8d8 |
157 | - emit_jns(0); |
d1e4ebd9 |
158 | + //emit_jns(0); |
159 | + emit_jmp(0); |
160 | add_stub(CC_STUB,jaddr,out,0,i,start+i*4+8,NOTTAKEN,0); |
a151a8d8 |
161 | } |
162 | else { |
37387d8b |
163 | @@ -5763,7 +5773,8 @@ static void sjump_assemble(int i,struct regstat *i_regs) |
a151a8d8 |
164 | emit_loadreg(CCREG,HOST_CCREG); |
165 | emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),HOST_CCREG); |
d1e4ebd9 |
166 | void *jaddr=out; |
a151a8d8 |
167 | - emit_jns(0); |
d1e4ebd9 |
168 | + //emit_jns(0); |
169 | + emit_jmp(0); |
170 | add_stub(CC_STUB,jaddr,out,0,i,start+i*4+8,NOTTAKEN,0); |
a151a8d8 |
171 | emit_storereg(CCREG,HOST_CCREG); |
172 | } |
37387d8b |
173 | @@ -5772,7 +5783,8 @@ static void sjump_assemble(int i,struct regstat *i_regs) |
a151a8d8 |
174 | assert(cc==HOST_CCREG); |
175 | emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),cc); |
d1e4ebd9 |
176 | void *jaddr=out; |
a151a8d8 |
177 | - emit_jns(0); |
d1e4ebd9 |
178 | + //emit_jns(0); |
179 | + emit_jmp(0); |
37387d8b |
180 | add_stub(CC_STUB,jaddr,out,0,i,start+i*4+8,NOTTAKEN,0); |
a151a8d8 |
181 | } |
182 | } |
37387d8b |
183 | @@ -6211,7 +6223,7 @@ void unneeded_registers(int istart,int iend,int r) |
a151a8d8 |
184 | // R0 is always unneeded |
d1e4ebd9 |
185 | u|=1; |
a151a8d8 |
186 | // Save it |
187 | - unneeded_reg[i]=u; |
188 | + unneeded_reg[i]=1;//u; |
a151a8d8 |
189 | gte_unneeded[i]=gte_u; |
190 | /* |
d1e4ebd9 |
191 | printf("ur (%d,%d) %x: ",istart,iend,start+i*4); |
37387d8b |
192 | @@ -8756,6 +8768,7 @@ int new_recompile_block(u_int addr) |
a151a8d8 |
193 | |
194 | // This allocates registers (if possible) one instruction prior |
195 | // to use, which can avoid a load-use penalty on certain CPUs. |
196 | +#if 0 |
197 | for(i=0;i<slen-1;i++) |
198 | { |
37387d8b |
199 | if (!i || !dops[i-1].is_jump) |
200 | @@ -8912,6 +8925,7 @@ int new_recompile_block(u_int addr) |
a151a8d8 |
201 | } |
202 | } |
203 | } |
204 | +#endif |
205 | |
206 | /* Pass 6 - Optimize clean/dirty state */ |
207 | clean_registers(0,slen-1,1); |
37387d8b |
208 | @@ -9217,6 +9231,11 @@ int new_recompile_block(u_int addr) |
a151a8d8 |
209 | case SPAN: |
210 | pagespan_assemble(i,®s[i]);break; |
211 | } |
a151a8d8 |
212 | +#ifdef DRC_DBG |
37387d8b |
213 | + // write-out non-consts, consts are likely different because of get_final_value() |
214 | + if (!dops[i].is_jump) |
215 | + wb_dirtys(regs[i].regmap,regs[i].dirty&~regs[i].loadedconst); |
a151a8d8 |
216 | +#endif |
37387d8b |
217 | if (dops[i].is_ujump) |
a151a8d8 |
218 | literal_pool(1024); |
219 | else |
37387d8b |
220 | @@ -9451,6 +9470,10 @@ int new_recompile_block(u_int addr) |
a151a8d8 |
221 | } |
37387d8b |
222 | #ifdef ASSEM_PRINT |
223 | fflush(stdout); |
224 | +#endif |
a151a8d8 |
225 | +#ifdef DRC_DBG |
226 | +printf("new_recompile_block done\n"); |
227 | +fflush(stdout); |
37387d8b |
228 | #endif |
a151a8d8 |
229 | return 0; |
230 | } |