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ef79bbde P |
1 | /*************************************************************************** |
2 | * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team * | |
3 | * * | |
4 | * This program is free software; you can redistribute it and/or modify * | |
5 | * it under the terms of the GNU General Public License as published by * | |
6 | * the Free Software Foundation; either version 2 of the License, or * | |
7 | * (at your option) any later version. * | |
8 | * * | |
9 | * This program is distributed in the hope that it will be useful, * | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * | |
12 | * GNU General Public License for more details. * | |
13 | * * | |
14 | * You should have received a copy of the GNU General Public License * | |
15 | * along with this program; if not, write to the * | |
16 | * Free Software Foundation, Inc., * | |
17 | * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. * | |
18 | ***************************************************************************/ | |
19 | ||
20 | /* | |
21 | * R3000A CPU functions. | |
22 | */ | |
23 | ||
24 | #include "r3000a.h" | |
25 | #include "cdrom.h" | |
26 | #include "mdec.h" | |
27 | #include "gte.h" | |
630b122b | 28 | #include "psxinterpreter.h" |
dec3c1d7 | 29 | #include "../include/compiler_features.h" |
ef79bbde P |
30 | |
31 | R3000Acpu *psxCpu = NULL; | |
630b122b | 32 | #ifdef DRC_DISABLE |
93c9e42a | 33 | psxRegisters psxRegs; |
1a32b0f8 | 34 | #endif |
ef79bbde P |
35 | |
36 | int psxInit() { | |
202b29d4 | 37 | SysPrintf(_("Running PCSX Version %s (%s).\n"), PCSX_VERSION, __DATE__); |
ef79bbde | 38 | |
630b122b | 39 | #ifndef DRC_DISABLE |
ef79bbde P |
40 | if (Config.Cpu == CPU_INTERPRETER) { |
41 | psxCpu = &psxInt; | |
42 | } else psxCpu = &psxRec; | |
43 | #else | |
630b122b | 44 | Config.Cpu = CPU_INTERPRETER; |
ef79bbde P |
45 | psxCpu = &psxInt; |
46 | #endif | |
47 | ||
48 | Log = 0; | |
49 | ||
50 | if (psxMemInit() == -1) return -1; | |
51 | ||
52 | return psxCpu->Init(); | |
53 | } | |
54 | ||
55 | void psxReset() { | |
ef79bbde P |
56 | psxMemReset(); |
57 | ||
630b122b | 58 | memset(&psxRegs, 0, sizeof(psxRegs)); |
59 | ||
ef79bbde P |
60 | psxRegs.pc = 0xbfc00000; // Start in bootstrap |
61 | ||
6d79a06f | 62 | psxRegs.CP0.n.SR = 0x10600000; // COP0 enabled | BEV = 1 | TS = 1 |
63 | psxRegs.CP0.n.PRid = 0x00000002; // PRevID = Revision ID, same as R3000A | |
3807a976 | 64 | if (Config.HLE) { |
65 | psxRegs.CP0.n.SR |= 1u << 30; // COP2 enabled | |
66 | psxRegs.CP0.n.SR &= ~(1u << 22); // RAM exception vector | |
67 | } | |
ef79bbde | 68 | |
1562ed57 | 69 | psxCpu->ApplyConfig(); |
c24732c0 | 70 | psxCpu->Reset(); |
71 | ||
ef79bbde P |
72 | psxHwReset(); |
73 | psxBiosInit(); | |
74 | ||
f5f5f5dd | 75 | BiosLikeGPUSetup(); // a bit of a hack but whatever |
76 | ||
f5f5f5dd | 77 | if (!Config.HLE) { |
ef79bbde | 78 | psxExecuteBios(); |
f5f5f5dd | 79 | if (psxRegs.pc == 0x80030000 && !Config.SlowBoot) |
80 | BiosBootBypass(); | |
81 | } | |
ef79bbde P |
82 | |
83 | #ifdef EMU_LOG | |
84 | EMU_LOG("*BIOS END*\n"); | |
85 | #endif | |
86 | Log = 0; | |
87 | } | |
88 | ||
89 | void psxShutdown() { | |
ef79bbde P |
90 | psxBiosShutdown(); |
91 | ||
92 | psxCpu->Shutdown(); | |
479d58cf PC |
93 | |
94 | psxMemShutdown(); | |
ef79bbde P |
95 | } |
96 | ||
6c62131f | 97 | // cp0 is passed separately for lightrec to be less messy |
6d79a06f | 98 | void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) { |
dec3c1d7 | 99 | u32 opcode = intFakeFetch(psxRegs.pc); |
630b122b | 100 | |
8659d7fd | 101 | if (unlikely(!Config.HLE && (opcode >> 25) == 0x25)) { |
665e364a | 102 | // "hokuto no ken" / "Crash Bandicot 2" ... |
103 | // BIOS does not allow to return to GTE instructions | |
104 | // (just skips it, supposedly because it's scheduled already) | |
62656449 | 105 | // so we execute it here |
6d79a06f | 106 | psxCP2Regs *cp2 = (psxCP2Regs *)(cp0 + 1); |
dec3c1d7 | 107 | psxRegs.code = opcode; |
108 | psxCP2[opcode & 0x3f](cp2); | |
665e364a | 109 | } |
110 | ||
ef79bbde | 111 | // Set the Cause |
c41449cb | 112 | cp0->n.Cause = (bdt << 30) | (cp0->n.Cause & 0x700) | cause; |
ef79bbde P |
113 | |
114 | // Set the EPC & PC | |
6d79a06f | 115 | cp0->n.EPC = bdt ? psxRegs.pc - 4 : psxRegs.pc; |
ef79bbde | 116 | |
6d79a06f | 117 | if (cp0->n.SR & 0x400000) |
ef79bbde P |
118 | psxRegs.pc = 0xbfc00180; |
119 | else | |
120 | psxRegs.pc = 0x80000080; | |
121 | ||
6d79a06f | 122 | // Set the SR |
123 | cp0->n.SR = (cp0->n.SR & ~0x3f) | ((cp0->n.SR & 0x0f) << 2); | |
ef79bbde P |
124 | } |
125 | ||
126 | void psxBranchTest() { | |
127 | if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter) | |
128 | psxRcntUpdate(); | |
129 | ||
130 | if (psxRegs.interrupt) { | |
840639a5 | 131 | if ((psxRegs.interrupt & (1 << PSXINT_SIO))) { // sio |
d28b54b1 | 132 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) { |
133 | psxRegs.interrupt &= ~(1 << PSXINT_SIO); | |
ef79bbde P |
134 | sioInterrupt(); |
135 | } | |
136 | } | |
d28b54b1 | 137 | if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr |
138 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) { | |
139 | psxRegs.interrupt &= ~(1 << PSXINT_CDR); | |
ef79bbde P |
140 | cdrInterrupt(); |
141 | } | |
142 | } | |
d28b54b1 | 143 | if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read |
144 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) { | |
145 | psxRegs.interrupt &= ~(1 << PSXINT_CDREAD); | |
c4e62180 | 146 | cdrPlayReadInterrupt(); |
ef79bbde P |
147 | } |
148 | } | |
d28b54b1 | 149 | if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma |
150 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) { | |
151 | psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA); | |
ef79bbde P |
152 | gpuInterrupt(); |
153 | } | |
154 | } | |
d28b54b1 | 155 | if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma |
156 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) { | |
157 | psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA); | |
ef79bbde P |
158 | mdec1Interrupt(); |
159 | } | |
160 | } | |
d28b54b1 | 161 | if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma |
162 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) { | |
163 | psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA); | |
ef79bbde P |
164 | spuInterrupt(); |
165 | } | |
166 | } | |
528ad661 | 167 | if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in |
168 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) { | |
169 | psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA); | |
170 | mdec0Interrupt(); | |
171 | } | |
172 | } | |
57a757ce | 173 | if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc |
174 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) { | |
175 | psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA); | |
176 | gpuotcInterrupt(); | |
177 | } | |
178 | } | |
9f8b032d | 179 | if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom |
180 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) { | |
181 | psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA); | |
182 | cdrDmaInterrupt(); | |
183 | } | |
184 | } | |
185 | if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states | |
186 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) { | |
187 | psxRegs.interrupt &= ~(1 << PSXINT_CDRLID); | |
188 | cdrLidSeekInterrupt(); | |
189 | } | |
190 | } | |
2b30c129 | 191 | if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update |
192 | if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) { | |
193 | psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE); | |
194 | spuUpdate(); | |
195 | } | |
196 | } | |
ef79bbde P |
197 | } |
198 | ||
c41449cb | 199 | psxRegs.CP0.n.Cause &= ~0x400; |
200 | if (psxHu32(0x1070) & psxHu32(0x1074)) | |
201 | psxRegs.CP0.n.Cause |= 0x400; | |
202 | if (((psxRegs.CP0.n.Cause | 1) & psxRegs.CP0.n.SR & 0x401) == 0x401) | |
203 | psxException(0, 0, &psxRegs.CP0); | |
ef79bbde P |
204 | } |
205 | ||
206 | void psxJumpTest() { | |
207 | if (!Config.HLE && Config.PsxOut) { | |
208 | u32 call = psxRegs.GPR.n.t1 & 0xff; | |
209 | switch (psxRegs.pc & 0x1fffff) { | |
210 | case 0xa0: | |
211 | #ifdef PSXBIOS_LOG | |
212 | if (call != 0x28 && call != 0xe) { | |
213 | PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); } | |
214 | #endif | |
215 | if (biosA0[call]) | |
216 | biosA0[call](); | |
217 | break; | |
218 | case 0xb0: | |
219 | #ifdef PSXBIOS_LOG | |
220 | if (call != 0x17 && call != 0xb) { | |
221 | PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); } | |
222 | #endif | |
223 | if (biosB0[call]) | |
224 | biosB0[call](); | |
225 | break; | |
226 | case 0xc0: | |
227 | #ifdef PSXBIOS_LOG | |
228 | PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); | |
229 | #endif | |
230 | if (biosC0[call]) | |
231 | biosC0[call](); | |
232 | break; | |
233 | } | |
234 | } | |
235 | } | |
236 | ||
237 | void psxExecuteBios() { | |
f5f5f5dd | 238 | int i; |
f3bc907d | 239 | for (i = 0; i < 5000000; i++) { |
240 | psxCpu->ExecuteBlock(EXEC_CALLER_BOOT); | |
241 | if ((psxRegs.pc & 0xff800000) == 0x80000000) | |
242 | break; | |
243 | } | |
244 | if (psxRegs.pc != 0x80030000) | |
245 | SysPrintf("non-standard BIOS detected (%d, %08x)\n", i, psxRegs.pc); | |
ef79bbde P |
246 | } |
247 |