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1 | #include "../pico_int.h" |
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2 | #include "../sound/ym2612.h" |
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3 | |
4 | struct Pico32x Pico32x; |
5 | |
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6 | static void sh2_irq_cb(int id, int level) |
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7 | { |
8 | // diagnostic for now |
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9 | elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id)); |
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10 | } |
11 | |
12 | void p32x_update_irls(void) |
13 | { |
14 | int irqs, mlvl = 0, slvl = 0; |
15 | |
16 | // msh2 |
17 | irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES); |
18 | while ((irqs >>= 1)) |
19 | mlvl++; |
20 | mlvl *= 2; |
21 | |
22 | // ssh2 |
23 | irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES); |
24 | while ((irqs >>= 1)) |
25 | slvl++; |
26 | slvl *= 2; |
27 | |
28 | elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl); |
29 | sh2_irl_irq(&msh2, mlvl); |
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30 | sh2_irl_irq(&ssh2, slvl); |
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31 | mlvl = mlvl ? 1 : 0; |
32 | slvl = slvl ? 1 : 0; |
33 | p32x_poll_event(mlvl | (slvl << 1), 0); |
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34 | } |
35 | |
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36 | void Pico32xStartup(void) |
37 | { |
38 | elprintf(EL_STATUS|EL_32X, "32X startup"); |
39 | |
40 | PicoAHW |= PAHW_32X; |
41 | PicoMemSetup32x(); |
42 | |
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43 | sh2_init(&msh2, 0); |
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44 | msh2.irq_callback = sh2_irq_cb; |
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45 | sh2_reset(&msh2); |
46 | |
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47 | sh2_init(&ssh2, 1); |
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48 | ssh2.irq_callback = sh2_irq_cb; |
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49 | sh2_reset(&ssh2); |
50 | |
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51 | if (!Pico.m.pal) |
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52 | Pico32x.vdp_regs[0] |= P32XV_nPAL; |
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53 | |
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54 | emu_32x_startup(); |
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55 | } |
56 | |
57 | void Pico32xInit(void) |
58 | { |
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59 | } |
60 | |
61 | void PicoPower32x(void) |
62 | { |
63 | memset(&Pico32x, 0, sizeof(Pico32x)); |
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64 | |
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65 | Pico32x.regs[0] = 0x0082; // SH2 reset? |
66 | Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN; |
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67 | Pico32x.sh2_regs[0] = P32XS2_ADEN; |
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68 | } |
69 | |
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70 | void PicoUnload32x(void) |
71 | { |
72 | if (Pico32xMem != NULL) |
73 | free(Pico32xMem); |
74 | Pico32xMem = NULL; |
75 | |
76 | PicoAHW &= ~PAHW_32X; |
77 | } |
78 | |
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79 | void PicoReset32x(void) |
80 | { |
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81 | extern int p32x_csum_faked; |
82 | p32x_csum_faked = 0; // tmp |
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83 | } |
84 | |
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85 | static void p32x_start_blank(void) |
86 | { |
87 | // enter vblank |
88 | Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN; |
89 | |
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90 | // FB swap waits until vblank |
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91 | if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) { |
92 | Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS; |
93 | Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb; |
94 | Pico32xSwapDRAM(Pico32x.pending_fb ^ 1); |
95 | } |
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96 | |
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97 | Pico32x.sh2irqs |= P32XI_VINT; |
98 | p32x_update_irls(); |
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99 | p32x_poll_event(3, 1); |
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100 | } |
101 | |
102 | // FIXME.. |
103 | static __inline void SekRunM68k(int cyc) |
104 | { |
105 | int cyc_do; |
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106 | SekCycleAim += cyc; |
107 | if (Pico32x.emu_flags & P32XF_68KPOLL) { |
108 | SekCycleCnt = SekCycleAim; |
109 | return; |
110 | } |
111 | if ((cyc_do = SekCycleAim - SekCycleCnt) <= 0) |
112 | return; |
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113 | #if defined(EMU_CORE_DEBUG) |
114 | // this means we do run-compare |
115 | SekCycleCnt+=CM_compareRun(cyc_do, 0); |
116 | #elif defined(EMU_C68K) |
117 | PicoCpuCM68k.cycles=cyc_do; |
118 | CycloneRun(&PicoCpuCM68k); |
119 | SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles; |
120 | #elif defined(EMU_M68K) |
121 | SekCycleCnt+=m68k_execute(cyc_do); |
122 | #elif defined(EMU_F68K) |
123 | SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0); |
124 | #endif |
125 | } |
126 | |
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127 | // ~1463.8, but due to cache misses and slow mem |
128 | // it's much lower than that |
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129 | //#define SH2_LINE_CYCLES 735 |
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130 | #define CYCLES_M68K2SH2(x) ((x) * 6 / 4) |
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131 | |
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132 | #define PICO_32X |
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133 | #define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \ |
134 | SekRunM68k(m68k_cycles); \ |
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135 | if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \ |
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136 | sh2_execute(&msh2, CYCLES_M68K2SH2(m68k_cycles)); \ |
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137 | if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \ |
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138 | sh2_execute(&ssh2, CYCLES_M68K2SH2(m68k_cycles)) |
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139 | |
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140 | #define STEP_68K 24 |
141 | #define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \ |
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142 | { \ |
143 | int i; \ |
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144 | for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \ |
145 | SekRunM68k(STEP_68K); \ |
146 | if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \ |
147 | sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \ |
148 | if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \ |
149 | sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \ |
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150 | } \ |
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151 | /* last step */ \ |
152 | i = (m68k_cycles) - i; \ |
153 | SekRunM68k(i); \ |
154 | if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \ |
155 | sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \ |
156 | if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \ |
157 | sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \ |
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158 | } |
159 | |
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160 | //#define CPUS_RUN CPUS_RUN_SIMPLE |
161 | #define CPUS_RUN CPUS_RUN_LOCKSTEP |
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162 | |
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163 | #include "../pico_cmn.c" |
164 | |
165 | void PicoFrame32x(void) |
166 | { |
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167 | pwm_frame_smp_cnt = 0; |
168 | |
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169 | Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank |
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170 | if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking |
171 | Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access |
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172 | |
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173 | p32x_poll_event(3, 1); |
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174 | |
175 | PicoFrameStart(); |
176 | PicoFrameHints(); |
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177 | elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags); |
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178 | } |
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179 | |