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1 | /*\r |
2 | header file for software emulation for FM sound generator\r |
3 | \r |
4 | */\r |
5 | #ifndef _H_FM_FM_\r |
6 | #define _H_FM_FM_\r |
7 | \r |
8 | /* compiler dependence */\r |
9 | #ifndef UINT8\r |
10 | typedef unsigned char UINT8; /* unsigned 8bit */\r |
11 | typedef unsigned short UINT16; /* unsigned 16bit */\r |
12 | typedef unsigned int UINT32; /* unsigned 32bit */\r |
13 | #endif\r |
14 | #ifndef INT8\r |
15 | typedef signed char INT8; /* signed 8bit */\r |
16 | typedef signed short INT16; /* signed 16bit */\r |
17 | typedef signed int INT32; /* signed 32bit */\r |
18 | #endif\r |
19 | \r |
20 | #if 1\r |
21 | /* struct describing a single operator (SLOT) */\r |
22 | typedef struct\r |
23 | {\r |
24 | INT32 *DT; /* #0x00 detune :dt_tab[DT] */\r |
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25 | UINT8 ar; /* #0x04 attack rate */\r |
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26 | UINT8 d1r; /* #0x05 decay rate */\r |
27 | UINT8 d2r; /* #0x06 sustain rate */\r |
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28 | UINT8 rr; /* #0x07 release rate */\r |
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29 | UINT32 mul; /* #0x08 multiple :ML_TABLE[ML] */\r |
30 | \r |
31 | /* Phase Generator */\r |
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32 | UINT32 phase; /* #0x0c phase counter | need_save */\r |
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33 | UINT32 Incr; /* #0x10 phase step */\r |
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34 | \r |
35 | UINT8 KSR; /* #0x14 key scale rate :3-KSR */\r |
36 | UINT8 ksr; /* #0x15 key scale rate :kcode>>(3-KSR) */\r |
37 | \r |
38 | UINT8 key; /* #0x16 0=last key was KEY OFF, 1=KEY ON */\r |
39 | \r |
40 | /* Envelope Generator */\r |
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41 | UINT8 state; /* #0x17 phase type: EG_OFF=0, EG_REL, EG_SUS, EG_DEC, EG_ATT | need_save */\r |
42 | UINT16 tl; /* #0x18 total level: TL << 3 */\r |
43 | INT16 volume; /* #0x1a envelope counter | need_save */\r |
44 | UINT32 sl; /* #0x1c sustain level:sl_table[SL] */\r |
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45 | \r |
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46 | /* asm relies on this order: */\r |
47 | union {\r |
48 | struct {\r |
49 | UINT32 eg_pack_rr; /* #0x20 1 (release state) */\r |
50 | UINT32 eg_pack_d2r; /* #0x24 2 (sustain state) */\r |
51 | UINT32 eg_pack_d1r; /* #0x28 3 (decay state) */\r |
52 | UINT32 eg_pack_ar; /* #0x2c 4 (attack state) */\r |
53 | };\r |
54 | UINT32 eg_pack[4];\r |
55 | };\r |
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56 | } FM_SLOT;\r |
57 | \r |
58 | \r |
59 | typedef struct\r |
60 | {\r |
61 | FM_SLOT SLOT[4]; /* four SLOTs (operators) */\r |
62 | \r |
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63 | UINT8 ALGO; /* +00 algorithm */\r |
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64 | UINT8 FB; /* feedback shift */\r |
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65 | UINT8 pad[2];\r |
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66 | INT32 op1_out; /* op1 output for feedback */\r |
67 | \r |
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68 | INT32 mem_value; /* +08 delayed sample (MEM) value */\r |
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69 | \r |
70 | INT32 pms; /* channel PMS */\r |
71 | UINT8 ams; /* channel AMS */\r |
72 | \r |
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73 | UINT8 kcode; /* +11 key code: */\r |
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74 | UINT8 fn_h; /* freq latch */\r |
75 | UINT8 pad2;\r |
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76 | UINT32 fc; /* fnum,blk:adjusted to sample rate */\r |
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77 | UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */\r |
78 | \r |
79 | /* LFO */\r |
80 | UINT8 AMmasks; /* AM enable flag */\r |
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81 | UINT8 pad3[3];\r |
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82 | } FM_CH;\r |
83 | \r |
84 | typedef struct\r |
85 | {\r |
86 | int clock; /* master clock (Hz) */\r |
87 | int rate; /* sampling rate (Hz) */\r |
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88 | double freqbase; /* 08 frequency base */\r |
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89 | UINT8 address; /* 10 address register | need_save */\r |
90 | UINT8 status; /* 11 status flag | need_save */\r |
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91 | UINT8 mode; /* mode CSM / 3SLOT */\r |
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92 | UINT8 pad;\r |
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93 | int TA; /* timer a */\r |
94 | int TAC; /* timer a maxval */\r |
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95 | int TAT; /* timer a ticker | need_save */\r |
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96 | UINT8 TB; /* timer b */\r |
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97 | UINT8 pad2[3];\r |
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98 | int TBC; /* timer b maxval */\r |
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99 | int TBT; /* timer b ticker | need_save */\r |
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100 | /* local time tables */\r |
101 | INT32 dt_tab[8][32];/* DeTune table */\r |
102 | } FM_ST;\r |
103 | \r |
104 | /***********************************************************/\r |
105 | /* OPN unit */\r |
106 | /***********************************************************/\r |
107 | \r |
108 | /* OPN 3slot struct */\r |
109 | typedef struct\r |
110 | {\r |
111 | UINT32 fc[3]; /* fnum3,blk3: calculated */\r |
112 | UINT8 fn_h; /* freq3 latch */\r |
113 | UINT8 kcode[3]; /* key code */\r |
114 | UINT32 block_fnum[3]; /* current fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */\r |
115 | } FM_3SLOT;\r |
116 | \r |
117 | /* OPN/A/B common state */\r |
118 | typedef struct\r |
119 | {\r |
120 | FM_ST ST; /* general state */\r |
121 | FM_3SLOT SL3; /* 3 slot mode state */\r |
122 | UINT32 pan; /* fm channels output mask (bit 1 = enable) */\r |
123 | \r |
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124 | UINT32 eg_cnt; /* global envelope generator counter | need_save */\r |
125 | UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 | need_save */\r |
126 | UINT32 eg_timer_add; /* step of eg_timer */\r |
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127 | \r |
128 | /* LFO */\r |
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129 | UINT32 lfo_cnt; /* need_save */\r |
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130 | UINT32 lfo_inc;\r |
131 | \r |
132 | UINT32 lfo_freq[8]; /* LFO FREQ table */\r |
133 | } FM_OPN;\r |
134 | \r |
135 | /* here's the virtual YM2612 */\r |
136 | typedef struct\r |
137 | {\r |
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138 | UINT8 REGS[0x200]; /* registers (for save states) */\r |
139 | INT32 addr_A1; /* address line A1 | need_save */\r |
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140 | \r |
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141 | FM_CH CH[6]; /* channel state */\r |
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142 | \r |
143 | /* dac output (YM2612) */\r |
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144 | int dacen;\r |
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145 | INT32 dacout;\r |
146 | \r |
147 | FM_OPN OPN; /* OPN state */\r |
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148 | \r |
149 | UINT32 slot_mask; /* active slot mask (performance hack) */\r |
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150 | } YM2612;\r |
151 | #endif\r |
152 | \r |
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153 | #ifndef EXTERNAL_YM2612\r |
154 | extern YM2612 ym2612;\r |
155 | #endif\r |
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156 | \r |
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157 | void YM2612Init_(int baseclock, int rate);\r |
158 | void YM2612ResetChip_(void);\r |
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159 | int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty);\r |
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160 | \r |
161 | int YM2612Write_(unsigned int a, unsigned int v);\r |
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162 | //unsigned char YM2612Read_(void);\r |
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163 | \r |
164 | int YM2612PicoTick_(int n);\r |
165 | void YM2612PicoStateLoad_(void);\r |
166 | \r |
167 | void *YM2612GetRegs(void);\r |
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168 | void YM2612PicoStateSave2(int tat, int tbt);\r |
169 | int YM2612PicoStateLoad2(int *tat, int *tbt);\r |
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170 | \r |
171 | #ifndef __GP2X__\r |
172 | #define YM2612Init YM2612Init_\r |
173 | #define YM2612ResetChip YM2612ResetChip_\r |
174 | #define YM2612UpdateOne YM2612UpdateOne_\r |
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175 | #define YM2612PicoStateLoad YM2612PicoStateLoad_\r |
176 | #else\r |
177 | /* GP2X specific */\r |
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178 | #include "../../platform/gp2x/940ctl.h"\r |
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179 | extern int PicoIn.opt;\r |
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180 | #define YM2612Init(baseclock,rate) { \\r |
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181 | if (PicoIn.opt&0x200) YM2612Init_940(baseclock, rate); \\r |
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182 | else YM2612Init_(baseclock, rate); \\r |
183 | }\r |
184 | #define YM2612ResetChip() { \\r |
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185 | if (PicoIn.opt&0x200) YM2612ResetChip_940(); \\r |
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186 | else YM2612ResetChip_(); \\r |
187 | }\r |
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188 | #define YM2612UpdateOne(buffer,length,stereo,is_buf_empty) \\r |
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189 | (PicoIn.opt&0x200) ? YM2612UpdateOne_940(buffer, length, stereo, is_buf_empty) : \\r |
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190 | YM2612UpdateOne_(buffer, length, stereo, is_buf_empty);\r |
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191 | #define YM2612PicoStateLoad() { \\r |
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192 | if (PicoIn.opt&0x200) YM2612PicoStateLoad_940(); \\r |
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193 | else YM2612PicoStateLoad_(); \\r |
194 | }\r |
195 | #endif /* __GP2X__ */\r |
196 | \r |
197 | \r |
198 | #endif /* _H_FM_FM_ */\r |