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1 | /*\r |
2 | header file for software emulation for FM sound generator\r |
3 | \r |
4 | */\r |
5 | #ifndef _H_FM_FM_\r |
6 | #define _H_FM_FM_\r |
7 | \r |
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8 | #include <stdlib.h>\r |
9 | \r |
10 | #define DAC_SHIFT 6\r |
11 | \r |
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12 | /* compiler dependence */\r |
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13 | #include "../pico_types.h"\r |
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14 | #ifndef UINT8\r |
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15 | typedef u8 UINT8; /* unsigned 8bit */\r |
16 | typedef u16 UINT16; /* unsigned 16bit */\r |
17 | typedef u32 UINT32; /* unsigned 32bit */\r |
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18 | #endif\r |
19 | #ifndef INT8\r |
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20 | typedef s8 INT8; /* signed 8bit */\r |
21 | typedef s16 INT16; /* signed 16bit */\r |
22 | typedef s32 INT32; /* signed 32bit */\r |
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23 | #endif\r |
24 | \r |
25 | #if 1\r |
26 | /* struct describing a single operator (SLOT) */\r |
27 | typedef struct\r |
28 | {\r |
29 | INT32 *DT; /* #0x00 detune :dt_tab[DT] */\r |
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30 | UINT8 ar; /* #0x04 attack rate */\r |
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31 | UINT8 d1r; /* #0x05 decay rate */\r |
32 | UINT8 d2r; /* #0x06 sustain rate */\r |
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33 | UINT8 rr; /* #0x07 release rate */\r |
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34 | UINT32 mul; /* #0x08 multiple :ML_TABLE[ML] */\r |
35 | \r |
36 | /* Phase Generator */\r |
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37 | UINT32 phase; /* #0x0c phase counter | need_save */\r |
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38 | UINT32 Incr; /* #0x10 phase step */\r |
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39 | \r |
40 | UINT8 KSR; /* #0x14 key scale rate :3-KSR */\r |
41 | UINT8 ksr; /* #0x15 key scale rate :kcode>>(3-KSR) */\r |
42 | \r |
43 | UINT8 key; /* #0x16 0=last key was KEY OFF, 1=KEY ON */\r |
44 | \r |
45 | /* Envelope Generator */\r |
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46 | UINT8 state; /* #0x17 phase type: EG_OFF=0, EG_REL, EG_SUS, EG_DEC, EG_ATT | need_save */\r |
47 | UINT16 tl; /* #0x18 total level: TL << 3 */\r |
48 | INT16 volume; /* #0x1a envelope counter | need_save */\r |
49 | UINT32 sl; /* #0x1c sustain level:sl_table[SL] */\r |
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50 | \r |
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51 | /* asm relies on this order: */\r |
52 | union {\r |
53 | struct {\r |
54 | UINT32 eg_pack_rr; /* #0x20 1 (release state) */\r |
55 | UINT32 eg_pack_d2r; /* #0x24 2 (sustain state) */\r |
56 | UINT32 eg_pack_d1r; /* #0x28 3 (decay state) */\r |
57 | UINT32 eg_pack_ar; /* #0x2c 4 (attack state) */\r |
58 | };\r |
59 | UINT32 eg_pack[4];\r |
60 | };\r |
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61 | \r |
62 | UINT8 ssg; /* 0x30 SSG-EG waveform */\r |
63 | UINT8 ssgn;\r |
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64 | UINT16 ar_ksr; /* 0x32 ar+ksr */\r |
65 | UINT16 vol_out; /* 0x34 current output from EG (without LFO) */\r |
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66 | UINT16 pad;\r |
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67 | } FM_SLOT;\r |
68 | \r |
69 | \r |
70 | typedef struct\r |
71 | {\r |
72 | FM_SLOT SLOT[4]; /* four SLOTs (operators) */\r |
73 | \r |
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74 | UINT8 ALGO; /* +00 algorithm */\r |
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75 | UINT8 FB; /* feedback shift */\r |
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76 | UINT8 pad[2];\r |
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77 | INT32 op1_out; /* op1 output for feedback */\r |
78 | \r |
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79 | INT32 mem_value; /* +08 delayed sample (MEM) value */\r |
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80 | \r |
81 | INT32 pms; /* channel PMS */\r |
82 | UINT8 ams; /* channel AMS */\r |
83 | \r |
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84 | UINT8 kcode; /* +11 key code: */\r |
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85 | UINT8 pad2;\r |
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86 | UINT8 upd_cnt; /* eg update counter */\r |
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87 | UINT32 fc; /* fnum,blk:adjusted to sample rate */\r |
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88 | UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */\r |
89 | \r |
90 | /* LFO */\r |
91 | UINT8 AMmasks; /* AM enable flag */\r |
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92 | UINT8 pad3[3];\r |
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93 | } FM_CH;\r |
94 | \r |
95 | typedef struct\r |
96 | {\r |
97 | int clock; /* master clock (Hz) */\r |
98 | int rate; /* sampling rate (Hz) */\r |
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99 | double freqbase; /* 08 frequency base */\r |
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100 | UINT8 address; /* 10 address register | need_save */\r |
101 | UINT8 status; /* 11 status flag | need_save */\r |
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102 | UINT8 mode; /* mode CSM / 3SLOT */\r |
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103 | UINT8 flags; /* operational flags */\r |
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104 | int TA; /* timer a */\r |
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105 | //int TAC; /* timer a maxval */\r |
106 | //int TAT; /* timer a ticker | need_save */\r |
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107 | UINT8 TB; /* timer b */\r |
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108 | UINT8 fn_h; /* freq latch */\r |
109 | UINT8 pad2[2];\r |
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110 | //int TBC; /* timer b maxval */\r |
111 | //int TBT; /* timer b ticker | need_save */\r |
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112 | /* local time tables */\r |
113 | INT32 dt_tab[8][32];/* DeTune table */\r |
114 | } FM_ST;\r |
115 | \r |
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116 | #define ST_SSG 1\r |
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117 | #define ST_DAC 2\r |
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118 | \r |
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119 | /***********************************************************/\r |
120 | /* OPN unit */\r |
121 | /***********************************************************/\r |
122 | \r |
123 | /* OPN 3slot struct */\r |
124 | typedef struct\r |
125 | {\r |
126 | UINT32 fc[3]; /* fnum3,blk3: calculated */\r |
127 | UINT8 fn_h; /* freq3 latch */\r |
128 | UINT8 kcode[3]; /* key code */\r |
129 | UINT32 block_fnum[3]; /* current fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */\r |
130 | } FM_3SLOT;\r |
131 | \r |
132 | /* OPN/A/B common state */\r |
133 | typedef struct\r |
134 | {\r |
135 | FM_ST ST; /* general state */\r |
136 | FM_3SLOT SL3; /* 3 slot mode state */\r |
137 | UINT32 pan; /* fm channels output mask (bit 1 = enable) */\r |
138 | \r |
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139 | UINT32 eg_cnt; /* global envelope generator counter | need_save */\r |
140 | UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 | need_save */\r |
141 | UINT32 eg_timer_add; /* step of eg_timer */\r |
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142 | \r |
143 | /* LFO */\r |
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144 | UINT32 lfo_cnt; /* need_save */\r |
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145 | UINT32 lfo_inc;\r |
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146 | UINT32 lfo_ampm;\r |
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147 | \r |
148 | UINT32 lfo_freq[8]; /* LFO FREQ table */\r |
149 | } FM_OPN;\r |
150 | \r |
151 | /* here's the virtual YM2612 */\r |
152 | typedef struct\r |
153 | {\r |
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154 | UINT8 REGS[0x200]; /* registers (for old save states) */\r |
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155 | INT32 addr_A1; /* address line A1 | need_save */\r |
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156 | \r |
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157 | FM_CH CH[6]; /* channel state */\r |
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158 | \r |
159 | /* dac output (YM2612) */\r |
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160 | int dacen;\r |
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161 | INT32 dacout;\r |
162 | \r |
163 | FM_OPN OPN; /* OPN state */\r |
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164 | \r |
165 | UINT32 slot_mask; /* active slot mask (performance hack) */\r |
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166 | UINT32 ssg_mask; /* active ssg mask (performance hack) */\r |
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167 | } YM2612;\r |
168 | #endif\r |
169 | \r |
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170 | #ifndef EXTERNAL_YM2612\r |
171 | extern YM2612 ym2612;\r |
172 | #endif\r |
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173 | \r |
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174 | void YM2612Init_(int baseclock, int rate, int flags);\r |
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175 | void YM2612ResetChip_(void);\r |
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176 | int YM2612UpdateOne_(s32 *buffer, int length, int stereo, int is_buf_empty);\r |
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177 | \r |
178 | int YM2612Write_(unsigned int a, unsigned int v);\r |
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179 | //unsigned char YM2612Read_(void);\r |
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180 | \r |
181 | int YM2612PicoTick_(int n);\r |
182 | void YM2612PicoStateLoad_(void);\r |
183 | \r |
184 | void *YM2612GetRegs(void);\r |
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185 | int YM2612PicoStateLoad2(int *tat, int *tbt, int *busy);\r |
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186 | void YM2612PicoStateSave2(int tat, int tbt, int busy);\r |
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187 | size_t YM2612PicoStateSave3(void *buf_, size_t size);\r |
188 | void YM2612PicoStateLoad3(const void *buf_, size_t size);\r |
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189 | \r |
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190 | /* NB must be macros for compiling GP2X 940 code */\r |
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191 | #ifndef __GP2X__\r |
192 | #define YM2612Init YM2612Init_\r |
193 | #define YM2612ResetChip YM2612ResetChip_\r |
194 | #define YM2612UpdateOne YM2612UpdateOne_\r |
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195 | #define YM2612PicoStateLoad YM2612PicoStateLoad_\r |
196 | #else\r |
197 | /* GP2X specific */\r |
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198 | #include <platform/gp2x/940ctl.h>\r |
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199 | #define YM2612Init(baseclock, rate, flags) \\r |
200 | (PicoIn.opt & POPT_EXT_FM ? YM2612Init_940 : YM2612Init_)(baseclock, rate, flags)\r |
201 | #define YM2612ResetChip() \\r |
202 | (PicoIn.opt & POPT_EXT_FM ? YM2612ResetChip_940 : YM2612ResetChip_)()\r |
203 | #define YM2612PicoStateLoad() \\r |
204 | (PicoIn.opt & POPT_EXT_FM ? YM2612PicoStateLoad_940 : YM2612PicoStateLoad_)()\r |
205 | #define YM2612UpdateOne(buffer, length, sterao, isempty) \\r |
206 | (PicoIn.opt & POPT_EXT_FM ? YM2612UpdateOne_940 : YM2612UpdateOne_)(buffer, length, stereo, isempty)\r |
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207 | #endif /* __GP2X__ */\r |
208 | \r |
209 | \r |
210 | #endif /* _H_FM_FM_ */\r |