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ef79bbde P |
1 | /***************************************************************************\r |
2 | freeze.c - description\r | |
3 | -------------------\r | |
4 | begin : Wed May 15 2002\r | |
5 | copyright : (C) 2002 by Pete Bernert\r | |
6 | email : BlackDove@addcom.de\r | |
7 | ***************************************************************************/\r | |
8 | /***************************************************************************\r | |
9 | * *\r | |
10 | * This program is free software; you can redistribute it and/or modify *\r | |
11 | * it under the terms of the GNU General Public License as published by *\r | |
12 | * the Free Software Foundation; either version 2 of the License, or *\r | |
13 | * (at your option) any later version. See also the license.txt file for *\r | |
14 | * additional informations. *\r | |
15 | * *\r | |
16 | ***************************************************************************/\r | |
17 | \r | |
18 | #include "stdafx.h"\r | |
19 | \r | |
20 | #define _IN_FREEZE\r | |
21 | \r | |
22 | #include "externals.h"\r | |
23 | #include "registers.h"\r | |
24 | #include "spu.h"\r | |
ef79bbde P |
25 | \r |
26 | ////////////////////////////////////////////////////////////////////////\r | |
27 | // freeze structs\r | |
28 | ////////////////////////////////////////////////////////////////////////\r | |
29 | \r | |
c668f248 | 30 | typedef struct\r |
31 | {\r | |
32 | int AttackModeExp;\r | |
33 | int AttackTime;\r | |
34 | int DecayTime;\r | |
35 | int SustainLevel;\r | |
36 | int SustainModeExp;\r | |
37 | int SustainModeDec;\r | |
38 | int SustainTime;\r | |
39 | int ReleaseModeExp;\r | |
40 | unsigned int ReleaseVal;\r | |
41 | int ReleaseTime;\r | |
42 | int ReleaseStartTime; \r | |
43 | int ReleaseVol; \r | |
44 | int lTime;\r | |
45 | int lVolume;\r | |
46 | } ADSRInfo;\r | |
47 | \r | |
6d866bb7 | 48 | typedef struct\r |
49 | {\r | |
50 | int State;\r | |
51 | int AttackModeExp;\r | |
52 | int AttackRate;\r | |
53 | int DecayRate;\r | |
54 | int SustainLevel;\r | |
55 | int SustainModeExp;\r | |
56 | int SustainIncrease;\r | |
57 | int SustainRate;\r | |
58 | int ReleaseModeExp;\r | |
59 | int ReleaseRate;\r | |
60 | int EnvelopeVol;\r | |
c668f248 | 61 | int lVolume;\r |
62 | int lDummy1;\r | |
63 | int lDummy2;\r | |
6d866bb7 | 64 | } ADSRInfoEx_orig;\r |
65 | \r | |
66 | typedef struct\r | |
67 | {\r | |
68 | // no mutexes used anymore... don't need them to sync access\r | |
69 | //HANDLE hMutex;\r | |
70 | \r | |
71 | int bNew; // start flag\r | |
72 | \r | |
73 | int iSBPos; // mixing stuff\r | |
74 | int spos;\r | |
75 | int sinc;\r | |
76 | int SB[32+32]; // Pete added another 32 dwords in 1.6 ... prevents overflow issues with gaussian/cubic interpolation (thanx xodnizel!), and can be used for even better interpolations, eh? :)\r | |
77 | int sval;\r | |
78 | \r | |
8e1040b6 | 79 | int iStart; // start ptr into sound mem\r |
80 | int iCurr; // current pos in sound mem\r | |
81 | int iLoop; // loop ptr in sound mem\r | |
6d866bb7 | 82 | \r |
83 | int bOn; // is channel active (sample playing?)\r | |
84 | int bStop; // is channel stopped (sample _can_ still be playing, ADSR Release phase)\r | |
85 | int bReverb; // can we do reverb on this channel? must have ctrl register bit, to get active\r | |
86 | int iActFreq; // current psx pitch\r | |
87 | int iUsedFreq; // current pc pitch\r | |
88 | int iLeftVolume; // left volume\r | |
89 | int iLeftVolRaw; // left psx volume value\r | |
90 | int bIgnoreLoop; // ignore loop bit, if an external loop address is used\r | |
91 | int iMute; // mute mode\r | |
92 | int iRightVolume; // right volume\r | |
93 | int iRightVolRaw; // right psx volume value\r | |
94 | int iRawPitch; // raw pitch (0...3fff)\r | |
95 | int iIrqDone; // debug irq done flag\r | |
96 | int s_1; // last decoding infos\r | |
97 | int s_2;\r | |
98 | int bRVBActive; // reverb active flag\r | |
99 | int iRVBOffset; // reverb offset\r | |
100 | int iRVBRepeat; // reverb repeat\r | |
101 | int bNoise; // noise active flag\r | |
102 | int bFMod; // freq mod (0=off, 1=sound channel, 2=freq channel)\r | |
103 | int iRVBNum; // another reverb helper\r | |
104 | int iOldNoise; // old noise val for this channel \r | |
105 | ADSRInfo ADSR; // active ADSR settings\r | |
106 | ADSRInfoEx_orig ADSRX; // next ADSR settings (will be moved to active on sample start)\r | |
107 | } SPUCHAN_orig;\r | |
108 | \r | |
ef79bbde P |
109 | typedef struct\r |
110 | {\r | |
111 | char szSPUName[8];\r | |
112 | uint32_t ulFreezeVersion;\r | |
113 | uint32_t ulFreezeSize;\r | |
114 | unsigned char cSPUPort[0x200];\r | |
115 | unsigned char cSPURam[0x80000];\r | |
116 | xa_decode_t xaS; \r | |
117 | } SPUFreeze_t;\r | |
118 | \r | |
119 | typedef struct\r | |
120 | {\r | |
121 | unsigned short spuIrq;\r | |
0ad5d4a1 | 122 | unsigned short decode_pos;\r |
ef79bbde P |
123 | uint32_t pSpuIrq;\r |
124 | uint32_t spuAddr;\r | |
125 | uint32_t dummy1;\r | |
126 | uint32_t dummy2;\r | |
127 | uint32_t dummy3;\r | |
128 | \r | |
6d866bb7 | 129 | SPUCHAN_orig s_chan[MAXCHAN]; \r |
ef79bbde P |
130 | \r |
131 | } SPUOSSFreeze_t;\r | |
132 | \r | |
133 | ////////////////////////////////////////////////////////////////////////\r | |
134 | \r | |
135 | void LoadStateV5(SPUFreeze_t * pF); // newest version\r | |
650adfd2 | 136 | void LoadStateUnknown(SPUFreeze_t * pF, uint32_t cycles); // unknown format\r |
ef79bbde | 137 | \r |
6d866bb7 | 138 | // we want to retain compatibility between versions,\r |
139 | // so use original channel struct\r | |
381ea103 | 140 | static void save_channel(SPUCHAN_orig *d, const SPUCHAN *s, int ch)\r |
6d866bb7 | 141 | {\r |
142 | memset(d, 0, sizeof(*d));\r | |
3154bfab | 143 | d->bNew = !!(spu.dwNewChannel & (1<<ch));\r |
6d866bb7 | 144 | d->iSBPos = s->iSBPos;\r |
145 | d->spos = s->spos;\r | |
146 | d->sinc = s->sinc;\r | |
de4a0279 | 147 | memcpy(d->SB, spu.SB + ch * SB_SIZE, sizeof(d->SB[0]) * SB_SIZE);\r |
8e1040b6 | 148 | d->iStart = (regAreaGet(ch,6)&~1)<<3;\r |
149 | d->iCurr = 0; // set by the caller\r | |
150 | d->iLoop = 0; // set by the caller\r | |
3154bfab | 151 | d->bOn = !!(spu.dwChannelOn & (1<<ch));\r |
9ad8abfa | 152 | d->bStop = s->ADSRX.State == ADSR_RELEASE;\r |
6d866bb7 | 153 | d->bReverb = s->bReverb;\r |
7e44d49d | 154 | d->iActFreq = 1;\r |
155 | d->iUsedFreq = 2;\r | |
6d866bb7 | 156 | d->iLeftVolume = s->iLeftVolume;\r |
e4f075af | 157 | // this one is nasty but safe, save compat is important\r |
158 | d->bIgnoreLoop = (s->prevflags ^ 2) << 1;\r | |
6d866bb7 | 159 | d->iRightVolume = s->iRightVolume;\r |
160 | d->iRawPitch = s->iRawPitch;\r | |
de4a0279 | 161 | d->s_1 = spu.SB[ch * SB_SIZE + 27]; // yes it's reversed\r |
162 | d->s_2 = spu.SB[ch * SB_SIZE + 26];\r | |
6d866bb7 | 163 | d->bRVBActive = s->bRVBActive;\r |
6d866bb7 | 164 | d->bNoise = s->bNoise;\r |
165 | d->bFMod = s->bFMod;\r | |
6d866bb7 | 166 | d->ADSRX.State = s->ADSRX.State;\r |
167 | d->ADSRX.AttackModeExp = s->ADSRX.AttackModeExp;\r | |
168 | d->ADSRX.AttackRate = s->ADSRX.AttackRate;\r | |
169 | d->ADSRX.DecayRate = s->ADSRX.DecayRate;\r | |
170 | d->ADSRX.SustainLevel = s->ADSRX.SustainLevel;\r | |
171 | d->ADSRX.SustainModeExp = s->ADSRX.SustainModeExp;\r | |
172 | d->ADSRX.SustainIncrease = s->ADSRX.SustainIncrease;\r | |
173 | d->ADSRX.SustainRate = s->ADSRX.SustainRate;\r | |
174 | d->ADSRX.ReleaseModeExp = s->ADSRX.ReleaseModeExp;\r | |
175 | d->ADSRX.ReleaseRate = s->ADSRX.ReleaseRate;\r | |
176 | d->ADSRX.EnvelopeVol = s->ADSRX.EnvelopeVol;\r | |
177 | d->ADSRX.lVolume = d->bOn; // hmh\r | |
178 | }\r | |
179 | \r | |
381ea103 | 180 | static void load_channel(SPUCHAN *d, const SPUCHAN_orig *s, int ch)\r |
6d866bb7 | 181 | {\r |
182 | memset(d, 0, sizeof(*d));\r | |
3154bfab | 183 | if (s->bNew) spu.dwNewChannel |= 1<<ch;\r |
6d866bb7 | 184 | d->iSBPos = s->iSBPos;\r |
650adfd2 | 185 | if ((uint32_t)d->iSBPos >= 28) d->iSBPos = 27;\r |
6d866bb7 | 186 | d->spos = s->spos;\r |
187 | d->sinc = s->sinc;\r | |
650adfd2 | 188 | d->sinc_inv = 0;\r |
de4a0279 | 189 | memcpy(spu.SB + ch * SB_SIZE, s->SB, sizeof(spu.SB[0]) * SB_SIZE);\r |
8e1040b6 | 190 | d->pCurr = (void *)((long)s->iCurr & 0x7fff0);\r |
191 | d->pLoop = (void *)((long)s->iLoop & 0x7fff0);\r | |
6d866bb7 | 192 | d->bReverb = s->bReverb;\r |
6d866bb7 | 193 | d->iLeftVolume = s->iLeftVolume;\r |
6d866bb7 | 194 | d->iRightVolume = s->iRightVolume;\r |
195 | d->iRawPitch = s->iRawPitch;\r | |
6d866bb7 | 196 | d->bRVBActive = s->bRVBActive;\r |
6d866bb7 | 197 | d->bNoise = s->bNoise;\r |
198 | d->bFMod = s->bFMod;\r | |
e4f075af | 199 | d->prevflags = (s->bIgnoreLoop >> 1) ^ 2;\r |
6d866bb7 | 200 | d->ADSRX.State = s->ADSRX.State;\r |
9ad8abfa | 201 | if (s->bStop) d->ADSRX.State = ADSR_RELEASE;\r |
6d866bb7 | 202 | d->ADSRX.AttackModeExp = s->ADSRX.AttackModeExp;\r |
203 | d->ADSRX.AttackRate = s->ADSRX.AttackRate;\r | |
204 | d->ADSRX.DecayRate = s->ADSRX.DecayRate;\r | |
205 | d->ADSRX.SustainLevel = s->ADSRX.SustainLevel;\r | |
206 | d->ADSRX.SustainModeExp = s->ADSRX.SustainModeExp;\r | |
207 | d->ADSRX.SustainIncrease = s->ADSRX.SustainIncrease;\r | |
208 | d->ADSRX.SustainRate = s->ADSRX.SustainRate;\r | |
209 | d->ADSRX.ReleaseModeExp = s->ADSRX.ReleaseModeExp;\r | |
210 | d->ADSRX.ReleaseRate = s->ADSRX.ReleaseRate;\r | |
211 | d->ADSRX.EnvelopeVol = s->ADSRX.EnvelopeVol;\r | |
3154bfab | 212 | if (s->bOn) spu.dwChannelOn |= 1<<ch;\r |
6f6fe969 | 213 | else d->ADSRX.EnvelopeVol = 0;\r |
6d866bb7 | 214 | }\r |
215 | \r | |
650adfd2 | 216 | // force load from regArea to variables\r |
217 | static void load_register(unsigned long reg, unsigned int cycles)\r | |
218 | {\r | |
3154bfab | 219 | unsigned short *r = &spu.regArea[((reg & 0xfff) - 0xc00) >> 1];\r |
650adfd2 | 220 | *r ^= 1;\r |
221 | SPUwriteRegister(reg, *r ^ 1, cycles);\r | |
222 | }\r | |
223 | \r | |
ef79bbde P |
224 | ////////////////////////////////////////////////////////////////////////\r |
225 | // SPUFREEZE: called by main emu on savestate load/save\r | |
226 | ////////////////////////////////////////////////////////////////////////\r | |
227 | \r | |
650adfd2 | 228 | long CALLBACK SPUfreeze(uint32_t ulFreezeMode, SPUFreeze_t * pF,\r |
229 | uint32_t cycles)\r | |
ef79bbde P |
230 | {\r |
231 | int i;SPUOSSFreeze_t * pFO;\r | |
232 | \r | |
233 | if(!pF) return 0; // first check\r | |
234 | \r | |
7b2c4897 | 235 | do_samples(cycles, 1);\r |
236 | \r | |
ef79bbde P |
237 | if(ulFreezeMode) // info or save?\r |
238 | {//--------------------------------------------------//\r | |
239 | if(ulFreezeMode==1) \r | |
240 | memset(pF,0,sizeof(SPUFreeze_t)+sizeof(SPUOSSFreeze_t));\r | |
241 | \r | |
242 | strcpy(pF->szSPUName,"PBOSS");\r | |
243 | pF->ulFreezeVersion=5;\r | |
244 | pF->ulFreezeSize=sizeof(SPUFreeze_t)+sizeof(SPUOSSFreeze_t);\r | |
245 | \r | |
246 | if(ulFreezeMode==2) return 1; // info mode? ok, bye\r | |
247 | // save mode:\r | |
3154bfab | 248 | memcpy(pF->cSPURam,spu.spuMem,0x80000); // copy common infos\r |
249 | memcpy(pF->cSPUPort,spu.regArea,0x200);\r | |
ef79bbde | 250 | \r |
3154bfab | 251 | if(spu.xapGlobal && spu.XAPlay!=spu.XAFeed) // some xa\r |
ef79bbde | 252 | {\r |
3154bfab | 253 | pF->xaS=*spu.xapGlobal;\r |
ef79bbde P |
254 | }\r |
255 | else \r | |
256 | memset(&pF->xaS,0,sizeof(xa_decode_t)); // or clean xa\r | |
257 | \r | |
258 | pFO=(SPUOSSFreeze_t *)(pF+1); // store special stuff\r | |
259 | \r | |
3154bfab | 260 | pFO->spuIrq = spu.regArea[(H_SPUirqAddr - 0x0c00) / 2];\r |
261 | if(spu.pSpuIrq) pFO->pSpuIrq = (unsigned long)spu.pSpuIrq-(unsigned long)spu.spuMemC;\r | |
ef79bbde | 262 | \r |
3154bfab | 263 | pFO->spuAddr=spu.spuAddr;\r |
ef79bbde | 264 | if(pFO->spuAddr==0) pFO->spuAddr=0xbaadf00d;\r |
0ad5d4a1 | 265 | pFO->decode_pos = spu.decode_pos;\r |
ef79bbde P |
266 | \r |
267 | for(i=0;i<MAXCHAN;i++)\r | |
268 | {\r | |
5514a050 | 269 | save_channel(&pFO->s_chan[i],&spu.s_chan[i],i);\r |
270 | if(spu.s_chan[i].pCurr)\r | |
271 | pFO->s_chan[i].iCurr=spu.s_chan[i].pCurr-spu.spuMemC;\r | |
272 | if(spu.s_chan[i].pLoop)\r | |
273 | pFO->s_chan[i].iLoop=spu.s_chan[i].pLoop-spu.spuMemC;\r | |
ef79bbde P |
274 | }\r |
275 | \r | |
ef79bbde P |
276 | return 1;\r |
277 | //--------------------------------------------------//\r | |
278 | }\r | |
279 | \r | |
280 | if(ulFreezeMode!=0) return 0; // bad mode? bye\r | |
281 | \r | |
3154bfab | 282 | memcpy(spu.spuMem,pF->cSPURam,0x80000); // get ram\r |
283 | memcpy(spu.regArea,pF->cSPUPort,0x200);\r | |
0c1151fe | 284 | spu.bMemDirty = 1;\r |
ef79bbde P |
285 | \r |
286 | if(pF->xaS.nsamples<=4032) // start xa again\r | |
287 | SPUplayADPCMchannel(&pF->xaS);\r | |
288 | \r | |
3154bfab | 289 | spu.xapGlobal=0;\r |
ef79bbde P |
290 | \r |
291 | if(!strcmp(pF->szSPUName,"PBOSS") && pF->ulFreezeVersion==5)\r | |
292 | LoadStateV5(pF);\r | |
650adfd2 | 293 | else LoadStateUnknown(pF, cycles);\r |
ef79bbde P |
294 | \r |
295 | // repair some globals\r | |
296 | for(i=0;i<=62;i+=2)\r | |
650adfd2 | 297 | load_register(H_Reverb+i, cycles);\r |
298 | load_register(H_SPUReverbAddr, cycles);\r | |
299 | load_register(H_SPUrvolL, cycles);\r | |
300 | load_register(H_SPUrvolR, cycles);\r | |
ef79bbde | 301 | \r |
650adfd2 | 302 | load_register(H_SPUctrl, cycles);\r |
303 | load_register(H_SPUstat, cycles);\r | |
304 | load_register(H_CDLeft, cycles);\r | |
305 | load_register(H_CDRight, cycles);\r | |
ef79bbde P |
306 | \r |
307 | // fix to prevent new interpolations from crashing\r | |
de4a0279 | 308 | for(i=0;i<MAXCHAN;i++) spu.SB[i * SB_SIZE + 28]=0;\r |
ef79bbde | 309 | \r |
6d75977b | 310 | ClearWorkingState();\r |
3154bfab | 311 | spu.cycles_played = cycles;\r |
ef79bbde | 312 | \r |
c4c66b22 | 313 | if (spu.spuCtrl & CTRL_IRQ)\r |
314 | schedule_next_irq();\r | |
315 | \r | |
ef79bbde P |
316 | return 1;\r |
317 | }\r | |
318 | \r | |
319 | ////////////////////////////////////////////////////////////////////////\r | |
320 | \r | |
321 | void LoadStateV5(SPUFreeze_t * pF)\r | |
322 | {\r | |
323 | int i;SPUOSSFreeze_t * pFO;\r | |
324 | \r | |
325 | pFO=(SPUOSSFreeze_t *)(pF+1);\r | |
326 | \r | |
c4c66b22 | 327 | spu.pSpuIrq = spu.spuMemC + ((spu.regArea[(H_SPUirqAddr - 0x0c00) / 2] << 3) & ~0xf);\r |
ef79bbde P |
328 | \r |
329 | if(pFO->spuAddr)\r | |
330 | {\r | |
5514a050 | 331 | if (pFO->spuAddr == 0xbaadf00d) spu.spuAddr = 0;\r |
332 | else spu.spuAddr = pFO->spuAddr & 0x7fffe;\r | |
ef79bbde | 333 | }\r |
0ad5d4a1 | 334 | spu.decode_pos = pFO->decode_pos & 0x1ff;\r |
ef79bbde | 335 | \r |
3154bfab | 336 | spu.dwNewChannel=0;\r |
337 | spu.dwChannelOn=0;\r | |
338 | spu.dwChannelDead=0;\r | |
ef79bbde P |
339 | for(i=0;i<MAXCHAN;i++)\r |
340 | {\r | |
5514a050 | 341 | load_channel(&spu.s_chan[i],&pFO->s_chan[i],i);\r |
ef79bbde | 342 | \r |
5514a050 | 343 | spu.s_chan[i].pCurr+=(unsigned long)spu.spuMemC;\r |
344 | spu.s_chan[i].pLoop+=(unsigned long)spu.spuMemC;\r | |
ef79bbde P |
345 | }\r |
346 | }\r | |
347 | \r | |
348 | ////////////////////////////////////////////////////////////////////////\r | |
349 | \r | |
650adfd2 | 350 | void LoadStateUnknown(SPUFreeze_t * pF, uint32_t cycles)\r |
ef79bbde P |
351 | {\r |
352 | int i;\r | |
353 | \r | |
354 | for(i=0;i<MAXCHAN;i++)\r | |
355 | {\r | |
5514a050 | 356 | spu.s_chan[i].pLoop=spu.spuMemC;\r |
ef79bbde P |
357 | }\r |
358 | \r | |
3154bfab | 359 | spu.dwNewChannel=0;\r |
360 | spu.dwChannelOn=0;\r | |
361 | spu.dwChannelDead=0;\r | |
c4c66b22 | 362 | spu.pSpuIrq=spu.spuMemC;\r |
ef79bbde P |
363 | \r |
364 | for(i=0;i<0xc0;i++)\r | |
365 | {\r | |
650adfd2 | 366 | load_register(0x1f801c00 + i*2, cycles);\r |
ef79bbde P |
367 | }\r |
368 | }\r | |
369 | \r | |
370 | ////////////////////////////////////////////////////////////////////////\r |