Commit | Line | Data |
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90ca4913 | 1 | /* |
2 | * (C) GraÅžvydas "notaz" Ignotas, 2011 | |
3 | * | |
4 | * This work is licensed under the terms of any of these licenses | |
5 | * (at your option): | |
6 | * - GNU GPL, version 2 or later. | |
7 | * - GNU LGPL, version 2.1 or later. | |
8 | * See the COPYING file in the top-level directory. | |
9 | */ | |
10 | ||
11 | #include <stdio.h> | |
3b7b0065 | 12 | #include <assert.h> |
1fce6ce8 | 13 | |
3b7b0065 | 14 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) |
9a864a8f | 15 | #ifndef min |
16 | #define min(a, b) ((a) < (b) ? (a) : (b)) | |
17 | #endif | |
18 | #ifndef max | |
19 | #define max(a, b) ((a) > (b) ? (a) : (b)) | |
20 | #endif | |
90ca4913 | 21 | |
652c6b8b | 22 | extern const unsigned char cmd_lengths[256]; |
23 | #define command_lengths cmd_lengths | |
24 | ||
b243416b | 25 | static unsigned int *ex_regs; |
9ee0fd5b | 26 | static int initialized; |
b243416b | 27 | |
28 | #define PCSX | |
29 | #define SET_Ex(r, v) \ | |
30 | ex_regs[r] = v | |
31 | ||
3b7b0065 | 32 | static __attribute__((noinline)) void |
33 | sync_enhancement_buffers(int x, int y, int w, int h); | |
34 | ||
35 | #include "../gpulib/gpu.h" | |
90ca4913 | 36 | #include "psx_gpu/psx_gpu.c" |
90ca4913 | 37 | #include "psx_gpu/psx_gpu_parse.c" |
90ca4913 | 38 | |
39 | static psx_gpu_struct egpu __attribute__((aligned(256))); | |
40 | ||
d02ab9fc | 41 | int do_cmd_list(uint32_t *list, int count, |
42 | int *cycles_sum, int *cycles_last, int *last_cmd) | |
90ca4913 | 43 | { |
c1817bd9 | 44 | int ret; |
45 | ||
9775fc33 | 46 | #if defined(__arm__) && defined(NEON_BUILD) && !defined(SIMD_BUILD) |
47 | // the asm doesn't bother to save callee-save vector regs, so do it here | |
48 | __asm__ __volatile__("":::"q4","q5","q6","q7"); | |
49 | #endif | |
50 | ||
c1817bd9 | 51 | if (gpu.state.enhancement_active) |
d02ab9fc | 52 | ret = gpu_parse_enhanced(&egpu, list, count * 4, |
53 | cycles_sum, cycles_last, (u32 *)last_cmd); | |
c1817bd9 | 54 | else |
d02ab9fc | 55 | ret = gpu_parse(&egpu, list, count * 4, |
56 | cycles_sum, cycles_last, (u32 *)last_cmd); | |
b243416b | 57 | |
9775fc33 | 58 | #if defined(__arm__) && defined(NEON_BUILD) && !defined(SIMD_BUILD) |
59 | __asm__ __volatile__("":::"q4","q5","q6","q7"); | |
60 | #endif | |
61 | ||
b243416b | 62 | ex_regs[1] &= ~0x1ff; |
63 | ex_regs[1] |= egpu.texture_settings & 0x1ff; | |
64 | return ret; | |
90ca4913 | 65 | } |
66 | ||
06bc35c8 | 67 | #define ENHANCEMENT_BUF_SIZE (1024 * 1024 * 2 * 4 + 4096 * 2) |
50f9355a | 68 | |
5bbe183f | 69 | static void *get_enhancement_bufer(int *x, int *y, int *w, int *h, |
fa56d360 | 70 | int *vram_h) |
a8be0deb | 71 | { |
9a864a8f | 72 | uint16_t *ret = select_enhancement_buf_ptr(&egpu, *x, *y); |
73 | if (ret == NULL) | |
74 | return NULL; | |
a8be0deb | 75 | |
76 | *x *= 2; | |
77 | *y *= 2; | |
78 | *w = *w * 2; | |
79 | *h = *h * 2; | |
fa56d360 | 80 | *vram_h = 1024; |
a8be0deb | 81 | return ret; |
82 | } | |
83 | ||
9ee0fd5b | 84 | static void map_enhancement_buffer(void) |
90ca4913 | 85 | { |
9ee0fd5b | 86 | // currently we use 4x 1024*1024 buffers instead of single 2048*1024 |
87 | // to be able to reuse 1024-width code better (triangle setup, | |
88 | // dithering phase, lines). | |
a8be0deb | 89 | egpu.enhancement_buf_ptr = gpu.mmap(ENHANCEMENT_BUF_SIZE); |
90 | if (egpu.enhancement_buf_ptr == NULL) { | |
9ee0fd5b | 91 | fprintf(stderr, "failed to map enhancement buffer\n"); |
a8be0deb | 92 | gpu.get_enhancement_bufer = NULL; |
93 | } | |
94 | else { | |
95 | egpu.enhancement_buf_ptr += 4096 / 2; | |
96 | gpu.get_enhancement_bufer = get_enhancement_bufer; | |
97 | } | |
9ee0fd5b | 98 | } |
e929dec5 | 99 | |
9ee0fd5b | 100 | int renderer_init(void) |
101 | { | |
102 | if (gpu.vram != NULL) { | |
103 | initialize_psx_gpu(&egpu, gpu.vram); | |
104 | initialized = 1; | |
e929dec5 | 105 | } |
e929dec5 | 106 | |
a8be0deb | 107 | if (gpu.mmap != NULL && egpu.enhancement_buf_ptr == NULL) |
9ee0fd5b | 108 | map_enhancement_buffer(); |
109 | ||
110 | ex_regs = gpu.ex_regs; | |
90ca4913 | 111 | return 0; |
112 | } | |
113 | ||
e929dec5 | 114 | void renderer_finish(void) |
115 | { | |
a8be0deb | 116 | if (egpu.enhancement_buf_ptr != NULL) { |
117 | egpu.enhancement_buf_ptr -= 4096 / 2; | |
118 | gpu.munmap(egpu.enhancement_buf_ptr, ENHANCEMENT_BUF_SIZE); | |
06bc35c8 | 119 | } |
e929dec5 | 120 | egpu.enhancement_buf_ptr = NULL; |
06bc35c8 | 121 | egpu.enhancement_current_buf_ptr = NULL; |
9ee0fd5b | 122 | initialized = 0; |
e929dec5 | 123 | } |
124 | ||
50f9355a | 125 | static __attribute__((noinline)) void |
126 | sync_enhancement_buffers(int x, int y, int w, int h) | |
127 | { | |
9a864a8f | 128 | int i, right = x + w, bottom = y + h; |
129 | const u16 *src = gpu.vram; | |
130 | // use these because the scanout struct may hold reduced w, h | |
131 | // due to intersection stuff, see the update_enhancement_buf_scanouts() mess | |
132 | int s_w = max(gpu.screen.hres, gpu.screen.w); | |
133 | int s_h = gpu.screen.vres; | |
c6f4ee7c | 134 | if (gpu.screen.y < 0) |
135 | s_h -= gpu.screen.y; | |
9a864a8f | 136 | s_w = min(s_w, 512); |
137 | for (i = 0; i < ARRAY_SIZE(egpu.enhancement_scanouts); i++) { | |
138 | const struct psx_gpu_scanout *s = &egpu.enhancement_scanouts[i]; | |
139 | u16 *dst = select_enhancement_buf_by_index(&egpu, i); | |
140 | int x1, x2, y1, y2; | |
141 | if (s->w == 0) continue; | |
142 | if (s->x >= right) continue; | |
143 | if (s->x + s_w <= x) continue; | |
144 | if (s->y >= bottom) continue; | |
145 | if (s->y + s_h <= y) continue; | |
146 | x1 = max(x, s->x); | |
147 | x2 = min(right, s->x + s_w); | |
148 | y1 = max(y, s->y); | |
149 | y2 = min(bottom, s->y + s_h); | |
4a96d0a9 | 150 | // 16-byte align for the asm version |
151 | x2 += x1 & 7; | |
152 | x1 &= ~7; | |
9a864a8f | 153 | scale2x_tiles8(dst + y1 * 1024*2 + x1 * 2, |
154 | src + y1 * 1024 + x1, (x2 - x1 + 7) / 8u, y2 - y1); | |
50f9355a | 155 | } |
156 | } | |
157 | ||
90ca4913 | 158 | void renderer_sync_ecmds(uint32_t *ecmds) |
159 | { | |
f99193c2 | 160 | s32 dummy0 = 0; |
161 | u32 dummy1 = 0; | |
d02ab9fc | 162 | gpu_parse(&egpu, ecmds + 1, 6 * 4, &dummy0, &dummy0, &dummy1); |
90ca4913 | 163 | } |
164 | ||
3b7b0065 | 165 | void renderer_update_caches(int x, int y, int w, int h, int state_changed) |
90ca4913 | 166 | { |
05740673 | 167 | update_texture_cache_region(&egpu, x, y, x + w - 1, y + h - 1); |
3b7b0065 | 168 | |
169 | if (gpu.state.enhancement_active) { | |
170 | if (state_changed) { | |
c6f4ee7c | 171 | int vres = gpu.screen.vres; |
172 | if (gpu.screen.y < 0) | |
173 | vres -= gpu.screen.y; | |
9a864a8f | 174 | memset(egpu.enhancement_scanouts, 0, sizeof(egpu.enhancement_scanouts)); |
175 | egpu.enhancement_scanout_eselect = 0; | |
6ae77271 | 176 | update_enhancement_buf_scanouts(&egpu, |
c6f4ee7c | 177 | gpu.screen.src_x, gpu.screen.src_y, gpu.screen.hres, vres); |
3b7b0065 | 178 | return; |
179 | } | |
50f9355a | 180 | sync_enhancement_buffers(x, y, w, h); |
3b7b0065 | 181 | } |
90ca4913 | 182 | } |
183 | ||
184 | void renderer_flush_queues(void) | |
185 | { | |
186 | flush_render_block_buffer(&egpu); | |
187 | } | |
188 | ||
5440b88e | 189 | void renderer_set_interlace(int enable, int is_odd) |
190 | { | |
f1359c57 | 191 | egpu.render_mode &= ~(RENDER_INTERLACE_ENABLED|RENDER_INTERLACE_ODD); |
5440b88e | 192 | if (enable) |
f1359c57 | 193 | egpu.render_mode |= RENDER_INTERLACE_ENABLED; |
5440b88e | 194 | if (is_odd) |
f1359c57 | 195 | egpu.render_mode |= RENDER_INTERLACE_ODD; |
5440b88e | 196 | } |
197 | ||
e929dec5 | 198 | void renderer_notify_res_change(void) |
199 | { | |
9a864a8f | 200 | renderer_notify_scanout_change(gpu.screen.src_x, gpu.screen.src_y); |
3b7b0065 | 201 | } |
202 | ||
9a864a8f | 203 | void renderer_notify_scanout_change(int x, int y) |
3b7b0065 | 204 | { |
c6f4ee7c | 205 | int vres = gpu.screen.vres; |
9a864a8f | 206 | if (!gpu.state.enhancement_active || !egpu.enhancement_buf_ptr) |
3b7b0065 | 207 | return; |
208 | ||
c6f4ee7c | 209 | if (gpu.screen.y < 0) |
210 | vres -= gpu.screen.y; | |
211 | update_enhancement_buf_scanouts(&egpu, x, y, gpu.screen.hres, vres); | |
e929dec5 | 212 | } |
213 | ||
c1817bd9 | 214 | #include "../../frontend/plugin_lib.h" |
215 | ||
90ca4913 | 216 | void renderer_set_config(const struct rearmed_cbs *cbs) |
217 | { | |
9ee0fd5b | 218 | if (!initialized) { |
219 | initialize_psx_gpu(&egpu, gpu.vram); | |
220 | initialized = 1; | |
221 | } | |
fa56d360 | 222 | if (cbs->pl_set_gpu_caps) |
223 | cbs->pl_set_gpu_caps(GPU_CAP_SUPPORTS_2X); | |
5c1cbedc | 224 | |
225 | egpu.use_dithering = cbs->gpu_neon.allow_dithering; | |
226 | if(!egpu.use_dithering) { | |
227 | egpu.dither_table[0] = dither_table_row(0, 0, 0, 0); | |
228 | egpu.dither_table[1] = dither_table_row(0, 0, 0, 0); | |
229 | egpu.dither_table[2] = dither_table_row(0, 0, 0, 0); | |
230 | egpu.dither_table[3] = dither_table_row(0, 0, 0, 0); | |
231 | } else { | |
232 | egpu.dither_table[0] = dither_table_row(-4, 0, -3, 1); | |
233 | egpu.dither_table[1] = dither_table_row(2, -2, 3, -1); | |
234 | egpu.dither_table[2] = dither_table_row(-3, 1, -4, 0); | |
235 | egpu.dither_table[3] = dither_table_row(3, -1, 2, -2); | |
236 | } | |
237 | ||
3b7b0065 | 238 | disable_main_render = cbs->gpu_neon.enhancement_no_main; |
239 | if (gpu.state.enhancement_enable) { | |
240 | if (gpu.mmap != NULL && egpu.enhancement_buf_ptr == NULL) | |
241 | map_enhancement_buffer(); | |
242 | } | |
90ca4913 | 243 | } |
3b7b0065 | 244 | |
c765eb86 JW |
245 | void renderer_sync(void) |
246 | { | |
247 | } | |
3b7b0065 | 248 | |
c765eb86 JW |
249 | void renderer_notify_update_lace(int updated) |
250 | { | |
251 | } | |
3b7b0065 | 252 | |
253 | // vim:ts=2:sw=2:expandtab |