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1 | /* |
2 | * (C) GraÅžvydas "notaz" Ignotas, 2011 |
3 | * |
4 | * This work is licensed under the terms of any of these licenses |
5 | * (at your option): |
6 | * - GNU GPL, version 2 or later. |
7 | * - GNU LGPL, version 2.1 or later. |
8 | * See the COPYING file in the top-level directory. |
9 | */ |
10 | |
11 | #include <stdio.h> |
0b4038f8 |
12 | #include <assert.h> |
50f9355a |
13 | #include <sys/mman.h> |
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14 | |
0b4038f8 |
15 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) |
2da2fc76 |
16 | #ifndef min |
17 | #define min(a, b) ((a) < (b) ? (a) : (b)) |
18 | #endif |
19 | #ifndef max |
20 | #define max(a, b) ((a) > (b) ? (a) : (b)) |
21 | #endif |
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22 | |
652c6b8b |
23 | extern const unsigned char cmd_lengths[256]; |
24 | #define command_lengths cmd_lengths |
25 | |
b243416b |
26 | static unsigned int *ex_regs; |
9ee0fd5b |
27 | static int initialized; |
b243416b |
28 | |
29 | #define PCSX |
30 | #define SET_Ex(r, v) \ |
31 | ex_regs[r] = v |
32 | |
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33 | static __attribute__((noinline)) void |
34 | sync_enhancement_buffers(int x, int y, int w, int h); |
35 | |
36 | #include "../gpulib/gpu.h" |
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37 | #include "psx_gpu/psx_gpu.c" |
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38 | #include "psx_gpu/psx_gpu_parse.c" |
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39 | |
40 | static psx_gpu_struct egpu __attribute__((aligned(256))); |
41 | |
8412166f |
42 | int do_cmd_list(uint32_t *list, int count, |
43 | int *cycles_sum, int *cycles_last, int *last_cmd) |
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44 | { |
c1817bd9 |
45 | int ret; |
46 | |
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47 | #if defined(__arm__) && defined(NEON_BUILD) && !defined(SIMD_BUILD) |
48 | // the asm doesn't bother to save callee-save vector regs, so do it here |
49 | __asm__ __volatile__("":::"q4","q5","q6","q7"); |
50 | #endif |
51 | |
c1817bd9 |
52 | if (gpu.state.enhancement_active) |
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53 | ret = gpu_parse_enhanced(&egpu, list, count * 4, |
54 | cycles_sum, cycles_last, (u32 *)last_cmd); |
c1817bd9 |
55 | else |
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56 | ret = gpu_parse(&egpu, list, count * 4, |
57 | cycles_sum, cycles_last, (u32 *)last_cmd); |
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58 | |
3f0189c6 |
59 | #if defined(__arm__) && defined(NEON_BUILD) && !defined(SIMD_BUILD) |
60 | __asm__ __volatile__("":::"q4","q5","q6","q7"); |
61 | #endif |
62 | |
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63 | ex_regs[1] &= ~0x1ff; |
64 | ex_regs[1] |= egpu.texture_settings & 0x1ff; |
65 | return ret; |
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66 | } |
67 | |
06bc35c8 |
68 | #define ENHANCEMENT_BUF_SIZE (1024 * 1024 * 2 * 4 + 4096 * 2) |
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69 | |
308c6e67 |
70 | static void *get_enhancement_bufer(int *x, int *y, int *w, int *h, |
fa56d360 |
71 | int *vram_h) |
a8be0deb |
72 | { |
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73 | uint16_t *ret = select_enhancement_buf_ptr(&egpu, *x, *y); |
74 | if (ret == NULL) |
75 | return NULL; |
a8be0deb |
76 | |
77 | *x *= 2; |
78 | *y *= 2; |
79 | *w = *w * 2; |
80 | *h = *h * 2; |
fa56d360 |
81 | *vram_h = 1024; |
a8be0deb |
82 | return ret; |
83 | } |
84 | |
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85 | static void map_enhancement_buffer(void) |
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86 | { |
9ee0fd5b |
87 | // currently we use 4x 1024*1024 buffers instead of single 2048*1024 |
88 | // to be able to reuse 1024-width code better (triangle setup, |
89 | // dithering phase, lines). |
a8be0deb |
90 | egpu.enhancement_buf_ptr = gpu.mmap(ENHANCEMENT_BUF_SIZE); |
91 | if (egpu.enhancement_buf_ptr == NULL) { |
9ee0fd5b |
92 | fprintf(stderr, "failed to map enhancement buffer\n"); |
a8be0deb |
93 | gpu.get_enhancement_bufer = NULL; |
94 | } |
95 | else { |
96 | egpu.enhancement_buf_ptr += 4096 / 2; |
97 | gpu.get_enhancement_bufer = get_enhancement_bufer; |
98 | } |
9ee0fd5b |
99 | } |
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100 | |
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101 | int renderer_init(void) |
102 | { |
103 | if (gpu.vram != NULL) { |
104 | initialize_psx_gpu(&egpu, gpu.vram); |
105 | initialized = 1; |
e929dec5 |
106 | } |
e929dec5 |
107 | |
a8be0deb |
108 | if (gpu.mmap != NULL && egpu.enhancement_buf_ptr == NULL) |
9ee0fd5b |
109 | map_enhancement_buffer(); |
110 | |
111 | ex_regs = gpu.ex_regs; |
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112 | return 0; |
113 | } |
114 | |
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115 | void renderer_finish(void) |
116 | { |
a8be0deb |
117 | if (egpu.enhancement_buf_ptr != NULL) { |
118 | egpu.enhancement_buf_ptr -= 4096 / 2; |
119 | gpu.munmap(egpu.enhancement_buf_ptr, ENHANCEMENT_BUF_SIZE); |
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120 | } |
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121 | egpu.enhancement_buf_ptr = NULL; |
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122 | egpu.enhancement_current_buf_ptr = NULL; |
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123 | initialized = 0; |
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124 | } |
125 | |
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126 | static __attribute__((noinline)) void |
127 | sync_enhancement_buffers(int x, int y, int w, int h) |
128 | { |
2da2fc76 |
129 | int i, right = x + w, bottom = y + h; |
130 | const u16 *src = gpu.vram; |
131 | // use these because the scanout struct may hold reduced w, h |
132 | // due to intersection stuff, see the update_enhancement_buf_scanouts() mess |
133 | int s_w = max(gpu.screen.hres, gpu.screen.w); |
134 | int s_h = gpu.screen.vres; |
a3fcdfcb |
135 | if (gpu.screen.y < 0) |
136 | s_h -= gpu.screen.y; |
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137 | s_w = min(s_w, 512); |
138 | for (i = 0; i < ARRAY_SIZE(egpu.enhancement_scanouts); i++) { |
139 | const struct psx_gpu_scanout *s = &egpu.enhancement_scanouts[i]; |
140 | u16 *dst = select_enhancement_buf_by_index(&egpu, i); |
141 | int x1, x2, y1, y2; |
142 | if (s->w == 0) continue; |
143 | if (s->x >= right) continue; |
144 | if (s->x + s_w <= x) continue; |
145 | if (s->y >= bottom) continue; |
146 | if (s->y + s_h <= y) continue; |
147 | x1 = max(x, s->x); |
148 | x2 = min(right, s->x + s_w); |
149 | y1 = max(y, s->y); |
150 | y2 = min(bottom, s->y + s_h); |
c2a25f67 |
151 | // 16-byte align for the asm version |
152 | x2 += x1 & 7; |
153 | x1 &= ~7; |
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154 | scale2x_tiles8(dst + y1 * 1024*2 + x1 * 2, |
155 | src + y1 * 1024 + x1, (x2 - x1 + 7) / 8u, y2 - y1); |
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156 | } |
157 | } |
158 | |
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159 | void renderer_sync_ecmds(uint32_t *ecmds) |
160 | { |
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161 | s32 dummy0 = 0; |
162 | u32 dummy1 = 0; |
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163 | gpu_parse(&egpu, ecmds + 1, 6 * 4, &dummy0, &dummy0, &dummy1); |
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164 | } |
165 | |
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166 | void renderer_update_caches(int x, int y, int w, int h, int state_changed) |
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167 | { |
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168 | update_texture_cache_region(&egpu, x, y, x + w - 1, y + h - 1); |
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169 | |
170 | if (gpu.state.enhancement_active) { |
171 | if (state_changed) { |
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172 | int vres = gpu.screen.vres; |
173 | if (gpu.screen.y < 0) |
174 | vres -= gpu.screen.y; |
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175 | memset(egpu.enhancement_scanouts, 0, sizeof(egpu.enhancement_scanouts)); |
176 | egpu.enhancement_scanout_eselect = 0; |
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177 | update_enhancement_buf_scanouts(&egpu, |
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178 | gpu.screen.src_x, gpu.screen.src_y, gpu.screen.hres, vres); |
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179 | return; |
180 | } |
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181 | sync_enhancement_buffers(x, y, w, h); |
0b4038f8 |
182 | } |
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183 | } |
184 | |
185 | void renderer_flush_queues(void) |
186 | { |
187 | flush_render_block_buffer(&egpu); |
188 | } |
189 | |
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190 | void renderer_set_interlace(int enable, int is_odd) |
191 | { |
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192 | egpu.render_mode &= ~(RENDER_INTERLACE_ENABLED|RENDER_INTERLACE_ODD); |
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193 | if (enable) |
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194 | egpu.render_mode |= RENDER_INTERLACE_ENABLED; |
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195 | if (is_odd) |
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196 | egpu.render_mode |= RENDER_INTERLACE_ODD; |
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197 | } |
198 | |
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199 | void renderer_notify_res_change(void) |
200 | { |
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201 | renderer_notify_scanout_change(gpu.screen.src_x, gpu.screen.src_y); |
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202 | } |
203 | |
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204 | void renderer_notify_scanout_change(int x, int y) |
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205 | { |
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206 | int vres = gpu.screen.vres; |
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207 | if (!gpu.state.enhancement_active || !egpu.enhancement_buf_ptr) |
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208 | return; |
209 | |
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210 | if (gpu.screen.y < 0) |
211 | vres -= gpu.screen.y; |
212 | update_enhancement_buf_scanouts(&egpu, x, y, gpu.screen.hres, vres); |
e929dec5 |
213 | } |
214 | |
c1817bd9 |
215 | #include "../../frontend/plugin_lib.h" |
216 | |
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217 | void renderer_set_config(const struct rearmed_cbs *cbs) |
218 | { |
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219 | if (!initialized) { |
220 | initialize_psx_gpu(&egpu, gpu.vram); |
221 | initialized = 1; |
222 | } |
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223 | if (cbs->pl_set_gpu_caps) |
224 | cbs->pl_set_gpu_caps(GPU_CAP_SUPPORTS_2X); |
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225 | |
226 | disable_main_render = cbs->gpu_neon.enhancement_no_main; |
227 | if (gpu.state.enhancement_enable) { |
228 | if (gpu.mmap != NULL && egpu.enhancement_buf_ptr == NULL) |
229 | map_enhancement_buffer(); |
230 | } |
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231 | } |
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232 | |
233 | // vim:ts=2:sw=2:expandtab |