Commit | Line | Data |
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56f08d83 | 1 | /* |
2 | * (C) GraÅžvydas "notaz" Ignotas, 2011 | |
3 | * | |
4 | * This work is licensed under the terms of any of these licenses | |
5 | * (at your option): | |
6 | * - GNU GPL, version 2 or later. | |
7 | * - GNU LGPL, version 2.1 or later. | |
8 | * See the COPYING file in the top-level directory. | |
9 | */ | |
10 | ||
11 | #include <stdint.h> | |
12 | ||
6f2ee2be | 13 | #ifdef __cplusplus |
14 | extern "C" { | |
15 | #endif | |
16 | ||
56f08d83 | 17 | #define CMD_BUFFER_LEN 1024 |
18 | ||
19 | struct psx_gpu { | |
56f08d83 | 20 | uint32_t cmd_buffer[CMD_BUFFER_LEN]; |
21 | uint32_t regs[16]; | |
9ee0fd5b | 22 | uint16_t *vram; |
56f08d83 | 23 | union { |
24 | uint32_t reg; | |
25 | struct { | |
26 | uint32_t tx:4; // 0 texture page | |
27 | uint32_t ty:1; | |
28 | uint32_t abr:2; | |
29 | uint32_t tp:2; // 7 t.p. mode (4,8,15bpp) | |
30 | uint32_t dtd:1; // 9 dither | |
31 | uint32_t dfe:1; | |
32 | uint32_t md:1; // 11 set mask bit when drawing | |
33 | uint32_t me:1; // 12 no draw on mask | |
34 | uint32_t unkn:3; | |
35 | uint32_t width1:1; // 16 | |
36 | uint32_t width0:2; | |
37 | uint32_t dheight:1; // 19 double height | |
38 | uint32_t video:1; // 20 NTSC,PAL | |
39 | uint32_t rgb24:1; | |
40 | uint32_t interlace:1; // 22 interlace on | |
41 | uint32_t blanking:1; // 23 display not enabled | |
42 | uint32_t unkn2:2; | |
43 | uint32_t busy:1; // 26 !busy drawing | |
44 | uint32_t img:1; // 27 ready to DMA image data | |
45 | uint32_t com:1; // 28 ready for commands | |
46 | uint32_t dma:2; // 29 off, ?, to vram, from vram | |
47 | uint32_t lcf:1; // 31 | |
48 | }; | |
49 | } status; | |
6e9bdaef | 50 | uint32_t gp0; |
51 | uint32_t ex_regs[8]; | |
56f08d83 | 52 | struct { |
8dd855cd | 53 | int hres, vres; |
56f08d83 | 54 | int x, y, w, h; |
8dd855cd | 55 | int x1, x2; |
56f08d83 | 56 | int y1, y2; |
57 | } screen; | |
58 | struct { | |
59 | int x, y, w, h; | |
05740673 | 60 | short int offset, is_read; |
61 | } dma, dma_start; | |
56f08d83 | 62 | int cmd_len; |
56f08d83 | 63 | uint32_t zero; |
fc84f618 | 64 | struct { |
65 | uint32_t fb_dirty:1; | |
5440b88e | 66 | uint32_t old_interlace:1; |
67 | uint32_t allow_interlace:2; | |
aafcb4dd | 68 | uint32_t blanked:1; |
0b02eb77 | 69 | uint32_t enhancement_enable:1; |
70 | uint32_t enhancement_active:1; | |
43047988 JW |
71 | uint32_t downscale_enable:1; |
72 | uint32_t downscale_active:1; | |
3ece2f0c | 73 | uint32_t *frame_count; |
74 | uint32_t *hcnt; /* hsync count */ | |
deb18d24 | 75 | struct { |
76 | uint32_t addr; | |
1c72b1c2 | 77 | uint32_t cycles; |
deb18d24 | 78 | uint32_t frame; |
79 | uint32_t hcnt; | |
80 | } last_list; | |
5440b88e | 81 | uint32_t last_vram_read_frame; |
fc84f618 | 82 | } state; |
83 | struct { | |
9fe27e25 | 84 | int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */ |
85 | int32_t cnt:3; /* amount skipped in a row */ | |
fc84f618 | 86 | uint32_t active:1; |
fb4c6fba | 87 | uint32_t allow:1; |
fc84f618 | 88 | uint32_t frame_ready:1; |
89 | const int *advice; | |
fb4c6fba | 90 | uint32_t last_flip_frame; |
fbb4bfff | 91 | uint32_t pending_fill[3]; |
fc84f618 | 92 | } frameskip; |
5c1cbedc | 93 | int useDithering:1; /* 0 - off , 1 - on */ |
a8be0deb | 94 | uint16_t *(*get_enhancement_bufer) |
fa56d360 | 95 | (int *x, int *y, int *w, int *h, int *vram_h); |
43047988 JW |
96 | uint16_t *(*get_downscale_buffer) |
97 | (int *x, int *y, int *w, int *h, int *vram_h); | |
9ee0fd5b | 98 | void *(*mmap)(unsigned int size); |
99 | void (*munmap)(void *ptr, unsigned int size); | |
56f08d83 | 100 | }; |
101 | ||
102 | extern struct psx_gpu gpu; | |
103 | ||
104 | extern const unsigned char cmd_lengths[256]; | |
105 | ||
b243416b | 106 | int do_cmd_list(uint32_t *list, int count, int *last_cmd); |
56f08d83 | 107 | |
914455e6 | 108 | struct rearmed_cbs; |
109 | ||
9394ada5 | 110 | int renderer_init(void); |
e929dec5 | 111 | void renderer_finish(void); |
5b745e5b | 112 | void renderer_sync_ecmds(uint32_t * ecmds); |
05740673 | 113 | void renderer_update_caches(int x, int y, int w, int h); |
9394ada5 | 114 | void renderer_flush_queues(void); |
5440b88e | 115 | void renderer_set_interlace(int enable, int is_odd); |
914455e6 | 116 | void renderer_set_config(const struct rearmed_cbs *config); |
e929dec5 | 117 | void renderer_notify_res_change(void); |
9394ada5 | 118 | |
5440b88e | 119 | int vout_init(void); |
120 | int vout_finish(void); | |
121 | void vout_update(void); | |
aafcb4dd | 122 | void vout_blank(void); |
5440b88e | 123 | void vout_set_config(const struct rearmed_cbs *config); |
6f2ee2be | 124 | |
096ec49b | 125 | /* listing these here for correct linkage if rasterizer uses c++ */ |
126 | struct GPUFreeze; | |
096ec49b | 127 | |
128 | long GPUinit(void); | |
129 | long GPUshutdown(void); | |
130 | void GPUwriteDataMem(uint32_t *mem, int count); | |
131 | long GPUdmaChain(uint32_t *rambase, uint32_t addr); | |
132 | void GPUwriteData(uint32_t data); | |
133 | void GPUreadDataMem(uint32_t *mem, int count); | |
134 | uint32_t GPUreadData(void); | |
135 | uint32_t GPUreadStatus(void); | |
136 | void GPUwriteStatus(uint32_t data); | |
137 | long GPUfreeze(uint32_t type, struct GPUFreeze *freeze); | |
138 | void GPUupdateLace(void); | |
139 | long GPUopen(void **dpy); | |
140 | long GPUclose(void); | |
72e5023f | 141 | void GPUvBlank(int is_vblank, int lcf); |
096ec49b | 142 | void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_); |
143 | ||
6f2ee2be | 144 | #ifdef __cplusplus |
145 | } | |
146 | #endif |