Merge pull request #629 from jSTE0/miyoo-platform
[pcsx_rearmed.git] / plugins / gpulib / gpu.h
CommitLineData
56f08d83 1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2011
3 *
4 * This work is licensed under the terms of any of these licenses
5 * (at your option):
6 * - GNU GPL, version 2 or later.
7 * - GNU LGPL, version 2.1 or later.
8 * See the COPYING file in the top-level directory.
9 */
10
908e426c 11#ifndef __GPULIB_GPU_H__
12#define __GPULIB_GPU_H__
13
56f08d83 14#include <stdint.h>
15
6f2ee2be 16#ifdef __cplusplus
17extern "C" {
18#endif
19
56f08d83 20#define CMD_BUFFER_LEN 1024
21
22struct psx_gpu {
56f08d83 23 uint32_t cmd_buffer[CMD_BUFFER_LEN];
24 uint32_t regs[16];
9ee0fd5b 25 uint16_t *vram;
56f08d83 26 union {
27 uint32_t reg;
28 struct {
29 uint32_t tx:4; // 0 texture page
30 uint32_t ty:1;
31 uint32_t abr:2;
32 uint32_t tp:2; // 7 t.p. mode (4,8,15bpp)
33 uint32_t dtd:1; // 9 dither
34 uint32_t dfe:1;
35 uint32_t md:1; // 11 set mask bit when drawing
36 uint32_t me:1; // 12 no draw on mask
37 uint32_t unkn:3;
38 uint32_t width1:1; // 16
39 uint32_t width0:2;
40 uint32_t dheight:1; // 19 double height
41 uint32_t video:1; // 20 NTSC,PAL
42 uint32_t rgb24:1;
43 uint32_t interlace:1; // 22 interlace on
44 uint32_t blanking:1; // 23 display not enabled
45 uint32_t unkn2:2;
46 uint32_t busy:1; // 26 !busy drawing
47 uint32_t img:1; // 27 ready to DMA image data
48 uint32_t com:1; // 28 ready for commands
49 uint32_t dma:2; // 29 off, ?, to vram, from vram
50 uint32_t lcf:1; // 31
51 };
52 } status;
6e9bdaef 53 uint32_t gp0;
54 uint32_t ex_regs[8];
56f08d83 55 struct {
8dd855cd 56 int hres, vres;
56f08d83 57 int x, y, w, h;
8dd855cd 58 int x1, x2;
56f08d83 59 int y1, y2;
60 } screen;
61 struct {
62 int x, y, w, h;
05740673 63 short int offset, is_read;
64 } dma, dma_start;
56f08d83 65 int cmd_len;
56f08d83 66 uint32_t zero;
fc84f618 67 struct {
68 uint32_t fb_dirty:1;
5440b88e 69 uint32_t old_interlace:1;
70 uint32_t allow_interlace:2;
aafcb4dd 71 uint32_t blanked:1;
0b02eb77 72 uint32_t enhancement_enable:1;
73 uint32_t enhancement_active:1;
43047988
JW
74 uint32_t downscale_enable:1;
75 uint32_t downscale_active:1;
3ece2f0c 76 uint32_t *frame_count;
77 uint32_t *hcnt; /* hsync count */
deb18d24 78 struct {
79 uint32_t addr;
1c72b1c2 80 uint32_t cycles;
deb18d24 81 uint32_t frame;
82 uint32_t hcnt;
83 } last_list;
5440b88e 84 uint32_t last_vram_read_frame;
fc84f618 85 } state;
86 struct {
9fe27e25 87 int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */
88 int32_t cnt:3; /* amount skipped in a row */
fc84f618 89 uint32_t active:1;
fb4c6fba 90 uint32_t allow:1;
fc84f618 91 uint32_t frame_ready:1;
92 const int *advice;
fb4c6fba 93 uint32_t last_flip_frame;
fbb4bfff 94 uint32_t pending_fill[3];
fc84f618 95 } frameskip;
c765eb86 96 uint32_t scratch_ex_regs[8]; // for threaded rendering
5c1cbedc 97 int useDithering:1; /* 0 - off , 1 - on */
a8be0deb 98 uint16_t *(*get_enhancement_bufer)
fa56d360 99 (int *x, int *y, int *w, int *h, int *vram_h);
43047988
JW
100 uint16_t *(*get_downscale_buffer)
101 (int *x, int *y, int *w, int *h, int *vram_h);
9ee0fd5b 102 void *(*mmap)(unsigned int size);
103 void (*munmap)(void *ptr, unsigned int size);
56f08d83 104};
105
106extern struct psx_gpu gpu;
107
108extern const unsigned char cmd_lengths[256];
109
b243416b 110int do_cmd_list(uint32_t *list, int count, int *last_cmd);
56f08d83 111
914455e6 112struct rearmed_cbs;
113
9394ada5 114int renderer_init(void);
e929dec5 115void renderer_finish(void);
5b745e5b 116void renderer_sync_ecmds(uint32_t * ecmds);
05740673 117void renderer_update_caches(int x, int y, int w, int h);
9394ada5 118void renderer_flush_queues(void);
5440b88e 119void renderer_set_interlace(int enable, int is_odd);
914455e6 120void renderer_set_config(const struct rearmed_cbs *config);
e929dec5 121void renderer_notify_res_change(void);
c765eb86
JW
122void renderer_notify_update_lace(int updated);
123void renderer_sync(void);
9394ada5 124
5440b88e 125int vout_init(void);
126int vout_finish(void);
127void vout_update(void);
aafcb4dd 128void vout_blank(void);
5440b88e 129void vout_set_config(const struct rearmed_cbs *config);
6f2ee2be 130
096ec49b 131/* listing these here for correct linkage if rasterizer uses c++ */
132struct GPUFreeze;
096ec49b 133
134long GPUinit(void);
135long GPUshutdown(void);
136void GPUwriteDataMem(uint32_t *mem, int count);
137long GPUdmaChain(uint32_t *rambase, uint32_t addr);
138void GPUwriteData(uint32_t data);
139void GPUreadDataMem(uint32_t *mem, int count);
140uint32_t GPUreadData(void);
141uint32_t GPUreadStatus(void);
142void GPUwriteStatus(uint32_t data);
143long GPUfreeze(uint32_t type, struct GPUFreeze *freeze);
144void GPUupdateLace(void);
145long GPUopen(void **dpy);
146long GPUclose(void);
72e5023f 147void GPUvBlank(int is_vblank, int lcf);
096ec49b 148void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_);
149
6f2ee2be 150#ifdef __cplusplus
151}
152#endif
908e426c 153
154#endif /* __GPULIB_GPU_H__ */