Commit | Line | Data |
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56f08d83 | 1 | /* |
2 | * (C) GraÅžvydas "notaz" Ignotas, 2011 | |
3 | * | |
4 | * This work is licensed under the terms of any of these licenses | |
5 | * (at your option): | |
6 | * - GNU GPL, version 2 or later. | |
7 | * - GNU LGPL, version 2.1 or later. | |
8 | * See the COPYING file in the top-level directory. | |
9 | */ | |
10 | ||
908e426c | 11 | #ifndef __GPULIB_GPU_H__ |
12 | #define __GPULIB_GPU_H__ | |
13 | ||
56f08d83 | 14 | #include <stdint.h> |
15 | ||
6f2ee2be | 16 | #ifdef __cplusplus |
17 | extern "C" { | |
18 | #endif | |
19 | ||
56f08d83 | 20 | #define CMD_BUFFER_LEN 1024 |
21 | ||
db215a72 PC |
22 | #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ |
23 | #define HTOLE32(x) __builtin_bswap32(x) | |
24 | #define HTOLE16(x) __builtin_bswap16(x) | |
25 | #define LE32TOH(x) __builtin_bswap32(x) | |
26 | #define LE16TOH(x) __builtin_bswap16(x) | |
27 | #else | |
28 | #define HTOLE32(x) (x) | |
29 | #define HTOLE16(x) (x) | |
30 | #define LE32TOH(x) (x) | |
31 | #define LE16TOH(x) (x) | |
32 | #endif | |
33 | ||
61124a6d PC |
34 | #define BIT(x) (1 << (x)) |
35 | ||
36 | #define PSX_GPU_STATUS_DHEIGHT BIT(19) | |
37 | #define PSX_GPU_STATUS_RGB24 BIT(21) | |
38 | #define PSX_GPU_STATUS_INTERLACE BIT(22) | |
39 | #define PSX_GPU_STATUS_BLANKING BIT(23) | |
40 | #define PSX_GPU_STATUS_IMG BIT(27) | |
41 | #define PSX_GPU_STATUS_DMA(x) ((x) << 29) | |
42 | #define PSX_GPU_STATUS_DMA_MASK (BIT(29) | BIT(30)) | |
43 | ||
56f08d83 | 44 | struct psx_gpu { |
56f08d83 | 45 | uint32_t cmd_buffer[CMD_BUFFER_LEN]; |
46 | uint32_t regs[16]; | |
9ee0fd5b | 47 | uint16_t *vram; |
61124a6d | 48 | uint32_t status; |
6e9bdaef | 49 | uint32_t gp0; |
50 | uint32_t ex_regs[8]; | |
56f08d83 | 51 | struct { |
8dd855cd | 52 | int hres, vres; |
56f08d83 | 53 | int x, y, w, h; |
8dd855cd | 54 | int x1, x2; |
56f08d83 | 55 | int y1, y2; |
56 | } screen; | |
57 | struct { | |
58 | int x, y, w, h; | |
05740673 | 59 | short int offset, is_read; |
60 | } dma, dma_start; | |
56f08d83 | 61 | int cmd_len; |
56f08d83 | 62 | uint32_t zero; |
fc84f618 | 63 | struct { |
64 | uint32_t fb_dirty:1; | |
5440b88e | 65 | uint32_t old_interlace:1; |
66 | uint32_t allow_interlace:2; | |
aafcb4dd | 67 | uint32_t blanked:1; |
0b02eb77 | 68 | uint32_t enhancement_enable:1; |
69 | uint32_t enhancement_active:1; | |
43047988 JW |
70 | uint32_t downscale_enable:1; |
71 | uint32_t downscale_active:1; | |
3ece2f0c | 72 | uint32_t *frame_count; |
73 | uint32_t *hcnt; /* hsync count */ | |
deb18d24 | 74 | struct { |
75 | uint32_t addr; | |
1c72b1c2 | 76 | uint32_t cycles; |
deb18d24 | 77 | uint32_t frame; |
78 | uint32_t hcnt; | |
79 | } last_list; | |
5440b88e | 80 | uint32_t last_vram_read_frame; |
e9309bb7 | 81 | uint32_t w_out_old, h_out_old, status_vo_old; |
fc84f618 | 82 | } state; |
83 | struct { | |
9fe27e25 | 84 | int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */ |
85 | int32_t cnt:3; /* amount skipped in a row */ | |
fc84f618 | 86 | uint32_t active:1; |
fb4c6fba | 87 | uint32_t allow:1; |
fc84f618 | 88 | uint32_t frame_ready:1; |
89 | const int *advice; | |
5eaa13f1 A |
90 | const int *force; |
91 | int *dirty; | |
fb4c6fba | 92 | uint32_t last_flip_frame; |
fbb4bfff | 93 | uint32_t pending_fill[3]; |
fc84f618 | 94 | } frameskip; |
c765eb86 | 95 | uint32_t scratch_ex_regs[8]; // for threaded rendering |
5c1cbedc | 96 | int useDithering:1; /* 0 - off , 1 - on */ |
a8be0deb | 97 | uint16_t *(*get_enhancement_bufer) |
fa56d360 | 98 | (int *x, int *y, int *w, int *h, int *vram_h); |
43047988 JW |
99 | uint16_t *(*get_downscale_buffer) |
100 | (int *x, int *y, int *w, int *h, int *vram_h); | |
9ee0fd5b | 101 | void *(*mmap)(unsigned int size); |
102 | void (*munmap)(void *ptr, unsigned int size); | |
56f08d83 | 103 | }; |
104 | ||
105 | extern struct psx_gpu gpu; | |
106 | ||
107 | extern const unsigned char cmd_lengths[256]; | |
108 | ||
b243416b | 109 | int do_cmd_list(uint32_t *list, int count, int *last_cmd); |
56f08d83 | 110 | |
914455e6 | 111 | struct rearmed_cbs; |
112 | ||
9394ada5 | 113 | int renderer_init(void); |
e929dec5 | 114 | void renderer_finish(void); |
5b745e5b | 115 | void renderer_sync_ecmds(uint32_t * ecmds); |
05740673 | 116 | void renderer_update_caches(int x, int y, int w, int h); |
9394ada5 | 117 | void renderer_flush_queues(void); |
5440b88e | 118 | void renderer_set_interlace(int enable, int is_odd); |
914455e6 | 119 | void renderer_set_config(const struct rearmed_cbs *config); |
e929dec5 | 120 | void renderer_notify_res_change(void); |
c765eb86 JW |
121 | void renderer_notify_update_lace(int updated); |
122 | void renderer_sync(void); | |
9394ada5 | 123 | |
5440b88e | 124 | int vout_init(void); |
125 | int vout_finish(void); | |
126 | void vout_update(void); | |
aafcb4dd | 127 | void vout_blank(void); |
5440b88e | 128 | void vout_set_config(const struct rearmed_cbs *config); |
6f2ee2be | 129 | |
096ec49b | 130 | /* listing these here for correct linkage if rasterizer uses c++ */ |
131 | struct GPUFreeze; | |
096ec49b | 132 | |
133 | long GPUinit(void); | |
134 | long GPUshutdown(void); | |
135 | void GPUwriteDataMem(uint32_t *mem, int count); | |
fae38d7a | 136 | long GPUdmaChain(uint32_t *rambase, uint32_t addr, uint32_t *progress_addr); |
096ec49b | 137 | void GPUwriteData(uint32_t data); |
138 | void GPUreadDataMem(uint32_t *mem, int count); | |
139 | uint32_t GPUreadData(void); | |
140 | uint32_t GPUreadStatus(void); | |
141 | void GPUwriteStatus(uint32_t data); | |
142 | long GPUfreeze(uint32_t type, struct GPUFreeze *freeze); | |
143 | void GPUupdateLace(void); | |
144 | long GPUopen(void **dpy); | |
145 | long GPUclose(void); | |
72e5023f | 146 | void GPUvBlank(int is_vblank, int lcf); |
096ec49b | 147 | void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_); |
148 | ||
6f2ee2be | 149 | #ifdef __cplusplus |
150 | } | |
151 | #endif | |
908e426c | 152 | |
153 | #endif /* __GPULIB_GPU_H__ */ |