adjust irq10 and rcnt for pal
[pcsx_rearmed.git] / plugins / gpulib / gpu.h
CommitLineData
56f08d83 1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2011
3 *
4 * This work is licensed under the terms of any of these licenses
5 * (at your option):
6 * - GNU GPL, version 2 or later.
7 * - GNU LGPL, version 2.1 or later.
8 * See the COPYING file in the top-level directory.
9 */
10
908e426c 11#ifndef __GPULIB_GPU_H__
12#define __GPULIB_GPU_H__
13
56f08d83 14#include <stdint.h>
15
7a20a6d0 16//#define RAW_FB_DISPLAY
17
3b7b0065 18#define gpu_log(fmt, ...) \
19 printf("%d:%03d: " fmt, *gpu.state.frame_count, *gpu.state.hcnt, ##__VA_ARGS__)
20
21//#define log_anomaly gpu_log
22#define log_anomaly(...)
23
6f2ee2be 24#ifdef __cplusplus
25extern "C" {
26#endif
27
56f08d83 28#define CMD_BUFFER_LEN 1024
29
db215a72
PC
30#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
31#define HTOLE32(x) __builtin_bswap32(x)
32#define HTOLE16(x) __builtin_bswap16(x)
33#define LE32TOH(x) __builtin_bswap32(x)
34#define LE16TOH(x) __builtin_bswap16(x)
35#else
36#define HTOLE32(x) (x)
37#define HTOLE16(x) (x)
38#define LE32TOH(x) (x)
39#define LE16TOH(x) (x)
40#endif
41
61124a6d
PC
42#define BIT(x) (1 << (x))
43
44#define PSX_GPU_STATUS_DHEIGHT BIT(19)
5bbe183f 45#define PSX_GPU_STATUS_PAL BIT(20)
61124a6d
PC
46#define PSX_GPU_STATUS_RGB24 BIT(21)
47#define PSX_GPU_STATUS_INTERLACE BIT(22)
48#define PSX_GPU_STATUS_BLANKING BIT(23)
49#define PSX_GPU_STATUS_IMG BIT(27)
50#define PSX_GPU_STATUS_DMA(x) ((x) << 29)
51#define PSX_GPU_STATUS_DMA_MASK (BIT(29) | BIT(30))
52
56f08d83 53struct psx_gpu {
56f08d83 54 uint32_t cmd_buffer[CMD_BUFFER_LEN];
55 uint32_t regs[16];
9ee0fd5b 56 uint16_t *vram;
61124a6d 57 uint32_t status;
6e9bdaef 58 uint32_t gp0;
59 uint32_t ex_regs[8];
56f08d83 60 struct {
8dd855cd 61 int hres, vres;
56f08d83 62 int x, y, w, h;
8dd855cd 63 int x1, x2;
56f08d83 64 int y1, y2;
5bbe183f 65 int src_x, src_y;
56f08d83 66 } screen;
67 struct {
68 int x, y, w, h;
05740673 69 short int offset, is_read;
70 } dma, dma_start;
56f08d83 71 int cmd_len;
56f08d83 72 uint32_t zero;
fc84f618 73 struct {
74 uint32_t fb_dirty:1;
5440b88e 75 uint32_t old_interlace:1;
76 uint32_t allow_interlace:2;
aafcb4dd 77 uint32_t blanked:1;
0b02eb77 78 uint32_t enhancement_enable:1;
79 uint32_t enhancement_active:1;
3b7b0065 80 uint32_t enhancement_was_active:1;
43047988
JW
81 uint32_t downscale_enable:1;
82 uint32_t downscale_active:1;
5bbe183f 83 uint32_t dims_changed:1;
3ece2f0c 84 uint32_t *frame_count;
85 uint32_t *hcnt; /* hsync count */
deb18d24 86 struct {
87 uint32_t addr;
1c72b1c2 88 uint32_t cycles;
deb18d24 89 uint32_t frame;
90 uint32_t hcnt;
91 } last_list;
5440b88e 92 uint32_t last_vram_read_frame;
e9309bb7 93 uint32_t w_out_old, h_out_old, status_vo_old;
5bbe183f 94 int screen_centering_type; // 0 - auto, 1 - game conrolled, 2 - manual
95 int screen_centering_x;
96 int screen_centering_y;
fc84f618 97 } state;
98 struct {
9fe27e25 99 int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */
100 int32_t cnt:3; /* amount skipped in a row */
fc84f618 101 uint32_t active:1;
fb4c6fba 102 uint32_t allow:1;
fc84f618 103 uint32_t frame_ready:1;
104 const int *advice;
5eaa13f1
A
105 const int *force;
106 int *dirty;
fb4c6fba 107 uint32_t last_flip_frame;
fbb4bfff 108 uint32_t pending_fill[3];
fc84f618 109 } frameskip;
c765eb86 110 uint32_t scratch_ex_regs[8]; // for threaded rendering
5bbe183f 111 void *(*get_enhancement_bufer)
fa56d360 112 (int *x, int *y, int *w, int *h, int *vram_h);
43047988
JW
113 uint16_t *(*get_downscale_buffer)
114 (int *x, int *y, int *w, int *h, int *vram_h);
9ee0fd5b 115 void *(*mmap)(unsigned int size);
116 void (*munmap)(void *ptr, unsigned int size);
56f08d83 117};
118
119extern struct psx_gpu gpu;
120
121extern const unsigned char cmd_lengths[256];
122
b243416b 123int do_cmd_list(uint32_t *list, int count, int *last_cmd);
56f08d83 124
914455e6 125struct rearmed_cbs;
126
9394ada5 127int renderer_init(void);
e929dec5 128void renderer_finish(void);
5b745e5b 129void renderer_sync_ecmds(uint32_t * ecmds);
3b7b0065 130void renderer_update_caches(int x, int y, int w, int h, int state_changed);
9394ada5 131void renderer_flush_queues(void);
5440b88e 132void renderer_set_interlace(int enable, int is_odd);
914455e6 133void renderer_set_config(const struct rearmed_cbs *config);
e929dec5 134void renderer_notify_res_change(void);
c765eb86
JW
135void renderer_notify_update_lace(int updated);
136void renderer_sync(void);
3b7b0065 137void renderer_notify_scanout_x_change(int x, int w);
9394ada5 138
5440b88e 139int vout_init(void);
140int vout_finish(void);
141void vout_update(void);
aafcb4dd 142void vout_blank(void);
5440b88e 143void vout_set_config(const struct rearmed_cbs *config);
6f2ee2be 144
096ec49b 145/* listing these here for correct linkage if rasterizer uses c++ */
146struct GPUFreeze;
096ec49b 147
148long GPUinit(void);
149long GPUshutdown(void);
150void GPUwriteDataMem(uint32_t *mem, int count);
fae38d7a 151long GPUdmaChain(uint32_t *rambase, uint32_t addr, uint32_t *progress_addr);
096ec49b 152void GPUwriteData(uint32_t data);
153void GPUreadDataMem(uint32_t *mem, int count);
154uint32_t GPUreadData(void);
155uint32_t GPUreadStatus(void);
156void GPUwriteStatus(uint32_t data);
157long GPUfreeze(uint32_t type, struct GPUFreeze *freeze);
158void GPUupdateLace(void);
93edff92 159long GPUopen(unsigned long *disp, char *cap, char *cfg);
096ec49b 160long GPUclose(void);
72e5023f 161void GPUvBlank(int is_vblank, int lcf);
096ec49b 162void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_);
163
6f2ee2be 164#ifdef __cplusplus
165}
166#endif
908e426c 167
168#endif /* __GPULIB_GPU_H__ */