preliminary irq10 support
[pcsx_rearmed.git] / plugins / gpulib / gpu.h
CommitLineData
56f08d83 1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2011
3 *
4 * This work is licensed under the terms of any of these licenses
5 * (at your option):
6 * - GNU GPL, version 2 or later.
7 * - GNU LGPL, version 2.1 or later.
8 * See the COPYING file in the top-level directory.
9 */
10
908e426c 11#ifndef __GPULIB_GPU_H__
12#define __GPULIB_GPU_H__
13
56f08d83 14#include <stdint.h>
15
3b7b0065 16#define gpu_log(fmt, ...) \
17 printf("%d:%03d: " fmt, *gpu.state.frame_count, *gpu.state.hcnt, ##__VA_ARGS__)
18
19//#define log_anomaly gpu_log
20#define log_anomaly(...)
21
6f2ee2be 22#ifdef __cplusplus
23extern "C" {
24#endif
25
56f08d83 26#define CMD_BUFFER_LEN 1024
27
db215a72
PC
28#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
29#define HTOLE32(x) __builtin_bswap32(x)
30#define HTOLE16(x) __builtin_bswap16(x)
31#define LE32TOH(x) __builtin_bswap32(x)
32#define LE16TOH(x) __builtin_bswap16(x)
33#else
34#define HTOLE32(x) (x)
35#define HTOLE16(x) (x)
36#define LE32TOH(x) (x)
37#define LE16TOH(x) (x)
38#endif
39
61124a6d
PC
40#define BIT(x) (1 << (x))
41
42#define PSX_GPU_STATUS_DHEIGHT BIT(19)
5bbe183f 43#define PSX_GPU_STATUS_PAL BIT(20)
61124a6d
PC
44#define PSX_GPU_STATUS_RGB24 BIT(21)
45#define PSX_GPU_STATUS_INTERLACE BIT(22)
46#define PSX_GPU_STATUS_BLANKING BIT(23)
47#define PSX_GPU_STATUS_IMG BIT(27)
48#define PSX_GPU_STATUS_DMA(x) ((x) << 29)
49#define PSX_GPU_STATUS_DMA_MASK (BIT(29) | BIT(30))
50
56f08d83 51struct psx_gpu {
56f08d83 52 uint32_t cmd_buffer[CMD_BUFFER_LEN];
53 uint32_t regs[16];
9ee0fd5b 54 uint16_t *vram;
61124a6d 55 uint32_t status;
6e9bdaef 56 uint32_t gp0;
57 uint32_t ex_regs[8];
56f08d83 58 struct {
8dd855cd 59 int hres, vres;
56f08d83 60 int x, y, w, h;
8dd855cd 61 int x1, x2;
56f08d83 62 int y1, y2;
5bbe183f 63 int src_x, src_y;
56f08d83 64 } screen;
65 struct {
66 int x, y, w, h;
05740673 67 short int offset, is_read;
68 } dma, dma_start;
56f08d83 69 int cmd_len;
56f08d83 70 uint32_t zero;
fc84f618 71 struct {
72 uint32_t fb_dirty:1;
5440b88e 73 uint32_t old_interlace:1;
74 uint32_t allow_interlace:2;
aafcb4dd 75 uint32_t blanked:1;
0b02eb77 76 uint32_t enhancement_enable:1;
77 uint32_t enhancement_active:1;
3b7b0065 78 uint32_t enhancement_was_active:1;
43047988
JW
79 uint32_t downscale_enable:1;
80 uint32_t downscale_active:1;
5bbe183f 81 uint32_t dims_changed:1;
3ece2f0c 82 uint32_t *frame_count;
83 uint32_t *hcnt; /* hsync count */
deb18d24 84 struct {
85 uint32_t addr;
1c72b1c2 86 uint32_t cycles;
deb18d24 87 uint32_t frame;
88 uint32_t hcnt;
89 } last_list;
5440b88e 90 uint32_t last_vram_read_frame;
e9309bb7 91 uint32_t w_out_old, h_out_old, status_vo_old;
5bbe183f 92 int screen_centering_type; // 0 - auto, 1 - game conrolled, 2 - manual
93 int screen_centering_x;
94 int screen_centering_y;
fc84f618 95 } state;
96 struct {
9fe27e25 97 int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */
98 int32_t cnt:3; /* amount skipped in a row */
fc84f618 99 uint32_t active:1;
fb4c6fba 100 uint32_t allow:1;
fc84f618 101 uint32_t frame_ready:1;
102 const int *advice;
5eaa13f1
A
103 const int *force;
104 int *dirty;
fb4c6fba 105 uint32_t last_flip_frame;
fbb4bfff 106 uint32_t pending_fill[3];
fc84f618 107 } frameskip;
c765eb86 108 uint32_t scratch_ex_regs[8]; // for threaded rendering
5bbe183f 109 void *(*get_enhancement_bufer)
fa56d360 110 (int *x, int *y, int *w, int *h, int *vram_h);
43047988
JW
111 uint16_t *(*get_downscale_buffer)
112 (int *x, int *y, int *w, int *h, int *vram_h);
9ee0fd5b 113 void *(*mmap)(unsigned int size);
114 void (*munmap)(void *ptr, unsigned int size);
56f08d83 115};
116
117extern struct psx_gpu gpu;
118
119extern const unsigned char cmd_lengths[256];
120
b243416b 121int do_cmd_list(uint32_t *list, int count, int *last_cmd);
56f08d83 122
914455e6 123struct rearmed_cbs;
124
9394ada5 125int renderer_init(void);
e929dec5 126void renderer_finish(void);
5b745e5b 127void renderer_sync_ecmds(uint32_t * ecmds);
3b7b0065 128void renderer_update_caches(int x, int y, int w, int h, int state_changed);
9394ada5 129void renderer_flush_queues(void);
5440b88e 130void renderer_set_interlace(int enable, int is_odd);
914455e6 131void renderer_set_config(const struct rearmed_cbs *config);
e929dec5 132void renderer_notify_res_change(void);
c765eb86
JW
133void renderer_notify_update_lace(int updated);
134void renderer_sync(void);
3b7b0065 135void renderer_notify_scanout_x_change(int x, int w);
9394ada5 136
5440b88e 137int vout_init(void);
138int vout_finish(void);
139void vout_update(void);
aafcb4dd 140void vout_blank(void);
5440b88e 141void vout_set_config(const struct rearmed_cbs *config);
6f2ee2be 142
096ec49b 143/* listing these here for correct linkage if rasterizer uses c++ */
144struct GPUFreeze;
096ec49b 145
146long GPUinit(void);
147long GPUshutdown(void);
148void GPUwriteDataMem(uint32_t *mem, int count);
fae38d7a 149long GPUdmaChain(uint32_t *rambase, uint32_t addr, uint32_t *progress_addr);
096ec49b 150void GPUwriteData(uint32_t data);
151void GPUreadDataMem(uint32_t *mem, int count);
152uint32_t GPUreadData(void);
153uint32_t GPUreadStatus(void);
154void GPUwriteStatus(uint32_t data);
155long GPUfreeze(uint32_t type, struct GPUFreeze *freeze);
156void GPUupdateLace(void);
93edff92 157long GPUopen(unsigned long *disp, char *cap, char *cfg);
096ec49b 158long GPUclose(void);
72e5023f 159void GPUvBlank(int is_vblank, int lcf);
096ec49b 160void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_);
161
6f2ee2be 162#ifdef __cplusplus
163}
164#endif
908e426c 165
166#endif /* __GPULIB_GPU_H__ */