gpulib: Add proper support for big-endian
[pcsx_rearmed.git] / plugins / gpulib / gpu.h
CommitLineData
56f08d83 1/*
2 * (C) GraÅžvydas "notaz" Ignotas, 2011
3 *
4 * This work is licensed under the terms of any of these licenses
5 * (at your option):
6 * - GNU GPL, version 2 or later.
7 * - GNU LGPL, version 2.1 or later.
8 * See the COPYING file in the top-level directory.
9 */
10
908e426c 11#ifndef __GPULIB_GPU_H__
12#define __GPULIB_GPU_H__
13
56f08d83 14#include <stdint.h>
15
6f2ee2be 16#ifdef __cplusplus
17extern "C" {
18#endif
19
56f08d83 20#define CMD_BUFFER_LEN 1024
21
db215a72
PC
22#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
23#define HTOLE32(x) __builtin_bswap32(x)
24#define HTOLE16(x) __builtin_bswap16(x)
25#define LE32TOH(x) __builtin_bswap32(x)
26#define LE16TOH(x) __builtin_bswap16(x)
27#else
28#define HTOLE32(x) (x)
29#define HTOLE16(x) (x)
30#define LE32TOH(x) (x)
31#define LE16TOH(x) (x)
32#endif
33
61124a6d
PC
34#define BIT(x) (1 << (x))
35
36#define PSX_GPU_STATUS_DHEIGHT BIT(19)
37#define PSX_GPU_STATUS_RGB24 BIT(21)
38#define PSX_GPU_STATUS_INTERLACE BIT(22)
39#define PSX_GPU_STATUS_BLANKING BIT(23)
40#define PSX_GPU_STATUS_IMG BIT(27)
41#define PSX_GPU_STATUS_DMA(x) ((x) << 29)
42#define PSX_GPU_STATUS_DMA_MASK (BIT(29) | BIT(30))
43
56f08d83 44struct psx_gpu {
56f08d83 45 uint32_t cmd_buffer[CMD_BUFFER_LEN];
46 uint32_t regs[16];
9ee0fd5b 47 uint16_t *vram;
61124a6d 48 uint32_t status;
6e9bdaef 49 uint32_t gp0;
50 uint32_t ex_regs[8];
56f08d83 51 struct {
8dd855cd 52 int hres, vres;
56f08d83 53 int x, y, w, h;
8dd855cd 54 int x1, x2;
56f08d83 55 int y1, y2;
56 } screen;
57 struct {
58 int x, y, w, h;
05740673 59 short int offset, is_read;
60 } dma, dma_start;
56f08d83 61 int cmd_len;
56f08d83 62 uint32_t zero;
fc84f618 63 struct {
64 uint32_t fb_dirty:1;
5440b88e 65 uint32_t old_interlace:1;
66 uint32_t allow_interlace:2;
aafcb4dd 67 uint32_t blanked:1;
0b02eb77 68 uint32_t enhancement_enable:1;
69 uint32_t enhancement_active:1;
43047988
JW
70 uint32_t downscale_enable:1;
71 uint32_t downscale_active:1;
3ece2f0c 72 uint32_t *frame_count;
73 uint32_t *hcnt; /* hsync count */
deb18d24 74 struct {
75 uint32_t addr;
1c72b1c2 76 uint32_t cycles;
deb18d24 77 uint32_t frame;
78 uint32_t hcnt;
79 } last_list;
5440b88e 80 uint32_t last_vram_read_frame;
fc84f618 81 } state;
82 struct {
9fe27e25 83 int32_t set:3; /* -1 auto, 0 off, 1-3 fixed */
84 int32_t cnt:3; /* amount skipped in a row */
fc84f618 85 uint32_t active:1;
fb4c6fba 86 uint32_t allow:1;
fc84f618 87 uint32_t frame_ready:1;
88 const int *advice;
5eaa13f1
A
89 const int *force;
90 int *dirty;
fb4c6fba 91 uint32_t last_flip_frame;
fbb4bfff 92 uint32_t pending_fill[3];
fc84f618 93 } frameskip;
c765eb86 94 uint32_t scratch_ex_regs[8]; // for threaded rendering
5c1cbedc 95 int useDithering:1; /* 0 - off , 1 - on */
a8be0deb 96 uint16_t *(*get_enhancement_bufer)
fa56d360 97 (int *x, int *y, int *w, int *h, int *vram_h);
43047988
JW
98 uint16_t *(*get_downscale_buffer)
99 (int *x, int *y, int *w, int *h, int *vram_h);
9ee0fd5b 100 void *(*mmap)(unsigned int size);
101 void (*munmap)(void *ptr, unsigned int size);
56f08d83 102};
103
104extern struct psx_gpu gpu;
105
106extern const unsigned char cmd_lengths[256];
107
b243416b 108int do_cmd_list(uint32_t *list, int count, int *last_cmd);
56f08d83 109
914455e6 110struct rearmed_cbs;
111
9394ada5 112int renderer_init(void);
e929dec5 113void renderer_finish(void);
5b745e5b 114void renderer_sync_ecmds(uint32_t * ecmds);
05740673 115void renderer_update_caches(int x, int y, int w, int h);
9394ada5 116void renderer_flush_queues(void);
5440b88e 117void renderer_set_interlace(int enable, int is_odd);
914455e6 118void renderer_set_config(const struct rearmed_cbs *config);
e929dec5 119void renderer_notify_res_change(void);
c765eb86
JW
120void renderer_notify_update_lace(int updated);
121void renderer_sync(void);
9394ada5 122
5440b88e 123int vout_init(void);
124int vout_finish(void);
125void vout_update(void);
aafcb4dd 126void vout_blank(void);
5440b88e 127void vout_set_config(const struct rearmed_cbs *config);
6f2ee2be 128
096ec49b 129/* listing these here for correct linkage if rasterizer uses c++ */
130struct GPUFreeze;
096ec49b 131
132long GPUinit(void);
133long GPUshutdown(void);
134void GPUwriteDataMem(uint32_t *mem, int count);
135long GPUdmaChain(uint32_t *rambase, uint32_t addr);
136void GPUwriteData(uint32_t data);
137void GPUreadDataMem(uint32_t *mem, int count);
138uint32_t GPUreadData(void);
139uint32_t GPUreadStatus(void);
140void GPUwriteStatus(uint32_t data);
141long GPUfreeze(uint32_t type, struct GPUFreeze *freeze);
142void GPUupdateLace(void);
143long GPUopen(void **dpy);
144long GPUclose(void);
72e5023f 145void GPUvBlank(int is_vblank, int lcf);
096ec49b 146void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_);
147
6f2ee2be 148#ifdef __cplusplus
149}
150#endif
908e426c 151
152#endif /* __GPULIB_GPU_H__ */