cue/bin finally implemented
[picodrive.git] / Pico / Memory.c
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1// This is part of Pico Library\r
2\r
3// (c) Copyright 2004 Dave, All rights reserved.\r
4// (c) Copyright 2006,2007 notaz, All rights reserved.\r
5// Free for non-commercial use.\r
6\r
7// For commercial use, separate licencing terms must be obtained.\r
8\r
9\r
10#include "PicoInt.h"\r
11\r
12#include "sound/ym2612.h"\r
13#include "sound/sn76496.h"\r
14\r
15#ifndef UTYPES_DEFINED\r
16typedef unsigned char u8;\r
17typedef unsigned short u16;\r
18typedef unsigned int u32;\r
19#define UTYPES_DEFINED\r
20#endif\r
21\r
22extern unsigned int lastSSRamWrite; // used by serial SRAM code\r
23\r
24#ifdef _ASM_MEMORY_C\r
25u32 PicoRead8(u32 a);\r
26u32 PicoRead16(u32 a);\r
27void PicoWrite8(u32 a,u8 d);\r
28void PicoWriteRomHW_SSF2(u32 a,u32 d);\r
29#endif\r
30\r
31\r
32#ifdef EMU_CORE_DEBUG\r
33u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
34int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;\r
35extern unsigned int ppop;\r
36#endif\r
37\r
38#ifdef IO_STATS\r
39void log_io(unsigned int addr, int bits, int rw);\r
40#elif defined(_MSC_VER)\r
41#define log_io\r
42#else\r
43#define log_io(...)\r
44#endif\r
45\r
46#if defined(EMU_C68K)\r
47static __inline int PicoMemBase(u32 pc)\r
48{\r
49 int membase=0;\r
50\r
51 if (pc<Pico.romsize+4)\r
52 {\r
53 membase=(int)Pico.rom; // Program Counter in Rom\r
54 }\r
55 else if ((pc&0xe00000)==0xe00000)\r
56 {\r
57 membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
58 }\r
59 else\r
60 {\r
61 // Error - Program Counter is invalid\r
62 membase=(int)Pico.rom;\r
63 }\r
64\r
65 return membase;\r
66}\r
67#endif\r
68\r
69\r
70static u32 PicoCheckPc(u32 pc)\r
71{\r
72 u32 ret=0;\r
73#if defined(EMU_C68K)\r
74 pc-=PicoCpuCM68k.membase; // Get real pc\r
75// pc&=0xfffffe;\r
76 pc&=~1;\r
77 if ((pc<<8) == 0)\r
78 {\r
79 printf("%i:%03i: game crash detected @ %06x\n", Pico.m.frame_count, Pico.m.scanline, SekPc);\r
80 return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off\r
81 }\r
82\r
83 PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);\r
84 PicoCpuCM68k.membase-=pc&0xff000000;\r
85\r
86 ret = PicoCpuCM68k.membase+pc;\r
87#endif\r
88 return ret;\r
89}\r
90\r
91\r
92PICO_INTERNAL int PicoInitPc(u32 pc)\r
93{\r
94 PicoCheckPc(pc);\r
95 return 0;\r
96}\r
97\r
98#ifndef _ASM_MEMORY_C\r
99PICO_INTERNAL_ASM void PicoMemReset(void)\r
100{\r
101}\r
102#endif\r
103\r
104// -----------------------------------------------------------------\r
105\r
106int PadRead(int i)\r
107{\r
108 int pad,value,data_reg;\r
109 pad=~PicoPad[i]; // Get inverse of pad MXYZ SACB RLDU\r
110 data_reg=Pico.ioports[i+1];\r
111\r
112 // orr the bits, which are set as output\r
113 value = data_reg&(Pico.ioports[i+4]|0x80);\r
114\r
115 if (PicoOpt & POPT_6BTN_PAD)\r
116 {\r
117 int phase = Pico.m.padTHPhase[i];\r
118\r
119 if(phase == 2 && !(data_reg&0x40)) { // TH\r
120 value|=(pad&0xc0)>>2; // ?0SA 0000\r
121 return value;\r
122 } else if(phase == 3) {\r
123 if(data_reg&0x40)\r
124 value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
125 else\r
126 value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
127 return value;\r
128 }\r
129 }\r
130\r
131 if(data_reg&0x40) // TH\r
132 value|=(pad&0x3f); // ?1CB RLDU\r
133 else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
134\r
135 return value; // will mirror later\r
136}\r
137\r
138\r
139#ifndef _ASM_MEMORY_C\r
140static\r
141#endif\r
142u32 SRAMRead(u32 a)\r
143{\r
144 unsigned int sreg = Pico.m.sram_reg;\r
145 if (!(sreg & 0x10) && (sreg & 1) && a > 0x200001) { // not yet detected SRAM\r
146 elprintf(EL_SRAMIO, "normal sram detected.");\r
147 Pico.m.sram_reg|=0x10; // should be normal SRAM\r
148 }\r
149 if (sreg & 4) // EEPROM read\r
150 return SRAMReadEEPROM();\r
151 else // if(sreg & 1) // (sreg&5) is one of prerequisites\r
152 return *(u8 *)(SRam.data-SRam.start+a);\r
153}\r
154\r
155#ifndef _ASM_MEMORY_C\r
156static\r
157#endif\r
158u32 SRAMRead16(u32 a)\r
159{\r
160 u32 d;\r
161 if (Pico.m.sram_reg & 4) {\r
162 d = SRAMReadEEPROM();\r
163 d |= d << 8;\r
164 } else {\r
165 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
166 d =*pm++ << 8;\r
167 d|=*pm++;\r
168 }\r
169 return d;\r
170}\r
171\r
172static void SRAMWrite(u32 a, u32 d)\r
173{\r
174 unsigned int sreg = Pico.m.sram_reg;\r
175 if(!(sreg & 0x10)) {\r
176 // not detected SRAM\r
177 if((a&~1)==0x200000) {\r
178 elprintf(EL_SRAMIO, "eeprom detected.");\r
179 sreg|=4; // this should be a game with EEPROM (like NBA Jam)\r
180 SRam.start=0x200000; SRam.end=SRam.start+1;\r
181 } else\r
182 elprintf(EL_SRAMIO, "normal sram detected.");\r
183 sreg|=0x10;\r
184 Pico.m.sram_reg=sreg;\r
185 }\r
186 if(sreg & 4) { // EEPROM write\r
187 // this diff must be at most 16 for NBA Jam to work\r
188 if(SekCyclesDoneT()-lastSSRamWrite < 16) {\r
189 // just update pending state\r
190 elprintf(EL_EEPROM, "eeprom: skip because cycles=%i", SekCyclesDoneT()-lastSSRamWrite);\r
191 SRAMUpdPending(a, d);\r
192 } else {\r
193 int old=sreg;\r
194 SRAMWriteEEPROM(sreg>>6); // execute pending\r
195 SRAMUpdPending(a, d);\r
196 if ((old^Pico.m.sram_reg)&0xc0) // update time only if SDA/SCL changed\r
197 lastSSRamWrite = SekCyclesDoneT();\r
198 }\r
199 } else if(!(sreg & 2)) {\r
200 u8 *pm=(u8 *)(SRam.data-SRam.start+a);\r
201 if(*pm != (u8)d) {\r
202 SRam.changed = 1;\r
203 *pm=(u8)d;\r
204 }\r
205 }\r
206}\r
207\r
208// for nonstandard reads\r
209static u32 OtherRead16End(u32 a, int realsize)\r
210{\r
211 u32 d=0;\r
212\r
213 // 32x test\r
214/*\r
215 if (a == 0xa130ec) { d = 0x4d41; goto end; } // MA\r
216 else if (a == 0xa130ee) { d = 0x5253; goto end; } // RS\r
217 else if (a == 0xa15100) { d = 0x0080; goto end; }\r
218 else\r
219*/\r
220\r
221 // for games with simple protection devices, discovered by Haze\r
222 // some dumb detection is used, but that should be enough to make things work\r
223 if ((a>>22) == 1 && Pico.romsize >= 512*1024) {\r
224 if (*(int *)(Pico.rom+0x123e4) == 0x00550c39 && *(int *)(Pico.rom+0x123e8) == 0x00000040) { // Super Bubble Bobble (Unl) [!]\r
225 if (a == 0x400000) { d=0x55<<8; goto end; }\r
226 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
227 }\r
228 else if (*(int *)(Pico.rom+0x008c4) == 0x66240055 && *(int *)(Pico.rom+0x008c8) == 0x00404df9) { // Smart Mouse (Unl)\r
229 if (a == 0x400000) { d=0x55<<8; goto end; }\r
230 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
231 else if (a == 0x400004) { d=0xaa<<8; goto end; }\r
232 else if (a == 0x400006) { d=0xf0<<8; goto end; }\r
233 }\r
234 else if (*(int *)(Pico.rom+0x00404) == 0x00a90600 && *(int *)(Pico.rom+0x00408) == 0x6708b013) { // King of Fighters '98, The (Unl) [!]\r
235 if (a == 0x480000 || a == 0x4800e0 || a == 0x4824a0 || a == 0x488880) { d=0xaa<<8; goto end; }\r
236 else if (a == 0x4a8820) { d=0x0a<<8; goto end; }\r
237 // there is also a read @ 0x4F8820 which needs 0, but that is returned in default case\r
238 }\r
239 else if (*(int *)(Pico.rom+0x01b24) == 0x004013f9 && *(int *)(Pico.rom+0x01b28) == 0x00ff0000) { // Mahjong Lover (Unl) [!]\r
240 if (a == 0x400000) { d=0x90<<8; goto end; }\r
241 else if (a == 0x401000) { d=0xd3<<8; goto end; } // this one doesn't seem to be needed, the code does 2 comparisons and only then\r
242 // checks the result, which is of the above one. Left it just in case.\r
243 }\r
244 else if (*(int *)(Pico.rom+0x05254) == 0x0c3962d0 && *(int *)(Pico.rom+0x05258) == 0x00400055) { // Elf Wor (Unl)\r
245 if (a == 0x400000) { d=0x55<<8; goto end; }\r
246 else if (a == 0x400004) { d=0xc9<<8; goto end; } // this check is done if the above one fails\r
247 else if (a == 0x400002) { d=0x0f<<8; goto end; }\r
248 else if (a == 0x400006) { d=0x18<<8; goto end; } // similar to above\r
249 }\r
250 // our default behaviour is to return whatever was last written a 0x400000-0x7fffff range (used by Squirrel King (R) [!])\r
251 // Lion King II, The (Unl) [!] writes @ 400000 and wants to get that val @ 400002 and wites another val\r
252 // @ 400004 which is expected @ 400006, so we really remember 2 values here\r
253 d = Pico.m.prot_bytes[(a>>2)&1]<<8;\r
254 }\r
255 else if (a == 0xa13000 && Pico.romsize >= 1024*1024) {\r
256 if (*(int *)(Pico.rom+0xc8af0) == 0x30133013 && *(int *)(Pico.rom+0xc8af4) == 0x000f0240) { // Rockman X3 (Unl) [!]\r
257 d=0x0c; goto end;\r
258 }\r
259 else if (*(int *)(Pico.rom+0x28888) == 0x07fc0000 && *(int *)(Pico.rom+0x2888c) == 0x4eb94e75) { // Bug's Life, A (Unl) [!]\r
260 d=0x28; goto end; // does the check from RAM\r
261 }\r
262 else if (*(int *)(Pico.rom+0xc8778) == 0x30133013 && *(int *)(Pico.rom+0xc877c) == 0x000f0240) { // Super Mario Bros. (Unl) [!]\r
263 d=0x0c; goto end; // seems to be the same code as in Rockman X3 (Unl) [!]\r
264 }\r
265 else if (*(int *)(Pico.rom+0xf20ec) == 0x30143013 && *(int *)(Pico.rom+0xf20f0) == 0x000f0200) { // Super Mario 2 1998 (Unl) [!]\r
266 d=0x0a; goto end;\r
267 }\r
268 }\r
269 else if (a == 0xa13002) { // Pocket Monsters (Unl)\r
270 d=0x01; goto end;\r
271 }\r
272 else if (a == 0xa1303E) { // Pocket Monsters (Unl)\r
273 d=0x1f; goto end;\r
274 }\r
275 else if (a == 0x30fe02) {\r
276 // Virtua Racing - just for fun\r
277 // this seems to be some flag that SVP is ready or something similar\r
278 d=1; goto end;\r
279 }\r
280\r
281end:\r
282 elprintf(EL_UIO, "strange r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);\r
283 return d;\r
284}\r
285\r
286\r
287//extern UINT32 mz80GetRegisterValue(void *, UINT32);\r
288\r
289static void OtherWrite8End(u32 a,u32 d,int realsize)\r
290{\r
291 // sram\r
292 if(a >= SRam.start && a <= SRam.end) {\r
293 elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d, SekPc);\r
294 SRAMWrite(a, d);\r
295 return;\r
296 }\r
297\r
298#ifdef _ASM_MEMORY_C\r
299 // special ROM hardware (currently only banking and sram reg supported)\r
300 if((a&0xfffff1) == 0xA130F1) {\r
301 PicoWriteRomHW_SSF2(a, d); // SSF2 or SRAM\r
302 return;\r
303 }\r
304#else\r
305 // sram access register\r
306 if(a == 0xA130F1) {\r
307 elprintf(EL_SRAMIO, "sram reg=%02x", d);\r
308 Pico.m.sram_reg &= ~3;\r
309 Pico.m.sram_reg |= (u8)(d&3);\r
310 return;\r
311 }\r
312#endif\r
313 elprintf(EL_UIO, "strange w%i: %06x, %08x @%06x", realsize, a&0xffffff, d, SekPc);\r
314\r
315 // for games with simple protection devices, discovered by Haze\r
316 if ((a>>22) == 1)\r
317 Pico.m.prot_bytes[(a>>2)&1] = (u8)d;\r
318}\r
319\r
320#include "MemoryCmn.c"\r
321\r
322\r
323// -----------------------------------------------------------------\r
324// Read Rom and read Ram\r
325\r
326#ifndef _ASM_MEMORY_C\r
327PICO_INTERNAL_ASM u32 PicoRead8(u32 a)\r
328{\r
329 u32 d=0;\r
330\r
331 if ((a&0xe00000)==0xe00000) { d = *(u8 *)(Pico.ram+((a^1)&0xffff)); goto end; } // Ram\r
332\r
333 a&=0xffffff;\r
334\r
335#ifndef EMU_CORE_DEBUG\r
336 // sram\r
337 if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
338 d = SRAMRead(a);\r
339 elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);\r
340 goto end;\r
341 }\r
342#endif\r
343\r
344 if (a<Pico.romsize) { d = *(u8 *)(Pico.rom+(a^1)); goto end; } // Rom\r
345 log_io(a, 8, 0);\r
346 if ((a&0xff4000)==0xa00000) { d=z80Read8(a); goto end; } // Z80 Ram\r
347\r
348 if ((a&0xe700e0)==0xc00000) // VDP\r
349 d=PicoVideoRead(a);\r
350 else d=OtherRead16(a&~1, 8);\r
351 if ((a&1)==0) d>>=8;\r
352\r
353end:\r
354 elprintf(EL_IO, "r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);\r
355#ifdef EMU_CORE_DEBUG\r
356 if (a>=Pico.romsize) {\r
357 lastread_a = a;\r
358 lastread_d[lrp_cyc++&15] = (u8)d;\r
359 }\r
360#endif\r
361 return d;\r
362}\r
363\r
364PICO_INTERNAL_ASM u32 PicoRead16(u32 a)\r
365{\r
366 u32 d=0;\r
367\r
368 if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram\r
369\r
370 a&=0xfffffe;\r
371\r
372#ifndef EMU_CORE_DEBUG\r
373 // sram\r
374 if (a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
375 d = SRAMRead16(a);\r
376 elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);\r
377 goto end;\r
378 }\r
379#endif\r
380\r
381 if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom\r
382 log_io(a, 16, 0);\r
383\r
384 if ((a&0xe700e0)==0xc00000)\r
385 d = PicoVideoRead(a);\r
386 else d = OtherRead16(a, 16);\r
387\r
388end:\r
389 elprintf(EL_IO, "r16: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
390#ifdef EMU_CORE_DEBUG\r
391 if (a>=Pico.romsize) {\r
392 lastread_a = a;\r
393 lastread_d[lrp_cyc++&15] = d;\r
394 }\r
395#endif\r
396 return d;\r
397}\r
398\r
399PICO_INTERNAL_ASM u32 PicoRead32(u32 a)\r
400{\r
401 u32 d=0;\r
402\r
403 if ((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); d = (pm[0]<<16)|pm[1]; goto end; } // Ram\r
404\r
405 a&=0xfffffe;\r
406\r
407 // sram\r
408 if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg&5)) {\r
409 d = (SRAMRead16(a)<<16)|SRAMRead16(a+2);\r
410 elprintf(EL_SRAMIO, "sram r32 [%06x] %08x @ %06x", a, d, SekPc);\r
411 goto end;\r
412 }\r
413\r
414 if (a<Pico.romsize) { u16 *pm=(u16 *)(Pico.rom+a); d = (pm[0]<<16)|pm[1]; goto end; } // Rom\r
415 log_io(a, 32, 0);\r
416\r
417 if ((a&0xe700e0)==0xc00000)\r
418 d = (PicoVideoRead(a)<<16)|PicoVideoRead(a+2);\r
419 else d = (OtherRead16(a, 32)<<16)|OtherRead16(a+2, 32);\r
420\r
421end:\r
422 elprintf(EL_IO, "r32: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
423#ifdef EMU_CORE_DEBUG\r
424 if (a>=Pico.romsize) {\r
425 lastread_a = a;\r
426 lastread_d[lrp_cyc++&15] = d;\r
427 }\r
428#endif\r
429 return d;\r
430}\r
431#endif\r
432\r
433// -----------------------------------------------------------------\r
434// Write Ram\r
435\r
436#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)\r
437PICO_INTERNAL_ASM void PicoWrite8(u32 a,u8 d)\r
438{\r
439 elprintf(EL_IO, "w8 : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
440#ifdef EMU_CORE_DEBUG\r
441 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
442#endif\r
443\r
444 if ((a&0xe00000)==0xe00000) { *(u8 *)(Pico.ram+((a^1)&0xffff))=d; return; } // Ram\r
445 log_io(a, 8, 1);\r
446\r
447 a&=0xffffff;\r
448 OtherWrite8(a,d);\r
449}\r
450#endif\r
451\r
452void PicoWrite16(u32 a,u16 d)\r
453{\r
454 elprintf(EL_IO, "w16: %06x, %04x", a&0xffffff, d);\r
455#ifdef EMU_CORE_DEBUG\r
456 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
457#endif\r
458\r
459 if ((a&0xe00000)==0xe00000) { *(u16 *)(Pico.ram+(a&0xfffe))=d; return; } // Ram\r
460 log_io(a, 16, 1);\r
461\r
462 a&=0xfffffe;\r
463 if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; } // VDP\r
464 OtherWrite16(a,d);\r
465}\r
466\r
467static void PicoWrite32(u32 a,u32 d)\r
468{\r
469 elprintf(EL_IO, "w32: %06x, %08x", a&0xffffff, d);\r
470#ifdef EMU_CORE_DEBUG\r
471 lastwrite_cyc_d[lwp_cyc++&15] = d;\r
472#endif\r
473\r
474 if ((a&0xe00000)==0xe00000)\r
475 {\r
476 // Ram:\r
477 u16 *pm=(u16 *)(Pico.ram+(a&0xfffe));\r
478 pm[0]=(u16)(d>>16); pm[1]=(u16)d;\r
479 return;\r
480 }\r
481 log_io(a, 32, 1);\r
482\r
483 a&=0xfffffe;\r
484 if ((a&0xe700e0)==0xc00000)\r
485 {\r
486 // VDP:\r
487 PicoVideoWrite(a, (u16)(d>>16));\r
488 PicoVideoWrite(a+2,(u16)d);\r
489 return;\r
490 }\r
491\r
492 OtherWrite16(a, (u16)(d>>16));\r
493 OtherWrite16(a+2,(u16)d);\r
494}\r
495\r
496\r
497// -----------------------------------------------------------------\r
498\r
499static void OtherWrite16End(u32 a,u32 d,int realsize)\r
500{\r
501 PicoWrite8Hook(a, d>>8, realsize);\r
502 PicoWrite8Hook(a+1,d&0xff, realsize);\r
503}\r
504\r
505u32 (*PicoRead16Hook) (u32 a, int realsize) = OtherRead16End;\r
506void (*PicoWrite8Hook) (u32 a, u32 d, int realsize) = OtherWrite8End;\r
507void (*PicoWrite16Hook)(u32 a, u32 d, int realsize) = OtherWrite16End;\r
508\r
509PICO_INTERNAL void PicoMemResetHooks(void)\r
510{\r
511 // default unmapped/cart specific handlers\r
512 PicoRead16Hook = OtherRead16End;\r
513 PicoWrite8Hook = OtherWrite8End;\r
514 PicoWrite16Hook = OtherWrite16End;\r
515}\r
516\r
517#ifdef EMU_M68K\r
518static void m68k_mem_setup(void);\r
519#endif\r
520\r
521PICO_INTERNAL void PicoMemSetup(void)\r
522{\r
523 // Setup memory callbacks:\r
524#ifdef EMU_C68K\r
525 PicoCpuCM68k.checkpc=PicoCheckPc;\r
526 PicoCpuCM68k.fetch8 =PicoCpuCM68k.read8 =PicoRead8;\r
527 PicoCpuCM68k.fetch16=PicoCpuCM68k.read16=PicoRead16;\r
528 PicoCpuCM68k.fetch32=PicoCpuCM68k.read32=PicoRead32;\r
529 PicoCpuCM68k.write8 =PicoWrite8;\r
530 PicoCpuCM68k.write16=PicoWrite16;\r
531 PicoCpuCM68k.write32=PicoWrite32;\r
532#endif\r
533#ifdef EMU_F68K\r
534 PicoCpuFM68k.read_byte =PicoRead8;\r
535 PicoCpuFM68k.read_word =PicoRead16;\r
536 PicoCpuFM68k.read_long =PicoRead32;\r
537 PicoCpuFM68k.write_byte=PicoWrite8;\r
538 PicoCpuFM68k.write_word=PicoWrite16;\r
539 PicoCpuFM68k.write_long=PicoWrite32;\r
540\r
541 // setup FAME fetchmap\r
542 {\r
543 int i;\r
544 // by default, point everything to first 64k of ROM\r
545 for (i = 0; i < M68K_FETCHBANK1; i++)\r
546 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
547 // now real ROM\r
548 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
549 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
550 // .. and RAM\r
551 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
552 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
553 }\r
554#endif\r
555#ifdef EMU_M68K\r
556 m68k_mem_setup();\r
557#endif\r
558}\r
559\r
560/* some nasty things below :( */\r
561#ifdef EMU_M68K\r
562unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;\r
563unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;\r
564unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;\r
565void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;\r
566void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;\r
567void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;\r
568unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address) = NULL;\r
569unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address) = NULL;\r
570unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address) = NULL;\r
571\r
572// these are here for core debugging mode\r
573static unsigned int m68k_read_8 (unsigned int a, int do_fake)\r
574{\r
575 a&=0xffffff;\r
576 if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u8 *)(Pico.rom+(a^1)); // Rom\r
577#ifdef EMU_CORE_DEBUG\r
578 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
579#endif\r
580 return pm68k_read_memory_pcr_8(a);\r
581}\r
582static unsigned int m68k_read_16(unsigned int a, int do_fake)\r
583{\r
584 a&=0xffffff;\r
585 if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) return *(u16 *)(Pico.rom+(a&~1)); // Rom\r
586#ifdef EMU_CORE_DEBUG\r
587 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
588#endif\r
589 return pm68k_read_memory_pcr_16(a);\r
590}\r
591static unsigned int m68k_read_32(unsigned int a, int do_fake)\r
592{\r
593 a&=0xffffff;\r
594 if(a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
595#ifdef EMU_CORE_DEBUG\r
596 if(do_fake&&((ppop&0x3f)==0x3a||(ppop&0x3f)==0x3b)) return lastread_d[lrp_mus++&15];\r
597#endif\r
598 return pm68k_read_memory_pcr_32(a);\r
599}\r
600\r
601unsigned int m68k_read_pcrelative_8 (unsigned int a) { return m68k_read_8 (a, 1); }\r
602unsigned int m68k_read_pcrelative_16(unsigned int a) { return m68k_read_16(a, 1); }\r
603unsigned int m68k_read_pcrelative_32(unsigned int a) { return m68k_read_32(a, 1); }\r
604unsigned int m68k_read_immediate_16(unsigned int a) { return m68k_read_16(a, 0); }\r
605unsigned int m68k_read_immediate_32(unsigned int a) { return m68k_read_32(a, 0); }\r
606unsigned int m68k_read_disassembler_8 (unsigned int a) { return m68k_read_8 (a, 0); }\r
607unsigned int m68k_read_disassembler_16(unsigned int a) { return m68k_read_16(a, 0); }\r
608unsigned int m68k_read_disassembler_32(unsigned int a) { return m68k_read_32(a, 0); }\r
609\r
610static unsigned int m68k_read_memory_pcr_8(unsigned int a)\r
611{\r
612 if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
613 return 0;\r
614}\r
615\r
616static unsigned int m68k_read_memory_pcr_16(unsigned int a)\r
617{\r
618 if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
619 return 0;\r
620}\r
621\r
622static unsigned int m68k_read_memory_pcr_32(unsigned int a)\r
623{\r
624 if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
625 return 0;\r
626}\r
627\r
628#ifdef EMU_CORE_DEBUG\r
629// ROM only\r
630unsigned int m68k_read_memory_8(unsigned int a)\r
631{\r
632 u8 d;\r
633 if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
634 d = *(u8 *) (Pico.rom+(a^1));\r
635 else d = (u8) lastread_d[lrp_mus++&15];\r
636 elprintf(EL_IO, "r8_mu : %06x, %02x @%06x", a&0xffffff, d, SekPc);\r
637 return d;\r
638}\r
639unsigned int m68k_read_memory_16(unsigned int a)\r
640{\r
641 u16 d;\r
642 if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
643 d = *(u16 *)(Pico.rom+(a&~1));\r
644 else d = (u16) lastread_d[lrp_mus++&15];\r
645 elprintf(EL_IO, "r16_mu: %06x, %04x @%06x", a&0xffffff, d, SekPc);\r
646 return d;\r
647}\r
648unsigned int m68k_read_memory_32(unsigned int a)\r
649{\r
650 u32 d;\r
651 if (a<Pico.romsize && m68ki_cpu_p==&PicoCpuMM68k)\r
652 { u16 *pm=(u16 *)(Pico.rom+(a&~1));d=(pm[0]<<16)|pm[1]; }\r
653 else if (a <= 0x78) d = m68k_read_32(a, 0);\r
654 else d = lastread_d[lrp_mus++&15];\r
655 elprintf(EL_IO, "r32_mu: %06x, %08x @%06x", a&0xffffff, d, SekPc);\r
656 return d;\r
657}\r
658\r
659// ignore writes, Cyclone already done that\r
660void m68k_write_memory_8(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
661void m68k_write_memory_16(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
662void m68k_write_memory_32(unsigned int address, unsigned int value) { lastwrite_mus_d[lwp_mus++&15] = value; }\r
663\r
664#else // if !EMU_CORE_DEBUG\r
665\r
666/* it appears that Musashi doesn't always mask the unused bits */\r
667unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }\r
668unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }\r
669unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }\r
670void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }\r
671void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }\r
672void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }\r
673#endif // !EMU_CORE_DEBUG\r
674\r
675static void m68k_mem_setup(void)\r
676{\r
677 pm68k_read_memory_8 = PicoRead8;\r
678 pm68k_read_memory_16 = PicoRead16;\r
679 pm68k_read_memory_32 = PicoRead32;\r
680 pm68k_write_memory_8 = PicoWrite8;\r
681 pm68k_write_memory_16 = PicoWrite16;\r
682 pm68k_write_memory_32 = PicoWrite32;\r
683 pm68k_read_memory_pcr_8 = m68k_read_memory_pcr_8;\r
684 pm68k_read_memory_pcr_16 = m68k_read_memory_pcr_16;\r
685 pm68k_read_memory_pcr_32 = m68k_read_memory_pcr_32;\r
686}\r
687#endif // EMU_M68K\r
688\r
689\r
690// -----------------------------------------------------------------\r
691// z80 memhandlers\r
692\r
693PICO_INTERNAL unsigned char z80_read(unsigned short a)\r
694{\r
695 u8 ret = 0;\r
696\r
697 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
698 {\r
699 if (PicoOpt&POPT_EN_FM) ret = (u8) YM2612Read();\r
700 return ret;\r
701 }\r
702\r
703 if (a>=0x8000)\r
704 {\r
705 extern u32 PicoReadM68k8(u32 a);\r
706 u32 addr68k;\r
707 addr68k=Pico.m.z80_bank68k<<15;\r
708 addr68k+=a&0x7fff;\r
709\r
710 if (PicoAHW & PAHW_MCD)\r
711 ret = PicoReadM68k8(addr68k);\r
712 else ret = PicoRead8(addr68k);\r
713 elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);\r
714 return ret;\r
715 }\r
716\r
717 // should not be needed, cores should be able to access RAM themselves\r
718 if (a<0x4000) return Pico.zram[a&0x1fff];\r
719\r
720 elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, ret);\r
721 return ret;\r
722}\r
723\r
724#ifndef _USE_CZ80\r
725PICO_INTERNAL_ASM void z80_write(unsigned char data, unsigned short a)\r
726#else\r
727PICO_INTERNAL_ASM void z80_write(unsigned int a, unsigned char data)\r
728#endif\r
729{\r
730 if ((a>>13)==2) // 0x4000-0x5fff (Charles MacDonald)\r
731 {\r
732 if(PicoOpt&POPT_EN_FM) emustatus|=YM2612Write(a, data) & 1;\r
733 return;\r
734 }\r
735\r
736 if ((a&0xfff9)==0x7f11) // 7f11 7f13 7f15 7f17\r
737 {\r
738 if(PicoOpt&POPT_EN_PSG) SN76496Write(data);\r
739 return;\r
740 }\r
741\r
742 if ((a>>8)==0x60)\r
743 {\r
744 Pico.m.z80_bank68k>>=1;\r
745 Pico.m.z80_bank68k|=(data&1)<<8;\r
746 Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one\r
747 return;\r
748 }\r
749\r
750 if (a>=0x8000)\r
751 {\r
752 extern void PicoWriteM68k8(u32 a,u8 d);\r
753 u32 addr68k;\r
754 addr68k=Pico.m.z80_bank68k<<15;\r
755 addr68k+=a&0x7fff;\r
756 elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);\r
757 if (PicoAHW & PAHW_MCD)\r
758 PicoWriteM68k8(addr68k, data);\r
759 else PicoWrite8(addr68k, data);\r
760 return;\r
761 }\r
762\r
763 // should not be needed\r
764 if (a<0x4000) { Pico.zram[a&0x1fff]=data; return; }\r
765\r
766 elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
767}\r
768\r
769#ifndef _USE_CZ80\r
770PICO_INTERNAL unsigned short z80_read16(unsigned short a)\r
771{\r
772 return (u16) ( (u16)z80_read(a) | ((u16)z80_read((u16)(a+1))<<8) );\r
773}\r
774\r
775PICO_INTERNAL void z80_write16(unsigned short data, unsigned short a)\r
776{\r
777 z80_write((unsigned char) data,a);\r
778 z80_write((unsigned char)(data>>8),(u16)(a+1));\r
779}\r
780#endif\r
781\r